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T ieee80211_get_rate -ffffffff814362c0 T ieee80211_ba_del -ffffffff814363b0 T ieee80211_node_set_timeouts -ffffffff814364b0 T ieee80211_node_addba_request_ac_be_to -ffffffff814364d0 T ieee80211_node_addba_request_ac_bk_to -ffffffff81436500 T ieee80211_node_addba_request_ac_vi_to -ffffffff81436530 T ieee80211_node_addba_request_ac_vo_to -ffffffff81436560 T ieee80211_setup_node -ffffffff814366f0 T ieee80211_alloc_node -ffffffff81436790 T ieee80211_dup_bss -ffffffff81436860 T ieee80211_find_txnode -ffffffff81436a70 T ieee80211_find_rxnode -ffffffff81436d80 T ieee80211_node_tx_ba_clear -ffffffff81436df0 T ieee80211_release_node -ffffffff81436e80 T ieee80211_clean_cached -ffffffff81436f10 T ieee80211_node_leave -ffffffff81437160 T ieee80211_setup_htcaps -ffffffff81437210 T ieee80211_clear_htcaps -ffffffff81437290 T ieee80211_40mhz_valid_secondary_above -ffffffff81437320 T ieee80211_40mhz_valid_secondary_below -ffffffff814373a0 T ieee80211_40mhz_center_freq_valid -ffffffff81437400 T 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drm_connector_attach_content_type_property -ffffffff8194dd50 T drm_mode_create_content_type_property -ffffffff8194ddd0 T drm_connector_attach_tv_margin_properties -ffffffff8194de40 T drm_mode_create_tv_margin_properties -ffffffff8194df60 T drm_mode_create_tv_properties_legacy -ffffffff8194e1b0 T drm_mode_create_tv_properties -ffffffff8194e390 T drm_mode_create_scaling_mode_property -ffffffff8194e400 T drm_connector_attach_vrr_capable_property -ffffffff8194e490 T drm_connector_attach_scaling_mode_property -ffffffff8194e660 T drm_mode_create_aspect_ratio_property -ffffffff8194e6e0 T drm_mode_create_hdmi_colorspace_property -ffffffff8194e700 t drm_mode_create_colorspace_property -ffffffff8194e840 T drm_mode_create_dp_colorspace_property -ffffffff8194e870 T drm_mode_create_suggested_offset_properties -ffffffff8194e940 T drm_connector_set_path_property -ffffffff8194e9a0 T drm_connector_set_tile_property -ffffffff8194eaf0 T drm_connector_set_link_status_property -ffffffff8194eb40 T drm_connector_attach_max_bpc_property -ffffffff8194ec00 T drm_connector_attach_hdr_output_metadata_property -ffffffff8194ec50 T drm_connector_attach_colorspace_property -ffffffff8194eca0 T drm_connector_atomic_hdr_metadata_equal -ffffffff8194ed10 T drm_connector_set_vrr_capable_property -ffffffff8194ed60 T drm_connector_set_panel_orientation -ffffffff8194ee30 T drm_connector_set_panel_orientation_with_quirk -ffffffff8194ef10 T drm_connector_set_orientation_from_panel -ffffffff8194f000 T drm_connector_create_privacy_screen_properties -ffffffff8194f0a0 T drm_connector_attach_privacy_screen_properties -ffffffff8194f110 T drm_connector_attach_privacy_screen_provider -ffffffff8194f220 t drm_connector_privacy_screen_notifier -ffffffff8194f2c0 T drm_connector_update_privacy_screen -ffffffff8194f330 T drm_connector_set_obj_prop -ffffffff8194f410 T drm_connector_property_set_ioctl -ffffffff8194f470 T drm_mode_getconnector -ffffffff8194f970 T drm_connector_find_by_fwnode -ffffffff8194fa20 T drm_connector_oob_hotplug_event -ffffffff8194fb10 T drm_mode_get_tile_group -ffffffff8194fbe0 T drm_mode_create_tile_group -ffffffff8194fcb0 t drm_connector_free -ffffffff8194fcf0 t kasprintf -ffffffff81950000 T drm_crtc_from_index -ffffffff81950060 T drm_crtc_force_disable -ffffffff819501a0 T drm_mode_set_config_internal -ffffffff81950220 T drm_crtc_register_all -ffffffff819502a0 T drm_crtc_unregister_all -ffffffff81950310 T drm_crtc_create_fence -ffffffff819503a0 T drm_crtc_init_with_planes -ffffffff81950470 t __drm_crtc_init_with_planes -ffffffff81950870 T drmm_crtc_init_with_planes -ffffffff81950970 T __drmm_crtc_alloc_with_planes -ffffffff81950ae0 T drm_crtc_cleanup -ffffffff81950c00 T drm_mode_getcrtc -ffffffff81950da0 t __drm_mode_set_config_internal -ffffffff81950f50 T drm_crtc_check_viewport -ffffffff81951000 T drm_mode_setcrtc -ffffffff81951780 T drm_mode_crtc_set_obj_prop -ffffffff81951800 T drm_crtc_create_scaling_filter_property -ffffffff81951870 t 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wg_timers_run_retry_handshake +ffffffff81418dd0 T wg_timers_run_persistent_keepalive +ffffffff81418e20 T wg_timers_run_zero_key_material +ffffffff81418e80 T wg_timers_enable +ffffffff81418ef0 T wg_timers_set_persistent_keepalive +ffffffff81418f40 T wg_timers_get_persistent_keepalive +ffffffff81418f80 T wg_timers_get_last_handshake +ffffffff81418fd0 T wg_timers_expired_handshake_last_sent +ffffffff81419070 T wg_timers_check_handshake_last_sent +ffffffff81419140 T wg_timers_event_data_sent +ffffffff814191a0 T wg_timers_event_data_received +ffffffff814191f0 T wg_timers_event_any_authenticated_packet_sent +ffffffff81419210 T wg_timers_event_any_authenticated_packet_received +ffffffff81419230 T wg_timers_event_any_authenticated_packet_traversal +ffffffff81419270 T wg_timers_event_handshake_initiated +ffffffff814192c0 T wg_timers_event_handshake_responded +ffffffff81419300 T wg_timers_event_handshake_complete +ffffffff814193a0 T wg_timers_event_session_derived +ffffffff814193e0 T wg_timers_event_want_initiation +ffffffff814194b0 T wg_timers_run_send_initiation +ffffffff81419570 T wg_timers_event_reset_handshake_last_sent +ffffffff814195b0 T wg_peer_send_buf +ffffffff814196e0 T wg_send_response +ffffffff81419820 T wg_send_cookie +ffffffff814198d0 T wg_queue_out +ffffffff81419af0 T wg_handshake +ffffffff8141a1d0 T wg_index_get +ffffffff8141a260 T wg_handshake_worker +ffffffff8141a2d0 T wg_encap +ffffffff8141a570 T wg_decap +ffffffff8141a940 T wg_encap_worker +ffffffff8141a9f0 T wg_ring_dequeue +ffffffff8141aa60 T wg_decap_worker +ffffffff8141ab10 T wg_queue_dequeue +ffffffff8141ac30 T wg_queue_in +ffffffff8141adc0 T wg_queue_len +ffffffff8141ae10 T wg_remote_get +ffffffff8141aee0 T wg_index_set +ffffffff8141aff0 T wg_index_drop +ffffffff8141b0f0 T wg_qstart +ffffffff8141b370 T wg_output +ffffffff8141b670 T wg_ioctl_set +ffffffff8141be10 T wg_ioctl_get +ffffffff8141c250 T wg_ioctl +ffffffff8141c390 T wg_up +ffffffff8141c500 T wg_down +ffffffff8141c6c0 T wgattach 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noise_remote_decrypt +ffffffff81420000 T cookie_maker_init +ffffffff81420110 T cookie_checker_init +ffffffff81420250 t ratelimit_deinit +ffffffff81420310 T cookie_checker_update +ffffffff81420470 T cookie_checker_deinit +ffffffff814204a0 T cookie_checker_create_payload +ffffffff81420570 t cookie_checker_make_cookie +ffffffff814206f0 T cookie_maker_consume_payload +ffffffff814207c0 T cookie_maker_mac +ffffffff81420950 T cookie_checker_validate_macs +ffffffff81420b20 t ratelimit_allow +ffffffff81421000 T parity +ffffffff81421050 T stoeplitz_random_seed +ffffffff814210c0 T stoeplitz_init +ffffffff81421240 T stoeplitz_cache_init +ffffffff81421350 T stoeplitz_hash_ip4 +ffffffff814213a0 T stoeplitz_hash_ip4port +ffffffff81421400 T stoeplitz_hash_ip6 +ffffffff81421460 T stoeplitz_hash_ip6port +ffffffff814214d0 T stoeplitz_hash_eaddr +ffffffff81421520 T stoeplitz_to_key +ffffffff81422000 T ieee80211_begin_bgscan +ffffffff814220d0 T ieee80211_bgscan_timeout +ffffffff814221a0 T ieee80211_channel_init +ffffffff81422390 T ieee80211_chan2ieee +ffffffff81422410 T ieee80211_ifattach +ffffffff814225d0 T ieee80211_setbasicrates +ffffffff814226c0 T ieee80211_setmode +ffffffff81422970 T ieee80211_ifdetach +ffffffff814229f0 T ieee80211_mhz2ieee +ffffffff81422a80 T ieee80211_ieee2mhz +ffffffff81422af0 T ieee80211_configure_ampdu_tx +ffffffff81422b50 T ieee80211_media_init +ffffffff81423550 T ieee80211_rate2media +ffffffff81423910 T ieee80211_media_status +ffffffff81423b20 T ieee80211_findrate +ffffffff81423b90 T ieee80211_media_change +ffffffff81424130 T ieee80211_media2mcs +ffffffff81424190 T ieee80211_media2rate +ffffffff814241e0 T ieee80211_mcs2media +ffffffff81424260 T ieee80211_watchdog +ffffffff81424380 T ieee80211_min_basic_rate +ffffffff81424480 T ieee80211_max_basic_rate +ffffffff81424560 T ieee80211_next_mode +ffffffff81424660 T ieee80211_chan2mode +ffffffff814246f0 T ieee80211_rate2plcp +ffffffff814247f0 T ieee80211_plcp2rate +ffffffff81425000 T ieee80211_amrr_node_init +ffffffff81425040 T ieee80211_amrr_choose +ffffffff81426000 T ieee80211_crypto_attach +ffffffff81426090 T ieee80211_set_key +ffffffff81426130 T ieee80211_delete_key +ffffffff814261a0 T ieee80211_crypto_detach +ffffffff81426260 T ieee80211_crypto_clear_groupkeys +ffffffff814263b0 T ieee80211_cipher_keylen +ffffffff81426410 T ieee80211_get_txkey +ffffffff81426490 T ieee80211_get_rxkey +ffffffff81426570 T ieee80211_encrypt +ffffffff814265f0 T ieee80211_decrypt +ffffffff81426760 T ieee80211_prf +ffffffff81426880 T ieee80211_kdf +ffffffff814269e0 T ieee80211_derive_ptk +ffffffff81426b50 T ieee80211_derive_pmkid +ffffffff81426c70 T ieee80211_eapol_key_mic +ffffffff81426da0 T ieee80211_eapol_key_check_mic +ffffffff81426e20 T ieee80211_eapol_key_encrypt +ffffffff81426fd0 T ieee80211_eapol_key_decrypt +ffffffff814270e0 T ieee80211_pmksa_add +ffffffff81427230 T ieee80211_pmksa_find +ffffffff81428000 T ieee80211_bip_set_key +ffffffff81428080 T ieee80211_bip_delete_key +ffffffff814280f0 T ieee80211_bip_encap +ffffffff81428300 T ieee80211_bip_decap +ffffffff81429000 T ieee80211_ccmp_set_key +ffffffff81429080 T ieee80211_ccmp_delete_key +ffffffff814290f0 T ieee80211_ccmp_encrypt +ffffffff814295c0 t ieee80211_ccmp_phase1 +ffffffff81429940 T ieee80211_ccmp_get_pn +ffffffff81429a50 T ieee80211_ccmp_decrypt +ffffffff8142a000 T ieee80211_tkip_set_key +ffffffff8142a0a0 T ieee80211_tkip_delete_key +ffffffff8142a110 T ieee80211_tkip_mic +ffffffff8142a290 T ieee80211_tkip_encrypt +ffffffff8142a6e0 t Phase1 +ffffffff8142a870 t Phase2 +ffffffff8142aab0 T ieee80211_tkip_get_tsc +ffffffff8142abc0 T ieee80211_tkip_decrypt +ffffffff8142b0b0 T ieee80211_michael_mic_failure +ffffffff8142b240 T ieee80211_michael_mic_failure_timeout +ffffffff8142b270 t ieee80211_tkip_deauth +ffffffff8142c000 T ieee80211_wep_set_key +ffffffff8142c060 T ieee80211_wep_delete_key +ffffffff8142c0d0 T ieee80211_wep_encrypt +ffffffff8142c4a0 T ieee80211_wep_decrypt +ffffffff8142d000 T ieee80211_get_hdrlen +ffffffff8142d090 T ieee80211_input_hwdecrypt +ffffffff8142d270 T ieee80211_inputm +ffffffff8142dd60 T ieee80211_input_ba +ffffffff8142e040 T ieee80211_amsdu_decap +ffffffff8142e2d0 T ieee80211_decap +ffffffff8142e470 T ieee80211_recv_pspoll +ffffffff8142e580 T ieee80211_recv_bar +ffffffff8142e660 T ieee80211_input +ffffffff8142e6d0 T ieee80211_ba_move_window +ffffffff8142e820 T ieee80211_input_ba_seq +ffffffff8142e9c0 T ieee80211_input_ba_flush +ffffffff8142eaf0 T ieee80211_input_ba_gap_skip +ffffffff8142eb90 T ieee80211_input_ba_gap_timeout +ffffffff8142ecb0 T ieee80211_enqueue_data +ffffffff8142ee90 T ieee80211_amsdu_decap_validate +ffffffff8142ef50 T ieee80211_parse_edca_params_body +ffffffff8142f0b0 T ieee80211_parse_edca_params +ffffffff8142f100 T ieee80211_parse_wmm_params +ffffffff8142f150 T ieee80211_parse_rsn_cipher +ffffffff8142f200 T ieee80211_parse_rsn_akm +ffffffff8142f2b0 T ieee80211_parse_rsn_body +ffffffff8142f530 T ieee80211_parse_rsn +ffffffff8142f580 T ieee80211_parse_wpa +ffffffff8142f5e0 T ieee80211_save_ie +ffffffff8142f6a0 T ieee80211_recv_probe_resp +ffffffff814303e0 T ieee80211_recv_probe_req +ffffffff814306a0 T ieee80211_recv_auth +ffffffff81430740 T ieee80211_recv_assoc_req +ffffffff814310c0 T ieee80211_recv_assoc_resp +ffffffff81431640 T ieee80211_recv_deauth +ffffffff814317b0 T ieee80211_recv_disassoc +ffffffff814318c0 T ieee80211_recv_addba_req +ffffffff81431c80 T ieee80211_addba_req_refuse +ffffffff81431d20 T ieee80211_addba_req_accept +ffffffff81431db0 T ieee80211_recv_addba_resp +ffffffff81431f00 T ieee80211_addba_resp_refuse +ffffffff81431f40 T ieee80211_addba_resp_accept +ffffffff81431fc0 T ieee80211_recv_delba +ffffffff81432140 T ieee80211_recv_sa_query_req +ffffffff814321b0 T ieee80211_recv_sa_query_resp +ffffffff81432220 T ieee80211_recv_action +ffffffff81432350 T ieee80211_recv_mgmt +ffffffff814324a0 T ieee80211_bar_tid +ffffffff81433000 T ieee80211_node2req +ffffffff81433370 T ieee80211_req2node +ffffffff81433480 T ieee80211_disable_wep +ffffffff81433590 T ieee80211_disable_rsn +ffffffff814335f0 T ieee80211_ioctl +ffffffff81434ab0 t ieee80211_ioctl_setnwkeys +ffffffff81434c90 t ieee80211_ioctl_setwpaparms +ffffffff81435000 T ieee80211_inact_timeout +ffffffff814350a0 T ieee80211_node_cache_timeout +ffffffff814350e0 T ieee80211_clean_nodes +ffffffff81435400 T ieee80211_print_ess +ffffffff814355f0 T ieee80211_print_ess_list +ffffffff81435660 T ieee80211_get_ess +ffffffff814356f0 T ieee80211_del_ess +ffffffff81435840 T ieee80211_add_ess +ffffffff81435eb0 T ieee80211_ess_adjust_rssi +ffffffff81435f20 T ieee80211_ess_calculate_score +ffffffff81436080 T ieee80211_ess_is_better +ffffffff814361d0 T ieee80211_match_ess +ffffffff814362c0 T ieee80211_switch_ess +ffffffff81436530 T ieee80211_set_ess +ffffffff81436800 T ieee80211_deselect_ess +ffffffff81436860 T ieee80211_node_attach +ffffffff81436a40 T ieee80211_node_alloc +ffffffff81436a60 T ieee80211_node_free +ffffffff81436b10 T ieee80211_node_copy +ffffffff81436cc0 T ieee80211_node_getrssi +ffffffff81436cf0 T ieee80211_node_checkrssi +ffffffff81436d80 T ieee80211_set_tim +ffffffff81436df0 T ieee80211_alloc_node_helper +ffffffff81436e70 T ieee80211_node_lateattach +ffffffff81436f30 T ieee80211_node_detach +ffffffff814370b0 T ieee80211_free_allnodes +ffffffff814371d0 T ieee80211_reset_scan +ffffffff81437260 T ieee80211_node_raise_inact +ffffffff814372a0 T ieee80211_begin_scan +ffffffff81437450 T ieee80211_node_cleanup +ffffffff81437500 T ieee80211_iterate_nodes +ffffffff81437590 T ieee80211_next_scan +ffffffff814376c0 T ieee80211_end_scan +ffffffff81437c20 T ieee80211_create_ibss +ffffffff814380f0 T ieee80211_match_bss +ffffffff81438510 T ieee80211_node_free_unref_cb +ffffffff81438580 T ieee80211_node_tx_stopped +ffffffff81438690 T ieee80211_node_switch_bss +ffffffff81438960 T ieee80211_node_tx_flushed +ffffffff81438ae0 T ieee80211_find_node +ffffffff81438b80 T ieee80211_node_join_bss +ffffffff81438d70 T ieee80211_choose_rsnparams +ffffffff81438ea0 T ieee80211_node_choose_bss +ffffffff81439090 T ieee80211_free_node +ffffffff81439180 T ieee80211_node_cmp +ffffffff814391a0 T ieee80211_clean_inactive_nodes +ffffffff81439260 T ieee80211_get_rate +ffffffff814392c0 T ieee80211_ba_del +ffffffff814393b0 T ieee80211_node_set_timeouts +ffffffff814394b0 T ieee80211_node_addba_request_ac_be_to +ffffffff814394d0 T ieee80211_node_addba_request_ac_bk_to +ffffffff81439500 T ieee80211_node_addba_request_ac_vi_to +ffffffff81439530 T ieee80211_node_addba_request_ac_vo_to +ffffffff81439560 T ieee80211_setup_node +ffffffff814396f0 T ieee80211_alloc_node +ffffffff81439790 T ieee80211_dup_bss +ffffffff81439860 T ieee80211_find_txnode +ffffffff81439a70 T ieee80211_find_rxnode +ffffffff81439d80 T ieee80211_node_tx_ba_clear +ffffffff81439df0 T ieee80211_release_node +ffffffff81439e80 T ieee80211_clean_cached +ffffffff81439f10 T ieee80211_node_leave +ffffffff8143a160 T ieee80211_setup_htcaps +ffffffff8143a210 T ieee80211_clear_htcaps +ffffffff8143a290 T ieee80211_40mhz_valid_secondary_above +ffffffff8143a320 T ieee80211_40mhz_valid_secondary_below +ffffffff8143a3a0 T ieee80211_40mhz_center_freq_valid +ffffffff8143a400 T ieee80211_setup_htop +ffffffff8143a4e0 T ieee80211_setup_vhtcaps +ffffffff8143a560 T ieee80211_80mhz_center_freq_valid +ffffffff8143a5d0 T ieee80211_setup_vhtop +ffffffff8143a6d0 T ieee80211_clear_vhtcaps +ffffffff8143a720 T ieee80211_setup_rates +ffffffff8143a7f0 T ieee80211_node_trigger_addba_req +ffffffff8143a850 T ieee80211_node_addba_request +ffffffff8143a880 T ieee80211_iserp_sta +ffffffff8143aa40 T ieee80211_needs_auth +ffffffff8143aa70 T ieee80211_node_join_ht +ffffffff8143aac0 T ieee80211_node_join_rsn +ffffffff8143abd0 T ieee80211_count_longslotsta +ffffffff8143ac20 T ieee80211_count_nonerpsta +ffffffff8143ac80 T ieee80211_count_pssta +ffffffff8143acd0 T ieee80211_count_rekeysta +ffffffff8143ad20 T ieee80211_node_join_11g +ffffffff8143aeb0 T ieee80211_node_join +ffffffff8143b1a0 T ieee80211_node_leave_ht +ffffffff8143b2c0 T ieee80211_node_leave_vht +ffffffff8143b310 T ieee80211_node_leave_rsn +ffffffff8143b440 T ieee80211_node_leave_11g +ffffffff8143b620 T ieee80211_node_leave_pwrsave +ffffffff8143b7e0 T ieee80211_ibss_merge +ffffffff8143bae0 T ieee80211_notify_dtim +ffffffff8143bbc0 T ieee80211_ess_cmp +ffffffff8143bbe0 t ieee80211_tree_RBT_COMPARE +ffffffff8143bc00 t ieee80211_ess_tree_RBT_COMPARE +ffffffff8143c000 T ieee80211_output +ffffffff8143c0f0 T ieee80211_action_name +ffffffff8143c140 T ieee80211_mgmt_output +ffffffff8143c3a0 T ieee80211_pwrsave +ffffffff8143c4d0 T ieee80211_up_to_ac +ffffffff8143c590 T ieee80211_classify +ffffffff8143c680 T ieee80211_can_use_ampdu +ffffffff8143c6e0 T ieee80211_tx_compressed_bar +ffffffff8143c820 T ieee80211_get_compressed_bar +ffffffff8143c900 T ieee80211_encap +ffffffff8143cd70 T ieee80211_add_capinfo +ffffffff8143ce00 T ieee80211_add_ssid +ffffffff8143ce60 T ieee80211_add_rates +ffffffff8143ced0 T ieee80211_add_ds_params +ffffffff8143cf30 T ieee80211_add_tim +ffffffff8143d070 T ieee80211_add_ibss_params +ffffffff8143d0a0 T ieee80211_add_edca_params +ffffffff8143d230 T ieee80211_add_erp +ffffffff8143d2d0 T ieee80211_add_qos_capability +ffffffff8143d310 T ieee80211_add_wme_info +ffffffff8143d350 T ieee80211_add_wme_param +ffffffff8143d4f0 T ieee80211_add_rsn_body +ffffffff8143d800 T ieee80211_add_rsn +ffffffff8143d860 T ieee80211_add_wpa +ffffffff8143d8d0 T ieee80211_add_xrates +ffffffff8143d960 T ieee80211_add_htcaps +ffffffff8143da40 T ieee80211_add_htop +ffffffff8143db10 T ieee80211_add_vhtcaps +ffffffff8143dbc0 T ieee80211_add_tie +ffffffff8143dc10 T ieee80211_getmgmt +ffffffff8143dcd0 T ieee80211_get_probe_req +ffffffff8143e0d0 T ieee80211_get_probe_resp +ffffffff8143e680 T ieee80211_get_auth +ffffffff8143e710 T ieee80211_get_deauth +ffffffff8143e790 T ieee80211_get_assoc_req +ffffffff8143ec80 T ieee80211_get_assoc_resp +ffffffff8143f070 T ieee80211_get_disassoc +ffffffff8143f0f0 T ieee80211_get_addba_req +ffffffff8143f1f0 T ieee80211_output_ba_move_window +ffffffff8143f2f0 T ieee80211_output_ba_move_window_to_first_unacked +ffffffff8143f4c0 T ieee80211_output_ba_record_ack +ffffffff8143f5f0 T ieee80211_get_addba_resp +ffffffff8143f6f0 T ieee80211_get_delba +ffffffff8143f790 T ieee80211_get_sa_query +ffffffff8143f820 T ieee80211_get_action +ffffffff8143fab0 T ieee80211_send_mgmt +ffffffff8143fe30 T ieee80211_get_rts +ffffffff8143fec0 T ieee80211_get_cts_to_self +ffffffff8143ff50 T ieee80211_beacon_alloc +ffffffff81441000 T ieee80211_eapol_key_input +ffffffff81441210 T ieee80211_recv_eapol_key_req +ffffffff81441360 T ieee80211_recv_4way_msg3 +ffffffff81441cf0 T ieee80211_recv_4way_msg2or4 +ffffffff81441e30 T ieee80211_recv_4way_msg1 +ffffffff81442110 T ieee80211_recv_wpa_group_msg1 +ffffffff81442410 T ieee80211_recv_rsn_group_msg1 +ffffffff81442920 T ieee80211_recv_group_msg2 +ffffffff81442a70 T ieee80211_recv_4way_msg2 +ffffffff81442c70 T ieee80211_must_update_group_key +ffffffff81442cd0 T ieee80211_recv_4way_msg4 +ffffffff81443000 T ieee80211_send_eapol_key +ffffffff814431f0 T ieee80211_eapol_timeout +ffffffff81443270 T ieee80211_send_4way_msg1 +ffffffff81443530 T ieee80211_send_4way_msg3 +ffffffff81443a80 T ieee80211_send_group_msg1 +ffffffff81443fa0 T ieee80211_add_gtk_kde +ffffffff81444060 T ieee80211_add_pmkid_kde +ffffffff814440b0 T ieee80211_add_igtk_kde +ffffffff81444180 T ieee80211_get_eapol_key +ffffffff81444240 T ieee80211_send_4way_msg2 +ffffffff81444460 T ieee80211_send_4way_msg4 +ffffffff81444650 T ieee80211_send_group_msg2 +ffffffff81444830 T ieee80211_send_eapol_key_req +ffffffff81445000 T ieee80211_proto_attach +ffffffff814450b0 T ieee80211_newstate +ffffffff81445d90 T ieee80211_proto_detach +ffffffff81445dd0 T ieee80211_print_essid +ffffffff81445f50 T ieee80211_fix_rate +ffffffff81446250 T ieee80211_reset_erp +ffffffff81446370 T ieee80211_set_shortslottime +ffffffff814463d0 T ieee80211_keyrun +ffffffff81446540 T ieee80211_setkeys +ffffffff81446780 t ieee80211_node_gtk_rekey +ffffffff814467e0 T ieee80211_setkeysdone +ffffffff814468e0 T ieee80211_gtk_rekey_timeout +ffffffff81446930 T ieee80211_sa_query_timeout +ffffffff81446a00 T ieee80211_sa_query_request +ffffffff81446a80 T ieee80211_ht_negotiate +ffffffff81446c50 T ieee80211_vht_negotiate +ffffffff81446e70 T ieee80211_tx_ba_timeout +ffffffff81446f90 T ieee80211_delba_request +ffffffff81447100 T ieee80211_rx_ba_timeout +ffffffff81447190 T ieee80211_addba_request +ffffffff81447360 T ieee80211_auth_open_confirm +ffffffff81447410 T ieee80211_try_another_bss +ffffffff81447520 T ieee80211_auth_open +ffffffff81447820 T ieee80211_set_beacon_miss_threshold +ffffffff814478b0 T ieee80211_stop_ampdu_tx +ffffffff814479c0 T ieee80211_check_wpa_supplicant_failure +ffffffff81447a40 T ieee80211_set_link_state +ffffffff81447ad0 T ieee80211_rtm_80211info_task +ffffffff81448000 T ieee80211_ra_get_ht_rateset +ffffffff81448080 T ieee80211_ra_use_ht_sgi +ffffffff81448100 T ieee80211_ra_get_txrate +ffffffff81448190 T ieee80211_ra_next_lower_intra_rate +ffffffff81448320 T ieee80211_ra_next_intra_rate +ffffffff814484a0 T ieee80211_ra_next_rateset +ffffffff814486b0 T ieee80211_ra_best_mcs_in_rateset +ffffffff81448730 T ieee80211_ra_probe_next_rateset +ffffffff814489e0 T ieee80211_ra_next_mcs +ffffffff81448a30 T ieee80211_ra_probe_clear +ffffffff81448a70 T ieee80211_ra_probe_done +ffffffff81448ab0 T ieee80211_ra_intra_mode_ra_finished +ffffffff81448e20 T ieee80211_ra_trigger_next_rateset +ffffffff81448e90 T ieee80211_ra_inter_mode_ra_finished +ffffffff81448ec0 T ieee80211_ra_best_rate +ffffffff81448f60 T ieee80211_ra_probe_next_rate +ffffffff81449000 T ieee80211_ra_valid_tx_mcs +ffffffff81449080 T ieee80211_ra_valid_rates +ffffffff81449150 T ieee80211_ra_probe_valid +ffffffff814491a0 T ieee80211_ra_add_stats_ht +ffffffff81449430 T ieee80211_ra_choose +ffffffff81449860 T ieee80211_ra_node_init +ffffffff8144a000 T ieee80211_ra_vht_get_rateset +ffffffff8144a0a0 T ieee80211_ra_vht_use_sgi +ffffffff8144a190 T ieee80211_ra_vht_get_txrate +ffffffff8144a230 T ieee80211_ra_vht_next_lower_intra_rate +ffffffff8144a270 T ieee80211_ra_vht_get_max_mcs +ffffffff8144a2f0 T ieee80211_ra_vht_next_intra_rate +ffffffff8144a3e0 T ieee80211_ra_vht_next_rateset +ffffffff8144a5e0 T ieee80211_ra_vht_best_mcs_in_rateset +ffffffff8144a680 T ieee80211_ra_vht_probe_next_rateset +ffffffff8144aa10 T ieee80211_ra_vht_next_mcs +ffffffff8144aaa0 T ieee80211_ra_vht_probe_clear +ffffffff8144aad0 T ieee80211_ra_vht_probe_done +ffffffff8144ab20 T ieee80211_ra_vht_intra_mode_ra_finished +ffffffff8144afc0 T ieee80211_ra_vht_trigger_next_rateset +ffffffff8144b030 T ieee80211_ra_vht_inter_mode_ra_finished +ffffffff8144b060 T ieee80211_ra_vht_best_rate +ffffffff8144b3d0 T ieee80211_ra_vht_probe_next_rate +ffffffff8144b480 T ieee80211_ra_vht_init_valid_rates +ffffffff8144b670 T ieee80211_ra_vht_probe_valid +ffffffff8144b6c0 T ieee80211_ra_vht_add_stats +ffffffff8144bb10 T ieee80211_ra_vht_choose +ffffffff8144bfe0 T ieee80211_ra_vht_node_init +ffffffff8144d000 T ieee80211_rssadapt_choose +ffffffff8144d0e0 T ieee80211_rssadapt_updatestats +ffffffff8144d170 T ieee80211_rssadapt_input +ffffffff8144d1b0 T ieee80211_rssadapt_lower_rate +ffffffff8144d230 T ieee80211_rssadapt_raise_rate +ffffffff8144e000 T bsearch +ffffffff8144e0b0 T ieee80211_regdomain_compare_cn +ffffffff8144e0d0 T ieee80211_regdomain_compare_rn +ffffffff8144e0f0 T ieee80211_name2countrycode +ffffffff8144e190 T ieee80211_name2regdomain +ffffffff8144e230 T ieee80211_countrycode2name +ffffffff8144e2c0 T ieee80211_regdomain2name +ffffffff8144e340 T ieee80211_regdomain2flag +ffffffff8144e400 T ieee80211_countrycode2regdomain +ffffffff8144f000 T arptimer +ffffffff8144f080 T arptfree +ffffffff8144f170 T arpinit +ffffffff8144f1f0 T arp_rtrequest +ffffffff8144f630 T arprequest +ffffffff8144f770 T arpinvalidate +ffffffff8144f7d0 T arpreply +ffffffff8144f8c0 T arpresolve +ffffffff8144fd30 T arppullup +ffffffff8144fde0 T arpinput +ffffffff8144fe40 T arpintr +ffffffff8144fef0 T in_arpinput +ffffffff81450310 T arplookup +ffffffff81450400 T arpcache +ffffffff81450780 T arpproxy +ffffffff81450860 T revarpinput +ffffffff814508b0 T in_revarpinput +ffffffff81450970 T revarprequest +ffffffff81450ab0 T revarpwhoarewe +ffffffff81450ca0 T revarpwhoami +ffffffff81451000 T igmp_init +ffffffff81451090 T rti_fill +ffffffff81451160 T rti_find +ffffffff81451240 T rti_delete +ffffffff814512d0 T igmp_input +ffffffff814513a0 T igmp_input_if +ffffffff81451b40 T igmp_joingroup +ffffffff81451c80 T igmp_sendpkt +ffffffff81451e00 T igmp_leavegroup +ffffffff81451e80 T igmp_fasttimo +ffffffff81451f10 T igmp_checktimer +ffffffff81451ff0 T igmp_slowtimo +ffffffff81452050 T igmp_sysctl +ffffffff81452170 T igmp_sysctl_igmpstat +ffffffff81453000 T in_canforward +ffffffff81453060 T in_socktrim +ffffffff814530c0 T in_mask2len +ffffffff814531b0 T in_len2mask +ffffffff81453270 T in_nam2sin +ffffffff814532d0 T in_sa2sin +ffffffff81453310 T in_control +ffffffff81453350 T in_ioctl +ffffffff814536b0 T in_ioctl_get +ffffffff81453820 T in_ioctl_set_ifaddr +ffffffff81453a00 T in_ioctl_change_ifaddr +ffffffff81453e00 T in_scrubhost +ffffffff81453e30 T in_addhost +ffffffff81453e60 T in_ifscrub +ffffffff81453f00 T in_ifinit +ffffffff814541a0 T in_purgeaddr +ffffffff814542a0 T in_remove_prefix +ffffffff81454310 T in_insert_prefix +ffffffff81454390 T in_addmulti +ffffffff81454540 T in_delmulti +ffffffff81454690 T in_broadcast +ffffffff81454720 T in_hasmulti +ffffffff814547c0 T in_ifdetach +ffffffff81454850 T in_prefixlen2mask +ffffffff81455000 T in_init +ffffffff81455060 T in_pcbhash +ffffffff81455170 T in_pcblhash +ffffffff81455210 T in_pcbinit +ffffffff814552c0 T in_baddynamic +ffffffff81455330 T in_rootonly +ffffffff814553b0 T in_pcballoc +ffffffff81455540 T in_pcbresize +ffffffff81455700 T in_pcbhash_insert +ffffffff814558b0 T in_pcbbind_locked +ffffffff81455ba0 T in_pcbaddrisavail_lock +ffffffff81455de0 T in_pcbpickport +ffffffff81456030 T in_pcbrehash +ffffffff814560a0 T in_pcbbind +ffffffff81456120 T in_pcblookup_local_lock +ffffffff814564d0 T in_pcbunref +ffffffff814565b0 T in_pcbaddrisavail +ffffffff814565d0 T in_pcbconnect +ffffffff814567d0 T in_pcbselsrc +ffffffff81456990 T in_pcblookup_lock +ffffffff81456b60 T in_pcbdisconnect +ffffffff81456bd0 T in_pcbdetach +ffffffff81456d10 T in_pcbref +ffffffff81456d60 T in_setsockaddr +ffffffff81456dd0 T in_setpeeraddr +ffffffff81456e40 T in_sockaddr +ffffffff81456ec0 T in_peeraddr +ffffffff81456f40 T in_pcbnotifyall +ffffffff814570c0 T in_losing +ffffffff81457150 T in_rtchange +ffffffff814571a0 T in_pcbrtentry +ffffffff81457210 T in_pcbhash_lookup +ffffffff81457390 T in_pcblookup +ffffffff814573e0 T in_pcblookup_listen +ffffffff81457610 T in_pcbset_rtableid +ffffffff81457700 T in_pcbset_laddr +ffffffff81457840 T in_pcbunset_faddr +ffffffff81457910 T in_pcbunset_laddr +ffffffff81458000 T inet_nat64_mask +ffffffff81458060 T inet_nat64 +ffffffff81458200 T inet_nat64_inet +ffffffff814582c0 T inet_nat64_inet6 +ffffffff814583a0 T inet_nat46 +ffffffff81458450 T inet_nat46_inet +ffffffff814584b0 T inet_nat46_inet6 +ffffffff81459000 T inet_ntop +ffffffff814590c0 t inet_ntop6 +ffffffff81459620 T sockaddr_ntop +ffffffff8145a000 T divert_attach +ffffffff8145a090 T divert_detach +ffffffff8145a0e0 T divert_lock +ffffffff8145a140 T divert_unlock +ffffffff8145a1a0 T divert_locked +ffffffff8145a210 T divert_bind +ffffffff8145a250 T divert_shutdown +ffffffff8145a290 T divert_send +ffffffff8145a2d0 T divert_init +ffffffff8145a320 T divert_output +ffffffff8145a540 T divert_packet +ffffffff8145a7d0 T divert_sysctl_divstat +ffffffff8145a880 T divert_sysctl +ffffffff8145b000 T icmp_init +ffffffff8145b080 T icmp_mtudisc_timeout +ffffffff8145b180 T icmp_do_error +ffffffff8145b4b0 T icmp_ratelimit +ffffffff8145b510 T icmp_error +ffffffff8145b590 T icmp_reflect +ffffffff8145b8b0 T icmp_send +ffffffff8145b990 T icmp_input +ffffffff8145ba30 T icmp_input_if +ffffffff8145c2f0 T iptime +ffffffff8145c390 T icmp_sysctl +ffffffff8145c540 T icmp_sysctl_icmpstat +ffffffff8145c640 T icmp_mtudisc_clone +ffffffff8145c7f0 T icmp_mtudisc +ffffffff8145c9d0 T icmp_do_exthdr +ffffffff8145d000 T ip_randomid +ffffffff8145e000 T ip_init +ffffffff8145e290 T ip_ours +ffffffff8145e3c0 T ip_fragcheck +ffffffff8145e6f0 T ip_deliver +ffffffff8145eab0 T ipintr +ffffffff8145ebd0 T ipv4_input +ffffffff8145ec50 T ip_input_if +ffffffff8145f0d0 T ipv4_check +ffffffff8145f3c0 T ip_dooptions +ffffffff8145f990 T in_ouraddr +ffffffff8145fc30 T ip_forward +ffffffff814600f0 T ip_flush +ffffffff81460200 T ip_reass +ffffffff814607b0 T ip_freef +ffffffff814608b0 t carp_strict_addr_chk +ffffffff81460930 T ip_slowtimo +ffffffff814609c0 T save_rte +ffffffff81460aa0 T ip_srcroute +ffffffff81460c00 T ip_stripoptions +ffffffff81460ca0 T ip_sysctl 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rip_detach +ffffffff81468170 T rip_lock +ffffffff814681d0 T rip_unlock +ffffffff81468230 T rip_locked +ffffffff814682a0 T rip_bind +ffffffff81468380 T rip_connect +ffffffff81468410 T rip_disconnect +ffffffff81468490 T rip_shutdown +ffffffff814684d0 T rip_send +ffffffff814685b0 T rip_init +ffffffff814685d0 T rip_input +ffffffff814689d0 T rip_output +ffffffff81468bb0 T rip_chkhdr +ffffffff81468cb0 T rip_ctloutput +ffffffff81469000 T tcp_trace +ffffffff8146a000 T tcp_reass +ffffffff8146a380 t tcpstat_pkt +ffffffff8146a3e0 T tcp_flush_queue +ffffffff8146a570 T tcp_input +ffffffff8146d6c0 T syn_cache_reset +ffffffff8146d830 T syn_cache_get +ffffffff8146df50 T syn_cache_add +ffffffff8146e5c0 T tcp_del_sackholes +ffffffff8146e680 T tcp_dooptions +ffffffff8146eb90 T tcp_xmit_timer +ffffffff8146ece0 t sb_notify +ffffffff8146ed50 t sbspace +ffffffff8146edb0 T tcp_clean_sackreport +ffffffff8146ee30 T tcp_mss +ffffffff8146f0b0 T tcp_sack_partialack +ffffffff8146f160 T tcp_newreno_partialack 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tcp_close +ffffffff81475c40 T tcp_freeq +ffffffff81475ce0 T tcp_rscale +ffffffff81475db0 T tcp_notify +ffffffff81475e60 T tcp6_ctlinput +ffffffff814760b0 T tcp_ctlinput +ffffffff814763b0 T tcp_mtudisc +ffffffff814764b0 T tcp_mtudisc_increase +ffffffff81476530 T tcp_set_iss_tsm +ffffffff81476690 T tcp_signature_tdb_attach +ffffffff814766c0 T tcp_signature_tdb_init +ffffffff81476760 T tcp_signature_tdb_zeroize +ffffffff814767d0 T tcp_signature_tdb_input +ffffffff81476820 T tcp_signature_tdb_output +ffffffff81476860 T tcp_signature_apply +ffffffff814768a0 T tcp_signature +ffffffff81477000 T tcp_timer_rexmt +ffffffff81477520 T tcp_timer_persist +ffffffff814776f0 T tcp_timer_keep +ffffffff81477930 T tcp_timer_2msl +ffffffff81477a90 T tcp_timer_reaper +ffffffff81477b00 T tcp_timer_delack +ffffffff81477bc0 T tcp_timer_init +ffffffff81477c60 T tcp_slowtimo +ffffffff81477ca0 T tcp_canceltimers +ffffffff81477d30 T tcp_timer_freesack +ffffffff81478000 T tcp_attach +ffffffff814781d0 T tcp_detach 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udp_disconnect +ffffffff8147b3f0 T udp_shutdown +ffffffff8147b430 T udp_send +ffffffff8147b520 T udp_init +ffffffff8147b560 T udp_input +ffffffff8147c320 T udp_sbappend +ffffffff8147c590 T udp_notify +ffffffff8147c5d0 T udp6_ctlinput +ffffffff8147c920 T udp_ctlinput +ffffffff8147ca80 T udp_output +ffffffff8147cef0 T udp_sysctl +ffffffff8147d110 T udp_sysctl_udpstat +ffffffff8147e000 T gre_send +ffffffff8147f000 T ipsp_ids_gc +ffffffff8147f120 T ipsp_init +ffffffff8147f200 T tdb_hash +ffffffff8147f320 T reserve_spi +ffffffff8147f590 T tdb_alloc +ffffffff8147f6a0 T gettdb_dir +ffffffff8147f7e0 T tdb_unref +ffffffff8147f830 T puttdb +ffffffff8147f870 T tdb_ref +ffffffff8147f8c0 T gettdbbysrcdst_dir +ffffffff8147fad0 T ipsp_aux_match +ffffffff8147fb80 T ipsp_ids_match +ffffffff8147fbb0 T gettdbbydst +ffffffff8147fd30 T gettdbbysrc +ffffffff8147feb0 T tdb_hashstats +ffffffff81480290 T tdb_printit +ffffffff81480ab0 T ipsp_address +ffffffff81480b20 T tdb_walk +ffffffff81480cc0 T tdb_timeout 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Xresume_ioapic_edge21 +ffffffff815f8250 T Xintr_ioapic_edge21_untramp +ffffffff815f8470 T Xrecurse_ioapic_edge22 +ffffffff815f84f0 T Xresume_ioapic_edge22 +ffffffff815f8520 T Xintr_ioapic_edge22_untramp +ffffffff815f8740 T Xrecurse_ioapic_edge23 +ffffffff815f87c0 T Xresume_ioapic_edge23 +ffffffff815f87f0 T Xintr_ioapic_edge23_untramp +ffffffff815f8a10 T Xrecurse_ioapic_edge24 +ffffffff815f8a90 T Xresume_ioapic_edge24 +ffffffff815f8ac0 T Xintr_ioapic_edge24_untramp +ffffffff815f8ce0 T Xrecurse_ioapic_edge25 +ffffffff815f8d60 T Xresume_ioapic_edge25 +ffffffff815f8d90 T Xintr_ioapic_edge25_untramp +ffffffff815f8fb0 T Xrecurse_ioapic_edge26 +ffffffff815f9030 T Xresume_ioapic_edge26 +ffffffff815f9060 T Xintr_ioapic_edge26_untramp +ffffffff815f9280 T Xrecurse_ioapic_edge27 +ffffffff815f9300 T Xresume_ioapic_edge27 +ffffffff815f9330 T Xintr_ioapic_edge27_untramp +ffffffff815f9550 T Xrecurse_ioapic_edge28 +ffffffff815f95d0 T Xresume_ioapic_edge28 +ffffffff815f9600 T Xintr_ioapic_edge28_untramp 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Xresume_ioapic_edge36 +ffffffff815facd0 T Xintr_ioapic_edge36_untramp +ffffffff815faf00 T Xrecurse_ioapic_edge37 +ffffffff815faf80 T Xresume_ioapic_edge37 +ffffffff815fafb0 T Xintr_ioapic_edge37_untramp +ffffffff815fb1e0 T Xrecurse_ioapic_edge38 +ffffffff815fb260 T Xresume_ioapic_edge38 +ffffffff815fb290 T Xintr_ioapic_edge38_untramp +ffffffff815fb4c0 T Xrecurse_ioapic_edge39 +ffffffff815fb540 T Xresume_ioapic_edge39 +ffffffff815fb570 T Xintr_ioapic_edge39_untramp +ffffffff815fb7a0 T Xrecurse_ioapic_edge40 +ffffffff815fb820 T Xresume_ioapic_edge40 +ffffffff815fb850 T Xintr_ioapic_edge40_untramp +ffffffff815fba80 T Xrecurse_ioapic_edge41 +ffffffff815fbb00 T Xresume_ioapic_edge41 +ffffffff815fbb30 T Xintr_ioapic_edge41_untramp +ffffffff815fbd60 T Xrecurse_ioapic_edge42 +ffffffff815fbde0 T Xresume_ioapic_edge42 +ffffffff815fbe10 T Xintr_ioapic_edge42_untramp +ffffffff815fc040 T Xrecurse_ioapic_edge43 +ffffffff815fc0c0 T Xresume_ioapic_edge43 +ffffffff815fc0f0 T Xintr_ioapic_edge43_untramp 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Xresume_ioapic_edge51 +ffffffff815fd7f0 T Xintr_ioapic_edge51_untramp +ffffffff815fda20 T Xrecurse_ioapic_edge52 +ffffffff815fdaa0 T Xresume_ioapic_edge52 +ffffffff815fdad0 T Xintr_ioapic_edge52_untramp +ffffffff815fdd00 T Xrecurse_ioapic_edge53 +ffffffff815fdd80 T Xresume_ioapic_edge53 +ffffffff815fddb0 T Xintr_ioapic_edge53_untramp +ffffffff815fdfe0 T Xrecurse_ioapic_edge54 +ffffffff815fe060 T Xresume_ioapic_edge54 +ffffffff815fe090 T Xintr_ioapic_edge54_untramp +ffffffff815fe2c0 T Xrecurse_ioapic_edge55 +ffffffff815fe340 T Xresume_ioapic_edge55 +ffffffff815fe370 T Xintr_ioapic_edge55_untramp +ffffffff815fe5a0 T Xrecurse_ioapic_edge56 +ffffffff815fe620 T Xresume_ioapic_edge56 +ffffffff815fe650 T Xintr_ioapic_edge56_untramp +ffffffff815fe880 T Xrecurse_ioapic_edge57 +ffffffff815fe900 T Xresume_ioapic_edge57 +ffffffff815fe930 T Xintr_ioapic_edge57_untramp +ffffffff815feb60 T Xrecurse_ioapic_edge58 +ffffffff815febe0 T Xresume_ioapic_edge58 +ffffffff815fec10 T Xintr_ioapic_edge58_untramp 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Xresume_ioapic_level2 +ffffffff816004d0 T Xintr_ioapic_level2_untramp +ffffffff816007e0 T Xrecurse_ioapic_level3 +ffffffff81600860 T Xresume_ioapic_level3 +ffffffff81600890 T Xintr_ioapic_level3_untramp +ffffffff81600ba0 T Xrecurse_ioapic_level4 +ffffffff81600c20 T Xresume_ioapic_level4 +ffffffff81600c50 T Xintr_ioapic_level4_untramp +ffffffff81600f60 T Xrecurse_ioapic_level5 +ffffffff81600fe0 T Xresume_ioapic_level5 +ffffffff81601010 T Xintr_ioapic_level5_untramp +ffffffff81601320 T Xrecurse_ioapic_level6 +ffffffff816013a0 T Xresume_ioapic_level6 +ffffffff816013d0 T Xintr_ioapic_level6_untramp +ffffffff816016e0 T Xrecurse_ioapic_level7 +ffffffff81601760 T Xresume_ioapic_level7 +ffffffff81601790 T Xintr_ioapic_level7_untramp +ffffffff81601aa0 T Xrecurse_ioapic_level8 +ffffffff81601b20 T Xresume_ioapic_level8 +ffffffff81601b50 T Xintr_ioapic_level8_untramp +ffffffff81601e60 T Xrecurse_ioapic_level9 +ffffffff81601ee0 T Xresume_ioapic_level9 +ffffffff81601f10 T Xintr_ioapic_level9_untramp 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x86_bus_space_io_read_region_1 +ffffffff816141d0 T x86_bus_space_io_read_region_2 +ffffffff81614210 T x86_bus_space_io_read_region_4 +ffffffff81614250 T x86_bus_space_io_read_region_8 +ffffffff81614270 T x86_bus_space_io_write_1 +ffffffff816142a0 T x86_bus_space_io_write_2 +ffffffff816142d0 T x86_bus_space_io_write_4 +ffffffff81614300 T x86_bus_space_io_write_8 +ffffffff81614320 T x86_bus_space_io_write_multi_1 +ffffffff81614360 T x86_bus_space_io_write_multi_2 +ffffffff816143a0 T x86_bus_space_io_write_multi_4 +ffffffff816143e0 T x86_bus_space_io_write_multi_8 +ffffffff81614400 T x86_bus_space_io_write_region_1 +ffffffff81614440 T x86_bus_space_io_write_region_2 +ffffffff81614480 T x86_bus_space_io_write_region_4 +ffffffff816144c0 T x86_bus_space_io_write_region_8 +ffffffff816144e0 T x86_bus_space_io_set_multi_1 +ffffffff81614530 T x86_bus_space_io_set_multi_2 +ffffffff81614580 T x86_bus_space_io_set_multi_4 +ffffffff816145d0 T x86_bus_space_io_set_multi_8 +ffffffff816145f0 T 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hv_channel_ring_create +ffffffff816a6230 T hv_handle_alloc +ffffffff816a6910 T hv_channel_ring_destroy +ffffffff816a6a40 T hv_handle_free +ffffffff816a6ac0 T hv_channel_open +ffffffff816a6d40 T hv_channel_close +ffffffff816a6f60 T hv_channel_intr +ffffffff816a7080 T hv_channel_ready +ffffffff816a70d0 T hv_channel_unpause +ffffffff816a7130 T hv_channel_pause +ffffffff816a7170 T hv_channel_setdeferred +ffffffff816a71f0 T hv_ring_write +ffffffff816a7470 T hv_channel_send +ffffffff816a7630 T hv_channel_send_sgl +ffffffff816a7830 T hv_channel_send_prpl +ffffffff816a7a40 T hv_ring_peek +ffffffff816a7b20 T hv_ring_read +ffffffff816a7c50 T hv_channel_recv +ffffffff816a7f40 t hv_attach_print +ffffffff816a7f90 T hv_evcount_attach +ffffffff816a8000 T hv_attach_icdevs +ffffffff816a81b0 T hv_heartbeat_attach +ffffffff816a8240 T hv_heartbeat +ffffffff816a8440 T hv_shutdown_attach +ffffffff816a84e0 t hv_shutdown_task +ffffffff816a84f0 T hv_shutdown +ffffffff816a8740 T hv_timesync_attach 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qle_get_port_db +ffffffff81721300 T qle_get_port_name_list +ffffffff81721560 T qle_add_loop_port +ffffffff817217e0 T qle_add_fabric_port +ffffffff817219a0 T qle_add_logged_in_port +ffffffff81721bf0 T qle_handle_resp +ffffffff81721fa0 T qle_dump_iocb +ffffffff81721fd0 T qle_async +ffffffff817221f0 T qle_read +ffffffff81722240 T qle_write +ffffffff81722290 T qle_clear_isr +ffffffff817222e0 T qle_put_marker +ffffffff81722320 T qle_put_cmd +ffffffff81722660 T qle_write_mbox +ffffffff817226b0 T qle_set_ints +ffffffff81722710 T qle_update_done +ffffffff81722740 T qle_update_cancel +ffffffff81722790 T qle_update_start +ffffffff817227e0 T qle_update_defer +ffffffff81722830 T qle_clear_port_lists +ffffffff81722990 T qle_update_topology +ffffffff81722a70 T qle_update_fabric +ffffffff81722b80 T qle_ct_pass_through +ffffffff81722e70 T qle_sge +ffffffff81722eb0 T qle_next_fabric_port +ffffffff81723020 T qle_fabric_plogx +ffffffff817232b0 T qle_fabric_plogi +ffffffff81723420 T qle_fabric_plogo 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mpii_portfacts +ffffffff81727220 T mpii_target_map +ffffffff81727310 T mpii_cfg_coalescing +ffffffff817273e0 T mpii_eventnotify +ffffffff817275b0 T mpii_portenable +ffffffff817276a0 T mpii_intr +ffffffff81727af0 T mpii_ioctl +ffffffff81727c00 T mpii_create_sensors +ffffffff81727d90 T mpii_dmamem_free +ffffffff81727e20 T mpii_get_ccb +ffffffff81727eb0 T mpii_reply +ffffffff81727f80 T mpii_event_process +ffffffff81728230 T mpii_load_xs_sas3 +ffffffff817283d0 T mpii_load_xs +ffffffff817285c0 T mpii_req_cfg_header +ffffffff81728780 T mpii_req_cfg_page +ffffffff817289d0 T mpii_wait_ne +ffffffff81728ae0 T mpii_reset_soft +ffffffff81728d10 T mpii_reset_hard +ffffffff81728ff0 T mpii_handshake_send +ffffffff817293f0 T mpii_handshake_recv_dword +ffffffff817296a0 T mpii_handshake_recv +ffffffff81729900 T mpii_empty_done +ffffffff81729930 T mpii_push_reply +ffffffff817299b0 T mpii_poll +ffffffff81729b90 T mpii_eventack +ffffffff81729d80 T mpii_eventack_done +ffffffff81729e00 T mpii_start +ffffffff81729ed0 T mpii_event_sas +ffffffff8172a2e0 T mpii_eventnotify_done +ffffffff8172a320 T mpii_event_raid +ffffffff8172a650 T mpii_find_dev +ffffffff8172a6b0 T mpii_insert_dev +ffffffff8172a730 T mpii_remove_dev +ffffffff8172a7b0 T mpii_event_discovery +ffffffff8172a810 T mpii_sas_remove_device +ffffffff8172a9d0 T mpii_event_done +ffffffff8172aa90 T mpii_wait +ffffffff8172ac00 T mpii_dmamem_alloc +ffffffff8172ada0 T mpii_scsi_cmd_tmo_handler +ffffffff8172af00 T mpii_put_ccb +ffffffff8172afa0 T mpii_poll_done +ffffffff8172afd0 T mpii_wait_done +ffffffff8172b010 T mpii_scsi_cmd_done +ffffffff8172b280 T mpii_scsi_cmd_tmo +ffffffff8172b380 T mpii_scsi_cmd_tmo_done +ffffffff8172b3a0 T mpii_ioctl_cache +ffffffff8172b5f0 T mpii_ioctl_inq +ffffffff8172b6a0 T mpii_ioctl_vol +ffffffff8172b930 T mpii_ioctl_disk +ffffffff8172bb10 T mpii_find_vol +ffffffff8172bb60 T mpii_bio_hs +ffffffff8172bd30 T mpii_bio_disk +ffffffff8172bf80 T mpii_bio_volstate +ffffffff8172c120 T mpii_refresh_sensors +ffffffff8172d000 T sili_pci_match +ffffffff8172d0a0 T sili_pci_attach +ffffffff8172d3a0 T sili_pci_detach +ffffffff8172d450 T sili_pci_activate +ffffffff8172d490 T sili_lookup +ffffffff8172e000 T aq_fw1x_reset +ffffffff8172e050 T aq1_get_mac_addr +ffffffff8172e130 T aq_fw1x_set_mode +ffffffff8172e160 T aq_fw1x_get_mode +ffffffff8172e190 T aq_fw1x_get_stats +ffffffff8172e1c0 T aq_fw2x_reset +ffffffff8172e250 T aq_fw2x_set_mode +ffffffff8172e3f0 T aq_fw2x_get_mode +ffffffff8172e580 T aq_fw2x_get_stats +ffffffff8172e5b0 T aq2_fw_reset +ffffffff8172e740 T aq2_get_mac_addr +ffffffff8172e7e0 T aq2_fw_set_mode +ffffffff8172e9f0 T aq2_fw_get_mode +ffffffff8172eac0 T aq2_fw_get_stats +ffffffff8172eaf0 T aq_match +ffffffff8172eb20 T aq_attach +ffffffff8172f770 T aq_activate +ffffffff8172f7a0 T aq_lookup +ffffffff8172f820 T aq_intr +ffffffff8172f9b0 T aq_intr_link +ffffffff8172fac0 T aq1_fw_reboot +ffffffff8172fd10 T aq2_fw_reboot +ffffffff81730160 T aq_hw_reset +ffffffff817302c0 T aq_init_rss +ffffffff81730630 T aq_hw_init +ffffffff81730940 T aq_ifmedia_change +ffffffff81730a30 T aq_ifmedia_status +ffffffff81730b30 T aq_ioctl +ffffffff81730d70 T aq_start +ffffffff817310c0 T aq_watchdog +ffffffff817310f0 T aq_set_linkmode +ffffffff81731120 T aq_refill +ffffffff81731190 T aq_intr_queue +ffffffff81731270 T aq_enable_intr +ffffffff81731390 T aq1_fw_read_version +ffffffff81731430 T aq1_mac_soft_reset +ffffffff81731460 T aq1_fw_version_init +ffffffff817315e0 T aq1_hw_init_ucp +ffffffff81731760 T aq1_mac_soft_reset_rbl +ffffffff81731a00 T aq1_global_software_reset +ffffffff81731b20 T aq1_mac_soft_reset_flb +ffffffff81731ed0 T aq2_interface_buffer_read +ffffffff81732010 T aq1_fw_downld_dwords +ffffffff81732330 T aq_hw_l3_filter_set +ffffffff81732540 T aq_hw_init_tx_path +ffffffff817327b0 T aq_hw_init_rx_path +ffffffff81732fc0 T aq_set_mac_addr +ffffffff817331d0 T aq_hw_qos_set +ffffffff817338c0 T aq2_filter_art_set +ffffffff81733a70 T aq_get_linkmode +ffffffff81733ae0 T aq_txring_reset +ffffffff81733e90 T aq_rxring_reset +ffffffff81734390 T aq_rx_fill +ffffffff817345a0 T aq_rxeof +ffffffff81734920 T aq_txeof +ffffffff81734b00 T aq_update_link_status +ffffffff81734ba0 T aq_free_slots +ffffffff81734c40 T aq_queue_up +ffffffff81735020 T aq_dmamem_alloc +ffffffff81735170 T aq_dmamem_free +ffffffff817351e0 T aq_queue_down +ffffffff81735490 T aq_invalidate_rx_desc_cache +ffffffff81735510 T aq_up +ffffffff81735930 T aq_down +ffffffff81735a90 T aq_rxrinfo +ffffffff81735b80 T aq_iff +ffffffff81736000 T tulip_probe +ffffffff81736060 T tulip_attach +ffffffff81736a80 T tulip_timeout_callback +ffffffff81736ad0 T tulip_timeout +ffffffff81736b40 T tulip_txprobe +ffffffff81736c80 T tulip_txput +ffffffff817371f0 T tulip_media_set +ffffffff817377f0 T tulip_reset +ffffffff81737bb0 T tulip_mii_autonegotiate +ffffffff81737eb0 T tulip_mii_readreg +ffffffff81738060 T tulip_mii_writereg +ffffffff81738220 T tulip_linkup +ffffffff817382f0 T tulip_init +ffffffff81738470 T tulip_media_print +ffffffff817384c0 T tulip_media_link_monitor +ffffffff817386f0 T tulip_mii_map_abilities +ffffffff81738780 T tulip_media_poll +ffffffff81738c60 T tulip_mii_phy_readspecific +ffffffff81738e20 T tulip_media_select +ffffffff81738f30 T tulip_21040_mediainfo_init +ffffffff81739030 T tulip_21040_media_probe +ffffffff81739120 T tulip_21040_10baset_only_media_probe +ffffffff817391e0 T tulip_21040_10baset_only_media_select +ffffffff81739240 T tulip_21040_auibnc_only_media_probe +ffffffff817392d0 T tulip_21040_auibnc_only_media_select +ffffffff81739320 T tulip_21041_mediainfo_init +ffffffff817393e0 T tulip_21041_media_probe +ffffffff817394c0 T tulip_21041_media_poll +ffffffff817397f0 T tulip_mii_get_phyaddr +ffffffff817398b0 T tulip_2114x_media_preset +ffffffff81739ad0 T tulip_null_media_poll +ffffffff81739b00 T tulip_21140_mediainit +ffffffff81739b50 T tulip_21140_evalboard_media_probe +ffffffff81739d30 T tulip_21140_accton_media_probe +ffffffff81739f50 T tulip_21140_smc9332_media_probe +ffffffff8173a170 T tulip_21140_cogent_em100_media_probe +ffffffff8173a2e0 T tulip_21140_znyx_zx34x_media_probe +ffffffff8173a530 T tulip_2114x_media_probe +ffffffff8173a560 T tulip_delay_300ns +ffffffff8173a670 T tulip_srom_idle +ffffffff8173b010 T tulip_srom_read +ffffffff8173bdb0 T tulip_mii_writebits +ffffffff8173c340 T tulip_mii_turnaround +ffffffff8173cb10 T tulip_mii_readbits +ffffffff8173cef0 T tulip_identify_dec_nic +ffffffff8173cfa0 T tulip_identify_znyx_nic +ffffffff8173d2a0 T tulip_identify_smc_nic +ffffffff8173d470 T tulip_identify_cogent_nic +ffffffff8173d560 T tulip_identify_accton_nic +ffffffff8173d690 T tulip_identify_asante_nic +ffffffff8173d960 T tulip_identify_compex_nic +ffffffff8173dab0 T tulip_srom_decode +ffffffff8173e6e0 T tulip_read_macaddr +ffffffff8173f050 T tulip_ifmedia_add +ffffffff8173f140 T tulip_ifmedia_change +ffffffff8173f320 T tulip_ifmedia_status +ffffffff8173f390 T tulip_alloc_rxmap +ffffffff8173f3d0 T tulip_free_rxmap +ffffffff8173f410 T tulip_alloc_txmap +ffffffff8173f450 T tulip_free_txmap +ffffffff8173f490 T tulip_addr_filter +ffffffff8173f7e0 T tulip_rx_intr +ffffffff8173fe00 T tulip_txput_setup +ffffffff817400b0 T tulip_tx_intr +ffffffff817404b0 T tulip_print_abnormal_interrupt +ffffffff817404e0 T tulip_intr_handler +ffffffff81740870 T tulip_ifstart +ffffffff81740940 T tulip_intr_shared +ffffffff817409b0 T tulip_intr_normal +ffffffff81740a00 T tulip_ifioctl +ffffffff81740b00 T tulip_ifwatchdog +ffffffff81740c00 T tulip_busdma_allocmem +ffffffff81740d90 T tulip_busdma_init +ffffffff81740fb0 T tulip_initcsrs +ffffffff817410b0 T tulip_initring +ffffffff81742000 T ep_pci_match +ffffffff81742030 T ep_pci_attach +ffffffff81743000 T pcn_match +ffffffff81743070 T pcn_attach +ffffffff817437c0 T pcn_tick +ffffffff81743810 T pcn_reset +ffffffff81743880 T pcn_intr +ffffffff81743af0 T pcn_ioctl +ffffffff81743c50 T pcn_start +ffffffff817440a0 T pcn_watchdog +ffffffff81744110 T pcn_txintr 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+ffffffff81748260 T svwsata_lba48_write_reg +ffffffff817482b0 T pciide_pci_read +ffffffff81748300 T pciide_pci_write +ffffffff81748370 T default_chip_map +ffffffff817489d0 T artisea_chip_map +ffffffff81748c70 T piix_chip_map +ffffffff817492b0 T piixsata_chip_map +ffffffff817497f0 T sch_chip_map +ffffffff81749b50 T amd756_chip_map +ffffffff81749fb0 T ixp_chip_map +ffffffff8174a360 T cmd_chip_map +ffffffff8174a4c0 T cmd0643_9_chip_map +ffffffff8174a7b0 T cmd680_chip_map +ffffffff8174a990 T sii3112_chip_map +ffffffff8174ad20 T sii3114_chip_map +ffffffff8174b260 T apollo_chip_map +ffffffff8174b900 T sata_chip_map +ffffffff8174bb20 T cy693_chip_map +ffffffff8174bef0 T sis_chip_map +ffffffff8174c690 T natsemi_chip_map +ffffffff8174cb30 T ns_scx200_chip_map +ffffffff8174cf00 T acer_chip_map +ffffffff8174d5c0 T hpt_chip_map +ffffffff8174dae0 T pdc202xx_chip_map +ffffffff8174e4e0 T pdcsata_chip_map +ffffffff8174eca0 T acard_chip_map +ffffffff8174ef30 T serverworks_chip_map +ffffffff8174f280 T svwsata_chip_map +ffffffff8174f650 T nforce_chip_map +ffffffff8174fac0 T ite_chip_map +ffffffff8174fd80 T jmicron_chip_map +ffffffff81750190 T phison_chip_map +ffffffff817504f0 T rdc_chip_map +ffffffff81750980 T pciide_match +ffffffff81750a20 T pciide_attach +ffffffff81750b00 T pciide_detach +ffffffff81750b60 T pciide_activate +ffffffff81751290 T pciide_lookup_product +ffffffff81751540 T pciide_dmacmd_read +ffffffff81751570 T pciide_dmacmd_write +ffffffff817515a0 T pciide_dmactl_read +ffffffff817515d0 T pciide_dmactl_write +ffffffff81751600 T pciide_dmatbl_write +ffffffff81751630 T pciide_mapregs_compat +ffffffff817517b0 T pciide_unmapregs_compat +ffffffff81751840 T pciide_mapregs_native +ffffffff81751b30 T pciide_unmapregs_native +ffffffff81751bc0 T pciide_mapreg_dma +ffffffff81751d50 T pciide_dma_init +ffffffff81751ff0 T pciide_dma_start +ffffffff81752070 T pciide_dma_finish +ffffffff81752240 T pciide_unmapreg_dma +ffffffff81752270 T pciide_intr_flag +ffffffff81752480 T pciide_compat_intr +ffffffff81752500 T pciide_pci_intr +ffffffff817525c0 T pciide_channel_dma_setup +ffffffff81752690 T pciide_dma_table_setup +ffffffff817528e0 T pciide_irqack +ffffffff81752930 T pciide_chansetup +ffffffff81752a10 T pciide_chanfree +ffffffff81752a60 T pciide_mapchan +ffffffff81752af0 T pciide_unmap_chan +ffffffff81752bc0 T pciide_chan_candisable +ffffffff81752c30 T pciide_map_compat_intr +ffffffff81752ce0 T pciide_unmap_compat_intr +ffffffff81752d40 T pciide_print_channels +ffffffff81752e10 T pciide_print_modes +ffffffff81752e20 T default_chip_unmap +ffffffff81752f00 T sata_setup_channel +ffffffff81753020 T piix_timing_debug +ffffffff81753050 T piix_setup_channel +ffffffff81753540 T piix3_4_setup_channel +ffffffff81753d40 T piix_setup_idetim_timings +ffffffff81753db0 T piix_setup_idetim_drvs +ffffffff81753ec0 T piix_setup_sidetim_timings +ffffffff81753f30 T amd756_setup_channel +ffffffff817542e0 T apollo_setup_channel +ffffffff81754630 T cmd_channel_map +ffffffff81754970 T cmd_pci_intr +ffffffff81754a80 T cmd646_9_irqack +ffffffff81754b80 T cmd0643_9_setup_channel +ffffffff81754fb0 T cmd680_setup_channel +ffffffff817554a0 T cmd680_channel_map +ffffffff817557a0 T sii_fixup_cacheline +ffffffff81755a70 T sii3112_setup_channel +ffffffff81755c30 T sii3112_drv_probe +ffffffff81755f80 T sii3114_mapreg_dma +ffffffff81756240 T sii3114_chansetup +ffffffff81756300 T sii3114_mapchan +ffffffff817565f0 T sii3114_dmacmd_read +ffffffff81756630 T sii3114_dmacmd_write +ffffffff81756670 T sii3114_dmactl_read +ffffffff817566b0 T sii3114_dmactl_write +ffffffff817566f0 T sii3114_dmatbl_write +ffffffff81756730 T cy693_setup_channel +ffffffff81756950 T sis_hostbr_match +ffffffff81756a20 T sis_south_match +ffffffff81756a60 T sis_setup_channel +ffffffff81756db0 T sis96x_setup_channel +ffffffff81757060 T natsemi_irqack +ffffffff817570f0 T natsemi_setup_channel +ffffffff817574e0 T natsemi_pci_intr +ffffffff817575d0 T ns_scx200_setup_channel +ffffffff817578b0 T acer_dma_init +ffffffff817578f0 T acer_setup_channel +ffffffff81757d00 T acer_pci_intr +ffffffff81757de0 T hpt_setup_channel +ffffffff81758130 T hpt_pci_intr +ffffffff81758240 T pdc268_config_read +ffffffff817582b0 T pdc20268_setup_channel +ffffffff81758480 T pdc202xx_setup_channel +ffffffff817588d0 T pdc20262_dma_start +ffffffff81758a30 T pdc20262_dma_finish +ffffffff81758b00 T pdc20265_pci_intr +ffffffff81758cb0 T pdc202xx_pci_intr +ffffffff81758dc0 T pdc203xx_pci_intr +ffffffff81758eb0 T pdc205xx_pci_intr +ffffffff81758fe0 T pdc203xx_irqack +ffffffff81759070 T pdc203xx_setup_channel +ffffffff81759170 T pdc205xx_do_reset +ffffffff81759210 T pdc205xx_drv_probe +ffffffff81759490 T pdc203xx_dma_start +ffffffff81759550 T pdc203xx_dma_finish +ffffffff81759640 T serverworks_setup_channel +ffffffff81759a50 T serverworks_pci_intr +ffffffff81759b60 T svwsata_mapreg_dma +ffffffff81759c10 T svwsata_drv_probe +ffffffff81759ee0 T svwsata_mapchan +ffffffff81759fd0 T svwsata_dmacmd_read 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em_allocate_transmit_structures +ffffffff81781400 T em_get_buf +ffffffff81781560 T em_allocate_receive_structures +ffffffff81781730 T em_rxfill +ffffffff81781860 T em_tbi_adjust_stats +ffffffff81781a30 T em_receive_checksum +ffffffff81781aa0 T em_write_pci_cfg +ffffffff81781b10 T em_read_pci_cfg +ffffffff81781b80 T em_read_pcie_cap_reg +ffffffff81781bb0 T em_flush_tx_ring +ffffffff81781d20 T em_flush_rx_ring +ffffffff81781ee0 T em_queue_intr_msix +ffffffff81781f90 T em_link_intr_msix +ffffffff817820c0 T em_enable_queue_intr_msix +ffffffff81783000 T em_set_mac_type +ffffffff81783a20 T em_set_sfp_media_type_82575 +ffffffff81783d70 T em_translate_82542_register +ffffffff81783fa0 T em_read_sfp_data_byte +ffffffff81784090 T em_set_media_type +ffffffff81784300 T em_reset_hw +ffffffff81784eb0 T em_disable_pciex_master +ffffffff81784f80 T em_check_phy_reset_block +ffffffff81785040 T em_gate_hw_phy_config_ich8lan +ffffffff817850e0 t em_get_software_flag +ffffffff81785260 T em_hv_phy_workarounds_ich8lan +ffffffff817855f0 T em_lv_phy_workarounds_ich8lan +ffffffff817856f0 t em_phy_init_script +ffffffff81785950 T em_read_eeprom +ffffffff81785fc0 T em_set_eee_i350 +ffffffff817860e0 T em_init_hw +ffffffff81787b20 T em_phy_reset +ffffffff81787d10 T em_clear_vfta_i350 +ffffffff81787ef0 T em_read_phy_reg +ffffffff817880a0 T em_setup_link +ffffffff8178a340 T em_enable_tx_pkt_filtering +ffffffff8178a700 T em_clear_hw_cntrs +ffffffff8178aff0 T em_write_phy_reg +ffffffff8178b170 T em_power_up_serdes_link_82575 +ffffffff8178b260 T em_copper_link_autoneg +ffffffff8178b390 T em_phy_setup_autoneg +ffffffff8178b4f0 T em_copper_link_postconfig +ffffffff8178b5c0 T em_config_collision_dist +ffffffff8178b650 t em_config_mac_to_phy +ffffffff8178b7c0 t em_config_fc_after_link_up +ffffffff8178ba10 t em_config_dsp_after_link_change +ffffffff8178c3b0 T em_force_mac_fc +ffffffff8178c480 T em_check_for_link +ffffffff8178cb00 T em_get_pcs_speed_and_duplex_82575 +ffffffff8178cbc0 T em_k1_gig_workaround_hv +ffffffff8178ccf0 T em_link_stall_workaround_hv +ffffffff8178cdd0 T em_k1_workaround_lv +ffffffff8178ce90 T em_k1_workaround_lpt_lp +ffffffff8178d150 t em_check_downshift +ffffffff8178d200 T em_set_eee_pchlan +ffffffff8178d2a0 t em_polarity_reversal_workaround +ffffffff8178d4e0 T em_get_speed_and_duplex +ffffffff8178d990 T em_access_phy_wakeup_reg_bm +ffffffff8178daf0 t em_write_phy_reg_ex +ffffffff8178dd60 t em_read_phy_reg_ex +ffffffff8178e210 T em_access_phy_debug_regs_hv +ffffffff8178e2e0 T em_access_phy_reg_hv +ffffffff8178e450 t em_swfw_sync_acquire +ffffffff8178e600 t em_swfw_sync_release +ffffffff8178e770 T em_sgmii_uses_mdio_82575 +ffffffff8178e7d0 T em_read_phy_reg_i2c +ffffffff8178e8b0 T em_write_phy_reg_i2c +ffffffff8178e980 T em_phy_hw_reset +ffffffff8178ef90 T em_oem_bits_config_pchlan +ffffffff8178f100 T em_initialize_M88E1512_phy +ffffffff8178f2c0 T em_init_eeprom_params +ffffffff8178f7d0 T em_get_flash_presence_i210 +ffffffff8178f830 t em_acquire_eeprom +ffffffff8178fa20 t em_read_eeprom_ich8 +ffffffff8178fbf0 t em_release_eeprom +ffffffff8178fd60 t em_standby_eeprom +ffffffff8178ff50 t em_shift_out_ee_bits +ffffffff817900f0 t em_shift_in_ee_bits +ffffffff81790230 T em_validate_eeprom_checksum +ffffffff817903d0 T em_write_eeprom +ffffffff817906f0 T em_update_eeprom_checksum +ffffffff81790810 t em_commit_shadow_ram +ffffffff81790d70 t em_write_eeprom_microwire +ffffffff81790ef0 t em_write_eeprom_spi +ffffffff817910b0 T em_read_part_num +ffffffff81791150 T em_read_mac_addr +ffffffff817912d0 T em_mc_addr_list_update +ffffffff817913e0 T em_hash_mc_addr +ffffffff817914e0 T em_mta_set +ffffffff81791650 T em_rar_set +ffffffff81791780 T em_get_bus_info +ffffffff81791910 T em_check_mng_mode +ffffffff81791990 T em_valid_nvm_bank_detect_ich8lan +ffffffff81791b40 T em_read_eeprom_spt +ffffffff81791e00 t em_release_software_flag +ffffffff81791eb0 T em_read_ich8_data32 +ffffffff81792020 t em_ich8_cycle_init +ffffffff817921c0 t em_ich8_flash_cycle +ffffffff81792310 T em_configure_k1_ich8lan +ffffffff81792530 t em_toggle_lanphypc_pch_lpt +ffffffff81792690 t em_copper_link_ggp_setup +ffffffff81792940 t em_copper_link_82580_setup +ffffffff817929d0 t em_copper_link_rtl8211_setup +ffffffff81792c60 t em_phy_reset_dsp +ffffffff81792ce0 t em_get_hw_eeprom_semaphore +ffffffff81792e50 t em_shift_out_mdi_bits +ffffffff81792fe0 t em_erase_ich8_4k_segment +ffffffff81793220 t em_write_ich8_byte +ffffffff81793390 t em_read_ich8_data +ffffffff81794000 T em_lookup_gcu +ffffffff81794030 T em_attach_miibus +ffffffff81794060 T gcu_miibus_readreg +ffffffff817941d0 T gcu_miibus_writereg +ffffffff81794320 T gcu_miibus_statchg +ffffffff81795000 T ixgb_probe +ffffffff81795030 T ixgb_attach +ffffffff81795470 T ixgb_local_timer +ffffffff81795520 T ixgb_identify_hardware +ffffffff81795620 T ixgb_allocate_pci_resources +ffffffff817957b0 T ixgb_dma_malloc +ffffffff817959b0 T ixgb_hardware_init +ffffffff81795a70 T ixgb_setup_interface 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ixgb_free_receive_structures +ffffffff817986e0 T ixgb_allocate_transmit_structures +ffffffff81798760 T ixgb_transmit_checksum_setup +ffffffff81798860 T ixgb_get_buf +ffffffff81798a10 T ixgb_allocate_receive_structures +ffffffff81798b90 T ixgb_receive_checksum +ffffffff81798bf0 T ixgb_write_pci_cfg +ffffffff81799000 T ixgb_validate_eeprom_checksum +ffffffff81799080 T ixgb_read_eeprom +ffffffff817992f0 T ixgb_update_eeprom_checksum +ffffffff81799350 T ixgb_write_eeprom +ffffffff81799830 t ixgb_shift_out_bits +ffffffff81799970 T ixgb_get_eeprom_data +ffffffff81799a10 T ixgb_get_eeprom_word +ffffffff81799ae0 T ixgb_get_ee_mac_addr +ffffffff81799be0 T ixgb_get_ee_pba_number +ffffffff81799ca0 T ixgb_get_ee_device_id +ffffffff8179a000 T ixgb_mac_reset +ffffffff8179a1e0 T ixgb_adapter_stop +ffffffff8179a320 T ixgb_init_hw +ffffffff8179a620 T ixgb_init_rx_addrs +ffffffff8179a750 T mac_addr_valid +ffffffff8179a7b0 T ixgb_clear_vfta +ffffffff8179a830 T ixgb_clear_hw_cntrs +ffffffff8179af10 T ixgb_setup_fc +ffffffff8179b0a0 T ixgb_check_for_link +ffffffff8179b2b0 T ixgb_rar_set +ffffffff8179b320 T ixgb_mc_addr_list_update +ffffffff8179b5a0 T ixgb_write_vfta +ffffffff8179b5d0 T ixgb_read_phy_reg +ffffffff8179bad0 T ixgb_write_phy_reg +ffffffff8179bfc0 T ixgb_check_for_bad_link +ffffffff8179c080 T ixgb_led_on +ffffffff8179c0d0 T ixgb_led_off +ffffffff8179d000 T ixgbe_probe +ffffffff8179d030 T ixgbe_attach +ffffffff8179d580 T ixgbe_detach +ffffffff8179d790 T ixgbe_activate +ffffffff8179d8a0 T ixgbe_identify_hardware +ffffffff8179d960 T ixgbe_allocate_pci_resources +ffffffff8179dab0 T ixgbe_allocate_queues +ffffffff8179dfb0 T ixgbe_allocate_msix +ffffffff8179e1e0 T ixgbe_allocate_legacy +ffffffff8179e300 T ixgbe_setup_interface +ffffffff8179e660 T ixgbe_free_transmit_structures +ffffffff8179e6e0 T ixgbe_free_receive_structures +ffffffff8179e7a0 T ixgbe_free_pci_resources +ffffffff8179e880 T ixgbe_stop +ffffffff8179eb80 T ixgbe_init +ffffffff8179f760 T ixgbe_start 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ixgbe_free_receive_buffers +ffffffff817a4620 T ixgbe_rx_offload +ffffffff817a47f0 T ixgbe_read_pci_cfg +ffffffff817a4850 T ixgbe_write_pci_cfg +ffffffff817a48d0 t ix_kstats_read +ffffffff817a4a90 t ix_rxq_kstats_read +ffffffff817a4bf0 t ix_txq_kstats_read +ffffffff817a5000 T ixgbe_init_ops_generic +ffffffff817a5270 T ixgbe_init_eeprom_params_generic +ffffffff817a5320 T ixgbe_read_eerd_generic +ffffffff817a5420 T ixgbe_read_eeprom_bit_bang_generic +ffffffff817a56c0 T ixgbe_write_eeprom_generic +ffffffff817a5b10 T ixgbe_validate_eeprom_checksum_generic +ffffffff817a5bc0 T ixgbe_update_eeprom_checksum_generic +ffffffff817a5c40 T ixgbe_calc_eeprom_checksum_generic +ffffffff817a5de0 T ixgbe_init_hw_generic +ffffffff817a5e40 T ixgbe_start_hw_generic +ffffffff817a5f60 T ixgbe_clear_hw_cntrs_generic +ffffffff817a6940 T ixgbe_enable_rx_dma_generic +ffffffff817a69a0 T ixgbe_get_mac_addr_generic +ffffffff817a6a30 T ixgbe_stop_adapter_generic +ffffffff817a6bb0 T ixgbe_get_bus_info_generic +ffffffff817a6c60 T ixgbe_set_lan_id_multi_port_pcie +ffffffff817a6d30 T ixgbe_acquire_swfw_sync +ffffffff817a6f60 T ixgbe_release_swfw_sync +ffffffff817a7010 T prot_autoc_read_generic +ffffffff817a7070 T prot_autoc_write_generic +ffffffff817a70c0 T ixgbe_led_on_generic +ffffffff817a7180 T ixgbe_led_off_generic +ffffffff817a7230 T ixgbe_blink_led_start_generic +ffffffff817a73a0 T ixgbe_blink_led_stop_generic +ffffffff817a74c0 T ixgbe_set_rar_generic +ffffffff817a75e0 T ixgbe_clear_rar_generic +ffffffff817a76e0 T ixgbe_init_rx_addrs_generic +ffffffff817a78e0 T ixgbe_update_mc_addr_list_generic +ffffffff817a7ae0 T ixgbe_enable_mc_generic +ffffffff817a7b50 T ixgbe_disable_mc_generic +ffffffff817a7bb0 T ixgbe_enable_rx_generic +ffffffff817a7c70 T ixgbe_disable_rx_generic +ffffffff817a7d50 T ixgbe_fc_enable_generic +ffffffff817a8180 T ixgbe_setup_fc_generic +ffffffff817a8450 T ixgbe_fc_autoneg +ffffffff817a8730 T ixgbe_device_supports_autoneg_fc +ffffffff817a8820 T ixgbe_start_hw_gen2 +ffffffff817a8a00 T ixgbe_identify_phy +ffffffff817a8a60 T ixgbe_set_pci_config_data_generic +ffffffff817a8ad0 T ixgbe_disable_rx +ffffffff817a8b10 T ixgbe_disable_pcie_master +ffffffff817a8c60 T ixgbe_read_eerd_buffer_generic +ffffffff817a8da0 T ixgbe_poll_eerd_eewr_done +ffffffff817a8e40 T ixgbe_write_eewr_buffer_generic +ffffffff817a8fc0 T ixgbe_write_eewr_generic +ffffffff817a9010 T ixgbe_acquire_eeprom +ffffffff817a9190 T ixgbe_get_eeprom_semaphore +ffffffff817a93a0 T ixgbe_release_eeprom_semaphore +ffffffff817a9410 T ixgbe_ready_eeprom +ffffffff817a9580 T ixgbe_shift_out_eeprom_bits +ffffffff817a9740 T ixgbe_shift_in_eeprom_bits +ffffffff817a98a0 T ixgbe_standby_eeprom +ffffffff817a9980 T ixgbe_raise_eeprom_clk +ffffffff817a99f0 T ixgbe_lower_eeprom_clk +ffffffff817a9a60 T ixgbe_release_eeprom +ffffffff817a9b40 T ixgbe_validate_mac_addr +ffffffff817a9ba0 T ixgbe_init_uta_tables +ffffffff817a9be0 T ixgbe_add_uc_addr +ffffffff817a9c50 T ixgbe_mta_vector +ffffffff817a9d00 T ixgbe_set_mta +ffffffff817a9dc0 T ixgbe_negotiate_fc +ffffffff817a9e70 T ixgbe_fc_autoneg_fiber +ffffffff817a9f90 T ixgbe_fc_autoneg_backplane +ffffffff817aa100 T ixgbe_fc_autoneg_copper +ffffffff817aa220 T ixgbe_disable_sec_rx_path_generic +ffffffff817aa2e0 T ixgbe_enable_sec_rx_path_generic +ffffffff817aa370 T ixgbe_enable_rx +ffffffff817aa3b0 T ixgbe_get_pcie_msix_count_generic +ffffffff817aa430 T ixgbe_insert_mac_addr_generic +ffffffff817aa640 T ixgbe_set_vmdq +ffffffff817aa680 T ixgbe_set_rar +ffffffff817aa6d0 T ixgbe_clear_vmdq +ffffffff817aa710 T ixgbe_clear_vmdq_generic +ffffffff817aa8c0 T ixgbe_set_vmdq_generic +ffffffff817aa970 T ixgbe_init_uta_tables_generic +ffffffff817aa9f0 T ixgbe_find_vlvf_slot +ffffffff817aaaa0 T ixgbe_set_vfta_generic +ffffffff817aabb0 T ixgbe_set_vlvf_generic +ffffffff817aae40 T ixgbe_clear_vfta_generic +ffffffff817aaf40 T ixgbe_need_crosstalk_fix +ffffffff817aaf90 T ixgbe_check_mac_link_generic +ffffffff817ab180 T ixgbe_get_device_caps_generic +ffffffff817ab1d0 T ixgbe_calculate_checksum +ffffffff817ab290 T ixgbe_hic_unlocked +ffffffff817ab450 T ixgbe_host_interface_command +ffffffff817ab620 T ixgbe_clear_tx_pending +ffffffff817ab7e0 T ixgbe_mng_present +ffffffff817ab850 T ixgbe_mng_enabled +ffffffff817ab910 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff817abcb0 T ixgbe_flap_tx_laser +ffffffff817abcf0 T ixgbe_check_link +ffffffff817abd40 T ixgbe_set_soft_rate_select_speed +ffffffff817abe30 T ixgbe_init_shared_code +ffffffff817abee0 T ixgbe_set_mac_type +ffffffff817ac080 T ixgbe_init_hw +ffffffff817ac0c0 T ixgbe_get_media_type +ffffffff817ac100 T ixgbe_read_mbx +ffffffff817ac160 T ixgbe_write_mbx +ffffffff817ac1b0 T ixgbe_check_for_msg +ffffffff817ac1f0 T ixgbe_check_for_ack +ffffffff817ac230 T ixgbe_check_for_rst +ffffffff817ac270 T ixgbe_poll_for_msg +ffffffff817ac330 T ixgbe_poll_for_ack +ffffffff817ac3f0 T ixgbe_read_posted_mbx +ffffffff817ac4d0 T ixgbe_write_posted_mbx +ffffffff817ac5a0 T ixgbe_init_mbx_ops_generic +ffffffff817ac5e0 T ixgbe_read_v2p_mailbox +ffffffff817ac650 T ixgbe_check_for_bit_pf +ffffffff817ac6e0 T ixgbe_check_for_msg_pf +ffffffff817ac790 T ixgbe_check_for_ack_pf +ffffffff817ac830 T ixgbe_check_for_rst_pf +ffffffff817ac920 T ixgbe_obtain_mbx_lock_pf +ffffffff817ac9b0 T ixgbe_write_mbx_pf +ffffffff817acb80 T ixgbe_read_mbx_pf +ffffffff817acc90 T ixgbe_init_mbx_params_pf +ffffffff817ad000 T ixgbe_set_pcie_completion_timeout +ffffffff817ad090 T ixgbe_init_ops_82598 +ffffffff817ad1e0 T ixgbe_init_phy_ops_82598 +ffffffff817ad2d0 T ixgbe_start_hw_82598 +ffffffff817ad480 T ixgbe_reset_hw_82598 +ffffffff817ad7b0 T ixgbe_get_media_type_82598 +ffffffff817ad870 T ixgbe_get_supported_physical_layer_82598 +ffffffff817ada40 T ixgbe_read_analog_reg8_82598 +ffffffff817adb00 T ixgbe_write_analog_reg8_82598 +ffffffff817adb80 T ixgbe_set_lan_id_multi_port_pcie_82598 +ffffffff817adc20 T ixgbe_enable_rx_dma_82598 +ffffffff817adc70 T ixgbe_set_vmdq_82598 +ffffffff817add20 T ixgbe_clear_vmdq_82598 +ffffffff817addd0 T ixgbe_set_vfta_82598 +ffffffff817adf00 T ixgbe_clear_vfta_82598 +ffffffff817ae0b0 T ixgbe_fc_enable_82598 +ffffffff817ae510 T ixgbe_read_i2c_eeprom_82598 +ffffffff817ae530 T ixgbe_check_mac_link_82598 +ffffffff817ae7d0 T ixgbe_setup_mac_link_82598 +ffffffff817ae990 T ixgbe_get_link_capabilities_82598 +ffffffff817aea60 T ixgbe_setup_copper_link_82598 +ffffffff817aeb70 T ixgbe_start_mac_link_82598 +ffffffff817aec90 T ixgbe_validate_link_ready +ffffffff817aed40 T ixgbe_read_i2c_phy_82598 +ffffffff817af000 T ixgbe_init_mac_link_ops_82599 +ffffffff817af190 T ixgbe_disable_tx_laser_multispeed_fiber +ffffffff817af260 T ixgbe_enable_tx_laser_multispeed_fiber +ffffffff817af2e0 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff817af420 T ixgbe_setup_mac_link_82599 +ffffffff817af6a0 T ixgbe_set_hard_rate_select_speed +ffffffff817af760 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff817af830 T ixgbe_setup_mac_link_smartspeed +ffffffff817afbc0 T ixgbe_init_phy_ops_82599 +ffffffff817afd10 T ixgbe_read_i2c_byte_82599 +ffffffff817afe90 T ixgbe_write_i2c_byte_82599 +ffffffff817b0010 T ixgbe_setup_copper_link_82599 +ffffffff817b0070 T ixgbe_setup_sfp_modules_82599 +ffffffff817b0230 T prot_autoc_read_82599 +ffffffff817b0360 T prot_autoc_write_82599 +ffffffff817b04d0 T ixgbe_reset_pipeline_82599 +ffffffff817b0810 T ixgbe_init_ops_82599 +ffffffff817b09f0 T ixgbe_identify_phy_82599 +ffffffff817b0a80 T ixgbe_reset_hw_82599 +ffffffff817b0e10 T ixgbe_get_media_type_82599 +ffffffff817b0f40 T ixgbe_get_supported_physical_layer_82599 +ffffffff817b1110 T ixgbe_enable_rx_dma_82599 +ffffffff817b1180 T ixgbe_read_analog_reg8_82599 +ffffffff817b1240 T ixgbe_write_analog_reg8_82599 +ffffffff817b12c0 T ixgbe_start_hw_82599 +ffffffff817b13c0 T ixgbe_get_link_capabilities_82599 +ffffffff817b1500 T ixgbe_stop_mac_link_on_d3_82599 +ffffffff817b15c0 T ixgbe_read_eeprom_82599 +ffffffff817b15f0 T ixgbe_start_mac_link_82599 +ffffffff817b17f0 T ixgbe_verify_fw_version_82599 +ffffffff817b2000 T ixgbe_init_ops_X540 +ffffffff817b2220 T ixgbe_init_eeprom_params_X540 +ffffffff817b22b0 T ixgbe_read_eerd_X540 +ffffffff817b2340 T ixgbe_write_eewr_X540 +ffffffff817b23d0 T ixgbe_update_eeprom_checksum_X540 +ffffffff817b24a0 T ixgbe_validate_eeprom_checksum_X540 +ffffffff817b2590 T ixgbe_calc_eeprom_checksum_X540 +ffffffff817b2730 T ixgbe_reset_hw_X540 +ffffffff817b2920 T ixgbe_get_media_type_X540 +ffffffff817b2950 T ixgbe_get_supported_physical_layer_X540 +ffffffff817b29d0 T ixgbe_start_hw_X540 +ffffffff817b2a20 T ixgbe_acquire_swfw_sync_X540 +ffffffff817b2e70 T ixgbe_release_swfw_sync_X540 +ffffffff817b2fa0 T ixgbe_init_swfw_sync_X540 +ffffffff817b3080 T ixgbe_setup_mac_link_X540 +ffffffff817b30a0 T ixgbe_blink_led_start_X540 +ffffffff817b31c0 T ixgbe_blink_led_stop_X540 +ffffffff817b32c0 T ixgbe_get_link_capabilities_X540 +ffffffff817b3300 T ixgbe_update_flash_X540 +ffffffff817b34e0 T ixgbe_poll_flash_update_done_X540 +ffffffff817b3570 T ixgbe_get_swfw_sync_semaphore +ffffffff817b3700 T ixgbe_release_swfw_sync_semaphore +ffffffff817b4000 T ixgbe_init_ops_X550 +ffffffff817b4110 T ixgbe_dmac_config_X550 +ffffffff817b41f0 T ixgbe_dmac_config_tcs_X550 +ffffffff817b4340 T ixgbe_dmac_update_tcs_X550 +ffffffff817b4400 T ixgbe_set_source_address_pruning_X550 +ffffffff817b44f0 T ixgbe_init_eeprom_params_X550 +ffffffff817b4570 T ixgbe_calc_eeprom_checksum_X550 +ffffffff817b4590 T ixgbe_read_ee_hostif_X550 +ffffffff817b4660 T ixgbe_write_ee_hostif_X550 +ffffffff817b4720 T ixgbe_update_eeprom_checksum_X550 +ffffffff817b48c0 T ixgbe_validate_eeprom_checksum_X550 +ffffffff817b4a10 T ixgbe_disable_rx_x550 +ffffffff817b4b30 T ixgbe_led_on_t_X550em +ffffffff817b4bf0 T ixgbe_led_off_t_X550em +ffffffff817b4cb0 T ixgbe_read_cs4227 +ffffffff817b4ce0 T ixgbe_write_cs4227 +ffffffff817b4d10 T ixgbe_read_pe +ffffffff817b4d60 T ixgbe_write_pe +ffffffff817b4dc0 T ixgbe_reset_cs4227 +ffffffff817b5050 T ixgbe_check_cs4227 +ffffffff817b5200 T ixgbe_setup_mux_ctl +ffffffff817b5290 T ixgbe_identify_phy_x550em +ffffffff817b54a0 T ixgbe_read_mng_if_sel_x550em +ffffffff817b5520 T ixgbe_fw_phy_activity +ffffffff817b5640 T ixgbe_get_phy_id_fw +ffffffff817b57a0 T ixgbe_identify_phy_fw +ffffffff817b57f0 T ixgbe_shutdown_fw_phy +ffffffff817b58c0 T ixgbe_read_phy_reg_x550em +ffffffff817b58f0 T ixgbe_write_phy_reg_x550em +ffffffff817b5920 T ixgbe_init_ops_X550EM +ffffffff817b5bc0 T ixgbe_get_bus_info_X550em +ffffffff817b5c10 T ixgbe_get_media_type_X550em +ffffffff817b5ce0 T ixgbe_setup_sfp_modules_X550em +ffffffff817b5e70 T ixgbe_get_link_capabilities_X550em +ffffffff817b5f40 T ixgbe_reset_hw_X550em +ffffffff817b63c0 T ixgbe_get_supported_physical_layer_X550em +ffffffff817b6540 T ixgbe_setup_fc_X550em +ffffffff817b66a0 T ixgbe_init_phy_ops_X550em +ffffffff817b6b70 T ixgbe_setup_fw_link +ffffffff817b6d00 T ixgbe_fc_autoneg_fw +ffffffff817b6d30 T ixgbe_setup_eee_fw +ffffffff817b6d90 T ixgbe_init_ops_X550EM_a +ffffffff817b6ec0 T ixgbe_read_iosf_sb_reg_x550 +ffffffff817b7030 T ixgbe_write_iosf_sb_reg_x550 +ffffffff817b71a0 T ixgbe_read_iosf_sb_reg_x550a +ffffffff817b7230 T ixgbe_write_iosf_sb_reg_x550a +ffffffff817b72c0 T ixgbe_acquire_swfw_sync_X550a +ffffffff817b7400 T ixgbe_release_swfw_sync_X550a +ffffffff817b74a0 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff817b74e0 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff817b7640 T ixgbe_setup_fc_backplane_x550em_a +ffffffff817b7830 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff817b79a0 T ixgbe_init_ops_X550EM_x +ffffffff817b7a60 T ixgbe_acquire_swfw_sync_X550em +ffffffff817b7b20 T ixgbe_release_swfw_sync_X550em +ffffffff817b7bb0 T ixgbe_iosf_wait +ffffffff817b7c60 T ixgbe_get_phy_token +ffffffff817b7ce0 T ixgbe_put_phy_token +ffffffff817b7d60 T ixgbe_supported_sfp_modules_X550em +ffffffff817b7de0 T ixgbe_identify_sfp_module_X550em +ffffffff817b7e60 T ixgbe_init_mac_link_ops_X550em +ffffffff817b7fa0 T ixgbe_restart_an_internal_phy_x550em +ffffffff817b80b0 T ixgbe_setup_sgmii +ffffffff817b8280 T ixgbe_setup_sgmii_fw +ffffffff817b8480 T ixgbe_setup_mac_link_sfp_x550a +ffffffff817b8670 T ixgbe_setup_mac_link_sfp_x550em +ffffffff817b8730 T ixgbe_setup_mac_link_t_X550em +ffffffff817b87e0 T ixgbe_check_link_t_X550em +ffffffff817b88c0 T ixgbe_get_lasi_ext_t_x550em +ffffffff817b8a40 T ixgbe_enable_lasi_ext_t_x550em +ffffffff817b8bd0 T ixgbe_setup_kr_speed_x550em +ffffffff817b8de0 T ixgbe_reset_phy_fw +ffffffff817b8f60 T ixgbe_check_overtemp_fw +ffffffff817b90c0 T ixgbe_read_phy_reg_x550a +ffffffff817b9160 T ixgbe_write_phy_reg_x550a +ffffffff817b9210 T ixgbe_setup_kr_x550em +ffffffff817b9280 T ixgbe_setup_internal_phy_t_x550em +ffffffff817b93e0 T ixgbe_enter_lplu_t_x550em +ffffffff817b9630 T ixgbe_handle_lasi_ext_t_x550em +ffffffff817b96b0 T ixgbe_reset_phy_t_X550em +ffffffff817b9700 T ixgbe_set_mdio_speed +ffffffff817b97d0 T ixgbe_init_ext_t_x550em +ffffffff817b9880 T ixgbe_setup_sfi_x550a +ffffffff817b9a30 T ixgbe_setup_ixfi_x550em_x +ffffffff817b9c10 T ixgbe_setup_ixfi_x550em +ffffffff817b9df0 T ixgbe_ext_phy_t_x550em_get_link +ffffffff817b9e80 T ixgbe_setup_phy_loopback_x550em +ffffffff817ba070 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff817ba210 T ixgbe_write_ee_hostif_data_X550 +ffffffff817ba280 T ixgbe_checksum_ptr_x550 +ffffffff817ba410 T ixgbe_calc_checksum_X550 +ffffffff817ba5a0 T ixgbe_update_flash_X550 +ffffffff817ba5f0 T ixgbe_get_lcd_t_x550em +ffffffff817ba6b0 T ixgbe_set_mux +ffffffff817bb000 T ixgbe_read_i2c_combined_generic_int +ffffffff817bb260 T ixgbe_i2c_start +ffffffff817bb3b0 t ixgbe_out_i2c_byte_ack +ffffffff817bb400 T ixgbe_clock_in_i2c_byte +ffffffff817bb500 T ixgbe_clock_out_i2c_bit +ffffffff817bb610 T ixgbe_i2c_stop +ffffffff817bb790 T ixgbe_i2c_bus_clear +ffffffff817bb8a0 T ixgbe_read_i2c_combined_generic +ffffffff817bb8c0 T ixgbe_read_i2c_combined_generic_unlocked +ffffffff817bb8e0 T ixgbe_write_i2c_combined_generic_int +ffffffff817bbaa0 T ixgbe_write_i2c_combined_generic +ffffffff817bbac0 T ixgbe_write_i2c_combined_generic_unlocked +ffffffff817bbae0 T ixgbe_init_phy_ops_generic +ffffffff817bbc10 T ixgbe_identify_phy_generic +ffffffff817bbce0 T ixgbe_reset_phy_generic +ffffffff817bbef0 T ixgbe_read_phy_reg_generic +ffffffff817bbf90 T ixgbe_write_phy_reg_generic +ffffffff817bc030 T ixgbe_read_phy_reg_mdi +ffffffff817bc190 T ixgbe_write_phy_reg_mdi +ffffffff817bc2f0 T ixgbe_setup_phy_link_generic +ffffffff817bc5a0 T ixgbe_setup_phy_link_speed_generic +ffffffff817bc5f0 T ixgbe_get_phy_firmware_version_generic +ffffffff817bc620 T ixgbe_read_i2c_byte_generic +ffffffff817bc640 T ixgbe_write_i2c_byte_generic +ffffffff817bc660 T ixgbe_read_i2c_eeprom_generic +ffffffff817bc690 T ixgbe_write_i2c_eeprom_generic +ffffffff817bc6b0 T ixgbe_identify_module_generic +ffffffff817bc720 T ixgbe_read_i2c_byte_generic_unlocked +ffffffff817bc740 T ixgbe_write_i2c_byte_generic_unlocked +ffffffff817bc760 T ixgbe_tn_check_overtemp +ffffffff817bc7d0 t ixgbe_probe_phy +ffffffff817bc9d0 T ixgbe_check_reset_blocked +ffffffff817bca30 T ixgbe_validate_phy_addr +ffffffff817bcaa0 T ixgbe_get_phy_id +ffffffff817bcb50 T ixgbe_get_phy_type_from_id +ffffffff817bcc10 T ixgbe_get_copper_link_capabilities_generic +ffffffff817bcd00 T ixgbe_get_copper_speeds_supported +ffffffff817bcdc0 T ixgbe_check_phy_link_tnx +ffffffff817bd080 T ixgbe_setup_phy_link_tnx +ffffffff817bd330 T ixgbe_get_phy_firmware_version_tnx +ffffffff817bd360 T ixgbe_reset_phy_nl +ffffffff817bd5f0 T ixgbe_get_sfp_init_sequence_offsets +ffffffff817bd800 T ixgbe_is_sfp +ffffffff817bd850 T ixgbe_identify_sfp_module_generic +ffffffff817bdc40 T ixgbe_identify_qsfp_module_generic +ffffffff817bdf30 T ixgbe_get_supported_phy_sfp_layer_generic +ffffffff817be0d0 T ixgbe_is_sfp_probe +ffffffff817be120 T ixgbe_read_i2c_byte_generic_int +ffffffff817be320 T ixgbe_clock_out_i2c_byte +ffffffff817be480 T ixgbe_get_i2c_ack +ffffffff817be680 T ixgbe_write_i2c_byte_generic_int +ffffffff817be7b0 T ixgbe_set_i2c_data +ffffffff817be960 T ixgbe_raise_i2c_clk +ffffffff817bea80 T ixgbe_lower_i2c_clk +ffffffff817beb10 T ixgbe_clock_in_i2c_bit +ffffffff817becd0 T ixgbe_get_i2c_data +ffffffff817bed80 T ixgbe_set_copper_phy_power +ffffffff817bf000 t ixl_match +ffffffff817bf0a0 t ixl_attach +ffffffff817c05f0 t ixl_710_rd_ctl +ffffffff817c06b0 t ixl_710_wr_ctl +ffffffff817c0780 t ixl_710_set_rss_key +ffffffff817c0900 t ixl_710_set_rss_lut +ffffffff817c0980 t ixl_atq_exec +ffffffff817c0af0 t ixl_wakeup +ffffffff817c0b10 t ixl_722_rd_ctl +ffffffff817c0b40 t ixl_722_wr_ctl +ffffffff817c0b70 t ixl_722_set_rss_key +ffffffff817c0ba0 t ixl_722_set_rss_lut +ffffffff817c0bd0 t ixl_dmamem_alloc +ffffffff817c0d30 t ixl_arq +ffffffff817c0fd0 t ixl_arq_fill +ffffffff817c1240 t ixl_pxe_clear +ffffffff817c12f0 t ixl_get_mac +ffffffff817c14c0 t ixl_hmc +ffffffff817c1b50 t ixl_lldp_shut +ffffffff817c1be0 t ixl_phy_mask_ints +ffffffff817c1c90 t ixl_restart_an +ffffffff817c1d40 t ixl_get_switch_config +ffffffff817c1f30 t ixl_get_phy_types +ffffffff817c2120 t ixl_get_link_status +ffffffff817c21f0 t ixl_get_vsi +ffffffff817c2340 t ixl_set_vsi +ffffffff817c24b0 t ixl_intr0 +ffffffff817c26f0 t ixl_intr_vector +ffffffff817c2790 t ixl_ioctl +ffffffff817c4350 t ixl_start +ffffffff817c4900 t ixl_watchdog +ffffffff817c4930 t ixl_media_change +ffffffff817c4960 t ixl_media_status +ffffffff817c49e0 t ixl_media_add +ffffffff817c4a70 t ixl_link_state_update +ffffffff817c4bd0 t ixl_remove_macvlan +ffffffff817c4cc0 t ixl_add_macvlan +ffffffff817c4da0 t ixl_kstat_attach +ffffffff817c4e50 t ixl_dmamem_free +ffffffff817c4ec0 t ixl_hmc_free +ffffffff817c4fb0 t ixl_arq_unfill +ffffffff817c50a0 t ixl_link_state_update_iaq +ffffffff817c5140 t ixl_set_link_status +ffffffff817c52b0 t ixl_atq_poll +ffffffff817c54b0 t ixl_rxeof +ffffffff817c5790 t ixl_txeof +ffffffff817c5980 t ixl_rxfill +ffffffff817c5c80 t ixl_down +ffffffff817c62d0 t ixl_rxr_free +ffffffff817c63e0 t ixl_txr_free +ffffffff817c64e0 t ixl_rxrefill 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T iwm_auth +ffffffff81845610 T iwm_deauth +ffffffff81845970 T iwm_run +ffffffff81845ea0 T iwm_allow_mcast +ffffffff81845fa0 T iwm_run_stop +ffffffff818465c0 T iwm_node_alloc +ffffffff818465e0 T iwm_set_key_v1 +ffffffff81846720 T iwm_set_key +ffffffff81846980 T iwm_delete_key_v1 +ffffffff81846ab0 T iwm_delete_key +ffffffff81846d20 T iwm_calib_timeout +ffffffff81846de0 T iwm_set_rate_table_vht +ffffffff81847100 T iwm_set_rate_table +ffffffff818474c0 T iwm_media_change +ffffffff818476c0 T iwm_stop +ffffffff81847b40 T iwm_init +ffffffff81847e10 T iwm_newstate_task +ffffffff81847f90 T iwm_newstate +ffffffff818480f0 T iwm_endscan +ffffffff81848140 T iwm_fill_sf_command +ffffffff81848210 T iwm_send_soc_conf +ffffffff81848350 T iwm_send_update_mcc_cmd +ffffffff81848510 T iwm_send_temp_report_ths_cmd +ffffffff818485e0 T iwm_tt_tx_backoff +ffffffff81848670 T iwm_fill_paging_mem +ffffffff818489e0 T iwm_alloc_fw_paging_mem +ffffffff81848d80 T iwm_init_hw +ffffffff81849400 T iwm_preinit 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iwx_dma_contig_free +ffffffff8184d610 T iwx_get_num_sections +ffffffff8184d690 T iwx_init_fw_sec +ffffffff8184dae0 T iwx_fw_version_str +ffffffff8184db20 T iwx_alloc_fw_monitor_block +ffffffff8184dbd0 T iwx_alloc_fw_monitor +ffffffff8184dc90 T iwx_apply_debug_destination +ffffffff8184e1e0 T iwx_nic_lock +ffffffff8184e330 T iwx_write_prph +ffffffff8184e3d0 T iwx_set_bits_prph +ffffffff8184e3f0 T iwx_clear_bits_prph +ffffffff8184e410 T iwx_read_prph +ffffffff8184e4b0 T iwx_nic_unlock +ffffffff8184e560 T iwx_set_ltr +ffffffff8184e6b0 T iwx_ctxt_info_init +ffffffff8184e970 T iwx_ctxt_info_free_fw_img +ffffffff8184eaf0 T iwx_ctxt_info_gen3_init +ffffffff8184f0e0 T iwx_write_umac_prph +ffffffff8184f190 T iwx_firmware_store_section +ffffffff8184f230 T iwx_set_default_calib +ffffffff8184f280 T iwx_fw_info_free +ffffffff8184f310 T iwx_read_firmware +ffffffff8184fda0 T iwx_prph_addr_mask +ffffffff8184fde0 T iwx_read_prph_unlocked +ffffffff8184fe60 T iwx_nic_assert_locked +ffffffff8184fec0 T iwx_write_prph_unlocked +ffffffff8184ff40 T iwx_write_prph64 +ffffffff81850070 T iwx_read_umac_prph_unlocked +ffffffff818500f0 T iwx_read_umac_prph +ffffffff81850190 T iwx_write_umac_prph_unlocked +ffffffff81850210 T iwx_read_mem +ffffffff81850340 T iwx_write_mem +ffffffff81850480 T iwx_write_mem32 +ffffffff81850590 T iwx_poll_bit +ffffffff81850660 T iwx_set_bits_mask_prph +ffffffff81850850 T iwx_alloc_rx_ring +ffffffff81850a30 T iwx_rx_addbuf +ffffffff81850c50 T iwx_free_rx_ring +ffffffff81850f00 T iwx_disable_rx_dma +ffffffff81851160 T iwx_reset_rx_ring +ffffffff81851200 T iwx_alloc_tx_ring +ffffffff81851410 T iwx_free_tx_ring +ffffffff818516a0 T iwx_reset_tx_ring +ffffffff81851900 T iwx_enable_rfkill_int +ffffffff818519e0 T iwx_check_rfkill +ffffffff81851a60 T iwx_enable_interrupts +ffffffff81851b10 T iwx_enable_fwload_interrupt +ffffffff81851bf0 T iwx_restore_interrupts +ffffffff81851c20 T iwx_disable_interrupts +ffffffff81851ce0 T iwx_ict_reset +ffffffff81851ea0 T iwx_set_hw_ready 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iwx_setup_vht_rates +ffffffff81854ed0 T iwx_init_reorder_buffer +ffffffff81854f30 T iwx_clear_reorder_buffer +ffffffff81854ff0 T iwx_rx_ba_session_expired +ffffffff818550f0 T iwx_rx_bar_frame_release +ffffffff818551a0 T iwx_release_frames +ffffffff81855390 T iwx_reorder_timer_expired +ffffffff81855560 T iwx_find_rxba_data +ffffffff818555f0 T iwx_sta_rx_agg_baid_cfg_cmd +ffffffff81855840 T iwx_send_cmd_pdu_status +ffffffff818558d0 T iwx_sta_rx_agg_sta_cmd +ffffffff81855b20 T iwx_sta_rx_agg +ffffffff81855df0 T iwx_mac_ctxt_task +ffffffff81855f80 T iwx_mac_ctxt_cmd +ffffffff81856180 T iwx_phy_ctxt_task +ffffffff81856330 T iwx_phy_ctxt_update +ffffffff81856780 T iwx_updatechan +ffffffff81856840 T iwx_add_task +ffffffff818568b0 T iwx_updateprot +ffffffff81856970 T iwx_updateslot +ffffffff81856a30 T iwx_updateedca +ffffffff81856af0 T iwx_updatedtim +ffffffff81856bb0 T iwx_sta_tx_agg_start +ffffffff81856da0 T iwx_ba_task +ffffffff81856ef0 T iwx_ampdu_rx_start +ffffffff81856fd0 T iwx_ampdu_rx_stop +ffffffff818570b0 T iwx_ampdu_tx_start +ffffffff81857160 T iwx_set_mac_addr_from_csr +ffffffff81857380 T iwx_flip_hw_address +ffffffff818573d0 T iwx_is_valid_mac_addr +ffffffff81857470 T iwx_nvm_get +ffffffff81857750 T iwx_load_firmware +ffffffff81857930 T iwx_start_fw +ffffffff81857b10 T iwx_pnvm_handle_section +ffffffff81857e10 T iwx_ctxt_info_gen3_set_pnvm +ffffffff81857e60 T iwx_pnvm_parse +ffffffff81857f50 T iwx_load_pnvm +ffffffff818582f0 T iwx_send_tx_ant_cfg +ffffffff81858380 T iwx_send_phy_cfg_cmd +ffffffff81858430 T iwx_send_dqa_cmd +ffffffff818584c0 T iwx_load_ucode_wait_alive +ffffffff81858580 T iwx_run_init_mvm_ucode +ffffffff818587e0 T iwx_config_ltr +ffffffff818588a0 T iwx_update_rx_desc +ffffffff81858940 T iwx_rxmq_get_signal_strength +ffffffff81858990 T iwx_rx_rx_phy_cmd +ffffffff818589f0 T iwx_get_noise +ffffffff81858a60 T iwx_ccmp_decap +ffffffff81858ba0 T iwx_rx_hwdecrypt +ffffffff81858ca0 T iwx_rx_frame +ffffffff81858f40 T iwx_detect_duplicate +ffffffff81859060 T iwx_is_sn_less +ffffffff818590c0 T iwx_oldsn_workaround +ffffffff81859180 T iwx_rx_reorder +ffffffff818596f0 T iwx_rx_mpdu_mq +ffffffff81859a30 T iwx_clear_tx_desc +ffffffff81859bd0 T iwx_txd_done +ffffffff81859c90 T iwx_txq_advance +ffffffff81859fb0 T iwx_tx_update_byte_tbl +ffffffff8185a050 T iwx_rx_tx_cmd +ffffffff8185a1c0 T iwx_clear_oactive +ffffffff8185a240 T iwx_rx_compressed_ba +ffffffff8185a3c0 T iwx_rx_bmiss +ffffffff8185a4b0 T iwx_binding_cmd +ffffffff8185a620 T iwx_get_vht_ctrl_pos +ffffffff8185a690 T iwx_phy_ctxt_cmd_uhb_v3_v4 +ffffffff8185a8e0 T iwx_phy_ctxt_cmd_v3_v4 +ffffffff8185ab30 T iwx_phy_ctxt_cmd +ffffffff8185ac30 T iwx_send_cmd_status +ffffffff8185ad50 T iwx_cmd_done +ffffffff8185ae30 T iwx_fw_rateidx_ofdm +ffffffff8185ae90 T iwx_fw_rateidx_cck +ffffffff8185aef0 T iwx_tx_fill_cmd +ffffffff8185b190 T iwx_rval2ridx +ffffffff8185b220 T iwx_tx +ffffffff8185b960 T iwx_flush_sta_tids +ffffffff8185bb10 T iwx_drain_sta +ffffffff8185bca0 T iwx_flush_sta +ffffffff8185bf60 T iwx_beacon_filter_send_cmd +ffffffff8185bff0 T iwx_update_beacon_abort +ffffffff8185c100 T iwx_power_build_cmd +ffffffff8185c190 T iwx_power_mac_update_mode +ffffffff8185c3b0 T iwx_power_update_device +ffffffff8185c450 T iwx_enable_beacon_filter +ffffffff8185c560 T iwx_disable_beacon_filter +ffffffff8185c650 T iwx_add_sta_cmd +ffffffff8185c950 T iwx_rm_sta_cmd +ffffffff8185ca10 T iwx_rm_sta +ffffffff8185ce70 T iwx_disable_mgmt_queue +ffffffff8185cf50 T iwx_umac_scan_fill_channels +ffffffff8185d060 T iwx_fill_probe_req +ffffffff8185d290 T iwx_config_umac_scan_reduced +ffffffff8185d3f0 T iwx_scan_umac_flags_v2 +ffffffff8185d430 T iwx_scan_umac_dwell_v10 +ffffffff8185d4a0 T iwx_scan_umac_fill_general_p_v10 +ffffffff8185d530 T iwx_scan_umac_fill_ch_p_v6 +ffffffff8185d650 T iwx_umac_scan_v14 +ffffffff8185d940 T iwx_mcc_update +ffffffff8185d9d0 T iwx_ridx2rate +ffffffff8185da40 T iwx_ack_rates +ffffffff8185dd00 T iwx_mac_ctxt_cmd_common +ffffffff8185e020 T iwx_mac_ctxt_cmd_fill_sta +ffffffff8185e0b0 T iwx_clear_statistics +ffffffff8185e190 T iwx_del_task +ffffffff8185e1f0 T iwx_scan +ffffffff8185e390 T iwx_scan_abort +ffffffff8185e440 T iwx_bgscan +ffffffff8185e4c0 T iwx_bgscan_done +ffffffff8185e560 T iwx_bgscan_done_task +ffffffff8185e860 T iwx_umac_scan_abort +ffffffff8185e8f0 T iwx_enable_mgmt_queue +ffffffff8185e980 T iwx_rs_rval2idx +ffffffff8185e9f0 T iwx_rs_ht_rates +ffffffff8185eac0 T iwx_rs_vht_rates +ffffffff8185eb80 T iwx_rs_init_v3 +ffffffff8185ef80 T iwx_rs_init_v4 +ffffffff8185f3a0 T iwx_rs_init +ffffffff8185f400 T iwx_rs_update +ffffffff8185f6a0 T iwx_phy_send_rlc +ffffffff8185f790 T iwx_auth +ffffffff8185fae0 T iwx_deauth +ffffffff8185fd80 T iwx_run +ffffffff81860220 T iwx_sf_config +ffffffff81860430 T iwx_allow_mcast +ffffffff81860530 T iwx_run_stop +ffffffff81860820 T iwx_node_alloc +ffffffff81860840 T iwx_set_key +ffffffff81860970 T iwx_add_sta_key +ffffffff81860be0 T iwx_setkey_task +ffffffff81860cd0 T iwx_delete_key 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T qwx_pcic_ce_irq_disable_sync +ffffffff8186a3a0 T qwx_pci_bus_wake_up +ffffffff8186a430 T qwx_mhi_wake_db_clear_valid +ffffffff8186a470 T qwx_mhi_device_wake +ffffffff8186a4d0 T qwx_pci_bus_release +ffffffff8186a560 T qwx_mhi_device_zzz +ffffffff8186a5c0 T qwx_pci_get_window_start +ffffffff8186a630 T qwx_pci_select_window +ffffffff8186a6d0 T qwx_pci_window_write32 +ffffffff8186a7d0 T qwx_pci_window_read32 +ffffffff8186a8c0 T qwx_pci_select_static_window +ffffffff8186a8f0 T qwx_pci_soc_global_reset +ffffffff8186abb0 T qwx_pci_clear_dbg_registers +ffffffff8186aeb0 T qwx_pci_set_link_reg +ffffffff8186b140 T qwx_pci_fix_l1ss +ffffffff8186b210 T qwx_pci_enable_ltssm +ffffffff8186b5c0 T qwx_pci_clear_all_intrs +ffffffff8186b6b0 T qwx_pci_set_wlaon_pwr_ctrl +ffffffff8186b840 T qwx_pci_force_wake +ffffffff8186b910 T qwx_pci_sw_reset +ffffffff8186ba90 T qwx_mhi_clear_vector +ffffffff8186bb20 T qwx_mhi_reset_device +ffffffff8186bc70 T qwx_pci_msi_config +ffffffff8186bcd0 T qwx_pci_msi_enable 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qwx_mhi_ready_state_transition +ffffffff8186db30 T qwx_mhi_init_mmio +ffffffff8186de10 T qwx_mhi_set_state +ffffffff8186de90 T qwx_mhi_mission_mode_state_transition +ffffffff8186dfd0 T qwx_mhi_low_power_mode_state_transition +ffffffff8186e030 T qwx_pci_event_ring_get_elem +ffffffff8186e080 T qwx_mhi_state_change +ffffffff8186e3b0 T qwx_pci_intr_ctrl_event_mhi +ffffffff8186e3f0 T qwx_pci_intr_ctrl_event_ee +ffffffff8186e430 T qwx_pci_intr_ctrl_event_cmd_complete +ffffffff8186e570 T qwx_pci_intr_ctrl_event +ffffffff8186e7c0 T qwx_pci_intr_data_event_tx +ffffffff8186eb50 T qwx_pci_intr_data_event +ffffffff8186f000 T cmpci_match +ffffffff8186f030 T cmpci_attach +ffffffff8186f500 T cmpci_activate +ffffffff8186f580 T cmpci_open +ffffffff8186f5b0 T cmpci_close +ffffffff8186f5e0 T cmpci_set_params +ffffffff8186ff90 T cmpci_round_blocksize +ffffffff8186ffc0 T cmpci_halt_output +ffffffff81870170 T cmpci_halt_input +ffffffff818702f0 T cmpci_set_port +ffffffff81870450 T cmpci_get_port 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cmpci_adjust +ffffffff818727a0 T cmpci_set_out_ports +ffffffff81872d90 T cmpci_set_in_ports +ffffffff81873000 T iha_pci_probe +ffffffff81873060 T iha_pci_attach +ffffffff81874000 T pcscp_match +ffffffff81874040 T pcscp_attach +ffffffff81874420 T pcscp_read_reg +ffffffff81874450 T pcscp_write_reg +ffffffff81874480 T pcscp_dma_isintr +ffffffff818744d0 T pcscp_dma_reset +ffffffff81874530 T pcscp_dma_intr +ffffffff81874a80 T pcscp_dma_setup +ffffffff81874cf0 T pcscp_dma_go +ffffffff81874e20 T pcscp_dma_stop +ffffffff81874eb0 T pcscp_dma_isactive +ffffffff81875000 T bge_probe +ffffffff81875030 T bge_attach +ffffffff81876450 T bge_detach +ffffffff818765a0 T bge_activate +ffffffff81876650 T bge_readmem_ind +ffffffff81876700 T bge_writemem_ind +ffffffff818767d0 T bge_writereg_ind +ffffffff81876820 T bge_writembx +ffffffff81876870 T bge_ape_lock_init +ffffffff81876a90 T bge_ape_read_fw_ver +ffffffff81876bf0 T bge_ape_lock +ffffffff81876da0 T bge_ape_unlock +ffffffff81876e60 T bge_ape_send_event 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T vmxnet3_enable_all_intrs +ffffffff818c8770 T vmxnet3_disable_all_intrs +ffffffff818c8840 T vmxnet3_evintr +ffffffff818c8a10 T vmxnet3_rxintr +ffffffff818c8d80 T vmxnet3_txintr +ffffffff818c8f60 T vmxnet3_init +ffffffff818c92f0 T vmxnet3_rx_csum +ffffffff818c9350 T vmxnet3_iff +ffffffff818c9490 T vmxnet3_stop +ffffffff818c9740 T vmxnet3_reset +ffffffff818c9780 T vmxnet3_tx_offload +ffffffff818c9920 t vmx_kstat_create +ffffffff818c9b00 t vmx_kstat_read +ffffffff818ca000 T vmwpvs_match +ffffffff818ca040 T vmwpvs_attach +ffffffff818ca980 T vmwpvs_scsi_cmd +ffffffff818cadf0 T vmwpvs_intx +ffffffff818cae70 T vmwpvs_msg_task +ffffffff818cb0e0 T vmwpvs_intr +ffffffff818cb2d0 T vmwpvs_get_config +ffffffff818cb4d0 T vmwpvs_dmamem_zalloc +ffffffff818cb530 T vmwpvs_dmamem_alloc +ffffffff818cb6b0 T vmwpvs_ccb_put +ffffffff818cb710 T vmwpvs_setup_rings +ffffffff818cb820 T vmwpvs_setup_msg_ring +ffffffff818cb8f0 T vmwpvs_ccb_get +ffffffff818cb970 T vmwpvs_dmamem_free +ffffffff818cb9f0 T vmwpvs_cmd +ffffffff818cba90 T vmwpvs_scsi_cmd_done +ffffffff818cbc70 T vmwpvs_scsi_cmd_poll +ffffffff818cc000 T lii_match +ffffffff818cc030 T lii_attach +ffffffff818cc420 T lii_activate +ffffffff818cc520 T lii_reset +ffffffff818cc7f0 T lii_spi_configure +ffffffff818cc8e0 T lii_eeprom_present +ffffffff818cc970 T lii_eeprom_read +ffffffff818cc9a0 T lii_spi_read +ffffffff818ccc60 T lii_read_macaddr +ffffffff818ccdc0 T lii_intr +ffffffff818cced0 T lii_alloc_rings +ffffffff818cd0e0 T lii_tick +ffffffff818cd130 T lii_mii_readreg +ffffffff818cd3d0 T lii_mii_writereg +ffffffff818cd670 T lii_mii_statchg +ffffffff818cd6e0 T lii_media_change +ffffffff818cd730 T lii_media_status +ffffffff818cd790 T lii_ioctl +ffffffff818cd920 T lii_start +ffffffff818cdad0 T lii_watchdog +ffffffff818cdb10 T lii_stop +ffffffff818cdb80 T lii_init +ffffffff818ce070 T lii_iff +ffffffff818ce1b0 T lii_tx_put +ffffffff818ce2c0 T lii_free_tx_space +ffffffff818ce300 T lii_rxintr +ffffffff818ce4b0 T lii_txintr +ffffffff818cf000 T ichiic_match +ffffffff818cf030 T ichiic_attach +ffffffff818cf220 T ichiic_intr +ffffffff818cf340 T ichiic_i2c_acquire_bus +ffffffff818cf3a0 T ichiic_i2c_release_bus +ffffffff818cf3f0 T ichiic_i2c_exec +ffffffff818d0000 T viapm_match +ffffffff818d0030 T viapm_attach +ffffffff818d0680 T viapm_intr +ffffffff818d0790 T viapm_i2c_acquire_bus +ffffffff818d07f0 T viapm_i2c_release_bus +ffffffff818d0840 T viapm_i2c_exec +ffffffff818d0b50 T viapm_refresh_sensor_data +ffffffff818d0e50 T viapm_refresh +ffffffff818d0e80 T val_to_uK +ffffffff818d0f20 T val_to_rpm +ffffffff818d0f60 T val_to_uV +ffffffff818d1000 T viapm_get_timecount +ffffffff818d2000 T amdiic_match +ffffffff818d2030 T amdiic_attach +ffffffff818d2200 T amdiic_intr +ffffffff818d22d0 T amdiic_i2c_acquire_bus +ffffffff818d2330 T amdiic_i2c_release_bus +ffffffff818d2380 T amdiic_i2c_exec +ffffffff818d25e0 T amdiic_read +ffffffff818d2750 T amdiic_wait +ffffffff818d27f0 T amdiic_write +ffffffff818d3000 T nviic_match +ffffffff818d3030 T nviic_attach +ffffffff818d3270 T nviic_i2c_acquire_bus +ffffffff818d32c0 T nviic_i2c_release_bus +ffffffff818d3310 T nviic_i2c_exec +ffffffff818d35a0 T nviic_write +ffffffff818d35f0 T nviic_read +ffffffff818d4000 T sdhc_pci_match +ffffffff818d4060 T sdhc_pci_attach +ffffffff818d43b0 T sdhc_pci_activate +ffffffff818d4410 T sdhc_takecontroller +ffffffff818d44b0 T sdhc_ricohfix +ffffffff818d4620 T sdhc_pci_conf_write +ffffffff818d5000 T kate_match +ffffffff818d5170 T kate_attach +ffffffff818d54b0 T kate_refresh +ffffffff818d6000 T km_match +ffffffff818d6050 T km_attach +ffffffff818d60f0 T km_refresh +ffffffff818d7000 T ksmn_match +ffffffff818d7050 T ksmn_attach +ffffffff818d7240 T ksmn_ccd_attach +ffffffff818d7390 T ksmn_refresh +ffffffff818d74e0 T ksmn_read_reg +ffffffff818d8000 t iosf_pci_match +ffffffff818d8060 t iosf_pci_attach +ffffffff818d8100 t iosf_pci_mbi_mdr_rd +ffffffff818d8160 t iosf_pci_mbi_mdr_wr +ffffffff818d9000 T itherm_probe +ffffffff818d9030 T itherm_attach +ffffffff818d93e0 T itherm_activate +ffffffff818d9460 T itherm_enable +ffffffff818d94c0 T itherm_refresh +ffffffff818d94d0 T itherm_refresh_sensor_data +ffffffff818d98c0 T itherm_bias_temperature_sensor +ffffffff818da000 T pchtemp_match +ffffffff818da030 T pchtemp_attach +ffffffff818da1a0 T pchtemp_refresh +ffffffff818db000 T rtsx_pci_match +ffffffff818db080 T rtsx_pci_attach +ffffffff818dc000 T xspd_match +ffffffff818dc030 T xspd_attach +ffffffff818dc1f0 T xspd_intr +ffffffff818dd000 T virtio_pci_match +ffffffff818dd080 T virtio_pci_attach +ffffffff818dd420 T virtio_pci_detach +ffffffff818dd500 T virtio_pci_kick +ffffffff818dd560 T virtio_pci_read_device_config_1 +ffffffff818dd590 T virtio_pci_read_device_config_2 +ffffffff818dd5c0 T virtio_pci_read_device_config_4 +ffffffff818dd5f0 T virtio_pci_read_device_config_8 +ffffffff818dd670 T virtio_pci_write_device_config_1 +ffffffff818dd6a0 T virtio_pci_write_device_config_2 +ffffffff818dd6d0 T virtio_pci_write_device_config_4 +ffffffff818dd700 T virtio_pci_write_device_config_8 +ffffffff818dd770 T virtio_pci_read_queue_size +ffffffff818dd7e0 T virtio_pci_setup_queue +ffffffff818ddac0 T virtio_pci_set_status +ffffffff818ddbf0 T virtio_pci_negotiate_features +ffffffff818ddd30 T virtio_pci_poll_intr +ffffffff818ddda0 T virtio_pci_find_cap +ffffffff818ddf40 T virtio_pci_attach_10 +ffffffff818de3a0 T virtio_pci_attach_09 +ffffffff818de4e0 T virtio_pci_adjust_config_region +ffffffff818de580 T virtio_pci_setup_msix +ffffffff818de910 T virtio_pci_legacy_intr +ffffffff818de9b0 T virtio_pci_legacy_intr_mpsafe +ffffffff818dea40 T virtio_pci_free_irqs +ffffffff818dec80 T virtio_pci_negotiate_features_10 +ffffffff818deeb0 T virtio_pci_msix_establish +ffffffff818def80 T virtio_pci_set_msix_queue_vector +ffffffff818df000 T virtio_pci_set_msix_config_vector +ffffffff818df040 T virtio_pci_config_intr +ffffffff818df080 T virtio_pci_shared_queue_intr +ffffffff818df090 T virtio_pci_queue_intr +ffffffff818e0000 T dwiic_pci_match +ffffffff818e0030 T dwiic_pci_attach +ffffffff818e0350 T dwiic_pci_activate +ffffffff818e03c0 T dwiic_pci_bus_scan +ffffffff818e1000 T bwfm_pci_buscore_read +ffffffff818e1060 T bwfm_pci_buscore_write +ffffffff818e10d0 T bwfm_pci_buscore_prepare +ffffffff818e1100 T bwfm_pci_buscore_reset +ffffffff818e12f0 T bwfm_pci_buscore_activate +ffffffff818e1320 T bwfm_pci_preinit +ffffffff818e2130 T bwfm_pci_stop +ffffffff818e21c0 T bwfm_pci_txcheck +ffffffff818e2280 T bwfm_pci_txdata +ffffffff818e25d0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818e2a00 T bwfm_pci_msgbuf_set_dcmd +ffffffff818e2a50 T bwfm_pci_match +ffffffff818e2a80 T bwfm_pci_attach +ffffffff818e2cf0 T bwfm_pci_detach +ffffffff818e2d30 T bwfm_pci_activate +ffffffff818e2ee0 T bwfm_pci_intr +ffffffff818e3140 T bwfm_pci_select_core +ffffffff818e3220 T bwfm_pci_load_microcode +ffffffff818e36b0 T bwfm_pci_dmamem_alloc +ffffffff818e3850 T bwfm_pci_setup_ring +ffffffff818e3a50 T bwfm_pci_intr_enable +ffffffff818e3aa0 T bwfm_pci_hostready +ffffffff818e3b10 T bwfm_pci_fill_rx_rings +ffffffff818e3b60 T bwfm_pci_dmamem_free +ffffffff818e3bd0 T bwfm_pci_cleanup +ffffffff818e4240 T bwfm_pci_send_mb_data +ffffffff818e4360 T bwfm_pci_intmask +ffffffff818e43a0 T bwfm_pci_pktid_avail +ffffffff818e4420 T bwfm_pci_pktid_new +ffffffff818e4570 T bwfm_pci_pktid_free +ffffffff818e4620 T bwfm_pci_fill_rx_buf_ring +ffffffff818e4960 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818e4cc0 T bwfm_pci_ring_write_reserve +ffffffff818e4db0 T bwfm_pci_ring_write_cancel +ffffffff818e4df0 T bwfm_pci_ring_write_commit +ffffffff818e4ed0 T bwfm_pci_ring_write_rptr +ffffffff818e4f50 T bwfm_pci_ring_write_wptr +ffffffff818e4fd0 T bwfm_pci_setup_flowring +ffffffff818e5120 T bwfm_pci_ring_bell +ffffffff818e5160 T bwfm_pci_ring_update_rptr +ffffffff818e5210 T bwfm_pci_ring_update_wptr +ffffffff818e52c0 T bwfm_pci_ring_write_reserve_multi +ffffffff818e53e0 T bwfm_pci_ring_read_avail +ffffffff818e54e0 T bwfm_pci_ring_read_commit +ffffffff818e5570 T bwfm_pci_ring_rx +ffffffff818e5770 T bwfm_pci_msg_rx +ffffffff818e5d50 T bwfm_pci_flowring_delete_cb +ffffffff818e5e00 T bwfm_pci_msgbuf_rxioctl +ffffffff818e5ef0 T bwfm_pci_intr_status +ffffffff818e5f30 T bwfm_pci_intr_ack +ffffffff818e5f70 T bwfm_pci_flowring_lookup +ffffffff818e60e0 T bwfm_pci_flowring_create +ffffffff818e6210 T bwfm_pci_flowring_create_cb +ffffffff818e6550 T bwfm_pci_flowring_delete +ffffffff818e6820 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818e6a30 T bwfm_pci_handle_mb_data +ffffffff818e6b00 T bwfm_pci_intr_disable +ffffffff818e7000 T ccp_pci_match +ffffffff818e7030 T ccp_pci_attach +ffffffff818e8000 T bnxt_match +ffffffff818e8030 T bnxt_attach +ffffffff818e8be0 T bnxt_dmamem_alloc +ffffffff818e8d70 T bnxt_dmamem_free +ffffffff818e8e00 T bnxt_hwrm_ver_get +ffffffff818e8f50 T bnxt_hwrm_nvm_get_dev_info +ffffffff818e90a0 T bnxt_hwrm_func_drv_rgtr +ffffffff818e91c0 T bnxt_hwrm_func_rgtr_async_events +ffffffff818e92e0 T bnxt_hwrm_func_qcaps +ffffffff818e93c0 T bnxt_admin_intr +ffffffff818e95b0 T bnxt_intr +ffffffff818e9a60 T bnxt_hwrm_func_qcfg +ffffffff818e9b10 T bnxt_hwrm_queue_qportcfg +ffffffff818e9be0 T bnxt_hwrm_func_reset +ffffffff818e9c90 T bnxt_mark_cpr_invalid +ffffffff818e9cf0 T bnxt_hwrm_ring_alloc +ffffffff818e9ea0 T bnxt_cfg_async_cr +ffffffff818e9fa0 T bnxt_write_cp_doorbell +ffffffff818e9fe0 T bnxt_set_cp_ring_aggint +ffffffff818ea0c0 T bnxt_ioctl +ffffffff818ea250 T bnxt_start +ffffffff818ea7c0 T bnxt_watchdog +ffffffff818ea7f0 T bnxt_media_change +ffffffff818ea940 T bnxt_media_status +ffffffff818ea960 T bnxt_refill +ffffffff818ea9c0 T bnxt_media_autonegotiate +ffffffff818eaab0 T bnxt_hwrm_port_phy_qcfg +ffffffff818eaf30 T bnxt_free_slots +ffffffff818eafd0 T bnxt_hwrm_cmd_hdr_init +ffffffff818eb020 T hwrm_send_message +ffffffff818eb0a0 T bnxt_queue_up +ffffffff818ebc20 T bnxt_hwrm_stat_ctx_alloc +ffffffff818ebd20 T bnxt_write_tx_doorbell +ffffffff818ebd90 T bnxt_write_rx_doorbell +ffffffff818ebe10 T bnxt_hwrm_ring_grp_alloc +ffffffff818ebf10 T bnxt_rx_fill +ffffffff818ec020 T bnxt_hwrm_ring_grp_free +ffffffff818ec100 T bnxt_hwrm_ring_free +ffffffff818ec1f0 T bnxt_hwrm_stat_ctx_free +ffffffff818ec2e0 T bnxt_queue_down +ffffffff818eca00 T bnxt_up +ffffffff818ecf90 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818ed070 T bnxt_hwrm_vnic_alloc +ffffffff818ed170 T bnxt_hwrm_vnic_cfg +ffffffff818ed2b0 T bnxt_hwrm_vnic_cfg_placement +ffffffff818ed380 T bnxt_hwrm_set_filter +ffffffff818ed510 T bnxt_hwrm_vnic_rss_cfg +ffffffff818ed5f0 T bnxt_iff +ffffffff818ed760 T bnxt_hwrm_vnic_free +ffffffff818ed850 T bnxt_hwrm_vnic_ctx_free +ffffffff818ed940 T bnxt_down +ffffffff818edd10 T bnxt_hwrm_free_filter +ffffffff818eddf0 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff818eded0 T bnxt_rxrinfo +ffffffff818ee020 T bnxt_get_sffpage +ffffffff818ee330 T bnxt_load_mbuf +ffffffff818ee3e0 T bnxt_handle_async_event +ffffffff818ee430 T bnxt_cpr_next_cmpl +ffffffff818ee4a0 T bnxt_cpr_commit +ffffffff818ee4d0 T bnxt_cpr_rollback +ffffffff818ee500 T bnxt_write_cp_doorbell_index +ffffffff818ee580 T bnxt_rx +ffffffff818ee820 T bnxt_txeof +ffffffff818ee950 T bnxt_get_media_type +ffffffff818eeeb0 T bnxt_add_media_type +ffffffff818ef070 T _hwrm_send_message +ffffffff818f1d90 T bnxt_rx_fill_slots +ffffffff818f1f70 T bnxt_hwrm_err_map +ffffffff818f1fb0 T _bnxt_hwrm_set_async_event_bit +ffffffff818f2000 t mcx_match +ffffffff818f2030 t mcx_attach +ffffffff818f2c40 T mcx_rx_fill +ffffffff818f2e90 T mcx_load_mbuf +ffffffff818f2f40 t mcx_dmamem_alloc +ffffffff818f30a0 t mcx_init_wait +ffffffff818f3130 t mcx_enable_hca +ffffffff818f3310 t mcx_issi +ffffffff818f3680 t mcx_pages +ffffffff818f3fe0 t mcx_hca_max_caps +ffffffff818f4560 t mcx_hca_set_caps +ffffffff818f4a40 t mcx_init_hca +ffffffff818f4c10 t mcx_set_driver_version +ffffffff818f4f70 t mcx_iff +ffffffff818f53b0 t mcx_alloc_uar +ffffffff818f55a0 t mcx_alloc_pd +ffffffff818f5780 t mcx_alloc_tdomain +ffffffff818f5960 t mcx_admin_intr +ffffffff818f5b10 t mcx_create_eq +ffffffff818f60b0 t mcx_query_nic_vport_context +ffffffff818f6460 t mcx_query_special_contexts +ffffffff818f6640 t mcx_set_port_mtu +ffffffff818f6750 t mcx_ioctl +ffffffff818f8a20 t mcx_start +ffffffff818f8f10 t mcx_watchdog +ffffffff818f8f40 t mcx_media_change +ffffffff818f9270 t mcx_media_status +ffffffff818f9410 t mcx_media_add_types +ffffffff818f9580 t mcx_refill +ffffffff818f95f0 t mcx_cq_intr +ffffffff818f9bd0 t mcx_calibrate +ffffffff818f9d70 t mcx_port_change +ffffffff818f9f70 t mcx_kstat_attach +ffffffff818fa340 t mcx_teardown_hca +ffffffff818fa530 t mcx_dmamem_free +ffffffff818fa5a0 t mcx_set_issi +ffffffff818fa750 t mcx_set_flow_table_entry_mac +ffffffff818fac20 t mcx_delete_flow_table_entry +ffffffff818fb0a0 t mcx_access_hca_reg +ffffffff818fb4d0 t mcx_cmdq_exec +ffffffff818fb750 t mcx_down +ffffffff818fc710 t mcx_create_flow_table +ffffffff818fcac0 t mcx_create_flow_group +ffffffff818fcf90 t mcx_set_flow_table_root +ffffffff818fd310 t mcx_create_rqt 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+ffffffff819076f0 T rge_ifmedia_upd +ffffffff81907cc0 T rge_ifmedia_sts +ffffffff81907db0 T rge_add_media_types +ffffffff81907e60 T rge_kstat_attach +ffffffff81908140 T rge_wol_power +ffffffff81908220 T rge_rxeof +ffffffff81908660 T rge_txeof +ffffffff81908870 T rge_init +ffffffff81909f20 T rge_setup_intr +ffffffff8190a090 T rge_encap +ffffffff8190a360 T rge_stop +ffffffff8190a640 T rge_iff +ffffffff8190a7c0 T rge_set_macaddr +ffffffff8190a890 T rge_rx_list_init +ffffffff8190a950 T rge_tx_list_init +ffffffff8190aa20 T rge_phy_config +ffffffff8190b6d0 T rge_disable_aspm_clkreq +ffffffff8190b7d0 T rge_read_csi +ffffffff8190b880 T rge_write_csi +ffffffff8190b950 T rge_write_mac_ocp +ffffffff8190b9a0 T rge_read_mac_ocp +ffffffff8190ba20 T rge_hw_reset +ffffffff8190bb20 T rge_write_phy_ocp +ffffffff8190bbe0 T rge_read_phy_ocp +ffffffff8190bc90 T rge_read_phy +ffffffff8190bd60 T rge_write_phy +ffffffff8190be40 T rge_get_link_status +ffffffff8190bea0 T rge_newbuf +ffffffff8190c030 T rge_discard_rxbuf +ffffffff8190c0a0 T rge_fill_rx_ring +ffffffff8190c120 T rge_reset +ffffffff8190c390 T rge_exit_oob +ffffffff8190cb90 T rge_set_phy_power +ffffffff8190cdf0 T rge_hw_init +ffffffff8190d540 T rge_ephy_config +ffffffff8190d590 T rge_ephy_config_mac_cfg3 +ffffffff8190d7e0 T rge_ephy_config_mac_cfg5 +ffffffff8190d8c0 T rge_write_ephy +ffffffff8190db20 T rge_read_ephy +ffffffff8190dda0 T rge_phy_config_mac_cfg3 +ffffffff8190f8d0 T rge_phy_config_mac_cfg5 +ffffffff81910420 T rge_patch_phy_mcu +ffffffff81910740 T rge_phy_config_mcu +ffffffff81910f40 T rge_switch_mcu_ram_page +ffffffff81910fd0 T rge_disable_phy_ocp_pwrsave +ffffffff819111a0 T rge_disable_hw_im +ffffffff819111d0 T rge_disable_sim_im +ffffffff81911230 T rge_setup_sim_im +ffffffff819112b0 T rge_link_state +ffffffff81911330 t rge_kstat_read +ffffffff819114d0 t rge_kstat_copy +ffffffff81912000 T igc_match +ffffffff81912030 T igc_attach +ffffffff81912360 T igc_detach +ffffffff81912550 T igc_identify_hardware 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T drm_atomic_helper_disable_planes_on_crtc +ffffffff8193dcd0 T drm_atomic_helper_update_plane +ffffffff8193de00 T drm_atomic_helper_disable_plane +ffffffff8193dec0 T drm_atomic_helper_set_config +ffffffff8193df70 T drm_atomic_helper_disable_all +ffffffff8193e120 T drm_atomic_helper_shutdown +ffffffff8193e270 T drm_atomic_helper_duplicate_state +ffffffff8193e3c0 T drm_atomic_helper_suspend +ffffffff8193e510 T drm_atomic_helper_commit_duplicated_state +ffffffff8193e650 T drm_atomic_helper_resume +ffffffff8193e780 T drm_atomic_helper_page_flip +ffffffff8193e840 t page_flip_common +ffffffff8193e940 T drm_atomic_helper_page_flip_target +ffffffff8193ea60 T drm_atomic_helper_bridge_propagate_bus_fmt +ffffffff8193ead0 t set_best_encoder +ffffffff8193f000 T __drm_atomic_helper_crtc_state_reset +ffffffff8193f030 T __drm_atomic_helper_crtc_reset +ffffffff8193f090 T drm_atomic_helper_crtc_reset +ffffffff8193f130 T __drm_atomic_helper_crtc_duplicate_state +ffffffff8193f200 T drm_atomic_helper_crtc_duplicate_state +ffffffff8193f2a0 T __drm_atomic_helper_crtc_destroy_state +ffffffff8193f360 T drm_atomic_helper_crtc_destroy_state +ffffffff8193f390 T __drm_atomic_helper_plane_state_reset +ffffffff8193f460 T __drm_atomic_helper_plane_reset +ffffffff8193f4c0 T drm_atomic_helper_plane_reset +ffffffff8193f5a0 T __drm_atomic_helper_plane_destroy_state +ffffffff8193f610 T __drm_atomic_helper_plane_duplicate_state +ffffffff8193f690 T drm_atomic_helper_plane_duplicate_state +ffffffff8193f770 T drm_atomic_helper_plane_destroy_state +ffffffff8193f7f0 T __drm_atomic_helper_connector_state_reset +ffffffff8193f820 T __drm_atomic_helper_connector_reset +ffffffff8193f860 T drm_atomic_helper_connector_reset +ffffffff8193f930 T __drm_atomic_helper_connector_destroy_state +ffffffff8193f990 T drm_atomic_helper_connector_tv_margins_reset +ffffffff8193f9f0 T drm_atomic_helper_connector_tv_reset +ffffffff8193fbf0 T drm_atomic_helper_connector_tv_check +ffffffff8193fcd0 T __drm_atomic_helper_connector_duplicate_state +ffffffff8193fd60 T drm_atomic_helper_connector_duplicate_state +ffffffff8193fe40 T drm_atomic_helper_connector_destroy_state +ffffffff8193feb0 T __drm_atomic_helper_private_obj_duplicate_state +ffffffff8193fef0 T __drm_atomic_helper_bridge_duplicate_state +ffffffff8193ff30 T drm_atomic_helper_bridge_duplicate_state +ffffffff8193ffe0 T drm_atomic_helper_bridge_destroy_state +ffffffff81940000 T __drm_atomic_helper_bridge_reset +ffffffff81940050 T drm_atomic_helper_bridge_reset +ffffffff81941000 T drm_atomic_set_mode_for_crtc +ffffffff81941220 T drm_atomic_set_mode_prop_for_crtc +ffffffff819414b0 T drm_atomic_set_crtc_for_plane +ffffffff81941620 T drm_atomic_set_fb_for_plane +ffffffff81941700 T drm_atomic_set_crtc_for_connector +ffffffff81941860 T drm_atomic_get_property +ffffffff81941fc0 T drm_atomic_connector_commit_dpms +ffffffff81942100 T drm_atomic_set_property +ffffffff81942c00 T drm_mode_atomic_ioctl +ffffffff819430a0 t prepare_signaling +ffffffff81943530 t complete_signaling +ffffffff81943700 t drm_atomic_replace_property_blob_from_id +ffffffff81943870 t drm_atomic_set_writeback_fb_for_connector +ffffffff819438e0 t set_out_fence_for_connector +ffffffff81944000 T drm_is_current_master +ffffffff81944060 T drm_getmagic +ffffffff81944130 T drm_authmagic +ffffffff819441f0 T drm_master_create +ffffffff81944290 T drm_setmaster_ioctl +ffffffff81944350 t drm_new_set_master +ffffffff819444e0 T drm_dropmaster_ioctl +ffffffff819445c0 t drm_drop_master +ffffffff81944670 T drm_master_open +ffffffff81944720 T drm_master_get +ffffffff81944750 T drm_master_release +ffffffff81944830 T drm_master_put +ffffffff819448c0 T drm_file_get_master +ffffffff81944920 T drm_master_internal_acquire +ffffffff81944990 T drm_master_internal_release +ffffffff81945000 T drm_plane_create_alpha_property +ffffffff819450a0 T drm_plane_create_rotation_property +ffffffff819451e0 T drm_rotation_simplify +ffffffff81945250 T drm_plane_create_zpos_property +ffffffff81945310 T drm_plane_create_zpos_immutable_property +ffffffff819453c0 T drm_atomic_normalize_zpos +ffffffff819456b0 T drm_plane_create_blend_mode_property +ffffffff81945850 t drm_atomic_state_zpos_cmp +ffffffff81946000 T drm_bridge_add +ffffffff81946070 T devm_drm_bridge_add +ffffffff81946110 T drm_bridge_remove +ffffffff81946170 T drm_bridge_attach +ffffffff81946330 T drm_bridge_detach +ffffffff81946420 T drm_bridge_chain_mode_fixup +ffffffff819464c0 T drm_bridge_chain_mode_valid +ffffffff81946560 T drm_bridge_chain_mode_set +ffffffff819465f0 T drm_atomic_bridge_chain_disable +ffffffff819466f0 T drm_atomic_bridge_chain_post_disable +ffffffff81946920 T drm_atomic_bridge_chain_pre_enable +ffffffff81946b60 T drm_atomic_bridge_chain_enable +ffffffff81946c70 T drm_atomic_bridge_chain_check +ffffffff81947000 T drm_bridge_detect +ffffffff81947060 T drm_bridge_get_modes +ffffffff819470c0 T drm_bridge_edid_read +ffffffff81947180 T drm_bridge_get_edid +ffffffff819471e0 T drm_bridge_hpd_enable +ffffffff819472b0 T drm_bridge_hpd_disable +ffffffff81947350 T drm_bridge_hpd_notify +ffffffff819473b0 t drm_bridge_atomic_duplicate_priv_state +ffffffff819473d0 t drm_bridge_atomic_destroy_priv_state +ffffffff819473f0 t select_bus_fmt_recursive +ffffffff81948000 T drm_buddy_init +ffffffff81948470 T drm_buddy_fini +ffffffff81948560 T drm_get_buddy +ffffffff819485a0 T drm_buddy_free_block +ffffffff819485f0 t __drm_buddy_free +ffffffff81948740 T drm_buddy_free_list +ffffffff81948800 T drm_buddy_block_trim +ffffffff81948a60 t __alloc_range +ffffffff81948d40 T drm_buddy_alloc_blocks +ffffffff819493c0 t __drm_buddy_alloc_range +ffffffff81949450 T drm_buddy_block_print +ffffffff81949490 T drm_buddy_print +ffffffff81949600 T drm_buddy_module_exit +ffffffff81949620 T drm_buddy_module_init +ffffffff81949680 t split_block +ffffffff8194a000 T drm_clflush_pages +ffffffff8194a0e0 T drm_clflush_sg +ffffffff8194a1f0 T drm_clflush_virt_range +ffffffff8194a290 T drm_need_swiotlb +ffffffff8194a2c0 T drm_memcpy_from_wc +ffffffff8194a760 T drm_memcpy_init_early +ffffffff8194b000 T drm_client_init +ffffffff8194b110 T drm_client_register +ffffffff8194b1c0 T drm_client_release +ffffffff8194b260 T drm_client_dev_unregister +ffffffff8194b350 T drm_client_dev_hotplug +ffffffff8194b480 T drm_client_dev_restore +ffffffff8194b560 T drm_client_buffer_vmap +ffffffff8194b5d0 T drm_client_buffer_vunmap +ffffffff8194b5f0 T drm_client_framebuffer_create +ffffffff8194b890 T drm_client_framebuffer_delete +ffffffff8194b980 T drm_client_framebuffer_flush +ffffffff8194c000 T drm_client_modeset_create +ffffffff8194c140 T drm_client_modeset_free +ffffffff8194c240 T drm_client_modeset_probe +ffffffff8194d9a0 t drm_client_pick_crtcs +ffffffff8194dc80 T drm_client_rotation +ffffffff8194de20 T drm_client_modeset_check +ffffffff8194dec0 t drm_client_modeset_commit_atomic +ffffffff8194e0c0 T drm_client_modeset_commit_locked +ffffffff8194e260 T drm_client_modeset_commit +ffffffff8194e2d0 T drm_client_modeset_dpms +ffffffff8194e520 t drm_connector_pick_cmdline_mode +ffffffff8194f000 T drm_color_ctm_s31_32_to_qm_n +ffffffff8194f0d0 T drm_crtc_enable_color_mgmt +ffffffff8194f1b0 T drm_mode_crtc_set_gamma_size +ffffffff8194f2d0 T drm_mode_gamma_set_ioctl +ffffffff8194f7b0 T drm_mode_gamma_get_ioctl +ffffffff8194f8f0 T drm_get_color_encoding_name +ffffffff8194f960 T drm_get_color_range_name +ffffffff8194f9d0 T drm_plane_create_color_properties +ffffffff8194fc30 T drm_color_lut_check +ffffffff81950000 T drm_connector_ida_init +ffffffff81950110 T drm_connector_ida_destroy +ffffffff81950220 T drm_get_connector_type_name +ffffffff81950260 T drm_connector_free_work_fn +ffffffff81950320 T drm_connector_init +ffffffff819503a0 t __drm_connector_init +ffffffff81950710 T drm_connector_init_with_ddc +ffffffff819507a0 T drmm_connector_init +ffffffff81950860 t drm_connector_cleanup_action +ffffffff81950880 T drm_connector_attach_edid_property +ffffffff819508a0 T drm_connector_attach_encoder +ffffffff81950920 T drm_connector_has_possible_encoder +ffffffff81950960 T drm_connector_cleanup +ffffffff81950ca0 T drm_connector_unregister +ffffffff81950d40 T drm_mode_put_tile_group +ffffffff81950dd0 T drm_connector_register +ffffffff81950ec0 T drm_connector_unregister_all +ffffffff81951060 T drm_connector_list_iter_begin +ffffffff819510a0 T drm_connector_list_iter_next +ffffffff819511b0 T drm_connector_list_iter_end +ffffffff81951280 T drm_connector_register_all +ffffffff81951410 T drm_get_connector_status_name +ffffffff81951460 T drm_get_connector_force_name +ffffffff819514a0 T drm_get_subpixel_order_name +ffffffff819514e0 T drm_get_dpms_name +ffffffff81951520 T drm_display_info_set_bus_formats +ffffffff819515f0 T drm_get_dvi_i_select_name +ffffffff81951650 T drm_get_dvi_i_subconnector_name +ffffffff819516b0 T drm_get_tv_mode_name +ffffffff819516f0 T drm_get_tv_mode_from_name +ffffffff81951890 T drm_get_tv_select_name +ffffffff819518f0 T drm_get_tv_subconnector_name +ffffffff81951950 T drm_get_dp_subconnector_name +ffffffff819519e0 T drm_get_colorspace_name +ffffffff81951a20 T drm_connector_create_standard_properties +ffffffff81951ba0 T drm_mode_create_dvi_i_properties +ffffffff81951c40 T drm_connector_attach_dp_subconnector_property +ffffffff81951cb0 T drm_connector_attach_content_type_property +ffffffff81951d50 T drm_mode_create_content_type_property +ffffffff81951dd0 T drm_connector_attach_tv_margin_properties +ffffffff81951e40 T drm_mode_create_tv_margin_properties +ffffffff81951f60 T drm_mode_create_tv_properties_legacy +ffffffff819521b0 T drm_mode_create_tv_properties +ffffffff81952390 T drm_mode_create_scaling_mode_property +ffffffff81952400 T drm_connector_attach_vrr_capable_property +ffffffff81952490 T drm_connector_attach_scaling_mode_property +ffffffff81952660 T drm_mode_create_aspect_ratio_property +ffffffff819526e0 T drm_mode_create_hdmi_colorspace_property +ffffffff81952700 t drm_mode_create_colorspace_property +ffffffff81952840 T drm_mode_create_dp_colorspace_property +ffffffff81952870 T drm_mode_create_suggested_offset_properties +ffffffff81952940 T drm_connector_set_path_property +ffffffff819529a0 T drm_connector_set_tile_property +ffffffff81952af0 T drm_connector_set_link_status_property +ffffffff81952b40 T drm_connector_attach_max_bpc_property +ffffffff81952c00 T drm_connector_attach_hdr_output_metadata_property +ffffffff81952c50 T drm_connector_attach_colorspace_property +ffffffff81952ca0 T drm_connector_atomic_hdr_metadata_equal +ffffffff81952d10 T drm_connector_set_vrr_capable_property +ffffffff81952d60 T drm_connector_set_panel_orientation +ffffffff81952e30 T drm_connector_set_panel_orientation_with_quirk +ffffffff81952f10 T drm_connector_set_orientation_from_panel +ffffffff81953000 T drm_connector_create_privacy_screen_properties +ffffffff819530a0 T drm_connector_attach_privacy_screen_properties +ffffffff81953110 T drm_connector_attach_privacy_screen_provider +ffffffff81953220 t drm_connector_privacy_screen_notifier +ffffffff819532c0 T drm_connector_update_privacy_screen +ffffffff81953330 T drm_connector_set_obj_prop +ffffffff81953410 T drm_connector_property_set_ioctl +ffffffff81953470 T drm_mode_getconnector +ffffffff81953970 T drm_connector_find_by_fwnode +ffffffff81953a20 T drm_connector_oob_hotplug_event +ffffffff81953b10 T drm_mode_get_tile_group +ffffffff81953be0 T drm_mode_create_tile_group +ffffffff81953cb0 t drm_connector_free +ffffffff81953cf0 t kasprintf +ffffffff81954000 T drm_crtc_from_index +ffffffff81954060 T drm_crtc_force_disable +ffffffff819541a0 T drm_mode_set_config_internal +ffffffff81954220 T drm_crtc_register_all +ffffffff819542a0 T drm_crtc_unregister_all +ffffffff81954310 T drm_crtc_create_fence +ffffffff819543a0 T drm_crtc_init_with_planes +ffffffff81954470 t __drm_crtc_init_with_planes +ffffffff81954870 T drmm_crtc_init_with_planes +ffffffff81954970 T __drmm_crtc_alloc_with_planes +ffffffff81954ae0 T drm_crtc_cleanup +ffffffff81954c00 T drm_mode_getcrtc +ffffffff81954da0 t __drm_mode_set_config_internal +ffffffff81954f50 T drm_crtc_check_viewport +ffffffff81955000 T drm_mode_setcrtc +ffffffff81955780 T drm_mode_crtc_set_obj_prop +ffffffff81955800 T drm_crtc_create_scaling_filter_property +ffffffff81955870 t drm_crtc_fence_get_driver_name +ffffffff819558f0 t drm_crtc_fence_get_timeline_name +ffffffff81955960 t kasprintf +ffffffff81955a30 t drmm_crtc_init_with_planes_cleanup +ffffffff81956000 T drm_helper_encoder_in_use +ffffffff81956180 T drm_helper_crtc_in_use +ffffffff819562b0 T drm_helper_disable_unused_functions +ffffffff81956330 t __drm_helper_disable_unused_functions +ffffffff81956450 T drm_crtc_helper_set_mode +ffffffff819568f0 T drm_crtc_helper_atomic_check +ffffffff81956940 T drm_connector_get_single_encoder +ffffffff81956a20 T drm_crtc_helper_set_config +ffffffff81957660 T drm_helper_connector_dpms +ffffffff81957930 T drm_helper_resume_force_mode +ffffffff81957c30 T drm_helper_force_disable_all +ffffffff81958000 T drm_atomic_helper_check_plane_damage +ffffffff819580a0 T drm_atomic_helper_dirtyfb +ffffffff81958350 T drm_atomic_helper_damage_iter_init +ffffffff819584a0 T drm_atomic_helper_damage_iter_next +ffffffff81958540 T drm_atomic_helper_damage_merged +ffffffff81959000 T displayid_iter_edid_begin +ffffffff81959050 T __displayid_iter_next +ffffffff81959300 T displayid_iter_end +ffffffff81959350 T displayid_version +ffffffff81959380 T displayid_primary_use +ffffffff8195a000 T drm_mode_create_dumb +ffffffff8195a0e0 T drm_mode_create_dumb_ioctl +ffffffff8195a1c0 T drm_mode_mmap_dumb_ioctl +ffffffff8195a230 T drm_mode_destroy_dumb +ffffffff8195a280 T drm_mode_destroy_dumb_ioctl +ffffffff8195b000 T drm_edid_header_is_valid +ffffffff8195b080 T drm_edid_are_equal +ffffffff8195b0f0 T drm_edid_block_valid +ffffffff8195b300 t edid_block_check +ffffffff8195b430 t edid_block_status_print +ffffffff8195b520 T drm_edid_is_valid +ffffffff8195b5a0 T drm_edid_valid +ffffffff8195b6d0 t drm_edid_block_count +ffffffff8195b810 T drm_edid_override_show +ffffffff8195b860 T drm_edid_override_set +ffffffff8195ba00 T drm_edid_alloc +ffffffff8195bac0 T drm_edid_free +ffffffff8195bb20 T drm_edid_override_reset +ffffffff8195bbe0 T drm_edid_override_connector_update +ffffffff8195bcb0 t drm_edid_override_get +ffffffff8195bda0 T drm_edid_connector_update +ffffffff8195c1f0 T drm_edid_connector_add_modes +ffffffff8195c310 T drm_do_get_edid +ffffffff8195c330 t _drm_do_get_edid +ffffffff8195c750 T drm_edid_raw +ffffffff8195c7e0 T drm_edid_dup +ffffffff8195c8b0 T drm_probe_ddc +ffffffff8195c9b0 t drm_do_probe_ddc_edid +ffffffff8195cb00 T drm_get_edid +ffffffff8195cc70 T drm_connector_update_edid_property +ffffffff8195ccd0 T drm_edid_read_custom +ffffffff8195cdc0 T drm_edid_read_ddc +ffffffff8195cef0 T drm_edid_read +ffffffff8195cf70 T drm_edid_get_panel_id +ffffffff8195d0f0 t edid_block_read +ffffffff8195d360 T drm_get_edid_switcheroo +ffffffff8195d3b0 T drm_edid_read_switcheroo +ffffffff8195d400 T drm_edid_duplicate +ffffffff8195d480 T drm_mode_find_dmt +ffffffff8195d5a0 T drm_mode_fixup_1366x768 +ffffffff8195d5f0 T drm_find_edid_extension +ffffffff8195d690 T drm_match_cea_mode +ffffffff8195d910 T drm_display_mode_from_cea_vic +ffffffff8195d980 T drm_edid_get_monitor_name +ffffffff8195da20 t get_monitor_name +ffffffff8195de80 T drm_edid_to_sad +ffffffff8195e080 T drm_edid_to_speaker_allocation +ffffffff8195e230 T drm_av_sync_delay +ffffffff8195e2e0 T drm_detect_hdmi_monitor +ffffffff8195e400 T drm_detect_monitor_audio +ffffffff8195e590 T drm_default_rgb_quant_range +ffffffff8195e5d0 t update_display_info +ffffffff8195fd90 t _drm_edid_connector_add_modes +ffffffff81961330 T drm_add_edid_modes +ffffffff81961430 T drm_add_modes_noedid +ffffffff81961520 T drm_set_preferred_mode +ffffffff81961580 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff81961840 T drm_hdmi_avi_infoframe_quant_range +ffffffff819618e0 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff819619a0 t connector_bad_edid +ffffffff81961b60 t edid_filter_invalid_blocks +ffffffff81961cf0 t drm_for_each_detailed_block +ffffffff81961e90 t __cea_db_iter_next +ffffffff819620a0 t get_monitor_range +ffffffff81962140 t do_detailed_mode +ffffffff81962b50 t do_cvt_mode +ffffffff81962d90 t drm_mode_std +ffffffff81963770 t do_standard_modes +ffffffff819638b0 t drm_monitor_supports_rb +ffffffff81963cc0 t drm_gtf2_mode +ffffffff81964a70 t drm_gtf2_hbreak +ffffffff81964de0 t do_established_modes +ffffffff81964fe0 t drm_match_hdmi_mode +ffffffff81965160 t do_inferred_modes +ffffffff81965820 t mode_in_range +ffffffff81966000 T drm_encoder_register_all +ffffffff81966080 T drm_encoder_unregister_all +ffffffff819660f0 T drm_encoder_init +ffffffff819661c0 t __drm_encoder_init +ffffffff81966380 T drm_encoder_cleanup +ffffffff819664b0 T __drmm_encoder_alloc +ffffffff819665d0 T drmm_encoder_init +ffffffff819666b0 T drm_mode_getencoder +ffffffff81966830 t kasprintf +ffffffff81966900 t drmm_encoder_alloc_release +ffffffff81967000 T drm_i2c_encoder_dpms +ffffffff81967020 T drm_i2c_encoder_mode_fixup +ffffffff81967060 T drm_i2c_encoder_prepare +ffffffff81967080 T drm_i2c_encoder_commit +ffffffff819670a0 T drm_i2c_encoder_mode_set +ffffffff819670c0 T drm_i2c_encoder_detect +ffffffff819670e0 T drm_i2c_encoder_save +ffffffff81967100 T drm_i2c_encoder_restore +ffffffff81968000 T drm_exec_init +ffffffff81968080 T drm_exec_fini +ffffffff81968100 t drm_exec_unlock_all +ffffffff81968280 T drm_exec_cleanup +ffffffff81968310 T drm_exec_lock_obj +ffffffff819685a0 t drm_exec_obj_locked +ffffffff81968670 t dma_resv_unlock +ffffffff81968710 T drm_exec_unlock_obj +ffffffff819688a0 T drm_exec_prepare_obj +ffffffff81968920 T drm_exec_prepare_array +ffffffff819689d0 t dma_resv_lock_slow_interruptible +ffffffff81968b00 t dma_resv_lock_slow +ffffffff81968bf0 t __ww_mutex_lock +ffffffff81969000 T drm_fb_helper_debug_enter +ffffffff81969100 T drm_fb_helper_debug_leave +ffffffff81969270 T drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81969310 t __drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff819693c0 T drm_fb_helper_blank +ffffffff819694b0 T drm_fb_helper_prepare +ffffffff819695a0 t drm_fb_helper_resume_worker +ffffffff819695d0 t drm_fb_helper_damage_work +ffffffff81969730 T drm_fb_helper_unprepare +ffffffff81969760 T drm_fb_helper_init +ffffffff819697d0 T drm_fb_helper_alloc_info +ffffffff81969830 T drm_fb_helper_release_info +ffffffff81969880 T drm_fb_helper_unregister_info +ffffffff819698b0 T drm_fb_helper_fini +ffffffff819699b0 T drm_fb_helper_set_suspend +ffffffff819699e0 T drm_fb_helper_set_suspend_unlocked +ffffffff81969a10 T drm_fb_helper_set_par +ffffffff81969ac0 T drm_fb_helper_pan_display +ffffffff81969b90 T drm_fb_helper_fill_info +ffffffff81969c50 T drm_fb_helper_initial_config +ffffffff81969c80 t __drm_fb_helper_initial_config_and_unlock +ffffffff8196a2c0 T drm_fb_helper_hotplug_event +ffffffff8196a3f0 t drm_setup_crtcs_fb +ffffffff8196a530 T drm_fb_helper_lastclose +ffffffff8196a5e0 T drm_fb_helper_output_poll_changed +ffffffff8196b000 T drm_fb_dma_get_gem_obj +ffffffff8196c000 T drm_fbdev_dma_setup +ffffffff8196c190 t drm_fbdev_dma_helper_fb_probe +ffffffff8196c390 t drm_fbdev_dma_client_unregister +ffffffff8196c3e0 t drm_fbdev_dma_client_restore +ffffffff8196c420 t drm_fbdev_dma_client_hotplug +ffffffff8196d000 T drm_fbdev_generic_setup +ffffffff8196d190 t drm_fbdev_generic_helper_fb_probe +ffffffff8196d300 t drm_fbdev_generic_helper_fb_dirty +ffffffff8196d5b0 t drm_fbdev_generic_client_unregister +ffffffff8196d600 t drm_fbdev_generic_client_restore +ffffffff8196d640 t drm_fbdev_generic_client_hotplug +ffffffff8196e000 T drm_dev_needs_global_mutex +ffffffff8196e060 T drm_file_alloc +ffffffff8196e2e0 T drm_file_free +ffffffff8196e530 T drm_lastclose +ffffffff8196e5a0 T drm_release +ffffffff8196e5f0 T drm_file_update_pid +ffffffff8196e640 T drm_release_noglobal +ffffffff8196e690 T drm_read +ffffffff8196e6e0 T drm_event_reserve_init_locked +ffffffff8196e760 T drm_event_reserve_init +ffffffff8196e820 T drm_event_cancel_free +ffffffff8196e8a0 T drm_send_event_timestamp_locked +ffffffff8196e8b0 t drm_send_event_helper +ffffffff8196ea80 T drm_send_event_locked +ffffffff8196eaa0 T drm_send_event +ffffffff8196eaf0 T drm_print_memory_stats +ffffffff8196ed70 T drm_show_memory_stats +ffffffff8196efb0 T drm_show_fdinfo +ffffffff8196efd0 T mock_drm_getfile +ffffffff81970000 T drm_flip_work_allocate_task +ffffffff81970060 T drm_flip_work_queue_task +ffffffff819700b0 T drm_flip_work_queue +ffffffff81970150 T drm_flip_work_commit +ffffffff819701d0 T drm_flip_work_init +ffffffff81970240 t flip_worker +ffffffff81970320 T drm_flip_work_cleanup +ffffffff81971000 T drm_fb_clip_offset +ffffffff81971040 T drm_fb_memcpy +ffffffff819712f0 T drm_fb_swab +ffffffff81971400 t drm_fb_swab32_line +ffffffff81971460 t drm_fb_swab16_line +ffffffff819714c0 t drm_fb_xfrm +ffffffff819717b0 T drm_fb_xrgb8888_to_rgb332 +ffffffff81971810 t drm_fb_xrgb8888_to_rgb332_line +ffffffff81971910 T drm_fb_xrgb8888_to_rgb565 +ffffffff81971990 t drm_fb_xrgb8888_to_rgb565_swab_line +ffffffff81971ab0 t drm_fb_xrgb8888_to_rgb565_line +ffffffff81971bc0 T drm_fb_xrgb8888_to_xrgb1555 +ffffffff81971c20 t drm_fb_xrgb8888_to_xrgb1555_line +ffffffff81971d30 T drm_fb_xrgb8888_to_argb1555 +ffffffff81971d90 t drm_fb_xrgb8888_to_argb1555_line +ffffffff81971eb0 T drm_fb_xrgb8888_to_rgba5551 +ffffffff81971f10 t drm_fb_xrgb8888_to_rgba5551_line +ffffffff81972020 T drm_fb_xrgb8888_to_rgb888 +ffffffff81972080 t drm_fb_xrgb8888_to_rgb888_line +ffffffff81972110 T drm_fb_xrgb8888_to_argb8888 +ffffffff81972170 t drm_fb_xrgb8888_to_argb8888_line +ffffffff81972240 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff819722a0 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff81972320 T drm_fb_xrgb8888_to_argb2101010 +ffffffff81972380 t drm_fb_xrgb8888_to_argb2101010_line +ffffffff81972410 T drm_fb_xrgb8888_to_gray8 +ffffffff81972470 t drm_fb_xrgb8888_to_gray8_line +ffffffff819724e0 T drm_fb_blit +ffffffff81972b60 T drm_fb_xrgb8888_to_mono +ffffffff81972ef0 T drm_fb_build_fourcc_list +ffffffff819731d0 t drm_fb_xrgb8888_to_xbgr8888_line +ffffffff819732b0 t drm_fb_xrgb8888_to_abgr8888_line +ffffffff81974000 T drm_mode_legacy_fb_format +ffffffff819740f0 T drm_driver_legacy_fb_format +ffffffff819741f0 T __drm_format_info +ffffffff81974270 T drm_format_info +ffffffff81974320 T drm_get_format_info +ffffffff819743f0 T drm_format_info_block_width +ffffffff81974440 T drm_format_info_block_height +ffffffff81974490 T drm_format_info_bpp +ffffffff81974510 T drm_format_info_min_pitch +ffffffff81975000 T drm_framebuffer_check_src_coords +ffffffff81975120 T drm_mode_addfb +ffffffff81975330 T drm_mode_addfb2 +ffffffff81975430 T drm_mode_addfb_ioctl +ffffffff81975450 T drm_internal_framebuffer_create +ffffffff81975a30 T drm_mode_addfb2_ioctl +ffffffff81975b30 T drm_mode_rmfb +ffffffff81975d10 T drm_framebuffer_lookup +ffffffff81975d60 t drm_mode_rmfb_work_fn +ffffffff81975e20 T drm_mode_rmfb_ioctl +ffffffff81975e40 T drm_mode_getfb +ffffffff81975f90 T drm_mode_getfb2_ioctl +ffffffff81976350 T drm_mode_dirtyfb_ioctl +ffffffff819764f0 T drm_fb_release +ffffffff81976600 T drm_framebuffer_free +ffffffff81976640 T drm_framebuffer_init +ffffffff819767a0 T drm_framebuffer_unregister_private +ffffffff819767e0 T drm_framebuffer_cleanup +ffffffff81976840 T drm_framebuffer_remove +ffffffff81976cd0 T drm_framebuffer_plane_width +ffffffff81976d20 T drm_framebuffer_plane_height +ffffffff81976d70 T drm_framebuffer_print_info +ffffffff81978000 T drm_ref +ffffffff81978030 T drm_unref +ffffffff819780b0 T drm_fault +ffffffff81978280 T drm_flush +ffffffff819782b0 T udv_attach_drm +ffffffff819784a0 T drm_gem_init +ffffffff81978550 t drm_gem_init_release +ffffffff81978570 T drm_gem_object_init +ffffffff819786f0 T drm_gem_private_object_init +ffffffff81978810 T drm_gem_private_object_fini +ffffffff81978870 T drm_gem_handle_delete +ffffffff81978960 t drm_gem_object_release_handle +ffffffff819789f0 T drm_gem_dumb_map_offset +ffffffff81978b20 T drm_gem_object_lookup +ffffffff81978b90 T drm_gem_create_mmap_offset +ffffffff81978bc0 T drm_gem_handle_create_tail +ffffffff81978d30 t drm_gem_object_handle_put_unlocked +ffffffff81978e80 T drm_gem_handle_create +ffffffff81978ed0 T drm_gem_free_mmap_offset +ffffffff81978f00 T drm_gem_create_mmap_offset_size +ffffffff81978f30 T drm_gem_get_pages +ffffffff81978f80 T drm_gem_put_pages +ffffffff81978fb0 T drm_gem_objects_lookup +ffffffff81979110 T drm_gem_dma_resv_wait +ffffffff81979240 T drm_gem_close_ioctl +ffffffff81979290 T drm_gem_flink_ioctl +ffffffff81979400 T drm_gem_open_ioctl +ffffffff81979530 T drm_gem_open +ffffffff81979560 T drm_gem_release +ffffffff819795a0 T drm_gem_object_release +ffffffff819796f0 T drm_gem_lru_remove +ffffffff819797d0 T drm_gem_object_free +ffffffff81979820 T drm_gem_mmap_obj +ffffffff81979920 T drm_gem_mmap +ffffffff81979b90 T drm_gem_print_info +ffffffff81979cb0 T drm_gem_pin +ffffffff81979cf0 T drm_gem_unpin +ffffffff81979d30 T drm_gem_vmap +ffffffff81979d90 T drm_gem_vunmap +ffffffff81979e00 T drm_gem_vmap_unlocked +ffffffff8197a000 T drm_gem_vunmap_unlocked +ffffffff8197a1d0 T drm_gem_lock_reservations +ffffffff8197a5c0 T drm_gem_unlock_reservations +ffffffff8197a6c0 T drm_gem_lru_init +ffffffff8197a700 T drm_gem_lru_move_tail_locked +ffffffff8197a800 T drm_gem_lru_move_tail +ffffffff8197a8f0 T drm_gem_lru_scan +ffffffff8197ace0 T drm_gem_evict +ffffffff8197b000 T drm_gem_plane_helper_prepare_fb +ffffffff8197c000 T drm_gem_dma_create +ffffffff8197c220 T drm_gem_dma_free_object +ffffffff8197c2c0 T drm_gem_dma_dumb_create_internal +ffffffff8197c400 T drm_gem_dma_dumb_create +ffffffff8197c440 T drm_gem_dma_fault +ffffffff8197c5e0 T drm_gem_dma_get_sg_table +ffffffff8197c610 T drm_gem_dma_prime_import_sg_table +ffffffff8197c640 T drm_gem_dma_vmap +ffffffff8197d000 T drm_gem_fb_destroy +ffffffff8197d0c0 T drm_gem_fb_create_handle +ffffffff8197d0e0 T drm_gem_fb_create +ffffffff8197d220 T drm_gem_fb_get_obj +ffffffff8197e000 T drm_ht_create +ffffffff8197e080 T drm_ht_verbose_list +ffffffff8197e140 T drm_ht_insert_item +ffffffff8197e190 T drm_ht_just_insert_please +ffffffff8197e260 T drm_ht_find_item +ffffffff8197e2b0 T drm_ht_remove_key +ffffffff8197e300 T drm_ht_remove_item +ffffffff8197e350 T drm_ht_remove +ffffffff8197f000 T drm_getunique +ffffffff8197f0a0 T drm_getclient +ffffffff8197f120 T drm_noop +ffffffff8197f180 T drm_invalid_op +ffffffff8197f1b0 T drm_version +ffffffff8197f3c0 T pledge_ioctl_drm +ffffffff8197f490 T drm_ioctl_kernel +ffffffff8197f4e0 T drm_ioctl +ffffffff8197f530 T drm_ioctl_flags +ffffffff8197f580 T drm_do_ioctl +ffffffff8197f8c0 T drmioctl +ffffffff8197fa10 t drm_getstats +ffffffff8197fa60 t drm_setversion +ffffffff8197fbc0 t drm_getcap +ffffffff8197fd80 t drm_setclientcap +ffffffff81980000 T tasklet_unlock_wait +ffffffff81980080 T tasklet_unlock_spin_wait +ffffffff81980100 T tasklet_run +ffffffff81980160 T set_current_state +ffffffff81980200 T __set_current_state +ffffffff81980290 T schedule +ffffffff819802d0 T schedule_timeout +ffffffff81980380 T schedule_timeout_uninterruptible +ffffffff819803e0 T wake_up_process +ffffffff81980460 T autoremove_wake_function +ffffffff81980500 T prepare_to_wait +ffffffff819805f0 T finish_wait +ffffffff819806a0 T flush_workqueue +ffffffff819806e0 T flush_work +ffffffff81980730 T flush_delayed_work +ffffffff819807d0 T kthread_func +ffffffff81980810 T kthread_run +ffffffff819808f0 T kthread_create_worker +ffffffff819809b0 T kthread_destroy_worker +ffffffff819809f0 T kthread_init_work +ffffffff81980a10 T kthread_queue_work +ffffffff81980a50 T kthread_cancel_work_sync +ffffffff81980a90 T kthread_flush_work +ffffffff81980ad0 T kthread_flush_worker +ffffffff81980b10 T kthread_lookup +ffffffff81980b90 T kthread_should_park +ffffffff81980c20 T kthread_parkme +ffffffff81980cf0 T kthread_park +ffffffff81980df0 T kthread_unpark +ffffffff81980e50 T kthread_should_stop +ffffffff81980ee0 T kthread_stop +ffffffff81981030 T dmi_match +ffffffff819810e0 T dmi_first_match +ffffffff819811d0 T dmi_get_system_info +ffffffff81981240 T dmi_check_system +ffffffff81981340 T alloc_pages +ffffffff81981410 T __free_pages +ffffffff81981580 T __pagevec_release +ffffffff81981620 T kmap +ffffffff81981660 T kunmap_va +ffffffff81981680 T kmap_atomic_prot +ffffffff81981710 T kunmap_atomic +ffffffff81981790 T vmap +ffffffff81981870 T vmap_pfn +ffffffff81981960 T vunmap +ffffffff819819b0 T is_vmalloc_addr +ffffffff819819f0 T print_hex_dump +ffffffff81981ac0 T memchr_inv +ffffffff81981b30 T panic_cmp +ffffffff81981b50 T linux_root_RB_INSERT_COLOR +ffffffff81981d50 T linux_root_RB_REMOVE_COLOR +ffffffff81982080 T linux_root_RB_REMOVE +ffffffff819821c0 T linux_root_RB_INSERT +ffffffff81982230 T linux_root_RB_FIND +ffffffff81982280 T linux_root_RB_NFIND +ffffffff819822d0 T linux_root_RB_NEXT +ffffffff81982340 T linux_root_RB_PREV +ffffffff819823b0 T linux_root_RB_MINMAX +ffffffff81982400 T idr_init +ffffffff81982430 T idr_destroy +ffffffff81982570 T idr_tree_SPLAY_REMOVE +ffffffff819825f0 T idr_preload +ffffffff81982680 T idr_alloc +ffffffff81982810 T idr_tree_SPLAY_INSERT +ffffffff819828b0 T idr_replace +ffffffff81982930 T idr_remove +ffffffff819829f0 T idr_find +ffffffff81982a60 T idr_get_next +ffffffff81982b90 T idr_for_each +ffffffff81982ca0 T idr_cmp +ffffffff81982ce0 T idr_tree_SPLAY +ffffffff81982e10 T idr_tree_SPLAY_MINMAX +ffffffff81982f00 T ida_init +ffffffff81982f30 T ida_destroy +ffffffff81982f40 T ida_simple_get +ffffffff81982f60 T ida_simple_remove +ffffffff81982f80 T ida_alloc_min +ffffffff81982fa0 T ida_alloc_max +ffffffff81982fc0 T ida_free +ffffffff81982fe0 T xarray_cmp +ffffffff81983020 T xarray_tree_SPLAY_INSERT +ffffffff819830c0 T xarray_tree_SPLAY +ffffffff819831f0 T xarray_tree_SPLAY_REMOVE +ffffffff81983270 T xarray_tree_SPLAY_MINMAX +ffffffff81983360 T xa_init_flags +ffffffff819833e0 T xa_destroy +ffffffff81983520 T __xa_alloc +ffffffff819836a0 T __xa_alloc_cyclic +ffffffff81983700 T __xa_erase +ffffffff819837c0 T __xa_load +ffffffff81983830 T __xa_store +ffffffff819839b0 T xa_get_next +ffffffff81983ae0 T sg_alloc_table +ffffffff81983b60 T sg_free_table +ffffffff81983bc0 T sg_copy_from_buffer +ffffffff81983bf0 T i2c_master_xfer +ffffffff81983d20 T __i2c_transfer +ffffffff81983dd0 T i2c_transfer +ffffffff81983ea0 T i2c_bb_master_xfer +ffffffff81983f80 T i2c_bb_functionality +ffffffff81983fb0 T i2c_bit_add_bus +ffffffff81983ff0 T vga_disable_bridge +ffffffff819840a0 T vga_get_uninterruptible +ffffffff819840f0 T vga_put +ffffffff81984170 T acpi_get_table +ffffffff81984230 T acpi_put_table +ffffffff81984260 T acpi_get_handle +ffffffff819842b0 T acpi_get_name +ffffffff81984350 T acpi_evaluate_object +ffffffff819845b0 T drm_linux_acpi_notify +ffffffff81984630 T register_acpi_notifier +ffffffff81984670 T unregister_acpi_notifier +ffffffff81984700 T acpi_format_exception +ffffffff81984750 T backlight_do_update_status +ffffffff81984770 T backlight_device_register +ffffffff81984820 T backlight_device_unregister +ffffffff81984880 T backlight_schedule_update_status +ffffffff819848a0 T backlight_enable +ffffffff819848e0 T backlight_disable +ffffffff81984920 T backlight_device_get_by_name +ffffffff81984990 T dev_set_drvdata +ffffffff81984a30 T dev_get_drvdata +ffffffff81984a90 T drm_sysfs_hotplug_event +ffffffff81984ab0 T drm_sysfs_connector_hotplug_event +ffffffff81984ad0 T drm_sysfs_connector_status_event +ffffffff81984af0 T drm_sysfs_connector_property_event +ffffffff81984b10 T dma_fence_get +ffffffff81984b50 T dma_fence_get_rcu +ffffffff81984b90 T dma_fence_get_rcu_safe +ffffffff81984bd0 T dma_fence_release +ffffffff81984c00 T dma_fence_put +ffffffff81984c70 T dma_fence_signal_timestamp_locked +ffffffff81984d20 T dma_fence_signal +ffffffff81984e50 T dma_fence_signal_locked +ffffffff81984f60 T dma_fence_signal_timestamp +ffffffff81985040 T dma_fence_is_signaled +ffffffff819850b0 T dma_fence_is_signaled_locked +ffffffff819851f0 T dma_fence_timestamp +ffffffff81985290 T dma_fence_wait_timeout +ffffffff819852f0 T dma_fence_default_wait +ffffffff819854d0 T dma_fence_wait +ffffffff81985530 T dma_fence_enable_sw_signaling +ffffffff81985680 T dma_fence_init +ffffffff819856e0 T dma_fence_add_callback +ffffffff81985810 T dma_fence_remove_callback +ffffffff81985890 T dma_fence_context_alloc +ffffffff819858d0 t dma_fence_default_wait_cb +ffffffff81985920 T dma_fence_wait_any_timeout +ffffffff81985c40 T dma_fence_set_deadline +ffffffff81985ce0 T dma_fence_get_stub +ffffffff81985e70 T dma_fence_allocate_private_stub +ffffffff81985f90 T dma_fence_array_create +ffffffff819860a0 t irq_dma_fence_array_work +ffffffff81986130 T dma_fence_array_first +ffffffff81986180 T dma_fence_array_next +ffffffff819861d0 t dma_fence_array_get_driver_name +ffffffff81986200 t dma_fence_array_get_timeline_name +ffffffff81986230 t dma_fence_array_enable_signaling +ffffffff81986330 t dma_fence_array_signaled +ffffffff81986380 t dma_fence_array_release +ffffffff81986440 T dma_fence_chain_find_seqno +ffffffff81986560 T dma_fence_chain_walk +ffffffff81986790 T dma_fence_chain_init +ffffffff819868a0 t dma_fence_chain_get_driver_name +ffffffff819868d0 t dma_fence_chain_get_timeline_name +ffffffff81986900 t dma_fence_chain_enable_signaling +ffffffff81986ab0 t dma_fence_chain_signaled +ffffffff81986ba0 t dma_fence_chain_release +ffffffff81986ce0 T dma_fence_is_container +ffffffff81986d30 T dmabuf_read +ffffffff81986d60 T dmabuf_write +ffffffff81986d90 T dmabuf_ioctl +ffffffff81986dc0 T dmabuf_kqfilter +ffffffff81986df0 T dmabuf_stat +ffffffff81986eb0 T dmabuf_close +ffffffff81986f20 T dmabuf_seek +ffffffff81986fb0 T dma_buf_export +ffffffff81987060 T dma_buf_get +ffffffff819870f0 T dma_buf_put +ffffffff819871a0 T dma_buf_fd +ffffffff819872c0 T get_dma_buf +ffffffff81987300 T pcie_get_speed_cap +ffffffff819874b0 T printk +ffffffff81987550 T pcie_get_width_cap +ffffffff81987640 T pcie_aspm_enabled +ffffffff819876d0 T wait_on_bit +ffffffff819877a0 T wait_on_bit_timeout +ffffffff81987870 T wake_up_bit +ffffffff819878b0 T clear_and_wake_up_bit +ffffffff81987900 T bit_waitqueue +ffffffff81987930 T __var_waitqueue +ffffffff81987960 T drm_linux_init +ffffffff81987ad0 T drm_linux_exit +ffffffff81987b30 T pci_resize_resource +ffffffff81987c80 T register_shrinker +ffffffff81987cd0 T unregister_shrinker +ffffffff81987d30 T drmbackoff +ffffffff81987dc0 T bitmap_zalloc +ffffffff81987df0 T bitmap_free +ffffffff81987e10 T atomic_dec_and_mutex_lock +ffffffff81987e90 T interval_tree_iter_first +ffffffff81987f40 T interval_tree_remove +ffffffff81987f60 T interval_tree_insert +ffffffff81987fd0 T syncfile_read +ffffffff81988000 T syncfile_write +ffffffff81988030 T syncfile_ioctl +ffffffff81988060 T syncfile_kqfilter +ffffffff81988090 T syncfile_stat +ffffffff81988140 T syncfile_close +ffffffff819881e0 T syncfile_seek +ffffffff81988260 T fd_install +ffffffff81988330 T fput +ffffffff81988390 T get_unused_fd_flags +ffffffff819884a0 T put_unused_fd +ffffffff81988530 T sync_file_get_fence +ffffffff819885e0 T sync_file_create +ffffffff81988680 T drm_firmware_drivers_only +ffffffff819886b0 T memremap +ffffffff81988700 T memunmap +ffffffff81988720 T dma_tag_lookup +ffffffff81988790 T dma_alloc_coherent +ffffffff81988880 T dma_free_coherent +ffffffff819889b0 T dma_get_sgtable +ffffffff81988a80 T dma_map_resource +ffffffff81988ba0 T component_add +ffffffff81988c10 T component_add_typed +ffffffff81988c80 T component_bind_all +ffffffff81988d10 T component_master_add_with_match +ffffffff81988e00 t dma_fence_stub_get_name +ffffffff81988e30 t dma_fence_array_cb_func +ffffffff81988eb0 t dma_fence_chain_cb +ffffffff81988f70 t dma_fence_chain_timo +ffffffff8198a000 T drmm_kzalloc +ffffffff8198a100 T drmm_kcalloc +ffffffff8198a210 T drmm_kstrdup +ffffffff8198a340 T drmm_kfree +ffffffff8198a440 T drmm_add_action +ffffffff8198a500 T drmm_add_action_or_reset +ffffffff8198a5d0 T drm_managed_release +ffffffff8198a690 T drmm_add_final_kfree +ffffffff8198b000 T mipi_dsi_attach +ffffffff8198b060 T mipi_dsi_detach +ffffffff8198b0f0 T devm_mipi_dsi_attach +ffffffff8198b170 T mipi_dsi_packet_format_is_short +ffffffff8198b1b0 T mipi_dsi_packet_format_is_long +ffffffff8198b1f0 T mipi_dsi_create_packet +ffffffff8198b300 T mipi_dsi_shutdown_peripheral +ffffffff8198b3b0 T mipi_dsi_turn_on_peripheral +ffffffff8198b460 T mipi_dsi_set_maximum_return_packet_size +ffffffff8198b510 T mipi_dsi_compression_mode +ffffffff8198b5c0 T mipi_dsi_picture_parameter_set +ffffffff8198b670 T mipi_dsi_generic_write +ffffffff8198b730 T mipi_dsi_generic_read +ffffffff8198b7e0 T mipi_dsi_dcs_write_buffer +ffffffff8198b8a0 T mipi_dsi_dcs_write +ffffffff8198b9f0 T mipi_dsi_dcs_read +ffffffff8198ba90 T mipi_dsi_dcs_nop +ffffffff8198bb40 T mipi_dsi_dcs_soft_reset +ffffffff8198bbf0 T mipi_dsi_dcs_get_power_mode +ffffffff8198bcb0 T mipi_dsi_dcs_get_pixel_format +ffffffff8198bd70 T mipi_dsi_dcs_enter_sleep_mode +ffffffff8198be20 T mipi_dsi_dcs_exit_sleep_mode +ffffffff8198bed0 T mipi_dsi_dcs_set_display_off +ffffffff8198bf80 T mipi_dsi_dcs_set_display_on +ffffffff8198c030 T mipi_dsi_dcs_set_column_address +ffffffff8198c0f0 T mipi_dsi_dcs_set_page_address +ffffffff8198c1b0 T mipi_dsi_dcs_set_tear_off +ffffffff8198c260 T mipi_dsi_dcs_set_tear_on +ffffffff8198c310 T mipi_dsi_dcs_set_pixel_format +ffffffff8198d000 T __drm_mm_interval_first +ffffffff8198d0c0 T drm_mm_reserve_node +ffffffff8198d340 t add_hole +ffffffff8198d4a0 T drm_mm_insert_node_in_range +ffffffff8198da90 T drm_mm_remove_node +ffffffff8198dbc0 T drm_mm_replace_node +ffffffff8198dda0 T drm_mm_scan_init_with_range +ffffffff8198de30 T drm_mm_scan_add_block +ffffffff8198dfa0 T drm_mm_scan_remove_block +ffffffff8198e020 T drm_mm_scan_color_evict +ffffffff8198e100 T drm_mm_init +ffffffff8198e1b0 T drm_mm_takedown +ffffffff8198e1f0 T drm_mm_print +ffffffff8198f000 T drm_modeset_register_all +ffffffff8198f0a0 T drm_modeset_unregister_all +ffffffff8198f0e0 T drm_mode_getresources +ffffffff8198f390 T drm_mode_config_reset +ffffffff8198f4f0 T drmm_mode_config_init +ffffffff8198fb70 T drm_mode_config_cleanup +ffffffff8198fe90 t drm_mode_config_init_release +ffffffff8198fea0 T drm_mode_config_validate +ffffffff81991000 T __drm_mode_object_add +ffffffff81991100 T drm_mode_object_add +ffffffff819911e0 T drm_mode_object_register +ffffffff81991230 T drm_mode_object_unregister +ffffffff819912d0 T drm_mode_object_lease_required +ffffffff81991320 T __drm_mode_object_find +ffffffff819913d0 T drm_mode_object_find +ffffffff81991480 T drm_mode_object_put +ffffffff81991500 T drm_mode_object_get +ffffffff81991560 T drm_object_attach_property +ffffffff81991670 T drm_object_property_set_value +ffffffff81991750 T drm_object_property_get_value +ffffffff819917e0 t __drm_object_property_get_value +ffffffff819918c0 T drm_object_property_get_default_value +ffffffff81991990 T drm_mode_object_get_properties +ffffffff81991ad0 T drm_mode_obj_get_properties_ioctl +ffffffff81991d20 T drm_mode_obj_find_prop_id +ffffffff81991d80 T drm_mode_obj_set_property_ioctl +ffffffff81993000 T drm_mode_debug_printmodeline +ffffffff81993140 T drm_mode_vrefresh +ffffffff819931e0 T drm_mode_create +ffffffff81993200 T drm_mode_destroy +ffffffff81993240 T drm_mode_probed_add +ffffffff819932e0 T drm_analog_tv_mode +ffffffff81993b80 T drm_cvt_mode +ffffffff81994000 T drm_mode_set_name +ffffffff81994050 T drm_gtf_mode_complex +ffffffff81994350 T drm_gtf_mode +ffffffff819943a0 T drm_mode_get_hv_timing +ffffffff819943f0 T drm_mode_init +ffffffff819944c0 T drm_mode_set_crtcinfo +ffffffff81994680 T drm_mode_copy +ffffffff819946e0 T drm_mode_duplicate +ffffffff81994760 T drm_mode_match +ffffffff81994900 T drm_mode_equal +ffffffff81994920 T drm_mode_equal_no_clocks +ffffffff81994940 T drm_mode_equal_no_clocks_no_stereo +ffffffff81994a00 T drm_mode_validate_driver +ffffffff81994af0 T drm_mode_validate_size +ffffffff81994b40 T drm_mode_validate_ycbcr420 +ffffffff81994bb0 T drm_mode_is_420_only +ffffffff81994c00 T drm_get_mode_status_name +ffffffff81994c80 T drm_mode_prune_invalid +ffffffff81994f20 T drm_mode_sort +ffffffff81994f50 t drm_mode_compare +ffffffff819950f0 T drm_connector_list_update +ffffffff819952c0 T drm_mode_parse_command_line_for_connector +ffffffff819952f0 T drm_mode_create_from_cmdline_mode +ffffffff819954b0 T drm_mode_convert_to_umode +ffffffff81995650 T drm_mode_convert_umode +ffffffff81995870 T drm_mode_is_420_also +ffffffff819958c0 T drm_mode_is_420 +ffffffff81996000 T drm_helper_move_panel_connectors_to_head +ffffffff819960f0 T drm_helper_mode_fill_fb_struct +ffffffff819961b0 T drm_crtc_init +ffffffff81996280 T drm_mode_config_helper_suspend +ffffffff81996330 T drm_mode_config_helper_resume +ffffffff81997000 T drm_modeset_lock_all +ffffffff81997290 T drm_modeset_acquire_init +ffffffff81997320 T drm_modeset_lock_all_ctx +ffffffff81997410 T drm_modeset_backoff +ffffffff819974e0 T drm_modeset_acquire_fini +ffffffff81997510 T drm_warn_on_modeset_not_all_locked +ffffffff81997660 T drm_modeset_unlock_all +ffffffff81997750 T drm_modeset_drop_locks +ffffffff819977e0 T drm_modeset_unlock +ffffffff819978b0 t modeset_lock +ffffffff81997c10 T drm_modeset_lock_init +ffffffff81997c70 T drm_modeset_lock +ffffffff81997d90 T drm_modeset_lock_single_interruptible +ffffffff81997eb0 t __ww_mutex_lock +ffffffff81999000 T drm_mtrr_add +ffffffff81999070 T drm_mtrr_del +ffffffff8199a000 T drm_panel_init +ffffffff8199a090 T drm_panel_add +ffffffff8199a0e0 T drm_panel_remove +ffffffff8199a140 T drm_panel_prepare +ffffffff8199a250 T drm_panel_unprepare +ffffffff8199a360 T drm_panel_enable +ffffffff8199a450 T drm_panel_disable +ffffffff8199a540 T drm_panel_get_modes +ffffffff8199a5a0 T drm_is_panel_follower +ffffffff8199a5f0 T drm_panel_add_follower +ffffffff8199a640 T drm_panel_remove_follower +ffffffff8199a660 T devm_drm_panel_add_follower +ffffffff8199a6b0 T drm_panel_of_backlight +ffffffff8199b000 T drm_get_panel_orientation_quirk +ffffffff8199c000 T drm_pci_set_busid +ffffffff8199c090 t kasprintf +ffffffff8199d000 T drm_universal_plane_init +ffffffff8199d0e0 t __drm_universal_plane_init +ffffffff8199d5c0 T __drmm_universal_plane_alloc +ffffffff8199d700 t drmm_universal_plane_alloc_release +ffffffff8199d750 T __drm_universal_plane_alloc +ffffffff8199d890 T drm_plane_register_all +ffffffff8199d980 T drm_plane_unregister_all +ffffffff8199d9f0 T drm_plane_cleanup +ffffffff8199db40 T drm_plane_from_index +ffffffff8199dba0 T drm_plane_force_disable +ffffffff8199dcb0 T drm_mode_plane_set_obj_prop +ffffffff8199dd30 T drm_mode_getplane_res +ffffffff8199de60 T drm_mode_getplane +ffffffff8199dfb0 T drm_plane_check_pixel_format +ffffffff8199e070 T drm_any_plane_has_format +ffffffff8199e1a0 T drm_mode_setplane +ffffffff8199e490 T drm_mode_cursor_ioctl +ffffffff8199e500 t drm_mode_cursor_common +ffffffff8199ea40 T drm_mode_cursor2_ioctl +ffffffff8199ea60 T drm_mode_page_flip_ioctl +ffffffff8199efe0 T drm_plane_enable_fb_damage_clips +ffffffff8199f000 T drm_plane_get_damage_clips_count +ffffffff8199f040 T __drm_plane_get_damage_clips +ffffffff8199f080 T drm_plane_get_damage_clips +ffffffff8199f120 T drm_create_scaling_filter_prop +ffffffff8199f270 T drm_plane_create_scaling_filter_property +ffffffff8199f2e0 t kvasprintf +ffffffff8199f380 t kasprintf +ffffffff8199f450 t create_in_format_blob +ffffffff8199f640 t __setplane_atomic +ffffffff8199f7e0 t __setplane_internal +ffffffff8199f9f0 t __setplane_check +ffffffff819a0000 T drm_plane_helper_update_primary +ffffffff819a04c0 t get_connectors_for_crtc +ffffffff819a05d0 T drm_plane_helper_disable_primary +ffffffff819a0680 T drm_plane_helper_destroy +ffffffff819a06b0 T drm_plane_helper_atomic_check +ffffffff819a1000 T drm_prime_remove_buf_handle +ffffffff819a10a0 T drm_prime_init_file_private +ffffffff819a1100 T drm_prime_destroy_file_private +ffffffff819a1160 T drm_gem_dmabuf_export +ffffffff819a11c0 T drm_gem_dmabuf_release +ffffffff819a1200 T drm_gem_prime_fd_to_handle +ffffffff819a1420 T drm_gem_prime_import +ffffffff819a1480 t drm_prime_add_buf_handle +ffffffff819a15c0 T drm_prime_fd_to_handle_ioctl +ffffffff819a15f0 T drm_gem_prime_handle_to_fd +ffffffff819a1820 T drm_prime_handle_to_fd_ioctl +ffffffff819a1890 T drm_gem_map_attach +ffffffff819a18e0 T drm_gem_map_detach +ffffffff819a1900 T drm_gem_dmabuf_vmap +ffffffff819a1920 T drm_gem_dmabuf_vunmap +ffffffff819a1940 T drm_gem_prime_mmap +ffffffff819a1990 T drm_prime_pages_to_sg +ffffffff819a19e0 T drm_prime_get_contiguous_size +ffffffff819a1a30 T drm_gem_prime_export +ffffffff819a1ac0 T drm_gem_prime_import_dev +ffffffff819a1b20 T drm_prime_sg_to_page_array +ffffffff819a1b70 T drm_prime_sg_to_dma_addr_array +ffffffff819a1bc0 T drm_prime_gem_destroy +ffffffff819a2000 T __drm_puts_coredump +ffffffff819a20e0 T __drm_printfn_coredump +ffffffff819a22b0 T __drm_puts_seq_file +ffffffff819a22e0 T __drm_printfn_seq_file +ffffffff819a2310 T __drm_printfn_info +ffffffff819a2340 T __drm_printfn_debug +ffffffff819a2370 T __drm_printfn_err +ffffffff819a23b0 T drm_puts +ffffffff819a23e0 T drm_printf +ffffffff819a2460 T drm_print_bits +ffffffff819a2690 T drm_dev_printk +ffffffff819a2730 T __drm_dev_dbg +ffffffff819a27c0 T ___drm_dbg +ffffffff819a2850 T __drm_err +ffffffff819a28e0 T drm_print_regset32 +ffffffff819a3000 T drm_crtc_mode_valid +ffffffff819a3050 T drm_encoder_mode_valid +ffffffff819a3090 T drm_connector_mode_valid +ffffffff819a3110 T drm_kms_helper_poll_enable +ffffffff819a32a0 T drm_kms_helper_poll_reschedule +ffffffff819a3300 T drm_helper_probe_detect +ffffffff819a34f0 T drm_helper_probe_single_connector_modes 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drm_property_destroy +ffffffff819a5550 T drm_property_create_bitmask +ffffffff819a5680 T drm_property_create_range +ffffffff819a56f0 T drm_property_create_signed_range +ffffffff819a5760 T drm_property_create_object +ffffffff819a5800 T drm_property_create_bool +ffffffff819a5860 T drm_mode_getproperty_ioctl +ffffffff819a5ab0 T drm_property_create_blob +ffffffff819a5bf0 t drm_property_free_blob +ffffffff819a5c70 T drm_property_blob_put +ffffffff819a5cb0 T drm_property_destroy_user_blobs +ffffffff819a5d30 T drm_property_blob_get +ffffffff819a5d70 T drm_property_lookup_blob +ffffffff819a5d90 T drm_property_replace_global_blob +ffffffff819a5ee0 T drm_property_replace_blob +ffffffff819a5f50 T drm_mode_getblob_ioctl +ffffffff819a6010 T drm_mode_createblob_ioctl +ffffffff819a6110 T drm_mode_destroyblob_ioctl +ffffffff819a6210 T drm_property_change_valid_get +ffffffff819a6470 T drm_property_change_valid_put +ffffffff819a7000 T drm_rect_intersect +ffffffff819a7080 T drm_rect_clip_scaled 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drm_syncobj_find_fence +ffffffff819ab730 t drm_syncobj_fence_add_wait +ffffffff819ab800 T drm_syncobj_free +ffffffff819ab880 T drm_syncobj_create +ffffffff819aba50 T drm_syncobj_get_handle +ffffffff819abb70 T drm_syncobj_get_fd +ffffffff819abbc0 T drm_syncobj_open +ffffffff819abbf0 T drm_syncobj_release +ffffffff819abc30 t drm_syncobj_release_handle +ffffffff819abcf0 T drm_syncobj_create_ioctl +ffffffff819abe20 T drm_syncobj_destroy_ioctl +ffffffff819abf60 T drm_syncobj_handle_to_fd_ioctl +ffffffff819ac150 T drm_syncobj_fd_to_handle_ioctl +ffffffff819ac300 T drm_syncobj_transfer_ioctl +ffffffff819ac6e0 T drm_timeout_abs_to_jiffies +ffffffff819ac7b0 T drm_syncobj_wait_ioctl +ffffffff819ac930 t drm_syncobj_array_find +ffffffff819acb50 t drm_syncobj_array_free +ffffffff819acc40 T drm_syncobj_timeline_wait_ioctl +ffffffff819acdc0 T drm_syncobj_eventfd_ioctl +ffffffff819acdf0 T drm_syncobj_reset_ioctl +ffffffff819aced0 T drm_syncobj_signal_ioctl +ffffffff819ad030 T drm_syncobj_timeline_signal_ioctl +ffffffff819ad270 T drm_syncobj_query_ioctl +ffffffff819ad480 t drm_syncobj_array_wait_timeout +ffffffff819ad8f0 t syncobj_wait_fence_func +ffffffff819ad910 t syncobj_eventfd_entry_fence_func +ffffffff819ae000 T drm_vblank_count +ffffffff819ae090 T drm_crtc_accurate_vblank_count +ffffffff819ae1a0 t drm_update_vblank_count +ffffffff819ae5e0 T drm_vblank_disable_and_save +ffffffff819ae730 T drm_vblank_init +ffffffff819ae8b0 t vblank_disable_fn +ffffffff819ae930 t drm_vblank_init_release +ffffffff819ae9c0 T drm_dev_has_vblank +ffffffff819ae9f0 T drm_crtc_vblank_waitqueue +ffffffff819aea40 T drm_calc_timestamping_constants +ffffffff819aec60 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff819af1b0 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff819af1d0 T drm_crtc_vblank_count +ffffffff819af260 T drm_crtc_vblank_count_and_time +ffffffff819af320 t drm_vblank_count_and_time +ffffffff819af3d0 T drm_crtc_next_vblank_start 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drm_crtc_get_sequence_ioctl +ffffffff819b2310 T drm_crtc_queue_sequence_ioctl +ffffffff819b25d0 t __get_vblank_counter +ffffffff819b3000 T drm_handle_vblank_works +ffffffff819b31a0 T drm_vblank_cancel_pending_works +ffffffff819b32e0 T drm_vblank_work_schedule +ffffffff819b3550 T drm_vblank_work_cancel_sync +ffffffff819b36a0 T drm_vblank_work_flush +ffffffff819b37d0 T drm_vblank_work_init +ffffffff819b3840 T drm_vblank_worker_init +ffffffff819b4000 T drm_vma_offset_manager_init +ffffffff819b4040 T drm_vma_offset_manager_destroy +ffffffff819b4060 T drm_vma_offset_lookup_locked +ffffffff819b40f0 T drm_vma_offset_add +ffffffff819b4180 T drm_vma_offset_remove +ffffffff819b41d0 T drm_vma_node_allow +ffffffff819b41f0 t vma_node_allow +ffffffff819b4310 T drm_vma_node_allow_once +ffffffff819b4330 T drm_vma_node_revoke +ffffffff819b43b0 T drm_vma_node_is_allowed +ffffffff819b5000 T hdmi_avi_infoframe_init +ffffffff819b5070 T hdmi_avi_infoframe_check +ffffffff819b50c0 T hdmi_avi_infoframe_pack_only +ffffffff819b52c0 T hdmi_avi_infoframe_pack +ffffffff819b5320 T hdmi_spd_infoframe_init +ffffffff819b53e0 T hdmi_spd_infoframe_check +ffffffff819b5430 T hdmi_spd_infoframe_pack_only +ffffffff819b5570 T hdmi_spd_infoframe_pack +ffffffff819b56d0 T hdmi_audio_infoframe_init +ffffffff819b5720 T hdmi_audio_infoframe_check +ffffffff819b5770 T hdmi_audio_infoframe_pack_only +ffffffff819b58d0 T hdmi_audio_infoframe_pack +ffffffff819b5920 T hdmi_audio_infoframe_pack_for_dp +ffffffff819b5a10 T hdmi_vendor_infoframe_init +ffffffff819b5a70 T hdmi_vendor_infoframe_check +ffffffff819b5b10 T hdmi_vendor_infoframe_pack_only +ffffffff819b5cd0 T hdmi_vendor_infoframe_pack +ffffffff819b5d70 T hdmi_drm_infoframe_init +ffffffff819b5dd0 T hdmi_drm_infoframe_check +ffffffff819b5e20 T hdmi_drm_infoframe_pack_only +ffffffff819b6010 T hdmi_drm_infoframe_pack +ffffffff819b6060 T hdmi_infoframe_check +ffffffff819b61b0 T hdmi_infoframe_pack_only +ffffffff819b63d0 T hdmi_infoframe_pack +ffffffff819b6540 T hdmi_infoframe_log +ffffffff819b74c0 T hdmi_drm_infoframe_unpack_only +ffffffff819b75a0 T hdmi_infoframe_unpack +ffffffff819b8000 T list_sort +ffffffff819b9000 T radix_tree_lookup +ffffffff819b90b0 T radix_tree_iter_find +ffffffff819b9180 T radix_tree_delete +ffffffff819b9310 T radix_tree_iter_delete +ffffffff819b9330 T radix_tree_insert +ffffffff819ba000 T sort +ffffffff819ba040 t qsort +ffffffff819bc000 T drm_dp_dual_mode_read +ffffffff819bc110 T drm_dp_dual_mode_write +ffffffff819bc1f0 T drm_dp_dual_mode_detect +ffffffff819bc490 T drm_dp_dual_mode_max_tmds_clock +ffffffff819bc5b0 T drm_dp_dual_mode_get_tmds_output +ffffffff819bc6d0 T drm_dp_dual_mode_set_tmds_output +ffffffff819bc950 T drm_dp_get_dual_mode_type_name +ffffffff819bc9c0 T drm_lspcon_get_mode +ffffffff819bcbe0 T drm_lspcon_set_mode +ffffffff819bd000 T drm_dp_channel_eq_ok +ffffffff819bd080 T drm_dp_clock_recovery_ok +ffffffff819bd0f0 T drm_dp_get_adjust_request_voltage +ffffffff819bd130 T drm_dp_get_adjust_request_pre_emphasis +ffffffff819bd180 T drm_dp_get_adjust_tx_ffe_preset +ffffffff819bd1c0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff819bd240 T drm_dp_128b132b_lane_symbol_locked +ffffffff819bd2b0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff819bd2e0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff819bd310 T drm_dp_128b132b_link_training_failed +ffffffff819bd340 T drm_dp_read_clock_recovery_delay +ffffffff819bd450 T drm_dp_read_channel_eq_delay +ffffffff819bd550 T drm_dp_128b132b_read_aux_rd_interval +ffffffff819bd600 T drm_dp_link_train_clock_recovery_delay +ffffffff819bd690 t __8b10b_clock_recovery_delay_us +ffffffff819bd710 T drm_dp_link_train_channel_eq_delay +ffffffff819bd780 T drm_dp_phy_name +ffffffff819bd7c0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff819bd7e0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff819bd850 T drm_dp_link_rate_to_bw_code +ffffffff819bd8c0 T drm_dp_bw_code_to_link_rate +ffffffff819bd920 T drm_dp_dpcd_probe +ffffffff819bda60 t drm_dp_dpcd_access +ffffffff819bdb90 T drm_dp_dpcd_read +ffffffff819bdcc0 T drm_dp_dpcd_write +ffffffff819bddd0 T drm_dp_dpcd_read_link_status +ffffffff819bddf0 T drm_dp_dpcd_read_phy_link_status +ffffffff819bdef0 T drm_dp_downstream_is_type +ffffffff819bdf40 T drm_dp_downstream_is_tmds +ffffffff819bdfb0 T drm_dp_send_real_edid_checksum +ffffffff819be210 T drm_dp_read_dpcd_caps +ffffffff819be3a0 T drm_dp_read_downstream_info +ffffffff819be4a0 T drm_dp_downstream_max_dotclock +ffffffff819be4f0 T drm_dp_downstream_max_tmds_clock +ffffffff819be590 T drm_dp_downstream_min_tmds_clock +ffffffff819be610 T drm_dp_downstream_max_bpc +ffffffff819be6b0 T drm_dp_downstream_420_passthrough +ffffffff819be710 T drm_dp_downstream_444_to_420_conversion +ffffffff819be770 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff819be7d0 T drm_dp_downstream_mode +ffffffff819be860 T drm_dp_downstream_id +ffffffff819be880 T drm_dp_downstream_debug +ffffffff819be920 T drm_dp_subconnector_type +ffffffff819be990 T drm_dp_set_subconnector_property +ffffffff819bea00 T drm_dp_read_sink_count_cap +ffffffff819bea50 T drm_dp_read_sink_count +ffffffff819beab0 T drm_dp_remote_aux_init +ffffffff819beae0 t drm_dp_aux_crc_work +ffffffff819bec50 T drm_dp_aux_init +ffffffff819bed00 T drm_dp_aux_register +ffffffff819bee20 T drm_dp_aux_unregister +ffffffff819bee50 T drm_dp_psr_setup_time +ffffffff819beea0 T drm_dp_start_crc +ffffffff819bef50 T drm_dp_stop_crc +ffffffff819befe0 T drm_dp_read_desc +ffffffff819bf1a0 T drm_dp_dsc_sink_max_slice_count +ffffffff819bf230 T drm_dp_dsc_sink_line_buf_depth +ffffffff819bf270 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff819bf2e0 T drm_dp_read_lttpr_common_caps +ffffffff819bf3a0 T drm_dp_read_lttpr_phy_caps +ffffffff819bf460 T drm_dp_lttpr_count +ffffffff819bf4f0 T drm_dp_lttpr_max_link_rate +ffffffff819bf550 T drm_dp_lttpr_max_lane_count +ffffffff819bf580 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff819bf5b0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff819bf5e0 T drm_dp_get_phy_test_pattern +ffffffff819bf700 T drm_dp_set_phy_test_pattern +ffffffff819bf7c0 T drm_dp_vsc_sdp_log +ffffffff819bfaf0 T drm_dp_get_pcon_max_frl_bw +ffffffff819bfb40 T drm_dp_pcon_frl_prepare +ffffffff819bfb90 T drm_dp_pcon_is_frl_ready +ffffffff819bfbf0 T drm_dp_pcon_frl_configure_1 +ffffffff819bfcf0 T drm_dp_pcon_frl_configure_2 +ffffffff819bfd50 T drm_dp_pcon_reset_frl_config +ffffffff819bfda0 T drm_dp_pcon_frl_enable +ffffffff819bfe60 T drm_dp_pcon_hdmi_link_active +ffffffff819bfeb0 T drm_dp_pcon_hdmi_link_mode +ffffffff819bff20 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff819c0020 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff819c0050 T drm_dp_pcon_dsc_max_slices +ffffffff819c00e0 T drm_dp_pcon_dsc_max_slice_width +ffffffff819c0110 T drm_dp_pcon_dsc_bpp_incr +ffffffff819c0150 T drm_dp_pcon_pps_default +ffffffff819c01d0 T drm_dp_pcon_pps_override_buf +ffffffff819c0270 T drm_dp_pcon_pps_override_param +ffffffff819c0340 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff819c03e0 T drm_edp_backlight_set_level +ffffffff819c04b0 T drm_edp_backlight_enable +ffffffff819c06c0 t drm_edp_backlight_set_enable +ffffffff819c0800 T drm_edp_backlight_disable +ffffffff819c0840 T drm_edp_backlight_init +ffffffff819c0da0 T drm_panel_dp_aux_backlight +ffffffff819c0f30 t __128b132b_channel_eq_delay_us +ffffffff819c0fb0 t __8b10b_channel_eq_delay_us +ffffffff819c1030 t drm_dp_aux_get_crc +ffffffff819c1110 t drm_dp_i2c_xfer +ffffffff819c1380 t drm_dp_i2c_functionality +ffffffff819c13b0 t drm_dp_i2c_do_msg +ffffffff819c1790 t lock_bus +ffffffff819c17b0 t trylock_bus +ffffffff819c1800 t unlock_bus +ffffffff819c1820 t dp_aux_backlight_update_status +ffffffff819c2000 T drm_dp_encode_sideband_req +ffffffff819c2440 T drm_dp_decode_sideband_req +ffffffff819c2970 T drm_dp_dump_sideband_msg_req_body +ffffffff819c2d40 T drm_dp_mst_get_port_malloc +ffffffff819c2d90 T drm_dp_mst_put_port_malloc +ffffffff819c2e80 t kref_put +ffffffff819c2ec0 T drm_atomic_get_mst_payload_state +ffffffff819c2f10 T drm_dp_mst_dpcd_read +ffffffff819c31d0 T drm_dp_mst_dpcd_write +ffffffff819c3220 t drm_dp_send_dpcd_write +ffffffff819c3460 T drm_dp_mst_connector_late_register +ffffffff819c34e0 T drm_dp_mst_connector_early_unregister +ffffffff819c3520 T drm_dp_send_power_updown_phy +ffffffff819c3760 t drm_dp_mst_topology_put_port +ffffffff819c3880 t drm_dp_mst_wait_tx_reply +ffffffff819c3c20 T drm_dp_send_query_stream_enc_status +ffffffff819c3ee0 T drm_dp_add_payload_part1 +ffffffff819c4090 T drm_dp_remove_payload +ffffffff819c4230 T drm_dp_add_payload_part2 +ffffffff819c43f0 T drm_dp_get_vc_payload_bw +ffffffff819c4490 T drm_dp_read_mst_cap +ffffffff819c44f0 T drm_dp_mst_topology_mgr_set_mst +ffffffff819c47a0 t drm_dp_dpcd_write_payload +ffffffff819c4940 t drm_dp_mst_topology_put_mstb +ffffffff819c4a40 T drm_dp_mst_topology_mgr_suspend +ffffffff819c4b00 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff819c4b70 T drm_dp_mst_topology_mgr_resume +ffffffff819c4db0 T drm_dp_mst_hpd_irq_handle_event +ffffffff819c5d20 T drm_dp_mst_hpd_irq_send_new_request +ffffffff819c5da0 T drm_dp_mst_detect_port +ffffffff819c5f00 T drm_dp_mst_edid_read +ffffffff819c6000 T drm_dp_mst_get_edid +ffffffff819c6060 T drm_dp_atomic_find_time_slots +ffffffff819c6310 T drm_atomic_get_mst_topology_state +ffffffff819c6320 T drm_dp_atomic_release_time_slots +ffffffff819c6540 T drm_dp_mst_atomic_setup_commit +ffffffff819c66d0 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff819c6840 T drm_dp_mst_root_conn_atomic_check +ffffffff819c6960 T drm_dp_mst_update_slots +ffffffff819c69c0 T drm_dp_check_act_status +ffffffff819c6b50 T drm_dp_calc_pbn_mode +ffffffff819c6bb0 T drm_dp_mst_dump_topology +ffffffff819c6e30 t drm_dp_mst_dump_mstb +ffffffff819c6ea0 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff819c6fd0 T drm_dp_mst_dsc_aux_for_port +ffffffff819c7200 T drm_dp_mst_atomic_enable_dsc +ffffffff819c7380 T drm_dp_mst_atomic_check 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intel_any_crtc_needs_modeset +ffffffff81a07390 T intel_atomic_get_digital_connector_state +ffffffff81a073a0 T intel_crtc_duplicate_state +ffffffff81a074d0 T intel_crtc_free_hw_state +ffffffff81a07530 T intel_crtc_destroy_state +ffffffff81a075e0 T intel_atomic_state_alloc +ffffffff81a07660 T intel_atomic_state_free +ffffffff81a076a0 T intel_atomic_state_clear +ffffffff81a076f0 T intel_atomic_get_crtc_state +ffffffff81a08000 T intel_plane_alloc +ffffffff81a080c0 T intel_plane_free +ffffffff81a08100 T intel_plane_destroy_state +ffffffff81a081d0 T intel_plane_duplicate_state +ffffffff81a08280 T intel_adjusted_rate +ffffffff81a08300 T intel_plane_pixel_rate +ffffffff81a08390 T intel_plane_data_rate +ffffffff81a08450 T intel_plane_calc_min_cdclk +ffffffff81a085b0 T intel_plane_copy_uapi_to_hw_state +ffffffff81a08720 T intel_plane_copy_hw_state +ffffffff81a08810 T intel_plane_set_invisible +ffffffff81a08910 T intel_plane_atomic_check_with_state +ffffffff81a09580 T intel_plane_atomic_check +ffffffff81a096e0 T intel_plane_update_noarm +ffffffff81a09720 T intel_plane_update_arm +ffffffff81a09760 T intel_plane_disable_arm +ffffffff81a09780 T intel_crtc_planes_update_noarm +ffffffff81a098a0 T intel_crtc_planes_update_arm +ffffffff81a09c90 T intel_atomic_plane_check_clipping +ffffffff81a09ef0 T intel_plane_check_src_coordinates +ffffffff81a0a0b0 T intel_plane_helper_add +ffffffff81a0a0f0 t intel_prepare_plane_fb +ffffffff81a0a350 t intel_cleanup_plane_fb +ffffffff81a0b000 T intel_audio_sdp_split_update +ffffffff81a0b0d0 T intel_audio_compute_config +ffffffff81a0b180 T intel_audio_codec_enable +ffffffff81a0b370 T intel_audio_codec_disable +ffffffff81a0b5c0 T intel_audio_codec_get_config +ffffffff81a0b610 T intel_audio_hooks_init +ffffffff81a0b690 T intel_audio_cdclk_change_pre +ffffffff81a0b720 T intel_audio_cdclk_change_post +ffffffff81a0b800 T intel_audio_init +ffffffff81a0b810 T intel_audio_deinit +ffffffff81a0b860 t g4x_audio_codec_enable +ffffffff81a0ba20 t g4x_audio_codec_disable +ffffffff81a0baa0 t g4x_audio_codec_get_config +ffffffff81a0bbb0 t ibx_audio_codec_enable +ffffffff81a0bd70 t ibx_audio_codec_disable +ffffffff81a0bf40 t intel_acomp_get_config +ffffffff81a0bfc0 t audio_config_hdmi_pixel_clock +ffffffff81a0c190 t hsw_audio_codec_enable +ffffffff81a0c9d0 t hsw_audio_codec_disable +ffffffff81a0d000 T intel_backlight_invert_pwm_level +ffffffff81a0d0c0 T intel_backlight_set_pwm_level +ffffffff81a0d130 T intel_backlight_level_to_pwm +ffffffff81a0d320 T intel_backlight_level_from_pwm +ffffffff81a0d4c0 T intel_backlight_set_acpi +ffffffff81a0d6d0 T intel_backlight_disable +ffffffff81a0d7b0 T intel_backlight_enable +ffffffff81a0d850 t __intel_backlight_enable +ffffffff81a0d990 T intel_backlight_device_register +ffffffff81a0dc50 t kasprintf +ffffffff81a0dd20 T intel_backlight_device_unregister +ffffffff81a0dd70 T intel_backlight_update +ffffffff81a0de10 T intel_backlight_setup +ffffffff81a0dfc0 T intel_backlight_destroy +ffffffff81a0dff0 T intel_backlight_init_funcs +ffffffff81a0e150 t intel_backlight_device_update_status +ffffffff81a0e380 t intel_backlight_device_get_brightness +ffffffff81a0e500 t bxt_setup_backlight +ffffffff81a0e740 t bxt_get_backlight +ffffffff81a0e780 t bxt_set_backlight +ffffffff81a0e7c0 t bxt_disable_backlight +ffffffff81a0e8f0 t bxt_enable_backlight +ffffffff81a0eb70 t bxt_hz_to_pwm +ffffffff81a0ebb0 t cnp_setup_backlight +ffffffff81a0ee60 t cnp_disable_backlight +ffffffff81a0ef20 t cnp_enable_backlight +ffffffff81a0f0e0 t cnp_hz_to_pwm +ffffffff81a0f120 t lpt_setup_backlight +ffffffff81a0f480 t lpt_get_backlight +ffffffff81a0f4e0 t lpt_set_backlight +ffffffff81a0f550 t lpt_disable_backlight +ffffffff81a0f670 t lpt_enable_backlight +ffffffff81a0f870 t lpt_hz_to_pwm +ffffffff81a0f8e0 t pch_get_backlight +ffffffff81a0f940 t spt_hz_to_pwm +ffffffff81a0f990 t pch_setup_backlight +ffffffff81a0fba0 t pch_set_backlight +ffffffff81a0fc10 t pch_disable_backlight +ffffffff81a0fd00 t pch_enable_backlight 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intel_pwm_set_backlight +ffffffff81a116b0 t intel_pwm_disable_backlight +ffffffff81a11770 t intel_pwm_enable_backlight +ffffffff81a12000 T intel_bios_encoder_port +ffffffff81a12080 t dvo_port_to_port +ffffffff81a12260 T intel_bios_dp_max_link_rate +ffffffff81a122e0 T intel_bios_dp_max_lane_count +ffffffff81a12330 T intel_bios_encoder_supports_dvi +ffffffff81a12360 T intel_bios_encoder_supports_hdmi +ffffffff81a123a0 T intel_bios_encoder_supports_dp +ffffffff81a123d0 T intel_bios_encoder_supports_edp +ffffffff81a12410 T intel_bios_encoder_supports_dsi +ffffffff81a12440 T intel_bios_encoder_is_lspcon +ffffffff81a12490 T intel_bios_hdmi_level_shift +ffffffff81a124f0 T intel_bios_hdmi_max_tmds_clock +ffffffff81a12580 T intel_bios_is_valid_vbt +ffffffff81a12670 T intel_bios_init +ffffffff81a14500 T intel_bios_init_panel_early +ffffffff81a14520 t intel_bios_init_panel +ffffffff81a16630 T intel_bios_init_panel_late +ffffffff81a16650 T intel_bios_driver_remove +ffffffff81a16740 T intel_bios_fini_panel +ffffffff81a16820 T intel_bios_is_tv_present +ffffffff81a168a0 T intel_bios_is_lvds_present +ffffffff81a16950 T intel_bios_is_port_present +ffffffff81a16a20 T intel_bios_encoder_supports_dp_dual_mode +ffffffff81a16a90 T intel_bios_is_dsi_present +ffffffff81a16b60 T intel_bios_get_dsc_params +ffffffff81a16d80 T intel_bios_dp_aux_ch +ffffffff81a16e80 T intel_bios_dp_has_shared_aux_ch +ffffffff81a16f10 T intel_bios_dp_boost_level +ffffffff81a16fa0 T intel_bios_hdmi_boost_level +ffffffff81a17030 T intel_bios_hdmi_ddc_pin +ffffffff81a17190 T intel_bios_encoder_supports_typec_usb +ffffffff81a171e0 T intel_bios_encoder_supports_tbt +ffffffff81a17230 T intel_bios_encoder_lane_reversal +ffffffff81a17270 T intel_bios_encoder_hpd_invert +ffffffff81a172b0 T intel_bios_encoder_data_lookup +ffffffff81a17370 T intel_bios_for_each_encoder +ffffffff81a173f0 t opregion_get_panel_type +ffffffff81a17410 t vbt_get_panel_type +ffffffff81a17500 t pnpid_get_panel_type +ffffffff81a176e0 t fallback_get_panel_type +ffffffff81a17710 t fill_detail_timing_data +ffffffff81a18000 T icl_pcode_restrict_qgv_points +ffffffff81a18120 T intel_bw_init_hw +ffffffff81a18290 t tgl_get_bw_info +ffffffff81a18880 t icl_get_bw_info +ffffffff81a18c50 T intel_bw_crtc_update +ffffffff81a18d30 t intel_bw_crtc_data_rate +ffffffff81a18e50 T intel_atomic_get_old_bw_state +ffffffff81a18e70 T intel_atomic_get_new_bw_state +ffffffff81a18e90 T intel_atomic_get_bw_state +ffffffff81a18eb0 T intel_bw_min_cdclk +ffffffff81a19130 T intel_bw_calc_min_cdclk +ffffffff81a194f0 T intel_bw_atomic_check +ffffffff81a19f60 T intel_bw_init +ffffffff81a19fd0 t icl_get_qgv_points +ffffffff81a1a540 t skl_plane_calc_dbuf_bw +ffffffff81a1a680 t intel_bw_duplicate_state +ffffffff81a1a6f0 t intel_bw_destroy_state +ffffffff81a1b000 T intel_cdclk_get_cdclk +ffffffff81a1b020 T intel_cdclk_init_hw +ffffffff81a1b7d0 T intel_cdclk_uninit_hw +ffffffff81a1b8e0 T intel_cdclk_needs_modeset +ffffffff81a1b920 T intel_cdclk_dump_config +ffffffff81a1b9a0 T intel_set_cdclk_pre_plane_update +ffffffff81a1bce0 t intel_set_cdclk +ffffffff81a1c0b0 T intel_set_cdclk_post_plane_update +ffffffff81a1c340 T intel_crtc_compute_min_cdclk +ffffffff81a1c6d0 T intel_atomic_get_cdclk_state +ffffffff81a1c6f0 T intel_cdclk_atomic_check +ffffffff81a1c7f0 T intel_cdclk_init +ffffffff81a1c860 T intel_modeset_calc_cdclk +ffffffff81a1ce90 t intel_cdclk_can_crawl +ffffffff81a1cf20 T intel_update_max_cdclk +ffffffff81a1d280 T intel_update_cdclk +ffffffff81a1d320 T intel_read_rawclk +ffffffff81a1d4a0 t i9xx_hrawclk +ffffffff81a1d550 T intel_cdclk_debugfs_register +ffffffff81a1d580 T intel_init_cdclk_hooks +ffffffff81a1d9a0 t bxt_set_cdclk +ffffffff81a1e020 t _bxt_set_cdclk +ffffffff81a1e7e0 t skl_set_cdclk +ffffffff81a1edf0 t intel_cdclk_duplicate_state +ffffffff81a1ee70 t intel_cdclk_destroy_state +ffffffff81a1ee90 t bxt_get_cdclk +ffffffff81a1f0c0 t bxt_modeset_calc_cdclk +ffffffff81a1f510 t tgl_calc_voltage_level +ffffffff81a1f560 t intel_compute_min_cdclk +ffffffff81a1f760 t rplu_calc_voltage_level +ffffffff81a1f7b0 t ehl_calc_voltage_level +ffffffff81a1f800 t icl_calc_voltage_level +ffffffff81a1f850 t bxt_calc_voltage_level +ffffffff81a1f8a0 t skl_get_cdclk +ffffffff81a1fab0 t skl_modeset_calc_cdclk +ffffffff81a1fcc0 t bdw_get_cdclk +ffffffff81a1fdb0 t bdw_set_cdclk +ffffffff81a20340 t bdw_modeset_calc_cdclk +ffffffff81a20440 t hsw_get_cdclk +ffffffff81a20510 t fixed_modeset_calc_cdclk +ffffffff81a20550 t vlv_get_cdclk +ffffffff81a20610 t chv_set_cdclk +ffffffff81a20980 t vlv_modeset_calc_cdclk +ffffffff81a20b50 t vlv_set_cdclk +ffffffff81a21090 t fixed_400mhz_get_cdclk +ffffffff81a210c0 t fixed_450mhz_get_cdclk +ffffffff81a210f0 t gm45_get_cdclk +ffffffff81a211f0 t intel_hpll_vco +ffffffff81a21320 t g33_get_cdclk +ffffffff81a21430 t i965gm_get_cdclk +ffffffff81a21530 t pnv_get_cdclk +ffffffff81a215e0 t i945gm_get_cdclk +ffffffff81a21650 t i915gm_get_cdclk +ffffffff81a216c0 t fixed_333mhz_get_cdclk +ffffffff81a216f0 t fixed_266mhz_get_cdclk +ffffffff81a21720 t i85x_get_cdclk +ffffffff81a217a0 t fixed_200mhz_get_cdclk +ffffffff81a217d0 t fixed_133mhz_get_cdclk +ffffffff81a22000 T intel_color_load_luts +ffffffff81a22030 T intel_color_commit_noarm +ffffffff81a22080 T intel_color_commit_arm +ffffffff81a220b0 T intel_color_post_update +ffffffff81a22100 T intel_color_prepare_commit +ffffffff81a22130 T intel_color_cleanup_commit +ffffffff81a22180 T intel_color_check +ffffffff81a221a0 T intel_color_get_config +ffffffff81a22220 T intel_color_lut_equal +ffffffff81a22280 T intel_color_assert_luts +ffffffff81a22570 T intel_color_crtc_init +ffffffff81a225e0 T intel_color_init +ffffffff81a22710 T intel_color_init_hooks +ffffffff81a22840 t chv_color_check +ffffffff81a22d50 t i9xx_color_commit_arm +ffffffff81a22d60 t chv_load_luts +ffffffff81a23160 t chv_read_luts +ffffffff81a233e0 t chv_lut_equal +ffffffff81a23710 t chv_read_csc +ffffffff81a23830 t intel_color_add_affected_planes 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+ffffffff81a284c0 t icl_color_post_update +ffffffff81a284f0 t glk_color_check +ffffffff81a289e0 t skl_color_commit_noarm +ffffffff81a28a30 t skl_color_commit_arm +ffffffff81a28b50 t glk_load_luts +ffffffff81a28d00 t glk_read_luts +ffffffff81a28e80 t glk_lut_equal +ffffffff81a291a0 t skl_read_csc +ffffffff81a291f0 t ilk_csc_limited_range +ffffffff81a29290 t ilk_assign_csc +ffffffff81a29590 t ivb_color_check +ffffffff81a29be0 t bdw_load_luts +ffffffff81a29dc0 t bdw_read_luts +ffffffff81a29fb0 t ivb_lut_equal +ffffffff81a2a370 t ilk_assign_luts +ffffffff81a2a590 t ilk_color_commit_noarm +ffffffff81a2a5e0 t hsw_color_commit_arm +ffffffff81a2a690 t ilk_read_csc +ffffffff81a2a6e0 t ivb_load_luts +ffffffff81a2a8c0 t ivb_read_luts +ffffffff81a2ad70 t ivb_load_lut_10 +ffffffff81a2af70 t ilk_color_commit_arm +ffffffff81a2aff0 t ilk_color_check +ffffffff81a2b250 t ilk_load_luts +ffffffff81a2b4e0 t ilk_read_luts +ffffffff81a2b740 t ilk_lut_equal +ffffffff81a2c000 T intel_combo_phy_power_up_lanes +ffffffff81a2c120 T intel_combo_phy_init +ffffffff81a2c5d0 T intel_combo_phy_uninit +ffffffff81a2c7a0 t icl_combo_phy_verify_state +ffffffff81a2d000 T intel_connector_init +ffffffff81a2d070 T intel_connector_alloc +ffffffff81a2d100 T intel_connector_free +ffffffff81a2d140 T intel_connector_destroy +ffffffff81a2d1a0 T intel_connector_register +ffffffff81a2d1b0 T intel_connector_unregister +ffffffff81a2d1c0 T intel_connector_attach_encoder +ffffffff81a2d1e0 T intel_connector_get_hw_state +ffffffff81a2d230 T intel_connector_get_pipe +ffffffff81a2d2f0 T intel_connector_update_modes +ffffffff81a2d320 T intel_ddc_get_modes +ffffffff81a2d390 T intel_attach_force_audio_property +ffffffff81a2d430 T intel_attach_broadcast_rgb_property +ffffffff81a2d4d0 T intel_attach_aspect_ratio_property +ffffffff81a2d530 T intel_attach_hdmi_colorspace_property +ffffffff81a2d580 T intel_attach_dp_colorspace_property +ffffffff81a2d5d0 T intel_attach_scaling_mode_property +ffffffff81a2e000 T intel_crt_port_enabled +ffffffff81a2e080 T intel_crt_reset +ffffffff81a2e160 T intel_crt_init +ffffffff81a2e590 t hsw_crt_get_config +ffffffff81a2e640 t hsw_crt_compute_config +ffffffff81a2e730 t hsw_pre_pll_enable_crt +ffffffff81a2e7a0 t hsw_pre_enable_crt +ffffffff81a2e840 t hsw_enable_crt +ffffffff81a2e9e0 t hsw_disable_crt +ffffffff81a2ea50 t hsw_post_disable_crt +ffffffff81a2ebf0 t pch_crt_compute_config +ffffffff81a2ec40 t pch_disable_crt +ffffffff81a2ec70 t pch_post_disable_crt +ffffffff81a2ed60 t intel_crt_compute_config +ffffffff81a2edb0 t intel_disable_crt +ffffffff81a2eea0 t intel_crt_get_config +ffffffff81a2ef40 t intel_crt_get_hw_state +ffffffff81a2f000 t intel_enable_crt +ffffffff81a2f0f0 t intel_spurious_crt_detect_dmi_callback +ffffffff81a2f150 t intel_crt_get_modes +ffffffff81a2f250 t intel_crt_detect +ffffffff81a2f4c0 t intel_crt_mode_valid +ffffffff81a2f5d0 t intel_crt_get_edid +ffffffff81a2f670 t intel_crt_detect_hotplug +ffffffff81a2fac0 t intel_crt_detect_ddc +ffffffff81a2fb90 t intel_crt_load_detect +ffffffff81a31000 T intel_first_crtc +ffffffff81a31020 T intel_crtc_for_pipe +ffffffff81a31080 T intel_crtc_wait_for_next_vblank +ffffffff81a31090 T intel_wait_for_vblank_if_active +ffffffff81a31100 T intel_crtc_get_vblank_counter +ffffffff81a31180 T intel_crtc_max_vblank_count +ffffffff81a31210 T intel_crtc_vblank_on +ffffffff81a312a0 t assert_vblank_disabled +ffffffff81a31380 T intel_crtc_vblank_off +ffffffff81a313b0 T intel_crtc_state_alloc +ffffffff81a31450 T intel_crtc_state_reset +ffffffff81a314d0 T intel_crtc_init +ffffffff81a31850 T intel_wait_for_vblank_workers +ffffffff81a31910 T intel_usecs_to_scanlines +ffffffff81a31960 T intel_pipe_update_start +ffffffff81a31da0 T intel_pipe_update_end +ffffffff81a320a0 t intel_crtc_destroy +ffffffff81a320d0 t intel_crtc_late_register +ffffffff81a32100 t intel_crtc_vblank_work +ffffffff81a33000 T intel_output_format_name +ffffffff81a33040 T intel_crtc_state_dump +ffffffff81a34430 t ilk_dump_csc +ffffffff81a35000 T intel_cursor_plane_create +ffffffff81a35200 t i845_cursor_max_stride +ffffffff81a35230 t i845_cursor_update_arm +ffffffff81a35490 t i845_cursor_disable_arm +ffffffff81a354b0 t i845_cursor_get_hw_state +ffffffff81a35560 t i845_check_cursor +ffffffff81a35700 t i9xx_cursor_max_stride +ffffffff81a35740 t i9xx_cursor_update_arm +ffffffff81a35af0 t i9xx_cursor_disable_arm +ffffffff81a35b10 t i9xx_cursor_get_hw_state +ffffffff81a35c00 t i9xx_check_cursor +ffffffff81a35e80 t intel_check_cursor +ffffffff81a36090 t intel_legacy_cursor_update +ffffffff81a36450 t intel_cursor_format_mod_supported +ffffffff81a37000 T intel_is_c10phy +ffffffff81a37040 T intel_cx0_phy_set_signal_levels +ffffffff81a37630 t intel_cx0_rmw +ffffffff81a37720 T intel_c10pll_readout_hw_state +ffffffff81a378b0 T intel_c10pll_dump_hw_state +ffffffff81a37b30 T intel_cx0_phy_check_hdmi_link_rate +ffffffff81a37ca0 T intel_cx0pll_calc_state +ffffffff81a380b0 T intel_c20pll_readout_hw_state +ffffffff81a385d0 t intel_c20_sram_read +ffffffff81a386e0 T intel_c20pll_dump_hw_state +ffffffff81a38a90 T intel_c10pll_calc_port_clock +ffffffff81a38b70 T intel_c20pll_calc_port_clock +ffffffff81a38c70 T intel_mtl_tbt_calc_port_clock +ffffffff81a38dd0 T intel_mtl_pll_enable +ffffffff81a3a5e0 T intel_mtl_pll_disable +ffffffff81a3aa60 T intel_mtl_port_pll_type +ffffffff81a3aaf0 T intel_c10pll_state_verify +ffffffff81a3ade0 t __intel_cx0_read +ffffffff81a3b170 t __intel_cx0_write +ffffffff81a3b4c0 t intel_cx0_bus_reset +ffffffff81a3b5f0 t intel_cx0_wait_for_ack +ffffffff81a3b770 t intel_cx0_powerdown_change_sequence +ffffffff81a3b9d0 t intel_c20_sram_write +ffffffff81a3c000 T hsw_prepare_dp_ddi_buffers +ffffffff81a3c1a0 T intel_wait_ddi_buf_idle +ffffffff81a3c3a0 T intel_ddi_set_dp_msa +ffffffff81a3c570 T intel_ddi_enable_transcoder_func +ffffffff81a3c650 t intel_ddi_transcoder_func_reg_val_get +ffffffff81a3c900 T intel_ddi_disable_transcoder_func +ffffffff81a3caf0 T intel_ddi_toggle_hdcp_bits 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skl_ddi_is_clock_enabled +ffffffff81a43d60 t skl_ddi_get_config +ffffffff81a43df0 t icl_combo_phy_set_signal_levels +ffffffff81a448b0 t tgl_dkl_phy_set_signal_levels +ffffffff81a44bc0 t icl_mg_phy_set_signal_levels +ffffffff81a45450 t hsw_set_signal_levels +ffffffff81a457c0 t intel_ddi_max_lanes +ffffffff81a45890 t need_aux_ch +ffffffff81a45900 t intel_ddi_tc_encoder_suspend_complete +ffffffff81a45940 t intel_ddi_tc_encoder_shutdown_complete +ffffffff81a45980 t lpt_digital_port_connected +ffffffff81a459f0 t bdw_digital_port_connected +ffffffff81a45a60 t hsw_digital_port_connected +ffffffff81a45ad0 t intel_ddi_init_dp_connector +ffffffff81a45bb0 t intel_ddi_init_hdmi_connector +ffffffff81a45c20 t intel_ddi_encoder_reset +ffffffff81a45d00 t intel_ddi_encoder_destroy +ffffffff81a45db0 t intel_ddi_encoder_late_register +ffffffff81a45e10 t mtl_ddi_enable_d2d +ffffffff81a45fd0 t intel_wait_ddi_buf_active +ffffffff81a462e0 t intel_ddi_main_link_aux_domain +ffffffff81a463d0 t icl_program_mg_dp_mode +ffffffff81a466a0 t intel_ddi_init_dp_buf_reg +ffffffff81a468a0 t intel_disable_ddi_buf +ffffffff81a46a50 t mtl_disable_ddi_buf +ffffffff81a46e70 t intel_ddi_disable_fec_state +ffffffff81a46fc0 t mtl_ddi_prepare_link_retrain +ffffffff81a47300 t intel_ddi_prepare_link_retrain +ffffffff81a47800 t intel_ddi_set_link_train +ffffffff81a47950 t intel_ddi_set_idle_link_train +ffffffff81a47b20 t intel_ddi_dp_voltage_max +ffffffff81a47be0 t intel_ddi_dp_preemph_max +ffffffff81a48000 T is_hobl_buf_trans +ffffffff81a48040 T intel_ddi_buf_trans_init +ffffffff81a48300 t mtl_get_cx0_buf_trans +ffffffff81a483e0 t dg2_get_snps_buf_trans +ffffffff81a48450 t adlp_get_combo_buf_trans +ffffffff81a48570 t adlp_get_dkl_buf_trans +ffffffff81a485d0 t adls_get_combo_buf_trans +ffffffff81a486f0 t rkl_get_combo_buf_trans +ffffffff81a48810 t dg1_get_combo_buf_trans +ffffffff81a48930 t tgl_get_combo_buf_trans +ffffffff81a48a70 t tgl_get_dkl_buf_trans +ffffffff81a48ad0 t jsl_get_combo_buf_trans +ffffffff81a48b70 t ehl_get_combo_buf_trans +ffffffff81a48c10 t icl_get_combo_buf_trans +ffffffff81a48cc0 t icl_get_mg_buf_trans +ffffffff81a48d20 t bxt_get_buf_trans +ffffffff81a48da0 t kbl_y_get_buf_trans +ffffffff81a48e40 t kbl_u_get_buf_trans +ffffffff81a48ee0 t kbl_get_buf_trans +ffffffff81a48f80 t skl_y_get_buf_trans +ffffffff81a49020 t skl_u_get_buf_trans +ffffffff81a490c0 t skl_get_buf_trans +ffffffff81a49160 t bdw_get_buf_trans +ffffffff81a491f0 t hsw_get_buf_trans +ffffffff81a4a000 T vlv_get_hpll_vco +ffffffff81a4a050 T vlv_get_cck_clock +ffffffff81a4a100 T vlv_get_cck_clock_hpll +ffffffff81a4a200 T intel_update_czclk +ffffffff81a4a280 T is_trans_port_sync_master +ffffffff81a4a2b0 T is_trans_port_sync_mode +ffffffff81a4a2f0 T intel_crtc_bigjoiner_slave_pipes +ffffffff81a4a350 T intel_crtc_is_bigjoiner_slave +ffffffff81a4a3b0 T intel_crtc_is_bigjoiner_master +ffffffff81a4a410 T intel_master_crtc +ffffffff81a4a4a0 T assert_transcoder +ffffffff81a4a660 t transcoder_name +ffffffff81a4a6a0 T vlv_wait_port_ready +ffffffff81a4a7f0 T intel_enable_transcoder +ffffffff81a4aa50 t assert_planes_disabled +ffffffff81a4ab80 T intel_disable_transcoder +ffffffff81a4ada0 T intel_rotation_info_size +ffffffff81a4adf0 T intel_remapped_info_size +ffffffff81a4af20 T intel_plane_uses_fence +ffffffff81a4af70 T intel_fb_xy_to_linear +ffffffff81a4afc0 T intel_add_fb_offsets +ffffffff81a4b010 T intel_plane_fb_max_stride +ffffffff81a4b090 T intel_set_plane_visible +ffffffff81a4b0e0 T intel_plane_fixup_bitmasks +ffffffff81a4b190 T intel_plane_disable_noatomic +ffffffff81a4b380 T intel_plane_fence_y_offset +ffffffff81a4b3e0 T intel_has_pending_fb_unpin +ffffffff81a4b4d0 T intel_get_crtc_new_encoder +ffffffff81a4b660 T ilk_pfit_disable +ffffffff81a4b720 T intel_phy_is_combo +ffffffff81a4b790 T intel_phy_is_tc +ffffffff81a4b800 T intel_phy_is_snps +ffffffff81a4b850 T intel_port_to_phy +ffffffff81a4b900 T intel_port_to_tc +ffffffff81a4ba10 T intel_aux_power_domain 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intel_plane_destroy +ffffffff81a55d40 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81a55db0 T assert_port_valid +ffffffff81a55e30 T intel_setup_outputs +ffffffff81a566c0 T intel_mode_valid +ffffffff81a56840 T intel_cpu_transcoder_mode_valid +ffffffff81a56900 T intel_mode_valid_max_plane_size +ffffffff81a56980 T intel_init_display_hooks +ffffffff81a56a00 T intel_initial_commit +ffffffff81a56ba0 T i830_enable_pipe +ffffffff81a571e0 T i830_disable_pipe +ffffffff81a57510 T intel_hpd_poll_fini +ffffffff81a57610 T intel_scanout_needs_vtd_wa +ffffffff81a57650 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81a577b0 t intel_atomic_cleanup_work +ffffffff81a578b0 t intel_pre_plane_update +ffffffff81a57e10 t hsw_get_pipe_config +ffffffff81a58a40 t hsw_crtc_enable +ffffffff81a594a0 t hsw_crtc_disable +ffffffff81a597a0 t skl_commit_modeset_enables +ffffffff81a59d70 t intel_get_transcoder_timings +ffffffff81a5a080 t intel_get_pipe_src_size +ffffffff81a5a1a0 t ilk_get_pfit_config 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T intel_display_driver_probe +ffffffff81a5f800 T intel_display_driver_register +ffffffff81a5f860 T intel_display_driver_remove +ffffffff81a5f910 T intel_display_driver_remove_noirq +ffffffff81a5f9c0 T intel_display_driver_remove_nogem +ffffffff81a5fa00 T intel_display_driver_unregister +ffffffff81a5fa80 T intel_display_driver_suspend +ffffffff81a5fb30 T __intel_display_driver_resume +ffffffff81a5fc40 T intel_display_driver_resume +ffffffff81a60000 T ilk_update_display_irq +ffffffff81a60140 T ilk_enable_display_irq +ffffffff81a60160 T ilk_disable_display_irq +ffffffff81a60240 T bdw_update_port_irq +ffffffff81a60390 T bdw_enable_pipe_irq +ffffffff81a603b0 t bdw_update_pipe_irq +ffffffff81a60510 T bdw_disable_pipe_irq +ffffffff81a60620 T ibx_display_interrupt_update +ffffffff81a60740 T ibx_enable_display_interrupt +ffffffff81a60760 T ibx_disable_display_interrupt +ffffffff81a60820 T i915_pipestat_enable_mask +ffffffff81a609b0 T i915_enable_pipestat +ffffffff81a60b30 T i915_disable_pipestat +ffffffff81a60ca0 T i915_enable_asle_pipestat +ffffffff81a60d50 T i9xx_pipestat_irq_reset +ffffffff81a60ee0 T i9xx_pipestat_irq_ack +ffffffff81a61060 T i8xx_pipestat_irq_handler +ffffffff81a61250 t i9xx_pipe_crc_irq_handler +ffffffff81a61390 T i915_pipestat_irq_handler +ffffffff81a615c0 T i965_pipestat_irq_handler +ffffffff81a61800 T valleyview_pipestat_irq_handler +ffffffff81a619a0 T ilk_display_irq_handler +ffffffff81a61ee0 t cpt_irq_handler +ffffffff81a62250 T ivb_display_irq_handler +ffffffff81a627f0 T gen8_de_pipe_underrun_mask +ffffffff81a62830 T gen8_de_irq_handler +ffffffff81a63410 T gen11_gu_misc_irq_ack +ffffffff81a63460 T gen11_gu_misc_irq_handler +ffffffff81a634a0 T gen11_display_irq_handler +ffffffff81a63530 T i8xx_enable_vblank +ffffffff81a635a0 T i915gm_enable_vblank +ffffffff81a63650 T i965_enable_vblank +ffffffff81a636c0 T ilk_enable_vblank +ffffffff81a63770 T bdw_enable_vblank +ffffffff81a63920 T i8xx_disable_vblank +ffffffff81a63980 T i915gm_disable_vblank +ffffffff81a63a40 T i965_disable_vblank +ffffffff81a63aa0 T ilk_disable_vblank +ffffffff81a63ba0 T bdw_disable_vblank +ffffffff81a63d20 T vlv_display_irq_reset +ffffffff81a63e10 T vlv_display_irq_postinstall +ffffffff81a63f60 T gen8_display_irq_reset +ffffffff81a640f0 T gen11_display_irq_reset +ffffffff81a643c0 T gen8_irq_power_well_post_enable +ffffffff81a64530 T gen8_irq_power_well_pre_disable +ffffffff81a64640 T valleyview_enable_display_irqs +ffffffff81a64760 T valleyview_disable_display_irqs +ffffffff81a64870 T ilk_de_irq_postinstall +ffffffff81a64980 T gen8_de_irq_postinstall +ffffffff81a64df0 T gen11_de_irq_postinstall +ffffffff81a64e60 T dg1_de_irq_postinstall +ffffffff81a64ed0 T intel_display_irq_init +ffffffff81a65000 T intel_display_power_domain_str +ffffffff81a65060 T __intel_display_power_is_enabled +ffffffff81a65120 T intel_display_power_is_enabled +ffffffff81a65240 T intel_display_power_set_target_dc_state +ffffffff81a65360 T intel_display_power_get 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intel_pch_reset_handshake +ffffffff81a677d0 T intel_power_domains_driver_remove +ffffffff81a678c0 T intel_power_domains_sanitize_state +ffffffff81a679b0 T intel_power_domains_enable +ffffffff81a67a10 T intel_power_domains_disable +ffffffff81a67ac0 T intel_power_domains_suspend +ffffffff81a67c70 t icl_display_core_uninit +ffffffff81a67d80 t bxt_display_core_uninit +ffffffff81a67e40 T intel_power_domains_resume +ffffffff81a67f10 T intel_display_power_suspend_late +ffffffff81a67ff0 t hsw_enable_pc8 +ffffffff81a68ce0 T intel_display_power_resume_early +ffffffff81a68dd0 t hsw_disable_pc8 +ffffffff81a69200 T intel_display_power_suspend +ffffffff81a69280 T intel_display_power_resume +ffffffff81a69360 T intel_display_power_debug +ffffffff81a69420 T intel_display_power_ddi_io_domain +ffffffff81a69510 T intel_display_power_ddi_lanes_domain +ffffffff81a69600 T intel_display_power_aux_io_domain +ffffffff81a69710 T intel_display_power_legacy_aux_domain +ffffffff81a69820 T intel_display_power_tbt_aux_domain +ffffffff81a69930 t __delayed_work_tick +ffffffff81a6a000 T intel_display_power_map_init +ffffffff81a6a180 t __set_power_wells +ffffffff81a6a560 T intel_display_power_map_cleanup +ffffffff81a6b000 T lookup_power_well +ffffffff81a6b0c0 T intel_power_well_enable +ffffffff81a6b150 T intel_power_well_name +ffffffff81a6b190 T intel_power_well_disable +ffffffff81a6b200 T intel_power_well_sync_hw +ffffffff81a6b270 T intel_power_well_get +ffffffff81a6b310 T intel_power_well_put +ffffffff81a6b410 T intel_power_well_is_enabled +ffffffff81a6b430 T intel_power_well_is_enabled_cached +ffffffff81a6b460 T intel_display_power_well_is_enabled +ffffffff81a6b510 T intel_power_well_is_always_on +ffffffff81a6b550 T intel_power_well_domains +ffffffff81a6b580 T intel_power_well_refcount +ffffffff81a6b5b0 T gen9_sanitize_dc_state +ffffffff81a6b680 T gen9_set_dc_state +ffffffff81a6b9e0 T gen9_enable_dc5 +ffffffff81a6bc40 T skl_enable_dc6 +ffffffff81a6bda0 T bxt_enable_dc9 +ffffffff81a6bf50 T bxt_disable_dc9 +ffffffff81a6c040 T gen9_disable_dc_states +ffffffff81a6c410 T chv_phy_powergate_ch +ffffffff81a6c520 t assert_chv_phy_status +ffffffff81a6c8d0 T chv_phy_powergate_lanes +ffffffff81a6cb30 t i9xx_power_well_sync_hw_noop +ffffffff81a6cb60 t i9xx_always_on_power_well_noop +ffffffff81a6cb90 t i9xx_always_on_power_well_enabled +ffffffff81a6cbc0 t chv_pipe_power_well_sync_hw +ffffffff81a6cbf0 t chv_pipe_power_well_enable +ffffffff81a6cc20 t chv_pipe_power_well_disable +ffffffff81a6cc80 t chv_pipe_power_well_enabled +ffffffff81a6cd80 t chv_dpio_cmn_power_well_enable +ffffffff81a6cfa0 t chv_dpio_cmn_power_well_disable +ffffffff81a6d0d0 t vlv_power_well_enabled +ffffffff81a6d1f0 t i830_pipes_power_well_sync_hw +ffffffff81a6d2e0 t i830_pipes_power_well_enable +ffffffff81a6d3a0 t i830_pipes_power_well_disable +ffffffff81a6d3d0 t i830_pipes_power_well_enabled +ffffffff81a6d470 t hsw_power_well_sync_hw +ffffffff81a6d560 t hsw_power_well_enable +ffffffff81a6d7e0 t hsw_power_well_disable +ffffffff81a6d8a0 t hsw_power_well_enabled +ffffffff81a6d980 t gen9_dc_off_power_well_enable +ffffffff81a6d990 t gen9_dc_off_power_well_disable +ffffffff81a6da30 t gen9_dc_off_power_well_enabled +ffffffff81a6dac0 t bxt_dpio_cmn_power_well_enable +ffffffff81a6daf0 t bxt_dpio_cmn_power_well_disable +ffffffff81a6db20 t bxt_dpio_cmn_power_well_enabled +ffffffff81a6db50 t vlv_display_power_well_enable +ffffffff81a6db80 t vlv_display_power_well_disable +ffffffff81a6dbf0 t vlv_dpio_cmn_power_well_enable +ffffffff81a6dc70 t vlv_dpio_cmn_power_well_disable +ffffffff81a6dd70 t vlv_power_well_enable +ffffffff81a6dd90 t vlv_power_well_disable +ffffffff81a6ddb0 t icl_aux_power_well_enable +ffffffff81a6e490 t icl_aux_power_well_disable +ffffffff81a6e720 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81a6e740 t tgl_tc_cold_off_power_well_enable +ffffffff81a6e760 t tgl_tc_cold_off_power_well_disable +ffffffff81a6e780 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81a6e7b0 t xelpdp_aux_power_well_enable +ffffffff81a6e880 t xelpdp_aux_power_well_disable +ffffffff81a6e950 t xelpdp_aux_power_well_enabled +ffffffff81a6ea00 t chv_set_pipe_power_well +ffffffff81a6ec00 t vlv_display_power_well_init +ffffffff81a6ef60 t vlv_set_power_well +ffffffff81a6f180 t hsw_wait_for_power_well_enable +ffffffff81a6f2d0 t hsw_wait_for_power_well_disable +ffffffff81a6f5a0 t tgl_tc_cold_request +ffffffff81a70000 T intel_display_reset_prepare +ffffffff81a701f0 T intel_display_reset_finish +ffffffff81a71000 T intel_display_rps_boost_after_vblank +ffffffff81a71110 t do_rps_boost +ffffffff81a711c0 T intel_display_rps_mark_interactive +ffffffff81a72000 T intel_dkl_phy_init +ffffffff81a72020 T intel_dkl_phy_read +ffffffff81a72150 T intel_dkl_phy_write +ffffffff81a72260 T intel_dkl_phy_rmw +ffffffff81a72390 T intel_dkl_phy_posting_read +ffffffff81a73000 T intel_dmc_has_payload +ffffffff81a73050 T intel_dmc_enable_pipe +ffffffff81a73160 T intel_dmc_disable_pipe +ffffffff81a73270 T intel_dmc_load_program +ffffffff81a73aa0 t pipedmc_clock_gating_wa +ffffffff81a73c90 T intel_dmc_disable_program +ffffffff81a73ec0 T assert_dmc_loaded +ffffffff81a74040 T intel_dmc_init +ffffffff81a74300 t dmc_load_work_fn +ffffffff81a74c30 T intel_dmc_suspend +ffffffff81a74cc0 T intel_dmc_resume +ffffffff81a74d60 T intel_dmc_fini +ffffffff81a74eb0 T intel_dmc_print_error_state +ffffffff81a74fb0 T intel_dmc_debugfs_register +ffffffff81a75000 T intel_dp_is_edp +ffffffff81a75030 T intel_dp_is_uhbr +ffffffff81a75070 T intel_dp_max_lane_count +ffffffff81a750e0 T intel_dp_link_required +ffffffff81a75120 T intel_dp_max_data_rate +ffffffff81a75180 T intel_dp_can_bigjoiner +ffffffff81a751d0 T intel_dp_get_link_train_fallback_values +ffffffff81a75580 T intel_dp_mode_to_fec_clock +ffffffff81a755d0 T intel_dp_dsc_nearest_valid_bpp +ffffffff81a756d0 T intel_dp_dsc_get_output_bpp +ffffffff81a757f0 T intel_dp_dsc_get_slice_count +ffffffff81a75980 T intel_dp_min_bpp +ffffffff81a759c0 T intel_dp_need_bigjoiner +ffffffff81a75a20 T intel_dp_source_supports_tps3 +ffffffff81a75a70 T intel_dp_source_supports_tps4 +ffffffff81a75ab0 T intel_dp_max_link_rate +ffffffff81a75b60 T intel_dp_rate_select +ffffffff81a75c00 T intel_dp_compute_rate +ffffffff81a75cd0 T intel_dp_has_hdmi_sink +ffffffff81a75d10 T intel_dp_adjust_compliance_config +ffffffff81a75e50 T intel_dp_dsc_compute_bpp +ffffffff81a75f00 T intel_dp_dsc_compute_config +ffffffff81a765e0 T intel_dp_limited_color_range +ffffffff81a76650 T intel_dp_compute_psr_vsc_sdp +ffffffff81a766d0 T intel_dp_needs_vsc_sdp +ffffffff81a76720 t intel_dp_compute_vsc_colorimetry +ffffffff81a768a0 T intel_dp_compute_config +ffffffff81a76cf0 t intel_dp_compute_output_format +ffffffff81a76f20 t intel_dp_audio_compute_config +ffffffff81a77000 t intel_dp_drrs_compute_config +ffffffff81a771b0 t intel_dp_compute_vsc_sdp +ffffffff81a77250 t intel_dp_compute_hdr_metadata_infoframe_sdp +ffffffff81a772e0 T intel_dp_set_link_params +ffffffff81a77320 T intel_edp_backlight_on +ffffffff81a773c0 T intel_edp_backlight_off +ffffffff81a77450 T intel_dp_sink_set_decompression_state +ffffffff81a774f0 T intel_dp_wait_source_oui +ffffffff81a775e0 T intel_dp_set_power +ffffffff81a77800 T intel_dp_sync_state +ffffffff81a77880 t intel_dp_get_dpcd +ffffffff81a779e0 t intel_dp_reset_max_link_params +ffffffff81a77ae0 T intel_dp_initial_fastset_check +ffffffff81a77c10 T intel_dp_check_frl_training +ffffffff81a781c0 T intel_dp_pcon_dsc_configure +ffffffff81a783b0 T intel_dp_configure_protocol_converter +ffffffff81a78590 T intel_dp_get_colorimetry_status +ffffffff81a785f0 T intel_edp_fixup_vbt_bpp +ffffffff81a78680 T intel_write_dp_vsc_sdp +ffffffff81a78820 T intel_dp_set_infoframes +ffffffff81a78940 t intel_write_dp_sdp +ffffffff81a78c20 T intel_read_dp_sdp +ffffffff81a78f40 T intel_dp_get_active_pipes +ffffffff81a79160 T intel_dp_retrain_link +ffffffff81a79410 t intel_dp_needs_link_retrain +ffffffff81a79590 T intel_dp_phy_test +ffffffff81a79c40 T intel_digital_port_connected +ffffffff81a79cf0 T intel_dp_encoder_flush_work +ffffffff81a79d50 T intel_dp_encoder_suspend +ffffffff81a79d90 T intel_dp_encoder_shutdown +ffffffff81a79dd0 T intel_dp_hpd_pulse +ffffffff81a7a440 T intel_dp_is_port_edp +ffffffff81a7a4d0 T intel_dp_init_connector +ffffffff81a7b640 t intel_dp_modeset_retry_work_fn +ffffffff81a7b6e0 t intel_dp_set_common_rates +ffffffff81a7b860 T intel_dp_mst_suspend +ffffffff81a7b900 T intel_dp_mst_resume +ffffffff81a7b9b0 t intel_dp_output_format +ffffffff81a7baf0 t intel_dp_compute_link_config +ffffffff81a7c2b0 t intel_dp_tmds_clock_valid +ffffffff81a7c350 t intel_dp_set_sink_rates +ffffffff81a7c590 t intel_dp_check_device_service_irq +ffffffff81a7cb60 t intel_dp_force +ffffffff81a7cc90 t intel_dp_connector_register +ffffffff81a7cd60 t intel_dp_connector_unregister +ffffffff81a7cdc0 t intel_dp_oob_hotplug_event +ffffffff81a7ce40 t intel_dp_set_edid +ffffffff81a7d240 t intel_dp_get_modes +ffffffff81a7d330 t intel_dp_detect +ffffffff81a7dbf0 t intel_dp_mode_valid +ffffffff81a7df70 t intel_dp_connector_atomic_check +ffffffff81a7e2e0 t intel_dp_get_dsc_sink_cap +ffffffff81a7e450 t intel_dp_mode_min_output_bpp +ffffffff81a7e4b0 t intel_dp_mode_valid_downstream +ffffffff81a7e670 t icl_max_source_rate +ffffffff81a7f000 T intel_dp_aux_pack +ffffffff81a7f070 T intel_dp_aux_fini +ffffffff81a7f090 T intel_dp_aux_init +ffffffff81a7f2a0 t xelpdp_aux_ctl_reg +ffffffff81a7f370 t xelpdp_aux_data_reg +ffffffff81a7f440 t tgl_aux_ctl_reg +ffffffff81a7f4c0 t tgl_aux_data_reg +ffffffff81a7f550 t skl_aux_ctl_reg +ffffffff81a7f5d0 t skl_aux_data_reg +ffffffff81a7f660 t ilk_aux_ctl_reg +ffffffff81a7f6e0 t ilk_aux_data_reg +ffffffff81a7f770 t g4x_aux_ctl_reg +ffffffff81a7f7f0 t g4x_aux_data_reg +ffffffff81a7f890 t skl_get_aux_clock_divider +ffffffff81a7f8c0 t hsw_get_aux_clock_divider +ffffffff81a7f950 t ilk_get_aux_clock_divider +ffffffff81a7f9b0 t g4x_get_aux_clock_divider +ffffffff81a7fa00 t skl_get_aux_send_ctl +ffffffff81a7fa80 t g4x_get_aux_send_ctl +ffffffff81a7fae0 t kasprintf +ffffffff81a7fbb0 t intel_dp_aux_transfer +ffffffff81a7fe40 T intel_dp_aux_ch +ffffffff81a7ffa0 T intel_dp_aux_irq_handler +ffffffff81a80040 t intel_dp_aux_xfer +ffffffff81a81000 T intel_dp_aux_init_backlight_funcs +ffffffff81a81260 t intel_dp_aux_hdr_setup_backlight +ffffffff81a813e0 t intel_dp_aux_hdr_get_backlight +ffffffff81a81560 t intel_dp_aux_hdr_set_backlight +ffffffff81a81660 t intel_dp_aux_hdr_disable_backlight +ffffffff81a816e0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a81920 t intel_dp_aux_vesa_setup_backlight +ffffffff81a81b80 t intel_dp_aux_vesa_get_backlight +ffffffff81a81bb0 t intel_dp_aux_vesa_set_backlight +ffffffff81a81c50 t intel_dp_aux_vesa_disable_backlight +ffffffff81a81d00 t intel_dp_aux_vesa_enable_backlight +ffffffff81a82000 T intel_dp_hdcp_init +ffffffff81a820b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a821a0 t intel_dp_hdcp_read_bksv +ffffffff81a82230 t intel_dp_hdcp_read_bstatus +ffffffff81a822c0 t intel_dp_hdcp_repeater_present +ffffffff81a82370 t intel_dp_hdcp_read_ri_prime +ffffffff81a82400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a824a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a82590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a82630 t intel_dp_hdcp_toggle_signalling +ffffffff81a82660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a82850 t intel_dp_hdcp_check_link +ffffffff81a828e0 t intel_dp_hdcp_capable +ffffffff81a82990 t intel_dp_hdcp2_capable +ffffffff81a82a10 t intel_dp_hdcp2_write_msg +ffffffff81a82bc0 t intel_dp_hdcp2_read_msg +ffffffff81a83290 t intel_dp_hdcp2_config_stream_type +ffffffff81a832f0 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a83560 t intel_dp_mst_hdcp2_check_link +ffffffff81a83620 t intel_dp_hdcp2_check_link +ffffffff81a84000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a840d0 t intel_dp_init_lttpr +ffffffff81a843b0 T intel_dp_get_adjust_train +ffffffff81a84ab0 T intel_dp_program_link_training_pattern +ffffffff81a84bd0 T intel_dp_set_signal_levels +ffffffff81a84f70 T intel_dp_dump_link_status +ffffffff81a85060 T intel_dp_stop_link_train +ffffffff81a85310 T intel_dp_start_link_train +ffffffff81a870d0 T intel_dp_128b132b_sdp_crc16 +ffffffff81a871a0 t intel_dp_link_train_phy +ffffffff81a89000 T intel_dp_mst_encoder_active_links +ffffffff81a89030 T intel_dp_mst_encoder_init +ffffffff81a89270 T intel_dp_mst_source_support +ffffffff81a892b0 T intel_dp_mst_encoder_cleanup +ffffffff81a89310 T intel_dp_mst_is_master_trans +ffffffff81a89350 T intel_dp_mst_is_slave_trans +ffffffff81a89390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a89450 t intel_dp_add_mst_connector +ffffffff81a89680 t intel_dp_mst_poll_hpd_irq +ffffffff81a896a0 t intel_dp_mst_get_hw_state +ffffffff81a89700 t intel_dp_mst_connector_late_register +ffffffff81a89770 t intel_dp_mst_connector_early_unregister +ffffffff81a897a0 t intel_dp_mst_get_modes +ffffffff81a89840 t intel_dp_mst_detect +ffffffff81a89940 t intel_dp_mst_mode_valid_ctx +ffffffff81a89b70 t intel_mst_atomic_best_encoder +ffffffff81a89bd0 t intel_dp_mst_atomic_check +ffffffff81a89d40 t intel_dp_mst_compute_config +ffffffff81a8a290 t intel_dp_mst_compute_config_late +ffffffff81a8a390 t intel_mst_disable_dp +ffffffff81a8a470 t intel_mst_post_disable_dp +ffffffff81a8a720 t intel_mst_post_pll_disable_dp +ffffffff81a8a780 t intel_mst_pre_pll_enable_dp +ffffffff81a8a7c0 t intel_mst_pre_enable_dp +ffffffff81a8a9e0 t intel_mst_enable_dp +ffffffff81a8ad80 t intel_dp_mst_enc_get_hw_state +ffffffff81a8adc0 t intel_dp_mst_enc_get_config +ffffffff81a8ade0 t intel_dp_mst_initial_fastset_check +ffffffff81a8ae00 t intel_dp_mst_encoder_destroy +ffffffff81a8ae30 t intel_dp_mst_find_vcpi_slots_for_bpp +ffffffff81a8c000 T bxt_port_to_phy_channel +ffffffff81a8c110 T bxt_ddi_phy_set_signal_levels +ffffffff81a8c4f0 T bxt_ddi_phy_is_enabled +ffffffff81a8c620 T bxt_ddi_phy_uninit +ffffffff81a8c700 T bxt_ddi_phy_init +ffffffff81a8c920 t _bxt_ddi_phy_init +ffffffff81a8ce70 T bxt_ddi_phy_verify_state +ffffffff81a8d150 t __phy_reg_verify_state +ffffffff81a8d250 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a8d2c0 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a8d520 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a8d700 T vlv_dig_port_to_channel +ffffffff81a8d770 T vlv_dig_port_to_phy +ffffffff81a8d7e0 T vlv_pipe_to_channel +ffffffff81a8d840 T chv_set_phy_signal_level +ffffffff81a8db90 T chv_data_lane_soft_reset +ffffffff81a8dd60 T chv_phy_pre_pll_enable +ffffffff81a8e000 T chv_phy_pre_encoder_enable +ffffffff81a8e260 T chv_phy_release_cl2_override +ffffffff81a8e2f0 T chv_phy_post_pll_disable +ffffffff81a8e3a0 T vlv_set_phy_signal_level +ffffffff81a8e510 T vlv_phy_pre_pll_enable +ffffffff81a8e610 T vlv_phy_pre_encoder_enable +ffffffff81a8e710 T vlv_phy_reset_lanes +ffffffff81a8f000 T pnv_calc_dpll_params +ffffffff81a8f0c0 T i9xx_calc_dpll_params +ffffffff81a8f190 T vlv_calc_dpll_params +ffffffff81a8f250 T chv_calc_dpll_params +ffffffff81a8f320 T bxt_find_best_dpll +ffffffff81a8f340 t chv_find_best_dpll +ffffffff81a8f680 T i9xx_dpll_compute_fp +ffffffff81a8f6c0 T vlv_compute_dpll +ffffffff81a8f740 T chv_compute_dpll +ffffffff81a8f7c0 T intel_dpll_crtc_compute_clock +ffffffff81a8f8c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a8fa10 T intel_dpll_init_clock_hook +ffffffff81a8fb20 T i9xx_enable_pll +ffffffff81a8fef0 T vlv_enable_pll +ffffffff81a90410 T chv_enable_pll +ffffffff81a909f0 T vlv_force_pll_on +ffffffff81a90b40 T vlv_disable_pll +ffffffff81a90c10 T chv_disable_pll +ffffffff81a90d40 T i9xx_disable_pll +ffffffff81a90e60 T vlv_force_pll_off +ffffffff81a90f60 T assert_pll_enabled +ffffffff81a91060 T assert_pll_disabled +ffffffff81a91160 t intel_pll_is_valid +ffffffff81a91220 t mtl_crtc_compute_clock +ffffffff81a912e0 t dg2_crtc_compute_clock +ffffffff81a91360 t hsw_crtc_compute_clock +ffffffff81a91420 t hsw_crtc_get_shared_dpll +ffffffff81a914c0 t ilk_crtc_compute_clock +ffffffff81a917c0 t ilk_crtc_get_shared_dpll +ffffffff81a91810 t g4x_find_best_dpll +ffffffff81a91b50 t chv_crtc_compute_clock +ffffffff81a91c60 t vlv_crtc_compute_clock +ffffffff81a92100 t g4x_crtc_compute_clock +ffffffff81a92260 t i9xx_compute_dpll +ffffffff81a924e0 t pnv_crtc_compute_clock +ffffffff81a928c0 t i9xx_crtc_compute_clock +ffffffff81a929e0 t i9xx_find_best_dpll +ffffffff81a92d20 t i8xx_crtc_compute_clock +ffffffff81a93000 T intel_get_shared_dpll_by_id +ffffffff81a93040 T assert_shared_dpll +ffffffff81a931f0 T intel_dpll_get_hw_state +ffffffff81a93220 T icl_tc_port_to_pll_id +ffffffff81a93250 T intel_enable_shared_dpll +ffffffff81a935b0 T intel_disable_shared_dpll +ffffffff81a93850 T intel_unreference_shared_dpll_crtc +ffffffff81a93950 T intel_shared_dpll_swap_state +ffffffff81a93a30 T icl_set_active_port_dpll +ffffffff81a93a70 T intel_shared_dpll_init +ffffffff81a93c70 T intel_compute_shared_dplls +ffffffff81a93d00 T intel_reserve_shared_dplls +ffffffff81a93d90 T intel_release_shared_dplls +ffffffff81a93dd0 T intel_update_active_dpll +ffffffff81a93e30 T intel_dpll_get_freq +ffffffff81a93ec0 T intel_dpll_update_ref_clks +ffffffff81a93f10 T intel_dpll_readout_hw_state +ffffffff81a94140 T intel_dpll_sanitize_state +ffffffff81a94220 T intel_dpll_dump_hw_state +ffffffff81a942a0 T intel_shared_dpll_state_verify +ffffffff81a94480 t verify_single_dpll_state +ffffffff81a94a00 T intel_shared_dpll_verify_disabled +ffffffff81a94a80 t icl_compute_dplls +ffffffff81a956c0 t icl_get_dplls +ffffffff81a95990 t icl_put_dplls +ffffffff81a95a50 t icl_update_active_dpll +ffffffff81a95b00 t icl_update_dpll_ref_clks +ffffffff81a95b40 t icl_dump_hw_state +ffffffff81a95c00 t combo_pll_enable +ffffffff81a95e10 t combo_pll_disable +ffffffff81a95ee0 t combo_pll_get_hw_state +ffffffff81a95f60 t icl_ddi_combo_pll_get_freq +ffffffff81a96130 t icl_dpll_write +ffffffff81a96370 t adlp_cmtg_clock_gating_wa +ffffffff81a964d0 t icl_pll_disable +ffffffff81a96670 t icl_pll_get_hw_state +ffffffff81a96950 t tbt_pll_enable +ffffffff81a96b10 t tbt_pll_disable +ffffffff81a96b30 t tbt_pll_get_hw_state +ffffffff81a96b50 t icl_ddi_tbt_pll_get_freq +ffffffff81a96bc0 t mg_pll_enable +ffffffff81a971e0 t mg_pll_disable +ffffffff81a97220 t dkl_pll_get_hw_state +ffffffff81a97430 t icl_ddi_mg_pll_get_freq +ffffffff81a97510 t icl_calc_dpll_state +ffffffff81a97650 t intel_find_shared_dpll +ffffffff81a97970 t intel_reference_shared_dpll +ffffffff81a97b90 t intel_unreference_shared_dpll +ffffffff81a97d90 t mg_pll_get_hw_state +ffffffff81a97fe0 t bxt_compute_dpll +ffffffff81a982e0 t bxt_get_dpll +ffffffff81a983b0 t intel_put_dpll +ffffffff81a98410 t bxt_update_dpll_ref_clks +ffffffff81a98450 t bxt_dump_hw_state +ffffffff81a98500 t bxt_ddi_pll_enable +ffffffff81a98ee0 t bxt_ddi_pll_disable +ffffffff81a990f0 t bxt_ddi_pll_get_hw_state +ffffffff81a99520 t bxt_ddi_pll_get_freq +ffffffff81a995b0 t bxt_ddi_set_dpll_hw_state +ffffffff81a997a0 t skl_compute_dpll +ffffffff81a99f00 t skl_get_dpll +ffffffff81a99fb0 t skl_update_dpll_ref_clks +ffffffff81a99ff0 t skl_dump_hw_state +ffffffff81a9a050 t skl_ddi_dpll0_enable +ffffffff81a9a110 t skl_ddi_dpll0_disable +ffffffff81a9a140 t skl_ddi_dpll0_get_hw_state +ffffffff81a9a240 t skl_ddi_pll_get_freq +ffffffff81a9a2d0 t skl_ddi_wrpll_get_freq +ffffffff81a9a430 t skl_ddi_pll_enable +ffffffff81a9a650 t skl_ddi_pll_disable +ffffffff81a9a6e0 t skl_ddi_pll_get_hw_state +ffffffff81a9a800 t hsw_compute_dpll +ffffffff81a9b020 t hsw_get_dpll +ffffffff81a9b170 t hsw_update_dpll_ref_clks +ffffffff81a9b1e0 t hsw_dump_hw_state +ffffffff81a9b210 t hsw_ddi_wrpll_enable +ffffffff81a9b290 t hsw_ddi_wrpll_disable +ffffffff81a9b370 t hsw_ddi_wrpll_get_hw_state +ffffffff81a9b410 t hsw_ddi_wrpll_get_freq +ffffffff81a9b500 t hsw_ddi_spll_enable +ffffffff81a9b560 t hsw_ddi_spll_disable +ffffffff81a9b630 t hsw_ddi_spll_get_hw_state +ffffffff81a9b6c0 t hsw_ddi_spll_get_freq +ffffffff81a9b760 t hsw_ddi_lcpll_enable +ffffffff81a9b790 t hsw_ddi_lcpll_disable +ffffffff81a9b7c0 t hsw_ddi_lcpll_get_hw_state +ffffffff81a9b7f0 t hsw_ddi_lcpll_get_freq +ffffffff81a9b870 t ibx_compute_dpll +ffffffff81a9b8a0 t ibx_get_dpll +ffffffff81a9b9a0 t ibx_dump_hw_state +ffffffff81a9ba00 t ibx_pch_dpll_enable +ffffffff81a9bbb0 t ibx_pch_dpll_disable +ffffffff81a9bc30 t ibx_pch_dpll_get_hw_state +ffffffff81a9c000 T intel_dpt_pin +ffffffff81a9c1e0 T intel_dpt_unpin +ffffffff81a9c250 T intel_dpt_resume +ffffffff81a9c320 T intel_dpt_suspend +ffffffff81a9c3f0 T intel_dpt_create +ffffffff81a9c7f0 t dpt_insert_page +ffffffff81a9c860 t dpt_clear_range +ffffffff81a9c890 t dpt_insert_entries +ffffffff81a9c980 t dpt_cleanup +ffffffff81a9c9d0 t dpt_bind_vma +ffffffff81a9ca60 t dpt_unbind_vma +ffffffff81a9ca90 T intel_dpt_destroy +ffffffff81a9cae0 T intel_dpt_configure +ffffffff81a9cc80 t __ww_mutex_lock +ffffffff81a9d000 T intel_drrs_type_str +ffffffff81a9d040 T intel_drrs_is_active +ffffffff81a9d070 T intel_drrs_activate +ffffffff81a9d260 T intel_drrs_deactivate +ffffffff81a9d420 T intel_drrs_invalidate +ffffffff81a9d440 t intel_drrs_frontbuffer_update +ffffffff81a9d690 T intel_drrs_flush +ffffffff81a9d6b0 T intel_drrs_crtc_init +ffffffff81a9d750 t intel_drrs_downclock_work +ffffffff81a9d870 T intel_drrs_crtc_debugfs_add +ffffffff81a9d8a0 T intel_drrs_connector_debugfs_add +ffffffff81a9d8b0 t __delayed_work_tick +ffffffff81a9e000 T intel_dsb_reg_write +ffffffff81a9e140 T intel_dsb_finish +ffffffff81a9e1c0 T intel_dsb_commit +ffffffff81a9e380 T intel_dsb_wait +ffffffff81a9e570 T intel_dsb_prepare +ffffffff81a9e6f0 T intel_dsb_cleanup +ffffffff81a9f000 T intel_dsi_wait_panel_power_cycle +ffffffff81a9f0f0 T intel_dsi_shutdown +ffffffff81a9f1e0 T intel_dsi_bitrate +ffffffff81a9f270 T intel_dsi_tlpx_ns +ffffffff81a9f2c0 T intel_dsi_get_modes +ffffffff81a9f2d0 T intel_dsi_mode_valid +ffffffff81a9f390 T intel_dsi_host_init +ffffffff81a9f440 T intel_dsi_get_panel_orientation +ffffffff81aa0000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81aa00a0 t dcs_setup_backlight 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intel_plane_adjust_aligned_offset +ffffffff81aa49d0 t intel_adjust_aligned_offset +ffffffff81aa4b80 T intel_plane_compute_aligned_offset +ffffffff81aa4c80 t intel_compute_aligned_offset +ffffffff81aa4e40 T intel_fb_needs_pot_stride_remap +ffffffff81aa4eb0 T intel_fb_supports_90_270_rotation +ffffffff81aa4f10 T intel_fill_fb_info +ffffffff81aa5a10 t calc_plane_remap_info +ffffffff81aa63c0 T intel_fb_fill_view +ffffffff81aa6430 T intel_plane_compute_gtt +ffffffff81aa6910 t intel_plane_check_stride +ffffffff81aa6a70 T intel_framebuffer_init +ffffffff81aa72f0 t gen12_ccs_aux_stride +ffffffff81aa7350 T intel_user_framebuffer_create +ffffffff81aa74b0 T intel_framebuffer_create +ffffffff81aa7540 t intel_adjust_tile_offset +ffffffff81aa7680 t intel_user_framebuffer_destroy +ffffffff81aa76f0 t intel_user_framebuffer_create_handle +ffffffff81aa7720 t intel_user_framebuffer_dirty +ffffffff81aa8000 T intel_pin_and_fence_fb_obj +ffffffff81aa8330 t i915_gem_object_lock +ffffffff81aa8550 T intel_unpin_fb_vma +ffffffff81aa85c0 T intel_plane_pin_fb +ffffffff81aa8930 T intel_plane_unpin_fb +ffffffff81aa9000 T intel_fbc_cleanup +ffffffff81aa91c0 T intel_fbc_pre_update +ffffffff81aa9850 T intel_fbc_post_update +ffffffff81aa9a00 T intel_fbc_invalidate +ffffffff81aa9b80 T intel_fbc_flush +ffffffff81aa9e20 T intel_fbc_atomic_check +ffffffff81aaa3e0 T intel_fbc_disable +ffffffff81aaa4a0 t __intel_fbc_disable +ffffffff81aaa5e0 T intel_fbc_update +ffffffff81aaaca0 T intel_fbc_reset_underrun +ffffffff81aaae00 T intel_fbc_handle_fifo_underrun_irq +ffffffff81aaaec0 T intel_fbc_add_plane +ffffffff81aaaef0 T intel_fbc_init +ffffffff81aab170 T intel_fbc_sanitize +ffffffff81aab240 T intel_fbc_crtc_debugfs_add +ffffffff81aab270 T intel_fbc_debugfs_register +ffffffff81aab2a0 t intel_fbc_is_ok +ffffffff81aab410 t intel_fbc_update_state +ffffffff81aab790 t intel_fbc_underrun_work_fn +ffffffff81aab860 t ivb_fbc_activate +ffffffff81aabab0 t ilk_fbc_deactivate +ffffffff81aabb60 t ilk_fbc_is_active +ffffffff81aabbc0 t ivb_fbc_is_compressing +ffffffff81aabc30 t snb_fbc_nuke +ffffffff81aabcb0 t ilk_fbc_program_cfb +ffffffff81aabd10 t ivb_fbc_set_false_color +ffffffff81aabd90 t snb_fbc_activate +ffffffff81aabe20 t ilk_fbc_is_compressing +ffffffff81aabe90 t ilk_fbc_activate +ffffffff81aabfc0 t i965_fbc_nuke +ffffffff81aac060 t g4x_fbc_activate +ffffffff81aac170 t g4x_fbc_deactivate +ffffffff81aac200 t g4x_fbc_is_active +ffffffff81aac260 t g4x_fbc_is_compressing +ffffffff81aac2c0 t g4x_fbc_program_cfb +ffffffff81aac310 t i8xx_fbc_activate +ffffffff81aac480 t i8xx_fbc_deactivate +ffffffff81aac550 t i8xx_fbc_is_active +ffffffff81aac5b0 t i8xx_fbc_is_compressing +ffffffff81aac610 t i8xx_fbc_program_cfb +ffffffff81aac690 t i8xx_fbc_nuke +ffffffff81aad000 T intel_fbdev_init +ffffffff81aad4f0 t intel_fbdev_suspend_worker +ffffffff81aad520 T intel_fbdev_initial_config_async +ffffffff81aad590 T intel_fbdev_unregister +ffffffff81aad5d0 T intel_fbdev_set_suspend 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intel_frontbuffer_put +ffffffff81ab4660 T intel_frontbuffer_track +ffffffff81ab5000 T intel_atomic_global_obj_init +ffffffff81ab5070 T intel_atomic_global_obj_cleanup +ffffffff81ab5160 T intel_atomic_get_global_obj_state +ffffffff81ab53b0 T intel_atomic_get_old_global_obj_state +ffffffff81ab5410 T intel_atomic_get_new_global_obj_state +ffffffff81ab5470 T intel_atomic_swap_global_state +ffffffff81ab55b0 T intel_atomic_clear_global_state +ffffffff81ab56d0 T intel_atomic_lock_global_state +ffffffff81ab5760 T intel_atomic_serialize_global_state +ffffffff81ab57f0 T intel_atomic_global_state_is_serialized +ffffffff81ab6000 T intel_gmbus_is_valid_pin +ffffffff81ab6100 T intel_gmbus_reset +ffffffff81ab6160 T intel_bb_set_bits +ffffffff81ab62a0 T intel_bb_set_dir +ffffffff81ab62d0 T intel_bb_read_bits +ffffffff81ab6460 T intel_acquire_bus +ffffffff81ab6660 T intel_release_bus +ffffffff81ab6800 T intel_send_start +ffffffff81ab6820 T intel_send_stop +ffffffff81ab6840 T intel_initiate_xfer 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intel_hdcp_check_work +ffffffff81abbff0 t intel_hdcp_prop_work +ffffffff81abc070 T intel_hdcp_enable +ffffffff81abc0c0 T intel_hdcp_disable +ffffffff81abc1f0 t intel_hdcp_update_value +ffffffff81abc3b0 t _intel_hdcp2_disable +ffffffff81abc7a0 t _intel_hdcp_disable +ffffffff81abca90 T intel_hdcp_update_pipe +ffffffff81abcc00 T intel_hdcp_component_fini +ffffffff81abcca0 T intel_hdcp_cleanup +ffffffff81abcde0 T intel_hdcp_atomic_check +ffffffff81abce70 T intel_hdcp_handle_cp_irq +ffffffff81abcf70 t __delayed_work_tick +ffffffff81abcf90 t hdcp2_authenticate_repeater_topology +ffffffff81abd250 t transcoder_name +ffffffff81abd290 t intel_hdcp_get_repeater_ctl +ffffffff81abd360 t ktime_get_raw +ffffffff81abd3e0 t wait_remaining_ms_from_jiffies +ffffffff81abd470 t intel_hdcp_auth_downstream +ffffffff81abe650 t intel_write_sha_text +ffffffff81abf000 T intel_hdcp_gsc_cs_required +ffffffff81abf040 T intel_hdcp_gsc_init +ffffffff81abf4c0 T intel_hdcp_gsc_fini +ffffffff81abf520 T intel_hdcp_gsc_msg_send +ffffffff81abf860 t gsc_hdcp_initiate_session +ffffffff81abf8b0 t gsc_hdcp_verify_receiver_cert_prepare_km +ffffffff81abf900 t gsc_hdcp_verify_hprime +ffffffff81abf950 t gsc_hdcp_store_pairing_info +ffffffff81abf9a0 t gsc_hdcp_initiate_locality_check +ffffffff81abf9f0 t gsc_hdcp_verify_lprime +ffffffff81abfa40 t gsc_hdcp_get_session_key +ffffffff81abfa90 t gsc_hdcp_repeater_check_flow_prepare_ack +ffffffff81abfae0 t gsc_hdcp_verify_mprime +ffffffff81abfb30 t gsc_hdcp_enable_authentication +ffffffff81abfb80 t gsc_hdcp_close_session +ffffffff81ac0000 T intel_hdmi_to_i915 +ffffffff81ac0040 T hsw_write_infoframe +ffffffff81ac0450 t hsw_dip_data_reg +ffffffff81ac0600 T hsw_read_infoframe +ffffffff81ac06c0 T intel_hdmi_infoframe_enable +ffffffff81ac0760 T intel_hdmi_infoframes_enabled +ffffffff81ac0880 T intel_read_infoframe +ffffffff81ac0a20 T intel_hdmi_read_gcp_infoframe +ffffffff81ac0b00 T intel_dp_dual_mode_set_tmds_output +ffffffff81ac0bc0 T intel_hdmi_tmds_clock +ffffffff81ac0c10 T intel_hdmi_bpc_possible +ffffffff81ac0d30 T intel_hdmi_limited_color_range +ffffffff81ac0da0 T intel_hdmi_compute_has_hdmi_sink +ffffffff81ac0e10 T intel_hdmi_compute_config +ffffffff81ac13c0 t intel_hdmi_compute_output_format +ffffffff81ac1520 t intel_hdmi_compute_hdmi_infoframe +ffffffff81ac15e0 t intel_hdmi_compute_drm_infoframe +ffffffff81ac16d0 T intel_hdmi_encoder_shutdown +ffffffff81ac17a0 T intel_hdmi_handle_sink_scrambling +ffffffff81ac1890 T intel_infoframe_init +ffffffff81ac1a30 t vlv_write_infoframe +ffffffff81ac1d60 t vlv_read_infoframe +ffffffff81ac1ee0 t vlv_set_infoframes +ffffffff81ac2220 t vlv_infoframes_enabled +ffffffff81ac22b0 t g4x_write_infoframe +ffffffff81ac2550 t g4x_read_infoframe +ffffffff81ac2680 t g4x_set_infoframes +ffffffff81ac2910 t g4x_infoframes_enabled +ffffffff81ac2990 t hsw_set_infoframes +ffffffff81ac2c20 t hsw_infoframes_enabled +ffffffff81ac2cb0 t ibx_write_infoframe +ffffffff81ac2fc0 t ibx_read_infoframe +ffffffff81ac3130 t ibx_set_infoframes +ffffffff81ac3460 t ibx_infoframes_enabled +ffffffff81ac34f0 t cpt_write_infoframe +ffffffff81ac37f0 t cpt_read_infoframe +ffffffff81ac3960 t cpt_set_infoframes +ffffffff81ac3c40 t cpt_infoframes_enabled +ffffffff81ac3cb0 T intel_hdmi_init_connector +ffffffff81ac4430 T intel_hdmi_dsc_get_slice_height +ffffffff81ac4490 T intel_hdmi_dsc_get_num_slices +ffffffff81ac4610 T intel_hdmi_dsc_get_bpp +ffffffff81ac46f0 t intel_hdmi_compute_clock +ffffffff81ac4950 t hdmi_port_clock_valid +ffffffff81ac4b70 t intel_write_infoframe +ffffffff81ac4d40 t intel_hdmi_detect +ffffffff81ac4ee0 t intel_hdmi_force +ffffffff81ac4f80 t intel_hdmi_connector_register +ffffffff81ac4f90 t intel_hdmi_connector_unregister +ffffffff81ac4fa0 t intel_hdmi_set_edid +ffffffff81ac5230 t intel_hdmi_get_modes +ffffffff81ac5240 t intel_hdmi_mode_valid +ffffffff81ac53f0 t intel_hdmi_connector_atomic_check +ffffffff81ac5420 t intel_hdmi_mode_clock_valid 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intel_hpd_init_early +ffffffff81ac78f0 t i915_hotplug_work_func +ffffffff81ac7cd0 t i915_digport_work_func +ffffffff81ac7e50 t i915_hpd_poll_init_work +ffffffff81ac7f50 t intel_hpd_irq_storm_reenable_work +ffffffff81ac8270 T intel_hpd_cancel_work +ffffffff81ac8390 T intel_hpd_disable +ffffffff81ac8420 T intel_hpd_enable +ffffffff81ac8490 T intel_hpd_debugfs_register +ffffffff81ac84c0 t __delayed_work_tick +ffffffff81ac9000 T i915_hotplug_interrupt_update_locked +ffffffff81ac90c0 T i915_hotplug_interrupt_update +ffffffff81ac9190 T i9xx_hpd_irq_ack +ffffffff81ac92d0 T i9xx_hpd_irq_handler +ffffffff81ac9480 T ibx_hpd_irq_handler +ffffffff81ac9620 T xelpdp_pica_irq_handler +ffffffff81ac98e0 T icp_irq_handler +ffffffff81ac9b70 T spt_irq_handler +ffffffff81ac9e10 T ilk_hpd_irq_handler +ffffffff81ac9f30 T bxt_hpd_irq_handler +ffffffff81aca090 T gen11_hpd_irq_handler +ffffffff81aca300 T intel_hpd_enable_detection +ffffffff81aca340 T intel_hpd_irq_setup +ffffffff81aca390 T intel_hotplug_irq_init +ffffffff81aca610 t i915_hpd_irq_setup +ffffffff81aca720 t i915_hpd_enable_detection +ffffffff81aca7c0 t icp_hpd_irq_setup +ffffffff81aca9b0 t icp_hpd_enable_detection +ffffffff81acaab0 t dg1_hpd_irq_setup +ffffffff81acab10 t dg1_hpd_enable_detection +ffffffff81acac50 t xelpdp_hpd_irq_setup +ffffffff81acb050 t xelpdp_hpd_enable_detection +ffffffff81acb1f0 t gen11_hpd_irq_setup +ffffffff81acb440 t gen11_hpd_enable_detection +ffffffff81acb640 t bxt_hpd_irq_setup +ffffffff81acb7c0 t bxt_hpd_enable_detection +ffffffff81acb8a0 t spt_hpd_irq_setup +ffffffff81acbac0 t spt_hpd_enable_detection +ffffffff81acbbe0 t ilk_hpd_irq_setup +ffffffff81acbe50 t ilk_hpd_enable_detection +ffffffff81acc000 T intel_hti_init +ffffffff81acc070 T intel_hti_uses_phy +ffffffff81acc110 T intel_hti_dpll_mask +ffffffff81acd000 T intel_load_detect_get_pipe +ffffffff81acd370 t intel_modeset_disable_planes +ffffffff81acd430 T intel_load_detect_release_pipe +ffffffff81ace000 T intel_lpe_audio_irq_handler +ffffffff81ace020 T intel_lpe_audio_init +ffffffff81ace050 T intel_lpe_audio_teardown +ffffffff81ace070 T intel_lpe_audio_notify +ffffffff81acf000 T lspcon_detect_hdr_capability +ffffffff81acf0b0 T lspcon_write_infoframe +ffffffff81acf820 T lspcon_read_infoframe +ffffffff81acf860 T lspcon_set_infoframes +ffffffff81acfac0 T lspcon_infoframes_enabled +ffffffff81acfca0 T lspcon_wait_pcon_mode +ffffffff81acfcc0 t lspcon_wait_mode +ffffffff81acff80 T lspcon_init +ffffffff81ad0390 T intel_lspcon_infoframes_enabled +ffffffff81ad03c0 T lspcon_resume +ffffffff81ad0660 t lspcon_change_mode +ffffffff81ad1000 T intel_lvds_port_enabled +ffffffff81ad1080 T intel_get_lvds_encoder +ffffffff81ad10e0 T intel_is_dual_link_lvds +ffffffff81ad1140 T intel_lvds_init +ffffffff81ad17e0 t intel_enable_lvds +ffffffff81ad1920 t intel_pre_enable_lvds +ffffffff81ad1c00 t intel_lvds_compute_config +ffffffff81ad1d60 t pch_disable_lvds +ffffffff81ad1d80 t pch_post_disable_lvds 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intel_opregion_asle_intr +ffffffff81ad7560 T intel_opregion_setup +ffffffff81ad7d80 t asle_work +ffffffff81ad81f0 T intel_opregion_get_panel_type +ffffffff81ad82e0 T intel_opregion_get_edid +ffffffff81ad83a0 T intel_opregion_headless_sku +ffffffff81ad83f0 T intel_opregion_register +ffffffff81ad8490 T intel_opregion_resume +ffffffff81ad8530 T intel_opregion_suspend +ffffffff81ad85e0 T intel_opregion_unregister +ffffffff81ad86b0 T intel_opregion_cleanup +ffffffff81ad87a0 t intel_no_opregion_vbt_callback +ffffffff81ad8800 t intel_use_opregion_panel_type_callback +ffffffff81ad9000 T intel_overlay_reset +ffffffff81ad9050 T intel_overlay_switch_off +ffffffff81ad9250 t intel_overlay_release_old_vid +ffffffff81ad93f0 T intel_overlay_put_image_ioctl +ffffffff81ad9700 t update_pfit_vscale_ratio +ffffffff81ad97d0 t check_overlay_dst +ffffffff81ad98a0 t check_overlay_src +ffffffff81ad9af0 t intel_overlay_do_put_image +ffffffff81ada670 T intel_overlay_attrs_ioctl +ffffffff81ada990 t check_gamma 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intel_panel_add_encoder_fixed_mode +ffffffff81adcd50 T intel_panel_fitting +ffffffff81add3b0 T intel_panel_detect +ffffffff81add440 T intel_panel_mode_valid +ffffffff81add4d0 T intel_panel_init_alloc +ffffffff81add520 T intel_panel_init +ffffffff81add640 T intel_panel_fini +ffffffff81ade000 T intel_has_pch_trancoder +ffffffff81ade060 T intel_crtc_pch_transcoder +ffffffff81ade0a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81ade0f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81ade140 T ilk_pch_pre_enable +ffffffff81ade170 T ilk_pch_enable +ffffffff81ade750 t ilk_pch_transcoder_set_timings +ffffffff81ade9b0 T ilk_pch_disable +ffffffff81ade9d0 T ilk_pch_post_disable +ffffffff81adedb0 T ilk_pch_get_config +ffffffff81adef70 T lpt_pch_enable +ffffffff81adf1e0 T lpt_pch_disable +ffffffff81adf2f0 T lpt_pch_get_config +ffffffff81adf3c0 T intel_pch_sanitize +ffffffff81adf6a0 t assert_pch_dp_disabled +ffffffff81adf820 t assert_pch_hdmi_disabled +ffffffff81ae0000 T lpt_disable_iclkip +ffffffff81ae0070 T lpt_iclkip +ffffffff81ae0100 T lpt_program_iclkip +ffffffff81ae0390 T lpt_get_iclkip +ffffffff81ae04a0 T lpt_disable_clkout_dp +ffffffff81ae0580 T intel_init_pch_refclk +ffffffff81ae2000 T intel_crtc_initial_plane_config +ffffffff81ae3000 T intel_pmdemand_init +ffffffff81ae3120 T intel_pmdemand_init_early +ffffffff81ae31a0 T intel_pmdemand_update_phys_mask +ffffffff81ae3240 T intel_pmdemand_update_port_clock +ffffffff81ae3280 T intel_pmdemand_atomic_check +ffffffff81ae3620 t intel_pmdemand_update_max_ddiclk +ffffffff81ae36f0 t intel_pmdemand_update_active_non_tc_phys +ffffffff81ae38f0 T intel_pmdemand_init_pmdemand_params +ffffffff81ae3ac0 T intel_pmdemand_program_dbuf +ffffffff81ae3c50 t intel_pmdemand_wait +ffffffff81ae3e40 T intel_pmdemand_pre_plane_update +ffffffff81ae3f30 t intel_pmdemand_program_params +ffffffff81ae4370 T intel_pmdemand_post_plane_update +ffffffff81ae4450 t intel_pmdemand_duplicate_state +ffffffff81ae44e0 t intel_pmdemand_destroy_state +ffffffff81ae5000 T intel_pps_lock +ffffffff81ae5060 T intel_pps_unlock +ffffffff81ae50c0 T intel_pps_reset_all +ffffffff81ae5210 T intel_pps_check_power_unlocked +ffffffff81ae54f0 t pps_name +ffffffff81ae5590 T intel_pps_wait_power_cycle +ffffffff81ae5630 t wait_panel_power_cycle +ffffffff81ae5810 T intel_pps_vdd_on_unlocked +ffffffff81ae5d80 T intel_pps_vdd_on +ffffffff81ae5f10 T intel_pps_vdd_off_sync +ffffffff81ae5fe0 t intel_pps_vdd_off_sync_unlocked +ffffffff81ae6400 T intel_pps_vdd_off_unlocked +ffffffff81ae65b0 T intel_pps_on_unlocked +ffffffff81ae6a40 T intel_pps_on +ffffffff81ae6ae0 T intel_pps_off_unlocked +ffffffff81ae6ec0 T intel_pps_off +ffffffff81ae6f60 T intel_pps_backlight_on +ffffffff81ae7150 T intel_pps_backlight_off +ffffffff81ae7340 T intel_pps_backlight_power +ffffffff81ae7530 T vlv_pps_init +ffffffff81ae7710 t vlv_detach_power_sequencer +ffffffff81ae78e0 t vlv_steal_power_sequencer +ffffffff81ae7a10 t pps_init_delays +ffffffff81ae7eb0 t pps_init_registers +ffffffff81ae8240 T intel_pps_have_panel_power_or_vdd +ffffffff81ae8390 T intel_pps_encoder_reset +ffffffff81ae8530 t vlv_initial_power_sequencer_setup +ffffffff81ae8840 t pps_vdd_init +ffffffff81ae89f0 T intel_pps_init +ffffffff81ae8e60 t edp_panel_vdd_work +ffffffff81ae8f10 T intel_pps_init_late +ffffffff81ae9150 T intel_pps_unlock_regs_wa +ffffffff81ae9260 T intel_pps_setup +ffffffff81ae92d0 T assert_pps_unlocked +ffffffff81ae9560 t intel_pps_get_registers +ffffffff81ae9d70 t wait_panel_status +ffffffff81aea190 t intel_pps_readout_hw_state +ffffffff81aea340 t __delayed_work_tick +ffffffff81aeb000 T intel_psr_irq_handler +ffffffff81aeb650 t transcoder_name +ffffffff81aeb690 T intel_psr_init_dpcd +ffffffff81aeb930 T intel_psr_compute_config +ffffffff81aebb10 t intel_psr2_config_valid +ffffffff81aebf80 T intel_psr_get_config +ffffffff81aec120 T intel_psr_disable +ffffffff81aec230 t intel_psr_disable_locked +ffffffff81aec5c0 T intel_psr_pause +ffffffff81aec7c0 t intel_psr_exit +ffffffff81aeca70 T intel_psr_resume +ffffffff81aecb00 t intel_psr_activate +ffffffff81aed230 T intel_psr2_disable_plane_sel_fetch_arm +ffffffff81aed2a0 T intel_psr2_program_plane_sel_fetch_arm +ffffffff81aed340 T intel_psr2_program_plane_sel_fetch_noarm +ffffffff81aed4b0 T intel_psr2_program_trans_man_trk_ctl +ffffffff81aed5a0 T intel_psr2_sel_fetch_update +ffffffff81aedcf0 T intel_psr_pre_plane_update +ffffffff81aedec0 t wm_optimization_wa +ffffffff81aee050 T intel_psr_post_plane_update +ffffffff81aeec80 T intel_psr_wait_for_idle_locked +ffffffff81aeee50 T intel_psr_debug_set +ffffffff81aef170 T intel_psr_invalidate +ffffffff81aef3b0 T intel_psr_flush +ffffffff81aef7e0 T intel_psr_init +ffffffff81aef910 t intel_psr_work +ffffffff81aefab0 t tgl_dc3co_disable_work +ffffffff81aefb00 T intel_psr_short_pulse +ffffffff81aefed0 T intel_psr_enabled +ffffffff81aeff50 T intel_psr_lock +ffffffff81af0010 T intel_psr_unlock +ffffffff81af00d0 T intel_psr_debugfs_register +ffffffff81af0100 T intel_psr_connector_debugfs_add +ffffffff81af0130 t _compute_psr2_sdp_prior_scanline_indication +ffffffff81af01f0 t _compute_psr2_wake_times +ffffffff81af02e0 t intel_psr2_sel_fetch_config_valid +ffffffff81af0370 t psr2_granularity_check +ffffffff81af0460 t tgl_psr2_disable_dc3co +ffffffff81af0570 t __delayed_work_tick +ffffffff81af1000 T intel_lookup_range_min_qp +ffffffff81af1110 T intel_lookup_range_max_qp +ffffffff81af2000 T intel_init_quirks +ffffffff81af20f0 T intel_has_quirk +ffffffff81af2130 t quirk_ssc_force_disable +ffffffff81af2160 t quirk_invert_brightness +ffffffff81af2190 t quirk_backlight_present +ffffffff81af21c0 t quirk_increase_t12_delay +ffffffff81af21f0 t quirk_increase_ddi_disabled_time +ffffffff81af2220 t intel_dmi_reverse_brightness +ffffffff81af2270 t intel_dmi_no_pps_backlight +ffffffff81af3000 T intel_sdvo_port_enabled +ffffffff81af30a0 T intel_sdvo_init +ffffffff81af4030 t intel_sdvo_compute_config +ffffffff81af43f0 t pch_disable_sdvo +ffffffff81af4420 t pch_post_disable_sdvo +ffffffff81af4430 t intel_disable_sdvo +ffffffff81af45a0 t intel_sdvo_pre_enable +ffffffff81af4f20 t intel_enable_sdvo +ffffffff81af50f0 t intel_sdvo_get_hw_state +ffffffff81af51e0 t intel_sdvo_get_config +ffffffff81af5600 t intel_sdvo_set_target_input +ffffffff81af5670 t intel_sdvo_get_input_pixel_clock_range +ffffffff81af5710 t intel_sdvo_ddc_proxy_xfer +ffffffff81af57c0 t intel_sdvo_ddc_proxy_func +ffffffff81af57f0 t __intel_sdvo_write_cmd +ffffffff81af5ca0 t proxy_lock_bus +ffffffff81af5cd0 t proxy_trylock_bus +ffffffff81af5d00 t proxy_unlock_bus +ffffffff81af5d30 t intel_sdvo_enc_destroy +ffffffff81af5d40 t intel_sdvo_set_output_timings_from_mode +ffffffff81af5e40 t intel_sdvo_get_preferred_input_mode +ffffffff81af61d0 t intel_sdvo_get_dtd_from_mode +ffffffff81af6350 t intel_sdvo_read_response +ffffffff81af67f0 t intel_sdvo_get_value +ffffffff81af6860 t intel_sdvo_write_sdvox +ffffffff81af6a50 t intel_sdvo_write_infoframe +ffffffff81af6c10 t intel_sdvo_read_infoframe +ffffffff81af6e30 t intel_sdvo_hotplug +ffffffff81af6e70 t intel_sdvo_connector_get_hw_state +ffffffff81af6f00 t intel_sdvo_detect +ffffffff81af71f0 t intel_sdvo_connector_register +ffffffff81af7200 t intel_sdvo_connector_unregister +ffffffff81af7210 t intel_sdvo_connector_duplicate_state +ffffffff81af7290 t intel_sdvo_connector_atomic_set_property +ffffffff81af7460 t intel_sdvo_connector_atomic_get_property +ffffffff81af7680 t intel_sdvo_get_analog_edid +ffffffff81af76b0 t intel_sdvo_connector_matches_edid +ffffffff81af7740 t intel_sdvo_get_modes +ffffffff81af79e0 t intel_sdvo_mode_valid +ffffffff81af7af0 t intel_sdvo_atomic_check +ffffffff81af7ba0 t intel_sdvo_create_enhance_property +ffffffff81af9000 T intel_snps_phy_wait_for_calibration +ffffffff81af90d0 T intel_snps_phy_update_psr_power_state +ffffffff81af9190 T intel_snps_phy_set_signal_levels +ffffffff81af93e0 T intel_mpllb_calc_state +ffffffff81af9570 T intel_snps_phy_check_hdmi_link_rate +ffffffff81af9610 T intel_mpllb_enable +ffffffff81af9850 T intel_mpllb_disable +ffffffff81af99c0 T intel_mpllb_calc_port_clock +ffffffff81af9a90 T intel_mpllb_readout_hw_state +ffffffff81af9c00 T intel_mpllb_state_verify +ffffffff81afb000 T vlv_plane_min_cdclk +ffffffff81afb0f0 T ivb_plane_min_cdclk +ffffffff81afb1b0 T hsw_plane_min_cdclk +ffffffff81afb250 T chv_plane_check_rotation +ffffffff81afb2c0 T intel_sprite_plane_create +ffffffff81afb610 t vlv_sprite_update_noarm +ffffffff81afb710 t vlv_sprite_update_arm +ffffffff81afbdb0 t vlv_sprite_disable_arm +ffffffff81afbe40 t vlv_sprite_get_hw_state +ffffffff81afbf10 t vlv_sprite_check +ffffffff81afbfe0 t ivb_sprite_update_noarm +ffffffff81afc150 t ivb_sprite_update_arm +ffffffff81afc520 t ivb_sprite_disable_arm +ffffffff81afc5d0 t ivb_sprite_get_hw_state +ffffffff81afc690 t g4x_sprite_check +ffffffff81afc930 t hsw_sprite_max_stride +ffffffff81afc980 t g4x_sprite_max_stride +ffffffff81afc9f0 t ivb_sprite_min_cdclk +ffffffff81afcb30 t g4x_sprite_update_noarm +ffffffff81afcc90 t g4x_sprite_update_arm +ffffffff81afd0d0 t g4x_sprite_disable_arm +ffffffff81afd180 t g4x_sprite_get_hw_state +ffffffff81afd240 t g4x_sprite_min_cdclk +ffffffff81afd310 t vlv_sprite_ctl +ffffffff81afd500 t vlv_sprite_format_mod_supported +ffffffff81afd630 t ivb_sprite_ctl +ffffffff81afd860 t g4x_sprite_ctl +ffffffff81afda20 t snb_sprite_format_mod_supported +ffffffff81afdb10 t g4x_sprite_format_mod_supported +ffffffff81afe000 T intel_sprite_set_colorkey_ioctl +ffffffff81aff000 T intel_tc_port_in_tbt_alt_mode +ffffffff81aff070 T intel_tc_port_in_dp_alt_mode +ffffffff81aff0e0 T intel_tc_port_in_legacy_mode +ffffffff81aff150 T intel_tc_cold_requires_aux_pw +ffffffff81aff1c0 T intel_tc_port_get_lane_mask +ffffffff81aff2f0 T intel_tc_port_get_pin_assignment_mask +ffffffff81aff420 T intel_tc_port_fia_max_lane_count +ffffffff81aff600 T intel_tc_port_set_fia_lane_count +ffffffff81aff7d0 T intel_tc_port_init_mode +ffffffff81affa10 t intel_tc_port_update_mode +ffffffff81affdc0 T intel_tc_port_sanitize_mode +ffffffff81b00100 T intel_tc_port_connected_locked +ffffffff81b00260 T intel_tc_port_ref_held +ffffffff81b002c0 T intel_tc_port_connected +ffffffff81b00330 T intel_tc_port_link_needs_reset +ffffffff81b003e0 T intel_tc_port_link_reset +ffffffff81b004e0 T intel_tc_port_link_cancel_reset_work +ffffffff81b00590 T intel_tc_port_lock +ffffffff81b005b0 t __intel_tc_port_lock +ffffffff81b006f0 T intel_tc_port_suspend +ffffffff81b00750 T intel_tc_port_unlock +ffffffff81b007d0 T intel_tc_port_get_link +ffffffff81b00860 T intel_tc_port_put_link +ffffffff81b00910 T intel_tc_port_init +ffffffff81b00b50 t kasprintf +ffffffff81b00c20 t intel_tc_port_disconnect_phy_work +ffffffff81b00c70 t intel_tc_port_link_reset_work +ffffffff81b00f70 T intel_tc_port_cleanup +ffffffff81b01030 t intel_tc_port_needs_reset +ffffffff81b01130 t tgl_tc_phy_cold_off_domain +ffffffff81b01160 t xelpdp_tc_phy_hpd_live_status +ffffffff81b01270 t adlp_tc_phy_is_ready +ffffffff81b01370 t xelpdp_tc_phy_is_owned +ffffffff81b01440 t xelpdp_tc_phy_get_hw_state +ffffffff81b015c0 t xelpdp_tc_phy_connect +ffffffff81b01810 t xelpdp_tc_phy_disconnect +ffffffff81b01950 t adlp_tc_phy_init +ffffffff81b019c0 t tc_phy_get_current_mode +ffffffff81b01ce0 t tc_phy_wait_for_ready +ffffffff81b01e50 t xelpdp_tc_phy_enable_tcss_power +ffffffff81b020a0 t tc_phy_verify_legacy_or_dp_alt_mode +ffffffff81b02280 t xelpdp_tc_phy_wait_for_tcss_power +ffffffff81b02490 t adlp_tc_phy_cold_off_domain +ffffffff81b024f0 t adlp_tc_phy_hpd_live_status +ffffffff81b025f0 t adlp_tc_phy_is_owned +ffffffff81b026b0 t adlp_tc_phy_get_hw_state +ffffffff81b02740 t adlp_tc_phy_connect +ffffffff81b02a30 t adlp_tc_phy_disconnect +ffffffff81b02b90 t icl_tc_phy_hpd_live_status +ffffffff81b02cf0 t icl_tc_phy_is_ready +ffffffff81b02e00 t icl_tc_phy_is_owned +ffffffff81b02f10 t icl_tc_phy_get_hw_state +ffffffff81b02fa0 t icl_tc_phy_connect +ffffffff81b03110 t icl_tc_phy_disconnect +ffffffff81b03190 t tgl_tc_phy_init +ffffffff81b032c0 t icl_tc_phy_take_ownership +ffffffff81b03430 t icl_tc_phy_cold_off_domain +ffffffff81b03490 t icl_tc_phy_init +ffffffff81b034f0 t __delayed_work_tick +ffffffff81b04000 T intel_tv_init +ffffffff81b043f0 t intel_tv_compute_config +ffffffff81b048a0 t intel_tv_get_config +ffffffff81b04d60 t intel_tv_pre_enable +ffffffff81b05680 t intel_enable_tv +ffffffff81b056e0 t intel_disable_tv +ffffffff81b05740 t intel_tv_get_hw_state +ffffffff81b057a0 t intel_tv_connector_duplicate_state +ffffffff81b05820 t intel_tv_mode_to_mode +ffffffff81b05970 t intel_tv_get_modes +ffffffff81b05cb0 t intel_tv_detect +ffffffff81b06140 t intel_tv_mode_valid +ffffffff81b061f0 t intel_tv_atomic_check +ffffffff81b07000 T i915_get_vblank_counter +ffffffff81b071e0 T g4x_get_vblank_counter +ffffffff81b07270 T intel_crtc_get_vblank_timestamp +ffffffff81b07290 t i915_get_crtc_scanoutpos +ffffffff81b07690 T intel_get_crtc_scanline +ffffffff81b07700 t __intel_get_crtc_scanline +ffffffff81b07950 T intel_wait_for_pipe_scanline_stopped +ffffffff81b07960 t wait_for_pipe_scanline_moving +ffffffff81b07bc0 T intel_wait_for_pipe_scanline_moving +ffffffff81b07be0 T intel_crtc_update_active_timings +ffffffff81b08000 T intel_dsc_source_support +ffffffff81b08050 T intel_dsc_compute_params +ffffffff81b08650 T intel_dsc_power_domain +ffffffff81b08700 T intel_dsc_get_num_vdsc_instances +ffffffff81b08750 T intel_dsc_dsi_pps_write +ffffffff81b089f0 T intel_dsc_dp_pps_write +ffffffff81b08ae0 T intel_uncompressed_joiner_enable +ffffffff81b08c00 T intel_dsc_enable +ffffffff81b0a600 T intel_dsc_disable +ffffffff81b0a780 T intel_dsc_get_config +ffffffff81b0b000 T intel_vga_disable +ffffffff81b0b120 T intel_vga_redisable_power_on +ffffffff81b0b1c0 T intel_vga_redisable +ffffffff81b0b280 T intel_vga_reset_io_mem +ffffffff81b0b2e0 T intel_vga_register +ffffffff81b0b310 T intel_vga_unregister +ffffffff81b0c000 T intel_vrr_is_capable +ffffffff81b0c080 T intel_vrr_check_modeset +ffffffff81b0c110 T intel_vrr_vmin_vblank_start +ffffffff81b0c170 T intel_vrr_vmax_vblank_start +ffffffff81b0c1d0 T intel_vrr_compute_config +ffffffff81b0c360 T intel_vrr_set_transcoder_timings +ffffffff81b0c540 T intel_vrr_send_push +ffffffff81b0c5c0 T intel_vrr_is_push_sent +ffffffff81b0c650 T intel_vrr_enable +ffffffff81b0c770 T intel_vrr_disable +ffffffff81b0c8b0 T intel_vrr_get_config +ffffffff81b0d000 T intel_update_watermarks +ffffffff81b0d040 T intel_compute_pipe_wm +ffffffff81b0d090 T intel_compute_intermediate_wm +ffffffff81b0d120 T intel_initial_watermarks +ffffffff81b0d170 T intel_atomic_update_watermarks +ffffffff81b0d1b0 T intel_optimize_watermarks +ffffffff81b0d1f0 T intel_compute_global_watermarks +ffffffff81b0d240 T intel_wm_get_hw_state +ffffffff81b0d280 T intel_wm_plane_visible +ffffffff81b0d2e0 T intel_print_wm_latency +ffffffff81b0d3f0 T intel_wm_init +ffffffff81b0d410 T intel_wm_debugfs_register +ffffffff81b0e000 T skl_update_scaler_crtc +ffffffff81b0e0b0 t skl_update_scaler +ffffffff81b0e3f0 T skl_update_scaler_plane +ffffffff81b0e7f0 T intel_atomic_setup_scalers +ffffffff81b0ed50 T skl_pfit_enable +ffffffff81b0f240 T skl_program_plane_scaler +ffffffff81b0f930 T skl_detach_scalers +ffffffff81b0fa90 T skl_scaler_disable +ffffffff81b0fbc0 T skl_scaler_get_config +ffffffff81b10000 T skl_format_to_fourcc +ffffffff81b10180 T icl_is_nv12_y_plane +ffffffff81b101f0 T icl_hdr_plane_mask +ffffffff81b10220 T icl_is_hdr_plane +ffffffff81b10260 T skl_calc_main_surface_offset +ffffffff81b104a0 T skl_universal_plane_create +ffffffff81b10c80 t icl_plane_min_width +ffffffff81b10e10 t icl_hdr_plane_max_width +ffffffff81b10e60 t icl_sdr_plane_max_width +ffffffff81b10e90 t icl_plane_max_height +ffffffff81b10ec0 t icl_plane_min_cdclk +ffffffff81b10f00 t glk_plane_max_width +ffffffff81b10fb0 t skl_plane_max_height +ffffffff81b10fe0 t glk_plane_min_cdclk +ffffffff81b11050 t skl_plane_max_width +ffffffff81b11120 t skl_plane_min_cdclk +ffffffff81b11190 t skl_plane_max_stride +ffffffff81b11230 t icl_plane_update_noarm +ffffffff81b11ae0 t icl_plane_update_arm +ffffffff81b11c80 t icl_plane_disable_arm +ffffffff81b11d90 t skl_plane_update_noarm +ffffffff81b11f30 t skl_plane_update_arm +ffffffff81b12250 t skl_plane_disable_arm +ffffffff81b12300 t skl_plane_get_hw_state +ffffffff81b123d0 t skl_plane_check +ffffffff81b13000 t skl_plane_async_flip +ffffffff81b13130 t skl_plane_enable_flip_done +ffffffff81b13190 t skl_plane_disable_flip_done +ffffffff81b131f0 T skl_get_initial_plane_config +ffffffff81b139b0 t skl_plane_aux_dist +ffffffff81b13aa0 t skl_surf_address +ffffffff81b13bc0 t skl_plane_check_nv12_rotation +ffffffff81b13c60 t pxp_is_borked +ffffffff81b13cc0 t skl_plane_ctl +ffffffff81b143a0 t glk_plane_color_ctl +ffffffff81b144f0 t skl_check_main_ccs_coordinates +ffffffff81b14680 t gen12_plane_format_mod_supported +ffffffff81b148d0 t skl_plane_format_mod_supported +ffffffff81b15000 T intel_enabled_dbuf_slices_mask +ffffffff81b15120 T intel_sagv_pre_plane_update +ffffffff81b152b0 T intel_sagv_post_plane_update +ffffffff81b15520 T intel_can_enable_sagv +ffffffff81b15590 T skl_ddb_dbuf_slice_mask +ffffffff81b15640 T skl_write_plane_wm +ffffffff81b15ac0 T skl_write_cursor_wm +ffffffff81b15ea0 T skl_ddb_allocation_overlaps +ffffffff81b15f40 T intel_wm_state_verify +ffffffff81b16940 t skl_pipe_wm_get_hw_state +ffffffff81b16c90 T skl_watermark_ipc_enabled +ffffffff81b16cc0 T skl_watermark_ipc_update +ffffffff81b16d70 T skl_watermark_ipc_init +ffffffff81b16e40 T skl_wm_init +ffffffff81b17680 T intel_atomic_get_dbuf_state +ffffffff81b176a0 T intel_dbuf_init +ffffffff81b17710 T intel_dbuf_pre_plane_update +ffffffff81b179e0 T intel_dbuf_post_plane_update +ffffffff81b17ab0 T intel_mbus_dbox_update +ffffffff81b17d20 T skl_watermark_debugfs_register +ffffffff81b17d50 t skl_sagv_disable +ffffffff81b17e70 t skl_compute_wm +ffffffff81b1b160 t skl_wm_get_hw_state_and_sanitize +ffffffff81b1b950 t skl_build_plane_wm_single +ffffffff81b1bce0 t skl_compute_wm_params +ffffffff81b1c0b0 t skl_compute_plane_wm +ffffffff81b1c4e0 t skl_compute_dbuf_slices +ffffffff81b1c9e0 t skl_ddb_entry_for_slices +ffffffff81b1cb20 t intel_dbuf_duplicate_state +ffffffff81b1cbb0 t intel_dbuf_destroy_state +ffffffff81b1d000 T pixel_format_from_register_bits +ffffffff81b1d060 T vlv_dsi_wait_for_fifo_empty +ffffffff81b1d120 T vlv_dsi_init +ffffffff81b1d930 t intel_dsi_compute_config +ffffffff81b1da80 t intel_dsi_pre_enable +ffffffff81b1f540 t bxt_dsi_enable +ffffffff81b1f560 t intel_dsi_disable +ffffffff81b1f810 t intel_dsi_post_disable +ffffffff81b204b0 t intel_dsi_get_hw_state +ffffffff81b20780 t intel_dsi_get_config +ffffffff81b20f20 t intel_dsi_encoder_destroy +ffffffff81b20f50 t intel_dsi_prepare +ffffffff81b21c30 t dpi_send_cmd +ffffffff81b21dc0 t intel_dsi_host_attach +ffffffff81b21df0 t intel_dsi_host_detach +ffffffff81b21e20 t intel_dsi_host_transfer +ffffffff81b22280 t vlv_dsi_mode_valid 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engines_notify +ffffffff81b2a430 t intel_context_unpin +ffffffff81b2a4c0 t kill_engines +ffffffff81b2a650 t create_setparam +ffffffff81b2a6c0 t invalid_ext +ffffffff81b2a6f0 t lookup_user_engine +ffffffff81b2a7b0 t set_proto_ctx_engines_balance +ffffffff81b2aa90 t set_proto_ctx_engines_bond +ffffffff81b2ae10 t set_proto_ctx_engines_parallel_submit +ffffffff81b2c000 T __i915_gem_object_create_user +ffffffff81b2c020 t __i915_gem_object_create_user_ext +ffffffff81b2c4b0 T i915_gem_dumb_create +ffffffff81b2c620 T i915_gem_create_ioctl +ffffffff81b2c6f0 T i915_gem_create_ext_ioctl +ffffffff81b2c8f0 t ext_set_placements +ffffffff81b2cd00 t ext_set_protected +ffffffff81b2cd80 t ext_set_pat +ffffffff81b2d000 T i915_gem_prime_export +ffffffff81b2d090 T i915_gem_prime_import +ffffffff81b2e000 T i915_gem_cpu_write_needs_clflush +ffffffff81b2e070 T i915_gem_object_flush_if_display +ffffffff81b2e280 t i915_gem_object_unlock +ffffffff81b2e340 T i915_gem_object_flush_if_display_locked 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i915_gem_object_create_lmem_from_data +ffffffff81b371f0 T i915_gem_object_create_lmem +ffffffff81b38000 T i915_gem_mmap_ioctl +ffffffff81b381f0 T i915_gem_mmap_gtt_version +ffffffff81b38220 T remap_io_mapping +ffffffff81b382e0 T i915_gem_fault +ffffffff81b38f20 T __i915_gem_object_release_mmap_gtt +ffffffff81b38fa0 T i915_gem_object_release_mmap_gtt +ffffffff81b39050 T i915_gem_object_runtime_pm_release_mmap_offset +ffffffff81b390b0 T i915_gem_object_release_mmap_offset +ffffffff81b391b0 T i915_gem_dumb_mmap_offset +ffffffff81b391e0 t __assign_mmap_offset_handle +ffffffff81b396f0 T i915_gem_mmap_offset_ioctl +ffffffff81b397e0 T i915_gem_mmap +ffffffff81b3a000 T i915_gem_get_pat_index +ffffffff81b3a080 T i915_gem_object_has_cache_level +ffffffff81b3a120 T i915_gem_object_alloc +ffffffff81b3a170 T i915_gem_object_free +ffffffff81b3a190 T i915_gem_object_init +ffffffff81b3a2b0 T __i915_gem_object_fini +ffffffff81b3a2d0 T i915_gem_object_set_cache_coherency +ffffffff81b3a3f0 T i915_gem_object_set_pat_index +ffffffff81b3a4a0 T i915_gem_object_can_bypass_llc +ffffffff81b3a500 T __i915_gem_free_object_rcu +ffffffff81b3a570 T __i915_gem_object_pages_fini +ffffffff81b3a8d0 T __i915_gem_free_object +ffffffff81b3a980 T i915_gem_flush_free_objects +ffffffff81b3a9d0 t __i915_gem_free_objects +ffffffff81b3aac0 T __i915_gem_object_flush_frontbuffer +ffffffff81b3ab70 T __i915_gem_object_invalidate_frontbuffer +ffffffff81b3ac20 T i915_gem_object_read_from_page +ffffffff81b3ad70 T i915_gem_object_has_struct_page +ffffffff81b3ada0 T i915_gem_object_has_iomem +ffffffff81b3ade0 T i915_gem_object_evictable +ffffffff81b3ae90 T i915_gem_object_migratable +ffffffff81b3aed0 T i915_gem_object_can_migrate +ffffffff81b3b040 T i915_gem_object_migrate +ffffffff81b3b0e0 T __i915_gem_object_migrate +ffffffff81b3b180 T i915_gem_object_placement_possible +ffffffff81b3b210 T i915_gem_object_needs_ccs_pages +ffffffff81b3b2b0 T i915_gem_init__objects +ffffffff81b3b2e0 t __i915_gem_free_work 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__i915_gem_object_get_page +ffffffff81b3d2f0 T __i915_gem_object_get_dirty_page +ffffffff81b3d360 T __i915_gem_object_get_dma_address_len +ffffffff81b3d3e0 T __i915_gem_object_get_dma_address +ffffffff81b3e000 T i915_gem_object_put_pages_phys +ffffffff81b3e1c0 T i915_gem_object_pwrite_phys +ffffffff81b3e2c0 T i915_gem_object_pread_phys +ffffffff81b3e370 T i915_gem_object_attach_phys +ffffffff81b3e440 t i915_gem_object_shmem_to_phys +ffffffff81b3f000 T i915_gem_suspend +ffffffff81b3f060 T i915_gem_backup_suspend +ffffffff81b3f1e0 t lmem_suspend +ffffffff81b3f300 T i915_gem_suspend_late +ffffffff81b3f440 T i915_gem_freeze +ffffffff81b3f480 T i915_gem_freeze_late +ffffffff81b3f550 T i915_gem_resume +ffffffff81b3f6b0 t lmem_restore +ffffffff81b40000 T i915_gem_object_init_memory_region +ffffffff81b40080 T i915_gem_object_release_memory_region +ffffffff81b400e0 T i915_gem_object_create_region +ffffffff81b40100 t __i915_gem_object_create_region +ffffffff81b40270 T i915_gem_object_create_region_at +ffffffff81b40310 T i915_gem_process_region +ffffffff81b41000 T shmem_sg_free_table +ffffffff81b41100 T shmem_sg_alloc_table +ffffffff81b41250 T __shmem_writeback +ffffffff81b41270 T __i915_gem_object_release_shmem +ffffffff81b41330 T i915_gem_object_put_pages_shmem +ffffffff81b41440 t shmem_get_pages +ffffffff81b415a0 t shmem_put_pages +ffffffff81b415e0 t shmem_truncate +ffffffff81b41680 t shmem_shrink +ffffffff81b416f0 t shmem_pread +ffffffff81b41760 t shmem_pwrite +ffffffff81b41ab0 t shmem_release +ffffffff81b41b00 T i915_gem_object_create_shmem +ffffffff81b41b20 T i915_gem_object_create_shmem_from_data +ffffffff81b41c70 T i915_gem_shmem_setup +ffffffff81b41cd0 T i915_gem_object_is_shmem +ffffffff81b41d10 t init_shmem +ffffffff81b41d60 t release_shmem +ffffffff81b41da0 t shmem_object_init +ffffffff81b42000 T i915_gem_shrink +ffffffff81b42710 T i915_gem_shrink_all +ffffffff81b42790 T i915_gem_driver_register__shrinker +ffffffff81b42840 t i915_gem_shrinker_scan +ffffffff81b428b0 t i915_gem_shrinker_count +ffffffff81b42930 T i915_gem_driver_unregister__shrinker +ffffffff81b42950 T i915_gem_shrinker_taints_mutex +ffffffff81b42980 T i915_gem_object_make_unshrinkable +ffffffff81b42a80 T __i915_gem_object_make_shrinkable +ffffffff81b42b70 T __i915_gem_object_make_purgeable +ffffffff81b42c60 T i915_gem_object_make_shrinkable +ffffffff81b42d50 T i915_gem_object_make_purgeable +ffffffff81b43000 T i915_gem_stolen_insert_node_in_range +ffffffff81b430d0 T i915_gem_stolen_insert_node +ffffffff81b43180 T i915_gem_stolen_remove_node +ffffffff81b431c0 T i915_gem_object_create_stolen +ffffffff81b431e0 T i915_gem_stolen_lmem_setup +ffffffff81b43500 T i915_gem_stolen_smem_setup +ffffffff81b435a0 T i915_gem_object_is_stolen +ffffffff81b435e0 T i915_gem_stolen_initialized +ffffffff81b43620 T i915_gem_stolen_area_address +ffffffff81b43650 T i915_gem_stolen_area_size +ffffffff81b43690 T i915_gem_stolen_node_address +ffffffff81b436d0 T i915_gem_stolen_node_offset +ffffffff81b43700 T i915_gem_stolen_node_allocated +ffffffff81b43730 T i915_gem_stolen_node_size +ffffffff81b43760 t init_stolen_lmem +ffffffff81b438f0 t release_stolen_lmem +ffffffff81b43960 t _i915_gem_object_stolen_init +ffffffff81b43d70 t i915_gem_init_stolen +ffffffff81b445c0 t init_stolen_smem +ffffffff81b44620 t release_stolen_smem +ffffffff81b44670 t i915_gem_object_get_pages_stolen +ffffffff81b44760 t i915_gem_object_put_pages_stolen +ffffffff81b44790 t i915_gem_object_release_stolen +ffffffff81b45000 T i915_gem_throttle_ioctl +ffffffff81b46000 T i915_gem_fence_size +ffffffff81b46080 T i915_gem_fence_alignment +ffffffff81b460e0 T i915_gem_object_needs_bit17_swizzle +ffffffff81b46130 T i915_gem_object_set_tiling +ffffffff81b46830 T i915_gem_set_tiling_ioctl +ffffffff81b46aa0 T i915_gem_get_tiling_ioctl +ffffffff81b47000 T i915_ttm_sys_placement +ffffffff81b47030 T i915_ttm_free_cached_io_rsgt +ffffffff81b47110 T i915_ttm_purge +ffffffff81b47260 T i915_ttm_resource_get_st +ffffffff81b47320 T i915_ttm_resource_mappable +ffffffff81b47370 T i915_ttm_driver +ffffffff81b473a0 T i915_ttm_adjust_lru +ffffffff81b47530 t ttm_vm_reference +ffffffff81b47560 t ttm_vm_detach +ffffffff81b475a0 t vm_fault_ttm +ffffffff81b47ae0 T i915_ttm_bo_destroy +ffffffff81b47b50 T __i915_gem_ttm_object_init +ffffffff81b47dd0 T i915_gem_ttm_system_setup +ffffffff81b47e50 t i915_ttm_tt_create +ffffffff81b47fd0 t i915_ttm_tt_populate +ffffffff81b48050 t i915_ttm_tt_unpopulate +ffffffff81b48070 t i915_ttm_tt_destroy +ffffffff81b480f0 t i915_ttm_eviction_valuable +ffffffff81b48180 t i915_ttm_evict_flags +ffffffff81b481e0 t i915_ttm_delete_mem_notify +ffffffff81b48260 t i915_ttm_swap_notify +ffffffff81b482d0 t i915_ttm_io_mem_reserve +ffffffff81b483a0 t i915_ttm_io_mem_pfn +ffffffff81b48410 t i915_ttm_access_memory +ffffffff81b48460 t i915_ttm_tt_release +ffffffff81b48480 t dma_resv_unlock +ffffffff81b48520 t i915_ttm_place_from_region +ffffffff81b48690 t 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i915_ttm_backup +ffffffff81b4b430 T i915_ttm_restore_region +ffffffff81b4b490 t i915_ttm_restore +ffffffff81b4b5e0 t i915_gem_object_lock +ffffffff81b4c000 T i915_gem_userptr_ioctl +ffffffff81b4c110 T i915_gem_init_userptr +ffffffff81b4c140 T i915_gem_cleanup_userptr +ffffffff81b4d000 T i915_gem_fence_wait_priority +ffffffff81b4d1b0 T i915_gem_object_wait_priority +ffffffff81b4d250 T i915_gem_object_wait +ffffffff81b4d410 T i915_gem_wait_ioctl +ffffffff81b4d660 T i915_gem_object_wait_migration +ffffffff81b4e000 T i915_gemfs_init +ffffffff81b4e030 T i915_gemfs_fini +ffffffff81b4f000 T inteldrm_gmch_match +ffffffff81b4f060 T i915_alloc_ifp +ffffffff81b4f180 T i965_alloc_ifp +ffffffff81b4f2e0 T intel_gtt_chipset_setup +ffffffff81b4f430 T intel_gmch_enable_gtt +ffffffff81b4f480 T intel_gmch_probe +ffffffff81b4f4b0 T intel_gmch_gtt_get +ffffffff81b4f500 T intel_gmch_gtt_flush +ffffffff81b4f600 T intel_gmch_remove +ffffffff81b4f630 T intel_gmch_gtt_insert_sg_entries +ffffffff81b4f7d0 T intel_gmch_gtt_insert_page +ffffffff81b4f900 T intel_gmch_gtt_clear_range +ffffffff81b50000 T gen2_emit_flush +ffffffff81b500f0 T gen4_emit_flush_rcs +ffffffff81b50240 T gen4_emit_flush_vcs +ffffffff81b50290 T gen3_emit_breadcrumb +ffffffff81b50450 T gen5_emit_breadcrumb +ffffffff81b50590 T i830_emit_bb_start +ffffffff81b506c0 T gen3_emit_bb_start +ffffffff81b50730 T gen4_emit_bb_start +ffffffff81b507a0 T gen2_irq_enable +ffffffff81b50810 T gen2_irq_disable +ffffffff81b50860 T gen3_irq_enable +ffffffff81b508d0 T gen3_irq_disable +ffffffff81b50910 T gen5_irq_enable +ffffffff81b50930 T gen5_irq_disable +ffffffff81b51000 T gen6_emit_flush_rcs +ffffffff81b51130 T gen6_emit_breadcrumb_rcs +ffffffff81b51200 T gen6_emit_flush_xcs +ffffffff81b51270 T gen6_emit_flush_vcs +ffffffff81b512e0 T gen6_emit_bb_start +ffffffff81b51350 T hsw_emit_bb_start +ffffffff81b513c0 T gen7_emit_flush_rcs +ffffffff81b514a0 T gen7_emit_breadcrumb_rcs +ffffffff81b51530 T gen6_emit_breadcrumb_xcs +ffffffff81b515a0 T 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intel_sseu_copy_eumask_to_user +ffffffff81ba05c0 T intel_sseu_copy_ssmask_to_user +ffffffff81ba0740 T intel_sseu_info_init +ffffffff81ba16e0 t cherryview_sseu_info_init +ffffffff81ba1900 t hsw_sseu_info_init +ffffffff81ba1bd0 T intel_sseu_make_rpcs +ffffffff81ba1da0 T intel_sseu_dump +ffffffff81ba1fa0 T intel_sseu_print_topology +ffffffff81ba2260 T intel_sseu_print_ss_info +ffffffff81ba22c0 T intel_slicemask_from_xehp_dssmask +ffffffff81ba2310 t xehp_load_dss_mask +ffffffff81ba2440 t gen11_compute_sseu_info +ffffffff81ba3000 T intel_sseu_status +ffffffff81ba3840 T intel_sseu_debugfs_register +ffffffff81ba4000 T intel_gt_init_timelines +ffffffff81ba4060 T __intel_timeline_create +ffffffff81ba4220 T intel_timeline_create_from_engine +ffffffff81ba42e0 T __intel_timeline_pin +ffffffff81ba4310 T intel_timeline_pin +ffffffff81ba4440 T intel_timeline_reset_seqno +ffffffff81ba4470 T intel_timeline_enter +ffffffff81ba4550 T intel_timeline_exit +ffffffff81ba4620 T intel_timeline_get_seqno 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i915_gem_object_lock +ffffffff81bb4000 T intel_guc_notify +ffffffff81bb4040 T intel_guc_init_send_regs +ffffffff81bb40e0 T intel_guc_init_early +ffffffff81bb4230 t gen11_reset_guc_interrupts +ffffffff81bb4280 t gen11_enable_guc_interrupts +ffffffff81bb4300 t gen11_disable_guc_interrupts +ffffffff81bb4370 t gen9_reset_guc_interrupts +ffffffff81bb4440 t gen9_enable_guc_interrupts +ffffffff81bb45b0 t gen9_disable_guc_interrupts +ffffffff81bb46a0 T intel_guc_init_late +ffffffff81bb46b0 T intel_guc_write_params +ffffffff81bb48d0 T intel_guc_dump_time_info +ffffffff81bb4a10 T intel_guc_init +ffffffff81bb4ba0 t guc_init_params +ffffffff81bb50e0 T intel_guc_fini +ffffffff81bb5190 T intel_guc_send_mmio +ffffffff81bb5670 T intel_guc_to_host_process_recv_msg +ffffffff81bb5760 T intel_guc_auth_huc +ffffffff81bb57c0 T intel_guc_suspend +ffffffff81bb58b0 T intel_guc_resume +ffffffff81bb58e0 T intel_guc_allocate_vma +ffffffff81bb5a00 T intel_guc_allocate_and_map_vma +ffffffff81bb5ab0 T intel_guc_self_cfg32 +ffffffff81bb5bb0 T intel_guc_self_cfg64 +ffffffff81bb5cb0 T intel_guc_load_status +ffffffff81bb5e40 T intel_guc_write_barrier +ffffffff81bb6000 T intel_guc_ads_print_policy_info +ffffffff81bb6100 T intel_guc_global_policies_update +ffffffff81bb62e0 T intel_guc_ads_create +ffffffff81bb6830 t guc_prep_golden_context +ffffffff81bb6a40 t guc_capture_prep_lists +ffffffff81bb7110 t __guc_ads_init +ffffffff81bb7640 T intel_guc_ads_init_late +ffffffff81bb7840 T intel_guc_ads_destroy +ffffffff81bb78a0 T intel_guc_ads_reset +ffffffff81bb7950 T intel_guc_engine_usage_offset +ffffffff81bb7990 T intel_guc_engine_usage_record_map +ffffffff81bb7a30 t guc_mmio_reg_add +ffffffff81bb8000 T intel_guc_capture_getlistsize +ffffffff81bb8020 t guc_capture_getlistsize +ffffffff81bb8250 T intel_guc_capture_getlist +ffffffff81bb9100 t guc_cap_list_num_regs +ffffffff81bb9210 T intel_guc_capture_getnullheader +ffffffff81bb92d0 T intel_guc_capture_print_engine_node +ffffffff81bb97e0 T intel_guc_capture_free_node +ffffffff81bb9860 T intel_guc_capture_is_matching_engine +ffffffff81bb9910 T intel_guc_capture_get_matching_node +ffffffff81bb9aa0 T intel_guc_capture_process +ffffffff81bbaa80 T intel_guc_capture_destroy +ffffffff81bbade0 T intel_guc_capture_init +ffffffff81bbb630 t guc_capture_log_get_register +ffffffff81bbb730 t guc_capture_log_remove_dw +ffffffff81bbc000 T intel_guc_ct_init_early +ffffffff81bbc120 t ct_incoming_request_worker_func +ffffffff81bbc4f0 t ct_receive_tasklet_func +ffffffff81bbc510 T intel_guc_ct_init +ffffffff81bbc6c0 T intel_guc_ct_fini +ffffffff81bbc720 T intel_guc_ct_enable +ffffffff81bbcaa0 T intel_guc_ct_disable +ffffffff81bbcb70 T intel_guc_ct_send +ffffffff81bbd4c0 T intel_guc_ct_event_handler +ffffffff81bbd4f0 t ct_try_receive_message +ffffffff81bbdd40 T intel_guc_ct_print_info +ffffffff81bbde50 t ct_write +ffffffff81bbe010 t ktime_get +ffffffff81bbe090 t ct_deadlocked +ffffffff81bbf000 T intel_guc_debugfs_register +ffffffff81bc0000 T intel_guc_fw_upload +ffffffff81bc1000 T intel_gt_init_hwconfig +ffffffff81bc11e0 T intel_gt_fini_hwconfig +ffffffff81bc2000 T intel_guc_log_section_size_capture +ffffffff81bc2040 t guc_log_init_sizes +ffffffff81bc2280 T intel_guc_check_log_buf_overflow +ffffffff81bc2330 T intel_guc_get_log_buffer_size +ffffffff81bc23c0 T intel_guc_get_log_buffer_offset +ffffffff81bc24b0 T intel_guc_log_init_early +ffffffff81bc2520 t copy_debug_logs_work +ffffffff81bc2540 T intel_guc_log_create +ffffffff81bc2770 T intel_guc_log_destroy +ffffffff81bc27a0 T intel_guc_log_set_level +ffffffff81bc28e0 T intel_guc_log_relay_created +ffffffff81bc2910 T intel_guc_log_relay_open +ffffffff81bc29b0 T intel_guc_log_relay_start +ffffffff81bc2a10 T intel_guc_log_relay_flush +ffffffff81bc2ab0 t guc_log_copy_debuglogs_for_relay +ffffffff81bc2c00 T intel_guc_log_relay_close +ffffffff81bc2c90 T intel_guc_log_handle_flush_event +ffffffff81bc2ce0 T intel_guc_log_info +ffffffff81bc2dd0 T intel_guc_log_dump +ffffffff81bc4000 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intel_guc_slpc_print_info +ffffffff81bc75f0 T intel_guc_slpc_fini +ffffffff81bc8000 T intel_guc_wait_for_pending_msg +ffffffff81bc8160 T intel_guc_wait_for_idle +ffffffff81bc81b0 T intel_guc_busyness_park +ffffffff81bc82c0 T intel_guc_busyness_unpark +ffffffff81bc8370 t guc_update_pm_timestamp +ffffffff81bc8520 T intel_guc_submission_reset_prepare +ffffffff81bc8bf0 t guc_flush_destroyed_contexts +ffffffff81bc8d50 T intel_guc_submission_reset +ffffffff81bc8e60 t __guc_reset_context +ffffffff81bc9160 T intel_guc_submission_cancel_requests +ffffffff81bc9400 T intel_guc_submission_reset_finish +ffffffff81bc94e0 T intel_guc_submission_init +ffffffff81bc9660 T intel_guc_submission_fini +ffffffff81bc9700 T intel_guc_submission_setup +ffffffff81bc9b70 t guc_sched_engine_disabled +ffffffff81bc9ba0 t guc_sched_engine_destroy +ffffffff81bc9c00 t guc_bump_inflight_request_prio +ffffffff81bc9cf0 t guc_retire_inflight_request_prio +ffffffff81bc9d70 t guc_submission_tasklet +ffffffff81bca140 t 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intel_uc_fw_init +ffffffff81bd95c0 t uc_fw_bind_ggtt +ffffffff81bd96e0 T intel_uc_fw_fini +ffffffff81bd9790 T intel_uc_fw_resume_mapping +ffffffff81bd97d0 T intel_uc_fw_cleanup_fetch +ffffffff81bd9840 T intel_uc_fw_copy_rsa +ffffffff81bd9b50 T intel_uc_fw_dump +ffffffff81bd9cc0 t __check_ccs_header +ffffffff81bda000 T __i915_active_init +ffffffff81bda0a0 t excl_retire +ffffffff81bda130 t active_work +ffffffff81bda190 T i915_active_add_request +ffffffff81bda310 T i915_active_acquire +ffffffff81bda3f0 t active_instance +ffffffff81bda560 T __i915_active_fence_set +ffffffff81bda660 T i915_active_release +ffffffff81bda6e0 T i915_active_set_exclusive +ffffffff81bda7b0 T i915_active_acquire_if_busy +ffffffff81bda800 T i915_active_acquire_for_context +ffffffff81bda860 T __i915_active_wait +ffffffff81bdaa90 t flush_lazy_signals +ffffffff81bdabc0 T i915_request_await_active +ffffffff81bdabf0 t await_active +ffffffff81bdaea0 t rq_await_fence +ffffffff81bdaeb0 T i915_sw_fence_await_active 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intel_engine_cmd_parser +ffffffff81bdd580 T i915_cmd_parser_get_version +ffffffff81bde000 T i915_fence_context_timeout +ffffffff81bdf000 T i915_deps_init +ffffffff81bdf060 T i915_deps_fini +ffffffff81bdf0f0 T i915_deps_sync +ffffffff81bdf1a0 T i915_deps_add_dependency +ffffffff81bdf3f0 T i915_deps_add_resv +ffffffff81be0000 T i915_print_iommu_status +ffffffff81be0050 T i915_driver_probe +ffffffff81be0910 t i915_driver_register +ffffffff81be0a00 T inteldrm_init_backlight +ffffffff81be0a70 t i915_welcome_messages +ffffffff81be0bf0 T i915_driver_remove +ffffffff81be0cd0 T i915_driver_shutdown +ffffffff81be0e70 T i915_driver_resume_switcheroo +ffffffff81be0ed0 t i915_drm_resume_early +ffffffff81be0fc0 t i915_drm_resume +ffffffff81be1200 T intagpsubmatch +ffffffff81be1250 T intagp_print +ffffffff81be12a0 T inteldrm_wsioctl +ffffffff81be1480 T inteldrm_wsmmap +ffffffff81be14b0 T inteldrm_alloc_screen +ffffffff81be14e0 T inteldrm_free_screen +ffffffff81be1500 T inteldrm_show_screen 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t i915_mock_selftests +ffffffff81bf42b0 t i915_pmu_init +ffffffff81bf42e0 t i915_pmu_exit +ffffffff81bf5000 T i915_params_dump +ffffffff81bf5670 T i915_params_copy +ffffffff81bf5870 T i915_params_free +ffffffff81bf6000 T i915_pci_register_driver +ffffffff81bf6030 T i915_pci_unregister_driver +ffffffff81bf7000 T i915_oa_config_release +ffffffff81bf7060 T i915_perf_get_oa_config +ffffffff81bf70c0 T i915_perf_oa_timestamp_frequency +ffffffff81bf71a0 T i915_oa_init_reg_state +ffffffff81bf7290 T i915_perf_open_ioctl +ffffffff81bf7ae0 T i915_perf_register +ffffffff81bf7b10 T i915_perf_unregister +ffffffff81bf7b80 T i915_perf_add_config_ioctl +ffffffff81bf7bd0 T i915_perf_remove_config_ioctl +ffffffff81bf7c40 T i915_perf_init +ffffffff81bf8320 t gen7_is_valid_b_counter_addr +ffffffff81bf8370 t hsw_is_valid_mux_addr +ffffffff81bf83f0 t hsw_enable_metric_set +ffffffff81bf84b0 t hsw_disable_metric_set +ffffffff81bf8580 t gen7_oa_enable +ffffffff81bf86f0 t gen7_oa_disable +ffffffff81bf87b0 t gen7_oa_read +ffffffff81bf8c20 t gen7_oa_hw_tail_read +ffffffff81bf8c70 t gen8_oa_read +ffffffff81bf92a0 t gen8_is_valid_mux_addr +ffffffff81bf9320 t gen8_is_valid_flex_addr +ffffffff81bf93a0 t chv_is_valid_mux_addr +ffffffff81bf9420 t gen8_oa_enable +ffffffff81bf9560 t gen8_oa_disable +ffffffff81bf9620 t gen8_enable_metric_set +ffffffff81bf96e0 t gen8_disable_metric_set +ffffffff81bf9740 t gen8_oa_hw_tail_read +ffffffff81bf9790 t gen11_is_valid_mux_addr +ffffffff81bf9850 t gen11_disable_metric_set +ffffffff81bf98b0 t xehp_is_valid_b_counter_addr +ffffffff81bf9980 t gen12_is_valid_b_counter_addr +ffffffff81bf99d0 t gen12_is_valid_mux_addr +ffffffff81bf9a70 t gen12_oa_enable +ffffffff81bf9c10 t gen12_oa_disable +ffffffff81bf9d70 t gen12_enable_metric_set +ffffffff81bf9f60 t gen12_disable_metric_set +ffffffff81bfa0b0 t gen12_oa_hw_tail_read +ffffffff81bfa110 T i915_perf_sysctl_register +ffffffff81bfa140 T i915_perf_sysctl_unregister +ffffffff81bfa170 T i915_perf_fini +ffffffff81bfa290 t destroy_config +ffffffff81bfa320 T i915_perf_ioctl_version +ffffffff81bfa420 t get_sseu_config +ffffffff81bfa470 t emit_oa_config +ffffffff81bfab40 t i915_gem_object_lock +ffffffff81bfad60 t append_oa_status +ffffffff81bfade0 t append_oa_sample +ffffffff81bfaf40 t lrc_configure_all_contexts +ffffffff81bfb0f0 t oa_configure_all_contexts +ffffffff81bfb410 t gen8_modify_self +ffffffff81bfb5e0 t gen8_modify_context +ffffffff81bfb790 t gen12_configure_oar_context +ffffffff81bfc000 T i915_query_ioctl +ffffffff81bfc100 t query_topology_info +ffffffff81bfc150 t query_engine_info +ffffffff81bfc390 t query_perf_config +ffffffff81bfc690 t query_memregion_info +ffffffff81bfc920 t query_hwconfig_blob +ffffffff81bfc9a0 t query_geometry_subslices +ffffffff81bfca30 t fill_topology_info +ffffffff81bfcbd0 t query_perf_config_data +ffffffff81bfcf30 t copy_perf_config_registers_or_number +ffffffff81bfe000 T i915_request_slab_cache +ffffffff81bfe030 t i915_fence_get_driver_name +ffffffff81bfe060 t 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intel_vgpu_detect +ffffffff81c0c030 T intel_vgpu_register +ffffffff81c0c090 T intel_vgpu_active +ffffffff81c0c0c0 T intel_vgpu_has_full_ppgtt +ffffffff81c0c100 T intel_vgpu_has_hwsp_emulation +ffffffff81c0c140 T intel_vgpu_has_huge_gtt +ffffffff81c0c180 T intel_vgt_deballoon +ffffffff81c0c3c0 T intel_vgt_balloon +ffffffff81c0d000 T i915_vma_instance +ffffffff81c0d110 t vma_create +ffffffff81c0d5a0 T i915_vma_work +ffffffff81c0d610 T i915_vma_wait_for_bind +ffffffff81c0d690 T i915_vma_bind +ffffffff81c0d9f0 T i915_vma_pin_iomap +ffffffff81c0db90 T i915_vma_flush_writes +ffffffff81c0dbe0 T i915_vma_unpin_iomap +ffffffff81c0dc50 T i915_vma_unpin_and_release +ffffffff81c0dcc0 T i915_vma_misplaced +ffffffff81c0ddb0 T __i915_vma_set_map_and_fenceable +ffffffff81c0de40 T i915_gem_valid_gtt_space +ffffffff81c0ded0 T vma_invalidate_tlb +ffffffff81c0df40 T i915_vma_pin_ww +ffffffff81c0e5f0 t i915_vma_insert +ffffffff81c0e990 T i915_ggtt_pin +ffffffff81c0ea70 t __i915_ggtt_pin +ffffffff81c0ebf0 t i915_gem_object_lock +ffffffff81c0ee10 T i915_ggtt_clear_scanout +ffffffff81c0ee90 T i915_vma_close +ffffffff81c0ef60 T i915_vma_reopen +ffffffff81c0efe0 T i915_vma_destroy_locked +ffffffff81c0f0d0 t release_references +ffffffff81c0f210 T i915_vma_destroy +ffffffff81c0f350 T i915_vma_parked +ffffffff81c0f630 T i915_vma_revoke_mmap +ffffffff81c0f730 T _i915_vma_move_to_active +ffffffff81c0f980 T __i915_vma_evict +ffffffff81c0fce0 T __i915_vma_unbind +ffffffff81c0fd80 T i915_vma_unbind +ffffffff81c0fed0 T i915_vma_unbind_async +ffffffff81c10040 t __i915_vma_unbind_async +ffffffff81c10100 T i915_vma_unbind_unlocked +ffffffff81c10210 T i915_vma_make_unshrinkable +ffffffff81c10250 T i915_vma_make_shrinkable +ffffffff81c10270 T i915_vma_make_purgeable +ffffffff81c10290 T i915_vma_module_exit +ffffffff81c102b0 T i915_vma_module_init +ffffffff81c10310 t __i915_vma_active +ffffffff81c103b0 t __i915_vma_retire +ffffffff81c10450 t __vma_bind +ffffffff81c104f0 t __vma_release +ffffffff81c10570 t intel_rotate_pages +ffffffff81c108d0 t intel_remap_pages +ffffffff81c10d20 t intel_partial_pages +ffffffff81c11000 T i915_vma_resource_alloc +ffffffff81c11050 T i915_vma_resource_free +ffffffff81c11090 T i915_vma_resource_unhold +ffffffff81c110a0 t __i915_vma_resource_unhold +ffffffff81c11190 T i915_vma_resource_hold +ffffffff81c111e0 T i915_vma_resource_unbind +ffffffff81c11300 T __i915_vma_resource_init +ffffffff81c11360 t i915_vma_resource_fence_notify +ffffffff81c11420 T i915_vma_resource_bind_dep_sync +ffffffff81c115c0 T i915_vma_resource_bind_dep_sync_all +ffffffff81c11660 T i915_vma_resource_bind_dep_await +ffffffff81c11840 T i915_vma_resource_module_exit +ffffffff81c11860 T i915_vma_resource_module_init +ffffffff81c118c0 t get_driver_name +ffffffff81c118f0 t get_timeline_name +ffffffff81c11920 t unbind_fence_release +ffffffff81c11960 t i915_vma_resource_unbind_work +ffffffff81c12000 T intel_clock_gating_init +ffffffff81c12020 T intel_clock_gating_hooks_init +ffffffff81c12280 t nop_init_clock_gating +ffffffff81c122b0 t pvc_init_clock_gating +ffffffff81c12430 t dg2_init_clock_gating +ffffffff81c12490 t xehpsdv_init_clock_gating +ffffffff81c12570 t adlp_init_clock_gating +ffffffff81c12670 t gen12lp_init_clock_gating +ffffffff81c12730 t icl_init_clock_gating +ffffffff81c127b0 t cfl_init_clock_gating +ffffffff81c128d0 t gen9_init_clock_gating +ffffffff81c129e0 t skl_init_clock_gating +ffffffff81c12b20 t kbl_init_clock_gating +ffffffff81c12d30 t bxt_init_clock_gating +ffffffff81c12e90 t glk_init_clock_gating +ffffffff81c12ef0 t bdw_init_clock_gating +ffffffff81c13320 t chv_init_clock_gating +ffffffff81c134b0 t hsw_init_clock_gating +ffffffff81c13770 t ivb_init_clock_gating +ffffffff81c13980 t g4x_disable_trickle_feed +ffffffff81c13ad0 t cpt_init_clock_gating +ffffffff81c13e10 t vlv_init_clock_gating +ffffffff81c13f20 t gen6_init_clock_gating +ffffffff81c14120 t ilk_init_clock_gating +ffffffff81c14300 t g4x_init_clock_gating +ffffffff81c143c0 t i965gm_init_clock_gating +ffffffff81c14490 t i965g_init_clock_gating +ffffffff81c14510 t gen3_init_clock_gating +ffffffff81c14610 t i85x_init_clock_gating +ffffffff81c146b0 t i830_init_clock_gating +ffffffff81c15000 T intel_platform_name +ffffffff81c15090 T intel_device_info_print +ffffffff81c15a20 T intel_device_info_runtime_init_early +ffffffff81c16010 T intel_device_info_runtime_init +ffffffff81c160d0 T intel_device_info_driver_create +ffffffff81c161e0 T intel_driver_caps_print +ffffffff81c17000 T intel_memory_region_lookup +ffffffff81c170e0 T intel_memory_region_by_type +ffffffff81c171a0 T intel_memory_region_reserve +ffffffff81c171c0 T intel_memory_region_debug +ffffffff81c17220 T intel_memory_region_create +ffffffff81c173a0 T intel_memory_region_set_name +ffffffff81c17420 T intel_memory_region_avail +ffffffff81c174a0 T intel_memory_region_destroy +ffffffff81c17510 T intel_memory_regions_hw_probe +ffffffff81c17660 T intel_memory_regions_driver_release +ffffffff81c18000 T snb_pcode_read +ffffffff81c180d0 t __snb_pcode_rw +ffffffff81c18260 T snb_pcode_write_timeout +ffffffff81c18330 T skl_pcode_request +ffffffff81c18670 T intel_pcode_init +ffffffff81c187b0 T snb_pcode_read_p +ffffffff81c188c0 T snb_pcode_write_p +ffffffff81c19000 T intel_region_ttm_device_init +ffffffff81c19070 T intel_region_ttm_device_fini +ffffffff81c19090 T intel_region_to_ttm_type +ffffffff81c190d0 T intel_region_ttm_init +ffffffff81c19170 T intel_region_ttm_fini +ffffffff81c193d0 T intel_region_ttm_resource_to_rsgt +ffffffff81c19410 T intel_region_ttm_resource_free +ffffffff81c1a000 T intel_runtime_pm_get_raw +ffffffff81c1a090 T intel_runtime_pm_get +ffffffff81c1a140 T intel_runtime_pm_get_if_in_use +ffffffff81c1a1f0 T intel_runtime_pm_get_if_active +ffffffff81c1a2a0 T intel_runtime_pm_get_noresume +ffffffff81c1a3d0 T intel_runtime_pm_put_raw +ffffffff81c1a460 T intel_runtime_pm_put_unchecked +ffffffff81c1a520 T intel_runtime_pm_enable +ffffffff81c1a550 T intel_runtime_pm_disable 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T intel_uncore_unclaimed_mmio +ffffffff81c1e740 T intel_uncore_runtime_resume +ffffffff81c1e770 T intel_uncore_forcewake_get +ffffffff81c1e8e0 T intel_uncore_forcewake_user_get +ffffffff81c1ea00 T intel_uncore_forcewake_get__locked +ffffffff81c1ead0 T intel_uncore_forcewake_user_put +ffffffff81c1ec10 T intel_uncore_forcewake_put__locked +ffffffff81c1ed10 T intel_uncore_forcewake_put +ffffffff81c1ee30 T intel_uncore_forcewake_put_delayed +ffffffff81c1ef80 T intel_uncore_forcewake_flush +ffffffff81c1f030 T assert_forcewakes_inactive +ffffffff81c1f0a0 T assert_forcewakes_active +ffffffff81c1f0d0 T intel_uncore_setup_mmio +ffffffff81c1f100 t uncore_unmap_mmio +ffffffff81c1f130 T intel_uncore_init_early +ffffffff81c1f1a0 T intel_uncore_init_mmio +ffffffff81c205e0 T intel_uncore_prune_engine_fw_domains +ffffffff81c207c0 t fw_domain_fini +ffffffff81c208c0 T intel_uncore_fini_mmio +ffffffff81c20ae0 T __intel_wait_for_register_fw +ffffffff81c20da0 T __intel_wait_for_register +ffffffff81c21140 T intel_uncore_forcewake_for_reg +ffffffff81c21250 t check_for_unclaimed_mmio +ffffffff81c213b0 T intel_uncore_arm_unclaimed_mmio_detection +ffffffff81c214c0 t vgpu_write8 +ffffffff81c21500 t vgpu_write16 +ffffffff81c21540 t vgpu_write32 +ffffffff81c21580 t vgpu_read8 +ffffffff81c215c0 t vgpu_read16 +ffffffff81c21600 t vgpu_read32 +ffffffff81c21640 t vgpu_read64 +ffffffff81c21680 t gen5_write8 +ffffffff81c21780 t gen5_write16 +ffffffff81c21880 t gen5_write32 +ffffffff81c21980 t gen5_read8 +ffffffff81c21a70 t gen5_read16 +ffffffff81c21b60 t gen5_read32 +ffffffff81c21c50 t gen5_read64 +ffffffff81c21d40 t gen2_write8 +ffffffff81c21e20 t gen2_write16 +ffffffff81c21f00 t gen2_write32 +ffffffff81c21fe0 t gen2_read8 +ffffffff81c220b0 t gen2_read16 +ffffffff81c22180 t gen2_read32 +ffffffff81c22250 t gen2_read64 +ffffffff81c22320 t fwtable_read8 +ffffffff81c225e0 t fwtable_read16 +ffffffff81c228a0 t fwtable_read32 +ffffffff81c22b50 t fwtable_read64 +ffffffff81c22e00 t fwtable_reg_read_fw_domains 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intel_wakeref_wait_for_idle +ffffffff81c25400 T intel_wakeref_auto_init +ffffffff81c25480 t wakeref_auto_timeout +ffffffff81c25530 T intel_wakeref_auto +ffffffff81c25740 T intel_wakeref_auto_fini +ffffffff81c25800 t __delayed_work_tick +ffffffff81c26000 T intel_pxp_is_supported +ffffffff81c26030 T intel_pxp_is_enabled +ffffffff81c26060 T intel_pxp_is_active +ffffffff81c26090 T intel_pxp_init +ffffffff81c260c0 T intel_pxp_fini +ffffffff81c26160 T intel_pxp_mark_termination_in_progress +ffffffff81c261a0 T intel_pxp_get_backend_timeout_ms +ffffffff81c261e0 T intel_pxp_end +ffffffff81c26210 T intel_pxp_fini_hw +ffffffff81c26250 T intel_pxp_get_readiness_status +ffffffff81c26280 T intel_pxp_start +ffffffff81c262b0 T intel_pxp_init_hw +ffffffff81c262f0 T intel_pxp_key_check +ffffffff81c26320 T intel_pxp_invalidate +ffffffff81c27000 T intel_pxp_huc_load_and_auth +ffffffff81c28000 T intel_pxp_tee_stream_message +ffffffff81c28160 T intel_pxp_tee_component_init +ffffffff81c283d0 T intel_pxp_tee_component_fini +ffffffff81c28450 T intel_pxp_tee_cmd_create_arb_session +ffffffff81c28680 T intel_pxp_tee_end_arb_fw_session +ffffffff81c28900 t i915_pxp_tee_component_bind +ffffffff81c28a70 t i915_pxp_tee_component_unbind +ffffffff81c29000 T intel_dram_detect +ffffffff81c29430 t gen11_get_dram_info +ffffffff81c29480 t bxt_get_dram_info +ffffffff81c29790 t skl_get_dram_info +ffffffff81c29970 T intel_dram_edram_detect +ffffffff81c29a00 t icl_pcode_read_mem_global_info +ffffffff81c29ae0 t skl_dram_get_channel_info +ffffffff81c29cb0 t skl_dram_get_dimm_info +ffffffff81c2a000 T intel_gmch_bridge_setup +ffffffff81c2a0d0 t intel_gmch_bridge_release +ffffffff81c2a100 T intel_gmch_bar_setup +ffffffff81c2a2f0 T intel_gmch_bar_teardown +ffffffff81c2a3e0 T intel_gmch_vga_set_state +ffffffff81c2b000 T intel_detect_pch +ffffffff81c2b1b0 t intel_pch_match +ffffffff81c2b200 t intel_pch_type +ffffffff81c2b9c0 t intel_virt_detect_pch +ffffffff81c2c000 T vlv_iosf_sb_get +ffffffff81c2c020 T vlv_iosf_sb_put +ffffffff81c2c040 T vlv_punit_read +ffffffff81c2c090 t vlv_sideband_rw +ffffffff81c2c240 T vlv_punit_write +ffffffff81c2c290 T vlv_bunit_read +ffffffff81c2c2e0 T vlv_bunit_write +ffffffff81c2c330 T vlv_nc_read +ffffffff81c2c380 T vlv_iosf_sb_read +ffffffff81c2c3d0 T vlv_iosf_sb_write +ffffffff81c2c420 T vlv_cck_read +ffffffff81c2c470 T vlv_cck_write +ffffffff81c2c4c0 T vlv_ccu_read +ffffffff81c2c510 T vlv_ccu_write +ffffffff81c2c560 T vlv_dpio_read +ffffffff81c2c630 T vlv_dpio_write +ffffffff81c2c6a0 T vlv_flisdsi_read +ffffffff81c2c6f0 T vlv_flisdsi_write +ffffffff81c2d000 T vlv_suspend_complete +ffffffff81c2da50 T vlv_resume_prepare +ffffffff81c2e4e0 T vlv_suspend_init +ffffffff81c2e550 T vlv_suspend_cleanup +ffffffff81c2e5b0 t vlv_wait_for_pw_status +ffffffff81c2f000 T atom_execute_table_scratch_unlocked +ffffffff81c2f0a0 t atom_execute_table_locked +ffffffff81c2f3b0 T atom_execute_table +ffffffff81c2f460 T atom_parse +ffffffff81c2f610 T atom_destroy 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atombios_set_backlight_level +ffffffff81c3b220 T atombios_dig_transmitter_setup +ffffffff81c3b240 T radeon_atom_backlight_init +ffffffff81c3b420 t radeon_atom_backlight_get_brightness +ffffffff81c3b480 T atombios_dvo_setup +ffffffff81c3b640 T atombios_digital_setup +ffffffff81c3b900 T atombios_get_encoder_mode +ffffffff81c3bb90 T atombios_dig_encoder_setup2 +ffffffff81c3bfd0 T atombios_dig_encoder_setup +ffffffff81c3bff0 T atombios_dig_transmitter_setup2 +ffffffff81c3c9d0 T atombios_set_edp_panel_power +ffffffff81c3cae0 T radeon_atom_release_dig_encoder +ffffffff81c3cb20 T radeon_atom_pick_dig_encoder +ffffffff81c3cd40 T radeon_atom_encoder_init +ffffffff81c3ce10 t atombios_external_encoder_setup +ffffffff81c3d080 T radeon_atom_ext_encoder_setup_ddc +ffffffff81c3d0d0 T radeon_enc_destroy +ffffffff81c3d180 T radeon_add_atom_encoder +ffffffff81c3d590 t radeon_atombios_set_dig_info +ffffffff81c3d600 t radeon_atombios_set_dac_info +ffffffff81c3d670 t radeon_atom_backlight_update_status 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btc_skip_blacklist_clocks +ffffffff81c41230 T btc_adjust_clock_combinations +ffffffff81c41360 T btc_apply_voltage_delta_rules +ffffffff81c41480 T btc_program_mgcg_hw_sequence +ffffffff81c41580 T btc_dpm_enabled +ffffffff81c41590 T btc_notify_uvd_to_smc +ffffffff81c41600 T btc_reset_to_default +ffffffff81c41650 T btc_read_arb_registers +ffffffff81c416e0 T btc_dpm_vblank_too_short +ffffffff81c41750 T btc_dpm_pre_set_power_state +ffffffff81c42970 T btc_dpm_set_power_state +ffffffff81c42ca0 t btc_set_power_state_conditionally_enable_ulv +ffffffff81c42dd0 T btc_dpm_post_set_power_state +ffffffff81c42ef0 t btc_update_current_ps +ffffffff81c42ff0 T btc_dpm_enable +ffffffff81c43ed0 t btc_cg_clock_gating_enable +ffffffff81c44000 t btc_mg_clock_gating_enable +ffffffff81c44120 t btc_ls_clock_gating_enable +ffffffff81c44250 t btc_init_stutter_mode +ffffffff81c442d0 T btc_dpm_disable +ffffffff81c445b0 T btc_dpm_setup_asic +ffffffff81c44690 T btc_dpm_init +ffffffff81c44a80 T btc_dpm_fini +ffffffff81c44b30 T btc_dpm_debugfs_print_current_performance_level +ffffffff81c44b80 T btc_dpm_get_current_sclk +ffffffff81c44c00 T btc_dpm_get_current_mclk +ffffffff81c44c80 T btc_dpm_get_sclk +ffffffff81c44cd0 T btc_dpm_get_mclk +ffffffff81c45000 T ci_dpm_powergate_uvd +ffffffff81c45380 T ci_dpm_vblank_too_short +ffffffff81c45410 T ci_fan_ctrl_get_fan_speed_percent +ffffffff81c454b0 T ci_fan_ctrl_set_fan_speed_percent +ffffffff81c45580 T ci_fan_ctrl_set_mode +ffffffff81c45720 t ci_fan_ctrl_set_static_mode +ffffffff81c457e0 t ci_thermal_start_smc_fan_control +ffffffff81c45a20 T ci_fan_ctrl_get_mode +ffffffff81c45a80 T ci_dpm_force_performance_level +ffffffff81c46310 t ci_upload_dpm_level_enable_mask +ffffffff81c46640 T ci_dpm_pre_set_power_state +ffffffff81c46930 T ci_dpm_post_set_power_state +ffffffff81c46a00 T ci_dpm_setup_asic +ffffffff81c46c00 T ci_dpm_enable +ffffffff81c484d0 t ci_init_smc_table +ffffffff81c493b0 t ci_init_arb_table_index +ffffffff81c49440 t ci_populate_initial_mc_reg_table +ffffffff81c49730 t ci_populate_pm_base +ffffffff81c49a90 t ci_dpm_start_smc +ffffffff81c49b10 t ci_enable_vr_hot_gpio_interrupt +ffffffff81c49bb0 t ci_notify_smc_display_change +ffffffff81c49c80 t ci_enable_sclk_control +ffffffff81c49cb0 t ci_enable_ulv +ffffffff81c49e00 t ci_enable_ds_master_switch +ffffffff81c49ff0 t ci_start_dpm +ffffffff81c4a1e0 t ci_enable_didt +ffffffff81c4a490 t ci_enable_smc_cac +ffffffff81c4a620 t ci_enable_power_containment +ffffffff81c4aaa0 t ci_power_control_set_level +ffffffff81c4abb0 t ci_enable_auto_throttle_source +ffffffff81c4ac90 t ci_enable_thermal_based_sclk_dpm +ffffffff81c4ade0 t ci_thermal_start_thermal_controller +ffffffff81c4b0e0 T ci_dpm_late_enable +ffffffff81c4b180 T ci_dpm_disable +ffffffff81c4b870 T ci_dpm_set_power_state +ffffffff81c4c4e0 t ci_update_sclk_t +ffffffff81c4c550 t ci_update_and_upload_mc_reg_table +ffffffff81c4c7d0 t ci_unfreeze_sclk_mclk_dpm +ffffffff81c4c980 t ci_notify_link_speed_change_after_state_change +ffffffff81c4cab0 T ci_dpm_display_configuration_changed +ffffffff81c4cc40 T ci_dpm_fini +ffffffff81c4ccf0 T ci_dpm_init +ffffffff81c4db50 t ci_initialize_powertune_defaults +ffffffff81c4dc40 t ci_get_leakage_voltages +ffffffff81c4ddf0 t ci_patch_dependency_tables_with_leakage +ffffffff81c4e460 t ci_set_private_data_variables_based_on_pptable +ffffffff81c4e570 T ci_dpm_debugfs_print_current_performance_level +ffffffff81c4e6b0 T ci_dpm_print_power_state +ffffffff81c4e770 T ci_dpm_get_current_sclk +ffffffff81c4e840 T ci_dpm_get_current_mclk +ffffffff81c4e910 T ci_dpm_get_sclk +ffffffff81c4e960 T ci_dpm_get_mclk +ffffffff81c4e9b0 t ci_set_valid_flag +ffffffff81c4ea50 t ci_populate_all_graphic_levels +ffffffff81c4efe0 t ci_populate_all_memory_levels +ffffffff81c4f8d0 t ci_populate_smc_vce_level +ffffffff81c4f9e0 t ci_populate_smc_acp_level +ffffffff81c4fad0 t ci_populate_smc_samu_level +ffffffff81c4fbc0 t ci_do_program_memory_timing_parameters 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cik_pciep_rreg +ffffffff81c522e0 T cik_pciep_wreg +ffffffff81c52350 T cik_get_xclk +ffffffff81c523c0 T cik_mm_rdoorbell +ffffffff81c52420 T cik_mm_wdoorbell +ffffffff81c52470 T ci_mc_load_microcode +ffffffff81c527b0 T cik_ring_test +ffffffff81c52a50 T cik_fence_gfx_ring_emit +ffffffff81c52e40 T cik_fence_compute_ring_emit +ffffffff81c530c0 T cik_semaphore_ring_emit +ffffffff81c53280 T cik_copy_cpdma +ffffffff81c536d0 T cik_ring_ib_execute +ffffffff81c53c70 T cik_ib_test +ffffffff81c53f50 T cik_gfx_get_rptr +ffffffff81c53fb0 T cik_gfx_get_wptr +ffffffff81c53ff0 T cik_gfx_set_wptr +ffffffff81c54030 T cik_compute_get_rptr +ffffffff81c54110 T cik_compute_get_wptr +ffffffff81c541f0 T cik_compute_set_wptr +ffffffff81c54270 T cik_gpu_check_soft_reset +ffffffff81c543e0 T cik_asic_reset +ffffffff81c54890 t cik_gpu_pci_config_reset +ffffffff81c550a0 T cik_gfx_is_lockup +ffffffff81c55110 T cik_pcie_gart_tlb_flush +ffffffff81c55160 T cik_ib_parse +ffffffff81c55190 T cik_vm_init +ffffffff81c551f0 T cik_vm_fini +ffffffff81c55220 T cik_vm_flush +ffffffff81c55e90 T cik_enter_rlc_safe_mode +ffffffff81c55f80 T cik_exit_rlc_safe_mode +ffffffff81c55fc0 T cik_update_cg +ffffffff81c564c0 t cik_enable_mgcg +ffffffff81c569e0 t cik_enable_cgcg +ffffffff81c56d50 T cik_init_cp_pg_table +ffffffff81c56fe0 T cik_get_csb_size +ffffffff81c57070 T cik_get_csb_buffer +ffffffff81c57200 T cik_irq_set +ffffffff81c57f80 t cik_disable_interrupt_state +ffffffff81c58440 T cik_irq_process +ffffffff81c59c10 t cik_irq_ack +ffffffff81c5a590 T cik_resume +ffffffff81c5a620 t cik_init_golden_registers +ffffffff81c5a7e0 t cik_startup +ffffffff81c5d5d0 T cik_suspend +ffffffff81c5d9c0 T cik_init +ffffffff81c5def0 t cik_init_microcode +ffffffff81c5ec40 t cik_uvd_init +ffffffff81c5ecf0 t cik_vce_init +ffffffff81c5edc0 t cik_cp_fini +ffffffff81c5ee40 t cik_irq_fini +ffffffff81c5ef50 t cik_mec_fini +ffffffff81c5f000 t cik_pcie_gart_fini +ffffffff81c5f100 T cik_fini +ffffffff81c5f420 T dce8_program_fmt +ffffffff81c5f550 T dce8_bandwidth_update +ffffffff81c60160 T cik_get_gpu_clock_counter +ffffffff81c60220 T cik_set_uvd_clocks +ffffffff81c602a0 t cik_set_uvd_clock +ffffffff81c60410 T cik_set_vce_clocks +ffffffff81c60650 t cik_wait_for_rlc_serdes +ffffffff81c60810 t cik_mec_init +ffffffff81c60a00 t cik_uvd_start +ffffffff81c60af0 t cik_vce_start +ffffffff81c60c10 t cik_irq_init +ffffffff81c61790 t cik_cp_resume +ffffffff81c62f40 t cik_uvd_resume +ffffffff81c63010 t cik_vce_resume +ffffffff81c63110 t pcie_capability_set_word +ffffffff81c63220 t pcie_capability_read_word +ffffffff81c632c0 t pcie_capability_clear_and_set_word +ffffffff81c633e0 t pcie_capability_write_word +ffffffff81c634a0 t cik_get_cu_active_bitmap +ffffffff81c63620 t radeon_bo_reserve +ffffffff81c637a0 t radeon_bo_unreserve +ffffffff81c63880 t cik_update_gfx_pg +ffffffff81c63a20 t cik_compute_stop +ffffffff81c63b90 t cik_cp_compute_fini +ffffffff81c63d30 t request_firmware +ffffffff81c63dc0 t release_firmware +ffffffff81c63e00 t dce8_latency_watermark +ffffffff81c65000 T cik_sdma_get_rptr +ffffffff81c65070 T cik_sdma_get_wptr +ffffffff81c650c0 T cik_sdma_set_wptr +ffffffff81c65110 T cik_sdma_ring_ib_execute +ffffffff81c65510 T cik_sdma_fence_ring_emit +ffffffff81c656e0 t cik_sdma_hdp_flush_ring_emit +ffffffff81c65910 T cik_sdma_semaphore_ring_emit +ffffffff81c65a30 T cik_sdma_enable +ffffffff81c65c10 T cik_sdma_resume +ffffffff81c660f0 T cik_sdma_fini +ffffffff81c66130 T cik_copy_dma +ffffffff81c66530 T cik_sdma_ring_test +ffffffff81c667e0 T cik_sdma_ib_test +ffffffff81c66a40 T cik_sdma_is_lockup +ffffffff81c66ac0 T cik_sdma_vm_copy_pages +ffffffff81c66bd0 T cik_sdma_vm_write_pages +ffffffff81c66d40 T cik_sdma_vm_set_pages +ffffffff81c66ec0 T cik_sdma_vm_pad_ib +ffffffff81c66f10 T cik_dma_vm_flush +ffffffff81c68000 T cypress_enable_spread_spectrum +ffffffff81c68140 T cypress_start_dpm +ffffffff81c68190 T cypress_enable_sclk_control +ffffffff81c681f0 T cypress_enable_mclk_control +ffffffff81c68250 T cypress_notify_smc_display_change +ffffffff81c682a0 T cypress_program_response_times +ffffffff81c68360 T cypress_advertise_gen2_capability +ffffffff81c68430 T cypress_notify_link_speed_change_after_state_change +ffffffff81c684f0 T cypress_notify_link_speed_change_before_state_change +ffffffff81c685b0 T cypress_get_strobe_mode_settings +ffffffff81c686b0 T cypress_get_mclk_frequency_ratio +ffffffff81c68760 T cypress_map_clkf_to_ibias +ffffffff81c68820 T cypress_convert_power_level_to_smc +ffffffff81c68c00 t cypress_populate_mclk_value +ffffffff81c69010 T cypress_upload_sw_state +ffffffff81c69190 T cypress_upload_mc_reg_table +ffffffff81c69250 t cypress_convert_mc_reg_table_to_smc +ffffffff81c69670 T cypress_calculate_burst_time +ffffffff81c69700 T cypress_program_memory_timing_parameters +ffffffff81c698a0 T cypress_populate_smc_initial_state +ffffffff81c69c50 T cypress_populate_smc_acpi_state +ffffffff81c69fd0 T cypress_construct_voltage_tables +ffffffff81c6a160 T cypress_populate_smc_voltage_tables +ffffffff81c6a290 T cypress_get_mvdd_configuration +ffffffff81c6a360 T cypress_populate_mc_reg_table +ffffffff81c6a6a0 T cypress_get_table_locations +ffffffff81c6a780 T cypress_enable_display_gap +ffffffff81c6a7e0 T cypress_dpm_setup_asic +ffffffff81c6a8d0 T cypress_dpm_enable +ffffffff81c6b3a0 t cypress_force_mc_use_s1 +ffffffff81c6b620 t cypress_gfx_clock_gating_enable +ffffffff81c6b930 t cypress_mg_clock_gating_enable +ffffffff81c6bbb0 T cypress_dpm_disable +ffffffff81c6bde0 T cypress_dpm_set_power_state +ffffffff81c6c020 T cypress_dpm_display_configuration_changed +ffffffff81c6c100 T cypress_dpm_init +ffffffff81c6c370 T cypress_dpm_fini +ffffffff81c6c400 T cypress_dpm_vblank_too_short +ffffffff81c6c470 t cypress_wait_for_mc_sequencer +ffffffff81c6d000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81c6d070 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81c6d0e0 T dce3_2_afmt_write_sad_regs +ffffffff81c6d1e0 T dce3_2_audio_set_dto +ffffffff81c6d320 T dce3_2_hdmi_update_acr +ffffffff81c6d680 T dce3_2_set_audio_packet +ffffffff81c6d810 T dce3_2_set_mute +ffffffff81c6e000 T dce6_endpoint_rreg +ffffffff81c6e0e0 T dce6_endpoint_wreg +ffffffff81c6e1d0 T dce6_audio_get_pin +ffffffff81c6e360 T dce6_afmt_select_pin +ffffffff81c6e3f0 T dce6_afmt_write_latency_fields +ffffffff81c6e4b0 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81c6e580 T dce6_afmt_dp_write_speaker_allocation +ffffffff81c6e650 T dce6_afmt_write_sad_regs +ffffffff81c6e790 T dce6_audio_enable +ffffffff81c6e7e0 T dce6_hdmi_audio_set_dto +ffffffff81c6e850 T dce6_dp_audio_set_dto +ffffffff81c6f000 T eg_cg_rreg +ffffffff81c6f080 T eg_cg_wreg +ffffffff81c6f0f0 T eg_pif_phy0_rreg +ffffffff81c6f170 T eg_pif_phy0_wreg +ffffffff81c6f1d0 T eg_pif_phy1_rreg +ffffffff81c6f250 T eg_pif_phy1_wreg +ffffffff81c6f2b0 T evergreen_get_allowed_info_register +ffffffff81c6f340 T evergreen_tiling_fields +ffffffff81c6f3e0 T sumo_set_uvd_clocks +ffffffff81c6f4c0 t sumo_set_uvd_clock +ffffffff81c6f6b0 T evergreen_set_uvd_clocks +ffffffff81c6fc30 T evergreen_fix_pci_max_read_req_size +ffffffff81c6fdf0 T dce4_program_fmt +ffffffff81c6ff10 T dce4_wait_for_vblank +ffffffff81c70190 T evergreen_page_flip +ffffffff81c70320 T evergreen_page_flip_pending +ffffffff81c70390 T evergreen_get_temp +ffffffff81c70460 T sumo_get_temp +ffffffff81c704b0 T sumo_pm_init_profile +ffffffff81c705f0 T btc_pm_init_profile +ffffffff81c70700 T evergreen_pm_misc +ffffffff81c708a0 T evergreen_pm_prepare +ffffffff81c709a0 T evergreen_pm_finish +ffffffff81c70aa0 T evergreen_hpd_sense +ffffffff81c70b10 T evergreen_hpd_set_polarity +ffffffff81c70c50 T evergreen_hpd_init +ffffffff81c70d20 T evergreen_hpd_fini +ffffffff81c70dc0 T evergreen_get_number_of_dram_channels +ffffffff81c70e10 T evergreen_bandwidth_update +ffffffff81c70fd0 t evergreen_line_buffer_adjust +ffffffff81c711c0 t evergreen_program_watermarks +ffffffff81c71c20 T evergreen_mc_wait_for_idle +ffffffff81c71cc0 T evergreen_pcie_gart_tlb_flush +ffffffff81c71d90 T evergreen_mc_stop +ffffffff81c72890 T evergreen_mc_resume +ffffffff81c72fa0 T evergreen_mc_program +ffffffff81c733a0 T evergreen_ring_ib_execute +ffffffff81c73830 T evergreen_mc_init +ffffffff81c73970 T evergreen_print_gpu_status_regs +ffffffff81c739c0 T evergreen_is_display_hung +ffffffff81c73bc0 T evergreen_gpu_check_soft_reset +ffffffff81c73d20 T evergreen_gpu_pci_config_reset +ffffffff81c73ea0 T evergreen_asic_reset +ffffffff81c74210 T evergreen_gfx_is_lockup +ffffffff81c74280 T sumo_rlc_fini +ffffffff81c74440 t radeon_bo_reserve +ffffffff81c745c0 t radeon_bo_unreserve +ffffffff81c746a0 T sumo_rlc_init +ffffffff81c74e80 T evergreen_rlc_resume +ffffffff81c751f0 T evergreen_get_vblank_counter +ffffffff81c75260 T evergreen_disable_interrupt_state +ffffffff81c75530 T evergreen_irq_set +ffffffff81c75af0 T evergreen_irq_suspend +ffffffff81c75b40 T evergreen_irq_process +ffffffff81c766a0 t evergreen_irq_ack +ffffffff81c76d60 T evergreen_resume +ffffffff81c76e40 t evergreen_init_golden_registers +ffffffff81c77050 t evergreen_startup +ffffffff81c788e0 T evergreen_suspend +ffffffff81c78a80 T evergreen_init +ffffffff81c78ea0 t evergreen_pcie_gart_fini +ffffffff81c78fc0 T evergreen_fini +ffffffff81c791b0 T evergreen_pcie_gen2_enable +ffffffff81c793e0 T evergreen_program_aspm +ffffffff81c79a70 t evergreen_latency_watermark +ffffffff81c79c70 t evergreen_uvd_start +ffffffff81c79d30 t evergreen_cp_load_microcode +ffffffff81c79e90 t evergreen_cp_resume +ffffffff81c7ab00 t evergreen_uvd_resume +ffffffff81c7b000 T evergreen_cs_parse +ffffffff81c7d7b0 T evergreen_dma_cs_parse +ffffffff81c7e960 T evergreen_ib_parse +ffffffff81c7edc0 T evergreen_dma_ib_parse +ffffffff81c7ef90 t evergreen_cs_track_check +ffffffff81c80030 t evergreen_cs_handle_reg +ffffffff81c81ec0 t evergreen_surface_value_conv_check +ffffffff81c821a0 t evergreen_surface_check +ffffffff81c82620 t evergreen_cs_track_validate_htile +ffffffff81c828d0 t evergreen_vm_reg_valid +ffffffff81c83000 T evergreen_dma_fence_ring_emit +ffffffff81c832b0 T evergreen_dma_ring_ib_execute +ffffffff81c83600 T evergreen_copy_dma +ffffffff81c839a0 T evergreen_dma_is_lockup +ffffffff81c84000 T dce4_audio_enable +ffffffff81c84080 T evergreen_hdmi_update_acr +ffffffff81c842a0 T dce4_afmt_write_latency_fields +ffffffff81c84310 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c84380 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c843f0 T evergreen_hdmi_write_sad_regs +ffffffff81c844f0 T evergreen_set_avi_packet +ffffffff81c84690 T dce4_hdmi_audio_set_dto +ffffffff81c84770 T dce4_dp_audio_set_dto +ffffffff81c84860 T dce4_set_vbi_packet +ffffffff81c848d0 T dce4_hdmi_set_color_depth +ffffffff81c84a20 T dce4_set_audio_packet +ffffffff81c84c30 T dce4_set_mute +ffffffff81c84d40 T evergreen_hdmi_enable +ffffffff81c85070 T evergreen_dp_enable +ffffffff81c86000 T kv_dpm_enable_bapm +ffffffff81c86070 T kv_dpm_enable +ffffffff81c86f70 t kv_populate_vce_table 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+ffffffff81c8a0f0 T kv_dpm_get_current_sclk +ffffffff81c8a160 T kv_dpm_get_current_mclk +ffffffff81c8a190 T kv_dpm_print_power_state +ffffffff81c8a230 T kv_dpm_fini +ffffffff81c8a2d0 T kv_dpm_display_configuration_changed +ffffffff81c8a300 T kv_dpm_get_sclk +ffffffff81c8a350 T kv_dpm_get_mclk +ffffffff81c8b000 T kv_notify_message_to_smu +ffffffff81c8b0c0 T kv_dpm_get_enable_mask +ffffffff81c8b190 T kv_send_msg_to_smc_with_parameter +ffffffff81c8b260 T kv_read_smc_sram_dword +ffffffff81c8b2f0 T kv_smc_dpm_enable +ffffffff81c8b420 T kv_smc_bapm_enable +ffffffff81c8b550 T kv_copy_bytes_to_smc +ffffffff81c8c000 T tn_smc_rreg +ffffffff81c8c080 T tn_smc_wreg +ffffffff81c8c0f0 T ni_mc_load_microcode +ffffffff81c8c2e0 T ni_init_microcode +ffffffff81c8c7b0 t request_firmware +ffffffff81c8c840 t release_firmware +ffffffff81c8c880 T cayman_get_allowed_info_register +ffffffff81c8c910 T tn_get_temp +ffffffff81c8c9a0 T cayman_pcie_gart_tlb_flush +ffffffff81c8c9f0 T cayman_cp_int_cntl_setup +ffffffff81c8ca40 T cayman_fence_ring_emit +ffffffff81c8cdd0 T cayman_ring_ib_execute +ffffffff81c8d230 T cayman_gfx_get_rptr +ffffffff81c8d2c0 T cayman_gfx_get_wptr +ffffffff81c8d330 T cayman_gfx_set_wptr +ffffffff81c8d3b0 T cayman_gpu_check_soft_reset +ffffffff81c8d540 T cayman_asic_reset +ffffffff81c8d850 T cayman_gfx_is_lockup +ffffffff81c8d8c0 T cayman_resume +ffffffff81c8d950 t ni_init_golden_registers +ffffffff81c8da30 t cayman_startup +ffffffff81c8ee70 T cayman_suspend +ffffffff81c8f060 T cayman_init +ffffffff81c8f3d0 t cayman_uvd_init +ffffffff81c8f480 t cayman_vce_init +ffffffff81c8f550 t cayman_cp_fini +ffffffff81c8f5d0 t cayman_pcie_gart_fini +ffffffff81c8f710 T cayman_fini +ffffffff81c8f990 T cayman_vm_init +ffffffff81c8f9f0 T cayman_vm_fini +ffffffff81c8fa20 T cayman_vm_decode_fault +ffffffff81c8fab0 T cayman_vm_flush +ffffffff81c8ff10 T tn_set_vce_clocks +ffffffff81c90170 t cayman_uvd_start +ffffffff81c90230 t cayman_vce_start +ffffffff81c90350 t cayman_cp_load_microcode +ffffffff81c904e0 t cayman_cp_resume +ffffffff81c913a0 t cayman_uvd_resume +ffffffff81c91470 t cayman_vce_resume +ffffffff81c92000 T cayman_dma_get_rptr +ffffffff81c92070 T cayman_dma_get_wptr +ffffffff81c920c0 T cayman_dma_set_wptr +ffffffff81c92110 T cayman_dma_ring_ib_execute +ffffffff81c924a0 T cayman_dma_stop +ffffffff81c92550 T cayman_dma_resume +ffffffff81c927b0 T cayman_dma_fini +ffffffff81c92870 T cayman_dma_is_lockup +ffffffff81c928f0 T cayman_dma_vm_copy_pages +ffffffff81c929f0 T cayman_dma_vm_write_pages +ffffffff81c92b50 T cayman_dma_vm_set_pages +ffffffff81c92cc0 T cayman_dma_vm_pad_ib +ffffffff81c92d10 T cayman_dma_vm_flush +ffffffff81c94000 T ni_get_pi +ffffffff81c94030 T ni_get_ps +ffffffff81c94060 T ni_dpm_vblank_too_short +ffffffff81c940d0 T ni_dpm_force_performance_level +ffffffff81c94220 T ni_copy_and_switch_arb_sets +ffffffff81c944f0 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c94570 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c945f0 T ni_dpm_setup_asic +ffffffff81c94800 T ni_update_current_ps +ffffffff81c948c0 T ni_update_requested_ps +ffffffff81c94980 T ni_dpm_enable +ffffffff81c957e0 t ni_init_smc_table +ffffffff81c96180 t ni_init_smc_spll_table +ffffffff81c962f0 t ni_init_arb_table_index +ffffffff81c96390 t ni_populate_mc_reg_table +ffffffff81c968a0 t ni_initialize_smc_cac_tables +ffffffff81c97b30 t ni_initialize_hardware_cac_manager +ffffffff81c98060 t ni_populate_smc_tdp_limits +ffffffff81c98210 t ni_program_response_times +ffffffff81c98320 T ni_dpm_disable +ffffffff81c986e0 t ni_enable_power_containment +ffffffff81c987a0 t ni_enable_smc_cac +ffffffff81c988c0 T ni_dpm_pre_set_power_state +ffffffff81c98ea0 T ni_dpm_set_power_state +ffffffff81c99190 t ni_upload_sw_state +ffffffff81c99d70 t ni_upload_mc_reg_table +ffffffff81c99fd0 t ni_power_control_set_level +ffffffff81c9a0a0 T ni_dpm_post_set_power_state +ffffffff81c9a170 T ni_dpm_init +ffffffff81c9ab10 T ni_dpm_fini +ffffffff81c9abc0 T ni_dpm_print_power_state +ffffffff81c9ac90 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c9acd0 T ni_dpm_get_current_sclk +ffffffff81c9ad40 T ni_dpm_get_current_mclk +ffffffff81c9adb0 T ni_dpm_get_sclk +ffffffff81c9ae10 T ni_dpm_get_mclk +ffffffff81c9ae70 t ni_do_program_memory_timing_parameters +ffffffff81c9afb0 t ni_calculate_sclk_params +ffffffff81c9b1e0 t ni_calculate_power_boost_limit +ffffffff81c9b370 t ni_populate_mclk_value +ffffffff81c9c000 T r100_wait_for_vblank +ffffffff81c9c190 T r100_page_flip +ffffffff81c9c450 T r100_page_flip_pending +ffffffff81c9c500 T r100_pm_get_dynpm_state +ffffffff81c9c720 T r100_pm_init_profile +ffffffff81c9c800 T r100_pm_misc +ffffffff81c9cc40 T r100_pm_prepare +ffffffff81c9ccf0 T r100_pm_finish +ffffffff81c9cda0 T r100_gui_idle +ffffffff81c9cde0 T r100_hpd_sense +ffffffff81c9ce40 T r100_hpd_set_polarity +ffffffff81c9cf00 T r100_hpd_init +ffffffff81c9cfa0 T r100_hpd_fini +ffffffff81c9d010 T r100_pci_gart_tlb_flush +ffffffff81c9d040 T r100_pci_gart_init +ffffffff81c9d110 T r100_pci_gart_get_page_entry +ffffffff81c9d140 T r100_pci_gart_set_page +ffffffff81c9d180 T r100_pci_gart_enable +ffffffff81c9d270 T r100_pci_gart_disable +ffffffff81c9d2f0 T r100_pci_gart_fini +ffffffff81c9d370 T r100_irq_set +ffffffff81c9d450 T r100_irq_disable +ffffffff81c9d4c0 T r100_irq_process +ffffffff81c9d7c0 T r100_get_vblank_counter +ffffffff81c9d810 T r100_fence_ring_emit +ffffffff81c9dc70 T r100_semaphore_ring_emit +ffffffff81c9dca0 T r100_copy_blit +ffffffff81c9e330 T r100_ring_start +ffffffff81c9e420 T r100_gfx_get_rptr +ffffffff81c9e480 T r100_gfx_get_wptr +ffffffff81c9e4c0 T r100_gfx_set_wptr +ffffffff81c9e500 T r100_cp_init +ffffffff81c9ea30 T r100_debugfs_cp_init +ffffffff81c9ea60 T r100_cp_fini +ffffffff81c9eb00 T r100_cp_disable +ffffffff81c9ec40 T r100_gui_wait_for_idle +ffffffff81c9ed30 T r100_reloc_pitch_offset +ffffffff81c9ee70 T r100_packet3_load_vbpntr +ffffffff81c9f110 T r100_cs_parse_packet0 +ffffffff81c9f220 T r100_cs_packet_parse_vline +ffffffff81c9f430 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c9f4b0 T r100_cs_parse +ffffffff81ca06a0 T r100_cs_track_clear +ffffffff81ca0a30 T r100_cs_track_check +ffffffff81ca1250 T r100_mc_wait_for_idle +ffffffff81ca12f0 T r100_gpu_is_lockup +ffffffff81ca1350 T r100_enable_bm +ffffffff81ca13a0 T r100_bm_disable +ffffffff81ca1450 T r100_asic_reset +ffffffff81ca1780 T r100_mc_stop +ffffffff81ca1940 T r100_mc_resume +ffffffff81ca1a00 T r100_set_common_regs +ffffffff81ca1ba0 T r100_vram_init_sizes +ffffffff81ca1d90 T r100_vga_set_state +ffffffff81ca1df0 T r100_pll_errata_after_index +ffffffff81ca1e30 T r100_pll_rreg +ffffffff81ca1f60 T r100_pll_wreg +ffffffff81ca2070 T r100_debugfs_rbbm_init +ffffffff81ca20a0 T r100_debugfs_mc_info_init +ffffffff81ca20d0 T r100_set_surface_reg +ffffffff81ca22e0 T r100_clear_surface_reg +ffffffff81ca2390 T r100_bandwidth_update +ffffffff81ca2de0 T r100_ring_test +ffffffff81ca3090 T r100_ring_ib_execute +ffffffff81ca32f0 T r100_ib_test +ffffffff81ca3630 T r100_vga_render_disable +ffffffff81ca3690 T r100_resume +ffffffff81ca3890 t r100_startup +ffffffff81ca3dd0 T r100_suspend +ffffffff81ca3eb0 T r100_fini +ffffffff81ca3fc0 T r100_restore_sanity +ffffffff81ca4060 T r100_init +ffffffff81ca44c0 t r100_set_safe_registers +ffffffff81ca4540 T r100_mm_rreg_slow +ffffffff81ca45c0 T r100_mm_wreg_slow +ffffffff81ca4620 T r100_io_rreg +ffffffff81ca46c0 T r100_io_wreg +ffffffff81ca4730 t r100_get_vtx_size +ffffffff81ca4820 t r100_cs_track_texture_print +ffffffff81ca5000 T r200_copy_dma +ffffffff81ca5470 T r200_packet0_check +ffffffff81ca6240 t r200_get_vtx_size_0 +ffffffff81ca6400 t r200_get_vtx_size_1 +ffffffff81ca6490 T r200_set_safe_registers +ffffffff81ca7000 T rv370_pcie_rreg +ffffffff81ca7080 T rv370_pcie_wreg +ffffffff81ca70f0 T rv370_pcie_gart_tlb_flush +ffffffff81ca72f0 T rv370_pcie_gart_get_page_entry +ffffffff81ca7350 T rv370_pcie_gart_set_page +ffffffff81ca7390 T rv370_pcie_gart_init +ffffffff81ca7460 T rv370_pcie_gart_enable +ffffffff81ca77c0 T rv370_pcie_gart_disable +ffffffff81ca7940 T rv370_pcie_gart_fini +ffffffff81ca7970 T r300_fence_ring_emit +ffffffff81ca7ee0 T r300_ring_start +ffffffff81ca8850 T r300_mc_wait_for_idle +ffffffff81ca88f0 T r300_asic_reset +ffffffff81ca8b10 T r300_mc_init +ffffffff81ca8bc0 T rv370_set_pcie_lanes +ffffffff81ca8d80 T rv370_get_pcie_lanes +ffffffff81ca8e30 T r300_cs_parse +ffffffff81ca91a0 t r300_packet0_check +ffffffff81caa060 T r300_set_reg_safe +ffffffff81caa0a0 T r300_mc_program +ffffffff81caa230 T r300_clock_startup +ffffffff81caa2c0 T r300_resume +ffffffff81caa490 t r300_startup +ffffffff81caa7f0 T r300_suspend +ffffffff81caa870 T r300_fini +ffffffff81caa950 T r300_init +ffffffff81cab000 T r420_pm_init_profile +ffffffff81cab0f0 T r420_pipes_init +ffffffff81cab2d0 T r420_mc_rreg +ffffffff81cab350 T r420_mc_wreg +ffffffff81cab3c0 T r420_resume +ffffffff81cab590 t r420_startup +ffffffff81cab7a0 T r420_suspend +ffffffff81cab940 T r420_fini +ffffffff81caba20 T r420_init +ffffffff81cabca0 T r420_debugfs_pipes_info_init +ffffffff81cabcd0 t r420_cp_errata_init +ffffffff81cac000 T r520_mc_wait_for_idle +ffffffff81cac0a0 T r520_resume +ffffffff81cac1a0 t r520_startup +ffffffff81cac590 T r520_init +ffffffff81cad000 T r600_rcu_rreg +ffffffff81cad080 T r600_rcu_wreg +ffffffff81cad0f0 T r600_uvd_ctx_rreg +ffffffff81cad170 T r600_uvd_ctx_wreg +ffffffff81cad1e0 T r600_get_allowed_info_register +ffffffff81cad260 T r600_get_xclk +ffffffff81cad290 T r600_set_uvd_clocks +ffffffff81cad7f0 T dce3_program_fmt +ffffffff81cad910 T rv6xx_get_temp +ffffffff81cad960 T r600_pm_get_dynpm_state +ffffffff81cadd70 T rs780_pm_init_profile +ffffffff81cade80 T r600_pm_init_profile +ffffffff81cae120 T r600_pm_misc +ffffffff81cae200 T r600_gui_idle +ffffffff81cae240 T r600_hpd_sense +ffffffff81cae360 T r600_hpd_set_polarity +ffffffff81cae5e0 T r600_hpd_init +ffffffff81cae7c0 T r600_hpd_fini +ffffffff81cae970 T r600_pcie_gart_tlb_flush +ffffffff81caeaa0 T r600_pcie_gart_init +ffffffff81caeb40 T r600_mc_wait_for_idle +ffffffff81caebe0 T rs780_mc_rreg +ffffffff81caec80 T rs780_mc_wreg +ffffffff81caed10 T r600_vram_scratch_init +ffffffff81caee10 t radeon_bo_reserve +ffffffff81caef90 t radeon_bo_unreserve +ffffffff81caf070 T r600_vram_scratch_fini +ffffffff81caf0f0 T r600_set_bios_scratch_engine_hung +ffffffff81caf140 T r600_gpu_check_soft_reset +ffffffff81caf4e0 T r600_asic_reset +ffffffff81caf8a0 t r600_gpu_pci_config_reset +ffffffff81cafab0 T r600_gfx_is_lockup +ffffffff81cafb20 T r6xx_remap_render_backend +ffffffff81cafce0 T r600_count_pipe_bits +ffffffff81cafd50 T r600_pciep_rreg +ffffffff81cafdd0 T r600_pciep_wreg +ffffffff81cafe40 T r600_cp_stop +ffffffff81cafec0 T r600_init_microcode +ffffffff81cb0380 t request_firmware +ffffffff81cb0410 t release_firmware +ffffffff81cb0450 T r600_gfx_get_rptr +ffffffff81cb04b0 T r600_gfx_get_wptr +ffffffff81cb04f0 T r600_gfx_set_wptr +ffffffff81cb0530 T r600_cp_start +ffffffff81cb08a0 T r600_cp_resume +ffffffff81cb0c00 T r600_ring_init +ffffffff81cb0ca0 T r600_cp_fini +ffffffff81cb0d30 T r600_scratch_init +ffffffff81cb0da0 T r600_ring_test +ffffffff81cb1040 T r600_fence_ring_emit +ffffffff81cb18e0 T r600_semaphore_ring_emit +ffffffff81cb1ac0 T r600_copy_cpdma +ffffffff81cb2070 T r600_set_surface_reg +ffffffff81cb20a0 T r600_clear_surface_reg +ffffffff81cb20d0 T r600_vga_set_state +ffffffff81cb2130 T r600_resume +ffffffff81cb21c0 t r600_startup +ffffffff81cb3eb0 T r600_suspend +ffffffff81cb4020 T r600_irq_suspend +ffffffff81cb40e0 t r600_pcie_gart_disable +ffffffff81cb42e0 T r600_init +ffffffff81cb4a60 T r600_ih_ring_init +ffffffff81cb4ad0 T r600_irq_fini +ffffffff81cb4c10 t r600_pcie_gart_fini +ffffffff81cb4c40 T r600_fini +ffffffff81cb4dd0 T r600_ring_ib_execute +ffffffff81cb5260 T r600_ib_test +ffffffff81cb5510 T r600_ih_ring_alloc +ffffffff81cb5630 T r600_ih_ring_fini +ffffffff81cb56c0 T r600_rlc_stop +ffffffff81cb5850 T r600_disable_interrupts +ffffffff81cb5900 T r600_irq_init +ffffffff81cb5d60 t r600_disable_interrupt_state +ffffffff81cb6060 T r600_irq_disable +ffffffff81cb6120 T r600_irq_set +ffffffff81cb68a0 t r600_irq_ack +ffffffff81cb6dd0 T r600_irq_process +ffffffff81cb79d0 T r600_mmio_hdp_flush +ffffffff81cb7a50 T r600_set_pcie_lanes +ffffffff81cb7b80 T r600_get_pcie_lanes +ffffffff81cb7c50 T r600_get_gpu_clock_counter +ffffffff81cb7ce0 t r600_cp_load_microcode +ffffffff81cb7fb0 t r600_uvd_resume +ffffffff81cb9000 T r600_fmt_is_valid_color +ffffffff81cb9040 T r600_fmt_is_valid_texture +ffffffff81cb9090 T r600_fmt_get_blocksize +ffffffff81cb90d0 T r600_fmt_get_nblocksx +ffffffff81cb9120 T r600_fmt_get_nblocksy +ffffffff81cb9180 T r600_cs_common_vline_parse +ffffffff81cb9440 T r600_mip_minify +ffffffff81cb94a0 T r600_cs_parse +ffffffff81cbb380 T r600_dma_cs_next_reloc +ffffffff81cbb400 T r600_dma_cs_parse +ffffffff81cbbab0 t r600_cs_track_check +ffffffff81cbcc40 t r600_cs_check_reg +ffffffff81cbdb70 t r600_is_safe_reg +ffffffff81cbdc10 t r600_texture_size +ffffffff81cbe000 T r600_dma_get_rptr +ffffffff81cbe060 T r600_dma_get_wptr +ffffffff81cbe0a0 T r600_dma_set_wptr +ffffffff81cbe0e0 T r600_dma_stop +ffffffff81cbe170 T r600_dma_resume +ffffffff81cbe370 T r600_dma_fini +ffffffff81cbe3f0 T r600_dma_is_lockup +ffffffff81cbe460 T r600_dma_ring_test +ffffffff81cbe6d0 T r600_dma_fence_ring_emit +ffffffff81cbe8b0 T r600_dma_semaphore_ring_emit +ffffffff81cbe9d0 T r600_dma_ib_test +ffffffff81cbebf0 T r600_dma_ring_ib_execute +ffffffff81cbef40 T r600_copy_dma +ffffffff81cc0000 T r600_dpm_print_class_info +ffffffff81cc02b0 T r600_dpm_print_cap_info +ffffffff81cc0340 T r600_dpm_print_ps_status +ffffffff81cc03d0 T r600_dpm_get_vblank_time +ffffffff81cc0490 T r600_dpm_get_vrefresh +ffffffff81cc0520 T r600_calculate_u_and_p +ffffffff81cc05a0 T r600_calculate_at +ffffffff81cc0650 T r600_gfx_clockgating_enable +ffffffff81cc0750 T r600_dynamicpm_enable +ffffffff81cc07a0 T r600_enable_thermal_protection +ffffffff81cc0800 T r600_enable_acpi_pm +ffffffff81cc0850 T r600_enable_dynamic_pcie_gen2 +ffffffff81cc08a0 T r600_dynamicpm_enabled +ffffffff81cc08e0 T r600_enable_sclk_control +ffffffff81cc0940 T r600_enable_mclk_control +ffffffff81cc09a0 T r600_enable_spll_bypass +ffffffff81cc09f0 T r600_wait_for_spll_change +ffffffff81cc0a70 T r600_set_bsp +ffffffff81cc0ab0 T r600_set_at +ffffffff81cc0b10 T r600_set_tc +ffffffff81cc0b70 T r600_select_td +ffffffff81cc0c20 T r600_set_vrc +ffffffff81cc0c60 T r600_set_tpu +ffffffff81cc0cc0 T r600_set_tpc +ffffffff81cc0d20 T r600_set_sstu +ffffffff81cc0d80 T r600_set_sst +ffffffff81cc0dd0 T r600_set_git +ffffffff81cc0e20 T r600_set_fctu +ffffffff81cc0e80 T r600_set_fct +ffffffff81cc0ed0 T r600_set_ctxcgtt3d_rphc +ffffffff81cc0f30 T r600_set_ctxcgtt3d_rsdc +ffffffff81cc0f90 T r600_set_vddc3d_oorsu +ffffffff81cc0ff0 T r600_set_vddc3d_oorphc +ffffffff81cc1050 T r600_set_vddc3d_oorsdc +ffffffff81cc10b0 T r600_set_mpll_lock_time +ffffffff81cc1100 T r600_set_mpll_reset_time +ffffffff81cc1150 T r600_engine_clock_entry_enable +ffffffff81cc1250 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81cc1350 T r600_engine_clock_entry_enable_post_divider +ffffffff81cc1450 T r600_engine_clock_entry_set_post_divider +ffffffff81cc1510 T r600_engine_clock_entry_set_reference_divider +ffffffff81cc15d0 T r600_engine_clock_entry_set_feedback_divider +ffffffff81cc1690 T r600_engine_clock_entry_set_step_time +ffffffff81cc1750 T r600_vid_rt_set_ssu +ffffffff81cc17b0 T r600_vid_rt_set_vru +ffffffff81cc1810 T r600_vid_rt_set_vrt +ffffffff81cc1870 T r600_voltage_control_enable_pins +ffffffff81cc18c0 T r600_voltage_control_program_voltages +ffffffff81cc1950 T r600_voltage_control_deactivate_static_control +ffffffff81cc19e0 T r600_power_level_enable +ffffffff81cc1a50 T r600_power_level_set_voltage_index +ffffffff81cc1ac0 T r600_power_level_set_mem_clock_index +ffffffff81cc1b20 T r600_power_level_set_eng_clock_index +ffffffff81cc1b90 T r600_power_level_set_watermark_id +ffffffff81cc1c00 T r600_power_level_set_pcie_gen2 +ffffffff81cc1c60 T r600_power_level_get_current_index +ffffffff81cc1ca0 T r600_power_level_get_target_index +ffffffff81cc1ce0 T r600_power_level_set_enter_index +ffffffff81cc1d40 T r600_wait_for_power_level_unequal +ffffffff81cc1e30 T r600_wait_for_power_level +ffffffff81cc1f20 T r600_start_dpm +ffffffff81cc2200 T r600_stop_dpm +ffffffff81cc2250 T r600_dpm_pre_set_power_state +ffffffff81cc2280 T r600_dpm_post_set_power_state +ffffffff81cc22b0 T r600_is_uvd_state +ffffffff81cc22f0 T r600_is_internal_thermal_sensor +ffffffff81cc2330 T r600_dpm_late_enable +ffffffff81cc2440 T r600_get_platform_caps +ffffffff81cc24e0 T r600_parse_extended_power_table +ffffffff81cc32a0 T r600_free_extended_power_table +ffffffff81cc33a0 T r600_get_pcie_gen_support +ffffffff81cc33f0 T r600_get_pcie_lane_support +ffffffff81cc3450 T r600_encode_pci_lane_width +ffffffff81cc4000 T r600_audio_update_hdmi +ffffffff81cc4170 t r600_audio_status +ffffffff81cc4290 T r600_hdmi_buffer_status_changed +ffffffff81cc4330 T r600_hdmi_update_audio_settings +ffffffff81cc4700 T r600_audio_enable +ffffffff81cc4780 T r600_audio_get_pin +ffffffff81cc47b0 T r600_hdmi_update_acr +ffffffff81cc4b50 T r600_set_avi_packet +ffffffff81cc4d50 T r600_hdmi_audio_workaround +ffffffff81cc4e20 T r600_hdmi_audio_set_dto +ffffffff81cc4ee0 T r600_set_vbi_packet +ffffffff81cc4fa0 T r600_set_audio_packet +ffffffff81cc5270 T r600_set_mute +ffffffff81cc5380 T r600_hdmi_enable +ffffffff81cc6000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81cc6040 T radeon_acpi_pcie_notify_device_ready +ffffffff81cc6160 T radeon_acpi_pcie_performance_request +ffffffff81cc64f0 T radeon_acpi_init +ffffffff81cc6c60 t radeon_acpi_event +ffffffff81cc6f60 T radeon_acpi_fini +ffffffff81cc7000 T radeon_agp_head_init +ffffffff81cc7050 T radeon_agp_init +ffffffff81cc70a0 T radeon_agp_resume +ffffffff81cc7140 T radeon_agp_fini +ffffffff81cc7190 T radeon_agp_suspend +ffffffff81cc8000 T radeon_agp_disable +ffffffff81cc8120 T radeon_asic_init +ffffffff81cc88f0 t radeon_invalid_rreg +ffffffff81cc8930 t radeon_invalid_wreg +ffffffff81cc8970 t radeon_invalid_get_allowed_info_register +ffffffff81cc9000 T radeon_atombios_i2c_init +ffffffff81cc93a0 T radeon_atombios_lookup_gpio +ffffffff81cc94a0 T radeon_get_atom_connector_info_from_object_table +ffffffff81cc9de0 t radeon_lookup_i2c_gpio +ffffffff81cca0d0 t radeon_atom_apply_quirks +ffffffff81cca4f0 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81cca9f0 T radeon_atom_get_clock_info +ffffffff81ccadd0 T radeon_atombios_sideport_present +ffffffff81ccae80 T radeon_atombios_get_tmds_info +ffffffff81ccafc0 T radeon_atombios_get_ppll_ss_info +ffffffff81ccb0e0 T radeon_atombios_get_asic_ss_info +ffffffff81ccb3c0 t radeon_atombios_get_igp_ss_overrides +ffffffff81ccb4d0 T radeon_atombios_get_lvds_info +ffffffff81ccb830 T radeon_atombios_get_primary_dac_info +ffffffff81ccb8f0 T radeon_atom_get_tv_timings +ffffffff81ccbb30 T radeon_atombios_get_tv_info +ffffffff81ccbbf0 T radeon_atombios_get_tv_dac_info +ffffffff81ccbcf0 T radeon_atombios_get_default_voltages +ffffffff81ccbdb0 T radeon_atombios_get_power_modes +ffffffff81ccce20 T radeon_atom_get_clock_dividers +ffffffff81ccd110 T radeon_atom_get_memory_pll_dividers +ffffffff81ccd250 T radeon_atom_set_clock_gating +ffffffff81ccd2a0 T radeon_atom_get_engine_clock +ffffffff81ccd2f0 T radeon_atom_get_memory_clock +ffffffff81ccd340 T radeon_atom_set_engine_clock +ffffffff81ccd390 T radeon_atom_set_memory_clock +ffffffff81ccd3f0 T radeon_atom_set_engine_dram_timings +ffffffff81ccd460 T radeon_atom_update_memory_dll +ffffffff81ccd4b0 T radeon_atom_set_ac_timing +ffffffff81ccd500 T radeon_atom_set_voltage +ffffffff81ccd5d0 T radeon_atom_get_max_vddc +ffffffff81ccd6b0 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81ccd780 T radeon_atom_get_leakage_id_from_vbios +ffffffff81ccd840 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81ccda60 T radeon_atom_get_voltage_evv +ffffffff81ccdb20 T radeon_atom_get_voltage_gpio_settings +ffffffff81ccdc20 T radeon_atom_is_voltage_gpio +ffffffff81ccddb0 T radeon_atom_get_svi2_info +ffffffff81ccdea0 T radeon_atom_get_max_voltage +ffffffff81cce030 T radeon_atom_get_min_voltage +ffffffff81cce170 T radeon_atom_get_voltage_step +ffffffff81cce270 T radeon_atom_round_to_true_voltage +ffffffff81cce3d0 T radeon_atom_get_voltage_table +ffffffff81cce640 T radeon_atom_get_memory_info +ffffffff81cce7f0 T radeon_atom_get_mclk_range_table +ffffffff81ccea30 T radeon_atom_init_mc_reg_table +ffffffff81cceca0 T radeon_atom_initialize_bios_scratch_regs +ffffffff81cced70 T radeon_save_bios_scratch_regs +ffffffff81ccee50 T radeon_restore_bios_scratch_regs +ffffffff81ccef30 T radeon_atom_output_lock +ffffffff81ccefc0 T radeon_atombios_connected_scratch_regs +ffffffff81ccf730 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81ccf880 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81ccfab0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81ccfc90 t radeon_atombios_add_pplib_thermal_controller +ffffffff81cd0090 t radeon_atombios_parse_pplib_clock_info +ffffffff81cd0440 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81cd1000 T radeon_audio_init +ffffffff81cd11f0 t radeon_audio_enable +ffffffff81cd1350 T radeon_audio_endpoint_rreg +ffffffff81cd1390 T radeon_audio_endpoint_wreg +ffffffff81cd13d0 T radeon_audio_get_pin +ffffffff81cd1420 T radeon_audio_detect +ffffffff81cd1580 T radeon_audio_fini +ffffffff81cd1610 T radeon_audio_mode_set +ffffffff81cd1660 T radeon_audio_dpms +ffffffff81cd16b0 T radeon_audio_decode_dfs_div +ffffffff81cd1710 T radeon_audio_component_init +ffffffff81cd1780 T radeon_audio_component_fini +ffffffff81cd17d0 t radeon_audio_hdmi_mode_set +ffffffff81cd1eb0 t radeon_audio_write_speaker_allocation +ffffffff81cd1f60 t radeon_audio_write_sad_regs +ffffffff81cd2030 t radeon_audio_set_avi_packet +ffffffff81cd2170 t radeon_audio_dp_mode_set +ffffffff81cd22f0 t radeon_audio_rreg +ffffffff81cd2340 t radeon_audio_wreg +ffffffff81cd3000 T radeon_benchmark +ffffffff81cd3940 t radeon_benchmark_move +ffffffff81cd3c20 t radeon_bo_reserve +ffffffff81cd3da0 t radeon_bo_unreserve +ffffffff81cd3e80 t radeon_benchmark_do_move +ffffffff81cd4000 T radeon_get_bios +ffffffff81cd4fc0 t igp_read_bios_from_vram +ffffffff81cd50d0 t radeon_read_bios +ffffffff81cd6000 T radeon_legacy_get_engine_clock +ffffffff81cd60d0 T radeon_legacy_get_memory_clock +ffffffff81cd61a0 T radeon_get_clock_info +ffffffff81cd6730 T radeon_legacy_set_engine_clock +ffffffff81cd6a80 T radeon_legacy_set_clock_gating +ffffffff81cd8000 T radeon_combios_check_hardcoded_edid +ffffffff81cd8100 t combios_get_table_offset +ffffffff81cd8690 T radeon_bios_get_hardcoded_edid +ffffffff81cd8710 T radeon_combios_i2c_init +ffffffff81cd8db0 t combios_setup_i2c_bus +ffffffff81cd90a0 t radeon_combios_get_i2c_info_from_table +ffffffff81cd92f0 T radeon_combios_get_clock_info +ffffffff81cd94e0 T radeon_combios_sideport_present +ffffffff81cd9560 T radeon_combios_get_primary_dac_info +ffffffff81cd96b0 T radeon_combios_get_tv_info +ffffffff81cd97b0 T radeon_combios_get_tv_dac_info +ffffffff81cd9a40 T radeon_combios_get_lvds_info +ffffffff81cda0b0 T radeon_legacy_get_tmds_info_from_table +ffffffff81cda180 T radeon_legacy_get_tmds_info_from_combios +ffffffff81cda390 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81cda5c0 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81cda900 T radeon_get_legacy_connector_info_from_table +ffffffff81cdca70 T radeon_get_legacy_connector_info_from_bios +ffffffff81cdd660 T radeon_combios_get_power_modes +ffffffff81cddd30 T radeon_external_tmds_setup +ffffffff81cdde00 T radeon_combios_external_tmds_setup +ffffffff81cde380 T radeon_combios_asic_init +ffffffff81cde8d0 t combios_parse_mmio_table +ffffffff81cdeaf0 t combios_parse_pll_table +ffffffff81cdedc0 T radeon_combios_initialize_bios_scratch_regs +ffffffff81cdee50 T radeon_combios_output_lock +ffffffff81cdeeb0 T radeon_combios_connected_scratch_regs +ffffffff81cdf210 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81cdf2f0 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81ce0000 T radeon_connector_hotplug +ffffffff81ce0100 T radeon_get_monitor_bpc +ffffffff81ce0550 T radeon_connector_edid +ffffffff81ce0600 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81ce0680 T radeon_connector_is_dp12_capable +ffffffff81ce0720 T radeon_add_atom_connector +ffffffff81ce15d0 T radeon_add_legacy_connector +ffffffff81ce1ac0 t radeon_dp_detect +ffffffff81ce1e60 t radeon_dvi_force +ffffffff81ce1eb0 t radeon_connector_set_property +ffffffff81ce26f0 t radeon_connector_unregister +ffffffff81ce2750 t radeon_connector_destroy +ffffffff81ce27c0 t radeon_best_single_encoder +ffffffff81ce2830 t radeon_connector_get_edid +ffffffff81ce2990 t radeon_dp_get_modes +ffffffff81ce2c90 t radeon_dp_mode_valid +ffffffff81ce2e60 t radeon_dvi_encoder +ffffffff81ce2f20 t radeon_fixup_lvds_native_mode +ffffffff81ce3060 t radeon_add_common_modes +ffffffff81ce3150 t radeon_fp_native_mode +ffffffff81ce3230 t radeon_lvds_set_property +ffffffff81ce3320 t radeon_vga_detect +ffffffff81ce35c0 t radeon_connector_analog_encoder_conflict_solve +ffffffff81ce37e0 t radeon_vga_get_modes +ffffffff81ce38c0 t radeon_vga_mode_valid +ffffffff81ce3920 t radeon_dvi_detect +ffffffff81ce3f80 t radeon_dvi_mode_valid +ffffffff81ce4100 t radeon_tv_detect +ffffffff81ce4340 t radeon_tv_get_modes +ffffffff81ce4420 t radeon_tv_mode_valid +ffffffff81ce4470 t radeon_lvds_detect +ffffffff81ce4610 t radeon_lvds_get_modes +ffffffff81ce4750 t radeon_lvds_mode_valid +ffffffff81ce5000 T radeon_cs_parser_init +ffffffff81ce5490 T radeon_cs_ioctl +ffffffff81ce5c70 t radeon_cs_parser_fini +ffffffff81ce5df0 t radeon_cs_ib_vm_chunk +ffffffff81ce6130 T radeon_cs_packet_parse +ffffffff81ce62e0 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81ce6340 T radeon_cs_dump_packet +ffffffff81ce63c0 T radeon_cs_packet_next_reloc +ffffffff81ce65a0 t cmp_size_smaller_first +ffffffff81ce7000 T radeon_crtc_cursor_move +ffffffff81ce7070 t radeon_lock_cursor +ffffffff81ce7230 t radeon_cursor_move_locked +ffffffff81ce7770 T radeon_crtc_cursor_set2 +ffffffff81ce7a00 t radeon_hide_cursor +ffffffff81ce7ac0 t radeon_bo_reserve +ffffffff81ce7c40 t radeon_bo_unreserve +ffffffff81ce7d20 t radeon_show_cursor +ffffffff81ce7f70 T radeon_cursor_reset +ffffffff81ce8000 T radeon_is_px +ffffffff81ce8040 T radeon_program_register_sequence +ffffffff81ce8170 T radeon_pci_config_reset +ffffffff81ce81a0 T radeon_surface_init +ffffffff81ce8360 T radeon_scratch_init +ffffffff81ce83e0 T radeon_scratch_get +ffffffff81ce8460 T radeon_scratch_free +ffffffff81ce84c0 T radeon_doorbell_get +ffffffff81ce8570 T radeon_doorbell_free +ffffffff81ce85c0 T radeon_wb_disable +ffffffff81ce85f0 T radeon_wb_fini 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radeon_suspend_kms +ffffffff81cea6c0 T radeon_resume_kms +ffffffff81cea900 T radeon_gpu_reset +ffffffff81ceb000 T radeon_crtc_load_lut +ffffffff81cebe60 T radeon_crtc_handle_vblank +ffffffff81cebfd0 T radeon_get_crtc_scanoutpos +ffffffff81cec5a0 T radeon_crtc_handle_flip +ffffffff81cec6d0 T radeon_compute_pll_avivo +ffffffff81cecc30 T radeon_compute_pll_legacy +ffffffff81ced300 T radeon_framebuffer_init +ffffffff81ced380 T radeon_update_display_priority +ffffffff81ced3e0 T radeon_modeset_init +ffffffff81cedec0 T radeon_modeset_fini +ffffffff81cee010 T radeon_crtc_scaling_mode_fixup +ffffffff81cee390 T radeon_get_crtc_scanout_position +ffffffff81cee400 t radeon_user_framebuffer_create +ffffffff81cee5a0 t radeon_crtc_gamma_set +ffffffff81cee5e0 t radeon_crtc_destroy +ffffffff81cee620 t radeon_crtc_set_config +ffffffff81cee6f0 t radeon_crtc_page_flip_target +ffffffff81ceeb90 t radeon_flip_work_func +ffffffff81ceedb0 t radeon_unpin_work_func +ffffffff81ceee30 t radeon_bo_reserve +ffffffff81ceefb0 t radeon_bo_unreserve +ffffffff81cf0000 T radeon_dp_aux_transfer_native +ffffffff81cf1000 T radeondrm_probe +ffffffff81cf1060 T radeondrm_attach_kms +ffffffff81cf17a0 T radeondrm_detach_kms +ffffffff81cf1830 T radeondrm_activate_kms +ffffffff81cf18f0 T radeondrm_wsioctl +ffffffff81cf19b0 T radeondrm_wsmmap +ffffffff81cf19e0 T radeondrm_alloc_screen +ffffffff81cf1a10 T radeondrm_free_screen +ffffffff81cf1a20 T radeondrm_show_screen +ffffffff81cf1b10 T radeondrm_enter_ddb +ffffffff81cf1b70 T radeondrm_doswitch +ffffffff81cf1c10 T radeondrm_setpal +ffffffff81cf1e30 T radeondrm_attachhook +ffffffff81cf2170 T radeondrm_forcedetach +ffffffff81cf3000 T radeon_setup_encoder_clones +ffffffff81cf30b0 T radeon_get_encoder_enum +ffffffff81cf3230 T radeon_link_encoder_connector +ffffffff81cf3380 T radeon_encoder_set_active_device +ffffffff81cf3440 T radeon_get_connector_for_encoder +ffffffff81cf34b0 T radeon_get_connector_for_encoder_init +ffffffff81cf3520 T radeon_get_external_encoder +ffffffff81cf35b0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81cf3650 T radeon_panel_mode_fixup +ffffffff81cf3820 T radeon_dig_monitor_is_duallink +ffffffff81cf3940 T radeon_encoder_is_digital +ffffffff81cf4000 T radeon_fbdev_setup +ffffffff81cf4150 T radeon_fbdev_set_suspend +ffffffff81cf41a0 T radeon_fbdev_robj_is_fb +ffffffff81cf4210 T radeondrm_burner +ffffffff81cf4290 T radeondrm_burner_cb +ffffffff81cf42c0 t radeon_fbdev_fb_helper_fb_probe +ffffffff81cf4800 t radeon_bo_reserve +ffffffff81cf4980 t radeon_bo_unreserve +ffffffff81cf4a60 t radeon_fbdev_client_unregister +ffffffff81cf4ac0 t radeon_fbdev_client_restore +ffffffff81cf4b00 t radeon_fbdev_client_hotplug +ffffffff81cf5000 T radeon_fence_emit +ffffffff81cf5120 T radeon_fence_process +ffffffff81cf51e0 t radeon_fence_activity +ffffffff81cf5450 T radeon_fence_signaled +ffffffff81cf54c0 t radeon_fence_seq_signaled +ffffffff81cf55b0 T radeon_fence_wait_timeout +ffffffff81cf56e0 t radeon_fence_wait_seq_timeout +ffffffff81cf5b50 T radeon_fence_wait +ffffffff81cf5c80 T radeon_fence_wait_any +ffffffff81cf5dc0 T radeon_fence_wait_next +ffffffff81cf5e80 T radeon_fence_wait_empty +ffffffff81cf5f90 T radeon_fence_ref +ffffffff81cf5fd0 T radeon_fence_unref +ffffffff81cf6010 T radeon_fence_count_emitted +ffffffff81cf6110 T radeon_fence_need_sync +ffffffff81cf6170 T radeon_fence_note_sync +ffffffff81cf6340 T radeon_fence_driver_start_ring +ffffffff81cf6520 T radeon_fence_driver_init +ffffffff81cf6660 T radeon_debugfs_fence_init +ffffffff81cf6690 T radeon_fence_driver_fini +ffffffff81cf68c0 T radeon_fence_driver_force_completion +ffffffff81cf69b0 t radeon_fence_get_driver_name +ffffffff81cf69e0 t radeon_fence_get_timeline_name +ffffffff81cf6a80 t radeon_fence_enable_signaling +ffffffff81cf6c90 t radeon_fence_is_signaled +ffffffff81cf6dd0 t radeon_fence_default_wait +ffffffff81cf6f40 t radeon_fence_any_seq_signaled +ffffffff81cf7080 t radeon_fence_check_lockup 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radeon_gem_object_close +ffffffff81cf95d0 t radeon_gem_object_mmap +ffffffff81cf9670 T radeon_gem_info_ioctl +ffffffff81cf96e0 T radeon_gem_create_ioctl +ffffffff81cf9800 T radeon_gem_userptr_ioctl +ffffffff81cf9830 T radeon_gem_set_domain_ioctl +ffffffff81cf9990 T radeon_mode_dumb_mmap +ffffffff81cf9a40 T radeon_gem_mmap_ioctl +ffffffff81cf9b00 T radeon_gem_busy_ioctl +ffffffff81cf9bb0 T radeon_gem_wait_idle_ioctl +ffffffff81cf9cc0 T radeon_gem_set_tiling_ioctl +ffffffff81cf9d70 T radeon_gem_get_tiling_ioctl +ffffffff81cf9e40 t radeon_bo_reserve +ffffffff81cfa040 t radeon_bo_unreserve +ffffffff81cfa120 T radeon_gem_va_ioctl +ffffffff81cfa3d0 t radeon_gem_va_update_vm +ffffffff81cfa520 T radeon_gem_op_ioctl +ffffffff81cfa620 T radeon_align_pitch +ffffffff81cfa6b0 T radeon_mode_dumb_create +ffffffff81cfa800 T radeon_gem_debugfs_init +ffffffff81cfb000 T radeon_ddc_probe +ffffffff81cfb0c0 T radeon_router_select_ddc_port +ffffffff81cfb320 T radeon_bb_set_bits +ffffffff81cfb490 T radeon_bb_set_dir +ffffffff81cfb4c0 T radeon_bb_read_bits +ffffffff81cfb5a0 T radeon_acquire_bus +ffffffff81cfb9f0 T radeon_release_bus +ffffffff81cfbb60 T radeon_send_start +ffffffff81cfbb80 T radeon_send_stop +ffffffff81cfbba0 T radeon_initiate_xfer +ffffffff81cfbbc0 T radeon_read_byte +ffffffff81cfbbe0 T radeon_write_byte +ffffffff81cfbc00 T radeon_i2c_create +ffffffff81cfbe10 T radeon_i2c_destroy +ffffffff81cfbe90 T radeon_i2c_init +ffffffff81cfbee0 T radeon_i2c_fini +ffffffff81cfbf90 T radeon_i2c_add +ffffffff81cfc140 T radeon_i2c_lookup +ffffffff81cfc310 T radeon_i2c_get_byte +ffffffff81cfc3e0 T radeon_i2c_put_byte +ffffffff81cfc470 T radeon_router_select_cd_port +ffffffff81cfc6d0 t radeon_hw_i2c_xfer +ffffffff81cfd270 t radeon_hw_i2c_func +ffffffff81cfd2a0 t r100_hw_i2c_xfer +ffffffff81cfd960 t radeon_get_i2c_prescale +ffffffff81cfe000 T radeon_ib_get +ffffffff81cfe100 T radeon_ib_free +ffffffff81cfe140 T radeon_ib_schedule +ffffffff81cfe3d0 T radeon_ib_pool_init +ffffffff81cfe470 T radeon_ib_pool_fini +ffffffff81cfe4e0 T radeon_ib_ring_tests +ffffffff81cff000 T radeon_driver_irq_handler_kms +ffffffff81cff050 T radeon_msi_ok +ffffffff81cff150 T radeon_irq_kms_init +ffffffff81cff3e0 t radeon_hotplug_work_func +ffffffff81cff490 t radeon_dp_work_func +ffffffff81cff500 T radeon_irq_kms_fini +ffffffff81cff6a0 T radeon_irq_kms_sw_irq_get +ffffffff81cff740 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81cff780 T radeon_irq_kms_sw_irq_put +ffffffff81cff810 T radeon_irq_kms_pflip_irq_get +ffffffff81cff8c0 T radeon_irq_kms_pflip_irq_put +ffffffff81cff960 T radeon_irq_kms_enable_afmt +ffffffff81cff9f0 T radeon_irq_kms_disable_afmt +ffffffff81cffa80 T radeon_irq_kms_enable_hpd +ffffffff81cffb70 T radeon_irq_kms_disable_hpd +ffffffff81cffc50 T radeon_irq_kms_set_irq_n_enabled +ffffffff81cffdc0 t __delayed_work_tick +ffffffff81d00000 T radeon_info_ioctl +ffffffff81d00af0 t radeon_set_filp_rights +ffffffff81d00b80 T radeon_driver_open_kms +ffffffff81d00cb0 t radeon_bo_reserve +ffffffff81d00e30 T radeon_driver_postclose_kms +ffffffff81d01050 T radeon_get_vblank_counter_kms +ffffffff81d01200 T radeon_enable_vblank_kms +ffffffff81d012b0 T radeon_disable_vblank_kms +ffffffff81d02000 T radeon_crtc_set_base +ffffffff81d02020 T radeon_crtc_do_set_base +ffffffff81d02590 T radeon_crtc_set_base_atomic +ffffffff81d025b0 t radeon_bo_reserve +ffffffff81d02730 t radeon_bo_unreserve +ffffffff81d02810 T radeon_legacy_init_crtc +ffffffff81d02860 t radeon_crtc_dpms +ffffffff81d02a50 t radeon_crtc_prepare +ffffffff81d02ad0 t radeon_crtc_commit +ffffffff81d02b40 t radeon_crtc_mode_fixup +ffffffff81d02b60 t radeon_crtc_mode_set +ffffffff81d03fd0 t radeon_crtc_disable +ffffffff81d05000 T radeon_legacy_get_backlight_level +ffffffff81d05050 T radeon_legacy_set_backlight_level +ffffffff81d050a0 t radeon_legacy_lvds_update +ffffffff81d053e0 T radeon_legacy_backlight_init +ffffffff81d055b0 t radeon_legacy_backlight_get_brightness +ffffffff81d05610 T radeon_add_legacy_encoder +ffffffff81d05970 t radeon_legacy_backlight_update_status +ffffffff81d05a10 t radeon_lvds_enc_destroy +ffffffff81d05aa0 t radeon_legacy_lvds_dpms +ffffffff81d05af0 t radeon_legacy_mode_fixup +ffffffff81d05b60 t radeon_legacy_lvds_prepare +ffffffff81d05bf0 t radeon_legacy_lvds_commit +ffffffff81d05c70 t radeon_legacy_lvds_mode_set +ffffffff81d05e80 t radeon_legacy_encoder_disable +ffffffff81d05ed0 t radeon_legacy_tmds_int_dpms +ffffffff81d05f90 t radeon_legacy_tmds_int_prepare +ffffffff81d06060 t radeon_legacy_tmds_int_commit +ffffffff81d06130 t radeon_legacy_tmds_int_mode_set +ffffffff81d06390 t radeon_legacy_primary_dac_dpms +ffffffff81d064d0 t radeon_legacy_primary_dac_prepare +ffffffff81d06530 t radeon_legacy_primary_dac_commit +ffffffff81d06580 t radeon_legacy_primary_dac_mode_set +ffffffff81d06710 t radeon_legacy_primary_dac_detect +ffffffff81d06900 t radeon_legacy_tv_dac_dpms +ffffffff81d06b10 t radeon_legacy_tv_dac_prepare +ffffffff81d06b70 t radeon_legacy_tv_dac_commit +ffffffff81d06bc0 t radeon_legacy_tv_dac_mode_set +ffffffff81d06f60 t radeon_legacy_tv_dac_detect +ffffffff81d07b60 t radeon_ext_tmds_enc_destroy +ffffffff81d07bb0 t radeon_legacy_tmds_ext_dpms +ffffffff81d07c80 t radeon_legacy_tmds_ext_prepare +ffffffff81d07d50 t radeon_legacy_tmds_ext_commit +ffffffff81d07e20 t radeon_legacy_tmds_ext_mode_set +ffffffff81d08000 T radeon_legacy_tv_mode_set +ffffffff81d090f0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81d09200 T radeon_legacy_tv_adjust_pll1 +ffffffff81d09300 T radeon_legacy_tv_adjust_pll2 +ffffffff81d0a000 T radeon_ttm_bo_is_radeon_bo +ffffffff81d0a040 t radeon_ttm_bo_destroy +ffffffff81d0a170 T radeon_ttm_placement_from_domain +ffffffff81d0a2d0 T radeon_bo_create +ffffffff81d0a4a0 T radeon_bo_kmap +ffffffff81d0a590 T radeon_bo_check_tiling +ffffffff81d0a670 T radeon_bo_kunmap +ffffffff81d0a700 T radeon_bo_ref +ffffffff81d0a740 T radeon_bo_unref +ffffffff81d0a790 T radeon_bo_pin_restricted +ffffffff81d0aac0 T radeon_bo_pin +ffffffff81d0aae0 T radeon_bo_unpin +ffffffff81d0ab50 T radeon_bo_evict_vram +ffffffff81d0abb0 T radeon_bo_force_delete +ffffffff81d0ad20 T radeon_bo_init +ffffffff81d0ae00 T radeon_bo_fini +ffffffff81d0ae40 T radeon_bo_list_validate +ffffffff81d0b150 T radeon_bo_get_surface_reg +ffffffff81d0b3d0 T radeon_bo_set_tiling_flags +ffffffff81d0b6e0 T radeon_bo_get_tiling_flags +ffffffff81d0b730 T radeon_bo_move_notify +ffffffff81d0b800 T radeon_bo_fault_reserve_notify +ffffffff81d0ba90 t ttm_bo_move_to_lru_tail_unlocked +ffffffff81d0bad0 T radeon_bo_fence +ffffffff81d0c000 T radeon_pm_get_type_index +ffffffff81d0c080 T radeon_pm_acpi_event_handler +ffffffff81d0c160 t radeon_pm_update_profile +ffffffff81d0c280 t radeon_pm_set_clocks +ffffffff81d0cc50 T radeon_dpm_enable_uvd +ffffffff81d0cd10 T radeon_pm_compute_clocks +ffffffff81d0d720 T radeon_dpm_enable_vce +ffffffff81d0d790 T radeon_pm_suspend +ffffffff81d0d890 T radeon_pm_resume +ffffffff81d0db80 T radeon_pm_init +ffffffff81d0e290 T radeon_pm_late_init +ffffffff81d0e350 T radeon_pm_fini +ffffffff81d0e470 t radeon_dpm_thermal_work_handler +ffffffff81d0e550 t radeon_dynpm_idle_work_handler +ffffffff81d0e7d0 t __delayed_work_tick +ffffffff81d0f000 T radeon_gem_prime_get_sg_table +ffffffff81d0f030 T radeon_gem_prime_pin +ffffffff81d0f0c0 t radeon_bo_reserve +ffffffff81d0f240 t radeon_bo_unreserve +ffffffff81d0f320 T radeon_gem_prime_unpin +ffffffff81d0f3a0 T radeon_gem_prime_export +ffffffff81d10000 T radeon_ring_supports_scratch_reg +ffffffff81d10030 T radeon_ring_free_size +ffffffff81d100e0 T radeon_ring_lockup_update +ffffffff81d10140 T radeon_ring_alloc +ffffffff81d102c0 T radeon_ring_lock +ffffffff81d10340 T radeon_ring_commit +ffffffff81d10440 T radeon_ring_unlock_commit +ffffffff81d10470 T radeon_ring_undo +ffffffff81d104a0 T radeon_ring_unlock_undo +ffffffff81d104c0 T radeon_ring_test_lockup +ffffffff81d105e0 T radeon_ring_backup +ffffffff81d10780 T radeon_ring_restore +ffffffff81d10930 T radeon_ring_init +ffffffff81d10b20 t radeon_bo_reserve +ffffffff81d10ca0 t radeon_bo_unreserve +ffffffff81d10d80 T radeon_ring_fini +ffffffff81d11000 T radeon_sa_bo_manager_init +ffffffff81d110d0 T radeon_sa_bo_manager_fini +ffffffff81d11100 T radeon_sa_bo_manager_start +ffffffff81d11240 t radeon_bo_reserve +ffffffff81d113c0 t radeon_bo_unreserve +ffffffff81d114a0 T radeon_sa_bo_manager_suspend +ffffffff81d11550 T radeon_sa_bo_new +ffffffff81d115c0 T radeon_sa_bo_free +ffffffff81d12000 T radeon_semaphore_create +ffffffff81d120e0 T radeon_semaphore_emit_signal +ffffffff81d12170 T radeon_semaphore_emit_wait +ffffffff81d12200 T radeon_semaphore_free +ffffffff81d13000 T radeon_sync_create +ffffffff81d13090 T radeon_sync_fence +ffffffff81d13140 T radeon_sync_resv +ffffffff81d13280 T radeon_sync_rings +ffffffff81d13440 T radeon_sync_free +ffffffff81d14000 T radeon_test_moves +ffffffff81d14070 t radeon_do_test_moves +ffffffff81d14680 T radeon_test_ring_sync +ffffffff81d14950 t radeon_test_create_and_emit_fence +ffffffff81d14ac0 T radeon_test_syncing +ffffffff81d14d90 t radeon_test_ring_sync2 +ffffffff81d15100 t radeon_bo_reserve +ffffffff81d15280 t radeon_bo_unreserve +ffffffff81d16000 T radeon_get_rdev +ffffffff81d16030 T radeon_ttm_tt_set_userptr +ffffffff81d16080 T radeon_ttm_tt_is_bound +ffffffff81d160d0 T radeon_ttm_tt_has_userptr +ffffffff81d16120 T radeon_ttm_tt_is_readonly +ffffffff81d16170 T radeon_ttm_init +ffffffff81d16390 T radeon_ttm_set_active_vram_size +ffffffff81d163d0 t radeon_bo_reserve +ffffffff81d16550 t radeon_bo_unreserve +ffffffff81d16630 T radeon_ttm_fini +ffffffff81d16700 t radeon_ttm_tt_create +ffffffff81d167e0 t radeon_ttm_tt_populate +ffffffff81d16890 t radeon_ttm_tt_unpopulate +ffffffff81d16980 t radeon_ttm_tt_destroy +ffffffff81d169d0 t radeon_evict_flags +ffffffff81d16b30 t radeon_bo_move +ffffffff81d16f30 t radeon_ttm_io_mem_reserve +ffffffff81d17000 T radeon_ucode_print_mc_hdr +ffffffff81d170b0 t radeon_ucode_print_common_hdr +ffffffff81d171e0 T radeon_ucode_print_smc_hdr +ffffffff81d17270 T radeon_ucode_print_gfx_hdr +ffffffff81d17340 T radeon_ucode_print_rlc_hdr +ffffffff81d17440 T radeon_ucode_print_sdma_hdr +ffffffff81d17520 T radeon_ucode_validate +ffffffff81d18000 T radeon_uvd_init +ffffffff81d18500 t radeon_uvd_idle_work_handler +ffffffff81d18670 t radeon_bo_reserve +ffffffff81d18870 t radeon_bo_unreserve +ffffffff81d18950 T radeon_uvd_fini +ffffffff81d18a20 T radeon_uvd_suspend +ffffffff81d18be0 T radeon_uvd_note_usage +ffffffff81d18e20 T radeon_uvd_get_destroy_msg +ffffffff81d18f30 T radeon_uvd_resume +ffffffff81d18fc0 T radeon_uvd_force_into_uvd_segment +ffffffff81d19060 T radeon_uvd_free_handles +ffffffff81d19220 T radeon_uvd_cs_parse +ffffffff81d19940 T radeon_uvd_get_create_msg +ffffffff81d19ac0 t radeon_uvd_send_msg +ffffffff81d19c60 T radeon_uvd_calc_upll_dividers +ffffffff81d19e30 T radeon_uvd_send_upll_ctlreq +ffffffff81d1a170 t __delayed_work_tick +ffffffff81d1b000 T radeon_vce_init +ffffffff81d1b640 t radeon_vce_idle_work_handler +ffffffff81d1b700 t radeon_bo_reserve +ffffffff81d1b880 t radeon_bo_unreserve +ffffffff81d1b960 T radeon_vce_fini +ffffffff81d1b9e0 T radeon_vce_suspend +ffffffff81d1bac0 T radeon_vce_resume +ffffffff81d1bc10 T radeon_vce_note_usage +ffffffff81d1bd30 T radeon_vce_free_handles +ffffffff81d1bdf0 T radeon_vce_get_destroy_msg +ffffffff81d1c020 T radeon_vce_get_create_msg +ffffffff81d1c370 T radeon_vce_cs_reloc +ffffffff81d1c470 T radeon_vce_cs_parse +ffffffff81d1cbe0 T radeon_vce_semaphore_emit +ffffffff81d1cda0 T radeon_vce_ib_execute +ffffffff81d1cf30 T radeon_vce_fence_emit +ffffffff81d1d160 T radeon_vce_ring_test +ffffffff81d1d2b0 T radeon_vce_ib_test +ffffffff81d1d3d0 t __delayed_work_tick +ffffffff81d1e000 T radeon_vm_manager_init +ffffffff81d1e060 T radeon_vm_manager_fini +ffffffff81d1e180 T radeon_vm_get_bos +ffffffff81d1e2d0 T radeon_vm_grab_id +ffffffff81d1e460 T radeon_vm_flush +ffffffff81d1e5f0 T radeon_vm_fence +ffffffff81d1e6a0 T radeon_vm_bo_find +ffffffff81d1e6f0 T radeon_vm_bo_add +ffffffff81d1e7e0 T radeon_vm_bo_set_addr +ffffffff81d1ec30 t radeon_bo_unreserve +ffffffff81d1ed10 t radeon_vm_clear_bo +ffffffff81d1ef00 T radeon_vm_map_gart +ffffffff81d1ef40 T radeon_vm_update_page_directory +ffffffff81d1f2c0 T radeon_vm_bo_update +ffffffff81d1f900 t radeon_vm_fence_pts +ffffffff81d1f990 T radeon_vm_clear_freed +ffffffff81d1fa70 T radeon_vm_clear_invalids +ffffffff81d1fb10 T radeon_vm_bo_rmv +ffffffff81d1fc00 T radeon_vm_bo_invalidate +ffffffff81d1fcb0 T radeon_vm_init +ffffffff81d1ff50 T radeon_vm_fini +ffffffff81d20230 t radeon_bo_reserve +ffffffff81d203b0 t radeon_vm_frag_ptes +ffffffff81d21000 T rs400_gart_adjust_size +ffffffff81d210c0 T rs400_gart_tlb_flush +ffffffff81d21140 T rs400_gart_init +ffffffff81d21240 T rs400_gart_enable +ffffffff81d215a0 T rs400_gart_disable +ffffffff81d21600 T rs400_gart_fini +ffffffff81d21670 T rs400_gart_get_page_entry +ffffffff81d216d0 T rs400_gart_set_page +ffffffff81d21710 T rs400_mc_wait_for_idle +ffffffff81d217b0 T rs400_mc_rreg +ffffffff81d21840 T rs400_mc_wreg +ffffffff81d218c0 T rs400_resume +ffffffff81d219f0 t rs400_mc_program +ffffffff81d21af0 t rs400_startup +ffffffff81d21ce0 T rs400_suspend +ffffffff81d21d80 T rs400_fini +ffffffff81d21e70 T rs400_init +ffffffff81d23000 T avivo_wait_for_vblank +ffffffff81d23280 T rs600_page_flip +ffffffff81d23550 T rs600_page_flip_pending +ffffffff81d235c0 T avivo_program_fmt +ffffffff81d236e0 T rs600_pm_misc +ffffffff81d23a20 T rs600_pm_prepare +ffffffff81d23b20 T rs600_pm_finish +ffffffff81d23c20 T rs600_hpd_sense +ffffffff81d23c80 T rs600_hpd_set_polarity +ffffffff81d23d40 T rs600_hpd_init +ffffffff81d23e20 T rs600_hpd_fini +ffffffff81d23ed0 T rs600_asic_reset +ffffffff81d24140 T rs600_gart_tlb_flush +ffffffff81d24200 T rs600_gart_get_page_entry +ffffffff81d24260 T rs600_gart_set_page +ffffffff81d242a0 T rs600_irq_set +ffffffff81d24480 T rs600_irq_disable +ffffffff81d24500 t rs600_irq_ack +ffffffff81d246b0 T rs600_irq_process +ffffffff81d24a10 T rs600_get_vblank_counter +ffffffff81d24a60 T rs600_mc_wait_for_idle +ffffffff81d24b00 T rs600_bandwidth_update +ffffffff81d24bf0 T rs600_mc_rreg +ffffffff81d24c70 T rs600_mc_wreg +ffffffff81d24ce0 T rs600_set_safe_registers +ffffffff81d24d20 T rs600_resume +ffffffff81d24e50 t rs600_startup +ffffffff81d25690 T rs600_suspend +ffffffff81d25790 T rs600_fini +ffffffff81d25890 t rs600_gart_fini +ffffffff81d25900 T rs600_init +ffffffff81d26000 T rs690_mc_wait_for_idle +ffffffff81d260a0 T rs690_pm_info +ffffffff81d26310 T rs690_line_buffer_adjust +ffffffff81d26430 T rs690_bandwidth_update +ffffffff81d26780 t rs690_crtc_bandwidth_compute +ffffffff81d26b70 t rs690_compute_mode_priority +ffffffff81d26ff0 T rs690_mc_rreg +ffffffff81d27080 T rs690_mc_wreg +ffffffff81d27100 T rs690_resume +ffffffff81d271f0 t rs690_startup +ffffffff81d274e0 T rs690_suspend +ffffffff81d27540 T rs690_fini +ffffffff81d275f0 T rs690_init +ffffffff81d28000 T rs780_dpm_enable +ffffffff81d28bf0 T rs780_dpm_disable +ffffffff81d28cd0 T rs780_dpm_set_power_state +ffffffff81d290b0 t rs780_force_voltage +ffffffff81d291f0 t rs780_enable_voltage_scaling +ffffffff81d293b0 T rs780_dpm_setup_asic +ffffffff81d293e0 T rs780_dpm_display_configuration_changed +ffffffff81d29530 T rs780_dpm_init +ffffffff81d29aa0 T rs780_dpm_print_power_state +ffffffff81d29b30 T rs780_dpm_fini +ffffffff81d29bc0 T rs780_dpm_get_sclk +ffffffff81d29c00 T rs780_dpm_get_mclk +ffffffff81d29c30 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81d29c60 T rs780_dpm_get_current_sclk +ffffffff81d29cf0 T rs780_dpm_get_current_mclk +ffffffff81d29d20 T rs780_dpm_force_performance_level +ffffffff81d29f10 t rs780_force_fbdiv +ffffffff81d2b000 T rv515_ring_start +ffffffff81d2baf0 T rv515_mc_wait_for_idle +ffffffff81d2bb90 T rv515_vga_render_disable +ffffffff81d2bbe0 T rv515_mc_rreg +ffffffff81d2bc70 T rv515_mc_wreg +ffffffff81d2bcf0 T rv515_debugfs +ffffffff81d2bd00 T rv515_mc_stop +ffffffff81d2c270 T rv515_mc_resume +ffffffff81d2c850 T rv515_clock_startup +ffffffff81d2c910 T rv515_resume +ffffffff81d2cb50 t rv515_startup +ffffffff81d2d020 T rv515_suspend +ffffffff81d2d090 T rv515_set_safe_registers +ffffffff81d2d0d0 T rv515_fini +ffffffff81d2d180 T rv515_init +ffffffff81d2d470 T atom_rv515_force_tv_scaler +ffffffff81d30b10 T rv515_bandwidth_avivo_update +ffffffff81d30cb0 t rv515_crtc_bandwidth_compute +ffffffff81d30fc0 t rv515_compute_mode_priority +ffffffff81d31490 T rv515_bandwidth_update +ffffffff81d32000 T rv6xx_dpm_enable +ffffffff81d32800 t rv6xx_calculate_stepping_parameters +ffffffff81d329e0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81d32fb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81d33080 t rv6xx_enable_dynamic_pcie_gen2 +ffffffff81d33240 T rv6xx_dpm_disable +ffffffff81d334b0 T rv6xx_dpm_set_power_state +ffffffff81d33ea0 T rv6xx_setup_asic +ffffffff81d33fe0 T rv6xx_dpm_display_configuration_changed +ffffffff81d34060 T rv6xx_dpm_init +ffffffff81d345a0 T rv6xx_dpm_print_power_state +ffffffff81d34660 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81d34690 T rv6xx_dpm_get_current_sclk +ffffffff81d34700 T rv6xx_dpm_get_current_mclk +ffffffff81d34770 T rv6xx_dpm_fini +ffffffff81d34800 T rv6xx_dpm_get_sclk +ffffffff81d34840 T rv6xx_dpm_get_mclk +ffffffff81d34880 T rv6xx_dpm_force_performance_level +ffffffff81d34a10 t rv6xx_generate_steps +ffffffff81d34d10 t rv6xx_output_stepping +ffffffff81d34e20 t rv6xx_program_mclk_stepping_entry +ffffffff81d35090 t rv6xx_program_engine_spread_spectrum +ffffffff81d35380 t rv6xx_step_sw_voltage +ffffffff81d36000 T rv730_populate_sclk_value +ffffffff81d36230 T rv730_populate_mclk_value +ffffffff81d36470 T rv730_read_clock_registers +ffffffff81d36590 T rv730_populate_smc_acpi_state +ffffffff81d36750 T rv730_populate_smc_initial_state +ffffffff81d36910 T rv730_program_memory_timing_parameters +ffffffff81d36af0 T rv730_start_dpm +ffffffff81d36b80 T rv730_stop_dpm +ffffffff81d36c40 T rv730_program_dcodt +ffffffff81d36d10 T rv730_get_odt_values +ffffffff81d37000 T rv740_get_decoded_reference_divider +ffffffff81d370a0 T rv740_get_dll_speed +ffffffff81d372b0 T rv740_populate_sclk_value +ffffffff81d374b0 T rv740_populate_mclk_value +ffffffff81d37860 T rv740_read_clock_registers +ffffffff81d37990 T rv740_populate_smc_acpi_state +ffffffff81d37bc0 T rv740_enable_mclk_spread_spectrum +ffffffff81d37c10 T rv740_get_mclk_frequency_ratio +ffffffff81d38000 T rv770_set_uvd_clocks +ffffffff81d38570 T rv770_get_xclk +ffffffff81d385d0 T rv770_page_flip +ffffffff81d388d0 T rv770_page_flip_pending +ffffffff81d38940 T rv770_get_temp +ffffffff81d389a0 T rv770_pm_misc +ffffffff81d38a80 T r700_cp_stop +ffffffff81d38b00 T r700_cp_fini +ffffffff81d38b90 T rv770_set_clk_bypass_mode +ffffffff81d38cb0 T r700_vram_gtt_location +ffffffff81d38e40 T rv770_resume +ffffffff81d38ed0 t rv770_init_golden_registers +ffffffff81d39060 t rv770_startup +ffffffff81d3ac30 T rv770_suspend +ffffffff81d3ae50 T rv770_init +ffffffff81d3b260 t rv770_pcie_gart_fini +ffffffff81d3b3e0 T rv770_fini +ffffffff81d3b680 t rv770_uvd_start +ffffffff81d3b740 t rv770_cp_load_microcode +ffffffff81d3ba10 t rv770_uvd_resume +ffffffff81d3c000 T rv770_copy_dma +ffffffff81d3d000 T rv770_get_ps +ffffffff81d3d030 T rv770_get_pi +ffffffff81d3d060 T evergreen_get_pi +ffffffff81d3d090 T rv770_restore_cgcg +ffffffff81d3d110 T rv770_stop_dpm +ffffffff81d3d1d0 T rv770_dpm_enabled +ffffffff81d3d210 T rv770_enable_thermal_protection +ffffffff81d3d270 T rv770_enable_acpi_pm +ffffffff81d3d2c0 T rv770_get_seq_value +ffffffff81d3d300 T rv770_write_smc_soft_register +ffffffff81d3d330 T rv770_populate_smc_t +ffffffff81d3d4d0 T rv770_populate_smc_sp +ffffffff81d3d530 T rv770_map_clkf_to_ibias +ffffffff81d3d590 T rv770_populate_vddc_value +ffffffff81d3d640 T rv770_populate_mvdd_value +ffffffff81d3d690 T rv770_calculate_memory_refresh_rate +ffffffff81d3d710 T rv770_enable_backbias +ffffffff81d3d770 T rv770_setup_bsp +ffffffff81d3d860 T rv770_program_git +ffffffff81d3d8b0 T rv770_program_tp +ffffffff81d3d930 T rv770_program_tpp +ffffffff81d3d970 T rv770_program_sstp +ffffffff81d3d9b0 T rv770_program_engine_speed_parameters +ffffffff81d3da00 T rv770_program_vc +ffffffff81d3da50 T rv770_clear_vc +ffffffff81d3da90 T rv770_upload_firmware +ffffffff81d3dad0 T rv770_populate_initial_mvdd_value +ffffffff81d3db20 T rv770_get_memory_module_index +ffffffff81d3db60 T rv770_enable_voltage_control +ffffffff81d3dbb0 T rv770_halt_smc +ffffffff81d3dc10 T rv770_resume_smc +ffffffff81d3dc60 T rv770_set_sw_state +ffffffff81d3dcc0 T rv770_set_boot_state +ffffffff81d3dd10 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81d3dd80 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81d3ddf0 T rv770_restrict_performance_levels_before_switch +ffffffff81d3de50 T rv770_dpm_force_performance_level +ffffffff81d3df10 T r7xx_start_smc +ffffffff81d3df40 T r7xx_stop_smc +ffffffff81d3df70 T rv770_read_voltage_smio_registers +ffffffff81d3dfb0 T rv770_reset_smio_status +ffffffff81d3e070 T rv770_get_memory_type +ffffffff81d3e0c0 T rv770_get_pcie_gen2_status +ffffffff81d3e130 T rv770_get_max_vddc +ffffffff81d3e190 T rv770_program_response_times +ffffffff81d3e2e0 T rv770_enable_auto_throttle_source +ffffffff81d3e460 T rv770_dpm_enable +ffffffff81d3f4e0 T rv770_dpm_late_enable +ffffffff81d3f610 T rv770_dpm_disable +ffffffff81d3f980 T rv770_dpm_set_power_state +ffffffff81d40070 t rv770_program_dcodt_after_state_switch +ffffffff81d400f0 T rv770_dpm_setup_asic +ffffffff81d40460 T rv770_dpm_display_configuration_changed +ffffffff81d404e0 T rv7xx_parse_power_table +ffffffff81d40a60 T rv770_get_engine_memory_ss +ffffffff81d40af0 T rv770_dpm_init +ffffffff81d40d30 T rv770_dpm_print_power_state +ffffffff81d40e50 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81d40e80 T rv770_dpm_get_current_sclk +ffffffff81d40ef0 T rv770_dpm_get_current_mclk +ffffffff81d40f60 T rv770_dpm_fini +ffffffff81d40ff0 T rv770_dpm_get_sclk +ffffffff81d41040 T rv770_dpm_get_mclk +ffffffff81d41090 T rv770_dpm_vblank_too_short +ffffffff81d41100 t rv770_convert_power_level_to_smc +ffffffff81d42000 T rv770_copy_bytes_to_smc +ffffffff81d42210 T rv770_start_smc +ffffffff81d42260 T rv770_reset_smc +ffffffff81d422b0 T rv770_stop_smc_clock +ffffffff81d42300 T rv770_start_smc_clock +ffffffff81d42350 T rv770_is_smc_running +ffffffff81d42390 T rv770_send_msg_to_smc +ffffffff81d42470 T rv770_wait_for_smc_inactive +ffffffff81d42510 T rv770_load_smc_ucode +ffffffff81d426a0 T rv770_read_smc_sram_dword +ffffffff81d42760 T rv770_write_smc_sram_dword +ffffffff81d43000 T si_get_allowed_info_register +ffffffff81d43090 T si_get_xclk +ffffffff81d43100 T si_get_temp +ffffffff81d43150 T si_mc_load_microcode +ffffffff81d43410 T dce6_bandwidth_update +ffffffff81d435d0 t dce6_line_buffer_adjust +ffffffff81d43780 t dce6_program_watermarks +ffffffff81d44230 T si_fence_ring_emit +ffffffff81d44690 T si_ring_ib_execute +ffffffff81d44e00 T si_gpu_check_soft_reset +ffffffff81d44fa0 T si_asic_reset +ffffffff81d45330 t si_gpu_pci_config_reset +ffffffff81d45650 T si_gfx_is_lockup +ffffffff81d456c0 T si_vram_gtt_location +ffffffff81d45760 T si_pcie_gart_tlb_flush +ffffffff81d457b0 T si_ib_parse +ffffffff81d45e60 T si_vm_init +ffffffff81d45ea0 T si_vm_fini +ffffffff81d45ed0 T si_vm_flush +ffffffff81d46570 T si_init_uvd_internal_cg +ffffffff81d465c0 T si_get_csb_size +ffffffff81d46650 T si_get_csb_buffer +ffffffff81d467d0 T si_rlc_reset +ffffffff81d46850 T si_irq_set +ffffffff81d46d40 t si_disable_interrupt_state +ffffffff81d46fc0 T si_irq_process +ffffffff81d482d0 t si_irq_ack +ffffffff81d488c0 T si_resume +ffffffff81d48950 t si_init_golden_registers +ffffffff81d48b10 t si_startup +ffffffff81d4af50 T si_suspend +ffffffff81d4b240 t si_fini_cg +ffffffff81d4b2e0 T si_init +ffffffff81d4c650 t si_cp_fini +ffffffff81d4c740 t si_irq_fini +ffffffff81d4c810 t si_pcie_gart_fini +ffffffff81d4c910 T si_fini +ffffffff81d4cb30 T si_get_gpu_clock_counter +ffffffff81d4cbf0 T si_set_uvd_clocks +ffffffff81d4d150 T si_set_vce_clocks +ffffffff81d4d690 t si_vce_send_vcepll_ctlreq +ffffffff81d4d8d0 t dce6_latency_watermark +ffffffff81d4db10 t si_rlc_stop +ffffffff81d4dcc0 t si_vm_reg_valid +ffffffff81d4de20 t si_vm_packet3_cp_dma_check +ffffffff81d4df90 t si_uvd_start +ffffffff81d4e050 t si_vce_start +ffffffff81d4e170 t si_irq_init +ffffffff81d4ec50 t si_cp_load_microcode +ffffffff81d4f030 t si_cp_resume +ffffffff81d4fef0 t si_uvd_resume +ffffffff81d4ffc0 t si_vce_resume +ffffffff81d500c0 t pcie_capability_set_word +ffffffff81d501d0 t pcie_capability_read_word +ffffffff81d50270 t pcie_capability_clear_and_set_word +ffffffff81d50390 t pcie_capability_write_word +ffffffff81d50450 t si_update_cg +ffffffff81d509c0 t si_enable_mgcg +ffffffff81d50de0 t si_enable_cgcg +ffffffff81d51170 t request_firmware +ffffffff81d51200 t release_firmware +ffffffff81d52000 T si_dma_is_lockup +ffffffff81d52080 T si_dma_vm_copy_pages +ffffffff81d52170 T si_dma_vm_write_pages +ffffffff81d522d0 T si_dma_vm_set_pages +ffffffff81d52440 T si_dma_vm_flush +ffffffff81d528b0 T si_copy_dma +ffffffff81d53000 T si_dpm_force_performance_level +ffffffff81d53160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81d531c0 T si_get_mclk_frequency_ratio +ffffffff81d53240 T si_trim_voltage_table_to_fit_state_table +ffffffff81d53350 T si_dpm_setup_asic +ffffffff81d53520 T si_fan_ctrl_get_fan_speed_percent +ffffffff81d535b0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81d53670 T si_fan_ctrl_set_mode +ffffffff81d538c0 T si_fan_ctrl_get_mode +ffffffff81d53910 T si_dpm_enable +ffffffff81d54c90 t si_init_smc_table +ffffffff81d55e40 t si_init_smc_spll_table +ffffffff81d55fc0 t si_init_arb_table_index +ffffffff81d56050 t si_populate_mc_reg_table +ffffffff81d56770 t si_initialize_smc_cac_tables +ffffffff81d583c0 t si_initialize_hardware_cac_manager +ffffffff81d58470 t si_initialize_smc_dte_tables +ffffffff81d58760 t si_populate_smc_tdp_limits +ffffffff81d58960 t si_populate_smc_tdp_limits_2 +ffffffff81d58a30 t si_program_response_times +ffffffff81d58b50 t si_program_ds_registers +ffffffff81d58be0 t si_dpm_start_smc +ffffffff81d58c10 t si_enable_auto_throttle_source +ffffffff81d58da0 t si_thermal_start_thermal_controller +ffffffff81d59270 T si_dpm_late_enable +ffffffff81d593c0 T si_dpm_disable +ffffffff81d59740 t si_enable_power_containment +ffffffff81d59810 t si_enable_smc_cac +ffffffff81d59970 T si_dpm_pre_set_power_state +ffffffff81d5a4e0 T si_dpm_set_power_state +ffffffff81d5aa40 t si_halt_smc +ffffffff81d5aaa0 t si_upload_sw_state +ffffffff81d5b400 t si_upload_smc_data +ffffffff81d5b540 t si_upload_ulv_state +ffffffff81d5b680 t si_upload_mc_reg_table +ffffffff81d5b8d0 t si_set_pcie_lane_width_in_smc +ffffffff81d5b970 t si_resume_smc +ffffffff81d5b9d0 t si_set_vce_clock +ffffffff81d5ba70 t si_notify_link_speed_change_after_state_change +ffffffff81d5bba0 t si_set_power_state_conditionally_enable_ulv +ffffffff81d5bc80 t si_power_control_set_level +ffffffff81d5be10 T si_dpm_post_set_power_state +ffffffff81d5be40 T si_dpm_display_configuration_changed +ffffffff81d5bf20 T si_dpm_init +ffffffff81d5d960 T si_dpm_fini +ffffffff81d5da10 T si_dpm_debugfs_print_current_performance_level +ffffffff81d5da60 T si_dpm_get_current_sclk +ffffffff81d5dad0 T si_dpm_get_current_mclk +ffffffff81d5db40 t si_do_program_memory_timing_parameters +ffffffff81d5dcd0 t si_populate_mvdd_value +ffffffff81d5dd50 t si_convert_power_level_to_smc +ffffffff81d5e5f0 t si_calculate_sclk_params +ffffffff81d5e820 t si_program_cac_config_registers +ffffffff81d5f000 T si_copy_bytes_to_smc +ffffffff81d5f240 T si_start_smc +ffffffff81d5f280 T si_reset_smc +ffffffff81d5f2c0 T si_program_jump_on_start +ffffffff81d5f2f0 T si_stop_smc_clock +ffffffff81d5f330 T si_start_smc_clock +ffffffff81d5f370 T si_is_smc_running +ffffffff81d5f3d0 T si_send_msg_to_smc +ffffffff81d5f4a0 T si_wait_for_smc_inactive +ffffffff81d5f540 T si_load_smc_ucode +ffffffff81d5f6e0 T si_read_smc_sram_dword +ffffffff81d5f7b0 T si_write_smc_sram_dword +ffffffff81d60000 T sumo_get_pi +ffffffff81d60030 T sumo_gfx_clockgating_initialize +ffffffff81d60110 T sumo_program_vc +ffffffff81d60150 T sumo_clear_vc +ffffffff81d60190 T sumo_program_sstp +ffffffff81d60210 T sumo_take_smu_control +ffffffff81d60240 T sumo_get_sleep_divider_from_id +ffffffff81d60270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d60320 T sumo_dpm_enable +ffffffff81d609b0 T sumo_dpm_late_enable +ffffffff81d60f70 T sumo_dpm_disable +ffffffff81d612c0 T sumo_dpm_pre_set_power_state +ffffffff81d617b0 T sumo_dpm_set_power_state +ffffffff81d62260 T sumo_dpm_post_set_power_state +ffffffff81d62300 T sumo_dpm_setup_asic +ffffffff81d62400 T sumo_dpm_display_configuration_changed +ffffffff81d62430 T sumo_convert_vid2_to_vid7 +ffffffff81d62480 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d62540 T sumo_construct_vid_mapping_table +ffffffff81d626b0 T sumo_dpm_init +ffffffff81d62f80 T sumo_dpm_print_power_state +ffffffff81d630a0 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d630d0 T sumo_dpm_get_current_sclk +ffffffff81d63140 T sumo_dpm_get_current_mclk +ffffffff81d63170 T sumo_dpm_get_current_vddc +ffffffff81d63240 T sumo_dpm_fini +ffffffff81d632d0 T sumo_dpm_get_sclk +ffffffff81d63320 T sumo_dpm_get_mclk +ffffffff81d63350 T sumo_dpm_force_performance_level +ffffffff81d63740 t sumo_power_level_enable +ffffffff81d63970 t sumo_program_power_level +ffffffff81d64000 T sumo_initialize_m3_arb +ffffffff81d642c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d64360 t sumo_send_msg_to_smu +ffffffff81d644f0 T sumo_smu_pg_init +ffffffff81d64510 T sumo_enable_boost_timer +ffffffff81d64640 T sumo_set_tdp_limit +ffffffff81d646c0 T sumo_boost_state_enable +ffffffff81d64710 T sumo_get_running_fw_version +ffffffff81d65000 T trinity_dpm_enable_bapm +ffffffff81d65080 T trinity_dpm_enable +ffffffff81d65520 T trinity_dpm_late_enable +ffffffff81d65a60 T trinity_dpm_disable +ffffffff81d65e50 T trinity_dpm_force_performance_level +ffffffff81d65f00 T trinity_dpm_pre_set_power_state +ffffffff81d664c0 T trinity_dpm_set_power_state +ffffffff81d66a30 T trinity_dpm_post_set_power_state +ffffffff81d66ad0 T trinity_dpm_setup_asic +ffffffff81d66b30 T trinity_dpm_display_configuration_changed +ffffffff81d66bc0 T trinity_dpm_init +ffffffff81d674b0 T trinity_dpm_print_power_state +ffffffff81d675c0 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d67650 T trinity_dpm_get_current_sclk +ffffffff81d676b0 T trinity_dpm_get_current_mclk +ffffffff81d676e0 T trinity_dpm_fini +ffffffff81d67780 T trinity_dpm_get_sclk +ffffffff81d677d0 T trinity_dpm_get_mclk +ffffffff81d67800 t trinity_program_power_level +ffffffff81d68000 T trinity_dpm_bapm_enable +ffffffff81d68150 T trinity_dpm_config +ffffffff81d68230 T trinity_dpm_force_state +ffffffff81d68310 T trinity_dpm_n_levels_disabled +ffffffff81d683f0 T trinity_uvd_dpm_config +ffffffff81d684c0 T trinity_dpm_no_forced_level +ffffffff81d68590 T trinity_dce_enable_voltage_adjustment +ffffffff81d686e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d687b0 T trinity_acquire_mutex +ffffffff81d68840 T trinity_release_mutex +ffffffff81d69000 T uvd_v1_0_get_rptr +ffffffff81d69040 T uvd_v1_0_get_wptr +ffffffff81d69080 T uvd_v1_0_set_wptr +ffffffff81d690c0 T uvd_v1_0_fence_emit +ffffffff81d694b0 T uvd_v1_0_resume +ffffffff81d69610 T uvd_v1_0_init +ffffffff81d69b90 T uvd_v1_0_start +ffffffff81d6a310 T uvd_v1_0_fini +ffffffff81d6a480 T uvd_v1_0_stop +ffffffff81d6a5f0 T uvd_v1_0_ring_test +ffffffff81d6a7c0 T uvd_v1_0_semaphore_emit +ffffffff81d6a7f0 T uvd_v1_0_ib_execute +ffffffff81d6a980 T uvd_v1_0_ib_test +ffffffff81d6b000 T uvd_v2_2_fence_emit +ffffffff81d6b450 T uvd_v2_2_semaphore_emit +ffffffff81d6b650 T uvd_v2_2_resume +ffffffff81d6c000 T uvd_v3_1_semaphore_emit +ffffffff81d6d000 T uvd_v4_2_resume +ffffffff81d6e000 T vce_v1_0_get_rptr +ffffffff81d6e090 T vce_v1_0_get_wptr +ffffffff81d6e120 T vce_v1_0_set_wptr +ffffffff81d6e1b0 T vce_v1_0_enable_mgcg +ffffffff81d6e470 T vce_v1_0_load_fw +ffffffff81d6e640 T vce_v1_0_bo_size +ffffffff81d6e6b0 T vce_v1_0_resume +ffffffff81d6f020 T vce_v1_0_start +ffffffff81d6f7e0 T vce_v1_0_init +ffffffff81d70000 T vce_v2_0_enable_mgcg +ffffffff81d70070 t vce_v2_0_set_dyn_cg +ffffffff81d70260 T vce_v2_0_bo_size +ffffffff81d702d0 T vce_v2_0_resume +ffffffff81d71000 T aldebaran_reset_init +ffffffff81d710c0 t aldebaran_async_reset +ffffffff81d71120 t aldebaran_get_reset_handler +ffffffff81d711c0 T aldebaran_reset_fini +ffffffff81d71220 t aldebaran_mode2_prepare_hwcontext +ffffffff81d71340 t aldebaran_mode2_perform_reset +ffffffff81d71510 t aldebaran_mode2_restore_hwcontext +ffffffff81d71ac0 t aldebaran_mode2_reset +ffffffff81d72000 T aldebaran_reg_base_init +ffffffff81d73000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d73040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d73070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d73180 T amdgpu_acpi_pcie_performance_request +ffffffff81d73500 T amdgpu_acpi_power_shift_control +ffffffff81d73640 T amdgpu_acpi_smart_shift_update +ffffffff81d736e0 T amdgpu_acpi_get_tmr_info +ffffffff81d73770 T amdgpu_acpi_get_mem_info +ffffffff81d73830 T amdgpu_acpi_init +ffffffff81d738e0 t amdgpu_acpi_event +ffffffff81d73bf0 T amdgpu_acpi_get_backlight_caps +ffffffff81d73c40 T amdgpu_acpi_fini +ffffffff81d73c60 T amdgpu_acpi_should_gpu_reset +ffffffff81d73cb0 T amdgpu_acpi_detect +ffffffff81d745f0 T amdgpu_acpi_release +ffffffff81d75000 T amdgpu_afmt_acr +ffffffff81d76000 T amdgpu_amdkfd_init +ffffffff81d76040 T amdgpu_amdkfd_fini +ffffffff81d76070 T amdgpu_amdkfd_device_probe +ffffffff81d760a0 T amdgpu_amdkfd_device_init +ffffffff81d76260 t amdgpu_amdkfd_reset_work +ffffffff81d762e0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d76330 T amdgpu_amdkfd_interrupt +ffffffff81d76360 T amdgpu_amdkfd_suspend +ffffffff81d76390 T amdgpu_amdkfd_resume +ffffffff81d763c0 T amdgpu_amdkfd_pre_reset +ffffffff81d763f0 T amdgpu_amdkfd_post_reset +ffffffff81d76420 T amdgpu_amdkfd_gpu_reset +ffffffff81d76480 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d76740 t amdgpu_bo_reserve +ffffffff81d768a0 t amdgpu_bo_unreserve +ffffffff81d76980 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d769f0 T amdgpu_amdkfd_alloc_gws +ffffffff81d76ad0 T amdgpu_amdkfd_free_gws +ffffffff81d76b10 T amdgpu_amdkfd_get_fw_version +ffffffff81d76bc0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d76d60 T amdgpu_amdkfd_xcp_memory_size +ffffffff81d76e00 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d76e40 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d76ea0 T amdgpu_amdkfd_get_cu_info +ffffffff81d76fb0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d77100 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d77170 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d77200 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d77360 T amdgpu_amdkfd_submit_ib +ffffffff81d774c0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d77510 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d77550 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d77680 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d776c0 T amdgpu_amdkfd_have_atomics_support +ffffffff81d776f0 T amdgpu_amdkfd_debug_mem_fence +ffffffff81d77710 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d77720 T amdgpu_amdkfd_send_close_event_drain_irq +ffffffff81d77740 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d77790 T amdgpu_amdkfd_check_and_lock_kfd +ffffffff81d777c0 T amdgpu_amdkfd_unlock_kfd +ffffffff81d777f0 T amdgpu_amdkfd_unmap_hiq +ffffffff81d78000 T amdgpu_atom_execute_table +ffffffff81d780a0 t amdgpu_atom_execute_table_locked +ffffffff81d783c0 T amdgpu_atom_parse +ffffffff81d78910 T amdgpu_atom_destroy +ffffffff81d78950 T amdgpu_atom_asic_init +ffffffff81d78a70 t get_u32 +ffffffff81d78ad0 T amdgpu_atom_parse_data_header +ffffffff81d78b70 T amdgpu_atom_parse_cmd_header +ffffffff81d78bf0 t atom_op_move +ffffffff81d78dc0 t atom_op_and +ffffffff81d78fa0 t atom_op_or +ffffffff81d79180 t atom_op_shift_left +ffffffff81d79360 t atom_op_shift_right +ffffffff81d79540 t atom_op_mul +ffffffff81d79690 t atom_op_div +ffffffff81d79800 t atom_op_add +ffffffff81d799e0 t atom_op_sub +ffffffff81d79bc0 t atom_op_setport +ffffffff81d79d40 t atom_op_setregblock +ffffffff81d79e00 t atom_op_setfbbase +ffffffff81d79ec0 t atom_op_compare +ffffffff81d7a0a0 t atom_op_switch +ffffffff81d7a2d0 t atom_op_jump +ffffffff81d7a540 t atom_op_test +ffffffff81d7a700 t atom_op_delay +ffffffff81d7a7e0 t atom_op_calltable +ffffffff81d7a930 t atom_op_repeat +ffffffff81d7a960 t atom_op_clear +ffffffff81d7aa70 t atom_op_nop +ffffffff81d7aaa0 t atom_op_eot +ffffffff81d7aad0 t atom_op_mask +ffffffff81d7ad80 t atom_op_postcard +ffffffff81d7ae30 t atom_op_beep +ffffffff81d7ae50 t atom_op_savereg +ffffffff81d7ae80 t atom_op_restorereg +ffffffff81d7aeb0 t atom_op_setdatablock +ffffffff81d7aff0 t atom_op_xor +ffffffff81d7b1d0 t atom_op_shl +ffffffff81d7b3f0 t atom_op_shr +ffffffff81d7b610 t atom_op_debug +ffffffff81d7b6c0 t atom_op_processds +ffffffff81d7b780 t atom_op_mul32 +ffffffff81d7b8e0 t atom_op_div32 +ffffffff81d7ba70 t atom_put_dst +ffffffff81d7bf80 t atom_get_src_int +ffffffff81d7c600 t atom_iio_execute +ffffffff81d7d000 T amdgpu_atombios_lookup_i2c_gpio +ffffffff81d7d260 T amdgpu_atombios_i2c_init +ffffffff81d7d520 T amdgpu_atombios_lookup_gpio +ffffffff81d7d620 T amdgpu_atombios_has_dce_engine_info +ffffffff81d7d6a0 T amdgpu_atombios_get_connector_info_from_object_table +ffffffff81d7df00 T amdgpu_atombios_get_clock_info +ffffffff81d7e240 T amdgpu_atombios_get_gfx_info +ffffffff81d7e300 T amdgpu_atombios_get_vram_width +ffffffff81d7e390 T amdgpu_atombios_get_asic_ss_info +ffffffff81d7e670 t amdgpu_atombios_get_igp_ss_overrides +ffffffff81d7e790 T amdgpu_atombios_get_clock_dividers +ffffffff81d7e9b0 T amdgpu_atombios_has_gpu_virtualization_table +ffffffff81d7ea00 T amdgpu_atombios_scratch_regs_lock +ffffffff81d7ea60 T amdgpu_atombios_scratch_regs_engine_hung +ffffffff81d7eab0 T amdgpu_atombios_scratch_regs_set_backlight_level +ffffffff81d7eb10 T amdgpu_atombios_scratch_need_asic_init +ffffffff81d7eb60 T amdgpu_atombios_copy_swap +ffffffff81d7eb80 T amdgpu_atombios_sysfs_init +ffffffff81d7ebb0 T amdgpu_atombios_fini +ffffffff81d7ec60 T amdgpu_atombios_init +ffffffff81d7ef00 t cail_reg_read +ffffffff81d7ef20 t cail_reg_write +ffffffff81d7ef40 t cail_mc_read +ffffffff81d7ef70 t cail_mc_write +ffffffff81d7efa0 t cail_pll_read +ffffffff81d7efd0 t cail_pll_write +ffffffff81d7f000 T amdgpu_atombios_get_data_table +ffffffff81d80000 T amdgpu_atombios_crtc_overscan_setup +ffffffff81d80150 T amdgpu_atombios_crtc_scaler_setup +ffffffff81d801d0 T amdgpu_atombios_crtc_lock +ffffffff81d80230 T amdgpu_atombios_crtc_enable +ffffffff81d80290 T amdgpu_atombios_crtc_blank +ffffffff81d802f0 T amdgpu_atombios_crtc_powergate +ffffffff81d80360 T amdgpu_atombios_crtc_powergate_init +ffffffff81d803d0 T amdgpu_atombios_crtc_set_dtd_timing +ffffffff81d80500 T amdgpu_atombios_crtc_set_disp_eng_pll +ffffffff81d805f0 T amdgpu_atombios_crtc_set_dce_clock +ffffffff81d806e0 T amdgpu_atombios_crtc_program_pll +ffffffff81d80a00 T amdgpu_atombios_crtc_prepare_pll +ffffffff81d80f00 T amdgpu_atombios_crtc_set_pll +ffffffff81d82000 T amdgpu_atombios_dp_aux_init +ffffffff81d82090 t amdgpu_atombios_dp_aux_transfer +ffffffff81d82200 T amdgpu_atombios_dp_get_sinktype +ffffffff81d82270 T amdgpu_atombios_dp_get_dpcd +ffffffff81d82420 T amdgpu_atombios_dp_get_panel_mode +ffffffff81d82510 T amdgpu_atombios_dp_set_link_config +ffffffff81d82590 t amdgpu_atombios_dp_get_dp_link_config +ffffffff81d82720 T amdgpu_atombios_dp_mode_valid_helper +ffffffff81d827a0 T amdgpu_atombios_dp_needs_link_train +ffffffff81d82810 T amdgpu_atombios_dp_set_rx_power_state +ffffffff81d82890 T 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amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81d857c0 T amdgpu_atombios_encoder_dpms +ffffffff81d85930 t amdgpu_atombios_encoder_setup_dig +ffffffff81d85ce0 t amdgpu_atombios_encoder_setup_dvo +ffffffff81d85e90 T amdgpu_atombios_encoder_set_crtc_source +ffffffff81d86270 T amdgpu_atombios_encoder_init_dig +ffffffff81d86340 t amdgpu_atombios_encoder_setup_external_encoder +ffffffff81d865b0 T amdgpu_atombios_encoder_dac_detect +ffffffff81d86770 T amdgpu_atombios_encoder_dig_detect +ffffffff81d86870 T amdgpu_atombios_encoder_setup_ext_encoder_ddc +ffffffff81d868c0 T amdgpu_atombios_encoder_set_bios_scratch_regs +ffffffff81d86e10 T amdgpu_atombios_encoder_get_lcd_info +ffffffff81d87170 T amdgpu_atombios_encoder_get_dig_info +ffffffff81d871e0 t amdgpu_atombios_encoder_update_backlight_status +ffffffff81d88000 T amdgpu_atombios_i2c_xfer +ffffffff81d88370 T amdgpu_atombios_i2c_func +ffffffff81d883a0 T amdgpu_atombios_i2c_channel_trans +ffffffff81d89000 T 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amdgpu_hdp_ras_sw_init +ffffffff81dbf000 T amdgpu_bb_set_bits +ffffffff81dbf0c0 T amdgpu_bb_set_dir +ffffffff81dbf0f0 T amdgpu_bb_read_bits +ffffffff81dbf180 T amdgpu_acquire_bus +ffffffff81dbf350 T amdgpu_release_bus +ffffffff81dbf410 T amdgpu_send_start +ffffffff81dbf430 T amdgpu_send_stop +ffffffff81dbf450 T amdgpu_initiate_xfer +ffffffff81dbf470 T amdgpu_read_byte +ffffffff81dbf490 T amdgpu_write_byte +ffffffff81dbf4b0 T amdgpu_i2c_create +ffffffff81dbf660 T amdgpu_i2c_destroy +ffffffff81dbf6e0 T amdgpu_i2c_init +ffffffff81dbf720 T amdgpu_i2c_fini +ffffffff81dbf7d0 T amdgpu_i2c_add +ffffffff81dbf980 T amdgpu_i2c_lookup +ffffffff81dbfb50 T amdgpu_i2c_router_select_ddc_port +ffffffff81dbfdb0 T amdgpu_i2c_router_select_cd_port +ffffffff81dc1000 T amdgpu_ib_get +ffffffff81dc10f0 T amdgpu_ib_free +ffffffff81dc1110 T amdgpu_ib_schedule +ffffffff81dc18a0 T amdgpu_ib_pool_init +ffffffff81dc19c0 T amdgpu_ib_pool_fini +ffffffff81dc1a30 T amdgpu_ib_ring_tests +ffffffff81dc1be0 T amdgpu_debugfs_sa_init +ffffffff81dc2000 T amdgpu_pasid_alloc +ffffffff81dc2090 T amdgpu_pasid_free +ffffffff81dc20b0 T amdgpu_pasid_free_delayed +ffffffff81dc21c0 t amdgpu_pasid_free_cb +ffffffff81dc2200 T amdgpu_vmid_had_gpu_reset +ffffffff81dc2240 T amdgpu_vmid_grab +ffffffff81dc2aa0 T amdgpu_vmid_alloc_reserved +ffffffff81dc2b50 T amdgpu_vmid_free_reserved +ffffffff81dc2be0 T amdgpu_vmid_reset +ffffffff81dc2c60 T amdgpu_vmid_reset_all +ffffffff81dc2d60 T amdgpu_vmid_mgr_init +ffffffff81dc2f40 T amdgpu_vmid_mgr_fini +ffffffff81dc3000 T amdgpu_ih_ring_init +ffffffff81dc31f0 T amdgpu_ih_ring_fini +ffffffff81dc32b0 T amdgpu_ih_ring_write +ffffffff81dc3430 T amdgpu_ih_wait_on_checkpoint_process_ts +ffffffff81dc3710 T amdgpu_ih_process +ffffffff81dc38a0 T amdgpu_ih_decode_iv_helper +ffffffff81dc3980 T amdgpu_ih_decode_iv_ts_helper +ffffffff81dc4000 T amdgpu_irq_disable_all +ffffffff81dc40f0 T amdgpu_irq_handler +ffffffff81dc4160 T amdgpu_msi_ok +ffffffff81dc4190 T amdgpu_irq_init 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amdgpu_info_ioctl +ffffffff81dc8a50 t amdgpu_hw_ip_info +ffffffff81dc95b0 t amdgpu_firmware_info +ffffffff81dc9990 T amdgpu_driver_lastclose_kms +ffffffff81dc99a0 T amdgpu_driver_open_kms +ffffffff81dc9bf0 T amdgpu_driver_postclose_kms +ffffffff81dc9fe0 T amdgpu_driver_release_kms +ffffffff81dca000 T amdgpu_get_vblank_counter_kms +ffffffff81dca190 T amdgpu_enable_vblank_kms +ffffffff81dca1d0 T amdgpu_disable_vblank_kms +ffffffff81dca210 T amdgpu_debugfs_firmware_init +ffffffff81dcb000 T amdgpu_lsdma_wait_for +ffffffff81dcb0a0 T amdgpu_lsdma_copy_mem +ffffffff81dcb140 T amdgpu_lsdma_fill_mem +ffffffff81dcc000 T amdgpu_mca_query_correctable_error_count +ffffffff81dcc060 T amdgpu_mca_query_uncorrectable_error_count +ffffffff81dcc0c0 T amdgpu_mca_reset_error_count +ffffffff81dcc0e0 T amdgpu_mca_query_ras_error_count +ffffffff81dcc170 T amdgpu_mca_mp0_ras_sw_init +ffffffff81dcc240 T amdgpu_mca_mp1_ras_sw_init +ffffffff81dcc310 T amdgpu_mca_mpio_ras_sw_init +ffffffff81dcd000 T amdgpu_mes_doorbell_process_slice +ffffffff81dcd030 T amdgpu_mes_init +ffffffff81dcd410 T amdgpu_mes_fini +ffffffff81dcd490 T amdgpu_mes_create_process +ffffffff81dcd660 T amdgpu_mes_destroy_process +ffffffff81dcd920 T amdgpu_mes_add_gang +ffffffff81dcdb40 T amdgpu_mes_remove_gang +ffffffff81dcdc50 T amdgpu_mes_suspend +ffffffff81dcdd60 T amdgpu_mes_resume +ffffffff81dcde70 T amdgpu_mes_add_hw_queue +ffffffff81dce770 T amdgpu_mes_remove_hw_queue +ffffffff81dce950 T amdgpu_mes_unmap_legacy_queue +ffffffff81dce9f0 T amdgpu_mes_rreg +ffffffff81dceaa0 T amdgpu_mes_wreg +ffffffff81dceb50 T amdgpu_mes_reg_write_reg_wait +ffffffff81dcec00 T amdgpu_mes_reg_wait +ffffffff81dceca0 T amdgpu_mes_set_shader_debugger +ffffffff81dcedd0 T amdgpu_mes_flush_shader_debugger +ffffffff81dceed0 T amdgpu_mes_ctx_get_offs +ffffffff81dcf0a0 T amdgpu_mes_add_ring +ffffffff81dcf4a0 T amdgpu_mes_remove_ring +ffffffff81dcf500 T amdgpu_mes_get_aggregated_doorbell_index +ffffffff81dcf530 T amdgpu_mes_ctx_alloc_meta_data +ffffffff81dcf600 T amdgpu_mes_ctx_free_meta_data +ffffffff81dcf640 T amdgpu_mes_ctx_map_meta_data +ffffffff81dcf830 T amdgpu_mes_ctx_unmap_meta_data +ffffffff81dcfa40 T amdgpu_mes_self_test +ffffffff81dd0020 t amdgpu_mes_test_queues +ffffffff81dd02f0 T amdgpu_mes_init_microcode +ffffffff81dd1000 T amdgpu_mmhub_ras_sw_init +ffffffff81dd2000 T amdgpu_nbio_ras_sw_init +ffffffff81dd20d0 T amdgpu_nbio_get_pcie_replay_count +ffffffff81dd2120 T amdgpu_nbio_get_pcie_usage +ffffffff81dd2170 T amdgpu_nbio_ras_late_init +ffffffff81dd3000 T amdgpu_bo_is_amdgpu_bo +ffffffff81dd3070 t amdgpu_bo_destroy +ffffffff81dd3100 t amdgpu_bo_user_destroy +ffffffff81dd31a0 t amdgpu_bo_vm_destroy +ffffffff81dd32a0 T amdgpu_bo_placement_from_domain +ffffffff81dd3520 T amdgpu_bo_create_reserved +ffffffff81dd3870 T amdgpu_bo_unref +ffffffff81dd38c0 T amdgpu_bo_create +ffffffff81dd3d10 t amdgpu_bo_reserve +ffffffff81dd3f10 T amdgpu_bo_pin +ffffffff81dd3f30 T amdgpu_bo_gpu_offset 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dce_v10_0_is_idle +ffffffff81e1fc30 t dce_v10_0_wait_for_idle +ffffffff81e1fc60 t dce_v10_0_check_soft_reset +ffffffff81e1fc70 t dce_v10_0_soft_reset +ffffffff81e1fd40 t dce_v10_0_set_clockgating_state +ffffffff81e1fd70 t dce_v10_0_set_powergating_state +ffffffff81e1fda0 t dce_v10_0_audio_endpt_rreg +ffffffff81e1fe30 t dce_v10_0_audio_endpt_wreg +ffffffff81e1feb0 t dce_v10_0_bandwidth_update +ffffffff81e20920 t dce_v10_0_vblank_get_counter +ffffffff81e20970 t dce_v10_0_hpd_sense +ffffffff81e209d0 t dce_v10_0_hpd_set_polarity +ffffffff81e20aa0 t dce_v10_0_hpd_get_gpio_reg +ffffffff81e20ad0 t dce_v10_0_page_flip +ffffffff81e20bd0 t dce_v10_0_crtc_get_scanoutpos +ffffffff81e20c70 t dce_v10_0_encoder_add +ffffffff81e20ec0 t dce_v10_0_latency_watermark +ffffffff81e210f0 t dce_v10_0_encoder_destroy +ffffffff81e21150 t dce_v10_0_encoder_prepare +ffffffff81e21350 t dce_v10_0_encoder_commit +ffffffff81e21380 t dce_v10_0_encoder_mode_set +ffffffff81e222f0 t dce_v10_0_encoder_disable +ffffffff81e22400 t dce_v10_0_ext_dpms +ffffffff81e22430 t dce_v10_0_ext_prepare +ffffffff81e22460 t dce_v10_0_ext_commit +ffffffff81e22490 t dce_v10_0_ext_mode_set +ffffffff81e224c0 t dce_v10_0_ext_disable +ffffffff81e224f0 t dce_v10_0_set_crtc_irq_state +ffffffff81e225d0 t dce_v10_0_crtc_irq +ffffffff81e22810 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81e228e0 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81e229b0 t dce_v10_0_set_pageflip_irq_state +ffffffff81e22a60 t dce_v10_0_pageflip_irq +ffffffff81e22bc0 t dce_v10_0_set_hpd_irq_state +ffffffff81e22c90 t dce_v10_0_hpd_irq +ffffffff81e22dc0 t dce_v10_0_afmt_init +ffffffff81e22ed0 t dce_v10_0_audio_init +ffffffff81e22fa0 t INIT_DELAYED_WORK +ffffffff81e22fe0 t dce_v10_0_crtc_cursor_set2 +ffffffff81e232a0 t dce_v10_0_crtc_cursor_move +ffffffff81e23370 t dce_v10_0_crtc_gamma_set +ffffffff81e233b0 t dce_v10_0_crtc_destroy +ffffffff81e233e0 t amdgpu_bo_reserve +ffffffff81e235e0 t amdgpu_bo_unreserve +ffffffff81e236c0 t dce_v10_0_lock_cursor +ffffffff81e23720 t dce_v10_0_cursor_move_locked +ffffffff81e23880 t dce_v10_0_show_cursor +ffffffff81e23920 t dce_v10_0_crtc_load_lut +ffffffff81e23cb0 t dce_v10_0_crtc_dpms +ffffffff81e23e90 t dce_v10_0_crtc_prepare +ffffffff81e23ed0 t dce_v10_0_crtc_commit +ffffffff81e23f00 t dce_v10_0_crtc_mode_fixup +ffffffff81e240b0 t dce_v10_0_crtc_mode_set +ffffffff81e24290 t dce_v10_0_crtc_set_base +ffffffff81e242b0 t dce_v10_0_crtc_set_base_atomic +ffffffff81e242d0 t dce_v10_0_crtc_disable +ffffffff81e24460 t dce_v10_0_crtc_do_set_base +ffffffff81e24b60 t __delayed_work_tick +ffffffff81e24b80 t dce_v10_0_is_display_hung +ffffffff81e25000 T dce_v11_0_disable_dce +ffffffff81e25160 t dce_v11_0_early_init +ffffffff81e25290 t dce_v11_0_sw_init +ffffffff81e255b0 t dce_v11_0_sw_fini +ffffffff81e256d0 t dce_v11_0_hw_init +ffffffff81e25a90 t dce_v11_0_hw_fini +ffffffff81e25c20 t dce_v11_0_suspend +ffffffff81e25c80 t dce_v11_0_resume +ffffffff81e25cf0 t dce_v11_0_is_idle +ffffffff81e25d20 t dce_v11_0_wait_for_idle +ffffffff81e25d50 t dce_v11_0_soft_reset +ffffffff81e25f60 t dce_v11_0_set_clockgating_state +ffffffff81e25f90 t dce_v11_0_set_powergating_state +ffffffff81e25fc0 t dce_v11_0_audio_endpt_rreg +ffffffff81e26050 t dce_v11_0_audio_endpt_wreg +ffffffff81e260d0 t dce_v11_0_bandwidth_update +ffffffff81e26b40 t dce_v11_0_vblank_get_counter +ffffffff81e26b90 t dce_v11_0_hpd_sense +ffffffff81e26bf0 t dce_v11_0_hpd_set_polarity +ffffffff81e26cc0 t dce_v11_0_hpd_get_gpio_reg +ffffffff81e26cf0 t dce_v11_0_page_flip +ffffffff81e26df0 t dce_v11_0_crtc_get_scanoutpos +ffffffff81e26e90 t dce_v11_0_encoder_add +ffffffff81e270e0 t dce_v11_0_latency_watermark +ffffffff81e27310 t dce_v11_0_encoder_destroy +ffffffff81e27370 t dce_v11_0_encoder_prepare +ffffffff81e27570 t dce_v11_0_encoder_commit +ffffffff81e275a0 t dce_v11_0_encoder_mode_set +ffffffff81e28510 t dce_v11_0_encoder_disable +ffffffff81e28620 t dce_v11_0_ext_dpms +ffffffff81e28650 t dce_v11_0_ext_prepare +ffffffff81e28680 t dce_v11_0_ext_commit +ffffffff81e286b0 t dce_v11_0_ext_mode_set +ffffffff81e286e0 t dce_v11_0_ext_disable +ffffffff81e28710 t dce_v11_0_set_crtc_irq_state +ffffffff81e287f0 t dce_v11_0_crtc_irq +ffffffff81e28a10 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81e28ae0 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81e28bb0 t dce_v11_0_set_pageflip_irq_state +ffffffff81e28c60 t dce_v11_0_pageflip_irq +ffffffff81e28dc0 t dce_v11_0_set_hpd_irq_state +ffffffff81e28e90 t dce_v11_0_hpd_irq +ffffffff81e28fc0 t dce_v11_0_afmt_init +ffffffff81e290d0 t dce_v11_0_audio_init +ffffffff81e291d0 t INIT_DELAYED_WORK +ffffffff81e29210 t dce_v11_0_crtc_cursor_set2 +ffffffff81e294d0 t dce_v11_0_crtc_cursor_move +ffffffff81e295a0 t dce_v11_0_crtc_gamma_set +ffffffff81e295e0 t dce_v11_0_crtc_destroy +ffffffff81e29610 t amdgpu_bo_reserve +ffffffff81e29810 t amdgpu_bo_unreserve +ffffffff81e298f0 t dce_v11_0_lock_cursor +ffffffff81e29950 t dce_v11_0_cursor_move_locked +ffffffff81e29ab0 t dce_v11_0_show_cursor +ffffffff81e29b50 t dce_v11_0_crtc_load_lut +ffffffff81e29eb0 t dce_v11_0_crtc_dpms +ffffffff81e2a090 t dce_v11_0_crtc_prepare +ffffffff81e2a0d0 t dce_v11_0_crtc_commit +ffffffff81e2a100 t dce_v11_0_crtc_mode_fixup +ffffffff81e2a370 t dce_v11_0_crtc_mode_set +ffffffff81e2a5d0 t dce_v11_0_crtc_set_base +ffffffff81e2a5f0 t dce_v11_0_crtc_set_base_atomic +ffffffff81e2a610 t dce_v11_0_crtc_disable +ffffffff81e2a7b0 t dce_v11_0_crtc_do_set_base +ffffffff81e2aeb0 t __delayed_work_tick +ffffffff81e2b000 t df_v1_7_sw_init +ffffffff81e2b040 t df_v1_7_sw_fini +ffffffff81e2b070 t df_v1_7_enable_broadcast_mode +ffffffff81e2b1a0 t df_v1_7_get_fb_channel_number +ffffffff81e2b230 t df_v1_7_get_hbm_channel_number +ffffffff81e2b280 t df_v1_7_update_medium_grain_clock_gating +ffffffff81e2b400 t df_v1_7_get_clockgating_state +ffffffff81e2b490 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81e2c000 t df_v3_6_sw_init +ffffffff81e2c150 t df_v3_6_sw_fini +ffffffff81e2c180 t df_v3_6_enable_broadcast_mode +ffffffff81e2c2b0 t df_v3_6_get_fb_channel_number +ffffffff81e2c390 t df_v3_6_get_hbm_channel_number +ffffffff81e2c3e0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81e2c580 t df_v3_6_get_clockgating_state +ffffffff81e2c610 t df_v3_6_pmc_start +ffffffff81e2c910 t df_v3_6_pmc_stop +ffffffff81e2cbb0 t df_v3_6_pmc_get_count +ffffffff81e2cd40 t df_v3_6_get_fica +ffffffff81e2ce30 t df_v3_6_set_fica +ffffffff81e2cf10 t df_v3_6_query_ras_poison_mode +ffffffff81e2e000 t df_v4_3_query_ras_poison_mode +ffffffff81e2f000 T dimgrey_cavefish_reg_base_init +ffffffff81e30000 T emu_soc_asic_init +ffffffff81e31000 t gfx_v10_0_early_init +ffffffff81e31800 t gfx_v10_0_late_init +ffffffff81e31870 t gfx_v10_0_sw_init +ffffffff81e31d80 t gfx_v10_0_sw_fini +ffffffff81e31fa0 t gfx_v10_0_hw_init +ffffffff81e34d00 t gfx_v10_0_hw_fini +ffffffff81e34de0 t gfx_v10_0_suspend +ffffffff81e34e20 t gfx_v10_0_resume +ffffffff81e34e30 t gfx_v10_0_is_idle +ffffffff81e34ec0 t gfx_v10_0_wait_for_idle +ffffffff81e34fc0 t gfx_v10_0_soft_reset +ffffffff81e35320 t gfx_v10_0_set_clockgating_state +ffffffff81e355d0 t gfx_v10_0_set_powergating_state +ffffffff81e35690 t gfx_v10_0_get_clockgating_state +ffffffff81e357a0 t gfx_v10_0_get_gpu_clock_counter +ffffffff81e35cb0 t gfx_v10_0_select_se_sh +ffffffff81e35d50 t gfx_v10_0_read_wave_data +ffffffff81e35fb0 t gfx_v10_0_read_wave_vgprs +ffffffff81e35fe0 t gfx_v10_0_read_wave_sgprs +ffffffff81e36060 t gfx_v10_0_select_me_pipe_q +ffffffff81e36080 t gfx_v10_0_init_spm_golden_registers +ffffffff81e360f0 t gfx_v10_0_update_perfmon_mgcg +ffffffff81e36220 t wave_read_ind +ffffffff81e36310 t wave_read_regs +ffffffff81e36470 t gfx10_kiq_set_resources +ffffffff81e36790 t gfx10_kiq_map_queues +ffffffff81e36b20 t gfx10_kiq_unmap_queues +ffffffff81e36f20 t gfx10_kiq_query_status +ffffffff81e37210 t gfx10_kiq_invalidate_tlbs +ffffffff81e37330 t gfx_v10_0_ring_get_rptr_compute +ffffffff81e37360 t gfx_v10_0_ring_get_wptr_compute +ffffffff81e373d0 t gfx_v10_0_ring_set_wptr_compute +ffffffff81e37510 t gfx_v10_0_ring_emit_ib_compute +ffffffff81e37850 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81e37c80 t gfx_v10_0_ring_test_ring +ffffffff81e37ee0 t gfx_v10_0_ring_test_ib +ffffffff81e38170 t gfx_v10_0_ring_emit_rreg +ffffffff81e38400 t gfx_v10_0_ring_emit_wreg +ffffffff81e38630 t gfx_v10_0_ring_emit_reg_wait +ffffffff81e38680 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81e38710 t gfx_v10_0_wait_reg_mem +ffffffff81e38a40 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81e38a70 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81e38b80 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81e38d90 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81e39410 t gfx_v10_0_ring_emit_fence +ffffffff81e397e0 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81e39840 t gfx_v10_0_ring_emit_vm_flush +ffffffff81e39a10 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81e39ae0 t gfx_v10_0_ring_emit_gds_switch +ffffffff81e39bc0 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81e39df0 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81e39eb0 t gfx_v10_0_ring_emit_sb +ffffffff81e39fa0 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81e3a490 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81e3a5a0 t gfx_v10_0_ring_soft_recovery +ffffffff81e3a610 t gfx_v10_0_ring_preempt_ib +ffffffff81e3a780 t gfx_v10_0_emit_mem_sync +ffffffff81e3aab0 t gfx_v10_0_write_data_to_reg +ffffffff81e3acc0 t gfx_v10_0_set_eop_interrupt_state +ffffffff81e3ada0 t gfx_v10_0_eop_irq +ffffffff81e3af50 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81e3b0f0 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81e3b2b0 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81e3b5a0 t gfx_v10_0_kiq_irq +ffffffff81e3b620 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81e3b760 t gfx_v10_0_priv_reg_irq +ffffffff81e3b7c0 t gfx_v10_0_handle_priv_fault +ffffffff81e3b920 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81e3ba60 t gfx_v10_0_priv_inst_irq +ffffffff81e3bac0 t gfx_v10_0_is_rlc_enabled +ffffffff81e3bb50 t gfx_v10_0_set_safe_mode +ffffffff81e3be00 t gfx_v10_0_unset_safe_mode +ffffffff81e3beb0 t gfx_v10_0_rlc_init +ffffffff81e3bed0 t gfx_v10_0_get_csb_size +ffffffff81e3bf00 t gfx_v10_0_get_csb_buffer +ffffffff81e3c070 t gfx_v10_0_rlc_resume +ffffffff81e3cae0 t gfx_v10_0_rlc_stop +ffffffff81e3cbc0 t gfx_v10_0_rlc_reset +ffffffff81e3cd70 t gfx_v10_0_rlc_start +ffffffff81e3cf20 t gfx_v10_0_update_spm_vmid +ffffffff81e3cf60 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81e3d880 t gfx_v10_0_init_csb +ffffffff81e3db60 t gfx_v10_0_update_spm_vmid_internal +ffffffff81e3dc80 t gfx_v10_0_rlc_backdoor_autoload_config_mec_cache +ffffffff81e3df50 t gfx_v10_0_is_rlcg_access_range +ffffffff81e3df80 t gfx_v10_0_gfx_mqd_init +ffffffff81e3e370 t gfx_v10_0_compute_mqd_init +ffffffff81e3e820 t gfx_v10_0_mec_init +ffffffff81e3ea30 t gfx_v10_0_compute_ring_init +ffffffff81e3eb70 t gfx_v10_0_rlc_backdoor_autoload_buffer_init +ffffffff81e3edd0 t gfx_v10_0_gpu_early_init +ffffffff81e3f030 t amdgpu_bo_unreserve +ffffffff81e3f110 t gfx_v10_0_cp_resume +ffffffff81e41b00 t gfx_v10_3_get_disabled_sa +ffffffff81e41c20 t gfx_v10_0_get_rb_active_bitmap +ffffffff81e41d50 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81e41e60 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81e41f70 t gfx_v10_0_cp_gfx_enable +ffffffff81e421e0 t gfx_v10_0_cp_compute_enable +ffffffff81e42380 t amdgpu_bo_reserve +ffffffff81e42500 t gfx_v10_0_kiq_init_register +ffffffff81e433a0 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81e434a0 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81e43780 t gfx_v10_0_cp_gfx_start +ffffffff81e44170 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81e444c0 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81e44c00 t gfx_v10_0_update_3d_clock_gating +ffffffff81e44ff0 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81e453d0 t gfx_v10_cntl_pg +ffffffff81e46000 t gfx_v11_0_early_init +ffffffff81e46750 t gfx_v11_0_late_init +ffffffff81e467c0 t gfx_v11_0_sw_init +ffffffff81e46d00 t gfx_v11_0_sw_fini +ffffffff81e46f10 t gfx_v11_0_hw_init +ffffffff81e4b320 t gfx_v11_0_hw_fini +ffffffff81e4b420 t gfx_v11_0_suspend +ffffffff81e4b460 t gfx_v11_0_resume +ffffffff81e4b470 t gfx_v11_0_is_idle +ffffffff81e4b500 t gfx_v11_0_wait_for_idle +ffffffff81e4b600 t gfx_v11_0_check_soft_reset +ffffffff81e4b730 t gfx_v11_0_soft_reset +ffffffff81e4c470 t gfx_v11_0_post_soft_reset +ffffffff81e4c480 t gfx_v11_0_set_clockgating_state +ffffffff81e4d0c0 t gfx_v11_0_set_powergating_state +ffffffff81e4d160 t gfx_v11_0_get_clockgating_state +ffffffff81e4d330 t gfx_v11_0_get_gpu_clock_counter +ffffffff81e4d6b0 t gfx_v11_0_select_se_sh +ffffffff81e4d750 t gfx_v11_0_read_wave_data +ffffffff81e4d990 t gfx_v11_0_read_wave_vgprs +ffffffff81e4d9c0 t gfx_v11_0_read_wave_sgprs +ffffffff81e4da40 t gfx_v11_0_select_me_pipe_q +ffffffff81e4da60 t gfx_v11_0_update_perf_clk +ffffffff81e4db90 t gfx_v11_0_get_gfx_shadow_info +ffffffff81e4dc00 t wave_read_ind +ffffffff81e4dcf0 t wave_read_regs +ffffffff81e4de50 t gfx11_kiq_set_resources +ffffffff81e4e170 t gfx11_kiq_map_queues +ffffffff81e4e500 t gfx11_kiq_unmap_queues +ffffffff81e4e900 t gfx11_kiq_query_status +ffffffff81e4ebf0 t gfx11_kiq_invalidate_tlbs +ffffffff81e4ed10 t gfx_v11_0_ring_get_rptr_compute +ffffffff81e4ed40 t gfx_v11_0_ring_get_wptr_compute +ffffffff81e4edb0 t gfx_v11_0_ring_set_wptr_compute +ffffffff81e4eef0 t gfx_v11_0_ring_emit_ib_compute +ffffffff81e4f230 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81e4f660 t gfx_v11_0_ring_test_ring +ffffffff81e4f8e0 t gfx_v11_0_ring_test_ib +ffffffff81e4fb80 t gfx_v11_0_ring_emit_rreg +ffffffff81e4fe10 t gfx_v11_0_ring_emit_wreg +ffffffff81e50040 t gfx_v11_0_ring_emit_reg_wait +ffffffff81e50090 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81e50100 t gfx_v11_0_wait_reg_mem +ffffffff81e50430 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81e50460 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81e50570 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81e50790 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81e50e20 t gfx_v11_0_ring_emit_fence +ffffffff81e511f0 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81e51250 t gfx_v11_0_ring_emit_vm_flush +ffffffff81e51420 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81e514f0 t gfx_v11_0_ring_emit_gds_switch +ffffffff81e515d0 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81e51800 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81e518c0 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81e51a20 t gfx_v11_0_ring_emit_gfx_shadow +ffffffff81e51de0 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81e51ef0 t gfx_v11_0_ring_soft_recovery +ffffffff81e51f60 t gfx_v11_0_ring_preempt_ib +ffffffff81e520d0 t gfx_v11_0_emit_mem_sync +ffffffff81e52400 t gfx_v11_0_write_data_to_reg +ffffffff81e52610 t gfx_v11_0_set_eop_interrupt_state +ffffffff81e526a0 t gfx_v11_0_eop_irq +ffffffff81e52850 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81e529f0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81e52b80 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81e52cc0 t gfx_v11_0_priv_reg_irq +ffffffff81e52d20 t gfx_v11_0_handle_priv_fault +ffffffff81e52e80 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81e52fc0 t gfx_v11_0_priv_inst_irq +ffffffff81e53020 t gfx_v11_0_rlc_gc_fed_irq +ffffffff81e53070 t gfx_v11_0_is_rlc_enabled +ffffffff81e53100 t gfx_v11_0_set_safe_mode +ffffffff81e53260 t gfx_v11_0_unset_safe_mode +ffffffff81e532d0 t gfx_v11_0_rlc_init +ffffffff81e53350 t gfx_v11_0_get_csb_size +ffffffff81e53380 t gfx_v11_0_get_csb_buffer +ffffffff81e534f0 t gfx_v11_0_rlc_resume +ffffffff81e54250 t gfx_v11_0_rlc_stop +ffffffff81e54330 t gfx_v11_0_rlc_reset +ffffffff81e544e0 t gfx_v11_0_rlc_start +ffffffff81e54690 t gfx_v11_0_update_spm_vmid +ffffffff81e54790 t gfx_v11_0_init_csb +ffffffff81e54920 t gfx_v11_0_gfx_mqd_init +ffffffff81e54d00 t gfx_v11_0_compute_mqd_init +ffffffff81e55230 t gfx_v11_0_mec_init +ffffffff81e55370 t gfx_v11_0_compute_ring_init +ffffffff81e554b0 t gfx_v11_0_rlc_autoload_buffer_init +ffffffff81e556a0 t gfx_v11_0_gpu_early_init +ffffffff81e55770 t amdgpu_bo_unreserve +ffffffff81e55850 t gfx_v11_0_disable_gpa_mode +ffffffff81e559f0 t gfx_v11_0_cp_resume +ffffffff81e59810 t gfx_v11_0_config_me_cache +ffffffff81e59bd0 t gfx_v11_0_config_pfp_cache +ffffffff81e59f90 t gfx_v11_0_config_mec_cache +ffffffff81e5a350 t gfx_v11_0_get_sa_active_bitmap +ffffffff81e5a470 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81e5a580 t gfx_v11_0_cp_compute_enable +ffffffff81e5a760 t gfx_v11_0_cp_gfx_enable +ffffffff81e5a970 t amdgpu_bo_reserve +ffffffff81e5aaf0 t gfx_v11_0_kiq_init_register +ffffffff81e5b990 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81e5ba70 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81e5bc50 t gfx_v11_0_cp_gfx_start +ffffffff81e5c4d0 t gfx_v11_cntl_pg +ffffffff81e5d000 t gfx_v11_0_3_rlc_gc_fed_irq +ffffffff81e5d200 t gfx_v11_0_3_poison_consumption_handler +ffffffff81e5e000 t gfx_v8_0_early_init +ffffffff81e5e2f0 t gfx_v8_0_late_init +ffffffff81e5ea10 t gfx_v8_0_sw_init +ffffffff81e5edd0 t gfx_v8_0_sw_fini +ffffffff81e5ef70 t gfx_v8_0_hw_init +ffffffff81e61110 t gfx_v8_0_hw_fini +ffffffff81e615c0 t gfx_v8_0_suspend +ffffffff81e61600 t gfx_v8_0_resume +ffffffff81e61610 t gfx_v8_0_is_idle +ffffffff81e61680 t gfx_v8_0_wait_for_idle +ffffffff81e61730 t gfx_v8_0_check_soft_reset +ffffffff81e61810 t gfx_v8_0_pre_soft_reset +ffffffff81e61970 t gfx_v8_0_soft_reset +ffffffff81e61b30 t gfx_v8_0_post_soft_reset +ffffffff81e61cb0 t gfx_v8_0_set_clockgating_state +ffffffff81e61f30 t gfx_v8_0_set_powergating_state +ffffffff81e622e0 t gfx_v8_0_get_clockgating_state +ffffffff81e623c0 t gfx_v8_0_get_gpu_clock_counter +ffffffff81e62460 t gfx_v8_0_select_se_sh +ffffffff81e624c0 t gfx_v8_0_read_wave_data +ffffffff81e62960 t gfx_v8_0_read_wave_sgprs +ffffffff81e62a10 t gfx_v8_0_select_me_pipe_q +ffffffff81e62a30 t gfx_v8_0_ring_get_rptr +ffffffff81e62a60 t gfx_v8_0_ring_get_wptr_compute +ffffffff81e62a90 t gfx_v8_0_ring_set_wptr_compute +ffffffff81e62ad0 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81e62ef0 t gfx_v8_0_ring_test_ring +ffffffff81e630f0 t gfx_v8_0_ring_emit_rreg +ffffffff81e63380 t gfx_v8_0_ring_emit_wreg +ffffffff81e635b0 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81e63610 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81e63680 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81e63be0 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81e640d0 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81e643c0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81e64770 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81e64a90 t gfx_v8_0_ring_emit_gds_switch +ffffffff81e65240 t gfx_v8_0_ring_test_ib +ffffffff81e653f0 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81e65620 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81e656d0 t gfx_v8_ring_emit_sb +ffffffff81e657c0 t gfx_v8_ring_emit_cntxcntl +ffffffff81e65d60 t gfx_v8_0_ring_soft_recovery +ffffffff81e65d90 t gfx_v8_0_emit_mem_sync +ffffffff81e65f90 t gfx_v8_0_ring_emit_ib_compute +ffffffff81e66290 t gfx_v8_0_ring_emit_fence_compute +ffffffff81e66590 t gfx_v8_0_emit_mem_sync_compute +ffffffff81e66850 t gfx_v8_0_emit_wave_limit +ffffffff81e66a00 t gfx_v8_0_set_eop_interrupt_state +ffffffff81e66c10 t gfx_v8_0_eop_irq +ffffffff81e66d20 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81e66da0 t gfx_v8_0_priv_reg_irq +ffffffff81e66ea0 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81e66f20 t gfx_v8_0_priv_inst_irq +ffffffff81e67020 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81e67280 t gfx_v8_0_cp_ecc_error_irq +ffffffff81e672d0 t gfx_v8_0_set_sq_int_state +ffffffff81e67360 t gfx_v8_0_sq_irq +ffffffff81e673d0 t gfx_v8_0_parse_sq_irq +ffffffff81e67620 t gfx_v8_0_is_rlc_enabled +ffffffff81e67660 t gfx_v8_0_set_safe_mode +ffffffff81e67760 t gfx_v8_0_unset_safe_mode +ffffffff81e67800 t gfx_v8_0_rlc_init +ffffffff81e678b0 t gfx_v8_0_get_csb_size +ffffffff81e678e0 t gfx_v8_0_get_csb_buffer +ffffffff81e67a50 t gfx_v8_0_cp_jump_table_num +ffffffff81e67a90 t gfx_v8_0_rlc_resume +ffffffff81e67e10 t gfx_v8_0_rlc_stop +ffffffff81e67e80 t gfx_v8_0_rlc_reset +ffffffff81e67f00 t gfx_v8_0_rlc_start +ffffffff81e67f80 t gfx_v8_0_update_spm_vmid +ffffffff81e67ff0 t gfx_v8_0_init_save_restore_list +ffffffff81e68400 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81e68620 t gfx_v8_0_sq_irq_work_func +ffffffff81e68640 t gfx_v8_0_init_microcode +ffffffff81e68ec0 t gfx_v8_0_mec_init +ffffffff81e68fc0 t gfx_v8_0_compute_ring_init +ffffffff81e690f0 t gfx_v8_0_gpu_early_init +ffffffff81e69590 t amdgpu_bo_unreserve +ffffffff81e69670 t gfx_v8_0_kiq_resume +ffffffff81e69920 t gfx_v8_0_cp_gfx_resume +ffffffff81e6a3e0 t gfx_v8_0_kcq_resume +ffffffff81e6ada0 t amdgpu_bo_reserve +ffffffff81e6af20 t gfx_v8_0_mqd_commit +ffffffff81e6b100 t gfx_v8_0_mqd_init +ffffffff81e6b520 t gfx_v8_0_deactivate_hqd +ffffffff81e6b5e0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e6b920 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e6c000 t gfx_v9_0_ras_error_inject +ffffffff81e6c1b0 t gfx_v9_0_query_ras_error_count +ffffffff81e6cd80 t gfx_v9_0_reset_ras_error_count +ffffffff81e6d7b0 T gfx_v9_0_select_se_sh +ffffffff81e6d850 t gfx_v9_0_early_init +ffffffff81e6e380 t gfx_v9_0_late_init +ffffffff81e6f270 t gfx_v9_0_sw_init +ffffffff81e6f930 t gfx_v9_0_sw_fini +ffffffff81e6faf0 t gfx_v9_0_hw_init +ffffffff81e72ad0 t gfx_v9_0_hw_fini +ffffffff81e73280 t gfx_v9_0_suspend +ffffffff81e732c0 t gfx_v9_0_resume +ffffffff81e732d0 t gfx_v9_0_is_idle +ffffffff81e73350 t gfx_v9_0_wait_for_idle +ffffffff81e73440 t gfx_v9_0_soft_reset +ffffffff81e737e0 t gfx_v9_0_set_clockgating_state +ffffffff81e738b0 t gfx_v9_0_set_powergating_state +ffffffff81e73ca0 t gfx_v9_0_get_clockgating_state +ffffffff81e73db0 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e74540 t gfx_v9_0_read_wave_data +ffffffff81e74780 t gfx_v9_0_read_wave_vgprs +ffffffff81e747e0 t gfx_v9_0_read_wave_sgprs +ffffffff81e74810 t gfx_v9_0_select_me_pipe_q +ffffffff81e74830 t wave_read_ind +ffffffff81e74920 t wave_read_regs +ffffffff81e74a70 t gfx_v9_0_kiq_set_resources +ffffffff81e74d90 t gfx_v9_0_kiq_map_queues +ffffffff81e750d0 t gfx_v9_0_kiq_unmap_queues +ffffffff81e75400 t gfx_v9_0_kiq_query_status +ffffffff81e756f0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e75810 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e75840 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e758b0 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e75910 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e75d40 t gfx_v9_0_ring_test_ring +ffffffff81e75f70 t gfx_v9_0_ring_emit_rreg +ffffffff81e76200 t gfx_v9_0_ring_emit_wreg +ffffffff81e76430 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e76480 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e76520 t gfx_v9_0_wait_reg_mem +ffffffff81e76850 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e76880 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e76990 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e76ac0 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e77140 t gfx_v9_0_ring_emit_fence +ffffffff81e77500 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e77560 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e77670 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e77740 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e77820 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e77a50 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e77b10 t gfx_v9_ring_emit_sb +ffffffff81e77c00 t gfx_v9_ring_emit_cntxcntl +ffffffff81e780e0 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e781f0 t gfx_v9_0_ring_soft_recovery +ffffffff81e78260 t gfx_v9_0_ring_preempt_ib +ffffffff81e78420 t gfx_v9_0_emit_mem_sync +ffffffff81e786e0 t gfx_v9_0_write_data_to_reg +ffffffff81e788f0 t gfx_v9_0_ring_test_ib +ffffffff81e78aa0 t gfx_v9_0_ring_patch_cntl +ffffffff81e78ae0 t gfx_v9_0_ring_patch_ce_meta +ffffffff81e78be0 t gfx_v9_0_ring_patch_de_meta +ffffffff81e78cb0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e78fe0 t gfx_v9_0_emit_wave_limit +ffffffff81e791c0 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e793a0 t gfx_v9_0_eop_irq +ffffffff81e794e0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e796a0 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e797e0 t gfx_v9_0_priv_reg_irq +ffffffff81e798e0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e79a20 t gfx_v9_0_priv_inst_irq +ffffffff81e79b20 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e7a3b0 t gfx_v9_0_is_rlc_enabled +ffffffff81e7a440 t gfx_v9_0_set_safe_mode +ffffffff81e7a5a0 t gfx_v9_0_unset_safe_mode +ffffffff81e7a610 t gfx_v9_0_rlc_init +ffffffff81e7a680 t gfx_v9_0_get_csb_size +ffffffff81e7a6b0 t gfx_v9_0_get_csb_buffer +ffffffff81e7a7f0 t gfx_v9_0_cp_jump_table_num +ffffffff81e7a840 t gfx_v9_0_rlc_resume +ffffffff81e7bf50 t gfx_v9_0_rlc_stop +ffffffff81e7c2f0 t gfx_v9_0_rlc_reset +ffffffff81e7c490 t gfx_v9_0_rlc_start +ffffffff81e7c5e0 t gfx_v9_0_update_spm_vmid +ffffffff81e7c620 t gfx_v9_0_is_rlcg_access_range +ffffffff81e7c670 t gfx_v9_0_init_csb +ffffffff81e7c800 t gfx_v9_0_enable_lbpw +ffffffff81e7c8f0 t gfx_v9_0_update_spm_vmid_internal +ffffffff81e7ca10 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e7cca0 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e7cda0 t gfx_v9_0_mec_init +ffffffff81e7cf90 t gfx_v9_0_compute_ring_init +ffffffff81e7d0d0 t gfx_v9_0_gpu_early_init +ffffffff81e7d510 t amdgpu_bo_unreserve +ffffffff81e7d5f0 t gfx_v9_0_cp_gfx_enable +ffffffff81e7d6e0 t amdgpu_bo_reserve +ffffffff81e7d860 t gfx_v9_0_kiq_init_register +ffffffff81e7e540 t gfx_v9_0_mqd_init +ffffffff81e7ea90 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e7efc0 t gfx_v9_0_update_3d_clock_gating +ffffffff81e7f3b0 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e80000 t gfx_v9_4_query_ras_error_count +ffffffff81e80e00 t gfx_v9_4_query_ras_error_status +ffffffff81e80fe0 t gfx_v9_4_reset_ras_error_count +ffffffff81e82000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e82750 T gfx_v9_4_2_init_golden_registers +ffffffff81e827f0 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e828d0 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e82ab0 t gfx_v9_4_2_query_ras_error_count +ffffffff81e82b60 t gfx_v9_4_2_query_ras_error_status +ffffffff81e833c0 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e83420 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e838f0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e83b20 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e83ba0 t gfx_v9_4_2_run_shader +ffffffff81e83fa0 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e845f0 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e84930 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e84b10 t wave_read_ind +ffffffff81e85000 t gfx_v9_4_3_xcp_suspend +ffffffff81e850a0 t gfx_v9_4_3_xcp_resume +ffffffff81e851e0 t gfx_v9_4_3_query_ras_error_count +ffffffff81e85200 t gfx_v9_4_3_query_ras_error_status +ffffffff81e85220 t gfx_v9_4_3_reset_ras_error_count +ffffffff81e85240 t gfx_v9_4_3_reset_ras_error_status +ffffffff81e85260 t gfx_v9_4_3_enable_watchdog_timer +ffffffff81e85280 t gfx_v9_4_3_early_init +ffffffff81e85940 t gfx_v9_4_3_late_init +ffffffff81e859c0 t gfx_v9_4_3_sw_init +ffffffff81e85e20 t gfx_v9_4_3_sw_fini +ffffffff81e85fd0 t gfx_v9_4_3_hw_init +ffffffff81e86a70 t gfx_v9_4_3_hw_fini +ffffffff81e86b30 t gfx_v9_4_3_suspend +ffffffff81e86bf0 t gfx_v9_4_3_resume +ffffffff81e86c00 t gfx_v9_4_3_is_idle +ffffffff81e86db0 t gfx_v9_4_3_wait_for_idle +ffffffff81e86e40 t gfx_v9_4_3_soft_reset +ffffffff81e87550 t gfx_v9_4_3_set_clockgating_state +ffffffff81e876b0 t gfx_v9_4_3_set_powergating_state +ffffffff81e876e0 t gfx_v9_4_3_get_clockgating_state +ffffffff81e87850 t gfx_v9_4_3_kiq_set_resources +ffffffff81e87b70 t gfx_v9_4_3_kiq_map_queues +ffffffff81e87ed0 t gfx_v9_4_3_kiq_unmap_queues +ffffffff81e88250 t gfx_v9_4_3_kiq_query_status +ffffffff81e88540 t gfx_v9_4_3_kiq_invalidate_tlbs +ffffffff81e88660 t gfx_v9_4_3_ring_get_rptr_compute +ffffffff81e886a0 t gfx_v9_4_3_ring_get_wptr_compute +ffffffff81e88710 t gfx_v9_4_3_ring_set_wptr_compute +ffffffff81e88770 t gfx_v9_4_3_ring_emit_fence_kiq +ffffffff81e88bc0 t gfx_v9_4_3_ring_test_ring +ffffffff81e88e20 t gfx_v9_4_3_ring_emit_rreg +ffffffff81e890b0 t gfx_v9_4_3_ring_emit_wreg +ffffffff81e892e0 t gfx_v9_4_3_ring_emit_reg_wait +ffffffff81e89330 t gfx_v9_4_3_ring_emit_reg_write_reg_wait +ffffffff81e89350 t gfx_v9_4_3_wait_reg_mem +ffffffff81e89680 t gfx_v9_4_3_ring_emit_ib_compute +ffffffff81e899b0 t gfx_v9_4_3_ring_emit_fence +ffffffff81e89d60 t gfx_v9_4_3_ring_emit_pipeline_sync +ffffffff81e89dc0 t gfx_v9_4_3_ring_emit_vm_flush +ffffffff81e89de0 t gfx_v9_4_3_ring_emit_hdp_flush +ffffffff81e89eb0 t gfx_v9_4_3_ring_emit_gds_switch +ffffffff81e8a050 t gfx_v9_4_3_ring_test_ib +ffffffff81e8a200 t gfx_v9_4_3_emit_mem_sync +ffffffff81e8a4c0 t gfx_v9_4_3_emit_wave_limit +ffffffff81e8a6b0 t gfx_v9_4_3_write_data_to_reg +ffffffff81e8a8c0 t gfx_v9_4_3_set_eop_interrupt_state +ffffffff81e8aa30 t gfx_v9_4_3_eop_irq +ffffffff81e8abd0 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state +ffffffff81e8ad30 t gfx_v9_4_3_ih_to_xcc_inst +ffffffff81e8ae00 t gfx_v9_4_3_set_priv_reg_fault_state +ffffffff81e8b1e0 t gfx_v9_4_3_priv_reg_irq +ffffffff81e8b240 t gfx_v9_4_3_fault +ffffffff81e8b3c0 t gfx_v9_4_3_set_priv_inst_fault_state +ffffffff81e8b7a0 t gfx_v9_4_3_priv_inst_irq +ffffffff81e8b800 t gfx_v9_4_3_is_rlc_enabled +ffffffff81e8b920 t gfx_v9_4_3_xcc_set_safe_mode +ffffffff81e8bbc0 t gfx_v9_4_3_xcc_unset_safe_mode +ffffffff81e8bce0 t gfx_v9_4_3_rlc_init +ffffffff81e8bd30 t gfx_v9_4_3_rlc_resume +ffffffff81e8bdf0 t gfx_v9_4_3_rlc_stop +ffffffff81e8be90 t gfx_v9_4_3_rlc_reset +ffffffff81e8c520 t gfx_v9_4_3_rlc_start +ffffffff81e8c5c0 t gfx_v9_4_3_update_spm_vmid +ffffffff81e8c7d0 t gfx_v9_4_3_is_rlcg_access_range +ffffffff81e8c880 t gfx_v9_4_3_xcc_rlc_resume +ffffffff81e8d0d0 t gfx_v9_4_3_xcc_rlc_stop +ffffffff81e8d7f0 t gfx_v9_4_3_xcc_rlc_start +ffffffff81e8db80 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt +ffffffff81e8dda0 t gfx_v9_4_3_xcc_select_se_sh +ffffffff81e8dfa0 t gfx_v9_4_3_mec_init +ffffffff81e8e2a0 t gfx_v9_4_3_gpu_early_init +ffffffff81e8e4d0 t amdgpu_bo_unreserve +ffffffff81e8e5b0 t gfx_v9_4_3_get_gpu_clock_counter +ffffffff81e8e8f0 t gfx_v9_4_3_read_wave_data +ffffffff81e8ebc0 t gfx_v9_4_3_read_wave_vgprs +ffffffff81e8ebe0 t gfx_v9_4_3_read_wave_sgprs +ffffffff81e8ec30 t gfx_v9_4_3_select_me_pipe_q +ffffffff81e8eca0 t gfx_v9_4_3_switch_compute_partition +ffffffff81e8f000 t wave_read_ind +ffffffff81e8f200 t wave_read_regs +ffffffff81e8f490 t gfx_v9_4_3_xcc_constants_init +ffffffff81e90510 t gfx_v9_4_3_xcc_cp_resume +ffffffff81e914c0 t gfx_v9_4_3_xcc_cp_compute_enable +ffffffff81e91660 t amdgpu_bo_reserve +ffffffff81e917e0 t gfx_v9_4_3_xcc_kiq_init_register +ffffffff81e93420 t gfx_v9_4_3_xcc_mqd_init +ffffffff81e93e60 t gfx_v9_4_3_xcc_fini +ffffffff81e94400 t gfx_v9_4_3_xcc_q_fini_register +ffffffff81e94db0 t gfx_v9_4_3_xcc_update_sram_fgcg +ffffffff81e95020 t gfx_v9_4_3_xcc_update_repeater_fgcg +ffffffff81e95290 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating +ffffffff81e95de0 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating +ffffffff81e96640 t gfx_v9_4_3_inst_query_ras_err_count +ffffffff81e968a0 t gfx_v9_4_3_inst_query_ras_err_status +ffffffff81e97620 t gfx_v9_4_3_inst_reset_ras_err_count +ffffffff81e977e0 t gfx_v9_4_3_inst_reset_ras_err_status +ffffffff81e97f60 t gfx_v9_4_3_inst_enable_watchdog_timer +ffffffff81e99000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e99090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e991d0 t gfxhub_v1_0_gart_enable +ffffffff81e9a700 t gfxhub_v1_0_gart_disable +ffffffff81e9a9a0 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e9aaa0 t gfxhub_v1_0_init +ffffffff81e9b000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e9c000 t gfxhub_v1_2_get_mc_fb_offset +ffffffff81e9c120 t gfxhub_v1_2_setup_vm_pt_regs +ffffffff81e9c190 t gfxhub_v1_2_gart_enable +ffffffff81e9c220 t gfxhub_v1_2_gart_disable +ffffffff81e9c280 t gfxhub_v1_2_set_fault_enable_default +ffffffff81e9c2f0 t gfxhub_v1_2_init +ffffffff81e9c5f0 t gfxhub_v1_2_get_xgmi_info +ffffffff81e9c860 t gfxhub_v1_2_xcp_suspend +ffffffff81e9c8a0 t gfxhub_v1_2_xcp_resume +ffffffff81e9c910 t gfxhub_v1_2_xcc_setup_vm_pt_regs +ffffffff81e9cc30 t gfxhub_v1_2_xcc_gart_enable +ffffffff81ea0070 t gfxhub_v1_2_xcc_gart_disable +ffffffff81ea06e0 t gfxhub_v1_2_xcc_set_fault_enable_default +ffffffff81ea1000 t gfxhub_v2_0_get_fb_location +ffffffff81ea1090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81ea1120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81ea1260 t gfxhub_v2_0_gart_enable +ffffffff81ea2490 t gfxhub_v2_0_gart_disable +ffffffff81ea26e0 t gfxhub_v2_0_set_fault_enable_default +ffffffff81ea27e0 t gfxhub_v2_0_init +ffffffff81ea28b0 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81ea2a90 t gfxhub_v2_0_get_invalidate_req +ffffffff81ea3000 t gfxhub_v2_1_get_fb_location +ffffffff81ea3090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81ea3120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81ea3260 t gfxhub_v2_1_gart_enable +ffffffff81ea4560 t gfxhub_v2_1_gart_disable +ffffffff81ea47b0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81ea48d0 t gfxhub_v2_1_init +ffffffff81ea49a0 t gfxhub_v2_1_get_xgmi_info +ffffffff81ea4ae0 t gfxhub_v2_1_utcl2_harvest +ffffffff81ea4cc0 t gfxhub_v2_1_save_regs +ffffffff81ea5730 t gfxhub_v2_1_restore_regs +ffffffff81ea6350 t gfxhub_v2_1_halt +ffffffff81ea6720 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81ea6900 t gfxhub_v2_1_get_invalidate_req +ffffffff81ea7000 t gfxhub_v3_0_get_fb_location +ffffffff81ea7090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81ea7120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81ea7260 t gfxhub_v3_0_gart_enable +ffffffff81ea8560 t gfxhub_v3_0_gart_disable +ffffffff81ea8800 t gfxhub_v3_0_set_fault_enable_default +ffffffff81ea89d0 t gfxhub_v3_0_init +ffffffff81ea8aa0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81ea8c80 t gfxhub_v3_0_get_invalidate_req +ffffffff81ea9000 t gfxhub_v3_0_3_get_fb_location +ffffffff81ea9090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81ea9120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81ea9260 t gfxhub_v3_0_3_gart_enable +ffffffff81eaa450 t gfxhub_v3_0_3_gart_disable +ffffffff81eaa6f0 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81eaa810 t gfxhub_v3_0_3_init +ffffffff81eaa8e0 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81eaaac0 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81eab000 t gmc_v10_0_early_init +ffffffff81eab170 t gmc_v10_0_late_init +ffffffff81eab1e0 t gmc_v10_0_sw_init +ffffffff81eab5d0 t gmc_v10_0_sw_fini +ffffffff81eab620 t gmc_v10_0_hw_init +ffffffff81eab830 t gmc_v10_0_hw_fini +ffffffff81eab8f0 t gmc_v10_0_suspend +ffffffff81eab930 t gmc_v10_0_resume +ffffffff81eab990 t gmc_v10_0_is_idle +ffffffff81eab9c0 t gmc_v10_0_wait_for_idle +ffffffff81eab9f0 t gmc_v10_0_soft_reset +ffffffff81eaba20 t gmc_v10_0_set_clockgating_state +ffffffff81eabad0 t gmc_v10_0_set_powergating_state +ffffffff81eabb00 t gmc_v10_0_get_clockgating_state +ffffffff81eabba0 t gmc_v10_0_flush_gpu_tlb +ffffffff81eabe30 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81eac0e0 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81eac290 t gmc_v10_0_emit_pasid_mapping +ffffffff81eac310 t gmc_v10_0_map_mtype +ffffffff81eac360 t gmc_v10_0_get_vm_pde +ffffffff81eac450 t gmc_v10_0_get_vm_pte +ffffffff81eac530 t gmc_v10_0_get_vbios_fb_size +ffffffff81eac6a0 t gmc_v10_0_flush_vm_hub +ffffffff81eacad0 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81eacb70 t gmc_v10_0_process_interrupt +ffffffff81eace50 t gmc_v10_0_ecc_interrupt_state +ffffffff81eace80 t gmc_v10_0_gart_init +ffffffff81ead000 t gmc_v11_0_early_init +ffffffff81ead1f0 t gmc_v11_0_late_init +ffffffff81ead260 t gmc_v11_0_sw_init +ffffffff81ead570 t gmc_v11_0_sw_fini +ffffffff81ead5c0 t gmc_v11_0_hw_init +ffffffff81ead720 t gmc_v11_0_hw_fini +ffffffff81ead7c0 t gmc_v11_0_suspend +ffffffff81ead860 t gmc_v11_0_resume +ffffffff81ead8c0 t gmc_v11_0_is_idle +ffffffff81ead8f0 t gmc_v11_0_wait_for_idle +ffffffff81ead920 t gmc_v11_0_soft_reset +ffffffff81ead950 t gmc_v11_0_set_clockgating_state +ffffffff81ead9d0 t gmc_v11_0_set_powergating_state +ffffffff81eada00 t gmc_v11_0_get_clockgating_state +ffffffff81eada40 t gmc_v11_0_flush_gpu_tlb +ffffffff81eadef0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81eae160 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81eae310 t gmc_v11_0_emit_pasid_mapping +ffffffff81eae390 t gmc_v11_0_map_mtype +ffffffff81eae3e0 t gmc_v11_0_get_vm_pde +ffffffff81eae4e0 t gmc_v11_0_get_vm_pte +ffffffff81eae5c0 t gmc_v11_0_get_vbios_fb_size +ffffffff81eae730 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81eae7d0 t gmc_v11_0_process_interrupt +ffffffff81eaea00 t gmc_v11_0_ecc_interrupt_state +ffffffff81eaea30 t gmc_v11_0_gart_init +ffffffff81eaf000 t gmc_v7_0_early_init +ffffffff81eaf0a0 t gmc_v7_0_late_init +ffffffff81eaf0f0 t gmc_v7_0_sw_init +ffffffff81eaf520 t gmc_v7_0_sw_fini +ffffffff81eaf5a0 t gmc_v7_0_hw_init +ffffffff81eaff20 t gmc_v7_0_hw_fini +ffffffff81eaffe0 t gmc_v7_0_suspend +ffffffff81eb0020 t gmc_v7_0_resume +ffffffff81eb0080 t gmc_v7_0_is_idle +ffffffff81eb00d0 t gmc_v7_0_wait_for_idle +ffffffff81eb0170 t gmc_v7_0_soft_reset +ffffffff81eb03d0 t gmc_v7_0_set_clockgating_state +ffffffff81eb0630 t gmc_v7_0_set_powergating_state +ffffffff81eb0660 t gmc_v7_0_flush_gpu_tlb +ffffffff81eb0690 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81eb0750 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81eb07f0 t gmc_v7_0_emit_pasid_mapping +ffffffff81eb0820 t gmc_v7_0_set_prt +ffffffff81eb09e0 t gmc_v7_0_get_vm_pde +ffffffff81eb0a40 t gmc_v7_0_get_vm_pte +ffffffff81eb0a80 t gmc_v7_0_get_vbios_fb_size +ffffffff81eb0af0 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81eb0bc0 t gmc_v7_0_process_interrupt +ffffffff81eb0e70 t gmc_v7_0_gart_init +ffffffff81eb1000 t gmc_v8_0_early_init +ffffffff81eb10a0 t gmc_v8_0_late_init +ffffffff81eb10f0 t gmc_v8_0_sw_init +ffffffff81eb16a0 t gmc_v8_0_sw_fini +ffffffff81eb1720 t gmc_v8_0_hw_init +ffffffff81eb23b0 t gmc_v8_0_hw_fini +ffffffff81eb2470 t gmc_v8_0_suspend +ffffffff81eb24b0 t gmc_v8_0_resume +ffffffff81eb2510 t gmc_v8_0_is_idle +ffffffff81eb2560 t gmc_v8_0_wait_for_idle +ffffffff81eb2600 t gmc_v8_0_check_soft_reset +ffffffff81eb2670 t gmc_v8_0_pre_soft_reset +ffffffff81eb27e0 t gmc_v8_0_soft_reset +ffffffff81eb28b0 t gmc_v8_0_post_soft_reset +ffffffff81eb2920 t gmc_v8_0_set_clockgating_state +ffffffff81eb2ee0 t gmc_v8_0_set_powergating_state +ffffffff81eb2f10 t gmc_v8_0_get_clockgating_state +ffffffff81eb2f80 t gmc_v8_0_flush_gpu_tlb +ffffffff81eb2fb0 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81eb3070 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81eb3110 t gmc_v8_0_emit_pasid_mapping +ffffffff81eb3140 t gmc_v8_0_set_prt +ffffffff81eb3300 t gmc_v8_0_get_vm_pde +ffffffff81eb3360 t gmc_v8_0_get_vm_pte +ffffffff81eb33b0 t gmc_v8_0_get_vbios_fb_size +ffffffff81eb3420 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81eb34f0 t gmc_v8_0_process_interrupt +ffffffff81eb3890 t gmc_v8_0_gart_init +ffffffff81eb4000 T gmc_v9_0_restore_registers +ffffffff81eb4160 t gmc_v9_0_early_init +ffffffff81eb4510 t gmc_v9_0_late_init +ffffffff81eb4620 t gmc_v9_0_sw_init +ffffffff81eb4d80 t gmc_v9_0_sw_fini +ffffffff81eb4e40 t gmc_v9_0_hw_init +ffffffff81eb5300 t gmc_v9_0_hw_fini +ffffffff81eb53e0 t gmc_v9_0_suspend +ffffffff81eb5420 t gmc_v9_0_resume +ffffffff81eb5480 t gmc_v9_0_is_idle +ffffffff81eb54b0 t gmc_v9_0_wait_for_idle +ffffffff81eb54e0 t gmc_v9_0_soft_reset +ffffffff81eb5510 t gmc_v9_0_set_clockgating_state +ffffffff81eb5570 t gmc_v9_0_set_powergating_state +ffffffff81eb55a0 t gmc_v9_0_get_clockgating_state +ffffffff81eb55e0 t gmc_v9_0_flush_gpu_tlb +ffffffff81eb5c80 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81eb6030 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81eb6230 t gmc_v9_0_emit_pasid_mapping +ffffffff81eb62b0 t gmc_v9_0_map_mtype +ffffffff81eb62f0 t gmc_v9_0_get_vm_pde +ffffffff81eb63f0 t gmc_v9_0_get_vm_pte +ffffffff81eb6720 t gmc_v9_0_override_vm_pte_flags +ffffffff81eb67e0 t gmc_v9_0_get_vbios_fb_size +ffffffff81eb6980 t gmc_v9_0_query_memory_partition +ffffffff81eb69e0 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81eb6e80 t gmc_v9_0_process_interrupt +ffffffff81eb76a0 t gmc_v9_0_ecc_interrupt_state +ffffffff81eb7800 t gmc_v9_0_init_mem_ranges +ffffffff81eb7c30 t gmc_v9_0_gart_init +ffffffff81eb7d60 t gmc_v9_0_save_registers +ffffffff81eb8000 t hdp_v4_0_query_ras_error_count +ffffffff81eb80c0 t hdp_v4_0_reset_ras_error_count +ffffffff81eb81e0 t hdp_v4_0_flush_hdp +ffffffff81eb8230 t hdp_v4_0_invalidate_hdp +ffffffff81eb8310 t hdp_v4_0_update_clock_gating +ffffffff81eb8410 t hdp_v4_0_get_clockgating_state +ffffffff81eb8460 t hdp_v4_0_init_registers +ffffffff81eb9000 t hdp_v5_0_flush_hdp +ffffffff81eb9050 t hdp_v5_0_invalidate_hdp +ffffffff81eb90f0 t hdp_v5_0_update_clock_gating +ffffffff81eb94f0 t hdp_v5_0_get_clockgating_state +ffffffff81eb9610 t hdp_v5_0_init_registers +ffffffff81eba000 t hdp_v5_2_flush_hdp +ffffffff81eba050 t hdp_v5_2_update_clock_gating +ffffffff81eba460 t hdp_v5_2_get_clockgating_state +ffffffff81ebb000 t hdp_v6_0_flush_hdp +ffffffff81ebb050 t hdp_v6_0_update_clock_gating +ffffffff81ebb380 t hdp_v6_0_get_clockgating_state +ffffffff81ebc000 t iceland_ih_early_init +ffffffff81ebc050 t iceland_ih_sw_init +ffffffff81ebc0b0 t iceland_ih_sw_fini +ffffffff81ebc0f0 t iceland_ih_hw_init +ffffffff81ebc310 t iceland_ih_hw_fini +ffffffff81ebc3e0 t iceland_ih_suspend +ffffffff81ebc4b0 t iceland_ih_resume +ffffffff81ebc4f0 t iceland_ih_is_idle +ffffffff81ebc540 t iceland_ih_wait_for_idle +ffffffff81ebc5e0 t iceland_ih_soft_reset +ffffffff81ebc6c0 t iceland_ih_set_clockgating_state +ffffffff81ebc6f0 t iceland_ih_set_powergating_state +ffffffff81ebc720 t iceland_ih_get_wptr +ffffffff81ebc830 t iceland_ih_decode_iv +ffffffff81ebc8b0 t iceland_ih_set_rptr +ffffffff81ebd000 t ih_v6_0_early_init +ffffffff81ebd050 t ih_v6_0_sw_init +ffffffff81ebd1b0 t ih_v6_0_sw_fini +ffffffff81ebd1f0 t ih_v6_0_hw_init +ffffffff81ebd7a0 t ih_v6_0_hw_fini +ffffffff81ebd800 t ih_v6_0_suspend +ffffffff81ebd860 t ih_v6_0_resume +ffffffff81ebd870 t ih_v6_0_is_idle +ffffffff81ebd8a0 t ih_v6_0_wait_for_idle +ffffffff81ebd8d0 t ih_v6_0_soft_reset +ffffffff81ebd900 t ih_v6_0_set_clockgating_state +ffffffff81ebda30 t ih_v6_0_set_powergating_state +ffffffff81ebdbb0 t ih_v6_0_get_clockgating_state +ffffffff81ebdc40 t ih_v6_0_get_wptr +ffffffff81ebdd60 t ih_v6_0_set_rptr +ffffffff81ebde30 t ih_v6_0_self_irq +ffffffff81ebdea0 t ih_v6_0_toggle_interrupts +ffffffff81ebe080 t force_update_wptr_for_self_int +ffffffff81ebf000 t ih_v6_1_early_init +ffffffff81ebf050 t ih_v6_1_sw_init +ffffffff81ebf1b0 t ih_v6_1_sw_fini +ffffffff81ebf1f0 t ih_v6_1_hw_init +ffffffff81ebf7a0 t ih_v6_1_hw_fini +ffffffff81ebf800 t ih_v6_1_suspend +ffffffff81ebf860 t ih_v6_1_resume +ffffffff81ebf870 t ih_v6_1_is_idle +ffffffff81ebf8a0 t ih_v6_1_wait_for_idle +ffffffff81ebf8d0 t ih_v6_1_soft_reset +ffffffff81ebf900 t ih_v6_1_set_clockgating_state +ffffffff81ebfa30 t ih_v6_1_set_powergating_state +ffffffff81ebfbb0 t ih_v6_1_get_clockgating_state +ffffffff81ebfc40 t ih_v6_1_get_wptr +ffffffff81ebfd60 t ih_v6_1_set_rptr +ffffffff81ebfe30 t ih_v6_1_self_irq +ffffffff81ebfea0 t ih_v6_1_toggle_interrupts +ffffffff81ec0080 t force_update_wptr_for_self_int +ffffffff81ec1000 t imu_v11_0_init_microcode +ffffffff81ec1170 t imu_v11_0_load_microcode +ffffffff81ec14f0 t imu_v11_0_setup +ffffffff81ec1780 t imu_v11_0_start +ffffffff81ec1880 t imu_v11_0_program_rlc_ram +ffffffff81ec1a40 t imu_v11_0_wait_for_reset_status +ffffffff81ec1b90 t program_imu_rlc_ram +ffffffff81ec2000 T imu_v11_0_3_program_rlc_ram +ffffffff81ec3000 T jpeg_v1_0_early_init +ffffffff81ec3080 T jpeg_v1_0_sw_init +ffffffff81ec3170 T jpeg_v1_0_sw_fini +ffffffff81ec3190 T jpeg_v1_0_start +ffffffff81ec3c40 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81ec3cd0 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81ec3d60 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81ec3dd0 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81ec46f0 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81ec5030 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81ec50a0 t jpeg_v1_0_decode_ring_nop +ffffffff81ec5200 t jpeg_v1_0_decode_ring_insert_start +ffffffff81ec53c0 t jpeg_v1_0_decode_ring_insert_end +ffffffff81ec5580 t jpeg_v1_0_ring_begin_use +ffffffff81ec5680 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81ec58e0 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81ec5d00 t jpeg_v1_0_set_interrupt_state +ffffffff81ec5d30 t jpeg_v1_0_process_interrupt +ffffffff81ec6000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81ec61a0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81ec6340 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81ec6a20 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81ec71d0 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81ec7580 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81ec75f0 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81ec7830 T jpeg_v2_0_dec_ring_nop +ffffffff81ec7990 t jpeg_v2_0_early_init +ffffffff81ec7a20 t jpeg_v2_0_sw_init +ffffffff81ec7b50 t jpeg_v2_0_sw_fini +ffffffff81ec7ba0 t jpeg_v2_0_hw_init +ffffffff81ec7c20 t jpeg_v2_0_hw_fini +ffffffff81ec7d00 t jpeg_v2_0_suspend +ffffffff81ec7d30 t jpeg_v2_0_resume +ffffffff81ec7dc0 t jpeg_v2_0_is_idle +ffffffff81ec7e50 t jpeg_v2_0_wait_for_idle +ffffffff81ec7e90 t jpeg_v2_0_set_clockgating_state +ffffffff81ec7f40 t jpeg_v2_0_set_powergating_state +ffffffff81ec8660 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81ec86f0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81ec8790 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81ec8830 t jpeg_v2_0_set_interrupt_state +ffffffff81ec8860 t jpeg_v2_0_process_interrupt +ffffffff81ec88f0 t jpeg_v2_0_enable_clock_gating +ffffffff81ec8aa0 t jpeg_v2_0_disable_clock_gating +ffffffff81ec9000 t jpeg_v2_6_query_ras_poison_status +ffffffff81ec9150 t jpeg_v2_5_early_init +ffffffff81ec9350 t jpeg_v2_5_sw_init +ffffffff81ec95f0 t jpeg_v2_5_sw_fini +ffffffff81ec9640 t jpeg_v2_5_hw_init +ffffffff81ec9730 t jpeg_v2_5_hw_fini +ffffffff81ec98b0 t jpeg_v2_5_suspend +ffffffff81ec98e0 t jpeg_v2_5_resume +ffffffff81ec99e0 t jpeg_v2_5_is_idle +ffffffff81ec9ae0 t jpeg_v2_5_wait_for_idle +ffffffff81ec9b90 t jpeg_v2_5_set_clockgating_state +ffffffff81ec9c40 t jpeg_v2_5_set_powergating_state +ffffffff81eca370 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81eca410 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81eca4c0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81eca570 t jpeg_v2_6_dec_ring_insert_start +ffffffff81eca730 t jpeg_v2_6_dec_ring_insert_end +ffffffff81eca8f0 t jpeg_v2_5_set_interrupt_state +ffffffff81eca920 t jpeg_v2_5_process_interrupt +ffffffff81eca9e0 t jpeg_v2_6_set_ras_interrupt_state +ffffffff81ecaa10 t jpeg_v2_5_enable_clock_gating +ffffffff81ecaaf0 t jpeg_v2_5_disable_clock_gating +ffffffff81ecb000 t jpeg_v3_0_early_init +ffffffff81ecb110 t jpeg_v3_0_sw_init +ffffffff81ecb240 t jpeg_v3_0_sw_fini +ffffffff81ecb290 t jpeg_v3_0_hw_init +ffffffff81ecb310 t jpeg_v3_0_hw_fini +ffffffff81ecb3f0 t jpeg_v3_0_suspend +ffffffff81ecb420 t jpeg_v3_0_resume +ffffffff81ecb4b0 t jpeg_v3_0_is_idle +ffffffff81ecb540 t jpeg_v3_0_wait_for_idle +ffffffff81ecb580 t jpeg_v3_0_set_clockgating_state +ffffffff81ecb630 t jpeg_v3_0_set_powergating_state +ffffffff81ecbe10 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81ecbea0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81ecbf40 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81ecbfe0 t jpeg_v3_0_set_interrupt_state +ffffffff81ecc010 t jpeg_v3_0_process_interrupt +ffffffff81ecc0a0 t jpeg_v3_0_enable_clock_gating +ffffffff81ecc170 t jpeg_v3_0_disable_clock_gating +ffffffff81ecd000 t jpeg_v4_0_query_ras_poison_status +ffffffff81ecd150 t jpeg_v4_0_early_init +ffffffff81ecd220 t jpeg_v4_0_sw_init +ffffffff81ecd3c0 t jpeg_v4_0_sw_fini +ffffffff81ecd410 t jpeg_v4_0_hw_init +ffffffff81ecda40 t jpeg_v4_0_hw_fini +ffffffff81ecdb10 t jpeg_v4_0_suspend +ffffffff81ecdb40 t jpeg_v4_0_resume +ffffffff81ecdb90 t jpeg_v4_0_is_idle +ffffffff81ecdc20 t jpeg_v4_0_wait_for_idle +ffffffff81ecdc60 t jpeg_v4_0_set_clockgating_state +ffffffff81ecdd10 t jpeg_v4_0_set_powergating_state +ffffffff81ece470 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81ece500 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81ece5a0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81ece640 t jpeg_v4_0_set_interrupt_state +ffffffff81ece670 t jpeg_v4_0_process_interrupt +ffffffff81ece710 t jpeg_v4_0_set_ras_interrupt_state +ffffffff81ece740 t jpeg_v4_0_enable_clock_gating +ffffffff81ece900 t jpeg_v4_0_disable_clock_gating +ffffffff81ecf000 t jpeg_v4_0_3_early_init +ffffffff81ecf170 t jpeg_v4_0_3_sw_init +ffffffff81ecf4a0 t jpeg_v4_0_3_sw_fini +ffffffff81ecf4f0 t jpeg_v4_0_3_hw_init +ffffffff81ecff50 t jpeg_v4_0_3_hw_fini +ffffffff81ecffe0 t jpeg_v4_0_3_suspend +ffffffff81ed0060 t jpeg_v4_0_3_resume +ffffffff81ed00b0 t jpeg_v4_0_3_is_idle +ffffffff81ed0290 t jpeg_v4_0_3_wait_for_idle +ffffffff81ed03e0 t jpeg_v4_0_3_set_clockgating_state +ffffffff81ed0470 t jpeg_v4_0_3_set_powergating_state +ffffffff81ed10d0 t jpeg_v4_0_3_dec_ring_get_rptr +ffffffff81ed1240 t jpeg_v4_0_3_dec_ring_get_wptr +ffffffff81ed13d0 t jpeg_v4_0_3_dec_ring_set_wptr +ffffffff81ed1570 t jpeg_v4_0_3_dec_ring_emit_ib +ffffffff81ed1dd0 t jpeg_v4_0_3_dec_ring_emit_fence +ffffffff81ed2560 t jpeg_v4_0_3_dec_ring_emit_vm_flush +ffffffff81ed25d0 t jpeg_v4_0_3_dec_ring_nop +ffffffff81ed2730 t jpeg_v4_0_3_dec_ring_insert_start +ffffffff81ed28d0 t jpeg_v4_0_3_dec_ring_insert_end +ffffffff81ed2a70 t jpeg_v4_0_3_dec_ring_emit_wreg +ffffffff81ed2cb0 t jpeg_v4_0_3_dec_ring_emit_reg_wait +ffffffff81ed3060 t jpeg_v4_0_3_set_interrupt_state +ffffffff81ed3090 t jpeg_v4_0_3_process_interrupt +ffffffff81ed32d0 t jpeg_v4_0_3_query_ras_error_count +ffffffff81ed33c0 t jpeg_v4_0_3_reset_ras_error_count +ffffffff81ed34b0 t jpeg_v4_0_3_disable_clock_gating +ffffffff81ed4000 t lsdma_v6_0_copy_mem +ffffffff81ed4370 t lsdma_v6_0_fill_mem +ffffffff81ed4660 t lsdma_v6_0_update_memory_power_gating +ffffffff81ed5000 t mca_v3_0_ras_block_match +ffffffff81ed5050 t mca_v3_0_mp0_query_ras_error_count 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mmhub_v1_7_gart_enable +ffffffff81ee1aa0 t mmhub_v1_7_set_fault_enable_default +ffffffff81ee1bc0 t mmhub_v1_7_gart_disable +ffffffff81ee1e60 t mmhub_v1_7_set_clockgating +ffffffff81ee2200 t mmhub_v1_7_get_clockgating +ffffffff81ee2320 t mmhub_v1_7_setup_vm_pt_regs +ffffffff81ee3000 t mmhub_v1_8_get_fb_location +ffffffff81ee3120 t mmhub_v1_8_init +ffffffff81ee3280 t mmhub_v1_8_gart_enable +ffffffff81ee4e90 t mmhub_v1_8_set_fault_enable_default +ffffffff81ee5060 t mmhub_v1_8_gart_disable +ffffffff81ee53a0 t mmhub_v1_8_set_clockgating +ffffffff81ee53d0 t mmhub_v1_8_get_clockgating +ffffffff81ee5400 t mmhub_v1_8_setup_vm_pt_regs +ffffffff81ee5610 t mmhub_v1_8_query_ras_error_count +ffffffff81ee5770 t mmhub_v1_8_query_ras_error_status +ffffffff81ee5a20 t mmhub_v1_8_reset_ras_error_count +ffffffff81ee5b40 t mmhub_v1_8_reset_ras_error_status +ffffffff81ee7000 t mmhub_v2_0_init +ffffffff81ee70d0 t mmhub_v2_0_gart_enable +ffffffff81ee8290 t mmhub_v2_0_set_fault_enable_default +ffffffff81ee83b0 t mmhub_v2_0_gart_disable +ffffffff81ee8640 t mmhub_v2_0_set_clockgating +ffffffff81ee8990 t mmhub_v2_0_get_clockgating +ffffffff81ee8b20 t mmhub_v2_0_setup_vm_pt_regs +ffffffff81ee8c60 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff81ee8ec0 t mmhub_v2_0_get_invalidate_req +ffffffff81ee9000 t mmhub_v2_3_init +ffffffff81ee90e0 t mmhub_v2_3_gart_enable +ffffffff81eea4b0 t mmhub_v2_3_set_fault_enable_default +ffffffff81eea5b0 t mmhub_v2_3_gart_disable +ffffffff81eea850 t mmhub_v2_3_set_clockgating +ffffffff81eeacf0 t mmhub_v2_3_get_clockgating +ffffffff81eeaee0 t mmhub_v2_3_setup_vm_pt_regs +ffffffff81eeb020 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff81eeb240 t mmhub_v2_3_get_invalidate_req +ffffffff81eec000 t mmhub_v3_0_get_fb_location +ffffffff81eec090 t mmhub_v3_0_get_mc_fb_offset +ffffffff81eec120 t mmhub_v3_0_init +ffffffff81eec200 t mmhub_v3_0_gart_enable +ffffffff81eed420 t mmhub_v3_0_set_fault_enable_default +ffffffff81eed540 t mmhub_v3_0_gart_disable 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xgpu_ai_mailbox_set_irq_funcs +ffffffff81ef5050 T xgpu_ai_mailbox_add_irq_id +ffffffff81ef50e0 T xgpu_ai_mailbox_get_irq +ffffffff81ef5190 t xgpu_ai_mailbox_flr_work +ffffffff81ef5390 T xgpu_ai_mailbox_put_irq +ffffffff81ef53d0 t xgpu_ai_request_full_gpu_access +ffffffff81ef53f0 t xgpu_ai_release_full_gpu_access +ffffffff81ef5410 t xgpu_ai_request_init_data +ffffffff81ef5470 t xgpu_ai_request_reset +ffffffff81ef5520 t xgpu_ai_mailbox_trans_msg +ffffffff81ef5740 t xgpu_ai_ras_poison_handler +ffffffff81ef5770 t xgpu_ai_set_mailbox_ack_irq +ffffffff81ef5800 t xgpu_ai_mailbox_ack_irq +ffffffff81ef5850 t xgpu_ai_set_mailbox_rcv_irq +ffffffff81ef58e0 t xgpu_ai_mailbox_rcv_irq +ffffffff81ef59c0 t xgpu_ai_send_access_requests +ffffffff81ef5ab0 t xgpu_ai_poll_msg +ffffffff81ef6000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81ef6050 T xgpu_nv_mailbox_add_irq_id +ffffffff81ef60e0 T xgpu_nv_mailbox_get_irq +ffffffff81ef6190 t xgpu_nv_mailbox_flr_work +ffffffff81ef63b0 T xgpu_nv_mailbox_put_irq +ffffffff81ef63f0 t xgpu_nv_request_full_gpu_access +ffffffff81ef6410 t xgpu_nv_release_full_gpu_access +ffffffff81ef6430 t xgpu_nv_request_init_data +ffffffff81ef6450 t xgpu_nv_request_reset +ffffffff81ef6550 t xgpu_nv_mailbox_trans_msg +ffffffff81ef66f0 t xgpu_nv_ras_poison_handler +ffffffff81ef6710 t xgpu_nv_set_mailbox_ack_irq +ffffffff81ef6790 t xgpu_nv_mailbox_ack_irq +ffffffff81ef67e0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81ef6860 t xgpu_nv_mailbox_rcv_irq +ffffffff81ef6910 t xgpu_nv_send_access_requests +ffffffff81ef7000 T xgpu_vi_init_golden_registers +ffffffff81ef70c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81ef7110 T xgpu_vi_mailbox_add_irq_id +ffffffff81ef71a0 T xgpu_vi_mailbox_get_irq +ffffffff81ef7250 t xgpu_vi_mailbox_flr_work +ffffffff81ef73a0 T xgpu_vi_mailbox_put_irq +ffffffff81ef73e0 t xgpu_vi_request_full_gpu_access +ffffffff81ef7400 t xgpu_vi_release_full_gpu_access +ffffffff81ef7420 t xgpu_vi_request_reset +ffffffff81ef7440 t xgpu_vi_wait_reset_cmpl +ffffffff81ef7520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81ef75a0 t xgpu_vi_mailbox_ack_irq +ffffffff81ef75f0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81ef7670 t xgpu_vi_mailbox_rcv_irq +ffffffff81ef7720 t xgpu_vi_mailbox_rcv_msg +ffffffff81ef7840 t xgpu_vi_send_access_requests +ffffffff81ef8000 t navi10_ih_early_init +ffffffff81ef8060 t navi10_ih_sw_init +ffffffff81ef81d0 t navi10_ih_sw_fini +ffffffff81ef8210 t navi10_ih_hw_init +ffffffff81ef8630 t navi10_ih_hw_fini +ffffffff81ef8690 t navi10_ih_suspend +ffffffff81ef86f0 t navi10_ih_resume +ffffffff81ef8700 t navi10_ih_is_idle +ffffffff81ef8730 t navi10_ih_wait_for_idle +ffffffff81ef8760 t navi10_ih_soft_reset +ffffffff81ef8790 t navi10_ih_set_clockgating_state +ffffffff81ef88c0 t navi10_ih_set_powergating_state +ffffffff81ef88f0 t navi10_ih_get_clockgating_state +ffffffff81ef8980 t navi10_ih_get_wptr +ffffffff81ef8ab0 t navi10_ih_set_rptr +ffffffff81ef8b80 t navi10_ih_self_irq +ffffffff81ef8c00 t navi10_ih_toggle_interrupts +ffffffff81ef8d70 t force_update_wptr_for_self_int +ffffffff81efa000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff81efa040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff81efa080 t nbio_v2_3_get_pcie_index_offset +ffffffff81efa0c0 t nbio_v2_3_get_pcie_data_offset +ffffffff81efa100 t nbio_v2_3_get_rev_id +ffffffff81efa160 t nbio_v2_3_mc_access_enable +ffffffff81efa210 t nbio_v2_3_get_memsize +ffffffff81efa280 t nbio_v2_3_sdma_doorbell_range +ffffffff81efa320 t nbio_v2_3_vcn_doorbell_range +ffffffff81efa3a0 t nbio_v2_3_enable_doorbell_aperture +ffffffff81efa4a0 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff81efa610 t nbio_v2_3_ih_doorbell_range +ffffffff81efa730 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff81efa7d0 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff81efa870 t nbio_v2_3_get_clockgating_state +ffffffff81efa8f0 t nbio_v2_3_ih_control +ffffffff81efaa40 t nbio_v2_3_init_registers +ffffffff81efaad0 t nbio_v2_3_remap_hdp_registers +ffffffff81efabe0 t nbio_v2_3_enable_aspm +ffffffff81efac80 t nbio_v2_3_program_aspm +ffffffff81efb330 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff81efb3c0 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff81efb430 t nbio_v2_3_clear_doorbell_interrupt +ffffffff81efc000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff81efc040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff81efc080 t nbio_v4_3_get_pcie_index_offset +ffffffff81efc0b0 t nbio_v4_3_get_pcie_data_offset +ffffffff81efc0f0 t nbio_v4_3_get_rev_id +ffffffff81efc180 t nbio_v4_3_mc_access_enable +ffffffff81efc230 t nbio_v4_3_get_memsize +ffffffff81efc2a0 t nbio_v4_3_sdma_doorbell_range +ffffffff81efc410 t nbio_v4_3_vcn_doorbell_range +ffffffff81efc5c0 t nbio_v4_3_gc_doorbell_init +ffffffff81efc6b0 t nbio_v4_3_enable_doorbell_aperture +ffffffff81efc7b0 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81efc920 t nbio_v4_3_ih_doorbell_range +ffffffff81efca40 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81efcb80 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81efccb0 t nbio_v4_3_get_clockgating_state +ffffffff81efcdc0 t nbio_v4_3_ih_control +ffffffff81efcf10 t nbio_v4_3_init_registers +ffffffff81efd040 t nbio_v4_3_remap_hdp_registers +ffffffff81efd150 t nbio_v4_3_program_aspm +ffffffff81efde50 t nbio_v4_3_get_rom_offset +ffffffff81efdee0 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81efdf10 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81efdf40 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81efdf70 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81efdfa0 t nbio_v4_3_handle_ras_err_event_athub_intr_no_bifring +ffffffff81efe0b0 t nbio_v4_3_init_ras_err_event_athub_interrupt +ffffffff81efe0f0 t nbio_v4_3_set_ras_err_event_athub_irq_state +ffffffff81efe200 t nbio_v4_3_process_err_event_athub_irq +ffffffff81eff000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81eff040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81eff080 t nbio_v6_1_get_pcie_index_offset +ffffffff81eff0c0 t nbio_v6_1_get_pcie_data_offset +ffffffff81eff100 t nbio_v6_1_get_rev_id +ffffffff81eff190 t nbio_v6_1_mc_access_enable +ffffffff81eff240 t nbio_v6_1_get_memsize +ffffffff81eff2b0 t nbio_v6_1_sdma_doorbell_range +ffffffff81eff340 t nbio_v6_1_enable_doorbell_aperture +ffffffff81eff440 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff81eff5b0 t nbio_v6_1_ih_doorbell_range +ffffffff81eff6d0 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff81eff770 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff81eff810 t nbio_v6_1_get_clockgating_state +ffffffff81eff890 t nbio_v6_1_ih_control +ffffffff81eff9e0 t nbio_v6_1_init_registers +ffffffff81effab0 t nbio_v6_1_remap_hdp_registers +ffffffff81effbc0 t nbio_v6_1_program_aspm +ffffffff81f00000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff81f00040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff81f00080 t nbio_v7_0_get_pcie_index_offset +ffffffff81f000c0 t nbio_v7_0_get_pcie_data_offset +ffffffff81f00100 t nbio_v7_0_get_rev_id +ffffffff81f00190 t nbio_v7_0_mc_access_enable +ffffffff81f00240 t nbio_v7_0_get_memsize +ffffffff81f002b0 t nbio_v7_0_sdma_doorbell_range +ffffffff81f00340 t nbio_v7_0_vcn_doorbell_range +ffffffff81f003c0 t nbio_v7_0_enable_doorbell_aperture +ffffffff81f004c0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff81f004f0 t nbio_v7_0_ih_doorbell_range +ffffffff81f00610 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff81f00740 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff81f007e0 t nbio_v7_0_get_clockgating_state +ffffffff81f00860 t nbio_v7_0_ih_control +ffffffff81f009b0 t nbio_v7_0_init_registers +ffffffff81f00a00 t nbio_v7_0_remap_hdp_registers +ffffffff81f00b10 t nbio_7_0_read_syshub_ind_mmr +ffffffff81f00be0 t nbio_7_0_write_syshub_ind_mmr +ffffffff81f01000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff81f01040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff81f01080 t nbio_v7_2_get_pcie_index_offset +ffffffff81f010c0 t nbio_v7_2_get_pcie_data_offset +ffffffff81f01100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff81f01130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff81f01170 t nbio_v7_2_get_rev_id +ffffffff81f01250 t nbio_v7_2_mc_access_enable +ffffffff81f01390 t nbio_v7_2_get_memsize +ffffffff81f01400 t nbio_v7_2_sdma_doorbell_range +ffffffff81f014a0 t nbio_v7_2_vcn_doorbell_range +ffffffff81f01520 t nbio_v7_2_enable_doorbell_aperture +ffffffff81f01600 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff81f01770 t nbio_v7_2_ih_doorbell_range +ffffffff81f01800 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff81f018c0 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff81f01a50 t nbio_v7_2_get_clockgating_state +ffffffff81f01ae0 t nbio_v7_2_ih_control +ffffffff81f01c30 t nbio_v7_2_init_registers +ffffffff81f01df0 t nbio_v7_2_remap_hdp_registers +ffffffff81f02000 t nbio_v7_4_query_ras_error_count +ffffffff81f021a0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff81f02400 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff81f025b0 t nbio_v7_4_init_ras_controller_interrupt +ffffffff81f025f0 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff81f02630 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff81f02670 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff81f026b0 t nbio_v7_4_get_pcie_index_offset +ffffffff81f026f0 t nbio_v7_4_get_pcie_data_offset +ffffffff81f02730 t nbio_v7_4_get_rev_id +ffffffff81f02800 t nbio_v7_4_mc_access_enable +ffffffff81f028b0 t nbio_v7_4_get_memsize +ffffffff81f02920 t nbio_v7_4_sdma_doorbell_range +ffffffff81f029f0 t nbio_v7_4_vcn_doorbell_range +ffffffff81f02a90 t nbio_v7_4_enable_doorbell_aperture +ffffffff81f02b90 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff81f02d00 t nbio_v7_4_ih_doorbell_range +ffffffff81f02e20 t nbio_v7_4_enable_doorbell_interrupt +ffffffff81f02f70 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff81f02fa0 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff81f03040 t nbio_v7_4_get_clockgating_state +ffffffff81f030c0 t nbio_v7_4_ih_control +ffffffff81f03210 t nbio_v7_4_init_registers +ffffffff81f03300 t nbio_v7_4_remap_hdp_registers +ffffffff81f03410 t nbio_v7_4_program_aspm +ffffffff81f03820 t nbio_v7_4_set_ras_controller_irq_state +ffffffff81f039b0 t nbio_v7_4_process_ras_controller_irq +ffffffff81f039e0 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff81f03b70 t nbio_v7_4_process_err_event_athub_irq +ffffffff81f04000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff81f04040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff81f04080 t nbio_v7_7_get_pcie_index_offset +ffffffff81f040c0 t nbio_v7_7_get_pcie_data_offset +ffffffff81f04100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff81f04130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81f04170 t nbio_v7_7_get_rev_id +ffffffff81f04200 t nbio_v7_7_mc_access_enable +ffffffff81f042b0 t nbio_v7_7_get_memsize +ffffffff81f04320 t nbio_v7_7_sdma_doorbell_range +ffffffff81f043b0 t nbio_v7_7_vcn_doorbell_range +ffffffff81f04430 t nbio_v7_7_enable_doorbell_aperture +ffffffff81f04510 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81f04680 t nbio_v7_7_ih_doorbell_range +ffffffff81f047a0 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81f048e0 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81f04af0 t nbio_v7_7_get_clockgating_state +ffffffff81f04c00 t nbio_v7_7_ih_control +ffffffff81f04d50 t nbio_v7_7_init_registers +ffffffff81f04e70 t nbio_v7_7_remap_hdp_registers +ffffffff81f05000 t nbio_v7_9_get_hdp_flush_req_offset +ffffffff81f05040 t nbio_v7_9_get_hdp_flush_done_offset +ffffffff81f05080 t nbio_v7_9_get_pcie_index_offset +ffffffff81f050c0 t nbio_v7_9_get_pcie_data_offset +ffffffff81f05100 t nbio_v7_9_get_pcie_index_hi_offset +ffffffff81f05140 t nbio_v7_9_get_rev_id +ffffffff81f051d0 t nbio_v7_9_mc_access_enable +ffffffff81f05280 t nbio_v7_9_get_memsize +ffffffff81f052f0 t nbio_v7_9_sdma_doorbell_range +ffffffff81f05630 t nbio_v7_9_vcn_doorbell_range +ffffffff81f057c0 t nbio_v7_9_enable_doorbell_aperture +ffffffff81f05930 t nbio_v7_9_enable_doorbell_selfring_aperture +ffffffff81f05aa0 t nbio_v7_9_ih_doorbell_range +ffffffff81f05ba0 t nbio_v7_9_enable_doorbell_interrupt +ffffffff81f05cb0 t nbio_v7_9_update_medium_grain_clock_gating +ffffffff81f05ce0 t nbio_v7_9_update_medium_grain_light_sleep +ffffffff81f05d10 t nbio_v7_9_get_clockgating_state +ffffffff81f05d40 t nbio_v7_9_ih_control +ffffffff81f05e90 t nbio_v7_9_init_registers +ffffffff81f061a0 t nbio_v7_9_remap_hdp_registers +ffffffff81f062b0 t nbio_v7_9_get_compute_partition_mode +ffffffff81f06340 t nbio_v7_9_get_memory_partition_mode +ffffffff81f06430 t nbio_v7_9_get_pcie_replay_count +ffffffff81f06490 t nbio_v7_9_get_pcie_usage +ffffffff81f065f0 t nbio_v7_9_query_ras_error_count +ffffffff81f06620 t nbio_v7_9_handle_ras_controller_intr_no_bifring +ffffffff81f06740 t nbio_v7_9_handle_ras_err_event_athub_intr_no_bifring +ffffffff81f06850 t nbio_v7_9_init_ras_controller_interrupt +ffffffff81f06890 t nbio_v7_9_init_ras_err_event_athub_interrupt +ffffffff81f068d0 t nbio_v7_9_set_ras_controller_irq_state +ffffffff81f06900 t nbio_v7_9_process_ras_controller_irq +ffffffff81f06930 t nbio_v7_9_set_ras_err_event_athub_irq_state +ffffffff81f06960 t nbio_v7_9_process_err_event_athub_irq +ffffffff81f07000 T nv_grbm_select +ffffffff81f070a0 T nv_set_virt_ops +ffffffff81f070e0 t nv_common_early_init +ffffffff81f074d0 t nv_common_late_init +ffffffff81f07580 t nv_common_sw_init +ffffffff81f075c0 t nv_common_sw_fini +ffffffff81f075f0 t nv_common_hw_init +ffffffff81f076f0 t nv_common_hw_fini +ffffffff81f07750 t nv_common_suspend +ffffffff81f077b0 t nv_common_resume +ffffffff81f077f0 t nv_common_is_idle +ffffffff81f07820 t nv_common_wait_for_idle +ffffffff81f07850 t nv_common_soft_reset +ffffffff81f07880 t nv_common_set_clockgating_state +ffffffff81f07950 t nv_common_set_powergating_state +ffffffff81f07980 t nv_common_get_clockgating_state +ffffffff81f079f0 t nv_didt_rreg +ffffffff81f07a90 t nv_didt_wreg +ffffffff81f07b10 t nv_read_disabled_bios +ffffffff81f07b40 t nv_read_register +ffffffff81f07c30 t nv_asic_reset +ffffffff81f07d70 t nv_asic_reset_method +ffffffff81f07e60 t nv_get_xclk +ffffffff81f07e90 t nv_set_uvd_clocks +ffffffff81f07ec0 t nv_set_vce_clocks +ffffffff81f07ef0 t nv_get_config_memsize +ffffffff81f07f10 t nv_need_full_reset +ffffffff81f07f40 t nv_init_doorbell_index +ffffffff81f08070 t nv_need_reset_on_init +ffffffff81f08110 t nv_pre_asic_init +ffffffff81f08140 t nv_update_umd_stable_pstate +ffffffff81f08200 t nv_query_video_codecs +ffffffff81f09000 T psp_v10_0_set_psp_funcs +ffffffff81f09030 t psp_v10_0_init_microcode +ffffffff81f090f0 t psp_v10_0_ring_create +ffffffff81f09400 t psp_v10_0_ring_stop +ffffffff81f095f0 t psp_v10_0_ring_destroy +ffffffff81f09670 t psp_v10_0_mode1_reset +ffffffff81f096c0 t psp_v10_0_ring_get_wptr +ffffffff81f09720 t psp_v10_0_ring_set_wptr +ffffffff81f0a000 T psp_v11_0_set_psp_funcs +ffffffff81f0a030 t psp_v11_0_init_microcode +ffffffff81f0a180 t psp_v11_0_bootloader_load_kdb +ffffffff81f0a1a0 t psp_v11_0_bootloader_load_spl +ffffffff81f0a1c0 t psp_v11_0_bootloader_load_sysdrv +ffffffff81f0a1e0 t psp_v11_0_bootloader_load_sos +ffffffff81f0a540 t psp_v11_0_ring_create +ffffffff81f0abe0 t psp_v11_0_ring_stop +ffffffff81f0ae00 t psp_v11_0_ring_destroy +ffffffff81f0ae80 t psp_v11_0_mode1_reset +ffffffff81f0af80 t psp_v11_0_memory_training +ffffffff81f0b400 t psp_v11_0_ring_get_wptr +ffffffff81f0b450 t psp_v11_0_ring_set_wptr +ffffffff81f0b590 t psp_v11_0_load_usbc_pd_fw +ffffffff81f0b780 t psp_v11_0_read_usbc_pd_fw +ffffffff81f0b8a0 t psp_v11_0_bootloader_load_component +ffffffff81f0ba60 t psp_v11_0_wait_for_bootloader +ffffffff81f0bc30 t psp_v11_0_memory_training_send_msg +ffffffff81f0c000 T psp_v11_0_8_set_psp_funcs +ffffffff81f0c030 t psp_v11_0_8_ring_create +ffffffff81f0c6d0 t psp_v11_0_8_ring_stop +ffffffff81f0ca60 t psp_v11_0_8_ring_destroy +ffffffff81f0cae0 t psp_v11_0_8_ring_get_wptr +ffffffff81f0cb50 t psp_v11_0_8_ring_set_wptr +ffffffff81f0d000 T psp_v12_0_set_psp_funcs +ffffffff81f0d030 t psp_v12_0_init_microcode +ffffffff81f0d0e0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81f0d410 t psp_v12_0_bootloader_load_sos +ffffffff81f0d790 t psp_v12_0_ring_create +ffffffff81f0e190 t psp_v12_0_ring_stop +ffffffff81f0e3b0 t psp_v12_0_ring_destroy +ffffffff81f0e430 t psp_v12_0_mode1_reset +ffffffff81f0e530 t psp_v12_0_ring_get_wptr +ffffffff81f0e5a0 t psp_v12_0_ring_set_wptr +ffffffff81f0f000 T psp_v13_0_set_psp_funcs +ffffffff81f0f030 t psp_v13_0_init_microcode +ffffffff81f0f130 t psp_v13_0_wait_for_bootloader_steady_state +ffffffff81f0f240 t psp_v13_0_bootloader_load_kdb +ffffffff81f0f260 t psp_v13_0_bootloader_load_spl +ffffffff81f0f280 t psp_v13_0_bootloader_load_sysdrv +ffffffff81f0f2a0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81f0f2c0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81f0f2e0 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81f0f300 t psp_v13_0_bootloader_load_ras_drv +ffffffff81f0f320 t psp_v13_0_bootloader_load_sos +ffffffff81f0f6f0 t psp_v13_0_ring_create +ffffffff81f0fd90 t psp_v13_0_ring_stop +ffffffff81f10120 t psp_v13_0_ring_destroy +ffffffff81f101a0 t psp_v13_0_memory_training +ffffffff81f105d0 t psp_v13_0_ring_get_wptr +ffffffff81f10640 t psp_v13_0_ring_set_wptr +ffffffff81f10740 t psp_v13_0_load_usbc_pd_fw +ffffffff81f10930 t psp_v13_0_read_usbc_pd_fw +ffffffff81f10a50 t psp_v13_0_update_spirom +ffffffff81f10c30 t psp_v13_0_vbflash_status +ffffffff81f10c90 t psp_v13_0_fatal_error_recovery_quirk +ffffffff81f10dc0 t psp_v13_0_bootloader_load_component +ffffffff81f11030 t psp_v13_0_memory_training_send_msg +ffffffff81f111a0 t psp_v13_0_exec_spi_cmd +ffffffff81f12000 T psp_v13_0_4_set_psp_funcs +ffffffff81f12030 t psp_v13_0_4_init_microcode +ffffffff81f120d0 t psp_v13_0_4_bootloader_load_kdb +ffffffff81f120f0 t psp_v13_0_4_bootloader_load_spl +ffffffff81f12110 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81f12130 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81f12150 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81f12170 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81f12190 t psp_v13_0_4_bootloader_load_sos +ffffffff81f12500 t psp_v13_0_4_ring_create +ffffffff81f12bb0 t psp_v13_0_4_ring_stop +ffffffff81f12f40 t psp_v13_0_4_ring_destroy +ffffffff81f12fc0 t psp_v13_0_4_ring_get_wptr +ffffffff81f13030 t psp_v13_0_4_ring_set_wptr +ffffffff81f13130 t psp_v13_0_4_bootloader_load_component +ffffffff81f13300 t psp_v13_0_4_wait_for_bootloader +ffffffff81f14000 T psp_v3_1_set_psp_funcs +ffffffff81f14030 t psp_v3_1_init_microcode +ffffffff81f140c0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81f143f0 t psp_v3_1_bootloader_load_sos +ffffffff81f14770 t psp_v3_1_ring_create +ffffffff81f15290 t psp_v3_1_ring_stop +ffffffff81f154b0 t psp_v3_1_ring_destroy +ffffffff81f15530 t psp_v3_1_smu_reload_quirk +ffffffff81f15580 t psp_v3_1_mode1_reset +ffffffff81f15680 t psp_v3_1_ring_get_wptr +ffffffff81f156d0 t psp_v3_1_ring_set_wptr +ffffffff81f16000 t sdma_v2_4_early_init +ffffffff81f160f0 t sdma_v2_4_sw_init +ffffffff81f164a0 t sdma_v2_4_sw_fini +ffffffff81f16550 t sdma_v2_4_hw_init +ffffffff81f168f0 t sdma_v2_4_hw_fini +ffffffff81f16930 t sdma_v2_4_suspend +ffffffff81f16970 t sdma_v2_4_resume +ffffffff81f16980 t sdma_v2_4_is_idle +ffffffff81f169c0 t sdma_v2_4_wait_for_idle +ffffffff81f16a60 t sdma_v2_4_soft_reset +ffffffff81f16ba0 t sdma_v2_4_set_clockgating_state +ffffffff81f16bd0 t sdma_v2_4_set_powergating_state +ffffffff81f16c00 t sdma_v2_4_ring_get_rptr +ffffffff81f16c40 t sdma_v2_4_ring_get_wptr +ffffffff81f16ca0 t sdma_v2_4_ring_set_wptr +ffffffff81f16ce0 t sdma_v2_4_ring_emit_ib +ffffffff81f16f90 t sdma_v2_4_ring_emit_fence +ffffffff81f17390 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81f17610 t sdma_v2_4_ring_emit_vm_flush +ffffffff81f17880 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81f17b00 t sdma_v2_4_ring_test_ring +ffffffff81f17de0 t sdma_v2_4_ring_test_ib +ffffffff81f17fb0 t sdma_v2_4_ring_insert_nop +ffffffff81f180e0 t sdma_v2_4_ring_pad_ib +ffffffff81f18210 t sdma_v2_4_ring_emit_wreg +ffffffff81f18360 t sdma_v2_4_emit_copy_buffer +ffffffff81f18420 t sdma_v2_4_emit_fill_buffer +ffffffff81f184b0 t sdma_v2_4_vm_copy_pte +ffffffff81f18570 t sdma_v2_4_vm_write_pte +ffffffff81f18640 t sdma_v2_4_vm_set_pte_pde +ffffffff81f18740 t sdma_v2_4_set_trap_irq_state +ffffffff81f18800 t sdma_v2_4_process_trap_irq +ffffffff81f188a0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81f18920 t sdma_v2_4_enable +ffffffff81f19000 t sdma_v3_0_early_init +ffffffff81f19100 t sdma_v3_0_sw_init +ffffffff81f194c0 t sdma_v3_0_sw_fini +ffffffff81f19570 t sdma_v3_0_hw_init +ffffffff81f196a0 t sdma_v3_0_hw_fini +ffffffff81f196f0 t sdma_v3_0_suspend +ffffffff81f19740 t sdma_v3_0_resume +ffffffff81f19750 t sdma_v3_0_is_idle +ffffffff81f19790 t sdma_v3_0_wait_for_idle +ffffffff81f19830 t sdma_v3_0_check_soft_reset +ffffffff81f19890 t sdma_v3_0_pre_soft_reset +ffffffff81f198e0 t sdma_v3_0_soft_reset +ffffffff81f199b0 t sdma_v3_0_post_soft_reset +ffffffff81f19a00 t sdma_v3_0_set_clockgating_state +ffffffff81f19c60 t sdma_v3_0_set_powergating_state +ffffffff81f19c90 t sdma_v3_0_get_clockgating_state +ffffffff81f19d10 t sdma_v3_0_ring_get_rptr +ffffffff81f19d50 t sdma_v3_0_ring_get_wptr +ffffffff81f19dd0 t sdma_v3_0_ring_set_wptr +ffffffff81f19e80 t sdma_v3_0_ring_emit_ib +ffffffff81f1a130 t sdma_v3_0_ring_emit_fence +ffffffff81f1a530 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81f1a7b0 t sdma_v3_0_ring_emit_vm_flush +ffffffff81f1aa20 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81f1aca0 t sdma_v3_0_ring_test_ring +ffffffff81f1af80 t sdma_v3_0_ring_test_ib +ffffffff81f1b150 t sdma_v3_0_ring_insert_nop +ffffffff81f1b280 t sdma_v3_0_ring_pad_ib +ffffffff81f1b3b0 t sdma_v3_0_ring_emit_wreg +ffffffff81f1b500 t sdma_v3_0_emit_copy_buffer +ffffffff81f1b5c0 t sdma_v3_0_emit_fill_buffer +ffffffff81f1b650 t sdma_v3_0_vm_copy_pte +ffffffff81f1b710 t sdma_v3_0_vm_write_pte +ffffffff81f1b7e0 t sdma_v3_0_vm_set_pte_pde +ffffffff81f1b8e0 t sdma_v3_0_set_trap_irq_state +ffffffff81f1b9a0 t sdma_v3_0_process_trap_irq +ffffffff81f1ba40 t sdma_v3_0_process_illegal_inst_irq +ffffffff81f1bac0 t sdma_v3_0_ctx_switch_enable +ffffffff81f1bc60 t sdma_v3_0_enable +ffffffff81f1bdd0 t sdma_v3_0_gfx_resume +ffffffff81f1d000 t sdma_v4_0_early_init +ffffffff81f1d2d0 t sdma_v4_0_late_init +ffffffff81f1d570 t sdma_v4_0_sw_init +ffffffff81f1d9b0 t sdma_v4_0_sw_fini +ffffffff81f1da70 t sdma_v4_0_hw_init +ffffffff81f209d0 t sdma_v4_0_hw_fini +ffffffff81f20a90 t sdma_v4_0_suspend +ffffffff81f20ae0 t sdma_v4_0_resume +ffffffff81f20b60 t sdma_v4_0_is_idle +ffffffff81f20c90 t sdma_v4_0_wait_for_idle +ffffffff81f20e30 t sdma_v4_0_soft_reset +ffffffff81f20e60 t sdma_v4_0_set_clockgating_state +ffffffff81f21360 t sdma_v4_0_set_powergating_state +ffffffff81f21420 t sdma_v4_0_get_clockgating_state +ffffffff81f214c0 t sdma_v4_0_query_ras_error_count +ffffffff81f21690 t sdma_v4_0_reset_ras_error_count +ffffffff81f217e0 t sdma_v4_0_ring_get_rptr +ffffffff81f21840 t sdma_v4_0_ring_get_wptr +ffffffff81f21a30 t sdma_v4_0_ring_set_wptr +ffffffff81f21cb0 t sdma_v4_0_ring_emit_ib +ffffffff81f21f60 t sdma_v4_0_ring_emit_fence +ffffffff81f22380 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81f223e0 t sdma_v4_0_ring_emit_vm_flush +ffffffff81f22400 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81f224b0 t sdma_v4_0_ring_test_ring +ffffffff81f22790 t sdma_v4_0_ring_test_ib +ffffffff81f22960 t sdma_v4_0_ring_insert_nop +ffffffff81f22a90 t sdma_v4_0_ring_pad_ib +ffffffff81f22bc0 t sdma_v4_0_ring_emit_wreg +ffffffff81f22d10 t sdma_v4_0_ring_emit_reg_wait +ffffffff81f22d60 t sdma_v4_0_wait_reg_mem +ffffffff81f23070 t sdma_v4_0_page_ring_get_wptr +ffffffff81f23220 t sdma_v4_0_page_ring_set_wptr +ffffffff81f233e0 t sdma_v4_0_emit_copy_buffer +ffffffff81f234a0 t sdma_v4_0_emit_fill_buffer +ffffffff81f23530 t sdma_v4_0_vm_copy_pte +ffffffff81f235f0 t sdma_v4_0_vm_write_pte +ffffffff81f236c0 t sdma_v4_0_vm_set_pte_pde +ffffffff81f237c0 t sdma_v4_0_set_trap_irq_state +ffffffff81f23960 t sdma_v4_0_process_trap_irq +ffffffff81f23a90 t sdma_v4_0_process_illegal_inst_irq +ffffffff81f23bb0 t sdma_v4_0_set_ecc_irq_state +ffffffff81f23d50 t sdma_v4_0_process_vm_hole_irq +ffffffff81f23d90 t sdma_v4_0_print_iv_entry +ffffffff81f23ed0 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81f23f10 t sdma_v4_0_process_pool_timeout_irq +ffffffff81f23f50 t sdma_v4_0_process_srbm_write_irq +ffffffff81f23f90 t sdma_v4_0_process_ras_data_cb +ffffffff81f24010 t sdma_v4_0_ctx_switch_enable +ffffffff81f246e0 t sdma_v4_0_enable +ffffffff81f24ca0 t sdma_v4_0_gfx_enable +ffffffff81f26000 t sdma_v4_4_query_ras_error_count +ffffffff81f26290 t sdma_v4_4_reset_ras_error_count +ffffffff81f27000 t sdma_v4_4_2_early_init +ffffffff81f27280 t sdma_v4_4_2_late_init +ffffffff81f272f0 t sdma_v4_4_2_sw_init +ffffffff81f27810 t sdma_v4_4_2_sw_fini +ffffffff81f278c0 t sdma_v4_4_2_hw_init +ffffffff81f27910 t sdma_v4_4_2_hw_fini +ffffffff81f279d0 t sdma_v4_4_2_suspend +ffffffff81f27ab0 t sdma_v4_4_2_resume +ffffffff81f27b00 t sdma_v4_4_2_is_idle +ffffffff81f27ba0 t sdma_v4_4_2_wait_for_idle +ffffffff81f27cc0 t sdma_v4_4_2_soft_reset +ffffffff81f27cf0 t sdma_v4_4_2_set_clockgating_state +ffffffff81f280f0 t sdma_v4_4_2_set_powergating_state +ffffffff81f28120 t sdma_v4_4_2_get_clockgating_state +ffffffff81f28200 t sdma_v4_4_2_xcp_suspend +ffffffff81f282c0 t sdma_v4_4_2_xcp_resume +ffffffff81f28300 t sdma_v4_4_2_ring_get_rptr +ffffffff81f28370 t sdma_v4_4_2_ring_get_wptr +ffffffff81f284b0 t sdma_v4_4_2_ring_set_wptr +ffffffff81f28670 t sdma_v4_4_2_ring_emit_ib +ffffffff81f28920 t sdma_v4_4_2_ring_emit_fence +ffffffff81f28d40 t sdma_v4_4_2_ring_emit_pipeline_sync +ffffffff81f28da0 t sdma_v4_4_2_ring_emit_vm_flush +ffffffff81f28dc0 t sdma_v4_4_2_ring_emit_hdp_flush +ffffffff81f28e70 t sdma_v4_4_2_ring_test_ring +ffffffff81f29150 t sdma_v4_4_2_ring_test_ib +ffffffff81f29320 t sdma_v4_4_2_ring_insert_nop +ffffffff81f29450 t sdma_v4_4_2_ring_pad_ib +ffffffff81f29580 t sdma_v4_4_2_ring_emit_wreg +ffffffff81f296d0 t sdma_v4_4_2_ring_emit_reg_wait +ffffffff81f29720 t sdma_v4_4_2_wait_reg_mem +ffffffff81f29a30 t sdma_v4_4_2_page_ring_get_wptr +ffffffff81f29b30 t sdma_v4_4_2_page_ring_set_wptr +ffffffff81f29c40 t sdma_v4_4_2_emit_copy_buffer +ffffffff81f29d00 t sdma_v4_4_2_emit_fill_buffer +ffffffff81f29d90 t sdma_v4_4_2_vm_copy_pte +ffffffff81f29e50 t sdma_v4_4_2_vm_write_pte +ffffffff81f29f20 t sdma_v4_4_2_vm_set_pte_pde +ffffffff81f2a020 t sdma_v4_4_2_set_trap_irq_state +ffffffff81f2a100 t sdma_v4_4_2_process_trap_irq +ffffffff81f2a220 t sdma_v4_4_2_process_illegal_inst_irq +ffffffff81f2a2b0 t sdma_v4_4_2_set_ecc_irq_state +ffffffff81f2a390 t sdma_v4_4_2_process_vm_hole_irq +ffffffff81f2a470 t sdma_v4_4_2_process_doorbell_invalid_irq +ffffffff81f2a550 t sdma_v4_4_2_process_pool_timeout_irq +ffffffff81f2a630 t sdma_v4_4_2_process_srbm_write_irq +ffffffff81f2a710 t sdma_v4_4_2_query_ras_error_count +ffffffff81f2a870 t sdma_v4_4_2_reset_ras_error_count +ffffffff81f2a9a0 t sdma_v4_4_2_inst_init_golden_registers +ffffffff81f2ab20 t sdma_v4_4_2_inst_start +ffffffff81f2bec0 t sdma_v4_4_2_inst_ctx_switch_enable +ffffffff81f2c190 t sdma_v4_4_2_inst_enable +ffffffff81f2d000 t sdma_v5_0_early_init +ffffffff81f2d130 t sdma_v5_0_sw_init +ffffffff81f2d310 t sdma_v5_0_sw_fini +ffffffff81f2d3a0 t sdma_v5_0_hw_init +ffffffff81f2e600 t sdma_v5_0_hw_fini +ffffffff81f2e660 t sdma_v5_0_suspend +ffffffff81f2e6c0 t sdma_v5_0_resume +ffffffff81f2e6d0 t sdma_v5_0_is_idle +ffffffff81f2e760 t sdma_v5_0_wait_for_idle +ffffffff81f2e820 t sdma_v5_0_soft_reset +ffffffff81f2e850 t sdma_v5_0_set_clockgating_state +ffffffff81f2ea50 t sdma_v5_0_set_powergating_state +ffffffff81f2ea80 t sdma_v5_0_get_clockgating_state +ffffffff81f2eb20 t sdma_v5_0_ring_get_rptr +ffffffff81f2eb80 t sdma_v5_0_ring_get_wptr +ffffffff81f2ed20 t sdma_v5_0_ring_set_wptr +ffffffff81f2f070 t sdma_v5_0_ring_emit_ib +ffffffff81f2f330 t sdma_v5_0_ring_emit_fence +ffffffff81f2f790 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81f2fa10 t sdma_v5_0_ring_emit_vm_flush +ffffffff81f2fa30 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81f2fcd0 t sdma_v5_0_ring_test_ring +ffffffff81f300a0 t sdma_v5_0_ring_test_ib +ffffffff81f303d0 t sdma_v5_0_ring_insert_nop +ffffffff81f30500 t sdma_v5_0_ring_pad_ib +ffffffff81f30630 t sdma_v5_0_ring_init_cond_exec +ffffffff81f30860 t sdma_v5_0_ring_patch_cond_exec +ffffffff81f30920 t sdma_v5_0_ring_emit_wreg +ffffffff81f30a70 t sdma_v5_0_ring_emit_reg_wait +ffffffff81f30cf0 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81f30d70 t sdma_v5_0_ring_preempt_ib +ffffffff81f30eb0 t sdma_v5_0_ring_emit_mem_sync +ffffffff81f310c0 t sdma_v5_0_emit_copy_buffer +ffffffff81f31180 t sdma_v5_0_emit_fill_buffer +ffffffff81f31210 t sdma_v5_0_vm_copy_pte +ffffffff81f312d0 t sdma_v5_0_vm_write_pte +ffffffff81f313a0 t sdma_v5_0_vm_set_pte_pde +ffffffff81f314a0 t sdma_v5_0_set_trap_irq_state +ffffffff81f31530 t sdma_v5_0_process_trap_irq +ffffffff81f31640 t sdma_v5_0_process_illegal_inst_irq +ffffffff81f31670 t sdma_v5_0_mqd_init +ffffffff81f31750 t sdma_v5_0_ctx_switch_enable +ffffffff81f31a90 t sdma_v5_0_enable +ffffffff81f32000 t sdma_v5_2_early_init +ffffffff81f32130 t sdma_v5_2_sw_init +ffffffff81f32390 t sdma_v5_2_sw_fini +ffffffff81f32420 t sdma_v5_2_hw_init +ffffffff81f33fc0 t sdma_v5_2_hw_fini +ffffffff81f34020 t sdma_v5_2_suspend +ffffffff81f34080 t sdma_v5_2_resume +ffffffff81f34090 t sdma_v5_2_is_idle +ffffffff81f34140 t sdma_v5_2_wait_for_idle +ffffffff81f34240 t sdma_v5_2_soft_reset +ffffffff81f34500 t sdma_v5_2_set_clockgating_state +ffffffff81f34860 t sdma_v5_2_set_powergating_state +ffffffff81f34890 t sdma_v5_2_get_clockgating_state +ffffffff81f34920 t sdma_v5_2_ring_get_rptr +ffffffff81f34980 t sdma_v5_2_ring_get_wptr +ffffffff81f34ac0 t sdma_v5_2_ring_set_wptr +ffffffff81f34c70 t sdma_v5_2_ring_emit_ib +ffffffff81f34f30 t sdma_v5_2_ring_emit_fence +ffffffff81f35390 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81f35610 t sdma_v5_2_ring_emit_vm_flush +ffffffff81f35630 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81f35900 t sdma_v5_2_ring_test_ring +ffffffff81f35cd0 t sdma_v5_2_ring_test_ib +ffffffff81f36000 t sdma_v5_2_ring_insert_nop +ffffffff81f36130 t sdma_v5_2_ring_pad_ib +ffffffff81f36260 t sdma_v5_2_ring_init_cond_exec +ffffffff81f36490 t sdma_v5_2_ring_patch_cond_exec +ffffffff81f36550 t sdma_v5_2_ring_begin_use +ffffffff81f36570 t sdma_v5_2_ring_end_use +ffffffff81f36590 t sdma_v5_2_ring_emit_wreg +ffffffff81f366e0 t sdma_v5_2_ring_emit_reg_wait +ffffffff81f36960 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81f369e0 t sdma_v5_2_ring_preempt_ib +ffffffff81f36b50 t sdma_v5_2_ring_emit_mem_sync +ffffffff81f36d60 t sdma_v5_2_emit_copy_buffer +ffffffff81f36e20 t sdma_v5_2_emit_fill_buffer +ffffffff81f36eb0 t sdma_v5_2_vm_copy_pte +ffffffff81f36f70 t sdma_v5_2_vm_write_pte +ffffffff81f37040 t sdma_v5_2_vm_set_pte_pde +ffffffff81f37140 t sdma_v5_2_set_trap_irq_state +ffffffff81f37200 t sdma_v5_2_process_trap_irq +ffffffff81f37340 t sdma_v5_2_process_illegal_inst_irq +ffffffff81f37370 t sdma_v5_2_mqd_init +ffffffff81f37450 t sdma_v5_2_ctx_switch_enable +ffffffff81f37860 t sdma_v5_2_enable +ffffffff81f38000 t sdma_v6_0_early_init +ffffffff81f38120 t sdma_v6_0_sw_init +ffffffff81f382f0 t sdma_v6_0_sw_fini +ffffffff81f38380 t sdma_v6_0_hw_init +ffffffff81f38390 t sdma_v6_0_hw_fini +ffffffff81f38460 t sdma_v6_0_suspend +ffffffff81f384a0 t sdma_v6_0_resume +ffffffff81f384b0 t sdma_v6_0_is_idle +ffffffff81f38540 t sdma_v6_0_wait_for_idle +ffffffff81f38600 t sdma_v6_0_check_soft_reset +ffffffff81f386c0 t sdma_v6_0_soft_reset +ffffffff81f38b80 t sdma_v6_0_set_clockgating_state +ffffffff81f38bb0 t sdma_v6_0_set_powergating_state +ffffffff81f38be0 t sdma_v6_0_get_clockgating_state +ffffffff81f38c10 t sdma_v6_0_ring_get_rptr +ffffffff81f38c70 t sdma_v6_0_ring_get_wptr +ffffffff81f38ce0 t sdma_v6_0_ring_set_wptr +ffffffff81f39030 t sdma_v6_0_ring_emit_ib +ffffffff81f392f0 t sdma_v6_0_ring_emit_fence +ffffffff81f39750 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81f399d0 t sdma_v6_0_ring_emit_vm_flush +ffffffff81f39c40 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81f39ee0 t sdma_v6_0_ring_test_ring +ffffffff81f3a2b0 t sdma_v6_0_ring_test_ib +ffffffff81f3a5e0 t sdma_v6_0_ring_insert_nop +ffffffff81f3a710 t sdma_v6_0_ring_pad_ib +ffffffff81f3a840 t sdma_v6_0_ring_init_cond_exec +ffffffff81f3aa70 t sdma_v6_0_ring_patch_cond_exec +ffffffff81f3ab30 t sdma_v6_0_ring_emit_wreg +ffffffff81f3ac80 t sdma_v6_0_ring_emit_reg_wait +ffffffff81f3af00 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81f3af80 t sdma_v6_0_ring_preempt_ib +ffffffff81f3b0d0 t sdma_v6_0_ring_emit_mem_sync +ffffffff81f3b2e0 t sdma_v6_0_emit_copy_buffer +ffffffff81f3b3a0 t sdma_v6_0_emit_fill_buffer +ffffffff81f3b430 t sdma_v6_0_vm_copy_pte +ffffffff81f3b4f0 t sdma_v6_0_vm_write_pte +ffffffff81f3b5c0 t sdma_v6_0_vm_set_pte_pde +ffffffff81f3b6c0 t sdma_v6_0_set_trap_irq_state +ffffffff81f3b750 t sdma_v6_0_process_trap_irq +ffffffff81f3b880 t sdma_v6_0_process_illegal_inst_irq +ffffffff81f3b8b0 t sdma_v6_0_mqd_init +ffffffff81f3b9d0 t sdma_v6_0_start +ffffffff81f3bcb0 t sdma_v6_0_enable +ffffffff81f3be40 t sdma_v6_0_gfx_resume +ffffffff81f3ced0 t sdma_v6_0_gfx_stop +ffffffff81f3e000 T sienna_cichlid_reset_init +ffffffff81f3e0c0 t sienna_cichlid_async_reset +ffffffff81f3e120 t sienna_cichlid_get_reset_handler +ffffffff81f3e1b0 T sienna_cichlid_reset_fini +ffffffff81f3e210 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81f3e360 t sienna_cichlid_mode2_perform_reset +ffffffff81f3e3e0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81f3e6e0 t sienna_cichlid_mode2_reset +ffffffff81f3f000 T smu_v11_0_i2c_control_init +ffffffff81f3f0d0 T smu_v11_0_i2c_control_fini +ffffffff81f3f110 t smu_v11_0_i2c_xfer +ffffffff81f402c0 t smu_v11_0_i2c_func +ffffffff81f402f0 t smu_v11_0_i2c_enable +ffffffff81f40440 t smu_v11_0_i2c_abort +ffffffff81f40550 t lock_bus +ffffffff81f405f0 t trylock_bus +ffffffff81f40640 t unlock_bus +ffffffff81f41000 T smu_v13_0_10_reset_init +ffffffff81f410c0 t smu_v13_0_10_async_reset +ffffffff81f41120 t smu_v13_0_10_get_reset_handler +ffffffff81f411d0 T smu_v13_0_10_reset_fini +ffffffff81f41230 t smu_v13_0_10_mode2_prepare_hwcontext +ffffffff81f41360 t smu_v13_0_10_mode2_perform_reset +ffffffff81f413e0 t smu_v13_0_10_mode2_restore_hwcontext +ffffffff81f41750 t smu_v13_0_10_mode2_reset +ffffffff81f42000 t smuio_v11_0_get_rom_index_offset +ffffffff81f42040 t smuio_v11_0_get_rom_data_offset +ffffffff81f42080 t smuio_v11_0_update_rom_clock_gating +ffffffff81f421d0 t smuio_v11_0_get_clock_gating_state +ffffffff81f43000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81f43040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81f43080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81f431d0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81f44000 t smuio_v13_0_get_rom_index_offset +ffffffff81f44040 t smuio_v13_0_get_rom_data_offset +ffffffff81f44080 t smuio_v13_0_update_rom_clock_gating +ffffffff81f441d0 t smuio_v13_0_get_clock_gating_state +ffffffff81f44270 t smuio_v13_0_get_die_id +ffffffff81f442f0 t smuio_v13_0_get_socket_id +ffffffff81f44380 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81f45000 t smuio_v13_0_3_get_die_id +ffffffff81f45080 t smuio_v13_0_3_get_socket_id +ffffffff81f45110 t smuio_v13_0_3_get_pkg_type +ffffffff81f46000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81f46040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81f47000 t smuio_v9_0_get_rom_index_offset +ffffffff81f47040 t smuio_v9_0_get_rom_data_offset +ffffffff81f47080 t smuio_v9_0_update_rom_clock_gating +ffffffff81f471c0 t smuio_v9_0_get_clock_gating_state +ffffffff81f48000 T soc15_grbm_select +ffffffff81f48090 T soc15_program_register_sequence +ffffffff81f48290 T soc15_set_virt_ops +ffffffff81f48300 t soc15_common_early_init +ffffffff81f48720 t soc15_common_late_init +ffffffff81f48780 t soc15_common_sw_init +ffffffff81f487e0 t soc15_common_sw_fini +ffffffff81f48830 t soc15_common_hw_init +ffffffff81f48950 t soc15_common_hw_fini +ffffffff81f48a20 t soc15_common_suspend +ffffffff81f48a60 t soc15_common_resume +ffffffff81f48b30 t soc15_common_is_idle +ffffffff81f48b60 t soc15_common_wait_for_idle +ffffffff81f48b90 t soc15_common_soft_reset +ffffffff81f48bc0 t soc15_common_set_clockgating_state +ffffffff81f48f00 t soc15_common_set_powergating_state +ffffffff81f48f30 t soc15_common_get_clockgating_state +ffffffff81f49060 t soc15_uvd_ctx_rreg +ffffffff81f49100 t soc15_uvd_ctx_wreg +ffffffff81f49190 t soc15_didt_rreg +ffffffff81f49230 t soc15_didt_wreg +ffffffff81f492b0 t soc15_gc_cac_rreg +ffffffff81f493d0 t soc15_gc_cac_wreg +ffffffff81f494e0 t soc15_se_cac_rreg +ffffffff81f49600 t soc15_se_cac_wreg +ffffffff81f49710 t soc15_read_disabled_bios +ffffffff81f49740 t soc15_read_register +ffffffff81f49840 t soc15_asic_reset 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soc21_common_wait_for_idle +ffffffff81f4b780 t soc21_common_soft_reset +ffffffff81f4b7b0 t soc21_common_set_clockgating_state +ffffffff81f4b860 t soc21_common_set_powergating_state +ffffffff81f4b8c0 t soc21_common_get_clockgating_state +ffffffff81f4b910 t soc21_didt_rreg +ffffffff81f4b9b0 t soc21_didt_wreg +ffffffff81f4ba30 t soc21_read_disabled_bios +ffffffff81f4ba60 t soc21_read_register +ffffffff81f4bb50 t soc21_asic_reset +ffffffff81f4bc30 t soc21_asic_reset_method +ffffffff81f4bcf0 t soc21_get_xclk +ffffffff81f4bd20 t soc21_set_uvd_clocks +ffffffff81f4bd50 t soc21_set_vce_clocks +ffffffff81f4bd80 t soc21_get_config_memsize +ffffffff81f4bda0 t soc21_need_full_reset +ffffffff81f4bdd0 t soc21_init_doorbell_index +ffffffff81f4bef0 t soc21_need_reset_on_init +ffffffff81f4bf90 t soc21_pre_asic_init +ffffffff81f4bfc0 t soc21_update_umd_stable_pstate +ffffffff81f4c040 t soc21_query_video_codecs +ffffffff81f4d000 t tonga_ih_early_init +ffffffff81f4d050 t tonga_ih_sw_init +ffffffff81f4d0d0 t tonga_ih_sw_fini +ffffffff81f4d110 t tonga_ih_hw_init +ffffffff81f4d2f0 t tonga_ih_hw_fini +ffffffff81f4d390 t tonga_ih_suspend +ffffffff81f4d430 t tonga_ih_resume +ffffffff81f4d470 t tonga_ih_is_idle +ffffffff81f4d4c0 t tonga_ih_wait_for_idle +ffffffff81f4d560 t tonga_ih_check_soft_reset +ffffffff81f4d5c0 t tonga_ih_pre_soft_reset +ffffffff81f4d670 t tonga_ih_soft_reset +ffffffff81f4d740 t tonga_ih_post_soft_reset +ffffffff81f4d780 t tonga_ih_set_clockgating_state +ffffffff81f4d7b0 t tonga_ih_set_powergating_state +ffffffff81f4d7e0 t tonga_ih_get_wptr +ffffffff81f4d8f0 t tonga_ih_decode_iv +ffffffff81f4d970 t tonga_ih_set_rptr +ffffffff81f4e000 t umc_v6_0_init_registers +ffffffff81f4f000 t umc_v6_1_query_ras_error_count +ffffffff81f4f4e0 t umc_v6_1_query_ras_error_address +ffffffff81f4f7c0 t umc_v6_1_err_cnt_init +ffffffff81f50000 T umc_v6_7_convert_error_address +ffffffff81f50320 t umc_v6_7_query_ras_error_count +ffffffff81f50360 t umc_v6_7_query_ras_error_address +ffffffff81f50380 t umc_v6_7_query_ras_poison_mode +ffffffff81f503e0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81f50400 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81f50420 t umc_v6_7_query_ecc_error_count +ffffffff81f50690 t umc_v6_7_reset_error_count_per_channel +ffffffff81f50790 t umc_v6_7_query_error_address +ffffffff81f508b0 t umc_v6_7_ecc_info_querry_ecc_error_count +ffffffff81f50a80 t umc_v6_7_ecc_info_query_error_address +ffffffff81f51000 t umc_v8_10_query_ras_error_count +ffffffff81f51040 t umc_v8_10_query_ras_error_address +ffffffff81f51060 t umc_v8_10_err_cnt_init +ffffffff81f51080 t umc_v8_10_query_ras_poison_mode +ffffffff81f510b0 t umc_v8_10_ecc_info_query_ras_error_count +ffffffff81f510d0 t umc_v8_10_ecc_info_query_ras_error_address +ffffffff81f510f0 t umc_v8_10_set_eeprom_table_version +ffffffff81f51120 t umc_v8_10_query_ecc_error_count +ffffffff81f511f0 t umc_v8_10_clear_error_count_per_channel +ffffffff81f51260 t umc_v8_10_query_error_address +ffffffff81f51390 t umc_v8_10_convert_error_address +ffffffff81f515b0 t umc_v8_10_err_cnt_init_per_channel +ffffffff81f51660 t umc_v8_10_ecc_info_query_ecc_error_count +ffffffff81f51740 t umc_v8_10_ecc_info_query_error_address +ffffffff81f52000 t umc_v8_7_query_ras_error_count +ffffffff81f52310 t umc_v8_7_query_ras_error_address +ffffffff81f524d0 t umc_v8_7_err_cnt_init +ffffffff81f52630 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81f52750 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81f53000 t uvd_v5_0_early_init +ffffffff81f53050 t uvd_v5_0_sw_init +ffffffff81f53140 t uvd_v5_0_sw_fini +ffffffff81f53190 t uvd_v5_0_hw_init +ffffffff81f53690 t uvd_v5_0_hw_fini +ffffffff81f53710 t uvd_v5_0_suspend +ffffffff81f53810 t uvd_v5_0_resume +ffffffff81f53860 t uvd_v5_0_is_idle +ffffffff81f538b0 t uvd_v5_0_wait_for_idle +ffffffff81f53940 t uvd_v5_0_soft_reset +ffffffff81f539e0 t uvd_v5_0_set_clockgating_state +ffffffff81f53b80 t uvd_v5_0_set_powergating_state +ffffffff81f53bc0 t uvd_v5_0_get_clockgating_state +ffffffff81f53c40 t uvd_v5_0_ring_get_rptr +ffffffff81f53c80 t uvd_v5_0_ring_get_wptr +ffffffff81f53cc0 t uvd_v5_0_ring_set_wptr +ffffffff81f53cf0 t uvd_v5_0_ring_emit_ib +ffffffff81f53f60 t uvd_v5_0_ring_emit_fence +ffffffff81f54510 t uvd_v5_0_ring_test_ring +ffffffff81f546b0 t uvd_v5_0_ring_insert_nop +ffffffff81f54810 t uvd_v5_0_set_interrupt_state +ffffffff81f54840 t uvd_v5_0_process_interrupt +ffffffff81f548a0 t uvd_v5_0_stop +ffffffff81f549b0 t uvd_v5_0_start +ffffffff81f56000 t uvd_v6_0_early_init +ffffffff81f56160 t uvd_v6_0_sw_init +ffffffff81f563c0 t uvd_v6_0_sw_fini +ffffffff81f56480 t uvd_v6_0_hw_init +ffffffff81f56a30 t uvd_v6_0_hw_fini +ffffffff81f56ab0 t uvd_v6_0_suspend +ffffffff81f56bb0 t uvd_v6_0_resume +ffffffff81f56c00 t uvd_v6_0_is_idle +ffffffff81f56c50 t uvd_v6_0_wait_for_idle +ffffffff81f56ce0 t uvd_v6_0_check_soft_reset +ffffffff81f56d60 t uvd_v6_0_pre_soft_reset +ffffffff81f56da0 t uvd_v6_0_soft_reset +ffffffff81f56e70 t uvd_v6_0_post_soft_reset +ffffffff81f56f10 t uvd_v6_0_set_clockgating_state +ffffffff81f570a0 t uvd_v6_0_set_powergating_state +ffffffff81f57110 t uvd_v6_0_get_clockgating_state +ffffffff81f571a0 t uvd_v6_0_ring_get_rptr +ffffffff81f571e0 t uvd_v6_0_ring_get_wptr +ffffffff81f57220 t uvd_v6_0_ring_set_wptr +ffffffff81f57250 t uvd_v6_0_ring_emit_ib +ffffffff81f575b0 t uvd_v6_0_ring_emit_fence +ffffffff81f57b60 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81f57f50 t uvd_v6_0_ring_emit_vm_flush +ffffffff81f582b0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81f582e0 t uvd_v6_0_ring_test_ring +ffffffff81f58480 t uvd_v6_0_ring_insert_nop +ffffffff81f585e0 t uvd_v6_0_ring_emit_wreg +ffffffff81f58860 t uvd_v6_0_enc_ring_get_rptr +ffffffff81f588c0 t uvd_v6_0_enc_ring_get_wptr +ffffffff81f58920 t uvd_v6_0_enc_ring_set_wptr +ffffffff81f58960 t uvd_v6_0_enc_ring_emit_ib +ffffffff81f58ba0 t uvd_v6_0_enc_ring_emit_fence +ffffffff81f58de0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81f58f90 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81f591a0 t uvd_v6_0_enc_ring_test_ring +ffffffff81f592f0 t uvd_v6_0_enc_ring_test_ib +ffffffff81f597d0 t uvd_v6_0_enc_ring_insert_end +ffffffff81f59860 t uvd_v6_0_set_interrupt_state +ffffffff81f59890 t uvd_v6_0_process_interrupt +ffffffff81f59990 t uvd_v6_0_stop +ffffffff81f59aa0 t uvd_v6_0_start +ffffffff81f5b000 t uvd_v7_0_early_init +ffffffff81f5b270 t uvd_v7_0_sw_init +ffffffff81f5b690 t uvd_v7_0_sw_fini +ffffffff81f5b780 t uvd_v7_0_hw_init +ffffffff81f5e540 t uvd_v7_0_hw_fini +ffffffff81f5e850 t uvd_v7_0_suspend +ffffffff81f5e900 t uvd_v7_0_resume +ffffffff81f5e950 t uvd_v7_0_set_clockgating_state +ffffffff81f5e980 t uvd_v7_0_ring_get_rptr +ffffffff81f5ea20 t uvd_v7_0_ring_get_wptr +ffffffff81f5eac0 t uvd_v7_0_ring_set_wptr +ffffffff81f5eb40 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81f5ebb0 t uvd_v7_0_ring_emit_ib +ffffffff81f5ef50 t uvd_v7_0_ring_emit_fence +ffffffff81f5f5a0 t uvd_v7_0_ring_emit_vm_flush +ffffffff81f5f610 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81f5f640 t uvd_v7_0_ring_test_ring +ffffffff81f5f8d0 t uvd_v7_0_ring_insert_nop +ffffffff81f5fa70 t uvd_v7_0_ring_emit_wreg +ffffffff81f5fd40 t uvd_v7_0_ring_emit_reg_wait +ffffffff81f600f0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81f601e0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81f602e0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81f603e0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81f60620 t uvd_v7_0_enc_ring_emit_fence +ffffffff81f60860 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81f608d0 t uvd_v7_0_enc_ring_test_ring +ffffffff81f60a30 t uvd_v7_0_enc_ring_test_ib +ffffffff81f60f10 t uvd_v7_0_enc_ring_insert_end +ffffffff81f60fa0 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81f610f0 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81f612b0 t uvd_v7_0_set_interrupt_state +ffffffff81f612e0 t uvd_v7_0_process_interrupt +ffffffff81f62000 t vce_v3_0_early_init +ffffffff81f62180 t vce_v3_0_sw_init +ffffffff81f622e0 t vce_v3_0_sw_fini +ffffffff81f62330 t vce_v3_0_hw_init +ffffffff81f62400 t vce_v3_0_hw_fini +ffffffff81f624f0 t vce_v3_0_suspend +ffffffff81f625c0 t vce_v3_0_resume +ffffffff81f626a0 t vce_v3_0_is_idle +ffffffff81f62710 t vce_v3_0_wait_for_idle +ffffffff81f627c0 t vce_v3_0_check_soft_reset +ffffffff81f628c0 t vce_v3_0_pre_soft_reset +ffffffff81f62960 t vce_v3_0_soft_reset +ffffffff81f62a30 t vce_v3_0_post_soft_reset +ffffffff81f62ad0 t vce_v3_0_set_clockgating_state +ffffffff81f62dc0 t vce_v3_0_set_powergating_state +ffffffff81f635e0 t vce_v3_0_get_clockgating_state +ffffffff81f636a0 t vce_v3_0_ring_get_rptr +ffffffff81f63770 t vce_v3_0_ring_get_wptr +ffffffff81f63840 t vce_v3_0_ring_set_wptr +ffffffff81f63900 t vce_v3_0_ring_emit_ib +ffffffff81f63b40 t vce_v3_0_emit_pipeline_sync +ffffffff81f63cf0 t vce_v3_0_emit_vm_flush +ffffffff81f63f60 t vce_v3_0_set_interrupt_state +ffffffff81f63fd0 t vce_v3_0_process_interrupt +ffffffff81f64090 t vce_v3_0_stop +ffffffff81f65000 t vce_v4_0_early_init +ffffffff81f650b0 t vce_v4_0_sw_init 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+ffffffff81f686d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81f68740 T vcn_dec_sw_ring_emit_wreg +ffffffff81f69000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81f69140 T vcn_v1_0_ring_end_use +ffffffff81f691b0 t vcn_v1_0_early_init +ffffffff81f69310 t vcn_v1_0_sw_init +ffffffff81f695b0 t vcn_v1_0_sw_fini +ffffffff81f69610 t vcn_v1_0_hw_init +ffffffff81f696e0 t vcn_v1_0_hw_fini +ffffffff81f697e0 t vcn_v1_0_suspend +ffffffff81f69850 t vcn_v1_0_resume +ffffffff81f69930 t vcn_v1_0_is_idle +ffffffff81f699c0 t vcn_v1_0_wait_for_idle +ffffffff81f69a00 t vcn_v1_0_set_clockgating_state +ffffffff81f69ab0 t vcn_v1_0_set_powergating_state +ffffffff81f6a010 t vcn_v1_0_dec_ring_get_rptr +ffffffff81f6a0a0 t vcn_v1_0_dec_ring_get_wptr +ffffffff81f6a130 t vcn_v1_0_dec_ring_set_wptr +ffffffff81f6a240 t vcn_v1_0_ring_patch_cs_in_place +ffffffff81f6a400 t vcn_v1_0_dec_ring_emit_ib +ffffffff81f6a780 t vcn_v1_0_dec_ring_emit_fence +ffffffff81f6ad90 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff81f6ae00 t vcn_v1_0_dec_ring_insert_nop +ffffffff81f6af90 t vcn_v1_0_dec_ring_insert_start +ffffffff81f6b160 t vcn_v1_0_dec_ring_insert_end +ffffffff81f6b270 t vcn_v1_0_ring_begin_use +ffffffff81f6b310 t vcn_v1_0_dec_ring_emit_wreg +ffffffff81f6b5c0 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff81f6b940 t vcn_v1_0_enc_ring_get_rptr +ffffffff81f6ba20 t vcn_v1_0_enc_ring_get_wptr +ffffffff81f6bb00 t vcn_v1_0_enc_ring_set_wptr +ffffffff81f6bbc0 t vcn_v1_0_enc_ring_emit_ib +ffffffff81f6be00 t vcn_v1_0_enc_ring_emit_fence +ffffffff81f6c040 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81f6c0b0 t vcn_v1_0_enc_ring_insert_end +ffffffff81f6c140 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81f6c290 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81f6c450 t vcn_v1_0_set_interrupt_state +ffffffff81f6c480 t vcn_v1_0_process_interrupt +ffffffff81f6c530 t vcn_v1_0_idle_work_handler +ffffffff81f6c6a0 t vcn_v1_0_pause_dpg_mode +ffffffff81f6d540 t vcn_v1_0_enable_clock_gating +ffffffff81f6d970 t vcn_v1_0_disable_clock_gating +ffffffff81f6df30 t vcn_1_0_enable_static_power_gating +ffffffff81f6e0e0 t vcn_v1_0_start_dpg_mode +ffffffff81f71ea0 t vcn_v1_0_start_spg_mode +ffffffff81f740a0 t vcn_v1_0_clock_gating_dpg_mode +ffffffff81f75000 T vcn_v2_0_dec_ring_insert_start +ffffffff81f751c0 T vcn_v2_0_dec_ring_insert_end +ffffffff81f752c0 T vcn_v2_0_dec_ring_insert_nop +ffffffff81f75430 T vcn_v2_0_dec_ring_emit_fence +ffffffff81f759f0 T vcn_v2_0_dec_ring_emit_ib +ffffffff81f75d50 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff81f760a0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff81f76110 T vcn_v2_0_dec_ring_emit_wreg +ffffffff81f76390 T vcn_v2_0_enc_ring_emit_fence +ffffffff81f765d0 T vcn_v2_0_enc_ring_insert_end +ffffffff81f76660 T vcn_v2_0_enc_ring_emit_ib +ffffffff81f768a0 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff81f76a60 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff81f76ad0 T vcn_v2_0_enc_ring_emit_wreg +ffffffff81f76c20 T vcn_v2_0_dec_ring_test_ring +ffffffff81f76ec0 t vcn_v2_0_early_init +ffffffff81f77020 t vcn_v2_0_sw_init +ffffffff81f77350 t vcn_v2_0_sw_fini +ffffffff81f773d0 t vcn_v2_0_hw_init +ffffffff81f77d50 t vcn_v2_0_hw_fini +ffffffff81f77e50 t vcn_v2_0_suspend +ffffffff81f77e80 t vcn_v2_0_resume +ffffffff81f77ed0 t vcn_v2_0_is_idle +ffffffff81f77f60 t vcn_v2_0_wait_for_idle +ffffffff81f77fa0 t vcn_v2_0_set_clockgating_state +ffffffff81f78030 t vcn_v2_0_set_powergating_state +ffffffff81f785f0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81f78680 t vcn_v2_0_dec_ring_get_wptr +ffffffff81f78720 t vcn_v2_0_dec_ring_set_wptr +ffffffff81f78860 t vcn_v2_0_enc_ring_get_rptr +ffffffff81f78940 t vcn_v2_0_enc_ring_get_wptr +ffffffff81f78a30 t vcn_v2_0_enc_ring_set_wptr +ffffffff81f78b20 t vcn_v2_0_set_interrupt_state +ffffffff81f78b50 t vcn_v2_0_process_interrupt +ffffffff81f78c00 t vcn_v2_0_pause_dpg_mode +ffffffff81f793f0 t vcn_v2_0_enable_clock_gating +ffffffff81f79680 t vcn_v2_0_disable_clock_gating +ffffffff81f79aa0 t vcn_v2_0_start +ffffffff81f7e050 t vcn_v2_0_enable_static_power_gating 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vcn_v2_6_set_ras_interrupt_state +ffffffff81f88040 t vcn_v2_5_pause_dpg_mode +ffffffff81f887c0 t vcn_v2_5_enable_clock_gating +ffffffff81f88ad0 t vcn_v2_5_disable_clock_gating +ffffffff81f88fc0 t vcn_v2_5_start_dpg_mode +ffffffff81f8c990 t vcn_v2_5_clock_gating_dpg_mode +ffffffff81f8d740 t vcn_v2_5_mc_resume_dpg_mode +ffffffff81f92000 t vcn_v3_0_early_init +ffffffff81f92220 t vcn_v3_0_sw_init +ffffffff81f926e0 t vcn_v3_0_sw_fini +ffffffff81f927c0 t vcn_v3_0_hw_init +ffffffff81f93310 t vcn_v3_0_hw_fini +ffffffff81f93410 t vcn_v3_0_suspend +ffffffff81f93440 t vcn_v3_0_resume +ffffffff81f93490 t vcn_v3_0_is_idle +ffffffff81f93580 t vcn_v3_0_wait_for_idle +ffffffff81f93620 t vcn_v3_0_set_clockgating_state +ffffffff81f93730 t vcn_v3_0_set_powergating_state +ffffffff81f95cc0 t vcn_v3_0_dec_ring_get_rptr +ffffffff81f95d60 t vcn_v3_0_dec_ring_get_wptr +ffffffff81f95e10 t vcn_v3_0_dec_ring_set_wptr +ffffffff81f95f80 t vcn_v3_0_ring_patch_cs_in_place +ffffffff81f962a0 t vcn_v3_0_enc_ring_get_rptr +ffffffff81f96390 t vcn_v3_0_enc_ring_get_wptr +ffffffff81f964a0 t vcn_v3_0_enc_ring_set_wptr +ffffffff81f965b0 t vcn_v3_0_set_interrupt_state +ffffffff81f965e0 t vcn_v3_0_process_interrupt +ffffffff81f966d0 t vcn_v3_0_pause_dpg_mode +ffffffff81f96f00 t vcn_v3_0_enable_clock_gating +ffffffff81f97190 t vcn_v3_0_disable_clock_gating +ffffffff81f976c0 t vcn_v3_0_start_dpg_mode +ffffffff81f9a9b0 t vcn_v3_0_clock_gating_dpg_mode +ffffffff81f9b790 t vcn_v3_0_mc_resume_dpg_mode +ffffffff81fa0000 t vcn_v4_0_query_ras_poison_status +ffffffff81fa00e0 t vcn_v4_0_early_init +ffffffff81fa02a0 t vcn_v4_0_sw_init +ffffffff81fa0560 t vcn_v4_0_sw_fini +ffffffff81fa0640 t vcn_v4_0_hw_init +ffffffff81fa1070 t vcn_v4_0_hw_fini +ffffffff81fa11c0 t vcn_v4_0_suspend +ffffffff81fa11f0 t vcn_v4_0_resume +ffffffff81fa1240 t vcn_v4_0_is_idle +ffffffff81fa1340 t vcn_v4_0_wait_for_idle +ffffffff81fa13f0 t vcn_v4_0_set_clockgating_state +ffffffff81fa1500 t vcn_v4_0_set_powergating_state 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vi_common_set_powergating_state +ffffffff81fc0740 t vi_common_get_clockgating_state +ffffffff81fc0800 t cz_smc_rreg +ffffffff81fc0880 t cz_smc_wreg +ffffffff81fc08f0 t vi_smc_rreg +ffffffff81fc0970 t vi_smc_wreg +ffffffff81fc09e0 t vi_pcie_rreg +ffffffff81fc0a80 t vi_pcie_wreg +ffffffff81fc0b10 t vi_uvd_ctx_rreg +ffffffff81fc0ba0 t vi_uvd_ctx_wreg +ffffffff81fc0c10 t vi_didt_rreg +ffffffff81fc0c90 t vi_didt_wreg +ffffffff81fc0d00 t vi_gc_cac_rreg +ffffffff81fc0d80 t vi_gc_cac_wreg +ffffffff81fc0df0 t vi_read_disabled_bios +ffffffff81fc0fc0 t vi_read_bios_from_rom +ffffffff81fc10c0 t vi_read_register +ffffffff81fc1370 t vi_asic_reset +ffffffff81fc14d0 t vi_asic_reset_method +ffffffff81fc1580 t vi_get_xclk +ffffffff81fc1630 t vi_set_uvd_clocks +ffffffff81fc16e0 t vi_set_vce_clocks +ffffffff81fc1980 t vi_get_config_memsize +ffffffff81fc19a0 t vi_flush_hdp +ffffffff81fc1a10 t vi_invalidate_hdp +ffffffff81fc1a80 t vi_need_full_reset +ffffffff81fc1ad0 t vi_get_pcie_usage +ffffffff81fc1c00 t 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dm_encoder_helper_atomic_check +ffffffff81fc5910 T amdgpu_dm_connector_init_helper +ffffffff81fc5c70 T amdgpu_dm_get_encoder_crtc_mask +ffffffff81fc5cc0 T dm_restore_drm_connector_state +ffffffff81fc5e30 t parse_hdmi_amd_vsdb +ffffffff81fc6160 T amdgpu_dm_trigger_timing_sync +ffffffff81fc6330 T dm_write_reg_func +ffffffff81fc6350 T dm_read_reg_func +ffffffff81fc63f0 T amdgpu_dm_process_dmub_aux_transfer_sync +ffffffff81fc6600 T amdgpu_dm_process_dmub_set_config_sync +ffffffff81fc6770 T check_seamless_boot_capability +ffffffff81fc67c0 T dm_execute_dmub_cmd +ffffffff81fc67e0 T dm_execute_dmub_cmd_list +ffffffff81fc6800 t dm_early_init +ffffffff81fc6bb0 t dm_late_init +ffffffff81fc6e50 t dm_sw_init +ffffffff81fc7400 t dm_sw_fini +ffffffff81fc74a0 t amdgpu_dm_early_fini +ffffffff81fc7500 t dm_hw_init +ffffffff81fc90d0 t dm_hw_fini +ffffffff81fc9120 t dm_suspend +ffffffff81fc94a0 t dm_resume +ffffffff81fc9d00 t dm_is_idle +ffffffff81fc9d30 t dm_wait_for_idle +ffffffff81fc9d60 t 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dm_helpers_dp_mst_stop_top_mgr +ffffffff81fd8b40 T dm_helpers_dp_read_dpcd +ffffffff81fd8bc0 T dm_helpers_dp_write_dpcd +ffffffff81fd8c40 T dm_helpers_submit_i2c +ffffffff81fd8d60 T dm_helpers_dp_write_dsc_enable +ffffffff81fd9390 T dm_helpers_is_dp_sink_present +ffffffff81fd9420 T dm_helpers_read_local_edid +ffffffff81fd9680 T dm_helper_dmub_aux_transfer_sync +ffffffff81fd96d0 T dm_helpers_dmub_set_config_sync +ffffffff81fd96f0 T dm_set_dcn_clocks +ffffffff81fd9720 T dm_helpers_smu_timeout +ffffffff81fd9750 T dm_helpers_init_panel_settings +ffffffff81fd97c0 T dm_helpers_override_panel_settings +ffffffff81fd9800 T dm_helpers_allocate_gpu_mem +ffffffff81fd9900 T dm_helpers_free_gpu_mem +ffffffff81fd9990 T dm_helpers_dmub_outbox_interrupt_control +ffffffff81fd9a20 T dm_helpers_mst_enable_stream_features +ffffffff81fd9b30 T dm_helpers_dp_handle_test_pattern_request +ffffffff81fd9e60 T dm_set_phyd32clk +ffffffff81fd9e90 T dm_helpers_enable_periodic_detection +ffffffff81fd9ec0 T dm_helpers_dp_mst_update_branch_bandwidth +ffffffff81fd9ef0 T dm_get_adaptive_sync_support_type +ffffffff81fd9f60 t execute_synaptics_rc_command +ffffffff81fdb000 T amdgpu_dm_irq_register_interrupt +ffffffff81fdb1a0 t dm_irq_work_func +ffffffff81fdb1c0 T amdgpu_dm_irq_unregister_interrupt +ffffffff81fdb340 T amdgpu_dm_irq_init +ffffffff81fdb430 T amdgpu_dm_irq_fini +ffffffff81fdb5d0 T amdgpu_dm_irq_suspend +ffffffff81fdb6e0 T amdgpu_dm_irq_resume_early +ffffffff81fdb8a0 T amdgpu_dm_irq_resume_late +ffffffff81fdba60 T amdgpu_dm_set_irq_funcs +ffffffff81fdbb20 T amdgpu_dm_outbox_init +ffffffff81fdbb50 T amdgpu_dm_hpd_init +ffffffff81fdbc00 T amdgpu_dm_hpd_fini +ffffffff81fdbcb0 t amdgpu_dm_set_crtc_irq_state +ffffffff81fdbd30 t amdgpu_dm_irq_handler +ffffffff81fdbf30 t amdgpu_dm_set_vline0_irq_state +ffffffff81fdbfb0 t amdgpu_dm_set_dmub_outbox_irq_state +ffffffff81fdc000 t amdgpu_dm_set_vupdate_irq_state +ffffffff81fdc080 t amdgpu_dm_set_dmub_trace_irq_state +ffffffff81fdc0d0 t amdgpu_dm_set_pflip_irq_state +ffffffff81fdc150 t amdgpu_dm_set_hpd_irq_state +ffffffff81fdd000 T needs_dsc_aux_workaround +ffffffff81fdd050 T dm_dp_create_fake_mst_encoders +ffffffff81fdd100 T dm_handle_mst_sideband_msg_ready_event +ffffffff81fdd340 T amdgpu_dm_initialize_dp_connector +ffffffff81fdd440 t kasprintf +ffffffff81fdd510 t dm_dp_aux_transfer +ffffffff81fdd650 T dm_mst_get_pbn_divider +ffffffff81fdd6b0 T compute_mst_dsc_configs_for_state +ffffffff81fdd950 t is_dsc_need_re_compute +ffffffff81fddb20 t compute_mst_dsc_configs_for_link +ffffffff81fde150 T pre_validate_dsc +ffffffff81fde700 T dm_dp_mst_is_port_support_mode +ffffffff81fde960 t amdgpu_dm_encoder_destroy +ffffffff81fde970 t dm_dp_add_mst_connector +ffffffff81fdeb30 t dm_handle_mst_down_rep_msg_ready +ffffffff81fdeb50 t amdgpu_dm_mst_connector_late_register +ffffffff81fdeba0 t amdgpu_dm_mst_connector_early_unregister +ffffffff81fdec70 t dm_dp_mst_connector_destroy +ffffffff81fdecf0 t dm_dp_mst_get_modes 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dm_plane_atomic_check +ffffffff81fe22b0 t dm_plane_atomic_async_check +ffffffff81fe22f0 t dm_plane_atomic_async_update +ffffffff81fe23a0 t amdgpu_bo_reserve +ffffffff81fe25a0 t amdgpu_bo_unreserve +ffffffff81fe3000 T dm_pp_apply_display_requirements +ffffffff81fe31d0 T dm_pp_get_clock_levels_by_type +ffffffff81fe3510 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff81fe36d0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff81fe3880 T dm_pp_notify_wm_clock_changes +ffffffff81fe38d0 T dm_pp_apply_power_level_change_request +ffffffff81fe3900 T dm_pp_apply_clock_for_voltage_request +ffffffff81fe39a0 T dm_pp_get_static_clocks +ffffffff81fe3a60 T dm_pp_get_funcs +ffffffff81fe3b70 t pp_rv_set_wm_ranges +ffffffff81fe3cf0 t pp_rv_set_pme_wa_enable +ffffffff81fe3d10 t pp_rv_set_active_display_count +ffffffff81fe3d30 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff81fe3d50 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff81fe3d70 t pp_rv_set_hard_min_fclk_by_freq +ffffffff81fe3d90 t pp_nv_set_display_count +ffffffff81fe3df0 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff81fe3e60 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff81fe3ec0 t pp_nv_set_voltage_by_freq +ffffffff81fe3f50 t pp_nv_set_wm_ranges +ffffffff81fe3fa0 t pp_nv_set_hard_min_uclk_by_freq +ffffffff81fe4010 t pp_nv_get_maximum_sustainable_clocks +ffffffff81fe4070 t pp_nv_get_uclk_dpm_states +ffffffff81fe40d0 t pp_nv_set_pstate_handshake_support +ffffffff81fe4120 t pp_rn_set_wm_ranges +ffffffff81fe4170 t pp_rn_get_dpm_clock_table +ffffffff81fe5000 T amdgpu_dm_set_psr_caps +ffffffff81fe5150 T amdgpu_dm_link_setup_psr +ffffffff81fe52e0 T amdgpu_dm_psr_enable +ffffffff81fe53e0 T amdgpu_dm_psr_disable +ffffffff81fe5460 T amdgpu_dm_psr_disable_all +ffffffff81fe6000 T amdgpu_dm_setup_replay +ffffffff81fe60f0 T amdgpu_dm_replay_enable +ffffffff81fe6270 T amdgpu_dm_replay_disable +ffffffff81fe7000 T dm_get_elapse_time_in_ns +ffffffff81fe7030 T dm_perf_trace_timestamp +ffffffff81fe8000 T dc_assert_fp_enabled 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build_prescale_params +ffffffff81fec000 T dc_fixpt_from_fraction +ffffffff81fec1c0 T dc_fixpt_mul +ffffffff81fec360 T dc_fixpt_sqr +ffffffff81fec4d0 T dc_fixpt_recip +ffffffff81fec540 T dc_fixpt_sinc +ffffffff81fec730 T dc_fixpt_sin +ffffffff81fec760 T dc_fixpt_cos +ffffffff81fec850 T dc_fixpt_exp +ffffffff81fecb30 t fixed31_32_exp_from_taylor_series +ffffffff81fecf10 T dc_fixpt_log +ffffffff81fed120 T dc_fixpt_u4d19 +ffffffff81fed160 T dc_fixpt_u3d19 +ffffffff81fed1a0 T dc_fixpt_u2d19 +ffffffff81fed1e0 T dc_fixpt_u0d19 +ffffffff81fed210 T dc_fixpt_clamp_u0d14 +ffffffff81fed260 T dc_fixpt_clamp_u0d10 +ffffffff81fed2b0 T dc_fixpt_s4d19 +ffffffff81fee000 T bios_parser_create +ffffffff81fef270 t bios_parser_get_connectors_number +ffffffff81fef2d0 t bios_parser_get_connector_id +ffffffff81fef360 t bios_parser_get_src_obj +ffffffff81fef460 t bios_parser_get_i2c_info +ffffffff81fef680 t bios_parser_get_hpd_info +ffffffff81fef760 t bios_parser_get_device_tag +ffffffff81fef960 t bios_parser_get_spread_spectrum_info +ffffffff81fefb60 t bios_parser_get_ss_entry_number +ffffffff81fefda0 t bios_parser_get_embedded_panel_info +ffffffff81ff0310 t bios_parser_get_gpio_pin_info +ffffffff81ff0420 t bios_parser_get_encoder_cap_info +ffffffff81ff0520 t bios_parser_set_scratch_critical_state +ffffffff81ff0530 t bios_parser_is_device_id_supported +ffffffff81ff05f0 t bios_parser_encoder_control +ffffffff81ff0630 t bios_parser_transmitter_control +ffffffff81ff0670 t bios_parser_enable_crtc +ffffffff81ff06c0 t bios_parser_adjust_pixel_clock +ffffffff81ff0700 t bios_parser_set_pixel_clock +ffffffff81ff0740 t bios_parser_set_dce_clock +ffffffff81ff0780 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff81ff07d0 t bios_parser_program_crtc_timing +ffffffff81ff0810 t bios_parser_program_display_engine_pll +ffffffff81ff0850 t bios_parser_enable_disp_power_gating +ffffffff81ff0890 t bios_parser_destroy +ffffffff81ff0950 t bios_get_board_layout_info +ffffffff81ff0bd0 t get_bios_object +ffffffff81ff0da0 t get_ss_info_from_ss_info_table +ffffffff81ff0f70 t get_ss_info_v3_1 +ffffffff81ff10e0 t get_ss_entry_number_from_ss_info_tbl +ffffffff81ff2000 T firmware_parser_create +ffffffff81ff3e70 t bios_parser_get_connectors_number +ffffffff81ff3fe0 t bios_parser_get_connector_id +ffffffff81ff4040 t bios_parser_get_src_obj +ffffffff81ff42e0 t bios_parser_get_i2c_info +ffffffff81ff4580 t bios_parser_get_hpd_info +ffffffff81ff46f0 t bios_parser_get_device_tag +ffffffff81ff49c0 t bios_parser_get_spread_spectrum_info +ffffffff81ff4e40 t bios_parser_get_ss_entry_number +ffffffff81ff4e70 t bios_parser_get_embedded_panel_info +ffffffff81ff5070 t bios_parser_get_gpio_pin_info +ffffffff81ff5190 t bios_parser_get_encoder_cap_info +ffffffff81ff5300 t bios_parser_is_accelerated_mode +ffffffff81ff5310 t bios_parser_set_scratch_critical_state +ffffffff81ff5320 t bios_parser_is_device_id_supported +ffffffff81ff5390 t bios_parser_encoder_control +ffffffff81ff53d0 t bios_parser_transmitter_control +ffffffff81ff5410 t bios_parser_enable_crtc +ffffffff81ff5460 t bios_parser_set_pixel_clock +ffffffff81ff54a0 t bios_parser_set_dce_clock +ffffffff81ff54e0 t bios_parser_program_crtc_timing +ffffffff81ff5520 t bios_parser_enable_disp_power_gating +ffffffff81ff5560 t firmware_parser_destroy +ffffffff81ff5620 t bios_get_board_layout_info +ffffffff81ff5ac0 t bios_parser_pack_data_tables +ffffffff81ff5af0 t bios_get_atom_dc_golden_table +ffffffff81ff5c30 t bios_parser_enable_lvtma_control +ffffffff81ff5c80 t bios_parser_get_soc_bb_info +ffffffff81ff5d90 t bios_parser_get_disp_connector_caps_info +ffffffff81ff5ef0 t bios_parser_get_lttpr_caps +ffffffff81ff6040 t bios_parser_get_lttpr_interop +ffffffff81ff6180 t bios_parser_get_connector_speed_cap_info +ffffffff81ff62d0 t get_bios_object +ffffffff81ff6430 t get_bios_object_from_path_v3 +ffffffff81ff7000 T object_id_from_bios_object_id +ffffffff81ff8000 T bios_get_image +ffffffff81ff8050 T bios_is_accelerated_mode +ffffffff81ff80b0 T bios_set_scratch_acc_mode_change +ffffffff81ff80f0 T bios_set_scratch_critical_state +ffffffff81ff8130 T bios_get_vga_enabled_displays +ffffffff81ff9000 T dal_bios_parser_create +ffffffff81ff9070 T dal_bios_parser_destroy +ffffffff81ffa000 T dal_bios_parser_init_cmd_tbl +ffffffff81ffa810 t encoder_control_digx_v3 +ffffffff81ffa910 t encoder_control_digx_v4 +ffffffff81ffaa10 t encoder_control_digx_v5 +ffffffff81ffab60 t encoder_control_dig1_v1 +ffffffff81ffabe0 t encoder_control_dig2_v1 +ffffffff81ffac60 t encoder_control_dig_v1 +ffffffff81ffacc0 t transmitter_control_v2 +ffffffff81ffae60 t transmitter_control_v3 +ffffffff81ffb010 t transmitter_control_v4 +ffffffff81ffb1c0 t transmitter_control_v1_5 +ffffffff81ffb330 t transmitter_control_v1_6 +ffffffff81ffb490 t set_pixel_clock_v3 +ffffffff81ffb600 t set_pixel_clock_v5 +ffffffff81ffb7a0 t set_pixel_clock_v6 +ffffffff81ffb940 t set_pixel_clock_v7 +ffffffff81ffbb10 t enable_spread_spectrum_on_ppll_v1 +ffffffff81ffbc30 t enable_spread_spectrum_on_ppll_v2 +ffffffff81ffbd60 t enable_spread_spectrum_on_ppll_v3 +ffffffff81ffbe70 t adjust_display_pll_v2 +ffffffff81ffbfc0 t adjust_display_pll_v3 +ffffffff81ffc130 t dac1_encoder_control_v1 +ffffffff81ffc1b0 t dac2_encoder_control_v1 +ffffffff81ffc230 t dac1_output_control_v1 +ffffffff81ffc290 t dac2_output_control_v1 +ffffffff81ffc2f0 t set_crtc_using_dtd_timing_v3 +ffffffff81ffc440 t set_crtc_timing_v1 +ffffffff81ffc5c0 t enable_crtc_v1 +ffffffff81ffc660 t enable_crtc_mem_req_v1 +ffffffff81ffc700 t program_clock_v5 +ffffffff81ffc810 t program_clock_v6 +ffffffff81ffc930 t external_encoder_control_v3 +ffffffff81ffcae0 t enable_disp_power_gating_v2_1 +ffffffff81ffcbb0 t set_dce_clock_v2_1 +ffffffff81ffd000 T dal_firmware_parser_init_cmd_tbl +ffffffff81ffd3d0 t encoder_control_digx_v1_5 +ffffffff81ffd5a0 t encoder_control_fallback +ffffffff81ffd600 t transmitter_control_v1_6 +ffffffff81ffd7a0 t transmitter_control_v1_7 +ffffffff81ffd990 t transmitter_control_fallback +ffffffff81ffd9f0 t set_pixel_clock_v7 +ffffffff81ffdc40 t set_pixel_clock_fallback +ffffffff81ffdca0 t set_crtc_using_dtd_timing_v3 +ffffffff81ffddf0 t enable_crtc_v1 +ffffffff81ffde90 t external_encoder_control_v3 +ffffffff81ffdec0 t enable_disp_power_gating_v2_1 +ffffffff81ffe010 t enable_disp_power_gating_fallback +ffffffff81ffe070 t set_dce_clock_v2_1 +ffffffff81ffe1a0 t get_smu_clock_info_v3_1 +ffffffff81ffe210 t enable_lvtma_control +ffffffff81fff000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81fff0a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81fff1c0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81fff240 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81fff2d0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81fff390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81fff470 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff82000000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff820000b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff820001c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff82000240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff820002d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff820003b0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff82001000 T dal_cmd_tbl_helper_dce110_get_table +ffffffff82001030 t encoder_action_to_atom +ffffffff820010b0 t engine_bp_to_atom +ffffffff82001100 t clock_source_id_to_atom +ffffffff820011a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff820011f0 t signal_type_to_atom_dig_mode +ffffffff82001250 t hpd_sel_to_atom +ffffffff82001290 t dig_encoder_sel_to_atom +ffffffff820012c0 t phy_id_to_atom +ffffffff82001300 t disp_power_gating_action_to_atom +ffffffff82002000 T dal_cmd_tbl_helper_dce112_get_table2 +ffffffff82002030 t encoder_action_to_atom +ffffffff820020b0 t engine_bp_to_atom +ffffffff82002100 t clock_source_id_to_atom +ffffffff820021d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff82002220 t signal_type_to_atom_dig_mode +ffffffff82002280 t hpd_sel_to_atom +ffffffff820022c0 t dig_encoder_sel_to_atom +ffffffff820022f0 t phy_id_to_atom +ffffffff82002330 t disp_power_gating_action_to_atom +ffffffff820023a0 t dc_clock_type_to_atom +ffffffff82002420 t transmitter_color_depth_to_atom +ffffffff82003000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff82003030 t encoder_action_to_atom +ffffffff820030b0 t engine_bp_to_atom +ffffffff82003100 t clock_source_id_to_atom +ffffffff820031d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff82003220 t signal_type_to_atom_dig_mode +ffffffff82003280 t hpd_sel_to_atom +ffffffff820032c0 t dig_encoder_sel_to_atom +ffffffff820032f0 t phy_id_to_atom +ffffffff82003330 t disp_power_gating_action_to_atom +ffffffff820033a0 t dc_clock_type_to_atom +ffffffff82003420 t transmitter_color_depth_to_atom +ffffffff82004000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff82004030 t encoder_action_to_atom +ffffffff820040b0 t engine_bp_to_atom +ffffffff82004100 t clock_source_id_to_atom +ffffffff820041d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff82004220 t signal_type_to_atom_dig_mode +ffffffff82004280 t hpd_sel_to_atom +ffffffff820042c0 t dig_encoder_sel_to_atom +ffffffff82004310 t phy_id_to_atom +ffffffff82004350 t disp_power_gating_action_to_atom +ffffffff82005000 T clk_mgr_helper_get_active_display_cnt +ffffffff820050e0 T clk_mgr_helper_get_active_plane_cnt +ffffffff82005190 T clk_mgr_exit_optimized_pwr_state +ffffffff820052a0 T clk_mgr_optimize_pwr_state +ffffffff82005390 T dc_clk_mgr_create +ffffffff82005a50 T dc_destroy_clk_mgr +ffffffff82006000 T dentist_get_divider_from_did +ffffffff82006070 T dce_adjust_dp_ref_freq_for_ss +ffffffff82006170 T dce_get_dp_ref_freq_khz +ffffffff820062a0 T dce12_get_dp_ref_freq_khz +ffffffff820062c0 T dce_get_max_pixel_clock_for_all_paths +ffffffff820064d0 T dce_get_required_clocks_state +ffffffff82006580 T dce_set_clock +ffffffff820066e0 T dce_clock_read_ss_info +ffffffff82006800 T dce_clk_mgr_construct +ffffffff820069f0 t dce_update_clocks +ffffffff82007000 T dce110_get_min_vblank_time_us +ffffffff82007090 T dce110_fill_display_configs +ffffffff82007300 T dce11_pplib_apply_display_requirements +ffffffff820075f0 T dce110_clk_mgr_construct +ffffffff820076a0 t dce11_update_clocks +ffffffff82008000 T dce112_set_clock +ffffffff82008180 T dce112_set_dispclk +ffffffff820082a0 T dce112_set_dprefclk +ffffffff82008310 T dce112_clk_mgr_construct +ffffffff820083c0 t dce112_update_clocks +ffffffff82009000 T dce120_clk_mgr_construct +ffffffff82009090 T dce121_clk_mgr_construct +ffffffff820091c0 t dce12_update_clocks +ffffffff8200a000 T rv1_clk_mgr_construct +ffffffff8200a0c0 t rv1_update_clocks +ffffffff8200a5a0 t rv1_init_clocks +ffffffff8200a630 t rv1_enable_pme_wa +ffffffff8200b000 T rv1_vbios_smu_set_dispclk +ffffffff8200b0e0 t rv1_vbios_smu_send_msg_with_param +ffffffff8200b1f0 T rv1_vbios_smu_set_dprefclk +ffffffff8200c000 T rv2_clk_mgr_construct +ffffffff8200d000 T dentist_get_did_from_divider +ffffffff8200d080 T dcn20_update_clocks_update_dpp_dto +ffffffff8200d150 T dcn20_update_clocks_update_dentist +ffffffff8200d640 T dcn2_update_clocks +ffffffff8200dbc0 T dcn2_read_clocks_from_hw_dentist +ffffffff8200dc90 T dcn2_update_clocks_fpga +ffffffff8200ddc0 T dcn2_init_clocks +ffffffff8200de60 T dcn2_get_clock +ffffffff8200ded0 T dcn20_clk_mgr_construct +ffffffff8200e000 t dcn2_enable_pme_wa +ffffffff8200e050 t dcn2_are_clock_states_equal +ffffffff8200e0c0 t dcn2_notify_link_rate_change +ffffffff8200f000 T dcn201_clk_mgr_construct +ffffffff8200f120 t dcn201_update_clocks +ffffffff8200f340 t dcn201_init_clocks +ffffffff82010000 T rn_clk_mgr_construct +ffffffff820108a0 t rn_update_clocks +ffffffff82010e60 t rn_set_low_power_state +ffffffff82011040 t rn_init_clocks +ffffffff820110e0 t rn_enable_pme_wa +ffffffff820110f0 t rn_are_clock_states_equal +ffffffff82011140 t rn_notify_wm_ranges +ffffffff820114d0 t rn_notify_link_rate_change +ffffffff82012000 T rn_vbios_smu_get_smu_version +ffffffff82012020 t rn_vbios_smu_send_msg_with_param +ffffffff820121b0 T rn_vbios_smu_set_dispclk +ffffffff820122d0 T rn_vbios_smu_set_dprefclk +ffffffff82012340 T rn_vbios_smu_set_hard_min_dcfclk +ffffffff820123c0 T rn_vbios_smu_set_min_deep_sleep_dcfclk +ffffffff82012440 T rn_vbios_smu_set_phyclk +ffffffff82012480 T rn_vbios_smu_set_dppclk +ffffffff82012530 T rn_vbios_smu_set_dcn_low_power_state +ffffffff82012550 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff82012570 T rn_vbios_smu_enable_pme_wa +ffffffff82012590 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff82013000 T dcn3_init_clocks +ffffffff820133b0 t dcn3_init_clocks_fpga +ffffffff820133c0 T dcn3_clk_mgr_construct +ffffffff82013510 T dcn3_clk_mgr_destroy +ffffffff82013570 t dcn3_update_clocks +ffffffff82013990 t dcn3_enable_pme_wa +ffffffff820139d0 t dcn3_are_clock_states_equal +ffffffff82013a30 t dcn3_notify_wm_ranges +ffffffff82013cc0 t dcn30_notify_link_rate_change +ffffffff82013de0 t dcn3_set_hard_min_memclk +ffffffff82013e80 t dcn3_set_hard_max_memclk +ffffffff82013ee0 t dcn3_set_max_memclk +ffffffff82013f20 t dcn3_set_min_memclk +ffffffff82013f60 t dcn3_get_memclk_states_from_smu +ffffffff820140a0 t dcn3_is_smu_present +ffffffff82015000 T dcn30_smu_test_message +ffffffff82015070 t dcn30_smu_send_msg_with_param +ffffffff820151d0 T dcn30_smu_get_smu_version +ffffffff820151f0 T dcn30_smu_check_driver_if_version +ffffffff82015240 T dcn30_smu_check_msg_header_version +ffffffff82015290 T dcn30_smu_set_dram_addr_high +ffffffff820152b0 T dcn30_smu_set_dram_addr_low +ffffffff820152d0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff820152f0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff82015310 T dcn30_smu_set_hard_min_by_freq +ffffffff82015360 T dcn30_smu_set_hard_max_by_freq +ffffffff820153b0 T dcn30_smu_get_dpm_freq_by_index +ffffffff82015400 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff82015450 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff82015470 T dcn30_smu_set_num_of_displays +ffffffff82015490 T dcn30_smu_set_display_refresh_from_mall +ffffffff820154c0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff820154e0 T dcn30_smu_set_pme_workaround +ffffffff82016000 T dcn301_smu_get_smu_version +ffffffff82016070 t dcn301_smu_send_msg_with_param +ffffffff820161f0 T dcn301_smu_set_dispclk +ffffffff82016290 T dcn301_smu_set_dprefclk +ffffffff82016340 T dcn301_smu_set_hard_min_dcfclk +ffffffff820163e0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff82016480 T dcn301_smu_set_dppclk +ffffffff82016520 T dcn301_smu_set_display_idle_optimization +ffffffff82016570 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff820165c0 T dcn301_smu_enable_pme_wa +ffffffff820165e0 T dcn301_smu_set_dram_addr_high +ffffffff82016630 T dcn301_smu_set_dram_addr_low +ffffffff82016680 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff820166a0 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff82017000 T vg_clk_mgr_construct +ffffffff82017840 T vg_clk_mgr_destroy +ffffffff82017890 t vg_update_clocks +ffffffff82017bd0 t vg_init_clocks +ffffffff82017c70 t vg_enable_pme_wa +ffffffff82017c80 t vg_are_clock_states_equal +ffffffff82017cd0 t vg_notify_wm_ranges +ffffffff82019000 T dcn31_update_clocks +ffffffff82019610 T dcn31_init_clocks +ffffffff820196c0 T dcn31_are_clock_states_equal +ffffffff82019720 T dcn31_get_dtb_ref_freq_khz +ffffffff82019750 T dcn31_clk_mgr_construct +ffffffff82019e20 T dcn31_clk_mgr_destroy +ffffffff82019e70 t dcn31_set_low_power_state +ffffffff8201a080 t dcn31_enable_pme_wa +ffffffff8201a090 t dcn31_notify_wm_ranges +ffffffff8201a410 t find_clk_for_voltage +ffffffff8201b000 T dcn31_smu_get_smu_version +ffffffff8201b020 t dcn31_smu_send_msg_with_param +ffffffff8201b230 T dcn31_smu_set_dispclk +ffffffff8201b2a0 T dcn31_smu_set_dprefclk +ffffffff8201b310 T dcn31_smu_set_hard_min_dcfclk +ffffffff8201b390 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff8201b410 T dcn31_smu_set_dppclk +ffffffff8201b480 T dcn31_smu_set_display_idle_optimization +ffffffff8201b4d0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff8201b520 T dcn31_smu_enable_pme_wa +ffffffff8201b560 T dcn31_smu_set_dram_addr_high +ffffffff8201b5a0 T dcn31_smu_set_dram_addr_low +ffffffff8201b5e0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff8201b620 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff8201b660 T dcn31_smu_set_zstate_support +ffffffff8201b6d0 T dcn31_smu_set_dtbclk +ffffffff8201c000 T dcn314_update_clocks +ffffffff8201c650 T dcn314_are_clock_states_equal +ffffffff8201c6b0 T dcn314_clk_mgr_construct +ffffffff8201d3c0 T dcn314_clk_mgr_destroy +ffffffff8201d410 t dcn314_enable_pme_wa +ffffffff8201d420 t dcn314_notify_wm_ranges +ffffffff8201e000 T dcn314_smu_get_smu_version +ffffffff8201e020 t dcn314_smu_send_msg_with_param +ffffffff8201e250 T dcn314_smu_set_dispclk +ffffffff8201e2c0 T dcn314_smu_set_dprefclk +ffffffff8201e330 T dcn314_smu_set_hard_min_dcfclk +ffffffff8201e3b0 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff8201e430 T dcn314_smu_set_dppclk +ffffffff8201e4a0 T dcn314_smu_set_display_idle_optimization +ffffffff8201e4f0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff8201e540 T dcn314_smu_enable_pme_wa +ffffffff8201e580 T dcn314_smu_set_dram_addr_high +ffffffff8201e5c0 T dcn314_smu_set_dram_addr_low +ffffffff8201e600 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff8201e640 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff8201e680 T dcn314_smu_set_zstate_support +ffffffff8201e6d0 T dcn314_smu_set_dtbclk +ffffffff8201f000 T dcn315_clk_mgr_construct +ffffffff8201f810 T dcn315_clk_mgr_destroy +ffffffff8201f860 t dcn315_update_clocks +ffffffff8201fda0 t dcn315_enable_pme_wa +ffffffff8201fdb0 t dcn315_notify_wm_ranges +ffffffff82020130 t dcn315_disable_otg_wa +ffffffff82021000 T dcn315_smu_get_smu_version +ffffffff82021020 t dcn315_smu_send_msg_with_param +ffffffff82021310 T dcn315_smu_set_dispclk +ffffffff82021380 T dcn315_smu_set_hard_min_dcfclk +ffffffff82021400 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff82021480 T dcn315_smu_set_dppclk +ffffffff820214f0 T dcn315_smu_set_display_idle_optimization +ffffffff82021540 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff82021590 T dcn315_smu_enable_pme_wa +ffffffff820215d0 T dcn315_smu_set_dram_addr_high +ffffffff82021610 T dcn315_smu_set_dram_addr_low +ffffffff82021650 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff82021690 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff820216d0 T dcn315_smu_get_dpref_clk +ffffffff82021730 T dcn315_smu_get_dtbclk +ffffffff82021790 T dcn315_smu_set_dtbclk +ffffffff82022000 T dcn316_clk_mgr_construct +ffffffff82022650 T dcn316_clk_mgr_destroy +ffffffff820226a0 t dcn316_update_clocks +ffffffff82022cc0 t dcn316_enable_pme_wa +ffffffff82022cd0 t dcn316_notify_wm_ranges +ffffffff82023050 t find_clk_for_voltage +ffffffff82024000 T dcn316_smu_get_smu_version +ffffffff82024020 t dcn316_smu_send_msg_with_param +ffffffff820241b0 T dcn316_smu_set_dispclk +ffffffff82024220 T dcn316_smu_set_hard_min_dcfclk +ffffffff820242a0 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff82024320 T dcn316_smu_set_dppclk +ffffffff82024390 T dcn316_smu_set_display_idle_optimization +ffffffff820243e0 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff82024430 T dcn316_smu_set_dram_addr_high +ffffffff82024470 T dcn316_smu_set_dram_addr_low +ffffffff820244b0 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff820244f0 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff82024530 T dcn316_smu_enable_pme_wa +ffffffff82024570 T dcn316_smu_set_dtbclk +ffffffff820245b0 T dcn316_smu_get_dpref_clk +ffffffff82024610 T dcn316_smu_get_smu_fclk +ffffffff82025000 T dcn32_init_clocks +ffffffff82025560 T dcn32_update_clocks_update_dpp_dto +ffffffff820256a0 T dcn32_clk_mgr_construct +ffffffff82025940 t dcn32_dump_clk_registers +ffffffff82025b60 T dcn32_clk_mgr_destroy +ffffffff82025bc0 t dcn32_update_clocks +ffffffff82026420 t dcn32_enable_pme_wa +ffffffff82026460 t dcn32_are_clock_states_equal +ffffffff820264d0 t dcn32_notify_wm_ranges +ffffffff82026650 t dcn32_set_hard_min_memclk +ffffffff820266e0 t dcn32_set_hard_max_memclk +ffffffff82026730 t dcn32_set_max_memclk +ffffffff82026770 t dcn32_set_min_memclk +ffffffff820267b0 t dcn32_get_memclk_states_from_smu +ffffffff82026a00 t dcn32_is_smu_present +ffffffff82026a30 t dcn32_get_dispclk_from_dentist +ffffffff82026ac0 t dcn32_update_clocks_update_dentist +ffffffff82027000 T dcn32_smu_send_fclk_pstate_message +ffffffff82027020 t dcn32_smu_send_msg_with_param +ffffffff82027160 T dcn32_smu_send_cab_for_uclk_message +ffffffff82027190 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff820271b0 T dcn32_smu_set_pme_workaround +ffffffff820271d0 T dcn32_smu_set_hard_min_by_freq +ffffffff82027220 T dcn32_smu_wait_for_dmub_ack_mclk +ffffffff82028000 T dc_stream_adjust_vmin_vmax +ffffffff82028170 T dc_stream_get_last_used_drr_vtotal +ffffffff820282d0 T dc_stream_get_crtc_position +ffffffff82028500 T dc_stream_configure_crc +ffffffff82028670 T dc_stream_get_crc +ffffffff82028750 T dc_stream_set_dyn_expansion +ffffffff820289c0 T dc_stream_set_dither_option +ffffffff82028b60 T dc_stream_set_gamut_remap +ffffffff82028ce0 T dc_stream_program_csc_matrix +ffffffff82028f00 T dc_stream_set_static_screen_params +ffffffff82029080 T dc_create +ffffffff82029600 t dc_construct_ctx +ffffffff82029770 t dc_destruct +ffffffff82029a40 T dc_hardware_init +ffffffff82029b10 T dc_init_callbacks +ffffffff82029b60 T dc_deinit_callbacks +ffffffff82029bb0 T dc_destroy +ffffffff82029c00 T dc_validate_boot_timing +ffffffff82029fa0 T dc_enable_stereo +ffffffff8202a0a0 T dc_trigger_sync +ffffffff8202a6d0 T dc_z10_restore +ffffffff8202a710 T dc_z10_save_init +ffffffff8202a750 T dc_commit_streams +ffffffff8202ac30 t commit_minimal_transition_state +ffffffff8202b060 T dc_create_state +ffffffff8202b0f0 t dc_commit_state_no_check +ffffffff8202c780 T dc_release_state +ffffffff8202c7e0 T dc_acquire_release_mpc_3dlut +ffffffff8202c8b0 T dc_post_update_surfaces_to_stream +ffffffff8202ccc0 T dc_copy_state +ffffffff8202ce90 T dc_retain_state +ffffffff8202cec0 T dc_set_generic_gpio_for_stereo +ffffffff8202cfd0 T dc_check_update_surfaces_for_stream +ffffffff8202d9b0 T dc_dmub_update_dirty_rect +ffffffff8202dbc0 T dc_update_planes_and_stream +ffffffff8202e740 t fast_update_only +ffffffff8202eaa0 t commit_planes_for_stream_fast +ffffffff8202eec0 t commit_planes_for_stream +ffffffff82030440 T dc_commit_updates_for_stream +ffffffff82030a60 t copy_surface_update_to_plane +ffffffff82030e70 t copy_stream_update_to_stream +ffffffff82031510 T dc_get_current_stream_count +ffffffff82031550 T dc_get_stream_at_index +ffffffff820315a0 T dc_interrupt_to_irq_source +ffffffff820315c0 T dc_interrupt_set +ffffffff82031610 T dc_interrupt_ack +ffffffff82031630 T dc_power_down_on_boot +ffffffff82031680 T dc_set_power_state +ffffffff82031860 T dc_resume +ffffffff820318e0 T dc_is_dmcu_initialized +ffffffff82031930 T get_clock_requirements_for_state +ffffffff820319b0 T dc_set_clock +ffffffff820319f0 T dc_get_clock +ffffffff82031a30 T dc_set_psr_allow_active +ffffffff82031b30 T dc_allow_idle_optimizations +ffffffff82031bd0 T dc_unlock_memory_clock_frequency +ffffffff82031c40 T dc_lock_memory_clock_frequency +ffffffff82031cd0 T dc_enable_dcmode_clk_limit +ffffffff82031e90 t blank_and_force_memclk +ffffffff82032070 T dc_is_plane_eligible_for_idle_optimizations +ffffffff820320c0 T dc_hardware_release +ffffffff82032110 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff82032150 T dc_is_dmub_outbox_supported +ffffffff820321c0 T dc_enable_dmub_notifications +ffffffff82032230 T dc_enable_dmub_outbox +ffffffff82032270 T dc_process_dmub_aux_transfer_async +ffffffff820323f0 T get_link_index_from_dpia_port_index +ffffffff820324a0 T dc_process_dmub_set_config_async +ffffffff82032580 T dc_process_dmub_set_mst_slots +ffffffff82032670 T dc_process_dmub_dpia_hpd_int_enable +ffffffff82032730 T dc_print_dmub_diagnostic_data +ffffffff82032750 T dc_disable_accelerated_mode +ffffffff82032770 T dc_notify_vsync_int_state +ffffffff82032990 T dc_abm_save_restore +ffffffff82032b60 T dc_query_current_properties +ffffffff82032bd0 T dc_set_edp_power +ffffffff82032c40 t create_links +ffffffff820330a0 t create_link_encoders +ffffffff82033180 t dc_update_viusal_confirm_color +ffffffff82034000 T pre_surface_trace +ffffffff82034030 T update_surface_trace +ffffffff82034060 T post_surface_trace +ffffffff82034090 T context_timing_trace +ffffffff82034240 T context_clock_trace +ffffffff82034270 T dc_status_to_str +ffffffff82035000 T find_color_matrix +ffffffff820350b0 T color_space_to_black_color +ffffffff82035120 T hwss_wait_for_blank_complete +ffffffff820351c0 T get_mpctree_visual_confirm_color +ffffffff82035220 T get_surface_visual_confirm_color +ffffffff820352d0 T get_hdr_visual_confirm_color +ffffffff82035390 T get_subvp_visual_confirm_color +ffffffff82035490 T hwss_build_fast_sequence +ffffffff82035b50 T hwss_execute_sequence +ffffffff82035f40 T hwss_setup_dpp +ffffffff82035fe0 T hwss_program_bias_and_scale +ffffffff82036060 T hwss_program_manual_trigger +ffffffff820360b0 T hwss_power_on_mpc_mem_pwr +ffffffff82036100 T hwss_set_output_csc +ffffffff82036150 T hwss_set_ocsc_default +ffffffff820361a0 T hwss_send_dmcub_cmd +ffffffff820361c0 T get_mclk_switch_visual_confirm_color +ffffffff82036320 T get_surface_tile_visual_confirm_color +ffffffff82037000 T link_enc_cfg_init +ffffffff820371b0 T link_enc_cfg_copy +ffffffff820371e0 T link_enc_cfg_link_encs_assign +ffffffff820385a0 T link_enc_cfg_validate +ffffffff82038d40 T link_enc_cfg_link_enc_unassign +ffffffff82038ed0 T link_enc_cfg_is_transmitter_mappable +ffffffff82038ff0 T link_enc_cfg_get_stream_using_link_enc +ffffffff820390f0 T link_enc_cfg_get_link_using_link_enc +ffffffff82039200 T link_enc_cfg_get_link_enc_used_by_link +ffffffff82039380 T link_enc_cfg_get_next_avail_link_enc +ffffffff820394f0 T link_enc_cfg_get_link_enc_used_by_stream +ffffffff82039510 T link_enc_cfg_get_link_enc +ffffffff820395a0 T link_enc_cfg_get_link_enc_used_by_stream_current +ffffffff82039720 T link_enc_cfg_is_link_enc_avail +ffffffff82039920 T link_enc_cfg_set_transient_mode +ffffffff8203a000 T dc_get_link_at_index +ffffffff8203a030 T dc_get_edp_links +ffffffff8203a0b0 T dc_get_edp_link_panel_inst +ffffffff8203a170 T dc_link_detect +ffffffff8203a1a0 T dc_link_detect_connection_type +ffffffff8203a1d0 T dc_link_get_status +ffffffff8203a200 T dc_link_is_hdcp14 +ffffffff8203a230 T dc_link_is_hdcp22 +ffffffff8203a260 T dc_link_clear_dprx_states +ffffffff8203a290 T dc_link_reset_cur_dp_mst_topology +ffffffff8203a2c0 T dc_link_bandwidth_kbps +ffffffff8203a2f0 T dc_get_cur_link_res_map +ffffffff8203a310 T dc_restore_link_res_map +ffffffff8203a330 T dc_link_update_dsc_config +ffffffff8203a360 T dc_is_oem_i2c_device_present +ffffffff8203a3b0 T dc_submit_i2c +ffffffff8203a3e0 T dc_submit_i2c_oem +ffffffff8203a430 T dc_link_dp_handle_automated_test +ffffffff8203a460 T dc_link_dp_set_test_pattern +ffffffff8203a490 T dc_link_set_drive_settings +ffffffff8203a520 T dc_link_set_preferred_link_settings +ffffffff8203a540 T dc_link_set_preferred_training_settings +ffffffff8203a570 T dc_dp_trace_is_initialized +ffffffff8203a5a0 T dc_dp_trace_set_is_logged_flag +ffffffff8203a5d0 T dc_dp_trace_is_logged +ffffffff8203a600 T dc_dp_trace_get_lt_end_timestamp +ffffffff8203a630 T dc_dp_trace_get_lt_counts +ffffffff8203a660 T dc_dp_trace_get_link_loss_count +ffffffff8203a690 T dc_link_add_remote_sink +ffffffff8203a6c0 T dc_link_remove_remote_sink +ffffffff8203a6f0 T dc_link_aux_transfer_raw +ffffffff8203a720 T dc_link_bw_kbps_from_raw_frl_link_rate_data +ffffffff8203a740 T dc_link_decide_edp_link_settings +ffffffff8203a770 T dc_link_dp_get_max_link_enc_cap +ffffffff8203a7a0 T dc_link_dp_mst_decide_link_encoding_format +ffffffff8203a7d0 T dc_link_get_link_cap +ffffffff8203a800 T dc_link_get_highest_encoding_format +ffffffff8203a8c0 T dc_link_is_dp_sink_present +ffffffff8203a8f0 T dc_link_is_fec_supported +ffffffff8203a920 T dc_link_overwrite_extended_receiver_cap +ffffffff8203a950 T dc_link_should_enable_fec +ffffffff8203a980 T dc_link_dp_dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff8203a9b0 T dc_link_handle_usb4_bw_alloc_response +ffffffff8203a9e0 T dc_link_check_link_loss_status +ffffffff8203aa10 T dc_link_dp_allow_hpd_rx_irq +ffffffff8203aa40 T dc_link_dp_handle_link_loss +ffffffff8203aa70 T dc_link_dp_read_hpd_rx_irq_data +ffffffff8203aaa0 T dc_link_handle_hpd_rx_irq +ffffffff8203aad0 T dc_link_dp_receiver_power_ctrl +ffffffff8203ab00 T dc_link_decide_lttpr_mode +ffffffff8203ab30 T dc_link_edp_panel_backlight_power_on +ffffffff8203ab60 T dc_link_get_backlight_level +ffffffff8203ab90 T dc_link_get_backlight_level_nits +ffffffff8203abc0 T dc_link_set_backlight_level +ffffffff8203abf0 T dc_link_set_backlight_level_nits +ffffffff8203ac20 T dc_link_get_target_backlight_pwm +ffffffff8203ac50 T dc_link_get_psr_state +ffffffff8203ac80 T dc_link_set_psr_allow_active +ffffffff8203acb0 T dc_link_setup_psr +ffffffff8203ace0 T dc_link_get_replay_state +ffffffff8203ad10 T dc_link_wait_for_t12 +ffffffff8203ad40 T dc_link_get_hpd_state +ffffffff8203ad70 T dc_link_enable_hpd +ffffffff8203ada0 T dc_link_disable_hpd +ffffffff8203add0 T dc_link_enable_hpd_filter +ffffffff8203ae00 T dc_link_dp_dpia_validate +ffffffff8203b000 T resource_parse_asic_id +ffffffff8203b250 T dc_create_resource_pool +ffffffff8203b550 T dc_destroy_resource_pool +ffffffff8203b5c0 T resource_construct +ffffffff8203baa0 T resource_unreference_clock_source +ffffffff8203bb20 T resource_reference_clock_source +ffffffff8203bba0 T resource_get_clock_source_reference +ffffffff8203bc20 T resource_are_vblanks_synchronizable +ffffffff8203be40 T resource_are_streams_timing_synchronizable +ffffffff8203bf30 T resource_find_used_clk_src_for_sharing +ffffffff8203c060 T resource_get_num_mpc_splits +ffffffff8203c0f0 T resource_get_num_odm_splits +ffffffff8203c1b0 T resource_get_otg_master +ffffffff8203c250 T resource_build_scaling_params +ffffffff8203cfe0 t calculate_odm_slice_in_timing_active +ffffffff8203d160 T resource_build_scaling_params_for_context +ffffffff8203d2b0 T resource_find_free_secondary_pipe_legacy +ffffffff8203d350 T resource_find_free_pipe_used_in_cur_mpc_blending_tree +ffffffff8203d3c0 T resource_is_pipe_type +ffffffff8203d440 T recource_find_free_pipe_not_used_in_cur_res_ctx +ffffffff8203d4c0 T resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine +ffffffff8203d5e0 T resource_is_for_mpcc_combine +ffffffff8203d670 T resource_find_any_free_pipe +ffffffff8203d6e0 T resource_get_otg_master_for_stream +ffffffff8203d810 T resource_get_opp_head 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+ffffffff82040860 T dc_resource_state_destruct +ffffffff82040940 T dc_resource_find_first_free_pll +ffffffff820409b0 T resource_build_info_frame +ffffffff820410e0 T resource_map_clock_resources +ffffffff82041270 T pipe_need_reprogram +ffffffff820413e0 T resource_build_bit_depth_reduction_params +ffffffff82041610 T dc_validate_stream +ffffffff820417e0 T dc_validate_plane +ffffffff82041870 T resource_pixel_format_to_bpp +ffffffff820418f0 T get_audio_check +ffffffff82041a10 T get_temp_dp_link_res +ffffffff82041b20 T reset_syncd_pipes_from_disabled_pipes +ffffffff82041c70 T check_syncd_pipes_for_disabled_master_pipe +ffffffff82041db0 T reset_sync_context_for_pipe +ffffffff82041e60 T resource_transmitter_to_phy_idx +ffffffff82041ec0 T get_link_hwss +ffffffff82041f50 T is_h_timing_divisible_by_2 +ffffffff82041fb0 T dc_resource_acquire_secondary_pipe_for_mpc_odm +ffffffff820421c0 T update_dp_encoder_resources_for_test_harness +ffffffff82042480 t calculate_plane_rec_in_timing_active +ffffffff82042750 t calculate_init_and_vp +ffffffff82043000 T dc_sink_retain +ffffffff82043030 T dc_sink_release +ffffffff820430a0 T dc_sink_create +ffffffff82044000 T dc_stat_get_dmub_notification +ffffffff820440b0 T dc_stat_get_dmub_dataout +ffffffff82045000 T update_stream_signal +ffffffff82045080 T dc_stream_retain +ffffffff820450b0 T dc_stream_release +ffffffff82045130 T dc_create_stream_for_sink +ffffffff82045470 T dc_copy_stream +ffffffff82045540 T dc_stream_get_status_from_state +ffffffff820455a0 T dc_stream_get_status +ffffffff82045610 T dc_optimize_timing_for_fsft +ffffffff82045660 T dc_stream_set_cursor_attributes +ffffffff82045860 t program_cursor_attributes +ffffffff820459c0 T dc_stream_set_cursor_position +ffffffff82045ae0 t program_cursor_position +ffffffff82045c20 T dc_stream_add_writeback +ffffffff82045e30 T dc_stream_remove_writeback +ffffffff82045f60 T dc_stream_warmup_writeback +ffffffff82045fa0 T dc_stream_get_vblank_counter +ffffffff82046070 T dc_stream_send_dp_sdp +ffffffff82046300 T dc_stream_get_scanoutpos +ffffffff820463e0 T dc_stream_dmdata_status_done +ffffffff820464a0 T dc_stream_set_dynamic_metadata +ffffffff82046600 T dc_stream_add_dsc_to_resource +ffffffff82046650 T dc_stream_get_pipe_ctx +ffffffff82046700 T dc_stream_log +ffffffff82047000 T enable_surface_flip_reporting +ffffffff82047030 T dc_create_plane_state +ffffffff820471d0 T dc_plane_get_status +ffffffff82047350 T dc_plane_state_retain +ffffffff82047380 T dc_plane_state_release +ffffffff820474d0 T dc_gamma_retain +ffffffff82047500 T dc_gamma_release +ffffffff82047560 T dc_create_gamma +ffffffff820475b0 T dc_transfer_func_retain +ffffffff820475e0 T dc_transfer_func_release +ffffffff82047630 T dc_create_transfer_func +ffffffff82047680 T dc_create_3dlut_func +ffffffff820476e0 T dc_3dlut_func_release +ffffffff82047730 T dc_3dlut_func_retain +ffffffff82048000 T vm_helper_mark_vmid_used +ffffffff82048030 T dc_setup_system_context +ffffffff820480c0 T dc_setup_vm_context +ffffffff820480f0 T dc_get_vmid_use_vector +ffffffff82048150 T vm_helper_init +ffffffff82049000 T dc_dmub_srv_create +ffffffff820490a0 T dc_dmub_srv_destroy +ffffffff820490f0 T dc_dmub_srv_wait_idle +ffffffff82049150 T dc_dmub_srv_log_diagnostic_data +ffffffff82049690 T dc_dmub_srv_clear_inbox0_ack +ffffffff820496f0 T dc_dmub_srv_wait_for_inbox0_ack +ffffffff82049750 T dc_dmub_srv_send_inbox0_cmd +ffffffff820497b0 T dc_dmub_srv_cmd_run +ffffffff820497d0 T dc_dmub_srv_cmd_run_list +ffffffff82049980 T dc_dmub_srv_optimized_init_done +ffffffff82049a00 T dc_dmub_srv_notify_stream_mask +ffffffff82049a60 T dc_dmub_srv_is_restore_required +ffffffff82049ae0 T dc_dmub_srv_get_dmub_outbox0_msg +ffffffff82049b10 T dc_dmub_trace_event_control +ffffffff82049b30 T dc_dmub_srv_drr_update_cmd +ffffffff82049bc0 T dc_dmub_srv_set_drr_manual_trigger_cmd +ffffffff82049c50 T dc_dmub_srv_p_state_delegate +ffffffff8204a000 T dc_dmub_srv_query_caps_cmd +ffffffff8204a0c0 T dc_dmub_srv_get_visual_confirm_color_cmd +ffffffff8204a1a0 T dc_dmub_setup_subvp_dmub_command +ffffffff8204abb0 T dc_dmub_srv_get_diagnostic_data +ffffffff8204abf0 T dc_send_update_cursor_info_to_dmu +ffffffff8204af60 T dc_dmub_check_min_version +ffffffff8204afa0 T dc_dmub_srv_enable_dpia_trace +ffffffff8204c000 T dc_edid_parser_send_cea +ffffffff8204c0b0 T dc_edid_parser_recv_cea_ack +ffffffff8204c140 T dc_edid_parser_recv_amd_vsdb +ffffffff8204d000 T generic_reg_update_ex +ffffffff8204d330 t set_reg_field_values +ffffffff8204d4e0 T generic_reg_set_ex +ffffffff8204d6d0 T generic_reg_get +ffffffff8204d740 T generic_reg_get2 +ffffffff8204d7d0 T generic_reg_get3 +ffffffff8204d870 T generic_reg_get4 +ffffffff8204d920 T generic_reg_get5 +ffffffff8204d9e0 T generic_reg_get6 +ffffffff8204dac0 T generic_reg_get7 +ffffffff8204dbb0 T generic_reg_get8 +ffffffff8204dcc0 T generic_reg_wait +ffffffff8204df10 T generic_write_indirect_reg +ffffffff8204df60 T generic_read_indirect_reg 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+ffffffff820514a0 T dce_aud_destroy +ffffffff820514f0 T dce_audio_create +ffffffff820515b0 t dce_aud_endpoint_valid +ffffffff82052000 T dce110_engine_destroy +ffffffff82052050 T dce110_aux_engine_construct +ffffffff820520d0 t dce_aux_configure_timeout +ffffffff820522b0 T dce_aux_transfer_raw +ffffffff82052ae0 t acquire +ffffffff82052d50 T dce_aux_transfer_dmub_raw +ffffffff82052e50 T dce_aux_transfer_with_retries +ffffffff82054000 T look_up_in_video_optimized_rate_tlb +ffffffff82054070 T dce110_clk_src_construct +ffffffff82054270 t calc_pll_max_vco_construct +ffffffff82054410 T dce112_clk_src_construct +ffffffff820544a0 T dcn20_clk_src_construct +ffffffff82054550 T dcn3_clk_src_construct +ffffffff82054600 T dcn31_clk_src_construct +ffffffff820546b0 T dcn301_clk_src_construct +ffffffff82054760 t dce110_clock_source_power_down +ffffffff820547f0 t dce110_program_pix_clk +ffffffff82054e80 t dce110_get_pix_clk_dividers +ffffffff82055500 t get_pixel_clk_frequency_100hz +ffffffff82055610 t get_ss_info_from_atombios +ffffffff820558e0 t dce112_program_pix_clk +ffffffff82055af0 t dce112_get_pix_clk_dividers +ffffffff82055c00 t dcn20_program_pix_clk +ffffffff82055c90 t dcn20_override_dp_pix_clk +ffffffff82055d80 t dcn3_program_pix_clk +ffffffff82055f30 t dcn3_get_pix_clk_dividers +ffffffff82056000 t dcn31_program_pix_clk +ffffffff82057000 T dce_dmcu_create +ffffffff820570c0 T dcn10_dmcu_create +ffffffff82057180 T dcn20_dmcu_create +ffffffff82057240 T dcn21_dmcu_create +ffffffff82057330 T dce_dmcu_destroy +ffffffff82057380 t dce_dmcu_init +ffffffff820573b0 t dce_dmcu_load_iram +ffffffff82057510 t dce_dmcu_set_psr_enable +ffffffff82057640 t dce_dmcu_setup_psr +ffffffff82057970 t dce_get_dmcu_psr_state +ffffffff82057a50 t dce_psr_wait_loop +ffffffff82057b80 t dce_get_psr_wait_loop +ffffffff82057bb0 t dce_is_dmcu_initialized +ffffffff82057c10 t dcn10_dmcu_init +ffffffff82058150 t dcn10_dmcu_load_iram +ffffffff82058390 t dcn10_dmcu_set_psr_enable +ffffffff82058520 t dcn10_dmcu_setup_psr +ffffffff820588e0 t dcn10_get_dmcu_psr_state +ffffffff82058a00 t dcn10_psr_wait_loop +ffffffff82058b10 t dcn10_get_psr_wait_loop +ffffffff82058b40 t dcn10_is_dmcu_initialized +ffffffff82058b70 t dcn10_send_edid_cea +ffffffff82058d10 t dcn10_recv_amd_vsdb +ffffffff82058dc0 t dcn10_recv_edid_cea_ack +ffffffff82058e40 t dcn10_get_scp_results +ffffffff82058f60 t dcn20_lock_phy +ffffffff82059090 t dcn20_unlock_phy +ffffffff820591c0 t dcn21_dmcu_init +ffffffff8205a000 T dce_enable_fe_clock +ffffffff8205a040 T dce_pipe_control_lock +ffffffff8205a240 T dce_set_blender_mode +ffffffff8205a350 T dce_clock_gating_power_up +ffffffff8205a3f0 T dce_crtc_switch_to_clk_src +ffffffff8205a5b0 T dce_use_lut +ffffffff8205b000 T dce_i2c_oem_device_present +ffffffff8205b080 T dce_i2c_submit_command +ffffffff8205c000 T acquire_i2c_hw_engine +ffffffff8205c3a0 T dce_i2c_submit_command_hw +ffffffff8205cce0 t set_speed +ffffffff8205ce30 T dce_i2c_hw_construct +ffffffff8205cea0 T dce100_i2c_hw_construct +ffffffff8205cf10 T dce112_i2c_hw_construct +ffffffff8205cf80 T dcn1_i2c_hw_construct +ffffffff8205cff0 T dcn2_i2c_hw_construct +ffffffff8205d080 t is_hw_busy +ffffffff8205e000 T dce_i2c_sw_construct +ffffffff8205e030 T dce_i2c_engine_acquire_sw +ffffffff8205e0d0 T dce_i2c_submit_command_sw +ffffffff8205e8a0 t write_byte_sw +ffffffff8205f000 T dce_ipp_construct +ffffffff8205f050 T dce_ipp_destroy +ffffffff8205f0a0 t dce_ipp_cursor_set_position +ffffffff8205f1d0 t dce_ipp_cursor_set_attributes +ffffffff8205f460 t dce_ipp_program_prescale +ffffffff8205f620 t dce_ipp_program_input_lut +ffffffff8205fa90 t dce_ipp_set_degamma +ffffffff82060000 T dce110_get_dig_frontend +ffffffff820600c0 T dce110_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff82060160 T dce110_psr_program_dp_dphy_fast_training +ffffffff820601d0 T dce110_psr_program_secondary_packet +ffffffff82060240 T dce110_is_dig_enabled +ffffffff820602a0 T dce110_link_encoder_validate_dvi_output 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dce110_link_encoder_disable_hpd +ffffffff82062110 T dce110_link_encoder_get_max_link_cap +ffffffff82063000 T dce_mem_input_construct +ffffffff82063060 T dce112_mem_input_construct +ffffffff820630c0 T dce120_mem_input_construct +ffffffff82063120 t dce_mi_program_display_marks +ffffffff820633f0 t dce_mi_allocate_dmif +ffffffff82063630 t dce_mi_free_dmif +ffffffff82063790 t dce_mi_program_surface_flip_and_addr +ffffffff82063ab0 t dce_mi_program_pte_vm +ffffffff82063c70 t dce_mi_program_surface_config +ffffffff820644f0 t dce_mi_is_flip_pending +ffffffff82064580 t program_nbp_watermark +ffffffff82064780 t dce112_mi_program_display_marks +ffffffff82064c90 t dce120_mi_program_display_marks +ffffffff82065150 t dce120_program_stutter_watermark +ffffffff82066000 T dce110_opp_set_clamping +ffffffff820662b0 T dce110_opp_program_bit_depth_reduction +ffffffff82066a80 T dce110_opp_program_clamping_and_pixel_encoding +ffffffff82066c20 T dce110_opp_set_dyn_expansion +ffffffff82066d70 T dce110_opp_program_fmt +ffffffff82066ef0 T dce110_opp_construct +ffffffff82066f50 T dce110_opp_destroy +ffffffff82067000 T dce_panel_cntl_construct +ffffffff82067060 t dce_panel_cntl_destroy +ffffffff820670b0 t dce_panel_cntl_hw_init +ffffffff820672f0 t dce_is_panel_backlight_on +ffffffff820673a0 t dce_is_panel_powered_on +ffffffff82067450 t dce_store_backlight_level +ffffffff820674f0 t dce_driver_set_backlight +ffffffff82067670 t dce_get_16_bit_backlight_from_pwm +ffffffff82068000 T get_filter_3tap_16p +ffffffff82068090 T get_filter_3tap_64p +ffffffff82068120 T get_filter_4tap_16p +ffffffff820681b0 T get_filter_4tap_64p +ffffffff82068240 T get_filter_5tap_64p +ffffffff820682d0 T get_filter_6tap_64p +ffffffff82068360 T get_filter_7tap_64p +ffffffff820683f0 T get_filter_8tap_64p +ffffffff82068480 T get_filter_2tap_16p +ffffffff820684b0 T get_filter_2tap_64p +ffffffff82069000 T dce110_se_audio_mute_control +ffffffff82069050 T dce110_se_dp_audio_setup +ffffffff82069060 t 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dce100_add_stream_to_ctx +ffffffff820770a0 T dce100_validate_plane +ffffffff820770e0 T dce100_find_first_free_match_stream_enc_for_link +ffffffff82077190 T dce100_create_resource_pool +ffffffff82077f60 t dce100_resource_destruct +ffffffff82078220 t dce100_destroy_resource_pool +ffffffff82078280 t dce100_panel_cntl_create +ffffffff82078310 t dce100_link_encoder_create +ffffffff82078410 t dce100_validate_bandwidth +ffffffff82078550 t dce100_validate_global +ffffffff820785f0 t read_dce_straps +ffffffff82078660 t create_audio +ffffffff82078690 t dce100_stream_encoder_create +ffffffff82078730 t dce100_hwseq_create +ffffffff82079000 T dce110_compressor_power_up_fbc +ffffffff82079130 T dce110_compressor_enable_fbc +ffffffff82079340 T dce110_compressor_is_fbc_enabled_in_hw +ffffffff820793f0 T dce110_compressor_disable_fbc +ffffffff820796c0 T dce110_compressor_program_compressed_surface_address_and_pitch +ffffffff820797e0 T dce110_compressor_set_fbc_invalidation_triggers +ffffffff82079860 T dce110_compressor_create +ffffffff82079900 T dce110_compressor_construct +ffffffff82079980 T dce110_compressor_destroy +ffffffff820799d0 T get_max_support_fbc_buffersize +ffffffff8207a000 T dce110_update_info_frame +ffffffff8207a0f0 T dce110_enable_stream +ffffffff8207a190 T dce110_edp_wait_for_hpd_ready +ffffffff8207a3f0 T dce110_edp_power_control +ffffffff8207a950 T dce110_edp_wait_for_T12 +ffffffff8207ab00 T dce110_edp_backlight_control +ffffffff8207ae60 T dce110_enable_audio_stream +ffffffff8207af20 T dce110_disable_audio_stream +ffffffff8207afe0 T dce110_disable_stream +ffffffff8207b240 T dce110_unblank_stream +ffffffff8207b340 T dce110_blank_stream +ffffffff8207b4b0 T dce110_set_avmute +ffffffff8207b500 T dce110_enable_accelerated_mode +ffffffff8207b8b0 t power_down_all_hw_blocks +ffffffff8207ba80 T dce110_set_safe_displaymarks +ffffffff8207bba0 T dce110_apply_ctx_to_hw +ffffffff8207c4a0 t enable_fbc +ffffffff8207c660 T dce110_power_down +ffffffff8207c750 T dce110_prepare_bandwidth +ffffffff8207c8a0 T dce110_optimize_bandwidth +ffffffff8207caa0 T dce110_set_backlight_level +ffffffff8207cbb0 T dce110_set_abm_immediate_disable +ffffffff8207cc30 T dce110_set_pipe +ffffffff8207cca0 T dce110_enable_lvds_link_output +ffffffff8207cd00 T dce110_enable_tmds_link_output +ffffffff8207cd70 T dce110_enable_dp_link_output +ffffffff8207cfa0 T dce110_disable_link_output +ffffffff8207d090 T dce110_hw_sequencer_construct +ffffffff8207d0e0 t enable_display_pipe_clock_gating +ffffffff8207d110 t build_audio_output +ffffffff8207d270 t init_hw +ffffffff8207d510 t dce110_power_down_fe +ffffffff8207d5e0 t dce110_apply_ctx_for_surface +ffffffff8207dd20 t dce110_post_unlock_program_front_end +ffffffff8207dd50 t update_plane_addr +ffffffff8207ddc0 t dce110_wait_for_mpcc_disconnect +ffffffff8207ddf0 t dce110_update_pending_status +ffffffff8207ded0 t get_position +ffffffff8207df60 t dce110_enable_per_frame_crtc_position_reset +ffffffff8207e200 t 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dce110_timing_generator_get_crtc_scanoutpos +ffffffff82086790 T dce110_timing_generator_program_blanking +ffffffff82086a00 T dce110_timing_generator_set_test_pattern +ffffffff82086cf0 T dce110_timing_generator_validate_timing +ffffffff82086db0 T dce110_timing_generator_wait_for_vblank +ffffffff82086f20 T dce110_timing_generator_is_counter_moving +ffffffff82086fa0 T dce110_timing_generator_wait_for_vactive +ffffffff82087080 T dce110_timing_generator_setup_global_swap_lock +ffffffff820871e0 T dce110_timing_generator_tear_down_global_swap_lock +ffffffff82087260 T dce110_timing_generator_enable_advanced_request +ffffffff82087300 T dce110_timing_generator_set_lock_master +ffffffff82087360 T dce110_timing_generator_enable_reset_trigger +ffffffff82087450 T dce110_timing_generator_enable_crtc_reset +ffffffff82087640 T dce110_timing_generator_disable_reset_trigger +ffffffff82087730 T dce110_timing_generator_did_triggered_reset_occur +ffffffff820877c0 T dce110_timing_generator_disable_vga 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dce112_enable_display_power_gating +ffffffff8208e000 T dce112_validate_bandwidth +ffffffff8208e0c0 T resource_map_phy_clock_resources +ffffffff8208e230 T dce112_add_stream_to_ctx +ffffffff8208e2d0 T dce112_create_resource_pool +ffffffff8208f620 t dce112_resource_destruct +ffffffff8208f8e0 t dce112_destroy_resource_pool +ffffffff8208f940 t dce112_panel_cntl_create +ffffffff8208f9d0 t dce112_link_encoder_create +ffffffff8208fad0 t dce112_validate_global +ffffffff8208fb70 t read_dce_straps +ffffffff8208fbe0 t create_audio +ffffffff8208fc10 t dce112_stream_encoder_create +ffffffff8208fcb0 t dce112_hwseq_create +ffffffff82090000 T dce121_xgmi_enabled +ffffffff82090060 T dce120_hw_sequencer_construct +ffffffff820900c0 t dce120_enable_display_power_gating +ffffffff820900f0 t dce120_update_dchub +ffffffff82091000 T dce120_create_resource_pool +ffffffff82092320 t dce120_resource_destruct +ffffffff82092600 t dce120_destroy_resource_pool +ffffffff82092660 t dce120_panel_cntl_create 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hubp1_program_deadline +ffffffff820a8240 T hubp1_is_flip_pending +ffffffff820a8350 T min_set_viewport +ffffffff820a8650 T hubp1_read_state_common +ffffffff820a9340 T hubp1_read_state +ffffffff820a9610 T hubp1_get_cursor_pitch +ffffffff820a96b0 T hubp1_cursor_set_attributes +ffffffff820a9960 T hubp1_cursor_set_position +ffffffff820a9cc0 T hubp1_clk_cntl +ffffffff820a9d10 T hubp1_vtg_sel +ffffffff820a9d50 T hubp1_in_blank +ffffffff820a9dc0 T hubp1_soft_reset +ffffffff820a9e00 T hubp1_set_flip_int +ffffffff820a9e50 T hubp1_init +ffffffff820a9e80 T dcn10_hubp_construct +ffffffff820a9ef0 t hubp1_setup +ffffffff820a9fb0 t hubp1_setup_interdependent +ffffffff820aa330 t hubp1_set_vm_system_aperture_settings +ffffffff820aa550 t hubp1_set_vm_context0_settings +ffffffff820aa830 t hubp1_set_hubp_blank_en +ffffffff820aa870 t hubp1_disconnect +ffffffff820aa900 t hubp1_disable_control +ffffffff820aa940 t hubp1_get_underflow_status +ffffffff820aa9b0 t hubp1_wait_pipe_read_start +ffffffff820ab000 T dcn10_lock_all_pipes +ffffffff820ab130 T dcn10_log_hw_state +ffffffff820acc10 T dcn10_did_underflow_occur +ffffffff820accb0 T dcn10_enable_power_gating_plane +ffffffff820ace50 T dcn10_disable_vga +ffffffff820ad040 T dcn10_dpp_pg_control +ffffffff820ad290 T dcn10_hubp_pg_control +ffffffff820ad4e0 T dcn10_bios_golden_init +ffffffff820ad640 T dcn10_enable_stream_timing +ffffffff820ada40 T dcn10_verify_allow_pstate_change_high +ffffffff820add90 T dcn10_plane_atomic_disconnect +ffffffff820adec0 T dcn10_plane_atomic_power_down +ffffffff820ae020 T dcn10_plane_atomic_disable +ffffffff820ae160 T dcn10_disable_plane +ffffffff820ae300 T dcn10_init_pipes +ffffffff820ae9c0 T dcn10_init_hw +ffffffff820aeeb0 T dcn10_power_down_on_boot +ffffffff820af000 T dcn10_reset_hw_ctx_wrap +ffffffff820af340 T dcn10_update_plane_addr +ffffffff820af460 T dcn10_set_input_transfer_func +ffffffff820af5d0 T dcn10_set_output_transfer_func +ffffffff820af6b0 T dcn10_pipe_control_lock +ffffffff820af780 T dcn10_cursor_lock +ffffffff820af940 T dcn10_enable_vblanks_synchronization +ffffffff820b0120 T dcn10_enable_timing_synchronization +ffffffff820b0520 T dcn10_enable_per_frame_crtc_position_reset +ffffffff820b06f0 T dcn10_program_gamut_remap +ffffffff820b08f0 T dcn10_program_output_csc +ffffffff820b0a20 T dcn10_update_visual_confirm_color +ffffffff820b0aa0 T dcn10_update_mpcc +ffffffff820b0d50 T dcn10_blank_pixel_data +ffffffff820b0e90 T dcn10_set_hdr_multiplier +ffffffff820b0f20 T dcn10_program_pipe +ffffffff820b1ac0 T dcn10_wait_for_pending_cleared +ffffffff820b1bc0 T dcn10_post_unlock_program_front_end +ffffffff820b1e60 T dcn10_prepare_bandwidth +ffffffff820b2000 T dcn10_optimize_bandwidth +ffffffff820b21a0 T dcn10_set_drr +ffffffff820b22a0 T dcn10_get_position +ffffffff820b2330 T dcn10_set_static_screen_control +ffffffff820b23d0 T dcn10_setup_stereo +ffffffff820b2520 T dcn10_wait_for_mpcc_disconnect +ffffffff820b26d0 T dcn10_dummy_display_power_gating +ffffffff820b2700 T dcn10_update_pending_status +ffffffff820b2840 T dcn10_update_dchub +ffffffff820b2870 T dcn10_set_cursor_position +ffffffff820b2db0 T dcn10_set_cursor_attribute +ffffffff820b2e00 T dcn10_set_cursor_sdr_white_level +ffffffff820b2ec0 T dcn10_get_vupdate_offset_from_vsync +ffffffff820b2f50 T dcn10_calc_vupdate_position +ffffffff820b2fe0 T dcn10_setup_periodic_interrupt +ffffffff820b30f0 T dcn10_setup_vupdate_interrupt +ffffffff820b31b0 T dcn10_unblank_stream +ffffffff820b32c0 T dcn10_send_immediate_sdp_message +ffffffff820b3320 T dcn10_set_clock +ffffffff820b3430 T dcn10_get_clock +ffffffff820b3490 T dcn10_get_dcc_en_bits +ffffffff820b4000 T snprintf_count +ffffffff820b4090 T dcn10_clear_status_bits +ffffffff820b4240 T dcn10_get_hw_state +ffffffff820b6000 T dcn10_hw_sequencer_construct +ffffffff820b7000 T dcn10_ipp_construct +ffffffff820b7050 T dcn20_ipp_construct +ffffffff820b70a0 t dcn10_ipp_destroy +ffffffff820b8000 T dcn10_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff820b80b0 T dcn10_get_dig_frontend +ffffffff820b8170 T enc1_configure_encoder +ffffffff820b81f0 T dcn10_psr_program_dp_dphy_fast_training +ffffffff820b8270 T dcn10_psr_program_secondary_packet +ffffffff820b82f0 T dcn10_is_dig_enabled +ffffffff820b8350 T dcn10_link_encoder_validate_dvi_output +ffffffff820b8400 T dcn10_link_encoder_validate_dp_output +ffffffff820b8440 T dcn10_link_encoder_construct +ffffffff820b8620 T dcn10_link_encoder_validate_output_with_stream +ffffffff820b8820 T dcn10_link_encoder_hw_init +ffffffff820b8a20 T dcn10_aux_initialize +ffffffff820b8ab0 T dcn10_link_encoder_destroy +ffffffff820b8b00 T dcn10_link_encoder_setup +ffffffff820b8c50 T dcn10_link_encoder_enable_tmds_output +ffffffff820b8d40 T dcn10_link_encoder_enable_tmds_output_with_clk_pattern_wa +ffffffff820b8e60 T dcn10_link_encoder_enable_dp_output +ffffffff820b8fc0 T dcn10_link_encoder_enable_dp_mst_output +ffffffff820b9120 T dcn10_link_encoder_disable_output +ffffffff820b92f0 T dcn10_link_encoder_dp_set_lane_settings +ffffffff820b9490 T dcn10_link_encoder_dp_set_phy_pattern +ffffffff820b9bb0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff820b9db0 T dcn10_link_encoder_update_mst_stream_allocation_table +ffffffff820ba080 T dcn10_link_encoder_connect_dig_be_to_fe +ffffffff820ba1c0 T dcn10_link_encoder_enable_hpd +ffffffff820ba200 T dcn10_link_encoder_disable_hpd +ffffffff820ba240 T dcn10_get_dig_mode +ffffffff820ba2b0 T dcn10_link_encoder_get_max_link_cap +ffffffff820ba330 t program_pattern_symbols +ffffffff820bb000 T mpc1_set_bg_color +ffffffff820bb1e0 T mpc1_get_mpcc +ffffffff820bb270 T mpc1_update_stereo_mix +ffffffff820bb390 T mpc1_assert_idle_mpcc +ffffffff820bb460 T mpc1_get_mpcc_for_dpp +ffffffff820bb510 T mpc1_is_mpcc_idle +ffffffff820bb600 T mpc1_assert_mpcc_idle_before_connect +ffffffff820bb740 T mpc1_insert_plane +ffffffff820bbce0 T mpc1_remove_mpcc +ffffffff820bc0a0 T mpc1_mpc_init +ffffffff820bc3c0 T mpc1_mpc_init_single_inst +ffffffff820bc5b0 T mpc1_init_mpcc_list_from_hw +ffffffff820bc880 T mpc1_read_mpcc_state +ffffffff820bca10 T mpc1_cursor_lock +ffffffff820bca90 T mpc1_get_mpc_out_mux +ffffffff820bcb10 T dcn10_mpc_construct +ffffffff820bcc90 t mpc1_update_blending +ffffffff820bd000 T opp1_program_bit_depth_reduction +ffffffff820bd400 T opp1_set_dyn_expansion +ffffffff820bd570 T opp1_program_fmt +ffffffff820bd870 T opp1_program_stereo +ffffffff820bd960 T opp1_pipe_clock_control +ffffffff820bd9a0 T opp1_destroy +ffffffff820bd9f0 T dcn10_opp_construct +ffffffff820be000 T optc1_program_global_sync +ffffffff820be150 T optc1_setup_vertical_interrupt0 +ffffffff820be1e0 T optc1_setup_vertical_interrupt1 +ffffffff820be250 T optc1_setup_vertical_interrupt2 +ffffffff820be2c0 T optc1_program_timing +ffffffff820be9a0 T optc1_is_two_pixels_per_containter +ffffffff820be9f0 T optc1_set_vtg_params +ffffffff820beb20 T optc1_set_blank_data_double_buffer +ffffffff820beb60 T optc1_set_timing_double_buffer +ffffffff820beba0 T optc1_set_blank +ffffffff820bec70 T optc1_is_blanked +ffffffff820becf0 T optc1_enable_optc_clock +ffffffff820bef10 T optc1_disable_crtc +ffffffff820bf000 T optc1_program_blank_color +ffffffff820bf0b0 T optc1_validate_timing +ffffffff820bf1b0 T optc1_get_vblank_counter +ffffffff820bf210 T optc1_lock +ffffffff820bf2f0 T optc1_unlock +ffffffff820bf360 T optc1_get_position +ffffffff820bf3f0 T optc1_is_counter_moving +ffffffff820bf470 T optc1_did_triggered_reset_occur +ffffffff820bf510 T optc1_disable_reset_trigger +ffffffff820bf5d0 T optc1_enable_reset_trigger +ffffffff820bf6e0 T optc1_enable_crtc_reset +ffffffff820bf840 T optc1_wait_for_state +ffffffff820bf910 T optc1_set_early_control +ffffffff820bf940 T optc1_set_static_screen_control +ffffffff820bf9e0 T optc1_set_drr +ffffffff820bfb80 T optc1_set_vtotal_min_max +ffffffff820bfc20 T optc1_get_crtc_scanoutpos +ffffffff820bfd30 T optc1_program_stereo +ffffffff820bff40 T optc1_is_stereo_left_eye +ffffffff820bffb0 T optc1_get_hw_timing +ffffffff820c00c0 T optc1_read_otg_state +ffffffff820c03d0 T optc1_get_otg_active_size +ffffffff820c04e0 T optc1_clear_optc_underflow +ffffffff820c0530 T optc1_tg_init +ffffffff820c05e0 T optc1_is_tg_enabled +ffffffff820c0650 T optc1_is_optc_underflow_occurred +ffffffff820c06c0 T optc1_configure_crc +ffffffff820c0930 T optc1_get_crc +ffffffff820c0a30 T dcn10_timing_generator_init +ffffffff820c0aa0 t optc1_enable_crtc +ffffffff820c0ba0 t optc1_set_test_pattern +ffffffff820c1290 t optc1_program_manual_trigger +ffffffff820c1340 t optc1_setup_manual_trigger +ffffffff820c2000 T dcn10_find_first_free_match_stream_enc_for_link +ffffffff820c20b0 T dcn10_create_resource_pool +ffffffff820c3230 t dcn10_resource_destruct +ffffffff820c3540 t dcn10_destroy_resource_pool +ffffffff820c35a0 t dcn10_panel_cntl_create +ffffffff820c3630 t dcn10_link_encoder_create +ffffffff820c3730 t dcn10_validate_bandwidth +ffffffff820c37b0 t dcn10_validate_global +ffffffff820c3990 t dcn10_acquire_free_pipe_for_layer +ffffffff820c3ac0 t dcn10_validate_plane +ffffffff820c3b10 t dcn10_add_stream_to_ctx +ffffffff820c3ce0 t dcn10_patch_unknown_plane_state +ffffffff820c3d40 t read_dce_straps +ffffffff820c3d70 t create_audio +ffffffff820c3da0 t dcn10_stream_encoder_create +ffffffff820c3e40 t dcn10_hwseq_create +ffffffff820c3ef0 t dcn10_get_dcc_compression_cap +ffffffff820c4000 T enc1_update_generic_info_packet +ffffffff820c4430 T enc1_stream_encoder_dp_set_stream_attribute +ffffffff820c4910 T enc1_stream_encoder_set_stream_attribute_helper +ffffffff820c4990 T enc1_stream_encoder_hdmi_set_stream_attribute +ffffffff820c4f80 T enc1_stream_encoder_dvi_set_stream_attribute +ffffffff820c5110 T enc1_stream_encoder_set_throttled_vcp_size +ffffffff820c5330 T enc1_stream_encoder_update_dp_info_packets +ffffffff820c5530 T enc1_stream_encoder_send_immediate_sdp_message +ffffffff820c5940 T enc1_stream_encoder_stop_dp_info_packets +ffffffff820c5b10 T enc1_stream_encoder_dp_blank +ffffffff820c5cb0 T enc1_stream_encoder_dp_unblank +ffffffff820c5ee0 T enc1_stream_encoder_set_avmute +ffffffff820c5f20 T enc1_reset_hdmi_stream_attribute +ffffffff820c5ff0 T get_audio_clock_info +ffffffff820c60e0 T enc1_se_enable_audio_clock +ffffffff820c6140 T enc1_se_enable_dp_audio +ffffffff820c6210 T enc1_se_audio_mute_control +ffffffff820c6260 T enc1_se_dp_audio_setup +ffffffff820c6270 t enc1_se_audio_setup +ffffffff820c63d0 T enc1_se_dp_audio_enable +ffffffff820c6620 T enc1_se_dp_audio_disable +ffffffff820c6790 T enc1_se_hdmi_audio_setup +ffffffff820c6c50 T enc1_se_hdmi_audio_disable +ffffffff820c6ce0 T enc1_setup_stereo_sync +ffffffff820c6d60 T enc1_dig_connect_to_otg +ffffffff820c6da0 T enc1_dig_source_otg +ffffffff820c6e10 T enc1_stream_encoder_dp_get_pixel_format +ffffffff820c6f00 T dcn10_stream_encoder_construct +ffffffff820c6f60 t enc1_stream_encoder_update_hdmi_info_packets +ffffffff820c7310 t enc1_stream_encoder_stop_hdmi_info_packets +ffffffff820c8000 T dccg2_update_dpp_dto +ffffffff820c8160 T dccg2_get_dccg_ref_freq +ffffffff820c8220 T dccg2_set_fifo_errdet_ovr_en +ffffffff820c8260 T dccg2_otg_add_pixel +ffffffff820c8300 T dccg2_otg_drop_pixel +ffffffff820c83a0 T dccg2_init +ffffffff820c83d0 T dccg2_create +ffffffff820c8480 T dcn_dccg_destroy +ffffffff820c9000 T dpp20_read_state +ffffffff820c91d0 T dpp2_power_on_obuf +ffffffff820c92a0 T dpp2_dummy_program_input_lut +ffffffff820c92d0 T dscl2_calc_lb_num_partitions +ffffffff820c9400 T dpp2_cnv_set_alpha_keyer +ffffffff820c9680 T dpp2_set_cursor_attributes +ffffffff820c97e0 T oppn20_dummy_program_regamma_pwl +ffffffff820c9810 T dpp2_construct +ffffffff820c9890 t dpp2_cnv_setup +ffffffff820cb000 T dpp2_set_degamma_pwl +ffffffff820cb3b0 T dpp2_set_degamma +ffffffff820cb560 T dpp2_cm_set_gamut_remap +ffffffff820cb790 T dpp2_program_input_csc +ffffffff820cb9c0 T dpp20_program_blnd_lut +ffffffff820cc120 T dpp20_program_shaper +ffffffff820ce0d0 T dpp20_program_3dlut +ffffffff820ce7a0 t dpp20_set3dlut_ram12 +ffffffff820ce970 T dpp2_set_hdr_multiplier +ffffffff820cf000 T dsc2_construct +ffffffff820cf050 T dsc2_get_enc_caps +ffffffff820cf0d0 T dsc_config_log +ffffffff820cf180 T dsc2_get_packed_pps +ffffffff820cf320 T dsc_prepare_config +ffffffff820cf860 T dsc_log_pps +ffffffff820cffe0 T dsc_override_rc_params +ffffffff820d0130 T dsc_init_reg_values +ffffffff820d0220 T dsc_dc_pixel_encoding_to_dsc_pixel_format +ffffffff820d02d0 T dsc_dc_color_depth_to_dsc_bits_per_comp +ffffffff820d0310 T dsc_update_from_dsc_parameters +ffffffff820d03c0 t dsc2_read_state +ffffffff820d0570 t dsc2_validate_stream +ffffffff820d05d0 t dsc2_set_config +ffffffff820d1940 t dsc2_enable +ffffffff820d1af0 t dsc2_disable +ffffffff820d1c70 t dsc2_disconnect +ffffffff820d2000 T dwb2_config_dwb_cnv +ffffffff820d2200 T dwb2_disable +ffffffff820d2310 T dwb2_is_enabled +ffffffff820d23b0 T dwb2_set_stereo +ffffffff820d2490 T dwb2_set_new_content +ffffffff820d2500 T dwb2_set_scaler +ffffffff820d2880 T dcn20_dwbc_construct +ffffffff820d28d0 t dwb2_get_caps +ffffffff820d29b0 t dwb2_enable +ffffffff820d2b10 t dwb2_update +ffffffff820d2c70 t dwb2_set_warmup +ffffffff820d3000 T dwb_program_horz_scalar +ffffffff820d34c0 t wbscl_get_filter_coeffs_16p +ffffffff820d3990 t wbscl_set_scaler_filter +ffffffff820d3ba0 T dwb_program_vert_scalar +ffffffff820d5000 T hubbub2_dcc_support_swizzle +ffffffff820d50c0 T hubbub2_dcc_support_pixel_format +ffffffff820d5110 T hubbub2_get_dcc_compression_cap +ffffffff820d5350 T hubbub2_init_vm_ctx +ffffffff820d54a0 T hubbub2_init_dchub_sys_ctx +ffffffff820d56e0 T hubbub2_update_dchub +ffffffff820d58d0 T hubbub2_wm_read_state +ffffffff820d5c00 T hubbub2_get_dchub_ref_freq +ffffffff820d5ce0 T hubbub2_read_state +ffffffff820d5eb0 T hubbub2_construct +ffffffff820d5f10 t hubbub2_program_watermarks +ffffffff820d7000 T hubp2_set_vm_system_aperture_settings +ffffffff820d71e0 T hubp2_program_deadline +ffffffff820d7980 T hubp2_vready_at_or_After_vsync +ffffffff820d7a20 T hubp2_setup_interdependent +ffffffff820d7e90 T hubp2_program_size +ffffffff820d8010 T hubp2_program_rotation +ffffffff820d8180 T hubp2_dcc_control +ffffffff820d8240 T hubp2_program_pixel_format +ffffffff820d8810 T hubp2_program_surface_config +ffffffff820d8a50 T hubp2_get_lines_per_chunk +ffffffff820d8b10 T hubp2_cursor_set_attributes +ffffffff820d8ed0 T hubp2_dmdata_set_attributes +ffffffff820d92b0 T hubp2_dmdata_load +ffffffff820d9340 T hubp2_dmdata_status_done +ffffffff820d93b0 T hubp2_program_surface_flip_and_addr +ffffffff820d9ca0 T hubp2_enable_triplebuffer +ffffffff820d9d70 T hubp2_is_triplebuffer_enabled +ffffffff820d9df0 T hubp2_set_flip_control_surface_gsl +ffffffff820d9e40 T hubp2_is_flip_pending +ffffffff820d9f50 T hubp2_set_blank +ffffffff820d9fb0 T hubp2_set_blank_regs +ffffffff820da0b0 T hubp2_cursor_set_position +ffffffff820da520 T hubp2_clk_cntl +ffffffff820da570 T hubp2_vtg_sel +ffffffff820da5b0 T hubp2_clear_underflow +ffffffff820da600 T hubp2_read_state_common +ffffffff820db250 T hubp2_read_state +ffffffff820db520 T hubp2_construct +ffffffff820db590 t hubp2_setup +ffffffff820dba30 t hubp2_validate_dml_output +ffffffff820dd000 T dcn20_set_flip_control_gsl +ffffffff820dd050 T dcn20_enable_power_gating_plane +ffffffff820dd4b0 T dcn20_dccg_init +ffffffff820dd530 T dcn20_disable_vga +ffffffff820dd5f0 T dcn20_program_triple_buffer +ffffffff820dd640 T dcn20_init_blank +ffffffff820dd850 T dcn20_dsc_pg_control +ffffffff820ddc60 T dcn20_dpp_pg_control +ffffffff820ddf10 T dcn20_hubp_pg_control +ffffffff820de1c0 T dcn20_plane_atomic_disable +ffffffff820de310 t dcn20_setup_gsl_group_as_lock +ffffffff820de570 T dcn20_disable_plane +ffffffff820de650 T dcn20_disable_pixel_data +ffffffff820de670 T dcn20_blank_pixel_data +ffffffff820de890 T dcn20_enable_stream_timing +ffffffff820dee50 T dcn20_program_output_csc +ffffffff820def40 T dcn20_set_output_transfer_func +ffffffff820df0c0 T dcn20_set_blend_lut +ffffffff820df130 T dcn20_set_shaper_3dlut +ffffffff820df1f0 T dcn20_set_input_transfer_func +ffffffff820df3b0 T dcn20_update_odm +ffffffff820df4a0 T dcn20_pipe_control_lock +ffffffff820df7c0 T dcn20_program_front_end_for_ctx +ffffffff820e0560 t dcn20_program_pipe +ffffffff820e1000 T dcn20_post_unlock_program_front_end +ffffffff820e1310 T dcn20_prepare_bandwidth +ffffffff820e1480 T dcn20_optimize_bandwidth +ffffffff820e1690 T dcn20_update_bandwidth +ffffffff820e1950 T dcn20_enable_writeback +ffffffff820e1aa0 T dcn20_disable_writeback +ffffffff820e1b30 T dcn20_wait_for_blank_complete +ffffffff820e1bc0 T dcn20_dmdata_status_done +ffffffff820e1c10 T dcn20_disable_stream_gating +ffffffff820e1cc0 T dcn20_enable_stream_gating +ffffffff820e1d60 T dcn20_set_dmdata_attributes +ffffffff820e1e20 T dcn20_init_vm_ctx +ffffffff820e1ee0 T dcn20_init_sys_ctx +ffffffff820e1f90 T dcn20_update_plane_addr +ffffffff820e20d0 T dcn20_unblank_stream +ffffffff820e2280 T dcn20_setup_vupdate_interrupt +ffffffff820e22f0 T dcn20_reset_hw_ctx_wrap +ffffffff820e26b0 T dcn20_update_mpcc +ffffffff820e2910 T dcn20_enable_stream +ffffffff820e2c50 T dcn20_program_dmdata_engine +ffffffff820e2cf0 T dcn20_fpga_init_hw +ffffffff820e32d0 T dcn20_optimize_timing_for_fsft +ffffffff820e3310 T dcn20_set_disp_pattern_generator +ffffffff820e4000 T dcn20_hw_sequencer_construct +ffffffff820e5000 T enc2_fec_set_enable +ffffffff820e5090 T enc2_fec_set_ready +ffffffff820e50d0 T enc2_fec_is_active +ffffffff820e5140 T link_enc2_read_state +ffffffff820e51f0 T dcn20_link_encoder_enable_dp_output +ffffffff820e52f0 T dcn20_link_encoder_get_max_link_cap +ffffffff820e53a0 T dcn20_link_encoder_is_in_alt_mode +ffffffff820e5420 T enc2_hw_init +ffffffff820e5500 T dcn20_link_encoder_construct +ffffffff820e6000 T mmhubbub2_config_mcif_irq +ffffffff820e6130 T mmhubbub2_enable_mcif +ffffffff820e6170 T mmhubbub2_disable_mcif +ffffffff820e61b0 T mcifwb2_dump_frame +ffffffff820e62c0 T dcn20_mmhubbub_construct +ffffffff820e6310 t mmhubbub2_config_mcif_buf +ffffffff820e6960 t mmhubbub2_config_mcif_arb +ffffffff820e7000 T mpc2_update_blending +ffffffff820e72a0 T mpc2_set_denorm +ffffffff820e7310 T mpc2_set_denorm_clamp +ffffffff820e7460 T mpc2_set_output_csc +ffffffff820e7650 T mpc2_set_ocsc_default +ffffffff820e7830 T mpc20_power_on_ogam_lut +ffffffff820e78b0 T mpc2_set_output_gamma +ffffffff820e80b0 T mpc2_assert_idle_mpcc +ffffffff820e81c0 T mpc2_assert_mpcc_idle_before_connect +ffffffff820e8410 T dcn20_mpc_construct +ffffffff820e84d0 t mpc2_get_mpcc_for_dpp +ffffffff820e9000 T opp2_set_disp_pattern_generator +ffffffff820e9810 T opp2_dpg_set_blank_color +ffffffff820e9990 T opp2_program_dpg_dimensions +ffffffff820e9a20 T opp2_dpg_is_blanked +ffffffff820e9ae0 T opp2_program_left_edge_extra_pixel +ffffffff820e9b30 T dcn20_opp_construct +ffffffff820ea000 T optc2_enable_crtc +ffffffff820ea100 T optc2_set_gsl +ffffffff820ea1f0 T optc2_set_gsl_source_select +ffffffff820ea2b0 T optc2_set_dsc_config +ffffffff820ea380 T optc2_get_dsc_status +ffffffff820ea3c0 T optc2_is_two_pixels_per_containter +ffffffff820ea3d0 T optc2_set_odm_bypass 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dcn201_set_cursor_attribute +ffffffff820f9140 T dcn201_set_dmdata_attributes +ffffffff820f9250 T dcn201_unblank_stream +ffffffff820fa000 T dcn201_hw_sequencer_construct +ffffffff820fb000 T dcn201_link_encoder_construct +ffffffff820fb190 t dcn201_link_encoder_is_in_alt_mode +ffffffff820fb200 t dcn201_link_encoder_get_max_link_cap +ffffffff820fc000 T dcn201_mpc_construct +ffffffff820fc0c0 t mpc201_set_out_rate_control +ffffffff820fd000 T dcn201_opp_construct +ffffffff820fe000 T optc201_is_two_pixels_per_containter +ffffffff820fe010 T dcn201_timing_generator_init +ffffffff820fe080 t optc201_validate_timing +ffffffff820fe180 t optc201_triplebuffer_unlock +ffffffff820fe230 t optc201_triplebuffer_lock +ffffffff820fe350 t optc201_get_optc_source +ffffffff820ff000 T dcn201_create_resource_pool +ffffffff820ffa30 t dcn201_resource_destruct +ffffffff820ffd30 t dcn201_destroy_resource_pool +ffffffff820ffd90 t dcn201_link_init +ffffffff820ffde0 t dcn201_link_encoder_create +ffffffff820ffe90 t dcn201_acquire_free_pipe_for_layer +ffffffff820fffa0 t dcn201_populate_dml_writeback_from_context +ffffffff82100000 t read_dce_straps +ffffffff82100030 t dcn201_create_audio +ffffffff82100060 t dcn201_stream_encoder_create +ffffffff82100100 t dcn201_hwseq_create +ffffffff82100170 t dcn201_get_dcc_compression_cap +ffffffff82101000 T dccg21_create +ffffffff821010b0 t dccg21_update_dpp_dto +ffffffff82102000 T dcn21_dchvm_init +ffffffff82102200 T hubbub21_init_dchub +ffffffff821023d0 T hubbub21_program_urgent_watermarks +ffffffff82102bf0 T hubbub21_program_stutter_watermarks +ffffffff821030e0 T hubbub21_program_pstate_watermarks +ffffffff82103380 T hubbub21_program_watermarks +ffffffff821034e0 T hubbub21_wm_read_state +ffffffff82103780 T hubbub21_construct +ffffffff821037e0 t hubbub21_apply_DEDCN21_147_wa +ffffffff82104000 T apply_DEDCN21_142_wa_for_hostvm_deadline +ffffffff821042e0 T hubp21_program_deadline +ffffffff82104310 T hubp21_program_requestor +ffffffff821046b0 T hubp21_construct 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+ffffffff8210a000 T dcn21_fast_validate_bw +ffffffff8210a6a0 T dcn21_create_resource_pool +ffffffff8210b9d0 t dcn21_resource_destruct +ffffffff8210be70 t dcn21_destroy_resource_pool +ffffffff8210bed0 t dcn21_panel_cntl_create +ffffffff8210bf60 t dcn21_link_encoder_create +ffffffff8210c060 t dcn21_validate_bandwidth +ffffffff8210c0e0 t dcn21_patch_unknown_plane_state +ffffffff8210c130 t dcn21_get_panel_config_defaults +ffffffff8210c170 t read_dce_straps +ffffffff8210c1a0 t dcn21_create_audio +ffffffff8210c1d0 t dcn21_stream_encoder_create +ffffffff8210c270 t dcn21_hwseq_create +ffffffff8210d000 T afmt3_setup_hdmi_audio +ffffffff8210d1d0 T afmt3_se_audio_setup +ffffffff8210d370 T afmt3_audio_mute_control +ffffffff8210d3e0 T afmt3_audio_info_immediate_update +ffffffff8210d420 T afmt3_setup_dp_audio +ffffffff8210d510 T afmt3_construct +ffffffff8210e000 T cm_helper_program_gamcor_xfer_func +ffffffff8210e3c0 T cm3_helper_translate_curve_to_hw_format +ffffffff8210efd0 T cm3_helper_convert_to_custom_float +ffffffff8210f420 T cm3_helper_translate_curve_to_degamma_hw_format +ffffffff8210fc40 T is_rgb_equal +ffffffff82110000 T dccg3_create +ffffffff821100b0 T dccg30_create +ffffffff82111000 T dcn30_link_encoder_validate_output_with_stream +ffffffff82111010 T dcn30_link_encoder_construct +ffffffff821111f0 T enc3_hw_init +ffffffff82112000 T enc3_stream_encoder_update_hdmi_info_packets +ffffffff82112100 t enc3_update_hdmi_info_packet +ffffffff821124f0 T enc3_stream_encoder_stop_hdmi_info_packets +ffffffff82112ad0 T enc3_dp_set_dsc_pps_info_packet +ffffffff82112df0 T enc3_stream_encoder_update_dp_info_packets_sdp_line_num +ffffffff82112eb0 T enc3_stream_encoder_update_dp_info_packets +ffffffff82113170 T enc3_audio_mute_control +ffffffff821131e0 T enc3_se_dp_audio_setup +ffffffff82113260 T enc3_se_dp_audio_enable +ffffffff82113350 T enc3_se_hdmi_audio_setup +ffffffff82113660 T dcn30_dio_stream_encoder_construct +ffffffff821136d0 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff82113cd0 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff82113ed0 t enc3_read_state +ffffffff82114060 t enc3_dp_set_dsc_config +ffffffff82114130 t enc3_dp_set_odm_combine +ffffffff82115000 T dpp30_read_state +ffffffff82115050 T dpp3_program_post_csc +ffffffff82115240 T dpp3_set_pre_degam +ffffffff821152f0 T dpp3_cnv_setup +ffffffff82115bc0 T dpp3_set_cursor_attributes +ffffffff82115d30 T dpp3_get_optimal_number_of_taps +ffffffff82116750 T dpp3_construct +ffffffff821167b0 t dpp3_deferred_update +ffffffff82116b90 t dpp3_program_blnd_lut +ffffffff821175e0 t dpp3_program_shaper +ffffffff82119660 t dpp3_program_3dlut +ffffffff82119e10 t dpp3_set3dlut_ram12 +ffffffff8211a000 T dpp3_program_cm_dealpha +ffffffff8211a0a0 T dpp3_program_cm_bias +ffffffff8211a190 T dpp3_program_gamcor_lut +ffffffff8211abb0 t dpp3_power_on_gamcor_lut +ffffffff8211ace0 T dpp3_set_hdr_multiplier +ffffffff8211ad30 T dpp3_cm_set_gamut_remap +ffffffff8211b000 T dwb3_config_fc +ffffffff8211b1b0 T dwb3_set_stereo +ffffffff8211b270 T dwb3_enable +ffffffff8211b3a0 T dwb3_set_denorm +ffffffff8211b4c0 T dwb3_disable +ffffffff8211b570 T dwb3_update +ffffffff8211b6a0 T dwb3_is_enabled +ffffffff8211b740 T dwb3_set_new_content +ffffffff8211b780 T dcn30_dwbc_construct +ffffffff8211b7d0 T dwb3_set_host_read_rate_control +ffffffff8211b840 t dwb3_get_caps +ffffffff8211c000 T dwb3_ogam_set_input_transfer_func +ffffffff8211c9f0 T dwb3_set_gamut_remap +ffffffff8211cca0 T dwb3_program_hdr_mult +ffffffff8211d000 T hubbub3_init_dchub_sys_ctx +ffffffff8211d1c0 T hubbub3_program_watermarks +ffffffff8211d2c0 T hubbub3_dcc_support_swizzle +ffffffff8211d380 T hubbub3_get_dcc_compression_cap +ffffffff8211d560 T hubbub3_force_wm_propagate_to_pipes +ffffffff8211d610 T hubbub3_force_pstate_change_control +ffffffff8211d690 T hubbub3_init_watermarks +ffffffff8211d9d0 T hubbub3_construct +ffffffff8211e000 T hubp3_set_vm_system_aperture_settings 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dcn30_apply_idle_power_optimizations +ffffffff82121d10 T dcn30_does_plane_fit_in_mall +ffffffff82121dc0 T dcn30_hardware_release +ffffffff82121eb0 T dcn30_set_disp_pattern_generator +ffffffff82121f20 T dcn30_prepare_bandwidth +ffffffff82122010 T dcn30_set_static_screen_control +ffffffff82123000 T dcn30_hw_sequencer_construct +ffffffff82124000 T dcn30_mmhubbub_construct +ffffffff82124050 t mmhubbub3_warmup_mcif +ffffffff82124260 t mmhubbub3_config_mcif_buf +ffffffff82124710 t mmhubbub3_config_mcif_arb +ffffffff82125000 T mpc3_is_dwb_idle +ffffffff82125070 T mpc3_set_dwb_mux +ffffffff821250f0 T mpc3_disable_dwb_mux +ffffffff82125170 T mpc3_set_out_rate_control +ffffffff82125280 T mpc3_get_ogam_current +ffffffff82125320 T mpc3_power_on_ogam_lut +ffffffff821253f0 T mpc3_set_output_gamma +ffffffff82126030 T mpc3_set_denorm +ffffffff821260a0 T mpc3_set_denorm_clamp +ffffffff821261f0 T mpc3_program_shaper +ffffffff821283b0 t mpc3_power_on_shaper_3dlut +ffffffff82128730 T mpc3_init_mpcc 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+ffffffff8212adb0 T optc3_set_vtotal_min_max +ffffffff8212adf0 T optc3_tg_init +ffffffff8212ae50 T dcn30_timing_generator_init +ffffffff8212b000 T dcn30_add_stream_to_ctx +ffffffff8212b020 T dcn30_populate_dml_pipes_from_context +ffffffff8212b100 T dcn30_populate_dml_writeback_from_context +ffffffff8212b160 T dcn30_calc_max_scaled_time +ffffffff8212b1c0 T dcn30_set_mcif_arb_params +ffffffff8212b330 T dcn30_acquire_post_bldn_3dlut +ffffffff8212b4c0 T dcn30_release_post_bldn_3dlut +ffffffff8212b570 T dcn30_internal_validate_bw +ffffffff8212c2e0 t dcn30_split_stream_for_mpc_or_odm +ffffffff8212c600 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8212c6e0 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8212c780 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff8212c820 T dcn30_update_soc_for_wm_a +ffffffff8212c870 T dcn30_calculate_wm_and_dlg +ffffffff8212c8e0 T dcn30_validate_bandwidth +ffffffff8212cd10 T dcn30_update_bw_bounding_box +ffffffff8212d370 T dcn30_create_resource_pool +ffffffff8212e920 t dcn30_resource_destruct +ffffffff8212eea0 t dcn30_destroy_resource_pool +ffffffff8212ef00 t dcn30_panel_cntl_create +ffffffff8212ef90 t dcn30_link_encoder_create +ffffffff8212f040 t dcn30_get_panel_config_defaults +ffffffff8212f0c0 t read_dce_straps +ffffffff8212f0f0 t dcn30_create_audio +ffffffff8212f120 t dcn30_stream_encoder_create +ffffffff8212f2a0 t dcn30_hwseq_create +ffffffff82130000 T vpg3_update_generic_info_packet +ffffffff821309a0 T vpg3_construct +ffffffff82131000 T dccg301_create +ffffffff82132000 T dcn301_link_encoder_construct +ffffffff82133000 T hubbub301_construct +ffffffff82134000 T dcn301_hw_sequencer_construct +ffffffff82135000 T optc301_set_drr +ffffffff82135230 T optc301_setup_manual_trigger +ffffffff82135350 T dcn301_timing_generator_init +ffffffff82136000 T dcn301_panel_cntl_construct +ffffffff82136050 t dcn301_panel_cntl_destroy +ffffffff821360a0 t dcn301_panel_cntl_hw_init +ffffffff821362b0 t dcn301_is_panel_backlight_on +ffffffff82136310 t dcn301_is_panel_powered_on +ffffffff821363c0 t dcn301_store_backlight_level +ffffffff82136460 t dcn301_get_16_bit_backlight_from_pwm +ffffffff82137000 T dcn301_create_resource_pool +ffffffff82138590 t dcn301_destruct +ffffffff82138ad0 t dcn301_destroy_resource_pool +ffffffff82138b30 t dcn301_panel_cntl_create +ffffffff82138bc0 t dcn301_link_encoder_create +ffffffff82138c70 t dcn301_calculate_wm_and_dlg +ffffffff82138ce0 t read_dce_straps +ffffffff82138d10 t dcn301_create_audio +ffffffff82138d40 t dcn301_stream_encoder_create +ffffffff82138ec0 t dcn301_hwseq_create +ffffffff82139000 T dcn302_dpp_pg_control +ffffffff821392a0 T dcn302_hubp_pg_control +ffffffff82139550 T dcn302_dsc_pg_control +ffffffff8213a000 T dcn302_hw_sequencer_construct +ffffffff8213b000 T dcn302_update_bw_bounding_box +ffffffff8213b050 T dcn302_create_resource_pool +ffffffff8213c4a0 t dcn302_resource_destruct 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dcn303_create_audio +ffffffff82140a50 t dcn303_stream_encoder_create +ffffffff82140bd0 t dcn303_hwseq_create +ffffffff82141000 T afmt31_powerdown +ffffffff82141090 T afmt31_poweron +ffffffff82141120 T afmt31_construct +ffffffff82142000 T apg31_construct +ffffffff82142050 t apg31_se_audio_setup +ffffffff82142160 t apg31_enable +ffffffff82142270 t apg31_disable +ffffffff82143000 T dccg31_update_dpp_dto +ffffffff82143160 T dccg31_set_dpstreamclk +ffffffff821432f0 t dccg31_disable_dpstreamclk +ffffffff82143440 T dccg31_enable_symclk32_se +ffffffff82143740 T dccg31_disable_symclk32_se +ffffffff82143a10 T dccg31_enable_symclk32_le +ffffffff82143b20 T dccg31_disable_symclk32_le +ffffffff82143c10 T dccg31_set_symclk32_le_root_clock_gating +ffffffff82143d20 T dccg31_disable_dscclk +ffffffff82143f70 T dccg31_enable_dscclk +ffffffff821441e0 T dccg31_set_physymclk +ffffffff821446f0 T dccg31_set_dtbclk_dto +ffffffff821449a0 T dccg31_set_audio_dtbclk_dto +ffffffff82144ab0 T dccg31_get_dccg_ref_freq +ffffffff82144ae0 T dccg31_set_dispclk_change_mode +ffffffff82144b30 T dccg31_init +ffffffff82145110 T dccg31_otg_add_pixel +ffffffff82145150 T dccg31_otg_drop_pixel +ffffffff82145190 T dccg31_create +ffffffff82146000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff82146390 T dcn31_link_encoder_construct +ffffffff82146560 T dcn31_link_encoder_construct_minimal +ffffffff821465e0 T dcn31_link_encoder_enable_dp_output +ffffffff82146820 T dcn31_link_encoder_enable_dp_mst_output +ffffffff82146a60 T dcn31_link_encoder_disable_output +ffffffff82146cd0 T dcn31_link_encoder_is_in_alt_mode +ffffffff82146e20 T dcn31_link_encoder_get_max_link_cap +ffffffff82146fa0 t enc31_hw_init +ffffffff82147000 T dcn31_hpo_dp_link_enc_enable +ffffffff82147160 T dcn31_hpo_dp_link_enc_disable +ffffffff821471d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff82147b30 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff82147db0 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff82148050 T dcn31_hpo_dp_link_enc_read_state +ffffffff821482f0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff821483f0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff82148530 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff82148620 T hpo_dp_link_encoder31_construct +ffffffff82148680 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff82149000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff82149070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff821491b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff82149460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff82149560 t dcn31_hpo_dp_stream_enc_disable +ffffffff821495d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff82149e80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num +ffffffff82149f40 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff8214a160 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff8214a2f0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff8214a590 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff8214a690 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff8214a740 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff8214a810 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff8214a9c0 t dcn31_hpo_dp_stream_enc_read_state +ffffffff8214ab50 t dcn31_set_hblank_min_symbol_width +ffffffff8214b000 T hubbub31_init_dchub_sys_ctx +ffffffff8214b1e0 T hubbub31_init +ffffffff8214b280 T hubbub31_construct +ffffffff8214b320 t hubbub31_get_dcc_compression_cap +ffffffff8214b500 t hubbub31_get_dchub_ref_freq +ffffffff8214b5e0 t hubbub31_program_watermarks +ffffffff8214cf00 t hubbub31_verify_allow_pstate_change_high +ffffffff8214d0c0 t dcn31_program_det_size +ffffffff8214d2a0 t dcn31_program_compbuf_size +ffffffff8214d520 t dcn31_init_crb +ffffffff8214e000 T hubp31_set_unbounded_requesting +ffffffff8214e090 T hubp31_soft_reset +ffffffff8214e0e0 T hubp31_construct +ffffffff8214e150 t hubp31_program_extended_blank +ffffffff8214f000 T dcn31_init_hw +ffffffff8214f850 T dcn31_dsc_pg_control +ffffffff8214fba0 T dcn31_enable_power_gating_plane +ffffffff8214fe00 T dcn31_update_info_frame +ffffffff8214ff30 T dcn31_z10_save_init +ffffffff8214ffc0 T dcn31_z10_restore +ffffffff82150070 T dcn31_hubp_pg_control +ffffffff82150390 T dcn31_init_sys_ctx +ffffffff82150440 T dcn31_reset_hw_ctx_wrap +ffffffff821507a0 T dcn31_setup_hpo_hw_control +ffffffff82151000 T dcn31_hw_sequencer_construct +ffffffff82152000 T optc31_immediate_disable_crtc +ffffffff82152100 T optc31_set_drr +ffffffff82152310 T optc3_init_odm +ffffffff82152480 T dcn31_timing_generator_init +ffffffff821524f0 t optc31_enable_crtc +ffffffff821525f0 t optc31_disable_crtc +ffffffff821526d0 t optc31_set_odm_combine +ffffffff82153000 T dcn31_panel_cntl_construct +ffffffff82153040 t dcn31_panel_cntl_destroy +ffffffff82153090 t dcn31_panel_cntl_hw_init +ffffffff82153190 t dcn31_is_panel_backlight_on +ffffffff82153230 t dcn31_is_panel_powered_on +ffffffff821532e0 t dcn31_store_backlight_level +ffffffff821533b0 t dcn31_get_16_bit_backlight_from_pwm +ffffffff82154000 T dcn31x_populate_dml_pipes_from_context +ffffffff82154180 T dcn31_populate_dml_pipes_from_context +ffffffff821545c0 T dcn31_calculate_wm_and_dlg +ffffffff82154630 T dcn31_populate_dml_writeback_from_context +ffffffff82154690 T dcn31_set_mcif_arb_params +ffffffff821546f0 T dcn31_validate_bandwidth +ffffffff82154ae0 T dcn31_create_resource_pool +ffffffff82155e80 t dcn31_resource_destruct +ffffffff821564f0 t dcn31_destroy_resource_pool +ffffffff82156550 t dcn31_panel_cntl_create +ffffffff821565c0 t dcn31_link_encoder_create +ffffffff82156670 t dcn31_link_enc_create_minimal +ffffffff82156710 t dcn31_get_panel_config_defaults +ffffffff82156750 t read_dce_straps +ffffffff82156780 t dcn31_create_audio +ffffffff821567b0 t dcn31_stream_encoder_create +ffffffff82156930 t dcn31_hpo_dp_stream_encoder_create +ffffffff82156af0 t dcn31_hpo_dp_link_encoder_create +ffffffff82156b80 t dcn31_hwseq_create +ffffffff82157000 T vpg31_powerdown +ffffffff82157090 T vpg31_poweron +ffffffff82157120 T vpg31_construct +ffffffff82158000 T dccg314_create +ffffffff821580b0 t dccg314_init +ffffffff82158210 t dccg314_set_dpstreamclk +ffffffff821585d0 t dccg314_set_dtbclk_dto +ffffffff821587c0 t dccg314_set_pixel_rate_div +ffffffff82158b30 t dccg314_set_valid_pixel_rate +ffffffff82158ba0 t dccg314_trigger_dio_fifo_resync +ffffffff82158c40 t dccg314_dpp_root_clock_control +ffffffff82159000 T dcn314_dio_stream_encoder_construct +ffffffff82159070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff82159670 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff82159880 t enc314_stream_encoder_dp_blank +ffffffff82159900 t enc314_stream_encoder_dp_unblank +ffffffff82159c80 t enc314_read_state +ffffffff82159de0 t enc314_dp_set_dsc_config +ffffffff82159e30 t enc314_dp_set_odm_combine +ffffffff82159e70 t enc314_set_dig_input_mode +ffffffff82159ec0 t enc314_enable_fifo +ffffffff82159f60 t enc314_disable_fifo +ffffffff82159fb0 t enc314_reset_fifo +ffffffff8215b000 T dcn314_update_odm +ffffffff8215b600 T dcn314_dsc_pg_control +ffffffff8215b9d0 T dcn314_enable_power_gating_plane +ffffffff8215bc60 T dcn314_calculate_dccg_k1_k2_values +ffffffff8215be10 T dcn314_set_pixels_per_cycle +ffffffff8215bf00 T dcn314_resync_fifo_dccg_dio +ffffffff8215c0a0 T dcn314_dpp_root_clock_control +ffffffff8215c100 T dcn314_disable_link_output +ffffffff8215d000 T dcn314_hw_sequencer_construct +ffffffff8215e000 T dcn314_timing_generator_init +ffffffff8215e070 t optc314_enable_crtc +ffffffff8215e170 t optc314_disable_crtc +ffffffff8215e250 t optc314_phantom_crtc_post_enable +ffffffff8215e310 t optc314_set_odm_bypass +ffffffff8215e480 t optc314_set_odm_combine +ffffffff8215e770 t optc314_set_h_timing_div_manual_mode +ffffffff8215f000 T dcn314_validate_bandwidth +ffffffff8215f490 T dcn314_create_resource_pool +ffffffff821607b0 t dcn314_resource_destruct +ffffffff82160e20 t dcn314_get_preferred_eng_id_dpia +ffffffff82160e50 t dcn314_destroy_resource_pool +ffffffff82160eb0 t dcn31_panel_cntl_create +ffffffff82160f20 t dcn31_link_encoder_create +ffffffff82160fd0 t dcn31_link_enc_create_minimal +ffffffff82161070 t dcn314_populate_dml_pipes_from_context +ffffffff82161100 t dcn314_update_bw_bounding_box +ffffffff82161150 t dcn314_get_panel_config_defaults +ffffffff82161190 t read_dce_straps +ffffffff821611c0 t dcn31_create_audio +ffffffff821611f0 t dcn314_stream_encoder_create +ffffffff82161370 t dcn31_hpo_dp_stream_encoder_create +ffffffff82161530 t dcn31_hpo_dp_link_encoder_create +ffffffff821615c0 t dcn314_hwseq_create +ffffffff82162000 T dcn315_create_resource_pool +ffffffff82163280 t dcn315_resource_destruct +ffffffff821638e0 t dcn315_destroy_resource_pool +ffffffff82163940 t dcn31_panel_cntl_create +ffffffff821639b0 t dcn31_link_encoder_create +ffffffff82163a60 t dcn31_link_enc_create_minimal +ffffffff82163b00 t dcn315_populate_dml_pipes_from_context +ffffffff82164200 t dcn315_get_panel_config_defaults +ffffffff82164240 t read_dce_straps +ffffffff82164270 t dcn31_create_audio +ffffffff821642a0 t dcn315_stream_encoder_create +ffffffff82164420 t dcn31_hpo_dp_stream_encoder_create +ffffffff821645e0 t dcn31_hpo_dp_link_encoder_create +ffffffff82164670 t dcn31_hwseq_create +ffffffff82165000 T dcn316_create_resource_pool +ffffffff82166290 t dcn316_resource_destruct +ffffffff821668f0 t dcn316_destroy_resource_pool +ffffffff82166950 t dcn31_panel_cntl_create +ffffffff821669c0 t dcn31_link_encoder_create +ffffffff82166a70 t dcn31_link_enc_create_minimal +ffffffff82166b10 t dcn316_populate_dml_pipes_from_context +ffffffff82166e40 t dcn316_get_panel_config_defaults +ffffffff82166e80 t read_dce_straps +ffffffff82166eb0 t dcn31_create_audio +ffffffff82166ee0 t dcn316_stream_encoder_create +ffffffff82167060 t dcn31_hpo_dp_stream_encoder_create +ffffffff82167220 t dcn31_hpo_dp_link_encoder_create +ffffffff821672b0 t dcn31_hwseq_create +ffffffff82168000 T dccg32_create +ffffffff821680b0 t dccg32_get_dccg_ref_freq +ffffffff821680e0 t dccg32_otg_add_pixel +ffffffff82168120 t dccg32_otg_drop_pixel +ffffffff82168160 t dccg32_set_dpstreamclk +ffffffff821684a0 t dccg32_set_dtbclk_dto +ffffffff821686a0 t dccg32_set_pixel_rate_div +ffffffff82168a10 t dccg32_set_valid_pixel_rate +ffffffff82168a80 t dccg32_trigger_dio_fifo_resync +ffffffff82169000 T enc32_hw_init +ffffffff82169090 T dcn32_link_encoder_enable_dp_output +ffffffff821690e0 T dcn32_link_encoder_construct +ffffffff821692d0 t dcn32_link_encoder_is_in_alt_mode +ffffffff82169350 t dcn32_link_encoder_get_max_link_cap +ffffffff8216a000 T enc32_stream_encoder_dp_unblank +ffffffff8216a500 T enc32_enable_fifo +ffffffff8216a5a0 t enc32_reset_fifo +ffffffff8216a6a0 T dcn32_dio_stream_encoder_construct +ffffffff8216a710 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff8216ac90 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff8216ae10 t enc32_read_state +ffffffff8216af70 t enc32_dp_set_dsc_config +ffffffff8216afc0 t enc32_dp_set_odm_combine +ffffffff8216b000 t enc32_set_dig_input_mode +ffffffff8216c000 T dpp32_construct +ffffffff8216c060 t dscl32_calc_lb_num_partitions +ffffffff8216d000 T hpo_dp_link_encoder32_construct +ffffffff8216d060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff8216e000 T hubbub32_set_request_limit +ffffffff8216e130 T dcn32_program_det_size +ffffffff8216e2d0 T hubbub32_program_urgent_watermarks +ffffffff8216ea40 T hubbub32_program_stutter_watermarks +ffffffff8216ee90 T hubbub32_program_pstate_watermarks +ffffffff8216f320 T hubbub32_program_usr_watermarks +ffffffff8216f580 T hubbub32_force_usr_retraining_allow +ffffffff8216f600 T hubbub32_force_wm_propagate_to_pipes +ffffffff8216f6a0 T hubbub32_init +ffffffff8216f7e0 T hubbub32_construct +ffffffff8216f860 t hubbub32_wm_read_state +ffffffff8216fc80 t hubbub32_program_watermarks +ffffffff8216fd90 t hubbub32_init_watermarks +ffffffff821701d0 t dcn32_program_compbuf_size +ffffffff82170460 t dcn32_init_crb +ffffffff82171000 T hubp32_update_force_pstate_disallow +ffffffff82171090 T hubp32_update_force_cursor_pstate_disallow +ffffffff82171120 T hubp32_update_mall_sel +ffffffff821711b0 T hubp32_prepare_subvp_buffering +ffffffff82171250 T hubp32_phantom_hubp_post_enable +ffffffff82171360 T hubp32_cursor_set_attributes +ffffffff82171620 T hubp32_init +ffffffff82171650 T hubp32_construct +ffffffff82172000 T dcn32_dsc_pg_control +ffffffff82172320 T dcn32_enable_power_gating_plane +ffffffff82172590 T dcn32_hubp_pg_control +ffffffff82172800 T dcn32_apply_idle_power_optimizations +ffffffff82172af0 T dcn32_commit_subvp_config +ffffffff82172ba0 T dcn32_subvp_pipe_control_lock +ffffffff82172d70 T dcn32_subvp_pipe_control_lock_fast +ffffffff82172df0 T dcn32_set_mpc_shaper_3dlut +ffffffff82172f10 T dcn32_set_mcm_luts +ffffffff821730a0 T dcn32_set_input_transfer_func +ffffffff821731e0 T dcn32_set_output_transfer_func +ffffffff82173420 T dcn32_update_force_pstate +ffffffff82173640 T dcn32_update_mall_sel +ffffffff82173830 T dcn32_program_mall_pipe_config +ffffffff82173920 T dcn32_init_hw +ffffffff821741e0 T dcn32_update_odm +ffffffff821747e0 T dcn32_calculate_dccg_k1_k2_values +ffffffff82174a10 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff82174ab0 T dcn32_set_pixels_per_cycle +ffffffff82174bf0 T dcn32_resync_fifo_dccg_dio +ffffffff82174d90 T dcn32_unblank_stream +ffffffff82174fa0 T dcn32_disable_link_output +ffffffff82175310 T dcn32_update_phantom_vp_position +ffffffff82175420 T dcn32_apply_update_flags_for_phantom +ffffffff821754a0 T dcn32_dsc_pg_status +ffffffff82175580 T dcn32_update_dsc_pg +ffffffff82175680 T dcn32_enable_phantom_streams +ffffffff821757c0 T dcn32_init_blank +ffffffff82175a00 T dcn32_blank_phantom +ffffffff82175b80 T dcn32_is_pipe_topology_transition_seamless +ffffffff82176000 T dcn32_hw_sequencer_init_functions +ffffffff82177000 T dcn32_mmhubbub_construct +ffffffff82177050 t mmhubbub32_warmup_mcif +ffffffff82177260 t mmhubbub32_config_mcif_buf +ffffffff82177710 t mmhubbub32_config_mcif_arb +ffffffff82178000 T mpc32_mpc_init +ffffffff821781e0 T mpc32_power_on_blnd_lut +ffffffff82178350 T mpc32_configure_post1dlut +ffffffff82178450 T mpc32_program_post1dluta_settings +ffffffff82178660 T mpc32_program_post1dlutb_settings +ffffffff82178870 T mpc32_program_post1dlut_pwl +ffffffff82178ca0 T mpc32_program_post1dlut +ffffffff82178fb0 T mpc32_configure_shaper_lut +ffffffff821790d0 T mpc32_program_shaper_luta_settings +ffffffff82179f60 T mpc32_program_shaper_lutb_settings +ffffffff8217adf0 T mpc32_program_shaper_lut +ffffffff8217af90 T mpc32_power_on_shaper_3dlut +ffffffff8217b1c0 T mpc32_program_shaper +ffffffff8217b4e0 T mpc32_select_3dlut_ram +ffffffff8217b590 T mpc32_select_3dlut_ram_mask +ffffffff8217b660 T mpc32_set3dlut_ram12 +ffffffff8217b860 T mpc32_set3dlut_ram10 +ffffffff8217b930 T mpc32_program_3dlut +ffffffff8217c300 T dcn32_mpc_construct +ffffffff8217d000 T optc32_set_h_timing_div_manual_mode +ffffffff8217d040 T dcn32_timing_generator_init +ffffffff8217d0b0 t optc32_enable_crtc +ffffffff8217d1b0 t optc32_disable_crtc +ffffffff8217d370 t optc32_phantom_crtc_post_enable +ffffffff8217d430 t optc32_disable_phantom_otg +ffffffff8217d520 t optc32_set_drr +ffffffff8217d6f0 t optc32_set_odm_bypass +ffffffff8217d860 t optc32_set_odm_combine +ffffffff8217e000 T dcn32_panel_cntl_create +ffffffff8217e070 T dcn32_acquire_post_bldn_3dlut +ffffffff8217e160 T dcn32_release_post_bldn_3dlut +ffffffff8217e210 T dcn32_retain_phantom_pipes +ffffffff8217e2f0 T dcn32_remove_phantom_pipes +ffffffff8217e460 T dcn32_add_phantom_pipes +ffffffff8217e890 T dcn32_validate_bandwidth +ffffffff8217ed70 T dcn32_populate_dml_pipes_from_context +ffffffff8217f1a0 T dcn32_calculate_wm_and_dlg +ffffffff8217f210 T dcn32_create_resource_pool +ffffffff8217f2c0 t dcn32_resource_construct +ffffffff8218a800 T dcn32_acquire_free_pipe_as_secondary_dpp_pipe +ffffffff8218ab00 T dcn32_calc_num_avail_chans_for_mall +ffffffff8218ab70 t dcn32_mpc_create +ffffffff8218f1d0 t dcn32_dwbc_create +ffffffff8218fbd0 t dcn32_mmhubbub_create +ffffffff82190080 t dcn32_resource_destruct +ffffffff82190710 t dcn32_destroy_resource_pool +ffffffff82190770 t dcn32_link_encoder_create +ffffffff82191840 t dcn32_update_bw_bounding_box +ffffffff82191890 t read_dce_straps +ffffffff821918c0 t dcn32_create_audio +ffffffff82191c40 t dcn32_stream_encoder_create +ffffffff82193a80 t dcn32_hpo_dp_stream_encoder_create +ffffffff82194860 t dcn32_hpo_dp_link_encoder_create +ffffffff82194cb0 t dcn32_hwseq_create +ffffffff821951a0 t dcn32_vpg_create +ffffffff82196000 T dcn32_helper_mall_bytes_to_ways +ffffffff82196060 T dcn32_helper_calculate_mall_bytes_for_cursor +ffffffff82196100 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff82196180 T dcn32_merge_pipes_for_subvp +ffffffff82196340 T dcn32_all_pipes_have_stream_and_plane +ffffffff821963d0 T dcn32_subvp_in_use +ffffffff82196460 T dcn32_mpo_in_use +ffffffff821964d0 T dcn32_any_surfaces_rotated +ffffffff82196560 T dcn32_is_center_timing +ffffffff821965d0 T dcn32_is_psr_capable +ffffffff82196620 T dcn32_determine_det_override +ffffffff82196960 T dcn32_set_det_allocations +ffffffff82196af0 T dcn32_save_mall_state +ffffffff82196ba0 T dcn32_restore_mall_state +ffffffff82196c50 T dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82196e00 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82196eb0 T dcn32_check_native_scaling_for_res +ffffffff82196f10 T dcn32_subvp_drr_admissable +ffffffff821970d0 T dcn32_subvp_vblank_admissable +ffffffff82198000 T dcn321_link_encoder_construct +ffffffff82199000 T dcn321_create_resource_pool +ffffffff821990b0 t dcn321_resource_construct +ffffffff821a4550 t dcn321_mpc_create +ffffffff821a8bb0 t dcn321_dwbc_create +ffffffff821a95b0 t dcn321_mmhubbub_create +ffffffff821a9a60 t dcn321_resource_destruct +ffffffff821aa0f0 t dcn321_destroy_resource_pool +ffffffff821aa150 t dcn321_link_encoder_create +ffffffff821ab220 t dcn321_update_bw_bounding_box +ffffffff821ab270 t read_dce_straps +ffffffff821ab2a0 t dcn321_create_audio +ffffffff821ab620 t dcn321_stream_encoder_create +ffffffff821ad460 t dcn321_hpo_dp_stream_encoder_create +ffffffff821ae240 t dcn321_hpo_dp_link_encoder_create +ffffffff821ae690 t dcn321_hwseq_create +ffffffff821aeb80 t dcn321_vpg_create +ffffffff821af000 T bw_int_to_fixed_nonconst +ffffffff821af090 T bw_frc_to_fixed +ffffffff821af260 T bw_floor2 +ffffffff821af310 T bw_ceil2 +ffffffff821af390 T bw_mul +ffffffff821b0000 T convert_to_custom_float_format +ffffffff821b1000 T bw_calcs_init +ffffffff821b1e60 T bw_calcs +ffffffff821b3800 t calculate_bandwidth +ffffffff821bb000 T scaler_settings_calculation +ffffffff821bb350 T mode_support_and_system_configuration +ffffffff821c1180 T display_pipe_configuration +ffffffff821c1ab0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff821c7000 T dcn_bw_mod +ffffffff821c7060 T dcn_bw_min2 +ffffffff821c70a0 T dcn_bw_max +ffffffff821c70d0 T dcn_bw_max2 +ffffffff821c7110 T dcn_bw_floor2 +ffffffff821c71b0 T dcn_bw_floor +ffffffff821c71e0 T dcn_bw_ceil +ffffffff821c7220 T dcn_bw_ceil2 +ffffffff821c72d0 T dcn_bw_max3 +ffffffff821c7350 T dcn_bw_max5 +ffffffff821c7490 T dcn_bw_pow +ffffffff821c7520 T dcn_bw_fabs +ffffffff821c7560 T dcn_bw_log +ffffffff821c8000 T swizzle_mode_to_macro_tile_size +ffffffff821c8090 T dcn_validate_bandwidth +ffffffff821ca300 T dcn_bw_sync_calcs_and_dml +ffffffff821ca550 t dcn_bw_calc_rq_dlg_ttu +ffffffff821cad20 T dcn_find_dcfclk_suits_all +ffffffff821cb180 T dcn_bw_update_from_pplib_fclks +ffffffff821cb300 T dcn_bw_update_from_pplib_dcfclks +ffffffff821cb3d0 T dcn_get_soc_clks +ffffffff821cb450 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff821cc000 T dcn10_resource_construct_fp +ffffffff821cd000 T dcn20_populate_dml_writeback_from_context +ffffffff821cd180 T dcn20_fpu_set_wb_arb_params +ffffffff821cd330 T dcn20_calculate_dlg_params +ffffffff821cdb70 T dcn20_populate_dml_pipes_from_context +ffffffff821cea80 T dcn20_calculate_wm +ffffffff821cf270 T dcn20_update_bounding_box +ffffffff821cf4f0 T dcn20_cap_soc_clocks +ffffffff821cf850 T dcn20_patch_bounding_box +ffffffff821cfa40 T dcn20_validate_bandwidth_fp +ffffffff821cfbe0 t dcn20_validate_bandwidth_internal +ffffffff821cffe0 T dcn20_fpu_set_wm_ranges +ffffffff821d0080 T dcn20_fpu_adjust_dppclk +ffffffff821d0120 T dcn21_populate_dml_pipes_from_context +ffffffff821d0230 T dcn21_validate_bandwidth_fp +ffffffff821d0cc0 T dcn21_update_bw_bounding_box +ffffffff821d10d0 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff821d1130 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff821d1430 t calculate_wm_set_for_vlevel +ffffffff821d2000 T dml20_recalculate +ffffffff821d2740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821d7be0 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff821df040 t TruncToValidBPP +ffffffff821df220 t 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calculate_ttu_cursor +ffffffff821f6000 T dml20v2_rq_dlg_get_rq_reg +ffffffff821f6490 t dml20v2_rq_dlg_get_rq_params +ffffffff821f6660 T dml20v2_rq_dlg_get_dlg_reg +ffffffff821f8560 t get_surf_rq_param +ffffffff821f8dc0 t calculate_ttu_cursor +ffffffff821fa000 T dml21_recalculate +ffffffff821fa710 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821ffed0 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff82206380 t TruncToValidBPP +ffffffff82206910 t CalculateDCFCLKDeepSleep +ffffffff82206c50 t CalculateVMAndRowBytes +ffffffff822074b0 t CalculatePrefetchSourceLines +ffffffff82207680 t CalculateWriteBackDelay +ffffffff82207950 t CalculatePrefetchSchedulePerPlane +ffffffff82208190 t CalculateUrgentBurstFactor +ffffffff822085a0 t CalculateFlipSchedule +ffffffff82208a80 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82209a70 t CalculatePrefetchSchedule +ffffffff8220c000 T dml21_rq_dlg_get_rq_reg +ffffffff8220c490 t dml_rq_dlg_get_rq_params +ffffffff8220c660 T dml21_rq_dlg_get_dlg_reg +ffffffff8220e930 t get_surf_rq_param +ffffffff8220f250 t calculate_ttu_cursor +ffffffff82210000 T optc3_fpu_set_vrr_m_const +ffffffff822104a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff822107b0 T dcn30_fpu_set_mcif_arb_params +ffffffff82210920 T dcn30_fpu_update_soc_for_wm_a +ffffffff822109f0 T dcn30_fpu_calculate_wm_and_dlg +ffffffff82211480 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff82211670 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff822116d0 T dcn30_fpu_update_max_clk +ffffffff82211780 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff82211880 T dcn30_fpu_update_bw_bounding_box +ffffffff82211a60 T dcn3_fpu_build_wm_range_table +ffffffff82211d40 T patch_dcn30_soc_bounding_box +ffffffff82212000 T dml30_recalculate +ffffffff822125f0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff822190b0 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff82219320 T dml30_CalculateWriteBackDISPCLK +ffffffff82219490 t dml_max3 +ffffffff822194f0 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff82221040 t CalculateSwathAndDETConfiguration +ffffffff82221740 t TruncToValidBPP +ffffffff822219a0 t CalculateVMAndRowBytes +ffffffff82222010 t CalculatePrefetchSourceLines +ffffffff822221e0 t CalculateUrgentBurstFactor +ffffffff82222470 t CalculateDCFCLKDeepSleep +ffffffff82222790 t UseMinimumDCFCLK +ffffffff82223ab0 t CalculatePrefetchSchedule +ffffffff82224f50 t CalculateFlipSchedule +ffffffff82225450 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82226190 t CalculateSwathWidth +ffffffff82227000 T dml30_rq_dlg_get_rq_reg +ffffffff822274b0 t dml_rq_dlg_get_rq_params +ffffffff82227740 T dml30_rq_dlg_get_dlg_reg +ffffffff82229e10 t get_surf_rq_param +ffffffff8222a7a0 t calculate_ttu_cursor +ffffffff8222b000 T dcn301_update_bw_bounding_box +ffffffff8222b2e0 T dcn301_fpu_set_wm_ranges +ffffffff8222b380 T dcn301_fpu_init_soc_bounding_box +ffffffff8222b420 T dcn301_calculate_wm_and_dlg_fp +ffffffff8222b750 t calculate_wm_set_for_vlevel +ffffffff8222c000 T dcn302_fpu_update_bw_bounding_box +ffffffff8222c940 T dcn302_fpu_init_soc_bounding_box +ffffffff8222d000 T dcn303_fpu_update_bw_bounding_box +ffffffff8222d9a0 T dcn303_fpu_init_soc_bounding_box +ffffffff8222e000 T dcn31_zero_pipe_dcc_fraction +ffffffff8222e060 T dcn31_update_soc_for_wm_a +ffffffff8222e110 T dcn315_update_soc_for_wm_a +ffffffff8222e1e0 T dcn31_calculate_wm_and_dlg_fp +ffffffff8222e840 T dcn31_update_bw_bounding_box +ffffffff8222ebe0 T dcn315_update_bw_bounding_box +ffffffff8222eed0 T dcn316_update_bw_bounding_box +ffffffff8222f280 T dcn_get_max_non_odm_pix_rate_100hz +ffffffff8222f2e0 T dcn_get_approx_det_segs_required_for_pstate +ffffffff82230000 T dml31_recalculate +ffffffff822302d0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation 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+ffffffff822493f0 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff8224a000 T dml314_recalculate +ffffffff8224a270 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82251050 T dml314_CalculateWriteBackDISPCLK +ffffffff822511c0 t dml_max3 +ffffffff82251220 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff822595a0 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff82259810 t CalculateSwathAndDETConfiguration +ffffffff82259e50 t TruncToValidBPP +ffffffff8225a0a0 t CalculateDCFCLKDeepSleep +ffffffff8225a3c0 t CalculateVMAndRowBytes +ffffffff8225aa00 t CalculatePrefetchSourceLines +ffffffff8225abd0 t CalculateUrgentBurstFactor +ffffffff8225ae60 t CalculateMaxVStartup +ffffffff8225afa0 t UseMinimumDCFCLK +ffffffff8225bf30 t CalculatePrefetchSchedulePerPlane +ffffffff8225c690 t CalculateFlipSchedule +ffffffff8225cc20 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8225d840 t CalculateSwathWidth +ffffffff8225dd50 t CalculatePrefetchSchedule +ffffffff8225f130 t CalculateVupdateAndDynamicMetadataParameters +ffffffff82260000 T dml314_rq_dlg_get_rq_reg +ffffffff822604b0 t dml_rq_dlg_get_rq_params +ffffffff82260740 T dml314_rq_dlg_get_dlg_reg +ffffffff82263100 t get_surf_rq_param +ffffffff82264000 T dcn32_build_wm_range_table_fpu +ffffffff82264390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff82264540 T dcn32_internal_validate_bw +ffffffff822663b0 T dcn32_helper_populate_phantom_dlg_params +ffffffff82266550 T dcn32_predict_pipe_split +ffffffff82266780 T dcn32_set_phantom_stream_timing +ffffffff82266a90 T dcn32_determine_max_vratio_prefetch +ffffffff82266b70 t dcn32_split_stream_for_mpc_or_odm +ffffffff82266f20 T dcn32_calculate_wm_and_dlg_fpu +ffffffff82268650 T dcn32_patch_dpm_table +ffffffff82268860 T dcn32_update_bw_bounding_box_fpu +ffffffff8226aed0 T dcn32_zero_pipe_dcc_fraction +ffffffff8226af30 T dcn32_allow_subvp_with_active_margin +ffffffff8226b000 T dcn32_allow_subvp_high_refresh_rate +ffffffff8226b200 T dcn32_assign_fpo_vactive_candidate +ffffffff8226b2c0 T dcn32_find_vactive_pipe +ffffffff8226b430 T dcn32_set_clock_limits +ffffffff8226b480 T dcn32_override_min_req_memclk +ffffffff8226b540 t subvp_drr_schedulable +ffffffff8226b7d0 t get_optimal_ntuple +ffffffff8226c000 T dml32_recalculate +ffffffff82270320 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff82278000 T dml32_dscceComputeDelay +ffffffff82278140 T dml32_dscComputeDelay +ffffffff82278180 T IsVertical +ffffffff822781b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff822784d0 t dml_max3 +ffffffff82278530 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff82278860 T dml32_CalculateSwathAndDETConfiguration +ffffffff82279090 T dml32_CalculateSwathWidth +ffffffff82279950 T dml32_UnboundedRequest +ffffffff822799c0 T dml32_CalculateDETBufferSize +ffffffff8227a000 T dml32_CalculateODMMode +ffffffff8227a780 T dml32_CalculateRequiredDispclk +ffffffff8227a940 T dml32_RoundToDFSGranularity +ffffffff8227a9d0 T dml32_CalculateOutputLink +ffffffff8227b440 T dml32_TruncToValidBPP +ffffffff8227b770 T dml32_CalculateDPPCLK +ffffffff8227b910 T dml32_RequiredDTBCLK +ffffffff8227bb60 t dml_max4 +ffffffff8227bbe0 T dml32_DSCDelayRequirement +ffffffff8227c0a0 T dml32_CalculateSurfaceSizeInMall +ffffffff8227cbf0 T dml32_CalculateVMRowAndSwath +ffffffff8227da00 T dml32_CalculateVMAndRowBytes +ffffffff8227e650 T dml32_CalculatePrefetchSourceLines +ffffffff8227e8a0 T dml32_CalculateMALLUseForStaticScreen +ffffffff8227e9e0 T dml32_CalculateRowBandwidth +ffffffff8227eb40 T dml32_CalculateUrgentLatency +ffffffff8227ebf0 T dml32_CalculateUrgentBurstFactor +ffffffff8227eea0 T dml32_CalculateDCFCLKDeepSleep +ffffffff8227f1f0 T dml32_CalculateWriteBackDelay +ffffffff8227f350 T dml32_UseMinimumDCFCLK +ffffffff822803c0 T dml32_CalculateExtraLatencyBytes +ffffffff82280580 T dml32_CalculateTWait +ffffffff82280670 T dml32_CalculateVUpdateAndDynamicMetadataParameters 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dml32_CalculateImmediateFlipBandwithSupport +ffffffff82286c30 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff82287000 T dml32_rq_dlg_get_rq_reg +ffffffff822876a0 T dml32_rq_dlg_get_dlg_reg +ffffffff8228a000 T dcn321_update_bw_bounding_box_fpu +ffffffff8228c760 t get_optimal_ntuple +ffffffff8228d000 T dml_init_instance +ffffffff8228d310 T dml_get_status_message +ffffffff8228d350 T dml_log_pipe_params +ffffffff8228d380 T dml_log_mode_support_params +ffffffff8228e000 T dml_get_voltage_level +ffffffff8228e240 t fetch_socbb_params +ffffffff8228e730 t fetch_ip_params +ffffffff8228ebd0 t fetch_pipe_params +ffffffff8228fc50 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff8228fcd0 T get_clk_dcf_deepsleep +ffffffff8228fde0 T get_wm_urgent +ffffffff8228fef0 T get_wm_memory_trip +ffffffff82290000 T get_wm_writeback_urgent +ffffffff82290110 T get_wm_stutter_exit +ffffffff82290220 T get_wm_stutter_enter_exit +ffffffff82290330 T get_wm_z8_stutter_exit +ffffffff82290440 T get_wm_z8_stutter_enter_exit +ffffffff82290550 T get_stutter_efficiency_z8 +ffffffff82290660 T get_stutter_num_bursts_z8 +ffffffff82290770 T get_wm_dram_clock_change +ffffffff82290880 T get_wm_writeback_dram_clock_change +ffffffff82290990 T get_stutter_efficiency +ffffffff82290aa0 T get_stutter_efficiency_no_vblank +ffffffff82290bb0 T get_stutter_period +ffffffff82290cc0 T get_urgent_latency +ffffffff82290dd0 T get_urgent_extra_latency +ffffffff82290ee0 T get_nonurgent_latency +ffffffff82290ff0 T get_dram_clock_change_latency +ffffffff82291100 T get_dispclk_calculated +ffffffff82291210 T get_total_data_read_bw +ffffffff82291320 T get_return_bw +ffffffff82291430 T get_tcalc +ffffffff82291540 T get_fraction_of_urgent_bandwidth +ffffffff82291650 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff82291760 T get_cstate_max_cap_mode +ffffffff82291880 T get_comp_buffer_size_kbytes +ffffffff82291990 T get_pixel_chunk_size_in_kbyte +ffffffff82291ab0 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff82291bd0 T get_meta_chunk_size_in_kbyte +ffffffff82291cf0 T get_min_pixel_chunk_size_in_byte +ffffffff82291e00 T get_min_meta_chunk_size_in_byte +ffffffff82291f20 T get_fclk_watermark +ffffffff82292030 T get_usr_retraining_watermark +ffffffff82292140 T get_comp_buffer_reserved_space_kbytes +ffffffff82292260 T get_comp_buffer_reserved_space_64bytes +ffffffff82292380 T get_comp_buffer_reserved_space_zs +ffffffff822924a0 T get_unbounded_request_enabled +ffffffff822925c0 T get_dsc_delay +ffffffff822926f0 T get_dppclk_calculated +ffffffff82292810 T get_dscclk_calculated +ffffffff82292930 T get_min_ttu_vblank +ffffffff82292a50 T get_min_ttu_vblank_in_us +ffffffff82292b70 T get_vratio_prefetch_l +ffffffff82292c90 T get_vratio_prefetch_c +ffffffff82292db0 T get_dst_x_after_scaler +ffffffff82292ed0 T get_dst_y_after_scaler +ffffffff82292ff0 T get_dst_y_per_vm_vblank +ffffffff82293110 T get_dst_y_per_row_vblank +ffffffff82293230 T get_dst_y_prefetch +ffffffff82293350 T get_dst_y_per_vm_flip +ffffffff82293470 T get_dst_y_per_row_flip +ffffffff82293590 T get_refcyc_per_vm_group_vblank +ffffffff822936b0 T get_refcyc_per_vm_group_flip +ffffffff822937d0 T get_refcyc_per_vm_req_vblank +ffffffff822938f0 T get_refcyc_per_vm_req_flip +ffffffff82293a10 T get_refcyc_per_vm_group_vblank_in_us +ffffffff82293b30 T get_refcyc_per_vm_group_flip_in_us +ffffffff82293c50 T get_refcyc_per_vm_req_vblank_in_us +ffffffff82293d70 T get_refcyc_per_vm_req_flip_in_us +ffffffff82293e90 T get_refcyc_per_vm_dmdata_in_us +ffffffff82293fb0 T get_dmdata_dl_delta_in_us +ffffffff822940d0 T get_refcyc_per_line_delivery_l_in_us +ffffffff822941f0 T get_refcyc_per_line_delivery_c_in_us +ffffffff82294310 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff82294430 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff82294550 T get_refcyc_per_req_delivery_l_in_us +ffffffff82294670 T get_refcyc_per_req_delivery_c_in_us +ffffffff82294790 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff822948b0 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff822949d0 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff82294af0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff82294c10 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff82294d30 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff82294e50 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff82294f70 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff82295090 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff822951b0 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff822952d0 T get_vstartup +ffffffff82295400 T get_vupdate_offset +ffffffff82295530 T get_vupdate_width +ffffffff82295650 T get_vready_offset +ffffffff82295770 T get_vready_at_or_after_vsync +ffffffff822958a0 T get_min_dst_y_next_start +ffffffff822959d0 T get_dst_y_per_pte_row_nom_l +ffffffff82295af0 T get_dst_y_per_pte_row_nom_c +ffffffff82295c10 T get_dst_y_per_meta_row_nom_l +ffffffff82295d30 T get_dst_y_per_meta_row_nom_c +ffffffff82295e50 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff82295f70 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff82296090 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff822961b0 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff822962d0 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff822963f0 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff82296510 T get_vstartup_calculated +ffffffff82296640 T get_dpte_row_height_linear_c +ffffffff82296770 T get_swath_height_l +ffffffff822968a0 T get_swath_height_c +ffffffff822969d0 T get_det_stored_buffer_size_l_bytes +ffffffff82296b00 T get_det_stored_buffer_size_c_bytes +ffffffff82296c30 T get_dpte_group_size_in_bytes +ffffffff82296d60 T get_vm_group_size_in_bytes +ffffffff82296e90 T get_dpte_row_height_linear_l +ffffffff82296fc0 T get_pte_buffer_mode +ffffffff822970f0 T get_subviewport_lines_needed_in_mall +ffffffff82297220 T get_surface_size_in_mall +ffffffff82297350 T get_total_immediate_flip_bytes +ffffffff82297470 T get_total_immediate_flip_bw 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dscc_compute_dsc_parameters +ffffffff822a4000 T dal_hw_factory_dce110_init ffffffff822a4060 t define_hpd_registers ffffffff822a40b0 t define_ddc_registers -ffffffff822a5000 T dal_hw_translate_dce80_init +ffffffff822a5000 T dal_hw_translate_dce110_init ffffffff822a5030 t offset_to_id -ffffffff822a57b0 t id_to_offset -ffffffff822a6000 T dal_hw_factory_dcn10_init +ffffffff822a5390 t id_to_offset +ffffffff822a6000 T dal_hw_factory_dce120_init ffffffff822a6060 t define_hpd_registers ffffffff822a60b0 t define_ddc_registers -ffffffff822a6150 t define_generic_registers -ffffffff822a7000 T dal_hw_translate_dcn10_init +ffffffff822a7000 T dal_hw_translate_dce120_init ffffffff822a7030 t offset_to_id -ffffffff822a7390 t id_to_offset -ffffffff822a8000 T dal_hw_factory_dcn20_init +ffffffff822a73a0 t id_to_offset +ffffffff822a8000 T dal_hw_factory_dce80_init ffffffff822a8060 t define_hpd_registers ffffffff822a80b0 t define_ddc_registers -ffffffff822a8160 t define_generic_registers -ffffffff822a9000 T dal_hw_translate_dcn20_init +ffffffff822a9000 T dal_hw_translate_dce80_init ffffffff822a9030 t offset_to_id -ffffffff822a92b0 t id_to_offset -ffffffff822aa000 T dal_hw_factory_dcn21_init +ffffffff822a97b0 t id_to_offset +ffffffff822aa000 T dal_hw_factory_dcn10_init ffffffff822aa060 t define_hpd_registers ffffffff822aa0b0 t define_ddc_registers -ffffffff822aa160 t define_generic_registers -ffffffff822ab000 T dal_hw_translate_dcn21_init +ffffffff822aa150 t define_generic_registers +ffffffff822ab000 T dal_hw_translate_dcn10_init ffffffff822ab030 t offset_to_id -ffffffff822ab2b0 t id_to_offset -ffffffff822ac000 T dal_hw_factory_dcn30_init +ffffffff822ab390 t id_to_offset +ffffffff822ac000 T dal_hw_factory_dcn20_init ffffffff822ac060 t define_hpd_registers ffffffff822ac0b0 t define_ddc_registers ffffffff822ac160 t define_generic_registers -ffffffff822ad000 T dal_hw_translate_dcn30_init +ffffffff822ad000 T dal_hw_translate_dcn20_init ffffffff822ad030 t offset_to_id -ffffffff822ad2c0 t id_to_offset -ffffffff822ae000 T dal_hw_factory_dcn315_init +ffffffff822ad2b0 t id_to_offset +ffffffff822ae000 T dal_hw_factory_dcn21_init ffffffff822ae060 t define_hpd_registers ffffffff822ae0b0 t define_ddc_registers ffffffff822ae160 t define_generic_registers -ffffffff822af000 T dal_hw_translate_dcn315_init +ffffffff822af000 T dal_hw_translate_dcn21_init ffffffff822af030 t offset_to_id ffffffff822af2b0 t id_to_offset -ffffffff822b0000 T dal_hw_factory_dcn32_init +ffffffff822b0000 T dal_hw_factory_dcn30_init ffffffff822b0060 t define_hpd_registers ffffffff822b00b0 t define_ddc_registers ffffffff822b0160 t define_generic_registers -ffffffff822b1000 T dal_hw_translate_dcn32_init +ffffffff822b1000 T dal_hw_translate_dcn30_init ffffffff822b1030 t offset_to_id -ffffffff822b1290 t id_to_offset -ffffffff822b2000 T dal_gpio_open -ffffffff822b20c0 T dal_gpio_open_ex -ffffffff822b2180 T dal_gpio_get_value -ffffffff822b2200 T dal_gpio_set_value -ffffffff822b2280 T dal_gpio_get_mode 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dal_gpio_service_lock -ffffffff822b3720 T dal_gpio_service_unlock -ffffffff822b37a0 T dal_gpio_service_open -ffffffff822b39e0 T dal_gpio_service_close -ffffffff822b3a80 T dal_irq_get_source -ffffffff822b3af0 T dal_irq_get_rx_source -ffffffff822b3b40 T dal_irq_setup_hpd_filter -ffffffff822b3ba0 T dal_gpio_destroy_irq -ffffffff822b3c30 T dal_gpio_create_ddc -ffffffff822b3da0 T dal_gpio_destroy_ddc -ffffffff822b3e70 T dal_ddc_close -ffffffff822b3ec0 T dal_ddc_open -ffffffff822b4020 T dal_ddc_change_mode -ffffffff822b40c0 T dal_ddc_get_line -ffffffff822b40e0 T dal_ddc_set_config -ffffffff822b5000 T dal_hw_ddc_init -ffffffff822b5100 T dal_hw_ddc_get_pin -ffffffff822b5110 t dal_hw_ddc_destroy -ffffffff822b5170 t set_config -ffffffff822b6000 T dal_hw_factory_init -ffffffff822b7000 T dal_hw_generic_init -ffffffff822b7100 T dal_hw_generic_get_pin -ffffffff822b7110 t dal_hw_generic_destroy -ffffffff822b7170 t set_config -ffffffff822b8000 T dal_hw_gpio_open -ffffffff822b80b0 T dal_hw_gpio_config_mode -ffffffff822b81a0 T dal_hw_gpio_get_value -ffffffff822b8200 T dal_hw_gpio_set_value -ffffffff822b8290 T dal_hw_gpio_change_mode -ffffffff822b82a0 T dal_hw_gpio_close -ffffffff822b8350 T dal_hw_gpio_construct -ffffffff822b83b0 T dal_hw_gpio_destruct -ffffffff822b9000 T dal_hw_hpd_init -ffffffff822b9100 T dal_hw_hpd_get_pin -ffffffff822b9110 t dal_hw_hpd_destroy -ffffffff822b9170 t get_value -ffffffff822b9210 t set_config -ffffffff822ba000 T dal_hw_translate_init -ffffffff822bb000 T dc_process_hdcp_msg -ffffffff822bb180 t hdmi_14_process_transaction -ffffffff822bb2d0 t dp_11_process_transaction -ffffffff822bc000 T dal_irq_service_dummy_set -ffffffff822bc050 T dal_irq_service_dummy_ack -ffffffff822bc0a0 T dce110_vblank_set -ffffffff822bc170 T to_dal_irq_source_dce110 -ffffffff822bc2f0 T dal_irq_service_dce110_create -ffffffff822bc370 t hpd_ack -ffffffff822bd000 T dal_irq_service_dce120_create -ffffffff822bd080 t hpd_ack -ffffffff822be000 T dal_irq_service_dce80_create -ffffffff822be080 t hpd_ack -ffffffff822bf000 T dal_irq_service_dcn10_create -ffffffff822bf080 t hpd_ack -ffffffff822bf130 t to_dal_irq_source_dcn10 -ffffffff822c0000 T dal_irq_service_dcn20_create -ffffffff822c0080 t hpd_ack -ffffffff822c0130 t to_dal_irq_source_dcn20 -ffffffff822c1000 T dal_irq_service_dcn201_create +ffffffff822b12c0 t id_to_offset +ffffffff822b2000 T dal_hw_factory_dcn315_init +ffffffff822b2060 t define_hpd_registers +ffffffff822b20b0 t define_ddc_registers +ffffffff822b2160 t define_generic_registers +ffffffff822b3000 T dal_hw_translate_dcn315_init +ffffffff822b3030 t offset_to_id +ffffffff822b32b0 t id_to_offset +ffffffff822b4000 T dal_hw_factory_dcn32_init +ffffffff822b4060 t define_hpd_registers +ffffffff822b40b0 t define_ddc_registers +ffffffff822b4160 t define_generic_registers +ffffffff822b5000 T dal_hw_translate_dcn32_init +ffffffff822b5030 t offset_to_id +ffffffff822b5290 t id_to_offset +ffffffff822b6000 T dal_gpio_open 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dal_gpio_get_generic_pin_info +ffffffff822b7510 T dal_gpio_service_destroy +ffffffff822b7640 T dal_mux_setup_config +ffffffff822b76a0 T dal_gpio_service_lock +ffffffff822b7720 T dal_gpio_service_unlock +ffffffff822b77a0 T dal_gpio_service_open +ffffffff822b79e0 T dal_gpio_service_close +ffffffff822b7a80 T dal_irq_get_source +ffffffff822b7af0 T dal_irq_get_rx_source +ffffffff822b7b40 T dal_irq_setup_hpd_filter +ffffffff822b7ba0 T dal_gpio_destroy_irq +ffffffff822b7c30 T dal_gpio_create_ddc +ffffffff822b7da0 T dal_gpio_destroy_ddc +ffffffff822b7e70 T dal_ddc_close +ffffffff822b7ec0 T dal_ddc_open +ffffffff822b8020 T dal_ddc_change_mode +ffffffff822b80c0 T dal_ddc_get_line +ffffffff822b80e0 T dal_ddc_set_config +ffffffff822b9000 T dal_hw_ddc_init +ffffffff822b9100 T dal_hw_ddc_get_pin +ffffffff822b9110 t dal_hw_ddc_destroy +ffffffff822b9170 t set_config +ffffffff822ba000 T dal_hw_factory_init +ffffffff822bb000 T dal_hw_generic_init +ffffffff822bb100 T dal_hw_generic_get_pin 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T get_dio_link_hwss -ffffffff822d0000 T dp_dio_fixed_vs_pe_retimer_lane_cfg_to_hw_cfg -ffffffff822d0040 T dp_dio_fixed_vs_pe_retimer_exit_manual_automation -ffffffff822d0280 T enable_dio_fixed_vs_pe_retimer_program_4lane_output -ffffffff822d03b0 T requires_fixed_vs_pe_retimer_dio_link_hwss -ffffffff822d03f0 T get_dio_fixed_vs_pe_retimer_link_hwss -ffffffff822d0420 t enable_dio_fixed_vs_pe_retimer_dp_link_output -ffffffff822d0590 t set_dio_fixed_vs_pe_retimer_dp_link_test_pattern -ffffffff822d1000 T can_use_dpia_link_hwss -ffffffff822d1050 T get_dpia_link_hwss -ffffffff822d1080 t update_dpia_stream_allocation_table -ffffffff822d2000 T set_hpo_dp_throttled_vcp_size -ffffffff822d2030 T set_hpo_dp_hblank_min_symbol_width -ffffffff822d2120 T setup_hpo_dp_stream_encoder -ffffffff822d2170 T reset_hpo_dp_stream_encoder -ffffffff822d2190 T setup_hpo_dp_stream_attribute -ffffffff822d2210 T enable_hpo_dp_link_output -ffffffff822d2290 T disable_hpo_dp_link_output -ffffffff822d2330 T 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sdmmc_intr_disable -ffffffff826122f0 T sdmmc_intr_establish -ffffffff826123f0 T sdmmc_intr_disestablish -ffffffff826124e0 T sdmmc_card_intr -ffffffff82612530 T sdmmc_intr_task -ffffffff826125c0 T sdmmc_io_set_blocklen -ffffffff82613000 T sdmmc_mem_enable -ffffffff82613450 T sdmmc_mem_send_op_cond -ffffffff82613600 T sdmmc_mem_signal_voltage -ffffffff826136c0 T sdmmc_mem_scan -ffffffff826139d0 T sdmmc_decode_csd -ffffffff82613e00 T sdmmc_decode_cid -ffffffff826142a0 T sdmmc_mem_send_scr -ffffffff826143e0 T sdmmc_mem_decode_scr -ffffffff82614440 T sdmmc_mem_send_cxd_data -ffffffff826145b0 T sdmmc_mem_set_bus_width -ffffffff826146c0 T sdmmc_mem_sd_switch -ffffffff82614970 T sdmmc_be512_to_bitfield512 -ffffffff82614a20 T sdmmc_mem_mmc_switch -ffffffff82614b10 T sdmmc_mem_init -ffffffff82614c60 T sdmmc_mem_set_blocklen -ffffffff82614d60 T sdmmc_mem_sd_init -ffffffff82615140 T sdmmc_mem_mmc_init -ffffffff82615800 T sdmmc_mem_select_transfer_mode -ffffffff82615880 T sdmmc_mem_execute_tuning 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bwfm_sdio_buscore_read -ffffffff826186b0 T bwfm_sdio_buscore_write -ffffffff826186d0 T bwfm_sdio_buscore_prepare -ffffffff82618810 T bwfm_sdio_buscore_activate -ffffffff82618890 T bwfm_sdio_match -ffffffff82618940 T bwfm_sdio_attach -ffffffff82618c00 T bwfm_sdio_detach -ffffffff82618c60 T bwfm_sdio_task -ffffffff82618dc0 T bwfm_sdio_write_1 -ffffffff82618df0 T bwfm_sdio_read_1 -ffffffff82618e20 T bwfm_sdio_write_4 -ffffffff82618ed0 T bwfm_sdio_read_4 -ffffffff82618f80 T bwfm_sdio_load_microcode -ffffffff826191e0 T bwfm_sdio_clkctl -ffffffff82619310 T bwfm_sdio_dev_write -ffffffff82619360 T bwfm_sdio_intr -ffffffff826193a0 T bwfm_sdio_ram_read_write -ffffffff826195d0 T bwfm_sdio_htclk -ffffffff82619840 T bwfm_sdio_readshared -ffffffff82619910 T bwfm_sdio_dev_read -ffffffff82619950 T bwfm_sdio_rx_frames -ffffffff82619d00 T bwfm_sdio_tx_frames -ffffffff82619e00 T bwfm_sdio_backplane -ffffffff82619eb0 T bwfm_sdio_buf_read -ffffffff82619f90 T bwfm_sdio_buf_write -ffffffff8261a040 T bwfm_sdio_frame_read_write -ffffffff8261a1c0 T bwfm_sdio_newbuf -ffffffff8261a240 T bwfm_sdio_tx_ok -ffffffff8261a2a0 T bwfm_sdio_tx_ctrlframe -ffffffff8261a3a0 T bwfm_sdio_tx_dataframe -ffffffff8261a4f0 T bwfm_sdio_rx_glom -ffffffff8261b000 T onewire_match -ffffffff8261b050 T onewire_attach -ffffffff8261b0f0 T onewire_detach -ffffffff8261b160 T onewire_activate -ffffffff8261b180 T onewire_scan -ffffffff8261b3a0 T onewire_createthread -ffffffff8261b410 T onewire_print -ffffffff8261b4e0 T onewirebus_print -ffffffff8261b530 T onewire_lock -ffffffff8261b550 T onewire_unlock -ffffffff8261b570 T onewire_reset -ffffffff8261b590 T onewire_bit -ffffffff8261b5b0 T onewire_read_byte -ffffffff8261b6f0 T onewire_write_byte -ffffffff8261b7d0 T onewire_read_block -ffffffff8261b870 T onewire_write_block -ffffffff8261b910 T onewire_triplet -ffffffff8261b9f0 T onewire_matchrom -ffffffff8261bb40 T onewire_search -ffffffff8261bee0 T onewire_thread -ffffffff8261c000 T onewire_crc -ffffffff8261c0b0 T onewire_crc16 -ffffffff8261c170 T onewire_famname -ffffffff8261c1b0 T onewire_matchbyfam -ffffffff8261d000 T owid_match -ffffffff8261d030 T owid_attach -ffffffff8261d100 T owid_detach -ffffffff8261d140 T owid_activate -ffffffff8261e000 T owsbm_match -ffffffff8261e030 T owsbm_attach -ffffffff8261e1d0 T owsbm_detach -ffffffff8261e240 T owsbm_activate -ffffffff8261e270 T owsbm_update -ffffffff8261f000 T owtemp_match -ffffffff8261f030 T owtemp_attach -ffffffff8261f130 T owtemp_detach -ffffffff8261f1a0 T owtemp_activate -ffffffff8261f1d0 T owtemp_update -ffffffff82620000 T owctr_match -ffffffff82620030 T owctr_attach -ffffffff82620180 T owctr_detach -ffffffff826201f0 T owctr_activate -ffffffff82620220 T owctr_update -ffffffff82620250 T owctr_update_counter -ffffffff82621000 A __text_page_start -ffffffff82621000 T Xsyscall_meltdown -ffffffff8262100c T Xsyscall -ffffffff82621299 t Xsyscall_trampback -ffffffff826212b0 T intr_user_exit -ffffffff826212f2 t intr_user_exit_post_ast -ffffffff8262144b t Xiretq_trampback -ffffffff82621457 T doreti_iret -ffffffff82622000 T alltraps -ffffffff82622138 T recall_trap -ffffffff82622150 T alltraps_kern -ffffffff82622153 T alltraps_kern_meltdown -ffffffff82623000 ? Xtrap00 -ffffffff82623000 A __kutext_start -ffffffff82623000 A __text_page_end -ffffffff82623010 ? Xtrap01 -ffffffff82623020 ? Xtrap02 -ffffffff82623028 c calltrap_specstk -ffffffff826230f0 ? calltrap_specstk_tramp -ffffffff82623110 ? Xtrap03 -ffffffff82623120 ? Xtrap04 -ffffffff82623130 ? Xtrap05 -ffffffff82623140 ? Xtrap06 -ffffffff82623150 ? Xtrap07 -ffffffff82623160 ? Xtrap08 -ffffffff82623170 ? Xtrap09 -ffffffff82623180 ? Xtrap0a -ffffffff82623190 ? Xtrap0b -ffffffff826231a0 ? Xtrap0c -ffffffff826231b0 ? Xtrap0d -ffffffff82623240 ? Xtrap0e -ffffffff82623250 ? Xintrspurious -ffffffff82623250 ? Xtrap0f -ffffffff82623260 ? Xtrap10 -ffffffff82623270 ? Xtrap11 -ffffffff82623280 ? Xtrap12 -ffffffff82623290 ? Xtrap13 -ffffffff826232a0 ? Xtrap14 -ffffffff826232b0 ? Xtrap15 -ffffffff826232c0 ? Xtrap16 -ffffffff826232c0 ? Xtrap17 -ffffffff826232c0 ? Xtrap18 -ffffffff826232c0 ? Xtrap19 -ffffffff826232c0 ? Xtrap1a -ffffffff826232c0 ? Xtrap1b -ffffffff826232c0 ? Xtrap1c -ffffffff826232c0 ? Xtrap1d -ffffffff826232c0 ? Xtrap1e -ffffffff826232c0 ? Xtrap1f -ffffffff826232d0 ? x2apic_eoi -ffffffff826232f0 ? Xintr_lapic_ipi -ffffffff82623330 ? Xipi_invltlb -ffffffff82623360 ? Xipi_invlpg -ffffffff82623390 ? Xipi_invlrange -ffffffff826233d0 ? Xipi_invltlb_pcid -ffffffff82623410 ? Xipi_invlpg_pcid -ffffffff82623460 ? Xipi_invlrange_pcid -ffffffff826234d0 ? Xintr_lapic_ltimer -ffffffff82623510 ? Xintr_xen_upcall -ffffffff82623550 ? Xintr_hyperv_upcall -ffffffff82623590 ? Xintr_legacy0 -ffffffff826235d0 ? Xintr_legacy1 -ffffffff82623610 ? Xintr_legacy2 -ffffffff82623650 ? Xintr_legacy3 -ffffffff82623690 ? Xintr_legacy4 -ffffffff826236d0 ? Xintr_legacy5 -ffffffff82623710 ? Xintr_legacy6 -ffffffff82623750 ? Xintr_legacy7 -ffffffff82623790 ? Xintr_legacy8 -ffffffff826237d0 ? Xintr_legacy9 -ffffffff82623810 ? Xintr_legacy10 -ffffffff82623850 ? Xintr_legacy11 -ffffffff82623890 ? Xintr_legacy12 -ffffffff826238d0 ? Xintr_legacy13 -ffffffff82623910 ? Xintr_legacy14 -ffffffff82623950 ? Xintr_legacy15 -ffffffff82623990 ? Xintr_ioapic_edge0 -ffffffff826239d0 ? Xintr_ioapic_edge1 -ffffffff82623a10 ? Xintr_ioapic_edge2 -ffffffff82623a50 ? Xintr_ioapic_edge3 -ffffffff82623a90 ? Xintr_ioapic_edge4 -ffffffff82623ad0 ? Xintr_ioapic_edge5 -ffffffff82623b10 ? Xintr_ioapic_edge6 -ffffffff82623b50 ? Xintr_ioapic_edge7 -ffffffff82623b90 ? Xintr_ioapic_edge8 -ffffffff82623bd0 ? Xintr_ioapic_edge9 -ffffffff82623c10 ? Xintr_ioapic_edge10 -ffffffff82623c50 ? Xintr_ioapic_edge11 -ffffffff82623c90 ? Xintr_ioapic_edge12 -ffffffff82623cd0 ? Xintr_ioapic_edge13 -ffffffff82623d10 ? Xintr_ioapic_edge14 -ffffffff82623d50 ? Xintr_ioapic_edge15 -ffffffff82623d90 ? Xintr_ioapic_edge16 -ffffffff82623dd0 ? Xintr_ioapic_edge17 -ffffffff82623e10 ? Xintr_ioapic_edge18 -ffffffff82623e50 ? Xintr_ioapic_edge19 -ffffffff82623e90 ? Xintr_ioapic_edge20 -ffffffff82623ed0 ? Xintr_ioapic_edge21 -ffffffff82623f10 ? Xintr_ioapic_edge22 -ffffffff82623f50 ? Xintr_ioapic_edge23 -ffffffff82623f90 ? Xintr_ioapic_edge24 -ffffffff82623fd0 ? Xintr_ioapic_edge25 -ffffffff82624010 ? Xintr_ioapic_edge26 -ffffffff82624050 ? Xintr_ioapic_edge27 -ffffffff82624090 ? Xintr_ioapic_edge28 -ffffffff826240d0 ? Xintr_ioapic_edge29 -ffffffff82624110 ? Xintr_ioapic_edge30 -ffffffff82624150 ? Xintr_ioapic_edge31 -ffffffff82624190 ? Xintr_ioapic_edge32 -ffffffff826241d0 ? Xintr_ioapic_edge33 -ffffffff82624210 ? Xintr_ioapic_edge34 -ffffffff82624250 ? Xintr_ioapic_edge35 -ffffffff82624290 ? Xintr_ioapic_edge36 -ffffffff826242d0 ? Xintr_ioapic_edge37 -ffffffff82624310 ? Xintr_ioapic_edge38 -ffffffff82624350 ? Xintr_ioapic_edge39 -ffffffff82624390 ? Xintr_ioapic_edge40 -ffffffff826243d0 ? Xintr_ioapic_edge41 -ffffffff82624410 ? Xintr_ioapic_edge42 -ffffffff82624450 ? Xintr_ioapic_edge43 -ffffffff82624490 ? Xintr_ioapic_edge44 -ffffffff826244d0 ? Xintr_ioapic_edge45 -ffffffff82624510 ? Xintr_ioapic_edge46 -ffffffff82624550 ? Xintr_ioapic_edge47 -ffffffff82624590 ? Xintr_ioapic_edge48 -ffffffff826245d0 ? Xintr_ioapic_edge49 -ffffffff82624610 ? Xintr_ioapic_edge50 -ffffffff82624650 ? Xintr_ioapic_edge51 -ffffffff82624690 ? Xintr_ioapic_edge52 -ffffffff826246d0 ? Xintr_ioapic_edge53 -ffffffff82624710 ? Xintr_ioapic_edge54 -ffffffff82624750 ? Xintr_ioapic_edge55 -ffffffff82624790 ? Xintr_ioapic_edge56 -ffffffff826247d0 ? Xintr_ioapic_edge57 -ffffffff82624810 ? Xintr_ioapic_edge58 -ffffffff82624850 ? Xintr_ioapic_edge59 -ffffffff82624890 ? Xintr_ioapic_edge60 -ffffffff826248d0 ? Xintr_ioapic_edge61 -ffffffff82624910 ? Xintr_ioapic_edge62 -ffffffff82624950 ? Xintr_ioapic_edge63 -ffffffff82624990 ? Xintr_ioapic_level0 -ffffffff826249d0 ? Xintr_ioapic_level1 -ffffffff82624a10 ? Xintr_ioapic_level2 -ffffffff82624a50 ? Xintr_ioapic_level3 -ffffffff82624a90 ? Xintr_ioapic_level4 -ffffffff82624ad0 ? Xintr_ioapic_level5 -ffffffff82624b10 ? Xintr_ioapic_level6 -ffffffff82624b50 ? Xintr_ioapic_level7 -ffffffff82624b90 ? Xintr_ioapic_level8 -ffffffff82624bd0 ? Xintr_ioapic_level9 -ffffffff82624c10 ? Xintr_ioapic_level10 -ffffffff82624c50 ? Xintr_ioapic_level11 -ffffffff82624c90 ? Xintr_ioapic_level12 -ffffffff82624cd0 ? Xintr_ioapic_level13 -ffffffff82624d10 ? Xintr_ioapic_level14 -ffffffff82624d50 ? Xintr_ioapic_level15 -ffffffff82624d90 ? Xintr_ioapic_level16 -ffffffff82624dd0 ? Xintr_ioapic_level17 -ffffffff82624e10 ? Xintr_ioapic_level18 -ffffffff82624e50 ? Xintr_ioapic_level19 -ffffffff82624e90 ? Xintr_ioapic_level20 -ffffffff82624ed0 ? Xintr_ioapic_level21 -ffffffff82624f10 ? Xintr_ioapic_level22 -ffffffff82624f50 ? Xintr_ioapic_level23 -ffffffff82624f90 ? Xintr_ioapic_level24 -ffffffff82624fd0 ? Xintr_ioapic_level25 -ffffffff82625010 ? Xintr_ioapic_level26 -ffffffff82625050 ? Xintr_ioapic_level27 -ffffffff82625090 ? Xintr_ioapic_level28 -ffffffff826250d0 ? Xintr_ioapic_level29 -ffffffff82625110 ? Xintr_ioapic_level30 -ffffffff82625150 ? Xintr_ioapic_level31 -ffffffff82625190 ? Xintr_ioapic_level32 -ffffffff826251d0 ? Xintr_ioapic_level33 -ffffffff82625210 ? Xintr_ioapic_level34 -ffffffff82625250 ? Xintr_ioapic_level35 -ffffffff82625290 ? Xintr_ioapic_level36 -ffffffff826252d0 ? Xintr_ioapic_level37 -ffffffff82625310 ? Xintr_ioapic_level38 -ffffffff82625350 ? Xintr_ioapic_level39 -ffffffff82625390 ? Xintr_ioapic_level40 -ffffffff826253d0 ? Xintr_ioapic_level41 -ffffffff82625410 ? Xintr_ioapic_level42 -ffffffff82625450 ? Xintr_ioapic_level43 -ffffffff82625490 ? Xintr_ioapic_level44 -ffffffff826254d0 ? Xintr_ioapic_level45 -ffffffff82625510 ? Xintr_ioapic_level46 -ffffffff82625550 ? Xintr_ioapic_level47 -ffffffff82625590 ? Xintr_ioapic_level48 -ffffffff826255d0 ? Xintr_ioapic_level49 -ffffffff82625610 ? Xintr_ioapic_level50 -ffffffff82625650 ? Xintr_ioapic_level51 -ffffffff82625690 ? Xintr_ioapic_level52 -ffffffff826256d0 ? Xintr_ioapic_level53 -ffffffff82625710 ? Xintr_ioapic_level54 -ffffffff82625750 ? Xintr_ioapic_level55 -ffffffff82625790 ? Xintr_ioapic_level56 -ffffffff826257d0 ? Xintr_ioapic_level57 -ffffffff82625810 ? Xintr_ioapic_level58 -ffffffff82625850 ? Xintr_ioapic_level59 -ffffffff82625890 ? Xintr_ioapic_level60 -ffffffff826258d0 ? Xintr_ioapic_level61 -ffffffff82625910 ? Xintr_ioapic_level62 -ffffffff82625950 ? Xintr_ioapic_level63 -ffffffff82626000 ? codepatch_fill_nop -ffffffff82626000 A __cptext_start -ffffffff82626000 A __kutext_end -ffffffff826260b0 ? codepatch_maprw -ffffffff82626190 ? codepatch_unmaprw -ffffffff82626200 ? codepatch_nop -ffffffff82626360 ? codepatch_replace -ffffffff82626510 ? codepatch_call -ffffffff82626530 ? codepatch_control_flow -ffffffff82626740 ? codepatch_jmp -ffffffff82627000 A __cptext_end -ffffffff82627000 A __rodata_start -ffffffff82627000 C _etext -ffffffff82627000 C etext -ffffffff82628000 r seeprom_read -ffffffff82628004 r icl_mg_pll_find_divisors.div1_vals -ffffffff82628034 r athn_ac2qid -ffffffff82628034 r athn_ac2qid -ffffffff82628034 r athn_ac2qid -ffffffff82628040 r rtwn_get_rssi.cckoff -ffffffff82628068 r rsu_ac2qid -ffffffff82628078 r pckbc_portcmd -ffffffff8262807c r tht_fifo_write_pad.pad -ffffffff82628084 r rsu_get_rssi.cckoff -ffffffff826280a4 r adlp_n_revids -ffffffff826280e8 r apple_iso_trans -ffffffff826280f0 r wihap_check_tx.txratetable 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vga_50lscreen_mono -ffffffff8273b1c8 R vga_50lscreen_bf -ffffffff8273b1f8 R vga_screenlist -ffffffff8273b208 R vga_screenlist_mono -ffffffff8273b218 R vga_accessops -ffffffff8273b278 r i945_wm_info -ffffffff8273b2b8 r bgansitopc -ffffffff8273b2c0 r pctoansi -ffffffff8273b300 r sdma_offsets -ffffffff8273b300 r sdma_offsets -ffffffff8273b338 r iha_rate_tbl -ffffffff8273b370 r i830_a_wm_info -ffffffff8273b3a8 r gen9_edram_size_mb.ways -ffffffff8273b408 r aggr_periodic_times -ffffffff8273b500 r michael_final.pad -ffffffff8273b528 r rt_copysa.maskarray -ffffffff8273b530 r i915_wm_info -ffffffff8273b538 r amdgpu_ih_clientid_jpeg -ffffffff8273b538 r amdgpu_ih_clientid_uvds -ffffffff8273b538 r amdgpu_ih_clientid_vcns -ffffffff8273b538 r amdgpu_ih_clientid_vcns -ffffffff8273b538 r amdgpu_ih_clientid_vcns -ffffffff8273b568 r jsl_ehl_revids -ffffffff8273b578 r vga_setfontset.cmaptabb -ffffffff8273b5e8 r i830_bc_wm_info -ffffffff8273b650 r hsw_activate_psr2.map -ffffffff8273b658 r tgl_revids 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ciss_switch -ffffffff82749030 R ciss_level -ffffffff82749050 R ciss_stat -ffffffff8274a000 R ami_switch -ffffffff8274a028 R ami_raw_switch -ffffffff8274b000 R mfi_switch -ffffffff8274b028 R mfi_pd_switch -ffffffff8274b050 r mfi_iop_xscale -ffffffff8274b080 r mfi_iop_ppc -ffffffff8274b0b0 r mfi_iop_gen2 -ffffffff8274b0e0 r mfi_iop_skinny -ffffffff8274b110 r mfi_bbu_indicators -ffffffff8274c000 R qlw_switch -ffffffff8274d000 R isp_2100_risc_code -ffffffff8275fbf0 R isp_2200_risc_code -ffffffff82772990 R isp_2300_risc_code -ffffffff8278c408 R qla_switch -ffffffff8278c430 r qla_regs_2100 -ffffffff8278c460 r qla_regs_2200 -ffffffff8278c490 r qla_regs_23XX -ffffffff8278d000 R ahci_atascsi_methods -ffffffff8278e000 R nvme_switch -ffffffff8278e028 r nvme_ops -ffffffff8278f000 R mpi_switch -ffffffff8278f060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs -ffffffff8278f090 r chv_oa_mux_regs -ffffffff8278f0b0 r fiji_clock_stretcher_lookup_table -ffffffff8278f0b0 r tonga_clock_stretcher_lookup_table -ffffffff8278f0d0 r iosf_pci_devices -ffffffff8278f0f0 r link_speed -ffffffff8278f0f0 r link_speed -ffffffff8278f130 r drm_fb_xfrm.default_dst_pitch -ffffffff8278f130 r non_supported_protection -ffffffff8278f140 r tgl_uy_revids -ffffffff8278f2b0 r bwi_phy_noise_11g_rev1 -ffffffff8278f320 r cardslot_process_event.antonym_ev -ffffffff8278f3b0 r gen11_oa_mux_regs -ffffffff8278f450 r dpia_to_preferred_enc_id_table -ffffffff8278f4c0 r ddr2_cycle_tenths -ffffffff8278f530 r rtw_intr_rx.ratetbl -ffffffff8278f5b0 r abm_config -ffffffff8278f630 r getbootinfo.ports -ffffffff8278f680 r reg_offsets -ffffffff8278f690 r bwi_rf_lo_measure_11g.rf_lo_adjust -ffffffff8278f6a0 r glk_revids -ffffffff8278f6b0 r init_non_clock_fields.look_up -ffffffff8278f6c0 r uftdi_8u232am_getrate.roundoff -ffffffff8278f720 r zyd_rx_data.rates -ffffffff8278f740 r ieee80211_ra_valid_tx_mcs.max_mcs -ffffffff8278f770 r intel_engine_init_tlb_invalidation.gen8_regs -ffffffff8278f7a0 r bwi_phy_noise_11g -ffffffff8278f7b0 r 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iavf_ca -ffffffff82a32030 r iavf_devices -ffffffff82a32040 r iavf_aq_regs -ffffffff82a320b0 r iavf_link_speeds -ffffffff82a33000 R rge_ca -ffffffff82a33028 R rge_devices -ffffffff82a33030 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value -ffffffff82a33050 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value -ffffffff82a330b0 r rtl8125_mac_cfg3_mcu -ffffffff82a33950 r rtl8125_mac_cfg5_mcu -ffffffff82a34970 r rtl8125_mac_bps -ffffffff82a34d70 r rtl8125b_mac_bps -ffffffff82a34f98 r rge_kstats_tpl -ffffffff82a36000 R igc_devices -ffffffff82a36040 R igc_ca -ffffffff82a36070 r igc_counters -ffffffff82a37000 R ngbe_devices -ffffffff82a37008 R ngbe_ca -ffffffff82a38000 R com_pci_ca -ffffffff82a38030 R com_pci_ids -ffffffff82a39000 r agp_attach.agp_max -ffffffff82a39048 R agp_ca -ffffffff82a3a000 R intagp_ca -ffffffff82a3b000 r drm_plane_create_rotation_property.props -ffffffff82a3c000 r drm_bridge_priv_state_funcs -ffffffff82a3e000 r color_encoding_name -ffffffff82a3e020 r color_range_name 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drm_fb_xrgb8888_to_gray8.dst_pixsize -ffffffff82a4f028 r drm_fb_xrgb8888_to_xbgr8888.dst_pixsize -ffffffff82a4f02c r drm_fb_xrgb8888_to_abgr8888.dst_pixsize -ffffffff82a50000 r __drm_format_info.formats -ffffffff82a51000 R drm_pgops -ffffffff82a52000 r drm_gem_dma_default_funcs -ffffffff82a53000 R drm_gem_fb_funcs -ffffffff82a54000 r drm_ioctls -ffffffff82a56000 r dma_fence_stub_ops -ffffffff82a56040 R dma_fence_array_ops -ffffffff82a56080 R dma_fence_chain_ops -ffffffff82a560c0 R dmabufops -ffffffff82a560f8 R syncfileops -ffffffff82a57000 r drm_plane_type_enum_list -ffffffff82a58000 r tv_modes_parameters -ffffffff82a580c0 r drm_mode_status_names -ffffffff82a58200 r drm_named_modes -ffffffff82a59000 r primary_plane_funcs -ffffffff82a59068 r safe_modeset_formats -ffffffff82a5a000 r orientation_data -ffffffff82a5d9c8 r lcd800x1280_rightside_up -ffffffff82a5d9e0 r lcd720x1280_rightside_up -ffffffff82a5d9f8 r lcd800x1280_leftside_up -ffffffff82a5da10 r lcd1080x1920_leftside_up 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drm_dp_i2c_lock_ops -ffffffff82a61070 r dp_aux_bl_ops -ffffffff82a61090 r dpcd_quirk_list -ffffffff82a61320 r drm_dp_psr_setup_time.psr_setup_time_us -ffffffff82a62000 R drm_dp_mst_topology_state_funcs -ffffffff82a62020 r drm_dp_mst_req_type_str.req_type_str -ffffffff82a621f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str -ffffffff82a62220 r drm_dp_mst_nak_reason_str.nak_reason_str -ffffffff82a62278 r drm_dp_mst_i2c_algo -ffffffff82a63000 r rc_parameters_1_2_444 -ffffffff82a635f0 r rc_parameters_pre_scr -ffffffff82a63920 r rc_parameters_1_2_422 -ffffffff82a63df0 r rc_parameters_1_2_420 -ffffffff82a65000 r hdmi_colorimetry_val -ffffffff82a66018 R ttm_bo_vm_ops -ffffffff82a67000 r ttm_range_manager_func -ffffffff82a68018 r ttm_kmap_iter_io_ops -ffffffff82a68030 r ttm_kmap_iter_linear_io_ops -ffffffff82a69000 r ttm_sys_manager_func -ffffffff82a6a000 r ttm_kmap_iter_tt_ops -ffffffff82a6b000 r drm_sched_fence_ops_scheduled -ffffffff82a6b040 r drm_sched_fence_ops_finished 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sgpr112_init_regs_aldebaran -ffffffff82bad360 R sgpr96_init_regs_aldebaran -ffffffff82bad510 R sgpr64_init_regs_aldebaran -ffffffff82bad6c0 r golden_settings_gc_9_4_2_alde -ffffffff82bad720 r golden_settings_gc_9_4_2_alde_die_0 -ffffffff82bad7b0 r golden_settings_gc_9_4_2_alde_die_1 -ffffffff82bad840 r sgpr112_init_compute_shader_aldebaran -ffffffff82bada60 r sgpr96_init_compute_shader_aldebaran -ffffffff82badc50 r sgpr64_init_compute_shader_aldebaran -ffffffff82baddc0 r vgpr_init_compute_shader_aldebaran -ffffffff82bae6a0 r gfx_v9_4_2_edc_counter_regs -ffffffff82baea20 r gfx_v9_4_2_ras_fields -ffffffff82bb03c0 r gfx_v9_4_2_utc_blocks -ffffffff82bb1000 r gfx_v9_4_3_ip_funcs -ffffffff82bb10a8 R gfx_v9_4_3_ip_block -ffffffff82bb10c0 r gfx_v9_4_3_kiq_pm4_funcs -ffffffff82bb1100 r gfx_v9_4_3_ring_funcs_kiq -ffffffff82bb1240 r gfx_v9_4_3_ring_funcs_compute -ffffffff82bb1380 r gfx_v9_4_3_eop_irq_funcs -ffffffff82bb1390 r gfx_v9_4_3_priv_reg_irq_funcs -ffffffff82bb13a0 r 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gfx_v9_4_3_ras_tcp_mem_list -ffffffff82bb25a0 r gfx_v9_4_3_ras_td_mem_list -ffffffff82bb25d0 r gfx_v9_4_3_ras_tcx_mem_list -ffffffff82bb2b50 r gfx_v9_4_3_ras_atc_l2_mem_list -ffffffff82bb2b60 r gfx_v9_4_3_ras_utcl2_mem_list -ffffffff82bb2b70 r gfx_v9_4_3_ras_vml2_mem_list -ffffffff82bb2b80 r gfx_v9_4_3_ras_vml2_walker_mem_list -ffffffff82bb3000 R gfxhub_v1_0_funcs -ffffffff82bb4000 R gfxhub_v1_2_funcs -ffffffff82bb5000 R gfxhub_v2_0_funcs -ffffffff82bb5060 r gfxhub_v2_0_vmhub_funcs -ffffffff82bb5070 r gfxhub_client_ids -ffffffff82bb6000 R gfxhub_v2_1_funcs -ffffffff82bb6060 r gfxhub_v2_1_vmhub_funcs -ffffffff82bb6070 r gfxhub_client_ids -ffffffff82bb7000 R gfxhub_v3_0_funcs -ffffffff82bb7060 r gfxhub_v3_0_vmhub_funcs -ffffffff82bb7070 r gfxhub_client_ids -ffffffff82bb8000 R gfxhub_v3_0_3_funcs -ffffffff82bb8060 r gfxhub_v3_0_3_vmhub_funcs -ffffffff82bb8070 r gfxhub_client_ids -ffffffff82bb9000 R gmc_v10_0_ip_funcs -ffffffff82bb90a8 R gmc_v10_0_ip_block -ffffffff82bb90c0 r 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golden_settings_mmhub_1_0_0 -ffffffff82bc0f90 r golden_settings_athub_1_0_0 -ffffffff82bc1000 R hdp_v4_0_funcs -ffffffff82bc2000 R hdp_v5_0_funcs -ffffffff82bc3000 R hdp_v5_2_funcs -ffffffff82bc4000 R hdp_v6_0_funcs -ffffffff82bc5000 r iceland_ih_ip_funcs -ffffffff82bc50a8 R iceland_ih_ip_block -ffffffff82bc50c0 r iceland_ih_funcs -ffffffff82bc6000 r ih_v6_0_ip_funcs -ffffffff82bc60a8 R ih_v6_0_ip_block -ffffffff82bc60c0 r ih_v6_0_funcs -ffffffff82bc60e0 r ih_v6_0_self_irq_funcs -ffffffff82bc7000 r ih_v6_1_ip_funcs -ffffffff82bc70a8 R ih_v6_1_ip_block -ffffffff82bc70c0 r ih_v6_1_funcs -ffffffff82bc70e0 r ih_v6_1_self_irq_funcs -ffffffff82bc8000 R gfx_v11_0_imu_funcs -ffffffff82bc8030 r imu_rlc_ram_golden_11 -ffffffff82bc8680 r imu_rlc_ram_golden_11_0_2 -ffffffff82bc9000 r imu_rlc_ram_golden_11_0_3 -ffffffff82bca000 r jpeg_v1_0_decode_ring_vm_funcs -ffffffff82bca140 r jpeg_v1_0_irq_funcs -ffffffff82bcb000 r jpeg_v2_0_ip_funcs -ffffffff82bcb0a8 R jpeg_v2_0_ip_block -ffffffff82bcb0c0 r jpeg_v2_0_dec_ring_vm_funcs -ffffffff82bcb200 r jpeg_v2_0_irq_funcs -ffffffff82bcc000 r jpeg_v2_5_ip_funcs -ffffffff82bcc0a8 R jpeg_v2_5_ip_block -ffffffff82bcc0c0 r jpeg_v2_6_ip_funcs -ffffffff82bcc168 R jpeg_v2_6_ip_block -ffffffff82bcc180 R jpeg_v2_6_ras_hw_ops -ffffffff82bcc1c0 r jpeg_v2_5_dec_ring_vm_funcs -ffffffff82bcc300 r jpeg_v2_6_dec_ring_vm_funcs -ffffffff82bcc440 r jpeg_v2_5_irq_funcs -ffffffff82bcc450 r jpeg_v2_6_ras_irq_funcs -ffffffff82bcd000 r jpeg_v3_0_ip_funcs -ffffffff82bcd0a8 R jpeg_v3_0_ip_block -ffffffff82bcd0c0 r jpeg_v3_0_dec_ring_vm_funcs -ffffffff82bcd200 r jpeg_v3_0_irq_funcs -ffffffff82bce000 r jpeg_v4_0_ip_funcs -ffffffff82bce0a8 R jpeg_v4_0_ip_block -ffffffff82bce0c0 R jpeg_v4_0_ras_hw_ops -ffffffff82bce100 r jpeg_v4_0_dec_ring_vm_funcs -ffffffff82bce240 r jpeg_v4_0_irq_funcs -ffffffff82bce250 r jpeg_v4_0_ras_irq_funcs -ffffffff82bcf000 r jpeg_v4_0_3_ip_funcs -ffffffff82bcf0a8 R jpeg_v4_0_3_ip_block -ffffffff82bcf0c0 r jpeg_v4_0_3_dec_ring_vm_funcs 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mmhub_v1_8_ce_reg_list -ffffffff82bd7180 r mmhub_v1_8_ras_memory_list -ffffffff82bd72b0 r mmhub_v1_8_ue_reg_list -ffffffff82bd8000 R mmhub_v2_0_funcs -ffffffff82bd8050 r mmhub_v2_0_vmhub_funcs -ffffffff82bd8060 r mmhub_client_ids_navi1x -ffffffff82bd8190 r mmhub_client_ids_sienna_cichlid -ffffffff82bd8450 r mmhub_client_ids_beige_goby -ffffffff82bd9000 R mmhub_v2_3_funcs -ffffffff82bd9050 r mmhub_v2_3_vmhub_funcs -ffffffff82bd9060 r mmhub_client_ids_vangogh -ffffffff82bda000 R mmhub_v3_0_funcs -ffffffff82bda050 r mmhub_v3_0_vmhub_funcs -ffffffff82bda060 r mmhub_client_ids_v3_0_0 -ffffffff82bdb000 R mmhub_v3_0_1_funcs -ffffffff82bdb050 r mmhub_v3_0_1_vmhub_funcs -ffffffff82bdb060 r mmhub_client_ids_v3_0_1 -ffffffff82bdc000 R mmhub_v3_0_2_funcs -ffffffff82bdc050 r mmhub_v3_0_2_vmhub_funcs -ffffffff82bdc060 r mmhub_client_ids_v3_0_2 -ffffffff82bdd000 R mmhub_v9_4_ras_hw_ops -ffffffff82bdd040 R mmhub_v9_4_funcs -ffffffff82bdd090 r mmhub_v9_4_edc_cnt_regs -ffffffff82bdd330 r mmhub_v9_4_ras_fields -ffffffff82bdf3b0 r mmhub_v9_4_err_status_regs -ffffffff82be0000 r xgpu_ai_mailbox_ack_irq_funcs -ffffffff82be0010 r xgpu_ai_mailbox_rcv_irq_funcs -ffffffff82be0020 R xgpu_ai_virt_ops -ffffffff82be1000 r xgpu_nv_mailbox_ack_irq_funcs -ffffffff82be1010 r xgpu_nv_mailbox_rcv_irq_funcs -ffffffff82be1020 R xgpu_nv_virt_ops -ffffffff82be2000 r xgpu_fiji_mgcg_cgcg_init -ffffffff82be2240 r xgpu_fiji_golden_settings_a10 -ffffffff82be2370 r xgpu_fiji_golden_common_all -ffffffff82be23f0 r xgpu_tonga_mgcg_cgcg_init -ffffffff82be2810 r xgpu_tonga_golden_settings_a11 -ffffffff82be29d0 r xgpu_tonga_golden_common_all -ffffffff82be2a28 r xgpu_vi_mailbox_ack_irq_funcs -ffffffff82be2a38 r xgpu_vi_mailbox_rcv_irq_funcs -ffffffff82be2a48 R xgpu_vi_virt_ops -ffffffff82be3000 r navi10_ih_ip_funcs -ffffffff82be30a8 R navi10_ih_ip_block -ffffffff82be30c0 r navi10_ih_funcs -ffffffff82be30e0 r navi10_ih_self_irq_funcs -ffffffff82be4000 R nbio_v2_3_hdp_flush_reg -ffffffff82be4048 R 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dp_trace_commit_lt_init +ffffffff822d1200 T dp_trace_link_loss_increment +ffffffff822d1230 T dp_trace_lt_fail_count_update +ffffffff822d1270 T dp_trace_lt_total_count_increment +ffffffff822d12b0 T dp_trace_set_is_logged_flag +ffffffff822d12f0 T dp_trace_is_logged +ffffffff822d1330 T dp_trace_lt_result_update +ffffffff822d1370 T dp_trace_set_lt_start_timestamp +ffffffff822d1450 T dp_trace_set_lt_end_timestamp +ffffffff822d1530 T dp_trace_get_lt_end_timestamp +ffffffff822d1570 T dp_trace_get_lt_counts +ffffffff822d15b0 T dp_trace_get_link_loss_count +ffffffff822d15e0 T dp_trace_set_edp_power_timestamp +ffffffff822d16c0 T dp_trace_get_edp_poweron_timestamp +ffffffff822d16f0 T dp_trace_get_edp_poweroff_timestamp +ffffffff822d1720 T dp_trace_source_sequence +ffffffff822d2000 T dp_fpga_hpo_enable_link_and_stream +ffffffff822d3000 T set_dio_throttled_vcp_size +ffffffff822d3020 T setup_dio_stream_encoder +ffffffff822d3110 T reset_dio_stream_encoder +ffffffff822d31e0 T setup_dio_stream_attribute +ffffffff822d3380 T enable_dio_dp_link_output +ffffffff822d3410 T disable_dio_link_output +ffffffff822d3470 T set_dio_dp_link_test_pattern +ffffffff822d34d0 T set_dio_dp_lane_settings +ffffffff822d3510 T update_dio_stream_allocation_table +ffffffff822d3580 T setup_dio_audio_output +ffffffff822d35f0 T enable_dio_audio_packet +ffffffff822d36b0 T disable_dio_audio_packet +ffffffff822d3790 T can_use_dio_link_hwss +ffffffff822d37d0 T get_dio_link_hwss +ffffffff822d4000 T dp_dio_fixed_vs_pe_retimer_lane_cfg_to_hw_cfg +ffffffff822d4040 T dp_dio_fixed_vs_pe_retimer_exit_manual_automation +ffffffff822d4280 T enable_dio_fixed_vs_pe_retimer_program_4lane_output +ffffffff822d43b0 T requires_fixed_vs_pe_retimer_dio_link_hwss +ffffffff822d43f0 T get_dio_fixed_vs_pe_retimer_link_hwss +ffffffff822d4420 t enable_dio_fixed_vs_pe_retimer_dp_link_output +ffffffff822d4590 t set_dio_fixed_vs_pe_retimer_dp_link_test_pattern +ffffffff822d5000 T can_use_dpia_link_hwss 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enable_hpo_fixed_vs_pe_retimer_dp_link_output +ffffffff822d70d0 t set_hpo_fixed_vs_pe_retimer_dp_link_test_pattern +ffffffff822d7450 t set_hpo_fixed_vs_pe_retimer_dp_lane_settings +ffffffff822d74d0 t dp_hpo_fixed_vs_pe_retimer_set_tx_ffe +ffffffff822d8000 T link_reset_cur_dp_mst_topology +ffffffff822d8060 T link_detect_connection_type +ffffffff822d8180 T link_detect +ffffffff822d9a40 T link_clear_dprx_states +ffffffff822d9a70 T link_is_hdcp14 +ffffffff822d9ad0 T link_is_hdcp22 +ffffffff822d9b40 T link_get_status +ffffffff822d9b70 T link_add_remote_sink +ffffffff822d9d10 T link_remove_remote_sink +ffffffff822d9df0 t wait_for_entering_dp_alt_mode +ffffffff822da000 T link_blank_all_dp_displays +ffffffff822da0d0 T link_blank_dp_stream +ffffffff822da1e0 T link_blank_all_edp_displays +ffffffff822da2a0 T link_set_all_streams_dpms_off_for_link +ffffffff822da3a0 T link_get_master_pipes_with_dpms_on +ffffffff822da560 T link_resume +ffffffff822da5a0 T link_set_dsc_on_stream +ffffffff822daa40 T link_set_dsc_pps_packet +ffffffff822dadd0 T link_set_dsc_enable +ffffffff822dae70 T link_update_dsc_config +ffffffff822daee0 T link_calculate_sst_avg_time_slots_per_mtp +ffffffff822daf50 T link_reduce_mst_payload +ffffffff822db370 t update_mst_stream_alloc_table +ffffffff822db5f0 T link_increase_mst_payload +ffffffff822dba00 T link_set_dpms_off +ffffffff822dc5b0 t update_psp_stream_config +ffffffff822dc7b0 t update_sst_payload +ffffffff822dcdf0 t get_ext_hdmi_settings +ffffffff822dd040 t write_i2c_retimer_setting +ffffffff822dd690 t write_i2c_default_retimer_setting +ffffffff822ddb80 t write_i2c_redriver_setting +ffffffff822ddca0 t disable_link +ffffffff822dde10 T link_set_dpms_on +ffffffff822de850 t enable_stream_features +ffffffff822de910 t allocate_usb4_bandwidth +ffffffff822de940 t allocate_mst_payload +ffffffff822deda0 t log_vcp_x_y +ffffffff822def20 t write_i2c +ffffffff822defb0 t enable_link_dp +ffffffff822e0000 T link_create_link_service +ffffffff822e0470 T link_destroy_link_service +ffffffff822e04c0 T link_create +ffffffff822e14e0 T link_destroy +ffffffff822e2000 T link_get_cur_link_res +ffffffff822e2150 T link_get_cur_res_map +ffffffff822e2230 T link_restore_res_map +ffffffff822e3000 T dp_link_bandwidth_kbps +ffffffff822e30a0 T link_validate_mode_timing +ffffffff822e3680 t get_tmds_output_pixel_clock_100hz +ffffffff822e36f0 T link_validate_dpia_bandwidth +ffffffff822e4000 T link_create_ddc_service +ffffffff822e4170 T link_destroy_ddc_service +ffffffff822e4200 T set_ddc_transaction_type +ffffffff822e4230 T link_is_in_aux_transaction_mode +ffffffff822e4270 T set_dongle_type +ffffffff822e42a0 T link_get_aux_defer_delay +ffffffff822e43d0 T link_query_ddc_data +ffffffff822e4780 T link_aux_transfer_raw +ffffffff822e47b0 T link_get_fixed_vs_pe_retimer_write_address +ffffffff822e4840 T link_get_fixed_vs_pe_retimer_read_address +ffffffff822e48d0 T link_configure_fixed_vs_pe_retimer +ffffffff822e49a0 T link_aux_transfer_with_retries_no_mutex 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dp_get_cr_failure +ffffffff822ee520 T is_repeater +ffffffff822ee560 T dp_is_max_vs_reached +ffffffff822ee5f0 T dp_is_cr_done +ffffffff822ee6c0 T dp_is_ch_eq_done +ffffffff822ee770 T dp_is_symbol_locked +ffffffff822ee820 T dp_is_interlane_aligned +ffffffff822ee850 T dp_check_link_loss_status +ffffffff822ee900 T dp_get_lane_status_and_lane_adjust +ffffffff822eea50 T dp_get_lttpr_mode_override +ffffffff822eeb10 T override_training_settings +ffffffff822eedd0 T decide_cr_training_pattern +ffffffff822eee10 T decide_eq_training_pattern +ffffffff822eeef0 T dp_decide_lttpr_mode +ffffffff822eef90 T dp_decide_lane_settings +ffffffff822ef310 T dp_decide_training_settings +ffffffff822ef3a0 T configure_lttpr_mode_transparent +ffffffff822ef3f0 T dpcd_configure_lttpr_mode +ffffffff822ef5b0 T repeater_training_done +ffffffff822ef600 T dpcd_configure_channel_coding +ffffffff822ef660 T dpcd_set_training_pattern +ffffffff822ef710 T dpcd_set_link_settings +ffffffff822ef870 T dpcd_set_lane_settings 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edp_power_alpm_dpcd_enable +ffffffff822f9ca0 T edp_set_backlight_level +ffffffff822f9e10 T edp_set_psr_allow_active +ffffffff822f9ff0 T edp_get_psr_state +ffffffff822fa0c0 T edp_setup_psr +ffffffff822fa4b0 T edp_get_psr_residency +ffffffff822fa550 T edp_set_sink_vtotal_in_psr_active +ffffffff822fa5d0 T edp_set_replay_allow_active +ffffffff822fa6f0 T edp_get_replay_state +ffffffff822fa7a0 T edp_setup_replay +ffffffff822fa990 T edp_set_coasting_vtotal +ffffffff822faa40 T edp_replay_residency +ffffffff822fab00 T edp_get_backlight_level +ffffffff822fac60 T edp_get_target_backlight_pwm +ffffffff822fb000 T link_get_hpd_state +ffffffff822fb070 T link_enable_hpd +ffffffff822fb0c0 T link_disable_hpd +ffffffff822fb110 T link_enable_hpd_filter +ffffffff822fb280 T program_hpd_filter +ffffffff822fb430 T link_get_hpd_gpio +ffffffff822fb510 T query_hpd_status +ffffffff822fb630 T get_hpd_line +ffffffff822fc000 T virtual_link_encoder_construct +ffffffff822fc060 t virtual_link_encoder_validate_output_with_stream +ffffffff822fc090 t virtual_link_encoder_hw_init +ffffffff822fc0c0 t virtual_link_encoder_setup +ffffffff822fc0f0 t virtual_link_encoder_enable_tmds_output +ffffffff822fc120 t virtual_link_encoder_enable_dp_output +ffffffff822fc150 t virtual_link_encoder_enable_dp_mst_output +ffffffff822fc180 t virtual_link_encoder_disable_output +ffffffff822fc1b0 t virtual_link_encoder_dp_set_lane_settings +ffffffff822fc1e0 t virtual_link_encoder_dp_set_phy_pattern +ffffffff822fc210 t virtual_link_encoder_update_mst_stream_allocation_table +ffffffff822fc240 t virtual_link_encoder_connect_dig_be_to_fe +ffffffff822fc270 t virtual_link_encoder_destroy +ffffffff822fc2c0 t virtual_link_encoder_get_max_link_cap +ffffffff822fd000 T virtual_setup_stream_encoder +ffffffff822fd030 T virtual_setup_stream_attribute +ffffffff822fd060 T virtual_reset_stream_encoder +ffffffff822fd090 T get_virtual_link_hwss +ffffffff822fd0c0 t virtual_disable_link_output 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virtual_stream_encoder_reset_hdmi_stream_attribute +ffffffff822fe3e0 t virtual_stream_encoder_set_dsc_pps_info_packet +ffffffff822fe410 t virtual_enc_dp_set_odm_combine +ffffffff822ff000 T dmub_dcn20_use_cached_inbox +ffffffff822ff040 T dmub_dcn20_reset +ffffffff822ff210 T dmub_dcn20_reset_release +ffffffff822ff2e0 T dmub_dcn20_backdoor_load +ffffffff822ff590 T dmub_dcn20_setup_windows +ffffffff822ffaf0 T dmub_dcn20_setup_mailbox +ffffffff822ffb50 T dmub_dcn20_get_inbox1_wptr +ffffffff822ffb80 T dmub_dcn20_get_inbox1_rptr +ffffffff822ffbb0 T dmub_dcn20_set_inbox1_wptr +ffffffff822ffbe0 T dmub_dcn20_setup_out_mailbox +ffffffff822ffc40 T dmub_dcn20_get_outbox1_wptr +ffffffff822ffc70 T dmub_dcn20_set_outbox1_rptr +ffffffff822ffca0 T dmub_dcn20_setup_outbox0 +ffffffff822ffcf0 T dmub_dcn20_get_outbox0_wptr +ffffffff822ffd20 T dmub_dcn20_set_outbox0_rptr +ffffffff822ffd50 T dmub_dcn20_is_hw_init +ffffffff822ffdb0 T dmub_dcn20_is_supported +ffffffff822ffe10 T dmub_dcn20_set_gpint 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dmub_dcn32_backdoor_load_zfb_mode +ffffffff82305730 T dmub_dcn32_setup_windows +ffffffff82305a80 T dmub_dcn32_setup_mailbox +ffffffff82305ad0 T dmub_dcn32_get_inbox1_wptr +ffffffff82305b00 T dmub_dcn32_get_inbox1_rptr +ffffffff82305b30 T dmub_dcn32_set_inbox1_wptr +ffffffff82305b60 T dmub_dcn32_setup_out_mailbox +ffffffff82305bb0 T dmub_dcn32_get_outbox1_wptr +ffffffff82305be0 T dmub_dcn32_set_outbox1_rptr +ffffffff82305c10 T dmub_dcn32_is_hw_init +ffffffff82305c90 T dmub_dcn32_is_supported +ffffffff82305cf0 T dmub_dcn32_set_gpint +ffffffff82305d20 T dmub_dcn32_is_gpint_acked +ffffffff82305d80 T dmub_dcn32_get_gpint_response +ffffffff82305db0 T dmub_dcn32_get_gpint_dataout +ffffffff82305ed0 T dmub_dcn32_get_fw_boot_status +ffffffff82305f00 T dmub_dcn32_enable_dmub_boot_options +ffffffff82305f30 T dmub_dcn32_skip_dmub_panel_power_sequence +ffffffff82305f90 T dmub_dcn32_setup_outbox0 +ffffffff82305fe0 T dmub_dcn32_get_outbox0_wptr +ffffffff82306010 T dmub_dcn32_set_outbox0_rptr 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mod_hdcp_hdcp1_enable_encryption +ffffffff82320d40 T mod_hdcp_hdcp1_validate_ksvlist_vp +ffffffff82320e70 T mod_hdcp_hdcp1_enable_dp_stream_encryption +ffffffff82320fb0 T mod_hdcp_hdcp1_link_maintenance +ffffffff82321070 T mod_hdcp_hdcp2_create_session +ffffffff823211e0 T mod_hdcp_hdcp2_destroy_session +ffffffff82321450 T mod_hdcp_hdcp2_prepare_ake_init +ffffffff82321550 T mod_hdcp_hdcp2_validate_ake_cert +ffffffff82321700 T mod_hdcp_hdcp2_validate_h_prime +ffffffff82321880 T mod_hdcp_hdcp2_prepare_lc_init +ffffffff82321980 T mod_hdcp_hdcp2_validate_l_prime +ffffffff82321aa0 T mod_hdcp_hdcp2_prepare_eks +ffffffff82321bf0 T mod_hdcp_hdcp2_enable_encryption +ffffffff82321d60 T mod_hdcp_hdcp2_validate_rx_id_list +ffffffff82321ee0 T mod_hdcp_hdcp2_enable_dp_stream_encryption +ffffffff82322050 T mod_hdcp_hdcp2_prepare_stream_management +ffffffff82322160 T mod_hdcp_hdcp2_validate_stream_ready +ffffffff82323000 T mod_build_vsc_infopacket +ffffffff82323260 T mod_build_hf_vsif_infopacket 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amdgpu_dpm_set_mp1_state +ffffffff823274d0 T amdgpu_dpm_is_baco_supported +ffffffff82327580 T amdgpu_dpm_mode2_reset +ffffffff82327610 T amdgpu_dpm_enable_gfx_features +ffffffff823276a0 T amdgpu_dpm_baco_reset +ffffffff82327750 T amdgpu_dpm_is_mode1_reset_supported +ffffffff823277c0 T amdgpu_dpm_mode1_reset +ffffffff82327840 T amdgpu_dpm_switch_power_profile +ffffffff823278f0 T amdgpu_dpm_set_xgmi_pstate +ffffffff82327990 T amdgpu_dpm_set_df_cstate +ffffffff82327a30 T amdgpu_dpm_allow_xgmi_power_down +ffffffff82327ab0 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff82327b40 T amdgpu_dpm_set_clockgating_by_smu +ffffffff82327be0 T amdgpu_dpm_smu_i2c_bus_access +ffffffff82327c80 T amdgpu_pm_acpi_event_handler +ffffffff82327d40 T amdgpu_dpm_read_sensor +ffffffff82327e00 T amdgpu_dpm_get_apu_thermal_limit +ffffffff82327ea0 T amdgpu_dpm_set_apu_thermal_limit +ffffffff82327f40 T amdgpu_dpm_compute_clocks +ffffffff82328040 T amdgpu_dpm_enable_uvd +ffffffff82328230 T amdgpu_dpm_enable_vce +ffffffff82328420 T amdgpu_dpm_enable_jpeg +ffffffff82328520 T amdgpu_pm_load_smu_firmware +ffffffff823285d0 T amdgpu_dpm_handle_passthrough_sbr +ffffffff82328650 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff823286d0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff82328750 T amdgpu_dpm_get_dpm_freq_range +ffffffff823287f0 T amdgpu_dpm_set_soft_freq_range +ffffffff82328890 T amdgpu_dpm_write_watermarks_table +ffffffff82328910 T amdgpu_dpm_wait_for_event +ffffffff823289a0 T amdgpu_dpm_set_residency_gfxoff +ffffffff82328a20 T amdgpu_dpm_get_residency_gfxoff +ffffffff82328aa0 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff82328b20 T amdgpu_dpm_get_status_gfxoff +ffffffff82328ba0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff82328bf0 T amdgpu_dpm_gfx_state_change +ffffffff82328c60 T amdgpu_dpm_get_ecc_info +ffffffff82328ce0 T amdgpu_dpm_get_vce_clock_state +ffffffff82328d70 T amdgpu_dpm_get_current_power_state +ffffffff82328de0 T amdgpu_dpm_set_power_state +ffffffff82328f40 T amdgpu_dpm_dispatch_task +ffffffff82328fe0 T amdgpu_dpm_get_performance_level +ffffffff82329070 T amdgpu_dpm_force_performance_level +ffffffff82329250 T amdgpu_dpm_get_pp_num_states +ffffffff823292e0 T amdgpu_dpm_get_pp_table +ffffffff82329370 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff82329410 T amdgpu_dpm_odn_edit_dpm_table +ffffffff823294b0 T amdgpu_dpm_print_clock_levels +ffffffff82329540 T amdgpu_dpm_emit_clock_levels +ffffffff823295e0 T amdgpu_dpm_set_ppfeature_status +ffffffff82329670 T amdgpu_dpm_get_ppfeature_status +ffffffff82329700 T amdgpu_dpm_force_clock_level +ffffffff82329790 T amdgpu_dpm_get_sclk_od +ffffffff82329810 T amdgpu_dpm_set_sclk_od +ffffffff82329990 T amdgpu_dpm_get_mclk_od +ffffffff82329a10 T amdgpu_dpm_set_mclk_od +ffffffff82329b90 T amdgpu_dpm_get_power_profile_mode +ffffffff82329c20 T amdgpu_dpm_set_power_profile_mode +ffffffff82329cc0 T amdgpu_dpm_get_gpu_metrics +ffffffff82329d50 T amdgpu_dpm_get_fan_control_mode +ffffffff82329de0 T amdgpu_dpm_set_fan_speed_pwm +ffffffff82329e70 T amdgpu_dpm_get_fan_speed_pwm +ffffffff82329f00 T amdgpu_dpm_get_fan_speed_rpm +ffffffff82329f90 T amdgpu_dpm_set_fan_speed_rpm +ffffffff8232a020 T amdgpu_dpm_set_fan_control_mode +ffffffff8232a0b0 T amdgpu_dpm_get_power_limit +ffffffff8232a160 T amdgpu_dpm_set_power_limit +ffffffff8232a1f0 T amdgpu_dpm_is_cclk_dpm_supported +ffffffff8232a260 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff8232a2f0 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff8232a390 T amdgpu_dpm_is_overdrive_supported +ffffffff8232a400 T amdgpu_dpm_set_pp_table +ffffffff8232a4a0 T amdgpu_dpm_get_num_cpu_cores +ffffffff8232a4f0 T amdgpu_dpm_stb_debug_fs_init +ffffffff8232a540 T amdgpu_dpm_display_configuration_change +ffffffff8232a5d0 T amdgpu_dpm_get_clock_by_type +ffffffff8232a670 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff8232a700 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff8232a7a0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff8232a840 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff8232a8d0 T amdgpu_dpm_display_clock_voltage_request +ffffffff8232a960 T amdgpu_dpm_get_current_clocks +ffffffff8232a9f0 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff8232aa70 T amdgpu_dpm_set_active_display_count +ffffffff8232ab00 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff8232ab90 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff8232ac30 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff8232acd0 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff8232ad60 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff8232adf0 T amdgpu_dpm_get_uclk_dpm_states +ffffffff8232ae90 T amdgpu_dpm_get_dpm_clock_table +ffffffff8232b000 T amdgpu_dpm_get_active_displays +ffffffff8232b0a0 T amdgpu_dpm_get_vblank_time +ffffffff8232b150 T amdgpu_dpm_get_vrefresh +ffffffff8232c000 T amdgpu_pm_sysfs_init +ffffffff8232c030 T amdgpu_pm_sysfs_fini +ffffffff8232c060 T amdgpu_debugfs_pm_init +ffffffff8232d000 T amdgpu_dpm_print_class_info +ffffffff8232d2b0 T amdgpu_dpm_print_cap_info +ffffffff8232d340 T amdgpu_dpm_print_ps_status +ffffffff8232d3d0 T amdgpu_pm_print_power_states +ffffffff8232d460 T amdgpu_get_platform_caps +ffffffff8232d500 T amdgpu_parse_extended_power_table +ffffffff8232e290 t amdgpu_parse_clk_voltage_dep_table +ffffffff8232e340 T amdgpu_free_extended_power_table +ffffffff8232e450 T amdgpu_add_thermal_controller +ffffffff8232e8a0 T amdgpu_get_vce_clock_state +ffffffff8232e8e0 T amdgpu_legacy_dpm_compute_clocks +ffffffff8232ed70 T amdgpu_dpm_thermal_work_handler +ffffffff8232f000 t pp_early_init +ffffffff8232f100 t pp_late_init +ffffffff8232f220 t pp_sw_init +ffffffff8232f2b0 t pp_sw_fini +ffffffff8232f300 t pp_hw_init +ffffffff8232f360 t pp_hw_fini +ffffffff8232f3d0 t pp_late_fini +ffffffff8232f430 t pp_suspend +ffffffff8232f480 t pp_resume +ffffffff8232f4a0 t pp_is_idle +ffffffff8232f4d0 t pp_wait_for_idle +ffffffff8232f500 t pp_sw_reset +ffffffff8232f530 t pp_set_clockgating_state +ffffffff8232f560 t pp_set_powergating_state +ffffffff8232f590 t pp_dpm_set_fan_control_mode +ffffffff8232f600 t pp_dpm_get_fan_control_mode +ffffffff8232f670 t pp_dpm_set_fan_speed_pwm +ffffffff8232f6d0 t pp_dpm_get_fan_speed_pwm +ffffffff8232f730 t pp_dpm_force_clock_level +ffffffff8232f790 t pp_dpm_print_clock_levels +ffffffff8232f7f0 t pp_dpm_emit_clock_levels +ffffffff8232f850 t pp_dpm_force_performance_level +ffffffff8232f8f0 t pp_dpm_get_sclk_od +ffffffff8232f950 t pp_dpm_set_sclk_od +ffffffff8232f9b0 t pp_dpm_get_mclk_od +ffffffff8232fa10 t pp_dpm_set_mclk_od +ffffffff8232fa70 t pp_dpm_read_sensor +ffffffff8232fb30 t pp_dpm_get_performance_level +ffffffff8232fb70 t pp_dpm_get_current_power_state +ffffffff8232fbf0 t pp_dpm_get_fan_speed_rpm +ffffffff8232fc50 t pp_dpm_set_fan_speed_rpm +ffffffff8232fcb0 t pp_dpm_get_pp_num_states +ffffffff8232fdf0 t pp_dpm_get_pp_table +ffffffff8232fe40 t pp_dpm_set_pp_table +ffffffff8232ff70 t pp_dpm_switch_power_profile +ffffffff823300b0 t pp_dpm_get_vce_clock_state +ffffffff82330100 t pp_dpm_dispatch_tasks +ffffffff82330140 t pp_dpm_load_fw +ffffffff823301b0 t pp_dpm_fw_loading_complete +ffffffff823301e0 t pp_set_powergating_by_smu +ffffffff82330360 t pp_set_clockgating_by_smu +ffffffff823303d0 t pp_set_power_limit +ffffffff82330490 t pp_get_power_limit +ffffffff82330530 t pp_get_power_profile_mode +ffffffff82330590 t pp_set_power_profile_mode +ffffffff823305f0 t pp_set_fine_grain_clk_vol +ffffffff82330650 t pp_odn_edit_dpm_table +ffffffff823306b0 t pp_dpm_set_mp1_state +ffffffff82330710 t pp_smu_i2c_bus_access +ffffffff82330770 t pp_gfx_state_change_set +ffffffff823307d0 t pp_dpm_get_sclk +ffffffff82330820 t pp_dpm_get_mclk +ffffffff82330870 t pp_display_configuration_change +ffffffff823308c0 t pp_get_display_power_level +ffffffff82330900 t pp_get_current_clocks +ffffffff82330a20 t pp_get_clock_by_type +ffffffff82330a70 t pp_get_clock_by_type_with_latency +ffffffff82330ac0 t pp_get_clock_by_type_with_voltage +ffffffff82330b10 t pp_set_watermarks_for_clocks_ranges +ffffffff82330b50 t pp_display_clock_voltage_request +ffffffff82330b90 t pp_get_display_mode_validation_clocks +ffffffff82330bf0 t pp_notify_smu_enable_pwe +ffffffff82330c50 t pp_enable_mgpu_fan_boost +ffffffff82330cb0 t pp_set_active_display_count +ffffffff82330cf0 t pp_set_hard_min_dcefclk_by_freq +ffffffff82330d50 t pp_set_hard_min_fclk_by_freq +ffffffff82330db0 t pp_set_min_deep_sleep_dcefclk +ffffffff82330e10 t pp_get_asic_baco_capability +ffffffff82330e80 t pp_get_asic_baco_state +ffffffff82330ee0 t pp_set_asic_baco_state +ffffffff82330f50 t pp_get_ppfeature_status +ffffffff82330fb0 t pp_set_ppfeature_status +ffffffff82331000 t pp_asic_reset_mode_2 +ffffffff82331060 t pp_set_df_cstate +ffffffff823310c0 t pp_set_xgmi_pstate +ffffffff82331120 t pp_get_gpu_metrics +ffffffff82331180 t pp_get_prv_buffer_details +ffffffff82331200 t pp_pm_compute_clocks +ffffffff823312c0 t pp_swctf_delayed_work_handler +ffffffff82331410 t __delayed_work_tick +ffffffff82332000 T ci_baco_set_state +ffffffff82333000 T baco_program_registers +ffffffff823330d0 t baco_cmd_handler +ffffffff82333250 T soc15_baco_program_registers +ffffffff82334000 T fiji_baco_set_state +ffffffff82335000 T phm_setup_asic +ffffffff82335050 T phm_power_down_asic +ffffffff823350a0 T phm_set_power_state +ffffffff82335110 T phm_enable_dynamic_state_management +ffffffff823351c0 T phm_disable_dynamic_state_management +ffffffff82335260 T phm_force_dpm_levels +ffffffff823352b0 T phm_apply_state_adjust_rules +ffffffff82335300 T phm_apply_clock_adjust_rules +ffffffff82335350 T phm_powerdown_uvd +ffffffff823353a0 T phm_disable_clock_power_gatings +ffffffff823353f0 T phm_pre_display_configuration_changed +ffffffff82335450 T phm_display_configuration_changed +ffffffff823354b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff82335510 T phm_stop_thermal_controller +ffffffff82335570 T phm_register_irq_handlers +ffffffff823355c0 T phm_start_thermal_controller +ffffffff82335710 T phm_check_smc_update_required_for_display_configuration +ffffffff82335770 T phm_check_states_equal +ffffffff823357c0 T phm_store_dal_configuration_data +ffffffff82335910 T phm_get_dal_power_level +ffffffff82335970 T phm_set_cpu_power_state +ffffffff823359c0 T phm_get_performance_level +ffffffff82335a20 T phm_get_clock_info +ffffffff82335b90 T phm_get_current_shallow_sleep_clocks +ffffffff82335be0 T phm_get_clock_by_type +ffffffff82335c30 T phm_get_clock_by_type_with_latency +ffffffff82335c80 T phm_get_clock_by_type_with_voltage +ffffffff82335cd0 T phm_set_watermarks_for_clocks_ranges +ffffffff82335d20 T phm_display_clock_voltage_request +ffffffff82335d70 T phm_get_max_high_clocks +ffffffff82335dc0 T phm_disable_smc_firmware_ctf +ffffffff82335e20 T phm_set_active_display_count +ffffffff82336000 T hwmgr_early_init +ffffffff82336460 t polaris_set_asic_special_caps +ffffffff823364e0 T hwmgr_sw_init +ffffffff82336550 T hwmgr_sw_fini +ffffffff823365a0 T hwmgr_hw_init +ffffffff82336760 T hwmgr_hw_fini +ffffffff82336820 T hwmgr_suspend +ffffffff823368a0 T hwmgr_resume +ffffffff82336940 T hwmgr_handle_task +ffffffff82337000 T polaris_baco_set_state +ffffffff82338000 T pp_override_get_default_fuse_value +ffffffff82339000 T psm_init_power_state_table +ffffffff823392a0 T psm_fini_power_state_table +ffffffff82339360 T psm_set_boot_states +ffffffff82339410 T psm_set_performance_states +ffffffff823394c0 T psm_set_user_performance_state +ffffffff82339550 T psm_adjust_power_state_dynamic +ffffffff8233a000 T atomctrl_initialize_mc_reg_table +ffffffff8233a210 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff8233a420 T atomctrl_set_engine_dram_timings_rv770 +ffffffff8233a490 T atomctrl_get_memory_pll_dividers_si +ffffffff8233a570 T atomctrl_get_memory_pll_dividers_vi +ffffffff8233a5f0 T atomctrl_get_memory_pll_dividers_ai +ffffffff8233a6a0 T atomctrl_get_engine_pll_dividers_kong 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atomctrl_get_voltage_evv_on_sclk_ai +ffffffff8233b7b0 T atomctrl_get_smc_sclk_range_table +ffffffff8233b860 T atomctrl_get_vddc_shared_railinfo +ffffffff8233b8d0 T atomctrl_get_avfs_information +ffffffff8233ba60 T atomctrl_get_svi2_info +ffffffff8233bb40 T atomctrl_get_leakage_id_from_efuse +ffffffff8233bba0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff8233bd40 T atomctrl_get_voltage_range +ffffffff8233be00 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff8233be80 T atomctrl_get_edc_leakage_table +ffffffff8233c000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff8233c0c0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff8233c280 T pp_atomfwctrl_get_pp_assign_pin +ffffffff8233c360 T pp_atomfwctrl_enter_self_refresh +ffffffff8233c390 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff8233c440 T pp_atomfwctrl_get_avfs_information +ffffffff8233c780 T pp_atomfwctrl_get_gpio_information +ffffffff8233c820 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff8233c8b0 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff8233cc30 T pp_atomfwctrl_get_smc_dpm_information +ffffffff8233d000 T encode_pcie_lane_width +ffffffff8233d030 T decode_pcie_lane_width +ffffffff8233e000 t pp_tables_v1_0_initialize +ffffffff8233f450 t pp_tables_v1_0_uninitialize +ffffffff8233f600 T get_number_of_powerplay_table_entries_v1_0 +ffffffff8233f6b0 T get_powerplay_table_entry_v1_0 +ffffffff82340000 T pp_tables_get_response_times +ffffffff823400d0 T pp_tables_get_num_of_entries +ffffffff82340190 T pp_tables_get_entry +ffffffff823404a0 t init_non_clock_fields +ffffffff823405e0 t pp_tables_initialize +ffffffff82341760 t pp_tables_uninitialize +ffffffff82341960 t get_number_of_vce_state_table_entries +ffffffff82341a50 t get_vce_state_table_entry +ffffffff82342000 T smu10_init_function_pointers +ffffffff82342040 t smu10_hwmgr_backend_init +ffffffff823426e0 t smu10_hwmgr_backend_fini +ffffffff82342820 t smu10_setup_asic_task +ffffffff82342890 t smu10_get_power_state_size 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smu10_get_max_high_clocks +ffffffff823437d0 t smu10_power_off_asic +ffffffff82343820 t smu10_force_clock_level +ffffffff823439e0 t smu10_print_clock_levels +ffffffff82343dd0 t smu10_gfx_off_control +ffffffff82343ee0 t smu10_read_sensor +ffffffff82344070 t smu10_set_active_display_count +ffffffff823440d0 t smu10_set_min_deep_sleep_dcefclk +ffffffff82344130 t smu10_get_power_profile_mode +ffffffff82344170 t smu10_set_power_profile_mode +ffffffff823442a0 t smu10_set_fine_grain_clk_vol +ffffffff823444b0 t smu10_powergate_mmhub +ffffffff823444d0 t smu10_smus_notify_pwe +ffffffff823444f0 t smu10_powergate_sdma +ffffffff82344510 t smu10_set_hard_min_dcefclk_by_freq +ffffffff82344570 t smu10_set_hard_min_fclk_by_freq +ffffffff823445d0 t smu10_set_hard_min_gfxclk_by_freq +ffffffff82344630 t smu10_set_soft_max_gfxclk_by_freq +ffffffff82344690 t smu10_asic_reset +ffffffff823446b0 t smu10_gfx_state_change +ffffffff823446f0 t smu10_dpm_get_pp_table_entry_callback +ffffffff82345000 T smu7_baco_get_capability +ffffffff82345060 T smu7_baco_get_state +ffffffff823450b0 T smu7_baco_set_state +ffffffff82346000 T smu7_powerdown_uvd +ffffffff82346050 T smu7_disable_clock_power_gating +ffffffff823460e0 T smu7_powergate_uvd +ffffffff823461d0 T smu7_powergate_vce +ffffffff823462c0 T smu7_update_clock_gatings +ffffffff82346670 T smu7_powergate_gfx +ffffffff82347000 T smu7_get_sleep_divider_id_from_clock +ffffffff823470a0 T smu7_init_function_pointers +ffffffff82347100 t smu7_hwmgr_backend_init +ffffffff82348f80 t smu7_hwmgr_backend_fini +ffffffff82348ff0 t smu7_setup_asic_task +ffffffff82349360 t smu7_get_power_state_size +ffffffff82349390 t smu7_apply_state_adjust_rules +ffffffff82349830 t smu7_force_dpm_level +ffffffff82349d40 t smu7_enable_dpm_tasks +ffffffff8234c5d0 t smu7_disable_dpm_tasks +ffffffff8234cc10 t smu7_dpm_patch_boot_state +ffffffff8234cd50 t smu7_get_pp_table_entry +ffffffff8234d150 t smu7_get_number_of_powerplay_table_entries +ffffffff8234d1c0 t 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smu7_get_sclk_od +ffffffff8234f4b0 t smu7_set_sclk_od +ffffffff8234f570 t smu7_get_mclk_od +ffffffff8234f5d0 t smu7_set_mclk_od +ffffffff8234f690 t smu7_read_sensor +ffffffff8234f8d0 t smu7_avfs_control +ffffffff8234f9a0 t smu7_notify_cac_buffer_info +ffffffff8234fb40 t smu7_get_thermal_temperature_range +ffffffff8234fbe0 t smu7_get_power_profile_mode +ffffffff8234fc20 t smu7_set_power_profile_mode +ffffffff8234fe80 t smu7_odn_edit_dpm_table +ffffffff82350030 t phm_add_voltage +ffffffff82350140 t smu7_copy_and_switch_arb_sets +ffffffff82350370 t smu7_check_dpm_table_updated +ffffffff823504d0 t smu7_odn_initial_default_setting +ffffffff82350600 t smu7_set_dpm_event_sources +ffffffff82350720 t smu7_get_pp_table_entry_callback_func_v0 +ffffffff82350be0 t smu7_get_pp_table_entry_callback_func_v1 +ffffffff82351600 t smu7_get_gpu_power +ffffffff82352000 T smu7_enable_didt_config +ffffffff823523c0 t smu7_program_pt_config_registers +ffffffff82352590 t smu7_enable_didt +ffffffff82352780 T smu7_disable_didt_config +ffffffff82352850 T smu7_enable_smc_cac +ffffffff823528e0 T smu7_disable_smc_cac +ffffffff82352970 T smu7_set_power_limit +ffffffff823529d0 T smu7_enable_power_containment +ffffffff82352b60 T smu7_disable_power_containment +ffffffff82352c80 T smu7_power_control_set_level +ffffffff82353000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff82353080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff82353150 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff82353200 T smu7_fan_ctrl_set_static_mode +ffffffff82353330 T smu7_fan_ctrl_set_default_mode +ffffffff82353410 T smu7_fan_ctrl_start_smc_fan_control +ffffffff82353540 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff82353560 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff82353740 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff82353930 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff82353b10 T smu7_thermal_get_temperature +ffffffff82353b70 T smu7_thermal_disable_alert +ffffffff82353c10 T smu7_thermal_stop_thermal_controller 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smu8_set_cpu_power_state +ffffffff82356b50 t smu8_store_cc6_data +ffffffff82356bd0 t smu8_get_dal_power_level +ffffffff82356c50 t smu8_get_performance_level +ffffffff82356d50 t smu8_get_current_shallow_sleep_clocks +ffffffff82356db0 t smu8_get_clock_by_type +ffffffff82356ef0 t smu8_get_max_high_clocks +ffffffff82356fb0 t smu8_power_off_asic +ffffffff82357030 t smu8_force_clock_level +ffffffff823570a0 t smu8_print_clock_levels +ffffffff82357280 t smu8_read_sensor +ffffffff82357590 t smu8_notify_cac_buffer_info +ffffffff82357640 t smu8_get_thermal_temperature_range +ffffffff823576c0 t smu8_dpm_get_pp_table_entry_callback +ffffffff82358000 T smu9_baco_get_capability +ffffffff823580e0 T smu9_baco_get_state +ffffffff82359000 T convert_to_vid +ffffffff82359050 T convert_to_vddc +ffffffff82359090 T phm_copy_clock_limits_array +ffffffff82359170 T phm_copy_overdrive_settings_limits_array +ffffffff82359250 T phm_set_field_to_u32 +ffffffff823592b0 T phm_wait_on_register +ffffffff823593a0 T phm_wait_on_indirect_register +ffffffff823594b0 T phm_wait_for_register_unequal +ffffffff82359580 T phm_wait_for_indirect_register_unequal +ffffffff82359680 T phm_cf_want_uvd_power_gating +ffffffff823596c0 T phm_cf_want_vce_power_gating +ffffffff82359700 T phm_trim_voltage_table +ffffffff82359820 T phm_get_svi2_mvdd_voltage_table +ffffffff823599a0 T phm_get_svi2_vddci_voltage_table +ffffffff82359b20 T phm_get_svi2_vdd_voltage_table +ffffffff82359bc0 T phm_trim_voltage_table_to_fit_state_table +ffffffff82359cb0 T phm_reset_single_dpm_table +ffffffff82359d10 T phm_setup_pcie_table_entry +ffffffff82359d50 T phm_get_dpm_level_enable_mask_value +ffffffff82359e30 T phm_get_voltage_index +ffffffff82359eb0 T phm_get_voltage_id +ffffffff82359f30 T phm_find_closest_vddci +ffffffff82359fa0 T phm_find_boot_level +ffffffff8235a010 T phm_get_sclk_for_voltage_evv +ffffffff8235a0d0 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff8235a1e0 T phm_get_lowest_enabled_level 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vega10_power_gate_vce +ffffffff82361d70 t vega10_power_gate_uvd +ffffffff82361e10 t vega10_dpm_get_mclk +ffffffff82361eb0 t vega10_dpm_get_sclk +ffffffff82361f50 t vega10_set_power_state_tasks +ffffffff823628b0 t vega10_notify_smc_display_config_after_ps_adjustment +ffffffff82362a60 t vega10_display_configuration_changed_task +ffffffff82362b30 t vega10_set_fan_control_mode +ffffffff82362ba0 t vega10_get_fan_control_mode +ffffffff82362be0 t vega10_check_smc_update_required_for_display_configuration +ffffffff82362c40 t vega10_check_states_equal +ffffffff82362da0 t vega10_get_dal_power_level +ffffffff82362de0 t vega10_get_performance_level +ffffffff82362e70 t vega10_get_clock_by_type_with_latency +ffffffff82363060 t vega10_get_clock_by_type_with_voltage +ffffffff82363140 t vega10_set_watermarks_for_clocks_ranges +ffffffff823631a0 t vega10_display_clock_voltage_request +ffffffff82363220 t vega10_power_off_asic +ffffffff82363290 t vega10_force_clock_level +ffffffff823633c0 t vega10_emit_clock_levels +ffffffff82363530 t vega10_print_clock_levels +ffffffff82363cd0 t vega10_get_sclk_od +ffffffff82363d40 t vega10_set_sclk_od +ffffffff82363e40 t vega10_get_mclk_od +ffffffff82363eb0 t vega10_set_mclk_od +ffffffff82363fa0 t vega10_read_sensor +ffffffff82364200 t vega10_avfs_enable +ffffffff823642c0 t vega10_notify_cac_buffer_info +ffffffff82364370 t vega10_get_thermal_temperature_range +ffffffff82364490 t vega10_get_power_profile_mode +ffffffff823644d0 t vega10_set_power_profile_mode +ffffffff823645f0 t vega10_odn_edit_dpm_table +ffffffff82364b60 t vega10_get_ppfeature_status +ffffffff82364be0 t vega10_set_ppfeature_status +ffffffff82364c80 t vega10_set_mp1_state +ffffffff82364cf0 t vega10_disable_power_features_for_compute_performance +ffffffff82364ee0 t vega10_upload_dpm_bootup_level +ffffffff82364ff0 t vega10_upload_dpm_max_level +ffffffff823650d0 t vega10_odn_initial_default_setting +ffffffff823652b0 t vega10_populate_all_graphic_levels +ffffffff823654c0 t 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smu_get_performance_level +ffffffff823aac30 t smu_get_current_power_state +ffffffff823aac90 t smu_get_fan_speed_rpm +ffffffff823aacf0 t smu_set_fan_speed_rpm +ffffffff823aada0 t smu_get_power_num_states +ffffffff823aae20 t smu_sys_get_pp_table +ffffffff823aae90 t smu_sys_set_pp_table +ffffffff823ab080 t smu_switch_power_profile +ffffffff823ab190 t smu_handle_dpm_task +ffffffff823ab240 t smu_load_microcode +ffffffff823ab330 t smu_dpm_set_power_gate +ffffffff823ab6b0 t smu_set_power_limit +ffffffff823ab7e0 t smu_get_power_profile_mode +ffffffff823ab840 t smu_set_power_profile_mode +ffffffff823ab8a0 t smu_od_edit_dpm_table +ffffffff823ab900 t smu_set_mp1_state +ffffffff823ab960 t smu_gfx_state_change_set +ffffffff823ab9a0 t smu_get_sclk +ffffffff823aba20 t smu_get_mclk +ffffffff823abaa0 t smu_display_configuration_change +ffffffff823abb30 t smu_get_clock_by_type_with_latency +ffffffff823abbf0 t smu_display_clock_voltage_request +ffffffff823abc50 t smu_enable_mgpu_fan_boost +ffffffff823abcb0 t smu_set_display_count +ffffffff823abd20 t smu_set_deep_sleep_dcefclk +ffffffff823abd90 t smu_get_baco_capability +ffffffff823abdf0 t smu_baco_set_state +ffffffff823abed0 t smu_sys_get_pp_feature_mask +ffffffff823abf40 t smu_sys_set_pp_feature_mask +ffffffff823abfb0 t smu_mode2_reset +ffffffff823ac060 t smu_enable_gfx_features +ffffffff823ac110 t smu_set_df_cstate +ffffffff823ac1d0 t smu_set_xgmi_pstate +ffffffff823ac280 t smu_sys_get_gpu_metrics +ffffffff823ac2e0 t smu_set_watermarks_for_clock_ranges +ffffffff823ac360 t smu_display_disable_memory_clock_switch +ffffffff823ac3c0 t smu_get_max_sustainable_clocks_by_dc +ffffffff823ac420 t smu_get_uclk_dpm_states +ffffffff823ac480 t smu_get_dpm_clock_table +ffffffff823ac4e0 t smu_get_prv_buffer_details +ffffffff823ac550 t smu_set_user_clk_dependencies +ffffffff823ac5d0 t smu_adjust_power_state_dynamic +ffffffff823ac830 t smu_apply_default_config_table_settings +ffffffff823ac8e0 t smu_restore_dpm_user_profile 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arcturus_get_fan_speed_rpm +ffffffff823af3b0 t arcturus_get_thermal_temperature_range +ffffffff823af4a0 t arcturus_set_performance_level +ffffffff823af5b0 t arcturus_dump_pptable +ffffffff823af5e0 t arcturus_get_power_limit +ffffffff823af6f0 t arcturus_set_df_cstate +ffffffff823af810 t arcturus_allow_xgmi_power_down +ffffffff823af910 t arcturus_i2c_control_init +ffffffff823afa40 t arcturus_i2c_control_fini +ffffffff823afa80 t arcturus_get_unique_id +ffffffff823afba0 t arcturus_init_smc_tables +ffffffff823afd10 t arcturus_setup_pptable +ffffffff823afe50 t arcturus_set_fan_speed_pwm +ffffffff823b0010 t arcturus_set_fan_speed_rpm +ffffffff823b0140 t arcturus_log_thermal_throttling_event +ffffffff823b0530 t arcturus_get_gpu_metrics +ffffffff823b0740 t arcturus_get_fan_parameters +ffffffff823b0780 t arcturus_get_current_clk_freq_by_table +ffffffff823b08c0 t arcturus_get_smu_metrics_data +ffffffff823b0b30 t arcturus_upload_dpm_level +ffffffff823b0c20 t arcturus_i2c_xfer +ffffffff823b0ec0 t arcturus_i2c_func +ffffffff823b0ef0 t arcturus_set_fan_static_mode +ffffffff823b2000 T cyan_skillfish_set_ppt_funcs +ffffffff823b2030 t cyan_skillfish_print_clk_levels +ffffffff823b2150 t cyan_skillfish_od_edit_dpm_table +ffffffff823b2440 t cyan_skillfish_read_sensor +ffffffff823b2620 t cyan_skillfish_is_dpm_running +ffffffff823b26c0 t cyan_skillfish_init_smc_tables +ffffffff823b27a0 t cyan_skillfish_get_enabled_mask +ffffffff823b27e0 t cyan_skillfish_get_dpm_ultimate_freq +ffffffff823b28a0 t cyan_skillfish_get_gpu_metrics +ffffffff823b2b40 t cyan_skillfish_get_smu_metrics_data +ffffffff823b3000 T navi10_set_ppt_funcs +ffffffff823b3050 t navi10_run_btc +ffffffff823b30d0 t navi10_get_allowed_feature_mask +ffffffff823b33a0 t navi10_set_default_dpm_table +ffffffff823b3810 t navi10_populate_umd_state_clk +ffffffff823b39d0 t navi10_print_clk_levels +ffffffff823b3b60 t navi10_emit_clk_levels +ffffffff823b3d80 t navi10_force_clk_levels +ffffffff823b3eb0 t navi10_od_edit_dpm_table +ffffffff823b4480 t navi10_get_clock_by_type_with_latency +ffffffff823b4580 t navi10_get_power_profile_mode +ffffffff823b47d0 t navi10_set_power_profile_mode +ffffffff823b4aa0 t navi10_dpm_set_vcn_enable +ffffffff823b4b30 t navi10_dpm_set_jpeg_enable +ffffffff823b4bb0 t navi10_read_sensor +ffffffff823b4d30 t navi10_pre_display_config_changed +ffffffff823b4dd0 t navi10_display_config_changed +ffffffff823b4e50 t navi10_notify_smc_display_config +ffffffff823b4fe0 t navi10_is_dpm_running +ffffffff823b5030 t navi10_get_fan_speed_rpm +ffffffff823b50d0 t navi10_set_watermarks_table +ffffffff823b5270 t navi10_get_thermal_temperature_range +ffffffff823b5360 t navi10_get_uclk_dpm_states +ffffffff823b5470 t navi10_set_default_od_settings +ffffffff823b56d0 t navi10_display_disable_memory_clock_switch +ffffffff823b5750 t navi10_get_power_limit +ffffffff823b5870 t navi10_update_pcie_parameters +ffffffff823b59e0 t navi10_i2c_control_init +ffffffff823b5b10 t navi10_i2c_control_fini +ffffffff823b5b50 t navi10_init_smc_tables +ffffffff823b5da0 t navi10_setup_pptable +ffffffff823b5fc0 t navi10_baco_enter +ffffffff823b6010 t navi10_baco_exit +ffffffff823b6110 t navi1x_get_gpu_metrics +ffffffff823b6ab0 t navi10_enable_mgpu_fan_boost +ffffffff823b6b30 t navi10_get_fan_parameters +ffffffff823b6b70 t navi10_post_smu_init +ffffffff823b6e00 t navi10_get_default_config_table_settings +ffffffff823b6e50 t navi10_set_config_table +ffffffff823b6f00 t navi1x_get_smu_metrics_data +ffffffff823b7590 t navi10_od_setting_check_range +ffffffff823b7640 t navi10_i2c_xfer +ffffffff823b78e0 t navi10_i2c_func +ffffffff823b7910 t navi10_umc_hybrid_cdr_workaround +ffffffff823b8000 T sienna_cichlid_set_ppt_funcs +ffffffff823b8050 t sienna_cichlid_run_btc +ffffffff823b80d0 t sienna_cichlid_get_allowed_feature_mask +ffffffff823b8350 t sienna_cichlid_set_default_dpm_table +ffffffff823b8930 t sienna_cichlid_populate_umd_state_clk +ffffffff823b89f0 t sienna_cichlid_print_clk_levels +ffffffff823b8bc0 t sienna_cichlid_force_clk_levels +ffffffff823b8cf0 t sienna_cichlid_od_edit_dpm_table +ffffffff823b9290 t sienna_cichlid_restore_user_od_settings +ffffffff823b9320 t sienna_cichlid_get_power_profile_mode +ffffffff823b9570 t sienna_cichlid_set_power_profile_mode +ffffffff823b9840 t sienna_cichlid_dpm_set_vcn_enable +ffffffff823b9900 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff823b9980 t sienna_cichlid_read_sensor +ffffffff823ba180 t sienna_cichlid_pre_display_config_changed +ffffffff823ba1b0 t sienna_cichlid_display_config_changed +ffffffff823ba210 t sienna_cichlid_notify_smc_display_config +ffffffff823ba3a0 t sienna_cichlid_is_dpm_running +ffffffff823ba3f0 t sienna_cichlid_get_fan_speed_rpm +ffffffff823ba500 t sienna_cichlid_set_watermarks_table +ffffffff823ba690 t sienna_cichlid_get_thermal_temperature_range +ffffffff823ba770 t sienna_cichlid_get_uclk_dpm_states +ffffffff823ba880 t sienna_cichlid_set_default_od_settings +ffffffff823baa30 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff823baab0 t sienna_cichlid_dump_pptable +ffffffff823baae0 t sienna_cichlid_get_power_limit +ffffffff823babb0 t sienna_cichlid_update_pcie_parameters +ffffffff823bace0 t sienna_cichlid_i2c_control_init +ffffffff823bae10 t sienna_cichlid_i2c_control_fini +ffffffff823bae50 t sienna_cichlid_get_unique_id +ffffffff823bafa0 t sienna_cichlid_init_smc_tables +ffffffff823bb2c0 t sienna_cichlid_set_mp1_state +ffffffff823bb300 t sienna_cichlid_setup_pptable +ffffffff823bb740 t sienna_cichlid_system_features_control +ffffffff823bb7d0 t sienna_cichlid_baco_enter +ffffffff823bb820 t sienna_cichlid_baco_exit +ffffffff823bb920 t sienna_cichlid_is_mode1_reset_supported +ffffffff823bb9a0 t sienna_cichlid_is_mode2_reset_supported +ffffffff823bb9d0 t sienna_cichlid_mode2_reset +ffffffff823bbb10 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff823bbb30 t sienna_cichlid_get_gpu_metrics +ffffffff823bc0b0 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff823bc100 t sienna_cichlid_get_fan_parameters +ffffffff823bc140 t sienna_cichlid_gpo_control +ffffffff823bc1f0 t sienna_cichlid_get_ecc_info +ffffffff823bc2e0 t sienna_cichlid_stb_get_data_direct +ffffffff823bc380 t sienna_cichlid_get_default_config_table_settings +ffffffff823bc3f0 t sienna_cichlid_set_config_table +ffffffff823bc4c0 t sienna_cichlid_get_throttler_status_locked +ffffffff823bc620 t sienna_cichlid_get_smartshift_power_percentage +ffffffff823bc750 t sienna_cichlid_i2c_xfer +ffffffff823bc9f0 t sienna_cichlid_i2c_func +ffffffff823bd000 T smu_v11_0_init_microcode +ffffffff823bd140 T smu_v11_0_fini_microcode +ffffffff823bd190 T smu_v11_0_load_microcode +ffffffff823bd2d0 T smu_v11_0_check_fw_status +ffffffff823bd320 T smu_v11_0_check_fw_version +ffffffff823bd4a0 T smu_v11_0_setup_pptable +ffffffff823bd5c0 T smu_v11_0_init_smc_tables +ffffffff823bd720 T smu_v11_0_fini_smc_tables +ffffffff823bd950 T smu_v11_0_init_power +ffffffff823bd9e0 T smu_v11_0_fini_power +ffffffff823bda40 T smu_v11_0_get_vbios_bootup_values +ffffffff823bdda0 T smu_v11_0_notify_memory_pool_location +ffffffff823bde90 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff823bdf10 T smu_v11_0_set_driver_table_location +ffffffff823bdf80 T smu_v11_0_set_tool_table_location +ffffffff823bdff0 T smu_v11_0_init_display_count +ffffffff823be050 T smu_v11_0_set_allowed_mask +ffffffff823be120 T smu_v11_0_system_features_control +ffffffff823be140 T smu_v11_0_notify_display_change +ffffffff823be1b0 T smu_v11_0_init_max_sustainable_clocks +ffffffff823be420 t smu_v11_0_get_max_sustainable_clock +ffffffff823be540 T smu_v11_0_get_current_power_limit +ffffffff823be620 T smu_v11_0_set_power_limit +ffffffff823be770 T smu_v11_0_interrupt_work +ffffffff823be7f0 T smu_v11_0_enable_thermal_alert +ffffffff823be890 T smu_v11_0_disable_thermal_alert +ffffffff823be8b0 T smu_v11_0_get_gfx_vdd +ffffffff823be970 T smu_v11_0_display_clock_voltage_request +ffffffff823beac0 T smu_v11_0_set_hard_freq_limited_range +ffffffff823beba0 T smu_v11_0_gfx_off_control +ffffffff823bec10 T smu_v11_0_get_fan_control_mode +ffffffff823bec60 T smu_v11_0_set_fan_speed_pwm +ffffffff823bee10 t smu_v11_0_set_fan_static_mode +ffffffff823befd0 T smu_v11_0_set_fan_speed_rpm +ffffffff823bf110 T smu_v11_0_get_fan_speed_pwm +ffffffff823bf250 T smu_v11_0_get_fan_speed_rpm +ffffffff823bf350 T smu_v11_0_set_fan_control_mode +ffffffff823bf4f0 T smu_v11_0_set_xgmi_pstate +ffffffff823bf510 T smu_v11_0_register_irq_handler +ffffffff823bf5d0 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff823bf660 T smu_v11_0_set_azalia_d3_pme +ffffffff823bf680 T smu_v11_0_baco_set_armd3_sequence +ffffffff823bf6a0 T smu_v11_0_baco_is_support +ffffffff823bf730 T smu_v11_0_baco_get_state +ffffffff823bf760 T smu_v11_0_baco_set_state +ffffffff823bfa10 T smu_v11_0_baco_enter +ffffffff823bfb00 T smu_v11_0_baco_exit +ffffffff823bfc30 T smu_v11_0_mode1_reset +ffffffff823bfcb0 T smu_v11_0_handle_passthrough_sbr +ffffffff823bfcd0 T smu_v11_0_get_dpm_ultimate_freq +ffffffff823bfe10 T smu_v11_0_set_soft_freq_limited_range +ffffffff823bfee0 T smu_v11_0_set_performance_level +ffffffff823c0230 T smu_v11_0_set_power_source +ffffffff823c0290 T smu_v11_0_get_dpm_freq_by_index +ffffffff823c0340 T smu_v11_0_get_dpm_level_count +ffffffff823c03e0 T smu_v11_0_set_single_dpm_table +ffffffff823c0650 T smu_v11_0_get_dpm_level_range +ffffffff823c07b0 T smu_v11_0_get_current_pcie_link_width_level +ffffffff823c0800 T smu_v11_0_get_current_pcie_link_width +ffffffff823c0860 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff823c08b0 T smu_v11_0_get_current_pcie_link_speed +ffffffff823c0910 T smu_v11_0_gfx_ulv_control +ffffffff823c0980 T smu_v11_0_deep_sleep_control +ffffffff823c0b30 T smu_v11_0_restore_user_od_settings +ffffffff823c0bc0 T smu_v11_0_set_smu_mailbox_registers +ffffffff823c0c30 t smu_v11_0_set_irq_state +ffffffff823c11e0 t smu_v11_0_irq_process +ffffffff823c2000 T vangogh_set_ppt_funcs +ffffffff823c2040 t vangogh_set_default_dpm_tables +ffffffff823c2070 t vangogh_common_print_clk_levels +ffffffff823c24e0 t vangogh_force_clk_levels +ffffffff823c2710 t vangogh_od_edit_dpm_table +ffffffff823c2c70 t vangogh_get_power_profile_mode +ffffffff823c2d70 t vangogh_set_power_profile_mode +ffffffff823c2ea0 t vangogh_dpm_set_vcn_enable +ffffffff823c2ef0 t vangogh_dpm_set_jpeg_enable +ffffffff823c2f40 t vangogh_read_sensor +ffffffff823c3580 t vangogh_get_apu_thermal_limit +ffffffff823c35a0 t vangogh_set_apu_thermal_limit +ffffffff823c35c0 t vangogh_is_dpm_running +ffffffff823c3620 t vangogh_set_watermarks_table +ffffffff823c37a0 t vangogh_set_performance_level +ffffffff823c3fb0 t vangogh_get_power_limit +ffffffff823c4110 t vangogh_get_ppt_limit +ffffffff823c4180 t vangogh_get_dpm_clock_table +ffffffff823c42f0 t vangogh_init_smc_tables +ffffffff823c4530 t vangogh_system_features_control +ffffffff823c4580 t vangogh_set_power_limit +ffffffff823c46d0 t vangogh_get_gfxoff_status +ffffffff823c4760 t vangogh_get_gfxoff_entrycount +ffffffff823c47d0 t vangogh_set_gfxoff_residency +ffffffff823c4840 t vangogh_get_gfxoff_residency +ffffffff823c4880 t vangogh_mode2_reset +ffffffff823c49c0 t vangogh_common_get_gpu_metrics +ffffffff823c5140 t vangogh_post_smu_init +ffffffff823c52e0 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff823c5350 t vangogh_force_dpm_limit_value +ffffffff823c5480 t vangogh_get_dpm_ultimate_freq +ffffffff823c5840 t vangogh_set_soft_freq_limited_range +ffffffff823c59c0 t vangogh_get_gpu_metrics_v2_3 +ffffffff823c6000 T renoir_set_ppt_funcs +ffffffff823c60a0 t renoir_get_current_power_state +ffffffff823c6120 t renoir_print_clk_levels +ffffffff823c6530 t renoir_force_clk_levels +ffffffff823c6750 t renoir_od_edit_dpm_table +ffffffff823c6a50 t renoir_get_power_profile_mode +ffffffff823c6b20 t renoir_set_power_profile_mode +ffffffff823c6c50 t renoir_dpm_set_vcn_enable +ffffffff823c6cd0 t renoir_dpm_set_jpeg_enable +ffffffff823c6d50 t renoir_read_sensor +ffffffff823c7100 t renoir_is_dpm_running +ffffffff823c7140 t renoir_set_watermarks_table +ffffffff823c72f0 t renoir_set_performance_level +ffffffff823c7810 t renoir_get_dpm_clock_table +ffffffff823c7b60 t renoir_init_smc_tables +ffffffff823c7cd0 t renoir_get_enabled_mask +ffffffff823c7d10 t renoir_get_dpm_ultimate_freq +ffffffff823c7fb0 t renoir_get_gpu_metrics +ffffffff823c81d0 t renoir_gfx_state_change_set +ffffffff823c8200 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff823c82a0 t renoir_force_dpm_limit_value +ffffffff823c9000 T smu_v12_0_check_fw_status +ffffffff823c9050 T smu_v12_0_check_fw_version +ffffffff823c90c0 T smu_v12_0_powergate_sdma +ffffffff823c9110 T smu_v12_0_set_gfx_cgpg +ffffffff823c9170 T smu_v12_0_get_gfxoff_status +ffffffff823c9200 T smu_v12_0_gfx_off_control +ffffffff823c9320 T smu_v12_0_fini_smc_tables +ffffffff823c93d0 T smu_v12_0_set_default_dpm_tables +ffffffff823c9400 T smu_v12_0_mode2_reset +ffffffff823c9420 T smu_v12_0_set_soft_freq_limited_range +ffffffff823c9560 T smu_v12_0_set_driver_table_location +ffffffff823c95d0 T smu_v12_0_get_vbios_bootup_values +ffffffff823ca000 T aldebaran_set_ppt_funcs +ffffffff823ca050 t aldebaran_get_allowed_feature_mask +ffffffff823ca0a0 t aldebaran_set_default_dpm_table +ffffffff823ca2a0 t aldebaran_populate_umd_state_clk +ffffffff823ca3a0 t aldebaran_print_clk_levels +ffffffff823ca560 t aldebaran_force_clk_levels +ffffffff823ca730 t aldebaran_usr_edit_dpm_table +ffffffff823ca950 t aldebaran_read_sensor +ffffffff823cab70 t aldebaran_is_dpm_running +ffffffff823cabc0 t aldebaran_get_thermal_temperature_range +ffffffff823cac90 t aldebaran_set_performance_level +ffffffff823cad40 t aldebaran_get_power_limit +ffffffff823caed0 t aldebaran_set_df_cstate +ffffffff823caf50 t aldebaran_allow_xgmi_power_down +ffffffff823caff0 t aldebaran_i2c_control_init +ffffffff823cb0b0 t aldebaran_i2c_control_fini +ffffffff823cb0f0 t aldebaran_get_unique_id +ffffffff823cb1d0 t aldebaran_init_smc_tables +ffffffff823cb390 t aldebaran_set_mp1_state +ffffffff823cb3d0 t aldebaran_setup_pptable +ffffffff823cb4a0 t aldebaran_system_features_control +ffffffff823cb600 t aldebaran_set_power_limit +ffffffff823cb690 t aldebaran_is_baco_supported +ffffffff823cb6c0 t aldebaran_is_mode1_reset_supported +ffffffff823cb6f0 t aldebaran_is_mode2_reset_supported +ffffffff823cb720 t aldebaran_mode1_reset +ffffffff823cb800 t aldebaran_mode2_reset +ffffffff823cbb20 t aldebaran_set_soft_freq_limited_range +ffffffff823cbd30 t aldebaran_log_thermal_throttling_event +ffffffff823cc040 t aldebaran_get_gpu_metrics +ffffffff823cc2c0 t aldebaran_smu_handle_passthrough_sbr +ffffffff823cc2e0 t aldebaran_smu_send_hbm_bad_page_num +ffffffff823cc370 t aldebaran_get_ecc_info +ffffffff823cc4d0 t aldebaran_send_hbm_bad_channel_flag +ffffffff823cc5a0 t aldebaran_get_current_clk_freq_by_table +ffffffff823cc6e0 t aldebaran_get_smu_metrics_data +ffffffff823cc950 t aldebaran_upload_dpm_level +ffffffff823cca40 t aldebaran_i2c_xfer +ffffffff823ccce0 t aldebaran_i2c_func +ffffffff823cd000 T smu_v13_0_init_microcode +ffffffff823cd120 T smu_v13_0_fini_microcode +ffffffff823cd170 T smu_v13_0_load_microcode +ffffffff823cd1a0 T smu_v13_0_init_pptable_microcode +ffffffff823cd350 T smu_v13_0_get_pptable_from_firmware +ffffffff823cd470 T smu_v13_0_check_fw_status +ffffffff823cd4e0 T smu_v13_0_check_fw_version +ffffffff823cd560 T smu_v13_0_setup_pptable +ffffffff823cd700 T smu_v13_0_init_smc_tables +ffffffff823cd880 T smu_v13_0_fini_smc_tables +ffffffff823cda90 T smu_v13_0_init_power +ffffffff823cdb10 T smu_v13_0_fini_power +ffffffff823cdb90 T smu_v13_0_get_vbios_bootup_values +ffffffff823cde40 T smu_v13_0_notify_memory_pool_location +ffffffff823cdf00 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff823cdf80 T smu_v13_0_set_driver_table_location +ffffffff823cdff0 T smu_v13_0_set_tool_table_location +ffffffff823ce060 T smu_v13_0_init_display_count +ffffffff823ce0a0 T smu_v13_0_set_allowed_mask +ffffffff823ce170 T smu_v13_0_gfx_off_control +ffffffff823ce1f0 T smu_v13_0_system_features_control +ffffffff823ce210 T smu_v13_0_notify_display_change +ffffffff823ce270 T smu_v13_0_init_max_sustainable_clocks +ffffffff823ce4e0 t smu_v13_0_get_max_sustainable_clock +ffffffff823ce600 T smu_v13_0_get_current_power_limit +ffffffff823ce6e0 T smu_v13_0_set_power_limit +ffffffff823ce800 T smu_v13_0_enable_thermal_alert +ffffffff823ce890 T smu_v13_0_disable_thermal_alert +ffffffff823ce8d0 T smu_v13_0_get_gfx_vdd +ffffffff823ce990 T smu_v13_0_display_clock_voltage_request +ffffffff823ceae0 T smu_v13_0_set_hard_freq_limited_range +ffffffff823cebc0 T smu_v13_0_get_fan_control_mode +ffffffff823cec10 T smu_v13_0_set_fan_speed_pwm +ffffffff823cee30 t smu_v13_0_set_fan_static_mode +ffffffff823cf000 T smu_v13_0_set_fan_control_mode +ffffffff823cf160 T smu_v13_0_set_fan_speed_rpm +ffffffff823cf310 T smu_v13_0_set_xgmi_pstate +ffffffff823cf330 T smu_v13_0_register_irq_handler +ffffffff823cf400 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff823cf490 T smu_v13_0_set_azalia_d3_pme +ffffffff823cf4b0 T smu_v13_0_wait_for_event +ffffffff823cf500 T smu_v13_0_get_dpm_ultimate_freq +ffffffff823cf660 T smu_v13_0_set_soft_freq_limited_range +ffffffff823cf730 T smu_v13_0_set_performance_level +ffffffff823cfe90 T smu_v13_0_set_power_source +ffffffff823cfef0 T smu_v13_0_get_dpm_freq_by_index +ffffffff823cffa0 T smu_v13_0_set_single_dpm_table +ffffffff823d02a0 T smu_v13_0_get_current_pcie_link_width_level +ffffffff823d02f0 T smu_v13_0_get_current_pcie_link_width +ffffffff823d0350 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff823d03a0 T smu_v13_0_get_current_pcie_link_speed +ffffffff823d03f0 T smu_v13_0_set_vcn_enable +ffffffff823d04b0 T smu_v13_0_set_jpeg_enable +ffffffff823d04d0 T smu_v13_0_run_btc +ffffffff823d0550 T smu_v13_0_gpo_control +ffffffff823d05e0 T smu_v13_0_deep_sleep_control +ffffffff823d0850 T smu_v13_0_gfx_ulv_control +ffffffff823d08c0 T smu_v13_0_baco_set_armd3_sequence +ffffffff823d0930 T smu_v13_0_baco_is_support +ffffffff823d09c0 T smu_v13_0_baco_get_state +ffffffff823d09f0 T smu_v13_0_baco_set_state +ffffffff823d0ac0 T smu_v13_0_baco_enter +ffffffff823d0be0 T smu_v13_0_baco_exit +ffffffff823d0c80 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff823d0cc0 T smu_v13_0_od_edit_dpm_table +ffffffff823d0f80 T smu_v13_0_set_default_dpm_tables +ffffffff823d0fb0 T smu_v13_0_set_smu_mailbox_registers +ffffffff823d1020 T smu_v13_0_mode1_reset +ffffffff823d10a0 T smu_v13_0_update_pcie_parameters +ffffffff823d1310 t smu_v13_0_set_irq_state +ffffffff823d18c0 t smu_v13_0_irq_process +ffffffff823d2000 T smu_v13_0_0_set_ppt_funcs +ffffffff823d20f0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff823d2230 t smu_v13_0_0_set_default_dpm_table +ffffffff823d2650 t smu_v13_0_0_populate_umd_state_clk +ffffffff823d2790 t smu_v13_0_0_print_clk_levels +ffffffff823d28a0 t smu_v13_0_0_force_clk_levels +ffffffff823d2a20 t smu_v13_0_0_od_edit_dpm_table +ffffffff823d2f10 t smu_v13_0_0_restore_user_od_settings +ffffffff823d2fd0 t smu_v13_0_0_get_power_profile_mode +ffffffff823d30d0 t smu_v13_0_0_set_power_profile_mode +ffffffff823d3330 t smu_v13_0_0_read_sensor +ffffffff823d3550 t smu_v13_0_0_is_dpm_running +ffffffff823d35a0 t smu_v13_0_0_get_fan_speed_pwm +ffffffff823d3680 t smu_v13_0_0_get_fan_speed_rpm +ffffffff823d36f0 t smu_v13_0_0_get_thermal_temperature_range +ffffffff823d37f0 t smu_v13_0_0_set_default_od_settings +ffffffff823d3920 t smu_v13_0_0_dump_pptable +ffffffff823d3950 t smu_v13_0_0_get_power_limit +ffffffff823d3a30 t smu_v13_0_0_set_df_cstate +ffffffff823d3a50 t smu_v13_0_0_i2c_control_init +ffffffff823d3b80 t smu_v13_0_0_i2c_control_fini +ffffffff823d3bc0 t smu_v13_0_0_get_unique_id +ffffffff823d3c60 t smu_v13_0_0_init_smc_tables +ffffffff823d3eb0 t smu_v13_0_0_set_mp1_state +ffffffff823d3ef0 t smu_v13_0_0_setup_pptable +ffffffff823d4050 t smu_v13_0_0_system_features_control +ffffffff823d4060 t smu_v13_0_0_baco_enter +ffffffff823d40c0 t smu_v13_0_0_baco_exit +ffffffff823d4120 t smu_v13_0_0_is_mode1_reset_supported +ffffffff823d4180 t smu_v13_0_0_mode1_reset +ffffffff823d42a0 t smu_v13_0_0_mode2_reset +ffffffff823d42f0 t smu_v13_0_0_enable_gfx_features +ffffffff823d4340 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff823d4460 t smu_v13_0_0_get_gpu_metrics +ffffffff823d48a0 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff823d48f0 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff823d4980 t smu_v13_0_0_get_ecc_info +ffffffff823d4a80 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff823d4b10 t smu_v13_0_0_i2c_xfer +ffffffff823d4db0 t smu_v13_0_0_i2c_func +ffffffff823d5000 T smu_v13_0_4_set_ppt_funcs +ffffffff823d50c0 t smu_v13_0_4_print_clk_levels +ffffffff823d5130 t smu_v13_0_4_force_clk_levels +ffffffff823d53f0 t smu_v13_0_4_read_sensor +ffffffff823d56d0 t smu_v13_0_4_is_dpm_running +ffffffff823d5720 t smu_v13_0_4_set_watermarks_table +ffffffff823d58a0 t smu_v13_0_4_set_performance_level +ffffffff823d6460 t smu_v13_0_4_init_smc_tables +ffffffff823d65d0 t smu_v13_0_4_fini_smc_tables +ffffffff823d6680 t smu_v13_0_4_system_features_control +ffffffff823d6700 t smu_v13_0_4_mode2_reset +ffffffff823d6720 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff823d6b40 t smu_v13_0_4_get_gpu_metrics +ffffffff823d6d10 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff823d6d70 t smu_v13_0_4_get_current_clk_freq +ffffffff823d7000 T smu_v13_0_5_set_ppt_funcs +ffffffff823d70a0 t smu_v13_0_5_set_default_dpm_tables +ffffffff823d70d0 t smu_v13_0_5_print_clk_levels +ffffffff823d7160 t smu_v13_0_5_force_clk_levels +ffffffff823d72d0 t smu_v13_0_5_od_edit_dpm_table +ffffffff823d7590 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff823d75b0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff823d75d0 t smu_v13_0_5_read_sensor +ffffffff823d77f0 t smu_v13_0_5_is_dpm_running +ffffffff823d7840 t smu_v13_0_5_set_watermarks_table +ffffffff823d79c0 t smu_v13_0_5_set_performance_level +ffffffff823d7f60 t smu_v13_0_5_init_smc_tables +ffffffff823d80d0 t smu_v13_0_5_fini_smc_tables +ffffffff823d8180 t smu_v13_0_5_system_features_control +ffffffff823d81d0 t smu_v13_0_5_mode2_reset +ffffffff823d8250 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff823d8690 t smu_v13_0_5_get_gpu_metrics +ffffffff823d87e0 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff823d9000 T smu_v13_0_6_set_ppt_funcs +ffffffff823d9050 t smu_v13_0_6_get_allowed_feature_mask +ffffffff823d90a0 t smu_v13_0_6_set_default_dpm_table +ffffffff823d95a0 t smu_v13_0_6_populate_umd_state_clk +ffffffff823d96a0 t smu_v13_0_6_print_clk_levels +ffffffff823d9a20 t smu_v13_0_6_force_clk_levels +ffffffff823d9bf0 t smu_v13_0_6_usr_edit_dpm_table +ffffffff823d9e10 t smu_v13_0_6_read_sensor +ffffffff823da3a0 t smu_v13_0_6_is_dpm_running +ffffffff823da420 t smu_v13_0_6_get_thermal_temperature_range +ffffffff823da570 t smu_v13_0_6_set_performance_level +ffffffff823da680 t smu_v13_0_6_get_power_limit +ffffffff823da750 t smu_v13_0_6_set_df_cstate +ffffffff823da770 t smu_v13_0_6_allow_xgmi_power_down +ffffffff823da790 t smu_v13_0_6_i2c_control_init +ffffffff823da8c0 t smu_v13_0_6_i2c_control_fini +ffffffff823da900 t smu_v13_0_6_get_unique_id +ffffffff823da980 t smu_v13_0_6_init_smc_tables +ffffffff823dab10 t smu_v13_0_6_check_fw_status +ffffffff823dab60 t smu_v13_0_6_setup_pptable +ffffffff823dab90 t smu_v13_0_6_system_features_control +ffffffff823dac30 t smu_v13_0_6_get_enabled_mask +ffffffff823daca0 t smu_v13_0_6_set_power_limit +ffffffff823dacc0 t smu_v13_0_6_register_irq_handler +ffffffff823dad20 t smu_v13_0_6_is_baco_supported +ffffffff823dad50 t smu_v13_0_6_is_mode1_reset_supported +ffffffff823dad80 t smu_v13_0_6_is_mode2_reset_supported +ffffffff823dadb0 t smu_v13_0_6_mode1_reset +ffffffff823dae60 t smu_v13_0_6_mode2_reset +ffffffff823db110 t smu_v13_0_6_get_dpm_ultimate_freq +ffffffff823db320 t smu_v13_0_6_set_soft_freq_limited_range +ffffffff823db560 t smu_v13_0_6_log_thermal_throttling_event +ffffffff823db850 t smu_v13_0_6_get_gpu_metrics +ffffffff823dbba0 t smu_v13_0_6_smu_send_hbm_bad_page_num +ffffffff823dbc30 t smu_v13_0_6_get_smu_metrics_data +ffffffff823dbec0 t smu_v13_0_6_upload_dpm_level +ffffffff823dbfc0 t smu_v13_0_6_i2c_xfer +ffffffff823dc2c0 t smu_v13_0_6_i2c_func +ffffffff823dc2f0 t smu_v13_0_6_set_irq_state +ffffffff823dc580 t smu_v13_0_6_irq_process +ffffffff823dd000 T smu_v13_0_7_set_ppt_funcs +ffffffff823dd060 t smu_v13_0_7_get_allowed_feature_mask +ffffffff823dd1d0 t smu_v13_0_7_set_default_dpm_table +ffffffff823dd5f0 t smu_v13_0_7_populate_umd_state_clk +ffffffff823dd730 t smu_v13_0_7_print_clk_levels +ffffffff823dd840 t smu_v13_0_7_force_clk_levels +ffffffff823dd9c0 t smu_v13_0_7_od_edit_dpm_table +ffffffff823ddeb0 t smu_v13_0_7_restore_user_od_settings +ffffffff823ddf70 t smu_v13_0_7_get_power_profile_mode +ffffffff823de0b0 t smu_v13_0_7_set_power_profile_mode +ffffffff823de300 t smu_v13_0_7_read_sensor +ffffffff823de510 t smu_v13_0_7_is_dpm_running +ffffffff823de560 t smu_v13_0_7_get_fan_speed_pwm +ffffffff823de640 t smu_v13_0_7_get_fan_speed_rpm +ffffffff823de6b0 t smu_v13_0_7_get_thermal_temperature_range +ffffffff823de7b0 t smu_v13_0_7_set_default_od_settings +ffffffff823de8e0 t smu_v13_0_7_dump_pptable +ffffffff823de910 t smu_v13_0_7_get_power_limit +ffffffff823de9f0 t smu_v13_0_7_set_df_cstate +ffffffff823dea10 t smu_v13_0_7_init_smc_tables +ffffffff823dec00 t smu_v13_0_7_check_fw_status +ffffffff823dec50 t smu_v13_0_7_set_mp1_state +ffffffff823dec90 t smu_v13_0_7_setup_pptable +ffffffff823dedf0 t smu_v13_0_7_baco_enter +ffffffff823dee50 t smu_v13_0_7_baco_exit +ffffffff823deeb0 t smu_v13_0_7_is_mode1_reset_supported +ffffffff823deef0 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff823df010 t smu_v13_0_7_get_gpu_metrics +ffffffff823df440 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff823e0000 T yellow_carp_set_ppt_funcs +ffffffff823e0050 t yellow_carp_set_default_dpm_tables +ffffffff823e0080 t yellow_carp_print_clk_levels +ffffffff823e0100 t yellow_carp_force_clk_levels +ffffffff823e03c0 t yellow_carp_od_edit_dpm_table +ffffffff823e0680 t yellow_carp_dpm_set_vcn_enable +ffffffff823e06a0 t yellow_carp_dpm_set_jpeg_enable +ffffffff823e06c0 t yellow_carp_read_sensor +ffffffff823e0a30 t yellow_carp_is_dpm_running +ffffffff823e0a80 t yellow_carp_set_watermarks_table +ffffffff823e0c00 t yellow_carp_set_performance_level +ffffffff823e16a0 t yellow_carp_init_smc_tables +ffffffff823e1810 t yellow_carp_fini_smc_tables +ffffffff823e18c0 t yellow_carp_system_features_control +ffffffff823e1910 t yellow_carp_get_gfxoff_status +ffffffff823e19a0 t yellow_carp_mode2_reset +ffffffff823e1a20 t yellow_carp_get_dpm_ultimate_freq +ffffffff823e1e60 t yellow_carp_get_gpu_metrics +ffffffff823e2010 t yellow_carp_post_smu_init +ffffffff823e2090 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff823e20f0 t yellow_carp_get_current_clk_freq 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wsdisplay_emulbell +ffffffff82441350 T wsdisplay_emulinput +ffffffff824413f0 T wsdisplay_kbdinput +ffffffff824414f0 T wsdisplay_rawkbdinput +ffffffff82441590 T wsdisplay_switch3 +ffffffff82441740 T wsdisplay_switch1 +ffffffff82441890 T wsdisplay_switch2 +ffffffff82441a30 T wsdisplay_reset +ffffffff82441aa0 T wsscreen_attach_sync +ffffffff82441b10 T wsscreen_detach_sync +ffffffff82441b50 T wsscreen_lookup_sync +ffffffff82441ba0 T wsdisplay_maxscreenidx +ffffffff82441bd0 T wsdisplay_screenstate +ffffffff82441c20 T wsdisplay_getactivescreen +ffffffff82441c60 T wsscreen_switchwait +ffffffff82441d70 T wsdisplay_kbdholdscreen +ffffffff82441de0 T wsdisplay_set_console_kbd +ffffffff82441e50 T wsdisplay_set_cons_kbd +ffffffff82441e90 T wsdisplay_unset_cons_kbd +ffffffff82441ee0 T wsdisplay_enter_ddb +ffffffff82441f70 T wsdisplay_suspend +ffffffff82441fe0 T wsdisplay_suspend_device +ffffffff82442220 T wsdisplay_resume +ffffffff82442300 T wsdisplay_resume_device +ffffffff824423a0 T wsscrollback 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wstpad_process_input +ffffffff82452650 T wstpad_track_interval +ffffffff824527b0 T wstpad_init_deceleration +ffffffff82452880 T wstpad_decelerate +ffffffff824529f0 T wstpad_filter +ffffffff82452cd0 T wstpad_compat_convert +ffffffff82452d70 T wstpad_init +ffffffff82452ed0 T wstpad_configure +ffffffff824534c0 t isqrt +ffffffff824536b0 T wstpad_reset +ffffffff82453730 T wstpad_cleanup +ffffffff824537c0 T wstpad_set_param +ffffffff82453ae0 T wstpad_get_param +ffffffff82454000 T wsmux_mux_open +ffffffff82454120 T wsmux_mux_close +ffffffff824541e0 T wsmux_do_ioctl +ffffffff82454760 T wsmux_do_displayioctl +ffffffff82454880 T wsmux_evsrc_set_display +ffffffff824548d0 T wsmuxattach +ffffffff82454900 T wsmux_getmux +ffffffff82454b40 T wsmux_create +ffffffff82454c20 T wsmuxopen +ffffffff82454d80 T wsmux_detach_sc +ffffffff82454e90 T wsmux_do_open +ffffffff82454f80 T wsmuxclose +ffffffff82455080 T wsmux_do_close +ffffffff82455120 T wsmuxread +ffffffff824551a0 T wsmuxioctl +ffffffff824551d0 T wsmux_add_mux +ffffffff824552b0 T wsmux_detach_sc_locked +ffffffff824553a0 T wsmuxkqfilter +ffffffff82455400 T wsmux_depth +ffffffff824554a0 T wsmux_attach_sc +ffffffff82455660 T wsmux_set_display +ffffffff82455790 T wsmux_get_layout +ffffffff824557c0 T wsmux_set_layout +ffffffff82456000 T wsemul_pick +ffffffff82456070 T wsemul_getname +ffffffff82457000 T wsemul_getchar +ffffffff824571d0 T wsemul_local_translate +ffffffff824574b0 T wsemul_utf8_translate +ffffffff82458000 T wsemul_vt100_cnattach +ffffffff82458200 T wsemul_vt100_attach +ffffffff824584d0 T wsemul_vt100_output +ffffffff824587e0 T wsemul_vt100_detach +ffffffff82458910 T wsemul_vt100_resetop +ffffffff82458ac0 T wsemul_vt100_output_esc +ffffffff82459140 T wsemul_vt100_output_csi +ffffffff82459280 T wsemul_vt100_output_scs94 +ffffffff82459340 T wsemul_vt100_output_scs94_percent +ffffffff82459390 T wsemul_vt100_output_scs96 +ffffffff824594e0 T wsemul_vt100_output_scs96_percent +ffffffff82459530 T wsemul_vt100_output_esc_hash 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wsemul_vt100_translate +ffffffff8245f000 T pckbdprobe +ffffffff8245f140 T pckbdattach +ffffffff8245f320 T pckbdactivate +ffffffff8245f3b0 T pckbd_enable +ffffffff8245f500 T pckbd_set_leds +ffffffff8245f590 T pckbd_ioctl +ffffffff8245f6e0 T pckbd_cngetc +ffffffff8245f8c0 T pckbd_cnpollc +ffffffff8245f960 T pckbd_cnbell +ffffffff8245f9b0 T pckbd_set_xtscancode +ffffffff8245fb30 T pckbd_init +ffffffff8245fb90 T pckbd_input +ffffffff8245fe00 T pckbd_scancode_translate +ffffffff8245fee0 T pckbd_bell +ffffffff8245ff30 T pckbd_hookup_bell +ffffffff8245ff70 T pckbd_cnattach +ffffffff82461000 T pmsprobe +ffffffff824610b0 T pmsattach +ffffffff82461290 T pmsactivate +ffffffff824612f0 T pms_enable +ffffffff82461360 T pms_ioctl +ffffffff824613b0 T pms_disable +ffffffff824613f0 T pms_sec_enable +ffffffff82461460 T pms_sec_ioctl +ffffffff824614b0 T pms_sec_disable +ffffffff824614f0 T pms_ioctl_mouse +ffffffff82461610 T pms_sync_mouse +ffffffff82461670 T pms_proc_mouse +ffffffff82461710 T pms_enable_synaptics +ffffffff82461b40 T pms_ioctl_synaptics +ffffffff82461c10 T pms_sync_synaptics +ffffffff82461c70 T pms_proc_synaptics +ffffffff82461ff0 T pms_disable_synaptics +ffffffff824620d0 T pms_enable_alps +ffffffff824625f0 T pms_ioctl_alps +ffffffff824626a0 T pms_sync_alps +ffffffff82462750 T pms_proc_alps +ffffffff824629a0 T pms_enable_elantech_v1 +ffffffff82462bb0 T pms_ioctl_elantech +ffffffff82462c70 T pms_sync_elantech_v1 +ffffffff82462d50 T pms_proc_elantech_v1 +ffffffff82462ec0 T pms_enable_elantech_v2 +ffffffff82463060 T pms_sync_elantech_v2 +ffffffff82463150 T pms_proc_elantech_v2 +ffffffff824632c0 T pms_enable_elantech_v3 +ffffffff82463460 T pms_sync_elantech_v3 +ffffffff824634f0 T pms_proc_elantech_v3 +ffffffff824636e0 T pms_enable_elantech_v4 +ffffffff824638e0 T pms_sync_elantech_v4 +ffffffff824639b0 T pms_proc_elantech_v4 +ffffffff82463d00 T pms_enable_intelli +ffffffff82463ef0 T pms_cmd +ffffffff82463f60 T pms_spec_cmd +ffffffff824641f0 T pms_set_scaling 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otus_get_delta_slope +ffffffff8255b9e0 T otus_set_macaddr +ffffffff8255bb00 T otus_led_newstate_type1 +ffffffff8255bb30 T otus_led_newstate_type2 +ffffffff8255c000 T umb_match +ffffffff8255c0d0 T umb_attach +ffffffff8255c900 T umb_detach +ffffffff8255caa0 T umb_state_task +ffffffff8255cc40 T umb_get_response_task +ffffffff8255cd50 T umb_statechg_timeout +ffffffff8255cdc0 T umb_intr +ffffffff8255ceb0 T umb_ncm_setup +ffffffff8255d070 T umb_ncm_setup_format +ffffffff8255d140 T umb_ioctl +ffffffff8255d480 T umb_start +ffffffff8255d6f0 T umb_rtrequest +ffffffff8255d9e0 T umb_watchdog +ffffffff8255da60 T umb_output +ffffffff8255dac0 T umb_kstat_attach +ffffffff8255dbf0 T umb_open +ffffffff8255dc50 T umb_down +ffffffff8255dee0 T umb_close +ffffffff8255df40 T umb_kstat_detach +ffffffff8255dfd0 T umb_alloc_xfers +ffffffff8255e090 T umb_free_xfers +ffffffff8255e110 T umb_alloc_bulkpipes +ffffffff8255e210 T umb_rx +ffffffff8255e270 T umb_close_bulkpipes +ffffffff8255e300 T umb_setpin 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athn_usb_watchdog +ffffffff8256a3f0 T athn_usb_node_alloc +ffffffff8256a410 T athn_usb_newauth +ffffffff8256a5c0 T athn_usb_newassoc +ffffffff8256a6f0 T athn_usb_node_free +ffffffff8256a7f0 T athn_usb_updateslot +ffffffff8256a820 T athn_usb_updateedca +ffffffff8256a8e0 T athn_usb_set_key +ffffffff8256aa20 T athn_usb_delete_key +ffffffff8256ab70 T athn_usb_newstate +ffffffff8256ac70 T athn_usb_media_change +ffffffff8256ad00 T athn_usb_next_scan +ffffffff8256ada0 T athn_usb_rx_enable +ffffffff8256ae10 T athn_usb_intr +ffffffff8256afa0 T athn_usb_alloc_rx_list +ffffffff8256b050 T athn_usb_alloc_tx_list +ffffffff8256b150 T athn_usb_do_async +ffffffff8256b270 T athn_usb_htc_msg +ffffffff8256b300 T athn_usb_htc_connect_svc +ffffffff8256b4d0 T athn_usb_wmi_xcmd +ffffffff8256b700 T athn_usb_read_rom +ffffffff8256b860 T athn_usb_stop +ffffffff8256bb70 T athn_usb_init +ffffffff8256bfc0 T athn_usb_newstate_cb +ffffffff8256c2c0 T athn_usb_remove_node +ffffffff8256c3c0 T athn_usb_switch_chan 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uow_match +ffffffff8256f070 T uow_attach +ffffffff8256f510 T uow_detach +ffffffff8256f5e0 T uow_activate +ffffffff8256f650 T uow_intr +ffffffff8256f6a0 T uow_reset +ffffffff8256f6c0 T uow_ow_reset +ffffffff8256f710 T uow_ow_bit +ffffffff8256f790 T uow_ow_read_byte +ffffffff8256f810 T uow_ow_write_byte +ffffffff8256f870 T uow_ow_read_block +ffffffff8256f900 T uow_ow_write_block +ffffffff8256f970 T uow_ow_matchrom +ffffffff8256fa40 T uow_cmd +ffffffff8256fb80 T uow_read +ffffffff8256fc90 T uow_write +ffffffff8256fd70 T uow_ow_search +ffffffff82570000 T uberry_match +ffffffff82570070 T uberry_attach +ffffffff825701f0 T uberry_detach +ffffffff82570220 T uberry_charge +ffffffff825702d0 T uberry_pearlmode +ffffffff82571000 T upd_match +ffffffff82571140 T upd_attach +ffffffff825713b0 T upd_detach +ffffffff825714a0 T upd_lookup_usage_entry +ffffffff82571560 T upd_intr +ffffffff82571590 T upd_attach_sensor_tree +ffffffff82571860 T upd_refresh +ffffffff82571980 T upd_request_children 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bwfm_usb_newbuf +ffffffff825743b0 T bwfm_usb_txeof +ffffffff825744c0 T bwfm_usb_txctl_cb +ffffffff82575000 T umstc_match +ffffffff825750b0 T umstc_attach +ffffffff825751b0 T umstc_detach +ffffffff82575200 T umstc_intr +ffffffff82575350 T umstc_brightness_task +ffffffff82576000 T uhidpp_match +ffffffff825760e0 T uhidpp_attach +ffffffff82576450 T uhidpp_detach +ffffffff82576690 T uhidpp_intr +ffffffff825768a0 T uhidpp_task +ffffffff82576930 T hidpp10_get_type +ffffffff82576a30 T hidpp10_get_name +ffffffff82576b30 T hidpp10_enable_notifications +ffffffff82576ba0 T uhidpp_is_notification +ffffffff82576c30 T uhidpp_claim_notification +ffffffff82576d50 T uhidpp_refresh +ffffffff82576e20 T uhidpp_device_refresh +ffffffff82576ed0 T uhidpp_consume_notification +ffffffff82577020 T uhidpp_device_connect +ffffffff82577310 T uhidpp_sleep +ffffffff82577340 T hidpp_get_protocol_version +ffffffff82577410 T uhidpp_device_features +ffffffff82577600 T hidpp20_battery_get_capability +ffffffff825776c0 T hidpp20_unified_battery_get_capabilities +ffffffff825777b0 T hidpp20_battery_get_level_status +ffffffff825778e0 T hidpp20_unified_battery_get_status +ffffffff82577a00 T hidpp20_root_get_feature +ffffffff82577ac0 T hidpp20_feature_get_count +ffffffff82577b60 T hidpp20_feature_get_id +ffffffff82577c10 T hidpp_send_fap_report +ffffffff82577cf0 T hidpp_send_rap_report +ffffffff82577db0 T hidpp20_battery_status_is_charging +ffffffff82577df0 T hidpp20_unified_battery_status_is_charging +ffffffff82577e30 T hidpp_send_validate +ffffffff82577e80 T hidpp_send_report +ffffffff82579000 T ucc_match +ffffffff825790a0 T ucc_attach +ffffffff825791b0 T ucc_detach +ffffffff82579210 T ucc_intr +ffffffff82579250 T ucc_enable +ffffffff8257a000 T iic_match +ffffffff8257a050 T iic_attach +ffffffff8257a0c0 T iicbus_print +ffffffff8257a110 T iic_print +ffffffff8257a180 T iic_search +ffffffff8257a250 T iic_is_compatible +ffffffff8257b000 T iic_exec +ffffffff8257b2c0 T iic_smbus_write_byte +ffffffff8257b3c0 T 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iommu_alloc_hwdte +ffffffff825cf930 T iommu_issue_qi +ffffffff825cf960 T iommu_flush_tlb_qi +ffffffff825cf990 T iommu_flush_ctx_qi +ffffffff825cf9c0 T ivhd_invalidate_domain +ffffffff825cfa20 T iommu_read_8 +ffffffff825cfa40 T iommu_flush_ctx +ffffffff825cfb60 T iommu_enable_qi +ffffffff825cfc80 T iommu_showcfg +ffffffff825cfea0 T iommu_init +ffffffff825d01e0 T acpidmar_intr_establish +ffffffff825d02f0 T acpidmar_intr +ffffffff825d0480 T acpidmar_match_devscope +ffffffff825d05c0 T domain_create +ffffffff825d0800 t dmar_dmamap_create +ffffffff825d0820 t dmar_dmamap_destroy +ffffffff825d0830 t dmar_dmamap_load +ffffffff825d08a0 t dmar_dmamap_load_mbuf +ffffffff825d0900 t dmar_dmamap_load_uio +ffffffff825d0960 t dmar_dmamap_load_raw +ffffffff825d09d0 t dmar_dmamap_unload +ffffffff825d0a00 t dmar_dmamap_sync +ffffffff825d0a20 t dmar_dmamem_alloc +ffffffff825d0a40 t dmar_dmamem_free +ffffffff825d0a60 t dmar_dmamem_map +ffffffff825d0a80 t dmar_dmamem_unmap +ffffffff825d0aa0 t dmar_dmamem_mmap +ffffffff825d0ac0 T domain_add_device +ffffffff825d0b40 T domain_remove_device +ffffffff825d0bf0 T domain_lookup +ffffffff825d0db0 T _iommu_map +ffffffff825d0e70 T _iommu_domain +ffffffff825d0ed0 T domain_map_device +ffffffff825d11d0 T ivhd_flush_devtab +ffffffff825d1230 T acpidmar_pci_hook +ffffffff825d13f0 T acpidmar_parse_devscope +ffffffff825d1510 T acpidmar_drhd +ffffffff825d16e0 T acpidmar_rmrr +ffffffff825d1970 T acpidmar_atsr +ffffffff825d1b10 T acpidmar_init +ffffffff825d1f60 T acpiivhd_intr +ffffffff825d2040 T ivhd_poll_events +ffffffff825d2100 T ivhd_intr_map +ffffffff825d21b0 T _dumppte +ffffffff825d22e0 T ivhd_showpage +ffffffff825d2420 T ivhd_show_event +ffffffff825d2cc0 T ivhd_showdte +ffffffff825d2da0 T ivhd_showcmd +ffffffff825d2e60 T _ivhd_issue_command +ffffffff825d2f40 T ivhd_issue_command +ffffffff825d3210 T ivhd_invalidate_iommu_all +ffffffff825d3300 T ivhd_invalidate_interrupt_table +ffffffff825d33f0 T ivhd_showreg +ffffffff825d3530 T ivhd_checkerr +ffffffff825d3770 T ivhd_iommu_init +ffffffff825d3c50 T acpiivrs_ivhd +ffffffff825d3cc0 T acpiivrs_init +ffffffff825d3df0 T acpidmar_msi_hwmask +ffffffff825d3e60 T acpidmar_msi_hwunmask +ffffffff825d3ed0 T acpidmar_msi_addroute +ffffffff825d3f80 T acpidmar_msi_delroute +ffffffff825d3fa0 T iommu_showfault +ffffffff825d4160 T iommu_showpte +ffffffff825d5000 T acpidock_match +ffffffff825d5070 T acpidock_attach +ffffffff825d5390 T acpidock_status +ffffffff825d5420 T acpidock_docklock +ffffffff825d5500 T acpidock_dockctl +ffffffff825d55e0 T acpidock_foundejd +ffffffff825d5690 T acpidock_notify +ffffffff825d5b70 T acpidock_eject +ffffffff825d5c60 T acpidock_walkchildren +ffffffff825d6000 T abl_match +ffffffff825d6030 T abl_attach +ffffffff825d6220 T abl_get_brightness +ffffffff825d62a0 T abl_get_param +ffffffff825d6300 T abl_set_param +ffffffff825d63c0 T abl_set_brightness +ffffffff825d7000 T asmc_match +ffffffff825d7050 T asmc_attach +ffffffff825d75d0 T asmc_activate +ffffffff825d7660 T asmc_try +ffffffff825d7a20 T asmc_get_backlight +ffffffff825d7aa0 T asmc_set_backlight +ffffffff825d7b30 T asmc_backlight +ffffffff825d7bc0 T asmc_init +ffffffff825d7dc0 T asmc_update +ffffffff825d7f60 T asmc_detach +ffffffff825d8110 t asmc_temp +ffffffff825d82a0 t asmc_fan +ffffffff825d8460 t asmc_light +ffffffff825d9000 T acpiasus_match +ffffffff825d9030 T acpiasus_attach +ffffffff825d9150 T acpiasus_activate +ffffffff825d92e0 T acpiasus_init +ffffffff825d93c0 T acpiasus_notify +ffffffff825da000 T thinkpad_match +ffffffff825da0b0 T thinkpad_attach +ffffffff825da4c0 T thinkpad_activate +ffffffff825da640 T thinkpad_sensor_attach +ffffffff825da7b0 T thinkpad_get_temp +ffffffff825da840 T thinkpad_sensor_refresh +ffffffff825da9c0 T thinkpad_get_volume_mute +ffffffff825daa30 T thinkpad_attach_deferred +ffffffff825daa50 T thinkpad_enable_events +ffffffff825dac20 T thinkpad_get_kbd_backlight +ffffffff825dacb0 T thinkpad_set_kbd_backlight +ffffffff825dad80 T thinkpad_get_param +ffffffff825dade0 T thinkpad_set_param +ffffffff825daea0 T thinkpad_battery_setchargestart +ffffffff825daff0 T thinkpad_battery_setchargestop +ffffffff825db140 T thinkpad_battery_setchargemode +ffffffff825db710 T thinkpad_hotkey +ffffffff825dbd40 T thinkpad_brightness_up +ffffffff825dbee0 T thinkpad_brightness_down +ffffffff825dc090 T thinkpad_toggle_bluetooth +ffffffff825dc1b0 T thinkpad_volume_mute +ffffffff825dc260 T thinkpad_volume_down +ffffffff825dc310 T thinkpad_volume_up +ffffffff825dc3c0 T thinkpad_get_thinklight +ffffffff825dc410 T thinkpad_adaptive_change +ffffffff825dc530 T thinkpad_get_brightness +ffffffff825dc570 T thinkpad_toggle_wan +ffffffff825dc690 T thinkpad_cmos +ffffffff825dc740 T thinkpad_set_brightness +ffffffff825dc830 T thinkpad_set_thinklight +ffffffff825dc8f0 T thinkpad_battery_inhibit_charge +ffffffff825dca20 T thinkpad_battery_force_discharge +ffffffff825dd000 T toshiba_match +ffffffff825dd0a0 T toshiba_attach +ffffffff825dd180 T get_param_brightness +ffffffff825dd1e0 T acpitoshiba_get_param +ffffffff825dd240 T set_param_brightness +ffffffff825dd2d0 T toshiba_update_brightness +ffffffff825dd3d0 T acpitoshiba_set_param +ffffffff825dd470 T toshiba_set_brightness +ffffffff825dd590 T toshiba_enable_events +ffffffff825dd620 T toshiba_read_events +ffffffff825dd780 T toshiba_hotkey +ffffffff825dd9b0 T toshiba_get_brightness +ffffffff825ddb20 T toshiba_fn_key_brightness_up +ffffffff825ddc70 T toshiba_fn_key_brightness_down +ffffffff825dddc0 T toshiba_fn_key_video_output +ffffffff825ddf10 T toshiba_get_video_output +ffffffff825de080 T toshiba_set_video_output +ffffffff825df000 T acpisony_match +ffffffff825df070 T acpisony_attach +ffffffff825df0e0 T acpisony_activate +ffffffff825df120 T acpisony_notify_setup +ffffffff825df310 T acpisony_notify +ffffffff825df6b0 T acpisony_find_offset +ffffffff825df7c0 T acpisony_set_hotkey +ffffffff825df9b0 T acpisony_brightness_down +ffffffff825dfac0 T acpisony_get_brightness +ffffffff825dfb40 T acpisony_set_brightness +ffffffff825e0000 T acpivideo_match +ffffffff825e0070 T acpivideo_attach +ffffffff825e01d0 T acpivideo_getpcibus +ffffffff825e0210 T acpivideo_notify +ffffffff825e0270 T acpivideo_set_policy +ffffffff825e0340 T acpi_foundvout +ffffffff825e0410 T acpivideo_print +ffffffff825e1000 T acpivout_match +ffffffff825e1070 T acpivout_attach +ffffffff825e11c0 T acpivout_notify +ffffffff825e1270 T acpivout_get_bcl +ffffffff825e1390 T acpivout_get_brightness +ffffffff825e1430 T acpivout_get_param +ffffffff825e14d0 T acpivout_set_param +ffffffff825e1630 T acpivout_select_brightness +ffffffff825e1700 T acpivout_find_brightness +ffffffff825e1790 T acpivout_set_brightness +ffffffff825e2000 T acpipwrres_match +ffffffff825e2070 T acpipwrres_attach +ffffffff825e22b0 T acpipwrres_foundcons +ffffffff825e2440 T acpipwrres_ref_incr +ffffffff825e24d0 T acpipwrres_hascons +ffffffff825e2520 T acpipwrres_ref_decr +ffffffff825e25b0 T acpipwrres_addcons +ffffffff825e3000 T aibs_match +ffffffff825e3030 T aibs_attach +ffffffff825e3140 T aibs_probe +ffffffff825e32a0 T aibs_attach_new +ffffffff825e33c0 T aibs_attach_sif +ffffffff825e3590 T aibs_notify +ffffffff825e3600 T aibs_add_sensor +ffffffff825e3850 T aibs_getpack +ffffffff825e38d0 T aibs_refresh +ffffffff825e3930 T aibs_refresh_r +ffffffff825e3a70 T aibs_getvalue +ffffffff825e3bc0 T aibs_find_cb +ffffffff825e4000 T aplgpio_match +ffffffff825e4060 T aplgpio_attach +ffffffff825e4310 T aplgpio_intr +ffffffff825e4460 T aplgpio_read_pin +ffffffff825e44b0 T aplgpio_write_pin +ffffffff825e4520 T aplgpio_intr_establish +ffffffff825e4640 T aplgpio_intr_enable +ffffffff825e46d0 T aplgpio_intr_disable +ffffffff825e5000 T bytgpio_match +ffffffff825e5060 T bytgpio_attach +ffffffff825e5320 T bytgpio_intr +ffffffff825e5450 T bytgpio_read_pin +ffffffff825e54b0 T bytgpio_write_pin +ffffffff825e5530 T bytgpio_intr_establish +ffffffff825e55a0 T bytgpio_intr_enable +ffffffff825e5690 T bytgpio_intr_disable +ffffffff825e6000 T chvgpio_match +ffffffff825e6060 T chvgpio_attach +ffffffff825e6300 T chvgpio_intr +ffffffff825e63d0 T chvgpio_read_pin +ffffffff825e6480 T chvgpio_write_pin +ffffffff825e6540 T chvgpio_intr_establish +ffffffff825e6710 T chvgpio_intr_enable +ffffffff825e67e0 T chvgpio_intr_disable +ffffffff825e68b0 T chvgpio_opreg_handler +ffffffff825e6930 T chvgpio_check_pin +ffffffff825e7000 T glkgpio_match +ffffffff825e7060 T glkgpio_attach +ffffffff825e7310 T glkgpio_intr +ffffffff825e7460 T glkgpio_read_pin +ffffffff825e74c0 T glkgpio_write_pin +ffffffff825e7530 T glkgpio_intr_establish +ffffffff825e7650 T glkgpio_intr_enable +ffffffff825e76e0 T glkgpio_intr_disable +ffffffff825e8000 T pchgpio_match +ffffffff825e8060 T pchgpio_attach +ffffffff825e8530 T pchgpio_activate +ffffffff825e85e0 T pchgpio_intr +ffffffff825e8800 T pchgpio_read_pin +ffffffff825e88f0 T pchgpio_write_pin +ffffffff825e8a00 T pchgpio_intr_establish +ffffffff825e8c20 T pchgpio_intr_enable +ffffffff825e8d50 T pchgpio_intr_disable +ffffffff825e8e80 T pchgpio_save +ffffffff825e8ef0 T pchgpio_restore +ffffffff825e8f60 T pchgpio_find_group +ffffffff825e8fe0 T pchgpio_intr_handle +ffffffff825e90c0 T pchgpio_save_pin +ffffffff825e9280 T pchgpio_restore_pin +ffffffff825ea000 T tipmic_match +ffffffff825ea050 T tipmic_attach +ffffffff825ea250 T tipmic_write_1 +ffffffff825ea310 T tipmic_intr +ffffffff825ea470 T tipmic_get_lpat +ffffffff825ea580 T tipmic_read_pin +ffffffff825ea5b0 T tipmic_write_pin +ffffffff825ea5e0 T tipmic_thermal_opreg_handler +ffffffff825eae60 T tipmic_power_opreg_handler +ffffffff825eb100 T tipmic_read_1 +ffffffff825eb1d0 T tipmic_raw_to_temp +ffffffff825ec000 T ccpmic_match +ffffffff825ec050 T ccpmic_attach +ffffffff825ec130 T ccpmic_get_lpat +ffffffff825ec240 T ccpmic_read_pin +ffffffff825ec3c0 T ccpmic_write_pin +ffffffff825ec520 T ccpmic_thermal_opreg_handler +ffffffff825ec770 T ccpmic_power_opreg_handler +ffffffff825ec960 T ccpmic_read_1 +ffffffff825eca30 T ccpmic_write_1 +ffffffff825ecaf0 T ccpmic_raw_to_temp +ffffffff825ed000 T com_acpi_match +ffffffff825ed120 T com_acpi_attach +ffffffff825ed3a0 T com_acpi_is_designware +ffffffff825ed400 T com_acpi_intr_designware +ffffffff825ed430 T com_acpi_is_console +ffffffff825ee000 T sdhc_acpi_match +ffffffff825ee060 T sdhc_acpi_attach +ffffffff825ee370 T sdhc_acpi_parse_resources +ffffffff825ee420 T sdhc_acpi_card_detect_gpio +ffffffff825ee480 T sdhc_acpi_card_detect_intr +ffffffff825ee4c0 T sdhc_acpi_power_on +ffffffff825ee540 T sdhc_acpi_explore +ffffffff825ee570 T sdhc_acpi_card_detect_nonremovable +ffffffff825ee5a0 T sdhc_acpi_do_explore +ffffffff825ef000 T dwiic_acpi_match +ffffffff825ef050 T dwiic_acpi_attach +ffffffff825ef410 T dwiic_acpi_parse_crs +ffffffff825ef560 T dwiic_acpi_power +ffffffff825ef670 T dwiic_acpi_get_params +ffffffff825ef7b0 T dwiic_i2c_intr_establish +ffffffff825ef830 T dwiic_i2c_intr_disestablish +ffffffff825ef850 T dwiic_i2c_intr_string +ffffffff825ef8e0 T dwiic_acpi_acquire_bus +ffffffff825ef930 T dwiic_acpi_release_bus +ffffffff825ef960 T dwiic_acpi_bus_scan +ffffffff825ef9a0 T dwiic_acpi_found_hid +ffffffff825efd00 T dwiic_matchhids +ffffffff825efd90 T dwiic_acpi_found_ihidev +ffffffff825f0000 T dwiic_acpi_found_iatp +ffffffff825f0160 T dwiic_acpi_found_ietp +ffffffff825f1000 T acpicbkbd_match +ffffffff825f1030 T acpicbkbd_attach +ffffffff825f10d0 T acpicbkbd_activate +ffffffff825f1120 T acpicbkbd_get_backlight +ffffffff825f11a0 T acpicbkbd_set_backlight +ffffffff825f1240 T acpicbkbd_write_backlight +ffffffff825f2000 T acpials_match +ffffffff825f2090 T acpials_attach +ffffffff825f2230 T acpials_read +ffffffff825f22b0 T acpials_addtask +ffffffff825f22f0 T acpials_notify +ffffffff825f2380 T acpials_update +ffffffff825f3000 T tpm_match +ffffffff825f3050 T tpm_attach +ffffffff825f3320 T tpm_activate +ffffffff825f3430 T tpm2_start_method +ffffffff825f34b0 T tpm_probe +ffffffff825f3560 T tpm_init_tis +ffffffff825f37d0 T tpm_init_crb +ffffffff825f3b10 T tpm_suspend +ffffffff825f3c00 T tpm_resume +ffffffff825f3c30 T tpm_write_tis +ffffffff825f3fc0 T tpm_read_tis +ffffffff825f4190 T tpm_write_crb +ffffffff825f4570 T tpm_read_crb +ffffffff825f4870 T tpm_request_locality_tis +ffffffff825f4960 T tpm_request_locality_crb +ffffffff825f4a60 T tpm_release_locality_crb +ffffffff825f4ab0 T tpm_release_locality_tis +ffffffff825f4b20 T tpm_getburst +ffffffff825f4bd0 T tpm_status +ffffffff825f4bf0 T tpm_waitfor +ffffffff825f4cd0 T tpm_waitfor_status +ffffffff825f5000 T acpihve_match +ffffffff825f50b0 T acpihve_attach +ffffffff825f6000 T acpisbs_match +ffffffff825f6030 T acpisbs_attach +ffffffff825f62b0 T acpisbs_activate +ffffffff825f6390 T acpisbs_read +ffffffff825f6450 T acpisbs_setup_sensors +ffffffff825f6550 T acpisbs_refresh_sensors +ffffffff825f66a0 T acpisbs_notify +ffffffff825f67e0 T acpi_smbus_read +ffffffff825f7000 T surface_match +ffffffff825f7060 T surface_attach +ffffffff825f70c0 T surface_hotkey +ffffffff825f8000 T ipmi_acpi_match +ffffffff825f8030 T ipmi_acpi_attach +ffffffff825f8260 T ipmi_acpi_parse_crs +ffffffff825f9000 T amdgpio_match +ffffffff825f9060 T amdgpio_attach +ffffffff825f92a0 T amdgpio_activate +ffffffff825f9390 T amdgpio_intr +ffffffff825f9530 T amdgpio_read_pin +ffffffff825f9580 T amdgpio_write_pin +ffffffff825f95f0 T amdgpio_intr_establish +ffffffff825f96e0 T amdgpio_intr_enable +ffffffff825f9760 T amdgpio_intr_disable +ffffffff825f97e0 T amdgpio_save +ffffffff825f9860 T amdgpio_restore +ffffffff825f98f0 T amdgpio_save_pin +ffffffff825f9960 T amdgpio_restore_pin +ffffffff825f99d0 T amdgpio_pin_intr +ffffffff825fa000 T acpihid_match +ffffffff825fa030 T acpihid_attach +ffffffff825fa210 T acpihid_init_dsm +ffffffff825fa370 T acpihid_eval +ffffffff825fa590 T acpihid_notify +ffffffff825fa5f0 T acpihid_button_array_enable +ffffffff825fb000 t iosf_acpi_match +ffffffff825fb050 t iosf_acpi_attach +ffffffff825fb150 t iosf_acpi_mbi_mdr_rd +ffffffff825fb1c0 t iosf_acpi_mbi_mdr_wr +ffffffff825fc000 T acpi_match +ffffffff825fc060 T acpi_attach +ffffffff825fc0a0 T acpi_probe +ffffffff825fc240 T acpi_map +ffffffff825fc330 T acpi_unmap +ffffffff825fc380 T acpi_bus_space_map +ffffffff825fc3a0 T acpi_bus_space_unmap +ffffffff825fc3c0 T acpi_intr_establish +ffffffff825fc500 T acpi_intr_disestablish +ffffffff825fc510 T acpi_scan +ffffffff825fc6b0 T acpi_acquire_glk +ffffffff825fc710 T acpi_release_glk +ffffffff825fc760 T acpi_attach_machdep +ffffffff825fc8f0 T acpi_sleep_cpu +ffffffff825fca90 T acpi_resume_cpu +ffffffff825fcb90 T sleep_mp +ffffffff825fcc80 T resume_mp +ffffffff825fcd70 T acpi_iommu_device_map +ffffffff825fd000 T hibernate_resume_machdep +ffffffff825fd050 T hibernate_drop_to_real_mode +ffffffff825fd060 T hibernate_activate_resume_pt_machdep +ffffffff825fd0a0 T hibernate_switch_stack_machdep +ffffffff825fd0e0 T hibernate_flush +ffffffff825fd110 T acpi_savecpu +ffffffff825fe000 T sleep_showstate +ffffffff825fe0f0 T sleep_setstate +ffffffff825fe150 T gosleep +ffffffff825fe210 T sleep_abort +ffffffff825fe240 T sleep_resume +ffffffff825fe2b0 T suspend_finish +ffffffff825ff000 T acpiopen +ffffffff825ff0d0 T acpiclose +ffffffff825ff160 T acpiioctl +ffffffff825ff2b0 T request_sleep +ffffffff825ff330 T acpi_filtdetach +ffffffff825ff380 T acpi_filtread +ffffffff825ff3c0 T acpikqfilter +ffffffff82600000 T acpipci_match +ffffffff82600030 T acpipci_attach +ffffffff826002f0 T acpipci_osc +ffffffff82600430 T acpipci_parse_resources +ffffffff82600560 T acpipci_attach_bus +ffffffff82600730 T acpipci_print +ffffffff826007a0 T acpipci_attach_busses +ffffffff82601000 T efiopen +ffffffff82601040 T eficlose +ffffffff82601070 T efiioctl +ffffffff82601110 T efiioc_get_table +ffffffff82601280 T efiioc_var_get +ffffffff82601500 T efiioc_var_next +ffffffff82601720 T efiioc_var_set +ffffffff826018a0 T efi_adapt_error +ffffffff82602000 T efi_match +ffffffff82602060 T efi_attach +ffffffff82602330 T efi_map_runtime +ffffffff826024b0 T efi_enter +ffffffff82602550 T efi_leave +ffffffff826025d0 T efi_fault +ffffffff82603000 T vmm_probe +ffffffff82603050 T vmm_attach +ffffffff82603170 T vmm_activate +ffffffff826032b0 T vmmopen +ffffffff82603300 T vmmclose +ffffffff82603330 T vm_find +ffffffff82603450 T vmmioctl +ffffffff826036d0 T vm_create +ffffffff826039a0 T vm_get_info +ffffffff82603bf0 T vm_terminate +ffffffff82603d60 T vm_resetcpu +ffffffff82603e80 T vm_share_mem +ffffffff82603fd0 T pledge_ioctl_vmm +ffffffff826040c0 T vm_find_vcpu +ffffffff82604120 T vm_create_check_mem_ranges +ffffffff826042e0 T vm_teardown +ffffffff82604420 T vcpu_must_stop +ffffffff82605000 T vmm_enabled +ffffffff82605080 T vmm_attach_machdep +ffffffff82605230 T vmm_quiesce_vmx +ffffffff82605400 T vmm_activate_machdep +ffffffff82605490 T vmm_stop +ffffffff826055d0 T vmm_start +ffffffff826056d0 T vmmioctl_machdep +ffffffff826057a0 T vm_intr_pending +ffffffff82605840 T vm_mprotect_ept +ffffffff82605ac0 T pledge_ioctl_vmm_machdep +ffffffff82605b10 T vm_rwvmparams +ffffffff82605cb0 T vmm_init_pvclock +ffffffff82605d90 T vm_rwregs +ffffffff82605ea0 T vcpu_readregs_vmx +ffffffff826062d0 T vcpu_writeregs_vmx +ffffffff82606740 T vcpu_readregs_svm +ffffffff82606bf0 T vcpu_writeregs_svm +ffffffff826070c0 T vmm_get_guest_memtype +ffffffff82607140 T vmx_mprotect_ept +ffffffff826073a0 T vmx_pmap_find_pte_ept +ffffffff82607470 T start_vmm_on_cpu +ffffffff82607590 T stop_vmm_on_cpu +ffffffff82607630 T vmclear_on_cpu +ffffffff826076b0 T vm_impl_init +ffffffff82607800 T vm_impl_deinit +ffffffff82607830 T vcpu_reload_vmcs_vmx +ffffffff82607970 T vcpu_reset_regs_svm +ffffffff82607d00 T svm_setmsrbrw +ffffffff82607e10 T svm_setmsrbr +ffffffff82607ee0 T vmm_alloc_vpid +ffffffff82607ff0 T svm_setmsrbw +ffffffff826080d0 T vmx_setmsrbr +ffffffff82608180 T vmx_setmsrbw +ffffffff82608230 T vmx_setmsrbrw +ffffffff82608340 T svm_set_clean +ffffffff82608390 T svm_set_dirty +ffffffff826083e0 T vcpu_reset_regs_vmx +ffffffff82608e10 T vcpu_vmx_check_cap +ffffffff82608f10 T vcpu_vmx_compute_ctrl +ffffffff826090f0 T vcpu_init_vmx +ffffffff82609440 T vcpu_deinit_vmx +ffffffff82609580 T vcpu_reset_regs +ffffffff826095c0 T vcpu_init_svm +ffffffff82609750 T vcpu_deinit_svm +ffffffff82609890 T vcpu_init +ffffffff82609950 T vmm_free_vpid +ffffffff826099c0 T vcpu_deinit +ffffffff82609a00 T vm_run +ffffffff82609bd0 T vcpu_run_vmx +ffffffff8260a4e0 T vcpu_run_svm +ffffffff8260ab40 T vmm_fpurestore +ffffffff8260ac00 T vmm_fpusave +ffffffff8260ac80 T vmm_translate_gva +ffffffff8260af90 T vmm_update_pvclock +ffffffff8260b090 T vmx_get_exit_info +ffffffff8260b0f0 T vmx_handle_exit +ffffffff8260b4c0 T vmx_instruction_error_decode +ffffffff8260b690 T vmm_get_guest_cpu_cpl +ffffffff8260b780 T vmx_handle_intr +ffffffff8260b810 T svm_handle_hlt +ffffffff8260b860 T vmx_handle_hlt +ffffffff8260b910 T svm_handle_exit +ffffffff8260bc70 T svm_handle_np_fault +ffffffff8260bdf0 T vmm_handle_cpuid +ffffffff8260c480 T svm_handle_msr +ffffffff8260c770 T svm_handle_xsetbv +ffffffff8260c820 T svm_handle_inout +ffffffff8260c920 T vmm_inject_ud +ffffffff8260c960 T vmm_inject_db +ffffffff8260c9a0 T vmx_handle_np_fault +ffffffff8260cb00 T vmx_handle_inout +ffffffff8260cc70 T vmx_handle_cr +ffffffff8260ce70 T vmx_handle_rdmsr +ffffffff8260cf60 T vmx_handle_wrmsr +ffffffff8260d200 T vmx_handle_xsetbv +ffffffff8260d2f0 T vmm_inject_gp +ffffffff8260d330 T vmx_get_exit_qualification +ffffffff8260d390 T vmx_get_guest_faulttype +ffffffff8260d430 T svm_get_guest_faulttype +ffffffff8260d460 T svm_fault_page +ffffffff8260d4f0 T vmx_fault_page +ffffffff8260d640 T vmm_get_guest_cpu_mode +ffffffff8260d740 T vmx_load_pdptes +ffffffff8260d9c0 T vmx_handle_cr0_write +ffffffff8260dbe0 T vmx_handle_cr4_write +ffffffff8260dc90 T vmm_handle_xsetbv +ffffffff8260dd30 T vmx_handle_misc_enable_msr +ffffffff8260dd90 T vmm_pat_is_valid +ffffffff8260de70 t vmm_handle_cpuid_0xd +ffffffff8260df70 T vmm_gpa_is_valid +ffffffff8260dfe0 T vmx_exit_reason_decode +ffffffff8260e020 T svm_exit_reason_decode +ffffffff8260ee30 T vcpu_state_decode +ffffffff8260f000 T vmm_dispatch_intr +ffffffff8260f020 T vmxon +ffffffff8260f050 T vmxoff +ffffffff8260f080 T vmclear +ffffffff8260f0b0 T vmptrld +ffffffff8260f0e0 T vmptrst +ffffffff8260f110 T vmwrite +ffffffff8260f140 T vmread +ffffffff8260f170 T invvpid +ffffffff8260f18b t invvpid_fail +ffffffff8260f192 t invvpid_ret +ffffffff8260f1b0 T invept +ffffffff8260f1cb t invept_fail +ffffffff8260f1d2 t invept_ret +ffffffff8260f1f0 T vmx_enter_guest +ffffffff8260f21b t skip_init +ffffffff8260f288 t no_l1df_msr +ffffffff8260f28b t l1df_tlb_loop +ffffffff8260f2a4 t l1df_tlb_done +ffffffff8260f2ac t l1df_load_cache +ffffffff8260f2c3 t done_flush +ffffffff8260f356 t do_resume +ffffffff8260f3db t fail_launch_or_resume +ffffffff8260f41d t fail_launch_unknown +ffffffff8260f42a t fail_launch_invalid_vmcs +ffffffff8260f437 t fail_launch_valid_vmcs +ffffffff8260f454 t vmx_exit_handler_asm +ffffffff8260f519 t restore_host +ffffffff8260f540 T svm_enter_guest +ffffffff8260f6c2 t restore_host_svm +ffffffff82610000 T sdmmc_match +ffffffff82610050 T sdmmc_attach +ffffffff82610390 T sdmmc_detach +ffffffff82610440 T sdmmc_activate +ffffffff82610510 T sdmmc_discover_task +ffffffff826105d0 T sdmmc_create_thread +ffffffff82610640 T sdmmc_holds_root_device +ffffffff826106a0 T sdmmc_task_thread +ffffffff82610890 T sdmmc_needs_discover +ffffffff82610940 T sdmmc_del_task +ffffffff826109f0 T sdmmc_card_detach +ffffffff82610ad0 T sdmmc_add_task +ffffffff82610b50 T sdmmc_card_attach +ffffffff82610c60 T sdmmc_enable +ffffffff82610db0 T sdmmc_scan +ffffffff82610e40 T sdmmc_init +ffffffff82610f40 T sdmmc_disable +ffffffff826110a0 T sdmmc_function_free +ffffffff826110c0 T sdmmc_delay +ffffffff82611110 T sdmmc_select_card +ffffffff82611330 T sdmmc_set_bus_power +ffffffff826114e0 T sdmmc_function_alloc +ffffffff82611570 T sdmmc_app_command +ffffffff82611700 T sdmmc_mmc_command +ffffffff82611780 T sdmmc_go_idle_state +ffffffff82611890 T sdmmc_send_if_cond +ffffffff826119e0 T sdmmc_set_relative_addr +ffffffff82612000 T sdmmc_cisptr +ffffffff826120a0 T sdmmc_read_cis +ffffffff826123e0 T sdmmc_print_cis +ffffffff82612550 T sdmmc_check_cis_quirks +ffffffff82613000 T sdmmc_io_enable +ffffffff826132a0 T sdmmc_io_reset +ffffffff826133d0 T sdmmc_io_send_op_cond +ffffffff82613540 T sdmmc_io_scan +ffffffff82613690 T sdmmc_io_init +ffffffff826137c0 T sdmmc_io_set_highspeed +ffffffff82613a60 T sdmmc_io_set_bus_width +ffffffff82613cf0 T sdmmc_io_function_ready +ffffffff82613e70 T sdmmc_io_read_1 +ffffffff82613fc0 T sdmmc_io_function_enable +ffffffff82614390 T sdmmc_io_write_1 +ffffffff82614510 T sdmmc_io_function_disable +ffffffff82614790 T sdmmc_io_attach +ffffffff82614880 T sdmmc_print +ffffffff82614ad0 T sdmmc_submatch +ffffffff82614b50 T sdmmc_io_detach +ffffffff82614c00 T sdmmc_io_rw_direct +ffffffff82614da0 T sdmmc_io_rw_extended_subr +ffffffff82614f40 T sdmmc_io_rw_extended +ffffffff82615340 T sdmmc_io_read_2 +ffffffff826154a0 T sdmmc_io_write_2 +ffffffff82615600 T sdmmc_io_read_4 +ffffffff82615760 T sdmmc_io_write_4 +ffffffff826158c0 T sdmmc_io_read_multi_1 +ffffffff826159b0 T sdmmc_io_write_multi_1 +ffffffff82615aa0 T sdmmc_io_read_region_1 +ffffffff82615b90 T sdmmc_io_write_region_1 +ffffffff82615c80 T sdmmc_io_xchg +ffffffff82615e10 T sdmmc_intr_enable +ffffffff82616080 T sdmmc_intr_disable +ffffffff826162f0 T sdmmc_intr_establish +ffffffff826163f0 T sdmmc_intr_disestablish +ffffffff826164e0 T sdmmc_card_intr +ffffffff82616530 T sdmmc_intr_task +ffffffff826165c0 T sdmmc_io_set_blocklen +ffffffff82617000 T sdmmc_mem_enable +ffffffff82617450 T sdmmc_mem_send_op_cond +ffffffff82617600 T sdmmc_mem_signal_voltage +ffffffff826176c0 T sdmmc_mem_scan +ffffffff826179d0 T sdmmc_decode_csd +ffffffff82617e00 T sdmmc_decode_cid +ffffffff826182a0 T sdmmc_mem_send_scr +ffffffff826183e0 T sdmmc_mem_decode_scr +ffffffff82618440 T sdmmc_mem_send_cxd_data +ffffffff826185b0 T sdmmc_mem_set_bus_width +ffffffff826186c0 T sdmmc_mem_sd_switch +ffffffff82618970 T sdmmc_be512_to_bitfield512 +ffffffff82618a20 T sdmmc_mem_mmc_switch +ffffffff82618b10 T sdmmc_mem_init +ffffffff82618c60 T sdmmc_mem_set_blocklen +ffffffff82618d60 T sdmmc_mem_sd_init +ffffffff82619140 T sdmmc_mem_mmc_init +ffffffff82619800 T sdmmc_mem_select_transfer_mode +ffffffff82619880 T sdmmc_mem_execute_tuning +ffffffff82619910 T sdmmc_mem_read_block_subr +ffffffff82619c70 T sdmmc_mem_single_read_block +ffffffff82619d40 T sdmmc_mem_read_block +ffffffff82619ef0 T sdmmc_mem_write_block_subr +ffffffff8261a240 T sdmmc_mem_single_write_block +ffffffff8261a310 T sdmmc_mem_write_block +ffffffff8261a4c0 T sdmmc_mem_hibernate_write +ffffffff8261b000 T sdmmc_scsi_cmd +ffffffff8261b1f0 T sdmmc_minphys +ffffffff8261b270 T sdmmc_scsi_attach +ffffffff8261b460 T sdmmc_alloc_ccbs +ffffffff8261b5a0 T sdmmc_free_ccbs +ffffffff8261b600 T sdmmc_scsi_detach +ffffffff8261b760 T sdmmc_stimeout +ffffffff8261b7e0 T sdmmc_ccb_alloc +ffffffff8261b890 T sdmmc_ccb_free +ffffffff8261b970 T sdmmc_inquiry +ffffffff8261bbe0 T sdmmc_start_xs +ffffffff8261bcd0 T sdmmc_complete_xs +ffffffff8261bda0 T sdmmc_done_xs +ffffffff8261bdf0 T sdmmc_scsi_hibernate_io +ffffffff8261c000 T bwfm_sdio_preinit +ffffffff8261c4a0 T bwfm_sdio_txcheck +ffffffff8261c4e0 T bwfm_sdio_txdata +ffffffff8261c550 T bwfm_sdio_txctl +ffffffff8261c6a0 T bwfm_sdio_buscore_read +ffffffff8261c6b0 T bwfm_sdio_buscore_write +ffffffff8261c6d0 T bwfm_sdio_buscore_prepare +ffffffff8261c810 T bwfm_sdio_buscore_activate +ffffffff8261c890 T bwfm_sdio_match +ffffffff8261c940 T bwfm_sdio_attach +ffffffff8261cc00 T bwfm_sdio_detach +ffffffff8261cc60 T bwfm_sdio_task +ffffffff8261cdc0 T bwfm_sdio_write_1 +ffffffff8261cdf0 T bwfm_sdio_read_1 +ffffffff8261ce20 T bwfm_sdio_write_4 +ffffffff8261ced0 T bwfm_sdio_read_4 +ffffffff8261cf80 T bwfm_sdio_load_microcode +ffffffff8261d1e0 T bwfm_sdio_clkctl +ffffffff8261d310 T bwfm_sdio_dev_write +ffffffff8261d360 T bwfm_sdio_intr +ffffffff8261d3a0 T bwfm_sdio_ram_read_write +ffffffff8261d5d0 T bwfm_sdio_htclk +ffffffff8261d840 T bwfm_sdio_readshared +ffffffff8261d910 T bwfm_sdio_dev_read +ffffffff8261d950 T bwfm_sdio_rx_frames +ffffffff8261dd00 T bwfm_sdio_tx_frames +ffffffff8261de00 T bwfm_sdio_backplane +ffffffff8261deb0 T bwfm_sdio_buf_read +ffffffff8261df90 T bwfm_sdio_buf_write +ffffffff8261e040 T bwfm_sdio_frame_read_write +ffffffff8261e1c0 T bwfm_sdio_newbuf +ffffffff8261e240 T bwfm_sdio_tx_ok +ffffffff8261e2a0 T bwfm_sdio_tx_ctrlframe +ffffffff8261e3a0 T bwfm_sdio_tx_dataframe +ffffffff8261e4f0 T bwfm_sdio_rx_glom +ffffffff8261f000 T onewire_match +ffffffff8261f050 T onewire_attach +ffffffff8261f0f0 T onewire_detach +ffffffff8261f160 T onewire_activate +ffffffff8261f180 T onewire_scan +ffffffff8261f3a0 T onewire_createthread +ffffffff8261f410 T onewire_print +ffffffff8261f4e0 T onewirebus_print +ffffffff8261f530 T onewire_lock +ffffffff8261f550 T onewire_unlock +ffffffff8261f570 T onewire_reset +ffffffff8261f590 T onewire_bit +ffffffff8261f5b0 T onewire_read_byte +ffffffff8261f6f0 T onewire_write_byte +ffffffff8261f7d0 T onewire_read_block +ffffffff8261f870 T onewire_write_block +ffffffff8261f910 T onewire_triplet +ffffffff8261f9f0 T onewire_matchrom +ffffffff8261fb40 T onewire_search +ffffffff8261fee0 T onewire_thread +ffffffff82620000 T onewire_crc +ffffffff826200b0 T onewire_crc16 +ffffffff82620170 T onewire_famname +ffffffff826201b0 T onewire_matchbyfam +ffffffff82621000 T owid_match +ffffffff82621030 T owid_attach +ffffffff82621100 T owid_detach +ffffffff82621140 T owid_activate +ffffffff82622000 T owsbm_match +ffffffff82622030 T owsbm_attach +ffffffff826221d0 T owsbm_detach +ffffffff82622240 T owsbm_activate +ffffffff82622270 T owsbm_update +ffffffff82623000 T owtemp_match +ffffffff82623030 T owtemp_attach +ffffffff82623130 T owtemp_detach +ffffffff826231a0 T owtemp_activate +ffffffff826231d0 T owtemp_update +ffffffff82624000 T owctr_match +ffffffff82624030 T owctr_attach +ffffffff82624180 T owctr_detach +ffffffff826241f0 T owctr_activate +ffffffff82624220 T owctr_update +ffffffff82624250 T owctr_update_counter +ffffffff82625000 A __text_page_start +ffffffff82625000 T Xsyscall_meltdown +ffffffff8262500c T Xsyscall +ffffffff82625299 t Xsyscall_trampback +ffffffff826252b0 T intr_user_exit +ffffffff826252f2 t intr_user_exit_post_ast +ffffffff8262544b t Xiretq_trampback +ffffffff82625457 T doreti_iret +ffffffff82626000 T alltraps +ffffffff82626138 T recall_trap +ffffffff82626150 T alltraps_kern +ffffffff82626153 T alltraps_kern_meltdown +ffffffff82627000 ? Xtrap00 +ffffffff82627000 A __kutext_start +ffffffff82627000 A __text_page_end +ffffffff82627010 ? Xtrap01 +ffffffff82627020 ? Xtrap02 +ffffffff82627028 c calltrap_specstk +ffffffff826270f0 ? calltrap_specstk_tramp +ffffffff82627110 ? Xtrap03 +ffffffff82627120 ? Xtrap04 +ffffffff82627130 ? Xtrap05 +ffffffff82627140 ? Xtrap06 +ffffffff82627150 ? Xtrap07 +ffffffff82627160 ? Xtrap08 +ffffffff82627170 ? Xtrap09 +ffffffff82627180 ? Xtrap0a +ffffffff82627190 ? Xtrap0b +ffffffff826271a0 ? Xtrap0c +ffffffff826271b0 ? Xtrap0d +ffffffff82627240 ? Xtrap0e +ffffffff82627250 ? Xintrspurious +ffffffff82627250 ? Xtrap0f +ffffffff82627260 ? Xtrap10 +ffffffff82627270 ? Xtrap11 +ffffffff82627280 ? Xtrap12 +ffffffff82627290 ? Xtrap13 +ffffffff826272a0 ? Xtrap14 +ffffffff826272b0 ? Xtrap15 +ffffffff826272c0 ? Xtrap16 +ffffffff826272c0 ? Xtrap17 +ffffffff826272c0 ? Xtrap18 +ffffffff826272c0 ? Xtrap19 +ffffffff826272c0 ? Xtrap1a +ffffffff826272c0 ? Xtrap1b +ffffffff826272c0 ? Xtrap1c +ffffffff826272c0 ? Xtrap1d +ffffffff826272c0 ? Xtrap1e +ffffffff826272c0 ? Xtrap1f +ffffffff826272d0 ? x2apic_eoi +ffffffff826272f0 ? Xintr_lapic_ipi +ffffffff82627330 ? Xipi_invltlb +ffffffff82627360 ? Xipi_invlpg +ffffffff82627390 ? Xipi_invlrange +ffffffff826273d0 ? Xipi_invltlb_pcid +ffffffff82627410 ? Xipi_invlpg_pcid +ffffffff82627460 ? Xipi_invlrange_pcid +ffffffff826274d0 ? Xintr_lapic_ltimer +ffffffff82627510 ? Xintr_xen_upcall +ffffffff82627550 ? Xintr_hyperv_upcall +ffffffff82627590 ? Xintr_legacy0 +ffffffff826275d0 ? Xintr_legacy1 +ffffffff82627610 ? Xintr_legacy2 +ffffffff82627650 ? Xintr_legacy3 +ffffffff82627690 ? Xintr_legacy4 +ffffffff826276d0 ? Xintr_legacy5 +ffffffff82627710 ? Xintr_legacy6 +ffffffff82627750 ? Xintr_legacy7 +ffffffff82627790 ? Xintr_legacy8 +ffffffff826277d0 ? Xintr_legacy9 +ffffffff82627810 ? Xintr_legacy10 +ffffffff82627850 ? Xintr_legacy11 +ffffffff82627890 ? Xintr_legacy12 +ffffffff826278d0 ? Xintr_legacy13 +ffffffff82627910 ? Xintr_legacy14 +ffffffff82627950 ? Xintr_legacy15 +ffffffff82627990 ? Xintr_ioapic_edge0 +ffffffff826279d0 ? Xintr_ioapic_edge1 +ffffffff82627a10 ? Xintr_ioapic_edge2 +ffffffff82627a50 ? Xintr_ioapic_edge3 +ffffffff82627a90 ? Xintr_ioapic_edge4 +ffffffff82627ad0 ? Xintr_ioapic_edge5 +ffffffff82627b10 ? Xintr_ioapic_edge6 +ffffffff82627b50 ? Xintr_ioapic_edge7 +ffffffff82627b90 ? Xintr_ioapic_edge8 +ffffffff82627bd0 ? Xintr_ioapic_edge9 +ffffffff82627c10 ? Xintr_ioapic_edge10 +ffffffff82627c50 ? Xintr_ioapic_edge11 +ffffffff82627c90 ? Xintr_ioapic_edge12 +ffffffff82627cd0 ? Xintr_ioapic_edge13 +ffffffff82627d10 ? Xintr_ioapic_edge14 +ffffffff82627d50 ? Xintr_ioapic_edge15 +ffffffff82627d90 ? Xintr_ioapic_edge16 +ffffffff82627dd0 ? Xintr_ioapic_edge17 +ffffffff82627e10 ? Xintr_ioapic_edge18 +ffffffff82627e50 ? Xintr_ioapic_edge19 +ffffffff82627e90 ? Xintr_ioapic_edge20 +ffffffff82627ed0 ? Xintr_ioapic_edge21 +ffffffff82627f10 ? Xintr_ioapic_edge22 +ffffffff82627f50 ? Xintr_ioapic_edge23 +ffffffff82627f90 ? Xintr_ioapic_edge24 +ffffffff82627fd0 ? Xintr_ioapic_edge25 +ffffffff82628010 ? Xintr_ioapic_edge26 +ffffffff82628050 ? Xintr_ioapic_edge27 +ffffffff82628090 ? Xintr_ioapic_edge28 +ffffffff826280d0 ? Xintr_ioapic_edge29 +ffffffff82628110 ? Xintr_ioapic_edge30 +ffffffff82628150 ? Xintr_ioapic_edge31 +ffffffff82628190 ? Xintr_ioapic_edge32 +ffffffff826281d0 ? Xintr_ioapic_edge33 +ffffffff82628210 ? Xintr_ioapic_edge34 +ffffffff82628250 ? Xintr_ioapic_edge35 +ffffffff82628290 ? Xintr_ioapic_edge36 +ffffffff826282d0 ? Xintr_ioapic_edge37 +ffffffff82628310 ? Xintr_ioapic_edge38 +ffffffff82628350 ? Xintr_ioapic_edge39 +ffffffff82628390 ? Xintr_ioapic_edge40 +ffffffff826283d0 ? Xintr_ioapic_edge41 +ffffffff82628410 ? Xintr_ioapic_edge42 +ffffffff82628450 ? Xintr_ioapic_edge43 +ffffffff82628490 ? Xintr_ioapic_edge44 +ffffffff826284d0 ? Xintr_ioapic_edge45 +ffffffff82628510 ? Xintr_ioapic_edge46 +ffffffff82628550 ? Xintr_ioapic_edge47 +ffffffff82628590 ? Xintr_ioapic_edge48 +ffffffff826285d0 ? Xintr_ioapic_edge49 +ffffffff82628610 ? Xintr_ioapic_edge50 +ffffffff82628650 ? Xintr_ioapic_edge51 +ffffffff82628690 ? Xintr_ioapic_edge52 +ffffffff826286d0 ? Xintr_ioapic_edge53 +ffffffff82628710 ? Xintr_ioapic_edge54 +ffffffff82628750 ? Xintr_ioapic_edge55 +ffffffff82628790 ? Xintr_ioapic_edge56 +ffffffff826287d0 ? Xintr_ioapic_edge57 +ffffffff82628810 ? Xintr_ioapic_edge58 +ffffffff82628850 ? Xintr_ioapic_edge59 +ffffffff82628890 ? Xintr_ioapic_edge60 +ffffffff826288d0 ? Xintr_ioapic_edge61 +ffffffff82628910 ? Xintr_ioapic_edge62 +ffffffff82628950 ? Xintr_ioapic_edge63 +ffffffff82628990 ? Xintr_ioapic_level0 +ffffffff826289d0 ? Xintr_ioapic_level1 +ffffffff82628a10 ? Xintr_ioapic_level2 +ffffffff82628a50 ? Xintr_ioapic_level3 +ffffffff82628a90 ? Xintr_ioapic_level4 +ffffffff82628ad0 ? Xintr_ioapic_level5 +ffffffff82628b10 ? Xintr_ioapic_level6 +ffffffff82628b50 ? Xintr_ioapic_level7 +ffffffff82628b90 ? Xintr_ioapic_level8 +ffffffff82628bd0 ? Xintr_ioapic_level9 +ffffffff82628c10 ? Xintr_ioapic_level10 +ffffffff82628c50 ? Xintr_ioapic_level11 +ffffffff82628c90 ? Xintr_ioapic_level12 +ffffffff82628cd0 ? Xintr_ioapic_level13 +ffffffff82628d10 ? Xintr_ioapic_level14 +ffffffff82628d50 ? Xintr_ioapic_level15 +ffffffff82628d90 ? Xintr_ioapic_level16 +ffffffff82628dd0 ? Xintr_ioapic_level17 +ffffffff82628e10 ? Xintr_ioapic_level18 +ffffffff82628e50 ? Xintr_ioapic_level19 +ffffffff82628e90 ? Xintr_ioapic_level20 +ffffffff82628ed0 ? Xintr_ioapic_level21 +ffffffff82628f10 ? Xintr_ioapic_level22 +ffffffff82628f50 ? Xintr_ioapic_level23 +ffffffff82628f90 ? Xintr_ioapic_level24 +ffffffff82628fd0 ? Xintr_ioapic_level25 +ffffffff82629010 ? Xintr_ioapic_level26 +ffffffff82629050 ? Xintr_ioapic_level27 +ffffffff82629090 ? Xintr_ioapic_level28 +ffffffff826290d0 ? Xintr_ioapic_level29 +ffffffff82629110 ? Xintr_ioapic_level30 +ffffffff82629150 ? Xintr_ioapic_level31 +ffffffff82629190 ? Xintr_ioapic_level32 +ffffffff826291d0 ? Xintr_ioapic_level33 +ffffffff82629210 ? Xintr_ioapic_level34 +ffffffff82629250 ? Xintr_ioapic_level35 +ffffffff82629290 ? Xintr_ioapic_level36 +ffffffff826292d0 ? Xintr_ioapic_level37 +ffffffff82629310 ? Xintr_ioapic_level38 +ffffffff82629350 ? Xintr_ioapic_level39 +ffffffff82629390 ? Xintr_ioapic_level40 +ffffffff826293d0 ? Xintr_ioapic_level41 +ffffffff82629410 ? Xintr_ioapic_level42 +ffffffff82629450 ? Xintr_ioapic_level43 +ffffffff82629490 ? Xintr_ioapic_level44 +ffffffff826294d0 ? Xintr_ioapic_level45 +ffffffff82629510 ? Xintr_ioapic_level46 +ffffffff82629550 ? Xintr_ioapic_level47 +ffffffff82629590 ? Xintr_ioapic_level48 +ffffffff826295d0 ? Xintr_ioapic_level49 +ffffffff82629610 ? Xintr_ioapic_level50 +ffffffff82629650 ? Xintr_ioapic_level51 +ffffffff82629690 ? Xintr_ioapic_level52 +ffffffff826296d0 ? Xintr_ioapic_level53 +ffffffff82629710 ? Xintr_ioapic_level54 +ffffffff82629750 ? Xintr_ioapic_level55 +ffffffff82629790 ? Xintr_ioapic_level56 +ffffffff826297d0 ? Xintr_ioapic_level57 +ffffffff82629810 ? Xintr_ioapic_level58 +ffffffff82629850 ? Xintr_ioapic_level59 +ffffffff82629890 ? Xintr_ioapic_level60 +ffffffff826298d0 ? Xintr_ioapic_level61 +ffffffff82629910 ? Xintr_ioapic_level62 +ffffffff82629950 ? Xintr_ioapic_level63 +ffffffff8262a000 ? codepatch_fill_nop +ffffffff8262a000 A __cptext_start +ffffffff8262a000 A __kutext_end +ffffffff8262a0b0 ? codepatch_maprw +ffffffff8262a190 ? codepatch_unmaprw +ffffffff8262a200 ? codepatch_nop +ffffffff8262a360 ? codepatch_replace +ffffffff8262a510 ? codepatch_call +ffffffff8262a530 ? codepatch_control_flow +ffffffff8262a740 ? codepatch_jmp +ffffffff8262b000 A __cptext_end +ffffffff8262b000 A __rodata_start +ffffffff8262b000 C _etext +ffffffff8262b000 C etext +ffffffff8262c000 r seeprom_read +ffffffff8262c004 r icl_mg_pll_find_divisors.div1_vals +ffffffff8262c034 r athn_ac2qid +ffffffff8262c034 r athn_ac2qid +ffffffff8262c034 r athn_ac2qid +ffffffff8262c040 r rtwn_get_rssi.cckoff +ffffffff8262c068 r rsu_ac2qid +ffffffff8262c078 r pckbc_portcmd +ffffffff8262c07c r tht_fifo_write_pad.pad +ffffffff8262c084 r rsu_get_rssi.cckoff +ffffffff8262c0a4 r adlp_n_revids +ffffffff8262c0e8 r apple_iso_trans +ffffffff8262c0f0 r wihap_check_tx.txratetable +ffffffff8262c0f4 r dmamode +ffffffff8262c118 r gen9_edram_size_mb.sets +ffffffff8262c12c r dg2_g12_revid_step_tbl +ffffffff8262d000 r isomappings +ffffffff8262d080 r unimappings +ffffffff8262d230 r replacements +ffffffff82630b2b r apollo_pio_rec +ffffffff8267e67e r apollo_udma33_tim +ffffffff82693c98 r pp_r600_decoded_lanes +ffffffff826ca8b2 r cmd680_setup_channel.udma_tbl +ffffffff826d2e81 r apollo_udma100_tim +ffffffff826d2e87 r cmd0646_9_tim_udma +ffffffff826e17c9 r substchar +ffffffff82738b07 r apollo_udma133_tim +ffffffff82738b0e r apollo_udma66_tim +ffffffff82738b38 r cy_pio_rec +ffffffff8273e3b8 R drm_ca +ffffffff8273e3e0 R drm_filtops +ffffffff8273e410 R drmread_filtops +ffffffff8273f000 r vga_emulops +ffffffff8273f048 R vga_stdscreen +ffffffff8273f078 R vga_stdscreen_mono +ffffffff8273f0a8 R vga_stdscreen_bf +ffffffff8273f0d8 R vga_40lscreen +ffffffff8273f108 R vga_40lscreen_mono +ffffffff8273f138 R vga_40lscreen_bf +ffffffff8273f168 R vga_50lscreen +ffffffff8273f198 R vga_50lscreen_mono +ffffffff8273f1c8 R vga_50lscreen_bf +ffffffff8273f1f8 R vga_screenlist +ffffffff8273f208 R vga_screenlist_mono +ffffffff8273f218 R vga_accessops +ffffffff8273f278 r i945_wm_info +ffffffff8273f2b8 r bgansitopc +ffffffff8273f2c0 r pctoansi +ffffffff8273f300 r sdma_offsets +ffffffff8273f300 r sdma_offsets +ffffffff8273f338 r iha_rate_tbl +ffffffff8273f370 r i830_a_wm_info +ffffffff8273f3a8 r gen9_edram_size_mb.ways +ffffffff8273f408 r aggr_periodic_times +ffffffff8273f500 r michael_final.pad +ffffffff8273f528 r rt_copysa.maskarray +ffffffff8273f530 r i915_wm_info +ffffffff8273f538 r amdgpu_ih_clientid_jpeg +ffffffff8273f538 r amdgpu_ih_clientid_uvds +ffffffff8273f538 r amdgpu_ih_clientid_vcns +ffffffff8273f538 r amdgpu_ih_clientid_vcns +ffffffff8273f538 r amdgpu_ih_clientid_vcns +ffffffff8273f568 r jsl_ehl_revids +ffffffff8273f578 r vga_setfontset.cmaptabb +ffffffff8273f5e8 r i830_bc_wm_info +ffffffff8273f650 r hsw_activate_psr2.map +ffffffff8273f658 r tgl_revids +ffffffff8273f690 r __drm_universal_plane_init.default_modifiers +ffffffff8273f6a0 r iwn_tid2fifo +ffffffff8273f6b8 r vga_setfontset.cmaptaba +ffffffff8273f6c0 r crtc_offsets +ffffffff8273f6c0 r crtc_offsets +ffffffff8273f6c0 r crtc_offsets +ffffffff8273f768 r rtwn_r88e_get_rssi.cckoff +ffffffff82740000 R edid_vendors +ffffffff827402c0 R edid_nvendors +ffffffff827402d0 R edid_products +ffffffff82740330 R edid_nproducts +ffffffff82740340 r _edid_modes +ffffffff82741000 R videomode_list +ffffffff82742080 R videomode_count +ffffffff82743000 r ahc_hard_errors +ffffffff82743080 r critical_sections +ffffffff827430b0 r patches +ffffffff82743d50 r seqprog +ffffffff82745000 r ahc_switch +ffffffff82746000 r termstat_strings +ffffffff82746020 r critical_sections +ffffffff82746060 r seqprog +ffffffff82746d50 r patches +ffffffff82748000 r ahd_switch +ffffffff82749000 R aic_switch +ffffffff8274a000 R adw_switch +ffffffff8274b000 R gdt_switch +ffffffff8274c000 R twe_switch +ffffffff8274d000 R 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w83627dhg_sensors +ffffffff827a67c0 R nct6776f_sensors +ffffffff827a6a00 R nct6779d_sensors +ffffffff827a6d60 R w83637hf_sensors +ffffffff827a6f20 R w83697hf_sensors +ffffffff827a70c0 R w83781d_sensors +ffffffff827a7280 R w83782d_sensors +ffffffff827a7480 R w83783s_sensors +ffffffff827a7600 R w83791d_sensors +ffffffff827a7860 R w83792d_sensors +ffffffff827a7ae0 R as99127f_sensors +ffffffff827a8000 r ar5k_known_products +ffffffff827a8110 r ar5111_gain_opt +ffffffff827a81e0 r ar5112_gain_opt +ffffffff827a82b0 r ar5k_5ghz_channels +ffffffff827a8a00 r ar5k_2ghz_channels +ffffffff827a8f10 r ar5111_rf +ffffffff827a9350 r ar5112a_rf +ffffffff827a9890 r ar5112_rf +ffffffff827a9da0 r ar5413_rf +ffffffff827aa1b0 r ar2413_rf +ffffffff827aa4d0 r ar2425_rf +ffffffff827aa830 r ar5111_rfg +ffffffff827aab30 r ar5112_rfg +ffffffff827aae30 r ar5413_rfg +ffffffff827ab130 r ar2413_rfg +ffffffff827ab430 r ar5k_rt_11a +ffffffff827ab552 r ar5k_rt_11b +ffffffff827ab674 r ar5k_rt_11g +ffffffff827ab796 r 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ar9280_2_0_rx_gain_13db_backoff +ffffffff827b70c0 r ar9280_2_0_rx_gain +ffffffff827b70e0 r ar9280_2_0_tx_gain_high_power +ffffffff827b7100 r ar9280_2_0_tx_gain +ffffffff827b7120 r ar9280_init_from_rom.chainoffset +ffffffff827b7130 r ar9280_2_0_regs +ffffffff827b7190 r ar9280_2_0_vals_5g20 +ffffffff827b7250 r ar9280_2_0_vals_5g40 +ffffffff827b7310 r ar9280_2_0_vals_2g40 +ffffffff827b73d0 r ar9280_2_0_vals_2g20 +ffffffff827b7490 r ar9280_2_0_cm_regs +ffffffff827b7740 r ar9280_2_0_cm_vals +ffffffff827b7c90 r ar9280_2_0_fast_clock_regs +ffffffff827b7cb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff827b7cf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff827b7d30 r ar9280_2_0_serdes_regs +ffffffff827b7d60 r ar9280_2_0_serdes_vals +ffffffff827b7d90 r ar9280_2_0_rx_gain_regs +ffffffff827b7ea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff827b80b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff827b82c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff827b84d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g +ffffffff827b86e0 r ar9280_2_0_rx_gain_vals_5g +ffffffff827b88f0 r ar9280_2_0_rx_gain_vals_2g +ffffffff827b8b00 r ar9280_2_0_tx_gain_regs +ffffffff827b8b40 r ar9280_2_0_tx_gain_high_power_vals_5g +ffffffff827b8bc0 r ar9280_2_0_tx_gain_high_power_vals_2g +ffffffff827b8c40 r ar9280_2_0_tx_gain_vals_5g +ffffffff827b8cc0 r ar9280_2_0_tx_gain_vals_2g +ffffffff827b9000 r ar9271_ini +ffffffff827b9068 r ar9285_1_2_ini +ffffffff827b90d0 r ar9280_2_0_serdes +ffffffff827b90e8 r ar9271_tx_gain_high_power +ffffffff827b9108 r ar9271_tx_gain +ffffffff827b9128 r ar9285_2_0_tx_gain_high_power +ffffffff827b9148 r ar9285_2_0_tx_gain +ffffffff827b9168 r ar9285_1_2_tx_gain_high_power +ffffffff827b9188 r ar9285_1_2_tx_gain +ffffffff827b91b0 r ar9271_regs +ffffffff827b9410 r ar9271_vals_2g40 +ffffffff827b98d0 r ar9271_vals_2g20 +ffffffff827b9d90 r ar9271_cm_regs +ffffffff827ba020 r ar9271_cm_vals +ffffffff827ba540 r ar9285_1_2_regs +ffffffff827ba7a0 r ar9285_1_2_vals_2g40 +ffffffff827bac60 r ar9285_1_2_vals_2g20 +ffffffff827bb120 r ar9285_1_2_cm_regs +ffffffff827bb3a0 r ar9285_1_2_cm_vals +ffffffff827bb890 r ar9280_2_0_serdes_regs +ffffffff827bb8c0 r ar9280_2_0_serdes_vals +ffffffff827bb8f0 r ar9271_tx_gain_regs +ffffffff827bb940 r ar9271_tx_gain_high_power_vals_2g +ffffffff827bb9d0 r ar9271_tx_gain_vals_2g +ffffffff827bba60 r ar9285_1_2_tx_gain_regs +ffffffff827bbab0 r ar9285_2_0_tx_gain_high_power_vals_2g +ffffffff827bbb50 r ar9285_2_0_tx_gain_vals_2g +ffffffff827bbbf0 r ar9285_1_2_tx_gain_high_power_vals_2g +ffffffff827bbc90 r ar9285_1_2_tx_gain_vals_2g +ffffffff827bc000 r ar9287_1_1_ini +ffffffff827bc068 r ar9280_2_0_serdes +ffffffff827bc080 r ar9287_1_1_rx_gain +ffffffff827bc0a0 r ar9287_1_1_tx_gain +ffffffff827bc0c0 r ar9287_1_1_regs +ffffffff827bc120 r ar9287_1_1_vals_2g40 +ffffffff827bc1d0 r ar9287_1_1_vals_2g20 +ffffffff827bc280 r ar9287_1_1_cm_regs +ffffffff827bc560 r ar9287_1_1_cm_vals +ffffffff827bcb20 r ar9280_2_0_serdes_regs +ffffffff827bcb50 r ar9280_2_0_serdes_vals +ffffffff827bcb80 r ar9287_1_1_rx_gain_regs +ffffffff827bcd90 r ar9287_1_1_rx_gain_vals_2g +ffffffff827bd1a0 r ar9287_1_1_tx_gain_regs +ffffffff827bd200 r ar9287_1_1_tx_gain_vals_2g +ffffffff827be000 r athn_rates +ffffffff827bf000 r ar9485_1_1_ini +ffffffff827bf068 r ar9485_1_1_serdes +ffffffff827bf080 r ar9380_2_2_ini +ffffffff827bf0e8 r ar9380_2_2_serdes +ffffffff827bf100 r ar9380_2_2_rx_gain_wo_xlna +ffffffff827bf120 r ar9380_2_2_rx_gain +ffffffff827bf140 r ar9485_1_1_rx_gain +ffffffff827bf160 r ar9380_2_2_tx_gain_high_ob_db +ffffffff827bf180 r ar9380_2_2_tx_gain_low_ob_db +ffffffff827bf1a0 r ar9380_2_2_tx_gain_high_power +ffffffff827bf1c0 r ar9380_2_2_tx_gain +ffffffff827bf1e0 r ar9485_1_1_tx_gain +ffffffff827bf200 r ar9485_1_1_regs +ffffffff827bf270 r ar9485_1_1_vals_2g40 +ffffffff827bf350 r ar9485_1_1_vals_2g20 +ffffffff827bf430 r ar9485_1_1_cm_regs +ffffffff827bf720 r ar9485_1_1_cm_vals +ffffffff827bfd00 r ar9485_1_1_serdes_regs +ffffffff827bfd0c r ar9485_1_1_serdes_vals +ffffffff827bfd20 r ar9380_2_2_regs +ffffffff827bfdb0 r ar9380_2_2_vals_5g20 +ffffffff827bfed0 r ar9380_2_2_vals_5g40 +ffffffff827bfff0 r ar9380_2_2_vals_2g40 +ffffffff827c0110 r ar9380_2_2_vals_2g20 +ffffffff827c0230 r ar9380_2_2_cm_regs +ffffffff827c05d0 r ar9380_2_2_cm_vals +ffffffff827c0d00 r ar9380_2_2_fast_clock_regs +ffffffff827c0d20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff827c0d50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff827c0d74 r ar9380_2_2_serdes_regs +ffffffff827c0d80 r ar9380_2_2_serdes_vals +ffffffff827c0d90 r ar9380_2_2_rx_gain_regs +ffffffff827c0f90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff827c1390 r ar9380_2_2_rx_gain_vals +ffffffff827c1790 r ar9485_1_1_rx_gain_regs +ffffffff827c1890 r ar9485_1_1_rx_gain_vals +ffffffff827c1a90 r ar9380_2_2_tx_gain_regs +ffffffff827c1b60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff827c1d00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff827c1ea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff827c2040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff827c21e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff827c2380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff827c2520 r ar9380_2_2_tx_gain_vals_5g +ffffffff827c26c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff827c2860 r ar9485_1_1_tx_gain_regs +ffffffff827c28f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff827c2a10 r ar9380_def_rom +ffffffff827c2e50 r ar9380_def_rom_h112 +ffffffff827c3290 r ar9380_def_rom_h116 +ffffffff827c36d0 r ar9380_def_rom_x112 +ffffffff827c3b10 r ar9380_def_rom_x113 +ffffffff827c4000 R atw_txthresh_tab_lo +ffffffff827c4050 R atw_txthresh_tab_hi +ffffffff827c40a0 r atw_attach.empty_macaddr +ffffffff827c40b0 r atw_attach.type_strings +ffffffff827c40d0 r atw_rfmd2958_ifn +ffffffff827c4110 r atw_rfmd2958_rf1r +ffffffff827c4150 r atw_rxintr.rate_tbl +ffffffff827c5000 r rtw_identify_sta.empty_macaddr +ffffffff827c6000 r rtwn_set_key.etherzeroaddr +ffffffff827c6010 r rtl8188eu_rf_prog +ffffffff827c6030 r rtl8188ftv_rf_prog +ffffffff827c6050 r rtl8192e_rf_prog +ffffffff827c6080 r rtl8188ce_rf_prog +ffffffff827c60a0 r rtl8188ru_rf_prog +ffffffff827c60c0 r rtl8188cu_rf_prog +ffffffff827c60e0 r rtl8192ce_rf_prog +ffffffff827c6110 r rtl8188ru_txagc +ffffffff827c6170 r rtl8188eu_rf_regs +ffffffff827c6230 r rtl8188eu_rf_vals +ffffffff827c63b0 r rtl8188ftv_rf_regs +ffffffff827c6490 r rtl8188ftv_rf_vals +ffffffff827c6640 r rtl8192e_rf_regs +ffffffff827c6710 r rtl8192e_rf_vals +ffffffff827c68b0 r rtl8192e_rf2_regs +ffffffff827c6950 r rtl8192e_rf2_vals +ffffffff827c6a90 r rtl8192ce_rf1_regs +ffffffff827c6bb0 r rtl8188ce_rf_vals +ffffffff827c6df0 r rtl8188ru_rf_vals +ffffffff827c7030 r rtl8188cu_rf_vals +ffffffff827c7270 r rtl8192ce_rf1_vals +ffffffff827c74b0 r rtl8192ce_rf2_regs +ffffffff827c7500 r rtl8192ce_rf2_vals +ffffffff827c75a0 r rtl8192cu_txagc +ffffffff827c8000 r rt2560_rf2522_r2 +ffffffff827c8040 r rt2560_rf2524_r2 +ffffffff827c8080 r rt2560_rf2525_hi_r2 +ffffffff827c80c0 r rt2560_rf2525_r2 +ffffffff827c8100 r rt2560_rf2525e_r2 +ffffffff827c8140 r rt2560_rf2526_hi_r2 +ffffffff827c8180 r rt2560_rf2526_r2 +ffffffff827c81c0 r rt2560_def_bbp +ffffffff827c8200 r rt2560_def_mac +ffffffff827c9000 r rt2661_rf5225_1 +ffffffff827c9300 r rt2661_rf5225_2 +ffffffff827c9600 r rt2661_def_bbp +ffffffff827c9640 r rt2661_def_mac +ffffffff827ca000 r rt2860_rf2850 +ffffffff827ca430 r rt2860_rates +ffffffff827ca4f0 r rt3572_def_rf +ffffffff827ca530 r rt3090_def_rf +ffffffff827ca560 r rt5392_def_rf +ffffffff827ca5e0 r rt3290_def_rf +ffffffff827ca640 r rt5390_def_rf +ffffffff827ca6c0 r rt5390_def_bbp +ffffffff827ca6f0 r rt2860_def_mac +ffffffff827cc000 r acx111_reg +ffffffff827cc040 r acx111_rate_map +ffffffff827cd000 r acx100_reg +ffffffff827cd040 r acx100_txpower_rfmd +ffffffff827cd060 r gen8_rcs_offsets +ffffffff827cd090 r acx100_txpower_maxim +ffffffff827cd0b0 r mtl_rcs_offsets +ffffffff827cd0f0 r digits +ffffffff827cd0f0 r pppdumpb.digits +ffffffff827cd0f0 r pppdumpm.digits +ffffffff827cd140 r hangpic +ffffffff827cd180 r gen11_rcs_offsets +ffffffff827cd1b0 r xehp_rcs_offsets +ffffffff827cd1e0 r dg2_rcs_offsets +ffffffff827cd220 r dg2_xcs_offsets +ffffffff827cd250 r gen12_xcs_offsets +ffffffff827ce000 r trinity_override_mgpg_sequences +ffffffff827ce3c0 r voltage_swing_to_pre_emphasis +ffffffff827ce3d0 r sgpr_init_compute_shader +ffffffff827ce4a0 r intel_hpll_vco.cl_vco +ffffffff827ce4c0 r vgpr_init_compute_shader +ffffffff827cf000 r malo_cmd_string.cmds +ffffffff827cf0b0 r malo_cmd_string_result.results +ffffffff827d0000 R bwi_vendor_led_act +ffffffff827d000c R bwi_default_led_act +ffffffff827d0010 R bwi_led_duration +ffffffff827d0380 r bwi_sup_bphy +ffffffff827d03c0 r bwi_phy_freq_11g_rev1 +ffffffff827d05c0 r bwi_phy_rotor_11g_rev1 +ffffffff827d06a0 r bwi_phy_noise_scale_11g_rev2 +ffffffff827d06e0 r bwi_phy_noise_scale_11g_rev7 +ffffffff827d0720 r bwi_phy_noise_scale_11g +ffffffff827d0760 r bwi_phy_sigma_sq_11g_rev2 +ffffffff827d07d0 r bwi_phy_sigma_sq_11g_rev7 +ffffffff827d0840 r bwi_phy_delay_11g_rev1 +ffffffff827d0920 r bwi_rf_get_gains.save_phy_regs +ffffffff827d0940 r bwi_rf_lo_find.map +ffffffff827d0960 r bwi_txpower_map_11b +ffffffff827d09a0 r bwi_txpower_map_11g +ffffffff827d09e0 r _bwi_rf_lo_update_11g.rf_atten_list +ffffffff827d0a20 r _bwi_rf_lo_update_11g.rf_atten_init_list +ffffffff827d0a60 r _bwi_rf_lo_update_11g.rf_lo_measure_order +ffffffff827d0aa0 r bwi_rf_set_nrssi_ofs_11g.save_phy_comm_regs +ffffffff827d0ac0 r bwi_bbpid_map +ffffffff827d0af0 r bwi_regwin_count +ffffffff827d0b40 r bwi_clkfreq +ffffffff827d0b58 r bwi_zero_addr +ffffffff827d1000 R ipq8074_ops +ffffffff827d1068 R ipq6018_ops +ffffffff827d10d0 R qca6390_ops +ffffffff827d1138 R qcn9074_ops +ffffffff827d11a0 R wcn6855_ops +ffffffff827d1208 R wcn6750_ops +ffffffff827d1270 R ath11k_hw_ring_mask_ipq8074 +ffffffff827d12c8 R ath11k_hw_ring_mask_qca6390 +ffffffff827d1320 R ath11k_hw_ring_mask_qcn9074 +ffffffff827d1378 R ath11k_hw_ring_mask_wcn6750 +ffffffff827d13d0 R ath11k_target_ce_config_wlan_ipq8074 +ffffffff827d14e0 R ath11k_target_service_to_ce_map_wlan_ipq8074 +ffffffff827d15f0 R ath11k_target_service_to_ce_map_wlan_ipq6018 +ffffffff827d16e0 R ath11k_target_ce_config_wlan_qca6390 +ffffffff827d17c0 R ath11k_target_service_to_ce_map_wlan_qca6390 +ffffffff827d1880 R ath11k_target_ce_config_wlan_qcn9074 +ffffffff827d1960 R ath11k_target_service_to_ce_map_wlan_qcn9074 +ffffffff827d1a40 R qwx_host_ce_config_ipq8074 +ffffffff827d1ce0 R qwx_host_ce_config_qca6390 +ffffffff827d1e00 R qwx_host_ce_config_qcn9074 +ffffffff827d1ec0 R ipq8074_regs +ffffffff827d1f94 R qca6390_regs +ffffffff827d2068 R qcn9074_regs +ffffffff827d213c R wcn6855_regs +ffffffff827d2210 R wcn6750_regs +ffffffff827d22f0 R qmi_response_type_v01_ei +ffffffff827d2350 R qmi_wlanfw_ind_register_req_msg_v01_ei +ffffffff827d2670 R qmi_wlanfw_ind_register_resp_msg_v01_ei +ffffffff827d26f0 R qmi_wlanfw_host_cap_req_msg_v01_ei +ffffffff827d2a70 R qmi_wlanfw_host_cap_resp_msg_v01_ei +ffffffff827d2ab0 R qmi_wlanfw_mem_cfg_s_v01_ei +ffffffff827d2b30 R qmi_wlanfw_mem_seg_s_v01_ei +ffffffff827d2bd0 R qmi_wlanfw_request_mem_ind_msg_v01_ei +ffffffff827d2c30 R qmi_wlanfw_mem_seg_resp_s_v01_ei +ffffffff827d2cd0 R qmi_wlanfw_respond_mem_req_msg_v01_ei +ffffffff827d2d30 R qmi_wlanfw_respond_mem_resp_msg_v01_ei +ffffffff827d2d70 R qmi_wlanfw_cap_req_msg_v01_ei +ffffffff827d2d90 R qmi_wlanfw_rf_chip_info_s_v01_ei +ffffffff827d2df0 R qmi_wlanfw_rf_board_info_s_v01_ei +ffffffff827d2e30 R qmi_wlanfw_soc_info_s_v01_ei +ffffffff827d2e70 R qmi_wlanfw_fw_version_info_s_v01_ei +ffffffff827d2ed0 R qmi_wlanfw_cap_resp_msg_v01_ei +ffffffff827d3190 R qmi_wlanfw_bdf_download_req_msg_v01_ei +ffffffff827d3370 R qmi_wlanfw_bdf_download_resp_msg_v01_ei +ffffffff827d33b0 R qmi_wlanfw_m3_info_req_msg_v01_ei +ffffffff827d3410 R qmi_wlanfw_m3_info_resp_msg_v01_ei +ffffffff827d3450 R qmi_wlanfw_wlan_ini_req_msg_v01_ei +ffffffff827d34b0 R qmi_wlanfw_wlan_ini_resp_msg_v01_ei +ffffffff827d34f0 R qmi_wlanfw_ce_tgt_pipe_cfg_s_v01_ei +ffffffff827d35b0 R qmi_wlanfw_ce_svc_pipe_cfg_s_v01_ei +ffffffff827d3630 R qmi_wlanfw_shadow_reg_cfg_s_v01_ei +ffffffff827d3690 R qmi_wlanfw_shadow_reg_v2_cfg_s_v01_ei +ffffffff827d36d0 R qmi_wlanfw_wlan_mode_req_msg_v01_ei +ffffffff827d3750 R qmi_wlanfw_wlan_mode_resp_msg_v01_ei +ffffffff827d3790 R qmi_wlanfw_wlan_cfg_req_msg_v01_ei +ffffffff827d3970 R qmi_wlanfw_wlan_cfg_resp_msg_v01_ei +ffffffff827d39b0 r wmi_tlv_policies +ffffffff827d5710 r qwx_hw_mode_pri_map +ffffffff827d5740 r ath11k_hw_params +ffffffff827d5cc0 r hw_srng_config_templ +ffffffff827d5f78 r ath11k_hw_hal_params_ipq8074 +ffffffff827d5f88 r ath11k_hw_hal_params_qca6390 +ffffffff827d5f98 r ath11k_hw_hal_params_wcn6750 +ffffffff827d5fa8 r ath11k_hw_tcl2wbm_rbm_map_ipq8074 +ffffffff827d5fb1 r ath11k_hw_tcl2wbm_rbm_map_wcn6750 +ffffffff827d7000 R uhci_bus_methods +ffffffff827d7030 R uhci_root_ctrl_methods +ffffffff827d7060 R uhci_root_intr_methods +ffffffff827d7090 R uhci_device_ctrl_methods +ffffffff827d70c0 R uhci_device_intr_methods +ffffffff827d70f0 R uhci_device_bulk_methods +ffffffff827d7120 R uhci_device_isoc_methods +ffffffff827d7150 R uhci_devd +ffffffff827d7162 R uhci_confd +ffffffff827d716b R uhci_ifcd +ffffffff827d7174 R uhci_endpd +ffffffff827d717b R uhci_hubd_piix +ffffffff827d8000 R revbits +ffffffff827d8020 R ohci_bus_methods +ffffffff827d8050 R ohci_root_ctrl_methods +ffffffff827d8080 R ohci_root_intr_methods +ffffffff827d80b0 R ohci_device_ctrl_methods +ffffffff827d80e0 R ohci_device_intr_methods +ffffffff827d8110 R ohci_device_bulk_methods +ffffffff827d8140 R ohci_device_isoc_methods +ffffffff827d8170 R ohci_devd +ffffffff827d8182 R ohci_confd +ffffffff827d818b R ohci_ifcd +ffffffff827d8194 R ohci_endpd +ffffffff827d819b R ohci_hubd +ffffffff827d9000 R ehci_bus_methods +ffffffff827d9030 R ehci_root_ctrl_methods +ffffffff827d9060 R ehci_root_intr_methods +ffffffff827d9090 R ehci_device_ctrl_methods +ffffffff827d90c0 R ehci_device_intr_methods +ffffffff827d90f0 R ehci_device_bulk_methods +ffffffff827d9120 R ehci_device_isoc_methods +ffffffff827d9150 R ehci_devd +ffffffff827d9162 R ehci_odevd +ffffffff827d916c R ehci_confd +ffffffff827d9175 R ehci_ifcd +ffffffff827d917e R ehci_endpd +ffffffff827d9185 R ehci_hubd +ffffffff827da000 R xhci_bus_methods +ffffffff827da030 R xhci_root_ctrl_methods +ffffffff827da060 R xhci_root_intr_methods +ffffffff827da090 R xhci_device_ctrl_methods +ffffffff827da0c0 R xhci_device_intr_methods +ffffffff827da0f0 R xhci_device_bulk_methods +ffffffff827da120 R xhci_device_isoc_methods +ffffffff827da150 R xhci_devd +ffffffff827da162 R xhci_confd +ffffffff827da16b R xhci_ifcd +ffffffff827da174 R xhci_endpd +ffffffff827da17b R xhci_endpcd +ffffffff827da181 R xhci_hubd +ffffffff827dd000 R radio_ca +ffffffff827de000 R ipmi_ca +ffffffff827df000 R vscsi_ca +ffffffff827df028 R vscsi_switch +ffffffff827df050 R vscsi_filtops +ffffffff827e0000 R mpath_ca +ffffffff827e0028 R mpath_switch +ffffffff827e1000 R softraid_ca +ffffffff827e1028 R sr_switch +ffffffff827e2000 r spdmem_basic_types +ffffffff827e20a0 r spdmem_parity_types +ffffffff827e20e0 r spdmem_ddr4_decode.ddr4_chipsize +ffffffff827e3000 R ufshci_switch +ffffffff827e4000 R kstat_rlock_ops +ffffffff827e4010 R kstat_wlock_ops +ffffffff827e4020 R kstat_mutex_ops +ffffffff827e4030 R kstat_cpu_ops +ffffffff827e4040 r kstat_id_tree_RBT_INFO +ffffffff827e4058 R kstat_id_tree_RBT_TYPE +ffffffff827e4060 r kstat_pv_tree_RBT_INFO +ffffffff827e4078 R kstat_pv_tree_RBT_TYPE +ffffffff827e4080 r kstat_nm_tree_RBT_INFO +ffffffff827e4098 R kstat_nm_tree_RBT_TYPE +ffffffff827e5000 r fuse_rd_filtops +ffffffff827e6000 R fusefs_vfsops +ffffffff827e6070 R fusefs_vars +ffffffff827e7000 R fusefs_vops +ffffffff827e7110 R fusefsread_filtops +ffffffff827e7140 R fusefswrite_filtops +ffffffff827e7170 R fusefsvnode_filtops +ffffffff827e8000 r pf_state_tree_RBT_INFO +ffffffff827e8018 R pf_state_tree_RBT_TYPE +ffffffff827e8020 r pf_state_tree_id_RBT_INFO +ffffffff827e8038 R pf_state_tree_id_RBT_TYPE +ffffffff827e8040 r pf_translate_af.zero +ffffffff827e9000 R hfsc_ops +ffffffff827e9038 R ifq_hfsc_ops +ffffffff827e9040 R hfsc_pf_ops +ffffffff827e9088 R pfq_hfsc_ops +ffffffff827ea000 r fqcodel_ops +ffffffff827ea038 R ifq_fqcodel_ops +ffffffff827ea040 r fqcodel_pf_ops +ffffffff827ea088 R pfq_fqcodel_ops +ffffffff827ea090 r codel_intervals +ffffffff827eb000 r pfsync_bulk_req_state_names +ffffffff827eb030 r pfsync_bulk_req_event_names +ffffffff827eb060 r pfsync_qs +ffffffff827eb0d8 r pfsync_kstat_tpl +ffffffff827eb2e0 r pfsync_acts +ffffffff827ec000 r bio_mappings_RBT_INFO +ffffffff827ec018 R bio_mappings_RBT_TYPE +ffffffff827ed000 R hotplugread_filtops +ffffffff827ee000 R dtps_static +ffffffff827ef000 R db_show_all_cmds +ffffffff827ef180 R db_show_cmds +ffffffff827ef4c0 R db_boot_cmds +ffffffff827ef5a0 R db_command_table +ffffffff827f0000 R ddb_vars +ffffffff827f1000 R audio_ca +ffffffff827f1028 R audioctlread_filtops +ffffffff827f1058 R audiowrite_filtops +ffffffff827f1088 R audioread_filtops +ffffffff827f2000 R midi_ca +ffffffff827f2028 R midiwrite_filtops +ffffffff827f2058 R midiread_filtops +ffffffff827f3000 r mulawtolin16 +ffffffff827f3200 r lintomulaw +ffffffff827f4000 R randomread_filtops +ffffffff827f4030 R randomwrite_filtops +ffffffff827f5000 R video_ca +ffffffff827f5028 R video_filtops +ffffffff827f6000 R cd9660_vfsops +ffffffff827f7000 R cd9660_vops +ffffffff827f7110 R cd9660_specvops +ffffffff827f7220 R cd9660_fifovops +ffffffff827f7330 R cd9660read_filtops +ffffffff827f7360 R cd9660write_filtops +ffffffff827f7390 R cd9660vnode_filtops +ffffffff827f8000 R udf_vfsops +ffffffff827f9000 R udf_vops +ffffffff827f9110 r mon_lens +ffffffff827fa000 r month_days +ffffffff827fb000 R execsw +ffffffff827fc000 r shstrtab +ffffffff827fd000 R copyright +ffffffff827fd0c0 r initpaths +ffffffff827fe000 R sysent +ffffffff82800000 R bufq_impls +ffffffff82801000 R kqueueops +ffffffff82801038 R kqread_filtops +ffffffff82801068 R proc_filtops +ffffffff82801098 R file_filtops +ffffffff828010c8 R timer_filtops +ffffffff82801100 R sysfilt_ops +ffffffff82801148 R seltrue_filtops +ffffffff82801178 R dead_filtops +ffffffff828011a8 R badfd_filtops +ffffffff828011d8 r mutex_klistops +ffffffff828011f0 r rwlock_klistops +ffffffff82802000 R kv_exec +ffffffff82803000 R addrmask +ffffffff82804000 r rw_ops +ffffffff82805000 r proc_printit.pstat +ffffffff82806000 R pledge_syscalls +ffffffff82806a60 r pledgenames +ffffffff82806cb0 r pledgereq +ffffffff82807000 r unvname_rbt_RBT_INFO +ffffffff82807018 R unvname_rbt_RBT_TYPE +ffffffff82808000 R sig_filtops +ffffffff82808030 R sigprop +ffffffff82809000 R kern_vars +ffffffff828092f0 R hw_vars +ffffffff8280a000 R tc_vars +ffffffff8280b000 r sys_gettimeofday.zerotz +ffffffff8280c000 r taskq_sys_name +ffffffff8280c006 r taskq_sys_mp_name +ffffffff8280c010 R systq +ffffffff8280c018 R systqmp +ffffffff8280e000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff8280e010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff8280e020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff8280e030 r gpt_get_fstype.gpt_uuid_linux +ffffffff8280e040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff8280e050 r gpt_get_fstype.gpt_uuid_unused +ffffffff8280e060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff8280e070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff8280f000 r hiballoc_addr_RBT_INFO +ffffffff8280f018 R hiballoc_addr_RBT_TYPE +ffffffff82810000 R logread_filtops +ffffffff82811000 r phtree_RBT_INFO +ffffffff82811018 R phtree_RBT_TYPE +ffffffff82811020 r pool_lock_ops_rw +ffffffff82811058 r pool_lock_ops_mtx +ffffffff82812000 r pselregister.evf +ffffffff8281200c r pselregister.evff +ffffffff82813000 R pipe_rfiltops +ffffffff82813030 R pipe_wfiltops +ffffffff82813060 R pipe_efiltops +ffffffff82813090 r pipeops +ffffffff82814000 R socketops +ffffffff82815000 R sysvsem_vars +ffffffff82816000 R char_type +ffffffff82816100 R ttyread_filtops +ffffffff82816130 R ttywrite_filtops +ffffffff82816160 R ttyexcept_filtops +ffffffff82817000 R ptcread_filtops +ffffffff82817030 R ptcwrite_filtops +ffffffff82817060 R ptcexcept_filtops +ffffffff82819000 R domains +ffffffff8281a000 R unixdomain +ffffffff8281a050 R unixsw +ffffffff8281b000 R soread_filtops +ffffffff8281b030 R sowrite_filtops +ffffffff8281b060 R soexcept_filtops +ffffffff8281c000 R sun_noname +ffffffff8281c010 R uipc_usrreqs +ffffffff8281c0b8 R uipc_dgram_usrreqs +ffffffff8281c160 R unpstctl_vars +ffffffff8281c190 R unpsqctl_vars +ffffffff8281c1c0 R unpdgctl_vars +ffffffff8281d000 r namecache_rb_cache_RBT_INFO +ffffffff8281d018 R namecache_rb_cache_RBT_TYPE +ffffffff8281e000 R generic_filtops +ffffffff8281f000 r buf_rb_bufs_RBT_INFO +ffffffff8281f018 R buf_rb_bufs_RBT_TYPE +ffffffff8281f020 r typename +ffffffff82820000 R sync_vops +ffffffff82821000 R vnops +ffffffff82822000 R spec_vops +ffffffff82823000 R dead_vops +ffffffff82824000 R fifo_vops +ffffffff82824110 R fiforead_filtops +ffffffff82824140 R fifowrite_filtops +ffffffff82824170 R fifoexcept_filtops +ffffffff82825000 R regyear +ffffffff82825020 R leapyear +ffffffff82825040 r dos2unix +ffffffff82825140 r u2l +ffffffff82825240 r unix2dos +ffffffff82826008 R msdosfs_vfsops +ffffffff82827000 R msdosfs_vops +ffffffff82827110 R msdosfsread_filtops +ffffffff82827140 R msdosfswrite_filtops +ffffffff82827170 R msdosfsvnode_filtops +ffffffff82828000 r _utf_count +ffffffff82829000 R ntfs_vfsops +ffffffff8282a000 R ntfs_vops +ffffffff8282b000 R bpfread_filtops +ffffffff8282b030 R bpf_mbuf_ops +ffffffff8282c000 r bpf_mem_ops +ffffffff8282d000 R priq_ops +ffffffff8282d038 R ifq_priq_ops +ffffffff8282d040 r ifq_kstat_tpl +ffffffff8282d180 r ifiq_kstat_tpl +ffffffff8282e000 r ether_crc32_le_update.crctab +ffffffff8282e040 r ether_crc32_be_update.crctab +ffffffff8282f000 r lcp +ffffffff8282f078 r ipcp +ffffffff8282f0f0 r ipv6cp +ffffffff8282f168 r chap +ffffffff8282f1e0 r pap +ffffffff82830000 R ifmedia_baudrate_descriptions +ffffffff82831000 r fcstab +ffffffff82833000 R tunread_filtops +ffffffff82833030 R tunwrite_filtops +ffffffff82834000 R bridge_brport +ffffffff82835000 R bstp_etheraddr +ffffffff82836000 r eb_tree_RBT_INFO +ffffffff82836018 R eb_tree_RBT_TYPE +ffffffff82837000 r veb_etherbridge_ops +ffffffff82837028 r veb_pf_ipv4 +ffffffff82837040 r veb_pf_ipv6 +ffffffff82838000 r pipex_pppoe_padding +ffffffff82839000 r rn_addmask.normal_chars +ffffffff8283a000 R route_src +ffffffff8283a010 R route_usrreqs +ffffffff8283a0b8 R routedomain +ffffffff8283a100 R routesw +ffffffff8283b000 R gre_vars +ffffffff8283b030 r mgre_tree_RBT_INFO +ffffffff8283b048 R mgre_tree_RBT_TYPE +ffffffff8283b050 r egre_tree_RBT_INFO +ffffffff8283b068 R egre_tree_RBT_TYPE +ffffffff8283b070 r nvgre_ucast_tree_RBT_INFO +ffffffff8283b088 R nvgre_ucast_tree_RBT_TYPE +ffffffff8283b090 r nvgre_mcast_tree_RBT_INFO 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pppx_ifs_RBT_TYPE +ffffffff82841080 r pppac_rd_filtops +ffffffff828410b0 r pppac_wr_filtops +ffffffff82842000 r vxlan_peers_RBT_INFO +ffffffff82842018 R vxlan_peers_RBT_TYPE +ffffffff82842020 r vxlan_etherbridge_ops +ffffffff82843000 R stoeplitz_cache +ffffffff82844000 R ieee80211_std_rateset_11a +ffffffff82844010 R ieee80211_std_rateset_11b +ffffffff82844020 R ieee80211_std_rateset_11g +ffffffff82844030 R ieee80211_std_ratesets_11n +ffffffff828443b0 R ieee80211_std_ratesets_11ac +ffffffff828446b0 r ieee80211_setbasicrates.basic +ffffffff82844710 r ieee80211_setmode.chanflags +ffffffff82844730 r ieee80211_rate2media.rates +ffffffff828448c0 r ieee80211_media2rate.ieeerates +ffffffff82845000 r Sbox +ffffffff82847000 r ieee80211_ioctl.empty_macaddr +ffffffff82848000 r ieee80211_find_rxnode.zero +ffffffff82848008 r ieee80211_tree_RBT_INFO +ffffffff82848020 R ieee80211_tree_RBT_TYPE +ffffffff82848028 r ieee80211_ess_tree_RBT_INFO +ffffffff82848040 R ieee80211_ess_tree_RBT_TYPE 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ipsec_ids_tree_RBT_INFO +ffffffff82857018 R ipsec_ids_tree_RBT_TYPE +ffffffff82857020 r ipsec_ids_flows_RBT_INFO +ffffffff82857038 R ipsec_ids_flows_RBT_TYPE +ffffffff82857040 R xformsw +ffffffff82857158 R xformswNXFORMSW +ffffffff82858000 R espctl_vars +ffffffff82858050 R ahctl_vars +ffffffff82858070 R ipcompctl_vars +ffffffff82858090 R ipsecctl_vars +ffffffff82859000 R ipseczeroes +ffffffff8285a000 r carp_set_state.carp_states +ffffffff8285b000 r Rcon +ffffffff8285c000 r Te2 +ffffffff8285c400 r Te3 +ffffffff8285c800 r Te0 +ffffffff8285cc00 r Te1 +ffffffff8285d000 r rcon +ffffffff8285d030 r Td0 +ffffffff8285d430 r Td1 +ffffffff8285d830 r Td2 +ffffffff8285dc30 r Td3 +ffffffff8285e030 r Td4 +ffffffff82860000 r K256 +ffffffff82860100 r sha512_initial_hash_value +ffffffff82860140 r K512 +ffffffff828603c0 r sha384_initial_hash_value +ffffffff82861000 r Blowfish_initstate.initstate +ffffffff82863000 r cast_sbox1 +ffffffff82863400 r cast_sbox2 +ffffffff82863800 r cast_sbox3 +ffffffff82863c00 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fragtbl124 +ffffffff82877160 R fragtbl8 +ffffffff82878000 R ffs_vfsops +ffffffff82878070 R sbtry +ffffffff82878080 R ffs_vars +ffffffff82879000 R ffs_vops +ffffffff82879110 R ffs_specvops +ffffffff82879220 R ffs_fifovops +ffffffff8287a000 R mfs_vfsops +ffffffff8287b000 R mfs_vops +ffffffff8287c000 r quotatypes +ffffffff8287d000 R ufsread_filtops +ffffffff8287d030 R ufswrite_filtops +ffffffff8287d060 R ufsvnode_filtops +ffffffff8287f000 R ext2fs_vfsops +ffffffff8287f070 r incompat +ffffffff82880000 R ext2fs_vops +ffffffff82880110 R ext2fs_specvops +ffffffff82880220 R ext2fs_fifovops +ffffffff82881000 R uaddr_kernel_functions +ffffffff82881030 R uaddr_rnd_functions +ffffffff82881060 R uaddr_bestfit_functions +ffffffff82881090 R uaddr_pivot_functions +ffffffff828810c0 R uaddr_stack_brk_functions +ffffffff828810f0 r uaddr_free_rbtree_RBT_INFO +ffffffff82881108 R uaddr_free_rbtree_RBT_TYPE +ffffffff82882000 R aobj_pager +ffffffff82883000 R uvm_deviceops +ffffffff82884000 R kv_any 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esigcode +ffffffff828a3038 R sigfill +ffffffff828a3039 R sigfillsiz +ffffffff828a3039 r esigfill +ffffffff828a303d r bogus_proc_pmap +ffffffff828a3070 r spl_lowered +ffffffff828a30a6 r intr_spl_lowered +ffffffff828a3113 R _xrstor +ffffffff828a3117 R _xrstors +ffffffff828a311b R _xsave +ffffffff828a311f R _xsaves +ffffffff828a3123 R _xsaveopt +ffffffff828a3127 R _pcid_set_reuse +ffffffff828a3133 R _jmprax +ffffffff828a3136 R _jmprax_len +ffffffff828a3138 R _jmpr11 +ffffffff828a313c R _jmpr11_len +ffffffff828a313e R _jmpr13 +ffffffff828a3142 R _jmpr13_len +ffffffff828a5000 r cpurevs +ffffffff828a516c r amd64_errata_set5 +ffffffff828a516e r amd64_errata_set1 +ffffffff828a5180 r amd64_errata_set8 +ffffffff828a519f r amd64_errata_set6 +ffffffff828a51a4 r amd64_errata_set7 +ffffffff828a51ac r amd64_errata_set3 +ffffffff828a51af r amd64_errata_set2 +ffffffff828a51b8 r amd64_errata_set9 +ffffffff828a6000 R ptp_masks +ffffffff828a6020 R ptp_shifts +ffffffff828a6030 R nkptpmax +ffffffff828a6050 R nbpd +ffffffff828a6070 R normal_pdes +ffffffff828a7000 R trap_type +ffffffff828a70b0 R trap_types +ffffffff828a8000 r x86fpflags_to_siginfo.x86fp_siginfo_table +ffffffff828a9000 R x86_soft_intr_to_ssir +ffffffff828ab000 R Xexceptions +ffffffff828ab100 r spl_lowered +ffffffff828ab12d R i8259_stubs +ffffffff828ab2ad R ioapic_edge_stubs +ffffffff828ab8ad R ioapic_level_stubs +ffffffff828ac000 R _stac +ffffffff828ac003 R _clac +ffffffff828ad000 R x86_bus_space_io_ops +ffffffff828ad130 R x86_bus_space_mem_ops +ffffffff828ae000 ? cpu_spinup_trampoline +ffffffff828ae0b6 R cpu_spinup_trampoline_end +ffffffff828ae0b6 R mp_tramp_data_start +ffffffff828ae0fc R mp_tramp_data_end +ffffffff828b0000 R db_acpi_cmds +ffffffff828b00a0 R db_machine_command_table +ffffffff828b1000 r i8254_delay.delaytab +ffffffff828b2000 R rasops_cmap +ffffffff828b3000 r reverse +ffffffff828b3100 r ibm437_level1 +ffffffff828b3230 r ibm437_level2_0 +ffffffff828b3248 r ibm437_level2_1 +ffffffff828b3260 r ibm437_level2_3 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eephy_funcs +ffffffff828bb040 r eephys +ffffffff828bc000 R exphy_ca +ffffffff828bc028 R exphy_funcs +ffffffff828bd000 R rlphy_ca +ffffffff828bd028 R rlphy_funcs +ffffffff828bd040 r rlphys +ffffffff828be000 R lxtphy_ca +ffffffff828be028 R lxtphy_funcs +ffffffff828be040 R lxtphy971_funcs +ffffffff828be060 r lxtphys +ffffffff828bf000 R luphy_ca +ffffffff828bf028 R luphy_funcs +ffffffff828bf040 r luphys +ffffffff828c0000 R mtdphy_ca +ffffffff828c0028 R mtdphy_funcs +ffffffff828c0040 r mtdphys +ffffffff828c1000 R icsphy_ca +ffffffff828c1028 R icsphy_funcs +ffffffff828c1040 r icsphys +ffffffff828c2000 R sqphy_ca +ffffffff828c2028 R sqphy_funcs +ffffffff828c2040 r sqphys +ffffffff828c3000 R tqphy_ca +ffffffff828c3028 R tqphy_funcs +ffffffff828c3040 r tqphys +ffffffff828c4000 R ukphy_ca +ffffffff828c4028 R ukphy_funcs +ffffffff828c5000 R dcphy_ca +ffffffff828c5028 R dcphy_funcs +ffffffff828c6000 R bmtphy_ca +ffffffff828c6028 R bmtphy_funcs +ffffffff828c6040 r bmtphys +ffffffff828c7000 R brgphy_ca +ffffffff828c7028 R brgphy_copper_funcs +ffffffff828c7040 R brgphy_fiber_funcs +ffffffff828c7058 R brgphy_5708s_funcs +ffffffff828c7070 R brgphy_5709s_funcs +ffffffff828c7090 r brgphys +ffffffff828c7300 r brgphy_bcm5401_dspcode.dspcode +ffffffff828c8000 R xmphy_ca +ffffffff828c8028 R xmphy_funcs +ffffffff828c8040 r xmphys +ffffffff828c9000 R amphy_ca +ffffffff828c9028 R amphy_funcs +ffffffff828c9040 r amphys +ffffffff828ca000 R acphy_ca +ffffffff828ca028 R acphy_funcs +ffffffff828ca040 r acphys +ffffffff828cb000 R nsgphy_ca +ffffffff828cb028 R nsgphy_funcs +ffffffff828cb040 r nsgphys +ffffffff828cc000 R urlphy_ca +ffffffff828cc028 R urlphy_funcs +ffffffff828cd000 R rgephy_ca +ffffffff828cd028 R rgephy_funcs +ffffffff828cd040 r rgephys +ffffffff828ce000 R ciphy_ca +ffffffff828ce028 R ciphy_funcs +ffffffff828ce040 r ciphys +ffffffff828cf000 R ipgphy_ca +ffffffff828cf028 R ipgphy_funcs +ffffffff828cf040 r ipgphys +ffffffff828d0000 R etphy_funcs +ffffffff828d0018 R etphy_ca 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R hds_ca +ffffffff828e2028 R hds_mpath_ops +ffffffff828e3000 R atapiscsi_ca +ffffffff828e3028 r atapiscsi_switch +ffffffff828e4000 R wd_ca +ffffffff828e5000 R atascsi_switch +ffffffff828e6000 R mainbus_ca +ffffffff828e7000 R bios_ca +ffffffff828e8000 R mpbios_ca +ffffffff828e8030 r loc_where +ffffffff828e9000 R mpbios_icu_table +ffffffff828ea000 R cpu_ca +ffffffff828eb000 R lapic_timer_intrclock +ffffffff828ec000 R ioapic_ca +ffffffff828ed000 R efifb_ca +ffffffff828ed028 R efifb_screen_list +ffffffff828ee000 R pvbus_ca +ffffffff828ef000 R pvclock_ca +ffffffff828f0000 R vmt_ca +ffffffff828f1000 R xen_ca +ffffffff828f2000 R xs_errors +ffffffff828f3000 R xnf_ca +ffffffff828f4000 R xbf_ca +ffffffff828f4028 R xbf_switch +ffffffff828f5000 R hyperv_ca +ffffffff828f5028 R hv_guid_network +ffffffff828f5038 R hv_guid_ide +ffffffff828f5048 R hv_guid_scsi +ffffffff828f5058 R hv_guid_shutdown +ffffffff828f5068 R hv_guid_timesync +ffffffff828f5078 R hv_guid_heartbeat +ffffffff828f5088 R hv_guid_kvp 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pci_subclass_input +ffffffff82902770 R pci_subclass_dock +ffffffff829027c0 R pci_subclass_processor +ffffffff82902880 R pci_subclass_serialbus +ffffffff82902990 R pci_subclass_wireless +ffffffff82902a70 R pci_subclass_i2o +ffffffff82902aa0 R pci_subclass_satcom +ffffffff82902b20 R pci_subclass_crypto +ffffffff82902b80 R pci_subclass_dasp +ffffffff82902c10 R pci_class +ffffffff82902e20 r pci_known_vendors +ffffffff82904400 r pci_known_products +ffffffff82928000 R vga_pci_ca +ffffffff82928030 r vga_devs +ffffffff82929000 R ahc_pci_ident_table +ffffffff829295d0 R ahc_pci_ca +ffffffff8292a000 R ahd_pci_ident_table +ffffffff8292a198 R ahd_num_pci_devs +ffffffff8292a1a0 R ahd_pci_ca +ffffffff8292a1d0 r pci_bus_modes +ffffffff8292a210 r pci_status_strings +ffffffff8292a250 r pci_status_source +ffffffff8292a290 r split_status_strings +ffffffff8292b000 R adw_pci_ca +ffffffff8292b028 R adw_pci_devices +ffffffff8292c000 r adw_3550_Default_EEPROM +ffffffff8292c080 r adw_38C0800_Default_EEPROM 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mfii_ca +ffffffff82939028 R mfii_switch +ffffffff82939050 R mfii_pd_switch +ffffffff82939078 R mfii_iop_thunderbolt +ffffffff82939088 R mfii_iop_25 +ffffffff82939098 R mfii_iop_35 +ffffffff829390b0 R mfii_devices +ffffffff82939180 r mfi_bbu_indicators +ffffffff8293a000 R ips_ca +ffffffff8293a028 r ips_ids +ffffffff8293a040 r ips_chips +ffffffff8293a090 r ips_names +ffffffff8293a128 r ips_switch +ffffffff8293a150 r ips_pt_switch +ffffffff8293b000 R eap_ca +ffffffff8293b028 R eap1370_hw_if +ffffffff8293b0e0 R eap1371_hw_if +ffffffff8293b198 R eap_midi_hw_if +ffffffff8293b1d0 R eap_devices +ffffffff8293c000 R auacer_pci_devices +ffffffff8293c008 R auacer_ca +ffffffff8293c030 R auacer_hw_if +ffffffff8293d000 R auich_ca +ffffffff8293d028 R auich_hw_if +ffffffff8293d0e0 r auich_devices +ffffffff8293e000 R azalia_ca +ffffffff8293e028 R azalia_hw_if +ffffffff8293e0e0 R azalia_pci_devices +ffffffff8293e120 r pin_devices +ffffffff8293e1a0 r line_colors +ffffffff8293e220 r wtypes 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auvia_devices +ffffffff829450f0 r auvia_set_params_sub.slottab +ffffffff82946000 R gdt_pci_ca +ffffffff82947000 R ciss_pci_ca +ffffffff82947030 R ciss_pci_devices +ffffffff82948000 R qlw_pci_ca +ffffffff82948030 r qlw_devices +ffffffff82948050 r isp_1040_risc_code +ffffffff8294d9f0 r isp_1080_risc_code +ffffffff82955470 r isp_12160_risc_code +ffffffff8295d000 R qla_pci_ca +ffffffff8295d030 r qla_devices +ffffffff8295e000 R qle_ca +ffffffff8295e028 R qle_switch +ffffffff8295e050 r qle_devices +ffffffff8295e070 r isp_2400_risc_code +ffffffff8298da50 r isp_2500_risc_code +ffffffff829c0000 R mpi_pci_ca +ffffffff829c0030 r mpi_devices +ffffffff829c1000 R mpii_ca +ffffffff829c1028 R mpii_switch +ffffffff829c1050 r mpii_devices +ffffffff829c2000 R sili_pci_ca +ffffffff829c2030 r sili_devices +ffffffff829c3000 R aq_devices +ffffffff829c3060 R aq_products +ffffffff829c31d0 R aq_fw1x_ops +ffffffff829c31f8 R aq_fw2x_ops +ffffffff829c3220 R aq2_fw_ops +ffffffff829c3248 R aq_ca +ffffffff829c4000 R de_ca +ffffffff829c4030 r tulip_srom_conninfo +ffffffff829c4120 r tulip_mii_phy_attrlist +ffffffff829c41e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff829c4208 r tulip_21040_10baset_only_boardsw +ffffffff829c4230 r tulip_21040_boardsw +ffffffff829c4258 r tulip_2114x_isv_boardsw +ffffffff829c4280 r tulip_21140_smc9332_boardsw +ffffffff829c42a8 r tulip_21040_auibnc_only_boardsw +ffffffff829c42d0 r tulip_21140_cogent_em100_boardsw +ffffffff829c42f8 r tulip_21140_accton_boardsw +ffffffff829c4320 r tulip_21140_eb_boardsw +ffffffff829c4348 r tulip_21041_boardsw +ffffffff829c4370 r tulip_read_macaddr.testpat +ffffffff829c4380 r tulip_vendors +ffffffff829c4430 r tulip_media_to_ifmedia +ffffffff829c4490 r tulip_chipdescs +ffffffff829c5000 R ep_pci_ca +ffffffff829c5030 R ep_pci_devices +ffffffff829c6000 R pcn_ca +ffffffff829c6028 R pcn_devices +ffffffff829c6030 r pcn_79c970_rcvfw +ffffffff829c6050 r pcn_79c970_xmtsp +ffffffff829c6070 r pcn_79c970_xmtfw +ffffffff829c6090 r pcn_79c971_rcvfw +ffffffff829c60b0 r pcn_79c971_xmtsp_sram +ffffffff829c60d0 r pcn_79c971_xmtsp +ffffffff829c60f0 r pcn_79c971_xmtfw +ffffffff829c6110 r pcn_variants +ffffffff829c7000 R siop_products +ffffffff829c8000 R siop_pci_ca +ffffffff829c9000 R rdcide_setup +ffffffff829c9005 R rdcide_hold +ffffffff829c900a R rdcide_udmatim +ffffffff829c9010 R rdcide_udmaclk +ffffffff829c9028 R default_product_desc +ffffffff829c9040 R pciide_intel_products +ffffffff829c9630 R pciide_amd_products +ffffffff829c9690 R pciide_cmd_products +ffffffff829c9730 R pciide_via_products +ffffffff829c9810 R pciide_cypress_products +ffffffff829c9820 R pciide_sis_products +ffffffff829c9870 R pciide_natsemi_products +ffffffff829c9890 R pciide_acer_products +ffffffff829c98a0 R pciide_triones_products +ffffffff829c98f0 R pciide_promise_products +ffffffff829c9ac0 R pciide_acard_products +ffffffff829c9b10 R pciide_serverworks_products +ffffffff829c9bb0 R pciide_nvidia_products +ffffffff829c9e80 R pciide_ite_products +ffffffff829c9ea0 R pciide_ati_products +ffffffff829c9f20 R pciide_jmicron_products +ffffffff829c9f70 R pciide_phison_products +ffffffff829c9f80 R pciide_rdc_products +ffffffff829c9f90 R pciide_vendors +ffffffff829ca140 R pciide_pci_ca +ffffffff829ca168 R pciide_jmb_ca +ffffffff829ca190 r piix_isp_dma +ffffffff829ca193 r piix_rtc_dma +ffffffff829ca196 r apollo_pio_set +ffffffff829ca19b r cmd0643_9_data_tim_pio +ffffffff829ca1a0 r cmd0643_9_data_tim_dma +ffffffff829ca1a3 r cmd680_channel_map.init_val +ffffffff829ca1b1 r cmd680_setup_channel.udma2_tbl +ffffffff829ca1b8 r cmd680_setup_channel.dma_tbl +ffffffff829ca1be r cmd680_setup_channel.pio_tbl +ffffffff829ca1d0 r satalink_ba5_regmap +ffffffff829ca690 r sii3114_chansetup.channel_names +ffffffff829ca6b0 r cy_pio_pulse +ffffffff829ca6c0 r sis_udma133new_tim +ffffffff829ca6e0 r sis_pio133new_tim +ffffffff829ca6f4 r sis_dma133new_tim +ffffffff829ca700 r sis_udma66_tim +ffffffff829ca706 r sis_udma100new_tim +ffffffff829ca70c r sis_udma133old_tim +ffffffff829ca713 r sis_pio_act +ffffffff829ca718 r sis_pio_rec +ffffffff829ca71d r natsemi_pio_pulse +ffffffff829ca722 r natsemi_pio_recover +ffffffff829ca727 r natsemi_dma_pulse +ffffffff829ca72a r natsemi_dma_recover +ffffffff829ca730 r scx200_udma33 +ffffffff829ca73c r scx200_dma33 +ffffffff829ca750 r scx200_pio33 +ffffffff829ca778 r acer_udma +ffffffff829ca77e r acer_pio +ffffffff829ca790 r hpt370_pio +ffffffff829ca7a4 r hpt370_dma +ffffffff829ca7b0 r hpt370_udma +ffffffff829ca7d0 r hpt372_pio +ffffffff829ca7e4 r hpt372_dma +ffffffff829ca7f0 r hpt372_udma +ffffffff829ca80c r hpt366_dma +ffffffff829ca820 r hpt366_udma +ffffffff829ca840 r hpt374_pio +ffffffff829ca854 r hpt374_dma +ffffffff829ca860 r hpt374_udma +ffffffff829ca87c r pdc2xx_pa +ffffffff829ca881 r pdc2xx_pb +ffffffff829ca886 r pdc2xx_dma_mb +ffffffff829ca889 r pdc2xx_dma_mc +ffffffff829ca88c r pdc2xx_udma_mc +ffffffff829ca892 r acard_act_udma +ffffffff829ca899 r acard_rec_udma +ffffffff829ca8a0 r acard_udma_conf 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r ixl_722 +ffffffff829de510 r ixl_pf_aq_regs +ffffffff829de578 r ixl_710_decrepit +ffffffff829de5a0 r ixl_phy_type_map +ffffffff829de770 r ixl_speed_type_map +ffffffff829de7b0 r ixl_hmc_pack_rxq +ffffffff829de830 r ixl_hmc_pack_txq +ffffffff829de8a0 r ixl_sfp_ops +ffffffff829de8b8 r ixl_qsfp_ops +ffffffff829df000 r dwqe_pci_devices +ffffffff829df018 R dwqe_pci_ca +ffffffff829e0000 R xge_ca +ffffffff829e0028 R xge_devices +ffffffff829e0030 r xge_fix_mac +ffffffff829e0110 r xge_xena_dtx_cfg +ffffffff829e0170 r xge_herc_dtx_cfg +ffffffff829e1000 R thtc_ca +ffffffff829e1028 R tht_ca +ffffffff829e1050 r thtc_devices +ffffffff829e1068 r tht_link_state.interval +ffffffff829e2000 R myx_ca +ffffffff829e2028 R myx_devices +ffffffff829e3000 R oce_ca +ffffffff829e3030 R oce_devices +ffffffff829e4000 R dc_pci_ca +ffffffff829e5000 R epic_pci_ca +ffffffff829e5028 R epic_pci_devices +ffffffff829e6000 R ti_pci_ca +ffffffff829e6030 R ti_devices +ffffffff829e7000 R ne_pci_ca +ffffffff829e7030 R ne_pci_prod +ffffffff829e8000 R gem_pci_ca +ffffffff829e8030 R gem_pci_devices +ffffffff829e8050 r gem_promhdr +ffffffff829e8052 r gem_promdat +ffffffff829e805a r gem_promdat2 +ffffffff829e9000 R cas_ca +ffffffff829e9028 R cas_pci_devices +ffffffff829e9030 r cas_promhdr +ffffffff829e9032 r cas_promdat_sun +ffffffff829e903a r cas_promdat_ns +ffffffff829e9042 r cas_promdat2 +ffffffff829ea000 R sf_pci_ca +ffffffff829ea028 R sf_pci_products +ffffffff829eb000 R sis_ca +ffffffff829eb028 R sis_devices +ffffffff829ec000 R se_devices +ffffffff829ec008 R se_ca +ffffffff829ed000 R mbg_ca +ffffffff829ed030 R mbg_devices +ffffffff829ee000 R uhci_pci_ca +ffffffff829ef000 R ohci_pci_ca +ffffffff829f0000 R ehci_pci_ca +ffffffff829f1000 R xhci_pci_ca +ffffffff829f2000 R cbb_pci_ca +ffffffff829f2028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff829f3000 R skc_devices +ffffffff829f3030 R skc_ca +ffffffff829f3058 R sk_ca +ffffffff829f4000 R mskc_devices +ffffffff829f40a8 R mskc_ca +ffffffff829f40d0 R msk_ca +ffffffff829f4100 r msk_mib +ffffffff829f5000 R puc_pci_ca +ffffffff829f6000 R puc_devs +ffffffff829fb000 R com_puc_ca +ffffffff829fb030 r puc_port_types +ffffffff829fc000 R lpt_puc_ca +ffffffff829fd000 R wi_pci_ca +ffffffff829fd030 r wi_pci_products +ffffffff829fe000 R an_pci_ca +ffffffff829fe030 R an_pci_devices +ffffffff829ff000 R iwi_devices +ffffffff829ff010 R iwi_ca +ffffffff82a00000 R wpi_ca +ffffffff82a00028 r wpi_devices +ffffffff82a00030 r wpi_rates +ffffffff82a00050 r wpi_rf_gain_5ghz +ffffffff82a000a0 r wpi_dsp_gain_5ghz +ffffffff82a000f0 r wpi_rf_gain_2ghz +ffffffff82a00140 r wpi_dsp_gain_2ghz +ffffffff82a00190 r wpi_pmgt +ffffffff82a00310 r wpi_bands +ffffffff82a01000 R iwn_mcs2ridx +ffffffff82a01020 R iwn_ca +ffffffff82a01050 r iwn_devices +ffffffff82a010e8 r iwn4965_sensitivity_limits +ffffffff82a01124 r iwn5000_sensitivity_limits +ffffffff82a01160 r iwn5150_sensitivity_limits +ffffffff82a0119c r iwn1000_sensitivity_limits +ffffffff82a011d8 r iwn6000_sensitivity_limits +ffffffff82a01214 r iwn2000_sensitivity_limits +ffffffff82a01250 r iwn_fw_errmsg +ffffffff82a01340 r iwn4965_set_txpower.tdiv +ffffffff82a01360 r iwn4965_rf_gain_5ghz +ffffffff82a013d0 r iwn4965_dsp_gain_5ghz +ffffffff82a01440 r iwn4965_dsp_gain_2ghz +ffffffff82a014b0 r iwn_pmgt +ffffffff82a016f0 r iwn4965_post_alive.qid2fifo +ffffffff82a01700 r iwn_bands +ffffffff82a01770 r iwn_rates +ffffffff82a01820 r iwn4965_rf_gain_2ghz +ffffffff82a02000 R iwm_nvm_channels +ffffffff82a02030 R iwm_nvm_channels_8000 +ffffffff82a02070 R iwm_rates +ffffffff82a020d0 R iwm_ht_mcs2ridx +ffffffff82a02110 R iwm_tid_to_ac +ffffffff82a02118 R iwm_ac_to_tx_fifo +ffffffff82a02120 R iwm_nvm_to_read +ffffffff82a02144 r iwm_set_hw_address_8000.reserved_mac +ffffffff82a02180 r iwm_sf_full_timeout +ffffffff82a021b0 r iwm_sf_full_timeout_def +ffffffff82a021e0 r advanced_lookup +ffffffff82a02320 r iwm_devices +ffffffff82a02360 R iwm_ca +ffffffff82a03000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff82a03020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff82a03040 R iwx_qu_b0_hr1_b0 +ffffffff82a03060 R iwx_qu_b0_hr_b0 +ffffffff82a03080 R iwx_ax201_cfg_qu_hr +ffffffff82a030a0 R iwx_qu_c0_hr1_b0 +ffffffff82a030c0 R iwx_qu_c0_hr_b0 +ffffffff82a030e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff82a03100 R iwx_quz_a0_hr1_b0 +ffffffff82a03120 R iwx_ax201_cfg_quz_hr +ffffffff82a03140 R iwx_cfg_so_a0_hr_b0 +ffffffff82a03160 R iwx_cfg_quz_a0_hr_b0 +ffffffff82a03180 R iwx_2ax_cfg_so_gf_a0 +ffffffff82a031a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff82a031c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff82a031e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff82a03200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff82a03220 R iwx_2ax_cfg_so_jf_b0 +ffffffff82a03240 R iwx_nvm_channels_8000 +ffffffff82a03280 R iwx_rates +ffffffff82a032e0 R iwx_mcs2ridx +ffffffff82a03320 R iwx_tid_to_ac +ffffffff82a03328 R iwx_ac_to_tx_fifo +ffffffff82a03330 r iwx_nvm_channels_uhb +ffffffff82a0339e r iwx_is_valid_mac_addr.reserved_mac +ffffffff82a033b0 r iwx_sf_full_timeout +ffffffff82a033e0 r iwx_sf_full_timeout_def +ffffffff82a03410 r advanced_lookup +ffffffff82a03550 r iwx_devices +ffffffff82a03590 r iwx_dev_info_table +ffffffff82a03e18 R iwx_ca +ffffffff82a04000 R qwx_pci_ca +ffffffff82a04028 r qwx_pci_devices +ffffffff82a04030 R qwx_msi_config_one_msi +ffffffff82a04050 R qwx_msi_config +ffffffff82a040c8 r qwx_pci_ops_qca6390 +ffffffff82a040f8 r qwx_pci_ops_qcn9074 +ffffffff82a05000 R cmpci_ca +ffffffff82a05028 R cmpci_hw_if +ffffffff82a050e0 r cmpci_rate_table +ffffffff82a05120 R cmpci_devices +ffffffff82a05130 r cmpci_query_devinfo.mixer_port_names +ffffffff82a05160 r cmpci_query_devinfo.mixer_classes +ffffffff82a06000 R iha_pci_ca +ffffffff82a06028 R iha_switch +ffffffff82a07000 R pcscp_ca +ffffffff82a08000 R bge_ca +ffffffff82a08030 R bge_devices +ffffffff82a081b0 r bge_revisions +ffffffff82a08610 r bge_majorrevs +ffffffff82a08790 r bge_kstat_tpl +ffffffff82a09000 R bnx_devices +ffffffff82a09020 R bnx_ca +ffffffff82a0a000 R vge_ca +ffffffff82a0a028 R vge_devices +ffffffff82a0b000 R stge_ca +ffffffff82a0b028 R stge_mii_bitbang_ops +ffffffff82a0b050 R stge_devices +ffffffff82a0c000 R nfe_ca +ffffffff82a0c030 R nfe_devices +ffffffff82a0d000 R et_devices +ffffffff82a0d008 R et_ca +ffffffff82a0e000 R jme_devices +ffffffff82a0e008 R jme_ca +ffffffff82a0f000 R age_devices +ffffffff82a0f008 R age_ca +ffffffff82a10000 R alc_devices +ffffffff82a10038 R alc_ca +ffffffff82a11000 R ale_devices +ffffffff82a11008 R ale_ca +ffffffff82a12000 R amdpm_ca +ffffffff82a12030 R amdpm_ids +ffffffff82a13000 R bce_ca +ffffffff82a13028 R bce_devices +ffffffff82a14000 R ath_pci_ca +ffffffff82a15000 R athn_pci_ca +ffffffff82a15030 r athn_pci_devices +ffffffff82a16000 R atw_pci_ca +ffffffff82a16028 R atw_pci_devices +ffffffff82a17000 R rtw_pci_ca +ffffffff82a17030 R rtw_pci_products +ffffffff82a18000 R rtwn_pci_ca +ffffffff82a18030 r rtwn_pci_devices +ffffffff82a18040 r rtl8188eu_mac +ffffffff82a181b0 r rtl8192cu_mac +ffffffff82a18310 r rtl8192ce_mac +ffffffff82a18458 r rtl8188eu_bb_prog +ffffffff82a18480 r rtl8723a_bb_prog +ffffffff82a184a8 r rtl8192ce_bb_prog_1t +ffffffff82a184d0 r rtl8192ce_bb_prog_2t +ffffffff82a18500 r rtl8188eu_bb_regs +ffffffff82a18680 r rtl8188eu_bb_vals +ffffffff82a18980 r rtl8188eu_agc_vals +ffffffff82a18b80 r rtl8723a_bb_regs +ffffffff82a18d00 r rtl8723a_bb_vals +ffffffff82a18ff0 r rtl8192ce_agc_vals +ffffffff82a19270 r rtl8192ce_bb_regs +ffffffff82a193f0 r rtl8192ce_bb_vals_1t +ffffffff82a196e0 r rtl8192ce_bb_vals_2t +ffffffff82a1a000 R ral_pci_ca +ffffffff82a1a030 R ral_pci_devices +ffffffff82a1b000 R acx_pci_ca +ffffffff82a1b028 R acx_pci_devices +ffffffff82a1c000 R pgt_pci_ca +ffffffff82a1c028 R pgt_pci_devices +ffffffff82a1d000 R malo_pci_ca +ffffffff82a1d028 R malo_pci_devices +ffffffff82a1e000 R bwi_pci_ca +ffffffff82a1e030 R bwi_pci_devices +ffffffff82a1f000 R piixpm_ca +ffffffff82a1f030 R piixpm_ids +ffffffff82a20000 R vic_ca +ffffffff82a20028 R vic_devices +ffffffff82a21000 R vmx_devices +ffffffff82a21008 R vmx_ca +ffffffff82a21030 r vmx_tx_kstat_tpl +ffffffff82a210d0 r vmx_kstat_rate +ffffffff82a210e0 r vmx_rx_kstat_tpl +ffffffff82a22000 R vmwpvs_ca +ffffffff82a22028 R vmwpvs_switch +ffffffff82a23000 R lii_ca +ffffffff82a23028 R lii_devices +ffffffff82a24000 R ichiic_ca +ffffffff82a24030 R ichiic_ids +ffffffff82a25000 R viapm_ca +ffffffff82a25030 R viapm_ids +ffffffff82a25070 r val_to_temp +ffffffff82a25870 r val_to_uV.mult +ffffffff82a26000 R amdiic_ca +ffffffff82a26028 R amdiic_ids +ffffffff82a27000 R nviic_ca +ffffffff82a27030 R nviic_ids +ffffffff82a28000 R sdhc_pci_ca +ffffffff82a29000 R kate_ca +ffffffff82a29030 r kate_proc +ffffffff82a2a000 R km_ca +ffffffff82a2a030 r km_devices +ffffffff82a2b000 R ksmn_ca +ffffffff82a2b030 r ksmn_devices +ffffffff82a2c000 R iosf_pci_ca +ffffffff82a2d000 R itherm_devices +ffffffff82a2d008 R itherm_ca +ffffffff82a2e000 R pchtemp_ca +ffffffff82a2e030 R pchtemp_devices +ffffffff82a2f000 R rtsx_pci_ca +ffffffff82a30000 R xspd_ca +ffffffff82a30028 R xspd_devices +ffffffff82a31000 R virtio_pci_ca +ffffffff82a32000 R dwiic_pci_ca +ffffffff82a32030 R dwiic_pci_ids +ffffffff82a33000 R bwfm_pci_ca +ffffffff82a33030 r bwfm_pci_devices +ffffffff82a34000 R ccp_pci_ca +ffffffff82a34030 r ccp_pci_devices +ffffffff82a35000 R bnxt_devices +ffffffff82a35040 R bnxt_ca +ffffffff82a36000 R mcx_ca +ffffffff82a36030 r mcx_devices +ffffffff82a36060 r mcx_rss_config +ffffffff82a360d0 r mcx_eth_cap_map +ffffffff82a362d0 r mcx_ext_eth_cap_map +ffffffff82a363d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff82a363e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff82a36400 r mcx_kstat_ppcnt_rfc2819 +ffffffff82a36418 r mcx_kstat_ppcnt_rfc3635 +ffffffff82a36430 r mcx_ppcnt_ieee8023_tpl +ffffffff82a365b0 r mcx_ppcnt_rfc2863_tpl +ffffffff82a366c0 r mcx_ppcnt_rfc2819_tpl +ffffffff82a36870 r mcx_ppcnt_rfc3635_tpl +ffffffff82a369b0 r mcx_kstat_mtmp_tpl +ffffffff82a36a50 r mcx_kstat_mtmp_rate +ffffffff82a36a60 r mcx_queue_kstat_tpl +ffffffff82a37000 R iavf_ca +ffffffff82a37030 r iavf_devices +ffffffff82a37040 r iavf_aq_regs +ffffffff82a370b0 r iavf_link_speeds +ffffffff82a38000 R rge_ca +ffffffff82a38028 R rge_devices +ffffffff82a38030 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff82a38050 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff82a380b0 r rtl8125_mac_cfg3_mcu +ffffffff82a38950 r rtl8125_mac_cfg5_mcu +ffffffff82a39970 r rtl8125_mac_bps +ffffffff82a39d70 r rtl8125b_mac_bps +ffffffff82a39f98 r rge_kstats_tpl +ffffffff82a3b000 R igc_devices +ffffffff82a3b040 R igc_ca +ffffffff82a3b070 r igc_counters +ffffffff82a3c000 R ngbe_devices +ffffffff82a3c008 R ngbe_ca +ffffffff82a3d000 R com_pci_ca +ffffffff82a3d030 R com_pci_ids +ffffffff82a3e000 R ufshci_pci_ca +ffffffff82a3f000 r agp_attach.agp_max +ffffffff82a3f048 R agp_ca +ffffffff82a40000 R intagp_ca +ffffffff82a41000 r drm_plane_create_rotation_property.props +ffffffff82a42000 r drm_bridge_priv_state_funcs +ffffffff82a44000 r color_encoding_name +ffffffff82a44020 r color_range_name +ffffffff82a45000 r drm_subpixel_enum_list +ffffffff82a45060 r drm_dpms_enum_list +ffffffff82a450a0 r drm_dvi_i_select_enum_list +ffffffff82a450d0 r drm_dvi_i_subconnector_enum_list +ffffffff82a45100 r drm_tv_mode_enum_list +ffffffff82a45170 r drm_tv_select_enum_list +ffffffff82a451c0 r drm_tv_subconnector_enum_list +ffffffff82a45210 r drm_dp_subconnector_enum_list +ffffffff82a45280 r colorspace_names +ffffffff82a45300 r drm_link_status_enum_list +ffffffff82a45320 r drm_scaling_mode_enum_list +ffffffff82a45360 r drm_aspect_ratio_enum_list +ffffffff82a45390 r drm_content_type_enum_list +ffffffff82a453e0 r drm_panel_orientation_enum_list +ffffffff82a45420 r privacy_screen_enum +ffffffff82a46000 r drm_crtc_fence_ops +ffffffff82a47000 r drm_dmt_modes +ffffffff82a49940 r edid_cea_modes_1 +ffffffff82a4d4d0 r edid_cea_modes_193 +ffffffff82a4e180 r edid_quirk_list +ffffffff82a4e360 r drm_mode_do_interlace_quirk.cea_interlaced +ffffffff82a4e3a0 r edid_4k_modes +ffffffff82a4e600 r edid_est_modes +ffffffff82a4ee00 r est3_modes +ffffffff82a4ef60 r stereo_mandatory_modes +ffffffff82a4efe0 r extra_modes +ffffffff82a50000 r drm_encoder_enum_list +ffffffff82a52000 r drm_fbdev_dma_helper_funcs +ffffffff82a52010 r drm_fbdev_dma_client_funcs +ffffffff82a52030 r drm_fbdev_dma_fb_ops +ffffffff82a53000 r drm_fbdev_generic_helper_funcs +ffffffff82a53010 r drm_fbdev_generic_client_funcs +ffffffff82a53030 r drm_fbdev_generic_fb_ops +ffffffff82a55000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82a55004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82a55008 r drm_fb_xrgb8888_to_xrgb1555.dst_pixsize +ffffffff82a5500c r drm_fb_xrgb8888_to_argb1555.dst_pixsize +ffffffff82a55010 r drm_fb_xrgb8888_to_rgba5551.dst_pixsize +ffffffff82a55014 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff82a55018 r drm_fb_xrgb8888_to_argb8888.dst_pixsize +ffffffff82a5501c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82a55020 r drm_fb_xrgb8888_to_argb2101010.dst_pixsize +ffffffff82a55024 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82a55028 r drm_fb_xrgb8888_to_xbgr8888.dst_pixsize +ffffffff82a5502c r drm_fb_xrgb8888_to_abgr8888.dst_pixsize +ffffffff82a56000 r __drm_format_info.formats +ffffffff82a57000 R drm_pgops +ffffffff82a58000 r drm_gem_dma_default_funcs +ffffffff82a59000 R drm_gem_fb_funcs +ffffffff82a5a000 r drm_ioctls +ffffffff82a5c000 r dma_fence_stub_ops +ffffffff82a5c040 R dma_fence_array_ops +ffffffff82a5c080 R dma_fence_chain_ops +ffffffff82a5c0c0 R dmabufops +ffffffff82a5c0f8 R syncfileops +ffffffff82a5d000 r drm_plane_type_enum_list +ffffffff82a5e000 r tv_modes_parameters +ffffffff82a5e0c0 r drm_mode_status_names +ffffffff82a5e200 r drm_named_modes +ffffffff82a5f000 r primary_plane_funcs +ffffffff82a5f068 r safe_modeset_formats +ffffffff82a60000 r orientation_data +ffffffff82a639c8 r lcd800x1280_rightside_up +ffffffff82a639e0 r lcd720x1280_rightside_up +ffffffff82a639f8 r lcd800x1280_leftside_up +ffffffff82a63a10 r lcd1080x1920_leftside_up +ffffffff82a63a28 r lcd1200x1920_rightside_up +ffffffff82a63a40 r gpd_micropc +ffffffff82a63a58 r gpd_pocket +ffffffff82a63a70 r gpd_pocket2 +ffffffff82a63a88 r gpd_win +ffffffff82a63aa0 r gpd_win2 +ffffffff82a63ab8 r lcd1080x1920_rightside_up +ffffffff82a63ad0 r itworks_tw891 +ffffffff82a63ae8 r lcd1600x2560_leftside_up +ffffffff82a63b00 r lcd1600x2560_rightside_up +ffffffff82a63b18 r onegx1_pro +ffffffff82a63b30 r lcd1280x1920_rightside_up +ffffffff82a63b48 r gpd_onemix2s +ffffffff82a63b60 r .compoundliteral +ffffffff82a63b70 r .compoundliteral.5 +ffffffff82a63b98 r .compoundliteral.9 +ffffffff82a63bb8 r .compoundliteral.17 +ffffffff82a63bf8 r .compoundliteral.21 +ffffffff82a63c18 r .compoundliteral.23 +ffffffff82a63c28 r .compoundliteral.25 +ffffffff82a63c38 r .compoundliteral.29 +ffffffff82a64000 r drm_gem_prime_dmabuf_ops +ffffffff82a66000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82a67000 r drm_dp_phy_name.phy_names +ffffffff82a67048 r drm_dp_i2c_algo +ffffffff82a67058 r drm_dp_i2c_lock_ops +ffffffff82a67070 r dp_aux_bl_ops +ffffffff82a67090 r dpcd_quirk_list +ffffffff82a67320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82a68000 R drm_dp_mst_topology_state_funcs +ffffffff82a68020 r drm_dp_mst_req_type_str.req_type_str +ffffffff82a681f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82a68220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82a68278 r drm_dp_mst_i2c_algo +ffffffff82a69000 r rc_parameters_1_2_444 +ffffffff82a695f0 r rc_parameters_pre_scr +ffffffff82a69920 r rc_parameters_1_2_422 +ffffffff82a69df0 r rc_parameters_1_2_420 +ffffffff82a6b000 r hdmi_colorimetry_val +ffffffff82a6c018 R ttm_bo_vm_ops +ffffffff82a6d000 r ttm_range_manager_func +ffffffff82a6e018 r ttm_kmap_iter_io_ops +ffffffff82a6e030 r ttm_kmap_iter_linear_io_ops +ffffffff82a6f000 r ttm_sys_manager_func +ffffffff82a70000 r ttm_kmap_iter_tt_ops +ffffffff82a71000 r drm_sched_fence_ops_scheduled +ffffffff82a71040 r drm_sched_fence_ops_finished +ffffffff82a72000 R ch7017_ops +ffffffff82a73000 R ch7xxx_ops +ffffffff82a73060 r ch7xxx_ids +ffffffff82a74000 R ivch_ops +ffffffff82a74060 r backup_addresses +ffffffff82a75000 R ns2501_ops +ffffffff82a75060 r mode_agnostic_values +ffffffff82a750e0 r ns2501_modes +ffffffff82a76000 R sil164_ops +ffffffff82a77000 R tfp410_ops +ffffffff82a78000 r chv_dpll +ffffffff82a78050 r vlv_dpll +ffffffff82a780a0 r g4x_dpll +ffffffff82a780f0 r pch_dpll +ffffffff82a78138 r intel_dp_enc_funcs +ffffffff82a79000 r intel_hdmi_enc_funcs +ffffffff82a7a000 r vlv_primary_formats +ffffffff82a7a030 r ivb_primary_formats +ffffffff82a7a050 r i965_primary_formats +ffffffff82a7a070 r i8xx_primary_formats +ffffffff82a7a080 r i965_plane_funcs +ffffffff82a7a0e8 r i8xx_plane_funcs +ffffffff82a7b000 r ilk_wm_funcs +ffffffff82a7b040 r vlv_wm_funcs +ffffffff82a7b080 r g4x_wm_funcs +ffffffff82a7b0c0 r nop_funcs +ffffffff82a7b100 r pnv_wm_funcs +ffffffff82a7b140 r i965_wm_funcs +ffffffff82a7b180 r i9xx_wm_funcs +ffffffff82a7b1c0 r i845_wm_funcs +ffffffff82a7b200 r cxsr_latency_table +ffffffff82a7c000 r gen11_dsi_encoder_funcs +ffffffff82a7c020 r gen11_dsi_connector_funcs +ffffffff82a7c098 r gen11_dsi_connector_helper_funcs +ffffffff82a7c0f8 r gen11_dsi_host_ops +ffffffff82a7d000 r intel_plane_helper_funcs +ffffffff82a7e000 r g4x_audio_funcs +ffffffff82a7e018 r ibx_audio_funcs +ffffffff82a7e030 r hsw_audio_funcs +ffffffff82a7e050 r hdmi_audio_clock +ffffffff82a7e0c0 r dp_aud_n_m +ffffffff82a7e270 r hdmi_aud_ncts_36bpp +ffffffff82a7e350 r hdmi_aud_ncts_30bpp +ffffffff82a7e430 r hdmi_aud_ncts_24bpp +ffffffff82a7f000 r intel_backlight_device_ops +ffffffff82a7f018 r bxt_pwm_funcs +ffffffff82a7f048 r cnp_pwm_funcs +ffffffff82a7f078 r lpt_pwm_funcs +ffffffff82a7f0a8 r spt_pwm_funcs +ffffffff82a7f0d8 r pch_pwm_funcs +ffffffff82a7f108 r ext_pwm_funcs +ffffffff82a7f138 r vlv_pwm_funcs +ffffffff82a7f168 r i965_pwm_funcs +ffffffff82a7f198 r i9xx_pwm_funcs +ffffffff82a7f1c8 r pwm_bl_funcs +ffffffff82a80000 r bdb_blocks +ffffffff82a80160 r adlp_aux_ch_map +ffffffff82a80169 r adls_aux_ch_map +ffffffff82a80170 r rkl_aux_ch_map +ffffffff82a80175 r direct_aux_ch_map +ffffffff82a8017e r translate_iboost.mapping +ffffffff82a80181 r adlp_ddc_pin_map +ffffffff82a8018e r adls_ddc_pin_map +ffffffff82a8019b r rkl_pch_tgp_ddc_pin_map +ffffffff82a801a6 r gen9bc_tgp_ddc_pin_map +ffffffff82a801b1 r icp_ddc_pin_map +ffffffff82a801c0 r cnp_ddc_pin_map +ffffffff82a81000 r mtl_sa_info +ffffffff82a81006 r adlp_sa_info +ffffffff82a8100c r adls_sa_info +ffffffff82a81012 r rkl_sa_info +ffffffff82a81018 r tgl_sa_info +ffffffff82a81020 r intel_bw_funcs +ffffffff82a82000 r intel_cdclk_funcs +ffffffff82a82010 r mtl_cdclk_funcs +ffffffff82a82030 r mtl_cdclk_table +ffffffff82a82088 r tgl_cdclk_funcs +ffffffff82a820b0 r dg2_cdclk_table +ffffffff82a82160 r adlp_a_step_cdclk_table +ffffffff82a821e0 r rplu_cdclk_table +ffffffff82a822c8 r rplu_cdclk_funcs +ffffffff82a822f0 r adlp_cdclk_table +ffffffff82a823b0 r rkl_cdclk_table +ffffffff82a824a0 r icl_cdclk_table +ffffffff82a82588 r ehl_cdclk_funcs +ffffffff82a825a8 r icl_cdclk_funcs +ffffffff82a825c8 r bxt_cdclk_funcs +ffffffff82a825f0 r glk_cdclk_table +ffffffff82a82620 r bxt_cdclk_table +ffffffff82a82668 r skl_cdclk_funcs +ffffffff82a82688 r bdw_cdclk_funcs +ffffffff82a826a8 r hsw_cdclk_funcs +ffffffff82a826c8 r chv_cdclk_funcs +ffffffff82a826e8 r vlv_cdclk_funcs +ffffffff82a82708 r fixed_400mhz_cdclk_funcs +ffffffff82a82728 r ilk_cdclk_funcs +ffffffff82a82748 r gm45_cdclk_funcs +ffffffff82a82768 r g33_cdclk_funcs +ffffffff82a82788 r i965gm_cdclk_funcs +ffffffff82a827a8 r pnv_cdclk_funcs +ffffffff82a827c8 r i945gm_cdclk_funcs +ffffffff82a827e8 r i915gm_cdclk_funcs +ffffffff82a82808 r i915g_cdclk_funcs +ffffffff82a82828 r i865g_cdclk_funcs +ffffffff82a82848 r i85x_cdclk_funcs +ffffffff82a82868 r i845g_cdclk_funcs +ffffffff82a82888 r i830_cdclk_funcs +ffffffff82a828a8 r g33_get_cdclk.div_3200 +ffffffff82a828ae r g33_get_cdclk.div_4000 +ffffffff82a828b4 r g33_get_cdclk.div_4800 +ffffffff82a828ba r g33_get_cdclk.div_5333 +ffffffff82a828c0 r i965gm_get_cdclk.div_3200 +ffffffff82a828c3 r i965gm_get_cdclk.div_4000 +ffffffff82a828c6 r i965gm_get_cdclk.div_5333 +ffffffff82a83000 r chv_color_funcs +ffffffff82a83040 r vlv_color_funcs +ffffffff82a83080 r i965_color_funcs +ffffffff82a830c0 r i9xx_color_funcs +ffffffff82a83100 r tgl_color_funcs +ffffffff82a83140 r icl_color_funcs +ffffffff82a83180 r glk_color_funcs +ffffffff82a831c0 r skl_color_funcs +ffffffff82a83200 r bdw_color_funcs +ffffffff82a83240 r hsw_color_funcs +ffffffff82a83280 r ivb_color_funcs +ffffffff82a832c0 r ilk_color_funcs +ffffffff82a83300 r chv_cgm_csc_matrix_identity +ffffffff82a8331e r ilk_csc_matrix_rgb_to_ycbcr +ffffffff82a8333c r ilk_csc_matrix_limited_range +ffffffff82a8335a r ilk_csc_matrix_identity +ffffffff82a84000 r icl_procmon_values +ffffffff82a85000 r force_audio_names +ffffffff82a85040 r broadcast_rgb_names +ffffffff82a86000 r intel_crt_connector_funcs +ffffffff82a86078 r intel_crt_enc_funcs +ffffffff82a860a0 r intel_spurious_crt_detect +ffffffff82a864a8 r intel_crt_connector_helper_funcs +ffffffff82a87000 r g4x_crtc_funcs +ffffffff82a870c0 r i965_crtc_funcs +ffffffff82a87180 r i915gm_crtc_funcs +ffffffff82a87240 r i915_crtc_funcs +ffffffff82a87300 r i8xx_crtc_funcs +ffffffff82a873c0 r bdw_crtc_funcs +ffffffff82a87480 r ilk_crtc_funcs +ffffffff82a88000 r output_format_str +ffffffff82a88020 r output_type_str +ffffffff82a89000 r intel_cursor_plane_funcs +ffffffff82a89068 r intel_cursor_formats +ffffffff82a8a000 r mtl_c10_hdmi_tables +ffffffff82a8a170 r mtl_c10_hdmi_25_2 +ffffffff82a8a18c r mtl_c10_hdmi_27_0 +ffffffff82a8a1a8 r mtl_c10_hdmi_27027 +ffffffff82a8a1c4 r mtl_c10_hdmi_28320 +ffffffff82a8a1e0 r mtl_c10_hdmi_30240 +ffffffff82a8a1fc r mtl_c10_hdmi_31500 +ffffffff82a8a218 r mtl_c10_hdmi_36000 +ffffffff82a8a234 r mtl_c10_hdmi_40000 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blobs_huc +ffffffff82aed000 r hsw_render_ring_cmd_table +ffffffff82aed030 r gen7_render_cmd_table +ffffffff82aed050 r hsw_render_reg_tables +ffffffff82aed070 r ivb_render_reg_tables +ffffffff82aed080 r gen7_video_cmd_table +ffffffff82aed0a0 r gen9_blt_cmd_table +ffffffff82aed0b0 r hsw_blt_ring_cmd_table +ffffffff82aed0e0 r gen7_blt_cmd_table +ffffffff82aed100 r gen9_blt_reg_tables +ffffffff82aed110 r hsw_blt_reg_tables +ffffffff82aed120 r ivb_blt_reg_tables +ffffffff82aed130 r hsw_vebox_cmd_table +ffffffff82aed150 r noop_desc +ffffffff82aed1b0 r gen7_common_cmds +ffffffff82aed5d0 r gen7_render_cmds +ffffffff82aedcb0 r hsw_render_cmds +ffffffff82aee2e0 r gen7_render_regs +ffffffff82aee600 r hsw_render_regs +ffffffff82aee7a0 r gen7_video_cmds +ffffffff82aeea10 r gen9_blt_cmds +ffffffff82aef040 r gen7_blt_cmds +ffffffff82aef250 r hsw_blt_cmds +ffffffff82aef300 r gen9_blt_regs +ffffffff82aef4e0 r gen7_blt_regs +ffffffff82aef540 r gen7_vecs_cmds +ffffffff82af0000 R inteldrm_backlight_ops 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xehpsdv_revids +ffffffff82b01080 r adlp_rplp_revids +ffffffff82b010a0 r adlp_revids +ffffffff82b010e0 r adls_rpls_revids +ffffffff82b01120 r adls_revids +ffffffff82b01160 r rkl_revids +ffffffff82b01180 r bxt_revids +ffffffff82b011c0 r skl_revids +ffffffff82b011f0 r pvc_bd_subids +ffffffff82b01210 r pvc_ct_subids +ffffffff82b03000 r forcewake_domain_names +ffffffff82b03080 r __mtl_fw_ranges +ffffffff82b031f0 r mtl_shadowed_regs +ffffffff82b03270 r __pvc_fw_ranges +ffffffff82b03420 r pvc_shadowed_regs +ffffffff82b03540 r __dg2_fw_ranges +ffffffff82b03810 r dg2_shadowed_regs +ffffffff82b03930 r __xehp_fw_ranges +ffffffff82b03c00 r gen12_shadowed_regs +ffffffff82b03d20 r __gen12_fw_ranges +ffffffff82b03f30 r __gen11_fw_ranges +ffffffff82b040e0 r gen11_shadowed_regs +ffffffff82b041a0 r __gen9_fw_ranges +ffffffff82b04320 r gen8_shadowed_regs +ffffffff82b04350 r __chv_fw_ranges +ffffffff82b04410 r __gen6_fw_ranges +ffffffff82b04420 r __vlv_fw_ranges +ffffffff82b04478 r uncore_get_fallback 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caicos_mgcg_default +ffffffff82b0c110 r turks_sysls_default +ffffffff82b0c1d0 r caicos_sysls_default +ffffffff82b0c280 r caicos_cgcg_cgls_enable +ffffffff82b0c4d0 r caicos_cgcg_cgls_disable +ffffffff82b0c730 r barts_mgcg_enable +ffffffff82b0c7b0 r turks_mgcg_enable +ffffffff82b0c830 r caicos_mgcg_enable +ffffffff82b0c8b0 r caicos_mgcg_disable +ffffffff82b0c930 r turks_sysls_enable +ffffffff82b0c9f0 r caicos_sysls_enable +ffffffff82b0caa0 r turks_sysls_disable +ffffffff82b0cb60 r caicos_sysls_disable +ffffffff82b0d000 r didt_config_ci +ffffffff82b0d5b4 r defaults_bonaire_xt +ffffffff82b0d600 r defaults_saturn_xt +ffffffff82b0d64c r defaults_hawaii_xt +ffffffff82b0d698 r defaults_hawaii_pro +ffffffff82b0e000 r ci_program_jump_on_start.data +ffffffff82b0f000 r bonaire_io_mc_regs +ffffffff82b0f120 r hawaii_io_mc_regs +ffffffff82b0f1d0 r mc_cg_registers +ffffffff82b0f200 r bonaire_mgcg_cgcg_init +ffffffff82b0f5e0 r bonaire_golden_registers +ffffffff82b0f7d0 r bonaire_golden_common_registers +ffffffff82b0f800 r bonaire_golden_spm_registers +ffffffff82b0f810 r kalindi_mgcg_cgcg_init +ffffffff82b0fab0 r kalindi_golden_registers +ffffffff82b0fc20 r kalindi_golden_common_registers +ffffffff82b0fc50 r kalindi_golden_spm_registers +ffffffff82b0fc60 r godavari_golden_registers +ffffffff82b0fde0 r spectre_mgcg_cgcg_init +ffffffff82b10200 r spectre_golden_registers +ffffffff82b10330 r spectre_golden_common_registers +ffffffff82b10360 r spectre_golden_spm_registers +ffffffff82b10370 r hawaii_mgcg_cgcg_init +ffffffff82b10880 r hawaii_golden_registers +ffffffff82b10a30 r hawaii_golden_common_registers +ffffffff82b10a6c r hawaii_golden_spm_registers +ffffffff82b10a80 r spectre_rlc_save_restore_register_list +ffffffff82b11170 r kalindi_rlc_save_restore_register_list +ffffffff82b11680 r ci_cs_data +ffffffff82b116a0 r ci_SECT_CONTEXT_defs +ffffffff82b11720 r ci_SECT_CONTEXT_def_1 +ffffffff82b11a70 r ci_SECT_CONTEXT_def_3 +ffffffff82b11a90 r ci_SECT_CONTEXT_def_4 +ffffffff82b11d04 r ci_SECT_CONTEXT_def_5 +ffffffff82b11d0c r ci_SECT_CONTEXT_def_6 +ffffffff82b11d10 r ci_SECT_CONTEXT_def_2 +ffffffff82b12160 r ci_SECT_CONTEXT_def_7 +ffffffff82b12510 r cik_default_state +ffffffff82b14000 r dce3_2_afmt_write_sad_regs.eld_reg_to_type +ffffffff82b15000 r dce6_afmt_write_sad_regs.eld_reg_to_type +ffffffff82b16000 r ni_tx_offsets +ffffffff82b16020 r evergreen_dp_offsets +ffffffff82b16040 r evergreen_disp_int_status +ffffffff82b16060 r evergreen_golden_registers +ffffffff82b16260 r evergreen_golden_registers2 +ffffffff82b16310 r cypress_mgcg_init +ffffffff82b16a10 r juniper_mgcg_init +ffffffff82b16e80 r redwood_mgcg_init +ffffffff82b171b0 r cedar_golden_registers +ffffffff82b17390 r cedar_mgcg_init +ffffffff82b175f0 r wrestler_golden_registers +ffffffff82b17840 r supersumo_golden_registers +ffffffff82b17ba0 r sumo_golden_registers +ffffffff82b17be0 r barts_golden_registers +ffffffff82b17e00 r turks_golden_registers +ffffffff82b18040 r caicos_golden_registers +ffffffff82b18280 r sumo_rlc_save_restore_register_list +ffffffff82b183d0 r evergreen_cs_data +ffffffff82b18410 r SECT_CONTEXT_defs +ffffffff82b18490 r SECT_CLEAR_defs +ffffffff82b184b0 r SECT_CTRLCONST_defs +ffffffff82b184d0 r SECT_CONTEXT_def_2 +ffffffff82b184f0 r SECT_CONTEXT_def_4 +ffffffff82b18680 r SECT_CONTEXT_def_5 +ffffffff82b186a0 r SECT_CONTEXT_def_6 +ffffffff82b18780 r SECT_CONTEXT_def_1 +ffffffff82b18f20 r SECT_CONTEXT_def_3 +ffffffff82b19000 r SECT_CONTEXT_def_7 +ffffffff82b19488 r SECT_CLEAR_def_1 +ffffffff82b19494 r SECT_CTRLCONST_def_1 +ffffffff82b194a0 r evergreen_default_state +ffffffff82b1a000 r cayman_reg_safe_bm +ffffffff82b1c000 r evergreen_reg_safe_bm +ffffffff82b1f000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff82b20000 r didt_config_kv +ffffffff82b21000 r barts_io_mc_regs +ffffffff82b210f0 r turks_io_mc_regs +ffffffff82b211e0 r caicos_io_mc_regs +ffffffff82b212d0 r cayman_io_mc_regs +ffffffff82b213c0 r cayman_golden_registers +ffffffff82b21580 r cayman_golden_registers2 +ffffffff82b215d0 r dvst_golden_registers +ffffffff82b21860 r dvst_golden_registers2 +ffffffff82b21890 r scrapper_golden_registers +ffffffff82b21d70 r tn_rlc_save_restore_register_list +ffffffff82b21f60 r cayman_cs_data +ffffffff82b21fa0 r SECT_CONTEXT_defs +ffffffff82b22020 r SECT_CLEAR_defs +ffffffff82b22040 r SECT_CTRLCONST_defs +ffffffff82b22060 r SECT_CONTEXT_def_2 +ffffffff82b22080 r SECT_CONTEXT_def_4 +ffffffff82b22210 r SECT_CONTEXT_def_5 +ffffffff82b22230 r SECT_CONTEXT_def_1 +ffffffff82b229d0 r SECT_CONTEXT_def_3 +ffffffff82b22ab0 r SECT_CONTEXT_def_6 +ffffffff82b22b90 r SECT_CONTEXT_def_7 +ffffffff82b23018 r SECT_CLEAR_def_1 +ffffffff82b23024 r SECT_CTRLCONST_def_1 +ffffffff82b23030 r cayman_default_state +ffffffff82b24000 r cac_weights_cayman_xt +ffffffff82b24128 r cac_weights_cayman_pro +ffffffff82b24250 r cac_weights_cayman_le +ffffffff82b24380 r cayman_cgcg_cgls_default +ffffffff82b245c0 r cayman_mgcg_default +ffffffff82b24f20 r cayman_sysls_default +ffffffff82b24ff0 r cayman_cgcg_cgls_enable +ffffffff82b25240 r cayman_cgcg_cgls_disable +ffffffff82b254a0 r cayman_mgcg_enable +ffffffff82b25520 r cayman_mgcg_disable +ffffffff82b255a0 r cayman_sysls_enable +ffffffff82b25670 r cayman_sysls_disable +ffffffff82b26000 r rn50_reg_safe_bm +ffffffff82b261a0 r r100_reg_safe_bm +ffffffff82b27000 r r200_reg_safe_bm +ffffffff82b28000 r r300_reg_safe_bm +ffffffff82b29000 r r420_reg_safe_bm +ffffffff82b2b000 r color_formats_table +ffffffff82b2b480 r r600_reg_safe_bm +ffffffff82b2e000 R r600_utc +ffffffff82b2e040 R r600_dtc +ffffffff82b2e080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82b30000 r r100_gfx_ring +ffffffff82b30070 r r300_gfx_ring +ffffffff82b300e0 r rv515_gfx_ring +ffffffff82b30150 r r600_gfx_ring +ffffffff82b301c0 r r600_dma_ring +ffffffff82b30230 r rv6xx_uvd_ring +ffffffff82b302a0 r rv770_uvd_ring +ffffffff82b30310 r evergreen_gfx_ring +ffffffff82b30380 r evergreen_dma_ring +ffffffff82b303f0 r cayman_gfx_ring +ffffffff82b30460 r cayman_dma_ring +ffffffff82b304d0 r cayman_uvd_ring +ffffffff82b30540 r trinity_vce_ring +ffffffff82b305b0 r si_gfx_ring +ffffffff82b30620 r si_dma_ring +ffffffff82b30690 r ci_gfx_ring +ffffffff82b30700 r ci_cp_ring +ffffffff82b30770 r ci_dma_ring +ffffffff82b307e0 r ci_vce_ring +ffffffff82b31000 r object_connector_convert +ffffffff82b31060 r supported_devices_connector_convert +ffffffff82b310a0 r supported_devices_connector_object_id_convert +ffffffff82b310c0 r thermal_controller_names +ffffffff82b31100 r pp_lib_thermal_controller_names +ffffffff82b32000 r pin_offsets +ffffffff82b32020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff82b34000 r thermal_controller_names +ffffffff82b34020 r default_primarydac_adj +ffffffff82b34120 r default_tvdac_adj +ffffffff82b34220 r default_tmds_pll +ffffffff82b35000 r radeon_dp_connector_funcs +ffffffff82b35078 r radeon_dp_connector_helper_funcs +ffffffff82b350d8 r radeon_lvds_bridge_connector_funcs +ffffffff82b35150 r radeon_vga_connector_funcs +ffffffff82b351c8 r radeon_vga_connector_helper_funcs +ffffffff82b35228 r radeon_dvi_connector_funcs +ffffffff82b352a0 r radeon_dvi_connector_helper_funcs +ffffffff82b35300 r radeon_edp_connector_funcs +ffffffff82b35378 r radeon_tv_connector_funcs +ffffffff82b353f0 r radeon_tv_connector_helper_funcs +ffffffff82b35450 r radeon_lvds_connector_funcs +ffffffff82b354c8 r radeon_lvds_connector_helper_funcs +ffffffff82b36000 r radeon_family_name +ffffffff82b363f0 r radeon_px_quirk_list +ffffffff82b37000 r radeon_fb_funcs +ffffffff82b37018 r radeon_mode_funcs +ffffffff82b37060 r radeon_tmds_pll_enum_list +ffffffff82b37080 r radeon_tv_std_enum_list +ffffffff82b37100 r radeon_underscan_enum_list +ffffffff82b37130 r radeon_audio_enum_list +ffffffff82b37160 r radeon_dither_enum_list +ffffffff82b37180 r radeon_output_csc_enum_list +ffffffff82b371c0 r radeon_crtc_funcs +ffffffff82b37280 r hpd_names +ffffffff82b372b0 r encoder_names +ffffffff82b373e0 r radeon_afmt_init.eg_offsets +ffffffff82b38000 r aux_offset +ffffffff82b39000 R radeondrm_ca +ffffffff82b39030 r pciidlist +ffffffff82b3d1d0 r kms_driver +ffffffff82b3d2c0 r radeon_ioctls_kms +ffffffff82b3e000 r radeon_fbdev_fb_helper_funcs +ffffffff82b3e010 r radeon_fbdev_client_funcs +ffffffff82b3e030 r radeon_fbdev_fb_ops +ffffffff82b3f000 R radeon_fence_ops +ffffffff82b41000 R radeon_gem_object_funcs +ffffffff82b41070 r radeon_gem_vm_ops +ffffffff82b42000 r radeon_i2c_algo +ffffffff82b42010 r radeon_atom_i2c_algo +ffffffff82b43000 r legacy_helper_funcs +ffffffff82b44000 r radeon_backlight_ops +ffffffff82b44018 r radeon_legacy_lvds_enc_funcs +ffffffff82b44038 r radeon_legacy_lvds_helper_funcs +ffffffff82b440a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82b440c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82b44128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82b44148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82b441b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82b441d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82b44238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82b44258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82b45000 r SLOPE_value +ffffffff82b45030 r YCOEF_EN_value +ffffffff82b45060 r YCOEF_value +ffffffff82b45090 r available_tv_modes +ffffffff82b45110 r hor_timing_NTSC +ffffffff82b45150 r vert_timing_NTSC +ffffffff82b45190 r hor_timing_PAL +ffffffff82b451d0 r vert_timing_PAL +ffffffff82b47000 r radeon_pm_state_type_name +ffffffff82b48000 r radeon_evict_flags.placements +ffffffff82b4b000 r rs600_reg_safe_bm +ffffffff82b4d000 r rv515_reg_safe_bm +ffffffff82b4e000 r dll_speed_table +ffffffff82b4f000 r r7xx_golden_registers +ffffffff82b4f090 r r7xx_golden_dyn_gpr_registers +ffffffff82b4f100 r rv770ce_golden_registers +ffffffff82b4f160 r rv770_golden_registers +ffffffff82b4f1b0 r rv770_mgcg_init +ffffffff82b4f8f0 r rv730_golden_registers +ffffffff82b4f950 r rv730_mgcg_init +ffffffff82b4fee0 r rv710_golden_registers +ffffffff82b4ff30 r rv710_mgcg_init +ffffffff82b501d0 r rv740_golden_registers +ffffffff82b50360 r rv740_mgcg_init +ffffffff82b52000 r rv730_smc_int_vectors +ffffffff82b52040 r rv710_smc_int_vectors +ffffffff82b52080 r rv740_smc_int_vectors +ffffffff82b520c0 r cypress_smc_int_vectors +ffffffff82b52100 r caicos_smc_int_vectors +ffffffff82b52140 r cayman_smc_int_vectors +ffffffff82b53000 r tahiti_io_mc_regs +ffffffff82b53120 r pitcairn_io_mc_regs +ffffffff82b53240 r verde_io_mc_regs +ffffffff82b53360 r oland_io_mc_regs +ffffffff82b53480 r hainan_io_mc_regs +ffffffff82b535a0 r crtc_offsets +ffffffff82b535c0 r si_disp_int_status +ffffffff82b535e0 r tahiti_golden_registers +ffffffff82b53760 r tahiti_golden_rlc_registers +ffffffff82b537b0 r tahiti_mgcg_cgcg_init +ffffffff82b53d98 r tahiti_golden_registers2 +ffffffff82b53db0 r pitcairn_golden_registers +ffffffff82b53f00 r pitcairn_golden_rlc_registers +ffffffff82b53f40 r pitcairn_mgcg_cgcg_init +ffffffff82b543b0 r verde_golden_registers +ffffffff82b54620 r verde_golden_rlc_registers +ffffffff82b54660 r verde_mgcg_cgcg_init +ffffffff82b54ae0 r oland_golden_registers +ffffffff82b54c30 r oland_golden_rlc_registers +ffffffff82b54c70 r oland_mgcg_cgcg_init +ffffffff82b55000 r hainan_golden_registers +ffffffff82b5512c r hainan_golden_registers2 +ffffffff82b55140 r hainan_mgcg_cgcg_init +ffffffff82b554b0 r verde_rlc_save_restore_register_list +ffffffff82b55820 r si_cs_data +ffffffff82b55840 r si_SECT_CONTEXT_defs +ffffffff82b558c0 r si_SECT_CONTEXT_def_1 +ffffffff82b55c10 r si_SECT_CONTEXT_def_3 +ffffffff82b55c30 r si_SECT_CONTEXT_def_4 +ffffffff82b55ea4 r si_SECT_CONTEXT_def_5 +ffffffff82b55ea8 r si_SECT_CONTEXT_def_6 +ffffffff82b55eb0 r si_SECT_CONTEXT_def_2 +ffffffff82b562f0 r si_SECT_CONTEXT_def_7 +ffffffff82b566a0 r mc_cg_registers +ffffffff82b566d0 r si_default_state +ffffffff82b57000 r cac_weights_tahiti +ffffffff82b574d0 r lcac_tahiti +ffffffff82b57ba0 r cac_override_tahiti +ffffffff82b57bb4 r powertune_data_tahiti +ffffffff82b57bf0 r dte_data_tahiti +ffffffff82b57cc0 r dte_data_new_zealand +ffffffff82b57d90 r dte_data_malta +ffffffff82b57e60 r lcac_pitcairn +ffffffff82b58530 r cac_override_pitcairn +ffffffff82b58544 r powertune_data_pitcairn +ffffffff82b58580 r lcac_cape_verde +ffffffff82b589d0 r cac_override_cape_verde +ffffffff82b589e4 r powertune_data_cape_verde +ffffffff82b58a20 r cac_weights_cape_verde_pro +ffffffff82b58ef0 r cac_weights_heathrow +ffffffff82b593c0 r cac_weights_chelsea_xt +ffffffff82b59890 r cac_weights_chelsea_pro +ffffffff82b59d60 r cac_weights_cape_verde +ffffffff82b5a230 r cac_weights_mars_pro +ffffffff82b5a700 r lcac_mars_pro +ffffffff82b5aa60 r cac_override_oland +ffffffff82b5aa74 r powertune_data_mars_pro +ffffffff82b5aab0 r cac_weights_mars_xt +ffffffff82b5af80 r cac_weights_oland_pro +ffffffff82b5b450 r cac_weights_oland_xt +ffffffff82b5b920 r lcac_oland +ffffffff82b5bc7c r powertune_data_oland +ffffffff82b5bcc0 r cac_weights_hainan +ffffffff82b5c184 r powertune_data_hainan +ffffffff82b5c1c0 r dte_data_aruba_pro +ffffffff82b5c290 r dte_data_tahiti_pro +ffffffff82b5c360 r dte_data_curacao_pro +ffffffff82b5c430 r dte_data_neptune_xt +ffffffff82b5c500 r dte_data_sun_xt +ffffffff82b5c5d0 r dte_data_venus_xtx +ffffffff82b5c6a0 r dte_data_venus_xt +ffffffff82b5c770 r dte_data_venus_pro +ffffffff82b5c840 r dte_data_mars_pro +ffffffff82b5d000 r si_program_jump_on_start.data +ffffffff82b5e000 r sumo_dtc +ffffffff82b5f000 r trinity_mgcg_shls_default +ffffffff82b5f380 r trinity_sysls_enable +ffffffff82b5f450 r trinity_sysls_disable +ffffffff82b61000 r GC_BASE +ffffffff82b610a8 r HDP_BASE +ffffffff82b61150 r MMHUB_BASE +ffffffff82b611f8 r ATHUB_BASE +ffffffff82b612a0 r NBIO_BASE +ffffffff82b61348 r MP0_BASE +ffffffff82b613f0 r MP1_BASE +ffffffff82b61498 r DF_BASE +ffffffff82b61540 r OSSSYS_BASE +ffffffff82b615e8 r SDMA0_BASE +ffffffff82b61690 r SDMA1_BASE +ffffffff82b61738 r SDMA2_BASE +ffffffff82b617e0 r SDMA3_BASE +ffffffff82b61888 r SDMA4_BASE +ffffffff82b61930 r SMUIO_BASE +ffffffff82b619d8 r THM_BASE +ffffffff82b61a80 r UMC_BASE +ffffffff82b61b28 r VCN_BASE +ffffffff82b62000 r amdgpu_afmt_predefined_acr +ffffffff82b63000 r atom_op_names +ffffffff82b633e0 r opcode_table +ffffffff82b63bd0 r atom_dst_to_src +ffffffff82b63c50 r atom_io_names +ffffffff82b63c80 r atom_table_names +ffffffff82b63ed0 r atom_iio_len +ffffffff82b64000 r object_connector_convert +ffffffff82b64058 R amdgpu_vbios_version_attr_group +ffffffff82b65000 r voltage_names +ffffffff82b65020 r pre_emph_names +ffffffff82b66000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82b68000 r amdgpu_benchmark.common_modes +ffffffff82b69000 r amdgpu_cgs_ops +ffffffff82b6a000 r amdgpu_connector_dp_funcs +ffffffff82b6a078 r amdgpu_connector_dp_helper_funcs +ffffffff82b6a0d8 r amdgpu_connector_edp_funcs +ffffffff82b6a150 r amdgpu_connector_vga_funcs +ffffffff82b6a1c8 r amdgpu_connector_vga_helper_funcs +ffffffff82b6a228 r amdgpu_connector_dvi_funcs +ffffffff82b6a2a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82b6a300 r amdgpu_connector_lvds_funcs +ffffffff82b6a378 r amdgpu_connector_lvds_helper_funcs +ffffffff82b6a3e0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82b6c000 R amdgpu_ctx_num_entities +ffffffff82b6d000 r amdgpu_kms_driver +ffffffff82b6d0f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82b6e000 r hw_id_map +ffffffff82b6e090 r hw_id_names +ffffffff82b6f000 r hpd_names +ffffffff82b6f030 r encoder_names +ffffffff82b6f180 r dcc_retile_formats +ffffffff82b6f270 r dcc_formats +ffffffff82b6f360 R amdgpu_mode_funcs +ffffffff82b6f3b0 r amdgpu_underscan_enum_list +ffffffff82b6f3e0 r amdgpu_audio_enum_list +ffffffff82b6f410 r amdgpu_dither_enum_list +ffffffff82b6f430 r amdgpu_fb_funcs_atomic +ffffffff82b6f448 r amdgpu_fb_funcs +ffffffff82b70000 R amdgpu_dmabuf_ops +ffffffff82b71000 R amdgpu_ioctls_kms +ffffffff82b71210 R amdgpu_partition_driver +ffffffff82b712f8 R amdgpu_ca +ffffffff82b71320 r pciidlist +ffffffff82b721f0 r amdgpu_unsupported_pciidlist +ffffffff82b72770 r amdgpu_kms_driver +ffffffff82b73000 r amdgpu_job_fence_ops +ffffffff82b73040 r amdgpu_fence_ops +ffffffff82b74000 r amdgpu_gem_object_funcs +ffffffff82b74070 r amdgpu_gem_vm_ops +ffffffff82b75000 R amdgpu_gtt_mgr_attr_group +ffffffff82b75018 r amdgpu_gtt_mgr_func +ffffffff82b76000 r amdgpu_atombios_i2c_algo +ffffffff82b77000 R node_id_to_phys_map +ffffffff82b78000 R amdgpu_sched_ops +ffffffff82b7a000 r amdgpu_vram_names +ffffffff82b7b000 r amdgpu_preempt_mgr_func +ffffffff82b7c000 R psp_ip_funcs +ffffffff82b7c0a8 R psp_v3_1_ip_block +ffffffff82b7c0c0 R psp_v10_0_ip_block +ffffffff82b7c0d8 R psp_v11_0_ip_block +ffffffff82b7c0f0 R psp_v11_0_8_ip_block +ffffffff82b7c108 R psp_v12_0_ip_block +ffffffff82b7c120 R psp_v13_0_ip_block +ffffffff82b7c138 R psp_v13_0_4_ip_block +ffffffff82b7e000 r sw_ring_info +ffffffff82b7f000 r amdgpu_evict_flags.placements +ffffffff82b83000 R amdgpu_vkms_ip_block +ffffffff82b84000 R amdgpu_vm_cpu_funcs +ffffffff82b86000 R amdgpu_vm_sdma_funcs +ffffffff82b87000 R amdgpu_vram_mgr_attr_group +ffffffff82b87018 r amdgpu_vram_mgr_func +ffffffff82b87040 r amdgpu_dummy_vram_mgr_func +ffffffff82b88000 r xgmi_pcs_err_status_reg_arct +ffffffff82b88020 r xgmi3x16_pcs_ras_fields +ffffffff82b881f0 r xgmi_pcs_ras_fields +ffffffff82b88310 r wafl_pcs_ras_fields +ffffffff82b89000 r GC_BASE +ffffffff82b890c0 r HDP_BASE +ffffffff82b89180 r MMHUB_BASE +ffffffff82b89240 r ATHUB_BASE +ffffffff82b89300 r NBIF0_BASE +ffffffff82b893c0 r MP0_BASE +ffffffff82b89480 r MP1_BASE +ffffffff82b89540 r UVD_BASE +ffffffff82b89600 r DF_BASE +ffffffff82b896c0 r OSSSYS_BASE +ffffffff82b89780 r SDMA0_BASE +ffffffff82b89840 r SDMA1_BASE +ffffffff82b89900 r SDMA2_BASE +ffffffff82b899c0 r SDMA3_BASE +ffffffff82b89a80 r SDMA4_BASE +ffffffff82b89b40 r SDMA5_BASE +ffffffff82b89c00 r SDMA6_BASE +ffffffff82b89cc0 r SDMA7_BASE +ffffffff82b89d80 r SMUIO_BASE +ffffffff82b89e40 r THM_BASE +ffffffff82b89f00 r UMC_BASE +ffffffff82b89fc0 r RSMU_BASE +ffffffff82b8b000 r cz_ih_ip_funcs +ffffffff82b8b0a8 R cz_ih_ip_block +ffffffff82b8b0c0 r cz_ih_funcs +ffffffff82b8c000 r crtc_offsets +ffffffff82b8c020 r dce_v10_0_ip_funcs +ffffffff82b8c0c8 R dce_v10_0_ip_block +ffffffff82b8c0e0 R dce_v10_1_ip_block +ffffffff82b8c0f8 r dce_v10_0_display_funcs +ffffffff82b8c150 r hpd_offsets +ffffffff82b8c168 r dce_v10_0_encoder_funcs +ffffffff82b8c188 r dce_v10_0_dac_helper_funcs +ffffffff82b8c1f0 r dce_v10_0_dig_helper_funcs +ffffffff82b8c258 r dce_v10_0_ext_helper_funcs +ffffffff82b8c2c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82b8c2f0 r dce_v10_0_crtc_irq_funcs +ffffffff82b8c300 r dce_v10_0_pageflip_irq_funcs +ffffffff82b8c310 r dce_v10_0_hpd_irq_funcs +ffffffff82b8c320 r interrupt_status_offsets +ffffffff82b8c380 r dce_v10_0_crtc_funcs +ffffffff82b8c440 r dce_v10_0_crtc_helper_funcs +ffffffff82b8c4c0 r vga_control_regs +ffffffff82b8c4e0 r dig_offsets +ffffffff82b8c500 r pin_offsets +ffffffff82b8c520 r fiji_mgcg_cgcg_init +ffffffff82b8c540 r golden_settings_fiji_a10 +ffffffff82b8c570 r tonga_mgcg_cgcg_init +ffffffff82b8c590 r golden_settings_tonga_a11 +ffffffff82b8d000 r crtc_offsets +ffffffff82b8d020 r dce_v11_0_ip_funcs +ffffffff82b8d0c8 R dce_v11_0_ip_block +ffffffff82b8d0e0 R dce_v11_2_ip_block +ffffffff82b8d0f8 r dce_v11_0_display_funcs +ffffffff82b8d150 r hpd_offsets +ffffffff82b8d168 r dce_v11_0_encoder_funcs +ffffffff82b8d188 r dce_v11_0_dac_helper_funcs +ffffffff82b8d1f0 r dce_v11_0_dig_helper_funcs +ffffffff82b8d258 r dce_v11_0_ext_helper_funcs +ffffffff82b8d2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82b8d2f0 r dce_v11_0_crtc_irq_funcs +ffffffff82b8d300 r dce_v11_0_pageflip_irq_funcs +ffffffff82b8d310 r dce_v11_0_hpd_irq_funcs +ffffffff82b8d320 r interrupt_status_offsets +ffffffff82b8d380 r dce_v11_0_crtc_funcs +ffffffff82b8d440 r dce_v11_0_crtc_helper_funcs +ffffffff82b8d4c0 r vga_control_regs +ffffffff82b8d4e0 r dig_offsets +ffffffff82b8d510 r cz_mgcg_cgcg_init +ffffffff82b8d530 r cz_golden_settings_a11 +ffffffff82b8d550 r stoney_golden_settings_a11 +ffffffff82b8d570 r polaris11_golden_settings_a11 +ffffffff82b8d5b0 r polaris10_golden_settings_a11 +ffffffff82b8e000 R df_v1_7_funcs +ffffffff82b8e070 r df_v1_7_channel_number +ffffffff82b8f000 R df_v3_6_funcs +ffffffff82b8f070 r df_v3_6_channel_number +ffffffff82b90000 R df_v4_3_funcs +ffffffff82b91000 r GC_BASE +ffffffff82b910a8 r HDP_BASE +ffffffff82b91150 r MMHUB_BASE +ffffffff82b911f8 r ATHUB_BASE +ffffffff82b912a0 r NBIO_BASE +ffffffff82b91348 r MP0_BASE +ffffffff82b913f0 r MP1_BASE +ffffffff82b91498 r VCN0_BASE +ffffffff82b91540 r DF_BASE +ffffffff82b915e8 r DCN_BASE +ffffffff82b91690 r OSSSYS_BASE +ffffffff82b91738 r SMUIO_BASE +ffffffff82b917e0 r THM_BASE +ffffffff82b92000 r gfx_v10_0_ip_funcs +ffffffff82b920a8 R gfx_v10_0_ip_block +ffffffff82b920c0 r gfx_v10_0_gfx_funcs +ffffffff82b92120 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82b983c0 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82b9bde0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82ba2080 r gfx_v10_0_kiq_pm4_funcs +ffffffff82ba20c0 r gfx_v10_0_ring_funcs_kiq +ffffffff82ba2200 r gfx_v10_0_ring_funcs_gfx +ffffffff82ba2340 r gfx_v10_0_ring_funcs_compute +ffffffff82ba2480 r gfx_v10_0_eop_irq_funcs +ffffffff82ba2490 r gfx_v10_0_kiq_irq_funcs +ffffffff82ba24a0 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82ba24b0 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82ba24c0 r gfx_v10_0_rlc_funcs +ffffffff82ba2528 r gfx_v10_0_rlc_funcs_sriov +ffffffff82ba2590 r gfx10_cs_data +ffffffff82ba25b0 r gfx10_SECT_CONTEXT_defs +ffffffff82ba2640 r gfx10_SECT_CONTEXT_def_1 +ffffffff82ba29a0 r gfx10_SECT_CONTEXT_def_3 +ffffffff82ba29b0 r gfx10_SECT_CONTEXT_def_4 +ffffffff82ba2c28 r gfx10_SECT_CONTEXT_def_5 +ffffffff82ba2c30 r gfx10_SECT_CONTEXT_def_6 +ffffffff82ba2c40 r gfx10_SECT_CONTEXT_def_2 +ffffffff82ba3080 r gfx10_SECT_CONTEXT_def_7 +ffffffff82ba3190 r gfx10_SECT_CONTEXT_def_8 +ffffffff82ba34c0 r golden_settings_gc_10_1 +ffffffff82ba3880 r golden_settings_gc_10_0_nv10 +ffffffff82ba3880 r golden_settings_gc_10_1_1 +ffffffff82ba3c10 r golden_settings_gc_10_1_2 +ffffffff82ba3c10 r golden_settings_gc_10_1_nv14 +ffffffff82ba4000 r golden_settings_gc_10_1_2_nv12 +ffffffff82ba4000 r golden_settings_gc_10_3 +ffffffff82ba4408 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82ba4410 r golden_settings_gc_10_3_2 +ffffffff82ba4800 r golden_settings_gc_10_3_vangogh +ffffffff82ba4a60 r golden_settings_gc_10_3_3 +ffffffff82ba4c40 r golden_settings_gc_10_3_4 +ffffffff82ba4fa0 r golden_settings_gc_10_3_5 +ffffffff82ba52a0 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82ba55d0 r golden_settings_gc_10_3_6 +ffffffff82ba57e0 r golden_settings_gc_10_3_7 +ffffffff82ba6000 r gfx_v11_0_ip_funcs +ffffffff82ba60a8 R gfx_v11_0_ip_block +ffffffff82ba60c0 r gfx_v11_0_gfx_funcs +ffffffff82ba6120 r gfx_v11_0_kiq_pm4_funcs +ffffffff82ba6160 r gfx_v11_0_ring_funcs_kiq +ffffffff82ba62a0 r gfx_v11_0_ring_funcs_gfx +ffffffff82ba63e0 r gfx_v11_0_ring_funcs_compute +ffffffff82ba6520 r gfx_v11_0_eop_irq_funcs +ffffffff82ba6530 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82ba6540 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82ba6550 r gfx_v11_0_rlc_gc_fed_irq_funcs +ffffffff82ba6560 r gfx_v11_0_rlc_funcs +ffffffff82ba65d0 r gfx11_cs_data +ffffffff82ba65f0 r gfx11_SECT_CONTEXT_defs +ffffffff82ba6670 r gfx11_SECT_CONTEXT_def_1 +ffffffff82ba69d0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82ba69e0 r gfx11_SECT_CONTEXT_def_5 +ffffffff82ba69e8 r gfx11_SECT_CONTEXT_def_6 +ffffffff82ba69f0 r gfx11_SECT_CONTEXT_def_2 +ffffffff82ba6e30 r gfx11_SECT_CONTEXT_def_4 +ffffffff82ba70b0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82ba7520 r golden_settings_gc_11_0_1 +ffffffff82ba7600 r golden_settings_gc_11_0 +ffffffff82ba8000 r gfx_v8_0_ip_funcs +ffffffff82ba80a8 R gfx_v8_0_ip_block +ffffffff82ba80c0 R gfx_v8_1_ip_block +ffffffff82ba80d8 r gfx_v8_0_gfx_funcs +ffffffff82ba8138 r gfx_v8_0_ring_funcs_kiq +ffffffff82ba8278 r gfx_v8_0_ring_funcs_gfx +ffffffff82ba83b8 r gfx_v8_0_ring_funcs_compute +ffffffff82ba8500 r amdgpu_gds_reg_offset +ffffffff82ba8600 r gfx_v8_0_eop_irq_funcs +ffffffff82ba8610 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82ba8620 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82ba8630 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82ba8640 r gfx_v8_0_sq_irq_funcs +ffffffff82ba8650 r sq_edc_source_names +ffffffff82ba8688 r iceland_rlc_funcs +ffffffff82ba86f0 r vi_cs_data +ffffffff82ba8710 r vi_SECT_CONTEXT_defs +ffffffff82ba8790 r vi_SECT_CONTEXT_def_1 +ffffffff82ba8ae0 r vi_SECT_CONTEXT_def_3 +ffffffff82ba8b00 r vi_SECT_CONTEXT_def_4 +ffffffff82ba8d74 r vi_SECT_CONTEXT_def_5 +ffffffff82ba8d7c r vi_SECT_CONTEXT_def_6 +ffffffff82ba8d80 r vi_SECT_CONTEXT_def_2 +ffffffff82ba91d0 r vi_SECT_CONTEXT_def_7 +ffffffff82ba9580 r vgpr_init_compute_shader +ffffffff82ba9690 r vgpr_init_regs +ffffffff82ba9720 r sgpr1_init_regs +ffffffff82ba97b0 r sgpr2_init_regs +ffffffff82ba9840 r sec_ded_counter_registers +ffffffff82ba98b0 r iceland_mgcg_cgcg_init +ffffffff82ba9bb0 r golden_settings_iceland_a11 +ffffffff82ba9c70 r iceland_golden_common_all +ffffffff82ba9cd0 r fiji_mgcg_cgcg_init +ffffffff82ba9e80 r golden_settings_fiji_a10 +ffffffff82ba9f10 r fiji_golden_common_all +ffffffff82ba9f90 r tonga_mgcg_cgcg_init +ffffffff82baa320 r golden_settings_tonga_a11 +ffffffff82baa3e0 r tonga_golden_common_all +ffffffff82baa440 r golden_settings_vegam_a11 +ffffffff82baa510 r vegam_golden_common_all +ffffffff82baa560 r golden_settings_polaris11_a11 +ffffffff82baa630 r polaris11_golden_common_all +ffffffff82baa680 r golden_settings_polaris10_a11 +ffffffff82baa750 r polaris10_golden_common_all +ffffffff82baa7b0 r cz_mgcg_cgcg_init +ffffffff82baab40 r cz_golden_settings_a11 +ffffffff82baabd0 r cz_golden_common_all +ffffffff82baac30 r stoney_mgcg_cgcg_init +ffffffff82baac70 r stoney_golden_settings_a11 +ffffffff82baacf0 r stoney_golden_common_all +ffffffff82bab000 R gfx_v9_0_ras_ops +ffffffff82bab040 r gfx_v9_0_ip_funcs +ffffffff82bab0e8 R gfx_v9_0_ip_block +ffffffff82bab100 r ras_gfx_subblocks +ffffffff82babb80 r gfx_v9_0_edc_counter_regs +ffffffff82babf20 r gfx_v9_0_ras_fields +ffffffff82bad000 r gfx_v9_0_gfx_funcs +ffffffff82bad060 r gfx_v9_0_kiq_pm4_funcs +ffffffff82bad0a0 r gfx_v9_0_ring_funcs_kiq +ffffffff82bad1e0 r gfx_v9_0_ring_funcs_gfx +ffffffff82bad320 r gfx_v9_0_sw_ring_funcs_gfx +ffffffff82bad460 r gfx_v9_0_ring_funcs_compute +ffffffff82bad5a0 r gfx_v9_0_eop_irq_funcs +ffffffff82bad5b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82bad5c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82bad5d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82bad5e0 r gfx_v9_0_rlc_funcs +ffffffff82bad650 r gfx9_cs_data +ffffffff82bad670 r gfx9_SECT_CONTEXT_defs +ffffffff82bad700 r gfx9_SECT_CONTEXT_def_1 +ffffffff82bada50 r gfx9_SECT_CONTEXT_def_3 +ffffffff82bada60 r gfx9_SECT_CONTEXT_def_4 +ffffffff82badcd4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82badcdc r gfx9_SECT_CONTEXT_def_6 +ffffffff82badce0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82baddf0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82bae260 r gfx9_SECT_CONTEXT_def_8 +ffffffff82bae4d0 r vgpr_init_compute_shader_arcturus +ffffffff82baed60 r vgpr_init_regs_arcturus +ffffffff82baeef0 r vgpr_init_regs +ffffffff82baf080 r sgpr1_init_regs +ffffffff82baf210 r sgpr2_init_regs +ffffffff82baf3a0 r golden_settings_gc_9_0 +ffffffff82baf580 r golden_settings_gc_9_0_vg10 +ffffffff82baf730 r golden_settings_gc_9_2_1 +ffffffff82baf8b0 r golden_settings_gc_9_2_1_vg12 +ffffffff82baf9f0 r golden_settings_gc_9_0_vg20 +ffffffff82bafb00 r golden_settings_gc_9_4_1_arct +ffffffff82bafc10 r golden_settings_gc_9_1 +ffffffff82bafe50 r golden_settings_gc_9_1_rv2 +ffffffff82bb0020 r golden_settings_gc_9_1_rv1 +ffffffff82bb00d0 r golden_settings_gc_9_1_rn +ffffffff82bb01f0 r golden_settings_gc_9_x_common +ffffffff82bb1000 R gfx_v9_4_ras_ops +ffffffff82bb1040 r gfx_v9_4_edc_counter_regs +ffffffff82bb1420 r gfx_v9_4_ras_fields +ffffffff82bb3000 R vgpr_init_regs_aldebaran +ffffffff82bb31b0 R sgpr112_init_regs_aldebaran +ffffffff82bb3360 R sgpr96_init_regs_aldebaran +ffffffff82bb3510 R sgpr64_init_regs_aldebaran +ffffffff82bb36c0 r golden_settings_gc_9_4_2_alde +ffffffff82bb3720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82bb37b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82bb3840 r sgpr112_init_compute_shader_aldebaran +ffffffff82bb3a60 r sgpr96_init_compute_shader_aldebaran +ffffffff82bb3c50 r sgpr64_init_compute_shader_aldebaran +ffffffff82bb3dc0 r vgpr_init_compute_shader_aldebaran +ffffffff82bb46a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82bb4a20 r gfx_v9_4_2_ras_fields +ffffffff82bb63c0 r gfx_v9_4_2_utc_blocks +ffffffff82bb7000 r gfx_v9_4_3_ip_funcs +ffffffff82bb70a8 R gfx_v9_4_3_ip_block +ffffffff82bb70c0 r gfx_v9_4_3_kiq_pm4_funcs +ffffffff82bb7100 r gfx_v9_4_3_ring_funcs_kiq +ffffffff82bb7240 r gfx_v9_4_3_ring_funcs_compute +ffffffff82bb7380 r gfx_v9_4_3_eop_irq_funcs +ffffffff82bb7390 r gfx_v9_4_3_priv_reg_irq_funcs +ffffffff82bb73a0 r gfx_v9_4_3_priv_inst_irq_funcs +ffffffff82bb73b0 r gfx_v9_4_3_rlc_funcs +ffffffff82bb7418 r gfx_v9_4_3_gfx_funcs +ffffffff82bb7480 r gfx_v9_4_3_ce_reg_list +ffffffff82bb7810 r gfx_v9_4_3_ras_mem_list_array +ffffffff82bb7970 r gfx_v9_4_3_ue_reg_list +ffffffff82bb7d30 r gfx_v9_4_3_ras_cp_mem_list +ffffffff82bb7d80 r gfx_v9_4_3_ras_gcea_mem_list +ffffffff82bb7ec0 r gfx_v9_4_3_ras_gc_cane_mem_list +ffffffff82bb7ed0 r gfx_v9_4_3_ras_gcutcl2_mem_list +ffffffff82bb7ee0 r gfx_v9_4_3_ras_gds_mem_list +ffffffff82bb7ef0 r gfx_v9_4_3_ras_lds_mem_list +ffffffff82bb8110 r gfx_v9_4_3_ras_rlc_mem_list +ffffffff82bb8190 r gfx_v9_4_3_ras_sp_mem_list +ffffffff82bb81a0 r gfx_v9_4_3_ras_spi_mem_list +ffffffff82bb81e0 r gfx_v9_4_3_ras_sqc_mem_list +ffffffff82bb8350 r gfx_v9_4_3_ras_sq_mem_list +ffffffff82bb8390 r gfx_v9_4_3_ras_ta_mem_list +ffffffff82bb83e0 r gfx_v9_4_3_ras_tcc_mem_list +ffffffff82bb83f0 r gfx_v9_4_3_ras_tca_mem_list +ffffffff82bb8400 r gfx_v9_4_3_ras_tci_mem_list +ffffffff82bb8410 r gfx_v9_4_3_ras_tcp_mem_list +ffffffff82bb85a0 r gfx_v9_4_3_ras_td_mem_list +ffffffff82bb85d0 r gfx_v9_4_3_ras_tcx_mem_list +ffffffff82bb8b50 r gfx_v9_4_3_ras_atc_l2_mem_list +ffffffff82bb8b60 r gfx_v9_4_3_ras_utcl2_mem_list +ffffffff82bb8b70 r gfx_v9_4_3_ras_vml2_mem_list +ffffffff82bb8b80 r gfx_v9_4_3_ras_vml2_walker_mem_list +ffffffff82bb9000 R gfxhub_v1_0_funcs +ffffffff82bba000 R gfxhub_v1_2_funcs +ffffffff82bbb000 R gfxhub_v2_0_funcs +ffffffff82bbb060 r gfxhub_v2_0_vmhub_funcs +ffffffff82bbb070 r gfxhub_client_ids +ffffffff82bbc000 R gfxhub_v2_1_funcs +ffffffff82bbc060 r gfxhub_v2_1_vmhub_funcs +ffffffff82bbc070 r gfxhub_client_ids +ffffffff82bbd000 R gfxhub_v3_0_funcs +ffffffff82bbd060 r gfxhub_v3_0_vmhub_funcs +ffffffff82bbd070 r gfxhub_client_ids +ffffffff82bbe000 R gfxhub_v3_0_3_funcs +ffffffff82bbe060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82bbe070 r gfxhub_client_ids +ffffffff82bbf000 R gmc_v10_0_ip_funcs +ffffffff82bbf0a8 R gmc_v10_0_ip_block +ffffffff82bbf0c0 r gmc_v10_0_gmc_funcs +ffffffff82bbf118 r gmc_v10_0_irq_funcs +ffffffff82bbf128 r gmc_v10_0_ecc_funcs +ffffffff82bc0000 R gmc_v11_0_ip_funcs +ffffffff82bc00a8 R gmc_v11_0_ip_block +ffffffff82bc00c0 r gmc_v11_0_gmc_funcs +ffffffff82bc0118 r gmc_v11_0_irq_funcs +ffffffff82bc0128 r gmc_v11_0_ecc_funcs +ffffffff82bc1000 r gmc_v7_0_ip_funcs +ffffffff82bc10a8 R gmc_v7_0_ip_block +ffffffff82bc10c0 R gmc_v7_4_ip_block +ffffffff82bc10d8 r gmc_v7_0_gmc_funcs +ffffffff82bc1130 r gmc_v7_0_irq_funcs +ffffffff82bc1140 r iceland_mgcg_cgcg_init +ffffffff82bc1150 r golden_settings_iceland_a11 +ffffffff82bc1180 r mc_cg_registers +ffffffff82bc11b0 r mc_cg_en +ffffffff82bc11e0 r mc_cg_ls_en +ffffffff82bc2000 r gmc_v8_0_ip_funcs +ffffffff82bc20a8 R gmc_v8_0_ip_block +ffffffff82bc20c0 R gmc_v8_1_ip_block +ffffffff82bc20d8 R gmc_v8_5_ip_block +ffffffff82bc20f0 r gmc_v8_0_gmc_funcs +ffffffff82bc2148 r gmc_v8_0_irq_funcs +ffffffff82bc2158 r fiji_mgcg_cgcg_init +ffffffff82bc2170 r golden_settings_fiji_a10 +ffffffff82bc21a0 r tonga_mgcg_cgcg_init +ffffffff82bc21b0 r golden_settings_tonga_a11 +ffffffff82bc2210 r golden_settings_polaris11_a11 +ffffffff82bc2240 r golden_settings_polaris10_a11 +ffffffff82bc227c r cz_mgcg_cgcg_init +ffffffff82bc2290 r stoney_mgcg_cgcg_init +ffffffff82bc22b0 r golden_settings_stoney_common +ffffffff82bc3000 R gmc_v9_0_ip_funcs +ffffffff82bc30a8 R gmc_v9_0_ip_block +ffffffff82bc30c0 r gmc_v9_0_gmc_funcs +ffffffff82bc3118 r gmc_v9_0_irq_funcs +ffffffff82bc3128 r gmc_v9_0_ecc_funcs +ffffffff82bc3140 r gfxhub_client_ids +ffffffff82bc31b0 r mmhub_client_ids_vega10 +ffffffff82bc34a0 r mmhub_client_ids_vega12 +ffffffff82bc37a0 r mmhub_client_ids_vega20 +ffffffff82bc3a90 r mmhub_client_ids_arcturus +ffffffff82bc52a0 r mmhub_client_ids_raven +ffffffff82bc5460 r mmhub_client_ids_renoir +ffffffff82bc5650 r mmhub_client_ids_aldebaran +ffffffff82bc6e60 r ecc_umc_mcumc_ctrl_addrs +ffffffff82bc6ee0 r ecc_umc_mcumc_ctrl_mask_addrs +ffffffff82bc6f60 r golden_settings_mmhub_1_0_0 +ffffffff82bc6f90 r golden_settings_athub_1_0_0 +ffffffff82bc7000 R hdp_v4_0_funcs +ffffffff82bc8000 R hdp_v5_0_funcs +ffffffff82bc9000 R hdp_v5_2_funcs +ffffffff82bca000 R hdp_v6_0_funcs +ffffffff82bcb000 r iceland_ih_ip_funcs +ffffffff82bcb0a8 R iceland_ih_ip_block +ffffffff82bcb0c0 r iceland_ih_funcs +ffffffff82bcc000 r ih_v6_0_ip_funcs +ffffffff82bcc0a8 R ih_v6_0_ip_block +ffffffff82bcc0c0 r ih_v6_0_funcs +ffffffff82bcc0e0 r ih_v6_0_self_irq_funcs +ffffffff82bcd000 r ih_v6_1_ip_funcs +ffffffff82bcd0a8 R ih_v6_1_ip_block +ffffffff82bcd0c0 r ih_v6_1_funcs +ffffffff82bcd0e0 r ih_v6_1_self_irq_funcs +ffffffff82bce000 R gfx_v11_0_imu_funcs +ffffffff82bce030 r imu_rlc_ram_golden_11 +ffffffff82bce680 r imu_rlc_ram_golden_11_0_2 +ffffffff82bcf000 r imu_rlc_ram_golden_11_0_3 +ffffffff82bd0000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82bd0140 r jpeg_v1_0_irq_funcs +ffffffff82bd1000 r jpeg_v2_0_ip_funcs +ffffffff82bd10a8 R jpeg_v2_0_ip_block +ffffffff82bd10c0 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82bd1200 r jpeg_v2_0_irq_funcs +ffffffff82bd2000 r jpeg_v2_5_ip_funcs +ffffffff82bd20a8 R jpeg_v2_5_ip_block +ffffffff82bd20c0 r jpeg_v2_6_ip_funcs +ffffffff82bd2168 R jpeg_v2_6_ip_block +ffffffff82bd2180 R jpeg_v2_6_ras_hw_ops +ffffffff82bd21c0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82bd2300 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82bd2440 r jpeg_v2_5_irq_funcs +ffffffff82bd2450 r jpeg_v2_6_ras_irq_funcs +ffffffff82bd3000 r jpeg_v3_0_ip_funcs +ffffffff82bd30a8 R jpeg_v3_0_ip_block +ffffffff82bd30c0 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82bd3200 r jpeg_v3_0_irq_funcs +ffffffff82bd4000 r jpeg_v4_0_ip_funcs +ffffffff82bd40a8 R jpeg_v4_0_ip_block +ffffffff82bd40c0 R jpeg_v4_0_ras_hw_ops +ffffffff82bd4100 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82bd4240 r jpeg_v4_0_irq_funcs +ffffffff82bd4250 r jpeg_v4_0_ras_irq_funcs +ffffffff82bd5000 r jpeg_v4_0_3_ip_funcs +ffffffff82bd50a8 R jpeg_v4_0_3_ip_block +ffffffff82bd50c0 r jpeg_v4_0_3_dec_ring_vm_funcs +ffffffff82bd5200 r jpeg_v4_0_3_irq_funcs +ffffffff82bd5210 r jpeg_v4_0_3_ras_hw_ops +ffffffff82bd5250 r jpeg_v4_0_3_ue_reg_list +ffffffff82bd6000 R lsdma_v6_0_funcs +ffffffff82bd7000 r mca_v3_0_mp0_hw_ops +ffffffff82bd7040 r mca_v3_0_mp1_hw_ops +ffffffff82bd7080 r mca_v3_0_mpio_hw_ops +ffffffff82bd8000 r mes_v10_1_ip_funcs +ffffffff82bd80a8 R mes_v10_1_ip_block +ffffffff82bd80c0 r mes_v10_1_funcs +ffffffff82bd80f0 r mes_v10_1_ring_funcs +ffffffff82bd9000 r mes_v11_0_ip_funcs +ffffffff82bd90a8 R mes_v11_0_ip_block +ffffffff82bd90c0 r mes_v11_0_funcs +ffffffff82bd90f0 r mes_v11_0_ring_funcs +ffffffff82bda000 R mmhub_v1_0_funcs +ffffffff82bda050 r mmhub_v1_0_edc_cnt_regs +ffffffff82bda0c0 r mmhub_v1_0_ras_fields +ffffffff82bdb000 R mmhub_v1_7_funcs +ffffffff82bdb050 r mmhub_v1_7_edc_cnt_regs +ffffffff82bdb250 r mmhub_v1_7_ras_fields +ffffffff82bdc9c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82bdd000 R mmhub_v1_8_funcs +ffffffff82bdd050 r mmhub_v1_8_ras_hw_ops +ffffffff82bdd090 r mmhub_v1_8_ce_reg_list +ffffffff82bdd180 r mmhub_v1_8_ras_memory_list +ffffffff82bdd2b0 r mmhub_v1_8_ue_reg_list +ffffffff82bde000 R mmhub_v2_0_funcs +ffffffff82bde050 r mmhub_v2_0_vmhub_funcs +ffffffff82bde060 r mmhub_client_ids_navi1x +ffffffff82bde190 r mmhub_client_ids_sienna_cichlid +ffffffff82bde450 r mmhub_client_ids_beige_goby +ffffffff82bdf000 R mmhub_v2_3_funcs +ffffffff82bdf050 r mmhub_v2_3_vmhub_funcs +ffffffff82bdf060 r mmhub_client_ids_vangogh +ffffffff82be0000 R mmhub_v3_0_funcs +ffffffff82be0050 r mmhub_v3_0_vmhub_funcs +ffffffff82be0060 r mmhub_client_ids_v3_0_0 +ffffffff82be1000 R mmhub_v3_0_1_funcs +ffffffff82be1050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82be1060 r mmhub_client_ids_v3_0_1 +ffffffff82be2000 R mmhub_v3_0_2_funcs +ffffffff82be2050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82be2060 r mmhub_client_ids_v3_0_2 +ffffffff82be3000 R mmhub_v9_4_ras_hw_ops +ffffffff82be3040 R mmhub_v9_4_funcs +ffffffff82be3090 r mmhub_v9_4_edc_cnt_regs +ffffffff82be3330 r mmhub_v9_4_ras_fields +ffffffff82be53b0 r mmhub_v9_4_err_status_regs +ffffffff82be6000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82be6010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82be6020 R xgpu_ai_virt_ops +ffffffff82be7000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82be7010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82be7020 R xgpu_nv_virt_ops +ffffffff82be8000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82be8240 r xgpu_fiji_golden_settings_a10 +ffffffff82be8370 r xgpu_fiji_golden_common_all +ffffffff82be83f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82be8810 r xgpu_tonga_golden_settings_a11 +ffffffff82be89d0 r xgpu_tonga_golden_common_all +ffffffff82be8a28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82be8a38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82be8a48 R xgpu_vi_virt_ops +ffffffff82be9000 r navi10_ih_ip_funcs +ffffffff82be90a8 R navi10_ih_ip_block +ffffffff82be90c0 r navi10_ih_funcs +ffffffff82be90e0 r navi10_ih_self_irq_funcs +ffffffff82bea000 R nbio_v2_3_hdp_flush_reg +ffffffff82bea048 R nbio_v2_3_funcs +ffffffff82beb000 R nbio_v4_3_hdp_flush_reg +ffffffff82beb048 R nbio_v4_3_funcs +ffffffff82beb158 R nbio_v4_3_sriov_funcs +ffffffff82beb268 r nbio_v4_3_ras_err_event_athub_irq_funcs +ffffffff82bec000 R nbio_v6_1_hdp_flush_reg +ffffffff82bec048 R nbio_v6_1_funcs +ffffffff82bed000 R nbio_v7_0_hdp_flush_reg +ffffffff82bed048 R nbio_v7_0_funcs +ffffffff82bee000 R nbio_v7_2_hdp_flush_reg +ffffffff82bee048 R nbio_v7_2_funcs +ffffffff82bef000 R nbio_v7_4_hdp_flush_reg +ffffffff82bef048 R nbio_v7_4_ras_hw_ops +ffffffff82bef088 R nbio_v7_4_funcs +ffffffff82bef198 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82bef1a8 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82bf0000 R nbio_v7_7_hdp_flush_reg +ffffffff82bf0048 R nbio_v7_7_funcs +ffffffff82bf1000 R nbio_v7_9_hdp_flush_reg +ffffffff82bf1048 R nbio_v7_9_funcs +ffffffff82bf1158 R nbio_v7_9_ras_hw_ops +ffffffff82bf1198 r nbio_v7_9_ras_controller_irq_funcs +ffffffff82bf11a8 r nbio_v7_9_ras_err_event_athub_irq_funcs +ffffffff82bf2000 r nv_common_ip_funcs +ffffffff82bf20a8 R nv_common_ip_block +ffffffff82bf20c0 r nv_asic_funcs +ffffffff82bf2180 r nv_allowed_read_registers +ffffffff82bf2300 r sc_video_codecs_encode +ffffffff82bf2310 r sc_video_codecs_decode_vcn1 +ffffffff82bf2320 r sc_video_codecs_decode_vcn0 +ffffffff82bf2330 r yc_video_codecs_decode +ffffffff82bf2340 r bg_video_codecs_encode +ffffffff82bf2350 r bg_video_codecs_decode +ffffffff82bf2360 r nv_video_codecs_encode +ffffffff82bf2370 r nv_video_codecs_decode +ffffffff82bf2380 r sc_video_codecs_encode_array +ffffffff82bf23b0 r sc_video_codecs_decode_array_vcn1 +ffffffff82bf2440 r sc_video_codecs_decode_array_vcn0 +ffffffff82bf24e0 r yc_video_codecs_decode_array +ffffffff82bf2550 r bg_video_codecs_decode_array +ffffffff82bf2590 r nv_video_codecs_encode_array +ffffffff82bf25c0 r nv_video_codecs_decode_array +ffffffff82bf3000 r psp_v10_0_funcs +ffffffff82bf4000 r psp_v11_0_funcs +ffffffff82bf5000 r psp_v11_0_8_funcs +ffffffff82bf6000 r psp_v12_0_funcs +ffffffff82bf7000 r psp_v13_0_funcs +ffffffff82bf8000 r psp_v13_0_4_funcs +ffffffff82bf9000 r psp_v3_1_funcs +ffffffff82bfa000 r sdma_v2_4_ip_funcs +ffffffff82bfa0a8 R sdma_v2_4_ip_block +ffffffff82bfa0c0 r sdma_v2_4_ring_funcs +ffffffff82bfa200 r sdma_v2_4_buffer_funcs +ffffffff82bfa220 r sdma_v2_4_vm_pte_funcs +ffffffff82bfa240 r sdma_v2_4_trap_irq_funcs +ffffffff82bfa250 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82bfa260 r iceland_mgcg_cgcg_init +ffffffff82bfa280 r golden_settings_iceland_a11 +ffffffff82bfb000 r sdma_v3_0_ip_funcs +ffffffff82bfb0a8 R sdma_v3_0_ip_block +ffffffff82bfb0c0 R sdma_v3_1_ip_block +ffffffff82bfb0d8 r sdma_v3_0_ring_funcs +ffffffff82bfb218 r sdma_v3_0_buffer_funcs +ffffffff82bfb238 r sdma_v3_0_vm_pte_funcs +ffffffff82bfb258 r sdma_v3_0_trap_irq_funcs +ffffffff82bfb268 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82bfb280 r fiji_mgcg_cgcg_init +ffffffff82bfb2a0 r golden_settings_fiji_a10 +ffffffff82bfb300 r tonga_mgcg_cgcg_init +ffffffff82bfb320 r golden_settings_tonga_a11 +ffffffff82bfb3a0 r golden_settings_polaris11_a11 +ffffffff82bfb420 r golden_settings_polaris10_a11 +ffffffff82bfb4a0 r cz_mgcg_cgcg_init +ffffffff82bfb4c0 r cz_golden_settings_a11 +ffffffff82bfb550 r stoney_mgcg_cgcg_init +ffffffff82bfb560 r stoney_golden_settings_a11 +ffffffff82bfc000 R sdma_v4_0_ip_funcs +ffffffff82bfc0a8 R sdma_v4_0_ras_hw_ops +ffffffff82bfc0e8 R sdma_v4_0_ip_block +ffffffff82bfc100 r sdma_v4_0_ring_funcs +ffffffff82bfc240 r sdma_v4_0_page_ring_funcs +ffffffff82bfc380 r sdma_v4_0_buffer_funcs +ffffffff82bfc3a0 r sdma_v4_0_vm_pte_funcs +ffffffff82bfc3c0 r sdma_v4_0_trap_irq_funcs +ffffffff82bfc3d0 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82bfc3e0 r sdma_v4_0_ecc_irq_funcs +ffffffff82bfc3f0 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82bfc400 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82bfc410 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82bfc420 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82bfc430 r golden_settings_sdma_4 +ffffffff82bfc690 r golden_settings_sdma_vg10 +ffffffff82bfc740 r golden_settings_sdma_vg12 +ffffffff82bfc7f0 r golden_settings_sdma0_4_2_init +ffffffff82bfc810 r golden_settings_sdma0_4_2 +ffffffff82bfcaa0 r golden_settings_sdma1_4_2 +ffffffff82bfcd30 r golden_settings_sdma_arct +ffffffff82bfd030 r golden_settings_sdma_aldebaran +ffffffff82bfd1a0 r golden_settings_sdma_4_1 +ffffffff82bfd2b0 r golden_settings_sdma_rv2 +ffffffff82bfd2e0 r golden_settings_sdma_rv1 +ffffffff82bfd310 r golden_settings_sdma_4_3 +ffffffff82bfd400 r sdma_v4_0_ras_fields +ffffffff82bfe000 R sdma_v4_4_ras_hw_ops +ffffffff82bfe040 r sdma_v4_4_ras_fields +ffffffff82bff000 R sdma_v4_4_2_ip_funcs +ffffffff82bff0a8 R sdma_v4_4_2_ip_block +ffffffff82bff0c0 r sdma_v4_4_2_ring_funcs +ffffffff82bff200 r sdma_v4_4_2_page_ring_funcs +ffffffff82bff340 r sdma_v4_4_2_buffer_funcs +ffffffff82bff360 r sdma_v4_4_2_vm_pte_funcs +ffffffff82bff380 r sdma_v4_4_2_trap_irq_funcs +ffffffff82bff390 r sdma_v4_4_2_illegal_inst_irq_funcs +ffffffff82bff3a0 r sdma_v4_4_2_ecc_irq_funcs +ffffffff82bff3b0 r sdma_v4_4_2_vm_hole_irq_funcs +ffffffff82bff3c0 r sdma_v4_4_2_doorbell_invalid_irq_funcs +ffffffff82bff3d0 r sdma_v4_4_2_pool_timeout_irq_funcs +ffffffff82bff3e0 r sdma_v4_4_2_srbm_write_irq_funcs +ffffffff82bff3f0 r sdma_v4_4_2_ras_hw_ops +ffffffff82bff430 r sdma_v4_2_2_ue_reg_list +ffffffff82bff460 r sdma_v4_4_2_ras_memory_list +ffffffff82c00000 R sdma_v5_0_ip_funcs +ffffffff82c000a8 R sdma_v5_0_ip_block +ffffffff82c000c0 r sdma_v5_0_ring_funcs +ffffffff82c00200 r sdma_v5_0_buffer_funcs +ffffffff82c00220 r sdma_v5_0_vm_pte_funcs +ffffffff82c00240 r sdma_v5_0_trap_irq_funcs +ffffffff82c00250 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82c00260 r golden_settings_sdma_5 +ffffffff82c004a0 r golden_settings_sdma_nv10 +ffffffff82c004d0 r golden_settings_sdma_nv14 +ffffffff82c00500 r golden_settings_sdma_5_sriov +ffffffff82c006e0 r golden_settings_sdma_nv12 +ffffffff82c00770 r golden_settings_sdma_cyan_skillfish +ffffffff82c01000 R sdma_v5_2_ip_funcs +ffffffff82c010a8 R sdma_v5_2_ip_block +ffffffff82c010c0 r sdma_v5_2_ring_funcs +ffffffff82c01200 r sdma_v5_2_buffer_funcs +ffffffff82c01220 r sdma_v5_2_vm_pte_funcs +ffffffff82c01240 r sdma_v5_2_trap_irq_funcs +ffffffff82c01250 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82c02000 R sdma_v6_0_ip_funcs +ffffffff82c020a8 R sdma_v6_0_ip_block +ffffffff82c020c0 r sdma_v6_0_ring_funcs +ffffffff82c02200 r sdma_v6_0_buffer_funcs +ffffffff82c02220 r sdma_v6_0_vm_pte_funcs +ffffffff82c02240 r sdma_v6_0_trap_irq_funcs +ffffffff82c02250 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82c03000 r smu_v11_0_i2c_algo +ffffffff82c03010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82c03028 r smu_v11_0_i2c_control_quirks +ffffffff82c04000 R smuio_v11_0_funcs +ffffffff82c05000 R smuio_v11_0_6_funcs +ffffffff82c06000 R smuio_v13_0_funcs +ffffffff82c07000 R smuio_v13_0_3_funcs +ffffffff82c08000 R smuio_v13_0_6_funcs +ffffffff82c09000 R smuio_v9_0_funcs +ffffffff82c0a000 r soc15_common_ip_funcs +ffffffff82c0a0a8 R vega10_common_ip_block +ffffffff82c0a0c0 r soc15_asic_funcs +ffffffff82c0a180 r vega20_asic_funcs +ffffffff82c0a240 r aqua_vanjaram_asic_funcs +ffffffff82c0a300 r soc15_allowed_read_registers +ffffffff82c0a490 r vega_video_codecs_encode +ffffffff82c0a4a0 r vega_video_codecs_decode +ffffffff82c0a4b0 r rv_video_codecs_decode +ffffffff82c0a4c0 r rn_video_codecs_decode +ffffffff82c0a4d0 r vcn_4_0_3_video_codecs_encode +ffffffff82c0a4e0 r vcn_4_0_3_video_codecs_decode +ffffffff82c0a4f0 r vega_video_codecs_encode_array +ffffffff82c0a520 r vega_video_codecs_decode_array +ffffffff82c0a5a0 r rv_video_codecs_decode_array +ffffffff82c0a630 r rn_video_codecs_decode_array +ffffffff82c0a6c0 r vcn_4_0_3_video_codecs_decode_array +ffffffff82c0b000 r soc21_common_ip_funcs +ffffffff82c0b0a8 R soc21_common_ip_block +ffffffff82c0b0c0 r soc21_asic_funcs +ffffffff82c0b180 r soc21_allowed_read_registers +ffffffff82c0b300 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82c0b310 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82c0b320 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82c0b330 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82c0b340 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82c0b370 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82c0b3c0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82c0b400 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82c0c000 r tonga_ih_ip_funcs +ffffffff82c0c0a8 R tonga_ih_ip_block +ffffffff82c0c0c0 r tonga_ih_funcs +ffffffff82c0d000 R umc_v6_0_funcs +ffffffff82c0e000 R umc_v6_1_channel_idx_tbl +ffffffff82c0e080 R umc_v6_1_ras_hw_ops +ffffffff82c0f000 R umc_v6_7_channel_idx_tbl_second +ffffffff82c0f080 R umc_v6_7_channel_idx_tbl_first +ffffffff82c0f100 R umc_v6_7_ras_hw_ops +ffffffff82c10000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82c10040 R umc_v8_10_channel_idx_tbl_ext0 +ffffffff82c10080 R umc_v8_10_channel_idx_tbl +ffffffff82c100e0 R umc_v8_10_ras_hw_ops +ffffffff82c11000 R umc_v8_7_channel_idx_tbl +ffffffff82c11040 R umc_v8_7_ras_hw_ops +ffffffff82c12000 r uvd_v5_0_ip_funcs +ffffffff82c120a8 R uvd_v5_0_ip_block +ffffffff82c120c0 r uvd_v5_0_ring_funcs +ffffffff82c12200 r uvd_v5_0_irq_funcs +ffffffff82c13000 r uvd_v6_0_ip_funcs +ffffffff82c130a8 R uvd_v6_0_ip_block +ffffffff82c130c0 R uvd_v6_2_ip_block +ffffffff82c130d8 R uvd_v6_3_ip_block +ffffffff82c130f0 r uvd_v6_0_ring_vm_funcs +ffffffff82c13230 r uvd_v6_0_ring_phys_funcs +ffffffff82c13370 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82c134b0 r uvd_v6_0_irq_funcs +ffffffff82c14000 R uvd_v7_0_ip_funcs +ffffffff82c140a8 R uvd_v7_0_ip_block +ffffffff82c140c0 r uvd_v7_0_ring_vm_funcs +ffffffff82c14200 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82c14340 r uvd_v7_0_irq_funcs +ffffffff82c15000 r vce_v3_0_ip_funcs +ffffffff82c150a8 R vce_v3_0_ip_block +ffffffff82c150c0 R vce_v3_1_ip_block +ffffffff82c150d8 R vce_v3_4_ip_block +ffffffff82c150f0 r vce_v3_0_ring_vm_funcs +ffffffff82c15230 r vce_v3_0_ring_phys_funcs +ffffffff82c15370 r vce_v3_0_irq_funcs +ffffffff82c16000 R vce_v4_0_ip_funcs +ffffffff82c160a8 R vce_v4_0_ip_block +ffffffff82c160c0 r vce_v4_0_ring_vm_funcs +ffffffff82c16200 r vce_v4_0_irq_funcs +ffffffff82c17000 r vcn_v1_0_ip_funcs +ffffffff82c170a8 R vcn_v1_0_ip_block +ffffffff82c170c0 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82c17200 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82c17340 r vcn_v1_0_irq_funcs +ffffffff82c18000 r vcn_v2_0_ip_funcs +ffffffff82c180a8 R vcn_v2_0_ip_block +ffffffff82c180c0 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82c18200 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82c18340 r vcn_v2_0_irq_funcs +ffffffff82c19000 r vcn_v2_5_ip_funcs +ffffffff82c190a8 R vcn_v2_5_ip_block +ffffffff82c190c0 r vcn_v2_6_ip_funcs +ffffffff82c19168 R vcn_v2_6_ip_block +ffffffff82c19180 R vcn_v2_6_ras_hw_ops +ffffffff82c191c0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82c19300 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82c19440 r vcn_v2_5_irq_funcs +ffffffff82c19450 r vcn_v2_6_ras_irq_funcs +ffffffff82c1a000 r vcn_v3_0_ip_funcs +ffffffff82c1a0a8 R vcn_v3_0_ip_block +ffffffff82c1a0c0 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82c1a200 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82c1a340 r vcn_v3_0_irq_funcs +ffffffff82c1b000 r vcn_v4_0_ip_funcs +ffffffff82c1b0a8 R vcn_v4_0_ip_block +ffffffff82c1b0c0 R vcn_v4_0_ras_hw_ops +ffffffff82c1b100 r vcn_v4_0_irq_funcs +ffffffff82c1b110 r vcn_v4_0_ras_irq_funcs +ffffffff82c1c000 r vcn_v4_0_3_ip_funcs +ffffffff82c1c0a8 R vcn_v4_0_3_ip_block +ffffffff82c1c0c0 r vcn_v4_0_3_unified_ring_vm_funcs +ffffffff82c1c200 r vcn_v4_0_3_irq_funcs +ffffffff82c1c210 r vcn_v4_0_3_ras_hw_ops +ffffffff82c1c250 r vcn_v4_0_3_ue_reg_list +ffffffff82c1d000 R vega10_ih_ip_funcs +ffffffff82c1d0a8 R vega10_ih_ip_block +ffffffff82c1d0c0 r vega10_ih_funcs +ffffffff82c1d0e0 r vega10_ih_self_irq_funcs +ffffffff82c1e000 r GC_BASE +ffffffff82c1e064 r HDP_BASE +ffffffff82c1e0c8 r MMHUB_BASE +ffffffff82c1e12c r ATHUB_BASE +ffffffff82c1e190 r NBIO_BASE +ffffffff82c1e1f4 r MP0_BASE +ffffffff82c1e258 r MP1_BASE +ffffffff82c1e2bc r VCE_BASE +ffffffff82c1e320 r VCN_BASE +ffffffff82c1e384 r DF_BASE +ffffffff82c1e3e8 r DCE_BASE +ffffffff82c1e44c r OSSSYS_BASE +ffffffff82c1e4b0 r SDMA0_BASE +ffffffff82c1e514 r SDMA1_BASE +ffffffff82c1e578 r SMUIO_BASE +ffffffff82c1e5dc r PWR_BASE +ffffffff82c1e640 r NBIF_BASE +ffffffff82c1e6a4 r THM_BASE +ffffffff82c1e708 r CLK_BASE +ffffffff82c1f000 R vega20_ih_ip_funcs +ffffffff82c1f0a8 R vega20_ih_ip_block +ffffffff82c1f0c0 r vega20_ih_funcs +ffffffff82c1f0e0 r vega20_ih_self_irq_funcs +ffffffff82c20000 r GC_BASE +ffffffff82c20090 r HDP_BASE +ffffffff82c20120 r MMHUB_BASE +ffffffff82c201b0 r ATHUB_BASE +ffffffff82c20240 r NBIO_BASE +ffffffff82c202d0 r MP0_BASE +ffffffff82c20360 r MP1_BASE +ffffffff82c203f0 r UVD_BASE +ffffffff82c20480 r VCE_BASE +ffffffff82c20510 r DF_BASE +ffffffff82c205a0 r DCE_BASE +ffffffff82c20630 r OSSSYS_BASE +ffffffff82c206c0 r SDMA0_BASE +ffffffff82c20750 r SDMA1_BASE +ffffffff82c207e0 r SMUIO_BASE +ffffffff82c20870 r THM_BASE +ffffffff82c20900 r CLK_BASE +ffffffff82c20990 r UMC_BASE +ffffffff82c20a20 r RSMU_BASE +ffffffff82c21000 r vi_common_ip_block +ffffffff82c21018 r vi_common_ip_funcs +ffffffff82c210c0 r vi_asic_funcs +ffffffff82c21180 r vi_allowed_read_registers +ffffffff82c213e0 r topaz_video_codecs_encode +ffffffff82c213f0 r topaz_video_codecs_decode +ffffffff82c21400 r tonga_video_codecs_encode +ffffffff82c21410 r tonga_video_codecs_decode +ffffffff82c21420 r polaris_video_codecs_encode +ffffffff82c21430 r cz_video_codecs_decode +ffffffff82c21440 r tonga_video_codecs_encode_array +ffffffff82c21460 r tonga_video_codecs_decode_array +ffffffff82c214b0 r polaris_video_codecs_encode_array +ffffffff82c214e0 r cz_video_codecs_decode_array +ffffffff82c21560 r iceland_mgcg_cgcg_init +ffffffff82c215a0 r fiji_mgcg_cgcg_init +ffffffff82c21600 r tonga_mgcg_cgcg_init +ffffffff82c21660 r cz_mgcg_cgcg_init +ffffffff82c216a0 r stoney_mgcg_cgcg_init +ffffffff82c22000 r amdgpu_dm_funcs +ffffffff82c220a8 R dm_ip_block +ffffffff82c220c0 R amdgpu_dm_encoder_helper_funcs +ffffffff82c22128 r dm_display_funcs +ffffffff82c22180 r hpd_disconnect_quirk_table +ffffffff82c22ef0 r amdgpu_dm_mode_funcs +ffffffff82c22f38 r amdgpu_dm_audio_component_bind_ops +ffffffff82c22f48 r amdgpu_dm_audio_component_ops +ffffffff82c22f80 r amdgpu_dm_encoder_funcs +ffffffff82c22fa0 r amdgpu_dm_connector_funcs +ffffffff82c23018 r amdgpu_dm_connector_helper_funcs +ffffffff82c23078 r amdgpu_dm_i2c_algo +ffffffff82c23088 r amdgpu_dm_backlight_ops +ffffffff82c23260 r add_fs_modes.common_rates +ffffffff82c24000 r amdgpu_dm_crtc_funcs +ffffffff82c240c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82c25000 r dm_dtn_log_begin.msg +ffffffff82c2500d r dm_dtn_log_end.msg +ffffffff82c25018 r SYNAPTICS_DEVICE_ID +ffffffff82c26000 r dm_crtc_irq_funcs +ffffffff82c26010 r dm_vline0_irq_funcs +ffffffff82c26020 r dm_dmub_outbox_irq_funcs +ffffffff82c26030 r dm_vupdate_irq_funcs +ffffffff82c26040 r dm_dmub_trace_irq_funcs +ffffffff82c26050 r dm_pageflip_irq_funcs +ffffffff82c26060 r dm_hpd_irq_funcs +ffffffff82c27000 r amdgpu_dm_encoder_funcs +ffffffff82c27020 r dm_mst_cbs +ffffffff82c27030 r dm_dp_mst_connector_funcs +ffffffff82c270a8 r dm_dp_mst_connector_helper_funcs +ffffffff82c28000 r dm_plane_funcs +ffffffff82c28068 r dm_plane_helper_funcs +ffffffff82c2a000 r vbios_funcs +ffffffff82c2b000 r vbios_funcs +ffffffff82c30000 r command_table_helper_funcs +ffffffff82c31000 r command_table_helper_funcs +ffffffff82c32000 r command_table_helper_funcs +ffffffff82c33000 r command_table_helper_funcs +ffffffff82c34000 r dce80_max_clks_by_state +ffffffff82c34028 r disp_clk_regs +ffffffff82c3407c r disp_clk_shift +ffffffff82c34088 r disp_clk_mask +ffffffff82c35000 r dce110_max_clks_by_state +ffffffff82c35028 r disp_clk_regs +ffffffff82c3507c r disp_clk_shift +ffffffff82c35088 r disp_clk_mask +ffffffff82c36000 r dce112_max_clks_by_state +ffffffff82c36028 r disp_clk_regs +ffffffff82c3607c r disp_clk_shift +ffffffff82c36088 r disp_clk_mask +ffffffff82c37000 r dce120_max_clks_by_state +ffffffff82c38000 r clk_mgr_regs +ffffffff82c38054 r clk_mgr_shift +ffffffff82c38060 r clk_mgr_mask +ffffffff82c39000 r clk_mgr_regs +ffffffff82c39054 r clk_mgr_shift +ffffffff82c39060 r clk_mgr_mask +ffffffff82c3a000 r clk_mgr_regs +ffffffff82c3a054 r clk_mgr_shift +ffffffff82c3a060 r clk_mgr_mask +ffffffff82c3b000 r lpddr5_wm_table +ffffffff82c3b0c0 r ddr5_wm_table +ffffffff82c3c000 r lpddr5_wm_table +ffffffff82c3c0c0 r ddr5_wm_table +ffffffff82c3d000 r ddr5_wm_table +ffffffff82c3e000 r lpddr5_wm_table +ffffffff82c3e0c0 r ddr4_wm_table +ffffffff82c3f000 r clk_mgr_regs_dcn321 +ffffffff82c3f054 r clk_mgr_shift_dcn321 +ffffffff82c3f060 r clk_mgr_mask_dcn321 +ffffffff82c3f084 r clk_mgr_regs_dcn32 +ffffffff82c3f0d8 r clk_mgr_shift_dcn32 +ffffffff82c3f0e4 r clk_mgr_mask_dcn32 +ffffffff82c40000 r DC_BUILD_ID +ffffffff82c42000 r output_csc_matrix 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optc_shift -ffffffff82d175d4 r optc_mask -ffffffff82d1791c r mpc_regs -ffffffff82d19108 r mpc_shift -ffffffff82d191e4 r mpc_mask -ffffffff82d19550 r dsc_regs -ffffffff82d1979c r dsc_shift -ffffffff82d19854 r dsc_mask -ffffffff82d19b30 r dwbc30_regs -ffffffff82d19d0c r dwbc30_shift -ffffffff82d19e40 r dwbc30_mask -ffffffff82d1a310 r mcif_wb30_regs -ffffffff82d1a40c r mcif_wb30_shift -ffffffff82d1a4b8 r mcif_wb30_mask -ffffffff82d1a770 r aux_engine_regs -ffffffff82d1a838 r aux_mask -ffffffff82d1a898 r aux_shift -ffffffff82d1a8b0 r i2c_hw_regs -ffffffff82d1a9c8 r i2c_shifts -ffffffff82d1a9f4 r i2c_masks -ffffffff82d1aaa0 r audio_regs -ffffffff82d1abd4 r audio_shift -ffffffff82d1abec r audio_mask -ffffffff82d1ac30 r stream_enc_regs -ffffffff82d1b2d4 r se_shift -ffffffff82d1b3b0 r se_mask -ffffffff82d1b720 r vpg_regs -ffffffff82d1b810 r vpg_shift -ffffffff82d1b838 r vpg_mask -ffffffff82d1b8e0 r afmt_regs -ffffffff82d1b9b8 r afmt_shift -ffffffff82d1b9cc r afmt_mask -ffffffff82d1ba20 r hpo_dp_stream_enc_regs -ffffffff82d1bc50 r hpo_dp_se_shift -ffffffff82d1bc78 r hpo_dp_se_mask -ffffffff82d1bd20 r apg_regs -ffffffff82d1bd60 r apg_shift -ffffffff82d1bd68 r apg_mask -ffffffff82d1bd80 r hpo_dp_link_enc_regs -ffffffff82d1be90 r hpo_dp_le_shift -ffffffff82d1beac r hpo_dp_le_mask -ffffffff82d1bf10 r hwseq_reg -ffffffff82d1c12c r hwseq_shift -ffffffff82d1c1ac r hwseq_mask -ffffffff82d1d000 r dccg32_funcs -ffffffff82d1e000 r dcn32_link_enc_funcs -ffffffff82d1f000 r dcn32_str_enc_funcs -ffffffff82d20000 r hubbub32_funcs -ffffffff82d21000 r dcn32_funcs -ffffffff82d212e8 r dcn32_private_funcs -ffffffff82d22000 r dcn32_mmhubbub_funcs -ffffffff82d23000 r dcn32_mpc_funcs -ffffffff82d24000 r res_cap_dcn32 -ffffffff82d2403c r dccg_shift -ffffffff82d240dc r dccg_mask -ffffffff82d24350 r abm_shift -ffffffff82d24374 r abm_mask -ffffffff82d24400 r res_create_funcs -ffffffff82d24430 r plane_cap -ffffffff82d2445c r le_shift -ffffffff82d2454c r le_mask -ffffffff82d24904 r link_enc_feature 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+ffffffff82c4b1b0 r pte_settings +ffffffff82c4c000 r funcs +ffffffff82c4d000 r dce_link_panel_cntl_funcs +ffffffff82c4e000 r filter_3tap_16p_upscale +ffffffff82c4e040 r filter_3tap_16p_116 +ffffffff82c4e080 r filter_3tap_16p_149 +ffffffff82c4e0c0 r filter_3tap_16p_183 +ffffffff82c4e100 r filter_3tap_64p_upscale +ffffffff82c4e1d0 r filter_3tap_64p_116 +ffffffff82c4e2a0 r filter_3tap_64p_149 +ffffffff82c4e370 r filter_3tap_64p_183 +ffffffff82c4e440 r filter_4tap_16p_upscale +ffffffff82c4e490 r filter_4tap_16p_116 +ffffffff82c4e4e0 r filter_4tap_16p_149 +ffffffff82c4e530 r filter_4tap_16p_183 +ffffffff82c4e580 r filter_4tap_64p_upscale +ffffffff82c4e690 r filter_4tap_64p_116 +ffffffff82c4e7a0 r filter_4tap_64p_149 +ffffffff82c4e8b0 r filter_4tap_64p_183 +ffffffff82c4e9c0 r filter_5tap_64p_upscale +ffffffff82c4eb10 r filter_5tap_64p_116 +ffffffff82c4ec60 r filter_5tap_64p_149 +ffffffff82c4edb0 r filter_5tap_64p_183 +ffffffff82c4ef00 r filter_6tap_64p_upscale +ffffffff82c4f090 r filter_6tap_64p_116 +ffffffff82c4f220 r filter_6tap_64p_149 +ffffffff82c4f3b0 r filter_6tap_64p_183 +ffffffff82c4f540 r filter_7tap_64p_upscale +ffffffff82c4f710 r filter_7tap_64p_116 +ffffffff82c4f8e0 r filter_7tap_64p_149 +ffffffff82c4fab0 r filter_7tap_64p_183 +ffffffff82c4fc80 r filter_8tap_64p_upscale +ffffffff82c4fe90 r filter_8tap_64p_116 +ffffffff82c500a0 r filter_8tap_64p_149 +ffffffff82c502b0 r filter_8tap_64p_183 +ffffffff82c504c0 r filter_2tap_16p +ffffffff82c504f0 r filter_2tap_64p +ffffffff82c51000 r dce110_str_enc_funcs +ffffffff82c51120 r audio_clock_info_table_48bpc +ffffffff82c512b0 r audio_clock_info_table_36bpc +ffffffff82c51440 r audio_clock_info_table +ffffffff82c52000 r global_color_matrix +ffffffff82c520a8 r dce_transform_funcs +ffffffff82c53000 r abm_funcs +ffffffff82c54000 r psr_funcs +ffffffff82c54040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82c54045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82c55000 r replay_funcs +ffffffff82c56000 r reg_offsets +ffffffff82c57000 r bios_regs +ffffffff82c57008 r res_cap +ffffffff82c57048 r dce100_res_pool_funcs +ffffffff82c57140 r clk_src_regs +ffffffff82c5723c r dmcu_regs +ffffffff82c57298 r dmcu_shift +ffffffff82c572ac r dmcu_mask +ffffffff82c572f8 r abm_regs +ffffffff82c57360 r abm_shift +ffffffff82c57384 r abm_mask +ffffffff82c57410 r debug_defaults +ffffffff82c575c0 r dce100_tg_offsets +ffffffff82c57608 r plane_cap +ffffffff82c57638 r res_create_funcs +ffffffff82c57670 r panel_cntl_regs +ffffffff82c57690 r panel_cntl_shift +ffffffff82c576a0 r panel_cntl_mask +ffffffff82c576e0 r link_enc_regs +ffffffff82c57aa0 r link_enc_aux_regs +ffffffff82c57af0 r link_enc_hpd_regs +ffffffff82c57b08 r link_enc_feature +ffffffff82c57b18 r cs_shift +ffffffff82c57b24 r cs_mask +ffffffff82c57b50 r mi_regs +ffffffff82c57e68 r mi_shifts +ffffffff82c57eb0 r mi_masks +ffffffff82c57fd0 r ipp_regs +ffffffff82c581c8 r ipp_shift +ffffffff82c581f0 r ipp_mask +ffffffff82c58290 r xfm_regs +ffffffff82c58830 r xfm_shift +ffffffff82c58890 r xfm_mask +ffffffff82c58a10 r opp_regs +ffffffff82c58b60 r opp_shift +ffffffff82c58b8c r opp_mask +ffffffff82c58c40 r aux_engine_regs +ffffffff82c58d30 r aux_mask +ffffffff82c58d90 r aux_shift +ffffffff82c58db0 r i2c_hw_regs +ffffffff82c58f00 r i2c_shifts +ffffffff82c58f2c r i2c_masks +ffffffff82c58fd0 r audio_regs +ffffffff82c59104 r audio_shift +ffffffff82c5911c r audio_mask +ffffffff82c59160 r stream_enc_regs +ffffffff82c5980c r se_shift +ffffffff82c59890 r se_mask +ffffffff82c59a94 r hwseq_reg +ffffffff82c59cb0 r hwseq_shift +ffffffff82c59d30 r hwseq_mask +ffffffff82c5a000 r reg_offsets +ffffffff82c5a018 r dce110_compressor_funcs +ffffffff82c5b000 r dce110_funcs +ffffffff82c5b2e8 r dce110_private_funcs +ffffffff82c5c000 r dce110_mem_input_v_funcs +ffffffff82c5c090 r dvmm_Hw_Setting_1DTiling +ffffffff82c5c120 r dvmm_Hw_Setting_2DTiling +ffffffff82c5c1b0 r dvmm_Hw_Setting_Linear +ffffffff82c5d000 r global_color_matrix +ffffffff82c5d0b0 r input_csc_matrix +ffffffff82c5e000 r funcs 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ipp_shift +ffffffff82c5ffc4 r ipp_mask +ffffffff82c60060 r xfm_regs +ffffffff82c60330 r xfm_shift +ffffffff82c60390 r xfm_mask +ffffffff82c60510 r opp_regs +ffffffff82c60660 r opp_shift +ffffffff82c6068c r opp_mask +ffffffff82c60740 r aux_engine_regs +ffffffff82c60830 r aux_mask +ffffffff82c60890 r aux_shift +ffffffff82c608b0 r i2c_hw_regs +ffffffff82c60a00 r i2c_shifts +ffffffff82c60a2c r i2c_masks +ffffffff82c60ad0 r audio_regs +ffffffff82c60c04 r audio_shift +ffffffff82c60c1c r audio_mask +ffffffff82c60c60 r stream_enc_regs +ffffffff82c60f3c r se_shift +ffffffff82c60fc0 r se_mask +ffffffff82c611c4 r hwseq_stoney_reg +ffffffff82c613e0 r hwseq_cz_reg +ffffffff82c615fc r hwseq_shift +ffffffff82c6167c r hwseq_mask +ffffffff82c62000 r dce110_tg_funcs +ffffffff82c63000 r dce110_tg_v_funcs +ffffffff82c64000 r dce110_xfmv_funcs +ffffffff82c65000 r reg_offsets +ffffffff82c66000 r reg_offsets +ffffffff82c67000 r bios_regs +ffffffff82c67008 r dce112_res_pool_funcs +ffffffff82c67100 r debug_defaults +ffffffff82c672b0 r clk_src_regs +ffffffff82c674a8 r dmcu_regs +ffffffff82c67504 r dmcu_shift +ffffffff82c67518 r dmcu_mask +ffffffff82c67564 r abm_regs +ffffffff82c675cc r abm_shift +ffffffff82c675f0 r abm_mask +ffffffff82c67680 r dce112_tg_offsets +ffffffff82c676c8 r res_create_funcs +ffffffff82c676f8 r plane_cap +ffffffff82c67724 r polaris_11_resource_cap +ffffffff82c67760 r polaris_10_resource_cap +ffffffff82c677a0 r panel_cntl_regs +ffffffff82c677c0 r panel_cntl_shift +ffffffff82c677d0 r panel_cntl_mask +ffffffff82c67810 r link_enc_regs +ffffffff82c67bd0 r link_enc_aux_regs +ffffffff82c67c20 r link_enc_hpd_regs +ffffffff82c67c38 r link_enc_feature +ffffffff82c67c48 r cs_shift +ffffffff82c67c54 r cs_mask +ffffffff82c67c80 r mi_regs +ffffffff82c67f98 r mi_shifts +ffffffff82c67fe0 r mi_masks +ffffffff82c68100 r ipp_regs +ffffffff82c682f8 r ipp_shift +ffffffff82c68320 r ipp_mask +ffffffff82c683c0 r xfm_regs +ffffffff82c68960 r xfm_shift +ffffffff82c689c0 r xfm_mask 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r audio_mask +ffffffff82c6c290 r stream_enc_regs +ffffffff82c6c848 r se_shift +ffffffff82c6c8cc r se_mask +ffffffff82c6cad0 r dce121_hwseq_reg +ffffffff82c6ccec r dce121_hwseq_shift +ffffffff82c6cd6c r dce121_hwseq_mask +ffffffff82c6cf60 r hwseq_reg +ffffffff82c6d17c r hwseq_shift +ffffffff82c6d1fc r hwseq_mask +ffffffff82c6e000 r dce120_tg_funcs +ffffffff82c6f000 r bios_regs +ffffffff82c6f008 r res_cap +ffffffff82c6f048 r dce80_res_pool_funcs +ffffffff82c6f140 r debug_defaults +ffffffff82c6f2f0 r clk_src_regs +ffffffff82c6f3ec r dmcu_regs +ffffffff82c6f448 r dmcu_shift +ffffffff82c6f45c r dmcu_mask +ffffffff82c6f4a8 r abm_regs +ffffffff82c6f510 r abm_shift +ffffffff82c6f534 r abm_mask +ffffffff82c6f5c0 r dce80_tg_offsets +ffffffff82c6f608 r plane_cap +ffffffff82c6f638 r res_create_funcs +ffffffff82c6f670 r panel_cntl_regs +ffffffff82c6f690 r panel_cntl_shift +ffffffff82c6f6a0 r panel_cntl_mask +ffffffff82c6f6e0 r link_enc_regs +ffffffff82c6faa0 r link_enc_aux_regs +ffffffff82c6faf0 r link_enc_hpd_regs +ffffffff82c6fb08 r link_enc_feature +ffffffff82c6fb18 r cs_shift +ffffffff82c6fb24 r cs_mask +ffffffff82c6fb50 r mi_regs +ffffffff82c6fe68 r mi_shifts +ffffffff82c6feb0 r mi_masks +ffffffff82c6ffd0 r ipp_regs +ffffffff82c701c8 r ipp_shift +ffffffff82c701f0 r ipp_mask +ffffffff82c70290 r xfm_regs +ffffffff82c70830 r xfm_shift +ffffffff82c70890 r xfm_mask +ffffffff82c70a10 r opp_regs +ffffffff82c70b60 r opp_shift +ffffffff82c70b8c r opp_mask +ffffffff82c70c40 r aux_engine_regs +ffffffff82c70d30 r aux_mask +ffffffff82c70d90 r aux_shift +ffffffff82c70db0 r i2c_hw_regs +ffffffff82c70f00 r i2c_shifts +ffffffff82c70f2c r i2c_masks +ffffffff82c70fd0 r audio_regs +ffffffff82c71104 r audio_shift +ffffffff82c7111c r audio_mask +ffffffff82c71160 r stream_enc_regs +ffffffff82c7180c r se_shift +ffffffff82c71890 r se_mask +ffffffff82c71a94 r hwseq_reg +ffffffff82c71cb0 r hwseq_shift +ffffffff82c71d30 r hwseq_mask +ffffffff82c71f24 r res_cap_81 +ffffffff82c71f60 r res_cap_83 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r opp_regs +ffffffff82c969d0 r opp_shift +ffffffff82c96a08 r opp_mask +ffffffff82c96ae0 r aux_engine_regs +ffffffff82c96bd0 r aux_mask +ffffffff82c96c30 r aux_shift +ffffffff82c96c50 r i2c_hw_regs +ffffffff82c96da0 r i2c_shifts +ffffffff82c96dcc r i2c_masks +ffffffff82c96e70 r mpc_regs +ffffffff82c973b8 r mpc_shift +ffffffff82c97400 r mpc_mask +ffffffff82c97514 r hubbub_reg +ffffffff82c9769c r hubbub_shift +ffffffff82c9772c r hubbub_mask +ffffffff82c97964 r res_cap_nv10 +ffffffff82c979a0 r vmid_regs +ffffffff82c97b60 r vmid_shifts +ffffffff82c97b68 r vmid_masks +ffffffff82c97b90 r tg_regs +ffffffff82c98400 r tg_shift +ffffffff82c984d4 r tg_mask +ffffffff82c98820 r link_enc_regs +ffffffff82c98fc0 r link_enc_aux_regs +ffffffff82c99020 r link_enc_hpd_regs +ffffffff82c99038 r le_shift +ffffffff82c99128 r le_mask +ffffffff82c994e0 r stream_enc_regs +ffffffff82c99cd8 r se_shift +ffffffff82c99db4 r se_mask +ffffffff82c9a120 r hwseq_reg +ffffffff82c9a33c r hwseq_shift +ffffffff82c9a3bc r hwseq_mask +ffffffff82c9a5b0 r dsc_regs +ffffffff82c9aa48 r dsc_shift +ffffffff82c9ab00 r dsc_mask +ffffffff82c9ade0 r hubp_regs +ffffffff82c9ba28 r hubp_shift +ffffffff82c9bb24 r hubp_mask +ffffffff82c9bf20 r dwbc20_regs +ffffffff82c9bfd8 r dwbc20_shift +ffffffff82c9c058 r dwbc20_mask +ffffffff82c9c250 r mcif_wb20_regs +ffffffff82c9c330 r mcif_wb20_shift +ffffffff82c9c3d0 r mcif_wb20_mask +ffffffff82c9c650 r link_enc_feature +ffffffff82c9c660 r bios_regs +ffffffff82c9c668 r dcn20_res_pool_funcs +ffffffff82c9c760 r res_cap_nv14 +ffffffff82c9c7a0 r debug_defaults_drv +ffffffff82c9c950 r clk_src_regs +ffffffff82c9cb48 r dccg_regs +ffffffff82c9cc38 r dccg_shift +ffffffff82c9ccd8 r dccg_mask +ffffffff82c9cf4c r dmcu_regs +ffffffff82c9cfa8 r dmcu_shift +ffffffff82c9cfbc r dmcu_mask +ffffffff82c9d008 r abm_regs +ffffffff82c9d070 r abm_shift +ffffffff82c9d094 r abm_mask +ffffffff82c9d120 r res_create_funcs +ffffffff82c9d150 r plane_cap +ffffffff82c9d180 r panel_cntl_regs +ffffffff82c9d1a0 r panel_cntl_shift +ffffffff82c9d1b0 r panel_cntl_mask +ffffffff82c9d1ec r cs_shift +ffffffff82c9d1f8 r cs_mask +ffffffff82c9d220 r audio_regs +ffffffff82c9d354 r audio_shift +ffffffff82c9d36c r audio_mask +ffffffff82c9e000 r dcn20_str_enc_funcs +ffffffff82c9f000 r dccg201_funcs +ffffffff82ca0000 r hubbub201_funcs +ffffffff82ca1000 r dcn201_funcs +ffffffff82ca12e8 r dcn201_private_funcs +ffffffff82ca2000 r dcn201_link_enc_funcs +ffffffff82ca3000 r dcn201_mpc_funcs +ffffffff82ca4000 r bios_regs +ffffffff82ca4008 r res_cap_dnc201 +ffffffff82ca4048 r debug_defaults_drv +ffffffff82ca41f0 r clk_src_regs +ffffffff82ca4298 r dccg_regs +ffffffff82ca4388 r dccg_shift +ffffffff82ca4428 r dccg_mask +ffffffff82ca46a0 r res_create_funcs +ffffffff82ca46d0 r plane_cap +ffffffff82ca4700 r link_enc_regs +ffffffff82ca4990 r link_enc_aux_regs +ffffffff82ca49b0 r link_enc_hpd_regs +ffffffff82ca49b8 r le_shift +ffffffff82ca4aa8 r le_mask +ffffffff82ca4e60 r link_enc_feature +ffffffff82ca4e70 r cs_shift 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r hubbub_reg +ffffffff82cb3b84 r hubbub_shift +ffffffff82cb3c14 r hubbub_mask +ffffffff82cb3e50 r vmid_regs +ffffffff82cb4010 r vmid_shifts +ffffffff82cb4018 r vmid_masks +ffffffff82cb4040 r dsc_regs +ffffffff82cb44d8 r dsc_shift +ffffffff82cb4590 r dsc_mask +ffffffff82cb4870 r audio_regs +ffffffff82cb4978 r audio_shift +ffffffff82cb4990 r audio_mask +ffffffff82cb49d0 r stream_enc_regs +ffffffff82cb5074 r se_shift +ffffffff82cb5150 r se_mask +ffffffff82cb54bc r hwseq_reg +ffffffff82cb56d8 r hwseq_shift +ffffffff82cb5758 r hwseq_mask +ffffffff82cb6000 r dccg3_funcs +ffffffff82cb7000 r dcn30_link_enc_funcs +ffffffff82cb8000 r dcn30_str_enc_funcs +ffffffff82cb9000 r dpp_input_csc_matrix +ffffffff82cba000 r dcn30_dwbc_funcs +ffffffff82cbb000 r hubbub30_funcs +ffffffff82cbc000 r dcn30_funcs +ffffffff82cbc2e8 r dcn30_private_funcs +ffffffff82cbd000 r dcn30_mmhubbub_funcs +ffffffff82cbe000 r dcn30_mpc_funcs +ffffffff82cbf000 r bios_regs +ffffffff82cbf008 r res_cap_dcn3 +ffffffff82cbf048 r dcn30_res_pool_funcs +ffffffff82cbf140 r debug_defaults_drv +ffffffff82cbf2f0 r clk_src_regs +ffffffff82cbf4e8 r dccg_regs +ffffffff82cbf5d8 r dccg_shift +ffffffff82cbf678 r dccg_mask +ffffffff82cbf8f0 r abm_regs +ffffffff82cbfb60 r abm_shift +ffffffff82cbfb84 r abm_mask +ffffffff82cbfc10 r res_create_funcs +ffffffff82cbfc40 r plane_cap +ffffffff82cbfc70 r panel_cntl_regs +ffffffff82cbfc90 r panel_cntl_shift +ffffffff82cbfca0 r panel_cntl_mask +ffffffff82cbfce0 r link_enc_regs +ffffffff82cc0480 r link_enc_aux_regs +ffffffff82cc04e0 r link_enc_hpd_regs +ffffffff82cc04f8 r le_shift +ffffffff82cc05e8 r le_mask +ffffffff82cc09a0 r link_enc_feature +ffffffff82cc09b0 r cs_shift +ffffffff82cc09bc r cs_mask +ffffffff82cc09e4 r hubbub_reg +ffffffff82cc0b6c r hubbub_shift +ffffffff82cc0bfc r hubbub_mask +ffffffff82cc0e40 r vmid_regs +ffffffff82cc1000 r vmid_shifts +ffffffff82cc1008 r vmid_masks +ffffffff82cc1030 r hubp_regs +ffffffff82cc1c78 r hubp_shift +ffffffff82cc1d74 r hubp_mask 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r dwbc30_regs +ffffffff82cd7b4c r dwbc30_shift +ffffffff82cd7c80 r dwbc30_mask +ffffffff82cd8150 r mcif_wb30_regs +ffffffff82cd824c r mcif_wb30_shift +ffffffff82cd82f8 r mcif_wb30_mask +ffffffff82cd85b0 r aux_engine_regs +ffffffff82cd8650 r aux_mask +ffffffff82cd86b0 r aux_shift +ffffffff82cd86d0 r i2c_hw_regs +ffffffff82cd87b0 r i2c_shifts +ffffffff82cd87dc r i2c_masks +ffffffff82cd8880 r audio_regs +ffffffff82cd89b4 r audio_shift +ffffffff82cd89cc r audio_mask +ffffffff82cd8a10 r stream_enc_regs +ffffffff82cd8f60 r se_shift +ffffffff82cd903c r se_mask +ffffffff82cd93b0 r vpg_regs +ffffffff82cd9400 r vpg_shift +ffffffff82cd9428 r vpg_mask +ffffffff82cd94c0 r afmt_regs +ffffffff82cd9550 r afmt_shift +ffffffff82cd9564 r afmt_mask +ffffffff82cd95a8 r hwseq_reg +ffffffff82cd97c4 r hwseq_shift +ffffffff82cd9844 r hwseq_mask +ffffffff82cda000 r bios_regs +ffffffff82cda008 r res_cap_dcn302 +ffffffff82cda048 r debug_defaults_drv +ffffffff82cda1f0 r clk_src_regs +ffffffff82cda394 r dccg_regs +ffffffff82cda484 r dccg_shift +ffffffff82cda524 r dccg_mask +ffffffff82cda7a0 r abm_regs +ffffffff82cda9a8 r abm_shift +ffffffff82cda9cc r abm_mask +ffffffff82cdaa58 r res_create_funcs +ffffffff82cdaa88 r plane_cap +ffffffff82cdaac0 r panel_cntl_regs +ffffffff82cdaae0 r panel_cntl_shift +ffffffff82cdaaf0 r panel_cntl_mask +ffffffff82cdab30 r link_enc_regs +ffffffff82cdb190 r link_enc_aux_regs +ffffffff82cdb1e0 r link_enc_hpd_regs +ffffffff82cdb1f4 r le_shift +ffffffff82cdb2e4 r le_mask +ffffffff82cdb69c r link_enc_feature +ffffffff82cdb6ac r cs_shift +ffffffff82cdb6b8 r cs_mask +ffffffff82cdb6e0 r hubbub_reg +ffffffff82cdb868 r hubbub_shift +ffffffff82cdb8f8 r hubbub_mask +ffffffff82cdbb30 r vmid_regs +ffffffff82cdbcf0 r vmid_shifts +ffffffff82cdbcf8 r vmid_masks +ffffffff82cdbd20 r hubp_regs +ffffffff82cdc75c r hubp_shift +ffffffff82cdc858 r hubp_mask +ffffffff82cdcc50 r dpp_regs +ffffffff82cde6a4 r tf_shift +ffffffff82cde978 r tf_mask +ffffffff82cdf4c0 r opp_regs +ffffffff82cdf678 r opp_shift +ffffffff82cdf6b0 r opp_mask +ffffffff82cdf790 r optc_regs +ffffffff82cdfe98 r optc_shift +ffffffff82cdff6c r optc_mask +ffffffff82ce02b4 r mpc_regs +ffffffff82ce1aa0 r mpc_shift +ffffffff82ce1b7c r mpc_mask +ffffffff82ce1ef0 r dsc_regs +ffffffff82ce22c4 r dsc_shift +ffffffff82ce237c r dsc_mask +ffffffff82ce2660 r dwbc30_regs +ffffffff82ce283c r dwbc30_shift +ffffffff82ce2970 r dwbc30_mask +ffffffff82ce2e40 r mcif_wb30_regs +ffffffff82ce2f3c r mcif_wb30_shift +ffffffff82ce2fe8 r mcif_wb30_mask +ffffffff82ce32a0 r aux_engine_regs +ffffffff82ce3368 r aux_mask +ffffffff82ce33c8 r aux_shift +ffffffff82ce33e0 r i2c_hw_regs +ffffffff82ce34f8 r i2c_shifts +ffffffff82ce3524 r i2c_masks +ffffffff82ce35d0 r audio_regs +ffffffff82ce3704 r audio_shift +ffffffff82ce371c r audio_mask +ffffffff82ce3760 r stream_enc_regs +ffffffff82ce3e04 r se_shift +ffffffff82ce3ee0 r se_mask +ffffffff82ce4250 r vpg_regs +ffffffff82ce42c8 r vpg_shift +ffffffff82ce42f0 r vpg_mask +ffffffff82ce4390 r afmt_regs +ffffffff82ce4468 r afmt_shift +ffffffff82ce447c r afmt_mask +ffffffff82ce44c0 r hwseq_reg +ffffffff82ce46dc r hwseq_shift +ffffffff82ce475c r hwseq_mask +ffffffff82ce5000 r bios_regs +ffffffff82ce5008 r res_cap_dcn303 +ffffffff82ce5048 r debug_defaults_drv +ffffffff82ce51f0 r clk_src_regs +ffffffff82ce5298 r dccg_regs +ffffffff82ce5388 r dccg_shift +ffffffff82ce5428 r dccg_mask +ffffffff82ce56a0 r abm_regs +ffffffff82ce5770 r abm_shift +ffffffff82ce5794 r abm_mask +ffffffff82ce5820 r res_create_funcs +ffffffff82ce5850 r plane_cap +ffffffff82ce5880 r panel_cntl_regs +ffffffff82ce58a0 r panel_cntl_shift +ffffffff82ce58b0 r panel_cntl_mask +ffffffff82ce58f0 r link_enc_regs +ffffffff82ce5b80 r link_enc_aux_regs +ffffffff82ce5ba0 r link_enc_hpd_regs +ffffffff82ce5ba8 r le_shift +ffffffff82ce5c98 r le_mask +ffffffff82ce6050 r link_enc_feature +ffffffff82ce6060 r cs_shift +ffffffff82ce606c r cs_mask +ffffffff82ce6094 r hubbub_reg +ffffffff82ce621c r hubbub_shift +ffffffff82ce62ac r hubbub_mask +ffffffff82ce64f0 r vmid_regs +ffffffff82ce66b0 r vmid_shifts +ffffffff82ce66b8 r vmid_masks +ffffffff82ce66e0 r hubp_regs +ffffffff82ce6af8 r hubp_shift +ffffffff82ce6bf4 r hubp_mask +ffffffff82ce6ff0 r dpp_regs +ffffffff82ce7a78 r tf_shift +ffffffff82ce7d4c r tf_mask +ffffffff82ce8890 r opp_regs +ffffffff82ce8940 r opp_shift +ffffffff82ce8978 r opp_mask +ffffffff82ce8a50 r optc_regs +ffffffff82ce8d20 r optc_shift +ffffffff82ce8df4 r optc_mask +ffffffff82ce913c r mpc_regs +ffffffff82cea928 r mpc_shift +ffffffff82ceaa04 r mpc_mask +ffffffff82cead70 r dsc_regs +ffffffff82ceaef8 r dsc_shift +ffffffff82ceafb0 r dsc_mask +ffffffff82ceb290 r dwbc30_regs +ffffffff82ceb46c r dwbc30_shift +ffffffff82ceb5a0 r dwbc30_mask +ffffffff82ceba70 r mcif_wb30_regs +ffffffff82cebb6c r mcif_wb30_shift +ffffffff82cebc18 r mcif_wb30_mask +ffffffff82cebed0 r aux_engine_regs +ffffffff82cebf20 r aux_mask +ffffffff82cebf80 r aux_shift +ffffffff82cebfa0 r i2c_hw_regs +ffffffff82cec010 r i2c_shifts +ffffffff82cec03c r i2c_masks +ffffffff82cec0e0 r audio_regs +ffffffff82cec214 r audio_shift +ffffffff82cec22c r audio_mask +ffffffff82cec270 r stream_enc_regs +ffffffff82cec518 r se_shift +ffffffff82cec5f4 r se_mask +ffffffff82cec960 r vpg_regs +ffffffff82cec99c r vpg_shift +ffffffff82cec9c4 r vpg_mask +ffffffff82ceca60 r afmt_regs +ffffffff82cecacc r afmt_shift +ffffffff82cecae0 r afmt_mask +ffffffff82cecb24 r hwseq_reg +ffffffff82cecd40 r hwseq_shift +ffffffff82cecdc0 r hwseq_mask +ffffffff82ced000 r dccg31_funcs +ffffffff82cee000 r dcn31_link_enc_funcs +ffffffff82cef000 r dcn30_str_enc_funcs +ffffffff82cf0000 r hubbub31_funcs +ffffffff82cf1000 r dcn31_funcs +ffffffff82cf12e8 r dcn31_private_funcs +ffffffff82cf2000 r dcn31_link_panel_cntl_funcs +ffffffff82cf3000 r bios_regs +ffffffff82cf3008 r res_cap_dcn31 +ffffffff82cf3050 r clk_src_regs +ffffffff82cf3200 r clk_src_regs_b0 +ffffffff82cf33a4 r dccg_regs +ffffffff82cf3494 r dccg_shift +ffffffff82cf3534 r dccg_mask +ffffffff82cf37b0 r abm_regs +ffffffff82cf3950 r abm_shift +ffffffff82cf3974 r abm_mask +ffffffff82cf3a00 r res_create_funcs +ffffffff82cf3a30 r plane_cap +ffffffff82cf3a60 r link_enc_regs +ffffffff82cf40c0 r link_enc_aux_regs +ffffffff82cf4110 r link_enc_hpd_regs +ffffffff82cf4124 r le_shift +ffffffff82cf4214 r le_mask +ffffffff82cf45cc r link_enc_feature +ffffffff82cf45dc r panel_config_defaults +ffffffff82cf4630 r debug_defaults_drv +ffffffff82cf47d8 r cs_shift +ffffffff82cf47e4 r cs_mask +ffffffff82cf480c r hubbub_reg +ffffffff82cf4994 r hubbub_shift +ffffffff82cf4a24 r hubbub_mask +ffffffff82cf4c60 r vmid_regs +ffffffff82cf4e20 r vmid_shifts +ffffffff82cf4e28 r vmid_masks +ffffffff82cf4e50 r hubp_regs +ffffffff82cf5680 r hubp_shift +ffffffff82cf577c r hubp_mask +ffffffff82cf5b70 r dpp_regs +ffffffff82cf7080 r tf_shift +ffffffff82cf7354 r tf_mask +ffffffff82cf7ea0 r opp_regs +ffffffff82cf8000 r opp_shift +ffffffff82cf8038 r opp_mask +ffffffff82cf8110 r optc_regs +ffffffff82cf86b0 r optc_shift +ffffffff82cf8784 r optc_mask +ffffffff82cf8acc r mpc_regs +ffffffff82cfa2b8 r mpc_shift +ffffffff82cfa394 r mpc_mask +ffffffff82cfa700 r dsc_regs +ffffffff82cfa94c r dsc_shift +ffffffff82cfaa04 r dsc_mask +ffffffff82cface0 r dwbc30_regs +ffffffff82cfaebc r dwbc30_shift +ffffffff82cfaff0 r dwbc30_mask +ffffffff82cfb4c0 r mcif_wb30_regs +ffffffff82cfb5bc r mcif_wb30_shift +ffffffff82cfb668 r mcif_wb30_mask +ffffffff82cfb920 r aux_engine_regs +ffffffff82cfb9e8 r aux_mask +ffffffff82cfba48 r aux_shift +ffffffff82cfba60 r i2c_hw_regs +ffffffff82cfbb78 r i2c_shifts +ffffffff82cfbba4 r i2c_masks +ffffffff82cfbc50 r audio_regs +ffffffff82cfbd84 r audio_shift +ffffffff82cfbd9c r audio_mask +ffffffff82cfbdd8 r se_shift +ffffffff82cfbeb4 r se_mask +ffffffff82cfc220 r vpg_regs +ffffffff82cfc310 r vpg_shift +ffffffff82cfc338 r vpg_mask +ffffffff82cfc3e0 r afmt_regs +ffffffff82cfc4b8 r afmt_shift +ffffffff82cfc4cc r afmt_mask +ffffffff82cfc520 r stream_enc_regs +ffffffff82cfdbc0 r hpo_dp_stream_enc_regs +ffffffff82cfddf0 r hpo_dp_se_shift +ffffffff82cfde18 r hpo_dp_se_mask +ffffffff82cfdec0 r apg_regs +ffffffff82cfdf00 r apg_shift +ffffffff82cfdf08 r apg_mask +ffffffff82cfdf20 r hpo_dp_link_enc_regs +ffffffff82cfe030 r hpo_dp_le_shift +ffffffff82cfe04c r hpo_dp_le_mask +ffffffff82cfe0b0 r hwseq_reg +ffffffff82cfe2cc r hwseq_shift +ffffffff82cfe34c r hwseq_mask +ffffffff82cff000 r dccg314_funcs +ffffffff82d00000 r dcn314_str_enc_funcs +ffffffff82d01000 r dcn314_funcs +ffffffff82d012e8 r dcn314_private_funcs +ffffffff82d02000 r bios_regs +ffffffff82d02008 r res_cap_dcn314 +ffffffff82d02048 r debug_defaults_diags +ffffffff82d021f0 r clk_src_regs +ffffffff82d02394 r dccg_regs +ffffffff82d02484 r dccg_shift +ffffffff82d02524 r dccg_mask +ffffffff82d027a0 r abm_regs +ffffffff82d02940 r abm_shift +ffffffff82d02964 r abm_mask +ffffffff82d029f0 r res_create_funcs +ffffffff82d02a20 r plane_cap +ffffffff82d02a50 r link_enc_regs +ffffffff82d030b0 r link_enc_aux_regs +ffffffff82d03100 r link_enc_hpd_regs +ffffffff82d03114 r le_shift +ffffffff82d03204 r le_mask +ffffffff82d035bc r link_enc_feature +ffffffff82d035cc r panel_config_defaults +ffffffff82d03620 r debug_defaults_drv +ffffffff82d037c8 r cs_shift +ffffffff82d037d4 r cs_mask +ffffffff82d037fc r hubbub_reg +ffffffff82d03984 r hubbub_shift +ffffffff82d03a14 r hubbub_mask +ffffffff82d03c50 r vmid_regs +ffffffff82d03e10 r vmid_shifts +ffffffff82d03e18 r vmid_masks +ffffffff82d03e40 r hubp_regs +ffffffff82d04670 r hubp_shift +ffffffff82d0476c r hubp_mask +ffffffff82d04b60 r dpp_regs +ffffffff82d06070 r tf_shift +ffffffff82d06344 r tf_mask +ffffffff82d06e90 r opp_regs +ffffffff82d06ff0 r opp_shift +ffffffff82d07028 r opp_mask +ffffffff82d07100 r optc_regs +ffffffff82d076a0 r optc_shift +ffffffff82d07774 r optc_mask +ffffffff82d07abc r mpc_regs +ffffffff82d092a8 r mpc_shift +ffffffff82d09384 r mpc_mask +ffffffff82d096f0 r dsc_regs +ffffffff82d09a00 r dsc_shift +ffffffff82d09ab8 r dsc_mask +ffffffff82d09d90 r dwbc30_regs +ffffffff82d09f6c r dwbc30_shift +ffffffff82d0a0a0 r dwbc30_mask +ffffffff82d0a570 r mcif_wb30_regs +ffffffff82d0a66c r mcif_wb30_shift +ffffffff82d0a718 r mcif_wb30_mask +ffffffff82d0a9d0 r aux_engine_regs +ffffffff82d0aa98 r aux_mask +ffffffff82d0aaf8 r aux_shift +ffffffff82d0ab10 r i2c_hw_regs +ffffffff82d0ac28 r i2c_shifts +ffffffff82d0ac54 r i2c_masks +ffffffff82d0ad00 r audio_regs +ffffffff82d0ae34 r audio_shift +ffffffff82d0ae4c r audio_mask +ffffffff82d0ae90 r stream_enc_regs +ffffffff82d0b534 r se_shift +ffffffff82d0b610 r se_mask +ffffffff82d0b980 r vpg_regs +ffffffff82d0ba70 r vpg_shift +ffffffff82d0ba98 r vpg_mask +ffffffff82d0bb40 r afmt_regs +ffffffff82d0bc18 r afmt_shift +ffffffff82d0bc2c r afmt_mask +ffffffff82d0bc80 r hpo_dp_stream_enc_regs +ffffffff82d0beb0 r hpo_dp_se_shift +ffffffff82d0bed8 r hpo_dp_se_mask +ffffffff82d0bf80 r apg_regs +ffffffff82d0bfc0 r apg_shift +ffffffff82d0bfc8 r apg_mask +ffffffff82d0bfe0 r hpo_dp_link_enc_regs +ffffffff82d0c0f0 r hpo_dp_le_shift +ffffffff82d0c10c r hpo_dp_le_mask +ffffffff82d0c170 r hwseq_reg +ffffffff82d0c38c r hwseq_shift +ffffffff82d0c40c r hwseq_mask +ffffffff82d0d000 r bios_regs +ffffffff82d0d008 r res_cap_dcn31 +ffffffff82d0d050 r clk_src_regs +ffffffff82d0d1f4 r dccg_regs +ffffffff82d0d2e4 r dccg_shift +ffffffff82d0d384 r dccg_mask +ffffffff82d0d600 r abm_regs +ffffffff82d0d7a0 r abm_shift +ffffffff82d0d7c4 r abm_mask +ffffffff82d0d850 r res_create_funcs +ffffffff82d0d880 r plane_cap +ffffffff82d0d8b0 r link_enc_regs +ffffffff82d0df10 r link_enc_aux_regs +ffffffff82d0df60 r link_enc_hpd_regs +ffffffff82d0df74 r le_shift +ffffffff82d0e064 r le_mask +ffffffff82d0e41c r link_enc_feature +ffffffff82d0e42c r panel_config_defaults +ffffffff82d0e480 r debug_defaults_drv +ffffffff82d0e628 r cs_shift +ffffffff82d0e634 r cs_mask +ffffffff82d0e65c r hubbub_reg +ffffffff82d0e7e4 r hubbub_shift +ffffffff82d0e874 r hubbub_mask +ffffffff82d0eab0 r vmid_regs +ffffffff82d0ec70 r vmid_shifts +ffffffff82d0ec78 r vmid_masks +ffffffff82d0eca0 r hubp_regs +ffffffff82d0f4d0 r hubp_shift +ffffffff82d0f5cc r hubp_mask +ffffffff82d0f9c0 r dpp_regs +ffffffff82d10ed0 r tf_shift +ffffffff82d111a4 r tf_mask +ffffffff82d11cf0 r opp_regs +ffffffff82d11e50 r opp_shift +ffffffff82d11e88 r opp_mask +ffffffff82d11f60 r optc_regs +ffffffff82d12500 r optc_shift +ffffffff82d125d4 r optc_mask +ffffffff82d1291c r mpc_regs +ffffffff82d14108 r mpc_shift +ffffffff82d141e4 r mpc_mask +ffffffff82d14550 r dsc_regs +ffffffff82d1479c r dsc_shift +ffffffff82d14854 r dsc_mask +ffffffff82d14b30 r dwbc30_regs +ffffffff82d14d0c r dwbc30_shift +ffffffff82d14e40 r dwbc30_mask +ffffffff82d15310 r mcif_wb30_regs +ffffffff82d1540c r mcif_wb30_shift +ffffffff82d154b8 r mcif_wb30_mask +ffffffff82d15770 r aux_engine_regs +ffffffff82d15838 r aux_mask +ffffffff82d15898 r aux_shift +ffffffff82d158b0 r i2c_hw_regs +ffffffff82d159c8 r i2c_shifts +ffffffff82d159f4 r i2c_masks +ffffffff82d15aa0 r audio_regs +ffffffff82d15bd4 r audio_shift +ffffffff82d15bec r audio_mask +ffffffff82d15c30 r stream_enc_regs +ffffffff82d162d4 r se_shift +ffffffff82d163b0 r se_mask +ffffffff82d16720 r vpg_regs +ffffffff82d16810 r vpg_shift +ffffffff82d16838 r vpg_mask +ffffffff82d168e0 r afmt_regs +ffffffff82d169b8 r afmt_shift +ffffffff82d169cc r afmt_mask +ffffffff82d16a20 r hpo_dp_stream_enc_regs +ffffffff82d16c50 r hpo_dp_se_shift +ffffffff82d16c78 r hpo_dp_se_mask +ffffffff82d16d20 r apg_regs +ffffffff82d16d60 r apg_shift +ffffffff82d16d68 r apg_mask +ffffffff82d16d80 r hpo_dp_link_enc_regs +ffffffff82d16e90 r hpo_dp_le_shift +ffffffff82d16eac r hpo_dp_le_mask +ffffffff82d16f10 r hwseq_reg +ffffffff82d1712c r hwseq_shift +ffffffff82d171ac r hwseq_mask +ffffffff82d18000 r bios_regs +ffffffff82d18008 r res_cap_dcn31 +ffffffff82d18050 r clk_src_regs +ffffffff82d181f4 r dccg_regs +ffffffff82d182e4 r dccg_shift +ffffffff82d18384 r dccg_mask +ffffffff82d18600 r abm_regs +ffffffff82d187a0 r abm_shift +ffffffff82d187c4 r abm_mask +ffffffff82d18850 r res_create_funcs +ffffffff82d18880 r plane_cap +ffffffff82d188b0 r link_enc_regs +ffffffff82d18f10 r link_enc_aux_regs +ffffffff82d18f60 r link_enc_hpd_regs +ffffffff82d18f74 r le_shift +ffffffff82d19064 r le_mask +ffffffff82d1941c r link_enc_feature +ffffffff82d1942c r panel_config_defaults +ffffffff82d19480 r debug_defaults_drv +ffffffff82d19628 r cs_shift +ffffffff82d19634 r cs_mask +ffffffff82d1965c r hubbub_reg +ffffffff82d197e4 r hubbub_shift +ffffffff82d19874 r hubbub_mask +ffffffff82d19ab0 r vmid_regs +ffffffff82d19c70 r vmid_shifts +ffffffff82d19c78 r vmid_masks +ffffffff82d19ca0 r hubp_regs +ffffffff82d1a4d0 r hubp_shift +ffffffff82d1a5cc r hubp_mask +ffffffff82d1a9c0 r dpp_regs +ffffffff82d1bed0 r tf_shift +ffffffff82d1c1a4 r tf_mask +ffffffff82d1ccf0 r opp_regs +ffffffff82d1ce50 r opp_shift +ffffffff82d1ce88 r opp_mask +ffffffff82d1cf60 r optc_regs +ffffffff82d1d500 r optc_shift +ffffffff82d1d5d4 r optc_mask +ffffffff82d1d91c r mpc_regs +ffffffff82d1f108 r mpc_shift +ffffffff82d1f1e4 r mpc_mask +ffffffff82d1f550 r dsc_regs +ffffffff82d1f79c r dsc_shift +ffffffff82d1f854 r dsc_mask +ffffffff82d1fb30 r dwbc30_regs +ffffffff82d1fd0c r dwbc30_shift +ffffffff82d1fe40 r dwbc30_mask +ffffffff82d20310 r mcif_wb30_regs +ffffffff82d2040c r mcif_wb30_shift +ffffffff82d204b8 r mcif_wb30_mask +ffffffff82d20770 r aux_engine_regs +ffffffff82d20838 r aux_mask +ffffffff82d20898 r aux_shift +ffffffff82d208b0 r i2c_hw_regs +ffffffff82d209c8 r i2c_shifts +ffffffff82d209f4 r i2c_masks +ffffffff82d20aa0 r audio_regs +ffffffff82d20bd4 r audio_shift +ffffffff82d20bec r audio_mask +ffffffff82d20c30 r stream_enc_regs +ffffffff82d212d4 r se_shift +ffffffff82d213b0 r se_mask +ffffffff82d21720 r vpg_regs +ffffffff82d21810 r vpg_shift +ffffffff82d21838 r vpg_mask +ffffffff82d218e0 r afmt_regs +ffffffff82d219b8 r afmt_shift +ffffffff82d219cc r afmt_mask +ffffffff82d21a20 r hpo_dp_stream_enc_regs +ffffffff82d21c50 r hpo_dp_se_shift +ffffffff82d21c78 r hpo_dp_se_mask +ffffffff82d21d20 r apg_regs +ffffffff82d21d60 r apg_shift +ffffffff82d21d68 r apg_mask +ffffffff82d21d80 r hpo_dp_link_enc_regs +ffffffff82d21e90 r hpo_dp_le_shift +ffffffff82d21eac r hpo_dp_le_mask +ffffffff82d21f10 r hwseq_reg +ffffffff82d2212c r hwseq_shift +ffffffff82d221ac r hwseq_mask +ffffffff82d23000 r dccg32_funcs +ffffffff82d24000 r dcn32_link_enc_funcs +ffffffff82d25000 r dcn32_str_enc_funcs +ffffffff82d26000 r hubbub32_funcs +ffffffff82d27000 r dcn32_funcs +ffffffff82d272e8 r dcn32_private_funcs +ffffffff82d28000 r dcn32_mmhubbub_funcs +ffffffff82d29000 r dcn32_mpc_funcs +ffffffff82d2a000 r res_cap_dcn32 ffffffff82d2a03c r dccg_shift ffffffff82d2a0dc r dccg_mask ffffffff82d2a350 r abm_shift @@ -48389,60 +48373,87 @@ ffffffff82d2df1c r hpo_dp_le_shift ffffffff82d2df38 r hpo_dp_le_mask ffffffff82d2df9c r hwseq_shift ffffffff82d2e01c r hwseq_mask -ffffffff82d30000 R dcn10_soc_defaults -ffffffff82d3008c R dcn10_ip_defaults -ffffffff82d3c000 r dml20_funcs -ffffffff82d3c030 r dml20v2_funcs -ffffffff82d3c060 r dml21_funcs -ffffffff82d3c090 r dml30_funcs -ffffffff82d3c0c0 r dml31_funcs -ffffffff82d3c0f0 r dml314_funcs -ffffffff82d3c120 r dml32_funcs -ffffffff82d3f000 r qp_table_444_8bpc_max -ffffffff82d3f940 r qp_table_444_8bpc_min -ffffffff82d40280 r qp_table_444_10bpc_max -ffffffff82d40ec0 r qp_table_444_10bpc_min -ffffffff82d41b00 r qp_table_444_12bpc_max -ffffffff82d42a40 r qp_table_444_12bpc_min -ffffffff82d43980 r qp_table_422_8bpc_max -ffffffff82d43ec0 r qp_table_422_8bpc_min -ffffffff82d44400 r qp_table_422_10bpc_max -ffffffff82d44b40 r qp_table_422_10bpc_min -ffffffff82d45280 r qp_table_422_12bpc_max -ffffffff82d45bc0 r qp_table_422_12bpc_min -ffffffff82d46500 r qp_table_420_8bpc_max -ffffffff82d46940 r qp_table_420_8bpc_min -ffffffff82d46d80 r qp_table_420_10bpc_max -ffffffff82d47340 r qp_table_420_10bpc_min -ffffffff82d47900 r qp_table_420_12bpc_max -ffffffff82d48040 r qp_table_420_12bpc_min -ffffffff82d4a000 r funcs -ffffffff82d4a050 r hpd_regs -ffffffff82d4a1a0 r hpd_shift -ffffffff82d4a1b0 r hpd_mask -ffffffff82d4a1c0 r ddc_data_regs -ffffffff82d4a3a0 r ddc_clk_regs -ffffffff82d4a580 r ddc_shift -ffffffff82d4a5a8 r ddc_mask -ffffffff82d4b000 r funcs -ffffffff82d4c000 r funcs -ffffffff82d4c050 r hpd_regs -ffffffff82d4c1a0 r hpd_shift -ffffffff82d4c1b0 r hpd_mask -ffffffff82d4c1c0 r ddc_data_regs -ffffffff82d4c3a0 r ddc_clk_regs -ffffffff82d4c580 r ddc_shift -ffffffff82d4c5a8 r ddc_mask -ffffffff82d4d000 r funcs -ffffffff82d4e000 r funcs -ffffffff82d4e050 r hpd_regs -ffffffff82d4e1a0 r hpd_shift -ffffffff82d4e1b0 r hpd_mask -ffffffff82d4e1c0 r ddc_data_regs -ffffffff82d4e3a0 r ddc_clk_regs -ffffffff82d4e580 r ddc_shift -ffffffff82d4e5a8 r ddc_mask -ffffffff82d4f000 r funcs +ffffffff82d2f000 r dcn321_link_enc_funcs +ffffffff82d30000 r res_cap_dcn321 +ffffffff82d3003c r dccg_shift +ffffffff82d300dc r dccg_mask +ffffffff82d30350 r abm_shift +ffffffff82d30374 r abm_mask +ffffffff82d30400 r res_create_funcs +ffffffff82d30430 r plane_cap +ffffffff82d3045c r le_shift +ffffffff82d3054c r le_mask +ffffffff82d30904 r link_enc_feature +ffffffff82d30918 r debug_defaults_drv +ffffffff82d30ac0 r cs_shift +ffffffff82d30acc r cs_mask +ffffffff82d30af4 r hubbub_shift +ffffffff82d30b84 r hubbub_mask +ffffffff82d30dbc r vmid_shifts +ffffffff82d30dc4 r vmid_masks +ffffffff82d30de4 r hubp_shift +ffffffff82d30ee0 r hubp_mask +ffffffff82d312d0 r tf_shift +ffffffff82d315a4 r tf_mask +ffffffff82d320e8 r opp_shift +ffffffff82d32120 r opp_mask +ffffffff82d321f4 r optc_shift +ffffffff82d322c8 r optc_mask +ffffffff82d32610 r mpc_shift +ffffffff82d326ec r mpc_mask +ffffffff82d32a58 r dsc_shift +ffffffff82d32b10 r dsc_mask +ffffffff82d32de8 r dwbc30_shift +ffffffff82d32f1c r dwbc30_mask +ffffffff82d333e4 r mcif_wb30_shift +ffffffff82d33490 r mcif_wb30_mask +ffffffff82d3373c r aux_mask +ffffffff82d3379c r aux_shift +ffffffff82d337b4 r i2c_shifts +ffffffff82d337e0 r i2c_masks +ffffffff82d33884 r audio_shift +ffffffff82d3389c r audio_mask +ffffffff82d338d8 r se_shift +ffffffff82d339b4 r se_mask +ffffffff82d33d20 r vpg_shift +ffffffff82d33d48 r vpg_mask +ffffffff82d33ddc r afmt_shift +ffffffff82d33df0 r afmt_mask +ffffffff82d33e34 r hpo_dp_se_shift +ffffffff82d33e5c r hpo_dp_se_mask +ffffffff82d33efc r apg_shift +ffffffff82d33f04 r apg_mask +ffffffff82d33f1c r hpo_dp_le_shift +ffffffff82d33f38 r hpo_dp_le_mask +ffffffff82d33f9c r hwseq_shift +ffffffff82d3401c r hwseq_mask +ffffffff82d36000 R dcn10_soc_defaults +ffffffff82d3608c R dcn10_ip_defaults +ffffffff82d42000 r dml20_funcs +ffffffff82d42030 r dml20v2_funcs +ffffffff82d42060 r dml21_funcs +ffffffff82d42090 r dml30_funcs +ffffffff82d420c0 r dml31_funcs +ffffffff82d420f0 r dml314_funcs +ffffffff82d42120 r dml32_funcs +ffffffff82d45000 r qp_table_444_8bpc_max +ffffffff82d45940 r qp_table_444_8bpc_min +ffffffff82d46280 r qp_table_444_10bpc_max +ffffffff82d46ec0 r qp_table_444_10bpc_min +ffffffff82d47b00 r qp_table_444_12bpc_max +ffffffff82d48a40 r qp_table_444_12bpc_min +ffffffff82d49980 r qp_table_422_8bpc_max +ffffffff82d49ec0 r qp_table_422_8bpc_min +ffffffff82d4a400 r qp_table_422_10bpc_max +ffffffff82d4ab40 r qp_table_422_10bpc_min +ffffffff82d4b280 r qp_table_422_12bpc_max +ffffffff82d4bbc0 r qp_table_422_12bpc_min +ffffffff82d4c500 r qp_table_420_8bpc_max +ffffffff82d4c940 r qp_table_420_8bpc_min +ffffffff82d4cd80 r qp_table_420_10bpc_max +ffffffff82d4d340 r qp_table_420_10bpc_min +ffffffff82d4d900 r qp_table_420_12bpc_max +ffffffff82d4e040 r qp_table_420_12bpc_min ffffffff82d50000 r funcs ffffffff82d50050 r hpd_regs ffffffff82d501a0 r hpd_shift @@ -48451,169 +48462,167 @@ ffffffff82d501c0 r ddc_data_regs ffffffff82d503a0 r ddc_clk_regs ffffffff82d50580 r ddc_shift ffffffff82d505a8 r ddc_mask -ffffffff82d505d0 r generic_regs -ffffffff82d50640 r generic_shift -ffffffff82d50650 r generic_mask ffffffff82d51000 r funcs ffffffff82d52000 r funcs ffffffff82d52050 r hpd_regs ffffffff82d521a0 r hpd_shift ffffffff82d521b0 r hpd_mask -ffffffff82d521c0 r ddc_data_regs_dcn -ffffffff82d52370 r ddc_clk_regs_dcn -ffffffff82d52520 r ddc_shift -ffffffff82d52640 r ddc_mask -ffffffff82d52760 r generic_regs -ffffffff82d527d0 r generic_shift -ffffffff82d527e0 r generic_mask +ffffffff82d521c0 r ddc_data_regs +ffffffff82d523a0 r ddc_clk_regs +ffffffff82d52580 r ddc_shift +ffffffff82d525a8 r ddc_mask ffffffff82d53000 r funcs ffffffff82d54000 r funcs ffffffff82d54050 r hpd_regs -ffffffff82d54168 r hpd_shift -ffffffff82d54178 r hpd_mask -ffffffff82d54190 r ddc_data_regs_dcn -ffffffff82d542c0 r ddc_clk_regs_dcn -ffffffff82d543f0 r ddc_shift -ffffffff82d544e0 r ddc_mask -ffffffff82d545d0 r generic_regs -ffffffff82d54604 r generic_shift -ffffffff82d5460c r generic_mask +ffffffff82d541a0 r hpd_shift +ffffffff82d541b0 r hpd_mask +ffffffff82d541c0 r ddc_data_regs +ffffffff82d543a0 r ddc_clk_regs +ffffffff82d54580 r ddc_shift +ffffffff82d545a8 r ddc_mask ffffffff82d55000 r funcs ffffffff82d56000 r funcs ffffffff82d56050 r hpd_regs ffffffff82d561a0 r hpd_shift ffffffff82d561b0 r hpd_mask -ffffffff82d561c0 r ddc_data_regs_dcn -ffffffff82d56370 r ddc_clk_regs_dcn -ffffffff82d56520 r ddc_shift -ffffffff82d56640 r ddc_mask -ffffffff82d56760 r generic_regs -ffffffff82d567d0 r generic_shift -ffffffff82d567e0 r generic_mask +ffffffff82d561c0 r ddc_data_regs +ffffffff82d563a0 r ddc_clk_regs +ffffffff82d56580 r ddc_shift +ffffffff82d565a8 r ddc_mask +ffffffff82d565d0 r generic_regs +ffffffff82d56640 r generic_shift +ffffffff82d56650 r generic_mask ffffffff82d57000 r funcs ffffffff82d58000 r funcs ffffffff82d58050 r hpd_regs -ffffffff82d58168 r hpd_shift -ffffffff82d58178 r hpd_mask -ffffffff82d58190 r ddc_data_regs_dcn -ffffffff82d58300 r ddc_clk_regs_dcn -ffffffff82d58470 r ddc_shift -ffffffff82d58560 r ddc_mask -ffffffff82d58650 r generic_regs -ffffffff82d586c0 r generic_shift -ffffffff82d586d0 r generic_mask +ffffffff82d581a0 r hpd_shift +ffffffff82d581b0 r hpd_mask +ffffffff82d581c0 r ddc_data_regs_dcn +ffffffff82d58370 r ddc_clk_regs_dcn +ffffffff82d58520 r ddc_shift +ffffffff82d58640 r ddc_mask +ffffffff82d58760 r generic_regs +ffffffff82d587d0 r generic_shift +ffffffff82d587e0 r generic_mask ffffffff82d59000 r funcs ffffffff82d5a000 r funcs ffffffff82d5a050 r hpd_regs ffffffff82d5a168 r hpd_shift ffffffff82d5a178 r hpd_mask ffffffff82d5a190 r ddc_data_regs_dcn -ffffffff82d5a340 r ddc_clk_regs_dcn -ffffffff82d5a4f0 r ddc_shift -ffffffff82d5a610 r ddc_mask -ffffffff82d5a730 r generic_regs -ffffffff82d5a7a0 r generic_shift -ffffffff82d5a7b0 r generic_mask +ffffffff82d5a2c0 r ddc_clk_regs_dcn +ffffffff82d5a3f0 r ddc_shift +ffffffff82d5a4e0 r ddc_mask +ffffffff82d5a5d0 r generic_regs +ffffffff82d5a604 r generic_shift +ffffffff82d5a60c r generic_mask ffffffff82d5b000 r funcs ffffffff82d5c000 r funcs +ffffffff82d5c050 r hpd_regs +ffffffff82d5c1a0 r hpd_shift +ffffffff82d5c1b0 r hpd_mask +ffffffff82d5c1c0 r ddc_data_regs_dcn +ffffffff82d5c370 r ddc_clk_regs_dcn +ffffffff82d5c520 r ddc_shift +ffffffff82d5c640 r ddc_mask +ffffffff82d5c760 r generic_regs +ffffffff82d5c7d0 r generic_shift +ffffffff82d5c7e0 r generic_mask ffffffff82d5d000 r funcs ffffffff82d5e000 r funcs -ffffffff82d5f000 r hdmi_14_protection -ffffffff82d5f010 r dp_11_protection -ffffffff82d5f020 r hdcp_i2c_offsets -ffffffff82d5f050 r hdcp_dpcd_addrs -ffffffff82d60000 r irq_service_funcs_dce110 -ffffffff82d60008 r dummy_irq_info_funcs -ffffffff82d60018 r hpd_irq_info_funcs -ffffffff82d60028 r hpd_rx_irq_info_funcs -ffffffff82d60038 r pflip_irq_info_funcs -ffffffff82d60048 r vupdate_irq_info_funcs -ffffffff82d60058 r vblank_irq_info_funcs -ffffffff82d60070 r irq_source_info_dce110 -ffffffff82d62000 r irq_service_funcs_dce120 -ffffffff82d62008 r dummy_irq_info_funcs -ffffffff82d62018 r hpd_irq_info_funcs -ffffffff82d62028 r hpd_rx_irq_info_funcs -ffffffff82d62038 r pflip_irq_info_funcs -ffffffff82d62048 r vupdate_irq_info_funcs -ffffffff82d62058 r vblank_irq_info_funcs -ffffffff82d62070 r irq_source_info_dce120 -ffffffff82d64000 r irq_service_funcs_dce80 -ffffffff82d64008 r dummy_irq_info_funcs -ffffffff82d64018 r hpd_irq_info_funcs -ffffffff82d64028 r hpd_rx_irq_info_funcs -ffffffff82d64038 r pflip_irq_info_funcs -ffffffff82d64048 r vupdate_irq_info_funcs -ffffffff82d64058 r vblank_irq_info_funcs -ffffffff82d64070 r irq_source_info_dce80 -ffffffff82d66000 r irq_service_funcs_dcn10 +ffffffff82d5e050 r hpd_regs +ffffffff82d5e168 r hpd_shift +ffffffff82d5e178 r hpd_mask +ffffffff82d5e190 r ddc_data_regs_dcn +ffffffff82d5e300 r ddc_clk_regs_dcn +ffffffff82d5e470 r ddc_shift +ffffffff82d5e560 r ddc_mask +ffffffff82d5e650 r generic_regs +ffffffff82d5e6c0 r generic_shift +ffffffff82d5e6d0 r generic_mask +ffffffff82d5f000 r funcs +ffffffff82d60000 r funcs +ffffffff82d60050 r hpd_regs +ffffffff82d60168 r hpd_shift +ffffffff82d60178 r hpd_mask +ffffffff82d60190 r ddc_data_regs_dcn +ffffffff82d60340 r ddc_clk_regs_dcn +ffffffff82d604f0 r ddc_shift +ffffffff82d60610 r ddc_mask +ffffffff82d60730 r generic_regs +ffffffff82d607a0 r generic_shift +ffffffff82d607b0 r generic_mask +ffffffff82d61000 r funcs +ffffffff82d62000 r funcs +ffffffff82d63000 r funcs +ffffffff82d64000 r funcs +ffffffff82d65000 r hdmi_14_protection +ffffffff82d65010 r dp_11_protection +ffffffff82d65020 r hdcp_i2c_offsets +ffffffff82d65050 r hdcp_dpcd_addrs +ffffffff82d66000 r irq_service_funcs_dce110 ffffffff82d66008 r dummy_irq_info_funcs ffffffff82d66018 r hpd_irq_info_funcs ffffffff82d66028 r hpd_rx_irq_info_funcs ffffffff82d66038 r pflip_irq_info_funcs -ffffffff82d66048 r vupdate_no_lock_irq_info_funcs +ffffffff82d66048 r vupdate_irq_info_funcs ffffffff82d66058 r vblank_irq_info_funcs -ffffffff82d66068 r vline0_irq_info_funcs -ffffffff82d66080 r irq_source_info_dcn10 -ffffffff82d68000 r irq_service_funcs_dcn20 +ffffffff82d66070 r irq_source_info_dce110 +ffffffff82d68000 r irq_service_funcs_dce120 ffffffff82d68008 r dummy_irq_info_funcs ffffffff82d68018 r hpd_irq_info_funcs ffffffff82d68028 r hpd_rx_irq_info_funcs ffffffff82d68038 r pflip_irq_info_funcs -ffffffff82d68048 r vupdate_no_lock_irq_info_funcs +ffffffff82d68048 r vupdate_irq_info_funcs ffffffff82d68058 r vblank_irq_info_funcs -ffffffff82d68068 r vline0_irq_info_funcs -ffffffff82d68080 r irq_source_info_dcn20 -ffffffff82d6a000 r irq_service_funcs_dcn201 +ffffffff82d68070 r irq_source_info_dce120 +ffffffff82d6a000 r irq_service_funcs_dce80 ffffffff82d6a008 r dummy_irq_info_funcs ffffffff82d6a018 r hpd_irq_info_funcs ffffffff82d6a028 r hpd_rx_irq_info_funcs ffffffff82d6a038 r pflip_irq_info_funcs -ffffffff82d6a048 r vupdate_no_lock_irq_info_funcs +ffffffff82d6a048 r vupdate_irq_info_funcs ffffffff82d6a058 r vblank_irq_info_funcs -ffffffff82d6a068 r vline0_irq_info_funcs -ffffffff82d6a080 r irq_source_info_dcn201 -ffffffff82d6c000 r irq_source_info_dcn21 -ffffffff82d6d290 r irq_service_funcs_dcn21 -ffffffff82d6d298 r dummy_irq_info_funcs -ffffffff82d6d2a8 r hpd_irq_info_funcs -ffffffff82d6d2b8 r hpd_rx_irq_info_funcs -ffffffff82d6d2c8 r pflip_irq_info_funcs -ffffffff82d6d2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d6d2e8 r vblank_irq_info_funcs -ffffffff82d6d2f8 r vline0_irq_info_funcs -ffffffff82d6d308 r dmub_outbox_irq_info_funcs -ffffffff82d6e000 r irq_source_info_dcn30 -ffffffff82d6f290 r irq_service_funcs_dcn30 -ffffffff82d6f298 r dummy_irq_info_funcs -ffffffff82d6f2a8 r hpd_irq_info_funcs -ffffffff82d6f2b8 r hpd_rx_irq_info_funcs -ffffffff82d6f2c8 r pflip_irq_info_funcs -ffffffff82d6f2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d6f2e8 r vblank_irq_info_funcs -ffffffff82d6f2f8 r vline0_irq_info_funcs -ffffffff82d6f308 r dmub_trace_irq_info_funcs -ffffffff82d70000 r irq_source_info_dcn302 -ffffffff82d71290 r irq_service_funcs_dcn302 -ffffffff82d71298 r dummy_irq_info_funcs -ffffffff82d712a8 r hpd_irq_info_funcs -ffffffff82d712b8 r hpd_rx_irq_info_funcs -ffffffff82d712c8 r pflip_irq_info_funcs -ffffffff82d712d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d712e8 r vblank_irq_info_funcs -ffffffff82d712f8 r vline0_irq_info_funcs -ffffffff82d71308 r dmub_trace_irq_info_funcs -ffffffff82d72000 r irq_service_funcs_dcn303 -ffffffff82d72008 r dummy_irq_info_funcs -ffffffff82d72018 r hpd_irq_info_funcs -ffffffff82d72028 r hpd_rx_irq_info_funcs -ffffffff82d72038 r pflip_irq_info_funcs -ffffffff82d72048 r vupdate_no_lock_irq_info_funcs -ffffffff82d72058 r vblank_irq_info_funcs -ffffffff82d72068 r vline0_irq_info_funcs -ffffffff82d72080 r irq_source_info_dcn303 -ffffffff82d74000 r irq_source_info_dcn31 -ffffffff82d75290 r irq_service_funcs_dcn31 +ffffffff82d6a070 r irq_source_info_dce80 +ffffffff82d6c000 r irq_service_funcs_dcn10 +ffffffff82d6c008 r dummy_irq_info_funcs +ffffffff82d6c018 r hpd_irq_info_funcs +ffffffff82d6c028 r hpd_rx_irq_info_funcs +ffffffff82d6c038 r pflip_irq_info_funcs +ffffffff82d6c048 r vupdate_no_lock_irq_info_funcs +ffffffff82d6c058 r vblank_irq_info_funcs +ffffffff82d6c068 r vline0_irq_info_funcs +ffffffff82d6c080 r irq_source_info_dcn10 +ffffffff82d6e000 r irq_service_funcs_dcn20 +ffffffff82d6e008 r dummy_irq_info_funcs +ffffffff82d6e018 r hpd_irq_info_funcs +ffffffff82d6e028 r hpd_rx_irq_info_funcs +ffffffff82d6e038 r pflip_irq_info_funcs +ffffffff82d6e048 r vupdate_no_lock_irq_info_funcs +ffffffff82d6e058 r vblank_irq_info_funcs +ffffffff82d6e068 r vline0_irq_info_funcs +ffffffff82d6e080 r irq_source_info_dcn20 +ffffffff82d70000 r irq_service_funcs_dcn201 +ffffffff82d70008 r dummy_irq_info_funcs +ffffffff82d70018 r hpd_irq_info_funcs +ffffffff82d70028 r hpd_rx_irq_info_funcs +ffffffff82d70038 r pflip_irq_info_funcs +ffffffff82d70048 r vupdate_no_lock_irq_info_funcs +ffffffff82d70058 r vblank_irq_info_funcs +ffffffff82d70068 r vline0_irq_info_funcs +ffffffff82d70080 r irq_source_info_dcn201 +ffffffff82d72000 r irq_source_info_dcn21 +ffffffff82d73290 r irq_service_funcs_dcn21 +ffffffff82d73298 r dummy_irq_info_funcs +ffffffff82d732a8 r hpd_irq_info_funcs +ffffffff82d732b8 r hpd_rx_irq_info_funcs +ffffffff82d732c8 r pflip_irq_info_funcs +ffffffff82d732d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d732e8 r vblank_irq_info_funcs +ffffffff82d732f8 r vline0_irq_info_funcs +ffffffff82d73308 r dmub_outbox_irq_info_funcs +ffffffff82d74000 r irq_source_info_dcn30 +ffffffff82d75290 r irq_service_funcs_dcn30 ffffffff82d75298 r dummy_irq_info_funcs ffffffff82d752a8 r hpd_irq_info_funcs ffffffff82d752b8 r hpd_rx_irq_info_funcs @@ -48621,9 +48630,9 @@ ffffffff82d752c8 r pflip_irq_info_funcs ffffffff82d752d8 r vupdate_no_lock_irq_info_funcs ffffffff82d752e8 r vblank_irq_info_funcs ffffffff82d752f8 r vline0_irq_info_funcs -ffffffff82d75308 r outbox_irq_info_funcs -ffffffff82d76000 r irq_source_info_dcn314 -ffffffff82d77290 r irq_service_funcs_dcn314 +ffffffff82d75308 r dmub_trace_irq_info_funcs +ffffffff82d76000 r irq_source_info_dcn302 +ffffffff82d77290 r irq_service_funcs_dcn302 ffffffff82d77298 r dummy_irq_info_funcs ffffffff82d772a8 r hpd_irq_info_funcs ffffffff82d772b8 r hpd_rx_irq_info_funcs @@ -48631,19 +48640,18 @@ ffffffff82d772c8 r pflip_irq_info_funcs ffffffff82d772d8 r vupdate_no_lock_irq_info_funcs ffffffff82d772e8 r vblank_irq_info_funcs ffffffff82d772f8 r vline0_irq_info_funcs -ffffffff82d77308 r outbox_irq_info_funcs -ffffffff82d78000 r irq_source_info_dcn315 -ffffffff82d79290 r irq_service_funcs_dcn315 -ffffffff82d79298 r dummy_irq_info_funcs -ffffffff82d792a8 r hpd_irq_info_funcs -ffffffff82d792b8 r hpd_rx_irq_info_funcs -ffffffff82d792c8 r pflip_irq_info_funcs -ffffffff82d792d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d792e8 r vblank_irq_info_funcs -ffffffff82d792f8 r vline0_irq_info_funcs -ffffffff82d79308 r outbox_irq_info_funcs -ffffffff82d7a000 r irq_source_info_dcn32 -ffffffff82d7b290 r irq_service_funcs_dcn32 +ffffffff82d77308 r dmub_trace_irq_info_funcs +ffffffff82d78000 r irq_service_funcs_dcn303 +ffffffff82d78008 r dummy_irq_info_funcs +ffffffff82d78018 r hpd_irq_info_funcs +ffffffff82d78028 r hpd_rx_irq_info_funcs +ffffffff82d78038 r pflip_irq_info_funcs +ffffffff82d78048 r vupdate_no_lock_irq_info_funcs +ffffffff82d78058 r vblank_irq_info_funcs +ffffffff82d78068 r vline0_irq_info_funcs +ffffffff82d78080 r irq_source_info_dcn303 +ffffffff82d7a000 r irq_source_info_dcn31 +ffffffff82d7b290 r irq_service_funcs_dcn31 ffffffff82d7b298 r dummy_irq_info_funcs ffffffff82d7b2a8 r hpd_irq_info_funcs ffffffff82d7b2b8 r hpd_rx_irq_info_funcs @@ -48652,8927 +48660,8929 @@ ffffffff82d7b2d8 r vupdate_no_lock_irq_info_funcs ffffffff82d7b2e8 r vblank_irq_info_funcs ffffffff82d7b2f8 r vline0_irq_info_funcs ffffffff82d7b308 r outbox_irq_info_funcs -ffffffff82d7d000 r dio_link_hwss -ffffffff82d7e000 r dio_fixed_vs_pe_retimer_link_hwss -ffffffff82d7f000 r dpia_link_hwss -ffffffff82d80000 r hpo_dp_link_hwss -ffffffff82d81000 r hpo_fixed_vs_pe_retimer_dp_link_hwss -ffffffff82d82000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82d83000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82d83006 r DP_DVI_CONVERTER_ID_4 -ffffffff82d8300d r DP_DVI_CONVERTER_ID_5 -ffffffff82d84000 r dp_lt_fallbacks -ffffffff82d88000 r mandatory_dpcd_partitions -ffffffff82d89000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82d89007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82d8a000 r virtual_lnk_enc_funcs -ffffffff82d8b000 r virtual_link_hwss -ffffffff82d8c000 r virtual_str_enc_funcs -ffffffff82d8d000 R dmub_srv_dcn20_regs -ffffffff82d8e000 R dmub_srv_dcn21_regs -ffffffff82d8f000 R dmub_srv_dcn30_regs -ffffffff82d90000 R dmub_srv_dcn301_regs -ffffffff82d91000 R dmub_srv_dcn302_regs -ffffffff82d92000 R dmub_srv_dcn303_regs -ffffffff82d93000 R dmub_srv_dcn31_regs -ffffffff82d94000 R dmub_srv_dcn314_regs -ffffffff82d95000 R dmub_srv_dcn315_regs -ffffffff82d96000 R dmub_srv_dcn316_regs -ffffffff82d97000 R dmub_srv_dcn32_regs -ffffffff82d98000 r numerator01 -ffffffff82d98020 r numerator02 -ffffffff82d98040 r numerator04 -ffffffff82d98060 r numerator05 -ffffffff82d9c000 r abm_settings -ffffffff82d9c020 r abm_settings_config0 -ffffffff82d9c060 r abm_settings_config1 -ffffffff82d9c0a0 r abm_settings_config2 -ffffffff82d9c0d8 r min_reduction_table_v_2_2 -ffffffff82d9c0e5 r max_reduction_table_v_2_2 -ffffffff82d9c0f2 r min_reduction_table -ffffffff82d9c0ff r max_reduction_table -ffffffff82d9c110 r custom_backlight_curve0 -ffffffff82d9d000 R amdgpu_pp_profile_name -ffffffff82d9e000 r pp_lib_thermal_controller_names -ffffffff82d9f000 r pp_ip_funcs -ffffffff82d9f0a8 R pp_smu_ip_block -ffffffff82d9f0c0 r pp_dpm_funcs -ffffffff82da0000 r gpio_tbl -ffffffff82da00f0 r enable_fb_req_rej_tbl -ffffffff82da0140 r use_bclk_tbl -ffffffff82da0310 r turn_off_plls_tbl -ffffffff82da0640 r enter_baco_tbl -ffffffff82da0730 r exit_baco_tbl -ffffffff82da0850 r clean_baco_tbl -ffffffff82da1000 r gpio_tbl -ffffffff82da10f0 r enable_fb_req_rej_tbl -ffffffff82da1140 r use_bclk_tbl -ffffffff82da12e0 r turn_off_plls_tbl -ffffffff82da1370 r clk_req_b_tbl -ffffffff82da1490 r enter_baco_tbl -ffffffff82da15b0 r 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delay_func -ffffffff832d6060 D initclock_func -ffffffff832d6068 D startclock_func -ffffffff832d6070 D bootinfo_size -ffffffff832d6074 D waittime -ffffffff832d6078 D dumpmag -ffffffff832d7000 D tsc_rdtsc -ffffffff832d7008 D tsc_timecounter -ffffffff832d7058 D tsc_is_synchronized -ffffffff832d8000 D local_apic -ffffffff832d8020 D lapic_id -ffffffff832d8080 D lapic_tpr -ffffffff832d80a0 d lapic_ppr -ffffffff832d8100 d lapic_isr -ffffffff832d9000 D warn_once -ffffffff832da000 d errata -ffffffff832db000 D cpu_ucode_mtx -ffffffff832dc000 D mem_owner_bios -ffffffff832dc008 D mrops -ffffffff832dc028 D mtrrmask -ffffffff832dc030 D mtrrtomrt -ffffffff832dd000 D pmap_pg_wc -ffffffff832dd008 D pmaps_lock -ffffffff832dd018 d pmap_maxkvaddr -ffffffff832de000 D kv_physwait -ffffffff832df000 D fpu_save_len -ffffffff832e0000 D i8259_pic -ffffffff832e1000 D softintr_pic -ffffffff832e2000 D ipifunc -ffffffff832e3000 D setperf_mp_mutex -ffffffff832e4000 D db_Grp6 -ffffffff832e4040 D db_Grp7 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dio_fixed_vs_pe_retimer_link_hwss +ffffffff82d85000 r dpia_link_hwss +ffffffff82d86000 r hpo_dp_link_hwss +ffffffff82d87000 r hpo_fixed_vs_pe_retimer_dp_link_hwss +ffffffff82d88000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82d89000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82d89006 r DP_DVI_CONVERTER_ID_4 +ffffffff82d8900d r DP_DVI_CONVERTER_ID_5 +ffffffff82d8a000 r dp_lt_fallbacks +ffffffff82d8e000 r mandatory_dpcd_partitions +ffffffff82d8f000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82d8f007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82d90000 r virtual_lnk_enc_funcs +ffffffff82d91000 r virtual_link_hwss +ffffffff82d92000 r virtual_str_enc_funcs +ffffffff82d93000 R dmub_srv_dcn20_regs +ffffffff82d94000 R dmub_srv_dcn21_regs +ffffffff82d95000 R dmub_srv_dcn30_regs +ffffffff82d96000 R dmub_srv_dcn301_regs +ffffffff82d97000 R dmub_srv_dcn302_regs +ffffffff82d98000 R dmub_srv_dcn303_regs +ffffffff82d99000 R dmub_srv_dcn31_regs +ffffffff82d9a000 R dmub_srv_dcn314_regs +ffffffff82d9b000 R dmub_srv_dcn315_regs +ffffffff82d9c000 R dmub_srv_dcn316_regs +ffffffff82d9d000 R dmub_srv_dcn32_regs +ffffffff82d9e000 r numerator01 +ffffffff82d9e020 r numerator02 +ffffffff82d9e040 r numerator04 +ffffffff82d9e060 r numerator05 +ffffffff82da2000 r abm_settings +ffffffff82da2020 r abm_settings_config0 +ffffffff82da2060 r abm_settings_config1 +ffffffff82da20a0 r abm_settings_config2 +ffffffff82da20d8 r min_reduction_table_v_2_2 +ffffffff82da20e5 r max_reduction_table_v_2_2 +ffffffff82da20f2 r min_reduction_table +ffffffff82da20ff r max_reduction_table +ffffffff82da2110 r custom_backlight_curve0 +ffffffff82da3000 R amdgpu_pp_profile_name +ffffffff82da4000 r pp_lib_thermal_controller_names +ffffffff82da5000 r pp_ip_funcs +ffffffff82da50a8 R pp_smu_ip_block +ffffffff82da50c0 r pp_dpm_funcs +ffffffff82da6000 r gpio_tbl +ffffffff82da60f0 r enable_fb_req_rej_tbl +ffffffff82da6140 r use_bclk_tbl +ffffffff82da6310 r turn_off_plls_tbl +ffffffff82da6640 r enter_baco_tbl +ffffffff82da6730 r exit_baco_tbl +ffffffff82da6850 r clean_baco_tbl +ffffffff82da7000 r gpio_tbl +ffffffff82da70f0 r enable_fb_req_rej_tbl +ffffffff82da7140 r use_bclk_tbl +ffffffff82da72e0 r turn_off_plls_tbl +ffffffff82da7370 r clk_req_b_tbl +ffffffff82da7490 r enter_baco_tbl +ffffffff82da75b0 r exit_baco_tbl +ffffffff82da76d0 r clean_baco_tbl +ffffffff82da8000 r gpio_tbl +ffffffff82da80f0 r enable_fb_req_rej_tbl +ffffffff82da8140 r use_bclk_tbl_vg +ffffffff82da8200 r turn_off_plls_tbl_vg +ffffffff82da8350 r use_bclk_tbl +ffffffff82da8440 r turn_off_plls_tbl +ffffffff82da85f0 r clk_req_b_tbl +ffffffff82da8710 r enter_baco_tbl +ffffffff82da8830 r exit_baco_tbl +ffffffff82da8950 r clean_baco_tbl +ffffffff82da9000 r vega10_fuses_default +ffffffff82db8000 r pp_r600_encode_lanes +ffffffff82db9000 R pptable_v1_0_funcs +ffffffff82dba000 R pptable_funcs +ffffffff82dba020 r soft_dummy_pp_table +ffffffff82dbb000 r smu10_hwmgr_funcs +ffffffff82dbc000 r smu7_hwmgr_funcs +ffffffff82dbc2f8 r smu7_irq_funcs +ffffffff82dbc310 r SMU7ThermalPolicy +ffffffff82dbd000 r GCCACConfig_Polaris10 +ffffffff82dbd1b0 r DIDTConfig_Polaris10 +ffffffff82dbda50 r GCCACConfig_Polaris11 +ffffffff82dbdc00 r DIDTConfig_Polaris11_Kicker +ffffffff82dbe4a0 r DIDTConfig_Polaris11 +ffffffff82dbed40 r DIDTConfig_Polaris12 +ffffffff82dbf5e0 r GCCACConfig_VegaM +ffffffff82dbf790 r DIDTConfig_VegaM +ffffffff82dc1000 r smu8_hwmgr_funcs +ffffffff82dc12f0 r SMU7ThermalPolicy +ffffffff82dc2000 r smu9_irq_funcs +ffffffff82dc3000 r gpio_tbl_iceland +ffffffff82dc3060 r gpio_tbl +ffffffff82dc3150 r enable_fb_req_rej_tbl +ffffffff82dc31a0 r use_bclk_tbl +ffffffff82dc3370 r turn_off_plls_tbl +ffffffff82dc3610 r enter_baco_tbl +ffffffff82dc3730 r exit_baco_tbl_iceland +ffffffff82dc3870 r clean_baco_tbl_iceland +ffffffff82dc3890 r exit_baco_tbl +ffffffff82dc39b0 r clean_baco_tbl +ffffffff82dc4000 r pre_baco_tbl +ffffffff82dc4090 r enter_baco_tbl +ffffffff82dc42b0 r exit_baco_tbl +ffffffff82dc4520 r clean_baco_tbl +ffffffff82dc5000 r vega10_hwmgr_funcs +ffffffff82dc52f0 r channel_number +ffffffff82dc5320 r SMU7ThermalWithDelayPolicy +ffffffff82dc6000 r SEDiDtStallCtrlConfig_vega10 +ffffffff82dc6110 r SEDiDtStallPatternConfig_vega10 +ffffffff82dc62e0 r SEDiDtWeightConfig_Vega10 +ffffffff82dc63b0 r SEDiDtCtrl1Config_Vega10 +ffffffff82dc6440 r SEDiDtCtrl2Config_Vega10 +ffffffff82dc6510 r SEDiDtCtrl3Config_vega10 +ffffffff82dc6820 r SEDiDtTuningCtrlConfig_Vega10 +ffffffff82dc68b0 r SELCacConfig_Vega10 +ffffffff82dc6a40 r SEDiDtCtrl0Config_Vega10 +ffffffff82dc6d10 r AvfsPSMInitConfig_vega10 +ffffffff82dc6d90 r SEEDCStallPatternConfig_Vega10 +ffffffff82dc6ea0 r SEEDCStallDelayConfig_Vega10 +ffffffff82dc6f80 r SEEDCCtrlConfig_Vega10 +ffffffff82dc7040 r PSMSEEDCStallPatternConfig_Vega10 +ffffffff82dc70c0 r PSMSEEDCStallDelayConfig_Vega10 +ffffffff82dc71d0 r PSMSEEDCCtrlResetConfig_Vega10 +ffffffff82dc7290 r PSMSEEDCCtrlConfig_Vega10 +ffffffff82dc7350 r SEEDCForceStallPatternConfig_Vega10 +ffffffff82dc73e0 r SEEDCCtrlForceStallConfig_Vega10 +ffffffff82dc8000 R vega10_pptable_funcs +ffffffff82dc9000 r pre_baco_tbl +ffffffff82dc9090 r enter_baco_tbl +ffffffff82dc92b0 r exit_baco_tbl +ffffffff82dc9520 r clean_baco_tbl +ffffffff82dca000 r vega12_hwmgr_funcs +ffffffff82dca2f0 r SMU7ThermalWithDelayPolicy +ffffffff82dca340 r link_width +ffffffff82dcb000 R vega12_pptable_funcs +ffffffff82dcc000 r clean_baco_tbl +ffffffff82dcd000 r vega20_hwmgr_funcs +ffffffff82dcd2f0 r SMU7ThermalWithDelayPolicy +ffffffff82dcd340 r link_width +ffffffff82dce000 R vega20_pptable_funcs +ffffffff82dcf000 R ci_smu_funcs +ffffffff82dcf0e0 r defaults_hawaii_pro +ffffffff82dcf12c r defaults_hawaii_xt +ffffffff82dcf178 r defaults_saturn_xt +ffffffff82dcf1c4 r defaults_bonaire_xt +ffffffff82dcf210 r ci_program_jump_on_start.data +ffffffff82dd0000 R fiji_smu_funcs +ffffffff82dd00e0 r avfs_graphics_level +ffffffff82dd0240 r fiji_power_tune_data_set_array +ffffffff82dd0246 r fiji_clock_stretch_amount_conversion +ffffffff82dd0260 r fiji_clock_stretcher_ddt_table +ffffffff82dd1000 R iceland_smu_funcs +ffffffff82dd10e0 r defaults_icelandxt +ffffffff82dd112c r defaults_icelandpro +ffffffff82dd1178 r defaults_iceland +ffffffff82dd2000 R polaris10_smu_funcs +ffffffff82dd20e0 r avfs_graphics_level_polaris10 +ffffffff82dd22a0 r avfs_memory_level_polaris10 +ffffffff82dd22c0 r polaris10_power_tune_data_set_array +ffffffff82dd2310 r Range_Table +ffffffff82dd3000 R smu10_smu_funcs +ffffffff82dd4000 r smu7_program_jump_on_start.data +ffffffff82dd4010 r pwr_virus_table_pre +ffffffff82dd4680 r pwr_virus_table_post +ffffffff82dd4f80 r pwr_virus_section1 +ffffffff82dd5610 r pwr_virus_section2 +ffffffff82dd5660 r pwr_virus_section3 +ffffffff82ddcab0 r pwr_virus_section4 +ffffffff82ddce80 r pwr_virus_section5 +ffffffff82ddd490 r pwr_virus_section6 +ffffffff82ddf000 R smu8_smu_funcs +ffffffff82de0000 R tonga_smu_funcs +ffffffff82de00e0 r tonga_power_tune_data_set_array +ffffffff82de012c r tonga_clock_stretch_amount_conversion +ffffffff82de0140 r tonga_clock_stretcher_ddt_table +ffffffff82de1000 R vega10_smu_funcs +ffffffff82de2000 R vega12_smu_funcs +ffffffff82de3000 R vega20_smu_funcs +ffffffff82de4000 R vegam_smu_funcs +ffffffff82de40e0 r vegam_power_tune_data_set_array +ffffffff82de4130 r Range_Table +ffffffff82de5000 R smu_ip_funcs +ffffffff82de50a8 R smu_v11_0_ip_block +ffffffff82de50c0 R smu_v12_0_ip_block +ffffffff82de50d8 R smu_v13_0_ip_block +ffffffff82de50f0 r swsmu_pm_funcs +ffffffff82de6000 r arcturus_ppt_funcs +ffffffff82de63f0 r arcturus_table_map +ffffffff82de6470 r arcturus_pwr_src_map +ffffffff82de6480 r arcturus_workload_map +ffffffff82de64d0 r smu11_thermal_policy +ffffffff82de6528 r arcturus_i2c_algo +ffffffff82de6538 r arcturus_i2c_control_quirks +ffffffff82de6550 r arcturus_throttler_map +ffffffff82de6570 r arcturus_message_map +ffffffff82de6ff0 r arcturus_clk_map +ffffffff82de70b0 r arcturus_feature_mask_map +ffffffff82de8000 r cyan_skillfish_ppt_funcs +ffffffff82de9000 r navi10_ppt_funcs +ffffffff82de93f0 r smu11_thermal_policy +ffffffff82de9448 r navi10_i2c_algo +ffffffff82de9458 r navi10_i2c_control_quirks +ffffffff82de9470 r navi1x_throttler_map +ffffffff82de9490 r NoDbiPrbs7 +ffffffff82dea490 r DbiPrbs7 +ffffffff82dec000 r sienna_cichlid_ppt_funcs +ffffffff82dec3f0 r smu11_thermal_policy +ffffffff82dec448 r sienna_cichlid_i2c_algo +ffffffff82dec458 r sienna_cichlid_i2c_control_quirks +ffffffff82dec470 r sienna_cichlid_throttler_map +ffffffff82ded000 r smu_v11_0_irq_funcs +ffffffff82ded010 r link_width +ffffffff82dee000 r vangogh_ppt_funcs +ffffffff82dee3e8 r vangogh_throttler_map +ffffffff82def000 r renoir_ppt_funcs +ffffffff82def3e8 r renoir_throttler_map +ffffffff82df0000 r aldebaran_ppt_funcs +ffffffff82df03f0 r aldebaran_clk_map +ffffffff82df04b0 r aldebaran_table_map +ffffffff82df0530 r smu13_thermal_policy +ffffffff82df0588 r aldebaran_i2c_algo +ffffffff82df0598 r aldebaran_i2c_control_quirks +ffffffff82df05b0 r aldebaran_throttler_map +ffffffff82df05d0 r aldebaran_message_map +ffffffff82df1050 r aldebaran_feature_mask_map +ffffffff82df2000 R pmfw_decoded_link_speed +ffffffff82df2020 R pmfw_decoded_link_width +ffffffff82df2040 r smu_v13_0_irq_funcs +ffffffff82df3000 r smu_v13_0_0_ppt_funcs +ffffffff82df33f0 r smu13_thermal_policy +ffffffff82df3448 r smu_v13_0_0_i2c_algo +ffffffff82df3458 r smu_v13_0_0_i2c_control_quirks +ffffffff82df3470 r smu_v13_0_0_throttler_map +ffffffff82df4000 r smu_v13_0_4_ppt_funcs +ffffffff82df5000 r smu_v13_0_5_ppt_funcs +ffffffff82df6000 r smu_v13_0_6_ppt_funcs +ffffffff82df63f0 r smu_v13_0_6_message_map +ffffffff82df6e70 r smu_v13_0_6_clk_map +ffffffff82df6f30 r smu_v13_0_6_table_map +ffffffff82df6fb0 r smu_v13_0_6_i2c_algo +ffffffff82df6fc0 r smu_v13_0_6_i2c_control_quirks +ffffffff82df6fd0 r smu_v13_0_6_irq_funcs +ffffffff82df6fe0 r smu_v13_0_6_throttler_map +ffffffff82df6ff0 r smu_v13_0_6_feature_mask_map +ffffffff82df8000 r smu_v13_0_7_ppt_funcs +ffffffff82df83f0 r smu13_thermal_policy +ffffffff82df8450 r smu_v13_0_7_throttler_map +ffffffff82df9000 r yellow_carp_ppt_funcs +ffffffff82dfa000 R link_speed +ffffffff82dfa020 r __smu_message_names +ffffffff82dfb000 R pchb_ca +ffffffff82dfc000 R amas_ca +ffffffff82dfc028 R amas_devices +ffffffff82dfc040 r amas_feature +ffffffff82dfd000 R cardslot_ca +ffffffff82dfe000 R cardbus_ca +ffffffff82dff000 R com_cardbus_ca +ffffffff82e00000 R xl_cardbus_ca +ffffffff82e00030 R xl_cardbus_products +ffffffff82e01000 R dc_cardbus_ca +ffffffff82e01030 R dc_cardbus_devices +ffffffff82e02000 R fxp_cardbus_ca +ffffffff82e02028 R fxp_cardbus_devices +ffffffff82e03000 R rl_cardbus_devices +ffffffff82e03028 R rl_cardbus_ca +ffffffff82e04000 R re_cardbus_ca +ffffffff82e04028 R re_cardbus_devices +ffffffff82e05000 R ath_cardbus_ca +ffffffff82e06000 R athn_cardbus_ca +ffffffff82e06030 r athn_cardbus_devices +ffffffff82e07000 R atw_cardbus_ca +ffffffff82e07028 R atw_cardbus_devices +ffffffff82e08000 R rtw_cardbus_ca +ffffffff82e08028 R rtw_cardbus_devices +ffffffff82e09000 R ral_cardbus_ca +ffffffff82e09030 r ral_cardbus_devices +ffffffff82e0a000 R acx_cardbus_ca +ffffffff82e0a028 r acx_cardbus_devices +ffffffff82e0b000 R pgt_cardbus_ca +ffffffff82e0b028 R pgt_cardbus_devices +ffffffff82e0c000 R ehci_cardbus_ca +ffffffff82e0d000 R ohci_cardbus_ca +ffffffff82e0e000 R uhci_cardbus_ca +ffffffff82e0f000 R malo_cardbus_ca +ffffffff82e0f028 r malo_cardbus_devices +ffffffff82e10000 R bwi_cardbus_ca +ffffffff82e10030 r bwi_cardbus_devices +ffffffff82e11000 R pcmcia_ca +ffffffff82e12000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82e13000 r pcmcia_cis_quirks +ffffffff82e14000 R ep_pcmcia_ca +ffffffff82e15000 R ne_pcmcia_ca +ffffffff82e15030 R ne2000devs +ffffffff82e17000 R aic_pcmcia_ca +ffffffff82e18000 R com_pcmcia_ca +ffffffff82e19000 R wdc_pcmcia_ca +ffffffff82e1a000 R sm_pcmcia_ca +ffffffff82e1b000 R xe_pcmcia_ca +ffffffff82e1c000 R wi_pcmcia_ca +ffffffff82e1c030 r wi_pcmcia_products +ffffffff82e1d000 R malo_pcmcia_ca +ffffffff82e1e000 R an_pcmcia_ca +ffffffff82e1f000 R pcib_ca +ffffffff82e20000 R amdpcib_ca +ffffffff82e20028 R amdpcib_devices +ffffffff82e21000 R tcpcib_ca +ffffffff82e21028 R tcpcib_devices +ffffffff82e22000 R aapic_ca +ffffffff82e23000 R hme_pci_ca +ffffffff82e23028 r hme_promhdr +ffffffff82e2302a r hme_promdat +ffffffff82e24000 R isa_ca +ffffffff82e25000 R isadma_ca +ffffffff82e26000 R fdc_ca +ffffffff82e27000 R fd_ca +ffffffff82e28000 R com_isa_ca +ffffffff82e29000 R pckbc_isa_ca +ffffffff82e2a000 R vga_isa_ca +ffffffff82e2b000 R wdc_isa_ca +ffffffff82e2c000 R mpu_midi_hw_if +ffffffff82e2d000 R mpu_isa_ca +ffffffff82e2e000 R pcppi_ca +ffffffff82e2f000 R spkr_ca +ffffffff82e2f030 r pitchtab +ffffffff82e30000 R lpt_isa_ca +ffffffff82e31000 R wbsio_ca +ffffffff82e32000 R schsio_ca +ffffffff82e33000 R lm_isa_ca +ffffffff82e33028 R lm_wbsio_ca +ffffffff82e34000 R it_sensors +ffffffff82e34110 R it_vrfact +ffffffff82e34140 R it_fan_regs +ffffffff82e34160 R it_fan_ext_regs +ffffffff82e34178 R it_ca +ffffffff82e35000 R abitkv_sensors +ffffffff82e35200 R abitaa_sensors +ffffffff82e35480 R abitav_sensors +ffffffff82e35700 R abitas_sensors +ffffffff82e35980 R abitax_sensors +ffffffff82e35bc0 R abitm4_sensors +ffffffff82e35e80 R abitan_sensors +ffffffff82e36120 R abital_sensors +ffffffff82e363a0 R abitaw_sensors +ffffffff82e36700 R abitni_sensors +ffffffff82e369a0 R abitat_sensors +ffffffff82e36cc0 R abitan2_sensors +ffffffff82e36f60 R abitab_sensors +ffffffff82e37220 R abitan3_sensors +ffffffff82e37500 R abitaw2_sensors +ffffffff82e37860 R abitat2_sensors +ffffffff82e37b60 R abitab2_sensors +ffffffff82e37ea0 R abitin_sensors +ffffffff82e381e0 R uguru_ca +ffffffff82e39000 R aps_ca +ffffffff82e3a000 R wsdisplay_emul_ca +ffffffff82e3a030 r charClass +ffffffff82e3b000 r usl_syncops +ffffffff82e3c000 R wsevent_filtops +ffffffff82e3d000 R wskbd_ca +ffffffff82e3e000 r latin1_to_upper +ffffffff82e3f000 R wsmouse_ca +ffffffff82e40000 R cyrillic_to_koi8 +ffffffff82e40060 R unicode_to_latin2 +ffffffff82e400e0 R unicode_to_latin7 +ffffffff82e41000 R wsemul_vt100_ops +ffffffff82e42000 r decspcgr2uni +ffffffff82e42100 r dectech2uni +ffffffff82e42200 r nrctable +ffffffff82e43000 r vt100_fkeys +ffffffff82e430c0 r vt100_pfkeys +ffffffff82e430e0 r vt100_numpad +ffffffff82e44000 R pckbd_ca +ffffffff82e44028 R pckbd_accessops +ffffffff82e44040 R pckbd_consops +ffffffff82e44060 R pckbd_keymapdata +ffffffff82e44070 R pckbd_xtbl2 +ffffffff82e44100 R pckbd_xtbl2_ext +ffffffff82e45000 r pckbd_keydesc_us +ffffffff82e45250 r pckbd_keydesc_de +ffffffff82e452f0 r pckbd_keydesc_de_nodead +ffffffff82e45310 r pckbd_keydesc_fr +ffffffff82e453d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82e45510 r pckbd_keydesc_dk +ffffffff82e455a0 r pckbd_keydesc_dk_nodead +ffffffff82e455b0 r pckbd_keydesc_it +ffffffff82e45640 r pckbd_keydesc_uk +ffffffff82e456e0 r pckbd_keydesc_jp +ffffffff82e45750 r pckbd_keydesc_sv +ffffffff82e45780 r pckbd_keydesc_sv_nodead +ffffffff82e45790 r pckbd_keydesc_no +ffffffff82e457c0 r pckbd_keydesc_no_nodead +ffffffff82e457d0 r pckbd_keydesc_us_declk +ffffffff82e45860 r pckbd_keydesc_us_dvorak +ffffffff82e45900 r pckbd_keydesc_us_colemak +ffffffff82e45948 r pckbd_keydesc_swapctrlcaps +ffffffff82e45960 r pckbd_keydesc_iopener +ffffffff82e459b0 r pckbd_keydesc_es +ffffffff82e45a50 r pckbd_keydesc_be +ffffffff82e45b10 r pckbd_keydesc_ru +ffffffff82e45c80 r pckbd_keydesc_ua +ffffffff82e45e10 r pckbd_keydesc_sg +ffffffff82e45ec0 r pckbd_keydesc_sg_nodead +ffffffff82e45ee0 r pckbd_keydesc_sf +ffffffff82e45f00 r pckbd_keydesc_pt +ffffffff82e45f90 r pckbd_keydesc_lt +ffffffff82e46070 r pckbd_keydesc_la +ffffffff82e46100 r pckbd_keydesc_br +ffffffff82e46180 r pckbd_keydesc_tr +ffffffff82e46230 r pckbd_keydesc_tr_nodead +ffffffff82e46250 r pckbd_keydesc_pl +ffffffff82e462b0 r pckbd_keydesc_hu +ffffffff82e463c0 r pckbd_keydesc_si +ffffffff82e464d0 r pckbd_keydesc_cf +ffffffff82e465a0 r pckbd_keydesc_cf_nodead +ffffffff82e465c0 r pckbd_keydesc_lv +ffffffff82e46640 r pckbd_keydesc_nl +ffffffff82e46720 r pckbd_keydesc_nl_nodead +ffffffff82e46740 r pckbd_keydesc_is +ffffffff82e467cc r pckbd_keydesc_is_nodead +ffffffff82e467e0 r pckbd_keydesc_ee +ffffffff82e46890 r pckbd_keydesc_ee_nodead +ffffffff82e468b0 R pckbd_keydesctab +ffffffff82e47000 R pms_ca +ffffffff82e47028 R pms_accessops +ffffffff82e47040 R pms_sec_accessops +ffffffff82e47060 R pms_protocols +ffffffff82e471e0 r alps_models +ffffffff82e48000 R skgpio_led_offset +ffffffff82e48008 R skgpio_ca +ffffffff82e49000 R hidkbd_trtab +ffffffff82e49100 r apple_fn_trans +ffffffff82e49120 r apple_tb_trans +ffffffff82e49140 r apple_mba_trans +ffffffff82e4a000 r hidcc_attach_wskbd.accessops +ffffffff82e4a020 r hidcc_keysyms +ffffffff82e4b000 R usb_ca +ffffffff82e4c000 R usb_known_products +ffffffff82e57fb0 R usb_known_vendors +ffffffff82e5a7d0 R usbd_error_strs +ffffffff82e5b000 R usb_quirks +ffffffff82e5b390 R usb_dev_quirks +ffffffff82e5b398 R usbd_no_quirk +ffffffff82e5c000 R uhub_ca +ffffffff82e5c028 R uhub_uhub_ca +ffffffff82e5d000 R uaudio_ca +ffffffff82e5d028 R uaudio_hw_if +ffffffff82e5d0e0 R uaudio_rates +ffffffff82e5d120 r uaudio_clkname.names +ffffffff82e5d140 r uaudio_feature_addent.features +ffffffff82e5e000 R uvideo_ca +ffffffff82e5e028 R uvideo_hw_if +ffffffff82e5e100 R uvideo_devs +ffffffff82e5f000 r utvfu_select_norm.pal +ffffffff82e5f040 r utvfu_select_norm.ntsc +ffffffff82e5f080 r utvfu_setup_capture.setup +ffffffff82e5f180 r utvfu_audio_start_chip.setup +ffffffff82e5f1c8 r utvfu_audio_stop_chip.setup +ffffffff82e5f1d8 R utvfu_ca +ffffffff82e5f200 R utvfu_vid_hw_if +ffffffff82e5f2d0 R utvfu_au_hw_if +ffffffff82e60000 R udl_ca +ffffffff82e60030 r udl_devs +ffffffff82e600b0 r udl_modes +ffffffff82e61000 R umidi_hw_if +ffffffff82e61030 R umidi_ca +ffffffff82e61060 r umidi_evlen +ffffffff82e61080 r packet_length +ffffffff82e62000 r quirk_name +ffffffff82e63000 R ucom_ca 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umass_bbb_methods +ffffffff82e73040 R umass_cbi_methods +ffffffff82e74000 R umass_quirks +ffffffff82e75000 R umass_scsi_switch +ffffffff82e76000 R uthum_devs +ffffffff82e76008 R uthum_ca +ffffffff82e76030 r uthum_sensor_type_s +ffffffff82e77000 R ugold_devs +ffffffff82e77018 R ugold_ca +ffffffff82e78000 R utrh_devs +ffffffff82e78008 R utrh_ca +ffffffff82e79000 R uoakrh_devs +ffffffff82e79008 R uoakrh_ca +ffffffff82e79030 R uoakrh_methods +ffffffff82e7a000 R uoaklux_devs +ffffffff82e7a008 R uoaklux_ca +ffffffff82e7a030 R uoaklux_methods +ffffffff82e7b000 R uoakv_devs +ffffffff82e7b008 R uoakv_ca +ffffffff82e7b030 R uoakv_methods +ffffffff82e7c000 R uonerng_ca +ffffffff82e7d000 R urng_ca +ffffffff82e7d030 r urng_devs +ffffffff82e7e000 R udcf_ca +ffffffff82e7e028 r udcf_devs +ffffffff82e7f000 R umbg_ca +ffffffff82e80000 R uvisor_methods +ffffffff82e80040 R uvisor_ca +ffffffff82e80070 r uvisor_devs +ffffffff82e81000 R udsbr_hw_if +ffffffff82e81028 R udsbr_ca +ffffffff82e82000 R utwitch_devs +ffffffff82e82008 R utwitch_ca +ffffffff82e83000 R aue_devs +ffffffff82e831b0 R aue_ca +ffffffff82e84000 R axe_devs +ffffffff82e840d0 R axe_ca +ffffffff82e85000 R axen_devs +ffffffff82e85020 R axen_ca +ffffffff82e86000 R smsc_ca +ffffffff82e86030 r smsc_devs +ffffffff82e87000 R cue_ca +ffffffff82e88000 R kue_devs +ffffffff82e88088 R kue_ca +ffffffff82e89000 R cdce_devs +ffffffff82e89048 R cdce_ca +ffffffff82e8a000 R urndis_ca +ffffffff82e8a030 R urndis_class +ffffffff82e8b000 R mos_devs +ffffffff82e8b018 R mos_ca +ffffffff82e8c000 R mue_devs +ffffffff82e8c020 R mue_ca +ffffffff82e8d000 R udav_ca +ffffffff82e8d030 r udav_devs +ffffffff82e8e000 R upl_ca +ffffffff82e8f000 R ugl_ca +ffffffff82e90000 R url_ca +ffffffff82e90030 r url_devs +ffffffff82e91000 R ure_devs +ffffffff82e910e8 R ure_ca +ffffffff82e92000 R uaq_devs +ffffffff82e92018 R uaq_ca +ffffffff82e93000 R umodem_methods +ffffffff82e93040 R umodem_ca +ffffffff82e94000 R uftdi_methods +ffffffff82e94040 R uftdi_ca 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ucrcom_methods +ffffffff82e9f040 R ucrcom_ca +ffffffff82ea0000 R uxrcom_methods +ffffffff82ea0040 R uxrcom_ca +ffffffff82ea0068 r uxrcom_devs +ffffffff82ea1000 R uipaq_methods +ffffffff82ea1040 R uipaq_ca +ffffffff82ea1070 r uipaq_devs +ffffffff82ea2000 R umsm_methods +ffffffff82ea2040 R umsm_ca +ffffffff82ea2070 r umsm_devs +ffffffff82ea3000 R uchcom_methods +ffffffff82ea3040 R uchcom_ca +ffffffff82ea3070 r uchcom_devs +ffffffff82ea3080 r dividers +ffffffff82ea4000 R uticom_methods +ffffffff82ea4040 R uticom_ca +ffffffff82ea4070 r uticom_devs +ffffffff82ea5000 R wi_usb_devs +ffffffff82ea50f0 R wi_usb_ca +ffffffff82ea6000 R atu_ca +ffffffff82ea7000 R ural_ca +ffffffff82ea7030 r ural_devs +ffffffff82ea70a0 r ural_rf2522_r2 +ffffffff82ea70e0 r ural_rf2524_r2 +ffffffff82ea7120 r ural_rf2525_hi_r2 +ffffffff82ea7160 r ural_rf2525_r2 +ffffffff82ea71a0 r ural_rf2525e_r2 +ffffffff82ea71e0 r ural_rf2526_hi_r2 +ffffffff82ea7220 r ural_rf2526_r2 +ffffffff82ea7260 r ural_def_bbp +ffffffff82ea72a0 r ural_def_mac +ffffffff82ea8000 R rum_ca +ffffffff82ea8030 r rum_devs +ffffffff82ea8110 r rum_rf5225 +ffffffff82ea8460 r rum_rf5226 +ffffffff82ea87b0 r rum_def_bbp +ffffffff82ea87f0 r rum_def_mac +ffffffff82ea9000 R run_ca +ffffffff82ea9030 r run_devs +ffffffff82ea9430 r rt2860_rf2850 +ffffffff82ea9860 r rt2860_rates +ffffffff82ea9920 r rt5592_freqs_40mhz +ffffffff82ea9a60 r rt5592_freqs_20mhz +ffffffff82ea9ba0 r rt5592_2ghz_def_rf +ffffffff82ea9be0 r rt5592_chan_5ghz +ffffffff82ea9e30 r rt5592_def_bbp +ffffffff82ea9e70 r rt5592_bbp_r196 +ffffffff82ea9ed0 r rt5390_def_bbp +ffffffff82ea9f00 r rt3572_def_rf +ffffffff82ea9f40 r rt3070_def_rf +ffffffff82ea9f70 r rt3593_def_rf +ffffffff82ea9fb0 r rt5592_def_rf +ffffffff82ea9fe0 r rt5392_def_rf +ffffffff82eaa060 r rt5390_def_rf +ffffffff82eaa0e0 r rt2870_def_mac +ffffffff82eab000 R mtw_ca +ffffffff82eab030 r mtw_devs +ffffffff82eab070 r rt2860_rates +ffffffff82eab130 r mt7601_rf_chan +ffffffff82eab1a0 r mt7601_def_bbp +ffffffff82eab2d0 r mt7601_rf_bank0 +ffffffff82eab330 r mt7601_rf_bank4 +ffffffff82eab3b0 r mt7601_rf_bank5 +ffffffff82eab430 r mt7601_def_mac +ffffffff82eac000 R zyd_ca +ffffffff82eac030 r zyd_devs +ffffffff82eac1b0 r zyd_rfmd_init.phyini +ffffffff82eac2e0 r zyd_rfmd_init.rfini +ffffffff82eac330 r zyd_rfmd_set_channel.rfprog +ffffffff82eac3a0 r zyd_al2230_init.phyini +ffffffff82eac480 r zyd_al2230_init.rfini +ffffffff82eac4e0 r zyd_al2230_init_b.phyini +ffffffff82eac5d0 r zyd_al2230_init_b.rfini +ffffffff82eac620 r zyd_al2230_set_channel.rfprog +ffffffff82eac6d0 r zyd_al7230B_init.phyini_1 +ffffffff82eac7b0 r zyd_al7230B_init.rfini_1 +ffffffff82eac7f0 r zyd_al7230B_set_channel.rfprog +ffffffff82eac860 r zyd_al7230B_set_channel.rfsc +ffffffff82eac890 r zyd_al2210_init.phyini +ffffffff82eac8f0 r zyd_al2210_init.rfini +ffffffff82eac920 r zyd_al2210_set_channel.rfprog +ffffffff82eac960 r zyd_gct_init.phyini +ffffffff82eac9b0 r zyd_gct_init.rfini +ffffffff82eaca50 r zyd_gct_set_channel.rfprog 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urtw_8225_channel +ffffffff82eaf58c r urtw_8225_threshold +ffffffff82eaf5a0 r urtw_8225v2_gain_bg +ffffffff82eaf5c0 r urtw_8225v2_tx_gain_cck_ofdm +ffffffff82eaf5f0 r urtw_8225v2_rf_part1 +ffffffff82eaf670 r urtw_8225v2_rxgain +ffffffff82eaf730 r urtw_8225v2_rf_part2 +ffffffff82eaf870 r urtw_8225v2_rf_part3 +ffffffff82eaf970 r urtw_8187b_regtbl +ffffffff82eafa90 r urtw_8225v2_b_rf +ffffffff82eafb20 r urtw_8225v2_agc +ffffffff82eafba0 r urtw_8225v2_ofdm +ffffffff82eb0000 R urtwn_ca +ffffffff82eb0030 r urtwn_devs +ffffffff82eb0350 r rtl8188eu_mac +ffffffff82eb04c0 r rtl8188ftv_mac +ffffffff82eb0660 r rtl8192eu_mac +ffffffff82eb0800 r rtl8192cu_mac +ffffffff82eb0958 r rtl8188eu_bb_prog +ffffffff82eb0980 r rtl8188ftv_bb_prog +ffffffff82eb09a8 r rtl8192eu_bb_prog +ffffffff82eb09d0 r rtl8188ce_bb_prog +ffffffff82eb09f8 r rtl8188ru_bb_prog +ffffffff82eb0a20 r rtl8188cu_bb_prog +ffffffff82eb0a48 r rtl8192ce_bb_prog +ffffffff82eb0a70 r rtl8192cu_bb_prog +ffffffff82eb0aa0 r rtl8188eu_bb_regs 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ar_chans +ffffffff82eb50c0 r otus_rates +ffffffff82eb50e0 r ar5416_phy_regs +ffffffff82eb5380 r ar5416_phy_vals_2ghz_20mhz +ffffffff82eb58b0 r ar5416_phy_vals_5ghz_20mhz +ffffffff82eb5de0 r ar5416_banks_vals_5ghz +ffffffff82eb5ef0 r ar5416_banks_vals_2ghz +ffffffff82eb6000 r ar5416_banks_regs +ffffffff82eb7000 R umb_regstates +ffffffff82eb7080 R umb_dataclasses +ffffffff82eb7190 R umb_simstate +ffffffff82eb7210 R umb_messages +ffffffff82eb72b0 R umb_status +ffffffff82eb7570 R umb_cids +ffffffff82eb76e0 R umb_pktstate +ffffffff82eb7740 R umb_actstate +ffffffff82eb77a0 R umb_error +ffffffff82eb7830 R umb_pintype +ffffffff82eb7960 R umb_istate +ffffffff82eb79f0 R umb_ca +ffffffff82eb7a20 R umb_quirks +ffffffff82eb8000 R uath_ca +ffffffff82eb8030 r uath_devs +ffffffff82eb9000 R athn_usb_ca +ffffffff82eb9030 r athn_usb_devs +ffffffff82eba000 R uow_ca +ffffffff82eba028 r uow_devs +ffffffff82ebb000 R uberry_devices +ffffffff82ebb008 R uberry_ca +ffffffff82ebc000 R upd_ca +ffffffff82ebd000 R uwacom_devs +ffffffff82ebd010 R uwacom_ca +ffffffff82ebd038 R uwacom_accessops +ffffffff82ebe000 R bwfm_usb_ca +ffffffff82ebe030 r bwfm_usbdevs +ffffffff82ebf000 R umstc_ca +ffffffff82ebf028 r umstc_devs +ffffffff82ec0000 R uhidpp_ca +ffffffff82ec0028 r uhidpp_devs +ffffffff82ec1000 R ucc_ca +ffffffff82ec2000 R iic_ca +ffffffff82ec3000 r probes +ffffffff82ec4000 R lmtemp_ca +ffffffff82ec5000 R lmn_ca +ffffffff82ec6000 R lmenv_ca +ffffffff82ec7000 R maxtmp_ca +ffffffff82ec8000 R adc_ca +ffffffff82ec9000 R admtemp_ca +ffffffff82eca000 R admlc_ca +ffffffff82ecb000 R admtm_ca +ffffffff82ecc000 R admtmp_ca +ffffffff82ecd000 R admtt_ca +ffffffff82ece000 R maxds_ca +ffffffff82ecf000 R adt_ca +ffffffff82ed0000 R lm_i2c_ca +ffffffff82ed1000 R admcts_ca +ffffffff82ed2000 R wbng_ca +ffffffff82ed3000 R nvt_ca +ffffffff82ed3030 r nvt_volt_desc +ffffffff82ed4000 R adl_ca +ffffffff82ed5000 R andl_ca +ffffffff82ed5030 r andl_temp +ffffffff82ed6000 R spdmem_iic_ca +ffffffff82ed7000 R sdtemp_ca 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ac97civ +ffffffff83213000 D cy_cd +ffffffff83214000 D lpt_cd +ffffffff83215000 D lm_cd +ffffffff83216000 D ath_dwelltime +ffffffff83216004 D ath_calinterval +ffffffff83216008 D ath_outdoor +ffffffff8321600c D ath_xchanmode +ffffffff83216010 D ath_softcrypto +ffffffff83216018 D ath_cd +ffffffff83217000 D athn_cd +ffffffff83218000 D bwfm_2ghz_channels +ffffffff83218010 D bwfm_5ghz_channels +ffffffff83218030 D bwfm_proto_bcdc_ops +ffffffff83218050 D bwfm_cd +ffffffff83219000 D atw_bbp_io_enable_delay +ffffffff83219004 D atw_bbp_io_disable_delay +ffffffff83219008 D atw_writewep_delay +ffffffff8321900c D atw_beacon_len_adjust +ffffffff83219010 D atw_dwelltime +ffffffff83219018 D atw_cd +ffffffff8321a000 D rtw_dwelltime +ffffffff8321a004 D rtw_macbangbits_timeout +ffffffff8321a008 D rtw_cd +ffffffff8321b000 D ral_cd +ffffffff8321c000 D rt3090_freqs +ffffffff8321d000 D acx_beacon_intvl +ffffffff8321d008 D acx_cd +ffffffff8321e000 D pgt_cd +ffffffff8321f000 D sf_cd +ffffffff83220000 D malo_cd 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kstat_default_lock +ffffffff83235000 D pf_inp_mtx +ffffffff83235010 D pf_hdr_limit +ffffffff83235020 D pf_pool_limits +ffffffff83235090 D pf_state_list +ffffffff832350c0 D pf_purge_states_task +ffffffff832350f0 D pf_purge_states_to +ffffffff83235138 D pf_purge_states_collect +ffffffff83235140 D pf_purge_to +ffffffff83235188 D pf_purge_task +ffffffff83236000 D pf_tags +ffffffff83236010 D pf_qids +ffffffff83236020 D pf_lock +ffffffff83236030 D pf_state_lock +ffffffff83236040 D pfioctl_rw +ffffffff83236050 d pf_open_trans.ticket +ffffffff83237000 D pfi_update +ffffffff83238000 D pflog_cloner +ffffffff83239000 D pfsync_cloner +ffffffff8323a000 D pflow_cloner +ffffffff8323b000 d hotplug_mtx +ffffffff8323c000 D pppoe_cloner +ffffffff8323c030 D pppoediscinq +ffffffff8323c060 D pppoeinq +ffffffff8323d000 D dt_lock +ffffffff8323e000 D dt_prov_profile +ffffffff8323e030 D dt_prov_interval +ffffffff8323f000 D dtps_nsysent +ffffffff8323f008 D dt_prov_syscall +ffffffff83240000 D dt_prov_static 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dt_static_vmm_guest_enter +ffffffff83240a40 D dt_static_vmm_guest_exit +ffffffff83240ab0 D dt_static_vmm_inout +ffffffff83240b20 D dt_static_smr_call +ffffffff83240b90 D dt_static_smr_called +ffffffff83240c00 D dt_static_smr_barrier_enter +ffffffff83240c70 D dt_static_smr_barrier_exit +ffffffff83240ce0 D dt_static_smr_wakeup +ffffffff83240d50 D dt_static_smr_thread +ffffffff83240dc0 D dt_static_refcnt_none +ffffffff83240e30 D dt_static_refcnt_ethmulti +ffffffff83240ea0 D dt_static_refcnt_ifaddr +ffffffff83240f10 D dt_static_refcnt_ifmaddr +ffffffff83240f80 D dt_static_refcnt_inpcb +ffffffff83240ff0 D dt_static_refcnt_rtentry +ffffffff83241060 D dt_static_refcnt_syncache +ffffffff832410d0 D dt_static_refcnt_tdb +ffffffff83242000 D db_next_free_breakpoint +ffffffff83242008 D db_breakpoints_inserted +ffffffff83243000 D db_ed_style +ffffffff83244000 D db_examine_format +ffffffff83244078 D db_print_format +ffffffff83245000 D db_history_size +ffffffff83245008 D db_history_curr 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startuphook_list +ffffffff83261000 D sysctl_lock +ffffffff83261010 D sysctl_disklock +ffffffff83261020 d openbsd +ffffffff83261024 d arg_max +ffffffff83261028 d posix_version +ffffffff8326102c d ngroups_max +ffffffff83261030 d int_one +ffffffff83261034 d maxpartitions +ffffffff83261038 d raw_part +ffffffff8326103c D allowpowerdown +ffffffff83261040 D hw_power +ffffffff83261044 d byte_order +ffffffff83262000 d thrsleep_queue +ffffffff83262010 d thrsleep_lock +ffffffff83263000 D tc_lock +ffffffff83263010 D windup_mtx +ffffffff83263020 d dummy_timecounter +ffffffff83263070 D timecounter +ffffffff83263078 d timehands +ffffffff83263080 d th0 +ffffffff83263118 d th1 +ffffffff83264000 D itimer_mtx +ffffffff83264010 D ratecheck_mtx +ffffffff83264020 D ppsratecheck_mtx +ffffffff83264030 D resettodr_to +ffffffff83264078 D resettodr_task +ffffffff83265000 D timeout_mutex +ffffffff83266000 D wdog_auto +ffffffff83267000 D taskq_sys +ffffffff83267050 D taskq_sys_mp +ffffffff83268000 d update_loadavg.to +ffffffff83268048 D ccpu +ffffffff83268050 d schedcpu.to +ffffffff83268098 D perflevel +ffffffff8326809c D perfpolicy +ffffffff832680a0 D setperf_to +ffffffff83269000 D autoconf_attdet_mtx +ffffffff83269010 D msgs +ffffffff8326a000 d evcount_list +ffffffff8326a010 d evcount_percpu_init_list +ffffffff8326b000 D syslogf_rwlock +ffffffff8326b010 D log_mtx +ffffffff8326b020 D logstash_in +ffffffff8326b028 D logstash_out +ffffffff8326b030 D logstash_rwlock +ffffffff8326c000 D pool_head +ffffffff8326c010 D pool_lock +ffffffff8326c020 D pool_debug +ffffffff8326c028 D pool_allocator_single +ffffffff8326c040 D pool_allocator_multi +ffffffff8326c058 D pool_allocator_multi_ni +ffffffff8326c070 D pool_gc_tick +ffffffff8326c0b8 D pool_gc_task +ffffffff8326d000 D kprintf_mutex +ffffffff8326d010 D db_panic +ffffffff8326d014 D splassert_ctl +ffffffff8326d018 D v_putc +ffffffff8326d020 D printf_flags +ffffffff8326e000 D userconf_base +ffffffff8326e004 D userconf_maxdev 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bpf_maxbufsize +ffffffff83281008 D bpf_sysctl_lk +ffffffff83282000 D ifg_head +ffffffff83282010 D if_cloners_lock +ffffffff83282020 D if_input_task_locked +ffffffff83282050 D netlock +ffffffff83282060 D ifnetlist +ffffffff83283000 D ifiq_maxlen_drop +ffffffff83283004 D ifiq_maxlen_return +ffffffff83284000 D etherbroadcastaddr +ffffffff83284006 D ether_ipmulticast_min +ffffffff8328400c D ether_ipmulticast_max +ffffffff83284012 D ether_ip6multicast_min +ffffffff83284018 D ether_ip6multicast_max +ffffffff83285000 D etherip_cloner +ffffffff83285030 D etherip_list +ffffffff83286000 D loop_cloner +ffffffff83287000 D ifmedia_mtx +ffffffff83288000 D ppp_compressors +ffffffff83288020 D ppp_cloner +ffffffff83289000 D ppp_pkt_init +ffffffff8328a000 D ppp_bsd_compress +ffffffff8328b000 D ppp_deflate +ffffffff8328b070 D ppp_deflate_draft +ffffffff8328c000 D tun_cloner +ffffffff8328c030 D tap_cloner +ffffffff8328d000 D bridgeintrq +ffffffff8328d038 D bridge_cloner +ffffffff8328e000 d veb_cloner +ffffffff8328e030 d vport_cloner +ffffffff8328f000 D vlan_tagh_lk +ffffffff8328f010 D vlan_cloner +ffffffff8328f040 D svlan_cloner +ffffffff83290000 D pipex_list_mtx +ffffffff83290010 D pipex_prune +ffffffff83290018 D pipexoutq +ffffffff83290050 d SHAPad2 +ffffffff83291000 D rtmap_gc +ffffffff83291018 D rt_rc +ffffffff83292000 D rt_labels +ffffffff83292010 D rtlabel_mtx +ffffffff83293000 D enc_cloner +ffffffff83294000 D gre_cloner +ffffffff83294030 D gre_list +ffffffff83294040 D mgre_cloner +ffffffff83294070 D egre_cloner +ffffffff832940a0 D nvgre_cloner +ffffffff832940d0 D eoip_cloner +ffffffff83295000 D trunk_cloner +ffffffff83296000 d aggr_cloner +ffffffff83297000 d tpmr_cloner +ffffffff83298000 D mpe_cloner +ffffffff83299000 D mpw_cloner +ffffffff8329a000 D mpip_cloner +ffffffff8329b000 d bpe_cloner +ffffffff8329b030 d bpe_lock +ffffffff8329c000 D vether_cloner +ffffffff8329d000 D pair_cloner +ffffffff8329e000 d vxlan_cloner +ffffffff8329e030 d vxlan_lock +ffffffff8329e040 d vxlan_teps +ffffffff8329f000 D underload_interval +ffffffff8329f010 D wg_cloner +ffffffff832a0000 d stoeplitz_keyseed +ffffffff832a1000 D ieee80211_cache_size +ffffffff832a2000 D arpt_prune +ffffffff832a2004 D arpt_keep +ffffffff832a2008 D arpt_down +ffffffff832a2010 D arpinq +ffffffff832a2048 D arp_mtx +ffffffff832a2058 D arp_maxtries +ffffffff832a3000 D ipport_firstauto +ffffffff832a3004 D ipport_lastauto +ffffffff832a3008 D ipport_hifirstauto +ffffffff832a300c D ipport_hilastauto +ffffffff832a4000 D divert_sendspace +ffffffff832a4004 D divert_recvspace +ffffffff832a4008 D divbhashsize +ffffffff832a5000 D icmptstamprepl +ffffffff832a5004 D icmperrppslim +ffffffff832a5008 D icmp_redirtimeout +ffffffff832a6000 D ipsendredirects +ffffffff832a6004 D ip_defttl +ffffffff832a6008 D ip_mtudisc +ffffffff832a600c D ip_mtudisc_timeout +ffffffff832a6010 D ipq_mutex +ffffffff832a6020 D ip_maxqueue +ffffffff832a6028 D ipintrq +ffffffff832a6060 d ipsend_task +ffffffff832a6090 d ipsendraw_task +ffffffff832a7000 D ip_mrtproto +ffffffff832a7004 d sin +ffffffff832a8000 D rip_sendspace +ffffffff832a8008 D rip_recvspace +ffffffff832a9000 D tcp_debug_mtx +ffffffff832aa000 D tcprexmtthresh +ffffffff832aa004 D tcptv_keep_init +ffffffff832aa008 D tcp_rst_ppslim +ffffffff832aa00c D tcp_ackdrop_ppslim +ffffffff832aa010 D tcp_syn_hash_size +ffffffff832aa014 D tcp_syn_cache_limit +ffffffff832aa018 D tcp_syn_bucket_limit +ffffffff832aa01c D tcp_syn_use_limit +ffffffff832aa020 D syn_cache_mtx +ffffffff832ab000 D tcp_outflags +ffffffff832ac000 D tcp_timer_mtx +ffffffff832ac010 D tcp_mssdflt +ffffffff832ac014 D tcp_rttdflt +ffffffff832ac018 D tcp_do_rfc1323 +ffffffff832ac01c D tcp_do_sack +ffffffff832ac020 D tcp_do_rfc3390 +ffffffff832ac024 D tcp_do_tso +ffffffff832ac028 D tcp_reass_limit +ffffffff832ac02c D tcp_sackhole_limit +ffffffff832ad000 D tcp_backoff +ffffffff832ad034 D tcp_totbackoff +ffffffff832ae000 D tcp_sendspace +ffffffff832ae004 D tcp_recvspace +ffffffff832ae008 D tcp_autorcvbuf_inc +ffffffff832af000 D udpcksum +ffffffff832af004 D udp_sendspace +ffffffff832af008 D udp_recvspace +ffffffff832b0000 D ipsec_flows_mtx +ffffffff832b0010 D ipsec_ids_idle +ffffffff832b0014 D ipsec_ids_next_flow +ffffffff832b0018 D ipsec_policy_head +ffffffff832b0028 D ipsp_ids_gc_timeout +ffffffff832b0070 D tdb_sadb_mtx +ffffffff832b0080 d tdb_hashmask +ffffffff832b1000 D ipo_tdb_mtx +ffffffff832b1010 D ipsec_acquire_mtx +ffffffff832b1020 D ipsec_acquire_head +ffffffff832b2000 D ipsec_keep_invalid +ffffffff832b2004 D ipsec_require_pfs +ffffffff832b2008 D ipsec_soft_timeout +ffffffff832b200c D ipsec_exp_timeout +ffffffff832b2010 D ipsec_soft_first_use +ffffffff832b2014 D ipsec_exp_first_use +ffffffff832b2018 D ipsec_expire_acquire +ffffffff832b201c D esp_enable +ffffffff832b2020 D ah_enable +ffffffff832b3000 D udpencap_enable +ffffffff832b3004 D udpencap_port +ffffffff832b4000 D carp_vh_rc +ffffffff832b4020 D carp_sc_rc +ffffffff832b4040 D carp_opts +ffffffff832b4058 D carp_cloner +ffffffff832b4088 d carp_send_na.mcast +ffffffff832b5000 d PADDING +ffffffff832b6000 d PADDING +ffffffff832b7000 d weak_keys +ffffffff832b8000 D swcr_id +ffffffff832b9000 D window_inflate +ffffffff832b9004 D window_deflate +ffffffff832ba000 D ghash_update +ffffffff832bb000 D mpls_defttl +ffffffff832bb004 D mpls_mapttl_ip +ffffffff832bc000 D nfskevq_lock +ffffffff832bd000 D desirednfsrvcache +ffffffff832be000 D nfs_niothreads +ffffffff832bf000 D fragtbl +ffffffff832c0000 D ffs_vtbl +ffffffff832c1000 D dirchk +ffffffff832c2000 D desireddquot +ffffffff832c3000 D amap_list_lock +ffffffff832c4000 d uao_list_lock +ffffffff832c5000 d uvmexp_countersboot_boot_cpumem +ffffffff832c50c0 D uvmexp_counters +ffffffff832c50c8 D vm_min_kernel_address +ffffffff832c6000 D no_constraint +ffffffff832c7000 d uvm_kmapent_warn_rate +ffffffff832c8000 D maxslp +ffffffff832c9000 D uvmpagerops +ffffffff832ca000 D uvm_swap_data_lock +ffffffff832ca010 D swap_syscall_lock +ffffffff832ca020 D oommtx +ffffffff832cb000 D uvm_doswapencrypt +ffffffff832cc000 D gif_list +ffffffff832cc010 D gif_cloner +ffffffff832cd000 d sec_cloner +ffffffff832cd030 d sec_tdb_gc_mtx +ffffffff832cd040 d sec_tdb_gc_task +ffffffff832ce000 D divert6_sendspace +ffffffff832ce004 D divert6_recvspace +ffffffff832ce008 D divb6hashsize +ffffffff832cf000 d in6_get_hw_ifid.allone +ffffffff832d0000 D ip6_sendredirects +ffffffff832d0004 D ip6_defhlim +ffffffff832d0008 D ip6_defmcasthlim +ffffffff832d000c D ip6_maxfragpackets +ffffffff832d0010 D ip6_maxfrags +ffffffff832d0014 D ip6_log_interval +ffffffff832d0018 D ip6_hdrnestlimit +ffffffff832d001c D ip6_dad_count +ffffffff832d0020 D ip6_auto_flowlabel +ffffffff832d0024 D ip6_use_deprecated +ffffffff832d0028 D ip6_neighborgcthresh +ffffffff832d002c D ip6_maxdynroutes +ffffffff832d0030 D rip6_sendspace +ffffffff832d0038 D rip6_recvspace +ffffffff832d0040 D icmp6_redirtimeout +ffffffff832d0044 D icmp6errppslim +ffffffff832d0048 D ip6_mtudisc_timeout +ffffffff832d1000 D frag6_mutex +ffffffff832d2000 d icmp6_mtudisc_hiwat +ffffffff832d2004 d icmp6_mtudisc_lowat +ffffffff832d3000 d randomtab_20 +ffffffff832d4000 D ip6intrq +ffffffff832d4038 d ip6send_task +ffffffff832d5000 D nd6_timer_next +ffffffff832d5008 D nd6_expire_next +ffffffff832d5010 D nd6_delay +ffffffff832d5014 D nd6_umaxtries +ffffffff832d5018 D nd6_mmaxtries +ffffffff832d501c D nd6_gctimer +ffffffff832d5020 D nd6_maxndopt +ffffffff832d5028 D nd6_mtx +ffffffff832d5038 D nd6_list +ffffffff832d6000 d dadq +ffffffff832d7000 D pfkeyv2_mtx +ffffffff832d7010 d pfkeyv2_seq +ffffffff832d8000 D sadb_exts_allowed_in +ffffffff832d8090 D sadb_exts_required_in +ffffffff832d9000 D cold +ffffffff832da000 D bdevsw +ffffffff832da460 D nblkdev +ffffffff832da470 D cdevsw +ffffffff832dc400 D nchrdev +ffffffff832dc404 D mem_no +ffffffff832dc408 D swapdev +ffffffff832dc410 D constab +ffffffff832dd000 D machine +ffffffff832dd008 D cpu_idle_cycle_fcn +ffffffff832dd010 D lid_action +ffffffff832dd014 D pwr_action +ffffffff832dd018 D isa_constraint +ffffffff832dd028 D dma_constraint +ffffffff832dd040 D uvm_md_constraints +ffffffff832dd058 D delay_func +ffffffff832dd060 D initclock_func +ffffffff832dd068 D startclock_func +ffffffff832dd070 D bootinfo_size +ffffffff832dd074 D waittime +ffffffff832dd078 D dumpmag +ffffffff832de000 D tsc_rdtsc +ffffffff832de008 D tsc_timecounter +ffffffff832de058 D tsc_is_synchronized +ffffffff832df000 D local_apic +ffffffff832df020 D lapic_id +ffffffff832df080 D lapic_tpr +ffffffff832df0a0 d lapic_ppr +ffffffff832df100 d lapic_isr +ffffffff832e0000 D warn_once +ffffffff832e1000 d errata +ffffffff832e2000 D cpu_ucode_mtx +ffffffff832e3000 D mem_owner_bios +ffffffff832e3008 D mrops +ffffffff832e3028 D mtrrmask +ffffffff832e3030 D mtrrtomrt +ffffffff832e4000 D pmap_pg_wc +ffffffff832e4008 D pmaps_lock +ffffffff832e4018 d pmap_maxkvaddr +ffffffff832e5000 D kv_physwait +ffffffff832e6000 D fpu_save_len +ffffffff832e7000 D i8259_pic +ffffffff832e8000 D softintr_pic +ffffffff832e9000 D ipifunc +ffffffff832ea000 D setperf_mp_mutex +ffffffff832eb000 D db_Grp6 +ffffffff832eb040 D db_Grp7 +ffffffff832eb100 D db_Grp8 +ffffffff832eb140 D db_Grp9 +ffffffff832eb200 D db_GrpA +ffffffff832eb240 D db_GrpB +ffffffff832eb280 D db_GrpC +ffffffff832eb2c0 D db_inst_0f0x +ffffffff832eb440 D db_inst_0f2x +ffffffff832eb5c0 D db_inst_0f3x +ffffffff832eb740 D db_inst_0f8x +ffffffff832eb8c0 D db_inst_0f9x +ffffffff832eba40 D db_inst_0fax +ffffffff832ebbc0 D db_inst_0fbx +ffffffff832ebd40 D db_inst_0fcx +ffffffff832ebec0 D db_inst_0f +ffffffff832ebf40 D db_Esc92 +ffffffff832ebf80 D db_Esc94 +ffffffff832ebfc0 D db_Esc95 +ffffffff832ec000 D db_Esc96 +ffffffff832ec040 D db_Esc97 +ffffffff832ec080 D db_Esca5 +ffffffff832ec0c0 D db_Escb4 +ffffffff832ec100 D db_Esce3 +ffffffff832ec140 D db_Escf4 +ffffffff832ec180 D db_Esc8 +ffffffff832ec240 D db_Esc9 +ffffffff832ec300 D db_Esca +ffffffff832ec3c0 D db_Escb +ffffffff832ec480 D db_Escc +ffffffff832ec540 D db_Escd +ffffffff832ec600 D db_Esce +ffffffff832ec6c0 D db_Escf +ffffffff832ec780 D db_Esc_inst +ffffffff832ec7c0 D db_Grp1 +ffffffff832ec800 D db_Grp2 +ffffffff832ec840 D db_Grp3 +ffffffff832ec900 D db_Grp4 +ffffffff832ec9c0 D db_Grp5 +ffffffff832eca80 D db_inst_table +ffffffff832ee280 D db_bad_inst +ffffffff832ee2a0 D db_index_reg_16 +ffffffff832ee2e0 D db_reg +ffffffff832ee4e0 D db_seg_reg +ffffffff832ee520 D db_lengths +ffffffff832ef000 D db_regs +ffffffff832ef1e0 D db_eregs +ffffffff832ef1f0 D db_reg_args +ffffffff832f0000 D timer_mutex +ffffffff832f0010 d i8254_timecounter +ffffffff832f1000 D spleen8x16 +ffffffff832f1058 D spleen12x24 +ffffffff832f10b0 D spleen16x32 +ffffffff832f1108 D spleen32x64 +ffffffff832f1160 d builtin_fonts +ffffffff832f11e0 d wsfont_add.cookiegen +ffffffff832f11f0 d spleen8x16_data +ffffffff832f1ff0 d spleen12x24_data +ffffffff832f49f0 d spleen16x32_data +ffffffff832f81f0 d spleen32x64_data +ffffffff83307000 D nsphy_cd +ffffffff83308000 D nsphyter_cd +ffffffff83309000 D gentbi_cd +ffffffff8330a000 D qsphy_cd +ffffffff8330b000 D inphy_cd +ffffffff8330c000 D iophy_cd +ffffffff8330d000 D eephy_cd +ffffffff8330e000 D exphy_cd +ffffffff8330f000 D rlphy_cd +ffffffff83310000 D lxtphy_cd +ffffffff83311000 D luphy_cd +ffffffff83312000 D mtdphy_cd +ffffffff83313000 D icsphy_cd +ffffffff83314000 D sqphy_cd +ffffffff83315000 D tqphy_cd +ffffffff83316000 D ukphy_cd +ffffffff83317000 D dcphy_cd +ffffffff83318000 D bmtphy_cd +ffffffff83319000 D brgphy_cd +ffffffff8331a000 D xmphy_cd +ffffffff8331b000 D amphy_cd +ffffffff8331c000 D acphy_cd +ffffffff8331d000 D nsgphy_cd +ffffffff8331e000 D urlphy_cd +ffffffff8331f000 D rgephy_cd +ffffffff83320000 D ciphy_cd +ffffffff83321000 D ipgphy_cd +ffffffff83322000 D etphy_cd +ffffffff83323000 D jmphy_cd +ffffffff83324000 D atphy_cd +ffffffff83325000 D scsi_autoconf +ffffffff83325008 D scsibus_cd +ffffffff83326000 D cd_cd +ffffffff83327000 D ch_cd +ffffffff83327020 D chquirks +ffffffff83328000 D sd_cd +ffffffff83329000 D st_cd +ffffffff8332a000 D uk_cd +ffffffff8332b000 D safte_cd +ffffffff8332c000 D ses_cd +ffffffff8332d000 D sym_cd +ffffffff8332d020 D sym_devices +ffffffff8332d070 D asym_devices +ffffffff8332e000 D rdac_cd +ffffffff8332e020 D rdac_devices +ffffffff8332f000 D emc_cd +ffffffff8332f020 D emc_devices +ffffffff83330000 D hds_cd +ffffffff83330020 D hds_devices +ffffffff83331000 D atapiscsi_cd +ffffffff83332000 D wd_cd +ffffffff83332020 d wddumpmulti +ffffffff83333000 D mainbus_cd +ffffffff83333020 D mba_iba +ffffffff83334000 D bios_cd +ffffffff83334020 D smbios_uninfo +ffffffff83335000 D mpbios_cd +ffffffff83335020 d mp_conf +ffffffff83335070 d extint_bus +ffffffff833350a0 d smi_bus +ffffffff833350d0 d nmi_bus +ffffffff83336000 D need_retpoline +ffffffff83337000 D cpu_info_full_primary +ffffffff8333a000 D cpu_info_list +ffffffff8333a008 D mp_cpu_funcs +ffffffff8333a020 D cpu_cd +ffffffff8333a040 D cpu_info +ffffffff8333b000 D local_pic +ffffffff8333b098 D lapic_readreg +ffffffff8333b0a0 D lapic_writereg +ffffffff8333b0a8 D x86_ipi +ffffffff8333c000 D ioapic_cold +ffffffff8333c008 D ioapic_cd +ffffffff8333d000 D efifb_std_descr +ffffffff8333d030 D efifb_descrs +ffffffff8333d038 D efifb_accessops +ffffffff8333d098 D efifb_cd +ffffffff8333e000 D pvbus_cd +ffffffff8333e020 D pvbus_types +ffffffff8333e0e0 D pvbus_dma_tag +ffffffff8333f000 D pvclock_cd +ffffffff8333f020 D pvclock_timecounter +ffffffff83340000 D vmt_tclo_rpc +ffffffff833400d0 D vmt_cd +ffffffff83341000 D xen_cd +ffffffff83341020 D xen_bus_dma_tag +ffffffff83342000 D xnf_cd +ffffffff83343000 D xbf_cd +ffffffff83344000 D hv_msg_dispatch +ffffffff83344110 D hv_timecounter +ffffffff83344160 D hyperv_cd +ffffffff83345000 d hv_ic_devs +ffffffff83346000 D hvn_cd +ffffffff83347000 D hvs_cd +ffffffff83348000 D virtio_cd +ffffffff83349000 D vio_cd +ffffffff8334a000 D vioblk_cd +ffffffff8334b000 D viomb_cd +ffffffff8334c000 D viornd_cd +ffffffff8334d000 D vioscsi_cd +ffffffff8334e000 D vmmci_cd +ffffffff8334f000 D pci_cd +ffffffff83350000 D arc_fw_hdr +ffffffff83350008 D arc_cd +ffffffff83351000 D jmb_cd +ffffffff83352000 D mfii_cd +ffffffff83353000 D ips_cd +ffffffff83354000 D eap_cd +ffffffff83355000 D auacer_cd +ffffffff83356000 D auich_cd +ffffffff83357000 D azalia_cd +ffffffff83358000 D envy_cd +ffffffff83358020 D envy_matchids +ffffffff83358030 D envy_rates +ffffffff833580b0 D ak4524_dac +ffffffff833580d8 D ak4524_adc +ffffffff83358100 D ak4358_dac +ffffffff83358128 D ak5365_adc +ffffffff83358150 D unkenvy_codec +ffffffff83358180 D envy_cards +ffffffff833583f0 D envy_cards_ht +ffffffff83358600 d julia_eeprom +ffffffff83359000 D emu_cd +ffffffff8335a000 D auixp_cd +ffffffff8335b000 D clcs_cd +ffffffff8335c000 D yds_cd +ffffffff8335d000 D auvia_cd +ffffffff8335e000 D qle_cd +ffffffff8335f000 D mpii_cd +ffffffff83360000 D aq_cd +ffffffff83361000 D de_cd +ffffffff83362000 D pcn_cd +ffffffff83363000 D wdc_sii3114_vtbl +ffffffff83363038 D wdc_pdc203xx_vtbl +ffffffff83363070 D wdc_svwsata_vtbl +ffffffff833630a8 D pciide_cd +ffffffff833630d0 d sis_hostbr_type +ffffffff83364000 D ppb_cd +ffffffff83365000 D vr_cd +ffffffff83365020 D vr_devices +ffffffff83366000 D txp_cd +ffffffff83367000 D bt848_card_signature +ffffffff83368000 D bktr_cd +ffffffff83369000 D em_cd +ffffffff8336a000 D ixgb_cd +ffffffff8336b000 D ix_cd +ffffffff8336b020 D ixgbe_smart_speed +ffffffff8336b024 D ixgbe_enable_msix +ffffffff8336c000 D ixl_cd +ffffffff8336c020 d ixl_sff_lock +ffffffff8336d000 D xge_cd +ffffffff8336e000 D thtc_cd +ffffffff8336e020 D tht_cd +ffffffff8336e040 D tht_txt_desc +ffffffff8336e068 D tht_rxf_desc +ffffffff8336e090 D tht_rxd_desc +ffffffff8336e0b8 D tht_txf_desc +ffffffff8336f000 D myx_cd +ffffffff83370000 D oce_cd +ffffffff83371000 D dc_devs +ffffffff83372000 D cas_cd +ffffffff83373000 D sis_cd +ffffffff83374000 D se_cd +ffffffff83375000 D mbg_cd +ffffffff83376000 D cbb_cd +ffffffff83376020 D yc_chipsets +ffffffff833761b0 d pccbb_funcs +ffffffff833761e0 d pccbb_pcmcia_funcs +ffffffff83377000 D skc_cd +ffffffff83377020 D sk_cd +ffffffff83378000 D mskc_cd +ffffffff83378020 D msk_cd +ffffffff83379000 D puc_cd +ffffffff8337a000 D puc_ndevs +ffffffff8337b000 D iwi_cd +ffffffff8337c000 D wpi_cd +ffffffff8337d000 D iwn_cd +ffffffff8337e000 D iwm_cd +ffffffff8337f000 D iwx_cd +ffffffff83380000 d .compoundliteral +ffffffff83380040 d .compoundliteral.4 +ffffffff83380080 d .compoundliteral.5 +ffffffff833800b0 d .compoundliteral.6 +ffffffff833800f0 d .compoundliteral.7 +ffffffff83380130 d .compoundliteral.8 +ffffffff83381000 D cmpci_cd +ffffffff83382000 D iha_cd +ffffffff83383000 D pcscp_cd +ffffffff83383020 D pcscp_glue +ffffffff83384000 D bge_cd +ffffffff83385000 D bnx_firmwares +ffffffff83385160 D bnx_rv2ps +ffffffff833851c0 D bnx_cd +ffffffff833851e0 d flash_5709 +ffffffff83385210 d flash_table +ffffffff83386000 D vge_cd +ffffffff83387000 D stge_cd +ffffffff83388000 D nfe_cd +ffffffff83389000 D et_cd +ffffffff8338a000 D jme_cd +ffffffff8338b000 D age_cd +ffffffff8338c000 D alc_dma_burst +ffffffff8338c020 D alc_cd +ffffffff8338d000 D ale_cd +ffffffff8338e000 D amdpm_cd +ffffffff8338e020 d amdpm_timecounter +ffffffff8338f000 D bce_cd +ffffffff83390000 D rtwn_cd +ffffffff83391000 d ral_rt2560_opns +ffffffff83391028 d ral_rt2661_opns +ffffffff83391050 d ral_rt2860_opns +ffffffff83392000 D piixpm_cd +ffffffff83393000 D vic_cd +ffffffff83394000 D vmx_cd +ffffffff83395000 D vmwpvs_cd +ffffffff83396000 D lii_cd +ffffffff83397000 D ichiic_cd +ffffffff83398000 D viapm_cd +ffffffff83398020 d viapm_timecounter +ffffffff83399000 D amdiic_cd +ffffffff8339a000 D nviic_cd +ffffffff8339b000 D kate_cd +ffffffff8339c000 D km_cd +ffffffff8339d000 D cpu_model_offsets +ffffffff8339d070 D ksmn_cd +ffffffff8339e000 D itherm_cd +ffffffff8339f000 D pchtemp_cd +ffffffff833a0000 D xspd_cd +ffffffff833a1000 D virtio_pci_ops +ffffffff833a2000 D bwfm_pci_buscore_ops +ffffffff833a2030 D bwfm_pci_bus_ops +ffffffff833a2058 D bwfm_pci_msgbuf_ops +ffffffff833a3000 D bnxt_cd +ffffffff833a4000 D mcx_cd +ffffffff833a5000 D iavf_cd +ffffffff833a6000 D rge_cd +ffffffff833a7000 D igc_cd +ffffffff833a8000 D ngbe_cd +ffffffff833a9000 D agp_cd +ffffffff833aa000 D intagp_cd +ffffffff833aa020 D agp_i810_methods +ffffffff833ab000 D reservation_ww_class +ffffffff833ac000 d bridge_lock +ffffffff833ac010 d bridge_list +ffffffff833ad000 d drm_connector_enum_list +ffffffff833ad1f8 d connector_list_lock +ffffffff833ad208 d connector_list +ffffffff833ae000 d kernel_fb_helper_list +ffffffff833ae010 d kernel_fb_helper_lock +ffffffff833af000 D drm_global_mutex +ffffffff833b0000 D i2c_bit_algo +ffffffff833b0010 d drm_fence_context_count +ffffffff833b0018 d dma_fence_stub_mtx +ffffffff833b0028 D wait_bit_mtx +ffffffff833b0038 D shrinkers +ffffffff833b1000 d crtc_ww_class +ffffffff833b2000 d panel_lock +ffffffff833b2010 d panel_list +ffffffff833b3000 d ttm_global_mutex +ffffffff833b4000 D drm_sched_policy +ffffffff833b5000 D intel_bbops +ffffffff833b6000 d i915_sys_placement +ffffffff833b6020 d i915_ttm_bo_driver +ffffffff833b7000 d mchdev_lock +ffffffff833b8000 D inteldrm_stdscreen +ffffffff833b8030 D inteldrm_scrlist +ffffffff833b8038 D inteldrm_screenlist +ffffffff833b8048 D inteldrm_accessops +ffffffff833b80a8 D inteldrm_cd +ffffffff833b9000 d capture_mutex +ffffffff833ba000 d mitigations +ffffffff833bb000 D i915_modparams +ffffffff833bc000 d schedule_lock +ffffffff833bd000 d unbind_fence_ops +ffffffff833be000 D intel_graphics_stolen_res +ffffffff833bf000 D btc_valid_sclk +ffffffff833c0000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff833c0020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff833c1000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff833c1008 d r600_cs_packet_parse_vline.vline_status +ffffffff833c2000 d r100_asic +ffffffff833c22e0 d r200_asic +ffffffff833c25c0 d r300_asic_pcie +ffffffff833c28a0 d r300_asic +ffffffff833c2b80 d r420_asic +ffffffff833c2e60 d rs400_asic +ffffffff833c3140 d rs600_asic +ffffffff833c3420 d rs690_asic +ffffffff833c3700 d rv515_asic +ffffffff833c39e0 d r520_asic +ffffffff833c3cc0 d r600_asic +ffffffff833c3fa0 d rv6xx_asic +ffffffff833c4280 d rs780_asic +ffffffff833c4560 d rv770_asic +ffffffff833c4840 d evergreen_asic +ffffffff833c4b20 d sumo_asic +ffffffff833c4e00 d btc_asic +ffffffff833c50e0 d cayman_asic +ffffffff833c53c0 d trinity_asic +ffffffff833c56a0 d si_asic +ffffffff833c5980 d ci_asic +ffffffff833c5c60 d kv_asic +ffffffff833c6000 d dce6_funcs +ffffffff833c6018 d dce6_hdmi_funcs +ffffffff833c6088 d dce6_dp_funcs +ffffffff833c60f8 d dce4_funcs +ffffffff833c6110 d dce4_hdmi_funcs +ffffffff833c6180 d dce4_dp_funcs +ffffffff833c61f0 d dce32_funcs +ffffffff833c6208 d dce32_hdmi_funcs +ffffffff833c6278 d dce32_dp_funcs +ffffffff833c62e8 d r600_funcs +ffffffff833c6300 d r600_hdmi_funcs +ffffffff833c7000 D radeon_modeset +ffffffff833c7004 D radeon_dynclks +ffffffff833c7008 D radeon_agpmode +ffffffff833c700c D radeon_gart_size +ffffffff833c7010 D radeon_tv +ffffffff833c7014 D radeon_audio +ffffffff833c7018 D radeon_pcie_gen2 +ffffffff833c701c D radeon_msi +ffffffff833c7020 D radeon_lockup_timeout +ffffffff833c7024 D radeon_dpm +ffffffff833c7028 D radeon_aspm +ffffffff833c702c D radeon_runtime_pm +ffffffff833c7030 D radeon_vm_size +ffffffff833c7034 D radeon_vm_block_size +ffffffff833c7038 D radeon_use_pflipirq +ffffffff833c703c D radeon_bapm +ffffffff833c7040 D radeon_backlight +ffffffff833c7044 D radeon_auxch +ffffffff833c7048 D radeon_uvd +ffffffff833c704c D radeon_vce +ffffffff833c7050 D radeon_si_support +ffffffff833c7054 D radeon_cik_support +ffffffff833c7058 D radeondrm_cd +ffffffff833c7078 D radeondrm_stdscreen +ffffffff833c70a8 D radeondrm_scrlist +ffffffff833c70b0 D radeondrm_screenlist +ffffffff833c70c0 D radeondrm_accessops +ffffffff833c8000 D radeon_bbops +ffffffff833c9000 d radeon_bo_driver +ffffffff833ca000 d verde_pg_init +ffffffff833cb000 d cac_weights_pitcairn +ffffffff833cb4d0 d cac_weights_oland +ffffffff833cc000 d aldebaran_mode2_handler +ffffffff833cd000 d amdgpu_vbios_version_attrs +ffffffff833ce000 D amdgpu_asic_name +ffffffff833cf000 D amdgpu_vram_limit +ffffffff833cf004 D amdgpu_gart_size +ffffffff833cf008 D amdgpu_gtt_size +ffffffff833cf00c D amdgpu_moverate +ffffffff833cf010 D amdgpu_audio +ffffffff833cf014 D amdgpu_pcie_gen2 +ffffffff833cf018 D amdgpu_msi +ffffffff833cf01c D amdgpu_dpm +ffffffff833cf020 D amdgpu_fw_load_type +ffffffff833cf024 D amdgpu_aspm +ffffffff833cf028 D amdgpu_runtime_pm +ffffffff833cf02c D amdgpu_ip_block_mask +ffffffff833cf030 D amdgpu_bapm +ffffffff833cf034 D amdgpu_vm_size +ffffffff833cf038 D amdgpu_vm_fragment_size +ffffffff833cf03c D amdgpu_vm_block_size +ffffffff833cf040 D amdgpu_vm_update_mode +ffffffff833cf044 D amdgpu_dc +ffffffff833cf048 D amdgpu_sched_jobs +ffffffff833cf04c D amdgpu_sched_hw_submission +ffffffff833cf050 D amdgpu_cg_mask +ffffffff833cf058 D amdgpu_pg_mask +ffffffff833cf05c D amdgpu_sdma_phase_quantum +ffffffff833cf060 D amdgpu_pp_feature_mask +ffffffff833cf064 D amdgpu_lbpw +ffffffff833cf068 D amdgpu_compute_multipipe +ffffffff833cf06c D amdgpu_gpu_recovery +ffffffff833cf070 D amdgpu_smu_pptable_id +ffffffff833cf074 D amdgpu_dc_feature_mask +ffffffff833cf078 D amdgpu_async_gfx_ring +ffffffff833cf07c D amdgpu_mcbp +ffffffff833cf080 D amdgpu_discovery +ffffffff833cf084 D amdgpu_noretry +ffffffff833cf088 D amdgpu_force_asic_type +ffffffff833cf08c D amdgpu_tmz +ffffffff833cf090 D amdgpu_reset_method +ffffffff833cf094 D amdgpu_num_kcq +ffffffff833cf098 D amdgpu_use_xgmi_p2p +ffffffff833cf09c D amdgpu_sg_display +ffffffff833cf0a0 D amdgpu_user_partt_mode +ffffffff833cf0a8 D mgpu_info +ffffffff833cf558 D amdgpu_ras_enable +ffffffff833cf55c D amdgpu_ras_mask +ffffffff833cf560 D amdgpu_bad_page_threshold +ffffffff833cf564 D amdgpu_backlight +ffffffff833cf568 D amdgpu_cd +ffffffff833cf588 D amdgpu_stdscreen +ffffffff833cf5b8 D amdgpu_scrlist +ffffffff833cf5c0 D amdgpu_screenlist +ffffffff833cf5d0 D amdgpu_accessops +ffffffff833d0000 d amdgpu_gtt_mgr_attributes +ffffffff833d1000 D amdgpu_bbops +ffffffff833d2000 D soc15_ih_clientid_name +ffffffff833d3000 D ras_error_string +ffffffff833d3030 D ras_block_string +ffffffff833d30c0 D ras_mca_block_string +ffffffff833d4000 d amdgpu_bo_driver +ffffffff833d5000 d amdgpu_vram_mgr_attributes +ffffffff833d6000 d xgmi_mutex +ffffffff833d6010 D xgmi_ras_hw_ops +ffffffff833d6050 D xgmi_ras +ffffffff833d7000 D aqua_vanjaram_xcp_funcs +ffffffff833d8000 D gfx_v11_0_3_ras +ffffffff833d9000 d gfx_v9_0_ras +ffffffff833da000 D gfx_v9_4_ras +ffffffff833db000 D gfx_v9_4_2_ras_ops +ffffffff833db040 D gfx_v9_4_2_ras +ffffffff833dc000 D gfx_v9_4_3_xcp_funcs +ffffffff833dc020 D gfx_v9_4_3_ras_ops +ffffffff833dc060 D gfx_v9_4_3_ras +ffffffff833dd000 D gfxhub_v1_2_xcp_funcs +ffffffff833de000 D hdp_v4_0_ras_hw_ops +ffffffff833de040 D hdp_v4_0_ras +ffffffff833df000 d jpeg_v2_6_ras +ffffffff833e0000 d jpeg_v4_0_ras +ffffffff833e1000 d jpeg_v4_0_3_ras +ffffffff833e2000 D mca_v3_0_mp0_ras +ffffffff833e2058 D mca_v3_0_mp1_ras +ffffffff833e20b0 D mca_v3_0_mpio_ras +ffffffff833e3000 D mmhub_v1_0_ras_hw_ops +ffffffff833e3040 D mmhub_v1_0_ras +ffffffff833e4000 D mmhub_v1_7_ras_hw_ops +ffffffff833e4040 D mmhub_v1_7_ras +ffffffff833e5000 D mmhub_v1_8_ras +ffffffff833e6000 D mmhub_v9_4_ras +ffffffff833e7000 D nbio_v4_3_ras +ffffffff833e8000 D nbio_v7_4_ras +ffffffff833e9000 D nbio_v7_9_ras +ffffffff833ea000 d sriov_sc_video_codecs_encode +ffffffff833ea010 d sriov_sc_video_codecs_decode_vcn1 +ffffffff833ea020 d sriov_sc_video_codecs_decode_vcn0 +ffffffff833ea030 d sriov_sc_video_codecs_encode_array +ffffffff833ea060 d sriov_sc_video_codecs_decode_array_vcn1 +ffffffff833ea0f0 d sriov_sc_video_codecs_decode_array_vcn0 +ffffffff833eb000 d sdma_v4_0_ras +ffffffff833ec000 D sdma_v4_4_ras +ffffffff833ed000 D sdma_v4_4_2_xcp_funcs +ffffffff833ed020 d sdma_v4_4_2_ras +ffffffff833ee000 d sdma_v6_0_3_ras +ffffffff833ef000 d sienna_cichlid_mode2_handler +ffffffff833f0000 d smu_v13_0_10_mode2_handler +ffffffff833f1000 d sriov_vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff833f1010 d sriov_vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff833f1020 d sriov_vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff833f1030 d sriov_vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff833f1040 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff833f1070 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff833f1100 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff833f1140 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff833f2000 D umc_v6_1_ras +ffffffff833f3000 D umc_v6_7_ras +ffffffff833f4000 D umc_v8_10_ras +ffffffff833f5000 D umc_v8_7_ras +ffffffff833f6000 d vcn_v2_6_ras +ffffffff833f7000 d vcn_v4_0_unified_ring_vm_funcs +ffffffff833f7140 d vcn_v4_0_ras +ffffffff833f8000 d vcn_v4_0_3_ras +ffffffff833f9000 d amdgpu_dm_mode_config_helperfuncs +ffffffff833f9010 d dm_atomic_state_funcs +ffffffff833fa000 d construct_integrated_info.result +ffffffff833fa004 d bios_parser_get_firmware_info.result +ffffffff833fb000 d dce_funcs +ffffffff833fc000 d dce110_funcs +ffffffff833fd000 d dce112_funcs +ffffffff833fe000 d dce120_funcs +ffffffff833ff000 d rv1_clk_funcs +ffffffff833ff090 d rv1_clk_internal_funcs +ffffffff83400000 d rv2_clk_internal_funcs +ffffffff83401000 d dcn2_funcs +ffffffff83402000 d dcn201_funcs +ffffffff83403000 d dcn21_funcs +ffffffff83403090 d rn_bw_params +ffffffff83404000 D dcn3_fpga_funcs +ffffffff83404090 d dcn3_funcs +ffffffff83405000 d vg_funcs +ffffffff83405090 d dummy_clocks +ffffffff834051c0 d vg_bw_params +ffffffff83406000 d dcn31_funcs +ffffffff83406090 d dcn31_bw_params +ffffffff83407000 d dcn314_funcs +ffffffff83407090 d dcn314_bw_params +ffffffff83408000 d dcn315_funcs +ffffffff83408090 d dcn315_bw_params +ffffffff83409000 d dcn316_funcs +ffffffff83409090 d dcn316_bw_params +ffffffff8340a000 d dcn32_funcs +ffffffff8340b000 d dcn10_dpp_cap +ffffffff8340c000 d dcn20_dpp_funcs +ffffffff8340c110 d dcn20_dpp_cap +ffffffff8340d000 d dcn20_hubp_funcs +ffffffff8340e000 d dcn20_opp_funcs +ffffffff8340f000 d dcn20_tg_funcs +ffffffff83410000 d dcn201_dpp_funcs +ffffffff83410110 d dcn201_dpp_cap +ffffffff83411000 d dcn201_hubp_funcs +ffffffff83412000 d dcn201_opp_funcs +ffffffff83413000 d dcn201_tg_funcs +ffffffff83414000 d dcn201_res_pool_funcs +ffffffff834140f8 d dcn201_ip +ffffffff834142b0 d dcn201_soc +ffffffff83416000 d dcn21_hubp_funcs +ffffffff83417000 d dcn30_afmt_funcs +ffffffff83418000 d dcn30_dpp_funcs +ffffffff83418110 d dcn30_dpp_cap +ffffffff83419000 d dcn30_hubp_funcs +ffffffff8341a000 d dcn30_tg_funcs +ffffffff8341b000 d dcn30_vpg_funcs +ffffffff8341c000 d dcn30_tg_funcs +ffffffff8341d000 d res_cap_dcn301 +ffffffff8341d040 d dcn301_res_pool_funcs +ffffffff8341e000 d dcn302_res_pool_funcs +ffffffff8341f000 d dcn303_res_pool_funcs +ffffffff83420000 d dcn31_afmt_funcs +ffffffff83421000 d dcn31_apg_funcs +ffffffff83422000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff83423000 d dcn31_hubp_funcs +ffffffff83424000 d dcn31_tg_funcs +ffffffff83425000 d dcn31_res_pool_funcs +ffffffff83426000 d dcn31_vpg_funcs +ffffffff83427000 d dcn314_tg_funcs +ffffffff83428000 d dcn314_res_pool_funcs +ffffffff83429000 d dcn315_res_pool_funcs +ffffffff8342a000 d dcn316_res_pool_funcs +ffffffff8342b000 d dcn32_dpp_funcs +ffffffff8342b110 d dcn32_dpp_cap +ffffffff8342c000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff8342d000 d dcn32_hubp_funcs +ffffffff8342e000 d dcn32_tg_funcs +ffffffff8342f000 d dcn32_res_pool_funcs +ffffffff83430000 d dcn321_res_pool_funcs +ffffffff83431000 D dcn1_0_ip +ffffffff834311b8 D dcn1_0_soc +ffffffff83433000 D dcn2_0_ip +ffffffff834331b8 D dcn2_0_nv14_ip +ffffffff83433370 D dcn2_0_soc +ffffffff834346a8 D dcn2_0_nv14_soc +ffffffff834359e0 D dcn2_0_nv12_soc +ffffffff83436d18 D dcn2_1_ip +ffffffff83436ed0 D dcn2_1_soc +ffffffff83438208 D ddr4_wm_table_gs +ffffffff834382c8 D lpddr4_wm_table_gs +ffffffff83438388 D lpddr4_wm_table_with_disabled_ppt +ffffffff83438448 D ddr4_wm_table_rn +ffffffff83438508 D ddr4_1R_wm_table_rn +ffffffff834385c8 D lpddr4_wm_table_rn +ffffffff83439000 D dcn3_0_ip +ffffffff834391b8 D dcn3_0_soc +ffffffff8343b000 D dcn3_01_ip +ffffffff8343b1b8 D dcn3_01_soc +ffffffff8343c4f0 D ddr4_wm_table +ffffffff8343c5b0 D lpddr5_wm_table +ffffffff8343d000 D dcn3_02_ip +ffffffff8343d1b8 D dcn3_02_soc +ffffffff8343f000 D dcn3_03_ip +ffffffff8343f1b8 D dcn3_03_soc +ffffffff83441000 D dcn3_1_ip +ffffffff834411b8 D dcn3_15_ip +ffffffff83441370 D dcn3_16_ip +ffffffff83441528 d dcn3_15_soc +ffffffff83442860 d dcn3_1_soc +ffffffff83443b98 d dcn3_16_soc +ffffffff83445000 D dcn3_14_ip +ffffffff834451b8 d dcn3_14_soc +ffffffff83447000 D dcn3_2_ip +ffffffff834471b8 D dcn3_2_soc +ffffffff83449000 D dcn3_21_ip +ffffffff834491b8 D dcn3_21_soc +ffffffff8344b000 d dsc_policy_max_target_bpp_limit +ffffffff8344c000 D DIDTEDCConfig_P12 +ffffffff8344c070 d smu7_profiling +ffffffff8344d000 d cyan_skillfish_table_map +ffffffff8344d080 d cyan_skillfish_message_map +ffffffff8344e000 d navi10_table_map +ffffffff8344e080 d navi10_pwr_src_map +ffffffff8344e090 d navi10_workload_map +ffffffff8344e0e0 d navi10_message_map +ffffffff8344eb60 d navi10_clk_map +ffffffff8344ec20 d navi10_feature_mask_map +ffffffff8344f000 d sienna_cichlid_table_map +ffffffff8344f080 d sienna_cichlid_pwr_src_map +ffffffff8344f090 d sienna_cichlid_workload_map +ffffffff8344f0e0 d sienna_cichlid_message_map +ffffffff8344fb60 d sienna_cichlid_clk_map +ffffffff8344fc20 d sienna_cichlid_feature_mask_map +ffffffff83450000 d vangogh_message_map +ffffffff83450a80 d vangogh_table_map +ffffffff83450b00 d vangogh_workload_map +ffffffff83450b50 d vangogh_feature_mask_map +ffffffff83451000 d renoir_table_map +ffffffff83451080 d renoir_workload_map +ffffffff834510d0 d renoir_message_map +ffffffff83451b50 d renoir_clk_map +ffffffff83452000 d smu_v13_0_0_message_map +ffffffff83452a80 d smu_v13_0_0_feature_mask_map +ffffffff83452e50 d smu_v13_0_0_table_map +ffffffff83452ed0 d smu_v13_0_0_pwr_src_map +ffffffff83452ee0 d smu_v13_0_0_workload_map +ffffffff83452f30 d smu_v13_0_0_clk_map +ffffffff83453000 d smu_v13_0_4_table_map +ffffffff83453080 d smu_v13_0_4_message_map +ffffffff83453b00 d smu_v13_0_4_feature_mask_map +ffffffff83454000 d smu_v13_0_5_table_map +ffffffff83454080 d smu_v13_0_5_message_map +ffffffff83454b00 d smu_v13_0_5_feature_mask_map +ffffffff83455000 d smu_v13_0_7_message_map +ffffffff83455a80 d smu_v13_0_7_feature_mask_map +ffffffff83455e50 d smu_v13_0_7_table_map +ffffffff83455ed0 d smu_v13_0_7_pwr_src_map +ffffffff83455ee0 d smu_v13_0_7_workload_map +ffffffff83455f30 d smu_v13_0_7_clk_map +ffffffff83456000 d yellow_carp_table_map +ffffffff83456080 d yellow_carp_message_map +ffffffff83456b00 d yellow_carp_feature_mask_map +ffffffff83457000 D pci_conf_lock +ffffffff83457010 D pci_bus_dma_tag +ffffffff83457088 D msi_pic +ffffffff83457120 D msix_pic +ffffffff83458000 D pchb_cd +ffffffff83459000 D amas_cd +ffffffff8345a000 D cardslot_cd +ffffffff8345b000 D cardbus_cd +ffffffff8345c000 d csdevs +ffffffff8345d000 d ral_rt2560_opns +ffffffff8345d028 d ral_rt2661_opns +ffffffff8345d050 d ral_rt2860_opns +ffffffff8345e000 D pcmcia_cd +ffffffff8345f000 D pcmcia_3cxem556_func0 +ffffffff8345f0b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff8345f158 D pcmcia_megahertz_xjem1144_func0 +ffffffff8345f210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff8345f2b0 d pcmcia_3cxem556_func1 +ffffffff8345f368 d pcmcia_3cxem556_func1_cfe0 +ffffffff8345f408 d pcmcia_megahertz_xjem1144_func1 +ffffffff8345f4c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff8345f560 d pcmcia_sierra_a555_func1 +ffffffff8345f618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff8345f6b8 d pcmcia_sveclancard_func0 +ffffffff8345f770 d pcmcia_sveclancard_func0_cfe0 +ffffffff83460000 D ep_pcmcia_prod +ffffffff83461000 D aic_pcmcia_prod +ffffffff83462000 D com_pcmcia_prod +ffffffff83463000 D wdc_pcmcia_pr +ffffffff83464000 D sm_pcmcia_prod +ffffffff83465000 D xe_cd +ffffffff83466000 D pcib_cd +ffffffff83467000 D amdpcib_cd +ffffffff83468000 D tcpcib_cd +ffffffff83469000 D aapic_cd +ffffffff8346a000 D hme_cd +ffffffff8346b000 D isa_cd +ffffffff8346c000 D isadma_cd +ffffffff8346d000 D fdc_cd +ffffffff8346e000 D fd_types +ffffffff8346e1f8 D fd_cd +ffffffff8346f000 D mpu_cd +ffffffff83470000 D pcppi_cd +ffffffff83471000 D spkr_cd +ffffffff83472000 D wbsio_cd +ffffffff83473000 D schsio_cd +ffffffff83474000 D it_cd +ffffffff83475000 D uguru_cd +ffffffff83476000 D aps_cd +ffffffff83477000 D isa_bus_dma_tag +ffffffff83478000 D wsdisplay_cd +ffffffff83478020 D wsdisplay_cons +ffffffff83478058 D wsdisplay_defaultscreens +ffffffff83479000 D wskbd_cd +ffffffff83479020 D wskbd_default_bell_data +ffffffff83479030 D wskbd_default_keyrepeat_data +ffffffff83479040 D wskbd_srcops +ffffffff8347a000 d compose_tab +ffffffff8347b000 D wsmouse_cd +ffffffff8347b020 D wsmouse_srcops +ffffffff8347c000 D wsmux_srcops +ffffffff8347c030 D wsmux_tree_lock +ffffffff8347d000 D vt100_output +ffffffff8347e000 D pckbd_cd +ffffffff8347f000 D pms_cd +ffffffff8347f020 d synaptics_params +ffffffff8347f030 d alps_params +ffffffff83480000 D skgpio_cd +ffffffff83481000 D pctr_conf_lock +ffffffff83482000 D ukbd_keymapdata +ffffffff83483000 D usbrev_str +ffffffff83483030 D usb_cd +ffffffff83484000 d usbd_ratecheck.errinterval +ffffffff83485000 D uhub_cd +ffffffff83486000 D uaudio_cd +ffffffff83487000 D uvideo_ctrls +ffffffff834872d8 D uvideo_cd +ffffffff83488000 D utvfu_norm_params +ffffffff83488030 D utvfu_cd +ffffffff83489000 D udl_reg_vals_640x480_60 +ffffffff83489020 D udl_reg_vals_640x480_67 +ffffffff83489040 D udl_reg_vals_640x480_72 +ffffffff83489060 D udl_reg_vals_640x480_75 +ffffffff83489080 D udl_reg_vals_800x480_61 +ffffffff834890a0 D udl_reg_vals_800x600_56 +ffffffff834890c0 D udl_reg_vals_800x600_60 +ffffffff834890e0 D udl_reg_vals_800x600_72 +ffffffff83489100 D udl_reg_vals_800x600_74 +ffffffff83489120 D udl_reg_vals_800x600_75 +ffffffff83489140 D udl_reg_vals_1024x768_60 +ffffffff83489160 D udl_reg_vals_1024x768_70 +ffffffff83489180 D udl_reg_vals_1024x768_75 +ffffffff834891a0 D udl_reg_vals_1280x800_60 +ffffffff834891c0 D udl_reg_vals_1280x960_60 +ffffffff834891e0 D udl_reg_vals_1280x1024_60 +ffffffff83489200 D udl_reg_vals_1280x1024_75 +ffffffff83489220 D udl_reg_vals_1366x768_60 +ffffffff83489240 D udl_reg_vals_1440x900_60 +ffffffff83489260 D udl_reg_vals_1440x900_59 +ffffffff83489280 D udl_reg_vals_1440x900_75 +ffffffff834892a0 D udl_reg_vals_1680x1050_60 +ffffffff834892c0 D udl_reg_vals_1600x1200_60 +ffffffff834892e0 D udl_reg_vals_1920x1080_60 +ffffffff83489300 D udl_null_key_1 +ffffffff83489310 D udl_decomp_table +ffffffff8348a510 D udl_cd +ffffffff8348a530 D udl_stdscreen +ffffffff8348a560 D udl_scrlist +ffffffff8348a568 D udl_screenlist +ffffffff8348a578 D udl_accessops +ffffffff8348b000 D umidi_cd +ffffffff8348c000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff8348c020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff8348c040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff8348c060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff8348c080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff8348c0a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff8348c0c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff8348c0e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff8348c100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff8348c120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff8348c140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff8348c160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff8348c180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff8348c1a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff8348c1c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff8348c1e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff8348c200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff8348c220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff8348c240 D umidi_quirklist +ffffffff8348c4a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff8348c4c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff8348c4d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff8348c4f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff8348c500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff8348c520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff8348c530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff8348c550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff8348c560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff8348c580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff8348c590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff8348c5b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff8348c5c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff8348c5e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff8348c5f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff8348c610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff8348c620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff8348c640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff8348c650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff8348c670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff8348c680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff8348c6a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff8348c6b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff8348c6d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff8348c6e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff8348c700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff8348c710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff8348c730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff8348c740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff8348c760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff8348c770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff8348c790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff8348c7a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff8348c7c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff8348c7d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff8348c7f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff8348d000 D ucom_cd +ffffffff8348d020 D sysctl_ucomlock +ffffffff8348e000 D ugen_cd +ffffffff8348f000 D uhidev_cd +ffffffff8348f020 d uhidev_use_rdesc.reportbuf +ffffffff83490000 D uhid_cd +ffffffff83491000 D fido_cd +ffffffff83492000 D ujoy_cd +ffffffff83493000 D ukbd_cd +ffffffff83494000 D ums_cd +ffffffff83494020 d ums_fix_elecom_descriptor.match +ffffffff83495000 D umt_cd +ffffffff83496000 D def_scale +ffffffff83496020 D uts_cd +ffffffff83497000 D ubcmtp_cd +ffffffff83497020 d ubcmtp_wsmousecfg +ffffffff83498000 D ucycom_cd +ffffffff83499000 D uslhcom_cd +ffffffff8349a000 D ulpt_fwdevs +ffffffff8349a060 D ulpt_cd +ffffffff8349a080 D ulptusein +ffffffff8349b000 D umass_cd +ffffffff8349b020 d umass_bbb_transfer.dCBWtag +ffffffff8349c000 D uthum_cd +ffffffff8349d000 D ugold_cd +ffffffff8349d020 d cmd_init +ffffffff8349d028 d cmd_type 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+ffffffff834bd000 D uvscom_cd +ffffffff834be000 D ubsa_cd +ffffffff834bf000 D ukspan_cd +ffffffff834c0000 D uslcom_cd +ffffffff834c1000 D uark_cd +ffffffff834c2000 D moscom_cd +ffffffff834c3000 D umcs_cd +ffffffff834c4000 D uscom_cd +ffffffff834c5000 D ucrcom_cd +ffffffff834c6000 D uxrcom_cd +ffffffff834c7000 D uipaq_cd +ffffffff834c8000 D umsm_cd +ffffffff834c9000 D uchcom_cd +ffffffff834ca000 D uticom_cd +ffffffff834cb000 D wi_func_usb +ffffffff834cb060 D wi_usb_cd +ffffffff834cc000 D atu_cd +ffffffff834cc020 D atu_devs +ffffffff834cc270 D atu_radfirm +ffffffff834cd000 D ural_cd +ffffffff834ce000 D rum_cd +ffffffff834cf000 D run_cd +ffffffff834cf020 D rt3070_freqs +ffffffff834d0000 D mtw_cd +ffffffff834d1000 D zyd_cd +ffffffff834d2000 D upgt_cd +ffffffff834d3000 D urtw_cd +ffffffff834d4000 D urtwn_cd +ffffffff834d5000 D rsu_cd +ffffffff834d6000 D otus_cd +ffffffff834d6020 d AR_PLCP_HDR_INTR +ffffffff834d7000 D umb_xfer_tout +ffffffff834d7010 D umb_uuid_basic_connect +ffffffff834d7020 D umb_uuid_context_internet +ffffffff834d7030 D umb_uuid_qmi_mbim +ffffffff834d7040 D umb_cd +ffffffff834d7060 D umb_delay +ffffffff834d7070 D umb_qmi_alloc_cid +ffffffff834d7080 D umb_qmi_fcc_auth +ffffffff834d8000 D uath_cd +ffffffff834d9000 D uow_cd +ffffffff834da000 D uberry_cd +ffffffff834db000 D upd_cd +ffffffff834db020 d upd_usage_roots +ffffffff834db0a0 d upd_usage_batdep +ffffffff834dc000 D uwacom_cd +ffffffff834dc020 d uwacom_attach.wacom_report_buf +ffffffff834dd000 D bwfm_usb_bus_ops +ffffffff834de000 D umstc_cd +ffffffff834df000 D uhidpp_cd +ffffffff834e0000 D ucc_cd +ffffffff834e1000 D iic_cd +ffffffff834e2000 D probe_addrs_sensor +ffffffff834e2008 D probe_addrs_eeprom +ffffffff834e3000 D lmtemp_cd +ffffffff834e4000 D lmn_worklist +ffffffff834e4240 D lmn_cd +ffffffff834e5000 D lmenv_cd +ffffffff834e6000 D maxtmp_cd +ffffffff834e7000 D adc_cd +ffffffff834e8000 D admtemp_cd +ffffffff834e9000 D admlc_cd +ffffffff834ea000 D admtm_cd +ffffffff834eb000 D admtmp_cd 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+ffffffff8350e000 D acpidmar_force_cm +ffffffff8350e008 D acpidmar_cd +ffffffff8350e030 D vtd_faults +ffffffff8350f000 D acpidock_cd +ffffffff83510000 D abl_cd +ffffffff83510020 D abl_hids +ffffffff83511000 D asmc_cd +ffffffff83511020 D asmc_hids +ffffffff83512000 D acpiasus_cd +ffffffff83512020 D acpiasus_hids +ffffffff83513000 D acpithinkpad_cd +ffffffff83513020 D acpithinkpad_hids +ffffffff83514000 D acpitoshiba_cd +ffffffff83514020 D acpitoshiba_hids +ffffffff83515000 D acpisony_cd +ffffffff83516000 D acpivideo_cd +ffffffff83517000 D acpivout_cd +ffffffff83518000 D acpipwrres_cd +ffffffff83519000 D aibs_cd +ffffffff83519020 d aibs_hids +ffffffff8351a000 D aplgpio_cd +ffffffff8351a020 D aplgpio_hids +ffffffff8351b000 D bytgpio_cd +ffffffff8351b020 D bytgpio_hids +ffffffff8351c000 D chvgpio_cd +ffffffff8351c020 D chvgpio_hids +ffffffff8351d000 D glkgpio_cd +ffffffff8351d020 D glkgpio_hids +ffffffff8351e000 D pchgpio_cd +ffffffff8351e020 D pchgpio_hids +ffffffff8351e080 D pchgpio_devices +ffffffff8351f000 D tipmic_cd +ffffffff8351f020 D tipmic_thermal_regmap +ffffffff8351f030 D tipmic_power_regmap +ffffffff83520000 D ccpmic_cd +ffffffff83520020 D ccpmic_thermal_regmap +ffffffff83520023 D ccpmic_power_regmap +ffffffff83521000 D com_hids +ffffffff83522000 D sdhc_hids +ffffffff83523000 D dwiic_hids +ffffffff83523050 D ihidev_hids +ffffffff83523070 D ietp_hids +ffffffff83523220 D iatp_hids +ffffffff83523240 d dwiic_acpi_found_ihidev.i2c_hid_guid +ffffffff83524000 D acpicbkbd_cd +ffffffff83524020 D acpicbkbd_hids +ffffffff83525000 D acpials_cd +ffffffff83525020 D acpials_hids +ffffffff83526000 D tpm_cd +ffffffff83526020 D tpm_hids +ffffffff83527000 D acpihve_cd +ffffffff83528000 D acpisbs_cd +ffffffff83528020 D acpisbs_hids +ffffffff83529000 D acpisurface_cd +ffffffff83529020 D acpisurface_hids +ffffffff8352a000 D ipmi_acpi_hids +ffffffff8352b000 D amdgpio_cd +ffffffff8352b020 D amdgpio_hids +ffffffff8352c000 D acpihid_cd +ffffffff8352c020 D acpihid_hids +ffffffff8352c030 d acpihid_guid +ffffffff8352d000 d iosf_hids +ffffffff8352e000 D acpipci_cd +ffffffff8352e020 D acpipci_hids +ffffffff8352e040 d acpipci_osc.uuid +ffffffff8352f000 D efi_cd +ffffffff83530000 D vmm_cd +ffffffff83531000 D vmm_hv_signature +ffffffff83532000 D sdmmc_cd +ffffffff83533000 D bwfm_sdio_bus_ops +ffffffff83533028 D bwfm_sdio_buscore_ops +ffffffff83534000 D onewire_cd +ffffffff83535000 D owid_cd +ffffffff83536000 D owsbm_cd +ffffffff83537000 D owtemp_cd +ffffffff83538000 D owctr_cd +ffffffff83539000 D hz +ffffffff83539004 D tick +ffffffff83539008 D tick_nsec +ffffffff8353900c D initialvnodes +ffffffff83539010 D maxprocess +ffffffff83539014 D maxthread +ffffffff83539018 D maxfiles +ffffffff83539020 D nmbclust +ffffffff83539028 D bufcachepercent +ffffffff8353902c D fscale +ffffffff83539030 D shminfo +ffffffff83539044 D seminfo +ffffffff8353a000 D extraloc +ffffffff8353a100 D rextraloc +ffffffff8353a110 D locnames +ffffffff8353a1f0 D locnamp +ffffffff8353a410 D pv_size +ffffffff8353a420 D pv +ffffffff8353a640 d loc +ffffffff8353aad0 D cfdata +ffffffff835416a8 D cfroots +ffffffff835416b4 D cfroots_size +ffffffff835416c0 D pdevnames +ffffffff83541828 D pdevnames_size +ffffffff83541830 D pdevinit +ffffffff83542000 D rootdev +ffffffff83542004 D dumpdev +ffffffff83542010 D swdevt +ffffffff83543000 A __kudata_start +ffffffff83543000 D tlb_shoot_first_pcid +ffffffff83543008 D tlb_shoot_addr1 +ffffffff83543010 D tlb_shoot_addr2 +ffffffff83543018 D tlb_shoot_wait +ffffffff83544000 A __kudata_end +ffffffff83544000 C _edata +ffffffff83544000 b drm_minors_idr +ffffffff83544008 B drm_refcnt +ffffffff83545000 B vga_console_screen +ffffffff83545070 B vga_console_attached +ffffffff83545078 B vga_console_vc +ffffffff83545488 B vgaconsole +ffffffff8354548c B vga_console_type +ffffffff83546000 b wdc_alloc_queue.inited +ffffffff83546008 B wdc_xfer_pool +ffffffff835461b0 B wdc_xfer_iopool +ffffffff83547000 B aic_debug +ffffffff83548000 B gdt_cnt +ffffffff83548004 B gdt_polling +ffffffff83548005 B gdt_from_wait +ffffffff83548008 b gdt_exec_ccb.__level +ffffffff8354800c B gdt_wait_index +ffffffff83548010 B gdt_wait_gdt +ffffffff83549000 B sili_error_pmp_ports +ffffffff8354a000 B ncr53c9x_debug +ffffffff8354a008 b ecb_iopool +ffffffff8354a048 b ecb_pool_initialized +ffffffff8354a050 b ecb_pool +ffffffff8354a1f8 B sdebug +ffffffff8354b000 B epic_copy_small +ffffffff8354c000 B comconsaddr +ffffffff8354c008 B comconsiot +ffffffff8354c010 B comconsioh +ffffffff8354c018 B comconsfreq +ffffffff8354c01c B comcons_reg_width +ffffffff8354c020 B commajor +ffffffff8354c024 B comconsunit +ffffffff8354c028 B comcons_reg_shift +ffffffff8354c02c B comconsattached +ffffffff8354d000 B pckbc_console +ffffffff8354d004 B pckbc_console_attached +ffffffff8354d008 B pckbc_consdata +ffffffff8354d0e0 b pckbc_cons_slotdata +ffffffff8354e000 b cy_poll.counter +ffffffff8354f000 B atw_xindiv2 +ffffffff83550000 B rtw_rfprog_fallback +ffffffff83550004 B rtw_do_chip_reset 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pf_frnode_tree +ffffffff83562000 B pf_anchors +ffffffff83562008 B pf_main_anchor +ffffffff83562510 B pf_anchor_pl +ffffffff83563000 B pf_ioctl_trans +ffffffff83563008 B pf_default_rule +ffffffff83563548 B pf_tag_pl +ffffffff835636f0 B pf_default_rule_new +ffffffff83563c30 B pf_anchor_stack +ffffffff83563c38 B pf_trans_set +ffffffff83563c60 B pf_tcount +ffffffff83565000 B pfr_ktable_pl +ffffffff835651b0 B pfr_kentry_pl +ffffffff835656a8 B pfr_kcounters_pl +ffffffff83565850 B pfr_ffaddr +ffffffff83565860 B pfr_nulltable +ffffffff83565c88 B pfr_ktables +ffffffff83565c90 B pfr_ktable_cnt +ffffffff83565c94 B pfr_mask +ffffffff83566000 B pf_osfp_list +ffffffff83566008 B pf_osfp_entry_pl +ffffffff835661b0 B pf_osfp_pl +ffffffff83567000 B pfi_all +ffffffff83567008 B pfi_addr_pl +ffffffff835671b0 B pfi_buffer_max +ffffffff835671b8 B pfi_buffer +ffffffff835671c0 B pfi_ifs +ffffffff835671c8 B pfi_buffer_cnt +ffffffff83568000 b pf_syncookie_status +ffffffff83569000 B hfsc_class_pl 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B db_next +ffffffff83575008 B db_dot +ffffffff83575010 B db_last_addr +ffffffff83575018 B db_prev +ffffffff83575020 B db_last_command +ffffffff83575028 B db_cmd_loop_done +ffffffff83575030 B db_recover +ffffffff83576000 B db_ctf +ffffffff83577000 B db_symtab +ffffffff83577020 b db_elf_line_at_pc.path +ffffffff83577420 b db_elf_sym_forall.suffix +ffffffff83578000 B db_plays +ffffffff83578008 B db_guesses +ffffffff83579000 B db_history +ffffffff83579fa0 B db_history_prev +ffffffff83579fa8 B db_lc +ffffffff83579fb0 B db_le +ffffffff83579fb8 B db_lbuf_start +ffffffff83579fc0 B db_lbuf_end +ffffffff8357a000 B db_line +ffffffff8357a078 B db_lp +ffffffff8357a080 B db_endlp +ffffffff8357a088 B db_look_char +ffffffff8357a08c B db_look_token +ffffffff8357a090 B db_tok_number +ffffffff8357a0a0 B db_tok_string +ffffffff8357b000 B db_output_position +ffffffff8357b004 B db_output_line +ffffffff8357b008 B db_last_non_space +ffffffff8357b010 b db_stack_dump.intrace +ffffffff8357c000 b db_rint.ddbescape +ffffffff8357d000 B db_run_mode +ffffffff8357d004 B db_loop_count +ffffffff8357d008 B db_sstep_print +ffffffff8357d00c B db_call_depth +ffffffff8357d010 B db_inst_count +ffffffff8357e000 b db_trap.ddb_msg_shown +ffffffff8357f000 B db_watch_table +ffffffff8357f960 B db_free_watchpoints +ffffffff8357f968 B db_watchpoint_list +ffffffff83580000 B db_profile +ffffffff83581000 B audio_record_enable +ffffffff83582000 B constty +ffffffff83582008 B cn_devvp +ffffffff83582010 b cnpollc.refcount +ffffffff83583000 B numvnd +ffffffff83583008 B vnd_softc +ffffffff83584000 B rnd_event_prod +ffffffff83584010 B rnd_event_space +ffffffff83584410 B rnd_event_cons +ffffffff83584414 b add_entropy_words.entropy_add_ptr +ffffffff83584418 b add_entropy_words.entropy_input_rotate +ffffffff83584420 b entropy_pool +ffffffff83586420 b extract_entropy.extract_pool +ffffffff83588420 b rs_count +ffffffff83588428 b rs_have +ffffffff83588430 b rs_buf +ffffffff83588830 b rs +ffffffff83588870 b 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acpi_add_device.nacpicpus +ffffffff838841bc B acpi_force_bm +ffffffff838841c0 B mouse_has_softbtn +ffffffff838841c4 B acpi_evindex +ffffffff838841c8 B acpi_poll_enabled +ffffffff838841cc B acpi_hasprocfvs +ffffffff838841d0 B acpi_haspci +ffffffff83885000 B aml_root +ffffffff83885060 B aml_lastscope +ffffffff83885068 B aml_ophash +ffffffff83885070 b aml_mnem.mnemstr +ffffffff83885090 B aml_notify_list +ffffffff83885098 B acpi_nalloc +ffffffff838850a0 b acpi_sleep.acpinowait +ffffffff838850b0 b aml_nodename.namebuf +ffffffff83885130 b aml_getname.namebuf +ffffffff838851b0 b aml_getname.p +ffffffff838851b8 b global_lock_count +ffffffff838851c0 b aml_eisaid.id +ffffffff838851c8 B aml_global_lock +ffffffff838851d0 b aml_mapresource.map +ffffffff83885210 b aml_val_to_string.buffer +ffffffff83885310 B aml_error +ffffffff83885314 B odp +ffffffff83885318 B maxdp +ffffffff8388531c B aml_busy +ffffffff83886000 B scope +ffffffff83887000 B acpibtn_lids +ffffffff83888000 B cst_stats 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