--- 7.5/2024-06-01T06:17:04Z/2024-05-07T00:00:00Z/nm-bsd-ot14.txt Sun Jun 2 02:17:11 2024 +++ 7.5/2024-06-01T06:17:04Z/2024-05-08T00:00:00Z/nm-bsd-ot14.txt Sun Jun 2 05:10:08 2024 @@ -746,50 +746,50 @@ ffffffff8105cbe0 T mfi_skinny_intr ffffffff8105cc60 T mfi_skinny_post ffffffff8105ccf0 T mfi_skinny_sgd_load ffffffff8105d000 T qlw_scsi_cmd -ffffffff8105d730 T qlw_attach -ffffffff8105e1d0 T qlw_update_task -ffffffff8105e240 T qlw_parse_nvram_1040 -ffffffff8105e380 T qlw_parse_nvram_1080 -ffffffff8105e4e0 T qlw_read_mbox -ffffffff8105e530 T qlw_host_cmd -ffffffff8105e590 T qlw_softreset -ffffffff8105e820 T qlw_init_defaults -ffffffff8105e920 T qlw_read_nvram -ffffffff8105edc0 T qlw_load_firmware -ffffffff8105eec0 T qlw_mbox -ffffffff8105f270 T qlw_write -ffffffff8105f2c0 T qlw_dma_burst_enable -ffffffff8105f4a0 T qlw_config_bus -ffffffff8105f6a0 T qlw_alloc_ccbs -ffffffff8105fa70 T qlw_mbox_putaddr -ffffffff8105fad0 T qlw_update_bus -ffffffff8105fbe0 T qlw_free_ccbs -ffffffff8105fd60 T qlw_detach -ffffffff8105fd90 T qlw_config_target -ffffffff81060100 T qlw_update_target -ffffffff81060550 T qlw_handle_resp -ffffffff81060a90 T qlw_get_header -ffffffff81060ae0 T qlw_dump_iocb -ffffffff81060cb0 T qlw_handle_intr -ffffffff810610c0 T qlw_async -ffffffff81061180 T qlw_clear_isr -ffffffff81061210 T qlw_intr -ffffffff810612c0 T qlw_read_isr -ffffffff81061380 T qlw_put_marker -ffffffff810613f0 T qlw_put_cmd -ffffffff81061620 T qlw_put_cont -ffffffff81061700 T qlw_read -ffffffff81061750 T qlw_write_mbox -ffffffff810617a0 T qlw_set_ints -ffffffff81061800 T qlw_update -ffffffff81061830 T qlw_dump_iocb_segs -ffffffff81061970 T qlw_put_header -ffffffff810619c0 T qlw_put_data_seg -ffffffff81061a20 T qlw_load_firmware_words -ffffffff81061b30 T qlw_dmamem_alloc -ffffffff81061ca0 T qlw_dmamem_free -ffffffff81061d20 T qlw_put_ccb -ffffffff81061d90 T qlw_get_ccb +ffffffff8105d6b0 T qlw_attach +ffffffff8105e150 T qlw_update_task +ffffffff8105e1c0 T qlw_parse_nvram_1040 +ffffffff8105e300 T qlw_parse_nvram_1080 +ffffffff8105e460 T qlw_read_mbox +ffffffff8105e4b0 T qlw_host_cmd +ffffffff8105e510 T qlw_softreset +ffffffff8105e7a0 T qlw_init_defaults +ffffffff8105e8a0 T qlw_read_nvram +ffffffff8105ed40 T qlw_load_firmware +ffffffff8105ee40 T qlw_mbox +ffffffff8105f1f0 T qlw_write +ffffffff8105f240 T qlw_dma_burst_enable +ffffffff8105f420 T qlw_config_bus +ffffffff8105f620 T qlw_alloc_ccbs +ffffffff8105f9f0 T qlw_mbox_putaddr +ffffffff8105fa50 T qlw_update_bus +ffffffff8105fb60 T qlw_free_ccbs +ffffffff8105fce0 T qlw_detach +ffffffff8105fd10 T qlw_config_target +ffffffff81060080 T qlw_update_target +ffffffff810604d0 T qlw_handle_resp +ffffffff81060990 T qlw_get_header +ffffffff810609e0 T qlw_dump_iocb +ffffffff81060bb0 T qlw_handle_intr +ffffffff81060fc0 T qlw_async +ffffffff81061080 T qlw_clear_isr +ffffffff81061110 T qlw_intr +ffffffff810611c0 T qlw_read_isr +ffffffff81061280 T qlw_put_marker +ffffffff81061300 T qlw_put_cmd +ffffffff810615e0 T qlw_put_cont +ffffffff81061880 T qlw_read +ffffffff810618d0 T qlw_write_mbox +ffffffff81061920 T qlw_set_ints +ffffffff81061980 T qlw_update +ffffffff810619b0 T qlw_dump_iocb_segs +ffffffff81061af0 T qlw_put_header +ffffffff81061b40 T qlw_put_data_seg +ffffffff81061ba0 T qlw_load_firmware_words +ffffffff81061cb0 T qlw_dmamem_alloc +ffffffff81061e20 T qlw_dmamem_free +ffffffff81061ea0 T qlw_put_ccb +ffffffff81061f10 T qlw_get_ccb ffffffff81062000 T qla_scsi_cmd ffffffff81062450 T qla_scsi_probe ffffffff810624f0 T qla_classify_port @@ -1115,19 +1115,19 @@ ffffffff81087000 T siop_common_attach ffffffff81087320 T siop_common_reset ffffffff81087780 T siop_setuptables ffffffff81087ae0 T siop_ppr_msg -ffffffff81087b90 T siop_wdtr_msg -ffffffff81087c10 T siop_sdtr_msg -ffffffff81087ca0 T siop_update_xfer_mode -ffffffff81087e10 T siop_wdtr_neg -ffffffff810880c0 T siop_ppr_neg -ffffffff81088370 T siop_sdtr_neg -ffffffff81088910 T siop_ma -ffffffff81088b00 T siop_sdp -ffffffff81088c90 T siop_update_resid -ffffffff81088d30 T siop_iwr -ffffffff81088e40 T siop_clearfifo -ffffffff81088f40 T siop_modechange -ffffffff810891e0 T siop_resetbus +ffffffff81087ba0 T siop_wdtr_msg +ffffffff81087c20 T siop_sdtr_msg +ffffffff81087cb0 T siop_update_xfer_mode +ffffffff81087e20 T siop_wdtr_neg +ffffffff810880e0 T siop_ppr_neg +ffffffff81088390 T siop_sdtr_neg +ffffffff81088930 T siop_ma +ffffffff81088b20 T siop_sdp +ffffffff81088d20 T siop_update_resid +ffffffff81088e40 T siop_iwr +ffffffff81088f50 T siop_clearfifo +ffffffff81089050 T siop_modechange +ffffffff810892f0 T siop_resetbus ffffffff8108a000 T siop_scsicmd ffffffff8108a360 T siop_scsiprobe ffffffff8108a510 T siop_scsifree @@ -1139,19 +1139,19 @@ ffffffff8108a840 T siop_attach ffffffff8108a9c0 T siop_cmd_get ffffffff8108aa70 T siop_cmd_put ffffffff8108aad0 T siop_morecbd -ffffffff8108b190 T siop_reset -ffffffff8108b5b0 T siop_get_lunsw -ffffffff8108b7b0 T siop_add_reselsw -ffffffff8108ba90 T siop_intr -ffffffff8108cdd0 T siop_handle_reset -ffffffff8108d170 T siop_start -ffffffff8108d8f0 T siop_handle_qtag_reject -ffffffff8108da30 T siop_update_scntl3 -ffffffff8108db60 T siop_scsicmd_end -ffffffff8108dee0 T siop_timeout -ffffffff8108df60 T siop_add_dev -ffffffff8108e3f0 T siop_dmamem_alloc -ffffffff8108e590 T siop_dmamem_free +ffffffff8108b1e0 T siop_reset +ffffffff8108b650 T siop_get_lunsw +ffffffff8108b890 T siop_add_reselsw +ffffffff8108bb70 T siop_intr +ffffffff8108cec0 T siop_handle_reset +ffffffff8108d260 T siop_start +ffffffff8108d9e0 T siop_handle_qtag_reject +ffffffff8108db20 T siop_update_scntl3 +ffffffff8108dc50 T siop_scsicmd_end +ffffffff8108dfd0 T siop_timeout +ffffffff8108e050 T siop_add_dev +ffffffff8108e500 T siop_dmamem_alloc +ffffffff8108e6a0 T siop_dmamem_free ffffffff8108f000 T epconfig ffffffff8108f4c0 T ep_read_eeprom ffffffff8108f680 T epmbuffill @@ -1571,11 +1571,11 @@ ffffffff810ca620 T gem_init_regs ffffffff810ca9f0 T gem_iff ffffffff810cad70 T gem_rint ffffffff810cafa0 T gem_add_rxbuf -ffffffff810cb140 T gem_eint -ffffffff810cb1a0 T gem_pint -ffffffff810cb210 T gem_intr -ffffffff810cb3d0 T gem_tint -ffffffff810cb510 T gem_load_mbuf +ffffffff810cb150 T gem_eint +ffffffff810cb1b0 T gem_pint +ffffffff810cb220 T gem_intr +ffffffff810cb3e0 T gem_tint +ffffffff810cb520 T gem_load_mbuf ffffffff810cc000 T ti_eeprom_putbyte ffffffff810cc270 T ti_eeprom_getbyte ffffffff810cca40 T ti_read_eeprom @@ -1588,39 +1588,39 @@ ffffffff810cd3a0 T ti_cmd_ext ffffffff810cd4a0 T ti_handle_events ffffffff810cd770 T ti_ifmedia_sts ffffffff810cd910 T ti_init2 -ffffffff810cded0 T ti_stats_update -ffffffff810cdf60 T ti_newbuf_std -ffffffff810ce140 T ti_newbuf_mini -ffffffff810ce320 T ti_newbuf_jumbo -ffffffff810ce4e0 T ti_init_rx_ring_std -ffffffff810ce5f0 T ti_free_rx_ring_std -ffffffff810ce6c0 T ti_init_rx_ring_jumbo -ffffffff810ce7d0 T ti_free_rx_ring_jumbo -ffffffff810ce880 T ti_init_rx_ring_mini -ffffffff810ce920 T ti_free_rx_ring_mini -ffffffff810cea00 T ti_free_tx_ring -ffffffff810ceb10 T ti_init_tx_ring -ffffffff810cec40 T ti_add_mcast -ffffffff810cee50 T ti_del_mcast -ffffffff810cf060 T ti_iff -ffffffff810cf330 T ti_64bitslot_war -ffffffff810cf470 T ti_chipinit -ffffffff810cf750 T ti_chipinit_sbus -ffffffff810cf7b0 T ti_chipinit_pci -ffffffff810cf9a0 T ti_gibinit -ffffffff810cfec0 T ti_attach -ffffffff810d0410 T ti_ioctl -ffffffff810d05a0 T ti_start -ffffffff810d06d0 T ti_watchdog -ffffffff810d0760 T ti_ifmedia_upd -ffffffff810d0a40 T ti_rxeof -ffffffff810d0ef0 T ti_txeof_tigon1 -ffffffff810d1090 T ti_txeof_tigon2 -ffffffff810d11d0 T ti_intr -ffffffff810d12d0 T ti_encap_tigon1 -ffffffff810d15b0 T ti_encap_tigon2 -ffffffff810d1810 T ti_init -ffffffff810d1850 T ti_stop +ffffffff810cdec0 T ti_stats_update +ffffffff810cdf50 T ti_newbuf_std +ffffffff810ce130 T ti_newbuf_mini +ffffffff810ce310 T ti_newbuf_jumbo +ffffffff810ce4d0 T ti_init_rx_ring_std +ffffffff810ce5e0 T ti_free_rx_ring_std +ffffffff810ce6b0 T ti_init_rx_ring_jumbo +ffffffff810ce7c0 T ti_free_rx_ring_jumbo +ffffffff810ce870 T ti_init_rx_ring_mini +ffffffff810ce910 T ti_free_rx_ring_mini +ffffffff810ce9f0 T ti_free_tx_ring +ffffffff810ceb00 T ti_init_tx_ring +ffffffff810cec30 T ti_add_mcast +ffffffff810cee10 T ti_del_mcast +ffffffff810ceff0 T ti_iff +ffffffff810cf2c0 T ti_64bitslot_war +ffffffff810cf400 T ti_chipinit +ffffffff810cf6e0 T ti_chipinit_sbus +ffffffff810cf740 T ti_chipinit_pci +ffffffff810cf930 T ti_gibinit +ffffffff810cfe50 T ti_attach +ffffffff810d03a0 T ti_ioctl +ffffffff810d0530 T ti_start +ffffffff810d0660 T ti_watchdog +ffffffff810d06f0 T ti_ifmedia_upd +ffffffff810d09d0 T ti_rxeof +ffffffff810d0e80 T ti_txeof_tigon1 +ffffffff810d1020 T ti_txeof_tigon2 +ffffffff810d1160 T ti_intr +ffffffff810d1260 T ti_encap_tigon1 +ffffffff810d1540 T ti_encap_tigon2 +ffffffff810d17a0 T ti_init +ffffffff810d17e0 T ti_stop ffffffff810d2000 T comspeed ffffffff810d20f0 T comprobe1 ffffffff810d21c0 T com_detach @@ -2322,50 +2322,50 @@ ffffffff81110ef0 T ar5008_set_spur_immunity_level ffffffff81110f60 T ar5008_read_rom ffffffff81111150 T ar5008_read_eep_word ffffffff811111f0 T ar5008_swap_rom -ffffffff81111260 T ar5008_tx_alloc -ffffffff81111520 T ar5008_rx_alloc -ffffffff811117c0 T ar5008_tx_free -ffffffff811118c0 T ar5008_rx_free -ffffffff811119f0 T ar5008_rx_radiotap -ffffffff81111c90 T ar5008_ccmp_decap -ffffffff81111e20 T ar5008_rx_intr -ffffffff81112410 T ar5008_tx_process -ffffffff81112730 T ar5008_tx_intr -ffffffff81112820 T ar5008_swba_intr -ffffffff81112ba0 T ar5008_ccmp_encap -ffffffff81112c80 T ar5008_init_chains -ffffffff81112d80 T ar5008_read_noisefloor -ffffffff81112e80 T ar5008_write_noisefloor -ffffffff81112f80 T ar5008_bb_load_noisefloor -ffffffff81113310 T ar5008_calib_adc_gain -ffffffff81113690 T ar5008_calib_adc_dc_off -ffffffff81113a30 T ar5008_calib_iq -ffffffff81113db0 T ar5008_write_txpower -ffffffff81114070 T ar5008_set_viterbi_mask -ffffffff81114ad0 T ar5008_get_vpd -ffffffff81114b80 T ar5008_get_pdadcs -ffffffff811152c0 T ar5008_get_lg_tpow -ffffffff81115420 T ar5008_get_ht_tpow +ffffffff81111230 T ar5008_tx_alloc +ffffffff811114f0 T ar5008_rx_alloc +ffffffff81111790 T ar5008_tx_free +ffffffff81111890 T ar5008_rx_free +ffffffff811119c0 T ar5008_rx_radiotap +ffffffff81111c60 T ar5008_ccmp_decap +ffffffff81111df0 T ar5008_rx_intr +ffffffff811123e0 T ar5008_tx_process +ffffffff81112700 T ar5008_tx_intr +ffffffff811127f0 T ar5008_swba_intr +ffffffff81112b70 T ar5008_ccmp_encap +ffffffff81112c50 T ar5008_init_chains +ffffffff81112d50 T ar5008_read_noisefloor +ffffffff81112e50 T ar5008_write_noisefloor +ffffffff81112f50 T ar5008_bb_load_noisefloor +ffffffff811132e0 T ar5008_calib_adc_gain +ffffffff81113660 T ar5008_calib_adc_dc_off +ffffffff81113a00 T ar5008_calib_iq +ffffffff81113d80 T ar5008_write_txpower +ffffffff81114040 T ar5008_set_viterbi_mask +ffffffff81114aa0 T ar5008_get_vpd +ffffffff81114b50 T ar5008_get_pdadcs +ffffffff81115290 T ar5008_get_lg_tpow +ffffffff811153f0 T ar5008_get_ht_tpow ffffffff81116000 T ar5416_attach ffffffff811160d0 T ar5416_setup ffffffff81116160 T ar5416_swap_rom -ffffffff811162c0 T ar5416_init_from_rom -ffffffff81116840 T ar5416_set_txpower -ffffffff81116db0 T ar5416_set_synth -ffffffff811170d0 T ar5416_spur_mitigate -ffffffff811172c0 T ar5416_get_spur_chans -ffffffff81117300 T ar5416_force_bias -ffffffff811173f0 T ar5416_reverse_bits -ffffffff81117480 T ar5416_init_calib -ffffffff81117620 T ar5416_get_pdadcs -ffffffff81117940 T ar5416_set_power_calib -ffffffff81117d20 T ar5416_get_rf_rev -ffffffff81117ea0 T ar5416_rw_rfbits -ffffffff81117f90 T ar5416_rw_bank6tpc -ffffffff811180d0 T ar5416_rf_reset -ffffffff811182b0 T ar5416_reset_bb_gain -ffffffff81118340 T ar9160_rw_addac -ffffffff81118490 T ar5416_reset_addac +ffffffff81116260 T ar5416_init_from_rom +ffffffff811167e0 T ar5416_set_txpower +ffffffff81116d50 T ar5416_set_synth +ffffffff81117070 T ar5416_spur_mitigate +ffffffff81117260 T ar5416_get_spur_chans +ffffffff811172a0 T ar5416_force_bias +ffffffff81117390 T ar5416_reverse_bits +ffffffff81117420 T ar5416_init_calib +ffffffff811175c0 T ar5416_get_pdadcs +ffffffff811178e0 T ar5416_set_power_calib +ffffffff81117cc0 T ar5416_get_rf_rev +ffffffff81117e40 T ar5416_rw_rfbits +ffffffff81117f30 T ar5416_rw_bank6tpc +ffffffff81118070 T ar5416_rf_reset +ffffffff81118250 T ar5416_reset_bb_gain +ffffffff811182e0 T ar9160_rw_addac +ffffffff81118430 T ar5416_reset_addac ffffffff81119000 T ar9280_attach ffffffff811190e0 T ar9280_setup ffffffff811191e0 T ar9280_init_from_rom @@ -2379,29 +2379,29 @@ ffffffff8111a4c0 T ar9280_reset_tx_gain ffffffff8111b000 T ar9285_attach ffffffff8111b100 T ar9285_setup ffffffff8111b1d0 T ar9285_swap_rom -ffffffff8111b250 T ar9285_init_from_rom -ffffffff8111bae0 T ar9285_set_txpower -ffffffff8111bed0 T ar9285_get_spur_chans -ffffffff8111bf30 T ar9285_pa_calib -ffffffff8111c6c0 T ar9271_pa_calib -ffffffff8111ccd0 T ar9285_cl_cal -ffffffff8111cef0 T ar9271_load_ani -ffffffff8111cfe0 T ar9285_init_calib -ffffffff8111d1e0 T ar9285_get_pdadcs -ffffffff8111d3a0 T ar9285_set_power_calib +ffffffff8111b230 T ar9285_init_from_rom +ffffffff8111bac0 T ar9285_set_txpower +ffffffff8111beb0 T ar9285_get_spur_chans +ffffffff8111bf10 T ar9285_pa_calib +ffffffff8111c6a0 T ar9271_pa_calib +ffffffff8111ccb0 T ar9285_cl_cal +ffffffff8111ced0 T ar9271_load_ani +ffffffff8111cfc0 T ar9285_init_calib +ffffffff8111d1c0 T ar9285_get_pdadcs +ffffffff8111d380 T ar9285_set_power_calib ffffffff8111e000 T ar9287_attach ffffffff8111e0e0 T ar9287_setup ffffffff8111e130 T ar9287_swap_rom -ffffffff8111e1e0 T ar9287_init_from_rom -ffffffff8111e7d0 T ar9287_set_txpower -ffffffff8111ebc0 T ar9287_get_spur_chans -ffffffff8111ec20 T ar9287_olpc_init -ffffffff8111ecc0 T ar9287_olpc_temp_compensation -ffffffff8111ede0 T ar9287_get_pdadcs -ffffffff8111f030 T ar9287_olpc_get_pdgain -ffffffff8111f0f0 T ar9287_set_power_calib -ffffffff8111f4a0 T ar9287_1_3_enable_async_fifo -ffffffff8111f590 T ar9287_1_3_setup_async_fifo +ffffffff8111e1b0 T ar9287_init_from_rom +ffffffff8111e7a0 T ar9287_set_txpower +ffffffff8111eb90 T ar9287_get_spur_chans +ffffffff8111ebf0 T ar9287_olpc_init +ffffffff8111ec90 T ar9287_olpc_temp_compensation +ffffffff8111edb0 T ar9287_get_pdadcs +ffffffff8111f000 T ar9287_olpc_get_pdgain +ffffffff8111f0c0 T ar9287_set_power_calib +ffffffff8111f470 T ar9287_1_3_enable_async_fifo +ffffffff8111f560 T ar9287_1_3_setup_async_fifo ffffffff81120000 T ar9003_attach ffffffff81120250 T ar9003_gpio_read ffffffff811202d0 T ar9003_gpio_write @@ -2552,34 +2552,34 @@ ffffffff8112fc40 T bwfm_chip_cm3_set_passive ffffffff8112fd90 T bwfm_chip_sr_capable ffffffff811301b0 T bwfm_proto_bcdc_txctl ffffffff81130350 T bwfm_rx -ffffffff811304b0 T bwfm_chan2spec -ffffffff81130540 T bwfm_chan2spec_d11n -ffffffff811305b0 T bwfm_chan2spec_d11ac -ffffffff81130610 T bwfm_spec2chan -ffffffff811306d0 T bwfm_spec2chan_d11n -ffffffff81130730 T bwfm_spec2chan_d11ac -ffffffff811307c0 T bwfm_connect -ffffffff81130ee0 T bwfm_hostap -ffffffff811316a0 T bwfm_scan_v0 -ffffffff81131850 T bwfm_scan_v2 -ffffffff81131a20 T bwfm_scan -ffffffff81131a40 T bwfm_scan_abort_v0 -ffffffff81131b70 T bwfm_scan_abort_v2 -ffffffff81131cc0 T bwfm_scan_abort -ffffffff81131ce0 T bwfm_newbuf -ffffffff81131d60 T bwfm_rx_event -ffffffff81131dc0 T bwfm_rx_auth_ind -ffffffff81131f00 T bwfm_rx_assoc_ind -ffffffff811320c0 T bwfm_rx_deauth_ind -ffffffff811320e0 T bwfm_rx_leave_ind -ffffffff81132230 T bwfm_rx_disassoc_ind -ffffffff81132250 T bwfm_rx_event_cb -ffffffff81132530 T bwfm_scan_node -ffffffff811327a0 T bwfm_do_async -ffffffff811328c0 T bwfm_set_key_cb -ffffffff81133120 T bwfm_delete_key_cb -ffffffff811332c0 T bwfm_nvram_convert -ffffffff81133440 T bwfm_loadfirmware +ffffffff811304a0 T bwfm_chan2spec +ffffffff81130530 T bwfm_chan2spec_d11n +ffffffff811305a0 T bwfm_chan2spec_d11ac +ffffffff81130600 T bwfm_spec2chan +ffffffff811306c0 T bwfm_spec2chan_d11n +ffffffff81130720 T bwfm_spec2chan_d11ac +ffffffff811307b0 T bwfm_connect +ffffffff81130ed0 T bwfm_hostap +ffffffff81131690 T bwfm_scan_v0 +ffffffff81131840 T bwfm_scan_v2 +ffffffff81131a10 T bwfm_scan +ffffffff81131a30 T bwfm_scan_abort_v0 +ffffffff81131b60 T bwfm_scan_abort_v2 +ffffffff81131cb0 T bwfm_scan_abort +ffffffff81131cd0 T bwfm_newbuf +ffffffff81131d50 T bwfm_rx_event +ffffffff81131db0 T bwfm_rx_auth_ind +ffffffff81131ef0 T bwfm_rx_assoc_ind +ffffffff811320b0 T bwfm_rx_deauth_ind +ffffffff811320d0 T bwfm_rx_leave_ind +ffffffff81132220 T bwfm_rx_disassoc_ind +ffffffff81132240 T bwfm_rx_event_cb +ffffffff81132510 T bwfm_scan_node +ffffffff81132780 T bwfm_do_async +ffffffff811328a0 T bwfm_set_key_cb +ffffffff81133100 T bwfm_delete_key_cb +ffffffff811332a0 T bwfm_nvram_convert +ffffffff81133420 T bwfm_loadfirmware ffffffff81134000 T atw_enable ffffffff811340a0 T atw_disable ffffffff81134110 T atw_read_srom @@ -3362,133 +3362,133 @@ ffffffff8118c660 T bwi_rf_write ffffffff8118c6c0 T bwi_rf_read ffffffff8118c740 T bwi_rf_lo_adjust ffffffff8118c820 T bwi_mac_dummy_xmit -ffffffff8118d060 T bwi_mac_init_tpctl_11bg -ffffffff8118d470 T bwi_phy_write -ffffffff8118d4d0 T bwi_phy_read -ffffffff8118d530 T bwi_rf_clear_tssi -ffffffff8118d6a0 T bwi_mac_fw_free -ffffffff8118d700 T bwi_get_firmware -ffffffff8118d8a0 T bwi_fwimage_is_valid -ffffffff8118d9b0 T bwi_mac_gpio_fini -ffffffff8118db90 T bwi_mac_fw_load_iv -ffffffff8118dd20 T bwi_mac_set_retry_lim -ffffffff8118de70 T bwi_mac_set_ackrates -ffffffff8118e020 T bwi_rate2modtype -ffffffff8118e070 T bwi_mac_start -ffffffff8118e130 T bwi_mac_stop -ffffffff8118e230 T bwi_mac_reset_hwkeys -ffffffff8118e290 T bwi_mac_shutdown -ffffffff8118e3d0 T bwi_mac_updateslot -ffffffff8118e4a0 T bwi_mac_attach -ffffffff8118e610 T bwi_mac_balance_atten -ffffffff8118e730 T bwi_mac_adjust_tpctl -ffffffff8118e9b0 T bwi_mac_lock -ffffffff8118eb70 T bwi_mac_unlock -ffffffff8118ed00 T bwi_mac_calibrate_txpower -ffffffff8118f0d0 T bwi_rf_get_latest_tssi -ffffffff8118f220 T bwi_rf_tssi2dbm -ffffffff8118f280 T bwi_mac_set_promisc -ffffffff8118f320 T bwi_phy_init_11a -ffffffff8118f350 T bwi_phy_init_11g -ffffffff8118fed0 T bwi_tbl_write_2 -ffffffff8118ffc0 T bwi_tbl_write_4 -ffffffff81190100 T bwi_nrssi_write -ffffffff811901b0 T bwi_nrssi_read -ffffffff81190280 T bwi_phy_init_11b_rev5 -ffffffff81191190 T bwi_phy_init_11b_rev6 -ffffffff811927b0 T bwi_phy_config_11g -ffffffff81193770 T bwi_rf_get_gains -ffffffff811950a0 T bwi_rf_init -ffffffff81195160 T bwi_rf_init_hw_nrssi_table -ffffffff81195300 T bwi_phy_init_11b_rev2 -ffffffff81195330 T bwi_phy_init_11b_rev4 -ffffffff81195b00 T bwi_rf_set_chan -ffffffff81195dc0 T bwi_rf_init_bcm2050 -ffffffff81197ee0 T bwi_phy_config_agc -ffffffff81199a50 T bwi_set_gains -ffffffff81199ea0 T bwi_nrssi_11g -ffffffff81199f30 T bwi_get_rf_lo -ffffffff81199fa0 T bwi_rf_lo_isused -ffffffff8119a020 T bwi_rf_on_11a -ffffffff8119a050 T bwi_rf_off_11a -ffffffff8119a270 T bwi_rf_calc_rssi_bcm2060 -ffffffff8119a2b0 T bwi_rf_calc_rssi_bcm2050 -ffffffff8119a3d0 T bwi_rf_calc_rssi_bcm2053 -ffffffff8119a420 T bwi_rf_on_11bg -ffffffff8119a6c0 T bwi_rf_off_11bg -ffffffff8119a720 T bwi_rf_calc_nrssi_slope_11b -ffffffff8119b460 T bwi_rf_set_nrssi_thr_11b -ffffffff8119b7f0 T bwi_rf_lo_update_11g -ffffffff8119cb40 T bwi_rf_lo_update_11b -ffffffff8119d8a0 T bwi_rf_off_11g_rev5 -ffffffff8119d9f0 T bwi_rf_calc_nrssi_slope_11g -ffffffff8119f3c0 T bwi_rf_set_nrssi_thr_11g -ffffffff8119f5c0 T bwi_rf_workaround -ffffffff8119f6f0 T bwi_rf_gain_max_reached -ffffffff8119f950 T bwi_rf_lo_find -ffffffff8119fa00 T bwi_rf_lo_write -ffffffff8119fa60 T bwi_bitswap4 -ffffffff8119fac0 T bwi_phy812_value -ffffffff8119fd80 T bwi_rf_calibval -ffffffff8119fe40 T _bwi_adjust_devide -ffffffff8119fe80 T bwi_rf_calc_txpower -ffffffff8119ffd0 T bwi_rf_get_tp_ctrl2 -ffffffff811a0100 T _bwi_rf_lo_update_11g -ffffffff811a05a0 T bwi_rf_lo_devi_measure -ffffffff811a08e0 T bwi_rf_lo_measure_11g -ffffffff811a0bc0 T bwi_rf_set_nrssi_ofs_11g -ffffffff811a2770 T bwi_rf_init_sw_nrssi_table -ffffffff811a2810 T _nrssi_threshold -ffffffff811a2880 T bwi_rf_lo_measure_11b -ffffffff811a2a30 T bwi_setup_desc32 -ffffffff811a2af0 T bwi_power_off -ffffffff811a2bd0 T bwi_regwin_select -ffffffff811a2c80 T bwi_regwin_info -ffffffff811a2d00 T bwi_led_blink_next -ffffffff811a2d90 T bwi_led_blink_end -ffffffff811a2dc0 T bwi_led_onoff -ffffffff811a2e10 T bwi_led_newstate -ffffffff811a3190 T bwi_led_blink_start -ffffffff811a3260 T bwi_get_clock_freq -ffffffff811a33e0 T bwi_init -ffffffff811a3420 T bwi_set_bssid -ffffffff811a3650 T bwi_set_addr_filter -ffffffff811a3700 T bwi_set_chan -ffffffff811a3770 T bwi_encap -ffffffff811a3d50 T bwi_newstate_begin -ffffffff811a3dc0 T bwi_iter_func -ffffffff811a3de0 T bwi_newbuf30 -ffffffff811a3fb0 T bwi_init_tx_ring32 -ffffffff811a40e0 T bwi_free_tx_ring32 -ffffffff811a4300 T bwi_init_rx_ring32 -ffffffff811a4470 T bwi_free_rx_ring32 -ffffffff811a4510 T bwi_newbuf -ffffffff811a4710 T bwi_setup_rx_desc32 -ffffffff811a47d0 T bwi_setup_tx_desc32 -ffffffff811a4890 T bwi_rxeof32 -ffffffff811a4940 T bwi_start_tx32 -ffffffff811a4990 T bwi_init_txstats32 -ffffffff811a4b30 T bwi_free_txstats32 -ffffffff811a4b50 T bwi_txeof_status32 -ffffffff811a4c90 T bwi_dma_ring_alloc -ffffffff811a4e30 T bwi_dma_txstats_alloc -ffffffff811a5150 T bwi_dma_mbuf_create30 -ffffffff811a5bb0 T bwi_dma_mbuf_create -ffffffff811a60a0 T bwi_dma_txstats_free -ffffffff811a6160 T bwi_init_rxdesc_ring32 -ffffffff811a6220 T bwi_rxeof -ffffffff811a6640 T bwi_calc_rssi -ffffffff811a6690 T bwi_plcp2rate -ffffffff811a66b0 T bwi_reset_rx_ring32 -ffffffff811a6940 T bwi_ofdm_plcp_header -ffffffff811a69a0 T bwi_ds_plcp_header -ffffffff811a6a30 T bwi_plcp_header -ffffffff811a6b20 T bwi_ack_rate -ffffffff811a6c80 T bwi_txtime -ffffffff811a6d40 T bwi_txeof_status -ffffffff811a6e00 T _bwi_txeof -ffffffff811a6f80 T bwi_regwin_name -ffffffff811a7010 T bwi_regwin_disable_bits +ffffffff8118d040 T bwi_mac_init_tpctl_11bg +ffffffff8118d450 T bwi_phy_write +ffffffff8118d4b0 T bwi_phy_read +ffffffff8118d510 T bwi_rf_clear_tssi +ffffffff8118d680 T bwi_mac_fw_free +ffffffff8118d6e0 T bwi_get_firmware +ffffffff8118d880 T bwi_fwimage_is_valid +ffffffff8118d990 T bwi_mac_gpio_fini +ffffffff8118db70 T bwi_mac_fw_load_iv +ffffffff8118dd00 T bwi_mac_set_retry_lim +ffffffff8118de50 T bwi_mac_set_ackrates +ffffffff8118e000 T bwi_rate2modtype +ffffffff8118e050 T bwi_mac_start +ffffffff8118e110 T bwi_mac_stop +ffffffff8118e210 T bwi_mac_reset_hwkeys +ffffffff8118e270 T bwi_mac_shutdown +ffffffff8118e3b0 T bwi_mac_updateslot +ffffffff8118e480 T bwi_mac_attach +ffffffff8118e5f0 T bwi_mac_balance_atten +ffffffff8118e710 T bwi_mac_adjust_tpctl +ffffffff8118e990 T bwi_mac_lock +ffffffff8118eb50 T bwi_mac_unlock +ffffffff8118ece0 T bwi_mac_calibrate_txpower +ffffffff8118f0b0 T bwi_rf_get_latest_tssi +ffffffff8118f200 T bwi_rf_tssi2dbm +ffffffff8118f260 T bwi_mac_set_promisc +ffffffff8118f300 T bwi_phy_init_11a +ffffffff8118f330 T bwi_phy_init_11g +ffffffff8118feb0 T bwi_tbl_write_2 +ffffffff8118ffa0 T bwi_tbl_write_4 +ffffffff811900e0 T bwi_nrssi_write +ffffffff81190190 T bwi_nrssi_read +ffffffff81190260 T bwi_phy_init_11b_rev5 +ffffffff81191170 T bwi_phy_init_11b_rev6 +ffffffff81192790 T bwi_phy_config_11g +ffffffff81193750 T bwi_rf_get_gains +ffffffff81195080 T bwi_rf_init +ffffffff81195140 T bwi_rf_init_hw_nrssi_table +ffffffff811952e0 T bwi_phy_init_11b_rev2 +ffffffff81195310 T bwi_phy_init_11b_rev4 +ffffffff81195ae0 T bwi_rf_set_chan +ffffffff81195da0 T bwi_rf_init_bcm2050 +ffffffff81197ec0 T bwi_phy_config_agc +ffffffff81199a30 T bwi_set_gains +ffffffff81199e80 T bwi_nrssi_11g +ffffffff81199f10 T bwi_get_rf_lo +ffffffff81199f80 T bwi_rf_lo_isused +ffffffff8119a000 T bwi_rf_on_11a +ffffffff8119a030 T bwi_rf_off_11a +ffffffff8119a250 T bwi_rf_calc_rssi_bcm2060 +ffffffff8119a290 T bwi_rf_calc_rssi_bcm2050 +ffffffff8119a3b0 T bwi_rf_calc_rssi_bcm2053 +ffffffff8119a400 T bwi_rf_on_11bg +ffffffff8119a6a0 T bwi_rf_off_11bg +ffffffff8119a700 T bwi_rf_calc_nrssi_slope_11b +ffffffff8119b440 T bwi_rf_set_nrssi_thr_11b +ffffffff8119b7d0 T bwi_rf_lo_update_11g +ffffffff8119cb20 T bwi_rf_lo_update_11b +ffffffff8119d880 T bwi_rf_off_11g_rev5 +ffffffff8119d9d0 T bwi_rf_calc_nrssi_slope_11g +ffffffff8119f3a0 T bwi_rf_set_nrssi_thr_11g +ffffffff8119f5a0 T bwi_rf_workaround +ffffffff8119f6d0 T bwi_rf_gain_max_reached +ffffffff8119f930 T bwi_rf_lo_find +ffffffff8119f9e0 T bwi_rf_lo_write +ffffffff8119fa40 T bwi_bitswap4 +ffffffff8119faa0 T bwi_phy812_value +ffffffff8119fd60 T bwi_rf_calibval +ffffffff8119fe20 T _bwi_adjust_devide +ffffffff8119fe60 T bwi_rf_calc_txpower +ffffffff8119ffb0 T bwi_rf_get_tp_ctrl2 +ffffffff811a00e0 T _bwi_rf_lo_update_11g +ffffffff811a0580 T bwi_rf_lo_devi_measure +ffffffff811a08c0 T bwi_rf_lo_measure_11g +ffffffff811a0ba0 T bwi_rf_set_nrssi_ofs_11g +ffffffff811a2750 T bwi_rf_init_sw_nrssi_table +ffffffff811a27f0 T _nrssi_threshold +ffffffff811a2860 T bwi_rf_lo_measure_11b +ffffffff811a2a10 T bwi_setup_desc32 +ffffffff811a2ad0 T bwi_power_off +ffffffff811a2bb0 T bwi_regwin_select +ffffffff811a2c60 T bwi_regwin_info +ffffffff811a2ce0 T bwi_led_blink_next +ffffffff811a2d70 T bwi_led_blink_end +ffffffff811a2da0 T bwi_led_onoff +ffffffff811a2df0 T bwi_led_newstate +ffffffff811a3170 T bwi_led_blink_start +ffffffff811a3240 T bwi_get_clock_freq +ffffffff811a33c0 T bwi_init +ffffffff811a3400 T bwi_set_bssid +ffffffff811a3640 T bwi_set_addr_filter +ffffffff811a36f0 T bwi_set_chan +ffffffff811a3760 T bwi_encap +ffffffff811a3d40 T bwi_newstate_begin +ffffffff811a3db0 T bwi_iter_func +ffffffff811a3dd0 T bwi_newbuf30 +ffffffff811a3fa0 T bwi_init_tx_ring32 +ffffffff811a40d0 T bwi_free_tx_ring32 +ffffffff811a42f0 T bwi_init_rx_ring32 +ffffffff811a4460 T bwi_free_rx_ring32 +ffffffff811a4500 T bwi_newbuf +ffffffff811a4700 T bwi_setup_rx_desc32 +ffffffff811a47c0 T bwi_setup_tx_desc32 +ffffffff811a4880 T bwi_rxeof32 +ffffffff811a4930 T bwi_start_tx32 +ffffffff811a4980 T bwi_init_txstats32 +ffffffff811a4b20 T bwi_free_txstats32 +ffffffff811a4b40 T bwi_txeof_status32 +ffffffff811a4c80 T bwi_dma_ring_alloc +ffffffff811a4e20 T bwi_dma_txstats_alloc +ffffffff811a5140 T bwi_dma_mbuf_create30 +ffffffff811a5ba0 T bwi_dma_mbuf_create +ffffffff811a6090 T bwi_dma_txstats_free +ffffffff811a6150 T bwi_init_rxdesc_ring32 +ffffffff811a6210 T bwi_rxeof +ffffffff811a6630 T bwi_calc_rssi +ffffffff811a6680 T bwi_plcp2rate +ffffffff811a66a0 T bwi_reset_rx_ring32 +ffffffff811a6930 T bwi_ofdm_plcp_header +ffffffff811a6990 T bwi_ds_plcp_header +ffffffff811a6a20 T bwi_plcp_header +ffffffff811a6b10 T bwi_ack_rate +ffffffff811a6c70 T bwi_txtime +ffffffff811a6d30 T bwi_txeof_status +ffffffff811a6df0 T _bwi_txeof +ffffffff811a6f70 T bwi_regwin_name +ffffffff811a7000 T bwi_regwin_disable_bits ffffffff811a8000 T qwx_node_alloc ffffffff811a8050 T qwx_init ffffffff811a82b0 T qwx_core_init @@ -4924,100 +4924,100 @@ ffffffff8122a1c0 T pf_state_export ffffffff8122a730 T pf_state_expires ffffffff8122a810 T pf_state_alloc_scrub_memory ffffffff8122a860 T pf_state_import -ffffffff8122b090 T pf_purge_states -ffffffff8122b0f0 T pf_purge_states_tick -ffffffff8122b140 T pf_purge_expired_states -ffffffff8122b4b0 T pf_purge_tick -ffffffff8122b4d0 T pf_purge -ffffffff8122b560 T pf_purge_expired_src_nodes -ffffffff8122b690 T pf_src_tree_remove_state -ffffffff8122b750 T pf_send_tcp -ffffffff8122b840 T pf_remove_divert_state -ffffffff8122bab0 T pf_free_state -ffffffff8122bca0 T pf_tbladdr_setup -ffffffff8122bcf0 T pf_tbladdr_remove -ffffffff8122bd40 T pf_tbladdr_copyout -ffffffff8122bdb0 T pf_print_state -ffffffff8122bdd0 T pf_print_flags -ffffffff8122bf00 T pf_calc_skip_steps -ffffffff8122c350 T pf_addr_wrap_neq -ffffffff8122c450 T pf_cksum_fixup -ffffffff8122c4c0 T pf_cksum_fixup_a -ffffffff8122c640 T pf_patch_8 -ffffffff8122c6f0 T pf_patch_16 -ffffffff8122c780 T pf_patch_16_unaligned -ffffffff8122c930 T pf_patch_32 -ffffffff8122c9d0 T pf_patch_32_unaligned -ffffffff8122cc90 T pf_icmp_mapping -ffffffff8122cfa0 T pf_translate_icmp -ffffffff8122d0e0 T pf_translate_a -ffffffff8122d1f0 T pf_translate_af -ffffffff8122d570 T pf_change_icmp_af -ffffffff8122d8f0 T pf_translate_icmp_af -ffffffff8122dfb0 T pf_modulate_sack -ffffffff8122e250 T pf_pull_hdr -ffffffff8122e320 T pf_find_tcpopt -ffffffff8122e3d0 T pf_build_tcp -ffffffff8122e670 T pf_send_icmp -ffffffff8122e780 T pf_match_addr -ffffffff8122e800 T pf_match_addr_range -ffffffff8122e920 T pf_match -ffffffff8122e9f0 T pf_match_port -ffffffff8122ead0 T pf_match_uid -ffffffff8122ebb0 T pf_match_gid -ffffffff8122ec90 T pf_match_tag -ffffffff8122ecf0 T pf_match_rcvif -ffffffff8122edf0 T pf_tag_packet -ffffffff8122ee30 T pf_anchor_stack_init -ffffffff8122ee80 T pf_anchor_stack_is_full -ffffffff8122eed0 T pf_anchor_stack_is_empty -ffffffff8122ef20 T pf_anchor_stack_top -ffffffff8122ef70 T pf_anchor_stack_push -ffffffff8122f060 T pf_anchor_stack_pop -ffffffff8122f140 T pf_poolmask -ffffffff8122f1f0 T pf_addr_inc -ffffffff8122f2a0 T pf_socket_lookup -ffffffff8122f550 T pf_get_wscale -ffffffff8122f6c0 T pf_get_mss -ffffffff8122f840 T pf_calc_mss -ffffffff8122f980 T pf_tcp_iss -ffffffff8122fae0 T pf_rule_to_actions -ffffffff8122fbb0 T pf_match_rule -ffffffff81230ef0 T pf_routable -ffffffff812310d0 T pf_rtlabel_match -ffffffff812311c0 T pf_log_matches -ffffffff81231260 T pf_test_rule -ffffffff81231b90 T pf_check_tcp_cksum -ffffffff81231cd0 t pf_create_state -ffffffff81232620 T pf_translate -ffffffff81232930 T pf_tcp_track_full -ffffffff812336b0 T pf_tcp_track_sloppy -ffffffff81233b00 T pf_test_state -ffffffff81234690 T pf_mbuf_link_inpcb -ffffffff81234700 t pf_send_challenge_ack -ffffffff812347f0 T pf_icmp_state_lookup -ffffffff81234b10 T pf_test_state_icmp -ffffffff81236f60 T pf_walk_header -ffffffff812372a0 T pf_walk_header6 -ffffffff81237b30 T pf_route -ffffffff81237f90 T pf_test -ffffffff81239090 T pf_route6 -ffffffff81239500 T pf_find_divert -ffffffff81239550 T pf_get_divert -ffffffff81239600 T pf_walk_option -ffffffff81239850 T pf_walk_option6 -ffffffff81239c50 T pf_setup_pdesc -ffffffff8123a400 T pf_counters_inc -ffffffff8123a6f0 T pf_mbuf_link_state_key -ffffffff8123a770 T pf_ouraddr -ffffffff8123a7c0 T pf_mbuf_unlink_inpcb -ffffffff8123a800 T pf_inp_lookup -ffffffff8123a880 T pf_inp_link -ffffffff8123a950 T pf_inp_unlink -ffffffff8123aa30 T pf_delay_pkt -ffffffff8123aad0 T pf_pktenqueue_delayed -ffffffff8123ab30 t pf_state_tree_RBT_COMPARE -ffffffff8123ac40 t pf_state_tree_id_RBT_COMPARE +ffffffff8122b0a0 T pf_purge_states +ffffffff8122b100 T pf_purge_states_tick +ffffffff8122b150 T pf_purge_expired_states +ffffffff8122b4c0 T pf_purge_tick +ffffffff8122b4e0 T pf_purge +ffffffff8122b570 T pf_purge_expired_src_nodes +ffffffff8122b6a0 T pf_src_tree_remove_state +ffffffff8122b760 T pf_send_tcp +ffffffff8122b850 T pf_remove_divert_state +ffffffff8122bac0 T pf_free_state +ffffffff8122bcb0 T pf_tbladdr_setup +ffffffff8122bd00 T pf_tbladdr_remove +ffffffff8122bd50 T pf_tbladdr_copyout +ffffffff8122bdc0 T pf_print_state +ffffffff8122bde0 T pf_print_flags +ffffffff8122bf10 T pf_calc_skip_steps +ffffffff8122c360 T pf_addr_wrap_neq +ffffffff8122c460 T pf_cksum_fixup +ffffffff8122c4d0 T pf_cksum_fixup_a +ffffffff8122c650 T pf_patch_8 +ffffffff8122c720 T pf_patch_16 +ffffffff8122c7b0 T pf_patch_16_unaligned +ffffffff8122c940 T pf_patch_32 +ffffffff8122c9e0 T pf_patch_32_unaligned +ffffffff8122cc40 T pf_icmp_mapping +ffffffff8122cf30 T pf_translate_icmp +ffffffff8122d070 T pf_translate_a +ffffffff8122d180 T pf_translate_af +ffffffff8122d500 T pf_change_icmp_af +ffffffff8122d880 T pf_translate_icmp_af +ffffffff8122dea0 T pf_modulate_sack +ffffffff8122e140 T pf_pull_hdr +ffffffff8122e200 T pf_find_tcpopt +ffffffff8122e2b0 T pf_build_tcp +ffffffff8122e560 T pf_send_icmp +ffffffff8122e670 T pf_match_addr +ffffffff8122e6f0 T pf_match_addr_range +ffffffff8122e7e0 T pf_match +ffffffff8122e8b0 T pf_match_port +ffffffff8122e9a0 T pf_match_uid +ffffffff8122ea80 T pf_match_gid +ffffffff8122eb60 T pf_match_tag +ffffffff8122ebc0 T pf_match_rcvif +ffffffff8122ecc0 T pf_tag_packet +ffffffff8122ed00 T pf_anchor_stack_init +ffffffff8122ed50 T pf_anchor_stack_is_full +ffffffff8122eda0 T pf_anchor_stack_is_empty +ffffffff8122edf0 T pf_anchor_stack_top +ffffffff8122ee40 T pf_anchor_stack_push +ffffffff8122ef30 T pf_anchor_stack_pop +ffffffff8122f010 T pf_poolmask +ffffffff8122f0c0 T pf_addr_inc +ffffffff8122f160 T pf_socket_lookup +ffffffff8122f410 T pf_get_wscale +ffffffff8122f580 T pf_get_mss +ffffffff8122f700 T pf_calc_mss +ffffffff8122f840 T pf_tcp_iss +ffffffff8122f9a0 T pf_rule_to_actions +ffffffff8122fa70 T pf_match_rule +ffffffff81230dd0 T pf_routable +ffffffff81230fb0 T pf_rtlabel_match +ffffffff812310a0 T pf_log_matches +ffffffff81231140 T pf_test_rule +ffffffff81231a70 T pf_check_tcp_cksum +ffffffff81231bb0 t pf_create_state +ffffffff81232500 T pf_translate +ffffffff81232810 T pf_tcp_track_full +ffffffff812335b0 T pf_tcp_track_sloppy +ffffffff81233a00 T pf_test_state +ffffffff81234590 T pf_mbuf_link_inpcb +ffffffff81234600 t pf_send_challenge_ack +ffffffff812346f0 T pf_icmp_state_lookup +ffffffff81234a10 T pf_test_state_icmp +ffffffff81236e60 T pf_walk_header +ffffffff812371a0 T pf_walk_header6 +ffffffff81237a20 T pf_route +ffffffff81237e70 T pf_test +ffffffff81238f60 T pf_route6 +ffffffff812393d0 T pf_find_divert +ffffffff81239420 T pf_get_divert +ffffffff812394d0 T pf_walk_option +ffffffff81239720 T pf_walk_option6 +ffffffff81239b20 T pf_setup_pdesc +ffffffff8123a2c0 T pf_counters_inc +ffffffff8123a5b0 T pf_mbuf_link_state_key +ffffffff8123a630 T pf_ouraddr +ffffffff8123a680 T pf_mbuf_unlink_inpcb +ffffffff8123a6c0 T pf_inp_lookup +ffffffff8123a740 T pf_inp_link +ffffffff8123a810 T pf_inp_unlink +ffffffff8123a8f0 T pf_delay_pkt +ffffffff8123a990 T pf_pktenqueue_delayed +ffffffff8123a9f0 t pf_state_tree_RBT_COMPARE +ffffffff8123ab00 t pf_state_tree_id_RBT_COMPARE ffffffff8123b000 T pf_frnode_tree_RB_INSERT_COLOR ffffffff8123b220 T pf_frnode_tree_RB_REMOVE_COLOR ffffffff8123b590 T pf_frnode_tree_RB_REMOVE @@ -5049,19 +5049,19 @@ ffffffff8123d590 T pf_frent_previous ffffffff8123d6a0 T pf_fillup_fragment ffffffff8123e080 T pf_join_fragment ffffffff8123e220 T pf_reassemble -ffffffff8123e4c0 T pf_reassemble6 -ffffffff8123e8c0 T pf_refragment6 -ffffffff8123eab0 T pf_normalize_ip -ffffffff8123ebf0 T pf_normalize_ip6 -ffffffff8123ecd0 T pf_state_scrub_get -ffffffff8123ecf0 T pf_state_scrub_put -ffffffff8123ed10 T pf_normalize_tcp_alloc -ffffffff8123ed70 T pf_normalize_tcp -ffffffff8123eec0 T pf_normalize_tcp_init -ffffffff8123f080 T pf_normalize_tcp_cleanup -ffffffff8123f0f0 T pf_normalize_tcp_stateful -ffffffff8123fa10 T pf_normalize_mss -ffffffff8123fbc0 T pf_scrub +ffffffff8123e4b0 T pf_reassemble6 +ffffffff8123e8b0 T pf_refragment6 +ffffffff8123eaa0 T pf_normalize_ip +ffffffff8123ebe0 T pf_normalize_ip6 +ffffffff8123ecc0 T pf_state_scrub_get +ffffffff8123ece0 T pf_state_scrub_put +ffffffff8123ed00 T pf_normalize_tcp_alloc +ffffffff8123ed60 T pf_normalize_tcp +ffffffff8123eeb0 T pf_normalize_tcp_init +ffffffff8123f070 T pf_normalize_tcp_cleanup +ffffffff8123f0e0 T pf_normalize_tcp_stateful +ffffffff8123fa00 T pf_normalize_mss +ffffffff8123fbb0 T pf_scrub ffffffff81240000 T pf_anchor_global_RB_INSERT_COLOR ffffffff81240200 T pf_anchor_global_RB_REMOVE_COLOR ffffffff81240530 T pf_anchor_global_RB_REMOVE @@ -5129,16 +5129,16 @@ ffffffff81244f80 T pf_states_clr ffffffff81245160 T pf_states_get ffffffff812452c0 T pfioctl ffffffff81249920 T pf_rule_copyin -ffffffff8124a2b0 T pf_rule_checkaf -ffffffff8124a350 T pf_open_trans -ffffffff8124a440 T pf_init_tgetrule -ffffffff8124a490 T pf_find_trans -ffffffff8124a500 T pf_trans_set_commit -ffffffff8124a5a0 T pf_rollback_trans -ffffffff8124a630 T pf_pool_copyin -ffffffff8124a690 T pf_validate_range -ffffffff8124a700 T pf_sysctl -ffffffff8124a820 T pf_cleanup_tgetrule +ffffffff8124a2c0 T pf_rule_checkaf +ffffffff8124a360 T pf_open_trans +ffffffff8124a450 T pf_init_tgetrule +ffffffff8124a4a0 T pf_find_trans +ffffffff8124a510 T pf_trans_set_commit +ffffffff8124a5b0 T pf_rollback_trans +ffffffff8124a640 T pf_pool_copyin +ffffffff8124a6a0 T pf_validate_range +ffffffff8124a720 T pf_sysctl +ffffffff8124a840 T pf_cleanup_tgetrule ffffffff8124b000 T pfr_ktablehead_RB_INSERT_COLOR ffffffff8124b2f0 T pfr_ktablehead_RB_REMOVE_COLOR ffffffff8124b7e0 T pfr_ktablehead_RB_REMOVE @@ -5164,15 +5164,15 @@ ffffffff8124d2d0 T pfr_create_kentry_unlocked ffffffff8124d430 T pfr_kentry_kif_ref ffffffff8124d4f0 T pfr_lookup_kentry ffffffff8124d6a0 T pfr_route_kentry -ffffffff8124d870 T pfr_clean_node_mask -ffffffff8124d8e0 T pfr_insert_kentries -ffffffff8124da70 T pfr_destroy_kentry -ffffffff8124daf0 T pfr_destroy_ioq -ffffffff8124dc00 T pfr_destroy_ktable -ffffffff8124dd10 T pfr_reset_feedback -ffffffff8124de10 T pfr_del_addrs -ffffffff8124e380 T pfr_mark_addrs -ffffffff8124e480 T pfr_lookup_addr +ffffffff8124d880 T pfr_clean_node_mask +ffffffff8124d8f0 T pfr_insert_kentries +ffffffff8124da80 T pfr_destroy_kentry +ffffffff8124db00 T pfr_destroy_ioq +ffffffff8124dc10 T pfr_destroy_ktable +ffffffff8124dd20 T pfr_reset_feedback +ffffffff8124de20 T pfr_del_addrs +ffffffff8124e390 T pfr_mark_addrs +ffffffff8124e490 T pfr_lookup_addr ffffffff8124e660 T pfr_set_addrs ffffffff8124ee00 T pfr_create_kentry ffffffff8124ef60 T pfr_ktable_winfo_update @@ -5187,41 +5187,41 @@ ffffffff8124fe50 T pfr_clr_astats ffffffff812501a0 T pfr_prepare_network ffffffff812502b0 T pfr_insert_kentry ffffffff81250400 T pfr_unroute_kentry -ffffffff812505d0 T pfr_clr_tables -ffffffff81250850 T pfr_fix_anchor -ffffffff81250920 T pfr_table_count -ffffffff81250990 T pfr_skip_table -ffffffff812509e0 T pfr_setflags_ktables -ffffffff81250a40 T pfr_add_tables -ffffffff812512d0 T pfr_insert_ktables -ffffffff81251330 T pfr_destroy_ktables_aux -ffffffff812514a0 T pfr_del_tables -ffffffff81251730 T pfr_get_tables -ffffffff81251a00 T pfr_get_tstats -ffffffff81251dc0 T pfr_clstats_ktables -ffffffff81251eb0 T pfr_clr_tstats -ffffffff81252190 T pfr_set_tflags -ffffffff812524d0 T pfr_ina_begin -ffffffff812526e0 T pfr_ina_define -ffffffff81252cb0 T pfr_destroy_ktables -ffffffff81252d20 T pfr_ina_rollback -ffffffff81252f00 T pfr_ina_commit -ffffffff81253130 T pfr_commit_ktable -ffffffff812535d0 T pfr_clstats_ktable -ffffffff812536a0 T pfr_setflags_ktable -ffffffff812537b0 T pfr_insert_ktable -ffffffff81253900 T pfr_match_addr -ffffffff81253a30 T pfr_kentry_byaddr -ffffffff81253b60 T pfr_ktable_select_active -ffffffff81253bb0 T pfr_update_stats -ffffffff81253e10 T pfr_attach_table -ffffffff81254030 T pfr_detach_table -ffffffff812540e0 T pfr_islinklocal -ffffffff81254130 T pfr_pool_get -ffffffff812548e0 T pfr_kentry_byidx -ffffffff81254970 T pfr_states_increase -ffffffff81254a00 T pfr_states_decrease -ffffffff81254ae0 T pfr_dynaddr_update +ffffffff812505c0 T pfr_clr_tables +ffffffff81250840 T pfr_fix_anchor +ffffffff81250910 T pfr_table_count +ffffffff81250980 T pfr_skip_table +ffffffff812509d0 T pfr_setflags_ktables +ffffffff81250a30 T pfr_add_tables +ffffffff812512c0 T pfr_insert_ktables +ffffffff81251320 T pfr_destroy_ktables_aux +ffffffff81251490 T pfr_del_tables +ffffffff81251720 T pfr_get_tables +ffffffff812519f0 T pfr_get_tstats +ffffffff81251db0 T pfr_clstats_ktables +ffffffff81251ea0 T pfr_clr_tstats +ffffffff81252180 T pfr_set_tflags +ffffffff812524c0 T pfr_ina_begin +ffffffff812526d0 T pfr_ina_define +ffffffff81252ca0 T pfr_destroy_ktables +ffffffff81252d10 T pfr_ina_rollback +ffffffff81252ef0 T pfr_ina_commit +ffffffff81253120 T pfr_commit_ktable +ffffffff812535c0 T pfr_clstats_ktable +ffffffff81253690 T pfr_setflags_ktable +ffffffff812537a0 T pfr_insert_ktable +ffffffff812538f0 T pfr_match_addr +ffffffff81253a20 T pfr_kentry_byaddr +ffffffff81253b50 T pfr_ktable_select_active +ffffffff81253ba0 T pfr_update_stats +ffffffff81253e00 T pfr_attach_table +ffffffff81254020 T pfr_detach_table +ffffffff812540d0 T pfr_islinklocal +ffffffff81254120 T pfr_pool_get +ffffffff812548d0 T pfr_kentry_byidx +ffffffff81254960 T pfr_states_increase +ffffffff812549f0 T pfr_states_decrease +ffffffff81254ad0 T pfr_dynaddr_update ffffffff81255000 T pf_osfp_fingerprint ffffffff812550d0 T pf_osfp_fingerprint_hdr ffffffff81255580 T pf_osfp_find @@ -5277,13 +5277,13 @@ ffffffff8125a030 T pfi_set_flags ffffffff8125a250 T pfi_clear_flags ffffffff8125b000 T pf_hash ffffffff8125b0b0 T pf_get_sport -ffffffff8125b790 T pf_map_addr -ffffffff8125c3b0 T pf_map_addr_sticky -ffffffff8125c6d0 T pf_map_addr_states_increase -ffffffff8125c7a0 T pf_rand_addr -ffffffff8125c7e0 T pf_get_transaddr -ffffffff8125ca30 T pf_get_transaddr_af -ffffffff8125cf10 T pf_postprocess_addr +ffffffff8125b710 T pf_map_addr +ffffffff8125c330 T pf_map_addr_sticky +ffffffff8125c650 T pf_map_addr_states_increase +ffffffff8125c720 T pf_rand_addr +ffffffff8125c760 T pf_get_transaddr +ffffffff8125c9b0 T pf_get_transaddr_af +ffffffff8125ce90 T pf_postprocess_addr ffffffff8125e000 T pf_syncookies_init ffffffff8125e070 T pf_syncookie_rotate ffffffff8125e1e0 T pf_syncookies_setmode @@ -5426,15 +5426,15 @@ ffffffff8126a630 t pfsync_in_skip ffffffff8126a660 t pfsync_in_clr ffffffff8126a870 t pfsync_in_iack ffffffff8126a940 t pfsync_in_upd_c -ffffffff8126ad00 t pfsync_in_ureq -ffffffff8126b1d0 t pfsync_in_del -ffffffff8126b370 t pfsync_in_del_c -ffffffff8126b500 t pfsync_in_bus -ffffffff8126b550 t pfsync_in_ins -ffffffff8126b6a0 t pfsync_in_upd -ffffffff8126b870 t pfsync_in_tdb -ffffffff8126ba50 t pfsync_deferred -ffffffff8126bb40 t pfsync_in_updates +ffffffff8126ad10 t pfsync_in_ureq +ffffffff8126b1e0 t pfsync_in_del +ffffffff8126b380 t pfsync_in_del_c +ffffffff8126b510 t pfsync_in_bus +ffffffff8126b560 t pfsync_in_ins +ffffffff8126b6b0 t pfsync_in_upd +ffffffff8126b880 t pfsync_in_tdb +ffffffff8126ba60 t pfsync_deferred +ffffffff8126bb50 t pfsync_in_updates ffffffff8126c000 T pflow_clone_create ffffffff8126c300 T pflow_clone_destroy ffffffff8126c500 T pflowattach @@ -5453,18 +5453,18 @@ ffffffff8126d380 T pflow_sendout_ipfix_tmpl ffffffff8126d560 T pflow_calc_mtu ffffffff8126d610 T pflow_get_mbuf ffffffff8126d800 T copy_flow_data -ffffffff8126d970 T copy_flow_ipfix_4_data -ffffffff8126db50 T copy_flow_ipfix_6_data -ffffffff8126dd80 T export_pflow -ffffffff8126de40 T export_pflow_if -ffffffff8126e010 T pflow_pack_flow_ipfix -ffffffff8126e2e0 T pflow_pack_flow -ffffffff8126e560 T copy_flow_to_m -ffffffff8126e690 T pflow_sendout_v5 -ffffffff8126e800 T copy_flow_ipfix_4_to_m -ffffffff8126e960 T pflow_sendout_ipfix -ffffffff8126eba0 T copy_flow_ipfix_6_to_m -ffffffff8126ed00 T pflow_sysctl +ffffffff8126d980 T copy_flow_ipfix_4_data +ffffffff8126db60 T copy_flow_ipfix_6_data +ffffffff8126dd90 T export_pflow +ffffffff8126de50 T export_pflow_if +ffffffff8126e020 T pflow_pack_flow_ipfix +ffffffff8126e2f0 T pflow_pack_flow +ffffffff8126e520 T copy_flow_to_m +ffffffff8126e650 T pflow_sendout_v5 +ffffffff8126e7c0 T copy_flow_ipfix_4_to_m +ffffffff8126e920 T pflow_sendout_ipfix +ffffffff8126eb60 T copy_flow_ipfix_6_to_m +ffffffff8126ecc0 T pflow_sysctl ffffffff8126f000 T bioattach ffffffff8126f030 T bioopen ffffffff8126f060 T bioclose @@ -5498,17 +5498,17 @@ ffffffff81271000 T pppoe_clone_create ffffffff812711f0 T pppoe_clone_destroy ffffffff81271340 T pppoeintr ffffffff81271410 T pppoe_disc_input -ffffffff81271d50 T pppoe_data_input -ffffffff81271ef0 T pppoeattach -ffffffff81271f20 t pppoe_ioctl -ffffffff812723f0 t pppoe_start -ffffffff812724d0 t pppoe_tls -ffffffff81272590 t pppoe_tlf -ffffffff812725e0 t pppoe_timeout -ffffffff81272a10 t pppoe_find_softc_by_hunique -ffffffff81272ae0 t pppoe_send_padr -ffffffff81272d90 t pppoe_output -ffffffff81272f00 t pppoe_send_padi +ffffffff81271d70 T pppoe_data_input +ffffffff81271f10 T pppoeattach +ffffffff81271f40 t pppoe_ioctl +ffffffff81272410 t pppoe_start +ffffffff812724f0 t pppoe_tls +ffffffff812725b0 t pppoe_tlf +ffffffff81272600 t pppoe_timeout +ffffffff81272a30 t pppoe_find_softc_by_hunique +ffffffff81272b00 t pppoe_send_padr +ffffffff81272db0 t pppoe_output +ffffffff81272f20 t pppoe_send_padi ffffffff81274000 T dtattach ffffffff81274080 T dtopen ffffffff81274230 T dtlookup @@ -6555,39 +6555,39 @@ ffffffff812e7bc0 T sigonstack ffffffff812e7c20 T sys_sigaltstack ffffffff812e7dc0 T sys_kill ffffffff812e7f80 T ptsignal -ffffffff812e84f0 T killpg1 -ffffffff812e8770 T sys_thrkill -ffffffff812e8820 T pgsignal -ffffffff812e88b0 T pgsigio -ffffffff812e8a50 T postsig_done -ffffffff812e8b20 T trapsignal -ffffffff812e9010 T setsigctx -ffffffff812e90f0 T initsiginfo -ffffffff812e91d0 T sigexit -ffffffff812e9260 T single_thread_set -ffffffff812e94f0 T proc_stop -ffffffff812e9640 T single_thread_clear -ffffffff812e9780 T psignal -ffffffff812e97a0 T cursig -ffffffff812e9ce0 T postsig -ffffffff812ea0c0 T coredump -ffffffff812ea4a0 T sigabort -ffffffff812ea540 T sigismasked -ffffffff812ea610 T coredump_write -ffffffff812ea780 T coredump_unmap -ffffffff812ea7a0 T sys_nosys -ffffffff812ea7f0 T sys___thrsigdivert -ffffffff812eaaa0 T userret -ffffffff812eac50 T single_thread_check -ffffffff812eacd0 T single_thread_check_locked -ffffffff812eae40 T single_thread_wait -ffffffff812eaef0 T sigio_del -ffffffff812eaf90 T sigio_unlink -ffffffff812eb0b0 T sigio_free -ffffffff812eb180 T sigio_freelist -ffffffff812eb270 T sigio_setown -ffffffff812eb4d0 T sigio_getown -ffffffff812eb550 T sigio_copy +ffffffff812e84d0 T killpg1 +ffffffff812e8750 T sys_thrkill +ffffffff812e8800 T pgsignal +ffffffff812e8890 T pgsigio +ffffffff812e8a30 T postsig_done +ffffffff812e8b00 T trapsignal +ffffffff812e8ff0 T setsigctx +ffffffff812e90d0 T initsiginfo +ffffffff812e91b0 T sigexit +ffffffff812e9240 T single_thread_set +ffffffff812e94d0 T proc_stop +ffffffff812e9620 T single_thread_clear +ffffffff812e9760 T psignal +ffffffff812e9780 T cursig +ffffffff812e9cc0 T postsig +ffffffff812ea0a0 T coredump +ffffffff812ea480 T sigabort +ffffffff812ea520 T sigismasked +ffffffff812ea5f0 T coredump_write +ffffffff812ea760 T coredump_unmap +ffffffff812ea780 T sys_nosys +ffffffff812ea7d0 T sys___thrsigdivert +ffffffff812eaa80 T userret +ffffffff812eac30 T single_thread_check +ffffffff812eacb0 T single_thread_check_locked +ffffffff812eae20 T single_thread_wait +ffffffff812eaed0 T sigio_del +ffffffff812eaf70 T sigio_unlink +ffffffff812eb090 T sigio_free +ffffffff812eb160 T sigio_freelist +ffffffff812eb250 T sigio_setown +ffffffff812eb4b0 T sigio_getown +ffffffff812eb530 T sigio_copy ffffffff812ec000 T smr_startup ffffffff812ec040 T smr_wakeup ffffffff812ec090 T smr_startup_thread @@ -6880,44 +6880,44 @@ ffffffff8130a4c0 t blst_radix_print ffffffff8130b000 T dkcksum ffffffff8130b060 T initdisklabel ffffffff8130b170 T checkdisklabel -ffffffff8130b6a0 T findblkname -ffffffff8130b730 T readdisksector -ffffffff8130b790 T readdoslabel -ffffffff8130bb20 T spoofgpt -ffffffff8130bfb0 T spoofmbr -ffffffff8130c460 T spooffat -ffffffff8130c510 T gpt_chk_mbr -ffffffff8130c650 T gpt_get_hdr -ffffffff8130c820 T gpt_get_parts -ffffffff8130c9f0 T gpt_get_fstype -ffffffff8130cbe0 T mbr_get_fstype -ffffffff8130cc80 T setdisklabel -ffffffff8130cf60 T duid_iszero -ffffffff8130cfb0 T duid_equal -ffffffff8130d000 T bounds_check_with_label -ffffffff8130d120 T diskerr -ffffffff8130d3c0 T disk_init -ffffffff8130d410 T disk_construct -ffffffff8130d470 T disk_attach -ffffffff8130d6e0 T findblkmajor -ffffffff8130d7e0 T disk_attach_callback -ffffffff8130d880 T disk_readlabel -ffffffff8130da00 T disk_detach -ffffffff8130daf0 T disk_openpart -ffffffff8130dbd0 T disk_closepart -ffffffff8130dc70 T disk_gone -ffffffff8130dd80 T disk_busy -ffffffff8130ddd0 T disk_unbusy -ffffffff8130df20 T disk_lock -ffffffff8130df40 T disk_lock_nointr -ffffffff8130df60 T disk_unlock -ffffffff8130df80 T dk_mountroot -ffffffff8130e080 T getdisk -ffffffff8130e130 T parsedisk -ffffffff8130e320 T setroot -ffffffff8130f120 T duid_format -ffffffff8130f1f0 T disk_map -ffffffff8130f3d0 T disk_lookup +ffffffff8130b690 T findblkname +ffffffff8130b720 T readdisksector +ffffffff8130b780 T readdoslabel +ffffffff8130bb10 T spoofgpt +ffffffff8130bfa0 T spoofmbr +ffffffff8130c450 T spooffat +ffffffff8130c500 T gpt_chk_mbr +ffffffff8130c640 T gpt_get_hdr +ffffffff8130c810 T gpt_get_parts +ffffffff8130c9e0 T gpt_get_fstype +ffffffff8130cbd0 T mbr_get_fstype +ffffffff8130cc70 T setdisklabel +ffffffff8130cf50 T duid_iszero +ffffffff8130cfa0 T duid_equal +ffffffff8130cff0 T bounds_check_with_label +ffffffff8130d110 T diskerr +ffffffff8130d3b0 T disk_init +ffffffff8130d400 T disk_construct +ffffffff8130d460 T disk_attach +ffffffff8130d6d0 T findblkmajor +ffffffff8130d7d0 T disk_attach_callback +ffffffff8130d870 T disk_readlabel +ffffffff8130d9f0 T disk_detach +ffffffff8130dae0 T disk_openpart +ffffffff8130dbc0 T disk_closepart +ffffffff8130dc60 T disk_gone +ffffffff8130dd70 T disk_busy +ffffffff8130ddc0 T disk_unbusy +ffffffff8130df10 T disk_lock +ffffffff8130df30 T disk_lock_nointr +ffffffff8130df50 T disk_unlock +ffffffff8130df70 T dk_mountroot +ffffffff8130e070 T getdisk +ffffffff8130e120 T parsedisk +ffffffff8130e310 T setroot +ffffffff8130f110 T duid_format +ffffffff8130f1e0 T disk_map +ffffffff8130f3c0 T disk_lookup ffffffff81310000 T evcount_attach ffffffff81310090 T evcount_percpu ffffffff81310130 T evcount_init_percpu @@ -8419,111 +8419,111 @@ ffffffff813ad030 T sppp_input ffffffff813ad3b0 T sppp_cp_send ffffffff813ad6a0 T sppp_cp_input ffffffff813ae250 T sppp_pap_input -ffffffff813ae840 T sppp_chap_input -ffffffff813af1e0 T sppp_output -ffffffff813af470 T sppp_attach -ffffffff813af710 T sppp_keepalive -ffffffff813af8e0 T sppp_rtrequest -ffffffff813afa80 T sppp_pap_my_TO -ffffffff813afb70 T sppp_lcp_init -ffffffff813afc10 T sppp_ipcp_init -ffffffff813afc80 T sppp_ipv6cp_init -ffffffff813afcd0 T sppp_pap_init -ffffffff813afd10 T sppp_chap_init -ffffffff813afd50 T sppp_detach -ffffffff813aff10 T sppp_ipcp_destroy -ffffffff813aff50 T sppp_ipv6cp_destroy -ffffffff813aff80 T sppp_flush -ffffffff813affc0 T sppp_isempty -ffffffff813b0030 T sppp_dequeue -ffffffff813b00c0 T sppp_ncp_check -ffffffff813b0100 T sppp_ioctl -ffffffff813b0370 T sppp_get_params -ffffffff813b0590 T sppp_set_params -ffffffff813b08e0 T sppp_proto_name -ffffffff813b09a0 T sppp_cp_type_name -ffffffff813b0a20 T sppp_print_bytes -ffffffff813b0ab0 T sppp_state_name -ffffffff813b0af0 T sppp_cp_change_state -ffffffff813b0c30 T sppp_up_event -ffffffff813b0d20 T sppp_down_event -ffffffff813b0e40 T sppp_open_event -ffffffff813b0f50 T sppp_close_event -ffffffff813b10f0 T sppp_increasing_timeout -ffffffff813b1140 T sppp_to_event -ffffffff813b1310 T sppp_lcp_up -ffffffff813b14f0 T sppp_lcp_down -ffffffff813b15d0 T sppp_lcp_open -ffffffff813b1620 T sppp_lcp_close -ffffffff813b1640 T sppp_lcp_TO -ffffffff813b1660 T sppp_lcp_RCR -ffffffff813b1e80 T sppp_lcp_opt_name -ffffffff813b1f10 T sppp_lcp_RCN_rej -ffffffff813b2110 T sppp_lcp_RCN_nak -ffffffff813b23c0 T sppp_lcp_tlu -ffffffff813b26c0 T sppp_set_phase -ffffffff813b2770 T sppp_lcp_check_and_close -ffffffff813b27c0 T sppp_lcp_tld -ffffffff813b2920 T sppp_lcp_tls -ffffffff813b29d0 T sppp_lcp_tlf -ffffffff813b2a80 T sppp_lcp_scr -ffffffff813b2bd0 T sppp_set_ip_addrs -ffffffff813b2ef0 T sppp_clear_ip_addrs -ffffffff813b31a0 T sppp_ipcp_up -ffffffff813b31c0 T sppp_ipcp_down -ffffffff813b31e0 T sppp_ipcp_open -ffffffff813b3200 T sppp_ipcp_close -ffffffff813b3220 T sppp_ipcp_TO -ffffffff813b3240 T sppp_ipcp_RCR -ffffffff813b3890 T sppp_ipcp_opt_name -ffffffff813b3940 T sppp_get_ip_addrs -ffffffff813b39d0 T sppp_dotted_quad -ffffffff813b3a50 T sppp_ipcp_RCN_rej -ffffffff813b3c30 T sppp_ipcp_RCN_nak -ffffffff813b3f40 T sppp_ipcp_tlu -ffffffff813b3f90 T sppp_ipcp_tld -ffffffff813b3fc0 T sppp_ipcp_tls -ffffffff813b40c0 T sppp_ipcp_tlf -ffffffff813b4150 T sppp_ipcp_scr -ffffffff813b4290 T sppp_update_ip6_addr -ffffffff813b4390 T sppp_ipv6cp_up -ffffffff813b43b0 T sppp_ipv6cp_down -ffffffff813b43d0 T sppp_ipv6cp_open -ffffffff813b4480 T sppp_get_ip6_addrs -ffffffff813b45c0 T sppp_ipv6cp_close -ffffffff813b45e0 T sppp_ipv6cp_TO -ffffffff813b4600 T sppp_ipv6cp_RCR -ffffffff813b4eb0 T sppp_ipv6cp_opt_name -ffffffff813b4f30 T sppp_set_ip6_addr -ffffffff813b5090 T sppp_suggest_ip6_addr -ffffffff813b5120 T sppp_ipv6cp_RCN_rej -ffffffff813b5290 T sppp_ipv6cp_RCN_nak -ffffffff813b57c0 T sppp_ipv6cp_tlu -ffffffff813b57f0 T sppp_ipv6cp_tld -ffffffff813b5820 T sppp_ipv6cp_tls -ffffffff813b5850 T sppp_ipv6cp_tlf -ffffffff813b58b0 T sppp_ipv6cp_scr -ffffffff813b5990 T sppp_auth_type_name -ffffffff813b5a30 T sppp_print_string -ffffffff813b5ab0 T sppp_auth_send -ffffffff813b5e20 T sppp_phase_network -ffffffff813b5fc0 T sppp_chap_open -ffffffff813b60d0 T sppp_chap_close -ffffffff813b6120 T sppp_chap_TO -ffffffff813b62e0 T sppp_chap_tlu -ffffffff813b6420 T sppp_chap_tld -ffffffff813b6480 T sppp_chap_scr -ffffffff813b6540 T sppp_pap_open -ffffffff813b6670 T sppp_pap_close -ffffffff813b66c0 T sppp_pap_TO -ffffffff813b67d0 T sppp_pap_tlu -ffffffff813b69e0 T sppp_pap_tld -ffffffff813b6a50 T sppp_pap_scr -ffffffff813b6b10 T sppp_update_gw_walker -ffffffff813b6b80 T sppp_update_gw -ffffffff813b6bf0 T sppp_update_dns -ffffffff813b6d60 T sppp_phase_name -ffffffff813b6da0 T sppp_null +ffffffff813ae830 T sppp_chap_input +ffffffff813af1d0 T sppp_output +ffffffff813af460 T sppp_attach +ffffffff813af700 T sppp_keepalive +ffffffff813af8d0 T sppp_rtrequest +ffffffff813afa70 T sppp_pap_my_TO +ffffffff813afb60 T sppp_lcp_init +ffffffff813afc00 T sppp_ipcp_init +ffffffff813afc70 T sppp_ipv6cp_init +ffffffff813afcc0 T sppp_pap_init +ffffffff813afd00 T sppp_chap_init +ffffffff813afd40 T sppp_detach +ffffffff813aff00 T sppp_ipcp_destroy +ffffffff813aff40 T sppp_ipv6cp_destroy +ffffffff813aff70 T sppp_flush +ffffffff813affb0 T sppp_isempty +ffffffff813b0020 T sppp_dequeue +ffffffff813b00b0 T sppp_ncp_check +ffffffff813b00f0 T sppp_ioctl +ffffffff813b0360 T sppp_get_params +ffffffff813b0580 T sppp_set_params +ffffffff813b08d0 T sppp_proto_name +ffffffff813b0990 T sppp_cp_type_name +ffffffff813b0a10 T sppp_print_bytes +ffffffff813b0aa0 T sppp_state_name +ffffffff813b0ae0 T sppp_cp_change_state +ffffffff813b0c20 T sppp_up_event +ffffffff813b0d10 T sppp_down_event +ffffffff813b0e30 T sppp_open_event +ffffffff813b0f40 T sppp_close_event +ffffffff813b10e0 T sppp_increasing_timeout +ffffffff813b1130 T sppp_to_event +ffffffff813b1300 T sppp_lcp_up +ffffffff813b14e0 T sppp_lcp_down +ffffffff813b15c0 T sppp_lcp_open +ffffffff813b1610 T sppp_lcp_close +ffffffff813b1630 T sppp_lcp_TO +ffffffff813b1650 T sppp_lcp_RCR +ffffffff813b1e70 T sppp_lcp_opt_name +ffffffff813b1f00 T sppp_lcp_RCN_rej +ffffffff813b2100 T sppp_lcp_RCN_nak +ffffffff813b23b0 T sppp_lcp_tlu +ffffffff813b26b0 T sppp_set_phase +ffffffff813b2760 T sppp_lcp_check_and_close +ffffffff813b27b0 T sppp_lcp_tld +ffffffff813b2910 T sppp_lcp_tls +ffffffff813b29c0 T sppp_lcp_tlf +ffffffff813b2a70 T sppp_lcp_scr +ffffffff813b2bc0 T sppp_set_ip_addrs +ffffffff813b2ee0 T sppp_clear_ip_addrs +ffffffff813b3160 T sppp_ipcp_up +ffffffff813b3180 T sppp_ipcp_down +ffffffff813b31a0 T sppp_ipcp_open +ffffffff813b31c0 T sppp_ipcp_close +ffffffff813b31e0 T sppp_ipcp_TO +ffffffff813b3200 T sppp_ipcp_RCR +ffffffff813b3850 T sppp_ipcp_opt_name +ffffffff813b3900 T sppp_get_ip_addrs +ffffffff813b3990 T sppp_dotted_quad +ffffffff813b3a10 T sppp_ipcp_RCN_rej +ffffffff813b3bf0 T sppp_ipcp_RCN_nak +ffffffff813b3f00 T sppp_ipcp_tlu +ffffffff813b3f50 T sppp_ipcp_tld +ffffffff813b3f80 T sppp_ipcp_tls +ffffffff813b4070 T sppp_ipcp_tlf +ffffffff813b4100 T sppp_ipcp_scr +ffffffff813b4240 T sppp_update_ip6_addr +ffffffff813b4340 T sppp_ipv6cp_up +ffffffff813b4360 T sppp_ipv6cp_down +ffffffff813b4380 T sppp_ipv6cp_open +ffffffff813b4430 T sppp_get_ip6_addrs +ffffffff813b4570 T sppp_ipv6cp_close +ffffffff813b4590 T sppp_ipv6cp_TO +ffffffff813b45b0 T sppp_ipv6cp_RCR +ffffffff813b4e60 T sppp_ipv6cp_opt_name +ffffffff813b4ee0 T sppp_set_ip6_addr +ffffffff813b5040 T sppp_suggest_ip6_addr +ffffffff813b50d0 T sppp_ipv6cp_RCN_rej +ffffffff813b5240 T sppp_ipv6cp_RCN_nak +ffffffff813b5770 T sppp_ipv6cp_tlu +ffffffff813b57a0 T sppp_ipv6cp_tld +ffffffff813b57d0 T sppp_ipv6cp_tls +ffffffff813b5800 T sppp_ipv6cp_tlf +ffffffff813b5860 T sppp_ipv6cp_scr +ffffffff813b5940 T sppp_auth_type_name +ffffffff813b59e0 T sppp_print_string +ffffffff813b5a60 T sppp_auth_send +ffffffff813b5dd0 T sppp_phase_network +ffffffff813b5f70 T sppp_chap_open +ffffffff813b6080 T sppp_chap_close +ffffffff813b60d0 T sppp_chap_TO +ffffffff813b6290 T sppp_chap_tlu +ffffffff813b63d0 T sppp_chap_tld +ffffffff813b6430 T sppp_chap_scr +ffffffff813b64f0 T sppp_pap_open +ffffffff813b6620 T sppp_pap_close +ffffffff813b6670 T sppp_pap_TO +ffffffff813b6780 T sppp_pap_tlu +ffffffff813b6990 T sppp_pap_tld +ffffffff813b6a00 T sppp_pap_scr +ffffffff813b6ac0 T sppp_update_gw_walker +ffffffff813b6b30 T sppp_update_gw +ffffffff813b6ba0 T sppp_update_dns +ffffffff813b6d10 T sppp_phase_name +ffffffff813b6d50 T sppp_null ffffffff813b7000 T loop_clone_create ffffffff813b7150 T loop_clone_destroy ffffffff813b7270 T loopattach @@ -8672,11 +8672,11 @@ ffffffff813c5200 T bridge_blocknonip ffffffff813c5310 T bridge_ip ffffffff813c5710 T bridge_broadcast ffffffff813c59d0 T bridge_fragment -ffffffff813c5d20 T bridge_ourether -ffffffff813c5d90 T bridge_ifinput -ffffffff813c5e00 T bridge_localbroadcast -ffffffff813c5ef0 T bridge_ipsec -ffffffff813c63c0 T bridge_send_icmp_err +ffffffff813c5d00 T bridge_ourether +ffffffff813c5d70 T bridge_ifinput +ffffffff813c5de0 T bridge_localbroadcast +ffffffff813c5ec0 T bridge_ipsec +ffffffff813c6390 T bridge_send_icmp_err ffffffff813c7000 T bridgectl_ioctl ffffffff813c7400 T bridge_rtfind ffffffff813c7710 T bridge_rtflush @@ -8696,8 +8696,8 @@ ffffffff813c8b60 T bridge_rtdelete ffffffff813c8c50 T bridge_copyaddr ffffffff813c8ca0 T bridge_update ffffffff813c8d90 T bridge_arpfilter -ffffffff813c8f40 T bridge_filterrule -ffffffff813c9050 T bridge_tunneluntag +ffffffff813c8f30 T bridge_filterrule +ffffffff813c9040 T bridge_tunneluntag ffffffff813ca000 T bstp_transmit ffffffff813ca140 T bstp_hello_timer_expiry ffffffff813ca1b0 T bstp_transmit_bpdu @@ -8706,57 +8706,57 @@ ffffffff813ca4b0 T bstp_timer_start ffffffff813ca4f0 T bstp_pdu_flags ffffffff813ca5c0 T bstp_send_bpdu ffffffff813ca730 T bstp_decode_bpdu -ffffffff813ca8c0 T bstp_input -ffffffff813caa30 T bstp_set_port_proto -ffffffff813caaa0 T bstp_received_stp -ffffffff813caba0 T bstp_received_rstp -ffffffff813cac70 T bstp_received_tcn -ffffffff813cac90 T bstp_received_bpdu -ffffffff813cb000 T bstp_update_tc -ffffffff813cb400 T bstp_pdu_rcvtype -ffffffff813cb560 T bstp_pdu_bettersame -ffffffff813cb640 T bstp_set_timer_msgage -ffffffff813cb6a0 T bstp_assign_roles -ffffffff813cbd90 T bstp_update_state -ffffffff813cbe00 T bstp_info_superior -ffffffff813cbf00 T bstp_info_cmp -ffffffff813cbf80 T bstp_same_bridgeid -ffffffff813cc020 T bstp_reset -ffffffff813cc090 T bstp_set_port_role -ffffffff813cc220 T bstp_update_info -ffffffff813cc320 T bstp_update_roles -ffffffff813cc7a0 T bstp_set_all_sync -ffffffff813cc800 T bstp_set_all_reroot -ffffffff813cc850 T bstp_rerooted -ffffffff813cc8b0 T bstp_set_port_state -ffffffff813cc930 T bstp_timer_stop -ffffffff813cc960 T bstp_set_port_tc -ffffffff813ccca0 T bstp_set_other_tcprop -ffffffff813ccd00 T bstp_timer_latch -ffffffff813ccd40 T bstp_notify_rtage -ffffffff813ccdf0 T bstp_set_timer_tc -ffffffff813cce80 T bstp_calc_path_cost -ffffffff813ccf60 T bstp_ifstate -ffffffff813cd050 T bstp_ifupdstatus -ffffffff813cd1f0 T bstp_enable_port -ffffffff813cd210 T bstp_disable_port -ffffffff813cd240 T bstp_tick -ffffffff813cd630 T bstp_timer_expired -ffffffff813cd680 T bstp_message_age_expiry -ffffffff813cd6c0 T bstp_migrate_delay_expiry -ffffffff813cd6f0 T bstp_edge_delay_expiry -ffffffff813cd740 T bstp_addr_cmp -ffffffff813cd7b0 T bstp_initialization -ffffffff813cda60 T bstp_stop -ffffffff813cdad0 T bstp_create -ffffffff813cdb50 T bstp_destroy -ffffffff813cdbc0 T bstp_enable -ffffffff813cdbe0 T bstp_disable -ffffffff813cdc30 T bstp_add -ffffffff813cde90 T bstp_delete -ffffffff813cdf40 T bstp_getstate -ffffffff813cdfa0 T bstp_ifsflags -ffffffff813ce040 T bstp_ioctl +ffffffff813ca830 T bstp_input +ffffffff813ca9a0 T bstp_set_port_proto +ffffffff813caa10 T bstp_received_stp +ffffffff813cab10 T bstp_received_rstp +ffffffff813cabe0 T bstp_received_tcn +ffffffff813cac00 T bstp_received_bpdu +ffffffff813caf70 T bstp_update_tc +ffffffff813cb370 T bstp_pdu_rcvtype +ffffffff813cb4d0 T bstp_pdu_bettersame +ffffffff813cb5b0 T bstp_set_timer_msgage +ffffffff813cb610 T bstp_assign_roles +ffffffff813cbd00 T bstp_update_state +ffffffff813cbd70 T bstp_info_superior +ffffffff813cbe70 T bstp_info_cmp +ffffffff813cbef0 T bstp_same_bridgeid +ffffffff813cbf90 T bstp_reset +ffffffff813cc000 T bstp_set_port_role +ffffffff813cc190 T bstp_update_info +ffffffff813cc290 T bstp_update_roles +ffffffff813cc710 T bstp_set_all_sync +ffffffff813cc770 T bstp_set_all_reroot +ffffffff813cc7c0 T bstp_rerooted +ffffffff813cc820 T bstp_set_port_state +ffffffff813cc8a0 T bstp_timer_stop +ffffffff813cc8d0 T bstp_set_port_tc +ffffffff813ccc10 T bstp_set_other_tcprop +ffffffff813ccc70 T bstp_timer_latch +ffffffff813cccb0 T bstp_notify_rtage +ffffffff813ccd60 T bstp_set_timer_tc +ffffffff813ccdf0 T bstp_calc_path_cost +ffffffff813cced0 T bstp_ifstate +ffffffff813ccfc0 T bstp_ifupdstatus +ffffffff813cd160 T bstp_enable_port +ffffffff813cd180 T bstp_disable_port +ffffffff813cd1b0 T bstp_tick +ffffffff813cd5a0 T bstp_timer_expired +ffffffff813cd5f0 T bstp_message_age_expiry +ffffffff813cd630 T bstp_migrate_delay_expiry +ffffffff813cd660 T bstp_edge_delay_expiry +ffffffff813cd6b0 T bstp_addr_cmp +ffffffff813cd720 T bstp_initialization +ffffffff813cd9d0 T bstp_stop +ffffffff813cda40 T bstp_create +ffffffff813cdac0 T bstp_destroy +ffffffff813cdb30 T bstp_enable +ffffffff813cdb50 T bstp_disable +ffffffff813cdba0 T bstp_add +ffffffff813cde00 T bstp_delete +ffffffff813cdeb0 T bstp_getstate +ffffffff813cdf10 T bstp_ifsflags +ffffffff813cdfb0 T bstp_ioctl ffffffff813cf000 T etherbridge_init ffffffff813cf150 t etherbridge_age ffffffff813cf300 T etherbridge_up @@ -8770,14 +8770,14 @@ ffffffff813cf5f0 T etherbridge_map ffffffff813cf940 t ebt_replace ffffffff813cf9f0 T etherbridge_add_addr ffffffff813cfbf0 T etherbridge_del_addr -ffffffff813cfe00 T etherbridge_detach_port -ffffffff813cffd0 T etherbridge_flush -ffffffff813d01a0 T etherbridge_rtfind -ffffffff813d0400 T etherbridge_set_max -ffffffff813d0450 T etherbridge_get_max -ffffffff813d0480 T etherbridge_set_tmo -ffffffff813d04d0 T etherbridge_get_tmo -ffffffff813d0500 t eb_tree_RBT_COMPARE +ffffffff813cfde0 T etherbridge_detach_port +ffffffff813cffb0 T etherbridge_flush +ffffffff813d0180 T etherbridge_rtfind +ffffffff813d03e0 T etherbridge_set_max +ffffffff813d0430 T etherbridge_get_max +ffffffff813d0460 T etherbridge_set_tmo +ffffffff813d04b0 T etherbridge_get_tmo +ffffffff813d04e0 t eb_tree_RBT_COMPARE ffffffff813d1000 T vebattach ffffffff813d1030 t veb_clone_create ffffffff813d1220 t veb_clone_destroy @@ -8808,22 +8808,22 @@ ffffffff813d3560 t vport_if_enqueue ffffffff813d35a0 t veb_span_input ffffffff813d35e0 t veb_vport_input ffffffff813d3610 t veb_port_input -ffffffff813d3b30 t veb_eb_brport_take -ffffffff813d3b50 t veb_eb_brport_rele -ffffffff813d3b70 t veb_p_linkch -ffffffff813d3c10 t veb_p_detach -ffffffff813d3c70 t veb_p_ioctl -ffffffff813d3db0 t veb_p_output -ffffffff813d3e90 t veb_ports_destroy -ffffffff813d3ef0 t veb_rule_filter -ffffffff813d4180 t veb_pf -ffffffff813d42f0 t veb_transmit -ffffffff813d4400 t veb_p_dtor -ffffffff813d45e0 t veb_p_unlink -ffffffff813d46b0 t vport_clone_create -ffffffff813d47b0 t vport_clone_destroy -ffffffff813d4880 t vport_ioctl -ffffffff813d49b0 t vport_start +ffffffff813d3b20 t veb_eb_brport_take +ffffffff813d3b40 t veb_eb_brport_rele +ffffffff813d3b60 t veb_p_linkch +ffffffff813d3c00 t veb_p_detach +ffffffff813d3c60 t veb_p_ioctl +ffffffff813d3da0 t veb_p_output +ffffffff813d3e80 t veb_ports_destroy +ffffffff813d3ee0 t veb_rule_filter +ffffffff813d4170 t veb_pf +ffffffff813d42e0 t veb_transmit +ffffffff813d43f0 t veb_p_dtor +ffffffff813d45d0 t veb_p_unlink +ffffffff813d46a0 t vport_clone_create +ffffffff813d47a0 t vport_clone_destroy +ffffffff813d4870 t vport_ioctl +ffffffff813d49a0 t vport_start ffffffff813d5000 T vlan_clone_create ffffffff813d5170 T vlan_clone_destroy ffffffff813d5280 T vlanattach @@ -8838,21 +8838,21 @@ ffffffff813d5ce0 T vlan_transmit ffffffff813d5e20 T vlan_inject ffffffff813d5ef0 T vlan_strip ffffffff813d5f60 T vlan_input -ffffffff813d61f0 T vlan_up -ffffffff813d6540 T vlan_inuse_locked -ffffffff813d65c0 T vlan_multi_apply -ffffffff813d6680 T vlan_link_state -ffffffff813d66e0 T vlan_set_vnetid -ffffffff813d68f0 T vlan_set_parent -ffffffff813d6aa0 T vlan_del_parent -ffffffff813d6b10 T vlan_multi_add -ffffffff813d6d00 T vlan_multi_del -ffffffff813d6eb0 T vlan_media_get -ffffffff813d6f30 T vlan_setlladdr -ffffffff813d7030 T vlan_set_compat -ffffffff813d7260 T vlan_get_compat -ffffffff813d7300 T vlan_iff -ffffffff813d73d0 T vlan_inuse +ffffffff813d6200 T vlan_up +ffffffff813d6550 T vlan_inuse_locked +ffffffff813d65d0 T vlan_multi_apply +ffffffff813d6690 T vlan_link_state +ffffffff813d66f0 T vlan_set_vnetid +ffffffff813d6900 T vlan_set_parent +ffffffff813d6ab0 T vlan_del_parent +ffffffff813d6b20 T vlan_multi_add +ffffffff813d6d10 T vlan_multi_del +ffffffff813d6ec0 T vlan_media_get +ffffffff813d6f40 T vlan_setlladdr +ffffffff813d7040 T vlan_set_compat +ffffffff813d7270 T vlan_get_compat +ffffffff813d7310 T vlan_iff +ffffffff813d73e0 T vlan_inuse ffffffff813d8000 T pipex_init ffffffff813d8150 T pipex_destroy_all_sessions ffffffff813d8230 T pipex_unlink_session_locked @@ -8880,40 +8880,40 @@ ffffffff813d9ad0 T pipex_iterator ffffffff813d9c50 T pipex_ip_output ffffffff813d9f50 T ip_is_idle_packet ffffffff813da170 T adjust_tcp_mss -ffffffff813da320 T pipex_ppp_output -ffffffff813da490 T pipex_mppe_output -ffffffff813da680 T pipex_pppoe_output -ffffffff813da840 T pipex_pptp_output -ffffffff813dab10 T pipex_l2tp_output -ffffffff813daea0 T pipex_ppp_input -ffffffff813db270 T pipex_ppp_proto -ffffffff813db390 T pipex_mppe_input -ffffffff813db7e0 T pipex_ccp_input -ffffffff813db8b0 T pipex_ip_input -ffffffff813dbb40 T pipex_ip6_input -ffffffff813dbc90 T pipex_session_log -ffffffff813dbde0 T pipex_common_input -ffffffff813dc050 T pipex_pppoe_lookup_session -ffffffff813dc130 T pipex_pppoe_input -ffffffff813dc210 T pipex_pptp_lookup_session -ffffffff813dc2c0 T pipex_pptp_input -ffffffff813dc6a0 T pipex_pptp_userland_lookup_session_ipv4 -ffffffff813dc700 T pipex_pptp_userland_lookup_session -ffffffff813dc890 T pipex_pptp_userland_lookup_session_ipv6 -ffffffff813dc920 T pipex_sockaddr_compar_addr -ffffffff813dc9b0 T pipex_pptp_userland_output -ffffffff813dcb10 T pipex_l2tp_lookup_session -ffffffff813dcb90 T pipex_l2tp_input -ffffffff813dcfa0 T pipex_l2tp_userland_lookup_session_ipv4 -ffffffff813dd000 T pipex_l2tp_userland_lookup_session -ffffffff813dd1c0 T pipex_l2tp_userland_lookup_session_ipv6 -ffffffff813dd250 T pipex_l2tp_userland_output -ffffffff813dd3a0 T pipex_mppe_init -ffffffff813dd550 T GetNewKeyFromSHA -ffffffff813dd620 T pipex_mppe_reduce_key -ffffffff813dd670 T mppe_key_change -ffffffff813dd7d0 T pipex_ccp_output -ffffffff813dd8a0 T pipex_sysctl +ffffffff813da310 T pipex_ppp_output +ffffffff813da480 T pipex_mppe_output +ffffffff813da660 T pipex_pppoe_output +ffffffff813da820 T pipex_pptp_output +ffffffff813daaf0 T pipex_l2tp_output +ffffffff813dae80 T pipex_ppp_input +ffffffff813db250 T pipex_ppp_proto +ffffffff813db370 T pipex_mppe_input +ffffffff813db7c0 T pipex_ccp_input +ffffffff813db890 T pipex_ip_input +ffffffff813dbb20 T pipex_ip6_input +ffffffff813dbc70 T pipex_session_log +ffffffff813dbdc0 T pipex_common_input +ffffffff813dc030 T pipex_pppoe_lookup_session +ffffffff813dc110 T pipex_pppoe_input +ffffffff813dc1f0 T pipex_pptp_lookup_session +ffffffff813dc290 T pipex_pptp_input +ffffffff813dc670 T pipex_pptp_userland_lookup_session_ipv4 +ffffffff813dc6d0 T pipex_pptp_userland_lookup_session +ffffffff813dc860 T pipex_pptp_userland_lookup_session_ipv6 +ffffffff813dc8f0 T pipex_sockaddr_compar_addr +ffffffff813dc980 T pipex_pptp_userland_output +ffffffff813dcae0 T pipex_l2tp_lookup_session +ffffffff813dcb60 T pipex_l2tp_input +ffffffff813dcf70 T pipex_l2tp_userland_lookup_session_ipv4 +ffffffff813dcfd0 T pipex_l2tp_userland_lookup_session +ffffffff813dd1a0 T pipex_l2tp_userland_lookup_session_ipv6 +ffffffff813dd230 T pipex_l2tp_userland_output +ffffffff813dd380 T pipex_mppe_init +ffffffff813dd530 T GetNewKeyFromSHA +ffffffff813dd600 T pipex_mppe_reduce_key +ffffffff813dd650 T mppe_key_change +ffffffff813dd7b0 T pipex_ccp_output +ffffffff813dd880 T pipex_sysctl ffffffff813de000 T rn_search_m ffffffff813de070 T rn_refines ffffffff813de170 T rn_lookup @@ -9095,58 +9095,58 @@ ffffffff813ef440 t gre_output ffffffff813ef5b0 t gre_start ffffffff813ef6c0 t gre_ioctl ffffffff813efab0 t gre_keepalive_send -ffffffff813efe00 t gre_keepalive_hold -ffffffff813efea0 t gre_l3_encap_dst -ffffffff813f00a0 t gre_ip_output -ffffffff813f00f0 t gre_encap_dst_ip -ffffffff813f0250 t gre_down -ffffffff813f0330 t gre_tunnel_ioctl -ffffffff813f07d0 t gre_set_tunnel -ffffffff813f0970 t mgre_rtrequest -ffffffff813f0aa0 t mgre_output -ffffffff813f0cd0 t mgre_start -ffffffff813f0e20 t mgre_ioctl -ffffffff813f12c0 t mgre_up -ffffffff813f13b0 t mgre_down -ffffffff813f1420 t egre_ioctl -ffffffff813f1660 t egre_start -ffffffff813f18e0 t egre_media_change -ffffffff813f1910 t egre_media_status -ffffffff813f1950 t egre_up -ffffffff813f19f0 t egre_down -ffffffff813f1a60 t nvgre_ioctl -ffffffff813f2360 t nvgre_start -ffffffff813f2640 t nvgre_send -ffffffff813f27e0 t nvgre_link_change -ffffffff813f2810 t nvgre_detach -ffffffff813f2880 t nvgre_eb_port_eq -ffffffff813f28f0 t nvgre_eb_port_take -ffffffff813f2950 t nvgre_eb_port_rele -ffffffff813f2970 t nvgre_eb_port_ifname -ffffffff813f2990 t nvgre_eb_port_sa -ffffffff813f2a00 t nvgre_up -ffffffff813f2bd0 t nvgre_down -ffffffff813f2d10 t nvgre_set_parent -ffffffff813f2da0 t eoip_ioctl -ffffffff813f33a0 t eoip_start -ffffffff813f35d0 t eoip_keepalive_send -ffffffff813f3780 t eoip_keepalive_hold -ffffffff813f3820 t eoip_up -ffffffff813f38f0 t eoip_down -ffffffff813f39c0 t egre_input -ffffffff813f3b00 t nvgre_input -ffffffff813f3dd0 t gre_find -ffffffff813f3e50 t mgre_find -ffffffff813f3ee0 t gre_ipv4_patch -ffffffff813f3f90 t gre_ipv6_patch -ffffffff813f4060 t gre_mpls_patch -ffffffff813f4100 t gre_keepalive_recv -ffffffff813f4320 t gre_cmp -ffffffff813f4430 t mgre_tree_RBT_COMPARE -ffffffff813f4500 t egre_tree_RBT_COMPARE -ffffffff813f4510 t nvgre_ucast_tree_RBT_COMPARE -ffffffff813f45d0 t nvgre_mcast_tree_RBT_COMPARE -ffffffff813f46a0 t eoip_tree_RBT_COMPARE +ffffffff813efde0 t gre_keepalive_hold +ffffffff813efe80 t gre_l3_encap_dst +ffffffff813f0070 t gre_ip_output +ffffffff813f00c0 t gre_encap_dst_ip +ffffffff813f0230 t gre_down +ffffffff813f0310 t gre_tunnel_ioctl +ffffffff813f07a0 t gre_set_tunnel +ffffffff813f0940 t mgre_rtrequest +ffffffff813f0a70 t mgre_output +ffffffff813f0ca0 t mgre_start +ffffffff813f0df0 t mgre_ioctl +ffffffff813f1290 t mgre_up +ffffffff813f1380 t mgre_down +ffffffff813f13f0 t egre_ioctl +ffffffff813f1630 t egre_start +ffffffff813f1890 t egre_media_change +ffffffff813f18c0 t egre_media_status +ffffffff813f1900 t egre_up +ffffffff813f19a0 t egre_down +ffffffff813f1a10 t nvgre_ioctl +ffffffff813f2310 t nvgre_start +ffffffff813f25e0 t nvgre_send +ffffffff813f2780 t nvgre_link_change +ffffffff813f27b0 t nvgre_detach +ffffffff813f2820 t nvgre_eb_port_eq +ffffffff813f2890 t nvgre_eb_port_take +ffffffff813f28f0 t nvgre_eb_port_rele +ffffffff813f2910 t nvgre_eb_port_ifname +ffffffff813f2930 t nvgre_eb_port_sa +ffffffff813f29a0 t nvgre_up +ffffffff813f2b70 t nvgre_down +ffffffff813f2cb0 t nvgre_set_parent +ffffffff813f2d40 t eoip_ioctl +ffffffff813f3340 t eoip_start +ffffffff813f3570 t eoip_keepalive_send +ffffffff813f3720 t eoip_keepalive_hold +ffffffff813f37c0 t eoip_up +ffffffff813f3890 t eoip_down +ffffffff813f3960 t egre_input +ffffffff813f3aa0 t nvgre_input +ffffffff813f3d70 t gre_find +ffffffff813f3df0 t mgre_find +ffffffff813f3e80 t gre_ipv4_patch +ffffffff813f3f30 t gre_ipv6_patch +ffffffff813f4000 t gre_mpls_patch +ffffffff813f40a0 t gre_keepalive_recv +ffffffff813f42c0 t gre_cmp +ffffffff813f43d0 t mgre_tree_RBT_COMPARE +ffffffff813f44a0 t egre_tree_RBT_COMPARE +ffffffff813f44b0 t nvgre_ucast_tree_RBT_COMPARE +ffffffff813f4570 t nvgre_mcast_tree_RBT_COMPARE +ffffffff813f4640 t eoip_tree_RBT_COMPARE ffffffff813f5000 T trunk_clone_create ffffffff813f5210 T trunk_clone_destroy ffffffff813f5310 T trunkattach @@ -9176,45 +9176,45 @@ ffffffff813f73e0 T trunk_init ffffffff813f7430 T trunk_stop ffffffff813f7480 T trunk_ioctl_allports ffffffff813f7570 T trunk_hashmbuf -ffffffff813f7820 T trunk_gethdr -ffffffff813f7880 T trunk_rr_attach -ffffffff813f7930 T trunk_rr_detach -ffffffff813f7970 T trunk_rr_start -ffffffff813f7a70 T trunk_rr_input -ffffffff813f7aa0 T trunk_rr_port_destroy -ffffffff813f7ae0 T trunk_fail_attach -ffffffff813f7ba0 T trunk_fail_detach -ffffffff813f7be0 T trunk_fail_start -ffffffff813f7c40 T trunk_fail_input -ffffffff813f7c90 T trunk_fail_port_create -ffffffff813f7ce0 T trunk_fail_port_destroy -ffffffff813f7d60 T trunk_fail_linkstate -ffffffff813f7db0 T trunk_lb_attach -ffffffff813f7ea0 T trunk_lb_detach -ffffffff813f7ef0 T trunk_lb_start -ffffffff813f7f80 T trunk_lb_input -ffffffff813f7fb0 T trunk_lb_port_create -ffffffff813f8090 T trunk_lb_port_destroy -ffffffff813f8170 T trunk_lb_porttable -ffffffff813f8260 T trunk_bcast_attach -ffffffff813f8300 T trunk_bcast_detach -ffffffff813f8330 T trunk_bcast_start -ffffffff813f8430 T trunk_bcast_input -ffffffff813f8460 T trunk_lacp_attach -ffffffff813f8550 T trunk_lacp_detach -ffffffff813f85a0 T trunk_lacp_start -ffffffff813f8600 T trunk_lacp_input +ffffffff813f7830 T trunk_gethdr +ffffffff813f7890 T trunk_rr_attach +ffffffff813f7940 T trunk_rr_detach +ffffffff813f7980 T trunk_rr_start +ffffffff813f7a80 T trunk_rr_input +ffffffff813f7ab0 T trunk_rr_port_destroy +ffffffff813f7af0 T trunk_fail_attach +ffffffff813f7bb0 T trunk_fail_detach +ffffffff813f7bf0 T trunk_fail_start +ffffffff813f7c50 T trunk_fail_input +ffffffff813f7ca0 T trunk_fail_port_create +ffffffff813f7cf0 T trunk_fail_port_destroy +ffffffff813f7d70 T trunk_fail_linkstate +ffffffff813f7dc0 T trunk_lb_attach +ffffffff813f7eb0 T trunk_lb_detach +ffffffff813f7f00 T trunk_lb_start +ffffffff813f7f90 T trunk_lb_input +ffffffff813f7fc0 T trunk_lb_port_create +ffffffff813f80a0 T trunk_lb_port_destroy +ffffffff813f8180 T trunk_lb_porttable +ffffffff813f8270 T trunk_bcast_attach +ffffffff813f8310 T trunk_bcast_detach +ffffffff813f8340 T trunk_bcast_start +ffffffff813f8440 T trunk_bcast_input +ffffffff813f8470 T trunk_lacp_attach +ffffffff813f8560 T trunk_lacp_detach +ffffffff813f85b0 T trunk_lacp_start +ffffffff813f8610 T trunk_lacp_input ffffffff813f9000 T lacp_sm_rx_timer ffffffff813f9100 T lacp_sm_ptx_timer ffffffff813f9130 T lacp_sm_mux_timer ffffffff813f91a0 T lacp_default_partner ffffffff813f91f0 T lacp_input -ffffffff813f92f0 T lacp_input_process -ffffffff813f93d0 T lacp_pdu_input -ffffffff813f94e0 T lacp_marker_input -ffffffff813f9700 T tlv_check -ffffffff813f9790 T lacp_sm_rx -ffffffff813f98a0 T lacp_fill_actorinfo +ffffffff813f92e0 T lacp_input_process +ffffffff813f93c0 T lacp_pdu_input +ffffffff813f94d0 T lacp_marker_input +ffffffff813f96f0 T tlv_check +ffffffff813f9780 T lacp_sm_rx +ffffffff813f9890 T lacp_fill_actorinfo ffffffff813f9920 T lacp_fill_markerinfo ffffffff813f9970 T lacp_xmit_lacpdu ffffffff813f9af0 T lacp_xmit_marker @@ -9229,44 +9229,44 @@ ffffffff813fa440 T lacp_sm_mux ffffffff813fa600 T lacp_sm_tx ffffffff813fa7c0 T lacp_sm_ptx_tx_schedule ffffffff813fa820 T lacp_port_create -ffffffff813faa30 T lacp_sm_rx_set_expired -ffffffff813faa70 T lacp_port_destroy -ffffffff813fab60 T lacp_disable_collecting -ffffffff813fab90 T lacp_disable_distributing -ffffffff813fad80 T lacp_unselect -ffffffff813fae10 T lacp_req -ffffffff813faf00 T lacp_port_status -ffffffff813faf70 T lacp_portreq -ffffffff813fb030 T lacp_enable_collecting -ffffffff813fb060 T lacp_suppress_distributing -ffffffff813fb230 T lacp_select_active_aggregator -ffffffff813fb440 T lacp_update_portmap -ffffffff813fb530 T lacp_enable_distributing -ffffffff813fb6b0 T lacp_transit_expire -ffffffff813fb6e0 T lacp_attach -ffffffff813fb810 T lacp_init -ffffffff813fb830 T lacp_detach -ffffffff813fb8f0 T lacp_stop -ffffffff813fb920 T lacp_select_tx_port -ffffffff813fb9e0 T lacp_compare_peerinfo -ffffffff813fba00 T lacp_compare_systemid -ffffffff813fba20 T lacp_aggregator_bandwidth -ffffffff813fba70 T lacp_aggregator_addref -ffffffff813fbaf0 T lacp_aggregator_delref -ffffffff813fbc00 T lacp_aggregator_get -ffffffff813fbc90 T lacp_fill_aggregator_id -ffffffff813fbd10 T lacp_fill_aggregator_id_peer -ffffffff813fbd60 T lacp_aggregator_is_compatible -ffffffff813fbe20 T lacp_peerinfo_is_compatible -ffffffff813fbe90 T lacp_set_mux -ffffffff813fc000 T lacp_sm_rx_record_default -ffffffff813fc060 T lacp_sm_assert_ntt -ffffffff813fc090 T lacp_sm_ptx_update_timeout -ffffffff813fc0e0 T lacp_sm_rx_update_selected -ffffffff813fc150 T lacp_sm_rx_update_ntt -ffffffff813fc1c0 T lacp_sm_rx_record_pdu -ffffffff813fc2e0 T lacp_sm_rx_update_default_selected -ffffffff813fc370 T lacp_sm_rx_update_selected_from_peerinfo +ffffffff813faa40 T lacp_sm_rx_set_expired +ffffffff813faa80 T lacp_port_destroy +ffffffff813fab70 T lacp_disable_collecting +ffffffff813faba0 T lacp_disable_distributing +ffffffff813fad90 T lacp_unselect +ffffffff813fae20 T lacp_req +ffffffff813faf10 T lacp_port_status +ffffffff813faf80 T lacp_portreq +ffffffff813fb040 T lacp_enable_collecting +ffffffff813fb070 T lacp_suppress_distributing +ffffffff813fb240 T lacp_select_active_aggregator +ffffffff813fb450 T lacp_update_portmap +ffffffff813fb540 T lacp_enable_distributing +ffffffff813fb6c0 T lacp_transit_expire +ffffffff813fb6f0 T lacp_attach +ffffffff813fb820 T lacp_init +ffffffff813fb840 T lacp_detach +ffffffff813fb900 T lacp_stop +ffffffff813fb930 T lacp_select_tx_port +ffffffff813fb9f0 T lacp_compare_peerinfo +ffffffff813fba10 T lacp_compare_systemid +ffffffff813fba30 T lacp_aggregator_bandwidth +ffffffff813fba80 T lacp_aggregator_addref +ffffffff813fbb00 T lacp_aggregator_delref +ffffffff813fbc10 T lacp_aggregator_get +ffffffff813fbca0 T lacp_fill_aggregator_id +ffffffff813fbd20 T lacp_fill_aggregator_id_peer +ffffffff813fbd70 T lacp_aggregator_is_compatible +ffffffff813fbe30 T lacp_peerinfo_is_compatible +ffffffff813fbea0 T lacp_set_mux +ffffffff813fc010 T lacp_sm_rx_record_default +ffffffff813fc070 T lacp_sm_assert_ntt +ffffffff813fc0a0 T lacp_sm_ptx_update_timeout +ffffffff813fc0f0 T lacp_sm_rx_update_selected +ffffffff813fc160 T lacp_sm_rx_update_ntt +ffffffff813fc1d0 T lacp_sm_rx_record_pdu +ffffffff813fc2f0 T lacp_sm_rx_update_default_selected +ffffffff813fc380 T lacp_sm_rx_update_selected_from_peerinfo ffffffff813fd000 T aggrattach ffffffff813fd020 t aggr_clone_create ffffffff813fd230 t aggr_clone_destroy @@ -9312,12 +9312,12 @@ ffffffff81402a20 t tpmr_down ffffffff81402a90 t tpmr_p_linkch ffffffff81402b90 t tpmr_p_detach ffffffff81402c10 t tpmr_input -ffffffff81402ee0 t tpmr_p_take -ffffffff81402f10 t tpmr_p_rele -ffffffff81402f80 t tpmr_p_ioctl -ffffffff814030b0 t tpmr_p_output -ffffffff81403190 t tpmr_p_dtor -ffffffff814032e0 t tpmr_pf +ffffffff81402ed0 t tpmr_p_take +ffffffff81402f00 t tpmr_p_rele +ffffffff81402f70 t tpmr_p_ioctl +ffffffff814030a0 t tpmr_p_output +ffffffff81403180 t tpmr_p_dtor +ffffffff814032d0 t tpmr_pf ffffffff81404000 T mpe_clone_create ffffffff81404180 T mpe_clone_destroy ffffffff81404270 T mpeattach @@ -9331,17 +9331,17 @@ ffffffff81405170 T mpw_clone_destroy ffffffff81405280 T mpwattach ffffffff814052a0 T mpw_ioctl ffffffff81405af0 T mpw_output -ffffffff81405d00 T mpw_start -ffffffff81406000 T mpw_set_route -ffffffff814060d0 t mpw_set_neighbor -ffffffff81406250 t mpw_set_label +ffffffff81405cf0 T mpw_start +ffffffff81405ff0 T mpw_set_route +ffffffff814060c0 t mpw_set_neighbor +ffffffff81406240 t mpw_set_label ffffffff81407000 T mpip_clone_create ffffffff814071b0 T mpip_clone_destroy ffffffff814072c0 T mpipattach ffffffff814072e0 T mpip_ioctl ffffffff81407990 T mpip_output -ffffffff81407d40 T mpip_start -ffffffff81408070 t mpip_set_route +ffffffff81407d50 T mpip_start +ffffffff81408080 t mpip_set_route ffffffff81409000 T bpeattach ffffffff81409020 T bpe_input ffffffff814091b0 t bpe_tree_RBT_COMPARE @@ -9560,10 +9560,10 @@ ffffffff8141e0c0 T stoeplitz_init ffffffff8141e240 T stoeplitz_cache_init ffffffff8141e350 T stoeplitz_hash_ip4 ffffffff8141e3a0 T stoeplitz_hash_ip4port -ffffffff8141e3f0 T stoeplitz_hash_ip6 -ffffffff8141e450 T stoeplitz_hash_ip6port -ffffffff8141e4b0 T stoeplitz_hash_eaddr -ffffffff8141e500 T stoeplitz_to_key +ffffffff8141e400 T stoeplitz_hash_ip6 +ffffffff8141e460 T stoeplitz_hash_ip6port +ffffffff8141e4d0 T stoeplitz_hash_eaddr +ffffffff8141e520 T stoeplitz_to_key ffffffff8141f000 T ieee80211_begin_bgscan ffffffff8141f0d0 T ieee80211_bgscan_timeout ffffffff8141f1a0 T ieee80211_channel_init @@ -9628,11 +9628,11 @@ ffffffff81427110 T ieee80211_tkip_mic ffffffff81427290 T ieee80211_tkip_encrypt ffffffff814276e0 t Phase1 ffffffff81427870 t Phase2 -ffffffff81427aa0 T ieee80211_tkip_get_tsc -ffffffff81427bb0 T ieee80211_tkip_decrypt -ffffffff814280a0 T ieee80211_michael_mic_failure -ffffffff81428230 T ieee80211_michael_mic_failure_timeout -ffffffff81428260 t ieee80211_tkip_deauth +ffffffff81427ab0 T ieee80211_tkip_get_tsc +ffffffff81427bc0 T ieee80211_tkip_decrypt +ffffffff814280b0 T ieee80211_michael_mic_failure +ffffffff81428240 T ieee80211_michael_mic_failure_timeout +ffffffff81428270 t ieee80211_tkip_deauth ffffffff81429000 T ieee80211_wep_set_key ffffffff81429060 T ieee80211_wep_delete_key ffffffff814290d0 T ieee80211_wep_encrypt @@ -9951,17 +9951,17 @@ ffffffff8144c770 T arpinvalidate ffffffff8144c7d0 T arpreply ffffffff8144c8c0 T arpresolve ffffffff8144cd30 T arppullup -ffffffff8144cdf0 T arpinput -ffffffff8144ce50 T arpintr -ffffffff8144cf00 T in_arpinput -ffffffff8144d320 T arplookup -ffffffff8144d410 T arpcache -ffffffff8144d790 T arpproxy -ffffffff8144d870 T revarpinput -ffffffff8144d8c0 T in_revarpinput -ffffffff8144d980 T revarprequest -ffffffff8144dac0 T revarpwhoarewe -ffffffff8144dcb0 T revarpwhoami +ffffffff8144cde0 T arpinput +ffffffff8144ce40 T arpintr +ffffffff8144cef0 T in_arpinput +ffffffff8144d310 T arplookup +ffffffff8144d400 T arpcache +ffffffff8144d780 T arpproxy +ffffffff8144d860 T revarpinput +ffffffff8144d8b0 T in_revarpinput +ffffffff8144d970 T revarprequest +ffffffff8144dab0 T revarpwhoarewe +ffffffff8144dca0 T revarpwhoami ffffffff8144e000 T igmp_init ffffffff8144e090 T rti_fill ffffffff8144e160 T rti_find @@ -10012,39 +10012,39 @@ ffffffff81452700 T in_pcbhash_insert ffffffff814528b0 T in_pcbbind_locked ffffffff81452ba0 T in_pcbaddrisavail_lock ffffffff81452de0 T in_pcbpickport -ffffffff81453010 T in_pcbrehash -ffffffff81453080 T in_pcbbind -ffffffff81453100 T in_pcblookup_local_lock -ffffffff814534b0 T in_pcbunref -ffffffff81453590 T in_pcbaddrisavail -ffffffff814535b0 T in_pcbconnect -ffffffff814537b0 T in_pcbselsrc -ffffffff81453970 T in_pcblookup_lock -ffffffff81453b40 T in_pcbdisconnect -ffffffff81453bb0 T in_pcbdetach -ffffffff81453cf0 T in_pcbref -ffffffff81453d40 T in_setsockaddr -ffffffff81453db0 T in_setpeeraddr -ffffffff81453e20 T in_sockaddr -ffffffff81453ea0 T in_peeraddr -ffffffff81453f20 T in_pcbnotifyall -ffffffff814540a0 T in_losing -ffffffff81454130 T in_rtchange -ffffffff81454180 T in_pcbrtentry -ffffffff814541f0 T in_pcbhash_lookup -ffffffff81454370 T in_pcblookup -ffffffff814543c0 T in_pcblookup_listen -ffffffff814545f0 T in_pcbset_rtableid -ffffffff814546e0 T in_pcbset_laddr -ffffffff81454820 T in_pcbunset_faddr -ffffffff814548f0 T in_pcbunset_laddr +ffffffff81453030 T in_pcbrehash +ffffffff814530a0 T in_pcbbind +ffffffff81453120 T in_pcblookup_local_lock +ffffffff814534d0 T in_pcbunref +ffffffff814535b0 T in_pcbaddrisavail +ffffffff814535d0 T in_pcbconnect +ffffffff814537d0 T in_pcbselsrc +ffffffff81453990 T in_pcblookup_lock +ffffffff81453b60 T in_pcbdisconnect +ffffffff81453bd0 T in_pcbdetach +ffffffff81453d10 T in_pcbref +ffffffff81453d60 T in_setsockaddr +ffffffff81453dd0 T in_setpeeraddr +ffffffff81453e40 T in_sockaddr +ffffffff81453ec0 T in_peeraddr +ffffffff81453f40 T in_pcbnotifyall +ffffffff814540c0 T in_losing +ffffffff81454150 T in_rtchange +ffffffff814541a0 T in_pcbrtentry +ffffffff81454210 T in_pcbhash_lookup +ffffffff81454390 T in_pcblookup +ffffffff814543e0 T in_pcblookup_listen +ffffffff81454610 T in_pcbset_rtableid +ffffffff81454700 T in_pcbset_laddr +ffffffff81454840 T in_pcbunset_faddr +ffffffff81454910 T in_pcbunset_laddr ffffffff81455000 T inet_nat64_mask -ffffffff81455050 T inet_nat64 -ffffffff814551f0 T inet_nat64_inet -ffffffff814552b0 T inet_nat64_inet6 -ffffffff81455390 T inet_nat46 -ffffffff81455430 T inet_nat46_inet -ffffffff81455490 T inet_nat46_inet6 +ffffffff81455060 T inet_nat64 +ffffffff81455200 T inet_nat64_inet +ffffffff814552c0 T inet_nat64_inet6 +ffffffff814553a0 T inet_nat46 +ffffffff81455450 T inet_nat46_inet +ffffffff814554b0 T inet_nat46_inet6 ffffffff81456000 T inet_ntop ffffffff814560c0 t inet_ntop6 ffffffff81456620 T sockaddr_ntop @@ -10064,18 +10064,18 @@ ffffffff81457880 T divert_sysctl ffffffff81458000 T icmp_init ffffffff81458080 T icmp_mtudisc_timeout ffffffff81458180 T icmp_do_error -ffffffff814584a0 T icmp_ratelimit -ffffffff81458500 T icmp_error -ffffffff81458580 T icmp_reflect -ffffffff814588a0 T icmp_send -ffffffff81458980 T icmp_input -ffffffff81458a20 T icmp_input_if -ffffffff814592e0 T iptime -ffffffff81459380 T icmp_sysctl -ffffffff81459530 T icmp_sysctl_icmpstat -ffffffff81459630 T icmp_mtudisc_clone -ffffffff814597e0 T icmp_mtudisc -ffffffff814599b0 T icmp_do_exthdr +ffffffff814584b0 T icmp_ratelimit +ffffffff81458510 T icmp_error +ffffffff81458590 T icmp_reflect +ffffffff814588b0 T icmp_send +ffffffff81458990 T icmp_input +ffffffff81458a30 T icmp_input_if +ffffffff814592f0 T iptime +ffffffff81459390 T icmp_sysctl +ffffffff81459540 T icmp_sysctl_icmpstat +ffffffff81459640 T icmp_mtudisc_clone +ffffffff814597f0 T icmp_mtudisc +ffffffff814599d0 T icmp_do_exthdr ffffffff8145a000 T ip_randomid ffffffff8145b000 T ip_init ffffffff8145b290 T ip_ours @@ -10085,25 +10085,25 @@ ffffffff8145bab0 T ipintr ffffffff8145bbd0 T ipv4_input ffffffff8145bc50 T ip_input_if ffffffff8145c0d0 T ipv4_check -ffffffff8145c3d0 T ip_dooptions -ffffffff8145c9a0 T in_ouraddr -ffffffff8145cc40 T ip_forward -ffffffff8145d100 T ip_flush -ffffffff8145d210 T ip_reass -ffffffff8145d7e0 T ip_freef -ffffffff8145d8e0 t carp_strict_addr_chk -ffffffff8145d960 T ip_slowtimo -ffffffff8145d9f0 T save_rte -ffffffff8145dad0 T ip_srcroute -ffffffff8145dc30 T ip_stripoptions -ffffffff8145dcd0 T ip_sysctl -ffffffff8145e090 T ip_sysctl_ipstat -ffffffff8145e300 T ip_savecontrol -ffffffff8145e530 T ip_send_do_dispatch -ffffffff8145e610 T ip_send -ffffffff8145e640 T ip_send_raw -ffffffff8145e670 t ip_send_dispatch -ffffffff8145e690 t ip_sendraw_dispatch +ffffffff8145c3c0 T ip_dooptions +ffffffff8145c990 T in_ouraddr +ffffffff8145cc30 T ip_forward +ffffffff8145d0f0 T ip_flush +ffffffff8145d200 T ip_reass +ffffffff8145d7b0 T ip_freef +ffffffff8145d8b0 t carp_strict_addr_chk +ffffffff8145d930 T ip_slowtimo +ffffffff8145d9c0 T save_rte +ffffffff8145daa0 T ip_srcroute +ffffffff8145dc00 T ip_stripoptions +ffffffff8145dca0 T ip_sysctl +ffffffff8145e060 T ip_sysctl_ipstat +ffffffff8145e2d0 T ip_savecontrol +ffffffff8145e500 T ip_send_do_dispatch +ffffffff8145e5e0 T ip_send +ffffffff8145e610 T ip_send_raw +ffffffff8145e640 t ip_send_dispatch +ffffffff8145e660 t ip_sendraw_dispatch ffffffff8145f000 T mfc_find ffffffff8145f0d0 T ip_mrouter_set ffffffff8145f240 T ip_mrouter_init @@ -10139,20 +10139,20 @@ ffffffff81462000 T ip_output ffffffff814629d0 T ip_insertoptions ffffffff81462b80 T ip_output_ipsec_lookup ffffffff81462ce0 T in_proto_cksum_out -ffffffff81462fa0 T ip_mloopback -ffffffff81463080 T ip_output_ipsec_send -ffffffff814633a0 T ip_fragment -ffffffff814637f0 T ip_output_ipsec_pmtu_update -ffffffff814638f0 T ip_optcopy -ffffffff81463a20 T in_hdr_cksum_out -ffffffff81463b00 T ip_ctloutput -ffffffff81464370 T ip_pcbopts -ffffffff814645a0 T ip_setmoptions -ffffffff81464af0 T ip_getmoptions -ffffffff81464c50 T ip_multicast_if -ffffffff81464d30 T ip_freemoptions -ffffffff81464dc0 T in_ifcap_cksum -ffffffff81464e20 T in_delayed_cksum +ffffffff81462fb0 T ip_mloopback +ffffffff81463090 T ip_output_ipsec_send +ffffffff814633b0 T ip_fragment +ffffffff81463800 T ip_output_ipsec_pmtu_update +ffffffff81463900 T ip_optcopy +ffffffff81463a30 T in_hdr_cksum_out +ffffffff81463b10 T ip_ctloutput +ffffffff81464380 T ip_pcbopts +ffffffff814645b0 T ip_setmoptions +ffffffff81464b00 T ip_getmoptions +ffffffff81464c60 T ip_multicast_if +ffffffff81464d40 T ip_freemoptions +ffffffff81464dd0 T in_ifcap_cksum +ffffffff81464e30 T in_delayed_cksum ffffffff81465000 T rip_attach ffffffff814650f0 T rip_detach ffffffff81465170 T rip_lock @@ -10204,9 +10204,9 @@ ffffffff8146e420 T syn_cache_unreach ffffffff8146f000 T tcp_sack_output ffffffff8146f080 T tcp_sack_adjust ffffffff8146f100 T tcp_output -ffffffff81470c60 T tcp_setpersist -ffffffff81470d40 T tcp_chopper -ffffffff81471270 T tcp_if_output_tso +ffffffff81470db0 T tcp_setpersist +ffffffff81470e90 T tcp_chopper +ffffffff814713c0 T tcp_if_output_tso ffffffff81472000 T tcp_init ffffffff814721a0 T tcp6_mtudisc_callback ffffffff81472200 T tcp_template @@ -10280,9 +10280,9 @@ ffffffff81479320 T udp_sbappend ffffffff81479590 T udp_notify ffffffff814795d0 T udp6_ctlinput ffffffff81479920 T udp_ctlinput -ffffffff81479a70 T udp_output -ffffffff81479ee0 T udp_sysctl -ffffffff8147a100 T udp_sysctl_udpstat +ffffffff81479a80 T udp_output +ffffffff81479ef0 T udp_sysctl +ffffffff8147a110 T udp_sysctl_udpstat ffffffff8147b000 T gre_send ffffffff8147c000 T ipsp_ids_gc ffffffff8147c120 T ipsp_init @@ -10341,12 +10341,12 @@ ffffffff81482000 T ipip_init ffffffff81482040 T ipip_input ffffffff81482110 T ipip_input_if ffffffff81482650 T ipip_output -ffffffff81482bb0 T ipe4_attach -ffffffff81482be0 T ipe4_init -ffffffff81482c10 T ipe4_zeroize -ffffffff81482c40 T ipe4_input -ffffffff81482ca0 T ipip_sysctl_ipipstat -ffffffff81482d80 T ipip_sysctl +ffffffff81482ba0 T ipe4_attach +ffffffff81482bd0 T ipe4_init +ffffffff81482c00 T ipe4_zeroize +ffffffff81482c30 T ipe4_input +ffffffff81482c90 T ipip_sysctl_ipipstat +ffffffff81482d70 T ipip_sysctl ffffffff81483000 T ipsec_init ffffffff814830a0 T ipsec_common_input ffffffff814838b0 T ipsec_common_input_cb @@ -10372,8 +10372,8 @@ ffffffff814852e0 T ipsec_forward_check ffffffff81485390 T ipsec_local_check ffffffff81486000 T ipsp_process_packet ffffffff81486610 T ipsp_process_done -ffffffff81486a00 T ipsec_hdrsz -ffffffff81486af0 T ipsec_adjust_mtu +ffffffff81486a10 T ipsec_hdrsz +ffffffff81486b00 T ipsec_adjust_mtu ffffffff81487000 T esp_attach ffffffff81487030 T esp_init ffffffff81487540 T esp_zeroize @@ -10645,10 +10645,10 @@ ffffffff814ba080 T curve25519 ffffffff814bbb00 t fe_mul_impl ffffffff814bc3b0 t fe_sqr_impl ffffffff814bd000 T mpls_input -ffffffff814bd400 T mpls_do_error -ffffffff814bd6a0 T mpls_ip_adjttl -ffffffff814bd730 T mpls_ip6_adjttl -ffffffff814bd790 T mpls_input_local +ffffffff814bd360 T mpls_do_error +ffffffff814bd600 T mpls_ip_adjttl +ffffffff814bd680 T mpls_ip6_adjttl +ffffffff814bd6e0 T mpls_input_local ffffffff814be000 T mpls_output ffffffff814be270 T mpls_getttl ffffffff814bf000 T mpls_sysctl @@ -10661,7 +10661,7 @@ ffffffff814c1150 T krpc_call ffffffff814c17f0 T xdr_string_encode ffffffff814c18c0 T xdr_string_decode ffffffff814c19d0 T xdr_inaddr_encode -ffffffff814c1a60 T xdr_inaddr_decode +ffffffff814c1a50 T xdr_inaddr_decode ffffffff814c2000 T nfs_bioread ffffffff814c2790 T nfs_vinvalbuf ffffffff814c2950 T nfs_getcacheblk @@ -10700,25 +10700,25 @@ ffffffff814c9450 t nfsm_srvnamesiz ffffffff814c9530 T nfsrv_readlink ffffffff814c99a0 T nfsrv_read ffffffff814ca150 T nfsrv_write -ffffffff814ca750 T nfsrv_create -ffffffff814cb2f0 t nfsm_srvpostop_fh -ffffffff814cb340 T nfsrv_mknod -ffffffff814cbc00 T nfsrv_remove -ffffffff814cc000 T nfsrv_rename -ffffffff814cc890 t nfsm_strsiz -ffffffff814cc970 T nfsrv_link -ffffffff814cce00 T nfsrv_symlink -ffffffff814cd590 t nfsm_mtouio -ffffffff814cd600 T nfsrv_mkdir -ffffffff814cdc40 T nfsrv_rmdir -ffffffff814ce090 T nfsrv_readdir -ffffffff814ce870 T nfsrv_readdirplus -ffffffff814cf0a0 T nfsrv_commit -ffffffff814cf3e0 T nfsrv_statfs -ffffffff814cf770 T nfsrv_fsinfo -ffffffff814cfa30 T nfsrv_pathconf -ffffffff814cfd40 T nfsrv_null -ffffffff814cfdf0 T nfsrv_noop +ffffffff814ca760 T nfsrv_create +ffffffff814cb300 t nfsm_srvpostop_fh +ffffffff814cb350 T nfsrv_mknod +ffffffff814cbc10 T nfsrv_remove +ffffffff814cc010 T nfsrv_rename +ffffffff814cc8a0 t nfsm_strsiz +ffffffff814cc980 T nfsrv_link +ffffffff814cce10 T nfsrv_symlink +ffffffff814cd5a0 t nfsm_mtouio +ffffffff814cd610 T nfsrv_mkdir +ffffffff814cdc50 T nfsrv_rmdir +ffffffff814ce0a0 T nfsrv_readdir +ffffffff814ce880 T nfsrv_readdirplus +ffffffff814cf0b0 T nfsrv_commit +ffffffff814cf3f0 T nfsrv_statfs +ffffffff814cf780 T nfsrv_fsinfo +ffffffff814cfa40 T nfsrv_pathconf +ffffffff814cfd50 T nfsrv_null +ffffffff814cfe00 T nfsrv_noop ffffffff814d0000 T nfs_init_rtt ffffffff814d00a0 T nfs_update_rtt ffffffff814d0130 T nfs_estimate_rto @@ -10742,10 +10742,10 @@ ffffffff814d1fb0 T nfs_rephead ffffffff814d21c0 T nfs_timer ffffffff814d25b0 T nfs_realign_fixup ffffffff814d2680 T nfs_getreq -ffffffff814d2a20 T nfsrv_rcv -ffffffff814d2cb0 T nfsrv_getstream -ffffffff814d2fd0 T nfsrv_wakenfsd -ffffffff814d3080 T nfsrv_dorec +ffffffff814d2ac0 T nfsrv_rcv +ffffffff814d2d50 T nfsrv_getstream +ffffffff814d3070 T nfsrv_wakenfsd +ffffffff814d3120 T nfsrv_dorec ffffffff814d4000 T nfsrv_cleanentry ffffffff814d4060 T nfsrv_initcache ffffffff814d40e0 T nfsrv_getcache @@ -10755,67 +10755,67 @@ ffffffff814d46e0 T nfsrv_cleancache ffffffff814d5000 T nfsm_reqhead ffffffff814d5080 T nfs_get_xid ffffffff814d50e0 T nfsm_rpchead -ffffffff814d5360 T nfsm_build -ffffffff814d5410 T nfsm_mbuftouio -ffffffff814d5600 T nfs_adv -ffffffff814d5680 T nfsm_uiotombuf -ffffffff814d57c0 T nfsm_buftombuf -ffffffff814d5830 T nfsm_strtombuf -ffffffff814d58c0 T nfsm_disct -ffffffff814d5a80 T nfs_init -ffffffff814d5b90 T nfs_vfs_init -ffffffff814d5c10 T nfs_loadattrcache -ffffffff814d6100 T nfs_attrtimeo -ffffffff814d61c0 T nfs_getattrcache -ffffffff814d6390 T nfs_namei -ffffffff814d6600 T nfsrv_fhtovp -ffffffff814d67a0 T nfsm_adj -ffffffff814d68f0 T nfsm_srvwcc -ffffffff814d6a30 T nfsm_srvpostop_attr -ffffffff814d6b70 T nfsm_srvfattr -ffffffff814d6e10 T txdr_nfsv2time -ffffffff814d6ea0 T netaddr_match -ffffffff814d6ef0 T nfs_clearcommit -ffffffff814d6f90 T nfs_merge_commit_ranges -ffffffff814d7030 T nfs_in_committed_range -ffffffff814d70a0 T nfs_in_tobecommitted_range -ffffffff814d7110 T nfs_add_committed_range -ffffffff814d71a0 T nfs_del_committed_range -ffffffff814d7230 T nfs_add_tobecommitted_range -ffffffff814d72c0 T nfs_del_tobecommitted_range -ffffffff814d7350 T nfsrv_errmap -ffffffff814d73d0 T nfsm_v3attrbuild -ffffffff814d79b0 T nfsm_fhtom -ffffffff814d7b50 T nfsm_srvfhtom -ffffffff814d7d40 T nfsm_srvsattr -ffffffff814d8240 t nfsm_dissect +ffffffff814d53c0 T nfsm_build +ffffffff814d5470 T nfsm_mbuftouio +ffffffff814d5660 T nfs_adv +ffffffff814d56e0 T nfsm_uiotombuf +ffffffff814d5820 T nfsm_buftombuf +ffffffff814d5890 T nfsm_strtombuf +ffffffff814d5920 T nfsm_disct +ffffffff814d5ae0 T nfs_init +ffffffff814d5bf0 T nfs_vfs_init +ffffffff814d5c70 T nfs_loadattrcache +ffffffff814d6160 T nfs_attrtimeo +ffffffff814d6220 T nfs_getattrcache +ffffffff814d63f0 T nfs_namei +ffffffff814d6660 T nfsrv_fhtovp +ffffffff814d6800 T nfsm_adj +ffffffff814d6950 T nfsm_srvwcc +ffffffff814d6a90 T nfsm_srvpostop_attr +ffffffff814d6bd0 T nfsm_srvfattr +ffffffff814d6e80 T txdr_nfsv2time +ffffffff814d6f10 T netaddr_match +ffffffff814d6f60 T nfs_clearcommit +ffffffff814d7000 T nfs_merge_commit_ranges +ffffffff814d70a0 T nfs_in_committed_range +ffffffff814d7110 T nfs_in_tobecommitted_range +ffffffff814d7180 T nfs_add_committed_range +ffffffff814d7210 T nfs_del_committed_range +ffffffff814d72a0 T nfs_add_tobecommitted_range +ffffffff814d7330 T nfs_del_tobecommitted_range +ffffffff814d73c0 T nfsrv_errmap +ffffffff814d7440 T nfsm_v3attrbuild +ffffffff814d7a20 T nfsm_fhtom +ffffffff814d7bc0 T nfsm_srvfhtom +ffffffff814d7db0 T nfsm_srvsattr +ffffffff814d82b0 t nfsm_dissect ffffffff814d9000 T sys_nfssvc ffffffff814d9200 T nfssvc_addsock ffffffff814d9460 T nfssvc_nfsd -ffffffff814d9a50 T nfsrv_getslp -ffffffff814d9b30 T nfsrv_zapsock -ffffffff814d9bf0 T nfsrv_slpderef -ffffffff814d9c70 T nfsrv_init -ffffffff814d9e40 T nfssvc_iod -ffffffff814da280 T nfs_getset_niothreads +ffffffff814d9a40 T nfsrv_getslp +ffffffff814d9b20 T nfsrv_zapsock +ffffffff814d9be0 T nfsrv_slpderef +ffffffff814d9c60 T nfsrv_init +ffffffff814d9e30 T nfssvc_iod +ffffffff814da270 T nfs_getset_niothreads ffffffff814db000 T nfs_mount ffffffff814db1b0 T nfs_start ffffffff814db1e0 T nfs_unmount ffffffff814db310 T nfs_root ffffffff814db380 T nfs_quotactl ffffffff814db3b0 T nfs_statfs -ffffffff814db750 T nfs_sync -ffffffff814db840 T nfs_vget -ffffffff814db870 T nfs_fhtovp -ffffffff814db8a0 T nfs_vptofh -ffffffff814db8d0 T nfs_sysctl -ffffffff814dba10 T nfs_checkexp -ffffffff814dba40 T nfs_fsinfo -ffffffff814dbcf0 T nfs_mountroot -ffffffff814dbf50 T nfs_mount_diskless -ffffffff814dc040 T mountnfs -ffffffff814dc450 T nfs_decode_args -ffffffff814dc850 T nfs_reaper +ffffffff814db780 T nfs_sync +ffffffff814db870 T nfs_vget +ffffffff814db8a0 T nfs_fhtovp +ffffffff814db8d0 T nfs_vptofh +ffffffff814db900 T nfs_sysctl +ffffffff814dba40 T nfs_checkexp +ffffffff814dba70 T nfs_fsinfo +ffffffff814dbd20 T nfs_mountroot +ffffffff814dbf80 T nfs_mount_diskless +ffffffff814dc070 T mountnfs +ffffffff814dc480 T nfs_decode_args +ffffffff814dc880 T nfs_reaper ffffffff814dd000 T nfs_lock ffffffff814dd040 T nfs_unlock ffffffff814dd090 T nfs_islocked @@ -10828,52 +10828,52 @@ ffffffff814dd6d0 T nfs_create ffffffff814ddbc0 T nfs_fsync ffffffff814ddbf0 T nfs_getattr ffffffff814ddd40 T nfs_link -ffffffff814de050 T nfs_lookup -ffffffff814de980 T nfs_mknod -ffffffff814dea00 T nfs_open -ffffffff814dec20 T nfs_pathconf -ffffffff814ded30 T nfs_print -ffffffff814deda0 T nfs_read -ffffffff814dedf0 T nfs_readdir -ffffffff814df130 T nfs_readlink -ffffffff814df180 T nfs_remove -ffffffff814df330 T nfs_rename -ffffffff814df500 T nfs_mkdir -ffffffff814df820 T nfs_rmdir -ffffffff814df9f0 T nfs_setattr -ffffffff814dfc00 T nfs_strategy -ffffffff814dfcc0 T nfs_symlink -ffffffff814dff90 T nfsspec_access -ffffffff814e0050 T nfsspec_close -ffffffff814e0150 T nfsspec_read -ffffffff814e0190 T nfsspec_write -ffffffff814e01d0 T nfsfifo_close -ffffffff814e0310 T nfsfifo_read -ffffffff814e0350 T nfsfifo_reclaim -ffffffff814e0380 T nfsfifo_write -ffffffff814e03c0 T nfs_cache_enter -ffffffff814e0410 T nfs_null -ffffffff814e0490 t nfsm_postop_attr -ffffffff814e05c0 T nfs_flush -ffffffff814e0c40 t nfsm_loadattr -ffffffff814e0cc0 T nfs_setattrrpc -ffffffff814e0f00 t nfsm_wcc_data -ffffffff814e1150 t nfsm_getfh -ffffffff814e12a0 T nfs_readlinkrpc -ffffffff814e1520 T nfs_readrpc +ffffffff814de040 T nfs_lookup +ffffffff814de970 T nfs_mknod +ffffffff814de9f0 T nfs_open +ffffffff814dec10 T nfs_pathconf +ffffffff814ded20 T nfs_print +ffffffff814ded90 T nfs_read +ffffffff814dede0 T nfs_readdir +ffffffff814df120 T nfs_readlink +ffffffff814df170 T nfs_remove +ffffffff814df320 T nfs_rename +ffffffff814df4f0 T nfs_mkdir +ffffffff814df810 T nfs_rmdir +ffffffff814df9e0 T nfs_setattr +ffffffff814dfbf0 T nfs_strategy +ffffffff814dfcb0 T nfs_symlink +ffffffff814dff80 T nfsspec_access +ffffffff814e0040 T nfsspec_close +ffffffff814e0140 T nfsspec_read +ffffffff814e0180 T nfsspec_write +ffffffff814e01c0 T nfsfifo_close +ffffffff814e0300 T nfsfifo_read +ffffffff814e0340 T nfsfifo_reclaim +ffffffff814e0370 T nfsfifo_write +ffffffff814e03b0 T nfs_cache_enter +ffffffff814e0400 T nfs_null +ffffffff814e0480 t nfsm_postop_attr +ffffffff814e05b0 T nfs_flush +ffffffff814e0c30 t nfsm_loadattr +ffffffff814e0cb0 T nfs_setattrrpc +ffffffff814e0ef0 t nfsm_wcc_data +ffffffff814e1140 t nfsm_getfh +ffffffff814e1290 T nfs_readlinkrpc +ffffffff814e1510 T nfs_readrpc ffffffff814e1960 T nfs_writerpc ffffffff814e1de0 T nfs_mknodrpc ffffffff814e2200 t nfsm_mtofh ffffffff814e2490 T nfs_lookitup -ffffffff814e28c0 T nfs_removerpc -ffffffff814e2a40 T nfs_sillyrename -ffffffff814e2c00 T nfs_removeit -ffffffff814e2c90 T nfs_renamerpc -ffffffff814e2ee0 T nfs_renameit -ffffffff814e2f50 T nfs_readdirplusrpc -ffffffff814e3b80 T nfs_readdirrpc -ffffffff814e4420 T nfs_commit -ffffffff814e4630 T nfs_writebp +ffffffff814e28b0 T nfs_removerpc +ffffffff814e2a30 T nfs_sillyrename +ffffffff814e2bf0 T nfs_removeit +ffffffff814e2c80 T nfs_renamerpc +ffffffff814e2ed0 T nfs_renameit +ffffffff814e2f40 T nfs_readdirplusrpc +ffffffff814e3b10 T nfs_readdirrpc +ffffffff814e43e0 T nfs_commit +ffffffff814e45f0 T nfs_writebp ffffffff814e5000 T ffs_alloc ffffffff814e53a0 T ffs_hashalloc ffffffff814e54e0 T ffs_alloccg @@ -11526,9 +11526,9 @@ ffffffff815471a0 T gif_clone_destroy ffffffff815472a0 T gifattach ffffffff815472c0 T gif_ioctl ffffffff815477b0 T gif_start -ffffffff81547980 T gif_output -ffffffff81547ae0 T gif_down -ffffffff81547b60 T gif_send +ffffffff81547970 T gif_output +ffffffff81547ad0 T gif_down +ffffffff81547b50 T gif_send ffffffff81547d30 T gif_up ffffffff81547db0 T gif_set_tunnel ffffffff81547ee0 T gif_get_tunnel @@ -11542,16 +11542,16 @@ ffffffff81549030 T sec_get ffffffff815490e0 T sec_input ffffffff81549170 T sec_put ffffffff81549190 T sec_tdb_insert -ffffffff81549260 T sec_tdb_remove -ffffffff815493b0 t sec_clone_create -ffffffff81549500 t sec_clone_destroy -ffffffff81549590 t sec_send -ffffffff815497d0 t sec_output -ffffffff81549930 t sec_enqueue -ffffffff815499a0 t sec_start -ffffffff815499d0 t sec_ioctl -ffffffff81549b90 t sec_down -ffffffff81549d00 t sec_tdb_gc +ffffffff81549250 T sec_tdb_remove +ffffffff81549390 t sec_clone_create +ffffffff815494e0 t sec_clone_destroy +ffffffff81549570 t sec_send +ffffffff815497b0 t sec_output +ffffffff81549910 t sec_enqueue +ffffffff81549980 t sec_start +ffffffff815499b0 t sec_ioctl +ffffffff81549b70 t sec_down +ffffffff81549cd0 t sec_tdb_gc ffffffff8154a000 T ip_ecn_ingress ffffffff8154a080 T ip_ecn_egress ffffffff8154a110 T ip_tos_patch @@ -11621,10 +11621,10 @@ ffffffff81553780 T in6_clearscope ffffffff81554000 T dest6_input ffffffff81555000 T frag6_init ffffffff815550a0 T frag6_input -ffffffff81555b00 T frag6_deletefraghdr -ffffffff81555ba0 T frag6_freef -ffffffff81555cb0 T frag6_unlink -ffffffff81555db0 T frag6_slowtimo +ffffffff81555ad0 T frag6_deletefraghdr +ffffffff81555b70 T frag6_freef +ffffffff81555c80 T frag6_unlink +ffffffff81555d80 T frag6_slowtimo ffffffff81557000 T icmp6_init ffffffff81557080 T icmp6_mtudisc_timeout ffffffff81557140 T icmp6_errcount @@ -11635,20064 +11635,20076 @@ ffffffff815577b0 T icmp6_error ffffffff81557820 T icmp6_reflect ffffffff81557be0 T icmp6_input ffffffff81558570 T icmp6_redirect_input -ffffffff81558cd0 T icmp6_notify_error -ffffffff815593c0 T icmp6_mtudisc_update -ffffffff81559580 T icmp6_mtudisc_clone -ffffffff81559710 T icmp6_fasttimo -ffffffff81559720 T icmp6_redirect_diag -ffffffff815597f0 T icmp6_redirect_output -ffffffff81559d10 T icmp6_ctloutput -ffffffff81559de0 T icmp6_sysctl_icmp6stat -ffffffff81559e90 T icmp6_sysctl -ffffffff8155b000 T ip6id_pmod -ffffffff8155b0b0 T ip6id_initid -ffffffff8155b310 T ip6id_randomid -ffffffff8155b480 T ip6_randomflowlabel -ffffffff8155c000 T ip6_init -ffffffff8155c160 T ip6_ours -ffffffff8155c2a0 T ip6_hbhchcheck -ffffffff8155c4f0 T ip6intr -ffffffff8155c610 T ipv6_input -ffffffff8155c690 T ip6_input_if -ffffffff8155ce80 T ipv6_check -ffffffff8155d1f0 T ip6_check_rh0hdr -ffffffff8155d350 t carp_strict_addr_chk -ffffffff8155d3d0 T ip6_hopopts_input -ffffffff8155d580 T ip6_process_hopopts -ffffffff8155d8a0 T ip6_unknown_opt -ffffffff8155d9a0 T ip6_savecontrol -ffffffff8155ddd0 T ip6_pullexthdr -ffffffff8155df60 T ip6_get_prevhdr -ffffffff8155e0b0 T ip6_nexthdr -ffffffff8155e290 T ip6_lasthdr -ffffffff8155e320 T ip6_sysctl_ip6stat -ffffffff8155e3d0 T ip6_sysctl_soiikey -ffffffff8155e470 T ip6_sysctl -ffffffff8155e790 T ip6_send -ffffffff8155e7c0 t ip6_send_dispatch -ffffffff8155f000 T ip6_forward -ffffffff81560000 T ip6_mrouter_set -ffffffff815601b0 T ip6_mrouter_init -ffffffff81560230 T ip6_mrouter_done -ffffffff81560460 T add_m6if -ffffffff81560630 T del_m6if -ffffffff815607a0 T add_m6fc -ffffffff81560940 T del_m6fc -ffffffff81560ac0 T ip6_mrouter_get -ffffffff81560b10 T mrt6_ioctl -ffffffff81560c40 T get_sg6_cnt -ffffffff81560d70 T get_mif6_cnt -ffffffff81560e00 T mf6c_find -ffffffff81560ee0 T mrt6_iflookupbymif -ffffffff81560f40 T mrt6_sysctl_mif -ffffffff815610d0 T mrt6_rtwalk_mf6csysctl -ffffffff815612b0 T mrt6_sysctl_mfc -ffffffff815613f0 T mrouter6_rtwalk_delete -ffffffff81561430 T mrt6_mcast_del -ffffffff815614c0 T ip6_mrouter_detach -ffffffff81561590 T mf6c_add_route -ffffffff815616a0 T mrt6_mcast_add -ffffffff815617e0 T mf6c_update -ffffffff81561b40 T mf6c_add -ffffffff81561c90 T socket6_send -ffffffff81561d50 T ip6_mforward -ffffffff81562120 T ip6_mdq -ffffffff81562350 T mf6c_expire_route -ffffffff81562420 T phyint_send6 -ffffffff81563000 T ip6_output -ffffffff815640b0 T ip6_copyexthdr -ffffffff81564170 T ip6_output_ipsec_lookup -ffffffff81564290 T ip6_splithdr -ffffffff815643a0 T ip6_insert_jumboopt -ffffffff81564520 T ip6_output_ipsec_send -ffffffff815648f0 T in6_proto_cksum_out -ffffffff81564de0 T ip6_mloopback -ffffffff81564f20 T ip6_getpmtu -ffffffff81564fa0 T ip6_fragment -ffffffff81565310 T ip6_randomid -ffffffff81565330 T ip6_insertfraghdr -ffffffff81565410 T ip6_ctloutput -ffffffff81566060 T ip6_pcbopt -ffffffff81566120 T ip6_setmoptions -ffffffff81566740 T ip6_getpcbopt -ffffffff81566930 T ip6_getmoptions -ffffffff815669d0 T ip6_raw_ctloutput -ffffffff81566aa0 T ip6_initpktopts -ffffffff81566af0 T ip6_setpktopt -ffffffff81566f90 T ip6_clearpktopts -ffffffff81567130 T copypktopts -ffffffff815672f0 T ip6_freepcbopts -ffffffff81567340 T ip6_freemoptions -ffffffff815673e0 T ip6_setpktopts -ffffffff81567530 T ip6_randomid_init -ffffffff81567550 T in6_delayed_cksum -ffffffff81567640 T ip6_output_ipsec_pmtu_update -ffffffff81568000 T route6_input -ffffffff81569000 T mld6_init -ffffffff81569070 T mld6_start_listening -ffffffff81569130 t mld6_sendpkt -ffffffff81569390 T mld6_stop_listening -ffffffff81569440 T mld6_input -ffffffff815697b0 T mld6_fasttimeo -ffffffff815698c0 T mld6_checktimer -ffffffff8156a000 T nd6_init -ffffffff8156a0a0 T nd6_expire -ffffffff8156a200 T nd6_timer -ffffffff8156a2c0 T nd6_slowtimo -ffffffff8156a380 T nd6_expire_timer -ffffffff8156a3b0 T nd6_ifattach -ffffffff8156a430 T nd6_ifdetach -ffffffff8156a460 T nd6_options -ffffffff8156a660 T nd6_llinfo_settimer -ffffffff8156a750 T nd6_llinfo_timer -ffffffff8156a970 T nd6_free -ffffffff8156aad0 T nd6_expire_timer_update -ffffffff8156ab80 T nd6_purge -ffffffff8156ac30 T nd6_lookup -ffffffff8156ae70 T nd6_is_addr_neighbor -ffffffff8156afe0 T nd6_invalidate -ffffffff8156b040 T nd6_nud_hint -ffffffff8156b130 T nd6_rtrequest -ffffffff8156b730 T nd6_need_cache -ffffffff8156b780 T nd6_ioctl -ffffffff8156b9b0 T nd6_cache_lladdr -ffffffff8156bdb0 T nd6_resolve -ffffffff8156d000 T nd6_ns_input -ffffffff8156d870 T nd6_isneighbor -ffffffff8156d930 T nd6_dad_ns_input -ffffffff8156d9e0 T nd6_na_output -ffffffff8156de70 T nd6_ns_output -ffffffff8156e380 T nd6_ifptomac -ffffffff8156e3e0 T nd6_na_input -ffffffff8156ece0 T nd6_dad_find -ffffffff8156ed20 T nd6_dad_duplicated -ffffffff8156ee90 T nd6_dad_destroy -ffffffff8156ef20 T nd6_dad_starttimer -ffffffff8156ef60 T nd6_dad_timer -ffffffff8156f2a0 T nd6_dad_stoptimer -ffffffff8156f2c0 T nd6_dad_start -ffffffff8156f520 T nd6_dad_ns_output -ffffffff8156f580 T nd6_dad_stop -ffffffff81570000 T nd6_rtr_cache -ffffffff81570440 T rt6_flush -ffffffff815705f0 T rt6_deleteroute -ffffffff81571000 T rip6_attach -ffffffff81571180 T rip6_detach -ffffffff81571230 T rip6_lock -ffffffff81571290 T rip6_unlock -ffffffff815712f0 T rip6_locked -ffffffff81571360 T rip6_bind -ffffffff81571410 T rip6_connect -ffffffff815714e0 T rip6_disconnect -ffffffff81571570 T rip6_shutdown -ffffffff815715b0 T rip6_send -ffffffff815716d0 T rip6_init -ffffffff81571720 T rip6_input -ffffffff81571d90 T rip6_ctlinput -ffffffff81571ef0 T rip6_output -ffffffff81572280 T rip6_ctloutput -ffffffff81572330 T rip6_sysctl_rip6stat -ffffffff815723b0 T rip6_sysctl -ffffffff81573000 T udp6_output -ffffffff81574000 T pfdatatopacket -ffffffff81574060 T pfkeyv2_attach -ffffffff815741f0 T pfkeyv2_detach -ffffffff81574380 T pfkeyv2_disconnect -ffffffff815743c0 T pfkeyv2_shutdown -ffffffff81574400 T pfkeyv2_send -ffffffff81574490 T pfkeyv2_sockaddr -ffffffff815744c0 T pfkeyv2_peeraddr -ffffffff81574510 T pfkeyv2_sysctl -ffffffff81574690 T pfkey_init -ffffffff81574790 T keycb_ref -ffffffff815747b0 T keycb_unref -ffffffff815747d0 T pfkeyv2_output -ffffffff81574890 T pfkeyv2_dosend -ffffffff81576680 T pfkey_sendup -ffffffff81576740 T pfkeyv2_sendmessage -ffffffff81576d90 T pfkeyv2_policy -ffffffff81577030 T pfkeyv2_get -ffffffff815775e0 T pfkeyv2_dump_walker -ffffffff815776f0 T pfkeyv2_sa_flush -ffffffff81577740 T pfkeyv2_get_proto_alg -ffffffff81577800 T pfkeyv2_policy_flush -ffffffff81577840 T pfkeyv2_acquire -ffffffff81577dd0 T pfkeyv2_expire -ffffffff81578050 T pfkeyv2_sysctl_walker -ffffffff81578250 T pfkeyv2_dump_policy -ffffffff81578410 T pfkeyv2_sysctl_policydumper -ffffffff81579000 T pfkeyv2_parsemessage -ffffffff8157a000 T import_sa -ffffffff8157a110 T export_sa -ffffffff8157a230 T import_lifetime -ffffffff8157a410 T export_lifetime -ffffffff8157a5b0 T import_flow -ffffffff8157a8c0 T export_flow -ffffffff8157ab30 T import_address -ffffffff8157abb0 T export_address -ffffffff8157ac30 T import_identities -ffffffff8157ad40 t import_identity -ffffffff8157ae10 T export_identities -ffffffff8157af20 T import_key -ffffffff8157af70 T export_key -ffffffff8157b050 T import_udpencap -ffffffff8157b090 T export_udpencap -ffffffff8157b0e0 T export_replay -ffffffff8157b120 T export_mtu -ffffffff8157b160 T import_rdomain -ffffffff8157b1a0 T export_rdomain -ffffffff8157b1f0 T import_tag -ffffffff8157b240 T export_tag -ffffffff8157b2c0 T import_tap -ffffffff8157b300 T export_tap -ffffffff8157b340 T import_iface -ffffffff8157b390 T export_iface -ffffffff8157b3e0 T export_satype -ffffffff8157b420 T export_counter -ffffffff8157c000 T x86emu_exec -ffffffff815874c0 T x86emu_exec_call -ffffffff81587550 T x86emu_exec_intr -ffffffff81587640 T x86emu_halt_sys -ffffffff81587660 t x86emu_intr_dispatch -ffffffff81587790 t common_binop_byte_rm_r -ffffffff81587920 t add_byte -ffffffff815879f0 t common_binop_word_long_rm_r -ffffffff81587cd0 t add_word -ffffffff81587db0 t add_long -ffffffff81587ea0 t common_binop_byte_r_rm -ffffffff81588000 t common_binop_word_long_r_rm -ffffffff81588280 t or_byte -ffffffff81588300 t or_word -ffffffff81588380 t or_long -ffffffff81588400 t adc_byte -ffffffff815884f0 t adc_word -ffffffff815885e0 t adc_long -ffffffff815886f0 t sbb_byte -ffffffff815887b0 t sbb_word -ffffffff81588880 t sbb_long -ffffffff81588950 t and_byte -ffffffff815889d0 t and_word -ffffffff81588a50 t and_long -ffffffff81588ad0 t sub_byte -ffffffff81588b80 t sub_word -ffffffff81588c40 t sub_long -ffffffff81588cf0 t xor_byte -ffffffff81588d70 t xor_word -ffffffff81588e00 t xor_long -ffffffff81588e90 t common_binop_ns_byte_rm_r -ffffffff81588fd0 t cmp_byte_no_return -ffffffff81589090 t common_binop_ns_word_long_rm_r -ffffffff815892e0 t cmp_word_no_return -ffffffff815893a0 t cmp_long_no_return -ffffffff81589450 t common_inc_word_long -ffffffff815895c0 t common_dec_word_long -ffffffff81589720 t common_imul_imm -ffffffff81589aa0 t ins -ffffffff81589d30 t outs -ffffffff81589fc0 t test_byte -ffffffff8158a040 t test_word -ffffffff8158a0c0 t test_long -ffffffff8158a140 t common_load_far_pointer -ffffffff8158a260 t decode_rl_address -ffffffff8158a630 t fetch_data_byte -ffffffff8158a6e0 t store_data_byte -ffffffff8158a790 t fetch_data_long -ffffffff8158a840 t store_data_long -ffffffff8158a8f0 t fetch_data_word -ffffffff8158a9a0 t store_data_word -ffffffff8158aa50 t common_set_byte -ffffffff8158ab60 t common_bitstring -ffffffff8158b140 t decode_and_fetch_long_disp -ffffffff8158b220 t decode_and_fetch_word_disp -ffffffff8158b300 t common_shift -ffffffff8158ba40 t decode_and_fetch_long_imm8 -ffffffff8158bb60 t decode_and_fetch_word_imm8 -ffffffff8158bc80 t common_bitsearch -ffffffff8158be50 t cmp_byte -ffffffff8158bf10 t cmp_word -ffffffff8158bfd0 t cmp_long -ffffffff8158c080 t decode_and_fetch_byte_imm8 -ffffffff8158c1a0 t rol_byte -ffffffff8158c240 t ror_byte -ffffffff8158c2f0 t rcl_byte -ffffffff8158c3c0 t rcr_byte -ffffffff8158c4a0 t shl_byte -ffffffff8158c5a0 t shr_byte -ffffffff8158c690 t sar_byte -ffffffff8158c750 t rol_long -ffffffff8158c7f0 t ror_long -ffffffff8158c890 t rcl_long -ffffffff8158c960 t rcr_long -ffffffff8158ca50 t shl_long -ffffffff8158cb50 t shr_long -ffffffff8158cc20 t sar_long -ffffffff8158ccf0 t rol_word -ffffffff8158cd90 t ror_word -ffffffff8158ce40 t rcl_word -ffffffff8158cf10 t rcr_word -ffffffff8158d000 t shl_word -ffffffff8158d100 t shr_word -ffffffff8158d1e0 t sar_word -ffffffff8158e000 T x86emu_init_default -ffffffff8158e0e0 t rdb -ffffffff8158e140 t rdw -ffffffff8158e1a0 t rdl -ffffffff8158e200 t wrb -ffffffff8158e260 t wrw -ffffffff8158e2c0 t wrl -ffffffff8158f000 T getsn -ffffffff81590000 T random -ffffffff81591000 W __explicit_bzero_hook -ffffffff81591030 T explicit_bzero -ffffffff81592000 T timingsafe_bcmp -ffffffff81593000 T index -ffffffff81593000 T strchr -ffffffff81594000 T rindex -ffffffff81594000 T strrchr -ffffffff81595000 T imax -ffffffff81596000 T imin -ffffffff81597000 T lmax -ffffffff81598000 T lmin -ffffffff81599000 T max -ffffffff8159a000 T min -ffffffff8159b000 T ulmax -ffffffff8159c000 T ulmin -ffffffff8159d000 T memchr -ffffffff8159e000 T memcmp -ffffffff8159f000 T bcmp -ffffffff815a0000 T bzero -ffffffff815a1000 T bcopy -ffffffff815a1010 T memmove -ffffffff815a1040 T memcpy -ffffffff815a2000 T ffs -ffffffff815a3000 T fls -ffffffff815a4000 T flsl -ffffffff815a5000 T memset -ffffffff815a6000 T strcmp -ffffffff815a7000 T strlcat -ffffffff815a8000 T strlcpy -ffffffff815a9000 T strlen -ffffffff815aa000 T strncmp -ffffffff815ab000 T strncpy -ffffffff815ac000 T strnlen -ffffffff815ad000 T strnstr -ffffffff815ae000 T scanc -ffffffff815af000 T skpc -ffffffff815b0000 T strncasecmp -ffffffff815b1000 T adler32_z -ffffffff815b14a0 T adler32 -ffffffff815b14c0 T adler32_combine -ffffffff815b15e0 T adler32_combine64 -ffffffff815b2000 T get_crc_table -ffffffff815b2030 T crc32_z -ffffffff815b2a20 T crc32 -ffffffff815b2a40 T crc32_combine64 -ffffffff815b2b50 T crc32_combine -ffffffff815b2c60 T crc32_combine_gen64 -ffffffff815b2d20 T crc32_combine_gen -ffffffff815b2de0 T crc32_combine_op -ffffffff815b3000 T inflateBackInit_ -ffffffff815b3140 T inflateBack -ffffffff815b4600 T inflateBackEnd -ffffffff815b5000 T inflate_fast -ffffffff815b6000 T inflateResetKeep -ffffffff815b6100 T inflateReset -ffffffff815b6250 T inflateReset2 -ffffffff815b6370 T inflateInit2_ -ffffffff815b6580 T inflateInit_ -ffffffff815b65a0 T inflatePrime -ffffffff815b6650 T inflate -ffffffff815b9050 t updatewindow -ffffffff815b91a0 T inflateEnd -ffffffff815b9250 T inflateGetDictionary -ffffffff815b9310 T inflateSetDictionary -ffffffff815b9420 T inflateGetHeader -ffffffff815b9490 T inflateSync -ffffffff815b9730 T inflateSyncPoint -ffffffff815b97a0 T inflateCopy -ffffffff815b9960 T inflateUndermine -ffffffff815b99d0 T inflateValidate -ffffffff815b9a50 T inflateMark -ffffffff815b9ae0 T inflateCodesUsed -ffffffff815ba000 T inflate_table -ffffffff815bb000 T deflateInit_ -ffffffff815bb060 T deflateInit2_ -ffffffff815bb370 T deflateEnd -ffffffff815bb4c0 T deflateReset -ffffffff815bb5e0 T deflateSetDictionary -ffffffff815bb880 t fill_window -ffffffff815bbcb0 T deflateGetDictionary -ffffffff815bbd90 T deflateResetKeep -ffffffff815bbed0 T deflateSetHeader -ffffffff815bbf60 T deflatePending -ffffffff815bc010 T deflatePrime -ffffffff815bc150 T deflateParams -ffffffff815bc360 T deflate -ffffffff815bd1a0 t slide_hash -ffffffff815bd340 T deflateTune -ffffffff815bd3f0 T deflateBound -ffffffff815bd5c0 t flush_pending -ffffffff815bd650 t deflate_stored -ffffffff815bdcc0 t deflate_huff -ffffffff815be020 t deflate_rle -ffffffff815be5a0 T deflateCopy -ffffffff815be820 t deflate_fast -ffffffff815bee30 t deflate_slow -ffffffff815bf620 t longest_match -ffffffff815c0000 T zlibVersion -ffffffff815c0030 T zlibCompileFlags -ffffffff815c0060 T zError -ffffffff815c1000 T zcalloc -ffffffff815c1020 T zcfree -ffffffff815c2000 T _tr_init -ffffffff815c2070 t init_block -ffffffff815c22b0 T _tr_stored_block -ffffffff815c2450 T _tr_flush_bits -ffffffff815c2500 T _tr_align -ffffffff815c2670 T _tr_flush_block -ffffffff815c2fb0 t build_tree -ffffffff815c3940 t compress_block -ffffffff815c3dc0 T _tr_tally -ffffffff815c3eb0 t send_tree -ffffffff815c5000 T compress2 -ffffffff815c5180 T compress -ffffffff815c51a0 T compressBound -ffffffff815c6000 T unmap_startup -ffffffff815c6070 T cpu_configure -ffffffff815c61d0 T device_register -ffffffff815c6200 T diskconf -ffffffff815c7000 T iskmemdev -ffffffff815c7050 T iszerodev -ffffffff815c70a0 T getnulldev -ffffffff815c70e0 T dev_rawpart -ffffffff815c8000 T readdisklabel -ffffffff815c8160 T writedisklabel -ffffffff815c9000 T gdt_init_cpu -ffffffff815ca000 T cpu_startup -ffffffff815ca180 T enter_shared_special_pages -ffffffff815ca290 T x86_64_proc0_tss_ldt_init -ffffffff815ca300 T bios_getdiskinfo -ffffffff815ca380 T bios_sysctl -ffffffff815ca4f0 T cpu_sysctl -ffffffff815ca780 T sendsig -ffffffff815cac20 t initialize_thread_xstate -ffffffff815cacf0 T sys_sigreturn -ffffffff815cafb0 t maybe_enable_user_cet -ffffffff815cb000 T cpu_kick -ffffffff815cb060 T signotify -ffffffff815cb0d0 T cpu_unidle -ffffffff815cb130 T boot -ffffffff815cb310 T dumpsys -ffffffff815cba40 T cpu_reset -ffffffff815cbac0 T cpu_dump -ffffffff815cbc90 T dumpconf -ffffffff815cbeb0 T cpu_dumpsize -ffffffff815cbef0 T cpu_dump_mempagecnt -ffffffff815cbfd0 T reset_segs -ffffffff815cc030 T setregs -ffffffff815cc1b0 T setgate -ffffffff815cc240 T unsetgate -ffffffff815cc280 T setregion -ffffffff815cc2b0 T set_mem_segment -ffffffff815cc370 T set_sys_segment -ffffffff815cc410 T cpu_init_idt -ffffffff815cc460 T cpu_init_extents -ffffffff815cc520 T map_tramps -ffffffff815cc670 T cpu_set_vendor -ffffffff815cc740 T init_x86_64 -ffffffff815cd2b0 T getbootinfo -ffffffff815cd520 T amd64_pa_used -ffffffff815cd5a0 T cpu_initclocks -ffffffff815cd5c0 T cpu_startclock -ffffffff815cd5e0 T need_resched -ffffffff815cd660 T idt_vec_alloc -ffffffff815cd6b0 T idt_vec_alloc_range -ffffffff815cd810 T idt_vec_set -ffffffff815cd8b0 T idt_vec_free -ffffffff815cd900 T splassert_check -ffffffff815cd990 T copyin32 -ffffffff815cd9e0 T check_context -ffffffff815cda50 T delay_init -ffffffff815cda90 T delay_fini -ffffffff815ce000 T get_hibernate_io_function -ffffffff815ce150 T get_hibernate_info_md -ffffffff815ce350 T hibernate_enter_resume_mapping -ffffffff815ce470 T hibernate_enter_resume_2m_pde -ffffffff815ce530 T hibernate_enter_resume_4k_pte -ffffffff815ce5b0 T hibernate_populate_resume_pt -ffffffff815ceac0 T hibernate_inflate_skip -ffffffff815ceb20 T hibernate_enable_intr_machdep -ffffffff815ceb50 T hibernate_disable_intr_machdep -ffffffff815ceb80 T hibernate_quiesce_cpus -ffffffff815cf000 T cpu_amd64speed -ffffffff815cf030 T intelcore_update_sensor -ffffffff815cf100 T cpu_hz_update_sensor -ffffffff815cf210 T via_nano_setup -ffffffff815cf400 T via_update_sensor -ffffffff815cf450 T cpu_freq_ctr -ffffffff815cf550 T cpu_freq -ffffffff815cf5d0 T identifycpu -ffffffff815d0800 T cpu_topology -ffffffff815d0a20 T cpu_check_vmm_cap -ffffffff815d1000 t rdtsc_lfence -ffffffff815d1040 T tsc_get_timecount_lfence -ffffffff815d1070 T tsc_freq_cpuid -ffffffff815d1190 T tsc_freq_msr -ffffffff815d1270 T tsc_identify -ffffffff815d14c0 t rdtscp -ffffffff815d14f0 T tsc_get_timecount_rdtscp -ffffffff815d1520 T tsc_delay -ffffffff815d15b0 T measure_tsc_freq -ffffffff815d19f0 T calibrate_tsc_freq -ffffffff815d1a60 T cpu_recalibrate_tsc -ffffffff815d1af0 T tsc_timecounter_init -ffffffff815d1bd0 T tsc_test_sync_bp -ffffffff815d1f50 T tsc_adjust_reset -ffffffff815d1fa0 T tsc_test_bp -ffffffff815d2030 T tsc_report_test_results -ffffffff815d2080 T tsc_test_sync_ap -ffffffff815d2220 T tsc_test_ap -ffffffff815d3000 T viac3_crypto_setup -ffffffff815d3120 T viac3_crypto_newsession -ffffffff815d3650 T viac3_crypto_freesession -ffffffff815d3750 T viac3_crypto_process -ffffffff815d38b0 T viac3_crypto_swauth -ffffffff815d38d0 T viac3_crypto_encdec -ffffffff815d3bb0 T viac3_rnd -ffffffff815d4000 T lgdt -ffffffff815d4040 T setjmp -ffffffff815d4090 T longjmp -ffffffff815d40e0 T cpu_switchto -ffffffff815d416c t switch_exited -ffffffff815d41aa t restore_saved -ffffffff815d428e t switch_restored -ffffffff815d42d0 T retpoline_rax -ffffffff815d42f0 T __x86_indirect_thunk_r11 -ffffffff815d4310 T cpu_idle_cycle_hlt -ffffffff815d4340 T savectx -ffffffff815d4400 T proc_trampoline -ffffffff815d44e0 T intr_fast_exit -ffffffff815d4570 T xrstor_kern -ffffffff815d45a0 T xrstor_user -ffffffff815d45b8 T xrstor_fault -ffffffff815d45e0 T xrstor_resume -ffffffff815d4600 T fpusave -ffffffff815d4640 T fpusavereset -ffffffff815d4680 T xsetbv_user -ffffffff815d469a T xsetbv_fault -ffffffff815d46c0 T xsetbv_resume -ffffffff815d46e0 T pagezero -ffffffff815d4730 T pku_xonly -ffffffff815d4760 T rdmsr_safe -ffffffff815d4771 T rdmsr_safe_fault -ffffffff815d47a0 T rdmsr_resume -ffffffff815d47c0 T hv_hypercall_trampoline -ffffffff815d5000 T hv_hypercall_page -ffffffff815d6000 T xen_hypercall_page -ffffffff815d7000 t _key_expansion_128 -ffffffff815d7000 t _key_expansion_256a -ffffffff815d7040 t _key_expansion_192a -ffffffff815d70b0 t _key_expansion_192b -ffffffff815d7110 t _key_expansion_256b -ffffffff815d7150 T aesni_set_key -ffffffff815d7340 T aesni_enc -ffffffff815d7380 t _aesni_enc1 -ffffffff815d7450 t _aesni_enc4 -ffffffff815d7600 T aesni_dec -ffffffff815d7640 t _aesni_dec1 -ffffffff815d7710 t _aesni_dec4 -ffffffff815d78c0 T aesni_cbc_enc -ffffffff815d7920 T aesni_cbc_dec -ffffffff815d7a00 t _aesni_inc_init -ffffffff815d7a50 t _aesni_inc -ffffffff815d7aa0 T aesni_ctr_enc -ffffffff815d7b90 t _aesni_gmac_gfmul -ffffffff815d7ca0 T aesni_gmac_update -ffffffff815d7d20 T aesni_gmac_final -ffffffff815d7d60 T aesni_xts_enc -ffffffff815d7dd0 T aesni_xts_dec -ffffffff815d7e40 t _aesni_xts_tweak -ffffffff815d7e90 t _aesni_xts_tweak_exp -ffffffff815d8000 T aesni_setup -ffffffff815d8190 T aesni_newsession -ffffffff815d8740 T aesni_freesession -ffffffff815d8820 T aesni_process -ffffffff815d8a70 T aesni_free -ffffffff815d8bb0 T aesni_free_smr -ffffffff815d8bc0 T aesni_get -ffffffff815d8c60 T aesni_swauth -ffffffff815d8c80 T aesni_encdec -ffffffff815d9270 T pclmul_setup -ffffffff815d92a0 T ghash_update_pclmul -ffffffff815da000 T amd64_errata_testmsr -ffffffff815da050 T amd64_errata_setmsr -ffffffff815da0c0 T amd64_errata -ffffffff815db000 T cpu_ucode_setup -ffffffff815db090 T cpu_ucode_apply -ffffffff815db0e0 T cpu_ucode_intel_apply -ffffffff815db1f0 T cpu_ucode_amd_apply -ffffffff815db3c0 T cpu_ucode_intel_rev -ffffffff815db410 T cpu_ucode_intel_find -ffffffff815db5b0 T cpu_ucode_intel_verify -ffffffff815db630 T cpu_ucode_intel_match -ffffffff815dc000 T mmopen -ffffffff815dc0c0 T mmclose -ffffffff815dc110 T mmrw -ffffffff815dc350 T mmmmap -ffffffff815dc440 T mmioctl -ffffffff815dc4b0 T mem_ioctl -ffffffff815dc680 T mem_range_attr_get -ffffffff815dc6f0 T mem_range_attr_set -ffffffff815dd000 T mrinit -ffffffff815dd510 T mrset -ffffffff815dd6c0 T mrinit_cpu -ffffffff815dd6d0 T mrreload_cpu -ffffffff815dd710 T mtrr2mrt -ffffffff815dd750 T mtrrconflict -ffffffff815dd7b0 T mem_range_match -ffffffff815dd810 T mrfetch -ffffffff815ddc10 T mtrrtype -ffffffff815ddcf0 T mrt2mtrr -ffffffff815dddd0 T mrstore -ffffffff815dde30 T mrstoreone -ffffffff815de490 T mtrrfixsearch -ffffffff815de510 T mrsetlow -ffffffff815de690 T mrsetvariable -ffffffff815df000 T mem_range_attach -ffffffff815e0000 T pmap_map_ptes -ffffffff815e00e0 T pmap_unmap_ptes -ffffffff815e0130 T pmap_find_pte_direct -ffffffff815e0220 T pmap_kenter_pa -ffffffff815e0330 T pmap_tlb_shootpage -ffffffff815e0550 T pmap_tlb_shootwait -ffffffff815e0590 T pmap_kremove -ffffffff815e0670 T pmap_tlb_shootrange -ffffffff815e0900 T pmap_set_pml4_early -ffffffff815e0ab0 T pmap_clear_pml4_early -ffffffff815e0b20 T pmap_bootstrap -ffffffff815e1160 T pmap_init_percpu -ffffffff815e1180 T pmap_randomize -ffffffff815e13b0 T pmap_extract -ffffffff815e1560 T pmap_randomize_level -ffffffff815e17c0 T pmap_prealloc_lowmem_ptps -ffffffff815e18c0 T pmap_init -ffffffff815e18f0 T pmap_enter_pv -ffffffff815e1950 T pmap_remove_pv -ffffffff815e19f0 T pmap_find_ptp -ffffffff815e1a80 T pmap_freepage -ffffffff815e1b40 T pmap_free_ptp -ffffffff815e1d40 T pmap_get_ptp -ffffffff815e2080 T pmap_pdp_ctor -ffffffff815e22d0 T pmap_pdp_ctor_intel -ffffffff815e22f0 T pmap_create -ffffffff815e25d0 T pmap_destroy -ffffffff815e27a0 T pmap_reference -ffffffff815e27d0 T pmap_activate -ffffffff815e28a0 T pmap_deactivate -ffffffff815e2920 T pmap_pdes_valid -ffffffff815e29a0 T pmap_zero_page -ffffffff815e29d0 T pmap_flush_cache -ffffffff815e2a50 T pmap_copy_page -ffffffff815e2a80 T pmap_remove_ptes -ffffffff815e2c70 T pmap_remove_pte -ffffffff815e2e00 T pmap_remove -ffffffff815e2ed0 T pmap_remove_ept -ffffffff815e2f70 T pmap_do_remove -ffffffff815e3510 T pmap_tlb_shoottlb -ffffffff815e36f0 T pmap_page_remove -ffffffff815e3af0 T pmap_test_attrs -ffffffff815e3c80 T pmap_clear_attrs -ffffffff815e3e70 T pmap_write_protect -ffffffff815e4170 T pmap_unwire -ffffffff815e42c0 T pmap_enter_special -ffffffff815e48a0 T pmap_do_remove_ept -ffffffff815e4a80 T pmap_enter_ept -ffffffff815e4d10 T pmap_enter -ffffffff815e5570 T pmap_get_physpage -ffffffff815e5660 T pmap_steal_memory -ffffffff815e5980 T pmap_alloc_level -ffffffff815e5ba0 T pmap_growkernel -ffffffff815e5d60 T pmap_convert -ffffffff815e6000 T process_read_regs -ffffffff815e6120 T process_read_fpregs -ffffffff815e6170 T process_write_regs -ffffffff815e62b0 T process_write_fpregs -ffffffff815e6320 T process_sstep -ffffffff815e6380 T process_set_pc -ffffffff815e7000 T amd64_iopl -ffffffff815e70b0 T sys_sysarch -ffffffff815e8000 T upageflttrap -ffffffff815e8150 T kpageflttrap -ffffffff815e8350 t fault -ffffffff815e8400 T kerntrap -ffffffff815e8520 t trap_print -ffffffff815e8620 T usertrap -ffffffff815e8850 T ast -ffffffff815e8930 T syscall -ffffffff815e8f80 T child_return -ffffffff815ea000 T cpu_fork -ffffffff815ea1b0 T setguardpage -ffffffff815ea1f0 T cpu_exit -ffffffff815ea220 T vmapbuf -ffffffff815ea350 T vunmapbuf -ffffffff815ea420 T tcb_get -ffffffff815ea460 T tcb_set -ffffffff815eb000 T fpuinit -ffffffff815eb080 T fputrap -ffffffff815eb1a0 T fpu_kernel_enter -ffffffff815eb200 T fpu_kernel_exit -ffffffff815ec000 T softintr_init -ffffffff815ec0c0 T softintr_dispatch -ffffffff815ec1d0 T softintr_establish -ffffffff815ec280 T softintr_disestablish -ffffffff815ed000 t i8259_hwmask -ffffffff815ed060 t i8259_hwunmask -ffffffff815ed0c0 t i8259_setup -ffffffff815ed250 T i8259_default_setup -ffffffff815ee000 T amd64_print_l1_cacheinfo -ffffffff815ee180 T amd64_print_l2_cacheinfo -ffffffff815ee340 T intel_print_cacheinfo -ffffffff815ee580 T x86_print_cacheinfo -ffffffff815ef000 T Xcalltrap_specstk_untramp -ffffffff815ef050 T Xrecurse_lapic_ipi -ffffffff815ef0d0 T Xintr_lapic_ipi_untramp -ffffffff815ef210 T Xresume_lapic_ipi -ffffffff815ef260 T Xrecurse_lapic_ltimer -ffffffff815ef2e0 T Xintr_lapic_ltimer_untramp -ffffffff815ef420 T Xresume_lapic_ltimer -ffffffff815ef470 T Xrecurse_xen_upcall -ffffffff815ef4f0 T Xintr_xen_upcall_untramp -ffffffff815ef630 T Xresume_xen_upcall -ffffffff815ef680 T Xrecurse_hyperv_upcall -ffffffff815ef700 T Xintr_hyperv_upcall_untramp -ffffffff815ef840 T Xresume_hyperv_upcall -ffffffff815ef890 T Xrecurse_legacy0 -ffffffff815ef910 T Xresume_legacy0 -ffffffff815ef940 T Xintr_legacy0_untramp -ffffffff815efb70 T Xrecurse_legacy1 -ffffffff815efbf0 T Xresume_legacy1 -ffffffff815efc20 T Xintr_legacy1_untramp -ffffffff815efe50 T Xrecurse_legacy2 -ffffffff815efed0 T Xresume_legacy2 -ffffffff815eff00 T Xintr_legacy2_untramp -ffffffff815f0130 T Xrecurse_legacy3 -ffffffff815f01b0 T Xresume_legacy3 -ffffffff815f01e0 T Xintr_legacy3_untramp -ffffffff815f0410 T Xrecurse_legacy4 -ffffffff815f0490 T Xresume_legacy4 -ffffffff815f04c0 T Xintr_legacy4_untramp -ffffffff815f06f0 T Xrecurse_legacy5 -ffffffff815f0770 T Xresume_legacy5 -ffffffff815f07a0 T Xintr_legacy5_untramp -ffffffff815f09d0 T Xrecurse_legacy6 -ffffffff815f0a50 T Xresume_legacy6 -ffffffff815f0a80 T Xintr_legacy6_untramp -ffffffff815f0cb0 T Xrecurse_legacy7 -ffffffff815f0d30 T Xresume_legacy7 -ffffffff815f0d60 T Xintr_legacy7_untramp -ffffffff815f0f90 T Xrecurse_legacy8 -ffffffff815f1010 T Xresume_legacy8 -ffffffff815f1040 T Xintr_legacy8_untramp -ffffffff815f1270 T Xrecurse_legacy9 -ffffffff815f12f0 T Xresume_legacy9 -ffffffff815f1320 T Xintr_legacy9_untramp -ffffffff815f1550 T Xrecurse_legacy10 -ffffffff815f15d0 T Xresume_legacy10 -ffffffff815f1600 T Xintr_legacy10_untramp -ffffffff815f1830 T Xrecurse_legacy11 -ffffffff815f18b0 T Xresume_legacy11 -ffffffff815f18e0 T Xintr_legacy11_untramp -ffffffff815f1b10 T Xrecurse_legacy12 -ffffffff815f1b90 T Xresume_legacy12 -ffffffff815f1bc0 T Xintr_legacy12_untramp -ffffffff815f1df0 T Xrecurse_legacy13 -ffffffff815f1e70 T Xresume_legacy13 -ffffffff815f1ea0 T Xintr_legacy13_untramp -ffffffff815f20d0 T Xrecurse_legacy14 -ffffffff815f2150 T Xresume_legacy14 -ffffffff815f2180 T Xintr_legacy14_untramp -ffffffff815f23b0 T Xrecurse_legacy15 -ffffffff815f2430 T Xresume_legacy15 -ffffffff815f2460 T Xintr_legacy15_untramp -ffffffff815f2690 T Xrecurse_ioapic_edge0 -ffffffff815f2710 T Xresume_ioapic_edge0 -ffffffff815f2740 T Xintr_ioapic_edge0_untramp -ffffffff815f2960 T Xrecurse_ioapic_edge1 -ffffffff815f29e0 T Xresume_ioapic_edge1 -ffffffff815f2a10 T Xintr_ioapic_edge1_untramp -ffffffff815f2c30 T Xrecurse_ioapic_edge2 -ffffffff815f2cb0 T Xresume_ioapic_edge2 -ffffffff815f2ce0 T Xintr_ioapic_edge2_untramp -ffffffff815f2f00 T Xrecurse_ioapic_edge3 -ffffffff815f2f80 T Xresume_ioapic_edge3 -ffffffff815f2fb0 T Xintr_ioapic_edge3_untramp -ffffffff815f31d0 T Xrecurse_ioapic_edge4 -ffffffff815f3250 T Xresume_ioapic_edge4 -ffffffff815f3280 T Xintr_ioapic_edge4_untramp -ffffffff815f34a0 T Xrecurse_ioapic_edge5 -ffffffff815f3520 T Xresume_ioapic_edge5 -ffffffff815f3550 T Xintr_ioapic_edge5_untramp -ffffffff815f3770 T Xrecurse_ioapic_edge6 -ffffffff815f37f0 T Xresume_ioapic_edge6 -ffffffff815f3820 T Xintr_ioapic_edge6_untramp -ffffffff815f3a40 T Xrecurse_ioapic_edge7 -ffffffff815f3ac0 T Xresume_ioapic_edge7 -ffffffff815f3af0 T Xintr_ioapic_edge7_untramp -ffffffff815f3d10 T Xrecurse_ioapic_edge8 -ffffffff815f3d90 T Xresume_ioapic_edge8 -ffffffff815f3dc0 T Xintr_ioapic_edge8_untramp -ffffffff815f3fe0 T Xrecurse_ioapic_edge9 -ffffffff815f4060 T Xresume_ioapic_edge9 -ffffffff815f4090 T Xintr_ioapic_edge9_untramp -ffffffff815f42b0 T Xrecurse_ioapic_edge10 -ffffffff815f4330 T Xresume_ioapic_edge10 -ffffffff815f4360 T Xintr_ioapic_edge10_untramp -ffffffff815f4580 T Xrecurse_ioapic_edge11 -ffffffff815f4600 T Xresume_ioapic_edge11 -ffffffff815f4630 T Xintr_ioapic_edge11_untramp -ffffffff815f4850 T Xrecurse_ioapic_edge12 -ffffffff815f48d0 T Xresume_ioapic_edge12 -ffffffff815f4900 T Xintr_ioapic_edge12_untramp -ffffffff815f4b20 T Xrecurse_ioapic_edge13 -ffffffff815f4ba0 T Xresume_ioapic_edge13 -ffffffff815f4bd0 T Xintr_ioapic_edge13_untramp -ffffffff815f4df0 T Xrecurse_ioapic_edge14 -ffffffff815f4e70 T Xresume_ioapic_edge14 -ffffffff815f4ea0 T Xintr_ioapic_edge14_untramp -ffffffff815f50c0 T Xrecurse_ioapic_edge15 -ffffffff815f5140 T Xresume_ioapic_edge15 -ffffffff815f5170 T Xintr_ioapic_edge15_untramp -ffffffff815f5390 T Xrecurse_ioapic_edge16 -ffffffff815f5410 T Xresume_ioapic_edge16 -ffffffff815f5440 T Xintr_ioapic_edge16_untramp -ffffffff815f5660 T Xrecurse_ioapic_edge17 -ffffffff815f56e0 T Xresume_ioapic_edge17 -ffffffff815f5710 T Xintr_ioapic_edge17_untramp -ffffffff815f5930 T Xrecurse_ioapic_edge18 -ffffffff815f59b0 T Xresume_ioapic_edge18 -ffffffff815f59e0 T Xintr_ioapic_edge18_untramp -ffffffff815f5c00 T Xrecurse_ioapic_edge19 -ffffffff815f5c80 T Xresume_ioapic_edge19 -ffffffff815f5cb0 T Xintr_ioapic_edge19_untramp -ffffffff815f5ed0 T Xrecurse_ioapic_edge20 -ffffffff815f5f50 T Xresume_ioapic_edge20 -ffffffff815f5f80 T Xintr_ioapic_edge20_untramp -ffffffff815f61a0 T Xrecurse_ioapic_edge21 -ffffffff815f6220 T Xresume_ioapic_edge21 -ffffffff815f6250 T Xintr_ioapic_edge21_untramp -ffffffff815f6470 T Xrecurse_ioapic_edge22 -ffffffff815f64f0 T Xresume_ioapic_edge22 -ffffffff815f6520 T Xintr_ioapic_edge22_untramp -ffffffff815f6740 T Xrecurse_ioapic_edge23 -ffffffff815f67c0 T Xresume_ioapic_edge23 -ffffffff815f67f0 T Xintr_ioapic_edge23_untramp -ffffffff815f6a10 T Xrecurse_ioapic_edge24 -ffffffff815f6a90 T Xresume_ioapic_edge24 -ffffffff815f6ac0 T Xintr_ioapic_edge24_untramp -ffffffff815f6ce0 T Xrecurse_ioapic_edge25 -ffffffff815f6d60 T Xresume_ioapic_edge25 -ffffffff815f6d90 T Xintr_ioapic_edge25_untramp -ffffffff815f6fb0 T Xrecurse_ioapic_edge26 -ffffffff815f7030 T Xresume_ioapic_edge26 -ffffffff815f7060 T Xintr_ioapic_edge26_untramp -ffffffff815f7280 T Xrecurse_ioapic_edge27 -ffffffff815f7300 T Xresume_ioapic_edge27 -ffffffff815f7330 T Xintr_ioapic_edge27_untramp -ffffffff815f7550 T Xrecurse_ioapic_edge28 -ffffffff815f75d0 T Xresume_ioapic_edge28 -ffffffff815f7600 T Xintr_ioapic_edge28_untramp -ffffffff815f7820 T Xrecurse_ioapic_edge29 -ffffffff815f78a0 T Xresume_ioapic_edge29 -ffffffff815f78d0 T Xintr_ioapic_edge29_untramp -ffffffff815f7af0 T Xrecurse_ioapic_edge30 -ffffffff815f7b70 T Xresume_ioapic_edge30 -ffffffff815f7ba0 T Xintr_ioapic_edge30_untramp -ffffffff815f7dc0 T Xrecurse_ioapic_edge31 -ffffffff815f7e40 T Xresume_ioapic_edge31 -ffffffff815f7e70 T Xintr_ioapic_edge31_untramp -ffffffff815f80a0 T Xrecurse_ioapic_edge32 -ffffffff815f8120 T Xresume_ioapic_edge32 -ffffffff815f8150 T Xintr_ioapic_edge32_untramp -ffffffff815f8380 T Xrecurse_ioapic_edge33 -ffffffff815f8400 T Xresume_ioapic_edge33 -ffffffff815f8430 T Xintr_ioapic_edge33_untramp -ffffffff815f8660 T Xrecurse_ioapic_edge34 -ffffffff815f86e0 T Xresume_ioapic_edge34 -ffffffff815f8710 T Xintr_ioapic_edge34_untramp -ffffffff815f8940 T Xrecurse_ioapic_edge35 -ffffffff815f89c0 T Xresume_ioapic_edge35 -ffffffff815f89f0 T Xintr_ioapic_edge35_untramp -ffffffff815f8c20 T Xrecurse_ioapic_edge36 -ffffffff815f8ca0 T Xresume_ioapic_edge36 -ffffffff815f8cd0 T Xintr_ioapic_edge36_untramp -ffffffff815f8f00 T Xrecurse_ioapic_edge37 -ffffffff815f8f80 T Xresume_ioapic_edge37 -ffffffff815f8fb0 T Xintr_ioapic_edge37_untramp -ffffffff815f91e0 T Xrecurse_ioapic_edge38 -ffffffff815f9260 T Xresume_ioapic_edge38 -ffffffff815f9290 T Xintr_ioapic_edge38_untramp -ffffffff815f94c0 T Xrecurse_ioapic_edge39 -ffffffff815f9540 T Xresume_ioapic_edge39 -ffffffff815f9570 T Xintr_ioapic_edge39_untramp -ffffffff815f97a0 T Xrecurse_ioapic_edge40 -ffffffff815f9820 T Xresume_ioapic_edge40 -ffffffff815f9850 T Xintr_ioapic_edge40_untramp -ffffffff815f9a80 T Xrecurse_ioapic_edge41 -ffffffff815f9b00 T Xresume_ioapic_edge41 -ffffffff815f9b30 T Xintr_ioapic_edge41_untramp -ffffffff815f9d60 T Xrecurse_ioapic_edge42 -ffffffff815f9de0 T Xresume_ioapic_edge42 -ffffffff815f9e10 T Xintr_ioapic_edge42_untramp -ffffffff815fa040 T Xrecurse_ioapic_edge43 -ffffffff815fa0c0 T Xresume_ioapic_edge43 -ffffffff815fa0f0 T Xintr_ioapic_edge43_untramp -ffffffff815fa320 T Xrecurse_ioapic_edge44 -ffffffff815fa3a0 T Xresume_ioapic_edge44 -ffffffff815fa3d0 T Xintr_ioapic_edge44_untramp -ffffffff815fa600 T Xrecurse_ioapic_edge45 -ffffffff815fa680 T Xresume_ioapic_edge45 -ffffffff815fa6b0 T Xintr_ioapic_edge45_untramp -ffffffff815fa8e0 T Xrecurse_ioapic_edge46 -ffffffff815fa960 T Xresume_ioapic_edge46 -ffffffff815fa990 T Xintr_ioapic_edge46_untramp -ffffffff815fabc0 T Xrecurse_ioapic_edge47 -ffffffff815fac40 T Xresume_ioapic_edge47 -ffffffff815fac70 T Xintr_ioapic_edge47_untramp -ffffffff815faea0 T Xrecurse_ioapic_edge48 -ffffffff815faf20 T Xresume_ioapic_edge48 -ffffffff815faf50 T Xintr_ioapic_edge48_untramp -ffffffff815fb180 T Xrecurse_ioapic_edge49 -ffffffff815fb200 T Xresume_ioapic_edge49 -ffffffff815fb230 T Xintr_ioapic_edge49_untramp -ffffffff815fb460 T Xrecurse_ioapic_edge50 -ffffffff815fb4e0 T Xresume_ioapic_edge50 -ffffffff815fb510 T Xintr_ioapic_edge50_untramp -ffffffff815fb740 T Xrecurse_ioapic_edge51 -ffffffff815fb7c0 T Xresume_ioapic_edge51 -ffffffff815fb7f0 T Xintr_ioapic_edge51_untramp -ffffffff815fba20 T Xrecurse_ioapic_edge52 -ffffffff815fbaa0 T Xresume_ioapic_edge52 -ffffffff815fbad0 T Xintr_ioapic_edge52_untramp -ffffffff815fbd00 T Xrecurse_ioapic_edge53 -ffffffff815fbd80 T Xresume_ioapic_edge53 -ffffffff815fbdb0 T Xintr_ioapic_edge53_untramp -ffffffff815fbfe0 T Xrecurse_ioapic_edge54 -ffffffff815fc060 T Xresume_ioapic_edge54 -ffffffff815fc090 T Xintr_ioapic_edge54_untramp -ffffffff815fc2c0 T Xrecurse_ioapic_edge55 -ffffffff815fc340 T Xresume_ioapic_edge55 -ffffffff815fc370 T Xintr_ioapic_edge55_untramp -ffffffff815fc5a0 T Xrecurse_ioapic_edge56 -ffffffff815fc620 T Xresume_ioapic_edge56 -ffffffff815fc650 T Xintr_ioapic_edge56_untramp -ffffffff815fc880 T Xrecurse_ioapic_edge57 -ffffffff815fc900 T Xresume_ioapic_edge57 -ffffffff815fc930 T Xintr_ioapic_edge57_untramp -ffffffff815fcb60 T Xrecurse_ioapic_edge58 -ffffffff815fcbe0 T Xresume_ioapic_edge58 -ffffffff815fcc10 T Xintr_ioapic_edge58_untramp -ffffffff815fce40 T Xrecurse_ioapic_edge59 -ffffffff815fcec0 T Xresume_ioapic_edge59 -ffffffff815fcef0 T Xintr_ioapic_edge59_untramp -ffffffff815fd120 T Xrecurse_ioapic_edge60 -ffffffff815fd1a0 T Xresume_ioapic_edge60 -ffffffff815fd1d0 T Xintr_ioapic_edge60_untramp -ffffffff815fd400 T Xrecurse_ioapic_edge61 -ffffffff815fd480 T Xresume_ioapic_edge61 -ffffffff815fd4b0 T Xintr_ioapic_edge61_untramp -ffffffff815fd6e0 T Xrecurse_ioapic_edge62 -ffffffff815fd760 T Xresume_ioapic_edge62 -ffffffff815fd790 T Xintr_ioapic_edge62_untramp -ffffffff815fd9c0 T Xrecurse_ioapic_edge63 -ffffffff815fda40 T Xresume_ioapic_edge63 -ffffffff815fda70 T Xintr_ioapic_edge63_untramp -ffffffff815fdca0 T Xrecurse_ioapic_level0 -ffffffff815fdd20 T Xresume_ioapic_level0 -ffffffff815fdd50 T Xintr_ioapic_level0_untramp -ffffffff815fe060 T Xrecurse_ioapic_level1 -ffffffff815fe0e0 T Xresume_ioapic_level1 -ffffffff815fe110 T Xintr_ioapic_level1_untramp -ffffffff815fe420 T Xrecurse_ioapic_level2 -ffffffff815fe4a0 T Xresume_ioapic_level2 -ffffffff815fe4d0 T Xintr_ioapic_level2_untramp -ffffffff815fe7e0 T Xrecurse_ioapic_level3 -ffffffff815fe860 T Xresume_ioapic_level3 -ffffffff815fe890 T Xintr_ioapic_level3_untramp -ffffffff815feba0 T Xrecurse_ioapic_level4 -ffffffff815fec20 T Xresume_ioapic_level4 -ffffffff815fec50 T Xintr_ioapic_level4_untramp -ffffffff815fef60 T Xrecurse_ioapic_level5 -ffffffff815fefe0 T Xresume_ioapic_level5 -ffffffff815ff010 T Xintr_ioapic_level5_untramp -ffffffff815ff320 T Xrecurse_ioapic_level6 -ffffffff815ff3a0 T Xresume_ioapic_level6 -ffffffff815ff3d0 T Xintr_ioapic_level6_untramp -ffffffff815ff6e0 T Xrecurse_ioapic_level7 -ffffffff815ff760 T Xresume_ioapic_level7 -ffffffff815ff790 T Xintr_ioapic_level7_untramp -ffffffff815ffaa0 T Xrecurse_ioapic_level8 -ffffffff815ffb20 T Xresume_ioapic_level8 -ffffffff815ffb50 T Xintr_ioapic_level8_untramp -ffffffff815ffe60 T Xrecurse_ioapic_level9 -ffffffff815ffee0 T Xresume_ioapic_level9 -ffffffff815fff10 T Xintr_ioapic_level9_untramp -ffffffff81600220 T Xrecurse_ioapic_level10 -ffffffff816002a0 T Xresume_ioapic_level10 -ffffffff816002d0 T Xintr_ioapic_level10_untramp -ffffffff816005e0 T Xrecurse_ioapic_level11 -ffffffff81600660 T Xresume_ioapic_level11 -ffffffff81600690 T Xintr_ioapic_level11_untramp -ffffffff816009a0 T Xrecurse_ioapic_level12 -ffffffff81600a20 T Xresume_ioapic_level12 -ffffffff81600a50 T Xintr_ioapic_level12_untramp -ffffffff81600d60 T Xrecurse_ioapic_level13 -ffffffff81600de0 T Xresume_ioapic_level13 -ffffffff81600e10 T Xintr_ioapic_level13_untramp -ffffffff81601120 T Xrecurse_ioapic_level14 -ffffffff816011a0 T Xresume_ioapic_level14 -ffffffff816011d0 T Xintr_ioapic_level14_untramp -ffffffff816014e0 T Xrecurse_ioapic_level15 -ffffffff81601560 T Xresume_ioapic_level15 -ffffffff81601590 T Xintr_ioapic_level15_untramp -ffffffff816018a0 T Xrecurse_ioapic_level16 -ffffffff81601920 T Xresume_ioapic_level16 -ffffffff81601950 T Xintr_ioapic_level16_untramp -ffffffff81601c60 T Xrecurse_ioapic_level17 -ffffffff81601ce0 T Xresume_ioapic_level17 -ffffffff81601d10 T Xintr_ioapic_level17_untramp -ffffffff81602020 T Xrecurse_ioapic_level18 -ffffffff816020a0 T Xresume_ioapic_level18 -ffffffff816020d0 T Xintr_ioapic_level18_untramp -ffffffff816023e0 T Xrecurse_ioapic_level19 -ffffffff81602460 T Xresume_ioapic_level19 -ffffffff81602490 T Xintr_ioapic_level19_untramp -ffffffff816027a0 T Xrecurse_ioapic_level20 -ffffffff81602820 T Xresume_ioapic_level20 -ffffffff81602850 T Xintr_ioapic_level20_untramp -ffffffff81602b60 T Xrecurse_ioapic_level21 -ffffffff81602be0 T Xresume_ioapic_level21 -ffffffff81602c10 T Xintr_ioapic_level21_untramp -ffffffff81602f20 T Xrecurse_ioapic_level22 -ffffffff81602fa0 T Xresume_ioapic_level22 -ffffffff81602fd0 T Xintr_ioapic_level22_untramp -ffffffff816032e0 T Xrecurse_ioapic_level23 -ffffffff81603360 T Xresume_ioapic_level23 -ffffffff81603390 T Xintr_ioapic_level23_untramp -ffffffff816036a0 T Xrecurse_ioapic_level24 -ffffffff81603720 T Xresume_ioapic_level24 -ffffffff81603750 T Xintr_ioapic_level24_untramp -ffffffff81603a60 T Xrecurse_ioapic_level25 -ffffffff81603ae0 T Xresume_ioapic_level25 -ffffffff81603b10 T Xintr_ioapic_level25_untramp -ffffffff81603e20 T Xrecurse_ioapic_level26 -ffffffff81603ea0 T Xresume_ioapic_level26 -ffffffff81603ed0 T Xintr_ioapic_level26_untramp -ffffffff816041e0 T Xrecurse_ioapic_level27 -ffffffff81604260 T Xresume_ioapic_level27 -ffffffff81604290 T Xintr_ioapic_level27_untramp -ffffffff816045a0 T Xrecurse_ioapic_level28 -ffffffff81604620 T Xresume_ioapic_level28 -ffffffff81604650 T Xintr_ioapic_level28_untramp -ffffffff81604960 T Xrecurse_ioapic_level29 -ffffffff816049e0 T Xresume_ioapic_level29 -ffffffff81604a10 T Xintr_ioapic_level29_untramp -ffffffff81604d20 T Xrecurse_ioapic_level30 -ffffffff81604da0 T Xresume_ioapic_level30 -ffffffff81604dd0 T Xintr_ioapic_level30_untramp -ffffffff816050e0 T Xrecurse_ioapic_level31 -ffffffff81605160 T Xresume_ioapic_level31 -ffffffff81605190 T Xintr_ioapic_level31_untramp -ffffffff816054a0 T Xrecurse_ioapic_level32 -ffffffff81605520 T Xresume_ioapic_level32 -ffffffff81605550 T Xintr_ioapic_level32_untramp -ffffffff81605860 T Xrecurse_ioapic_level33 -ffffffff816058e0 T Xresume_ioapic_level33 -ffffffff81605910 T Xintr_ioapic_level33_untramp -ffffffff81605c20 T Xrecurse_ioapic_level34 -ffffffff81605ca0 T Xresume_ioapic_level34 -ffffffff81605cd0 T Xintr_ioapic_level34_untramp -ffffffff81605fe0 T Xrecurse_ioapic_level35 -ffffffff81606060 T Xresume_ioapic_level35 -ffffffff81606090 T Xintr_ioapic_level35_untramp -ffffffff816063a0 T Xrecurse_ioapic_level36 -ffffffff81606420 T Xresume_ioapic_level36 -ffffffff81606450 T Xintr_ioapic_level36_untramp -ffffffff81606760 T Xrecurse_ioapic_level37 -ffffffff816067e0 T Xresume_ioapic_level37 -ffffffff81606810 T Xintr_ioapic_level37_untramp -ffffffff81606b20 T Xrecurse_ioapic_level38 -ffffffff81606ba0 T Xresume_ioapic_level38 -ffffffff81606bd0 T Xintr_ioapic_level38_untramp -ffffffff81606ee0 T Xrecurse_ioapic_level39 -ffffffff81606f60 T Xresume_ioapic_level39 -ffffffff81606f90 T Xintr_ioapic_level39_untramp -ffffffff816072a0 T Xrecurse_ioapic_level40 -ffffffff81607320 T Xresume_ioapic_level40 -ffffffff81607350 T Xintr_ioapic_level40_untramp -ffffffff81607660 T Xrecurse_ioapic_level41 -ffffffff816076e0 T Xresume_ioapic_level41 -ffffffff81607710 T Xintr_ioapic_level41_untramp -ffffffff81607a20 T Xrecurse_ioapic_level42 -ffffffff81607aa0 T Xresume_ioapic_level42 -ffffffff81607ad0 T Xintr_ioapic_level42_untramp -ffffffff81607de0 T Xrecurse_ioapic_level43 -ffffffff81607e60 T Xresume_ioapic_level43 -ffffffff81607e90 T Xintr_ioapic_level43_untramp -ffffffff816081a0 T Xrecurse_ioapic_level44 -ffffffff81608220 T Xresume_ioapic_level44 -ffffffff81608250 T Xintr_ioapic_level44_untramp -ffffffff81608560 T Xrecurse_ioapic_level45 -ffffffff816085e0 T Xresume_ioapic_level45 -ffffffff81608610 T Xintr_ioapic_level45_untramp -ffffffff81608920 T Xrecurse_ioapic_level46 -ffffffff816089a0 T Xresume_ioapic_level46 -ffffffff816089d0 T Xintr_ioapic_level46_untramp -ffffffff81608ce0 T Xrecurse_ioapic_level47 -ffffffff81608d60 T Xresume_ioapic_level47 -ffffffff81608d90 T Xintr_ioapic_level47_untramp -ffffffff816090a0 T Xrecurse_ioapic_level48 -ffffffff81609120 T Xresume_ioapic_level48 -ffffffff81609150 T Xintr_ioapic_level48_untramp -ffffffff81609460 T Xrecurse_ioapic_level49 -ffffffff816094e0 T Xresume_ioapic_level49 -ffffffff81609510 T Xintr_ioapic_level49_untramp -ffffffff81609820 T Xrecurse_ioapic_level50 -ffffffff816098a0 T Xresume_ioapic_level50 -ffffffff816098d0 T Xintr_ioapic_level50_untramp -ffffffff81609be0 T Xrecurse_ioapic_level51 -ffffffff81609c60 T Xresume_ioapic_level51 -ffffffff81609c90 T Xintr_ioapic_level51_untramp -ffffffff81609fa0 T Xrecurse_ioapic_level52 -ffffffff8160a020 T Xresume_ioapic_level52 -ffffffff8160a050 T Xintr_ioapic_level52_untramp -ffffffff8160a360 T Xrecurse_ioapic_level53 -ffffffff8160a3e0 T Xresume_ioapic_level53 -ffffffff8160a410 T Xintr_ioapic_level53_untramp -ffffffff8160a720 T Xrecurse_ioapic_level54 -ffffffff8160a7a0 T Xresume_ioapic_level54 -ffffffff8160a7d0 T Xintr_ioapic_level54_untramp -ffffffff8160aae0 T Xrecurse_ioapic_level55 -ffffffff8160ab60 T Xresume_ioapic_level55 -ffffffff8160ab90 T Xintr_ioapic_level55_untramp -ffffffff8160aea0 T Xrecurse_ioapic_level56 -ffffffff8160af20 T Xresume_ioapic_level56 -ffffffff8160af50 T Xintr_ioapic_level56_untramp -ffffffff8160b260 T Xrecurse_ioapic_level57 -ffffffff8160b2e0 T Xresume_ioapic_level57 -ffffffff8160b310 T Xintr_ioapic_level57_untramp -ffffffff8160b620 T Xrecurse_ioapic_level58 -ffffffff8160b6a0 T Xresume_ioapic_level58 -ffffffff8160b6d0 T Xintr_ioapic_level58_untramp -ffffffff8160b9e0 T Xrecurse_ioapic_level59 -ffffffff8160ba60 T Xresume_ioapic_level59 -ffffffff8160ba90 T Xintr_ioapic_level59_untramp -ffffffff8160bda0 T Xrecurse_ioapic_level60 -ffffffff8160be20 T Xresume_ioapic_level60 -ffffffff8160be50 T Xintr_ioapic_level60_untramp -ffffffff8160c160 T Xrecurse_ioapic_level61 -ffffffff8160c1e0 T Xresume_ioapic_level61 -ffffffff8160c210 T Xintr_ioapic_level61_untramp -ffffffff8160c520 T Xrecurse_ioapic_level62 -ffffffff8160c5a0 T Xresume_ioapic_level62 -ffffffff8160c5d0 T Xintr_ioapic_level62_untramp -ffffffff8160c8e0 T Xrecurse_ioapic_level63 -ffffffff8160c960 T Xresume_ioapic_level63 -ffffffff8160c990 T Xintr_ioapic_level63_untramp -ffffffff8160cca0 T retpoline_r13 -ffffffff8160ccc0 T Xsofttty -ffffffff8160cd00 T Xsoftnet -ffffffff8160cd40 T Xsoftclock -ffffffff8160d000 T kcopy -ffffffff8160d0d0 T copyout -ffffffff8160d160 T _copyin -ffffffff8160d200 T copy_fault -ffffffff8160d230 T copyoutstr -ffffffff8160d2c0 T _copyinstr -ffffffff8160d340 T copystr_fault -ffffffff8160d349 t copystr_return -ffffffff8160e000 T Xspllower -ffffffff8160e080 T Xdoreti -ffffffff8160f000 T mds_handler_ivb -ffffffff8160f070 T mds_handler_bdw -ffffffff8160f0e0 T mds_handler_skl -ffffffff8160f100 T mds_handler_skl_sse -ffffffff8160f180 T mds_handler_skl_avx -ffffffff8160f200 T mds_handler_skl_avx512 -ffffffff8160f280 T mds_handler_silvermont -ffffffff8160f2e0 T mds_handler_knights -ffffffff81610000 T intr_default_setup -ffffffff81610080 T x86_nmi -ffffffff816100d0 T intr_calculatemasks -ffffffff81610470 T intr_allocate_slot_cpu -ffffffff81610610 T intr_allocate_slot -ffffffff816108f0 T intr_establish -ffffffff81610d50 T intr_disestablish -ffffffff81610e90 T intr_handler -ffffffff81610f50 T cpu_intr_init -ffffffff816111a0 T intr_printconfig -ffffffff816111d0 T intr_barrier -ffffffff816111f0 T splraise -ffffffff81611270 T spllower -ffffffff816112e0 T softintr -ffffffff81612000 T x86_bus_space_io_read_1 -ffffffff81612030 T x86_bus_space_io_read_2 -ffffffff81612060 T x86_bus_space_io_read_4 -ffffffff81612090 T x86_bus_space_io_read_8 -ffffffff816120b0 T x86_bus_space_io_read_multi_1 -ffffffff816120f0 T x86_bus_space_io_read_multi_2 -ffffffff81612130 T x86_bus_space_io_read_multi_4 -ffffffff81612170 T x86_bus_space_io_read_multi_8 -ffffffff81612190 T x86_bus_space_io_read_region_1 -ffffffff816121d0 T x86_bus_space_io_read_region_2 -ffffffff81612210 T x86_bus_space_io_read_region_4 -ffffffff81612250 T x86_bus_space_io_read_region_8 -ffffffff81612270 T x86_bus_space_io_write_1 -ffffffff816122a0 T x86_bus_space_io_write_2 -ffffffff816122d0 T x86_bus_space_io_write_4 -ffffffff81612300 T x86_bus_space_io_write_8 -ffffffff81612320 T x86_bus_space_io_write_multi_1 -ffffffff81612360 T x86_bus_space_io_write_multi_2 -ffffffff816123a0 T x86_bus_space_io_write_multi_4 -ffffffff816123e0 T x86_bus_space_io_write_multi_8 -ffffffff81612400 T x86_bus_space_io_write_region_1 -ffffffff81612440 T x86_bus_space_io_write_region_2 -ffffffff81612480 T x86_bus_space_io_write_region_4 -ffffffff816124c0 T x86_bus_space_io_write_region_8 -ffffffff816124e0 T x86_bus_space_io_set_multi_1 -ffffffff81612530 T x86_bus_space_io_set_multi_2 -ffffffff81612580 T x86_bus_space_io_set_multi_4 -ffffffff816125d0 T x86_bus_space_io_set_multi_8 -ffffffff816125f0 T x86_bus_space_io_set_region_1 -ffffffff81612640 T x86_bus_space_io_set_region_2 -ffffffff816126a0 T x86_bus_space_io_set_region_4 -ffffffff816126f0 T x86_bus_space_io_set_region_8 -ffffffff81612710 T x86_bus_space_io_copy_1 -ffffffff816127a0 T x86_bus_space_io_copy_2 -ffffffff81612830 T x86_bus_space_io_copy_4 -ffffffff816128c0 T x86_bus_space_io_copy_8 -ffffffff816128e0 T x86_bus_space_io_vaddr -ffffffff81612910 T x86_bus_space_io_mmap -ffffffff81612940 T x86_bus_space_mem_read_1 -ffffffff81612970 T x86_bus_space_mem_read_2 -ffffffff816129a0 T x86_bus_space_mem_read_4 -ffffffff816129d0 T x86_bus_space_mem_read_8 -ffffffff81612a00 T x86_bus_space_mem_read_multi_1 -ffffffff81612a40 T x86_bus_space_mem_read_multi_2 -ffffffff81612a80 T x86_bus_space_mem_read_multi_4 -ffffffff81612ac0 T x86_bus_space_mem_read_multi_8 -ffffffff81612b00 T x86_bus_space_mem_read_region_1 -ffffffff81612b30 T x86_bus_space_mem_read_region_2 -ffffffff81612b70 T x86_bus_space_mem_read_region_4 -ffffffff81612ba0 T x86_bus_space_mem_read_region_8 -ffffffff81612be0 T x86_bus_space_mem_write_1 -ffffffff81612c10 T x86_bus_space_mem_write_2 -ffffffff81612c40 T x86_bus_space_mem_write_4 -ffffffff81612c70 T x86_bus_space_mem_write_8 -ffffffff81612ca0 T x86_bus_space_mem_write_multi_1 -ffffffff81612ce0 T x86_bus_space_mem_write_multi_2 -ffffffff81612d20 T x86_bus_space_mem_write_multi_4 -ffffffff81612d60 T x86_bus_space_mem_write_multi_8 -ffffffff81612da0 T x86_bus_space_mem_write_region_1 -ffffffff81612dd0 T x86_bus_space_mem_write_region_2 -ffffffff81612e10 T x86_bus_space_mem_write_region_4 -ffffffff81612e40 T x86_bus_space_mem_write_region_8 -ffffffff81612e80 T x86_bus_space_mem_set_multi_1 -ffffffff81612f00 T x86_bus_space_mem_set_multi_2 -ffffffff81612f90 T x86_bus_space_mem_set_multi_4 -ffffffff81613010 T x86_bus_space_mem_set_multi_8 -ffffffff816130a0 T x86_bus_space_mem_set_region_1 -ffffffff81613140 T x86_bus_space_mem_set_region_2 -ffffffff816131e0 T x86_bus_space_mem_set_region_4 -ffffffff81613280 T x86_bus_space_mem_set_region_8 -ffffffff81613320 T x86_bus_space_mem_copy_1 -ffffffff81613470 T x86_bus_space_mem_copy_2 -ffffffff816135d0 T x86_bus_space_mem_copy_4 -ffffffff81613720 T x86_bus_space_mem_copy_8 -ffffffff81613890 T x86_bus_space_mem_vaddr -ffffffff816138c0 T x86_bus_space_mem_mmap -ffffffff816138f0 T x86_bus_space_init -ffffffff81613990 T x86_bus_space_mallocok -ffffffff816139c0 T bus_space_map -ffffffff81613c20 T x86_mem_add_mapping -ffffffff81613d50 T _bus_space_map -ffffffff81613ea0 T bus_space_alloc -ffffffff81614100 T _bus_space_unmap -ffffffff81614230 T bus_space_unmap -ffffffff81614400 T bus_space_free -ffffffff81614420 T bus_space_subregion -ffffffff81615000 T _bus_dmamap_create -ffffffff816150b0 T _bus_dmamap_destroy -ffffffff816150e0 T _bus_dmamap_load -ffffffff81615180 T _bus_dmamap_load_buffer -ffffffff81615450 T _bus_dmamap_load_mbuf -ffffffff81615560 T _bus_dmamap_load_uio -ffffffff816156f0 T _bus_dmamap_load_raw -ffffffff81615960 T _bus_dmamap_unload -ffffffff816159a0 T _bus_dmamap_sync -ffffffff816159d0 T _bus_dmamem_alloc -ffffffff81615a20 T _bus_dmamem_alloc_range -ffffffff81615b90 T _bus_dmamem_free -ffffffff81615c70 T _bus_dmamem_map -ffffffff81615e70 T _bus_dmamem_unmap -ffffffff81615f10 T _bus_dmamem_mmap -ffffffff81616000 T cpu_spinup_finish -ffffffff81617000 T x86_64_ipi_halt -ffffffff816170b0 T x86_64_ipi_nop -ffffffff816170e0 T x86_64_ipi_vmclear_vmm -ffffffff816170f0 T x86_64_ipi_reload_mtrr -ffffffff81617140 T x86_64_ipi_start_vmm -ffffffff81617150 T x86_64_ipi_stop_vmm -ffffffff81617160 T x86_64_ipi_wbinvd -ffffffff81618000 T x86_send_ipi -ffffffff81618060 T x86_fast_ipi -ffffffff816180c0 T x86_broadcast_ipi -ffffffff81618150 T x86_ipi_handler -ffffffff81619000 T mp_setperf -ffffffff81619060 T x86_setperf_ipi -ffffffff81619080 T mp_setperf_init -ffffffff8161a000 T apic_format_redir -ffffffff8161b000 T consinit -ffffffff8161c000 T cninit -ffffffff8161d000 T dkcsumattach -ffffffff8161e000 T db_read_address -ffffffff8161e1b0 T db_print_address -ffffffff8161e2b0 T db_disasm_3dnow -ffffffff8161e340 T db_disasm_esc -ffffffff8161e540 T db_disasm -ffffffff81620000 T db_printtrap -ffffffff81620080 T db_ktrap -ffffffff81620260 T db_enter_ddb -ffffffff81620540 T db_sysregs_cmd -ffffffff81620660 T db_cpuinfo_cmd -ffffffff816207a0 T db_startproc_cmd -ffffffff816208f0 T db_startcpu -ffffffff81620970 T db_stopproc_cmd -ffffffff81620b10 T db_stopcpu -ffffffff81620ba0 T db_ddbproc_cmd -ffffffff81620cb0 T x86_ipi_db -ffffffff81620ce0 T db_enter -ffffffff81620d10 T db_machine_init -ffffffff81621000 T db_read_bytes -ffffffff81621100 T db_write_bytes -ffffffff81622000 T db_stack_trace_print -ffffffff81622580 T stacktrace_save_at -ffffffff81622660 T stacktrace_save_utrace -ffffffff816227b0 T db_get_pc -ffffffff816227d0 T db_get_probe_addr -ffffffff81623000 T in_cksum -ffffffff81624000 T in4_cksum -ffffffff81625000 T mc146818_read -ffffffff81625050 T mc146818_write -ffffffff816250a0 T startclocks -ffffffff81625100 T i8254_startclock -ffffffff81625140 T clockintr -ffffffff816251c0 T i8254_get_timecount -ffffffff81625240 T rtcintr -ffffffff816252d0 T gettick -ffffffff81625340 T i8254_delay -ffffffff81625460 T rtcdrain -ffffffff816254d0 T i8254_initclocks -ffffffff81625520 T i8254_inittimecounter -ffffffff81625540 T i8254_start_both_clocks -ffffffff81625630 T rtcstart -ffffffff816256c0 T rtcstop -ffffffff81625700 T rtcget -ffffffff816258e0 T rtcput -ffffffff81625b60 T bcdtobin -ffffffff81625ba0 T bintobcd -ffffffff81625c00 T rtcgettime -ffffffff81625f10 T rtcsettime -ffffffff81626130 T rtcinit -ffffffff81626170 T setstatclockrate -ffffffff81626210 T i8254_inittimecounter_simple -ffffffff81626280 T i8254_simple_get_timecount -ffffffff81627000 T k8pnow_read_pending_wait -ffffffff81627070 T k8_powernow_setperf -ffffffff816270c0 T k8pnow_transition -ffffffff81627510 T k8pnow_decode_pst -ffffffff816275e0 T k8pnow_acpi_states -ffffffff816276f0 T k8pnow_acpi_pss_changed -ffffffff81627900 T k8pnow_acpi_init -ffffffff81627ab0 T k8pnow_states -ffffffff81627cb0 T k8_powernow_init -ffffffff81628000 T p4_get_bus_clock -ffffffff816280e0 T p3_get_bus_clock -ffffffff81628230 T est_acpi_init -ffffffff81628380 T est_acpi_pss_changed -ffffffff81628620 T est_setperf -ffffffff816286e0 T est_init -ffffffff81629000 T k1x_setperf -ffffffff816290c0 T k1x_transition -ffffffff81629160 T k1x_acpi_states -ffffffff81629210 T k1x_acpi_init -ffffffff816292f0 T k1x_init -ffffffff8162a000 T rasops_init -ffffffff8162a3e0 T rasops_rotate_font -ffffffff8162a490 T rasops_reconfig -ffffffff8162a8c0 T rasops_alloc_screen -ffffffff8162ab00 T rasops_vcons_cursor -ffffffff8162abd0 T rasops_vcons_mapchar -ffffffff8162ac70 T rasops_vcons_putchar -ffffffff8162ad40 T rasops_vcons_copycols -ffffffff8162ae70 T rasops_vcons_erasecols -ffffffff8162af80 T rasops_vcons_copyrows -ffffffff8162b1a0 T rasops_vcons_eraserows -ffffffff8162b2c0 T rasops_vcons_pack_attr -ffffffff8162b2e0 T rasops_vcons_unpack_attr -ffffffff8162b330 T rasops_wronly_do_cursor -ffffffff8162b390 T rasops_wronly_putchar -ffffffff8162b3d0 T rasops_wronly_copycols -ffffffff8162b4c0 T rasops_wronly_erasecols -ffffffff8162b580 T rasops_wronly_copyrows -ffffffff8162b690 T rasops_wronly_eraserows -ffffffff8162b750 T rasops_doswitch -ffffffff8162b930 T rasops_init_devcmap -ffffffff8162bbd0 T rasops_mapchar -ffffffff8162bc70 T rasops_copyrows -ffffffff8162be50 T rasops_copycols -ffffffff8162c030 T rasops_erasecols -ffffffff8162c520 T rasops_eraserows -ffffffff8162c6f0 T rasops_cursor -ffffffff8162c7a0 T rasops_unpack_attr -ffffffff8162c7f0 T rasops_do_cursor -ffffffff8162ca20 T rasops_pack_mattr -ffffffff8162ca80 T rasops_pack_cattr -ffffffff8162cb00 T rasops_copycols_rotated -ffffffff8162ce10 T rasops_copyrows_rotated -ffffffff8162d1c0 T rasops_erasecols_rotated -ffffffff8162d3c0 T rasops_eraserows_rotated -ffffffff8162d5b0 T rasops_putchar_rotated -ffffffff8162d750 T rasops_copychar -ffffffff8162d8c0 T rasops_free_screen -ffffffff8162d950 T rasops_show_screen -ffffffff8162d9d0 T rasops_getchar -ffffffff8162da30 T rasops_scrollback -ffffffff8162dbf0 T rasops_add_font -ffffffff8162dc70 T rasops_use_font -ffffffff8162dd40 T rasops_load_font -ffffffff8162dde0 T rasops_list_font_cb -ffffffff8162de20 T rasops_list_font -ffffffff8162ded0 T rasops_claim_framebuffer -ffffffff8162df50 T rasops_check_framebuffer -ffffffff8162e000 T rasops8_init -ffffffff8162e070 T rasops8_putchar8 -ffffffff8162e350 T rasops8_putchar12 -ffffffff8162e5b0 T rasops8_putchar16 -ffffffff8162e7a0 T rasops8_putchar -ffffffff8162ea80 T rasops8_makestamp -ffffffff8162f000 T rasops15_init -ffffffff8162f090 T rasops15_putchar8 -ffffffff8162f320 T rasops15_putchar12 -ffffffff8162f590 T rasops15_putchar16 -ffffffff8162f840 T rasops15_putchar -ffffffff8162fb50 T rasops15_makestamp -ffffffff81630000 T rasops24_init -ffffffff81630080 T rasops24_putchar8 -ffffffff81630270 T rasops24_putchar12 -ffffffff816304b0 T rasops24_putchar16 -ffffffff816306e0 T rasops24_putchar -ffffffff816309e0 T rasops24_makestamp -ffffffff81631000 T rasops32_init -ffffffff81631050 T rasops32_putchar -ffffffff81632000 T wsfont_enum -ffffffff81632060 T wsfont_rotate_cw -ffffffff816321f0 T wsfont_rotate_ccw -ffffffff81632390 T wsfont_rotate_internal -ffffffff81632710 T wsfont_add -ffffffff81632860 T wsfont_rotate -ffffffff81632910 T wsfont_find -ffffffff816329f0 T wsfont_init -ffffffff81632aa0 T wsfont_lock -ffffffff81632d10 T wsfont_unlock -ffffffff81632db0 T wsfont_map_unichar -ffffffff81633000 T mii_attach -ffffffff816331d0 T mii_print -ffffffff81633250 T mii_submatch -ffffffff816332a0 T mii_detach -ffffffff81633390 T mii_mediachg -ffffffff81633420 T mii_tick -ffffffff81633490 T mii_pollstat -ffffffff81633510 T mii_down -ffffffff81634000 T mii_phy_setmedia -ffffffff81634170 T mii_phy_auto -ffffffff81634400 T mii_phy_auto_timeout -ffffffff816344b0 T mii_phy_tick -ffffffff816345d0 T mii_phy_reset -ffffffff816346d0 T mii_phy_down -ffffffff81634720 T mii_phy_status -ffffffff81634740 T mii_phy_update -ffffffff81634870 T mii_phy_statusmsg -ffffffff81634920 T mii_phy_add_media -ffffffff81634c10 T mii_phy_delete_media -ffffffff81634c30 T mii_phy_detach -ffffffff81634c90 T mii_phy_match -ffffffff81634d00 T mii_phy_flowstatus -ffffffff81634e30 T mii_anar -ffffffff81635000 T ukphy_status -ffffffff81636000 T nsphymatch -ffffffff81636050 T nsphyattach -ffffffff816361a0 T nsphy_service -ffffffff81636310 T nsphy_status -ffffffff81636550 T nsphy_reset -ffffffff81637000 T nsphytermatch -ffffffff81637050 T nsphyterattach -ffffffff81637130 T nsphyter_service -ffffffff81637250 T nsphyter_status -ffffffff81638000 T gentbimatch -ffffffff816380a0 T gentbiattach -ffffffff816381c0 T gentbi_service -ffffffff816382c0 T gentbi_status -ffffffff81639000 T qsphymatch -ffffffff81639050 T qsphyattach -ffffffff81639150 T qsphy_service -ffffffff81639270 T qsphy_status -ffffffff81639440 T qsphy_reset -ffffffff8163a000 T inphymatch -ffffffff8163a050 T inphyattach -ffffffff8163a130 T inphy_service -ffffffff8163a250 T inphy_status -ffffffff8163b000 T iophymatch -ffffffff8163b050 T iophyattach -ffffffff8163b130 T iophy_service -ffffffff8163b250 T iophy_status -ffffffff8163c000 T eephy_match -ffffffff8163c050 T eephy_attach -ffffffff8163c350 T eephy_service -ffffffff8163c4d0 T eephy_status -ffffffff8163c660 T eephy_reset -ffffffff8163d000 T exphymatch -ffffffff8163d0a0 T exphyattach -ffffffff8163d1b0 T exphy_service -ffffffff8163d270 T exphy_reset -ffffffff8163e000 T rlphymatch -ffffffff8163e0c0 T rlphyattach -ffffffff8163e1c0 T rlphy_service -ffffffff8163e340 T rlphy_status -ffffffff8163f000 T lxtphymatch -ffffffff8163f050 T lxtphyattach -ffffffff8163f190 T lxtphy_service -ffffffff8163f2b0 T lxtphy_status -ffffffff8163f410 T lxtphy_reset -ffffffff81640000 T luphymatch -ffffffff81640050 T luphyattach -ffffffff81640130 T luphy_service -ffffffff81641000 T mtdphymatch -ffffffff81641050 T mtdphyattach -ffffffff81641130 T mtdphy_service -ffffffff81642000 T icsphymatch -ffffffff81642050 T icsphyattach -ffffffff81642170 T icsphy_service -ffffffff81642290 T icsphy_status -ffffffff816423d0 T icsphy_reset -ffffffff81643000 T sqphymatch -ffffffff81643050 T sqphyattach -ffffffff81643130 T sqphy_service -ffffffff81643250 T sqphy_status -ffffffff81644000 T tqphymatch -ffffffff81644050 T tqphyattach -ffffffff81644130 T tqphy_service -ffffffff81644250 T tqphy_status -ffffffff81645000 T ukphymatch -ffffffff81645030 T ukphyattach -ffffffff81645180 T ukphy_service -ffffffff81646000 T dcphy_match -ffffffff81646060 T dcphy_attach -ffffffff816461d0 T dcphy_service -ffffffff816465c0 T dcphy_status -ffffffff816468a0 T dcphy_reset -ffffffff81646950 T dcphy_mii_phy_auto -ffffffff81647000 T bmtphymatch -ffffffff81647050 T bmtphyattach -ffffffff81647150 T bmtphy_service -ffffffff81647270 T bmtphy_status -ffffffff816473f0 T bmtphy_reset -ffffffff81648000 T brgphy_probe -ffffffff81648050 T brgphy_attach -ffffffff816483a0 T brgphy_service -ffffffff816488b0 T brgphy_copper_status -ffffffff81648b10 T brgphy_reset -ffffffff81648e80 T brgphy_fiber_status -ffffffff81648ff0 T brgphy_5708s_status -ffffffff81649190 T brgphy_5709s_status -ffffffff81649340 T brgphy_mii_phy_auto -ffffffff81649480 T brgphy_loop -ffffffff81649530 T brgphy_bcm5401_dspcode -ffffffff816495b0 T brgphy_bcm5411_dspcode -ffffffff81649630 T brgphy_bcm5421_dspcode -ffffffff81649780 T brgphy_bcm54k2_dspcode -ffffffff816497e0 T brgphy_bcm54xx_clock_delay -ffffffff816498f0 T brgphy_reset_bge -ffffffff81649e30 T brgphy_reset_bnx -ffffffff8164a4a0 T brgphy_adc_bug -ffffffff8164a590 T brgphy_5704_a0_bug -ffffffff8164a5f0 T brgphy_ber_bug -ffffffff8164a720 T brgphy_crc_bug -ffffffff8164a7c0 T brgphy_jumbo_settings -ffffffff8164a8b0 T brgphy_eth_wirespeed -ffffffff8164a930 T brgphy_disable_early_dac -ffffffff8164b000 T xmphy_probe -ffffffff8164b050 T xmphy_attach -ffffffff8164b160 T xmphy_service -ffffffff8164b3e0 T xmphy_status -ffffffff8164b590 T xmphy_mii_phy_auto -ffffffff8164c000 T amphymatch -ffffffff8164c050 T amphyattach -ffffffff8164c130 T amphy_service -ffffffff8164c230 T amphy_status -ffffffff8164d000 T acphymatch -ffffffff8164d050 T acphyattach -ffffffff8164d190 T acphy_service -ffffffff8164d290 T acphy_status -ffffffff8164e000 T nsgphymatch -ffffffff8164e050 T nsgphyattach -ffffffff8164e1d0 T nsgphy_service -ffffffff8164e2f0 T nsgphy_status -ffffffff8164f000 T urlphy_match -ffffffff8164f080 T urlphy_attach -ffffffff8164f1a0 T urlphy_service -ffffffff8164f380 T urlphy_status -ffffffff81650000 T rgephymatch -ffffffff81650050 T rgephyattach -ffffffff81650190 T rgephy_service -ffffffff816505f0 T rgephy_status -ffffffff81650930 T rgephy_reset -ffffffff81650970 T rgephy_init_rtl8211f -ffffffff81650ac0 T rgephy_mii_phy_auto -ffffffff81650c60 T rgephy_loop -ffffffff81650d30 T rgephy_load_dspcode -ffffffff81652000 T ciphymatch -ffffffff81652050 T ciphyattach -ffffffff81652180 T ciphy_service -ffffffff816524a0 T ciphy_status -ffffffff81652660 T ciphy_reset -ffffffff81652690 T ciphy_fixup -ffffffff81653000 T ipgphy_probe -ffffffff81653050 T ipgphy_attach -ffffffff81653140 T ipgphy_service -ffffffff81653440 T ipgphy_status -ffffffff81653640 T ipgphy_reset -ffffffff81653810 T ipgphy_mii_phy_auto -ffffffff81653900 T ipgphy_load_dspcode -ffffffff81654000 T etphy_service -ffffffff81654200 T etphy_status -ffffffff81654350 T etphy_reset -ffffffff816546d0 T etphy_match -ffffffff81654720 T etphy_attach -ffffffff81655000 T jmphy_service -ffffffff816551b0 T jmphy_status -ffffffff81655330 T jmphy_reset -ffffffff81655420 T jmphy_match -ffffffff81655470 T jmphy_attach -ffffffff81655640 T jmphy_auto -ffffffff81655800 T jmphy_anar -ffffffff81656000 T atphy_service -ffffffff81656380 T atphy_status -ffffffff81656550 T atphy_reset -ffffffff81656700 T atphy_match -ffffffff81656750 T atphy_attach -ffffffff81656860 T atphy_mii_phy_auto -ffffffff81657000 T scsi_init -ffffffff816570c0 T scsi_req_probe -ffffffff81657160 T scsi_plug_probe -ffffffff816571b0 T scsi_req_detach -ffffffff81657250 T scsi_plug_detach -ffffffff816572a0 T scsi_pending_start -ffffffff81657300 T scsi_pending_finish -ffffffff81657360 T scsi_iopool_init -ffffffff816573a0 T scsi_iopool_get -ffffffff816573f0 T scsi_iopool_put -ffffffff81657430 T scsi_iopool_destroy -ffffffff81657580 T scsi_io_get_done -ffffffff816575c0 T scsi_default_get -ffffffff816575f0 T scsi_default_put -ffffffff81657640 T scsi_ioh_set -ffffffff81657680 T scsi_ioh_add -ffffffff81657740 T scsi_iopool_run -ffffffff816578a0 T scsi_ioh_del -ffffffff81657970 T scsi_ioh_deq -ffffffff81657a10 T scsi_ioh_pending -ffffffff81657a70 T scsi_move -ffffffff81657ad0 T scsi_move_done -ffffffff81657b10 T scsi_io_get -ffffffff81657c60 T scsi_io_put -ffffffff81657ca0 T scsi_xsh_set -ffffffff81657cf0 T scsi_xsh_ioh -ffffffff81657de0 T scsi_xsh_add -ffffffff81657ea0 T scsi_xsh_runqueue -ffffffff81658060 T scsi_xsh_del -ffffffff816581c0 T scsi_xs_io -ffffffff816582d0 T scsi_xs_get -ffffffff816585b0 T scsi_xs_get_done -ffffffff816585f0 T scsi_link_open -ffffffff81658670 T scsi_link_close -ffffffff816586e0 T scsi_link_shutdown -ffffffff81658940 T scsi_xs_put -ffffffff81658a00 T scsi_test_unit_ready -ffffffff81658a80 T scsi_xs_sync -ffffffff81658bd0 T scsi_init_inquiry -ffffffff81658c30 T scsi_inquire -ffffffff81658da0 T scsi_inquire_vpd -ffffffff81658e60 T scsi_read_cap_10 -ffffffff81658f00 T scsi_read_cap_16 -ffffffff81658fb0 T scsi_prevent -ffffffff81659040 T scsi_start -ffffffff816590e0 T scsi_mode_sense -ffffffff816591a0 T scsi_mode_sense_big -ffffffff81659270 T scsi_mode_sense_page -ffffffff816592d0 T scsi_mode_sense_big_page -ffffffff81659340 T scsi_parse_blkdesc -ffffffff81659460 T scsi_do_mode_sense -ffffffff816596a0 T scsi_mode_select -ffffffff81659750 T scsi_mode_select_big -ffffffff81659810 T scsi_report_luns -ffffffff816598e0 T scsi_xs_exec -ffffffff81659930 T scsi_copy_internal_data -ffffffff81659a00 T sc_print_addr -ffffffff81659a50 T scsi_done -ffffffff81659a90 T scsi_xs_sync_done -ffffffff81659b00 T scsi_xs_error -ffffffff81659cb0 T scsi_delay -ffffffff81659d80 T scsi_interpret_sense -ffffffff8165a0b0 T scsi_print_sense -ffffffff8165a370 T scsi_decode_sense -ffffffff8165a600 T scsi_cmd_rw_decode -ffffffff8165b000 T scsi_ioc_cmd -ffffffff8165b210 T scsi_ioc_ata_cmd -ffffffff8165b3e0 T scsi_do_ioctl -ffffffff8165c000 T scsibusmatch -ffffffff8165c030 T scsibusattach -ffffffff8165c180 T scsibusdetach -ffffffff8165c240 T scsibusactivate -ffffffff8165c2c0 T scsiprint -ffffffff8165c310 T scsibusbioctl -ffffffff8165c370 T scsi_probe_bus -ffffffff8165c490 T scsi_activate_bus -ffffffff8165c510 T scsi_detach_bus -ffffffff8165c590 T scsibussubmatch -ffffffff8165c600 T scsibussubprint -ffffffff8165c660 T scsi_print_link -ffffffff8165c870 T scsi_probe -ffffffff8165c9c0 T scsi_detach -ffffffff8165cae0 T scsi_activate -ffffffff8165cc50 T scsi_activate_target -ffffffff8165ccf0 T scsi_activate_lun -ffffffff8165cd70 T scsi_activate_link -ffffffff8165cdd0 T scsi_get_link -ffffffff8165ce20 T scsi_probe_target -ffffffff8165cf00 T scsi_probe_lun -ffffffff8165cf50 T scsi_get_target_luns -ffffffff8165d130 T scsi_probe_link -ffffffff8165d770 T scsi_devid -ffffffff8165d9d0 T scsi_inqmatch -ffffffff8165db50 T scsi_add_link -ffffffff8165db90 T scsi_detach_link -ffffffff8165dcd0 T scsi_detach_target -ffffffff8165dd60 T scsi_detach_lun -ffffffff8165ddc0 T devid_free -ffffffff8165de10 T scsi_remove_link -ffffffff8165de80 T scsi_strvis -ffffffff8165e010 T scsi_devid_pg83 -ffffffff8165e240 T scsi_devid_pg80 -ffffffff8165e3f0 T scsi_devid_wwn -ffffffff8165e470 T devid_alloc -ffffffff8165e510 T devid_copy -ffffffff8165f000 T cdmatch -ffffffff8165f060 T cdattach -ffffffff8165f110 T cddetach -ffffffff8165f180 T cdactivate -ffffffff8165f1f0 T cd_interpret_sense -ffffffff8165f270 T cdstart -ffffffff8165f500 T cdopen -ffffffff8165f710 T cd_get_parms -ffffffff8165f7c0 T cdgetdisklabel -ffffffff8165f9a0 T cdclose -ffffffff8165fad0 T cdstrategy -ffffffff8165fbf0 T cd_cmd_rw6 -ffffffff8165fc40 T cd_cmd_rw10 -ffffffff8165fca0 T cd_cmd_rw12 -ffffffff8165fd10 T cd_buf_done -ffffffff8165fe90 T cdminphys -ffffffff8165ff70 T cdread -ffffffff8165ffa0 T cdwrite -ffffffff8165ffd0 T cdioctl -ffffffff81660a30 T cd_set_pa_immed -ffffffff81660b60 T cd_play_tracks -ffffffff81660d00 T cd_play_msf -ffffffff81660dd0 T cd_play -ffffffff81660e80 T cd_read_subchannel -ffffffff81660f50 T cd_read_toc -ffffffff81661030 T cd_setchan -ffffffff81661160 T cd_getvol -ffffffff81661240 T cd_setvol -ffffffff816613e0 T cd_pause -ffffffff81661470 T cd_reset -ffffffff816614f0 T cd_load_unload -ffffffff81661580 T dvd_auth -ffffffff81661a00 T dvd_read_struct -ffffffff81661a70 T cd_load_toc -ffffffff81661be0 T cd_size -ffffffff81661d50 T cdsize -ffffffff81661d80 T cddump -ffffffff81661db0 T dvd_read_physical -ffffffff81661f80 T dvd_read_copyright -ffffffff81662080 T dvd_read_disckey -ffffffff81662190 T dvd_read_bca -ffffffff816622b0 T dvd_read_manufact -ffffffff81663000 T chmatch -ffffffff81663060 T chattach -ffffffff81663100 T ch_interpret_sense -ffffffff81663180 T ch_get_quirks -ffffffff816631f0 T chopen -ffffffff816632c0 T ch_get_params -ffffffff81663490 T chclose -ffffffff816634e0 T chioctl -ffffffff81663620 T ch_move -ffffffff81663750 T ch_exchange -ffffffff816638d0 T ch_position -ffffffff816639b0 T ch_usergetelemstatus -ffffffff81663f80 T ch_getelemstatus -ffffffff81665000 T sdmatch -ffffffff81665060 T sdattach -ffffffff81665270 T sddetach -ffffffff816652e0 T sdactivate -ffffffff81665470 T sd_interpret_sense -ffffffff81665530 T sdstart -ffffffff81665840 T sd_get_parms -ffffffff81665da0 T sd_ioctl_cache -ffffffff81665fb0 T sd_flush -ffffffff81666060 T sdopen -ffffffff81666340 T sdgetdisklabel -ffffffff81666700 T sdclose -ffffffff816668e0 T sdstrategy -ffffffff81666a20 T sd_cmd_rw6 -ffffffff81666a70 T sd_cmd_rw10 -ffffffff81666ad0 T sd_cmd_rw12 -ffffffff81666b40 T sd_cmd_rw16 -ffffffff81666bd0 T sd_buf_done -ffffffff81666d20 T sdminphys -ffffffff81666e00 T sdread -ffffffff81666e30 T sdwrite -ffffffff81666e60 T sdioctl -ffffffff816672d0 T sd_ioctl_inquiry -ffffffff816673f0 T viscpy -ffffffff81667460 T sdsize -ffffffff816675b0 T sddump -ffffffff81667800 T sd_read_cap_10 -ffffffff816678d0 T sd_read_cap_16 -ffffffff816679c0 T sd_read_cap -ffffffff81667a70 T sd_thin_pages -ffffffff81667c10 T sd_vpd_block_limits -ffffffff81667cf0 T sd_vpd_thin -ffffffff81667da0 T sd_thin_params -ffffffff81668000 T stmatch -ffffffff81668060 T stattach -ffffffff816681a0 T stdetach -ffffffff81668290 T stactivate -ffffffff816682e0 T st_interpret_sense -ffffffff81668660 T ststart -ffffffff81668980 T stopen -ffffffff81668b50 T st_unmount -ffffffff81668c40 T st_mount_tape -ffffffff81668e50 T stclose -ffffffff81669190 T st_write_filemarks -ffffffff816692d0 T st_load -ffffffff816693e0 T st_touch_tape -ffffffff81669590 T st_read_block_limits -ffffffff816696b0 T st_mode_sense -ffffffff816697e0 T st_decide_mode -ffffffff816698f0 T st_mode_select -ffffffff81669b70 T st_check_eod -ffffffff81669c30 T st_rewind -ffffffff81669d50 T ststrategy -ffffffff81669ee0 T st_space -ffffffff8166a1b0 T st_buf_done -ffffffff8166a2d0 T stminphys -ffffffff8166a380 T stread -ffffffff8166a3b0 T stwrite -ffffffff8166a3e0 T stioctl -ffffffff8166a8c0 T st_erase -ffffffff8166a960 T st_read -ffffffff8166b000 T ukmatch -ffffffff8166b030 T ukattach -ffffffff8166b060 T ukdetach -ffffffff8166b160 T ukopen -ffffffff8166b1f0 T ukclose -ffffffff8166b260 T ukioctl -ffffffff8166c000 T safte_match -ffffffff8166c090 T safte_attach -ffffffff8166c280 T safte_detach -ffffffff8166c370 T safte_read_config -ffffffff8166c730 T safte_read_encstat -ffffffff8166ca30 T safte_ioctl -ffffffff8166ca80 T safte_temp2uK -ffffffff8166caf0 T safte_bio_blink -ffffffff8166d000 T ses_match -ffffffff8166d060 T ses_attach -ffffffff8166d2d0 T ses_detach -ffffffff8166d450 T ses_read_config -ffffffff8166d6f0 T ses_refresh_sensors -ffffffff8166d8c0 T ses_ioctl -ffffffff8166d910 T ses_make_sensors -ffffffff8166dcc0 T ses_read_status -ffffffff8166dd90 T ses_psu2sensor -ffffffff8166ddd0 T ses_cool2sensor -ffffffff8166de30 T ses_temp2sensor -ffffffff8166de80 T ses_bio_blink -ffffffff8166e080 T ses_write_config -ffffffff8166f000 T sym_match -ffffffff8166f370 T sym_attach -ffffffff8166f600 T sym_detach -ffffffff8166f630 T sym_activate -ffffffff8166f680 T sym_mpath_checksense -ffffffff8166f6b0 T sym_mpath_status -ffffffff8166f6d0 T sym_mpath_start -ffffffff81670000 T rdac_match -ffffffff816701c0 T rdac_attach -ffffffff816702d0 T rdac_detach -ffffffff81670320 T rdac_activate -ffffffff81670390 T rdac_mpath_checksense -ffffffff81670410 T rdac_mpath_status -ffffffff81670430 T rdac_mpath_start -ffffffff81670450 T rdac_status -ffffffff816704a0 T rdac_extdevid -ffffffff81670630 T rdac_groupid -ffffffff81670700 T rdac_status_done -ffffffff81671000 T emc_match -ffffffff81671140 T emc_attach -ffffffff81671290 T emc_detach -ffffffff816712e0 T emc_activate -ffffffff81671330 T emc_mpath_checksense -ffffffff81671390 T emc_mpath_status -ffffffff816713b0 T emc_mpath_start -ffffffff816713d0 T emc_status -ffffffff81671420 T emc_sp_info -ffffffff816714d0 T emc_status_done -ffffffff81672000 T hds_match -ffffffff81672120 T hds_attach -ffffffff81672250 T hds_detach -ffffffff816722a0 T hds_activate -ffffffff816722f0 T hds_mpath_checksense -ffffffff81672320 T hds_mpath_status -ffffffff81672350 T hds_inquiry -ffffffff81672480 T hds_mpath_start -ffffffff816724a0 T hds_status -ffffffff816724f0 T hds_info -ffffffff81672630 T hds_status_done -ffffffff81673000 T atapiscsi_match -ffffffff81673060 T atapiscsi_attach -ffffffff816731d0 T atapiscsi_detach -ffffffff816731e0 T atapiscsi_activate -ffffffff81673270 T wdc_atapi_send_cmd -ffffffff816733f0 T wdc_atapi_start -ffffffff81673410 T wdc_atapi_intr -ffffffff81673490 T wdc_atapi_timer_handler -ffffffff81673510 T wdc_atapi_tape_done -ffffffff81673590 T wdc_atapi_ioctl -ffffffff81673610 T atapi_to_scsi_sense -ffffffff81673690 T wdc_atapi_drive_selected -ffffffff816736f0 T wdc_atapi_real_start -ffffffff81673790 T wdc_atapi_the_machine -ffffffff81673a40 T wdc_atapi_the_poll_machine -ffffffff81673b50 T wdc_atapi_update_status -ffffffff81673bf0 T wdc_atapi_real_start_2 -ffffffff81673d00 T wdc_atapi_reset -ffffffff81673da0 T wdc_atapi_ctrl -ffffffff816742d0 T wdc_atapi_send_packet -ffffffff816743c0 T wdc_atapi_intr_command -ffffffff81674680 T wdc_atapi_intr_complete -ffffffff816749b0 T wdc_atapi_pio_intr -ffffffff81674c50 T wdc_atapi_in_data_phase -ffffffff81674d00 T wdc_atapi_intr_data -ffffffff81674f40 T wdc_atapi_done -ffffffff81674fa0 T wdc_atapi_reset_2 -ffffffff81676000 T wdprobe -ffffffff81676070 T wdattach -ffffffff81676540 T wddetach -ffffffff816765c0 T wdactivate -ffffffff816767e0 T wd_get_params -ffffffff816768e0 T wdrestart -ffffffff81676980 T wd_flushcache -ffffffff81676ac0 T wd_standby -ffffffff81676bb0 T wdopen -ffffffff81676cf0 T wdstrategy -ffffffff81676ea0 T wdstart -ffffffff81676f20 T __wdstart -ffffffff816770d0 T wddone -ffffffff81677310 T wdread -ffffffff81677340 T wdwrite -ffffffff81677370 T wdgetdisklabel -ffffffff816774f0 T wdclose -ffffffff816775c0 T wdgetdefaultlabel -ffffffff816776f0 T wdioctl -ffffffff816779b0 T wdsize -ffffffff81677ab0 T wddump -ffffffff81678000 T wd_hibernate_io -ffffffff81678230 T wdc_ata_bio_start -ffffffff81678270 T wdc_ata_bio_intr -ffffffff81678610 T wdc_ata_bio_kill_xfer -ffffffff816786a0 T wdc_ata_bio -ffffffff81678790 T _wdc_ata_bio_start -ffffffff81679030 T wdc_ata_ctrl_intr -ffffffff816795d0 T wdc_ata_bio_done -ffffffff81679640 T wdc_ata_err -ffffffff8167a000 T ata_get_params -ffffffff8167a360 T ata_set_mode -ffffffff8167a410 T ata_dmaerr -ffffffff8167a490 T ata_perror -ffffffff8167b000 T atascsi_cmd -ffffffff8167b0f0 T atascsi_probe -ffffffff8167b600 T atascsi_free -ffffffff8167b6e0 T atascsi_attach -ffffffff8167b840 T atascsi_detach -ffffffff8167b8b0 T atascsi_lookup_port -ffffffff8167b910 T atascsi_io_get -ffffffff8167b970 T atascsi_io_put -ffffffff8167b9a0 T atascsi_port_identify -ffffffff8167bb00 T atascsi_port_set_features -ffffffff8167bc60 T ata_polled_complete -ffffffff8167bc90 T ata_exec -ffffffff8167bcb0 T ata_polled -ffffffff8167bd50 T atascsi_done -ffffffff8167bd70 T atascsi_disk_cmd -ffffffff8167c1e0 T atascsi_atapi_cmd -ffffffff8167c320 T atascsi_pmp_cmd -ffffffff8167c3a0 T atascsi_disk_write_same_16 -ffffffff8167c510 T atascsi_disk_unmap -ffffffff8167c600 T atascsi_disk_sync -ffffffff8167c6e0 T atascsi_disk_sense -ffffffff8167c730 T atascsi_disk_inq -ffffffff8167c9d0 T atascsi_disk_capacity -ffffffff8167cb30 T atascsi_disk_capacity16 -ffffffff8167cd50 T atascsi_passthru_12 -ffffffff8167cec0 T atascsi_passthru_16 -ffffffff8167d050 T atascsi_disk_start_stop -ffffffff8167d140 T atascsi_disk_cmd_done -ffffffff8167d190 T atascsi_disk_vpd_supported -ffffffff8167d260 T atascsi_disk_vpd_serial -ffffffff8167d3c0 T atascsi_disk_vpd_ident -ffffffff8167d6d0 T atascsi_disk_vpd_ata -ffffffff8167d8c0 T atascsi_disk_vpd_limits -ffffffff8167d9e0 T atascsi_disk_vpd_info -ffffffff8167dad0 T atascsi_disk_vpd_thin -ffffffff8167db90 T atascsi_disk_inquiry -ffffffff8167dd40 T ata_swapcopy -ffffffff8167dda0 T ata_identify_block_l2p_exp -ffffffff8167ddf0 T atascsi_disk_write_same_16_done -ffffffff8167de40 T atascsi_disk_unmap_task -ffffffff8167e040 T atascsi_disk_unmap_done -ffffffff8167e0a0 T atascsi_disk_sync_done -ffffffff8167e140 T ata_identify_blocks -ffffffff8167e1c0 T ata_identify_blocksize -ffffffff8167e220 T ata_identify_block_logical_align -ffffffff8167e280 T atascsi_passthru_map -ffffffff8167e350 T atascsi_passthru_done -ffffffff8167e3d0 T atascsi_disk_start_stop_done -ffffffff8167e500 T atascsi_atapi_cmd_done -ffffffff8167e5d0 T atascsi_pmp_sense -ffffffff8167e620 T atascsi_pmp_inq -ffffffff8167e760 T ata_complete -ffffffff8167f000 T mainbus_match -ffffffff8167f030 T mainbus_attach -ffffffff8167f380 T mainbus_print -ffffffff8167f400 T mainbus_efifb_reattach -ffffffff81680000 T codepatch_disable -ffffffff81681000 T bios_match -ffffffff81681060 T bios_attach -ffffffff81681af0 T smbios_find -ffffffff81681bf0 T smbios_find_table -ffffffff81681db0 T smbios_get_string -ffffffff81681e70 T fixstring -ffffffff81681fe0 T smbios_info -ffffffff81682c90 T bios_print -ffffffff81683000 T mpbios_match -ffffffff81683050 T mpbios_attach -ffffffff81683070 T mpbios_scan -ffffffff81683500 T mp_print -ffffffff81683550 T mp_match -ffffffff816835d0 T mpbios_map -ffffffff816836c0 T mpbios_unmap -ffffffff81683710 T mpbios_probe -ffffffff81683c50 T mpbios_search -ffffffff81683f00 T mpbios_cpu -ffffffff81683fa0 T mpbios_bus -ffffffff81684170 T mpbios_ioapic -ffffffff81684210 T mpbios_int -ffffffff816844f0 T mp_cfg_special_intr -ffffffff81684560 T mp_cfg_pci_intr -ffffffff81684660 T mp_cfg_isa_intr -ffffffff81684760 T mp_print_special_intr -ffffffff81684790 T mp_print_pci_intr -ffffffff816847c0 T mp_print_isa_intr -ffffffff81685000 T via8237_mpbios_fixup -ffffffff81685060 T nforce4_mpbios_fixup -ffffffff81685170 T mcp04_mpbios_fixup -ffffffff81685210 T mpbios_icu_lookup -ffffffff816852a0 T mpbios_pin_fixup -ffffffff81685400 T mpbios_intr_fixup -ffffffff81686000 T replacesmap -ffffffff81686090 T replacemeltdown -ffffffff81686300 T replacemds -ffffffff81686790 T mp_cpu_start -ffffffff81686880 T mp_cpu_start_cleanup -ffffffff816868b0 T cpu_match -ffffffff81686910 T cpu_attach -ffffffff81686e10 T cpu_activate -ffffffff81686f10 T cpu_idle_mwait_cycle -ffffffff81686ff0 T cpu_init_mwait -ffffffff81687180 T cpu_enter_pages -ffffffff81687260 T cpu_fix_msrs -ffffffff81687450 T cpu_init -ffffffff81687840 T cpu_start_secondary -ffffffff816879e0 T cpu_init_vmm -ffffffff81687a90 T cpu_boot_secondary_processors -ffffffff81687bb0 T cpu_boot_secondary -ffffffff81687c80 T cpu_hatch -ffffffff81687f10 T cpu_init_msrs -ffffffff81687fe0 T cpu_tsx_disable -ffffffff81688050 T cpu_debug_dump -ffffffff81688100 T patinit -ffffffff81688150 T rdrand -ffffffff81688240 T wbinvd_on_all_cpus -ffffffff81689000 T lapic_hwmask -ffffffff81689050 T lapic_hwunmask -ffffffff816890a0 T lapic_setup -ffffffff816890d0 T i82489_readreg -ffffffff81689100 T i82489_writereg -ffffffff81689130 T i82489_ipi -ffffffff816891f0 T i82489_cpu_number -ffffffff81689220 T x2apic_readreg -ffffffff81689260 T x2apic_cpu_number -ffffffff81689290 T x2apic_writereg -ffffffff816892d0 T lapic_cpu_number -ffffffff81689320 T lapic_map -ffffffff81689450 T x2apic_ipi -ffffffff816894a0 T lapic_enable -ffffffff816894c0 T lapic_disable -ffffffff816894e0 T lapic_set_lvt -ffffffff81689790 T lapic_boot_init -ffffffff816899e0 T lapic_timer_rearm -ffffffff81689a20 T lapic_timer_trigger -ffffffff81689aa0 T lapic_timer_oneshot -ffffffff81689b00 T lapic_timer_periodic -ffffffff81689b60 T lapic_clockintr -ffffffff81689be0 T lapic_startclock -ffffffff81689c00 T lapic_initclocks -ffffffff81689c60 T lapic_calibrate_timer -ffffffff81689eb0 T i82489_ipi_init -ffffffff81689f80 T x2apic_ipi_init -ffffffff8168a000 T x86_ipi_init -ffffffff8168b000 T ioapic_find -ffffffff8168b080 T ioapic_find_bybase -ffffffff8168b0e0 T ioapic_print_redir -ffffffff8168b1a0 T ioapic_match -ffffffff8168b1f0 T ioapic_attach -ffffffff8168b530 T ioapic_activate -ffffffff8168b600 T ioapic_set_id -ffffffff8168b6f0 T ioapic_hwmask -ffffffff8168b7a0 T ioapic_hwunmask -ffffffff8168b840 T ioapic_addroute -ffffffff8168b8b0 T ioapic_delroute -ffffffff8168b980 T apic_set_redir -ffffffff8168bbb0 T ioapic_enable -ffffffff8168bcc0 T ioapic_dump -ffffffff8168c000 T efifb_match -ffffffff8168c090 T efifb_attach -ffffffff8168c370 T efifb_ioctl -ffffffff8168c4a0 T efifb_mmap -ffffffff8168c500 T efifb_alloc_screen -ffffffff8168c530 T efifb_efiinfo_init -ffffffff8168c620 T efifb_rasops_init -ffffffff8168c7e0 T efifb_cnattach -ffffffff8168c9a0 T efifb_cnattach_common -ffffffff8168ca80 T efifb_early_map -ffffffff8168ca90 T efifb_cnremap -ffffffff8168cb30 T efifb_early_cleanup -ffffffff8168cb40 T efifb_is_console -ffffffff8168cc20 T efifb_is_primary -ffffffff8168cd40 T efifb_detach -ffffffff8168cd70 T efifb_reattach -ffffffff8168cd90 T efifb_cb_cnattach -ffffffff8168cef0 T cb_find_fb -ffffffff8168d070 T efifb_cb_found -ffffffff8168d0b0 T efifb_stolen -ffffffff8168e000 T pvbus_match -ffffffff8168e050 T pvbus_attach -ffffffff8168e2d0 T pvbus_activate -ffffffff8168e2e0 T pvbus_kvm -ffffffff8168e320 T pvbus_hyperv -ffffffff8168e390 T pvbus_hyperv_print -ffffffff8168e3c0 T pvbus_xen -ffffffff8168e420 T pvbus_xen_print -ffffffff8168e450 T pvbus_probe -ffffffff8168e480 T pvbus_search -ffffffff8168e510 T pvbus_identify -ffffffff8168e6c0 T pvbus_init_cpu -ffffffff8168e7c0 T pvbus_print -ffffffff8168e810 T pvbus_shutdown -ffffffff8168e860 T pvbus_reboot -ffffffff8168e8b0 T pvbus_minor -ffffffff8168e9a0 T pvbusopen -ffffffff8168ea70 T pvbusclose -ffffffff8168eb40 T pvbusgetstr -ffffffff8168ebe0 T pvbusioctl -ffffffff8168f000 T pvclock_match -ffffffff8168f060 T pvclock_attach -ffffffff8168f1e0 T pvclock_activate -ffffffff8168f240 T pvclock_get_timecount -ffffffff81690000 T vmt_tclo_capreg -ffffffff81690290 T vmt_tclo_halt -ffffffff816902a0 T vmt_tclo_poweron -ffffffff81690490 T vmt_tclo_reboot -ffffffff816904a0 T vmt_tclo_resume -ffffffff816907b0 T vmt_tclo_suspend -ffffffff816909c0 T vmt_tclo_broadcastip -ffffffff81690e10 T vmt_tclo_ping -ffffffff81690fe0 T vmt_tclo_reset -ffffffff81691280 T vmt_tclo_abortbackup -ffffffff81691490 T vmt_tclo_backupdone -ffffffff81691690 T vmt_tclo_startbackup -ffffffff816918c0 T vmt_match -ffffffff81691a60 T vmt_attach -ffffffff81691cb0 T vmt_activate -ffffffff81691f40 T vmt_probe_cmd -ffffffff81692000 T vm_cmd -ffffffff81692070 T vmt_probe -ffffffff816921f0 T vm_rpc_open -ffffffff816922f0 T vm_rpc_send_rpci_tx -ffffffff81692390 T vmt_tick_hook -ffffffff816923d0 T vmt_tclo_tick -ffffffff81692c60 T vmt_nicinfo_task -ffffffff81692df0 T vmt_kvop -ffffffff81693400 T vm_rpc_send -ffffffff816935c0 T vm_rpc_get_length -ffffffff816936d0 T vm_rpc_get_data -ffffffff81693890 T vm_rpc_close -ffffffff816939a0 T vmt_resume -ffffffff81693a90 T vmt_shutdown -ffffffff81693c40 T vmt_update_guest_uptime -ffffffff81693ca0 T vmt_clear_guest_info -ffffffff81693d20 T vmt_update_guest_info -ffffffff81693e20 T vmt_tick -ffffffff81693fc0 T vmt_tclo_state_change_success -ffffffff81694020 T vmt_do_shutdown -ffffffff81694210 T vm_rpc_send_str -ffffffff816943e0 T vmt_do_reboot -ffffffff816945d0 T vm_rpci_response_successful -ffffffff81694610 T vmt_set_backup_status -ffffffff81694640 T vmt_quiesce_task -ffffffff81694750 T vmt_quiesce_done_task -ffffffff81694800 T vmt_tclo_process -ffffffff816948c0 T vmt_xdr_ifaddr -ffffffff81694a20 T vmt_xdr_nic_entry -ffffffff81694bc0 T vmt_xdr_nic_info -ffffffff81694cd0 T vm_rpc_send_rpci_tx_buf -ffffffff81695250 T vm_ins -ffffffff816952c0 T vm_outs -ffffffff81696000 T xen_match -ffffffff81696040 T xen_attach -ffffffff81696270 T xen_activate -ffffffff816962a0 T xen_bus_dmamap_create -ffffffff81696420 T xen_bus_dmamap_destroy -ffffffff816964c0 T xen_bus_dmamap_load -ffffffff81696600 T xen_bus_dmamap_load_mbuf -ffffffff81696740 T xen_bus_dmamap_unload -ffffffff816967e0 T xen_bus_dmamap_sync -ffffffff81696820 T xen_init_hypercall -ffffffff816968c0 T xen_getfeatures -ffffffff81696960 T xen_init_info_page -ffffffff81696a60 T xen_init_cbvec -ffffffff81696af0 T xen_init_interrupts -ffffffff81696ba0 T xen_init_grant_tables -ffffffff81696ce0 T xen_probe_devices -ffffffff81696fb0 T xen_disable_emulated_devices -ffffffff81697030 T xen_deferred -ffffffff816970c0 T xen_intr_enable -ffffffff81697220 T xen_control -ffffffff816973a0 T xen_resume -ffffffff816973d0 T xen_hypercall -ffffffff816975b0 T xen_hypercallv -ffffffff81697670 T xen_intr_ack -ffffffff816976d0 T xen_intr -ffffffff816978c0 T xen_intr_schedule -ffffffff816979c0 T xen_intr_barrier -ffffffff81697a60 T xen_intr_signal -ffffffff81697b90 T xen_intr_establish -ffffffff81697e30 T xen_intr_dispatch -ffffffff81697f50 T xen_intr_disestablish -ffffffff81698100 T xen_intr_mask -ffffffff816981c0 T xen_intr_unmask -ffffffff81698300 T xen_grant_table_grow -ffffffff81698510 T xen_grant_table_alloc -ffffffff81698760 T xen_grant_table_free -ffffffff81698800 T xen_grant_table_enter -ffffffff816988b0 T xen_grant_table_remove -ffffffff81698a10 T xen_attach_device -ffffffff81698ba0 t xen_attach_print -ffffffff81698c00 T xen_hotplug -ffffffff81698e60 T xen_unplug_emulated -ffffffff81699000 T xs_attach -ffffffff81699420 T xs_intr -ffffffff81699880 T xs_get_msg -ffffffff81699970 T xs_put_msg -ffffffff81699a10 T xs_geterror -ffffffff81699c20 T xs_poll -ffffffff81699c90 T xs_output -ffffffff81699e40 T xs_ring_put -ffffffff81699f40 T xs_start -ffffffff8169a090 T xs_reply -ffffffff8169a1f0 T xs_ring_get -ffffffff8169a2f0 T xs_event -ffffffff8169a400 T xs_resfree -ffffffff8169a470 T xs_parse -ffffffff8169a6f0 T xs_cmd -ffffffff8169ac00 T xs_watch -ffffffff8169ae20 T xs_getnum -ffffffff8169af60 T xs_getprop -ffffffff8169b0e0 T xs_setnum -ffffffff8169b240 T xs_setprop -ffffffff8169b340 T xs_cmpprop -ffffffff8169b4b0 T xs_await_transition -ffffffff8169b5b0 T xs_kvop -ffffffff8169c000 T xnf_match -ffffffff8169c050 T xnf_attach -ffffffff8169c330 T xnf_detach -ffffffff8169c3c0 T xnf_lladdr -ffffffff8169c6e0 T xnf_intr -ffffffff8169c740 T xnf_capabilities -ffffffff8169c8b0 T xnf_rx_ring_create -ffffffff8169cae0 T xnf_tx_ring_create -ffffffff8169cd70 T xnf_rx_ring_destroy -ffffffff8169cf20 T xnf_init_backend -ffffffff8169d150 T xnf_tx_ring_destroy -ffffffff8169d300 T xnf_ioctl -ffffffff8169d4c0 T xnf_start -ffffffff8169d690 T xnf_watchdog -ffffffff8169d700 T xnf_media_change -ffffffff8169d730 T xnf_media_status -ffffffff8169d770 T xnf_stop -ffffffff8169d830 T xnf_init -ffffffff8169d8c0 T xnf_iff -ffffffff8169d8f0 T xnf_rx_ring_fill -ffffffff8169db30 T xnf_tx_ring_drain -ffffffff8169db80 T xnf_rx_ring_drain -ffffffff8169dbd0 T xnf_encap -ffffffff8169dfd0 T xnf_txeof -ffffffff8169e210 T xnf_rxeof -ffffffff8169f000 T xbf_match -ffffffff8169f050 T xbf_attach -ffffffff8169f260 T xbf_detach -ffffffff8169f310 T xbf_scsi_cmd -ffffffff8169f6d0 T xbf_get_type -ffffffff8169f8a0 T xbf_intr -ffffffff8169fa40 T xbf_init -ffffffff8169ffd0 T xbf_stop -ffffffff816a0140 T xbf_complete_cmd -ffffffff816a03f0 T xbf_reclaim_cmd -ffffffff816a0460 T xbf_scsi_done -ffffffff816a04a0 T xbf_scsi_inq -ffffffff816a0630 T xbf_scsi_capacity -ffffffff816a0720 T xbf_scsi_capacity16 -ffffffff816a0850 T xbf_submit_cmd -ffffffff816a0b50 T xbf_poll_cmd -ffffffff816a0c00 T xbf_load_cmd -ffffffff816a0e00 T xbf_bounce_cmd -ffffffff816a1020 T xbf_dma_alloc -ffffffff816a1270 T xbf_dma_free -ffffffff816a1350 T xbf_scsi_inquiry -ffffffff816a14b0 T xbf_ring_create -ffffffff816a15e0 T xbf_ring_destroy -ffffffff816a1700 T xbf_alloc_ccbs -ffffffff816a1a00 T xbf_free_ccbs -ffffffff816a1b00 T xbf_put_ccb -ffffffff816a1b80 T xbf_get_ccb -ffffffff816a2000 T hv_channel_offer -ffffffff816a20b0 T hv_channel_rescind -ffffffff816a20e0 T hv_channel_delivered -ffffffff816a2100 T hv_channel_response -ffffffff816a2240 T hv_gettime -ffffffff816a2270 T hv_match -ffffffff816a22d0 T hv_attach -ffffffff816a2420 T hv_set_version -ffffffff816a2460 T hv_init_hypercall -ffffffff816a2500 T hv_init_interrupts -ffffffff816a2680 T hv_vmbus_connect -ffffffff816a2a70 T hv_channel_scan -ffffffff816a2c90 T hv_attach_devices -ffffffff816a2dd0 T hv_delay -ffffffff816a2e50 T hv_hypercall -ffffffff816a2f30 T hv_init_synic -ffffffff816a3090 T hv_cmd -ffffffff816a3220 T hv_start -ffffffff816a3480 T hv_reply -ffffffff816a3550 T hv_intr -ffffffff816a3580 T hv_wait -ffffffff816a36b0 t hv_reply_done -ffffffff816a3740 T hv_intr_signal -ffffffff816a37d0 T hv_event_intr -ffffffff816a39c0 T hv_message_intr -ffffffff816a3b00 T hv_channel_lookup -ffffffff816a3b60 T hv_channel_schedule -ffffffff816a3bf0 T hv_guid_sprint -ffffffff816a3d40 T hv_process_offer -ffffffff816a3f90 T hv_channel_ring_create -ffffffff816a4230 T hv_handle_alloc -ffffffff816a4910 T hv_channel_ring_destroy -ffffffff816a4a40 T hv_handle_free -ffffffff816a4ac0 T hv_channel_open -ffffffff816a4d40 T hv_channel_close -ffffffff816a4f60 T hv_channel_intr -ffffffff816a5080 T hv_channel_ready -ffffffff816a50d0 T hv_channel_unpause -ffffffff816a5130 T hv_channel_pause -ffffffff816a5170 T hv_channel_setdeferred -ffffffff816a51f0 T hv_ring_write -ffffffff816a5470 T hv_channel_send -ffffffff816a5630 T hv_channel_send_sgl -ffffffff816a5830 T hv_channel_send_prpl -ffffffff816a5a40 T hv_ring_peek -ffffffff816a5b20 T hv_ring_read -ffffffff816a5c50 T hv_channel_recv -ffffffff816a5f40 t hv_attach_print -ffffffff816a5f90 T hv_evcount_attach -ffffffff816a6000 T hv_attach_icdevs -ffffffff816a61b0 T hv_heartbeat_attach -ffffffff816a6240 T hv_heartbeat -ffffffff816a6440 T hv_shutdown_attach -ffffffff816a64e0 t hv_shutdown_task -ffffffff816a64f0 T hv_shutdown -ffffffff816a6740 T hv_timesync_attach -ffffffff816a6810 T hv_timesync -ffffffff816a6af0 T hv_kvp_attach -ffffffff816a6e50 t kvp_pool_insert -ffffffff816a6f90 T hv_kvop -ffffffff816a73d0 T hv_kvp -ffffffff816a8230 t kvp_pool_import -ffffffff816a8470 t kvp_pool_export -ffffffff816a9000 T hvn_match -ffffffff816a9050 T hvn_attach -ffffffff816a9320 T hvn_nvs_attach -ffffffff816a9660 T hvn_rx_ring_create -ffffffff816a9810 T hvn_tx_ring_create -ffffffff816a99f0 T hvn_ioctl -ffffffff816a9c20 T hvn_start -ffffffff816a9dc0 T hvn_media_change -ffffffff816a9df0 T hvn_media_status -ffffffff816a9eb0 T hvn_rndis_attach -ffffffff816aa510 T hvn_set_capabilities -ffffffff816aa5c0 T hvn_rndis_detach -ffffffff816aa7e0 T hvn_get_lladdr -ffffffff816aa860 T hvn_rx_ring_destroy -ffffffff816aa960 T hvn_tx_ring_destroy -ffffffff816aaac0 T hvn_nvs_detach -ffffffff816aab20 T hvn_init -ffffffff816aac50 T hvn_stop -ffffffff816aace0 T hvn_iff -ffffffff816aad90 T hvn_get_link_status -ffffffff816aae00 T hvn_link_status -ffffffff816aae50 T hvn_rndis_set -ffffffff816ab130 T hvn_rndis_close -ffffffff816ab180 T hvn_encap -ffffffff816ab4e0 T hvn_rndis_output -ffffffff816ab520 T hvn_decap -ffffffff816ab5c0 T hvn_txeof -ffffffff816ab6d0 T hvn_nvs_cmd -ffffffff816ab8f0 T hvn_rndis_query -ffffffff816abbc0 T hvn_set_lladdr -ffffffff816abbf0 T hvn_nvs_intr -ffffffff816abde0 T hvn_rndis_input -ffffffff816abfe0 T hvn_nvs_ack -ffffffff816ac140 T hvn_rndis_cmd -ffffffff816ac650 T hvn_rxeof -ffffffff816ac8b0 T hvn_rndis_complete -ffffffff816aca80 T hvn_rndis_status -ffffffff816ad000 T hvs_match -ffffffff816ad070 T hvs_attach -ffffffff816ad250 T hvs_scsi_cmd -ffffffff816ad630 T hvs_intr -ffffffff816ad780 T hvs_alloc_ccbs -ffffffff816ad9c0 T hvs_connect -ffffffff816adea0 T hvs_scsi_probe -ffffffff816adee0 T hvs_scsi_done -ffffffff816adf50 T hvs_scsi_cmd_done -ffffffff816ae200 T hvs_poll -ffffffff816ae2e0 T hvs_start -ffffffff816ae3d0 T hvs_poll_done -ffffffff816ae490 T hvs_empty_done -ffffffff816ae4c0 T hvs_put_ccb -ffffffff816ae550 T hvs_get_ccb -ffffffff816ae5d0 T hvs_free_ccbs -ffffffff816af000 T virtio_device_string -ffffffff816af040 T virtio_reset -ffffffff816af090 T virtio_reinit_start -ffffffff816af1a0 T virtio_init_vq -ffffffff816af3b0 T virtio_reinit_end -ffffffff816af3d0 T virtio_check_vqs -ffffffff816af500 T virtio_check_vq -ffffffff816af5e0 T virtio_alloc_vq -ffffffff816af9d0 T virtio_free_vq -ffffffff816afae0 T vq_alloc_entry -ffffffff816afb20 T vq_free_entry -ffffffff816afb60 T virtio_enqueue_prep -ffffffff816afbc0 T virtio_enqueue_reserve -ffffffff816afeb0 T virtio_enqueue_abort -ffffffff816aff60 T virtio_enqueue -ffffffff816b0040 T virtio_enqueue_p -ffffffff816b00c0 T virtio_enqueue_commit -ffffffff816b0300 T virtio_enqueue_trim -ffffffff816b0420 T virtio_dequeue -ffffffff816b0500 T virtio_dequeue_commit -ffffffff816b05b0 T virtio_postpone_intr -ffffffff816b0660 T virtio_nused -ffffffff816b06a0 T virtio_postpone_intr_smart -ffffffff816b0750 T virtio_postpone_intr_far -ffffffff816b07f0 T virtio_stop_vq_intr -ffffffff816b0880 T virtio_start_vq_intr -ffffffff816b1000 T vio_match -ffffffff816b1040 T vio_attach -ffffffff816b15b0 T vio_alloc_dmamem -ffffffff816b1730 T vio_free_dmamem -ffffffff816b17b0 T vio_alloc_mem -ffffffff816b1b40 T vio_get_lladdr -ffffffff816b1c30 T vio_put_lladdr -ffffffff816b1d00 T vio_rx_intr -ffffffff816b1d80 T vio_tx_intr -ffffffff816b1de0 T vio_ctrleof -ffffffff816b1e90 T vio_start -ffffffff816b2290 T vio_ioctl -ffffffff816b2440 T vio_media_change -ffffffff816b2470 T vio_media_status -ffffffff816b2530 T vio_config_change -ffffffff816b25c0 T vio_txtick -ffffffff816b2620 T vio_rxtick -ffffffff816b2660 T vio_link_state -ffffffff816b26f0 T vio_init -ffffffff816b27d0 T vio_stop -ffffffff816b2a20 T vio_populate_rx_mbufs -ffffffff816b2cd0 T vio_iff -ffffffff816b2eb0 T vio_rxeof -ffffffff816b3180 T vio_tx_drain -ffffffff816b3240 T vio_rx_drain -ffffffff816b32f0 T vio_tx_offload -ffffffff816b34a0 T vio_txeof -ffffffff816b3660 T vio_encap -ffffffff816b3730 T vio_add_rx_mbuf -ffffffff816b3800 T vio_free_rx_mbuf -ffffffff816b3880 T vio_rx_offload -ffffffff816b3930 T vio_ctrl_rx -ffffffff816b3d50 T vio_wait_ctrl -ffffffff816b3e20 T vio_wait_ctrl_done -ffffffff816b3ef0 T vio_ctrl_wakeup -ffffffff816b3f10 T vio_set_rx_filter -ffffffff816b5000 T vioblk_match -ffffffff816b5040 T vioblk_attach -ffffffff816b5300 T vioblk_scsi_cmd -ffffffff816b59d0 T vioblk_vq_done -ffffffff816b5b20 T vioblk_req_get -ffffffff816b5b90 T vioblk_req_put -ffffffff816b5be0 T vioblk_alloc_reqs -ffffffff816b60f0 T vioblk_vq_done1 -ffffffff816b6230 T vioblk_reset -ffffffff816b62e0 T vioblk_scsi_done -ffffffff816b6300 T vioblk_scsi_inq -ffffffff816b6440 T vioblk_scsi_capacity -ffffffff816b64e0 T vioblk_scsi_capacity16 -ffffffff816b7000 T viomb_match -ffffffff816b7040 T viomb_attach -ffffffff816b7430 T viomb_config_change -ffffffff816b7480 T viomb_inflate_intr -ffffffff816b7600 T viomb_deflate_intr -ffffffff816b7740 T viomb_read_config -ffffffff816b77c0 T viomb_worker -ffffffff816b7870 T viomb_inflate -ffffffff816b7a50 T viomb_deflate -ffffffff816b7c70 T viomb_vq_dequeue -ffffffff816b8000 T viornd_match -ffffffff816b8040 T viornd_attach -ffffffff816b82a0 T viornd_vq_done -ffffffff816b83c0 T viornd_tick -ffffffff816b9000 T vioscsi_match -ffffffff816b9040 T vioscsi_attach -ffffffff816b9310 T vioscsi_scsi_cmd -ffffffff816b9630 T vioscsi_vq_done -ffffffff816b9710 T vioscsi_req_get -ffffffff816b9780 T vioscsi_req_put -ffffffff816b97d0 T vioscsi_alloc_reqs -ffffffff816b9c20 T vioscsi_req_done -ffffffff816ba000 T vmmci_match -ffffffff816ba040 T vmmci_attach -ffffffff816ba140 T vmmci_activate -ffffffff816ba1c0 T vmmci_config_change -ffffffff816ba2d0 T vmmci_tick_hook -ffffffff816ba3d0 T vmmci_tick -ffffffff816bb000 T pcimatch -ffffffff816bb080 T pciattach -ffffffff816bb1c0 T pcidetach -ffffffff816bb1d0 T pciactivate -ffffffff816bb280 T pci_enumerate_bus -ffffffff816bb430 T pci_reserve_resources -ffffffff816bba10 T pci_primary_vga -ffffffff816bbab0 T pci_detach_devices -ffffffff816bbb90 T pci_suspend -ffffffff816bbda0 T pci_resume -ffffffff816bbfe0 T pci_powerdown -ffffffff816bc0e0 T pci_get_capability -ffffffff816bc1f0 T pci_suspend_msix -ffffffff816bc350 T pci_get_powerstate -ffffffff816bc3d0 T pci_set_powerstate -ffffffff816bc4f0 T pci_resume_msix -ffffffff816bc660 T pciprint -ffffffff816bc750 T pcisubmatch -ffffffff816bc7b0 T pci_probe_device -ffffffff816bccb0 T pci_get_ht_capability -ffffffff816bcda0 T pci_alloc_msix_table -ffffffff816bce20 T pci_free_msix_table -ffffffff816bcea0 T pci_get_ext_capability -ffffffff816bcf80 T pci_requester_id -ffffffff816bcfe0 T pci_find_device -ffffffff816bd080 T pci_vpd_read -ffffffff816bd1f0 T pci_vpd_write -ffffffff816bd380 T pci_matchbyid -ffffffff816bd3f0 T pci_disable_legacy_vga -ffffffff816bd460 T pciopen -ffffffff816bd4d0 T pciclose -ffffffff816bd510 T pciioctl -ffffffff816bdd20 T pci_disable_vga -ffffffff816bdd60 T pci_unroute_vga -ffffffff816bddf0 T pci_route_vga -ffffffff816bde80 T pci_enable_vga -ffffffff816bdec0 T pci_intr_msix_count -ffffffff816be000 T obsd_pci_io_find -ffffffff816be180 T obsd_pci_mem_find -ffffffff816be3f0 T pci_mapreg_type -ffffffff816be470 T pci_mapreg_probe -ffffffff816be590 T pci_mapreg_info -ffffffff816be5f0 T pci_mapreg_assign -ffffffff816be7e0 T pci_mapreg_map -ffffffff816bf000 T pci_lookup_quirkdata -ffffffff816c0000 T pci_findvendor -ffffffff816c0060 T pci_findproduct -ffffffff816c00d0 T pci_devinfo -ffffffff816c1000 T vga_pci_match -ffffffff816c10a0 T vga_pci_attach -ffffffff816c1200 T vga_pci_activate -ffffffff816c12a0 T vga_save_state -ffffffff816c1750 T vga_restore_state -ffffffff816c1ca0 T vga_pci_mmap -ffffffff816c1cd0 T vga_pci_cnattach -ffffffff816c1cf0 T vga_pci_ioctl -ffffffff816c2000 T cy82c693_init -ffffffff816c20c0 T cy82c693_read -ffffffff816c2120 T cy82c693_write -ffffffff816c3000 t ahc_aic785X_setup -ffffffff816c3080 t ahc_aic7860_setup -ffffffff816c3100 t ahc_apa1480_setup -ffffffff816c3180 t ahc_aic7870_setup -ffffffff816c31e0 t ahc_aha394X_setup -ffffffff816c3280 t ahc_aha398X_setup -ffffffff816c3330 t ahc_aha494X_setup -ffffffff816c33d0 t ahc_aic7880_setup -ffffffff816c3460 t ahc_aha394XU_setup -ffffffff816c3520 t ahc_aha398XU_setup -ffffffff816c35f0 t ahc_aha2940Pro_setup -ffffffff816c3680 t ahc_aic7890_setup -ffffffff816c36f0 t ahc_aic7892_setup -ffffffff816c3750 t ahc_aha29160C_setup -ffffffff816c37c0 t ahc_aic7895_setup -ffffffff816c3890 t ahc_aic7896_setup -ffffffff816c3900 t ahc_aic7899_setup -ffffffff816c3970 t ahc_raid_setup -ffffffff816c39c0 T ahc_pci_probe -ffffffff816c3a90 T ahc_pci_attach -ffffffff816c4590 T ahc_find_pci_device -ffffffff816c4670 T ahc_pci_intr -ffffffff816c48d0 t ahc_pci_chip_init -ffffffff816c4a80 t ahc_probe_ext_scbram -ffffffff816c4e00 t ahc_scbram_config -ffffffff816c5000 T ahd_aic7901_setup -ffffffff816c5020 T ahd_aic7901A_setup -ffffffff816c5040 T ahd_aic7902_setup -ffffffff816c5070 T ahd_pci_probe -ffffffff816c50d0 T ahd_pci_attach -ffffffff816c5570 T ahd_activate -ffffffff816c55d0 T ahd_find_pci_device -ffffffff816c5890 T ahd_pci_test_register_access -ffffffff816c5b40 T ahd_pci_intr -ffffffff816c5d80 T ahd_check_extport -ffffffff816c6040 T ahd_configure_termination -ffffffff816c6240 T ahd_pci_split_intr -ffffffff816c6960 T ahd_aic790X_setup -ffffffff816c7000 T adw_pci_match -ffffffff816c7030 T adw_pci_attach -ffffffff816c8000 T AdwInitFromEEPROM -ffffffff816c85e0 T AdwGetEEPROMConfig -ffffffff816c8800 T AdwReadEEPWord -ffffffff816c88a0 T AdwSetEEPROMConfig -ffffffff816c8b80 T AdwInitDriver -ffffffff816c96e0 T AdwRamSelfTest -ffffffff816c9890 T AdwLoadMCode -ffffffff816c9cb0 T AdwASC3550Cabling -ffffffff816c9e10 T AdwASC38C0800Cabling -ffffffff816c9f70 T AdwASC38C1600Cabling -ffffffff816ca0a0 T AdwResetCCB -ffffffff816ca130 T AdwSleepMilliSecond -ffffffff816ca150 T AdwWaitEEPCmd -ffffffff816ca1c0 T AdwExeScsiQueue -ffffffff816ca330 T AdwResetChip -ffffffff816ca390 T AdwSendIdleCmd -ffffffff816ca550 T AdwDelayMicroSecond -ffffffff816ca570 T AdwResetSCSIBus -ffffffff816ca8a0 T AdwISR -ffffffff816caab0 T AdwInquiryHandling -ffffffff816cb000 T AdwInitCarriers -ffffffff816cc000 T twe_pci_match -ffffffff816cc030 T twe_pci_attach -ffffffff816cd000 T arc_match -ffffffff816cd0a0 T arc_attach -ffffffff816cd2e0 T arc_detach -ffffffff816cd390 T arc_activate -ffffffff816cd410 T arc_scsi_cmd -ffffffff816cd720 T arc_match_board -ffffffff816cd790 T arc_map_pci_resources -ffffffff816cd9a0 T arc_alloc_ccbs -ffffffff816cdcf0 T arc_iop_set_conf -ffffffff816cde90 T arc_enable_all_intr -ffffffff816cdf90 T arc_bioctl -ffffffff816ce050 T arc_create_sensors -ffffffff816ce250 T arc_unmap_pci_resources -ffffffff816ce2b0 T arc_stop_bgrb_proc -ffffffff816ce330 T arc_flush_cache -ffffffff816ce3b0 T arc_intr_A -ffffffff816ce590 T arc_read -ffffffff816ce5b0 T arc_write -ffffffff816ce600 T arc_scsi_cmd_done -ffffffff816ce710 T arc_intr_C -ffffffff816ce970 T arc_intr_D -ffffffff816cec30 T arc_intr -ffffffff816cec80 T arc_load_xs -ffffffff816cede0 T arc_complete -ffffffff816cf010 T arc_disable_all_intr -ffffffff816cf100 T arc_chipA_firmware -ffffffff816cf330 T arc_wait_eq -ffffffff816cf3d0 T arc_msg0 -ffffffff816cf5e0 T arc_read_region -ffffffff816cf610 T arc_chipB_firmware -ffffffff816cf6b0 T arc_chipC_firmware -ffffffff816cf8e0 T arc_chipD_firmware -ffffffff816cfb50 T arc_bio_inq -ffffffff816cfcf0 T arc_bio_vol -ffffffff816cfe90 T arc_bio_disk -ffffffff816d0140 T arc_bio_alarm -ffffffff816d0290 T arc_bio_blink -ffffffff816d0360 T arc_bio_alarm_state -ffffffff816d0420 T arc_lock -ffffffff816d0530 T arc_msgbuf -ffffffff816d0f50 T arc_unlock -ffffffff816d1060 T arc_bio_getvol -ffffffff816d11b0 T arc_msg_cksum -ffffffff816d1260 T arc_write_region -ffffffff816d12b0 T arc_wait -ffffffff816d14f0 T arc_refresh_sensors -ffffffff816d15f0 T arc_wait_ne -ffffffff816d1690 T arc_dmamem_alloc -ffffffff816d1810 T arc_dmamem_free -ffffffff816d1890 T arc_put_ccb -ffffffff816d1900 T arc_get_ccb -ffffffff816d1970 T arc_free_ccb_src -ffffffff816d2000 T jmb_match -ffffffff816d2050 T jmb_attach -ffffffff816d2230 T jmb_print -ffffffff816d3000 T ahci_pci_match -ffffffff816d30c0 T ahci_pci_attach -ffffffff816d32d0 T ahci_pci_detach -ffffffff816d3340 T ahci_pci_activate -ffffffff816d3350 T ahci_lookup_device -ffffffff816d33c0 T ahci_no_match -ffffffff816d33f0 T ahci_vt8251_attach -ffffffff816d3420 T ahci_ati_sb_idetoahci -ffffffff816d34d0 T ahci_ati_sb600_attach -ffffffff816d3510 T ahci_ati_sb700_attach -ffffffff816d3550 T ahci_amd_hudson2_attach -ffffffff816d3590 T ahci_intel_attach -ffffffff816d35c0 T ahci_samsung_attach -ffffffff816d35f0 T ahci_map_regs -ffffffff816d3690 T ahci_map_intr -ffffffff816d3720 T ahci_unmap_regs -ffffffff816d3770 T ahci_unmap_intr -ffffffff816d4000 T nvme_pci_match -ffffffff816d4070 T nvme_pci_attach -ffffffff816d4250 T nvme_pci_detach -ffffffff816d4280 T nvme_pci_activate -ffffffff816d5000 T ami_pci_match -ffffffff816d5100 T ami_pci_attach -ffffffff816d5800 T ami_pci_find_device -ffffffff816d6000 T mfi_pci_match -ffffffff816d6080 T mfi_pci_attach -ffffffff816d6310 T mfi_pci_find_device -ffffffff816d7000 T mfii_match -ffffffff816d7090 T mfii_attach -ffffffff816d7a10 T mfii_detach -ffffffff816d7ce0 T mfii_activate -ffffffff816d7d80 T mfii_scsi_cmd -ffffffff816d8070 T mfii_scsi_ioctl -ffffffff816d80d0 T mfii_pd_scsi_cmd -ffffffff816d8350 T mfii_pd_scsi_probe -ffffffff816d8500 T mfii_find_iop -ffffffff816d8610 T mfii_get_ccb -ffffffff816d8690 T mfii_put_ccb -ffffffff816d8700 T mfii_aen -ffffffff816d8870 T mfii_abort_task -ffffffff816d8ac0 T mfii_write -ffffffff816d8b10 T mfii_transition_firmware -ffffffff816d8d50 T mfii_read -ffffffff816d8d70 T mfii_dmamem_alloc -ffffffff816d8ee0 T mfii_init_ccb -ffffffff816d9230 T mfii_initialise_firmware -ffffffff816d9530 T mfii_get_info -ffffffff816d9680 T mfii_intr -ffffffff816d9700 T mfii_syspd -ffffffff816d9800 T mfii_aen_register -ffffffff816d99d0 T mfii_mgmt -ffffffff816d9b30 T mfii_ioctl -ffffffff816d9d30 T mfii_create_sensors -ffffffff816da040 T mfii_dmamem_free -ffffffff816da0c0 T mfii_dev_handles_smr -ffffffff816da0e0 T mfii_dev_handles_update -ffffffff816da320 T mfii_aen_unregister -ffffffff816da350 T mfii_dcmd_start -ffffffff816da3f0 T mfii_start -ffffffff816da450 T mfii_scrub_ccb -ffffffff816da530 T mfii_do_mgmt -ffffffff816da8a0 T mfii_aen_start -ffffffff816dab30 T mfii_aen_done -ffffffff816dab80 T mfii_aen_pd_insert -ffffffff816dabf0 T mfii_aen_pd_remove -ffffffff816dac40 T mfii_aen_pd_state_change -ffffffff816dad00 T mfii_aen_ld_update -ffffffff816db030 T mfii_init_ld_sensor -ffffffff816db140 T mfii_reset_hard -ffffffff816db350 T mfii_mfa_poll -ffffffff816db560 T mfii_poll -ffffffff816db660 T mfii_poll_done -ffffffff816db6a0 T mfii_postq -ffffffff816db9d0 T mfii_exec -ffffffff816dbaf0 T mfii_exec_done -ffffffff816dbb40 T mfii_load_mfa -ffffffff816dbc50 T mfii_empty_done -ffffffff816dbc80 T mfii_done -ffffffff816dbd50 T mfii_my_intr -ffffffff816dbdd0 T mfii_scsi_cmd_done -ffffffff816dbec0 T mfii_scsi_cmd_tmo -ffffffff816dbf50 T mfii_scsi_cmd_io -ffffffff816dc0c0 T mfii_scsi_cmd_cdb -ffffffff816dc1f0 T mfii_ioctl_cache -ffffffff816dc690 T mfii_load_ccb -ffffffff816dc870 T mfii_pd_scsi_cmd_cdb -ffffffff816dca20 T mfii_abort -ffffffff816dca80 T mfii_scsi_cmd_abort_done -ffffffff816dcb00 T mfii_ioctl_inq -ffffffff816dcba0 T mfii_ioctl_vol -ffffffff816dce10 T mfii_ioctl_disk -ffffffff816dd440 T mfii_ioctl_alarm -ffffffff816dd5d0 T mfii_ioctl_blink -ffffffff816dd900 T mfii_ioctl_setstate -ffffffff816ddd50 T mfii_ioctl_patrol -ffffffff816de670 T mfii_bio_getitall -ffffffff816ded70 T mfii_bio_hs -ffffffff816df2c0 t mfii_makegood -ffffffff816df920 t mfii_makespare -ffffffff816dfc20 T mfii_bbu -ffffffff816e02a0 T mfii_refresh_ld_sensor -ffffffff816e0320 T mfii_refresh_sensors -ffffffff816e1000 T ips_match -ffffffff816e1030 T ips_attach -ffffffff816e1af0 T ips_dmamem_alloc -ffffffff816e1c50 T ips_ccb_get -ffffffff816e1ce0 T ips_ccb_put -ffffffff816e1d40 T ips_getadapterinfo -ffffffff816e1e30 T ips_getdriveinfo -ffffffff816e1f20 T ips_getconf -ffffffff816e2010 T ips_getpg5 -ffffffff816e2110 T ips_ccb_alloc -ffffffff816e2280 T ips_intr -ffffffff816e2380 T ips_ioctl -ffffffff816e24e0 T ips_sensors -ffffffff816e2690 T ips_ccb_free -ffffffff816e2710 T ips_dmamem_free -ffffffff816e2770 T ips_scsi_cmd -ffffffff816e2ad0 T ips_load_xs -ffffffff816e2c50 T ips_done_xs -ffffffff816e2d90 T ips_start_xs -ffffffff816e2e40 T ips_scsi_pt_cmd -ffffffff816e3010 T ips_done_pt -ffffffff816e31d0 T ips_scsi_ioctl -ffffffff816e31f0 T ips_ioctl_inq -ffffffff816e32a0 T ips_ioctl_vol -ffffffff816e36a0 T ips_ioctl_disk -ffffffff816e3a80 T ips_ioctl_setstate -ffffffff816e3d20 T ips_getrblstat -ffffffff816e3e10 T ips_rebuild -ffffffff816e3f20 T ips_setstate -ffffffff816e4020 T ips_timeout -ffffffff816e40a0 T ips_cmd -ffffffff816e4140 T ips_poll -ffffffff816e4240 T ips_done -ffffffff816e4310 T ips_error -ffffffff816e43c0 T ips_error_xs -ffffffff816e4480 T ips_done_mgmt -ffffffff816e44f0 T ips_copperhead_exec -ffffffff816e45c0 T ips_copperhead_intren -ffffffff816e45f0 T ips_copperhead_isintr -ffffffff816e4670 T ips_copperhead_status -ffffffff816e4750 T ips_morpheus_exec -ffffffff816e4780 T ips_morpheus_intren -ffffffff816e47e0 T ips_morpheus_isintr -ffffffff816e4830 T ips_morpheus_status -ffffffff816e5000 T eap_match -ffffffff816e5030 T eap_attach -ffffffff816e5df0 T eap_activate -ffffffff816e5e30 T eap_open -ffffffff816e5e60 T eap_close -ffffffff816e5f40 T eap_set_params -ffffffff816e6170 T eap_round_blocksize -ffffffff816e61a0 T eap_halt_output -ffffffff816e6220 T eap_halt_input -ffffffff816e62a0 T eap1370_mixer_set_port -ffffffff816e68e0 T eap1370_mixer_get_port -ffffffff816e6a50 T eap1370_query_devinfo -ffffffff816e6e90 T eap_malloc -ffffffff816e6f40 T eap_free -ffffffff816e7040 T eap_trigger_output -ffffffff816e7290 T eap_trigger_input -ffffffff816e74d0 T eap1371_mixer_set_port -ffffffff816e74f0 T eap1371_mixer_get_port -ffffffff816e7510 T eap1371_query_devinfo -ffffffff816e7530 T eap_midi_open -ffffffff816e75f0 T eap_midi_close -ffffffff816e76a0 T eap_midi_output -ffffffff816e7750 T eap_midi_getinfo -ffffffff816e7790 T eap_resume -ffffffff816e8240 T eap1370_write_codec -ffffffff816e82e0 T eap1371_read_codec -ffffffff816e83e0 t eap1371_ready_codec -ffffffff816e8620 T eap1371_write_codec -ffffffff816e8660 T eap1371_src_wait -ffffffff816e8700 T eap1371_src_write -ffffffff816e87c0 T eap_intr -ffffffff816e89f0 T eap1371_attach_codec -ffffffff816e8a20 T eap1371_reset_codec -ffffffff816e8ad0 T eap_flags_codec -ffffffff816e8b00 T eap_allocmem -ffffffff816e8c60 T eap_freemem -ffffffff816e8cf0 T eap1370_set_mixer -ffffffff816e9000 T auacer_match -ffffffff816e9030 T auacer_attach -ffffffff816e92e0 T auacer_activate -ffffffff816e9320 T auacer_open -ffffffff816e9350 T auacer_close -ffffffff816e9380 T auacer_set_params -ffffffff816e95d0 T auacer_round_blocksize -ffffffff816e9600 T auacer_halt_output -ffffffff816e9760 T auacer_halt_input -ffffffff816e9790 T auacer_set_port -ffffffff816e97b0 T auacer_get_port -ffffffff816e97d0 T auacer_query_devinfo -ffffffff816e97f0 T auacer_allocm -ffffffff816e98b0 T auacer_freem -ffffffff816e99b0 T auacer_round_buffersize -ffffffff816e99f0 T auacer_trigger_output -ffffffff816e9ca0 T auacer_trigger_input -ffffffff816e9ce0 T auacer_intr -ffffffff816e9f40 T auacer_alloc_cdata -ffffffff816ea100 T auacer_attach_codec -ffffffff816ea130 T auacer_read_codec -ffffffff816ea280 T auacer_write_codec -ffffffff816ea3d0 T auacer_reset_codec -ffffffff816ea6f0 T auacer_set_rate -ffffffff816ea7b0 T auacer_allocmem -ffffffff816ea910 T auacer_freemem -ffffffff816eb000 T auich_match -ffffffff816eb080 T auich_attach -ffffffff816eb6e0 T auich_activate -ffffffff816eb760 T auich_open -ffffffff816eb7c0 T auich_close -ffffffff816eb7e0 T auich_set_params -ffffffff816ebaa0 T auich_round_blocksize -ffffffff816ebad0 T auich_halt_output -ffffffff816ebbe0 T auich_halt_input -ffffffff816ebd90 T auich_set_port -ffffffff816ebdb0 T auich_get_port -ffffffff816ebdd0 T auich_query_devinfo -ffffffff816ebdf0 T auich_allocm -ffffffff816ebec0 T auich_freem -ffffffff816ebfb0 T auich_round_buffersize -ffffffff816ebff0 T auich_trigger_output -ffffffff816ec0e0 T auich_trigger_input -ffffffff816ec1d0 T auich_intr -ffffffff816ec3f0 T auich_alloc_cdata -ffffffff816ec5e0 T auich_reset_codec -ffffffff816ec6b0 T auich_attach_codec -ffffffff816ec6e0 T auich_read_codec -ffffffff816ec7b0 T auich_write_codec -ffffffff816ec880 T auich_flags_codec -ffffffff816ec8b0 T auich_spdif_event -ffffffff816ec8e0 T auich_resume -ffffffff816ec950 T auich_calibrate -ffffffff816ecef0 T auich_halt_pipe -ffffffff816ed000 T auich_allocmem -ffffffff816ed160 T auich_freemem -ffffffff816ed1d0 T auich_intr_pipe -ffffffff816ed300 T auich_trigger_pipe -ffffffff816ee000 T azalia_pci_match -ffffffff816ee060 T azalia_pci_attach -ffffffff816ee3c0 T azalia_pci_detach -ffffffff816ee760 T azalia_pci_activate -ffffffff816ee7e0 T azalia_open -ffffffff816ee860 T azalia_close -ffffffff816ee8b0 T azalia_set_params -ffffffff816ee960 T azalia_halt_output -ffffffff816eea40 T azalia_halt_input -ffffffff816eeb20 T azalia_set_port -ffffffff816eebb0 T azalia_get_port -ffffffff816eec30 T azalia_query_devinfo -ffffffff816eecb0 T azalia_allocm -ffffffff816eed40 T azalia_freem -ffffffff816eee10 T azalia_round_buffersize -ffffffff816eee50 T azalia_trigger_output -ffffffff816eef50 T azalia_trigger_input -ffffffff816ef050 T azalia_set_blksz -ffffffff816ef0b0 T azalia_set_nblks -ffffffff816ef0f0 T azalia_pci_read -ffffffff816ef140 T azalia_pci_write -ffffffff816ef1b0 T azalia_configure_pci -ffffffff816ef840 T azalia_intr -ffffffff816ef980 T azalia_init -ffffffff816efac0 T azalia_init_codecs -ffffffff816efe60 T azalia_init_streams -ffffffff816eff70 T azalia_suspend -ffffffff816f0150 T azalia_shutdown -ffffffff816f0260 T azalia_resume -ffffffff816f0360 T azalia_free_dmamem -ffffffff816f0400 T azalia_codec_delete -ffffffff816f0590 T azalia_stream_intr -ffffffff816f0700 T azalia_rirb_intr -ffffffff816f0830 T azalia_halt_corb -ffffffff816f0960 T azalia_halt_rirb -ffffffff816f0a20 T azalia_print_codec -ffffffff816f0aa0 T azalia_reset -ffffffff816f0bf0 T azalia_get_ctrlr_caps -ffffffff816f0ed0 T azalia_init_corb -ffffffff816f10f0 T azalia_init_rirb -ffffffff816f1400 T azalia_codec_init -ffffffff816f1c00 T azalia_comresp -ffffffff816f1d40 T azalia_stream_init -ffffffff816f1de0 T azalia_alloc_dmamem -ffffffff816f1f80 T azalia_rirb_kick_unsol_events -ffffffff816f2070 T azalia_set_command -ffffffff816f2170 T azalia_get_response -ffffffff816f2300 T azalia_resume_codec -ffffffff816f2460 T azalia_widget_init_pin -ffffffff816f2620 T azalia_codec_print_audiofunc -ffffffff816f2650 T azalia_widget_init -ffffffff816f2840 T azalia_widget_init_connection -ffffffff816f2c00 T azalia_widget_print_widget -ffffffff816f2c30 T azalia_widget_check_conn -ffffffff816f2d20 T azalia_codec_find_defdac -ffffffff816f2e60 T azalia_codec_find_defadc -ffffffff816f2f00 T azalia_codec_select_micadc -ffffffff816f3090 T azalia_codec_sort_pins -ffffffff816f3b50 T azalia_codec_find_inputmixer -ffffffff816f3d10 T azalia_codec_select_dacs -ffffffff816f3fd0 T azalia_codec_select_spkrdac -ffffffff816f42f0 T azalia_codec_print_groups -ffffffff816f4320 T azalia_widget_label_widgets -ffffffff816f4ab0 T azalia_codec_construct_format -ffffffff816f4f70 T azalia_codec_init_volgroups -ffffffff816f5590 T azalia_codec_find_defadc_sub -ffffffff816f5700 T azalia_codec_add_bits -ffffffff816f5840 T azalia_codec_add_format -ffffffff816f5aa0 T azalia_codec_connect_stream -ffffffff816f5cd0 T azalia_codec_disconnect_stream -ffffffff816f5e20 T azalia_widget_init_audio -ffffffff816f5f20 T azalia_widget_sole_conn -ffffffff816f6200 T azalia_widget_print_audio -ffffffff816f6230 T azalia_widget_print_pin -ffffffff816f6260 T azalia_stream_reset -ffffffff816f6410 T azalia_stream_start -ffffffff816f6680 T azalia_stream_halt -ffffffff816f6740 T azalia_match_format -ffffffff816f67c0 T azalia_set_params_sub -ffffffff816f6ab0 T azalia_params2fmt -ffffffff816f7000 T azalia_codec_init_vtbl -ffffffff816f8190 T azalia_widget_enabled -ffffffff816f81e0 T azalia_init_dacgroup -ffffffff816f8320 T azalia_add_convgroup -ffffffff816f8770 T azalia_codec_fnode -ffffffff816f88c0 T azalia_unsol_event -ffffffff816f8ba0 T azalia_mixer_set -ffffffff816f99b0 T azalia_mixer_init -ffffffff816fb7e0 T azalia_mixer_ensure_capacity -ffffffff816fb8e0 T azalia_devinfo_offon -ffffffff816fb950 T azalia_mixer_fix_indexes -ffffffff816fba30 T azalia_mixer_default -ffffffff816fbfd0 T azalia_mixer_get -ffffffff816fc830 T azalia_codec_enable_unsol -ffffffff816fc990 T azalia_mixer_delete -ffffffff816fc9f0 T azalia_mixer_from_device_value -ffffffff816fca90 T azalia_mixer_to_device_value -ffffffff816fcb40 T azalia_gpio_unmute -ffffffff816fcc30 T azalia_ampcap_ov -ffffffff816fcca0 T azalia_pin_config_ov -ffffffff816fcd10 T azalia_codec_gpio_quirks -ffffffff816fcdd0 T azalia_codec_widget_quirks -ffffffff816fd030 T azalia_codec_init_dolby_atmos -ffffffff816fe000 T envymatch -ffffffff816fe030 T envyattach -ffffffff816fe320 T envydetach -ffffffff816fe3c0 T envyactivate -ffffffff816fe400 T envy_open -ffffffff816fe430 T envy_close -ffffffff816fe460 T envy_set_params -ffffffff816fe670 T envy_round_blocksize -ffffffff816fe6a0 T envy_halt_output -ffffffff816fe740 T envy_halt_input -ffffffff816fe7e0 T envy_set_port -ffffffff816fe9c0 T envy_get_port -ffffffff816feb80 T envy_query_devinfo -ffffffff816feea0 T envy_allocm -ffffffff816ff030 T envy_freem -ffffffff816ff0d0 T envy_trigger_output -ffffffff816ff270 T envy_trigger_input -ffffffff816ff410 T envy_midi_open -ffffffff816ff570 T envy_midi_close -ffffffff816ff620 T envy_midi_output -ffffffff816ff6d0 T envy_midi_getinfo -ffffffff816ff710 T ak4524_dac_ndev -ffffffff816ff750 T ak4524_dac_devinfo -ffffffff816ff870 T ak4524_dac_get -ffffffff816ff900 T ak4524_dac_set -ffffffff816ff9e0 T ak4524_adc_ndev -ffffffff816ffa10 T ak4524_adc_devinfo -ffffffff816ffa80 T ak4524_adc_get -ffffffff816ffae0 T ak4524_adc_set -ffffffff816ffb70 T ak4358_dac_ndev -ffffffff816ffba0 T ak4358_dac_devinfo -ffffffff816ffc10 T ak4358_dac_get -ffffffff816ffc60 T ak4358_dac_set -ffffffff816ffce0 T ak5365_adc_ndev -ffffffff816ffd20 T ak5365_adc_devinfo -ffffffff816ffea0 T ak5365_adc_get -ffffffff816fff10 T ak5365_adc_set -ffffffff816fffb0 T unkenvy_codec_ndev -ffffffff816fffe0 T delta_init -ffffffff81700100 T delta_codec_write -ffffffff817005b0 T ewx_codec_write -ffffffff81700ab0 T unkenvy_init -ffffffff81700ae0 T unkenvy_codec_write -ffffffff81700b10 T julia_init -ffffffff81700bf0 T julia_codec_write -ffffffff81700c10 T julia_set_rate -ffffffff81700e30 T ap192k_init -ffffffff81701150 T ap192k_codec_write -ffffffff817015a0 T ap192k_set_rate -ffffffff817017c0 T revo51_init -ffffffff81701ae0 T revo51_codec_write -ffffffff81702000 T envy_ac97_init -ffffffff817020a0 T dynex_sc51_init -ffffffff81702150 T envy_codec_write -ffffffff81702190 T envy_gpio_getstate -ffffffff81702290 T envy_gpio_setstate -ffffffff81702370 T ak4358_set_rate -ffffffff817023f0 T envy_gpio_i2c_start_bit -ffffffff81702720 T envy_gpio_i2c_byte_out -ffffffff81702c40 T envy_gpio_i2c_stop_bit -ffffffff81702eb0 T envy_ac97_attach_codec -ffffffff81702ee0 T envy_ac97_read_codec -ffffffff817030b0 T envy_ac97_write_codec -ffffffff81703210 T envy_ac97_reset_codec -ffffffff81703340 T envy_ac97_flags_codec -ffffffff81703370 T envy_i2c_write -ffffffff817035d0 T envy_codec_read -ffffffff81703620 T envy_ccs_read -ffffffff81703670 T envy_ccs_write -ffffffff817036d0 T envy_mt_read_1 -ffffffff81703720 T envy_mt_write_1 -ffffffff81703780 T envy_mt_read_2 -ffffffff817037d0 T envy_mt_write_2 -ffffffff81703830 T envy_mt_read_4 -ffffffff81703880 T envy_mt_write_4 -ffffffff817038d0 T envy_cci_read -ffffffff81703950 T envy_cci_write -ffffffff817039e0 T envy_gpio_getmask -ffffffff81703ae0 T envy_gpio_setmask -ffffffff81703bc0 T envy_gpio_getdir -ffffffff81703cc0 T envy_gpio_setdir -ffffffff81703da0 T envy_i2c_wait -ffffffff81703e70 T envy_i2c_read -ffffffff817040a0 T envy_eeprom_gpioxxx -ffffffff81704110 T envy_ac97_wait -ffffffff817041c0 T envy_midi_wait -ffffffff817042b0 T envy_reset -ffffffff81704a10 T envy_lineout_getsrc -ffffffff81704b30 T envy_lineout_setsrc -ffffffff81704d30 T envy_spdout_getsrc -ffffffff81704dd0 T envy_spdout_setsrc -ffffffff81704ec0 T envy_mon_getvol -ffffffff81704f50 T envy_mon_setvol -ffffffff81704fe0 T envy_intr -ffffffff81706000 T emuxki_match -ffffffff81706030 T emuxki_attach -ffffffff81706320 T emuxki_detach -ffffffff817063d0 T emuxki_activate -ffffffff81706420 T emuxki_open -ffffffff817064d0 T emuxki_close -ffffffff81706540 T emuxki_set_params -ffffffff817065c0 T emuxki_round_blocksize -ffffffff81706610 T emuxki_halt_output -ffffffff81706660 T emuxki_halt_input -ffffffff817066b0 T emuxki_set_port -ffffffff817066d0 T emuxki_get_port -ffffffff817066f0 T emuxki_query_devinfo -ffffffff81706710 T emuxki_allocm -ffffffff81706740 T emuxki_freem -ffffffff81706900 T emuxki_round_buffersize -ffffffff817069e0 T emuxki_trigger_output -ffffffff81706ab0 T emuxki_trigger_input -ffffffff81706b60 T emuxki_dmamem_delete -ffffffff81706ba0 T emuxki_dmamem_alloc -ffffffff81706dd0 T emuxki_dmamem_free -ffffffff81706e50 T emuxki_pci_shutdown -ffffffff81706eb0 T emuxki_scinit -ffffffff81707040 T emuxki_init -ffffffff81707e00 T emuxki_ac97_init -ffffffff81707e60 T emuxki_ac97_attach -ffffffff81707e90 T emuxki_ac97_read -ffffffff81707f30 T emuxki_ac97_write -ffffffff81707fd0 T emuxki_ac97_reset -ffffffff81708000 T emuxki_intr -ffffffff81708170 T emuxki_shutdown -ffffffff81708690 T emuxki_write_micro -ffffffff81708790 T emuxki_dsp_addop -ffffffff81708940 T emuxki_initfx -ffffffff817092b0 T emuxki_mem_new -ffffffff81709360 T emuxki_mem_delete -ffffffff81709410 T emuxki_pmem_alloc -ffffffff81709610 T emuxki_rmem_alloc -ffffffff81709700 T emuxki_chanparms_set_defaults -ffffffff817097f0 T emuxki_channel_new -ffffffff81709920 T emuxki_channel_delete -ffffffff81709950 T emuxki_channel_set_fxsend -ffffffff817099f0 T emuxki_channel_set_srate -ffffffff81709d20 T emuxki_channel_set_bufparms -ffffffff81709d60 T emuxki_channel_commit_fx -ffffffff81709fd0 T emuxki_channel_commit_parms -ffffffff8170a590 T emuxki_channel_start -ffffffff8170aae0 T emuxki_channel_stop -ffffffff8170ad40 T emuxki_voice_channel_create -ffffffff8170ae50 T emuxki_voice_channel_destroy -ffffffff8170aef0 T emuxki_recsrc_reserve -ffffffff8170af50 T emuxki_voice_recsrc_release -ffffffff8170af90 T emuxki_voice_dataloc_create -ffffffff8170b010 T emuxki_voice_dataloc_destroy -ffffffff8170b0e0 T emuxki_voice_new -ffffffff8170b2c0 T emuxki_voice_delete -ffffffff8170b420 T emuxki_voice_halt -ffffffff8170b540 T emuxki_voice_set_stereo -ffffffff8170b710 T emuxki_voice_set_srate -ffffffff8170b850 T emuxki_voice_adc_rate -ffffffff8170b960 T emuxki_voice_set_audioparms -ffffffff8170b9f0 T emuxki_voice_set_bufparms -ffffffff8170bca0 T emuxki_voice_commit_parms -ffffffff8170bd00 T emuxki_voice_curaddr -ffffffff8170be10 T emuxki_resched_timer -ffffffff8170bf60 T emuxki_voice_start -ffffffff8170c1a0 T emuxki_set_vparms -ffffffff8170d000 T auixp_match -ffffffff8170d030 T auixp_attach -ffffffff8170d350 T auixp_activate -ffffffff8170d470 T auixp_open -ffffffff8170d4a0 T auixp_close -ffffffff8170d4d0 T auixp_set_params -ffffffff8170d600 T auixp_round_blocksize -ffffffff8170d640 T auixp_commit_settings -ffffffff8170d7e0 T auixp_halt_output -ffffffff8170d8f0 T auixp_halt_input -ffffffff8170da00 T auixp_set_port -ffffffff8170da20 T auixp_get_port -ffffffff8170da40 T auixp_query_devinfo -ffffffff8170da60 T auixp_malloc -ffffffff8170db30 T auixp_free -ffffffff8170dc50 T auixp_trigger_output -ffffffff8170df10 T auixp_trigger_input -ffffffff8170e1d0 T auixp_allocmem -ffffffff8170e340 T auixp_freemem -ffffffff8170e3e0 T auixp_link_daisychain -ffffffff8170e4f0 T auixp_disable_dma -ffffffff8170e570 T auixp_allocate_dma_chain -ffffffff8170e640 T auixp_program_dma_chain -ffffffff8170e730 T auixp_enable_dma -ffffffff8170e7d0 T auixp_dma_update -ffffffff8170e810 T auixp_update_busbusy -ffffffff8170e890 T auixp_intr -ffffffff8170ea20 T auixp_disable_interrupts -ffffffff8170ea70 T auixp_init -ffffffff8170eb10 T auixp_post_config -ffffffff8170ec10 T auixp_autodetect_codecs -ffffffff8170ee40 T auixp_enable_interrupts -ffffffff8170eea0 T auixp_detach -ffffffff8170ef50 T auixp_attach_codec -ffffffff8170ef80 T auixp_read_codec -ffffffff8170f160 T auixp_wait_for_codecs -ffffffff8170f210 T auixp_write_codec -ffffffff8170f310 T auixp_reset_codec -ffffffff8170f340 T auixp_flags_codec -ffffffff8170f370 T auixp_reset_aclink -ffffffff81710000 T cs4280_match -ffffffff81710030 T cs4280_attach -ffffffff81710280 T cs4280_activate -ffffffff81710480 T cs4280_open -ffffffff817104b0 T cs4280_close -ffffffff817105a0 T cs4280_set_params -ffffffff81710780 T cs4280_round_blocksize -ffffffff817107c0 T cs4280_halt_output -ffffffff81710850 T cs4280_halt_input -ffffffff817108e0 T cs4280_mixer_set_port -ffffffff81710900 T cs4280_mixer_get_port -ffffffff81710920 T cs4280_query_devinfo -ffffffff81710940 T cs4280_malloc -ffffffff81710a20 T cs4280_free -ffffffff81710b30 T cs4280_trigger_output -ffffffff81710eb0 T cs4280_trigger_input -ffffffff81711110 T cs4280_read_codec -ffffffff81711290 T cs4280_src_wait -ffffffff81711320 T cs4280_write_codec -ffffffff81711430 T cs4280_set_adc_rate -ffffffff817116a0 T cs4280_set_dac_rate -ffffffff81711760 T cs4280_attachhook -ffffffff817118c0 T cs4280_init2 -ffffffff81711b90 T cs4280_get_portnum_by_name -ffffffff81711bc0 T cs4280_intr -ffffffff81711fe0 T cs4280_init -ffffffff81712370 T cs4280_attach_codec -ffffffff817123a0 T cs4280_reset_codec -ffffffff817124d0 T cs4280_download -ffffffff81712570 T cs4280_download_image -ffffffff81712780 T cs4280_reset -ffffffff81712800 T cs4280_freemem -ffffffff81712890 T cs4280_allocmem -ffffffff81712a30 T cs4280_clear_fifos -ffffffff81713000 T yds_match -ffffffff81713050 T yds_attach -ffffffff817132c0 T yds_activate -ffffffff817134b0 T yds_intr -ffffffff81713810 T yds_attachhook -ffffffff81713e60 T yds_init -ffffffff81714680 T yds_attach_codec -ffffffff817146b0 T yds_read_codec -ffffffff817147e0 T yds_write_codec -ffffffff817148c0 T yds_reset_codec -ffffffff817149d0 T yds_get_portnum_by_name -ffffffff81714a00 T yds_mixer_set_port -ffffffff81714a20 T yds_allocmem -ffffffff81714b80 T yds_freemem -ffffffff81714c10 T yds_open -ffffffff81714c90 T yds_close -ffffffff81714ed0 T yds_halt_output -ffffffff81714fd0 T yds_halt_input -ffffffff817150a0 T yds_set_params -ffffffff817151f0 T yds_round_blocksize -ffffffff81715230 T yds_trigger_output -ffffffff81715780 T yds_trigger_input -ffffffff81715a20 T yds_mixer_get_port -ffffffff81715a40 T yds_query_devinfo -ffffffff81715a60 T yds_malloc -ffffffff81715b10 T yds_free -ffffffff81715c10 T yds_round_buffersize -ffffffff81716000 T auvia_match -ffffffff81716030 T auvia_attach -ffffffff81716480 T auvia_activate -ffffffff817164f0 T auvia_open -ffffffff81716540 T auvia_close -ffffffff817165f0 T auvia_set_params -ffffffff817168f0 T auvia_round_blocksize -ffffffff81716950 T auvia_halt_output -ffffffff817169b0 T auvia_halt_input -ffffffff81716a10 T auvia_set_port -ffffffff81716a30 T auvia_get_port -ffffffff81716a50 T auvia_query_devinfo -ffffffff81716a70 T auvia_malloc -ffffffff81716ca0 T auvia_free -ffffffff81716d70 T auvia_round_buffersize -ffffffff81716db0 T auvia_trigger_output -ffffffff81716f60 T auvia_trigger_input -ffffffff81717110 T auvia_resume -ffffffff81717170 T auvia_intr -ffffffff81717280 T auvia_attach_codec -ffffffff817172b0 T auvia_read_codec -ffffffff81717450 T auvia_write_codec -ffffffff81717530 T auvia_reset_codec -ffffffff81717640 T auvia_spdif_event -ffffffff81717670 T auvia_waitready_codec -ffffffff81717710 T auvia_waitvalid_codec -ffffffff817177b0 T auvia_set_params_sub -ffffffff81717920 T auvia_build_dma_ops -ffffffff81718000 T gdt_pci_probe -ffffffff81718080 T gdt_pci_attach -ffffffff81718960 T gdt_pci_copy_cmd -ffffffff81718990 T gdt_pci_get_status -ffffffff817189c0 T gdt_pci_intr -ffffffff817189f0 T gdt_pci_release_event -ffffffff81718a20 T gdt_pci_set_sema0 -ffffffff81718a50 T gdt_pci_test_busy -ffffffff81718a80 T gdt_pcinew_copy_cmd -ffffffff81718ab0 T gdt_pcinew_get_status -ffffffff81718ae0 T gdt_pcinew_intr -ffffffff81718b10 T gdt_pcinew_release_event -ffffffff81718b40 T gdt_pcinew_set_sema0 -ffffffff81718b70 T gdt_pcinew_test_busy -ffffffff81718ba0 T gdt_mpr_copy_cmd -ffffffff81718c80 T gdt_mpr_get_status -ffffffff81718ca0 T gdt_mpr_intr -ffffffff81718da0 T gdt_mpr_release_event -ffffffff81718de0 T gdt_mpr_set_sema0 -ffffffff81718e10 T gdt_mpr_test_busy -ffffffff81718e60 T gdt_pci_enable_intr -ffffffff81719000 T ciss_pci_match -ffffffff81719030 T ciss_pci_attach -ffffffff81719410 T ciss_activate -ffffffff8171a000 T qlw_pci_match -ffffffff8171a080 T qlw_pci_attach -ffffffff8171a4c0 T qlw_pci_detach -ffffffff8171b000 T qla_pci_match -ffffffff8171b050 T qla_pci_attach -ffffffff8171b3d0 T qla_pci_detach -ffffffff8171c000 T qle_match -ffffffff8171c030 T qle_attach -ffffffff8171ca90 T qle_detach -ffffffff8171cb00 T qle_scsi_cmd -ffffffff8171cfb0 T qle_scsi_probe -ffffffff8171d040 T qle_intr -ffffffff8171d110 T qle_read_mbox -ffffffff8171d160 T qle_host_cmd -ffffffff8171d1b0 T qle_softreset -ffffffff8171d520 T qle_read_nvram -ffffffff8171d6a0 T qle_load_firmware_chunks -ffffffff8171d7a0 T qle_mbox -ffffffff8171da30 T qle_alloc_ccbs -ffffffff8171e040 T qle_dmamem_alloc -ffffffff8171e1b0 T qle_mbox_putaddr -ffffffff8171e210 T qle_do_update -ffffffff8171ebc0 T qle_deferred_update -ffffffff8171ebf0 T qle_read_isr -ffffffff8171ecd0 T qle_handle_intr -ffffffff8171ee50 T qle_dmamem_free -ffffffff8171eed0 T qle_free_ccbs -ffffffff8171f0c0 T qle_classify_port -ffffffff8171f1b0 T qle_get_loop_id -ffffffff8171f220 T qle_get_port_db -ffffffff8171f300 T qle_get_port_name_list -ffffffff8171f560 T qle_add_loop_port -ffffffff8171f7e0 T qle_add_fabric_port -ffffffff8171f9a0 T qle_add_logged_in_port -ffffffff8171fbf0 T qle_handle_resp -ffffffff8171ffa0 T qle_dump_iocb -ffffffff8171ffd0 T qle_async -ffffffff817201f0 T qle_read -ffffffff81720240 T qle_write -ffffffff81720290 T qle_clear_isr -ffffffff817202e0 T qle_put_marker -ffffffff81720320 T qle_put_cmd -ffffffff81720670 T qle_write_mbox -ffffffff817206c0 T qle_set_ints -ffffffff81720720 T qle_update_done -ffffffff81720750 T qle_update_cancel -ffffffff817207a0 T qle_update_start -ffffffff817207f0 T qle_update_defer -ffffffff81720840 T qle_clear_port_lists -ffffffff817209a0 T qle_update_topology -ffffffff81720a80 T qle_update_fabric -ffffffff81720b90 T qle_ct_pass_through -ffffffff81720e80 T qle_sge -ffffffff81720ec0 T qle_next_fabric_port -ffffffff81721030 T qle_fabric_plogx -ffffffff817212c0 T qle_fabric_plogi -ffffffff81721430 T qle_fabric_plogo -ffffffff81721470 T qle_dump_stuff -ffffffff817214a0 T qle_dump_iocb_segs -ffffffff817214d0 T qle_load_fwchunk -ffffffff81721740 T qle_verify_firmware -ffffffff81721840 T qle_read_ram_word -ffffffff817218b0 T qle_put_ccb -ffffffff81721920 T qle_get_ccb -ffffffff81722000 T mpi_pci_match -ffffffff81722030 T mpi_pci_attach -ffffffff81722350 T mpi_pci_detach -ffffffff81723000 T mpii_match -ffffffff81723030 T mpii_attach -ffffffff817237a0 T mpii_detach -ffffffff81723820 T mpii_scsi_cmd -ffffffff81723af0 T mpii_scsi_probe -ffffffff81723cf0 T mpii_scsi_ioctl -ffffffff81723d70 T mpii_write -ffffffff81723dc0 T mpii_iocfacts -ffffffff81724080 T mpii_init -ffffffff81724390 T mpii_alloc_ccbs -ffffffff817247c0 T mpii_alloc_replies -ffffffff81724880 T mpii_alloc_queues -ffffffff817249e0 T mpii_iocinit -ffffffff81724b60 T mpii_wait_eq -ffffffff81724c70 T mpii_read -ffffffff81724d20 T mpii_push_replies -ffffffff81724e70 T mpii_init_queues -ffffffff81724ef0 T mpii_board_info -ffffffff817250f0 T mpii_portfacts -ffffffff81725220 T mpii_target_map -ffffffff81725310 T mpii_cfg_coalescing -ffffffff817253e0 T mpii_eventnotify -ffffffff817255b0 T mpii_portenable -ffffffff817256a0 T mpii_intr -ffffffff81725af0 T mpii_ioctl -ffffffff81725c00 T mpii_create_sensors -ffffffff81725d90 T mpii_dmamem_free -ffffffff81725e20 T mpii_get_ccb -ffffffff81725eb0 T mpii_reply -ffffffff81725f80 T mpii_event_process -ffffffff81726230 T mpii_load_xs_sas3 -ffffffff817263d0 T mpii_load_xs -ffffffff817265c0 T mpii_req_cfg_header -ffffffff81726780 T mpii_req_cfg_page -ffffffff817269d0 T mpii_wait_ne -ffffffff81726ae0 T mpii_reset_soft -ffffffff81726d10 T mpii_reset_hard -ffffffff81726ff0 T mpii_handshake_send -ffffffff817273f0 T mpii_handshake_recv_dword -ffffffff817276a0 T mpii_handshake_recv -ffffffff81727900 T mpii_empty_done -ffffffff81727930 T mpii_push_reply -ffffffff817279b0 T mpii_poll -ffffffff81727b90 T mpii_eventack -ffffffff81727d80 T mpii_eventack_done -ffffffff81727e00 T mpii_start -ffffffff81727ed0 T mpii_event_sas -ffffffff817282e0 T mpii_eventnotify_done -ffffffff81728320 T mpii_event_raid -ffffffff81728650 T mpii_find_dev -ffffffff817286b0 T mpii_insert_dev -ffffffff81728730 T mpii_remove_dev -ffffffff817287b0 T mpii_event_discovery -ffffffff81728810 T mpii_sas_remove_device -ffffffff817289d0 T mpii_event_done -ffffffff81728a90 T mpii_wait -ffffffff81728c00 T mpii_dmamem_alloc -ffffffff81728da0 T mpii_scsi_cmd_tmo_handler -ffffffff81728f00 T mpii_put_ccb -ffffffff81728fa0 T mpii_poll_done -ffffffff81728fd0 T mpii_wait_done -ffffffff81729010 T mpii_scsi_cmd_done -ffffffff81729280 T mpii_scsi_cmd_tmo -ffffffff81729380 T mpii_scsi_cmd_tmo_done -ffffffff817293a0 T mpii_ioctl_cache -ffffffff817295f0 T mpii_ioctl_inq -ffffffff817296a0 T mpii_ioctl_vol -ffffffff81729930 T mpii_ioctl_disk -ffffffff81729b10 T mpii_find_vol -ffffffff81729b60 T mpii_bio_hs -ffffffff81729d30 T mpii_bio_disk -ffffffff81729f80 T mpii_bio_volstate -ffffffff8172a120 T mpii_refresh_sensors -ffffffff8172b000 T sili_pci_match -ffffffff8172b0a0 T sili_pci_attach -ffffffff8172b3a0 T sili_pci_detach -ffffffff8172b450 T sili_pci_activate -ffffffff8172b490 T sili_lookup -ffffffff8172c000 T aq_fw1x_reset -ffffffff8172c050 T aq1_get_mac_addr -ffffffff8172c130 T aq_fw1x_set_mode -ffffffff8172c160 T aq_fw1x_get_mode -ffffffff8172c190 T aq_fw1x_get_stats -ffffffff8172c1c0 T aq_fw2x_reset -ffffffff8172c250 T aq_fw2x_set_mode -ffffffff8172c3f0 T aq_fw2x_get_mode -ffffffff8172c580 T aq_fw2x_get_stats -ffffffff8172c5b0 T aq2_fw_reset -ffffffff8172c740 T aq2_get_mac_addr -ffffffff8172c7e0 T aq2_fw_set_mode -ffffffff8172c9f0 T aq2_fw_get_mode -ffffffff8172cac0 T aq2_fw_get_stats -ffffffff8172caf0 T aq_match -ffffffff8172cb20 T aq_attach -ffffffff8172d770 T aq_activate -ffffffff8172d7a0 T aq_lookup -ffffffff8172d820 T aq_intr -ffffffff8172d9b0 T aq_intr_link -ffffffff8172dac0 T aq1_fw_reboot -ffffffff8172dd10 T aq2_fw_reboot -ffffffff8172e160 T aq_hw_reset -ffffffff8172e2c0 T aq_init_rss -ffffffff8172e630 T aq_hw_init -ffffffff8172e940 T aq_ifmedia_change -ffffffff8172ea30 T aq_ifmedia_status -ffffffff8172eb30 T aq_ioctl -ffffffff8172ed70 T aq_start -ffffffff8172f0c0 T aq_watchdog -ffffffff8172f0f0 T aq_set_linkmode -ffffffff8172f120 T aq_refill -ffffffff8172f190 T aq_intr_queue -ffffffff8172f270 T aq_enable_intr -ffffffff8172f390 T aq1_fw_read_version -ffffffff8172f430 T aq1_mac_soft_reset -ffffffff8172f460 T aq1_fw_version_init -ffffffff8172f5e0 T aq1_hw_init_ucp -ffffffff8172f760 T aq1_mac_soft_reset_rbl -ffffffff8172fa00 T aq1_global_software_reset -ffffffff8172fb20 T aq1_mac_soft_reset_flb -ffffffff8172fed0 T aq2_interface_buffer_read -ffffffff81730010 T aq1_fw_downld_dwords -ffffffff81730330 T aq_hw_l3_filter_set -ffffffff81730540 T aq_hw_init_tx_path -ffffffff817307b0 T aq_hw_init_rx_path -ffffffff81730fc0 T aq_set_mac_addr -ffffffff817311d0 T aq_hw_qos_set -ffffffff817318c0 T aq2_filter_art_set -ffffffff81731a70 T aq_get_linkmode -ffffffff81731ae0 T aq_txring_reset -ffffffff81731e90 T aq_rxring_reset -ffffffff81732390 T aq_rx_fill -ffffffff817325a0 T aq_rxeof -ffffffff81732920 T aq_txeof -ffffffff81732b00 T aq_update_link_status -ffffffff81732ba0 T aq_free_slots -ffffffff81732c40 T aq_queue_up -ffffffff81733020 T aq_dmamem_alloc -ffffffff81733170 T aq_dmamem_free -ffffffff817331e0 T aq_queue_down -ffffffff81733490 T aq_invalidate_rx_desc_cache -ffffffff81733510 T aq_up -ffffffff81733930 T aq_down -ffffffff81733a90 T aq_rxrinfo -ffffffff81733b80 T aq_iff -ffffffff81734000 T tulip_probe -ffffffff81734060 T tulip_attach -ffffffff81734a80 T tulip_timeout_callback -ffffffff81734ad0 T tulip_timeout -ffffffff81734b40 T tulip_txprobe -ffffffff81734c80 T tulip_txput -ffffffff817351f0 T tulip_media_set -ffffffff817357f0 T tulip_reset -ffffffff81735bb0 T tulip_mii_autonegotiate -ffffffff81735eb0 T tulip_mii_readreg -ffffffff81736060 T tulip_mii_writereg -ffffffff81736220 T tulip_linkup -ffffffff817362f0 T tulip_init -ffffffff81736470 T tulip_media_print -ffffffff817364c0 T tulip_media_link_monitor -ffffffff817366f0 T tulip_mii_map_abilities -ffffffff81736780 T tulip_media_poll -ffffffff81736c60 T tulip_mii_phy_readspecific -ffffffff81736e20 T tulip_media_select -ffffffff81736f30 T tulip_21040_mediainfo_init -ffffffff81737030 T tulip_21040_media_probe -ffffffff81737120 T tulip_21040_10baset_only_media_probe -ffffffff817371e0 T tulip_21040_10baset_only_media_select -ffffffff81737240 T tulip_21040_auibnc_only_media_probe -ffffffff817372d0 T tulip_21040_auibnc_only_media_select -ffffffff81737320 T tulip_21041_mediainfo_init -ffffffff817373e0 T tulip_21041_media_probe -ffffffff817374c0 T tulip_21041_media_poll -ffffffff817377f0 T tulip_mii_get_phyaddr -ffffffff817378b0 T tulip_2114x_media_preset -ffffffff81737ad0 T tulip_null_media_poll -ffffffff81737b00 T tulip_21140_mediainit -ffffffff81737b50 T tulip_21140_evalboard_media_probe -ffffffff81737d30 T tulip_21140_accton_media_probe -ffffffff81737f50 T tulip_21140_smc9332_media_probe -ffffffff81738170 T tulip_21140_cogent_em100_media_probe -ffffffff817382e0 T tulip_21140_znyx_zx34x_media_probe -ffffffff81738530 T tulip_2114x_media_probe -ffffffff81738560 T tulip_delay_300ns -ffffffff81738670 T tulip_srom_idle -ffffffff81739010 T tulip_srom_read -ffffffff81739db0 T tulip_mii_writebits -ffffffff8173a340 T tulip_mii_turnaround -ffffffff8173ab10 T tulip_mii_readbits -ffffffff8173aef0 T tulip_identify_dec_nic -ffffffff8173afa0 T tulip_identify_znyx_nic -ffffffff8173b2a0 T tulip_identify_smc_nic -ffffffff8173b470 T tulip_identify_cogent_nic -ffffffff8173b560 T tulip_identify_accton_nic -ffffffff8173b690 T tulip_identify_asante_nic -ffffffff8173b960 T tulip_identify_compex_nic -ffffffff8173bab0 T tulip_srom_decode -ffffffff8173c6e0 T tulip_read_macaddr -ffffffff8173d050 T tulip_ifmedia_add -ffffffff8173d140 T tulip_ifmedia_change -ffffffff8173d320 T tulip_ifmedia_status -ffffffff8173d390 T tulip_alloc_rxmap -ffffffff8173d3d0 T tulip_free_rxmap -ffffffff8173d410 T tulip_alloc_txmap -ffffffff8173d450 T tulip_free_txmap -ffffffff8173d490 T tulip_addr_filter -ffffffff8173d7e0 T tulip_rx_intr -ffffffff8173de00 T tulip_txput_setup -ffffffff8173e0b0 T tulip_tx_intr -ffffffff8173e4b0 T tulip_print_abnormal_interrupt -ffffffff8173e4e0 T tulip_intr_handler -ffffffff8173e870 T tulip_ifstart -ffffffff8173e940 T tulip_intr_shared -ffffffff8173e9b0 T tulip_intr_normal -ffffffff8173ea00 T tulip_ifioctl -ffffffff8173eb00 T tulip_ifwatchdog -ffffffff8173ec00 T tulip_busdma_allocmem -ffffffff8173ed90 T tulip_busdma_init -ffffffff8173efb0 T tulip_initcsrs -ffffffff8173f0b0 T tulip_initring -ffffffff81740000 T ep_pci_match -ffffffff81740030 T ep_pci_attach -ffffffff81741000 T pcn_match -ffffffff81741070 T pcn_attach -ffffffff817417c0 T pcn_tick -ffffffff81741810 T pcn_reset -ffffffff81741880 T pcn_intr -ffffffff81741af0 T pcn_ioctl -ffffffff81741c50 T pcn_start -ffffffff817420a0 T pcn_watchdog -ffffffff81742110 T pcn_txintr -ffffffff817425a0 T pcn_init -ffffffff81742e40 T pcn_stop -ffffffff81742fc0 T pcn_rxintr -ffffffff817434d0 T pcn_spnd -ffffffff817435d0 T pcn_add_rxbuf -ffffffff817437c0 T pcn_rxdrain -ffffffff81743860 T pcn_set_filter -ffffffff817439c0 T pcn_79c970_mediainit -ffffffff81743ad0 T pcn_79c970_mediachange -ffffffff81743c60 T pcn_79c970_mediastatus -ffffffff81743ca0 T pcn_79c971_mediainit -ffffffff81743d70 T pcn_mii_readreg -ffffffff81743e30 T pcn_mii_writereg -ffffffff81743ed0 T pcn_mii_statchg -ffffffff81743f30 T pcn_79c971_mediachange -ffffffff81743f80 T pcn_79c971_mediastatus -ffffffff81744000 T siop_lookup_product -ffffffff817440a0 T siop_pci_attach_common -ffffffff81744520 T siop_pci_reset -ffffffff81745000 T siop_pci_match -ffffffff81745050 T siop_pci_attach -ffffffff81746000 T sii3114_read_reg -ffffffff81746060 T sii3114_write_reg -ffffffff817460d0 T pdc203xx_read_reg -ffffffff81746130 T pdc203xx_write_reg -ffffffff817461a0 T svwsata_read_reg -ffffffff81746210 T svwsata_write_reg -ffffffff81746260 T svwsata_lba48_write_reg -ffffffff817462b0 T pciide_pci_read -ffffffff81746300 T pciide_pci_write -ffffffff81746370 T default_chip_map -ffffffff817469d0 T artisea_chip_map -ffffffff81746c70 T piix_chip_map -ffffffff817472b0 T piixsata_chip_map -ffffffff817477f0 T sch_chip_map -ffffffff81747b50 T amd756_chip_map -ffffffff81747fb0 T ixp_chip_map -ffffffff81748360 T cmd_chip_map -ffffffff817484c0 T cmd0643_9_chip_map -ffffffff817487b0 T cmd680_chip_map -ffffffff81748990 T sii3112_chip_map -ffffffff81748d20 T sii3114_chip_map -ffffffff81749260 T apollo_chip_map -ffffffff81749900 T sata_chip_map -ffffffff81749b20 T cy693_chip_map -ffffffff81749ef0 T sis_chip_map -ffffffff8174a690 T natsemi_chip_map -ffffffff8174ab30 T ns_scx200_chip_map -ffffffff8174af00 T acer_chip_map -ffffffff8174b5c0 T hpt_chip_map -ffffffff8174bae0 T pdc202xx_chip_map -ffffffff8174c4e0 T pdcsata_chip_map -ffffffff8174cca0 T acard_chip_map -ffffffff8174cf30 T serverworks_chip_map -ffffffff8174d280 T svwsata_chip_map -ffffffff8174d650 T nforce_chip_map -ffffffff8174dac0 T ite_chip_map -ffffffff8174dd80 T jmicron_chip_map -ffffffff8174e190 T phison_chip_map -ffffffff8174e4f0 T rdc_chip_map -ffffffff8174e980 T pciide_match -ffffffff8174ea20 T pciide_attach -ffffffff8174eb00 T pciide_detach -ffffffff8174eb60 T pciide_activate -ffffffff8174f290 T pciide_lookup_product -ffffffff8174f540 T pciide_dmacmd_read -ffffffff8174f570 T pciide_dmacmd_write -ffffffff8174f5a0 T pciide_dmactl_read -ffffffff8174f5d0 T pciide_dmactl_write -ffffffff8174f600 T pciide_dmatbl_write -ffffffff8174f630 T pciide_mapregs_compat -ffffffff8174f7b0 T pciide_unmapregs_compat -ffffffff8174f840 T pciide_mapregs_native -ffffffff8174fb30 T pciide_unmapregs_native -ffffffff8174fbc0 T pciide_mapreg_dma -ffffffff8174fd50 T pciide_dma_init -ffffffff8174fff0 T pciide_dma_start -ffffffff81750070 T pciide_dma_finish -ffffffff81750240 T pciide_unmapreg_dma -ffffffff81750270 T pciide_intr_flag -ffffffff81750480 T pciide_compat_intr -ffffffff81750500 T pciide_pci_intr -ffffffff817505c0 T pciide_channel_dma_setup -ffffffff81750690 T pciide_dma_table_setup -ffffffff817508e0 T pciide_irqack -ffffffff81750930 T pciide_chansetup -ffffffff81750a10 T pciide_chanfree -ffffffff81750a60 T pciide_mapchan -ffffffff81750af0 T pciide_unmap_chan -ffffffff81750bc0 T pciide_chan_candisable -ffffffff81750c30 T pciide_map_compat_intr -ffffffff81750ce0 T pciide_unmap_compat_intr -ffffffff81750d40 T pciide_print_channels -ffffffff81750e10 T pciide_print_modes -ffffffff81750e20 T default_chip_unmap -ffffffff81750f00 T sata_setup_channel -ffffffff81751020 T piix_timing_debug -ffffffff81751050 T piix_setup_channel -ffffffff81751540 T piix3_4_setup_channel -ffffffff81751d40 T piix_setup_idetim_timings -ffffffff81751db0 T piix_setup_idetim_drvs -ffffffff81751ec0 T piix_setup_sidetim_timings -ffffffff81751f30 T amd756_setup_channel -ffffffff817522e0 T apollo_setup_channel -ffffffff81752630 T cmd_channel_map -ffffffff81752970 T cmd_pci_intr -ffffffff81752a80 T cmd646_9_irqack -ffffffff81752b80 T cmd0643_9_setup_channel -ffffffff81752fb0 T cmd680_setup_channel -ffffffff817534a0 T cmd680_channel_map -ffffffff817537a0 T sii_fixup_cacheline -ffffffff81753a70 T sii3112_setup_channel -ffffffff81753c30 T sii3112_drv_probe -ffffffff81753f80 T sii3114_mapreg_dma -ffffffff81754240 T sii3114_chansetup -ffffffff81754300 T sii3114_mapchan -ffffffff817545f0 T sii3114_dmacmd_read -ffffffff81754630 T sii3114_dmacmd_write -ffffffff81754670 T sii3114_dmactl_read -ffffffff817546b0 T sii3114_dmactl_write -ffffffff817546f0 T sii3114_dmatbl_write -ffffffff81754730 T cy693_setup_channel -ffffffff81754950 T sis_hostbr_match -ffffffff81754a20 T sis_south_match -ffffffff81754a60 T sis_setup_channel -ffffffff81754db0 T sis96x_setup_channel -ffffffff81755060 T natsemi_irqack -ffffffff817550f0 T natsemi_setup_channel -ffffffff817554e0 T natsemi_pci_intr -ffffffff817555d0 T ns_scx200_setup_channel -ffffffff817558b0 T acer_dma_init -ffffffff817558f0 T acer_setup_channel -ffffffff81755d00 T acer_pci_intr -ffffffff81755de0 T hpt_setup_channel -ffffffff81756130 T hpt_pci_intr -ffffffff81756240 T pdc268_config_read -ffffffff817562b0 T pdc20268_setup_channel -ffffffff81756480 T pdc202xx_setup_channel -ffffffff817568d0 T pdc20262_dma_start -ffffffff81756a30 T pdc20262_dma_finish -ffffffff81756b00 T pdc20265_pci_intr -ffffffff81756cb0 T pdc202xx_pci_intr -ffffffff81756dc0 T pdc203xx_pci_intr -ffffffff81756eb0 T pdc205xx_pci_intr -ffffffff81756fe0 T pdc203xx_irqack -ffffffff81757070 T pdc203xx_setup_channel -ffffffff81757170 T pdc205xx_do_reset -ffffffff81757210 T pdc205xx_drv_probe -ffffffff81757490 T pdc203xx_dma_start -ffffffff81757550 T pdc203xx_dma_finish -ffffffff81757640 T serverworks_setup_channel -ffffffff81757a50 T serverworks_pci_intr -ffffffff81757b60 T svwsata_mapreg_dma -ffffffff81757c10 T svwsata_drv_probe -ffffffff81757ee0 T svwsata_mapchan -ffffffff81757fd0 T svwsata_dmacmd_read -ffffffff81758000 T svwsata_dmacmd_write -ffffffff81758030 T svwsata_dmactl_read -ffffffff81758060 T svwsata_dmactl_write -ffffffff81758090 T svwsata_dmatbl_write -ffffffff817580c0 T acard_setup_channel -ffffffff817584f0 T nforce_setup_channel -ffffffff81758830 T nforce_pci_intr -ffffffff81758920 T ite_setup_channel -ffffffff81758c80 T ixp_setup_channel -ffffffff81759030 T jmicron_setup_channel -ffffffff81759290 T phison_setup_channel -ffffffff817594a0 T sch_setup_channel -ffffffff817596a0 T rdc_setup_channel -ffffffff81759ac0 t ba5_read_4_ind -ffffffff81759b50 t ba5_write_4_ind -ffffffff8175a000 T ppbmatch -ffffffff8175a050 T ppbattach -ffffffff8175a7d0 T ppbdetach -ffffffff8175a8f0 T ppbactivate -ffffffff8175ad60 T ppb_alloc_busrange -ffffffff8175af10 T ppb_hotplug_insert -ffffffff8175af70 T ppb_hotplug_rescan -ffffffff8175afb0 T ppb_hotplug_remove -ffffffff8175b110 T ppb_hotplug_insert_finish -ffffffff8175b140 T ppb_intr -ffffffff8175b200 T ppb_alloc_resources -ffffffff8175b8f0 T ppbprint -ffffffff8175c000 T cy_pci_match -ffffffff8175c030 T cy_pci_attach -ffffffff8175d000 T rl_pci_match -ffffffff8175d060 T rl_pci_attach -ffffffff8175d220 T rl_pci_detach -ffffffff8175e000 T re_pci_probe -ffffffff8175e0a0 T re_pci_attach -ffffffff8175e3d0 T re_pci_detach -ffffffff8175e440 T re_pci_activate -ffffffff8175f000 T vr_probe -ffffffff8175f0d0 T vr_attach -ffffffff8175f6a0 T vr_activate -ffffffff8175f720 T vr_mii_readreg -ffffffff8175f880 T vr_mii_writereg -ffffffff8175f9d0 T vr_miibus_readreg -ffffffff8175fa40 T vr_miibus_writereg -ffffffff8175fab0 T vr_miibus_statchg -ffffffff8175fad0 T vr_setcfg -ffffffff8175fcf0 T vr_iff -ffffffff8175fe70 T vr_reset -ffffffff8175ff80 T vr_quirks -ffffffff81760080 T vr_dmamem_alloc -ffffffff817601e0 T vr_dmamem_free -ffffffff81760250 T vr_intr -ffffffff81760480 T vr_chipinit -ffffffff81760560 T vr_ioctl -ffffffff81760700 T vr_start -ffffffff817608d0 T vr_watchdog -ffffffff81760960 T vr_wol -ffffffff81760b10 T vr_ifmedia_upd -ffffffff81760b60 T vr_ifmedia_sts -ffffffff81760bc0 T vr_tick -ffffffff81760c40 T vr_rxtick -ffffffff81760d20 T vr_stop -ffffffff81760fb0 T vr_init -ffffffff81761560 T vr_list_tx_init -ffffffff81761660 T vr_list_rx_init -ffffffff81761820 T vr_fill_rx_ring -ffffffff817618e0 T vr_alloc_mbuf -ffffffff81761a50 T vr_rxeof -ffffffff81761ce0 T vr_rxeoc -ffffffff81761e70 T vr_txeof -ffffffff81762030 T vr_encap -ffffffff81763000 T txp_probe -ffffffff81763030 T txp_attach -ffffffff817631a0 T txp_attachhook -ffffffff817634d0 T txp_chip_init -ffffffff81763690 T txp_download_fw -ffffffff81763b10 T txp_alloc_rings -ffffffff81764680 T txp_command -ffffffff81764750 T txp_ifmedia_upd -ffffffff81764860 T txp_ifmedia_sts -ffffffff81764b20 T txp_ioctl -ffffffff81764c40 T txp_start -ffffffff81765000 T txp_watchdog -ffffffff81765030 T txp_capabilities -ffffffff817651e0 T txp_tick -ffffffff81765330 T txp_intr -ffffffff817655a0 T txp_reset_adapter -ffffffff817656a0 T txp_download_fw_wait -ffffffff81765790 T txp_download_fw_section -ffffffff81765b00 T txp_dma_malloc -ffffffff81765ca0 T txp_dma_free -ffffffff81765d20 T txp_rx_reclaim -ffffffff81765ff0 T txp_rxbuf_reclaim -ffffffff81766270 T txp_tx_reclaim -ffffffff81766410 T txp_init -ffffffff81766550 T txp_stop -ffffffff81766650 T txp_set_filter -ffffffff817667e0 T txp_command2 -ffffffff81766ae0 T txp_cmd_desc_numfree -ffffffff81766b40 T txp_response -ffffffff81766e10 T txp_rsp_fixup -ffffffff81766ef0 T txp_show_descriptor -ffffffff81768000 T init_audio_devices -ffffffff81768120 T init_BTSC -ffffffff817681e0 T set_audio -ffffffff81768570 T set_bctv_audio -ffffffff817688b0 T msp_autodetect -ffffffff81768ce0 T temp_mute -ffffffff81768d80 T set_BTSC -ffffffff81768da0 T bctv_gpio_write -ffffffff81768f10 T msp_read_id -ffffffff81768fd0 T dpl_read_id -ffffffff81769090 T dpl_autodetect -ffffffff8176a000 T writeEEProm -ffffffff8176a030 T readEEProm -ffffffff8176a100 T signCard -ffffffff8176a1b0 T probeCard -ffffffff8176c000 T bktr_name -ffffffff8176c030 T common_bktr_attach -ffffffff8176c330 t oformat_meteor_to_bt -ffffffff8176c440 T common_bktr_intr -ffffffff8176ca60 T video_open -ffffffff8176cf10 t set_fps -ffffffff8176d050 T vbi_open -ffffffff8176d0f0 T tuner_open -ffffffff8176d140 T video_close -ffffffff8176d230 T tuner_close -ffffffff8176d260 T vbi_close -ffffffff8176d290 T video_read -ffffffff8176d450 t start_capture -ffffffff817701f0 T vbi_read -ffffffff81770310 T video_ioctl -ffffffff81771710 T bktr_common_ioctl -ffffffff81771ee0 T tuner_ioctl -ffffffff81772c00 t remote_read -ffffffff81772da0 T i2cWrite -ffffffff81772ec0 T i2cRead -ffffffff81772fe0 T msp_dpl_read -ffffffff817732a0 T msp_dpl_write -ffffffff81773460 T msp_dpl_reset -ffffffff81773760 t i2c_write_byte -ffffffff81773940 t i2c_read_byte -ffffffff81773b60 t split -ffffffff81773d90 t getline -ffffffff81774000 t bktr_probe -ffffffff81774060 t bktr_attach -ffffffff817742e0 T bktr_get_info -ffffffff817743c0 T bktr_set_info -ffffffff81774520 T get_bktr_mem -ffffffff81774750 T free_bktr_mem -ffffffff817747b0 T bktropen -ffffffff81774870 T bktrclose -ffffffff817748f0 T bktrread -ffffffff81774980 T bktrwrite -ffffffff817749b0 T bktrioctl -ffffffff81774a50 T bktrmmap -ffffffff81774af0 t bktr_intr -ffffffff81775000 T select_tuner -ffffffff81775050 T tv_freq -ffffffff817752a0 T do_afc -ffffffff817753d0 T get_tuner_status -ffffffff817753f0 T tv_channel -ffffffff817754b0 T tuner_getchnlset -ffffffff81776000 T xl_pci_match -ffffffff81776030 T xl_pci_attach -ffffffff81776380 T xl_pci_detach -ffffffff81776410 T xl_pci_wol_power -ffffffff81776460 T xl_pci_intr_ack -ffffffff81777000 T fxp_pci_match -ffffffff81777030 T fxp_pci_attach -ffffffff81777350 T fxp_pci_detach -ffffffff81778000 T em_probe -ffffffff81778030 T em_attach -ffffffff81778530 T em_detach -ffffffff817785c0 T em_activate -ffffffff81778640 T em_defer_attach -ffffffff817786e0 T em_stop -ffffffff817787d0 T em_free_pci_resources -ffffffff81778a90 T em_setup_interface -ffffffff81778c80 T em_update_link_status -ffffffff81778e90 T em_local_timer -ffffffff81778f40 T em_82547_move_tail -ffffffff81778f80 T em_identify_hardware -ffffffff81779090 T em_allocate_pci_resources -ffffffff81779490 T em_allocate_desc_rings -ffffffff817795a0 T em_hardware_init -ffffffff81779850 T em_kstat_attach -ffffffff817799a0 T em_start -ffffffff81779c90 T em_encap -ffffffff8177a140 T em_82547_move_tail_locked -ffffffff8177a370 T em_82547_update_fifo_head -ffffffff8177a3c0 T em_ioctl -ffffffff8177a690 T em_init -ffffffff8177aa00 T em_get_sffpage -ffffffff8177aac0 T em_disable_intr -ffffffff8177abc0 T em_iff -ffffffff8177aed0 T em_initialize_receive_unit -ffffffff8177b650 T em_enable_intr -ffffffff8177b7b0 T em_watchdog -ffffffff8177b960 T em_enable_hw_vlans -ffffffff8177ba00 T em_setup_transmit_structures -ffffffff8177bc00 T em_initialize_transmit_unit -ffffffff8177c260 T em_setup_receive_structures -ffffffff8177c3a0 T em_setup_queues_msix -ffffffff8177ca10 T em_intr -ffffffff8177cb10 T em_txeof -ffffffff8177cce0 T em_rxeof -ffffffff8177d170 T em_rxrefill_locked -ffffffff8177d280 T em_media_status -ffffffff8177d4a0 T em_flowstatus -ffffffff8177d5a0 T em_media_change -ffffffff8177d700 T em_tso_setup -ffffffff8177d8b0 T em_tx_ctx_setup -ffffffff8177da20 T em_transmit_checksum_setup -ffffffff8177db00 T em_fill_descriptors -ffffffff8177db80 T em_82547_fifo_workaround -ffffffff8177dbf0 T em_82547_tx_fifo_reset -ffffffff8177e050 T em_pci_clear_mwi -ffffffff8177e080 T em_pci_set_mwi -ffffffff8177e0b0 T em_smartspeed -ffffffff8177e2a0 T em_kstat_read -ffffffff8177e6e0 T em_flush_desc_rings -ffffffff8177e810 T em_free_transmit_structures -ffffffff8177e9e0 T em_free_receive_structures -ffffffff8177ebe0 T em_legacy_irq_quirk_spt -ffffffff8177ecc0 T em_rxrefill -ffffffff8177ed00 T em_allocate_msix -ffffffff8177ef10 T em_allocate_legacy -ffffffff8177f030 T em_dma_free -ffffffff8177f0a0 T em_disable_aspm -ffffffff8177f170 T em_dma_malloc -ffffffff8177f300 T em_allocate_transmit_structures -ffffffff8177f3f0 T em_get_buf -ffffffff8177f550 T em_allocate_receive_structures -ffffffff8177f720 T em_rxfill -ffffffff8177f850 T em_tbi_adjust_stats -ffffffff8177fa20 T em_receive_checksum -ffffffff8177fa90 T em_write_pci_cfg -ffffffff8177fb00 T em_read_pci_cfg -ffffffff8177fb70 T em_read_pcie_cap_reg -ffffffff8177fba0 T em_flush_tx_ring -ffffffff8177fd10 T em_flush_rx_ring -ffffffff8177fed0 T em_queue_intr_msix -ffffffff8177ff80 T em_link_intr_msix -ffffffff817800b0 T em_enable_queue_intr_msix -ffffffff81781000 T em_set_mac_type -ffffffff81781a20 T em_set_sfp_media_type_82575 -ffffffff81781d70 T em_translate_82542_register -ffffffff81781fa0 T em_read_sfp_data_byte -ffffffff81782090 T em_set_media_type -ffffffff81782300 T em_reset_hw -ffffffff81782eb0 T em_disable_pciex_master -ffffffff81782f80 T em_check_phy_reset_block -ffffffff81783040 T em_gate_hw_phy_config_ich8lan -ffffffff817830e0 t em_get_software_flag -ffffffff81783260 T em_hv_phy_workarounds_ich8lan -ffffffff817835f0 T em_lv_phy_workarounds_ich8lan -ffffffff817836f0 t em_phy_init_script -ffffffff81783950 T em_read_eeprom -ffffffff81783fc0 T em_set_eee_i350 -ffffffff817840e0 T em_init_hw -ffffffff81785b20 T em_phy_reset -ffffffff81785d10 T em_clear_vfta_i350 -ffffffff81785ef0 T em_read_phy_reg -ffffffff817860a0 T em_setup_link -ffffffff81788340 T em_enable_tx_pkt_filtering -ffffffff81788700 T em_clear_hw_cntrs -ffffffff81788ff0 T em_write_phy_reg -ffffffff81789170 T em_power_up_serdes_link_82575 -ffffffff81789260 T em_copper_link_autoneg -ffffffff81789390 T em_phy_setup_autoneg -ffffffff817894f0 T em_copper_link_postconfig -ffffffff817895c0 T em_config_collision_dist -ffffffff81789650 t em_config_mac_to_phy -ffffffff817897c0 t em_config_fc_after_link_up -ffffffff81789a10 t em_config_dsp_after_link_change -ffffffff8178a3b0 T em_force_mac_fc -ffffffff8178a480 T em_check_for_link -ffffffff8178ab00 T em_get_pcs_speed_and_duplex_82575 -ffffffff8178abc0 T em_k1_gig_workaround_hv -ffffffff8178acf0 T em_link_stall_workaround_hv -ffffffff8178add0 T em_k1_workaround_lv -ffffffff8178ae90 T em_k1_workaround_lpt_lp -ffffffff8178b150 t em_check_downshift -ffffffff8178b200 T em_set_eee_pchlan -ffffffff8178b2a0 t em_polarity_reversal_workaround -ffffffff8178b4e0 T em_get_speed_and_duplex -ffffffff8178b990 T em_access_phy_wakeup_reg_bm -ffffffff8178baf0 t em_write_phy_reg_ex -ffffffff8178bd60 t em_read_phy_reg_ex -ffffffff8178c210 T em_access_phy_debug_regs_hv -ffffffff8178c2e0 T em_access_phy_reg_hv -ffffffff8178c450 t em_swfw_sync_acquire -ffffffff8178c600 t em_swfw_sync_release -ffffffff8178c770 T em_sgmii_uses_mdio_82575 -ffffffff8178c7d0 T em_read_phy_reg_i2c -ffffffff8178c8b0 T em_write_phy_reg_i2c -ffffffff8178c980 T em_phy_hw_reset -ffffffff8178cf90 T em_oem_bits_config_pchlan -ffffffff8178d100 T em_initialize_M88E1512_phy -ffffffff8178d2c0 T em_init_eeprom_params -ffffffff8178d7d0 T em_get_flash_presence_i210 -ffffffff8178d830 t em_acquire_eeprom -ffffffff8178da20 t em_read_eeprom_ich8 -ffffffff8178dbf0 t em_release_eeprom -ffffffff8178dd60 t em_standby_eeprom -ffffffff8178df50 t em_shift_out_ee_bits -ffffffff8178e0f0 t em_shift_in_ee_bits -ffffffff8178e230 T em_validate_eeprom_checksum -ffffffff8178e3d0 T em_write_eeprom -ffffffff8178e6f0 T em_update_eeprom_checksum -ffffffff8178e810 t em_commit_shadow_ram -ffffffff8178ed70 t em_write_eeprom_microwire -ffffffff8178eef0 t em_write_eeprom_spi -ffffffff8178f0b0 T em_read_part_num -ffffffff8178f150 T em_read_mac_addr -ffffffff8178f2d0 T em_mc_addr_list_update -ffffffff8178f3e0 T em_hash_mc_addr -ffffffff8178f4e0 T em_mta_set -ffffffff8178f650 T em_rar_set -ffffffff8178f780 T em_get_bus_info -ffffffff8178f910 T em_check_mng_mode -ffffffff8178f990 T em_valid_nvm_bank_detect_ich8lan -ffffffff8178fb40 T em_read_eeprom_spt -ffffffff8178fe00 t em_release_software_flag -ffffffff8178feb0 T em_read_ich8_data32 -ffffffff81790020 t em_ich8_cycle_init -ffffffff817901c0 t em_ich8_flash_cycle -ffffffff81790310 T em_configure_k1_ich8lan -ffffffff81790530 t em_toggle_lanphypc_pch_lpt -ffffffff81790690 t em_copper_link_ggp_setup -ffffffff81790940 t em_copper_link_82580_setup -ffffffff817909d0 t em_copper_link_rtl8211_setup -ffffffff81790c60 t em_phy_reset_dsp -ffffffff81790ce0 t em_get_hw_eeprom_semaphore -ffffffff81790e50 t em_shift_out_mdi_bits -ffffffff81790fe0 t em_erase_ich8_4k_segment -ffffffff81791220 t em_write_ich8_byte -ffffffff81791390 t em_read_ich8_data -ffffffff81792000 T em_lookup_gcu -ffffffff81792030 T em_attach_miibus -ffffffff81792060 T gcu_miibus_readreg -ffffffff817921d0 T gcu_miibus_writereg -ffffffff81792320 T gcu_miibus_statchg -ffffffff81793000 T ixgb_probe -ffffffff81793030 T ixgb_attach -ffffffff81793470 T ixgb_local_timer -ffffffff81793520 T ixgb_identify_hardware -ffffffff81793620 T ixgb_allocate_pci_resources -ffffffff817937b0 T ixgb_dma_malloc -ffffffff817939b0 T ixgb_hardware_init -ffffffff81793a70 T ixgb_setup_interface -ffffffff81793ba0 T ixgb_update_stats_counters -ffffffff817944a0 T ixgb_update_link_status -ffffffff81794520 T ixgb_dma_free -ffffffff817945d0 T ixgb_free_pci_resources -ffffffff81794660 T ixgb_start -ffffffff81794890 T ixgb_encap -ffffffff81794a80 T ixgb_ioctl -ffffffff81794d20 T ixgb_init -ffffffff817951c0 T ixgb_set_promisc -ffffffff81795240 T ixgb_stop -ffffffff817952c0 T ixgb_disable_intr -ffffffff817952f0 T ixgb_set_multi -ffffffff81795400 T ixgb_enable_intr -ffffffff81795450 T ixgb_watchdog -ffffffff817954e0 T ixgb_enable_hw_vlans -ffffffff81795530 T ixgb_setup_transmit_structures -ffffffff817956a0 T ixgb_initialize_transmit_unit -ffffffff81795810 T ixgb_setup_receive_structures -ffffffff81795890 T ixgb_initialize_receive_unit -ffffffff81795b20 T ixgb_intr -ffffffff81795d20 T ixgb_rxeof -ffffffff81796160 T ixgb_txeof -ffffffff81796340 T ixgb_media_status -ffffffff81796430 T ixgb_media_change -ffffffff81796480 T ixgb_free_transmit_structures -ffffffff817965b0 T ixgb_free_receive_structures -ffffffff817966e0 T ixgb_allocate_transmit_structures -ffffffff81796760 T ixgb_transmit_checksum_setup -ffffffff81796860 T ixgb_get_buf -ffffffff81796a10 T ixgb_allocate_receive_structures -ffffffff81796b90 T ixgb_receive_checksum -ffffffff81796bf0 T ixgb_write_pci_cfg -ffffffff81797000 T ixgb_validate_eeprom_checksum -ffffffff81797080 T ixgb_read_eeprom -ffffffff817972f0 T ixgb_update_eeprom_checksum -ffffffff81797350 T ixgb_write_eeprom -ffffffff81797830 t ixgb_shift_out_bits -ffffffff81797970 T ixgb_get_eeprom_data -ffffffff81797a10 T ixgb_get_eeprom_word -ffffffff81797ae0 T ixgb_get_ee_mac_addr -ffffffff81797be0 T ixgb_get_ee_pba_number -ffffffff81797ca0 T ixgb_get_ee_device_id -ffffffff81798000 T ixgb_mac_reset -ffffffff817981e0 T ixgb_adapter_stop -ffffffff81798320 T ixgb_init_hw -ffffffff81798620 T ixgb_init_rx_addrs -ffffffff81798750 T mac_addr_valid -ffffffff817987b0 T ixgb_clear_vfta -ffffffff81798830 T ixgb_clear_hw_cntrs -ffffffff81798f10 T ixgb_setup_fc -ffffffff817990a0 T ixgb_check_for_link -ffffffff817992b0 T ixgb_rar_set -ffffffff81799320 T ixgb_mc_addr_list_update -ffffffff817995a0 T ixgb_write_vfta -ffffffff817995d0 T ixgb_read_phy_reg -ffffffff81799ad0 T ixgb_write_phy_reg -ffffffff81799fc0 T ixgb_check_for_bad_link -ffffffff8179a080 T ixgb_led_on -ffffffff8179a0d0 T ixgb_led_off -ffffffff8179b000 T ixgbe_probe -ffffffff8179b030 T ixgbe_attach -ffffffff8179b580 T ixgbe_detach -ffffffff8179b790 T ixgbe_activate -ffffffff8179b8a0 T ixgbe_identify_hardware -ffffffff8179b960 T ixgbe_allocate_pci_resources -ffffffff8179bab0 T ixgbe_allocate_queues -ffffffff8179bfb0 T ixgbe_allocate_msix -ffffffff8179c1e0 T ixgbe_allocate_legacy -ffffffff8179c300 T ixgbe_setup_interface -ffffffff8179c660 T ixgbe_free_transmit_structures -ffffffff8179c6e0 T ixgbe_free_receive_structures -ffffffff8179c7a0 T ixgbe_free_pci_resources -ffffffff8179c880 T ixgbe_stop -ffffffff8179cb80 T ixgbe_init -ffffffff8179d760 T ixgbe_start -ffffffff8179d940 T ixgbe_encap -ffffffff8179dd90 T ixgbe_ioctl -ffffffff8179e0d0 T ixgbe_rxrinfo -ffffffff8179e230 T ixgbe_get_sffpage -ffffffff8179e3e0 T ixgbe_disable_intr -ffffffff8179e4b0 T ixgbe_iff -ffffffff8179e620 T ixgbe_enable_intr -ffffffff8179e730 T ixgbe_enable_queues -ffffffff8179e840 T ixgbe_watchdog -ffffffff8179ea50 T ixgbe_setup_transmit_structures -ffffffff8179eb20 T ixgbe_initialize_transmit_units -ffffffff8179edf0 T ixgbe_setup_receive_structures -ffffffff8179ef20 T ixgbe_initialize_receive_units -ffffffff8179f400 T ixgbe_config_gpie -ffffffff8179f4d0 T ixgbe_setup_vlan_hw_support -ffffffff8179f640 T ixgbe_configure_ivars -ffffffff8179f7f0 T ixgbe_set_ivar -ffffffff8179f9a0 T ixgbe_config_link -ffffffff8179fb40 T ixgbe_config_delay_values -ffffffff8179fc60 t ix_kstats_tick -ffffffff8179fd20 T ixgbe_enable_queue -ffffffff8179fdf0 T ixgbe_disable_queue -ffffffff8179fec0 T ixgbe_link_intr -ffffffff8179fed0 T ixgbe_intr -ffffffff817a03a0 T ixgbe_queue_intr -ffffffff817a04f0 T ixgbe_rxeof -ffffffff817a0890 T ixgbe_txeof -ffffffff817a0a20 T ixgbe_rxrefill -ffffffff817a0ae0 T ixgbe_legacy_intr -ffffffff817a0c90 T ixgbe_update_link_status -ffffffff817a0dd0 T ixgbe_handle_mod -ffffffff817a0ef0 T ixgbe_handle_msf -ffffffff817a0fc0 T ixgbe_handle_phy -ffffffff817a1050 T ixgbe_media_status -ffffffff817a1260 T ixgbe_media_change -ffffffff817a1310 T ixgbe_mc_array_itr -ffffffff817a1350 T ixgbe_setup_msix -ffffffff817a13e0 T ixgbe_add_media_types -ffffffff817a1680 T ixgbe_dma_malloc -ffffffff817a1880 T ixgbe_dma_free -ffffffff817a1930 T ixgbe_allocate_transmit_buffers -ffffffff817a1a50 T ixgbe_setup_transmit_ring -ffffffff817a1ba0 T ixgbe_free_transmit_buffers -ffffffff817a1cd0 T ixgbe_get_buf -ffffffff817a1e20 T ixgbe_allocate_receive_buffers -ffffffff817a1f60 T ixgbe_setup_receive_ring -ffffffff817a2040 T ixgbe_rxfill -ffffffff817a2180 T ixgbe_initialize_rss_mapping -ffffffff817a23f0 T ixgbe_map_queue_statistics -ffffffff817a2510 T ixgbe_free_receive_buffers -ffffffff817a2630 T ixgbe_rx_offload -ffffffff817a2800 T ixgbe_read_pci_cfg -ffffffff817a2860 T ixgbe_write_pci_cfg -ffffffff817a28e0 t ix_kstats_read -ffffffff817a2aa0 t ix_rxq_kstats_read -ffffffff817a2c00 t ix_txq_kstats_read -ffffffff817a3000 T ixgbe_init_ops_generic -ffffffff817a3270 T ixgbe_init_eeprom_params_generic -ffffffff817a3320 T ixgbe_read_eerd_generic -ffffffff817a3420 T ixgbe_read_eeprom_bit_bang_generic -ffffffff817a36c0 T ixgbe_write_eeprom_generic -ffffffff817a3b10 T ixgbe_validate_eeprom_checksum_generic -ffffffff817a3bc0 T ixgbe_update_eeprom_checksum_generic -ffffffff817a3c40 T ixgbe_calc_eeprom_checksum_generic -ffffffff817a3de0 T ixgbe_init_hw_generic -ffffffff817a3e40 T ixgbe_start_hw_generic -ffffffff817a3f60 T ixgbe_clear_hw_cntrs_generic -ffffffff817a4940 T ixgbe_enable_rx_dma_generic -ffffffff817a49a0 T ixgbe_get_mac_addr_generic -ffffffff817a4a30 T ixgbe_stop_adapter_generic -ffffffff817a4bb0 T ixgbe_get_bus_info_generic -ffffffff817a4c60 T ixgbe_set_lan_id_multi_port_pcie -ffffffff817a4d30 T ixgbe_acquire_swfw_sync -ffffffff817a4f60 T ixgbe_release_swfw_sync -ffffffff817a5010 T prot_autoc_read_generic -ffffffff817a5070 T prot_autoc_write_generic -ffffffff817a50c0 T ixgbe_led_on_generic -ffffffff817a5180 T ixgbe_led_off_generic -ffffffff817a5230 T ixgbe_blink_led_start_generic -ffffffff817a53a0 T ixgbe_blink_led_stop_generic -ffffffff817a54c0 T ixgbe_set_rar_generic -ffffffff817a55e0 T ixgbe_clear_rar_generic -ffffffff817a56e0 T ixgbe_init_rx_addrs_generic -ffffffff817a58e0 T ixgbe_update_mc_addr_list_generic -ffffffff817a5ae0 T ixgbe_enable_mc_generic -ffffffff817a5b50 T ixgbe_disable_mc_generic -ffffffff817a5bb0 T ixgbe_enable_rx_generic -ffffffff817a5c70 T ixgbe_disable_rx_generic -ffffffff817a5d50 T ixgbe_fc_enable_generic -ffffffff817a6180 T ixgbe_setup_fc_generic -ffffffff817a6450 T ixgbe_fc_autoneg -ffffffff817a6730 T ixgbe_device_supports_autoneg_fc -ffffffff817a6820 T ixgbe_start_hw_gen2 -ffffffff817a6a00 T ixgbe_identify_phy -ffffffff817a6a60 T ixgbe_set_pci_config_data_generic -ffffffff817a6ad0 T ixgbe_disable_rx -ffffffff817a6b10 T ixgbe_disable_pcie_master -ffffffff817a6c60 T ixgbe_read_eerd_buffer_generic -ffffffff817a6da0 T ixgbe_poll_eerd_eewr_done -ffffffff817a6e40 T ixgbe_write_eewr_buffer_generic -ffffffff817a6fc0 T ixgbe_write_eewr_generic -ffffffff817a7010 T ixgbe_acquire_eeprom -ffffffff817a7190 T ixgbe_get_eeprom_semaphore -ffffffff817a73a0 T ixgbe_release_eeprom_semaphore -ffffffff817a7410 T ixgbe_ready_eeprom -ffffffff817a7580 T ixgbe_shift_out_eeprom_bits -ffffffff817a7740 T ixgbe_shift_in_eeprom_bits -ffffffff817a78a0 T ixgbe_standby_eeprom -ffffffff817a7980 T ixgbe_raise_eeprom_clk -ffffffff817a79f0 T ixgbe_lower_eeprom_clk -ffffffff817a7a60 T ixgbe_release_eeprom -ffffffff817a7b40 T ixgbe_validate_mac_addr -ffffffff817a7ba0 T ixgbe_init_uta_tables -ffffffff817a7be0 T ixgbe_add_uc_addr -ffffffff817a7c50 T ixgbe_mta_vector -ffffffff817a7d00 T ixgbe_set_mta -ffffffff817a7dc0 T ixgbe_negotiate_fc -ffffffff817a7e70 T ixgbe_fc_autoneg_fiber -ffffffff817a7f90 T ixgbe_fc_autoneg_backplane -ffffffff817a8100 T ixgbe_fc_autoneg_copper -ffffffff817a8220 T ixgbe_disable_sec_rx_path_generic -ffffffff817a82e0 T ixgbe_enable_sec_rx_path_generic -ffffffff817a8370 T ixgbe_enable_rx -ffffffff817a83b0 T ixgbe_get_pcie_msix_count_generic -ffffffff817a8430 T ixgbe_insert_mac_addr_generic -ffffffff817a8640 T ixgbe_set_vmdq -ffffffff817a8680 T ixgbe_set_rar -ffffffff817a86d0 T ixgbe_clear_vmdq -ffffffff817a8710 T ixgbe_clear_vmdq_generic -ffffffff817a88c0 T ixgbe_set_vmdq_generic -ffffffff817a8970 T ixgbe_init_uta_tables_generic -ffffffff817a89f0 T ixgbe_find_vlvf_slot -ffffffff817a8aa0 T ixgbe_set_vfta_generic -ffffffff817a8bb0 T ixgbe_set_vlvf_generic -ffffffff817a8e40 T ixgbe_clear_vfta_generic -ffffffff817a8f40 T ixgbe_need_crosstalk_fix -ffffffff817a8f90 T ixgbe_check_mac_link_generic -ffffffff817a9180 T ixgbe_get_device_caps_generic -ffffffff817a91d0 T ixgbe_calculate_checksum -ffffffff817a9290 T ixgbe_hic_unlocked -ffffffff817a9450 T ixgbe_host_interface_command -ffffffff817a9620 T ixgbe_clear_tx_pending -ffffffff817a97e0 T ixgbe_mng_present -ffffffff817a9850 T ixgbe_mng_enabled -ffffffff817a9910 T ixgbe_setup_mac_link_multispeed_fiber -ffffffff817a9cb0 T ixgbe_flap_tx_laser -ffffffff817a9cf0 T ixgbe_check_link -ffffffff817a9d40 T ixgbe_set_soft_rate_select_speed -ffffffff817a9e30 T ixgbe_init_shared_code -ffffffff817a9ee0 T ixgbe_set_mac_type -ffffffff817aa080 T ixgbe_init_hw -ffffffff817aa0c0 T ixgbe_get_media_type -ffffffff817aa100 T ixgbe_read_mbx -ffffffff817aa160 T ixgbe_write_mbx -ffffffff817aa1b0 T ixgbe_check_for_msg -ffffffff817aa1f0 T ixgbe_check_for_ack -ffffffff817aa230 T ixgbe_check_for_rst -ffffffff817aa270 T ixgbe_poll_for_msg -ffffffff817aa330 T ixgbe_poll_for_ack -ffffffff817aa3f0 T ixgbe_read_posted_mbx -ffffffff817aa4d0 T ixgbe_write_posted_mbx -ffffffff817aa5a0 T ixgbe_init_mbx_ops_generic -ffffffff817aa5e0 T ixgbe_read_v2p_mailbox -ffffffff817aa650 T ixgbe_check_for_bit_pf -ffffffff817aa6e0 T ixgbe_check_for_msg_pf -ffffffff817aa790 T ixgbe_check_for_ack_pf -ffffffff817aa830 T ixgbe_check_for_rst_pf -ffffffff817aa920 T ixgbe_obtain_mbx_lock_pf -ffffffff817aa9b0 T ixgbe_write_mbx_pf -ffffffff817aab80 T ixgbe_read_mbx_pf -ffffffff817aac90 T ixgbe_init_mbx_params_pf -ffffffff817ab000 T ixgbe_set_pcie_completion_timeout -ffffffff817ab090 T ixgbe_init_ops_82598 -ffffffff817ab1e0 T ixgbe_init_phy_ops_82598 -ffffffff817ab2d0 T ixgbe_start_hw_82598 -ffffffff817ab480 T ixgbe_reset_hw_82598 -ffffffff817ab7b0 T ixgbe_get_media_type_82598 -ffffffff817ab870 T ixgbe_get_supported_physical_layer_82598 -ffffffff817aba40 T ixgbe_read_analog_reg8_82598 -ffffffff817abb00 T ixgbe_write_analog_reg8_82598 -ffffffff817abb80 T ixgbe_set_lan_id_multi_port_pcie_82598 -ffffffff817abc20 T ixgbe_enable_rx_dma_82598 -ffffffff817abc70 T ixgbe_set_vmdq_82598 -ffffffff817abd20 T ixgbe_clear_vmdq_82598 -ffffffff817abdd0 T ixgbe_set_vfta_82598 -ffffffff817abf00 T ixgbe_clear_vfta_82598 -ffffffff817ac0b0 T ixgbe_fc_enable_82598 -ffffffff817ac510 T ixgbe_read_i2c_eeprom_82598 -ffffffff817ac530 T ixgbe_check_mac_link_82598 -ffffffff817ac7d0 T ixgbe_setup_mac_link_82598 -ffffffff817ac990 T ixgbe_get_link_capabilities_82598 -ffffffff817aca60 T ixgbe_setup_copper_link_82598 -ffffffff817acb70 T ixgbe_start_mac_link_82598 -ffffffff817acc90 T ixgbe_validate_link_ready -ffffffff817acd40 T ixgbe_read_i2c_phy_82598 -ffffffff817ad000 T ixgbe_init_mac_link_ops_82599 -ffffffff817ad190 T ixgbe_disable_tx_laser_multispeed_fiber -ffffffff817ad260 T ixgbe_enable_tx_laser_multispeed_fiber -ffffffff817ad2e0 T ixgbe_flap_tx_laser_multispeed_fiber -ffffffff817ad420 T ixgbe_setup_mac_link_82599 -ffffffff817ad6a0 T ixgbe_set_hard_rate_select_speed -ffffffff817ad760 T ixgbe_verify_lesm_fw_enabled_82599 -ffffffff817ad830 T ixgbe_setup_mac_link_smartspeed -ffffffff817adbc0 T ixgbe_init_phy_ops_82599 -ffffffff817add10 T ixgbe_read_i2c_byte_82599 -ffffffff817ade90 T ixgbe_write_i2c_byte_82599 -ffffffff817ae010 T ixgbe_setup_copper_link_82599 -ffffffff817ae070 T ixgbe_setup_sfp_modules_82599 -ffffffff817ae230 T prot_autoc_read_82599 -ffffffff817ae360 T prot_autoc_write_82599 -ffffffff817ae4d0 T ixgbe_reset_pipeline_82599 -ffffffff817ae810 T ixgbe_init_ops_82599 -ffffffff817ae9f0 T ixgbe_identify_phy_82599 -ffffffff817aea80 T ixgbe_reset_hw_82599 -ffffffff817aee10 T ixgbe_get_media_type_82599 -ffffffff817aef40 T ixgbe_get_supported_physical_layer_82599 -ffffffff817af110 T ixgbe_enable_rx_dma_82599 -ffffffff817af180 T ixgbe_read_analog_reg8_82599 -ffffffff817af240 T ixgbe_write_analog_reg8_82599 -ffffffff817af2c0 T ixgbe_start_hw_82599 -ffffffff817af3c0 T ixgbe_get_link_capabilities_82599 -ffffffff817af500 T ixgbe_stop_mac_link_on_d3_82599 -ffffffff817af5c0 T ixgbe_read_eeprom_82599 -ffffffff817af5f0 T ixgbe_start_mac_link_82599 -ffffffff817af7f0 T ixgbe_verify_fw_version_82599 -ffffffff817b0000 T ixgbe_init_ops_X540 -ffffffff817b0220 T ixgbe_init_eeprom_params_X540 -ffffffff817b02b0 T ixgbe_read_eerd_X540 -ffffffff817b0340 T ixgbe_write_eewr_X540 -ffffffff817b03d0 T ixgbe_update_eeprom_checksum_X540 -ffffffff817b04a0 T ixgbe_validate_eeprom_checksum_X540 -ffffffff817b0590 T ixgbe_calc_eeprom_checksum_X540 -ffffffff817b0730 T ixgbe_reset_hw_X540 -ffffffff817b0920 T ixgbe_get_media_type_X540 -ffffffff817b0950 T ixgbe_get_supported_physical_layer_X540 -ffffffff817b09d0 T ixgbe_start_hw_X540 -ffffffff817b0a20 T ixgbe_acquire_swfw_sync_X540 -ffffffff817b0e70 T ixgbe_release_swfw_sync_X540 -ffffffff817b0fa0 T ixgbe_init_swfw_sync_X540 -ffffffff817b1080 T ixgbe_setup_mac_link_X540 -ffffffff817b10a0 T ixgbe_blink_led_start_X540 -ffffffff817b11c0 T ixgbe_blink_led_stop_X540 -ffffffff817b12c0 T ixgbe_get_link_capabilities_X540 -ffffffff817b1300 T ixgbe_update_flash_X540 -ffffffff817b14e0 T ixgbe_poll_flash_update_done_X540 -ffffffff817b1570 T ixgbe_get_swfw_sync_semaphore -ffffffff817b1700 T ixgbe_release_swfw_sync_semaphore -ffffffff817b2000 T ixgbe_init_ops_X550 -ffffffff817b2110 T ixgbe_dmac_config_X550 -ffffffff817b21f0 T ixgbe_dmac_config_tcs_X550 -ffffffff817b2340 T ixgbe_dmac_update_tcs_X550 -ffffffff817b2400 T ixgbe_set_source_address_pruning_X550 -ffffffff817b24f0 T ixgbe_init_eeprom_params_X550 -ffffffff817b2570 T ixgbe_calc_eeprom_checksum_X550 -ffffffff817b2590 T ixgbe_read_ee_hostif_X550 -ffffffff817b2660 T ixgbe_write_ee_hostif_X550 -ffffffff817b2720 T ixgbe_update_eeprom_checksum_X550 -ffffffff817b28c0 T ixgbe_validate_eeprom_checksum_X550 -ffffffff817b2a10 T ixgbe_disable_rx_x550 -ffffffff817b2b30 T ixgbe_led_on_t_X550em -ffffffff817b2bf0 T ixgbe_led_off_t_X550em -ffffffff817b2cb0 T ixgbe_read_cs4227 -ffffffff817b2ce0 T ixgbe_write_cs4227 -ffffffff817b2d10 T ixgbe_read_pe -ffffffff817b2d60 T ixgbe_write_pe -ffffffff817b2dc0 T ixgbe_reset_cs4227 -ffffffff817b3050 T ixgbe_check_cs4227 -ffffffff817b3200 T ixgbe_setup_mux_ctl -ffffffff817b3290 T ixgbe_identify_phy_x550em -ffffffff817b34a0 T ixgbe_read_mng_if_sel_x550em -ffffffff817b3520 T ixgbe_fw_phy_activity -ffffffff817b3640 T ixgbe_get_phy_id_fw -ffffffff817b3750 T ixgbe_identify_phy_fw -ffffffff817b3870 T ixgbe_shutdown_fw_phy -ffffffff817b38d0 T ixgbe_read_phy_reg_x550em -ffffffff817b3900 T ixgbe_write_phy_reg_x550em -ffffffff817b3930 T ixgbe_init_ops_X550EM -ffffffff817b3bd0 T ixgbe_get_bus_info_X550em -ffffffff817b3c20 T ixgbe_get_media_type_X550em -ffffffff817b3cf0 T ixgbe_setup_sfp_modules_X550em -ffffffff817b3e80 T ixgbe_get_link_capabilities_X550em -ffffffff817b3f50 T ixgbe_reset_hw_X550em -ffffffff817b43d0 T ixgbe_get_supported_physical_layer_X550em -ffffffff817b4550 T ixgbe_setup_fc_X550em -ffffffff817b46b0 T ixgbe_init_phy_ops_X550em -ffffffff817b4b80 T ixgbe_setup_fw_link -ffffffff817b4ca0 T ixgbe_fc_autoneg_fw -ffffffff817b4cd0 T ixgbe_setup_eee_fw -ffffffff817b4d30 T ixgbe_init_ops_X550EM_a -ffffffff817b4e60 T ixgbe_read_iosf_sb_reg_x550 -ffffffff817b4fd0 T ixgbe_write_iosf_sb_reg_x550 -ffffffff817b5140 T ixgbe_read_iosf_sb_reg_x550a -ffffffff817b51d0 T ixgbe_write_iosf_sb_reg_x550a -ffffffff817b5260 T ixgbe_acquire_swfw_sync_X550a -ffffffff817b53a0 T ixgbe_release_swfw_sync_X550a -ffffffff817b5440 T ixgbe_fc_autoneg_fiber_x550em_a -ffffffff817b5480 T ixgbe_fc_autoneg_backplane_x550em_a -ffffffff817b55e0 T ixgbe_setup_fc_backplane_x550em_a -ffffffff817b57d0 T ixgbe_fc_autoneg_sgmii_x550em_a -ffffffff817b58c0 T ixgbe_init_ops_X550EM_x -ffffffff817b5980 T ixgbe_acquire_swfw_sync_X550em -ffffffff817b5a40 T ixgbe_release_swfw_sync_X550em -ffffffff817b5ad0 T ixgbe_iosf_wait -ffffffff817b5b80 T ixgbe_get_phy_token -ffffffff817b5c00 T ixgbe_put_phy_token -ffffffff817b5c80 T ixgbe_supported_sfp_modules_X550em -ffffffff817b5d00 T ixgbe_identify_sfp_module_X550em -ffffffff817b5d80 T ixgbe_init_mac_link_ops_X550em -ffffffff817b5ec0 T ixgbe_restart_an_internal_phy_x550em -ffffffff817b5fd0 T ixgbe_setup_sgmii -ffffffff817b61a0 T ixgbe_setup_sgmii_fw -ffffffff817b63a0 T ixgbe_setup_mac_link_sfp_x550a -ffffffff817b6590 T ixgbe_setup_mac_link_sfp_x550em -ffffffff817b6650 T ixgbe_setup_mac_link_t_X550em -ffffffff817b6700 T ixgbe_check_link_t_X550em -ffffffff817b67e0 T ixgbe_get_lasi_ext_t_x550em -ffffffff817b6960 T ixgbe_enable_lasi_ext_t_x550em -ffffffff817b6af0 T ixgbe_setup_kr_speed_x550em -ffffffff817b6d00 T ixgbe_reset_phy_fw -ffffffff817b6dd0 T ixgbe_check_overtemp_fw -ffffffff817b6e60 T ixgbe_read_phy_reg_x550a -ffffffff817b6f00 T ixgbe_write_phy_reg_x550a -ffffffff817b6fb0 T ixgbe_setup_kr_x550em -ffffffff817b7020 T ixgbe_setup_internal_phy_t_x550em -ffffffff817b7180 T ixgbe_enter_lplu_t_x550em -ffffffff817b73d0 T ixgbe_handle_lasi_ext_t_x550em -ffffffff817b7450 T ixgbe_reset_phy_t_X550em -ffffffff817b74a0 T ixgbe_set_mdio_speed -ffffffff817b7570 T ixgbe_init_ext_t_x550em -ffffffff817b7620 T ixgbe_setup_sfi_x550a -ffffffff817b77d0 T ixgbe_setup_ixfi_x550em_x -ffffffff817b79b0 T ixgbe_setup_ixfi_x550em -ffffffff817b7b90 T ixgbe_ext_phy_t_x550em_get_link -ffffffff817b7c20 T ixgbe_setup_phy_loopback_x550em -ffffffff817b7e10 T ixgbe_read_ee_hostif_buffer_X550 -ffffffff817b7fb0 T ixgbe_write_ee_hostif_data_X550 -ffffffff817b8020 T ixgbe_checksum_ptr_x550 -ffffffff817b81b0 T ixgbe_calc_checksum_X550 -ffffffff817b8340 T ixgbe_update_flash_X550 -ffffffff817b8390 T ixgbe_get_lcd_t_x550em -ffffffff817b8450 T ixgbe_set_mux -ffffffff817b9000 T ixgbe_read_i2c_combined_generic_int -ffffffff817b9260 T ixgbe_i2c_start -ffffffff817b93b0 t ixgbe_out_i2c_byte_ack -ffffffff817b9400 T ixgbe_clock_in_i2c_byte -ffffffff817b9500 T ixgbe_clock_out_i2c_bit -ffffffff817b9610 T ixgbe_i2c_stop -ffffffff817b9790 T ixgbe_i2c_bus_clear -ffffffff817b98a0 T ixgbe_read_i2c_combined_generic -ffffffff817b98c0 T ixgbe_read_i2c_combined_generic_unlocked -ffffffff817b98e0 T ixgbe_write_i2c_combined_generic_int -ffffffff817b9aa0 T ixgbe_write_i2c_combined_generic -ffffffff817b9ac0 T ixgbe_write_i2c_combined_generic_unlocked -ffffffff817b9ae0 T ixgbe_init_phy_ops_generic -ffffffff817b9c10 T ixgbe_identify_phy_generic -ffffffff817b9ce0 T ixgbe_reset_phy_generic -ffffffff817b9ef0 T ixgbe_read_phy_reg_generic -ffffffff817b9f90 T ixgbe_write_phy_reg_generic -ffffffff817ba030 T ixgbe_read_phy_reg_mdi -ffffffff817ba190 T ixgbe_write_phy_reg_mdi -ffffffff817ba2f0 T ixgbe_setup_phy_link_generic -ffffffff817ba5a0 T ixgbe_setup_phy_link_speed_generic -ffffffff817ba5f0 T ixgbe_get_phy_firmware_version_generic -ffffffff817ba620 T ixgbe_read_i2c_byte_generic -ffffffff817ba640 T ixgbe_write_i2c_byte_generic -ffffffff817ba660 T ixgbe_read_i2c_eeprom_generic -ffffffff817ba690 T ixgbe_write_i2c_eeprom_generic -ffffffff817ba6b0 T ixgbe_identify_module_generic -ffffffff817ba720 T ixgbe_read_i2c_byte_generic_unlocked -ffffffff817ba740 T ixgbe_write_i2c_byte_generic_unlocked -ffffffff817ba760 T ixgbe_tn_check_overtemp -ffffffff817ba7d0 t ixgbe_probe_phy -ffffffff817ba9d0 T ixgbe_check_reset_blocked -ffffffff817baa30 T ixgbe_validate_phy_addr -ffffffff817baaa0 T ixgbe_get_phy_id -ffffffff817bab50 T ixgbe_get_phy_type_from_id -ffffffff817bac10 T ixgbe_get_copper_link_capabilities_generic -ffffffff817bad00 T ixgbe_get_copper_speeds_supported -ffffffff817badc0 T ixgbe_check_phy_link_tnx -ffffffff817bb080 T ixgbe_setup_phy_link_tnx -ffffffff817bb330 T ixgbe_get_phy_firmware_version_tnx -ffffffff817bb360 T ixgbe_reset_phy_nl -ffffffff817bb5f0 T ixgbe_get_sfp_init_sequence_offsets -ffffffff817bb800 T ixgbe_is_sfp -ffffffff817bb850 T ixgbe_identify_sfp_module_generic -ffffffff817bbc40 T ixgbe_identify_qsfp_module_generic -ffffffff817bbf30 T ixgbe_get_supported_phy_sfp_layer_generic -ffffffff817bc0d0 T ixgbe_is_sfp_probe -ffffffff817bc120 T ixgbe_read_i2c_byte_generic_int -ffffffff817bc320 T ixgbe_clock_out_i2c_byte -ffffffff817bc480 T ixgbe_get_i2c_ack -ffffffff817bc680 T ixgbe_write_i2c_byte_generic_int -ffffffff817bc7b0 T ixgbe_set_i2c_data -ffffffff817bc960 T ixgbe_raise_i2c_clk -ffffffff817bca80 T ixgbe_lower_i2c_clk -ffffffff817bcb10 T ixgbe_clock_in_i2c_bit -ffffffff817bccd0 T ixgbe_get_i2c_data -ffffffff817bcd80 T ixgbe_set_copper_phy_power -ffffffff817bd000 t ixl_match -ffffffff817bd0a0 t ixl_attach -ffffffff817be5f0 t ixl_710_rd_ctl -ffffffff817be6b0 t ixl_710_wr_ctl -ffffffff817be780 t ixl_710_set_rss_key -ffffffff817be900 t ixl_710_set_rss_lut -ffffffff817be980 t ixl_atq_exec -ffffffff817beaf0 t ixl_wakeup -ffffffff817beb10 t ixl_722_rd_ctl -ffffffff817beb40 t ixl_722_wr_ctl -ffffffff817beb70 t ixl_722_set_rss_key -ffffffff817beba0 t ixl_722_set_rss_lut -ffffffff817bebd0 t ixl_dmamem_alloc -ffffffff817bed30 t ixl_arq -ffffffff817befd0 t ixl_arq_fill -ffffffff817bf240 t ixl_pxe_clear -ffffffff817bf2f0 t ixl_get_mac -ffffffff817bf4c0 t ixl_hmc -ffffffff817bfb50 t ixl_lldp_shut -ffffffff817bfbe0 t ixl_phy_mask_ints -ffffffff817bfc90 t ixl_restart_an -ffffffff817bfd40 t ixl_get_switch_config -ffffffff817bff30 t ixl_get_phy_types -ffffffff817c0120 t ixl_get_link_status -ffffffff817c01f0 t ixl_get_vsi -ffffffff817c0340 t ixl_set_vsi -ffffffff817c04b0 t ixl_intr0 -ffffffff817c06f0 t ixl_intr_vector -ffffffff817c0790 t ixl_ioctl -ffffffff817c2350 t ixl_start -ffffffff817c28d0 t ixl_watchdog -ffffffff817c2900 t ixl_media_change -ffffffff817c2930 t ixl_media_status -ffffffff817c29b0 t ixl_media_add -ffffffff817c2a40 t ixl_link_state_update -ffffffff817c2ba0 t ixl_remove_macvlan -ffffffff817c2c90 t ixl_add_macvlan -ffffffff817c2d70 t ixl_kstat_attach -ffffffff817c2e20 t ixl_dmamem_free -ffffffff817c2e90 t ixl_hmc_free -ffffffff817c2f80 t ixl_arq_unfill -ffffffff817c3070 t ixl_link_state_update_iaq -ffffffff817c3110 t ixl_set_link_status -ffffffff817c3280 t ixl_atq_poll -ffffffff817c3480 t ixl_rxeof -ffffffff817c3760 t ixl_txeof -ffffffff817c3950 t ixl_rxfill -ffffffff817c3c50 t ixl_down -ffffffff817c42a0 t ixl_rxr_free -ffffffff817c43b0 t ixl_txr_free -ffffffff817c44b0 t ixl_rxrefill -ffffffff817c44d0 t ixl_sfp_open -ffffffff817c46d0 t ixl_sfp_get -ffffffff817c47f0 t ixl_sfp_close -ffffffff817c4910 t ixl_qsfp_open -ffffffff817c4950 t ixl_qsfp_get -ffffffff817c4a70 t ixl_qsfp_close -ffffffff817c4aa0 t ixl_kstat_tick -ffffffff817c4b00 t ixl_kstat_create -ffffffff817c4ce0 t ixl_kstat_read -ffffffff817c5000 T dwqe_pci_match -ffffffff817c5030 T dwqe_pci_attach -ffffffff817c6000 T xge_match -ffffffff817c6030 T xge_attach -ffffffff817c6da0 T xge_setup_xgxs_xena -ffffffff817c6e30 T xge_setup_xgxs_herc -ffffffff817c6ec0 T xge_alloc_txmem -ffffffff817c70d0 T xge_alloc_rxmem -ffffffff817c73b0 T xge_add_rxbuf -ffffffff817c75a0 T xge_xgmii_mediachange -ffffffff817c75d0 T xge_ifmedia_status -ffffffff817c7650 T xge_ioctl -ffffffff817c78e0 T xge_start -ffffffff817c7c50 T xge_intr -ffffffff817c8220 T xge_enable -ffffffff817c82d0 T xge_init -ffffffff817c8760 T xge_stop -ffffffff817c8830 T xge_setpromisc -ffffffff817c88b0 T xge_setmulti -ffffffff817c9000 T thtc_match -ffffffff817c9060 T thtc_attach -ffffffff817c9280 T tht_match -ffffffff817c92b0 T tht_attach -ffffffff817c94e0 T thtc_lookup -ffffffff817c9560 T tht_intr -ffffffff817c9720 T thtc_print -ffffffff817c9790 T tht_sw_reset -ffffffff817c9c80 T tht_lladdr_read -ffffffff817c9d30 T tht_ioctl -ffffffff817c9ec0 T tht_start -ffffffff817ca460 T tht_watchdog -ffffffff817ca490 T tht_media_change -ffffffff817ca4c0 T tht_media_status -ffffffff817ca5b0 T tht_mountroot -ffffffff817ca780 T tht_fifo_alloc -ffffffff817ca890 T tht_fw_load -ffffffff817cabe0 T tht_fifo_free -ffffffff817cac90 T tht_link_state -ffffffff817cad40 T tht_write -ffffffff817cad90 T tht_read -ffffffff817cadc0 T tht_rxd -ffffffff817cb1b0 T tht_rxf_fill -ffffffff817cb750 T tht_txf -ffffffff817cba40 T tht_up -ffffffff817cbf70 T tht_down -ffffffff817cc5a0 T tht_iff -ffffffff817cc770 T tht_pkt_alloc -ffffffff817cc940 T tht_lladdr_write -ffffffff817cca00 T tht_pkt_free -ffffffff817ccad0 T tht_write_region -ffffffff817ccb20 T tht_fifo_writable -ffffffff817ccb90 T tht_fifo_readable -ffffffff817ccc00 T tht_rxf_drain -ffffffff817ccd10 T tht_fifo_pre -ffffffff817ccd60 T tht_pkt_get -ffffffff817ccde0 T tht_load_pkt -ffffffff817ccf20 T tht_pkt_put -ffffffff817ccf90 T tht_fifo_write -ffffffff817cd040 T tht_fifo_write_dmap -ffffffff817cd170 T tht_fifo_write_pad -ffffffff817cd240 T tht_fifo_post -ffffffff817cd2f0 T tht_fifo_read -ffffffff817cd390 T tht_pkt_used -ffffffff817cd3c0 T tht_dmamem_alloc -ffffffff817cd530 T tht_dmamem_free -ffffffff817cd5b0 T tht_wait_eq -ffffffff817cd670 T tht_wait_ne -ffffffff817ce000 T myx_match -ffffffff817ce030 T myx_attach -ffffffff817ce2a0 T myx_mcl_small -ffffffff817ce300 T myx_refill -ffffffff817ce360 T myx_mcl_big -ffffffff817ce410 T myx_query -ffffffff817ce700 T myx_pcie_dc -ffffffff817ce7e0 T myx_attachhook -ffffffff817ceaf0 T myx_ether_aton -ffffffff817cebb0 T myx_read -ffffffff817cebe0 T myx_loadfirmware -ffffffff817cede0 T myx_write -ffffffff817cee40 T myx_boot -ffffffff817cefc0 T myx_dmamem_alloc -ffffffff817cf120 T myx_cmd -ffffffff817cf270 T myx_probe_firmware -ffffffff817cf600 T myx_intr -ffffffff817cf890 T myx_kstat_attach -ffffffff817cfb20 T myx_ioctl -ffffffff817cfde0 T myx_start -ffffffff817d02a0 T myx_watchdog -ffffffff817d02d0 T myx_media_change -ffffffff817d0300 T myx_media_status -ffffffff817d0440 T myx_dmamem_free -ffffffff817d04b0 T myx_rdma -ffffffff817d0620 T myx_link_state -ffffffff817d06a0 T myx_up -ffffffff817d13e0 T myx_down -ffffffff817d1b40 T myx_rxrinfo -ffffffff817d1c70 T myx_get_sffpage -ffffffff817d1f60 T myx_iff -ffffffff817d2180 T myx_setlladdr -ffffffff817d2240 T myx_tx_init -ffffffff817d2390 T myx_rx_init -ffffffff817d2570 T myx_rx_fill -ffffffff817d2830 T myx_rx_empty -ffffffff817d2900 T myx_rx_free -ffffffff817d2990 T myx_tx_free -ffffffff817d2a10 T myx_tx_empty -ffffffff817d2ae0 T myx_kstat_stop -ffffffff817d2bd0 T myx_write_txd_tail -ffffffff817d2d70 T myx_load_mbuf -ffffffff817d2e20 T myx_txeof -ffffffff817d2f70 T myx_rxeof -ffffffff817d31c0 T myx_buf_fill -ffffffff817d3280 T myx_kstat_read -ffffffff817d34d0 T myx_kstat_tick -ffffffff817d3560 T myx_kstat_start -ffffffff817d4000 T oce_match -ffffffff817d4030 T oce_attach -ffffffff817d44f0 T oce_pci_alloc -ffffffff817d4780 T oce_dma_alloc -ffffffff817d49a0 T oce_init_fw -ffffffff817d4b90 T oce_mbox_init -ffffffff817d4be0 T oce_get_fw_config -ffffffff817d4cf0 T oce_check_native_mode -ffffffff817d4e20 T oce_macaddr_get -ffffffff817d4f50 T oce_intr -ffffffff817d5150 T oce_init_stats -ffffffff817d51c0 T oce_init_queues -ffffffff817d5360 T oce_attach_ifp -ffffffff817d5460 T oce_tick -ffffffff817d54b0 T oce_refill_rx -ffffffff817d5540 T oce_attachhook -ffffffff817d57c0 T oce_dma_free -ffffffff817d5870 T oce_get_link_status -ffffffff817d59b0 T oce_first_mcc -ffffffff817d5aa0 T oce_media_change -ffffffff817d5ad0 T oce_media_status -ffffffff817d5cd0 T oce_ioctl -ffffffff817d5e70 T oce_start -ffffffff817d5f70 T oce_watchdog -ffffffff817d5fd0 T oce_init -ffffffff817d6540 T oce_stop -ffffffff817d6830 T oce_rxrinfo -ffffffff817d6970 T oce_iff -ffffffff817d6be0 T oce_update_mcast -ffffffff817d6d50 T oce_set_promisc -ffffffff817d6df0 T oce_link_status -ffffffff817d6e90 T oce_update_stats -ffffffff817d6f70 T oce_macaddr_set -ffffffff817d71a0 T oce_config_vlan -ffffffff817d73b0 T oce_set_flow_control -ffffffff817d75b0 T oce_new_rq -ffffffff817d7930 T oce_alloc_rx_bufs -ffffffff817d7a70 T oce_drain_eq -ffffffff817d7b90 T oce_cmd -ffffffff817d7dd0 T oce_drain_rq -ffffffff817d7ef0 T oce_free_posted_rxbuf -ffffffff817d7fd0 T oce_drain_wq -ffffffff817d80f0 T oce_encap -ffffffff817d84d0 T oce_intr_wq -ffffffff817d8670 T oce_txeof -ffffffff817d8770 T oce_intr_rq -ffffffff817d8950 T oce_rxeoc -ffffffff817d8a90 T oce_rxeof -ffffffff817d8d90 T oce_port_valid -ffffffff817d8de0 T oce_vtp_valid -ffffffff817d8e30 T oce_get_buf -ffffffff817d8fe0 T oce_intr_mq -ffffffff817d9210 T oce_link_event -ffffffff817d92c0 T oce_create_iface -ffffffff817d9460 T oce_create_eq -ffffffff817d95c0 T oce_create_wq -ffffffff817d9870 T oce_create_rq -ffffffff817d9b20 T oce_create_mq -ffffffff817d9ce0 T oce_release_queues -ffffffff817d9df0 T oce_destroy_rq -ffffffff817da010 T oce_destroy_wq -ffffffff817da230 T oce_destroy_mq -ffffffff817da3d0 T oce_destroy_eq -ffffffff817da560 T oce_create_ring -ffffffff817da740 T oce_create_cq -ffffffff817da8e0 T oce_destroy_ring -ffffffff817da990 T oce_pkt_alloc -ffffffff817daa40 T oce_new_wq -ffffffff817dad40 T oce_destroy_cq -ffffffff817daed0 T oce_pkt_free -ffffffff817daf20 T oce_new_eq -ffffffff817db2d0 T oce_new_mq -ffffffff817db650 T oce_drain_mq -ffffffff817db770 T oce_new_cq -ffffffff817dbbe0 T oce_load_ring -ffffffff817dbcf0 T oce_mbox_dispatch -ffffffff817dbec0 T oce_macaddr_add -ffffffff817dbff0 T oce_macaddr_del -ffffffff817dc100 T oce_stats_be2 -ffffffff817dc230 T oce_stats_be3 -ffffffff817dc350 T oce_stats_xe -ffffffff817dd000 T dc_pci_match -ffffffff817dd090 T dc_pci_attach -ffffffff817dd820 T dc_pci_detach -ffffffff817de000 T epic_pci_match -ffffffff817de030 T epic_pci_attach -ffffffff817df000 T ti_pci_match -ffffffff817df030 T ti_pci_attach -ffffffff817e0000 T ne_pci_match -ffffffff817e0100 T ne_pci_attach -ffffffff817e0460 T ne_pci_lookup -ffffffff817e1000 T gem_match_pci -ffffffff817e1030 T gem_attach_pci -ffffffff817e12a0 T gem_detach_pci -ffffffff817e1320 T gem_pci_enaddr -ffffffff817e2000 T cas_match -ffffffff817e2030 T cas_attach -ffffffff817e21c0 T cas_pci_enaddr -ffffffff817e2490 T cas_intr -ffffffff817e2610 T cas_config -ffffffff817e2d10 T cas_reset -ffffffff817e2dd0 T cas_start -ffffffff817e2f20 T cas_ioctl -ffffffff817e3070 T cas_watchdog -ffffffff817e30c0 T cas_mii_readreg -ffffffff817e3190 T cas_mii_writereg -ffffffff817e3280 T cas_mii_statchg -ffffffff817e3340 T cas_mediachange -ffffffff817e33a0 T cas_mediastatus -ffffffff817e3400 T cas_mifinit -ffffffff817e3460 T cas_pcs_readreg -ffffffff817e34f0 T cas_pcs_writereg -ffffffff817e3650 T cas_tick -ffffffff817e3820 T cas_bitwait -ffffffff817e38d0 T cas_reset_rx -ffffffff817e3a70 T cas_reset_tx -ffffffff817e3c10 T cas_rxdrain -ffffffff817e3c40 T cas_stop -ffffffff817e3d90 T cas_disable_rx -ffffffff817e3e50 T cas_disable_tx -ffffffff817e3f10 T cas_meminit -ffffffff817e40d0 T cas_ringsize -ffffffff817e41b0 T cas_cringsize -ffffffff817e42a0 T cas_init -ffffffff817e4720 T cas_init_regs -ffffffff817e4bb0 T cas_iff -ffffffff817e4f30 T cas_rint -ffffffff817e5450 T cas_add_rxbuf -ffffffff817e5550 T cas_eint -ffffffff817e55b0 T cas_pint -ffffffff817e5620 T cas_tint -ffffffff817e57b0 T cas_encap -ffffffff817e6000 T sf_pci_match -ffffffff817e6030 T sf_pci_attach -ffffffff817e7000 T sis_probe -ffffffff817e7030 T sis_attach -ffffffff817e7900 T sis_activate -ffffffff817e7980 T sis_reverse -ffffffff817e79f0 T sis_delay -ffffffff817e7b10 T sis_eeprom_idle -ffffffff817e8170 T sis_eeprom_putbyte -ffffffff817e84a0 T sis_eeprom_getword -ffffffff817e8b30 T sis_read_eeprom -ffffffff817e8bd0 T sis_read_cmos -ffffffff817e8c90 T sis_read_mac -ffffffff817e8e60 T sis_read96x_mac -ffffffff817e8fa0 T sis_mii_sync -ffffffff817e90d0 T sis_mii_send -ffffffff817e9260 T sis_mii_readreg -ffffffff817e9800 T sis_mii_writereg -ffffffff817e9ac0 T sis_miibus_readreg -ffffffff817e9ca0 T sis_miibus_writereg -ffffffff817e9e30 T sis_miibus_statchg -ffffffff817ea1b0 T sis_mchash -ffffffff817ea220 T sis_iff -ffffffff817ea240 T sis_iff_ns -ffffffff817ea4d0 T sis_iff_sis -ffffffff817ea770 T sis_reset -ffffffff817ea890 T sis_intr -ffffffff817ea9d0 T sis_tick -ffffffff817eaa30 T sis_ioctl -ffffffff817eabe0 T sis_start -ffffffff817ead40 T sis_watchdog -ffffffff817eadf0 T sis_ifmedia_upd -ffffffff817eae70 T sis_ifmedia_sts -ffffffff817eaed0 T sis_stop -ffffffff817eb1c0 T sis_init -ffffffff817eb600 T sis_ring_init -ffffffff817eb7c0 T sis_fill_rx_ring -ffffffff817eb870 T sis_newbuf -ffffffff817eb9c0 T sis_rxeof -ffffffff817ebc10 T sis_txeof -ffffffff817ebde0 T sis_encap -ffffffff817ed000 T se_match -ffffffff817ed030 T se_attach -ffffffff817ed7a0 T se_activate -ffffffff817ed830 T se_read_eeprom -ffffffff817ed940 T se_get_mac_addr_eeprom -ffffffff817edc90 T se_pcib_match -ffffffff817edcf0 T se_get_mac_addr_apc -ffffffff817edfc0 T se_miibus_cmd -ffffffff817ee060 T se_miibus_readreg -ffffffff817ee150 T se_miibus_writereg -ffffffff817ee230 T se_miibus_statchg -ffffffff817ee390 T se_iff -ffffffff817ee4e0 T se_reset -ffffffff817ee610 T se_intr -ffffffff817ee790 T se_tick -ffffffff817ee810 T se_ioctl -ffffffff817ee950 T se_start -ffffffff817eea90 T se_watchdog -ffffffff817eeb00 T se_ifmedia_upd -ffffffff817eeb70 T se_ifmedia_sts -ffffffff817eebd0 T se_stop -ffffffff817eedb0 T se_init -ffffffff817ef220 T se_list_tx_init -ffffffff817ef2b0 T se_list_tx_free -ffffffff817ef350 T se_list_rx_init -ffffffff817ef400 T se_newbuf -ffffffff817ef580 T se_list_rx_free -ffffffff817ef620 T se_discard_rxbuf -ffffffff817ef680 T se_rxeof -ffffffff817ef8e0 T se_txeof -ffffffff817efac0 T se_encap -ffffffff817f0000 T mbg_probe -ffffffff817f0030 T mbg_attach -ffffffff817f0410 T mbg_timeout -ffffffff817f0470 T mbg_read_amcc_s5933 -ffffffff817f0630 T mbg_task -ffffffff817f07f0 T mbg_read_amcc_s5920 -ffffffff817f09e0 T mbg_read_asic -ffffffff817f0bb0 T mbg_task_hr -ffffffff817f0d30 T mbg_update_sensor -ffffffff817f1000 T uhci_pci_match -ffffffff817f1040 T uhci_pci_attach -ffffffff817f1330 T uhci_pci_detach -ffffffff817f13d0 T uhci_pci_activate -ffffffff817f1480 T uhci_pci_attach_deferred -ffffffff817f2000 T ohci_pci_match -ffffffff817f2040 T ohci_pci_attach -ffffffff817f2330 T ohci_pci_detach -ffffffff817f23d0 T ohci_pci_attach_deferred -ffffffff817f3000 T ehci_pci_match -ffffffff817f3040 T ehci_pci_attach -ffffffff817f3450 T ehci_pci_detach -ffffffff817f34f0 T ehci_pci_activate -ffffffff817f3570 T ehci_sb700_match -ffffffff817f35c0 T ehci_pci_takecontroller -ffffffff817f4000 T xhci_pci_match -ffffffff817f4040 T xhci_pci_attach -ffffffff817f43a0 T xhci_pci_detach -ffffffff817f4440 T xhci_pci_activate -ffffffff817f4520 T xhci_pci_takecontroller -ffffffff817f5000 T pcicbbmatch -ffffffff817f5040 T pccbbattach -ffffffff817f53d0 T pccbbactivate -ffffffff817f5820 T cb_chipset -ffffffff817f5880 T pccbb_shutdown -ffffffff817f5980 T pccbb_power -ffffffff817f5b20 T pccbbintr -ffffffff817f5ce0 T pccbb_legacy_disable -ffffffff817f5d40 T pci113x_insert -ffffffff817f5e00 T pccbb_pci_callback -ffffffff817f6120 T pccbb_chipinit -ffffffff817f6590 T pccbb_pcmcia_attach_setup -ffffffff817f66f0 T cbbprint -ffffffff817f6720 T pccbb_pcmcia_read -ffffffff817f6750 T pccbb_pcmcia_write -ffffffff817f6780 T pccbb_checksockstat -ffffffff817f6840 T pccbbintr_function -ffffffff817f68f0 T pccbb_ctrl -ffffffff817f6a30 T pccbb_detect_card -ffffffff817f6aa0 T cb_detect_voltage -ffffffff817f6af0 T cb_reset -ffffffff817f6c40 T pccbb_cardenable -ffffffff817f6d00 T pccbb_cb_intr_establish -ffffffff817f6d20 T pccbb_intr_establish -ffffffff817f6e70 T pccbb_cb_intr_disestablish -ffffffff817f6e80 T pccbb_intr_disestablish -ffffffff817f6fc0 T pccbb_pcmcia_io_alloc -ffffffff817f70c0 T pccbb_pcmcia_io_free -ffffffff817f70f0 T pccbb_pcmcia_io_map -ffffffff817f71b0 T pccbb_pcmcia_do_io_map -ffffffff817f7310 T pccbb_pcmcia_io_unmap -ffffffff817f73b0 T pccbb_pcmcia_wait_ready -ffffffff817f7460 T pccbb_pcmcia_socket_enable -ffffffff817f77d0 T pccbb_pcmcia_do_mem_map -ffffffff817f7950 T pccbb_pcmcia_socket_disable -ffffffff817f7a70 T pccbb_pcmcia_card_detect -ffffffff817f7ad0 T pccbb_pcmcia_mem_alloc -ffffffff817f7ba0 T pccbb_pcmcia_mem_free -ffffffff817f7bd0 T pccbb_pcmcia_mem_map -ffffffff817f7cf0 T pccbb_pcmcia_mem_unmap -ffffffff817f7d80 T pccbb_pcmcia_intr_establish -ffffffff817f7da0 T pccbb_pcmcia_intr_disestablish -ffffffff817f7dc0 T pccbb_pcmcia_intr_string -ffffffff817f7e00 T pccbb_rbus_cb_space_alloc -ffffffff817f7f20 T pccbb_open_win -ffffffff817f80b0 T pccbb_rbus_cb_space_free -ffffffff817f81c0 T pccbb_close_win -ffffffff817f8280 T pccbb_winlist_insert -ffffffff817f8380 T pccbb_winset -ffffffff817f8660 T pccbb_winlist_delete -ffffffff817f9000 T sk_xmac_miibus_readreg -ffffffff817f9170 T sk_xmac_miibus_writereg -ffffffff817f92d0 T sk_xmac_miibus_statchg -ffffffff817f9390 T sk_marv_miibus_readreg -ffffffff817f94c0 T sk_marv_miibus_writereg -ffffffff817f95e0 T sk_marv_miibus_statchg -ffffffff817f9610 T sk_setfilt -ffffffff817f96e0 T sk_iff -ffffffff817f9710 T sk_iff_xmac -ffffffff817f9950 T sk_iff_yukon -ffffffff817f9b50 T sk_init_rx_ring -ffffffff817f9c90 T sk_fill_rx_ring -ffffffff817f9d10 T sk_newbuf -ffffffff817f9e70 T sk_init_tx_ring -ffffffff817fa070 T sk_ifmedia_upd -ffffffff817fa0c0 T sk_ifmedia_sts -ffffffff817fa120 T sk_ioctl -ffffffff817fa2e0 T sk_init -ffffffff817fabb0 T sk_stop -ffffffff817fb260 T skc_probe -ffffffff817fb2f0 T skc_reset -ffffffff817fb4f0 T sk_probe -ffffffff817fb540 T sk_attach -ffffffff817fbc50 T sk_start -ffffffff817fbdb0 T sk_watchdog -ffffffff817fbe30 T sk_reset -ffffffff817fbe90 T sk_tick -ffffffff817fc060 T sk_yukon_tick -ffffffff817fc0c0 T sk_init_xmac -ffffffff817fc7b0 T sk_init_yukon -ffffffff817fce60 T sk_detach -ffffffff817fcf80 T sk_activate -ffffffff817fd010 T skcprint -ffffffff817fd080 T skc_attach -ffffffff817fd570 T sk_intr -ffffffff817fd970 T skc_detach -ffffffff817fd9f0 T skc_activate -ffffffff817fda30 T sk_encap -ffffffff817fdd30 T sk_txeof -ffffffff817fdfd0 T sk_rxeof -ffffffff817fe270 T sk_intr_bcom -ffffffff817fe450 T sk_intr_xmac -ffffffff817fe600 T sk_intr_yukon -ffffffff817ff000 T msk_miibus_readreg -ffffffff817ff120 T msk_miibus_writereg -ffffffff817ff240 T msk_miibus_statchg -ffffffff817ff330 T msk_iff -ffffffff817ff530 T msk_init_rx_ring -ffffffff817ff5d0 T msk_fill_rx_ring -ffffffff817ff840 T msk_init_tx_ring -ffffffff817ff950 T msk_ifmedia_upd -ffffffff817ff9a0 T msk_ifmedia_sts -ffffffff817ffa00 T msk_ioctl -ffffffff817ffbb0 T msk_init -ffffffff81800530 T msk_stop -ffffffff81800970 T mskc_probe -ffffffff818009a0 T mskc_reset -ffffffff81801210 T msk_probe -ffffffff81801260 T msk_reset -ffffffff81801350 T msk_attach -ffffffff81801900 T msk_start -ffffffff81801ce0 T msk_watchdog -ffffffff81801e40 T msk_init_yukon -ffffffff81802350 T msk_tick -ffffffff818023b0 T msk_fill_rx_tick -ffffffff81802420 T msk_kstat_attach -ffffffff81802580 T msk_detach -ffffffff818026f0 T msk_kstat_detach -ffffffff81802780 T msk_activate -ffffffff818028b0 T mskcprint -ffffffff81802920 T mskc_attach -ffffffff81803110 T msk_intr -ffffffff81803870 T mskc_detach -ffffffff81803950 T mskc_activate -ffffffff81803990 T msk_rxeof -ffffffff81803b00 T msk_txeof -ffffffff81803c40 T msk_intr_yukon -ffffffff81803d30 T msk_kstat_read -ffffffff81805000 T puc_pci_match -ffffffff81805110 T puc_pci_attach -ffffffff818053e0 T puc_pci_detach -ffffffff81805540 T puc_find_description -ffffffff818055d0 T puc_pci_intr_string -ffffffff81805600 T puc_pci_intr_establish -ffffffff81805710 T puc_pci_xr17v35x_intr -ffffffff81805870 T puc_print_ports -ffffffff81805a50 T puc_common_attach -ffffffff81805be0 T puc_port_type_name -ffffffff81805c20 T puc_print -ffffffff81805ca0 T puc_submatch -ffffffff81806000 T com_puc_match -ffffffff81806040 T com_puc_attach -ffffffff81806150 T com_puc_detach -ffffffff81807000 T lpt_puc_probe -ffffffff81807040 T lpt_puc_attach -ffffffff81807110 T lpt_puc_detach -ffffffff81808000 T wi_pci_match -ffffffff81808050 T wi_pci_attach -ffffffff818080e0 T wi_pci_activate -ffffffff818081e0 T wi_pci_lookup -ffffffff818083f0 T wi_pci_wakeup -ffffffff818084a0 T wi_pci_acex_attach -ffffffff81808790 T wi_pci_common_attach -ffffffff818088f0 T wi_pci_plx_attach -ffffffff81808be0 T wi_pci_plx_print_cis -ffffffff81808de0 T wi_pci_tmd_attach -ffffffff81808f40 T wi_pci_native_attach -ffffffff8180a000 T an_pci_match -ffffffff8180a030 T an_pci_attach -ffffffff8180b000 T iwi_match -ffffffff8180b030 T iwi_attach -ffffffff8180b8c0 T iwi_activate -ffffffff8180b920 T iwi_intr -ffffffff8180bba0 T iwi_reset -ffffffff8180bd80 T iwi_alloc_cmd_ring -ffffffff8180bf70 T iwi_alloc_tx_ring -ffffffff8180c170 T iwi_alloc_rx_ring -ffffffff8180c350 T iwi_read_prom_word -ffffffff8180c9d0 T iwi_ioctl -ffffffff8180cb50 T iwi_start -ffffffff8180ccb0 T iwi_watchdog -ffffffff8180cd40 T iwi_newstate -ffffffff8180cfa0 T iwi_send_mgmt -ffffffff8180cfd0 T iwi_media_change -ffffffff8180d030 T iwi_media_status -ffffffff8180d1a0 T iwi_init_task -ffffffff8180d210 T iwi_free_tx_ring -ffffffff8180d310 T iwi_free_cmd_ring -ffffffff8180d3c0 T iwi_stop -ffffffff8180d650 T iwi_wakeup -ffffffff8180d6f0 T iwi_init -ffffffff8180dbd0 T iwi_reset_cmd_ring -ffffffff8180dc10 T iwi_reset_tx_ring -ffffffff8180dcb0 T iwi_free_rx_ring -ffffffff8180dd60 T iwi_reset_rx_ring -ffffffff8180dd90 T iwi_rate -ffffffff8180de40 T iwi_find_txnode -ffffffff8180df50 T iwi_scan -ffffffff8180e1e0 T iwi_auth_and_assoc -ffffffff8180e840 T iwi_set_chan -ffffffff8180e9f0 T iwi_frame_intr -ffffffff8180ed20 T iwi_notification_intr -ffffffff8180ee20 T iwi_rx_intr -ffffffff8180efb0 T iwi_tx_intr -ffffffff8180f0b0 T iwi_cmd -ffffffff8180f210 T iwi_tx_start -ffffffff8180f6e0 T iwi_stop_master -ffffffff8180f8a0 T iwi_load_ucode -ffffffff8180feb0 T iwi_load_firmware -ffffffff818104e0 T iwi_config -ffffffff81810890 T iwi_update_edca -ffffffff81811000 T wpi_match -ffffffff81811030 T wpi_attach -ffffffff81811620 T wpi_detach -ffffffff818118c0 T wpi_activate -ffffffff81811960 T wpi_intr -ffffffff81811b60 T wpi_apm_init -ffffffff81811e60 T wpi_read_eeprom -ffffffff818120e0 T wpi_alloc_fwmem -ffffffff81812110 T wpi_alloc_shared -ffffffff81812150 T wpi_alloc_tx_ring -ffffffff81812300 T wpi_alloc_rx_ring -ffffffff818124e0 T wpi_apm_stop -ffffffff818125f0 T wpi_ioctl -ffffffff81812860 T wpi_start -ffffffff818129e0 T wpi_watchdog -ffffffff81812ac0 T wpi_node_alloc -ffffffff81812ae0 T wpi_newassoc -ffffffff81812c30 T wpi_updateedca -ffffffff81812f20 T wpi_set_key -ffffffff81813180 T wpi_delete_key -ffffffff81813380 T wpi_newstate -ffffffff81813650 T wpi_media_change -ffffffff818137c0 T wpi_radiotap_attach -ffffffff81813850 T wpi_calib_timeout -ffffffff81813950 T wpi_init_task -ffffffff818139c0 T wpi_free_tx_ring -ffffffff81813bb0 T wpi_free_shared -ffffffff81813ca0 T wpi_free_fwmem -ffffffff81813d90 T wpi_free_rx_ring -ffffffff81813ed0 T wpi_stop -ffffffff81813f30 T wpi_wakeup -ffffffff81813fd0 T wpi_init -ffffffff81814120 T wpi_nic_lock -ffffffff818141e0 T wpi_read_prom_data -ffffffff818145d0 T wpi_dma_contig_alloc -ffffffff818147c0 T wpi_dma_contig_free -ffffffff81814880 T wpi_reset_rx_ring -ffffffff81814a00 T wpi_reset_tx_ring -ffffffff81814af0 T wpi_read_eeprom_channels -ffffffff81814c50 T wpi_read_eeprom_group -ffffffff81814d60 T wpi_set_led -ffffffff81814ec0 T wpi_scan -ffffffff81815190 T wpi_auth -ffffffff818155c0 T wpi_run -ffffffff81815cb0 T wpi_iter_func -ffffffff81815cd0 T wpi_power_calibration -ffffffff81815d60 T wpi_ccmp_decap -ffffffff81815e60 T wpi_rx_done -ffffffff81816340 T wpi_tx_done -ffffffff818164c0 T wpi_cmd_done -ffffffff818165b0 T wpi_notif_intr -ffffffff818169c0 T wpi_tx -ffffffff81817120 T wpi_set_pslevel -ffffffff81817290 T wpi_cmd -ffffffff818175c0 T wpi_mrr_setup -ffffffff818179a0 T wpi_set_timing -ffffffff81817b40 T wpi_set_txpower -ffffffff81817ce0 T wpi_get_power_index -ffffffff81817e70 T wpi_config -ffffffff81818670 T wpi_post_alive -ffffffff81818870 T wpi_load_bootcode -ffffffff81818c10 T wpi_load_firmware -ffffffff818191e0 T wpi_read_firmware -ffffffff818193a0 T wpi_clock_wait -ffffffff81819470 T wpi_apm_stop_master -ffffffff81819580 T wpi_nic_config -ffffffff81819730 T wpi_hw_init -ffffffff81819fb0 T wpi_hw_stop -ffffffff8181b000 T iwn_match -ffffffff8181b030 T iwn_attach -ffffffff8181b8f0 T iwn_detach -ffffffff8181bce0 T iwn_activate -ffffffff8181bda0 T iwn_intr -ffffffff8181c270 T iwn4965_attach -ffffffff8181c3c0 T iwn5000_attach -ffffffff8181c710 T iwn_hw_prepare -ffffffff8181ca70 T iwn_read_eeprom -ffffffff8181cd20 T iwn_alloc_fwmem -ffffffff8181cd50 T iwn_alloc_kw -ffffffff8181cd80 T iwn_alloc_ict -ffffffff8181cdc0 T iwn_alloc_sched -ffffffff8181ce00 T iwn_alloc_tx_ring -ffffffff8181cf70 T iwn_alloc_rx_ring -ffffffff8181d180 T iwn_ioctl -ffffffff8181d420 T iwn_start -ffffffff8181d5c0 T iwn_watchdog -ffffffff8181d6b0 T iwn_node_alloc -ffffffff8181d6d0 T iwn_bgscan -ffffffff8181d750 T iwn_newassoc -ffffffff8181d840 T iwn_updateedca -ffffffff8181db50 T iwn_set_key -ffffffff8181dc80 T iwn_delete_key -ffffffff8181dd90 T iwn_updatechan -ffffffff8181de90 T iwn_updateprot -ffffffff8181df20 T iwn_updateslot -ffffffff8181dfa0 T iwn_ampdu_rx_start -ffffffff8181e080 T iwn_ampdu_rx_stop -ffffffff8181e150 T iwn_ampdu_tx_start -ffffffff8181e360 T iwn_ampdu_tx_stop -ffffffff8181e5e0 T iwn_newstate -ffffffff8181e8a0 T iwn_media_change -ffffffff8181ea00 T iwn_radiotap_attach -ffffffff8181ea90 T iwn_calib_timeout -ffffffff8181ecb0 T iwn_init_task -ffffffff8181ed20 T iwn_free_tx_ring -ffffffff8181ef10 T iwn_free_sched -ffffffff8181f000 T iwn_free_ict -ffffffff8181f0f0 T iwn_free_kw -ffffffff8181f1e0 T iwn_free_fwmem -ffffffff8181f2d0 T iwn4965_load_firmware -ffffffff8181f920 T iwn4965_read_eeprom -ffffffff8181fa70 T iwn4965_post_alive -ffffffff8181ff40 T iwn4965_nic_config -ffffffff81820020 T iwn4965_reset_sched -ffffffff81820050 T iwn4965_update_sched -ffffffff81820130 T iwn4965_update_rxon -ffffffff818202f0 T iwn4965_get_temperature -ffffffff81820370 T iwn4965_get_rssi -ffffffff818203e0 T iwn4965_set_txpower -ffffffff818208d0 T iwn4965_init_gains -ffffffff81820a70 T iwn4965_set_gains -ffffffff81820da0 T iwn4965_add_node -ffffffff81820e30 T iwn4965_tx_done -ffffffff81820f90 T iwn4965_ampdu_tx_start -ffffffff818213a0 T iwn4965_ampdu_tx_stop -ffffffff818215a0 T iwn5000_load_firmware -ffffffff818216b0 T iwn5000_read_eeprom -ffffffff81821900 T iwn5000_post_alive -ffffffff81822120 T iwn5000_nic_config -ffffffff81822500 T iwn5000_reset_sched -ffffffff818225f0 T iwn5000_update_sched -ffffffff818226e0 T iwn5000_update_rxon -ffffffff818228d0 T iwn5000_get_temperature -ffffffff81822930 T iwn5000_get_rssi -ffffffff81822980 T iwn5000_set_txpower -ffffffff818229d0 T iwn5000_init_gains -ffffffff81822b70 T iwn5000_set_gains -ffffffff81822e20 T iwn5000_add_node -ffffffff81822e50 T iwn5000_tx_done -ffffffff81823060 T iwn5000_ampdu_tx_start -ffffffff818234a0 T iwn5000_ampdu_tx_stop -ffffffff81823720 T iwn_free_rx_ring -ffffffff81823910 T iwn_stop -ffffffff81823990 T iwn_wakeup -ffffffff81823a40 T iwn_init -ffffffff81823d40 T iwn_nic_lock -ffffffff81823e00 T iwn_eeprom_lock -ffffffff81823ed0 T iwn_init_otprom -ffffffff81824330 T iwn_clock_wait -ffffffff81824400 T iwn_read_prom_data -ffffffff818247e0 T iwn_dma_contig_alloc -ffffffff818249d0 T iwn_dma_contig_free -ffffffff81824a90 T iwn_reset_rx_ring -ffffffff81824c20 T iwn_reset_tx_ring -ffffffff81824d20 T iwn5000_ict_reset -ffffffff81824e00 T iwn_apm_init -ffffffff81825240 T iwn_apm_stop -ffffffff81825380 T iwn_read_eeprom_channels -ffffffff81825510 T iwn_read_eeprom_enhinfo -ffffffff81825690 T iwn_scan_abort -ffffffff81825820 T iwn_set_led -ffffffff818259e0 T iwn_cmd -ffffffff81825d20 T iwn_scan -ffffffff81826210 T iwn_auth -ffffffff818264c0 T iwn_run -ffffffff81826960 T iwn_iter_func -ffffffff818269f0 T iwn_set_link_quality -ffffffff81826e70 T iwn_ccmp_decap -ffffffff81826f70 T iwn_rx_phy -ffffffff81827050 T iwn_rx_done -ffffffff81827660 T iwn_ra_choose -ffffffff818276e0 T iwn_ampdu_rate_control -ffffffff81827820 T iwn_ht_single_rate_control -ffffffff81827a00 T iwn_rx_compressed_ba -ffffffff81827b90 T iwn_ampdu_txq_advance -ffffffff81827d20 T iwn_clear_oactive -ffffffff81827da0 T iwn5000_rx_calib_results -ffffffff81827f10 T iwn_rx_statistics -ffffffff818280b0 T iwn4965_power_calibration -ffffffff81828100 T iwn_get_noise -ffffffff81828170 T iwn_collect_noise -ffffffff81828480 T iwn_tune_sensitivity -ffffffff81828c30 T iwn_tx_done_free_txdata -ffffffff81828ce0 T iwn_ampdu_tx_done -ffffffff81828f90 T iwn_tx_done -ffffffff818291e0 T iwn_cmd_done -ffffffff818292d0 T iwn_notif_intr -ffffffff81829940 T iwn_init_sensitivity -ffffffff81829bf0 T iwn_wakeup_intr -ffffffff81829cb0 T iwn_fatal_intr -ffffffff81829fa0 T iwn_rval2ridx -ffffffff8182a020 T iwn_tx -ffffffff8182ab00 T iwn_rxon_ht40_enabled -ffffffff8182ab40 T iwn_set_pslevel -ffffffff8182ad00 T iwn_add_broadcast_node -ffffffff8182af50 T iwn_set_critical_temp -ffffffff8182b130 T iwn_set_timing -ffffffff8182b300 T iwn_send_sensitivity -ffffffff8182b400 T iwn_send_btcoex -ffffffff8182b5a0 T iwn_send_advanced_btcoex -ffffffff8182bce0 T iwn5000_runtime_calib -ffffffff8182bed0 T iwn_config -ffffffff8182c3b0 T iwn6000_temp_offset_calib -ffffffff8182c560 T iwn2000_temp_offset_calib -ffffffff8182c740 T iwn_get_active_dwell_time -ffffffff8182c780 T iwn_limit_dwell -ffffffff8182c7f0 T iwn_get_passive_dwell_time -ffffffff8182c870 T iwn_rxon_configure_ht40 -ffffffff8182c910 T iwn_update_rxon_restore_power -ffffffff8182cbd0 T iwn5000_query_calibration -ffffffff8182ce20 T iwn5000_send_calibration -ffffffff8182cf70 T iwn5000_send_wimax_coex -ffffffff8182d140 T iwn5000_crystal_calib -ffffffff8182d2f0 T iwn_hw_stop -ffffffff8182d6e0 T iwn_hw_init -ffffffff8182dd80 T iwn4965_load_bootcode -ffffffff8182e120 T iwn5000_load_firmware_section -ffffffff8182e360 T iwn_read_firmware_leg -ffffffff8182e470 T iwn_read_firmware_tlv -ffffffff8182e6f0 T iwn_read_firmware -ffffffff8182e920 T iwn_apm_stop_master -ffffffff8182f000 T iwm_lookup_cmd_ver -ffffffff8182f070 T iwm_is_mimo_ht_plcp -ffffffff8182f0b0 T iwm_is_mimo_ht_mcs -ffffffff8182f100 T iwm_store_cscheme -ffffffff8182f150 T iwm_firmware_store_section -ffffffff8182f1f0 T iwm_set_default_calib -ffffffff8182f240 T iwm_fw_info_free -ffffffff8182f290 T iwm_fw_version_str -ffffffff8182f2d0 T iwm_read_firmware -ffffffff8182fb50 T iwm_read_prph_unlocked -ffffffff8182fbb0 T iwm_read_prph -ffffffff8182fc30 T iwm_nic_assert_locked -ffffffff8182fc90 T iwm_write_prph_unlocked -ffffffff8182fd00 T iwm_write_prph -ffffffff8182fd90 T iwm_write_prph64 -ffffffff8182fe90 T iwm_read_mem -ffffffff8182ffc0 T iwm_nic_lock -ffffffff81830110 T iwm_nic_unlock -ffffffff818301c0 T iwm_write_mem -ffffffff81830300 T iwm_write_mem32 -ffffffff81830410 T iwm_poll_bit -ffffffff818304e0 T iwm_set_bits_mask_prph -ffffffff81830680 T iwm_set_bits_prph -ffffffff818306a0 T iwm_clear_bits_prph -ffffffff818306c0 T iwm_dma_contig_alloc -ffffffff818308b0 T iwm_dma_contig_free -ffffffff81830970 T iwm_alloc_rx_ring -ffffffff81830b50 T iwm_rx_addbuf -ffffffff81830d40 T iwm_free_rx_ring -ffffffff81830ff0 T iwm_disable_rx_dma -ffffffff81831210 T iwm_reset_rx_ring -ffffffff81831290 T iwm_alloc_tx_ring -ffffffff81831470 T iwm_free_tx_ring -ffffffff81831670 T iwm_reset_tx_ring -ffffffff81831830 T iwm_enable_rfkill_int -ffffffff81831950 T iwm_check_rfkill -ffffffff818319d0 T iwm_enable_interrupts -ffffffff81831a80 T iwm_enable_fwload_interrupt -ffffffff81831b50 T iwm_restore_interrupts -ffffffff81831b80 T iwm_disable_interrupts -ffffffff81831c40 T iwm_ict_reset -ffffffff81831e00 T iwm_set_hw_ready -ffffffff81831fe0 T iwm_prepare_card_hw -ffffffff81832120 T iwm_apm_config -ffffffff81832200 T iwm_apm_init -ffffffff818328f0 T iwm_apm_stop -ffffffff81832cb0 T iwm_init_msix_hw -ffffffff81832d50 T iwm_conf_msix_hw -ffffffff818332a0 T iwm_clear_persistence_bit -ffffffff818333f0 T iwm_start_hw -ffffffff81833610 T iwm_stop_device -ffffffff81833c30 T iwm_nic_config -ffffffff81833d10 T iwm_nic_rx_init -ffffffff81833d30 T iwm_nic_rx_mq_init -ffffffff81834130 T iwm_nic_rx_legacy_init -ffffffff81834370 T iwm_nic_tx_init -ffffffff81834560 T iwm_nic_init -ffffffff818346c0 T iwm_enable_ac_txq -ffffffff81834b40 T iwm_enable_txq -ffffffff81834d20 T iwm_send_cmd_pdu -ffffffff81834da0 T iwm_disable_txq -ffffffff81834e80 T iwm_post_alive -ffffffff81835400 T iwm_phy_db_get_section -ffffffff818354a0 T iwm_phy_db_set_section -ffffffff818355e0 T iwm_is_valid_channel -ffffffff81835650 T iwm_ch_id_to_ch_index -ffffffff818356d0 T iwm_channel_id_to_papd -ffffffff81835770 T iwm_channel_id_to_txp -ffffffff81835900 T iwm_phy_db_get_section_data -ffffffff81835a90 T iwm_send_phy_db_cmd -ffffffff81835b30 T iwm_send_cmd -ffffffff81836210 T iwm_phy_db_send_all_channel_groups -ffffffff818363f0 T iwm_send_phy_db_data -ffffffff81836630 T iwm_send_time_event_cmd -ffffffff81836740 T iwm_free_resp -ffffffff818367c0 T iwm_protect_session -ffffffff81836870 T iwm_unprotect_session -ffffffff81836920 T iwm_nvm_read_chunk -ffffffff81836a80 T iwm_nvm_read_section -ffffffff81836b40 T iwm_fw_valid_tx_ant -ffffffff81836b80 T iwm_fw_valid_rx_ant -ffffffff81836bd0 T iwm_valid_siso_ant_rate_mask -ffffffff81836c30 T iwm_init_channel_map -ffffffff81836d90 T iwm_mimo_enabled -ffffffff81836dd0 T iwm_setup_ht_rates -ffffffff81836e80 T iwm_setup_vht_rates -ffffffff81836f10 T iwm_init_reorder_buffer -ffffffff81836f70 T iwm_clear_reorder_buffer -ffffffff81837030 T iwm_rx_ba_session_expired -ffffffff81837130 T iwm_reorder_timer_expired -ffffffff81837300 T iwm_release_frames -ffffffff818374f0 T iwm_sta_rx_agg -ffffffff818379e0 T iwm_send_cmd_pdu_status -ffffffff81837a70 T iwm_mac_ctxt_task -ffffffff81837bd0 T iwm_mac_ctxt_cmd -ffffffff81837dd0 T iwm_updateprot -ffffffff81837e90 T iwm_add_task -ffffffff81837f00 T iwm_updateslot -ffffffff81837fc0 T iwm_updateedca -ffffffff81838080 T iwm_phy_ctxt_task -ffffffff81838240 T iwm_phy_ctxt_update -ffffffff818383c0 T iwm_setrates -ffffffff81838550 T iwm_updatechan -ffffffff81838610 T iwm_updatedtim -ffffffff818386d0 T iwm_sta_tx_agg -ffffffff81838bb0 T iwm_flush_sta -ffffffff81838d50 T iwm_txq_advance -ffffffff81838f30 T iwm_clear_oactive -ffffffff81838fb0 T iwm_ba_task -ffffffff818391f0 T iwm_ampdu_rx_start -ffffffff818392d0 T iwm_ampdu_rx_stop -ffffffff818393b0 T iwm_ampdu_tx_start -ffffffff81839470 T iwm_ampdu_tx_stop -ffffffff81839550 T iwm_set_hw_address_8000 -ffffffff818397d0 T iwm_parse_nvm_data -ffffffff81839a40 T iwm_parse_nvm_sections -ffffffff81839b40 T iwm_nvm_init -ffffffff81839e00 T iwm_firmware_load_sect -ffffffff81839eb0 T iwm_firmware_load_chunk -ffffffff8183a160 T iwm_load_firmware_7000 -ffffffff8183a3c0 T iwm_load_cpu_sections_8000 -ffffffff8183a770 T iwm_load_firmware_8000 -ffffffff8183a980 T iwm_load_firmware -ffffffff8183aa60 T iwm_start_fw -ffffffff8183ac30 T iwm_send_tx_ant_cfg -ffffffff8183acc0 T iwm_send_phy_cfg_cmd -ffffffff8183ad70 T iwm_send_dqa_cmd -ffffffff8183ae00 T iwm_load_ucode_wait_alive -ffffffff8183af40 T iwm_save_fw_paging -ffffffff8183afb0 T iwm_send_paging_cmd -ffffffff8183b100 T iwm_free_fw_paging -ffffffff8183b270 T iwm_run_init_mvm_ucode -ffffffff8183b5b0 T iwm_send_bt_init_conf -ffffffff8183b650 T iwm_sf_config -ffffffff8183b860 T iwm_config_ltr -ffffffff8183b920 T iwm_get_signal_strength -ffffffff8183b980 T iwm_rxmq_get_signal_strength -ffffffff8183b9d0 T iwm_rx_rx_phy_cmd -ffffffff8183ba30 T iwm_get_noise -ffffffff8183baa0 T iwm_ccmp_decap -ffffffff8183bba0 T iwm_rx_hwdecrypt -ffffffff8183bc70 T iwm_rx_frame -ffffffff8183bfa0 T iwm_rx_mpdu -ffffffff8183c1b0 T iwm_flip_address -ffffffff8183c210 T iwm_detect_duplicate -ffffffff8183c330 T iwm_is_sn_less -ffffffff8183c390 T iwm_oldsn_workaround -ffffffff8183c450 T iwm_rx_reorder -ffffffff8183c9c0 T iwm_rx_mpdu_mq -ffffffff8183cdc0 T iwm_ra_choose -ffffffff8183ce80 T iwm_ht_single_rate_control -ffffffff8183d0a0 T iwm_vht_single_rate_control -ffffffff8183d2f0 T iwm_rx_tx_cmd_single -ffffffff8183d4c0 T iwm_txd_done -ffffffff8183d590 T iwm_reset_sched -ffffffff8183d640 T iwm_ampdu_tx_done -ffffffff8183d9b0 T iwm_rx_tx_cmd -ffffffff8183db90 T iwm_ampdu_rate_control -ffffffff8183dd30 T iwm_rx_compressed_ba -ffffffff8183dec0 T iwm_rx_bmiss -ffffffff8183dfb0 T iwm_binding_cmd -ffffffff8183e130 T iwm_phy_ctxt_cmd_hdr -ffffffff8183e1a0 T iwm_phy_ctxt_cmd_data -ffffffff8183e310 T iwm_get_vht_ctrl_pos -ffffffff8183e380 T iwm_phy_ctxt_cmd_uhb -ffffffff8183e5b0 T iwm_phy_ctxt_cmd -ffffffff8183e700 T iwm_update_sched -ffffffff8183e7d0 T iwm_send_cmd_status -ffffffff8183e8f0 T iwm_cmd_done -ffffffff8183ea90 T iwm_tx_fill_cmd -ffffffff8183eeb0 T iwm_rval2ridx -ffffffff8183ef40 T iwm_tx -ffffffff8183f9e0 T iwm_flush_tx_path -ffffffff8183fab0 T iwm_wait_tx_queues_empty -ffffffff8183fb70 T iwm_led_enable -ffffffff8183fba0 T iwm_led_disable -ffffffff8183fbd0 T iwm_led_is_enabled -ffffffff8183fc30 T iwm_led_blink_timeout -ffffffff8183fcb0 T iwm_led_blink_start -ffffffff8183fd00 T iwm_led_blink_stop -ffffffff8183fd50 T iwm_beacon_filter_send_cmd -ffffffff8183fde0 T iwm_beacon_filter_set_cqm_params -ffffffff8183fe20 T iwm_update_beacon_abort -ffffffff8183ff10 T iwm_power_build_cmd -ffffffff8183ffa0 T iwm_power_mac_update_mode -ffffffff818401b0 T iwm_power_update_device -ffffffff81840250 T iwm_enable_beacon_filter -ffffffff81840340 T iwm_disable_beacon_filter -ffffffff81840420 T iwm_add_sta_cmd -ffffffff81840810 T iwm_add_aux_sta -ffffffff818409b0 T iwm_drain_sta -ffffffff81840b60 T iwm_rm_sta_cmd -ffffffff81840c20 T iwm_scan_rx_chain -ffffffff81840c90 T iwm_scan_rate_n_flags -ffffffff81840d90 T iwm_lmac_scan_fill_channels -ffffffff81840e70 T iwm_umac_scan_fill_channels -ffffffff81840f40 T iwm_fill_probe_req_v1 -ffffffff81840fe0 T iwm_fill_probe_req -ffffffff81841210 T iwm_lmac_scan -ffffffff81841720 T iwm_config_umac_scan -ffffffff81841930 T iwm_umac_scan_size -ffffffff818419a0 T iwm_get_scan_req_umac_chan_param -ffffffff818419f0 T iwm_get_scan_req_umac_data -ffffffff81841a40 T iwm_umac_scan -ffffffff81841ea0 T iwm_mcc_update -ffffffff81841f30 T iwm_ridx2rate -ffffffff81841fa0 T iwm_ack_rates -ffffffff81842260 T iwm_mac_ctxt_cmd_common -ffffffff81842570 T iwm_mac_ctxt_cmd_fill_sta -ffffffff81842630 T iwm_update_quotas -ffffffff818429f0 T iwm_del_task -ffffffff81842a50 T iwm_scan -ffffffff81842cc0 T iwm_scan_abort -ffffffff81842de0 T iwm_bgscan -ffffffff81842e80 T iwm_bgscan_done -ffffffff81842f20 T iwm_bgscan_done_task -ffffffff81843170 T iwm_umac_scan_abort -ffffffff81843200 T iwm_lmac_scan_abort -ffffffff818432a0 T iwm_auth -ffffffff81843610 T iwm_deauth -ffffffff81843970 T iwm_run -ffffffff81843ea0 T iwm_allow_mcast -ffffffff81843fa0 T iwm_run_stop -ffffffff818445c0 T iwm_node_alloc -ffffffff818445e0 T iwm_set_key_v1 -ffffffff81844720 T iwm_set_key -ffffffff81844980 T iwm_delete_key_v1 -ffffffff81844ab0 T iwm_delete_key -ffffffff81844d20 T iwm_calib_timeout -ffffffff81844de0 T iwm_set_rate_table_vht -ffffffff81845100 T iwm_set_rate_table -ffffffff818454c0 T iwm_media_change -ffffffff818456c0 T iwm_stop -ffffffff81845b40 T iwm_init -ffffffff81845e10 T iwm_newstate_task -ffffffff81845f90 T iwm_newstate -ffffffff818460f0 T iwm_endscan -ffffffff81846140 T iwm_fill_sf_command -ffffffff81846210 T iwm_send_soc_conf -ffffffff81846350 T iwm_send_update_mcc_cmd -ffffffff81846510 T iwm_send_temp_report_ths_cmd -ffffffff818465e0 T iwm_tt_tx_backoff -ffffffff81846670 T iwm_fill_paging_mem -ffffffff818469e0 T iwm_alloc_fw_paging_mem -ffffffff81846d80 T iwm_init_hw -ffffffff81847400 T iwm_preinit -ffffffff818475a0 T iwm_start -ffffffff81847770 T iwm_watchdog -ffffffff81847910 T iwm_nic_error -ffffffff81847df0 T iwm_dump_driver_status -ffffffff81847e90 T iwm_ioctl -ffffffff81847ff0 T iwm_nic_umac_error -ffffffff81848460 T iwm_desc_lookup -ffffffff818485f0 T iwm_rx_pkt_valid -ffffffff81848640 T iwm_rx_pkt -ffffffff81849400 T iwm_notif_intr -ffffffff81849560 T iwm_intr -ffffffff81849990 T iwm_intr_msix -ffffffff81849c20 T iwm_match -ffffffff81849c50 T iwm_attach_hook -ffffffff81849c90 T iwm_attach -ffffffff8184a9d0 T iwm_radiotap_attach -ffffffff8184aa60 T iwm_init_task -ffffffff8184ab20 T iwm_resume -ffffffff8184ac60 T iwm_wakeup -ffffffff8184ad10 T iwm_activate -ffffffff8184b000 T iwx_lookup_cmd_ver -ffffffff8184b070 T iwx_lookup_notif_ver -ffffffff8184b0e0 T iwx_is_mimo_ht_plcp -ffffffff8184b120 T iwx_store_cscheme -ffffffff8184b170 T iwx_ctxt_info_alloc_dma -ffffffff8184b210 T iwx_dma_contig_alloc -ffffffff8184b3f0 T iwx_ctxt_info_free_paging -ffffffff8184b550 T iwx_dma_contig_free -ffffffff8184b610 T iwx_get_num_sections -ffffffff8184b690 T iwx_init_fw_sec -ffffffff8184bae0 T iwx_fw_version_str -ffffffff8184bb20 T iwx_alloc_fw_monitor_block -ffffffff8184bbd0 T iwx_alloc_fw_monitor -ffffffff8184bc90 T iwx_apply_debug_destination -ffffffff8184c1e0 T iwx_nic_lock -ffffffff8184c330 T iwx_write_prph -ffffffff8184c3d0 T iwx_set_bits_prph -ffffffff8184c3f0 T iwx_clear_bits_prph -ffffffff8184c410 T iwx_read_prph -ffffffff8184c4b0 T iwx_nic_unlock -ffffffff8184c560 T iwx_set_ltr -ffffffff8184c6b0 T iwx_ctxt_info_init -ffffffff8184c970 T iwx_ctxt_info_free_fw_img -ffffffff8184caf0 T iwx_ctxt_info_gen3_init -ffffffff8184d0e0 T iwx_write_umac_prph -ffffffff8184d190 T iwx_firmware_store_section -ffffffff8184d230 T iwx_set_default_calib -ffffffff8184d280 T iwx_fw_info_free -ffffffff8184d310 T iwx_read_firmware -ffffffff8184dda0 T iwx_prph_addr_mask -ffffffff8184dde0 T iwx_read_prph_unlocked -ffffffff8184de60 T iwx_nic_assert_locked -ffffffff8184dec0 T iwx_write_prph_unlocked -ffffffff8184df40 T iwx_write_prph64 -ffffffff8184e070 T iwx_read_umac_prph_unlocked -ffffffff8184e0f0 T iwx_read_umac_prph -ffffffff8184e190 T iwx_write_umac_prph_unlocked -ffffffff8184e210 T iwx_read_mem -ffffffff8184e340 T iwx_write_mem -ffffffff8184e480 T iwx_write_mem32 -ffffffff8184e590 T iwx_poll_bit -ffffffff8184e660 T iwx_set_bits_mask_prph -ffffffff8184e850 T iwx_alloc_rx_ring -ffffffff8184ea30 T iwx_rx_addbuf -ffffffff8184ec50 T iwx_free_rx_ring -ffffffff8184ef00 T iwx_disable_rx_dma -ffffffff8184f160 T iwx_reset_rx_ring -ffffffff8184f200 T iwx_alloc_tx_ring -ffffffff8184f410 T iwx_free_tx_ring -ffffffff8184f6a0 T iwx_reset_tx_ring -ffffffff8184f900 T iwx_enable_rfkill_int -ffffffff8184f9e0 T iwx_check_rfkill -ffffffff8184fa60 T iwx_enable_interrupts -ffffffff8184fb10 T iwx_enable_fwload_interrupt -ffffffff8184fbf0 T iwx_restore_interrupts -ffffffff8184fc20 T iwx_disable_interrupts -ffffffff8184fce0 T iwx_ict_reset -ffffffff8184fea0 T iwx_set_hw_ready -ffffffff81850080 T iwx_prepare_card_hw -ffffffff818501c0 T iwx_force_power_gating -ffffffff81850270 T iwx_apm_config -ffffffff81850340 T iwx_apm_init -ffffffff818505a0 T iwx_apm_stop -ffffffff81850960 T iwx_init_msix_hw -ffffffff81850a00 T iwx_conf_msix_hw -ffffffff81850fa0 T iwx_clear_persistence_bit -ffffffff81851120 T iwx_start_hw -ffffffff81851520 T iwx_stop_device -ffffffff81851a90 T iwx_nic_config -ffffffff81851b20 T iwx_nic_rx_init -ffffffff81851b80 T iwx_nic_init -ffffffff81851ca0 T iwx_enable_txq -ffffffff81851f70 T iwx_send_cmd -ffffffff81852530 T iwx_free_resp -ffffffff818525b0 T iwx_disable_txq -ffffffff81852810 T iwx_post_alive -ffffffff818528a0 T iwx_schedule_session_protection -ffffffff81852970 T iwx_send_cmd_pdu -ffffffff818529f0 T iwx_unprotect_session -ffffffff81852ac0 T iwx_fw_valid_tx_ant -ffffffff81852b00 T iwx_fw_valid_rx_ant -ffffffff81852b50 T iwx_init_channel_map -ffffffff81852d50 T iwx_mimo_enabled -ffffffff81852d90 T iwx_setup_ht_rates -ffffffff81852e40 T iwx_setup_vht_rates -ffffffff81852ed0 T iwx_init_reorder_buffer -ffffffff81852f30 T iwx_clear_reorder_buffer -ffffffff81852ff0 T iwx_rx_ba_session_expired -ffffffff818530f0 T iwx_rx_bar_frame_release -ffffffff818531a0 T iwx_release_frames -ffffffff81853390 T iwx_reorder_timer_expired -ffffffff81853560 T iwx_find_rxba_data -ffffffff818535f0 T iwx_sta_rx_agg_baid_cfg_cmd -ffffffff81853840 T iwx_send_cmd_pdu_status -ffffffff818538d0 T iwx_sta_rx_agg_sta_cmd -ffffffff81853b20 T iwx_sta_rx_agg -ffffffff81853df0 T iwx_mac_ctxt_task -ffffffff81853f80 T iwx_mac_ctxt_cmd -ffffffff81854180 T iwx_phy_ctxt_task -ffffffff81854330 T iwx_phy_ctxt_update -ffffffff81854780 T iwx_updatechan -ffffffff81854840 T iwx_add_task -ffffffff818548b0 T iwx_updateprot -ffffffff81854970 T iwx_updateslot -ffffffff81854a30 T iwx_updateedca -ffffffff81854af0 T iwx_updatedtim -ffffffff81854bb0 T iwx_sta_tx_agg_start -ffffffff81854da0 T iwx_ba_task -ffffffff81854ef0 T iwx_ampdu_rx_start -ffffffff81854fd0 T iwx_ampdu_rx_stop -ffffffff818550b0 T iwx_ampdu_tx_start -ffffffff81855160 T iwx_set_mac_addr_from_csr -ffffffff81855380 T iwx_flip_hw_address -ffffffff818553d0 T iwx_is_valid_mac_addr -ffffffff81855470 T iwx_nvm_get -ffffffff81855750 T iwx_load_firmware -ffffffff81855930 T iwx_start_fw -ffffffff81855b10 T iwx_pnvm_handle_section -ffffffff81855e10 T iwx_ctxt_info_gen3_set_pnvm -ffffffff81855e60 T iwx_pnvm_parse -ffffffff81855f50 T iwx_load_pnvm -ffffffff818562f0 T iwx_send_tx_ant_cfg -ffffffff81856380 T iwx_send_phy_cfg_cmd -ffffffff81856430 T iwx_send_dqa_cmd -ffffffff818564c0 T iwx_load_ucode_wait_alive -ffffffff81856580 T iwx_run_init_mvm_ucode -ffffffff818567e0 T iwx_config_ltr -ffffffff818568a0 T iwx_update_rx_desc -ffffffff81856940 T iwx_rxmq_get_signal_strength -ffffffff81856990 T iwx_rx_rx_phy_cmd -ffffffff818569f0 T iwx_get_noise -ffffffff81856a60 T iwx_ccmp_decap -ffffffff81856ba0 T iwx_rx_hwdecrypt -ffffffff81856ca0 T iwx_rx_frame -ffffffff81856f40 T iwx_detect_duplicate -ffffffff81857060 T iwx_is_sn_less -ffffffff818570c0 T iwx_oldsn_workaround -ffffffff81857180 T iwx_rx_reorder -ffffffff818576f0 T iwx_rx_mpdu_mq -ffffffff81857a30 T iwx_clear_tx_desc -ffffffff81857bd0 T iwx_txd_done -ffffffff81857c90 T iwx_txq_advance -ffffffff81857fb0 T iwx_tx_update_byte_tbl -ffffffff81858050 T iwx_rx_tx_cmd -ffffffff818581c0 T iwx_clear_oactive -ffffffff81858240 T iwx_rx_compressed_ba -ffffffff818583c0 T iwx_rx_bmiss -ffffffff818584b0 T iwx_binding_cmd -ffffffff81858620 T iwx_get_vht_ctrl_pos -ffffffff81858690 T iwx_phy_ctxt_cmd_uhb_v3_v4 -ffffffff818588e0 T iwx_phy_ctxt_cmd_v3_v4 -ffffffff81858b30 T iwx_phy_ctxt_cmd -ffffffff81858c30 T iwx_send_cmd_status -ffffffff81858d50 T iwx_cmd_done -ffffffff81858e30 T iwx_fw_rateidx_ofdm -ffffffff81858e90 T iwx_fw_rateidx_cck -ffffffff81858ef0 T iwx_tx_fill_cmd -ffffffff81859190 T iwx_rval2ridx -ffffffff81859220 T iwx_tx -ffffffff81859960 T iwx_flush_sta_tids -ffffffff81859b10 T iwx_drain_sta -ffffffff81859ca0 T iwx_flush_sta -ffffffff81859f60 T iwx_beacon_filter_send_cmd -ffffffff81859ff0 T iwx_update_beacon_abort -ffffffff8185a100 T iwx_power_build_cmd -ffffffff8185a190 T iwx_power_mac_update_mode -ffffffff8185a3b0 T iwx_power_update_device -ffffffff8185a450 T iwx_enable_beacon_filter -ffffffff8185a560 T iwx_disable_beacon_filter -ffffffff8185a650 T iwx_add_sta_cmd -ffffffff8185a950 T iwx_rm_sta_cmd -ffffffff8185aa10 T iwx_rm_sta -ffffffff8185ae70 T iwx_disable_mgmt_queue -ffffffff8185af50 T iwx_umac_scan_fill_channels -ffffffff8185b060 T iwx_fill_probe_req -ffffffff8185b290 T iwx_config_umac_scan_reduced -ffffffff8185b3f0 T iwx_scan_umac_flags_v2 -ffffffff8185b430 T iwx_scan_umac_dwell_v10 -ffffffff8185b4a0 T iwx_scan_umac_fill_general_p_v10 -ffffffff8185b530 T iwx_scan_umac_fill_ch_p_v6 -ffffffff8185b650 T iwx_umac_scan_v14 -ffffffff8185b940 T iwx_mcc_update -ffffffff8185b9d0 T iwx_ridx2rate -ffffffff8185ba40 T iwx_ack_rates -ffffffff8185bd00 T iwx_mac_ctxt_cmd_common -ffffffff8185c020 T iwx_mac_ctxt_cmd_fill_sta -ffffffff8185c0b0 T iwx_clear_statistics -ffffffff8185c190 T iwx_del_task -ffffffff8185c1f0 T iwx_scan -ffffffff8185c390 T iwx_scan_abort -ffffffff8185c440 T iwx_bgscan -ffffffff8185c4c0 T iwx_bgscan_done -ffffffff8185c560 T iwx_bgscan_done_task -ffffffff8185c860 T iwx_umac_scan_abort -ffffffff8185c8f0 T iwx_enable_mgmt_queue -ffffffff8185c980 T iwx_rs_rval2idx -ffffffff8185c9f0 T iwx_rs_ht_rates -ffffffff8185cac0 T iwx_rs_vht_rates -ffffffff8185cb80 T iwx_rs_init_v3 -ffffffff8185cf80 T iwx_rs_init_v4 -ffffffff8185d3a0 T iwx_rs_init -ffffffff8185d400 T iwx_rs_update -ffffffff8185d6a0 T iwx_phy_send_rlc -ffffffff8185d790 T iwx_auth -ffffffff8185dae0 T iwx_deauth -ffffffff8185dd80 T iwx_run -ffffffff8185e210 T iwx_sf_config -ffffffff8185e420 T iwx_allow_mcast -ffffffff8185e520 T iwx_run_stop -ffffffff8185e810 T iwx_node_alloc -ffffffff8185e830 T iwx_set_key -ffffffff8185e960 T iwx_add_sta_key -ffffffff8185ebd0 T iwx_setkey_task -ffffffff8185ecc0 T iwx_delete_key -ffffffff8185ee50 T iwx_media_change -ffffffff8185eec0 T iwx_stop -ffffffff8185f360 T iwx_init -ffffffff8185f630 T iwx_newstate_task -ffffffff8185f770 T iwx_newstate -ffffffff8185f940 T iwx_endscan -ffffffff8185f990 T iwx_fill_sf_command -ffffffff8185fa60 T iwx_send_bt_init_conf -ffffffff8185faf0 T iwx_send_soc_conf -ffffffff8185fc30 T iwx_send_update_mcc_cmd -ffffffff8185fdd0 T iwx_send_temp_report_ths_cmd -ffffffff8185fea0 T iwx_init_hw -ffffffff81860480 T iwx_preinit -ffffffff81860650 T iwx_start -ffffffff81860820 T iwx_watchdog -ffffffff81860a30 T iwx_nic_error -ffffffff81860f10 T iwx_dump_driver_status -ffffffff81861140 T iwx_ioctl -ffffffff818612a0 T iwx_nic_umac_error -ffffffff81861710 T iwx_desc_lookup -ffffffff818618a0 T iwx_rx_pkt_valid -ffffffff818618f0 T iwx_rx_pkt -ffffffff818628d0 T iwx_notif_intr -ffffffff81862a20 T iwx_intr -ffffffff81862eb0 T iwx_intr_msix -ffffffff818631b0 T iwx_match -ffffffff818631e0 T iwx_attach_hook -ffffffff81863220 T iwx_find_device_cfg -ffffffff818633c0 T iwx_attach -ffffffff818643b0 T iwx_radiotap_attach -ffffffff81864440 T iwx_init_task -ffffffff81864500 T iwx_resume -ffffffff81864640 T iwx_wakeup -ffffffff81864710 T iwx_activate -ffffffff81865000 T qwx_pci_match -ffffffff81865030 T qwx_pci_attach -ffffffff81865b10 T qwx_pci_detach -ffffffff81865d30 T qwx_pci_init_qmi_ce_config -ffffffff81865d50 T qwx_pcic_init_msi_config -ffffffff81865df0 T qwx_pci_alloc_msi -ffffffff81865ed0 T qwx_pcic_map_service_to_pipe -ffffffff81865fd0 T qwx_pcic_get_user_msi_vector -ffffffff818660b0 T qwx_pcic_read32 -ffffffff818661a0 T qwx_pcic_write32 -ffffffff818662a0 T qwx_pci_start -ffffffff818663a0 T qwx_pci_stop -ffffffff81866420 T qwx_pci_power_up -ffffffff81866550 T qwx_pci_power_down -ffffffff81866760 T qwx_mhi_submit_xfer -ffffffff818669d0 T qwx_pcic_ext_irq_enable -ffffffff81866a00 T qwx_pcic_ext_irq_disable -ffffffff81866a30 T qwx_pci_intr -ffffffff81866cc0 T qwx_pci_intr_mhi_ctrl -ffffffff81866d10 T qwx_pci_intr_mhi_data -ffffffff81866d60 T qwx_pci_read_hw_version -ffffffff81866dd0 T qwx_pci_alloc_event_rings -ffffffff81867040 T qwx_pci_init_cmd_ring -ffffffff818670d0 T qwx_mhi_register -ffffffff81867100 T qwx_pcic_config_irq -ffffffff81867360 T qwx_rddm_task -ffffffff818675d0 T qwx_pci_attach_hook -ffffffff81867610 T qwx_pci_free_cmd_ring -ffffffff81867690 T qwx_pci_free_event_rings -ffffffff81867790 T qwx_pci_free_xfer_rings -ffffffff81867860 T qwx_pci_alloc_xfer_ring -ffffffff81867b20 T qwx_pci_alloc_xfer_rings_qca6390 -ffffffff81867c20 T qwx_pci_alloc_xfer_rings_qcn9074 -ffffffff81867d30 T qwx_pci_alloc_event_ring -ffffffff81867e10 T qwx_pci_read -ffffffff81867e40 T qwx_pci_write -ffffffff81867e70 T qwx_pcic_ce_irq_enable -ffffffff81867eb0 T qwx_pcic_ce_irq_disable -ffffffff81867ef0 T qwx_pcic_ext_grp_disable -ffffffff81867f20 T qwx_pcic_ext_irq_config -ffffffff81868150 T qwx_pcic_ce_irqs_enable -ffffffff818681f0 T qwx_pcic_ce_irqs_disable -ffffffff81868290 T qwx_pci_aspm_restore -ffffffff81868300 T qwx_pcic_ce_irq_disable_sync -ffffffff818683a0 T qwx_pci_bus_wake_up -ffffffff81868430 T qwx_mhi_wake_db_clear_valid -ffffffff81868470 T qwx_mhi_device_wake -ffffffff818684d0 T qwx_pci_bus_release -ffffffff81868560 T qwx_mhi_device_zzz -ffffffff818685c0 T qwx_pci_get_window_start -ffffffff81868630 T qwx_pci_select_window -ffffffff818686d0 T qwx_pci_window_write32 -ffffffff818687d0 T qwx_pci_window_read32 -ffffffff818688c0 T qwx_pci_select_static_window -ffffffff818688f0 T qwx_pci_soc_global_reset -ffffffff81868bb0 T qwx_pci_clear_dbg_registers -ffffffff81868eb0 T qwx_pci_set_link_reg -ffffffff81869140 T qwx_pci_fix_l1ss -ffffffff81869210 T qwx_pci_enable_ltssm -ffffffff818695c0 T qwx_pci_clear_all_intrs -ffffffff818696b0 T qwx_pci_set_wlaon_pwr_ctrl -ffffffff81869840 T qwx_pci_force_wake -ffffffff81869910 T qwx_pci_sw_reset -ffffffff81869a90 T qwx_mhi_clear_vector -ffffffff81869b20 T qwx_mhi_reset_device -ffffffff81869c70 T qwx_pci_msi_config -ffffffff81869cd0 T qwx_pci_msi_enable -ffffffff81869d30 T qwx_pci_msi_disable -ffffffff81869d90 T qwx_pci_aspm_disable -ffffffff81869e20 T qwx_mhi_start -ffffffff8186a100 T qwx_mhi_stop -ffffffff8186a120 T qwx_mhi_unregister -ffffffff8186a150 T qwx_mhi_ring_doorbell -ffffffff8186a1c0 T qwx_mhi_init_xfer_rings -ffffffff8186a330 T qwx_mhi_init_event_rings -ffffffff8186a480 T qwx_mhi_init_cmd_ring -ffffffff8186a500 T qwx_mhi_init_dev_ctxt -ffffffff8186a6c0 T qwx_pci_cmd_ring_get_elem -ffffffff8186a720 T qwx_mhi_cmd_ring_submit -ffffffff8186a850 T qwx_mhi_send_cmd -ffffffff8186a920 T qwx_pci_xfer_ring_get_elem -ffffffff8186a970 T qwx_pci_xfer_ring_get_data -ffffffff8186a9c0 T qwx_mhi_start_channel -ffffffff8186ac70 T qwx_mhi_start_channels -ffffffff8186ad70 T qwx_rddm_prepare -ffffffff8186aff0 T qwx_mhi_fw_load_handler -ffffffff8186b1f0 T qwx_mhi_await_device_reset -ffffffff8186b2a0 T qwx_mhi_fw_load_bhi -ffffffff8186b4e0 T qwx_mhi_fw_load_bhie -ffffffff8186b840 T qwx_mhi_await_device_ready -ffffffff8186b980 T qwx_mhi_ready_state_transition -ffffffff8186bb30 T qwx_mhi_init_mmio -ffffffff8186be10 T qwx_mhi_set_state -ffffffff8186be90 T qwx_mhi_mission_mode_state_transition -ffffffff8186bfd0 T qwx_mhi_low_power_mode_state_transition -ffffffff8186c030 T qwx_pci_event_ring_get_elem -ffffffff8186c080 T qwx_mhi_state_change -ffffffff8186c3b0 T qwx_pci_intr_ctrl_event_mhi -ffffffff8186c3f0 T qwx_pci_intr_ctrl_event_ee -ffffffff8186c430 T qwx_pci_intr_ctrl_event_cmd_complete -ffffffff8186c570 T qwx_pci_intr_ctrl_event -ffffffff8186c7c0 T qwx_pci_intr_data_event_tx -ffffffff8186cb50 T qwx_pci_intr_data_event -ffffffff8186d000 T cmpci_match -ffffffff8186d030 T cmpci_attach -ffffffff8186d500 T cmpci_activate -ffffffff8186d580 T cmpci_open -ffffffff8186d5b0 T cmpci_close -ffffffff8186d5e0 T cmpci_set_params -ffffffff8186df90 T cmpci_round_blocksize -ffffffff8186dfc0 T cmpci_halt_output -ffffffff8186e170 T cmpci_halt_input -ffffffff8186e2f0 T cmpci_set_port -ffffffff8186e450 T cmpci_get_port -ffffffff8186e520 T cmpci_query_devinfo -ffffffff8186ecf0 T cmpci_malloc -ffffffff8186ed50 T cmpci_free -ffffffff8186ee20 T cmpci_round_buffersize -ffffffff8186ee60 T cmpci_trigger_output -ffffffff8186f160 T cmpci_trigger_input -ffffffff8186f410 T cmpci_mixerreg_read -ffffffff8186f4a0 T cmpci_mixerreg_write -ffffffff8186f510 T cmpci_reg_partial_write_1 -ffffffff8186f5a0 T cmpci_reg_partial_write_4 -ffffffff8186f630 T cmpci_reg_set_1 -ffffffff8186f6a0 T cmpci_reg_clear_1 -ffffffff8186f710 T cmpci_reg_set_4 -ffffffff8186f780 T cmpci_reg_clear_4 -ffffffff8186f7f0 T cmpci_reg_set_reg_misc -ffffffff8186f830 T cmpci_reg_clear_reg_misc -ffffffff8186f880 T cmpci_rate_to_index -ffffffff8186f900 T cmpci_index_to_rate -ffffffff8186f930 T cmpci_index_to_divider -ffffffff8186f960 T cmpci_intr -ffffffff8186fc60 T cmpci_set_mixer_gain -ffffffff818703f0 T cmpci_resume -ffffffff81870460 T cmpci_alloc_dmamem -ffffffff81870620 T cmpci_free_dmamem -ffffffff818706f0 T cmpci_find_dmamem -ffffffff81870750 T cmpci_adjust -ffffffff818707a0 T cmpci_set_out_ports -ffffffff81870d90 T cmpci_set_in_ports -ffffffff81871000 T iha_pci_probe -ffffffff81871060 T iha_pci_attach -ffffffff81872000 T pcscp_match -ffffffff81872040 T pcscp_attach -ffffffff81872420 T pcscp_read_reg -ffffffff81872450 T pcscp_write_reg -ffffffff81872480 T pcscp_dma_isintr -ffffffff818724d0 T pcscp_dma_reset -ffffffff81872530 T pcscp_dma_intr -ffffffff81872a80 T pcscp_dma_setup -ffffffff81872cf0 T pcscp_dma_go -ffffffff81872e20 T pcscp_dma_stop -ffffffff81872eb0 T pcscp_dma_isactive -ffffffff81873000 T bge_probe -ffffffff81873030 T bge_attach -ffffffff81874450 T bge_detach -ffffffff818745a0 T bge_activate -ffffffff81874650 T bge_readmem_ind -ffffffff81874700 T bge_writemem_ind -ffffffff818747d0 T bge_writereg_ind -ffffffff81874820 T bge_writembx -ffffffff81874870 T bge_ape_lock_init -ffffffff81874a90 T bge_ape_read_fw_ver -ffffffff81874bf0 T bge_ape_lock -ffffffff81874da0 T bge_ape_unlock -ffffffff81874e60 T bge_ape_send_event -ffffffff81875050 T bge_ape_driver_state_change -ffffffff81875220 T bge_nvram_getbyte -ffffffff81875470 T bge_read_nvram -ffffffff81875520 T bge_eeprom_getbyte -ffffffff818756a0 T bge_read_eeprom -ffffffff81875730 T bge_miibus_readreg -ffffffff81875a10 T bge_miibus_writereg -ffffffff81875d10 T bge_miibus_statchg -ffffffff81875f10 T bge_newbuf -ffffffff818760a0 T bge_newbuf_jumbo -ffffffff81876320 T bge_init_rx_ring_std -ffffffff81876480 T bge_fill_rx_ring_std -ffffffff818765e0 T bge_rxtick -ffffffff81876620 T bge_rxtick_jumbo -ffffffff81876660 T bge_fill_rx_ring_jumbo -ffffffff818767c0 T bge_free_rx_ring_std -ffffffff818768e0 T bge_init_rx_ring_jumbo -ffffffff81876ac0 T bge_free_rx_ring_jumbo -ffffffff81876c20 T bge_free_tx_ring -ffffffff81876d00 T bge_init_tx_ring -ffffffff81876ef0 T bge_iff -ffffffff81877060 T bge_sig_pre_reset -ffffffff818770a0 T bge_sig_post_reset -ffffffff81877120 T bge_sig_legacy -ffffffff81877150 T bge_stop_fw -ffffffff81877180 T bge_dma_swap_options -ffffffff818771d0 T bge_phy_addr -ffffffff81877290 T bge_chipinit -ffffffff81877720 T bge_blockinit -ffffffff81878df0 T bge_lookup_rev -ffffffff81879080 T bge_can_use_msi -ffffffff818790f0 T bge_reset -ffffffff81879ab0 T bge_kstat_attach -ffffffff81879bd0 T bge_ioctl -ffffffff81879f40 T bge_start -ffffffff8187a100 T bge_watchdog -ffffffff8187a160 T bge_intr -ffffffff8187a360 T bge_ifmedia_upd -ffffffff8187a630 T bge_ifmedia_sts -ffffffff8187a730 T bge_tick -ffffffff8187a900 T bge_stop -ffffffff8187b610 T bge_init -ffffffff8187bb10 T bge_rxeof -ffffffff8187bef0 T bge_rxcsum -ffffffff8187bf90 T bge_txeof -ffffffff8187c190 T bge_link_upd -ffffffff8187c4f0 T bge_stats_update_regs -ffffffff8187c700 T bge_stats_update -ffffffff8187c820 T bge_compact_dma_runt -ffffffff8187ca20 T bge_cksum_pad -ffffffff8187cb00 T bge_encap -ffffffff8187ce40 T bge_rxrinfo -ffffffff8187cfb0 T bge_stop_block -ffffffff8187d080 T bge_kstat_read -ffffffff8187e000 T bnx_probe -ffffffff8187e030 T bnx_attach -ffffffff8187e400 T nswaph -ffffffff8187e450 T bnx_read_firmware -ffffffff8187f020 T bnx_read_rv2p -ffffffff8187f150 T bnx_reg_rd_ind -ffffffff8187f1a0 T bnx_intr -ffffffff8187f400 T bnx_attachhook -ffffffff8187f7c0 T bnx_release_resources -ffffffff8187f840 T bnx_reset -ffffffff8187fd30 T bnx_chipinit -ffffffff8187ffb0 T bnx_nvram_test -ffffffff81880110 T bnx_get_mac_addr -ffffffff81880230 T bnx_get_media -ffffffff818803e0 T bnx_dma_alloc -ffffffff81880d60 T bnx_ioctl -ffffffff81880f80 T bnx_start -ffffffff81881130 T bnx_watchdog -ffffffff818811c0 T bnx_miibus_read_reg -ffffffff81881430 T bnx_miibus_write_reg -ffffffff81881660 T bnx_miibus_statchg -ffffffff81881850 T bnx_init_media -ffffffff818818e0 T bnx_ifmedia_upd -ffffffff81881960 T bnx_ifmedia_sts -ffffffff818819d0 T bnx_tick -ffffffff81881ae0 T bnx_rxrefill -ffffffff81881b30 T bnx_mgmt_init -ffffffff81881c50 T bnx_reg_wr_ind -ffffffff81881ca0 T bnx_ctx_wr -ffffffff81881e90 T bnx_acquire_nvram_lock -ffffffff81881f50 T bnx_release_nvram_lock -ffffffff81882010 T bnx_enable_nvram_access -ffffffff81882070 T bnx_disable_nvram_access -ffffffff818820d0 T bnx_nvram_read_dword -ffffffff81882240 T bnx_init_nvram -ffffffff818829e0 T bnx_nvram_read -ffffffff81882d00 T bnx_dma_free -ffffffff81883240 T bnx_fw_sync -ffffffff81883420 T bnx_load_rv2p_fw -ffffffff81883530 T bnx_load_cpu_fw -ffffffff818839e0 T bnx_init_cpus -ffffffff81884370 T bnx_init_context -ffffffff81884a20 T bnx_set_mac_addr -ffffffff81884a90 T bnx_stop -ffffffff81884d60 T bnx_disable_intr -ffffffff81884dc0 T bnx_free_rx_chain -ffffffff81884e80 T bnx_free_tx_chain -ffffffff81884f80 T bnx_blockinit -ffffffff81885550 T bnx_get_buf -ffffffff81885730 T bnx_init_tx_context -ffffffff818857f0 T bnx_init_tx_chain -ffffffff81885930 T bnx_init_rx_context -ffffffff818859f0 T bnx_fill_rx_chain -ffffffff81885b30 T bnx_init_rx_chain -ffffffff81885c30 T bnx_phy_intr -ffffffff81885cd0 T bnx_rx_intr -ffffffff81886040 T bnx_tx_intr -ffffffff818861b0 T bnx_enable_intr -ffffffff81886270 T bnx_init -ffffffff81886680 T bnx_iff -ffffffff81886aa0 T bnx_tx_encap -ffffffff81886ce0 T bnx_stats_update -ffffffff81888000 T vge_probe -ffffffff81888030 T vge_attach -ffffffff81888410 T vge_detach -ffffffff818884d0 T vge_read_eeprom -ffffffff818885d0 T vge_miipoll_stop -ffffffff81888690 T vge_miipoll_start -ffffffff818887e0 T vge_miibus_readreg -ffffffff818889c0 T vge_miibus_writereg -ffffffff81888ba0 T vge_cam_clear -ffffffff81888f00 T vge_cam_set -ffffffff818892c0 T vge_iff -ffffffff81889480 T vge_reset -ffffffff81889610 T vge_allocmem -ffffffff81889a30 T vge_freemem -ffffffff81889b80 T vge_intr -ffffffff81889d80 T vge_ioctl -ffffffff81889ed0 T vge_start -ffffffff8188a0e0 T vge_watchdog -ffffffff8188a150 T vge_miibus_statchg -ffffffff8188a390 T vge_ifmedia_upd -ffffffff8188a3b0 T vge_ifmedia_sts -ffffffff8188a410 T vge_tick -ffffffff8188a4e0 T vge_stop -ffffffff8188a6e0 T vge_newbuf -ffffffff8188a900 T vge_tx_list_init -ffffffff8188a9b0 T vge_rx_list_init -ffffffff8188aab0 T vge_rxeof -ffffffff8188aee0 T vge_txeof -ffffffff8188b050 T vge_init -ffffffff8188b7e0 T vge_encap -ffffffff8188c000 T stge_match -ffffffff8188c030 T stge_attach -ffffffff8188c7a0 T stge_mii_bitbang_read -ffffffff8188c7f0 T stge_mii_bitbang_write -ffffffff8188c820 T stge_tick -ffffffff8188c960 T stge_intr -ffffffff8188cc50 T stge_reset -ffffffff8188cd30 T stge_read_eeprom -ffffffff8188ce60 T stge_mii_readreg -ffffffff8188ce80 T stge_mii_writereg -ffffffff8188cea0 T stge_mii_statchg -ffffffff8188cef0 T stge_mediachange -ffffffff8188cf40 T stge_mediastatus -ffffffff8188cfa0 T stge_ioctl -ffffffff8188d0f0 T stge_start -ffffffff8188d400 T stge_watchdog -ffffffff8188d490 T stge_txintr -ffffffff8188d5e0 T stge_init -ffffffff8188ddc0 T stge_stop -ffffffff8188dff0 T stge_iff -ffffffff8188e120 T stge_rxintr -ffffffff8188e610 T stge_stats_update -ffffffff8188e730 T stge_add_rxbuf -ffffffff8188e940 T stge_rxdrain -ffffffff8188f000 T nfe_match -ffffffff8188f030 T nfe_attach -ffffffff8188f6a0 T nfe_activate -ffffffff8188f720 T nfe_stop -ffffffff8188f8c0 T nfe_init -ffffffff8188fe60 T nfe_intr -ffffffff8188ff50 T nfe_get_macaddr -ffffffff81890030 T nfe_alloc_tx_ring -ffffffff81890250 T nfe_alloc_rx_ring -ffffffff818905d0 T nfe_free_tx_ring -ffffffff81890740 T nfe_ioctl -ffffffff81890890 T nfe_start -ffffffff81890a60 T nfe_watchdog -ffffffff81890ac0 T nfe_wol -ffffffff81890b40 T nfe_miibus_readreg -ffffffff81890cc0 T nfe_miibus_writereg -ffffffff81890e20 T nfe_miibus_statchg -ffffffff81890f90 T nfe_ifmedia_upd -ffffffff81890ff0 T nfe_ifmedia_sts -ffffffff81891050 T nfe_tick -ffffffff818910a0 T nfe_rxeof -ffffffff81891480 T nfe_txeof -ffffffff81891720 T nfe_iff -ffffffff818919f0 T nfe_txdesc32_sync -ffffffff81891a30 T nfe_txdesc64_sync -ffffffff81891a70 T nfe_txdesc32_rsync -ffffffff81891b00 T nfe_txdesc64_rsync -ffffffff81891b90 T nfe_rxdesc32_sync -ffffffff81891bd0 T nfe_rxdesc64_sync -ffffffff81891c10 T nfe_encap -ffffffff81891ec0 T nfe_set_macaddr -ffffffff81891f20 T nfe_reset_tx_ring -ffffffff81892050 T nfe_reset_rx_ring -ffffffff81892120 T nfe_free_rx_ring -ffffffff81893000 T et_match -ffffffff81893030 T et_attach -ffffffff818934b0 T et_detach -ffffffff81893590 T et_intr -ffffffff818936b0 T et_bus_config -ffffffff81893740 T et_get_eaddr -ffffffff818937c0 T et_reset -ffffffff81893860 T et_disable_intrs -ffffffff81893890 T et_dma_alloc -ffffffff81893a80 T et_ioctl -ffffffff81893bf0 T et_start -ffffffff81893d90 T et_watchdog -ffffffff81893dd0 T et_chip_attach -ffffffff81893ed0 T et_miibus_readreg -ffffffff81894030 T et_miibus_writereg -ffffffff81894150 T et_miibus_statchg -ffffffff81894240 T et_ifmedia_upd -ffffffff818942c0 T et_ifmedia_sts -ffffffff81894320 T et_tick -ffffffff81894370 T et_txtick -ffffffff818943b0 T et_stop -ffffffff818945e0 T et_dma_free -ffffffff818947a0 T et_stop_rxdma -ffffffff81894850 T et_stop_txdma -ffffffff818948b0 T et_free_tx_ring -ffffffff81894960 T et_free_rx_ring -ffffffff81894aa0 T et_enable_intrs -ffffffff81894ad0 T et_dma_mem_create -ffffffff81894c80 T et_dma_mbuf_create -ffffffff81894ff0 T et_dma_mem_destroy -ffffffff81895060 T et_dma_mbuf_destroy -ffffffff818951c0 T et_rxeof -ffffffff81895560 T et_txeof -ffffffff81895780 T et_init -ffffffff818959e0 T et_init_tx_ring -ffffffff81895a90 T et_init_rx_ring -ffffffff81895be0 T et_chip_init -ffffffff81895ec0 T et_enable_txrx -ffffffff81895fe0 T et_start_rxdma -ffffffff818960b0 T et_start_txdma -ffffffff81896110 T et_setmulti -ffffffff81896350 T et_encap -ffffffff81896750 T et_init_mac -ffffffff818968c0 T et_init_rxmac -ffffffff81896b70 T et_init_txmac -ffffffff81896bf0 T et_init_rxdma -ffffffff81896f60 T et_init_txdma -ffffffff81897090 T et_newbuf_cluster -ffffffff818970b0 T et_newbuf -ffffffff818972f0 T et_newbuf_hdr -ffffffff81898000 T jme_match -ffffffff81898030 T jme_attach -ffffffff818985a0 T jme_miibus_readreg -ffffffff818986c0 T jme_miibus_writereg -ffffffff818987e0 T jme_miibus_statchg -ffffffff81898d10 T jme_stop_rx -ffffffff81898e00 T jme_stop_tx -ffffffff81898ef0 T jme_rxeof -ffffffff81899020 T jme_txeof -ffffffff81899270 T jme_init_tx_ring -ffffffff81899330 T jme_init_ssb -ffffffff81899390 T jme_mac_config -ffffffff818997d0 T jme_mediastatus -ffffffff81899830 T jme_mediachange -ffffffff81899890 T jme_eeprom_read_byte -ffffffff818999f0 T jme_eeprom_macaddr -ffffffff81899b40 T jme_reg_macaddr -ffffffff81899be0 T jme_map_intr_vector -ffffffff81899c80 T jme_intr -ffffffff81899e30 T jme_reset -ffffffff81899ea0 T jme_dma_alloc -ffffffff8189a450 T jme_ioctl -ffffffff8189a5a0 T jme_start -ffffffff8189a6f0 T jme_watchdog -ffffffff8189a790 T jme_tick -ffffffff8189a7f0 T jme_detach -ffffffff8189a8b0 T jme_stop -ffffffff8189ab90 T jme_dma_free -ffffffff8189acc0 T jme_encap -ffffffff8189af50 T jme_init -ffffffff8189b6c0 T jme_iff -ffffffff8189b820 T jme_discard_rxbufs -ffffffff8189b8a0 T jme_rxpkt -ffffffff8189bc10 T jme_newbuf -ffffffff8189bd80 T jme_init_rx_ring -ffffffff8189bea0 T jme_set_vlan -ffffffff8189c000 T age_match -ffffffff8189c030 T age_attach -ffffffff8189c4c0 T age_intr -ffffffff8189c6b0 T age_phy_reset -ffffffff8189cf50 T age_reset -ffffffff8189d080 T age_dma_alloc -ffffffff8189d7e0 T age_get_macaddr -ffffffff8189d9a0 T age_ioctl -ffffffff8189daf0 T age_start -ffffffff8189dc80 T age_watchdog -ffffffff8189dd10 T age_miibus_readreg -ffffffff8189de10 T age_miibus_writereg -ffffffff8189df20 T age_miibus_statchg -ffffffff8189e0f0 T age_mediachange -ffffffff8189e150 T age_mediastatus -ffffffff8189e1b0 T age_tick -ffffffff8189e210 T age_dma_free -ffffffff8189e4d0 T age_detach -ffffffff8189e590 T age_stop -ffffffff8189e8b0 T age_stop_rxmac -ffffffff8189e9e0 T age_stop_txmac -ffffffff8189eb10 T age_mac_config -ffffffff8189ebb0 T age_rxintr -ffffffff8189ed80 T age_txintr -ffffffff8189ef40 T age_init -ffffffff8189f900 T age_stats_update -ffffffff8189fc20 T age_encap -ffffffff8189fe80 T age_iff -ffffffff8189ffe0 T age_rxeof -ffffffff818a0360 T age_newbuf -ffffffff818a04f0 T age_init_rx_ring -ffffffff818a05c0 T age_init_rr_ring -ffffffff818a0640 T age_init_tx_ring -ffffffff818a0700 T age_init_cmb_block -ffffffff818a0750 T age_init_smb_block -ffffffff818a07a0 T age_rxvlan -ffffffff818a1000 T alc_match -ffffffff818a1030 T alc_attach -ffffffff818a1880 T alc_detach -ffffffff818a1950 T alc_activate -ffffffff818a19d0 T alc_miibus_readreg -ffffffff818a1b90 T alc_mii_readreg_816x -ffffffff818a1c90 T alc_mii_readreg_813x -ffffffff818a1da0 T alc_miibus_writereg -ffffffff818a1f60 T alc_mii_writereg_816x -ffffffff818a2070 T alc_mii_writereg_813x -ffffffff818a2170 T alc_miibus_statchg -ffffffff818a2520 T alc_stop_mac -ffffffff818a2610 T alc_start_queue -ffffffff818a26c0 T alc_mac_config -ffffffff818a27a0 T alc_aspm -ffffffff818a2870 T alc_dsp_fixup -ffffffff818a2e50 T alc_miidbg_readreg -ffffffff818a2e90 T alc_miidbg_writereg -ffffffff818a2ee0 T alc_miiext_readreg -ffffffff818a3010 T alc_miiext_writereg -ffffffff818a3150 T alc_mediastatus -ffffffff818a31c0 T alc_mediachange -ffffffff818a3220 T alc_get_macaddr -ffffffff818a3240 T alc_get_macaddr_816x -ffffffff818a34c0 T alc_get_macaddr_813x -ffffffff818a3960 T alc_get_macaddr_par -ffffffff818a3a10 T alc_disable_l0s_l1 -ffffffff818a3aa0 T alc_phy_reset -ffffffff818a3ac0 T alc_phy_reset_816x -ffffffff818a4350 T alc_phy_reset_813x -ffffffff818a4730 T alc_phy_down -ffffffff818a4850 T alc_aspm_816x -ffffffff818a4900 T alc_aspm_813x -ffffffff818a4ae0 T alc_init_pcie -ffffffff818a4e60 T alc_config_msi -ffffffff818a4f30 T alc_intr -ffffffff818a5110 T alc_reset -ffffffff818a54e0 T alc_dma_alloc -ffffffff818a5c50 T alc_ioctl -ffffffff818a5da0 T alc_start -ffffffff818a5f30 T alc_watchdog -ffffffff818a5fa0 T alc_tick -ffffffff818a6000 T alc_dma_free -ffffffff818a62c0 T alc_stop -ffffffff818a6610 T alc_init -ffffffff818a7510 T alc_encap -ffffffff818a7740 T alc_txeof -ffffffff818a7930 T alc_iff -ffffffff818a7a90 T alc_stats_clear -ffffffff818a7bd0 T alc_stats_update -ffffffff818a8030 T alc_rxintr -ffffffff818a8240 T alc_newbuf -ffffffff818a83c0 T alc_rxeof -ffffffff818a8630 T alc_osc_reset -ffffffff818a87c0 T alc_init_rx_ring -ffffffff818a88c0 T alc_init_rr_ring -ffffffff818a8940 T alc_init_tx_ring -ffffffff818a89f0 T alc_init_cmb -ffffffff818a8a30 T alc_init_smb -ffffffff818a8a80 T alc_rxvlan -ffffffff818a8af0 T alc_stop_queue -ffffffff818a9000 T ale_match -ffffffff818a9030 T ale_attach -ffffffff818a9580 T ale_activate -ffffffff818a9600 T ale_miibus_readreg -ffffffff818a9720 T ale_miibus_writereg -ffffffff818a9830 T ale_miibus_statchg -ffffffff818a9a50 T ale_stop_mac -ffffffff818a9b40 T ale_mac_config -ffffffff818a9be0 T ale_mediastatus -ffffffff818a9c50 T ale_mediachange -ffffffff818a9cb0 T ale_get_macaddr -ffffffff818a9e70 T ale_phy_reset -ffffffff818aa4b0 T ale_intr -ffffffff818aa600 T ale_reset -ffffffff818aa770 T ale_dma_alloc -ffffffff818aaee0 T ale_ioctl -ffffffff818ab030 T ale_start -ffffffff818ab190 T ale_watchdog -ffffffff818ab200 T ale_tick -ffffffff818ab260 T ale_dma_free -ffffffff818ab520 T ale_detach -ffffffff818ab5e0 T ale_stop -ffffffff818ab8a0 T ale_init -ffffffff818ac2b0 T ale_encap -ffffffff818ac510 T ale_txeof -ffffffff818ac700 T ale_iff -ffffffff818ac860 T ale_stats_clear -ffffffff818ac930 T ale_stats_update -ffffffff818accb0 T ale_rxeof -ffffffff818acf50 T ale_rx_update_page -ffffffff818ad090 T ale_rxcsum -ffffffff818ad140 T ale_init_rx_pages -ffffffff818ad270 T ale_init_tx_ring -ffffffff818ad360 T ale_rxvlan -ffffffff818ae000 T amdpm_match -ffffffff818ae030 T amdpm_attach -ffffffff818ae360 T amdpm_activate -ffffffff818ae3d0 T amdpm_rnd_callout -ffffffff818ae430 T amdpm_i2c_acquire_bus -ffffffff818ae490 T amdpm_i2c_release_bus -ffffffff818ae4e0 T amdpm_i2c_exec -ffffffff818ae850 T amdpm_get_timecount -ffffffff818ae880 T amdpm_intr -ffffffff818af000 T bce_probe -ffffffff818af030 T bce_attach -ffffffff818af830 T bce_activate -ffffffff818af8a0 T bce_intr -ffffffff818afb90 T bce_reset -ffffffff818b0150 T bce_ioctl -ffffffff818b02b0 T bce_start -ffffffff818b04e0 T bce_watchdog -ffffffff818b0530 T bce_mii_read -ffffffff818b0670 T bce_mii_write -ffffffff818b07a0 T bce_statchg -ffffffff818b0b30 T bce_mediachange -ffffffff818b0b80 T bce_mediastatus -ffffffff818b0be0 T bce_tick -ffffffff818b0c30 T bce_stop -ffffffff818b0d50 T bce_init -ffffffff818b1160 T bce_iff -ffffffff818b1260 T bce_rxintr -ffffffff818b13f0 T bce_txintr -ffffffff818b14e0 T bce_add_rxbuf -ffffffff818b15a0 T bce_add_mac -ffffffff818b2000 T ath_pci_match -ffffffff818b2060 T ath_pci_attach -ffffffff818b2290 T ath_pci_detach -ffffffff818b3000 T athn_pci_match -ffffffff818b3030 T athn_pci_attach -ffffffff818b32c0 T athn_pci_detach -ffffffff818b3340 T athn_pci_activate -ffffffff818b33f0 T athn_pci_read -ffffffff818b3420 T athn_pci_write -ffffffff818b3450 T athn_pci_write_barrier -ffffffff818b3480 T athn_pci_disable_aspm -ffffffff818b34f0 T athn_pci_wakeup -ffffffff818b4000 T atw_pci_match -ffffffff818b4030 T atw_pci_attach -ffffffff818b42a0 T atw_pci_detach -ffffffff818b4320 t atw_pci_enable -ffffffff818b43c0 t atw_pci_disable -ffffffff818b5000 T rtw_pci_match -ffffffff818b5030 T rtw_pci_attach -ffffffff818b5250 T rtw_pci_detach -ffffffff818b52d0 T rtw_pci_enable -ffffffff818b5370 T rtw_pci_disable -ffffffff818b6000 T rtwn_pci_match -ffffffff818b6030 T rtwn_pci_attach -ffffffff818b6590 T rtwn_pci_detach -ffffffff818b66a0 T rtwn_pci_activate -ffffffff818b66c0 T rtwn_calib_to -ffffffff818b6720 T rtwn_scan_to -ffffffff818b6740 T rtwn_intr -ffffffff818b69e0 T rtwn_alloc_rx_list -ffffffff818b6d00 T rtwn_alloc_tx_list -ffffffff818b6f40 T rtwn_free_rx_list -ffffffff818b7090 T rtwn_pci_write_1 -ffffffff818b70c0 T rtwn_pci_write_2 -ffffffff818b70f0 T rtwn_pci_write_4 -ffffffff818b7120 T rtwn_pci_read_1 -ffffffff818b7150 T rtwn_pci_read_2 -ffffffff818b7180 T rtwn_pci_read_4 -ffffffff818b71b0 T rtwn_tx -ffffffff818b7740 T rtwn_power_on -ffffffff818b7770 T rtwn_dma_init -ffffffff818b7b20 T rtwn_pci_load_firmware -ffffffff818b7bd0 T rtwn_fw_loadpage -ffffffff818b7d00 T rtwn_mac_init -ffffffff818b7e40 T rtwn_bb_init -ffffffff818b82f0 T rtwn_alloc_buffers -ffffffff818b8320 T rtwn_pci_init -ffffffff818b83f0 T rtwn_pci_stop -ffffffff818b8540 T rtwn_is_oactive -ffffffff818b8580 T rtwn_next_calib -ffffffff818b85a0 T rtwn_cancel_calib -ffffffff818b85e0 T rtwn_pci_next_scan -ffffffff818b8600 T rtwn_cancel_scan -ffffffff818b8640 T rtwn_wait_async -ffffffff818b8670 T rtwn_free_tx_list -ffffffff818b87e0 T rtwn_setup_rx_desc -ffffffff818b8850 T rtwn_reset_rx_list -ffffffff818b88f0 T rtwn_reset_tx_list -ffffffff818b8a40 T rtwn_rx_frame -ffffffff818b8ec0 T rtwn_tx_done -ffffffff818b9050 T rtwn_poll_c2h_events -ffffffff818b9220 T rtwn_pci_92c_stop -ffffffff818b9400 T rtwn_pci_88e_stop -ffffffff818b97e0 T rtwn_pci_23a_stop -ffffffff818b9b80 T rtwn_88e_intr -ffffffff818b9eb0 T rtwn_llt_write -ffffffff818b9f70 T rtwn_llt_init -ffffffff818ba230 T rtwn_92c_power_on -ffffffff818ba6b0 T rtwn_88e_power_on -ffffffff818baab0 T rtwn_23a_power_on -ffffffff818baf20 T rtwn_tx_report -ffffffff818bb000 T ral_pci_match -ffffffff818bb030 T ral_pci_attach -ffffffff818bb210 T ral_pci_detach -ffffffff818bb2b0 T ral_pci_activate -ffffffff818bb340 T ral_pci_wakeup -ffffffff818bc000 T acx_pci_match -ffffffff818bc030 T acx_pci_attach -ffffffff818bc260 T acx_pci_detach -ffffffff818bd000 T pgt_pci_match -ffffffff818bd030 T pgt_pci_attach -ffffffff818bd200 T pgt_pci_detach -ffffffff818be000 T malo_pci_match -ffffffff818be030 T malo_pci_attach -ffffffff818be1e0 T malo_pci_detach -ffffffff818be230 T malo_pci_activate -ffffffff818be290 T malo_pci_wakeup -ffffffff818bf000 T bwi_pci_match -ffffffff818bf070 T bwi_pci_attach -ffffffff818bf290 T bwi_pci_detach -ffffffff818bf2e0 T bwi_pci_activate -ffffffff818bf350 T bwi_reset_bcm4331 -ffffffff818bf470 T bwi_pci_conf_write -ffffffff818bf4a0 T bwi_pci_conf_read -ffffffff818bf4d0 T bwi_pci_wakeup -ffffffff818c0000 T piixpm_match -ffffffff818c0030 T piixpm_attach -ffffffff818c04c0 T piixpm_intr -ffffffff818c05d0 T piixpm_i2c_acquire_bus -ffffffff818c06b0 T piixpm_i2c_release_bus -ffffffff818c0790 T piixpm_i2c_exec -ffffffff818c1000 T vic_match -ffffffff818c10a0 T vic_attach -ffffffff818c1430 T vic_intr -ffffffff818c14b0 T vic_query -ffffffff818c1710 T vic_alloc_data -ffffffff818c1a10 T vic_tick -ffffffff818c1a80 T vic_ioctl -ffffffff818c1cb0 T vic_start -ffffffff818c2010 T vic_watchdog -ffffffff818c2040 T vic_media_change -ffffffff818c2070 T vic_media_status -ffffffff818c2130 T vic_read -ffffffff818c2150 T vic_read_cmd -ffffffff818c21a0 T vic_getlladdr -ffffffff818c2250 T vic_alloc_dmamem -ffffffff818c23c0 T vic_rx_fill -ffffffff818c25b0 T vic_alloc_mbuf -ffffffff818c2670 T vic_init_data -ffffffff818c2a20 T vic_uninit_data -ffffffff818c2bf0 T vic_link_state -ffffffff818c2c70 T vic_write -ffffffff818c2cc0 T vic_rx_proc -ffffffff818c2f20 T vic_tx_proc -ffffffff818c30a0 T vic_iff -ffffffff818c31e0 T vic_setlladdr -ffffffff818c3240 T vic_load_txb -ffffffff818c32f0 T vic_init -ffffffff818c3490 T vic_stop -ffffffff818c35d0 T vic_rxrinfo -ffffffff818c36a0 T vic_free_dmamem -ffffffff818c4000 T vmxnet3_match -ffffffff818c4030 T vmxnet3_attach -ffffffff818c48b0 T vmxnet3_intr -ffffffff818c4950 T vmxnet3_intr_event -ffffffff818c49d0 T vmxnet3_intr_intx -ffffffff818c4a40 T vmxnet3_intr_queue -ffffffff818c4ad0 T vmxnet3_dma_init -ffffffff818c4ec0 T vmxnet3_ioctl -ffffffff818c5150 T vmxnet3_start -ffffffff818c54b0 T vmxnet3_watchdog -ffffffff818c5500 T vmxnet3_media_change -ffffffff818c5530 T vmxnet3_media_status -ffffffff818c5640 T vmxnet3_link_state -ffffffff818c5700 T vmxnet3_dma_allocmem -ffffffff818c5850 T vmxnet3_alloc_txring -ffffffff818c5a00 T vmxnet3_alloc_rxring -ffffffff818c5d50 t vmx_dmamem_alloc -ffffffff818c5eb0 T vmxnet3_rxfill_tick -ffffffff818c5f20 T vmxnet3_txinit -ffffffff818c6010 T vmxnet3_rxfill -ffffffff818c6300 T vmxnet3_rxinit -ffffffff818c6440 T vmxnet3_txstop -ffffffff818c6540 T vmxnet3_rxstop -ffffffff818c66a0 T vmxnet3_enable_all_intrs -ffffffff818c6770 T vmxnet3_disable_all_intrs -ffffffff818c6840 T vmxnet3_evintr -ffffffff818c6a10 T vmxnet3_rxintr -ffffffff818c6d80 T vmxnet3_txintr -ffffffff818c6f60 T vmxnet3_init -ffffffff818c72f0 T vmxnet3_rx_csum -ffffffff818c7350 T vmxnet3_iff -ffffffff818c7490 T vmxnet3_stop -ffffffff818c7740 T vmxnet3_reset -ffffffff818c7780 T vmxnet3_tx_offload -ffffffff818c7910 t vmx_kstat_create -ffffffff818c7af0 t vmx_kstat_read -ffffffff818c8000 T vmwpvs_match -ffffffff818c8040 T vmwpvs_attach -ffffffff818c8980 T vmwpvs_scsi_cmd -ffffffff818c8df0 T vmwpvs_intx -ffffffff818c8e70 T vmwpvs_msg_task -ffffffff818c90e0 T vmwpvs_intr -ffffffff818c92d0 T vmwpvs_get_config -ffffffff818c94d0 T vmwpvs_dmamem_zalloc -ffffffff818c9530 T vmwpvs_dmamem_alloc -ffffffff818c96b0 T vmwpvs_ccb_put -ffffffff818c9710 T vmwpvs_setup_rings -ffffffff818c9820 T vmwpvs_setup_msg_ring -ffffffff818c98f0 T vmwpvs_ccb_get -ffffffff818c9970 T vmwpvs_dmamem_free -ffffffff818c99f0 T vmwpvs_cmd -ffffffff818c9a90 T vmwpvs_scsi_cmd_done -ffffffff818c9c70 T vmwpvs_scsi_cmd_poll -ffffffff818ca000 T lii_match -ffffffff818ca030 T lii_attach -ffffffff818ca420 T lii_activate -ffffffff818ca520 T lii_reset -ffffffff818ca7f0 T lii_spi_configure -ffffffff818ca8e0 T lii_eeprom_present -ffffffff818ca970 T lii_eeprom_read -ffffffff818ca9a0 T lii_spi_read -ffffffff818cac60 T lii_read_macaddr -ffffffff818cadc0 T lii_intr -ffffffff818caed0 T lii_alloc_rings -ffffffff818cb0e0 T lii_tick -ffffffff818cb130 T lii_mii_readreg -ffffffff818cb3d0 T lii_mii_writereg -ffffffff818cb670 T lii_mii_statchg -ffffffff818cb6e0 T lii_media_change -ffffffff818cb730 T lii_media_status -ffffffff818cb790 T lii_ioctl -ffffffff818cb920 T lii_start -ffffffff818cbad0 T lii_watchdog -ffffffff818cbb10 T lii_stop -ffffffff818cbb80 T lii_init -ffffffff818cc070 T lii_iff -ffffffff818cc1b0 T lii_tx_put -ffffffff818cc2c0 T lii_free_tx_space -ffffffff818cc300 T lii_rxintr -ffffffff818cc4b0 T lii_txintr -ffffffff818cd000 T ichiic_match -ffffffff818cd030 T ichiic_attach -ffffffff818cd220 T ichiic_intr -ffffffff818cd340 T ichiic_i2c_acquire_bus -ffffffff818cd3a0 T ichiic_i2c_release_bus -ffffffff818cd3f0 T ichiic_i2c_exec -ffffffff818ce000 T viapm_match -ffffffff818ce030 T viapm_attach -ffffffff818ce680 T viapm_intr -ffffffff818ce790 T viapm_i2c_acquire_bus -ffffffff818ce7f0 T viapm_i2c_release_bus -ffffffff818ce840 T viapm_i2c_exec -ffffffff818ceb50 T viapm_refresh_sensor_data -ffffffff818cee50 T viapm_refresh -ffffffff818cee80 T val_to_uK -ffffffff818cef20 T val_to_rpm -ffffffff818cef60 T val_to_uV -ffffffff818cf000 T viapm_get_timecount -ffffffff818d0000 T amdiic_match -ffffffff818d0030 T amdiic_attach -ffffffff818d0200 T amdiic_intr -ffffffff818d02d0 T amdiic_i2c_acquire_bus -ffffffff818d0330 T amdiic_i2c_release_bus -ffffffff818d0380 T amdiic_i2c_exec -ffffffff818d05e0 T amdiic_read -ffffffff818d0750 T amdiic_wait -ffffffff818d07f0 T amdiic_write -ffffffff818d1000 T nviic_match -ffffffff818d1030 T nviic_attach -ffffffff818d1270 T nviic_i2c_acquire_bus -ffffffff818d12c0 T nviic_i2c_release_bus -ffffffff818d1310 T nviic_i2c_exec -ffffffff818d15a0 T nviic_write -ffffffff818d15f0 T nviic_read -ffffffff818d2000 T sdhc_pci_match -ffffffff818d2060 T sdhc_pci_attach -ffffffff818d23b0 T sdhc_pci_activate -ffffffff818d2410 T sdhc_takecontroller -ffffffff818d24b0 T sdhc_ricohfix -ffffffff818d2620 T sdhc_pci_conf_write -ffffffff818d3000 T kate_match -ffffffff818d3170 T kate_attach -ffffffff818d34b0 T kate_refresh -ffffffff818d4000 T km_match -ffffffff818d4050 T km_attach -ffffffff818d40f0 T km_refresh -ffffffff818d5000 T ksmn_match -ffffffff818d5050 T ksmn_attach -ffffffff818d5240 T ksmn_ccd_attach -ffffffff818d5390 T ksmn_refresh -ffffffff818d54e0 T ksmn_read_reg -ffffffff818d6000 t iosf_pci_match -ffffffff818d6060 t iosf_pci_attach -ffffffff818d6100 t iosf_pci_mbi_mdr_rd -ffffffff818d6160 t iosf_pci_mbi_mdr_wr -ffffffff818d7000 T itherm_probe -ffffffff818d7030 T itherm_attach -ffffffff818d73e0 T itherm_activate -ffffffff818d7460 T itherm_enable -ffffffff818d74c0 T itherm_refresh -ffffffff818d74d0 T itherm_refresh_sensor_data -ffffffff818d78c0 T itherm_bias_temperature_sensor -ffffffff818d8000 T pchtemp_match -ffffffff818d8030 T pchtemp_attach -ffffffff818d81a0 T pchtemp_refresh -ffffffff818d9000 T rtsx_pci_match -ffffffff818d9080 T rtsx_pci_attach -ffffffff818da000 T xspd_match -ffffffff818da030 T xspd_attach -ffffffff818da1f0 T xspd_intr -ffffffff818db000 T virtio_pci_match -ffffffff818db080 T virtio_pci_attach -ffffffff818db420 T virtio_pci_detach -ffffffff818db500 T virtio_pci_kick -ffffffff818db560 T virtio_pci_read_device_config_1 -ffffffff818db590 T virtio_pci_read_device_config_2 -ffffffff818db5c0 T virtio_pci_read_device_config_4 -ffffffff818db5f0 T virtio_pci_read_device_config_8 -ffffffff818db670 T virtio_pci_write_device_config_1 -ffffffff818db6a0 T virtio_pci_write_device_config_2 -ffffffff818db6d0 T virtio_pci_write_device_config_4 -ffffffff818db700 T virtio_pci_write_device_config_8 -ffffffff818db770 T virtio_pci_read_queue_size -ffffffff818db7e0 T virtio_pci_setup_queue -ffffffff818dbac0 T virtio_pci_set_status -ffffffff818dbbf0 T virtio_pci_negotiate_features -ffffffff818dbd30 T virtio_pci_poll_intr -ffffffff818dbda0 T virtio_pci_find_cap -ffffffff818dbf40 T virtio_pci_attach_10 -ffffffff818dc3a0 T virtio_pci_attach_09 -ffffffff818dc4e0 T virtio_pci_adjust_config_region -ffffffff818dc580 T virtio_pci_setup_msix -ffffffff818dc910 T virtio_pci_legacy_intr -ffffffff818dc9b0 T virtio_pci_legacy_intr_mpsafe -ffffffff818dca40 T virtio_pci_free_irqs -ffffffff818dcc80 T virtio_pci_negotiate_features_10 -ffffffff818dceb0 T virtio_pci_msix_establish -ffffffff818dcf80 T virtio_pci_set_msix_queue_vector -ffffffff818dd000 T virtio_pci_set_msix_config_vector -ffffffff818dd040 T virtio_pci_config_intr -ffffffff818dd080 T virtio_pci_shared_queue_intr -ffffffff818dd090 T virtio_pci_queue_intr -ffffffff818de000 T dwiic_pci_match -ffffffff818de030 T dwiic_pci_attach -ffffffff818de350 T dwiic_pci_activate -ffffffff818de3c0 T dwiic_pci_bus_scan -ffffffff818df000 T bwfm_pci_buscore_read -ffffffff818df060 T bwfm_pci_buscore_write -ffffffff818df0d0 T bwfm_pci_buscore_prepare -ffffffff818df100 T bwfm_pci_buscore_reset -ffffffff818df2f0 T bwfm_pci_buscore_activate -ffffffff818df320 T bwfm_pci_preinit -ffffffff818e0130 T bwfm_pci_stop -ffffffff818e01c0 T bwfm_pci_txcheck -ffffffff818e0280 T bwfm_pci_txdata -ffffffff818e05d0 T bwfm_pci_msgbuf_query_dcmd -ffffffff818e0a00 T bwfm_pci_msgbuf_set_dcmd -ffffffff818e0a50 T bwfm_pci_match -ffffffff818e0a80 T bwfm_pci_attach -ffffffff818e0cf0 T bwfm_pci_detach -ffffffff818e0d30 T bwfm_pci_activate -ffffffff818e0ee0 T bwfm_pci_intr -ffffffff818e1140 T bwfm_pci_select_core -ffffffff818e1220 T bwfm_pci_load_microcode -ffffffff818e16b0 T bwfm_pci_dmamem_alloc -ffffffff818e1850 T bwfm_pci_setup_ring -ffffffff818e1a50 T bwfm_pci_intr_enable -ffffffff818e1aa0 T bwfm_pci_hostready -ffffffff818e1b10 T bwfm_pci_fill_rx_rings -ffffffff818e1b60 T bwfm_pci_dmamem_free -ffffffff818e1bd0 T bwfm_pci_cleanup -ffffffff818e2240 T bwfm_pci_send_mb_data -ffffffff818e2360 T bwfm_pci_intmask -ffffffff818e23a0 T bwfm_pci_pktid_avail -ffffffff818e2420 T bwfm_pci_pktid_new -ffffffff818e2570 T bwfm_pci_pktid_free -ffffffff818e2620 T bwfm_pci_fill_rx_buf_ring -ffffffff818e2960 T bwfm_pci_fill_rx_ioctl_ring -ffffffff818e2cc0 T bwfm_pci_ring_write_reserve -ffffffff818e2db0 T bwfm_pci_ring_write_cancel -ffffffff818e2df0 T bwfm_pci_ring_write_commit -ffffffff818e2ed0 T bwfm_pci_ring_write_rptr -ffffffff818e2f50 T bwfm_pci_ring_write_wptr -ffffffff818e2fd0 T bwfm_pci_setup_flowring -ffffffff818e3120 T bwfm_pci_ring_bell -ffffffff818e3160 T bwfm_pci_ring_update_rptr -ffffffff818e3210 T bwfm_pci_ring_update_wptr -ffffffff818e32c0 T bwfm_pci_ring_write_reserve_multi -ffffffff818e33e0 T bwfm_pci_ring_read_avail -ffffffff818e34e0 T bwfm_pci_ring_read_commit -ffffffff818e3570 T bwfm_pci_ring_rx -ffffffff818e3770 T bwfm_pci_msg_rx -ffffffff818e3d50 T bwfm_pci_flowring_delete_cb -ffffffff818e3e00 T bwfm_pci_msgbuf_rxioctl -ffffffff818e3ef0 T bwfm_pci_intr_status -ffffffff818e3f30 T bwfm_pci_intr_ack -ffffffff818e3f70 T bwfm_pci_flowring_lookup -ffffffff818e40e0 T bwfm_pci_flowring_create -ffffffff818e4210 T bwfm_pci_flowring_create_cb -ffffffff818e4550 T bwfm_pci_flowring_delete -ffffffff818e4820 T bwfm_pci_msgbuf_h2d_mb_write -ffffffff818e4a30 T bwfm_pci_handle_mb_data -ffffffff818e4b00 T bwfm_pci_intr_disable -ffffffff818e5000 T ccp_pci_match -ffffffff818e5030 T ccp_pci_attach -ffffffff818e6000 T bnxt_match -ffffffff818e6030 T bnxt_attach -ffffffff818e6be0 T bnxt_dmamem_alloc -ffffffff818e6d70 T bnxt_dmamem_free -ffffffff818e6e00 T bnxt_hwrm_ver_get -ffffffff818e6f50 T bnxt_hwrm_nvm_get_dev_info -ffffffff818e70a0 T bnxt_hwrm_func_drv_rgtr -ffffffff818e71c0 T bnxt_hwrm_func_rgtr_async_events -ffffffff818e72e0 T bnxt_hwrm_func_qcaps -ffffffff818e73c0 T bnxt_admin_intr -ffffffff818e75b0 T bnxt_intr -ffffffff818e7a60 T bnxt_hwrm_func_qcfg -ffffffff818e7b10 T bnxt_hwrm_queue_qportcfg -ffffffff818e7be0 T bnxt_hwrm_func_reset -ffffffff818e7c90 T bnxt_mark_cpr_invalid -ffffffff818e7cf0 T bnxt_hwrm_ring_alloc -ffffffff818e7ea0 T bnxt_cfg_async_cr -ffffffff818e7fa0 T bnxt_write_cp_doorbell -ffffffff818e7fe0 T bnxt_set_cp_ring_aggint -ffffffff818e80c0 T bnxt_ioctl -ffffffff818e8250 T bnxt_start -ffffffff818e8780 T bnxt_watchdog -ffffffff818e87b0 T bnxt_media_change -ffffffff818e8900 T bnxt_media_status -ffffffff818e8920 T bnxt_refill -ffffffff818e8980 T bnxt_media_autonegotiate -ffffffff818e8a70 T bnxt_hwrm_port_phy_qcfg -ffffffff818e8ef0 T bnxt_free_slots -ffffffff818e8f90 T bnxt_hwrm_cmd_hdr_init -ffffffff818e8fe0 T hwrm_send_message -ffffffff818e9060 T bnxt_queue_up -ffffffff818e9be0 T bnxt_hwrm_stat_ctx_alloc -ffffffff818e9ce0 T bnxt_write_tx_doorbell -ffffffff818e9d50 T bnxt_write_rx_doorbell -ffffffff818e9dd0 T bnxt_hwrm_ring_grp_alloc -ffffffff818e9ed0 T bnxt_rx_fill -ffffffff818e9fe0 T bnxt_hwrm_ring_grp_free -ffffffff818ea0c0 T bnxt_hwrm_ring_free -ffffffff818ea1b0 T bnxt_hwrm_stat_ctx_free -ffffffff818ea2a0 T bnxt_queue_down -ffffffff818ea9c0 T bnxt_up -ffffffff818eaf50 T bnxt_hwrm_vnic_ctx_alloc -ffffffff818eb030 T bnxt_hwrm_vnic_alloc -ffffffff818eb130 T bnxt_hwrm_vnic_cfg -ffffffff818eb270 T bnxt_hwrm_vnic_cfg_placement -ffffffff818eb340 T bnxt_hwrm_set_filter -ffffffff818eb4d0 T bnxt_hwrm_vnic_rss_cfg -ffffffff818eb5b0 T bnxt_iff -ffffffff818eb720 T bnxt_hwrm_vnic_free -ffffffff818eb810 T bnxt_hwrm_vnic_ctx_free -ffffffff818eb900 T bnxt_down -ffffffff818ebcd0 T bnxt_hwrm_free_filter -ffffffff818ebdb0 T bnxt_hwrm_cfa_l2_set_rx_mask -ffffffff818ebe90 T bnxt_rxrinfo -ffffffff818ebfe0 T bnxt_get_sffpage -ffffffff818ec2f0 T bnxt_load_mbuf -ffffffff818ec3a0 T bnxt_handle_async_event -ffffffff818ec3f0 T bnxt_cpr_next_cmpl -ffffffff818ec460 T bnxt_cpr_commit -ffffffff818ec490 T bnxt_cpr_rollback -ffffffff818ec4c0 T bnxt_write_cp_doorbell_index -ffffffff818ec540 T bnxt_rx -ffffffff818ec7e0 T bnxt_txeof -ffffffff818ec910 T bnxt_get_media_type -ffffffff818ece70 T bnxt_add_media_type -ffffffff818ed030 T _hwrm_send_message -ffffffff818efd50 T bnxt_rx_fill_slots -ffffffff818eff30 T bnxt_hwrm_err_map -ffffffff818eff70 T _bnxt_hwrm_set_async_event_bit -ffffffff818f0000 t mcx_match -ffffffff818f0030 t mcx_attach -ffffffff818f0c40 T mcx_rx_fill -ffffffff818f0e90 T mcx_load_mbuf -ffffffff818f0f40 t mcx_dmamem_alloc -ffffffff818f10a0 t mcx_init_wait -ffffffff818f1130 t mcx_enable_hca -ffffffff818f1310 t mcx_issi -ffffffff818f1680 t mcx_pages -ffffffff818f1f60 t mcx_hca_max_caps -ffffffff818f24e0 t mcx_hca_set_caps -ffffffff818f29c0 t mcx_init_hca -ffffffff818f2b90 t mcx_set_driver_version -ffffffff818f2ef0 t mcx_iff -ffffffff818f3330 t mcx_alloc_uar -ffffffff818f3520 t mcx_alloc_pd -ffffffff818f3700 t mcx_alloc_tdomain -ffffffff818f38e0 t mcx_admin_intr -ffffffff818f3a90 t mcx_create_eq -ffffffff818f4030 t mcx_query_nic_vport_context -ffffffff818f43e0 t mcx_query_special_contexts -ffffffff818f45c0 t mcx_set_port_mtu -ffffffff818f46d0 t mcx_ioctl -ffffffff818f69a0 t mcx_start -ffffffff818f6ea0 t mcx_watchdog -ffffffff818f6ed0 t mcx_media_change -ffffffff818f7200 t mcx_media_status -ffffffff818f73a0 t mcx_media_add_types -ffffffff818f7510 t mcx_refill -ffffffff818f7580 t mcx_cq_intr -ffffffff818f7b60 t mcx_calibrate -ffffffff818f7d00 t mcx_port_change -ffffffff818f7f00 t mcx_kstat_attach -ffffffff818f82d0 t mcx_teardown_hca -ffffffff818f84c0 t mcx_dmamem_free -ffffffff818f8530 t mcx_set_issi -ffffffff818f86e0 t mcx_set_flow_table_entry_mac -ffffffff818f8bb0 t mcx_delete_flow_table_entry -ffffffff818f9030 t mcx_access_hca_reg -ffffffff818f9440 t mcx_cmdq_exec -ffffffff818f96c0 t mcx_down -ffffffff818fa680 t mcx_create_flow_table -ffffffff818faa30 t mcx_create_flow_group -ffffffff818faf00 t mcx_set_flow_table_root -ffffffff818fb280 t mcx_create_rqt -ffffffff818fb680 t mcx_create_tir_direct -ffffffff818fb9a0 t mcx_create_tir_indirect -ffffffff818fbce0 t mcx_set_flow_table_entry_proto -ffffffff818fc1c0 t mcx_ready_sq -ffffffff818fc550 t mcx_ready_rq -ffffffff818fc8e0 t mcx_calibrate_first -ffffffff818fc9d0 t mcx_create_rq -ffffffff818fcee0 t mcx_destroy_sq -ffffffff818fd190 t mcx_destroy_cq -ffffffff818fd450 t mcx_destroy_flow_table -ffffffff818fd7c0 t mcx_kstat_attach_ppcnt -ffffffff818fd8f0 t mcx_kstat_ppcnt_read -ffffffff818fda10 t mcx_kstat_mtmp_read -ffffffff818fdba0 t mcx_kstat_queue_read -ffffffff818feb60 t mcx_timecounter_read -ffffffff818ff000 t iavf_match -ffffffff818ff030 t iavf_attach -ffffffff818ff8a0 t iavf_reset -ffffffff818ffb60 t iavf_dmamem_alloc -ffffffff818ffcc0 t iavf_arq_fill -ffffffff818fff80 t iavf_arq_timeout -ffffffff818fffb0 t iavf_init_admin_queue -ffffffff81900160 t iavf_get_version -ffffffff81900360 t iavf_get_vf_resources -ffffffff81900530 t iavf_config_irq_map -ffffffff81900710 t iavf_intr -ffffffff81900d90 t iavf_ioctl -ffffffff819012f0 t iavf_start -ffffffff81901650 t iavf_watchdog -ffffffff81901680 t iavf_media_change -ffffffff819016b0 t iavf_media_status -ffffffff81901740 t iavf_dmamem_free -ffffffff819017b0 t iavf_arq_unfill -ffffffff819018b0 t iavf_down -ffffffff81901c40 t iavf_up -ffffffff81902610 t iavf_queue_select -ffffffff81902800 t iavf_txr_free -ffffffff81902900 t iavf_rxr_free -ffffffff81902a10 t iavf_rxfill -ffffffff81902d20 t iavf_rxrefill -ffffffff81902d40 t iavf_process_arq -ffffffff819031c0 t iavf_add_del_addr -ffffffff81904000 T rge_match -ffffffff81904030 T rge_attach -ffffffff819044c0 T rge_activate -ffffffff81904600 T rge_intr -ffffffff819048f0 T rge_config_imtype -ffffffff81904960 T rge_chipinit -ffffffff81904a70 T rge_get_macaddr -ffffffff81904c40 T rge_allocmem -ffffffff81905040 T rge_ioctl -ffffffff819051f0 T rge_start -ffffffff819053d0 T rge_watchdog -ffffffff81905410 T rge_wol -ffffffff81905640 T rge_tick -ffffffff819056c0 T rge_txstart -ffffffff819056f0 T rge_ifmedia_upd -ffffffff81905cc0 T rge_ifmedia_sts -ffffffff81905db0 T rge_add_media_types -ffffffff81905e60 T rge_kstat_attach -ffffffff81906140 T rge_wol_power -ffffffff81906220 T rge_rxeof -ffffffff81906660 T rge_txeof -ffffffff81906870 T rge_init -ffffffff81907f20 T rge_setup_intr -ffffffff81908090 T rge_encap -ffffffff81908360 T rge_stop -ffffffff81908640 T rge_iff -ffffffff819087c0 T rge_set_macaddr -ffffffff81908890 T rge_rx_list_init -ffffffff81908950 T rge_tx_list_init -ffffffff81908a20 T rge_phy_config -ffffffff819096d0 T rge_disable_aspm_clkreq -ffffffff819097d0 T rge_read_csi -ffffffff81909880 T rge_write_csi -ffffffff81909950 T rge_write_mac_ocp -ffffffff819099a0 T rge_read_mac_ocp -ffffffff81909a20 T rge_hw_reset -ffffffff81909b20 T rge_write_phy_ocp -ffffffff81909be0 T rge_read_phy_ocp -ffffffff81909c90 T rge_read_phy -ffffffff81909d60 T rge_write_phy -ffffffff81909e40 T rge_get_link_status -ffffffff81909ea0 T rge_newbuf -ffffffff8190a030 T rge_discard_rxbuf -ffffffff8190a0a0 T rge_fill_rx_ring -ffffffff8190a120 T rge_reset -ffffffff8190a390 T rge_exit_oob -ffffffff8190ab90 T rge_set_phy_power -ffffffff8190adf0 T rge_hw_init -ffffffff8190b540 T rge_ephy_config -ffffffff8190b590 T rge_ephy_config_mac_cfg3 -ffffffff8190b7e0 T rge_ephy_config_mac_cfg5 -ffffffff8190b8c0 T rge_write_ephy -ffffffff8190bb20 T rge_read_ephy -ffffffff8190bda0 T rge_phy_config_mac_cfg3 -ffffffff8190d8d0 T rge_phy_config_mac_cfg5 -ffffffff8190e420 T rge_patch_phy_mcu -ffffffff8190e740 T rge_phy_config_mcu -ffffffff8190ef40 T rge_switch_mcu_ram_page -ffffffff8190efd0 T rge_disable_phy_ocp_pwrsave -ffffffff8190f1a0 T rge_disable_hw_im -ffffffff8190f1d0 T rge_disable_sim_im -ffffffff8190f230 T rge_setup_sim_im -ffffffff8190f2b0 T rge_link_state -ffffffff8190f330 t rge_kstat_read -ffffffff8190f4d0 t rge_kstat_copy -ffffffff81910000 T igc_match -ffffffff81910030 T igc_attach -ffffffff81910360 T igc_detach -ffffffff81910550 T igc_identify_hardware -ffffffff819105c0 T igc_allocate_pci_resources -ffffffff819106e0 T igc_allocate_queues -ffffffff81910bd0 T igc_is_valid_ether_addr -ffffffff81910c30 T igc_allocate_msix -ffffffff81910e70 T igc_setup_interface -ffffffff819110b0 T igc_reset -ffffffff819111f0 T igc_update_link_status -ffffffff81911310 T igc_get_hw_control -ffffffff81911370 T igc_kstat_attach -ffffffff81911530 T igc_release_hw_control -ffffffff81911590 T igc_free_pci_resources -ffffffff81911670 T igc_stop -ffffffff81911870 T igc_free_transmit_structures -ffffffff819118f0 T igc_free_receive_structures -ffffffff819119a0 T igc_setup_msix -ffffffff81911a30 T igc_dma_malloc -ffffffff81911b90 T igc_rxrefill -ffffffff81911c60 T igc_dma_free -ffffffff81911d10 T igc_init_dmac -ffffffff81911fb0 T igc_intr_queue -ffffffff819120c0 T igc_intr_link -ffffffff81912180 T igc_ioctl -ffffffff81912460 T igc_start -ffffffff81912830 T igc_watchdog -ffffffff81912860 T igc_media_change -ffffffff81912970 T igc_media_status -ffffffff81912ab0 T igc_init -ffffffff81912ef0 T igc_setup_transmit_structures -ffffffff81912fb0 T igc_initialize_transmit_unit -ffffffff819131d0 T igc_setup_receive_structures -ffffffff81913330 T igc_initialize_receive_unit -ffffffff81913720 T igc_iff -ffffffff81913870 T igc_configure_queues -ffffffff81913a80 T igc_rxfill -ffffffff81913bc0 T igc_enable_intr -ffffffff81913c90 T igc_tx_ctx_setup -ffffffff81913e90 T igc_txeof -ffffffff81914050 T igc_disable_intr -ffffffff819140f0 T igc_rxrinfo -ffffffff81914220 T igc_get_buf -ffffffff81914360 T igc_rxeof -ffffffff81914700 T igc_rx_checksum -ffffffff81914750 T igc_set_queues -ffffffff81914830 T igc_enable_queue -ffffffff81914860 T igc_allocate_transmit_buffers -ffffffff81914980 T igc_setup_transmit_ring -ffffffff81914ac0 T igc_free_transmit_buffers -ffffffff81914be0 T igc_allocate_receive_buffers -ffffffff81914d10 T igc_setup_receive_ring -ffffffff81914dd0 T igc_initialize_rss_mapping -ffffffff81914ff0 T igc_free_receive_buffers -ffffffff81915100 t igc_kstat_tick -ffffffff81915150 t igc_kstat_read -ffffffff819151a0 t igc_stat_read -ffffffff81916000 T igc_init_mac_params -ffffffff81916040 T igc_init_nvm_params -ffffffff81916080 T igc_init_phy_params -ffffffff819160c0 T igc_set_mac_type -ffffffff81916160 T igc_setup_init_funcs -ffffffff819162c0 T igc_update_mc_addr_list -ffffffff81916300 T igc_check_for_link -ffffffff81916340 T igc_reset_hw -ffffffff81916380 T igc_init_hw -ffffffff819163c0 T igc_get_speed_and_duplex -ffffffff81916400 T igc_rar_set -ffffffff81916440 T igc_check_reset_block -ffffffff81916480 T igc_get_phy_info -ffffffff819164c0 T igc_phy_hw_reset -ffffffff81916500 T igc_read_mac_addr -ffffffff81916530 T igc_validate_nvm_checksum -ffffffff81917000 T igc_acquire_phy_base -ffffffff81917030 T igc_release_phy_base -ffffffff81917060 T igc_init_hw_base -ffffffff81917150 T igc_power_down_phy_copper_base -ffffffff81918000 T igc_init_nvm_params_i225 -ffffffff81918170 T igc_acquire_nvm_i225 -ffffffff81918240 T igc_release_nvm_i225 -ffffffff819182b0 T igc_get_flash_presence_i225 -ffffffff81918300 T igc_read_nvm_srrd_i225 -ffffffff819183e0 T igc_write_nvm_srwr_i225 -ffffffff819185a0 T igc_validate_nvm_checksum_i225 -ffffffff81918630 T igc_update_nvm_checksum_i225 -ffffffff819187c0 T igc_init_mac_params_i225 -ffffffff81918880 T igc_reset_hw_i225 -ffffffff819189a0 T igc_init_hw_i225 -ffffffff819189b0 T igc_check_for_link_i225 -ffffffff81918a70 T igc_acquire_swfw_sync_i225 -ffffffff81918b50 T igc_release_swfw_sync_i225 -ffffffff81918bd0 T igc_setup_copper_link_i225 -ffffffff81918c60 T igc_init_phy_params_i225 -ffffffff81918d40 T igc_get_hw_semaphore_i225 -ffffffff81918ef0 T __igc_write_nvm_srwr -ffffffff81919020 T igc_update_flash_i225 -ffffffff819193f0 T igc_set_flsw_flash_burst_counter_i225 -ffffffff81919450 T igc_write_erase_flash_command_i225 -ffffffff81919550 T igc_pool_flash_update_done_i225 -ffffffff819195e0 T igc_set_ltr_i225 -ffffffff81919850 T igc_init_function_pointers_i225 -ffffffff819198c0 T igc_set_eee_i225 -ffffffff8191a000 T igc_init_mac_ops_generic -ffffffff8191a050 T igc_null_ops_generic -ffffffff8191a080 T igc_config_collision_dist_generic -ffffffff8191a0f0 T igc_rar_set_generic -ffffffff8191a1d0 T igc_write_vfta_generic -ffffffff8191a220 T igc_init_rx_addrs_generic -ffffffff8191a2c0 T igc_check_alt_mac_addr_generic -ffffffff8191a440 T igc_hash_mc_addr_generic -ffffffff8191a4e0 T igc_update_mc_addr_list_generic -ffffffff8191a630 T igc_clear_hw_cntrs_base_generic -ffffffff8191aa20 T igc_setup_link_generic -ffffffff8191abb0 T igc_set_fc_watermarks_generic -ffffffff8191ac60 T igc_force_mac_fc_generic -ffffffff8191ad20 T igc_config_fc_after_link_up_generic -ffffffff8191aeb0 T igc_get_speed_and_duplex_copper_generic -ffffffff8191af50 T igc_put_hw_semaphore_generic -ffffffff8191afa0 T igc_get_auto_rd_done_generic -ffffffff8191b1f0 T igc_disable_pcie_master_generic -ffffffff8191c000 T igc_init_nvm_ops_generic -ffffffff8191c080 T igc_null_read_nvm -ffffffff8191c0b0 T igc_null_nvm_generic -ffffffff8191c0e0 T igc_reload_nvm_generic -ffffffff8191c160 T igc_null_write_nvm -ffffffff8191c190 T igc_poll_eerd_eewr_done -ffffffff8191c230 T igc_read_nvm_eerd -ffffffff8191c360 T igc_read_mac_addr_generic -ffffffff8191c440 T igc_validate_nvm_checksum_generic -ffffffff8191d000 T igc_init_phy_ops_generic -ffffffff8191d0f0 T igc_null_set_page -ffffffff8191d120 T igc_null_read_reg -ffffffff8191d150 T igc_null_phy_generic -ffffffff8191d180 T igc_null_lplu_state -ffffffff8191d1b0 T igc_null_write_reg -ffffffff8191d1e0 T igc_check_reset_block_generic -ffffffff8191d240 T igc_get_phy_id -ffffffff8191d2f0 T igc_read_phy_reg_mdic -ffffffff8191d400 T igc_write_phy_reg_mdic -ffffffff8191d500 T igc_phy_setup_autoneg -ffffffff8191d700 T igc_copper_link_autoneg -ffffffff8191d830 T igc_wait_autoneg -ffffffff8191d8f0 T igc_setup_copper_link_generic -ffffffff8191da00 T igc_phy_has_link_generic -ffffffff8191db10 T igc_check_downshift_generic -ffffffff8191db40 T igc_phy_hw_reset_generic -ffffffff8191dce0 T igc_power_up_phy_copper -ffffffff8191dd70 T igc_power_down_phy_copper -ffffffff8191de00 T igc_write_phy_reg_gpy -ffffffff8191e000 T igc_write_xmdio_reg -ffffffff8191e100 T igc_read_phy_reg_gpy -ffffffff8191e300 T igc_read_xmdio_reg -ffffffff8191e3f0 T __igc_access_xmdio_reg -ffffffff8191f000 T ngbe_match -ffffffff8191f030 T ngbe_attach -ffffffff8191f540 T ngbe_detach -ffffffff8191f790 T ngbe_allocate_pci_resources -ffffffff8191f890 T ngbe_allocate_queues -ffffffff8191fd90 T ngbe_allocate_isb -ffffffff8191fe20 T ngbe_init_shared_code -ffffffff819200f0 T ngbe_check_flash_load -ffffffff81920390 T ngbe_allocate_msix -ffffffff819205b0 T ngbe_setup_interface -ffffffff819207c0 T ngbe_free_isb -ffffffff819208a0 T ngbe_free_transmit_structures -ffffffff81920920 T ngbe_free_receive_structures -ffffffff819209d0 T ngbe_free_pci_resources -ffffffff81920a60 T ngbe_stop -ffffffff81920fd0 T ngbe_release_hw_control -ffffffff81921050 T ngbe_init -ffffffff81921560 T ngbe_setup_isb -ffffffff819215d0 T ngbe_configure_pb -ffffffff819216b0 T ngbe_iff -ffffffff819218a0 T ngbe_setup_vlan_hw_support -ffffffff81921960 T ngbe_setup_transmit_structures -ffffffff81921a20 T ngbe_initialize_transmit_unit -ffffffff81921da0 T ngbe_setup_receive_structures -ffffffff81921ea0 T ngbe_initialize_receive_unit -ffffffff81922360 T ngbe_get_hw_control -ffffffff819223e0 T ngbe_setup_gpie -ffffffff81922410 T ngbe_configure_ivars -ffffffff81922630 T ngbe_non_sfp_link_config -ffffffff819226e0 T ngbe_enable_intr -ffffffff81922890 t NGBE_WRITE_REG_MASK -ffffffff81922930 T ngbe_ioctl -ffffffff81922b90 T ngbe_rxrinfo -ffffffff81922ce0 T ngbe_disable_intr -ffffffff81922da0 T ngbe_media_change -ffffffff81922e40 T ngbe_media_status -ffffffff81922f50 T ngbe_update_link_status -ffffffff81923180 T ngbe_rxfill -ffffffff819232c0 T ngbe_get_buf -ffffffff819233f0 T ngbe_start -ffffffff819235a0 T ngbe_encap -ffffffff819237c0 T ngbe_disable_pcie_master -ffffffff81923880 T ngbe_reset -ffffffff819238e0 T ngbe_set_rx_drop_en -ffffffff819239f0 T ngbe_watchdog -ffffffff81923ac0 T ngbe_setup_msix -ffffffff81923b50 T ngbe_intr_queue -ffffffff81923c50 T ngbe_intr_link -ffffffff81923d40 T ngbe_dma_malloc -ffffffff81923ea0 T ngbe_dma_free -ffffffff81923f50 T ngbe_rxrefill -ffffffff81924000 T ngbe_free_receive_buffers -ffffffff81924110 T ngbe_free_transmit_buffers -ffffffff81924230 T ngbe_allocate_receive_buffers -ffffffff81924360 T ngbe_allocate_transmit_buffers -ffffffff81924480 T ngbe_setup_receive_ring -ffffffff81924570 T ngbe_setup_transmit_ring -ffffffff819246b0 T ngbe_addr_list_itr -ffffffff819246f0 T ngbe_setup_psrtype -ffffffff81924720 T ngbe_initialize_rss_mapping -ffffffff81924940 T ngbe_handle_phy_event -ffffffff819249e0 T ngbe_enable_queue -ffffffff81924a40 T ngbe_rxeof -ffffffff81924db0 T ngbe_txeof -ffffffff81924f50 T ngbe_init_eeprom_params -ffffffff81924fd0 T ngbe_init_hw -ffffffff81925040 T ngbe_init_ops -ffffffff81925250 T ngbe_phy_reset -ffffffff819253d0 T ngbe_phy_read_reg -ffffffff81925470 T ngbe_phy_write_reg -ffffffff81925510 T ngbe_phy_setup_link -ffffffff81925770 T ngbe_phy_led_ctrl -ffffffff81925860 T ngbe_phy_check_overtemp -ffffffff819258b0 T ngbe_phy_identify -ffffffff819258f0 T ngbe_phy_init -ffffffff81925b10 T ngbe_phy_check_event -ffffffff81925b70 T ngbe_phy_get_advertised_pause -ffffffff81925bd0 T ngbe_phy_get_lp_advertised_pause -ffffffff81925c80 T ngbe_phy_set_pause_advertisement -ffffffff81925d00 T ngbe_phy_setup -ffffffff81925e90 T ngbe_clear_hw_cntrs -ffffffff819260d0 T ngbe_get_mac_addr -ffffffff81926180 T ngbe_stop_adapter -ffffffff819263c0 T ngbe_get_bus_info -ffffffff81926470 T ngbe_set_lan_id_multi_port_pcie -ffffffff819264d0 T ngbe_acquire_swfw_sync -ffffffff81926730 T ngbe_release_swfw_sync -ffffffff81926870 T ngbe_reset_hw -ffffffff81926ab0 T ngbe_get_media_type -ffffffff81926ae0 T ngbe_disable_sec_rx_path -ffffffff81926ba0 T ngbe_enable_sec_rx_path -ffffffff81926c10 T ngbe_enable_rx_dma -ffffffff81926c60 T ngbe_start_hw -ffffffff81926d20 T ngbe_set_rar -ffffffff81926e70 T ngbe_init_rx_addrs -ffffffff81927030 T ngbe_update_mc_addr_list -ffffffff819271e0 T ngbe_enable_rx -ffffffff81927320 T ngbe_disable_rx -ffffffff81927440 T ngbe_clear_vfta -ffffffff81927540 T ngbe_init_uta_tables -ffffffff819275c0 T ngbe_fc_enable -ffffffff81927860 T ngbe_setup_fc -ffffffff81927940 T ngbe_check_mac_link -ffffffff81927ab0 T ngbe_set_rxpba -ffffffff81927b50 T ngbe_eepromcheck_cap -ffffffff81927c10 T ngbe_phy_led_oem_chk -ffffffff81927d00 T ngbe_set_fw_drv_ver -ffffffff81927e20 T ngbe_init_thermal_sensor_thresh -ffffffff81927ee0 T ngbe_validate_mac_addr -ffffffff81927f40 T ngbe_fc_autoneg -ffffffff819280d0 T ngbe_fc_autoneg_copper -ffffffff819281e0 T ngbe_negotiate_fc -ffffffff81928290 T ngbe_fmgr_cmd_op -ffffffff81928370 T ngbe_flash_read_dword -ffffffff81928460 T ngbe_calculate_checksum -ffffffff81928520 T ngbe_check_internal_phy_id -ffffffff81928660 T ngbe_gphy_wait_mdio_access_on -ffffffff819286e0 T ngbe_check_mng_access -ffffffff81928730 T ngbe_mng_present -ffffffff81928780 T ngbe_check_reset_blocked -ffffffff81928800 T ngbe_set_ivar -ffffffff819288f0 T ngbe_pbthresh_setup -ffffffff819289b0 T ngbe_disable_queue -ffffffff81928a10 T ngbe_host_interface_command -ffffffff81928de0 T ngbe_tx_ctx_setup -ffffffff81928e70 T ngbe_read_pci_cfg_word -ffffffff81928ed0 T ngbe_set_pci_config_data -ffffffff81928f60 T ngbe_get_copper_link_capabilities -ffffffff81928fb0 T ngbe_get_eeprom_semaphore -ffffffff81929110 T ngbe_release_eeprom_semaphore -ffffffff819291c0 T ngbe_gphy_dis_eee -ffffffff819292e0 T ngbe_gphy_efuse_calibration -ffffffff81929690 T ngbe_hpbthresh -ffffffff81929720 T ngbe_lpbthresh -ffffffff81929760 T ngbe_mta_vector -ffffffff819297b0 T ngbe_setup_copper_link -ffffffff81929800 T ngbe_reset_misc -ffffffff81929b60 T ngbe_set_mta -ffffffff81929bd0 T ngbe_rx_checksum -ffffffff8192a000 T com_pci_match -ffffffff8192a030 T com_pci_attach -ffffffff8192a310 T com_pci_detach -ffffffff8192a3b0 T com_pci_activate -ffffffff8192a4a0 T com_pci_intr_designware -ffffffff8192b000 T agpdev_print -ffffffff8192b050 T agpbus_probe -ffffffff8192b0c0 T agpvga_match -ffffffff8192b130 T agp_attach_bus -ffffffff8192b1b0 T agp_probe -ffffffff8192b1e0 T agp_attach -ffffffff8192b300 T agp_alloc_gatt -ffffffff8192b4c0 T agp_alloc_dmamem -ffffffff8192b5f0 T agp_free_dmamem -ffffffff8192b650 T agp_free_gatt -ffffffff8192b6d0 T agp_generic_enable -ffffffff8192b860 T agp_find_device -ffffffff8192b8b0 T agp_state -ffffffff8192b8e0 T agp_get_info -ffffffff8192b980 T agp_acquire -ffffffff8192b9d0 T agp_release -ffffffff8192ba20 T agp_enable -ffffffff8192ba50 T agp_mmap -ffffffff8192c000 T agp_i810_probe -ffffffff8192c060 T agp_i810_attach -ffffffff8192c570 T agp_i810_activate -ffffffff8192c5b0 T agp_i810_bind_page -ffffffff8192c670 T agp_i810_unbind_page -ffffffff8192c730 T agp_i810_flush_tlb -ffffffff8192c760 T agp_i810_enable -ffffffff8192c790 T agp_i810_get_chiptype -ffffffff8192ca00 T intagp_gmch_match -ffffffff8192ca60 T agp_i810_configure -ffffffff8192cba0 T intagp_write_gtt -ffffffff8192d000 T dma_resv_init -ffffffff8192d060 T dma_resv_fini -ffffffff8192d160 T dma_resv_reserve_fences -ffffffff8192d320 T dma_resv_add_fence -ffffffff8192d4a0 T dma_resv_replace_fences -ffffffff8192d550 T dma_resv_iter_first_unlocked -ffffffff8192d5e0 t dma_resv_iter_walk_unlocked -ffffffff8192d6d0 T dma_resv_iter_next_unlocked -ffffffff8192d760 T dma_resv_iter_first -ffffffff8192d7f0 T dma_resv_iter_next -ffffffff8192d870 T dma_resv_copy_fences -ffffffff8192dc00 T dma_resv_get_fences -ffffffff8192dff0 T dma_resv_get_singleton -ffffffff8192e0f0 T dma_resv_wait_timeout -ffffffff8192e360 T dma_resv_test_signaled -ffffffff8192e4b0 T dma_resv_describe -ffffffff8192f000 T drm_legacy_agp_info -ffffffff8192f0b0 T drm_legacy_agp_acquire -ffffffff8192f120 T drm_legacy_agp_release -ffffffff8192f180 T drm_legacy_agp_enable -ffffffff8192f1f0 T drm_legacy_agp_takedown -ffffffff8192f260 T drm_legacy_agp_init -ffffffff81930000 T devm_aperture_acquire_from_firmware -ffffffff81930050 T drm_aperture_remove_conflicting_framebuffers -ffffffff81930080 T drm_aperture_remove_conflicting_pci_framebuffers -ffffffff81931000 T __drm_crtc_commit_free -ffffffff81931020 T drm_crtc_commit_wait -ffffffff819311c0 T drm_atomic_state_default_release -ffffffff81931220 T drm_atomic_state_init -ffffffff81931340 T drm_atomic_state_alloc -ffffffff819313e0 T drm_atomic_state_default_clear -ffffffff819316e0 T drm_atomic_state_clear -ffffffff81931710 T __drm_atomic_state_free -ffffffff819317e0 T drm_atomic_get_crtc_state -ffffffff81931930 T drm_atomic_get_plane_state -ffffffff81931b20 T drm_atomic_private_obj_init -ffffffff81931c10 T drm_atomic_private_obj_fini -ffffffff81931ca0 T drm_atomic_get_private_obj_state -ffffffff81931e50 T drm_atomic_get_old_private_obj_state -ffffffff81931eb0 T drm_atomic_get_new_private_obj_state -ffffffff81931f10 T drm_atomic_get_old_connector_for_encoder -ffffffff81931f80 T drm_atomic_get_new_connector_for_encoder -ffffffff81931ff0 T drm_atomic_get_old_crtc_for_encoder -ffffffff81932090 T drm_atomic_get_new_crtc_for_encoder -ffffffff81932130 T drm_atomic_get_connector_state -ffffffff81932340 T drm_atomic_get_bridge_state -ffffffff81932350 T drm_atomic_get_old_bridge_state -ffffffff819323b0 T drm_atomic_get_new_bridge_state -ffffffff81932410 T drm_atomic_add_encoder_bridges -ffffffff819324d0 T drm_atomic_add_affected_connectors -ffffffff819325f0 T drm_atomic_add_affected_planes -ffffffff81932710 T drm_atomic_check_only -ffffffff819331d0 T drm_atomic_commit -ffffffff819332a0 T drm_atomic_print_new_state -ffffffff81933490 T drm_atomic_nonblocking_commit -ffffffff81933530 T __drm_atomic_helper_disable_plane -ffffffff819335b0 T __drm_atomic_helper_set_config -ffffffff81933920 t drm_atomic_plane_print_state -ffffffff81933b40 t drm_atomic_crtc_print_state -ffffffff81933da0 t drm_atomic_connector_print_state -ffffffff81933ed0 T drm_state_dump -ffffffff81935000 T drm_atomic_helper_check_modeset -ffffffff81935cd0 t handle_conflicting_encoders -ffffffff81935fd0 t mode_fixup -ffffffff81936310 T drm_atomic_helper_check_wb_encoder_state -ffffffff81936370 T drm_atomic_helper_check_plane_state -ffffffff81936730 T drm_atomic_helper_check_crtc_primary_plane -ffffffff819367e0 T drm_atomic_helper_check_planes -ffffffff81936a90 T drm_atomic_helper_check -ffffffff81936b40 T drm_atomic_helper_async_check -ffffffff81936e10 T drm_atomic_helper_update_legacy_modeset_state -ffffffff81937080 T drm_atomic_helper_calc_timestamping_constants -ffffffff81937120 T drm_atomic_helper_commit_modeset_disables -ffffffff81937780 T drm_atomic_helper_commit_modeset_enables -ffffffff81937a50 T drm_atomic_helper_wait_for_fences -ffffffff81937c30 T drm_atomic_helper_wait_for_vblanks -ffffffff81937f80 T drm_atomic_helper_wait_for_flip_done -ffffffff81938140 T drm_atomic_helper_commit_tail -ffffffff819382b0 T drm_atomic_helper_commit_planes -ffffffff81938620 T drm_atomic_helper_fake_vblank -ffffffff81938700 T drm_atomic_helper_commit_hw_done -ffffffff819388d0 T drm_atomic_helper_cleanup_planes -ffffffff81938970 T drm_atomic_helper_commit_tail_rpm -ffffffff81938ae0 t try_wait_for_completion -ffffffff81938b40 T drm_atomic_helper_async_commit -ffffffff81938dd0 T drm_atomic_helper_commit -ffffffff81939050 T drm_atomic_helper_prepare_planes -ffffffff819392f0 T drm_atomic_helper_unprepare_planes -ffffffff819393e0 T drm_atomic_helper_setup_commit -ffffffff81939ac0 t commit_work -ffffffff81939ae0 T drm_atomic_helper_swap_state -ffffffff8193a130 t commit_tail -ffffffff8193a350 t release_crtc_commit -ffffffff8193a390 t crtc_or_fake_commit -ffffffff8193a490 T drm_atomic_helper_wait_for_dependencies -ffffffff8193a690 T drm_atomic_helper_commit_cleanup_done -ffffffff8193a8f0 T drm_atomic_helper_commit_planes_on_crtc -ffffffff8193ab70 T drm_atomic_helper_disable_planes_on_crtc -ffffffff8193acd0 T drm_atomic_helper_update_plane -ffffffff8193ae00 T drm_atomic_helper_disable_plane -ffffffff8193aec0 T drm_atomic_helper_set_config -ffffffff8193af70 T drm_atomic_helper_disable_all -ffffffff8193b120 T drm_atomic_helper_shutdown -ffffffff8193b270 T drm_atomic_helper_duplicate_state -ffffffff8193b3c0 T drm_atomic_helper_suspend -ffffffff8193b510 T drm_atomic_helper_commit_duplicated_state -ffffffff8193b650 T drm_atomic_helper_resume -ffffffff8193b780 T drm_atomic_helper_page_flip -ffffffff8193b840 t page_flip_common -ffffffff8193b940 T drm_atomic_helper_page_flip_target -ffffffff8193ba60 T drm_atomic_helper_bridge_propagate_bus_fmt -ffffffff8193bad0 t set_best_encoder -ffffffff8193c000 T __drm_atomic_helper_crtc_state_reset -ffffffff8193c030 T __drm_atomic_helper_crtc_reset -ffffffff8193c090 T drm_atomic_helper_crtc_reset -ffffffff8193c130 T __drm_atomic_helper_crtc_duplicate_state -ffffffff8193c200 T drm_atomic_helper_crtc_duplicate_state -ffffffff8193c2a0 T __drm_atomic_helper_crtc_destroy_state -ffffffff8193c360 T drm_atomic_helper_crtc_destroy_state -ffffffff8193c390 T __drm_atomic_helper_plane_state_reset -ffffffff8193c460 T __drm_atomic_helper_plane_reset -ffffffff8193c4c0 T drm_atomic_helper_plane_reset -ffffffff8193c5a0 T __drm_atomic_helper_plane_destroy_state -ffffffff8193c610 T __drm_atomic_helper_plane_duplicate_state -ffffffff8193c690 T drm_atomic_helper_plane_duplicate_state -ffffffff8193c770 T drm_atomic_helper_plane_destroy_state -ffffffff8193c7f0 T __drm_atomic_helper_connector_state_reset -ffffffff8193c820 T __drm_atomic_helper_connector_reset -ffffffff8193c860 T drm_atomic_helper_connector_reset -ffffffff8193c930 T __drm_atomic_helper_connector_destroy_state -ffffffff8193c990 T drm_atomic_helper_connector_tv_margins_reset -ffffffff8193c9f0 T drm_atomic_helper_connector_tv_reset -ffffffff8193cbf0 T drm_atomic_helper_connector_tv_check -ffffffff8193ccd0 T __drm_atomic_helper_connector_duplicate_state -ffffffff8193cd60 T drm_atomic_helper_connector_duplicate_state -ffffffff8193ce40 T drm_atomic_helper_connector_destroy_state -ffffffff8193ceb0 T __drm_atomic_helper_private_obj_duplicate_state -ffffffff8193cef0 T __drm_atomic_helper_bridge_duplicate_state -ffffffff8193cf30 T drm_atomic_helper_bridge_duplicate_state -ffffffff8193cfe0 T drm_atomic_helper_bridge_destroy_state -ffffffff8193d000 T __drm_atomic_helper_bridge_reset -ffffffff8193d050 T drm_atomic_helper_bridge_reset -ffffffff8193e000 T drm_atomic_set_mode_for_crtc -ffffffff8193e220 T drm_atomic_set_mode_prop_for_crtc -ffffffff8193e4b0 T drm_atomic_set_crtc_for_plane -ffffffff8193e620 T drm_atomic_set_fb_for_plane -ffffffff8193e700 T drm_atomic_set_crtc_for_connector -ffffffff8193e860 T drm_atomic_get_property -ffffffff8193efc0 T drm_atomic_connector_commit_dpms -ffffffff8193f100 T drm_atomic_set_property -ffffffff8193fc00 T drm_mode_atomic_ioctl -ffffffff819400a0 t prepare_signaling -ffffffff81940530 t complete_signaling -ffffffff81940700 t drm_atomic_replace_property_blob_from_id -ffffffff81940870 t drm_atomic_set_writeback_fb_for_connector -ffffffff819408e0 t set_out_fence_for_connector -ffffffff81941000 T drm_is_current_master -ffffffff81941060 T drm_getmagic -ffffffff81941130 T drm_authmagic -ffffffff819411f0 T drm_master_create -ffffffff81941290 T drm_setmaster_ioctl -ffffffff81941350 t drm_new_set_master -ffffffff819414e0 T drm_dropmaster_ioctl -ffffffff819415c0 t drm_drop_master -ffffffff81941670 T drm_master_open -ffffffff81941720 T drm_master_get -ffffffff81941750 T drm_master_release -ffffffff81941830 T drm_master_put -ffffffff819418c0 T drm_file_get_master -ffffffff81941920 T drm_master_internal_acquire -ffffffff81941990 T drm_master_internal_release -ffffffff81942000 T drm_plane_create_alpha_property -ffffffff819420a0 T drm_plane_create_rotation_property -ffffffff819421e0 T drm_rotation_simplify -ffffffff81942250 T drm_plane_create_zpos_property -ffffffff81942310 T drm_plane_create_zpos_immutable_property -ffffffff819423c0 T drm_atomic_normalize_zpos -ffffffff819426b0 T drm_plane_create_blend_mode_property -ffffffff81942850 t drm_atomic_state_zpos_cmp -ffffffff81943000 T drm_bridge_add -ffffffff81943070 T devm_drm_bridge_add -ffffffff81943110 T drm_bridge_remove -ffffffff81943170 T drm_bridge_attach -ffffffff81943330 T drm_bridge_detach -ffffffff81943420 T drm_bridge_chain_mode_fixup -ffffffff819434c0 T drm_bridge_chain_mode_valid -ffffffff81943560 T drm_bridge_chain_mode_set -ffffffff819435f0 T drm_atomic_bridge_chain_disable -ffffffff819436f0 T drm_atomic_bridge_chain_post_disable -ffffffff81943920 T drm_atomic_bridge_chain_pre_enable -ffffffff81943b60 T drm_atomic_bridge_chain_enable -ffffffff81943c70 T drm_atomic_bridge_chain_check -ffffffff81944000 T drm_bridge_detect -ffffffff81944060 T drm_bridge_get_modes -ffffffff819440c0 T drm_bridge_edid_read -ffffffff81944180 T drm_bridge_get_edid -ffffffff819441e0 T drm_bridge_hpd_enable -ffffffff819442b0 T drm_bridge_hpd_disable -ffffffff81944350 T drm_bridge_hpd_notify -ffffffff819443b0 t drm_bridge_atomic_duplicate_priv_state -ffffffff819443d0 t drm_bridge_atomic_destroy_priv_state -ffffffff819443f0 t select_bus_fmt_recursive -ffffffff81945000 T drm_buddy_init -ffffffff81945470 T drm_buddy_fini -ffffffff81945560 T drm_get_buddy -ffffffff819455a0 T drm_buddy_free_block -ffffffff819455f0 t __drm_buddy_free -ffffffff81945740 T drm_buddy_free_list -ffffffff81945800 T drm_buddy_block_trim -ffffffff81945a60 t __alloc_range -ffffffff81945d40 T drm_buddy_alloc_blocks -ffffffff819463c0 t __drm_buddy_alloc_range -ffffffff81946450 T drm_buddy_block_print -ffffffff81946490 T drm_buddy_print -ffffffff81946600 T drm_buddy_module_exit -ffffffff81946620 T drm_buddy_module_init -ffffffff81946680 t split_block -ffffffff81947000 T drm_clflush_pages -ffffffff819470e0 T drm_clflush_sg -ffffffff819471f0 T drm_clflush_virt_range -ffffffff81947290 T drm_need_swiotlb -ffffffff819472c0 T drm_memcpy_from_wc -ffffffff81947760 T drm_memcpy_init_early -ffffffff81948000 T drm_client_init -ffffffff81948110 T drm_client_register -ffffffff819481c0 T drm_client_release -ffffffff81948260 T drm_client_dev_unregister -ffffffff81948350 T drm_client_dev_hotplug -ffffffff81948480 T drm_client_dev_restore -ffffffff81948560 T drm_client_buffer_vmap -ffffffff819485d0 T drm_client_buffer_vunmap -ffffffff819485f0 T drm_client_framebuffer_create -ffffffff81948890 T drm_client_framebuffer_delete -ffffffff81948980 T drm_client_framebuffer_flush -ffffffff81949000 T drm_client_modeset_create -ffffffff81949140 T drm_client_modeset_free -ffffffff81949240 T drm_client_modeset_probe -ffffffff8194a9a0 t drm_client_pick_crtcs -ffffffff8194ac80 T drm_client_rotation -ffffffff8194ae20 T drm_client_modeset_check -ffffffff8194aec0 t drm_client_modeset_commit_atomic -ffffffff8194b0c0 T drm_client_modeset_commit_locked -ffffffff8194b260 T drm_client_modeset_commit -ffffffff8194b2d0 T drm_client_modeset_dpms -ffffffff8194b520 t drm_connector_pick_cmdline_mode -ffffffff8194c000 T drm_color_ctm_s31_32_to_qm_n -ffffffff8194c0d0 T drm_crtc_enable_color_mgmt -ffffffff8194c1b0 T drm_mode_crtc_set_gamma_size -ffffffff8194c2d0 T drm_mode_gamma_set_ioctl -ffffffff8194c7b0 T drm_mode_gamma_get_ioctl -ffffffff8194c8f0 T drm_get_color_encoding_name -ffffffff8194c960 T drm_get_color_range_name -ffffffff8194c9d0 T drm_plane_create_color_properties -ffffffff8194cc30 T drm_color_lut_check -ffffffff8194d000 T drm_connector_ida_init -ffffffff8194d110 T drm_connector_ida_destroy -ffffffff8194d220 T drm_get_connector_type_name -ffffffff8194d260 T drm_connector_free_work_fn -ffffffff8194d320 T drm_connector_init -ffffffff8194d3a0 t __drm_connector_init -ffffffff8194d710 T drm_connector_init_with_ddc -ffffffff8194d7a0 T drmm_connector_init -ffffffff8194d860 t drm_connector_cleanup_action -ffffffff8194d880 T drm_connector_attach_edid_property -ffffffff8194d8a0 T drm_connector_attach_encoder -ffffffff8194d920 T drm_connector_has_possible_encoder -ffffffff8194d960 T drm_connector_cleanup -ffffffff8194dca0 T drm_connector_unregister -ffffffff8194dd40 T drm_mode_put_tile_group -ffffffff8194ddd0 T drm_connector_register -ffffffff8194dec0 T drm_connector_unregister_all -ffffffff8194e060 T drm_connector_list_iter_begin -ffffffff8194e0a0 T drm_connector_list_iter_next -ffffffff8194e1b0 T drm_connector_list_iter_end -ffffffff8194e280 T drm_connector_register_all -ffffffff8194e410 T drm_get_connector_status_name -ffffffff8194e460 T drm_get_connector_force_name -ffffffff8194e4a0 T drm_get_subpixel_order_name -ffffffff8194e4e0 T drm_get_dpms_name -ffffffff8194e520 T drm_display_info_set_bus_formats -ffffffff8194e5f0 T drm_get_dvi_i_select_name -ffffffff8194e650 T drm_get_dvi_i_subconnector_name -ffffffff8194e6b0 T drm_get_tv_mode_name -ffffffff8194e6f0 T drm_get_tv_mode_from_name -ffffffff8194e890 T drm_get_tv_select_name -ffffffff8194e8f0 T drm_get_tv_subconnector_name -ffffffff8194e950 T drm_get_dp_subconnector_name -ffffffff8194e9e0 T drm_get_colorspace_name -ffffffff8194ea20 T drm_connector_create_standard_properties -ffffffff8194eba0 T drm_mode_create_dvi_i_properties -ffffffff8194ec40 T drm_connector_attach_dp_subconnector_property -ffffffff8194ecb0 T drm_connector_attach_content_type_property -ffffffff8194ed50 T drm_mode_create_content_type_property -ffffffff8194edd0 T drm_connector_attach_tv_margin_properties -ffffffff8194ee40 T drm_mode_create_tv_margin_properties -ffffffff8194ef60 T drm_mode_create_tv_properties_legacy -ffffffff8194f1b0 T drm_mode_create_tv_properties -ffffffff8194f390 T drm_mode_create_scaling_mode_property -ffffffff8194f400 T drm_connector_attach_vrr_capable_property -ffffffff8194f490 T drm_connector_attach_scaling_mode_property -ffffffff8194f660 T drm_mode_create_aspect_ratio_property -ffffffff8194f6e0 T drm_mode_create_hdmi_colorspace_property -ffffffff8194f700 t drm_mode_create_colorspace_property -ffffffff8194f840 T drm_mode_create_dp_colorspace_property -ffffffff8194f870 T drm_mode_create_suggested_offset_properties -ffffffff8194f940 T drm_connector_set_path_property -ffffffff8194f9a0 T drm_connector_set_tile_property -ffffffff8194faf0 T drm_connector_set_link_status_property -ffffffff8194fb40 T drm_connector_attach_max_bpc_property -ffffffff8194fc00 T drm_connector_attach_hdr_output_metadata_property -ffffffff8194fc50 T drm_connector_attach_colorspace_property -ffffffff8194fca0 T drm_connector_atomic_hdr_metadata_equal -ffffffff8194fd10 T drm_connector_set_vrr_capable_property -ffffffff8194fd60 T drm_connector_set_panel_orientation -ffffffff8194fe30 T drm_connector_set_panel_orientation_with_quirk -ffffffff8194ff10 T drm_connector_set_orientation_from_panel -ffffffff81950000 T drm_connector_create_privacy_screen_properties -ffffffff819500a0 T drm_connector_attach_privacy_screen_properties -ffffffff81950110 T drm_connector_attach_privacy_screen_provider -ffffffff81950220 t drm_connector_privacy_screen_notifier -ffffffff819502c0 T drm_connector_update_privacy_screen -ffffffff81950330 T drm_connector_set_obj_prop -ffffffff81950410 T drm_connector_property_set_ioctl -ffffffff81950470 T drm_mode_getconnector -ffffffff81950970 T drm_connector_find_by_fwnode -ffffffff81950a20 T drm_connector_oob_hotplug_event -ffffffff81950b10 T drm_mode_get_tile_group -ffffffff81950be0 T drm_mode_create_tile_group -ffffffff81950cb0 t drm_connector_free -ffffffff81950cf0 t kasprintf -ffffffff81951000 T drm_crtc_from_index -ffffffff81951060 T drm_crtc_force_disable -ffffffff819511a0 T drm_mode_set_config_internal -ffffffff81951220 T drm_crtc_register_all -ffffffff819512a0 T drm_crtc_unregister_all -ffffffff81951310 T drm_crtc_create_fence -ffffffff819513a0 T drm_crtc_init_with_planes -ffffffff81951470 t __drm_crtc_init_with_planes -ffffffff81951870 T drmm_crtc_init_with_planes -ffffffff81951970 T __drmm_crtc_alloc_with_planes -ffffffff81951ae0 T drm_crtc_cleanup -ffffffff81951c00 T drm_mode_getcrtc -ffffffff81951da0 t __drm_mode_set_config_internal -ffffffff81951f50 T drm_crtc_check_viewport -ffffffff81952000 T drm_mode_setcrtc -ffffffff81952780 T drm_mode_crtc_set_obj_prop -ffffffff81952800 T drm_crtc_create_scaling_filter_property -ffffffff81952870 t drm_crtc_fence_get_driver_name -ffffffff819528f0 t drm_crtc_fence_get_timeline_name -ffffffff81952960 t kasprintf -ffffffff81952a30 t drmm_crtc_init_with_planes_cleanup -ffffffff81953000 T drm_helper_encoder_in_use -ffffffff81953180 T drm_helper_crtc_in_use -ffffffff819532b0 T drm_helper_disable_unused_functions -ffffffff81953330 t __drm_helper_disable_unused_functions -ffffffff81953450 T drm_crtc_helper_set_mode -ffffffff819538f0 T drm_crtc_helper_atomic_check -ffffffff81953940 T drm_connector_get_single_encoder -ffffffff81953a20 T drm_crtc_helper_set_config -ffffffff81954660 T drm_helper_connector_dpms -ffffffff81954930 T drm_helper_resume_force_mode -ffffffff81954c30 T drm_helper_force_disable_all -ffffffff81955000 T drm_atomic_helper_check_plane_damage -ffffffff819550a0 T drm_atomic_helper_dirtyfb -ffffffff81955350 T drm_atomic_helper_damage_iter_init -ffffffff819554a0 T drm_atomic_helper_damage_iter_next -ffffffff81955540 T drm_atomic_helper_damage_merged -ffffffff81956000 T displayid_iter_edid_begin -ffffffff81956050 T __displayid_iter_next -ffffffff81956300 T displayid_iter_end -ffffffff81956350 T displayid_version -ffffffff81956380 T displayid_primary_use -ffffffff81957000 T drm_mode_create_dumb -ffffffff819570e0 T drm_mode_create_dumb_ioctl -ffffffff819571c0 T drm_mode_mmap_dumb_ioctl -ffffffff81957230 T drm_mode_destroy_dumb -ffffffff81957280 T drm_mode_destroy_dumb_ioctl -ffffffff81958000 T drm_edid_header_is_valid -ffffffff81958080 T drm_edid_are_equal -ffffffff819580f0 T drm_edid_block_valid -ffffffff81958300 t edid_block_check -ffffffff81958430 t edid_block_status_print -ffffffff81958520 T drm_edid_is_valid -ffffffff819585a0 T drm_edid_valid -ffffffff819586d0 t drm_edid_block_count -ffffffff81958810 T drm_edid_override_show -ffffffff81958860 T drm_edid_override_set -ffffffff81958a00 T drm_edid_alloc -ffffffff81958ac0 T drm_edid_free -ffffffff81958b20 T drm_edid_override_reset -ffffffff81958be0 T drm_edid_override_connector_update -ffffffff81958cb0 t drm_edid_override_get -ffffffff81958da0 T drm_edid_connector_update -ffffffff819591f0 T drm_edid_connector_add_modes -ffffffff81959310 T drm_do_get_edid -ffffffff81959330 t _drm_do_get_edid -ffffffff81959750 T drm_edid_raw -ffffffff819597e0 T drm_edid_dup -ffffffff819598b0 T drm_probe_ddc -ffffffff819599b0 t drm_do_probe_ddc_edid -ffffffff81959b00 T drm_get_edid -ffffffff81959c70 T drm_connector_update_edid_property -ffffffff81959cd0 T drm_edid_read_custom -ffffffff81959dc0 T drm_edid_read_ddc -ffffffff81959ef0 T drm_edid_read -ffffffff81959f70 T drm_edid_get_panel_id -ffffffff8195a0f0 t edid_block_read -ffffffff8195a360 T drm_get_edid_switcheroo -ffffffff8195a3b0 T drm_edid_read_switcheroo -ffffffff8195a400 T drm_edid_duplicate -ffffffff8195a480 T drm_mode_find_dmt -ffffffff8195a5a0 T drm_mode_fixup_1366x768 -ffffffff8195a5f0 T drm_find_edid_extension -ffffffff8195a690 T drm_match_cea_mode -ffffffff8195a910 T drm_display_mode_from_cea_vic -ffffffff8195a980 T drm_edid_get_monitor_name -ffffffff8195aa20 t get_monitor_name -ffffffff8195ae80 T drm_edid_to_sad -ffffffff8195b080 T drm_edid_to_speaker_allocation -ffffffff8195b230 T drm_av_sync_delay -ffffffff8195b2e0 T drm_detect_hdmi_monitor -ffffffff8195b400 T drm_detect_monitor_audio -ffffffff8195b590 T drm_default_rgb_quant_range -ffffffff8195b5d0 t update_display_info -ffffffff8195cd90 t _drm_edid_connector_add_modes -ffffffff8195e330 T drm_add_edid_modes -ffffffff8195e430 T drm_add_modes_noedid -ffffffff8195e520 T drm_set_preferred_mode -ffffffff8195e580 T drm_hdmi_avi_infoframe_from_display_mode -ffffffff8195e840 T drm_hdmi_avi_infoframe_quant_range -ffffffff8195e8e0 T drm_hdmi_vendor_infoframe_from_display_mode -ffffffff8195e9a0 t connector_bad_edid -ffffffff8195eb60 t edid_filter_invalid_blocks -ffffffff8195ecf0 t drm_for_each_detailed_block -ffffffff8195ee90 t __cea_db_iter_next -ffffffff8195f0a0 t get_monitor_range -ffffffff8195f140 t do_detailed_mode -ffffffff8195fb50 t do_cvt_mode -ffffffff8195fd90 t drm_mode_std -ffffffff81960770 t do_standard_modes -ffffffff819608b0 t drm_monitor_supports_rb -ffffffff81960cc0 t drm_gtf2_mode -ffffffff81961a70 t drm_gtf2_hbreak -ffffffff81961de0 t do_established_modes -ffffffff81961fe0 t drm_match_hdmi_mode -ffffffff81962160 t do_inferred_modes -ffffffff81962820 t mode_in_range -ffffffff81963000 T drm_encoder_register_all -ffffffff81963080 T drm_encoder_unregister_all -ffffffff819630f0 T drm_encoder_init -ffffffff819631c0 t __drm_encoder_init -ffffffff81963380 T drm_encoder_cleanup -ffffffff819634b0 T __drmm_encoder_alloc -ffffffff819635d0 T drmm_encoder_init -ffffffff819636b0 T drm_mode_getencoder -ffffffff81963830 t kasprintf -ffffffff81963900 t drmm_encoder_alloc_release -ffffffff81964000 T drm_i2c_encoder_dpms -ffffffff81964020 T drm_i2c_encoder_mode_fixup -ffffffff81964060 T drm_i2c_encoder_prepare -ffffffff81964080 T drm_i2c_encoder_commit -ffffffff819640a0 T drm_i2c_encoder_mode_set -ffffffff819640c0 T drm_i2c_encoder_detect -ffffffff819640e0 T drm_i2c_encoder_save -ffffffff81964100 T drm_i2c_encoder_restore -ffffffff81965000 T drm_exec_init -ffffffff81965080 T drm_exec_fini -ffffffff81965100 t drm_exec_unlock_all -ffffffff81965280 T drm_exec_cleanup -ffffffff81965310 T drm_exec_lock_obj -ffffffff819655a0 t drm_exec_obj_locked -ffffffff81965670 t dma_resv_unlock -ffffffff81965710 T drm_exec_unlock_obj -ffffffff819658a0 T drm_exec_prepare_obj -ffffffff81965920 T drm_exec_prepare_array -ffffffff819659d0 t dma_resv_lock_slow_interruptible -ffffffff81965b00 t dma_resv_lock_slow -ffffffff81965bf0 t __ww_mutex_lock -ffffffff81966000 T drm_fb_helper_debug_enter -ffffffff81966100 T drm_fb_helper_debug_leave -ffffffff81966270 T drm_fb_helper_restore_fbdev_mode_unlocked -ffffffff81966310 t __drm_fb_helper_restore_fbdev_mode_unlocked -ffffffff819663c0 T drm_fb_helper_blank -ffffffff819664b0 T drm_fb_helper_prepare -ffffffff819665a0 t drm_fb_helper_resume_worker -ffffffff819665d0 t drm_fb_helper_damage_work -ffffffff81966730 T drm_fb_helper_unprepare -ffffffff81966760 T drm_fb_helper_init -ffffffff819667d0 T drm_fb_helper_alloc_info -ffffffff81966830 T drm_fb_helper_release_info -ffffffff81966880 T drm_fb_helper_unregister_info -ffffffff819668b0 T drm_fb_helper_fini -ffffffff819669b0 T drm_fb_helper_set_suspend -ffffffff819669e0 T drm_fb_helper_set_suspend_unlocked -ffffffff81966a10 T drm_fb_helper_set_par -ffffffff81966ac0 T drm_fb_helper_pan_display -ffffffff81966b90 T drm_fb_helper_fill_info -ffffffff81966c50 T drm_fb_helper_initial_config -ffffffff81966c80 t __drm_fb_helper_initial_config_and_unlock -ffffffff819672c0 T drm_fb_helper_hotplug_event -ffffffff819673f0 t drm_setup_crtcs_fb -ffffffff81967530 T drm_fb_helper_lastclose -ffffffff819675e0 T drm_fb_helper_output_poll_changed -ffffffff81968000 T drm_fb_dma_get_gem_obj -ffffffff81969000 T drm_fbdev_dma_setup -ffffffff81969190 t drm_fbdev_dma_helper_fb_probe -ffffffff81969390 t drm_fbdev_dma_client_unregister -ffffffff819693e0 t drm_fbdev_dma_client_restore -ffffffff81969420 t drm_fbdev_dma_client_hotplug -ffffffff8196a000 T drm_fbdev_generic_setup -ffffffff8196a190 t drm_fbdev_generic_helper_fb_probe -ffffffff8196a300 t drm_fbdev_generic_helper_fb_dirty -ffffffff8196a5b0 t drm_fbdev_generic_client_unregister -ffffffff8196a600 t drm_fbdev_generic_client_restore -ffffffff8196a640 t drm_fbdev_generic_client_hotplug -ffffffff8196b000 T drm_dev_needs_global_mutex -ffffffff8196b060 T drm_file_alloc -ffffffff8196b2e0 T drm_file_free -ffffffff8196b530 T drm_lastclose -ffffffff8196b5a0 T drm_release -ffffffff8196b5f0 T drm_file_update_pid -ffffffff8196b640 T drm_release_noglobal -ffffffff8196b690 T drm_read -ffffffff8196b6e0 T drm_event_reserve_init_locked -ffffffff8196b760 T drm_event_reserve_init -ffffffff8196b820 T drm_event_cancel_free -ffffffff8196b8a0 T drm_send_event_timestamp_locked -ffffffff8196b8b0 t drm_send_event_helper -ffffffff8196ba80 T drm_send_event_locked -ffffffff8196baa0 T drm_send_event -ffffffff8196baf0 T drm_print_memory_stats -ffffffff8196bd70 T drm_show_memory_stats -ffffffff8196bfb0 T drm_show_fdinfo -ffffffff8196bfd0 T mock_drm_getfile -ffffffff8196d000 T drm_flip_work_allocate_task -ffffffff8196d060 T drm_flip_work_queue_task -ffffffff8196d0b0 T drm_flip_work_queue -ffffffff8196d150 T drm_flip_work_commit -ffffffff8196d1d0 T drm_flip_work_init -ffffffff8196d240 t flip_worker -ffffffff8196d320 T drm_flip_work_cleanup -ffffffff8196e000 T drm_fb_clip_offset -ffffffff8196e040 T drm_fb_memcpy -ffffffff8196e2f0 T drm_fb_swab -ffffffff8196e400 t drm_fb_swab32_line -ffffffff8196e460 t drm_fb_swab16_line -ffffffff8196e4c0 t drm_fb_xfrm -ffffffff8196e7b0 T drm_fb_xrgb8888_to_rgb332 -ffffffff8196e810 t drm_fb_xrgb8888_to_rgb332_line -ffffffff8196e910 T drm_fb_xrgb8888_to_rgb565 -ffffffff8196e990 t drm_fb_xrgb8888_to_rgb565_swab_line -ffffffff8196ea10 t drm_fb_xrgb8888_to_rgb565_line -ffffffff8196eb20 T drm_fb_xrgb8888_to_xrgb1555 -ffffffff8196eb80 t drm_fb_xrgb8888_to_xrgb1555_line -ffffffff8196ec90 T drm_fb_xrgb8888_to_argb1555 -ffffffff8196ecf0 t drm_fb_xrgb8888_to_argb1555_line -ffffffff8196ee10 T drm_fb_xrgb8888_to_rgba5551 -ffffffff8196ee70 t drm_fb_xrgb8888_to_rgba5551_line -ffffffff8196ef80 T drm_fb_xrgb8888_to_rgb888 -ffffffff8196efe0 t drm_fb_xrgb8888_to_rgb888_line -ffffffff8196f070 T drm_fb_xrgb8888_to_argb8888 -ffffffff8196f0d0 t drm_fb_xrgb8888_to_argb8888_line -ffffffff8196f1a0 T drm_fb_xrgb8888_to_xrgb2101010 -ffffffff8196f200 t drm_fb_xrgb8888_to_xrgb2101010_line -ffffffff8196f280 T drm_fb_xrgb8888_to_argb2101010 -ffffffff8196f2e0 t drm_fb_xrgb8888_to_argb2101010_line -ffffffff8196f370 T drm_fb_xrgb8888_to_gray8 -ffffffff8196f3d0 t drm_fb_xrgb8888_to_gray8_line -ffffffff8196f440 T drm_fb_blit -ffffffff8196fac0 T drm_fb_xrgb8888_to_mono -ffffffff8196fe50 T drm_fb_build_fourcc_list -ffffffff81970130 t drm_fb_xrgb8888_to_xbgr8888_line -ffffffff81970210 t drm_fb_xrgb8888_to_abgr8888_line -ffffffff81971000 T drm_mode_legacy_fb_format -ffffffff819710f0 T drm_driver_legacy_fb_format -ffffffff819711f0 T __drm_format_info -ffffffff81971270 T drm_format_info -ffffffff81971320 T drm_get_format_info -ffffffff819713f0 T drm_format_info_block_width -ffffffff81971440 T drm_format_info_block_height -ffffffff81971490 T drm_format_info_bpp -ffffffff81971510 T drm_format_info_min_pitch -ffffffff81972000 T drm_framebuffer_check_src_coords -ffffffff81972120 T drm_mode_addfb -ffffffff81972330 T drm_mode_addfb2 -ffffffff81972430 T drm_mode_addfb_ioctl -ffffffff81972450 T drm_internal_framebuffer_create -ffffffff81972a30 T drm_mode_addfb2_ioctl -ffffffff81972b30 T drm_mode_rmfb -ffffffff81972d10 T drm_framebuffer_lookup -ffffffff81972d60 t drm_mode_rmfb_work_fn -ffffffff81972e20 T drm_mode_rmfb_ioctl -ffffffff81972e40 T drm_mode_getfb -ffffffff81972f90 T drm_mode_getfb2_ioctl -ffffffff81973350 T drm_mode_dirtyfb_ioctl -ffffffff819734f0 T drm_fb_release -ffffffff81973600 T drm_framebuffer_free -ffffffff81973640 T drm_framebuffer_init -ffffffff819737a0 T drm_framebuffer_unregister_private -ffffffff819737e0 T drm_framebuffer_cleanup -ffffffff81973840 T drm_framebuffer_remove -ffffffff81973cd0 T drm_framebuffer_plane_width -ffffffff81973d20 T drm_framebuffer_plane_height -ffffffff81973d70 T drm_framebuffer_print_info -ffffffff81975000 T drm_ref -ffffffff81975030 T drm_unref -ffffffff819750b0 T drm_fault -ffffffff81975280 T drm_flush -ffffffff819752b0 T udv_attach_drm -ffffffff819754a0 T drm_gem_init -ffffffff81975550 t drm_gem_init_release -ffffffff81975570 T drm_gem_object_init -ffffffff819756f0 T drm_gem_private_object_init -ffffffff81975810 T drm_gem_private_object_fini -ffffffff81975870 T drm_gem_handle_delete -ffffffff81975960 t drm_gem_object_release_handle -ffffffff819759f0 T drm_gem_dumb_map_offset -ffffffff81975b20 T drm_gem_object_lookup -ffffffff81975b90 T drm_gem_create_mmap_offset -ffffffff81975bc0 T drm_gem_handle_create_tail -ffffffff81975d30 t drm_gem_object_handle_put_unlocked -ffffffff81975e80 T drm_gem_handle_create -ffffffff81975ed0 T drm_gem_free_mmap_offset -ffffffff81975f00 T drm_gem_create_mmap_offset_size -ffffffff81975f30 T drm_gem_get_pages -ffffffff81975f80 T drm_gem_put_pages -ffffffff81975fb0 T drm_gem_objects_lookup -ffffffff81976110 T drm_gem_dma_resv_wait -ffffffff81976240 T drm_gem_close_ioctl -ffffffff81976290 T drm_gem_flink_ioctl -ffffffff81976400 T drm_gem_open_ioctl -ffffffff81976530 T drm_gem_open -ffffffff81976560 T drm_gem_release -ffffffff819765a0 T drm_gem_object_release -ffffffff819766f0 T drm_gem_lru_remove -ffffffff819767d0 T drm_gem_object_free -ffffffff81976820 T drm_gem_mmap_obj -ffffffff81976920 T drm_gem_mmap -ffffffff81976b90 T drm_gem_print_info -ffffffff81976cb0 T drm_gem_pin -ffffffff81976cf0 T drm_gem_unpin -ffffffff81976d30 T drm_gem_vmap -ffffffff81976d90 T drm_gem_vunmap -ffffffff81976e00 T drm_gem_vmap_unlocked -ffffffff81977000 T drm_gem_vunmap_unlocked -ffffffff819771d0 T drm_gem_lock_reservations -ffffffff819775c0 T drm_gem_unlock_reservations -ffffffff819776c0 T drm_gem_lru_init -ffffffff81977700 T drm_gem_lru_move_tail_locked -ffffffff81977800 T drm_gem_lru_move_tail -ffffffff819778f0 T drm_gem_lru_scan -ffffffff81977ce0 T drm_gem_evict -ffffffff81978000 T drm_gem_plane_helper_prepare_fb -ffffffff81979000 T drm_gem_dma_create -ffffffff81979220 T drm_gem_dma_free_object -ffffffff819792c0 T drm_gem_dma_dumb_create_internal -ffffffff81979400 T drm_gem_dma_dumb_create -ffffffff81979440 T drm_gem_dma_fault -ffffffff819795e0 T drm_gem_dma_get_sg_table -ffffffff81979610 T drm_gem_dma_prime_import_sg_table -ffffffff81979640 T drm_gem_dma_vmap -ffffffff8197a000 T drm_gem_fb_destroy -ffffffff8197a0c0 T drm_gem_fb_create_handle -ffffffff8197a0e0 T drm_gem_fb_create -ffffffff8197a220 T drm_gem_fb_get_obj -ffffffff8197b000 T drm_ht_create -ffffffff8197b080 T drm_ht_verbose_list -ffffffff8197b140 T drm_ht_insert_item -ffffffff8197b190 T drm_ht_just_insert_please -ffffffff8197b260 T drm_ht_find_item -ffffffff8197b2b0 T drm_ht_remove_key -ffffffff8197b300 T drm_ht_remove_item -ffffffff8197b350 T drm_ht_remove -ffffffff8197c000 T drm_getunique -ffffffff8197c0a0 T drm_getclient -ffffffff8197c120 T drm_noop -ffffffff8197c180 T drm_invalid_op -ffffffff8197c1b0 T drm_version -ffffffff8197c3c0 T pledge_ioctl_drm -ffffffff8197c490 T drm_ioctl_kernel -ffffffff8197c4e0 T drm_ioctl -ffffffff8197c530 T drm_ioctl_flags -ffffffff8197c580 T drm_do_ioctl -ffffffff8197c8c0 T drmioctl -ffffffff8197ca10 t drm_getstats -ffffffff8197ca60 t drm_setversion -ffffffff8197cbc0 t drm_getcap -ffffffff8197cd80 t drm_setclientcap -ffffffff8197d000 T tasklet_unlock_wait -ffffffff8197d080 T tasklet_unlock_spin_wait -ffffffff8197d100 T tasklet_run -ffffffff8197d160 T set_current_state -ffffffff8197d200 T __set_current_state -ffffffff8197d290 T schedule -ffffffff8197d2d0 T schedule_timeout -ffffffff8197d380 T schedule_timeout_uninterruptible -ffffffff8197d3e0 T wake_up_process -ffffffff8197d460 T autoremove_wake_function -ffffffff8197d500 T prepare_to_wait -ffffffff8197d5f0 T finish_wait -ffffffff8197d6a0 T flush_workqueue -ffffffff8197d6e0 T flush_work -ffffffff8197d730 T flush_delayed_work -ffffffff8197d7d0 T kthread_func -ffffffff8197d810 T kthread_run -ffffffff8197d8f0 T kthread_create_worker -ffffffff8197d9b0 T kthread_destroy_worker -ffffffff8197d9f0 T kthread_init_work -ffffffff8197da10 T kthread_queue_work -ffffffff8197da50 T kthread_cancel_work_sync -ffffffff8197da90 T kthread_flush_work -ffffffff8197dad0 T kthread_flush_worker -ffffffff8197db10 T kthread_lookup -ffffffff8197db90 T kthread_should_park -ffffffff8197dc20 T kthread_parkme -ffffffff8197dcf0 T kthread_park -ffffffff8197ddf0 T kthread_unpark -ffffffff8197de50 T kthread_should_stop -ffffffff8197dee0 T kthread_stop -ffffffff8197e030 T dmi_match -ffffffff8197e0e0 T dmi_first_match -ffffffff8197e1d0 T dmi_get_system_info -ffffffff8197e240 T dmi_check_system -ffffffff8197e340 T alloc_pages -ffffffff8197e410 T __free_pages -ffffffff8197e580 T __pagevec_release -ffffffff8197e620 T kmap -ffffffff8197e660 T kunmap_va -ffffffff8197e680 T kmap_atomic_prot -ffffffff8197e710 T kunmap_atomic -ffffffff8197e790 T vmap -ffffffff8197e870 T vmap_pfn -ffffffff8197e960 T vunmap -ffffffff8197e9b0 T is_vmalloc_addr -ffffffff8197e9f0 T print_hex_dump -ffffffff8197eac0 T memchr_inv -ffffffff8197eb30 T panic_cmp -ffffffff8197eb50 T linux_root_RB_INSERT_COLOR -ffffffff8197ed50 T linux_root_RB_REMOVE_COLOR -ffffffff8197f080 T linux_root_RB_REMOVE -ffffffff8197f1c0 T linux_root_RB_INSERT -ffffffff8197f230 T linux_root_RB_FIND -ffffffff8197f280 T linux_root_RB_NFIND -ffffffff8197f2d0 T linux_root_RB_NEXT -ffffffff8197f340 T linux_root_RB_PREV -ffffffff8197f3b0 T linux_root_RB_MINMAX -ffffffff8197f400 T idr_init -ffffffff8197f430 T idr_destroy -ffffffff8197f570 T idr_tree_SPLAY_REMOVE -ffffffff8197f5f0 T idr_preload -ffffffff8197f680 T idr_alloc -ffffffff8197f810 T idr_tree_SPLAY_INSERT -ffffffff8197f8b0 T idr_replace -ffffffff8197f930 T idr_remove -ffffffff8197f9f0 T idr_find -ffffffff8197fa60 T idr_get_next -ffffffff8197fb90 T idr_for_each -ffffffff8197fca0 T idr_cmp -ffffffff8197fce0 T idr_tree_SPLAY -ffffffff8197fe10 T idr_tree_SPLAY_MINMAX -ffffffff8197ff00 T ida_init -ffffffff8197ff30 T ida_destroy -ffffffff8197ff40 T ida_simple_get -ffffffff8197ff60 T ida_simple_remove -ffffffff8197ff80 T ida_alloc_min -ffffffff8197ffa0 T ida_alloc_max -ffffffff8197ffc0 T ida_free -ffffffff8197ffe0 T xarray_cmp -ffffffff81980020 T xarray_tree_SPLAY_INSERT -ffffffff819800c0 T xarray_tree_SPLAY -ffffffff819801f0 T xarray_tree_SPLAY_REMOVE -ffffffff81980270 T xarray_tree_SPLAY_MINMAX -ffffffff81980360 T xa_init_flags -ffffffff819803e0 T xa_destroy -ffffffff81980520 T __xa_alloc -ffffffff819806a0 T __xa_alloc_cyclic -ffffffff81980700 T __xa_erase -ffffffff819807c0 T __xa_load -ffffffff81980830 T __xa_store -ffffffff819809b0 T xa_get_next -ffffffff81980ae0 T sg_alloc_table -ffffffff81980b60 T sg_free_table -ffffffff81980bc0 T sg_copy_from_buffer -ffffffff81980bf0 T i2c_master_xfer -ffffffff81980d20 T __i2c_transfer -ffffffff81980dd0 T i2c_transfer -ffffffff81980ea0 T i2c_bb_master_xfer -ffffffff81980f80 T i2c_bb_functionality -ffffffff81980fb0 T i2c_bit_add_bus -ffffffff81980ff0 T vga_disable_bridge -ffffffff819810a0 T vga_get_uninterruptible -ffffffff819810f0 T vga_put -ffffffff81981170 T acpi_get_table -ffffffff81981230 T acpi_put_table -ffffffff81981260 T acpi_get_handle -ffffffff819812b0 T acpi_get_name -ffffffff81981350 T acpi_evaluate_object -ffffffff819815b0 T drm_linux_acpi_notify -ffffffff81981630 T register_acpi_notifier -ffffffff81981670 T unregister_acpi_notifier -ffffffff81981700 T acpi_format_exception -ffffffff81981750 T backlight_do_update_status -ffffffff81981770 T backlight_device_register -ffffffff81981820 T backlight_device_unregister -ffffffff81981880 T backlight_schedule_update_status -ffffffff819818a0 T backlight_enable -ffffffff819818e0 T backlight_disable -ffffffff81981920 T backlight_device_get_by_name -ffffffff81981990 T dev_set_drvdata -ffffffff81981a30 T dev_get_drvdata -ffffffff81981a90 T drm_sysfs_hotplug_event -ffffffff81981ab0 T drm_sysfs_connector_hotplug_event -ffffffff81981ad0 T drm_sysfs_connector_status_event -ffffffff81981af0 T drm_sysfs_connector_property_event -ffffffff81981b10 T dma_fence_get -ffffffff81981b50 T dma_fence_get_rcu -ffffffff81981b90 T dma_fence_get_rcu_safe -ffffffff81981bd0 T dma_fence_release -ffffffff81981c00 T dma_fence_put -ffffffff81981c70 T dma_fence_signal_timestamp_locked -ffffffff81981d20 T dma_fence_signal -ffffffff81981e50 T dma_fence_signal_locked -ffffffff81981f60 T dma_fence_signal_timestamp -ffffffff81982040 T dma_fence_is_signaled -ffffffff819820b0 T dma_fence_is_signaled_locked -ffffffff819821f0 T dma_fence_timestamp -ffffffff81982290 T dma_fence_wait_timeout -ffffffff819822f0 T dma_fence_default_wait -ffffffff819824d0 T dma_fence_wait -ffffffff81982530 T dma_fence_enable_sw_signaling -ffffffff81982680 T dma_fence_init -ffffffff819826e0 T dma_fence_add_callback -ffffffff81982810 T dma_fence_remove_callback -ffffffff81982890 T dma_fence_context_alloc -ffffffff819828d0 t dma_fence_default_wait_cb -ffffffff81982920 T dma_fence_wait_any_timeout -ffffffff81982c40 T dma_fence_set_deadline -ffffffff81982ce0 T dma_fence_get_stub -ffffffff81982e70 T dma_fence_allocate_private_stub -ffffffff81982f90 T dma_fence_array_create -ffffffff819830a0 t irq_dma_fence_array_work -ffffffff81983130 T dma_fence_array_first -ffffffff81983180 T dma_fence_array_next -ffffffff819831d0 t dma_fence_array_get_driver_name -ffffffff81983200 t dma_fence_array_get_timeline_name -ffffffff81983230 t dma_fence_array_enable_signaling -ffffffff81983330 t dma_fence_array_signaled -ffffffff81983380 t dma_fence_array_release -ffffffff81983440 T dma_fence_chain_find_seqno -ffffffff81983560 T dma_fence_chain_walk -ffffffff81983790 T dma_fence_chain_init -ffffffff819838a0 t dma_fence_chain_get_driver_name -ffffffff819838d0 t dma_fence_chain_get_timeline_name -ffffffff81983900 t dma_fence_chain_enable_signaling -ffffffff81983ab0 t dma_fence_chain_signaled -ffffffff81983ba0 t dma_fence_chain_release -ffffffff81983ce0 T dma_fence_is_container -ffffffff81983d30 T dmabuf_read -ffffffff81983d60 T dmabuf_write -ffffffff81983d90 T dmabuf_ioctl -ffffffff81983dc0 T dmabuf_kqfilter -ffffffff81983df0 T dmabuf_stat -ffffffff81983eb0 T dmabuf_close -ffffffff81983f20 T dmabuf_seek -ffffffff81983fb0 T dma_buf_export -ffffffff81984060 T dma_buf_get -ffffffff819840f0 T dma_buf_put -ffffffff819841a0 T dma_buf_fd -ffffffff819842c0 T get_dma_buf -ffffffff81984300 T pcie_get_speed_cap -ffffffff819844b0 T printk -ffffffff81984550 T pcie_get_width_cap -ffffffff81984640 T pcie_aspm_enabled -ffffffff819846d0 T wait_on_bit -ffffffff819847a0 T wait_on_bit_timeout -ffffffff81984870 T wake_up_bit -ffffffff819848b0 T clear_and_wake_up_bit -ffffffff81984900 T bit_waitqueue -ffffffff81984930 T __var_waitqueue -ffffffff81984960 T drm_linux_init -ffffffff81984ad0 T drm_linux_exit -ffffffff81984b30 T pci_resize_resource -ffffffff81984c80 T register_shrinker -ffffffff81984cd0 T unregister_shrinker -ffffffff81984d30 T drmbackoff -ffffffff81984dc0 T bitmap_zalloc -ffffffff81984df0 T bitmap_free -ffffffff81984e10 T atomic_dec_and_mutex_lock -ffffffff81984e90 T interval_tree_iter_first -ffffffff81984f40 T interval_tree_remove -ffffffff81984f60 T interval_tree_insert -ffffffff81984fd0 T syncfile_read -ffffffff81985000 T syncfile_write -ffffffff81985030 T syncfile_ioctl -ffffffff81985060 T syncfile_kqfilter -ffffffff81985090 T syncfile_stat -ffffffff81985140 T syncfile_close -ffffffff819851e0 T syncfile_seek -ffffffff81985260 T fd_install -ffffffff81985330 T fput -ffffffff81985390 T get_unused_fd_flags -ffffffff819854a0 T put_unused_fd -ffffffff81985530 T sync_file_get_fence -ffffffff819855e0 T sync_file_create -ffffffff81985680 T drm_firmware_drivers_only -ffffffff819856b0 T memremap -ffffffff81985700 T memunmap -ffffffff81985720 T dma_tag_lookup -ffffffff81985790 T dma_alloc_coherent -ffffffff81985880 T dma_free_coherent -ffffffff819859b0 T dma_get_sgtable -ffffffff81985a80 T dma_map_resource -ffffffff81985ba0 T component_add -ffffffff81985c10 T component_add_typed -ffffffff81985c80 T component_bind_all -ffffffff81985d10 T component_master_add_with_match -ffffffff81985e00 t dma_fence_stub_get_name -ffffffff81985e30 t dma_fence_array_cb_func -ffffffff81985eb0 t dma_fence_chain_cb -ffffffff81985f70 t dma_fence_chain_timo -ffffffff81987000 T drmm_kzalloc -ffffffff81987100 T drmm_kcalloc -ffffffff81987210 T drmm_kstrdup -ffffffff81987340 T drmm_kfree -ffffffff81987440 T drmm_add_action -ffffffff81987500 T drmm_add_action_or_reset -ffffffff819875d0 T drm_managed_release -ffffffff81987690 T drmm_add_final_kfree -ffffffff81988000 T mipi_dsi_attach -ffffffff81988060 T mipi_dsi_detach -ffffffff819880f0 T devm_mipi_dsi_attach -ffffffff81988170 T mipi_dsi_packet_format_is_short -ffffffff819881b0 T mipi_dsi_packet_format_is_long -ffffffff819881f0 T mipi_dsi_create_packet -ffffffff81988300 T mipi_dsi_shutdown_peripheral -ffffffff819883b0 T mipi_dsi_turn_on_peripheral -ffffffff81988460 T mipi_dsi_set_maximum_return_packet_size -ffffffff81988510 T mipi_dsi_compression_mode -ffffffff819885c0 T mipi_dsi_picture_parameter_set -ffffffff81988670 T mipi_dsi_generic_write -ffffffff81988730 T mipi_dsi_generic_read -ffffffff819887e0 T mipi_dsi_dcs_write_buffer -ffffffff819888a0 T mipi_dsi_dcs_write -ffffffff819889f0 T mipi_dsi_dcs_read -ffffffff81988a90 T mipi_dsi_dcs_nop -ffffffff81988b40 T mipi_dsi_dcs_soft_reset -ffffffff81988bf0 T mipi_dsi_dcs_get_power_mode -ffffffff81988cb0 T mipi_dsi_dcs_get_pixel_format -ffffffff81988d70 T mipi_dsi_dcs_enter_sleep_mode -ffffffff81988e20 T mipi_dsi_dcs_exit_sleep_mode -ffffffff81988ed0 T mipi_dsi_dcs_set_display_off -ffffffff81988f80 T mipi_dsi_dcs_set_display_on -ffffffff81989030 T mipi_dsi_dcs_set_column_address -ffffffff819890f0 T mipi_dsi_dcs_set_page_address -ffffffff819891b0 T mipi_dsi_dcs_set_tear_off -ffffffff81989260 T mipi_dsi_dcs_set_tear_on -ffffffff81989310 T mipi_dsi_dcs_set_pixel_format -ffffffff8198a000 T __drm_mm_interval_first -ffffffff8198a0c0 T drm_mm_reserve_node -ffffffff8198a340 t add_hole -ffffffff8198a4a0 T drm_mm_insert_node_in_range -ffffffff8198aa90 T drm_mm_remove_node -ffffffff8198abc0 T drm_mm_replace_node -ffffffff8198ada0 T drm_mm_scan_init_with_range -ffffffff8198ae30 T drm_mm_scan_add_block -ffffffff8198afa0 T drm_mm_scan_remove_block -ffffffff8198b020 T drm_mm_scan_color_evict -ffffffff8198b100 T drm_mm_init -ffffffff8198b1b0 T drm_mm_takedown -ffffffff8198b1f0 T drm_mm_print -ffffffff8198c000 T drm_modeset_register_all -ffffffff8198c0a0 T drm_modeset_unregister_all -ffffffff8198c0e0 T drm_mode_getresources -ffffffff8198c390 T drm_mode_config_reset -ffffffff8198c4f0 T drmm_mode_config_init -ffffffff8198cb70 T drm_mode_config_cleanup -ffffffff8198ce90 t drm_mode_config_init_release -ffffffff8198cea0 T drm_mode_config_validate -ffffffff8198e000 T __drm_mode_object_add -ffffffff8198e100 T drm_mode_object_add -ffffffff8198e1e0 T drm_mode_object_register -ffffffff8198e230 T drm_mode_object_unregister -ffffffff8198e2d0 T drm_mode_object_lease_required -ffffffff8198e320 T __drm_mode_object_find -ffffffff8198e3d0 T drm_mode_object_find -ffffffff8198e480 T drm_mode_object_put -ffffffff8198e500 T drm_mode_object_get -ffffffff8198e560 T drm_object_attach_property -ffffffff8198e670 T drm_object_property_set_value -ffffffff8198e750 T drm_object_property_get_value -ffffffff8198e7e0 t __drm_object_property_get_value -ffffffff8198e8c0 T drm_object_property_get_default_value -ffffffff8198e990 T drm_mode_object_get_properties -ffffffff8198ead0 T drm_mode_obj_get_properties_ioctl -ffffffff8198ed20 T drm_mode_obj_find_prop_id -ffffffff8198ed80 T drm_mode_obj_set_property_ioctl -ffffffff81990000 T drm_mode_debug_printmodeline -ffffffff81990140 T drm_mode_vrefresh -ffffffff819901e0 T drm_mode_create -ffffffff81990200 T drm_mode_destroy -ffffffff81990240 T drm_mode_probed_add -ffffffff819902e0 T drm_analog_tv_mode -ffffffff81990b80 T drm_cvt_mode -ffffffff81991000 T drm_mode_set_name -ffffffff81991050 T drm_gtf_mode_complex -ffffffff81991350 T drm_gtf_mode -ffffffff819913a0 T drm_mode_get_hv_timing -ffffffff819913f0 T drm_mode_init -ffffffff819914c0 T drm_mode_set_crtcinfo -ffffffff81991680 T drm_mode_copy -ffffffff819916e0 T drm_mode_duplicate -ffffffff81991760 T drm_mode_match -ffffffff81991900 T drm_mode_equal -ffffffff81991920 T drm_mode_equal_no_clocks -ffffffff81991940 T drm_mode_equal_no_clocks_no_stereo -ffffffff81991a00 T drm_mode_validate_driver -ffffffff81991af0 T drm_mode_validate_size -ffffffff81991b40 T drm_mode_validate_ycbcr420 -ffffffff81991bb0 T drm_mode_is_420_only -ffffffff81991c00 T drm_get_mode_status_name -ffffffff81991c80 T drm_mode_prune_invalid -ffffffff81991f20 T drm_mode_sort -ffffffff81991f50 t drm_mode_compare -ffffffff819920f0 T drm_connector_list_update -ffffffff819922c0 T drm_mode_parse_command_line_for_connector -ffffffff819922f0 T drm_mode_create_from_cmdline_mode -ffffffff819924b0 T drm_mode_convert_to_umode -ffffffff81992650 T drm_mode_convert_umode -ffffffff81992870 T drm_mode_is_420_also -ffffffff819928c0 T drm_mode_is_420 -ffffffff81993000 T drm_helper_move_panel_connectors_to_head -ffffffff819930f0 T drm_helper_mode_fill_fb_struct -ffffffff819931b0 T drm_crtc_init -ffffffff81993280 T drm_mode_config_helper_suspend -ffffffff81993330 T drm_mode_config_helper_resume -ffffffff81994000 T drm_modeset_lock_all -ffffffff81994290 T drm_modeset_acquire_init -ffffffff81994320 T drm_modeset_lock_all_ctx -ffffffff81994410 T drm_modeset_backoff -ffffffff819944e0 T drm_modeset_acquire_fini -ffffffff81994510 T drm_warn_on_modeset_not_all_locked -ffffffff81994660 T drm_modeset_unlock_all -ffffffff81994750 T drm_modeset_drop_locks -ffffffff819947e0 T drm_modeset_unlock -ffffffff819948b0 t modeset_lock -ffffffff81994c10 T drm_modeset_lock_init -ffffffff81994c70 T drm_modeset_lock -ffffffff81994d90 T drm_modeset_lock_single_interruptible -ffffffff81994eb0 t __ww_mutex_lock -ffffffff81996000 T drm_mtrr_add -ffffffff81996070 T drm_mtrr_del -ffffffff81997000 T drm_panel_init -ffffffff81997090 T drm_panel_add -ffffffff819970e0 T drm_panel_remove -ffffffff81997140 T drm_panel_prepare -ffffffff81997250 T drm_panel_unprepare -ffffffff81997360 T drm_panel_enable -ffffffff81997450 T drm_panel_disable -ffffffff81997540 T drm_panel_get_modes -ffffffff819975a0 T drm_is_panel_follower -ffffffff819975f0 T drm_panel_add_follower -ffffffff81997640 T drm_panel_remove_follower -ffffffff81997660 T devm_drm_panel_add_follower -ffffffff819976b0 T drm_panel_of_backlight -ffffffff81998000 T drm_get_panel_orientation_quirk -ffffffff81999000 T drm_pci_set_busid -ffffffff81999090 t kasprintf -ffffffff8199a000 T drm_universal_plane_init -ffffffff8199a0e0 t __drm_universal_plane_init -ffffffff8199a5c0 T __drmm_universal_plane_alloc -ffffffff8199a700 t drmm_universal_plane_alloc_release -ffffffff8199a750 T __drm_universal_plane_alloc -ffffffff8199a890 T drm_plane_register_all -ffffffff8199a980 T drm_plane_unregister_all -ffffffff8199a9f0 T drm_plane_cleanup -ffffffff8199ab40 T drm_plane_from_index -ffffffff8199aba0 T drm_plane_force_disable -ffffffff8199acb0 T drm_mode_plane_set_obj_prop -ffffffff8199ad30 T drm_mode_getplane_res -ffffffff8199ae60 T drm_mode_getplane -ffffffff8199afb0 T drm_plane_check_pixel_format -ffffffff8199b070 T drm_any_plane_has_format -ffffffff8199b1a0 T drm_mode_setplane -ffffffff8199b490 T drm_mode_cursor_ioctl -ffffffff8199b500 t drm_mode_cursor_common -ffffffff8199ba40 T drm_mode_cursor2_ioctl -ffffffff8199ba60 T drm_mode_page_flip_ioctl -ffffffff8199bfe0 T drm_plane_enable_fb_damage_clips -ffffffff8199c000 T drm_plane_get_damage_clips_count -ffffffff8199c040 T __drm_plane_get_damage_clips -ffffffff8199c080 T drm_plane_get_damage_clips -ffffffff8199c120 T drm_create_scaling_filter_prop -ffffffff8199c270 T drm_plane_create_scaling_filter_property -ffffffff8199c2e0 t kvasprintf -ffffffff8199c380 t kasprintf -ffffffff8199c450 t create_in_format_blob -ffffffff8199c640 t __setplane_atomic -ffffffff8199c7e0 t __setplane_internal -ffffffff8199c9f0 t __setplane_check -ffffffff8199d000 T drm_plane_helper_update_primary -ffffffff8199d4c0 t get_connectors_for_crtc -ffffffff8199d5d0 T drm_plane_helper_disable_primary -ffffffff8199d680 T drm_plane_helper_destroy -ffffffff8199d6b0 T drm_plane_helper_atomic_check -ffffffff8199e000 T drm_prime_remove_buf_handle -ffffffff8199e0a0 T drm_prime_init_file_private -ffffffff8199e100 T drm_prime_destroy_file_private -ffffffff8199e160 T drm_gem_dmabuf_export -ffffffff8199e1c0 T drm_gem_dmabuf_release -ffffffff8199e200 T drm_gem_prime_fd_to_handle -ffffffff8199e420 T drm_gem_prime_import -ffffffff8199e480 t drm_prime_add_buf_handle -ffffffff8199e5c0 T drm_prime_fd_to_handle_ioctl -ffffffff8199e5f0 T drm_gem_prime_handle_to_fd -ffffffff8199e820 T drm_prime_handle_to_fd_ioctl -ffffffff8199e890 T drm_gem_map_attach -ffffffff8199e8e0 T drm_gem_map_detach -ffffffff8199e900 T drm_gem_dmabuf_vmap -ffffffff8199e920 T drm_gem_dmabuf_vunmap -ffffffff8199e940 T drm_gem_prime_mmap -ffffffff8199e990 T drm_prime_pages_to_sg -ffffffff8199e9e0 T drm_prime_get_contiguous_size -ffffffff8199ea30 T drm_gem_prime_export -ffffffff8199eac0 T drm_gem_prime_import_dev -ffffffff8199eb20 T drm_prime_sg_to_page_array -ffffffff8199eb70 T drm_prime_sg_to_dma_addr_array -ffffffff8199ebc0 T drm_prime_gem_destroy -ffffffff8199f000 T __drm_puts_coredump -ffffffff8199f0e0 T __drm_printfn_coredump -ffffffff8199f2b0 T __drm_puts_seq_file -ffffffff8199f2e0 T __drm_printfn_seq_file -ffffffff8199f310 T __drm_printfn_info -ffffffff8199f340 T __drm_printfn_debug -ffffffff8199f370 T __drm_printfn_err -ffffffff8199f3b0 T drm_puts -ffffffff8199f3e0 T drm_printf -ffffffff8199f460 T drm_print_bits -ffffffff8199f690 T drm_dev_printk -ffffffff8199f730 T __drm_dev_dbg -ffffffff8199f7c0 T ___drm_dbg -ffffffff8199f850 T __drm_err -ffffffff8199f8e0 T drm_print_regset32 -ffffffff819a0000 T drm_crtc_mode_valid -ffffffff819a0050 T drm_encoder_mode_valid -ffffffff819a0090 T drm_connector_mode_valid -ffffffff819a0110 T drm_kms_helper_poll_enable -ffffffff819a02a0 T drm_kms_helper_poll_reschedule -ffffffff819a0300 T drm_helper_probe_detect -ffffffff819a04f0 T drm_helper_probe_single_connector_modes -ffffffff819a0b20 t __drm_helper_update_and_validate -ffffffff819a0ed0 T drm_kms_helper_hotplug_event -ffffffff819a0f10 T drm_kms_helper_connector_hotplug_event -ffffffff819a0f50 T drm_kms_helper_is_poll_worker -ffffffff819a0f80 T drm_kms_helper_poll_disable -ffffffff819a10a0 T drm_kms_helper_poll_init -ffffffff819a1100 t output_poll_execute -ffffffff819a1350 T drm_kms_helper_poll_fini -ffffffff819a13a0 T drm_connector_helper_hpd_irq_event -ffffffff819a1460 t check_connector_changed -ffffffff819a1630 T drm_helper_hpd_irq_event -ffffffff819a1780 T drm_crtc_helper_mode_valid_fixed -ffffffff819a17d0 T drm_connector_helper_get_modes_from_ddc -ffffffff819a1860 T drm_connector_helper_get_modes_fixed -ffffffff819a19d0 T drm_connector_helper_get_modes -ffffffff819a1a40 T drm_connector_helper_tv_get_modes -ffffffff819a1c80 t __delayed_work_tick -ffffffff819a2000 T drm_property_create -ffffffff819a21f0 T drm_property_create_enum -ffffffff819a22a0 T drm_property_add_enum -ffffffff819a24a0 T drm_property_destroy -ffffffff819a2550 T drm_property_create_bitmask -ffffffff819a2680 T drm_property_create_range -ffffffff819a26f0 T drm_property_create_signed_range -ffffffff819a2760 T drm_property_create_object -ffffffff819a2800 T drm_property_create_bool -ffffffff819a2860 T drm_mode_getproperty_ioctl -ffffffff819a2ab0 T drm_property_create_blob -ffffffff819a2bf0 t drm_property_free_blob -ffffffff819a2c70 T drm_property_blob_put -ffffffff819a2cb0 T drm_property_destroy_user_blobs -ffffffff819a2d30 T drm_property_blob_get -ffffffff819a2d70 T drm_property_lookup_blob -ffffffff819a2d90 T drm_property_replace_global_blob -ffffffff819a2ee0 T drm_property_replace_blob -ffffffff819a2f50 T drm_mode_getblob_ioctl -ffffffff819a3010 T drm_mode_createblob_ioctl -ffffffff819a3110 T drm_mode_destroyblob_ioctl -ffffffff819a3210 T drm_property_change_valid_get -ffffffff819a3470 T drm_property_change_valid_put -ffffffff819a4000 T drm_rect_intersect -ffffffff819a4080 T drm_rect_clip_scaled -ffffffff819a42f0 T drm_rect_calc_hscale -ffffffff819a43c0 T drm_rect_calc_vscale -ffffffff819a4490 T drm_rect_debug_print -ffffffff819a45b0 T drm_rect_rotate -ffffffff819a4670 T drm_rect_rotate_inv -ffffffff819a5000 T drm_self_refresh_helper_update_avg_times -ffffffff819a5150 T drm_self_refresh_helper_alter_state -ffffffff819a52e0 T drm_self_refresh_helper_init -ffffffff819a5470 t drm_self_refresh_helper_entry_work -ffffffff819a55d0 T drm_self_refresh_helper_cleanup -ffffffff819a5650 t __delayed_work_tick -ffffffff819a6000 T drm_suballoc_manager_init -ffffffff819a6180 T drm_suballoc_manager_fini -ffffffff819a6290 t drm_suballoc_try_free -ffffffff819a6380 T drm_suballoc_new -ffffffff819a6db0 t drm_suballoc_event -ffffffff819a6ef0 T drm_suballoc_free -ffffffff819a8000 T drm_syncobj_find -ffffffff819a8080 T drm_syncobj_add_point -ffffffff819a8190 t syncobj_wait_syncobj_func -ffffffff819a8240 t syncobj_eventfd_entry_func -ffffffff819a8330 T drm_syncobj_replace_fence -ffffffff819a83e0 T drm_syncobj_find_fence -ffffffff819a8730 t drm_syncobj_fence_add_wait -ffffffff819a8800 T drm_syncobj_free -ffffffff819a8880 T drm_syncobj_create -ffffffff819a8a50 T drm_syncobj_get_handle -ffffffff819a8b70 T drm_syncobj_get_fd -ffffffff819a8bc0 T drm_syncobj_open -ffffffff819a8bf0 T drm_syncobj_release -ffffffff819a8c30 t drm_syncobj_release_handle -ffffffff819a8cf0 T drm_syncobj_create_ioctl -ffffffff819a8e20 T drm_syncobj_destroy_ioctl -ffffffff819a8f60 T drm_syncobj_handle_to_fd_ioctl -ffffffff819a9150 T drm_syncobj_fd_to_handle_ioctl -ffffffff819a9300 T drm_syncobj_transfer_ioctl -ffffffff819a96e0 T drm_timeout_abs_to_jiffies -ffffffff819a97b0 T drm_syncobj_wait_ioctl -ffffffff819a9930 t drm_syncobj_array_find -ffffffff819a9b50 t drm_syncobj_array_free -ffffffff819a9c40 T drm_syncobj_timeline_wait_ioctl -ffffffff819a9dc0 T drm_syncobj_eventfd_ioctl -ffffffff819a9df0 T drm_syncobj_reset_ioctl -ffffffff819a9ed0 T drm_syncobj_signal_ioctl -ffffffff819aa030 T drm_syncobj_timeline_signal_ioctl -ffffffff819aa270 T drm_syncobj_query_ioctl -ffffffff819aa480 t drm_syncobj_array_wait_timeout -ffffffff819aa8f0 t syncobj_wait_fence_func -ffffffff819aa910 t syncobj_eventfd_entry_fence_func -ffffffff819ab000 T drm_vblank_count -ffffffff819ab090 T drm_crtc_accurate_vblank_count -ffffffff819ab1a0 t drm_update_vblank_count -ffffffff819ab5e0 T drm_vblank_disable_and_save -ffffffff819ab730 T drm_vblank_init -ffffffff819ab8b0 t vblank_disable_fn -ffffffff819ab930 t drm_vblank_init_release -ffffffff819ab9c0 T drm_dev_has_vblank -ffffffff819ab9f0 T drm_crtc_vblank_waitqueue -ffffffff819aba40 T drm_calc_timestamping_constants -ffffffff819abc60 T drm_crtc_vblank_helper_get_vblank_timestamp_internal -ffffffff819ac1b0 T drm_crtc_vblank_helper_get_vblank_timestamp -ffffffff819ac1d0 T drm_crtc_vblank_count -ffffffff819ac260 T drm_crtc_vblank_count_and_time -ffffffff819ac320 t drm_vblank_count_and_time -ffffffff819ac3d0 T drm_crtc_next_vblank_start -ffffffff819ac520 T drm_crtc_arm_vblank_event -ffffffff819ac600 T drm_crtc_send_vblank_event -ffffffff819ac7b0 t send_vblank_event -ffffffff819ac860 T drm_vblank_get -ffffffff819ac960 t drm_vblank_enable -ffffffff819acb60 T drm_crtc_vblank_get -ffffffff819acc60 T drm_vblank_put -ffffffff819acd90 T drm_crtc_vblank_put -ffffffff819acdb0 T drm_wait_one_vblank -ffffffff819ad2b0 T drm_crtc_wait_one_vblank -ffffffff819ad2d0 T drm_crtc_vblank_off -ffffffff819ad6c0 T drm_crtc_vblank_reset -ffffffff819ad7f0 T drm_crtc_set_max_vblank_count -ffffffff819ad8d0 T drm_crtc_vblank_on -ffffffff819ada20 t drm_reset_vblank_timestamp -ffffffff819adc00 T drm_crtc_vblank_restore -ffffffff819adfe0 T drm_legacy_modeset_ctl_ioctl -ffffffff819ae200 T drm_wait_vblank_ioctl -ffffffff819ae750 t drm_wait_vblank_reply -ffffffff819ae860 t drm_queue_vblank_event -ffffffff819aeba0 T drm_handle_vblank -ffffffff819aee90 t drm_handle_vblank_events -ffffffff819af120 T drm_crtc_handle_vblank -ffffffff819af140 T drm_crtc_get_sequence_ioctl -ffffffff819af310 T drm_crtc_queue_sequence_ioctl -ffffffff819af5d0 t __get_vblank_counter -ffffffff819b0000 T drm_handle_vblank_works -ffffffff819b01a0 T drm_vblank_cancel_pending_works -ffffffff819b02e0 T drm_vblank_work_schedule -ffffffff819b0550 T drm_vblank_work_cancel_sync -ffffffff819b06a0 T drm_vblank_work_flush -ffffffff819b07d0 T drm_vblank_work_init -ffffffff819b0840 T drm_vblank_worker_init -ffffffff819b1000 T drm_vma_offset_manager_init -ffffffff819b1040 T drm_vma_offset_manager_destroy -ffffffff819b1060 T drm_vma_offset_lookup_locked -ffffffff819b10f0 T drm_vma_offset_add -ffffffff819b1180 T drm_vma_offset_remove -ffffffff819b11d0 T drm_vma_node_allow -ffffffff819b11f0 t vma_node_allow -ffffffff819b1310 T drm_vma_node_allow_once -ffffffff819b1330 T drm_vma_node_revoke -ffffffff819b13b0 T drm_vma_node_is_allowed -ffffffff819b2000 T hdmi_avi_infoframe_init -ffffffff819b2070 T hdmi_avi_infoframe_check -ffffffff819b20c0 T hdmi_avi_infoframe_pack_only -ffffffff819b22c0 T hdmi_avi_infoframe_pack -ffffffff819b2320 T hdmi_spd_infoframe_init -ffffffff819b23e0 T hdmi_spd_infoframe_check -ffffffff819b2430 T hdmi_spd_infoframe_pack_only -ffffffff819b2570 T hdmi_spd_infoframe_pack -ffffffff819b26d0 T hdmi_audio_infoframe_init -ffffffff819b2720 T hdmi_audio_infoframe_check -ffffffff819b2770 T hdmi_audio_infoframe_pack_only -ffffffff819b28d0 T hdmi_audio_infoframe_pack -ffffffff819b2920 T hdmi_audio_infoframe_pack_for_dp -ffffffff819b2a10 T hdmi_vendor_infoframe_init -ffffffff819b2a70 T hdmi_vendor_infoframe_check -ffffffff819b2b10 T hdmi_vendor_infoframe_pack_only -ffffffff819b2cd0 T hdmi_vendor_infoframe_pack -ffffffff819b2d70 T hdmi_drm_infoframe_init -ffffffff819b2dd0 T hdmi_drm_infoframe_check -ffffffff819b2e20 T hdmi_drm_infoframe_pack_only -ffffffff819b3010 T hdmi_drm_infoframe_pack -ffffffff819b3060 T hdmi_infoframe_check -ffffffff819b31b0 T hdmi_infoframe_pack_only -ffffffff819b33d0 T hdmi_infoframe_pack -ffffffff819b3540 T hdmi_infoframe_log -ffffffff819b44c0 T hdmi_drm_infoframe_unpack_only -ffffffff819b45a0 T hdmi_infoframe_unpack -ffffffff819b5000 T list_sort -ffffffff819b6000 T radix_tree_lookup -ffffffff819b60b0 T radix_tree_iter_find -ffffffff819b6180 T radix_tree_delete -ffffffff819b6310 T radix_tree_iter_delete -ffffffff819b6330 T radix_tree_insert -ffffffff819b7000 T sort -ffffffff819b7040 t qsort -ffffffff819b9000 T drm_dp_dual_mode_read -ffffffff819b9110 T drm_dp_dual_mode_write -ffffffff819b91f0 T drm_dp_dual_mode_detect -ffffffff819b9490 T drm_dp_dual_mode_max_tmds_clock -ffffffff819b95b0 T drm_dp_dual_mode_get_tmds_output -ffffffff819b96d0 T drm_dp_dual_mode_set_tmds_output -ffffffff819b9950 T drm_dp_get_dual_mode_type_name -ffffffff819b99c0 T drm_lspcon_get_mode -ffffffff819b9be0 T drm_lspcon_set_mode -ffffffff819ba000 T drm_dp_channel_eq_ok -ffffffff819ba080 T drm_dp_clock_recovery_ok -ffffffff819ba0f0 T drm_dp_get_adjust_request_voltage -ffffffff819ba130 T drm_dp_get_adjust_request_pre_emphasis -ffffffff819ba180 T drm_dp_get_adjust_tx_ffe_preset -ffffffff819ba1c0 T drm_dp_128b132b_lane_channel_eq_done -ffffffff819ba240 T drm_dp_128b132b_lane_symbol_locked -ffffffff819ba2b0 T drm_dp_128b132b_eq_interlane_align_done -ffffffff819ba2e0 T drm_dp_128b132b_cds_interlane_align_done -ffffffff819ba310 T drm_dp_128b132b_link_training_failed -ffffffff819ba340 T drm_dp_read_clock_recovery_delay -ffffffff819ba450 T drm_dp_read_channel_eq_delay -ffffffff819ba550 T drm_dp_128b132b_read_aux_rd_interval -ffffffff819ba600 T drm_dp_link_train_clock_recovery_delay -ffffffff819ba690 t __8b10b_clock_recovery_delay_us -ffffffff819ba710 T drm_dp_link_train_channel_eq_delay -ffffffff819ba780 T drm_dp_phy_name -ffffffff819ba7c0 T drm_dp_lttpr_link_train_clock_recovery_delay -ffffffff819ba7e0 T drm_dp_lttpr_link_train_channel_eq_delay -ffffffff819ba850 T drm_dp_link_rate_to_bw_code -ffffffff819ba8c0 T drm_dp_bw_code_to_link_rate -ffffffff819ba920 T drm_dp_dpcd_probe -ffffffff819baa60 t drm_dp_dpcd_access -ffffffff819bab90 T drm_dp_dpcd_read -ffffffff819bacc0 T drm_dp_dpcd_write -ffffffff819badd0 T drm_dp_dpcd_read_link_status -ffffffff819badf0 T drm_dp_dpcd_read_phy_link_status -ffffffff819baef0 T drm_dp_downstream_is_type -ffffffff819baf40 T drm_dp_downstream_is_tmds -ffffffff819bafb0 T drm_dp_send_real_edid_checksum -ffffffff819bb210 T drm_dp_read_dpcd_caps -ffffffff819bb3a0 T drm_dp_read_downstream_info -ffffffff819bb4a0 T drm_dp_downstream_max_dotclock -ffffffff819bb4f0 T drm_dp_downstream_max_tmds_clock -ffffffff819bb590 T drm_dp_downstream_min_tmds_clock -ffffffff819bb610 T drm_dp_downstream_max_bpc -ffffffff819bb6b0 T drm_dp_downstream_420_passthrough -ffffffff819bb710 T drm_dp_downstream_444_to_420_conversion -ffffffff819bb770 T drm_dp_downstream_rgb_to_ycbcr_conversion -ffffffff819bb7d0 T drm_dp_downstream_mode -ffffffff819bb860 T drm_dp_downstream_id -ffffffff819bb880 T drm_dp_downstream_debug -ffffffff819bb920 T drm_dp_subconnector_type -ffffffff819bb990 T drm_dp_set_subconnector_property -ffffffff819bba00 T drm_dp_read_sink_count_cap -ffffffff819bba50 T drm_dp_read_sink_count -ffffffff819bbab0 T drm_dp_remote_aux_init -ffffffff819bbae0 t drm_dp_aux_crc_work -ffffffff819bbc50 T drm_dp_aux_init -ffffffff819bbd00 T drm_dp_aux_register -ffffffff819bbe20 T drm_dp_aux_unregister -ffffffff819bbe50 T drm_dp_psr_setup_time -ffffffff819bbea0 T drm_dp_start_crc -ffffffff819bbf50 T drm_dp_stop_crc -ffffffff819bbfe0 T drm_dp_read_desc -ffffffff819bc1a0 T drm_dp_dsc_sink_max_slice_count -ffffffff819bc230 T drm_dp_dsc_sink_line_buf_depth -ffffffff819bc270 T drm_dp_dsc_sink_supported_input_bpcs -ffffffff819bc2e0 T drm_dp_read_lttpr_common_caps -ffffffff819bc3a0 T drm_dp_read_lttpr_phy_caps -ffffffff819bc460 T drm_dp_lttpr_count -ffffffff819bc4f0 T drm_dp_lttpr_max_link_rate -ffffffff819bc550 T drm_dp_lttpr_max_lane_count -ffffffff819bc580 T drm_dp_lttpr_voltage_swing_level_3_supported -ffffffff819bc5b0 T drm_dp_lttpr_pre_emphasis_level_3_supported -ffffffff819bc5e0 T drm_dp_get_phy_test_pattern -ffffffff819bc700 T drm_dp_set_phy_test_pattern -ffffffff819bc7c0 T drm_dp_vsc_sdp_log -ffffffff819bcaf0 T drm_dp_get_pcon_max_frl_bw -ffffffff819bcb40 T drm_dp_pcon_frl_prepare -ffffffff819bcb90 T drm_dp_pcon_is_frl_ready -ffffffff819bcbf0 T drm_dp_pcon_frl_configure_1 -ffffffff819bccf0 T drm_dp_pcon_frl_configure_2 -ffffffff819bcd50 T drm_dp_pcon_reset_frl_config -ffffffff819bcda0 T drm_dp_pcon_frl_enable -ffffffff819bce60 T drm_dp_pcon_hdmi_link_active -ffffffff819bceb0 T drm_dp_pcon_hdmi_link_mode -ffffffff819bcf20 T drm_dp_pcon_hdmi_frl_link_error_count -ffffffff819bd020 T drm_dp_pcon_enc_is_dsc_1_2 -ffffffff819bd050 T drm_dp_pcon_dsc_max_slices -ffffffff819bd0e0 T drm_dp_pcon_dsc_max_slice_width -ffffffff819bd110 T drm_dp_pcon_dsc_bpp_incr -ffffffff819bd150 T drm_dp_pcon_pps_default -ffffffff819bd1d0 T drm_dp_pcon_pps_override_buf -ffffffff819bd270 T drm_dp_pcon_pps_override_param -ffffffff819bd340 T drm_dp_pcon_convert_rgb_to_ycbcr -ffffffff819bd3e0 T drm_edp_backlight_set_level -ffffffff819bd4b0 T drm_edp_backlight_enable -ffffffff819bd6c0 t drm_edp_backlight_set_enable -ffffffff819bd800 T drm_edp_backlight_disable -ffffffff819bd840 T drm_edp_backlight_init -ffffffff819bdda0 T drm_panel_dp_aux_backlight -ffffffff819bdf30 t __128b132b_channel_eq_delay_us -ffffffff819bdfb0 t __8b10b_channel_eq_delay_us -ffffffff819be030 t drm_dp_aux_get_crc -ffffffff819be110 t drm_dp_i2c_xfer -ffffffff819be380 t drm_dp_i2c_functionality -ffffffff819be3b0 t drm_dp_i2c_do_msg -ffffffff819be790 t lock_bus -ffffffff819be7b0 t trylock_bus -ffffffff819be800 t unlock_bus -ffffffff819be820 t dp_aux_backlight_update_status -ffffffff819bf000 T drm_dp_encode_sideband_req -ffffffff819bf440 T drm_dp_decode_sideband_req -ffffffff819bf970 T drm_dp_dump_sideband_msg_req_body -ffffffff819bfd40 T drm_dp_mst_get_port_malloc -ffffffff819bfd90 T drm_dp_mst_put_port_malloc -ffffffff819bfe80 t kref_put -ffffffff819bfec0 T drm_atomic_get_mst_payload_state -ffffffff819bff10 T drm_dp_mst_dpcd_read -ffffffff819c01d0 T drm_dp_mst_dpcd_write -ffffffff819c0220 t drm_dp_send_dpcd_write -ffffffff819c0460 T drm_dp_mst_connector_late_register -ffffffff819c04e0 T drm_dp_mst_connector_early_unregister -ffffffff819c0520 T drm_dp_send_power_updown_phy -ffffffff819c0760 t drm_dp_mst_topology_put_port -ffffffff819c0880 t drm_dp_mst_wait_tx_reply -ffffffff819c0c20 T drm_dp_send_query_stream_enc_status -ffffffff819c0ee0 T drm_dp_add_payload_part1 -ffffffff819c1090 T drm_dp_remove_payload -ffffffff819c1230 T drm_dp_add_payload_part2 -ffffffff819c13f0 T drm_dp_get_vc_payload_bw -ffffffff819c1490 T drm_dp_read_mst_cap -ffffffff819c14f0 T drm_dp_mst_topology_mgr_set_mst -ffffffff819c17a0 t drm_dp_dpcd_write_payload -ffffffff819c1940 t drm_dp_mst_topology_put_mstb -ffffffff819c1a40 T drm_dp_mst_topology_mgr_suspend -ffffffff819c1b00 t drm_dp_mst_topology_mgr_invalidate_mstb -ffffffff819c1b70 T drm_dp_mst_topology_mgr_resume -ffffffff819c1db0 T drm_dp_mst_hpd_irq_handle_event -ffffffff819c2d20 T drm_dp_mst_hpd_irq_send_new_request -ffffffff819c2da0 T drm_dp_mst_detect_port -ffffffff819c2f00 T drm_dp_mst_edid_read -ffffffff819c3000 T drm_dp_mst_get_edid -ffffffff819c3060 T drm_dp_atomic_find_time_slots -ffffffff819c3310 T drm_atomic_get_mst_topology_state -ffffffff819c3320 T drm_dp_atomic_release_time_slots -ffffffff819c3540 T drm_dp_mst_atomic_setup_commit -ffffffff819c36d0 T drm_dp_mst_atomic_wait_for_dependencies -ffffffff819c3840 T drm_dp_mst_root_conn_atomic_check -ffffffff819c3960 T drm_dp_mst_update_slots -ffffffff819c39c0 T drm_dp_check_act_status -ffffffff819c3b50 T drm_dp_calc_pbn_mode -ffffffff819c3bb0 T drm_dp_mst_dump_topology -ffffffff819c3e30 t drm_dp_mst_dump_mstb -ffffffff819c3ea0 T drm_dp_mst_add_affected_dsc_crtcs -ffffffff819c3fd0 T drm_dp_mst_dsc_aux_for_port -ffffffff819c4200 T drm_dp_mst_atomic_enable_dsc -ffffffff819c4380 T drm_dp_mst_atomic_check -ffffffff819c4670 t drm_dp_mst_atomic_check_mstb_bw_limit -ffffffff819c48f0 t drm_dp_mst_duplicate_state -ffffffff819c4ac0 t drm_dp_mst_destroy_state -ffffffff819c4b80 T drm_atomic_get_old_mst_topology_state -ffffffff819c4b90 T drm_atomic_get_new_mst_topology_state -ffffffff819c4ba0 T drm_dp_mst_topology_mgr_init -ffffffff819c4e10 t drm_dp_mst_link_probe_work -ffffffff819c50a0 t drm_dp_tx_work -ffffffff819c50f0 t drm_dp_delayed_destroy_work -ffffffff819c55a0 t drm_dp_mst_up_req_work -ffffffff819c5ad0 T drm_dp_mst_topology_mgr_destroy -ffffffff819c5b60 t drm_dp_mst_is_virtual_dpcd -ffffffff819c5c40 t drm_dp_free_mst_branch_device -ffffffff819c5c80 t drm_dp_mst_topology_get_port_validated_locked -ffffffff819c5d00 t drm_dp_mst_dump_sideband_msg_tx -ffffffff819c5f10 t process_single_down_tx_qlock -ffffffff819c6080 t process_single_tx_qlock -ffffffff819c6550 t drm_dp_msg_data_crc4 -ffffffff819c6680 t drm_dp_payload_send_msg -ffffffff819c6ae0 t drm_dp_mst_topology_get_mstb_validated_locked -ffffffff819c6b60 t drm_dp_get_one_sb_msg -ffffffff819c72a0 t drm_dp_get_mst_branch_device -ffffffff819c7400 t drm_dp_check_and_send_link_address -ffffffff819c74d0 t drm_dp_send_link_address -ffffffff819c81a0 t drm_dp_send_enum_path_resources -ffffffff819c8400 t drm_dp_port_set_pdt -ffffffff819c86d0 t drm_dp_mst_port_add_connector -ffffffff819c88b0 t drm_dp_mst_i2c_xfer -ffffffff819c8fd0 t drm_dp_mst_i2c_functionality -ffffffff819c9000 t get_mst_branch_device_by_guid_helper -ffffffff819ca000 T drm_dsc_dp_pps_header_init -ffffffff819ca030 T drm_dsc_dp_rc_buffer_size -ffffffff819ca090 T drm_dsc_pps_payload_pack -ffffffff819ca340 T drm_dsc_set_const_params -ffffffff819ca390 T drm_dsc_set_rc_buf_thresh -ffffffff819ca400 T drm_dsc_setup_rc_params -ffffffff819ca5c0 T drm_dsc_compute_rc_parameters -ffffffff819ca8c0 T drm_dsc_get_bpp_int -ffffffff819ca940 T drm_dsc_initial_scale_value -ffffffff819ca980 T drm_dsc_flatness_det_thresh -ffffffff819cb000 T drm_connector_attach_content_protection_property -ffffffff819cb030 T drm_hdcp_check_ksvs_revoked -ffffffff819cb080 T drm_hdcp_update_content_protection -ffffffff819cc000 T drm_hdmi_infoframe_set_hdr_metadata -ffffffff819cc120 T drm_hdmi_avi_infoframe_colorimetry -ffffffff819cc180 T drm_hdmi_avi_infoframe_bars -ffffffff819cc1d0 T drm_hdmi_avi_infoframe_content_type -ffffffff819cd000 T drm_scdc_read -ffffffff819cd090 T drm_scdc_write -ffffffff819cd170 T drm_scdc_get_scrambling_status -ffffffff819cd250 T drm_scdc_set_scrambling -ffffffff819cd3e0 T drm_scdc_set_high_tmds_clock_ratio -ffffffff819ce000 T drm_gem_ttm_mmap -ffffffff819ce070 T drm_gem_ttm_vmap -ffffffff819ce080 T drm_gem_ttm_vunmap -ffffffff819cf000 T ttm_agp_bind -ffffffff819cf050 T ttm_agp_unbind -ffffffff819cf070 T ttm_agp_is_bound -ffffffff819cf0c0 T ttm_agp_destroy -ffffffff819cf0e0 T ttm_agp_tt_create -ffffffff819d0000 T ttm_bo_move_to_lru_tail -ffffffff819d0040 T ttm_bo_set_bulk_move -ffffffff819d0100 T ttm_bo_put -ffffffff819d0630 T ttm_bo_eviction_valuable -ffffffff819d0680 T ttm_mem_evict_first -ffffffff819d0da0 t ttm_bo_evict_swapout_allowable -ffffffff819d0fb0 t dma_resv_unlock -ffffffff819d1050 t ttm_bo_cleanup_refs -ffffffff819d13b0 t ttm_bo_unreserve -ffffffff819d1490 T ttm_bo_pin -ffffffff819d1530 T ttm_bo_unpin -ffffffff819d1640 T ttm_bo_mem_space -ffffffff819d1880 t ttm_bo_add_move_fence -ffffffff819d1940 T ttm_bo_validate -ffffffff819d1ad0 T ttm_bo_init_reserved -ffffffff819d1cc0 T ttm_bo_init_validate -ffffffff819d1d60 T ttm_bo_unmap_virtual -ffffffff819d1e90 T ttm_bo_wait_ctx -ffffffff819d1f20 T ttm_bo_swapout -ffffffff819d21f0 t ttm_bo_handle_move_mem -ffffffff819d2370 T ttm_bo_tt_destroy -ffffffff819d23e0 t ttm_bo_delayed_delete -ffffffff819d3000 T ttm_mem_io_reserve -ffffffff819d3060 T ttm_mem_io_free -ffffffff819d30d0 T ttm_move_memcpy -ffffffff819d3290 T ttm_bo_move_memcpy -ffffffff819d34f0 T ttm_bo_move_sync_cleanup -ffffffff819d3600 T ttm_io_prot -ffffffff819d3640 T ttm_bo_kmap -ffffffff819d3920 T ttm_bo_kunmap -ffffffff819d3a50 T ttm_bo_vmap -ffffffff819d3c40 T ttm_bo_vunmap -ffffffff819d3d30 T ttm_bo_move_accel_cleanup -ffffffff819d4010 T ttm_bo_pipeline_gutting -ffffffff819d4210 t ttm_buffer_object_transfer -ffffffff819d4440 t ttm_transfered_destroy -ffffffff819d5000 T ttm_bo_vm_reserve -ffffffff819d5180 t dma_resv_lock_interruptible -ffffffff819d52a0 T ttm_bo_vm_fault_reserved -ffffffff819d55e0 T ttm_bo_vm_fault -ffffffff819d5740 T ttm_bo_vm_reference -ffffffff819d5770 T ttm_bo_vm_detach -ffffffff819d5780 T ttm_bo_mmap_obj -ffffffff819d6000 T ttm_global_swapout -ffffffff819d60e0 T ttm_device_swapout -ffffffff819d6200 T ttm_device_init -ffffffff819d6490 T ttm_device_fini -ffffffff819d6650 T ttm_device_clear_dma_mappings -ffffffff819d6700 t ttm_device_clear_lru_dma_mappings -ffffffff819d7000 T ttm_eu_backoff_reservation -ffffffff819d7130 T ttm_eu_reserve_buffers -ffffffff819d75c0 T ttm_eu_fence_buffer_objects -ffffffff819d7710 t __ww_mutex_lock -ffffffff819d8000 T ttm_prot_from_caching -ffffffff819d9000 T ttm_pool_alloc -ffffffff819d9a90 t ttm_pool_free_range -ffffffff819d9dc0 T ttm_pool_free -ffffffff819d9e20 t ttm_pool_shrink -ffffffff819da000 T ttm_pool_init -ffffffff819da2b0 T ttm_pool_fini -ffffffff819da4f0 t ttm_pool_type_fini -ffffffff819da730 T ttm_pool_mgr_init -ffffffff819daa10 t ttm_pool_shrinker_count -ffffffff819daa60 t ttm_pool_shrinker_scan -ffffffff819daab0 T ttm_pool_mgr_fini -ffffffff819db000 T ttm_range_man_init_nocheck -ffffffff819db180 T ttm_range_man_fini_nocheck -ffffffff819db310 t ttm_range_man_alloc -ffffffff819db460 t ttm_range_man_free -ffffffff819db4c0 t ttm_range_man_intersects -ffffffff819db520 t ttm_range_man_compatible -ffffffff819db580 t ttm_range_man_debug -ffffffff819dc000 T ttm_lru_bulk_move_init -ffffffff819dc020 T ttm_lru_bulk_move_tail -ffffffff819dc1e0 T ttm_resource_add_bulk_move -ffffffff819dc2b0 T ttm_resource_del_bulk_move -ffffffff819dc3f0 T ttm_resource_move_to_lru_tail -ffffffff819dc560 T ttm_resource_init -ffffffff819dc650 T ttm_resource_fini -ffffffff819dc6c0 T ttm_resource_alloc -ffffffff819dc810 T ttm_resource_free -ffffffff819dc9d0 T ttm_resource_intersects -ffffffff819dca30 T ttm_resource_compatible -ffffffff819dca90 T ttm_resource_compat -ffffffff819dcc20 T ttm_resource_set_bo -ffffffff819dcc70 T ttm_resource_manager_init -ffffffff819dcd20 T ttm_resource_manager_evict_all -ffffffff819dcef0 T ttm_resource_manager_usage -ffffffff819dcf50 T ttm_resource_manager_debug -ffffffff819dd040 T ttm_resource_manager_first -ffffffff819dd0d0 T ttm_resource_manager_next -ffffffff819dd1f0 T ttm_kmap_iter_iomap_init -ffffffff819dd250 T ttm_kmap_iter_linear_io_init -ffffffff819dd430 T ttm_kmap_iter_linear_io_fini -ffffffff819dd480 T ttm_resource_manager_create_debugfs -ffffffff819dd4b0 t ttm_kmap_iter_iomap_map_local -ffffffff819dd5a0 t ttm_kmap_iter_iomap_unmap_local -ffffffff819dd5d0 t ttm_kmap_iter_linear_io_map_local -ffffffff819de000 T ttm_sys_man_init -ffffffff819de130 t ttm_sys_man_alloc -ffffffff819de1b0 t ttm_sys_man_free -ffffffff819df000 T ttm_tt_create -ffffffff819df100 T ttm_tt_destroy -ffffffff819df120 T ttm_tt_init -ffffffff819df210 T ttm_tt_fini -ffffffff819df320 T ttm_sg_tt_init -ffffffff819df550 T ttm_tt_swapin -ffffffff819df670 T ttm_tt_swapout -ffffffff819df6c0 T ttm_tt_populate -ffffffff819df830 T ttm_tt_unpopulate -ffffffff819df8e0 T ttm_tt_mgr_init -ffffffff819df940 T ttm_kmap_iter_tt_init -ffffffff819df9a0 T ttm_tt_pages_limit -ffffffff819df9d0 t ttm_kmap_iter_tt_map_local -ffffffff819dfa30 t ttm_kmap_iter_tt_unmap_local -ffffffff819e0000 T drm_sched_entity_init -ffffffff819e0170 T drm_sched_entity_modify_sched -ffffffff819e01f0 T drm_sched_entity_is_ready -ffffffff819e0230 T drm_sched_entity_error -ffffffff819e0270 T drm_sched_entity_flush -ffffffff819e05b0 t drm_sched_entity_kill -ffffffff819e0770 T drm_sched_entity_fini -ffffffff819e07e0 T drm_sched_entity_destroy -ffffffff819e0880 T drm_sched_entity_set_priority -ffffffff819e08c0 T drm_sched_entity_pop_job -ffffffff819e0b10 T drm_sched_entity_select_rq -ffffffff819e0be0 T drm_sched_entity_push_job -ffffffff819e0d30 t drm_sched_entity_kill_jobs_cb -ffffffff819e0e80 t drm_sched_entity_kill_jobs_work -ffffffff819e0f00 t drm_sched_entity_clear_dep -ffffffff819e0f20 t drm_sched_entity_wakeup -ffffffff819e1000 T drm_sched_fence_slab_init -ffffffff819e1060 T drm_sched_fence_slab_fini -ffffffff819e1080 T drm_sched_fence_scheduled -ffffffff819e10e0 T drm_sched_fence_finished -ffffffff819e1100 T drm_sched_fence_free -ffffffff819e11a0 T to_drm_sched_fence -ffffffff819e1200 T drm_sched_fence_alloc -ffffffff819e1280 T drm_sched_fence_init -ffffffff819e1300 t drm_sched_fence_get_driver_name -ffffffff819e1330 t drm_sched_fence_get_timeline_name -ffffffff819e1390 t drm_sched_fence_release_scheduled -ffffffff819e1480 t drm_sched_fence_release_finished -ffffffff819e14c0 t drm_sched_fence_set_deadline_finished -ffffffff819e2000 T drm_sched_rq_update_fifo -ffffffff819e20e0 T drm_sched_rq_add_entity -ffffffff819e2170 T drm_sched_rq_remove_entity -ffffffff819e2250 T drm_sched_fault -ffffffff819e22a0 T drm_sched_suspend_timeout -ffffffff819e2320 T drm_sched_resume_timeout -ffffffff819e23c0 T drm_sched_stop -ffffffff819e2590 T drm_sched_start -ffffffff819e26c0 t drm_sched_job_done_cb -ffffffff819e26e0 t drm_sched_job_done -ffffffff819e27b0 T drm_sched_resubmit_jobs -ffffffff819e2900 T drm_sched_job_init -ffffffff819e2990 T drm_sched_job_arm -ffffffff819e2a20 T drm_sched_job_add_dependency -ffffffff819e2b90 T drm_sched_job_add_syncobj_dependency -ffffffff819e2bf0 T drm_sched_job_add_resv_dependencies -ffffffff819e2ca0 T drm_sched_job_add_implicit_dependencies -ffffffff819e2d60 T drm_sched_job_cleanup -ffffffff819e2e10 T drm_sched_wakeup_if_can_queue -ffffffff819e2ed0 T drm_sched_pick_best -ffffffff819e2f80 T drm_sched_init -ffffffff819e3230 t drm_sched_job_timedout -ffffffff819e3380 t drm_sched_main -ffffffff819e37b0 T drm_sched_fini -ffffffff819e3990 T drm_sched_increase_karma -ffffffff819e3ab0 t __delayed_work_tick -ffffffff819e3ad0 t drm_sched_get_cleanup_job -ffffffff819e3c10 t drm_sched_select_entity -ffffffff819e4000 t ch7017_init -ffffffff819e4140 t ch7017_dpms -ffffffff819e4380 t ch7017_mode_valid -ffffffff819e43c0 t ch7017_mode_set -ffffffff819e4670 t ch7017_detect -ffffffff819e46a0 t ch7017_get_hw_state -ffffffff819e4730 t ch7017_destroy -ffffffff819e4780 t ch7017_dump_regs -ffffffff819e5000 t ch7xxx_init -ffffffff819e52a0 t ch7xxx_dpms -ffffffff819e5380 t ch7xxx_mode_valid -ffffffff819e53c0 t ch7xxx_mode_set -ffffffff819e5940 t ch7xxx_detect -ffffffff819e5b90 t ch7xxx_get_hw_state -ffffffff819e5c70 t ch7xxx_destroy -ffffffff819e5cc0 t ch7xxx_dump_regs -ffffffff819e6000 t ivch_init -ffffffff819e6390 t ivch_dpms -ffffffff819e6660 t ivch_mode_valid -ffffffff819e66a0 t ivch_mode_set -ffffffff819e6950 t ivch_detect -ffffffff819e6980 t ivch_get_hw_state -ffffffff819e6a70 t ivch_destroy -ffffffff819e6ac0 t ivch_dump_regs -ffffffff819e7660 t ivch_reset -ffffffff819e8000 t ns2501_init -ffffffff819e8200 t ns2501_dpms -ffffffff819e8920 t ns2501_mode_valid -ffffffff819e8a00 t ns2501_mode_set -ffffffff819e9c20 t ns2501_detect -ffffffff819e9c50 t ns2501_get_hw_state -ffffffff819e9d30 t ns2501_destroy -ffffffff819ea000 t sil164_init -ffffffff819ea200 t sil164_dpms -ffffffff819ea330 t sil164_mode_valid -ffffffff819ea360 t sil164_mode_set -ffffffff819ea4f0 t sil164_detect -ffffffff819ea5d0 t sil164_get_hw_state -ffffffff819ea6a0 t sil164_destroy -ffffffff819ea6f0 t sil164_dump_regs -ffffffff819eb000 t tfp410_init -ffffffff819eb100 t tfp410_dpms -ffffffff819eb230 t tfp410_mode_valid -ffffffff819eb260 t tfp410_mode_set -ffffffff819eb290 t tfp410_detect -ffffffff819eb370 t tfp410_get_hw_state -ffffffff819eb440 t tfp410_destroy -ffffffff819eb490 t tfp410_dump_regs -ffffffff819ebee0 t tfp410_getid -ffffffff819ed000 T vlv_get_dpll -ffffffff819ed040 T g4x_dp_set_clock -ffffffff819ed110 T g4x_dp_port_enabled -ffffffff819ed310 T vlv_active_pipe -ffffffff819ed370 T g4x_dp_init -ffffffff819ed810 t intel_dp_hotplug -ffffffff819ed960 t intel_dp_get_hw_state -ffffffff819eda10 t intel_dp_get_config -ffffffff819edcb0 t chv_dp_pre_pll_enable -ffffffff819edcf0 t chv_pre_enable_dp -ffffffff819edd30 t vlv_enable_dp -ffffffff819edd70 t vlv_disable_dp -ffffffff819edde0 t chv_post_disable_dp -ffffffff819ede40 t chv_dp_post_pll_disable -ffffffff819ede60 t vlv_dp_pre_pll_enable -ffffffff819edea0 t vlv_pre_enable_dp -ffffffff819edee0 t vlv_post_disable_dp -ffffffff819edf00 t g4x_pre_enable_dp -ffffffff819ee190 t g4x_enable_dp -ffffffff819ee1e0 t g4x_disable_dp -ffffffff819ee250 t g4x_post_disable_dp -ffffffff819ee430 t cpt_set_link_train -ffffffff819ee4f0 t g4x_set_link_train -ffffffff819ee5c0 t chv_set_signal_levels -ffffffff819ee6a0 t vlv_set_signal_levels -ffffffff819ee780 t ivb_cpu_edp_set_signal_levels -ffffffff819ee880 t snb_cpu_edp_set_signal_levels -ffffffff819ee980 t g4x_set_signal_levels -ffffffff819eea80 t intel_dp_preemph_max_3 -ffffffff819eeab0 t intel_dp_voltage_max_3 -ffffffff819eeae0 t intel_dp_preemph_max_2 -ffffffff819eeb10 t intel_dp_voltage_max_2 -ffffffff819eeb40 t g4x_digital_port_connected -ffffffff819eebe0 t ilk_digital_port_connected -ffffffff819eec50 t ibx_digital_port_connected -ffffffff819eecc0 t intel_dp_encoder_reset -ffffffff819eedc0 t intel_dp_encoder_destroy -ffffffff819eee20 t intel_dp_prepare -ffffffff819ef0b0 t intel_enable_dp -ffffffff819ef2f0 t intel_dp_link_down -ffffffff819ef630 t assert_dp_port -ffffffff819f0000 T g4x_hdmi_connector_atomic_check -ffffffff819f0150 T g4x_hdmi_init -ffffffff819f04e0 t intel_hdmi_hotplug -ffffffff819f0530 t g4x_hdmi_compute_config -ffffffff819f0660 t pch_disable_hdmi -ffffffff819f0680 t pch_post_disable_hdmi -ffffffff819f06a0 t g4x_disable_hdmi -ffffffff819f06f0 t intel_hdmi_get_hw_state -ffffffff819f07a0 t intel_hdmi_get_config -ffffffff819f0940 t chv_hdmi_pre_pll_enable -ffffffff819f0980 t chv_hdmi_pre_enable -ffffffff819f0ad0 t vlv_enable_hdmi -ffffffff819f0b50 t chv_hdmi_post_disable -ffffffff819f0bb0 t chv_hdmi_post_pll_disable -ffffffff819f0bd0 t vlv_hdmi_pre_pll_enable -ffffffff819f0c10 t vlv_hdmi_pre_enable -ffffffff819f0d50 t vlv_hdmi_post_disable -ffffffff819f0d70 t intel_hdmi_pre_enable -ffffffff819f0df0 t cpt_enable_hdmi -ffffffff819f1010 t ibx_enable_hdmi -ffffffff819f1220 t g4x_enable_hdmi -ffffffff819f1330 t intel_disable_hdmi -ffffffff819f1530 t intel_hdmi_prepare -ffffffff819f2000 T hsw_ips_disable -ffffffff819f2150 T hsw_ips_pre_update -ffffffff819f21f0 T hsw_ips_post_update -ffffffff819f2410 T hsw_crtc_supports_ips -ffffffff819f2470 T hsw_crtc_state_ips_capable -ffffffff819f2510 T hsw_ips_compute_config -ffffffff819f2650 T hsw_ips_get_config -ffffffff819f26f0 T hsw_ips_crtc_debugfs_add -ffffffff819f3000 T i9xx_check_plane_surface -ffffffff819f32d0 T i965_plane_max_stride -ffffffff819f3340 T intel_primary_plane_create -ffffffff819f37d0 t i9xx_plane_min_cdclk -ffffffff819f3840 t i9xx_plane_max_stride -ffffffff819f38b0 t hsw_primary_max_stride -ffffffff819f3900 t ilk_primary_max_stride -ffffffff819f3970 t i830_plane_update_arm -ffffffff819f39b0 t i9xx_plane_update_noarm -ffffffff819f3ae0 t i9xx_plane_update_arm -ffffffff819f3e90 t i9xx_plane_disable_arm -ffffffff819f3fa0 t i9xx_plane_get_hw_state -ffffffff819f4080 t i9xx_plane_check -ffffffff819f4190 t vlv_primary_async_flip -ffffffff819f4220 t vlv_primary_enable_flip_done -ffffffff819f4280 t vlv_primary_disable_flip_done -ffffffff819f42e0 t g4x_primary_async_flip -ffffffff819f4410 t bdw_primary_enable_flip_done -ffffffff819f4470 t bdw_primary_disable_flip_done -ffffffff819f44d0 t ivb_primary_enable_flip_done -ffffffff819f4530 t ivb_primary_disable_flip_done -ffffffff819f4590 t ilk_primary_enable_flip_done -ffffffff819f45f0 t ilk_primary_disable_flip_done -ffffffff819f4650 T i9xx_get_initial_plane_config -ffffffff819f4a50 t i965_plane_format_mod_supported -ffffffff819f4b40 t i8xx_plane_format_mod_supported -ffffffff819f4be0 t i9xx_plane_ctl -ffffffff819f5000 T intel_set_memory_cxsr -ffffffff819f50a0 t _intel_set_memory_cxsr -ffffffff819f5350 T ilk_disable_lp_wm -ffffffff819f5430 T ilk_wm_sanitize -ffffffff819f5710 T i9xx_wm_init -ffffffff819f5d30 t intel_get_cxsr_latency -ffffffff819f5df0 t ilk_compute_pipe_wm -ffffffff819f6160 t ilk_compute_intermediate_wm -ffffffff819f6370 t ilk_initial_watermarks -ffffffff819f63f0 t ilk_optimize_watermarks -ffffffff819f64a0 t ilk_wm_get_hw_state -ffffffff819f68a0 t ilk_compute_wm_level -ffffffff819f6d60 t ilk_validate_wm_level -ffffffff819f6ea0 t ilk_compute_wm_maximums -ffffffff819f70d0 t ilk_program_watermarks -ffffffff819f7e60 t ilk_wm_merge -ffffffff819f8110 t vlv_compute_pipe_wm -ffffffff819f8ac0 t vlv_compute_intermediate_wm -ffffffff819f8de0 t vlv_initial_watermarks -ffffffff819f8e60 t vlv_atomic_update_fifo -ffffffff819f9170 t vlv_optimize_watermarks -ffffffff819f9230 t vlv_wm_get_hw_state_and_sanitize -ffffffff819f9f80 t _vlv_compute_pipe_wm -ffffffff819fa2a0 t vlv_invalidate_wms -ffffffff819fa410 t vlv_program_watermarks -ffffffff819fab60 t chv_set_memory_dvfs -ffffffff819fad20 t g4x_compute_pipe_wm -ffffffff819fb5f0 t g4x_compute_intermediate_wm -ffffffff819fba50 t g4x_initial_watermarks -ffffffff819fbaf0 t g4x_optimize_watermarks -ffffffff819fbbd0 t g4x_wm_get_hw_state_and_sanitize -ffffffff819fc550 t _g4x_compute_pipe_wm -ffffffff819fc810 t g4x_program_watermarks -ffffffff819fcbb0 t pnv_update_wm -ffffffff819fd260 t i965_update_wm -ffffffff819fd630 t i9xx_update_wm -ffffffff819fddd0 t i845_update_wm -ffffffff819fe000 T icl_dsi_frame_update -ffffffff819fe0b0 T icl_dsi_init -ffffffff819fe930 t gen11_dsi_pre_pll_enable -ffffffff819fed40 t gen11_dsi_pre_enable -ffffffff81a01a10 t gen11_dsi_enable -ffffffff81a01cc0 t gen11_dsi_disable -ffffffff81a01cf0 t gen11_dsi_post_disable -ffffffff81a02950 t gen11_dsi_get_config -ffffffff81a02b70 t gen11_dsi_sync_state -ffffffff81a02c20 t gen11_dsi_compute_config -ffffffff81a02fb0 t gen11_dsi_get_hw_state -ffffffff81a03150 t gen11_dsi_initial_fastset_check -ffffffff81a031d0 t gen11_dsi_get_power_domains -ffffffff81a032b0 t gen11_dsi_gate_clocks -ffffffff81a03370 t gen11_dsi_is_clock_enabled -ffffffff81a03430 t gen11_dsi_encoder_destroy -ffffffff81a03440 t wait_for_cmds_dispatched_to_panel -ffffffff81a038a0 t wait_for_header_credits -ffffffff81a03a30 t wait_for_payload_credits -ffffffff81a03bc0 t gen11_dsi_mode_valid -ffffffff81a03c30 t gen11_dsi_host_attach -ffffffff81a03c60 t gen11_dsi_host_detach -ffffffff81a03c90 t gen11_dsi_host_transfer -ffffffff81a04000 T intel_digital_connector_atomic_get_property -ffffffff81a04090 T intel_digital_connector_atomic_set_property -ffffffff81a04110 T intel_digital_connector_atomic_check -ffffffff81a04210 T intel_digital_connector_duplicate_state -ffffffff81a04290 T intel_connector_needs_modeset -ffffffff81a04300 T intel_any_crtc_needs_modeset -ffffffff81a04390 T intel_atomic_get_digital_connector_state -ffffffff81a043a0 T intel_crtc_duplicate_state -ffffffff81a044d0 T intel_crtc_free_hw_state -ffffffff81a04530 T intel_crtc_destroy_state -ffffffff81a045e0 T intel_atomic_state_alloc -ffffffff81a04660 T intel_atomic_state_free -ffffffff81a046a0 T intel_atomic_state_clear -ffffffff81a046f0 T intel_atomic_get_crtc_state -ffffffff81a05000 T intel_plane_alloc -ffffffff81a050c0 T intel_plane_free -ffffffff81a05100 T intel_plane_destroy_state -ffffffff81a051d0 T intel_plane_duplicate_state -ffffffff81a05280 T intel_adjusted_rate -ffffffff81a05300 T intel_plane_pixel_rate -ffffffff81a05390 T intel_plane_data_rate -ffffffff81a05450 T intel_plane_calc_min_cdclk -ffffffff81a055b0 T intel_plane_copy_uapi_to_hw_state -ffffffff81a05720 T intel_plane_copy_hw_state -ffffffff81a05810 T intel_plane_set_invisible -ffffffff81a05910 T intel_plane_atomic_check_with_state -ffffffff81a06580 T intel_plane_atomic_check -ffffffff81a066e0 T intel_plane_update_noarm -ffffffff81a06720 T intel_plane_update_arm -ffffffff81a06760 T intel_plane_disable_arm -ffffffff81a06780 T intel_crtc_planes_update_noarm -ffffffff81a068a0 T intel_crtc_planes_update_arm -ffffffff81a06c90 T intel_atomic_plane_check_clipping -ffffffff81a06ef0 T intel_plane_check_src_coordinates -ffffffff81a070b0 T intel_plane_helper_add -ffffffff81a070f0 t intel_prepare_plane_fb -ffffffff81a07350 t intel_cleanup_plane_fb -ffffffff81a08000 T intel_audio_sdp_split_update -ffffffff81a080d0 T intel_audio_compute_config -ffffffff81a08180 T intel_audio_codec_enable -ffffffff81a08370 T intel_audio_codec_disable -ffffffff81a085c0 T intel_audio_codec_get_config -ffffffff81a08610 T intel_audio_hooks_init -ffffffff81a08690 T intel_audio_cdclk_change_pre -ffffffff81a08720 T intel_audio_cdclk_change_post -ffffffff81a08800 T intel_audio_init -ffffffff81a08810 T intel_audio_deinit -ffffffff81a08860 t g4x_audio_codec_enable -ffffffff81a08a20 t g4x_audio_codec_disable -ffffffff81a08aa0 t g4x_audio_codec_get_config -ffffffff81a08bb0 t ibx_audio_codec_enable -ffffffff81a08d70 t ibx_audio_codec_disable -ffffffff81a08f40 t intel_acomp_get_config -ffffffff81a08fc0 t audio_config_hdmi_pixel_clock -ffffffff81a09190 t hsw_audio_codec_enable -ffffffff81a099d0 t hsw_audio_codec_disable -ffffffff81a0a000 T intel_backlight_invert_pwm_level -ffffffff81a0a0c0 T intel_backlight_set_pwm_level -ffffffff81a0a130 T intel_backlight_level_to_pwm -ffffffff81a0a320 T intel_backlight_level_from_pwm -ffffffff81a0a4c0 T intel_backlight_set_acpi -ffffffff81a0a6d0 T intel_backlight_disable -ffffffff81a0a7b0 T intel_backlight_enable -ffffffff81a0a850 t __intel_backlight_enable -ffffffff81a0a990 T intel_backlight_device_register -ffffffff81a0ac50 t kasprintf -ffffffff81a0ad20 T intel_backlight_device_unregister -ffffffff81a0ad70 T intel_backlight_update -ffffffff81a0ae10 T intel_backlight_setup -ffffffff81a0afc0 T intel_backlight_destroy -ffffffff81a0aff0 T intel_backlight_init_funcs -ffffffff81a0b150 t intel_backlight_device_update_status -ffffffff81a0b380 t intel_backlight_device_get_brightness -ffffffff81a0b500 t bxt_setup_backlight -ffffffff81a0b740 t bxt_get_backlight -ffffffff81a0b780 t bxt_set_backlight -ffffffff81a0b7c0 t bxt_disable_backlight -ffffffff81a0b8f0 t bxt_enable_backlight -ffffffff81a0bb70 t bxt_hz_to_pwm -ffffffff81a0bbb0 t cnp_setup_backlight -ffffffff81a0be60 t cnp_disable_backlight -ffffffff81a0bf20 t cnp_enable_backlight -ffffffff81a0c0e0 t cnp_hz_to_pwm -ffffffff81a0c120 t lpt_setup_backlight -ffffffff81a0c480 t lpt_get_backlight -ffffffff81a0c4e0 t lpt_set_backlight -ffffffff81a0c550 t lpt_disable_backlight -ffffffff81a0c670 t lpt_enable_backlight -ffffffff81a0c870 t lpt_hz_to_pwm -ffffffff81a0c8e0 t pch_get_backlight -ffffffff81a0c940 t spt_hz_to_pwm -ffffffff81a0c990 t pch_setup_backlight -ffffffff81a0cba0 t pch_set_backlight -ffffffff81a0cc10 t pch_disable_backlight -ffffffff81a0cd00 t pch_enable_backlight -ffffffff81a0cf50 t pch_hz_to_pwm -ffffffff81a0cf90 t ext_pwm_setup_backlight -ffffffff81a0d040 t ext_pwm_get_backlight -ffffffff81a0d090 t ext_pwm_set_backlight -ffffffff81a0d0b0 t ext_pwm_disable_backlight -ffffffff81a0d0d0 t ext_pwm_enable_backlight -ffffffff81a0d100 t vlv_setup_backlight -ffffffff81a0d350 t vlv_get_backlight -ffffffff81a0d3f0 t vlv_set_backlight -ffffffff81a0d470 t vlv_disable_backlight -ffffffff81a0d530 t vlv_enable_backlight -ffffffff81a0d6d0 t vlv_hz_to_pwm -ffffffff81a0d770 t i965_setup_backlight -ffffffff81a0d9b0 t i9xx_get_backlight -ffffffff81a0da50 t i9xx_set_backlight -ffffffff81a0db90 t i965_disable_backlight -ffffffff81a0dc40 t i965_enable_backlight -ffffffff81a0ddf0 t i965_hz_to_pwm -ffffffff81a0de50 t i9xx_setup_backlight -ffffffff81a0e190 t i9xx_disable_backlight -ffffffff81a0e200 t i9xx_enable_backlight -ffffffff81a0e3b0 t i9xx_hz_to_pwm -ffffffff81a0e410 t intel_pwm_setup_backlight -ffffffff81a0e520 t intel_pwm_get_backlight -ffffffff81a0e5f0 t intel_pwm_set_backlight -ffffffff81a0e6b0 t intel_pwm_disable_backlight -ffffffff81a0e770 t intel_pwm_enable_backlight -ffffffff81a0f000 T intel_bios_encoder_port -ffffffff81a0f080 t dvo_port_to_port -ffffffff81a0f260 T intel_bios_dp_max_link_rate -ffffffff81a0f2e0 T intel_bios_dp_max_lane_count -ffffffff81a0f330 T intel_bios_encoder_supports_dvi -ffffffff81a0f360 T intel_bios_encoder_supports_hdmi -ffffffff81a0f3a0 T intel_bios_encoder_supports_dp -ffffffff81a0f3d0 T intel_bios_encoder_supports_edp -ffffffff81a0f410 T intel_bios_encoder_supports_dsi -ffffffff81a0f440 T intel_bios_encoder_is_lspcon -ffffffff81a0f490 T intel_bios_hdmi_level_shift -ffffffff81a0f4f0 T intel_bios_hdmi_max_tmds_clock -ffffffff81a0f580 T intel_bios_is_valid_vbt -ffffffff81a0f670 T intel_bios_init -ffffffff81a11500 T intel_bios_init_panel_early -ffffffff81a11520 t intel_bios_init_panel -ffffffff81a13630 T intel_bios_init_panel_late -ffffffff81a13650 T intel_bios_driver_remove -ffffffff81a13740 T intel_bios_fini_panel -ffffffff81a13820 T intel_bios_is_tv_present -ffffffff81a138a0 T intel_bios_is_lvds_present -ffffffff81a13950 T intel_bios_is_port_present -ffffffff81a13a20 T intel_bios_encoder_supports_dp_dual_mode -ffffffff81a13a90 T intel_bios_is_dsi_present -ffffffff81a13b60 T intel_bios_get_dsc_params -ffffffff81a13d80 T intel_bios_dp_aux_ch -ffffffff81a13e80 T intel_bios_dp_has_shared_aux_ch -ffffffff81a13f10 T intel_bios_dp_boost_level -ffffffff81a13fa0 T intel_bios_hdmi_boost_level -ffffffff81a14030 T intel_bios_hdmi_ddc_pin -ffffffff81a14190 T intel_bios_encoder_supports_typec_usb -ffffffff81a141e0 T intel_bios_encoder_supports_tbt -ffffffff81a14230 T intel_bios_encoder_lane_reversal -ffffffff81a14270 T intel_bios_encoder_hpd_invert -ffffffff81a142b0 T intel_bios_encoder_data_lookup -ffffffff81a14370 T intel_bios_for_each_encoder -ffffffff81a143f0 t opregion_get_panel_type -ffffffff81a14410 t vbt_get_panel_type -ffffffff81a14500 t pnpid_get_panel_type -ffffffff81a146e0 t fallback_get_panel_type -ffffffff81a14710 t fill_detail_timing_data -ffffffff81a15000 T icl_pcode_restrict_qgv_points -ffffffff81a15120 T intel_bw_init_hw -ffffffff81a15290 t tgl_get_bw_info -ffffffff81a15880 t icl_get_bw_info -ffffffff81a15c50 T intel_bw_crtc_update -ffffffff81a15d30 t intel_bw_crtc_data_rate -ffffffff81a15e50 T intel_atomic_get_old_bw_state -ffffffff81a15e70 T intel_atomic_get_new_bw_state -ffffffff81a15e90 T intel_atomic_get_bw_state -ffffffff81a15eb0 T intel_bw_min_cdclk -ffffffff81a16130 T intel_bw_calc_min_cdclk -ffffffff81a164f0 T intel_bw_atomic_check -ffffffff81a16f60 T intel_bw_init -ffffffff81a16fd0 t icl_get_qgv_points -ffffffff81a17540 t skl_plane_calc_dbuf_bw -ffffffff81a17680 t intel_bw_duplicate_state -ffffffff81a176f0 t intel_bw_destroy_state -ffffffff81a18000 T intel_cdclk_get_cdclk -ffffffff81a18020 T intel_cdclk_init_hw -ffffffff81a187d0 T intel_cdclk_uninit_hw -ffffffff81a188e0 T intel_cdclk_needs_modeset -ffffffff81a18920 T intel_cdclk_dump_config -ffffffff81a189a0 T intel_set_cdclk_pre_plane_update -ffffffff81a18ce0 t intel_set_cdclk -ffffffff81a190b0 T intel_set_cdclk_post_plane_update -ffffffff81a19340 T intel_crtc_compute_min_cdclk -ffffffff81a196d0 T intel_atomic_get_cdclk_state -ffffffff81a196f0 T intel_cdclk_atomic_check -ffffffff81a197f0 T intel_cdclk_init -ffffffff81a19860 T intel_modeset_calc_cdclk -ffffffff81a19e90 t intel_cdclk_can_crawl -ffffffff81a19f20 T intel_update_max_cdclk -ffffffff81a1a280 T intel_update_cdclk -ffffffff81a1a320 T intel_read_rawclk -ffffffff81a1a4a0 t i9xx_hrawclk -ffffffff81a1a550 T intel_cdclk_debugfs_register -ffffffff81a1a580 T intel_init_cdclk_hooks -ffffffff81a1a9a0 t bxt_set_cdclk -ffffffff81a1b020 t _bxt_set_cdclk -ffffffff81a1b7e0 t skl_set_cdclk -ffffffff81a1bdf0 t intel_cdclk_duplicate_state -ffffffff81a1be70 t intel_cdclk_destroy_state -ffffffff81a1be90 t bxt_get_cdclk -ffffffff81a1c0c0 t bxt_modeset_calc_cdclk -ffffffff81a1c510 t tgl_calc_voltage_level -ffffffff81a1c560 t intel_compute_min_cdclk -ffffffff81a1c760 t rplu_calc_voltage_level -ffffffff81a1c7b0 t ehl_calc_voltage_level -ffffffff81a1c800 t icl_calc_voltage_level -ffffffff81a1c850 t bxt_calc_voltage_level -ffffffff81a1c8a0 t skl_get_cdclk -ffffffff81a1cab0 t skl_modeset_calc_cdclk -ffffffff81a1ccc0 t bdw_get_cdclk -ffffffff81a1cdb0 t bdw_set_cdclk -ffffffff81a1d340 t bdw_modeset_calc_cdclk -ffffffff81a1d440 t hsw_get_cdclk -ffffffff81a1d510 t fixed_modeset_calc_cdclk -ffffffff81a1d550 t vlv_get_cdclk -ffffffff81a1d610 t chv_set_cdclk -ffffffff81a1d980 t vlv_modeset_calc_cdclk -ffffffff81a1db50 t vlv_set_cdclk -ffffffff81a1e090 t fixed_400mhz_get_cdclk -ffffffff81a1e0c0 t fixed_450mhz_get_cdclk -ffffffff81a1e0f0 t gm45_get_cdclk -ffffffff81a1e1f0 t intel_hpll_vco -ffffffff81a1e320 t g33_get_cdclk -ffffffff81a1e430 t i965gm_get_cdclk -ffffffff81a1e530 t pnv_get_cdclk -ffffffff81a1e5e0 t i945gm_get_cdclk -ffffffff81a1e650 t i915gm_get_cdclk -ffffffff81a1e6c0 t fixed_333mhz_get_cdclk -ffffffff81a1e6f0 t fixed_266mhz_get_cdclk -ffffffff81a1e720 t i85x_get_cdclk -ffffffff81a1e7a0 t fixed_200mhz_get_cdclk -ffffffff81a1e7d0 t fixed_133mhz_get_cdclk -ffffffff81a1f000 T intel_color_load_luts -ffffffff81a1f030 T intel_color_commit_noarm -ffffffff81a1f080 T intel_color_commit_arm -ffffffff81a1f0b0 T intel_color_post_update -ffffffff81a1f100 T intel_color_prepare_commit -ffffffff81a1f130 T intel_color_cleanup_commit -ffffffff81a1f180 T intel_color_check -ffffffff81a1f1a0 T intel_color_get_config -ffffffff81a1f220 T intel_color_lut_equal -ffffffff81a1f280 T intel_color_assert_luts -ffffffff81a1f570 T intel_color_crtc_init -ffffffff81a1f5e0 T intel_color_init -ffffffff81a1f710 T intel_color_init_hooks -ffffffff81a1f840 t chv_color_check -ffffffff81a1fd50 t i9xx_color_commit_arm -ffffffff81a1fd60 t chv_load_luts -ffffffff81a20160 t chv_read_luts -ffffffff81a203e0 t chv_lut_equal -ffffffff81a20710 t chv_read_csc -ffffffff81a20830 t intel_color_add_affected_planes -ffffffff81a209a0 t _check_luts -ffffffff81a20b00 t i965_load_luts -ffffffff81a20e70 t i965_read_luts -ffffffff81a21240 t vlv_color_check -ffffffff81a216e0 t vlv_load_luts -ffffffff81a21890 t i965_lut_equal -ffffffff81a21a70 t vlv_read_csc -ffffffff81a21c50 t i9xx_color_check -ffffffff81a21ed0 t i9xx_load_luts -ffffffff81a22340 t i9xx_read_luts -ffffffff81a226e0 t i9xx_lut_equal -ffffffff81a228f0 t icl_color_check -ffffffff81a22cf0 t icl_color_commit_noarm -ffffffff81a22fb0 t icl_color_commit_arm -ffffffff81a23090 t icl_load_luts -ffffffff81a238a0 t icl_read_luts -ffffffff81a23bc0 t icl_lut_equal -ffffffff81a23f30 t icl_read_csc -ffffffff81a241e0 t ilk_csc_convert_ctm -ffffffff81a24600 t ilk_update_pipe_csc -ffffffff81a24850 t glk_load_degamma_lut -ffffffff81a24af0 t ivb_load_lut_ext_max -ffffffff81a24c20 t glk_load_lut_ext2_max -ffffffff81a24d50 t bdw_load_lut_10 -ffffffff81a24f90 t glk_read_degamma_lut -ffffffff81a25110 t bdw_read_lut_10 -ffffffff81a25290 t ilk_read_pipe_csc -ffffffff81a254c0 t icl_color_post_update -ffffffff81a254f0 t glk_color_check -ffffffff81a259e0 t skl_color_commit_noarm -ffffffff81a25a30 t skl_color_commit_arm -ffffffff81a25b50 t glk_load_luts -ffffffff81a25d00 t glk_read_luts -ffffffff81a25e80 t glk_lut_equal -ffffffff81a261a0 t skl_read_csc -ffffffff81a261f0 t ilk_csc_limited_range -ffffffff81a26290 t ilk_assign_csc -ffffffff81a26590 t ivb_color_check -ffffffff81a26be0 t bdw_load_luts -ffffffff81a26dc0 t bdw_read_luts -ffffffff81a26fb0 t ivb_lut_equal -ffffffff81a27370 t ilk_assign_luts -ffffffff81a27590 t ilk_color_commit_noarm -ffffffff81a275e0 t hsw_color_commit_arm -ffffffff81a27690 t ilk_read_csc -ffffffff81a276e0 t ivb_load_luts -ffffffff81a278c0 t ivb_read_luts -ffffffff81a27d70 t ivb_load_lut_10 -ffffffff81a27f70 t ilk_color_commit_arm -ffffffff81a27ff0 t ilk_color_check -ffffffff81a28250 t ilk_load_luts -ffffffff81a284e0 t ilk_read_luts -ffffffff81a28740 t ilk_lut_equal -ffffffff81a29000 T intel_combo_phy_power_up_lanes -ffffffff81a29120 T intel_combo_phy_init -ffffffff81a295d0 T intel_combo_phy_uninit -ffffffff81a297a0 t icl_combo_phy_verify_state -ffffffff81a2a000 T intel_connector_init -ffffffff81a2a070 T intel_connector_alloc -ffffffff81a2a100 T intel_connector_free -ffffffff81a2a140 T intel_connector_destroy -ffffffff81a2a1a0 T intel_connector_register -ffffffff81a2a1b0 T intel_connector_unregister -ffffffff81a2a1c0 T intel_connector_attach_encoder -ffffffff81a2a1e0 T intel_connector_get_hw_state -ffffffff81a2a230 T intel_connector_get_pipe -ffffffff81a2a2f0 T intel_connector_update_modes -ffffffff81a2a320 T intel_ddc_get_modes -ffffffff81a2a390 T intel_attach_force_audio_property -ffffffff81a2a430 T intel_attach_broadcast_rgb_property -ffffffff81a2a4d0 T intel_attach_aspect_ratio_property -ffffffff81a2a530 T intel_attach_hdmi_colorspace_property -ffffffff81a2a580 T intel_attach_dp_colorspace_property -ffffffff81a2a5d0 T intel_attach_scaling_mode_property -ffffffff81a2b000 T intel_crt_port_enabled -ffffffff81a2b080 T intel_crt_reset -ffffffff81a2b160 T intel_crt_init -ffffffff81a2b590 t hsw_crt_get_config -ffffffff81a2b640 t hsw_crt_compute_config -ffffffff81a2b730 t hsw_pre_pll_enable_crt -ffffffff81a2b7a0 t hsw_pre_enable_crt -ffffffff81a2b840 t hsw_enable_crt -ffffffff81a2b9e0 t hsw_disable_crt -ffffffff81a2ba50 t hsw_post_disable_crt -ffffffff81a2bbf0 t pch_crt_compute_config -ffffffff81a2bc40 t pch_disable_crt -ffffffff81a2bc70 t pch_post_disable_crt -ffffffff81a2bd60 t intel_crt_compute_config -ffffffff81a2bdb0 t intel_disable_crt -ffffffff81a2bea0 t intel_crt_get_config -ffffffff81a2bf40 t intel_crt_get_hw_state -ffffffff81a2c000 t intel_enable_crt -ffffffff81a2c0f0 t intel_spurious_crt_detect_dmi_callback -ffffffff81a2c150 t intel_crt_get_modes -ffffffff81a2c250 t intel_crt_detect -ffffffff81a2c4c0 t intel_crt_mode_valid -ffffffff81a2c5d0 t intel_crt_get_edid -ffffffff81a2c670 t intel_crt_detect_hotplug -ffffffff81a2cac0 t intel_crt_detect_ddc -ffffffff81a2cb90 t intel_crt_load_detect -ffffffff81a2e000 T intel_first_crtc -ffffffff81a2e020 T intel_crtc_for_pipe -ffffffff81a2e080 T intel_crtc_wait_for_next_vblank -ffffffff81a2e090 T intel_wait_for_vblank_if_active -ffffffff81a2e100 T intel_crtc_get_vblank_counter -ffffffff81a2e180 T intel_crtc_max_vblank_count -ffffffff81a2e210 T intel_crtc_vblank_on -ffffffff81a2e2a0 t assert_vblank_disabled -ffffffff81a2e380 T intel_crtc_vblank_off -ffffffff81a2e3b0 T intel_crtc_state_alloc -ffffffff81a2e450 T intel_crtc_state_reset -ffffffff81a2e4d0 T intel_crtc_init -ffffffff81a2e850 T intel_wait_for_vblank_workers -ffffffff81a2e910 T intel_usecs_to_scanlines -ffffffff81a2e960 T intel_pipe_update_start -ffffffff81a2eda0 T intel_pipe_update_end -ffffffff81a2f0a0 t intel_crtc_destroy -ffffffff81a2f0d0 t intel_crtc_late_register -ffffffff81a2f100 t intel_crtc_vblank_work -ffffffff81a30000 T intel_output_format_name -ffffffff81a30040 T intel_crtc_state_dump -ffffffff81a31430 t ilk_dump_csc -ffffffff81a32000 T intel_cursor_plane_create -ffffffff81a32200 t i845_cursor_max_stride -ffffffff81a32230 t i845_cursor_update_arm -ffffffff81a32490 t i845_cursor_disable_arm -ffffffff81a324b0 t i845_cursor_get_hw_state -ffffffff81a32560 t i845_check_cursor -ffffffff81a32700 t i9xx_cursor_max_stride -ffffffff81a32740 t i9xx_cursor_update_arm -ffffffff81a32af0 t i9xx_cursor_disable_arm -ffffffff81a32b10 t i9xx_cursor_get_hw_state -ffffffff81a32c00 t i9xx_check_cursor -ffffffff81a32e80 t intel_check_cursor -ffffffff81a33090 t intel_legacy_cursor_update -ffffffff81a33450 t intel_cursor_format_mod_supported -ffffffff81a34000 T intel_is_c10phy -ffffffff81a34040 T intel_cx0_phy_set_signal_levels -ffffffff81a34630 t intel_cx0_rmw -ffffffff81a34720 T intel_c10pll_readout_hw_state -ffffffff81a348b0 T intel_c10pll_dump_hw_state -ffffffff81a34b30 T intel_cx0_phy_check_hdmi_link_rate -ffffffff81a34ca0 T intel_cx0pll_calc_state -ffffffff81a350b0 T intel_c20pll_readout_hw_state -ffffffff81a355d0 t intel_c20_sram_read -ffffffff81a356e0 T intel_c20pll_dump_hw_state -ffffffff81a35a90 T intel_c10pll_calc_port_clock -ffffffff81a35b70 T intel_c20pll_calc_port_clock -ffffffff81a35c70 T intel_mtl_tbt_calc_port_clock -ffffffff81a35dd0 T intel_mtl_pll_enable -ffffffff81a375e0 T intel_mtl_pll_disable -ffffffff81a37a60 T intel_mtl_port_pll_type -ffffffff81a37af0 T intel_c10pll_state_verify -ffffffff81a37de0 t __intel_cx0_read -ffffffff81a38170 t __intel_cx0_write -ffffffff81a384c0 t intel_cx0_bus_reset -ffffffff81a385f0 t intel_cx0_wait_for_ack -ffffffff81a38770 t intel_cx0_powerdown_change_sequence -ffffffff81a389d0 t intel_c20_sram_write -ffffffff81a39000 T hsw_prepare_dp_ddi_buffers -ffffffff81a391a0 T intel_wait_ddi_buf_idle -ffffffff81a393a0 T intel_ddi_set_dp_msa -ffffffff81a39570 T intel_ddi_enable_transcoder_func -ffffffff81a39650 t intel_ddi_transcoder_func_reg_val_get -ffffffff81a39900 T intel_ddi_disable_transcoder_func -ffffffff81a39af0 T intel_ddi_toggle_hdcp_bits -ffffffff81a39c10 T intel_ddi_connector_get_hw_state -ffffffff81a39d60 T intel_ddi_get_hw_state -ffffffff81a39dd0 t intel_ddi_get_encoder_pipes -ffffffff81a3a220 T intel_ddi_enable_transcoder_clock -ffffffff81a3a2e0 T intel_ddi_disable_transcoder_clock -ffffffff81a3a350 T intel_ddi_level -ffffffff81a3a530 T icl_ddi_combo_get_pll -ffffffff81a3a5b0 T hsw_ddi_enable_clock -ffffffff81a3a670 T hsw_ddi_disable_clock -ffffffff81a3a6b0 T hsw_ddi_is_clock_enabled -ffffffff81a3a710 T intel_ddi_enable_clock -ffffffff81a3a750 T intel_ddi_disable_clock -ffffffff81a3a790 T intel_ddi_sanitize_encoder_pll_mapping -ffffffff81a3a970 T dp_tp_ctl_reg -ffffffff81a3a9f0 T dp_tp_status_reg -ffffffff81a3aa70 T intel_ddi_update_pipe -ffffffff81a3ab00 T intel_ddi_update_active_dpll -ffffffff81a3abf0 T intel_ddi_compute_min_voltage_level -ffffffff81a3ac70 T intel_ddi_get_clock -ffffffff81a3ad80 T intel_ddi_port_pll_type -ffffffff81a3adc0 T hsw_ddi_get_config -ffffffff81a3aeb0 t intel_ddi_get_config -ffffffff81a3b800 T intel_ddi_init -ffffffff81a3c580 t intel_ddi_hotplug -ffffffff81a3c990 t intel_ddi_compute_output_type -ffffffff81a3ca10 t intel_ddi_compute_config -ffffffff81a3cb80 t intel_ddi_compute_config_late -ffffffff81a3ce60 t intel_enable_ddi -ffffffff81a3d7b0 t intel_ddi_pre_pll_enable -ffffffff81a3d9a0 t intel_ddi_pre_enable -ffffffff81a3e9a0 t intel_disable_ddi -ffffffff81a3eb50 t intel_ddi_post_pll_disable -ffffffff81a3ec30 t intel_ddi_post_disable -ffffffff81a3f0c0 t intel_ddi_sync_state -ffffffff81a3f180 t intel_ddi_initial_fastset_check -ffffffff81a3f240 t intel_ddi_encoder_suspend -ffffffff81a3f250 t intel_ddi_encoder_shutdown -ffffffff81a3f280 t intel_ddi_get_power_domains -ffffffff81a3f400 t mtl_ddi_get_config -ffffffff81a3f4e0 t dg2_ddi_get_config -ffffffff81a3f530 t adls_ddi_enable_clock -ffffffff81a3f6a0 t adls_ddi_disable_clock -ffffffff81a3f750 t adls_ddi_is_clock_enabled -ffffffff81a3f7f0 t adls_ddi_get_config -ffffffff81a3f8b0 t rkl_ddi_enable_clock -ffffffff81a3fa30 t rkl_ddi_disable_clock -ffffffff81a3fac0 t rkl_ddi_is_clock_enabled -ffffffff81a3fb40 t rkl_ddi_get_config -ffffffff81a3fc10 t dg1_ddi_enable_clock -ffffffff81a3fdc0 t dg1_ddi_disable_clock -ffffffff81a3fe80 t dg1_ddi_is_clock_enabled -ffffffff81a3ff20 t dg1_ddi_get_config -ffffffff81a3fff0 t jsl_ddi_tc_enable_clock -ffffffff81a40080 t jsl_ddi_tc_disable_clock -ffffffff81a40140 t jsl_ddi_tc_is_clock_enabled -ffffffff81a401f0 t icl_ddi_tc_port_pll_type -ffffffff81a40280 t icl_ddi_combo_get_config -ffffffff81a40320 t icl_ddi_combo_enable_clock -ffffffff81a40460 t icl_ddi_combo_disable_clock -ffffffff81a40500 t icl_ddi_combo_is_clock_enabled -ffffffff81a40580 t icl_ddi_tc_enable_clock -ffffffff81a40750 t icl_ddi_tc_disable_clock -ffffffff81a40820 t icl_ddi_tc_is_clock_enabled -ffffffff81a408d0 t icl_ddi_tc_get_config -ffffffff81a40af0 t bxt_ddi_get_config -ffffffff81a40b60 t skl_ddi_enable_clock -ffffffff81a40c60 t skl_ddi_disable_clock -ffffffff81a40cf0 t skl_ddi_is_clock_enabled -ffffffff81a40d60 t skl_ddi_get_config -ffffffff81a40df0 t icl_combo_phy_set_signal_levels -ffffffff81a418b0 t tgl_dkl_phy_set_signal_levels -ffffffff81a41bc0 t icl_mg_phy_set_signal_levels -ffffffff81a42450 t hsw_set_signal_levels -ffffffff81a427c0 t intel_ddi_max_lanes -ffffffff81a42890 t need_aux_ch -ffffffff81a42900 t intel_ddi_tc_encoder_suspend_complete -ffffffff81a42940 t intel_ddi_tc_encoder_shutdown_complete -ffffffff81a42980 t lpt_digital_port_connected -ffffffff81a429f0 t bdw_digital_port_connected -ffffffff81a42a60 t hsw_digital_port_connected -ffffffff81a42ad0 t intel_ddi_init_dp_connector -ffffffff81a42bb0 t intel_ddi_init_hdmi_connector -ffffffff81a42c20 t intel_ddi_encoder_reset -ffffffff81a42d00 t intel_ddi_encoder_destroy -ffffffff81a42db0 t intel_ddi_encoder_late_register -ffffffff81a42e10 t mtl_ddi_enable_d2d -ffffffff81a42fd0 t intel_wait_ddi_buf_active -ffffffff81a432e0 t intel_ddi_main_link_aux_domain -ffffffff81a433d0 t icl_program_mg_dp_mode -ffffffff81a436a0 t intel_ddi_init_dp_buf_reg -ffffffff81a438a0 t intel_disable_ddi_buf -ffffffff81a43a50 t mtl_disable_ddi_buf -ffffffff81a43e70 t intel_ddi_disable_fec_state -ffffffff81a43fc0 t mtl_ddi_prepare_link_retrain -ffffffff81a44300 t intel_ddi_prepare_link_retrain -ffffffff81a44800 t intel_ddi_set_link_train -ffffffff81a44950 t intel_ddi_set_idle_link_train -ffffffff81a44b20 t intel_ddi_dp_voltage_max -ffffffff81a44be0 t intel_ddi_dp_preemph_max -ffffffff81a45000 T is_hobl_buf_trans -ffffffff81a45040 T intel_ddi_buf_trans_init -ffffffff81a45300 t mtl_get_cx0_buf_trans -ffffffff81a453e0 t dg2_get_snps_buf_trans -ffffffff81a45450 t adlp_get_combo_buf_trans -ffffffff81a45570 t adlp_get_dkl_buf_trans -ffffffff81a455d0 t adls_get_combo_buf_trans -ffffffff81a456f0 t rkl_get_combo_buf_trans -ffffffff81a45810 t dg1_get_combo_buf_trans -ffffffff81a45930 t tgl_get_combo_buf_trans -ffffffff81a45a70 t tgl_get_dkl_buf_trans -ffffffff81a45ad0 t jsl_get_combo_buf_trans -ffffffff81a45b70 t ehl_get_combo_buf_trans -ffffffff81a45c10 t icl_get_combo_buf_trans -ffffffff81a45cc0 t icl_get_mg_buf_trans -ffffffff81a45d20 t bxt_get_buf_trans -ffffffff81a45da0 t kbl_y_get_buf_trans -ffffffff81a45e40 t kbl_u_get_buf_trans -ffffffff81a45ee0 t kbl_get_buf_trans -ffffffff81a45f80 t skl_y_get_buf_trans -ffffffff81a46020 t skl_u_get_buf_trans -ffffffff81a460c0 t skl_get_buf_trans -ffffffff81a46160 t bdw_get_buf_trans -ffffffff81a461f0 t hsw_get_buf_trans -ffffffff81a47000 T vlv_get_hpll_vco -ffffffff81a47050 T vlv_get_cck_clock -ffffffff81a47100 T vlv_get_cck_clock_hpll -ffffffff81a47200 T intel_update_czclk -ffffffff81a47280 T is_trans_port_sync_master -ffffffff81a472b0 T is_trans_port_sync_mode -ffffffff81a472f0 T intel_crtc_bigjoiner_slave_pipes -ffffffff81a47350 T intel_crtc_is_bigjoiner_slave -ffffffff81a473b0 T intel_crtc_is_bigjoiner_master -ffffffff81a47410 T intel_master_crtc -ffffffff81a474a0 T assert_transcoder -ffffffff81a47660 t transcoder_name -ffffffff81a476a0 T vlv_wait_port_ready -ffffffff81a477f0 T intel_enable_transcoder -ffffffff81a47a50 t assert_planes_disabled -ffffffff81a47b80 T intel_disable_transcoder -ffffffff81a47da0 T intel_rotation_info_size -ffffffff81a47df0 T intel_remapped_info_size -ffffffff81a47f20 T intel_plane_uses_fence -ffffffff81a47f70 T intel_fb_xy_to_linear -ffffffff81a47fc0 T intel_add_fb_offsets -ffffffff81a48010 T intel_plane_fb_max_stride -ffffffff81a48090 T intel_set_plane_visible -ffffffff81a480e0 T intel_plane_fixup_bitmasks -ffffffff81a48190 T intel_plane_disable_noatomic -ffffffff81a48380 T intel_plane_fence_y_offset -ffffffff81a483e0 T intel_has_pending_fb_unpin -ffffffff81a484d0 T intel_get_crtc_new_encoder -ffffffff81a48660 T ilk_pfit_disable -ffffffff81a48720 T intel_phy_is_combo -ffffffff81a48790 T intel_phy_is_tc -ffffffff81a48800 T intel_phy_is_snps -ffffffff81a48850 T intel_port_to_phy -ffffffff81a48900 T intel_port_to_tc -ffffffff81a48a10 T intel_aux_power_domain -ffffffff81a48a50 T intel_modeset_get_crtc_power_domains -ffffffff81a48c80 T intel_modeset_put_crtc_power_domains -ffffffff81a48cb0 T intel_encoder_destroy -ffffffff81a48ce0 T intel_encoder_get_config -ffffffff81a48d10 t intel_crtc_readout_derived_state -ffffffff81a49150 T intel_link_compute_m_n -ffffffff81a49280 T intel_panel_sanitize_ssc -ffffffff81a49360 T intel_zero_m_n -ffffffff81a493a0 T intel_set_m_n -ffffffff81a49460 T intel_cpu_transcoder_has_m2_n2 -ffffffff81a494c0 T intel_cpu_transcoder_set_m1_n1 -ffffffff81a49670 T intel_cpu_transcoder_set_m2_n2 -ffffffff81a497d0 T i9xx_set_pipeconf -ffffffff81a49980 T ilk_set_pipeconf -ffffffff81a49b50 T bdw_get_pipe_misc_bpp -ffffffff81a49c20 T ilk_get_lanes_required -ffffffff81a49c80 T intel_get_m_n -ffffffff81a49d90 T intel_cpu_transcoder_get_m1_n1 -ffffffff81a49f20 T intel_cpu_transcoder_get_m2_n2 -ffffffff81a4a080 T intel_crtc_get_pipe_config -ffffffff81a4a0f0 T i9xx_crtc_clock_get -ffffffff81a4a380 T intel_dotclock_calculate -ffffffff81a4a3e0 T intel_crtc_dotclock -ffffffff81a4a4b0 T intel_encoder_current_mode -ffffffff81a4a660 T intel_fuzzy_clock_check -ffffffff81a4a6b0 T intel_pipe_config_compare -ffffffff81a4da10 t pipe_config_mismatch -ffffffff81a4db00 t pipe_config_infoframe_mismatch -ffffffff81a4dcb0 T intel_modeset_all_pipes -ffffffff81a4dec0 T intel_atomic_add_affected_planes -ffffffff81a4df90 T intel_calc_active_pipes -ffffffff81a4e020 T intel_atomic_check -ffffffff81a50040 t copy_bigjoiner_crtc_state_nomodeset -ffffffff81a50150 t intel_atomic_check_planes -ffffffff81a50bc0 t intel_modeset_checks -ffffffff81a50d50 t intel_atomic_check_crtcs -ffffffff81a51170 t intel_async_flip_check_hw -ffffffff81a51650 T intel_crtc_arm_fifo_underrun -ffffffff81a516f0 T intel_atomic_helper_free_state_worker -ffffffff81a51770 T intel_atomic_commit -ffffffff81a51ad0 t intel_atomic_commit_ready -ffffffff81a51b60 t intel_atomic_commit_work -ffffffff81a51b80 t intel_atomic_commit_tail -ffffffff81a52d10 T intel_plane_destroy -ffffffff81a52d40 T intel_get_pipe_from_crtc_id_ioctl -ffffffff81a52db0 T assert_port_valid -ffffffff81a52e30 T intel_setup_outputs -ffffffff81a536c0 T intel_mode_valid -ffffffff81a53840 T intel_cpu_transcoder_mode_valid -ffffffff81a53900 T intel_mode_valid_max_plane_size -ffffffff81a53980 T intel_init_display_hooks -ffffffff81a53a00 T intel_initial_commit -ffffffff81a53ba0 T i830_enable_pipe -ffffffff81a541e0 T i830_disable_pipe -ffffffff81a54510 T intel_hpd_poll_fini -ffffffff81a54610 T intel_scanout_needs_vtd_wa -ffffffff81a54650 t intel_crtc_copy_uapi_to_hw_state_modeset -ffffffff81a547b0 t intel_atomic_cleanup_work -ffffffff81a548b0 t intel_pre_plane_update -ffffffff81a54e10 t hsw_get_pipe_config -ffffffff81a55a40 t hsw_crtc_enable -ffffffff81a564a0 t hsw_crtc_disable -ffffffff81a567a0 t skl_commit_modeset_enables -ffffffff81a56d70 t intel_get_transcoder_timings -ffffffff81a57080 t intel_get_pipe_src_size -ffffffff81a571a0 t ilk_get_pfit_config -ffffffff81a57320 t enabled_bigjoiner_pipes -ffffffff81a57540 t bdw_set_pipe_misc -ffffffff81a57690 t ilk_pfit_enable -ffffffff81a577c0 t intel_set_transcoder_timings -ffffffff81a57b80 t intel_update_crtc -ffffffff81a58220 t intel_commit_modeset_enables -ffffffff81a58340 t ilk_get_pipe_config -ffffffff81a58590 t ilk_crtc_enable -ffffffff81a58930 t ilk_crtc_disable -ffffffff81a58bc0 t i9xx_get_pipe_config -ffffffff81a59340 t valleyview_crtc_enable -ffffffff81a597a0 t i9xx_crtc_disable -ffffffff81a59b40 t i9xx_pfit_enable -ffffffff81a59cb0 t i9xx_crtc_enable -ffffffff81a5b000 T intel_display_device_probe -ffffffff81a5b0d0 T intel_display_device_info_runtime_init -ffffffff81a5b730 T intel_display_device_info_print -ffffffff81a5c000 T intel_display_driver_probe_defer -ffffffff81a5c030 T intel_display_driver_init_hw -ffffffff81a5c0f0 T intel_display_driver_early_probe -ffffffff81a5c170 T intel_display_driver_probe_noirq -ffffffff81a5c450 T intel_display_driver_probe_nogem -ffffffff81a5c760 T intel_display_driver_probe -ffffffff81a5c800 T intel_display_driver_register -ffffffff81a5c860 T intel_display_driver_remove -ffffffff81a5c910 T intel_display_driver_remove_noirq -ffffffff81a5c9c0 T intel_display_driver_remove_nogem -ffffffff81a5ca00 T intel_display_driver_unregister -ffffffff81a5ca80 T intel_display_driver_suspend -ffffffff81a5cb30 T __intel_display_driver_resume -ffffffff81a5cc40 T intel_display_driver_resume -ffffffff81a5d000 T ilk_update_display_irq -ffffffff81a5d140 T ilk_enable_display_irq -ffffffff81a5d160 T ilk_disable_display_irq -ffffffff81a5d240 T bdw_update_port_irq -ffffffff81a5d390 T bdw_enable_pipe_irq -ffffffff81a5d3b0 t bdw_update_pipe_irq -ffffffff81a5d510 T bdw_disable_pipe_irq -ffffffff81a5d620 T ibx_display_interrupt_update -ffffffff81a5d740 T ibx_enable_display_interrupt -ffffffff81a5d760 T ibx_disable_display_interrupt -ffffffff81a5d820 T i915_pipestat_enable_mask -ffffffff81a5d9b0 T i915_enable_pipestat -ffffffff81a5db30 T i915_disable_pipestat -ffffffff81a5dca0 T i915_enable_asle_pipestat -ffffffff81a5dd50 T i9xx_pipestat_irq_reset -ffffffff81a5dee0 T i9xx_pipestat_irq_ack -ffffffff81a5e060 T i8xx_pipestat_irq_handler -ffffffff81a5e250 t i9xx_pipe_crc_irq_handler -ffffffff81a5e390 T i915_pipestat_irq_handler -ffffffff81a5e5c0 T i965_pipestat_irq_handler -ffffffff81a5e800 T valleyview_pipestat_irq_handler -ffffffff81a5e9a0 T ilk_display_irq_handler -ffffffff81a5eee0 t cpt_irq_handler -ffffffff81a5f250 T ivb_display_irq_handler -ffffffff81a5f7f0 T gen8_de_pipe_underrun_mask -ffffffff81a5f830 T gen8_de_irq_handler -ffffffff81a60410 T gen11_gu_misc_irq_ack -ffffffff81a60460 T gen11_gu_misc_irq_handler -ffffffff81a604a0 T gen11_display_irq_handler -ffffffff81a60530 T i8xx_enable_vblank -ffffffff81a605a0 T i915gm_enable_vblank -ffffffff81a60650 T i965_enable_vblank -ffffffff81a606c0 T ilk_enable_vblank -ffffffff81a60770 T bdw_enable_vblank -ffffffff81a60920 T i8xx_disable_vblank -ffffffff81a60980 T i915gm_disable_vblank -ffffffff81a60a40 T i965_disable_vblank -ffffffff81a60aa0 T ilk_disable_vblank -ffffffff81a60ba0 T bdw_disable_vblank -ffffffff81a60d20 T vlv_display_irq_reset -ffffffff81a60e10 T vlv_display_irq_postinstall -ffffffff81a60f60 T gen8_display_irq_reset -ffffffff81a610f0 T gen11_display_irq_reset -ffffffff81a613c0 T gen8_irq_power_well_post_enable -ffffffff81a61530 T gen8_irq_power_well_pre_disable -ffffffff81a61640 T valleyview_enable_display_irqs -ffffffff81a61760 T valleyview_disable_display_irqs -ffffffff81a61870 T ilk_de_irq_postinstall -ffffffff81a61980 T gen8_de_irq_postinstall -ffffffff81a61df0 T gen11_de_irq_postinstall -ffffffff81a61e60 T dg1_de_irq_postinstall -ffffffff81a61ed0 T intel_display_irq_init -ffffffff81a62000 T intel_display_power_domain_str -ffffffff81a62060 T __intel_display_power_is_enabled -ffffffff81a62120 T intel_display_power_is_enabled -ffffffff81a62240 T intel_display_power_set_target_dc_state -ffffffff81a62360 T intel_display_power_get -ffffffff81a623e0 t __intel_display_power_get_domain -ffffffff81a625d0 T intel_display_power_get_if_enabled -ffffffff81a62700 T __intel_display_power_put_async -ffffffff81a628f0 t __intel_display_power_put_domain -ffffffff81a62a60 T intel_display_power_flush_work -ffffffff81a62b80 t release_async_put_domains -ffffffff81a62c70 T intel_display_power_put_unchecked -ffffffff81a62cd0 T intel_display_power_get_in_set -ffffffff81a62db0 T intel_display_power_get_in_set_if_enabled -ffffffff81a62e60 T intel_display_power_put_mask_in_set -ffffffff81a62f30 T intel_power_domains_init -ffffffff81a63180 t intel_display_power_put_async_work -ffffffff81a633f0 T intel_power_domains_cleanup -ffffffff81a63410 T gen9_dbuf_slices_update -ffffffff81a63620 T intel_power_domains_init_hw -ffffffff81a63b20 t icl_display_core_init -ffffffff81a64320 t bxt_display_core_init -ffffffff81a64470 t vlv_cmnlane_wa -ffffffff81a64540 t assert_ved_power_gated -ffffffff81a645f0 t hsw_assert_cdclk -ffffffff81a64720 t intel_pch_reset_handshake -ffffffff81a647d0 T intel_power_domains_driver_remove -ffffffff81a648c0 T intel_power_domains_sanitize_state -ffffffff81a649b0 T intel_power_domains_enable -ffffffff81a64a10 T intel_power_domains_disable -ffffffff81a64ac0 T intel_power_domains_suspend -ffffffff81a64c70 t icl_display_core_uninit -ffffffff81a64d80 t bxt_display_core_uninit -ffffffff81a64e40 T intel_power_domains_resume -ffffffff81a64f10 T intel_display_power_suspend_late -ffffffff81a64ff0 t hsw_enable_pc8 -ffffffff81a65ce0 T intel_display_power_resume_early -ffffffff81a65dd0 t hsw_disable_pc8 -ffffffff81a66200 T intel_display_power_suspend -ffffffff81a66280 T intel_display_power_resume -ffffffff81a66360 T intel_display_power_debug -ffffffff81a66420 T intel_display_power_ddi_io_domain -ffffffff81a66510 T intel_display_power_ddi_lanes_domain -ffffffff81a66600 T intel_display_power_aux_io_domain -ffffffff81a66710 T intel_display_power_legacy_aux_domain -ffffffff81a66820 T intel_display_power_tbt_aux_domain -ffffffff81a66930 t __delayed_work_tick -ffffffff81a67000 T intel_display_power_map_init -ffffffff81a67180 t __set_power_wells -ffffffff81a67560 T intel_display_power_map_cleanup -ffffffff81a68000 T lookup_power_well -ffffffff81a680c0 T intel_power_well_enable -ffffffff81a68150 T intel_power_well_name -ffffffff81a68190 T intel_power_well_disable -ffffffff81a68200 T intel_power_well_sync_hw -ffffffff81a68270 T intel_power_well_get -ffffffff81a68310 T intel_power_well_put -ffffffff81a68410 T intel_power_well_is_enabled -ffffffff81a68430 T intel_power_well_is_enabled_cached -ffffffff81a68460 T intel_display_power_well_is_enabled -ffffffff81a68510 T intel_power_well_is_always_on -ffffffff81a68550 T intel_power_well_domains -ffffffff81a68580 T intel_power_well_refcount -ffffffff81a685b0 T gen9_sanitize_dc_state -ffffffff81a68680 T gen9_set_dc_state -ffffffff81a689e0 T gen9_enable_dc5 -ffffffff81a68c40 T skl_enable_dc6 -ffffffff81a68da0 T bxt_enable_dc9 -ffffffff81a68f50 T bxt_disable_dc9 -ffffffff81a69040 T gen9_disable_dc_states -ffffffff81a69410 T chv_phy_powergate_ch -ffffffff81a69520 t assert_chv_phy_status -ffffffff81a698d0 T chv_phy_powergate_lanes -ffffffff81a69b30 t i9xx_power_well_sync_hw_noop -ffffffff81a69b60 t i9xx_always_on_power_well_noop -ffffffff81a69b90 t i9xx_always_on_power_well_enabled -ffffffff81a69bc0 t chv_pipe_power_well_sync_hw -ffffffff81a69bf0 t chv_pipe_power_well_enable -ffffffff81a69c20 t chv_pipe_power_well_disable -ffffffff81a69c80 t chv_pipe_power_well_enabled -ffffffff81a69d80 t chv_dpio_cmn_power_well_enable -ffffffff81a69fa0 t chv_dpio_cmn_power_well_disable -ffffffff81a6a0d0 t vlv_power_well_enabled -ffffffff81a6a1f0 t i830_pipes_power_well_sync_hw -ffffffff81a6a2e0 t i830_pipes_power_well_enable -ffffffff81a6a3a0 t i830_pipes_power_well_disable -ffffffff81a6a3d0 t i830_pipes_power_well_enabled -ffffffff81a6a470 t hsw_power_well_sync_hw -ffffffff81a6a560 t hsw_power_well_enable -ffffffff81a6a7e0 t hsw_power_well_disable -ffffffff81a6a8a0 t hsw_power_well_enabled -ffffffff81a6a980 t gen9_dc_off_power_well_enable -ffffffff81a6a990 t gen9_dc_off_power_well_disable -ffffffff81a6aa30 t gen9_dc_off_power_well_enabled -ffffffff81a6aac0 t bxt_dpio_cmn_power_well_enable -ffffffff81a6aaf0 t bxt_dpio_cmn_power_well_disable -ffffffff81a6ab20 t bxt_dpio_cmn_power_well_enabled -ffffffff81a6ab50 t vlv_display_power_well_enable -ffffffff81a6ab80 t vlv_display_power_well_disable -ffffffff81a6abf0 t vlv_dpio_cmn_power_well_enable -ffffffff81a6ac70 t vlv_dpio_cmn_power_well_disable -ffffffff81a6ad70 t vlv_power_well_enable -ffffffff81a6ad90 t vlv_power_well_disable -ffffffff81a6adb0 t icl_aux_power_well_enable -ffffffff81a6b490 t icl_aux_power_well_disable -ffffffff81a6b720 t tgl_tc_cold_off_power_well_sync_hw -ffffffff81a6b740 t tgl_tc_cold_off_power_well_enable -ffffffff81a6b760 t tgl_tc_cold_off_power_well_disable -ffffffff81a6b780 t tgl_tc_cold_off_power_well_is_enabled -ffffffff81a6b7b0 t xelpdp_aux_power_well_enable -ffffffff81a6b880 t xelpdp_aux_power_well_disable -ffffffff81a6b950 t xelpdp_aux_power_well_enabled -ffffffff81a6ba00 t chv_set_pipe_power_well -ffffffff81a6bc00 t vlv_display_power_well_init -ffffffff81a6bf60 t vlv_set_power_well -ffffffff81a6c180 t hsw_wait_for_power_well_enable -ffffffff81a6c2d0 t hsw_wait_for_power_well_disable -ffffffff81a6c5a0 t tgl_tc_cold_request -ffffffff81a6d000 T intel_display_reset_prepare -ffffffff81a6d1f0 T intel_display_reset_finish -ffffffff81a6e000 T intel_display_rps_boost_after_vblank -ffffffff81a6e110 t do_rps_boost -ffffffff81a6e1c0 T intel_display_rps_mark_interactive -ffffffff81a6f000 T intel_dkl_phy_init -ffffffff81a6f020 T intel_dkl_phy_read -ffffffff81a6f150 T intel_dkl_phy_write -ffffffff81a6f260 T intel_dkl_phy_rmw -ffffffff81a6f390 T intel_dkl_phy_posting_read -ffffffff81a70000 T intel_dmc_has_payload -ffffffff81a70050 T intel_dmc_enable_pipe -ffffffff81a70160 T intel_dmc_disable_pipe -ffffffff81a70270 T intel_dmc_load_program -ffffffff81a70aa0 t pipedmc_clock_gating_wa -ffffffff81a70c90 T intel_dmc_disable_program -ffffffff81a70ec0 T assert_dmc_loaded -ffffffff81a71040 T intel_dmc_init -ffffffff81a71300 t dmc_load_work_fn -ffffffff81a71c30 T intel_dmc_suspend -ffffffff81a71cc0 T intel_dmc_resume -ffffffff81a71d60 T intel_dmc_fini -ffffffff81a71eb0 T intel_dmc_print_error_state -ffffffff81a71fb0 T intel_dmc_debugfs_register -ffffffff81a72000 T intel_dp_is_edp -ffffffff81a72030 T intel_dp_is_uhbr -ffffffff81a72070 T intel_dp_max_lane_count -ffffffff81a720e0 T intel_dp_link_required -ffffffff81a72120 T intel_dp_max_data_rate -ffffffff81a72180 T intel_dp_can_bigjoiner -ffffffff81a721d0 T intel_dp_get_link_train_fallback_values -ffffffff81a72580 T intel_dp_mode_to_fec_clock -ffffffff81a725d0 T intel_dp_dsc_nearest_valid_bpp -ffffffff81a726d0 T intel_dp_dsc_get_output_bpp -ffffffff81a727f0 T intel_dp_dsc_get_slice_count -ffffffff81a72980 T intel_dp_min_bpp -ffffffff81a729c0 T intel_dp_need_bigjoiner -ffffffff81a72a20 T intel_dp_source_supports_tps3 -ffffffff81a72a70 T intel_dp_source_supports_tps4 -ffffffff81a72ab0 T intel_dp_max_link_rate -ffffffff81a72b60 T intel_dp_rate_select -ffffffff81a72c00 T intel_dp_compute_rate -ffffffff81a72cd0 T intel_dp_has_hdmi_sink -ffffffff81a72d10 T intel_dp_adjust_compliance_config -ffffffff81a72e50 T intel_dp_dsc_compute_bpp -ffffffff81a72f00 T intel_dp_dsc_compute_config -ffffffff81a735e0 T intel_dp_limited_color_range -ffffffff81a73650 T intel_dp_compute_psr_vsc_sdp -ffffffff81a736d0 T intel_dp_needs_vsc_sdp -ffffffff81a73720 t intel_dp_compute_vsc_colorimetry -ffffffff81a738a0 T intel_dp_compute_config -ffffffff81a73cf0 t intel_dp_compute_output_format -ffffffff81a73f20 t intel_dp_audio_compute_config -ffffffff81a74000 t intel_dp_drrs_compute_config -ffffffff81a741b0 t intel_dp_compute_vsc_sdp -ffffffff81a74250 t intel_dp_compute_hdr_metadata_infoframe_sdp -ffffffff81a742e0 T intel_dp_set_link_params -ffffffff81a74320 T intel_edp_backlight_on -ffffffff81a743c0 T intel_edp_backlight_off -ffffffff81a74450 T intel_dp_sink_set_decompression_state -ffffffff81a744f0 T intel_dp_wait_source_oui -ffffffff81a745e0 T intel_dp_set_power -ffffffff81a74800 T intel_dp_sync_state -ffffffff81a74880 t intel_dp_get_dpcd -ffffffff81a749e0 t intel_dp_reset_max_link_params -ffffffff81a74ae0 T intel_dp_initial_fastset_check -ffffffff81a74c10 T intel_dp_check_frl_training -ffffffff81a751c0 T intel_dp_pcon_dsc_configure -ffffffff81a753b0 T intel_dp_configure_protocol_converter -ffffffff81a75590 T intel_dp_get_colorimetry_status -ffffffff81a755f0 T intel_edp_fixup_vbt_bpp -ffffffff81a75680 T intel_write_dp_vsc_sdp -ffffffff81a75820 T intel_dp_set_infoframes -ffffffff81a75940 t intel_write_dp_sdp -ffffffff81a75c20 T intel_read_dp_sdp -ffffffff81a75f40 T intel_dp_get_active_pipes -ffffffff81a76160 T intel_dp_retrain_link -ffffffff81a76410 t intel_dp_needs_link_retrain -ffffffff81a76590 T intel_dp_phy_test -ffffffff81a76c40 T intel_digital_port_connected -ffffffff81a76cf0 T intel_dp_encoder_flush_work -ffffffff81a76d50 T intel_dp_encoder_suspend -ffffffff81a76d90 T intel_dp_encoder_shutdown -ffffffff81a76dd0 T intel_dp_hpd_pulse -ffffffff81a77440 T intel_dp_is_port_edp -ffffffff81a774d0 T intel_dp_init_connector -ffffffff81a78640 t intel_dp_modeset_retry_work_fn -ffffffff81a786e0 t intel_dp_set_common_rates -ffffffff81a78860 T intel_dp_mst_suspend -ffffffff81a78900 T intel_dp_mst_resume -ffffffff81a789b0 t intel_dp_output_format -ffffffff81a78af0 t intel_dp_compute_link_config -ffffffff81a792b0 t intel_dp_tmds_clock_valid -ffffffff81a79350 t intel_dp_set_sink_rates -ffffffff81a79590 t intel_dp_check_device_service_irq -ffffffff81a79b60 t intel_dp_force -ffffffff81a79c90 t intel_dp_connector_register -ffffffff81a79d60 t intel_dp_connector_unregister -ffffffff81a79dc0 t intel_dp_oob_hotplug_event -ffffffff81a79e40 t intel_dp_set_edid -ffffffff81a7a240 t intel_dp_get_modes -ffffffff81a7a330 t intel_dp_detect -ffffffff81a7abf0 t intel_dp_mode_valid -ffffffff81a7af70 t intel_dp_connector_atomic_check -ffffffff81a7b2e0 t intel_dp_get_dsc_sink_cap -ffffffff81a7b450 t intel_dp_mode_min_output_bpp -ffffffff81a7b4b0 t intel_dp_mode_valid_downstream -ffffffff81a7b670 t icl_max_source_rate -ffffffff81a7c000 T intel_dp_aux_pack -ffffffff81a7c070 T intel_dp_aux_fini -ffffffff81a7c090 T intel_dp_aux_init -ffffffff81a7c2a0 t xelpdp_aux_ctl_reg -ffffffff81a7c370 t xelpdp_aux_data_reg -ffffffff81a7c440 t tgl_aux_ctl_reg -ffffffff81a7c4c0 t tgl_aux_data_reg -ffffffff81a7c550 t skl_aux_ctl_reg -ffffffff81a7c5d0 t skl_aux_data_reg -ffffffff81a7c660 t ilk_aux_ctl_reg -ffffffff81a7c6e0 t ilk_aux_data_reg -ffffffff81a7c770 t g4x_aux_ctl_reg -ffffffff81a7c7f0 t g4x_aux_data_reg -ffffffff81a7c890 t skl_get_aux_clock_divider -ffffffff81a7c8c0 t hsw_get_aux_clock_divider -ffffffff81a7c950 t ilk_get_aux_clock_divider -ffffffff81a7c9b0 t g4x_get_aux_clock_divider -ffffffff81a7ca00 t skl_get_aux_send_ctl -ffffffff81a7ca80 t g4x_get_aux_send_ctl -ffffffff81a7cae0 t kasprintf -ffffffff81a7cbb0 t intel_dp_aux_transfer -ffffffff81a7ce40 T intel_dp_aux_ch -ffffffff81a7cfa0 T intel_dp_aux_irq_handler -ffffffff81a7d040 t intel_dp_aux_xfer -ffffffff81a7e000 T intel_dp_aux_init_backlight_funcs -ffffffff81a7e260 t intel_dp_aux_hdr_setup_backlight -ffffffff81a7e3e0 t intel_dp_aux_hdr_get_backlight -ffffffff81a7e560 t intel_dp_aux_hdr_set_backlight -ffffffff81a7e660 t intel_dp_aux_hdr_disable_backlight -ffffffff81a7e6e0 t intel_dp_aux_hdr_enable_backlight -ffffffff81a7e920 t intel_dp_aux_vesa_setup_backlight -ffffffff81a7eb80 t intel_dp_aux_vesa_get_backlight -ffffffff81a7ebb0 t intel_dp_aux_vesa_set_backlight -ffffffff81a7ec50 t intel_dp_aux_vesa_disable_backlight -ffffffff81a7ed00 t intel_dp_aux_vesa_enable_backlight -ffffffff81a7f000 T intel_dp_hdcp_init -ffffffff81a7f0b0 t intel_dp_hdcp_write_an_aksv -ffffffff81a7f1a0 t intel_dp_hdcp_read_bksv -ffffffff81a7f230 t intel_dp_hdcp_read_bstatus -ffffffff81a7f2c0 t intel_dp_hdcp_repeater_present -ffffffff81a7f370 t intel_dp_hdcp_read_ri_prime -ffffffff81a7f400 t intel_dp_hdcp_read_ksv_ready -ffffffff81a7f4a0 t intel_dp_hdcp_read_ksv_fifo -ffffffff81a7f590 t intel_dp_hdcp_read_v_prime_part -ffffffff81a7f630 t intel_dp_hdcp_toggle_signalling -ffffffff81a7f660 t intel_dp_mst_hdcp_stream_encryption -ffffffff81a7f850 t intel_dp_hdcp_check_link -ffffffff81a7f8e0 t intel_dp_hdcp_capable -ffffffff81a7f990 t intel_dp_hdcp2_capable -ffffffff81a7fa10 t intel_dp_hdcp2_write_msg -ffffffff81a7fbc0 t intel_dp_hdcp2_read_msg -ffffffff81a80290 t intel_dp_hdcp2_config_stream_type -ffffffff81a802f0 t intel_dp_mst_hdcp2_stream_encryption -ffffffff81a80560 t intel_dp_mst_hdcp2_check_link -ffffffff81a80620 t intel_dp_hdcp2_check_link -ffffffff81a81000 T intel_dp_init_lttpr_and_dprx_caps -ffffffff81a810d0 t intel_dp_init_lttpr -ffffffff81a813b0 T intel_dp_get_adjust_train -ffffffff81a81ab0 T intel_dp_program_link_training_pattern -ffffffff81a81bd0 T intel_dp_set_signal_levels -ffffffff81a81f70 T intel_dp_dump_link_status -ffffffff81a82060 T intel_dp_stop_link_train -ffffffff81a82310 T intel_dp_start_link_train -ffffffff81a840d0 T intel_dp_128b132b_sdp_crc16 -ffffffff81a841a0 t intel_dp_link_train_phy -ffffffff81a86000 T intel_dp_mst_encoder_active_links -ffffffff81a86030 T intel_dp_mst_encoder_init -ffffffff81a86270 T intel_dp_mst_source_support -ffffffff81a862b0 T intel_dp_mst_encoder_cleanup -ffffffff81a86310 T intel_dp_mst_is_master_trans -ffffffff81a86350 T intel_dp_mst_is_slave_trans -ffffffff81a86390 T intel_dp_mst_add_topology_state_for_crtc -ffffffff81a86450 t intel_dp_add_mst_connector -ffffffff81a86680 t intel_dp_mst_poll_hpd_irq -ffffffff81a866a0 t intel_dp_mst_get_hw_state -ffffffff81a86700 t intel_dp_mst_connector_late_register -ffffffff81a86770 t intel_dp_mst_connector_early_unregister -ffffffff81a867a0 t intel_dp_mst_get_modes -ffffffff81a86840 t intel_dp_mst_detect -ffffffff81a86940 t intel_dp_mst_mode_valid_ctx -ffffffff81a86b70 t intel_mst_atomic_best_encoder -ffffffff81a86bd0 t intel_dp_mst_atomic_check -ffffffff81a86d40 t intel_dp_mst_compute_config -ffffffff81a87290 t intel_dp_mst_compute_config_late -ffffffff81a87390 t intel_mst_disable_dp -ffffffff81a87470 t intel_mst_post_disable_dp -ffffffff81a87720 t intel_mst_post_pll_disable_dp -ffffffff81a87780 t intel_mst_pre_pll_enable_dp -ffffffff81a877c0 t intel_mst_pre_enable_dp -ffffffff81a879e0 t intel_mst_enable_dp -ffffffff81a87d80 t intel_dp_mst_enc_get_hw_state -ffffffff81a87dc0 t intel_dp_mst_enc_get_config -ffffffff81a87de0 t intel_dp_mst_initial_fastset_check -ffffffff81a87e00 t intel_dp_mst_encoder_destroy -ffffffff81a87e30 t intel_dp_mst_find_vcpi_slots_for_bpp -ffffffff81a89000 T bxt_port_to_phy_channel -ffffffff81a89110 T bxt_ddi_phy_set_signal_levels -ffffffff81a894f0 T bxt_ddi_phy_is_enabled -ffffffff81a89620 T bxt_ddi_phy_uninit -ffffffff81a89700 T bxt_ddi_phy_init -ffffffff81a89920 t _bxt_ddi_phy_init -ffffffff81a89e70 T bxt_ddi_phy_verify_state -ffffffff81a8a150 t __phy_reg_verify_state -ffffffff81a8a250 T bxt_ddi_phy_calc_lane_lat_optim_mask -ffffffff81a8a2c0 T bxt_ddi_phy_set_lane_optim_mask -ffffffff81a8a520 T bxt_ddi_phy_get_lane_lat_optim_mask -ffffffff81a8a700 T vlv_dig_port_to_channel -ffffffff81a8a770 T vlv_dig_port_to_phy -ffffffff81a8a7e0 T vlv_pipe_to_channel -ffffffff81a8a840 T chv_set_phy_signal_level -ffffffff81a8ab90 T chv_data_lane_soft_reset -ffffffff81a8ad60 T chv_phy_pre_pll_enable -ffffffff81a8b000 T chv_phy_pre_encoder_enable -ffffffff81a8b260 T chv_phy_release_cl2_override -ffffffff81a8b2f0 T chv_phy_post_pll_disable -ffffffff81a8b3a0 T vlv_set_phy_signal_level -ffffffff81a8b510 T vlv_phy_pre_pll_enable -ffffffff81a8b610 T vlv_phy_pre_encoder_enable -ffffffff81a8b710 T vlv_phy_reset_lanes -ffffffff81a8c000 T pnv_calc_dpll_params -ffffffff81a8c0c0 T i9xx_calc_dpll_params -ffffffff81a8c190 T vlv_calc_dpll_params -ffffffff81a8c250 T chv_calc_dpll_params -ffffffff81a8c320 T bxt_find_best_dpll -ffffffff81a8c340 t chv_find_best_dpll -ffffffff81a8c680 T i9xx_dpll_compute_fp -ffffffff81a8c6c0 T vlv_compute_dpll -ffffffff81a8c740 T chv_compute_dpll -ffffffff81a8c7c0 T intel_dpll_crtc_compute_clock -ffffffff81a8c8c0 T intel_dpll_crtc_get_shared_dpll -ffffffff81a8ca10 T intel_dpll_init_clock_hook -ffffffff81a8cb20 T i9xx_enable_pll -ffffffff81a8cef0 T vlv_enable_pll -ffffffff81a8d410 T chv_enable_pll -ffffffff81a8d9f0 T vlv_force_pll_on -ffffffff81a8db40 T vlv_disable_pll -ffffffff81a8dc10 T chv_disable_pll -ffffffff81a8dd40 T i9xx_disable_pll -ffffffff81a8de60 T vlv_force_pll_off -ffffffff81a8df60 T assert_pll_enabled -ffffffff81a8e060 T assert_pll_disabled -ffffffff81a8e160 t intel_pll_is_valid -ffffffff81a8e220 t mtl_crtc_compute_clock -ffffffff81a8e2e0 t dg2_crtc_compute_clock -ffffffff81a8e360 t hsw_crtc_compute_clock -ffffffff81a8e420 t hsw_crtc_get_shared_dpll -ffffffff81a8e4c0 t ilk_crtc_compute_clock -ffffffff81a8e7c0 t ilk_crtc_get_shared_dpll -ffffffff81a8e810 t g4x_find_best_dpll -ffffffff81a8eb50 t chv_crtc_compute_clock -ffffffff81a8ec60 t vlv_crtc_compute_clock -ffffffff81a8f100 t g4x_crtc_compute_clock -ffffffff81a8f260 t i9xx_compute_dpll -ffffffff81a8f4e0 t pnv_crtc_compute_clock -ffffffff81a8f8c0 t i9xx_crtc_compute_clock -ffffffff81a8f9e0 t i9xx_find_best_dpll -ffffffff81a8fd20 t i8xx_crtc_compute_clock -ffffffff81a90000 T intel_get_shared_dpll_by_id -ffffffff81a90040 T assert_shared_dpll -ffffffff81a901f0 T intel_dpll_get_hw_state -ffffffff81a90220 T icl_tc_port_to_pll_id -ffffffff81a90250 T intel_enable_shared_dpll -ffffffff81a905b0 T intel_disable_shared_dpll -ffffffff81a90850 T intel_unreference_shared_dpll_crtc -ffffffff81a90950 T intel_shared_dpll_swap_state -ffffffff81a90a30 T icl_set_active_port_dpll -ffffffff81a90a70 T intel_shared_dpll_init -ffffffff81a90c70 T intel_compute_shared_dplls -ffffffff81a90d00 T intel_reserve_shared_dplls -ffffffff81a90d90 T intel_release_shared_dplls -ffffffff81a90dd0 T intel_update_active_dpll -ffffffff81a90e30 T intel_dpll_get_freq -ffffffff81a90ec0 T intel_dpll_update_ref_clks -ffffffff81a90f10 T intel_dpll_readout_hw_state -ffffffff81a91140 T intel_dpll_sanitize_state -ffffffff81a91220 T intel_dpll_dump_hw_state -ffffffff81a912a0 T intel_shared_dpll_state_verify -ffffffff81a91480 t verify_single_dpll_state -ffffffff81a91a00 T intel_shared_dpll_verify_disabled -ffffffff81a91a80 t icl_compute_dplls -ffffffff81a926c0 t icl_get_dplls -ffffffff81a92990 t icl_put_dplls -ffffffff81a92a50 t icl_update_active_dpll -ffffffff81a92b00 t icl_update_dpll_ref_clks -ffffffff81a92b40 t icl_dump_hw_state -ffffffff81a92c00 t combo_pll_enable -ffffffff81a92e10 t combo_pll_disable -ffffffff81a92ee0 t combo_pll_get_hw_state -ffffffff81a92f60 t icl_ddi_combo_pll_get_freq -ffffffff81a93130 t icl_dpll_write -ffffffff81a93370 t adlp_cmtg_clock_gating_wa -ffffffff81a934d0 t icl_pll_disable -ffffffff81a93670 t icl_pll_get_hw_state -ffffffff81a93950 t tbt_pll_enable -ffffffff81a93b10 t tbt_pll_disable -ffffffff81a93b30 t tbt_pll_get_hw_state -ffffffff81a93b50 t icl_ddi_tbt_pll_get_freq -ffffffff81a93bc0 t mg_pll_enable -ffffffff81a941e0 t mg_pll_disable -ffffffff81a94220 t dkl_pll_get_hw_state -ffffffff81a94430 t icl_ddi_mg_pll_get_freq -ffffffff81a94510 t icl_calc_dpll_state -ffffffff81a94650 t intel_find_shared_dpll -ffffffff81a94970 t intel_reference_shared_dpll -ffffffff81a94b90 t intel_unreference_shared_dpll -ffffffff81a94d90 t mg_pll_get_hw_state -ffffffff81a94fe0 t bxt_compute_dpll -ffffffff81a952e0 t bxt_get_dpll -ffffffff81a953b0 t intel_put_dpll -ffffffff81a95410 t bxt_update_dpll_ref_clks -ffffffff81a95450 t bxt_dump_hw_state -ffffffff81a95500 t bxt_ddi_pll_enable -ffffffff81a95ee0 t bxt_ddi_pll_disable -ffffffff81a960f0 t bxt_ddi_pll_get_hw_state -ffffffff81a96520 t bxt_ddi_pll_get_freq -ffffffff81a965b0 t bxt_ddi_set_dpll_hw_state -ffffffff81a967a0 t skl_compute_dpll -ffffffff81a96f00 t skl_get_dpll -ffffffff81a96fb0 t skl_update_dpll_ref_clks -ffffffff81a96ff0 t skl_dump_hw_state -ffffffff81a97050 t skl_ddi_dpll0_enable -ffffffff81a97110 t skl_ddi_dpll0_disable -ffffffff81a97140 t skl_ddi_dpll0_get_hw_state -ffffffff81a97240 t skl_ddi_pll_get_freq -ffffffff81a972d0 t skl_ddi_wrpll_get_freq -ffffffff81a97430 t skl_ddi_pll_enable -ffffffff81a97650 t skl_ddi_pll_disable -ffffffff81a976e0 t skl_ddi_pll_get_hw_state -ffffffff81a97800 t hsw_compute_dpll -ffffffff81a98020 t hsw_get_dpll -ffffffff81a98170 t hsw_update_dpll_ref_clks -ffffffff81a981e0 t hsw_dump_hw_state -ffffffff81a98210 t hsw_ddi_wrpll_enable -ffffffff81a98290 t hsw_ddi_wrpll_disable -ffffffff81a98370 t hsw_ddi_wrpll_get_hw_state -ffffffff81a98410 t hsw_ddi_wrpll_get_freq -ffffffff81a98500 t hsw_ddi_spll_enable -ffffffff81a98560 t hsw_ddi_spll_disable -ffffffff81a98630 t hsw_ddi_spll_get_hw_state -ffffffff81a986c0 t hsw_ddi_spll_get_freq -ffffffff81a98760 t hsw_ddi_lcpll_enable -ffffffff81a98790 t hsw_ddi_lcpll_disable -ffffffff81a987c0 t hsw_ddi_lcpll_get_hw_state -ffffffff81a987f0 t hsw_ddi_lcpll_get_freq -ffffffff81a98870 t ibx_compute_dpll -ffffffff81a988a0 t ibx_get_dpll -ffffffff81a989a0 t ibx_dump_hw_state -ffffffff81a98a00 t ibx_pch_dpll_enable -ffffffff81a98bb0 t ibx_pch_dpll_disable -ffffffff81a98c30 t ibx_pch_dpll_get_hw_state -ffffffff81a99000 T intel_dpt_pin -ffffffff81a991e0 T intel_dpt_unpin -ffffffff81a99250 T intel_dpt_resume -ffffffff81a99320 T intel_dpt_suspend -ffffffff81a993f0 T intel_dpt_create -ffffffff81a997f0 t dpt_insert_page -ffffffff81a99860 t dpt_clear_range -ffffffff81a99890 t dpt_insert_entries -ffffffff81a99980 t dpt_cleanup -ffffffff81a999d0 t dpt_bind_vma -ffffffff81a99a60 t dpt_unbind_vma -ffffffff81a99a90 T intel_dpt_destroy -ffffffff81a99ae0 T intel_dpt_configure -ffffffff81a99c80 t __ww_mutex_lock -ffffffff81a9a000 T intel_drrs_type_str -ffffffff81a9a040 T intel_drrs_is_active -ffffffff81a9a070 T intel_drrs_activate -ffffffff81a9a260 T intel_drrs_deactivate -ffffffff81a9a420 T intel_drrs_invalidate -ffffffff81a9a440 t intel_drrs_frontbuffer_update -ffffffff81a9a690 T intel_drrs_flush -ffffffff81a9a6b0 T intel_drrs_crtc_init -ffffffff81a9a750 t intel_drrs_downclock_work -ffffffff81a9a870 T intel_drrs_crtc_debugfs_add -ffffffff81a9a8a0 T intel_drrs_connector_debugfs_add -ffffffff81a9a8b0 t __delayed_work_tick -ffffffff81a9b000 T intel_dsb_reg_write -ffffffff81a9b140 T intel_dsb_finish -ffffffff81a9b1c0 T intel_dsb_commit -ffffffff81a9b380 T intel_dsb_wait -ffffffff81a9b570 T intel_dsb_prepare -ffffffff81a9b6f0 T intel_dsb_cleanup -ffffffff81a9c000 T intel_dsi_wait_panel_power_cycle -ffffffff81a9c0f0 T intel_dsi_shutdown -ffffffff81a9c1e0 T intel_dsi_bitrate -ffffffff81a9c270 T intel_dsi_tlpx_ns -ffffffff81a9c2c0 T intel_dsi_get_modes -ffffffff81a9c2d0 T intel_dsi_mode_valid -ffffffff81a9c390 T intel_dsi_host_init -ffffffff81a9c440 T intel_dsi_get_panel_orientation -ffffffff81a9d000 T intel_dsi_dcs_init_backlight_funcs -ffffffff81a9d0a0 t dcs_setup_backlight -ffffffff81a9d120 t dcs_get_backlight -ffffffff81a9d210 t dcs_set_backlight -ffffffff81a9d300 t dcs_disable_backlight -ffffffff81a9d660 t dcs_enable_backlight -ffffffff81a9e000 T intel_dsi_vbt_exec_sequence -ffffffff81a9e020 T intel_dsi_log_params -ffffffff81a9e3a0 T intel_dsi_vbt_init -ffffffff81a9e840 T intel_dsi_vbt_gpio_init -ffffffff81a9e860 T intel_dsi_vbt_gpio_cleanup -ffffffff81a9f000 T intel_dvo_init -ffffffff81a9f650 t intel_disable_dvo -ffffffff81a9f6f0 t intel_enable_dvo -ffffffff81a9f7c0 t intel_dvo_get_hw_state -ffffffff81a9f830 t intel_dvo_get_config -ffffffff81a9f8d0 t intel_dvo_compute_config -ffffffff81a9f960 t intel_dvo_pre_enable -ffffffff81a9fa60 t intel_dvo_connector_get_hw_state -ffffffff81a9faf0 t intel_dvo_enc_destroy -ffffffff81a9fb30 t intel_dvo_detect -ffffffff81a9fc30 t intel_dvo_get_modes -ffffffff81a9fca0 t intel_dvo_mode_valid -ffffffff81aa0000 T intel_fb_get_format_info -ffffffff81aa02b0 T intel_fb_is_tiled_modifier -ffffffff81aa02f0 t lookup_modifier -ffffffff81aa0530 T intel_fb_is_ccs_modifier -ffffffff81aa0570 T intel_fb_is_rc_ccs_cc_modifier -ffffffff81aa05b0 T intel_fb_is_mc_ccs_modifier -ffffffff81aa05f0 T intel_fb_plane_get_modifiers -ffffffff81aa07d0 T intel_fb_plane_supports_modifier -ffffffff81aa0850 T intel_format_info_is_yuv_semiplanar -ffffffff81aa08d0 T intel_fb_is_ccs_aux_plane -ffffffff81aa0980 T intel_fb_rc_ccs_cc_plane -ffffffff81aa0a50 T is_surface_linear -ffffffff81aa0bb0 T main_to_ccs_plane -ffffffff81aa0c60 T skl_ccs_to_main_plane -ffffffff81aa0da0 T skl_main_to_aux_plane -ffffffff81aa0ec0 T intel_tile_size -ffffffff81aa0f00 T intel_tile_width_bytes -ffffffff81aa1320 T intel_tile_height -ffffffff81aa1380 T intel_tile_row_size -ffffffff81aa1400 T intel_fb_align_height -ffffffff81aa1480 T intel_fb_modifier_uses_dpt -ffffffff81aa14c0 T intel_fb_uses_dpt -ffffffff81aa1520 T intel_cursor_alignment -ffffffff81aa1580 T intel_surf_alignment -ffffffff81aa1810 T intel_fb_plane_get_subsampling -ffffffff81aa1960 T intel_plane_adjust_aligned_offset -ffffffff81aa19d0 t intel_adjust_aligned_offset -ffffffff81aa1b80 T intel_plane_compute_aligned_offset -ffffffff81aa1c80 t intel_compute_aligned_offset -ffffffff81aa1e40 T intel_fb_needs_pot_stride_remap -ffffffff81aa1eb0 T intel_fb_supports_90_270_rotation -ffffffff81aa1f10 T intel_fill_fb_info -ffffffff81aa2a10 t calc_plane_remap_info -ffffffff81aa33c0 T intel_fb_fill_view -ffffffff81aa3430 T intel_plane_compute_gtt -ffffffff81aa3910 t intel_plane_check_stride -ffffffff81aa3a70 T intel_framebuffer_init -ffffffff81aa42f0 t gen12_ccs_aux_stride -ffffffff81aa4350 T intel_user_framebuffer_create -ffffffff81aa44b0 T intel_framebuffer_create -ffffffff81aa4540 t intel_adjust_tile_offset -ffffffff81aa4680 t intel_user_framebuffer_destroy -ffffffff81aa46f0 t intel_user_framebuffer_create_handle -ffffffff81aa4720 t intel_user_framebuffer_dirty -ffffffff81aa5000 T intel_pin_and_fence_fb_obj -ffffffff81aa5330 t i915_gem_object_lock -ffffffff81aa5550 T intel_unpin_fb_vma -ffffffff81aa55c0 T intel_plane_pin_fb -ffffffff81aa5930 T intel_plane_unpin_fb -ffffffff81aa6000 T intel_fbc_cleanup -ffffffff81aa61c0 T intel_fbc_pre_update -ffffffff81aa6850 T intel_fbc_post_update -ffffffff81aa6a00 T intel_fbc_invalidate -ffffffff81aa6b80 T intel_fbc_flush -ffffffff81aa6e20 T intel_fbc_atomic_check -ffffffff81aa73e0 T intel_fbc_disable -ffffffff81aa74a0 t __intel_fbc_disable -ffffffff81aa75e0 T intel_fbc_update -ffffffff81aa7ca0 T intel_fbc_reset_underrun -ffffffff81aa7e00 T intel_fbc_handle_fifo_underrun_irq -ffffffff81aa7ec0 T intel_fbc_add_plane -ffffffff81aa7ef0 T intel_fbc_init -ffffffff81aa8170 T intel_fbc_sanitize -ffffffff81aa8240 T intel_fbc_crtc_debugfs_add -ffffffff81aa8270 T intel_fbc_debugfs_register -ffffffff81aa82a0 t intel_fbc_is_ok -ffffffff81aa8410 t intel_fbc_update_state -ffffffff81aa8790 t intel_fbc_underrun_work_fn -ffffffff81aa8860 t ivb_fbc_activate -ffffffff81aa8ab0 t ilk_fbc_deactivate -ffffffff81aa8b60 t ilk_fbc_is_active -ffffffff81aa8bc0 t ivb_fbc_is_compressing -ffffffff81aa8c30 t snb_fbc_nuke -ffffffff81aa8cb0 t ilk_fbc_program_cfb -ffffffff81aa8d10 t ivb_fbc_set_false_color -ffffffff81aa8d90 t snb_fbc_activate -ffffffff81aa8e20 t ilk_fbc_is_compressing -ffffffff81aa8e90 t ilk_fbc_activate -ffffffff81aa8fc0 t i965_fbc_nuke -ffffffff81aa9060 t g4x_fbc_activate -ffffffff81aa9170 t g4x_fbc_deactivate -ffffffff81aa9200 t g4x_fbc_is_active -ffffffff81aa9260 t g4x_fbc_is_compressing -ffffffff81aa92c0 t g4x_fbc_program_cfb -ffffffff81aa9310 t i8xx_fbc_activate -ffffffff81aa9480 t i8xx_fbc_deactivate -ffffffff81aa9550 t i8xx_fbc_is_active -ffffffff81aa95b0 t i8xx_fbc_is_compressing -ffffffff81aa9610 t i8xx_fbc_program_cfb -ffffffff81aa9690 t i8xx_fbc_nuke -ffffffff81aaa000 T intel_fbdev_init -ffffffff81aaa4f0 t intel_fbdev_suspend_worker -ffffffff81aaa520 T intel_fbdev_initial_config_async -ffffffff81aaa590 T intel_fbdev_unregister -ffffffff81aaa5d0 T intel_fbdev_set_suspend -ffffffff81aaa600 T intel_fbdev_fini -ffffffff81aaa6a0 T intel_fbdev_output_poll_changed -ffffffff81aaa740 T intel_fbdev_restore_mode -ffffffff81aaa7c0 T intel_fbdev_framebuffer -ffffffff81aaa800 t intelfb_create -ffffffff81aab100 t intelfb_dirty -ffffffff81aab170 t intel_fbdev_set_par -ffffffff81aac000 T assert_fdi_tx_enabled -ffffffff81aac020 t assert_fdi_tx -ffffffff81aac160 T assert_fdi_tx_disabled -ffffffff81aac180 T assert_fdi_rx_enabled -ffffffff81aac270 T assert_fdi_rx_disabled -ffffffff81aac360 T assert_fdi_tx_pll_enabled -ffffffff81aac450 T assert_fdi_rx_pll_enabled -ffffffff81aac540 T assert_fdi_rx_pll_disabled -ffffffff81aac630 T intel_fdi_link_train -ffffffff81aac650 T intel_fdi_pll_freq_update -ffffffff81aac700 T intel_fdi_link_freq -ffffffff81aac750 T ilk_fdi_compute_config -ffffffff81aaca90 T intel_fdi_normal_train -ffffffff81aacc20 T hsw_fdi_link_train -ffffffff81aad100 T hsw_fdi_disable -ffffffff81aad260 T ilk_fdi_pll_enable -ffffffff81aad450 T ilk_fdi_pll_disable -ffffffff81aad580 T ilk_fdi_disable -ffffffff81aad7d0 T intel_fdi_init_hook -ffffffff81aad830 t ilk_fdi_link_train -ffffffff81aade90 t gen6_fdi_link_train -ffffffff81aae6e0 t ivb_manual_fdi_link_train -ffffffff81aaef60 t cpt_set_fdi_bc_bifurcation -ffffffff81ab0000 T intel_set_cpu_fifo_underrun_reporting -ffffffff81ab03d0 T intel_set_pch_fifo_underrun_reporting -ffffffff81ab0600 T intel_cpu_fifo_underrun_irq_handler -ffffffff81ab07f0 T intel_pch_fifo_underrun_irq_handler -ffffffff81ab0870 T intel_check_cpu_fifo_underruns -ffffffff81ab0a80 T intel_check_pch_fifo_underruns -ffffffff81ab0bb0 T intel_init_fifo_underrun_reporting -ffffffff81ab1000 T intel_frontbuffer_flip_prepare -ffffffff81ab1050 T intel_frontbuffer_flip_complete -ffffffff81ab1130 T intel_frontbuffer_flip -ffffffff81ab1200 T __intel_fb_invalidate -ffffffff81ab1290 T __intel_fb_flush -ffffffff81ab1380 T intel_frontbuffer_get -ffffffff81ab14c0 t frontbuffer_active -ffffffff81ab14f0 t frontbuffer_retire -ffffffff81ab1530 T intel_frontbuffer_put -ffffffff81ab1660 T intel_frontbuffer_track -ffffffff81ab2000 T intel_atomic_global_obj_init -ffffffff81ab2070 T intel_atomic_global_obj_cleanup -ffffffff81ab2160 T intel_atomic_get_global_obj_state -ffffffff81ab23b0 T intel_atomic_get_old_global_obj_state -ffffffff81ab2410 T intel_atomic_get_new_global_obj_state -ffffffff81ab2470 T intel_atomic_swap_global_state -ffffffff81ab25b0 T intel_atomic_clear_global_state -ffffffff81ab26d0 T intel_atomic_lock_global_state -ffffffff81ab2760 T intel_atomic_serialize_global_state -ffffffff81ab27f0 T intel_atomic_global_state_is_serialized -ffffffff81ab3000 T intel_gmbus_is_valid_pin -ffffffff81ab3100 T intel_gmbus_reset -ffffffff81ab3160 T intel_bb_set_bits -ffffffff81ab32a0 T intel_bb_set_dir -ffffffff81ab32d0 T intel_bb_read_bits -ffffffff81ab3460 T intel_acquire_bus -ffffffff81ab3660 T intel_release_bus -ffffffff81ab3800 T intel_send_start -ffffffff81ab3820 T intel_send_stop -ffffffff81ab3840 T intel_initiate_xfer -ffffffff81ab3860 T intel_read_byte -ffffffff81ab3880 T intel_write_byte -ffffffff81ab38a0 T intel_gmbus_output_aksv -ffffffff81ab3970 t do_gmbus_xfer -ffffffff81ab3f70 T intel_gmbus_setup -ffffffff81ab42f0 T intel_gmbus_teardown -ffffffff81ab4370 T intel_gmbus_get_adapter -ffffffff81ab43f0 T intel_gmbus_force_bit -ffffffff81ab4490 T intel_gmbus_is_forced_bit -ffffffff81ab44c0 T intel_gmbus_irq_handler -ffffffff81ab4560 t gmbus_xfer_read -ffffffff81ab4850 t gmbus_xfer_write -ffffffff81ab4a90 t gmbus_wait -ffffffff81ab4e80 t gmbus_wait_idle -ffffffff81ab5010 t gmbus_xfer -ffffffff81ab50f0 t gmbus_func -ffffffff81ab5130 t gmbus_lock_bus -ffffffff81ab5150 t gmbus_trylock_bus -ffffffff81ab51b0 t gmbus_unlock_bus -ffffffff81ab6000 T intel_hdcp_capable -ffffffff81ab60a0 t intel_hdcp_read_valid_bksv -ffffffff81ab6330 T intel_hdcp2_capable -ffffffff81ab6450 T is_hdcp_supported -ffffffff81ab64a0 T intel_hdcp_component_init -ffffffff81ab6500 T intel_hdcp_init -ffffffff81ab6680 t intel_hdcp_check_work -ffffffff81ab8fe0 t intel_hdcp_prop_work -ffffffff81ab9060 T intel_hdcp_enable -ffffffff81ab90b0 T intel_hdcp_disable -ffffffff81ab91e0 t intel_hdcp_update_value -ffffffff81ab93a0 t _intel_hdcp2_disable -ffffffff81ab9790 t _intel_hdcp_disable -ffffffff81ab9a80 T intel_hdcp_update_pipe -ffffffff81ab9bf0 T intel_hdcp_component_fini -ffffffff81ab9c90 T intel_hdcp_cleanup -ffffffff81ab9dd0 T intel_hdcp_atomic_check -ffffffff81ab9e60 T intel_hdcp_handle_cp_irq -ffffffff81ab9f60 t __delayed_work_tick -ffffffff81ab9f80 t hdcp2_authenticate_repeater_topology -ffffffff81aba240 t transcoder_name -ffffffff81aba280 t intel_hdcp_get_repeater_ctl -ffffffff81aba350 t ktime_get_raw -ffffffff81aba3d0 t wait_remaining_ms_from_jiffies -ffffffff81aba460 t intel_hdcp_auth_downstream -ffffffff81abb640 t intel_write_sha_text -ffffffff81abc000 T intel_hdcp_gsc_cs_required -ffffffff81abc040 T intel_hdcp_gsc_init -ffffffff81abc4c0 T intel_hdcp_gsc_fini -ffffffff81abc520 T intel_hdcp_gsc_msg_send -ffffffff81abc860 t gsc_hdcp_initiate_session -ffffffff81abc8b0 t gsc_hdcp_verify_receiver_cert_prepare_km -ffffffff81abc900 t gsc_hdcp_verify_hprime -ffffffff81abc950 t gsc_hdcp_store_pairing_info -ffffffff81abc9a0 t gsc_hdcp_initiate_locality_check -ffffffff81abc9f0 t gsc_hdcp_verify_lprime -ffffffff81abca40 t gsc_hdcp_get_session_key -ffffffff81abca90 t gsc_hdcp_repeater_check_flow_prepare_ack -ffffffff81abcae0 t gsc_hdcp_verify_mprime -ffffffff81abcb30 t gsc_hdcp_enable_authentication -ffffffff81abcb80 t gsc_hdcp_close_session -ffffffff81abd000 T intel_hdmi_to_i915 -ffffffff81abd040 T hsw_write_infoframe -ffffffff81abd450 t hsw_dip_data_reg -ffffffff81abd600 T hsw_read_infoframe -ffffffff81abd6c0 T intel_hdmi_infoframe_enable -ffffffff81abd760 T intel_hdmi_infoframes_enabled -ffffffff81abd880 T intel_read_infoframe -ffffffff81abda20 T intel_hdmi_read_gcp_infoframe -ffffffff81abdb00 T intel_dp_dual_mode_set_tmds_output -ffffffff81abdbc0 T intel_hdmi_tmds_clock -ffffffff81abdc10 T intel_hdmi_bpc_possible -ffffffff81abdd30 T intel_hdmi_limited_color_range -ffffffff81abdda0 T intel_hdmi_compute_has_hdmi_sink -ffffffff81abde10 T intel_hdmi_compute_config -ffffffff81abe3c0 t intel_hdmi_compute_output_format -ffffffff81abe520 t intel_hdmi_compute_hdmi_infoframe -ffffffff81abe5e0 t intel_hdmi_compute_drm_infoframe -ffffffff81abe6d0 T intel_hdmi_encoder_shutdown -ffffffff81abe7a0 T intel_hdmi_handle_sink_scrambling -ffffffff81abe890 T intel_infoframe_init -ffffffff81abea30 t vlv_write_infoframe -ffffffff81abed60 t vlv_read_infoframe -ffffffff81abeee0 t vlv_set_infoframes -ffffffff81abf220 t vlv_infoframes_enabled -ffffffff81abf2b0 t g4x_write_infoframe -ffffffff81abf550 t g4x_read_infoframe -ffffffff81abf680 t g4x_set_infoframes -ffffffff81abf910 t g4x_infoframes_enabled -ffffffff81abf990 t hsw_set_infoframes -ffffffff81abfc20 t hsw_infoframes_enabled -ffffffff81abfcb0 t ibx_write_infoframe -ffffffff81abffc0 t ibx_read_infoframe -ffffffff81ac0130 t ibx_set_infoframes -ffffffff81ac0460 t ibx_infoframes_enabled -ffffffff81ac04f0 t cpt_write_infoframe -ffffffff81ac07f0 t cpt_read_infoframe -ffffffff81ac0960 t cpt_set_infoframes -ffffffff81ac0c40 t cpt_infoframes_enabled -ffffffff81ac0cb0 T intel_hdmi_init_connector -ffffffff81ac1430 T intel_hdmi_dsc_get_slice_height -ffffffff81ac1490 T intel_hdmi_dsc_get_num_slices -ffffffff81ac1610 T intel_hdmi_dsc_get_bpp -ffffffff81ac16f0 t intel_hdmi_compute_clock -ffffffff81ac1950 t hdmi_port_clock_valid -ffffffff81ac1b70 t intel_write_infoframe -ffffffff81ac1d40 t intel_hdmi_detect -ffffffff81ac1ee0 t intel_hdmi_force -ffffffff81ac1f80 t intel_hdmi_connector_register -ffffffff81ac1f90 t intel_hdmi_connector_unregister -ffffffff81ac1fa0 t intel_hdmi_set_edid -ffffffff81ac2230 t intel_hdmi_get_modes -ffffffff81ac2240 t intel_hdmi_mode_valid -ffffffff81ac23f0 t intel_hdmi_connector_atomic_check -ffffffff81ac2420 t intel_hdmi_mode_clock_valid -ffffffff81ac25c0 t intel_hdmi_hdcp_write_an_aksv -ffffffff81ac2700 t intel_hdmi_hdcp_read_bksv -ffffffff81ac27d0 t intel_hdmi_hdcp_read_bstatus -ffffffff81ac28a0 t intel_hdmi_hdcp_repeater_present -ffffffff81ac2980 t intel_hdmi_hdcp_read_ri_prime -ffffffff81ac2a50 t intel_hdmi_hdcp_read_ksv_ready -ffffffff81ac2b30 t intel_hdmi_hdcp_read_ksv_fifo -ffffffff81ac2c00 t intel_hdmi_hdcp_read_v_prime_part -ffffffff81ac2cf0 t intel_hdmi_hdcp_toggle_signalling -ffffffff81ac2f70 t intel_hdmi_hdcp_check_link -ffffffff81ac3290 t intel_hdmi_hdcp2_capable -ffffffff81ac3350 t intel_hdmi_hdcp2_write_msg -ffffffff81ac3440 t intel_hdmi_hdcp2_read_msg -ffffffff81ac3840 t intel_hdmi_hdcp2_check_link -ffffffff81ac4000 T intel_hpd_pin_default -ffffffff81ac4030 T intel_encoder_hotplug -ffffffff81ac4160 T intel_hpd_trigger_irq -ffffffff81ac41d0 T intel_hpd_irq_handler -ffffffff81ac45f0 T intel_hpd_init -ffffffff81ac4700 T intel_hpd_poll_enable -ffffffff81ac4780 T intel_hpd_poll_disable -ffffffff81ac47e0 T intel_hpd_init_early -ffffffff81ac48f0 t i915_hotplug_work_func -ffffffff81ac4cd0 t i915_digport_work_func -ffffffff81ac4e50 t i915_hpd_poll_init_work -ffffffff81ac4f50 t intel_hpd_irq_storm_reenable_work -ffffffff81ac5270 T intel_hpd_cancel_work -ffffffff81ac5390 T intel_hpd_disable -ffffffff81ac5420 T intel_hpd_enable -ffffffff81ac5490 T intel_hpd_debugfs_register -ffffffff81ac54c0 t __delayed_work_tick -ffffffff81ac6000 T i915_hotplug_interrupt_update_locked -ffffffff81ac60c0 T i915_hotplug_interrupt_update -ffffffff81ac6190 T i9xx_hpd_irq_ack -ffffffff81ac62d0 T i9xx_hpd_irq_handler -ffffffff81ac6480 T ibx_hpd_irq_handler -ffffffff81ac6620 T xelpdp_pica_irq_handler -ffffffff81ac68e0 T icp_irq_handler -ffffffff81ac6b70 T spt_irq_handler -ffffffff81ac6e10 T ilk_hpd_irq_handler -ffffffff81ac6f30 T bxt_hpd_irq_handler -ffffffff81ac7090 T gen11_hpd_irq_handler -ffffffff81ac7300 T intel_hpd_enable_detection -ffffffff81ac7340 T intel_hpd_irq_setup -ffffffff81ac7390 T intel_hotplug_irq_init -ffffffff81ac7610 t i915_hpd_irq_setup -ffffffff81ac7720 t i915_hpd_enable_detection -ffffffff81ac77c0 t icp_hpd_irq_setup -ffffffff81ac79b0 t icp_hpd_enable_detection -ffffffff81ac7ab0 t dg1_hpd_irq_setup -ffffffff81ac7b10 t dg1_hpd_enable_detection -ffffffff81ac7c50 t xelpdp_hpd_irq_setup -ffffffff81ac8050 t xelpdp_hpd_enable_detection -ffffffff81ac81f0 t gen11_hpd_irq_setup -ffffffff81ac8440 t gen11_hpd_enable_detection -ffffffff81ac8640 t bxt_hpd_irq_setup -ffffffff81ac87c0 t bxt_hpd_enable_detection -ffffffff81ac88a0 t spt_hpd_irq_setup -ffffffff81ac8ac0 t spt_hpd_enable_detection -ffffffff81ac8be0 t ilk_hpd_irq_setup -ffffffff81ac8e50 t ilk_hpd_enable_detection -ffffffff81ac9000 T intel_hti_init -ffffffff81ac9070 T intel_hti_uses_phy -ffffffff81ac9110 T intel_hti_dpll_mask -ffffffff81aca000 T intel_load_detect_get_pipe -ffffffff81aca370 t intel_modeset_disable_planes -ffffffff81aca430 T intel_load_detect_release_pipe -ffffffff81acb000 T intel_lpe_audio_irq_handler -ffffffff81acb020 T intel_lpe_audio_init -ffffffff81acb050 T intel_lpe_audio_teardown -ffffffff81acb070 T intel_lpe_audio_notify -ffffffff81acc000 T lspcon_detect_hdr_capability -ffffffff81acc0b0 T lspcon_write_infoframe -ffffffff81acc820 T lspcon_read_infoframe -ffffffff81acc860 T lspcon_set_infoframes -ffffffff81accac0 T lspcon_infoframes_enabled -ffffffff81accca0 T lspcon_wait_pcon_mode -ffffffff81acccc0 t lspcon_wait_mode -ffffffff81accf80 T lspcon_init -ffffffff81acd390 T intel_lspcon_infoframes_enabled -ffffffff81acd3c0 T lspcon_resume -ffffffff81acd660 t lspcon_change_mode -ffffffff81ace000 T intel_lvds_port_enabled -ffffffff81ace080 T intel_get_lvds_encoder -ffffffff81ace0e0 T intel_is_dual_link_lvds -ffffffff81ace140 T intel_lvds_init -ffffffff81ace7e0 t intel_enable_lvds -ffffffff81ace920 t intel_pre_enable_lvds -ffffffff81acec00 t intel_lvds_compute_config -ffffffff81aced60 t pch_disable_lvds -ffffffff81aced80 t pch_post_disable_lvds -ffffffff81aceda0 t gmch_disable_lvds -ffffffff81acedd0 t intel_lvds_get_hw_state -ffffffff81acee90 t intel_lvds_get_config -ffffffff81acefa0 t intel_lvds_shutdown -ffffffff81acf040 t compute_is_dual_link_lvds -ffffffff81acf110 t intel_no_lvds_dmi_callback -ffffffff81acf160 t intel_disable_lvds -ffffffff81acf290 t intel_lvds_get_modes -ffffffff81acf2e0 t intel_lvds_mode_valid -ffffffff81acf380 t intel_dual_link_lvds_callback -ffffffff81ad0000 T _intel_modeset_lock_begin -ffffffff81ad0060 T _intel_modeset_lock_loop -ffffffff81ad00a0 T _intel_modeset_lock_end -ffffffff81ad1000 T intel_modeset_setup_hw_state -ffffffff81ad22d0 t intel_crtc_disable_noatomic -ffffffff81ad28b0 t intel_crtc_disable_noatomic_begin -ffffffff81ad3000 T intel_modeset_verify_crtc -ffffffff81ad3560 t verify_connector_state -ffffffff81ad3a00 T intel_modeset_verify_disabled -ffffffff81ad4000 T intel_opregion_notify_encoder -ffffffff81ad4180 t swsci -ffffffff81ad44b0 T intel_opregion_notify_adapter -ffffffff81ad4510 T intel_opregion_asle_intr -ffffffff81ad4560 T intel_opregion_setup -ffffffff81ad4d80 t asle_work -ffffffff81ad51f0 T intel_opregion_get_panel_type -ffffffff81ad52e0 T intel_opregion_get_edid -ffffffff81ad53a0 T intel_opregion_headless_sku -ffffffff81ad53f0 T intel_opregion_register -ffffffff81ad5490 T intel_opregion_resume -ffffffff81ad5530 T intel_opregion_suspend -ffffffff81ad55e0 T intel_opregion_unregister -ffffffff81ad56b0 T intel_opregion_cleanup -ffffffff81ad57a0 t intel_no_opregion_vbt_callback -ffffffff81ad5800 t intel_use_opregion_panel_type_callback -ffffffff81ad6000 T intel_overlay_reset -ffffffff81ad6050 T intel_overlay_switch_off -ffffffff81ad6250 t intel_overlay_release_old_vid -ffffffff81ad63f0 T intel_overlay_put_image_ioctl -ffffffff81ad6700 t update_pfit_vscale_ratio -ffffffff81ad67d0 t check_overlay_dst -ffffffff81ad68a0 t check_overlay_src -ffffffff81ad6af0 t intel_overlay_do_put_image -ffffffff81ad7670 T intel_overlay_attrs_ioctl -ffffffff81ad7990 t check_gamma -ffffffff81ad7b80 T intel_overlay_setup -ffffffff81ad7df0 t intel_overlay_last_flip_retire -ffffffff81ad7e30 T intel_overlay_cleanup -ffffffff81ad7ef0 T intel_overlay_capture_error_state -ffffffff81ad7fe0 T intel_overlay_print_error_state -ffffffff81ad83b0 t intel_overlay_release_old_vid_tail -ffffffff81ad8480 t intel_overlay_off_tail -ffffffff81ad8630 t intel_overlay_flip_prepare -ffffffff81ad9000 T intel_panel_use_ssc -ffffffff81ad9060 T intel_panel_preferred_fixed_mode -ffffffff81ad90b0 T intel_panel_fixed_mode -ffffffff81ad9210 T intel_panel_downclock_mode -ffffffff81ad9300 T intel_panel_highest_mode -ffffffff81ad9360 T intel_panel_get_modes -ffffffff81ad93f0 T intel_panel_drrs_type -ffffffff81ad9420 T intel_panel_compute_config -ffffffff81ad9590 T intel_panel_add_edid_fixed_modes -ffffffff81ad9ac0 T intel_panel_add_vbt_lfp_fixed_mode -ffffffff81ad9b20 t intel_panel_add_fixed_mode -ffffffff81ad9ca0 T intel_panel_add_vbt_sdvo_fixed_mode -ffffffff81ad9d10 T intel_panel_add_encoder_fixed_mode -ffffffff81ad9d50 T intel_panel_fitting -ffffffff81ada3b0 T intel_panel_detect -ffffffff81ada440 T intel_panel_mode_valid -ffffffff81ada4d0 T intel_panel_init_alloc -ffffffff81ada520 T intel_panel_init -ffffffff81ada640 T intel_panel_fini -ffffffff81adb000 T intel_has_pch_trancoder -ffffffff81adb060 T intel_crtc_pch_transcoder -ffffffff81adb0a0 T intel_pch_transcoder_get_m1_n1 -ffffffff81adb0f0 T intel_pch_transcoder_get_m2_n2 -ffffffff81adb140 T ilk_pch_pre_enable -ffffffff81adb170 T ilk_pch_enable -ffffffff81adb750 t ilk_pch_transcoder_set_timings -ffffffff81adb9b0 T ilk_pch_disable -ffffffff81adb9d0 T ilk_pch_post_disable -ffffffff81adbdb0 T ilk_pch_get_config -ffffffff81adbf70 T lpt_pch_enable -ffffffff81adc1e0 T lpt_pch_disable -ffffffff81adc2f0 T lpt_pch_get_config -ffffffff81adc3c0 T intel_pch_sanitize -ffffffff81adc6a0 t assert_pch_dp_disabled -ffffffff81adc820 t assert_pch_hdmi_disabled -ffffffff81add000 T lpt_disable_iclkip -ffffffff81add070 T lpt_iclkip -ffffffff81add100 T lpt_program_iclkip -ffffffff81add390 T lpt_get_iclkip -ffffffff81add4a0 T lpt_disable_clkout_dp -ffffffff81add580 T intel_init_pch_refclk -ffffffff81adf000 T intel_crtc_initial_plane_config -ffffffff81ae0000 T intel_pmdemand_init -ffffffff81ae0120 T intel_pmdemand_init_early -ffffffff81ae01a0 T intel_pmdemand_update_phys_mask -ffffffff81ae0240 T intel_pmdemand_update_port_clock -ffffffff81ae0280 T intel_pmdemand_atomic_check -ffffffff81ae0620 t intel_pmdemand_update_max_ddiclk -ffffffff81ae06f0 t intel_pmdemand_update_active_non_tc_phys -ffffffff81ae08f0 T intel_pmdemand_init_pmdemand_params -ffffffff81ae0ac0 T intel_pmdemand_program_dbuf -ffffffff81ae0c50 t intel_pmdemand_wait -ffffffff81ae0e40 T intel_pmdemand_pre_plane_update -ffffffff81ae0f30 t intel_pmdemand_program_params -ffffffff81ae1370 T intel_pmdemand_post_plane_update -ffffffff81ae1450 t intel_pmdemand_duplicate_state -ffffffff81ae14e0 t intel_pmdemand_destroy_state -ffffffff81ae2000 T intel_pps_lock -ffffffff81ae2060 T intel_pps_unlock -ffffffff81ae20c0 T intel_pps_reset_all -ffffffff81ae2210 T intel_pps_check_power_unlocked -ffffffff81ae24f0 t pps_name -ffffffff81ae2590 T intel_pps_wait_power_cycle -ffffffff81ae2630 t wait_panel_power_cycle -ffffffff81ae2810 T intel_pps_vdd_on_unlocked -ffffffff81ae2d80 T intel_pps_vdd_on -ffffffff81ae2f10 T intel_pps_vdd_off_sync -ffffffff81ae2fe0 t intel_pps_vdd_off_sync_unlocked -ffffffff81ae3400 T intel_pps_vdd_off_unlocked -ffffffff81ae35b0 T intel_pps_on_unlocked -ffffffff81ae3a40 T intel_pps_on -ffffffff81ae3ae0 T intel_pps_off_unlocked -ffffffff81ae3ec0 T intel_pps_off -ffffffff81ae3f60 T intel_pps_backlight_on -ffffffff81ae4150 T intel_pps_backlight_off -ffffffff81ae4340 T intel_pps_backlight_power -ffffffff81ae4530 T vlv_pps_init -ffffffff81ae4710 t vlv_detach_power_sequencer -ffffffff81ae48e0 t vlv_steal_power_sequencer -ffffffff81ae4a10 t pps_init_delays -ffffffff81ae4eb0 t pps_init_registers -ffffffff81ae5240 T intel_pps_have_panel_power_or_vdd -ffffffff81ae5390 T intel_pps_encoder_reset -ffffffff81ae5530 t vlv_initial_power_sequencer_setup -ffffffff81ae5840 t pps_vdd_init -ffffffff81ae59f0 T intel_pps_init -ffffffff81ae5e60 t edp_panel_vdd_work -ffffffff81ae5f10 T intel_pps_init_late -ffffffff81ae6150 T intel_pps_unlock_regs_wa -ffffffff81ae6260 T intel_pps_setup -ffffffff81ae62d0 T assert_pps_unlocked -ffffffff81ae6560 t intel_pps_get_registers -ffffffff81ae6d70 t wait_panel_status -ffffffff81ae7190 t intel_pps_readout_hw_state -ffffffff81ae7340 t __delayed_work_tick -ffffffff81ae8000 T intel_psr_irq_handler -ffffffff81ae8650 t transcoder_name -ffffffff81ae8690 T intel_psr_init_dpcd -ffffffff81ae8930 T intel_psr_compute_config -ffffffff81ae8b10 t intel_psr2_config_valid -ffffffff81ae8f80 T intel_psr_get_config -ffffffff81ae9120 T intel_psr_disable -ffffffff81ae9230 t intel_psr_disable_locked -ffffffff81ae95c0 T intel_psr_pause -ffffffff81ae97c0 t intel_psr_exit -ffffffff81ae9a70 T intel_psr_resume -ffffffff81ae9b00 t intel_psr_activate -ffffffff81aea230 T intel_psr2_disable_plane_sel_fetch_arm -ffffffff81aea2a0 T intel_psr2_program_plane_sel_fetch_arm -ffffffff81aea340 T intel_psr2_program_plane_sel_fetch_noarm -ffffffff81aea4b0 T intel_psr2_program_trans_man_trk_ctl -ffffffff81aea5a0 T intel_psr2_sel_fetch_update -ffffffff81aeacf0 T intel_psr_pre_plane_update -ffffffff81aeaec0 t wm_optimization_wa -ffffffff81aeb050 T intel_psr_post_plane_update -ffffffff81aebc80 T intel_psr_wait_for_idle_locked -ffffffff81aebe50 T intel_psr_debug_set -ffffffff81aec170 T intel_psr_invalidate -ffffffff81aec3b0 T intel_psr_flush -ffffffff81aec7e0 T intel_psr_init -ffffffff81aec910 t intel_psr_work -ffffffff81aecab0 t tgl_dc3co_disable_work -ffffffff81aecb00 T intel_psr_short_pulse -ffffffff81aeced0 T intel_psr_enabled -ffffffff81aecf50 T intel_psr_lock -ffffffff81aed010 T intel_psr_unlock -ffffffff81aed0d0 T intel_psr_debugfs_register -ffffffff81aed100 T intel_psr_connector_debugfs_add -ffffffff81aed130 t _compute_psr2_sdp_prior_scanline_indication -ffffffff81aed1f0 t _compute_psr2_wake_times -ffffffff81aed2e0 t intel_psr2_sel_fetch_config_valid -ffffffff81aed370 t psr2_granularity_check -ffffffff81aed460 t tgl_psr2_disable_dc3co -ffffffff81aed570 t __delayed_work_tick -ffffffff81aee000 T intel_lookup_range_min_qp -ffffffff81aee110 T intel_lookup_range_max_qp -ffffffff81aef000 T intel_init_quirks -ffffffff81aef0f0 T intel_has_quirk -ffffffff81aef130 t quirk_ssc_force_disable -ffffffff81aef160 t quirk_invert_brightness -ffffffff81aef190 t quirk_backlight_present -ffffffff81aef1c0 t quirk_increase_t12_delay -ffffffff81aef1f0 t quirk_increase_ddi_disabled_time -ffffffff81aef220 t intel_dmi_reverse_brightness -ffffffff81aef270 t intel_dmi_no_pps_backlight -ffffffff81af0000 T intel_sdvo_port_enabled -ffffffff81af00a0 T intel_sdvo_init -ffffffff81af1030 t intel_sdvo_compute_config -ffffffff81af13f0 t pch_disable_sdvo -ffffffff81af1420 t pch_post_disable_sdvo -ffffffff81af1430 t intel_disable_sdvo -ffffffff81af15a0 t intel_sdvo_pre_enable -ffffffff81af1f20 t intel_enable_sdvo -ffffffff81af20f0 t intel_sdvo_get_hw_state -ffffffff81af21e0 t intel_sdvo_get_config -ffffffff81af2600 t intel_sdvo_set_target_input -ffffffff81af2670 t intel_sdvo_get_input_pixel_clock_range -ffffffff81af2710 t intel_sdvo_ddc_proxy_xfer -ffffffff81af27c0 t intel_sdvo_ddc_proxy_func -ffffffff81af27f0 t __intel_sdvo_write_cmd -ffffffff81af2ca0 t proxy_lock_bus -ffffffff81af2cd0 t proxy_trylock_bus -ffffffff81af2d00 t proxy_unlock_bus -ffffffff81af2d30 t intel_sdvo_enc_destroy -ffffffff81af2d40 t intel_sdvo_set_output_timings_from_mode -ffffffff81af2e40 t intel_sdvo_get_preferred_input_mode -ffffffff81af31d0 t intel_sdvo_get_dtd_from_mode -ffffffff81af3350 t intel_sdvo_read_response -ffffffff81af37f0 t intel_sdvo_get_value -ffffffff81af3860 t intel_sdvo_write_sdvox -ffffffff81af3a50 t intel_sdvo_write_infoframe -ffffffff81af3c10 t intel_sdvo_read_infoframe -ffffffff81af3e30 t intel_sdvo_hotplug -ffffffff81af3e70 t intel_sdvo_connector_get_hw_state -ffffffff81af3f00 t intel_sdvo_detect -ffffffff81af41f0 t intel_sdvo_connector_register -ffffffff81af4200 t intel_sdvo_connector_unregister -ffffffff81af4210 t intel_sdvo_connector_duplicate_state -ffffffff81af4290 t intel_sdvo_connector_atomic_set_property -ffffffff81af4460 t intel_sdvo_connector_atomic_get_property -ffffffff81af4680 t intel_sdvo_get_analog_edid -ffffffff81af46b0 t intel_sdvo_connector_matches_edid -ffffffff81af4740 t intel_sdvo_get_modes -ffffffff81af49e0 t intel_sdvo_mode_valid -ffffffff81af4af0 t intel_sdvo_atomic_check -ffffffff81af4ba0 t intel_sdvo_create_enhance_property -ffffffff81af6000 T intel_snps_phy_wait_for_calibration -ffffffff81af60d0 T intel_snps_phy_update_psr_power_state -ffffffff81af6190 T intel_snps_phy_set_signal_levels -ffffffff81af63e0 T intel_mpllb_calc_state -ffffffff81af6570 T intel_snps_phy_check_hdmi_link_rate -ffffffff81af6610 T intel_mpllb_enable -ffffffff81af6850 T intel_mpllb_disable -ffffffff81af69c0 T intel_mpllb_calc_port_clock -ffffffff81af6a90 T intel_mpllb_readout_hw_state -ffffffff81af6c00 T intel_mpllb_state_verify -ffffffff81af8000 T vlv_plane_min_cdclk -ffffffff81af80f0 T ivb_plane_min_cdclk -ffffffff81af81b0 T hsw_plane_min_cdclk -ffffffff81af8250 T chv_plane_check_rotation -ffffffff81af82c0 T intel_sprite_plane_create -ffffffff81af8610 t vlv_sprite_update_noarm -ffffffff81af8710 t vlv_sprite_update_arm -ffffffff81af8db0 t vlv_sprite_disable_arm -ffffffff81af8e40 t vlv_sprite_get_hw_state -ffffffff81af8f10 t vlv_sprite_check -ffffffff81af8fe0 t ivb_sprite_update_noarm -ffffffff81af9150 t ivb_sprite_update_arm -ffffffff81af9520 t ivb_sprite_disable_arm -ffffffff81af95d0 t ivb_sprite_get_hw_state -ffffffff81af9690 t g4x_sprite_check -ffffffff81af9930 t hsw_sprite_max_stride -ffffffff81af9980 t g4x_sprite_max_stride -ffffffff81af99f0 t ivb_sprite_min_cdclk -ffffffff81af9b30 t g4x_sprite_update_noarm -ffffffff81af9c90 t g4x_sprite_update_arm -ffffffff81afa0d0 t g4x_sprite_disable_arm -ffffffff81afa180 t g4x_sprite_get_hw_state -ffffffff81afa240 t g4x_sprite_min_cdclk -ffffffff81afa310 t vlv_sprite_ctl -ffffffff81afa500 t vlv_sprite_format_mod_supported -ffffffff81afa630 t ivb_sprite_ctl -ffffffff81afa860 t g4x_sprite_ctl -ffffffff81afaa20 t snb_sprite_format_mod_supported -ffffffff81afab10 t g4x_sprite_format_mod_supported -ffffffff81afb000 T intel_sprite_set_colorkey_ioctl -ffffffff81afc000 T intel_tc_port_in_tbt_alt_mode -ffffffff81afc070 T intel_tc_port_in_dp_alt_mode -ffffffff81afc0e0 T intel_tc_port_in_legacy_mode -ffffffff81afc150 T intel_tc_cold_requires_aux_pw -ffffffff81afc1c0 T intel_tc_port_get_lane_mask -ffffffff81afc2f0 T intel_tc_port_get_pin_assignment_mask -ffffffff81afc420 T intel_tc_port_fia_max_lane_count -ffffffff81afc600 T intel_tc_port_set_fia_lane_count -ffffffff81afc7d0 T intel_tc_port_init_mode -ffffffff81afca10 t intel_tc_port_update_mode -ffffffff81afcdc0 T intel_tc_port_sanitize_mode -ffffffff81afd100 T intel_tc_port_connected_locked -ffffffff81afd260 T intel_tc_port_ref_held -ffffffff81afd2c0 T intel_tc_port_connected -ffffffff81afd330 T intel_tc_port_link_needs_reset -ffffffff81afd3e0 T intel_tc_port_link_reset -ffffffff81afd4e0 T intel_tc_port_link_cancel_reset_work -ffffffff81afd590 T intel_tc_port_lock -ffffffff81afd5b0 t __intel_tc_port_lock -ffffffff81afd6f0 T intel_tc_port_suspend -ffffffff81afd750 T intel_tc_port_unlock -ffffffff81afd7d0 T intel_tc_port_get_link -ffffffff81afd860 T intel_tc_port_put_link -ffffffff81afd910 T intel_tc_port_init -ffffffff81afdb50 t kasprintf -ffffffff81afdc20 t intel_tc_port_disconnect_phy_work -ffffffff81afdc70 t intel_tc_port_link_reset_work -ffffffff81afdf70 T intel_tc_port_cleanup -ffffffff81afe030 t intel_tc_port_needs_reset -ffffffff81afe130 t tgl_tc_phy_cold_off_domain -ffffffff81afe160 t xelpdp_tc_phy_hpd_live_status -ffffffff81afe270 t adlp_tc_phy_is_ready -ffffffff81afe370 t xelpdp_tc_phy_is_owned -ffffffff81afe440 t xelpdp_tc_phy_get_hw_state -ffffffff81afe5c0 t xelpdp_tc_phy_connect -ffffffff81afe810 t xelpdp_tc_phy_disconnect -ffffffff81afe950 t adlp_tc_phy_init -ffffffff81afe9c0 t tc_phy_get_current_mode -ffffffff81afece0 t tc_phy_wait_for_ready -ffffffff81afee50 t xelpdp_tc_phy_enable_tcss_power -ffffffff81aff0a0 t tc_phy_verify_legacy_or_dp_alt_mode -ffffffff81aff280 t xelpdp_tc_phy_wait_for_tcss_power -ffffffff81aff490 t adlp_tc_phy_cold_off_domain -ffffffff81aff4f0 t adlp_tc_phy_hpd_live_status -ffffffff81aff5f0 t adlp_tc_phy_is_owned -ffffffff81aff6b0 t adlp_tc_phy_get_hw_state -ffffffff81aff740 t adlp_tc_phy_connect -ffffffff81affa30 t adlp_tc_phy_disconnect -ffffffff81affb90 t icl_tc_phy_hpd_live_status -ffffffff81affcf0 t icl_tc_phy_is_ready -ffffffff81affe00 t icl_tc_phy_is_owned -ffffffff81afff10 t icl_tc_phy_get_hw_state -ffffffff81afffa0 t icl_tc_phy_connect -ffffffff81b00110 t icl_tc_phy_disconnect -ffffffff81b00190 t tgl_tc_phy_init -ffffffff81b002c0 t icl_tc_phy_take_ownership -ffffffff81b00430 t icl_tc_phy_cold_off_domain -ffffffff81b00490 t icl_tc_phy_init -ffffffff81b004f0 t __delayed_work_tick -ffffffff81b01000 T intel_tv_init -ffffffff81b013f0 t intel_tv_compute_config -ffffffff81b018a0 t intel_tv_get_config -ffffffff81b01d60 t intel_tv_pre_enable -ffffffff81b02680 t intel_enable_tv -ffffffff81b026e0 t intel_disable_tv -ffffffff81b02740 t intel_tv_get_hw_state -ffffffff81b027a0 t intel_tv_connector_duplicate_state -ffffffff81b02820 t intel_tv_mode_to_mode -ffffffff81b02970 t intel_tv_get_modes -ffffffff81b02cb0 t intel_tv_detect -ffffffff81b03140 t intel_tv_mode_valid -ffffffff81b031f0 t intel_tv_atomic_check -ffffffff81b04000 T i915_get_vblank_counter -ffffffff81b041e0 T g4x_get_vblank_counter -ffffffff81b04270 T intel_crtc_get_vblank_timestamp -ffffffff81b04290 t i915_get_crtc_scanoutpos -ffffffff81b04690 T intel_get_crtc_scanline -ffffffff81b04700 t __intel_get_crtc_scanline -ffffffff81b04950 T intel_wait_for_pipe_scanline_stopped -ffffffff81b04960 t wait_for_pipe_scanline_moving -ffffffff81b04bc0 T intel_wait_for_pipe_scanline_moving -ffffffff81b04be0 T intel_crtc_update_active_timings -ffffffff81b05000 T intel_dsc_source_support -ffffffff81b05050 T intel_dsc_compute_params -ffffffff81b05650 T intel_dsc_power_domain -ffffffff81b05700 T intel_dsc_get_num_vdsc_instances -ffffffff81b05750 T intel_dsc_dsi_pps_write -ffffffff81b059f0 T intel_dsc_dp_pps_write -ffffffff81b05ae0 T intel_uncompressed_joiner_enable -ffffffff81b05c00 T intel_dsc_enable -ffffffff81b07600 T intel_dsc_disable -ffffffff81b07780 T intel_dsc_get_config -ffffffff81b08000 T intel_vga_disable -ffffffff81b08120 T intel_vga_redisable_power_on -ffffffff81b081c0 T intel_vga_redisable -ffffffff81b08280 T intel_vga_reset_io_mem -ffffffff81b082e0 T intel_vga_register -ffffffff81b08310 T intel_vga_unregister -ffffffff81b09000 T intel_vrr_is_capable -ffffffff81b09080 T intel_vrr_check_modeset -ffffffff81b09110 T intel_vrr_vmin_vblank_start -ffffffff81b09170 T intel_vrr_vmax_vblank_start -ffffffff81b091d0 T intel_vrr_compute_config -ffffffff81b09360 T intel_vrr_set_transcoder_timings -ffffffff81b09540 T intel_vrr_send_push -ffffffff81b095c0 T intel_vrr_is_push_sent -ffffffff81b09650 T intel_vrr_enable -ffffffff81b09770 T intel_vrr_disable -ffffffff81b098b0 T intel_vrr_get_config -ffffffff81b0a000 T intel_update_watermarks -ffffffff81b0a040 T intel_compute_pipe_wm -ffffffff81b0a090 T intel_compute_intermediate_wm -ffffffff81b0a120 T intel_initial_watermarks -ffffffff81b0a170 T intel_atomic_update_watermarks -ffffffff81b0a1b0 T intel_optimize_watermarks -ffffffff81b0a1f0 T intel_compute_global_watermarks -ffffffff81b0a240 T intel_wm_get_hw_state -ffffffff81b0a280 T intel_wm_plane_visible -ffffffff81b0a2e0 T intel_print_wm_latency -ffffffff81b0a3f0 T intel_wm_init -ffffffff81b0a410 T intel_wm_debugfs_register -ffffffff81b0b000 T skl_update_scaler_crtc -ffffffff81b0b0b0 t skl_update_scaler -ffffffff81b0b3f0 T skl_update_scaler_plane -ffffffff81b0b7f0 T intel_atomic_setup_scalers -ffffffff81b0bd50 T skl_pfit_enable -ffffffff81b0c240 T skl_program_plane_scaler -ffffffff81b0c930 T skl_detach_scalers -ffffffff81b0ca90 T skl_scaler_disable -ffffffff81b0cbc0 T skl_scaler_get_config -ffffffff81b0d000 T skl_format_to_fourcc -ffffffff81b0d180 T icl_is_nv12_y_plane -ffffffff81b0d1f0 T icl_hdr_plane_mask -ffffffff81b0d220 T icl_is_hdr_plane -ffffffff81b0d260 T skl_calc_main_surface_offset -ffffffff81b0d4a0 T skl_universal_plane_create -ffffffff81b0dc80 t icl_plane_min_width -ffffffff81b0de10 t icl_hdr_plane_max_width -ffffffff81b0de60 t icl_sdr_plane_max_width -ffffffff81b0de90 t icl_plane_max_height -ffffffff81b0dec0 t icl_plane_min_cdclk -ffffffff81b0df00 t glk_plane_max_width -ffffffff81b0dfb0 t skl_plane_max_height -ffffffff81b0dfe0 t glk_plane_min_cdclk -ffffffff81b0e050 t skl_plane_max_width -ffffffff81b0e120 t skl_plane_min_cdclk -ffffffff81b0e190 t skl_plane_max_stride -ffffffff81b0e230 t icl_plane_update_noarm -ffffffff81b0eae0 t icl_plane_update_arm -ffffffff81b0ec80 t icl_plane_disable_arm -ffffffff81b0ed90 t skl_plane_update_noarm -ffffffff81b0ef30 t skl_plane_update_arm -ffffffff81b0f250 t skl_plane_disable_arm -ffffffff81b0f300 t skl_plane_get_hw_state -ffffffff81b0f3d0 t skl_plane_check -ffffffff81b10000 t skl_plane_async_flip -ffffffff81b10130 t skl_plane_enable_flip_done -ffffffff81b10190 t skl_plane_disable_flip_done -ffffffff81b101f0 T skl_get_initial_plane_config -ffffffff81b109b0 t skl_plane_aux_dist -ffffffff81b10aa0 t skl_surf_address -ffffffff81b10bc0 t skl_plane_check_nv12_rotation -ffffffff81b10c60 t pxp_is_borked -ffffffff81b10cc0 t skl_plane_ctl -ffffffff81b113a0 t glk_plane_color_ctl -ffffffff81b114f0 t skl_check_main_ccs_coordinates -ffffffff81b11680 t gen12_plane_format_mod_supported -ffffffff81b118d0 t skl_plane_format_mod_supported -ffffffff81b12000 T intel_enabled_dbuf_slices_mask -ffffffff81b12120 T intel_sagv_pre_plane_update -ffffffff81b122b0 T intel_sagv_post_plane_update -ffffffff81b12520 T intel_can_enable_sagv -ffffffff81b12590 T skl_ddb_dbuf_slice_mask -ffffffff81b12640 T skl_write_plane_wm -ffffffff81b12ac0 T skl_write_cursor_wm -ffffffff81b12ea0 T skl_ddb_allocation_overlaps -ffffffff81b12f40 T intel_wm_state_verify -ffffffff81b13940 t skl_pipe_wm_get_hw_state -ffffffff81b13c90 T skl_watermark_ipc_enabled -ffffffff81b13cc0 T skl_watermark_ipc_update -ffffffff81b13d70 T skl_watermark_ipc_init -ffffffff81b13e40 T skl_wm_init -ffffffff81b14680 T intel_atomic_get_dbuf_state -ffffffff81b146a0 T intel_dbuf_init -ffffffff81b14710 T intel_dbuf_pre_plane_update -ffffffff81b149e0 T intel_dbuf_post_plane_update -ffffffff81b14ab0 T intel_mbus_dbox_update -ffffffff81b14d20 T skl_watermark_debugfs_register -ffffffff81b14d50 t skl_sagv_disable -ffffffff81b14e70 t skl_compute_wm -ffffffff81b18160 t skl_wm_get_hw_state_and_sanitize -ffffffff81b18950 t skl_build_plane_wm_single -ffffffff81b18ce0 t skl_compute_wm_params -ffffffff81b190b0 t skl_compute_plane_wm -ffffffff81b194e0 t skl_compute_dbuf_slices -ffffffff81b199e0 t skl_ddb_entry_for_slices -ffffffff81b19b20 t intel_dbuf_duplicate_state -ffffffff81b19bb0 t intel_dbuf_destroy_state -ffffffff81b1a000 T pixel_format_from_register_bits -ffffffff81b1a060 T vlv_dsi_wait_for_fifo_empty -ffffffff81b1a120 T vlv_dsi_init -ffffffff81b1a930 t intel_dsi_compute_config -ffffffff81b1aa80 t intel_dsi_pre_enable -ffffffff81b1c540 t bxt_dsi_enable -ffffffff81b1c560 t intel_dsi_disable -ffffffff81b1c810 t intel_dsi_post_disable -ffffffff81b1d4b0 t intel_dsi_get_hw_state -ffffffff81b1d780 t intel_dsi_get_config -ffffffff81b1df20 t intel_dsi_encoder_destroy -ffffffff81b1df50 t intel_dsi_prepare -ffffffff81b1ec30 t dpi_send_cmd -ffffffff81b1edc0 t intel_dsi_host_attach -ffffffff81b1edf0 t intel_dsi_host_detach -ffffffff81b1ee20 t intel_dsi_host_transfer -ffffffff81b1f280 t vlv_dsi_mode_valid -ffffffff81b20000 T vlv_dsi_pll_compute -ffffffff81b203a0 t vlv_dsi_pclk -ffffffff81b20550 T vlv_dsi_pll_enable -ffffffff81b20790 T vlv_dsi_pll_disable -ffffffff81b20810 T bxt_dsi_pll_is_enabled -ffffffff81b208e0 T bxt_dsi_pll_disable -ffffffff81b209e0 T vlv_dsi_get_pclk -ffffffff81b20a80 T bxt_dsi_get_pclk -ffffffff81b20b40 T vlv_dsi_reset_clocks -ffffffff81b20bd0 T bxt_dsi_pll_compute -ffffffff81b20d70 T bxt_dsi_pll_enable -ffffffff81b210f0 T bxt_dsi_reset_clocks -ffffffff81b21210 T assert_dsi_pll_enabled -ffffffff81b21230 t assert_dsi_pll -ffffffff81b21340 T assert_dsi_pll_disabled -ffffffff81b22000 T i915_gem_busy_ioctl -ffffffff81b23000 T i915_gem_clflush_object -ffffffff81b231f0 t clflush_work -ffffffff81b23250 t clflush_release -ffffffff81b24000 T i915_lut_handle_alloc -ffffffff81b24020 T i915_lut_handle_free -ffffffff81b24040 T i915_gem_context_release -ffffffff81b24070 T i915_gem_init__contexts -ffffffff81b240d0 T i915_gem_context_open -ffffffff81b24230 t i915_gem_create_context -ffffffff81b24a00 t proto_context_close -ffffffff81b24ab0 t gem_context_register -ffffffff81b24c50 T i915_gem_context_close -ffffffff81b24da0 t context_close -ffffffff81b25460 T i915_gem_vm_create_ioctl -ffffffff81b25570 t xa_alloc -ffffffff81b255f0 T i915_gem_vm_destroy_ioctl -ffffffff81b256a0 T i915_gem_user_to_context_sseu -ffffffff81b25900 T i915_gem_context_lookup -ffffffff81b25a30 T i915_gem_context_create_ioctl -ffffffff81b25c80 t proto_context_register -ffffffff81b25dd0 T i915_gem_context_destroy_ioctl -ffffffff81b25ef0 T i915_gem_context_getparam_ioctl -ffffffff81b26310 T i915_gem_context_setparam_ioctl -ffffffff81b267d0 t set_proto_ctx_param -ffffffff81b26ef0 T i915_gem_context_reset_stats_ioctl -ffffffff81b26ff0 T i915_gem_engines_iter_next -ffffffff81b27040 T i915_gem_context_module_exit -ffffffff81b27060 T i915_gem_context_module_init -ffffffff81b270c0 t i915_gem_context_release_work -ffffffff81b27190 t intel_context_set_gem -ffffffff81b272c0 t engines_notify -ffffffff81b27430 t intel_context_unpin -ffffffff81b274c0 t kill_engines -ffffffff81b27650 t create_setparam -ffffffff81b276c0 t invalid_ext -ffffffff81b276f0 t lookup_user_engine -ffffffff81b277b0 t set_proto_ctx_engines_balance -ffffffff81b27a90 t set_proto_ctx_engines_bond -ffffffff81b27e10 t set_proto_ctx_engines_parallel_submit -ffffffff81b29000 T __i915_gem_object_create_user -ffffffff81b29020 t __i915_gem_object_create_user_ext -ffffffff81b294b0 T i915_gem_dumb_create -ffffffff81b29620 T i915_gem_create_ioctl -ffffffff81b296f0 T i915_gem_create_ext_ioctl -ffffffff81b298f0 t ext_set_placements -ffffffff81b29d00 t ext_set_protected -ffffffff81b29d80 t ext_set_pat -ffffffff81b2a000 T i915_gem_prime_export -ffffffff81b2a090 T i915_gem_prime_import -ffffffff81b2b000 T i915_gem_cpu_write_needs_clflush -ffffffff81b2b070 T i915_gem_object_flush_if_display -ffffffff81b2b280 t i915_gem_object_unlock -ffffffff81b2b340 T i915_gem_object_flush_if_display_locked -ffffffff81b2b3c0 T i915_gem_object_set_to_wc_domain -ffffffff81b2b4c0 t flush_write_domain -ffffffff81b2b610 T i915_gem_object_set_to_gtt_domain -ffffffff81b2b760 T i915_gem_object_set_cache_level -ffffffff81b2b7f0 T i915_gem_get_caching_ioctl -ffffffff81b2b8d0 T i915_gem_set_caching_ioctl -ffffffff81b2bb10 t i915_gem_object_lock_interruptible -ffffffff81b2bc30 T i915_gem_object_pin_to_display_plane -ffffffff81b2be50 T i915_gem_object_set_to_cpu_domain -ffffffff81b2bf40 T i915_gem_set_domain_ioctl -ffffffff81b2c130 T i915_gem_object_prepare_read -ffffffff81b2c260 T i915_gem_object_prepare_write -ffffffff81b2d000 T i915_gem_execbuffer2_ioctl -ffffffff81b2db80 t eb_select_context -ffffffff81b2dc00 t eb_select_engine -ffffffff81b2e080 t eb_lookup_vmas -ffffffff81b2e7c0 t eb_release_vmas -ffffffff81b2eb00 t eb_relocate_parse -ffffffff81b2ec20 t eb_capture_stage -ffffffff81b2ed60 t eb_requests_create -ffffffff81b2f140 t eb_submit -ffffffff81b2f5a0 t eb_requests_get -ffffffff81b2f610 t eb_requests_add -ffffffff81b2f7a0 t signal_fence_array -ffffffff81b2f850 t eb_requests_put -ffffffff81b2f8c0 t eb_put_engine -ffffffff81b2fa10 t parse_timeline_fences -ffffffff81b2fe10 t eb_pin_engine -ffffffff81b30120 t eb_validate_vmas -ffffffff81b30a10 t eb_relocate_vma -ffffffff81b30c50 t eb_parse -ffffffff81b30fe0 t eb_relocate_parse_slow -ffffffff81b316b0 t eb_pin_timeline -ffffffff81b31900 t i915_gem_object_lock -ffffffff81b31b20 t eb_pin_flags -ffffffff81b31b90 t eb_relocate_entry -ffffffff81b32360 t reloc_cache_reset -ffffffff81b32450 t shadow_batch_pin -ffffffff81b33000 T __i915_gem_object_create_internal -ffffffff81b330c0 T i915_gem_object_create_internal -ffffffff81b33180 t i915_gem_object_get_pages_internal -ffffffff81b33470 t i915_gem_object_put_pages_internal -ffffffff81b34000 T i915_gem_object_lmem_io_map -ffffffff81b34050 T i915_gem_object_is_lmem -ffffffff81b340a0 T __i915_gem_object_is_lmem -ffffffff81b340f0 T __i915_gem_object_create_lmem_with_ps -ffffffff81b34110 T i915_gem_object_create_lmem_from_data -ffffffff81b341f0 T i915_gem_object_create_lmem -ffffffff81b35000 T i915_gem_mmap_ioctl -ffffffff81b351f0 T i915_gem_mmap_gtt_version -ffffffff81b35220 T remap_io_mapping -ffffffff81b352e0 T i915_gem_fault -ffffffff81b35f20 T __i915_gem_object_release_mmap_gtt -ffffffff81b35fa0 T i915_gem_object_release_mmap_gtt -ffffffff81b36050 T i915_gem_object_runtime_pm_release_mmap_offset -ffffffff81b360b0 T i915_gem_object_release_mmap_offset -ffffffff81b361b0 T i915_gem_dumb_mmap_offset -ffffffff81b361e0 t __assign_mmap_offset_handle -ffffffff81b366f0 T i915_gem_mmap_offset_ioctl -ffffffff81b367e0 T i915_gem_mmap -ffffffff81b37000 T i915_gem_get_pat_index -ffffffff81b37080 T i915_gem_object_has_cache_level -ffffffff81b37120 T i915_gem_object_alloc -ffffffff81b37170 T i915_gem_object_free -ffffffff81b37190 T i915_gem_object_init -ffffffff81b372b0 T __i915_gem_object_fini -ffffffff81b372d0 T i915_gem_object_set_cache_coherency -ffffffff81b373f0 T i915_gem_object_set_pat_index -ffffffff81b374a0 T i915_gem_object_can_bypass_llc -ffffffff81b37500 T __i915_gem_free_object_rcu -ffffffff81b37570 T __i915_gem_object_pages_fini -ffffffff81b378d0 T __i915_gem_free_object -ffffffff81b37980 T i915_gem_flush_free_objects -ffffffff81b379d0 t __i915_gem_free_objects -ffffffff81b37ac0 T __i915_gem_object_flush_frontbuffer -ffffffff81b37b70 T __i915_gem_object_invalidate_frontbuffer -ffffffff81b37c20 T i915_gem_object_read_from_page -ffffffff81b37d70 T i915_gem_object_has_struct_page -ffffffff81b37da0 T i915_gem_object_has_iomem -ffffffff81b37de0 T i915_gem_object_evictable -ffffffff81b37e90 T i915_gem_object_migratable -ffffffff81b37ed0 T i915_gem_object_can_migrate -ffffffff81b38040 T i915_gem_object_migrate -ffffffff81b380e0 T __i915_gem_object_migrate -ffffffff81b38180 T i915_gem_object_placement_possible -ffffffff81b38210 T i915_gem_object_needs_ccs_pages -ffffffff81b382b0 T i915_gem_init__objects -ffffffff81b382e0 t __i915_gem_free_work -ffffffff81b38330 T i915_objects_module_exit -ffffffff81b38350 T i915_objects_module_init -ffffffff81b383b0 T i915_gem_object_get_moving_fence -ffffffff81b383d0 T i915_gem_object_wait_moving_fence -ffffffff81b38450 T i915_gem_object_has_unknown_state -ffffffff81b38480 t i915_gem_free_object -ffffffff81b38510 t i915_gem_close_object -ffffffff81b39000 T __i915_gem_object_set_pages -ffffffff81b39320 T ____i915_gem_object_get_pages -ffffffff81b39390 T __i915_gem_object_get_pages -ffffffff81b393f0 T i915_gem_object_pin_pages_unlocked -ffffffff81b39510 t i915_gem_object_lock -ffffffff81b39730 T i915_gem_object_truncate -ffffffff81b39770 T __i915_gem_object_unset_pages -ffffffff81b39950 T __i915_gem_object_put_pages -ffffffff81b399d0 T i915_gem_object_pin_map -ffffffff81b39e90 T i915_gem_object_pin_map_unlocked -ffffffff81b39fa0 T __i915_gem_object_flush_map -ffffffff81b3a030 T __i915_gem_object_release_map -ffffffff81b3a0b0 T __i915_gem_object_page_iter_get_sg -ffffffff81b3a2a0 T __i915_gem_object_get_page -ffffffff81b3a2f0 T __i915_gem_object_get_dirty_page -ffffffff81b3a360 T __i915_gem_object_get_dma_address_len -ffffffff81b3a3e0 T __i915_gem_object_get_dma_address -ffffffff81b3b000 T i915_gem_object_put_pages_phys -ffffffff81b3b1c0 T i915_gem_object_pwrite_phys -ffffffff81b3b2c0 T i915_gem_object_pread_phys -ffffffff81b3b370 T i915_gem_object_attach_phys -ffffffff81b3b440 t i915_gem_object_shmem_to_phys -ffffffff81b3c000 T i915_gem_suspend -ffffffff81b3c060 T i915_gem_backup_suspend -ffffffff81b3c1e0 t lmem_suspend -ffffffff81b3c300 T i915_gem_suspend_late -ffffffff81b3c440 T i915_gem_freeze -ffffffff81b3c480 T i915_gem_freeze_late -ffffffff81b3c550 T i915_gem_resume -ffffffff81b3c6b0 t lmem_restore -ffffffff81b3d000 T i915_gem_object_init_memory_region -ffffffff81b3d080 T i915_gem_object_release_memory_region -ffffffff81b3d0e0 T i915_gem_object_create_region -ffffffff81b3d100 t __i915_gem_object_create_region -ffffffff81b3d270 T i915_gem_object_create_region_at -ffffffff81b3d310 T i915_gem_process_region -ffffffff81b3e000 T shmem_sg_free_table -ffffffff81b3e100 T shmem_sg_alloc_table -ffffffff81b3e250 T __shmem_writeback -ffffffff81b3e270 T __i915_gem_object_release_shmem -ffffffff81b3e330 T i915_gem_object_put_pages_shmem -ffffffff81b3e440 t shmem_get_pages -ffffffff81b3e5a0 t shmem_put_pages -ffffffff81b3e5e0 t shmem_truncate -ffffffff81b3e680 t shmem_shrink -ffffffff81b3e6f0 t shmem_pread -ffffffff81b3e760 t shmem_pwrite -ffffffff81b3eab0 t shmem_release -ffffffff81b3eb00 T i915_gem_object_create_shmem -ffffffff81b3eb20 T i915_gem_object_create_shmem_from_data -ffffffff81b3ec70 T i915_gem_shmem_setup -ffffffff81b3ecd0 T i915_gem_object_is_shmem -ffffffff81b3ed10 t init_shmem -ffffffff81b3ed60 t release_shmem -ffffffff81b3eda0 t shmem_object_init -ffffffff81b3f000 T i915_gem_shrink -ffffffff81b3f710 T i915_gem_shrink_all -ffffffff81b3f790 T i915_gem_driver_register__shrinker -ffffffff81b3f840 t i915_gem_shrinker_scan -ffffffff81b3f8b0 t i915_gem_shrinker_count -ffffffff81b3f930 T i915_gem_driver_unregister__shrinker -ffffffff81b3f950 T i915_gem_shrinker_taints_mutex -ffffffff81b3f980 T i915_gem_object_make_unshrinkable -ffffffff81b3fa80 T __i915_gem_object_make_shrinkable -ffffffff81b3fb70 T __i915_gem_object_make_purgeable -ffffffff81b3fc60 T i915_gem_object_make_shrinkable -ffffffff81b3fd50 T i915_gem_object_make_purgeable -ffffffff81b40000 T i915_gem_stolen_insert_node_in_range -ffffffff81b400d0 T i915_gem_stolen_insert_node -ffffffff81b40180 T i915_gem_stolen_remove_node -ffffffff81b401c0 T i915_gem_object_create_stolen -ffffffff81b401e0 T i915_gem_stolen_lmem_setup -ffffffff81b40500 T i915_gem_stolen_smem_setup -ffffffff81b405a0 T i915_gem_object_is_stolen -ffffffff81b405e0 T i915_gem_stolen_initialized -ffffffff81b40620 T i915_gem_stolen_area_address -ffffffff81b40650 T i915_gem_stolen_area_size -ffffffff81b40690 T i915_gem_stolen_node_address -ffffffff81b406d0 T i915_gem_stolen_node_offset -ffffffff81b40700 T i915_gem_stolen_node_allocated -ffffffff81b40730 T i915_gem_stolen_node_size -ffffffff81b40760 t init_stolen_lmem -ffffffff81b408f0 t release_stolen_lmem -ffffffff81b40960 t _i915_gem_object_stolen_init -ffffffff81b40d70 t i915_gem_init_stolen -ffffffff81b415c0 t init_stolen_smem -ffffffff81b41620 t release_stolen_smem -ffffffff81b41670 t i915_gem_object_get_pages_stolen -ffffffff81b41760 t i915_gem_object_put_pages_stolen -ffffffff81b41790 t i915_gem_object_release_stolen -ffffffff81b42000 T i915_gem_throttle_ioctl -ffffffff81b43000 T i915_gem_fence_size -ffffffff81b43080 T i915_gem_fence_alignment -ffffffff81b430e0 T i915_gem_object_needs_bit17_swizzle -ffffffff81b43130 T i915_gem_object_set_tiling -ffffffff81b43830 T i915_gem_set_tiling_ioctl -ffffffff81b43aa0 T i915_gem_get_tiling_ioctl -ffffffff81b44000 T i915_ttm_sys_placement -ffffffff81b44030 T i915_ttm_free_cached_io_rsgt -ffffffff81b44110 T i915_ttm_purge -ffffffff81b44260 T i915_ttm_resource_get_st -ffffffff81b44320 T i915_ttm_resource_mappable -ffffffff81b44370 T i915_ttm_driver -ffffffff81b443a0 T i915_ttm_adjust_lru -ffffffff81b44530 t ttm_vm_reference -ffffffff81b44560 t ttm_vm_detach -ffffffff81b445a0 t vm_fault_ttm -ffffffff81b44ae0 T i915_ttm_bo_destroy -ffffffff81b44b50 T __i915_gem_ttm_object_init -ffffffff81b44dd0 T i915_gem_ttm_system_setup -ffffffff81b44e50 t i915_ttm_tt_create -ffffffff81b44fd0 t i915_ttm_tt_populate -ffffffff81b45050 t i915_ttm_tt_unpopulate -ffffffff81b45070 t i915_ttm_tt_destroy -ffffffff81b450f0 t i915_ttm_eviction_valuable -ffffffff81b45180 t i915_ttm_evict_flags -ffffffff81b451e0 t i915_ttm_delete_mem_notify -ffffffff81b45260 t i915_ttm_swap_notify -ffffffff81b452d0 t i915_ttm_io_mem_reserve -ffffffff81b453a0 t i915_ttm_io_mem_pfn -ffffffff81b45410 t i915_ttm_access_memory -ffffffff81b45460 t i915_ttm_tt_release -ffffffff81b45480 t dma_resv_unlock -ffffffff81b45520 t i915_ttm_place_from_region -ffffffff81b45690 t __i915_ttm_get_pages -ffffffff81b45860 t i915_ttm_get_pages -ffffffff81b459a0 t i915_ttm_put_pages -ffffffff81b45a00 t i915_ttm_truncate -ffffffff81b45ac0 t i915_ttm_shrink -ffffffff81b45c20 t i915_ttm_mmap_offset -ffffffff81b45c50 t i915_ttm_unmap_virtual -ffffffff81b45d40 t i915_ttm_delayed_free -ffffffff81b45d50 t i915_ttm_migrate -ffffffff81b46000 T i915_ttm_adjust_domains_after_move -ffffffff81b46070 T i915_ttm_adjust_gem_after_move -ffffffff81b46180 T i915_ttm_move_notify -ffffffff81b461d0 T i915_ttm_move -ffffffff81b465f0 t __i915_ttm_move -ffffffff81b46cb0 T i915_gem_obj_copy_ttm -ffffffff81b46e90 t i915_ttm_memcpy_init -ffffffff81b47040 t __memcpy_cb -ffffffff81b470c0 t get_driver_name -ffffffff81b470f0 t get_timeline_name -ffffffff81b47120 t __memcpy_work -ffffffff81b47240 t __memcpy_irq_work -ffffffff81b48000 T i915_ttm_backup_free -ffffffff81b48060 T i915_ttm_recover_region -ffffffff81b480c0 t i915_ttm_recover -ffffffff81b48130 T i915_ttm_backup_region -ffffffff81b48190 t i915_ttm_backup -ffffffff81b48430 T i915_ttm_restore_region -ffffffff81b48490 t i915_ttm_restore -ffffffff81b485e0 t i915_gem_object_lock -ffffffff81b49000 T i915_gem_userptr_ioctl -ffffffff81b49110 T i915_gem_init_userptr -ffffffff81b49140 T i915_gem_cleanup_userptr -ffffffff81b4a000 T i915_gem_fence_wait_priority -ffffffff81b4a1b0 T i915_gem_object_wait_priority -ffffffff81b4a250 T i915_gem_object_wait -ffffffff81b4a410 T i915_gem_wait_ioctl -ffffffff81b4a660 T i915_gem_object_wait_migration -ffffffff81b4b000 T i915_gemfs_init -ffffffff81b4b030 T i915_gemfs_fini -ffffffff81b4c000 T inteldrm_gmch_match -ffffffff81b4c060 T i915_alloc_ifp -ffffffff81b4c180 T i965_alloc_ifp -ffffffff81b4c2e0 T intel_gtt_chipset_setup -ffffffff81b4c430 T intel_gmch_enable_gtt -ffffffff81b4c480 T intel_gmch_probe -ffffffff81b4c4b0 T intel_gmch_gtt_get -ffffffff81b4c500 T intel_gmch_gtt_flush -ffffffff81b4c600 T intel_gmch_remove -ffffffff81b4c630 T intel_gmch_gtt_insert_sg_entries -ffffffff81b4c7d0 T intel_gmch_gtt_insert_page -ffffffff81b4c900 T intel_gmch_gtt_clear_range -ffffffff81b4d000 T gen2_emit_flush -ffffffff81b4d0f0 T gen4_emit_flush_rcs -ffffffff81b4d240 T gen4_emit_flush_vcs -ffffffff81b4d290 T gen3_emit_breadcrumb -ffffffff81b4d450 T gen5_emit_breadcrumb -ffffffff81b4d590 T i830_emit_bb_start -ffffffff81b4d6c0 T gen3_emit_bb_start -ffffffff81b4d730 T gen4_emit_bb_start -ffffffff81b4d7a0 T gen2_irq_enable -ffffffff81b4d810 T gen2_irq_disable -ffffffff81b4d860 T gen3_irq_enable -ffffffff81b4d8d0 T gen3_irq_disable -ffffffff81b4d910 T gen5_irq_enable -ffffffff81b4d930 T gen5_irq_disable -ffffffff81b4e000 T gen6_emit_flush_rcs -ffffffff81b4e130 T gen6_emit_breadcrumb_rcs -ffffffff81b4e200 T gen6_emit_flush_xcs -ffffffff81b4e270 T gen6_emit_flush_vcs -ffffffff81b4e2e0 T gen6_emit_bb_start -ffffffff81b4e350 T hsw_emit_bb_start -ffffffff81b4e3c0 T gen7_emit_flush_rcs -ffffffff81b4e4a0 T gen7_emit_breadcrumb_rcs -ffffffff81b4e530 T gen6_emit_breadcrumb_xcs -ffffffff81b4e5a0 T gen7_emit_breadcrumb_xcs -ffffffff81b4e670 T gen6_irq_enable -ffffffff81b4e6d0 T gen6_irq_disable -ffffffff81b4e720 T hsw_irq_enable_vecs -ffffffff81b4e770 T hsw_irq_disable_vecs -ffffffff81b4f000 T gen7_ppgtt_enable -ffffffff81b4f0a0 T gen6_ppgtt_enable -ffffffff81b4f1b0 T gen6_ppgtt_pin -ffffffff81b4f270 T gen6_ppgtt_unpin -ffffffff81b4f2b0 T gen6_ppgtt_create -ffffffff81b4f5e0 t gen6_alloc_va_range -ffffffff81b4f820 t gen6_ppgtt_clear_range -ffffffff81b4f990 t gen6_ppgtt_insert_entries -ffffffff81b4fad0 t gen6_ppgtt_cleanup -ffffffff81b4fb70 t gen6_flush_pd -ffffffff81b4fc80 t pd_dummy_obj_get_pages -ffffffff81b4fcc0 t pd_dummy_obj_put_pages -ffffffff81b4fcf0 t pd_vma_bind -ffffffff81b4fd60 t pd_vma_unbind -ffffffff81b50000 T gen7_setup_clear_gpr_bb -ffffffff81b51000 T gen8_emit_flush_rcs -ffffffff81b511b0 T gen8_emit_flush_xcs -ffffffff81b51240 T gen11_emit_flush_rcs -ffffffff81b51310 T gen12_emit_aux_table_inv -ffffffff81b513f0 T gen12_emit_flush_rcs -ffffffff81b51780 T gen12_emit_flush_xcs -ffffffff81b51980 T gen8_emit_init_breadcrumb -ffffffff81b51a40 T xehp_emit_bb_start_noarb -ffffffff81b51b10 T xehp_emit_bb_start -ffffffff81b51be0 T gen8_emit_bb_start_noarb -ffffffff81b51c60 T gen8_emit_bb_start -ffffffff81b51d30 T gen8_emit_fini_breadcrumb_xcs -ffffffff81b51e50 T gen8_emit_fini_breadcrumb_rcs -ffffffff81b51fa0 T gen11_emit_fini_breadcrumb_rcs -ffffffff81b520f0 T gen12_emit_fini_breadcrumb_xcs -ffffffff81b522b0 T gen12_emit_fini_breadcrumb_rcs -ffffffff81b53000 T gen8_ppgtt_create -ffffffff81b536c0 t gen12_pte_encode -ffffffff81b53730 t gen8_pte_encode -ffffffff81b537a0 t gen8_ppgtt_insert -ffffffff81b544a0 t xehpsdv_ppgtt_insert_entry -ffffffff81b54640 t gen8_ppgtt_insert_entry -ffffffff81b54780 t gen8_ppgtt_alloc -ffffffff81b54820 t gen8_ppgtt_clear -ffffffff81b54890 t gen8_ppgtt_foreach -ffffffff81b54940 t gen8_ppgtt_cleanup -ffffffff81b549f0 t gen8_ppgtt_notify_vgt -ffffffff81b54ca0 t __gen8_ppgtt_alloc -ffffffff81b54f10 t gen8_pde_encode -ffffffff81b54f50 t __gen8_ppgtt_clear -ffffffff81b552c0 t __gen8_ppgtt_cleanup -ffffffff81b55350 t __gen8_ppgtt_foreach -ffffffff81b56000 T intel_breadcrumbs_create -ffffffff81b560d0 t signal_irq_work -ffffffff81b56500 t irq_enable -ffffffff81b56520 t irq_disable -ffffffff81b56540 T intel_breadcrumbs_reset -ffffffff81b565e0 T __intel_breadcrumbs_park -ffffffff81b56690 T intel_breadcrumbs_free -ffffffff81b566c0 T i915_request_enable_breadcrumb -ffffffff81b56890 T i915_request_cancel_breadcrumb -ffffffff81b569e0 T intel_context_remove_breadcrumbs -ffffffff81b56b80 T intel_engine_print_breadcrumbs -ffffffff81b57000 T intel_context_free -ffffffff81b57020 T intel_context_create -ffffffff81b57090 T intel_context_init -ffffffff81b57200 T intel_context_alloc_state -ffffffff81b572b0 T __intel_context_do_pin_ww -ffffffff81b575f0 t i915_gem_object_lock -ffffffff81b57810 t intel_engine_pm_might_get -ffffffff81b57880 t intel_context_active_acquire -ffffffff81b57910 T __intel_context_do_pin -ffffffff81b579a0 T __intel_context_do_unpin -ffffffff81b57a50 t sw_fence_dummy_notify -ffffffff81b57a80 t __intel_context_active -ffffffff81b57b10 t __intel_context_retire -ffffffff81b57bd0 T intel_context_fini -ffffffff81b57c80 T i915_context_module_exit -ffffffff81b57ca0 T i915_context_module_init -ffffffff81b57d00 T intel_context_enter_engine -ffffffff81b57d50 T intel_context_exit_engine -ffffffff81b57de0 T intel_context_prepare_remote_request -ffffffff81b57e60 T intel_context_create_request -ffffffff81b57fd0 T intel_context_get_active_request -ffffffff81b580b0 T intel_context_bind_parent_child -ffffffff81b58130 T intel_context_get_total_runtime_ns -ffffffff81b58210 T intel_context_get_avg_runtime_ns -ffffffff81b58260 T intel_context_ban -ffffffff81b582d0 T intel_context_revoke -ffffffff81b59000 T intel_context_reconfigure_sseu -ffffffff81b5a000 T intel_engine_context_size -ffffffff81b5a200 T intel_engine_set_hwsp_writemask -ffffffff81b5a280 T intel_clamp_heartbeat_interval_ms -ffffffff81b5a2d0 T intel_clamp_max_busywait_duration_ns -ffffffff81b5a320 T intel_clamp_preempt_timeout_ms -ffffffff81b5a390 T intel_clamp_stop_timeout_ms -ffffffff81b5a3e0 T intel_clamp_timeslice_duration_ms -ffffffff81b5a450 T intel_engines_release -ffffffff81b5a530 T intel_engine_free_request_pool -ffffffff81b5a590 T intel_engines_free -ffffffff81b5a630 T intel_engines_init_mmio -ffffffff81b5b6b0 T intel_engine_init_execlists -ffffffff81b5b730 T intel_engine_create_pinned_context -ffffffff81b5b860 T intel_engine_destroy_pinned_context -ffffffff81b5b9a0 T intel_engines_init -ffffffff81b5c370 T intel_engine_cleanup_common -ffffffff81b5c500 t cleanup_status_page -ffffffff81b5c5f0 T intel_engine_resume -ffffffff81b5c630 T intel_engine_get_active_head -ffffffff81b5c6c0 t intel_uncore_read64_2x32 -ffffffff81b5c7e0 T intel_engine_get_last_batch_head -ffffffff81b5c860 T intel_engine_stop_cs -ffffffff81b5c9b0 T intel_engine_cancel_stop_cs -ffffffff81b5ca00 T intel_engine_wait_for_pending_mi_fw -ffffffff81b5cad0 T intel_engine_get_instdone -ffffffff81b5cfa0 T __intel_engine_flush_submission -ffffffff81b5d030 T intel_engine_is_idle -ffffffff81b5d1e0 T intel_engines_are_idle -ffffffff81b5d260 T intel_engine_irq_enable -ffffffff81b5d2e0 T intel_engine_irq_disable -ffffffff81b5d350 T intel_engines_reset_default_submission -ffffffff81b5d3e0 T intel_engine_can_store_dword -ffffffff81b5d460 T intel_engine_dump_active_requests -ffffffff81b5d510 t engine_dump_request -ffffffff81b5d790 T intel_engine_dump -ffffffff81b5e5d0 T intel_engine_get_busy_time -ffffffff81b5e5f0 T intel_engine_create_virtual -ffffffff81b5e650 T intel_engine_get_hung_entity -ffffffff81b5e7f0 T xehp_enable_ccs_engines -ffffffff81b5e850 t nop_irq_handler -ffffffff81b5e880 t print_ring -ffffffff81b5f000 T intel_engine_unpark_heartbeat -ffffffff81b5f120 T intel_engine_park_heartbeat -ffffffff81b5f1a0 T intel_gt_unpark_heartbeats -ffffffff81b5f2f0 T intel_gt_park_heartbeats -ffffffff81b5f3a0 T intel_engine_init_heartbeat -ffffffff81b5f400 t heartbeat -ffffffff81b5f7a0 T intel_engine_set_heartbeat -ffffffff81b5f940 t set_heartbeat -ffffffff81b5fab0 t __intel_engine_pulse -ffffffff81b5fb80 T intel_engine_pulse -ffffffff81b5fc80 T intel_engine_flush_barriers -ffffffff81b5fe00 t heartbeat_create -ffffffff81b5ff00 t heartbeat_commit -ffffffff81b5ff90 t __delayed_work_tick -ffffffff81b5ffb0 t reset_engine -ffffffff81b60000 T intel_engine_init__pm -ffffffff81b600c0 T intel_engine_reset_pinned_contexts -ffffffff81b60150 t __engine_unpark -ffffffff81b60240 t __engine_park -ffffffff81b604b0 t duration -ffffffff81b61000 T intel_engine_lookup_user -ffffffff81b61070 T intel_engine_add_user -ffffffff81b610c0 T intel_engine_class_repr -ffffffff81b61100 T intel_engines_driver_register -ffffffff81b614b0 T intel_engines_has_context_isolation -ffffffff81b61570 t engine_cmp -ffffffff81b62000 T execlists_unwind_incomplete_requests -ffffffff81b62020 t __unwind_incomplete_requests -ffffffff81b62180 T intel_execlists_submission_setup -ffffffff81b62590 t execlists_submission_tasklet -ffffffff81b635a0 t execlists_timeslice -ffffffff81b635d0 t execlists_preempt -ffffffff81b63600 t execlists_sanitize -ffffffff81b63730 t execlists_release -ffffffff81b637b0 T intel_execlists_show_requests -ffffffff81b63a90 T intel_execlists_dump_active_requests -ffffffff81b63b30 t process_csb -ffffffff81b63f20 t active_preempt_timeout -ffffffff81b63fa0 t execlists_reset -ffffffff81b644a0 t post_process_csb -ffffffff81b64790 t wa_csb_read -ffffffff81b648c0 t execlists_capture_work -ffffffff81b64b80 t execlists_resume -ffffffff81b64d80 t execlists_request_alloc -ffffffff81b65010 t add_to_engine -ffffffff81b65090 t remove_from_engine -ffffffff81b65170 t execlists_reset_prepare -ffffffff81b65220 t execlists_reset_rewind -ffffffff81b65270 t execlists_reset_cancel -ffffffff81b65510 t execlists_reset_finish -ffffffff81b65560 t execlists_park -ffffffff81b655c0 t execlists_set_default_submission -ffffffff81b65630 t gen8_logical_ring_enable_irq -ffffffff81b65690 t gen8_logical_ring_disable_irq -ffffffff81b656d0 t execlists_irq_handler -ffffffff81b65870 t execlists_engine_busyness -ffffffff81b65980 t execlists_context_alloc -ffffffff81b659a0 t execlists_context_pre_pin -ffffffff81b65a40 t execlists_context_pin -ffffffff81b65a60 t execlists_context_cancel_request -ffffffff81b65af0 t execlists_create_virtual -ffffffff81b65f20 t execlists_create_parallel -ffffffff81b66050 t kick_execlists -ffffffff81b660f0 t virtual_submit_request -ffffffff81b66200 t virtual_submission_tasklet -ffffffff81b66480 t virtual_context_alloc -ffffffff81b664a0 t virtual_context_pre_pin -ffffffff81b66540 t virtual_context_pin -ffffffff81b66560 t virtual_context_enter -ffffffff81b665f0 t virtual_context_exit -ffffffff81b666b0 t virtual_context_destroy -ffffffff81b66710 t virtual_get_sibling -ffffffff81b66750 t rcu_virtual_context_destroy -ffffffff81b668e0 t execlists_reset_csb -ffffffff81b66c40 t nop_submission_tasklet -ffffffff81b66c80 t execlists_submit_request -ffffffff81b67000 T i915_ggtt_init_hw -ffffffff81b671c0 T i915_ggtt_suspend_vm -ffffffff81b67660 T i915_ggtt_suspend -ffffffff81b676e0 T gen6_ggtt_invalidate -ffffffff81b67730 T gen8_ggtt_pte_encode -ffffffff81b67770 T intel_ggtt_bind_vma -ffffffff81b67800 T intel_ggtt_unbind_vma -ffffffff81b67830 T i915_init_ggtt -ffffffff81b67dc0 T i915_ggtt_driver_release -ffffffff81b680a0 T i915_ggtt_driver_late_release -ffffffff81b680d0 T i915_ggtt_probe_hw -ffffffff81b68760 T i915_ggtt_create -ffffffff81b687d0 T i915_ggtt_enable_hw -ffffffff81b68810 T i915_ggtt_resume_vm -ffffffff81b689b0 T i915_ggtt_resume -ffffffff81b68a90 t i915_ggtt_color_adjust -ffffffff81b68af0 t aliasing_gtt_bind_vma -ffffffff81b68b90 t aliasing_gtt_unbind_vma -ffffffff81b68c30 t gen6_gmch_remove -ffffffff81b68c70 t gen8_ggtt_insert_page -ffffffff81b68cd0 t nop_clear_range -ffffffff81b68d00 t gen8_ggtt_clear_range -ffffffff81b68dc0 t gen8_ggtt_insert_entries -ffffffff81b68f20 t bxt_vtd_ggtt_insert_entries__BKL -ffffffff81b68f60 t bxt_vtd_ggtt_insert_page__BKL -ffffffff81b68ff0 t guc_ggtt_invalidate -ffffffff81b690d0 t gen8_ggtt_invalidate -ffffffff81b69140 t mtl_ggtt_pte_encode -ffffffff81b691e0 t ggtt_probe_common -ffffffff81b69420 t gen6_ggtt_clear_range -ffffffff81b694f0 t gen6_ggtt_insert_page -ffffffff81b69550 t gen6_ggtt_insert_entries -ffffffff81b696e0 t iris_pte_encode -ffffffff81b69740 t hsw_pte_encode -ffffffff81b69790 t byt_pte_encode -ffffffff81b697f0 t ivb_pte_encode -ffffffff81b69870 t snb_pte_encode -ffffffff81b6a000 T i915_vma_revoke_fence -ffffffff81b6a0a0 t fence_write -ffffffff81b6a3a0 T __i915_vma_pin_fence -ffffffff81b6a570 t fence_update -ffffffff81b6a770 T i915_vma_pin_fence -ffffffff81b6a8a0 T i915_reserve_fence -ffffffff81b6aa10 T i915_unreserve_fence -ffffffff81b6aa70 T intel_ggtt_restore_fences -ffffffff81b6aae0 T i915_gem_object_do_bit_17_swizzle -ffffffff81b6ad90 T i915_gem_object_save_bit_17_swizzle -ffffffff81b6af40 T intel_ggtt_init_fences -ffffffff81b6b410 T intel_ggtt_fini_fences -ffffffff81b6b480 T intel_gt_init_swizzling -ffffffff81b6c000 T intel_ggtt_gmch_probe -ffffffff81b6c1f0 t gmch_ggtt_insert_page -ffffffff81b6c220 t gmch_ggtt_insert_entries -ffffffff81b6c250 t gmch_ggtt_clear_range -ffffffff81b6c270 t gmch_ggtt_remove -ffffffff81b6c280 t gmch_ggtt_invalidate -ffffffff81b6c290 T intel_ggtt_gmch_enable_hw -ffffffff81b6c2e0 T intel_ggtt_gmch_flush -ffffffff81b6d000 T intel_gsc_irq_handler -ffffffff81b6d080 T intel_gsc_init -ffffffff81b6d0f0 T intel_gsc_fini -ffffffff81b6e000 T intel_gt_common_init_early -ffffffff81b6e0d0 T intel_root_gt_init_early -ffffffff81b6e150 T intel_gt_assign_ggtt -ffffffff81b6e1e0 T intel_gt_init_mmio -ffffffff81b6e220 T intel_gt_init_hw -ffffffff81b6e850 T intel_gt_perf_limit_reasons_reg -ffffffff81b6e8a0 T intel_gt_clear_error_registers -ffffffff81b6ec00 T intel_gt_check_and_clear_faults -ffffffff81b6eed0 T intel_gt_flush_ggtt_writes -ffffffff81b6ef70 T intel_gt_chipset_flush -ffffffff81b6efb0 T intel_gt_driver_register -ffffffff81b6f000 T intel_gt_wait_for_idle -ffffffff81b6f120 T intel_gt_init -ffffffff81b6f430 t __engines_record_defaults -ffffffff81b6f690 t __intel_gt_disable -ffffffff81b6f6c0 T intel_gt_driver_remove -ffffffff81b6f720 T intel_gt_driver_unregister -ffffffff81b6f7b0 T intel_gt_driver_release -ffffffff81b6f870 T intel_gt_driver_late_release_all -ffffffff81b6f930 T intel_gt_probe_all -ffffffff81b6fbd0 t intel_gt_tile_setup -ffffffff81b6fca0 T intel_gt_tiles_init -ffffffff81b6fe50 T intel_gt_info_print -ffffffff81b6fe90 T intel_gt_coherent_map_type -ffffffff81b70000 T intel_gt_buffer_pool_mark_used -ffffffff81b70060 T intel_gt_get_buffer_pool -ffffffff81b70270 T intel_gt_init_buffer_pool -ffffffff81b70330 t pool_free_work -ffffffff81b703d0 T intel_gt_flush_buffer_pool -ffffffff81b70470 t pool_free_older_than -ffffffff81b705f0 T intel_gt_fini_buffer_pool -ffffffff81b70620 t pool_retire -ffffffff81b70760 t __delayed_work_tick -ffffffff81b71000 T intel_gt_apply_ccs_mode -ffffffff81b72000 T intel_gt_init_clock_frequency -ffffffff81b72230 T intel_gt_clock_interval_to_ns -ffffffff81b72290 T intel_gt_pm_interval_to_ns -ffffffff81b722f0 T intel_gt_ns_to_clock_interval -ffffffff81b72360 T intel_gt_ns_to_pm_interval -ffffffff81b73000 T intel_gt_debugfs_reset_show -ffffffff81b73050 T intel_gt_debugfs_reset_store -ffffffff81b73160 T intel_gt_debugfs_register -ffffffff81b73190 T intel_gt_debugfs_register_files -ffffffff81b74000 T intel_gt_engines_debugfs_register -ffffffff81b75000 T gen11_gt_irq_handler -ffffffff81b75310 T gen11_gt_reset_one_iir -ffffffff81b75390 t gen11_gt_engine_identity -ffffffff81b754c0 T gen11_gt_irq_reset -ffffffff81b75870 T gen11_gt_irq_postinstall -ffffffff81b75ca0 T gen5_gt_irq_handler -ffffffff81b75d30 T gen6_gt_irq_handler -ffffffff81b75ef0 T gen8_gt_irq_handler -ffffffff81b76080 T gen8_gt_irq_reset -ffffffff81b76100 T gen8_gt_irq_postinstall -ffffffff81b761c0 T gen5_gt_enable_irq -ffffffff81b76220 T gen5_gt_disable_irq -ffffffff81b76260 T gen5_gt_irq_reset -ffffffff81b762f0 T gen5_gt_irq_postinstall -ffffffff81b77000 T intel_gt_mcr_init -ffffffff81b77460 T intel_gt_mcr_lock -ffffffff81b77650 T intel_gt_mcr_unlock -ffffffff81b776e0 T intel_gt_mcr_read -ffffffff81b77700 t rw_with_mcr_steering -ffffffff81b77820 T intel_gt_mcr_unicast_write -ffffffff81b77840 T intel_gt_mcr_multicast_write -ffffffff81b77940 T intel_gt_mcr_multicast_write_fw -ffffffff81b779c0 T intel_gt_mcr_multicast_rmw -ffffffff81b77a30 T intel_gt_mcr_read_any -ffffffff81b77af0 T intel_gt_mcr_get_nonterminated_steering -ffffffff81b77b80 t get_nonterminated_steering -ffffffff81b77cf0 T intel_gt_mcr_read_any_fw -ffffffff81b77de0 t rw_with_mcr_steering_fw -ffffffff81b77fa0 T intel_gt_mcr_report_steering -ffffffff81b78150 t report_steering_type -ffffffff81b78250 T intel_gt_mcr_get_ss_steering -ffffffff81b782d0 T intel_gt_mcr_wait_for_reg -ffffffff81b79000 T intel_gt_pm_init_early -ffffffff81b79060 T intel_gt_pm_init -ffffffff81b790a0 T intel_gt_pm_fini -ffffffff81b790c0 T intel_gt_resume -ffffffff81b793b0 t gt_sanitize -ffffffff81b79550 t intel_gt_pm_get -ffffffff81b795c0 t intel_gt_pm_put -ffffffff81b79630 T intel_gt_suspend_prepare -ffffffff81b79730 T intel_gt_suspend_late -ffffffff81b797f0 T intel_gt_runtime_suspend -ffffffff81b79810 T intel_gt_runtime_resume -ffffffff81b79850 T intel_gt_get_awake_time -ffffffff81b79970 t __gt_unpark -ffffffff81b79a60 t __gt_park -ffffffff81b7a000 T intel_gt_pm_debugfs_register -ffffffff81b7b000 T gen6_gt_pm_unmask_irq -ffffffff81b7b090 T gen6_gt_pm_mask_irq -ffffffff81b7b120 T gen6_gt_pm_reset_iir -ffffffff81b7b1b0 T gen6_gt_pm_enable_irq -ffffffff81b7b2b0 T gen6_gt_pm_disable_irq -ffffffff81b7c000 T intel_engine_add_retire -ffffffff81b7c0b0 T intel_engine_init_retire -ffffffff81b7c0e0 t engine_retire -ffffffff81b7c1b0 T intel_engine_fini_retire -ffffffff81b7c1d0 T intel_gt_retire_requests_timeout -ffffffff81b7c530 T intel_gt_init_requests -ffffffff81b7c590 t retire_work_handler -ffffffff81b7c610 T intel_gt_park_requests -ffffffff81b7c680 T intel_gt_unpark_requests -ffffffff81b7c6e0 T intel_gt_fini_requests -ffffffff81b7c740 T intel_gt_watchdog_work -ffffffff81b7c840 t __delayed_work_tick -ffffffff81b7d000 T intel_gt_sysfs_register -ffffffff81b7d030 T intel_gt_sysfs_unregister -ffffffff81b7e000 T intel_gt_sysfs_pm_init -ffffffff81b7f000 T intel_vm_no_concurrent_access_wa -ffffffff81b7f050 T alloc_pt_lmem -ffffffff81b7f0c0 T alloc_pt_dma -ffffffff81b7f130 T map_pt_dma -ffffffff81b7f190 T map_pt_dma_locked -ffffffff81b7f1f0 T i915_vm_lock_objects -ffffffff81b7f230 t i915_gem_object_lock -ffffffff81b7f450 T i915_address_space_fini -ffffffff81b7f470 T i915_vm_resv_release -ffffffff81b7f4b0 T i915_vm_release -ffffffff81b7f4e0 T i915_address_space_init -ffffffff81b7f660 t __i915_vm_release -ffffffff81b7f730 T __px_vaddr -ffffffff81b7f770 T __px_dma -ffffffff81b7f7b0 T __px_page -ffffffff81b7f7f0 T fill_page_dma -ffffffff81b7f8b0 T setup_scratch_page -ffffffff81b7fad0 T free_scratch -ffffffff81b7fb60 T gtt_write_workarounds -ffffffff81b7fd10 T setup_private_pat -ffffffff81b801a0 t bdw_setup_private_ppat -ffffffff81b80200 T __vm_create_scratch_for_read -ffffffff81b802b0 T __vm_create_scratch_for_read_pinned -ffffffff81b80420 t clear_vm_list -ffffffff81b81000 T intel_llc_enable -ffffffff81b811a0 T intel_llc_disable -ffffffff81b82000 T lrc_init_regs -ffffffff81b82020 t __lrc_init_regs -ffffffff81b825e0 T lrc_reset_regs -ffffffff81b82670 T lrc_init_state -ffffffff81b82710 T lrc_indirect_bb -ffffffff81b82750 T lrc_alloc -ffffffff81b82940 T lrc_reset -ffffffff81b829b0 T lrc_update_regs -ffffffff81b82ce0 T lrc_pre_pin -ffffffff81b82d60 T lrc_pin -ffffffff81b82e50 T lrc_unpin -ffffffff81b82eb0 T lrc_post_unpin -ffffffff81b82ef0 T lrc_fini -ffffffff81b82f80 T lrc_destroy -ffffffff81b83000 t gen12_emit_indirect_ctx_xcs -ffffffff81b83150 t gen12_emit_indirect_ctx_rcs -ffffffff81b83490 T lrc_update_offsets -ffffffff81b836f0 T lrc_check_regs -ffffffff81b83870 T lrc_fini_wa_ctx -ffffffff81b83890 T lrc_init_wa_ctx -ffffffff81b83cc0 t gen9_init_indirectctx_bb -ffffffff81b83ec0 t gen8_init_indirectctx_bb -ffffffff81b84070 T lrc_update_runtime -ffffffff81b85000 T intel_migrate_init -ffffffff81b853a0 T intel_migrate_create_context -ffffffff81b85520 T intel_context_migrate_copy -ffffffff81b85e10 t emit_pte -ffffffff81b861b0 t emit_copy_ccs -ffffffff81b862f0 T intel_context_migrate_clear -ffffffff81b86830 T intel_migrate_copy -ffffffff81b869f0 T intel_migrate_clear -ffffffff81b86b80 T intel_migrate_fini -ffffffff81b86bc0 t xehpsdv_insert_pte -ffffffff81b86c50 t xehpsdv_toggle_pdes -ffffffff81b86cd0 t insert_pte -ffffffff81b87000 T intel_mocs_init_engine -ffffffff81b87160 t get_mocs_settings -ffffffff81b873d0 t init_l3cc_table -ffffffff81b87530 T intel_set_mocs_index -ffffffff81b875a0 T intel_mocs_init -ffffffff81b88000 T alloc_pt -ffffffff81b880b0 T __alloc_pd -ffffffff81b88160 T alloc_pd -ffffffff81b88230 T free_px -ffffffff81b88290 T __set_pd_entry -ffffffff81b88300 T clear_pd_entry -ffffffff81b88380 T release_pd_entry -ffffffff81b88450 T i915_ppgtt_init_hw -ffffffff81b884c0 T i915_ppgtt_create -ffffffff81b884f0 T ppgtt_bind_vma -ffffffff81b88590 T ppgtt_unbind_vma -ffffffff81b88610 T i915_vm_alloc_pt_stash -ffffffff81b88800 T i915_vm_free_pt_stash -ffffffff81b888e0 T i915_vm_map_pt_stash -ffffffff81b88990 T ppgtt_init -ffffffff81b89000 T intel_check_bios_c6_setup -ffffffff81b89090 T intel_rc6_init -ffffffff81b89770 T intel_rc6_sanitize -ffffffff81b89870 T intel_rc6_enable -ffffffff81b89e20 t gen9_rc6_enable -ffffffff81b89ff0 t gen8_rc6_enable -ffffffff81b8a0d0 t gen6_rc6_enable -ffffffff81b8a370 T intel_rc6_unpark -ffffffff81b8a3c0 T intel_rc6_park -ffffffff81b8a4f0 T intel_rc6_disable -ffffffff81b8a5d0 T intel_rc6_fini -ffffffff81b8a710 T intel_rc6_residency_ns -ffffffff81b8a970 T intel_rc6_residency_us -ffffffff81b8a9d0 T intel_rc6_print_residency -ffffffff81b8b000 T intel_gt_setup_lmem -ffffffff81b8b2c0 t region_lmem_init -ffffffff81b8b3c0 t region_lmem_release -ffffffff81b8c000 T intel_renderstate_init -ffffffff81b8c720 T intel_renderstate_emit -ffffffff81b8c7c0 T intel_renderstate_fini -ffffffff81b8d000 T __i915_request_reset -ffffffff81b8d280 T __intel_gt_reset -ffffffff81b8d600 T intel_has_gpu_reset -ffffffff81b8d660 T intel_has_reset_engine -ffffffff81b8d6b0 T intel_reset_guc -ffffffff81b8d7e0 T intel_gt_set_wedged -ffffffff81b8d870 t __intel_gt_set_wedged -ffffffff81b8da10 T intel_gt_unset_wedged -ffffffff81b8da70 t __intel_gt_unset_wedged -ffffffff81b8dba0 T intel_gt_reset -ffffffff81b8e030 t reset_finish -ffffffff81b8e110 T __intel_engine_reset_bh -ffffffff81b8e2c0 T intel_engine_reset -ffffffff81b8e2d0 T intel_gt_handle_error -ffffffff81b8e7a0 T intel_gt_reset_trylock -ffffffff81b8e7e0 T intel_gt_reset_lock_interruptible -ffffffff81b8e920 T intel_gt_reset_unlock -ffffffff81b8e950 T intel_gt_terminally_wedged -ffffffff81b8eaa0 T intel_gt_set_wedged_on_init -ffffffff81b8eb20 T intel_gt_set_wedged_on_fini -ffffffff81b8eba0 T intel_gt_init_reset -ffffffff81b8ec30 T intel_gt_fini_reset -ffffffff81b8ec60 T __intel_init_wedge -ffffffff81b8ece0 t intel_wedge_me -ffffffff81b8edb0 T __intel_fini_wedge -ffffffff81b8ee20 T intel_engine_reset_needs_wa_22011802037 -ffffffff81b8ef00 t gen8_reset_engines -ffffffff81b8f1a0 t gen6_reset_engines -ffffffff81b8f210 t ilk_do_reset -ffffffff81b8f2e0 t g4x_do_reset -ffffffff81b8f570 t g33_do_reset -ffffffff81b8f6b0 t i915_do_reset -ffffffff81b8f920 t __gen11_reset_engines -ffffffff81b8fdb0 t __gen6_reset_engines -ffffffff81b8ff00 t nop_submit_request -ffffffff81b8ff70 t __delayed_work_tick -ffffffff81b90000 T intel_ring_update_space -ffffffff81b90040 T __intel_ring_pin -ffffffff81b90070 T intel_ring_pin -ffffffff81b901c0 T intel_ring_reset -ffffffff81b90200 T intel_ring_unpin -ffffffff81b902a0 T intel_engine_create_ring -ffffffff81b90430 T intel_ring_free -ffffffff81b90480 T intel_ring_begin -ffffffff81b90600 t wait_for_space -ffffffff81b90700 T intel_ring_cacheline_align -ffffffff81b91000 T intel_ring_submission_setup -ffffffff81b916f0 t i915_gem_object_lock -ffffffff81b91910 t ring_release -ffffffff81b91a60 t xcs_resume -ffffffff81b92040 t xcs_sanitize -ffffffff81b920b0 t reset_prepare -ffffffff81b921f0 t reset_rewind -ffffffff81b922a0 t reset_cancel -ffffffff81b92330 t reset_finish -ffffffff81b92360 t add_to_engine -ffffffff81b923e0 t remove_from_engine -ffffffff81b92470 t ring_request_alloc -ffffffff81b92800 t i9xx_set_default_submission -ffffffff81b92840 t irq_handler -ffffffff81b92860 t stop_ring -ffffffff81b92960 t ring_context_alloc -ffffffff81b92a50 t ring_context_revoke -ffffffff81b92b10 t ring_context_pre_pin -ffffffff81b92bf0 t ring_context_pin -ffffffff81b92c20 t ring_context_unpin -ffffffff81b92c50 t ring_context_post_unpin -ffffffff81b92ca0 t ring_context_cancel_request -ffffffff81b92d30 t ring_context_reset -ffffffff81b92d80 t ring_context_destroy -ffffffff81b92dd0 t switch_mm -ffffffff81b92f10 t mi_set_context -ffffffff81b931f0 t i9xx_submit_request -ffffffff81b93240 t gen6_bsd_set_default_submission -ffffffff81b93280 t gen6_bsd_submit_request -ffffffff81b94000 T intel_rps_mark_interactive -ffffffff81b94080 t rps_set_power -ffffffff81b941f0 T intel_rps_unpark -ffffffff81b944f0 T intel_rps_set -ffffffff81b94610 T intel_rps_park -ffffffff81b947b0 t rps_disable_interrupts -ffffffff81b94890 t rps_set -ffffffff81b94bd0 T intel_rps_get_boost_frequency -ffffffff81b94cb0 T intel_gpu_freq -ffffffff81b94d80 T intel_rps_set_boost_frequency -ffffffff81b94f10 T intel_rps_dec_waiters -ffffffff81b94f70 T intel_rps_boost -ffffffff81b95090 T gen6_rps_get_freq_caps -ffffffff81b95270 T intel_rps_enable -ffffffff81b95810 t gen9_rps_enable -ffffffff81b95920 t gen8_rps_enable -ffffffff81b95a10 t gen6_rps_enable -ffffffff81b95b10 t gen5_rps_enable -ffffffff81b96530 T intel_rps_disable -ffffffff81b967d0 T intel_freq_opcode -ffffffff81b96890 T gen11_rps_irq_handler -ffffffff81b96920 T gen6_rps_irq_handler -ffffffff81b96a40 T gen5_rps_irq_handler -ffffffff81b96c70 T intel_rps_init_early -ffffffff81b96d10 t rps_work -ffffffff81b97090 t rps_timer -ffffffff81b972b0 T intel_rps_init -ffffffff81b97df0 t gen5_rps_init -ffffffff81b97f50 T intel_rps_sanitize -ffffffff81b97fb0 T intel_rps_read_rpstat -ffffffff81b97ff0 T intel_rps_read_actual_frequency -ffffffff81b98120 T intel_rps_read_actual_frequency_fw -ffffffff81b98200 t __read_cagf -ffffffff81b98390 T intel_rps_read_punit_req_frequency -ffffffff81b984b0 T intel_rps_get_requested_frequency -ffffffff81b98670 T intel_rps_get_max_frequency -ffffffff81b98750 T intel_rps_get_max_raw_freq -ffffffff81b987d0 T intel_rps_get_rp0_frequency -ffffffff81b988b0 T intel_rps_get_rp1_frequency -ffffffff81b98990 T intel_rps_get_rpn_frequency -ffffffff81b98a70 T gen6_rps_frequency_dump -ffffffff81b9a110 T intel_rps_set_max_frequency -ffffffff81b9a380 T intel_rps_get_min_frequency -ffffffff81b9a460 T intel_rps_get_min_raw_freq -ffffffff81b9a4e0 T intel_rps_set_min_frequency -ffffffff81b9a660 T intel_rps_get_up_threshold -ffffffff81b9a690 T intel_rps_set_up_threshold -ffffffff81b9a770 T intel_rps_get_down_threshold -ffffffff81b9a7a0 T intel_rps_set_down_threshold -ffffffff81b9a880 T intel_rps_raise_unslice -ffffffff81b9a960 T intel_rps_lower_unslice -ffffffff81b9aa40 T rps_read_mask_mmio -ffffffff81b9aad0 T intel_rps_driver_register -ffffffff81b9ab10 T intel_rps_driver_unregister -ffffffff81b9ab60 T i915_read_mch_val -ffffffff81b9afd0 T i915_gpu_raise -ffffffff81b9b060 T i915_gpu_lower -ffffffff81b9b0f0 T i915_gpu_busy -ffffffff81b9b160 T i915_gpu_turbo_disable -ffffffff81b9c000 T intel_sa_mediagt_setup -ffffffff81b9d000 T intel_sseu_set_info -ffffffff81b9d040 T intel_sseu_subslice_total -ffffffff81b9d1c0 T intel_sseu_get_hsw_subslices -ffffffff81b9d270 T intel_sseu_copy_eumask_to_user -ffffffff81b9d5c0 T intel_sseu_copy_ssmask_to_user -ffffffff81b9d740 T intel_sseu_info_init -ffffffff81b9e6e0 t cherryview_sseu_info_init -ffffffff81b9e900 t hsw_sseu_info_init -ffffffff81b9ebd0 T intel_sseu_make_rpcs -ffffffff81b9eda0 T intel_sseu_dump -ffffffff81b9efa0 T intel_sseu_print_topology -ffffffff81b9f260 T intel_sseu_print_ss_info -ffffffff81b9f2c0 T intel_slicemask_from_xehp_dssmask -ffffffff81b9f310 t xehp_load_dss_mask -ffffffff81b9f440 t gen11_compute_sseu_info -ffffffff81ba0000 T intel_sseu_status -ffffffff81ba0840 T intel_sseu_debugfs_register -ffffffff81ba1000 T intel_gt_init_timelines -ffffffff81ba1060 T __intel_timeline_create -ffffffff81ba1220 T intel_timeline_create_from_engine -ffffffff81ba12e0 T __intel_timeline_pin -ffffffff81ba1310 T intel_timeline_pin -ffffffff81ba1440 T intel_timeline_reset_seqno -ffffffff81ba1470 T intel_timeline_enter -ffffffff81ba1550 T intel_timeline_exit -ffffffff81ba1620 T intel_timeline_get_seqno -ffffffff81ba1680 t __intel_timeline_get_seqno -ffffffff81ba1720 T intel_timeline_read_hwsp -ffffffff81ba17f0 T intel_timeline_unpin -ffffffff81ba1840 T __intel_timeline_free -ffffffff81ba18d0 T intel_gt_fini_timelines -ffffffff81ba1900 T intel_gt_show_timelines -ffffffff81ba1c90 t __timeline_active -ffffffff81ba1cd0 t __timeline_retire -ffffffff81ba2000 T intel_gt_invalidate_tlb_full -ffffffff81ba22e0 T intel_gt_init_tlb -ffffffff81ba2340 T intel_gt_fini_tlb -ffffffff81ba3000 T intel_wopcm_init_early -ffffffff81ba3080 T intel_wopcm_init -ffffffff81ba4000 T intel_engine_init_ctx_wa -ffffffff81ba4b80 T intel_engine_emit_ctx_wa -ffffffff81ba4dd0 T intel_gt_init_workarounds -ffffffff81ba6150 T intel_gt_apply_workarounds -ffffffff81ba6170 t wa_list_apply -ffffffff81ba6320 T intel_gt_verify_workarounds -ffffffff81ba6510 T intel_engine_init_whitelist -ffffffff81ba67b0 t tgl_whitelist_build -ffffffff81ba68c0 t icl_whitelist_build -ffffffff81ba6a50 t cml_whitelist_build -ffffffff81ba6ab0 t cfl_whitelist_build -ffffffff81ba6bb0 t glk_whitelist_build -ffffffff81ba6cb0 t kbl_whitelist_build -ffffffff81ba6db0 t bxt_whitelist_build -ffffffff81ba6e90 t skl_whitelist_build -ffffffff81ba6f90 T intel_engine_apply_whitelist -ffffffff81ba7090 T intel_engine_init_workarounds -ffffffff81ba8840 T intel_engine_apply_workarounds -ffffffff81ba8860 T intel_engine_verify_workarounds -ffffffff81ba9110 t gen12_ctx_workarounds_init -ffffffff81ba9220 t _wa_add -ffffffff81ba94b0 t gen9_ctx_workarounds_init -ffffffff81ba9710 t gen8_ctx_workarounds_init -ffffffff81ba9850 t gen12_gt_workarounds_init -ffffffff81ba9a00 t gen9_gt_workarounds_init -ffffffff81ba9b70 t xehp_init_mcr -ffffffff81baa000 T uao_create_from_data -ffffffff81baa090 T uao_write -ffffffff81baa0b0 T uao_create_from_object -ffffffff81baa190 T uao_read_to_iosys_map -ffffffff81baa310 T uao_read -ffffffff81baa330 t __uao_rw -ffffffff81bab000 T intel_engines_add_sysfs -ffffffff81bac000 T intel_gsc_uc_fw_proxy_init_done -ffffffff81bac0a0 T intel_gsc_uc_fw_proxy_get_status -ffffffff81bac0d0 T intel_gsc_uc_fw_init_done -ffffffff81bac120 T intel_gsc_fw_get_binary_info -ffffffff81bac490 T intel_gsc_uc_fw_upload -ffffffff81bac830 t gsc_fw_query_compatibility_version -ffffffff81bad000 T intel_gsc_proxy_request_handler -ffffffff81bad840 T intel_gsc_proxy_irq_handler -ffffffff81bad8e0 T intel_gsc_proxy_fini -ffffffff81bad950 T intel_gsc_proxy_init -ffffffff81bae000 T intel_gsc_uc_init_early -ffffffff81bae100 t gsc_work -ffffffff81bae2d0 T intel_gsc_uc_init -ffffffff81bae500 T intel_gsc_uc_fini -ffffffff81bae5f0 T intel_gsc_uc_flush_work -ffffffff81bae630 T intel_gsc_uc_resume -ffffffff81bae6e0 T intel_gsc_uc_load_start -ffffffff81bae770 T intel_gsc_uc_load_status -ffffffff81baf000 T intel_gsc_uc_debugfs_register -ffffffff81bb0000 T intel_gsc_uc_heci_cmd_submit_packet -ffffffff81bb02f0 T intel_gsc_uc_heci_cmd_emit_mtl_header -ffffffff81bb0350 T intel_gsc_uc_heci_cmd_submit_nonpriv -ffffffff81bb0800 t i915_gem_object_lock -ffffffff81bb1000 T intel_guc_notify -ffffffff81bb1040 T intel_guc_init_send_regs -ffffffff81bb10e0 T intel_guc_init_early -ffffffff81bb1230 t gen11_reset_guc_interrupts -ffffffff81bb1280 t gen11_enable_guc_interrupts -ffffffff81bb1300 t gen11_disable_guc_interrupts -ffffffff81bb1370 t gen9_reset_guc_interrupts -ffffffff81bb1440 t gen9_enable_guc_interrupts -ffffffff81bb15b0 t gen9_disable_guc_interrupts -ffffffff81bb16a0 T intel_guc_init_late -ffffffff81bb16b0 T intel_guc_write_params -ffffffff81bb18d0 T intel_guc_dump_time_info -ffffffff81bb1a10 T intel_guc_init -ffffffff81bb1ba0 t guc_init_params -ffffffff81bb20e0 T intel_guc_fini -ffffffff81bb2190 T intel_guc_send_mmio -ffffffff81bb2670 T intel_guc_to_host_process_recv_msg -ffffffff81bb2760 T intel_guc_auth_huc -ffffffff81bb27c0 T intel_guc_suspend -ffffffff81bb28b0 T intel_guc_resume -ffffffff81bb28e0 T intel_guc_allocate_vma -ffffffff81bb2a00 T intel_guc_allocate_and_map_vma -ffffffff81bb2ab0 T intel_guc_self_cfg32 -ffffffff81bb2bb0 T intel_guc_self_cfg64 -ffffffff81bb2cb0 T intel_guc_load_status -ffffffff81bb2e40 T intel_guc_write_barrier -ffffffff81bb3000 T intel_guc_ads_print_policy_info -ffffffff81bb3100 T intel_guc_global_policies_update -ffffffff81bb32e0 T intel_guc_ads_create -ffffffff81bb3830 t guc_prep_golden_context -ffffffff81bb3a40 t guc_capture_prep_lists -ffffffff81bb4110 t __guc_ads_init -ffffffff81bb4640 T intel_guc_ads_init_late -ffffffff81bb4840 T intel_guc_ads_destroy -ffffffff81bb48a0 T intel_guc_ads_reset -ffffffff81bb4950 T intel_guc_engine_usage_offset -ffffffff81bb4990 T intel_guc_engine_usage_record_map -ffffffff81bb4a30 t guc_mmio_reg_add -ffffffff81bb5000 T intel_guc_capture_getlistsize -ffffffff81bb5020 t guc_capture_getlistsize -ffffffff81bb5250 T intel_guc_capture_getlist -ffffffff81bb6100 t guc_cap_list_num_regs -ffffffff81bb6210 T intel_guc_capture_getnullheader -ffffffff81bb62d0 T intel_guc_capture_print_engine_node -ffffffff81bb67e0 T intel_guc_capture_free_node -ffffffff81bb6860 T intel_guc_capture_is_matching_engine -ffffffff81bb6910 T intel_guc_capture_get_matching_node -ffffffff81bb6aa0 T intel_guc_capture_process -ffffffff81bb7a80 T intel_guc_capture_destroy -ffffffff81bb7de0 T intel_guc_capture_init -ffffffff81bb8630 t guc_capture_log_get_register -ffffffff81bb8730 t guc_capture_log_remove_dw -ffffffff81bb9000 T intel_guc_ct_init_early -ffffffff81bb9120 t ct_incoming_request_worker_func -ffffffff81bb94f0 t ct_receive_tasklet_func -ffffffff81bb9510 T intel_guc_ct_init -ffffffff81bb96c0 T intel_guc_ct_fini -ffffffff81bb9720 T intel_guc_ct_enable -ffffffff81bb9aa0 T intel_guc_ct_disable -ffffffff81bb9b70 T intel_guc_ct_send -ffffffff81bba4c0 T intel_guc_ct_event_handler -ffffffff81bba4f0 t ct_try_receive_message -ffffffff81bbad40 T intel_guc_ct_print_info -ffffffff81bbae50 t ct_write -ffffffff81bbb010 t ktime_get -ffffffff81bbb090 t ct_deadlocked -ffffffff81bbc000 T intel_guc_debugfs_register -ffffffff81bbd000 T intel_guc_fw_upload -ffffffff81bbe000 T intel_gt_init_hwconfig -ffffffff81bbe1e0 T intel_gt_fini_hwconfig -ffffffff81bbf000 T intel_guc_log_section_size_capture -ffffffff81bbf040 t guc_log_init_sizes -ffffffff81bbf280 T intel_guc_check_log_buf_overflow -ffffffff81bbf330 T intel_guc_get_log_buffer_size -ffffffff81bbf3c0 T intel_guc_get_log_buffer_offset -ffffffff81bbf4b0 T intel_guc_log_init_early -ffffffff81bbf520 t copy_debug_logs_work -ffffffff81bbf540 T intel_guc_log_create -ffffffff81bbf770 T intel_guc_log_destroy -ffffffff81bbf7a0 T intel_guc_log_set_level -ffffffff81bbf8e0 T intel_guc_log_relay_created -ffffffff81bbf910 T intel_guc_log_relay_open -ffffffff81bbf9b0 T intel_guc_log_relay_start -ffffffff81bbfa10 T intel_guc_log_relay_flush -ffffffff81bbfab0 t guc_log_copy_debuglogs_for_relay -ffffffff81bbfc00 T intel_guc_log_relay_close -ffffffff81bbfc90 T intel_guc_log_handle_flush_event -ffffffff81bbfce0 T intel_guc_log_info -ffffffff81bbfdd0 T intel_guc_log_dump -ffffffff81bc1000 T intel_guc_log_debugfs_register -ffffffff81bc2000 T intel_guc_rc_init_early -ffffffff81bc2060 T intel_guc_rc_enable -ffffffff81bc2180 T intel_guc_rc_disable -ffffffff81bc3000 T intel_guc_slpc_init_early -ffffffff81bc3060 T intel_guc_slpc_init -ffffffff81bc3180 t slpc_boost_work -ffffffff81bc31d0 T intel_guc_slpc_set_max_freq -ffffffff81bc3310 T intel_guc_slpc_get_max_freq -ffffffff81bc33b0 t slpc_query_task_state -ffffffff81bc34a0 T intel_guc_slpc_set_ignore_eff_freq -ffffffff81bc36c0 T intel_guc_slpc_set_min_freq -ffffffff81bc3810 T intel_guc_slpc_get_min_freq -ffffffff81bc38b0 T intel_guc_slpc_set_media_ratio_mode -ffffffff81bc39e0 T intel_guc_pm_intrmsk_enable -ffffffff81bc3a40 T intel_guc_slpc_override_gucrc_mode -ffffffff81bc3ba0 T intel_guc_slpc_unset_gucrc_mode -ffffffff81bc3c90 T intel_guc_slpc_enable -ffffffff81bc4260 T intel_guc_slpc_set_boost_freq -ffffffff81bc4300 t slpc_force_min_freq -ffffffff81bc4430 T intel_guc_slpc_dec_waiters -ffffffff81bc4470 T intel_guc_slpc_print_info -ffffffff81bc45f0 T intel_guc_slpc_fini -ffffffff81bc5000 T intel_guc_wait_for_pending_msg -ffffffff81bc5160 T intel_guc_wait_for_idle -ffffffff81bc51b0 T intel_guc_busyness_park -ffffffff81bc52c0 T intel_guc_busyness_unpark -ffffffff81bc5370 t guc_update_pm_timestamp -ffffffff81bc5520 T intel_guc_submission_reset_prepare -ffffffff81bc5bf0 t guc_flush_destroyed_contexts -ffffffff81bc5d50 T intel_guc_submission_reset -ffffffff81bc5e60 t __guc_reset_context -ffffffff81bc6160 T intel_guc_submission_cancel_requests -ffffffff81bc6400 T intel_guc_submission_reset_finish -ffffffff81bc64e0 T intel_guc_submission_init -ffffffff81bc6660 T intel_guc_submission_fini -ffffffff81bc6700 T intel_guc_submission_setup -ffffffff81bc6b70 t guc_sched_engine_disabled -ffffffff81bc6ba0 t guc_sched_engine_destroy -ffffffff81bc6c00 t guc_bump_inflight_request_prio -ffffffff81bc6cf0 t guc_retire_inflight_request_prio -ffffffff81bc6d70 t guc_submission_tasklet -ffffffff81bc7140 t guc_sanitize -ffffffff81bc71b0 t guc_release -ffffffff81bc71e0 T intel_guc_submission_enable -ffffffff81bc76d0 T intel_guc_submission_disable -ffffffff81bc7770 T intel_guc_sched_disable_gucid_threshold_max -ffffffff81bc77b0 T intel_guc_submission_init_early -ffffffff81bc7930 t destroyed_worker_func -ffffffff81bc7c10 t reset_fail_worker_func -ffffffff81bc7d00 t guc_timestamp_ping -ffffffff81bc7e60 T intel_guc_deregister_done_process_msg -ffffffff81bc81c0 t register_context -ffffffff81bc8b90 t __guc_context_destroy -ffffffff81bc8c10 T intel_guc_sched_done_process_msg -ffffffff81bc8fe0 T intel_guc_context_reset_process_msg -ffffffff81bc93a0 T intel_guc_error_capture_process_msg -ffffffff81bc9470 T intel_guc_lookup_engine -ffffffff81bc94c0 T intel_guc_engine_failure_process_msg -ffffffff81bc9660 T intel_guc_find_hung_context -ffffffff81bc9830 T intel_guc_dump_active_requests -ffffffff81bc99c0 T intel_guc_submission_print_info -ffffffff81bc9b30 T intel_guc_submission_print_context_info -ffffffff81bc9f60 t emit_bb_start_parent_no_preempt_mid_batch -ffffffff81bca0a0 T intel_guc_virtual_engine_has_heartbeat -ffffffff81bca130 t guc_update_engine_gt_clks -ffffffff81bca2e0 t guc_virtual_get_sibling -ffffffff81bca380 t update_context_prio -ffffffff81bca570 t try_context_registration -ffffffff81bca860 t guc_wq_item_append -ffffffff81bcaaf0 t guc_add_request -ffffffff81bcad10 t clr_ctx_id_mapping -ffffffff81bcae30 t guc_context_policy_init_v70 -ffffffff81bcafb0 t guc_resume -ffffffff81bcb0b0 t guc_request_alloc -ffffffff81bcb470 t add_to_context -ffffffff81bcb570 t remove_from_context -ffffffff81bcb640 t guc_engine_reset_prepare -ffffffff81bcb6a0 t guc_rewind_nop -ffffffff81bcb6d0 t guc_reset_nop -ffffffff81bcb700 t guc_set_default_submission -ffffffff81bcb740 t guc_engine_busyness -ffffffff81bcb930 t guc_context_alloc -ffffffff81bcb950 t guc_context_revoke -ffffffff81bcbc50 t guc_context_close -ffffffff81bcbcd0 t guc_context_pre_pin -ffffffff81bcbcf0 t guc_context_pin -ffffffff81bcbdb0 t guc_context_unpin -ffffffff81bcbef0 t guc_context_post_unpin -ffffffff81bcbf00 t guc_context_cancel_request -ffffffff81bcc400 t guc_context_sched_disable -ffffffff81bcc540 t guc_context_update_stats -ffffffff81bcc650 t guc_context_destroy -ffffffff81bcc7a0 t guc_create_virtual -ffffffff81bccae0 t guc_create_parallel -ffffffff81bccda0 t __guc_context_set_preemption_timeout -ffffffff81bccef0 t __delay_sched_disable -ffffffff81bccfb0 t do_sched_disable -ffffffff81bcd100 t unpin_guc_id -ffffffff81bcd1d0 t __release_guc_id -ffffffff81bcd3d0 t virtual_guc_bump_serial -ffffffff81bcd460 t guc_submit_request -ffffffff81bcd670 t guc_virtual_context_alloc -ffffffff81bcd6c0 t guc_virtual_context_pre_pin -ffffffff81bcd720 t guc_virtual_context_pin -ffffffff81bcd860 t guc_virtual_context_unpin -ffffffff81bcd9b0 t guc_virtual_context_enter -ffffffff81bcda70 t guc_virtual_context_exit -ffffffff81bcdb30 t emit_fini_breadcrumb_parent_no_preempt_mid_batch -ffffffff81bcdcc0 t emit_bb_start_child_no_preempt_mid_batch -ffffffff81bcdde0 t emit_fini_breadcrumb_child_no_preempt_mid_batch -ffffffff81bcdf50 t guc_parent_context_pin -ffffffff81bce020 t guc_parent_context_unpin -ffffffff81bce0e0 t pin_guc_id -ffffffff81bce4a0 t guc_child_context_pin -ffffffff81bce530 t guc_child_context_unpin -ffffffff81bce540 t guc_child_context_post_unpin -ffffffff81bce5e0 t guc_child_context_destroy -ffffffff81bce660 t guc_context_init -ffffffff81bce710 t submit_work_cb -ffffffff81bce730 t cs_irq_handler -ffffffff81bce780 t guc_irq_enable_breadcrumbs -ffffffff81bce840 t guc_irq_disable_breadcrumbs -ffffffff81bce8e0 t __delayed_work_tick -ffffffff81bcf000 T intel_huc_register_gsc_notifier -ffffffff81bcf040 t gsc_notifier -ffffffff81bcf090 T intel_huc_unregister_gsc_notifier -ffffffff81bcf100 T intel_huc_sanitize -ffffffff81bcf170 T intel_huc_init_early -ffffffff81bcf2c0 T intel_huc_init -ffffffff81bcf4e0 T intel_huc_fini -ffffffff81bcf560 T intel_huc_suspend -ffffffff81bcf5d0 T intel_huc_wait_for_auth_complete -ffffffff81bcf6f0 T intel_huc_auth -ffffffff81bcf8b0 T intel_huc_is_authenticated -ffffffff81bcf960 T intel_huc_check_status -ffffffff81bcfa50 t huc_is_fully_authenticated -ffffffff81bcfb70 T intel_huc_update_auth_status -ffffffff81bcfc80 T intel_huc_load_status -ffffffff81bcfd60 t sw_fence_dummy_notify -ffffffff81bcfd90 t huc_delayed_load_timer_callback -ffffffff81bd0000 T intel_huc_debugfs_register -ffffffff81bd1000 T intel_huc_fw_auth_via_gsccs -ffffffff81bd1420 T intel_huc_fw_get_binary_info -ffffffff81bd1710 T intel_huc_fw_load_and_auth_via_gsc -ffffffff81bd17b0 T intel_huc_fw_upload -ffffffff81bd2000 T intel_uc_init_early -ffffffff81bd2170 T intel_uc_init_late -ffffffff81bd21a0 T intel_uc_driver_late_release -ffffffff81bd21d0 T intel_uc_init_mmio -ffffffff81bd21f0 T intel_uc_driver_remove -ffffffff81bd2280 T intel_uc_reset_prepare -ffffffff81bd2300 t __uc_sanitize -ffffffff81bd2430 T intel_uc_reset -ffffffff81bd2480 T intel_uc_reset_finish -ffffffff81bd24d0 T intel_uc_cancel_requests -ffffffff81bd2520 T intel_uc_runtime_suspend -ffffffff81bd2680 T intel_uc_suspend -ffffffff81bd2740 T intel_uc_resume -ffffffff81bd27e0 T intel_uc_runtime_resume -ffffffff81bd28b0 t guc_enable_communication -ffffffff81bd2a00 t __uc_fini -ffffffff81bd2a40 t __uc_check_hw -ffffffff81bd2af0 t __uc_fetch_firmwares -ffffffff81bd2bf0 t __uc_cleanup_firmwares -ffffffff81bd2c30 t __uc_init -ffffffff81bd2cb0 t __uc_init_hw -ffffffff81bd3320 t __uc_fini_hw -ffffffff81bd3380 t __uc_resume_mappings -ffffffff81bd4000 T intel_uc_debugfs_register -ffffffff81bd5000 T intel_uc_fw_version_from_gsc_manifest -ffffffff81bd5050 T intel_uc_fw_init_early -ffffffff81bd5560 t __uc_fw_auto_select -ffffffff81bd5690 T intel_uc_check_file_version -ffffffff81bd58c0 T intel_uc_fw_fetch -ffffffff81bd5db0 t try_firmware_load -ffffffff81bd5f30 t release_firmware -ffffffff81bd5f70 T intel_uc_fw_mark_load_failed -ffffffff81bd6040 T intel_uc_fw_upload -ffffffff81bd63b0 T intel_uc_fw_init -ffffffff81bd65c0 t uc_fw_bind_ggtt -ffffffff81bd66e0 T intel_uc_fw_fini -ffffffff81bd6790 T intel_uc_fw_resume_mapping -ffffffff81bd67d0 T intel_uc_fw_cleanup_fetch -ffffffff81bd6840 T intel_uc_fw_copy_rsa -ffffffff81bd6b50 T intel_uc_fw_dump -ffffffff81bd6cc0 t __check_ccs_header -ffffffff81bd7000 T __i915_active_init -ffffffff81bd70a0 t excl_retire -ffffffff81bd7130 t active_work -ffffffff81bd7190 T i915_active_add_request -ffffffff81bd7310 T i915_active_acquire -ffffffff81bd73f0 t active_instance -ffffffff81bd7560 T __i915_active_fence_set -ffffffff81bd7660 T i915_active_release -ffffffff81bd76e0 T i915_active_set_exclusive -ffffffff81bd77b0 T i915_active_acquire_if_busy -ffffffff81bd7800 T i915_active_acquire_for_context -ffffffff81bd7860 T __i915_active_wait -ffffffff81bd7a90 t flush_lazy_signals -ffffffff81bd7bc0 T i915_request_await_active -ffffffff81bd7bf0 t await_active -ffffffff81bd7ea0 t rq_await_fence -ffffffff81bd7eb0 T i915_sw_fence_await_active -ffffffff81bd7ee0 t sw_await_fence -ffffffff81bd7f00 T i915_active_fini -ffffffff81bd7f40 T i915_active_acquire_preallocate_barrier -ffffffff81bd8310 t node_retire -ffffffff81bd83a0 T i915_active_acquire_barrier -ffffffff81bd8500 T i915_request_add_active_barriers -ffffffff81bd85b0 T i915_active_fence_set -ffffffff81bd8620 T i915_active_noop -ffffffff81bd8660 T i915_active_get -ffffffff81bd8690 T i915_active_put -ffffffff81bd8700 T i915_active_create -ffffffff81bd87f0 t auto_active -ffffffff81bd8820 t auto_retire -ffffffff81bd8890 T i915_active_module_exit -ffffffff81bd88b0 T i915_active_module_init -ffffffff81bd8910 t __active_retire -ffffffff81bd8b00 t barrier_wake -ffffffff81bd9000 T intel_engine_init_cmd_parser -ffffffff81bd96f0 t gen7_render_get_cmd_length_mask -ffffffff81bd9780 t gen7_bsd_get_cmd_length_mask -ffffffff81bd9820 t gen7_blt_get_cmd_length_mask -ffffffff81bd9890 t gen9_blt_get_cmd_length_mask -ffffffff81bd9900 T intel_engine_cleanup_cmd_parser -ffffffff81bd99d0 T intel_engine_cmd_parser -ffffffff81bda580 T i915_cmd_parser_get_version -ffffffff81bdb000 T i915_fence_context_timeout -ffffffff81bdc000 T i915_deps_init -ffffffff81bdc060 T i915_deps_fini -ffffffff81bdc0f0 T i915_deps_sync -ffffffff81bdc1a0 T i915_deps_add_dependency -ffffffff81bdc3f0 T i915_deps_add_resv -ffffffff81bdd000 T i915_print_iommu_status -ffffffff81bdd050 T i915_driver_probe -ffffffff81bdd910 t i915_driver_register -ffffffff81bdda00 T inteldrm_init_backlight -ffffffff81bdda70 t i915_welcome_messages -ffffffff81bddbf0 T i915_driver_remove -ffffffff81bddcd0 T i915_driver_shutdown -ffffffff81bdde70 T i915_driver_resume_switcheroo -ffffffff81bdded0 t i915_drm_resume_early -ffffffff81bddfc0 t i915_drm_resume -ffffffff81bde200 T intagpsubmatch -ffffffff81bde250 T intagp_print -ffffffff81bde2a0 T inteldrm_wsioctl -ffffffff81bde480 T inteldrm_wsmmap -ffffffff81bde4b0 T inteldrm_alloc_screen -ffffffff81bde4e0 T inteldrm_free_screen -ffffffff81bde500 T inteldrm_show_screen -ffffffff81bde5d0 T inteldrm_load_font -ffffffff81bde5f0 T inteldrm_list_font -ffffffff81bde610 T inteldrm_scrollback -ffffffff81bde630 T inteldrm_getchar -ffffffff81bde650 T inteldrm_burner -ffffffff81bde6e0 T inteldrm_enter_ddb -ffffffff81bde740 T inteldrm_doswitch -ffffffff81bde7c0 T inteldrm_burner_cb -ffffffff81bde7f0 T inteldrm_backlight_update_status -ffffffff81bde850 T inteldrm_backlight_get_brightness -ffffffff81bde8a0 T inteldrm_match -ffffffff81bde930 T inteldrm_attach -ffffffff81bded40 T inteldrm_detach -ffffffff81bded70 T inteldrm_activate -ffffffff81bdf080 T inteldrm_intr -ffffffff81bdf0c0 T inteldrm_attachhook -ffffffff81bdf320 T inteldrm_forcedetach -ffffffff81bdf360 T inteldrm_native_backlight -ffffffff81bdf490 T inteldrm_firmware_backlight -ffffffff81bdf610 t i915_pcode_init -ffffffff81bdf6d0 t i915_driver_open -ffffffff81bdf6f0 t i915_driver_postclose -ffffffff81bdf750 t i915_driver_lastclose -ffffffff81bdf770 t i915_driver_release -ffffffff81bdf880 t i915_gem_reject_pin_ioctl -ffffffff81be0000 T i915_drm_client_alloc -ffffffff81be0070 T __i915_drm_client_free -ffffffff81be1000 T i915_gem_get_aperture_ioctl -ffffffff81be10d0 T i915_gem_object_unbind -ffffffff81be1340 T i915_gem_pread_ioctl -ffffffff81be14d0 t i915_gem_shmem_pread -ffffffff81be18f0 t i915_gem_gtt_pread -ffffffff81be1b90 T i915_gem_pwrite_ioctl -ffffffff81be1d60 t i915_gem_gtt_pwrite_fast -ffffffff81be2060 t i915_gem_shmem_pwrite -ffffffff81be24f0 T i915_gem_sw_finish_ioctl -ffffffff81be2580 T i915_gem_runtime_suspend -ffffffff81be2680 T i915_gem_object_ggtt_pin_ww -ffffffff81be2920 T i915_gem_object_ggtt_pin -ffffffff81be2a30 t i915_gem_object_lock -ffffffff81be2c50 T i915_gem_madvise_ioctl -ffffffff81be3060 T i915_gem_drain_freed_objects -ffffffff81be30d0 T i915_gem_drain_workqueue -ffffffff81be31b0 T i915_gem_init -ffffffff81be3450 T i915_gem_driver_register -ffffffff81be3460 T i915_gem_driver_unregister -ffffffff81be3470 T i915_gem_driver_remove -ffffffff81be34d0 T i915_gem_driver_release -ffffffff81be35c0 T i915_gem_init_early -ffffffff81be3640 T i915_gem_cleanup_early -ffffffff81be36c0 T i915_gem_open -ffffffff81be37d0 t i915_gem_gtt_prepare -ffffffff81be4000 T i915_gem_evict_something -ffffffff81be4440 t ungrab_vma -ffffffff81be4570 t grab_vma -ffffffff81be4690 T i915_gem_evict_for_node -ffffffff81be48d0 T i915_gem_evict_vm -ffffffff81be5000 T i915_gem_gtt_prepare_pages -ffffffff81be5030 T i915_gem_gtt_finish_pages -ffffffff81be5090 T i915_gem_gtt_reserve -ffffffff81be5140 T i915_gem_gtt_insert -ffffffff81be6000 T i915_gem_ww_ctx_init -ffffffff81be6060 T i915_gem_ww_unlock_single -ffffffff81be61a0 T i915_gem_ww_ctx_fini -ffffffff81be6210 t i915_gem_ww_ctx_unlock_all -ffffffff81be6370 T i915_gem_ww_ctx_backoff -ffffffff81be7000 T i915_getparam_ioctl -ffffffff81be8000 T intel_gpu_error_find_batch -ffffffff81be8070 T i915_error_printf -ffffffff81be8130 T intel_gpu_error_print_vma -ffffffff81be8160 T i915_gpu_coredump_copy_to_buffer -ffffffff81be81b0 T __i915_gpu_coredump_free -ffffffff81be8340 T intel_engine_coredump_alloc -ffffffff81be8b80 T intel_engine_coredump_add_request -ffffffff81be8e20 T intel_engine_coredump_add_vma -ffffffff81be8f40 T i915_gpu_coredump_alloc -ffffffff81be91c0 T intel_gt_coredump_alloc -ffffffff81be9a90 T i915_vma_capture_prepare -ffffffff81be9b00 T i915_vma_capture_finish -ffffffff81be9b60 T i915_gpu_coredump -ffffffff81be9ca0 T i915_error_state_store -ffffffff81be9e40 T i915_capture_error_state -ffffffff81be9ed0 T i915_first_error_state -ffffffff81be9f40 T i915_reset_error_state -ffffffff81be9fe0 T i915_disable_error_state -ffffffff81bea030 t capture_vma -ffffffff81beb000 T i915_reg_read_ioctl -ffffffff81bec000 T gen3_irq_reset -ffffffff81bec0d0 T gen3_assert_iir_is_zero -ffffffff81bec1d0 T gen3_irq_init -ffffffff81bec310 T intel_irq_init -ffffffff81bec3a0 t ivb_parity_work -ffffffff81bec740 T intel_irq_fini -ffffffff81bec780 T intel_irq_install -ffffffff81bec890 t intel_irq_reset -ffffffff81bed260 t intel_irq_postinstall -ffffffff81bed830 T intel_irq_uninstall -ffffffff81bed8a0 T intel_runtime_pm_disable_interrupts -ffffffff81bed8d0 T intel_synchronize_irq -ffffffff81bed8f0 T intel_runtime_pm_enable_interrupts -ffffffff81bed920 T intel_irqs_enabled -ffffffff81bed950 T intel_synchronize_hardirq -ffffffff81bed970 t kasprintf -ffffffff81beda40 t ibx_irq_reset -ffffffff81bedb80 t cherryview_irq_handler -ffffffff81bedd80 t valleyview_irq_handler -ffffffff81bedff0 t i965_irq_handler -ffffffff81bee2c0 t i915_irq_handler -ffffffff81bee560 t i8xx_irq_handler -ffffffff81bee7c0 t dg1_irq_handler -ffffffff81bee910 t gen11_irq_handler -ffffffff81bee9e0 t gen8_irq_handler -ffffffff81beeac0 t ilk_irq_handler -ffffffff81bef000 T i915_memcpy_from_wc -ffffffff81bef120 T i915_unaligned_memcpy_from_wc -ffffffff81bef240 T i915_memcpy_init_early -ffffffff81bf0000 T i915_mitigate_clear_residuals -ffffffff81bf1000 T i915_init -ffffffff81bf1220 t i915_check_nomodeset -ffffffff81bf1280 t i915_mock_selftests -ffffffff81bf12b0 t i915_pmu_init -ffffffff81bf12e0 t i915_pmu_exit -ffffffff81bf2000 T i915_params_dump -ffffffff81bf2670 T i915_params_copy -ffffffff81bf2870 T i915_params_free -ffffffff81bf3000 T i915_pci_register_driver -ffffffff81bf3030 T i915_pci_unregister_driver -ffffffff81bf4000 T i915_oa_config_release -ffffffff81bf4060 T i915_perf_get_oa_config -ffffffff81bf40c0 T i915_perf_oa_timestamp_frequency -ffffffff81bf41a0 T i915_oa_init_reg_state -ffffffff81bf4290 T i915_perf_open_ioctl -ffffffff81bf4ae0 T i915_perf_register -ffffffff81bf4b10 T i915_perf_unregister -ffffffff81bf4b80 T i915_perf_add_config_ioctl -ffffffff81bf4bd0 T i915_perf_remove_config_ioctl -ffffffff81bf4c40 T i915_perf_init -ffffffff81bf5320 t gen7_is_valid_b_counter_addr -ffffffff81bf5370 t hsw_is_valid_mux_addr -ffffffff81bf53f0 t hsw_enable_metric_set -ffffffff81bf54b0 t hsw_disable_metric_set -ffffffff81bf5580 t gen7_oa_enable -ffffffff81bf56f0 t gen7_oa_disable -ffffffff81bf57b0 t gen7_oa_read -ffffffff81bf5c20 t gen7_oa_hw_tail_read -ffffffff81bf5c70 t gen8_oa_read -ffffffff81bf62a0 t gen8_is_valid_mux_addr -ffffffff81bf6320 t gen8_is_valid_flex_addr -ffffffff81bf63a0 t chv_is_valid_mux_addr -ffffffff81bf6420 t gen8_oa_enable -ffffffff81bf6560 t gen8_oa_disable -ffffffff81bf6620 t gen8_enable_metric_set -ffffffff81bf66e0 t gen8_disable_metric_set -ffffffff81bf6740 t gen8_oa_hw_tail_read -ffffffff81bf6790 t gen11_is_valid_mux_addr -ffffffff81bf6850 t gen11_disable_metric_set -ffffffff81bf68b0 t xehp_is_valid_b_counter_addr -ffffffff81bf6980 t gen12_is_valid_b_counter_addr -ffffffff81bf69d0 t gen12_is_valid_mux_addr -ffffffff81bf6a70 t gen12_oa_enable -ffffffff81bf6c10 t gen12_oa_disable -ffffffff81bf6d70 t gen12_enable_metric_set -ffffffff81bf6f60 t gen12_disable_metric_set -ffffffff81bf70b0 t gen12_oa_hw_tail_read -ffffffff81bf7110 T i915_perf_sysctl_register -ffffffff81bf7140 T i915_perf_sysctl_unregister -ffffffff81bf7170 T i915_perf_fini -ffffffff81bf7290 t destroy_config -ffffffff81bf7320 T i915_perf_ioctl_version -ffffffff81bf7420 t get_sseu_config -ffffffff81bf7470 t emit_oa_config -ffffffff81bf7b40 t i915_gem_object_lock -ffffffff81bf7d60 t append_oa_status -ffffffff81bf7de0 t append_oa_sample -ffffffff81bf7f40 t lrc_configure_all_contexts -ffffffff81bf80f0 t oa_configure_all_contexts -ffffffff81bf8410 t gen8_modify_self -ffffffff81bf85e0 t gen8_modify_context -ffffffff81bf8790 t gen12_configure_oar_context -ffffffff81bf9000 T i915_query_ioctl -ffffffff81bf9100 t query_topology_info -ffffffff81bf9150 t query_engine_info -ffffffff81bf9390 t query_perf_config -ffffffff81bf9690 t query_memregion_info -ffffffff81bf9920 t query_hwconfig_blob -ffffffff81bf99a0 t query_geometry_subslices -ffffffff81bf9a30 t fill_topology_info -ffffffff81bf9bd0 t query_perf_config_data -ffffffff81bf9f30 t copy_perf_config_registers_or_number -ffffffff81bfb000 T i915_request_slab_cache -ffffffff81bfb030 t i915_fence_get_driver_name -ffffffff81bfb060 t i915_fence_get_timeline_name -ffffffff81bfb0c0 t i915_fence_enable_signaling -ffffffff81bfb0d0 t i915_fence_signaled -ffffffff81bfb120 t i915_fence_wait -ffffffff81bfb140 t i915_fence_release -ffffffff81bfb230 T i915_request_notify_execute_cb_imm -ffffffff81bfb2a0 T i915_request_active_engine -ffffffff81bfb380 T i915_request_free_capture_list -ffffffff81bfb3f0 T i915_request_retire -ffffffff81bfb5d0 T i915_request_retire_upto -ffffffff81bfb640 T __i915_request_skip -ffffffff81bfb6e0 T i915_request_set_error_once -ffffffff81bfb750 T i915_request_mark_eio -ffffffff81bfb7e0 T __i915_request_submit -ffffffff81bfb9d0 T i915_request_submit -ffffffff81bfba20 T __i915_request_unsubmit -ffffffff81bfba90 T i915_request_unsubmit -ffffffff81bfbb10 T i915_request_cancel -ffffffff81bfbb90 T __i915_request_create -ffffffff81bfbea0 t request_alloc_slow -ffffffff81bfbff0 T i915_request_create -ffffffff81bfc160 T i915_request_await_execution -ffffffff81bfc270 t __i915_request_await_execution -ffffffff81bfc3a0 t i915_request_await_external -ffffffff81bfc4e0 T i915_request_await_dma_fence -ffffffff81bfc860 T i915_request_await_deps -ffffffff81bfc8d0 T i915_request_await_object -ffffffff81bfc980 T __i915_request_commit -ffffffff81bfcc40 T __i915_request_queue_bh -ffffffff81bfcc80 T __i915_request_queue -ffffffff81bfcce0 T i915_request_add -ffffffff81bfcd90 T i915_request_wait_timeout -ffffffff81bfd0d0 t request_wait_wake -ffffffff81bfd0f0 T i915_request_wait -ffffffff81bfd150 T i915_request_show -ffffffff81bfd380 T i915_test_request_state -ffffffff81bfd4d0 T i915_request_module_exit -ffffffff81bfd500 T i915_request_module_init -ffffffff81bfd590 t submit_notify -ffffffff81bfd680 t semaphore_notify -ffffffff81bfd6d0 t __rq_watchdog_expired -ffffffff81bfd780 t __await_execution -ffffffff81bfd900 t i915_request_await_start -ffffffff81bfda30 t __emit_semaphore_wait -ffffffff81bfdaf0 t irq_execute_cb -ffffffff81bfe000 T i915_sg_trim -ffffffff81bfe120 T i915_refct_sgt_init -ffffffff81bfe160 T i915_rsgt_from_mm_node -ffffffff81bfe360 T i915_rsgt_from_buddy_resource -ffffffff81bfe5b0 t i915_refct_sgt_release -ffffffff81bff000 T i915_sched_lookup_priolist -ffffffff81bff120 T __i915_priolist_free -ffffffff81bff140 T i915_schedule -ffffffff81bff610 T i915_sched_node_init -ffffffff81bff670 T i915_sched_node_reinit -ffffffff81bff6b0 T __i915_sched_node_add_dependency -ffffffff81bff7c0 T i915_sched_node_add_dependency -ffffffff81bff900 T i915_sched_node_fini -ffffffff81bff9e0 T i915_request_show_with_schedule -ffffffff81bffad0 T i915_sched_engine_create -ffffffff81bffb80 t default_destroy -ffffffff81bffbd0 t default_disabled -ffffffff81bffc00 T i915_scheduler_module_exit -ffffffff81bffc30 T i915_scheduler_module_init -ffffffff81c00000 T i915_save_display -ffffffff81c00390 T i915_restore_display -ffffffff81c01000 T i915_sw_fence_complete -ffffffff81c01040 t __i915_sw_fence_complete -ffffffff81c011c0 T i915_sw_fence_await -ffffffff81c01240 T __i915_sw_fence_init -ffffffff81c012b0 T i915_sw_fence_reinit -ffffffff81c012f0 T i915_sw_fence_commit -ffffffff81c01330 T i915_sw_fence_await_sw_fence -ffffffff81c01350 t __i915_sw_fence_await_sw_fence -ffffffff81c01570 T i915_sw_fence_await_sw_fence_gfp -ffffffff81c01590 T i915_sw_fence_await_dma_fence -ffffffff81c017c0 t dma_i915_sw_fence_wake -ffffffff81c01840 t irq_i915_sw_fence_work -ffffffff81c01880 t timer_i915_sw_fence_wake -ffffffff81c01960 t dma_i915_sw_fence_wake_timer -ffffffff81c019f0 T __i915_sw_fence_await_dma_fence -ffffffff81c01b30 t __dma_i915_sw_fence_wake -ffffffff81c01b90 T i915_sw_fence_await_reservation -ffffffff81c01c70 t i915_sw_fence_wake -ffffffff81c02000 T dma_fence_work_init -ffffffff81c02080 t fence_notify -ffffffff81c02170 t fence_work -ffffffff81c021d0 T dma_fence_work_chain -ffffffff81c02220 t get_driver_name -ffffffff81c02250 t get_timeline_name -ffffffff81c02290 t fence_release -ffffffff81c03000 T i915_switcheroo_register -ffffffff81c03030 T i915_switcheroo_unregister -ffffffff81c04000 T i915_syncmap_init -ffffffff81c04030 T i915_syncmap_is_later -ffffffff81c04130 T i915_syncmap_set -ffffffff81c041e0 t __sync_set -ffffffff81c044d0 T i915_syncmap_free -ffffffff81c04530 t __sync_free -ffffffff81c05000 T i915_setup_sysfs -ffffffff81c05030 T i915_teardown_sysfs -ffffffff81c06000 T i915_ttm_buddy_man_init -ffffffff81c06210 T i915_ttm_buddy_man_fini -ffffffff81c06400 T i915_ttm_buddy_man_reserve -ffffffff81c064d0 T i915_ttm_buddy_man_visible_size -ffffffff81c06500 T i915_ttm_buddy_man_avail -ffffffff81c06560 t i915_ttm_buddy_man_alloc -ffffffff81c06880 t i915_ttm_buddy_man_free -ffffffff81c068f0 t i915_ttm_buddy_man_intersects -ffffffff81c069a0 t i915_ttm_buddy_man_compatible -ffffffff81c06a50 t i915_ttm_buddy_man_debug -ffffffff81c07000 T i915_user_extensions -ffffffff81c08000 T __i915_printk -ffffffff81c080e0 T add_taint_for_CI -ffffffff81c08110 T cancel_timer -ffffffff81c08160 T set_timer_ms -ffffffff81c08210 T i915_vtd_active -ffffffff81c09000 T intel_vgpu_detect -ffffffff81c09030 T intel_vgpu_register -ffffffff81c09090 T intel_vgpu_active -ffffffff81c090c0 T intel_vgpu_has_full_ppgtt -ffffffff81c09100 T intel_vgpu_has_hwsp_emulation -ffffffff81c09140 T intel_vgpu_has_huge_gtt -ffffffff81c09180 T intel_vgt_deballoon -ffffffff81c093c0 T intel_vgt_balloon -ffffffff81c0a000 T i915_vma_instance -ffffffff81c0a110 t vma_create -ffffffff81c0a5a0 T i915_vma_work -ffffffff81c0a610 T i915_vma_wait_for_bind -ffffffff81c0a690 T i915_vma_bind -ffffffff81c0a9f0 T i915_vma_pin_iomap -ffffffff81c0ab90 T i915_vma_flush_writes -ffffffff81c0abe0 T i915_vma_unpin_iomap -ffffffff81c0ac50 T i915_vma_unpin_and_release -ffffffff81c0acc0 T i915_vma_misplaced -ffffffff81c0adb0 T __i915_vma_set_map_and_fenceable -ffffffff81c0ae40 T i915_gem_valid_gtt_space -ffffffff81c0aed0 T vma_invalidate_tlb -ffffffff81c0af40 T i915_vma_pin_ww -ffffffff81c0b5f0 t i915_vma_insert -ffffffff81c0b990 T i915_ggtt_pin -ffffffff81c0ba70 t __i915_ggtt_pin -ffffffff81c0bbf0 t i915_gem_object_lock -ffffffff81c0be10 T i915_ggtt_clear_scanout -ffffffff81c0be90 T i915_vma_close -ffffffff81c0bf60 T i915_vma_reopen -ffffffff81c0bfe0 T i915_vma_destroy_locked -ffffffff81c0c0d0 t release_references -ffffffff81c0c210 T i915_vma_destroy -ffffffff81c0c350 T i915_vma_parked -ffffffff81c0c630 T i915_vma_revoke_mmap -ffffffff81c0c730 T _i915_vma_move_to_active -ffffffff81c0c980 T __i915_vma_evict -ffffffff81c0cce0 T __i915_vma_unbind -ffffffff81c0cd80 T i915_vma_unbind -ffffffff81c0ced0 T i915_vma_unbind_async -ffffffff81c0d040 t __i915_vma_unbind_async -ffffffff81c0d100 T i915_vma_unbind_unlocked -ffffffff81c0d210 T i915_vma_make_unshrinkable -ffffffff81c0d250 T i915_vma_make_shrinkable -ffffffff81c0d270 T i915_vma_make_purgeable -ffffffff81c0d290 T i915_vma_module_exit -ffffffff81c0d2b0 T i915_vma_module_init -ffffffff81c0d310 t __i915_vma_active -ffffffff81c0d3b0 t __i915_vma_retire -ffffffff81c0d450 t __vma_bind -ffffffff81c0d4f0 t __vma_release -ffffffff81c0d570 t intel_rotate_pages -ffffffff81c0d8d0 t intel_remap_pages -ffffffff81c0dd20 t intel_partial_pages -ffffffff81c0e000 T i915_vma_resource_alloc -ffffffff81c0e050 T i915_vma_resource_free -ffffffff81c0e090 T i915_vma_resource_unhold -ffffffff81c0e0a0 t __i915_vma_resource_unhold -ffffffff81c0e190 T i915_vma_resource_hold -ffffffff81c0e1e0 T i915_vma_resource_unbind -ffffffff81c0e300 T __i915_vma_resource_init -ffffffff81c0e360 t i915_vma_resource_fence_notify -ffffffff81c0e420 T i915_vma_resource_bind_dep_sync -ffffffff81c0e5c0 T i915_vma_resource_bind_dep_sync_all -ffffffff81c0e660 T i915_vma_resource_bind_dep_await -ffffffff81c0e840 T i915_vma_resource_module_exit -ffffffff81c0e860 T i915_vma_resource_module_init -ffffffff81c0e8c0 t get_driver_name -ffffffff81c0e8f0 t get_timeline_name -ffffffff81c0e920 t unbind_fence_release -ffffffff81c0e960 t i915_vma_resource_unbind_work -ffffffff81c0f000 T intel_clock_gating_init -ffffffff81c0f020 T intel_clock_gating_hooks_init -ffffffff81c0f280 t nop_init_clock_gating -ffffffff81c0f2b0 t pvc_init_clock_gating -ffffffff81c0f430 t dg2_init_clock_gating -ffffffff81c0f490 t xehpsdv_init_clock_gating -ffffffff81c0f570 t adlp_init_clock_gating -ffffffff81c0f670 t gen12lp_init_clock_gating -ffffffff81c0f730 t icl_init_clock_gating -ffffffff81c0f7b0 t cfl_init_clock_gating -ffffffff81c0f8d0 t gen9_init_clock_gating -ffffffff81c0f9e0 t skl_init_clock_gating -ffffffff81c0fb20 t kbl_init_clock_gating -ffffffff81c0fd30 t bxt_init_clock_gating -ffffffff81c0fe90 t glk_init_clock_gating -ffffffff81c0fef0 t bdw_init_clock_gating -ffffffff81c10320 t chv_init_clock_gating -ffffffff81c104b0 t hsw_init_clock_gating -ffffffff81c10770 t ivb_init_clock_gating -ffffffff81c10980 t g4x_disable_trickle_feed -ffffffff81c10ad0 t cpt_init_clock_gating -ffffffff81c10e10 t vlv_init_clock_gating -ffffffff81c10f20 t gen6_init_clock_gating -ffffffff81c11120 t ilk_init_clock_gating -ffffffff81c11300 t g4x_init_clock_gating -ffffffff81c113c0 t i965gm_init_clock_gating -ffffffff81c11490 t i965g_init_clock_gating -ffffffff81c11510 t gen3_init_clock_gating -ffffffff81c11610 t i85x_init_clock_gating -ffffffff81c116b0 t i830_init_clock_gating -ffffffff81c12000 T intel_platform_name -ffffffff81c12090 T intel_device_info_print -ffffffff81c12a20 T intel_device_info_runtime_init_early -ffffffff81c13010 T intel_device_info_runtime_init -ffffffff81c130d0 T intel_device_info_driver_create -ffffffff81c131e0 T intel_driver_caps_print -ffffffff81c14000 T intel_memory_region_lookup -ffffffff81c140e0 T intel_memory_region_by_type -ffffffff81c141a0 T intel_memory_region_reserve -ffffffff81c141c0 T intel_memory_region_debug -ffffffff81c14220 T intel_memory_region_create -ffffffff81c143a0 T intel_memory_region_set_name -ffffffff81c14420 T intel_memory_region_avail -ffffffff81c144a0 T intel_memory_region_destroy -ffffffff81c14510 T intel_memory_regions_hw_probe -ffffffff81c14660 T intel_memory_regions_driver_release -ffffffff81c15000 T snb_pcode_read -ffffffff81c150d0 t __snb_pcode_rw -ffffffff81c15260 T snb_pcode_write_timeout -ffffffff81c15330 T skl_pcode_request -ffffffff81c15670 T intel_pcode_init -ffffffff81c157b0 T snb_pcode_read_p -ffffffff81c158c0 T snb_pcode_write_p -ffffffff81c16000 T intel_region_ttm_device_init -ffffffff81c16070 T intel_region_ttm_device_fini -ffffffff81c16090 T intel_region_to_ttm_type -ffffffff81c160d0 T intel_region_ttm_init -ffffffff81c16170 T intel_region_ttm_fini -ffffffff81c163d0 T intel_region_ttm_resource_to_rsgt -ffffffff81c16410 T intel_region_ttm_resource_free -ffffffff81c17000 T intel_runtime_pm_get_raw -ffffffff81c17090 T intel_runtime_pm_get -ffffffff81c17140 T intel_runtime_pm_get_if_in_use -ffffffff81c171f0 T intel_runtime_pm_get_if_active -ffffffff81c172a0 T intel_runtime_pm_get_noresume -ffffffff81c173d0 T intel_runtime_pm_put_raw -ffffffff81c17460 T intel_runtime_pm_put_unchecked -ffffffff81c17520 T intel_runtime_pm_enable -ffffffff81c17550 T intel_runtime_pm_disable -ffffffff81c17580 T intel_runtime_pm_driver_release -ffffffff81c17610 T intel_runtime_pm_init_early -ffffffff81c18000 T intel_sbi_read -ffffffff81c18050 t intel_sbi_rw -ffffffff81c18240 T intel_sbi_write -ffffffff81c19000 T intel_step_init -ffffffff81c194d0 T intel_step_name -ffffffff81c19510 t pvc_step_lookup -ffffffff81c1a000 T gen3_stolen_base -ffffffff81c1a050 T gen11_stolen_base -ffffffff81c1a0d0 T i830_stolen_size -ffffffff81c1a150 T gen3_stolen_size -ffffffff81c1a1c0 T gen6_stolen_size -ffffffff81c1a210 T chv_stolen_size -ffffffff81c1a280 T gen8_stolen_size -ffffffff81c1a2e0 T gen9_stolen_size -ffffffff81c1a360 T intel_init_stolen_res -ffffffff81c1b000 T intel_uncore_mmio_debug_init_early -ffffffff81c1b060 T intel_uncore_forcewake_domain_to_str -ffffffff81c1b0d0 T intel_uncore_fw_release_timer -ffffffff81c1b1f0 t fw_domains_put -ffffffff81c1b280 T intel_uncore_suspend -ffffffff81c1b2d0 t intel_uncore_forcewake_reset -ffffffff81c1b5a0 T intel_uncore_resume_early -ffffffff81c1b6d0 T intel_uncore_unclaimed_mmio -ffffffff81c1b740 T intel_uncore_runtime_resume -ffffffff81c1b770 T intel_uncore_forcewake_get -ffffffff81c1b8e0 T intel_uncore_forcewake_user_get -ffffffff81c1ba00 T intel_uncore_forcewake_get__locked -ffffffff81c1bad0 T intel_uncore_forcewake_user_put -ffffffff81c1bc10 T intel_uncore_forcewake_put__locked -ffffffff81c1bd10 T intel_uncore_forcewake_put -ffffffff81c1be30 T intel_uncore_forcewake_put_delayed -ffffffff81c1bf80 T intel_uncore_forcewake_flush -ffffffff81c1c030 T assert_forcewakes_inactive -ffffffff81c1c0a0 T assert_forcewakes_active -ffffffff81c1c0d0 T intel_uncore_setup_mmio -ffffffff81c1c100 t uncore_unmap_mmio -ffffffff81c1c130 T intel_uncore_init_early -ffffffff81c1c1a0 T intel_uncore_init_mmio -ffffffff81c1d5e0 T intel_uncore_prune_engine_fw_domains -ffffffff81c1d7c0 t fw_domain_fini -ffffffff81c1d8c0 T intel_uncore_fini_mmio -ffffffff81c1dae0 T __intel_wait_for_register_fw -ffffffff81c1dda0 T __intel_wait_for_register -ffffffff81c1e140 T intel_uncore_forcewake_for_reg -ffffffff81c1e250 t check_for_unclaimed_mmio -ffffffff81c1e3b0 T intel_uncore_arm_unclaimed_mmio_detection -ffffffff81c1e4c0 t vgpu_write8 -ffffffff81c1e500 t vgpu_write16 -ffffffff81c1e540 t vgpu_write32 -ffffffff81c1e580 t vgpu_read8 -ffffffff81c1e5c0 t vgpu_read16 -ffffffff81c1e600 t vgpu_read32 -ffffffff81c1e640 t vgpu_read64 -ffffffff81c1e680 t gen5_write8 -ffffffff81c1e780 t gen5_write16 -ffffffff81c1e880 t gen5_write32 -ffffffff81c1e980 t gen5_read8 -ffffffff81c1ea70 t gen5_read16 -ffffffff81c1eb60 t gen5_read32 -ffffffff81c1ec50 t gen5_read64 -ffffffff81c1ed40 t gen2_write8 -ffffffff81c1ee20 t gen2_write16 -ffffffff81c1ef00 t gen2_write32 -ffffffff81c1efe0 t gen2_read8 -ffffffff81c1f0b0 t gen2_read16 -ffffffff81c1f180 t gen2_read32 -ffffffff81c1f250 t gen2_read64 -ffffffff81c1f320 t fwtable_read8 -ffffffff81c1f5e0 t fwtable_read16 -ffffffff81c1f8a0 t fwtable_read32 -ffffffff81c1fb50 t fwtable_read64 -ffffffff81c1fe00 t fwtable_reg_read_fw_domains -ffffffff81c1fef0 t fwtable_write8 -ffffffff81c20220 t fwtable_write16 -ffffffff81c20550 t fwtable_write32 -ffffffff81c20880 t fwtable_reg_write_fw_domains -ffffffff81c20a20 t gen6_write8 -ffffffff81c20be0 t gen6_write16 -ffffffff81c20da0 t gen6_write32 -ffffffff81c20f60 t gen6_reg_write_fw_domains -ffffffff81c20f90 t i915_pmic_bus_access_notifier -ffffffff81c21010 t __fw_domain_init -ffffffff81c211a0 t fw_domains_get_with_thread_status -ffffffff81c21390 t fw_domains_get_with_fallback -ffffffff81c21610 t fw_domain_wait_ack_with_fallback -ffffffff81c218a0 t fw_domain_wait_ack_clear -ffffffff81c21a80 t fw_domain_wait_ack_set -ffffffff81c21c10 t fw_domains_get_normal -ffffffff81c21d00 t ___force_wake_auto -ffffffff81c21d90 t __gen6_gt_wait_for_fifo -ffffffff81c22000 T __intel_wakeref_get_first -ffffffff81c220b0 T __intel_wakeref_put_last -ffffffff81c22110 t ____intel_wakeref_put_last -ffffffff81c221e0 T __intel_wakeref_init -ffffffff81c22260 t __intel_wakeref_put_work -ffffffff81c222d0 T intel_wakeref_wait_for_idle -ffffffff81c22400 T intel_wakeref_auto_init -ffffffff81c22480 t wakeref_auto_timeout -ffffffff81c22530 T intel_wakeref_auto -ffffffff81c22740 T intel_wakeref_auto_fini -ffffffff81c22800 t __delayed_work_tick -ffffffff81c23000 T intel_pxp_is_supported -ffffffff81c23030 T intel_pxp_is_enabled -ffffffff81c23060 T intel_pxp_is_active -ffffffff81c23090 T intel_pxp_init -ffffffff81c230c0 T intel_pxp_fini -ffffffff81c23160 T intel_pxp_mark_termination_in_progress -ffffffff81c231a0 T intel_pxp_get_backend_timeout_ms -ffffffff81c231e0 T intel_pxp_end -ffffffff81c23210 T intel_pxp_fini_hw -ffffffff81c23250 T intel_pxp_get_readiness_status -ffffffff81c23280 T intel_pxp_start -ffffffff81c232b0 T intel_pxp_init_hw -ffffffff81c232f0 T intel_pxp_key_check -ffffffff81c23320 T intel_pxp_invalidate -ffffffff81c24000 T intel_pxp_huc_load_and_auth -ffffffff81c25000 T intel_pxp_tee_stream_message -ffffffff81c25160 T intel_pxp_tee_component_init -ffffffff81c253d0 T intel_pxp_tee_component_fini -ffffffff81c25450 T intel_pxp_tee_cmd_create_arb_session -ffffffff81c25680 T intel_pxp_tee_end_arb_fw_session -ffffffff81c25900 t i915_pxp_tee_component_bind -ffffffff81c25a70 t i915_pxp_tee_component_unbind -ffffffff81c26000 T intel_dram_detect -ffffffff81c26430 t gen11_get_dram_info -ffffffff81c26480 t bxt_get_dram_info -ffffffff81c26790 t skl_get_dram_info -ffffffff81c26970 T intel_dram_edram_detect -ffffffff81c26a00 t icl_pcode_read_mem_global_info -ffffffff81c26ae0 t skl_dram_get_channel_info -ffffffff81c26cb0 t skl_dram_get_dimm_info -ffffffff81c27000 T intel_gmch_bridge_setup -ffffffff81c270d0 t intel_gmch_bridge_release -ffffffff81c27100 T intel_gmch_bar_setup -ffffffff81c272f0 T intel_gmch_bar_teardown -ffffffff81c273e0 T intel_gmch_vga_set_state -ffffffff81c28000 T intel_detect_pch -ffffffff81c281b0 t intel_pch_match -ffffffff81c28200 t intel_pch_type -ffffffff81c289c0 t intel_virt_detect_pch -ffffffff81c29000 T vlv_iosf_sb_get -ffffffff81c29020 T vlv_iosf_sb_put -ffffffff81c29040 T vlv_punit_read -ffffffff81c29090 t vlv_sideband_rw -ffffffff81c29240 T vlv_punit_write -ffffffff81c29290 T vlv_bunit_read -ffffffff81c292e0 T vlv_bunit_write -ffffffff81c29330 T vlv_nc_read -ffffffff81c29380 T vlv_iosf_sb_read -ffffffff81c293d0 T vlv_iosf_sb_write -ffffffff81c29420 T vlv_cck_read -ffffffff81c29470 T vlv_cck_write -ffffffff81c294c0 T vlv_ccu_read -ffffffff81c29510 T vlv_ccu_write -ffffffff81c29560 T vlv_dpio_read -ffffffff81c29630 T vlv_dpio_write -ffffffff81c296a0 T vlv_flisdsi_read -ffffffff81c296f0 T vlv_flisdsi_write -ffffffff81c2a000 T vlv_suspend_complete -ffffffff81c2aa50 T vlv_resume_prepare -ffffffff81c2b4e0 T vlv_suspend_init -ffffffff81c2b550 T vlv_suspend_cleanup -ffffffff81c2b5b0 t vlv_wait_for_pw_status -ffffffff81c2c000 T atom_execute_table_scratch_unlocked -ffffffff81c2c0a0 t atom_execute_table_locked -ffffffff81c2c3b0 T atom_execute_table -ffffffff81c2c460 T atom_parse -ffffffff81c2c610 T atom_destroy -ffffffff81c2c650 T atom_asic_init -ffffffff81c2c860 t get_u32 -ffffffff81c2c8c0 T atom_parse_data_header -ffffffff81c2c960 T atom_parse_cmd_header -ffffffff81c2c9e0 T atom_allocate_fb_scratch -ffffffff81c2cab0 t atom_op_move -ffffffff81c2cc80 t atom_op_and -ffffffff81c2ce60 t atom_op_or -ffffffff81c2d040 t atom_op_shift_left -ffffffff81c2d220 t atom_op_shift_right -ffffffff81c2d400 t atom_op_mul -ffffffff81c2d550 t atom_op_div -ffffffff81c2d6c0 t atom_op_add -ffffffff81c2d8a0 t atom_op_sub -ffffffff81c2da80 t atom_op_setport -ffffffff81c2dc00 t atom_op_setregblock -ffffffff81c2dcc0 t atom_op_setfbbase -ffffffff81c2dd80 t atom_op_compare -ffffffff81c2df60 t atom_op_switch -ffffffff81c2e190 t atom_op_jump -ffffffff81c2e400 t atom_op_test -ffffffff81c2e5c0 t atom_op_delay -ffffffff81c2e6a0 t atom_op_calltable -ffffffff81c2e7f0 t atom_op_repeat -ffffffff81c2e820 t atom_op_clear -ffffffff81c2e930 t atom_op_nop -ffffffff81c2e960 t atom_op_eot -ffffffff81c2e990 t atom_op_mask -ffffffff81c2ec40 t atom_op_postcard -ffffffff81c2ecf0 t atom_op_beep -ffffffff81c2ed10 t atom_op_savereg -ffffffff81c2ed40 t atom_op_restorereg -ffffffff81c2ed70 t atom_op_setdatablock -ffffffff81c2eeb0 t atom_op_xor -ffffffff81c2f090 t atom_op_shl -ffffffff81c2f2b0 t atom_op_shr -ffffffff81c2f4d0 t atom_op_debug -ffffffff81c2f500 t atom_put_dst -ffffffff81c2fa10 t atom_get_src_int -ffffffff81c30090 t atom_iio_execute -ffffffff81c31000 T atombios_crtc_dpms -ffffffff81c31300 T atombios_crtc_set_base -ffffffff81c31350 t dce4_crtc_do_set_base -ffffffff81c31e90 t avivo_crtc_do_set_base -ffffffff81c32730 T atombios_crtc_set_base_atomic -ffffffff81c32780 T radeon_atom_disp_eng_pll_init -ffffffff81c32860 t atombios_crtc_set_disp_eng_pll -ffffffff81c32970 t atombios_crtc_program_ss -ffffffff81c32c00 T atombios_crtc_mode_set -ffffffff81c33690 T radeon_atombios_init_crtc -ffffffff81c33780 t radeon_bo_reserve -ffffffff81c33900 t radeon_bo_unreserve -ffffffff81c339e0 t atombios_disable_ss -ffffffff81c33ac0 t atombios_crtc_program_pll -ffffffff81c33d70 t atombios_crtc_prepare -ffffffff81c33e30 t atombios_crtc_commit -ffffffff81c33eb0 t atombios_crtc_mode_fixup -ffffffff81c34bc0 t atombios_crtc_disable -ffffffff81c34e20 t radeon_get_shared_dp_ppll -ffffffff81c34f10 t radeon_get_shared_nondp_ppll -ffffffff81c36000 T radeon_atom_copy_swap -ffffffff81c36020 T radeon_dp_aux_init -ffffffff81c36110 t radeon_dp_aux_transfer_atom -ffffffff81c362e0 T radeon_dp_getsinktype -ffffffff81c36350 T radeon_dp_getdpcd -ffffffff81c364c0 T radeon_dp_get_panel_mode -ffffffff81c365d0 T radeon_dp_set_link_config -ffffffff81c36650 t radeon_dp_get_dp_link_config -ffffffff81c367e0 T radeon_dp_mode_valid_helper -ffffffff81c36890 T radeon_dp_needs_link_train -ffffffff81c36900 T radeon_dp_set_rx_power_state -ffffffff81c36980 T radeon_dp_link_train -ffffffff81c37100 t radeon_process_aux_ch -ffffffff81c372b0 t dp_get_adjust_train -ffffffff81c38000 T atombios_get_backlight_level -ffffffff81c38070 T atombios_set_backlight_level -ffffffff81c38220 T atombios_dig_transmitter_setup -ffffffff81c38240 T radeon_atom_backlight_init -ffffffff81c38420 t radeon_atom_backlight_get_brightness -ffffffff81c38480 T atombios_dvo_setup -ffffffff81c38640 T atombios_digital_setup -ffffffff81c38900 T atombios_get_encoder_mode -ffffffff81c38b90 T atombios_dig_encoder_setup2 -ffffffff81c38fd0 T atombios_dig_encoder_setup -ffffffff81c38ff0 T atombios_dig_transmitter_setup2 -ffffffff81c399d0 T atombios_set_edp_panel_power -ffffffff81c39ae0 T radeon_atom_release_dig_encoder -ffffffff81c39b20 T radeon_atom_pick_dig_encoder -ffffffff81c39d40 T radeon_atom_encoder_init -ffffffff81c39e10 t atombios_external_encoder_setup -ffffffff81c3a080 T radeon_atom_ext_encoder_setup_ddc -ffffffff81c3a0d0 T radeon_enc_destroy -ffffffff81c3a180 T radeon_add_atom_encoder -ffffffff81c3a590 t radeon_atombios_set_dig_info -ffffffff81c3a600 t radeon_atombios_set_dac_info -ffffffff81c3a670 t radeon_atom_backlight_update_status -ffffffff81c3a6d0 t radeon_atom_encoder_dpms -ffffffff81c3a970 t radeon_atom_mode_fixup -ffffffff81c3aab0 t radeon_atom_encoder_prepare -ffffffff81c3af90 t radeon_atom_encoder_commit -ffffffff81c3afc0 t radeon_atom_encoder_mode_set -ffffffff81c3b570 t radeon_atom_dig_detect -ffffffff81c3b680 t radeon_atom_encoder_disable -ffffffff81c3b910 t radeon_atom_encoder_dpms_avivo -ffffffff81c3bb40 t radeon_atom_encoder_dpms_dig -ffffffff81c3c080 t atombios_dac_setup -ffffffff81c3c160 t radeon_atom_dac_detect -ffffffff81c3c350 t radeon_atom_ext_dpms -ffffffff81c3c380 t radeon_atom_ext_prepare -ffffffff81c3c3b0 t radeon_atom_ext_commit -ffffffff81c3c3e0 t radeon_atom_ext_mode_set -ffffffff81c3c410 t radeon_atom_ext_disable -ffffffff81c3d000 T radeon_atom_hw_i2c_xfer -ffffffff81c3d140 t radeon_process_i2c_ch -ffffffff81c3d310 T radeon_atom_hw_i2c_func -ffffffff81c3e000 T btc_get_max_clock_from_voltage_dependency_table -ffffffff81c3e0d0 T btc_apply_voltage_dependency_rules -ffffffff81c3e140 T btc_skip_blacklist_clocks -ffffffff81c3e230 T btc_adjust_clock_combinations -ffffffff81c3e360 T btc_apply_voltage_delta_rules -ffffffff81c3e480 T btc_program_mgcg_hw_sequence -ffffffff81c3e580 T btc_dpm_enabled -ffffffff81c3e590 T btc_notify_uvd_to_smc -ffffffff81c3e600 T btc_reset_to_default -ffffffff81c3e650 T btc_read_arb_registers -ffffffff81c3e6e0 T btc_dpm_vblank_too_short -ffffffff81c3e750 T btc_dpm_pre_set_power_state -ffffffff81c3f970 T btc_dpm_set_power_state -ffffffff81c3fca0 t btc_set_power_state_conditionally_enable_ulv -ffffffff81c3fdd0 T btc_dpm_post_set_power_state -ffffffff81c3fef0 t btc_update_current_ps -ffffffff81c3fff0 T btc_dpm_enable -ffffffff81c40ed0 t btc_cg_clock_gating_enable -ffffffff81c41000 t btc_mg_clock_gating_enable -ffffffff81c41120 t btc_ls_clock_gating_enable -ffffffff81c41250 t btc_init_stutter_mode -ffffffff81c412d0 T btc_dpm_disable -ffffffff81c415b0 T btc_dpm_setup_asic -ffffffff81c41690 T btc_dpm_init -ffffffff81c41a80 T btc_dpm_fini -ffffffff81c41b30 T btc_dpm_debugfs_print_current_performance_level -ffffffff81c41b80 T btc_dpm_get_current_sclk -ffffffff81c41c00 T btc_dpm_get_current_mclk -ffffffff81c41c80 T btc_dpm_get_sclk -ffffffff81c41cd0 T btc_dpm_get_mclk -ffffffff81c42000 T ci_dpm_powergate_uvd -ffffffff81c42380 T ci_dpm_vblank_too_short -ffffffff81c42410 T ci_fan_ctrl_get_fan_speed_percent -ffffffff81c424b0 T ci_fan_ctrl_set_fan_speed_percent -ffffffff81c42580 T ci_fan_ctrl_set_mode -ffffffff81c42720 t ci_fan_ctrl_set_static_mode -ffffffff81c427e0 t ci_thermal_start_smc_fan_control -ffffffff81c42a20 T ci_fan_ctrl_get_mode -ffffffff81c42a80 T ci_dpm_force_performance_level -ffffffff81c43310 t ci_upload_dpm_level_enable_mask -ffffffff81c43640 T ci_dpm_pre_set_power_state -ffffffff81c43930 T ci_dpm_post_set_power_state -ffffffff81c43a00 T ci_dpm_setup_asic -ffffffff81c43c00 T ci_dpm_enable -ffffffff81c454d0 t ci_init_smc_table -ffffffff81c463c0 t ci_init_arb_table_index -ffffffff81c46450 t ci_populate_initial_mc_reg_table -ffffffff81c46690 t ci_populate_pm_base -ffffffff81c46a00 t ci_dpm_start_smc -ffffffff81c46a80 t ci_enable_vr_hot_gpio_interrupt -ffffffff81c46b20 t ci_notify_smc_display_change -ffffffff81c46bf0 t ci_enable_sclk_control -ffffffff81c46c20 t ci_enable_ulv -ffffffff81c46d70 t ci_enable_ds_master_switch -ffffffff81c46f60 t ci_start_dpm -ffffffff81c47150 t ci_enable_didt -ffffffff81c47400 t ci_enable_smc_cac -ffffffff81c47590 t ci_enable_power_containment -ffffffff81c47a10 t ci_power_control_set_level -ffffffff81c47b20 t ci_enable_auto_throttle_source -ffffffff81c47c00 t ci_enable_thermal_based_sclk_dpm -ffffffff81c47d50 t ci_thermal_start_thermal_controller -ffffffff81c48050 T ci_dpm_late_enable -ffffffff81c480f0 T ci_dpm_disable -ffffffff81c487e0 T ci_dpm_set_power_state -ffffffff81c49450 t ci_update_sclk_t -ffffffff81c494c0 t ci_update_and_upload_mc_reg_table -ffffffff81c49670 t ci_unfreeze_sclk_mclk_dpm -ffffffff81c49820 t ci_notify_link_speed_change_after_state_change -ffffffff81c49950 T ci_dpm_display_configuration_changed -ffffffff81c49ae0 T ci_dpm_fini -ffffffff81c49b90 T ci_dpm_init -ffffffff81c4a9f0 t ci_initialize_powertune_defaults -ffffffff81c4aae0 t ci_get_leakage_voltages -ffffffff81c4ac90 t ci_patch_dependency_tables_with_leakage -ffffffff81c4b300 t ci_set_private_data_variables_based_on_pptable -ffffffff81c4b410 T ci_dpm_debugfs_print_current_performance_level -ffffffff81c4b550 T ci_dpm_print_power_state -ffffffff81c4b610 T ci_dpm_get_current_sclk -ffffffff81c4b6e0 T ci_dpm_get_current_mclk -ffffffff81c4b7b0 T ci_dpm_get_sclk -ffffffff81c4b800 T ci_dpm_get_mclk -ffffffff81c4b850 t ci_set_valid_flag -ffffffff81c4b8f0 t ci_populate_all_graphic_levels -ffffffff81c4be80 t ci_populate_all_memory_levels -ffffffff81c4c780 t ci_populate_smc_vce_level -ffffffff81c4c8a0 t ci_populate_smc_acp_level -ffffffff81c4c9a0 t ci_populate_smc_samu_level -ffffffff81c4caa0 t ci_do_program_memory_timing_parameters -ffffffff81c4ccc0 t ci_populate_smc_uvd_level -ffffffff81c4ce10 t ci_populate_smc_initial_state -ffffffff81c4ceb0 t ci_populate_bapm_parameters_in_dpm_table -ffffffff81c4d040 t ci_populate_smc_voltage_table -ffffffff81c4d160 t ci_min_max_v_gnbl_pm_lid_from_bapm_vddc -ffffffff81c4d3c0 t ci_enable_sclk_mclk_dpm -ffffffff81c4d730 t ci_thermal_enable_alert -ffffffff81c4d8e0 t ci_enable_vce_dpm -ffffffff81c4e000 T ci_copy_bytes_to_smc -ffffffff81c4e240 T ci_start_smc -ffffffff81c4e280 T ci_reset_smc -ffffffff81c4e2c0 T ci_program_jump_on_start -ffffffff81c4e2f0 T ci_stop_smc_clock -ffffffff81c4e330 T ci_start_smc_clock -ffffffff81c4e370 T ci_is_smc_running -ffffffff81c4e3e0 T ci_load_smc_ucode -ffffffff81c4e570 T ci_read_smc_sram_dword -ffffffff81c4e640 T ci_write_smc_sram_dword -ffffffff81c4f000 T cik_get_allowed_info_register -ffffffff81c4f0a0 T cik_didt_rreg -ffffffff81c4f140 T cik_didt_wreg -ffffffff81c4f1c0 T ci_get_temp -ffffffff81c4f210 T kv_get_temp -ffffffff81c4f260 T cik_pciep_rreg -ffffffff81c4f2e0 T cik_pciep_wreg -ffffffff81c4f350 T cik_get_xclk -ffffffff81c4f3c0 T cik_mm_rdoorbell -ffffffff81c4f420 T cik_mm_wdoorbell -ffffffff81c4f470 T ci_mc_load_microcode -ffffffff81c4f7b0 T cik_ring_test -ffffffff81c4fa50 T cik_fence_gfx_ring_emit -ffffffff81c4fe40 T cik_fence_compute_ring_emit -ffffffff81c500c0 T cik_semaphore_ring_emit -ffffffff81c50280 T cik_copy_cpdma -ffffffff81c506d0 T cik_ring_ib_execute -ffffffff81c50c70 T cik_ib_test -ffffffff81c50f50 T cik_gfx_get_rptr -ffffffff81c50fb0 T cik_gfx_get_wptr -ffffffff81c50ff0 T cik_gfx_set_wptr -ffffffff81c51030 T cik_compute_get_rptr -ffffffff81c51110 T cik_compute_get_wptr -ffffffff81c511f0 T cik_compute_set_wptr -ffffffff81c51270 T cik_gpu_check_soft_reset -ffffffff81c513e0 T cik_asic_reset -ffffffff81c51890 t cik_gpu_pci_config_reset -ffffffff81c520a0 T cik_gfx_is_lockup -ffffffff81c52110 T cik_pcie_gart_tlb_flush -ffffffff81c52160 T cik_ib_parse -ffffffff81c52190 T cik_vm_init -ffffffff81c521f0 T cik_vm_fini -ffffffff81c52220 T cik_vm_flush -ffffffff81c52e90 T cik_enter_rlc_safe_mode -ffffffff81c52f80 T cik_exit_rlc_safe_mode -ffffffff81c52fc0 T cik_update_cg -ffffffff81c534c0 t cik_enable_mgcg -ffffffff81c539e0 t cik_enable_cgcg -ffffffff81c53d50 T cik_init_cp_pg_table -ffffffff81c53fc0 T cik_get_csb_size -ffffffff81c54050 T cik_get_csb_buffer -ffffffff81c541e0 T cik_irq_set -ffffffff81c54f60 t cik_disable_interrupt_state -ffffffff81c55420 T cik_irq_process -ffffffff81c56bf0 t cik_irq_ack -ffffffff81c57570 T cik_resume -ffffffff81c57600 t cik_init_golden_registers -ffffffff81c577c0 t cik_startup -ffffffff81c5a5b0 T cik_suspend -ffffffff81c5a9a0 T cik_init -ffffffff81c5aed0 t cik_init_microcode -ffffffff81c5bc20 t cik_uvd_init -ffffffff81c5bcd0 t cik_vce_init -ffffffff81c5bda0 t cik_cp_fini -ffffffff81c5be20 t cik_irq_fini -ffffffff81c5bf30 t cik_mec_fini -ffffffff81c5bfe0 t cik_pcie_gart_fini -ffffffff81c5c0e0 T cik_fini -ffffffff81c5c400 T dce8_program_fmt -ffffffff81c5c530 T dce8_bandwidth_update -ffffffff81c5d140 T cik_get_gpu_clock_counter -ffffffff81c5d200 T cik_set_uvd_clocks -ffffffff81c5d280 t cik_set_uvd_clock -ffffffff81c5d3f0 T cik_set_vce_clocks -ffffffff81c5d630 t cik_wait_for_rlc_serdes -ffffffff81c5d7f0 t cik_mec_init -ffffffff81c5d9e0 t cik_uvd_start -ffffffff81c5dad0 t cik_vce_start -ffffffff81c5dbf0 t cik_irq_init -ffffffff81c5e770 t cik_cp_resume -ffffffff81c5ff20 t cik_uvd_resume -ffffffff81c5fff0 t cik_vce_resume -ffffffff81c600f0 t pcie_capability_set_word -ffffffff81c60200 t pcie_capability_read_word -ffffffff81c602a0 t pcie_capability_clear_and_set_word -ffffffff81c603c0 t pcie_capability_write_word -ffffffff81c60480 t cik_get_cu_active_bitmap -ffffffff81c60600 t radeon_bo_reserve -ffffffff81c60780 t radeon_bo_unreserve -ffffffff81c60860 t cik_update_gfx_pg -ffffffff81c60a00 t cik_compute_stop -ffffffff81c60b70 t cik_cp_compute_fini -ffffffff81c60d10 t request_firmware -ffffffff81c60da0 t release_firmware -ffffffff81c60de0 t dce8_latency_watermark -ffffffff81c62000 T cik_sdma_get_rptr -ffffffff81c62070 T cik_sdma_get_wptr -ffffffff81c620c0 T cik_sdma_set_wptr -ffffffff81c62110 T cik_sdma_ring_ib_execute -ffffffff81c62510 T cik_sdma_fence_ring_emit -ffffffff81c626e0 t cik_sdma_hdp_flush_ring_emit -ffffffff81c62910 T cik_sdma_semaphore_ring_emit -ffffffff81c62a30 T cik_sdma_enable -ffffffff81c62c10 T cik_sdma_resume -ffffffff81c630f0 T cik_sdma_fini -ffffffff81c63130 T cik_copy_dma -ffffffff81c63530 T cik_sdma_ring_test -ffffffff81c637e0 T cik_sdma_ib_test -ffffffff81c63a40 T cik_sdma_is_lockup -ffffffff81c63ac0 T cik_sdma_vm_copy_pages -ffffffff81c63bd0 T cik_sdma_vm_write_pages -ffffffff81c63d40 T cik_sdma_vm_set_pages -ffffffff81c63ec0 T cik_sdma_vm_pad_ib -ffffffff81c63f10 T cik_dma_vm_flush -ffffffff81c65000 T cypress_enable_spread_spectrum -ffffffff81c65140 T cypress_start_dpm -ffffffff81c65190 T cypress_enable_sclk_control -ffffffff81c651f0 T cypress_enable_mclk_control -ffffffff81c65250 T cypress_notify_smc_display_change -ffffffff81c652a0 T cypress_program_response_times -ffffffff81c65360 T cypress_advertise_gen2_capability -ffffffff81c65430 T cypress_notify_link_speed_change_after_state_change -ffffffff81c654f0 T cypress_notify_link_speed_change_before_state_change -ffffffff81c655b0 T cypress_get_strobe_mode_settings -ffffffff81c656b0 T cypress_get_mclk_frequency_ratio -ffffffff81c65760 T cypress_map_clkf_to_ibias -ffffffff81c65820 T cypress_convert_power_level_to_smc -ffffffff81c65bf0 t cypress_populate_mclk_value -ffffffff81c66000 T cypress_upload_sw_state -ffffffff81c66180 T cypress_upload_mc_reg_table -ffffffff81c66240 t cypress_convert_mc_reg_table_to_smc -ffffffff81c664d0 T cypress_calculate_burst_time -ffffffff81c66560 T cypress_program_memory_timing_parameters -ffffffff81c66700 T cypress_populate_smc_initial_state -ffffffff81c66ab0 T cypress_populate_smc_acpi_state -ffffffff81c66e30 T cypress_construct_voltage_tables -ffffffff81c66fc0 T cypress_populate_smc_voltage_tables -ffffffff81c670f0 T cypress_get_mvdd_configuration -ffffffff81c671c0 T cypress_populate_mc_reg_table -ffffffff81c67410 T cypress_get_table_locations -ffffffff81c674f0 T cypress_enable_display_gap -ffffffff81c67550 T cypress_dpm_setup_asic -ffffffff81c67640 T cypress_dpm_enable -ffffffff81c68110 t cypress_force_mc_use_s1 -ffffffff81c68390 t cypress_gfx_clock_gating_enable -ffffffff81c686a0 t cypress_mg_clock_gating_enable -ffffffff81c68920 T cypress_dpm_disable -ffffffff81c68b50 T cypress_dpm_set_power_state -ffffffff81c68d90 T cypress_dpm_display_configuration_changed -ffffffff81c68e70 T cypress_dpm_init -ffffffff81c690e0 T cypress_dpm_fini -ffffffff81c69170 T cypress_dpm_vblank_too_short -ffffffff81c691e0 t cypress_wait_for_mc_sequencer -ffffffff81c6a000 T dce3_2_afmt_hdmi_write_speaker_allocation -ffffffff81c6a070 T dce3_2_afmt_dp_write_speaker_allocation -ffffffff81c6a0e0 T dce3_2_afmt_write_sad_regs -ffffffff81c6a1e0 T dce3_2_audio_set_dto -ffffffff81c6a320 T dce3_2_hdmi_update_acr -ffffffff81c6a680 T dce3_2_set_audio_packet -ffffffff81c6a810 T dce3_2_set_mute -ffffffff81c6b000 T dce6_endpoint_rreg -ffffffff81c6b0e0 T dce6_endpoint_wreg -ffffffff81c6b1d0 T dce6_audio_get_pin -ffffffff81c6b360 T dce6_afmt_select_pin -ffffffff81c6b3f0 T dce6_afmt_write_latency_fields -ffffffff81c6b4b0 T dce6_afmt_hdmi_write_speaker_allocation -ffffffff81c6b580 T dce6_afmt_dp_write_speaker_allocation -ffffffff81c6b650 T dce6_afmt_write_sad_regs -ffffffff81c6b790 T dce6_audio_enable -ffffffff81c6b7e0 T dce6_hdmi_audio_set_dto -ffffffff81c6b850 T dce6_dp_audio_set_dto -ffffffff81c6c000 T eg_cg_rreg -ffffffff81c6c080 T eg_cg_wreg -ffffffff81c6c0f0 T eg_pif_phy0_rreg -ffffffff81c6c170 T eg_pif_phy0_wreg -ffffffff81c6c1d0 T eg_pif_phy1_rreg -ffffffff81c6c250 T eg_pif_phy1_wreg -ffffffff81c6c2b0 T evergreen_get_allowed_info_register -ffffffff81c6c340 T evergreen_tiling_fields -ffffffff81c6c3e0 T sumo_set_uvd_clocks -ffffffff81c6c4c0 t sumo_set_uvd_clock -ffffffff81c6c6b0 T evergreen_set_uvd_clocks -ffffffff81c6cc30 T evergreen_fix_pci_max_read_req_size -ffffffff81c6cdf0 T dce4_program_fmt -ffffffff81c6cf10 T dce4_wait_for_vblank -ffffffff81c6d190 T evergreen_page_flip -ffffffff81c6d320 T evergreen_page_flip_pending -ffffffff81c6d390 T evergreen_get_temp -ffffffff81c6d460 T sumo_get_temp -ffffffff81c6d4b0 T sumo_pm_init_profile -ffffffff81c6d5f0 T btc_pm_init_profile -ffffffff81c6d700 T evergreen_pm_misc -ffffffff81c6d8a0 T evergreen_pm_prepare -ffffffff81c6d9a0 T evergreen_pm_finish -ffffffff81c6daa0 T evergreen_hpd_sense -ffffffff81c6db10 T evergreen_hpd_set_polarity -ffffffff81c6dc50 T evergreen_hpd_init -ffffffff81c6dd20 T evergreen_hpd_fini -ffffffff81c6ddc0 T evergreen_get_number_of_dram_channels -ffffffff81c6de10 T evergreen_bandwidth_update -ffffffff81c6dfd0 t evergreen_line_buffer_adjust -ffffffff81c6e1c0 t evergreen_program_watermarks -ffffffff81c6ec20 T evergreen_mc_wait_for_idle -ffffffff81c6ecc0 T evergreen_pcie_gart_tlb_flush -ffffffff81c6ed90 T evergreen_mc_stop -ffffffff81c6f890 T evergreen_mc_resume -ffffffff81c6ffa0 T evergreen_mc_program -ffffffff81c703a0 T evergreen_ring_ib_execute -ffffffff81c70830 T evergreen_mc_init -ffffffff81c70970 T evergreen_print_gpu_status_regs -ffffffff81c709c0 T evergreen_is_display_hung -ffffffff81c70bc0 T evergreen_gpu_check_soft_reset -ffffffff81c70d20 T evergreen_gpu_pci_config_reset -ffffffff81c70ea0 T evergreen_asic_reset -ffffffff81c71210 T evergreen_gfx_is_lockup -ffffffff81c71280 T sumo_rlc_fini -ffffffff81c71440 t radeon_bo_reserve -ffffffff81c715c0 t radeon_bo_unreserve -ffffffff81c716a0 T sumo_rlc_init -ffffffff81c71e80 T evergreen_rlc_resume -ffffffff81c721f0 T evergreen_get_vblank_counter -ffffffff81c72260 T evergreen_disable_interrupt_state -ffffffff81c72530 T evergreen_irq_set -ffffffff81c72af0 T evergreen_irq_suspend -ffffffff81c72b40 T evergreen_irq_process -ffffffff81c736a0 t evergreen_irq_ack -ffffffff81c73d60 T evergreen_resume -ffffffff81c73e40 t evergreen_init_golden_registers -ffffffff81c74050 t evergreen_startup -ffffffff81c758e0 T evergreen_suspend -ffffffff81c75a80 T evergreen_init -ffffffff81c75ea0 t evergreen_pcie_gart_fini -ffffffff81c75fc0 T evergreen_fini -ffffffff81c761b0 T evergreen_pcie_gen2_enable -ffffffff81c763e0 T evergreen_program_aspm -ffffffff81c76a70 t evergreen_latency_watermark -ffffffff81c76c70 t evergreen_uvd_start -ffffffff81c76d30 t evergreen_cp_load_microcode -ffffffff81c76e90 t evergreen_cp_resume -ffffffff81c77b00 t evergreen_uvd_resume -ffffffff81c78000 T evergreen_cs_parse -ffffffff81c7a7b0 T evergreen_dma_cs_parse -ffffffff81c7b960 T evergreen_ib_parse -ffffffff81c7bdc0 T evergreen_dma_ib_parse -ffffffff81c7bf90 t evergreen_cs_track_check -ffffffff81c7d030 t evergreen_cs_handle_reg -ffffffff81c7eec0 t evergreen_surface_value_conv_check -ffffffff81c7f1a0 t evergreen_surface_check -ffffffff81c7f620 t evergreen_cs_track_validate_htile -ffffffff81c7f8d0 t evergreen_vm_reg_valid -ffffffff81c80000 T evergreen_dma_fence_ring_emit -ffffffff81c802b0 T evergreen_dma_ring_ib_execute -ffffffff81c80600 T evergreen_copy_dma -ffffffff81c809a0 T evergreen_dma_is_lockup -ffffffff81c81000 T dce4_audio_enable -ffffffff81c81080 T evergreen_hdmi_update_acr -ffffffff81c812a0 T dce4_afmt_write_latency_fields -ffffffff81c81310 T dce4_afmt_hdmi_write_speaker_allocation -ffffffff81c81380 T dce4_afmt_dp_write_speaker_allocation -ffffffff81c813f0 T evergreen_hdmi_write_sad_regs -ffffffff81c814f0 T evergreen_set_avi_packet -ffffffff81c81690 T dce4_hdmi_audio_set_dto -ffffffff81c81770 T dce4_dp_audio_set_dto -ffffffff81c81860 T dce4_set_vbi_packet -ffffffff81c818d0 T dce4_hdmi_set_color_depth -ffffffff81c81a20 T dce4_set_audio_packet -ffffffff81c81c30 T dce4_set_mute -ffffffff81c81d40 T evergreen_hdmi_enable -ffffffff81c82070 T evergreen_dp_enable -ffffffff81c83000 T kv_dpm_enable_bapm -ffffffff81c83070 T kv_dpm_enable -ffffffff81c83f70 t kv_populate_vce_table -ffffffff81c841f0 t kv_populate_samu_table -ffffffff81c84450 t kv_populate_acp_table -ffffffff81c845e0 t kv_start_am -ffffffff81c84620 t kv_enable_auto_thermal_throttling -ffffffff81c84660 t kv_enable_dpm_voltage_scaling -ffffffff81c846a0 t kv_set_dpm_interval -ffffffff81c846e0 t kv_start_dpm -ffffffff81c84720 t kv_enable_didt -ffffffff81c849d0 T kv_dpm_late_enable -ffffffff81c84bd0 T kv_dpm_powergate_uvd -ffffffff81c84d50 T kv_dpm_disable -ffffffff81c850c0 T kv_dpm_force_performance_level -ffffffff81c85240 t kv_force_dpm_lowest -ffffffff81c85310 T kv_dpm_pre_set_power_state -ffffffff81c85890 T kv_dpm_set_power_state -ffffffff81c86060 t kv_set_valid_clock_range -ffffffff81c86200 t kv_calculate_ds_divider -ffffffff81c86370 t kv_calculate_nbps_level_settings -ffffffff81c864f0 t kv_update_vce_dpm -ffffffff81c866d0 T kv_dpm_post_set_power_state -ffffffff81c86770 T kv_dpm_setup_asic -ffffffff81c867d0 T kv_dpm_init -ffffffff81c87080 T kv_dpm_debugfs_print_current_performance_level -ffffffff81c870f0 T kv_dpm_get_current_sclk -ffffffff81c87160 T kv_dpm_get_current_mclk -ffffffff81c87190 T kv_dpm_print_power_state -ffffffff81c87230 T kv_dpm_fini -ffffffff81c872d0 T kv_dpm_display_configuration_changed -ffffffff81c87300 T kv_dpm_get_sclk -ffffffff81c87350 T kv_dpm_get_mclk -ffffffff81c88000 T kv_notify_message_to_smu -ffffffff81c880c0 T kv_dpm_get_enable_mask -ffffffff81c88190 T kv_send_msg_to_smc_with_parameter -ffffffff81c88260 T kv_read_smc_sram_dword -ffffffff81c882f0 T kv_smc_dpm_enable -ffffffff81c88420 T kv_smc_bapm_enable -ffffffff81c88550 T kv_copy_bytes_to_smc -ffffffff81c89000 T tn_smc_rreg -ffffffff81c89080 T tn_smc_wreg -ffffffff81c890f0 T ni_mc_load_microcode -ffffffff81c892e0 T ni_init_microcode -ffffffff81c897b0 t request_firmware -ffffffff81c89840 t release_firmware -ffffffff81c89880 T cayman_get_allowed_info_register -ffffffff81c89910 T tn_get_temp -ffffffff81c899a0 T cayman_pcie_gart_tlb_flush -ffffffff81c899f0 T cayman_cp_int_cntl_setup -ffffffff81c89a40 T cayman_fence_ring_emit -ffffffff81c89dd0 T cayman_ring_ib_execute -ffffffff81c8a230 T cayman_gfx_get_rptr -ffffffff81c8a2c0 T cayman_gfx_get_wptr -ffffffff81c8a330 T cayman_gfx_set_wptr -ffffffff81c8a3b0 T cayman_gpu_check_soft_reset -ffffffff81c8a540 T cayman_asic_reset -ffffffff81c8a850 T cayman_gfx_is_lockup -ffffffff81c8a8c0 T cayman_resume -ffffffff81c8a950 t ni_init_golden_registers -ffffffff81c8aa30 t cayman_startup -ffffffff81c8be70 T cayman_suspend -ffffffff81c8c060 T cayman_init -ffffffff81c8c3d0 t cayman_uvd_init -ffffffff81c8c480 t cayman_vce_init -ffffffff81c8c550 t cayman_cp_fini -ffffffff81c8c5d0 t cayman_pcie_gart_fini -ffffffff81c8c710 T cayman_fini -ffffffff81c8c990 T cayman_vm_init -ffffffff81c8c9f0 T cayman_vm_fini -ffffffff81c8ca20 T cayman_vm_decode_fault -ffffffff81c8cab0 T cayman_vm_flush -ffffffff81c8cf10 T tn_set_vce_clocks -ffffffff81c8d170 t cayman_uvd_start -ffffffff81c8d230 t cayman_vce_start -ffffffff81c8d350 t cayman_cp_load_microcode -ffffffff81c8d4e0 t cayman_cp_resume -ffffffff81c8e3a0 t cayman_uvd_resume -ffffffff81c8e470 t cayman_vce_resume -ffffffff81c8f000 T cayman_dma_get_rptr -ffffffff81c8f070 T cayman_dma_get_wptr -ffffffff81c8f0c0 T cayman_dma_set_wptr -ffffffff81c8f110 T cayman_dma_ring_ib_execute -ffffffff81c8f4a0 T cayman_dma_stop -ffffffff81c8f550 T cayman_dma_resume -ffffffff81c8f7b0 T cayman_dma_fini -ffffffff81c8f870 T cayman_dma_is_lockup -ffffffff81c8f8f0 T cayman_dma_vm_copy_pages -ffffffff81c8f9f0 T cayman_dma_vm_write_pages -ffffffff81c8fb50 T cayman_dma_vm_set_pages -ffffffff81c8fcc0 T cayman_dma_vm_pad_ib -ffffffff81c8fd10 T cayman_dma_vm_flush -ffffffff81c91000 T ni_get_pi -ffffffff81c91030 T ni_get_ps -ffffffff81c91060 T ni_dpm_vblank_too_short -ffffffff81c910d0 T ni_dpm_force_performance_level -ffffffff81c91220 T ni_copy_and_switch_arb_sets -ffffffff81c914f0 T ni_set_uvd_clock_before_set_eng_clock -ffffffff81c91570 T ni_set_uvd_clock_after_set_eng_clock -ffffffff81c915f0 T ni_dpm_setup_asic -ffffffff81c91800 T ni_update_current_ps -ffffffff81c918c0 T ni_update_requested_ps -ffffffff81c91980 T ni_dpm_enable -ffffffff81c927e0 t ni_init_smc_table -ffffffff81c93190 t ni_init_smc_spll_table -ffffffff81c93300 t ni_init_arb_table_index -ffffffff81c933a0 t ni_populate_mc_reg_table -ffffffff81c936e0 t ni_initialize_smc_cac_tables -ffffffff81c94960 t ni_initialize_hardware_cac_manager -ffffffff81c94e90 t ni_populate_smc_tdp_limits -ffffffff81c95040 t ni_program_response_times -ffffffff81c95150 T ni_dpm_disable -ffffffff81c95510 t ni_enable_power_containment -ffffffff81c955d0 t ni_enable_smc_cac -ffffffff81c956f0 T ni_dpm_pre_set_power_state -ffffffff81c95cd0 T ni_dpm_set_power_state -ffffffff81c95fc0 t ni_upload_sw_state -ffffffff81c96bb0 t ni_upload_mc_reg_table -ffffffff81c96d60 t ni_power_control_set_level -ffffffff81c96e30 T ni_dpm_post_set_power_state -ffffffff81c96f00 T ni_dpm_init -ffffffff81c978a0 T ni_dpm_fini -ffffffff81c97950 T ni_dpm_print_power_state -ffffffff81c97a20 T ni_dpm_debugfs_print_current_performance_level -ffffffff81c97a60 T ni_dpm_get_current_sclk -ffffffff81c97ad0 T ni_dpm_get_current_mclk -ffffffff81c97b40 T ni_dpm_get_sclk -ffffffff81c97ba0 T ni_dpm_get_mclk -ffffffff81c97c00 t ni_do_program_memory_timing_parameters -ffffffff81c97d40 t ni_calculate_sclk_params -ffffffff81c97f70 t ni_calculate_power_boost_limit -ffffffff81c98130 t ni_populate_mclk_value -ffffffff81c99000 T r100_wait_for_vblank -ffffffff81c99190 T r100_page_flip -ffffffff81c99450 T r100_page_flip_pending -ffffffff81c99500 T r100_pm_get_dynpm_state -ffffffff81c99720 T r100_pm_init_profile -ffffffff81c99800 T r100_pm_misc -ffffffff81c99c40 T r100_pm_prepare -ffffffff81c99cf0 T r100_pm_finish -ffffffff81c99da0 T r100_gui_idle -ffffffff81c99de0 T r100_hpd_sense -ffffffff81c99e40 T r100_hpd_set_polarity -ffffffff81c99f00 T r100_hpd_init -ffffffff81c99fa0 T r100_hpd_fini -ffffffff81c9a010 T r100_pci_gart_tlb_flush -ffffffff81c9a040 T r100_pci_gart_init -ffffffff81c9a110 T r100_pci_gart_get_page_entry -ffffffff81c9a140 T r100_pci_gart_set_page -ffffffff81c9a180 T r100_pci_gart_enable -ffffffff81c9a270 T r100_pci_gart_disable -ffffffff81c9a2f0 T r100_pci_gart_fini -ffffffff81c9a370 T r100_irq_set -ffffffff81c9a450 T r100_irq_disable -ffffffff81c9a4c0 T r100_irq_process -ffffffff81c9a7c0 T r100_get_vblank_counter -ffffffff81c9a810 T r100_fence_ring_emit -ffffffff81c9ac70 T r100_semaphore_ring_emit -ffffffff81c9aca0 T r100_copy_blit -ffffffff81c9b330 T r100_ring_start -ffffffff81c9b420 T r100_gfx_get_rptr -ffffffff81c9b480 T r100_gfx_get_wptr -ffffffff81c9b4c0 T r100_gfx_set_wptr -ffffffff81c9b500 T r100_cp_init -ffffffff81c9ba30 T r100_debugfs_cp_init -ffffffff81c9ba60 T r100_cp_fini -ffffffff81c9bb00 T r100_cp_disable -ffffffff81c9bc40 T r100_gui_wait_for_idle -ffffffff81c9bd30 T r100_reloc_pitch_offset -ffffffff81c9be70 T r100_packet3_load_vbpntr -ffffffff81c9c110 T r100_cs_parse_packet0 -ffffffff81c9c220 T r100_cs_packet_parse_vline -ffffffff81c9c430 T r100_cs_track_check_pkt3_indx_buffer -ffffffff81c9c4b0 T r100_cs_parse -ffffffff81c9d6a0 T r100_cs_track_clear -ffffffff81c9da30 T r100_cs_track_check -ffffffff81c9e250 T r100_mc_wait_for_idle -ffffffff81c9e2f0 T r100_gpu_is_lockup -ffffffff81c9e350 T r100_enable_bm -ffffffff81c9e3a0 T r100_bm_disable -ffffffff81c9e450 T r100_asic_reset -ffffffff81c9e780 T r100_mc_stop -ffffffff81c9e940 T r100_mc_resume -ffffffff81c9ea00 T r100_set_common_regs -ffffffff81c9eba0 T r100_vram_init_sizes -ffffffff81c9ed90 T r100_vga_set_state -ffffffff81c9edf0 T r100_pll_errata_after_index -ffffffff81c9ee30 T r100_pll_rreg -ffffffff81c9ef60 T r100_pll_wreg -ffffffff81c9f070 T r100_debugfs_rbbm_init -ffffffff81c9f0a0 T r100_debugfs_mc_info_init -ffffffff81c9f0d0 T r100_set_surface_reg -ffffffff81c9f2e0 T r100_clear_surface_reg -ffffffff81c9f390 T r100_bandwidth_update -ffffffff81c9fde0 T r100_ring_test -ffffffff81ca0090 T r100_ring_ib_execute -ffffffff81ca02f0 T r100_ib_test -ffffffff81ca0630 T r100_vga_render_disable -ffffffff81ca0690 T r100_resume -ffffffff81ca0890 t r100_startup -ffffffff81ca0dd0 T r100_suspend -ffffffff81ca0eb0 T r100_fini -ffffffff81ca0fc0 T r100_restore_sanity -ffffffff81ca1060 T r100_init -ffffffff81ca14c0 t r100_set_safe_registers -ffffffff81ca1540 T r100_mm_rreg_slow -ffffffff81ca15c0 T r100_mm_wreg_slow -ffffffff81ca1620 T r100_io_rreg -ffffffff81ca16c0 T r100_io_wreg -ffffffff81ca1730 t r100_get_vtx_size -ffffffff81ca1820 t r100_cs_track_texture_print -ffffffff81ca2000 T r200_copy_dma -ffffffff81ca2470 T r200_packet0_check -ffffffff81ca3240 t r200_get_vtx_size_0 -ffffffff81ca3400 t r200_get_vtx_size_1 -ffffffff81ca3490 T r200_set_safe_registers -ffffffff81ca4000 T rv370_pcie_rreg -ffffffff81ca4080 T rv370_pcie_wreg -ffffffff81ca40f0 T rv370_pcie_gart_tlb_flush -ffffffff81ca42f0 T rv370_pcie_gart_get_page_entry -ffffffff81ca4350 T rv370_pcie_gart_set_page -ffffffff81ca4390 T rv370_pcie_gart_init -ffffffff81ca4460 T rv370_pcie_gart_enable -ffffffff81ca47c0 T rv370_pcie_gart_disable -ffffffff81ca4940 T rv370_pcie_gart_fini -ffffffff81ca4970 T r300_fence_ring_emit -ffffffff81ca4ee0 T r300_ring_start -ffffffff81ca5850 T r300_mc_wait_for_idle -ffffffff81ca58f0 T r300_asic_reset -ffffffff81ca5b10 T r300_mc_init -ffffffff81ca5bc0 T rv370_set_pcie_lanes -ffffffff81ca5d80 T rv370_get_pcie_lanes -ffffffff81ca5e30 T r300_cs_parse -ffffffff81ca61a0 t r300_packet0_check -ffffffff81ca7060 T r300_set_reg_safe -ffffffff81ca70a0 T r300_mc_program -ffffffff81ca7230 T r300_clock_startup -ffffffff81ca72c0 T r300_resume -ffffffff81ca7490 t r300_startup -ffffffff81ca77f0 T r300_suspend -ffffffff81ca7870 T r300_fini -ffffffff81ca7950 T r300_init -ffffffff81ca8000 T r420_pm_init_profile -ffffffff81ca80f0 T r420_pipes_init -ffffffff81ca82d0 T r420_mc_rreg -ffffffff81ca8350 T r420_mc_wreg -ffffffff81ca83c0 T r420_resume -ffffffff81ca8590 t r420_startup -ffffffff81ca87a0 T r420_suspend -ffffffff81ca8940 T r420_fini -ffffffff81ca8a20 T r420_init -ffffffff81ca8ca0 T r420_debugfs_pipes_info_init -ffffffff81ca8cd0 t r420_cp_errata_init -ffffffff81ca9000 T r520_mc_wait_for_idle -ffffffff81ca90a0 T r520_resume -ffffffff81ca91a0 t r520_startup -ffffffff81ca9590 T r520_init -ffffffff81caa000 T r600_rcu_rreg -ffffffff81caa080 T r600_rcu_wreg -ffffffff81caa0f0 T r600_uvd_ctx_rreg -ffffffff81caa170 T r600_uvd_ctx_wreg -ffffffff81caa1e0 T r600_get_allowed_info_register -ffffffff81caa260 T r600_get_xclk -ffffffff81caa290 T r600_set_uvd_clocks -ffffffff81caa7f0 T dce3_program_fmt -ffffffff81caa910 T rv6xx_get_temp -ffffffff81caa960 T r600_pm_get_dynpm_state -ffffffff81caad70 T rs780_pm_init_profile -ffffffff81caae80 T r600_pm_init_profile -ffffffff81cab120 T r600_pm_misc -ffffffff81cab200 T r600_gui_idle -ffffffff81cab240 T r600_hpd_sense -ffffffff81cab360 T r600_hpd_set_polarity -ffffffff81cab5e0 T r600_hpd_init -ffffffff81cab7c0 T r600_hpd_fini -ffffffff81cab970 T r600_pcie_gart_tlb_flush -ffffffff81cabaa0 T r600_pcie_gart_init -ffffffff81cabb40 T r600_mc_wait_for_idle -ffffffff81cabbe0 T rs780_mc_rreg -ffffffff81cabc80 T rs780_mc_wreg -ffffffff81cabd10 T r600_vram_scratch_init -ffffffff81cabe10 t radeon_bo_reserve -ffffffff81cabf90 t radeon_bo_unreserve -ffffffff81cac070 T r600_vram_scratch_fini -ffffffff81cac0f0 T r600_set_bios_scratch_engine_hung -ffffffff81cac140 T r600_gpu_check_soft_reset -ffffffff81cac4e0 T r600_asic_reset -ffffffff81cac8a0 t r600_gpu_pci_config_reset -ffffffff81cacab0 T r600_gfx_is_lockup -ffffffff81cacb20 T r6xx_remap_render_backend -ffffffff81cacce0 T r600_count_pipe_bits -ffffffff81cacd50 T r600_pciep_rreg -ffffffff81cacdd0 T r600_pciep_wreg -ffffffff81cace40 T r600_cp_stop -ffffffff81cacec0 T r600_init_microcode -ffffffff81cad380 t request_firmware -ffffffff81cad410 t release_firmware -ffffffff81cad450 T r600_gfx_get_rptr -ffffffff81cad4b0 T r600_gfx_get_wptr -ffffffff81cad4f0 T r600_gfx_set_wptr -ffffffff81cad530 T r600_cp_start -ffffffff81cad8a0 T r600_cp_resume -ffffffff81cadc00 T r600_ring_init -ffffffff81cadca0 T r600_cp_fini -ffffffff81cadd30 T r600_scratch_init -ffffffff81cadda0 T r600_ring_test -ffffffff81cae040 T r600_fence_ring_emit -ffffffff81cae8e0 T r600_semaphore_ring_emit -ffffffff81caeac0 T r600_copy_cpdma -ffffffff81caf070 T r600_set_surface_reg -ffffffff81caf0a0 T r600_clear_surface_reg -ffffffff81caf0d0 T r600_vga_set_state -ffffffff81caf130 T r600_resume -ffffffff81caf1c0 t r600_startup -ffffffff81cb0eb0 T r600_suspend -ffffffff81cb1020 T r600_irq_suspend -ffffffff81cb10e0 t r600_pcie_gart_disable -ffffffff81cb12e0 T r600_init -ffffffff81cb1a60 T r600_ih_ring_init -ffffffff81cb1ad0 T r600_irq_fini -ffffffff81cb1c10 t r600_pcie_gart_fini -ffffffff81cb1c40 T r600_fini -ffffffff81cb1dd0 T r600_ring_ib_execute -ffffffff81cb2260 T r600_ib_test -ffffffff81cb2510 T r600_ih_ring_alloc -ffffffff81cb2630 T r600_ih_ring_fini -ffffffff81cb26c0 T r600_rlc_stop -ffffffff81cb2850 T r600_disable_interrupts -ffffffff81cb2900 T r600_irq_init -ffffffff81cb2d60 t r600_disable_interrupt_state -ffffffff81cb3060 T r600_irq_disable -ffffffff81cb3120 T r600_irq_set -ffffffff81cb38a0 t r600_irq_ack -ffffffff81cb3dd0 T r600_irq_process -ffffffff81cb49d0 T r600_mmio_hdp_flush -ffffffff81cb4a50 T r600_set_pcie_lanes -ffffffff81cb4b80 T r600_get_pcie_lanes -ffffffff81cb4c50 T r600_get_gpu_clock_counter -ffffffff81cb4ce0 t r600_cp_load_microcode -ffffffff81cb4fb0 t r600_uvd_resume -ffffffff81cb6000 T r600_fmt_is_valid_color -ffffffff81cb6040 T r600_fmt_is_valid_texture -ffffffff81cb6090 T r600_fmt_get_blocksize -ffffffff81cb60d0 T r600_fmt_get_nblocksx -ffffffff81cb6120 T r600_fmt_get_nblocksy -ffffffff81cb6180 T r600_cs_common_vline_parse -ffffffff81cb6440 T r600_mip_minify -ffffffff81cb64a0 T r600_cs_parse -ffffffff81cb8380 T r600_dma_cs_next_reloc -ffffffff81cb8400 T r600_dma_cs_parse -ffffffff81cb8ab0 t r600_cs_track_check -ffffffff81cb9c40 t r600_cs_check_reg -ffffffff81cbab70 t r600_is_safe_reg -ffffffff81cbac10 t r600_texture_size -ffffffff81cbb000 T r600_dma_get_rptr -ffffffff81cbb060 T r600_dma_get_wptr -ffffffff81cbb0a0 T r600_dma_set_wptr -ffffffff81cbb0e0 T r600_dma_stop -ffffffff81cbb170 T r600_dma_resume -ffffffff81cbb370 T r600_dma_fini -ffffffff81cbb3f0 T r600_dma_is_lockup -ffffffff81cbb460 T r600_dma_ring_test -ffffffff81cbb6d0 T r600_dma_fence_ring_emit -ffffffff81cbb8b0 T r600_dma_semaphore_ring_emit -ffffffff81cbb9d0 T r600_dma_ib_test -ffffffff81cbbbf0 T r600_dma_ring_ib_execute -ffffffff81cbbf40 T r600_copy_dma -ffffffff81cbd000 T r600_dpm_print_class_info -ffffffff81cbd2b0 T r600_dpm_print_cap_info -ffffffff81cbd340 T r600_dpm_print_ps_status -ffffffff81cbd3d0 T r600_dpm_get_vblank_time -ffffffff81cbd490 T r600_dpm_get_vrefresh -ffffffff81cbd520 T r600_calculate_u_and_p -ffffffff81cbd5a0 T r600_calculate_at -ffffffff81cbd650 T r600_gfx_clockgating_enable -ffffffff81cbd750 T r600_dynamicpm_enable -ffffffff81cbd7a0 T r600_enable_thermal_protection -ffffffff81cbd800 T r600_enable_acpi_pm -ffffffff81cbd850 T r600_enable_dynamic_pcie_gen2 -ffffffff81cbd8a0 T r600_dynamicpm_enabled -ffffffff81cbd8e0 T r600_enable_sclk_control -ffffffff81cbd940 T r600_enable_mclk_control -ffffffff81cbd9a0 T r600_enable_spll_bypass -ffffffff81cbd9f0 T r600_wait_for_spll_change -ffffffff81cbda70 T r600_set_bsp -ffffffff81cbdab0 T r600_set_at -ffffffff81cbdb10 T r600_set_tc -ffffffff81cbdb70 T r600_select_td -ffffffff81cbdc20 T r600_set_vrc -ffffffff81cbdc60 T r600_set_tpu -ffffffff81cbdcc0 T r600_set_tpc -ffffffff81cbdd20 T r600_set_sstu -ffffffff81cbdd80 T r600_set_sst -ffffffff81cbddd0 T r600_set_git -ffffffff81cbde20 T r600_set_fctu -ffffffff81cbde80 T r600_set_fct -ffffffff81cbded0 T r600_set_ctxcgtt3d_rphc -ffffffff81cbdf30 T r600_set_ctxcgtt3d_rsdc -ffffffff81cbdf90 T r600_set_vddc3d_oorsu -ffffffff81cbdff0 T r600_set_vddc3d_oorphc -ffffffff81cbe050 T r600_set_vddc3d_oorsdc -ffffffff81cbe0b0 T r600_set_mpll_lock_time -ffffffff81cbe100 T r600_set_mpll_reset_time -ffffffff81cbe150 T r600_engine_clock_entry_enable -ffffffff81cbe250 T r600_engine_clock_entry_enable_pulse_skipping -ffffffff81cbe350 T r600_engine_clock_entry_enable_post_divider -ffffffff81cbe450 T r600_engine_clock_entry_set_post_divider -ffffffff81cbe510 T r600_engine_clock_entry_set_reference_divider -ffffffff81cbe5d0 T r600_engine_clock_entry_set_feedback_divider -ffffffff81cbe690 T r600_engine_clock_entry_set_step_time -ffffffff81cbe750 T r600_vid_rt_set_ssu -ffffffff81cbe7b0 T r600_vid_rt_set_vru -ffffffff81cbe810 T r600_vid_rt_set_vrt -ffffffff81cbe870 T r600_voltage_control_enable_pins -ffffffff81cbe8c0 T r600_voltage_control_program_voltages -ffffffff81cbe950 T r600_voltage_control_deactivate_static_control -ffffffff81cbe9e0 T r600_power_level_enable -ffffffff81cbea50 T r600_power_level_set_voltage_index -ffffffff81cbeac0 T r600_power_level_set_mem_clock_index -ffffffff81cbeb20 T r600_power_level_set_eng_clock_index -ffffffff81cbeb90 T r600_power_level_set_watermark_id -ffffffff81cbec00 T r600_power_level_set_pcie_gen2 -ffffffff81cbec60 T r600_power_level_get_current_index -ffffffff81cbeca0 T r600_power_level_get_target_index -ffffffff81cbece0 T r600_power_level_set_enter_index -ffffffff81cbed40 T r600_wait_for_power_level_unequal -ffffffff81cbee30 T r600_wait_for_power_level -ffffffff81cbef20 T r600_start_dpm -ffffffff81cbf200 T r600_stop_dpm -ffffffff81cbf250 T r600_dpm_pre_set_power_state -ffffffff81cbf280 T r600_dpm_post_set_power_state -ffffffff81cbf2b0 T r600_is_uvd_state -ffffffff81cbf2f0 T r600_is_internal_thermal_sensor -ffffffff81cbf330 T r600_dpm_late_enable -ffffffff81cbf440 T r600_get_platform_caps -ffffffff81cbf4e0 T r600_parse_extended_power_table -ffffffff81cc02a0 T r600_free_extended_power_table -ffffffff81cc03a0 T r600_get_pcie_gen_support -ffffffff81cc03f0 T r600_get_pcie_lane_support -ffffffff81cc0450 T r600_encode_pci_lane_width -ffffffff81cc1000 T r600_audio_update_hdmi -ffffffff81cc1170 t r600_audio_status -ffffffff81cc1290 T r600_hdmi_buffer_status_changed -ffffffff81cc1330 T r600_hdmi_update_audio_settings -ffffffff81cc1700 T r600_audio_enable -ffffffff81cc1780 T r600_audio_get_pin -ffffffff81cc17b0 T r600_hdmi_update_acr -ffffffff81cc1b50 T r600_set_avi_packet -ffffffff81cc1d50 T r600_hdmi_audio_workaround -ffffffff81cc1e20 T r600_hdmi_audio_set_dto -ffffffff81cc1ee0 T r600_set_vbi_packet -ffffffff81cc1fa0 T r600_set_audio_packet -ffffffff81cc2270 T r600_set_mute -ffffffff81cc2380 T r600_hdmi_enable -ffffffff81cc3000 T radeon_acpi_is_pcie_performance_request_supported -ffffffff81cc3040 T radeon_acpi_pcie_notify_device_ready -ffffffff81cc3160 T radeon_acpi_pcie_performance_request -ffffffff81cc34f0 T radeon_acpi_init -ffffffff81cc3c60 t radeon_acpi_event -ffffffff81cc3f60 T radeon_acpi_fini -ffffffff81cc4000 T radeon_agp_head_init -ffffffff81cc4050 T radeon_agp_init -ffffffff81cc40a0 T radeon_agp_resume -ffffffff81cc4140 T radeon_agp_fini -ffffffff81cc4190 T radeon_agp_suspend -ffffffff81cc5000 T radeon_agp_disable -ffffffff81cc5120 T radeon_asic_init -ffffffff81cc58f0 t radeon_invalid_rreg -ffffffff81cc5930 t radeon_invalid_wreg -ffffffff81cc5970 t radeon_invalid_get_allowed_info_register -ffffffff81cc6000 T radeon_atombios_i2c_init -ffffffff81cc63a0 T radeon_atombios_lookup_gpio -ffffffff81cc64a0 T radeon_get_atom_connector_info_from_object_table -ffffffff81cc6de0 t radeon_lookup_i2c_gpio -ffffffff81cc70d0 t radeon_atom_apply_quirks -ffffffff81cc74f0 T radeon_get_atom_connector_info_from_supported_devices_table -ffffffff81cc79f0 T radeon_atom_get_clock_info -ffffffff81cc7dd0 T radeon_atombios_sideport_present -ffffffff81cc7e80 T radeon_atombios_get_tmds_info -ffffffff81cc7fc0 T radeon_atombios_get_ppll_ss_info -ffffffff81cc80e0 T radeon_atombios_get_asic_ss_info -ffffffff81cc83c0 t radeon_atombios_get_igp_ss_overrides -ffffffff81cc84d0 T radeon_atombios_get_lvds_info -ffffffff81cc8830 T radeon_atombios_get_primary_dac_info -ffffffff81cc88f0 T radeon_atom_get_tv_timings -ffffffff81cc8b30 T radeon_atombios_get_tv_info -ffffffff81cc8bf0 T radeon_atombios_get_tv_dac_info -ffffffff81cc8cf0 T radeon_atombios_get_default_voltages -ffffffff81cc8db0 T radeon_atombios_get_power_modes -ffffffff81cc9e20 T radeon_atom_get_clock_dividers -ffffffff81cca110 T radeon_atom_get_memory_pll_dividers -ffffffff81cca250 T radeon_atom_set_clock_gating -ffffffff81cca2a0 T radeon_atom_get_engine_clock -ffffffff81cca2f0 T radeon_atom_get_memory_clock -ffffffff81cca340 T radeon_atom_set_engine_clock -ffffffff81cca390 T radeon_atom_set_memory_clock -ffffffff81cca3f0 T radeon_atom_set_engine_dram_timings -ffffffff81cca460 T radeon_atom_update_memory_dll -ffffffff81cca4b0 T radeon_atom_set_ac_timing -ffffffff81cca500 T radeon_atom_set_voltage -ffffffff81cca5d0 T radeon_atom_get_max_vddc -ffffffff81cca6b0 T radeon_atom_get_leakage_vddc_based_on_leakage_idx -ffffffff81cca780 T radeon_atom_get_leakage_id_from_vbios -ffffffff81cca840 T radeon_atom_get_leakage_vddc_based_on_leakage_params -ffffffff81ccaa60 T radeon_atom_get_voltage_evv -ffffffff81ccab20 T radeon_atom_get_voltage_gpio_settings -ffffffff81ccac20 T radeon_atom_is_voltage_gpio -ffffffff81ccadb0 T radeon_atom_get_svi2_info -ffffffff81ccaea0 T radeon_atom_get_max_voltage -ffffffff81ccb030 T radeon_atom_get_min_voltage -ffffffff81ccb170 T radeon_atom_get_voltage_step -ffffffff81ccb270 T radeon_atom_round_to_true_voltage -ffffffff81ccb3d0 T radeon_atom_get_voltage_table -ffffffff81ccb640 T radeon_atom_get_memory_info -ffffffff81ccb7f0 T radeon_atom_get_mclk_range_table -ffffffff81ccba30 T radeon_atom_init_mc_reg_table -ffffffff81ccbca0 T radeon_atom_initialize_bios_scratch_regs -ffffffff81ccbd70 T radeon_save_bios_scratch_regs -ffffffff81ccbe50 T radeon_restore_bios_scratch_regs -ffffffff81ccbf30 T radeon_atom_output_lock -ffffffff81ccbfc0 T radeon_atombios_connected_scratch_regs -ffffffff81ccc730 T radeon_atombios_encoder_crtc_scratch_regs -ffffffff81ccc880 T radeon_atombios_encoder_dpms_scratch_regs -ffffffff81cccab0 t radeon_atombios_parse_misc_flags_1_3 -ffffffff81cccc90 t radeon_atombios_add_pplib_thermal_controller -ffffffff81ccd090 t radeon_atombios_parse_pplib_clock_info -ffffffff81ccd440 t radeon_atombios_parse_pplib_non_clock_info -ffffffff81cce000 T radeon_audio_init -ffffffff81cce1f0 t radeon_audio_enable -ffffffff81cce350 T radeon_audio_endpoint_rreg -ffffffff81cce390 T radeon_audio_endpoint_wreg -ffffffff81cce3d0 T radeon_audio_get_pin -ffffffff81cce420 T radeon_audio_detect -ffffffff81cce580 T radeon_audio_fini -ffffffff81cce610 T radeon_audio_mode_set -ffffffff81cce660 T radeon_audio_dpms -ffffffff81cce6b0 T radeon_audio_decode_dfs_div -ffffffff81cce710 T radeon_audio_component_init -ffffffff81cce780 T radeon_audio_component_fini -ffffffff81cce7d0 t radeon_audio_hdmi_mode_set -ffffffff81cceeb0 t radeon_audio_write_speaker_allocation -ffffffff81ccef60 t radeon_audio_write_sad_regs -ffffffff81ccf030 t radeon_audio_set_avi_packet -ffffffff81ccf170 t radeon_audio_dp_mode_set -ffffffff81ccf2f0 t radeon_audio_rreg -ffffffff81ccf340 t radeon_audio_wreg -ffffffff81cd0000 T radeon_benchmark -ffffffff81cd0940 t radeon_benchmark_move -ffffffff81cd0c20 t radeon_bo_reserve -ffffffff81cd0da0 t radeon_bo_unreserve -ffffffff81cd0e80 t radeon_benchmark_do_move -ffffffff81cd1000 T radeon_get_bios -ffffffff81cd1fc0 t igp_read_bios_from_vram -ffffffff81cd20d0 t radeon_read_bios -ffffffff81cd3000 T radeon_legacy_get_engine_clock -ffffffff81cd30d0 T radeon_legacy_get_memory_clock -ffffffff81cd31a0 T radeon_get_clock_info -ffffffff81cd3730 T radeon_legacy_set_engine_clock -ffffffff81cd3a80 T radeon_legacy_set_clock_gating -ffffffff81cd5000 T radeon_combios_check_hardcoded_edid -ffffffff81cd5100 t combios_get_table_offset -ffffffff81cd5690 T radeon_bios_get_hardcoded_edid -ffffffff81cd5710 T radeon_combios_i2c_init -ffffffff81cd5db0 t combios_setup_i2c_bus -ffffffff81cd60a0 t radeon_combios_get_i2c_info_from_table -ffffffff81cd62f0 T radeon_combios_get_clock_info -ffffffff81cd64e0 T radeon_combios_sideport_present -ffffffff81cd6560 T radeon_combios_get_primary_dac_info -ffffffff81cd66b0 T radeon_combios_get_tv_info -ffffffff81cd67b0 T radeon_combios_get_tv_dac_info -ffffffff81cd6a40 T radeon_combios_get_lvds_info -ffffffff81cd70b0 T radeon_legacy_get_tmds_info_from_table -ffffffff81cd7180 T radeon_legacy_get_tmds_info_from_combios -ffffffff81cd7390 T radeon_legacy_get_ext_tmds_info_from_table -ffffffff81cd75c0 T radeon_legacy_get_ext_tmds_info_from_combios -ffffffff81cd7900 T radeon_get_legacy_connector_info_from_table -ffffffff81cd9a70 T radeon_get_legacy_connector_info_from_bios -ffffffff81cda660 T radeon_combios_get_power_modes -ffffffff81cdad30 T radeon_external_tmds_setup -ffffffff81cdae00 T radeon_combios_external_tmds_setup -ffffffff81cdb380 T radeon_combios_asic_init -ffffffff81cdb8d0 t combios_parse_mmio_table -ffffffff81cdbaf0 t combios_parse_pll_table -ffffffff81cdbdc0 T radeon_combios_initialize_bios_scratch_regs -ffffffff81cdbe50 T radeon_combios_output_lock -ffffffff81cdbeb0 T radeon_combios_connected_scratch_regs -ffffffff81cdc210 T radeon_combios_encoder_crtc_scratch_regs -ffffffff81cdc2f0 T radeon_combios_encoder_dpms_scratch_regs -ffffffff81cdd000 T radeon_connector_hotplug -ffffffff81cdd100 T radeon_get_monitor_bpc -ffffffff81cdd550 T radeon_connector_edid -ffffffff81cdd600 T radeon_connector_encoder_get_dp_bridge_encoder_id -ffffffff81cdd680 T radeon_connector_is_dp12_capable -ffffffff81cdd720 T radeon_add_atom_connector -ffffffff81cde5d0 T radeon_add_legacy_connector -ffffffff81cdeac0 t radeon_dp_detect -ffffffff81cdee60 t radeon_dvi_force -ffffffff81cdeeb0 t radeon_connector_set_property -ffffffff81cdf6f0 t radeon_connector_unregister -ffffffff81cdf750 t radeon_connector_destroy -ffffffff81cdf7c0 t radeon_best_single_encoder -ffffffff81cdf830 t radeon_connector_get_edid -ffffffff81cdf990 t radeon_dp_get_modes -ffffffff81cdfc90 t radeon_dp_mode_valid -ffffffff81cdfe60 t radeon_dvi_encoder -ffffffff81cdff20 t radeon_fixup_lvds_native_mode -ffffffff81ce0060 t radeon_add_common_modes -ffffffff81ce0150 t radeon_fp_native_mode -ffffffff81ce0230 t radeon_lvds_set_property -ffffffff81ce0320 t radeon_vga_detect -ffffffff81ce05c0 t radeon_connector_analog_encoder_conflict_solve -ffffffff81ce07e0 t radeon_vga_get_modes -ffffffff81ce08c0 t radeon_vga_mode_valid -ffffffff81ce0920 t radeon_dvi_detect -ffffffff81ce0f80 t radeon_dvi_mode_valid -ffffffff81ce1100 t radeon_tv_detect -ffffffff81ce1340 t radeon_tv_get_modes -ffffffff81ce1420 t radeon_tv_mode_valid -ffffffff81ce1470 t radeon_lvds_detect -ffffffff81ce1610 t radeon_lvds_get_modes -ffffffff81ce1750 t radeon_lvds_mode_valid -ffffffff81ce2000 T radeon_cs_parser_init -ffffffff81ce2490 T radeon_cs_ioctl -ffffffff81ce2c70 t radeon_cs_parser_fini -ffffffff81ce2df0 t radeon_cs_ib_vm_chunk -ffffffff81ce3130 T radeon_cs_packet_parse -ffffffff81ce32e0 T radeon_cs_packet_next_is_pkt3_nop -ffffffff81ce3340 T radeon_cs_dump_packet -ffffffff81ce33c0 T radeon_cs_packet_next_reloc -ffffffff81ce35a0 t cmp_size_smaller_first -ffffffff81ce4000 T radeon_crtc_cursor_move -ffffffff81ce4070 t radeon_lock_cursor -ffffffff81ce4230 t radeon_cursor_move_locked -ffffffff81ce4770 T radeon_crtc_cursor_set2 -ffffffff81ce4a00 t radeon_hide_cursor -ffffffff81ce4ac0 t radeon_bo_reserve -ffffffff81ce4c40 t radeon_bo_unreserve -ffffffff81ce4d20 t radeon_show_cursor -ffffffff81ce4f70 T radeon_cursor_reset -ffffffff81ce5000 T radeon_is_px -ffffffff81ce5040 T radeon_program_register_sequence -ffffffff81ce5170 T radeon_pci_config_reset -ffffffff81ce51a0 T radeon_surface_init -ffffffff81ce5360 T radeon_scratch_init -ffffffff81ce53e0 T radeon_scratch_get -ffffffff81ce5460 T radeon_scratch_free -ffffffff81ce54c0 T radeon_doorbell_get -ffffffff81ce5570 T radeon_doorbell_free -ffffffff81ce55c0 T radeon_wb_disable -ffffffff81ce55f0 T radeon_wb_fini -ffffffff81ce5690 t radeon_bo_reserve -ffffffff81ce5810 t radeon_bo_unreserve -ffffffff81ce58f0 T radeon_wb_init -ffffffff81ce5be0 T radeon_vram_location -ffffffff81ce5d10 T radeon_gtt_location -ffffffff81ce5e40 T radeon_device_is_virtual -ffffffff81ce5e70 T radeon_card_posted -ffffffff81ce6080 T radeon_update_bandwidth_info -ffffffff81ce6100 T radeon_boot_test_post_card -ffffffff81ce61c0 T radeon_dummy_page_init -ffffffff81ce6280 T radeon_dummy_page_fini -ffffffff81ce62e0 T radeon_atombios_init -ffffffff81ce6470 t cail_reg_read -ffffffff81ce64d0 t cail_reg_write -ffffffff81ce6530 t cail_ioreg_read -ffffffff81ce6550 t cail_ioreg_write -ffffffff81ce6570 t cail_mc_read -ffffffff81ce65a0 t cail_mc_write -ffffffff81ce65d0 t cail_pll_read -ffffffff81ce6600 t cail_pll_write -ffffffff81ce6630 T radeon_atombios_fini -ffffffff81ce66e0 T radeon_combios_init -ffffffff81ce6720 T radeon_combios_fini -ffffffff81ce6750 T radeon_device_init -ffffffff81ce7240 T radeon_device_fini -ffffffff81ce7350 T radeon_suspend_kms -ffffffff81ce76c0 T radeon_resume_kms -ffffffff81ce7900 T radeon_gpu_reset -ffffffff81ce8000 T radeon_crtc_load_lut -ffffffff81ce8e60 T radeon_crtc_handle_vblank -ffffffff81ce8fd0 T radeon_get_crtc_scanoutpos -ffffffff81ce95a0 T radeon_crtc_handle_flip -ffffffff81ce96d0 T radeon_compute_pll_avivo -ffffffff81ce9c30 T radeon_compute_pll_legacy -ffffffff81cea300 T radeon_framebuffer_init -ffffffff81cea380 T radeon_update_display_priority -ffffffff81cea3e0 T radeon_modeset_init -ffffffff81ceaec0 T radeon_modeset_fini -ffffffff81ceb010 T radeon_crtc_scaling_mode_fixup -ffffffff81ceb390 T radeon_get_crtc_scanout_position -ffffffff81ceb400 t radeon_user_framebuffer_create -ffffffff81ceb5a0 t radeon_crtc_gamma_set -ffffffff81ceb5e0 t radeon_crtc_destroy -ffffffff81ceb620 t radeon_crtc_set_config -ffffffff81ceb6f0 t radeon_crtc_page_flip_target -ffffffff81cebb90 t radeon_flip_work_func -ffffffff81cebdb0 t radeon_unpin_work_func -ffffffff81cebe30 t radeon_bo_reserve -ffffffff81cebfb0 t radeon_bo_unreserve -ffffffff81ced000 T radeon_dp_aux_transfer_native -ffffffff81cee000 T radeondrm_probe -ffffffff81cee060 T radeondrm_attach_kms -ffffffff81cee7a0 T radeondrm_detach_kms -ffffffff81cee830 T radeondrm_activate_kms -ffffffff81cee8f0 T radeondrm_wsioctl -ffffffff81cee9b0 T radeondrm_wsmmap -ffffffff81cee9e0 T radeondrm_alloc_screen -ffffffff81ceea10 T radeondrm_free_screen -ffffffff81ceea20 T radeondrm_show_screen -ffffffff81ceeb10 T radeondrm_enter_ddb -ffffffff81ceeb70 T radeondrm_doswitch -ffffffff81ceec10 T radeondrm_setpal -ffffffff81ceee30 T radeondrm_attachhook -ffffffff81cef170 T radeondrm_forcedetach -ffffffff81cf0000 T radeon_setup_encoder_clones -ffffffff81cf00b0 T radeon_get_encoder_enum -ffffffff81cf0230 T radeon_link_encoder_connector -ffffffff81cf0380 T radeon_encoder_set_active_device -ffffffff81cf0440 T radeon_get_connector_for_encoder -ffffffff81cf04b0 T radeon_get_connector_for_encoder_init -ffffffff81cf0520 T radeon_get_external_encoder -ffffffff81cf05b0 T radeon_encoder_get_dp_bridge_encoder_id -ffffffff81cf0650 T radeon_panel_mode_fixup -ffffffff81cf0820 T radeon_dig_monitor_is_duallink -ffffffff81cf0940 T radeon_encoder_is_digital -ffffffff81cf1000 T radeon_fbdev_setup -ffffffff81cf1150 T radeon_fbdev_set_suspend -ffffffff81cf11a0 T radeon_fbdev_robj_is_fb -ffffffff81cf1210 T radeondrm_burner -ffffffff81cf1290 T radeondrm_burner_cb -ffffffff81cf12c0 t radeon_fbdev_fb_helper_fb_probe -ffffffff81cf1800 t radeon_bo_reserve -ffffffff81cf1980 t radeon_bo_unreserve -ffffffff81cf1a60 t radeon_fbdev_client_unregister -ffffffff81cf1ac0 t radeon_fbdev_client_restore -ffffffff81cf1b00 t radeon_fbdev_client_hotplug -ffffffff81cf2000 T radeon_fence_emit -ffffffff81cf2120 T radeon_fence_process -ffffffff81cf21e0 t radeon_fence_activity -ffffffff81cf2450 T radeon_fence_signaled -ffffffff81cf24c0 t radeon_fence_seq_signaled -ffffffff81cf25b0 T radeon_fence_wait_timeout -ffffffff81cf26e0 t radeon_fence_wait_seq_timeout -ffffffff81cf2b50 T radeon_fence_wait -ffffffff81cf2c80 T radeon_fence_wait_any -ffffffff81cf2dc0 T radeon_fence_wait_next -ffffffff81cf2e80 T radeon_fence_wait_empty -ffffffff81cf2f90 T radeon_fence_ref -ffffffff81cf2fd0 T radeon_fence_unref -ffffffff81cf3010 T radeon_fence_count_emitted -ffffffff81cf3110 T radeon_fence_need_sync -ffffffff81cf3170 T radeon_fence_note_sync -ffffffff81cf3340 T radeon_fence_driver_start_ring -ffffffff81cf3520 T radeon_fence_driver_init -ffffffff81cf3660 T radeon_debugfs_fence_init -ffffffff81cf3690 T radeon_fence_driver_fini -ffffffff81cf38c0 T radeon_fence_driver_force_completion -ffffffff81cf39b0 t radeon_fence_get_driver_name -ffffffff81cf39e0 t radeon_fence_get_timeline_name -ffffffff81cf3a80 t radeon_fence_enable_signaling -ffffffff81cf3c90 t radeon_fence_is_signaled -ffffffff81cf3dd0 t radeon_fence_default_wait -ffffffff81cf3f40 t radeon_fence_any_seq_signaled -ffffffff81cf4080 t radeon_fence_check_lockup -ffffffff81cf42e0 t __delayed_work_tick -ffffffff81cf4300 t radeon_fence_check_signaled -ffffffff81cf43a0 t radeon_fence_wait_cb -ffffffff81cf5000 T radeon_gart_table_ram_alloc -ffffffff81cf50c0 T radeon_gart_table_ram_free -ffffffff81cf5130 T radeon_gart_table_vram_alloc -ffffffff81cf51b0 T radeon_gart_table_vram_pin -ffffffff81cf52f0 t radeon_bo_reserve -ffffffff81cf5470 t radeon_bo_unreserve -ffffffff81cf5550 T radeon_gart_table_vram_unpin -ffffffff81cf55d0 T radeon_gart_table_vram_free -ffffffff81cf5610 T radeon_gart_unbind -ffffffff81cf5730 T radeon_gart_bind -ffffffff81cf5880 T radeon_gart_init -ffffffff81cf5990 T radeon_gart_fini -ffffffff81cf6000 T radeon_gem_fault -ffffffff81cf6180 T radeon_gem_vm_reference -ffffffff81cf61b0 T radeon_gem_vm_detach -ffffffff81cf61c0 T radeon_gem_object_create -ffffffff81cf63a0 T radeon_gem_init -ffffffff81cf63e0 T radeon_gem_fini -ffffffff81cf63f0 t radeon_gem_object_free -ffffffff81cf6440 t radeon_gem_object_open -ffffffff81cf64e0 t radeon_gem_object_close -ffffffff81cf65d0 t radeon_gem_object_mmap -ffffffff81cf6670 T radeon_gem_info_ioctl -ffffffff81cf66e0 T radeon_gem_create_ioctl -ffffffff81cf6800 T radeon_gem_userptr_ioctl -ffffffff81cf6830 T radeon_gem_set_domain_ioctl -ffffffff81cf6990 T radeon_mode_dumb_mmap -ffffffff81cf6a40 T radeon_gem_mmap_ioctl -ffffffff81cf6b00 T radeon_gem_busy_ioctl -ffffffff81cf6bb0 T radeon_gem_wait_idle_ioctl -ffffffff81cf6cc0 T radeon_gem_set_tiling_ioctl -ffffffff81cf6d70 T radeon_gem_get_tiling_ioctl -ffffffff81cf6e40 t radeon_bo_reserve -ffffffff81cf7040 t radeon_bo_unreserve -ffffffff81cf7120 T radeon_gem_va_ioctl -ffffffff81cf73d0 t radeon_gem_va_update_vm -ffffffff81cf7520 T radeon_gem_op_ioctl -ffffffff81cf7620 T radeon_align_pitch -ffffffff81cf76b0 T radeon_mode_dumb_create -ffffffff81cf7800 T radeon_gem_debugfs_init -ffffffff81cf8000 T radeon_ddc_probe -ffffffff81cf80c0 T radeon_router_select_ddc_port -ffffffff81cf8320 T radeon_bb_set_bits -ffffffff81cf8490 T radeon_bb_set_dir -ffffffff81cf84c0 T radeon_bb_read_bits -ffffffff81cf85a0 T radeon_acquire_bus -ffffffff81cf89f0 T radeon_release_bus -ffffffff81cf8b60 T radeon_send_start -ffffffff81cf8b80 T radeon_send_stop -ffffffff81cf8ba0 T radeon_initiate_xfer -ffffffff81cf8bc0 T radeon_read_byte -ffffffff81cf8be0 T radeon_write_byte -ffffffff81cf8c00 T radeon_i2c_create -ffffffff81cf8e10 T radeon_i2c_destroy -ffffffff81cf8e90 T radeon_i2c_init -ffffffff81cf8ee0 T radeon_i2c_fini -ffffffff81cf8f90 T radeon_i2c_add -ffffffff81cf9140 T radeon_i2c_lookup -ffffffff81cf9310 T radeon_i2c_get_byte -ffffffff81cf93e0 T radeon_i2c_put_byte -ffffffff81cf9470 T radeon_router_select_cd_port -ffffffff81cf96d0 t radeon_hw_i2c_xfer -ffffffff81cfa270 t radeon_hw_i2c_func -ffffffff81cfa2a0 t r100_hw_i2c_xfer -ffffffff81cfa960 t radeon_get_i2c_prescale -ffffffff81cfb000 T radeon_ib_get -ffffffff81cfb100 T radeon_ib_free -ffffffff81cfb140 T radeon_ib_schedule -ffffffff81cfb3d0 T radeon_ib_pool_init -ffffffff81cfb470 T radeon_ib_pool_fini -ffffffff81cfb4e0 T radeon_ib_ring_tests -ffffffff81cfc000 T radeon_driver_irq_handler_kms -ffffffff81cfc050 T radeon_msi_ok -ffffffff81cfc150 T radeon_irq_kms_init -ffffffff81cfc3e0 t radeon_hotplug_work_func -ffffffff81cfc490 t radeon_dp_work_func -ffffffff81cfc500 T radeon_irq_kms_fini -ffffffff81cfc6a0 T radeon_irq_kms_sw_irq_get -ffffffff81cfc740 T radeon_irq_kms_sw_irq_get_delayed -ffffffff81cfc780 T radeon_irq_kms_sw_irq_put -ffffffff81cfc810 T radeon_irq_kms_pflip_irq_get -ffffffff81cfc8c0 T radeon_irq_kms_pflip_irq_put -ffffffff81cfc960 T radeon_irq_kms_enable_afmt -ffffffff81cfc9f0 T radeon_irq_kms_disable_afmt -ffffffff81cfca80 T radeon_irq_kms_enable_hpd -ffffffff81cfcb70 T radeon_irq_kms_disable_hpd -ffffffff81cfcc50 T radeon_irq_kms_set_irq_n_enabled -ffffffff81cfcdc0 t __delayed_work_tick -ffffffff81cfd000 T radeon_info_ioctl -ffffffff81cfdaf0 t radeon_set_filp_rights -ffffffff81cfdb80 T radeon_driver_open_kms -ffffffff81cfdcb0 t radeon_bo_reserve -ffffffff81cfde30 T radeon_driver_postclose_kms -ffffffff81cfe050 T radeon_get_vblank_counter_kms -ffffffff81cfe200 T radeon_enable_vblank_kms -ffffffff81cfe2b0 T radeon_disable_vblank_kms -ffffffff81cff000 T radeon_crtc_set_base -ffffffff81cff020 T radeon_crtc_do_set_base -ffffffff81cff590 T radeon_crtc_set_base_atomic -ffffffff81cff5b0 t radeon_bo_reserve -ffffffff81cff730 t radeon_bo_unreserve -ffffffff81cff810 T radeon_legacy_init_crtc -ffffffff81cff860 t radeon_crtc_dpms -ffffffff81cffa50 t radeon_crtc_prepare -ffffffff81cffad0 t radeon_crtc_commit -ffffffff81cffb40 t radeon_crtc_mode_fixup -ffffffff81cffb60 t radeon_crtc_mode_set -ffffffff81d00fd0 t radeon_crtc_disable -ffffffff81d02000 T radeon_legacy_get_backlight_level -ffffffff81d02050 T radeon_legacy_set_backlight_level -ffffffff81d020a0 t radeon_legacy_lvds_update -ffffffff81d023e0 T radeon_legacy_backlight_init -ffffffff81d025b0 t radeon_legacy_backlight_get_brightness -ffffffff81d02610 T radeon_add_legacy_encoder -ffffffff81d02970 t radeon_legacy_backlight_update_status -ffffffff81d02a10 t radeon_lvds_enc_destroy -ffffffff81d02aa0 t radeon_legacy_lvds_dpms -ffffffff81d02af0 t radeon_legacy_mode_fixup -ffffffff81d02b60 t radeon_legacy_lvds_prepare -ffffffff81d02bf0 t radeon_legacy_lvds_commit -ffffffff81d02c70 t radeon_legacy_lvds_mode_set -ffffffff81d02e80 t radeon_legacy_encoder_disable -ffffffff81d02ed0 t radeon_legacy_tmds_int_dpms -ffffffff81d02f90 t radeon_legacy_tmds_int_prepare -ffffffff81d03060 t radeon_legacy_tmds_int_commit -ffffffff81d03130 t radeon_legacy_tmds_int_mode_set -ffffffff81d03390 t radeon_legacy_primary_dac_dpms -ffffffff81d034d0 t radeon_legacy_primary_dac_prepare -ffffffff81d03530 t radeon_legacy_primary_dac_commit -ffffffff81d03580 t radeon_legacy_primary_dac_mode_set -ffffffff81d03710 t radeon_legacy_primary_dac_detect -ffffffff81d03900 t radeon_legacy_tv_dac_dpms -ffffffff81d03b10 t radeon_legacy_tv_dac_prepare -ffffffff81d03b70 t radeon_legacy_tv_dac_commit -ffffffff81d03bc0 t radeon_legacy_tv_dac_mode_set -ffffffff81d03f60 t radeon_legacy_tv_dac_detect -ffffffff81d04b60 t radeon_ext_tmds_enc_destroy -ffffffff81d04bb0 t radeon_legacy_tmds_ext_dpms -ffffffff81d04c80 t radeon_legacy_tmds_ext_prepare -ffffffff81d04d50 t radeon_legacy_tmds_ext_commit -ffffffff81d04e20 t radeon_legacy_tmds_ext_mode_set -ffffffff81d05000 T radeon_legacy_tv_mode_set -ffffffff81d060f0 T radeon_legacy_tv_adjust_crtc_reg -ffffffff81d06200 T radeon_legacy_tv_adjust_pll1 -ffffffff81d06300 T radeon_legacy_tv_adjust_pll2 -ffffffff81d07000 T radeon_ttm_bo_is_radeon_bo -ffffffff81d07040 t radeon_ttm_bo_destroy -ffffffff81d07170 T radeon_ttm_placement_from_domain -ffffffff81d072d0 T radeon_bo_create -ffffffff81d074a0 T radeon_bo_kmap -ffffffff81d07590 T radeon_bo_check_tiling -ffffffff81d07670 T radeon_bo_kunmap -ffffffff81d07700 T radeon_bo_ref -ffffffff81d07740 T radeon_bo_unref -ffffffff81d07790 T radeon_bo_pin_restricted -ffffffff81d07ac0 T radeon_bo_pin -ffffffff81d07ae0 T radeon_bo_unpin -ffffffff81d07b50 T radeon_bo_evict_vram -ffffffff81d07bb0 T radeon_bo_force_delete -ffffffff81d07d20 T radeon_bo_init -ffffffff81d07e00 T radeon_bo_fini -ffffffff81d07e40 T radeon_bo_list_validate -ffffffff81d08150 T radeon_bo_get_surface_reg -ffffffff81d083d0 T radeon_bo_set_tiling_flags -ffffffff81d086e0 T radeon_bo_get_tiling_flags -ffffffff81d08730 T radeon_bo_move_notify -ffffffff81d08800 T radeon_bo_fault_reserve_notify -ffffffff81d08a90 t ttm_bo_move_to_lru_tail_unlocked -ffffffff81d08ad0 T radeon_bo_fence -ffffffff81d09000 T radeon_pm_get_type_index -ffffffff81d09080 T radeon_pm_acpi_event_handler -ffffffff81d09160 t radeon_pm_update_profile -ffffffff81d09280 t radeon_pm_set_clocks -ffffffff81d09c50 T radeon_dpm_enable_uvd -ffffffff81d09d10 T radeon_pm_compute_clocks -ffffffff81d0a720 T radeon_dpm_enable_vce -ffffffff81d0a790 T radeon_pm_suspend -ffffffff81d0a890 T radeon_pm_resume -ffffffff81d0ab80 T radeon_pm_init -ffffffff81d0b290 T radeon_pm_late_init -ffffffff81d0b350 T radeon_pm_fini -ffffffff81d0b470 t radeon_dpm_thermal_work_handler -ffffffff81d0b550 t radeon_dynpm_idle_work_handler -ffffffff81d0b7d0 t __delayed_work_tick -ffffffff81d0c000 T radeon_gem_prime_get_sg_table -ffffffff81d0c030 T radeon_gem_prime_pin -ffffffff81d0c0c0 t radeon_bo_reserve -ffffffff81d0c240 t radeon_bo_unreserve -ffffffff81d0c320 T radeon_gem_prime_unpin -ffffffff81d0c3a0 T radeon_gem_prime_export -ffffffff81d0d000 T radeon_ring_supports_scratch_reg -ffffffff81d0d030 T radeon_ring_free_size -ffffffff81d0d0e0 T radeon_ring_lockup_update -ffffffff81d0d140 T radeon_ring_alloc -ffffffff81d0d2c0 T radeon_ring_lock -ffffffff81d0d340 T radeon_ring_commit -ffffffff81d0d440 T radeon_ring_unlock_commit -ffffffff81d0d470 T radeon_ring_undo -ffffffff81d0d4a0 T radeon_ring_unlock_undo -ffffffff81d0d4c0 T radeon_ring_test_lockup -ffffffff81d0d5e0 T radeon_ring_backup -ffffffff81d0d780 T radeon_ring_restore -ffffffff81d0d930 T radeon_ring_init -ffffffff81d0db20 t radeon_bo_reserve -ffffffff81d0dca0 t radeon_bo_unreserve -ffffffff81d0dd80 T radeon_ring_fini -ffffffff81d0e000 T radeon_sa_bo_manager_init -ffffffff81d0e0d0 T radeon_sa_bo_manager_fini -ffffffff81d0e100 T radeon_sa_bo_manager_start -ffffffff81d0e240 t radeon_bo_reserve -ffffffff81d0e3c0 t radeon_bo_unreserve -ffffffff81d0e4a0 T radeon_sa_bo_manager_suspend -ffffffff81d0e550 T radeon_sa_bo_new -ffffffff81d0e5c0 T radeon_sa_bo_free -ffffffff81d0f000 T radeon_semaphore_create -ffffffff81d0f0e0 T radeon_semaphore_emit_signal -ffffffff81d0f170 T radeon_semaphore_emit_wait -ffffffff81d0f200 T radeon_semaphore_free -ffffffff81d10000 T radeon_sync_create -ffffffff81d10090 T radeon_sync_fence -ffffffff81d10140 T radeon_sync_resv -ffffffff81d10280 T radeon_sync_rings -ffffffff81d10440 T radeon_sync_free -ffffffff81d11000 T radeon_test_moves -ffffffff81d11070 t radeon_do_test_moves -ffffffff81d11680 T radeon_test_ring_sync -ffffffff81d11950 t radeon_test_create_and_emit_fence -ffffffff81d11ac0 T radeon_test_syncing -ffffffff81d11d90 t radeon_test_ring_sync2 -ffffffff81d12100 t radeon_bo_reserve -ffffffff81d12280 t radeon_bo_unreserve -ffffffff81d13000 T radeon_get_rdev -ffffffff81d13030 T radeon_ttm_tt_set_userptr -ffffffff81d13080 T radeon_ttm_tt_is_bound -ffffffff81d130d0 T radeon_ttm_tt_has_userptr -ffffffff81d13120 T radeon_ttm_tt_is_readonly -ffffffff81d13170 T radeon_ttm_init -ffffffff81d13390 T radeon_ttm_set_active_vram_size -ffffffff81d133d0 t radeon_bo_reserve -ffffffff81d13550 t radeon_bo_unreserve -ffffffff81d13630 T radeon_ttm_fini -ffffffff81d13700 t radeon_ttm_tt_create -ffffffff81d137e0 t radeon_ttm_tt_populate -ffffffff81d13890 t radeon_ttm_tt_unpopulate -ffffffff81d13980 t radeon_ttm_tt_destroy -ffffffff81d139d0 t radeon_evict_flags -ffffffff81d13b30 t radeon_bo_move -ffffffff81d13f30 t radeon_ttm_io_mem_reserve -ffffffff81d14000 T radeon_ucode_print_mc_hdr -ffffffff81d140b0 t radeon_ucode_print_common_hdr -ffffffff81d141e0 T radeon_ucode_print_smc_hdr -ffffffff81d14270 T radeon_ucode_print_gfx_hdr -ffffffff81d14340 T radeon_ucode_print_rlc_hdr -ffffffff81d14440 T radeon_ucode_print_sdma_hdr -ffffffff81d14520 T radeon_ucode_validate -ffffffff81d15000 T radeon_uvd_init -ffffffff81d15500 t radeon_uvd_idle_work_handler -ffffffff81d15670 t radeon_bo_reserve -ffffffff81d15870 t radeon_bo_unreserve -ffffffff81d15950 T radeon_uvd_fini -ffffffff81d15a20 T radeon_uvd_suspend -ffffffff81d15be0 T radeon_uvd_note_usage -ffffffff81d15e20 T radeon_uvd_get_destroy_msg -ffffffff81d15f30 T radeon_uvd_resume -ffffffff81d15fc0 T radeon_uvd_force_into_uvd_segment -ffffffff81d16060 T radeon_uvd_free_handles -ffffffff81d16220 T radeon_uvd_cs_parse -ffffffff81d16940 T radeon_uvd_get_create_msg -ffffffff81d16ac0 t radeon_uvd_send_msg -ffffffff81d16c60 T radeon_uvd_calc_upll_dividers -ffffffff81d16e30 T radeon_uvd_send_upll_ctlreq -ffffffff81d17170 t __delayed_work_tick -ffffffff81d18000 T radeon_vce_init -ffffffff81d18640 t radeon_vce_idle_work_handler -ffffffff81d18700 t radeon_bo_reserve -ffffffff81d18880 t radeon_bo_unreserve -ffffffff81d18960 T radeon_vce_fini -ffffffff81d189e0 T radeon_vce_suspend -ffffffff81d18ac0 T radeon_vce_resume -ffffffff81d18c10 T radeon_vce_note_usage -ffffffff81d18d30 T radeon_vce_free_handles -ffffffff81d18df0 T radeon_vce_get_destroy_msg -ffffffff81d19020 T radeon_vce_get_create_msg -ffffffff81d19370 T radeon_vce_cs_reloc -ffffffff81d19470 T radeon_vce_cs_parse -ffffffff81d19be0 T radeon_vce_semaphore_emit -ffffffff81d19da0 T radeon_vce_ib_execute -ffffffff81d19f30 T radeon_vce_fence_emit -ffffffff81d1a160 T radeon_vce_ring_test -ffffffff81d1a2b0 T radeon_vce_ib_test -ffffffff81d1a3d0 t __delayed_work_tick -ffffffff81d1b000 T radeon_vm_manager_init -ffffffff81d1b060 T radeon_vm_manager_fini -ffffffff81d1b180 T radeon_vm_get_bos -ffffffff81d1b2d0 T radeon_vm_grab_id -ffffffff81d1b460 T radeon_vm_flush -ffffffff81d1b5f0 T radeon_vm_fence -ffffffff81d1b6a0 T radeon_vm_bo_find -ffffffff81d1b6f0 T radeon_vm_bo_add -ffffffff81d1b7e0 T radeon_vm_bo_set_addr -ffffffff81d1bc30 t radeon_bo_unreserve -ffffffff81d1bd10 t radeon_vm_clear_bo -ffffffff81d1bf00 T radeon_vm_map_gart -ffffffff81d1bf40 T radeon_vm_update_page_directory -ffffffff81d1c2c0 T radeon_vm_bo_update -ffffffff81d1c900 t radeon_vm_fence_pts -ffffffff81d1c990 T radeon_vm_clear_freed -ffffffff81d1ca70 T radeon_vm_clear_invalids -ffffffff81d1cb10 T radeon_vm_bo_rmv -ffffffff81d1cc00 T radeon_vm_bo_invalidate -ffffffff81d1ccb0 T radeon_vm_init -ffffffff81d1cf50 T radeon_vm_fini -ffffffff81d1d230 t radeon_bo_reserve -ffffffff81d1d3b0 t radeon_vm_frag_ptes -ffffffff81d1e000 T rs400_gart_adjust_size -ffffffff81d1e0c0 T rs400_gart_tlb_flush -ffffffff81d1e140 T rs400_gart_init -ffffffff81d1e240 T rs400_gart_enable -ffffffff81d1e5a0 T rs400_gart_disable -ffffffff81d1e600 T rs400_gart_fini -ffffffff81d1e670 T rs400_gart_get_page_entry -ffffffff81d1e6d0 T rs400_gart_set_page -ffffffff81d1e710 T rs400_mc_wait_for_idle -ffffffff81d1e7b0 T rs400_mc_rreg -ffffffff81d1e840 T rs400_mc_wreg -ffffffff81d1e8c0 T rs400_resume -ffffffff81d1e9f0 t rs400_mc_program -ffffffff81d1eaf0 t rs400_startup -ffffffff81d1ece0 T rs400_suspend -ffffffff81d1ed80 T rs400_fini -ffffffff81d1ee70 T rs400_init -ffffffff81d20000 T avivo_wait_for_vblank -ffffffff81d20280 T rs600_page_flip -ffffffff81d20550 T rs600_page_flip_pending -ffffffff81d205c0 T avivo_program_fmt -ffffffff81d206e0 T rs600_pm_misc -ffffffff81d20a20 T rs600_pm_prepare -ffffffff81d20b20 T rs600_pm_finish -ffffffff81d20c20 T rs600_hpd_sense -ffffffff81d20c80 T rs600_hpd_set_polarity -ffffffff81d20d40 T rs600_hpd_init -ffffffff81d20e20 T rs600_hpd_fini -ffffffff81d20ed0 T rs600_asic_reset -ffffffff81d21140 T rs600_gart_tlb_flush -ffffffff81d21200 T rs600_gart_get_page_entry -ffffffff81d21260 T rs600_gart_set_page -ffffffff81d212a0 T rs600_irq_set -ffffffff81d21480 T rs600_irq_disable -ffffffff81d21500 t rs600_irq_ack -ffffffff81d216b0 T rs600_irq_process -ffffffff81d21a10 T rs600_get_vblank_counter -ffffffff81d21a60 T rs600_mc_wait_for_idle -ffffffff81d21b00 T rs600_bandwidth_update -ffffffff81d21bf0 T rs600_mc_rreg -ffffffff81d21c70 T rs600_mc_wreg -ffffffff81d21ce0 T rs600_set_safe_registers -ffffffff81d21d20 T rs600_resume -ffffffff81d21e50 t rs600_startup -ffffffff81d22690 T rs600_suspend -ffffffff81d22790 T rs600_fini -ffffffff81d22890 t rs600_gart_fini -ffffffff81d22900 T rs600_init -ffffffff81d23000 T rs690_mc_wait_for_idle -ffffffff81d230a0 T rs690_pm_info -ffffffff81d23310 T rs690_line_buffer_adjust -ffffffff81d23430 T rs690_bandwidth_update -ffffffff81d23780 t rs690_crtc_bandwidth_compute -ffffffff81d23b70 t rs690_compute_mode_priority -ffffffff81d23ff0 T rs690_mc_rreg -ffffffff81d24080 T rs690_mc_wreg -ffffffff81d24100 T rs690_resume -ffffffff81d241f0 t rs690_startup -ffffffff81d244e0 T rs690_suspend -ffffffff81d24540 T rs690_fini -ffffffff81d245f0 T rs690_init -ffffffff81d25000 T rs780_dpm_enable -ffffffff81d25bf0 T rs780_dpm_disable -ffffffff81d25cd0 T rs780_dpm_set_power_state -ffffffff81d260b0 t rs780_force_voltage -ffffffff81d261f0 t rs780_enable_voltage_scaling -ffffffff81d263b0 T rs780_dpm_setup_asic -ffffffff81d263e0 T rs780_dpm_display_configuration_changed -ffffffff81d26530 T rs780_dpm_init -ffffffff81d26aa0 T rs780_dpm_print_power_state -ffffffff81d26b30 T rs780_dpm_fini -ffffffff81d26bc0 T rs780_dpm_get_sclk -ffffffff81d26c00 T rs780_dpm_get_mclk -ffffffff81d26c30 T rs780_dpm_debugfs_print_current_performance_level -ffffffff81d26c60 T rs780_dpm_get_current_sclk -ffffffff81d26cf0 T rs780_dpm_get_current_mclk -ffffffff81d26d20 T rs780_dpm_force_performance_level -ffffffff81d26f10 t rs780_force_fbdiv -ffffffff81d28000 T rv515_ring_start -ffffffff81d28af0 T rv515_mc_wait_for_idle -ffffffff81d28b90 T rv515_vga_render_disable -ffffffff81d28be0 T rv515_mc_rreg -ffffffff81d28c70 T rv515_mc_wreg -ffffffff81d28cf0 T rv515_debugfs -ffffffff81d28d00 T rv515_mc_stop -ffffffff81d29270 T rv515_mc_resume -ffffffff81d29850 T rv515_clock_startup -ffffffff81d29910 T rv515_resume -ffffffff81d29b50 t rv515_startup -ffffffff81d2a020 T rv515_suspend -ffffffff81d2a090 T rv515_set_safe_registers -ffffffff81d2a0d0 T rv515_fini -ffffffff81d2a180 T rv515_init -ffffffff81d2a470 T atom_rv515_force_tv_scaler -ffffffff81d2db10 T rv515_bandwidth_avivo_update -ffffffff81d2dcb0 t rv515_crtc_bandwidth_compute -ffffffff81d2dfc0 t rv515_compute_mode_priority -ffffffff81d2e490 T rv515_bandwidth_update -ffffffff81d2f000 T rv6xx_dpm_enable -ffffffff81d2f800 t rv6xx_calculate_stepping_parameters -ffffffff81d2f9e0 t rv6xx_program_stepping_parameters_except_lowest_entry -ffffffff81d2ffb0 t rv6xx_program_stepping_parameters_lowest_entry -ffffffff81d30080 t rv6xx_enable_dynamic_pcie_gen2 -ffffffff81d30240 T rv6xx_dpm_disable -ffffffff81d304b0 T rv6xx_dpm_set_power_state -ffffffff81d30ea0 T rv6xx_setup_asic -ffffffff81d30fe0 T rv6xx_dpm_display_configuration_changed -ffffffff81d31060 T rv6xx_dpm_init -ffffffff81d315a0 T rv6xx_dpm_print_power_state -ffffffff81d31660 T rv6xx_dpm_debugfs_print_current_performance_level -ffffffff81d31690 T rv6xx_dpm_get_current_sclk -ffffffff81d31700 T rv6xx_dpm_get_current_mclk -ffffffff81d31770 T rv6xx_dpm_fini -ffffffff81d31800 T rv6xx_dpm_get_sclk -ffffffff81d31840 T rv6xx_dpm_get_mclk -ffffffff81d31880 T rv6xx_dpm_force_performance_level -ffffffff81d31a10 t rv6xx_generate_steps -ffffffff81d31d10 t rv6xx_output_stepping -ffffffff81d31e20 t rv6xx_program_mclk_stepping_entry -ffffffff81d32090 t rv6xx_program_engine_spread_spectrum -ffffffff81d32380 t rv6xx_step_sw_voltage -ffffffff81d33000 T rv730_populate_sclk_value -ffffffff81d33230 T rv730_populate_mclk_value -ffffffff81d33470 T rv730_read_clock_registers -ffffffff81d33590 T rv730_populate_smc_acpi_state -ffffffff81d33740 T rv730_populate_smc_initial_state -ffffffff81d33900 T rv730_program_memory_timing_parameters -ffffffff81d33ae0 T rv730_start_dpm -ffffffff81d33b70 T rv730_stop_dpm -ffffffff81d33c30 T rv730_program_dcodt -ffffffff81d33d00 T rv730_get_odt_values -ffffffff81d34000 T rv740_get_decoded_reference_divider -ffffffff81d340a0 T rv740_get_dll_speed -ffffffff81d342b0 T rv740_populate_sclk_value -ffffffff81d344b0 T rv740_populate_mclk_value -ffffffff81d34860 T rv740_read_clock_registers -ffffffff81d34990 T rv740_populate_smc_acpi_state -ffffffff81d34bc0 T rv740_enable_mclk_spread_spectrum -ffffffff81d34c10 T rv740_get_mclk_frequency_ratio -ffffffff81d35000 T rv770_set_uvd_clocks -ffffffff81d35570 T rv770_get_xclk -ffffffff81d355d0 T rv770_page_flip -ffffffff81d358d0 T rv770_page_flip_pending -ffffffff81d35940 T rv770_get_temp -ffffffff81d359a0 T rv770_pm_misc -ffffffff81d35a80 T r700_cp_stop -ffffffff81d35b00 T r700_cp_fini -ffffffff81d35b90 T rv770_set_clk_bypass_mode -ffffffff81d35cb0 T r700_vram_gtt_location -ffffffff81d35e40 T rv770_resume -ffffffff81d35ed0 t rv770_init_golden_registers -ffffffff81d36060 t rv770_startup -ffffffff81d37c30 T rv770_suspend -ffffffff81d37e50 T rv770_init -ffffffff81d38260 t rv770_pcie_gart_fini -ffffffff81d383e0 T rv770_fini -ffffffff81d38680 t rv770_uvd_start -ffffffff81d38740 t rv770_cp_load_microcode -ffffffff81d38a10 t rv770_uvd_resume -ffffffff81d39000 T rv770_copy_dma -ffffffff81d3a000 T rv770_get_ps -ffffffff81d3a030 T rv770_get_pi -ffffffff81d3a060 T evergreen_get_pi -ffffffff81d3a090 T rv770_restore_cgcg -ffffffff81d3a110 T rv770_stop_dpm -ffffffff81d3a1d0 T rv770_dpm_enabled -ffffffff81d3a210 T rv770_enable_thermal_protection -ffffffff81d3a270 T rv770_enable_acpi_pm -ffffffff81d3a2c0 T rv770_get_seq_value -ffffffff81d3a300 T rv770_write_smc_soft_register -ffffffff81d3a330 T rv770_populate_smc_t -ffffffff81d3a4e0 T rv770_populate_smc_sp -ffffffff81d3a540 T rv770_map_clkf_to_ibias -ffffffff81d3a5a0 T rv770_populate_vddc_value -ffffffff81d3a650 T rv770_populate_mvdd_value -ffffffff81d3a6a0 T rv770_calculate_memory_refresh_rate -ffffffff81d3a720 T rv770_enable_backbias -ffffffff81d3a780 T rv770_setup_bsp -ffffffff81d3a870 T rv770_program_git -ffffffff81d3a8c0 T rv770_program_tp -ffffffff81d3a940 T rv770_program_tpp -ffffffff81d3a980 T rv770_program_sstp -ffffffff81d3a9c0 T rv770_program_engine_speed_parameters -ffffffff81d3aa10 T rv770_program_vc -ffffffff81d3aa60 T rv770_clear_vc -ffffffff81d3aaa0 T rv770_upload_firmware -ffffffff81d3aae0 T rv770_populate_initial_mvdd_value -ffffffff81d3ab30 T rv770_get_memory_module_index -ffffffff81d3ab70 T rv770_enable_voltage_control -ffffffff81d3abc0 T rv770_halt_smc -ffffffff81d3ac20 T rv770_resume_smc -ffffffff81d3ac70 T rv770_set_sw_state -ffffffff81d3acd0 T rv770_set_boot_state -ffffffff81d3ad20 T rv770_set_uvd_clock_before_set_eng_clock -ffffffff81d3ad90 T rv770_set_uvd_clock_after_set_eng_clock -ffffffff81d3ae00 T rv770_restrict_performance_levels_before_switch -ffffffff81d3ae60 T rv770_dpm_force_performance_level -ffffffff81d3af20 T r7xx_start_smc -ffffffff81d3af50 T r7xx_stop_smc -ffffffff81d3af80 T rv770_read_voltage_smio_registers -ffffffff81d3afc0 T rv770_reset_smio_status -ffffffff81d3b080 T rv770_get_memory_type -ffffffff81d3b0d0 T rv770_get_pcie_gen2_status -ffffffff81d3b140 T rv770_get_max_vddc -ffffffff81d3b1a0 T rv770_program_response_times -ffffffff81d3b2f0 T rv770_enable_auto_throttle_source -ffffffff81d3b470 T rv770_dpm_enable -ffffffff81d3c4f0 T rv770_dpm_late_enable -ffffffff81d3c620 T rv770_dpm_disable -ffffffff81d3c990 T rv770_dpm_set_power_state -ffffffff81d3d080 t rv770_program_dcodt_after_state_switch -ffffffff81d3d100 T rv770_dpm_setup_asic -ffffffff81d3d470 T rv770_dpm_display_configuration_changed -ffffffff81d3d4f0 T rv7xx_parse_power_table -ffffffff81d3da70 T rv770_get_engine_memory_ss -ffffffff81d3db00 T rv770_dpm_init -ffffffff81d3dd40 T rv770_dpm_print_power_state -ffffffff81d3de60 T rv770_dpm_debugfs_print_current_performance_level -ffffffff81d3de90 T rv770_dpm_get_current_sclk -ffffffff81d3df00 T rv770_dpm_get_current_mclk -ffffffff81d3df70 T rv770_dpm_fini -ffffffff81d3e000 T rv770_dpm_get_sclk -ffffffff81d3e050 T rv770_dpm_get_mclk -ffffffff81d3e0a0 T rv770_dpm_vblank_too_short -ffffffff81d3e110 t rv770_convert_power_level_to_smc -ffffffff81d3f000 T rv770_copy_bytes_to_smc -ffffffff81d3f210 T rv770_start_smc -ffffffff81d3f260 T rv770_reset_smc -ffffffff81d3f2b0 T rv770_stop_smc_clock -ffffffff81d3f300 T rv770_start_smc_clock -ffffffff81d3f350 T rv770_is_smc_running -ffffffff81d3f390 T rv770_send_msg_to_smc -ffffffff81d3f470 T rv770_wait_for_smc_inactive -ffffffff81d3f510 T rv770_load_smc_ucode -ffffffff81d3f6a0 T rv770_read_smc_sram_dword -ffffffff81d3f760 T rv770_write_smc_sram_dword -ffffffff81d40000 T si_get_allowed_info_register -ffffffff81d40090 T si_get_xclk -ffffffff81d40100 T si_get_temp -ffffffff81d40150 T si_mc_load_microcode -ffffffff81d40410 T dce6_bandwidth_update -ffffffff81d405d0 t dce6_line_buffer_adjust -ffffffff81d40780 t dce6_program_watermarks -ffffffff81d41230 T si_fence_ring_emit -ffffffff81d41690 T si_ring_ib_execute -ffffffff81d41e00 T si_gpu_check_soft_reset -ffffffff81d41fa0 T si_asic_reset -ffffffff81d42330 t si_gpu_pci_config_reset -ffffffff81d42650 T si_gfx_is_lockup -ffffffff81d426c0 T si_vram_gtt_location -ffffffff81d42760 T si_pcie_gart_tlb_flush -ffffffff81d427b0 T si_ib_parse -ffffffff81d42e60 T si_vm_init -ffffffff81d42ea0 T si_vm_fini -ffffffff81d42ed0 T si_vm_flush -ffffffff81d43570 T si_init_uvd_internal_cg -ffffffff81d435c0 T si_get_csb_size -ffffffff81d43650 T si_get_csb_buffer -ffffffff81d437d0 T si_rlc_reset -ffffffff81d43850 T si_irq_set -ffffffff81d43d40 t si_disable_interrupt_state -ffffffff81d43fc0 T si_irq_process -ffffffff81d452d0 t si_irq_ack -ffffffff81d458c0 T si_resume -ffffffff81d45950 t si_init_golden_registers -ffffffff81d45b10 t si_startup -ffffffff81d47f50 T si_suspend -ffffffff81d48240 t si_fini_cg -ffffffff81d482e0 T si_init -ffffffff81d49650 t si_cp_fini -ffffffff81d49740 t si_irq_fini -ffffffff81d49810 t si_pcie_gart_fini -ffffffff81d49910 T si_fini -ffffffff81d49b30 T si_get_gpu_clock_counter -ffffffff81d49bf0 T si_set_uvd_clocks -ffffffff81d4a150 T si_set_vce_clocks -ffffffff81d4a690 t si_vce_send_vcepll_ctlreq -ffffffff81d4a8d0 t dce6_latency_watermark -ffffffff81d4ab10 t si_rlc_stop -ffffffff81d4acc0 t si_vm_reg_valid -ffffffff81d4ae20 t si_vm_packet3_cp_dma_check -ffffffff81d4af90 t si_uvd_start -ffffffff81d4b050 t si_vce_start -ffffffff81d4b170 t si_irq_init -ffffffff81d4bc50 t si_cp_load_microcode -ffffffff81d4c030 t si_cp_resume -ffffffff81d4cef0 t si_uvd_resume -ffffffff81d4cfc0 t si_vce_resume -ffffffff81d4d0c0 t pcie_capability_set_word -ffffffff81d4d1d0 t pcie_capability_read_word -ffffffff81d4d270 t pcie_capability_clear_and_set_word -ffffffff81d4d390 t pcie_capability_write_word -ffffffff81d4d450 t si_update_cg -ffffffff81d4d9c0 t si_enable_mgcg -ffffffff81d4dde0 t si_enable_cgcg -ffffffff81d4e170 t request_firmware -ffffffff81d4e200 t release_firmware -ffffffff81d4f000 T si_dma_is_lockup -ffffffff81d4f080 T si_dma_vm_copy_pages -ffffffff81d4f170 T si_dma_vm_write_pages -ffffffff81d4f2d0 T si_dma_vm_set_pages -ffffffff81d4f440 T si_dma_vm_flush -ffffffff81d4f8b0 T si_copy_dma -ffffffff81d50000 T si_dpm_force_performance_level -ffffffff81d50160 T si_get_ddr3_mclk_frequency_ratio -ffffffff81d501c0 T si_get_mclk_frequency_ratio -ffffffff81d50240 T si_trim_voltage_table_to_fit_state_table -ffffffff81d50350 T si_dpm_setup_asic -ffffffff81d50520 T si_fan_ctrl_get_fan_speed_percent -ffffffff81d505b0 T si_fan_ctrl_set_fan_speed_percent -ffffffff81d50670 T si_fan_ctrl_set_mode -ffffffff81d508c0 T si_fan_ctrl_get_mode -ffffffff81d50910 T si_dpm_enable -ffffffff81d51c90 t si_init_smc_table -ffffffff81d52ea0 t si_init_smc_spll_table -ffffffff81d53020 t si_init_arb_table_index -ffffffff81d530b0 t si_populate_mc_reg_table -ffffffff81d53500 t si_initialize_smc_cac_tables -ffffffff81d55150 t si_initialize_hardware_cac_manager -ffffffff81d55200 t si_initialize_smc_dte_tables -ffffffff81d55400 t si_populate_smc_tdp_limits -ffffffff81d55600 t si_populate_smc_tdp_limits_2 -ffffffff81d556d0 t si_program_response_times -ffffffff81d557f0 t si_program_ds_registers -ffffffff81d55880 t si_dpm_start_smc -ffffffff81d558b0 t si_enable_auto_throttle_source -ffffffff81d55a40 t si_thermal_start_thermal_controller -ffffffff81d55f00 T si_dpm_late_enable -ffffffff81d56050 T si_dpm_disable -ffffffff81d563d0 t si_enable_power_containment -ffffffff81d564a0 t si_enable_smc_cac -ffffffff81d56600 T si_dpm_pre_set_power_state -ffffffff81d57170 T si_dpm_set_power_state -ffffffff81d576d0 t si_halt_smc -ffffffff81d57730 t si_upload_sw_state -ffffffff81d58130 t si_upload_smc_data -ffffffff81d58270 t si_upload_ulv_state -ffffffff81d583b0 t si_upload_mc_reg_table -ffffffff81d58550 t si_set_pcie_lane_width_in_smc -ffffffff81d585f0 t si_resume_smc -ffffffff81d58650 t si_set_vce_clock -ffffffff81d586f0 t si_notify_link_speed_change_after_state_change -ffffffff81d58820 t si_set_power_state_conditionally_enable_ulv -ffffffff81d58900 t si_power_control_set_level -ffffffff81d58a90 T si_dpm_post_set_power_state -ffffffff81d58ac0 T si_dpm_display_configuration_changed -ffffffff81d58ba0 T si_dpm_init -ffffffff81d5a5e0 T si_dpm_fini -ffffffff81d5a690 T si_dpm_debugfs_print_current_performance_level -ffffffff81d5a6e0 T si_dpm_get_current_sclk -ffffffff81d5a750 T si_dpm_get_current_mclk -ffffffff81d5a7c0 t si_do_program_memory_timing_parameters -ffffffff81d5a950 t si_populate_mvdd_value -ffffffff81d5a9d0 t si_convert_power_level_to_smc -ffffffff81d5b280 t si_calculate_sclk_params -ffffffff81d5b4b0 t si_program_cac_config_registers -ffffffff81d5c000 T si_copy_bytes_to_smc -ffffffff81d5c240 T si_start_smc -ffffffff81d5c280 T si_reset_smc -ffffffff81d5c2c0 T si_program_jump_on_start -ffffffff81d5c2f0 T si_stop_smc_clock -ffffffff81d5c330 T si_start_smc_clock -ffffffff81d5c370 T si_is_smc_running -ffffffff81d5c3d0 T si_send_msg_to_smc -ffffffff81d5c4a0 T si_wait_for_smc_inactive -ffffffff81d5c540 T si_load_smc_ucode -ffffffff81d5c6e0 T si_read_smc_sram_dword -ffffffff81d5c7b0 T si_write_smc_sram_dword -ffffffff81d5d000 T sumo_get_pi -ffffffff81d5d030 T sumo_gfx_clockgating_initialize -ffffffff81d5d110 T sumo_program_vc -ffffffff81d5d150 T sumo_clear_vc -ffffffff81d5d190 T sumo_program_sstp -ffffffff81d5d210 T sumo_take_smu_control -ffffffff81d5d240 T sumo_get_sleep_divider_from_id -ffffffff81d5d270 T sumo_get_sleep_divider_id_from_clock -ffffffff81d5d320 T sumo_dpm_enable -ffffffff81d5d9b0 T sumo_dpm_late_enable -ffffffff81d5df70 T sumo_dpm_disable -ffffffff81d5e2c0 T sumo_dpm_pre_set_power_state -ffffffff81d5e7b0 T sumo_dpm_set_power_state -ffffffff81d5f260 T sumo_dpm_post_set_power_state -ffffffff81d5f300 T sumo_dpm_setup_asic -ffffffff81d5f400 T sumo_dpm_display_configuration_changed -ffffffff81d5f430 T sumo_convert_vid2_to_vid7 -ffffffff81d5f480 T sumo_construct_sclk_voltage_mapping_table -ffffffff81d5f540 T sumo_construct_vid_mapping_table -ffffffff81d5f6b0 T sumo_dpm_init -ffffffff81d5ff80 T sumo_dpm_print_power_state -ffffffff81d600a0 T sumo_dpm_debugfs_print_current_performance_level -ffffffff81d600d0 T sumo_dpm_get_current_sclk -ffffffff81d60140 T sumo_dpm_get_current_mclk -ffffffff81d60170 T sumo_dpm_get_current_vddc -ffffffff81d60240 T sumo_dpm_fini -ffffffff81d602d0 T sumo_dpm_get_sclk -ffffffff81d60320 T sumo_dpm_get_mclk -ffffffff81d60350 T sumo_dpm_force_performance_level -ffffffff81d60740 t sumo_power_level_enable -ffffffff81d60970 t sumo_program_power_level -ffffffff81d61000 T sumo_initialize_m3_arb -ffffffff81d612c0 T sumo_smu_notify_alt_vddnb_change -ffffffff81d61360 t sumo_send_msg_to_smu -ffffffff81d614f0 T sumo_smu_pg_init -ffffffff81d61510 T sumo_enable_boost_timer -ffffffff81d61640 T sumo_set_tdp_limit -ffffffff81d616c0 T sumo_boost_state_enable -ffffffff81d61710 T sumo_get_running_fw_version -ffffffff81d62000 T trinity_dpm_enable_bapm -ffffffff81d62080 T trinity_dpm_enable -ffffffff81d62520 T trinity_dpm_late_enable -ffffffff81d62a60 T trinity_dpm_disable -ffffffff81d62e50 T trinity_dpm_force_performance_level -ffffffff81d62f00 T trinity_dpm_pre_set_power_state -ffffffff81d634c0 T trinity_dpm_set_power_state -ffffffff81d63a30 T trinity_dpm_post_set_power_state -ffffffff81d63ad0 T trinity_dpm_setup_asic -ffffffff81d63b30 T trinity_dpm_display_configuration_changed -ffffffff81d63bc0 T trinity_dpm_init -ffffffff81d644b0 T trinity_dpm_print_power_state -ffffffff81d645c0 T trinity_dpm_debugfs_print_current_performance_level -ffffffff81d64650 T trinity_dpm_get_current_sclk -ffffffff81d646b0 T trinity_dpm_get_current_mclk -ffffffff81d646e0 T trinity_dpm_fini -ffffffff81d64780 T trinity_dpm_get_sclk -ffffffff81d647d0 T trinity_dpm_get_mclk -ffffffff81d64800 t trinity_program_power_level -ffffffff81d65000 T trinity_dpm_bapm_enable -ffffffff81d65150 T trinity_dpm_config -ffffffff81d65230 T trinity_dpm_force_state -ffffffff81d65310 T trinity_dpm_n_levels_disabled -ffffffff81d653f0 T trinity_uvd_dpm_config -ffffffff81d654c0 T trinity_dpm_no_forced_level -ffffffff81d65590 T trinity_dce_enable_voltage_adjustment -ffffffff81d656e0 T trinity_gfx_dynamic_mgpg_config -ffffffff81d657b0 T trinity_acquire_mutex -ffffffff81d65840 T trinity_release_mutex -ffffffff81d66000 T uvd_v1_0_get_rptr -ffffffff81d66040 T uvd_v1_0_get_wptr -ffffffff81d66080 T uvd_v1_0_set_wptr -ffffffff81d660c0 T uvd_v1_0_fence_emit -ffffffff81d664b0 T uvd_v1_0_resume -ffffffff81d66610 T uvd_v1_0_init -ffffffff81d66b90 T uvd_v1_0_start -ffffffff81d67310 T uvd_v1_0_fini -ffffffff81d67480 T uvd_v1_0_stop -ffffffff81d675f0 T uvd_v1_0_ring_test -ffffffff81d677c0 T uvd_v1_0_semaphore_emit -ffffffff81d677f0 T uvd_v1_0_ib_execute -ffffffff81d67980 T uvd_v1_0_ib_test -ffffffff81d68000 T uvd_v2_2_fence_emit -ffffffff81d68450 T uvd_v2_2_semaphore_emit -ffffffff81d68650 T uvd_v2_2_resume -ffffffff81d69000 T uvd_v3_1_semaphore_emit -ffffffff81d6a000 T uvd_v4_2_resume -ffffffff81d6b000 T vce_v1_0_get_rptr -ffffffff81d6b090 T vce_v1_0_get_wptr -ffffffff81d6b120 T vce_v1_0_set_wptr -ffffffff81d6b1b0 T vce_v1_0_enable_mgcg -ffffffff81d6b470 T vce_v1_0_load_fw -ffffffff81d6b640 T vce_v1_0_bo_size -ffffffff81d6b6b0 T vce_v1_0_resume -ffffffff81d6c020 T vce_v1_0_start -ffffffff81d6c7e0 T vce_v1_0_init -ffffffff81d6d000 T vce_v2_0_enable_mgcg -ffffffff81d6d070 t vce_v2_0_set_dyn_cg -ffffffff81d6d260 T vce_v2_0_bo_size -ffffffff81d6d2d0 T vce_v2_0_resume -ffffffff81d6e000 T aldebaran_reset_init -ffffffff81d6e0c0 t aldebaran_async_reset -ffffffff81d6e120 t aldebaran_get_reset_handler -ffffffff81d6e1c0 T aldebaran_reset_fini -ffffffff81d6e220 t aldebaran_mode2_prepare_hwcontext -ffffffff81d6e340 t aldebaran_mode2_perform_reset -ffffffff81d6e510 t aldebaran_mode2_restore_hwcontext -ffffffff81d6eac0 t aldebaran_mode2_reset -ffffffff81d6f000 T aldebaran_reg_base_init -ffffffff81d70000 T amdgpu_acpi_is_pcie_performance_request_supported -ffffffff81d70040 T amdgpu_acpi_is_power_shift_control_supported -ffffffff81d70070 T amdgpu_acpi_pcie_notify_device_ready -ffffffff81d70180 T amdgpu_acpi_pcie_performance_request -ffffffff81d70500 T amdgpu_acpi_power_shift_control -ffffffff81d70640 T amdgpu_acpi_smart_shift_update -ffffffff81d706e0 T amdgpu_acpi_get_tmr_info -ffffffff81d70770 T amdgpu_acpi_get_mem_info -ffffffff81d70830 T amdgpu_acpi_init -ffffffff81d708e0 t amdgpu_acpi_event -ffffffff81d70bf0 T amdgpu_acpi_get_backlight_caps -ffffffff81d70c40 T amdgpu_acpi_fini -ffffffff81d70c60 T amdgpu_acpi_should_gpu_reset -ffffffff81d70cb0 T amdgpu_acpi_detect -ffffffff81d715f0 T amdgpu_acpi_release -ffffffff81d72000 T amdgpu_afmt_acr -ffffffff81d73000 T amdgpu_amdkfd_init -ffffffff81d73040 T amdgpu_amdkfd_fini -ffffffff81d73070 T amdgpu_amdkfd_device_probe -ffffffff81d730a0 T amdgpu_amdkfd_device_init -ffffffff81d73260 t amdgpu_amdkfd_reset_work -ffffffff81d732e0 T amdgpu_amdkfd_device_fini_sw -ffffffff81d73330 T amdgpu_amdkfd_interrupt -ffffffff81d73360 T amdgpu_amdkfd_suspend -ffffffff81d73390 T amdgpu_amdkfd_resume -ffffffff81d733c0 T amdgpu_amdkfd_pre_reset -ffffffff81d733f0 T amdgpu_amdkfd_post_reset -ffffffff81d73420 T amdgpu_amdkfd_gpu_reset -ffffffff81d73480 T amdgpu_amdkfd_alloc_gtt_mem -ffffffff81d73740 t amdgpu_bo_reserve -ffffffff81d738a0 t amdgpu_bo_unreserve -ffffffff81d73980 T amdgpu_amdkfd_free_gtt_mem -ffffffff81d739f0 T amdgpu_amdkfd_alloc_gws -ffffffff81d73ad0 T amdgpu_amdkfd_free_gws -ffffffff81d73b10 T amdgpu_amdkfd_get_fw_version -ffffffff81d73bc0 T amdgpu_amdkfd_get_local_mem_info -ffffffff81d73d60 T amdgpu_amdkfd_xcp_memory_size -ffffffff81d73e00 T amdgpu_amdkfd_get_gpu_clock_counter -ffffffff81d73e40 T amdgpu_amdkfd_get_max_engine_clock_in_mhz -ffffffff81d73ea0 T amdgpu_amdkfd_get_cu_info -ffffffff81d73fb0 T amdgpu_amdkfd_get_dmabuf_info -ffffffff81d74100 T amdgpu_amdkfd_get_xgmi_hops_count -ffffffff81d74170 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes -ffffffff81d74200 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes -ffffffff81d74360 T amdgpu_amdkfd_submit_ib -ffffffff81d744c0 T amdgpu_amdkfd_set_compute_idle -ffffffff81d74510 T amdgpu_amdkfd_is_kfd_vmid -ffffffff81d74550 T amdgpu_amdkfd_flush_gpu_tlb_vmid -ffffffff81d74680 T amdgpu_amdkfd_flush_gpu_tlb_pasid -ffffffff81d746c0 T amdgpu_amdkfd_have_atomics_support -ffffffff81d746f0 T amdgpu_amdkfd_debug_mem_fence -ffffffff81d74710 T amdgpu_amdkfd_ras_poison_consumption_handler -ffffffff81d74720 T amdgpu_amdkfd_send_close_event_drain_irq -ffffffff81d74740 T amdgpu_amdkfd_ras_query_utcl2_poison_status -ffffffff81d74790 T amdgpu_amdkfd_check_and_lock_kfd -ffffffff81d747c0 T amdgpu_amdkfd_unlock_kfd -ffffffff81d747f0 T amdgpu_amdkfd_unmap_hiq -ffffffff81d75000 T amdgpu_atom_execute_table -ffffffff81d750a0 t amdgpu_atom_execute_table_locked -ffffffff81d753c0 T amdgpu_atom_parse -ffffffff81d75910 T amdgpu_atom_destroy -ffffffff81d75950 T amdgpu_atom_asic_init -ffffffff81d75a70 t get_u32 -ffffffff81d75ad0 T amdgpu_atom_parse_data_header -ffffffff81d75b70 T amdgpu_atom_parse_cmd_header -ffffffff81d75bf0 t atom_op_move -ffffffff81d75dc0 t atom_op_and -ffffffff81d75fa0 t atom_op_or -ffffffff81d76180 t atom_op_shift_left -ffffffff81d76360 t atom_op_shift_right -ffffffff81d76540 t atom_op_mul -ffffffff81d76690 t atom_op_div -ffffffff81d76800 t atom_op_add -ffffffff81d769e0 t atom_op_sub -ffffffff81d76bc0 t atom_op_setport -ffffffff81d76d40 t atom_op_setregblock -ffffffff81d76e00 t atom_op_setfbbase -ffffffff81d76ec0 t atom_op_compare -ffffffff81d770a0 t atom_op_switch -ffffffff81d772d0 t atom_op_jump -ffffffff81d77540 t atom_op_test -ffffffff81d77700 t atom_op_delay -ffffffff81d777e0 t atom_op_calltable -ffffffff81d77930 t atom_op_repeat -ffffffff81d77960 t atom_op_clear -ffffffff81d77a70 t atom_op_nop -ffffffff81d77aa0 t atom_op_eot -ffffffff81d77ad0 t atom_op_mask -ffffffff81d77d80 t atom_op_postcard -ffffffff81d77e30 t atom_op_beep -ffffffff81d77e50 t atom_op_savereg -ffffffff81d77e80 t atom_op_restorereg -ffffffff81d77eb0 t atom_op_setdatablock -ffffffff81d77ff0 t atom_op_xor -ffffffff81d781d0 t atom_op_shl -ffffffff81d783f0 t atom_op_shr -ffffffff81d78610 t atom_op_debug -ffffffff81d786c0 t atom_op_processds -ffffffff81d78780 t atom_op_mul32 -ffffffff81d788e0 t atom_op_div32 -ffffffff81d78a70 t atom_put_dst -ffffffff81d78f80 t atom_get_src_int -ffffffff81d79600 t atom_iio_execute -ffffffff81d7a000 T amdgpu_atombios_lookup_i2c_gpio -ffffffff81d7a260 T amdgpu_atombios_i2c_init -ffffffff81d7a520 T amdgpu_atombios_lookup_gpio -ffffffff81d7a620 T amdgpu_atombios_has_dce_engine_info -ffffffff81d7a6a0 T amdgpu_atombios_get_connector_info_from_object_table -ffffffff81d7af00 T amdgpu_atombios_get_clock_info -ffffffff81d7b240 T amdgpu_atombios_get_gfx_info -ffffffff81d7b300 T amdgpu_atombios_get_vram_width -ffffffff81d7b390 T amdgpu_atombios_get_asic_ss_info -ffffffff81d7b670 t amdgpu_atombios_get_igp_ss_overrides -ffffffff81d7b790 T amdgpu_atombios_get_clock_dividers -ffffffff81d7b9b0 T amdgpu_atombios_has_gpu_virtualization_table -ffffffff81d7ba00 T amdgpu_atombios_scratch_regs_lock -ffffffff81d7ba60 T amdgpu_atombios_scratch_regs_engine_hung -ffffffff81d7bab0 T amdgpu_atombios_scratch_regs_set_backlight_level -ffffffff81d7bb10 T amdgpu_atombios_scratch_need_asic_init -ffffffff81d7bb60 T amdgpu_atombios_copy_swap -ffffffff81d7bb80 T amdgpu_atombios_sysfs_init -ffffffff81d7bbb0 T amdgpu_atombios_fini -ffffffff81d7bc60 T amdgpu_atombios_init -ffffffff81d7bf00 t cail_reg_read -ffffffff81d7bf20 t cail_reg_write -ffffffff81d7bf40 t cail_mc_read -ffffffff81d7bf70 t cail_mc_write -ffffffff81d7bfa0 t cail_pll_read -ffffffff81d7bfd0 t cail_pll_write -ffffffff81d7c000 T amdgpu_atombios_get_data_table -ffffffff81d7d000 T amdgpu_atombios_crtc_overscan_setup -ffffffff81d7d150 T amdgpu_atombios_crtc_scaler_setup -ffffffff81d7d1d0 T amdgpu_atombios_crtc_lock -ffffffff81d7d230 T amdgpu_atombios_crtc_enable -ffffffff81d7d290 T amdgpu_atombios_crtc_blank -ffffffff81d7d2f0 T amdgpu_atombios_crtc_powergate -ffffffff81d7d360 T amdgpu_atombios_crtc_powergate_init -ffffffff81d7d3d0 T amdgpu_atombios_crtc_set_dtd_timing -ffffffff81d7d500 T amdgpu_atombios_crtc_set_disp_eng_pll -ffffffff81d7d5f0 T amdgpu_atombios_crtc_set_dce_clock -ffffffff81d7d6e0 T amdgpu_atombios_crtc_program_pll -ffffffff81d7da00 T amdgpu_atombios_crtc_prepare_pll -ffffffff81d7df00 T amdgpu_atombios_crtc_set_pll -ffffffff81d7f000 T amdgpu_atombios_dp_aux_init -ffffffff81d7f090 t amdgpu_atombios_dp_aux_transfer -ffffffff81d7f200 T amdgpu_atombios_dp_get_sinktype -ffffffff81d7f270 T amdgpu_atombios_dp_get_dpcd -ffffffff81d7f420 T amdgpu_atombios_dp_get_panel_mode -ffffffff81d7f510 T amdgpu_atombios_dp_set_link_config -ffffffff81d7f590 t amdgpu_atombios_dp_get_dp_link_config -ffffffff81d7f720 T amdgpu_atombios_dp_mode_valid_helper -ffffffff81d7f7a0 T amdgpu_atombios_dp_needs_link_train -ffffffff81d7f810 T amdgpu_atombios_dp_set_rx_power_state -ffffffff81d7f890 T amdgpu_atombios_dp_link_train -ffffffff81d7fdf0 t amdgpu_atombios_dp_process_aux_ch -ffffffff81d7ff50 t amdgpu_atombios_dp_get_adjust_train -ffffffff81d81000 T amdgpu_atombios_encoder_get_backlight_level_from_reg -ffffffff81d81050 T amdgpu_atombios_encoder_set_backlight_level_to_reg -ffffffff81d810a0 T amdgpu_atombios_encoder_get_backlight_level -ffffffff81d81100 T amdgpu_atombios_encoder_set_backlight_level -ffffffff81d81210 T amdgpu_atombios_encoder_setup_dig_transmitter -ffffffff81d81c30 T amdgpu_atombios_encoder_init_backlight -ffffffff81d81dd0 t amdgpu_atombios_encoder_get_backlight_brightness -ffffffff81d81e30 T amdgpu_atombios_encoder_fini_backlight -ffffffff81d81ec0 T amdgpu_atombios_encoder_is_digital -ffffffff81d81f10 T amdgpu_atombios_encoder_mode_fixup -ffffffff81d81ff0 T amdgpu_atombios_encoder_get_encoder_mode -ffffffff81d82190 T amdgpu_atombios_encoder_setup_dig_encoder -ffffffff81d82670 t amdgpu_atombios_encoder_get_bpc -ffffffff81d826c0 T amdgpu_atombios_encoder_set_edp_panel_power -ffffffff81d827c0 T amdgpu_atombios_encoder_dpms -ffffffff81d82930 t amdgpu_atombios_encoder_setup_dig -ffffffff81d82ce0 t amdgpu_atombios_encoder_setup_dvo -ffffffff81d82e90 T amdgpu_atombios_encoder_set_crtc_source -ffffffff81d83270 T amdgpu_atombios_encoder_init_dig -ffffffff81d83340 t amdgpu_atombios_encoder_setup_external_encoder -ffffffff81d835b0 T amdgpu_atombios_encoder_dac_detect -ffffffff81d83770 T amdgpu_atombios_encoder_dig_detect -ffffffff81d83870 T amdgpu_atombios_encoder_setup_ext_encoder_ddc -ffffffff81d838c0 T amdgpu_atombios_encoder_set_bios_scratch_regs -ffffffff81d83e10 T amdgpu_atombios_encoder_get_lcd_info -ffffffff81d84170 T amdgpu_atombios_encoder_get_dig_info -ffffffff81d841e0 t amdgpu_atombios_encoder_update_backlight_status -ffffffff81d85000 T amdgpu_atombios_i2c_xfer -ffffffff81d85370 T amdgpu_atombios_i2c_func -ffffffff81d853a0 T amdgpu_atombios_i2c_channel_trans -ffffffff81d86000 T amdgpu_atomfirmware_query_firmware_capability -ffffffff81d860a0 T amdgpu_atomfirmware_gpu_virtualization_supported -ffffffff81d860e0 T amdgpu_atomfirmware_scratch_regs_init -ffffffff81d86160 T amdgpu_atomfirmware_allocate_fb_scratch -ffffffff81d86360 T amdgpu_atomfirmware_get_vram_info -ffffffff81d86800 t convert_atom_mem_type_to_vram_type -ffffffff81d86880 T amdgpu_atomfirmware_mem_ecc_supported -ffffffff81d86950 T amdgpu_atomfirmware_sram_ecc_supported -ffffffff81d86990 T amdgpu_atomfirmware_dynamic_boot_config_supported -ffffffff81d869d0 T amdgpu_atomfirmware_ras_rom_addr -ffffffff81d86a80 T amdgpu_atomfirmware_get_clock_info -ffffffff81d86cd0 T amdgpu_atomfirmware_get_gfx_info -ffffffff81d86e50 T amdgpu_atomfirmware_mem_training_supported -ffffffff81d86e90 T amdgpu_atomfirmware_get_fw_reserved_fb_size -ffffffff81d86f20 T amdgpu_atomfirmware_asic_init -ffffffff81d88000 T amdgpu_benchmark -ffffffff81d88790 t amdgpu_benchmark_move -ffffffff81d89000 T amdgpu_read_bios -ffffffff81d89190 t check_atom_bios -ffffffff81d892a0 T amdgpu_get_bios -ffffffff81d897c0 t igp_read_bios_from_vram -ffffffff81d89900 t amdgpu_read_platform_bios -ffffffff81d899d0 T amdgpu_soc15_read_bios_from_rom -ffffffff81d8a000 T amdgpu_bo_list_create -ffffffff81d8a270 t amdgpu_bo_list_entry_cmp -ffffffff81d8a2b0 T amdgpu_bo_list_get -ffffffff81d8a320 T amdgpu_bo_list_put -ffffffff81d8a3d0 T amdgpu_bo_create_list_entry_array -ffffffff81d8a520 T amdgpu_bo_list_ioctl -ffffffff81d8b000 T amdgpu_cgs_create_device -ffffffff81d8b080 T amdgpu_cgs_destroy_device -ffffffff81d8b0a0 t amdgpu_cgs_read_register -ffffffff81d8b0c0 t amdgpu_cgs_write_register -ffffffff81d8b0e0 t amdgpu_cgs_read_ind_register -ffffffff81d8b1c0 t amdgpu_cgs_write_ind_register -ffffffff81d8b270 t amdgpu_cgs_get_firmware_info -ffffffff81d8c000 T amdgpu_connector_hotplug -ffffffff81d8c110 T amdgpu_connector_get_monitor_bpc -ffffffff81d8c3a0 T amdgpu_connector_edid -ffffffff81d8c450 T amdgpu_connector_encoder_get_dp_bridge_encoder_id -ffffffff81d8c4d0 T amdgpu_connector_is_dp12_capable -ffffffff81d8c560 T amdgpu_connector_add -ffffffff81d8d150 t amdgpu_connector_dp_detect -ffffffff81d8d4a0 t amdgpu_connector_dvi_force -ffffffff81d8d4f0 t amdgpu_connector_set_property -ffffffff81d8da60 t amdgpu_connector_late_register -ffffffff81d8dac0 t amdgpu_connector_unregister -ffffffff81d8db20 t amdgpu_connector_destroy -ffffffff81d8db90 t amdgpu_connector_best_single_encoder -ffffffff81d8dc00 t amdgpu_connector_dp_get_modes -ffffffff81d8df00 t amdgpu_connector_dp_mode_valid -ffffffff81d8e010 t amdgpu_connector_dvi_encoder -ffffffff81d8e0d0 t amdgpu_connector_get_edid -ffffffff81d8e250 t amdgpu_connector_fixup_lcd_native_mode -ffffffff81d8e390 t amdgpu_connector_add_common_modes -ffffffff81d8e480 t amdgpu_connector_lcd_native_mode -ffffffff81d8e560 t amdgpu_connector_set_lcd_property -ffffffff81d8e650 t amdgpu_connector_vga_detect -ffffffff81d8e890 t amdgpu_connector_vga_get_modes -ffffffff81d8e970 t amdgpu_connector_vga_mode_valid -ffffffff81d8e9c0 t amdgpu_connector_dvi_detect -ffffffff81d8ee70 t amdgpu_connector_dvi_mode_valid -ffffffff81d8ef20 t amdgpu_connector_lvds_detect -ffffffff81d8f060 t amdgpu_connector_lvds_get_modes -ffffffff81d8f1a0 t amdgpu_connector_lvds_mode_valid -ffffffff81d90000 T amdgpu_cs_report_moved_bytes -ffffffff81d90070 T amdgpu_cs_ioctl -ffffffff81d90da0 t amdgpu_cs_parser_bos -ffffffff81d91580 t amdgpu_cs_patch_jobs -ffffffff81d917b0 t amdgpu_cs_vm_handling -ffffffff81d919f0 t amdgpu_cs_sync_rings -ffffffff81d91ba0 t amdgpu_cs_submit -ffffffff81d91f40 t amdgpu_cs_parser_fini -ffffffff81d920b0 T amdgpu_cs_wait_ioctl -ffffffff81d921f0 T amdgpu_cs_fence_to_handle_ioctl -ffffffff81d92390 t amdgpu_cs_get_fence -ffffffff81d92440 T amdgpu_cs_wait_fences_ioctl -ffffffff81d92740 T amdgpu_cs_find_mapping -ffffffff81d92840 t amdgpu_cs_p1_ib -ffffffff81d92950 t amdgpu_cs_p1_user_fence -ffffffff81d92a20 t amdgpu_cs_p1_bo_handles -ffffffff81d92ab0 t amdgpu_cs_bo_validate -ffffffff81d93000 T amdgpu_csa_vaddr -ffffffff81d93060 T amdgpu_allocate_static_csa -ffffffff81d93100 T amdgpu_free_static_csa -ffffffff81d93120 T amdgpu_map_static_csa -ffffffff81d93270 T amdgpu_unmap_static_csa -ffffffff81d94000 T amdgpu_ctx_priority_is_valid -ffffffff81d94060 T amdgpu_ctx_get_entity -ffffffff81d944a0 T amdgpu_ctx_ioctl -ffffffff81d94b60 T amdgpu_ctx_get -ffffffff81d94be0 T amdgpu_ctx_put -ffffffff81d94d50 T amdgpu_ctx_add_fence -ffffffff81d94ed0 T amdgpu_ctx_get_fence -ffffffff81d94f80 T amdgpu_ctx_priority_override -ffffffff81d951a0 T amdgpu_ctx_wait_prev_fence -ffffffff81d95250 T amdgpu_ctx_mgr_init -ffffffff81d952f0 T amdgpu_ctx_mgr_entity_flush -ffffffff81d95400 T amdgpu_ctx_mgr_entity_fini -ffffffff81d956b0 T amdgpu_ctx_mgr_fini -ffffffff81d95760 t amdgpu_ctx_fini -ffffffff81d95930 T amdgpu_ctx_mgr_usage -ffffffff81d95b70 t amdgpu_ctx_set_stable_pstate -ffffffff81d96000 T amdgpu_debugfs_init -ffffffff81d96030 T amdgpu_debugfs_regs_init -ffffffff81d97000 T amdgpu_device_supports_px -ffffffff81d97040 T amdgpu_device_supports_boco -ffffffff81d97070 T amdgpu_device_supports_baco -ffffffff81d970a0 T amdgpu_device_supports_smart_shift -ffffffff81d970e0 T amdgpu_device_mm_access -ffffffff81d97340 T amdgpu_device_wreg -ffffffff81d97440 T amdgpu_device_rreg -ffffffff81d97520 T amdgpu_device_aper_access -ffffffff81d97660 T amdgpu_device_flush_hdp -ffffffff81d97700 T amdgpu_device_invalidate_hdp -ffffffff81d97780 T amdgpu_device_vram_access -ffffffff81d97810 T amdgpu_device_skip_hw_access -ffffffff81d97840 T amdgpu_mm_rreg8 -ffffffff81d978c0 T amdgpu_mm_wreg8 -ffffffff81d97940 T amdgpu_mm_wreg_mmio_rlc -ffffffff81d97a40 T amdgpu_device_indirect_rreg -ffffffff81d97ae0 T amdgpu_device_indirect_rreg_ext -ffffffff81d97be0 T amdgpu_device_indirect_rreg64 -ffffffff81d97ca0 T amdgpu_device_indirect_wreg -ffffffff81d97d30 T amdgpu_device_indirect_wreg_ext -ffffffff81d97e20 T amdgpu_device_indirect_wreg64 -ffffffff81d97ed0 T amdgpu_device_get_rev_id -ffffffff81d97ef0 T amdgpu_device_program_register_sequence -ffffffff81d98140 T amdgpu_device_pci_config_reset -ffffffff81d98170 T amdgpu_device_pci_reset -ffffffff81d981c0 T amdgpu_device_wb_get -ffffffff81d98270 T amdgpu_device_wb_free -ffffffff81d982c0 T amdgpu_device_resize_fb_bar -ffffffff81d982f0 T amdgpu_device_need_post -ffffffff81d984a0 T amdgpu_device_pcie_dynamic_switching_supported -ffffffff81d984f0 T amdgpu_device_should_use_aspm -ffffffff81d98540 T amdgpu_device_aspm_support_quirk -ffffffff81d98590 T amdgpu_device_ip_set_clockgating_state -ffffffff81d98680 T amdgpu_device_ip_set_powergating_state -ffffffff81d98770 T amdgpu_device_ip_get_clockgating_state -ffffffff81d98810 T amdgpu_device_ip_wait_for_idle -ffffffff81d98890 T amdgpu_device_ip_is_idle -ffffffff81d98900 T amdgpu_device_ip_get_ip_block -ffffffff81d98960 T amdgpu_device_ip_block_version_cmp -ffffffff81d989e0 T amdgpu_device_ip_block_add -ffffffff81d98a90 T amdgpu_device_set_sriov_virtual_display -ffffffff81d98b00 T amdgpu_device_set_cg_state -ffffffff81d98c40 T amdgpu_device_set_pg_state -ffffffff81d98d80 T amdgpu_device_ip_suspend -ffffffff81d98e10 t amdgpu_device_ip_suspend_phase1 -ffffffff81d990c0 t amdgpu_device_ip_suspend_phase2 -ffffffff81d99270 T amdgpu_device_asic_has_dc_support -ffffffff81d992d0 T amdgpu_device_has_dc_support -ffffffff81d99350 T amdgpu_device_init -ffffffff81d9ae20 t amdgpu_invalid_rreg -ffffffff81d9ae60 t amdgpu_invalid_wreg -ffffffff81d9aea0 t amdgpu_invalid_rreg_ext -ffffffff81d9aee0 t amdgpu_invalid_wreg_ext -ffffffff81d9af20 t amdgpu_invalid_rreg64 -ffffffff81d9af60 t amdgpu_invalid_wreg64 -ffffffff81d9afa0 t amdgpu_block_invalid_rreg -ffffffff81d9afe0 t amdgpu_block_invalid_wreg -ffffffff81d9b020 t amdgpu_device_delayed_init_work_handler -ffffffff81d9b080 t amdgpu_device_delay_enable_gfx_off -ffffffff81d9b160 t amdgpu_device_xgmi_reset_func -ffffffff81d9b460 t amdgpu_device_detect_sriov_bios -ffffffff81d9b4f0 t amdgpu_device_asic_init -ffffffff81d9b560 t amdgpu_device_ip_init -ffffffff81d9bb20 t amdgpu_device_ip_late_init -ffffffff81d9bf30 T amdgpu_device_cache_pci_state -ffffffff81d9bf60 T amdgpu_device_fini_hw -ffffffff81d9c420 t amdgpu_device_unmap_mmio -ffffffff81d9c510 T amdgpu_device_fini_sw -ffffffff81d9c890 T amdgpu_device_prepare -ffffffff81d9c9a0 T amdgpu_device_suspend -ffffffff81d9cb40 T amdgpu_device_resume -ffffffff81d9ceb0 T amdgpu_device_has_job_running -ffffffff81d9cf80 T amdgpu_device_should_recover_gpu -ffffffff81d9d000 T amdgpu_device_mode1_reset -ffffffff81d9d160 T amdgpu_device_load_pci_state -ffffffff81d9d1b0 T amdgpu_device_pre_asic_reset -ffffffff81d9d680 T amdgpu_do_asic_reset -ffffffff81d9dd00 t amdgpu_device_ip_resume_phase1 -ffffffff81d9de00 t amdgpu_device_fw_loading -ffffffff81d9df60 t amdgpu_device_recover_vram -ffffffff81d9e140 T amdgpu_device_gpu_recover -ffffffff81d9eea0 T amdgpu_device_is_peer_accessible -ffffffff81d9eed0 T amdgpu_device_baco_enter -ffffffff81d9ef80 T amdgpu_device_baco_exit -ffffffff81d9f060 T amdgpu_pci_error_detected -ffffffff81d9f0b0 T amdgpu_pci_mmio_enabled -ffffffff81d9f100 T amdgpu_pci_slot_reset -ffffffff81d9f150 T amdgpu_pci_resume -ffffffff81d9f170 T amdgpu_in_reset -ffffffff81d9f1a0 T amdgpu_device_halt -ffffffff81d9f1f0 T amdgpu_device_pcie_port_rreg -ffffffff81d9f420 T amdgpu_device_pcie_port_wreg -ffffffff81d9f6e0 T amdgpu_device_switch_gang -ffffffff81d9f770 T amdgpu_device_has_display_hardware -ffffffff81d9f7d0 T amdgpu_device_wait_on_rreg -ffffffff81d9f9d0 t __delayed_work_tick -ffffffff81d9f9f0 t amdgpu_device_ip_hw_init_phase2 -ffffffff81d9fad0 t amdgpu_device_init_schedulers -ffffffff81da0000 T amdgpu_discovery_fini -ffffffff81da0050 T amdgpu_discovery_set_ip_blocks -ffffffff81da24c0 t amdgpu_discovery_set_psp_ip_blocks -ffffffff81da2600 t amdgpu_discovery_set_ih_ip_blocks -ffffffff81da2740 t amdgpu_discovery_set_smu_ip_blocks -ffffffff81da2850 t amdgpu_discovery_set_display_ip_blocks -ffffffff81da29f0 t amdgpu_discovery_set_gc_ip_blocks -ffffffff81da2b20 t amdgpu_discovery_set_sdma_ip_blocks -ffffffff81da2c60 t amdgpu_discovery_set_mm_ip_blocks -ffffffff81da3000 t amdgpu_discovery_set_mes_ip_blocks -ffffffff81da4000 T amdgpu_display_hotplug_work_func -ffffffff81da40a0 T amdgpu_display_crtc_page_flip_target -ffffffff81da44b0 t amdgpu_display_flip_work_func -ffffffff81da46f0 t amdgpu_display_unpin_work_func -ffffffff81da4780 t amdgpu_bo_reserve -ffffffff81da4980 T amdgpu_display_supported_domains -ffffffff81da49f0 t amdgpu_bo_unreserve -ffffffff81da4ad0 T amdgpu_display_crtc_set_config -ffffffff81da4b90 T amdgpu_display_print_display_setup -ffffffff81da4fb0 T amdgpu_display_ddc_probe -ffffffff81da5070 T amdgpu_lookup_format_info -ffffffff81da52e0 T amdgpu_display_user_framebuffer_create -ffffffff81da60b0 T amdgpu_display_modeset_create_props -ffffffff81da6280 T amdgpu_display_update_priority -ffffffff81da62c0 T amdgpu_display_crtc_scaling_mode_fixup -ffffffff81da6540 T amdgpu_display_get_crtc_scanoutpos -ffffffff81da6750 T amdgpu_display_crtc_idx_to_irq_type -ffffffff81da67a0 T amdgpu_crtc_get_scanout_position -ffffffff81da6810 T amdgpu_display_suspend_helper -ffffffff81da6990 T amdgpu_display_resume_helper -ffffffff81da6af0 t __delayed_work_tick -ffffffff81da6b10 t amdgpu_display_flip_callback -ffffffff81da6b50 t amdgpu_display_verify_plane -ffffffff81da6d40 t get_dcc_block_size -ffffffff81da6de0 t amdgpu_dirtyfb -ffffffff81da7000 T amdgpu_gem_prime_export -ffffffff81da7080 T amdgpu_gem_prime_import -ffffffff81da7360 T amdgpu_dmabuf_is_xgmi_accessible -ffffffff81da8000 T amdgpu_mm_rdoorbell -ffffffff81da8080 T amdgpu_mm_wdoorbell -ffffffff81da8110 T amdgpu_mm_rdoorbell64 -ffffffff81da8190 T amdgpu_mm_wdoorbell64 -ffffffff81da8220 T amdgpu_doorbell_index_on_bar -ffffffff81da8280 T amdgpu_doorbell_create_kernel_doorbells -ffffffff81da8350 T amdgpu_doorbell_init -ffffffff81da8460 T amdgpu_doorbell_fini -ffffffff81da9000 t amdgpu_drv_delayed_reset_work_handler -ffffffff81da9360 t __delayed_work_tick -ffffffff81da9380 T amdgpu_file_to_fpriv -ffffffff81da93d0 T amdgpu_probe -ffffffff81da9500 T amdgpu_attach -ffffffff81da9b80 T amdgpu_detach -ffffffff81da9c20 T amdgpu_activate -ffffffff81da9ce0 T amdgpu_attachhook -ffffffff81daa0e0 T amdgpu_forcedetach -ffffffff81daa1a0 T amdgpu_wsioctl -ffffffff81daa2d0 T amdgpu_wsmmap -ffffffff81daa300 T amdgpu_alloc_screen -ffffffff81daa330 T amdgpu_free_screen -ffffffff81daa340 T amdgpu_show_screen -ffffffff81daa410 T amdgpu_burner -ffffffff81daa490 T amdgpu_enter_ddb -ffffffff81daa4f0 T amdgpu_doswitch -ffffffff81daa570 T amdgpu_init_backlight -ffffffff81daa690 T amdgpu_burner_cb -ffffffff81dab000 T amdgpu_eeprom_read -ffffffff81dab020 t amdgpu_eeprom_xfer -ffffffff81dab190 T amdgpu_eeprom_write -ffffffff81dab1b0 t __amdgpu_eeprom_xfer -ffffffff81dac000 T amdgpu_link_encoder_connector -ffffffff81dac0e0 T amdgpu_encoder_set_active_device -ffffffff81dac1a0 T amdgpu_get_connector_for_encoder -ffffffff81dac230 T amdgpu_get_connector_for_encoder_init -ffffffff81dac2c0 T amdgpu_get_external_encoder -ffffffff81dac350 T amdgpu_encoder_get_dp_bridge_encoder_id -ffffffff81dac3f0 T amdgpu_panel_mode_fixup -ffffffff81dac570 T amdgpu_dig_monitor_is_duallink -ffffffff81dad000 T amdgpu_show_fdinfo -ffffffff81dae000 T amdgpu_fence_slab_init -ffffffff81dae060 T amdgpu_fence_slab_fini -ffffffff81dae080 T amdgpu_fence_emit -ffffffff81dae2c0 T amdgpu_fence_emit_polling -ffffffff81dae3d0 T amdgpu_fence_wait_polling -ffffffff81dae480 T amdgpu_fence_process -ffffffff81dae5b0 T amdgpu_fence_wait_empty -ffffffff81dae630 T amdgpu_fence_count_emitted -ffffffff81dae660 T amdgpu_fence_last_unsignaled_time_us -ffffffff81dae770 T amdgpu_fence_update_start_timestamp -ffffffff81dae7e0 T amdgpu_fence_driver_start_ring -ffffffff81dae8b0 T amdgpu_fence_driver_init_ring -ffffffff81dae9a0 t amdgpu_fence_fallback -ffffffff81daea00 T amdgpu_fence_driver_sw_init -ffffffff81daea30 T amdgpu_fence_driver_hw_fini -ffffffff81daec60 T amdgpu_fence_driver_force_completion -ffffffff81daecf0 T amdgpu_fence_driver_isr_toggle -ffffffff81daed10 T amdgpu_fence_driver_sw_fini -ffffffff81daedf0 T amdgpu_fence_driver_hw_init -ffffffff81daeeb0 T amdgpu_fence_driver_clear_job_fences -ffffffff81daef60 T amdgpu_fence_driver_set_error -ffffffff81daefe0 T amdgpu_debugfs_fence_init -ffffffff81daf010 t amdgpu_fence_get_driver_name -ffffffff81daf040 t amdgpu_fence_get_timeline_name -ffffffff81daf0a0 t amdgpu_fence_enable_signaling -ffffffff81daf140 t amdgpu_fence_release -ffffffff81daf180 t amdgpu_job_fence_get_timeline_name -ffffffff81daf1c0 t amdgpu_job_fence_enable_signaling -ffffffff81daf240 t amdgpu_job_fence_release -ffffffff81db0000 T amdgpu_fru_get_product_info -ffffffff81db0370 t is_fru_eeprom_supported -ffffffff81db04c0 T amdgpu_fru_sysfs_init -ffffffff81db0500 T amdgpu_fru_sysfs_fini -ffffffff81db1000 T amdgpu_fw_attestation_debugfs_init -ffffffff81db2000 T amdgpu_gart_dummy_page_fini -ffffffff81db2040 T amdgpu_gart_table_ram_alloc -ffffffff81db2090 T amdgpu_gart_table_ram_free -ffffffff81db2370 T amdgpu_gart_table_vram_alloc -ffffffff81db23e0 T amdgpu_gart_table_vram_free -ffffffff81db2410 T amdgpu_gart_unbind -ffffffff81db2590 T amdgpu_gart_map -ffffffff81db2660 T amdgpu_gart_bind -ffffffff81db2730 T amdgpu_gart_invalidate_tlb -ffffffff81db2840 T amdgpu_gart_init -ffffffff81db3000 T amdgpu_gem_fault -ffffffff81db31b0 T amdgpu_gem_vm_reference -ffffffff81db31e0 T amdgpu_gem_vm_detach -ffffffff81db31f0 T amdgpu_gem_object_create -ffffffff81db32b0 T amdgpu_gem_force_release -ffffffff81db3440 T amdgpu_gem_create_ioctl -ffffffff81db3900 t amdgpu_bo_reserve -ffffffff81db3a80 t amdgpu_bo_unreserve -ffffffff81db3b60 T amdgpu_gem_userptr_ioctl -ffffffff81db3b90 T amdgpu_mode_dumb_mmap -ffffffff81db3c50 T amdgpu_gem_mmap_ioctl -ffffffff81db3d10 T amdgpu_gem_timeout -ffffffff81db3de0 T amdgpu_gem_wait_idle_ioctl -ffffffff81db3f40 T amdgpu_gem_metadata_ioctl -ffffffff81db4080 T amdgpu_gem_va_map_flags -ffffffff81db4100 T amdgpu_gem_va_ioctl -ffffffff81db4400 t amdgpu_gem_va_update_vm -ffffffff81db44c0 T amdgpu_gem_op_ioctl -ffffffff81db46c0 T amdgpu_mode_dumb_create -ffffffff81db4870 T amdgpu_debugfs_gem_init -ffffffff81db48a0 t amdgpu_gem_object_free -ffffffff81db48f0 t amdgpu_gem_object_open -ffffffff81db49b0 t amdgpu_gem_object_close -ffffffff81db4bd0 t amdgpu_gem_object_mmap -ffffffff81db5000 T amdgpu_gfx_mec_queue_to_bit -ffffffff81db5040 T amdgpu_queue_mask_bit_to_mec_queue -ffffffff81db50b0 T amdgpu_gfx_is_mec_queue_enabled -ffffffff81db5120 T amdgpu_gfx_me_queue_to_bit -ffffffff81db5160 T amdgpu_gfx_bit_to_me_queue -ffffffff81db51d0 T amdgpu_gfx_is_me_queue_enabled -ffffffff81db5220 T amdgpu_gfx_parse_disable_cu -ffffffff81db5240 T amdgpu_gfx_is_high_priority_graphics_queue -ffffffff81db52d0 T amdgpu_gfx_is_high_priority_compute_queue -ffffffff81db5310 T amdgpu_gfx_compute_queue_acquire -ffffffff81db5500 T amdgpu_gfx_graphics_queue_acquire -ffffffff81db5730 T amdgpu_gfx_kiq_init_ring -ffffffff81db5980 T amdgpu_gfx_kiq_free_ring -ffffffff81db5990 T amdgpu_gfx_kiq_fini -ffffffff81db59d0 T amdgpu_gfx_kiq_init -ffffffff81db5cf0 T amdgpu_gfx_mqd_sw_init -ffffffff81db6080 T amdgpu_gfx_mqd_sw_fini -ffffffff81db61e0 T amdgpu_gfx_disable_kcq -ffffffff81db6350 T amdgpu_gfx_disable_kgq -ffffffff81db64d0 T amdgpu_gfx_is_master_xcc -ffffffff81db6520 T amdgpu_queue_mask_bit_to_set_resource_bit -ffffffff81db6570 T amdgpu_gfx_enable_kcq -ffffffff81db67e0 T amdgpu_gfx_enable_kgq -ffffffff81db6970 T amdgpu_gfx_off_ctrl -ffffffff81db6b50 T amdgpu_set_gfx_off_residency -ffffffff81db6bc0 T amdgpu_get_gfx_off_residency -ffffffff81db6c30 T amdgpu_get_gfx_off_entrycount -ffffffff81db6ca0 T amdgpu_get_gfx_off_status -ffffffff81db6d10 T amdgpu_gfx_ras_late_init -ffffffff81db6de0 T amdgpu_gfx_ras_sw_init -ffffffff81db6ee0 T amdgpu_gfx_process_ras_data_cb -ffffffff81db6f60 T amdgpu_gfx_poison_consumption_handler -ffffffff81db6fb0 T amdgpu_gfx_cp_ecc_error_irq -ffffffff81db7050 T amdgpu_gfx_ras_error_func -ffffffff81db7160 T amdgpu_kiq_rreg -ffffffff81db73e0 T amdgpu_kiq_wreg -ffffffff81db7620 T amdgpu_gfx_get_num_kcq -ffffffff81db76a0 T amdgpu_gfx_cp_init_microcode -ffffffff81db7910 T amdgpu_gfx_sysfs_init -ffffffff81db7940 T amdgpu_gfx_sysfs_fini -ffffffff81db8000 T amdgpu_gmc_pdb0_alloc -ffffffff81db8290 t amdgpu_bo_unreserve -ffffffff81db8370 T amdgpu_gmc_get_pde_for_bo -ffffffff81db8420 T amdgpu_gmc_pd_addr -ffffffff81db8510 T amdgpu_gmc_set_pte_pde -ffffffff81db8560 T amdgpu_gmc_agp_addr -ffffffff81db85d0 T amdgpu_gmc_vram_location -ffffffff81db8660 T amdgpu_gmc_sysvm_location -ffffffff81db86d0 T amdgpu_gmc_gart_location -ffffffff81db87e0 T amdgpu_gmc_agp_location -ffffffff81db88d0 T amdgpu_gmc_filter_faults -ffffffff81db8a80 T amdgpu_gmc_filter_faults_remove -ffffffff81db8c00 T amdgpu_gmc_ras_sw_init -ffffffff81db8c90 T amdgpu_gmc_ras_late_init -ffffffff81db8cc0 T amdgpu_gmc_ras_fini -ffffffff81db8cf0 T amdgpu_gmc_allocate_vm_inv_eng -ffffffff81db8ec0 T amdgpu_gmc_tmz_set -ffffffff81db8f60 T amdgpu_gmc_noretry_set -ffffffff81db8fd0 T amdgpu_gmc_set_vm_fault_masks -ffffffff81db91a0 T amdgpu_gmc_get_vbios_allocations -ffffffff81db9300 T amdgpu_gmc_init_pdb0 -ffffffff81db9460 T amdgpu_gmc_vram_pa -ffffffff81db94b0 T amdgpu_gmc_vram_mc2pa -ffffffff81db94f0 T amdgpu_gmc_vram_cpu_pa -ffffffff81db9540 T amdgpu_gmc_vram_checking -ffffffff81db9660 T amdgpu_gmc_sysfs_init -ffffffff81db9690 T amdgpu_gmc_sysfs_fini -ffffffff81dba000 T amdgpu_gtt_mgr_has_gart_addr -ffffffff81dba030 T amdgpu_gtt_mgr_recover -ffffffff81dba0b0 T amdgpu_gtt_mgr_init -ffffffff81dba240 T amdgpu_gtt_mgr_fini -ffffffff81dba3c0 t amdgpu_gtt_mgr_new -ffffffff81dba550 t amdgpu_gtt_mgr_del -ffffffff81dba5c0 t amdgpu_gtt_mgr_intersects -ffffffff81dba600 t amdgpu_gtt_mgr_compatible -ffffffff81dba640 t amdgpu_gtt_mgr_debug -ffffffff81dbb000 T amdgpu_hdp_ras_sw_init -ffffffff81dbc000 T amdgpu_bb_set_bits -ffffffff81dbc0c0 T amdgpu_bb_set_dir -ffffffff81dbc0f0 T amdgpu_bb_read_bits -ffffffff81dbc180 T amdgpu_acquire_bus -ffffffff81dbc350 T amdgpu_release_bus -ffffffff81dbc410 T amdgpu_send_start -ffffffff81dbc430 T amdgpu_send_stop -ffffffff81dbc450 T amdgpu_initiate_xfer -ffffffff81dbc470 T amdgpu_read_byte -ffffffff81dbc490 T amdgpu_write_byte -ffffffff81dbc4b0 T amdgpu_i2c_create -ffffffff81dbc660 T amdgpu_i2c_destroy -ffffffff81dbc6e0 T amdgpu_i2c_init -ffffffff81dbc720 T amdgpu_i2c_fini -ffffffff81dbc7d0 T amdgpu_i2c_add -ffffffff81dbc980 T amdgpu_i2c_lookup -ffffffff81dbcb50 T amdgpu_i2c_router_select_ddc_port -ffffffff81dbcdb0 T amdgpu_i2c_router_select_cd_port -ffffffff81dbe000 T amdgpu_ib_get -ffffffff81dbe0f0 T amdgpu_ib_free -ffffffff81dbe110 T amdgpu_ib_schedule -ffffffff81dbe8a0 T amdgpu_ib_pool_init -ffffffff81dbe9c0 T amdgpu_ib_pool_fini -ffffffff81dbea30 T amdgpu_ib_ring_tests -ffffffff81dbebe0 T amdgpu_debugfs_sa_init -ffffffff81dbf000 T amdgpu_pasid_alloc -ffffffff81dbf090 T amdgpu_pasid_free -ffffffff81dbf0b0 T amdgpu_pasid_free_delayed -ffffffff81dbf1c0 t amdgpu_pasid_free_cb -ffffffff81dbf200 T amdgpu_vmid_had_gpu_reset -ffffffff81dbf240 T amdgpu_vmid_grab -ffffffff81dbfaa0 T amdgpu_vmid_alloc_reserved -ffffffff81dbfb50 T amdgpu_vmid_free_reserved -ffffffff81dbfbe0 T amdgpu_vmid_reset -ffffffff81dbfc60 T amdgpu_vmid_reset_all -ffffffff81dbfd60 T amdgpu_vmid_mgr_init -ffffffff81dbff40 T amdgpu_vmid_mgr_fini -ffffffff81dc0000 T amdgpu_ih_ring_init -ffffffff81dc01f0 T amdgpu_ih_ring_fini -ffffffff81dc02b0 T amdgpu_ih_ring_write -ffffffff81dc0430 T amdgpu_ih_wait_on_checkpoint_process_ts -ffffffff81dc0710 T amdgpu_ih_process -ffffffff81dc08a0 T amdgpu_ih_decode_iv_helper -ffffffff81dc0980 T amdgpu_ih_decode_iv_ts_helper -ffffffff81dc1000 T amdgpu_irq_disable_all -ffffffff81dc10f0 T amdgpu_irq_handler -ffffffff81dc1160 T amdgpu_msi_ok -ffffffff81dc1190 T amdgpu_irq_init -ffffffff81dc1290 t amdgpu_irq_handle_ih1 -ffffffff81dc12c0 t amdgpu_irq_handle_ih2 -ffffffff81dc12f0 t amdgpu_irq_handle_ih_soft -ffffffff81dc1320 T amdgpu_irq_fini_hw -ffffffff81dc1390 T amdgpu_irq_fini_sw -ffffffff81dc1460 T amdgpu_irq_add_id -ffffffff81dc1550 T amdgpu_irq_dispatch -ffffffff81dc16e0 T amdgpu_irq_delegate -ffffffff81dc1730 T amdgpu_irq_update -ffffffff81dc17f0 T amdgpu_irq_enabled -ffffffff81dc1850 T amdgpu_irq_gpu_reset_resume_helper -ffffffff81dc19a0 T amdgpu_irq_get -ffffffff81dc1aa0 T amdgpu_irq_put -ffffffff81dc1bd0 T amdgpu_irq_add_domain -ffffffff81dc1c00 T amdgpu_irq_remove_domain -ffffffff81dc1c20 T amdgpu_irq_create_mapping -ffffffff81dc2000 T amdgpu_job_alloc -ffffffff81dc2100 T amdgpu_job_alloc_with_ib -ffffffff81dc2240 T amdgpu_job_set_resources -ffffffff81dc2310 T amdgpu_job_free_resources -ffffffff81dc23d0 T amdgpu_job_set_gang_leader -ffffffff81dc2460 T amdgpu_job_free -ffffffff81dc2580 T amdgpu_job_submit -ffffffff81dc2670 T amdgpu_job_submit_direct -ffffffff81dc26f0 T amdgpu_job_stop_all_jobs_on_sched -ffffffff81dc2850 t amdgpu_job_prepare_job -ffffffff81dc2930 t amdgpu_job_run -ffffffff81dc2ad0 t amdgpu_job_timedout -ffffffff81dc2d10 t amdgpu_job_free_cb -ffffffff81dc3000 T amdgpu_jpeg_sw_init -ffffffff81dc30a0 t amdgpu_jpeg_idle_work_handler -ffffffff81dc31b0 T amdgpu_jpeg_sw_fini -ffffffff81dc3280 T amdgpu_jpeg_suspend -ffffffff81dc32f0 T amdgpu_jpeg_resume -ffffffff81dc3320 T amdgpu_jpeg_ring_begin_use -ffffffff81dc33a0 T amdgpu_jpeg_ring_end_use -ffffffff81dc3400 T amdgpu_jpeg_dec_ring_test_ring -ffffffff81dc3640 T amdgpu_jpeg_dec_ring_test_ib -ffffffff81dc38e0 T amdgpu_jpeg_process_poison_irq -ffffffff81dc3970 T amdgpu_jpeg_ras_late_init -ffffffff81dc3a80 T amdgpu_jpeg_ras_sw_init -ffffffff81dc3b60 t __delayed_work_tick -ffffffff81dc4000 T amdgpu_unregister_gpu_instance -ffffffff81dc40a0 T amdgpu_driver_unload_kms -ffffffff81dc41c0 T amdgpu_register_gpu_instance -ffffffff81dc4240 T amdgpu_driver_load_kms -ffffffff81dc43a0 T amdgpu_info_ioctl -ffffffff81dc5a50 t amdgpu_hw_ip_info -ffffffff81dc65b0 t amdgpu_firmware_info -ffffffff81dc6990 T amdgpu_driver_lastclose_kms -ffffffff81dc69a0 T amdgpu_driver_open_kms -ffffffff81dc6bf0 T amdgpu_driver_postclose_kms -ffffffff81dc6fe0 T amdgpu_driver_release_kms -ffffffff81dc7000 T amdgpu_get_vblank_counter_kms -ffffffff81dc7190 T amdgpu_enable_vblank_kms -ffffffff81dc71d0 T amdgpu_disable_vblank_kms -ffffffff81dc7210 T amdgpu_debugfs_firmware_init -ffffffff81dc8000 T amdgpu_lsdma_wait_for -ffffffff81dc80a0 T amdgpu_lsdma_copy_mem -ffffffff81dc8140 T amdgpu_lsdma_fill_mem -ffffffff81dc9000 T amdgpu_mca_query_correctable_error_count -ffffffff81dc9060 T amdgpu_mca_query_uncorrectable_error_count -ffffffff81dc90c0 T amdgpu_mca_reset_error_count -ffffffff81dc90e0 T amdgpu_mca_query_ras_error_count -ffffffff81dc9170 T amdgpu_mca_mp0_ras_sw_init -ffffffff81dc9240 T amdgpu_mca_mp1_ras_sw_init -ffffffff81dc9310 T amdgpu_mca_mpio_ras_sw_init -ffffffff81dca000 T amdgpu_mes_doorbell_process_slice -ffffffff81dca030 T amdgpu_mes_init -ffffffff81dca410 T amdgpu_mes_fini -ffffffff81dca490 T amdgpu_mes_create_process -ffffffff81dca660 T amdgpu_mes_destroy_process -ffffffff81dca920 T amdgpu_mes_add_gang -ffffffff81dcab40 T amdgpu_mes_remove_gang -ffffffff81dcac50 T amdgpu_mes_suspend -ffffffff81dcad60 T amdgpu_mes_resume -ffffffff81dcae70 T amdgpu_mes_add_hw_queue -ffffffff81dcb770 T amdgpu_mes_remove_hw_queue -ffffffff81dcb950 T amdgpu_mes_unmap_legacy_queue -ffffffff81dcb9f0 T amdgpu_mes_rreg -ffffffff81dcbaa0 T amdgpu_mes_wreg -ffffffff81dcbb50 T amdgpu_mes_reg_write_reg_wait -ffffffff81dcbc00 T amdgpu_mes_reg_wait -ffffffff81dcbca0 T amdgpu_mes_set_shader_debugger -ffffffff81dcbdd0 T amdgpu_mes_flush_shader_debugger -ffffffff81dcbed0 T amdgpu_mes_ctx_get_offs -ffffffff81dcc0a0 T amdgpu_mes_add_ring -ffffffff81dcc4a0 T amdgpu_mes_remove_ring -ffffffff81dcc500 T amdgpu_mes_get_aggregated_doorbell_index -ffffffff81dcc530 T amdgpu_mes_ctx_alloc_meta_data -ffffffff81dcc600 T amdgpu_mes_ctx_free_meta_data -ffffffff81dcc640 T amdgpu_mes_ctx_map_meta_data -ffffffff81dcc830 T amdgpu_mes_ctx_unmap_meta_data -ffffffff81dcca40 T amdgpu_mes_self_test -ffffffff81dcd020 t amdgpu_mes_test_queues -ffffffff81dcd2f0 T amdgpu_mes_init_microcode -ffffffff81dce000 T amdgpu_mmhub_ras_sw_init -ffffffff81dcf000 T amdgpu_nbio_ras_sw_init -ffffffff81dcf0d0 T amdgpu_nbio_get_pcie_replay_count -ffffffff81dcf120 T amdgpu_nbio_get_pcie_usage -ffffffff81dcf170 T amdgpu_nbio_ras_late_init -ffffffff81dd0000 T amdgpu_bo_is_amdgpu_bo -ffffffff81dd0070 t amdgpu_bo_destroy -ffffffff81dd0100 t amdgpu_bo_user_destroy -ffffffff81dd01a0 t amdgpu_bo_vm_destroy -ffffffff81dd02a0 T amdgpu_bo_placement_from_domain -ffffffff81dd0520 T amdgpu_bo_create_reserved -ffffffff81dd0870 T amdgpu_bo_unref -ffffffff81dd08c0 T amdgpu_bo_create -ffffffff81dd0d10 t amdgpu_bo_reserve -ffffffff81dd0f10 T amdgpu_bo_pin -ffffffff81dd0f30 T amdgpu_bo_gpu_offset -ffffffff81dd1110 T amdgpu_bo_kmap -ffffffff81dd11d0 T amdgpu_bo_unpin -ffffffff81dd1280 t amdgpu_bo_unreserve -ffffffff81dd1360 T amdgpu_bo_create_kernel -ffffffff81dd13d0 T amdgpu_bo_create_kernel_at -ffffffff81dd15e0 T amdgpu_bo_kunmap -ffffffff81dd1620 T amdgpu_bo_free_kernel -ffffffff81dd1790 T amdgpu_bo_support_uswc -ffffffff81dd17c0 t dma_resv_unlock -ffffffff81dd1860 T amdgpu_bo_create_user -ffffffff81dd18c0 T amdgpu_bo_create_vm -ffffffff81dd1940 T amdgpu_bo_add_to_shadow_list -ffffffff81dd1a10 T amdgpu_bo_ref -ffffffff81dd1a50 T amdgpu_bo_restore_shadow -ffffffff81dd1ae0 T amdgpu_bo_kptr -ffffffff81dd1b10 T amdgpu_bo_pin_restricted -ffffffff81dd1ec0 T amdgpu_bo_get_preferred_domain -ffffffff81dd1f20 T amdgpu_bo_init -ffffffff81dd2000 T amdgpu_bo_fini -ffffffff81dd2090 T amdgpu_bo_set_tiling_flags -ffffffff81dd2120 T amdgpu_bo_get_tiling_flags -ffffffff81dd2190 T amdgpu_bo_set_metadata -ffffffff81dd22d0 T amdgpu_bo_get_metadata -ffffffff81dd23a0 T amdgpu_bo_move_notify -ffffffff81dd2450 T amdgpu_bo_get_memory -ffffffff81dd25b0 T amdgpu_bo_release_notify -ffffffff81dd27a0 t dma_resv_trylock -ffffffff81dd2840 T amdgpu_bo_fence -ffffffff81dd28b0 T amdgpu_bo_fault_reserve_notify -ffffffff81dd2a00 T amdgpu_bo_sync_wait_resv -ffffffff81dd2aa0 T amdgpu_bo_sync_wait -ffffffff81dd2b50 T amdgpu_bo_gpu_offset_no_check -ffffffff81dd3000 T amdgpu_pll_compute -ffffffff81dd3590 T amdgpu_pll_get_use_mask -ffffffff81dd3600 T amdgpu_pll_get_shared_dp_ppll -ffffffff81dd36b0 T amdgpu_pll_get_shared_nondp_ppll -ffffffff81dd4000 T amdgpu_preempt_mgr_init -ffffffff81dd4150 T amdgpu_preempt_mgr_fini -ffffffff81dd42b0 t amdgpu_preempt_mgr_new -ffffffff81dd4340 t amdgpu_preempt_mgr_del -ffffffff81dd5000 T psp_ta_free_shared_buf -ffffffff81dd5050 T psp_wait_for -ffffffff81dd5120 T psp_wait_for_spirom_update -ffffffff81dd51d0 T psp_get_fw_attestation_records_addr -ffffffff81dd5290 t psp_cmd_submit_buf -ffffffff81dd5530 T psp_spatial_partition -ffffffff81dd55e0 T psp_ta_unload -ffffffff81dd5690 T psp_reg_program -ffffffff81dd5750 T psp_ta_init_shared_buf -ffffffff81dd57b0 T psp_ta_invoke -ffffffff81dd5860 T psp_ta_load -ffffffff81dd5990 T psp_copy_fw -ffffffff81dd5a20 T psp_xgmi_invoke -ffffffff81dd5ad0 T psp_xgmi_terminate -ffffffff81dd5bc0 T psp_xgmi_initialize -ffffffff81dd5d50 T psp_xgmi_get_hive_id -ffffffff81dd5e40 T psp_xgmi_get_node_id -ffffffff81dd5f30 T psp_xgmi_get_topology_info -ffffffff81dd6340 T psp_xgmi_set_topology_info -ffffffff81dd6480 T psp_ras_invoke -ffffffff81dd6720 T psp_ras_enable_features -ffffffff81dd67d0 T psp_ras_terminate -ffffffff81dd68a0 T psp_ras_initialize -ffffffff81dd6ce0 T psp_ras_trigger_error -ffffffff81dd6e20 T psp_hdcp_invoke -ffffffff81dd6ee0 T psp_dtm_invoke -ffffffff81dd6fa0 T psp_rap_invoke -ffffffff81dd7130 T psp_securedisplay_invoke -ffffffff81dd7200 T amdgpu_psp_wait_for_bootloader -ffffffff81dd7260 T psp_execute_ip_fw_load -ffffffff81dd7350 T psp_load_fw_list -ffffffff81dd73e0 t psp_print_fw_hdr -ffffffff81dd74b0 T psp_gpu_reset -ffffffff81dd7540 T psp_rlc_autoload_start -ffffffff81dd75d0 T psp_ring_cmd_submit -ffffffff81dd7760 T psp_init_asd_microcode -ffffffff81dd7830 T psp_init_toc_microcode -ffffffff81dd7900 T psp_init_sos_microcode -ffffffff81dd7f10 T psp_init_ta_microcode -ffffffff81dd8300 T psp_init_cap_microcode -ffffffff81dd84a0 T is_psp_fw_valid -ffffffff81dd84d0 t psp_early_init -ffffffff81dd8890 t psp_sw_init -ffffffff81dd8bc0 t psp_sw_fini -ffffffff81dd8d00 t psp_hw_init -ffffffff81dd9150 t psp_hw_fini -ffffffff81dd9590 t psp_suspend -ffffffff81dd9a00 t psp_resume -ffffffff81dd9dc0 t psp_set_clockgating_state -ffffffff81dd9df0 t psp_set_powergating_state -ffffffff81dd9e20 t psp_gfx_cmd_name -ffffffff81dd9e60 t psp_get_runtime_db_entry -ffffffff81dda060 t psp_free_shared_bufs -ffffffff81dda1b0 t psp_hw_start -ffffffff81dda6f0 t psp_load_non_psp_fw -ffffffff81ddaa10 t psp_hdcp_initialize -ffffffff81ddab10 t psp_dtm_initialize -ffffffff81ddac10 t psp_rap_initialize -ffffffff81ddae20 t psp_load_smu_fw -ffffffff81ddaf20 t psp_securedisplay_terminate -ffffffff81ddaff0 t psp_tmr_terminate -ffffffff81ddc000 T amdgpu_ta_if_debugfs_init -ffffffff81ddd000 T amdgpu_rap_debugfs_init -ffffffff81dde000 T get_ras_block_str -ffffffff81dde060 T amdgpu_ras_set_error_query_ready -ffffffff81dde0a0 T amdgpu_ras_get_context -ffffffff81dde0e0 T amdgpu_ras_find_obj -ffffffff81dde2e0 T amdgpu_ras_feature_enable -ffffffff81dde520 T amdgpu_ras_is_poison_mode_supported -ffffffff81dde570 t __amdgpu_ras_feature_enable -ffffffff81dde780 T amdgpu_ras_feature_enable_on_boot -ffffffff81dde870 T amdgpu_ras_query_error_status -ffffffff81ddeb90 T amdgpu_ras_reset_error_status -ffffffff81ddecd0 T amdgpu_ras_is_supported -ffffffff81ddee30 T amdgpu_ras_error_inject -ffffffff81ddf100 T amdgpu_ras_query_error_count -ffffffff81ddf360 T amdgpu_ras_sysfs_create -ffffffff81ddf3d0 T amdgpu_ras_sysfs_remove -ffffffff81ddf490 T amdgpu_ras_interrupt_fatal_error_handler -ffffffff81ddf510 T amdgpu_ras_interrupt_dispatch -ffffffff81ddf5e0 T amdgpu_ras_interrupt_remove_handler -ffffffff81ddf760 T amdgpu_ras_interrupt_add_handler -ffffffff81ddfa10 t amdgpu_ras_interrupt_process_handler -ffffffff81ddfcd0 T amdgpu_ras_add_bad_pages -ffffffff81ddff40 T amdgpu_ras_save_bad_pages -ffffffff81de0080 T amdgpu_ras_recovery_init -ffffffff81de02e0 t amdgpu_ras_do_recovery -ffffffff81de0750 t amdgpu_ras_load_bad_pages -ffffffff81de0860 T amdgpu_ras_init -ffffffff81de0c90 t amdgpu_ras_counte_dw -ffffffff81de0d00 T amdgpu_ras_set_context -ffffffff81de0d40 t amdgpu_ras_query_poison_mode -ffffffff81de0e50 T amdgpu_persistent_edc_harvesting_supported -ffffffff81de0e90 T amdgpu_ras_block_late_init -ffffffff81de1150 T amdgpu_ras_block_late_fini -ffffffff81de1240 T amdgpu_ras_resume -ffffffff81de1500 T amdgpu_release_ras_context -ffffffff81de1570 T amdgpu_ras_suspend -ffffffff81de1640 T amdgpu_ras_late_init -ffffffff81de1770 T amdgpu_ras_pre_fini -ffffffff81de1880 T amdgpu_ras_fini -ffffffff81de1a60 T amdgpu_ras_global_ras_isr -ffffffff81de1af0 T amdgpu_ras_reset_gpu -ffffffff81de1b60 T amdgpu_ras_need_emergency_restart -ffffffff81de1bd0 T amdgpu_ras_register_ras_block -ffffffff81de1c70 T amdgpu_ras_get_error_type_name -ffffffff81de1ce0 T amdgpu_ras_inst_get_memory_id_field -ffffffff81de1d70 T amdgpu_ras_inst_get_err_cnt_field -ffffffff81de1df0 T amdgpu_ras_inst_query_ras_error_count -ffffffff81de1f20 T amdgpu_ras_inst_reset_ras_error_count -ffffffff81de1ff0 t __delayed_work_tick -ffffffff81de3000 T amdgpu_ras_eeprom_reset_table -ffffffff81de31e0 t __write_table_header -ffffffff81de32c0 t __write_table_ras_info -ffffffff81de33e0 T amdgpu_ras_debugfs_set_ret_size -ffffffff81de3410 T amdgpu_ras_eeprom_check_err_threshold -ffffffff81de35a0 T amdgpu_ras_eeprom_append -ffffffff81de3c30 T amdgpu_ras_eeprom_read -ffffffff81de3ed0 t __amdgpu_ras_eeprom_read -ffffffff81de3fd0 T amdgpu_ras_eeprom_max_record_count -ffffffff81de4010 T amdgpu_ras_eeprom_init -ffffffff81de4520 t __read_table_ras_info -ffffffff81de4610 t __verify_ras_table_checksum -ffffffff81de4780 t amdgpu_ras_eeprom_correct_header_tag -ffffffff81de4810 t __amdgpu_ras_eeprom_write -ffffffff81de5000 T amdgpu_reset_add_handler -ffffffff81de5050 T amdgpu_reset_init -ffffffff81de50c0 T amdgpu_reset_fini -ffffffff81de5130 T amdgpu_reset_prepare_hwcontext -ffffffff81de51b0 T amdgpu_reset_perform_reset -ffffffff81de5270 T amdgpu_reset_destroy_reset_domain -ffffffff81de52b0 T amdgpu_reset_create_reset_domain -ffffffff81de53b0 T amdgpu_device_lock_reset_domain -ffffffff81de53d0 T amdgpu_device_unlock_reset_domain -ffffffff81de6000 T amdgpu_ring_max_ibs -ffffffff81de6050 T amdgpu_ring_alloc -ffffffff81de6130 T amdgpu_ring_insert_nop -ffffffff81de61e0 T amdgpu_ring_generic_pad_ib -ffffffff81de6240 T amdgpu_ring_commit -ffffffff81de62d0 T amdgpu_ring_undo -ffffffff81de6320 T amdgpu_ring_init -ffffffff81de6a90 T amdgpu_ring_fini -ffffffff81de6bb0 T amdgpu_ring_emit_reg_write_reg_wait_helper -ffffffff81de6c10 T amdgpu_ring_soft_recovery -ffffffff81de6da0 T amdgpu_debugfs_ring_init -ffffffff81de6dd0 T amdgpu_ring_test_helper -ffffffff81de6e80 T amdgpu_ring_init_mqd -ffffffff81de6fc0 T amdgpu_ring_ib_begin -ffffffff81de7000 T amdgpu_ring_ib_end -ffffffff81de7040 T amdgpu_ring_ib_on_emit_cntl -ffffffff81de7080 T amdgpu_ring_ib_on_emit_ce -ffffffff81de70c0 T amdgpu_ring_ib_on_emit_de -ffffffff81de8000 T amdgpu_ring_mux_init -ffffffff81de80d0 t amdgpu_mux_resubmit_fallback -ffffffff81de8160 T amdgpu_ring_mux_fini -ffffffff81de8240 T amdgpu_ring_mux_add_sw_ring -ffffffff81de82c0 T amdgpu_ring_mux_set_wptr -ffffffff81de8400 t amdgpu_mux_resubmit_chunks -ffffffff81de8640 t amdgpu_ring_mux_copy_pkt_from_sw_ring -ffffffff81de8930 T amdgpu_ring_mux_get_wptr -ffffffff81de89a0 T amdgpu_ring_mux_get_rptr -ffffffff81de8aa0 T amdgpu_sw_ring_get_rptr_gfx -ffffffff81de8b00 T amdgpu_sw_ring_get_wptr_gfx -ffffffff81de8bc0 T amdgpu_sw_ring_set_wptr_gfx -ffffffff81de8c30 T amdgpu_sw_ring_insert_nop -ffffffff81de8c90 T amdgpu_sw_ring_name -ffffffff81de8cd0 T amdgpu_sw_ring_priority -ffffffff81de8d10 T amdgpu_sw_ring_ib_begin -ffffffff81de8eb0 T amdgpu_ring_mux_start_ib -ffffffff81de8fa0 T amdgpu_sw_ring_ib_end -ffffffff81de9050 T amdgpu_ring_mux_end_ib -ffffffff81de9160 T amdgpu_sw_ring_ib_mark_offset -ffffffff81de9220 T amdgpu_ring_mux_ib_mark_offset -ffffffff81de92d0 T amdgpu_mcbp_handle_trailing_fence_irq -ffffffff81dea000 T amdgpu_gfx_rlc_enter_safe_mode -ffffffff81dea090 T amdgpu_gfx_rlc_exit_safe_mode -ffffffff81dea120 T amdgpu_gfx_rlc_init_sr -ffffffff81dea290 T amdgpu_gfx_rlc_fini -ffffffff81dea310 t amdgpu_bo_unreserve -ffffffff81dea3f0 T amdgpu_gfx_rlc_init_csb -ffffffff81dea520 T amdgpu_gfx_rlc_init_cpt -ffffffff81dea7f0 T amdgpu_gfx_rlc_setup_cp_table -ffffffff81dea9e0 T amdgpu_gfx_rlc_init_microcode -ffffffff81dec000 T amdgpu_sa_bo_manager_init -ffffffff81dec0e0 T amdgpu_sa_bo_manager_fini -ffffffff81dec170 T amdgpu_sa_bo_new -ffffffff81dec1e0 T amdgpu_sa_bo_free -ffffffff81ded000 T amdgpu_sched_ioctl -ffffffff81dee000 T amdgpu_sdma_get_instance_from_ring -ffffffff81dee080 T amdgpu_sdma_get_index_from_ring -ffffffff81dee100 T amdgpu_sdma_get_csa_mc_addr -ffffffff81dee200 T amdgpu_sdma_ras_late_init -ffffffff81dee2d0 T amdgpu_sdma_process_ras_data_cb -ffffffff81dee320 T amdgpu_sdma_process_ecc_irq -ffffffff81dee3b0 T amdgpu_sdma_destroy_inst_ctx -ffffffff81dee430 T amdgpu_sdma_init_microcode -ffffffff81dee7c0 T amdgpu_sdma_unset_buffer_funcs_helper -ffffffff81dee860 T amdgpu_sdma_ras_sw_init -ffffffff81def000 T psp_securedisplay_parse_resp_status -ffffffff81def1e0 T psp_prep_securedisplay_cmd_buf -ffffffff81def250 T amdgpu_securedisplay_debugfs_init -ffffffff81df0000 T amdgpu_sync_create -ffffffff81df00b0 T amdgpu_sync_fence -ffffffff81df01e0 T amdgpu_sync_resv -ffffffff81df03b0 T amdgpu_sync_peek_fence -ffffffff81df04e0 T amdgpu_sync_get_fence -ffffffff81df05c0 T amdgpu_sync_clone -ffffffff81df06c0 T amdgpu_sync_push_to_job -ffffffff81df07e0 T amdgpu_sync_wait -ffffffff81df08b0 T amdgpu_sync_free -ffffffff81df0990 T amdgpu_sync_init -ffffffff81df09f0 T amdgpu_sync_fini -ffffffff81df1000 T amdgpu_ttm_copy_mem_to_mem -ffffffff81df1520 t amdgpu_res_first -ffffffff81df1700 t amdgpu_ttm_map_buffer -ffffffff81df1af0 T amdgpu_copy_buffer -ffffffff81df1d80 T amdgpu_res_cpu_visible -ffffffff81df1ec0 T amdgpu_ttm_domain_start -ffffffff81df1f10 T amdgpu_ttm_tt_set_user_pages -ffffffff81df1f70 T amdgpu_ttm_alloc_gart -ffffffff81df21b0 T amdgpu_ttm_tt_pte_flags -ffffffff81df2260 t amdgpu_ttm_gart_bind -ffffffff81df23b0 T amdgpu_ttm_recover_gart -ffffffff81df2490 T amdgpu_ttm_tt_get_userptr -ffffffff81df24e0 T amdgpu_ttm_tt_set_userptr -ffffffff81df2610 t amdgpu_ttm_tt_create -ffffffff81df2700 T amdgpu_ttm_tt_get_usermm -ffffffff81df2760 T amdgpu_ttm_tt_affect_userptr -ffffffff81df27c0 T amdgpu_ttm_tt_is_userptr -ffffffff81df2800 T amdgpu_ttm_tt_is_readonly -ffffffff81df2840 T amdgpu_ttm_tt_pde_flags -ffffffff81df28c0 T amdgpu_ttm_init -ffffffff81df2e30 T amdgpu_ttm_set_buffer_funcs_status -ffffffff81df2f90 t amdgpu_ttm_drv_reserve_vram_init -ffffffff81df3000 t amdgpu_ttm_reserve_tmr -ffffffff81df3270 T amdgpu_ttm_fini -ffffffff81df34a0 T amdgpu_fill_buffer -ffffffff81df3980 T amdgpu_ttm_evict_resources -ffffffff81df39f0 T amdgpu_ttm_debugfs_init -ffffffff81df3a20 t amdgpu_ttm_tt_populate -ffffffff81df3ad0 t amdgpu_ttm_tt_unpopulate -ffffffff81df3c70 t amdgpu_ttm_backend_destroy -ffffffff81df3ca0 t amdgpu_ttm_bo_eviction_valuable -ffffffff81df3db0 t amdgpu_evict_flags -ffffffff81df3f20 t amdgpu_bo_move -ffffffff81df43b0 t amdgpu_bo_delete_mem_notify -ffffffff81df43d0 t amdgpu_ttm_io_mem_reserve -ffffffff81df4480 t amdgpu_ttm_io_mem_pfn -ffffffff81df4510 t amdgpu_ttm_access_memory -ffffffff81df4960 t amdgpu_gmc_vram_full_visible -ffffffff81df49d0 t amdgpu_move_blit -ffffffff81df5000 T amdgpu_ucode_print_mc_hdr -ffffffff81df50b0 t amdgpu_ucode_print_common_hdr -ffffffff81df51e0 T amdgpu_ucode_print_smc_hdr -ffffffff81df5310 T amdgpu_ucode_print_gfx_hdr -ffffffff81df53f0 T amdgpu_ucode_print_rlc_hdr -ffffffff81df5b70 T amdgpu_ucode_print_sdma_hdr -ffffffff81df5d50 T amdgpu_ucode_print_psp_hdr -ffffffff81df6300 T amdgpu_ucode_print_gpu_info_hdr -ffffffff81df63b0 T amdgpu_ucode_hdr_version -ffffffff81df63f0 T amdgpu_ucode_get_load_type -ffffffff81df6460 T amdgpu_ucode_name -ffffffff81df64a0 T amdgpu_ucode_sysfs_init -ffffffff81df64d0 T amdgpu_ucode_sysfs_fini -ffffffff81df6500 T amdgpu_ucode_create_bo -ffffffff81df65f0 T amdgpu_ucode_free_bo -ffffffff81df6620 T amdgpu_ucode_init_bo -ffffffff81df6be0 T amdgpu_ucode_ip_version_decode -ffffffff81df75a0 T amdgpu_ucode_request -ffffffff81df7670 T amdgpu_ucode_release -ffffffff81df8000 T amdgpu_umc_page_retirement_mca -ffffffff81df8180 T amdgpu_umc_poison_handler -ffffffff81df82f0 t amdgpu_umc_do_page_retirement -ffffffff81df8540 T amdgpu_umc_process_ras_data_cb -ffffffff81df8580 T amdgpu_umc_ras_sw_init -ffffffff81df8690 T amdgpu_umc_ras_late_init -ffffffff81df8740 T amdgpu_umc_process_ecc_irq -ffffffff81df87d0 T amdgpu_umc_fill_error_record -ffffffff81df8870 T amdgpu_umc_loop_channels -ffffffff81df9000 T amdgpu_uvd_sw_init -ffffffff81df93c0 t amdgpu_uvd_idle_work_handler -ffffffff81df9560 t amdgpu_uvd_create_msg_bo_helper -ffffffff81df96e0 T amdgpu_uvd_sw_fini -ffffffff81df97f0 T amdgpu_uvd_entity_init -ffffffff81df9870 T amdgpu_uvd_suspend -ffffffff81df9a40 T amdgpu_uvd_resume -ffffffff81df9be0 T amdgpu_uvd_free_handles -ffffffff81df9cd0 T amdgpu_uvd_get_destroy_msg -ffffffff81df9e20 T amdgpu_uvd_ring_parse_cs -ffffffff81df9f40 t amdgpu_uvd_cs_packets -ffffffff81dfa0d0 t amdgpu_uvd_cs_pass1 -ffffffff81dfa210 t amdgpu_uvd_cs_pass2 -ffffffff81dfa910 T amdgpu_uvd_get_create_msg -ffffffff81dfa9e0 t amdgpu_uvd_send_msg -ffffffff81dfad50 T amdgpu_uvd_ring_begin_use -ffffffff81dfae30 T amdgpu_uvd_ring_end_use -ffffffff81dfaeb0 T amdgpu_uvd_ring_test_ib -ffffffff81dfb080 T amdgpu_uvd_used_handles -ffffffff81dfb150 t __delayed_work_tick -ffffffff81dfb170 t amdgpu_bo_unreserve -ffffffff81dfc000 T amdgpu_vce_sw_init -ffffffff81dfc360 t amdgpu_vce_idle_work_handler -ffffffff81dfc460 T amdgpu_vce_sw_fini -ffffffff81dfc520 T amdgpu_vce_entity_init -ffffffff81dfc5a0 T amdgpu_vce_suspend -ffffffff81dfc6f0 T amdgpu_vce_resume -ffffffff81dfc980 t amdgpu_bo_unreserve -ffffffff81dfca60 T amdgpu_vce_ring_begin_use -ffffffff81dfcb70 T amdgpu_vce_ring_end_use -ffffffff81dfcbf0 T amdgpu_vce_free_handles -ffffffff81dfccb0 t amdgpu_vce_get_destroy_msg -ffffffff81dfcf30 T amdgpu_vce_ring_parse_cs -ffffffff81dfd740 t amdgpu_vce_validate_bo -ffffffff81dfd8c0 t amdgpu_vce_validate_handle -ffffffff81dfdbe0 t amdgpu_vce_cs_reloc -ffffffff81dfdd30 T amdgpu_vce_ring_parse_cs_vm -ffffffff81dfe120 T amdgpu_vce_ring_emit_ib -ffffffff81dfe2d0 T amdgpu_vce_ring_emit_fence -ffffffff81dfe570 T amdgpu_vce_ring_test_ring -ffffffff81dfe6a0 T amdgpu_vce_ring_test_ib -ffffffff81dfeb20 T amdgpu_vce_get_ring_prio -ffffffff81dfeb60 t __delayed_work_tick -ffffffff81dff000 T amdgpu_vcn_early_init -ffffffff81dff0b0 T amdgpu_vcn_sw_init -ffffffff81dff590 t amdgpu_vcn_idle_work_handler -ffffffff81dff7d0 T amdgpu_vcn_sw_fini -ffffffff81dff930 T amdgpu_vcn_is_disabled_vcn -ffffffff81dff990 T amdgpu_vcn_suspend -ffffffff81dffad0 T amdgpu_vcn_resume -ffffffff81dffc60 T amdgpu_vcn_ring_begin_use -ffffffff81dffe40 T amdgpu_vcn_ring_end_use -ffffffff81dffed0 T amdgpu_vcn_dec_ring_test_ring -ffffffff81e000b0 T amdgpu_vcn_dec_sw_ring_test_ring -ffffffff81e00210 T amdgpu_vcn_dec_ring_test_ib -ffffffff81e00420 t amdgpu_vcn_dec_send_msg -ffffffff81e00640 T amdgpu_vcn_dec_sw_ring_test_ib -ffffffff81e00850 t amdgpu_vcn_dec_sw_send_msg -ffffffff81e00ca0 T amdgpu_vcn_enc_ring_test_ring -ffffffff81e00e00 T amdgpu_vcn_enc_ring_test_ib -ffffffff81e016e0 T amdgpu_vcn_unified_ring_test_ib -ffffffff81e01770 T amdgpu_vcn_get_enc_ring_prio -ffffffff81e017b0 T amdgpu_vcn_setup_ucode -ffffffff81e01880 T amdgpu_debugfs_vcn_fwlog_init -ffffffff81e018b0 T amdgpu_vcn_fwlog_init -ffffffff81e018e0 T amdgpu_vcn_process_poison_irq -ffffffff81e019d0 T amdgpu_vcn_ras_late_init -ffffffff81e01ad0 T amdgpu_vcn_ras_sw_init -ffffffff81e01bb0 T amdgpu_vcn_psp_update_sram -ffffffff81e01c50 t __delayed_work_tick -ffffffff81e02000 T amdgpu_vf_error_put -ffffffff81e020d0 T amdgpu_vf_error_trans_all -ffffffff81e03000 T amdgpu_virt_mmio_blocked -ffffffff81e03050 T amdgpu_virt_init_setting -ffffffff81e030f0 T amdgpu_virt_kiq_reg_write_reg_wait -ffffffff81e03300 T amdgpu_virt_request_full_gpu -ffffffff81e03360 T amdgpu_virt_release_full_gpu -ffffffff81e033c0 T amdgpu_virt_reset_gpu -ffffffff81e03420 T amdgpu_virt_request_init_data -ffffffff81e03480 T amdgpu_virt_wait_reset -ffffffff81e034d0 T amdgpu_virt_alloc_mm_table -ffffffff81e035a0 T amdgpu_virt_free_mm_table -ffffffff81e03610 T amd_sriov_msg_checksum -ffffffff81e03700 T amdgpu_virt_release_ras_err_handler_data -ffffffff81e037e0 T amdgpu_virt_fini_data_exchange -ffffffff81e03860 T amdgpu_virt_init_data_exchange -ffffffff81e039b0 T amdgpu_virt_exchange_data -ffffffff81e03cd0 t amdgpu_virt_update_vf2pf_work_item -ffffffff81e03d30 t amdgpu_virt_read_pf2vf_data -ffffffff81e04140 t amdgpu_virt_write_vf2pf_data -ffffffff81e044d0 T amdgpu_detect_virtualization -ffffffff81e04680 T amdgpu_virt_enable_access_debugfs -ffffffff81e04710 T amdgpu_virt_disable_access_debugfs -ffffffff81e04750 T amdgpu_virt_get_sriov_vf_mode -ffffffff81e047a0 T amdgpu_virt_post_reset -ffffffff81e047e0 T amdgpu_virt_fw_load_skip_check -ffffffff81e04880 T amdgpu_virt_update_sriov_video_codec -ffffffff81e04980 T amdgpu_sriov_wreg -ffffffff81e04a10 t amdgpu_virt_rlcg_reg_rw -ffffffff81e04d30 T amdgpu_sriov_rreg -ffffffff81e04d90 t __delayed_work_tick -ffffffff81e05000 T amdgpu_vm_set_pasid -ffffffff81e05130 T amdgpu_vm_bo_base_init -ffffffff81e05370 T amdgpu_vm_lock_pd -ffffffff81e053a0 T amdgpu_vm_move_to_lru_tail -ffffffff81e053e0 T amdgpu_vm_generation -ffffffff81e05440 T amdgpu_vm_validate_pt_bos -ffffffff81e05810 t amdgpu_vm_bo_moved -ffffffff81e05880 T amdgpu_vm_ready -ffffffff81e05910 T amdgpu_vm_check_compute_bug -ffffffff81e059d0 T amdgpu_vm_need_pipeline_sync -ffffffff81e05a70 T amdgpu_vm_flush -ffffffff81e05eb0 T amdgpu_vm_bo_find -ffffffff81e05f10 T amdgpu_vm_map_gart -ffffffff81e05f50 T amdgpu_vm_update_pdes -ffffffff81e06190 T amdgpu_vm_update_range -ffffffff81e06860 t amdgpu_vm_tlb_seq_cb -ffffffff81e06890 T amdgpu_vm_get_memory -ffffffff81e069f0 t amdgpu_vm_bo_get_memory -ffffffff81e06b90 T amdgpu_vm_bo_update -ffffffff81e07050 T amdgpu_vm_clear_freed -ffffffff81e071d0 T amdgpu_vm_handle_moved -ffffffff81e073e0 T amdgpu_vm_bo_add -ffffffff81e074b0 T amdgpu_vm_bo_map -ffffffff81e07680 t amdgpu_vm_bo_insert_map -ffffffff81e07850 T amdgpu_vm_bo_replace_map -ffffffff81e079b0 T amdgpu_vm_bo_clear_mappings -ffffffff81e07f40 T amdgpu_vm_bo_unmap -ffffffff81e08070 T amdgpu_vm_bo_lookup_mapping -ffffffff81e080e0 T amdgpu_vm_bo_trace_cs -ffffffff81e08110 T amdgpu_vm_bo_del -ffffffff81e08300 T amdgpu_vm_evictable -ffffffff81e083b0 T amdgpu_vm_bo_invalidate -ffffffff81e08640 T amdgpu_vm_adjust_size -ffffffff81e088a0 T amdgpu_vm_wait_idle -ffffffff81e08910 T amdgpu_vm_init -ffffffff81e08d00 t amdgpu_bo_reserve -ffffffff81e08e60 t amdgpu_bo_unreserve -ffffffff81e08f40 T amdgpu_vm_make_compute -ffffffff81e09140 T amdgpu_vm_release_compute -ffffffff81e09200 T amdgpu_vm_fini -ffffffff81e097d0 T amdgpu_vm_manager_init -ffffffff81e098f0 T amdgpu_vm_manager_fini -ffffffff81e09950 T amdgpu_vm_ioctl -ffffffff81e09a00 T amdgpu_vm_get_task_info -ffffffff81e09aa0 T amdgpu_vm_set_task_info -ffffffff81e09b90 T amdgpu_vm_handle_fault -ffffffff81e09d80 t amdgpu_vm_add_prt_cb -ffffffff81e09ed0 t amdgpu_vm_prt_cb -ffffffff81e0a000 t amdgpu_vm_cpu_map_table -ffffffff81e0a020 t amdgpu_vm_cpu_prepare -ffffffff81e0a070 t amdgpu_vm_cpu_update -ffffffff81e0a160 t amdgpu_vm_cpu_commit -ffffffff81e0b000 T amdgpu_vm_pt_clear -ffffffff81e0b420 T amdgpu_vm_pt_create -ffffffff81e0b9a0 T amdgpu_vm_pt_free_work -ffffffff81e0bc50 t amdgpu_vm_pt_free -ffffffff81e0bd30 T amdgpu_vm_pt_free_root -ffffffff81e0bd50 t amdgpu_vm_pt_free_dfs -ffffffff81e0c180 T amdgpu_vm_pt_is_root_clean -ffffffff81e0c250 T amdgpu_vm_pde_update -ffffffff81e0c340 T amdgpu_vm_ptes_update -ffffffff81e0ccb0 t amdgpu_vm_pt_next -ffffffff81e0cdc0 T amdgpu_vm_pt_map_tables -ffffffff81e0cef0 t amdgpu_vm_pt_next_dfs -ffffffff81e0d030 t amdgpu_vm_pt_sibling -ffffffff81e0e000 t amdgpu_vm_sdma_map_table -ffffffff81e0e060 t amdgpu_vm_sdma_prepare -ffffffff81e0e150 t amdgpu_vm_sdma_update -ffffffff81e0e570 t amdgpu_vm_sdma_commit -ffffffff81e0f000 T amdgpu_vram_mgr_bo_visible_size -ffffffff81e0f100 T amdgpu_vram_mgr_reserve_range -ffffffff81e0f1e0 t amdgpu_vram_mgr_do_reserve -ffffffff81e0f360 T amdgpu_vram_mgr_query_page_status -ffffffff81e0f440 T amdgpu_vram_mgr_alloc_sgt -ffffffff81e0f490 T amdgpu_vram_mgr_free_sgt -ffffffff81e0f4c0 T amdgpu_vram_mgr_vis_usage -ffffffff81e0f4f0 T amdgpu_vram_mgr_init -ffffffff81e0f6d0 T amdgpu_vram_mgr_fini -ffffffff81e0f8f0 t amdgpu_vram_mgr_new -ffffffff81e0fe90 t amdgpu_vram_mgr_del -ffffffff81e0ff70 t amdgpu_vram_mgr_intersects -ffffffff81e0fff0 t amdgpu_vram_mgr_compatible -ffffffff81e10060 t amdgpu_vram_mgr_debug -ffffffff81e10140 t amdgpu_dummy_vram_mgr_new -ffffffff81e101a0 t amdgpu_dummy_vram_mgr_del -ffffffff81e101d0 t amdgpu_dummy_vram_mgr_intersects -ffffffff81e10220 t amdgpu_dummy_vram_mgr_compatible -ffffffff81e10270 t amdgpu_dummy_vram_mgr_debug -ffffffff81e11000 T amdgpu_xcp_prepare_suspend -ffffffff81e11010 t amdgpu_xcp_run_transition -ffffffff81e11200 T amdgpu_xcp_suspend -ffffffff81e11220 T amdgpu_xcp_prepare_resume -ffffffff81e11240 T amdgpu_xcp_resume -ffffffff81e11260 T amdgpu_xcp_init -ffffffff81e11580 T amdgpu_xcp_switch_partition_mode -ffffffff81e116e0 T amdgpu_xcp_query_partition_mode -ffffffff81e117e0 T amdgpu_xcp_mgr_init -ffffffff81e11a00 T amdgpu_xcp_get_partition -ffffffff81e11aa0 T amdgpu_xcp_get_inst_details -ffffffff81e11af0 T amdgpu_xcp_dev_register -ffffffff81e11c40 T amdgpu_xcp_dev_unplug -ffffffff81e11d30 T amdgpu_xcp_open_device -ffffffff81e11f20 T amdgpu_xcp_release_sched -ffffffff81e12000 T amdgpu_get_xgmi_hive -ffffffff81e12050 T amdgpu_put_xgmi_hive -ffffffff81e120a0 T amdgpu_xgmi_set_pstate -ffffffff81e120f0 T amdgpu_xgmi_update_topology -ffffffff81e121b0 T amdgpu_xgmi_get_hops_count -ffffffff81e12220 T amdgpu_xgmi_get_num_links -ffffffff81e12290 T amdgpu_xgmi_add_device -ffffffff81e124b0 T amdgpu_xgmi_remove_device -ffffffff81e12600 T amdgpu_xgmi_get_relative_phy_addr -ffffffff81e12640 t amdgpu_ras_error_inject_xgmi -ffffffff81e127c0 t amdgpu_xgmi_query_ras_error_count -ffffffff81e12e60 t amdgpu_xgmi_reset_ras_error_count -ffffffff81e13180 t amdgpu_xgmi_ras_late_init -ffffffff81e13200 T amdgpu_xgmi_ras_sw_init -ffffffff81e14000 T aqua_vanjaram_doorbell_index_init -ffffffff81e14120 T aqua_vanjaram_ip_map_init -ffffffff81e142a0 t aqua_vanjaram_logical_to_dev_inst -ffffffff81e14300 t aqua_vanjaram_logical_to_dev_mask -ffffffff81e143b0 T aqua_vanjaram_encode_ext_smn_addressing -ffffffff81e143f0 t aqua_vanjaram_switch_partition_mode -ffffffff81e147f0 t aqua_vanjaram_query_partition_mode -ffffffff81e14840 t aqua_vanjaram_get_xcp_ip_details -ffffffff81e149f0 t aqua_vanjaram_get_xcp_mem_id -ffffffff81e14b00 t aqua_vanjaram_select_scheds -ffffffff81e14c90 t aqua_vanjaram_update_partition_sched_list -ffffffff81e15180 T aqua_vanjaram_init_soc_config -ffffffff81e16000 T arct_reg_base_init -ffffffff81e17000 T athub_v1_0_set_clockgating -ffffffff81e17220 T athub_v1_0_get_clockgating -ffffffff81e18000 T athub_v2_0_set_clockgating -ffffffff81e181f0 T athub_v2_0_get_clockgating -ffffffff81e19000 T athub_v2_1_set_clockgating -ffffffff81e19200 T athub_v2_1_get_clockgating -ffffffff81e1a000 T athub_v3_0_set_clockgating -ffffffff81e1a0d0 T athub_v3_0_get_clockgating -ffffffff81e1a120 t athub_v3_0_get_cg_cntl -ffffffff81e1a1c0 t athub_v3_0_set_cg_cntl -ffffffff81e1b000 t cz_ih_early_init -ffffffff81e1b050 t cz_ih_sw_init -ffffffff81e1b0b0 t cz_ih_sw_fini -ffffffff81e1b0f0 t cz_ih_hw_init -ffffffff81e1b310 t cz_ih_hw_fini -ffffffff81e1b3e0 t cz_ih_suspend -ffffffff81e1b4b0 t cz_ih_resume -ffffffff81e1b4f0 t cz_ih_is_idle -ffffffff81e1b540 t cz_ih_wait_for_idle -ffffffff81e1b5e0 t cz_ih_soft_reset -ffffffff81e1b6c0 t cz_ih_set_clockgating_state -ffffffff81e1b6f0 t cz_ih_set_powergating_state -ffffffff81e1b720 t cz_ih_get_wptr -ffffffff81e1b830 t cz_ih_decode_iv -ffffffff81e1b8b0 t cz_ih_set_rptr -ffffffff81e1c000 T dce_v10_0_disable_dce -ffffffff81e1c150 t dce_v10_0_early_init -ffffffff81e1c210 t dce_v10_0_sw_init -ffffffff81e1c520 t dce_v10_0_sw_fini -ffffffff81e1c640 t dce_v10_0_hw_init -ffffffff81e1c9a0 t dce_v10_0_hw_fini -ffffffff81e1cb30 t dce_v10_0_suspend -ffffffff81e1cb90 t dce_v10_0_resume -ffffffff81e1cc00 t dce_v10_0_is_idle -ffffffff81e1cc30 t dce_v10_0_wait_for_idle -ffffffff81e1cc60 t dce_v10_0_check_soft_reset -ffffffff81e1cc70 t dce_v10_0_soft_reset -ffffffff81e1cd40 t dce_v10_0_set_clockgating_state -ffffffff81e1cd70 t dce_v10_0_set_powergating_state -ffffffff81e1cda0 t dce_v10_0_audio_endpt_rreg -ffffffff81e1ce30 t dce_v10_0_audio_endpt_wreg -ffffffff81e1ceb0 t dce_v10_0_bandwidth_update -ffffffff81e1d920 t dce_v10_0_vblank_get_counter -ffffffff81e1d970 t dce_v10_0_hpd_sense -ffffffff81e1d9d0 t dce_v10_0_hpd_set_polarity -ffffffff81e1daa0 t dce_v10_0_hpd_get_gpio_reg -ffffffff81e1dad0 t dce_v10_0_page_flip -ffffffff81e1dbd0 t dce_v10_0_crtc_get_scanoutpos -ffffffff81e1dc70 t dce_v10_0_encoder_add -ffffffff81e1dec0 t dce_v10_0_latency_watermark -ffffffff81e1e0f0 t dce_v10_0_encoder_destroy -ffffffff81e1e150 t dce_v10_0_encoder_prepare -ffffffff81e1e350 t dce_v10_0_encoder_commit -ffffffff81e1e380 t dce_v10_0_encoder_mode_set -ffffffff81e1f2f0 t dce_v10_0_encoder_disable -ffffffff81e1f400 t dce_v10_0_ext_dpms -ffffffff81e1f430 t dce_v10_0_ext_prepare -ffffffff81e1f460 t dce_v10_0_ext_commit -ffffffff81e1f490 t dce_v10_0_ext_mode_set -ffffffff81e1f4c0 t dce_v10_0_ext_disable -ffffffff81e1f4f0 t dce_v10_0_set_crtc_irq_state -ffffffff81e1f5d0 t dce_v10_0_crtc_irq -ffffffff81e1f810 t dce_v10_0_set_crtc_vblank_interrupt_state -ffffffff81e1f8e0 t dce_v10_0_set_crtc_vline_interrupt_state -ffffffff81e1f9b0 t dce_v10_0_set_pageflip_irq_state -ffffffff81e1fa60 t dce_v10_0_pageflip_irq -ffffffff81e1fbc0 t dce_v10_0_set_hpd_irq_state -ffffffff81e1fc90 t dce_v10_0_hpd_irq -ffffffff81e1fdc0 t dce_v10_0_afmt_init -ffffffff81e1fed0 t dce_v10_0_audio_init -ffffffff81e1ffa0 t INIT_DELAYED_WORK -ffffffff81e1ffe0 t dce_v10_0_crtc_cursor_set2 -ffffffff81e202a0 t dce_v10_0_crtc_cursor_move -ffffffff81e20370 t dce_v10_0_crtc_gamma_set -ffffffff81e203b0 t dce_v10_0_crtc_destroy -ffffffff81e203e0 t amdgpu_bo_reserve -ffffffff81e205e0 t amdgpu_bo_unreserve -ffffffff81e206c0 t dce_v10_0_lock_cursor -ffffffff81e20720 t dce_v10_0_cursor_move_locked -ffffffff81e20880 t dce_v10_0_show_cursor -ffffffff81e20920 t dce_v10_0_crtc_load_lut -ffffffff81e20cb0 t dce_v10_0_crtc_dpms -ffffffff81e20e90 t dce_v10_0_crtc_prepare -ffffffff81e20ed0 t dce_v10_0_crtc_commit -ffffffff81e20f00 t dce_v10_0_crtc_mode_fixup -ffffffff81e210b0 t dce_v10_0_crtc_mode_set -ffffffff81e21290 t dce_v10_0_crtc_set_base -ffffffff81e212b0 t dce_v10_0_crtc_set_base_atomic -ffffffff81e212d0 t dce_v10_0_crtc_disable -ffffffff81e21460 t dce_v10_0_crtc_do_set_base -ffffffff81e21b60 t __delayed_work_tick -ffffffff81e21b80 t dce_v10_0_is_display_hung -ffffffff81e22000 T dce_v11_0_disable_dce -ffffffff81e22160 t dce_v11_0_early_init -ffffffff81e22290 t dce_v11_0_sw_init -ffffffff81e225b0 t dce_v11_0_sw_fini -ffffffff81e226d0 t dce_v11_0_hw_init -ffffffff81e22a90 t dce_v11_0_hw_fini -ffffffff81e22c20 t dce_v11_0_suspend -ffffffff81e22c80 t dce_v11_0_resume -ffffffff81e22cf0 t dce_v11_0_is_idle -ffffffff81e22d20 t dce_v11_0_wait_for_idle -ffffffff81e22d50 t dce_v11_0_soft_reset -ffffffff81e22f60 t dce_v11_0_set_clockgating_state -ffffffff81e22f90 t dce_v11_0_set_powergating_state -ffffffff81e22fc0 t dce_v11_0_audio_endpt_rreg -ffffffff81e23050 t dce_v11_0_audio_endpt_wreg -ffffffff81e230d0 t dce_v11_0_bandwidth_update -ffffffff81e23b40 t dce_v11_0_vblank_get_counter -ffffffff81e23b90 t dce_v11_0_hpd_sense -ffffffff81e23bf0 t dce_v11_0_hpd_set_polarity -ffffffff81e23cc0 t dce_v11_0_hpd_get_gpio_reg -ffffffff81e23cf0 t dce_v11_0_page_flip -ffffffff81e23df0 t dce_v11_0_crtc_get_scanoutpos -ffffffff81e23e90 t dce_v11_0_encoder_add -ffffffff81e240e0 t dce_v11_0_latency_watermark -ffffffff81e24310 t dce_v11_0_encoder_destroy -ffffffff81e24370 t dce_v11_0_encoder_prepare -ffffffff81e24570 t dce_v11_0_encoder_commit -ffffffff81e245a0 t dce_v11_0_encoder_mode_set -ffffffff81e25510 t dce_v11_0_encoder_disable -ffffffff81e25620 t dce_v11_0_ext_dpms -ffffffff81e25650 t dce_v11_0_ext_prepare -ffffffff81e25680 t dce_v11_0_ext_commit -ffffffff81e256b0 t dce_v11_0_ext_mode_set -ffffffff81e256e0 t dce_v11_0_ext_disable -ffffffff81e25710 t dce_v11_0_set_crtc_irq_state -ffffffff81e257f0 t dce_v11_0_crtc_irq -ffffffff81e25a10 t dce_v11_0_set_crtc_vblank_interrupt_state -ffffffff81e25ae0 t dce_v11_0_set_crtc_vline_interrupt_state -ffffffff81e25bb0 t dce_v11_0_set_pageflip_irq_state -ffffffff81e25c60 t dce_v11_0_pageflip_irq -ffffffff81e25dc0 t dce_v11_0_set_hpd_irq_state -ffffffff81e25e90 t dce_v11_0_hpd_irq -ffffffff81e25fc0 t dce_v11_0_afmt_init -ffffffff81e260d0 t dce_v11_0_audio_init -ffffffff81e261d0 t INIT_DELAYED_WORK -ffffffff81e26210 t dce_v11_0_crtc_cursor_set2 -ffffffff81e264d0 t dce_v11_0_crtc_cursor_move -ffffffff81e265a0 t dce_v11_0_crtc_gamma_set -ffffffff81e265e0 t dce_v11_0_crtc_destroy -ffffffff81e26610 t amdgpu_bo_reserve -ffffffff81e26810 t amdgpu_bo_unreserve -ffffffff81e268f0 t dce_v11_0_lock_cursor -ffffffff81e26950 t dce_v11_0_cursor_move_locked -ffffffff81e26ab0 t dce_v11_0_show_cursor -ffffffff81e26b50 t dce_v11_0_crtc_load_lut -ffffffff81e26eb0 t dce_v11_0_crtc_dpms -ffffffff81e27090 t dce_v11_0_crtc_prepare -ffffffff81e270d0 t dce_v11_0_crtc_commit -ffffffff81e27100 t dce_v11_0_crtc_mode_fixup -ffffffff81e27370 t dce_v11_0_crtc_mode_set -ffffffff81e275d0 t dce_v11_0_crtc_set_base -ffffffff81e275f0 t dce_v11_0_crtc_set_base_atomic -ffffffff81e27610 t dce_v11_0_crtc_disable -ffffffff81e277b0 t dce_v11_0_crtc_do_set_base -ffffffff81e27eb0 t __delayed_work_tick -ffffffff81e28000 t df_v1_7_sw_init -ffffffff81e28040 t df_v1_7_sw_fini -ffffffff81e28070 t df_v1_7_enable_broadcast_mode -ffffffff81e281a0 t df_v1_7_get_fb_channel_number -ffffffff81e28230 t df_v1_7_get_hbm_channel_number -ffffffff81e28280 t df_v1_7_update_medium_grain_clock_gating -ffffffff81e28400 t df_v1_7_get_clockgating_state -ffffffff81e28490 t df_v1_7_enable_ecc_force_par_wr_rmw -ffffffff81e29000 t df_v3_6_sw_init -ffffffff81e29150 t df_v3_6_sw_fini -ffffffff81e29180 t df_v3_6_enable_broadcast_mode -ffffffff81e292b0 t df_v3_6_get_fb_channel_number -ffffffff81e29390 t df_v3_6_get_hbm_channel_number -ffffffff81e293e0 t df_v3_6_update_medium_grain_clock_gating -ffffffff81e29580 t df_v3_6_get_clockgating_state -ffffffff81e29610 t df_v3_6_pmc_start -ffffffff81e29910 t df_v3_6_pmc_stop -ffffffff81e29bb0 t df_v3_6_pmc_get_count -ffffffff81e29d40 t df_v3_6_get_fica -ffffffff81e29e30 t df_v3_6_set_fica -ffffffff81e29f10 t df_v3_6_query_ras_poison_mode -ffffffff81e2b000 t df_v4_3_query_ras_poison_mode -ffffffff81e2c000 T dimgrey_cavefish_reg_base_init -ffffffff81e2d000 T emu_soc_asic_init -ffffffff81e2e000 t gfx_v10_0_early_init -ffffffff81e2e800 t gfx_v10_0_late_init -ffffffff81e2e870 t gfx_v10_0_sw_init -ffffffff81e2ed80 t gfx_v10_0_sw_fini -ffffffff81e2efa0 t gfx_v10_0_hw_init -ffffffff81e31d00 t gfx_v10_0_hw_fini -ffffffff81e31de0 t gfx_v10_0_suspend -ffffffff81e31e20 t gfx_v10_0_resume -ffffffff81e31e30 t gfx_v10_0_is_idle -ffffffff81e31ec0 t gfx_v10_0_wait_for_idle -ffffffff81e31fc0 t gfx_v10_0_soft_reset -ffffffff81e32320 t gfx_v10_0_set_clockgating_state -ffffffff81e325d0 t gfx_v10_0_set_powergating_state -ffffffff81e32690 t gfx_v10_0_get_clockgating_state -ffffffff81e327a0 t gfx_v10_0_get_gpu_clock_counter -ffffffff81e32cb0 t gfx_v10_0_select_se_sh -ffffffff81e32d50 t gfx_v10_0_read_wave_data -ffffffff81e32fb0 t gfx_v10_0_read_wave_vgprs -ffffffff81e32fe0 t gfx_v10_0_read_wave_sgprs -ffffffff81e33060 t gfx_v10_0_select_me_pipe_q -ffffffff81e33080 t gfx_v10_0_init_spm_golden_registers -ffffffff81e330f0 t gfx_v10_0_update_perfmon_mgcg -ffffffff81e33220 t wave_read_ind -ffffffff81e33310 t wave_read_regs -ffffffff81e33470 t gfx10_kiq_set_resources -ffffffff81e33790 t gfx10_kiq_map_queues -ffffffff81e33b20 t gfx10_kiq_unmap_queues -ffffffff81e33f20 t gfx10_kiq_query_status -ffffffff81e34210 t gfx10_kiq_invalidate_tlbs -ffffffff81e34330 t gfx_v10_0_ring_get_rptr_compute -ffffffff81e34360 t gfx_v10_0_ring_get_wptr_compute -ffffffff81e343d0 t gfx_v10_0_ring_set_wptr_compute -ffffffff81e34510 t gfx_v10_0_ring_emit_ib_compute -ffffffff81e34850 t gfx_v10_0_ring_emit_fence_kiq -ffffffff81e34c80 t gfx_v10_0_ring_test_ring -ffffffff81e34ee0 t gfx_v10_0_ring_test_ib -ffffffff81e35170 t gfx_v10_0_ring_emit_rreg -ffffffff81e35400 t gfx_v10_0_ring_emit_wreg -ffffffff81e35630 t gfx_v10_0_ring_emit_reg_wait -ffffffff81e35680 t gfx_v10_0_ring_emit_reg_write_reg_wait -ffffffff81e35710 t gfx_v10_0_wait_reg_mem -ffffffff81e35a40 t gfx_v10_0_ring_get_rptr_gfx -ffffffff81e35a70 t gfx_v10_0_ring_get_wptr_gfx -ffffffff81e35b80 t gfx_v10_0_ring_set_wptr_gfx -ffffffff81e35d90 t gfx_v10_0_ring_emit_ib_gfx -ffffffff81e36410 t gfx_v10_0_ring_emit_fence -ffffffff81e367e0 t gfx_v10_0_ring_emit_pipeline_sync -ffffffff81e36840 t gfx_v10_0_ring_emit_vm_flush -ffffffff81e36a10 t gfx_v10_0_ring_emit_hdp_flush -ffffffff81e36ae0 t gfx_v10_0_ring_emit_gds_switch -ffffffff81e36bc0 t gfx_v10_0_ring_emit_init_cond_exec -ffffffff81e36df0 t gfx_v10_0_ring_emit_patch_cond_exec -ffffffff81e36eb0 t gfx_v10_0_ring_emit_sb -ffffffff81e36fa0 t gfx_v10_0_ring_emit_cntxcntl -ffffffff81e37490 t gfx_v10_0_ring_emit_frame_cntl -ffffffff81e375a0 t gfx_v10_0_ring_soft_recovery -ffffffff81e37610 t gfx_v10_0_ring_preempt_ib -ffffffff81e37780 t gfx_v10_0_emit_mem_sync -ffffffff81e37ab0 t gfx_v10_0_write_data_to_reg -ffffffff81e37cc0 t gfx_v10_0_set_eop_interrupt_state -ffffffff81e37da0 t gfx_v10_0_eop_irq -ffffffff81e37f50 t gfx_v10_0_set_gfx_eop_interrupt_state -ffffffff81e380f0 t gfx_v10_0_set_compute_eop_interrupt_state -ffffffff81e382b0 t gfx_v10_0_kiq_set_interrupt_state -ffffffff81e385a0 t gfx_v10_0_kiq_irq -ffffffff81e38620 t gfx_v10_0_set_priv_reg_fault_state -ffffffff81e38760 t gfx_v10_0_priv_reg_irq -ffffffff81e387c0 t gfx_v10_0_handle_priv_fault -ffffffff81e38920 t gfx_v10_0_set_priv_inst_fault_state -ffffffff81e38a60 t gfx_v10_0_priv_inst_irq -ffffffff81e38ac0 t gfx_v10_0_is_rlc_enabled -ffffffff81e38b50 t gfx_v10_0_set_safe_mode -ffffffff81e38e00 t gfx_v10_0_unset_safe_mode -ffffffff81e38eb0 t gfx_v10_0_rlc_init -ffffffff81e38ed0 t gfx_v10_0_get_csb_size -ffffffff81e38f00 t gfx_v10_0_get_csb_buffer -ffffffff81e39070 t gfx_v10_0_rlc_resume -ffffffff81e39ae0 t gfx_v10_0_rlc_stop -ffffffff81e39bc0 t gfx_v10_0_rlc_reset -ffffffff81e39d70 t gfx_v10_0_rlc_start -ffffffff81e39f20 t gfx_v10_0_update_spm_vmid -ffffffff81e39f60 t gfx_v10_0_wait_for_rlc_autoload_complete -ffffffff81e3a880 t gfx_v10_0_init_csb -ffffffff81e3ab60 t gfx_v10_0_update_spm_vmid_internal -ffffffff81e3ac80 t gfx_v10_0_rlc_backdoor_autoload_config_mec_cache -ffffffff81e3af50 t gfx_v10_0_is_rlcg_access_range -ffffffff81e3af80 t gfx_v10_0_gfx_mqd_init -ffffffff81e3b370 t gfx_v10_0_compute_mqd_init -ffffffff81e3b820 t gfx_v10_0_mec_init -ffffffff81e3ba30 t gfx_v10_0_compute_ring_init -ffffffff81e3bb70 t gfx_v10_0_rlc_backdoor_autoload_buffer_init -ffffffff81e3bdd0 t gfx_v10_0_gpu_early_init -ffffffff81e3c030 t amdgpu_bo_unreserve -ffffffff81e3c110 t gfx_v10_0_cp_resume -ffffffff81e3eb00 t gfx_v10_3_get_disabled_sa -ffffffff81e3ec20 t gfx_v10_0_get_rb_active_bitmap -ffffffff81e3ed50 t gfx_v10_0_get_wgp_active_bitmap_per_sh -ffffffff81e3ee60 t gfx_v10_0_enable_gui_idle_interrupt -ffffffff81e3ef70 t gfx_v10_0_cp_gfx_enable -ffffffff81e3f1e0 t gfx_v10_0_cp_compute_enable -ffffffff81e3f380 t amdgpu_bo_reserve -ffffffff81e3f500 t gfx_v10_0_kiq_init_register -ffffffff81e403a0 t gfx_v10_0_cp_gfx_switch_pipe -ffffffff81e404a0 t gfx_v10_0_cp_gfx_set_doorbell -ffffffff81e40780 t gfx_v10_0_cp_gfx_start -ffffffff81e41170 t gfx_v10_0_update_fine_grain_clock_gating -ffffffff81e414c0 t gfx_v10_0_update_medium_grain_clock_gating -ffffffff81e41c00 t gfx_v10_0_update_3d_clock_gating -ffffffff81e41ff0 t gfx_v10_0_update_coarse_grain_clock_gating -ffffffff81e423d0 t gfx_v10_cntl_pg -ffffffff81e43000 t gfx_v11_0_early_init -ffffffff81e43750 t gfx_v11_0_late_init -ffffffff81e437c0 t gfx_v11_0_sw_init -ffffffff81e43d00 t gfx_v11_0_sw_fini -ffffffff81e43f10 t gfx_v11_0_hw_init -ffffffff81e48320 t gfx_v11_0_hw_fini -ffffffff81e48420 t gfx_v11_0_suspend -ffffffff81e48460 t gfx_v11_0_resume -ffffffff81e48470 t gfx_v11_0_is_idle -ffffffff81e48500 t gfx_v11_0_wait_for_idle -ffffffff81e48600 t gfx_v11_0_check_soft_reset -ffffffff81e48730 t gfx_v11_0_soft_reset -ffffffff81e49470 t gfx_v11_0_post_soft_reset -ffffffff81e49480 t gfx_v11_0_set_clockgating_state -ffffffff81e4a0c0 t gfx_v11_0_set_powergating_state -ffffffff81e4a160 t gfx_v11_0_get_clockgating_state -ffffffff81e4a330 t gfx_v11_0_get_gpu_clock_counter -ffffffff81e4a6b0 t gfx_v11_0_select_se_sh -ffffffff81e4a750 t gfx_v11_0_read_wave_data -ffffffff81e4a990 t gfx_v11_0_read_wave_vgprs -ffffffff81e4a9c0 t gfx_v11_0_read_wave_sgprs -ffffffff81e4aa40 t gfx_v11_0_select_me_pipe_q -ffffffff81e4aa60 t gfx_v11_0_update_perf_clk -ffffffff81e4ab90 t gfx_v11_0_get_gfx_shadow_info -ffffffff81e4ac00 t wave_read_ind -ffffffff81e4acf0 t wave_read_regs -ffffffff81e4ae50 t gfx11_kiq_set_resources -ffffffff81e4b170 t gfx11_kiq_map_queues -ffffffff81e4b500 t gfx11_kiq_unmap_queues -ffffffff81e4b900 t gfx11_kiq_query_status -ffffffff81e4bbf0 t gfx11_kiq_invalidate_tlbs -ffffffff81e4bd10 t gfx_v11_0_ring_get_rptr_compute -ffffffff81e4bd40 t gfx_v11_0_ring_get_wptr_compute -ffffffff81e4bdb0 t gfx_v11_0_ring_set_wptr_compute -ffffffff81e4bef0 t gfx_v11_0_ring_emit_ib_compute -ffffffff81e4c230 t gfx_v11_0_ring_emit_fence_kiq -ffffffff81e4c660 t gfx_v11_0_ring_test_ring -ffffffff81e4c8e0 t gfx_v11_0_ring_test_ib -ffffffff81e4cb80 t gfx_v11_0_ring_emit_rreg -ffffffff81e4ce10 t gfx_v11_0_ring_emit_wreg -ffffffff81e4d040 t gfx_v11_0_ring_emit_reg_wait -ffffffff81e4d090 t gfx_v11_0_ring_emit_reg_write_reg_wait -ffffffff81e4d100 t gfx_v11_0_wait_reg_mem -ffffffff81e4d430 t gfx_v11_0_ring_get_rptr_gfx -ffffffff81e4d460 t gfx_v11_0_ring_get_wptr_gfx -ffffffff81e4d570 t gfx_v11_0_ring_set_wptr_gfx -ffffffff81e4d790 t gfx_v11_0_ring_emit_ib_gfx -ffffffff81e4de20 t gfx_v11_0_ring_emit_fence -ffffffff81e4e1f0 t gfx_v11_0_ring_emit_pipeline_sync -ffffffff81e4e250 t gfx_v11_0_ring_emit_vm_flush -ffffffff81e4e420 t gfx_v11_0_ring_emit_hdp_flush -ffffffff81e4e4f0 t gfx_v11_0_ring_emit_gds_switch -ffffffff81e4e5d0 t gfx_v11_0_ring_emit_init_cond_exec -ffffffff81e4e800 t gfx_v11_0_ring_emit_patch_cond_exec -ffffffff81e4e8c0 t gfx_v11_0_ring_emit_cntxcntl -ffffffff81e4ea20 t gfx_v11_0_ring_emit_gfx_shadow -ffffffff81e4ede0 t gfx_v11_0_ring_emit_frame_cntl -ffffffff81e4eef0 t gfx_v11_0_ring_soft_recovery -ffffffff81e4ef60 t gfx_v11_0_ring_preempt_ib -ffffffff81e4f0d0 t gfx_v11_0_emit_mem_sync -ffffffff81e4f400 t gfx_v11_0_write_data_to_reg -ffffffff81e4f610 t gfx_v11_0_set_eop_interrupt_state -ffffffff81e4f6a0 t gfx_v11_0_eop_irq -ffffffff81e4f850 t gfx_v11_0_set_gfx_eop_interrupt_state -ffffffff81e4f9f0 t gfx_v11_0_set_compute_eop_interrupt_state -ffffffff81e4fb80 t gfx_v11_0_set_priv_reg_fault_state -ffffffff81e4fcc0 t gfx_v11_0_priv_reg_irq -ffffffff81e4fd20 t gfx_v11_0_handle_priv_fault -ffffffff81e4fe80 t gfx_v11_0_set_priv_inst_fault_state -ffffffff81e4ffc0 t gfx_v11_0_priv_inst_irq -ffffffff81e50020 t gfx_v11_0_rlc_gc_fed_irq -ffffffff81e50070 t gfx_v11_0_is_rlc_enabled -ffffffff81e50100 t gfx_v11_0_set_safe_mode -ffffffff81e50260 t gfx_v11_0_unset_safe_mode -ffffffff81e502d0 t gfx_v11_0_rlc_init -ffffffff81e50350 t gfx_v11_0_get_csb_size -ffffffff81e50380 t gfx_v11_0_get_csb_buffer -ffffffff81e504f0 t gfx_v11_0_rlc_resume -ffffffff81e51250 t gfx_v11_0_rlc_stop -ffffffff81e51330 t gfx_v11_0_rlc_reset -ffffffff81e514e0 t gfx_v11_0_rlc_start -ffffffff81e51690 t gfx_v11_0_update_spm_vmid -ffffffff81e51790 t gfx_v11_0_init_csb -ffffffff81e51920 t gfx_v11_0_gfx_mqd_init -ffffffff81e51d00 t gfx_v11_0_compute_mqd_init -ffffffff81e52230 t gfx_v11_0_mec_init -ffffffff81e52370 t gfx_v11_0_compute_ring_init -ffffffff81e524b0 t gfx_v11_0_rlc_autoload_buffer_init -ffffffff81e526a0 t gfx_v11_0_gpu_early_init -ffffffff81e52770 t amdgpu_bo_unreserve -ffffffff81e52850 t gfx_v11_0_disable_gpa_mode -ffffffff81e529f0 t gfx_v11_0_cp_resume -ffffffff81e56810 t gfx_v11_0_config_me_cache -ffffffff81e56bd0 t gfx_v11_0_config_pfp_cache -ffffffff81e56f90 t gfx_v11_0_config_mec_cache -ffffffff81e57350 t gfx_v11_0_get_sa_active_bitmap -ffffffff81e57470 t gfx_v11_0_enable_gui_idle_interrupt -ffffffff81e57580 t gfx_v11_0_cp_compute_enable -ffffffff81e57760 t gfx_v11_0_cp_gfx_enable -ffffffff81e57970 t amdgpu_bo_reserve -ffffffff81e57af0 t gfx_v11_0_kiq_init_register -ffffffff81e58990 t gfx_v11_0_cp_gfx_switch_pipe -ffffffff81e58a70 t gfx_v11_0_cp_gfx_set_doorbell -ffffffff81e58c50 t gfx_v11_0_cp_gfx_start -ffffffff81e594d0 t gfx_v11_cntl_pg -ffffffff81e5a000 t gfx_v11_0_3_rlc_gc_fed_irq -ffffffff81e5a200 t gfx_v11_0_3_poison_consumption_handler -ffffffff81e5b000 t gfx_v8_0_early_init -ffffffff81e5b2f0 t gfx_v8_0_late_init -ffffffff81e5ba10 t gfx_v8_0_sw_init -ffffffff81e5bdd0 t gfx_v8_0_sw_fini -ffffffff81e5bf70 t gfx_v8_0_hw_init -ffffffff81e5e110 t gfx_v8_0_hw_fini -ffffffff81e5e5c0 t gfx_v8_0_suspend -ffffffff81e5e600 t gfx_v8_0_resume -ffffffff81e5e610 t gfx_v8_0_is_idle -ffffffff81e5e680 t gfx_v8_0_wait_for_idle -ffffffff81e5e730 t gfx_v8_0_check_soft_reset -ffffffff81e5e810 t gfx_v8_0_pre_soft_reset -ffffffff81e5e970 t gfx_v8_0_soft_reset -ffffffff81e5eb30 t gfx_v8_0_post_soft_reset -ffffffff81e5ecb0 t gfx_v8_0_set_clockgating_state -ffffffff81e5ef30 t gfx_v8_0_set_powergating_state -ffffffff81e5f2e0 t gfx_v8_0_get_clockgating_state -ffffffff81e5f3c0 t gfx_v8_0_get_gpu_clock_counter -ffffffff81e5f460 t gfx_v8_0_select_se_sh -ffffffff81e5f4c0 t gfx_v8_0_read_wave_data -ffffffff81e5f960 t gfx_v8_0_read_wave_sgprs -ffffffff81e5fa10 t gfx_v8_0_select_me_pipe_q -ffffffff81e5fa30 t gfx_v8_0_ring_get_rptr -ffffffff81e5fa60 t gfx_v8_0_ring_get_wptr_compute -ffffffff81e5fa90 t gfx_v8_0_ring_set_wptr_compute -ffffffff81e5fad0 t gfx_v8_0_ring_emit_fence_kiq -ffffffff81e5fef0 t gfx_v8_0_ring_test_ring -ffffffff81e600f0 t gfx_v8_0_ring_emit_rreg -ffffffff81e60380 t gfx_v8_0_ring_emit_wreg -ffffffff81e605b0 t gfx_v8_0_ring_get_wptr_gfx -ffffffff81e60610 t gfx_v8_0_ring_set_wptr_gfx -ffffffff81e60680 t gfx_v8_0_ring_emit_ib_gfx -ffffffff81e60be0 t gfx_v8_0_ring_emit_fence_gfx -ffffffff81e610d0 t gfx_v8_0_ring_emit_pipeline_sync -ffffffff81e613c0 t gfx_v8_0_ring_emit_vm_flush -ffffffff81e61770 t gfx_v8_0_ring_emit_hdp_flush -ffffffff81e61a90 t gfx_v8_0_ring_emit_gds_switch -ffffffff81e62240 t gfx_v8_0_ring_test_ib -ffffffff81e623f0 t gfx_v8_0_ring_emit_init_cond_exec -ffffffff81e62620 t gfx_v8_0_ring_emit_patch_cond_exec -ffffffff81e626d0 t gfx_v8_ring_emit_sb -ffffffff81e627c0 t gfx_v8_ring_emit_cntxcntl -ffffffff81e62d60 t gfx_v8_0_ring_soft_recovery -ffffffff81e62d90 t gfx_v8_0_emit_mem_sync -ffffffff81e62f90 t gfx_v8_0_ring_emit_ib_compute -ffffffff81e63290 t gfx_v8_0_ring_emit_fence_compute -ffffffff81e63590 t gfx_v8_0_emit_mem_sync_compute -ffffffff81e63850 t gfx_v8_0_emit_wave_limit -ffffffff81e63a00 t gfx_v8_0_set_eop_interrupt_state -ffffffff81e63c10 t gfx_v8_0_eop_irq -ffffffff81e63d20 t gfx_v8_0_set_priv_reg_fault_state -ffffffff81e63da0 t gfx_v8_0_priv_reg_irq -ffffffff81e63ea0 t gfx_v8_0_set_priv_inst_fault_state -ffffffff81e63f20 t gfx_v8_0_priv_inst_irq -ffffffff81e64020 t gfx_v8_0_set_cp_ecc_int_state -ffffffff81e64280 t gfx_v8_0_cp_ecc_error_irq -ffffffff81e642d0 t gfx_v8_0_set_sq_int_state -ffffffff81e64360 t gfx_v8_0_sq_irq -ffffffff81e643d0 t gfx_v8_0_parse_sq_irq -ffffffff81e64620 t gfx_v8_0_is_rlc_enabled -ffffffff81e64660 t gfx_v8_0_set_safe_mode -ffffffff81e64760 t gfx_v8_0_unset_safe_mode -ffffffff81e64800 t gfx_v8_0_rlc_init -ffffffff81e648b0 t gfx_v8_0_get_csb_size -ffffffff81e648e0 t gfx_v8_0_get_csb_buffer -ffffffff81e64a50 t gfx_v8_0_cp_jump_table_num -ffffffff81e64a90 t gfx_v8_0_rlc_resume -ffffffff81e64e10 t gfx_v8_0_rlc_stop -ffffffff81e64e80 t gfx_v8_0_rlc_reset -ffffffff81e64f00 t gfx_v8_0_rlc_start -ffffffff81e64f80 t gfx_v8_0_update_spm_vmid -ffffffff81e64ff0 t gfx_v8_0_init_save_restore_list -ffffffff81e65400 t gfx_v8_0_wait_for_rlc_serdes -ffffffff81e65620 t gfx_v8_0_sq_irq_work_func -ffffffff81e65640 t gfx_v8_0_init_microcode -ffffffff81e65ec0 t gfx_v8_0_mec_init -ffffffff81e65fc0 t gfx_v8_0_compute_ring_init -ffffffff81e660f0 t gfx_v8_0_gpu_early_init -ffffffff81e66590 t amdgpu_bo_unreserve -ffffffff81e66670 t gfx_v8_0_kiq_resume -ffffffff81e66920 t gfx_v8_0_cp_gfx_resume -ffffffff81e673e0 t gfx_v8_0_kcq_resume -ffffffff81e67da0 t amdgpu_bo_reserve -ffffffff81e67f20 t gfx_v8_0_mqd_commit -ffffffff81e68100 t gfx_v8_0_mqd_init -ffffffff81e68520 t gfx_v8_0_deactivate_hqd -ffffffff81e685e0 t gfx_v8_0_update_medium_grain_clock_gating -ffffffff81e68920 t gfx_v8_0_update_coarse_grain_clock_gating -ffffffff81e69000 t gfx_v9_0_ras_error_inject -ffffffff81e691b0 t gfx_v9_0_query_ras_error_count -ffffffff81e69d80 t gfx_v9_0_reset_ras_error_count -ffffffff81e6a7b0 T gfx_v9_0_select_se_sh -ffffffff81e6a850 t gfx_v9_0_early_init -ffffffff81e6b380 t gfx_v9_0_late_init -ffffffff81e6c270 t gfx_v9_0_sw_init -ffffffff81e6c930 t gfx_v9_0_sw_fini -ffffffff81e6caf0 t gfx_v9_0_hw_init -ffffffff81e6fad0 t gfx_v9_0_hw_fini -ffffffff81e70280 t gfx_v9_0_suspend -ffffffff81e702c0 t gfx_v9_0_resume -ffffffff81e702d0 t gfx_v9_0_is_idle -ffffffff81e70350 t gfx_v9_0_wait_for_idle -ffffffff81e70440 t gfx_v9_0_soft_reset -ffffffff81e707e0 t gfx_v9_0_set_clockgating_state -ffffffff81e708b0 t gfx_v9_0_set_powergating_state -ffffffff81e70ca0 t gfx_v9_0_get_clockgating_state -ffffffff81e70db0 t gfx_v9_0_get_gpu_clock_counter -ffffffff81e71540 t gfx_v9_0_read_wave_data -ffffffff81e71780 t gfx_v9_0_read_wave_vgprs -ffffffff81e717e0 t gfx_v9_0_read_wave_sgprs -ffffffff81e71810 t gfx_v9_0_select_me_pipe_q -ffffffff81e71830 t wave_read_ind -ffffffff81e71920 t wave_read_regs -ffffffff81e71a70 t gfx_v9_0_kiq_set_resources -ffffffff81e71d90 t gfx_v9_0_kiq_map_queues -ffffffff81e720d0 t gfx_v9_0_kiq_unmap_queues -ffffffff81e72400 t gfx_v9_0_kiq_query_status -ffffffff81e726f0 t gfx_v9_0_kiq_invalidate_tlbs -ffffffff81e72810 t gfx_v9_0_ring_get_rptr_compute -ffffffff81e72840 t gfx_v9_0_ring_get_wptr_compute -ffffffff81e728b0 t gfx_v9_0_ring_set_wptr_compute -ffffffff81e72910 t gfx_v9_0_ring_emit_fence_kiq -ffffffff81e72d40 t gfx_v9_0_ring_test_ring -ffffffff81e72f70 t gfx_v9_0_ring_emit_rreg -ffffffff81e73200 t gfx_v9_0_ring_emit_wreg -ffffffff81e73430 t gfx_v9_0_ring_emit_reg_wait -ffffffff81e73480 t gfx_v9_0_ring_emit_reg_write_reg_wait -ffffffff81e73520 t gfx_v9_0_wait_reg_mem -ffffffff81e73850 t gfx_v9_0_ring_get_rptr_gfx -ffffffff81e73880 t gfx_v9_0_ring_get_wptr_gfx -ffffffff81e73990 t gfx_v9_0_ring_set_wptr_gfx -ffffffff81e73ac0 t gfx_v9_0_ring_emit_ib_gfx -ffffffff81e74140 t gfx_v9_0_ring_emit_fence -ffffffff81e74500 t gfx_v9_0_ring_emit_pipeline_sync -ffffffff81e74560 t gfx_v9_0_ring_emit_vm_flush -ffffffff81e74670 t gfx_v9_0_ring_emit_hdp_flush -ffffffff81e74740 t gfx_v9_0_ring_emit_gds_switch -ffffffff81e74820 t gfx_v9_0_ring_emit_init_cond_exec -ffffffff81e74a50 t gfx_v9_0_ring_emit_patch_cond_exec -ffffffff81e74b10 t gfx_v9_ring_emit_sb -ffffffff81e74c00 t gfx_v9_ring_emit_cntxcntl -ffffffff81e750e0 t gfx_v9_0_ring_emit_frame_cntl -ffffffff81e751f0 t gfx_v9_0_ring_soft_recovery -ffffffff81e75260 t gfx_v9_0_ring_preempt_ib -ffffffff81e75420 t gfx_v9_0_emit_mem_sync -ffffffff81e756e0 t gfx_v9_0_write_data_to_reg -ffffffff81e758f0 t gfx_v9_0_ring_test_ib -ffffffff81e75aa0 t gfx_v9_0_ring_patch_cntl -ffffffff81e75ae0 t gfx_v9_0_ring_patch_ce_meta -ffffffff81e75be0 t gfx_v9_0_ring_patch_de_meta -ffffffff81e75cb0 t gfx_v9_0_ring_emit_ib_compute -ffffffff81e75fe0 t gfx_v9_0_emit_wave_limit -ffffffff81e761c0 t gfx_v9_0_set_eop_interrupt_state -ffffffff81e763a0 t gfx_v9_0_eop_irq -ffffffff81e764e0 t gfx_v9_0_set_compute_eop_interrupt_state -ffffffff81e766a0 t gfx_v9_0_set_priv_reg_fault_state -ffffffff81e767e0 t gfx_v9_0_priv_reg_irq -ffffffff81e768e0 t gfx_v9_0_set_priv_inst_fault_state -ffffffff81e76a20 t gfx_v9_0_priv_inst_irq -ffffffff81e76b20 t gfx_v9_0_set_cp_ecc_error_state -ffffffff81e773b0 t gfx_v9_0_is_rlc_enabled -ffffffff81e77440 t gfx_v9_0_set_safe_mode -ffffffff81e775a0 t gfx_v9_0_unset_safe_mode -ffffffff81e77610 t gfx_v9_0_rlc_init -ffffffff81e77680 t gfx_v9_0_get_csb_size -ffffffff81e776b0 t gfx_v9_0_get_csb_buffer -ffffffff81e777f0 t gfx_v9_0_cp_jump_table_num -ffffffff81e77840 t gfx_v9_0_rlc_resume -ffffffff81e78f50 t gfx_v9_0_rlc_stop -ffffffff81e792f0 t gfx_v9_0_rlc_reset -ffffffff81e79490 t gfx_v9_0_rlc_start -ffffffff81e795e0 t gfx_v9_0_update_spm_vmid -ffffffff81e79620 t gfx_v9_0_is_rlcg_access_range -ffffffff81e79670 t gfx_v9_0_init_csb -ffffffff81e79800 t gfx_v9_0_enable_lbpw -ffffffff81e798f0 t gfx_v9_0_update_spm_vmid_internal -ffffffff81e79a10 t gfx_v9_0_init_always_on_cu_mask -ffffffff81e79ca0 t gfx_v9_0_enable_gui_idle_interrupt -ffffffff81e79da0 t gfx_v9_0_mec_init -ffffffff81e79f90 t gfx_v9_0_compute_ring_init -ffffffff81e7a0d0 t gfx_v9_0_gpu_early_init -ffffffff81e7a510 t amdgpu_bo_unreserve -ffffffff81e7a5f0 t gfx_v9_0_cp_gfx_enable -ffffffff81e7a6e0 t amdgpu_bo_reserve -ffffffff81e7a860 t gfx_v9_0_kiq_init_register -ffffffff81e7b540 t gfx_v9_0_mqd_init -ffffffff81e7ba90 t gfx_v9_0_update_medium_grain_clock_gating -ffffffff81e7bfc0 t gfx_v9_0_update_3d_clock_gating -ffffffff81e7c3b0 t gfx_v9_0_update_coarse_grain_clock_gating -ffffffff81e7d000 t gfx_v9_4_query_ras_error_count -ffffffff81e7de00 t gfx_v9_4_query_ras_error_status -ffffffff81e7dfe0 t gfx_v9_4_reset_ras_error_count -ffffffff81e7f000 T gfx_v9_4_2_do_edc_gpr_workarounds -ffffffff81e7f750 T gfx_v9_4_2_init_golden_registers -ffffffff81e7f7f0 T gfx_v9_4_2_debug_trap_config_init -ffffffff81e7f8d0 T gfx_v9_4_2_set_power_brake_sequence -ffffffff81e7fab0 t gfx_v9_4_2_query_ras_error_count -ffffffff81e7fb60 t gfx_v9_4_2_query_ras_error_status -ffffffff81e803c0 t gfx_v9_4_2_reset_ras_error_count -ffffffff81e80420 t gfx_v9_4_2_reset_ras_error_status -ffffffff81e808f0 t gfx_v9_4_2_enable_watchdog_timer -ffffffff81e80b20 t gfx_v9_4_2_query_uctl2_poison_status -ffffffff81e80ba0 t gfx_v9_4_2_run_shader -ffffffff81e80fa0 t gfx_v9_4_2_wait_for_waves_assigned -ffffffff81e815f0 t gfx_v9_4_2_query_sram_edc_count -ffffffff81e81930 t gfx_v9_4_2_query_utc_edc_count -ffffffff81e81b10 t wave_read_ind -ffffffff81e82000 t gfx_v9_4_3_xcp_suspend -ffffffff81e820a0 t gfx_v9_4_3_xcp_resume -ffffffff81e821e0 t gfx_v9_4_3_query_ras_error_count -ffffffff81e82200 t gfx_v9_4_3_query_ras_error_status -ffffffff81e82220 t gfx_v9_4_3_reset_ras_error_count -ffffffff81e82240 t gfx_v9_4_3_reset_ras_error_status -ffffffff81e82260 t gfx_v9_4_3_enable_watchdog_timer -ffffffff81e82280 t gfx_v9_4_3_early_init -ffffffff81e82940 t gfx_v9_4_3_late_init -ffffffff81e829c0 t gfx_v9_4_3_sw_init -ffffffff81e82e20 t gfx_v9_4_3_sw_fini -ffffffff81e82fd0 t gfx_v9_4_3_hw_init -ffffffff81e83a70 t gfx_v9_4_3_hw_fini -ffffffff81e83b30 t gfx_v9_4_3_suspend -ffffffff81e83bf0 t gfx_v9_4_3_resume -ffffffff81e83c00 t gfx_v9_4_3_is_idle -ffffffff81e83db0 t gfx_v9_4_3_wait_for_idle -ffffffff81e83e40 t gfx_v9_4_3_soft_reset -ffffffff81e84550 t gfx_v9_4_3_set_clockgating_state -ffffffff81e846b0 t gfx_v9_4_3_set_powergating_state -ffffffff81e846e0 t gfx_v9_4_3_get_clockgating_state -ffffffff81e84850 t gfx_v9_4_3_kiq_set_resources -ffffffff81e84b70 t gfx_v9_4_3_kiq_map_queues -ffffffff81e84ed0 t gfx_v9_4_3_kiq_unmap_queues -ffffffff81e85250 t gfx_v9_4_3_kiq_query_status -ffffffff81e85540 t gfx_v9_4_3_kiq_invalidate_tlbs -ffffffff81e85660 t gfx_v9_4_3_ring_get_rptr_compute -ffffffff81e856a0 t gfx_v9_4_3_ring_get_wptr_compute -ffffffff81e85710 t gfx_v9_4_3_ring_set_wptr_compute -ffffffff81e85770 t gfx_v9_4_3_ring_emit_fence_kiq -ffffffff81e85bc0 t gfx_v9_4_3_ring_test_ring -ffffffff81e85e20 t gfx_v9_4_3_ring_emit_rreg -ffffffff81e860b0 t gfx_v9_4_3_ring_emit_wreg -ffffffff81e862e0 t gfx_v9_4_3_ring_emit_reg_wait -ffffffff81e86330 t gfx_v9_4_3_ring_emit_reg_write_reg_wait -ffffffff81e86350 t gfx_v9_4_3_wait_reg_mem -ffffffff81e86680 t gfx_v9_4_3_ring_emit_ib_compute -ffffffff81e869b0 t gfx_v9_4_3_ring_emit_fence -ffffffff81e86d60 t gfx_v9_4_3_ring_emit_pipeline_sync -ffffffff81e86dc0 t gfx_v9_4_3_ring_emit_vm_flush -ffffffff81e86de0 t gfx_v9_4_3_ring_emit_hdp_flush -ffffffff81e86eb0 t gfx_v9_4_3_ring_emit_gds_switch -ffffffff81e87050 t gfx_v9_4_3_ring_test_ib -ffffffff81e87200 t gfx_v9_4_3_emit_mem_sync -ffffffff81e874c0 t gfx_v9_4_3_emit_wave_limit -ffffffff81e876b0 t gfx_v9_4_3_write_data_to_reg -ffffffff81e878c0 t gfx_v9_4_3_set_eop_interrupt_state -ffffffff81e87a30 t gfx_v9_4_3_eop_irq -ffffffff81e87bd0 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state -ffffffff81e87d30 t gfx_v9_4_3_ih_to_xcc_inst -ffffffff81e87e00 t gfx_v9_4_3_set_priv_reg_fault_state -ffffffff81e881e0 t gfx_v9_4_3_priv_reg_irq -ffffffff81e88240 t gfx_v9_4_3_fault -ffffffff81e883c0 t gfx_v9_4_3_set_priv_inst_fault_state -ffffffff81e887a0 t gfx_v9_4_3_priv_inst_irq -ffffffff81e88800 t gfx_v9_4_3_is_rlc_enabled -ffffffff81e88920 t gfx_v9_4_3_xcc_set_safe_mode -ffffffff81e88bc0 t gfx_v9_4_3_xcc_unset_safe_mode -ffffffff81e88ce0 t gfx_v9_4_3_rlc_init -ffffffff81e88d30 t gfx_v9_4_3_rlc_resume -ffffffff81e88df0 t gfx_v9_4_3_rlc_stop -ffffffff81e88e90 t gfx_v9_4_3_rlc_reset -ffffffff81e89520 t gfx_v9_4_3_rlc_start -ffffffff81e895c0 t gfx_v9_4_3_update_spm_vmid -ffffffff81e897d0 t gfx_v9_4_3_is_rlcg_access_range -ffffffff81e89880 t gfx_v9_4_3_xcc_rlc_resume -ffffffff81e8a0d0 t gfx_v9_4_3_xcc_rlc_stop -ffffffff81e8a7f0 t gfx_v9_4_3_xcc_rlc_start -ffffffff81e8ab80 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt -ffffffff81e8ada0 t gfx_v9_4_3_xcc_select_se_sh -ffffffff81e8afa0 t gfx_v9_4_3_mec_init -ffffffff81e8b2a0 t gfx_v9_4_3_gpu_early_init -ffffffff81e8b4d0 t amdgpu_bo_unreserve -ffffffff81e8b5b0 t gfx_v9_4_3_get_gpu_clock_counter -ffffffff81e8b8f0 t gfx_v9_4_3_read_wave_data -ffffffff81e8bbc0 t gfx_v9_4_3_read_wave_vgprs -ffffffff81e8bbe0 t gfx_v9_4_3_read_wave_sgprs -ffffffff81e8bc30 t gfx_v9_4_3_select_me_pipe_q -ffffffff81e8bca0 t gfx_v9_4_3_switch_compute_partition -ffffffff81e8c000 t wave_read_ind -ffffffff81e8c200 t wave_read_regs -ffffffff81e8c490 t gfx_v9_4_3_xcc_constants_init -ffffffff81e8d510 t gfx_v9_4_3_xcc_cp_resume -ffffffff81e8e4c0 t gfx_v9_4_3_xcc_cp_compute_enable -ffffffff81e8e660 t amdgpu_bo_reserve -ffffffff81e8e7e0 t gfx_v9_4_3_xcc_kiq_init_register -ffffffff81e90420 t gfx_v9_4_3_xcc_mqd_init -ffffffff81e90e60 t gfx_v9_4_3_xcc_fini -ffffffff81e91400 t gfx_v9_4_3_xcc_q_fini_register -ffffffff81e91db0 t gfx_v9_4_3_xcc_update_sram_fgcg -ffffffff81e92020 t gfx_v9_4_3_xcc_update_repeater_fgcg -ffffffff81e92290 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating -ffffffff81e92de0 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating -ffffffff81e93640 t gfx_v9_4_3_inst_query_ras_err_count -ffffffff81e938a0 t gfx_v9_4_3_inst_query_ras_err_status -ffffffff81e94620 t gfx_v9_4_3_inst_reset_ras_err_count -ffffffff81e947e0 t gfx_v9_4_3_inst_reset_ras_err_status -ffffffff81e94f60 t gfx_v9_4_3_inst_enable_watchdog_timer -ffffffff81e96000 t gfxhub_v1_0_get_mc_fb_offset -ffffffff81e96090 t gfxhub_v1_0_setup_vm_pt_regs -ffffffff81e961d0 t gfxhub_v1_0_gart_enable -ffffffff81e97700 t gfxhub_v1_0_gart_disable -ffffffff81e979a0 t gfxhub_v1_0_set_fault_enable_default -ffffffff81e97aa0 t gfxhub_v1_0_init -ffffffff81e98000 T gfxhub_v1_1_get_xgmi_info -ffffffff81e99000 t gfxhub_v1_2_get_mc_fb_offset -ffffffff81e99120 t gfxhub_v1_2_setup_vm_pt_regs -ffffffff81e99190 t gfxhub_v1_2_gart_enable -ffffffff81e99220 t gfxhub_v1_2_gart_disable -ffffffff81e99280 t gfxhub_v1_2_set_fault_enable_default -ffffffff81e992f0 t gfxhub_v1_2_init -ffffffff81e995f0 t gfxhub_v1_2_get_xgmi_info -ffffffff81e99860 t gfxhub_v1_2_xcp_suspend -ffffffff81e998a0 t gfxhub_v1_2_xcp_resume -ffffffff81e99910 t gfxhub_v1_2_xcc_setup_vm_pt_regs -ffffffff81e99c30 t gfxhub_v1_2_xcc_gart_enable -ffffffff81e9d070 t gfxhub_v1_2_xcc_gart_disable -ffffffff81e9d6e0 t gfxhub_v1_2_xcc_set_fault_enable_default -ffffffff81e9e000 t gfxhub_v2_0_get_fb_location -ffffffff81e9e090 t gfxhub_v2_0_get_mc_fb_offset -ffffffff81e9e120 t gfxhub_v2_0_setup_vm_pt_regs -ffffffff81e9e260 t gfxhub_v2_0_gart_enable -ffffffff81e9f490 t gfxhub_v2_0_gart_disable -ffffffff81e9f6e0 t gfxhub_v2_0_set_fault_enable_default -ffffffff81e9f7e0 t gfxhub_v2_0_init -ffffffff81e9f8b0 t gfxhub_v2_0_print_l2_protection_fault_status -ffffffff81e9fa90 t gfxhub_v2_0_get_invalidate_req -ffffffff81ea0000 t gfxhub_v2_1_get_fb_location -ffffffff81ea0090 t gfxhub_v2_1_get_mc_fb_offset -ffffffff81ea0120 t gfxhub_v2_1_setup_vm_pt_regs -ffffffff81ea0260 t gfxhub_v2_1_gart_enable -ffffffff81ea1560 t gfxhub_v2_1_gart_disable -ffffffff81ea17b0 t gfxhub_v2_1_set_fault_enable_default -ffffffff81ea18d0 t gfxhub_v2_1_init -ffffffff81ea19a0 t gfxhub_v2_1_get_xgmi_info -ffffffff81ea1ae0 t gfxhub_v2_1_utcl2_harvest -ffffffff81ea1cc0 t gfxhub_v2_1_save_regs -ffffffff81ea2730 t gfxhub_v2_1_restore_regs -ffffffff81ea3350 t gfxhub_v2_1_halt -ffffffff81ea3720 t gfxhub_v2_1_print_l2_protection_fault_status -ffffffff81ea3900 t gfxhub_v2_1_get_invalidate_req -ffffffff81ea4000 t gfxhub_v3_0_get_fb_location -ffffffff81ea4090 t gfxhub_v3_0_get_mc_fb_offset -ffffffff81ea4120 t gfxhub_v3_0_setup_vm_pt_regs -ffffffff81ea4260 t gfxhub_v3_0_gart_enable -ffffffff81ea5560 t gfxhub_v3_0_gart_disable -ffffffff81ea5800 t gfxhub_v3_0_set_fault_enable_default -ffffffff81ea59d0 t gfxhub_v3_0_init -ffffffff81ea5aa0 t gfxhub_v3_0_print_l2_protection_fault_status -ffffffff81ea5c80 t gfxhub_v3_0_get_invalidate_req -ffffffff81ea6000 t gfxhub_v3_0_3_get_fb_location -ffffffff81ea6090 t gfxhub_v3_0_3_get_mc_fb_offset -ffffffff81ea6120 t gfxhub_v3_0_3_setup_vm_pt_regs -ffffffff81ea6260 t gfxhub_v3_0_3_gart_enable -ffffffff81ea7450 t gfxhub_v3_0_3_gart_disable -ffffffff81ea76f0 t gfxhub_v3_0_3_set_fault_enable_default -ffffffff81ea7810 t gfxhub_v3_0_3_init -ffffffff81ea78e0 t gfxhub_v3_0_3_print_l2_protection_fault_status -ffffffff81ea7ac0 t gfxhub_v3_0_3_get_invalidate_req -ffffffff81ea8000 t gmc_v10_0_early_init -ffffffff81ea8170 t gmc_v10_0_late_init -ffffffff81ea81e0 t gmc_v10_0_sw_init -ffffffff81ea85d0 t gmc_v10_0_sw_fini -ffffffff81ea8620 t gmc_v10_0_hw_init -ffffffff81ea8830 t gmc_v10_0_hw_fini -ffffffff81ea88f0 t gmc_v10_0_suspend -ffffffff81ea8930 t gmc_v10_0_resume -ffffffff81ea8990 t gmc_v10_0_is_idle -ffffffff81ea89c0 t gmc_v10_0_wait_for_idle -ffffffff81ea89f0 t gmc_v10_0_soft_reset -ffffffff81ea8a20 t gmc_v10_0_set_clockgating_state -ffffffff81ea8ad0 t gmc_v10_0_set_powergating_state -ffffffff81ea8b00 t gmc_v10_0_get_clockgating_state -ffffffff81ea8ba0 t gmc_v10_0_flush_gpu_tlb -ffffffff81ea8e30 t gmc_v10_0_flush_gpu_tlb_pasid -ffffffff81ea90e0 t gmc_v10_0_emit_flush_gpu_tlb -ffffffff81ea9290 t gmc_v10_0_emit_pasid_mapping -ffffffff81ea9310 t gmc_v10_0_map_mtype -ffffffff81ea9360 t gmc_v10_0_get_vm_pde -ffffffff81ea9450 t gmc_v10_0_get_vm_pte -ffffffff81ea9530 t gmc_v10_0_get_vbios_fb_size -ffffffff81ea96a0 t gmc_v10_0_flush_vm_hub -ffffffff81ea9ad0 t gmc_v10_0_vm_fault_interrupt_state -ffffffff81ea9b70 t gmc_v10_0_process_interrupt -ffffffff81ea9e50 t gmc_v10_0_ecc_interrupt_state -ffffffff81ea9e80 t gmc_v10_0_gart_init -ffffffff81eaa000 t gmc_v11_0_early_init -ffffffff81eaa1f0 t gmc_v11_0_late_init -ffffffff81eaa260 t gmc_v11_0_sw_init -ffffffff81eaa570 t gmc_v11_0_sw_fini -ffffffff81eaa5c0 t gmc_v11_0_hw_init -ffffffff81eaa720 t gmc_v11_0_hw_fini -ffffffff81eaa7c0 t gmc_v11_0_suspend -ffffffff81eaa860 t gmc_v11_0_resume -ffffffff81eaa8c0 t gmc_v11_0_is_idle -ffffffff81eaa8f0 t gmc_v11_0_wait_for_idle -ffffffff81eaa920 t gmc_v11_0_soft_reset -ffffffff81eaa950 t gmc_v11_0_set_clockgating_state -ffffffff81eaa9d0 t gmc_v11_0_set_powergating_state -ffffffff81eaaa00 t gmc_v11_0_get_clockgating_state -ffffffff81eaaa40 t gmc_v11_0_flush_gpu_tlb -ffffffff81eaaef0 t gmc_v11_0_flush_gpu_tlb_pasid -ffffffff81eab160 t gmc_v11_0_emit_flush_gpu_tlb -ffffffff81eab310 t gmc_v11_0_emit_pasid_mapping -ffffffff81eab390 t gmc_v11_0_map_mtype -ffffffff81eab3e0 t gmc_v11_0_get_vm_pde -ffffffff81eab4e0 t gmc_v11_0_get_vm_pte -ffffffff81eab5c0 t gmc_v11_0_get_vbios_fb_size -ffffffff81eab730 t gmc_v11_0_vm_fault_interrupt_state -ffffffff81eab7d0 t gmc_v11_0_process_interrupt -ffffffff81eaba00 t gmc_v11_0_ecc_interrupt_state -ffffffff81eaba30 t gmc_v11_0_gart_init -ffffffff81eac000 t gmc_v7_0_early_init -ffffffff81eac0a0 t gmc_v7_0_late_init -ffffffff81eac0f0 t gmc_v7_0_sw_init -ffffffff81eac520 t gmc_v7_0_sw_fini -ffffffff81eac5a0 t gmc_v7_0_hw_init -ffffffff81eacf20 t gmc_v7_0_hw_fini -ffffffff81eacfe0 t gmc_v7_0_suspend -ffffffff81ead020 t gmc_v7_0_resume -ffffffff81ead080 t gmc_v7_0_is_idle -ffffffff81ead0d0 t gmc_v7_0_wait_for_idle -ffffffff81ead170 t gmc_v7_0_soft_reset -ffffffff81ead3d0 t gmc_v7_0_set_clockgating_state -ffffffff81ead630 t gmc_v7_0_set_powergating_state -ffffffff81ead660 t gmc_v7_0_flush_gpu_tlb -ffffffff81ead690 t gmc_v7_0_flush_gpu_tlb_pasid -ffffffff81ead750 t gmc_v7_0_emit_flush_gpu_tlb -ffffffff81ead7f0 t gmc_v7_0_emit_pasid_mapping -ffffffff81ead820 t gmc_v7_0_set_prt -ffffffff81ead9e0 t gmc_v7_0_get_vm_pde -ffffffff81eada40 t gmc_v7_0_get_vm_pte -ffffffff81eada80 t gmc_v7_0_get_vbios_fb_size -ffffffff81eadaf0 t gmc_v7_0_vm_fault_interrupt_state -ffffffff81eadbc0 t gmc_v7_0_process_interrupt -ffffffff81eade70 t gmc_v7_0_gart_init -ffffffff81eae000 t gmc_v8_0_early_init -ffffffff81eae0a0 t gmc_v8_0_late_init -ffffffff81eae0f0 t gmc_v8_0_sw_init -ffffffff81eae6a0 t gmc_v8_0_sw_fini -ffffffff81eae720 t gmc_v8_0_hw_init -ffffffff81eaf3b0 t gmc_v8_0_hw_fini -ffffffff81eaf470 t gmc_v8_0_suspend -ffffffff81eaf4b0 t gmc_v8_0_resume -ffffffff81eaf510 t gmc_v8_0_is_idle -ffffffff81eaf560 t gmc_v8_0_wait_for_idle -ffffffff81eaf600 t gmc_v8_0_check_soft_reset -ffffffff81eaf670 t gmc_v8_0_pre_soft_reset -ffffffff81eaf7e0 t gmc_v8_0_soft_reset -ffffffff81eaf8b0 t gmc_v8_0_post_soft_reset -ffffffff81eaf920 t gmc_v8_0_set_clockgating_state -ffffffff81eafee0 t gmc_v8_0_set_powergating_state -ffffffff81eaff10 t gmc_v8_0_get_clockgating_state -ffffffff81eaff80 t gmc_v8_0_flush_gpu_tlb -ffffffff81eaffb0 t gmc_v8_0_flush_gpu_tlb_pasid -ffffffff81eb0070 t gmc_v8_0_emit_flush_gpu_tlb -ffffffff81eb0110 t gmc_v8_0_emit_pasid_mapping -ffffffff81eb0140 t gmc_v8_0_set_prt -ffffffff81eb0300 t gmc_v8_0_get_vm_pde -ffffffff81eb0360 t gmc_v8_0_get_vm_pte -ffffffff81eb03b0 t gmc_v8_0_get_vbios_fb_size -ffffffff81eb0420 t gmc_v8_0_vm_fault_interrupt_state -ffffffff81eb04f0 t gmc_v8_0_process_interrupt -ffffffff81eb0890 t gmc_v8_0_gart_init -ffffffff81eb1000 T gmc_v9_0_restore_registers -ffffffff81eb1160 t gmc_v9_0_early_init -ffffffff81eb1510 t gmc_v9_0_late_init -ffffffff81eb1620 t gmc_v9_0_sw_init -ffffffff81eb1d80 t gmc_v9_0_sw_fini -ffffffff81eb1e40 t gmc_v9_0_hw_init -ffffffff81eb2300 t gmc_v9_0_hw_fini -ffffffff81eb23e0 t gmc_v9_0_suspend -ffffffff81eb2420 t gmc_v9_0_resume -ffffffff81eb2480 t gmc_v9_0_is_idle -ffffffff81eb24b0 t gmc_v9_0_wait_for_idle -ffffffff81eb24e0 t gmc_v9_0_soft_reset -ffffffff81eb2510 t gmc_v9_0_set_clockgating_state -ffffffff81eb2570 t gmc_v9_0_set_powergating_state -ffffffff81eb25a0 t gmc_v9_0_get_clockgating_state -ffffffff81eb25e0 t gmc_v9_0_flush_gpu_tlb -ffffffff81eb2c80 t gmc_v9_0_flush_gpu_tlb_pasid -ffffffff81eb3030 t gmc_v9_0_emit_flush_gpu_tlb -ffffffff81eb3230 t gmc_v9_0_emit_pasid_mapping -ffffffff81eb32b0 t gmc_v9_0_map_mtype -ffffffff81eb32f0 t gmc_v9_0_get_vm_pde -ffffffff81eb33f0 t gmc_v9_0_get_vm_pte -ffffffff81eb3720 t gmc_v9_0_override_vm_pte_flags -ffffffff81eb37e0 t gmc_v9_0_get_vbios_fb_size -ffffffff81eb3980 t gmc_v9_0_query_memory_partition -ffffffff81eb39e0 t gmc_v9_0_vm_fault_interrupt_state -ffffffff81eb3e80 t gmc_v9_0_process_interrupt -ffffffff81eb46a0 t gmc_v9_0_ecc_interrupt_state -ffffffff81eb4800 t gmc_v9_0_init_mem_ranges -ffffffff81eb4c30 t gmc_v9_0_gart_init -ffffffff81eb4d60 t gmc_v9_0_save_registers -ffffffff81eb5000 t hdp_v4_0_query_ras_error_count -ffffffff81eb50c0 t hdp_v4_0_reset_ras_error_count -ffffffff81eb51e0 t hdp_v4_0_flush_hdp -ffffffff81eb5230 t hdp_v4_0_invalidate_hdp -ffffffff81eb5310 t hdp_v4_0_update_clock_gating -ffffffff81eb5410 t hdp_v4_0_get_clockgating_state -ffffffff81eb5460 t hdp_v4_0_init_registers -ffffffff81eb6000 t hdp_v5_0_flush_hdp -ffffffff81eb6050 t hdp_v5_0_invalidate_hdp -ffffffff81eb60f0 t hdp_v5_0_update_clock_gating -ffffffff81eb64f0 t hdp_v5_0_get_clockgating_state -ffffffff81eb6610 t hdp_v5_0_init_registers -ffffffff81eb7000 t hdp_v5_2_flush_hdp -ffffffff81eb7050 t hdp_v5_2_update_clock_gating -ffffffff81eb7460 t hdp_v5_2_get_clockgating_state -ffffffff81eb8000 t hdp_v6_0_flush_hdp -ffffffff81eb8050 t hdp_v6_0_update_clock_gating -ffffffff81eb8380 t hdp_v6_0_get_clockgating_state -ffffffff81eb9000 t iceland_ih_early_init -ffffffff81eb9050 t iceland_ih_sw_init -ffffffff81eb90b0 t iceland_ih_sw_fini -ffffffff81eb90f0 t iceland_ih_hw_init -ffffffff81eb9310 t iceland_ih_hw_fini -ffffffff81eb93e0 t iceland_ih_suspend -ffffffff81eb94b0 t iceland_ih_resume -ffffffff81eb94f0 t iceland_ih_is_idle -ffffffff81eb9540 t iceland_ih_wait_for_idle -ffffffff81eb95e0 t iceland_ih_soft_reset -ffffffff81eb96c0 t iceland_ih_set_clockgating_state -ffffffff81eb96f0 t iceland_ih_set_powergating_state -ffffffff81eb9720 t iceland_ih_get_wptr -ffffffff81eb9830 t iceland_ih_decode_iv -ffffffff81eb98b0 t iceland_ih_set_rptr -ffffffff81eba000 t ih_v6_0_early_init -ffffffff81eba050 t ih_v6_0_sw_init -ffffffff81eba1b0 t ih_v6_0_sw_fini -ffffffff81eba1f0 t ih_v6_0_hw_init -ffffffff81eba7a0 t ih_v6_0_hw_fini -ffffffff81eba800 t ih_v6_0_suspend -ffffffff81eba860 t ih_v6_0_resume -ffffffff81eba870 t ih_v6_0_is_idle -ffffffff81eba8a0 t ih_v6_0_wait_for_idle -ffffffff81eba8d0 t ih_v6_0_soft_reset -ffffffff81eba900 t ih_v6_0_set_clockgating_state -ffffffff81ebaa30 t ih_v6_0_set_powergating_state -ffffffff81ebabb0 t ih_v6_0_get_clockgating_state -ffffffff81ebac40 t ih_v6_0_get_wptr -ffffffff81ebad60 t ih_v6_0_set_rptr -ffffffff81ebae30 t ih_v6_0_self_irq -ffffffff81ebaea0 t ih_v6_0_toggle_interrupts -ffffffff81ebb080 t force_update_wptr_for_self_int -ffffffff81ebc000 t ih_v6_1_early_init -ffffffff81ebc050 t ih_v6_1_sw_init -ffffffff81ebc1b0 t ih_v6_1_sw_fini -ffffffff81ebc1f0 t ih_v6_1_hw_init -ffffffff81ebc7a0 t ih_v6_1_hw_fini -ffffffff81ebc800 t ih_v6_1_suspend -ffffffff81ebc860 t ih_v6_1_resume -ffffffff81ebc870 t ih_v6_1_is_idle -ffffffff81ebc8a0 t ih_v6_1_wait_for_idle -ffffffff81ebc8d0 t ih_v6_1_soft_reset -ffffffff81ebc900 t ih_v6_1_set_clockgating_state -ffffffff81ebca30 t ih_v6_1_set_powergating_state -ffffffff81ebcbb0 t ih_v6_1_get_clockgating_state -ffffffff81ebcc40 t ih_v6_1_get_wptr -ffffffff81ebcd60 t ih_v6_1_set_rptr -ffffffff81ebce30 t ih_v6_1_self_irq -ffffffff81ebcea0 t ih_v6_1_toggle_interrupts -ffffffff81ebd080 t force_update_wptr_for_self_int -ffffffff81ebe000 t imu_v11_0_init_microcode -ffffffff81ebe170 t imu_v11_0_load_microcode -ffffffff81ebe4f0 t imu_v11_0_setup -ffffffff81ebe780 t imu_v11_0_start -ffffffff81ebe880 t imu_v11_0_program_rlc_ram -ffffffff81ebea40 t imu_v11_0_wait_for_reset_status -ffffffff81ebeb90 t program_imu_rlc_ram -ffffffff81ebf000 T imu_v11_0_3_program_rlc_ram -ffffffff81ec0000 T jpeg_v1_0_early_init -ffffffff81ec0080 T jpeg_v1_0_sw_init -ffffffff81ec0170 T jpeg_v1_0_sw_fini -ffffffff81ec0190 T jpeg_v1_0_start -ffffffff81ec0c40 t jpeg_v1_0_decode_ring_get_rptr -ffffffff81ec0cd0 t jpeg_v1_0_decode_ring_get_wptr -ffffffff81ec0d60 t jpeg_v1_0_decode_ring_set_wptr -ffffffff81ec0dd0 t jpeg_v1_0_decode_ring_emit_ib -ffffffff81ec16f0 t jpeg_v1_0_decode_ring_emit_fence -ffffffff81ec2030 t jpeg_v1_0_decode_ring_emit_vm_flush -ffffffff81ec20a0 t jpeg_v1_0_decode_ring_nop -ffffffff81ec2200 t jpeg_v1_0_decode_ring_insert_start -ffffffff81ec23c0 t jpeg_v1_0_decode_ring_insert_end -ffffffff81ec2580 t jpeg_v1_0_ring_begin_use -ffffffff81ec2680 t jpeg_v1_0_decode_ring_emit_wreg -ffffffff81ec28e0 t jpeg_v1_0_decode_ring_emit_reg_wait -ffffffff81ec2d00 t jpeg_v1_0_set_interrupt_state -ffffffff81ec2d30 t jpeg_v1_0_process_interrupt -ffffffff81ec3000 T jpeg_v2_0_dec_ring_insert_start -ffffffff81ec31a0 T jpeg_v2_0_dec_ring_insert_end -ffffffff81ec3340 T jpeg_v2_0_dec_ring_emit_fence -ffffffff81ec3a20 T jpeg_v2_0_dec_ring_emit_ib -ffffffff81ec41d0 T jpeg_v2_0_dec_ring_emit_reg_wait -ffffffff81ec4580 T jpeg_v2_0_dec_ring_emit_vm_flush -ffffffff81ec45f0 T jpeg_v2_0_dec_ring_emit_wreg -ffffffff81ec4830 T jpeg_v2_0_dec_ring_nop -ffffffff81ec4990 t jpeg_v2_0_early_init -ffffffff81ec4a20 t jpeg_v2_0_sw_init -ffffffff81ec4b50 t jpeg_v2_0_sw_fini -ffffffff81ec4ba0 t jpeg_v2_0_hw_init -ffffffff81ec4c20 t jpeg_v2_0_hw_fini -ffffffff81ec4d00 t jpeg_v2_0_suspend -ffffffff81ec4d30 t jpeg_v2_0_resume -ffffffff81ec4dc0 t jpeg_v2_0_is_idle -ffffffff81ec4e50 t jpeg_v2_0_wait_for_idle -ffffffff81ec4e90 t jpeg_v2_0_set_clockgating_state -ffffffff81ec4f40 t jpeg_v2_0_set_powergating_state -ffffffff81ec5660 t jpeg_v2_0_dec_ring_get_rptr -ffffffff81ec56f0 t jpeg_v2_0_dec_ring_get_wptr -ffffffff81ec5790 t jpeg_v2_0_dec_ring_set_wptr -ffffffff81ec5830 t jpeg_v2_0_set_interrupt_state -ffffffff81ec5860 t jpeg_v2_0_process_interrupt -ffffffff81ec58f0 t jpeg_v2_0_enable_clock_gating -ffffffff81ec5aa0 t jpeg_v2_0_disable_clock_gating -ffffffff81ec6000 t jpeg_v2_6_query_ras_poison_status -ffffffff81ec6150 t jpeg_v2_5_early_init -ffffffff81ec6350 t jpeg_v2_5_sw_init -ffffffff81ec65f0 t jpeg_v2_5_sw_fini -ffffffff81ec6640 t jpeg_v2_5_hw_init -ffffffff81ec6730 t jpeg_v2_5_hw_fini -ffffffff81ec68b0 t jpeg_v2_5_suspend -ffffffff81ec68e0 t jpeg_v2_5_resume -ffffffff81ec69e0 t jpeg_v2_5_is_idle -ffffffff81ec6ae0 t jpeg_v2_5_wait_for_idle -ffffffff81ec6b90 t jpeg_v2_5_set_clockgating_state -ffffffff81ec6c40 t jpeg_v2_5_set_powergating_state -ffffffff81ec7370 t jpeg_v2_5_dec_ring_get_rptr -ffffffff81ec7410 t jpeg_v2_5_dec_ring_get_wptr -ffffffff81ec74c0 t jpeg_v2_5_dec_ring_set_wptr -ffffffff81ec7570 t jpeg_v2_6_dec_ring_insert_start -ffffffff81ec7730 t jpeg_v2_6_dec_ring_insert_end -ffffffff81ec78f0 t jpeg_v2_5_set_interrupt_state -ffffffff81ec7920 t jpeg_v2_5_process_interrupt -ffffffff81ec79e0 t jpeg_v2_6_set_ras_interrupt_state -ffffffff81ec7a10 t jpeg_v2_5_enable_clock_gating -ffffffff81ec7af0 t jpeg_v2_5_disable_clock_gating -ffffffff81ec8000 t jpeg_v3_0_early_init -ffffffff81ec8110 t jpeg_v3_0_sw_init -ffffffff81ec8240 t jpeg_v3_0_sw_fini -ffffffff81ec8290 t jpeg_v3_0_hw_init -ffffffff81ec8310 t jpeg_v3_0_hw_fini -ffffffff81ec83f0 t jpeg_v3_0_suspend -ffffffff81ec8420 t jpeg_v3_0_resume -ffffffff81ec84b0 t jpeg_v3_0_is_idle -ffffffff81ec8540 t jpeg_v3_0_wait_for_idle -ffffffff81ec8580 t jpeg_v3_0_set_clockgating_state -ffffffff81ec8630 t jpeg_v3_0_set_powergating_state -ffffffff81ec8e10 t jpeg_v3_0_dec_ring_get_rptr -ffffffff81ec8ea0 t jpeg_v3_0_dec_ring_get_wptr -ffffffff81ec8f40 t jpeg_v3_0_dec_ring_set_wptr -ffffffff81ec8fe0 t jpeg_v3_0_set_interrupt_state -ffffffff81ec9010 t jpeg_v3_0_process_interrupt -ffffffff81ec90a0 t jpeg_v3_0_enable_clock_gating -ffffffff81ec9170 t jpeg_v3_0_disable_clock_gating -ffffffff81eca000 t jpeg_v4_0_query_ras_poison_status -ffffffff81eca150 t jpeg_v4_0_early_init -ffffffff81eca220 t jpeg_v4_0_sw_init -ffffffff81eca3c0 t jpeg_v4_0_sw_fini -ffffffff81eca410 t jpeg_v4_0_hw_init -ffffffff81ecaa40 t jpeg_v4_0_hw_fini -ffffffff81ecab10 t jpeg_v4_0_suspend -ffffffff81ecab40 t jpeg_v4_0_resume -ffffffff81ecab90 t jpeg_v4_0_is_idle -ffffffff81ecac20 t jpeg_v4_0_wait_for_idle -ffffffff81ecac60 t jpeg_v4_0_set_clockgating_state -ffffffff81ecad10 t jpeg_v4_0_set_powergating_state -ffffffff81ecb470 t jpeg_v4_0_dec_ring_get_rptr -ffffffff81ecb500 t jpeg_v4_0_dec_ring_get_wptr -ffffffff81ecb5a0 t jpeg_v4_0_dec_ring_set_wptr -ffffffff81ecb640 t jpeg_v4_0_set_interrupt_state -ffffffff81ecb670 t jpeg_v4_0_process_interrupt -ffffffff81ecb710 t jpeg_v4_0_set_ras_interrupt_state -ffffffff81ecb740 t jpeg_v4_0_enable_clock_gating -ffffffff81ecb900 t jpeg_v4_0_disable_clock_gating -ffffffff81ecc000 t jpeg_v4_0_3_early_init -ffffffff81ecc170 t jpeg_v4_0_3_sw_init -ffffffff81ecc4a0 t jpeg_v4_0_3_sw_fini -ffffffff81ecc4f0 t jpeg_v4_0_3_hw_init -ffffffff81eccf50 t jpeg_v4_0_3_hw_fini -ffffffff81eccfe0 t jpeg_v4_0_3_suspend -ffffffff81ecd060 t jpeg_v4_0_3_resume -ffffffff81ecd0b0 t jpeg_v4_0_3_is_idle -ffffffff81ecd290 t jpeg_v4_0_3_wait_for_idle -ffffffff81ecd3e0 t jpeg_v4_0_3_set_clockgating_state -ffffffff81ecd470 t jpeg_v4_0_3_set_powergating_state -ffffffff81ece0d0 t jpeg_v4_0_3_dec_ring_get_rptr -ffffffff81ece240 t jpeg_v4_0_3_dec_ring_get_wptr -ffffffff81ece3d0 t jpeg_v4_0_3_dec_ring_set_wptr -ffffffff81ece570 t jpeg_v4_0_3_dec_ring_emit_ib -ffffffff81ecedd0 t jpeg_v4_0_3_dec_ring_emit_fence -ffffffff81ecf560 t jpeg_v4_0_3_dec_ring_emit_vm_flush -ffffffff81ecf5d0 t jpeg_v4_0_3_dec_ring_nop -ffffffff81ecf730 t jpeg_v4_0_3_dec_ring_insert_start -ffffffff81ecf8d0 t jpeg_v4_0_3_dec_ring_insert_end -ffffffff81ecfa70 t jpeg_v4_0_3_dec_ring_emit_wreg -ffffffff81ecfcb0 t jpeg_v4_0_3_dec_ring_emit_reg_wait -ffffffff81ed0060 t jpeg_v4_0_3_set_interrupt_state -ffffffff81ed0090 t jpeg_v4_0_3_process_interrupt -ffffffff81ed02d0 t jpeg_v4_0_3_query_ras_error_count -ffffffff81ed03c0 t jpeg_v4_0_3_reset_ras_error_count -ffffffff81ed04b0 t jpeg_v4_0_3_disable_clock_gating -ffffffff81ed1000 t lsdma_v6_0_copy_mem -ffffffff81ed1370 t lsdma_v6_0_fill_mem -ffffffff81ed1660 t lsdma_v6_0_update_memory_power_gating -ffffffff81ed2000 t mca_v3_0_ras_block_match -ffffffff81ed2050 t mca_v3_0_mp0_query_ras_error_count -ffffffff81ed2070 t mca_v3_0_mp1_query_ras_error_count -ffffffff81ed2090 t mca_v3_0_mpio_query_ras_error_count -ffffffff81ed3000 t mes_v10_0_early_init -ffffffff81ed3060 t mes_v10_0_late_init -ffffffff81ed30b0 t mes_v10_1_sw_init -ffffffff81ed3550 t mes_v10_1_sw_fini -ffffffff81ed3670 t mes_v10_1_hw_init -ffffffff81ed3f60 t mes_v10_1_hw_fini -ffffffff81ed4050 t mes_v10_1_suspend -ffffffff81ed4160 t mes_v10_1_resume -ffffffff81ed41b0 t mes_v10_1_kiq_hw_init -ffffffff81ed45c0 t mes_v10_1_add_hw_queue -ffffffff81ed4740 t mes_v10_1_remove_hw_queue -ffffffff81ed47d0 t mes_v10_1_unmap_legacy_queue -ffffffff81ed48c0 t mes_v10_1_suspend_gang -ffffffff81ed48f0 t mes_v10_1_resume_gang -ffffffff81ed4920 t mes_v10_1_submit_pkt_and_poll_completion -ffffffff81ed4b20 t mes_v10_1_load_microcode -ffffffff81ed5340 t mes_v10_1_enable -ffffffff81ed57c0 t mes_v10_1_queue_init -ffffffff81ed5a60 t amdgpu_bo_unreserve -ffffffff81ed5b40 t mes_v10_1_ring_get_rptr -ffffffff81ed5b70 t mes_v10_1_ring_get_wptr -ffffffff81ed5be0 t mes_v10_1_ring_set_wptr -ffffffff81ed6000 t mes_v11_0_early_init -ffffffff81ed6060 t mes_v11_0_late_init -ffffffff81ed60d0 t mes_v11_0_sw_init -ffffffff81ed6580 t mes_v11_0_sw_fini -ffffffff81ed6740 t mes_v11_0_hw_init -ffffffff81ed6f70 t mes_v11_0_hw_fini -ffffffff81ed6fa0 t mes_v11_0_suspend -ffffffff81ed6fb0 t mes_v11_0_resume -ffffffff81ed7000 t mes_v11_0_kiq_hw_init -ffffffff81ed7210 t mes_v11_0_kiq_hw_fini -ffffffff81ed7350 t mes_v11_0_add_hw_queue -ffffffff81ed7550 t mes_v11_0_remove_hw_queue -ffffffff81ed75e0 t mes_v11_0_unmap_legacy_queue -ffffffff81ed76e0 t mes_v11_0_suspend_gang -ffffffff81ed7710 t mes_v11_0_resume_gang -ffffffff81ed7740 t mes_v11_0_misc_op -ffffffff81ed7900 t mes_v11_0_submit_pkt_and_poll_completion -ffffffff81ed7b20 t mes_v11_0_load_microcode -ffffffff81ed82c0 t mes_v11_0_enable -ffffffff81ed87d0 t mes_v11_0_queue_init -ffffffff81ed9270 t amdgpu_bo_unreserve -ffffffff81ed9350 t mes_v11_0_mqd_init -ffffffff81ed9540 t mes_v11_0_kiq_dequeue -ffffffff81ed9980 t mes_v11_0_ring_get_rptr -ffffffff81ed99b0 t mes_v11_0_ring_get_wptr -ffffffff81ed9a20 t mes_v11_0_ring_set_wptr -ffffffff81eda000 t mmhub_v1_0_query_ras_error_count -ffffffff81eda150 t mmhub_v1_0_reset_ras_error_count -ffffffff81eda200 t mmhub_v1_0_get_fb_location -ffffffff81eda320 t mmhub_v1_0_init -ffffffff81eda3d0 t mmhub_v1_0_gart_enable -ffffffff81edb710 t mmhub_v1_0_set_fault_enable_default -ffffffff81edb830 t mmhub_v1_0_gart_disable -ffffffff81edbad0 t mmhub_v1_0_set_clockgating -ffffffff81edbf60 t mmhub_v1_0_get_clockgating -ffffffff81edc080 t mmhub_v1_0_setup_vm_pt_regs -ffffffff81edc1c0 t mmhub_v1_0_update_power_gating -ffffffff81edd000 t mmhub_v1_7_query_ras_error_count -ffffffff81edd150 t mmhub_v1_7_query_ras_error_status -ffffffff81edd230 t mmhub_v1_7_reset_ras_error_count -ffffffff81edd2d0 t mmhub_v1_7_reset_ras_error_status -ffffffff81edd3d0 t mmhub_v1_7_get_fb_location -ffffffff81edd4f0 t mmhub_v1_7_init -ffffffff81edd590 t mmhub_v1_7_gart_enable -ffffffff81edeaa0 t mmhub_v1_7_set_fault_enable_default -ffffffff81edebc0 t mmhub_v1_7_gart_disable -ffffffff81edee60 t mmhub_v1_7_set_clockgating -ffffffff81edf200 t mmhub_v1_7_get_clockgating -ffffffff81edf320 t mmhub_v1_7_setup_vm_pt_regs -ffffffff81ee0000 t mmhub_v1_8_get_fb_location -ffffffff81ee0120 t mmhub_v1_8_init -ffffffff81ee0280 t mmhub_v1_8_gart_enable -ffffffff81ee1e90 t mmhub_v1_8_set_fault_enable_default -ffffffff81ee2060 t mmhub_v1_8_gart_disable -ffffffff81ee23a0 t mmhub_v1_8_set_clockgating -ffffffff81ee23d0 t mmhub_v1_8_get_clockgating -ffffffff81ee2400 t mmhub_v1_8_setup_vm_pt_regs -ffffffff81ee2610 t mmhub_v1_8_query_ras_error_count -ffffffff81ee2770 t mmhub_v1_8_query_ras_error_status -ffffffff81ee2a20 t mmhub_v1_8_reset_ras_error_count -ffffffff81ee2b40 t mmhub_v1_8_reset_ras_error_status -ffffffff81ee4000 t mmhub_v2_0_init -ffffffff81ee40d0 t mmhub_v2_0_gart_enable -ffffffff81ee5290 t mmhub_v2_0_set_fault_enable_default -ffffffff81ee53b0 t mmhub_v2_0_gart_disable -ffffffff81ee5640 t mmhub_v2_0_set_clockgating -ffffffff81ee5990 t mmhub_v2_0_get_clockgating -ffffffff81ee5b20 t mmhub_v2_0_setup_vm_pt_regs -ffffffff81ee5c60 t mmhub_v2_0_print_l2_protection_fault_status -ffffffff81ee5ec0 t mmhub_v2_0_get_invalidate_req -ffffffff81ee6000 t mmhub_v2_3_init -ffffffff81ee60e0 t mmhub_v2_3_gart_enable -ffffffff81ee74b0 t mmhub_v2_3_set_fault_enable_default -ffffffff81ee75b0 t mmhub_v2_3_gart_disable -ffffffff81ee7850 t mmhub_v2_3_set_clockgating -ffffffff81ee7cf0 t mmhub_v2_3_get_clockgating -ffffffff81ee7ee0 t mmhub_v2_3_setup_vm_pt_regs -ffffffff81ee8020 t mmhub_v2_3_print_l2_protection_fault_status -ffffffff81ee8240 t mmhub_v2_3_get_invalidate_req -ffffffff81ee9000 t mmhub_v3_0_get_fb_location -ffffffff81ee9090 t mmhub_v3_0_get_mc_fb_offset -ffffffff81ee9120 t mmhub_v3_0_init -ffffffff81ee9200 t mmhub_v3_0_gart_enable -ffffffff81eea420 t mmhub_v3_0_set_fault_enable_default -ffffffff81eea540 t mmhub_v3_0_gart_disable -ffffffff81eea7d0 t mmhub_v3_0_set_clockgating -ffffffff81eea9a0 t mmhub_v3_0_get_clockgating -ffffffff81eeaa50 t mmhub_v3_0_setup_vm_pt_regs -ffffffff81eeab90 t mmhub_v3_0_print_l2_protection_fault_status -ffffffff81eeadb0 t mmhub_v3_0_get_invalidate_req -ffffffff81eeb000 t mmhub_v3_0_1_get_fb_location -ffffffff81eeb090 t mmhub_v3_0_1_get_mc_fb_offset -ffffffff81eeb120 t mmhub_v3_0_1_init -ffffffff81eeb1f0 t mmhub_v3_0_1_gart_enable -ffffffff81eec4f0 t mmhub_v3_0_1_set_fault_enable_default -ffffffff81eec5f0 t mmhub_v3_0_1_gart_disable -ffffffff81eec890 t mmhub_v3_0_1_set_clockgating -ffffffff81eeca50 t mmhub_v3_0_1_get_clockgating -ffffffff81eecb00 t mmhub_v3_0_1_setup_vm_pt_regs -ffffffff81eecc40 t mmhub_v3_0_1_print_l2_protection_fault_status -ffffffff81eece50 t mmhub_v3_0_1_get_invalidate_req -ffffffff81eed000 t mmhub_v3_0_2_get_fb_location -ffffffff81eed090 t mmhub_v3_0_2_get_mc_fb_offset -ffffffff81eed120 t mmhub_v3_0_2_init -ffffffff81eed1f0 t mmhub_v3_0_2_gart_enable -ffffffff81eee3e0 t mmhub_v3_0_2_set_fault_enable_default -ffffffff81eee500 t mmhub_v3_0_2_gart_disable -ffffffff81eee790 t mmhub_v3_0_2_set_clockgating -ffffffff81eee7c0 t mmhub_v3_0_2_get_clockgating -ffffffff81eee7f0 t mmhub_v3_0_2_setup_vm_pt_regs -ffffffff81eee930 t mmhub_v3_0_2_print_l2_protection_fault_status -ffffffff81eeeb30 t mmhub_v3_0_2_get_invalidate_req -ffffffff81eef000 t mmhub_v9_4_query_ras_error_count -ffffffff81eef150 t mmhub_v9_4_query_ras_error_status -ffffffff81eef230 t mmhub_v9_4_reset_ras_error_count -ffffffff81eef300 t mmhub_v9_4_get_fb_location -ffffffff81eef420 t mmhub_v9_4_init -ffffffff81eef570 t mmhub_v9_4_gart_enable -ffffffff81ef0a00 t mmhub_v9_4_set_fault_enable_default -ffffffff81ef0bf0 t mmhub_v9_4_gart_disable -ffffffff81ef0f60 t mmhub_v9_4_set_clockgating -ffffffff81ef1440 t mmhub_v9_4_get_clockgating -ffffffff81ef1570 t mmhub_v9_4_setup_vm_pt_regs -ffffffff81ef15c0 t mmhub_v9_4_setup_hubid_vm_pt_regs -ffffffff81ef2000 T xgpu_ai_mailbox_set_irq_funcs -ffffffff81ef2050 T xgpu_ai_mailbox_add_irq_id -ffffffff81ef20e0 T xgpu_ai_mailbox_get_irq -ffffffff81ef2190 t xgpu_ai_mailbox_flr_work -ffffffff81ef2390 T xgpu_ai_mailbox_put_irq -ffffffff81ef23d0 t xgpu_ai_request_full_gpu_access -ffffffff81ef23f0 t xgpu_ai_release_full_gpu_access -ffffffff81ef2410 t xgpu_ai_request_init_data -ffffffff81ef2470 t xgpu_ai_request_reset -ffffffff81ef2520 t xgpu_ai_mailbox_trans_msg -ffffffff81ef2740 t xgpu_ai_ras_poison_handler -ffffffff81ef2770 t xgpu_ai_set_mailbox_ack_irq -ffffffff81ef2800 t xgpu_ai_mailbox_ack_irq -ffffffff81ef2850 t xgpu_ai_set_mailbox_rcv_irq -ffffffff81ef28e0 t xgpu_ai_mailbox_rcv_irq -ffffffff81ef29c0 t xgpu_ai_send_access_requests -ffffffff81ef2ab0 t xgpu_ai_poll_msg -ffffffff81ef3000 T xgpu_nv_mailbox_set_irq_funcs -ffffffff81ef3050 T xgpu_nv_mailbox_add_irq_id -ffffffff81ef30e0 T xgpu_nv_mailbox_get_irq -ffffffff81ef3190 t xgpu_nv_mailbox_flr_work -ffffffff81ef33b0 T xgpu_nv_mailbox_put_irq -ffffffff81ef33f0 t xgpu_nv_request_full_gpu_access -ffffffff81ef3410 t xgpu_nv_release_full_gpu_access -ffffffff81ef3430 t xgpu_nv_request_init_data -ffffffff81ef3450 t xgpu_nv_request_reset -ffffffff81ef3550 t xgpu_nv_mailbox_trans_msg -ffffffff81ef36f0 t xgpu_nv_ras_poison_handler -ffffffff81ef3710 t xgpu_nv_set_mailbox_ack_irq -ffffffff81ef3790 t xgpu_nv_mailbox_ack_irq -ffffffff81ef37e0 t xgpu_nv_set_mailbox_rcv_irq -ffffffff81ef3860 t xgpu_nv_mailbox_rcv_irq -ffffffff81ef3910 t xgpu_nv_send_access_requests -ffffffff81ef4000 T xgpu_vi_init_golden_registers -ffffffff81ef40c0 T xgpu_vi_mailbox_set_irq_funcs -ffffffff81ef4110 T xgpu_vi_mailbox_add_irq_id -ffffffff81ef41a0 T xgpu_vi_mailbox_get_irq -ffffffff81ef4250 t xgpu_vi_mailbox_flr_work -ffffffff81ef43a0 T xgpu_vi_mailbox_put_irq -ffffffff81ef43e0 t xgpu_vi_request_full_gpu_access -ffffffff81ef4400 t xgpu_vi_release_full_gpu_access -ffffffff81ef4420 t xgpu_vi_request_reset -ffffffff81ef4440 t xgpu_vi_wait_reset_cmpl -ffffffff81ef4520 t xgpu_vi_set_mailbox_ack_irq -ffffffff81ef45a0 t xgpu_vi_mailbox_ack_irq -ffffffff81ef45f0 t xgpu_vi_set_mailbox_rcv_irq -ffffffff81ef4670 t xgpu_vi_mailbox_rcv_irq -ffffffff81ef4720 t xgpu_vi_mailbox_rcv_msg -ffffffff81ef4840 t xgpu_vi_send_access_requests -ffffffff81ef5000 t navi10_ih_early_init -ffffffff81ef5060 t navi10_ih_sw_init -ffffffff81ef51d0 t navi10_ih_sw_fini -ffffffff81ef5210 t navi10_ih_hw_init -ffffffff81ef5630 t navi10_ih_hw_fini -ffffffff81ef5690 t navi10_ih_suspend -ffffffff81ef56f0 t navi10_ih_resume -ffffffff81ef5700 t navi10_ih_is_idle -ffffffff81ef5730 t navi10_ih_wait_for_idle -ffffffff81ef5760 t navi10_ih_soft_reset -ffffffff81ef5790 t navi10_ih_set_clockgating_state -ffffffff81ef58c0 t navi10_ih_set_powergating_state -ffffffff81ef58f0 t navi10_ih_get_clockgating_state -ffffffff81ef5980 t navi10_ih_get_wptr -ffffffff81ef5ab0 t navi10_ih_set_rptr -ffffffff81ef5b80 t navi10_ih_self_irq -ffffffff81ef5c00 t navi10_ih_toggle_interrupts -ffffffff81ef5d70 t force_update_wptr_for_self_int -ffffffff81ef7000 t nbio_v2_3_get_hdp_flush_req_offset -ffffffff81ef7040 t nbio_v2_3_get_hdp_flush_done_offset -ffffffff81ef7080 t nbio_v2_3_get_pcie_index_offset -ffffffff81ef70c0 t nbio_v2_3_get_pcie_data_offset -ffffffff81ef7100 t nbio_v2_3_get_rev_id -ffffffff81ef7160 t nbio_v2_3_mc_access_enable -ffffffff81ef7210 t nbio_v2_3_get_memsize -ffffffff81ef7280 t nbio_v2_3_sdma_doorbell_range -ffffffff81ef7320 t nbio_v2_3_vcn_doorbell_range -ffffffff81ef73a0 t nbio_v2_3_enable_doorbell_aperture -ffffffff81ef74a0 t nbio_v2_3_enable_doorbell_selfring_aperture -ffffffff81ef7610 t nbio_v2_3_ih_doorbell_range -ffffffff81ef7730 t nbio_v2_3_update_medium_grain_clock_gating -ffffffff81ef77d0 t nbio_v2_3_update_medium_grain_light_sleep -ffffffff81ef7870 t nbio_v2_3_get_clockgating_state -ffffffff81ef78f0 t nbio_v2_3_ih_control -ffffffff81ef7a40 t nbio_v2_3_init_registers -ffffffff81ef7ad0 t nbio_v2_3_remap_hdp_registers -ffffffff81ef7be0 t nbio_v2_3_enable_aspm -ffffffff81ef7c80 t nbio_v2_3_program_aspm -ffffffff81ef8330 t nbio_v2_3_apply_lc_spc_mode_wa -ffffffff81ef83c0 t nbio_v2_3_apply_l1_link_width_reconfig_wa -ffffffff81ef8430 t nbio_v2_3_clear_doorbell_interrupt -ffffffff81ef9000 t nbio_v4_3_get_hdp_flush_req_offset -ffffffff81ef9040 t nbio_v4_3_get_hdp_flush_done_offset -ffffffff81ef9080 t nbio_v4_3_get_pcie_index_offset -ffffffff81ef90b0 t nbio_v4_3_get_pcie_data_offset -ffffffff81ef90f0 t nbio_v4_3_get_rev_id -ffffffff81ef9180 t nbio_v4_3_mc_access_enable -ffffffff81ef9230 t nbio_v4_3_get_memsize -ffffffff81ef92a0 t nbio_v4_3_sdma_doorbell_range -ffffffff81ef9410 t nbio_v4_3_vcn_doorbell_range -ffffffff81ef95c0 t nbio_v4_3_gc_doorbell_init -ffffffff81ef96b0 t nbio_v4_3_enable_doorbell_aperture -ffffffff81ef97b0 t nbio_v4_3_enable_doorbell_selfring_aperture -ffffffff81ef9920 t nbio_v4_3_ih_doorbell_range -ffffffff81ef9a40 t nbio_v4_3_update_medium_grain_clock_gating -ffffffff81ef9b80 t nbio_v4_3_update_medium_grain_light_sleep -ffffffff81ef9cb0 t nbio_v4_3_get_clockgating_state -ffffffff81ef9dc0 t nbio_v4_3_ih_control -ffffffff81ef9f10 t nbio_v4_3_init_registers -ffffffff81efa040 t nbio_v4_3_remap_hdp_registers -ffffffff81efa150 t nbio_v4_3_program_aspm -ffffffff81efae50 t nbio_v4_3_get_rom_offset -ffffffff81efaee0 t nbio_v4_3_sriov_sdma_doorbell_range -ffffffff81efaf10 t nbio_v4_3_sriov_vcn_doorbell_range -ffffffff81efaf40 t nbio_v4_3_sriov_gc_doorbell_init -ffffffff81efaf70 t nbio_v4_3_sriov_ih_doorbell_range -ffffffff81efafa0 t nbio_v4_3_handle_ras_err_event_athub_intr_no_bifring -ffffffff81efb0b0 t nbio_v4_3_init_ras_err_event_athub_interrupt -ffffffff81efb0f0 t nbio_v4_3_set_ras_err_event_athub_irq_state -ffffffff81efb200 t nbio_v4_3_process_err_event_athub_irq -ffffffff81efc000 t nbio_v6_1_get_hdp_flush_req_offset -ffffffff81efc040 t nbio_v6_1_get_hdp_flush_done_offset -ffffffff81efc080 t nbio_v6_1_get_pcie_index_offset -ffffffff81efc0c0 t nbio_v6_1_get_pcie_data_offset -ffffffff81efc100 t nbio_v6_1_get_rev_id -ffffffff81efc190 t nbio_v6_1_mc_access_enable -ffffffff81efc240 t nbio_v6_1_get_memsize -ffffffff81efc2b0 t nbio_v6_1_sdma_doorbell_range -ffffffff81efc340 t nbio_v6_1_enable_doorbell_aperture -ffffffff81efc440 t nbio_v6_1_enable_doorbell_selfring_aperture -ffffffff81efc5b0 t nbio_v6_1_ih_doorbell_range -ffffffff81efc6d0 t nbio_v6_1_update_medium_grain_clock_gating -ffffffff81efc770 t nbio_v6_1_update_medium_grain_light_sleep -ffffffff81efc810 t nbio_v6_1_get_clockgating_state -ffffffff81efc890 t nbio_v6_1_ih_control -ffffffff81efc9e0 t nbio_v6_1_init_registers -ffffffff81efcab0 t nbio_v6_1_remap_hdp_registers -ffffffff81efcbc0 t nbio_v6_1_program_aspm -ffffffff81efd000 t nbio_v7_0_get_hdp_flush_req_offset -ffffffff81efd040 t nbio_v7_0_get_hdp_flush_done_offset -ffffffff81efd080 t nbio_v7_0_get_pcie_index_offset -ffffffff81efd0c0 t nbio_v7_0_get_pcie_data_offset -ffffffff81efd100 t nbio_v7_0_get_rev_id -ffffffff81efd190 t nbio_v7_0_mc_access_enable -ffffffff81efd240 t nbio_v7_0_get_memsize -ffffffff81efd2b0 t nbio_v7_0_sdma_doorbell_range -ffffffff81efd340 t nbio_v7_0_vcn_doorbell_range -ffffffff81efd3c0 t nbio_v7_0_enable_doorbell_aperture -ffffffff81efd4c0 t nbio_v7_0_enable_doorbell_selfring_aperture -ffffffff81efd4f0 t nbio_v7_0_ih_doorbell_range -ffffffff81efd610 t nbio_v7_0_update_medium_grain_clock_gating -ffffffff81efd740 t nbio_v7_0_update_medium_grain_light_sleep -ffffffff81efd7e0 t nbio_v7_0_get_clockgating_state -ffffffff81efd860 t nbio_v7_0_ih_control -ffffffff81efd9b0 t nbio_v7_0_init_registers -ffffffff81efda00 t nbio_v7_0_remap_hdp_registers -ffffffff81efdb10 t nbio_7_0_read_syshub_ind_mmr -ffffffff81efdbe0 t nbio_7_0_write_syshub_ind_mmr -ffffffff81efe000 t nbio_v7_2_get_hdp_flush_req_offset -ffffffff81efe040 t nbio_v7_2_get_hdp_flush_done_offset -ffffffff81efe080 t nbio_v7_2_get_pcie_index_offset -ffffffff81efe0c0 t nbio_v7_2_get_pcie_data_offset -ffffffff81efe100 t nbio_v7_2_get_pcie_port_index_offset -ffffffff81efe130 t nbio_v7_2_get_pcie_port_data_offset -ffffffff81efe170 t nbio_v7_2_get_rev_id -ffffffff81efe250 t nbio_v7_2_mc_access_enable -ffffffff81efe390 t nbio_v7_2_get_memsize -ffffffff81efe400 t nbio_v7_2_sdma_doorbell_range -ffffffff81efe4a0 t nbio_v7_2_vcn_doorbell_range -ffffffff81efe520 t nbio_v7_2_enable_doorbell_aperture -ffffffff81efe600 t nbio_v7_2_enable_doorbell_selfring_aperture -ffffffff81efe770 t nbio_v7_2_ih_doorbell_range -ffffffff81efe800 t nbio_v7_2_update_medium_grain_clock_gating -ffffffff81efe8c0 t nbio_v7_2_update_medium_grain_light_sleep -ffffffff81efea50 t nbio_v7_2_get_clockgating_state -ffffffff81efeae0 t nbio_v7_2_ih_control -ffffffff81efec30 t nbio_v7_2_init_registers -ffffffff81efedf0 t nbio_v7_2_remap_hdp_registers -ffffffff81eff000 t nbio_v7_4_query_ras_error_count -ffffffff81eff1a0 t nbio_v7_4_handle_ras_controller_intr_no_bifring -ffffffff81eff400 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring -ffffffff81eff5b0 t nbio_v7_4_init_ras_controller_interrupt -ffffffff81eff5f0 t nbio_v7_4_init_ras_err_event_athub_interrupt -ffffffff81eff630 t nbio_v7_4_get_hdp_flush_req_offset -ffffffff81eff670 t nbio_v7_4_get_hdp_flush_done_offset -ffffffff81eff6b0 t nbio_v7_4_get_pcie_index_offset -ffffffff81eff6f0 t nbio_v7_4_get_pcie_data_offset -ffffffff81eff730 t nbio_v7_4_get_rev_id -ffffffff81eff800 t nbio_v7_4_mc_access_enable -ffffffff81eff8b0 t nbio_v7_4_get_memsize -ffffffff81eff920 t nbio_v7_4_sdma_doorbell_range -ffffffff81eff9f0 t nbio_v7_4_vcn_doorbell_range -ffffffff81effa90 t nbio_v7_4_enable_doorbell_aperture -ffffffff81effb90 t nbio_v7_4_enable_doorbell_selfring_aperture -ffffffff81effd00 t nbio_v7_4_ih_doorbell_range -ffffffff81effe20 t nbio_v7_4_enable_doorbell_interrupt -ffffffff81efff70 t nbio_v7_4_update_medium_grain_clock_gating -ffffffff81efffa0 t nbio_v7_4_update_medium_grain_light_sleep -ffffffff81f00040 t nbio_v7_4_get_clockgating_state -ffffffff81f000c0 t nbio_v7_4_ih_control -ffffffff81f00210 t nbio_v7_4_init_registers -ffffffff81f00300 t nbio_v7_4_remap_hdp_registers -ffffffff81f00410 t nbio_v7_4_program_aspm -ffffffff81f00820 t nbio_v7_4_set_ras_controller_irq_state -ffffffff81f009b0 t nbio_v7_4_process_ras_controller_irq -ffffffff81f009e0 t nbio_v7_4_set_ras_err_event_athub_irq_state -ffffffff81f00b70 t nbio_v7_4_process_err_event_athub_irq -ffffffff81f01000 t nbio_v7_7_get_hdp_flush_req_offset -ffffffff81f01040 t nbio_v7_7_get_hdp_flush_done_offset -ffffffff81f01080 t nbio_v7_7_get_pcie_index_offset -ffffffff81f010c0 t nbio_v7_7_get_pcie_data_offset -ffffffff81f01100 t nbio_v7_7_get_pcie_port_index_offset -ffffffff81f01130 t nbio_v7_7_get_pcie_port_data_offset -ffffffff81f01170 t nbio_v7_7_get_rev_id -ffffffff81f01200 t nbio_v7_7_mc_access_enable -ffffffff81f012b0 t nbio_v7_7_get_memsize -ffffffff81f01320 t nbio_v7_7_sdma_doorbell_range -ffffffff81f013b0 t nbio_v7_7_vcn_doorbell_range -ffffffff81f01430 t nbio_v7_7_enable_doorbell_aperture -ffffffff81f01510 t nbio_v7_7_enable_doorbell_selfring_aperture -ffffffff81f01680 t nbio_v7_7_ih_doorbell_range -ffffffff81f017a0 t nbio_v7_7_update_medium_grain_clock_gating -ffffffff81f018e0 t nbio_v7_7_update_medium_grain_light_sleep -ffffffff81f01af0 t nbio_v7_7_get_clockgating_state -ffffffff81f01c00 t nbio_v7_7_ih_control -ffffffff81f01d50 t nbio_v7_7_init_registers -ffffffff81f01e70 t nbio_v7_7_remap_hdp_registers -ffffffff81f02000 t nbio_v7_9_get_hdp_flush_req_offset -ffffffff81f02040 t nbio_v7_9_get_hdp_flush_done_offset -ffffffff81f02080 t nbio_v7_9_get_pcie_index_offset -ffffffff81f020c0 t nbio_v7_9_get_pcie_data_offset -ffffffff81f02100 t nbio_v7_9_get_pcie_index_hi_offset -ffffffff81f02140 t nbio_v7_9_get_rev_id -ffffffff81f021d0 t nbio_v7_9_mc_access_enable -ffffffff81f02280 t nbio_v7_9_get_memsize -ffffffff81f022f0 t nbio_v7_9_sdma_doorbell_range -ffffffff81f02630 t nbio_v7_9_vcn_doorbell_range -ffffffff81f027c0 t nbio_v7_9_enable_doorbell_aperture -ffffffff81f02930 t nbio_v7_9_enable_doorbell_selfring_aperture -ffffffff81f02aa0 t nbio_v7_9_ih_doorbell_range -ffffffff81f02ba0 t nbio_v7_9_enable_doorbell_interrupt -ffffffff81f02cb0 t nbio_v7_9_update_medium_grain_clock_gating -ffffffff81f02ce0 t nbio_v7_9_update_medium_grain_light_sleep -ffffffff81f02d10 t nbio_v7_9_get_clockgating_state -ffffffff81f02d40 t nbio_v7_9_ih_control -ffffffff81f02e90 t nbio_v7_9_init_registers -ffffffff81f031a0 t nbio_v7_9_remap_hdp_registers -ffffffff81f032b0 t nbio_v7_9_get_compute_partition_mode -ffffffff81f03340 t nbio_v7_9_get_memory_partition_mode -ffffffff81f03430 t nbio_v7_9_get_pcie_replay_count -ffffffff81f03490 t nbio_v7_9_get_pcie_usage -ffffffff81f035f0 t nbio_v7_9_query_ras_error_count -ffffffff81f03620 t nbio_v7_9_handle_ras_controller_intr_no_bifring -ffffffff81f03740 t nbio_v7_9_handle_ras_err_event_athub_intr_no_bifring -ffffffff81f03850 t nbio_v7_9_init_ras_controller_interrupt -ffffffff81f03890 t nbio_v7_9_init_ras_err_event_athub_interrupt -ffffffff81f038d0 t nbio_v7_9_set_ras_controller_irq_state -ffffffff81f03900 t nbio_v7_9_process_ras_controller_irq -ffffffff81f03930 t nbio_v7_9_set_ras_err_event_athub_irq_state -ffffffff81f03960 t nbio_v7_9_process_err_event_athub_irq -ffffffff81f04000 T nv_grbm_select -ffffffff81f040a0 T nv_set_virt_ops -ffffffff81f040e0 t nv_common_early_init -ffffffff81f044d0 t nv_common_late_init -ffffffff81f04580 t nv_common_sw_init -ffffffff81f045c0 t nv_common_sw_fini -ffffffff81f045f0 t nv_common_hw_init -ffffffff81f046f0 t nv_common_hw_fini -ffffffff81f04750 t nv_common_suspend -ffffffff81f047b0 t nv_common_resume -ffffffff81f047f0 t nv_common_is_idle -ffffffff81f04820 t nv_common_wait_for_idle -ffffffff81f04850 t nv_common_soft_reset -ffffffff81f04880 t nv_common_set_clockgating_state -ffffffff81f04950 t nv_common_set_powergating_state -ffffffff81f04980 t nv_common_get_clockgating_state -ffffffff81f049f0 t nv_didt_rreg -ffffffff81f04a90 t nv_didt_wreg -ffffffff81f04b10 t nv_read_disabled_bios -ffffffff81f04b40 t nv_read_register -ffffffff81f04c30 t nv_asic_reset -ffffffff81f04d70 t nv_asic_reset_method -ffffffff81f04e60 t nv_get_xclk -ffffffff81f04e90 t nv_set_uvd_clocks -ffffffff81f04ec0 t nv_set_vce_clocks -ffffffff81f04ef0 t nv_get_config_memsize -ffffffff81f04f10 t nv_need_full_reset -ffffffff81f04f40 t nv_init_doorbell_index -ffffffff81f05070 t nv_need_reset_on_init -ffffffff81f05110 t nv_pre_asic_init -ffffffff81f05140 t nv_update_umd_stable_pstate -ffffffff81f05200 t nv_query_video_codecs -ffffffff81f06000 T psp_v10_0_set_psp_funcs -ffffffff81f06030 t psp_v10_0_init_microcode -ffffffff81f060f0 t psp_v10_0_ring_create -ffffffff81f06400 t psp_v10_0_ring_stop -ffffffff81f065f0 t psp_v10_0_ring_destroy -ffffffff81f06670 t psp_v10_0_mode1_reset -ffffffff81f066c0 t psp_v10_0_ring_get_wptr -ffffffff81f06720 t psp_v10_0_ring_set_wptr -ffffffff81f07000 T psp_v11_0_set_psp_funcs -ffffffff81f07030 t psp_v11_0_init_microcode -ffffffff81f07180 t psp_v11_0_bootloader_load_kdb -ffffffff81f071a0 t psp_v11_0_bootloader_load_spl -ffffffff81f071c0 t psp_v11_0_bootloader_load_sysdrv -ffffffff81f071e0 t psp_v11_0_bootloader_load_sos -ffffffff81f07540 t psp_v11_0_ring_create -ffffffff81f07be0 t psp_v11_0_ring_stop -ffffffff81f07e00 t psp_v11_0_ring_destroy -ffffffff81f07e80 t psp_v11_0_mode1_reset -ffffffff81f07f80 t psp_v11_0_memory_training -ffffffff81f08400 t psp_v11_0_ring_get_wptr -ffffffff81f08450 t psp_v11_0_ring_set_wptr -ffffffff81f08590 t psp_v11_0_load_usbc_pd_fw -ffffffff81f08780 t psp_v11_0_read_usbc_pd_fw -ffffffff81f088a0 t psp_v11_0_bootloader_load_component -ffffffff81f08a60 t psp_v11_0_wait_for_bootloader -ffffffff81f08c30 t psp_v11_0_memory_training_send_msg -ffffffff81f09000 T psp_v11_0_8_set_psp_funcs -ffffffff81f09030 t psp_v11_0_8_ring_create -ffffffff81f096d0 t psp_v11_0_8_ring_stop -ffffffff81f09a60 t psp_v11_0_8_ring_destroy -ffffffff81f09ae0 t psp_v11_0_8_ring_get_wptr -ffffffff81f09b50 t psp_v11_0_8_ring_set_wptr -ffffffff81f0a000 T psp_v12_0_set_psp_funcs -ffffffff81f0a030 t psp_v12_0_init_microcode -ffffffff81f0a0e0 t psp_v12_0_bootloader_load_sysdrv -ffffffff81f0a410 t psp_v12_0_bootloader_load_sos -ffffffff81f0a790 t psp_v12_0_ring_create -ffffffff81f0b190 t psp_v12_0_ring_stop -ffffffff81f0b3b0 t psp_v12_0_ring_destroy -ffffffff81f0b430 t psp_v12_0_mode1_reset -ffffffff81f0b530 t psp_v12_0_ring_get_wptr -ffffffff81f0b5a0 t psp_v12_0_ring_set_wptr -ffffffff81f0c000 T psp_v13_0_set_psp_funcs -ffffffff81f0c030 t psp_v13_0_init_microcode -ffffffff81f0c130 t psp_v13_0_wait_for_bootloader_steady_state -ffffffff81f0c240 t psp_v13_0_bootloader_load_kdb -ffffffff81f0c260 t psp_v13_0_bootloader_load_spl -ffffffff81f0c280 t psp_v13_0_bootloader_load_sysdrv -ffffffff81f0c2a0 t psp_v13_0_bootloader_load_soc_drv -ffffffff81f0c2c0 t psp_v13_0_bootloader_load_intf_drv -ffffffff81f0c2e0 t psp_v13_0_bootloader_load_dbg_drv -ffffffff81f0c300 t psp_v13_0_bootloader_load_ras_drv -ffffffff81f0c320 t psp_v13_0_bootloader_load_sos -ffffffff81f0c6f0 t psp_v13_0_ring_create -ffffffff81f0cd90 t psp_v13_0_ring_stop -ffffffff81f0d120 t psp_v13_0_ring_destroy -ffffffff81f0d1a0 t psp_v13_0_memory_training -ffffffff81f0d5d0 t psp_v13_0_ring_get_wptr -ffffffff81f0d640 t psp_v13_0_ring_set_wptr -ffffffff81f0d740 t psp_v13_0_load_usbc_pd_fw -ffffffff81f0d930 t psp_v13_0_read_usbc_pd_fw -ffffffff81f0da50 t psp_v13_0_update_spirom -ffffffff81f0dc30 t psp_v13_0_vbflash_status -ffffffff81f0dc90 t psp_v13_0_fatal_error_recovery_quirk -ffffffff81f0ddc0 t psp_v13_0_bootloader_load_component -ffffffff81f0e030 t psp_v13_0_memory_training_send_msg -ffffffff81f0e1a0 t psp_v13_0_exec_spi_cmd -ffffffff81f0f000 T psp_v13_0_4_set_psp_funcs -ffffffff81f0f030 t psp_v13_0_4_init_microcode -ffffffff81f0f0d0 t psp_v13_0_4_bootloader_load_kdb -ffffffff81f0f0f0 t psp_v13_0_4_bootloader_load_spl -ffffffff81f0f110 t psp_v13_0_4_bootloader_load_sysdrv -ffffffff81f0f130 t psp_v13_0_4_bootloader_load_soc_drv -ffffffff81f0f150 t psp_v13_0_4_bootloader_load_intf_drv -ffffffff81f0f170 t psp_v13_0_4_bootloader_load_dbg_drv -ffffffff81f0f190 t psp_v13_0_4_bootloader_load_sos -ffffffff81f0f500 t psp_v13_0_4_ring_create -ffffffff81f0fbb0 t psp_v13_0_4_ring_stop -ffffffff81f0ff40 t psp_v13_0_4_ring_destroy -ffffffff81f0ffc0 t psp_v13_0_4_ring_get_wptr -ffffffff81f10030 t psp_v13_0_4_ring_set_wptr -ffffffff81f10130 t psp_v13_0_4_bootloader_load_component -ffffffff81f10300 t psp_v13_0_4_wait_for_bootloader -ffffffff81f11000 T psp_v3_1_set_psp_funcs -ffffffff81f11030 t psp_v3_1_init_microcode -ffffffff81f110c0 t psp_v3_1_bootloader_load_sysdrv -ffffffff81f113f0 t psp_v3_1_bootloader_load_sos -ffffffff81f11770 t psp_v3_1_ring_create -ffffffff81f12290 t psp_v3_1_ring_stop -ffffffff81f124b0 t psp_v3_1_ring_destroy -ffffffff81f12530 t psp_v3_1_smu_reload_quirk -ffffffff81f12580 t psp_v3_1_mode1_reset -ffffffff81f12680 t psp_v3_1_ring_get_wptr -ffffffff81f126d0 t psp_v3_1_ring_set_wptr -ffffffff81f13000 t sdma_v2_4_early_init -ffffffff81f130f0 t sdma_v2_4_sw_init -ffffffff81f134a0 t sdma_v2_4_sw_fini -ffffffff81f13550 t sdma_v2_4_hw_init -ffffffff81f138f0 t sdma_v2_4_hw_fini -ffffffff81f13930 t sdma_v2_4_suspend -ffffffff81f13970 t sdma_v2_4_resume -ffffffff81f13980 t sdma_v2_4_is_idle -ffffffff81f139c0 t sdma_v2_4_wait_for_idle -ffffffff81f13a60 t sdma_v2_4_soft_reset -ffffffff81f13ba0 t sdma_v2_4_set_clockgating_state -ffffffff81f13bd0 t sdma_v2_4_set_powergating_state -ffffffff81f13c00 t sdma_v2_4_ring_get_rptr -ffffffff81f13c40 t sdma_v2_4_ring_get_wptr -ffffffff81f13ca0 t sdma_v2_4_ring_set_wptr -ffffffff81f13ce0 t sdma_v2_4_ring_emit_ib -ffffffff81f13f90 t sdma_v2_4_ring_emit_fence -ffffffff81f14390 t sdma_v2_4_ring_emit_pipeline_sync -ffffffff81f14610 t sdma_v2_4_ring_emit_vm_flush -ffffffff81f14880 t sdma_v2_4_ring_emit_hdp_flush -ffffffff81f14b00 t sdma_v2_4_ring_test_ring -ffffffff81f14de0 t sdma_v2_4_ring_test_ib -ffffffff81f14fb0 t sdma_v2_4_ring_insert_nop -ffffffff81f150e0 t sdma_v2_4_ring_pad_ib -ffffffff81f15210 t sdma_v2_4_ring_emit_wreg -ffffffff81f15360 t sdma_v2_4_emit_copy_buffer -ffffffff81f15420 t sdma_v2_4_emit_fill_buffer -ffffffff81f154b0 t sdma_v2_4_vm_copy_pte -ffffffff81f15570 t sdma_v2_4_vm_write_pte -ffffffff81f15640 t sdma_v2_4_vm_set_pte_pde -ffffffff81f15740 t sdma_v2_4_set_trap_irq_state -ffffffff81f15800 t sdma_v2_4_process_trap_irq -ffffffff81f158a0 t sdma_v2_4_process_illegal_inst_irq -ffffffff81f15920 t sdma_v2_4_enable -ffffffff81f16000 t sdma_v3_0_early_init -ffffffff81f16100 t sdma_v3_0_sw_init -ffffffff81f164c0 t sdma_v3_0_sw_fini -ffffffff81f16570 t sdma_v3_0_hw_init -ffffffff81f166a0 t sdma_v3_0_hw_fini -ffffffff81f166f0 t sdma_v3_0_suspend -ffffffff81f16740 t sdma_v3_0_resume -ffffffff81f16750 t sdma_v3_0_is_idle -ffffffff81f16790 t sdma_v3_0_wait_for_idle -ffffffff81f16830 t sdma_v3_0_check_soft_reset -ffffffff81f16890 t sdma_v3_0_pre_soft_reset -ffffffff81f168e0 t sdma_v3_0_soft_reset -ffffffff81f169b0 t sdma_v3_0_post_soft_reset -ffffffff81f16a00 t sdma_v3_0_set_clockgating_state -ffffffff81f16c60 t sdma_v3_0_set_powergating_state -ffffffff81f16c90 t sdma_v3_0_get_clockgating_state -ffffffff81f16d10 t sdma_v3_0_ring_get_rptr -ffffffff81f16d50 t sdma_v3_0_ring_get_wptr -ffffffff81f16dd0 t sdma_v3_0_ring_set_wptr -ffffffff81f16e80 t sdma_v3_0_ring_emit_ib -ffffffff81f17130 t sdma_v3_0_ring_emit_fence -ffffffff81f17530 t sdma_v3_0_ring_emit_pipeline_sync -ffffffff81f177b0 t sdma_v3_0_ring_emit_vm_flush -ffffffff81f17a20 t sdma_v3_0_ring_emit_hdp_flush -ffffffff81f17ca0 t sdma_v3_0_ring_test_ring -ffffffff81f17f80 t sdma_v3_0_ring_test_ib -ffffffff81f18150 t sdma_v3_0_ring_insert_nop -ffffffff81f18280 t sdma_v3_0_ring_pad_ib -ffffffff81f183b0 t sdma_v3_0_ring_emit_wreg -ffffffff81f18500 t sdma_v3_0_emit_copy_buffer -ffffffff81f185c0 t sdma_v3_0_emit_fill_buffer -ffffffff81f18650 t sdma_v3_0_vm_copy_pte -ffffffff81f18710 t sdma_v3_0_vm_write_pte -ffffffff81f187e0 t sdma_v3_0_vm_set_pte_pde -ffffffff81f188e0 t sdma_v3_0_set_trap_irq_state -ffffffff81f189a0 t sdma_v3_0_process_trap_irq -ffffffff81f18a40 t sdma_v3_0_process_illegal_inst_irq -ffffffff81f18ac0 t sdma_v3_0_ctx_switch_enable -ffffffff81f18c60 t sdma_v3_0_enable -ffffffff81f18dd0 t sdma_v3_0_gfx_resume -ffffffff81f1a000 t sdma_v4_0_early_init -ffffffff81f1a2d0 t sdma_v4_0_late_init -ffffffff81f1a570 t sdma_v4_0_sw_init -ffffffff81f1a9b0 t sdma_v4_0_sw_fini -ffffffff81f1aa70 t sdma_v4_0_hw_init -ffffffff81f1d9d0 t sdma_v4_0_hw_fini -ffffffff81f1da90 t sdma_v4_0_suspend -ffffffff81f1dae0 t sdma_v4_0_resume -ffffffff81f1db60 t sdma_v4_0_is_idle -ffffffff81f1dc90 t sdma_v4_0_wait_for_idle -ffffffff81f1de30 t sdma_v4_0_soft_reset -ffffffff81f1de60 t sdma_v4_0_set_clockgating_state -ffffffff81f1e360 t sdma_v4_0_set_powergating_state -ffffffff81f1e420 t sdma_v4_0_get_clockgating_state -ffffffff81f1e4c0 t sdma_v4_0_query_ras_error_count -ffffffff81f1e690 t sdma_v4_0_reset_ras_error_count -ffffffff81f1e7e0 t sdma_v4_0_ring_get_rptr -ffffffff81f1e840 t sdma_v4_0_ring_get_wptr -ffffffff81f1ea30 t sdma_v4_0_ring_set_wptr -ffffffff81f1ecb0 t sdma_v4_0_ring_emit_ib -ffffffff81f1ef60 t sdma_v4_0_ring_emit_fence -ffffffff81f1f380 t sdma_v4_0_ring_emit_pipeline_sync -ffffffff81f1f3e0 t sdma_v4_0_ring_emit_vm_flush -ffffffff81f1f400 t sdma_v4_0_ring_emit_hdp_flush -ffffffff81f1f4b0 t sdma_v4_0_ring_test_ring -ffffffff81f1f790 t sdma_v4_0_ring_test_ib -ffffffff81f1f960 t sdma_v4_0_ring_insert_nop -ffffffff81f1fa90 t sdma_v4_0_ring_pad_ib -ffffffff81f1fbc0 t sdma_v4_0_ring_emit_wreg -ffffffff81f1fd10 t sdma_v4_0_ring_emit_reg_wait -ffffffff81f1fd60 t sdma_v4_0_wait_reg_mem -ffffffff81f20070 t sdma_v4_0_page_ring_get_wptr -ffffffff81f20220 t sdma_v4_0_page_ring_set_wptr -ffffffff81f203e0 t sdma_v4_0_emit_copy_buffer -ffffffff81f204a0 t sdma_v4_0_emit_fill_buffer -ffffffff81f20530 t sdma_v4_0_vm_copy_pte -ffffffff81f205f0 t sdma_v4_0_vm_write_pte -ffffffff81f206c0 t sdma_v4_0_vm_set_pte_pde -ffffffff81f207c0 t sdma_v4_0_set_trap_irq_state -ffffffff81f20960 t sdma_v4_0_process_trap_irq -ffffffff81f20a90 t sdma_v4_0_process_illegal_inst_irq -ffffffff81f20bb0 t sdma_v4_0_set_ecc_irq_state -ffffffff81f20d50 t sdma_v4_0_process_vm_hole_irq -ffffffff81f20d90 t sdma_v4_0_print_iv_entry -ffffffff81f20ed0 t sdma_v4_0_process_doorbell_invalid_irq -ffffffff81f20f10 t sdma_v4_0_process_pool_timeout_irq -ffffffff81f20f50 t sdma_v4_0_process_srbm_write_irq -ffffffff81f20f90 t sdma_v4_0_process_ras_data_cb -ffffffff81f21010 t sdma_v4_0_ctx_switch_enable -ffffffff81f216e0 t sdma_v4_0_enable -ffffffff81f21ca0 t sdma_v4_0_gfx_enable -ffffffff81f23000 t sdma_v4_4_query_ras_error_count -ffffffff81f23290 t sdma_v4_4_reset_ras_error_count -ffffffff81f24000 t sdma_v4_4_2_early_init -ffffffff81f24280 t sdma_v4_4_2_late_init -ffffffff81f242f0 t sdma_v4_4_2_sw_init -ffffffff81f24810 t sdma_v4_4_2_sw_fini -ffffffff81f248c0 t sdma_v4_4_2_hw_init -ffffffff81f24910 t sdma_v4_4_2_hw_fini -ffffffff81f249d0 t sdma_v4_4_2_suspend -ffffffff81f24ab0 t sdma_v4_4_2_resume -ffffffff81f24b00 t sdma_v4_4_2_is_idle -ffffffff81f24ba0 t sdma_v4_4_2_wait_for_idle -ffffffff81f24cc0 t sdma_v4_4_2_soft_reset -ffffffff81f24cf0 t sdma_v4_4_2_set_clockgating_state -ffffffff81f250f0 t sdma_v4_4_2_set_powergating_state -ffffffff81f25120 t sdma_v4_4_2_get_clockgating_state -ffffffff81f25200 t sdma_v4_4_2_xcp_suspend -ffffffff81f252c0 t sdma_v4_4_2_xcp_resume -ffffffff81f25300 t sdma_v4_4_2_ring_get_rptr -ffffffff81f25370 t sdma_v4_4_2_ring_get_wptr -ffffffff81f254b0 t sdma_v4_4_2_ring_set_wptr -ffffffff81f25670 t sdma_v4_4_2_ring_emit_ib -ffffffff81f25920 t sdma_v4_4_2_ring_emit_fence -ffffffff81f25d40 t sdma_v4_4_2_ring_emit_pipeline_sync -ffffffff81f25da0 t sdma_v4_4_2_ring_emit_vm_flush -ffffffff81f25dc0 t sdma_v4_4_2_ring_emit_hdp_flush -ffffffff81f25e70 t sdma_v4_4_2_ring_test_ring -ffffffff81f26150 t sdma_v4_4_2_ring_test_ib -ffffffff81f26320 t sdma_v4_4_2_ring_insert_nop -ffffffff81f26450 t sdma_v4_4_2_ring_pad_ib -ffffffff81f26580 t sdma_v4_4_2_ring_emit_wreg -ffffffff81f266d0 t sdma_v4_4_2_ring_emit_reg_wait -ffffffff81f26720 t sdma_v4_4_2_wait_reg_mem -ffffffff81f26a30 t sdma_v4_4_2_page_ring_get_wptr -ffffffff81f26b30 t sdma_v4_4_2_page_ring_set_wptr -ffffffff81f26c40 t sdma_v4_4_2_emit_copy_buffer -ffffffff81f26d00 t sdma_v4_4_2_emit_fill_buffer -ffffffff81f26d90 t sdma_v4_4_2_vm_copy_pte -ffffffff81f26e50 t sdma_v4_4_2_vm_write_pte -ffffffff81f26f20 t sdma_v4_4_2_vm_set_pte_pde -ffffffff81f27020 t sdma_v4_4_2_set_trap_irq_state -ffffffff81f27100 t sdma_v4_4_2_process_trap_irq -ffffffff81f27220 t sdma_v4_4_2_process_illegal_inst_irq -ffffffff81f272b0 t sdma_v4_4_2_set_ecc_irq_state -ffffffff81f27390 t sdma_v4_4_2_process_vm_hole_irq -ffffffff81f27470 t sdma_v4_4_2_process_doorbell_invalid_irq -ffffffff81f27550 t sdma_v4_4_2_process_pool_timeout_irq -ffffffff81f27630 t sdma_v4_4_2_process_srbm_write_irq -ffffffff81f27710 t sdma_v4_4_2_query_ras_error_count -ffffffff81f27870 t sdma_v4_4_2_reset_ras_error_count -ffffffff81f279a0 t sdma_v4_4_2_inst_init_golden_registers -ffffffff81f27b20 t sdma_v4_4_2_inst_start -ffffffff81f28ec0 t sdma_v4_4_2_inst_ctx_switch_enable -ffffffff81f29190 t sdma_v4_4_2_inst_enable -ffffffff81f2a000 t sdma_v5_0_early_init -ffffffff81f2a130 t sdma_v5_0_sw_init -ffffffff81f2a310 t sdma_v5_0_sw_fini -ffffffff81f2a3a0 t sdma_v5_0_hw_init -ffffffff81f2b600 t sdma_v5_0_hw_fini -ffffffff81f2b660 t sdma_v5_0_suspend -ffffffff81f2b6c0 t sdma_v5_0_resume -ffffffff81f2b6d0 t sdma_v5_0_is_idle -ffffffff81f2b760 t sdma_v5_0_wait_for_idle -ffffffff81f2b820 t sdma_v5_0_soft_reset -ffffffff81f2b850 t sdma_v5_0_set_clockgating_state -ffffffff81f2ba50 t sdma_v5_0_set_powergating_state -ffffffff81f2ba80 t sdma_v5_0_get_clockgating_state -ffffffff81f2bb20 t sdma_v5_0_ring_get_rptr -ffffffff81f2bb80 t sdma_v5_0_ring_get_wptr -ffffffff81f2bd20 t sdma_v5_0_ring_set_wptr -ffffffff81f2c070 t sdma_v5_0_ring_emit_ib -ffffffff81f2c330 t sdma_v5_0_ring_emit_fence -ffffffff81f2c790 t sdma_v5_0_ring_emit_pipeline_sync -ffffffff81f2ca10 t sdma_v5_0_ring_emit_vm_flush -ffffffff81f2ca30 t sdma_v5_0_ring_emit_hdp_flush -ffffffff81f2ccd0 t sdma_v5_0_ring_test_ring -ffffffff81f2d0a0 t sdma_v5_0_ring_test_ib -ffffffff81f2d3d0 t sdma_v5_0_ring_insert_nop -ffffffff81f2d500 t sdma_v5_0_ring_pad_ib -ffffffff81f2d630 t sdma_v5_0_ring_init_cond_exec -ffffffff81f2d860 t sdma_v5_0_ring_patch_cond_exec -ffffffff81f2d920 t sdma_v5_0_ring_emit_wreg -ffffffff81f2da70 t sdma_v5_0_ring_emit_reg_wait -ffffffff81f2dcf0 t sdma_v5_0_ring_emit_reg_write_reg_wait -ffffffff81f2dd70 t sdma_v5_0_ring_preempt_ib -ffffffff81f2deb0 t sdma_v5_0_ring_emit_mem_sync -ffffffff81f2e0c0 t sdma_v5_0_emit_copy_buffer -ffffffff81f2e180 t sdma_v5_0_emit_fill_buffer -ffffffff81f2e210 t sdma_v5_0_vm_copy_pte -ffffffff81f2e2d0 t sdma_v5_0_vm_write_pte -ffffffff81f2e3a0 t sdma_v5_0_vm_set_pte_pde -ffffffff81f2e4a0 t sdma_v5_0_set_trap_irq_state -ffffffff81f2e530 t sdma_v5_0_process_trap_irq -ffffffff81f2e640 t sdma_v5_0_process_illegal_inst_irq -ffffffff81f2e670 t sdma_v5_0_mqd_init -ffffffff81f2e750 t sdma_v5_0_ctx_switch_enable -ffffffff81f2ea90 t sdma_v5_0_enable -ffffffff81f2f000 t sdma_v5_2_early_init -ffffffff81f2f130 t sdma_v5_2_sw_init -ffffffff81f2f390 t sdma_v5_2_sw_fini -ffffffff81f2f420 t sdma_v5_2_hw_init -ffffffff81f30fc0 t sdma_v5_2_hw_fini -ffffffff81f31020 t sdma_v5_2_suspend -ffffffff81f31080 t sdma_v5_2_resume -ffffffff81f31090 t sdma_v5_2_is_idle -ffffffff81f31140 t sdma_v5_2_wait_for_idle -ffffffff81f31240 t sdma_v5_2_soft_reset -ffffffff81f31500 t sdma_v5_2_set_clockgating_state -ffffffff81f31860 t sdma_v5_2_set_powergating_state -ffffffff81f31890 t sdma_v5_2_get_clockgating_state -ffffffff81f31920 t sdma_v5_2_ring_get_rptr -ffffffff81f31980 t sdma_v5_2_ring_get_wptr -ffffffff81f31ac0 t sdma_v5_2_ring_set_wptr -ffffffff81f31c70 t sdma_v5_2_ring_emit_ib -ffffffff81f31f30 t sdma_v5_2_ring_emit_fence -ffffffff81f32390 t sdma_v5_2_ring_emit_pipeline_sync -ffffffff81f32610 t sdma_v5_2_ring_emit_vm_flush -ffffffff81f32630 t sdma_v5_2_ring_emit_hdp_flush -ffffffff81f32900 t sdma_v5_2_ring_test_ring -ffffffff81f32cd0 t sdma_v5_2_ring_test_ib -ffffffff81f33000 t sdma_v5_2_ring_insert_nop -ffffffff81f33130 t sdma_v5_2_ring_pad_ib -ffffffff81f33260 t sdma_v5_2_ring_init_cond_exec -ffffffff81f33490 t sdma_v5_2_ring_patch_cond_exec -ffffffff81f33550 t sdma_v5_2_ring_begin_use -ffffffff81f33570 t sdma_v5_2_ring_end_use -ffffffff81f33590 t sdma_v5_2_ring_emit_wreg -ffffffff81f336e0 t sdma_v5_2_ring_emit_reg_wait -ffffffff81f33960 t sdma_v5_2_ring_emit_reg_write_reg_wait -ffffffff81f339e0 t sdma_v5_2_ring_preempt_ib -ffffffff81f33b50 t sdma_v5_2_ring_emit_mem_sync -ffffffff81f33d60 t sdma_v5_2_emit_copy_buffer -ffffffff81f33e20 t sdma_v5_2_emit_fill_buffer -ffffffff81f33eb0 t sdma_v5_2_vm_copy_pte -ffffffff81f33f70 t sdma_v5_2_vm_write_pte -ffffffff81f34040 t sdma_v5_2_vm_set_pte_pde -ffffffff81f34140 t sdma_v5_2_set_trap_irq_state -ffffffff81f34200 t sdma_v5_2_process_trap_irq -ffffffff81f34340 t sdma_v5_2_process_illegal_inst_irq -ffffffff81f34370 t sdma_v5_2_mqd_init -ffffffff81f34450 t sdma_v5_2_ctx_switch_enable -ffffffff81f34860 t sdma_v5_2_enable -ffffffff81f35000 t sdma_v6_0_early_init -ffffffff81f35120 t sdma_v6_0_sw_init -ffffffff81f352f0 t sdma_v6_0_sw_fini -ffffffff81f35380 t sdma_v6_0_hw_init -ffffffff81f35390 t sdma_v6_0_hw_fini -ffffffff81f35460 t sdma_v6_0_suspend -ffffffff81f354a0 t sdma_v6_0_resume -ffffffff81f354b0 t sdma_v6_0_is_idle -ffffffff81f35540 t sdma_v6_0_wait_for_idle -ffffffff81f35600 t sdma_v6_0_check_soft_reset -ffffffff81f356c0 t sdma_v6_0_soft_reset -ffffffff81f35b80 t sdma_v6_0_set_clockgating_state -ffffffff81f35bb0 t sdma_v6_0_set_powergating_state -ffffffff81f35be0 t sdma_v6_0_get_clockgating_state -ffffffff81f35c10 t sdma_v6_0_ring_get_rptr -ffffffff81f35c70 t sdma_v6_0_ring_get_wptr -ffffffff81f35ce0 t sdma_v6_0_ring_set_wptr -ffffffff81f36030 t sdma_v6_0_ring_emit_ib -ffffffff81f362f0 t sdma_v6_0_ring_emit_fence -ffffffff81f36750 t sdma_v6_0_ring_emit_pipeline_sync -ffffffff81f369d0 t sdma_v6_0_ring_emit_vm_flush -ffffffff81f36c40 t sdma_v6_0_ring_emit_hdp_flush -ffffffff81f36ee0 t sdma_v6_0_ring_test_ring -ffffffff81f372b0 t sdma_v6_0_ring_test_ib -ffffffff81f375e0 t sdma_v6_0_ring_insert_nop -ffffffff81f37710 t sdma_v6_0_ring_pad_ib -ffffffff81f37840 t sdma_v6_0_ring_init_cond_exec -ffffffff81f37a70 t sdma_v6_0_ring_patch_cond_exec -ffffffff81f37b30 t sdma_v6_0_ring_emit_wreg -ffffffff81f37c80 t sdma_v6_0_ring_emit_reg_wait -ffffffff81f37f00 t sdma_v6_0_ring_emit_reg_write_reg_wait -ffffffff81f37f80 t sdma_v6_0_ring_preempt_ib -ffffffff81f380d0 t sdma_v6_0_ring_emit_mem_sync -ffffffff81f382e0 t sdma_v6_0_emit_copy_buffer -ffffffff81f383a0 t sdma_v6_0_emit_fill_buffer -ffffffff81f38430 t sdma_v6_0_vm_copy_pte -ffffffff81f384f0 t sdma_v6_0_vm_write_pte -ffffffff81f385c0 t sdma_v6_0_vm_set_pte_pde -ffffffff81f386c0 t sdma_v6_0_set_trap_irq_state -ffffffff81f38750 t sdma_v6_0_process_trap_irq -ffffffff81f38880 t sdma_v6_0_process_illegal_inst_irq -ffffffff81f388b0 t sdma_v6_0_mqd_init -ffffffff81f389d0 t sdma_v6_0_start -ffffffff81f38cb0 t sdma_v6_0_enable -ffffffff81f38e40 t sdma_v6_0_gfx_resume -ffffffff81f39ed0 t sdma_v6_0_gfx_stop -ffffffff81f3b000 T sienna_cichlid_reset_init -ffffffff81f3b0c0 t sienna_cichlid_async_reset -ffffffff81f3b120 t sienna_cichlid_get_reset_handler -ffffffff81f3b1b0 T sienna_cichlid_reset_fini -ffffffff81f3b210 t sienna_cichlid_mode2_prepare_hwcontext -ffffffff81f3b360 t sienna_cichlid_mode2_perform_reset -ffffffff81f3b3e0 t sienna_cichlid_mode2_restore_hwcontext -ffffffff81f3b6e0 t sienna_cichlid_mode2_reset -ffffffff81f3c000 T smu_v11_0_i2c_control_init -ffffffff81f3c0d0 T smu_v11_0_i2c_control_fini -ffffffff81f3c110 t smu_v11_0_i2c_xfer -ffffffff81f3d2c0 t smu_v11_0_i2c_func -ffffffff81f3d2f0 t smu_v11_0_i2c_enable -ffffffff81f3d440 t smu_v11_0_i2c_abort -ffffffff81f3d550 t lock_bus -ffffffff81f3d5f0 t trylock_bus -ffffffff81f3d640 t unlock_bus -ffffffff81f3e000 T smu_v13_0_10_reset_init -ffffffff81f3e0c0 t smu_v13_0_10_async_reset -ffffffff81f3e120 t smu_v13_0_10_get_reset_handler -ffffffff81f3e1d0 T smu_v13_0_10_reset_fini -ffffffff81f3e230 t smu_v13_0_10_mode2_prepare_hwcontext -ffffffff81f3e360 t smu_v13_0_10_mode2_perform_reset -ffffffff81f3e3e0 t smu_v13_0_10_mode2_restore_hwcontext -ffffffff81f3e750 t smu_v13_0_10_mode2_reset -ffffffff81f3f000 t smuio_v11_0_get_rom_index_offset -ffffffff81f3f040 t smuio_v11_0_get_rom_data_offset -ffffffff81f3f080 t smuio_v11_0_update_rom_clock_gating -ffffffff81f3f1d0 t smuio_v11_0_get_clock_gating_state -ffffffff81f40000 t smuio_v11_0_6_get_rom_index_offset -ffffffff81f40040 t smuio_v11_0_6_get_rom_data_offset -ffffffff81f40080 t smuio_v11_0_6_update_rom_clock_gating -ffffffff81f401d0 t smuio_v11_0_6_get_clock_gating_state -ffffffff81f41000 t smuio_v13_0_get_rom_index_offset -ffffffff81f41040 t smuio_v13_0_get_rom_data_offset -ffffffff81f41080 t smuio_v13_0_update_rom_clock_gating -ffffffff81f411d0 t smuio_v13_0_get_clock_gating_state -ffffffff81f41270 t smuio_v13_0_get_die_id -ffffffff81f412f0 t smuio_v13_0_get_socket_id -ffffffff81f41380 t smuio_v13_0_is_host_gpu_xgmi_supported -ffffffff81f42000 t smuio_v13_0_3_get_die_id -ffffffff81f42080 t smuio_v13_0_3_get_socket_id -ffffffff81f42110 t smuio_v13_0_3_get_pkg_type -ffffffff81f43000 t smuio_v13_0_6_get_rom_index_offset -ffffffff81f43040 t smuio_v13_0_6_get_rom_data_offset -ffffffff81f44000 t smuio_v9_0_get_rom_index_offset -ffffffff81f44040 t smuio_v9_0_get_rom_data_offset -ffffffff81f44080 t smuio_v9_0_update_rom_clock_gating -ffffffff81f441c0 t smuio_v9_0_get_clock_gating_state -ffffffff81f45000 T soc15_grbm_select -ffffffff81f45090 T soc15_program_register_sequence -ffffffff81f45290 T soc15_set_virt_ops -ffffffff81f45300 t soc15_common_early_init -ffffffff81f45720 t soc15_common_late_init -ffffffff81f45780 t soc15_common_sw_init -ffffffff81f457e0 t soc15_common_sw_fini -ffffffff81f45830 t soc15_common_hw_init -ffffffff81f45950 t soc15_common_hw_fini -ffffffff81f45a20 t soc15_common_suspend -ffffffff81f45a60 t soc15_common_resume -ffffffff81f45b30 t soc15_common_is_idle -ffffffff81f45b60 t soc15_common_wait_for_idle -ffffffff81f45b90 t soc15_common_soft_reset -ffffffff81f45bc0 t soc15_common_set_clockgating_state -ffffffff81f45f00 t soc15_common_set_powergating_state -ffffffff81f45f30 t soc15_common_get_clockgating_state -ffffffff81f46060 t soc15_uvd_ctx_rreg -ffffffff81f46100 t soc15_uvd_ctx_wreg -ffffffff81f46190 t soc15_didt_rreg -ffffffff81f46230 t soc15_didt_wreg -ffffffff81f462b0 t soc15_gc_cac_rreg -ffffffff81f463d0 t soc15_gc_cac_wreg -ffffffff81f464e0 t soc15_se_cac_rreg -ffffffff81f46600 t soc15_se_cac_wreg -ffffffff81f46710 t soc15_read_disabled_bios -ffffffff81f46740 t soc15_read_register -ffffffff81f46840 t soc15_asic_reset -ffffffff81f469f0 t soc15_asic_reset_method -ffffffff81f46ba0 t soc15_get_xclk -ffffffff81f46c00 t soc15_set_uvd_clocks -ffffffff81f46c30 t soc15_set_vce_clocks -ffffffff81f46c60 t soc15_get_config_memsize -ffffffff81f46c80 t soc15_need_full_reset -ffffffff81f46cb0 t soc15_get_pcie_usage -ffffffff81f46de0 t soc15_need_reset_on_init -ffffffff81f46e90 t soc15_get_pcie_replay_count -ffffffff81f46f00 t soc15_supports_baco -ffffffff81f46f60 t soc15_pre_asic_init -ffffffff81f46f70 t soc15_query_video_codecs -ffffffff81f47060 t vega20_get_pcie_usage -ffffffff81f48000 T soc21_grbm_select -ffffffff81f48090 t soc21_common_early_init -ffffffff81f48200 t soc21_common_late_init -ffffffff81f482e0 t soc21_common_sw_init -ffffffff81f48320 t soc21_common_sw_fini -ffffffff81f48350 t soc21_common_hw_init -ffffffff81f48410 t soc21_common_hw_fini -ffffffff81f484b0 t soc21_common_suspend -ffffffff81f48550 t soc21_common_resume -ffffffff81f48720 t soc21_common_is_idle -ffffffff81f48750 t soc21_common_wait_for_idle -ffffffff81f48780 t soc21_common_soft_reset -ffffffff81f487b0 t soc21_common_set_clockgating_state -ffffffff81f48860 t soc21_common_set_powergating_state -ffffffff81f488c0 t soc21_common_get_clockgating_state -ffffffff81f48910 t soc21_didt_rreg -ffffffff81f489b0 t soc21_didt_wreg -ffffffff81f48a30 t soc21_read_disabled_bios -ffffffff81f48a60 t soc21_read_register -ffffffff81f48b50 t soc21_asic_reset -ffffffff81f48c30 t soc21_asic_reset_method -ffffffff81f48cf0 t soc21_get_xclk -ffffffff81f48d20 t soc21_set_uvd_clocks -ffffffff81f48d50 t soc21_set_vce_clocks -ffffffff81f48d80 t soc21_get_config_memsize -ffffffff81f48da0 t soc21_need_full_reset -ffffffff81f48dd0 t soc21_init_doorbell_index -ffffffff81f48ef0 t soc21_need_reset_on_init -ffffffff81f48f90 t soc21_pre_asic_init -ffffffff81f48fc0 t soc21_update_umd_stable_pstate -ffffffff81f49040 t soc21_query_video_codecs -ffffffff81f4a000 t tonga_ih_early_init -ffffffff81f4a050 t tonga_ih_sw_init -ffffffff81f4a0d0 t tonga_ih_sw_fini -ffffffff81f4a110 t tonga_ih_hw_init -ffffffff81f4a2f0 t tonga_ih_hw_fini -ffffffff81f4a390 t tonga_ih_suspend -ffffffff81f4a430 t tonga_ih_resume -ffffffff81f4a470 t tonga_ih_is_idle -ffffffff81f4a4c0 t tonga_ih_wait_for_idle -ffffffff81f4a560 t tonga_ih_check_soft_reset -ffffffff81f4a5c0 t tonga_ih_pre_soft_reset -ffffffff81f4a670 t tonga_ih_soft_reset -ffffffff81f4a740 t tonga_ih_post_soft_reset -ffffffff81f4a780 t tonga_ih_set_clockgating_state -ffffffff81f4a7b0 t tonga_ih_set_powergating_state -ffffffff81f4a7e0 t tonga_ih_get_wptr -ffffffff81f4a8f0 t tonga_ih_decode_iv -ffffffff81f4a970 t tonga_ih_set_rptr -ffffffff81f4b000 t umc_v6_0_init_registers -ffffffff81f4c000 t umc_v6_1_query_ras_error_count -ffffffff81f4c4e0 t umc_v6_1_query_ras_error_address -ffffffff81f4c7c0 t umc_v6_1_err_cnt_init -ffffffff81f4d000 T umc_v6_7_convert_error_address -ffffffff81f4d320 t umc_v6_7_query_ras_error_count -ffffffff81f4d360 t umc_v6_7_query_ras_error_address -ffffffff81f4d380 t umc_v6_7_query_ras_poison_mode -ffffffff81f4d3e0 t umc_v6_7_ecc_info_query_ras_error_count -ffffffff81f4d400 t umc_v6_7_ecc_info_query_ras_error_address -ffffffff81f4d420 t umc_v6_7_query_ecc_error_count -ffffffff81f4d690 t umc_v6_7_reset_error_count_per_channel -ffffffff81f4d790 t umc_v6_7_query_error_address -ffffffff81f4d8b0 t umc_v6_7_ecc_info_querry_ecc_error_count -ffffffff81f4da80 t umc_v6_7_ecc_info_query_error_address -ffffffff81f4e000 t umc_v8_10_query_ras_error_count -ffffffff81f4e040 t umc_v8_10_query_ras_error_address -ffffffff81f4e060 t umc_v8_10_err_cnt_init -ffffffff81f4e080 t umc_v8_10_query_ras_poison_mode -ffffffff81f4e0b0 t umc_v8_10_ecc_info_query_ras_error_count -ffffffff81f4e0d0 t umc_v8_10_ecc_info_query_ras_error_address -ffffffff81f4e0f0 t umc_v8_10_set_eeprom_table_version -ffffffff81f4e120 t umc_v8_10_query_ecc_error_count -ffffffff81f4e1f0 t umc_v8_10_clear_error_count_per_channel -ffffffff81f4e260 t umc_v8_10_query_error_address -ffffffff81f4e390 t umc_v8_10_convert_error_address -ffffffff81f4e5b0 t umc_v8_10_err_cnt_init_per_channel -ffffffff81f4e660 t umc_v8_10_ecc_info_query_ecc_error_count -ffffffff81f4e740 t umc_v8_10_ecc_info_query_error_address -ffffffff81f4f000 t umc_v8_7_query_ras_error_count -ffffffff81f4f310 t umc_v8_7_query_ras_error_address -ffffffff81f4f4d0 t umc_v8_7_err_cnt_init -ffffffff81f4f630 t umc_v8_7_ecc_info_query_ras_error_count -ffffffff81f4f750 t umc_v8_7_ecc_info_query_ras_error_address -ffffffff81f50000 t uvd_v5_0_early_init -ffffffff81f50050 t uvd_v5_0_sw_init -ffffffff81f50140 t uvd_v5_0_sw_fini -ffffffff81f50190 t uvd_v5_0_hw_init -ffffffff81f50690 t uvd_v5_0_hw_fini -ffffffff81f50710 t uvd_v5_0_suspend -ffffffff81f50810 t uvd_v5_0_resume -ffffffff81f50860 t uvd_v5_0_is_idle -ffffffff81f508b0 t uvd_v5_0_wait_for_idle -ffffffff81f50940 t uvd_v5_0_soft_reset -ffffffff81f509e0 t uvd_v5_0_set_clockgating_state -ffffffff81f50b80 t uvd_v5_0_set_powergating_state -ffffffff81f50bc0 t uvd_v5_0_get_clockgating_state -ffffffff81f50c40 t uvd_v5_0_ring_get_rptr -ffffffff81f50c80 t uvd_v5_0_ring_get_wptr -ffffffff81f50cc0 t uvd_v5_0_ring_set_wptr -ffffffff81f50cf0 t uvd_v5_0_ring_emit_ib -ffffffff81f50f60 t uvd_v5_0_ring_emit_fence -ffffffff81f51510 t uvd_v5_0_ring_test_ring -ffffffff81f516b0 t uvd_v5_0_ring_insert_nop -ffffffff81f51810 t uvd_v5_0_set_interrupt_state -ffffffff81f51840 t uvd_v5_0_process_interrupt -ffffffff81f518a0 t uvd_v5_0_stop -ffffffff81f519b0 t uvd_v5_0_start -ffffffff81f53000 t uvd_v6_0_early_init -ffffffff81f53160 t uvd_v6_0_sw_init -ffffffff81f533c0 t uvd_v6_0_sw_fini -ffffffff81f53480 t uvd_v6_0_hw_init -ffffffff81f53a30 t uvd_v6_0_hw_fini -ffffffff81f53ab0 t uvd_v6_0_suspend -ffffffff81f53bb0 t uvd_v6_0_resume -ffffffff81f53c00 t uvd_v6_0_is_idle -ffffffff81f53c50 t uvd_v6_0_wait_for_idle -ffffffff81f53ce0 t uvd_v6_0_check_soft_reset -ffffffff81f53d60 t uvd_v6_0_pre_soft_reset -ffffffff81f53da0 t uvd_v6_0_soft_reset -ffffffff81f53e70 t uvd_v6_0_post_soft_reset -ffffffff81f53f10 t uvd_v6_0_set_clockgating_state -ffffffff81f540a0 t uvd_v6_0_set_powergating_state -ffffffff81f54110 t uvd_v6_0_get_clockgating_state -ffffffff81f541a0 t uvd_v6_0_ring_get_rptr -ffffffff81f541e0 t uvd_v6_0_ring_get_wptr -ffffffff81f54220 t uvd_v6_0_ring_set_wptr -ffffffff81f54250 t uvd_v6_0_ring_emit_ib -ffffffff81f545b0 t uvd_v6_0_ring_emit_fence -ffffffff81f54b60 t uvd_v6_0_ring_emit_pipeline_sync -ffffffff81f54f50 t uvd_v6_0_ring_emit_vm_flush -ffffffff81f552b0 t uvd_v6_0_ring_emit_hdp_flush -ffffffff81f552e0 t uvd_v6_0_ring_test_ring -ffffffff81f55480 t uvd_v6_0_ring_insert_nop -ffffffff81f555e0 t uvd_v6_0_ring_emit_wreg -ffffffff81f55860 t uvd_v6_0_enc_ring_get_rptr -ffffffff81f558c0 t uvd_v6_0_enc_ring_get_wptr -ffffffff81f55920 t uvd_v6_0_enc_ring_set_wptr -ffffffff81f55960 t uvd_v6_0_enc_ring_emit_ib -ffffffff81f55ba0 t uvd_v6_0_enc_ring_emit_fence -ffffffff81f55de0 t uvd_v6_0_enc_ring_emit_pipeline_sync -ffffffff81f55f90 t uvd_v6_0_enc_ring_emit_vm_flush -ffffffff81f561a0 t uvd_v6_0_enc_ring_test_ring -ffffffff81f562f0 t uvd_v6_0_enc_ring_test_ib -ffffffff81f567d0 t uvd_v6_0_enc_ring_insert_end -ffffffff81f56860 t uvd_v6_0_set_interrupt_state -ffffffff81f56890 t uvd_v6_0_process_interrupt -ffffffff81f56990 t uvd_v6_0_stop -ffffffff81f56aa0 t uvd_v6_0_start -ffffffff81f58000 t uvd_v7_0_early_init -ffffffff81f58270 t uvd_v7_0_sw_init -ffffffff81f58690 t uvd_v7_0_sw_fini -ffffffff81f58780 t uvd_v7_0_hw_init -ffffffff81f5b540 t uvd_v7_0_hw_fini -ffffffff81f5b850 t uvd_v7_0_suspend -ffffffff81f5b900 t uvd_v7_0_resume -ffffffff81f5b950 t uvd_v7_0_set_clockgating_state -ffffffff81f5b980 t uvd_v7_0_ring_get_rptr -ffffffff81f5ba20 t uvd_v7_0_ring_get_wptr -ffffffff81f5bac0 t uvd_v7_0_ring_set_wptr -ffffffff81f5bb40 t uvd_v7_0_ring_patch_cs_in_place -ffffffff81f5bbb0 t uvd_v7_0_ring_emit_ib -ffffffff81f5bf50 t uvd_v7_0_ring_emit_fence -ffffffff81f5c5a0 t uvd_v7_0_ring_emit_vm_flush -ffffffff81f5c610 t uvd_v7_0_ring_emit_hdp_flush -ffffffff81f5c640 t uvd_v7_0_ring_test_ring -ffffffff81f5c8d0 t uvd_v7_0_ring_insert_nop -ffffffff81f5ca70 t uvd_v7_0_ring_emit_wreg -ffffffff81f5cd40 t uvd_v7_0_ring_emit_reg_wait -ffffffff81f5d0f0 t uvd_v7_0_enc_ring_get_rptr -ffffffff81f5d1e0 t uvd_v7_0_enc_ring_get_wptr -ffffffff81f5d2e0 t uvd_v7_0_enc_ring_set_wptr -ffffffff81f5d3e0 t uvd_v7_0_enc_ring_emit_ib -ffffffff81f5d620 t uvd_v7_0_enc_ring_emit_fence -ffffffff81f5d860 t uvd_v7_0_enc_ring_emit_vm_flush -ffffffff81f5d8d0 t uvd_v7_0_enc_ring_test_ring -ffffffff81f5da30 t uvd_v7_0_enc_ring_test_ib -ffffffff81f5df10 t uvd_v7_0_enc_ring_insert_end -ffffffff81f5dfa0 t uvd_v7_0_enc_ring_emit_wreg -ffffffff81f5e0f0 t uvd_v7_0_enc_ring_emit_reg_wait -ffffffff81f5e2b0 t uvd_v7_0_set_interrupt_state -ffffffff81f5e2e0 t uvd_v7_0_process_interrupt -ffffffff81f5f000 t vce_v3_0_early_init -ffffffff81f5f180 t vce_v3_0_sw_init -ffffffff81f5f2e0 t vce_v3_0_sw_fini -ffffffff81f5f330 t vce_v3_0_hw_init -ffffffff81f5f400 t vce_v3_0_hw_fini -ffffffff81f5f4f0 t vce_v3_0_suspend -ffffffff81f5f5c0 t vce_v3_0_resume -ffffffff81f5f6a0 t vce_v3_0_is_idle -ffffffff81f5f710 t vce_v3_0_wait_for_idle -ffffffff81f5f7c0 t vce_v3_0_check_soft_reset -ffffffff81f5f8c0 t vce_v3_0_pre_soft_reset -ffffffff81f5f960 t vce_v3_0_soft_reset -ffffffff81f5fa30 t vce_v3_0_post_soft_reset -ffffffff81f5fad0 t vce_v3_0_set_clockgating_state -ffffffff81f5fdc0 t vce_v3_0_set_powergating_state -ffffffff81f605e0 t vce_v3_0_get_clockgating_state -ffffffff81f606a0 t vce_v3_0_ring_get_rptr -ffffffff81f60770 t vce_v3_0_ring_get_wptr -ffffffff81f60840 t vce_v3_0_ring_set_wptr -ffffffff81f60900 t vce_v3_0_ring_emit_ib -ffffffff81f60b40 t vce_v3_0_emit_pipeline_sync -ffffffff81f60cf0 t vce_v3_0_emit_vm_flush -ffffffff81f60f60 t vce_v3_0_set_interrupt_state -ffffffff81f60fd0 t vce_v3_0_process_interrupt -ffffffff81f61090 t vce_v3_0_stop -ffffffff81f62000 t vce_v4_0_early_init -ffffffff81f620b0 t vce_v4_0_sw_init -ffffffff81f62350 t vce_v4_0_sw_fini -ffffffff81f623d0 t vce_v4_0_hw_init -ffffffff81f62b90 t vce_v4_0_hw_fini -ffffffff81f62cc0 t vce_v4_0_suspend -ffffffff81f62de0 t vce_v4_0_resume -ffffffff81f62e90 t vce_v4_0_set_clockgating_state -ffffffff81f62ec0 t vce_v4_0_set_powergating_state -ffffffff81f62fa0 t vce_v4_0_ring_get_rptr -ffffffff81f63010 t vce_v4_0_ring_get_wptr -ffffffff81f630a0 t vce_v4_0_ring_set_wptr -ffffffff81f63130 t vce_v4_0_ring_emit_ib -ffffffff81f63370 t vce_v4_0_ring_emit_fence -ffffffff81f635b0 t vce_v4_0_emit_vm_flush -ffffffff81f63620 t vce_v4_0_ring_insert_end -ffffffff81f636b0 t vce_v4_0_emit_wreg -ffffffff81f63800 t vce_v4_0_emit_reg_wait -ffffffff81f639c0 t vce_v4_0_set_interrupt_state -ffffffff81f63a50 t vce_v4_0_process_interrupt -ffffffff81f63af0 t vce_v4_0_start -ffffffff81f65000 T vcn_dec_sw_ring_emit_fence -ffffffff81f65240 T vcn_dec_sw_ring_insert_end -ffffffff81f652d0 T vcn_dec_sw_ring_emit_ib -ffffffff81f65510 T vcn_dec_sw_ring_emit_reg_wait -ffffffff81f656d0 T vcn_dec_sw_ring_emit_vm_flush -ffffffff81f65740 T vcn_dec_sw_ring_emit_wreg -ffffffff81f66000 T vcn_v1_0_set_pg_for_begin_use -ffffffff81f66140 T vcn_v1_0_ring_end_use -ffffffff81f661b0 t vcn_v1_0_early_init -ffffffff81f66310 t vcn_v1_0_sw_init -ffffffff81f665b0 t vcn_v1_0_sw_fini -ffffffff81f66610 t vcn_v1_0_hw_init -ffffffff81f666e0 t vcn_v1_0_hw_fini -ffffffff81f667e0 t vcn_v1_0_suspend -ffffffff81f66850 t vcn_v1_0_resume -ffffffff81f66930 t vcn_v1_0_is_idle -ffffffff81f669c0 t vcn_v1_0_wait_for_idle -ffffffff81f66a00 t vcn_v1_0_set_clockgating_state -ffffffff81f66ab0 t vcn_v1_0_set_powergating_state -ffffffff81f67010 t vcn_v1_0_dec_ring_get_rptr -ffffffff81f670a0 t vcn_v1_0_dec_ring_get_wptr -ffffffff81f67130 t vcn_v1_0_dec_ring_set_wptr -ffffffff81f67240 t vcn_v1_0_ring_patch_cs_in_place -ffffffff81f67400 t vcn_v1_0_dec_ring_emit_ib -ffffffff81f67780 t vcn_v1_0_dec_ring_emit_fence -ffffffff81f67d90 t vcn_v1_0_dec_ring_emit_vm_flush -ffffffff81f67e00 t vcn_v1_0_dec_ring_insert_nop -ffffffff81f67f90 t vcn_v1_0_dec_ring_insert_start -ffffffff81f68160 t vcn_v1_0_dec_ring_insert_end -ffffffff81f68270 t vcn_v1_0_ring_begin_use -ffffffff81f68310 t vcn_v1_0_dec_ring_emit_wreg -ffffffff81f685c0 t vcn_v1_0_dec_ring_emit_reg_wait -ffffffff81f68940 t vcn_v1_0_enc_ring_get_rptr -ffffffff81f68a20 t vcn_v1_0_enc_ring_get_wptr -ffffffff81f68b00 t vcn_v1_0_enc_ring_set_wptr -ffffffff81f68bc0 t vcn_v1_0_enc_ring_emit_ib -ffffffff81f68e00 t vcn_v1_0_enc_ring_emit_fence -ffffffff81f69040 t vcn_v1_0_enc_ring_emit_vm_flush -ffffffff81f690b0 t vcn_v1_0_enc_ring_insert_end -ffffffff81f69140 t vcn_v1_0_enc_ring_emit_wreg -ffffffff81f69290 t vcn_v1_0_enc_ring_emit_reg_wait -ffffffff81f69450 t vcn_v1_0_set_interrupt_state -ffffffff81f69480 t vcn_v1_0_process_interrupt -ffffffff81f69530 t vcn_v1_0_idle_work_handler -ffffffff81f696a0 t vcn_v1_0_pause_dpg_mode -ffffffff81f6a540 t vcn_v1_0_enable_clock_gating -ffffffff81f6a970 t vcn_v1_0_disable_clock_gating -ffffffff81f6af30 t vcn_1_0_enable_static_power_gating -ffffffff81f6b0e0 t vcn_v1_0_start_dpg_mode -ffffffff81f6eea0 t vcn_v1_0_start_spg_mode -ffffffff81f710a0 t vcn_v1_0_clock_gating_dpg_mode -ffffffff81f72000 T vcn_v2_0_dec_ring_insert_start -ffffffff81f721c0 T vcn_v2_0_dec_ring_insert_end -ffffffff81f722c0 T vcn_v2_0_dec_ring_insert_nop -ffffffff81f72430 T vcn_v2_0_dec_ring_emit_fence -ffffffff81f729f0 T vcn_v2_0_dec_ring_emit_ib -ffffffff81f72d50 T vcn_v2_0_dec_ring_emit_reg_wait -ffffffff81f730a0 T vcn_v2_0_dec_ring_emit_vm_flush -ffffffff81f73110 T vcn_v2_0_dec_ring_emit_wreg -ffffffff81f73390 T vcn_v2_0_enc_ring_emit_fence -ffffffff81f735d0 T vcn_v2_0_enc_ring_insert_end -ffffffff81f73660 T vcn_v2_0_enc_ring_emit_ib -ffffffff81f738a0 T vcn_v2_0_enc_ring_emit_reg_wait -ffffffff81f73a60 T vcn_v2_0_enc_ring_emit_vm_flush -ffffffff81f73ad0 T vcn_v2_0_enc_ring_emit_wreg -ffffffff81f73c20 T vcn_v2_0_dec_ring_test_ring -ffffffff81f73ec0 t vcn_v2_0_early_init -ffffffff81f74020 t vcn_v2_0_sw_init -ffffffff81f74350 t vcn_v2_0_sw_fini -ffffffff81f743d0 t vcn_v2_0_hw_init -ffffffff81f74d50 t vcn_v2_0_hw_fini -ffffffff81f74e50 t vcn_v2_0_suspend -ffffffff81f74e80 t vcn_v2_0_resume -ffffffff81f74ed0 t vcn_v2_0_is_idle -ffffffff81f74f60 t vcn_v2_0_wait_for_idle -ffffffff81f74fa0 t vcn_v2_0_set_clockgating_state -ffffffff81f75030 t vcn_v2_0_set_powergating_state -ffffffff81f755f0 t vcn_v2_0_dec_ring_get_rptr -ffffffff81f75680 t vcn_v2_0_dec_ring_get_wptr -ffffffff81f75720 t vcn_v2_0_dec_ring_set_wptr -ffffffff81f75860 t vcn_v2_0_enc_ring_get_rptr -ffffffff81f75940 t vcn_v2_0_enc_ring_get_wptr -ffffffff81f75a30 t vcn_v2_0_enc_ring_set_wptr -ffffffff81f75b20 t vcn_v2_0_set_interrupt_state -ffffffff81f75b50 t vcn_v2_0_process_interrupt -ffffffff81f75c00 t vcn_v2_0_pause_dpg_mode -ffffffff81f763f0 t vcn_v2_0_enable_clock_gating -ffffffff81f76680 t vcn_v2_0_disable_clock_gating -ffffffff81f76aa0 t vcn_v2_0_start -ffffffff81f7b050 t vcn_v2_0_enable_static_power_gating -ffffffff81f7b1b0 t vcn_v2_0_clock_gating_dpg_mode -ffffffff81f7bf30 t vcn_v2_0_mc_resume_dpg_mode -ffffffff81f81000 t vcn_v2_6_query_poison_status -ffffffff81f810e0 t vcn_v2_5_early_init -ffffffff81f813b0 t vcn_v2_5_sw_init -ffffffff81f81880 t vcn_v2_5_sw_fini -ffffffff81f81950 t vcn_v2_5_hw_init -ffffffff81f82390 t vcn_v2_5_hw_fini -ffffffff81f82500 t vcn_v2_5_suspend -ffffffff81f82530 t vcn_v2_5_resume -ffffffff81f82580 t vcn_v2_5_is_idle -ffffffff81f82670 t vcn_v2_5_wait_for_idle -ffffffff81f82710 t vcn_v2_5_set_clockgating_state -ffffffff81f82790 t vcn_v2_5_set_powergating_state -ffffffff81f849e0 t vcn_v2_5_dec_ring_get_rptr -ffffffff81f84a80 t vcn_v2_5_dec_ring_get_wptr -ffffffff81f84b30 t vcn_v2_5_dec_ring_set_wptr -ffffffff81f84be0 t vcn_v2_5_enc_ring_get_rptr -ffffffff81f84cd0 t vcn_v2_5_enc_ring_get_wptr -ffffffff81f84de0 t vcn_v2_5_enc_ring_set_wptr -ffffffff81f84ef0 t vcn_v2_5_set_interrupt_state -ffffffff81f84f20 t vcn_v2_5_process_interrupt -ffffffff81f85010 t vcn_v2_6_set_ras_interrupt_state -ffffffff81f85040 t vcn_v2_5_pause_dpg_mode -ffffffff81f857c0 t vcn_v2_5_enable_clock_gating -ffffffff81f85ad0 t vcn_v2_5_disable_clock_gating -ffffffff81f85fc0 t vcn_v2_5_start_dpg_mode -ffffffff81f89990 t vcn_v2_5_clock_gating_dpg_mode -ffffffff81f8a740 t vcn_v2_5_mc_resume_dpg_mode -ffffffff81f8f000 t vcn_v3_0_early_init -ffffffff81f8f220 t vcn_v3_0_sw_init -ffffffff81f8f6e0 t vcn_v3_0_sw_fini -ffffffff81f8f7c0 t vcn_v3_0_hw_init -ffffffff81f90310 t vcn_v3_0_hw_fini -ffffffff81f90410 t vcn_v3_0_suspend -ffffffff81f90440 t vcn_v3_0_resume -ffffffff81f90490 t vcn_v3_0_is_idle -ffffffff81f90580 t vcn_v3_0_wait_for_idle -ffffffff81f90620 t vcn_v3_0_set_clockgating_state -ffffffff81f90730 t vcn_v3_0_set_powergating_state -ffffffff81f92cc0 t vcn_v3_0_dec_ring_get_rptr -ffffffff81f92d60 t vcn_v3_0_dec_ring_get_wptr -ffffffff81f92e10 t vcn_v3_0_dec_ring_set_wptr -ffffffff81f92f80 t vcn_v3_0_ring_patch_cs_in_place -ffffffff81f932a0 t vcn_v3_0_enc_ring_get_rptr -ffffffff81f93390 t vcn_v3_0_enc_ring_get_wptr -ffffffff81f934a0 t vcn_v3_0_enc_ring_set_wptr -ffffffff81f935b0 t vcn_v3_0_set_interrupt_state -ffffffff81f935e0 t vcn_v3_0_process_interrupt -ffffffff81f936d0 t vcn_v3_0_pause_dpg_mode -ffffffff81f93f00 t vcn_v3_0_enable_clock_gating -ffffffff81f94190 t vcn_v3_0_disable_clock_gating -ffffffff81f946c0 t vcn_v3_0_start_dpg_mode -ffffffff81f979b0 t vcn_v3_0_clock_gating_dpg_mode -ffffffff81f98790 t vcn_v3_0_mc_resume_dpg_mode -ffffffff81f9d000 t vcn_v4_0_query_ras_poison_status -ffffffff81f9d0e0 t vcn_v4_0_early_init -ffffffff81f9d2a0 t vcn_v4_0_sw_init -ffffffff81f9d560 t vcn_v4_0_sw_fini -ffffffff81f9d640 t vcn_v4_0_hw_init -ffffffff81f9e070 t vcn_v4_0_hw_fini -ffffffff81f9e1c0 t vcn_v4_0_suspend -ffffffff81f9e1f0 t vcn_v4_0_resume -ffffffff81f9e240 t vcn_v4_0_is_idle -ffffffff81f9e340 t vcn_v4_0_wait_for_idle -ffffffff81f9e3f0 t vcn_v4_0_set_clockgating_state -ffffffff81f9e500 t vcn_v4_0_set_powergating_state -ffffffff81f9ed40 t vcn_v4_0_unified_ring_get_rptr -ffffffff81f9ee20 t vcn_v4_0_unified_ring_get_wptr -ffffffff81f9ef10 t vcn_v4_0_unified_ring_set_wptr -ffffffff81f9f010 t vcn_v4_0_ring_patch_cs_in_place -ffffffff81f9f3a0 t vcn_v4_0_limit_sched -ffffffff81f9f400 t vcn_v4_0_set_interrupt_state -ffffffff81f9f430 t vcn_v4_0_process_interrupt -ffffffff81f9f4f0 t vcn_v4_0_set_ras_interrupt_state -ffffffff81f9f520 t vcn_v4_0_pause_dpg_mode -ffffffff81f9f7a0 t vcn_v4_0_enable_clock_gating -ffffffff81f9faa0 t vcn_v4_0_disable_clock_gating -ffffffff81f9ff60 t vcn_v4_0_start -ffffffff81fa4a50 t vcn_v4_0_disable_clock_gating_dpg_mode -ffffffff81fa5830 t vcn_v4_0_mc_resume_dpg_mode -ffffffff81faa000 t vcn_v4_0_3_early_init -ffffffff81faa100 t vcn_v4_0_3_sw_init -ffffffff81faa380 t vcn_v4_0_3_sw_fini -ffffffff81faa440 t vcn_v4_0_3_hw_init -ffffffff81fab140 t vcn_v4_0_3_hw_fini -ffffffff81fab1d0 t vcn_v4_0_3_suspend -ffffffff81fab240 t vcn_v4_0_3_resume -ffffffff81fab290 t vcn_v4_0_3_is_idle -ffffffff81fab400 t vcn_v4_0_3_wait_for_idle -ffffffff81fab500 t vcn_v4_0_3_set_clockgating_state -ffffffff81fab690 t vcn_v4_0_3_set_powergating_state -ffffffff81fabd80 t vcn_v4_0_3_unified_ring_get_rptr -ffffffff81fabef0 t vcn_v4_0_3_unified_ring_get_wptr -ffffffff81fac080 t vcn_v4_0_3_unified_ring_set_wptr -ffffffff81fac230 t vcn_v4_0_3_set_interrupt_state -ffffffff81fac260 t vcn_v4_0_3_process_interrupt -ffffffff81fac380 t vcn_v4_0_3_query_ras_error_count -ffffffff81fac470 t vcn_v4_0_3_reset_ras_error_count -ffffffff81fac560 t vcn_v4_0_3_pause_dpg_mode -ffffffff81fac590 t vcn_v4_0_3_enable_clock_gating -ffffffff81fac8b0 t vcn_v4_0_3_disable_clock_gating -ffffffff81facd90 t vcn_v4_0_3_start -ffffffff81fb14b0 t vcn_v4_0_3_disable_clock_gating_dpg_mode -ffffffff81fb2250 t vcn_v4_0_3_mc_resume_dpg_mode -ffffffff81fb7000 t vega10_ih_early_init -ffffffff81fb7050 t vega10_ih_sw_init -ffffffff81fb7300 t vega10_ih_sw_fini -ffffffff81fb7340 t vega10_ih_hw_init -ffffffff81fb76c0 t vega10_ih_hw_fini -ffffffff81fb7710 t vega10_ih_suspend -ffffffff81fb7760 t vega10_ih_resume -ffffffff81fb7770 t vega10_ih_is_idle -ffffffff81fb77a0 t vega10_ih_wait_for_idle -ffffffff81fb77d0 t vega10_ih_soft_reset -ffffffff81fb7800 t vega10_ih_set_clockgating_state -ffffffff81fb7950 t vega10_ih_set_powergating_state -ffffffff81fb7980 t vega10_ih_get_wptr -ffffffff81fb7ab0 t vega10_ih_set_rptr -ffffffff81fb7b80 t vega10_ih_self_irq -ffffffff81fb7c00 t vega10_ih_toggle_interrupts -ffffffff81fb8000 T vega10_reg_base_init -ffffffff81fb8150 T vega10_doorbell_index_init -ffffffff81fb9000 t vega20_ih_early_init -ffffffff81fb9050 t vega20_ih_sw_init -ffffffff81fb9330 t vega20_ih_sw_fini -ffffffff81fb9370 t vega20_ih_hw_init -ffffffff81fb9990 t vega20_ih_hw_fini -ffffffff81fb99e0 t vega20_ih_suspend -ffffffff81fb9a30 t vega20_ih_resume -ffffffff81fb9a40 t vega20_ih_is_idle -ffffffff81fb9a70 t vega20_ih_wait_for_idle -ffffffff81fb9aa0 t vega20_ih_soft_reset -ffffffff81fb9ad0 t vega20_ih_set_clockgating_state -ffffffff81fb9c00 t vega20_ih_set_powergating_state -ffffffff81fb9c30 t vega20_ih_get_wptr -ffffffff81fb9d60 t vega20_ih_set_rptr -ffffffff81fb9e30 t vega20_ih_self_irq -ffffffff81fb9eb0 t vega20_ih_toggle_interrupts -ffffffff81fbb000 T vega20_reg_base_init -ffffffff81fbb160 T vega20_doorbell_index_init -ffffffff81fbc000 T vi_srbm_select -ffffffff81fbc050 T vi_set_virt_ops -ffffffff81fbc090 T vi_set_ip_blocks -ffffffff81fbc4c0 T legacy_doorbell_index_init -ffffffff81fbc570 t vi_common_early_init -ffffffff81fbc860 t vi_common_late_init -ffffffff81fbc8a0 t vi_common_sw_init -ffffffff81fbc8e0 t vi_common_sw_fini -ffffffff81fbc910 t vi_common_hw_init -ffffffff81fbcfd0 t vi_common_hw_fini -ffffffff81fbd050 t vi_common_suspend -ffffffff81fbd0d0 t vi_common_resume -ffffffff81fbd110 t vi_common_is_idle -ffffffff81fbd140 t vi_common_wait_for_idle -ffffffff81fbd170 t vi_common_soft_reset -ffffffff81fbd1a0 t vi_common_set_clockgating_state -ffffffff81fbd710 t vi_common_set_powergating_state -ffffffff81fbd740 t vi_common_get_clockgating_state -ffffffff81fbd800 t cz_smc_rreg -ffffffff81fbd880 t cz_smc_wreg -ffffffff81fbd8f0 t vi_smc_rreg -ffffffff81fbd970 t vi_smc_wreg -ffffffff81fbd9e0 t vi_pcie_rreg -ffffffff81fbda80 t vi_pcie_wreg -ffffffff81fbdb10 t vi_uvd_ctx_rreg -ffffffff81fbdba0 t vi_uvd_ctx_wreg -ffffffff81fbdc10 t vi_didt_rreg -ffffffff81fbdc90 t vi_didt_wreg -ffffffff81fbdd00 t vi_gc_cac_rreg -ffffffff81fbdd80 t vi_gc_cac_wreg -ffffffff81fbddf0 t vi_read_disabled_bios -ffffffff81fbdfc0 t vi_read_bios_from_rom -ffffffff81fbe0c0 t vi_read_register -ffffffff81fbe370 t vi_asic_reset -ffffffff81fbe4d0 t vi_asic_reset_method -ffffffff81fbe580 t vi_get_xclk -ffffffff81fbe630 t vi_set_uvd_clocks -ffffffff81fbe6e0 t vi_set_vce_clocks -ffffffff81fbe980 t vi_get_config_memsize -ffffffff81fbe9a0 t vi_flush_hdp -ffffffff81fbea10 t vi_invalidate_hdp -ffffffff81fbea80 t vi_need_full_reset -ffffffff81fbead0 t vi_get_pcie_usage -ffffffff81fbec00 t vi_need_reset_on_init -ffffffff81fbec80 t vi_get_pcie_replay_count -ffffffff81fbecf0 t vi_asic_supports_baco -ffffffff81fbed40 t vi_pre_asic_init -ffffffff81fbed70 t vi_query_video_codecs -ffffffff81fbee10 t vi_set_uvd_clock -ffffffff81fbf000 T amdgpu_xcp_drm_dev_alloc -ffffffff81fbf050 T amdgpu_xcp_drv_release -ffffffff81fc0000 T amdgpu_dm_find_first_crtc_matching_connector -ffffffff81fc0070 T amdgpu_dm_update_connector_after_detect -ffffffff81fc05c0 T amdgpu_dm_update_freesync_caps -ffffffff81fc0a70 T dm_atomic_get_state -ffffffff81fc0ae0 T amdgpu_dm_connector_atomic_set_property -ffffffff81fc0ba0 T amdgpu_dm_connector_atomic_get_property -ffffffff81fc0c40 T amdgpu_dm_connector_funcs_reset -ffffffff81fc0d30 T amdgpu_dm_connector_atomic_duplicate_state -ffffffff81fc0e30 T create_validate_stream_for_sink -ffffffff81fc2500 T amdgpu_dm_connector_mode_valid -ffffffff81fc26d0 T convert_dc_color_depth_into_bpc -ffffffff81fc2710 t dm_encoder_helper_disable -ffffffff81fc2740 t dm_encoder_helper_atomic_check -ffffffff81fc2910 T amdgpu_dm_connector_init_helper -ffffffff81fc2c70 T amdgpu_dm_get_encoder_crtc_mask -ffffffff81fc2cc0 T dm_restore_drm_connector_state -ffffffff81fc2e30 t parse_hdmi_amd_vsdb -ffffffff81fc3160 T amdgpu_dm_trigger_timing_sync -ffffffff81fc3330 T dm_write_reg_func -ffffffff81fc3350 T dm_read_reg_func -ffffffff81fc33f0 T amdgpu_dm_process_dmub_aux_transfer_sync -ffffffff81fc3600 T amdgpu_dm_process_dmub_set_config_sync -ffffffff81fc3770 T check_seamless_boot_capability -ffffffff81fc37c0 T dm_execute_dmub_cmd -ffffffff81fc37e0 T dm_execute_dmub_cmd_list -ffffffff81fc3800 t dm_early_init -ffffffff81fc3bb0 t dm_late_init -ffffffff81fc3e50 t dm_sw_init -ffffffff81fc4400 t dm_sw_fini -ffffffff81fc44a0 t amdgpu_dm_early_fini -ffffffff81fc4500 t dm_hw_init -ffffffff81fc60d0 t dm_hw_fini -ffffffff81fc6120 t dm_suspend -ffffffff81fc64a0 t dm_resume -ffffffff81fc6d00 t dm_is_idle -ffffffff81fc6d30 t dm_wait_for_idle -ffffffff81fc6d60 t dm_check_soft_reset -ffffffff81fc6d90 t dm_soft_reset -ffffffff81fc6dc0 t dm_set_clockgating_state -ffffffff81fc6df0 t dm_set_powergating_state -ffffffff81fc6e20 t dm_bandwidth_update -ffffffff81fc6e50 t dm_vblank_get_counter -ffffffff81fc6ec0 t dm_crtc_get_scanoutpos -ffffffff81fc6f80 t amdgpu_dm_dmub_reg_read -ffffffff81fc7030 t amdgpu_dm_dmub_reg_write -ffffffff81fc7060 t dm_dmub_hw_init -ffffffff81fc7430 t dmub_aux_setconfig_callback -ffffffff81fc74d0 t amdgpu_dm_fini -ffffffff81fc76b0 t emulated_link_detect -ffffffff81fc77b0 t amdgpu_dm_atomic_check -ffffffff81fc8510 t dm_update_plane_state -ffffffff81fc8b30 t dm_update_crtc_state -ffffffff81fc9510 t dm_check_crtc_cursor -ffffffff81fc9880 t is_scaling_state_different -ffffffff81fc9920 t do_aquire_global_lock -ffffffff81fc9b90 t dm_update_mst_vcpi_slots_for_dsc -ffffffff81fc9d80 t dm_atomic_destroy_state -ffffffff81fc9dc0 t dm_check_cursor_fb -ffffffff81fc9f50 t fill_dc_plane_attributes -ffffffff81fca1e0 t fill_dc_plane_info_and_addr -ffffffff81fca510 t fill_hdr_info_packet -ffffffff81fca670 t is_timing_unchanged_for_freesync -ffffffff81fca7a0 t get_highest_refresh_rate_mode -ffffffff81fca8d0 t update_stream_scaling_settings -ffffffff81fcaa10 t amdgpu_dm_atomic_commit_tail -ffffffff81fcd700 t amdgpu_dm_backlight_set_level -ffffffff81fcd8e0 t dm_atomic_duplicate_state -ffffffff81fcd980 t amdgpu_dm_audio_component_bind -ffffffff81fcd9e0 t amdgpu_dm_audio_component_unbind -ffffffff81fcda40 t amdgpu_dm_audio_component_get_eld -ffffffff81fcdb60 t dm_dmub_outbox1_low_irq -ffffffff81fcdde0 t dm_handle_hpd_work -ffffffff81fcde50 t amdgpu_dm_encoder_destroy -ffffffff81fcde80 t amdgpu_dm_i2c_xfer -ffffffff81fcdfd0 t amdgpu_dm_i2c_func -ffffffff81fce000 t amdgpu_dm_connector_detect -ffffffff81fce0c0 t amdgpu_dm_connector_funcs_force -ffffffff81fce190 t amdgpu_dm_connector_late_register -ffffffff81fce2f0 t amdgpu_dm_connector_unregister -ffffffff81fce310 t amdgpu_dm_connector_destroy -ffffffff81fce3f0 t amdgpu_dm_backlight_update_status -ffffffff81fce470 t amdgpu_dm_backlight_get_brightness -ffffffff81fce660 t get_modes -ffffffff81fce670 t amdgpu_dm_connector_atomic_check -ffffffff81fce7a0 t amdgpu_dm_connector_get_modes -ffffffff81fced60 t dm_crtc_high_irq -ffffffff81fcef00 t dm_vupdate_high_irq -ffffffff81fcf070 t dm_pflip_high_irq -ffffffff81fcf270 t register_hpd_handlers -ffffffff81fcf390 t dmub_hpd_callback -ffffffff81fcf500 t handle_hpd_irq -ffffffff81fcf510 t handle_hpd_rx_irq -ffffffff81fcf800 t handle_hpd_irq_helper -ffffffff81fcf960 t schedule_hpd_rx_offload_work -ffffffff81fcfa10 t dm_handle_hpd_rx_offload_work -ffffffff81fcfce0 t dm_gpureset_toggle_interrupts -ffffffff81fcfef0 t s3_handle_mst -ffffffff81fd1000 T amdgpu_dm_init_color_mod -ffffffff81fd1010 T amdgpu_dm_verify_lut_sizes -ffffffff81fd10e0 T amdgpu_dm_update_crtc_color_mgmt -ffffffff81fd1760 T amdgpu_dm_update_plane_color_mgmt -ffffffff81fd2000 T amdgpu_dm_crtc_handle_vblank -ffffffff81fd2070 T amdgpu_dm_crtc_modeset_required -ffffffff81fd20b0 T amdgpu_dm_crtc_vrr_active_irq -ffffffff81fd20f0 T amdgpu_dm_crtc_set_vupdate_irq -ffffffff81fd21a0 T amdgpu_dm_crtc_vrr_active -ffffffff81fd21e0 T amdgpu_dm_crtc_enable_vblank -ffffffff81fd2200 t dm_set_vblank -ffffffff81fd2450 T amdgpu_dm_crtc_disable_vblank -ffffffff81fd2470 T amdgpu_dm_crtc_init -ffffffff81fd2650 t vblank_control_worker -ffffffff81fd2770 t dm_crtc_reset_state -ffffffff81fd2810 t amdgpu_dm_crtc_destroy -ffffffff81fd2840 t dm_crtc_duplicate_state -ffffffff81fd29f0 t dm_crtc_destroy_state -ffffffff81fd2a30 t dm_crtc_helper_mode_fixup -ffffffff81fd2a60 t dm_crtc_helper_disable -ffffffff81fd2a90 t dm_crtc_helper_atomic_check -ffffffff81fd3000 T hdcp_update_display -ffffffff81fd3280 t process_output -ffffffff81fd33d0 T hdcp_reset_display -ffffffff81fd3530 T hdcp_handle_cpirq -ffffffff81fd3560 T hdcp_destroy -ffffffff81fd3650 T hdcp_create_workqueue -ffffffff81fd3a30 t event_cpirq -ffffffff81fd3a80 t event_property_update -ffffffff81fd3cb0 t event_callback -ffffffff81fd3d30 t event_watchdog_timer -ffffffff81fd3dc0 t event_property_validate -ffffffff81fd3f30 t lp_write_i2c -ffffffff81fd3fb0 t lp_read_i2c -ffffffff81fd4050 t lp_write_dpcd -ffffffff81fd4080 t lp_read_dpcd -ffffffff81fd40b0 t update_config -ffffffff81fd4420 t enable_assr -ffffffff81fd4540 t __delayed_work_tick -ffffffff81fd5000 T dm_helpers_parse_edid_caps -ffffffff81fd5250 T dm_helpers_dp_update_branch_info -ffffffff81fd5280 T dm_helpers_dp_mst_write_payload_allocation_table -ffffffff81fd5640 T dm_helpers_dp_mst_poll_pending_down_reply -ffffffff81fd5670 T dm_helpers_dp_mst_clear_payload_allocation_table -ffffffff81fd56a0 T dm_helpers_dp_mst_poll_for_allocation_change_trigger -ffffffff81fd5710 T dm_helpers_dp_mst_send_payload_allocation -ffffffff81fd57e0 T dm_dtn_log_begin -ffffffff81fd5830 T dm_dtn_log_append_v -ffffffff81fd5980 T dm_dtn_log_end -ffffffff81fd59d0 T dm_helpers_dp_mst_start_top_mgr -ffffffff81fd5aa0 T dm_helpers_dp_mst_stop_top_mgr -ffffffff81fd5b40 T dm_helpers_dp_read_dpcd -ffffffff81fd5bc0 T dm_helpers_dp_write_dpcd -ffffffff81fd5c40 T dm_helpers_submit_i2c -ffffffff81fd5d60 T dm_helpers_dp_write_dsc_enable -ffffffff81fd6390 T dm_helpers_is_dp_sink_present -ffffffff81fd6420 T dm_helpers_read_local_edid -ffffffff81fd6680 T dm_helper_dmub_aux_transfer_sync -ffffffff81fd66d0 T dm_helpers_dmub_set_config_sync -ffffffff81fd66f0 T dm_set_dcn_clocks -ffffffff81fd6720 T dm_helpers_smu_timeout -ffffffff81fd6750 T dm_helpers_init_panel_settings -ffffffff81fd67c0 T dm_helpers_override_panel_settings -ffffffff81fd6800 T dm_helpers_allocate_gpu_mem -ffffffff81fd6900 T dm_helpers_free_gpu_mem -ffffffff81fd6990 T dm_helpers_dmub_outbox_interrupt_control -ffffffff81fd6a20 T dm_helpers_mst_enable_stream_features -ffffffff81fd6b30 T dm_helpers_dp_handle_test_pattern_request -ffffffff81fd6e60 T dm_set_phyd32clk -ffffffff81fd6e90 T dm_helpers_enable_periodic_detection -ffffffff81fd6ec0 T dm_helpers_dp_mst_update_branch_bandwidth -ffffffff81fd6ef0 T dm_get_adaptive_sync_support_type -ffffffff81fd6f60 t execute_synaptics_rc_command -ffffffff81fd8000 T amdgpu_dm_irq_register_interrupt -ffffffff81fd81a0 t dm_irq_work_func -ffffffff81fd81c0 T amdgpu_dm_irq_unregister_interrupt -ffffffff81fd8340 T amdgpu_dm_irq_init -ffffffff81fd8430 T amdgpu_dm_irq_fini -ffffffff81fd85d0 T amdgpu_dm_irq_suspend -ffffffff81fd86e0 T amdgpu_dm_irq_resume_early -ffffffff81fd88a0 T amdgpu_dm_irq_resume_late -ffffffff81fd8a60 T amdgpu_dm_set_irq_funcs -ffffffff81fd8b20 T amdgpu_dm_outbox_init -ffffffff81fd8b50 T amdgpu_dm_hpd_init -ffffffff81fd8c00 T amdgpu_dm_hpd_fini -ffffffff81fd8cb0 t amdgpu_dm_set_crtc_irq_state -ffffffff81fd8d30 t amdgpu_dm_irq_handler -ffffffff81fd8f30 t amdgpu_dm_set_vline0_irq_state -ffffffff81fd8fb0 t amdgpu_dm_set_dmub_outbox_irq_state -ffffffff81fd9000 t amdgpu_dm_set_vupdate_irq_state -ffffffff81fd9080 t amdgpu_dm_set_dmub_trace_irq_state -ffffffff81fd90d0 t amdgpu_dm_set_pflip_irq_state -ffffffff81fd9150 t amdgpu_dm_set_hpd_irq_state -ffffffff81fda000 T needs_dsc_aux_workaround -ffffffff81fda050 T dm_dp_create_fake_mst_encoders -ffffffff81fda100 T dm_handle_mst_sideband_msg_ready_event -ffffffff81fda340 T amdgpu_dm_initialize_dp_connector -ffffffff81fda440 t kasprintf -ffffffff81fda510 t dm_dp_aux_transfer -ffffffff81fda650 T dm_mst_get_pbn_divider -ffffffff81fda6b0 T compute_mst_dsc_configs_for_state -ffffffff81fda950 t is_dsc_need_re_compute -ffffffff81fdab20 t compute_mst_dsc_configs_for_link -ffffffff81fdb150 T pre_validate_dsc -ffffffff81fdb700 T dm_dp_mst_is_port_support_mode -ffffffff81fdb960 t amdgpu_dm_encoder_destroy -ffffffff81fdb970 t dm_dp_add_mst_connector -ffffffff81fdbb30 t dm_handle_mst_down_rep_msg_ready -ffffffff81fdbb50 t amdgpu_dm_mst_connector_late_register -ffffffff81fdbba0 t amdgpu_dm_mst_connector_early_unregister -ffffffff81fdbc70 t dm_dp_mst_connector_destroy -ffffffff81fdbcf0 t dm_dp_mst_get_modes -ffffffff81fdc1e0 t dm_dp_mst_detect -ffffffff81fdc3a0 t dm_mst_atomic_best_encoder -ffffffff81fdc400 t dm_dp_mst_atomic_check -ffffffff81fdc430 t set_dsc_configs_from_fairness_vars -ffffffff81fdc700 t increase_dsc_bpp -ffffffff81fdcc50 t try_disable_dsc -ffffffff81fdd000 T amdgpu_dm_plane_get_format_info -ffffffff81fdd020 T amdgpu_dm_plane_fill_blending_from_plane_state -ffffffff81fdd120 T amdgpu_dm_plane_fill_plane_buffer_attributes -ffffffff81fdd6a0 T amdgpu_dm_plane_helper_check_state -ffffffff81fdd8c0 T amdgpu_dm_plane_fill_dc_scaling_info -ffffffff81fddb20 T amdgpu_dm_plane_handle_cursor_update -ffffffff81fdddb0 T amdgpu_dm_plane_init -ffffffff81fdebb0 T is_video_format -ffffffff81fdec00 t dm_drm_plane_reset -ffffffff81fdec90 t dm_drm_plane_duplicate_state -ffffffff81fded20 t dm_drm_plane_destroy_state -ffffffff81fded60 t dm_plane_format_mod_supported -ffffffff81fdee90 t dm_plane_helper_prepare_fb -ffffffff81fdf140 t dm_plane_helper_cleanup_fb -ffffffff81fdf1e0 t dm_plane_atomic_check -ffffffff81fdf2b0 t dm_plane_atomic_async_check -ffffffff81fdf2f0 t dm_plane_atomic_async_update -ffffffff81fdf3a0 t amdgpu_bo_reserve -ffffffff81fdf5a0 t amdgpu_bo_unreserve -ffffffff81fe0000 T dm_pp_apply_display_requirements -ffffffff81fe01d0 T dm_pp_get_clock_levels_by_type -ffffffff81fe0510 T dm_pp_get_clock_levels_by_type_with_latency -ffffffff81fe06d0 T dm_pp_get_clock_levels_by_type_with_voltage -ffffffff81fe0880 T dm_pp_notify_wm_clock_changes -ffffffff81fe08d0 T dm_pp_apply_power_level_change_request -ffffffff81fe0900 T dm_pp_apply_clock_for_voltage_request -ffffffff81fe09a0 T dm_pp_get_static_clocks -ffffffff81fe0a60 T dm_pp_get_funcs -ffffffff81fe0b70 t pp_rv_set_wm_ranges -ffffffff81fe0cf0 t pp_rv_set_pme_wa_enable -ffffffff81fe0d10 t pp_rv_set_active_display_count -ffffffff81fe0d30 t pp_rv_set_min_deep_sleep_dcfclk -ffffffff81fe0d50 t pp_rv_set_hard_min_dcefclk_by_freq -ffffffff81fe0d70 t pp_rv_set_hard_min_fclk_by_freq -ffffffff81fe0d90 t pp_nv_set_display_count -ffffffff81fe0df0 t pp_nv_set_hard_min_dcefclk_by_freq -ffffffff81fe0e60 t pp_nv_set_min_deep_sleep_dcfclk -ffffffff81fe0ec0 t pp_nv_set_voltage_by_freq -ffffffff81fe0f50 t pp_nv_set_wm_ranges -ffffffff81fe0fa0 t pp_nv_set_hard_min_uclk_by_freq -ffffffff81fe1010 t pp_nv_get_maximum_sustainable_clocks -ffffffff81fe1070 t pp_nv_get_uclk_dpm_states -ffffffff81fe10d0 t pp_nv_set_pstate_handshake_support -ffffffff81fe1120 t pp_rn_set_wm_ranges -ffffffff81fe1170 t pp_rn_get_dpm_clock_table -ffffffff81fe2000 T amdgpu_dm_set_psr_caps -ffffffff81fe2150 T amdgpu_dm_link_setup_psr -ffffffff81fe22e0 T amdgpu_dm_psr_enable -ffffffff81fe23e0 T amdgpu_dm_psr_disable -ffffffff81fe2460 T amdgpu_dm_psr_disable_all -ffffffff81fe3000 T amdgpu_dm_setup_replay -ffffffff81fe30f0 T amdgpu_dm_replay_enable -ffffffff81fe3270 T amdgpu_dm_replay_disable -ffffffff81fe4000 T dm_get_elapse_time_in_ns -ffffffff81fe4030 T dm_perf_trace_timestamp -ffffffff81fe5000 T dc_assert_fp_enabled -ffffffff81fe5070 T dc_fpu_begin -ffffffff81fe50c0 T dc_fpu_end -ffffffff81fe6000 T dal_vector_construct -ffffffff81fe60d0 T dal_vector_presized_create -ffffffff81fe6340 T dal_vector_create -ffffffff81fe6460 T dal_vector_destruct -ffffffff81fe64b0 T dal_vector_destroy -ffffffff81fe6530 T dal_vector_get_count -ffffffff81fe6560 T dal_vector_at_index -ffffffff81fe65a0 T dal_vector_remove_at_index -ffffffff81fe6630 T dal_vector_set_at_index -ffffffff81fe6690 T dal_vector_insert_at -ffffffff81fe6790 T dal_vector_reserve -ffffffff81fe6840 T dal_vector_append -ffffffff81fe6940 T dal_vector_clone -ffffffff81fe69f0 T dal_vector_capacity -ffffffff81fe6a20 T dal_vector_clear -ffffffff81fe7000 T fixed_point_to_int_frac -ffffffff81fe71f0 T convert_float_matrix -ffffffff81fe72b0 T reduce_fraction -ffffffff81fe8000 T is_rgb_cspace -ffffffff81fe8080 T is_lower_pipe_tree_visible -ffffffff81fe80e0 T is_upper_pipe_tree_visible -ffffffff81fe8140 T is_pipe_tree_visible -ffffffff81fe81c0 T build_prescale_params -ffffffff81fe9000 T dc_fixpt_from_fraction -ffffffff81fe91c0 T dc_fixpt_mul -ffffffff81fe9360 T dc_fixpt_sqr -ffffffff81fe94d0 T dc_fixpt_recip -ffffffff81fe9540 T dc_fixpt_sinc -ffffffff81fe9730 T dc_fixpt_sin -ffffffff81fe9760 T dc_fixpt_cos -ffffffff81fe9850 T dc_fixpt_exp -ffffffff81fe9b30 t fixed31_32_exp_from_taylor_series -ffffffff81fe9f10 T dc_fixpt_log -ffffffff81fea120 T dc_fixpt_u4d19 -ffffffff81fea160 T dc_fixpt_u3d19 -ffffffff81fea1a0 T dc_fixpt_u2d19 -ffffffff81fea1e0 T dc_fixpt_u0d19 -ffffffff81fea210 T dc_fixpt_clamp_u0d14 -ffffffff81fea260 T dc_fixpt_clamp_u0d10 -ffffffff81fea2b0 T dc_fixpt_s4d19 -ffffffff81feb000 T bios_parser_create -ffffffff81fec270 t bios_parser_get_connectors_number -ffffffff81fec2d0 t bios_parser_get_connector_id -ffffffff81fec360 t bios_parser_get_src_obj -ffffffff81fec460 t bios_parser_get_i2c_info -ffffffff81fec680 t bios_parser_get_hpd_info -ffffffff81fec760 t bios_parser_get_device_tag -ffffffff81fec960 t bios_parser_get_spread_spectrum_info -ffffffff81fecb60 t bios_parser_get_ss_entry_number -ffffffff81fecda0 t bios_parser_get_embedded_panel_info -ffffffff81fed310 t bios_parser_get_gpio_pin_info -ffffffff81fed420 t bios_parser_get_encoder_cap_info -ffffffff81fed520 t bios_parser_set_scratch_critical_state -ffffffff81fed530 t bios_parser_is_device_id_supported -ffffffff81fed5f0 t bios_parser_encoder_control -ffffffff81fed630 t bios_parser_transmitter_control -ffffffff81fed670 t bios_parser_enable_crtc -ffffffff81fed6c0 t bios_parser_adjust_pixel_clock -ffffffff81fed700 t bios_parser_set_pixel_clock -ffffffff81fed740 t bios_parser_set_dce_clock -ffffffff81fed780 t bios_parser_enable_spread_spectrum_on_ppll -ffffffff81fed7d0 t bios_parser_program_crtc_timing -ffffffff81fed810 t bios_parser_program_display_engine_pll -ffffffff81fed850 t bios_parser_enable_disp_power_gating -ffffffff81fed890 t bios_parser_destroy -ffffffff81fed950 t bios_get_board_layout_info -ffffffff81fedbd0 t get_bios_object -ffffffff81fedda0 t get_ss_info_from_ss_info_table -ffffffff81fedf70 t get_ss_info_v3_1 -ffffffff81fee0e0 t get_ss_entry_number_from_ss_info_tbl -ffffffff81fef000 T firmware_parser_create -ffffffff81ff0e70 t bios_parser_get_connectors_number -ffffffff81ff0fe0 t bios_parser_get_connector_id -ffffffff81ff1040 t bios_parser_get_src_obj -ffffffff81ff12e0 t bios_parser_get_i2c_info -ffffffff81ff1580 t bios_parser_get_hpd_info -ffffffff81ff16f0 t bios_parser_get_device_tag -ffffffff81ff19c0 t bios_parser_get_spread_spectrum_info -ffffffff81ff1e40 t bios_parser_get_ss_entry_number -ffffffff81ff1e70 t bios_parser_get_embedded_panel_info -ffffffff81ff2070 t bios_parser_get_gpio_pin_info -ffffffff81ff2190 t bios_parser_get_encoder_cap_info -ffffffff81ff2300 t bios_parser_is_accelerated_mode -ffffffff81ff2310 t bios_parser_set_scratch_critical_state -ffffffff81ff2320 t bios_parser_is_device_id_supported -ffffffff81ff2390 t bios_parser_encoder_control -ffffffff81ff23d0 t bios_parser_transmitter_control -ffffffff81ff2410 t bios_parser_enable_crtc -ffffffff81ff2460 t bios_parser_set_pixel_clock -ffffffff81ff24a0 t bios_parser_set_dce_clock -ffffffff81ff24e0 t bios_parser_program_crtc_timing -ffffffff81ff2520 t bios_parser_enable_disp_power_gating -ffffffff81ff2560 t firmware_parser_destroy -ffffffff81ff2620 t bios_get_board_layout_info -ffffffff81ff2ac0 t bios_parser_pack_data_tables -ffffffff81ff2af0 t bios_get_atom_dc_golden_table -ffffffff81ff2c30 t bios_parser_enable_lvtma_control -ffffffff81ff2c80 t bios_parser_get_soc_bb_info -ffffffff81ff2d90 t bios_parser_get_disp_connector_caps_info -ffffffff81ff2ef0 t bios_parser_get_lttpr_caps -ffffffff81ff3040 t bios_parser_get_lttpr_interop -ffffffff81ff3180 t bios_parser_get_connector_speed_cap_info -ffffffff81ff32d0 t get_bios_object -ffffffff81ff3430 t get_bios_object_from_path_v3 -ffffffff81ff4000 T object_id_from_bios_object_id -ffffffff81ff5000 T bios_get_image -ffffffff81ff5050 T bios_is_accelerated_mode -ffffffff81ff50b0 T bios_set_scratch_acc_mode_change -ffffffff81ff50f0 T bios_set_scratch_critical_state -ffffffff81ff5130 T bios_get_vga_enabled_displays -ffffffff81ff6000 T dal_bios_parser_create -ffffffff81ff6070 T dal_bios_parser_destroy -ffffffff81ff7000 T dal_bios_parser_init_cmd_tbl -ffffffff81ff7810 t encoder_control_digx_v3 -ffffffff81ff7910 t encoder_control_digx_v4 -ffffffff81ff7a10 t encoder_control_digx_v5 -ffffffff81ff7b60 t encoder_control_dig1_v1 -ffffffff81ff7be0 t encoder_control_dig2_v1 -ffffffff81ff7c60 t encoder_control_dig_v1 -ffffffff81ff7cc0 t transmitter_control_v2 -ffffffff81ff7e60 t transmitter_control_v3 -ffffffff81ff8010 t transmitter_control_v4 -ffffffff81ff81c0 t transmitter_control_v1_5 -ffffffff81ff8330 t transmitter_control_v1_6 -ffffffff81ff8490 t set_pixel_clock_v3 -ffffffff81ff8600 t set_pixel_clock_v5 -ffffffff81ff87a0 t set_pixel_clock_v6 -ffffffff81ff8940 t set_pixel_clock_v7 -ffffffff81ff8b10 t enable_spread_spectrum_on_ppll_v1 -ffffffff81ff8c30 t enable_spread_spectrum_on_ppll_v2 -ffffffff81ff8d60 t enable_spread_spectrum_on_ppll_v3 -ffffffff81ff8e70 t adjust_display_pll_v2 -ffffffff81ff8fc0 t adjust_display_pll_v3 -ffffffff81ff9130 t dac1_encoder_control_v1 -ffffffff81ff91b0 t dac2_encoder_control_v1 -ffffffff81ff9230 t dac1_output_control_v1 -ffffffff81ff9290 t dac2_output_control_v1 -ffffffff81ff92f0 t set_crtc_using_dtd_timing_v3 -ffffffff81ff9440 t set_crtc_timing_v1 -ffffffff81ff95c0 t enable_crtc_v1 -ffffffff81ff9660 t enable_crtc_mem_req_v1 -ffffffff81ff9700 t program_clock_v5 -ffffffff81ff9810 t program_clock_v6 -ffffffff81ff9930 t external_encoder_control_v3 -ffffffff81ff9ae0 t enable_disp_power_gating_v2_1 -ffffffff81ff9bb0 t set_dce_clock_v2_1 -ffffffff81ffa000 T dal_firmware_parser_init_cmd_tbl -ffffffff81ffa3d0 t encoder_control_digx_v1_5 -ffffffff81ffa5a0 t encoder_control_fallback -ffffffff81ffa600 t transmitter_control_v1_6 -ffffffff81ffa7a0 t transmitter_control_v1_7 -ffffffff81ffa990 t transmitter_control_fallback -ffffffff81ffa9f0 t set_pixel_clock_v7 -ffffffff81ffac40 t set_pixel_clock_fallback -ffffffff81ffaca0 t set_crtc_using_dtd_timing_v3 -ffffffff81ffadf0 t enable_crtc_v1 -ffffffff81ffae90 t external_encoder_control_v3 -ffffffff81ffaec0 t enable_disp_power_gating_v2_1 -ffffffff81ffb010 t enable_disp_power_gating_fallback -ffffffff81ffb070 t set_dce_clock_v2_1 -ffffffff81ffb1a0 t get_smu_clock_info_v3_1 -ffffffff81ffb210 t enable_lvtma_control -ffffffff81ffc000 T dal_bios_parser_init_cmd_tbl_helper -ffffffff81ffc0a0 T dal_cmd_table_helper_controller_id_to_atom -ffffffff81ffc1c0 T dal_cmd_table_helper_transmitter_bp_to_atom -ffffffff81ffc240 T dal_cmd_table_helper_encoder_mode_bp_to_atom -ffffffff81ffc2d0 T dal_cmd_table_helper_assign_control_parameter -ffffffff81ffc390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src -ffffffff81ffc470 T dal_cmd_table_helper_encoder_id_to_atom -ffffffff81ffd000 T dal_bios_parser_init_cmd_tbl_helper2 -ffffffff81ffd0b0 T dal_cmd_table_helper_controller_id_to_atom2 -ffffffff81ffd1c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 -ffffffff81ffd240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 -ffffffff81ffd2d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 -ffffffff81ffd3b0 T dal_cmd_table_helper_encoder_id_to_atom2 -ffffffff81ffe000 T dal_cmd_tbl_helper_dce110_get_table +ffffffff81558cc0 T icmp6_notify_error +ffffffff815593b0 T icmp6_mtudisc_update +ffffffff81559570 T icmp6_mtudisc_clone +ffffffff81559700 T icmp6_fasttimo +ffffffff81559710 T icmp6_redirect_diag +ffffffff815597e0 T icmp6_redirect_output +ffffffff81559d00 T icmp6_ctloutput +ffffffff81559dd0 T icmp6_sysctl_icmp6stat +ffffffff81559e80 T icmp6_sysctl +ffffffff8155a000 T ip6id_pmod +ffffffff8155a0b0 T ip6id_initid +ffffffff8155a310 T ip6id_randomid +ffffffff8155a480 T ip6_randomflowlabel +ffffffff8155b000 T ip6_init +ffffffff8155b160 T ip6_ours +ffffffff8155b2a0 T ip6_hbhchcheck +ffffffff8155b4f0 T ip6intr +ffffffff8155b610 T ipv6_input +ffffffff8155b690 T ip6_input_if +ffffffff8155be80 T ipv6_check +ffffffff8155c1f0 T ip6_check_rh0hdr +ffffffff8155c350 t carp_strict_addr_chk +ffffffff8155c3d0 T ip6_hopopts_input +ffffffff8155c580 T ip6_process_hopopts +ffffffff8155c8a0 T ip6_unknown_opt +ffffffff8155c9a0 T ip6_savecontrol +ffffffff8155cdd0 T ip6_pullexthdr +ffffffff8155cf60 T ip6_get_prevhdr +ffffffff8155d0b0 T ip6_nexthdr +ffffffff8155d290 T ip6_lasthdr +ffffffff8155d320 T ip6_sysctl_ip6stat +ffffffff8155d3d0 T ip6_sysctl_soiikey +ffffffff8155d470 T ip6_sysctl +ffffffff8155d790 T ip6_send +ffffffff8155d7c0 t ip6_send_dispatch +ffffffff8155e000 T ip6_forward +ffffffff8155f000 T ip6_mrouter_set +ffffffff8155f1b0 T ip6_mrouter_init +ffffffff8155f230 T ip6_mrouter_done +ffffffff8155f460 T add_m6if +ffffffff8155f630 T del_m6if +ffffffff8155f7a0 T add_m6fc +ffffffff8155f940 T del_m6fc +ffffffff8155fac0 T ip6_mrouter_get +ffffffff8155fb10 T mrt6_ioctl +ffffffff8155fc40 T get_sg6_cnt +ffffffff8155fd70 T get_mif6_cnt +ffffffff8155fe00 T mf6c_find +ffffffff8155fee0 T mrt6_iflookupbymif +ffffffff8155ff40 T mrt6_sysctl_mif +ffffffff815600d0 T mrt6_rtwalk_mf6csysctl +ffffffff815602b0 T mrt6_sysctl_mfc +ffffffff815603f0 T mrouter6_rtwalk_delete +ffffffff81560430 T mrt6_mcast_del +ffffffff815604c0 T ip6_mrouter_detach +ffffffff81560590 T mf6c_add_route +ffffffff815606a0 T mrt6_mcast_add +ffffffff815607e0 T mf6c_update +ffffffff81560b40 T mf6c_add +ffffffff81560c90 T socket6_send +ffffffff81560d50 T ip6_mforward +ffffffff81561120 T ip6_mdq +ffffffff81561350 T mf6c_expire_route +ffffffff81561420 T phyint_send6 +ffffffff81562000 T ip6_output +ffffffff815630b0 T ip6_copyexthdr +ffffffff81563170 T ip6_output_ipsec_lookup +ffffffff81563290 T ip6_splithdr +ffffffff815633a0 T ip6_insert_jumboopt +ffffffff81563520 T ip6_output_ipsec_send +ffffffff815638f0 T in6_proto_cksum_out +ffffffff81563de0 T ip6_mloopback +ffffffff81563f20 T ip6_getpmtu +ffffffff81563fa0 T ip6_fragment +ffffffff81564310 T ip6_randomid +ffffffff81564330 T ip6_insertfraghdr +ffffffff81564410 T ip6_ctloutput +ffffffff81565060 T ip6_pcbopt +ffffffff81565120 T ip6_setmoptions +ffffffff81565740 T ip6_getpcbopt +ffffffff81565930 T ip6_getmoptions +ffffffff815659d0 T ip6_raw_ctloutput +ffffffff81565aa0 T ip6_initpktopts +ffffffff81565af0 T ip6_setpktopt +ffffffff81565f90 T ip6_clearpktopts +ffffffff81566130 T copypktopts +ffffffff815662f0 T ip6_freepcbopts +ffffffff81566340 T ip6_freemoptions +ffffffff815663e0 T ip6_setpktopts +ffffffff81566530 T ip6_randomid_init +ffffffff81566550 T in6_delayed_cksum +ffffffff81566640 T ip6_output_ipsec_pmtu_update +ffffffff81567000 T route6_input +ffffffff81568000 T mld6_init +ffffffff81568070 T mld6_start_listening +ffffffff81568130 t mld6_sendpkt +ffffffff81568390 T mld6_stop_listening +ffffffff81568440 T mld6_input +ffffffff815687a0 T mld6_fasttimeo +ffffffff815688b0 T mld6_checktimer +ffffffff81569000 T nd6_init +ffffffff815690a0 T nd6_expire +ffffffff81569200 T nd6_timer +ffffffff815692c0 T nd6_slowtimo +ffffffff81569380 T nd6_expire_timer +ffffffff815693b0 T nd6_ifattach +ffffffff81569430 T nd6_ifdetach +ffffffff81569460 T nd6_options +ffffffff81569660 T nd6_llinfo_settimer +ffffffff81569750 T nd6_llinfo_timer +ffffffff81569970 T nd6_free +ffffffff81569ad0 T nd6_expire_timer_update +ffffffff81569b80 T nd6_purge +ffffffff81569c30 T nd6_lookup +ffffffff81569e70 T nd6_is_addr_neighbor +ffffffff81569fe0 T nd6_invalidate +ffffffff8156a040 T nd6_nud_hint +ffffffff8156a130 T nd6_rtrequest +ffffffff8156a730 T nd6_need_cache +ffffffff8156a780 T nd6_ioctl +ffffffff8156a9b0 T nd6_cache_lladdr +ffffffff8156adb0 T nd6_resolve +ffffffff8156c000 T nd6_ns_input +ffffffff8156c870 T nd6_isneighbor +ffffffff8156c930 T nd6_dad_ns_input +ffffffff8156c9e0 T nd6_na_output +ffffffff8156ce70 T nd6_ns_output +ffffffff8156d380 T nd6_ifptomac +ffffffff8156d3e0 T nd6_na_input +ffffffff8156dce0 T nd6_dad_find +ffffffff8156dd20 T nd6_dad_duplicated +ffffffff8156de90 T nd6_dad_destroy +ffffffff8156df20 T nd6_dad_starttimer +ffffffff8156df60 T nd6_dad_timer +ffffffff8156e2a0 T nd6_dad_stoptimer +ffffffff8156e2c0 T nd6_dad_start +ffffffff8156e520 T nd6_dad_ns_output +ffffffff8156e580 T nd6_dad_stop +ffffffff8156f000 T nd6_rtr_cache +ffffffff8156f440 T rt6_flush +ffffffff8156f5f0 T rt6_deleteroute +ffffffff81570000 T rip6_attach +ffffffff81570180 T rip6_detach +ffffffff81570230 T rip6_lock +ffffffff81570290 T rip6_unlock +ffffffff815702f0 T rip6_locked +ffffffff81570360 T rip6_bind +ffffffff81570410 T rip6_connect +ffffffff815704e0 T rip6_disconnect +ffffffff81570570 T rip6_shutdown +ffffffff815705b0 T rip6_send +ffffffff815706d0 T rip6_init +ffffffff81570720 T rip6_input +ffffffff81570d90 T rip6_ctlinput +ffffffff81570ef0 T rip6_output +ffffffff81571280 T rip6_ctloutput +ffffffff81571330 T rip6_sysctl_rip6stat +ffffffff815713b0 T rip6_sysctl +ffffffff81572000 T udp6_output +ffffffff81573000 T pfdatatopacket +ffffffff81573060 T pfkeyv2_attach +ffffffff815731f0 T pfkeyv2_detach +ffffffff81573380 T pfkeyv2_disconnect +ffffffff815733c0 T pfkeyv2_shutdown +ffffffff81573400 T pfkeyv2_send +ffffffff81573490 T pfkeyv2_sockaddr +ffffffff815734c0 T pfkeyv2_peeraddr +ffffffff81573510 T pfkeyv2_sysctl +ffffffff81573690 T pfkey_init +ffffffff81573790 T keycb_ref +ffffffff815737b0 T keycb_unref +ffffffff815737d0 T pfkeyv2_output +ffffffff81573890 T pfkeyv2_dosend +ffffffff81575680 T pfkey_sendup +ffffffff81575740 T pfkeyv2_sendmessage +ffffffff81575d90 T pfkeyv2_policy +ffffffff81576030 T pfkeyv2_get +ffffffff815765e0 T pfkeyv2_dump_walker +ffffffff815766f0 T pfkeyv2_sa_flush +ffffffff81576740 T pfkeyv2_get_proto_alg +ffffffff81576800 T pfkeyv2_policy_flush +ffffffff81576840 T pfkeyv2_acquire +ffffffff81576dd0 T pfkeyv2_expire +ffffffff81577050 T pfkeyv2_sysctl_walker +ffffffff81577250 T pfkeyv2_dump_policy +ffffffff81577410 T pfkeyv2_sysctl_policydumper +ffffffff81578000 T pfkeyv2_parsemessage +ffffffff81579000 T import_sa +ffffffff81579110 T export_sa +ffffffff81579230 T import_lifetime +ffffffff81579410 T export_lifetime +ffffffff815795b0 T import_flow +ffffffff815798c0 T export_flow +ffffffff81579b30 T import_address +ffffffff81579bb0 T export_address +ffffffff81579c30 T import_identities +ffffffff81579d40 t import_identity +ffffffff81579e10 T export_identities +ffffffff81579f20 T import_key +ffffffff81579f70 T export_key +ffffffff8157a050 T import_udpencap +ffffffff8157a090 T export_udpencap +ffffffff8157a0e0 T export_replay +ffffffff8157a120 T export_mtu +ffffffff8157a160 T import_rdomain +ffffffff8157a1a0 T export_rdomain +ffffffff8157a1f0 T import_tag +ffffffff8157a240 T export_tag +ffffffff8157a2c0 T import_tap +ffffffff8157a300 T export_tap +ffffffff8157a340 T import_iface +ffffffff8157a390 T export_iface +ffffffff8157a3e0 T export_satype +ffffffff8157a420 T export_counter +ffffffff8157b000 T x86emu_exec +ffffffff815864c0 T x86emu_exec_call +ffffffff81586550 T x86emu_exec_intr +ffffffff81586640 T x86emu_halt_sys +ffffffff81586660 t x86emu_intr_dispatch +ffffffff81586790 t common_binop_byte_rm_r +ffffffff81586920 t add_byte +ffffffff815869f0 t common_binop_word_long_rm_r +ffffffff81586cd0 t add_word +ffffffff81586db0 t add_long +ffffffff81586ea0 t common_binop_byte_r_rm +ffffffff81587000 t common_binop_word_long_r_rm +ffffffff81587280 t or_byte +ffffffff81587300 t or_word +ffffffff81587380 t or_long +ffffffff81587400 t adc_byte +ffffffff815874f0 t adc_word +ffffffff815875e0 t adc_long +ffffffff815876f0 t sbb_byte +ffffffff815877b0 t sbb_word +ffffffff81587880 t sbb_long +ffffffff81587950 t and_byte +ffffffff815879d0 t and_word +ffffffff81587a50 t and_long +ffffffff81587ad0 t sub_byte +ffffffff81587b80 t sub_word +ffffffff81587c40 t sub_long +ffffffff81587cf0 t xor_byte +ffffffff81587d70 t xor_word +ffffffff81587e00 t xor_long +ffffffff81587e90 t common_binop_ns_byte_rm_r +ffffffff81587fd0 t cmp_byte_no_return +ffffffff81588090 t common_binop_ns_word_long_rm_r +ffffffff815882e0 t cmp_word_no_return +ffffffff815883a0 t cmp_long_no_return +ffffffff81588450 t common_inc_word_long +ffffffff815885c0 t common_dec_word_long +ffffffff81588720 t common_imul_imm +ffffffff81588aa0 t ins +ffffffff81588d30 t outs +ffffffff81588fc0 t test_byte +ffffffff81589040 t test_word +ffffffff815890c0 t test_long +ffffffff81589140 t common_load_far_pointer +ffffffff81589260 t decode_rl_address +ffffffff81589630 t fetch_data_byte +ffffffff815896e0 t store_data_byte +ffffffff81589790 t fetch_data_long +ffffffff81589840 t store_data_long +ffffffff815898f0 t fetch_data_word +ffffffff815899a0 t store_data_word +ffffffff81589a50 t common_set_byte +ffffffff81589b60 t common_bitstring +ffffffff8158a140 t decode_and_fetch_long_disp +ffffffff8158a220 t decode_and_fetch_word_disp +ffffffff8158a300 t common_shift +ffffffff8158aa40 t decode_and_fetch_long_imm8 +ffffffff8158ab60 t decode_and_fetch_word_imm8 +ffffffff8158ac80 t common_bitsearch +ffffffff8158ae50 t cmp_byte +ffffffff8158af10 t cmp_word +ffffffff8158afd0 t cmp_long +ffffffff8158b080 t decode_and_fetch_byte_imm8 +ffffffff8158b1a0 t rol_byte +ffffffff8158b240 t ror_byte +ffffffff8158b2f0 t rcl_byte +ffffffff8158b3c0 t rcr_byte +ffffffff8158b4a0 t shl_byte +ffffffff8158b5a0 t shr_byte +ffffffff8158b690 t sar_byte +ffffffff8158b750 t rol_long +ffffffff8158b7f0 t ror_long +ffffffff8158b890 t rcl_long +ffffffff8158b960 t rcr_long +ffffffff8158ba50 t shl_long +ffffffff8158bb50 t shr_long +ffffffff8158bc20 t sar_long +ffffffff8158bcf0 t rol_word +ffffffff8158bd90 t ror_word +ffffffff8158be40 t rcl_word +ffffffff8158bf10 t rcr_word +ffffffff8158c000 t shl_word +ffffffff8158c100 t shr_word +ffffffff8158c1e0 t sar_word +ffffffff8158d000 T x86emu_init_default +ffffffff8158d0e0 t rdb +ffffffff8158d140 t rdw +ffffffff8158d1a0 t rdl +ffffffff8158d200 t wrb +ffffffff8158d260 t wrw +ffffffff8158d2c0 t wrl +ffffffff8158e000 T getsn +ffffffff8158f000 T random +ffffffff81590000 W __explicit_bzero_hook +ffffffff81590030 T explicit_bzero +ffffffff81591000 T timingsafe_bcmp +ffffffff81592000 T index +ffffffff81592000 T strchr +ffffffff81593000 T rindex +ffffffff81593000 T strrchr +ffffffff81594000 T imax +ffffffff81595000 T imin +ffffffff81596000 T lmax +ffffffff81597000 T lmin +ffffffff81598000 T max +ffffffff81599000 T min +ffffffff8159a000 T ulmax +ffffffff8159b000 T ulmin +ffffffff8159c000 T memchr +ffffffff8159d000 T memcmp +ffffffff8159e000 T bcmp +ffffffff8159f000 T bzero +ffffffff815a0000 T bcopy +ffffffff815a0010 T memmove +ffffffff815a0040 T memcpy +ffffffff815a1000 T ffs +ffffffff815a2000 T fls +ffffffff815a3000 T flsl +ffffffff815a4000 T memset +ffffffff815a5000 T strcmp +ffffffff815a6000 T strlcat +ffffffff815a7000 T strlcpy +ffffffff815a8000 T strlen +ffffffff815a9000 T strncmp +ffffffff815aa000 T strncpy +ffffffff815ab000 T strnlen +ffffffff815ac000 T strnstr +ffffffff815ad000 T scanc +ffffffff815ae000 T skpc +ffffffff815af000 T strncasecmp +ffffffff815b0000 T adler32_z +ffffffff815b04a0 T adler32 +ffffffff815b04c0 T adler32_combine +ffffffff815b05e0 T adler32_combine64 +ffffffff815b1000 T get_crc_table +ffffffff815b1030 T crc32_z +ffffffff815b1a20 T crc32 +ffffffff815b1a40 T crc32_combine64 +ffffffff815b1b50 T crc32_combine +ffffffff815b1c60 T crc32_combine_gen64 +ffffffff815b1d20 T crc32_combine_gen +ffffffff815b1de0 T crc32_combine_op +ffffffff815b2000 T inflateBackInit_ +ffffffff815b2140 T inflateBack +ffffffff815b3600 T inflateBackEnd +ffffffff815b4000 T inflate_fast +ffffffff815b5000 T inflateResetKeep +ffffffff815b5100 T inflateReset +ffffffff815b5250 T inflateReset2 +ffffffff815b5370 T inflateInit2_ +ffffffff815b5580 T inflateInit_ +ffffffff815b55a0 T inflatePrime +ffffffff815b5650 T inflate +ffffffff815b8050 t updatewindow +ffffffff815b81a0 T inflateEnd +ffffffff815b8250 T inflateGetDictionary +ffffffff815b8310 T inflateSetDictionary +ffffffff815b8420 T inflateGetHeader +ffffffff815b8490 T inflateSync +ffffffff815b8730 T inflateSyncPoint +ffffffff815b87a0 T inflateCopy +ffffffff815b8960 T inflateUndermine +ffffffff815b89d0 T inflateValidate +ffffffff815b8a50 T inflateMark +ffffffff815b8ae0 T inflateCodesUsed +ffffffff815b9000 T inflate_table +ffffffff815ba000 T deflateInit_ +ffffffff815ba060 T deflateInit2_ +ffffffff815ba370 T deflateEnd +ffffffff815ba4c0 T deflateReset +ffffffff815ba5e0 T deflateSetDictionary +ffffffff815ba880 t fill_window +ffffffff815bacb0 T deflateGetDictionary +ffffffff815bad90 T deflateResetKeep +ffffffff815baed0 T deflateSetHeader +ffffffff815baf60 T deflatePending +ffffffff815bb010 T deflatePrime +ffffffff815bb150 T deflateParams +ffffffff815bb360 T deflate +ffffffff815bc1a0 t slide_hash +ffffffff815bc340 T deflateTune +ffffffff815bc3f0 T deflateBound +ffffffff815bc5c0 t flush_pending +ffffffff815bc650 t deflate_stored +ffffffff815bccc0 t deflate_huff +ffffffff815bd020 t deflate_rle +ffffffff815bd5a0 T deflateCopy +ffffffff815bd820 t deflate_fast +ffffffff815bde30 t deflate_slow +ffffffff815be620 t longest_match +ffffffff815bf000 T zlibVersion +ffffffff815bf030 T zlibCompileFlags +ffffffff815bf060 T zError +ffffffff815c0000 T zcalloc +ffffffff815c0020 T zcfree +ffffffff815c1000 T _tr_init +ffffffff815c1070 t init_block +ffffffff815c12b0 T _tr_stored_block +ffffffff815c1450 T _tr_flush_bits +ffffffff815c1500 T _tr_align +ffffffff815c1670 T _tr_flush_block +ffffffff815c1fb0 t build_tree +ffffffff815c2940 t compress_block +ffffffff815c2dc0 T _tr_tally +ffffffff815c2eb0 t send_tree +ffffffff815c4000 T compress2 +ffffffff815c4180 T compress +ffffffff815c41a0 T compressBound +ffffffff815c5000 T unmap_startup +ffffffff815c5070 T cpu_configure +ffffffff815c51d0 T device_register +ffffffff815c5200 T diskconf +ffffffff815c6000 T iskmemdev +ffffffff815c6050 T iszerodev +ffffffff815c60a0 T getnulldev +ffffffff815c60e0 T dev_rawpart +ffffffff815c7000 T readdisklabel +ffffffff815c7160 T writedisklabel +ffffffff815c8000 T gdt_init_cpu +ffffffff815c9000 T cpu_startup +ffffffff815c9180 T enter_shared_special_pages +ffffffff815c9290 T x86_64_proc0_tss_ldt_init +ffffffff815c9300 T bios_getdiskinfo +ffffffff815c9380 T bios_sysctl +ffffffff815c94f0 T cpu_sysctl +ffffffff815c9780 T sendsig +ffffffff815c9c20 t initialize_thread_xstate +ffffffff815c9cf0 T sys_sigreturn +ffffffff815c9fb0 t maybe_enable_user_cet +ffffffff815ca000 T cpu_kick +ffffffff815ca060 T signotify +ffffffff815ca0d0 T cpu_unidle +ffffffff815ca130 T boot +ffffffff815ca310 T dumpsys +ffffffff815caa40 T cpu_reset +ffffffff815caac0 T cpu_dump +ffffffff815cac90 T dumpconf +ffffffff815caeb0 T cpu_dumpsize +ffffffff815caef0 T cpu_dump_mempagecnt +ffffffff815cafd0 T reset_segs +ffffffff815cb030 T setregs +ffffffff815cb1b0 T setgate +ffffffff815cb240 T unsetgate +ffffffff815cb280 T setregion +ffffffff815cb2b0 T set_mem_segment +ffffffff815cb370 T set_sys_segment +ffffffff815cb410 T cpu_init_idt +ffffffff815cb460 T cpu_init_extents +ffffffff815cb520 T map_tramps +ffffffff815cb670 T cpu_set_vendor +ffffffff815cb740 T init_x86_64 +ffffffff815cc2b0 T getbootinfo +ffffffff815cc520 T amd64_pa_used +ffffffff815cc5a0 T cpu_initclocks +ffffffff815cc5c0 T cpu_startclock +ffffffff815cc5e0 T need_resched +ffffffff815cc660 T idt_vec_alloc +ffffffff815cc6b0 T idt_vec_alloc_range +ffffffff815cc810 T idt_vec_set +ffffffff815cc8b0 T idt_vec_free +ffffffff815cc900 T splassert_check +ffffffff815cc990 T copyin32 +ffffffff815cc9e0 T check_context +ffffffff815cca50 T delay_init +ffffffff815cca90 T delay_fini +ffffffff815cd000 T get_hibernate_io_function +ffffffff815cd150 T get_hibernate_info_md +ffffffff815cd350 T hibernate_enter_resume_mapping +ffffffff815cd470 T hibernate_enter_resume_2m_pde +ffffffff815cd530 T hibernate_enter_resume_4k_pte +ffffffff815cd5b0 T hibernate_populate_resume_pt +ffffffff815cdac0 T hibernate_inflate_skip +ffffffff815cdb20 T hibernate_enable_intr_machdep +ffffffff815cdb50 T hibernate_disable_intr_machdep +ffffffff815cdb80 T hibernate_quiesce_cpus +ffffffff815ce000 T cpu_amd64speed +ffffffff815ce030 T intelcore_update_sensor +ffffffff815ce100 T cpu_hz_update_sensor +ffffffff815ce210 T via_nano_setup +ffffffff815ce400 T via_update_sensor +ffffffff815ce450 T cpu_freq_ctr +ffffffff815ce550 T cpu_freq +ffffffff815ce5d0 T identifycpu +ffffffff815cf800 T cpu_topology +ffffffff815cfa20 T cpu_check_vmm_cap +ffffffff815d0000 t rdtsc_lfence +ffffffff815d0040 T tsc_get_timecount_lfence +ffffffff815d0070 T tsc_freq_cpuid +ffffffff815d0190 T tsc_freq_msr +ffffffff815d0270 T tsc_identify +ffffffff815d04c0 t rdtscp +ffffffff815d04f0 T tsc_get_timecount_rdtscp +ffffffff815d0520 T tsc_delay +ffffffff815d05b0 T measure_tsc_freq +ffffffff815d09f0 T calibrate_tsc_freq +ffffffff815d0a60 T cpu_recalibrate_tsc +ffffffff815d0af0 T tsc_timecounter_init +ffffffff815d0bd0 T tsc_test_sync_bp +ffffffff815d0f50 T tsc_adjust_reset +ffffffff815d0fa0 T tsc_test_bp +ffffffff815d1030 T tsc_report_test_results +ffffffff815d1080 T tsc_test_sync_ap +ffffffff815d1220 T tsc_test_ap +ffffffff815d2000 T viac3_crypto_setup +ffffffff815d2120 T viac3_crypto_newsession +ffffffff815d2670 T viac3_crypto_freesession +ffffffff815d2770 T viac3_crypto_process +ffffffff815d28d0 T viac3_crypto_swauth +ffffffff815d28f0 T viac3_crypto_encdec +ffffffff815d2bd0 T viac3_rnd +ffffffff815d3000 T lgdt +ffffffff815d3040 T setjmp +ffffffff815d3090 T longjmp +ffffffff815d30e0 T cpu_switchto +ffffffff815d316c t switch_exited +ffffffff815d31aa t restore_saved +ffffffff815d328e t switch_restored +ffffffff815d32d0 T retpoline_rax +ffffffff815d32f0 T __x86_indirect_thunk_r11 +ffffffff815d3310 T cpu_idle_cycle_hlt +ffffffff815d3340 T savectx +ffffffff815d3400 T proc_trampoline +ffffffff815d34e0 T intr_fast_exit +ffffffff815d3570 T xrstor_kern +ffffffff815d35a0 T xrstor_user +ffffffff815d35b8 T xrstor_fault +ffffffff815d35e0 T xrstor_resume +ffffffff815d3600 T fpusave +ffffffff815d3640 T fpusavereset +ffffffff815d3680 T xsetbv_user +ffffffff815d369a T xsetbv_fault +ffffffff815d36c0 T xsetbv_resume +ffffffff815d36e0 T pagezero +ffffffff815d3730 T pku_xonly +ffffffff815d3760 T rdmsr_safe +ffffffff815d3771 T rdmsr_safe_fault +ffffffff815d37a0 T rdmsr_resume +ffffffff815d37c0 T hv_hypercall_trampoline +ffffffff815d4000 T hv_hypercall_page +ffffffff815d5000 T xen_hypercall_page +ffffffff815d6000 t _key_expansion_128 +ffffffff815d6000 t _key_expansion_256a +ffffffff815d6040 t _key_expansion_192a +ffffffff815d60b0 t _key_expansion_192b +ffffffff815d6110 t _key_expansion_256b +ffffffff815d6150 T aesni_set_key +ffffffff815d6340 T aesni_enc +ffffffff815d6380 t _aesni_enc1 +ffffffff815d6450 t _aesni_enc4 +ffffffff815d6600 T aesni_dec +ffffffff815d6640 t _aesni_dec1 +ffffffff815d6710 t _aesni_dec4 +ffffffff815d68c0 T aesni_cbc_enc +ffffffff815d6920 T aesni_cbc_dec +ffffffff815d6a00 t _aesni_inc_init +ffffffff815d6a50 t _aesni_inc +ffffffff815d6aa0 T aesni_ctr_enc +ffffffff815d6b90 t _aesni_gmac_gfmul +ffffffff815d6ca0 T aesni_gmac_update +ffffffff815d6d20 T aesni_gmac_final +ffffffff815d6d60 T aesni_xts_enc +ffffffff815d6dd0 T aesni_xts_dec +ffffffff815d6e40 t _aesni_xts_tweak +ffffffff815d6e90 t _aesni_xts_tweak_exp +ffffffff815d7000 T aesni_setup +ffffffff815d7190 T aesni_newsession +ffffffff815d7740 T aesni_freesession +ffffffff815d7820 T aesni_process +ffffffff815d7a70 T aesni_free +ffffffff815d7bb0 T aesni_free_smr +ffffffff815d7bc0 T aesni_get +ffffffff815d7c60 T aesni_swauth +ffffffff815d7c80 T aesni_encdec +ffffffff815d8270 T pclmul_setup +ffffffff815d82a0 T ghash_update_pclmul +ffffffff815d9000 T amd64_errata_testmsr +ffffffff815d9050 T amd64_errata_setmsr +ffffffff815d90c0 T amd64_errata +ffffffff815da000 T cpu_ucode_setup +ffffffff815da090 T cpu_ucode_apply +ffffffff815da0e0 T cpu_ucode_intel_apply +ffffffff815da1f0 T cpu_ucode_amd_apply +ffffffff815da3c0 T cpu_ucode_intel_rev +ffffffff815da410 T cpu_ucode_intel_find +ffffffff815da5b0 T cpu_ucode_intel_verify +ffffffff815da630 T cpu_ucode_intel_match +ffffffff815db000 T mmopen +ffffffff815db0c0 T mmclose +ffffffff815db110 T mmrw +ffffffff815db350 T mmmmap +ffffffff815db440 T mmioctl +ffffffff815db4b0 T mem_ioctl +ffffffff815db680 T mem_range_attr_get +ffffffff815db6f0 T mem_range_attr_set +ffffffff815dc000 T mrinit +ffffffff815dc510 T mrset +ffffffff815dc6c0 T mrinit_cpu +ffffffff815dc6d0 T mrreload_cpu +ffffffff815dc710 T mtrr2mrt +ffffffff815dc750 T mtrrconflict +ffffffff815dc7b0 T mem_range_match +ffffffff815dc810 T mrfetch +ffffffff815dcc10 T mtrrtype +ffffffff815dccf0 T mrt2mtrr +ffffffff815dcdd0 T mrstore +ffffffff815dce30 T mrstoreone +ffffffff815dd490 T mtrrfixsearch +ffffffff815dd510 T mrsetlow +ffffffff815dd690 T mrsetvariable +ffffffff815de000 T mem_range_attach +ffffffff815df000 T pmap_map_ptes +ffffffff815df0e0 T pmap_unmap_ptes +ffffffff815df130 T pmap_find_pte_direct +ffffffff815df220 T pmap_kenter_pa +ffffffff815df330 T pmap_tlb_shootpage +ffffffff815df550 T pmap_tlb_shootwait +ffffffff815df590 T pmap_kremove +ffffffff815df670 T pmap_tlb_shootrange +ffffffff815df900 T pmap_set_pml4_early +ffffffff815dfab0 T pmap_clear_pml4_early +ffffffff815dfb20 T pmap_bootstrap +ffffffff815e0160 T pmap_init_percpu +ffffffff815e0180 T pmap_randomize +ffffffff815e03b0 T pmap_extract +ffffffff815e0560 T pmap_randomize_level +ffffffff815e07c0 T pmap_prealloc_lowmem_ptps +ffffffff815e08c0 T pmap_init +ffffffff815e08f0 T pmap_enter_pv +ffffffff815e0950 T pmap_remove_pv +ffffffff815e09f0 T pmap_find_ptp +ffffffff815e0a80 T pmap_freepage +ffffffff815e0b40 T pmap_free_ptp +ffffffff815e0d40 T pmap_get_ptp +ffffffff815e1080 T pmap_pdp_ctor +ffffffff815e12d0 T pmap_pdp_ctor_intel +ffffffff815e12f0 T pmap_create +ffffffff815e15d0 T pmap_destroy +ffffffff815e17a0 T pmap_reference +ffffffff815e17d0 T pmap_activate +ffffffff815e18a0 T pmap_deactivate +ffffffff815e1920 T pmap_pdes_valid +ffffffff815e19a0 T pmap_zero_page +ffffffff815e19d0 T pmap_flush_cache +ffffffff815e1a50 T pmap_copy_page +ffffffff815e1a80 T pmap_remove_ptes +ffffffff815e1c70 T pmap_remove_pte +ffffffff815e1e00 T pmap_remove +ffffffff815e1ed0 T pmap_remove_ept +ffffffff815e1f70 T pmap_do_remove +ffffffff815e2510 T pmap_tlb_shoottlb +ffffffff815e26f0 T pmap_page_remove +ffffffff815e2af0 T pmap_test_attrs +ffffffff815e2c80 T pmap_clear_attrs +ffffffff815e2e70 T pmap_write_protect +ffffffff815e3170 T pmap_unwire +ffffffff815e32c0 T pmap_enter_special +ffffffff815e38a0 T pmap_do_remove_ept +ffffffff815e3a80 T pmap_enter_ept +ffffffff815e3d10 T pmap_enter +ffffffff815e4570 T pmap_get_physpage +ffffffff815e4660 T pmap_steal_memory +ffffffff815e4980 T pmap_alloc_level +ffffffff815e4ba0 T pmap_growkernel +ffffffff815e4d60 T pmap_convert +ffffffff815e5000 T process_read_regs +ffffffff815e5120 T process_read_fpregs +ffffffff815e5170 T process_write_regs +ffffffff815e52b0 T process_write_fpregs +ffffffff815e5320 T process_sstep +ffffffff815e5380 T process_set_pc +ffffffff815e6000 T amd64_iopl +ffffffff815e60b0 T sys_sysarch +ffffffff815e7000 T upageflttrap +ffffffff815e7150 T kpageflttrap +ffffffff815e7350 t fault +ffffffff815e7400 T kerntrap +ffffffff815e7520 t trap_print +ffffffff815e7620 T usertrap +ffffffff815e7850 T ast +ffffffff815e7930 T syscall +ffffffff815e7f80 T child_return +ffffffff815e9000 T cpu_fork +ffffffff815e91b0 T setguardpage +ffffffff815e91f0 T cpu_exit +ffffffff815e9220 T vmapbuf +ffffffff815e9350 T vunmapbuf +ffffffff815e9420 T tcb_get +ffffffff815e9460 T tcb_set +ffffffff815ea000 T fpuinit +ffffffff815ea080 T fputrap +ffffffff815ea1a0 T fpu_kernel_enter +ffffffff815ea200 T fpu_kernel_exit +ffffffff815eb000 T softintr_init +ffffffff815eb0c0 T softintr_dispatch +ffffffff815eb1d0 T softintr_establish +ffffffff815eb280 T softintr_disestablish +ffffffff815ec000 t i8259_hwmask +ffffffff815ec060 t i8259_hwunmask +ffffffff815ec0c0 t i8259_setup +ffffffff815ec250 T i8259_default_setup +ffffffff815ed000 T amd64_print_l1_cacheinfo +ffffffff815ed180 T amd64_print_l2_cacheinfo +ffffffff815ed340 T intel_print_cacheinfo +ffffffff815ed580 T x86_print_cacheinfo +ffffffff815ee000 T Xcalltrap_specstk_untramp +ffffffff815ee050 T Xrecurse_lapic_ipi +ffffffff815ee0d0 T Xintr_lapic_ipi_untramp +ffffffff815ee210 T Xresume_lapic_ipi +ffffffff815ee260 T Xrecurse_lapic_ltimer +ffffffff815ee2e0 T Xintr_lapic_ltimer_untramp +ffffffff815ee420 T Xresume_lapic_ltimer +ffffffff815ee470 T Xrecurse_xen_upcall +ffffffff815ee4f0 T Xintr_xen_upcall_untramp +ffffffff815ee630 T Xresume_xen_upcall +ffffffff815ee680 T Xrecurse_hyperv_upcall +ffffffff815ee700 T Xintr_hyperv_upcall_untramp +ffffffff815ee840 T Xresume_hyperv_upcall +ffffffff815ee890 T Xrecurse_legacy0 +ffffffff815ee910 T Xresume_legacy0 +ffffffff815ee940 T Xintr_legacy0_untramp +ffffffff815eeb70 T Xrecurse_legacy1 +ffffffff815eebf0 T Xresume_legacy1 +ffffffff815eec20 T Xintr_legacy1_untramp +ffffffff815eee50 T Xrecurse_legacy2 +ffffffff815eeed0 T Xresume_legacy2 +ffffffff815eef00 T Xintr_legacy2_untramp +ffffffff815ef130 T Xrecurse_legacy3 +ffffffff815ef1b0 T Xresume_legacy3 +ffffffff815ef1e0 T Xintr_legacy3_untramp +ffffffff815ef410 T Xrecurse_legacy4 +ffffffff815ef490 T Xresume_legacy4 +ffffffff815ef4c0 T Xintr_legacy4_untramp +ffffffff815ef6f0 T Xrecurse_legacy5 +ffffffff815ef770 T Xresume_legacy5 +ffffffff815ef7a0 T Xintr_legacy5_untramp +ffffffff815ef9d0 T Xrecurse_legacy6 +ffffffff815efa50 T Xresume_legacy6 +ffffffff815efa80 T Xintr_legacy6_untramp +ffffffff815efcb0 T Xrecurse_legacy7 +ffffffff815efd30 T Xresume_legacy7 +ffffffff815efd60 T Xintr_legacy7_untramp +ffffffff815eff90 T Xrecurse_legacy8 +ffffffff815f0010 T Xresume_legacy8 +ffffffff815f0040 T Xintr_legacy8_untramp +ffffffff815f0270 T Xrecurse_legacy9 +ffffffff815f02f0 T Xresume_legacy9 +ffffffff815f0320 T Xintr_legacy9_untramp +ffffffff815f0550 T Xrecurse_legacy10 +ffffffff815f05d0 T Xresume_legacy10 +ffffffff815f0600 T Xintr_legacy10_untramp +ffffffff815f0830 T Xrecurse_legacy11 +ffffffff815f08b0 T Xresume_legacy11 +ffffffff815f08e0 T Xintr_legacy11_untramp +ffffffff815f0b10 T Xrecurse_legacy12 +ffffffff815f0b90 T Xresume_legacy12 +ffffffff815f0bc0 T Xintr_legacy12_untramp +ffffffff815f0df0 T Xrecurse_legacy13 +ffffffff815f0e70 T Xresume_legacy13 +ffffffff815f0ea0 T Xintr_legacy13_untramp +ffffffff815f10d0 T Xrecurse_legacy14 +ffffffff815f1150 T Xresume_legacy14 +ffffffff815f1180 T Xintr_legacy14_untramp +ffffffff815f13b0 T Xrecurse_legacy15 +ffffffff815f1430 T Xresume_legacy15 +ffffffff815f1460 T Xintr_legacy15_untramp +ffffffff815f1690 T Xrecurse_ioapic_edge0 +ffffffff815f1710 T Xresume_ioapic_edge0 +ffffffff815f1740 T Xintr_ioapic_edge0_untramp +ffffffff815f1960 T Xrecurse_ioapic_edge1 +ffffffff815f19e0 T Xresume_ioapic_edge1 +ffffffff815f1a10 T Xintr_ioapic_edge1_untramp +ffffffff815f1c30 T Xrecurse_ioapic_edge2 +ffffffff815f1cb0 T Xresume_ioapic_edge2 +ffffffff815f1ce0 T Xintr_ioapic_edge2_untramp +ffffffff815f1f00 T Xrecurse_ioapic_edge3 +ffffffff815f1f80 T Xresume_ioapic_edge3 +ffffffff815f1fb0 T Xintr_ioapic_edge3_untramp +ffffffff815f21d0 T Xrecurse_ioapic_edge4 +ffffffff815f2250 T Xresume_ioapic_edge4 +ffffffff815f2280 T Xintr_ioapic_edge4_untramp +ffffffff815f24a0 T Xrecurse_ioapic_edge5 +ffffffff815f2520 T Xresume_ioapic_edge5 +ffffffff815f2550 T Xintr_ioapic_edge5_untramp +ffffffff815f2770 T Xrecurse_ioapic_edge6 +ffffffff815f27f0 T Xresume_ioapic_edge6 +ffffffff815f2820 T Xintr_ioapic_edge6_untramp +ffffffff815f2a40 T Xrecurse_ioapic_edge7 +ffffffff815f2ac0 T Xresume_ioapic_edge7 +ffffffff815f2af0 T Xintr_ioapic_edge7_untramp +ffffffff815f2d10 T Xrecurse_ioapic_edge8 +ffffffff815f2d90 T Xresume_ioapic_edge8 +ffffffff815f2dc0 T Xintr_ioapic_edge8_untramp +ffffffff815f2fe0 T Xrecurse_ioapic_edge9 +ffffffff815f3060 T Xresume_ioapic_edge9 +ffffffff815f3090 T Xintr_ioapic_edge9_untramp +ffffffff815f32b0 T Xrecurse_ioapic_edge10 +ffffffff815f3330 T Xresume_ioapic_edge10 +ffffffff815f3360 T Xintr_ioapic_edge10_untramp +ffffffff815f3580 T Xrecurse_ioapic_edge11 +ffffffff815f3600 T Xresume_ioapic_edge11 +ffffffff815f3630 T Xintr_ioapic_edge11_untramp +ffffffff815f3850 T Xrecurse_ioapic_edge12 +ffffffff815f38d0 T Xresume_ioapic_edge12 +ffffffff815f3900 T Xintr_ioapic_edge12_untramp +ffffffff815f3b20 T Xrecurse_ioapic_edge13 +ffffffff815f3ba0 T Xresume_ioapic_edge13 +ffffffff815f3bd0 T Xintr_ioapic_edge13_untramp +ffffffff815f3df0 T Xrecurse_ioapic_edge14 +ffffffff815f3e70 T Xresume_ioapic_edge14 +ffffffff815f3ea0 T Xintr_ioapic_edge14_untramp +ffffffff815f40c0 T Xrecurse_ioapic_edge15 +ffffffff815f4140 T Xresume_ioapic_edge15 +ffffffff815f4170 T Xintr_ioapic_edge15_untramp +ffffffff815f4390 T Xrecurse_ioapic_edge16 +ffffffff815f4410 T Xresume_ioapic_edge16 +ffffffff815f4440 T Xintr_ioapic_edge16_untramp +ffffffff815f4660 T Xrecurse_ioapic_edge17 +ffffffff815f46e0 T Xresume_ioapic_edge17 +ffffffff815f4710 T Xintr_ioapic_edge17_untramp +ffffffff815f4930 T Xrecurse_ioapic_edge18 +ffffffff815f49b0 T Xresume_ioapic_edge18 +ffffffff815f49e0 T Xintr_ioapic_edge18_untramp +ffffffff815f4c00 T Xrecurse_ioapic_edge19 +ffffffff815f4c80 T Xresume_ioapic_edge19 +ffffffff815f4cb0 T Xintr_ioapic_edge19_untramp +ffffffff815f4ed0 T Xrecurse_ioapic_edge20 +ffffffff815f4f50 T Xresume_ioapic_edge20 +ffffffff815f4f80 T Xintr_ioapic_edge20_untramp +ffffffff815f51a0 T Xrecurse_ioapic_edge21 +ffffffff815f5220 T Xresume_ioapic_edge21 +ffffffff815f5250 T Xintr_ioapic_edge21_untramp +ffffffff815f5470 T Xrecurse_ioapic_edge22 +ffffffff815f54f0 T Xresume_ioapic_edge22 +ffffffff815f5520 T Xintr_ioapic_edge22_untramp +ffffffff815f5740 T Xrecurse_ioapic_edge23 +ffffffff815f57c0 T Xresume_ioapic_edge23 +ffffffff815f57f0 T Xintr_ioapic_edge23_untramp +ffffffff815f5a10 T Xrecurse_ioapic_edge24 +ffffffff815f5a90 T Xresume_ioapic_edge24 +ffffffff815f5ac0 T Xintr_ioapic_edge24_untramp +ffffffff815f5ce0 T Xrecurse_ioapic_edge25 +ffffffff815f5d60 T Xresume_ioapic_edge25 +ffffffff815f5d90 T Xintr_ioapic_edge25_untramp +ffffffff815f5fb0 T Xrecurse_ioapic_edge26 +ffffffff815f6030 T Xresume_ioapic_edge26 +ffffffff815f6060 T Xintr_ioapic_edge26_untramp +ffffffff815f6280 T Xrecurse_ioapic_edge27 +ffffffff815f6300 T Xresume_ioapic_edge27 +ffffffff815f6330 T Xintr_ioapic_edge27_untramp +ffffffff815f6550 T Xrecurse_ioapic_edge28 +ffffffff815f65d0 T Xresume_ioapic_edge28 +ffffffff815f6600 T Xintr_ioapic_edge28_untramp +ffffffff815f6820 T Xrecurse_ioapic_edge29 +ffffffff815f68a0 T Xresume_ioapic_edge29 +ffffffff815f68d0 T Xintr_ioapic_edge29_untramp +ffffffff815f6af0 T Xrecurse_ioapic_edge30 +ffffffff815f6b70 T Xresume_ioapic_edge30 +ffffffff815f6ba0 T Xintr_ioapic_edge30_untramp +ffffffff815f6dc0 T Xrecurse_ioapic_edge31 +ffffffff815f6e40 T Xresume_ioapic_edge31 +ffffffff815f6e70 T Xintr_ioapic_edge31_untramp +ffffffff815f70a0 T Xrecurse_ioapic_edge32 +ffffffff815f7120 T Xresume_ioapic_edge32 +ffffffff815f7150 T Xintr_ioapic_edge32_untramp +ffffffff815f7380 T Xrecurse_ioapic_edge33 +ffffffff815f7400 T Xresume_ioapic_edge33 +ffffffff815f7430 T Xintr_ioapic_edge33_untramp +ffffffff815f7660 T Xrecurse_ioapic_edge34 +ffffffff815f76e0 T Xresume_ioapic_edge34 +ffffffff815f7710 T Xintr_ioapic_edge34_untramp +ffffffff815f7940 T Xrecurse_ioapic_edge35 +ffffffff815f79c0 T Xresume_ioapic_edge35 +ffffffff815f79f0 T Xintr_ioapic_edge35_untramp +ffffffff815f7c20 T Xrecurse_ioapic_edge36 +ffffffff815f7ca0 T Xresume_ioapic_edge36 +ffffffff815f7cd0 T Xintr_ioapic_edge36_untramp +ffffffff815f7f00 T Xrecurse_ioapic_edge37 +ffffffff815f7f80 T Xresume_ioapic_edge37 +ffffffff815f7fb0 T Xintr_ioapic_edge37_untramp +ffffffff815f81e0 T Xrecurse_ioapic_edge38 +ffffffff815f8260 T Xresume_ioapic_edge38 +ffffffff815f8290 T Xintr_ioapic_edge38_untramp +ffffffff815f84c0 T Xrecurse_ioapic_edge39 +ffffffff815f8540 T Xresume_ioapic_edge39 +ffffffff815f8570 T Xintr_ioapic_edge39_untramp +ffffffff815f87a0 T Xrecurse_ioapic_edge40 +ffffffff815f8820 T Xresume_ioapic_edge40 +ffffffff815f8850 T Xintr_ioapic_edge40_untramp +ffffffff815f8a80 T Xrecurse_ioapic_edge41 +ffffffff815f8b00 T Xresume_ioapic_edge41 +ffffffff815f8b30 T Xintr_ioapic_edge41_untramp +ffffffff815f8d60 T Xrecurse_ioapic_edge42 +ffffffff815f8de0 T Xresume_ioapic_edge42 +ffffffff815f8e10 T Xintr_ioapic_edge42_untramp +ffffffff815f9040 T Xrecurse_ioapic_edge43 +ffffffff815f90c0 T Xresume_ioapic_edge43 +ffffffff815f90f0 T Xintr_ioapic_edge43_untramp +ffffffff815f9320 T Xrecurse_ioapic_edge44 +ffffffff815f93a0 T Xresume_ioapic_edge44 +ffffffff815f93d0 T Xintr_ioapic_edge44_untramp +ffffffff815f9600 T Xrecurse_ioapic_edge45 +ffffffff815f9680 T Xresume_ioapic_edge45 +ffffffff815f96b0 T Xintr_ioapic_edge45_untramp +ffffffff815f98e0 T Xrecurse_ioapic_edge46 +ffffffff815f9960 T Xresume_ioapic_edge46 +ffffffff815f9990 T Xintr_ioapic_edge46_untramp +ffffffff815f9bc0 T Xrecurse_ioapic_edge47 +ffffffff815f9c40 T Xresume_ioapic_edge47 +ffffffff815f9c70 T Xintr_ioapic_edge47_untramp +ffffffff815f9ea0 T Xrecurse_ioapic_edge48 +ffffffff815f9f20 T Xresume_ioapic_edge48 +ffffffff815f9f50 T Xintr_ioapic_edge48_untramp +ffffffff815fa180 T Xrecurse_ioapic_edge49 +ffffffff815fa200 T Xresume_ioapic_edge49 +ffffffff815fa230 T Xintr_ioapic_edge49_untramp +ffffffff815fa460 T Xrecurse_ioapic_edge50 +ffffffff815fa4e0 T Xresume_ioapic_edge50 +ffffffff815fa510 T Xintr_ioapic_edge50_untramp +ffffffff815fa740 T Xrecurse_ioapic_edge51 +ffffffff815fa7c0 T Xresume_ioapic_edge51 +ffffffff815fa7f0 T Xintr_ioapic_edge51_untramp +ffffffff815faa20 T Xrecurse_ioapic_edge52 +ffffffff815faaa0 T Xresume_ioapic_edge52 +ffffffff815faad0 T Xintr_ioapic_edge52_untramp +ffffffff815fad00 T Xrecurse_ioapic_edge53 +ffffffff815fad80 T Xresume_ioapic_edge53 +ffffffff815fadb0 T Xintr_ioapic_edge53_untramp +ffffffff815fafe0 T Xrecurse_ioapic_edge54 +ffffffff815fb060 T Xresume_ioapic_edge54 +ffffffff815fb090 T Xintr_ioapic_edge54_untramp +ffffffff815fb2c0 T Xrecurse_ioapic_edge55 +ffffffff815fb340 T Xresume_ioapic_edge55 +ffffffff815fb370 T Xintr_ioapic_edge55_untramp +ffffffff815fb5a0 T Xrecurse_ioapic_edge56 +ffffffff815fb620 T Xresume_ioapic_edge56 +ffffffff815fb650 T Xintr_ioapic_edge56_untramp +ffffffff815fb880 T Xrecurse_ioapic_edge57 +ffffffff815fb900 T Xresume_ioapic_edge57 +ffffffff815fb930 T Xintr_ioapic_edge57_untramp +ffffffff815fbb60 T Xrecurse_ioapic_edge58 +ffffffff815fbbe0 T Xresume_ioapic_edge58 +ffffffff815fbc10 T Xintr_ioapic_edge58_untramp +ffffffff815fbe40 T Xrecurse_ioapic_edge59 +ffffffff815fbec0 T Xresume_ioapic_edge59 +ffffffff815fbef0 T Xintr_ioapic_edge59_untramp +ffffffff815fc120 T Xrecurse_ioapic_edge60 +ffffffff815fc1a0 T Xresume_ioapic_edge60 +ffffffff815fc1d0 T Xintr_ioapic_edge60_untramp +ffffffff815fc400 T Xrecurse_ioapic_edge61 +ffffffff815fc480 T Xresume_ioapic_edge61 +ffffffff815fc4b0 T Xintr_ioapic_edge61_untramp +ffffffff815fc6e0 T Xrecurse_ioapic_edge62 +ffffffff815fc760 T Xresume_ioapic_edge62 +ffffffff815fc790 T Xintr_ioapic_edge62_untramp +ffffffff815fc9c0 T Xrecurse_ioapic_edge63 +ffffffff815fca40 T Xresume_ioapic_edge63 +ffffffff815fca70 T Xintr_ioapic_edge63_untramp +ffffffff815fcca0 T Xrecurse_ioapic_level0 +ffffffff815fcd20 T Xresume_ioapic_level0 +ffffffff815fcd50 T Xintr_ioapic_level0_untramp +ffffffff815fd060 T Xrecurse_ioapic_level1 +ffffffff815fd0e0 T Xresume_ioapic_level1 +ffffffff815fd110 T Xintr_ioapic_level1_untramp +ffffffff815fd420 T Xrecurse_ioapic_level2 +ffffffff815fd4a0 T Xresume_ioapic_level2 +ffffffff815fd4d0 T Xintr_ioapic_level2_untramp +ffffffff815fd7e0 T Xrecurse_ioapic_level3 +ffffffff815fd860 T Xresume_ioapic_level3 +ffffffff815fd890 T Xintr_ioapic_level3_untramp +ffffffff815fdba0 T Xrecurse_ioapic_level4 +ffffffff815fdc20 T Xresume_ioapic_level4 +ffffffff815fdc50 T Xintr_ioapic_level4_untramp +ffffffff815fdf60 T Xrecurse_ioapic_level5 +ffffffff815fdfe0 T Xresume_ioapic_level5 +ffffffff815fe010 T Xintr_ioapic_level5_untramp +ffffffff815fe320 T Xrecurse_ioapic_level6 +ffffffff815fe3a0 T Xresume_ioapic_level6 +ffffffff815fe3d0 T Xintr_ioapic_level6_untramp +ffffffff815fe6e0 T Xrecurse_ioapic_level7 +ffffffff815fe760 T Xresume_ioapic_level7 +ffffffff815fe790 T Xintr_ioapic_level7_untramp +ffffffff815feaa0 T Xrecurse_ioapic_level8 +ffffffff815feb20 T Xresume_ioapic_level8 +ffffffff815feb50 T Xintr_ioapic_level8_untramp +ffffffff815fee60 T Xrecurse_ioapic_level9 +ffffffff815feee0 T Xresume_ioapic_level9 +ffffffff815fef10 T Xintr_ioapic_level9_untramp +ffffffff815ff220 T Xrecurse_ioapic_level10 +ffffffff815ff2a0 T Xresume_ioapic_level10 +ffffffff815ff2d0 T Xintr_ioapic_level10_untramp +ffffffff815ff5e0 T Xrecurse_ioapic_level11 +ffffffff815ff660 T Xresume_ioapic_level11 +ffffffff815ff690 T Xintr_ioapic_level11_untramp +ffffffff815ff9a0 T Xrecurse_ioapic_level12 +ffffffff815ffa20 T Xresume_ioapic_level12 +ffffffff815ffa50 T Xintr_ioapic_level12_untramp +ffffffff815ffd60 T Xrecurse_ioapic_level13 +ffffffff815ffde0 T Xresume_ioapic_level13 +ffffffff815ffe10 T Xintr_ioapic_level13_untramp +ffffffff81600120 T Xrecurse_ioapic_level14 +ffffffff816001a0 T Xresume_ioapic_level14 +ffffffff816001d0 T Xintr_ioapic_level14_untramp +ffffffff816004e0 T Xrecurse_ioapic_level15 +ffffffff81600560 T Xresume_ioapic_level15 +ffffffff81600590 T Xintr_ioapic_level15_untramp +ffffffff816008a0 T Xrecurse_ioapic_level16 +ffffffff81600920 T Xresume_ioapic_level16 +ffffffff81600950 T Xintr_ioapic_level16_untramp +ffffffff81600c60 T Xrecurse_ioapic_level17 +ffffffff81600ce0 T Xresume_ioapic_level17 +ffffffff81600d10 T Xintr_ioapic_level17_untramp +ffffffff81601020 T Xrecurse_ioapic_level18 +ffffffff816010a0 T Xresume_ioapic_level18 +ffffffff816010d0 T Xintr_ioapic_level18_untramp +ffffffff816013e0 T Xrecurse_ioapic_level19 +ffffffff81601460 T Xresume_ioapic_level19 +ffffffff81601490 T Xintr_ioapic_level19_untramp +ffffffff816017a0 T Xrecurse_ioapic_level20 +ffffffff81601820 T Xresume_ioapic_level20 +ffffffff81601850 T Xintr_ioapic_level20_untramp +ffffffff81601b60 T Xrecurse_ioapic_level21 +ffffffff81601be0 T Xresume_ioapic_level21 +ffffffff81601c10 T Xintr_ioapic_level21_untramp +ffffffff81601f20 T Xrecurse_ioapic_level22 +ffffffff81601fa0 T Xresume_ioapic_level22 +ffffffff81601fd0 T Xintr_ioapic_level22_untramp +ffffffff816022e0 T Xrecurse_ioapic_level23 +ffffffff81602360 T Xresume_ioapic_level23 +ffffffff81602390 T Xintr_ioapic_level23_untramp +ffffffff816026a0 T Xrecurse_ioapic_level24 +ffffffff81602720 T Xresume_ioapic_level24 +ffffffff81602750 T Xintr_ioapic_level24_untramp +ffffffff81602a60 T Xrecurse_ioapic_level25 +ffffffff81602ae0 T Xresume_ioapic_level25 +ffffffff81602b10 T Xintr_ioapic_level25_untramp +ffffffff81602e20 T Xrecurse_ioapic_level26 +ffffffff81602ea0 T Xresume_ioapic_level26 +ffffffff81602ed0 T Xintr_ioapic_level26_untramp +ffffffff816031e0 T Xrecurse_ioapic_level27 +ffffffff81603260 T Xresume_ioapic_level27 +ffffffff81603290 T Xintr_ioapic_level27_untramp +ffffffff816035a0 T Xrecurse_ioapic_level28 +ffffffff81603620 T Xresume_ioapic_level28 +ffffffff81603650 T Xintr_ioapic_level28_untramp +ffffffff81603960 T Xrecurse_ioapic_level29 +ffffffff816039e0 T Xresume_ioapic_level29 +ffffffff81603a10 T Xintr_ioapic_level29_untramp +ffffffff81603d20 T Xrecurse_ioapic_level30 +ffffffff81603da0 T Xresume_ioapic_level30 +ffffffff81603dd0 T Xintr_ioapic_level30_untramp +ffffffff816040e0 T Xrecurse_ioapic_level31 +ffffffff81604160 T Xresume_ioapic_level31 +ffffffff81604190 T Xintr_ioapic_level31_untramp +ffffffff816044a0 T Xrecurse_ioapic_level32 +ffffffff81604520 T Xresume_ioapic_level32 +ffffffff81604550 T Xintr_ioapic_level32_untramp +ffffffff81604860 T Xrecurse_ioapic_level33 +ffffffff816048e0 T Xresume_ioapic_level33 +ffffffff81604910 T Xintr_ioapic_level33_untramp +ffffffff81604c20 T Xrecurse_ioapic_level34 +ffffffff81604ca0 T Xresume_ioapic_level34 +ffffffff81604cd0 T Xintr_ioapic_level34_untramp +ffffffff81604fe0 T Xrecurse_ioapic_level35 +ffffffff81605060 T Xresume_ioapic_level35 +ffffffff81605090 T Xintr_ioapic_level35_untramp +ffffffff816053a0 T Xrecurse_ioapic_level36 +ffffffff81605420 T Xresume_ioapic_level36 +ffffffff81605450 T Xintr_ioapic_level36_untramp +ffffffff81605760 T Xrecurse_ioapic_level37 +ffffffff816057e0 T Xresume_ioapic_level37 +ffffffff81605810 T Xintr_ioapic_level37_untramp +ffffffff81605b20 T Xrecurse_ioapic_level38 +ffffffff81605ba0 T Xresume_ioapic_level38 +ffffffff81605bd0 T Xintr_ioapic_level38_untramp +ffffffff81605ee0 T Xrecurse_ioapic_level39 +ffffffff81605f60 T Xresume_ioapic_level39 +ffffffff81605f90 T Xintr_ioapic_level39_untramp +ffffffff816062a0 T Xrecurse_ioapic_level40 +ffffffff81606320 T Xresume_ioapic_level40 +ffffffff81606350 T Xintr_ioapic_level40_untramp +ffffffff81606660 T Xrecurse_ioapic_level41 +ffffffff816066e0 T Xresume_ioapic_level41 +ffffffff81606710 T Xintr_ioapic_level41_untramp +ffffffff81606a20 T Xrecurse_ioapic_level42 +ffffffff81606aa0 T Xresume_ioapic_level42 +ffffffff81606ad0 T Xintr_ioapic_level42_untramp +ffffffff81606de0 T Xrecurse_ioapic_level43 +ffffffff81606e60 T Xresume_ioapic_level43 +ffffffff81606e90 T Xintr_ioapic_level43_untramp +ffffffff816071a0 T Xrecurse_ioapic_level44 +ffffffff81607220 T Xresume_ioapic_level44 +ffffffff81607250 T Xintr_ioapic_level44_untramp +ffffffff81607560 T Xrecurse_ioapic_level45 +ffffffff816075e0 T Xresume_ioapic_level45 +ffffffff81607610 T Xintr_ioapic_level45_untramp +ffffffff81607920 T Xrecurse_ioapic_level46 +ffffffff816079a0 T Xresume_ioapic_level46 +ffffffff816079d0 T Xintr_ioapic_level46_untramp +ffffffff81607ce0 T Xrecurse_ioapic_level47 +ffffffff81607d60 T Xresume_ioapic_level47 +ffffffff81607d90 T Xintr_ioapic_level47_untramp +ffffffff816080a0 T Xrecurse_ioapic_level48 +ffffffff81608120 T Xresume_ioapic_level48 +ffffffff81608150 T Xintr_ioapic_level48_untramp +ffffffff81608460 T Xrecurse_ioapic_level49 +ffffffff816084e0 T Xresume_ioapic_level49 +ffffffff81608510 T Xintr_ioapic_level49_untramp +ffffffff81608820 T Xrecurse_ioapic_level50 +ffffffff816088a0 T Xresume_ioapic_level50 +ffffffff816088d0 T Xintr_ioapic_level50_untramp +ffffffff81608be0 T Xrecurse_ioapic_level51 +ffffffff81608c60 T Xresume_ioapic_level51 +ffffffff81608c90 T Xintr_ioapic_level51_untramp +ffffffff81608fa0 T Xrecurse_ioapic_level52 +ffffffff81609020 T Xresume_ioapic_level52 +ffffffff81609050 T Xintr_ioapic_level52_untramp +ffffffff81609360 T Xrecurse_ioapic_level53 +ffffffff816093e0 T Xresume_ioapic_level53 +ffffffff81609410 T Xintr_ioapic_level53_untramp +ffffffff81609720 T Xrecurse_ioapic_level54 +ffffffff816097a0 T Xresume_ioapic_level54 +ffffffff816097d0 T Xintr_ioapic_level54_untramp +ffffffff81609ae0 T Xrecurse_ioapic_level55 +ffffffff81609b60 T Xresume_ioapic_level55 +ffffffff81609b90 T Xintr_ioapic_level55_untramp +ffffffff81609ea0 T Xrecurse_ioapic_level56 +ffffffff81609f20 T Xresume_ioapic_level56 +ffffffff81609f50 T Xintr_ioapic_level56_untramp +ffffffff8160a260 T Xrecurse_ioapic_level57 +ffffffff8160a2e0 T Xresume_ioapic_level57 +ffffffff8160a310 T Xintr_ioapic_level57_untramp +ffffffff8160a620 T Xrecurse_ioapic_level58 +ffffffff8160a6a0 T Xresume_ioapic_level58 +ffffffff8160a6d0 T Xintr_ioapic_level58_untramp +ffffffff8160a9e0 T Xrecurse_ioapic_level59 +ffffffff8160aa60 T Xresume_ioapic_level59 +ffffffff8160aa90 T Xintr_ioapic_level59_untramp +ffffffff8160ada0 T Xrecurse_ioapic_level60 +ffffffff8160ae20 T Xresume_ioapic_level60 +ffffffff8160ae50 T Xintr_ioapic_level60_untramp +ffffffff8160b160 T Xrecurse_ioapic_level61 +ffffffff8160b1e0 T Xresume_ioapic_level61 +ffffffff8160b210 T Xintr_ioapic_level61_untramp +ffffffff8160b520 T Xrecurse_ioapic_level62 +ffffffff8160b5a0 T Xresume_ioapic_level62 +ffffffff8160b5d0 T Xintr_ioapic_level62_untramp +ffffffff8160b8e0 T Xrecurse_ioapic_level63 +ffffffff8160b960 T Xresume_ioapic_level63 +ffffffff8160b990 T Xintr_ioapic_level63_untramp +ffffffff8160bca0 T retpoline_r13 +ffffffff8160bcc0 T Xsofttty +ffffffff8160bd00 T Xsoftnet +ffffffff8160bd40 T Xsoftclock +ffffffff8160c000 T kcopy +ffffffff8160c0d0 T copyout +ffffffff8160c160 T _copyin +ffffffff8160c200 T copy_fault +ffffffff8160c230 T copyoutstr +ffffffff8160c2c0 T _copyinstr +ffffffff8160c340 T copystr_fault +ffffffff8160c349 t copystr_return +ffffffff8160d000 T Xspllower +ffffffff8160d080 T Xdoreti +ffffffff8160e000 T mds_handler_ivb +ffffffff8160e070 T mds_handler_bdw +ffffffff8160e0e0 T mds_handler_skl +ffffffff8160e100 T mds_handler_skl_sse +ffffffff8160e180 T mds_handler_skl_avx +ffffffff8160e200 T mds_handler_skl_avx512 +ffffffff8160e280 T mds_handler_silvermont +ffffffff8160e2e0 T mds_handler_knights +ffffffff8160f000 T intr_default_setup +ffffffff8160f080 T x86_nmi +ffffffff8160f0d0 T intr_calculatemasks +ffffffff8160f470 T intr_allocate_slot_cpu +ffffffff8160f610 T intr_allocate_slot +ffffffff8160f8f0 T intr_establish +ffffffff8160fd50 T intr_disestablish +ffffffff8160fe90 T intr_handler +ffffffff8160ff50 T cpu_intr_init +ffffffff816101a0 T intr_printconfig +ffffffff816101d0 T intr_barrier +ffffffff816101f0 T splraise +ffffffff81610270 T spllower +ffffffff816102e0 T softintr +ffffffff81611000 T x86_bus_space_io_read_1 +ffffffff81611030 T x86_bus_space_io_read_2 +ffffffff81611060 T x86_bus_space_io_read_4 +ffffffff81611090 T x86_bus_space_io_read_8 +ffffffff816110b0 T x86_bus_space_io_read_multi_1 +ffffffff816110f0 T x86_bus_space_io_read_multi_2 +ffffffff81611130 T x86_bus_space_io_read_multi_4 +ffffffff81611170 T x86_bus_space_io_read_multi_8 +ffffffff81611190 T x86_bus_space_io_read_region_1 +ffffffff816111d0 T x86_bus_space_io_read_region_2 +ffffffff81611210 T x86_bus_space_io_read_region_4 +ffffffff81611250 T x86_bus_space_io_read_region_8 +ffffffff81611270 T x86_bus_space_io_write_1 +ffffffff816112a0 T x86_bus_space_io_write_2 +ffffffff816112d0 T x86_bus_space_io_write_4 +ffffffff81611300 T x86_bus_space_io_write_8 +ffffffff81611320 T x86_bus_space_io_write_multi_1 +ffffffff81611360 T x86_bus_space_io_write_multi_2 +ffffffff816113a0 T x86_bus_space_io_write_multi_4 +ffffffff816113e0 T x86_bus_space_io_write_multi_8 +ffffffff81611400 T x86_bus_space_io_write_region_1 +ffffffff81611440 T x86_bus_space_io_write_region_2 +ffffffff81611480 T x86_bus_space_io_write_region_4 +ffffffff816114c0 T x86_bus_space_io_write_region_8 +ffffffff816114e0 T x86_bus_space_io_set_multi_1 +ffffffff81611530 T x86_bus_space_io_set_multi_2 +ffffffff81611580 T x86_bus_space_io_set_multi_4 +ffffffff816115d0 T x86_bus_space_io_set_multi_8 +ffffffff816115f0 T x86_bus_space_io_set_region_1 +ffffffff81611640 T x86_bus_space_io_set_region_2 +ffffffff816116a0 T x86_bus_space_io_set_region_4 +ffffffff816116f0 T x86_bus_space_io_set_region_8 +ffffffff81611710 T x86_bus_space_io_copy_1 +ffffffff816117a0 T x86_bus_space_io_copy_2 +ffffffff81611830 T x86_bus_space_io_copy_4 +ffffffff816118c0 T x86_bus_space_io_copy_8 +ffffffff816118e0 T x86_bus_space_io_vaddr +ffffffff81611910 T x86_bus_space_io_mmap +ffffffff81611940 T x86_bus_space_mem_read_1 +ffffffff81611970 T x86_bus_space_mem_read_2 +ffffffff816119a0 T x86_bus_space_mem_read_4 +ffffffff816119d0 T x86_bus_space_mem_read_8 +ffffffff81611a00 T x86_bus_space_mem_read_multi_1 +ffffffff81611a40 T x86_bus_space_mem_read_multi_2 +ffffffff81611a80 T x86_bus_space_mem_read_multi_4 +ffffffff81611ac0 T x86_bus_space_mem_read_multi_8 +ffffffff81611b00 T x86_bus_space_mem_read_region_1 +ffffffff81611b30 T x86_bus_space_mem_read_region_2 +ffffffff81611b70 T x86_bus_space_mem_read_region_4 +ffffffff81611ba0 T x86_bus_space_mem_read_region_8 +ffffffff81611be0 T x86_bus_space_mem_write_1 +ffffffff81611c10 T x86_bus_space_mem_write_2 +ffffffff81611c40 T x86_bus_space_mem_write_4 +ffffffff81611c70 T x86_bus_space_mem_write_8 +ffffffff81611ca0 T x86_bus_space_mem_write_multi_1 +ffffffff81611ce0 T x86_bus_space_mem_write_multi_2 +ffffffff81611d20 T x86_bus_space_mem_write_multi_4 +ffffffff81611d60 T x86_bus_space_mem_write_multi_8 +ffffffff81611da0 T x86_bus_space_mem_write_region_1 +ffffffff81611dd0 T x86_bus_space_mem_write_region_2 +ffffffff81611e10 T x86_bus_space_mem_write_region_4 +ffffffff81611e40 T x86_bus_space_mem_write_region_8 +ffffffff81611e80 T x86_bus_space_mem_set_multi_1 +ffffffff81611f00 T x86_bus_space_mem_set_multi_2 +ffffffff81611f90 T x86_bus_space_mem_set_multi_4 +ffffffff81612010 T x86_bus_space_mem_set_multi_8 +ffffffff816120a0 T x86_bus_space_mem_set_region_1 +ffffffff81612140 T x86_bus_space_mem_set_region_2 +ffffffff816121e0 T x86_bus_space_mem_set_region_4 +ffffffff81612280 T x86_bus_space_mem_set_region_8 +ffffffff81612320 T x86_bus_space_mem_copy_1 +ffffffff81612470 T x86_bus_space_mem_copy_2 +ffffffff816125d0 T x86_bus_space_mem_copy_4 +ffffffff81612720 T x86_bus_space_mem_copy_8 +ffffffff81612890 T x86_bus_space_mem_vaddr +ffffffff816128c0 T x86_bus_space_mem_mmap +ffffffff816128f0 T x86_bus_space_init +ffffffff81612990 T x86_bus_space_mallocok +ffffffff816129c0 T bus_space_map +ffffffff81612c20 T x86_mem_add_mapping +ffffffff81612d50 T _bus_space_map +ffffffff81612ea0 T bus_space_alloc +ffffffff81613100 T _bus_space_unmap +ffffffff81613230 T bus_space_unmap +ffffffff81613400 T bus_space_free +ffffffff81613420 T bus_space_subregion +ffffffff81614000 T _bus_dmamap_create +ffffffff816140b0 T _bus_dmamap_destroy +ffffffff816140e0 T _bus_dmamap_load +ffffffff81614180 T _bus_dmamap_load_buffer +ffffffff81614450 T _bus_dmamap_load_mbuf +ffffffff81614560 T _bus_dmamap_load_uio +ffffffff816146f0 T _bus_dmamap_load_raw +ffffffff81614960 T _bus_dmamap_unload +ffffffff816149a0 T _bus_dmamap_sync +ffffffff816149d0 T _bus_dmamem_alloc +ffffffff81614a20 T _bus_dmamem_alloc_range +ffffffff81614b90 T _bus_dmamem_free +ffffffff81614c70 T _bus_dmamem_map +ffffffff81614e70 T _bus_dmamem_unmap +ffffffff81614f10 T _bus_dmamem_mmap +ffffffff81615000 T cpu_spinup_finish +ffffffff81616000 T x86_64_ipi_halt +ffffffff816160b0 T x86_64_ipi_nop +ffffffff816160e0 T x86_64_ipi_vmclear_vmm +ffffffff816160f0 T x86_64_ipi_reload_mtrr +ffffffff81616140 T x86_64_ipi_start_vmm +ffffffff81616150 T x86_64_ipi_stop_vmm +ffffffff81616160 T x86_64_ipi_wbinvd +ffffffff81617000 T x86_send_ipi +ffffffff81617060 T x86_fast_ipi +ffffffff816170c0 T x86_broadcast_ipi +ffffffff81617150 T x86_ipi_handler +ffffffff81618000 T mp_setperf +ffffffff81618060 T x86_setperf_ipi +ffffffff81618080 T mp_setperf_init +ffffffff81619000 T apic_format_redir +ffffffff8161a000 T consinit +ffffffff8161b000 T cninit +ffffffff8161c000 T dkcsumattach +ffffffff8161d000 T db_read_address +ffffffff8161d1b0 T db_print_address +ffffffff8161d2b0 T db_disasm_3dnow +ffffffff8161d340 T db_disasm_esc +ffffffff8161d540 T db_disasm +ffffffff8161f000 T db_printtrap +ffffffff8161f080 T db_ktrap +ffffffff8161f260 T db_enter_ddb +ffffffff8161f540 T db_sysregs_cmd +ffffffff8161f660 T db_cpuinfo_cmd +ffffffff8161f7a0 T db_startproc_cmd +ffffffff8161f8f0 T db_startcpu +ffffffff8161f970 T db_stopproc_cmd +ffffffff8161fb10 T db_stopcpu +ffffffff8161fba0 T db_ddbproc_cmd +ffffffff8161fcb0 T x86_ipi_db +ffffffff8161fce0 T db_enter +ffffffff8161fd10 T db_machine_init +ffffffff81620000 T db_read_bytes +ffffffff81620100 T db_write_bytes +ffffffff81621000 T db_stack_trace_print +ffffffff81621580 T stacktrace_save_at +ffffffff81621660 T stacktrace_save_utrace +ffffffff816217b0 T db_get_pc +ffffffff816217d0 T db_get_probe_addr +ffffffff81622000 T in_cksum +ffffffff81623000 T in4_cksum +ffffffff81624000 T mc146818_read +ffffffff81624050 T mc146818_write +ffffffff816240a0 T startclocks +ffffffff81624100 T i8254_startclock +ffffffff81624140 T clockintr +ffffffff816241c0 T i8254_get_timecount +ffffffff81624240 T rtcintr +ffffffff816242d0 T gettick +ffffffff81624340 T i8254_delay +ffffffff81624460 T rtcdrain +ffffffff816244d0 T i8254_initclocks +ffffffff81624520 T i8254_inittimecounter +ffffffff81624540 T i8254_start_both_clocks +ffffffff81624630 T rtcstart +ffffffff816246c0 T rtcstop +ffffffff81624700 T rtcget +ffffffff816248e0 T rtcput +ffffffff81624b60 T bcdtobin +ffffffff81624ba0 T bintobcd +ffffffff81624c00 T rtcgettime +ffffffff81624f10 T rtcsettime +ffffffff81625130 T rtcinit +ffffffff81625170 T setstatclockrate +ffffffff81625210 T i8254_inittimecounter_simple +ffffffff81625280 T i8254_simple_get_timecount +ffffffff81626000 T k8pnow_read_pending_wait +ffffffff81626070 T k8_powernow_setperf +ffffffff816260c0 T k8pnow_transition +ffffffff81626510 T k8pnow_decode_pst +ffffffff816265e0 T k8pnow_acpi_states +ffffffff816266f0 T k8pnow_acpi_pss_changed +ffffffff81626900 T k8pnow_acpi_init +ffffffff81626ab0 T k8pnow_states +ffffffff81626cb0 T k8_powernow_init +ffffffff81627000 T p4_get_bus_clock +ffffffff816270e0 T p3_get_bus_clock +ffffffff81627230 T est_acpi_init +ffffffff81627380 T est_acpi_pss_changed +ffffffff81627620 T est_setperf +ffffffff816276e0 T est_init +ffffffff81628000 T k1x_setperf +ffffffff816280c0 T k1x_transition +ffffffff81628160 T k1x_acpi_states +ffffffff81628210 T k1x_acpi_init +ffffffff816282f0 T k1x_init +ffffffff81629000 T rasops_init +ffffffff816293e0 T rasops_rotate_font +ffffffff81629490 T rasops_reconfig +ffffffff816298c0 T rasops_alloc_screen +ffffffff81629b00 T rasops_vcons_cursor +ffffffff81629bd0 T rasops_vcons_mapchar +ffffffff81629c70 T rasops_vcons_putchar +ffffffff81629d40 T rasops_vcons_copycols +ffffffff81629e70 T rasops_vcons_erasecols +ffffffff81629f80 T rasops_vcons_copyrows +ffffffff8162a1a0 T rasops_vcons_eraserows +ffffffff8162a2c0 T rasops_vcons_pack_attr +ffffffff8162a2e0 T rasops_vcons_unpack_attr +ffffffff8162a330 T rasops_wronly_do_cursor +ffffffff8162a390 T rasops_wronly_putchar +ffffffff8162a3d0 T rasops_wronly_copycols +ffffffff8162a4c0 T rasops_wronly_erasecols +ffffffff8162a580 T rasops_wronly_copyrows +ffffffff8162a690 T rasops_wronly_eraserows +ffffffff8162a750 T rasops_doswitch +ffffffff8162a930 T rasops_init_devcmap +ffffffff8162abd0 T rasops_mapchar +ffffffff8162ac70 T rasops_copyrows +ffffffff8162ae50 T rasops_copycols +ffffffff8162b030 T rasops_erasecols +ffffffff8162b520 T rasops_eraserows +ffffffff8162b6f0 T rasops_cursor +ffffffff8162b7a0 T rasops_unpack_attr +ffffffff8162b7f0 T rasops_do_cursor +ffffffff8162ba20 T rasops_pack_mattr +ffffffff8162ba80 T rasops_pack_cattr +ffffffff8162bb00 T rasops_copycols_rotated +ffffffff8162be10 T rasops_copyrows_rotated +ffffffff8162c1c0 T rasops_erasecols_rotated +ffffffff8162c3c0 T rasops_eraserows_rotated +ffffffff8162c5b0 T rasops_putchar_rotated +ffffffff8162c750 T rasops_copychar +ffffffff8162c8c0 T rasops_free_screen +ffffffff8162c950 T rasops_show_screen +ffffffff8162c9d0 T rasops_getchar +ffffffff8162ca30 T rasops_scrollback +ffffffff8162cbf0 T rasops_add_font +ffffffff8162cc70 T rasops_use_font +ffffffff8162cd40 T rasops_load_font +ffffffff8162cde0 T rasops_list_font_cb +ffffffff8162ce20 T rasops_list_font +ffffffff8162ced0 T rasops_claim_framebuffer +ffffffff8162cf50 T rasops_check_framebuffer +ffffffff8162d000 T rasops8_init +ffffffff8162d070 T rasops8_putchar8 +ffffffff8162d350 T rasops8_putchar12 +ffffffff8162d5b0 T rasops8_putchar16 +ffffffff8162d7a0 T rasops8_putchar +ffffffff8162da80 T rasops8_makestamp +ffffffff8162e000 T rasops15_init +ffffffff8162e090 T rasops15_putchar8 +ffffffff8162e320 T rasops15_putchar12 +ffffffff8162e590 T rasops15_putchar16 +ffffffff8162e840 T rasops15_putchar +ffffffff8162eb50 T rasops15_makestamp +ffffffff8162f000 T rasops24_init +ffffffff8162f080 T rasops24_putchar8 +ffffffff8162f350 T rasops24_putchar12 +ffffffff8162f680 T rasops24_putchar16 +ffffffff8162f9a0 T rasops24_putchar +ffffffff8162fca0 T rasops24_makestamp +ffffffff81630000 T rasops32_init +ffffffff81630050 T rasops32_putchar +ffffffff81631000 T wsfont_enum +ffffffff81631060 T wsfont_rotate_cw +ffffffff816311f0 T wsfont_rotate_ccw +ffffffff81631390 T wsfont_rotate_internal +ffffffff81631710 T wsfont_add +ffffffff81631860 T wsfont_rotate +ffffffff81631910 T wsfont_find +ffffffff816319f0 T wsfont_init +ffffffff81631aa0 T wsfont_lock +ffffffff81631d10 T wsfont_unlock +ffffffff81631db0 T wsfont_map_unichar +ffffffff81632000 T mii_attach +ffffffff816321d0 T mii_print +ffffffff81632250 T mii_submatch +ffffffff816322a0 T mii_detach +ffffffff81632390 T mii_mediachg +ffffffff81632420 T mii_tick +ffffffff81632490 T mii_pollstat +ffffffff81632510 T mii_down +ffffffff81633000 T mii_phy_setmedia +ffffffff81633170 T mii_phy_auto +ffffffff81633400 T mii_phy_auto_timeout +ffffffff816334b0 T mii_phy_tick +ffffffff816335d0 T mii_phy_reset +ffffffff816336d0 T mii_phy_down +ffffffff81633720 T mii_phy_status +ffffffff81633740 T mii_phy_update +ffffffff81633870 T mii_phy_statusmsg +ffffffff81633920 T mii_phy_add_media +ffffffff81633c10 T mii_phy_delete_media +ffffffff81633c30 T mii_phy_detach +ffffffff81633c90 T mii_phy_match +ffffffff81633d00 T mii_phy_flowstatus +ffffffff81633e30 T mii_anar +ffffffff81634000 T ukphy_status +ffffffff81635000 T nsphymatch +ffffffff81635050 T nsphyattach +ffffffff816351a0 T nsphy_service +ffffffff81635310 T nsphy_status +ffffffff81635550 T nsphy_reset +ffffffff81636000 T nsphytermatch +ffffffff81636050 T nsphyterattach +ffffffff81636130 T nsphyter_service +ffffffff81636250 T nsphyter_status +ffffffff81637000 T gentbimatch +ffffffff816370a0 T gentbiattach +ffffffff816371c0 T gentbi_service +ffffffff816372c0 T gentbi_status +ffffffff81638000 T qsphymatch +ffffffff81638050 T qsphyattach +ffffffff81638150 T qsphy_service +ffffffff81638270 T qsphy_status +ffffffff81638440 T qsphy_reset +ffffffff81639000 T inphymatch +ffffffff81639050 T inphyattach +ffffffff81639130 T inphy_service +ffffffff81639250 T inphy_status +ffffffff8163a000 T iophymatch +ffffffff8163a050 T iophyattach +ffffffff8163a130 T iophy_service +ffffffff8163a250 T iophy_status +ffffffff8163b000 T eephy_match +ffffffff8163b050 T eephy_attach +ffffffff8163b350 T eephy_service +ffffffff8163b4d0 T eephy_status +ffffffff8163b660 T eephy_reset +ffffffff8163c000 T exphymatch +ffffffff8163c0a0 T exphyattach +ffffffff8163c1b0 T exphy_service +ffffffff8163c270 T exphy_reset +ffffffff8163d000 T rlphymatch +ffffffff8163d0c0 T rlphyattach +ffffffff8163d1c0 T rlphy_service +ffffffff8163d340 T rlphy_status +ffffffff8163e000 T lxtphymatch +ffffffff8163e050 T lxtphyattach +ffffffff8163e190 T lxtphy_service +ffffffff8163e2b0 T lxtphy_status +ffffffff8163e410 T lxtphy_reset +ffffffff8163f000 T luphymatch +ffffffff8163f050 T luphyattach +ffffffff8163f130 T luphy_service +ffffffff81640000 T mtdphymatch +ffffffff81640050 T mtdphyattach +ffffffff81640130 T mtdphy_service +ffffffff81641000 T icsphymatch +ffffffff81641050 T icsphyattach +ffffffff81641170 T icsphy_service +ffffffff81641290 T icsphy_status +ffffffff816413d0 T icsphy_reset +ffffffff81642000 T sqphymatch +ffffffff81642050 T sqphyattach +ffffffff81642130 T sqphy_service +ffffffff81642250 T sqphy_status +ffffffff81643000 T tqphymatch +ffffffff81643050 T tqphyattach +ffffffff81643130 T tqphy_service +ffffffff81643250 T tqphy_status +ffffffff81644000 T ukphymatch +ffffffff81644030 T ukphyattach +ffffffff81644180 T ukphy_service +ffffffff81645000 T dcphy_match +ffffffff81645060 T dcphy_attach +ffffffff816451d0 T dcphy_service +ffffffff816455c0 T dcphy_status +ffffffff816458a0 T dcphy_reset +ffffffff81645950 T dcphy_mii_phy_auto +ffffffff81646000 T bmtphymatch +ffffffff81646050 T bmtphyattach +ffffffff81646150 T bmtphy_service +ffffffff81646270 T bmtphy_status +ffffffff816463f0 T bmtphy_reset +ffffffff81647000 T brgphy_probe +ffffffff81647050 T brgphy_attach +ffffffff816473a0 T brgphy_service +ffffffff816478b0 T brgphy_copper_status +ffffffff81647b10 T brgphy_reset +ffffffff81647e80 T brgphy_fiber_status +ffffffff81647ff0 T brgphy_5708s_status +ffffffff81648190 T brgphy_5709s_status +ffffffff81648340 T brgphy_mii_phy_auto +ffffffff81648480 T brgphy_loop +ffffffff81648530 T brgphy_bcm5401_dspcode +ffffffff816485b0 T brgphy_bcm5411_dspcode +ffffffff81648630 T brgphy_bcm5421_dspcode +ffffffff81648780 T brgphy_bcm54k2_dspcode +ffffffff816487e0 T brgphy_bcm54xx_clock_delay +ffffffff816488f0 T brgphy_reset_bge +ffffffff81648e30 T brgphy_reset_bnx +ffffffff816494a0 T brgphy_adc_bug +ffffffff81649590 T brgphy_5704_a0_bug +ffffffff816495f0 T brgphy_ber_bug +ffffffff81649720 T brgphy_crc_bug +ffffffff816497c0 T brgphy_jumbo_settings +ffffffff816498b0 T brgphy_eth_wirespeed +ffffffff81649930 T brgphy_disable_early_dac +ffffffff8164a000 T xmphy_probe +ffffffff8164a050 T xmphy_attach +ffffffff8164a160 T xmphy_service +ffffffff8164a3e0 T xmphy_status +ffffffff8164a590 T xmphy_mii_phy_auto +ffffffff8164b000 T amphymatch +ffffffff8164b050 T amphyattach +ffffffff8164b130 T amphy_service +ffffffff8164b230 T amphy_status +ffffffff8164c000 T acphymatch +ffffffff8164c050 T acphyattach +ffffffff8164c190 T acphy_service +ffffffff8164c290 T acphy_status +ffffffff8164d000 T nsgphymatch +ffffffff8164d050 T nsgphyattach +ffffffff8164d1d0 T nsgphy_service +ffffffff8164d2f0 T nsgphy_status +ffffffff8164e000 T urlphy_match +ffffffff8164e080 T urlphy_attach +ffffffff8164e1a0 T urlphy_service +ffffffff8164e380 T urlphy_status +ffffffff8164f000 T rgephymatch +ffffffff8164f050 T rgephyattach +ffffffff8164f190 T rgephy_service +ffffffff8164f5f0 T rgephy_status +ffffffff8164f930 T rgephy_reset +ffffffff8164f970 T rgephy_init_rtl8211f +ffffffff8164fac0 T rgephy_mii_phy_auto +ffffffff8164fc60 T rgephy_loop +ffffffff8164fd30 T rgephy_load_dspcode +ffffffff81651000 T ciphymatch +ffffffff81651050 T ciphyattach +ffffffff81651180 T ciphy_service +ffffffff816514a0 T ciphy_status +ffffffff81651660 T ciphy_reset +ffffffff81651690 T ciphy_fixup +ffffffff81652000 T ipgphy_probe +ffffffff81652050 T ipgphy_attach +ffffffff81652140 T ipgphy_service +ffffffff81652440 T ipgphy_status +ffffffff81652640 T ipgphy_reset +ffffffff81652810 T ipgphy_mii_phy_auto +ffffffff81652900 T ipgphy_load_dspcode +ffffffff81653000 T etphy_service +ffffffff81653200 T etphy_status +ffffffff81653350 T etphy_reset +ffffffff816536d0 T etphy_match +ffffffff81653720 T etphy_attach +ffffffff81654000 T jmphy_service +ffffffff816541b0 T jmphy_status +ffffffff81654330 T jmphy_reset +ffffffff81654420 T jmphy_match +ffffffff81654470 T jmphy_attach +ffffffff81654640 T jmphy_auto +ffffffff81654800 T jmphy_anar +ffffffff81655000 T atphy_service +ffffffff81655380 T atphy_status +ffffffff81655550 T atphy_reset +ffffffff81655700 T atphy_match +ffffffff81655750 T atphy_attach +ffffffff81655860 T atphy_mii_phy_auto +ffffffff81656000 T scsi_init +ffffffff816560c0 T scsi_req_probe +ffffffff81656160 T scsi_plug_probe +ffffffff816561b0 T scsi_req_detach +ffffffff81656250 T scsi_plug_detach +ffffffff816562a0 T scsi_pending_start +ffffffff81656300 T scsi_pending_finish +ffffffff81656360 T scsi_iopool_init +ffffffff816563a0 T scsi_iopool_get +ffffffff816563f0 T scsi_iopool_put +ffffffff81656430 T scsi_iopool_destroy +ffffffff81656580 T scsi_io_get_done +ffffffff816565c0 T scsi_default_get +ffffffff816565f0 T scsi_default_put +ffffffff81656640 T scsi_ioh_set +ffffffff81656680 T scsi_ioh_add +ffffffff81656740 T scsi_iopool_run +ffffffff816568a0 T scsi_ioh_del +ffffffff81656970 T scsi_ioh_deq +ffffffff81656a10 T scsi_ioh_pending +ffffffff81656a70 T scsi_move +ffffffff81656ad0 T scsi_move_done +ffffffff81656b10 T scsi_io_get +ffffffff81656c60 T scsi_io_put +ffffffff81656ca0 T scsi_xsh_set +ffffffff81656cf0 T scsi_xsh_ioh +ffffffff81656de0 T scsi_xsh_add +ffffffff81656ea0 T scsi_xsh_runqueue +ffffffff81657060 T scsi_xsh_del +ffffffff816571c0 T scsi_xs_io +ffffffff816572d0 T scsi_xs_get +ffffffff816575b0 T scsi_xs_get_done +ffffffff816575f0 T scsi_link_open +ffffffff81657670 T scsi_link_close +ffffffff816576e0 T scsi_link_shutdown +ffffffff81657940 T scsi_xs_put +ffffffff81657a00 T scsi_test_unit_ready +ffffffff81657a80 T scsi_xs_sync +ffffffff81657bd0 T scsi_init_inquiry +ffffffff81657c30 T scsi_inquire +ffffffff81657da0 T scsi_inquire_vpd +ffffffff81657e60 T scsi_read_cap_10 +ffffffff81657f00 T scsi_read_cap_16 +ffffffff81657fb0 T scsi_prevent +ffffffff81658040 T scsi_start +ffffffff816580e0 T scsi_mode_sense +ffffffff816581a0 T scsi_mode_sense_big +ffffffff81658270 T scsi_mode_sense_page +ffffffff816582d0 T scsi_mode_sense_big_page +ffffffff81658340 T scsi_parse_blkdesc +ffffffff81658460 T scsi_do_mode_sense +ffffffff816586a0 T scsi_mode_select +ffffffff81658750 T scsi_mode_select_big +ffffffff81658810 T scsi_report_luns +ffffffff816588e0 T scsi_xs_exec +ffffffff81658930 T scsi_copy_internal_data +ffffffff81658a00 T sc_print_addr +ffffffff81658a50 T scsi_done +ffffffff81658a90 T scsi_xs_sync_done +ffffffff81658b00 T scsi_xs_error +ffffffff81658cb0 T scsi_delay +ffffffff81658d80 T scsi_interpret_sense +ffffffff816590b0 T scsi_print_sense +ffffffff81659370 T scsi_decode_sense +ffffffff81659600 T scsi_cmd_rw_decode +ffffffff8165a000 T scsi_ioc_cmd +ffffffff8165a210 T scsi_ioc_ata_cmd +ffffffff8165a3e0 T scsi_do_ioctl +ffffffff8165b000 T scsibusmatch +ffffffff8165b030 T scsibusattach +ffffffff8165b180 T scsibusdetach +ffffffff8165b240 T scsibusactivate +ffffffff8165b2c0 T scsiprint +ffffffff8165b310 T scsibusbioctl +ffffffff8165b370 T scsi_probe_bus +ffffffff8165b490 T scsi_activate_bus +ffffffff8165b510 T scsi_detach_bus +ffffffff8165b590 T scsibussubmatch +ffffffff8165b600 T scsibussubprint +ffffffff8165b660 T scsi_print_link +ffffffff8165b870 T scsi_probe +ffffffff8165b9c0 T scsi_detach +ffffffff8165bae0 T scsi_activate +ffffffff8165bc50 T scsi_activate_target +ffffffff8165bcf0 T scsi_activate_lun +ffffffff8165bd70 T scsi_activate_link +ffffffff8165bdd0 T scsi_get_link +ffffffff8165be20 T scsi_probe_target +ffffffff8165bf00 T scsi_probe_lun +ffffffff8165bf50 T scsi_get_target_luns +ffffffff8165c130 T scsi_probe_link +ffffffff8165c770 T scsi_devid +ffffffff8165c9d0 T scsi_inqmatch +ffffffff8165cb50 T scsi_add_link +ffffffff8165cb90 T scsi_detach_link +ffffffff8165ccd0 T scsi_detach_target +ffffffff8165cd60 T scsi_detach_lun +ffffffff8165cdc0 T devid_free +ffffffff8165ce10 T scsi_remove_link +ffffffff8165ce80 T scsi_strvis +ffffffff8165d010 T scsi_devid_pg83 +ffffffff8165d240 T scsi_devid_pg80 +ffffffff8165d3f0 T scsi_devid_wwn +ffffffff8165d470 T devid_alloc +ffffffff8165d510 T devid_copy +ffffffff8165e000 T cdmatch +ffffffff8165e060 T cdattach +ffffffff8165e110 T cddetach +ffffffff8165e180 T cdactivate +ffffffff8165e1f0 T cd_interpret_sense +ffffffff8165e270 T cdstart +ffffffff8165e500 T cdopen +ffffffff8165e710 T cd_get_parms +ffffffff8165e7c0 T cdgetdisklabel +ffffffff8165e9a0 T cdclose +ffffffff8165ead0 T cdstrategy +ffffffff8165ebf0 T cd_cmd_rw6 +ffffffff8165ec40 T cd_cmd_rw10 +ffffffff8165eca0 T cd_cmd_rw12 +ffffffff8165ed10 T cd_buf_done +ffffffff8165ee90 T cdminphys +ffffffff8165ef70 T cdread +ffffffff8165efa0 T cdwrite +ffffffff8165efd0 T cdioctl +ffffffff8165fa30 T cd_set_pa_immed +ffffffff8165fb60 T cd_play_tracks +ffffffff8165fd00 T cd_play_msf +ffffffff8165fdd0 T cd_play +ffffffff8165fe80 T cd_read_subchannel +ffffffff8165ff50 T cd_read_toc +ffffffff81660030 T cd_setchan +ffffffff81660160 T cd_getvol +ffffffff81660240 T cd_setvol +ffffffff816603e0 T cd_pause +ffffffff81660470 T cd_reset +ffffffff816604f0 T cd_load_unload +ffffffff81660580 T dvd_auth +ffffffff81660a00 T dvd_read_struct +ffffffff81660a70 T cd_load_toc +ffffffff81660be0 T cd_size +ffffffff81660d50 T cdsize +ffffffff81660d80 T cddump +ffffffff81660db0 T dvd_read_physical +ffffffff81660f80 T dvd_read_copyright +ffffffff81661080 T dvd_read_disckey +ffffffff81661190 T dvd_read_bca +ffffffff816612b0 T dvd_read_manufact +ffffffff81662000 T chmatch +ffffffff81662060 T chattach +ffffffff81662100 T ch_interpret_sense +ffffffff81662180 T ch_get_quirks +ffffffff816621f0 T chopen +ffffffff816622c0 T ch_get_params +ffffffff81662490 T chclose +ffffffff816624e0 T chioctl +ffffffff81662620 T ch_move +ffffffff81662750 T ch_exchange +ffffffff816628d0 T ch_position +ffffffff816629b0 T ch_usergetelemstatus +ffffffff81662f80 T ch_getelemstatus +ffffffff81664000 T sdmatch +ffffffff81664060 T sdattach +ffffffff81664270 T sddetach +ffffffff816642e0 T sdactivate +ffffffff81664470 T sd_interpret_sense +ffffffff81664530 T sdstart +ffffffff81664840 T sd_get_parms +ffffffff81664da0 T sd_ioctl_cache +ffffffff81664fb0 T sd_flush +ffffffff81665060 T sdopen +ffffffff81665340 T sdgetdisklabel +ffffffff81665700 T sdclose +ffffffff816658e0 T sdstrategy +ffffffff81665a20 T sd_cmd_rw6 +ffffffff81665a70 T sd_cmd_rw10 +ffffffff81665ad0 T sd_cmd_rw12 +ffffffff81665b40 T sd_cmd_rw16 +ffffffff81665bd0 T sd_buf_done +ffffffff81665d20 T sdminphys +ffffffff81665e00 T sdread +ffffffff81665e30 T sdwrite +ffffffff81665e60 T sdioctl +ffffffff816662d0 T sd_ioctl_inquiry +ffffffff816663f0 T viscpy +ffffffff81666460 T sdsize +ffffffff816665b0 T sddump +ffffffff81666800 T sd_read_cap_10 +ffffffff816668d0 T sd_read_cap_16 +ffffffff816669c0 T sd_read_cap +ffffffff81666a70 T sd_thin_pages +ffffffff81666c10 T sd_vpd_block_limits +ffffffff81666cf0 T sd_vpd_thin +ffffffff81666da0 T sd_thin_params +ffffffff81667000 T stmatch +ffffffff81667060 T stattach +ffffffff816671a0 T stdetach +ffffffff81667290 T stactivate +ffffffff816672e0 T st_interpret_sense +ffffffff81667660 T ststart +ffffffff81667980 T stopen +ffffffff81667b50 T st_unmount +ffffffff81667c40 T st_mount_tape +ffffffff81667e50 T stclose +ffffffff81668190 T st_write_filemarks +ffffffff816682d0 T st_load +ffffffff816683e0 T st_touch_tape +ffffffff81668590 T st_read_block_limits +ffffffff816686b0 T st_mode_sense +ffffffff816687e0 T st_decide_mode +ffffffff816688f0 T st_mode_select +ffffffff81668b70 T st_check_eod +ffffffff81668c30 T st_rewind +ffffffff81668d50 T ststrategy +ffffffff81668ee0 T st_space +ffffffff816691b0 T st_buf_done +ffffffff816692d0 T stminphys +ffffffff81669380 T stread +ffffffff816693b0 T stwrite +ffffffff816693e0 T stioctl +ffffffff816698c0 T st_erase +ffffffff81669960 T st_read +ffffffff8166a000 T ukmatch +ffffffff8166a030 T ukattach +ffffffff8166a060 T ukdetach +ffffffff8166a160 T ukopen +ffffffff8166a1f0 T ukclose +ffffffff8166a260 T ukioctl +ffffffff8166b000 T safte_match +ffffffff8166b090 T safte_attach +ffffffff8166b280 T safte_detach +ffffffff8166b370 T safte_read_config +ffffffff8166b730 T safte_read_encstat +ffffffff8166ba30 T safte_ioctl +ffffffff8166ba80 T safte_temp2uK +ffffffff8166baf0 T safte_bio_blink +ffffffff8166c000 T ses_match +ffffffff8166c060 T ses_attach +ffffffff8166c2d0 T ses_detach +ffffffff8166c450 T ses_read_config +ffffffff8166c6f0 T ses_refresh_sensors +ffffffff8166c8c0 T ses_ioctl +ffffffff8166c910 T ses_make_sensors +ffffffff8166ccc0 T ses_read_status +ffffffff8166cd90 T ses_psu2sensor +ffffffff8166cdd0 T ses_cool2sensor +ffffffff8166ce30 T ses_temp2sensor +ffffffff8166ce80 T ses_bio_blink +ffffffff8166d080 T ses_write_config +ffffffff8166e000 T sym_match +ffffffff8166e370 T sym_attach +ffffffff8166e600 T sym_detach +ffffffff8166e630 T sym_activate +ffffffff8166e680 T sym_mpath_checksense +ffffffff8166e6b0 T sym_mpath_status +ffffffff8166e6d0 T sym_mpath_start +ffffffff8166f000 T rdac_match +ffffffff8166f1c0 T rdac_attach +ffffffff8166f2d0 T rdac_detach +ffffffff8166f320 T rdac_activate +ffffffff8166f390 T rdac_mpath_checksense +ffffffff8166f410 T rdac_mpath_status +ffffffff8166f430 T rdac_mpath_start +ffffffff8166f450 T rdac_status +ffffffff8166f4a0 T rdac_extdevid +ffffffff8166f630 T rdac_groupid +ffffffff8166f700 T rdac_status_done +ffffffff81670000 T emc_match +ffffffff81670140 T emc_attach +ffffffff81670290 T emc_detach +ffffffff816702e0 T emc_activate +ffffffff81670330 T emc_mpath_checksense +ffffffff81670390 T emc_mpath_status +ffffffff816703b0 T emc_mpath_start +ffffffff816703d0 T emc_status +ffffffff81670420 T emc_sp_info +ffffffff816704d0 T emc_status_done +ffffffff81671000 T hds_match +ffffffff81671120 T hds_attach +ffffffff81671250 T hds_detach +ffffffff816712a0 T hds_activate +ffffffff816712f0 T hds_mpath_checksense +ffffffff81671320 T hds_mpath_status +ffffffff81671350 T hds_inquiry +ffffffff81671480 T hds_mpath_start +ffffffff816714a0 T hds_status +ffffffff816714f0 T hds_info +ffffffff81671630 T hds_status_done +ffffffff81672000 T atapiscsi_match +ffffffff81672060 T atapiscsi_attach +ffffffff816721d0 T atapiscsi_detach +ffffffff816721e0 T atapiscsi_activate +ffffffff81672270 T wdc_atapi_send_cmd +ffffffff816723f0 T wdc_atapi_start +ffffffff81672410 T wdc_atapi_intr +ffffffff81672490 T wdc_atapi_timer_handler +ffffffff81672510 T wdc_atapi_tape_done +ffffffff81672590 T wdc_atapi_ioctl +ffffffff81672610 T atapi_to_scsi_sense +ffffffff81672690 T wdc_atapi_drive_selected +ffffffff816726f0 T wdc_atapi_real_start +ffffffff81672790 T wdc_atapi_the_machine +ffffffff81672a40 T wdc_atapi_the_poll_machine +ffffffff81672b50 T wdc_atapi_update_status +ffffffff81672bf0 T wdc_atapi_real_start_2 +ffffffff81672d00 T wdc_atapi_reset +ffffffff81672da0 T wdc_atapi_ctrl +ffffffff816732d0 T wdc_atapi_send_packet +ffffffff816733c0 T wdc_atapi_intr_command +ffffffff81673680 T wdc_atapi_intr_complete +ffffffff816739b0 T wdc_atapi_pio_intr +ffffffff81673c50 T wdc_atapi_in_data_phase +ffffffff81673d00 T wdc_atapi_intr_data +ffffffff81673f40 T wdc_atapi_done +ffffffff81673fa0 T wdc_atapi_reset_2 +ffffffff81675000 T wdprobe +ffffffff81675070 T wdattach +ffffffff81675540 T wddetach +ffffffff816755c0 T wdactivate +ffffffff816757e0 T wd_get_params +ffffffff816758e0 T wdrestart +ffffffff81675980 T wd_flushcache +ffffffff81675ac0 T wd_standby +ffffffff81675bb0 T wdopen +ffffffff81675cf0 T wdstrategy +ffffffff81675ea0 T wdstart +ffffffff81675f20 T __wdstart +ffffffff816760d0 T wddone +ffffffff81676310 T wdread +ffffffff81676340 T wdwrite +ffffffff81676370 T wdgetdisklabel +ffffffff816764f0 T wdclose +ffffffff816765c0 T wdgetdefaultlabel +ffffffff816766f0 T wdioctl +ffffffff816769b0 T wdsize +ffffffff81676ab0 T wddump +ffffffff81677000 T wd_hibernate_io +ffffffff81677230 T wdc_ata_bio_start +ffffffff81677270 T wdc_ata_bio_intr +ffffffff81677610 T wdc_ata_bio_kill_xfer +ffffffff816776a0 T wdc_ata_bio +ffffffff81677790 T _wdc_ata_bio_start +ffffffff81678030 T wdc_ata_ctrl_intr +ffffffff816785d0 T wdc_ata_bio_done +ffffffff81678640 T wdc_ata_err +ffffffff81679000 T ata_get_params +ffffffff81679250 T ata_set_mode +ffffffff81679300 T ata_dmaerr +ffffffff81679380 T ata_perror +ffffffff8167a000 T atascsi_cmd +ffffffff8167a0f0 T atascsi_probe +ffffffff8167a600 T atascsi_free +ffffffff8167a6e0 T atascsi_attach +ffffffff8167a840 T atascsi_detach +ffffffff8167a8b0 T atascsi_lookup_port +ffffffff8167a910 T atascsi_io_get +ffffffff8167a970 T atascsi_io_put +ffffffff8167a9a0 T atascsi_port_identify +ffffffff8167ab00 T atascsi_port_set_features +ffffffff8167ac60 T ata_polled_complete +ffffffff8167ac90 T ata_exec +ffffffff8167acb0 T ata_polled +ffffffff8167ad50 T atascsi_done +ffffffff8167ad70 T atascsi_disk_cmd +ffffffff8167b1e0 T atascsi_atapi_cmd +ffffffff8167b320 T atascsi_pmp_cmd +ffffffff8167b3a0 T atascsi_disk_write_same_16 +ffffffff8167b510 T atascsi_disk_unmap +ffffffff8167b600 T atascsi_disk_sync +ffffffff8167b6e0 T atascsi_disk_sense +ffffffff8167b730 T atascsi_disk_inq +ffffffff8167baa0 T atascsi_disk_capacity +ffffffff8167bc00 T atascsi_disk_capacity16 +ffffffff8167be20 T atascsi_passthru_12 +ffffffff8167bf90 T atascsi_passthru_16 +ffffffff8167c120 T atascsi_disk_start_stop +ffffffff8167c210 T atascsi_disk_cmd_done +ffffffff8167c260 T atascsi_disk_vpd_supported +ffffffff8167c330 T atascsi_disk_vpd_serial +ffffffff8167c470 T atascsi_disk_vpd_ident +ffffffff8167c780 T atascsi_disk_vpd_ata +ffffffff8167c970 T atascsi_disk_vpd_limits +ffffffff8167ca90 T atascsi_disk_vpd_info +ffffffff8167cb80 T atascsi_disk_vpd_thin +ffffffff8167cc40 T atascsi_disk_inquiry +ffffffff8167cdf0 T ata_swapcopy +ffffffff8167ce50 T ata_identify_block_l2p_exp +ffffffff8167cea0 T atascsi_disk_write_same_16_done +ffffffff8167cef0 T atascsi_disk_unmap_task +ffffffff8167d0f0 T atascsi_disk_unmap_done +ffffffff8167d150 T atascsi_disk_sync_done +ffffffff8167d1f0 T ata_identify_blocks +ffffffff8167d270 T ata_identify_blocksize +ffffffff8167d2d0 T ata_identify_block_logical_align +ffffffff8167d330 T atascsi_passthru_map +ffffffff8167d400 T atascsi_passthru_done +ffffffff8167d480 T atascsi_disk_start_stop_done +ffffffff8167d5b0 T atascsi_atapi_cmd_done +ffffffff8167d680 T atascsi_pmp_sense +ffffffff8167d6d0 T atascsi_pmp_inq +ffffffff8167d810 T ata_complete +ffffffff8167e000 T mainbus_match +ffffffff8167e030 T mainbus_attach +ffffffff8167e380 T mainbus_print +ffffffff8167e400 T mainbus_efifb_reattach +ffffffff8167f000 T codepatch_disable +ffffffff81680000 T bios_match +ffffffff81680060 T bios_attach +ffffffff81680af0 T smbios_find +ffffffff81680bf0 T smbios_find_table +ffffffff81680db0 T smbios_get_string +ffffffff81680e70 T fixstring +ffffffff81680fe0 T smbios_info +ffffffff81681c90 T bios_print +ffffffff81682000 T mpbios_match +ffffffff81682050 T mpbios_attach +ffffffff81682070 T mpbios_scan +ffffffff81682500 T mp_print +ffffffff81682550 T mp_match +ffffffff816825d0 T mpbios_map +ffffffff816826c0 T mpbios_unmap +ffffffff81682710 T mpbios_probe +ffffffff81682c50 T mpbios_search +ffffffff81682f00 T mpbios_cpu +ffffffff81682fa0 T mpbios_bus +ffffffff81683170 T mpbios_ioapic +ffffffff81683210 T mpbios_int +ffffffff816834f0 T mp_cfg_special_intr +ffffffff81683560 T mp_cfg_pci_intr +ffffffff81683660 T mp_cfg_isa_intr +ffffffff81683760 T mp_print_special_intr +ffffffff81683790 T mp_print_pci_intr +ffffffff816837c0 T mp_print_isa_intr +ffffffff81684000 T via8237_mpbios_fixup +ffffffff81684060 T nforce4_mpbios_fixup +ffffffff81684170 T mcp04_mpbios_fixup +ffffffff81684210 T mpbios_icu_lookup +ffffffff816842a0 T mpbios_pin_fixup +ffffffff81684400 T mpbios_intr_fixup +ffffffff81685000 T replacesmap +ffffffff81685090 T replacemeltdown +ffffffff81685300 T replacemds +ffffffff81685790 T mp_cpu_start +ffffffff81685880 T mp_cpu_start_cleanup +ffffffff816858b0 T cpu_match +ffffffff81685910 T cpu_attach +ffffffff81685e10 T cpu_activate +ffffffff81685f10 T cpu_idle_mwait_cycle +ffffffff81685ff0 T cpu_init_mwait +ffffffff81686180 T cpu_enter_pages +ffffffff81686260 T cpu_fix_msrs +ffffffff81686450 T cpu_init +ffffffff81686840 T cpu_start_secondary +ffffffff816869e0 T cpu_init_vmm +ffffffff81686a90 T cpu_boot_secondary_processors +ffffffff81686bb0 T cpu_boot_secondary +ffffffff81686c80 T cpu_hatch +ffffffff81686f10 T cpu_init_msrs +ffffffff81686fe0 T cpu_tsx_disable +ffffffff81687050 T cpu_debug_dump +ffffffff81687100 T patinit +ffffffff81687150 T rdrand +ffffffff81687240 T wbinvd_on_all_cpus +ffffffff81688000 T lapic_hwmask +ffffffff81688050 T lapic_hwunmask +ffffffff816880a0 T lapic_setup +ffffffff816880d0 T i82489_readreg +ffffffff81688100 T i82489_writereg +ffffffff81688130 T i82489_ipi +ffffffff816881f0 T i82489_cpu_number +ffffffff81688220 T x2apic_readreg +ffffffff81688260 T x2apic_cpu_number +ffffffff81688290 T x2apic_writereg +ffffffff816882d0 T lapic_cpu_number +ffffffff81688320 T lapic_map +ffffffff81688450 T x2apic_ipi +ffffffff816884a0 T lapic_enable +ffffffff816884c0 T lapic_disable +ffffffff816884e0 T lapic_set_lvt +ffffffff81688790 T lapic_boot_init +ffffffff816889e0 T lapic_timer_rearm +ffffffff81688a20 T lapic_timer_trigger +ffffffff81688aa0 T lapic_timer_oneshot +ffffffff81688b00 T lapic_timer_periodic +ffffffff81688b60 T lapic_clockintr +ffffffff81688be0 T lapic_startclock +ffffffff81688c00 T lapic_initclocks +ffffffff81688c60 T lapic_calibrate_timer +ffffffff81688eb0 T i82489_ipi_init +ffffffff81688f80 T x2apic_ipi_init +ffffffff81689000 T x86_ipi_init +ffffffff8168a000 T ioapic_find +ffffffff8168a080 T ioapic_find_bybase +ffffffff8168a0e0 T ioapic_print_redir +ffffffff8168a1a0 T ioapic_match +ffffffff8168a1f0 T ioapic_attach +ffffffff8168a530 T ioapic_activate +ffffffff8168a600 T ioapic_set_id +ffffffff8168a6f0 T ioapic_hwmask +ffffffff8168a7a0 T ioapic_hwunmask +ffffffff8168a840 T ioapic_addroute +ffffffff8168a8b0 T ioapic_delroute +ffffffff8168a980 T apic_set_redir +ffffffff8168abb0 T ioapic_enable +ffffffff8168acc0 T ioapic_dump +ffffffff8168b000 T efifb_match +ffffffff8168b090 T efifb_attach +ffffffff8168b370 T efifb_ioctl +ffffffff8168b4a0 T efifb_mmap +ffffffff8168b500 T efifb_alloc_screen +ffffffff8168b530 T efifb_efiinfo_init +ffffffff8168b620 T efifb_rasops_init +ffffffff8168b7e0 T efifb_cnattach +ffffffff8168b9a0 T efifb_cnattach_common +ffffffff8168ba80 T efifb_early_map +ffffffff8168ba90 T efifb_cnremap +ffffffff8168bb30 T efifb_early_cleanup +ffffffff8168bb40 T efifb_is_console +ffffffff8168bc20 T efifb_is_primary +ffffffff8168bd40 T efifb_detach +ffffffff8168bd70 T efifb_reattach +ffffffff8168bd90 T efifb_cb_cnattach +ffffffff8168bef0 T cb_find_fb +ffffffff8168c070 T efifb_cb_found +ffffffff8168c0b0 T efifb_stolen +ffffffff8168d000 T pvbus_match +ffffffff8168d050 T pvbus_attach +ffffffff8168d2d0 T pvbus_activate +ffffffff8168d2e0 T pvbus_kvm +ffffffff8168d320 T pvbus_hyperv +ffffffff8168d390 T pvbus_hyperv_print +ffffffff8168d3c0 T pvbus_xen +ffffffff8168d420 T pvbus_xen_print +ffffffff8168d450 T pvbus_probe +ffffffff8168d480 T pvbus_search +ffffffff8168d510 T pvbus_identify +ffffffff8168d6c0 T pvbus_init_cpu +ffffffff8168d7c0 T pvbus_print +ffffffff8168d810 T pvbus_shutdown +ffffffff8168d860 T pvbus_reboot +ffffffff8168d8b0 T pvbus_minor +ffffffff8168d9a0 T pvbusopen +ffffffff8168da70 T pvbusclose +ffffffff8168db40 T pvbusgetstr +ffffffff8168dbe0 T pvbusioctl +ffffffff8168e000 T pvclock_match +ffffffff8168e060 T pvclock_attach +ffffffff8168e1e0 T pvclock_activate +ffffffff8168e240 T pvclock_get_timecount +ffffffff8168f000 T vmt_tclo_capreg +ffffffff8168f290 T vmt_tclo_halt +ffffffff8168f2a0 T vmt_tclo_poweron +ffffffff8168f490 T vmt_tclo_reboot +ffffffff8168f4a0 T vmt_tclo_resume +ffffffff8168f7b0 T vmt_tclo_suspend +ffffffff8168f9c0 T vmt_tclo_broadcastip +ffffffff8168fe10 T vmt_tclo_ping +ffffffff8168ffe0 T vmt_tclo_reset +ffffffff81690280 T vmt_tclo_abortbackup +ffffffff81690490 T vmt_tclo_backupdone +ffffffff81690690 T vmt_tclo_startbackup +ffffffff816908c0 T vmt_match +ffffffff81690a60 T vmt_attach +ffffffff81690cb0 T vmt_activate +ffffffff81690f40 T vmt_probe_cmd +ffffffff81691000 T vm_cmd +ffffffff81691070 T vmt_probe +ffffffff816911f0 T vm_rpc_open +ffffffff816912f0 T vm_rpc_send_rpci_tx +ffffffff81691390 T vmt_tick_hook +ffffffff816913d0 T vmt_tclo_tick +ffffffff81691c60 T vmt_nicinfo_task +ffffffff81691df0 T vmt_kvop +ffffffff81692400 T vm_rpc_send +ffffffff816925c0 T vm_rpc_get_length +ffffffff816926d0 T vm_rpc_get_data +ffffffff81692890 T vm_rpc_close +ffffffff816929a0 T vmt_resume +ffffffff81692a90 T vmt_shutdown +ffffffff81692c40 T vmt_update_guest_uptime +ffffffff81692ca0 T vmt_clear_guest_info +ffffffff81692d20 T vmt_update_guest_info +ffffffff81692e20 T vmt_tick +ffffffff81692fc0 T vmt_tclo_state_change_success +ffffffff81693020 T vmt_do_shutdown +ffffffff81693210 T vm_rpc_send_str +ffffffff816933e0 T vmt_do_reboot +ffffffff816935d0 T vm_rpci_response_successful +ffffffff81693610 T vmt_set_backup_status +ffffffff81693640 T vmt_quiesce_task +ffffffff81693750 T vmt_quiesce_done_task +ffffffff81693800 T vmt_tclo_process +ffffffff816938c0 T vmt_xdr_ifaddr +ffffffff81693a20 T vmt_xdr_nic_entry +ffffffff81693bc0 T vmt_xdr_nic_info +ffffffff81693cd0 T vm_rpc_send_rpci_tx_buf +ffffffff81694250 T vm_ins +ffffffff816942c0 T vm_outs +ffffffff81695000 T xen_match +ffffffff81695040 T xen_attach +ffffffff81695270 T xen_activate +ffffffff816952a0 T xen_bus_dmamap_create +ffffffff81695420 T xen_bus_dmamap_destroy +ffffffff816954c0 T xen_bus_dmamap_load +ffffffff81695600 T xen_bus_dmamap_load_mbuf +ffffffff81695740 T xen_bus_dmamap_unload +ffffffff816957e0 T xen_bus_dmamap_sync +ffffffff81695820 T xen_init_hypercall +ffffffff816958c0 T xen_getfeatures +ffffffff81695960 T xen_init_info_page +ffffffff81695a60 T xen_init_cbvec +ffffffff81695af0 T xen_init_interrupts +ffffffff81695ba0 T xen_init_grant_tables +ffffffff81695ce0 T xen_probe_devices +ffffffff81695fb0 T xen_disable_emulated_devices +ffffffff81696030 T xen_deferred +ffffffff816960c0 T xen_intr_enable +ffffffff81696220 T xen_control +ffffffff816963a0 T xen_resume +ffffffff816963d0 T xen_hypercall +ffffffff816965b0 T xen_hypercallv +ffffffff81696670 T xen_intr_ack +ffffffff816966d0 T xen_intr +ffffffff816968c0 T xen_intr_schedule +ffffffff816969c0 T xen_intr_barrier +ffffffff81696a60 T xen_intr_signal +ffffffff81696b90 T xen_intr_establish +ffffffff81696e30 T xen_intr_dispatch +ffffffff81696f50 T xen_intr_disestablish +ffffffff81697100 T xen_intr_mask +ffffffff816971c0 T xen_intr_unmask +ffffffff81697300 T xen_grant_table_grow +ffffffff81697510 T xen_grant_table_alloc +ffffffff81697760 T xen_grant_table_free +ffffffff81697800 T xen_grant_table_enter +ffffffff816978b0 T xen_grant_table_remove +ffffffff81697a10 T xen_attach_device +ffffffff81697ba0 t xen_attach_print +ffffffff81697c00 T xen_hotplug +ffffffff81697e60 T xen_unplug_emulated +ffffffff81698000 T xs_attach +ffffffff81698420 T xs_intr +ffffffff81698880 T xs_get_msg +ffffffff81698970 T xs_put_msg +ffffffff81698a10 T xs_geterror +ffffffff81698c20 T xs_poll +ffffffff81698c90 T xs_output +ffffffff81698e40 T xs_ring_put +ffffffff81698f40 T xs_start +ffffffff81699090 T xs_reply +ffffffff816991f0 T xs_ring_get +ffffffff816992f0 T xs_event +ffffffff81699400 T xs_resfree +ffffffff81699470 T xs_parse +ffffffff816996f0 T xs_cmd +ffffffff81699c00 T xs_watch +ffffffff81699e20 T xs_getnum +ffffffff81699f60 T xs_getprop +ffffffff8169a0e0 T xs_setnum +ffffffff8169a240 T xs_setprop +ffffffff8169a340 T xs_cmpprop +ffffffff8169a4b0 T xs_await_transition +ffffffff8169a5b0 T xs_kvop +ffffffff8169b000 T xnf_match +ffffffff8169b050 T xnf_attach +ffffffff8169b330 T xnf_detach +ffffffff8169b3c0 T xnf_lladdr +ffffffff8169b6e0 T xnf_intr +ffffffff8169b740 T xnf_capabilities +ffffffff8169b8b0 T xnf_rx_ring_create +ffffffff8169bae0 T xnf_tx_ring_create +ffffffff8169bd70 T xnf_rx_ring_destroy +ffffffff8169bf20 T xnf_init_backend +ffffffff8169c150 T xnf_tx_ring_destroy +ffffffff8169c300 T xnf_ioctl +ffffffff8169c4c0 T xnf_start +ffffffff8169c690 T xnf_watchdog +ffffffff8169c700 T xnf_media_change +ffffffff8169c730 T xnf_media_status +ffffffff8169c770 T xnf_stop +ffffffff8169c830 T xnf_init +ffffffff8169c8c0 T xnf_iff +ffffffff8169c8f0 T xnf_rx_ring_fill +ffffffff8169cb30 T xnf_tx_ring_drain +ffffffff8169cb80 T xnf_rx_ring_drain +ffffffff8169cbd0 T xnf_encap +ffffffff8169cfd0 T xnf_txeof +ffffffff8169d210 T xnf_rxeof +ffffffff8169e000 T xbf_match +ffffffff8169e050 T xbf_attach +ffffffff8169e260 T xbf_detach +ffffffff8169e310 T xbf_scsi_cmd +ffffffff8169e6d0 T xbf_get_type +ffffffff8169e8a0 T xbf_intr +ffffffff8169ea40 T xbf_init +ffffffff8169efd0 T xbf_stop +ffffffff8169f140 T xbf_complete_cmd +ffffffff8169f3f0 T xbf_reclaim_cmd +ffffffff8169f460 T xbf_scsi_done +ffffffff8169f4a0 T xbf_scsi_inq +ffffffff8169f630 T xbf_scsi_capacity +ffffffff8169f720 T xbf_scsi_capacity16 +ffffffff8169f850 T xbf_submit_cmd +ffffffff8169fb50 T xbf_poll_cmd +ffffffff8169fc00 T xbf_load_cmd +ffffffff8169fe00 T xbf_bounce_cmd +ffffffff816a0020 T xbf_dma_alloc +ffffffff816a0270 T xbf_dma_free +ffffffff816a0350 T xbf_scsi_inquiry +ffffffff816a04b0 T xbf_ring_create +ffffffff816a05e0 T xbf_ring_destroy +ffffffff816a0700 T xbf_alloc_ccbs +ffffffff816a0a00 T xbf_free_ccbs +ffffffff816a0b00 T xbf_put_ccb +ffffffff816a0b80 T xbf_get_ccb +ffffffff816a1000 T hv_channel_offer +ffffffff816a10b0 T hv_channel_rescind +ffffffff816a10e0 T hv_channel_delivered +ffffffff816a1100 T hv_channel_response +ffffffff816a1240 T hv_gettime +ffffffff816a1270 T hv_match +ffffffff816a12d0 T hv_attach +ffffffff816a1420 T hv_set_version +ffffffff816a1460 T hv_init_hypercall +ffffffff816a1500 T hv_init_interrupts +ffffffff816a1680 T hv_vmbus_connect +ffffffff816a1a70 T hv_channel_scan +ffffffff816a1c90 T hv_attach_devices +ffffffff816a1dd0 T hv_delay +ffffffff816a1e50 T hv_hypercall +ffffffff816a1f30 T hv_init_synic +ffffffff816a2090 T hv_cmd +ffffffff816a2220 T hv_start +ffffffff816a2480 T hv_reply +ffffffff816a2550 T hv_intr +ffffffff816a2580 T hv_wait +ffffffff816a26b0 t hv_reply_done +ffffffff816a2740 T hv_intr_signal +ffffffff816a27d0 T hv_event_intr +ffffffff816a29c0 T hv_message_intr +ffffffff816a2b00 T hv_channel_lookup +ffffffff816a2b60 T hv_channel_schedule +ffffffff816a2bf0 T hv_guid_sprint +ffffffff816a2d40 T hv_process_offer +ffffffff816a2f90 T hv_channel_ring_create +ffffffff816a3230 T hv_handle_alloc +ffffffff816a3910 T hv_channel_ring_destroy +ffffffff816a3a40 T hv_handle_free +ffffffff816a3ac0 T hv_channel_open +ffffffff816a3d40 T hv_channel_close +ffffffff816a3f60 T hv_channel_intr +ffffffff816a4080 T hv_channel_ready +ffffffff816a40d0 T hv_channel_unpause +ffffffff816a4130 T hv_channel_pause +ffffffff816a4170 T hv_channel_setdeferred +ffffffff816a41f0 T hv_ring_write +ffffffff816a4470 T hv_channel_send +ffffffff816a4630 T hv_channel_send_sgl +ffffffff816a4830 T hv_channel_send_prpl +ffffffff816a4a40 T hv_ring_peek +ffffffff816a4b20 T hv_ring_read +ffffffff816a4c50 T hv_channel_recv +ffffffff816a4f40 t hv_attach_print +ffffffff816a4f90 T hv_evcount_attach +ffffffff816a5000 T hv_attach_icdevs +ffffffff816a51b0 T hv_heartbeat_attach +ffffffff816a5240 T hv_heartbeat +ffffffff816a5440 T hv_shutdown_attach +ffffffff816a54e0 t hv_shutdown_task +ffffffff816a54f0 T hv_shutdown +ffffffff816a5740 T hv_timesync_attach +ffffffff816a5810 T hv_timesync +ffffffff816a5af0 T hv_kvp_attach +ffffffff816a5e50 t kvp_pool_insert +ffffffff816a5f90 T hv_kvop +ffffffff816a63d0 T hv_kvp +ffffffff816a7230 t kvp_pool_import +ffffffff816a7470 t kvp_pool_export +ffffffff816a8000 T hvn_match +ffffffff816a8050 T hvn_attach +ffffffff816a8320 T hvn_nvs_attach +ffffffff816a8660 T hvn_rx_ring_create +ffffffff816a8810 T hvn_tx_ring_create +ffffffff816a89f0 T hvn_ioctl +ffffffff816a8c20 T hvn_start +ffffffff816a8dc0 T hvn_media_change +ffffffff816a8df0 T hvn_media_status +ffffffff816a8eb0 T hvn_rndis_attach +ffffffff816a9510 T hvn_set_capabilities +ffffffff816a95c0 T hvn_rndis_detach +ffffffff816a97e0 T hvn_get_lladdr +ffffffff816a9860 T hvn_rx_ring_destroy +ffffffff816a9960 T hvn_tx_ring_destroy +ffffffff816a9ac0 T hvn_nvs_detach +ffffffff816a9b20 T hvn_init +ffffffff816a9c50 T hvn_stop +ffffffff816a9ce0 T hvn_iff +ffffffff816a9d90 T hvn_get_link_status +ffffffff816a9e00 T hvn_link_status +ffffffff816a9e50 T hvn_rndis_set +ffffffff816aa130 T hvn_rndis_close +ffffffff816aa180 T hvn_encap +ffffffff816aa4e0 T hvn_rndis_output +ffffffff816aa520 T hvn_decap +ffffffff816aa5c0 T hvn_txeof +ffffffff816aa6d0 T hvn_nvs_cmd +ffffffff816aa8f0 T hvn_rndis_query +ffffffff816aabc0 T hvn_set_lladdr +ffffffff816aabf0 T hvn_nvs_intr +ffffffff816aade0 T hvn_rndis_input +ffffffff816aafe0 T hvn_nvs_ack +ffffffff816ab140 T hvn_rndis_cmd +ffffffff816ab650 T hvn_rxeof +ffffffff816ab8b0 T hvn_rndis_complete +ffffffff816aba80 T hvn_rndis_status +ffffffff816ac000 T hvs_match +ffffffff816ac070 T hvs_attach +ffffffff816ac250 T hvs_scsi_cmd +ffffffff816ac630 T hvs_intr +ffffffff816ac780 T hvs_alloc_ccbs +ffffffff816ac9c0 T hvs_connect +ffffffff816acea0 T hvs_scsi_probe +ffffffff816acee0 T hvs_scsi_done +ffffffff816acf50 T hvs_scsi_cmd_done +ffffffff816ad200 T hvs_poll +ffffffff816ad2e0 T hvs_start +ffffffff816ad3d0 T hvs_poll_done +ffffffff816ad490 T hvs_empty_done +ffffffff816ad4c0 T hvs_put_ccb +ffffffff816ad550 T hvs_get_ccb +ffffffff816ad5d0 T hvs_free_ccbs +ffffffff816ae000 T virtio_device_string +ffffffff816ae040 T virtio_reset +ffffffff816ae090 T virtio_reinit_start +ffffffff816ae1a0 T virtio_init_vq +ffffffff816ae3b0 T virtio_reinit_end +ffffffff816ae3d0 T virtio_check_vqs +ffffffff816ae500 T virtio_check_vq +ffffffff816ae5e0 T virtio_alloc_vq +ffffffff816ae9d0 T virtio_free_vq +ffffffff816aeae0 T vq_alloc_entry +ffffffff816aeb20 T vq_free_entry +ffffffff816aeb60 T virtio_enqueue_prep +ffffffff816aebc0 T virtio_enqueue_reserve +ffffffff816aeeb0 T virtio_enqueue_abort +ffffffff816aef60 T virtio_enqueue +ffffffff816af040 T virtio_enqueue_p +ffffffff816af0c0 T virtio_enqueue_commit +ffffffff816af300 T virtio_enqueue_trim +ffffffff816af420 T virtio_dequeue +ffffffff816af500 T virtio_dequeue_commit +ffffffff816af5b0 T virtio_postpone_intr +ffffffff816af660 T virtio_nused +ffffffff816af6a0 T virtio_postpone_intr_smart +ffffffff816af750 T virtio_postpone_intr_far +ffffffff816af7f0 T virtio_stop_vq_intr +ffffffff816af880 T virtio_start_vq_intr +ffffffff816b0000 T vio_match +ffffffff816b0040 T vio_attach +ffffffff816b05b0 T vio_alloc_dmamem +ffffffff816b0730 T vio_free_dmamem +ffffffff816b07b0 T vio_alloc_mem +ffffffff816b0b40 T vio_get_lladdr +ffffffff816b0c30 T vio_put_lladdr +ffffffff816b0d00 T vio_rx_intr +ffffffff816b0d80 T vio_tx_intr +ffffffff816b0de0 T vio_ctrleof +ffffffff816b0e90 T vio_start +ffffffff816b1290 T vio_ioctl +ffffffff816b1440 T vio_media_change +ffffffff816b1470 T vio_media_status +ffffffff816b1530 T vio_config_change +ffffffff816b15c0 T vio_txtick +ffffffff816b1620 T vio_rxtick +ffffffff816b1660 T vio_link_state +ffffffff816b16f0 T vio_init +ffffffff816b17d0 T vio_stop +ffffffff816b1a20 T vio_populate_rx_mbufs +ffffffff816b1cd0 T vio_iff +ffffffff816b1eb0 T vio_rxeof +ffffffff816b2180 T vio_tx_drain +ffffffff816b2240 T vio_rx_drain +ffffffff816b22f0 T vio_tx_offload +ffffffff816b24b0 T vio_txeof +ffffffff816b2670 T vio_encap +ffffffff816b2740 T vio_add_rx_mbuf +ffffffff816b2810 T vio_free_rx_mbuf +ffffffff816b2890 T vio_rx_offload +ffffffff816b2940 T vio_ctrl_rx +ffffffff816b2d60 T vio_wait_ctrl +ffffffff816b2e30 T vio_wait_ctrl_done +ffffffff816b2f00 T vio_ctrl_wakeup +ffffffff816b2f20 T vio_set_rx_filter +ffffffff816b4000 T vioblk_match +ffffffff816b4040 T vioblk_attach +ffffffff816b4300 T vioblk_scsi_cmd +ffffffff816b49d0 T vioblk_vq_done +ffffffff816b4b20 T vioblk_req_get +ffffffff816b4b90 T vioblk_req_put +ffffffff816b4be0 T vioblk_alloc_reqs +ffffffff816b50f0 T vioblk_vq_done1 +ffffffff816b5230 T vioblk_reset +ffffffff816b52e0 T vioblk_scsi_done +ffffffff816b5300 T vioblk_scsi_inq +ffffffff816b5440 T vioblk_scsi_capacity +ffffffff816b54e0 T vioblk_scsi_capacity16 +ffffffff816b6000 T viomb_match +ffffffff816b6040 T viomb_attach +ffffffff816b6430 T viomb_config_change +ffffffff816b6480 T viomb_inflate_intr +ffffffff816b6600 T viomb_deflate_intr +ffffffff816b6740 T viomb_read_config +ffffffff816b67c0 T viomb_worker +ffffffff816b6870 T viomb_inflate +ffffffff816b6a50 T viomb_deflate +ffffffff816b6c70 T viomb_vq_dequeue +ffffffff816b7000 T viornd_match +ffffffff816b7040 T viornd_attach +ffffffff816b72a0 T viornd_vq_done +ffffffff816b73c0 T viornd_tick +ffffffff816b8000 T vioscsi_match +ffffffff816b8040 T vioscsi_attach +ffffffff816b8310 T vioscsi_scsi_cmd +ffffffff816b8630 T vioscsi_vq_done +ffffffff816b8710 T vioscsi_req_get +ffffffff816b8780 T vioscsi_req_put +ffffffff816b87d0 T vioscsi_alloc_reqs +ffffffff816b8c20 T vioscsi_req_done +ffffffff816b9000 T vmmci_match +ffffffff816b9040 T vmmci_attach +ffffffff816b9140 T vmmci_activate +ffffffff816b91c0 T vmmci_config_change +ffffffff816b92d0 T vmmci_tick_hook +ffffffff816b93d0 T vmmci_tick +ffffffff816ba000 T pcimatch +ffffffff816ba080 T pciattach +ffffffff816ba1c0 T pcidetach +ffffffff816ba1d0 T pciactivate +ffffffff816ba280 T pci_enumerate_bus +ffffffff816ba430 T pci_reserve_resources +ffffffff816baa10 T pci_primary_vga +ffffffff816baab0 T pci_detach_devices +ffffffff816bab90 T pci_suspend +ffffffff816bada0 T pci_resume +ffffffff816bafe0 T pci_powerdown +ffffffff816bb0e0 T pci_get_capability +ffffffff816bb1f0 T pci_suspend_msix +ffffffff816bb350 T pci_get_powerstate +ffffffff816bb3d0 T pci_set_powerstate +ffffffff816bb4f0 T pci_resume_msix +ffffffff816bb660 T pciprint +ffffffff816bb750 T pcisubmatch +ffffffff816bb7b0 T pci_probe_device +ffffffff816bbcb0 T pci_get_ht_capability +ffffffff816bbda0 T pci_alloc_msix_table +ffffffff816bbe20 T pci_free_msix_table +ffffffff816bbea0 T pci_get_ext_capability +ffffffff816bbf80 T pci_requester_id +ffffffff816bbfe0 T pci_find_device +ffffffff816bc080 T pci_vpd_read +ffffffff816bc1f0 T pci_vpd_write +ffffffff816bc380 T pci_matchbyid +ffffffff816bc3f0 T pci_disable_legacy_vga +ffffffff816bc460 T pciopen +ffffffff816bc4d0 T pciclose +ffffffff816bc510 T pciioctl +ffffffff816bcd20 T pci_disable_vga +ffffffff816bcd60 T pci_unroute_vga +ffffffff816bcdf0 T pci_route_vga +ffffffff816bce80 T pci_enable_vga +ffffffff816bcec0 T pci_intr_msix_count +ffffffff816bd000 T obsd_pci_io_find +ffffffff816bd180 T obsd_pci_mem_find +ffffffff816bd3f0 T pci_mapreg_type +ffffffff816bd470 T pci_mapreg_probe +ffffffff816bd590 T pci_mapreg_info +ffffffff816bd5f0 T pci_mapreg_assign +ffffffff816bd7e0 T pci_mapreg_map +ffffffff816be000 T pci_lookup_quirkdata +ffffffff816bf000 T pci_findvendor +ffffffff816bf060 T pci_findproduct +ffffffff816bf0d0 T pci_devinfo +ffffffff816c0000 T vga_pci_match +ffffffff816c00a0 T vga_pci_attach +ffffffff816c0200 T vga_pci_activate +ffffffff816c02a0 T vga_save_state +ffffffff816c0750 T vga_restore_state +ffffffff816c0ca0 T vga_pci_mmap +ffffffff816c0cd0 T vga_pci_cnattach +ffffffff816c0cf0 T vga_pci_ioctl +ffffffff816c1000 T cy82c693_init +ffffffff816c10c0 T cy82c693_read +ffffffff816c1120 T cy82c693_write +ffffffff816c2000 t ahc_aic785X_setup +ffffffff816c2080 t ahc_aic7860_setup +ffffffff816c2100 t ahc_apa1480_setup +ffffffff816c2180 t ahc_aic7870_setup +ffffffff816c21e0 t ahc_aha394X_setup +ffffffff816c2280 t ahc_aha398X_setup +ffffffff816c2330 t ahc_aha494X_setup +ffffffff816c23d0 t ahc_aic7880_setup +ffffffff816c2460 t ahc_aha394XU_setup +ffffffff816c2520 t ahc_aha398XU_setup +ffffffff816c25f0 t ahc_aha2940Pro_setup +ffffffff816c2680 t ahc_aic7890_setup +ffffffff816c26f0 t ahc_aic7892_setup +ffffffff816c2750 t ahc_aha29160C_setup +ffffffff816c27c0 t ahc_aic7895_setup +ffffffff816c2890 t ahc_aic7896_setup +ffffffff816c2900 t ahc_aic7899_setup +ffffffff816c2970 t ahc_raid_setup +ffffffff816c29c0 T ahc_pci_probe +ffffffff816c2a90 T ahc_pci_attach +ffffffff816c3590 T ahc_find_pci_device +ffffffff816c3670 T ahc_pci_intr +ffffffff816c38d0 t ahc_pci_chip_init +ffffffff816c3a80 t ahc_probe_ext_scbram +ffffffff816c3e00 t ahc_scbram_config +ffffffff816c4000 T ahd_aic7901_setup +ffffffff816c4020 T ahd_aic7901A_setup +ffffffff816c4040 T ahd_aic7902_setup +ffffffff816c4070 T ahd_pci_probe +ffffffff816c40d0 T ahd_pci_attach +ffffffff816c4570 T ahd_activate +ffffffff816c45d0 T ahd_find_pci_device +ffffffff816c4890 T ahd_pci_test_register_access +ffffffff816c4b40 T ahd_pci_intr +ffffffff816c4d80 T ahd_check_extport +ffffffff816c5040 T ahd_configure_termination +ffffffff816c5240 T ahd_pci_split_intr +ffffffff816c5960 T ahd_aic790X_setup +ffffffff816c6000 T adw_pci_match +ffffffff816c6030 T adw_pci_attach +ffffffff816c7000 T AdwInitFromEEPROM +ffffffff816c75e0 T AdwGetEEPROMConfig +ffffffff816c7800 T AdwReadEEPWord +ffffffff816c78a0 T AdwSetEEPROMConfig +ffffffff816c7b80 T AdwInitDriver +ffffffff816c86e0 T AdwRamSelfTest +ffffffff816c8890 T AdwLoadMCode +ffffffff816c8cb0 T AdwASC3550Cabling +ffffffff816c8e10 T AdwASC38C0800Cabling +ffffffff816c8f70 T AdwASC38C1600Cabling +ffffffff816c90a0 T AdwResetCCB +ffffffff816c9130 T AdwSleepMilliSecond +ffffffff816c9150 T AdwWaitEEPCmd +ffffffff816c91c0 T AdwExeScsiQueue +ffffffff816c9330 T AdwResetChip +ffffffff816c9390 T AdwSendIdleCmd +ffffffff816c9550 T AdwDelayMicroSecond +ffffffff816c9570 T AdwResetSCSIBus +ffffffff816c98a0 T AdwISR +ffffffff816c9ab0 T AdwInquiryHandling +ffffffff816ca000 T AdwInitCarriers +ffffffff816cb000 T twe_pci_match +ffffffff816cb030 T twe_pci_attach +ffffffff816cc000 T arc_match +ffffffff816cc0a0 T arc_attach +ffffffff816cc2e0 T arc_detach +ffffffff816cc390 T arc_activate +ffffffff816cc410 T arc_scsi_cmd +ffffffff816cc720 T arc_match_board +ffffffff816cc790 T arc_map_pci_resources +ffffffff816cc9a0 T arc_alloc_ccbs +ffffffff816cccf0 T arc_iop_set_conf +ffffffff816cce90 T arc_enable_all_intr +ffffffff816ccf90 T arc_bioctl +ffffffff816cd050 T arc_create_sensors +ffffffff816cd250 T arc_unmap_pci_resources +ffffffff816cd2b0 T arc_stop_bgrb_proc +ffffffff816cd330 T arc_flush_cache +ffffffff816cd3b0 T arc_intr_A +ffffffff816cd590 T arc_read +ffffffff816cd5b0 T arc_write +ffffffff816cd600 T arc_scsi_cmd_done +ffffffff816cd710 T arc_intr_C +ffffffff816cd970 T arc_intr_D +ffffffff816cdc30 T arc_intr +ffffffff816cdc80 T arc_load_xs +ffffffff816cdde0 T arc_complete +ffffffff816ce010 T arc_disable_all_intr +ffffffff816ce100 T arc_chipA_firmware +ffffffff816ce330 T arc_wait_eq +ffffffff816ce3d0 T arc_msg0 +ffffffff816ce5e0 T arc_read_region +ffffffff816ce610 T arc_chipB_firmware +ffffffff816ce6b0 T arc_chipC_firmware +ffffffff816ce8e0 T arc_chipD_firmware +ffffffff816ceb50 T arc_bio_inq +ffffffff816cecf0 T arc_bio_vol +ffffffff816cee90 T arc_bio_disk +ffffffff816cf140 T arc_bio_alarm +ffffffff816cf290 T arc_bio_blink +ffffffff816cf360 T arc_bio_alarm_state +ffffffff816cf420 T arc_lock +ffffffff816cf530 T arc_msgbuf +ffffffff816cff50 T arc_unlock +ffffffff816d0060 T arc_bio_getvol +ffffffff816d01b0 T arc_msg_cksum +ffffffff816d0260 T arc_write_region +ffffffff816d02b0 T arc_wait +ffffffff816d04f0 T arc_refresh_sensors +ffffffff816d05f0 T arc_wait_ne +ffffffff816d0690 T arc_dmamem_alloc +ffffffff816d0810 T arc_dmamem_free +ffffffff816d0890 T arc_put_ccb +ffffffff816d0900 T arc_get_ccb +ffffffff816d0970 T arc_free_ccb_src +ffffffff816d1000 T jmb_match +ffffffff816d1050 T jmb_attach +ffffffff816d1230 T jmb_print +ffffffff816d2000 T ahci_pci_match +ffffffff816d20c0 T ahci_pci_attach +ffffffff816d22d0 T ahci_pci_detach +ffffffff816d2340 T ahci_pci_activate +ffffffff816d2350 T ahci_lookup_device +ffffffff816d23c0 T ahci_no_match +ffffffff816d23f0 T ahci_vt8251_attach +ffffffff816d2420 T ahci_ati_sb_idetoahci +ffffffff816d24d0 T ahci_ati_sb600_attach +ffffffff816d2510 T ahci_ati_sb700_attach +ffffffff816d2550 T ahci_amd_hudson2_attach +ffffffff816d2590 T ahci_intel_attach +ffffffff816d25c0 T ahci_samsung_attach +ffffffff816d25f0 T ahci_map_regs +ffffffff816d2690 T ahci_map_intr +ffffffff816d2720 T ahci_unmap_regs +ffffffff816d2770 T ahci_unmap_intr +ffffffff816d3000 T nvme_pci_match +ffffffff816d3070 T nvme_pci_attach +ffffffff816d3250 T nvme_pci_detach +ffffffff816d3280 T nvme_pci_activate +ffffffff816d4000 T ami_pci_match +ffffffff816d4100 T ami_pci_attach +ffffffff816d4800 T ami_pci_find_device +ffffffff816d5000 T mfi_pci_match +ffffffff816d5080 T mfi_pci_attach +ffffffff816d5310 T mfi_pci_find_device +ffffffff816d6000 T mfii_match +ffffffff816d6090 T mfii_attach +ffffffff816d6a10 T mfii_detach +ffffffff816d6ce0 T mfii_activate +ffffffff816d6d80 T mfii_scsi_cmd +ffffffff816d7070 T mfii_scsi_ioctl +ffffffff816d70d0 T mfii_pd_scsi_cmd +ffffffff816d7350 T mfii_pd_scsi_probe +ffffffff816d7500 T mfii_find_iop +ffffffff816d7610 T mfii_get_ccb +ffffffff816d7690 T mfii_put_ccb +ffffffff816d7700 T mfii_aen +ffffffff816d7870 T mfii_abort_task +ffffffff816d7ac0 T mfii_write +ffffffff816d7b10 T mfii_transition_firmware +ffffffff816d7d50 T mfii_read +ffffffff816d7d70 T mfii_dmamem_alloc +ffffffff816d7ee0 T mfii_init_ccb +ffffffff816d8230 T mfii_initialise_firmware +ffffffff816d8530 T mfii_get_info +ffffffff816d8680 T mfii_intr +ffffffff816d8700 T mfii_syspd +ffffffff816d8800 T mfii_aen_register +ffffffff816d89d0 T mfii_mgmt +ffffffff816d8b30 T mfii_ioctl +ffffffff816d8d30 T mfii_create_sensors +ffffffff816d9040 T mfii_dmamem_free +ffffffff816d90c0 T mfii_dev_handles_smr +ffffffff816d90e0 T mfii_dev_handles_update +ffffffff816d9320 T mfii_aen_unregister +ffffffff816d9350 T mfii_dcmd_start +ffffffff816d93f0 T mfii_start +ffffffff816d9450 T mfii_scrub_ccb +ffffffff816d9530 T mfii_do_mgmt +ffffffff816d98a0 T mfii_aen_start +ffffffff816d9b30 T mfii_aen_done +ffffffff816d9b80 T mfii_aen_pd_insert +ffffffff816d9bf0 T mfii_aen_pd_remove +ffffffff816d9c40 T mfii_aen_pd_state_change +ffffffff816d9d00 T mfii_aen_ld_update +ffffffff816da030 T mfii_init_ld_sensor +ffffffff816da140 T mfii_reset_hard +ffffffff816da350 T mfii_mfa_poll +ffffffff816da560 T mfii_poll +ffffffff816da660 T mfii_poll_done +ffffffff816da6a0 T mfii_postq +ffffffff816da9d0 T mfii_exec +ffffffff816daaf0 T mfii_exec_done +ffffffff816dab40 T mfii_load_mfa +ffffffff816dac50 T mfii_empty_done +ffffffff816dac80 T mfii_done +ffffffff816dad50 T mfii_my_intr +ffffffff816dadd0 T mfii_scsi_cmd_done +ffffffff816daec0 T mfii_scsi_cmd_tmo +ffffffff816daf50 T mfii_scsi_cmd_io +ffffffff816db0c0 T mfii_scsi_cmd_cdb +ffffffff816db1f0 T mfii_ioctl_cache +ffffffff816db690 T mfii_load_ccb +ffffffff816db870 T mfii_pd_scsi_cmd_cdb +ffffffff816dba20 T mfii_abort +ffffffff816dba80 T mfii_scsi_cmd_abort_done +ffffffff816dbb00 T mfii_ioctl_inq +ffffffff816dbba0 T mfii_ioctl_vol +ffffffff816dbe10 T mfii_ioctl_disk +ffffffff816dc440 T mfii_ioctl_alarm +ffffffff816dc5d0 T mfii_ioctl_blink +ffffffff816dc900 T mfii_ioctl_setstate +ffffffff816dcd50 T mfii_ioctl_patrol +ffffffff816dd670 T mfii_bio_getitall +ffffffff816ddd70 T mfii_bio_hs +ffffffff816de2c0 t mfii_makegood +ffffffff816de920 t mfii_makespare +ffffffff816dec20 T mfii_bbu +ffffffff816df2a0 T mfii_refresh_ld_sensor +ffffffff816df320 T mfii_refresh_sensors +ffffffff816e0000 T ips_match +ffffffff816e0030 T ips_attach +ffffffff816e0af0 T ips_dmamem_alloc +ffffffff816e0c50 T ips_ccb_get +ffffffff816e0ce0 T ips_ccb_put +ffffffff816e0d40 T ips_getadapterinfo +ffffffff816e0e30 T ips_getdriveinfo +ffffffff816e0f20 T ips_getconf +ffffffff816e1010 T ips_getpg5 +ffffffff816e1110 T ips_ccb_alloc +ffffffff816e1280 T ips_intr +ffffffff816e1380 T ips_ioctl +ffffffff816e14e0 T ips_sensors +ffffffff816e1690 T ips_ccb_free +ffffffff816e1710 T ips_dmamem_free +ffffffff816e1770 T ips_scsi_cmd +ffffffff816e1ad0 T ips_load_xs +ffffffff816e1c50 T ips_done_xs +ffffffff816e1d90 T ips_start_xs +ffffffff816e1e40 T ips_scsi_pt_cmd +ffffffff816e2010 T ips_done_pt +ffffffff816e21d0 T ips_scsi_ioctl +ffffffff816e21f0 T ips_ioctl_inq +ffffffff816e22a0 T ips_ioctl_vol +ffffffff816e26a0 T ips_ioctl_disk +ffffffff816e2a80 T ips_ioctl_setstate +ffffffff816e2d20 T ips_getrblstat +ffffffff816e2e10 T ips_rebuild +ffffffff816e2f20 T ips_setstate +ffffffff816e3020 T ips_timeout +ffffffff816e30a0 T ips_cmd +ffffffff816e3140 T ips_poll +ffffffff816e3240 T ips_done +ffffffff816e3310 T ips_error +ffffffff816e33c0 T ips_error_xs +ffffffff816e3480 T ips_done_mgmt +ffffffff816e34f0 T ips_copperhead_exec +ffffffff816e35c0 T ips_copperhead_intren +ffffffff816e35f0 T ips_copperhead_isintr +ffffffff816e3670 T ips_copperhead_status +ffffffff816e3750 T ips_morpheus_exec +ffffffff816e3780 T ips_morpheus_intren +ffffffff816e37e0 T ips_morpheus_isintr +ffffffff816e3830 T ips_morpheus_status +ffffffff816e4000 T eap_match +ffffffff816e4030 T eap_attach +ffffffff816e4df0 T eap_activate +ffffffff816e4e30 T eap_open +ffffffff816e4e60 T eap_close +ffffffff816e4f40 T eap_set_params +ffffffff816e5170 T eap_round_blocksize +ffffffff816e51a0 T eap_halt_output +ffffffff816e5220 T eap_halt_input +ffffffff816e52a0 T eap1370_mixer_set_port +ffffffff816e58e0 T eap1370_mixer_get_port +ffffffff816e5a50 T eap1370_query_devinfo +ffffffff816e5e90 T eap_malloc +ffffffff816e5f40 T eap_free +ffffffff816e6040 T eap_trigger_output +ffffffff816e6290 T eap_trigger_input +ffffffff816e64d0 T eap1371_mixer_set_port +ffffffff816e64f0 T eap1371_mixer_get_port +ffffffff816e6510 T eap1371_query_devinfo +ffffffff816e6530 T eap_midi_open +ffffffff816e65f0 T eap_midi_close +ffffffff816e66a0 T eap_midi_output +ffffffff816e6750 T eap_midi_getinfo +ffffffff816e6790 T eap_resume +ffffffff816e7240 T eap1370_write_codec +ffffffff816e72e0 T eap1371_read_codec +ffffffff816e73e0 t eap1371_ready_codec +ffffffff816e7620 T eap1371_write_codec +ffffffff816e7660 T eap1371_src_wait +ffffffff816e7700 T eap1371_src_write +ffffffff816e77c0 T eap_intr +ffffffff816e79f0 T eap1371_attach_codec +ffffffff816e7a20 T eap1371_reset_codec +ffffffff816e7ad0 T eap_flags_codec +ffffffff816e7b00 T eap_allocmem +ffffffff816e7c60 T eap_freemem +ffffffff816e7cf0 T eap1370_set_mixer +ffffffff816e8000 T auacer_match +ffffffff816e8030 T auacer_attach +ffffffff816e82e0 T auacer_activate +ffffffff816e8320 T auacer_open +ffffffff816e8350 T auacer_close +ffffffff816e8380 T auacer_set_params +ffffffff816e85d0 T auacer_round_blocksize +ffffffff816e8600 T auacer_halt_output +ffffffff816e8760 T auacer_halt_input +ffffffff816e8790 T auacer_set_port +ffffffff816e87b0 T auacer_get_port +ffffffff816e87d0 T auacer_query_devinfo +ffffffff816e87f0 T auacer_allocm +ffffffff816e88b0 T auacer_freem +ffffffff816e89b0 T auacer_round_buffersize +ffffffff816e89f0 T auacer_trigger_output +ffffffff816e8ca0 T auacer_trigger_input +ffffffff816e8ce0 T auacer_intr +ffffffff816e8f40 T auacer_alloc_cdata +ffffffff816e9100 T auacer_attach_codec +ffffffff816e9130 T auacer_read_codec +ffffffff816e9280 T auacer_write_codec +ffffffff816e93d0 T auacer_reset_codec +ffffffff816e96f0 T auacer_set_rate +ffffffff816e97b0 T auacer_allocmem +ffffffff816e9910 T auacer_freemem +ffffffff816ea000 T auich_match +ffffffff816ea080 T auich_attach +ffffffff816ea6e0 T auich_activate +ffffffff816ea760 T auich_open +ffffffff816ea7c0 T auich_close +ffffffff816ea7e0 T auich_set_params +ffffffff816eaaa0 T auich_round_blocksize +ffffffff816eaad0 T auich_halt_output +ffffffff816eabe0 T auich_halt_input +ffffffff816ead90 T auich_set_port +ffffffff816eadb0 T auich_get_port +ffffffff816eadd0 T auich_query_devinfo +ffffffff816eadf0 T auich_allocm +ffffffff816eaec0 T auich_freem +ffffffff816eafb0 T auich_round_buffersize +ffffffff816eaff0 T auich_trigger_output +ffffffff816eb0e0 T auich_trigger_input +ffffffff816eb1d0 T auich_intr +ffffffff816eb3f0 T auich_alloc_cdata +ffffffff816eb5e0 T auich_reset_codec +ffffffff816eb6b0 T auich_attach_codec +ffffffff816eb6e0 T auich_read_codec +ffffffff816eb7b0 T auich_write_codec +ffffffff816eb880 T auich_flags_codec +ffffffff816eb8b0 T auich_spdif_event +ffffffff816eb8e0 T auich_resume +ffffffff816eb950 T auich_calibrate +ffffffff816ebef0 T auich_halt_pipe +ffffffff816ec000 T auich_allocmem +ffffffff816ec160 T auich_freemem +ffffffff816ec1d0 T auich_intr_pipe +ffffffff816ec300 T auich_trigger_pipe +ffffffff816ed000 T azalia_pci_match +ffffffff816ed060 T azalia_pci_attach +ffffffff816ed3c0 T azalia_pci_detach +ffffffff816ed760 T azalia_pci_activate +ffffffff816ed7e0 T azalia_open +ffffffff816ed860 T azalia_close +ffffffff816ed8b0 T azalia_set_params +ffffffff816ed960 T azalia_halt_output +ffffffff816eda40 T azalia_halt_input +ffffffff816edb20 T azalia_set_port +ffffffff816edbb0 T azalia_get_port +ffffffff816edc30 T azalia_query_devinfo +ffffffff816edcb0 T azalia_allocm +ffffffff816edd40 T azalia_freem +ffffffff816ede10 T azalia_round_buffersize +ffffffff816ede50 T azalia_trigger_output +ffffffff816edf50 T azalia_trigger_input +ffffffff816ee050 T azalia_set_blksz +ffffffff816ee0b0 T azalia_set_nblks +ffffffff816ee0f0 T azalia_pci_read +ffffffff816ee140 T azalia_pci_write +ffffffff816ee1b0 T azalia_configure_pci +ffffffff816ee840 T azalia_intr +ffffffff816ee980 T azalia_init +ffffffff816eeac0 T azalia_init_codecs +ffffffff816eee60 T azalia_init_streams +ffffffff816eef70 T azalia_suspend +ffffffff816ef150 T azalia_shutdown +ffffffff816ef260 T azalia_resume +ffffffff816ef360 T azalia_free_dmamem +ffffffff816ef400 T azalia_codec_delete +ffffffff816ef590 T azalia_stream_intr +ffffffff816ef700 T azalia_rirb_intr +ffffffff816ef830 T azalia_halt_corb +ffffffff816ef960 T azalia_halt_rirb +ffffffff816efa20 T azalia_print_codec +ffffffff816efaa0 T azalia_reset +ffffffff816efbf0 T azalia_get_ctrlr_caps +ffffffff816efed0 T azalia_init_corb +ffffffff816f00f0 T azalia_init_rirb +ffffffff816f0400 T azalia_codec_init +ffffffff816f0c00 T azalia_comresp +ffffffff816f0d40 T azalia_stream_init +ffffffff816f0de0 T azalia_alloc_dmamem +ffffffff816f0f80 T azalia_rirb_kick_unsol_events +ffffffff816f1070 T azalia_set_command +ffffffff816f1170 T azalia_get_response +ffffffff816f1300 T azalia_resume_codec +ffffffff816f1460 T azalia_widget_init_pin +ffffffff816f1620 T azalia_codec_print_audiofunc +ffffffff816f1650 T azalia_widget_init +ffffffff816f1840 T azalia_widget_init_connection +ffffffff816f1c00 T azalia_widget_print_widget +ffffffff816f1c30 T azalia_widget_check_conn +ffffffff816f1d20 T azalia_codec_find_defdac +ffffffff816f1e60 T azalia_codec_find_defadc +ffffffff816f1f00 T azalia_codec_select_micadc +ffffffff816f2090 T azalia_codec_sort_pins +ffffffff816f2b50 T azalia_codec_find_inputmixer +ffffffff816f2d10 T azalia_codec_select_dacs +ffffffff816f2fd0 T azalia_codec_select_spkrdac +ffffffff816f32f0 T azalia_codec_print_groups +ffffffff816f3320 T azalia_widget_label_widgets +ffffffff816f3ab0 T azalia_codec_construct_format +ffffffff816f3f70 T azalia_codec_init_volgroups +ffffffff816f4590 T azalia_codec_find_defadc_sub +ffffffff816f4700 T azalia_codec_add_bits +ffffffff816f4840 T azalia_codec_add_format +ffffffff816f4aa0 T azalia_codec_connect_stream +ffffffff816f4cd0 T azalia_codec_disconnect_stream +ffffffff816f4e20 T azalia_widget_init_audio +ffffffff816f4f20 T azalia_widget_sole_conn +ffffffff816f5200 T azalia_widget_print_audio +ffffffff816f5230 T azalia_widget_print_pin +ffffffff816f5260 T azalia_stream_reset +ffffffff816f5410 T azalia_stream_start +ffffffff816f5680 T azalia_stream_halt +ffffffff816f5740 T azalia_match_format +ffffffff816f57c0 T azalia_set_params_sub +ffffffff816f5ab0 T azalia_params2fmt +ffffffff816f6000 T azalia_codec_init_vtbl +ffffffff816f7190 T azalia_widget_enabled +ffffffff816f71e0 T azalia_init_dacgroup +ffffffff816f7320 T azalia_add_convgroup +ffffffff816f7770 T azalia_codec_fnode +ffffffff816f78c0 T azalia_unsol_event +ffffffff816f7ba0 T azalia_mixer_set +ffffffff816f89b0 T azalia_mixer_init +ffffffff816fa7e0 T azalia_mixer_ensure_capacity +ffffffff816fa8e0 T azalia_devinfo_offon +ffffffff816fa950 T azalia_mixer_fix_indexes +ffffffff816faa30 T azalia_mixer_default +ffffffff816fafd0 T azalia_mixer_get +ffffffff816fb830 T azalia_codec_enable_unsol +ffffffff816fb990 T azalia_mixer_delete +ffffffff816fb9f0 T azalia_mixer_from_device_value +ffffffff816fba90 T azalia_mixer_to_device_value +ffffffff816fbb40 T azalia_gpio_unmute +ffffffff816fbc30 T azalia_ampcap_ov +ffffffff816fbca0 T azalia_pin_config_ov +ffffffff816fbd10 T azalia_codec_gpio_quirks +ffffffff816fbdd0 T azalia_codec_widget_quirks +ffffffff816fc030 T azalia_codec_init_dolby_atmos +ffffffff816fd000 T envymatch +ffffffff816fd030 T envyattach +ffffffff816fd320 T envydetach +ffffffff816fd3c0 T envyactivate +ffffffff816fd400 T envy_open +ffffffff816fd430 T envy_close +ffffffff816fd460 T envy_set_params +ffffffff816fd670 T envy_round_blocksize +ffffffff816fd6a0 T envy_halt_output +ffffffff816fd740 T envy_halt_input +ffffffff816fd7e0 T envy_set_port +ffffffff816fd9c0 T envy_get_port +ffffffff816fdb80 T envy_query_devinfo +ffffffff816fdea0 T envy_allocm +ffffffff816fe030 T envy_freem +ffffffff816fe0d0 T envy_trigger_output +ffffffff816fe270 T envy_trigger_input +ffffffff816fe410 T envy_midi_open +ffffffff816fe570 T envy_midi_close +ffffffff816fe620 T envy_midi_output +ffffffff816fe6d0 T envy_midi_getinfo +ffffffff816fe710 T ak4524_dac_ndev +ffffffff816fe750 T ak4524_dac_devinfo +ffffffff816fe870 T ak4524_dac_get +ffffffff816fe900 T ak4524_dac_set +ffffffff816fe9e0 T ak4524_adc_ndev +ffffffff816fea10 T ak4524_adc_devinfo +ffffffff816fea80 T ak4524_adc_get +ffffffff816feae0 T ak4524_adc_set +ffffffff816feb70 T ak4358_dac_ndev +ffffffff816feba0 T ak4358_dac_devinfo +ffffffff816fec10 T ak4358_dac_get +ffffffff816fec60 T ak4358_dac_set +ffffffff816fece0 T ak5365_adc_ndev +ffffffff816fed20 T ak5365_adc_devinfo +ffffffff816feea0 T ak5365_adc_get +ffffffff816fef10 T ak5365_adc_set +ffffffff816fefb0 T unkenvy_codec_ndev +ffffffff816fefe0 T delta_init +ffffffff816ff100 T delta_codec_write +ffffffff816ff5b0 T ewx_codec_write +ffffffff816ffab0 T unkenvy_init +ffffffff816ffae0 T unkenvy_codec_write +ffffffff816ffb10 T julia_init +ffffffff816ffbf0 T julia_codec_write +ffffffff816ffc10 T julia_set_rate +ffffffff816ffe30 T ap192k_init +ffffffff81700150 T ap192k_codec_write +ffffffff817005a0 T ap192k_set_rate +ffffffff817007c0 T revo51_init +ffffffff81700ae0 T revo51_codec_write +ffffffff81701000 T envy_ac97_init +ffffffff817010a0 T dynex_sc51_init +ffffffff81701150 T envy_codec_write +ffffffff81701190 T envy_gpio_getstate +ffffffff81701290 T envy_gpio_setstate +ffffffff81701370 T ak4358_set_rate +ffffffff817013f0 T envy_gpio_i2c_start_bit +ffffffff81701720 T envy_gpio_i2c_byte_out +ffffffff81701c40 T envy_gpio_i2c_stop_bit +ffffffff81701eb0 T envy_ac97_attach_codec +ffffffff81701ee0 T envy_ac97_read_codec +ffffffff817020b0 T envy_ac97_write_codec +ffffffff81702210 T envy_ac97_reset_codec +ffffffff81702340 T envy_ac97_flags_codec +ffffffff81702370 T envy_i2c_write +ffffffff817025d0 T envy_codec_read +ffffffff81702620 T envy_ccs_read +ffffffff81702670 T envy_ccs_write +ffffffff817026d0 T envy_mt_read_1 +ffffffff81702720 T envy_mt_write_1 +ffffffff81702780 T envy_mt_read_2 +ffffffff817027d0 T envy_mt_write_2 +ffffffff81702830 T envy_mt_read_4 +ffffffff81702880 T envy_mt_write_4 +ffffffff817028d0 T envy_cci_read +ffffffff81702950 T envy_cci_write +ffffffff817029e0 T envy_gpio_getmask +ffffffff81702ae0 T envy_gpio_setmask +ffffffff81702bc0 T envy_gpio_getdir +ffffffff81702cc0 T envy_gpio_setdir +ffffffff81702da0 T envy_i2c_wait +ffffffff81702e70 T envy_i2c_read +ffffffff817030a0 T envy_eeprom_gpioxxx +ffffffff81703110 T envy_ac97_wait +ffffffff817031c0 T envy_midi_wait +ffffffff817032b0 T envy_reset +ffffffff81703a10 T envy_lineout_getsrc +ffffffff81703b30 T envy_lineout_setsrc +ffffffff81703d30 T envy_spdout_getsrc +ffffffff81703dd0 T envy_spdout_setsrc +ffffffff81703ec0 T envy_mon_getvol +ffffffff81703f50 T envy_mon_setvol +ffffffff81703fe0 T envy_intr +ffffffff81705000 T emuxki_match +ffffffff81705030 T emuxki_attach +ffffffff81705320 T emuxki_detach +ffffffff817053d0 T emuxki_activate +ffffffff81705420 T emuxki_open +ffffffff817054d0 T emuxki_close +ffffffff81705540 T emuxki_set_params +ffffffff817055c0 T emuxki_round_blocksize +ffffffff81705610 T emuxki_halt_output +ffffffff81705660 T emuxki_halt_input +ffffffff817056b0 T emuxki_set_port +ffffffff817056d0 T emuxki_get_port +ffffffff817056f0 T emuxki_query_devinfo +ffffffff81705710 T emuxki_allocm +ffffffff81705740 T emuxki_freem +ffffffff81705900 T emuxki_round_buffersize +ffffffff817059e0 T emuxki_trigger_output +ffffffff81705ab0 T emuxki_trigger_input +ffffffff81705b60 T emuxki_dmamem_delete +ffffffff81705ba0 T emuxki_dmamem_alloc +ffffffff81705dd0 T emuxki_dmamem_free +ffffffff81705e50 T emuxki_pci_shutdown +ffffffff81705eb0 T emuxki_scinit +ffffffff81706040 T emuxki_init +ffffffff81706e00 T emuxki_ac97_init +ffffffff81706e60 T emuxki_ac97_attach +ffffffff81706e90 T emuxki_ac97_read +ffffffff81706f30 T emuxki_ac97_write +ffffffff81706fd0 T emuxki_ac97_reset +ffffffff81707000 T emuxki_intr +ffffffff81707170 T emuxki_shutdown +ffffffff81707690 T emuxki_write_micro +ffffffff81707790 T emuxki_dsp_addop +ffffffff81707940 T emuxki_initfx +ffffffff817082b0 T emuxki_mem_new +ffffffff81708360 T emuxki_mem_delete +ffffffff81708410 T emuxki_pmem_alloc +ffffffff81708610 T emuxki_rmem_alloc +ffffffff81708700 T emuxki_chanparms_set_defaults +ffffffff817087f0 T emuxki_channel_new +ffffffff81708920 T emuxki_channel_delete +ffffffff81708950 T emuxki_channel_set_fxsend +ffffffff817089f0 T emuxki_channel_set_srate +ffffffff81708d20 T emuxki_channel_set_bufparms +ffffffff81708d60 T emuxki_channel_commit_fx +ffffffff81708fd0 T emuxki_channel_commit_parms +ffffffff81709590 T emuxki_channel_start +ffffffff81709ae0 T emuxki_channel_stop +ffffffff81709d40 T emuxki_voice_channel_create +ffffffff81709e50 T emuxki_voice_channel_destroy +ffffffff81709ef0 T emuxki_recsrc_reserve +ffffffff81709f50 T emuxki_voice_recsrc_release +ffffffff81709f90 T emuxki_voice_dataloc_create +ffffffff8170a010 T emuxki_voice_dataloc_destroy +ffffffff8170a0e0 T emuxki_voice_new +ffffffff8170a2c0 T emuxki_voice_delete +ffffffff8170a420 T emuxki_voice_halt +ffffffff8170a540 T emuxki_voice_set_stereo +ffffffff8170a710 T emuxki_voice_set_srate +ffffffff8170a850 T emuxki_voice_adc_rate +ffffffff8170a960 T emuxki_voice_set_audioparms +ffffffff8170a9f0 T emuxki_voice_set_bufparms +ffffffff8170aca0 T emuxki_voice_commit_parms +ffffffff8170ad00 T emuxki_voice_curaddr +ffffffff8170ae10 T emuxki_resched_timer +ffffffff8170af60 T emuxki_voice_start +ffffffff8170b1a0 T emuxki_set_vparms +ffffffff8170c000 T auixp_match +ffffffff8170c030 T auixp_attach +ffffffff8170c350 T auixp_activate +ffffffff8170c470 T auixp_open +ffffffff8170c4a0 T auixp_close +ffffffff8170c4d0 T auixp_set_params +ffffffff8170c600 T auixp_round_blocksize +ffffffff8170c640 T auixp_commit_settings +ffffffff8170c7e0 T auixp_halt_output +ffffffff8170c8f0 T auixp_halt_input +ffffffff8170ca00 T auixp_set_port +ffffffff8170ca20 T auixp_get_port +ffffffff8170ca40 T auixp_query_devinfo +ffffffff8170ca60 T auixp_malloc +ffffffff8170cb30 T auixp_free +ffffffff8170cc50 T auixp_trigger_output +ffffffff8170cf10 T auixp_trigger_input +ffffffff8170d1d0 T auixp_allocmem +ffffffff8170d340 T auixp_freemem +ffffffff8170d3e0 T auixp_link_daisychain +ffffffff8170d4f0 T auixp_disable_dma +ffffffff8170d570 T auixp_allocate_dma_chain +ffffffff8170d640 T auixp_program_dma_chain +ffffffff8170d730 T auixp_enable_dma +ffffffff8170d7d0 T auixp_dma_update +ffffffff8170d810 T auixp_update_busbusy +ffffffff8170d890 T auixp_intr +ffffffff8170da20 T auixp_disable_interrupts +ffffffff8170da70 T auixp_init +ffffffff8170db10 T auixp_post_config +ffffffff8170dc10 T auixp_autodetect_codecs +ffffffff8170de40 T auixp_enable_interrupts +ffffffff8170dea0 T auixp_detach +ffffffff8170df50 T auixp_attach_codec +ffffffff8170df80 T auixp_read_codec +ffffffff8170e160 T auixp_wait_for_codecs +ffffffff8170e210 T auixp_write_codec +ffffffff8170e310 T auixp_reset_codec +ffffffff8170e340 T auixp_flags_codec +ffffffff8170e370 T auixp_reset_aclink +ffffffff8170f000 T cs4280_match +ffffffff8170f030 T cs4280_attach +ffffffff8170f280 T cs4280_activate +ffffffff8170f480 T cs4280_open +ffffffff8170f4b0 T cs4280_close +ffffffff8170f5a0 T cs4280_set_params +ffffffff8170f780 T cs4280_round_blocksize +ffffffff8170f7c0 T cs4280_halt_output +ffffffff8170f850 T cs4280_halt_input +ffffffff8170f8e0 T cs4280_mixer_set_port +ffffffff8170f900 T cs4280_mixer_get_port +ffffffff8170f920 T cs4280_query_devinfo +ffffffff8170f940 T cs4280_malloc +ffffffff8170fa20 T cs4280_free +ffffffff8170fb30 T cs4280_trigger_output +ffffffff8170feb0 T cs4280_trigger_input +ffffffff81710110 T cs4280_read_codec +ffffffff81710290 T cs4280_src_wait +ffffffff81710320 T cs4280_write_codec +ffffffff81710430 T cs4280_set_adc_rate +ffffffff817106a0 T cs4280_set_dac_rate +ffffffff81710760 T cs4280_attachhook +ffffffff817108c0 T cs4280_init2 +ffffffff81710b90 T cs4280_get_portnum_by_name +ffffffff81710bc0 T cs4280_intr +ffffffff81710fe0 T cs4280_init +ffffffff81711370 T cs4280_attach_codec +ffffffff817113a0 T cs4280_reset_codec +ffffffff817114d0 T cs4280_download +ffffffff81711570 T cs4280_download_image +ffffffff81711780 T cs4280_reset +ffffffff81711800 T cs4280_freemem +ffffffff81711890 T cs4280_allocmem +ffffffff81711a30 T cs4280_clear_fifos +ffffffff81712000 T yds_match +ffffffff81712050 T yds_attach +ffffffff817122c0 T yds_activate +ffffffff817124b0 T yds_intr +ffffffff81712810 T yds_attachhook +ffffffff81712e60 T yds_init +ffffffff817136b0 T yds_attach_codec +ffffffff817136e0 T yds_read_codec +ffffffff81713810 T yds_write_codec +ffffffff817138f0 T yds_reset_codec +ffffffff81713a00 T yds_get_portnum_by_name +ffffffff81713a30 T yds_mixer_set_port +ffffffff81713a50 T yds_allocmem +ffffffff81713bb0 T yds_freemem +ffffffff81713c40 T yds_open +ffffffff81713cc0 T yds_close +ffffffff81713f00 T yds_halt_output +ffffffff81714000 T yds_halt_input +ffffffff817140d0 T yds_set_params +ffffffff81714220 T yds_round_blocksize +ffffffff81714260 T yds_trigger_output +ffffffff817147b0 T yds_trigger_input +ffffffff81714a50 T yds_mixer_get_port +ffffffff81714a70 T yds_query_devinfo +ffffffff81714a90 T yds_malloc +ffffffff81714b40 T yds_free +ffffffff81714c40 T yds_round_buffersize +ffffffff81715000 T auvia_match +ffffffff81715030 T auvia_attach +ffffffff81715480 T auvia_activate +ffffffff817154f0 T auvia_open +ffffffff81715540 T auvia_close +ffffffff817155f0 T auvia_set_params +ffffffff817158f0 T auvia_round_blocksize +ffffffff81715950 T auvia_halt_output +ffffffff817159b0 T auvia_halt_input +ffffffff81715a10 T auvia_set_port +ffffffff81715a30 T auvia_get_port +ffffffff81715a50 T auvia_query_devinfo +ffffffff81715a70 T auvia_malloc +ffffffff81715ca0 T auvia_free +ffffffff81715d70 T auvia_round_buffersize +ffffffff81715db0 T auvia_trigger_output +ffffffff81715f60 T auvia_trigger_input +ffffffff81716110 T auvia_resume +ffffffff81716170 T auvia_intr +ffffffff81716280 T auvia_attach_codec +ffffffff817162b0 T auvia_read_codec +ffffffff81716450 T auvia_write_codec +ffffffff81716530 T auvia_reset_codec +ffffffff81716640 T auvia_spdif_event +ffffffff81716670 T auvia_waitready_codec +ffffffff81716710 T auvia_waitvalid_codec +ffffffff817167b0 T auvia_set_params_sub +ffffffff81716920 T auvia_build_dma_ops +ffffffff81717000 T gdt_pci_probe +ffffffff81717080 T gdt_pci_attach +ffffffff81717960 T gdt_pci_copy_cmd +ffffffff81717990 T gdt_pci_get_status +ffffffff817179c0 T gdt_pci_intr +ffffffff817179f0 T gdt_pci_release_event +ffffffff81717a20 T gdt_pci_set_sema0 +ffffffff81717a50 T gdt_pci_test_busy +ffffffff81717a80 T gdt_pcinew_copy_cmd +ffffffff81717ab0 T gdt_pcinew_get_status +ffffffff81717ae0 T gdt_pcinew_intr +ffffffff81717b10 T gdt_pcinew_release_event +ffffffff81717b40 T gdt_pcinew_set_sema0 +ffffffff81717b70 T gdt_pcinew_test_busy +ffffffff81717ba0 T gdt_mpr_copy_cmd +ffffffff81717c80 T gdt_mpr_get_status +ffffffff81717ca0 T gdt_mpr_intr +ffffffff81717da0 T gdt_mpr_release_event +ffffffff81717de0 T gdt_mpr_set_sema0 +ffffffff81717e10 T gdt_mpr_test_busy +ffffffff81717e60 T gdt_pci_enable_intr +ffffffff81718000 T ciss_pci_match +ffffffff81718030 T ciss_pci_attach +ffffffff81718410 T ciss_activate +ffffffff81719000 T qlw_pci_match +ffffffff81719080 T qlw_pci_attach +ffffffff817194c0 T qlw_pci_detach +ffffffff8171a000 T qla_pci_match +ffffffff8171a050 T qla_pci_attach +ffffffff8171a3d0 T qla_pci_detach +ffffffff8171b000 T qle_match +ffffffff8171b030 T qle_attach +ffffffff8171ba90 T qle_detach +ffffffff8171bb00 T qle_scsi_cmd +ffffffff8171bfb0 T qle_scsi_probe +ffffffff8171c040 T qle_intr +ffffffff8171c110 T qle_read_mbox +ffffffff8171c160 T qle_host_cmd +ffffffff8171c1b0 T qle_softreset +ffffffff8171c520 T qle_read_nvram +ffffffff8171c6a0 T qle_load_firmware_chunks +ffffffff8171c7a0 T qle_mbox +ffffffff8171ca30 T qle_alloc_ccbs +ffffffff8171d040 T qle_dmamem_alloc +ffffffff8171d1b0 T qle_mbox_putaddr +ffffffff8171d210 T qle_do_update +ffffffff8171dbc0 T qle_deferred_update +ffffffff8171dbf0 T qle_read_isr +ffffffff8171dcd0 T qle_handle_intr +ffffffff8171de50 T qle_dmamem_free +ffffffff8171ded0 T qle_free_ccbs +ffffffff8171e0c0 T qle_classify_port +ffffffff8171e1b0 T qle_get_loop_id +ffffffff8171e220 T qle_get_port_db +ffffffff8171e300 T qle_get_port_name_list +ffffffff8171e560 T qle_add_loop_port +ffffffff8171e7e0 T qle_add_fabric_port +ffffffff8171e9a0 T qle_add_logged_in_port +ffffffff8171ebf0 T qle_handle_resp +ffffffff8171efa0 T qle_dump_iocb +ffffffff8171efd0 T qle_async +ffffffff8171f1f0 T qle_read +ffffffff8171f240 T qle_write +ffffffff8171f290 T qle_clear_isr +ffffffff8171f2e0 T qle_put_marker +ffffffff8171f320 T qle_put_cmd +ffffffff8171f660 T qle_write_mbox +ffffffff8171f6b0 T qle_set_ints +ffffffff8171f710 T qle_update_done +ffffffff8171f740 T qle_update_cancel +ffffffff8171f790 T qle_update_start +ffffffff8171f7e0 T qle_update_defer +ffffffff8171f830 T qle_clear_port_lists +ffffffff8171f990 T qle_update_topology +ffffffff8171fa70 T qle_update_fabric +ffffffff8171fb80 T qle_ct_pass_through +ffffffff8171fe70 T qle_sge +ffffffff8171feb0 T qle_next_fabric_port +ffffffff81720020 T qle_fabric_plogx +ffffffff817202b0 T qle_fabric_plogi +ffffffff81720420 T qle_fabric_plogo +ffffffff81720460 T qle_dump_stuff +ffffffff81720490 T qle_dump_iocb_segs +ffffffff817204c0 T qle_load_fwchunk +ffffffff81720730 T qle_verify_firmware +ffffffff81720830 T qle_read_ram_word +ffffffff817208a0 T qle_put_ccb +ffffffff81720910 T qle_get_ccb +ffffffff81721000 T mpi_pci_match +ffffffff81721030 T mpi_pci_attach +ffffffff81721350 T mpi_pci_detach +ffffffff81722000 T mpii_match +ffffffff81722030 T mpii_attach +ffffffff817227a0 T mpii_detach +ffffffff81722820 T mpii_scsi_cmd +ffffffff81722af0 T mpii_scsi_probe +ffffffff81722cf0 T mpii_scsi_ioctl +ffffffff81722d70 T mpii_write +ffffffff81722dc0 T mpii_iocfacts +ffffffff81723080 T mpii_init +ffffffff81723390 T mpii_alloc_ccbs +ffffffff817237c0 T mpii_alloc_replies +ffffffff81723880 T mpii_alloc_queues +ffffffff817239e0 T mpii_iocinit +ffffffff81723b60 T mpii_wait_eq +ffffffff81723c70 T mpii_read +ffffffff81723d20 T mpii_push_replies +ffffffff81723e70 T mpii_init_queues +ffffffff81723ef0 T mpii_board_info +ffffffff817240f0 T mpii_portfacts +ffffffff81724220 T mpii_target_map +ffffffff81724310 T mpii_cfg_coalescing +ffffffff817243e0 T mpii_eventnotify +ffffffff817245b0 T mpii_portenable +ffffffff817246a0 T mpii_intr +ffffffff81724af0 T mpii_ioctl +ffffffff81724c00 T mpii_create_sensors +ffffffff81724d90 T mpii_dmamem_free +ffffffff81724e20 T mpii_get_ccb +ffffffff81724eb0 T mpii_reply +ffffffff81724f80 T mpii_event_process +ffffffff81725230 T mpii_load_xs_sas3 +ffffffff817253d0 T mpii_load_xs +ffffffff817255c0 T mpii_req_cfg_header +ffffffff81725780 T mpii_req_cfg_page +ffffffff817259d0 T mpii_wait_ne +ffffffff81725ae0 T mpii_reset_soft +ffffffff81725d10 T mpii_reset_hard +ffffffff81725ff0 T mpii_handshake_send +ffffffff817263f0 T mpii_handshake_recv_dword +ffffffff817266a0 T mpii_handshake_recv +ffffffff81726900 T mpii_empty_done +ffffffff81726930 T mpii_push_reply +ffffffff817269b0 T mpii_poll +ffffffff81726b90 T mpii_eventack +ffffffff81726d80 T mpii_eventack_done +ffffffff81726e00 T mpii_start +ffffffff81726ed0 T mpii_event_sas +ffffffff817272e0 T mpii_eventnotify_done +ffffffff81727320 T mpii_event_raid +ffffffff81727650 T mpii_find_dev +ffffffff817276b0 T mpii_insert_dev +ffffffff81727730 T mpii_remove_dev +ffffffff817277b0 T mpii_event_discovery +ffffffff81727810 T mpii_sas_remove_device +ffffffff817279d0 T mpii_event_done +ffffffff81727a90 T mpii_wait +ffffffff81727c00 T mpii_dmamem_alloc +ffffffff81727da0 T mpii_scsi_cmd_tmo_handler +ffffffff81727f00 T mpii_put_ccb +ffffffff81727fa0 T mpii_poll_done +ffffffff81727fd0 T mpii_wait_done +ffffffff81728010 T mpii_scsi_cmd_done +ffffffff81728280 T mpii_scsi_cmd_tmo +ffffffff81728380 T mpii_scsi_cmd_tmo_done +ffffffff817283a0 T mpii_ioctl_cache +ffffffff817285f0 T mpii_ioctl_inq +ffffffff817286a0 T mpii_ioctl_vol +ffffffff81728930 T mpii_ioctl_disk +ffffffff81728b10 T mpii_find_vol +ffffffff81728b60 T mpii_bio_hs +ffffffff81728d30 T mpii_bio_disk +ffffffff81728f80 T mpii_bio_volstate +ffffffff81729120 T mpii_refresh_sensors +ffffffff8172a000 T sili_pci_match +ffffffff8172a0a0 T sili_pci_attach +ffffffff8172a3a0 T sili_pci_detach +ffffffff8172a450 T sili_pci_activate +ffffffff8172a490 T sili_lookup +ffffffff8172b000 T aq_fw1x_reset +ffffffff8172b050 T aq1_get_mac_addr +ffffffff8172b130 T aq_fw1x_set_mode +ffffffff8172b160 T aq_fw1x_get_mode +ffffffff8172b190 T aq_fw1x_get_stats +ffffffff8172b1c0 T aq_fw2x_reset +ffffffff8172b250 T aq_fw2x_set_mode +ffffffff8172b3f0 T aq_fw2x_get_mode +ffffffff8172b580 T aq_fw2x_get_stats +ffffffff8172b5b0 T aq2_fw_reset +ffffffff8172b740 T aq2_get_mac_addr +ffffffff8172b7e0 T aq2_fw_set_mode +ffffffff8172b9f0 T aq2_fw_get_mode +ffffffff8172bac0 T aq2_fw_get_stats +ffffffff8172baf0 T aq_match +ffffffff8172bb20 T aq_attach +ffffffff8172c770 T aq_activate +ffffffff8172c7a0 T aq_lookup +ffffffff8172c820 T aq_intr +ffffffff8172c9b0 T aq_intr_link +ffffffff8172cac0 T aq1_fw_reboot +ffffffff8172cd10 T aq2_fw_reboot +ffffffff8172d160 T aq_hw_reset +ffffffff8172d2c0 T aq_init_rss +ffffffff8172d630 T aq_hw_init +ffffffff8172d940 T aq_ifmedia_change +ffffffff8172da30 T aq_ifmedia_status +ffffffff8172db30 T aq_ioctl +ffffffff8172dd70 T aq_start +ffffffff8172e0c0 T aq_watchdog +ffffffff8172e0f0 T aq_set_linkmode +ffffffff8172e120 T aq_refill +ffffffff8172e190 T aq_intr_queue +ffffffff8172e270 T aq_enable_intr +ffffffff8172e390 T aq1_fw_read_version +ffffffff8172e430 T aq1_mac_soft_reset +ffffffff8172e460 T aq1_fw_version_init +ffffffff8172e5e0 T aq1_hw_init_ucp +ffffffff8172e760 T aq1_mac_soft_reset_rbl +ffffffff8172ea00 T aq1_global_software_reset +ffffffff8172eb20 T aq1_mac_soft_reset_flb +ffffffff8172eed0 T aq2_interface_buffer_read +ffffffff8172f010 T aq1_fw_downld_dwords +ffffffff8172f330 T aq_hw_l3_filter_set +ffffffff8172f540 T aq_hw_init_tx_path +ffffffff8172f7b0 T aq_hw_init_rx_path +ffffffff8172ffc0 T aq_set_mac_addr +ffffffff817301d0 T aq_hw_qos_set +ffffffff817308c0 T aq2_filter_art_set +ffffffff81730a70 T aq_get_linkmode +ffffffff81730ae0 T aq_txring_reset +ffffffff81730e90 T aq_rxring_reset +ffffffff81731390 T aq_rx_fill +ffffffff817315a0 T aq_rxeof +ffffffff81731920 T aq_txeof +ffffffff81731b00 T aq_update_link_status +ffffffff81731ba0 T aq_free_slots +ffffffff81731c40 T aq_queue_up +ffffffff81732020 T aq_dmamem_alloc +ffffffff81732170 T aq_dmamem_free +ffffffff817321e0 T aq_queue_down +ffffffff81732490 T aq_invalidate_rx_desc_cache +ffffffff81732510 T aq_up +ffffffff81732930 T aq_down +ffffffff81732a90 T aq_rxrinfo +ffffffff81732b80 T aq_iff +ffffffff81733000 T tulip_probe +ffffffff81733060 T tulip_attach +ffffffff81733a80 T tulip_timeout_callback +ffffffff81733ad0 T tulip_timeout +ffffffff81733b40 T tulip_txprobe +ffffffff81733c80 T tulip_txput +ffffffff817341f0 T tulip_media_set +ffffffff817347f0 T tulip_reset +ffffffff81734bb0 T tulip_mii_autonegotiate +ffffffff81734eb0 T tulip_mii_readreg +ffffffff81735060 T tulip_mii_writereg +ffffffff81735220 T tulip_linkup +ffffffff817352f0 T tulip_init +ffffffff81735470 T tulip_media_print +ffffffff817354c0 T tulip_media_link_monitor +ffffffff817356f0 T tulip_mii_map_abilities +ffffffff81735780 T tulip_media_poll +ffffffff81735c60 T tulip_mii_phy_readspecific +ffffffff81735e20 T tulip_media_select +ffffffff81735f30 T tulip_21040_mediainfo_init +ffffffff81736030 T tulip_21040_media_probe +ffffffff81736120 T tulip_21040_10baset_only_media_probe +ffffffff817361e0 T tulip_21040_10baset_only_media_select +ffffffff81736240 T tulip_21040_auibnc_only_media_probe +ffffffff817362d0 T tulip_21040_auibnc_only_media_select +ffffffff81736320 T tulip_21041_mediainfo_init +ffffffff817363e0 T tulip_21041_media_probe +ffffffff817364c0 T tulip_21041_media_poll +ffffffff817367f0 T tulip_mii_get_phyaddr +ffffffff817368b0 T tulip_2114x_media_preset +ffffffff81736ad0 T tulip_null_media_poll +ffffffff81736b00 T tulip_21140_mediainit +ffffffff81736b50 T tulip_21140_evalboard_media_probe +ffffffff81736d30 T tulip_21140_accton_media_probe +ffffffff81736f50 T tulip_21140_smc9332_media_probe +ffffffff81737170 T tulip_21140_cogent_em100_media_probe +ffffffff817372e0 T tulip_21140_znyx_zx34x_media_probe +ffffffff81737530 T tulip_2114x_media_probe +ffffffff81737560 T tulip_delay_300ns +ffffffff81737670 T tulip_srom_idle +ffffffff81738010 T tulip_srom_read +ffffffff81738db0 T tulip_mii_writebits +ffffffff81739340 T tulip_mii_turnaround +ffffffff81739b10 T tulip_mii_readbits +ffffffff81739ef0 T tulip_identify_dec_nic +ffffffff81739fa0 T tulip_identify_znyx_nic +ffffffff8173a2a0 T tulip_identify_smc_nic +ffffffff8173a470 T tulip_identify_cogent_nic +ffffffff8173a560 T tulip_identify_accton_nic +ffffffff8173a690 T tulip_identify_asante_nic +ffffffff8173a960 T tulip_identify_compex_nic +ffffffff8173aab0 T tulip_srom_decode +ffffffff8173b6e0 T tulip_read_macaddr +ffffffff8173c050 T tulip_ifmedia_add +ffffffff8173c140 T tulip_ifmedia_change +ffffffff8173c320 T tulip_ifmedia_status +ffffffff8173c390 T tulip_alloc_rxmap +ffffffff8173c3d0 T tulip_free_rxmap +ffffffff8173c410 T tulip_alloc_txmap +ffffffff8173c450 T tulip_free_txmap +ffffffff8173c490 T tulip_addr_filter +ffffffff8173c7e0 T tulip_rx_intr +ffffffff8173ce00 T tulip_txput_setup +ffffffff8173d0b0 T tulip_tx_intr +ffffffff8173d4b0 T tulip_print_abnormal_interrupt +ffffffff8173d4e0 T tulip_intr_handler +ffffffff8173d870 T tulip_ifstart +ffffffff8173d940 T tulip_intr_shared +ffffffff8173d9b0 T tulip_intr_normal +ffffffff8173da00 T tulip_ifioctl +ffffffff8173db00 T tulip_ifwatchdog +ffffffff8173dc00 T tulip_busdma_allocmem +ffffffff8173dd90 T tulip_busdma_init +ffffffff8173dfb0 T tulip_initcsrs +ffffffff8173e0b0 T tulip_initring +ffffffff8173f000 T ep_pci_match +ffffffff8173f030 T ep_pci_attach +ffffffff81740000 T pcn_match +ffffffff81740070 T pcn_attach +ffffffff817407c0 T pcn_tick +ffffffff81740810 T pcn_reset +ffffffff81740880 T pcn_intr +ffffffff81740af0 T pcn_ioctl +ffffffff81740c50 T pcn_start +ffffffff817410a0 T pcn_watchdog +ffffffff81741110 T pcn_txintr +ffffffff817415a0 T pcn_init +ffffffff81741e40 T pcn_stop +ffffffff81741fc0 T pcn_rxintr +ffffffff817424d0 T pcn_spnd +ffffffff817425d0 T pcn_add_rxbuf +ffffffff817427c0 T pcn_rxdrain +ffffffff81742860 T pcn_set_filter +ffffffff817429c0 T pcn_79c970_mediainit +ffffffff81742ad0 T pcn_79c970_mediachange +ffffffff81742c60 T pcn_79c970_mediastatus +ffffffff81742ca0 T pcn_79c971_mediainit +ffffffff81742d70 T pcn_mii_readreg +ffffffff81742e30 T pcn_mii_writereg +ffffffff81742ed0 T pcn_mii_statchg +ffffffff81742f30 T pcn_79c971_mediachange +ffffffff81742f80 T pcn_79c971_mediastatus +ffffffff81743000 T siop_lookup_product +ffffffff817430a0 T siop_pci_attach_common +ffffffff81743520 T siop_pci_reset +ffffffff81744000 T siop_pci_match +ffffffff81744050 T siop_pci_attach +ffffffff81745000 T sii3114_read_reg +ffffffff81745060 T sii3114_write_reg +ffffffff817450d0 T pdc203xx_read_reg +ffffffff81745130 T pdc203xx_write_reg +ffffffff817451a0 T svwsata_read_reg +ffffffff81745210 T svwsata_write_reg +ffffffff81745260 T svwsata_lba48_write_reg +ffffffff817452b0 T pciide_pci_read +ffffffff81745300 T pciide_pci_write +ffffffff81745370 T default_chip_map +ffffffff817459d0 T artisea_chip_map +ffffffff81745c70 T piix_chip_map +ffffffff817462b0 T piixsata_chip_map +ffffffff817467f0 T sch_chip_map +ffffffff81746b50 T amd756_chip_map +ffffffff81746fb0 T ixp_chip_map +ffffffff81747360 T cmd_chip_map +ffffffff817474c0 T cmd0643_9_chip_map +ffffffff817477b0 T cmd680_chip_map +ffffffff81747990 T sii3112_chip_map +ffffffff81747d20 T sii3114_chip_map +ffffffff81748260 T apollo_chip_map +ffffffff81748900 T sata_chip_map +ffffffff81748b20 T cy693_chip_map +ffffffff81748ef0 T sis_chip_map +ffffffff81749690 T natsemi_chip_map +ffffffff81749b30 T ns_scx200_chip_map +ffffffff81749f00 T acer_chip_map +ffffffff8174a5c0 T hpt_chip_map +ffffffff8174aae0 T pdc202xx_chip_map +ffffffff8174b4e0 T pdcsata_chip_map +ffffffff8174bca0 T acard_chip_map +ffffffff8174bf30 T serverworks_chip_map +ffffffff8174c280 T svwsata_chip_map +ffffffff8174c650 T nforce_chip_map +ffffffff8174cac0 T ite_chip_map +ffffffff8174cd80 T jmicron_chip_map +ffffffff8174d190 T phison_chip_map +ffffffff8174d4f0 T rdc_chip_map +ffffffff8174d980 T pciide_match +ffffffff8174da20 T pciide_attach +ffffffff8174db00 T pciide_detach +ffffffff8174db60 T pciide_activate +ffffffff8174e290 T pciide_lookup_product +ffffffff8174e540 T pciide_dmacmd_read +ffffffff8174e570 T pciide_dmacmd_write +ffffffff8174e5a0 T pciide_dmactl_read +ffffffff8174e5d0 T pciide_dmactl_write +ffffffff8174e600 T pciide_dmatbl_write +ffffffff8174e630 T pciide_mapregs_compat +ffffffff8174e7b0 T pciide_unmapregs_compat +ffffffff8174e840 T pciide_mapregs_native +ffffffff8174eb30 T pciide_unmapregs_native +ffffffff8174ebc0 T pciide_mapreg_dma +ffffffff8174ed50 T pciide_dma_init +ffffffff8174eff0 T pciide_dma_start +ffffffff8174f070 T pciide_dma_finish +ffffffff8174f240 T pciide_unmapreg_dma +ffffffff8174f270 T pciide_intr_flag +ffffffff8174f480 T pciide_compat_intr +ffffffff8174f500 T pciide_pci_intr +ffffffff8174f5c0 T pciide_channel_dma_setup +ffffffff8174f690 T pciide_dma_table_setup +ffffffff8174f8e0 T pciide_irqack +ffffffff8174f930 T pciide_chansetup +ffffffff8174fa10 T pciide_chanfree +ffffffff8174fa60 T pciide_mapchan +ffffffff8174faf0 T pciide_unmap_chan +ffffffff8174fbc0 T pciide_chan_candisable +ffffffff8174fc30 T pciide_map_compat_intr +ffffffff8174fce0 T pciide_unmap_compat_intr +ffffffff8174fd40 T pciide_print_channels +ffffffff8174fe10 T pciide_print_modes +ffffffff8174fe20 T default_chip_unmap +ffffffff8174ff00 T sata_setup_channel +ffffffff81750020 T piix_timing_debug +ffffffff81750050 T piix_setup_channel +ffffffff81750540 T piix3_4_setup_channel +ffffffff81750d40 T piix_setup_idetim_timings +ffffffff81750db0 T piix_setup_idetim_drvs +ffffffff81750ec0 T piix_setup_sidetim_timings +ffffffff81750f30 T amd756_setup_channel +ffffffff817512e0 T apollo_setup_channel +ffffffff81751630 T cmd_channel_map +ffffffff81751970 T cmd_pci_intr +ffffffff81751a80 T cmd646_9_irqack +ffffffff81751b80 T cmd0643_9_setup_channel +ffffffff81751fb0 T cmd680_setup_channel +ffffffff817524a0 T cmd680_channel_map +ffffffff817527a0 T sii_fixup_cacheline +ffffffff81752a70 T sii3112_setup_channel +ffffffff81752c30 T sii3112_drv_probe +ffffffff81752f80 T sii3114_mapreg_dma +ffffffff81753240 T sii3114_chansetup +ffffffff81753300 T sii3114_mapchan +ffffffff817535f0 T sii3114_dmacmd_read +ffffffff81753630 T sii3114_dmacmd_write +ffffffff81753670 T sii3114_dmactl_read +ffffffff817536b0 T sii3114_dmactl_write +ffffffff817536f0 T sii3114_dmatbl_write +ffffffff81753730 T cy693_setup_channel +ffffffff81753950 T sis_hostbr_match +ffffffff81753a20 T sis_south_match +ffffffff81753a60 T sis_setup_channel +ffffffff81753db0 T sis96x_setup_channel +ffffffff81754060 T natsemi_irqack +ffffffff817540f0 T natsemi_setup_channel +ffffffff817544e0 T natsemi_pci_intr +ffffffff817545d0 T ns_scx200_setup_channel +ffffffff817548b0 T acer_dma_init +ffffffff817548f0 T acer_setup_channel +ffffffff81754d00 T acer_pci_intr +ffffffff81754de0 T hpt_setup_channel +ffffffff81755130 T hpt_pci_intr +ffffffff81755240 T pdc268_config_read +ffffffff817552b0 T pdc20268_setup_channel +ffffffff81755480 T pdc202xx_setup_channel +ffffffff817558d0 T pdc20262_dma_start +ffffffff81755a30 T pdc20262_dma_finish +ffffffff81755b00 T pdc20265_pci_intr +ffffffff81755cb0 T pdc202xx_pci_intr +ffffffff81755dc0 T pdc203xx_pci_intr +ffffffff81755eb0 T pdc205xx_pci_intr +ffffffff81755fe0 T pdc203xx_irqack +ffffffff81756070 T pdc203xx_setup_channel +ffffffff81756170 T pdc205xx_do_reset +ffffffff81756210 T pdc205xx_drv_probe +ffffffff81756490 T pdc203xx_dma_start +ffffffff81756550 T pdc203xx_dma_finish +ffffffff81756640 T serverworks_setup_channel +ffffffff81756a50 T serverworks_pci_intr +ffffffff81756b60 T svwsata_mapreg_dma +ffffffff81756c10 T svwsata_drv_probe +ffffffff81756ee0 T svwsata_mapchan +ffffffff81756fd0 T svwsata_dmacmd_read +ffffffff81757000 T svwsata_dmacmd_write +ffffffff81757030 T svwsata_dmactl_read +ffffffff81757060 T svwsata_dmactl_write +ffffffff81757090 T svwsata_dmatbl_write +ffffffff817570c0 T acard_setup_channel +ffffffff817574f0 T nforce_setup_channel +ffffffff81757830 T nforce_pci_intr +ffffffff81757920 T ite_setup_channel +ffffffff81757c80 T ixp_setup_channel +ffffffff81758030 T jmicron_setup_channel +ffffffff81758290 T phison_setup_channel +ffffffff817584a0 T sch_setup_channel +ffffffff817586a0 T rdc_setup_channel +ffffffff81758ac0 t ba5_read_4_ind +ffffffff81758b50 t ba5_write_4_ind +ffffffff81759000 T ppbmatch +ffffffff81759050 T ppbattach +ffffffff817597d0 T ppbdetach +ffffffff817598f0 T ppbactivate +ffffffff81759d60 T ppb_alloc_busrange +ffffffff81759f10 T ppb_hotplug_insert +ffffffff81759f70 T ppb_hotplug_rescan +ffffffff81759fb0 T ppb_hotplug_remove +ffffffff8175a110 T ppb_hotplug_insert_finish +ffffffff8175a140 T ppb_intr +ffffffff8175a200 T ppb_alloc_resources +ffffffff8175a8f0 T ppbprint +ffffffff8175b000 T cy_pci_match +ffffffff8175b030 T cy_pci_attach +ffffffff8175c000 T rl_pci_match +ffffffff8175c060 T rl_pci_attach +ffffffff8175c220 T rl_pci_detach +ffffffff8175d000 T re_pci_probe +ffffffff8175d0a0 T re_pci_attach +ffffffff8175d3d0 T re_pci_detach +ffffffff8175d440 T re_pci_activate +ffffffff8175e000 T vr_probe +ffffffff8175e0d0 T vr_attach +ffffffff8175e6a0 T vr_activate +ffffffff8175e720 T vr_mii_readreg +ffffffff8175e880 T vr_mii_writereg +ffffffff8175e9d0 T vr_miibus_readreg +ffffffff8175ea40 T vr_miibus_writereg +ffffffff8175eab0 T vr_miibus_statchg +ffffffff8175ead0 T vr_setcfg +ffffffff8175ecf0 T vr_iff +ffffffff8175ee70 T vr_reset +ffffffff8175ef80 T vr_quirks +ffffffff8175f080 T vr_dmamem_alloc +ffffffff8175f1e0 T vr_dmamem_free +ffffffff8175f250 T vr_intr +ffffffff8175f480 T vr_chipinit +ffffffff8175f560 T vr_ioctl +ffffffff8175f700 T vr_start +ffffffff8175f8d0 T vr_watchdog +ffffffff8175f960 T vr_wol +ffffffff8175fb10 T vr_ifmedia_upd +ffffffff8175fb60 T vr_ifmedia_sts +ffffffff8175fbc0 T vr_tick +ffffffff8175fc40 T vr_rxtick +ffffffff8175fd20 T vr_stop +ffffffff8175ffb0 T vr_init +ffffffff81760560 T vr_list_tx_init +ffffffff81760660 T vr_list_rx_init +ffffffff81760820 T vr_fill_rx_ring +ffffffff817608e0 T vr_alloc_mbuf +ffffffff81760a50 T vr_rxeof +ffffffff81760ce0 T vr_rxeoc +ffffffff81760e70 T vr_txeof +ffffffff81761030 T vr_encap +ffffffff81762000 T txp_probe +ffffffff81762030 T txp_attach +ffffffff817621a0 T txp_attachhook +ffffffff817624d0 T txp_chip_init +ffffffff81762690 T txp_download_fw +ffffffff81762b10 T txp_alloc_rings +ffffffff81763680 T txp_command +ffffffff81763750 T txp_ifmedia_upd +ffffffff81763860 T txp_ifmedia_sts +ffffffff81763b20 T txp_ioctl +ffffffff81763c40 T txp_start +ffffffff81764000 T txp_watchdog +ffffffff81764030 T txp_capabilities +ffffffff817641e0 T txp_tick +ffffffff81764330 T txp_intr +ffffffff817645a0 T txp_reset_adapter +ffffffff817646a0 T txp_download_fw_wait +ffffffff81764790 T txp_download_fw_section +ffffffff81764b00 T txp_dma_malloc +ffffffff81764ca0 T txp_dma_free +ffffffff81764d20 T txp_rx_reclaim +ffffffff81764ff0 T txp_rxbuf_reclaim +ffffffff81765270 T txp_tx_reclaim +ffffffff81765410 T txp_init +ffffffff81765550 T txp_stop +ffffffff81765650 T txp_set_filter +ffffffff817657e0 T txp_command2 +ffffffff81765ae0 T txp_cmd_desc_numfree +ffffffff81765b40 T txp_response +ffffffff81765e10 T txp_rsp_fixup +ffffffff81765ef0 T txp_show_descriptor +ffffffff81767000 T init_audio_devices +ffffffff81767120 T init_BTSC +ffffffff817671e0 T set_audio +ffffffff81767570 T set_bctv_audio +ffffffff817678b0 T msp_autodetect +ffffffff81767ce0 T temp_mute +ffffffff81767d80 T set_BTSC +ffffffff81767da0 T bctv_gpio_write +ffffffff81767f10 T msp_read_id +ffffffff81767fd0 T dpl_read_id +ffffffff81768090 T dpl_autodetect +ffffffff81769000 T writeEEProm +ffffffff81769030 T readEEProm +ffffffff81769100 T signCard +ffffffff817691b0 T probeCard +ffffffff8176b000 T bktr_name +ffffffff8176b030 T common_bktr_attach +ffffffff8176b330 t oformat_meteor_to_bt +ffffffff8176b440 T common_bktr_intr +ffffffff8176ba60 T video_open +ffffffff8176bf10 t set_fps +ffffffff8176c050 T vbi_open +ffffffff8176c0f0 T tuner_open +ffffffff8176c140 T video_close +ffffffff8176c230 T tuner_close +ffffffff8176c260 T vbi_close +ffffffff8176c290 T video_read +ffffffff8176c450 t start_capture +ffffffff8176f1f0 T vbi_read +ffffffff8176f310 T video_ioctl +ffffffff81770710 T bktr_common_ioctl +ffffffff81770ee0 T tuner_ioctl +ffffffff81771c00 t remote_read +ffffffff81771da0 T i2cWrite +ffffffff81771ec0 T i2cRead +ffffffff81771fe0 T msp_dpl_read +ffffffff817722a0 T msp_dpl_write +ffffffff81772460 T msp_dpl_reset +ffffffff81772760 t i2c_write_byte +ffffffff81772940 t i2c_read_byte +ffffffff81772b60 t split +ffffffff81772d90 t getline +ffffffff81773000 t bktr_probe +ffffffff81773060 t bktr_attach +ffffffff817732e0 T bktr_get_info +ffffffff817733c0 T bktr_set_info +ffffffff81773520 T get_bktr_mem +ffffffff81773750 T free_bktr_mem +ffffffff817737b0 T bktropen +ffffffff81773870 T bktrclose +ffffffff817738f0 T bktrread +ffffffff81773980 T bktrwrite +ffffffff817739b0 T bktrioctl +ffffffff81773a50 T bktrmmap +ffffffff81773af0 t bktr_intr +ffffffff81774000 T select_tuner +ffffffff81774050 T tv_freq +ffffffff817742a0 T do_afc +ffffffff817743d0 T get_tuner_status +ffffffff817743f0 T tv_channel +ffffffff817744b0 T tuner_getchnlset +ffffffff81775000 T xl_pci_match +ffffffff81775030 T xl_pci_attach +ffffffff81775380 T xl_pci_detach +ffffffff81775410 T xl_pci_wol_power +ffffffff81775460 T xl_pci_intr_ack +ffffffff81776000 T fxp_pci_match +ffffffff81776030 T fxp_pci_attach +ffffffff81776350 T fxp_pci_detach +ffffffff81777000 T em_probe +ffffffff81777030 T em_attach +ffffffff81777530 T em_detach +ffffffff817775c0 T em_activate +ffffffff81777640 T em_defer_attach +ffffffff817776e0 T em_stop +ffffffff817777d0 T em_free_pci_resources +ffffffff81777a90 T em_setup_interface +ffffffff81777c80 T em_update_link_status +ffffffff81777e90 T em_local_timer +ffffffff81777f40 T em_82547_move_tail +ffffffff81777f80 T em_identify_hardware +ffffffff81778090 T em_allocate_pci_resources +ffffffff81778490 T em_allocate_desc_rings +ffffffff817785a0 T em_hardware_init +ffffffff81778850 T em_kstat_attach +ffffffff817789a0 T em_start +ffffffff81778c90 T em_encap +ffffffff81779140 T em_82547_move_tail_locked +ffffffff81779370 T em_82547_update_fifo_head +ffffffff817793c0 T em_ioctl +ffffffff81779690 T em_init +ffffffff81779a00 T em_get_sffpage +ffffffff81779ac0 T em_disable_intr +ffffffff81779bc0 T em_iff +ffffffff81779ed0 T em_initialize_receive_unit +ffffffff8177a650 T em_enable_intr +ffffffff8177a7b0 T em_watchdog +ffffffff8177a960 T em_enable_hw_vlans +ffffffff8177aa00 T em_setup_transmit_structures +ffffffff8177ac00 T em_initialize_transmit_unit +ffffffff8177b260 T em_setup_receive_structures +ffffffff8177b3a0 T em_setup_queues_msix +ffffffff8177ba10 T em_intr +ffffffff8177bb10 T em_txeof +ffffffff8177bce0 T em_rxeof +ffffffff8177c170 T em_rxrefill_locked +ffffffff8177c280 T em_media_status +ffffffff8177c4a0 T em_flowstatus +ffffffff8177c5a0 T em_media_change +ffffffff8177c700 T em_tso_setup +ffffffff8177c8c0 T em_tx_ctx_setup +ffffffff8177ca30 T em_transmit_checksum_setup +ffffffff8177cb10 T em_fill_descriptors +ffffffff8177cb90 T em_82547_fifo_workaround +ffffffff8177cc00 T em_82547_tx_fifo_reset +ffffffff8177d060 T em_pci_clear_mwi +ffffffff8177d090 T em_pci_set_mwi +ffffffff8177d0c0 T em_smartspeed +ffffffff8177d2b0 T em_kstat_read +ffffffff8177d6f0 T em_flush_desc_rings +ffffffff8177d820 T em_free_transmit_structures +ffffffff8177d9f0 T em_free_receive_structures +ffffffff8177dbf0 T em_legacy_irq_quirk_spt +ffffffff8177dcd0 T em_rxrefill +ffffffff8177dd10 T em_allocate_msix +ffffffff8177df20 T em_allocate_legacy +ffffffff8177e040 T em_dma_free +ffffffff8177e0b0 T em_disable_aspm +ffffffff8177e180 T em_dma_malloc +ffffffff8177e310 T em_allocate_transmit_structures +ffffffff8177e400 T em_get_buf +ffffffff8177e560 T em_allocate_receive_structures +ffffffff8177e730 T em_rxfill +ffffffff8177e860 T em_tbi_adjust_stats +ffffffff8177ea30 T em_receive_checksum +ffffffff8177eaa0 T em_write_pci_cfg +ffffffff8177eb10 T em_read_pci_cfg +ffffffff8177eb80 T em_read_pcie_cap_reg +ffffffff8177ebb0 T em_flush_tx_ring +ffffffff8177ed20 T em_flush_rx_ring +ffffffff8177eee0 T em_queue_intr_msix +ffffffff8177ef90 T em_link_intr_msix +ffffffff8177f0c0 T em_enable_queue_intr_msix +ffffffff81780000 T em_set_mac_type +ffffffff81780a20 T em_set_sfp_media_type_82575 +ffffffff81780d70 T em_translate_82542_register +ffffffff81780fa0 T em_read_sfp_data_byte +ffffffff81781090 T em_set_media_type +ffffffff81781300 T em_reset_hw +ffffffff81781eb0 T em_disable_pciex_master +ffffffff81781f80 T em_check_phy_reset_block +ffffffff81782040 T em_gate_hw_phy_config_ich8lan +ffffffff817820e0 t em_get_software_flag +ffffffff81782260 T em_hv_phy_workarounds_ich8lan +ffffffff817825f0 T em_lv_phy_workarounds_ich8lan +ffffffff817826f0 t em_phy_init_script +ffffffff81782950 T em_read_eeprom +ffffffff81782fc0 T em_set_eee_i350 +ffffffff817830e0 T em_init_hw +ffffffff81784b20 T em_phy_reset +ffffffff81784d10 T em_clear_vfta_i350 +ffffffff81784ef0 T em_read_phy_reg +ffffffff817850a0 T em_setup_link +ffffffff81787340 T em_enable_tx_pkt_filtering +ffffffff81787700 T em_clear_hw_cntrs +ffffffff81787ff0 T em_write_phy_reg +ffffffff81788170 T em_power_up_serdes_link_82575 +ffffffff81788260 T em_copper_link_autoneg +ffffffff81788390 T em_phy_setup_autoneg +ffffffff817884f0 T em_copper_link_postconfig +ffffffff817885c0 T em_config_collision_dist +ffffffff81788650 t em_config_mac_to_phy +ffffffff817887c0 t em_config_fc_after_link_up +ffffffff81788a10 t em_config_dsp_after_link_change +ffffffff817893b0 T em_force_mac_fc +ffffffff81789480 T em_check_for_link +ffffffff81789b00 T em_get_pcs_speed_and_duplex_82575 +ffffffff81789bc0 T em_k1_gig_workaround_hv +ffffffff81789cf0 T em_link_stall_workaround_hv +ffffffff81789dd0 T em_k1_workaround_lv +ffffffff81789e90 T em_k1_workaround_lpt_lp +ffffffff8178a150 t em_check_downshift +ffffffff8178a200 T em_set_eee_pchlan +ffffffff8178a2a0 t em_polarity_reversal_workaround +ffffffff8178a4e0 T em_get_speed_and_duplex +ffffffff8178a990 T em_access_phy_wakeup_reg_bm +ffffffff8178aaf0 t em_write_phy_reg_ex +ffffffff8178ad60 t em_read_phy_reg_ex +ffffffff8178b210 T em_access_phy_debug_regs_hv +ffffffff8178b2e0 T em_access_phy_reg_hv +ffffffff8178b450 t em_swfw_sync_acquire +ffffffff8178b600 t em_swfw_sync_release +ffffffff8178b770 T em_sgmii_uses_mdio_82575 +ffffffff8178b7d0 T em_read_phy_reg_i2c +ffffffff8178b8b0 T em_write_phy_reg_i2c +ffffffff8178b980 T em_phy_hw_reset +ffffffff8178bf90 T em_oem_bits_config_pchlan +ffffffff8178c100 T em_initialize_M88E1512_phy +ffffffff8178c2c0 T em_init_eeprom_params +ffffffff8178c7d0 T em_get_flash_presence_i210 +ffffffff8178c830 t em_acquire_eeprom +ffffffff8178ca20 t em_read_eeprom_ich8 +ffffffff8178cbf0 t em_release_eeprom +ffffffff8178cd60 t em_standby_eeprom +ffffffff8178cf50 t em_shift_out_ee_bits +ffffffff8178d0f0 t em_shift_in_ee_bits +ffffffff8178d230 T em_validate_eeprom_checksum +ffffffff8178d3d0 T em_write_eeprom +ffffffff8178d6f0 T em_update_eeprom_checksum +ffffffff8178d810 t em_commit_shadow_ram +ffffffff8178dd70 t em_write_eeprom_microwire +ffffffff8178def0 t em_write_eeprom_spi +ffffffff8178e0b0 T em_read_part_num +ffffffff8178e150 T em_read_mac_addr +ffffffff8178e2d0 T em_mc_addr_list_update +ffffffff8178e3e0 T em_hash_mc_addr +ffffffff8178e4e0 T em_mta_set +ffffffff8178e650 T em_rar_set +ffffffff8178e780 T em_get_bus_info +ffffffff8178e910 T em_check_mng_mode +ffffffff8178e990 T em_valid_nvm_bank_detect_ich8lan +ffffffff8178eb40 T em_read_eeprom_spt +ffffffff8178ee00 t em_release_software_flag +ffffffff8178eeb0 T em_read_ich8_data32 +ffffffff8178f020 t em_ich8_cycle_init +ffffffff8178f1c0 t em_ich8_flash_cycle +ffffffff8178f310 T em_configure_k1_ich8lan +ffffffff8178f530 t em_toggle_lanphypc_pch_lpt +ffffffff8178f690 t em_copper_link_ggp_setup +ffffffff8178f940 t em_copper_link_82580_setup +ffffffff8178f9d0 t em_copper_link_rtl8211_setup +ffffffff8178fc60 t em_phy_reset_dsp +ffffffff8178fce0 t em_get_hw_eeprom_semaphore +ffffffff8178fe50 t em_shift_out_mdi_bits +ffffffff8178ffe0 t em_erase_ich8_4k_segment +ffffffff81790220 t em_write_ich8_byte +ffffffff81790390 t em_read_ich8_data +ffffffff81791000 T em_lookup_gcu +ffffffff81791030 T em_attach_miibus +ffffffff81791060 T gcu_miibus_readreg +ffffffff817911d0 T gcu_miibus_writereg +ffffffff81791320 T gcu_miibus_statchg +ffffffff81792000 T ixgb_probe +ffffffff81792030 T ixgb_attach +ffffffff81792470 T ixgb_local_timer +ffffffff81792520 T ixgb_identify_hardware +ffffffff81792620 T ixgb_allocate_pci_resources +ffffffff817927b0 T ixgb_dma_malloc +ffffffff817929b0 T ixgb_hardware_init +ffffffff81792a70 T ixgb_setup_interface +ffffffff81792ba0 T ixgb_update_stats_counters +ffffffff817934a0 T ixgb_update_link_status +ffffffff81793520 T ixgb_dma_free +ffffffff817935d0 T ixgb_free_pci_resources +ffffffff81793660 T ixgb_start +ffffffff81793890 T ixgb_encap +ffffffff81793a80 T ixgb_ioctl +ffffffff81793d20 T ixgb_init +ffffffff817941c0 T ixgb_set_promisc +ffffffff81794240 T ixgb_stop +ffffffff817942c0 T ixgb_disable_intr +ffffffff817942f0 T ixgb_set_multi +ffffffff81794400 T ixgb_enable_intr +ffffffff81794450 T ixgb_watchdog +ffffffff817944e0 T ixgb_enable_hw_vlans +ffffffff81794530 T ixgb_setup_transmit_structures +ffffffff817946a0 T ixgb_initialize_transmit_unit +ffffffff81794810 T ixgb_setup_receive_structures +ffffffff81794890 T ixgb_initialize_receive_unit +ffffffff81794b20 T ixgb_intr +ffffffff81794d20 T ixgb_rxeof +ffffffff81795160 T ixgb_txeof +ffffffff81795340 T ixgb_media_status +ffffffff81795430 T ixgb_media_change +ffffffff81795480 T ixgb_free_transmit_structures +ffffffff817955b0 T ixgb_free_receive_structures +ffffffff817956e0 T ixgb_allocate_transmit_structures +ffffffff81795760 T ixgb_transmit_checksum_setup +ffffffff81795860 T ixgb_get_buf +ffffffff81795a10 T ixgb_allocate_receive_structures +ffffffff81795b90 T ixgb_receive_checksum +ffffffff81795bf0 T ixgb_write_pci_cfg +ffffffff81796000 T ixgb_validate_eeprom_checksum +ffffffff81796080 T ixgb_read_eeprom +ffffffff817962f0 T ixgb_update_eeprom_checksum +ffffffff81796350 T ixgb_write_eeprom +ffffffff81796830 t ixgb_shift_out_bits +ffffffff81796970 T ixgb_get_eeprom_data +ffffffff81796a10 T ixgb_get_eeprom_word +ffffffff81796ae0 T ixgb_get_ee_mac_addr +ffffffff81796be0 T ixgb_get_ee_pba_number +ffffffff81796ca0 T ixgb_get_ee_device_id +ffffffff81797000 T ixgb_mac_reset +ffffffff817971e0 T ixgb_adapter_stop +ffffffff81797320 T ixgb_init_hw +ffffffff81797620 T ixgb_init_rx_addrs +ffffffff81797750 T mac_addr_valid +ffffffff817977b0 T ixgb_clear_vfta +ffffffff81797830 T ixgb_clear_hw_cntrs +ffffffff81797f10 T ixgb_setup_fc +ffffffff817980a0 T ixgb_check_for_link +ffffffff817982b0 T ixgb_rar_set +ffffffff81798320 T ixgb_mc_addr_list_update +ffffffff817985a0 T ixgb_write_vfta +ffffffff817985d0 T ixgb_read_phy_reg +ffffffff81798ad0 T ixgb_write_phy_reg +ffffffff81798fc0 T ixgb_check_for_bad_link +ffffffff81799080 T ixgb_led_on +ffffffff817990d0 T ixgb_led_off +ffffffff8179a000 T ixgbe_probe +ffffffff8179a030 T ixgbe_attach +ffffffff8179a580 T ixgbe_detach +ffffffff8179a790 T ixgbe_activate +ffffffff8179a8a0 T ixgbe_identify_hardware +ffffffff8179a960 T ixgbe_allocate_pci_resources +ffffffff8179aab0 T ixgbe_allocate_queues +ffffffff8179afb0 T ixgbe_allocate_msix +ffffffff8179b1e0 T ixgbe_allocate_legacy +ffffffff8179b300 T ixgbe_setup_interface +ffffffff8179b660 T ixgbe_free_transmit_structures +ffffffff8179b6e0 T ixgbe_free_receive_structures +ffffffff8179b7a0 T ixgbe_free_pci_resources +ffffffff8179b880 T ixgbe_stop +ffffffff8179bb80 T ixgbe_init +ffffffff8179c760 T ixgbe_start +ffffffff8179c940 T ixgbe_encap +ffffffff8179cd80 T ixgbe_ioctl +ffffffff8179d0c0 T ixgbe_rxrinfo +ffffffff8179d220 T ixgbe_get_sffpage +ffffffff8179d3d0 T ixgbe_disable_intr +ffffffff8179d4a0 T ixgbe_iff +ffffffff8179d610 T ixgbe_enable_intr +ffffffff8179d720 T ixgbe_enable_queues +ffffffff8179d830 T ixgbe_watchdog +ffffffff8179da40 T ixgbe_setup_transmit_structures +ffffffff8179db10 T ixgbe_initialize_transmit_units +ffffffff8179dde0 T ixgbe_setup_receive_structures +ffffffff8179df10 T ixgbe_initialize_receive_units +ffffffff8179e3f0 T ixgbe_config_gpie +ffffffff8179e4c0 T ixgbe_setup_vlan_hw_support +ffffffff8179e630 T ixgbe_configure_ivars +ffffffff8179e7e0 T ixgbe_set_ivar +ffffffff8179e990 T ixgbe_config_link +ffffffff8179eb30 T ixgbe_config_delay_values +ffffffff8179ec50 t ix_kstats_tick +ffffffff8179ed10 T ixgbe_enable_queue +ffffffff8179ede0 T ixgbe_disable_queue +ffffffff8179eeb0 T ixgbe_link_intr +ffffffff8179eec0 T ixgbe_intr +ffffffff8179f390 T ixgbe_queue_intr +ffffffff8179f4e0 T ixgbe_rxeof +ffffffff8179f880 T ixgbe_txeof +ffffffff8179fa10 T ixgbe_rxrefill +ffffffff8179fad0 T ixgbe_legacy_intr +ffffffff8179fc80 T ixgbe_update_link_status +ffffffff8179fdc0 T ixgbe_handle_mod +ffffffff8179fee0 T ixgbe_handle_msf +ffffffff8179ffb0 T ixgbe_handle_phy +ffffffff817a0040 T ixgbe_media_status +ffffffff817a0250 T ixgbe_media_change +ffffffff817a0300 T ixgbe_mc_array_itr +ffffffff817a0340 T ixgbe_setup_msix +ffffffff817a03d0 T ixgbe_add_media_types +ffffffff817a0670 T ixgbe_dma_malloc +ffffffff817a0870 T ixgbe_dma_free +ffffffff817a0920 T ixgbe_allocate_transmit_buffers +ffffffff817a0a40 T ixgbe_setup_transmit_ring +ffffffff817a0b90 T ixgbe_free_transmit_buffers +ffffffff817a0cc0 T ixgbe_get_buf +ffffffff817a0e10 T ixgbe_allocate_receive_buffers +ffffffff817a0f50 T ixgbe_setup_receive_ring +ffffffff817a1030 T ixgbe_rxfill +ffffffff817a1170 T ixgbe_initialize_rss_mapping +ffffffff817a13e0 T ixgbe_map_queue_statistics +ffffffff817a1500 T ixgbe_free_receive_buffers +ffffffff817a1620 T ixgbe_rx_offload +ffffffff817a17f0 T ixgbe_read_pci_cfg +ffffffff817a1850 T ixgbe_write_pci_cfg +ffffffff817a18d0 t ix_kstats_read +ffffffff817a1a90 t ix_rxq_kstats_read +ffffffff817a1bf0 t ix_txq_kstats_read +ffffffff817a2000 T ixgbe_init_ops_generic +ffffffff817a2270 T ixgbe_init_eeprom_params_generic +ffffffff817a2320 T ixgbe_read_eerd_generic +ffffffff817a2420 T ixgbe_read_eeprom_bit_bang_generic +ffffffff817a26c0 T ixgbe_write_eeprom_generic +ffffffff817a2b10 T ixgbe_validate_eeprom_checksum_generic +ffffffff817a2bc0 T ixgbe_update_eeprom_checksum_generic +ffffffff817a2c40 T ixgbe_calc_eeprom_checksum_generic +ffffffff817a2de0 T ixgbe_init_hw_generic +ffffffff817a2e40 T ixgbe_start_hw_generic +ffffffff817a2f60 T ixgbe_clear_hw_cntrs_generic +ffffffff817a3940 T ixgbe_enable_rx_dma_generic +ffffffff817a39a0 T ixgbe_get_mac_addr_generic +ffffffff817a3a30 T ixgbe_stop_adapter_generic +ffffffff817a3bb0 T ixgbe_get_bus_info_generic +ffffffff817a3c60 T ixgbe_set_lan_id_multi_port_pcie +ffffffff817a3d30 T ixgbe_acquire_swfw_sync +ffffffff817a3f60 T ixgbe_release_swfw_sync +ffffffff817a4010 T prot_autoc_read_generic +ffffffff817a4070 T prot_autoc_write_generic +ffffffff817a40c0 T ixgbe_led_on_generic +ffffffff817a4180 T ixgbe_led_off_generic +ffffffff817a4230 T ixgbe_blink_led_start_generic +ffffffff817a43a0 T ixgbe_blink_led_stop_generic +ffffffff817a44c0 T ixgbe_set_rar_generic +ffffffff817a45e0 T ixgbe_clear_rar_generic +ffffffff817a46e0 T ixgbe_init_rx_addrs_generic +ffffffff817a48e0 T ixgbe_update_mc_addr_list_generic +ffffffff817a4ae0 T ixgbe_enable_mc_generic +ffffffff817a4b50 T ixgbe_disable_mc_generic +ffffffff817a4bb0 T ixgbe_enable_rx_generic +ffffffff817a4c70 T ixgbe_disable_rx_generic +ffffffff817a4d50 T ixgbe_fc_enable_generic +ffffffff817a5180 T ixgbe_setup_fc_generic +ffffffff817a5450 T ixgbe_fc_autoneg +ffffffff817a5730 T ixgbe_device_supports_autoneg_fc +ffffffff817a5820 T ixgbe_start_hw_gen2 +ffffffff817a5a00 T ixgbe_identify_phy +ffffffff817a5a60 T ixgbe_set_pci_config_data_generic +ffffffff817a5ad0 T ixgbe_disable_rx +ffffffff817a5b10 T ixgbe_disable_pcie_master +ffffffff817a5c60 T ixgbe_read_eerd_buffer_generic +ffffffff817a5da0 T ixgbe_poll_eerd_eewr_done +ffffffff817a5e40 T ixgbe_write_eewr_buffer_generic +ffffffff817a5fc0 T ixgbe_write_eewr_generic +ffffffff817a6010 T ixgbe_acquire_eeprom +ffffffff817a6190 T ixgbe_get_eeprom_semaphore +ffffffff817a63a0 T ixgbe_release_eeprom_semaphore +ffffffff817a6410 T ixgbe_ready_eeprom +ffffffff817a6580 T ixgbe_shift_out_eeprom_bits +ffffffff817a6740 T ixgbe_shift_in_eeprom_bits +ffffffff817a68a0 T ixgbe_standby_eeprom +ffffffff817a6980 T ixgbe_raise_eeprom_clk +ffffffff817a69f0 T ixgbe_lower_eeprom_clk +ffffffff817a6a60 T ixgbe_release_eeprom +ffffffff817a6b40 T ixgbe_validate_mac_addr +ffffffff817a6ba0 T ixgbe_init_uta_tables +ffffffff817a6be0 T ixgbe_add_uc_addr +ffffffff817a6c50 T ixgbe_mta_vector +ffffffff817a6d00 T ixgbe_set_mta +ffffffff817a6dc0 T ixgbe_negotiate_fc +ffffffff817a6e70 T ixgbe_fc_autoneg_fiber +ffffffff817a6f90 T ixgbe_fc_autoneg_backplane +ffffffff817a7100 T ixgbe_fc_autoneg_copper +ffffffff817a7220 T ixgbe_disable_sec_rx_path_generic +ffffffff817a72e0 T ixgbe_enable_sec_rx_path_generic +ffffffff817a7370 T ixgbe_enable_rx +ffffffff817a73b0 T ixgbe_get_pcie_msix_count_generic +ffffffff817a7430 T ixgbe_insert_mac_addr_generic +ffffffff817a7640 T ixgbe_set_vmdq +ffffffff817a7680 T ixgbe_set_rar +ffffffff817a76d0 T ixgbe_clear_vmdq +ffffffff817a7710 T ixgbe_clear_vmdq_generic +ffffffff817a78c0 T ixgbe_set_vmdq_generic +ffffffff817a7970 T ixgbe_init_uta_tables_generic +ffffffff817a79f0 T ixgbe_find_vlvf_slot +ffffffff817a7aa0 T ixgbe_set_vfta_generic +ffffffff817a7bb0 T ixgbe_set_vlvf_generic +ffffffff817a7e40 T ixgbe_clear_vfta_generic +ffffffff817a7f40 T ixgbe_need_crosstalk_fix +ffffffff817a7f90 T ixgbe_check_mac_link_generic +ffffffff817a8180 T ixgbe_get_device_caps_generic +ffffffff817a81d0 T ixgbe_calculate_checksum +ffffffff817a8290 T ixgbe_hic_unlocked +ffffffff817a8450 T ixgbe_host_interface_command +ffffffff817a8620 T ixgbe_clear_tx_pending +ffffffff817a87e0 T ixgbe_mng_present +ffffffff817a8850 T ixgbe_mng_enabled +ffffffff817a8910 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff817a8cb0 T ixgbe_flap_tx_laser +ffffffff817a8cf0 T ixgbe_check_link +ffffffff817a8d40 T ixgbe_set_soft_rate_select_speed +ffffffff817a8e30 T ixgbe_init_shared_code +ffffffff817a8ee0 T ixgbe_set_mac_type +ffffffff817a9080 T ixgbe_init_hw +ffffffff817a90c0 T ixgbe_get_media_type +ffffffff817a9100 T ixgbe_read_mbx +ffffffff817a9160 T ixgbe_write_mbx +ffffffff817a91b0 T ixgbe_check_for_msg +ffffffff817a91f0 T ixgbe_check_for_ack +ffffffff817a9230 T ixgbe_check_for_rst +ffffffff817a9270 T ixgbe_poll_for_msg +ffffffff817a9330 T ixgbe_poll_for_ack +ffffffff817a93f0 T ixgbe_read_posted_mbx +ffffffff817a94d0 T ixgbe_write_posted_mbx +ffffffff817a95a0 T ixgbe_init_mbx_ops_generic +ffffffff817a95e0 T ixgbe_read_v2p_mailbox +ffffffff817a9650 T ixgbe_check_for_bit_pf +ffffffff817a96e0 T ixgbe_check_for_msg_pf +ffffffff817a9790 T ixgbe_check_for_ack_pf +ffffffff817a9830 T ixgbe_check_for_rst_pf +ffffffff817a9920 T ixgbe_obtain_mbx_lock_pf +ffffffff817a99b0 T ixgbe_write_mbx_pf +ffffffff817a9b80 T ixgbe_read_mbx_pf +ffffffff817a9c90 T ixgbe_init_mbx_params_pf +ffffffff817aa000 T ixgbe_set_pcie_completion_timeout +ffffffff817aa090 T ixgbe_init_ops_82598 +ffffffff817aa1e0 T ixgbe_init_phy_ops_82598 +ffffffff817aa2d0 T ixgbe_start_hw_82598 +ffffffff817aa480 T ixgbe_reset_hw_82598 +ffffffff817aa7b0 T ixgbe_get_media_type_82598 +ffffffff817aa870 T ixgbe_get_supported_physical_layer_82598 +ffffffff817aaa40 T ixgbe_read_analog_reg8_82598 +ffffffff817aab00 T ixgbe_write_analog_reg8_82598 +ffffffff817aab80 T ixgbe_set_lan_id_multi_port_pcie_82598 +ffffffff817aac20 T ixgbe_enable_rx_dma_82598 +ffffffff817aac70 T ixgbe_set_vmdq_82598 +ffffffff817aad20 T ixgbe_clear_vmdq_82598 +ffffffff817aadd0 T ixgbe_set_vfta_82598 +ffffffff817aaf00 T ixgbe_clear_vfta_82598 +ffffffff817ab0b0 T ixgbe_fc_enable_82598 +ffffffff817ab510 T ixgbe_read_i2c_eeprom_82598 +ffffffff817ab530 T ixgbe_check_mac_link_82598 +ffffffff817ab7d0 T ixgbe_setup_mac_link_82598 +ffffffff817ab990 T ixgbe_get_link_capabilities_82598 +ffffffff817aba60 T ixgbe_setup_copper_link_82598 +ffffffff817abb70 T ixgbe_start_mac_link_82598 +ffffffff817abc90 T ixgbe_validate_link_ready +ffffffff817abd40 T ixgbe_read_i2c_phy_82598 +ffffffff817ac000 T ixgbe_init_mac_link_ops_82599 +ffffffff817ac190 T ixgbe_disable_tx_laser_multispeed_fiber +ffffffff817ac260 T ixgbe_enable_tx_laser_multispeed_fiber +ffffffff817ac2e0 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff817ac420 T ixgbe_setup_mac_link_82599 +ffffffff817ac6a0 T ixgbe_set_hard_rate_select_speed +ffffffff817ac760 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff817ac830 T ixgbe_setup_mac_link_smartspeed +ffffffff817acbc0 T ixgbe_init_phy_ops_82599 +ffffffff817acd10 T ixgbe_read_i2c_byte_82599 +ffffffff817ace90 T ixgbe_write_i2c_byte_82599 +ffffffff817ad010 T ixgbe_setup_copper_link_82599 +ffffffff817ad070 T ixgbe_setup_sfp_modules_82599 +ffffffff817ad230 T prot_autoc_read_82599 +ffffffff817ad360 T prot_autoc_write_82599 +ffffffff817ad4d0 T ixgbe_reset_pipeline_82599 +ffffffff817ad810 T ixgbe_init_ops_82599 +ffffffff817ad9f0 T ixgbe_identify_phy_82599 +ffffffff817ada80 T ixgbe_reset_hw_82599 +ffffffff817ade10 T ixgbe_get_media_type_82599 +ffffffff817adf40 T ixgbe_get_supported_physical_layer_82599 +ffffffff817ae110 T ixgbe_enable_rx_dma_82599 +ffffffff817ae180 T ixgbe_read_analog_reg8_82599 +ffffffff817ae240 T ixgbe_write_analog_reg8_82599 +ffffffff817ae2c0 T ixgbe_start_hw_82599 +ffffffff817ae3c0 T ixgbe_get_link_capabilities_82599 +ffffffff817ae500 T ixgbe_stop_mac_link_on_d3_82599 +ffffffff817ae5c0 T ixgbe_read_eeprom_82599 +ffffffff817ae5f0 T ixgbe_start_mac_link_82599 +ffffffff817ae7f0 T ixgbe_verify_fw_version_82599 +ffffffff817af000 T ixgbe_init_ops_X540 +ffffffff817af220 T ixgbe_init_eeprom_params_X540 +ffffffff817af2b0 T ixgbe_read_eerd_X540 +ffffffff817af340 T ixgbe_write_eewr_X540 +ffffffff817af3d0 T ixgbe_update_eeprom_checksum_X540 +ffffffff817af4a0 T ixgbe_validate_eeprom_checksum_X540 +ffffffff817af590 T ixgbe_calc_eeprom_checksum_X540 +ffffffff817af730 T ixgbe_reset_hw_X540 +ffffffff817af920 T ixgbe_get_media_type_X540 +ffffffff817af950 T ixgbe_get_supported_physical_layer_X540 +ffffffff817af9d0 T ixgbe_start_hw_X540 +ffffffff817afa20 T ixgbe_acquire_swfw_sync_X540 +ffffffff817afe70 T ixgbe_release_swfw_sync_X540 +ffffffff817affa0 T ixgbe_init_swfw_sync_X540 +ffffffff817b0080 T ixgbe_setup_mac_link_X540 +ffffffff817b00a0 T ixgbe_blink_led_start_X540 +ffffffff817b01c0 T ixgbe_blink_led_stop_X540 +ffffffff817b02c0 T ixgbe_get_link_capabilities_X540 +ffffffff817b0300 T ixgbe_update_flash_X540 +ffffffff817b04e0 T ixgbe_poll_flash_update_done_X540 +ffffffff817b0570 T ixgbe_get_swfw_sync_semaphore +ffffffff817b0700 T ixgbe_release_swfw_sync_semaphore +ffffffff817b1000 T ixgbe_init_ops_X550 +ffffffff817b1110 T ixgbe_dmac_config_X550 +ffffffff817b11f0 T ixgbe_dmac_config_tcs_X550 +ffffffff817b1340 T ixgbe_dmac_update_tcs_X550 +ffffffff817b1400 T ixgbe_set_source_address_pruning_X550 +ffffffff817b14f0 T ixgbe_init_eeprom_params_X550 +ffffffff817b1570 T ixgbe_calc_eeprom_checksum_X550 +ffffffff817b1590 T ixgbe_read_ee_hostif_X550 +ffffffff817b1660 T ixgbe_write_ee_hostif_X550 +ffffffff817b1720 T ixgbe_update_eeprom_checksum_X550 +ffffffff817b18c0 T ixgbe_validate_eeprom_checksum_X550 +ffffffff817b1a10 T ixgbe_disable_rx_x550 +ffffffff817b1b30 T ixgbe_led_on_t_X550em +ffffffff817b1bf0 T ixgbe_led_off_t_X550em +ffffffff817b1cb0 T ixgbe_read_cs4227 +ffffffff817b1ce0 T ixgbe_write_cs4227 +ffffffff817b1d10 T ixgbe_read_pe +ffffffff817b1d60 T ixgbe_write_pe +ffffffff817b1dc0 T ixgbe_reset_cs4227 +ffffffff817b2050 T ixgbe_check_cs4227 +ffffffff817b2200 T ixgbe_setup_mux_ctl +ffffffff817b2290 T ixgbe_identify_phy_x550em +ffffffff817b24a0 T ixgbe_read_mng_if_sel_x550em +ffffffff817b2520 T ixgbe_fw_phy_activity +ffffffff817b2640 T ixgbe_get_phy_id_fw +ffffffff817b27a0 T ixgbe_identify_phy_fw +ffffffff817b27f0 T ixgbe_shutdown_fw_phy +ffffffff817b28c0 T ixgbe_read_phy_reg_x550em +ffffffff817b28f0 T ixgbe_write_phy_reg_x550em +ffffffff817b2920 T ixgbe_init_ops_X550EM +ffffffff817b2bc0 T ixgbe_get_bus_info_X550em +ffffffff817b2c10 T ixgbe_get_media_type_X550em +ffffffff817b2ce0 T ixgbe_setup_sfp_modules_X550em +ffffffff817b2e70 T ixgbe_get_link_capabilities_X550em +ffffffff817b2f40 T ixgbe_reset_hw_X550em +ffffffff817b33c0 T ixgbe_get_supported_physical_layer_X550em +ffffffff817b3540 T ixgbe_setup_fc_X550em +ffffffff817b36a0 T ixgbe_init_phy_ops_X550em +ffffffff817b3b70 T ixgbe_setup_fw_link +ffffffff817b3d00 T ixgbe_fc_autoneg_fw +ffffffff817b3d30 T ixgbe_setup_eee_fw +ffffffff817b3d90 T ixgbe_init_ops_X550EM_a +ffffffff817b3ec0 T ixgbe_read_iosf_sb_reg_x550 +ffffffff817b4030 T ixgbe_write_iosf_sb_reg_x550 +ffffffff817b41a0 T ixgbe_read_iosf_sb_reg_x550a +ffffffff817b4230 T ixgbe_write_iosf_sb_reg_x550a +ffffffff817b42c0 T ixgbe_acquire_swfw_sync_X550a +ffffffff817b4400 T ixgbe_release_swfw_sync_X550a +ffffffff817b44a0 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff817b44e0 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff817b4640 T ixgbe_setup_fc_backplane_x550em_a +ffffffff817b4830 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff817b49a0 T ixgbe_init_ops_X550EM_x +ffffffff817b4a60 T ixgbe_acquire_swfw_sync_X550em +ffffffff817b4b20 T ixgbe_release_swfw_sync_X550em +ffffffff817b4bb0 T ixgbe_iosf_wait +ffffffff817b4c60 T ixgbe_get_phy_token +ffffffff817b4ce0 T ixgbe_put_phy_token +ffffffff817b4d60 T ixgbe_supported_sfp_modules_X550em +ffffffff817b4de0 T ixgbe_identify_sfp_module_X550em +ffffffff817b4e60 T ixgbe_init_mac_link_ops_X550em +ffffffff817b4fa0 T ixgbe_restart_an_internal_phy_x550em +ffffffff817b50b0 T ixgbe_setup_sgmii +ffffffff817b5280 T ixgbe_setup_sgmii_fw +ffffffff817b5480 T ixgbe_setup_mac_link_sfp_x550a +ffffffff817b5670 T ixgbe_setup_mac_link_sfp_x550em +ffffffff817b5730 T ixgbe_setup_mac_link_t_X550em +ffffffff817b57e0 T ixgbe_check_link_t_X550em +ffffffff817b58c0 T ixgbe_get_lasi_ext_t_x550em +ffffffff817b5a40 T ixgbe_enable_lasi_ext_t_x550em +ffffffff817b5bd0 T ixgbe_setup_kr_speed_x550em +ffffffff817b5de0 T ixgbe_reset_phy_fw +ffffffff817b5f60 T ixgbe_check_overtemp_fw +ffffffff817b60c0 T ixgbe_read_phy_reg_x550a +ffffffff817b6160 T ixgbe_write_phy_reg_x550a +ffffffff817b6210 T ixgbe_setup_kr_x550em +ffffffff817b6280 T ixgbe_setup_internal_phy_t_x550em +ffffffff817b63e0 T ixgbe_enter_lplu_t_x550em +ffffffff817b6630 T ixgbe_handle_lasi_ext_t_x550em +ffffffff817b66b0 T ixgbe_reset_phy_t_X550em +ffffffff817b6700 T ixgbe_set_mdio_speed +ffffffff817b67d0 T ixgbe_init_ext_t_x550em +ffffffff817b6880 T ixgbe_setup_sfi_x550a +ffffffff817b6a30 T ixgbe_setup_ixfi_x550em_x +ffffffff817b6c10 T ixgbe_setup_ixfi_x550em +ffffffff817b6df0 T ixgbe_ext_phy_t_x550em_get_link +ffffffff817b6e80 T ixgbe_setup_phy_loopback_x550em +ffffffff817b7070 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff817b7210 T ixgbe_write_ee_hostif_data_X550 +ffffffff817b7280 T ixgbe_checksum_ptr_x550 +ffffffff817b7410 T ixgbe_calc_checksum_X550 +ffffffff817b75a0 T ixgbe_update_flash_X550 +ffffffff817b75f0 T ixgbe_get_lcd_t_x550em +ffffffff817b76b0 T ixgbe_set_mux +ffffffff817b8000 T ixgbe_read_i2c_combined_generic_int +ffffffff817b8260 T ixgbe_i2c_start +ffffffff817b83b0 t ixgbe_out_i2c_byte_ack +ffffffff817b8400 T ixgbe_clock_in_i2c_byte +ffffffff817b8500 T ixgbe_clock_out_i2c_bit +ffffffff817b8610 T ixgbe_i2c_stop +ffffffff817b8790 T ixgbe_i2c_bus_clear +ffffffff817b88a0 T ixgbe_read_i2c_combined_generic +ffffffff817b88c0 T ixgbe_read_i2c_combined_generic_unlocked +ffffffff817b88e0 T ixgbe_write_i2c_combined_generic_int +ffffffff817b8aa0 T ixgbe_write_i2c_combined_generic +ffffffff817b8ac0 T ixgbe_write_i2c_combined_generic_unlocked +ffffffff817b8ae0 T ixgbe_init_phy_ops_generic +ffffffff817b8c10 T ixgbe_identify_phy_generic +ffffffff817b8ce0 T ixgbe_reset_phy_generic +ffffffff817b8ef0 T ixgbe_read_phy_reg_generic +ffffffff817b8f90 T ixgbe_write_phy_reg_generic +ffffffff817b9030 T ixgbe_read_phy_reg_mdi +ffffffff817b9190 T ixgbe_write_phy_reg_mdi +ffffffff817b92f0 T ixgbe_setup_phy_link_generic +ffffffff817b95a0 T ixgbe_setup_phy_link_speed_generic +ffffffff817b95f0 T ixgbe_get_phy_firmware_version_generic +ffffffff817b9620 T ixgbe_read_i2c_byte_generic +ffffffff817b9640 T ixgbe_write_i2c_byte_generic +ffffffff817b9660 T ixgbe_read_i2c_eeprom_generic +ffffffff817b9690 T ixgbe_write_i2c_eeprom_generic +ffffffff817b96b0 T ixgbe_identify_module_generic +ffffffff817b9720 T ixgbe_read_i2c_byte_generic_unlocked +ffffffff817b9740 T ixgbe_write_i2c_byte_generic_unlocked +ffffffff817b9760 T ixgbe_tn_check_overtemp +ffffffff817b97d0 t ixgbe_probe_phy +ffffffff817b99d0 T ixgbe_check_reset_blocked +ffffffff817b9a30 T ixgbe_validate_phy_addr +ffffffff817b9aa0 T ixgbe_get_phy_id +ffffffff817b9b50 T ixgbe_get_phy_type_from_id +ffffffff817b9c10 T ixgbe_get_copper_link_capabilities_generic +ffffffff817b9d00 T ixgbe_get_copper_speeds_supported +ffffffff817b9dc0 T ixgbe_check_phy_link_tnx +ffffffff817ba080 T ixgbe_setup_phy_link_tnx +ffffffff817ba330 T ixgbe_get_phy_firmware_version_tnx +ffffffff817ba360 T ixgbe_reset_phy_nl +ffffffff817ba5f0 T ixgbe_get_sfp_init_sequence_offsets +ffffffff817ba800 T ixgbe_is_sfp +ffffffff817ba850 T ixgbe_identify_sfp_module_generic +ffffffff817bac40 T ixgbe_identify_qsfp_module_generic +ffffffff817baf30 T ixgbe_get_supported_phy_sfp_layer_generic +ffffffff817bb0d0 T ixgbe_is_sfp_probe +ffffffff817bb120 T ixgbe_read_i2c_byte_generic_int +ffffffff817bb320 T ixgbe_clock_out_i2c_byte +ffffffff817bb480 T ixgbe_get_i2c_ack +ffffffff817bb680 T ixgbe_write_i2c_byte_generic_int +ffffffff817bb7b0 T ixgbe_set_i2c_data +ffffffff817bb960 T ixgbe_raise_i2c_clk +ffffffff817bba80 T ixgbe_lower_i2c_clk +ffffffff817bbb10 T ixgbe_clock_in_i2c_bit +ffffffff817bbcd0 T ixgbe_get_i2c_data +ffffffff817bbd80 T ixgbe_set_copper_phy_power +ffffffff817bc000 t ixl_match +ffffffff817bc0a0 t ixl_attach +ffffffff817bd5f0 t ixl_710_rd_ctl +ffffffff817bd6b0 t ixl_710_wr_ctl +ffffffff817bd780 t ixl_710_set_rss_key +ffffffff817bd900 t ixl_710_set_rss_lut +ffffffff817bd980 t ixl_atq_exec +ffffffff817bdaf0 t ixl_wakeup +ffffffff817bdb10 t ixl_722_rd_ctl +ffffffff817bdb40 t ixl_722_wr_ctl +ffffffff817bdb70 t ixl_722_set_rss_key +ffffffff817bdba0 t ixl_722_set_rss_lut +ffffffff817bdbd0 t ixl_dmamem_alloc +ffffffff817bdd30 t ixl_arq +ffffffff817bdfd0 t ixl_arq_fill +ffffffff817be240 t ixl_pxe_clear +ffffffff817be2f0 t ixl_get_mac +ffffffff817be4c0 t ixl_hmc +ffffffff817beb50 t ixl_lldp_shut +ffffffff817bebe0 t ixl_phy_mask_ints +ffffffff817bec90 t ixl_restart_an +ffffffff817bed40 t ixl_get_switch_config +ffffffff817bef30 t ixl_get_phy_types +ffffffff817bf120 t ixl_get_link_status +ffffffff817bf1f0 t ixl_get_vsi +ffffffff817bf340 t ixl_set_vsi +ffffffff817bf4b0 t ixl_intr0 +ffffffff817bf6f0 t ixl_intr_vector +ffffffff817bf790 t ixl_ioctl +ffffffff817c1350 t ixl_start +ffffffff817c18d0 t ixl_watchdog +ffffffff817c1900 t ixl_media_change +ffffffff817c1930 t ixl_media_status +ffffffff817c19b0 t ixl_media_add +ffffffff817c1a40 t ixl_link_state_update +ffffffff817c1ba0 t ixl_remove_macvlan +ffffffff817c1c90 t ixl_add_macvlan +ffffffff817c1d70 t ixl_kstat_attach +ffffffff817c1e20 t ixl_dmamem_free +ffffffff817c1e90 t ixl_hmc_free +ffffffff817c1f80 t ixl_arq_unfill +ffffffff817c2070 t ixl_link_state_update_iaq +ffffffff817c2110 t ixl_set_link_status +ffffffff817c2280 t ixl_atq_poll +ffffffff817c2480 t ixl_rxeof +ffffffff817c2760 t ixl_txeof +ffffffff817c2950 t ixl_rxfill +ffffffff817c2c50 t ixl_down +ffffffff817c32a0 t ixl_rxr_free +ffffffff817c33b0 t ixl_txr_free +ffffffff817c34b0 t ixl_rxrefill +ffffffff817c34d0 t ixl_sfp_open +ffffffff817c36d0 t ixl_sfp_get +ffffffff817c37f0 t ixl_sfp_close +ffffffff817c3910 t ixl_qsfp_open +ffffffff817c3950 t ixl_qsfp_get +ffffffff817c3a70 t ixl_qsfp_close +ffffffff817c3aa0 t ixl_kstat_tick +ffffffff817c3b00 t ixl_kstat_create +ffffffff817c3ce0 t ixl_kstat_read +ffffffff817c4000 T dwqe_pci_match +ffffffff817c4030 T dwqe_pci_attach +ffffffff817c5000 T xge_match +ffffffff817c5030 T xge_attach +ffffffff817c5da0 T xge_setup_xgxs_xena +ffffffff817c5e30 T xge_setup_xgxs_herc +ffffffff817c5ec0 T xge_alloc_txmem +ffffffff817c60d0 T xge_alloc_rxmem +ffffffff817c63b0 T xge_add_rxbuf +ffffffff817c65a0 T xge_xgmii_mediachange +ffffffff817c65d0 T xge_ifmedia_status +ffffffff817c6650 T xge_ioctl +ffffffff817c68e0 T xge_start +ffffffff817c6c50 T xge_intr +ffffffff817c7220 T xge_enable +ffffffff817c72d0 T xge_init +ffffffff817c7760 T xge_stop +ffffffff817c7830 T xge_setpromisc +ffffffff817c78b0 T xge_setmulti +ffffffff817c8000 T thtc_match +ffffffff817c8060 T thtc_attach +ffffffff817c8280 T tht_match +ffffffff817c82b0 T tht_attach +ffffffff817c84e0 T thtc_lookup +ffffffff817c8560 T tht_intr +ffffffff817c8720 T thtc_print +ffffffff817c8790 T tht_sw_reset +ffffffff817c8c80 T tht_lladdr_read +ffffffff817c8d30 T tht_ioctl +ffffffff817c8ec0 T tht_start +ffffffff817c9460 T tht_watchdog +ffffffff817c9490 T tht_media_change +ffffffff817c94c0 T tht_media_status +ffffffff817c95b0 T tht_mountroot +ffffffff817c9780 T tht_fifo_alloc +ffffffff817c9890 T tht_fw_load +ffffffff817c9be0 T tht_fifo_free +ffffffff817c9c90 T tht_link_state +ffffffff817c9d40 T tht_write +ffffffff817c9d90 T tht_read +ffffffff817c9dc0 T tht_rxd +ffffffff817ca1b0 T tht_rxf_fill +ffffffff817ca750 T tht_txf +ffffffff817caa40 T tht_up +ffffffff817caf70 T tht_down +ffffffff817cb5a0 T tht_iff +ffffffff817cb770 T tht_pkt_alloc +ffffffff817cb940 T tht_lladdr_write +ffffffff817cba00 T tht_pkt_free +ffffffff817cbad0 T tht_write_region +ffffffff817cbb20 T tht_fifo_writable +ffffffff817cbb90 T tht_fifo_readable +ffffffff817cbc00 T tht_rxf_drain +ffffffff817cbd10 T tht_fifo_pre +ffffffff817cbd60 T tht_pkt_get +ffffffff817cbde0 T tht_load_pkt +ffffffff817cbf20 T tht_pkt_put +ffffffff817cbf90 T tht_fifo_write +ffffffff817cc040 T tht_fifo_write_dmap +ffffffff817cc170 T tht_fifo_write_pad +ffffffff817cc240 T tht_fifo_post +ffffffff817cc2f0 T tht_fifo_read +ffffffff817cc390 T tht_pkt_used +ffffffff817cc3c0 T tht_dmamem_alloc +ffffffff817cc530 T tht_dmamem_free +ffffffff817cc5b0 T tht_wait_eq +ffffffff817cc670 T tht_wait_ne +ffffffff817cd000 T myx_match +ffffffff817cd030 T myx_attach +ffffffff817cd2a0 T myx_mcl_small +ffffffff817cd300 T myx_refill +ffffffff817cd360 T myx_mcl_big +ffffffff817cd410 T myx_query +ffffffff817cd700 T myx_pcie_dc +ffffffff817cd7e0 T myx_attachhook +ffffffff817cdaf0 T myx_ether_aton +ffffffff817cdbb0 T myx_read +ffffffff817cdbe0 T myx_loadfirmware +ffffffff817cdde0 T myx_write +ffffffff817cde40 T myx_boot +ffffffff817cdfc0 T myx_dmamem_alloc +ffffffff817ce120 T myx_cmd +ffffffff817ce270 T myx_probe_firmware +ffffffff817ce600 T myx_intr +ffffffff817ce890 T myx_kstat_attach +ffffffff817ceb20 T myx_ioctl +ffffffff817cede0 T myx_start +ffffffff817cf2a0 T myx_watchdog +ffffffff817cf2d0 T myx_media_change +ffffffff817cf300 T myx_media_status +ffffffff817cf440 T myx_dmamem_free +ffffffff817cf4b0 T myx_rdma +ffffffff817cf620 T myx_link_state +ffffffff817cf6b0 T myx_up +ffffffff817d03f0 T myx_down +ffffffff817d0b50 T myx_rxrinfo +ffffffff817d0c80 T myx_get_sffpage +ffffffff817d0f70 T myx_iff +ffffffff817d1190 T myx_setlladdr +ffffffff817d1250 T myx_tx_init +ffffffff817d13a0 T myx_rx_init +ffffffff817d1580 T myx_rx_fill +ffffffff817d1840 T myx_rx_empty +ffffffff817d1910 T myx_rx_free +ffffffff817d19a0 T myx_tx_free +ffffffff817d1a20 T myx_tx_empty +ffffffff817d1af0 T myx_kstat_stop +ffffffff817d1be0 T myx_write_txd_tail +ffffffff817d1d80 T myx_load_mbuf +ffffffff817d1e30 T myx_txeof +ffffffff817d1f80 T myx_rxeof +ffffffff817d21d0 T myx_buf_fill +ffffffff817d2290 T myx_kstat_read +ffffffff817d24e0 T myx_kstat_tick +ffffffff817d2570 T myx_kstat_start +ffffffff817d3000 T oce_match +ffffffff817d3030 T oce_attach +ffffffff817d34f0 T oce_pci_alloc +ffffffff817d3780 T oce_dma_alloc +ffffffff817d39a0 T oce_init_fw +ffffffff817d3b90 T oce_mbox_init +ffffffff817d3be0 T oce_get_fw_config +ffffffff817d3cf0 T oce_check_native_mode +ffffffff817d3e20 T oce_macaddr_get +ffffffff817d3f50 T oce_intr +ffffffff817d4150 T oce_init_stats +ffffffff817d41c0 T oce_init_queues +ffffffff817d4360 T oce_attach_ifp +ffffffff817d4460 T oce_tick +ffffffff817d44b0 T oce_refill_rx +ffffffff817d4540 T oce_attachhook +ffffffff817d47c0 T oce_dma_free +ffffffff817d4870 T oce_get_link_status +ffffffff817d49b0 T oce_first_mcc +ffffffff817d4aa0 T oce_media_change +ffffffff817d4ad0 T oce_media_status +ffffffff817d4cd0 T oce_ioctl +ffffffff817d4e70 T oce_start +ffffffff817d4f70 T oce_watchdog +ffffffff817d4fd0 T oce_init +ffffffff817d5540 T oce_stop +ffffffff817d5830 T oce_rxrinfo +ffffffff817d5970 T oce_iff +ffffffff817d5be0 T oce_update_mcast +ffffffff817d5d50 T oce_set_promisc +ffffffff817d5df0 T oce_link_status +ffffffff817d5e90 T oce_update_stats +ffffffff817d5f70 T oce_macaddr_set +ffffffff817d61a0 T oce_config_vlan +ffffffff817d63b0 T oce_set_flow_control +ffffffff817d65b0 T oce_new_rq +ffffffff817d6930 T oce_alloc_rx_bufs +ffffffff817d6a70 T oce_drain_eq +ffffffff817d6b90 T oce_cmd +ffffffff817d6dd0 T oce_drain_rq +ffffffff817d6ef0 T oce_free_posted_rxbuf +ffffffff817d6fd0 T oce_drain_wq +ffffffff817d70f0 T oce_encap +ffffffff817d74d0 T oce_intr_wq +ffffffff817d7670 T oce_txeof +ffffffff817d7770 T oce_intr_rq +ffffffff817d7950 T oce_rxeoc +ffffffff817d7a90 T oce_rxeof +ffffffff817d7d90 T oce_port_valid +ffffffff817d7de0 T oce_vtp_valid +ffffffff817d7e30 T oce_get_buf +ffffffff817d7fe0 T oce_intr_mq +ffffffff817d8210 T oce_link_event +ffffffff817d82c0 T oce_create_iface +ffffffff817d8460 T oce_create_eq +ffffffff817d85c0 T oce_create_wq +ffffffff817d8870 T oce_create_rq +ffffffff817d8b20 T oce_create_mq +ffffffff817d8ce0 T oce_release_queues +ffffffff817d8df0 T oce_destroy_rq +ffffffff817d9010 T oce_destroy_wq +ffffffff817d9230 T oce_destroy_mq +ffffffff817d93d0 T oce_destroy_eq +ffffffff817d9560 T oce_create_ring +ffffffff817d9740 T oce_create_cq +ffffffff817d98e0 T oce_destroy_ring +ffffffff817d9990 T oce_pkt_alloc +ffffffff817d9a40 T oce_new_wq +ffffffff817d9d40 T oce_destroy_cq +ffffffff817d9ed0 T oce_pkt_free +ffffffff817d9f20 T oce_new_eq +ffffffff817da2d0 T oce_new_mq +ffffffff817da650 T oce_drain_mq +ffffffff817da770 T oce_new_cq +ffffffff817dabe0 T oce_load_ring +ffffffff817dacf0 T oce_mbox_dispatch +ffffffff817daec0 T oce_macaddr_add +ffffffff817daff0 T oce_macaddr_del +ffffffff817db100 T oce_stats_be2 +ffffffff817db230 T oce_stats_be3 +ffffffff817db350 T oce_stats_xe +ffffffff817dc000 T dc_pci_match +ffffffff817dc090 T dc_pci_attach +ffffffff817dc820 T dc_pci_detach +ffffffff817dd000 T epic_pci_match +ffffffff817dd030 T epic_pci_attach +ffffffff817de000 T ti_pci_match +ffffffff817de030 T ti_pci_attach +ffffffff817df000 T ne_pci_match +ffffffff817df100 T ne_pci_attach +ffffffff817df460 T ne_pci_lookup +ffffffff817e0000 T gem_match_pci +ffffffff817e0030 T gem_attach_pci +ffffffff817e02a0 T gem_detach_pci +ffffffff817e0320 T gem_pci_enaddr +ffffffff817e1000 T cas_match +ffffffff817e1030 T cas_attach +ffffffff817e11c0 T cas_pci_enaddr +ffffffff817e1490 T cas_intr +ffffffff817e1610 T cas_config +ffffffff817e1d10 T cas_reset +ffffffff817e1dd0 T cas_start +ffffffff817e1f20 T cas_ioctl +ffffffff817e2070 T cas_watchdog +ffffffff817e20c0 T cas_mii_readreg +ffffffff817e2190 T cas_mii_writereg +ffffffff817e2280 T cas_mii_statchg +ffffffff817e2340 T cas_mediachange +ffffffff817e23a0 T cas_mediastatus +ffffffff817e2400 T cas_mifinit +ffffffff817e2460 T cas_pcs_readreg +ffffffff817e24f0 T cas_pcs_writereg +ffffffff817e2650 T cas_tick +ffffffff817e2820 T cas_bitwait +ffffffff817e28d0 T cas_reset_rx +ffffffff817e2a70 T cas_reset_tx +ffffffff817e2c10 T cas_rxdrain +ffffffff817e2c40 T cas_stop +ffffffff817e2d90 T cas_disable_rx +ffffffff817e2e50 T cas_disable_tx +ffffffff817e2f10 T cas_meminit +ffffffff817e30d0 T cas_ringsize +ffffffff817e31b0 T cas_cringsize +ffffffff817e32a0 T cas_init +ffffffff817e3720 T cas_init_regs +ffffffff817e3bb0 T cas_iff +ffffffff817e3f30 T cas_rint +ffffffff817e4450 T cas_add_rxbuf +ffffffff817e4550 T cas_eint +ffffffff817e45b0 T cas_pint +ffffffff817e4620 T cas_tint +ffffffff817e47b0 T cas_encap +ffffffff817e5000 T sf_pci_match +ffffffff817e5030 T sf_pci_attach +ffffffff817e6000 T sis_probe +ffffffff817e6030 T sis_attach +ffffffff817e6900 T sis_activate +ffffffff817e6980 T sis_reverse +ffffffff817e69f0 T sis_delay +ffffffff817e6b10 T sis_eeprom_idle +ffffffff817e7170 T sis_eeprom_putbyte +ffffffff817e74a0 T sis_eeprom_getword +ffffffff817e7b30 T sis_read_eeprom +ffffffff817e7bd0 T sis_read_cmos +ffffffff817e7c90 T sis_read_mac +ffffffff817e7e60 T sis_read96x_mac +ffffffff817e7fa0 T sis_mii_sync +ffffffff817e80d0 T sis_mii_send +ffffffff817e8260 T sis_mii_readreg +ffffffff817e8800 T sis_mii_writereg +ffffffff817e8ac0 T sis_miibus_readreg +ffffffff817e8ca0 T sis_miibus_writereg +ffffffff817e8e30 T sis_miibus_statchg +ffffffff817e91b0 T sis_mchash +ffffffff817e9220 T sis_iff +ffffffff817e9240 T sis_iff_ns +ffffffff817e94d0 T sis_iff_sis +ffffffff817e9770 T sis_reset +ffffffff817e9890 T sis_intr +ffffffff817e99d0 T sis_tick +ffffffff817e9a30 T sis_ioctl +ffffffff817e9be0 T sis_start +ffffffff817e9d40 T sis_watchdog +ffffffff817e9df0 T sis_ifmedia_upd +ffffffff817e9e70 T sis_ifmedia_sts +ffffffff817e9ed0 T sis_stop +ffffffff817ea1c0 T sis_init +ffffffff817ea600 T sis_ring_init +ffffffff817ea7c0 T sis_fill_rx_ring +ffffffff817ea870 T sis_newbuf +ffffffff817ea9c0 T sis_rxeof +ffffffff817eac10 T sis_txeof +ffffffff817eade0 T sis_encap +ffffffff817ec000 T se_match +ffffffff817ec030 T se_attach +ffffffff817ec7a0 T se_activate +ffffffff817ec830 T se_read_eeprom +ffffffff817ec940 T se_get_mac_addr_eeprom +ffffffff817ecc90 T se_pcib_match +ffffffff817eccf0 T se_get_mac_addr_apc +ffffffff817ecfc0 T se_miibus_cmd +ffffffff817ed060 T se_miibus_readreg +ffffffff817ed150 T se_miibus_writereg +ffffffff817ed230 T se_miibus_statchg +ffffffff817ed390 T se_iff +ffffffff817ed4e0 T se_reset +ffffffff817ed610 T se_intr +ffffffff817ed790 T se_tick +ffffffff817ed810 T se_ioctl +ffffffff817ed950 T se_start +ffffffff817eda90 T se_watchdog +ffffffff817edb00 T se_ifmedia_upd +ffffffff817edb70 T se_ifmedia_sts +ffffffff817edbd0 T se_stop +ffffffff817eddb0 T se_init +ffffffff817ee220 T se_list_tx_init +ffffffff817ee2b0 T se_list_tx_free +ffffffff817ee350 T se_list_rx_init +ffffffff817ee400 T se_newbuf +ffffffff817ee580 T se_list_rx_free +ffffffff817ee620 T se_discard_rxbuf +ffffffff817ee680 T se_rxeof +ffffffff817ee8e0 T se_txeof +ffffffff817eeac0 T se_encap +ffffffff817ef000 T mbg_probe +ffffffff817ef030 T mbg_attach +ffffffff817ef410 T mbg_timeout +ffffffff817ef470 T mbg_read_amcc_s5933 +ffffffff817ef630 T mbg_task +ffffffff817ef7f0 T mbg_read_amcc_s5920 +ffffffff817ef9e0 T mbg_read_asic +ffffffff817efbb0 T mbg_task_hr +ffffffff817efd30 T mbg_update_sensor +ffffffff817f0000 T uhci_pci_match +ffffffff817f0040 T uhci_pci_attach +ffffffff817f0330 T uhci_pci_detach +ffffffff817f03d0 T uhci_pci_activate +ffffffff817f0480 T uhci_pci_attach_deferred +ffffffff817f1000 T ohci_pci_match +ffffffff817f1040 T ohci_pci_attach +ffffffff817f1330 T ohci_pci_detach +ffffffff817f13d0 T ohci_pci_attach_deferred +ffffffff817f2000 T ehci_pci_match +ffffffff817f2040 T ehci_pci_attach +ffffffff817f2450 T ehci_pci_detach +ffffffff817f24f0 T ehci_pci_activate +ffffffff817f2570 T ehci_sb700_match +ffffffff817f25c0 T ehci_pci_takecontroller +ffffffff817f3000 T xhci_pci_match +ffffffff817f3040 T xhci_pci_attach +ffffffff817f33a0 T xhci_pci_detach +ffffffff817f3440 T xhci_pci_activate +ffffffff817f3520 T xhci_pci_takecontroller +ffffffff817f4000 T pcicbbmatch +ffffffff817f4040 T pccbbattach +ffffffff817f43d0 T pccbbactivate +ffffffff817f4820 T cb_chipset +ffffffff817f4880 T pccbb_shutdown +ffffffff817f4980 T pccbb_power +ffffffff817f4b20 T pccbbintr +ffffffff817f4ce0 T pccbb_legacy_disable +ffffffff817f4d40 T pci113x_insert +ffffffff817f4e00 T pccbb_pci_callback +ffffffff817f5120 T pccbb_chipinit +ffffffff817f5590 T pccbb_pcmcia_attach_setup +ffffffff817f56f0 T cbbprint +ffffffff817f5720 T pccbb_pcmcia_read +ffffffff817f5750 T pccbb_pcmcia_write +ffffffff817f5780 T pccbb_checksockstat +ffffffff817f5840 T pccbbintr_function +ffffffff817f58f0 T pccbb_ctrl +ffffffff817f5a30 T pccbb_detect_card +ffffffff817f5aa0 T cb_detect_voltage +ffffffff817f5af0 T cb_reset +ffffffff817f5c40 T pccbb_cardenable +ffffffff817f5d00 T pccbb_cb_intr_establish +ffffffff817f5d20 T pccbb_intr_establish +ffffffff817f5e70 T pccbb_cb_intr_disestablish +ffffffff817f5e80 T pccbb_intr_disestablish +ffffffff817f5fc0 T pccbb_pcmcia_io_alloc +ffffffff817f60c0 T pccbb_pcmcia_io_free +ffffffff817f60f0 T pccbb_pcmcia_io_map +ffffffff817f61b0 T pccbb_pcmcia_do_io_map +ffffffff817f6310 T pccbb_pcmcia_io_unmap +ffffffff817f63b0 T pccbb_pcmcia_wait_ready +ffffffff817f6460 T pccbb_pcmcia_socket_enable +ffffffff817f67d0 T pccbb_pcmcia_do_mem_map +ffffffff817f6950 T pccbb_pcmcia_socket_disable +ffffffff817f6a70 T pccbb_pcmcia_card_detect +ffffffff817f6ad0 T pccbb_pcmcia_mem_alloc +ffffffff817f6ba0 T pccbb_pcmcia_mem_free +ffffffff817f6bd0 T pccbb_pcmcia_mem_map +ffffffff817f6cf0 T pccbb_pcmcia_mem_unmap +ffffffff817f6d80 T pccbb_pcmcia_intr_establish +ffffffff817f6da0 T pccbb_pcmcia_intr_disestablish +ffffffff817f6dc0 T pccbb_pcmcia_intr_string +ffffffff817f6e00 T pccbb_rbus_cb_space_alloc +ffffffff817f6f20 T pccbb_open_win +ffffffff817f70b0 T pccbb_rbus_cb_space_free +ffffffff817f71c0 T pccbb_close_win +ffffffff817f7280 T pccbb_winlist_insert +ffffffff817f7380 T pccbb_winset +ffffffff817f7660 T pccbb_winlist_delete +ffffffff817f8000 T sk_xmac_miibus_readreg +ffffffff817f8170 T sk_xmac_miibus_writereg +ffffffff817f82d0 T sk_xmac_miibus_statchg +ffffffff817f8390 T sk_marv_miibus_readreg +ffffffff817f84c0 T sk_marv_miibus_writereg +ffffffff817f85e0 T sk_marv_miibus_statchg +ffffffff817f8610 T sk_setfilt +ffffffff817f86e0 T sk_iff +ffffffff817f8710 T sk_iff_xmac +ffffffff817f8950 T sk_iff_yukon +ffffffff817f8b50 T sk_init_rx_ring +ffffffff817f8c90 T sk_fill_rx_ring +ffffffff817f8d10 T sk_newbuf +ffffffff817f8e70 T sk_init_tx_ring +ffffffff817f9070 T sk_ifmedia_upd +ffffffff817f90c0 T sk_ifmedia_sts +ffffffff817f9120 T sk_ioctl +ffffffff817f92e0 T sk_init +ffffffff817f9bb0 T sk_stop +ffffffff817fa260 T skc_probe +ffffffff817fa2f0 T skc_reset +ffffffff817fa4f0 T sk_probe +ffffffff817fa540 T sk_attach +ffffffff817fac50 T sk_start +ffffffff817fadb0 T sk_watchdog +ffffffff817fae30 T sk_reset +ffffffff817fae90 T sk_tick +ffffffff817fb060 T sk_yukon_tick +ffffffff817fb0c0 T sk_init_xmac +ffffffff817fb7b0 T sk_init_yukon +ffffffff817fbe60 T sk_detach +ffffffff817fbf80 T sk_activate +ffffffff817fc010 T skcprint +ffffffff817fc080 T skc_attach +ffffffff817fc570 T sk_intr +ffffffff817fc970 T skc_detach +ffffffff817fc9f0 T skc_activate +ffffffff817fca30 T sk_encap +ffffffff817fcd30 T sk_txeof +ffffffff817fcfd0 T sk_rxeof +ffffffff817fd270 T sk_intr_bcom +ffffffff817fd450 T sk_intr_xmac +ffffffff817fd600 T sk_intr_yukon +ffffffff817fe000 T msk_miibus_readreg +ffffffff817fe120 T msk_miibus_writereg +ffffffff817fe240 T msk_miibus_statchg +ffffffff817fe330 T msk_iff +ffffffff817fe530 T msk_init_rx_ring +ffffffff817fe5d0 T msk_fill_rx_ring +ffffffff817fe840 T msk_init_tx_ring +ffffffff817fe950 T msk_ifmedia_upd +ffffffff817fe9a0 T msk_ifmedia_sts +ffffffff817fea00 T msk_ioctl +ffffffff817febb0 T msk_init +ffffffff817ff530 T msk_stop +ffffffff817ff970 T mskc_probe +ffffffff817ff9a0 T mskc_reset +ffffffff81800210 T msk_probe +ffffffff81800260 T msk_reset +ffffffff81800350 T msk_attach +ffffffff81800900 T msk_start +ffffffff81800ce0 T msk_watchdog +ffffffff81800e40 T msk_init_yukon +ffffffff81801350 T msk_tick +ffffffff818013b0 T msk_fill_rx_tick +ffffffff81801420 T msk_kstat_attach +ffffffff81801580 T msk_detach +ffffffff818016f0 T msk_kstat_detach +ffffffff81801780 T msk_activate +ffffffff818018b0 T mskcprint +ffffffff81801920 T mskc_attach +ffffffff81802110 T msk_intr +ffffffff81802870 T mskc_detach +ffffffff81802950 T mskc_activate +ffffffff81802990 T msk_rxeof +ffffffff81802b00 T msk_txeof +ffffffff81802c40 T msk_intr_yukon +ffffffff81802d30 T msk_kstat_read +ffffffff81804000 T puc_pci_match +ffffffff81804110 T puc_pci_attach +ffffffff818043e0 T puc_pci_detach +ffffffff81804540 T puc_find_description +ffffffff818045d0 T puc_pci_intr_string +ffffffff81804600 T puc_pci_intr_establish +ffffffff81804710 T puc_pci_xr17v35x_intr +ffffffff81804870 T puc_print_ports +ffffffff81804a50 T puc_common_attach +ffffffff81804be0 T puc_port_type_name +ffffffff81804c20 T puc_print +ffffffff81804ca0 T puc_submatch +ffffffff81805000 T com_puc_match +ffffffff81805040 T com_puc_attach +ffffffff81805150 T com_puc_detach +ffffffff81806000 T lpt_puc_probe +ffffffff81806040 T lpt_puc_attach +ffffffff81806110 T lpt_puc_detach +ffffffff81807000 T wi_pci_match +ffffffff81807050 T wi_pci_attach +ffffffff818070e0 T wi_pci_activate +ffffffff818071e0 T wi_pci_lookup +ffffffff818073f0 T wi_pci_wakeup +ffffffff818074a0 T wi_pci_acex_attach +ffffffff81807790 T wi_pci_common_attach +ffffffff818078f0 T wi_pci_plx_attach +ffffffff81807be0 T wi_pci_plx_print_cis +ffffffff81807de0 T wi_pci_tmd_attach +ffffffff81807f40 T wi_pci_native_attach +ffffffff81809000 T an_pci_match +ffffffff81809030 T an_pci_attach +ffffffff8180a000 T iwi_match +ffffffff8180a030 T iwi_attach +ffffffff8180a8c0 T iwi_activate +ffffffff8180a920 T iwi_intr +ffffffff8180aba0 T iwi_reset +ffffffff8180ad80 T iwi_alloc_cmd_ring +ffffffff8180af70 T iwi_alloc_tx_ring +ffffffff8180b170 T iwi_alloc_rx_ring +ffffffff8180b350 T iwi_read_prom_word +ffffffff8180b9d0 T iwi_ioctl +ffffffff8180bb50 T iwi_start +ffffffff8180bcb0 T iwi_watchdog +ffffffff8180bd40 T iwi_newstate +ffffffff8180bfa0 T iwi_send_mgmt +ffffffff8180bfd0 T iwi_media_change +ffffffff8180c030 T iwi_media_status +ffffffff8180c1a0 T iwi_init_task +ffffffff8180c210 T iwi_free_tx_ring +ffffffff8180c310 T iwi_free_cmd_ring +ffffffff8180c3c0 T iwi_stop +ffffffff8180c650 T iwi_wakeup +ffffffff8180c6f0 T iwi_init +ffffffff8180cbd0 T iwi_reset_cmd_ring +ffffffff8180cc10 T iwi_reset_tx_ring +ffffffff8180ccb0 T iwi_free_rx_ring +ffffffff8180cd60 T iwi_reset_rx_ring +ffffffff8180cd90 T iwi_rate +ffffffff8180ce40 T iwi_find_txnode +ffffffff8180cf50 T iwi_scan +ffffffff8180d1e0 T iwi_auth_and_assoc +ffffffff8180d840 T iwi_set_chan +ffffffff8180d9f0 T iwi_frame_intr +ffffffff8180dd20 T iwi_notification_intr +ffffffff8180de20 T iwi_rx_intr +ffffffff8180dfb0 T iwi_tx_intr +ffffffff8180e0b0 T iwi_cmd +ffffffff8180e210 T iwi_tx_start +ffffffff8180e6e0 T iwi_stop_master +ffffffff8180e8a0 T iwi_load_ucode +ffffffff8180eeb0 T iwi_load_firmware +ffffffff8180f4e0 T iwi_config +ffffffff8180f890 T iwi_update_edca +ffffffff81810000 T wpi_match +ffffffff81810030 T wpi_attach +ffffffff81810620 T wpi_detach +ffffffff818108c0 T wpi_activate +ffffffff81810960 T wpi_intr +ffffffff81810b60 T wpi_apm_init +ffffffff81810e60 T wpi_read_eeprom +ffffffff818110e0 T wpi_alloc_fwmem +ffffffff81811110 T wpi_alloc_shared +ffffffff81811150 T wpi_alloc_tx_ring +ffffffff81811300 T wpi_alloc_rx_ring +ffffffff818114e0 T wpi_apm_stop +ffffffff818115f0 T wpi_ioctl +ffffffff81811860 T wpi_start +ffffffff818119e0 T wpi_watchdog +ffffffff81811ac0 T wpi_node_alloc +ffffffff81811ae0 T wpi_newassoc +ffffffff81811c30 T wpi_updateedca +ffffffff81811f20 T wpi_set_key +ffffffff81812180 T wpi_delete_key +ffffffff81812380 T wpi_newstate +ffffffff81812650 T wpi_media_change +ffffffff818127c0 T wpi_radiotap_attach +ffffffff81812850 T wpi_calib_timeout +ffffffff81812950 T wpi_init_task +ffffffff818129c0 T wpi_free_tx_ring +ffffffff81812bb0 T wpi_free_shared +ffffffff81812ca0 T wpi_free_fwmem +ffffffff81812d90 T wpi_free_rx_ring +ffffffff81812ed0 T wpi_stop +ffffffff81812f30 T wpi_wakeup +ffffffff81812fd0 T wpi_init +ffffffff81813120 T wpi_nic_lock +ffffffff818131e0 T wpi_read_prom_data +ffffffff818135d0 T wpi_dma_contig_alloc +ffffffff818137c0 T wpi_dma_contig_free +ffffffff81813880 T wpi_reset_rx_ring +ffffffff81813a00 T wpi_reset_tx_ring +ffffffff81813af0 T wpi_read_eeprom_channels +ffffffff81813c50 T wpi_read_eeprom_group +ffffffff81813d60 T wpi_set_led +ffffffff81813ec0 T wpi_scan +ffffffff81814190 T wpi_auth +ffffffff818145c0 T wpi_run +ffffffff81814cb0 T wpi_iter_func +ffffffff81814cd0 T wpi_power_calibration +ffffffff81814d60 T wpi_ccmp_decap +ffffffff81814e60 T wpi_rx_done +ffffffff81815340 T wpi_tx_done +ffffffff818154c0 T wpi_cmd_done +ffffffff818155b0 T wpi_notif_intr +ffffffff818159c0 T wpi_tx +ffffffff81816120 T wpi_set_pslevel +ffffffff81816290 T wpi_cmd +ffffffff818165c0 T wpi_mrr_setup +ffffffff818169a0 T wpi_set_timing +ffffffff81816b40 T wpi_set_txpower +ffffffff81816ce0 T wpi_get_power_index +ffffffff81816e70 T wpi_config +ffffffff81817670 T wpi_post_alive +ffffffff81817870 T wpi_load_bootcode +ffffffff81817c10 T wpi_load_firmware +ffffffff818181e0 T wpi_read_firmware +ffffffff818183a0 T wpi_clock_wait +ffffffff81818470 T wpi_apm_stop_master +ffffffff81818580 T wpi_nic_config +ffffffff81818730 T wpi_hw_init +ffffffff81818fb0 T wpi_hw_stop +ffffffff8181a000 T iwn_match +ffffffff8181a030 T iwn_attach +ffffffff8181a8f0 T iwn_detach +ffffffff8181ace0 T iwn_activate +ffffffff8181ada0 T iwn_intr +ffffffff8181b270 T iwn4965_attach +ffffffff8181b3c0 T iwn5000_attach +ffffffff8181b710 T iwn_hw_prepare +ffffffff8181ba70 T iwn_read_eeprom +ffffffff8181bd20 T iwn_alloc_fwmem +ffffffff8181bd50 T iwn_alloc_kw +ffffffff8181bd80 T iwn_alloc_ict +ffffffff8181bdc0 T iwn_alloc_sched +ffffffff8181be00 T iwn_alloc_tx_ring +ffffffff8181bf70 T iwn_alloc_rx_ring +ffffffff8181c180 T iwn_ioctl +ffffffff8181c420 T iwn_start +ffffffff8181c5c0 T iwn_watchdog +ffffffff8181c6b0 T iwn_node_alloc +ffffffff8181c6d0 T iwn_bgscan +ffffffff8181c750 T iwn_newassoc +ffffffff8181c840 T iwn_updateedca +ffffffff8181cb50 T iwn_set_key +ffffffff8181cc80 T iwn_delete_key +ffffffff8181cd90 T iwn_updatechan +ffffffff8181ce90 T iwn_updateprot +ffffffff8181cf20 T iwn_updateslot +ffffffff8181cfa0 T iwn_ampdu_rx_start +ffffffff8181d080 T iwn_ampdu_rx_stop +ffffffff8181d150 T iwn_ampdu_tx_start +ffffffff8181d360 T iwn_ampdu_tx_stop +ffffffff8181d5e0 T iwn_newstate +ffffffff8181d8a0 T iwn_media_change +ffffffff8181da00 T iwn_radiotap_attach +ffffffff8181da90 T iwn_calib_timeout +ffffffff8181dcb0 T iwn_init_task +ffffffff8181dd20 T iwn_free_tx_ring +ffffffff8181df10 T iwn_free_sched +ffffffff8181e000 T iwn_free_ict +ffffffff8181e0f0 T iwn_free_kw +ffffffff8181e1e0 T iwn_free_fwmem +ffffffff8181e2d0 T iwn4965_load_firmware +ffffffff8181e920 T iwn4965_read_eeprom +ffffffff8181ea70 T iwn4965_post_alive +ffffffff8181ef40 T iwn4965_nic_config +ffffffff8181f020 T iwn4965_reset_sched +ffffffff8181f050 T iwn4965_update_sched +ffffffff8181f130 T iwn4965_update_rxon +ffffffff8181f2f0 T iwn4965_get_temperature +ffffffff8181f370 T iwn4965_get_rssi +ffffffff8181f3e0 T iwn4965_set_txpower +ffffffff8181f8d0 T iwn4965_init_gains +ffffffff8181fa70 T iwn4965_set_gains +ffffffff8181fda0 T iwn4965_add_node +ffffffff8181fe30 T iwn4965_tx_done +ffffffff8181ff90 T iwn4965_ampdu_tx_start +ffffffff818203a0 T iwn4965_ampdu_tx_stop +ffffffff818205a0 T iwn5000_load_firmware +ffffffff818206b0 T iwn5000_read_eeprom +ffffffff81820900 T iwn5000_post_alive +ffffffff81821120 T iwn5000_nic_config +ffffffff81821500 T iwn5000_reset_sched +ffffffff818215f0 T iwn5000_update_sched +ffffffff818216e0 T iwn5000_update_rxon +ffffffff818218d0 T iwn5000_get_temperature +ffffffff81821930 T iwn5000_get_rssi +ffffffff81821980 T iwn5000_set_txpower +ffffffff818219d0 T iwn5000_init_gains +ffffffff81821b70 T iwn5000_set_gains +ffffffff81821e20 T iwn5000_add_node +ffffffff81821e50 T iwn5000_tx_done +ffffffff81822060 T iwn5000_ampdu_tx_start +ffffffff818224a0 T iwn5000_ampdu_tx_stop +ffffffff81822720 T iwn_free_rx_ring +ffffffff81822910 T iwn_stop +ffffffff81822990 T iwn_wakeup +ffffffff81822a40 T iwn_init +ffffffff81822d40 T iwn_nic_lock +ffffffff81822e00 T iwn_eeprom_lock +ffffffff81822ed0 T iwn_init_otprom +ffffffff81823330 T iwn_clock_wait +ffffffff81823400 T iwn_read_prom_data +ffffffff818237e0 T iwn_dma_contig_alloc +ffffffff818239d0 T iwn_dma_contig_free +ffffffff81823a90 T iwn_reset_rx_ring +ffffffff81823c20 T iwn_reset_tx_ring +ffffffff81823d20 T iwn5000_ict_reset +ffffffff81823e00 T iwn_apm_init +ffffffff81824240 T iwn_apm_stop +ffffffff81824380 T iwn_read_eeprom_channels +ffffffff81824510 T iwn_read_eeprom_enhinfo +ffffffff81824690 T iwn_scan_abort +ffffffff81824820 T iwn_set_led +ffffffff818249e0 T iwn_cmd +ffffffff81824d20 T iwn_scan +ffffffff81825210 T iwn_auth +ffffffff818254c0 T iwn_run +ffffffff81825960 T iwn_iter_func +ffffffff818259f0 T iwn_set_link_quality +ffffffff81825e70 T iwn_ccmp_decap +ffffffff81825f70 T iwn_rx_phy +ffffffff81826050 T iwn_rx_done +ffffffff81826660 T iwn_ra_choose +ffffffff818266e0 T iwn_ampdu_rate_control +ffffffff81826820 T iwn_ht_single_rate_control +ffffffff81826a00 T iwn_rx_compressed_ba +ffffffff81826b90 T iwn_ampdu_txq_advance +ffffffff81826d20 T iwn_clear_oactive +ffffffff81826da0 T iwn5000_rx_calib_results +ffffffff81826f10 T iwn_rx_statistics +ffffffff818270b0 T iwn4965_power_calibration +ffffffff81827100 T iwn_get_noise +ffffffff81827170 T iwn_collect_noise +ffffffff81827480 T iwn_tune_sensitivity +ffffffff81827c30 T iwn_tx_done_free_txdata +ffffffff81827ce0 T iwn_ampdu_tx_done +ffffffff81827f90 T iwn_tx_done +ffffffff818281e0 T iwn_cmd_done +ffffffff818282d0 T iwn_notif_intr +ffffffff81828940 T iwn_init_sensitivity +ffffffff81828bf0 T iwn_wakeup_intr +ffffffff81828cb0 T iwn_fatal_intr +ffffffff81828fa0 T iwn_rval2ridx +ffffffff81829020 T iwn_tx +ffffffff81829b00 T iwn_rxon_ht40_enabled +ffffffff81829b40 T iwn_set_pslevel +ffffffff81829d00 T iwn_add_broadcast_node +ffffffff81829f50 T iwn_set_critical_temp +ffffffff8182a130 T iwn_set_timing +ffffffff8182a300 T iwn_send_sensitivity +ffffffff8182a400 T iwn_send_btcoex +ffffffff8182a5a0 T iwn_send_advanced_btcoex +ffffffff8182ace0 T iwn5000_runtime_calib +ffffffff8182aed0 T iwn_config +ffffffff8182b3b0 T iwn6000_temp_offset_calib +ffffffff8182b560 T iwn2000_temp_offset_calib +ffffffff8182b740 T iwn_get_active_dwell_time +ffffffff8182b780 T iwn_limit_dwell +ffffffff8182b7f0 T iwn_get_passive_dwell_time +ffffffff8182b870 T iwn_rxon_configure_ht40 +ffffffff8182b910 T iwn_update_rxon_restore_power +ffffffff8182bbd0 T iwn5000_query_calibration +ffffffff8182be20 T iwn5000_send_calibration +ffffffff8182bf70 T iwn5000_send_wimax_coex +ffffffff8182c140 T iwn5000_crystal_calib +ffffffff8182c2f0 T iwn_hw_stop +ffffffff8182c6e0 T iwn_hw_init +ffffffff8182cd80 T iwn4965_load_bootcode +ffffffff8182d120 T iwn5000_load_firmware_section +ffffffff8182d360 T iwn_read_firmware_leg +ffffffff8182d470 T iwn_read_firmware_tlv +ffffffff8182d6f0 T iwn_read_firmware +ffffffff8182d920 T iwn_apm_stop_master +ffffffff8182e000 T iwm_lookup_cmd_ver +ffffffff8182e070 T iwm_is_mimo_ht_plcp +ffffffff8182e0b0 T iwm_is_mimo_ht_mcs +ffffffff8182e100 T iwm_store_cscheme +ffffffff8182e150 T iwm_firmware_store_section +ffffffff8182e1f0 T iwm_set_default_calib +ffffffff8182e240 T iwm_fw_info_free +ffffffff8182e290 T iwm_fw_version_str +ffffffff8182e2d0 T iwm_read_firmware +ffffffff8182eb50 T iwm_read_prph_unlocked +ffffffff8182ebb0 T iwm_read_prph +ffffffff8182ec30 T iwm_nic_assert_locked +ffffffff8182ec90 T iwm_write_prph_unlocked +ffffffff8182ed00 T iwm_write_prph +ffffffff8182ed90 T iwm_write_prph64 +ffffffff8182ee90 T iwm_read_mem +ffffffff8182efc0 T iwm_nic_lock +ffffffff8182f110 T iwm_nic_unlock +ffffffff8182f1c0 T iwm_write_mem +ffffffff8182f300 T iwm_write_mem32 +ffffffff8182f410 T iwm_poll_bit +ffffffff8182f4e0 T iwm_set_bits_mask_prph +ffffffff8182f680 T iwm_set_bits_prph +ffffffff8182f6a0 T iwm_clear_bits_prph +ffffffff8182f6c0 T iwm_dma_contig_alloc +ffffffff8182f8b0 T iwm_dma_contig_free +ffffffff8182f970 T iwm_alloc_rx_ring +ffffffff8182fb50 T iwm_rx_addbuf +ffffffff8182fd40 T iwm_free_rx_ring +ffffffff8182fff0 T iwm_disable_rx_dma +ffffffff81830210 T iwm_reset_rx_ring +ffffffff81830290 T iwm_alloc_tx_ring +ffffffff81830470 T iwm_free_tx_ring +ffffffff81830670 T iwm_reset_tx_ring +ffffffff81830830 T iwm_enable_rfkill_int +ffffffff81830950 T iwm_check_rfkill +ffffffff818309d0 T iwm_enable_interrupts +ffffffff81830a80 T iwm_enable_fwload_interrupt +ffffffff81830b50 T iwm_restore_interrupts +ffffffff81830b80 T iwm_disable_interrupts +ffffffff81830c40 T iwm_ict_reset +ffffffff81830e00 T iwm_set_hw_ready +ffffffff81830fe0 T iwm_prepare_card_hw +ffffffff81831120 T iwm_apm_config +ffffffff81831200 T iwm_apm_init +ffffffff818318f0 T iwm_apm_stop +ffffffff81831cb0 T iwm_init_msix_hw +ffffffff81831d50 T iwm_conf_msix_hw +ffffffff818322a0 T iwm_clear_persistence_bit +ffffffff818323f0 T iwm_start_hw +ffffffff81832610 T iwm_stop_device +ffffffff81832c30 T iwm_nic_config +ffffffff81832d10 T iwm_nic_rx_init +ffffffff81832d30 T iwm_nic_rx_mq_init +ffffffff81833130 T iwm_nic_rx_legacy_init +ffffffff81833370 T iwm_nic_tx_init +ffffffff81833560 T iwm_nic_init +ffffffff818336c0 T iwm_enable_ac_txq +ffffffff81833b40 T iwm_enable_txq +ffffffff81833d20 T iwm_send_cmd_pdu +ffffffff81833da0 T iwm_disable_txq +ffffffff81833e80 T iwm_post_alive +ffffffff81834400 T iwm_phy_db_get_section +ffffffff818344a0 T iwm_phy_db_set_section +ffffffff818345e0 T iwm_is_valid_channel +ffffffff81834650 T iwm_ch_id_to_ch_index +ffffffff818346d0 T iwm_channel_id_to_papd +ffffffff81834770 T iwm_channel_id_to_txp +ffffffff81834900 T iwm_phy_db_get_section_data +ffffffff81834a90 T iwm_send_phy_db_cmd +ffffffff81834b30 T iwm_send_cmd +ffffffff81835210 T iwm_phy_db_send_all_channel_groups +ffffffff818353f0 T iwm_send_phy_db_data +ffffffff81835630 T iwm_send_time_event_cmd +ffffffff81835740 T iwm_free_resp +ffffffff818357c0 T iwm_protect_session +ffffffff81835870 T iwm_unprotect_session +ffffffff81835920 T iwm_nvm_read_chunk +ffffffff81835a80 T iwm_nvm_read_section +ffffffff81835b40 T iwm_fw_valid_tx_ant +ffffffff81835b80 T iwm_fw_valid_rx_ant +ffffffff81835bd0 T iwm_valid_siso_ant_rate_mask +ffffffff81835c30 T iwm_init_channel_map +ffffffff81835d90 T iwm_mimo_enabled +ffffffff81835dd0 T iwm_setup_ht_rates +ffffffff81835e80 T iwm_setup_vht_rates +ffffffff81835f10 T iwm_init_reorder_buffer +ffffffff81835f70 T iwm_clear_reorder_buffer +ffffffff81836030 T iwm_rx_ba_session_expired +ffffffff81836130 T iwm_reorder_timer_expired +ffffffff81836300 T iwm_release_frames +ffffffff818364f0 T iwm_sta_rx_agg +ffffffff818369e0 T iwm_send_cmd_pdu_status +ffffffff81836a70 T iwm_mac_ctxt_task +ffffffff81836bd0 T iwm_mac_ctxt_cmd +ffffffff81836dd0 T iwm_updateprot +ffffffff81836e90 T iwm_add_task +ffffffff81836f00 T iwm_updateslot +ffffffff81836fc0 T iwm_updateedca +ffffffff81837080 T iwm_phy_ctxt_task +ffffffff81837240 T iwm_phy_ctxt_update +ffffffff818373c0 T iwm_setrates +ffffffff81837550 T iwm_updatechan +ffffffff81837610 T iwm_updatedtim +ffffffff818376d0 T iwm_sta_tx_agg +ffffffff81837bb0 T iwm_flush_sta +ffffffff81837d50 T iwm_txq_advance +ffffffff81837f30 T iwm_clear_oactive +ffffffff81837fb0 T iwm_ba_task +ffffffff818381f0 T iwm_ampdu_rx_start +ffffffff818382d0 T iwm_ampdu_rx_stop +ffffffff818383b0 T iwm_ampdu_tx_start +ffffffff81838470 T iwm_ampdu_tx_stop +ffffffff81838550 T iwm_set_hw_address_8000 +ffffffff818387d0 T iwm_parse_nvm_data +ffffffff81838a40 T iwm_parse_nvm_sections +ffffffff81838b40 T iwm_nvm_init +ffffffff81838e00 T iwm_firmware_load_sect +ffffffff81838eb0 T iwm_firmware_load_chunk +ffffffff81839160 T iwm_load_firmware_7000 +ffffffff818393c0 T iwm_load_cpu_sections_8000 +ffffffff81839770 T iwm_load_firmware_8000 +ffffffff81839980 T iwm_load_firmware +ffffffff81839a60 T iwm_start_fw +ffffffff81839c30 T iwm_send_tx_ant_cfg +ffffffff81839cc0 T iwm_send_phy_cfg_cmd +ffffffff81839d70 T iwm_send_dqa_cmd +ffffffff81839e00 T iwm_load_ucode_wait_alive +ffffffff81839f40 T iwm_save_fw_paging +ffffffff81839fb0 T iwm_send_paging_cmd +ffffffff8183a100 T iwm_free_fw_paging +ffffffff8183a270 T iwm_run_init_mvm_ucode +ffffffff8183a5b0 T iwm_send_bt_init_conf +ffffffff8183a650 T iwm_sf_config +ffffffff8183a860 T iwm_config_ltr +ffffffff8183a920 T iwm_get_signal_strength +ffffffff8183a980 T iwm_rxmq_get_signal_strength +ffffffff8183a9d0 T iwm_rx_rx_phy_cmd +ffffffff8183aa30 T iwm_get_noise +ffffffff8183aaa0 T iwm_ccmp_decap +ffffffff8183aba0 T iwm_rx_hwdecrypt +ffffffff8183ac70 T iwm_rx_frame +ffffffff8183afa0 T iwm_rx_mpdu +ffffffff8183b1b0 T iwm_flip_address +ffffffff8183b210 T iwm_detect_duplicate +ffffffff8183b330 T iwm_is_sn_less +ffffffff8183b390 T iwm_oldsn_workaround +ffffffff8183b450 T iwm_rx_reorder +ffffffff8183b9c0 T iwm_rx_mpdu_mq +ffffffff8183bdc0 T iwm_ra_choose +ffffffff8183be80 T iwm_ht_single_rate_control +ffffffff8183c0a0 T iwm_vht_single_rate_control +ffffffff8183c2f0 T iwm_rx_tx_cmd_single +ffffffff8183c4c0 T iwm_txd_done +ffffffff8183c590 T iwm_reset_sched +ffffffff8183c640 T iwm_ampdu_tx_done +ffffffff8183c9b0 T iwm_rx_tx_cmd +ffffffff8183cb90 T iwm_ampdu_rate_control +ffffffff8183cd30 T iwm_rx_compressed_ba +ffffffff8183cec0 T iwm_rx_bmiss +ffffffff8183cfb0 T iwm_binding_cmd +ffffffff8183d130 T iwm_phy_ctxt_cmd_hdr +ffffffff8183d1a0 T iwm_phy_ctxt_cmd_data +ffffffff8183d310 T iwm_get_vht_ctrl_pos +ffffffff8183d380 T iwm_phy_ctxt_cmd_uhb +ffffffff8183d5b0 T iwm_phy_ctxt_cmd +ffffffff8183d700 T iwm_update_sched +ffffffff8183d7d0 T iwm_send_cmd_status +ffffffff8183d8f0 T iwm_cmd_done +ffffffff8183da90 T iwm_tx_fill_cmd +ffffffff8183deb0 T iwm_rval2ridx +ffffffff8183df40 T iwm_tx +ffffffff8183e9e0 T iwm_flush_tx_path +ffffffff8183eab0 T iwm_wait_tx_queues_empty +ffffffff8183eb70 T iwm_led_enable +ffffffff8183eba0 T iwm_led_disable +ffffffff8183ebd0 T iwm_led_is_enabled +ffffffff8183ec30 T iwm_led_blink_timeout +ffffffff8183ecb0 T iwm_led_blink_start +ffffffff8183ed00 T iwm_led_blink_stop +ffffffff8183ed50 T iwm_beacon_filter_send_cmd +ffffffff8183ede0 T iwm_beacon_filter_set_cqm_params +ffffffff8183ee20 T iwm_update_beacon_abort +ffffffff8183ef10 T iwm_power_build_cmd +ffffffff8183efa0 T iwm_power_mac_update_mode +ffffffff8183f1b0 T iwm_power_update_device +ffffffff8183f250 T iwm_enable_beacon_filter +ffffffff8183f340 T iwm_disable_beacon_filter +ffffffff8183f420 T iwm_add_sta_cmd +ffffffff8183f810 T iwm_add_aux_sta +ffffffff8183f9b0 T iwm_drain_sta +ffffffff8183fb60 T iwm_rm_sta_cmd +ffffffff8183fc20 T iwm_scan_rx_chain +ffffffff8183fc90 T iwm_scan_rate_n_flags +ffffffff8183fd90 T iwm_lmac_scan_fill_channels +ffffffff8183fe70 T iwm_umac_scan_fill_channels +ffffffff8183ff40 T iwm_fill_probe_req_v1 +ffffffff8183ffe0 T iwm_fill_probe_req +ffffffff81840210 T iwm_lmac_scan +ffffffff81840720 T iwm_config_umac_scan +ffffffff81840930 T iwm_umac_scan_size +ffffffff818409a0 T iwm_get_scan_req_umac_chan_param +ffffffff818409f0 T iwm_get_scan_req_umac_data +ffffffff81840a40 T iwm_umac_scan +ffffffff81840ea0 T iwm_mcc_update +ffffffff81840f30 T iwm_ridx2rate +ffffffff81840fa0 T iwm_ack_rates +ffffffff81841260 T iwm_mac_ctxt_cmd_common +ffffffff81841570 T iwm_mac_ctxt_cmd_fill_sta +ffffffff81841630 T iwm_update_quotas +ffffffff818419f0 T iwm_del_task +ffffffff81841a50 T iwm_scan +ffffffff81841cc0 T iwm_scan_abort +ffffffff81841de0 T iwm_bgscan +ffffffff81841e80 T iwm_bgscan_done +ffffffff81841f20 T iwm_bgscan_done_task +ffffffff81842170 T iwm_umac_scan_abort +ffffffff81842200 T iwm_lmac_scan_abort +ffffffff818422a0 T iwm_auth +ffffffff81842610 T iwm_deauth +ffffffff81842970 T iwm_run +ffffffff81842ea0 T iwm_allow_mcast +ffffffff81842fa0 T iwm_run_stop +ffffffff818435c0 T iwm_node_alloc +ffffffff818435e0 T iwm_set_key_v1 +ffffffff81843720 T iwm_set_key +ffffffff81843980 T iwm_delete_key_v1 +ffffffff81843ab0 T iwm_delete_key +ffffffff81843d20 T iwm_calib_timeout +ffffffff81843de0 T iwm_set_rate_table_vht +ffffffff81844100 T iwm_set_rate_table +ffffffff818444c0 T iwm_media_change +ffffffff818446c0 T iwm_stop +ffffffff81844b40 T iwm_init +ffffffff81844e10 T iwm_newstate_task +ffffffff81844f90 T iwm_newstate +ffffffff818450f0 T iwm_endscan +ffffffff81845140 T iwm_fill_sf_command +ffffffff81845210 T iwm_send_soc_conf +ffffffff81845350 T iwm_send_update_mcc_cmd +ffffffff81845510 T iwm_send_temp_report_ths_cmd +ffffffff818455e0 T iwm_tt_tx_backoff +ffffffff81845670 T iwm_fill_paging_mem +ffffffff818459e0 T iwm_alloc_fw_paging_mem +ffffffff81845d80 T iwm_init_hw +ffffffff81846400 T iwm_preinit +ffffffff818465a0 T iwm_start +ffffffff81846770 T iwm_watchdog +ffffffff81846910 T iwm_nic_error +ffffffff81846df0 T iwm_dump_driver_status +ffffffff81846e90 T iwm_ioctl +ffffffff81846ff0 T iwm_nic_umac_error +ffffffff81847460 T iwm_desc_lookup +ffffffff818475f0 T iwm_rx_pkt_valid +ffffffff81847640 T iwm_rx_pkt +ffffffff81848400 T iwm_notif_intr +ffffffff81848560 T iwm_intr +ffffffff81848990 T iwm_intr_msix +ffffffff81848c20 T iwm_match +ffffffff81848c50 T iwm_attach_hook +ffffffff81848c90 T iwm_attach +ffffffff818499d0 T iwm_radiotap_attach +ffffffff81849a60 T iwm_init_task +ffffffff81849b20 T iwm_resume +ffffffff81849c60 T iwm_wakeup +ffffffff81849d10 T iwm_activate +ffffffff8184a000 T iwx_lookup_cmd_ver +ffffffff8184a070 T iwx_lookup_notif_ver +ffffffff8184a0e0 T iwx_is_mimo_ht_plcp +ffffffff8184a120 T iwx_store_cscheme +ffffffff8184a170 T iwx_ctxt_info_alloc_dma +ffffffff8184a210 T iwx_dma_contig_alloc +ffffffff8184a3f0 T iwx_ctxt_info_free_paging +ffffffff8184a550 T iwx_dma_contig_free +ffffffff8184a610 T iwx_get_num_sections +ffffffff8184a690 T iwx_init_fw_sec +ffffffff8184aae0 T iwx_fw_version_str +ffffffff8184ab20 T iwx_alloc_fw_monitor_block +ffffffff8184abd0 T iwx_alloc_fw_monitor +ffffffff8184ac90 T iwx_apply_debug_destination +ffffffff8184b1e0 T iwx_nic_lock +ffffffff8184b330 T iwx_write_prph +ffffffff8184b3d0 T iwx_set_bits_prph +ffffffff8184b3f0 T iwx_clear_bits_prph +ffffffff8184b410 T iwx_read_prph +ffffffff8184b4b0 T iwx_nic_unlock +ffffffff8184b560 T iwx_set_ltr +ffffffff8184b6b0 T iwx_ctxt_info_init +ffffffff8184b970 T iwx_ctxt_info_free_fw_img +ffffffff8184baf0 T iwx_ctxt_info_gen3_init +ffffffff8184c0e0 T iwx_write_umac_prph +ffffffff8184c190 T iwx_firmware_store_section +ffffffff8184c230 T iwx_set_default_calib +ffffffff8184c280 T iwx_fw_info_free +ffffffff8184c310 T iwx_read_firmware +ffffffff8184cda0 T iwx_prph_addr_mask +ffffffff8184cde0 T iwx_read_prph_unlocked +ffffffff8184ce60 T iwx_nic_assert_locked +ffffffff8184cec0 T iwx_write_prph_unlocked +ffffffff8184cf40 T iwx_write_prph64 +ffffffff8184d070 T iwx_read_umac_prph_unlocked +ffffffff8184d0f0 T iwx_read_umac_prph +ffffffff8184d190 T iwx_write_umac_prph_unlocked +ffffffff8184d210 T iwx_read_mem +ffffffff8184d340 T iwx_write_mem +ffffffff8184d480 T iwx_write_mem32 +ffffffff8184d590 T iwx_poll_bit +ffffffff8184d660 T iwx_set_bits_mask_prph +ffffffff8184d850 T iwx_alloc_rx_ring +ffffffff8184da30 T iwx_rx_addbuf +ffffffff8184dc50 T iwx_free_rx_ring +ffffffff8184df00 T iwx_disable_rx_dma +ffffffff8184e160 T iwx_reset_rx_ring +ffffffff8184e200 T iwx_alloc_tx_ring +ffffffff8184e410 T iwx_free_tx_ring +ffffffff8184e6a0 T iwx_reset_tx_ring +ffffffff8184e900 T iwx_enable_rfkill_int +ffffffff8184e9e0 T iwx_check_rfkill +ffffffff8184ea60 T iwx_enable_interrupts +ffffffff8184eb10 T iwx_enable_fwload_interrupt +ffffffff8184ebf0 T iwx_restore_interrupts +ffffffff8184ec20 T iwx_disable_interrupts +ffffffff8184ece0 T iwx_ict_reset +ffffffff8184eea0 T iwx_set_hw_ready +ffffffff8184f080 T iwx_prepare_card_hw +ffffffff8184f1c0 T iwx_force_power_gating +ffffffff8184f270 T iwx_apm_config +ffffffff8184f340 T iwx_apm_init +ffffffff8184f5a0 T iwx_apm_stop +ffffffff8184f960 T iwx_init_msix_hw +ffffffff8184fa00 T iwx_conf_msix_hw +ffffffff8184ffa0 T iwx_clear_persistence_bit +ffffffff81850120 T iwx_start_hw +ffffffff81850520 T iwx_stop_device +ffffffff81850a90 T iwx_nic_config +ffffffff81850b20 T iwx_nic_rx_init +ffffffff81850b80 T iwx_nic_init +ffffffff81850ca0 T iwx_enable_txq +ffffffff81850f70 T iwx_send_cmd +ffffffff81851530 T iwx_free_resp +ffffffff818515b0 T iwx_disable_txq +ffffffff81851810 T iwx_post_alive +ffffffff818518a0 T iwx_schedule_session_protection +ffffffff81851970 T iwx_send_cmd_pdu +ffffffff818519f0 T iwx_unprotect_session +ffffffff81851ac0 T iwx_fw_valid_tx_ant +ffffffff81851b00 T iwx_fw_valid_rx_ant +ffffffff81851b50 T iwx_init_channel_map +ffffffff81851d50 T iwx_mimo_enabled +ffffffff81851d90 T iwx_setup_ht_rates +ffffffff81851e40 T iwx_setup_vht_rates +ffffffff81851ed0 T iwx_init_reorder_buffer +ffffffff81851f30 T iwx_clear_reorder_buffer +ffffffff81851ff0 T iwx_rx_ba_session_expired +ffffffff818520f0 T iwx_rx_bar_frame_release +ffffffff818521a0 T iwx_release_frames +ffffffff81852390 T iwx_reorder_timer_expired +ffffffff81852560 T iwx_find_rxba_data +ffffffff818525f0 T iwx_sta_rx_agg_baid_cfg_cmd +ffffffff81852840 T iwx_send_cmd_pdu_status +ffffffff818528d0 T iwx_sta_rx_agg_sta_cmd +ffffffff81852b20 T iwx_sta_rx_agg +ffffffff81852df0 T iwx_mac_ctxt_task +ffffffff81852f80 T iwx_mac_ctxt_cmd +ffffffff81853180 T iwx_phy_ctxt_task +ffffffff81853330 T iwx_phy_ctxt_update +ffffffff81853780 T iwx_updatechan +ffffffff81853840 T iwx_add_task +ffffffff818538b0 T iwx_updateprot +ffffffff81853970 T iwx_updateslot +ffffffff81853a30 T iwx_updateedca +ffffffff81853af0 T iwx_updatedtim +ffffffff81853bb0 T iwx_sta_tx_agg_start +ffffffff81853da0 T iwx_ba_task +ffffffff81853ef0 T iwx_ampdu_rx_start +ffffffff81853fd0 T iwx_ampdu_rx_stop +ffffffff818540b0 T iwx_ampdu_tx_start +ffffffff81854160 T iwx_set_mac_addr_from_csr +ffffffff81854380 T iwx_flip_hw_address +ffffffff818543d0 T iwx_is_valid_mac_addr +ffffffff81854470 T iwx_nvm_get +ffffffff81854750 T iwx_load_firmware +ffffffff81854930 T iwx_start_fw +ffffffff81854b10 T iwx_pnvm_handle_section +ffffffff81854e10 T iwx_ctxt_info_gen3_set_pnvm +ffffffff81854e60 T iwx_pnvm_parse +ffffffff81854f50 T iwx_load_pnvm +ffffffff818552f0 T iwx_send_tx_ant_cfg +ffffffff81855380 T iwx_send_phy_cfg_cmd +ffffffff81855430 T iwx_send_dqa_cmd +ffffffff818554c0 T iwx_load_ucode_wait_alive +ffffffff81855580 T iwx_run_init_mvm_ucode +ffffffff818557e0 T iwx_config_ltr +ffffffff818558a0 T iwx_update_rx_desc +ffffffff81855940 T iwx_rxmq_get_signal_strength +ffffffff81855990 T iwx_rx_rx_phy_cmd +ffffffff818559f0 T iwx_get_noise +ffffffff81855a60 T iwx_ccmp_decap +ffffffff81855ba0 T iwx_rx_hwdecrypt +ffffffff81855ca0 T iwx_rx_frame +ffffffff81855f40 T iwx_detect_duplicate +ffffffff81856060 T iwx_is_sn_less +ffffffff818560c0 T iwx_oldsn_workaround +ffffffff81856180 T iwx_rx_reorder +ffffffff818566f0 T iwx_rx_mpdu_mq +ffffffff81856a30 T iwx_clear_tx_desc +ffffffff81856bd0 T iwx_txd_done +ffffffff81856c90 T iwx_txq_advance +ffffffff81856fb0 T iwx_tx_update_byte_tbl +ffffffff81857050 T iwx_rx_tx_cmd +ffffffff818571c0 T iwx_clear_oactive +ffffffff81857240 T iwx_rx_compressed_ba +ffffffff818573c0 T iwx_rx_bmiss +ffffffff818574b0 T iwx_binding_cmd +ffffffff81857620 T iwx_get_vht_ctrl_pos +ffffffff81857690 T iwx_phy_ctxt_cmd_uhb_v3_v4 +ffffffff818578e0 T iwx_phy_ctxt_cmd_v3_v4 +ffffffff81857b30 T iwx_phy_ctxt_cmd +ffffffff81857c30 T iwx_send_cmd_status +ffffffff81857d50 T iwx_cmd_done +ffffffff81857e30 T iwx_fw_rateidx_ofdm +ffffffff81857e90 T iwx_fw_rateidx_cck +ffffffff81857ef0 T iwx_tx_fill_cmd +ffffffff81858190 T iwx_rval2ridx +ffffffff81858220 T iwx_tx +ffffffff81858960 T iwx_flush_sta_tids +ffffffff81858b10 T iwx_drain_sta +ffffffff81858ca0 T iwx_flush_sta +ffffffff81858f60 T iwx_beacon_filter_send_cmd +ffffffff81858ff0 T iwx_update_beacon_abort +ffffffff81859100 T iwx_power_build_cmd +ffffffff81859190 T iwx_power_mac_update_mode +ffffffff818593b0 T iwx_power_update_device +ffffffff81859450 T iwx_enable_beacon_filter +ffffffff81859560 T iwx_disable_beacon_filter +ffffffff81859650 T iwx_add_sta_cmd +ffffffff81859950 T iwx_rm_sta_cmd +ffffffff81859a10 T iwx_rm_sta +ffffffff81859e70 T iwx_disable_mgmt_queue +ffffffff81859f50 T iwx_umac_scan_fill_channels +ffffffff8185a060 T iwx_fill_probe_req +ffffffff8185a290 T iwx_config_umac_scan_reduced +ffffffff8185a3f0 T iwx_scan_umac_flags_v2 +ffffffff8185a430 T iwx_scan_umac_dwell_v10 +ffffffff8185a4a0 T iwx_scan_umac_fill_general_p_v10 +ffffffff8185a530 T iwx_scan_umac_fill_ch_p_v6 +ffffffff8185a650 T iwx_umac_scan_v14 +ffffffff8185a940 T iwx_mcc_update +ffffffff8185a9d0 T iwx_ridx2rate +ffffffff8185aa40 T iwx_ack_rates +ffffffff8185ad00 T iwx_mac_ctxt_cmd_common +ffffffff8185b020 T iwx_mac_ctxt_cmd_fill_sta +ffffffff8185b0b0 T iwx_clear_statistics +ffffffff8185b190 T iwx_del_task +ffffffff8185b1f0 T iwx_scan +ffffffff8185b390 T iwx_scan_abort +ffffffff8185b440 T iwx_bgscan +ffffffff8185b4c0 T iwx_bgscan_done +ffffffff8185b560 T iwx_bgscan_done_task +ffffffff8185b860 T iwx_umac_scan_abort +ffffffff8185b8f0 T iwx_enable_mgmt_queue +ffffffff8185b980 T iwx_rs_rval2idx +ffffffff8185b9f0 T iwx_rs_ht_rates +ffffffff8185bac0 T iwx_rs_vht_rates +ffffffff8185bb80 T iwx_rs_init_v3 +ffffffff8185bf80 T iwx_rs_init_v4 +ffffffff8185c3a0 T iwx_rs_init +ffffffff8185c400 T iwx_rs_update +ffffffff8185c6a0 T iwx_phy_send_rlc +ffffffff8185c790 T iwx_auth +ffffffff8185cae0 T iwx_deauth +ffffffff8185cd80 T iwx_run +ffffffff8185d210 T iwx_sf_config +ffffffff8185d420 T iwx_allow_mcast +ffffffff8185d520 T iwx_run_stop +ffffffff8185d810 T iwx_node_alloc +ffffffff8185d830 T iwx_set_key +ffffffff8185d960 T iwx_add_sta_key +ffffffff8185dbd0 T iwx_setkey_task +ffffffff8185dcc0 T iwx_delete_key +ffffffff8185de50 T iwx_media_change +ffffffff8185dec0 T iwx_stop +ffffffff8185e360 T iwx_init +ffffffff8185e630 T iwx_newstate_task +ffffffff8185e770 T iwx_newstate +ffffffff8185e940 T iwx_endscan +ffffffff8185e990 T iwx_fill_sf_command +ffffffff8185ea60 T iwx_send_bt_init_conf +ffffffff8185eaf0 T iwx_send_soc_conf +ffffffff8185ec30 T iwx_send_update_mcc_cmd +ffffffff8185edd0 T iwx_send_temp_report_ths_cmd +ffffffff8185eea0 T iwx_init_hw +ffffffff8185f480 T iwx_preinit +ffffffff8185f650 T iwx_start +ffffffff8185f820 T iwx_watchdog +ffffffff8185fa30 T iwx_nic_error +ffffffff8185ff10 T iwx_dump_driver_status +ffffffff81860140 T iwx_ioctl +ffffffff818602a0 T iwx_nic_umac_error +ffffffff81860710 T iwx_desc_lookup +ffffffff818608a0 T iwx_rx_pkt_valid +ffffffff818608f0 T iwx_rx_pkt +ffffffff818618d0 T iwx_notif_intr +ffffffff81861a20 T iwx_intr +ffffffff81861eb0 T iwx_intr_msix +ffffffff818621b0 T iwx_match +ffffffff818621e0 T iwx_attach_hook +ffffffff81862220 T iwx_find_device_cfg +ffffffff818623c0 T iwx_attach +ffffffff818633b0 T iwx_radiotap_attach +ffffffff81863440 T iwx_init_task +ffffffff81863500 T iwx_resume +ffffffff81863640 T iwx_wakeup +ffffffff81863710 T iwx_activate +ffffffff81864000 T qwx_pci_match +ffffffff81864030 T qwx_pci_attach +ffffffff81864b10 T qwx_pci_detach +ffffffff81864d30 T qwx_pci_init_qmi_ce_config +ffffffff81864d50 T qwx_pcic_init_msi_config +ffffffff81864df0 T qwx_pci_alloc_msi +ffffffff81864ed0 T qwx_pcic_map_service_to_pipe +ffffffff81864fd0 T qwx_pcic_get_user_msi_vector +ffffffff818650b0 T qwx_pcic_read32 +ffffffff818651a0 T qwx_pcic_write32 +ffffffff818652a0 T qwx_pci_start +ffffffff818653a0 T qwx_pci_stop +ffffffff81865420 T qwx_pci_power_up +ffffffff81865550 T qwx_pci_power_down +ffffffff81865760 T qwx_mhi_submit_xfer +ffffffff818659d0 T qwx_pcic_ext_irq_enable +ffffffff81865a00 T qwx_pcic_ext_irq_disable +ffffffff81865a30 T qwx_pci_intr +ffffffff81865cc0 T qwx_pci_intr_mhi_ctrl +ffffffff81865d10 T qwx_pci_intr_mhi_data +ffffffff81865d60 T qwx_pci_read_hw_version +ffffffff81865dd0 T qwx_pci_alloc_event_rings +ffffffff81866040 T qwx_pci_init_cmd_ring +ffffffff818660d0 T qwx_mhi_register +ffffffff81866100 T qwx_pcic_config_irq +ffffffff81866360 T qwx_rddm_task +ffffffff818665d0 T qwx_pci_attach_hook +ffffffff81866610 T qwx_pci_free_cmd_ring +ffffffff81866690 T qwx_pci_free_event_rings +ffffffff81866790 T qwx_pci_free_xfer_rings +ffffffff81866860 T qwx_pci_alloc_xfer_ring +ffffffff81866b20 T qwx_pci_alloc_xfer_rings_qca6390 +ffffffff81866c20 T qwx_pci_alloc_xfer_rings_qcn9074 +ffffffff81866d30 T qwx_pci_alloc_event_ring +ffffffff81866e10 T qwx_pci_read +ffffffff81866e40 T qwx_pci_write +ffffffff81866e70 T qwx_pcic_ce_irq_enable +ffffffff81866eb0 T qwx_pcic_ce_irq_disable +ffffffff81866ef0 T qwx_pcic_ext_grp_disable +ffffffff81866f20 T qwx_pcic_ext_irq_config +ffffffff81867150 T qwx_pcic_ce_irqs_enable +ffffffff818671f0 T qwx_pcic_ce_irqs_disable +ffffffff81867290 T qwx_pci_aspm_restore +ffffffff81867300 T qwx_pcic_ce_irq_disable_sync +ffffffff818673a0 T qwx_pci_bus_wake_up +ffffffff81867430 T qwx_mhi_wake_db_clear_valid +ffffffff81867470 T qwx_mhi_device_wake +ffffffff818674d0 T qwx_pci_bus_release +ffffffff81867560 T qwx_mhi_device_zzz +ffffffff818675c0 T qwx_pci_get_window_start +ffffffff81867630 T qwx_pci_select_window +ffffffff818676d0 T qwx_pci_window_write32 +ffffffff818677d0 T qwx_pci_window_read32 +ffffffff818678c0 T qwx_pci_select_static_window +ffffffff818678f0 T qwx_pci_soc_global_reset +ffffffff81867bb0 T qwx_pci_clear_dbg_registers +ffffffff81867eb0 T qwx_pci_set_link_reg +ffffffff81868140 T qwx_pci_fix_l1ss +ffffffff81868210 T qwx_pci_enable_ltssm +ffffffff818685c0 T qwx_pci_clear_all_intrs +ffffffff818686b0 T qwx_pci_set_wlaon_pwr_ctrl +ffffffff81868840 T qwx_pci_force_wake +ffffffff81868910 T qwx_pci_sw_reset +ffffffff81868a90 T qwx_mhi_clear_vector +ffffffff81868b20 T qwx_mhi_reset_device +ffffffff81868c70 T qwx_pci_msi_config +ffffffff81868cd0 T qwx_pci_msi_enable +ffffffff81868d30 T qwx_pci_msi_disable +ffffffff81868d90 T qwx_pci_aspm_disable +ffffffff81868e20 T qwx_mhi_start +ffffffff81869100 T qwx_mhi_stop +ffffffff81869120 T qwx_mhi_unregister +ffffffff81869150 T qwx_mhi_ring_doorbell +ffffffff818691c0 T qwx_mhi_init_xfer_rings +ffffffff81869330 T qwx_mhi_init_event_rings +ffffffff81869480 T qwx_mhi_init_cmd_ring +ffffffff81869500 T qwx_mhi_init_dev_ctxt +ffffffff818696c0 T qwx_pci_cmd_ring_get_elem +ffffffff81869720 T qwx_mhi_cmd_ring_submit +ffffffff81869850 T qwx_mhi_send_cmd +ffffffff81869920 T qwx_pci_xfer_ring_get_elem +ffffffff81869970 T qwx_pci_xfer_ring_get_data +ffffffff818699c0 T qwx_mhi_start_channel +ffffffff81869c70 T qwx_mhi_start_channels +ffffffff81869d70 T qwx_rddm_prepare +ffffffff81869ff0 T qwx_mhi_fw_load_handler +ffffffff8186a1f0 T qwx_mhi_await_device_reset +ffffffff8186a2a0 T qwx_mhi_fw_load_bhi +ffffffff8186a4e0 T qwx_mhi_fw_load_bhie +ffffffff8186a840 T qwx_mhi_await_device_ready +ffffffff8186a980 T qwx_mhi_ready_state_transition +ffffffff8186ab30 T qwx_mhi_init_mmio +ffffffff8186ae10 T qwx_mhi_set_state +ffffffff8186ae90 T qwx_mhi_mission_mode_state_transition +ffffffff8186afd0 T qwx_mhi_low_power_mode_state_transition +ffffffff8186b030 T qwx_pci_event_ring_get_elem +ffffffff8186b080 T qwx_mhi_state_change +ffffffff8186b3b0 T qwx_pci_intr_ctrl_event_mhi +ffffffff8186b3f0 T qwx_pci_intr_ctrl_event_ee +ffffffff8186b430 T qwx_pci_intr_ctrl_event_cmd_complete +ffffffff8186b570 T qwx_pci_intr_ctrl_event +ffffffff8186b7c0 T qwx_pci_intr_data_event_tx +ffffffff8186bb50 T qwx_pci_intr_data_event +ffffffff8186c000 T cmpci_match +ffffffff8186c030 T cmpci_attach +ffffffff8186c500 T cmpci_activate +ffffffff8186c580 T cmpci_open +ffffffff8186c5b0 T cmpci_close +ffffffff8186c5e0 T cmpci_set_params +ffffffff8186cf90 T cmpci_round_blocksize +ffffffff8186cfc0 T cmpci_halt_output +ffffffff8186d170 T cmpci_halt_input +ffffffff8186d2f0 T cmpci_set_port +ffffffff8186d450 T cmpci_get_port +ffffffff8186d520 T cmpci_query_devinfo +ffffffff8186dcf0 T cmpci_malloc +ffffffff8186dd50 T cmpci_free +ffffffff8186de20 T cmpci_round_buffersize +ffffffff8186de60 T cmpci_trigger_output +ffffffff8186e160 T cmpci_trigger_input +ffffffff8186e410 T cmpci_mixerreg_read +ffffffff8186e4a0 T cmpci_mixerreg_write +ffffffff8186e510 T cmpci_reg_partial_write_1 +ffffffff8186e5a0 T cmpci_reg_partial_write_4 +ffffffff8186e630 T cmpci_reg_set_1 +ffffffff8186e6a0 T cmpci_reg_clear_1 +ffffffff8186e710 T cmpci_reg_set_4 +ffffffff8186e780 T cmpci_reg_clear_4 +ffffffff8186e7f0 T cmpci_reg_set_reg_misc +ffffffff8186e830 T cmpci_reg_clear_reg_misc +ffffffff8186e880 T cmpci_rate_to_index +ffffffff8186e900 T cmpci_index_to_rate +ffffffff8186e930 T cmpci_index_to_divider +ffffffff8186e960 T cmpci_intr +ffffffff8186ec60 T cmpci_set_mixer_gain +ffffffff8186f3f0 T cmpci_resume +ffffffff8186f460 T cmpci_alloc_dmamem +ffffffff8186f620 T cmpci_free_dmamem +ffffffff8186f6f0 T cmpci_find_dmamem +ffffffff8186f750 T cmpci_adjust +ffffffff8186f7a0 T cmpci_set_out_ports +ffffffff8186fd90 T cmpci_set_in_ports +ffffffff81870000 T iha_pci_probe +ffffffff81870060 T iha_pci_attach +ffffffff81871000 T pcscp_match +ffffffff81871040 T pcscp_attach +ffffffff81871420 T pcscp_read_reg +ffffffff81871450 T pcscp_write_reg +ffffffff81871480 T pcscp_dma_isintr +ffffffff818714d0 T pcscp_dma_reset +ffffffff81871530 T pcscp_dma_intr +ffffffff81871a80 T pcscp_dma_setup +ffffffff81871cf0 T pcscp_dma_go +ffffffff81871e20 T pcscp_dma_stop +ffffffff81871eb0 T pcscp_dma_isactive +ffffffff81872000 T bge_probe +ffffffff81872030 T bge_attach +ffffffff81873450 T bge_detach +ffffffff818735a0 T bge_activate +ffffffff81873650 T bge_readmem_ind +ffffffff81873700 T bge_writemem_ind +ffffffff818737d0 T bge_writereg_ind +ffffffff81873820 T bge_writembx +ffffffff81873870 T bge_ape_lock_init +ffffffff81873a90 T bge_ape_read_fw_ver +ffffffff81873bf0 T bge_ape_lock +ffffffff81873da0 T bge_ape_unlock +ffffffff81873e60 T bge_ape_send_event +ffffffff81874050 T bge_ape_driver_state_change +ffffffff81874220 T bge_nvram_getbyte +ffffffff81874470 T bge_read_nvram +ffffffff81874520 T bge_eeprom_getbyte +ffffffff818746a0 T bge_read_eeprom +ffffffff81874730 T bge_miibus_readreg +ffffffff81874a10 T bge_miibus_writereg +ffffffff81874d10 T bge_miibus_statchg +ffffffff81874f10 T bge_newbuf +ffffffff818750a0 T bge_newbuf_jumbo +ffffffff81875320 T bge_init_rx_ring_std +ffffffff81875480 T bge_fill_rx_ring_std +ffffffff818755e0 T bge_rxtick +ffffffff81875620 T bge_rxtick_jumbo +ffffffff81875660 T bge_fill_rx_ring_jumbo +ffffffff818757c0 T bge_free_rx_ring_std +ffffffff818758e0 T bge_init_rx_ring_jumbo +ffffffff81875ac0 T bge_free_rx_ring_jumbo +ffffffff81875c20 T bge_free_tx_ring +ffffffff81875d00 T bge_init_tx_ring +ffffffff81875ef0 T bge_iff +ffffffff81876060 T bge_sig_pre_reset +ffffffff818760a0 T bge_sig_post_reset +ffffffff81876120 T bge_sig_legacy +ffffffff81876150 T bge_stop_fw +ffffffff81876180 T bge_dma_swap_options +ffffffff818761d0 T bge_phy_addr +ffffffff81876290 T bge_chipinit +ffffffff81876720 T bge_blockinit +ffffffff81877df0 T bge_lookup_rev +ffffffff81878080 T bge_can_use_msi +ffffffff818780f0 T bge_reset +ffffffff81878ab0 T bge_kstat_attach +ffffffff81878bd0 T bge_ioctl +ffffffff81878f40 T bge_start +ffffffff81879100 T bge_watchdog +ffffffff81879160 T bge_intr +ffffffff81879360 T bge_ifmedia_upd +ffffffff81879630 T bge_ifmedia_sts +ffffffff81879730 T bge_tick +ffffffff81879900 T bge_stop +ffffffff8187a610 T bge_init +ffffffff8187ab00 T bge_rxeof +ffffffff8187aee0 T bge_rxcsum +ffffffff8187af80 T bge_txeof +ffffffff8187b180 T bge_link_upd +ffffffff8187b4e0 T bge_stats_update_regs +ffffffff8187b6f0 T bge_stats_update +ffffffff8187b810 T bge_compact_dma_runt +ffffffff8187ba10 T bge_cksum_pad +ffffffff8187baf0 T bge_encap +ffffffff8187be30 T bge_rxrinfo +ffffffff8187bfa0 T bge_stop_block +ffffffff8187c070 T bge_kstat_read +ffffffff8187d000 T bnx_probe +ffffffff8187d030 T bnx_attach +ffffffff8187d400 T nswaph +ffffffff8187d450 T bnx_read_firmware +ffffffff8187e020 T bnx_read_rv2p +ffffffff8187e150 T bnx_reg_rd_ind +ffffffff8187e1a0 T bnx_intr +ffffffff8187e400 T bnx_attachhook +ffffffff8187e7c0 T bnx_release_resources +ffffffff8187e840 T bnx_reset +ffffffff8187ed30 T bnx_chipinit +ffffffff8187efb0 T bnx_nvram_test +ffffffff8187f110 T bnx_get_mac_addr +ffffffff8187f230 T bnx_get_media +ffffffff8187f3e0 T bnx_dma_alloc +ffffffff8187fd60 T bnx_ioctl +ffffffff8187ff80 T bnx_start +ffffffff81880130 T bnx_watchdog +ffffffff818801c0 T bnx_miibus_read_reg +ffffffff81880430 T bnx_miibus_write_reg +ffffffff81880660 T bnx_miibus_statchg +ffffffff81880850 T bnx_init_media +ffffffff818808e0 T bnx_ifmedia_upd +ffffffff81880960 T bnx_ifmedia_sts +ffffffff818809d0 T bnx_tick +ffffffff81880ae0 T bnx_rxrefill +ffffffff81880b30 T bnx_mgmt_init +ffffffff81880c50 T bnx_reg_wr_ind +ffffffff81880ca0 T bnx_ctx_wr +ffffffff81880e90 T bnx_acquire_nvram_lock +ffffffff81880f50 T bnx_release_nvram_lock +ffffffff81881010 T bnx_enable_nvram_access +ffffffff81881070 T bnx_disable_nvram_access +ffffffff818810d0 T bnx_nvram_read_dword +ffffffff81881240 T bnx_init_nvram +ffffffff818819e0 T bnx_nvram_read +ffffffff81881d00 T bnx_dma_free +ffffffff81882240 T bnx_fw_sync +ffffffff81882420 T bnx_load_rv2p_fw +ffffffff81882530 T bnx_load_cpu_fw +ffffffff818829e0 T bnx_init_cpus +ffffffff81883370 T bnx_init_context +ffffffff81883a20 T bnx_set_mac_addr +ffffffff81883a90 T bnx_stop +ffffffff81883d60 T bnx_disable_intr +ffffffff81883dc0 T bnx_free_rx_chain +ffffffff81883e80 T bnx_free_tx_chain +ffffffff81883f80 T bnx_blockinit +ffffffff81884550 T bnx_get_buf +ffffffff81884730 T bnx_init_tx_context +ffffffff818847f0 T bnx_init_tx_chain +ffffffff81884930 T bnx_init_rx_context +ffffffff818849f0 T bnx_fill_rx_chain +ffffffff81884b30 T bnx_init_rx_chain +ffffffff81884c30 T bnx_phy_intr +ffffffff81884cd0 T bnx_rx_intr +ffffffff81885040 T bnx_tx_intr +ffffffff818851b0 T bnx_enable_intr +ffffffff81885270 T bnx_init +ffffffff81885680 T bnx_iff +ffffffff81885aa0 T bnx_tx_encap +ffffffff81885ce0 T bnx_stats_update +ffffffff81887000 T vge_probe +ffffffff81887030 T vge_attach +ffffffff81887410 T vge_detach +ffffffff818874d0 T vge_read_eeprom +ffffffff818875d0 T vge_miipoll_stop +ffffffff81887690 T vge_miipoll_start +ffffffff818877e0 T vge_miibus_readreg +ffffffff818879c0 T vge_miibus_writereg +ffffffff81887ba0 T vge_cam_clear +ffffffff81887f00 T vge_cam_set +ffffffff818882c0 T vge_iff +ffffffff81888480 T vge_reset +ffffffff81888610 T vge_allocmem +ffffffff81888a30 T vge_freemem +ffffffff81888b80 T vge_intr +ffffffff81888d80 T vge_ioctl +ffffffff81888ed0 T vge_start +ffffffff818890e0 T vge_watchdog +ffffffff81889150 T vge_miibus_statchg +ffffffff81889390 T vge_ifmedia_upd +ffffffff818893b0 T vge_ifmedia_sts +ffffffff81889410 T vge_tick +ffffffff818894e0 T vge_stop +ffffffff818896e0 T vge_newbuf +ffffffff81889900 T vge_tx_list_init +ffffffff818899b0 T vge_rx_list_init +ffffffff81889ab0 T vge_rxeof +ffffffff81889ee0 T vge_txeof +ffffffff8188a050 T vge_init +ffffffff8188a7e0 T vge_encap +ffffffff8188b000 T stge_match +ffffffff8188b030 T stge_attach +ffffffff8188b7a0 T stge_mii_bitbang_read +ffffffff8188b7f0 T stge_mii_bitbang_write +ffffffff8188b820 T stge_tick +ffffffff8188b960 T stge_intr +ffffffff8188bc50 T stge_reset +ffffffff8188bd30 T stge_read_eeprom +ffffffff8188be60 T stge_mii_readreg +ffffffff8188be80 T stge_mii_writereg +ffffffff8188bea0 T stge_mii_statchg +ffffffff8188bef0 T stge_mediachange +ffffffff8188bf40 T stge_mediastatus +ffffffff8188bfa0 T stge_ioctl +ffffffff8188c0f0 T stge_start +ffffffff8188c400 T stge_watchdog +ffffffff8188c490 T stge_txintr +ffffffff8188c5e0 T stge_init +ffffffff8188cdc0 T stge_stop +ffffffff8188cff0 T stge_iff +ffffffff8188d120 T stge_rxintr +ffffffff8188d610 T stge_stats_update +ffffffff8188d730 T stge_add_rxbuf +ffffffff8188d940 T stge_rxdrain +ffffffff8188e000 T nfe_match +ffffffff8188e030 T nfe_attach +ffffffff8188e6a0 T nfe_activate +ffffffff8188e720 T nfe_stop +ffffffff8188e8c0 T nfe_init +ffffffff8188ee60 T nfe_intr +ffffffff8188ef50 T nfe_get_macaddr +ffffffff8188f030 T nfe_alloc_tx_ring +ffffffff8188f250 T nfe_alloc_rx_ring +ffffffff8188f5d0 T nfe_free_tx_ring +ffffffff8188f740 T nfe_ioctl +ffffffff8188f890 T nfe_start +ffffffff8188fa60 T nfe_watchdog +ffffffff8188fac0 T nfe_wol +ffffffff8188fb40 T nfe_miibus_readreg +ffffffff8188fcc0 T nfe_miibus_writereg +ffffffff8188fe20 T nfe_miibus_statchg +ffffffff8188ff90 T nfe_ifmedia_upd +ffffffff8188fff0 T nfe_ifmedia_sts +ffffffff81890050 T nfe_tick +ffffffff818900a0 T nfe_rxeof +ffffffff81890480 T nfe_txeof +ffffffff81890720 T nfe_iff +ffffffff818909f0 T nfe_txdesc32_sync +ffffffff81890a30 T nfe_txdesc64_sync +ffffffff81890a70 T nfe_txdesc32_rsync +ffffffff81890b00 T nfe_txdesc64_rsync +ffffffff81890b90 T nfe_rxdesc32_sync +ffffffff81890bd0 T nfe_rxdesc64_sync +ffffffff81890c10 T nfe_encap +ffffffff81890ec0 T nfe_set_macaddr +ffffffff81890f20 T nfe_reset_tx_ring +ffffffff81891050 T nfe_reset_rx_ring +ffffffff81891120 T nfe_free_rx_ring +ffffffff81892000 T et_match +ffffffff81892030 T et_attach +ffffffff818924b0 T et_detach +ffffffff81892590 T et_intr +ffffffff818926b0 T et_bus_config +ffffffff81892740 T et_get_eaddr +ffffffff818927c0 T et_reset +ffffffff81892860 T et_disable_intrs +ffffffff81892890 T et_dma_alloc +ffffffff81892a80 T et_ioctl +ffffffff81892bf0 T et_start +ffffffff81892d90 T et_watchdog +ffffffff81892dd0 T et_chip_attach +ffffffff81892ed0 T et_miibus_readreg +ffffffff81893030 T et_miibus_writereg +ffffffff81893150 T et_miibus_statchg +ffffffff81893240 T et_ifmedia_upd +ffffffff818932c0 T et_ifmedia_sts +ffffffff81893320 T et_tick +ffffffff81893370 T et_txtick +ffffffff818933b0 T et_stop +ffffffff818935e0 T et_dma_free +ffffffff818937a0 T et_stop_rxdma +ffffffff81893850 T et_stop_txdma +ffffffff818938b0 T et_free_tx_ring +ffffffff81893960 T et_free_rx_ring +ffffffff81893aa0 T et_enable_intrs +ffffffff81893ad0 T et_dma_mem_create +ffffffff81893c80 T et_dma_mbuf_create +ffffffff81893ff0 T et_dma_mem_destroy +ffffffff81894060 T et_dma_mbuf_destroy +ffffffff818941c0 T et_rxeof +ffffffff81894560 T et_txeof +ffffffff81894780 T et_init +ffffffff818949e0 T et_init_tx_ring +ffffffff81894a90 T et_init_rx_ring +ffffffff81894be0 T et_chip_init +ffffffff81894ec0 T et_enable_txrx +ffffffff81894fe0 T et_start_rxdma +ffffffff818950b0 T et_start_txdma +ffffffff81895110 T et_setmulti +ffffffff81895350 T et_encap +ffffffff81895750 T et_init_mac +ffffffff818958c0 T et_init_rxmac +ffffffff81895b70 T et_init_txmac +ffffffff81895bf0 T et_init_rxdma +ffffffff81895f60 T et_init_txdma +ffffffff81896090 T et_newbuf_cluster +ffffffff818960b0 T et_newbuf +ffffffff818962f0 T et_newbuf_hdr +ffffffff81897000 T jme_match +ffffffff81897030 T jme_attach +ffffffff818975a0 T jme_miibus_readreg +ffffffff818976c0 T jme_miibus_writereg +ffffffff818977e0 T jme_miibus_statchg +ffffffff81897d10 T jme_stop_rx +ffffffff81897e00 T jme_stop_tx +ffffffff81897ef0 T jme_rxeof +ffffffff81898020 T jme_txeof +ffffffff81898270 T jme_init_tx_ring +ffffffff81898330 T jme_init_ssb +ffffffff81898390 T jme_mac_config +ffffffff818987d0 T jme_mediastatus +ffffffff81898830 T jme_mediachange +ffffffff81898890 T jme_eeprom_read_byte +ffffffff818989f0 T jme_eeprom_macaddr +ffffffff81898b40 T jme_reg_macaddr +ffffffff81898be0 T jme_map_intr_vector +ffffffff81898c80 T jme_intr +ffffffff81898e30 T jme_reset +ffffffff81898ea0 T jme_dma_alloc +ffffffff81899450 T jme_ioctl +ffffffff818995a0 T jme_start +ffffffff818996f0 T jme_watchdog +ffffffff81899790 T jme_tick +ffffffff818997f0 T jme_detach +ffffffff818998b0 T jme_stop +ffffffff81899b90 T jme_dma_free +ffffffff81899cc0 T jme_encap +ffffffff81899f50 T jme_init +ffffffff8189a6c0 T jme_iff +ffffffff8189a820 T jme_discard_rxbufs +ffffffff8189a8a0 T jme_rxpkt +ffffffff8189ac10 T jme_newbuf +ffffffff8189ad80 T jme_init_rx_ring +ffffffff8189aea0 T jme_set_vlan +ffffffff8189b000 T age_match +ffffffff8189b030 T age_attach +ffffffff8189b4c0 T age_intr +ffffffff8189b6b0 T age_phy_reset +ffffffff8189bf50 T age_reset +ffffffff8189c080 T age_dma_alloc +ffffffff8189c7e0 T age_get_macaddr +ffffffff8189c9a0 T age_ioctl +ffffffff8189caf0 T age_start +ffffffff8189cc80 T age_watchdog +ffffffff8189cd10 T age_miibus_readreg +ffffffff8189ce10 T age_miibus_writereg +ffffffff8189cf20 T age_miibus_statchg +ffffffff8189d0f0 T age_mediachange +ffffffff8189d150 T age_mediastatus +ffffffff8189d1b0 T age_tick +ffffffff8189d210 T age_dma_free +ffffffff8189d4d0 T age_detach +ffffffff8189d590 T age_stop +ffffffff8189d8b0 T age_stop_rxmac +ffffffff8189d9e0 T age_stop_txmac +ffffffff8189db10 T age_mac_config +ffffffff8189dbb0 T age_rxintr +ffffffff8189dd80 T age_txintr +ffffffff8189df40 T age_init +ffffffff8189e900 T age_stats_update +ffffffff8189ec20 T age_encap +ffffffff8189ee80 T age_iff +ffffffff8189efe0 T age_rxeof +ffffffff8189f360 T age_newbuf +ffffffff8189f4f0 T age_init_rx_ring +ffffffff8189f5c0 T age_init_rr_ring +ffffffff8189f640 T age_init_tx_ring +ffffffff8189f700 T age_init_cmb_block +ffffffff8189f750 T age_init_smb_block +ffffffff8189f7a0 T age_rxvlan +ffffffff818a0000 T alc_match +ffffffff818a0030 T alc_attach +ffffffff818a0880 T alc_detach +ffffffff818a0950 T alc_activate +ffffffff818a09d0 T alc_miibus_readreg +ffffffff818a0b90 T alc_mii_readreg_816x +ffffffff818a0c90 T alc_mii_readreg_813x +ffffffff818a0da0 T alc_miibus_writereg +ffffffff818a0f60 T alc_mii_writereg_816x +ffffffff818a1070 T alc_mii_writereg_813x +ffffffff818a1170 T alc_miibus_statchg +ffffffff818a1520 T alc_stop_mac +ffffffff818a1610 T alc_start_queue +ffffffff818a16c0 T alc_mac_config +ffffffff818a17a0 T alc_aspm +ffffffff818a1870 T alc_dsp_fixup +ffffffff818a1e50 T alc_miidbg_readreg +ffffffff818a1e90 T alc_miidbg_writereg +ffffffff818a1ee0 T alc_miiext_readreg +ffffffff818a2010 T alc_miiext_writereg +ffffffff818a2150 T alc_mediastatus +ffffffff818a21c0 T alc_mediachange +ffffffff818a2220 T alc_get_macaddr +ffffffff818a2240 T alc_get_macaddr_816x +ffffffff818a24c0 T alc_get_macaddr_813x +ffffffff818a2960 T alc_get_macaddr_par +ffffffff818a2a10 T alc_disable_l0s_l1 +ffffffff818a2aa0 T alc_phy_reset +ffffffff818a2ac0 T alc_phy_reset_816x +ffffffff818a3350 T alc_phy_reset_813x +ffffffff818a3730 T alc_phy_down +ffffffff818a3850 T alc_aspm_816x +ffffffff818a3900 T alc_aspm_813x +ffffffff818a3ae0 T alc_init_pcie +ffffffff818a3e60 T alc_config_msi +ffffffff818a3f30 T alc_intr +ffffffff818a4110 T alc_reset +ffffffff818a44e0 T alc_dma_alloc +ffffffff818a4c50 T alc_ioctl +ffffffff818a4da0 T alc_start +ffffffff818a4f30 T alc_watchdog +ffffffff818a4fa0 T alc_tick +ffffffff818a5000 T alc_dma_free +ffffffff818a52c0 T alc_stop +ffffffff818a5610 T alc_init +ffffffff818a6510 T alc_encap +ffffffff818a6740 T alc_txeof +ffffffff818a6930 T alc_iff +ffffffff818a6a90 T alc_stats_clear +ffffffff818a6bd0 T alc_stats_update +ffffffff818a7030 T alc_rxintr +ffffffff818a7240 T alc_newbuf +ffffffff818a73c0 T alc_rxeof +ffffffff818a7630 T alc_osc_reset +ffffffff818a77c0 T alc_init_rx_ring +ffffffff818a78c0 T alc_init_rr_ring +ffffffff818a7940 T alc_init_tx_ring +ffffffff818a79f0 T alc_init_cmb +ffffffff818a7a30 T alc_init_smb +ffffffff818a7a80 T alc_rxvlan +ffffffff818a7af0 T alc_stop_queue +ffffffff818a8000 T ale_match +ffffffff818a8030 T ale_attach +ffffffff818a8580 T ale_activate +ffffffff818a8600 T ale_miibus_readreg +ffffffff818a8720 T ale_miibus_writereg +ffffffff818a8830 T ale_miibus_statchg +ffffffff818a8a50 T ale_stop_mac +ffffffff818a8b40 T ale_mac_config +ffffffff818a8be0 T ale_mediastatus +ffffffff818a8c50 T ale_mediachange +ffffffff818a8cb0 T ale_get_macaddr +ffffffff818a8e70 T ale_phy_reset +ffffffff818a94b0 T ale_intr +ffffffff818a9600 T ale_reset +ffffffff818a9770 T ale_dma_alloc +ffffffff818a9ee0 T ale_ioctl +ffffffff818aa030 T ale_start +ffffffff818aa190 T ale_watchdog +ffffffff818aa200 T ale_tick +ffffffff818aa260 T ale_dma_free +ffffffff818aa520 T ale_detach +ffffffff818aa5e0 T ale_stop +ffffffff818aa8a0 T ale_init +ffffffff818ab2b0 T ale_encap +ffffffff818ab510 T ale_txeof +ffffffff818ab700 T ale_iff +ffffffff818ab860 T ale_stats_clear +ffffffff818ab930 T ale_stats_update +ffffffff818abcb0 T ale_rxeof +ffffffff818abf50 T ale_rx_update_page +ffffffff818ac090 T ale_rxcsum +ffffffff818ac140 T ale_init_rx_pages +ffffffff818ac270 T ale_init_tx_ring +ffffffff818ac360 T ale_rxvlan +ffffffff818ad000 T amdpm_match +ffffffff818ad030 T amdpm_attach +ffffffff818ad360 T amdpm_activate +ffffffff818ad3d0 T amdpm_rnd_callout +ffffffff818ad430 T amdpm_i2c_acquire_bus +ffffffff818ad490 T amdpm_i2c_release_bus +ffffffff818ad4e0 T amdpm_i2c_exec +ffffffff818ad850 T amdpm_get_timecount +ffffffff818ad880 T amdpm_intr +ffffffff818ae000 T bce_probe +ffffffff818ae030 T bce_attach +ffffffff818ae830 T bce_activate +ffffffff818ae8a0 T bce_intr +ffffffff818aeb90 T bce_reset +ffffffff818af150 T bce_ioctl +ffffffff818af2b0 T bce_start +ffffffff818af4e0 T bce_watchdog +ffffffff818af530 T bce_mii_read +ffffffff818af670 T bce_mii_write +ffffffff818af7a0 T bce_statchg +ffffffff818afb30 T bce_mediachange +ffffffff818afb80 T bce_mediastatus +ffffffff818afbe0 T bce_tick +ffffffff818afc30 T bce_stop +ffffffff818afd50 T bce_init +ffffffff818b0160 T bce_iff +ffffffff818b0260 T bce_rxintr +ffffffff818b03f0 T bce_txintr +ffffffff818b04e0 T bce_add_rxbuf +ffffffff818b05a0 T bce_add_mac +ffffffff818b1000 T ath_pci_match +ffffffff818b1060 T ath_pci_attach +ffffffff818b1290 T ath_pci_detach +ffffffff818b2000 T athn_pci_match +ffffffff818b2030 T athn_pci_attach +ffffffff818b22c0 T athn_pci_detach +ffffffff818b2340 T athn_pci_activate +ffffffff818b23f0 T athn_pci_read +ffffffff818b2420 T athn_pci_write +ffffffff818b2450 T athn_pci_write_barrier +ffffffff818b2480 T athn_pci_disable_aspm +ffffffff818b24f0 T athn_pci_wakeup +ffffffff818b3000 T atw_pci_match +ffffffff818b3030 T atw_pci_attach +ffffffff818b32a0 T atw_pci_detach +ffffffff818b3320 t atw_pci_enable +ffffffff818b33c0 t atw_pci_disable +ffffffff818b4000 T rtw_pci_match +ffffffff818b4030 T rtw_pci_attach +ffffffff818b4250 T rtw_pci_detach +ffffffff818b42d0 T rtw_pci_enable +ffffffff818b4370 T rtw_pci_disable +ffffffff818b5000 T rtwn_pci_match +ffffffff818b5030 T rtwn_pci_attach +ffffffff818b5590 T rtwn_pci_detach +ffffffff818b56a0 T rtwn_pci_activate +ffffffff818b56c0 T rtwn_calib_to +ffffffff818b5720 T rtwn_scan_to +ffffffff818b5740 T rtwn_intr +ffffffff818b59e0 T rtwn_alloc_rx_list +ffffffff818b5d00 T rtwn_alloc_tx_list +ffffffff818b5f40 T rtwn_free_rx_list +ffffffff818b6090 T rtwn_pci_write_1 +ffffffff818b60c0 T rtwn_pci_write_2 +ffffffff818b60f0 T rtwn_pci_write_4 +ffffffff818b6120 T rtwn_pci_read_1 +ffffffff818b6150 T rtwn_pci_read_2 +ffffffff818b6180 T rtwn_pci_read_4 +ffffffff818b61b0 T rtwn_tx +ffffffff818b6740 T rtwn_power_on +ffffffff818b6770 T rtwn_dma_init +ffffffff818b6b20 T rtwn_pci_load_firmware +ffffffff818b6bd0 T rtwn_fw_loadpage +ffffffff818b6d00 T rtwn_mac_init +ffffffff818b6e40 T rtwn_bb_init +ffffffff818b72f0 T rtwn_alloc_buffers +ffffffff818b7320 T rtwn_pci_init +ffffffff818b73f0 T rtwn_pci_stop +ffffffff818b7540 T rtwn_is_oactive +ffffffff818b7580 T rtwn_next_calib +ffffffff818b75a0 T rtwn_cancel_calib +ffffffff818b75e0 T rtwn_pci_next_scan +ffffffff818b7600 T rtwn_cancel_scan +ffffffff818b7640 T rtwn_wait_async +ffffffff818b7670 T rtwn_free_tx_list +ffffffff818b77e0 T rtwn_setup_rx_desc +ffffffff818b7850 T rtwn_reset_rx_list +ffffffff818b78f0 T rtwn_reset_tx_list +ffffffff818b7a40 T rtwn_rx_frame +ffffffff818b7ec0 T rtwn_tx_done +ffffffff818b8050 T rtwn_poll_c2h_events +ffffffff818b8220 T rtwn_pci_92c_stop +ffffffff818b8400 T rtwn_pci_88e_stop +ffffffff818b87e0 T rtwn_pci_23a_stop +ffffffff818b8b80 T rtwn_88e_intr +ffffffff818b8eb0 T rtwn_llt_write +ffffffff818b8f70 T rtwn_llt_init +ffffffff818b9230 T rtwn_92c_power_on +ffffffff818b96b0 T rtwn_88e_power_on +ffffffff818b9ab0 T rtwn_23a_power_on +ffffffff818b9f20 T rtwn_tx_report +ffffffff818ba000 T ral_pci_match +ffffffff818ba030 T ral_pci_attach +ffffffff818ba210 T ral_pci_detach +ffffffff818ba2b0 T ral_pci_activate +ffffffff818ba340 T ral_pci_wakeup +ffffffff818bb000 T acx_pci_match +ffffffff818bb030 T acx_pci_attach +ffffffff818bb260 T acx_pci_detach +ffffffff818bc000 T pgt_pci_match +ffffffff818bc030 T pgt_pci_attach +ffffffff818bc200 T pgt_pci_detach +ffffffff818bd000 T malo_pci_match +ffffffff818bd030 T malo_pci_attach +ffffffff818bd1e0 T malo_pci_detach +ffffffff818bd230 T malo_pci_activate +ffffffff818bd290 T malo_pci_wakeup +ffffffff818be000 T bwi_pci_match +ffffffff818be070 T bwi_pci_attach +ffffffff818be290 T bwi_pci_detach +ffffffff818be2e0 T bwi_pci_activate +ffffffff818be350 T bwi_reset_bcm4331 +ffffffff818be470 T bwi_pci_conf_write +ffffffff818be4a0 T bwi_pci_conf_read +ffffffff818be4d0 T bwi_pci_wakeup +ffffffff818bf000 T piixpm_match +ffffffff818bf030 T piixpm_attach +ffffffff818bf4c0 T piixpm_intr +ffffffff818bf5d0 T piixpm_i2c_acquire_bus +ffffffff818bf6b0 T piixpm_i2c_release_bus +ffffffff818bf790 T piixpm_i2c_exec +ffffffff818c0000 T vic_match +ffffffff818c00a0 T vic_attach +ffffffff818c0430 T vic_intr +ffffffff818c04b0 T vic_query +ffffffff818c0710 T vic_alloc_data +ffffffff818c0a10 T vic_tick +ffffffff818c0a80 T vic_ioctl +ffffffff818c0cb0 T vic_start +ffffffff818c1010 T vic_watchdog +ffffffff818c1040 T vic_media_change +ffffffff818c1070 T vic_media_status +ffffffff818c1130 T vic_read +ffffffff818c1150 T vic_read_cmd +ffffffff818c11a0 T vic_getlladdr +ffffffff818c1250 T vic_alloc_dmamem +ffffffff818c13c0 T vic_rx_fill +ffffffff818c15b0 T vic_alloc_mbuf +ffffffff818c1670 T vic_init_data +ffffffff818c1a20 T vic_uninit_data +ffffffff818c1bf0 T vic_link_state +ffffffff818c1c70 T vic_write +ffffffff818c1cc0 T vic_rx_proc +ffffffff818c1f20 T vic_tx_proc +ffffffff818c20a0 T vic_iff +ffffffff818c21e0 T vic_setlladdr +ffffffff818c2240 T vic_load_txb +ffffffff818c22f0 T vic_init +ffffffff818c2490 T vic_stop +ffffffff818c25d0 T vic_rxrinfo +ffffffff818c26a0 T vic_free_dmamem +ffffffff818c3000 T vmxnet3_match +ffffffff818c3030 T vmxnet3_attach +ffffffff818c38b0 T vmxnet3_intr +ffffffff818c3950 T vmxnet3_intr_event +ffffffff818c39d0 T vmxnet3_intr_intx +ffffffff818c3a40 T vmxnet3_intr_queue +ffffffff818c3ad0 T vmxnet3_dma_init +ffffffff818c3ec0 T vmxnet3_ioctl +ffffffff818c4150 T vmxnet3_start +ffffffff818c44b0 T vmxnet3_watchdog +ffffffff818c4500 T vmxnet3_media_change +ffffffff818c4530 T vmxnet3_media_status +ffffffff818c4640 T vmxnet3_link_state +ffffffff818c4700 T vmxnet3_dma_allocmem +ffffffff818c4850 T vmxnet3_alloc_txring +ffffffff818c4a00 T vmxnet3_alloc_rxring +ffffffff818c4d50 t vmx_dmamem_alloc +ffffffff818c4eb0 T vmxnet3_rxfill_tick +ffffffff818c4f20 T vmxnet3_txinit +ffffffff818c5010 T vmxnet3_rxfill +ffffffff818c5300 T vmxnet3_rxinit +ffffffff818c5440 T vmxnet3_txstop +ffffffff818c5540 T vmxnet3_rxstop +ffffffff818c56a0 T vmxnet3_enable_all_intrs +ffffffff818c5770 T vmxnet3_disable_all_intrs +ffffffff818c5840 T vmxnet3_evintr +ffffffff818c5a10 T vmxnet3_rxintr +ffffffff818c5d80 T vmxnet3_txintr +ffffffff818c5f60 T vmxnet3_init +ffffffff818c62f0 T vmxnet3_rx_csum +ffffffff818c6350 T vmxnet3_iff +ffffffff818c6490 T vmxnet3_stop +ffffffff818c6740 T vmxnet3_reset +ffffffff818c6780 T vmxnet3_tx_offload +ffffffff818c6920 t vmx_kstat_create +ffffffff818c6b00 t vmx_kstat_read +ffffffff818c7000 T vmwpvs_match +ffffffff818c7040 T vmwpvs_attach +ffffffff818c7980 T vmwpvs_scsi_cmd +ffffffff818c7df0 T vmwpvs_intx +ffffffff818c7e70 T vmwpvs_msg_task +ffffffff818c80e0 T vmwpvs_intr +ffffffff818c82d0 T vmwpvs_get_config +ffffffff818c84d0 T vmwpvs_dmamem_zalloc +ffffffff818c8530 T vmwpvs_dmamem_alloc +ffffffff818c86b0 T vmwpvs_ccb_put +ffffffff818c8710 T vmwpvs_setup_rings +ffffffff818c8820 T vmwpvs_setup_msg_ring +ffffffff818c88f0 T vmwpvs_ccb_get +ffffffff818c8970 T vmwpvs_dmamem_free +ffffffff818c89f0 T vmwpvs_cmd +ffffffff818c8a90 T vmwpvs_scsi_cmd_done +ffffffff818c8c70 T vmwpvs_scsi_cmd_poll +ffffffff818c9000 T lii_match +ffffffff818c9030 T lii_attach +ffffffff818c9420 T lii_activate +ffffffff818c9520 T lii_reset +ffffffff818c97f0 T lii_spi_configure +ffffffff818c98e0 T lii_eeprom_present +ffffffff818c9970 T lii_eeprom_read +ffffffff818c99a0 T lii_spi_read +ffffffff818c9c60 T lii_read_macaddr +ffffffff818c9dc0 T lii_intr +ffffffff818c9ed0 T lii_alloc_rings +ffffffff818ca0e0 T lii_tick +ffffffff818ca130 T lii_mii_readreg +ffffffff818ca3d0 T lii_mii_writereg +ffffffff818ca670 T lii_mii_statchg +ffffffff818ca6e0 T lii_media_change +ffffffff818ca730 T lii_media_status +ffffffff818ca790 T lii_ioctl +ffffffff818ca920 T lii_start +ffffffff818caad0 T lii_watchdog +ffffffff818cab10 T lii_stop +ffffffff818cab80 T lii_init +ffffffff818cb070 T lii_iff +ffffffff818cb1b0 T lii_tx_put +ffffffff818cb2c0 T lii_free_tx_space +ffffffff818cb300 T lii_rxintr +ffffffff818cb4b0 T lii_txintr +ffffffff818cc000 T ichiic_match +ffffffff818cc030 T ichiic_attach +ffffffff818cc220 T ichiic_intr +ffffffff818cc340 T ichiic_i2c_acquire_bus +ffffffff818cc3a0 T ichiic_i2c_release_bus +ffffffff818cc3f0 T ichiic_i2c_exec +ffffffff818cd000 T viapm_match +ffffffff818cd030 T viapm_attach +ffffffff818cd680 T viapm_intr +ffffffff818cd790 T viapm_i2c_acquire_bus +ffffffff818cd7f0 T viapm_i2c_release_bus +ffffffff818cd840 T viapm_i2c_exec +ffffffff818cdb50 T viapm_refresh_sensor_data +ffffffff818cde50 T viapm_refresh +ffffffff818cde80 T val_to_uK +ffffffff818cdf20 T val_to_rpm +ffffffff818cdf60 T val_to_uV +ffffffff818ce000 T viapm_get_timecount +ffffffff818cf000 T amdiic_match +ffffffff818cf030 T amdiic_attach +ffffffff818cf200 T amdiic_intr +ffffffff818cf2d0 T amdiic_i2c_acquire_bus +ffffffff818cf330 T amdiic_i2c_release_bus +ffffffff818cf380 T amdiic_i2c_exec +ffffffff818cf5e0 T amdiic_read +ffffffff818cf750 T amdiic_wait +ffffffff818cf7f0 T amdiic_write +ffffffff818d0000 T nviic_match +ffffffff818d0030 T nviic_attach +ffffffff818d0270 T nviic_i2c_acquire_bus +ffffffff818d02c0 T nviic_i2c_release_bus +ffffffff818d0310 T nviic_i2c_exec +ffffffff818d05a0 T nviic_write +ffffffff818d05f0 T nviic_read +ffffffff818d1000 T sdhc_pci_match +ffffffff818d1060 T sdhc_pci_attach +ffffffff818d13b0 T sdhc_pci_activate +ffffffff818d1410 T sdhc_takecontroller +ffffffff818d14b0 T sdhc_ricohfix +ffffffff818d1620 T sdhc_pci_conf_write +ffffffff818d2000 T kate_match +ffffffff818d2170 T kate_attach +ffffffff818d24b0 T kate_refresh +ffffffff818d3000 T km_match +ffffffff818d3050 T km_attach +ffffffff818d30f0 T km_refresh +ffffffff818d4000 T ksmn_match +ffffffff818d4050 T ksmn_attach +ffffffff818d4240 T ksmn_ccd_attach +ffffffff818d4390 T ksmn_refresh +ffffffff818d44e0 T ksmn_read_reg +ffffffff818d5000 t iosf_pci_match +ffffffff818d5060 t iosf_pci_attach +ffffffff818d5100 t iosf_pci_mbi_mdr_rd +ffffffff818d5160 t iosf_pci_mbi_mdr_wr +ffffffff818d6000 T itherm_probe +ffffffff818d6030 T itherm_attach +ffffffff818d63e0 T itherm_activate +ffffffff818d6460 T itherm_enable +ffffffff818d64c0 T itherm_refresh +ffffffff818d64d0 T itherm_refresh_sensor_data +ffffffff818d68c0 T itherm_bias_temperature_sensor +ffffffff818d7000 T pchtemp_match +ffffffff818d7030 T pchtemp_attach +ffffffff818d71a0 T pchtemp_refresh +ffffffff818d8000 T rtsx_pci_match +ffffffff818d8080 T rtsx_pci_attach +ffffffff818d9000 T xspd_match +ffffffff818d9030 T xspd_attach +ffffffff818d91f0 T xspd_intr +ffffffff818da000 T virtio_pci_match +ffffffff818da080 T virtio_pci_attach +ffffffff818da420 T virtio_pci_detach +ffffffff818da500 T virtio_pci_kick +ffffffff818da560 T virtio_pci_read_device_config_1 +ffffffff818da590 T virtio_pci_read_device_config_2 +ffffffff818da5c0 T virtio_pci_read_device_config_4 +ffffffff818da5f0 T virtio_pci_read_device_config_8 +ffffffff818da670 T virtio_pci_write_device_config_1 +ffffffff818da6a0 T virtio_pci_write_device_config_2 +ffffffff818da6d0 T virtio_pci_write_device_config_4 +ffffffff818da700 T virtio_pci_write_device_config_8 +ffffffff818da770 T virtio_pci_read_queue_size +ffffffff818da7e0 T virtio_pci_setup_queue +ffffffff818daac0 T virtio_pci_set_status +ffffffff818dabf0 T virtio_pci_negotiate_features +ffffffff818dad30 T virtio_pci_poll_intr +ffffffff818dada0 T virtio_pci_find_cap +ffffffff818daf40 T virtio_pci_attach_10 +ffffffff818db3a0 T virtio_pci_attach_09 +ffffffff818db4e0 T virtio_pci_adjust_config_region +ffffffff818db580 T virtio_pci_setup_msix +ffffffff818db910 T virtio_pci_legacy_intr +ffffffff818db9b0 T virtio_pci_legacy_intr_mpsafe +ffffffff818dba40 T virtio_pci_free_irqs +ffffffff818dbc80 T virtio_pci_negotiate_features_10 +ffffffff818dbeb0 T virtio_pci_msix_establish +ffffffff818dbf80 T virtio_pci_set_msix_queue_vector +ffffffff818dc000 T virtio_pci_set_msix_config_vector +ffffffff818dc040 T virtio_pci_config_intr +ffffffff818dc080 T virtio_pci_shared_queue_intr +ffffffff818dc090 T virtio_pci_queue_intr +ffffffff818dd000 T dwiic_pci_match +ffffffff818dd030 T dwiic_pci_attach +ffffffff818dd350 T dwiic_pci_activate +ffffffff818dd3c0 T dwiic_pci_bus_scan +ffffffff818de000 T bwfm_pci_buscore_read +ffffffff818de060 T bwfm_pci_buscore_write +ffffffff818de0d0 T bwfm_pci_buscore_prepare +ffffffff818de100 T bwfm_pci_buscore_reset +ffffffff818de2f0 T bwfm_pci_buscore_activate +ffffffff818de320 T bwfm_pci_preinit +ffffffff818df130 T bwfm_pci_stop +ffffffff818df1c0 T bwfm_pci_txcheck +ffffffff818df280 T bwfm_pci_txdata +ffffffff818df5d0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818dfa00 T bwfm_pci_msgbuf_set_dcmd +ffffffff818dfa50 T bwfm_pci_match +ffffffff818dfa80 T bwfm_pci_attach +ffffffff818dfcf0 T bwfm_pci_detach +ffffffff818dfd30 T bwfm_pci_activate +ffffffff818dfee0 T bwfm_pci_intr +ffffffff818e0140 T bwfm_pci_select_core +ffffffff818e0220 T bwfm_pci_load_microcode +ffffffff818e06b0 T bwfm_pci_dmamem_alloc +ffffffff818e0850 T bwfm_pci_setup_ring +ffffffff818e0a50 T bwfm_pci_intr_enable +ffffffff818e0aa0 T bwfm_pci_hostready +ffffffff818e0b10 T bwfm_pci_fill_rx_rings +ffffffff818e0b60 T bwfm_pci_dmamem_free +ffffffff818e0bd0 T bwfm_pci_cleanup +ffffffff818e1240 T bwfm_pci_send_mb_data +ffffffff818e1360 T bwfm_pci_intmask +ffffffff818e13a0 T bwfm_pci_pktid_avail +ffffffff818e1420 T bwfm_pci_pktid_new +ffffffff818e1570 T bwfm_pci_pktid_free +ffffffff818e1620 T bwfm_pci_fill_rx_buf_ring +ffffffff818e1960 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818e1cc0 T bwfm_pci_ring_write_reserve +ffffffff818e1db0 T bwfm_pci_ring_write_cancel +ffffffff818e1df0 T bwfm_pci_ring_write_commit +ffffffff818e1ed0 T bwfm_pci_ring_write_rptr +ffffffff818e1f50 T bwfm_pci_ring_write_wptr +ffffffff818e1fd0 T bwfm_pci_setup_flowring +ffffffff818e2120 T bwfm_pci_ring_bell +ffffffff818e2160 T bwfm_pci_ring_update_rptr +ffffffff818e2210 T bwfm_pci_ring_update_wptr +ffffffff818e22c0 T bwfm_pci_ring_write_reserve_multi +ffffffff818e23e0 T bwfm_pci_ring_read_avail +ffffffff818e24e0 T bwfm_pci_ring_read_commit +ffffffff818e2570 T bwfm_pci_ring_rx +ffffffff818e2770 T bwfm_pci_msg_rx +ffffffff818e2d50 T bwfm_pci_flowring_delete_cb +ffffffff818e2e00 T bwfm_pci_msgbuf_rxioctl +ffffffff818e2ef0 T bwfm_pci_intr_status +ffffffff818e2f30 T bwfm_pci_intr_ack +ffffffff818e2f70 T bwfm_pci_flowring_lookup +ffffffff818e30e0 T bwfm_pci_flowring_create +ffffffff818e3210 T bwfm_pci_flowring_create_cb +ffffffff818e3550 T bwfm_pci_flowring_delete +ffffffff818e3820 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818e3a30 T bwfm_pci_handle_mb_data +ffffffff818e3b00 T bwfm_pci_intr_disable +ffffffff818e4000 T ccp_pci_match +ffffffff818e4030 T ccp_pci_attach +ffffffff818e5000 T bnxt_match +ffffffff818e5030 T bnxt_attach +ffffffff818e5be0 T bnxt_dmamem_alloc +ffffffff818e5d70 T bnxt_dmamem_free +ffffffff818e5e00 T bnxt_hwrm_ver_get +ffffffff818e5f50 T bnxt_hwrm_nvm_get_dev_info +ffffffff818e60a0 T bnxt_hwrm_func_drv_rgtr +ffffffff818e61c0 T bnxt_hwrm_func_rgtr_async_events +ffffffff818e62e0 T bnxt_hwrm_func_qcaps +ffffffff818e63c0 T bnxt_admin_intr +ffffffff818e65b0 T bnxt_intr +ffffffff818e6a60 T bnxt_hwrm_func_qcfg +ffffffff818e6b10 T bnxt_hwrm_queue_qportcfg +ffffffff818e6be0 T bnxt_hwrm_func_reset +ffffffff818e6c90 T bnxt_mark_cpr_invalid +ffffffff818e6cf0 T bnxt_hwrm_ring_alloc +ffffffff818e6ea0 T bnxt_cfg_async_cr +ffffffff818e6fa0 T bnxt_write_cp_doorbell +ffffffff818e6fe0 T bnxt_set_cp_ring_aggint +ffffffff818e70c0 T bnxt_ioctl +ffffffff818e7250 T bnxt_start +ffffffff818e77c0 T bnxt_watchdog +ffffffff818e77f0 T bnxt_media_change +ffffffff818e7940 T bnxt_media_status +ffffffff818e7960 T bnxt_refill +ffffffff818e79c0 T bnxt_media_autonegotiate +ffffffff818e7ab0 T bnxt_hwrm_port_phy_qcfg +ffffffff818e7f30 T bnxt_free_slots +ffffffff818e7fd0 T bnxt_hwrm_cmd_hdr_init +ffffffff818e8020 T hwrm_send_message +ffffffff818e80a0 T bnxt_queue_up +ffffffff818e8c20 T bnxt_hwrm_stat_ctx_alloc +ffffffff818e8d20 T bnxt_write_tx_doorbell +ffffffff818e8d90 T bnxt_write_rx_doorbell +ffffffff818e8e10 T bnxt_hwrm_ring_grp_alloc +ffffffff818e8f10 T bnxt_rx_fill +ffffffff818e9020 T bnxt_hwrm_ring_grp_free +ffffffff818e9100 T bnxt_hwrm_ring_free +ffffffff818e91f0 T bnxt_hwrm_stat_ctx_free +ffffffff818e92e0 T bnxt_queue_down +ffffffff818e9a00 T bnxt_up +ffffffff818e9f90 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818ea070 T bnxt_hwrm_vnic_alloc +ffffffff818ea170 T bnxt_hwrm_vnic_cfg +ffffffff818ea2b0 T bnxt_hwrm_vnic_cfg_placement +ffffffff818ea380 T bnxt_hwrm_set_filter +ffffffff818ea510 T bnxt_hwrm_vnic_rss_cfg +ffffffff818ea5f0 T bnxt_iff +ffffffff818ea760 T bnxt_hwrm_vnic_free +ffffffff818ea850 T bnxt_hwrm_vnic_ctx_free +ffffffff818ea940 T bnxt_down +ffffffff818ead10 T bnxt_hwrm_free_filter +ffffffff818eadf0 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff818eaed0 T bnxt_rxrinfo +ffffffff818eb020 T bnxt_get_sffpage +ffffffff818eb330 T bnxt_load_mbuf +ffffffff818eb3e0 T bnxt_handle_async_event +ffffffff818eb430 T bnxt_cpr_next_cmpl +ffffffff818eb4a0 T bnxt_cpr_commit +ffffffff818eb4d0 T bnxt_cpr_rollback +ffffffff818eb500 T bnxt_write_cp_doorbell_index +ffffffff818eb580 T bnxt_rx +ffffffff818eb820 T bnxt_txeof +ffffffff818eb950 T bnxt_get_media_type +ffffffff818ebeb0 T bnxt_add_media_type +ffffffff818ec070 T _hwrm_send_message +ffffffff818eed90 T bnxt_rx_fill_slots +ffffffff818eef70 T bnxt_hwrm_err_map +ffffffff818eefb0 T _bnxt_hwrm_set_async_event_bit +ffffffff818ef000 t mcx_match +ffffffff818ef030 t mcx_attach +ffffffff818efc40 T mcx_rx_fill +ffffffff818efe90 T mcx_load_mbuf +ffffffff818eff40 t mcx_dmamem_alloc +ffffffff818f00a0 t mcx_init_wait +ffffffff818f0130 t mcx_enable_hca +ffffffff818f0310 t mcx_issi +ffffffff818f0680 t mcx_pages +ffffffff818f0fe0 t mcx_hca_max_caps +ffffffff818f1560 t mcx_hca_set_caps +ffffffff818f1a40 t mcx_init_hca +ffffffff818f1c10 t mcx_set_driver_version +ffffffff818f1f70 t mcx_iff +ffffffff818f23b0 t mcx_alloc_uar +ffffffff818f25a0 t mcx_alloc_pd +ffffffff818f2780 t mcx_alloc_tdomain +ffffffff818f2960 t mcx_admin_intr +ffffffff818f2b10 t mcx_create_eq +ffffffff818f30b0 t mcx_query_nic_vport_context +ffffffff818f3460 t mcx_query_special_contexts +ffffffff818f3640 t mcx_set_port_mtu +ffffffff818f3750 t mcx_ioctl +ffffffff818f5a20 t mcx_start +ffffffff818f5f10 t mcx_watchdog +ffffffff818f5f40 t mcx_media_change +ffffffff818f6270 t mcx_media_status +ffffffff818f6410 t mcx_media_add_types +ffffffff818f6580 t mcx_refill +ffffffff818f65f0 t mcx_cq_intr +ffffffff818f6bd0 t mcx_calibrate +ffffffff818f6d70 t mcx_port_change +ffffffff818f6f70 t mcx_kstat_attach +ffffffff818f7340 t mcx_teardown_hca +ffffffff818f7530 t mcx_dmamem_free +ffffffff818f75a0 t mcx_set_issi +ffffffff818f7750 t mcx_set_flow_table_entry_mac +ffffffff818f7c20 t mcx_delete_flow_table_entry +ffffffff818f80a0 t mcx_access_hca_reg +ffffffff818f84d0 t mcx_cmdq_exec +ffffffff818f8750 t mcx_down +ffffffff818f9710 t mcx_create_flow_table +ffffffff818f9ac0 t mcx_create_flow_group +ffffffff818f9f90 t mcx_set_flow_table_root +ffffffff818fa310 t mcx_create_rqt +ffffffff818fa770 t mcx_create_tir_direct +ffffffff818faa90 t mcx_create_tir_indirect +ffffffff818fadd0 t mcx_set_flow_table_entry_proto +ffffffff818fb2b0 t mcx_ready_sq +ffffffff818fb640 t mcx_ready_rq +ffffffff818fb9d0 t mcx_calibrate_first +ffffffff818fbac0 t mcx_create_rq +ffffffff818fbfd0 t mcx_destroy_sq +ffffffff818fc280 t mcx_destroy_cq +ffffffff818fc540 t mcx_destroy_flow_table +ffffffff818fc8b0 t mcx_kstat_attach_ppcnt +ffffffff818fc9e0 t mcx_kstat_ppcnt_read +ffffffff818fcb00 t mcx_kstat_mtmp_read +ffffffff818fcc90 t mcx_kstat_queue_read +ffffffff818fdc40 t mcx_timecounter_read +ffffffff818fe000 t iavf_match +ffffffff818fe030 t iavf_attach +ffffffff818fe8a0 t iavf_reset +ffffffff818feb60 t iavf_dmamem_alloc +ffffffff818fecc0 t iavf_arq_fill +ffffffff818fef80 t iavf_arq_timeout +ffffffff818fefb0 t iavf_init_admin_queue +ffffffff818ff160 t iavf_get_version +ffffffff818ff360 t iavf_get_vf_resources +ffffffff818ff530 t iavf_config_irq_map +ffffffff818ff710 t iavf_intr +ffffffff818ffd90 t iavf_ioctl +ffffffff819002f0 t iavf_start +ffffffff81900650 t iavf_watchdog +ffffffff81900680 t iavf_media_change +ffffffff819006b0 t iavf_media_status +ffffffff81900740 t iavf_dmamem_free +ffffffff819007b0 t iavf_arq_unfill +ffffffff819008b0 t iavf_down +ffffffff81900c40 t iavf_up +ffffffff81901610 t iavf_queue_select +ffffffff81901800 t iavf_txr_free +ffffffff81901900 t iavf_rxr_free +ffffffff81901a10 t iavf_rxfill +ffffffff81901d20 t iavf_rxrefill +ffffffff81901d40 t iavf_process_arq +ffffffff819021c0 t iavf_add_del_addr +ffffffff81903000 T rge_match +ffffffff81903030 T rge_attach +ffffffff819034c0 T rge_activate +ffffffff81903600 T rge_intr +ffffffff819038f0 T rge_config_imtype +ffffffff81903960 T rge_chipinit +ffffffff81903a70 T rge_get_macaddr +ffffffff81903c40 T rge_allocmem +ffffffff81904040 T rge_ioctl +ffffffff819041f0 T rge_start +ffffffff819043d0 T rge_watchdog +ffffffff81904410 T rge_wol +ffffffff81904640 T rge_tick +ffffffff819046c0 T rge_txstart +ffffffff819046f0 T rge_ifmedia_upd +ffffffff81904cc0 T rge_ifmedia_sts +ffffffff81904db0 T rge_add_media_types +ffffffff81904e60 T rge_kstat_attach +ffffffff81905140 T rge_wol_power +ffffffff81905220 T rge_rxeof +ffffffff81905660 T rge_txeof +ffffffff81905870 T rge_init +ffffffff81906f20 T rge_setup_intr +ffffffff81907090 T rge_encap +ffffffff81907360 T rge_stop +ffffffff81907640 T rge_iff +ffffffff819077c0 T rge_set_macaddr +ffffffff81907890 T rge_rx_list_init +ffffffff81907950 T rge_tx_list_init +ffffffff81907a20 T rge_phy_config +ffffffff819086d0 T rge_disable_aspm_clkreq +ffffffff819087d0 T rge_read_csi +ffffffff81908880 T rge_write_csi +ffffffff81908950 T rge_write_mac_ocp +ffffffff819089a0 T rge_read_mac_ocp +ffffffff81908a20 T rge_hw_reset +ffffffff81908b20 T rge_write_phy_ocp +ffffffff81908be0 T rge_read_phy_ocp +ffffffff81908c90 T rge_read_phy +ffffffff81908d60 T rge_write_phy +ffffffff81908e40 T rge_get_link_status +ffffffff81908ea0 T rge_newbuf +ffffffff81909030 T rge_discard_rxbuf +ffffffff819090a0 T rge_fill_rx_ring +ffffffff81909120 T rge_reset +ffffffff81909390 T rge_exit_oob +ffffffff81909b90 T rge_set_phy_power +ffffffff81909df0 T rge_hw_init +ffffffff8190a540 T rge_ephy_config +ffffffff8190a590 T rge_ephy_config_mac_cfg3 +ffffffff8190a7e0 T rge_ephy_config_mac_cfg5 +ffffffff8190a8c0 T rge_write_ephy +ffffffff8190ab20 T rge_read_ephy +ffffffff8190ada0 T rge_phy_config_mac_cfg3 +ffffffff8190c8d0 T rge_phy_config_mac_cfg5 +ffffffff8190d420 T rge_patch_phy_mcu +ffffffff8190d740 T rge_phy_config_mcu +ffffffff8190df40 T rge_switch_mcu_ram_page +ffffffff8190dfd0 T rge_disable_phy_ocp_pwrsave +ffffffff8190e1a0 T rge_disable_hw_im +ffffffff8190e1d0 T rge_disable_sim_im +ffffffff8190e230 T rge_setup_sim_im +ffffffff8190e2b0 T rge_link_state +ffffffff8190e330 t rge_kstat_read +ffffffff8190e4d0 t rge_kstat_copy +ffffffff8190f000 T igc_match +ffffffff8190f030 T igc_attach +ffffffff8190f360 T igc_detach +ffffffff8190f550 T igc_identify_hardware +ffffffff8190f5c0 T igc_allocate_pci_resources +ffffffff8190f6e0 T igc_allocate_queues +ffffffff8190fbd0 T igc_is_valid_ether_addr +ffffffff8190fc30 T igc_allocate_msix +ffffffff8190fe70 T igc_setup_interface +ffffffff819100b0 T igc_reset +ffffffff819101f0 T igc_update_link_status +ffffffff81910310 T igc_get_hw_control +ffffffff81910370 T igc_kstat_attach +ffffffff81910530 T igc_release_hw_control +ffffffff81910590 T igc_free_pci_resources +ffffffff81910670 T igc_stop +ffffffff81910870 T igc_free_transmit_structures +ffffffff819108f0 T igc_free_receive_structures +ffffffff819109a0 T igc_setup_msix +ffffffff81910a30 T igc_dma_malloc +ffffffff81910b90 T igc_rxrefill +ffffffff81910c60 T igc_dma_free +ffffffff81910d10 T igc_init_dmac +ffffffff81910fb0 T igc_intr_queue +ffffffff819110c0 T igc_intr_link +ffffffff81911180 T igc_ioctl +ffffffff81911460 T igc_start +ffffffff81911830 T igc_watchdog +ffffffff81911860 T igc_media_change +ffffffff81911970 T igc_media_status +ffffffff81911ab0 T igc_init +ffffffff81911ef0 T igc_setup_transmit_structures +ffffffff81911fb0 T igc_initialize_transmit_unit +ffffffff819121d0 T igc_setup_receive_structures +ffffffff81912330 T igc_initialize_receive_unit +ffffffff81912720 T igc_iff +ffffffff81912870 T igc_configure_queues +ffffffff81912a80 T igc_rxfill +ffffffff81912bc0 T igc_enable_intr +ffffffff81912c90 T igc_tx_ctx_setup +ffffffff81912e90 T igc_txeof +ffffffff81913050 T igc_disable_intr +ffffffff819130f0 T igc_rxrinfo +ffffffff81913220 T igc_get_buf +ffffffff81913360 T igc_rxeof +ffffffff81913700 T igc_rx_checksum +ffffffff81913750 T igc_set_queues +ffffffff81913830 T igc_enable_queue +ffffffff81913860 T igc_allocate_transmit_buffers +ffffffff81913980 T igc_setup_transmit_ring +ffffffff81913ac0 T igc_free_transmit_buffers +ffffffff81913be0 T igc_allocate_receive_buffers +ffffffff81913d10 T igc_setup_receive_ring +ffffffff81913dd0 T igc_initialize_rss_mapping +ffffffff81913ff0 T igc_free_receive_buffers +ffffffff81914100 t igc_kstat_tick +ffffffff81914150 t igc_kstat_read +ffffffff819141a0 t igc_stat_read +ffffffff81915000 T igc_init_mac_params +ffffffff81915040 T igc_init_nvm_params +ffffffff81915080 T igc_init_phy_params +ffffffff819150c0 T igc_set_mac_type +ffffffff81915160 T igc_setup_init_funcs +ffffffff819152c0 T igc_update_mc_addr_list +ffffffff81915300 T igc_check_for_link +ffffffff81915340 T igc_reset_hw +ffffffff81915380 T igc_init_hw +ffffffff819153c0 T igc_get_speed_and_duplex +ffffffff81915400 T igc_rar_set +ffffffff81915440 T igc_check_reset_block +ffffffff81915480 T igc_get_phy_info +ffffffff819154c0 T igc_phy_hw_reset +ffffffff81915500 T igc_read_mac_addr +ffffffff81915530 T igc_validate_nvm_checksum +ffffffff81916000 T igc_acquire_phy_base +ffffffff81916030 T igc_release_phy_base +ffffffff81916060 T igc_init_hw_base +ffffffff81916150 T igc_power_down_phy_copper_base +ffffffff81917000 T igc_init_nvm_params_i225 +ffffffff81917170 T igc_acquire_nvm_i225 +ffffffff81917240 T igc_release_nvm_i225 +ffffffff819172b0 T igc_get_flash_presence_i225 +ffffffff81917300 T igc_read_nvm_srrd_i225 +ffffffff819173e0 T igc_write_nvm_srwr_i225 +ffffffff819175a0 T igc_validate_nvm_checksum_i225 +ffffffff81917630 T igc_update_nvm_checksum_i225 +ffffffff819177c0 T igc_init_mac_params_i225 +ffffffff81917880 T igc_reset_hw_i225 +ffffffff819179a0 T igc_init_hw_i225 +ffffffff819179b0 T igc_check_for_link_i225 +ffffffff81917a70 T igc_acquire_swfw_sync_i225 +ffffffff81917b50 T igc_release_swfw_sync_i225 +ffffffff81917bd0 T igc_setup_copper_link_i225 +ffffffff81917c60 T igc_init_phy_params_i225 +ffffffff81917d40 T igc_get_hw_semaphore_i225 +ffffffff81917ef0 T __igc_write_nvm_srwr +ffffffff81918020 T igc_update_flash_i225 +ffffffff819183f0 T igc_set_flsw_flash_burst_counter_i225 +ffffffff81918450 T igc_write_erase_flash_command_i225 +ffffffff81918550 T igc_pool_flash_update_done_i225 +ffffffff819185e0 T igc_set_ltr_i225 +ffffffff81918850 T igc_init_function_pointers_i225 +ffffffff819188c0 T igc_set_eee_i225 +ffffffff81919000 T igc_init_mac_ops_generic +ffffffff81919050 T igc_null_ops_generic +ffffffff81919080 T igc_config_collision_dist_generic +ffffffff819190f0 T igc_rar_set_generic +ffffffff819191d0 T igc_write_vfta_generic +ffffffff81919220 T igc_init_rx_addrs_generic +ffffffff819192c0 T igc_check_alt_mac_addr_generic +ffffffff81919440 T igc_hash_mc_addr_generic +ffffffff819194e0 T igc_update_mc_addr_list_generic +ffffffff81919630 T igc_clear_hw_cntrs_base_generic +ffffffff81919a20 T igc_setup_link_generic +ffffffff81919bb0 T igc_set_fc_watermarks_generic +ffffffff81919c60 T igc_force_mac_fc_generic +ffffffff81919d20 T igc_config_fc_after_link_up_generic +ffffffff81919eb0 T igc_get_speed_and_duplex_copper_generic +ffffffff81919f50 T igc_put_hw_semaphore_generic +ffffffff81919fa0 T igc_get_auto_rd_done_generic +ffffffff8191a1f0 T igc_disable_pcie_master_generic +ffffffff8191b000 T igc_init_nvm_ops_generic +ffffffff8191b080 T igc_null_read_nvm +ffffffff8191b0b0 T igc_null_nvm_generic +ffffffff8191b0e0 T igc_reload_nvm_generic +ffffffff8191b160 T igc_null_write_nvm +ffffffff8191b190 T igc_poll_eerd_eewr_done +ffffffff8191b230 T igc_read_nvm_eerd +ffffffff8191b360 T igc_read_mac_addr_generic +ffffffff8191b440 T igc_validate_nvm_checksum_generic +ffffffff8191c000 T igc_init_phy_ops_generic +ffffffff8191c0f0 T igc_null_set_page +ffffffff8191c120 T igc_null_read_reg +ffffffff8191c150 T igc_null_phy_generic +ffffffff8191c180 T igc_null_lplu_state +ffffffff8191c1b0 T igc_null_write_reg +ffffffff8191c1e0 T igc_check_reset_block_generic +ffffffff8191c240 T igc_get_phy_id +ffffffff8191c2f0 T igc_read_phy_reg_mdic +ffffffff8191c400 T igc_write_phy_reg_mdic +ffffffff8191c500 T igc_phy_setup_autoneg +ffffffff8191c700 T igc_copper_link_autoneg +ffffffff8191c830 T igc_wait_autoneg +ffffffff8191c8f0 T igc_setup_copper_link_generic +ffffffff8191ca00 T igc_phy_has_link_generic +ffffffff8191cb10 T igc_check_downshift_generic +ffffffff8191cb40 T igc_phy_hw_reset_generic +ffffffff8191cce0 T igc_power_up_phy_copper +ffffffff8191cd70 T igc_power_down_phy_copper +ffffffff8191ce00 T igc_write_phy_reg_gpy +ffffffff8191d000 T igc_write_xmdio_reg +ffffffff8191d100 T igc_read_phy_reg_gpy +ffffffff8191d300 T igc_read_xmdio_reg +ffffffff8191d3f0 T __igc_access_xmdio_reg +ffffffff8191e000 T ngbe_match +ffffffff8191e030 T ngbe_attach +ffffffff8191e540 T ngbe_detach +ffffffff8191e790 T ngbe_allocate_pci_resources +ffffffff8191e890 T ngbe_allocate_queues +ffffffff8191ed90 T ngbe_allocate_isb +ffffffff8191ee20 T ngbe_init_shared_code +ffffffff8191f0f0 T ngbe_check_flash_load +ffffffff8191f390 T ngbe_allocate_msix +ffffffff8191f5b0 T ngbe_setup_interface +ffffffff8191f7c0 T ngbe_free_isb +ffffffff8191f8a0 T ngbe_free_transmit_structures +ffffffff8191f920 T ngbe_free_receive_structures +ffffffff8191f9d0 T ngbe_free_pci_resources +ffffffff8191fa60 T ngbe_stop +ffffffff8191ffd0 T ngbe_release_hw_control +ffffffff81920050 T ngbe_init +ffffffff81920560 T ngbe_setup_isb +ffffffff819205d0 T ngbe_configure_pb +ffffffff819206b0 T ngbe_iff +ffffffff819208a0 T ngbe_setup_vlan_hw_support +ffffffff81920960 T ngbe_setup_transmit_structures +ffffffff81920a20 T ngbe_initialize_transmit_unit +ffffffff81920da0 T ngbe_setup_receive_structures +ffffffff81920ea0 T ngbe_initialize_receive_unit +ffffffff81921360 T ngbe_get_hw_control +ffffffff819213e0 T ngbe_setup_gpie +ffffffff81921410 T ngbe_configure_ivars +ffffffff81921630 T ngbe_non_sfp_link_config +ffffffff819216e0 T ngbe_enable_intr +ffffffff81921890 t NGBE_WRITE_REG_MASK +ffffffff81921930 T ngbe_ioctl +ffffffff81921b90 T ngbe_rxrinfo +ffffffff81921ce0 T ngbe_disable_intr +ffffffff81921da0 T ngbe_media_change +ffffffff81921e40 T ngbe_media_status +ffffffff81921f50 T ngbe_update_link_status +ffffffff81922180 T ngbe_rxfill +ffffffff819222c0 T ngbe_get_buf +ffffffff819223f0 T ngbe_start +ffffffff819225a0 T ngbe_encap +ffffffff819227c0 T ngbe_disable_pcie_master +ffffffff81922880 T ngbe_reset +ffffffff819228e0 T ngbe_set_rx_drop_en +ffffffff819229f0 T ngbe_watchdog +ffffffff81922ac0 T ngbe_setup_msix +ffffffff81922b50 T ngbe_intr_queue +ffffffff81922c50 T ngbe_intr_link +ffffffff81922d40 T ngbe_dma_malloc +ffffffff81922ea0 T ngbe_dma_free +ffffffff81922f50 T ngbe_rxrefill +ffffffff81923000 T ngbe_free_receive_buffers +ffffffff81923110 T ngbe_free_transmit_buffers +ffffffff81923230 T ngbe_allocate_receive_buffers +ffffffff81923360 T ngbe_allocate_transmit_buffers +ffffffff81923480 T ngbe_setup_receive_ring +ffffffff81923570 T ngbe_setup_transmit_ring +ffffffff819236b0 T ngbe_addr_list_itr +ffffffff819236f0 T ngbe_setup_psrtype +ffffffff81923720 T ngbe_initialize_rss_mapping +ffffffff81923940 T ngbe_handle_phy_event +ffffffff819239e0 T ngbe_enable_queue +ffffffff81923a40 T ngbe_rxeof +ffffffff81923db0 T ngbe_txeof +ffffffff81923f50 T ngbe_init_eeprom_params +ffffffff81923fd0 T ngbe_init_hw +ffffffff81924040 T ngbe_init_ops +ffffffff81924250 T ngbe_phy_reset +ffffffff819243d0 T ngbe_phy_read_reg +ffffffff81924470 T ngbe_phy_write_reg +ffffffff81924510 T ngbe_phy_setup_link +ffffffff81924770 T ngbe_phy_led_ctrl +ffffffff81924860 T ngbe_phy_check_overtemp +ffffffff819248b0 T ngbe_phy_identify +ffffffff819248f0 T ngbe_phy_init +ffffffff81924b10 T ngbe_phy_check_event +ffffffff81924b70 T ngbe_phy_get_advertised_pause +ffffffff81924bd0 T ngbe_phy_get_lp_advertised_pause +ffffffff81924c80 T ngbe_phy_set_pause_advertisement +ffffffff81924d00 T ngbe_phy_setup +ffffffff81924e90 T ngbe_clear_hw_cntrs +ffffffff819250d0 T ngbe_get_mac_addr +ffffffff81925180 T ngbe_stop_adapter +ffffffff819253c0 T ngbe_get_bus_info +ffffffff81925470 T ngbe_set_lan_id_multi_port_pcie +ffffffff819254d0 T ngbe_acquire_swfw_sync +ffffffff81925730 T ngbe_release_swfw_sync +ffffffff81925870 T ngbe_reset_hw +ffffffff81925ab0 T ngbe_get_media_type +ffffffff81925ae0 T ngbe_disable_sec_rx_path +ffffffff81925ba0 T ngbe_enable_sec_rx_path +ffffffff81925c10 T ngbe_enable_rx_dma +ffffffff81925c60 T ngbe_start_hw +ffffffff81925d20 T ngbe_set_rar +ffffffff81925e70 T ngbe_init_rx_addrs +ffffffff81926030 T ngbe_update_mc_addr_list +ffffffff819261e0 T ngbe_enable_rx +ffffffff81926320 T ngbe_disable_rx +ffffffff81926440 T ngbe_clear_vfta +ffffffff81926540 T ngbe_init_uta_tables +ffffffff819265c0 T ngbe_fc_enable +ffffffff81926860 T ngbe_setup_fc +ffffffff81926940 T ngbe_check_mac_link +ffffffff81926ab0 T ngbe_set_rxpba +ffffffff81926b50 T ngbe_eepromcheck_cap +ffffffff81926c10 T ngbe_phy_led_oem_chk +ffffffff81926d00 T ngbe_set_fw_drv_ver +ffffffff81926e20 T ngbe_init_thermal_sensor_thresh +ffffffff81926ee0 T ngbe_validate_mac_addr +ffffffff81926f40 T ngbe_fc_autoneg +ffffffff819270d0 T ngbe_fc_autoneg_copper +ffffffff819271e0 T ngbe_negotiate_fc +ffffffff81927290 T ngbe_fmgr_cmd_op +ffffffff81927370 T ngbe_flash_read_dword +ffffffff81927460 T ngbe_calculate_checksum +ffffffff81927520 T ngbe_check_internal_phy_id +ffffffff81927660 T ngbe_gphy_wait_mdio_access_on +ffffffff819276e0 T ngbe_check_mng_access +ffffffff81927730 T ngbe_mng_present +ffffffff81927780 T ngbe_check_reset_blocked +ffffffff81927800 T ngbe_set_ivar +ffffffff819278f0 T ngbe_pbthresh_setup +ffffffff819279b0 T ngbe_disable_queue +ffffffff81927a10 T ngbe_host_interface_command +ffffffff81927de0 T ngbe_tx_ctx_setup +ffffffff81927e70 T ngbe_read_pci_cfg_word +ffffffff81927ed0 T ngbe_set_pci_config_data +ffffffff81927f60 T ngbe_get_copper_link_capabilities +ffffffff81927fb0 T ngbe_get_eeprom_semaphore +ffffffff81928110 T ngbe_release_eeprom_semaphore +ffffffff819281c0 T ngbe_gphy_dis_eee +ffffffff819282e0 T ngbe_gphy_efuse_calibration +ffffffff81928690 T ngbe_hpbthresh +ffffffff81928720 T ngbe_lpbthresh +ffffffff81928760 T ngbe_mta_vector +ffffffff819287b0 T ngbe_setup_copper_link +ffffffff81928800 T ngbe_reset_misc +ffffffff81928b60 T ngbe_set_mta +ffffffff81928bd0 T ngbe_rx_checksum +ffffffff81929000 T com_pci_match +ffffffff81929030 T com_pci_attach +ffffffff81929310 T com_pci_detach +ffffffff819293b0 T com_pci_activate +ffffffff819294a0 T com_pci_intr_designware +ffffffff8192a000 T agpdev_print +ffffffff8192a050 T agpbus_probe +ffffffff8192a0c0 T agpvga_match +ffffffff8192a130 T agp_attach_bus +ffffffff8192a1b0 T agp_probe +ffffffff8192a1e0 T agp_attach +ffffffff8192a300 T agp_alloc_gatt +ffffffff8192a4c0 T agp_alloc_dmamem +ffffffff8192a5f0 T agp_free_dmamem +ffffffff8192a650 T agp_free_gatt +ffffffff8192a6d0 T agp_generic_enable +ffffffff8192a860 T agp_find_device +ffffffff8192a8b0 T agp_state +ffffffff8192a8e0 T agp_get_info +ffffffff8192a980 T agp_acquire +ffffffff8192a9d0 T agp_release +ffffffff8192aa20 T agp_enable +ffffffff8192aa50 T agp_mmap +ffffffff8192b000 T agp_i810_probe +ffffffff8192b060 T agp_i810_attach +ffffffff8192b570 T agp_i810_activate +ffffffff8192b5b0 T agp_i810_bind_page +ffffffff8192b670 T agp_i810_unbind_page +ffffffff8192b730 T agp_i810_flush_tlb +ffffffff8192b760 T agp_i810_enable +ffffffff8192b790 T agp_i810_get_chiptype +ffffffff8192ba00 T intagp_gmch_match +ffffffff8192ba60 T agp_i810_configure +ffffffff8192bba0 T intagp_write_gtt +ffffffff8192c000 T dma_resv_init +ffffffff8192c060 T dma_resv_fini +ffffffff8192c160 T dma_resv_reserve_fences +ffffffff8192c320 T dma_resv_add_fence +ffffffff8192c4a0 T dma_resv_replace_fences +ffffffff8192c550 T dma_resv_iter_first_unlocked +ffffffff8192c5e0 t dma_resv_iter_walk_unlocked +ffffffff8192c6d0 T dma_resv_iter_next_unlocked +ffffffff8192c760 T dma_resv_iter_first +ffffffff8192c7f0 T dma_resv_iter_next +ffffffff8192c870 T dma_resv_copy_fences +ffffffff8192cc00 T dma_resv_get_fences +ffffffff8192cff0 T dma_resv_get_singleton +ffffffff8192d0f0 T dma_resv_wait_timeout +ffffffff8192d360 T dma_resv_test_signaled +ffffffff8192d4b0 T dma_resv_describe +ffffffff8192e000 T drm_legacy_agp_info +ffffffff8192e0b0 T drm_legacy_agp_acquire +ffffffff8192e120 T drm_legacy_agp_release +ffffffff8192e180 T drm_legacy_agp_enable +ffffffff8192e1f0 T drm_legacy_agp_takedown +ffffffff8192e260 T drm_legacy_agp_init +ffffffff8192f000 T devm_aperture_acquire_from_firmware +ffffffff8192f050 T drm_aperture_remove_conflicting_framebuffers +ffffffff8192f080 T drm_aperture_remove_conflicting_pci_framebuffers +ffffffff81930000 T __drm_crtc_commit_free +ffffffff81930020 T drm_crtc_commit_wait +ffffffff819301c0 T drm_atomic_state_default_release +ffffffff81930220 T drm_atomic_state_init +ffffffff81930340 T drm_atomic_state_alloc +ffffffff819303e0 T drm_atomic_state_default_clear +ffffffff819306e0 T drm_atomic_state_clear +ffffffff81930710 T __drm_atomic_state_free +ffffffff819307e0 T drm_atomic_get_crtc_state +ffffffff81930930 T drm_atomic_get_plane_state +ffffffff81930b20 T drm_atomic_private_obj_init +ffffffff81930c10 T drm_atomic_private_obj_fini +ffffffff81930ca0 T drm_atomic_get_private_obj_state +ffffffff81930e50 T drm_atomic_get_old_private_obj_state +ffffffff81930eb0 T drm_atomic_get_new_private_obj_state +ffffffff81930f10 T drm_atomic_get_old_connector_for_encoder +ffffffff81930f80 T drm_atomic_get_new_connector_for_encoder +ffffffff81930ff0 T drm_atomic_get_old_crtc_for_encoder +ffffffff81931090 T drm_atomic_get_new_crtc_for_encoder +ffffffff81931130 T drm_atomic_get_connector_state +ffffffff81931340 T drm_atomic_get_bridge_state +ffffffff81931350 T drm_atomic_get_old_bridge_state +ffffffff819313b0 T drm_atomic_get_new_bridge_state +ffffffff81931410 T drm_atomic_add_encoder_bridges +ffffffff819314d0 T drm_atomic_add_affected_connectors +ffffffff819315f0 T drm_atomic_add_affected_planes +ffffffff81931710 T drm_atomic_check_only +ffffffff819321d0 T drm_atomic_commit +ffffffff819322a0 T drm_atomic_print_new_state +ffffffff81932490 T drm_atomic_nonblocking_commit +ffffffff81932530 T __drm_atomic_helper_disable_plane +ffffffff819325b0 T __drm_atomic_helper_set_config +ffffffff81932920 t drm_atomic_plane_print_state +ffffffff81932b40 t drm_atomic_crtc_print_state +ffffffff81932da0 t drm_atomic_connector_print_state +ffffffff81932ed0 T drm_state_dump +ffffffff81934000 T drm_atomic_helper_check_modeset +ffffffff81934cd0 t handle_conflicting_encoders +ffffffff81934fd0 t mode_fixup +ffffffff81935310 T drm_atomic_helper_check_wb_encoder_state +ffffffff81935370 T drm_atomic_helper_check_plane_state +ffffffff81935730 T drm_atomic_helper_check_crtc_primary_plane +ffffffff819357e0 T drm_atomic_helper_check_planes +ffffffff81935a90 T drm_atomic_helper_check +ffffffff81935b40 T drm_atomic_helper_async_check +ffffffff81935e10 T drm_atomic_helper_update_legacy_modeset_state +ffffffff81936080 T drm_atomic_helper_calc_timestamping_constants +ffffffff81936120 T drm_atomic_helper_commit_modeset_disables +ffffffff81936780 T drm_atomic_helper_commit_modeset_enables +ffffffff81936a50 T drm_atomic_helper_wait_for_fences +ffffffff81936c30 T drm_atomic_helper_wait_for_vblanks +ffffffff81936f80 T drm_atomic_helper_wait_for_flip_done +ffffffff81937140 T drm_atomic_helper_commit_tail +ffffffff819372b0 T drm_atomic_helper_commit_planes +ffffffff81937620 T drm_atomic_helper_fake_vblank +ffffffff81937700 T drm_atomic_helper_commit_hw_done +ffffffff819378d0 T drm_atomic_helper_cleanup_planes +ffffffff81937970 T drm_atomic_helper_commit_tail_rpm +ffffffff81937ae0 t try_wait_for_completion +ffffffff81937b40 T drm_atomic_helper_async_commit +ffffffff81937dd0 T drm_atomic_helper_commit +ffffffff81938050 T drm_atomic_helper_prepare_planes +ffffffff819382f0 T drm_atomic_helper_unprepare_planes +ffffffff819383e0 T drm_atomic_helper_setup_commit +ffffffff81938ac0 t commit_work +ffffffff81938ae0 T drm_atomic_helper_swap_state +ffffffff81939130 t commit_tail +ffffffff81939350 t release_crtc_commit +ffffffff81939390 t crtc_or_fake_commit +ffffffff81939490 T drm_atomic_helper_wait_for_dependencies +ffffffff81939690 T drm_atomic_helper_commit_cleanup_done +ffffffff819398f0 T drm_atomic_helper_commit_planes_on_crtc +ffffffff81939b70 T drm_atomic_helper_disable_planes_on_crtc +ffffffff81939cd0 T drm_atomic_helper_update_plane +ffffffff81939e00 T drm_atomic_helper_disable_plane +ffffffff81939ec0 T drm_atomic_helper_set_config +ffffffff81939f70 T drm_atomic_helper_disable_all +ffffffff8193a120 T drm_atomic_helper_shutdown +ffffffff8193a270 T drm_atomic_helper_duplicate_state +ffffffff8193a3c0 T drm_atomic_helper_suspend +ffffffff8193a510 T drm_atomic_helper_commit_duplicated_state +ffffffff8193a650 T drm_atomic_helper_resume +ffffffff8193a780 T drm_atomic_helper_page_flip +ffffffff8193a840 t page_flip_common +ffffffff8193a940 T drm_atomic_helper_page_flip_target +ffffffff8193aa60 T drm_atomic_helper_bridge_propagate_bus_fmt +ffffffff8193aad0 t set_best_encoder +ffffffff8193b000 T __drm_atomic_helper_crtc_state_reset +ffffffff8193b030 T __drm_atomic_helper_crtc_reset +ffffffff8193b090 T drm_atomic_helper_crtc_reset +ffffffff8193b130 T __drm_atomic_helper_crtc_duplicate_state +ffffffff8193b200 T drm_atomic_helper_crtc_duplicate_state +ffffffff8193b2a0 T __drm_atomic_helper_crtc_destroy_state +ffffffff8193b360 T drm_atomic_helper_crtc_destroy_state +ffffffff8193b390 T __drm_atomic_helper_plane_state_reset +ffffffff8193b460 T __drm_atomic_helper_plane_reset +ffffffff8193b4c0 T drm_atomic_helper_plane_reset +ffffffff8193b5a0 T __drm_atomic_helper_plane_destroy_state +ffffffff8193b610 T __drm_atomic_helper_plane_duplicate_state +ffffffff8193b690 T drm_atomic_helper_plane_duplicate_state +ffffffff8193b770 T drm_atomic_helper_plane_destroy_state +ffffffff8193b7f0 T __drm_atomic_helper_connector_state_reset +ffffffff8193b820 T __drm_atomic_helper_connector_reset +ffffffff8193b860 T drm_atomic_helper_connector_reset +ffffffff8193b930 T __drm_atomic_helper_connector_destroy_state +ffffffff8193b990 T drm_atomic_helper_connector_tv_margins_reset +ffffffff8193b9f0 T drm_atomic_helper_connector_tv_reset +ffffffff8193bbf0 T drm_atomic_helper_connector_tv_check +ffffffff8193bcd0 T __drm_atomic_helper_connector_duplicate_state +ffffffff8193bd60 T drm_atomic_helper_connector_duplicate_state +ffffffff8193be40 T drm_atomic_helper_connector_destroy_state +ffffffff8193beb0 T __drm_atomic_helper_private_obj_duplicate_state +ffffffff8193bef0 T __drm_atomic_helper_bridge_duplicate_state +ffffffff8193bf30 T drm_atomic_helper_bridge_duplicate_state +ffffffff8193bfe0 T drm_atomic_helper_bridge_destroy_state +ffffffff8193c000 T __drm_atomic_helper_bridge_reset +ffffffff8193c050 T drm_atomic_helper_bridge_reset +ffffffff8193d000 T drm_atomic_set_mode_for_crtc +ffffffff8193d220 T drm_atomic_set_mode_prop_for_crtc +ffffffff8193d4b0 T drm_atomic_set_crtc_for_plane +ffffffff8193d620 T drm_atomic_set_fb_for_plane +ffffffff8193d700 T drm_atomic_set_crtc_for_connector +ffffffff8193d860 T drm_atomic_get_property +ffffffff8193dfc0 T drm_atomic_connector_commit_dpms +ffffffff8193e100 T drm_atomic_set_property +ffffffff8193ec00 T drm_mode_atomic_ioctl +ffffffff8193f0a0 t prepare_signaling +ffffffff8193f530 t complete_signaling +ffffffff8193f700 t drm_atomic_replace_property_blob_from_id +ffffffff8193f870 t drm_atomic_set_writeback_fb_for_connector +ffffffff8193f8e0 t set_out_fence_for_connector +ffffffff81940000 T drm_is_current_master +ffffffff81940060 T drm_getmagic +ffffffff81940130 T drm_authmagic +ffffffff819401f0 T drm_master_create +ffffffff81940290 T drm_setmaster_ioctl +ffffffff81940350 t drm_new_set_master +ffffffff819404e0 T drm_dropmaster_ioctl +ffffffff819405c0 t drm_drop_master +ffffffff81940670 T drm_master_open +ffffffff81940720 T drm_master_get +ffffffff81940750 T drm_master_release +ffffffff81940830 T drm_master_put +ffffffff819408c0 T drm_file_get_master +ffffffff81940920 T drm_master_internal_acquire +ffffffff81940990 T drm_master_internal_release +ffffffff81941000 T drm_plane_create_alpha_property +ffffffff819410a0 T drm_plane_create_rotation_property +ffffffff819411e0 T drm_rotation_simplify +ffffffff81941250 T drm_plane_create_zpos_property +ffffffff81941310 T drm_plane_create_zpos_immutable_property +ffffffff819413c0 T drm_atomic_normalize_zpos +ffffffff819416b0 T drm_plane_create_blend_mode_property +ffffffff81941850 t drm_atomic_state_zpos_cmp +ffffffff81942000 T drm_bridge_add +ffffffff81942070 T devm_drm_bridge_add +ffffffff81942110 T drm_bridge_remove +ffffffff81942170 T drm_bridge_attach +ffffffff81942330 T drm_bridge_detach +ffffffff81942420 T drm_bridge_chain_mode_fixup +ffffffff819424c0 T drm_bridge_chain_mode_valid +ffffffff81942560 T drm_bridge_chain_mode_set +ffffffff819425f0 T drm_atomic_bridge_chain_disable +ffffffff819426f0 T drm_atomic_bridge_chain_post_disable +ffffffff81942920 T drm_atomic_bridge_chain_pre_enable +ffffffff81942b60 T drm_atomic_bridge_chain_enable +ffffffff81942c70 T drm_atomic_bridge_chain_check +ffffffff81943000 T drm_bridge_detect +ffffffff81943060 T drm_bridge_get_modes +ffffffff819430c0 T drm_bridge_edid_read +ffffffff81943180 T drm_bridge_get_edid +ffffffff819431e0 T drm_bridge_hpd_enable +ffffffff819432b0 T drm_bridge_hpd_disable +ffffffff81943350 T drm_bridge_hpd_notify +ffffffff819433b0 t drm_bridge_atomic_duplicate_priv_state +ffffffff819433d0 t drm_bridge_atomic_destroy_priv_state +ffffffff819433f0 t select_bus_fmt_recursive +ffffffff81944000 T drm_buddy_init +ffffffff81944470 T drm_buddy_fini +ffffffff81944560 T drm_get_buddy +ffffffff819445a0 T drm_buddy_free_block +ffffffff819445f0 t __drm_buddy_free +ffffffff81944740 T drm_buddy_free_list +ffffffff81944800 T drm_buddy_block_trim +ffffffff81944a60 t __alloc_range +ffffffff81944d40 T drm_buddy_alloc_blocks +ffffffff819453c0 t __drm_buddy_alloc_range +ffffffff81945450 T drm_buddy_block_print +ffffffff81945490 T drm_buddy_print +ffffffff81945600 T drm_buddy_module_exit +ffffffff81945620 T drm_buddy_module_init +ffffffff81945680 t split_block +ffffffff81946000 T drm_clflush_pages +ffffffff819460e0 T drm_clflush_sg +ffffffff819461f0 T drm_clflush_virt_range +ffffffff81946290 T drm_need_swiotlb +ffffffff819462c0 T drm_memcpy_from_wc +ffffffff81946760 T drm_memcpy_init_early +ffffffff81947000 T drm_client_init +ffffffff81947110 T drm_client_register +ffffffff819471c0 T drm_client_release +ffffffff81947260 T drm_client_dev_unregister +ffffffff81947350 T drm_client_dev_hotplug +ffffffff81947480 T drm_client_dev_restore +ffffffff81947560 T drm_client_buffer_vmap +ffffffff819475d0 T drm_client_buffer_vunmap +ffffffff819475f0 T drm_client_framebuffer_create +ffffffff81947890 T drm_client_framebuffer_delete +ffffffff81947980 T drm_client_framebuffer_flush +ffffffff81948000 T drm_client_modeset_create +ffffffff81948140 T drm_client_modeset_free +ffffffff81948240 T drm_client_modeset_probe +ffffffff819499a0 t drm_client_pick_crtcs +ffffffff81949c80 T drm_client_rotation +ffffffff81949e20 T drm_client_modeset_check +ffffffff81949ec0 t drm_client_modeset_commit_atomic +ffffffff8194a0c0 T drm_client_modeset_commit_locked +ffffffff8194a260 T drm_client_modeset_commit +ffffffff8194a2d0 T drm_client_modeset_dpms +ffffffff8194a520 t drm_connector_pick_cmdline_mode +ffffffff8194b000 T drm_color_ctm_s31_32_to_qm_n +ffffffff8194b0d0 T drm_crtc_enable_color_mgmt +ffffffff8194b1b0 T drm_mode_crtc_set_gamma_size +ffffffff8194b2d0 T drm_mode_gamma_set_ioctl +ffffffff8194b7b0 T drm_mode_gamma_get_ioctl +ffffffff8194b8f0 T drm_get_color_encoding_name +ffffffff8194b960 T drm_get_color_range_name +ffffffff8194b9d0 T drm_plane_create_color_properties +ffffffff8194bc30 T drm_color_lut_check +ffffffff8194c000 T drm_connector_ida_init +ffffffff8194c110 T drm_connector_ida_destroy +ffffffff8194c220 T drm_get_connector_type_name +ffffffff8194c260 T drm_connector_free_work_fn +ffffffff8194c320 T drm_connector_init +ffffffff8194c3a0 t __drm_connector_init +ffffffff8194c710 T drm_connector_init_with_ddc +ffffffff8194c7a0 T drmm_connector_init +ffffffff8194c860 t drm_connector_cleanup_action +ffffffff8194c880 T drm_connector_attach_edid_property +ffffffff8194c8a0 T drm_connector_attach_encoder +ffffffff8194c920 T drm_connector_has_possible_encoder +ffffffff8194c960 T drm_connector_cleanup +ffffffff8194cca0 T drm_connector_unregister +ffffffff8194cd40 T drm_mode_put_tile_group +ffffffff8194cdd0 T drm_connector_register +ffffffff8194cec0 T drm_connector_unregister_all +ffffffff8194d060 T drm_connector_list_iter_begin +ffffffff8194d0a0 T drm_connector_list_iter_next +ffffffff8194d1b0 T drm_connector_list_iter_end +ffffffff8194d280 T drm_connector_register_all +ffffffff8194d410 T drm_get_connector_status_name +ffffffff8194d460 T drm_get_connector_force_name +ffffffff8194d4a0 T drm_get_subpixel_order_name +ffffffff8194d4e0 T drm_get_dpms_name +ffffffff8194d520 T drm_display_info_set_bus_formats +ffffffff8194d5f0 T drm_get_dvi_i_select_name +ffffffff8194d650 T drm_get_dvi_i_subconnector_name +ffffffff8194d6b0 T drm_get_tv_mode_name +ffffffff8194d6f0 T drm_get_tv_mode_from_name +ffffffff8194d890 T drm_get_tv_select_name +ffffffff8194d8f0 T drm_get_tv_subconnector_name +ffffffff8194d950 T drm_get_dp_subconnector_name +ffffffff8194d9e0 T drm_get_colorspace_name +ffffffff8194da20 T drm_connector_create_standard_properties +ffffffff8194dba0 T drm_mode_create_dvi_i_properties +ffffffff8194dc40 T drm_connector_attach_dp_subconnector_property +ffffffff8194dcb0 T drm_connector_attach_content_type_property +ffffffff8194dd50 T drm_mode_create_content_type_property +ffffffff8194ddd0 T drm_connector_attach_tv_margin_properties +ffffffff8194de40 T drm_mode_create_tv_margin_properties +ffffffff8194df60 T drm_mode_create_tv_properties_legacy +ffffffff8194e1b0 T drm_mode_create_tv_properties +ffffffff8194e390 T drm_mode_create_scaling_mode_property +ffffffff8194e400 T drm_connector_attach_vrr_capable_property +ffffffff8194e490 T drm_connector_attach_scaling_mode_property +ffffffff8194e660 T drm_mode_create_aspect_ratio_property +ffffffff8194e6e0 T drm_mode_create_hdmi_colorspace_property +ffffffff8194e700 t drm_mode_create_colorspace_property +ffffffff8194e840 T drm_mode_create_dp_colorspace_property +ffffffff8194e870 T drm_mode_create_suggested_offset_properties +ffffffff8194e940 T drm_connector_set_path_property +ffffffff8194e9a0 T drm_connector_set_tile_property +ffffffff8194eaf0 T drm_connector_set_link_status_property +ffffffff8194eb40 T drm_connector_attach_max_bpc_property +ffffffff8194ec00 T drm_connector_attach_hdr_output_metadata_property +ffffffff8194ec50 T drm_connector_attach_colorspace_property +ffffffff8194eca0 T drm_connector_atomic_hdr_metadata_equal +ffffffff8194ed10 T drm_connector_set_vrr_capable_property +ffffffff8194ed60 T drm_connector_set_panel_orientation +ffffffff8194ee30 T drm_connector_set_panel_orientation_with_quirk +ffffffff8194ef10 T drm_connector_set_orientation_from_panel +ffffffff8194f000 T drm_connector_create_privacy_screen_properties +ffffffff8194f0a0 T drm_connector_attach_privacy_screen_properties +ffffffff8194f110 T drm_connector_attach_privacy_screen_provider +ffffffff8194f220 t drm_connector_privacy_screen_notifier +ffffffff8194f2c0 T drm_connector_update_privacy_screen +ffffffff8194f330 T drm_connector_set_obj_prop +ffffffff8194f410 T drm_connector_property_set_ioctl +ffffffff8194f470 T drm_mode_getconnector +ffffffff8194f970 T drm_connector_find_by_fwnode +ffffffff8194fa20 T drm_connector_oob_hotplug_event +ffffffff8194fb10 T drm_mode_get_tile_group +ffffffff8194fbe0 T drm_mode_create_tile_group +ffffffff8194fcb0 t drm_connector_free +ffffffff8194fcf0 t kasprintf +ffffffff81950000 T drm_crtc_from_index +ffffffff81950060 T drm_crtc_force_disable +ffffffff819501a0 T drm_mode_set_config_internal +ffffffff81950220 T drm_crtc_register_all +ffffffff819502a0 T drm_crtc_unregister_all +ffffffff81950310 T drm_crtc_create_fence +ffffffff819503a0 T drm_crtc_init_with_planes +ffffffff81950470 t __drm_crtc_init_with_planes +ffffffff81950870 T drmm_crtc_init_with_planes +ffffffff81950970 T __drmm_crtc_alloc_with_planes +ffffffff81950ae0 T drm_crtc_cleanup +ffffffff81950c00 T drm_mode_getcrtc +ffffffff81950da0 t __drm_mode_set_config_internal +ffffffff81950f50 T drm_crtc_check_viewport +ffffffff81951000 T drm_mode_setcrtc +ffffffff81951780 T drm_mode_crtc_set_obj_prop +ffffffff81951800 T drm_crtc_create_scaling_filter_property +ffffffff81951870 t drm_crtc_fence_get_driver_name +ffffffff819518f0 t drm_crtc_fence_get_timeline_name +ffffffff81951960 t kasprintf +ffffffff81951a30 t drmm_crtc_init_with_planes_cleanup +ffffffff81952000 T drm_helper_encoder_in_use +ffffffff81952180 T drm_helper_crtc_in_use +ffffffff819522b0 T drm_helper_disable_unused_functions +ffffffff81952330 t __drm_helper_disable_unused_functions +ffffffff81952450 T drm_crtc_helper_set_mode +ffffffff819528f0 T drm_crtc_helper_atomic_check +ffffffff81952940 T drm_connector_get_single_encoder +ffffffff81952a20 T drm_crtc_helper_set_config +ffffffff81953660 T drm_helper_connector_dpms +ffffffff81953930 T drm_helper_resume_force_mode +ffffffff81953c30 T drm_helper_force_disable_all +ffffffff81954000 T drm_atomic_helper_check_plane_damage +ffffffff819540a0 T drm_atomic_helper_dirtyfb +ffffffff81954350 T drm_atomic_helper_damage_iter_init +ffffffff819544a0 T drm_atomic_helper_damage_iter_next +ffffffff81954540 T drm_atomic_helper_damage_merged +ffffffff81955000 T displayid_iter_edid_begin +ffffffff81955050 T __displayid_iter_next +ffffffff81955300 T displayid_iter_end +ffffffff81955350 T displayid_version +ffffffff81955380 T displayid_primary_use +ffffffff81956000 T drm_mode_create_dumb +ffffffff819560e0 T drm_mode_create_dumb_ioctl +ffffffff819561c0 T drm_mode_mmap_dumb_ioctl +ffffffff81956230 T drm_mode_destroy_dumb +ffffffff81956280 T drm_mode_destroy_dumb_ioctl +ffffffff81957000 T drm_edid_header_is_valid +ffffffff81957080 T drm_edid_are_equal +ffffffff819570f0 T drm_edid_block_valid +ffffffff81957300 t edid_block_check +ffffffff81957430 t edid_block_status_print +ffffffff81957520 T drm_edid_is_valid +ffffffff819575a0 T drm_edid_valid +ffffffff819576d0 t drm_edid_block_count +ffffffff81957810 T drm_edid_override_show +ffffffff81957860 T drm_edid_override_set +ffffffff81957a00 T drm_edid_alloc +ffffffff81957ac0 T drm_edid_free +ffffffff81957b20 T drm_edid_override_reset +ffffffff81957be0 T drm_edid_override_connector_update +ffffffff81957cb0 t drm_edid_override_get +ffffffff81957da0 T drm_edid_connector_update +ffffffff819581f0 T drm_edid_connector_add_modes +ffffffff81958310 T drm_do_get_edid +ffffffff81958330 t _drm_do_get_edid +ffffffff81958750 T drm_edid_raw +ffffffff819587e0 T drm_edid_dup +ffffffff819588b0 T drm_probe_ddc +ffffffff819589b0 t drm_do_probe_ddc_edid +ffffffff81958b00 T drm_get_edid +ffffffff81958c70 T drm_connector_update_edid_property +ffffffff81958cd0 T drm_edid_read_custom +ffffffff81958dc0 T drm_edid_read_ddc +ffffffff81958ef0 T drm_edid_read +ffffffff81958f70 T drm_edid_get_panel_id +ffffffff819590f0 t edid_block_read +ffffffff81959360 T drm_get_edid_switcheroo +ffffffff819593b0 T drm_edid_read_switcheroo +ffffffff81959400 T drm_edid_duplicate +ffffffff81959480 T drm_mode_find_dmt +ffffffff819595a0 T drm_mode_fixup_1366x768 +ffffffff819595f0 T drm_find_edid_extension +ffffffff81959690 T drm_match_cea_mode +ffffffff81959910 T drm_display_mode_from_cea_vic +ffffffff81959980 T drm_edid_get_monitor_name +ffffffff81959a20 t get_monitor_name +ffffffff81959e80 T drm_edid_to_sad +ffffffff8195a080 T drm_edid_to_speaker_allocation +ffffffff8195a230 T drm_av_sync_delay +ffffffff8195a2e0 T drm_detect_hdmi_monitor +ffffffff8195a400 T drm_detect_monitor_audio +ffffffff8195a590 T drm_default_rgb_quant_range +ffffffff8195a5d0 t update_display_info +ffffffff8195bd90 t _drm_edid_connector_add_modes +ffffffff8195d330 T drm_add_edid_modes +ffffffff8195d430 T drm_add_modes_noedid +ffffffff8195d520 T drm_set_preferred_mode +ffffffff8195d580 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff8195d840 T drm_hdmi_avi_infoframe_quant_range +ffffffff8195d8e0 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff8195d9a0 t connector_bad_edid +ffffffff8195db60 t edid_filter_invalid_blocks +ffffffff8195dcf0 t drm_for_each_detailed_block +ffffffff8195de90 t __cea_db_iter_next +ffffffff8195e0a0 t get_monitor_range +ffffffff8195e140 t do_detailed_mode +ffffffff8195eb50 t do_cvt_mode +ffffffff8195ed90 t drm_mode_std +ffffffff8195f770 t do_standard_modes +ffffffff8195f8b0 t drm_monitor_supports_rb +ffffffff8195fcc0 t drm_gtf2_mode +ffffffff81960a70 t drm_gtf2_hbreak +ffffffff81960de0 t do_established_modes +ffffffff81960fe0 t drm_match_hdmi_mode +ffffffff81961160 t do_inferred_modes +ffffffff81961820 t mode_in_range +ffffffff81962000 T drm_encoder_register_all +ffffffff81962080 T drm_encoder_unregister_all +ffffffff819620f0 T drm_encoder_init +ffffffff819621c0 t __drm_encoder_init +ffffffff81962380 T drm_encoder_cleanup +ffffffff819624b0 T __drmm_encoder_alloc +ffffffff819625d0 T drmm_encoder_init +ffffffff819626b0 T drm_mode_getencoder +ffffffff81962830 t kasprintf +ffffffff81962900 t drmm_encoder_alloc_release +ffffffff81963000 T drm_i2c_encoder_dpms +ffffffff81963020 T drm_i2c_encoder_mode_fixup +ffffffff81963060 T drm_i2c_encoder_prepare +ffffffff81963080 T drm_i2c_encoder_commit +ffffffff819630a0 T drm_i2c_encoder_mode_set +ffffffff819630c0 T drm_i2c_encoder_detect +ffffffff819630e0 T drm_i2c_encoder_save +ffffffff81963100 T drm_i2c_encoder_restore +ffffffff81964000 T drm_exec_init +ffffffff81964080 T drm_exec_fini +ffffffff81964100 t drm_exec_unlock_all +ffffffff81964280 T drm_exec_cleanup +ffffffff81964310 T drm_exec_lock_obj +ffffffff819645a0 t drm_exec_obj_locked +ffffffff81964670 t dma_resv_unlock +ffffffff81964710 T drm_exec_unlock_obj +ffffffff819648a0 T drm_exec_prepare_obj +ffffffff81964920 T drm_exec_prepare_array +ffffffff819649d0 t dma_resv_lock_slow_interruptible +ffffffff81964b00 t dma_resv_lock_slow +ffffffff81964bf0 t __ww_mutex_lock +ffffffff81965000 T drm_fb_helper_debug_enter +ffffffff81965100 T drm_fb_helper_debug_leave +ffffffff81965270 T drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81965310 t __drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff819653c0 T drm_fb_helper_blank +ffffffff819654b0 T drm_fb_helper_prepare +ffffffff819655a0 t drm_fb_helper_resume_worker +ffffffff819655d0 t drm_fb_helper_damage_work +ffffffff81965730 T drm_fb_helper_unprepare +ffffffff81965760 T drm_fb_helper_init +ffffffff819657d0 T drm_fb_helper_alloc_info +ffffffff81965830 T drm_fb_helper_release_info +ffffffff81965880 T drm_fb_helper_unregister_info +ffffffff819658b0 T drm_fb_helper_fini +ffffffff819659b0 T drm_fb_helper_set_suspend +ffffffff819659e0 T drm_fb_helper_set_suspend_unlocked +ffffffff81965a10 T drm_fb_helper_set_par +ffffffff81965ac0 T drm_fb_helper_pan_display +ffffffff81965b90 T drm_fb_helper_fill_info +ffffffff81965c50 T drm_fb_helper_initial_config +ffffffff81965c80 t __drm_fb_helper_initial_config_and_unlock +ffffffff819662c0 T drm_fb_helper_hotplug_event +ffffffff819663f0 t drm_setup_crtcs_fb +ffffffff81966530 T drm_fb_helper_lastclose +ffffffff819665e0 T drm_fb_helper_output_poll_changed +ffffffff81967000 T drm_fb_dma_get_gem_obj +ffffffff81968000 T drm_fbdev_dma_setup +ffffffff81968190 t drm_fbdev_dma_helper_fb_probe +ffffffff81968390 t drm_fbdev_dma_client_unregister +ffffffff819683e0 t drm_fbdev_dma_client_restore +ffffffff81968420 t drm_fbdev_dma_client_hotplug +ffffffff81969000 T drm_fbdev_generic_setup +ffffffff81969190 t drm_fbdev_generic_helper_fb_probe +ffffffff81969300 t drm_fbdev_generic_helper_fb_dirty +ffffffff819695b0 t drm_fbdev_generic_client_unregister +ffffffff81969600 t drm_fbdev_generic_client_restore +ffffffff81969640 t drm_fbdev_generic_client_hotplug +ffffffff8196a000 T drm_dev_needs_global_mutex +ffffffff8196a060 T drm_file_alloc +ffffffff8196a2e0 T drm_file_free +ffffffff8196a530 T drm_lastclose +ffffffff8196a5a0 T drm_release +ffffffff8196a5f0 T drm_file_update_pid +ffffffff8196a640 T drm_release_noglobal +ffffffff8196a690 T drm_read +ffffffff8196a6e0 T drm_event_reserve_init_locked +ffffffff8196a760 T drm_event_reserve_init +ffffffff8196a820 T drm_event_cancel_free +ffffffff8196a8a0 T drm_send_event_timestamp_locked +ffffffff8196a8b0 t drm_send_event_helper +ffffffff8196aa80 T drm_send_event_locked +ffffffff8196aaa0 T drm_send_event +ffffffff8196aaf0 T drm_print_memory_stats +ffffffff8196ad70 T drm_show_memory_stats +ffffffff8196afb0 T drm_show_fdinfo +ffffffff8196afd0 T mock_drm_getfile +ffffffff8196c000 T drm_flip_work_allocate_task +ffffffff8196c060 T drm_flip_work_queue_task +ffffffff8196c0b0 T drm_flip_work_queue +ffffffff8196c150 T drm_flip_work_commit +ffffffff8196c1d0 T drm_flip_work_init +ffffffff8196c240 t flip_worker +ffffffff8196c320 T drm_flip_work_cleanup +ffffffff8196d000 T drm_fb_clip_offset +ffffffff8196d040 T drm_fb_memcpy +ffffffff8196d2f0 T drm_fb_swab +ffffffff8196d400 t drm_fb_swab32_line +ffffffff8196d460 t drm_fb_swab16_line +ffffffff8196d4c0 t drm_fb_xfrm +ffffffff8196d7b0 T drm_fb_xrgb8888_to_rgb332 +ffffffff8196d810 t drm_fb_xrgb8888_to_rgb332_line +ffffffff8196d910 T drm_fb_xrgb8888_to_rgb565 +ffffffff8196d990 t drm_fb_xrgb8888_to_rgb565_swab_line +ffffffff8196dab0 t drm_fb_xrgb8888_to_rgb565_line +ffffffff8196dbc0 T drm_fb_xrgb8888_to_xrgb1555 +ffffffff8196dc20 t drm_fb_xrgb8888_to_xrgb1555_line +ffffffff8196dd30 T drm_fb_xrgb8888_to_argb1555 +ffffffff8196dd90 t drm_fb_xrgb8888_to_argb1555_line +ffffffff8196deb0 T drm_fb_xrgb8888_to_rgba5551 +ffffffff8196df10 t drm_fb_xrgb8888_to_rgba5551_line +ffffffff8196e020 T drm_fb_xrgb8888_to_rgb888 +ffffffff8196e080 t drm_fb_xrgb8888_to_rgb888_line +ffffffff8196e110 T drm_fb_xrgb8888_to_argb8888 +ffffffff8196e170 t drm_fb_xrgb8888_to_argb8888_line +ffffffff8196e240 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff8196e2a0 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff8196e320 T drm_fb_xrgb8888_to_argb2101010 +ffffffff8196e380 t drm_fb_xrgb8888_to_argb2101010_line +ffffffff8196e410 T drm_fb_xrgb8888_to_gray8 +ffffffff8196e470 t drm_fb_xrgb8888_to_gray8_line +ffffffff8196e4e0 T drm_fb_blit +ffffffff8196eb60 T drm_fb_xrgb8888_to_mono +ffffffff8196eef0 T drm_fb_build_fourcc_list +ffffffff8196f1d0 t drm_fb_xrgb8888_to_xbgr8888_line +ffffffff8196f2b0 t drm_fb_xrgb8888_to_abgr8888_line +ffffffff81970000 T drm_mode_legacy_fb_format +ffffffff819700f0 T drm_driver_legacy_fb_format +ffffffff819701f0 T __drm_format_info +ffffffff81970270 T drm_format_info +ffffffff81970320 T drm_get_format_info +ffffffff819703f0 T drm_format_info_block_width +ffffffff81970440 T drm_format_info_block_height +ffffffff81970490 T drm_format_info_bpp +ffffffff81970510 T drm_format_info_min_pitch +ffffffff81971000 T drm_framebuffer_check_src_coords +ffffffff81971120 T drm_mode_addfb +ffffffff81971330 T drm_mode_addfb2 +ffffffff81971430 T drm_mode_addfb_ioctl +ffffffff81971450 T drm_internal_framebuffer_create +ffffffff81971a30 T drm_mode_addfb2_ioctl +ffffffff81971b30 T drm_mode_rmfb +ffffffff81971d10 T drm_framebuffer_lookup +ffffffff81971d60 t drm_mode_rmfb_work_fn +ffffffff81971e20 T drm_mode_rmfb_ioctl +ffffffff81971e40 T drm_mode_getfb +ffffffff81971f90 T drm_mode_getfb2_ioctl +ffffffff81972350 T drm_mode_dirtyfb_ioctl +ffffffff819724f0 T drm_fb_release +ffffffff81972600 T drm_framebuffer_free +ffffffff81972640 T drm_framebuffer_init +ffffffff819727a0 T drm_framebuffer_unregister_private +ffffffff819727e0 T drm_framebuffer_cleanup +ffffffff81972840 T drm_framebuffer_remove +ffffffff81972cd0 T drm_framebuffer_plane_width +ffffffff81972d20 T drm_framebuffer_plane_height +ffffffff81972d70 T drm_framebuffer_print_info +ffffffff81974000 T drm_ref +ffffffff81974030 T drm_unref +ffffffff819740b0 T drm_fault +ffffffff81974280 T drm_flush +ffffffff819742b0 T udv_attach_drm +ffffffff819744a0 T drm_gem_init +ffffffff81974550 t drm_gem_init_release +ffffffff81974570 T drm_gem_object_init +ffffffff819746f0 T drm_gem_private_object_init +ffffffff81974810 T drm_gem_private_object_fini +ffffffff81974870 T drm_gem_handle_delete +ffffffff81974960 t drm_gem_object_release_handle +ffffffff819749f0 T drm_gem_dumb_map_offset +ffffffff81974b20 T drm_gem_object_lookup +ffffffff81974b90 T drm_gem_create_mmap_offset +ffffffff81974bc0 T drm_gem_handle_create_tail +ffffffff81974d30 t drm_gem_object_handle_put_unlocked +ffffffff81974e80 T drm_gem_handle_create +ffffffff81974ed0 T drm_gem_free_mmap_offset +ffffffff81974f00 T drm_gem_create_mmap_offset_size +ffffffff81974f30 T drm_gem_get_pages +ffffffff81974f80 T drm_gem_put_pages +ffffffff81974fb0 T drm_gem_objects_lookup +ffffffff81975110 T drm_gem_dma_resv_wait +ffffffff81975240 T drm_gem_close_ioctl +ffffffff81975290 T drm_gem_flink_ioctl +ffffffff81975400 T drm_gem_open_ioctl +ffffffff81975530 T drm_gem_open +ffffffff81975560 T drm_gem_release +ffffffff819755a0 T drm_gem_object_release +ffffffff819756f0 T drm_gem_lru_remove +ffffffff819757d0 T drm_gem_object_free +ffffffff81975820 T drm_gem_mmap_obj +ffffffff81975920 T drm_gem_mmap +ffffffff81975b90 T drm_gem_print_info +ffffffff81975cb0 T drm_gem_pin +ffffffff81975cf0 T drm_gem_unpin +ffffffff81975d30 T drm_gem_vmap +ffffffff81975d90 T drm_gem_vunmap +ffffffff81975e00 T drm_gem_vmap_unlocked +ffffffff81976000 T drm_gem_vunmap_unlocked +ffffffff819761d0 T drm_gem_lock_reservations +ffffffff819765c0 T drm_gem_unlock_reservations +ffffffff819766c0 T drm_gem_lru_init +ffffffff81976700 T drm_gem_lru_move_tail_locked +ffffffff81976800 T drm_gem_lru_move_tail +ffffffff819768f0 T drm_gem_lru_scan +ffffffff81976ce0 T drm_gem_evict +ffffffff81977000 T drm_gem_plane_helper_prepare_fb +ffffffff81978000 T drm_gem_dma_create +ffffffff81978220 T drm_gem_dma_free_object +ffffffff819782c0 T drm_gem_dma_dumb_create_internal +ffffffff81978400 T drm_gem_dma_dumb_create +ffffffff81978440 T drm_gem_dma_fault +ffffffff819785e0 T drm_gem_dma_get_sg_table +ffffffff81978610 T drm_gem_dma_prime_import_sg_table +ffffffff81978640 T drm_gem_dma_vmap +ffffffff81979000 T drm_gem_fb_destroy +ffffffff819790c0 T drm_gem_fb_create_handle +ffffffff819790e0 T drm_gem_fb_create +ffffffff81979220 T drm_gem_fb_get_obj +ffffffff8197a000 T drm_ht_create +ffffffff8197a080 T drm_ht_verbose_list +ffffffff8197a140 T drm_ht_insert_item +ffffffff8197a190 T drm_ht_just_insert_please +ffffffff8197a260 T drm_ht_find_item +ffffffff8197a2b0 T drm_ht_remove_key +ffffffff8197a300 T drm_ht_remove_item +ffffffff8197a350 T drm_ht_remove +ffffffff8197b000 T drm_getunique +ffffffff8197b0a0 T drm_getclient +ffffffff8197b120 T drm_noop +ffffffff8197b180 T drm_invalid_op +ffffffff8197b1b0 T drm_version +ffffffff8197b3c0 T pledge_ioctl_drm +ffffffff8197b490 T drm_ioctl_kernel +ffffffff8197b4e0 T drm_ioctl +ffffffff8197b530 T drm_ioctl_flags +ffffffff8197b580 T drm_do_ioctl +ffffffff8197b8c0 T drmioctl +ffffffff8197ba10 t drm_getstats +ffffffff8197ba60 t drm_setversion +ffffffff8197bbc0 t drm_getcap +ffffffff8197bd80 t drm_setclientcap +ffffffff8197c000 T tasklet_unlock_wait +ffffffff8197c080 T tasklet_unlock_spin_wait +ffffffff8197c100 T tasklet_run +ffffffff8197c160 T set_current_state +ffffffff8197c200 T __set_current_state +ffffffff8197c290 T schedule +ffffffff8197c2d0 T schedule_timeout +ffffffff8197c380 T schedule_timeout_uninterruptible +ffffffff8197c3e0 T wake_up_process +ffffffff8197c460 T autoremove_wake_function +ffffffff8197c500 T prepare_to_wait +ffffffff8197c5f0 T finish_wait +ffffffff8197c6a0 T flush_workqueue +ffffffff8197c6e0 T flush_work +ffffffff8197c730 T flush_delayed_work +ffffffff8197c7d0 T kthread_func +ffffffff8197c810 T kthread_run +ffffffff8197c8f0 T kthread_create_worker +ffffffff8197c9b0 T kthread_destroy_worker +ffffffff8197c9f0 T kthread_init_work +ffffffff8197ca10 T kthread_queue_work +ffffffff8197ca50 T kthread_cancel_work_sync +ffffffff8197ca90 T kthread_flush_work +ffffffff8197cad0 T kthread_flush_worker +ffffffff8197cb10 T kthread_lookup +ffffffff8197cb90 T kthread_should_park +ffffffff8197cc20 T kthread_parkme +ffffffff8197ccf0 T kthread_park +ffffffff8197cdf0 T kthread_unpark +ffffffff8197ce50 T kthread_should_stop +ffffffff8197cee0 T kthread_stop +ffffffff8197d030 T dmi_match +ffffffff8197d0e0 T dmi_first_match +ffffffff8197d1d0 T dmi_get_system_info +ffffffff8197d240 T dmi_check_system +ffffffff8197d340 T alloc_pages +ffffffff8197d410 T __free_pages +ffffffff8197d580 T __pagevec_release +ffffffff8197d620 T kmap +ffffffff8197d660 T kunmap_va +ffffffff8197d680 T kmap_atomic_prot +ffffffff8197d710 T kunmap_atomic +ffffffff8197d790 T vmap +ffffffff8197d870 T vmap_pfn +ffffffff8197d960 T vunmap +ffffffff8197d9b0 T is_vmalloc_addr +ffffffff8197d9f0 T print_hex_dump +ffffffff8197dac0 T memchr_inv +ffffffff8197db30 T panic_cmp +ffffffff8197db50 T linux_root_RB_INSERT_COLOR +ffffffff8197dd50 T linux_root_RB_REMOVE_COLOR +ffffffff8197e080 T linux_root_RB_REMOVE +ffffffff8197e1c0 T linux_root_RB_INSERT +ffffffff8197e230 T linux_root_RB_FIND +ffffffff8197e280 T linux_root_RB_NFIND +ffffffff8197e2d0 T linux_root_RB_NEXT +ffffffff8197e340 T linux_root_RB_PREV +ffffffff8197e3b0 T linux_root_RB_MINMAX +ffffffff8197e400 T idr_init +ffffffff8197e430 T idr_destroy +ffffffff8197e570 T idr_tree_SPLAY_REMOVE +ffffffff8197e5f0 T idr_preload +ffffffff8197e680 T idr_alloc +ffffffff8197e810 T idr_tree_SPLAY_INSERT +ffffffff8197e8b0 T idr_replace +ffffffff8197e930 T idr_remove +ffffffff8197e9f0 T idr_find +ffffffff8197ea60 T idr_get_next +ffffffff8197eb90 T idr_for_each +ffffffff8197eca0 T idr_cmp +ffffffff8197ece0 T idr_tree_SPLAY +ffffffff8197ee10 T idr_tree_SPLAY_MINMAX +ffffffff8197ef00 T ida_init +ffffffff8197ef30 T ida_destroy +ffffffff8197ef40 T ida_simple_get +ffffffff8197ef60 T ida_simple_remove +ffffffff8197ef80 T ida_alloc_min +ffffffff8197efa0 T ida_alloc_max +ffffffff8197efc0 T ida_free +ffffffff8197efe0 T xarray_cmp +ffffffff8197f020 T xarray_tree_SPLAY_INSERT +ffffffff8197f0c0 T xarray_tree_SPLAY +ffffffff8197f1f0 T xarray_tree_SPLAY_REMOVE +ffffffff8197f270 T xarray_tree_SPLAY_MINMAX +ffffffff8197f360 T xa_init_flags +ffffffff8197f3e0 T xa_destroy +ffffffff8197f520 T __xa_alloc +ffffffff8197f6a0 T __xa_alloc_cyclic +ffffffff8197f700 T __xa_erase +ffffffff8197f7c0 T __xa_load +ffffffff8197f830 T __xa_store +ffffffff8197f9b0 T xa_get_next +ffffffff8197fae0 T sg_alloc_table +ffffffff8197fb60 T sg_free_table +ffffffff8197fbc0 T sg_copy_from_buffer +ffffffff8197fbf0 T i2c_master_xfer +ffffffff8197fd20 T __i2c_transfer +ffffffff8197fdd0 T i2c_transfer +ffffffff8197fea0 T i2c_bb_master_xfer +ffffffff8197ff80 T i2c_bb_functionality +ffffffff8197ffb0 T i2c_bit_add_bus +ffffffff8197fff0 T vga_disable_bridge +ffffffff819800a0 T vga_get_uninterruptible +ffffffff819800f0 T vga_put +ffffffff81980170 T acpi_get_table +ffffffff81980230 T acpi_put_table +ffffffff81980260 T acpi_get_handle +ffffffff819802b0 T acpi_get_name +ffffffff81980350 T acpi_evaluate_object +ffffffff819805b0 T drm_linux_acpi_notify +ffffffff81980630 T register_acpi_notifier +ffffffff81980670 T unregister_acpi_notifier +ffffffff81980700 T acpi_format_exception +ffffffff81980750 T backlight_do_update_status +ffffffff81980770 T backlight_device_register +ffffffff81980820 T backlight_device_unregister +ffffffff81980880 T backlight_schedule_update_status +ffffffff819808a0 T backlight_enable +ffffffff819808e0 T backlight_disable +ffffffff81980920 T backlight_device_get_by_name +ffffffff81980990 T dev_set_drvdata +ffffffff81980a30 T dev_get_drvdata +ffffffff81980a90 T drm_sysfs_hotplug_event +ffffffff81980ab0 T drm_sysfs_connector_hotplug_event +ffffffff81980ad0 T drm_sysfs_connector_status_event +ffffffff81980af0 T drm_sysfs_connector_property_event +ffffffff81980b10 T dma_fence_get +ffffffff81980b50 T dma_fence_get_rcu +ffffffff81980b90 T dma_fence_get_rcu_safe +ffffffff81980bd0 T dma_fence_release +ffffffff81980c00 T dma_fence_put +ffffffff81980c70 T dma_fence_signal_timestamp_locked +ffffffff81980d20 T dma_fence_signal +ffffffff81980e50 T dma_fence_signal_locked +ffffffff81980f60 T dma_fence_signal_timestamp +ffffffff81981040 T dma_fence_is_signaled +ffffffff819810b0 T dma_fence_is_signaled_locked +ffffffff819811f0 T dma_fence_timestamp +ffffffff81981290 T dma_fence_wait_timeout +ffffffff819812f0 T dma_fence_default_wait +ffffffff819814d0 T dma_fence_wait +ffffffff81981530 T dma_fence_enable_sw_signaling +ffffffff81981680 T dma_fence_init +ffffffff819816e0 T dma_fence_add_callback +ffffffff81981810 T dma_fence_remove_callback +ffffffff81981890 T dma_fence_context_alloc +ffffffff819818d0 t dma_fence_default_wait_cb +ffffffff81981920 T dma_fence_wait_any_timeout +ffffffff81981c40 T dma_fence_set_deadline +ffffffff81981ce0 T dma_fence_get_stub +ffffffff81981e70 T dma_fence_allocate_private_stub +ffffffff81981f90 T dma_fence_array_create +ffffffff819820a0 t irq_dma_fence_array_work +ffffffff81982130 T dma_fence_array_first +ffffffff81982180 T dma_fence_array_next +ffffffff819821d0 t dma_fence_array_get_driver_name +ffffffff81982200 t dma_fence_array_get_timeline_name +ffffffff81982230 t dma_fence_array_enable_signaling +ffffffff81982330 t dma_fence_array_signaled +ffffffff81982380 t dma_fence_array_release +ffffffff81982440 T dma_fence_chain_find_seqno +ffffffff81982560 T dma_fence_chain_walk +ffffffff81982790 T dma_fence_chain_init +ffffffff819828a0 t dma_fence_chain_get_driver_name +ffffffff819828d0 t dma_fence_chain_get_timeline_name +ffffffff81982900 t dma_fence_chain_enable_signaling +ffffffff81982ab0 t dma_fence_chain_signaled +ffffffff81982ba0 t dma_fence_chain_release +ffffffff81982ce0 T dma_fence_is_container +ffffffff81982d30 T dmabuf_read +ffffffff81982d60 T dmabuf_write +ffffffff81982d90 T dmabuf_ioctl +ffffffff81982dc0 T dmabuf_kqfilter +ffffffff81982df0 T dmabuf_stat +ffffffff81982eb0 T dmabuf_close +ffffffff81982f20 T dmabuf_seek +ffffffff81982fb0 T dma_buf_export +ffffffff81983060 T dma_buf_get +ffffffff819830f0 T dma_buf_put +ffffffff819831a0 T dma_buf_fd +ffffffff819832c0 T get_dma_buf +ffffffff81983300 T pcie_get_speed_cap +ffffffff819834b0 T printk +ffffffff81983550 T pcie_get_width_cap +ffffffff81983640 T pcie_aspm_enabled +ffffffff819836d0 T wait_on_bit +ffffffff819837a0 T wait_on_bit_timeout +ffffffff81983870 T wake_up_bit +ffffffff819838b0 T clear_and_wake_up_bit +ffffffff81983900 T bit_waitqueue +ffffffff81983930 T __var_waitqueue +ffffffff81983960 T drm_linux_init +ffffffff81983ad0 T drm_linux_exit +ffffffff81983b30 T pci_resize_resource +ffffffff81983c80 T register_shrinker +ffffffff81983cd0 T unregister_shrinker +ffffffff81983d30 T drmbackoff +ffffffff81983dc0 T bitmap_zalloc +ffffffff81983df0 T bitmap_free +ffffffff81983e10 T atomic_dec_and_mutex_lock +ffffffff81983e90 T interval_tree_iter_first +ffffffff81983f40 T interval_tree_remove +ffffffff81983f60 T interval_tree_insert +ffffffff81983fd0 T syncfile_read +ffffffff81984000 T syncfile_write +ffffffff81984030 T syncfile_ioctl +ffffffff81984060 T syncfile_kqfilter +ffffffff81984090 T syncfile_stat +ffffffff81984140 T syncfile_close +ffffffff819841e0 T syncfile_seek +ffffffff81984260 T fd_install +ffffffff81984330 T fput +ffffffff81984390 T get_unused_fd_flags +ffffffff819844a0 T put_unused_fd +ffffffff81984530 T sync_file_get_fence +ffffffff819845e0 T sync_file_create +ffffffff81984680 T drm_firmware_drivers_only +ffffffff819846b0 T memremap +ffffffff81984700 T memunmap +ffffffff81984720 T dma_tag_lookup +ffffffff81984790 T dma_alloc_coherent +ffffffff81984880 T dma_free_coherent +ffffffff819849b0 T dma_get_sgtable +ffffffff81984a80 T dma_map_resource +ffffffff81984ba0 T component_add +ffffffff81984c10 T component_add_typed +ffffffff81984c80 T component_bind_all +ffffffff81984d10 T component_master_add_with_match +ffffffff81984e00 t dma_fence_stub_get_name +ffffffff81984e30 t dma_fence_array_cb_func +ffffffff81984eb0 t dma_fence_chain_cb +ffffffff81984f70 t dma_fence_chain_timo +ffffffff81986000 T drmm_kzalloc +ffffffff81986100 T drmm_kcalloc +ffffffff81986210 T drmm_kstrdup +ffffffff81986340 T drmm_kfree +ffffffff81986440 T drmm_add_action +ffffffff81986500 T drmm_add_action_or_reset +ffffffff819865d0 T drm_managed_release +ffffffff81986690 T drmm_add_final_kfree +ffffffff81987000 T mipi_dsi_attach +ffffffff81987060 T mipi_dsi_detach +ffffffff819870f0 T devm_mipi_dsi_attach +ffffffff81987170 T mipi_dsi_packet_format_is_short +ffffffff819871b0 T mipi_dsi_packet_format_is_long +ffffffff819871f0 T mipi_dsi_create_packet +ffffffff81987300 T mipi_dsi_shutdown_peripheral +ffffffff819873b0 T mipi_dsi_turn_on_peripheral +ffffffff81987460 T mipi_dsi_set_maximum_return_packet_size +ffffffff81987510 T mipi_dsi_compression_mode +ffffffff819875c0 T mipi_dsi_picture_parameter_set +ffffffff81987670 T mipi_dsi_generic_write +ffffffff81987730 T mipi_dsi_generic_read +ffffffff819877e0 T mipi_dsi_dcs_write_buffer +ffffffff819878a0 T mipi_dsi_dcs_write +ffffffff819879f0 T mipi_dsi_dcs_read +ffffffff81987a90 T mipi_dsi_dcs_nop +ffffffff81987b40 T mipi_dsi_dcs_soft_reset +ffffffff81987bf0 T mipi_dsi_dcs_get_power_mode +ffffffff81987cb0 T mipi_dsi_dcs_get_pixel_format +ffffffff81987d70 T mipi_dsi_dcs_enter_sleep_mode +ffffffff81987e20 T mipi_dsi_dcs_exit_sleep_mode +ffffffff81987ed0 T mipi_dsi_dcs_set_display_off +ffffffff81987f80 T mipi_dsi_dcs_set_display_on +ffffffff81988030 T mipi_dsi_dcs_set_column_address +ffffffff819880f0 T mipi_dsi_dcs_set_page_address +ffffffff819881b0 T mipi_dsi_dcs_set_tear_off +ffffffff81988260 T mipi_dsi_dcs_set_tear_on +ffffffff81988310 T mipi_dsi_dcs_set_pixel_format +ffffffff81989000 T __drm_mm_interval_first +ffffffff819890c0 T drm_mm_reserve_node +ffffffff81989340 t add_hole +ffffffff819894a0 T drm_mm_insert_node_in_range +ffffffff81989a90 T drm_mm_remove_node +ffffffff81989bc0 T drm_mm_replace_node +ffffffff81989da0 T drm_mm_scan_init_with_range +ffffffff81989e30 T drm_mm_scan_add_block +ffffffff81989fa0 T drm_mm_scan_remove_block +ffffffff8198a020 T drm_mm_scan_color_evict +ffffffff8198a100 T drm_mm_init +ffffffff8198a1b0 T drm_mm_takedown +ffffffff8198a1f0 T drm_mm_print +ffffffff8198b000 T drm_modeset_register_all +ffffffff8198b0a0 T drm_modeset_unregister_all +ffffffff8198b0e0 T drm_mode_getresources +ffffffff8198b390 T drm_mode_config_reset +ffffffff8198b4f0 T drmm_mode_config_init +ffffffff8198bb70 T drm_mode_config_cleanup +ffffffff8198be90 t drm_mode_config_init_release +ffffffff8198bea0 T drm_mode_config_validate +ffffffff8198d000 T __drm_mode_object_add +ffffffff8198d100 T drm_mode_object_add +ffffffff8198d1e0 T drm_mode_object_register +ffffffff8198d230 T drm_mode_object_unregister +ffffffff8198d2d0 T drm_mode_object_lease_required +ffffffff8198d320 T __drm_mode_object_find +ffffffff8198d3d0 T drm_mode_object_find +ffffffff8198d480 T drm_mode_object_put +ffffffff8198d500 T drm_mode_object_get +ffffffff8198d560 T drm_object_attach_property +ffffffff8198d670 T drm_object_property_set_value +ffffffff8198d750 T drm_object_property_get_value +ffffffff8198d7e0 t __drm_object_property_get_value +ffffffff8198d8c0 T drm_object_property_get_default_value +ffffffff8198d990 T drm_mode_object_get_properties +ffffffff8198dad0 T drm_mode_obj_get_properties_ioctl +ffffffff8198dd20 T drm_mode_obj_find_prop_id +ffffffff8198dd80 T drm_mode_obj_set_property_ioctl +ffffffff8198f000 T drm_mode_debug_printmodeline +ffffffff8198f140 T drm_mode_vrefresh +ffffffff8198f1e0 T drm_mode_create +ffffffff8198f200 T drm_mode_destroy +ffffffff8198f240 T drm_mode_probed_add +ffffffff8198f2e0 T drm_analog_tv_mode +ffffffff8198fb80 T drm_cvt_mode +ffffffff81990000 T drm_mode_set_name +ffffffff81990050 T drm_gtf_mode_complex +ffffffff81990350 T drm_gtf_mode +ffffffff819903a0 T drm_mode_get_hv_timing +ffffffff819903f0 T drm_mode_init +ffffffff819904c0 T drm_mode_set_crtcinfo +ffffffff81990680 T drm_mode_copy +ffffffff819906e0 T drm_mode_duplicate +ffffffff81990760 T drm_mode_match +ffffffff81990900 T drm_mode_equal +ffffffff81990920 T drm_mode_equal_no_clocks +ffffffff81990940 T drm_mode_equal_no_clocks_no_stereo +ffffffff81990a00 T drm_mode_validate_driver +ffffffff81990af0 T drm_mode_validate_size +ffffffff81990b40 T drm_mode_validate_ycbcr420 +ffffffff81990bb0 T drm_mode_is_420_only +ffffffff81990c00 T drm_get_mode_status_name +ffffffff81990c80 T drm_mode_prune_invalid +ffffffff81990f20 T drm_mode_sort +ffffffff81990f50 t drm_mode_compare +ffffffff819910f0 T drm_connector_list_update +ffffffff819912c0 T drm_mode_parse_command_line_for_connector +ffffffff819912f0 T drm_mode_create_from_cmdline_mode +ffffffff819914b0 T drm_mode_convert_to_umode +ffffffff81991650 T drm_mode_convert_umode +ffffffff81991870 T drm_mode_is_420_also +ffffffff819918c0 T drm_mode_is_420 +ffffffff81992000 T drm_helper_move_panel_connectors_to_head +ffffffff819920f0 T drm_helper_mode_fill_fb_struct +ffffffff819921b0 T drm_crtc_init +ffffffff81992280 T drm_mode_config_helper_suspend +ffffffff81992330 T drm_mode_config_helper_resume +ffffffff81993000 T drm_modeset_lock_all +ffffffff81993290 T drm_modeset_acquire_init +ffffffff81993320 T drm_modeset_lock_all_ctx +ffffffff81993410 T drm_modeset_backoff +ffffffff819934e0 T drm_modeset_acquire_fini +ffffffff81993510 T drm_warn_on_modeset_not_all_locked +ffffffff81993660 T drm_modeset_unlock_all +ffffffff81993750 T drm_modeset_drop_locks +ffffffff819937e0 T drm_modeset_unlock +ffffffff819938b0 t modeset_lock +ffffffff81993c10 T drm_modeset_lock_init +ffffffff81993c70 T drm_modeset_lock +ffffffff81993d90 T drm_modeset_lock_single_interruptible +ffffffff81993eb0 t __ww_mutex_lock +ffffffff81995000 T drm_mtrr_add +ffffffff81995070 T drm_mtrr_del +ffffffff81996000 T drm_panel_init +ffffffff81996090 T drm_panel_add +ffffffff819960e0 T drm_panel_remove +ffffffff81996140 T drm_panel_prepare +ffffffff81996250 T drm_panel_unprepare +ffffffff81996360 T drm_panel_enable +ffffffff81996450 T drm_panel_disable +ffffffff81996540 T drm_panel_get_modes +ffffffff819965a0 T drm_is_panel_follower +ffffffff819965f0 T drm_panel_add_follower +ffffffff81996640 T drm_panel_remove_follower +ffffffff81996660 T devm_drm_panel_add_follower +ffffffff819966b0 T drm_panel_of_backlight +ffffffff81997000 T drm_get_panel_orientation_quirk +ffffffff81998000 T drm_pci_set_busid +ffffffff81998090 t kasprintf +ffffffff81999000 T drm_universal_plane_init +ffffffff819990e0 t __drm_universal_plane_init +ffffffff819995c0 T __drmm_universal_plane_alloc +ffffffff81999700 t drmm_universal_plane_alloc_release +ffffffff81999750 T __drm_universal_plane_alloc +ffffffff81999890 T drm_plane_register_all +ffffffff81999980 T drm_plane_unregister_all +ffffffff819999f0 T drm_plane_cleanup +ffffffff81999b40 T drm_plane_from_index +ffffffff81999ba0 T drm_plane_force_disable +ffffffff81999cb0 T drm_mode_plane_set_obj_prop +ffffffff81999d30 T drm_mode_getplane_res +ffffffff81999e60 T drm_mode_getplane +ffffffff81999fb0 T drm_plane_check_pixel_format +ffffffff8199a070 T drm_any_plane_has_format +ffffffff8199a1a0 T drm_mode_setplane +ffffffff8199a490 T drm_mode_cursor_ioctl +ffffffff8199a500 t drm_mode_cursor_common +ffffffff8199aa40 T drm_mode_cursor2_ioctl +ffffffff8199aa60 T drm_mode_page_flip_ioctl +ffffffff8199afe0 T drm_plane_enable_fb_damage_clips +ffffffff8199b000 T drm_plane_get_damage_clips_count +ffffffff8199b040 T __drm_plane_get_damage_clips +ffffffff8199b080 T drm_plane_get_damage_clips +ffffffff8199b120 T drm_create_scaling_filter_prop +ffffffff8199b270 T drm_plane_create_scaling_filter_property +ffffffff8199b2e0 t kvasprintf +ffffffff8199b380 t kasprintf +ffffffff8199b450 t create_in_format_blob +ffffffff8199b640 t __setplane_atomic +ffffffff8199b7e0 t __setplane_internal +ffffffff8199b9f0 t __setplane_check +ffffffff8199c000 T drm_plane_helper_update_primary +ffffffff8199c4c0 t get_connectors_for_crtc +ffffffff8199c5d0 T drm_plane_helper_disable_primary +ffffffff8199c680 T drm_plane_helper_destroy +ffffffff8199c6b0 T drm_plane_helper_atomic_check +ffffffff8199d000 T drm_prime_remove_buf_handle +ffffffff8199d0a0 T drm_prime_init_file_private +ffffffff8199d100 T drm_prime_destroy_file_private +ffffffff8199d160 T drm_gem_dmabuf_export +ffffffff8199d1c0 T drm_gem_dmabuf_release +ffffffff8199d200 T drm_gem_prime_fd_to_handle +ffffffff8199d420 T drm_gem_prime_import +ffffffff8199d480 t drm_prime_add_buf_handle +ffffffff8199d5c0 T drm_prime_fd_to_handle_ioctl +ffffffff8199d5f0 T drm_gem_prime_handle_to_fd +ffffffff8199d820 T drm_prime_handle_to_fd_ioctl +ffffffff8199d890 T drm_gem_map_attach +ffffffff8199d8e0 T drm_gem_map_detach +ffffffff8199d900 T drm_gem_dmabuf_vmap +ffffffff8199d920 T drm_gem_dmabuf_vunmap +ffffffff8199d940 T drm_gem_prime_mmap +ffffffff8199d990 T drm_prime_pages_to_sg +ffffffff8199d9e0 T drm_prime_get_contiguous_size +ffffffff8199da30 T drm_gem_prime_export +ffffffff8199dac0 T drm_gem_prime_import_dev +ffffffff8199db20 T drm_prime_sg_to_page_array +ffffffff8199db70 T drm_prime_sg_to_dma_addr_array +ffffffff8199dbc0 T drm_prime_gem_destroy +ffffffff8199e000 T __drm_puts_coredump +ffffffff8199e0e0 T __drm_printfn_coredump +ffffffff8199e2b0 T __drm_puts_seq_file +ffffffff8199e2e0 T __drm_printfn_seq_file +ffffffff8199e310 T __drm_printfn_info +ffffffff8199e340 T __drm_printfn_debug +ffffffff8199e370 T __drm_printfn_err +ffffffff8199e3b0 T drm_puts +ffffffff8199e3e0 T drm_printf +ffffffff8199e460 T drm_print_bits +ffffffff8199e690 T drm_dev_printk +ffffffff8199e730 T __drm_dev_dbg +ffffffff8199e7c0 T ___drm_dbg +ffffffff8199e850 T __drm_err +ffffffff8199e8e0 T drm_print_regset32 +ffffffff8199f000 T drm_crtc_mode_valid +ffffffff8199f050 T drm_encoder_mode_valid +ffffffff8199f090 T drm_connector_mode_valid +ffffffff8199f110 T drm_kms_helper_poll_enable +ffffffff8199f2a0 T drm_kms_helper_poll_reschedule +ffffffff8199f300 T drm_helper_probe_detect +ffffffff8199f4f0 T drm_helper_probe_single_connector_modes +ffffffff8199fb20 t __drm_helper_update_and_validate +ffffffff8199fed0 T drm_kms_helper_hotplug_event +ffffffff8199ff10 T drm_kms_helper_connector_hotplug_event +ffffffff8199ff50 T drm_kms_helper_is_poll_worker +ffffffff8199ff80 T drm_kms_helper_poll_disable +ffffffff819a00a0 T drm_kms_helper_poll_init +ffffffff819a0100 t output_poll_execute +ffffffff819a0350 T drm_kms_helper_poll_fini +ffffffff819a03a0 T drm_connector_helper_hpd_irq_event +ffffffff819a0460 t check_connector_changed +ffffffff819a0630 T drm_helper_hpd_irq_event +ffffffff819a0780 T drm_crtc_helper_mode_valid_fixed +ffffffff819a07d0 T drm_connector_helper_get_modes_from_ddc +ffffffff819a0860 T drm_connector_helper_get_modes_fixed +ffffffff819a09d0 T drm_connector_helper_get_modes +ffffffff819a0a40 T drm_connector_helper_tv_get_modes +ffffffff819a0c80 t __delayed_work_tick +ffffffff819a1000 T drm_property_create +ffffffff819a11f0 T drm_property_create_enum +ffffffff819a12a0 T drm_property_add_enum +ffffffff819a14a0 T drm_property_destroy +ffffffff819a1550 T drm_property_create_bitmask +ffffffff819a1680 T drm_property_create_range +ffffffff819a16f0 T drm_property_create_signed_range +ffffffff819a1760 T drm_property_create_object +ffffffff819a1800 T drm_property_create_bool +ffffffff819a1860 T drm_mode_getproperty_ioctl +ffffffff819a1ab0 T drm_property_create_blob +ffffffff819a1bf0 t drm_property_free_blob +ffffffff819a1c70 T drm_property_blob_put +ffffffff819a1cb0 T drm_property_destroy_user_blobs +ffffffff819a1d30 T drm_property_blob_get +ffffffff819a1d70 T drm_property_lookup_blob +ffffffff819a1d90 T drm_property_replace_global_blob +ffffffff819a1ee0 T drm_property_replace_blob +ffffffff819a1f50 T drm_mode_getblob_ioctl +ffffffff819a2010 T drm_mode_createblob_ioctl +ffffffff819a2110 T drm_mode_destroyblob_ioctl +ffffffff819a2210 T drm_property_change_valid_get +ffffffff819a2470 T drm_property_change_valid_put +ffffffff819a3000 T drm_rect_intersect +ffffffff819a3080 T drm_rect_clip_scaled +ffffffff819a32f0 T drm_rect_calc_hscale +ffffffff819a33c0 T drm_rect_calc_vscale +ffffffff819a3490 T drm_rect_debug_print +ffffffff819a35b0 T drm_rect_rotate +ffffffff819a3670 T drm_rect_rotate_inv +ffffffff819a4000 T drm_self_refresh_helper_update_avg_times +ffffffff819a4150 T drm_self_refresh_helper_alter_state +ffffffff819a42e0 T drm_self_refresh_helper_init +ffffffff819a4470 t drm_self_refresh_helper_entry_work +ffffffff819a45d0 T drm_self_refresh_helper_cleanup +ffffffff819a4650 t __delayed_work_tick +ffffffff819a5000 T drm_suballoc_manager_init +ffffffff819a5180 T drm_suballoc_manager_fini +ffffffff819a5290 t drm_suballoc_try_free +ffffffff819a5380 T drm_suballoc_new +ffffffff819a5db0 t drm_suballoc_event +ffffffff819a5ef0 T drm_suballoc_free +ffffffff819a7000 T drm_syncobj_find +ffffffff819a7080 T drm_syncobj_add_point +ffffffff819a7190 t syncobj_wait_syncobj_func +ffffffff819a7240 t syncobj_eventfd_entry_func +ffffffff819a7330 T drm_syncobj_replace_fence +ffffffff819a73e0 T drm_syncobj_find_fence +ffffffff819a7730 t drm_syncobj_fence_add_wait +ffffffff819a7800 T drm_syncobj_free +ffffffff819a7880 T drm_syncobj_create +ffffffff819a7a50 T drm_syncobj_get_handle +ffffffff819a7b70 T drm_syncobj_get_fd +ffffffff819a7bc0 T drm_syncobj_open +ffffffff819a7bf0 T drm_syncobj_release +ffffffff819a7c30 t drm_syncobj_release_handle +ffffffff819a7cf0 T drm_syncobj_create_ioctl +ffffffff819a7e20 T drm_syncobj_destroy_ioctl +ffffffff819a7f60 T drm_syncobj_handle_to_fd_ioctl +ffffffff819a8150 T drm_syncobj_fd_to_handle_ioctl +ffffffff819a8300 T drm_syncobj_transfer_ioctl +ffffffff819a86e0 T drm_timeout_abs_to_jiffies +ffffffff819a87b0 T drm_syncobj_wait_ioctl +ffffffff819a8930 t drm_syncobj_array_find +ffffffff819a8b50 t drm_syncobj_array_free +ffffffff819a8c40 T drm_syncobj_timeline_wait_ioctl +ffffffff819a8dc0 T drm_syncobj_eventfd_ioctl +ffffffff819a8df0 T drm_syncobj_reset_ioctl +ffffffff819a8ed0 T drm_syncobj_signal_ioctl +ffffffff819a9030 T drm_syncobj_timeline_signal_ioctl +ffffffff819a9270 T drm_syncobj_query_ioctl +ffffffff819a9480 t drm_syncobj_array_wait_timeout +ffffffff819a98f0 t syncobj_wait_fence_func +ffffffff819a9910 t syncobj_eventfd_entry_fence_func +ffffffff819aa000 T drm_vblank_count +ffffffff819aa090 T drm_crtc_accurate_vblank_count +ffffffff819aa1a0 t drm_update_vblank_count +ffffffff819aa5e0 T drm_vblank_disable_and_save +ffffffff819aa730 T drm_vblank_init +ffffffff819aa8b0 t vblank_disable_fn +ffffffff819aa930 t drm_vblank_init_release +ffffffff819aa9c0 T drm_dev_has_vblank +ffffffff819aa9f0 T drm_crtc_vblank_waitqueue +ffffffff819aaa40 T drm_calc_timestamping_constants +ffffffff819aac60 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff819ab1b0 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff819ab1d0 T drm_crtc_vblank_count +ffffffff819ab260 T drm_crtc_vblank_count_and_time +ffffffff819ab320 t drm_vblank_count_and_time +ffffffff819ab3d0 T drm_crtc_next_vblank_start +ffffffff819ab520 T drm_crtc_arm_vblank_event +ffffffff819ab600 T drm_crtc_send_vblank_event +ffffffff819ab7b0 t send_vblank_event +ffffffff819ab860 T drm_vblank_get +ffffffff819ab960 t drm_vblank_enable +ffffffff819abb60 T drm_crtc_vblank_get +ffffffff819abc60 T drm_vblank_put +ffffffff819abd90 T drm_crtc_vblank_put +ffffffff819abdb0 T drm_wait_one_vblank +ffffffff819ac2b0 T drm_crtc_wait_one_vblank +ffffffff819ac2d0 T drm_crtc_vblank_off +ffffffff819ac6c0 T drm_crtc_vblank_reset +ffffffff819ac7f0 T drm_crtc_set_max_vblank_count +ffffffff819ac8d0 T drm_crtc_vblank_on +ffffffff819aca20 t drm_reset_vblank_timestamp +ffffffff819acc00 T drm_crtc_vblank_restore +ffffffff819acfe0 T drm_legacy_modeset_ctl_ioctl +ffffffff819ad200 T drm_wait_vblank_ioctl +ffffffff819ad750 t drm_wait_vblank_reply +ffffffff819ad860 t drm_queue_vblank_event +ffffffff819adba0 T drm_handle_vblank +ffffffff819ade90 t drm_handle_vblank_events +ffffffff819ae120 T drm_crtc_handle_vblank +ffffffff819ae140 T drm_crtc_get_sequence_ioctl +ffffffff819ae310 T drm_crtc_queue_sequence_ioctl +ffffffff819ae5d0 t __get_vblank_counter +ffffffff819af000 T drm_handle_vblank_works +ffffffff819af1a0 T drm_vblank_cancel_pending_works +ffffffff819af2e0 T drm_vblank_work_schedule +ffffffff819af550 T drm_vblank_work_cancel_sync +ffffffff819af6a0 T drm_vblank_work_flush +ffffffff819af7d0 T drm_vblank_work_init +ffffffff819af840 T drm_vblank_worker_init +ffffffff819b0000 T drm_vma_offset_manager_init +ffffffff819b0040 T drm_vma_offset_manager_destroy +ffffffff819b0060 T drm_vma_offset_lookup_locked +ffffffff819b00f0 T drm_vma_offset_add +ffffffff819b0180 T drm_vma_offset_remove +ffffffff819b01d0 T drm_vma_node_allow +ffffffff819b01f0 t vma_node_allow +ffffffff819b0310 T drm_vma_node_allow_once +ffffffff819b0330 T drm_vma_node_revoke +ffffffff819b03b0 T drm_vma_node_is_allowed +ffffffff819b1000 T hdmi_avi_infoframe_init +ffffffff819b1070 T hdmi_avi_infoframe_check +ffffffff819b10c0 T hdmi_avi_infoframe_pack_only +ffffffff819b12c0 T hdmi_avi_infoframe_pack +ffffffff819b1320 T hdmi_spd_infoframe_init +ffffffff819b13e0 T hdmi_spd_infoframe_check +ffffffff819b1430 T hdmi_spd_infoframe_pack_only +ffffffff819b1570 T hdmi_spd_infoframe_pack +ffffffff819b16d0 T hdmi_audio_infoframe_init +ffffffff819b1720 T hdmi_audio_infoframe_check +ffffffff819b1770 T hdmi_audio_infoframe_pack_only +ffffffff819b18d0 T hdmi_audio_infoframe_pack +ffffffff819b1920 T hdmi_audio_infoframe_pack_for_dp +ffffffff819b1a10 T hdmi_vendor_infoframe_init +ffffffff819b1a70 T hdmi_vendor_infoframe_check +ffffffff819b1b10 T hdmi_vendor_infoframe_pack_only +ffffffff819b1cd0 T hdmi_vendor_infoframe_pack +ffffffff819b1d70 T hdmi_drm_infoframe_init +ffffffff819b1dd0 T hdmi_drm_infoframe_check +ffffffff819b1e20 T hdmi_drm_infoframe_pack_only +ffffffff819b2010 T hdmi_drm_infoframe_pack +ffffffff819b2060 T hdmi_infoframe_check +ffffffff819b21b0 T hdmi_infoframe_pack_only +ffffffff819b23d0 T hdmi_infoframe_pack +ffffffff819b2540 T hdmi_infoframe_log +ffffffff819b34c0 T hdmi_drm_infoframe_unpack_only +ffffffff819b35a0 T hdmi_infoframe_unpack +ffffffff819b4000 T list_sort +ffffffff819b5000 T radix_tree_lookup +ffffffff819b50b0 T radix_tree_iter_find +ffffffff819b5180 T radix_tree_delete +ffffffff819b5310 T radix_tree_iter_delete +ffffffff819b5330 T radix_tree_insert +ffffffff819b6000 T sort +ffffffff819b6040 t qsort +ffffffff819b8000 T drm_dp_dual_mode_read +ffffffff819b8110 T drm_dp_dual_mode_write +ffffffff819b81f0 T drm_dp_dual_mode_detect +ffffffff819b8490 T drm_dp_dual_mode_max_tmds_clock +ffffffff819b85b0 T drm_dp_dual_mode_get_tmds_output +ffffffff819b86d0 T drm_dp_dual_mode_set_tmds_output +ffffffff819b8950 T drm_dp_get_dual_mode_type_name +ffffffff819b89c0 T drm_lspcon_get_mode +ffffffff819b8be0 T drm_lspcon_set_mode +ffffffff819b9000 T drm_dp_channel_eq_ok +ffffffff819b9080 T drm_dp_clock_recovery_ok +ffffffff819b90f0 T drm_dp_get_adjust_request_voltage +ffffffff819b9130 T drm_dp_get_adjust_request_pre_emphasis +ffffffff819b9180 T drm_dp_get_adjust_tx_ffe_preset +ffffffff819b91c0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff819b9240 T drm_dp_128b132b_lane_symbol_locked +ffffffff819b92b0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff819b92e0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff819b9310 T drm_dp_128b132b_link_training_failed +ffffffff819b9340 T drm_dp_read_clock_recovery_delay +ffffffff819b9450 T drm_dp_read_channel_eq_delay +ffffffff819b9550 T drm_dp_128b132b_read_aux_rd_interval +ffffffff819b9600 T drm_dp_link_train_clock_recovery_delay +ffffffff819b9690 t __8b10b_clock_recovery_delay_us +ffffffff819b9710 T drm_dp_link_train_channel_eq_delay +ffffffff819b9780 T drm_dp_phy_name +ffffffff819b97c0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff819b97e0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff819b9850 T drm_dp_link_rate_to_bw_code +ffffffff819b98c0 T drm_dp_bw_code_to_link_rate +ffffffff819b9920 T drm_dp_dpcd_probe +ffffffff819b9a60 t drm_dp_dpcd_access +ffffffff819b9b90 T drm_dp_dpcd_read +ffffffff819b9cc0 T drm_dp_dpcd_write +ffffffff819b9dd0 T drm_dp_dpcd_read_link_status +ffffffff819b9df0 T drm_dp_dpcd_read_phy_link_status +ffffffff819b9ef0 T drm_dp_downstream_is_type +ffffffff819b9f40 T drm_dp_downstream_is_tmds +ffffffff819b9fb0 T drm_dp_send_real_edid_checksum +ffffffff819ba210 T drm_dp_read_dpcd_caps +ffffffff819ba3a0 T drm_dp_read_downstream_info +ffffffff819ba4a0 T drm_dp_downstream_max_dotclock +ffffffff819ba4f0 T drm_dp_downstream_max_tmds_clock +ffffffff819ba590 T drm_dp_downstream_min_tmds_clock +ffffffff819ba610 T drm_dp_downstream_max_bpc +ffffffff819ba6b0 T drm_dp_downstream_420_passthrough +ffffffff819ba710 T drm_dp_downstream_444_to_420_conversion +ffffffff819ba770 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff819ba7d0 T drm_dp_downstream_mode +ffffffff819ba860 T drm_dp_downstream_id +ffffffff819ba880 T drm_dp_downstream_debug +ffffffff819ba920 T drm_dp_subconnector_type +ffffffff819ba990 T drm_dp_set_subconnector_property +ffffffff819baa00 T drm_dp_read_sink_count_cap +ffffffff819baa50 T drm_dp_read_sink_count +ffffffff819baab0 T drm_dp_remote_aux_init +ffffffff819baae0 t drm_dp_aux_crc_work +ffffffff819bac50 T drm_dp_aux_init +ffffffff819bad00 T drm_dp_aux_register +ffffffff819bae20 T drm_dp_aux_unregister +ffffffff819bae50 T drm_dp_psr_setup_time +ffffffff819baea0 T drm_dp_start_crc +ffffffff819baf50 T drm_dp_stop_crc +ffffffff819bafe0 T drm_dp_read_desc +ffffffff819bb1a0 T drm_dp_dsc_sink_max_slice_count +ffffffff819bb230 T drm_dp_dsc_sink_line_buf_depth +ffffffff819bb270 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff819bb2e0 T drm_dp_read_lttpr_common_caps +ffffffff819bb3a0 T drm_dp_read_lttpr_phy_caps +ffffffff819bb460 T drm_dp_lttpr_count +ffffffff819bb4f0 T drm_dp_lttpr_max_link_rate +ffffffff819bb550 T drm_dp_lttpr_max_lane_count +ffffffff819bb580 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff819bb5b0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff819bb5e0 T drm_dp_get_phy_test_pattern +ffffffff819bb700 T drm_dp_set_phy_test_pattern +ffffffff819bb7c0 T drm_dp_vsc_sdp_log +ffffffff819bbaf0 T drm_dp_get_pcon_max_frl_bw +ffffffff819bbb40 T drm_dp_pcon_frl_prepare +ffffffff819bbb90 T drm_dp_pcon_is_frl_ready +ffffffff819bbbf0 T drm_dp_pcon_frl_configure_1 +ffffffff819bbcf0 T drm_dp_pcon_frl_configure_2 +ffffffff819bbd50 T drm_dp_pcon_reset_frl_config +ffffffff819bbda0 T drm_dp_pcon_frl_enable +ffffffff819bbe60 T drm_dp_pcon_hdmi_link_active +ffffffff819bbeb0 T drm_dp_pcon_hdmi_link_mode +ffffffff819bbf20 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff819bc020 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff819bc050 T drm_dp_pcon_dsc_max_slices +ffffffff819bc0e0 T drm_dp_pcon_dsc_max_slice_width +ffffffff819bc110 T drm_dp_pcon_dsc_bpp_incr +ffffffff819bc150 T drm_dp_pcon_pps_default +ffffffff819bc1d0 T drm_dp_pcon_pps_override_buf +ffffffff819bc270 T drm_dp_pcon_pps_override_param +ffffffff819bc340 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff819bc3e0 T drm_edp_backlight_set_level +ffffffff819bc4b0 T drm_edp_backlight_enable +ffffffff819bc6c0 t drm_edp_backlight_set_enable +ffffffff819bc800 T drm_edp_backlight_disable +ffffffff819bc840 T drm_edp_backlight_init +ffffffff819bcda0 T drm_panel_dp_aux_backlight +ffffffff819bcf30 t __128b132b_channel_eq_delay_us +ffffffff819bcfb0 t __8b10b_channel_eq_delay_us +ffffffff819bd030 t drm_dp_aux_get_crc +ffffffff819bd110 t drm_dp_i2c_xfer +ffffffff819bd380 t drm_dp_i2c_functionality +ffffffff819bd3b0 t drm_dp_i2c_do_msg +ffffffff819bd790 t lock_bus +ffffffff819bd7b0 t trylock_bus +ffffffff819bd800 t unlock_bus +ffffffff819bd820 t dp_aux_backlight_update_status +ffffffff819be000 T drm_dp_encode_sideband_req +ffffffff819be440 T drm_dp_decode_sideband_req +ffffffff819be970 T drm_dp_dump_sideband_msg_req_body +ffffffff819bed40 T drm_dp_mst_get_port_malloc +ffffffff819bed90 T drm_dp_mst_put_port_malloc +ffffffff819bee80 t kref_put +ffffffff819beec0 T drm_atomic_get_mst_payload_state +ffffffff819bef10 T drm_dp_mst_dpcd_read +ffffffff819bf1d0 T drm_dp_mst_dpcd_write +ffffffff819bf220 t drm_dp_send_dpcd_write +ffffffff819bf460 T drm_dp_mst_connector_late_register +ffffffff819bf4e0 T drm_dp_mst_connector_early_unregister +ffffffff819bf520 T drm_dp_send_power_updown_phy +ffffffff819bf760 t drm_dp_mst_topology_put_port +ffffffff819bf880 t drm_dp_mst_wait_tx_reply +ffffffff819bfc20 T drm_dp_send_query_stream_enc_status +ffffffff819bfee0 T drm_dp_add_payload_part1 +ffffffff819c0090 T drm_dp_remove_payload +ffffffff819c0230 T drm_dp_add_payload_part2 +ffffffff819c03f0 T drm_dp_get_vc_payload_bw +ffffffff819c0490 T drm_dp_read_mst_cap +ffffffff819c04f0 T drm_dp_mst_topology_mgr_set_mst +ffffffff819c07a0 t drm_dp_dpcd_write_payload +ffffffff819c0940 t drm_dp_mst_topology_put_mstb +ffffffff819c0a40 T drm_dp_mst_topology_mgr_suspend +ffffffff819c0b00 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff819c0b70 T drm_dp_mst_topology_mgr_resume +ffffffff819c0db0 T drm_dp_mst_hpd_irq_handle_event +ffffffff819c1d20 T drm_dp_mst_hpd_irq_send_new_request +ffffffff819c1da0 T drm_dp_mst_detect_port +ffffffff819c1f00 T drm_dp_mst_edid_read +ffffffff819c2000 T drm_dp_mst_get_edid +ffffffff819c2060 T drm_dp_atomic_find_time_slots +ffffffff819c2310 T drm_atomic_get_mst_topology_state +ffffffff819c2320 T drm_dp_atomic_release_time_slots +ffffffff819c2540 T drm_dp_mst_atomic_setup_commit +ffffffff819c26d0 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff819c2840 T drm_dp_mst_root_conn_atomic_check +ffffffff819c2960 T drm_dp_mst_update_slots +ffffffff819c29c0 T drm_dp_check_act_status +ffffffff819c2b50 T drm_dp_calc_pbn_mode +ffffffff819c2bb0 T drm_dp_mst_dump_topology +ffffffff819c2e30 t drm_dp_mst_dump_mstb +ffffffff819c2ea0 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff819c2fd0 T drm_dp_mst_dsc_aux_for_port +ffffffff819c3200 T drm_dp_mst_atomic_enable_dsc +ffffffff819c3380 T drm_dp_mst_atomic_check +ffffffff819c3670 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff819c38f0 t drm_dp_mst_duplicate_state +ffffffff819c3ac0 t drm_dp_mst_destroy_state +ffffffff819c3b80 T drm_atomic_get_old_mst_topology_state +ffffffff819c3b90 T drm_atomic_get_new_mst_topology_state +ffffffff819c3ba0 T drm_dp_mst_topology_mgr_init +ffffffff819c3e10 t drm_dp_mst_link_probe_work +ffffffff819c40a0 t drm_dp_tx_work +ffffffff819c40f0 t drm_dp_delayed_destroy_work +ffffffff819c45a0 t drm_dp_mst_up_req_work +ffffffff819c4ad0 T drm_dp_mst_topology_mgr_destroy +ffffffff819c4b60 t drm_dp_mst_is_virtual_dpcd +ffffffff819c4c40 t drm_dp_free_mst_branch_device +ffffffff819c4c80 t drm_dp_mst_topology_get_port_validated_locked +ffffffff819c4d00 t drm_dp_mst_dump_sideband_msg_tx +ffffffff819c4f10 t process_single_down_tx_qlock +ffffffff819c5080 t process_single_tx_qlock +ffffffff819c5550 t drm_dp_msg_data_crc4 +ffffffff819c5680 t drm_dp_payload_send_msg +ffffffff819c5ae0 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff819c5b60 t drm_dp_get_one_sb_msg +ffffffff819c62a0 t drm_dp_get_mst_branch_device +ffffffff819c6400 t drm_dp_check_and_send_link_address +ffffffff819c64d0 t drm_dp_send_link_address +ffffffff819c71a0 t drm_dp_send_enum_path_resources +ffffffff819c7400 t drm_dp_port_set_pdt +ffffffff819c76d0 t drm_dp_mst_port_add_connector +ffffffff819c78b0 t drm_dp_mst_i2c_xfer +ffffffff819c7fd0 t drm_dp_mst_i2c_functionality +ffffffff819c8000 t get_mst_branch_device_by_guid_helper +ffffffff819c9000 T drm_dsc_dp_pps_header_init +ffffffff819c9030 T drm_dsc_dp_rc_buffer_size +ffffffff819c9090 T drm_dsc_pps_payload_pack +ffffffff819c9350 T drm_dsc_set_const_params +ffffffff819c93a0 T drm_dsc_set_rc_buf_thresh +ffffffff819c9410 T drm_dsc_setup_rc_params +ffffffff819c95d0 T drm_dsc_compute_rc_parameters +ffffffff819c98d0 T drm_dsc_get_bpp_int +ffffffff819c9950 T drm_dsc_initial_scale_value +ffffffff819c9990 T drm_dsc_flatness_det_thresh +ffffffff819ca000 T drm_connector_attach_content_protection_property +ffffffff819ca030 T drm_hdcp_check_ksvs_revoked +ffffffff819ca080 T drm_hdcp_update_content_protection +ffffffff819cb000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff819cb120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff819cb180 T drm_hdmi_avi_infoframe_bars +ffffffff819cb1d0 T drm_hdmi_avi_infoframe_content_type +ffffffff819cc000 T drm_scdc_read +ffffffff819cc090 T drm_scdc_write +ffffffff819cc170 T drm_scdc_get_scrambling_status +ffffffff819cc250 T drm_scdc_set_scrambling +ffffffff819cc3e0 T drm_scdc_set_high_tmds_clock_ratio +ffffffff819cd000 T drm_gem_ttm_mmap +ffffffff819cd070 T drm_gem_ttm_vmap +ffffffff819cd080 T drm_gem_ttm_vunmap +ffffffff819ce000 T ttm_agp_bind +ffffffff819ce050 T ttm_agp_unbind +ffffffff819ce070 T ttm_agp_is_bound +ffffffff819ce0c0 T ttm_agp_destroy +ffffffff819ce0e0 T ttm_agp_tt_create +ffffffff819cf000 T ttm_bo_move_to_lru_tail +ffffffff819cf040 T ttm_bo_set_bulk_move +ffffffff819cf100 T ttm_bo_put +ffffffff819cf630 T ttm_bo_eviction_valuable +ffffffff819cf680 T ttm_mem_evict_first +ffffffff819cfda0 t ttm_bo_evict_swapout_allowable +ffffffff819cffb0 t dma_resv_unlock +ffffffff819d0050 t ttm_bo_cleanup_refs +ffffffff819d03b0 t ttm_bo_unreserve +ffffffff819d0490 T ttm_bo_pin +ffffffff819d0530 T ttm_bo_unpin +ffffffff819d0640 T ttm_bo_mem_space +ffffffff819d0880 t ttm_bo_add_move_fence +ffffffff819d0940 T ttm_bo_validate +ffffffff819d0ad0 T ttm_bo_init_reserved +ffffffff819d0cc0 T ttm_bo_init_validate +ffffffff819d0d60 T ttm_bo_unmap_virtual +ffffffff819d0e90 T ttm_bo_wait_ctx +ffffffff819d0f20 T ttm_bo_swapout +ffffffff819d11f0 t ttm_bo_handle_move_mem +ffffffff819d1370 T ttm_bo_tt_destroy +ffffffff819d13e0 t ttm_bo_delayed_delete +ffffffff819d2000 T ttm_mem_io_reserve +ffffffff819d2060 T ttm_mem_io_free +ffffffff819d20d0 T ttm_move_memcpy +ffffffff819d2290 T ttm_bo_move_memcpy +ffffffff819d24f0 T ttm_bo_move_sync_cleanup +ffffffff819d2600 T ttm_io_prot +ffffffff819d2640 T ttm_bo_kmap +ffffffff819d2920 T ttm_bo_kunmap +ffffffff819d2a50 T ttm_bo_vmap +ffffffff819d2c40 T ttm_bo_vunmap +ffffffff819d2d30 T ttm_bo_move_accel_cleanup +ffffffff819d3010 T ttm_bo_pipeline_gutting +ffffffff819d3210 t ttm_buffer_object_transfer +ffffffff819d3440 t ttm_transfered_destroy +ffffffff819d4000 T ttm_bo_vm_reserve +ffffffff819d4180 t dma_resv_lock_interruptible +ffffffff819d42a0 T ttm_bo_vm_fault_reserved +ffffffff819d45e0 T ttm_bo_vm_fault +ffffffff819d4740 T ttm_bo_vm_reference +ffffffff819d4770 T ttm_bo_vm_detach +ffffffff819d4780 T ttm_bo_mmap_obj +ffffffff819d5000 T ttm_global_swapout +ffffffff819d50e0 T ttm_device_swapout +ffffffff819d5200 T ttm_device_init +ffffffff819d5490 T ttm_device_fini +ffffffff819d5650 T ttm_device_clear_dma_mappings +ffffffff819d5700 t ttm_device_clear_lru_dma_mappings +ffffffff819d6000 T ttm_eu_backoff_reservation +ffffffff819d6130 T ttm_eu_reserve_buffers +ffffffff819d65c0 T ttm_eu_fence_buffer_objects +ffffffff819d6710 t __ww_mutex_lock +ffffffff819d7000 T ttm_prot_from_caching +ffffffff819d8000 T ttm_pool_alloc +ffffffff819d8a90 t ttm_pool_free_range +ffffffff819d8dc0 T ttm_pool_free +ffffffff819d8e20 t ttm_pool_shrink +ffffffff819d9000 T ttm_pool_init +ffffffff819d92b0 T ttm_pool_fini +ffffffff819d94f0 t ttm_pool_type_fini +ffffffff819d9730 T ttm_pool_mgr_init +ffffffff819d9a10 t ttm_pool_shrinker_count +ffffffff819d9a60 t ttm_pool_shrinker_scan +ffffffff819d9ab0 T ttm_pool_mgr_fini +ffffffff819da000 T ttm_range_man_init_nocheck +ffffffff819da180 T ttm_range_man_fini_nocheck +ffffffff819da310 t ttm_range_man_alloc +ffffffff819da460 t ttm_range_man_free +ffffffff819da4c0 t ttm_range_man_intersects +ffffffff819da520 t ttm_range_man_compatible +ffffffff819da580 t ttm_range_man_debug +ffffffff819db000 T ttm_lru_bulk_move_init +ffffffff819db020 T ttm_lru_bulk_move_tail +ffffffff819db1e0 T ttm_resource_add_bulk_move +ffffffff819db2b0 T ttm_resource_del_bulk_move +ffffffff819db3f0 T ttm_resource_move_to_lru_tail +ffffffff819db560 T ttm_resource_init +ffffffff819db650 T ttm_resource_fini +ffffffff819db6c0 T ttm_resource_alloc +ffffffff819db810 T ttm_resource_free +ffffffff819db9d0 T ttm_resource_intersects +ffffffff819dba30 T ttm_resource_compatible +ffffffff819dba90 T ttm_resource_compat +ffffffff819dbc20 T ttm_resource_set_bo +ffffffff819dbc70 T ttm_resource_manager_init +ffffffff819dbd20 T ttm_resource_manager_evict_all +ffffffff819dbef0 T ttm_resource_manager_usage +ffffffff819dbf50 T ttm_resource_manager_debug +ffffffff819dc040 T ttm_resource_manager_first +ffffffff819dc0d0 T ttm_resource_manager_next +ffffffff819dc1f0 T ttm_kmap_iter_iomap_init +ffffffff819dc250 T ttm_kmap_iter_linear_io_init +ffffffff819dc430 T ttm_kmap_iter_linear_io_fini +ffffffff819dc480 T ttm_resource_manager_create_debugfs +ffffffff819dc4b0 t ttm_kmap_iter_iomap_map_local +ffffffff819dc5a0 t ttm_kmap_iter_iomap_unmap_local +ffffffff819dc5d0 t ttm_kmap_iter_linear_io_map_local +ffffffff819dd000 T ttm_sys_man_init +ffffffff819dd130 t ttm_sys_man_alloc +ffffffff819dd1b0 t ttm_sys_man_free +ffffffff819de000 T ttm_tt_create +ffffffff819de100 T ttm_tt_destroy +ffffffff819de120 T ttm_tt_init +ffffffff819de210 T ttm_tt_fini +ffffffff819de320 T ttm_sg_tt_init +ffffffff819de550 T ttm_tt_swapin +ffffffff819de670 T ttm_tt_swapout +ffffffff819de6c0 T ttm_tt_populate +ffffffff819de830 T ttm_tt_unpopulate +ffffffff819de8e0 T ttm_tt_mgr_init +ffffffff819de940 T ttm_kmap_iter_tt_init +ffffffff819de9a0 T ttm_tt_pages_limit +ffffffff819de9d0 t ttm_kmap_iter_tt_map_local +ffffffff819dea30 t ttm_kmap_iter_tt_unmap_local +ffffffff819df000 T drm_sched_entity_init +ffffffff819df170 T drm_sched_entity_modify_sched +ffffffff819df1f0 T drm_sched_entity_is_ready +ffffffff819df230 T drm_sched_entity_error +ffffffff819df270 T drm_sched_entity_flush +ffffffff819df5b0 t drm_sched_entity_kill +ffffffff819df770 T drm_sched_entity_fini +ffffffff819df7e0 T drm_sched_entity_destroy +ffffffff819df880 T drm_sched_entity_set_priority +ffffffff819df8c0 T drm_sched_entity_pop_job +ffffffff819dfb10 T drm_sched_entity_select_rq +ffffffff819dfbe0 T drm_sched_entity_push_job +ffffffff819dfd30 t drm_sched_entity_kill_jobs_cb +ffffffff819dfe80 t drm_sched_entity_kill_jobs_work +ffffffff819dff00 t drm_sched_entity_clear_dep +ffffffff819dff20 t drm_sched_entity_wakeup +ffffffff819e0000 T drm_sched_fence_slab_init +ffffffff819e0060 T drm_sched_fence_slab_fini +ffffffff819e0080 T drm_sched_fence_scheduled +ffffffff819e00e0 T drm_sched_fence_finished +ffffffff819e0100 T drm_sched_fence_free +ffffffff819e01a0 T to_drm_sched_fence +ffffffff819e0200 T drm_sched_fence_alloc +ffffffff819e0280 T drm_sched_fence_init +ffffffff819e0300 t drm_sched_fence_get_driver_name +ffffffff819e0330 t drm_sched_fence_get_timeline_name +ffffffff819e0390 t drm_sched_fence_release_scheduled +ffffffff819e0480 t drm_sched_fence_release_finished +ffffffff819e04c0 t drm_sched_fence_set_deadline_finished +ffffffff819e1000 T drm_sched_rq_update_fifo +ffffffff819e10e0 T drm_sched_rq_add_entity +ffffffff819e1170 T drm_sched_rq_remove_entity +ffffffff819e1250 T drm_sched_fault +ffffffff819e12a0 T drm_sched_suspend_timeout +ffffffff819e1320 T drm_sched_resume_timeout +ffffffff819e13c0 T drm_sched_stop +ffffffff819e1590 T drm_sched_start +ffffffff819e16c0 t drm_sched_job_done_cb +ffffffff819e16e0 t drm_sched_job_done +ffffffff819e17b0 T drm_sched_resubmit_jobs +ffffffff819e1900 T drm_sched_job_init +ffffffff819e1990 T drm_sched_job_arm +ffffffff819e1a20 T drm_sched_job_add_dependency +ffffffff819e1b90 T drm_sched_job_add_syncobj_dependency +ffffffff819e1bf0 T drm_sched_job_add_resv_dependencies +ffffffff819e1ca0 T drm_sched_job_add_implicit_dependencies +ffffffff819e1d60 T drm_sched_job_cleanup +ffffffff819e1e10 T drm_sched_wakeup_if_can_queue +ffffffff819e1ed0 T drm_sched_pick_best +ffffffff819e1f80 T drm_sched_init +ffffffff819e2230 t drm_sched_job_timedout +ffffffff819e2380 t drm_sched_main +ffffffff819e27b0 T drm_sched_fini +ffffffff819e2990 T drm_sched_increase_karma +ffffffff819e2ab0 t __delayed_work_tick +ffffffff819e2ad0 t drm_sched_get_cleanup_job +ffffffff819e2c10 t drm_sched_select_entity +ffffffff819e3000 t ch7017_init +ffffffff819e3140 t ch7017_dpms +ffffffff819e3380 t ch7017_mode_valid +ffffffff819e33c0 t ch7017_mode_set +ffffffff819e3670 t ch7017_detect +ffffffff819e36a0 t ch7017_get_hw_state +ffffffff819e3730 t ch7017_destroy +ffffffff819e3780 t ch7017_dump_regs +ffffffff819e4000 t ch7xxx_init +ffffffff819e42a0 t ch7xxx_dpms +ffffffff819e4380 t ch7xxx_mode_valid +ffffffff819e43c0 t ch7xxx_mode_set +ffffffff819e4940 t ch7xxx_detect +ffffffff819e4b90 t ch7xxx_get_hw_state +ffffffff819e4c70 t ch7xxx_destroy +ffffffff819e4cc0 t ch7xxx_dump_regs +ffffffff819e5000 t ivch_init +ffffffff819e5390 t ivch_dpms +ffffffff819e5660 t ivch_mode_valid +ffffffff819e56a0 t ivch_mode_set +ffffffff819e5950 t ivch_detect +ffffffff819e5980 t ivch_get_hw_state +ffffffff819e5a70 t ivch_destroy +ffffffff819e5ac0 t ivch_dump_regs +ffffffff819e6660 t ivch_reset +ffffffff819e7000 t ns2501_init +ffffffff819e7200 t ns2501_dpms +ffffffff819e7920 t ns2501_mode_valid +ffffffff819e7a00 t ns2501_mode_set +ffffffff819e8c20 t ns2501_detect +ffffffff819e8c50 t ns2501_get_hw_state +ffffffff819e8d30 t ns2501_destroy +ffffffff819e9000 t sil164_init +ffffffff819e9200 t sil164_dpms +ffffffff819e9330 t sil164_mode_valid +ffffffff819e9360 t sil164_mode_set +ffffffff819e94f0 t sil164_detect +ffffffff819e95d0 t sil164_get_hw_state +ffffffff819e96a0 t sil164_destroy +ffffffff819e96f0 t sil164_dump_regs +ffffffff819ea000 t tfp410_init +ffffffff819ea100 t tfp410_dpms +ffffffff819ea230 t tfp410_mode_valid +ffffffff819ea260 t tfp410_mode_set +ffffffff819ea290 t tfp410_detect +ffffffff819ea370 t tfp410_get_hw_state +ffffffff819ea440 t tfp410_destroy +ffffffff819ea490 t tfp410_dump_regs +ffffffff819eaee0 t tfp410_getid +ffffffff819ec000 T vlv_get_dpll +ffffffff819ec040 T g4x_dp_set_clock +ffffffff819ec110 T g4x_dp_port_enabled +ffffffff819ec310 T vlv_active_pipe +ffffffff819ec370 T g4x_dp_init +ffffffff819ec810 t intel_dp_hotplug +ffffffff819ec960 t intel_dp_get_hw_state +ffffffff819eca10 t intel_dp_get_config +ffffffff819eccb0 t chv_dp_pre_pll_enable +ffffffff819eccf0 t chv_pre_enable_dp +ffffffff819ecd30 t vlv_enable_dp +ffffffff819ecd70 t vlv_disable_dp +ffffffff819ecde0 t chv_post_disable_dp +ffffffff819ece40 t chv_dp_post_pll_disable +ffffffff819ece60 t vlv_dp_pre_pll_enable +ffffffff819ecea0 t vlv_pre_enable_dp +ffffffff819ecee0 t vlv_post_disable_dp +ffffffff819ecf00 t g4x_pre_enable_dp +ffffffff819ed190 t g4x_enable_dp +ffffffff819ed1e0 t g4x_disable_dp +ffffffff819ed250 t g4x_post_disable_dp +ffffffff819ed430 t cpt_set_link_train +ffffffff819ed4f0 t g4x_set_link_train +ffffffff819ed5c0 t chv_set_signal_levels +ffffffff819ed6a0 t vlv_set_signal_levels +ffffffff819ed780 t ivb_cpu_edp_set_signal_levels +ffffffff819ed880 t snb_cpu_edp_set_signal_levels +ffffffff819ed980 t g4x_set_signal_levels +ffffffff819eda80 t intel_dp_preemph_max_3 +ffffffff819edab0 t intel_dp_voltage_max_3 +ffffffff819edae0 t intel_dp_preemph_max_2 +ffffffff819edb10 t intel_dp_voltage_max_2 +ffffffff819edb40 t g4x_digital_port_connected +ffffffff819edbe0 t ilk_digital_port_connected +ffffffff819edc50 t ibx_digital_port_connected +ffffffff819edcc0 t intel_dp_encoder_reset +ffffffff819eddc0 t intel_dp_encoder_destroy +ffffffff819ede20 t intel_dp_prepare +ffffffff819ee0b0 t intel_enable_dp +ffffffff819ee2f0 t intel_dp_link_down +ffffffff819ee630 t assert_dp_port +ffffffff819ef000 T g4x_hdmi_connector_atomic_check +ffffffff819ef150 T g4x_hdmi_init +ffffffff819ef4e0 t intel_hdmi_hotplug +ffffffff819ef530 t g4x_hdmi_compute_config +ffffffff819ef660 t pch_disable_hdmi +ffffffff819ef680 t pch_post_disable_hdmi +ffffffff819ef6a0 t g4x_disable_hdmi +ffffffff819ef6f0 t intel_hdmi_get_hw_state +ffffffff819ef7a0 t intel_hdmi_get_config +ffffffff819ef940 t chv_hdmi_pre_pll_enable +ffffffff819ef980 t chv_hdmi_pre_enable +ffffffff819efad0 t vlv_enable_hdmi +ffffffff819efb50 t chv_hdmi_post_disable +ffffffff819efbb0 t chv_hdmi_post_pll_disable +ffffffff819efbd0 t vlv_hdmi_pre_pll_enable +ffffffff819efc10 t vlv_hdmi_pre_enable +ffffffff819efd50 t vlv_hdmi_post_disable +ffffffff819efd70 t intel_hdmi_pre_enable +ffffffff819efdf0 t cpt_enable_hdmi +ffffffff819f0010 t ibx_enable_hdmi +ffffffff819f0220 t g4x_enable_hdmi +ffffffff819f0330 t intel_disable_hdmi +ffffffff819f0530 t intel_hdmi_prepare +ffffffff819f1000 T hsw_ips_disable +ffffffff819f1150 T hsw_ips_pre_update +ffffffff819f11f0 T hsw_ips_post_update +ffffffff819f1410 T hsw_crtc_supports_ips +ffffffff819f1470 T hsw_crtc_state_ips_capable +ffffffff819f1510 T hsw_ips_compute_config +ffffffff819f1650 T hsw_ips_get_config +ffffffff819f16f0 T hsw_ips_crtc_debugfs_add +ffffffff819f2000 T i9xx_check_plane_surface +ffffffff819f22d0 T i965_plane_max_stride +ffffffff819f2340 T intel_primary_plane_create +ffffffff819f27d0 t i9xx_plane_min_cdclk +ffffffff819f2840 t i9xx_plane_max_stride +ffffffff819f28b0 t hsw_primary_max_stride +ffffffff819f2900 t ilk_primary_max_stride +ffffffff819f2970 t i830_plane_update_arm +ffffffff819f29b0 t i9xx_plane_update_noarm +ffffffff819f2ae0 t i9xx_plane_update_arm +ffffffff819f2e90 t i9xx_plane_disable_arm +ffffffff819f2fa0 t i9xx_plane_get_hw_state +ffffffff819f3080 t i9xx_plane_check +ffffffff819f3190 t vlv_primary_async_flip +ffffffff819f3220 t vlv_primary_enable_flip_done +ffffffff819f3280 t vlv_primary_disable_flip_done +ffffffff819f32e0 t g4x_primary_async_flip +ffffffff819f3410 t bdw_primary_enable_flip_done +ffffffff819f3470 t bdw_primary_disable_flip_done +ffffffff819f34d0 t ivb_primary_enable_flip_done +ffffffff819f3530 t ivb_primary_disable_flip_done +ffffffff819f3590 t ilk_primary_enable_flip_done +ffffffff819f35f0 t ilk_primary_disable_flip_done +ffffffff819f3650 T i9xx_get_initial_plane_config +ffffffff819f3a50 t i965_plane_format_mod_supported +ffffffff819f3b40 t i8xx_plane_format_mod_supported +ffffffff819f3be0 t i9xx_plane_ctl +ffffffff819f4000 T intel_set_memory_cxsr +ffffffff819f40a0 t _intel_set_memory_cxsr +ffffffff819f4350 T ilk_disable_lp_wm +ffffffff819f4430 T ilk_wm_sanitize +ffffffff819f4710 T i9xx_wm_init +ffffffff819f4d30 t intel_get_cxsr_latency +ffffffff819f4df0 t ilk_compute_pipe_wm +ffffffff819f5160 t ilk_compute_intermediate_wm +ffffffff819f5370 t ilk_initial_watermarks +ffffffff819f53f0 t ilk_optimize_watermarks +ffffffff819f54a0 t ilk_wm_get_hw_state +ffffffff819f58a0 t ilk_compute_wm_level +ffffffff819f5d60 t ilk_validate_wm_level +ffffffff819f5ea0 t ilk_compute_wm_maximums +ffffffff819f60d0 t ilk_program_watermarks +ffffffff819f6e60 t ilk_wm_merge +ffffffff819f7110 t vlv_compute_pipe_wm +ffffffff819f7ac0 t vlv_compute_intermediate_wm +ffffffff819f7de0 t vlv_initial_watermarks +ffffffff819f7e60 t vlv_atomic_update_fifo +ffffffff819f8170 t vlv_optimize_watermarks +ffffffff819f8230 t vlv_wm_get_hw_state_and_sanitize +ffffffff819f8f80 t _vlv_compute_pipe_wm +ffffffff819f92a0 t vlv_invalidate_wms +ffffffff819f9410 t vlv_program_watermarks +ffffffff819f9b60 t chv_set_memory_dvfs +ffffffff819f9d20 t g4x_compute_pipe_wm +ffffffff819fa5f0 t g4x_compute_intermediate_wm +ffffffff819faa50 t g4x_initial_watermarks +ffffffff819faaf0 t g4x_optimize_watermarks +ffffffff819fabd0 t g4x_wm_get_hw_state_and_sanitize +ffffffff819fb550 t _g4x_compute_pipe_wm +ffffffff819fb810 t g4x_program_watermarks +ffffffff819fbbb0 t pnv_update_wm +ffffffff819fc260 t i965_update_wm +ffffffff819fc630 t i9xx_update_wm +ffffffff819fcdd0 t i845_update_wm +ffffffff819fd000 T icl_dsi_frame_update +ffffffff819fd0b0 T icl_dsi_init +ffffffff819fd930 t gen11_dsi_pre_pll_enable +ffffffff819fdd40 t gen11_dsi_pre_enable +ffffffff81a00a10 t gen11_dsi_enable +ffffffff81a00cc0 t gen11_dsi_disable +ffffffff81a00cf0 t gen11_dsi_post_disable +ffffffff81a01950 t gen11_dsi_get_config +ffffffff81a01b70 t gen11_dsi_sync_state +ffffffff81a01c20 t gen11_dsi_compute_config +ffffffff81a01fb0 t gen11_dsi_get_hw_state +ffffffff81a02150 t gen11_dsi_initial_fastset_check +ffffffff81a021d0 t gen11_dsi_get_power_domains +ffffffff81a022b0 t gen11_dsi_gate_clocks +ffffffff81a02370 t gen11_dsi_is_clock_enabled +ffffffff81a02430 t gen11_dsi_encoder_destroy +ffffffff81a02440 t wait_for_cmds_dispatched_to_panel +ffffffff81a028a0 t wait_for_header_credits +ffffffff81a02a30 t wait_for_payload_credits +ffffffff81a02bc0 t gen11_dsi_mode_valid +ffffffff81a02c30 t gen11_dsi_host_attach +ffffffff81a02c60 t gen11_dsi_host_detach +ffffffff81a02c90 t gen11_dsi_host_transfer +ffffffff81a03000 T intel_digital_connector_atomic_get_property +ffffffff81a03090 T intel_digital_connector_atomic_set_property +ffffffff81a03110 T intel_digital_connector_atomic_check +ffffffff81a03210 T intel_digital_connector_duplicate_state +ffffffff81a03290 T intel_connector_needs_modeset +ffffffff81a03300 T intel_any_crtc_needs_modeset +ffffffff81a03390 T intel_atomic_get_digital_connector_state +ffffffff81a033a0 T intel_crtc_duplicate_state +ffffffff81a034d0 T intel_crtc_free_hw_state +ffffffff81a03530 T intel_crtc_destroy_state +ffffffff81a035e0 T intel_atomic_state_alloc +ffffffff81a03660 T intel_atomic_state_free +ffffffff81a036a0 T intel_atomic_state_clear +ffffffff81a036f0 T intel_atomic_get_crtc_state +ffffffff81a04000 T intel_plane_alloc +ffffffff81a040c0 T intel_plane_free +ffffffff81a04100 T intel_plane_destroy_state +ffffffff81a041d0 T intel_plane_duplicate_state +ffffffff81a04280 T intel_adjusted_rate +ffffffff81a04300 T intel_plane_pixel_rate +ffffffff81a04390 T intel_plane_data_rate +ffffffff81a04450 T intel_plane_calc_min_cdclk +ffffffff81a045b0 T intel_plane_copy_uapi_to_hw_state +ffffffff81a04720 T intel_plane_copy_hw_state +ffffffff81a04810 T intel_plane_set_invisible +ffffffff81a04910 T intel_plane_atomic_check_with_state +ffffffff81a05580 T intel_plane_atomic_check +ffffffff81a056e0 T intel_plane_update_noarm +ffffffff81a05720 T intel_plane_update_arm +ffffffff81a05760 T intel_plane_disable_arm +ffffffff81a05780 T intel_crtc_planes_update_noarm +ffffffff81a058a0 T intel_crtc_planes_update_arm +ffffffff81a05c90 T intel_atomic_plane_check_clipping +ffffffff81a05ef0 T intel_plane_check_src_coordinates +ffffffff81a060b0 T intel_plane_helper_add +ffffffff81a060f0 t intel_prepare_plane_fb +ffffffff81a06350 t intel_cleanup_plane_fb +ffffffff81a07000 T intel_audio_sdp_split_update +ffffffff81a070d0 T intel_audio_compute_config +ffffffff81a07180 T intel_audio_codec_enable +ffffffff81a07370 T intel_audio_codec_disable +ffffffff81a075c0 T intel_audio_codec_get_config +ffffffff81a07610 T intel_audio_hooks_init +ffffffff81a07690 T intel_audio_cdclk_change_pre +ffffffff81a07720 T intel_audio_cdclk_change_post +ffffffff81a07800 T intel_audio_init +ffffffff81a07810 T intel_audio_deinit +ffffffff81a07860 t g4x_audio_codec_enable +ffffffff81a07a20 t g4x_audio_codec_disable +ffffffff81a07aa0 t g4x_audio_codec_get_config +ffffffff81a07bb0 t ibx_audio_codec_enable +ffffffff81a07d70 t ibx_audio_codec_disable +ffffffff81a07f40 t intel_acomp_get_config +ffffffff81a07fc0 t audio_config_hdmi_pixel_clock +ffffffff81a08190 t hsw_audio_codec_enable +ffffffff81a089d0 t hsw_audio_codec_disable +ffffffff81a09000 T intel_backlight_invert_pwm_level +ffffffff81a090c0 T intel_backlight_set_pwm_level +ffffffff81a09130 T intel_backlight_level_to_pwm +ffffffff81a09320 T intel_backlight_level_from_pwm +ffffffff81a094c0 T intel_backlight_set_acpi +ffffffff81a096d0 T intel_backlight_disable +ffffffff81a097b0 T intel_backlight_enable +ffffffff81a09850 t __intel_backlight_enable +ffffffff81a09990 T intel_backlight_device_register +ffffffff81a09c50 t kasprintf +ffffffff81a09d20 T intel_backlight_device_unregister +ffffffff81a09d70 T intel_backlight_update +ffffffff81a09e10 T intel_backlight_setup +ffffffff81a09fc0 T intel_backlight_destroy +ffffffff81a09ff0 T intel_backlight_init_funcs +ffffffff81a0a150 t intel_backlight_device_update_status +ffffffff81a0a380 t intel_backlight_device_get_brightness +ffffffff81a0a500 t bxt_setup_backlight +ffffffff81a0a740 t bxt_get_backlight +ffffffff81a0a780 t bxt_set_backlight +ffffffff81a0a7c0 t bxt_disable_backlight +ffffffff81a0a8f0 t bxt_enable_backlight +ffffffff81a0ab70 t bxt_hz_to_pwm +ffffffff81a0abb0 t cnp_setup_backlight +ffffffff81a0ae60 t cnp_disable_backlight +ffffffff81a0af20 t cnp_enable_backlight +ffffffff81a0b0e0 t cnp_hz_to_pwm +ffffffff81a0b120 t lpt_setup_backlight +ffffffff81a0b480 t lpt_get_backlight +ffffffff81a0b4e0 t lpt_set_backlight +ffffffff81a0b550 t lpt_disable_backlight +ffffffff81a0b670 t lpt_enable_backlight +ffffffff81a0b870 t lpt_hz_to_pwm +ffffffff81a0b8e0 t pch_get_backlight +ffffffff81a0b940 t spt_hz_to_pwm +ffffffff81a0b990 t pch_setup_backlight +ffffffff81a0bba0 t pch_set_backlight +ffffffff81a0bc10 t pch_disable_backlight +ffffffff81a0bd00 t pch_enable_backlight +ffffffff81a0bf50 t pch_hz_to_pwm +ffffffff81a0bf90 t ext_pwm_setup_backlight +ffffffff81a0c040 t ext_pwm_get_backlight +ffffffff81a0c090 t ext_pwm_set_backlight +ffffffff81a0c0b0 t ext_pwm_disable_backlight +ffffffff81a0c0d0 t ext_pwm_enable_backlight +ffffffff81a0c100 t vlv_setup_backlight +ffffffff81a0c350 t vlv_get_backlight +ffffffff81a0c3f0 t vlv_set_backlight +ffffffff81a0c470 t vlv_disable_backlight +ffffffff81a0c530 t vlv_enable_backlight +ffffffff81a0c6d0 t vlv_hz_to_pwm +ffffffff81a0c770 t i965_setup_backlight +ffffffff81a0c9b0 t i9xx_get_backlight +ffffffff81a0ca50 t i9xx_set_backlight +ffffffff81a0cb90 t i965_disable_backlight +ffffffff81a0cc40 t i965_enable_backlight +ffffffff81a0cdf0 t i965_hz_to_pwm +ffffffff81a0ce50 t i9xx_setup_backlight +ffffffff81a0d190 t i9xx_disable_backlight +ffffffff81a0d200 t i9xx_enable_backlight +ffffffff81a0d3b0 t i9xx_hz_to_pwm +ffffffff81a0d410 t intel_pwm_setup_backlight +ffffffff81a0d520 t intel_pwm_get_backlight +ffffffff81a0d5f0 t intel_pwm_set_backlight +ffffffff81a0d6b0 t intel_pwm_disable_backlight +ffffffff81a0d770 t intel_pwm_enable_backlight +ffffffff81a0e000 T intel_bios_encoder_port +ffffffff81a0e080 t dvo_port_to_port +ffffffff81a0e260 T intel_bios_dp_max_link_rate +ffffffff81a0e2e0 T intel_bios_dp_max_lane_count +ffffffff81a0e330 T intel_bios_encoder_supports_dvi +ffffffff81a0e360 T intel_bios_encoder_supports_hdmi +ffffffff81a0e3a0 T intel_bios_encoder_supports_dp +ffffffff81a0e3d0 T intel_bios_encoder_supports_edp +ffffffff81a0e410 T intel_bios_encoder_supports_dsi +ffffffff81a0e440 T intel_bios_encoder_is_lspcon +ffffffff81a0e490 T intel_bios_hdmi_level_shift +ffffffff81a0e4f0 T intel_bios_hdmi_max_tmds_clock +ffffffff81a0e580 T intel_bios_is_valid_vbt +ffffffff81a0e670 T intel_bios_init +ffffffff81a10500 T intel_bios_init_panel_early +ffffffff81a10520 t intel_bios_init_panel +ffffffff81a12630 T intel_bios_init_panel_late +ffffffff81a12650 T intel_bios_driver_remove +ffffffff81a12740 T intel_bios_fini_panel +ffffffff81a12820 T intel_bios_is_tv_present +ffffffff81a128a0 T intel_bios_is_lvds_present +ffffffff81a12950 T intel_bios_is_port_present +ffffffff81a12a20 T intel_bios_encoder_supports_dp_dual_mode +ffffffff81a12a90 T intel_bios_is_dsi_present +ffffffff81a12b60 T intel_bios_get_dsc_params +ffffffff81a12d80 T intel_bios_dp_aux_ch +ffffffff81a12e80 T intel_bios_dp_has_shared_aux_ch +ffffffff81a12f10 T intel_bios_dp_boost_level +ffffffff81a12fa0 T intel_bios_hdmi_boost_level +ffffffff81a13030 T intel_bios_hdmi_ddc_pin +ffffffff81a13190 T intel_bios_encoder_supports_typec_usb +ffffffff81a131e0 T intel_bios_encoder_supports_tbt +ffffffff81a13230 T intel_bios_encoder_lane_reversal +ffffffff81a13270 T intel_bios_encoder_hpd_invert +ffffffff81a132b0 T intel_bios_encoder_data_lookup +ffffffff81a13370 T intel_bios_for_each_encoder +ffffffff81a133f0 t opregion_get_panel_type +ffffffff81a13410 t vbt_get_panel_type +ffffffff81a13500 t pnpid_get_panel_type +ffffffff81a136e0 t fallback_get_panel_type +ffffffff81a13710 t fill_detail_timing_data +ffffffff81a14000 T icl_pcode_restrict_qgv_points +ffffffff81a14120 T intel_bw_init_hw +ffffffff81a14290 t tgl_get_bw_info +ffffffff81a14880 t icl_get_bw_info +ffffffff81a14c50 T intel_bw_crtc_update +ffffffff81a14d30 t intel_bw_crtc_data_rate +ffffffff81a14e50 T intel_atomic_get_old_bw_state +ffffffff81a14e70 T intel_atomic_get_new_bw_state +ffffffff81a14e90 T intel_atomic_get_bw_state +ffffffff81a14eb0 T intel_bw_min_cdclk +ffffffff81a15130 T intel_bw_calc_min_cdclk +ffffffff81a154f0 T intel_bw_atomic_check +ffffffff81a15f60 T intel_bw_init +ffffffff81a15fd0 t icl_get_qgv_points +ffffffff81a16540 t skl_plane_calc_dbuf_bw +ffffffff81a16680 t intel_bw_duplicate_state +ffffffff81a166f0 t intel_bw_destroy_state +ffffffff81a17000 T intel_cdclk_get_cdclk +ffffffff81a17020 T intel_cdclk_init_hw +ffffffff81a177d0 T intel_cdclk_uninit_hw +ffffffff81a178e0 T intel_cdclk_needs_modeset +ffffffff81a17920 T intel_cdclk_dump_config +ffffffff81a179a0 T intel_set_cdclk_pre_plane_update +ffffffff81a17ce0 t intel_set_cdclk +ffffffff81a180b0 T intel_set_cdclk_post_plane_update +ffffffff81a18340 T intel_crtc_compute_min_cdclk +ffffffff81a186d0 T intel_atomic_get_cdclk_state +ffffffff81a186f0 T intel_cdclk_atomic_check +ffffffff81a187f0 T intel_cdclk_init +ffffffff81a18860 T intel_modeset_calc_cdclk +ffffffff81a18e90 t intel_cdclk_can_crawl +ffffffff81a18f20 T intel_update_max_cdclk +ffffffff81a19280 T intel_update_cdclk +ffffffff81a19320 T intel_read_rawclk +ffffffff81a194a0 t i9xx_hrawclk +ffffffff81a19550 T intel_cdclk_debugfs_register +ffffffff81a19580 T intel_init_cdclk_hooks +ffffffff81a199a0 t bxt_set_cdclk +ffffffff81a1a020 t _bxt_set_cdclk +ffffffff81a1a7e0 t skl_set_cdclk +ffffffff81a1adf0 t intel_cdclk_duplicate_state +ffffffff81a1ae70 t intel_cdclk_destroy_state +ffffffff81a1ae90 t bxt_get_cdclk +ffffffff81a1b0c0 t bxt_modeset_calc_cdclk +ffffffff81a1b510 t tgl_calc_voltage_level +ffffffff81a1b560 t intel_compute_min_cdclk +ffffffff81a1b760 t rplu_calc_voltage_level +ffffffff81a1b7b0 t ehl_calc_voltage_level +ffffffff81a1b800 t icl_calc_voltage_level +ffffffff81a1b850 t bxt_calc_voltage_level +ffffffff81a1b8a0 t skl_get_cdclk +ffffffff81a1bab0 t skl_modeset_calc_cdclk +ffffffff81a1bcc0 t bdw_get_cdclk +ffffffff81a1bdb0 t bdw_set_cdclk +ffffffff81a1c340 t bdw_modeset_calc_cdclk +ffffffff81a1c440 t hsw_get_cdclk +ffffffff81a1c510 t fixed_modeset_calc_cdclk +ffffffff81a1c550 t vlv_get_cdclk +ffffffff81a1c610 t chv_set_cdclk +ffffffff81a1c980 t vlv_modeset_calc_cdclk +ffffffff81a1cb50 t vlv_set_cdclk +ffffffff81a1d090 t fixed_400mhz_get_cdclk +ffffffff81a1d0c0 t fixed_450mhz_get_cdclk +ffffffff81a1d0f0 t gm45_get_cdclk +ffffffff81a1d1f0 t intel_hpll_vco +ffffffff81a1d320 t g33_get_cdclk +ffffffff81a1d430 t i965gm_get_cdclk +ffffffff81a1d530 t pnv_get_cdclk +ffffffff81a1d5e0 t i945gm_get_cdclk +ffffffff81a1d650 t i915gm_get_cdclk +ffffffff81a1d6c0 t fixed_333mhz_get_cdclk +ffffffff81a1d6f0 t fixed_266mhz_get_cdclk +ffffffff81a1d720 t i85x_get_cdclk +ffffffff81a1d7a0 t fixed_200mhz_get_cdclk +ffffffff81a1d7d0 t fixed_133mhz_get_cdclk +ffffffff81a1e000 T intel_color_load_luts +ffffffff81a1e030 T intel_color_commit_noarm +ffffffff81a1e080 T intel_color_commit_arm +ffffffff81a1e0b0 T intel_color_post_update +ffffffff81a1e100 T intel_color_prepare_commit +ffffffff81a1e130 T intel_color_cleanup_commit +ffffffff81a1e180 T intel_color_check +ffffffff81a1e1a0 T intel_color_get_config +ffffffff81a1e220 T intel_color_lut_equal +ffffffff81a1e280 T intel_color_assert_luts +ffffffff81a1e570 T intel_color_crtc_init +ffffffff81a1e5e0 T intel_color_init +ffffffff81a1e710 T intel_color_init_hooks +ffffffff81a1e840 t chv_color_check +ffffffff81a1ed50 t i9xx_color_commit_arm +ffffffff81a1ed60 t chv_load_luts +ffffffff81a1f160 t chv_read_luts +ffffffff81a1f3e0 t chv_lut_equal +ffffffff81a1f710 t chv_read_csc +ffffffff81a1f830 t intel_color_add_affected_planes +ffffffff81a1f9a0 t _check_luts +ffffffff81a1fb00 t i965_load_luts +ffffffff81a1fe70 t i965_read_luts +ffffffff81a20240 t vlv_color_check +ffffffff81a206e0 t vlv_load_luts +ffffffff81a20890 t i965_lut_equal +ffffffff81a20a70 t vlv_read_csc +ffffffff81a20c50 t i9xx_color_check +ffffffff81a20ed0 t i9xx_load_luts +ffffffff81a21340 t i9xx_read_luts +ffffffff81a216e0 t i9xx_lut_equal +ffffffff81a218f0 t icl_color_check +ffffffff81a21cf0 t icl_color_commit_noarm +ffffffff81a21fb0 t icl_color_commit_arm +ffffffff81a22090 t icl_load_luts +ffffffff81a228a0 t icl_read_luts +ffffffff81a22bc0 t icl_lut_equal +ffffffff81a22f30 t icl_read_csc +ffffffff81a231e0 t ilk_csc_convert_ctm +ffffffff81a23600 t ilk_update_pipe_csc +ffffffff81a23850 t glk_load_degamma_lut +ffffffff81a23af0 t ivb_load_lut_ext_max +ffffffff81a23c20 t glk_load_lut_ext2_max +ffffffff81a23d50 t bdw_load_lut_10 +ffffffff81a23f90 t glk_read_degamma_lut +ffffffff81a24110 t bdw_read_lut_10 +ffffffff81a24290 t ilk_read_pipe_csc +ffffffff81a244c0 t icl_color_post_update +ffffffff81a244f0 t glk_color_check +ffffffff81a249e0 t skl_color_commit_noarm +ffffffff81a24a30 t skl_color_commit_arm +ffffffff81a24b50 t glk_load_luts +ffffffff81a24d00 t glk_read_luts +ffffffff81a24e80 t glk_lut_equal +ffffffff81a251a0 t skl_read_csc +ffffffff81a251f0 t ilk_csc_limited_range +ffffffff81a25290 t ilk_assign_csc +ffffffff81a25590 t ivb_color_check +ffffffff81a25be0 t bdw_load_luts +ffffffff81a25dc0 t bdw_read_luts +ffffffff81a25fb0 t ivb_lut_equal +ffffffff81a26370 t ilk_assign_luts +ffffffff81a26590 t ilk_color_commit_noarm +ffffffff81a265e0 t hsw_color_commit_arm +ffffffff81a26690 t ilk_read_csc +ffffffff81a266e0 t ivb_load_luts +ffffffff81a268c0 t ivb_read_luts +ffffffff81a26d70 t ivb_load_lut_10 +ffffffff81a26f70 t ilk_color_commit_arm +ffffffff81a26ff0 t ilk_color_check +ffffffff81a27250 t ilk_load_luts +ffffffff81a274e0 t ilk_read_luts +ffffffff81a27740 t ilk_lut_equal +ffffffff81a28000 T intel_combo_phy_power_up_lanes +ffffffff81a28120 T intel_combo_phy_init +ffffffff81a285d0 T intel_combo_phy_uninit +ffffffff81a287a0 t icl_combo_phy_verify_state +ffffffff81a29000 T intel_connector_init +ffffffff81a29070 T intel_connector_alloc +ffffffff81a29100 T intel_connector_free +ffffffff81a29140 T intel_connector_destroy +ffffffff81a291a0 T intel_connector_register +ffffffff81a291b0 T intel_connector_unregister +ffffffff81a291c0 T intel_connector_attach_encoder +ffffffff81a291e0 T intel_connector_get_hw_state +ffffffff81a29230 T intel_connector_get_pipe +ffffffff81a292f0 T intel_connector_update_modes +ffffffff81a29320 T intel_ddc_get_modes +ffffffff81a29390 T intel_attach_force_audio_property +ffffffff81a29430 T intel_attach_broadcast_rgb_property +ffffffff81a294d0 T intel_attach_aspect_ratio_property +ffffffff81a29530 T intel_attach_hdmi_colorspace_property +ffffffff81a29580 T intel_attach_dp_colorspace_property +ffffffff81a295d0 T intel_attach_scaling_mode_property +ffffffff81a2a000 T intel_crt_port_enabled +ffffffff81a2a080 T intel_crt_reset +ffffffff81a2a160 T intel_crt_init +ffffffff81a2a590 t hsw_crt_get_config +ffffffff81a2a640 t hsw_crt_compute_config +ffffffff81a2a730 t hsw_pre_pll_enable_crt +ffffffff81a2a7a0 t hsw_pre_enable_crt +ffffffff81a2a840 t hsw_enable_crt +ffffffff81a2a9e0 t hsw_disable_crt +ffffffff81a2aa50 t hsw_post_disable_crt +ffffffff81a2abf0 t pch_crt_compute_config +ffffffff81a2ac40 t pch_disable_crt +ffffffff81a2ac70 t pch_post_disable_crt +ffffffff81a2ad60 t intel_crt_compute_config +ffffffff81a2adb0 t intel_disable_crt +ffffffff81a2aea0 t intel_crt_get_config +ffffffff81a2af40 t intel_crt_get_hw_state +ffffffff81a2b000 t intel_enable_crt +ffffffff81a2b0f0 t intel_spurious_crt_detect_dmi_callback +ffffffff81a2b150 t intel_crt_get_modes +ffffffff81a2b250 t intel_crt_detect +ffffffff81a2b4c0 t intel_crt_mode_valid +ffffffff81a2b5d0 t intel_crt_get_edid +ffffffff81a2b670 t intel_crt_detect_hotplug +ffffffff81a2bac0 t intel_crt_detect_ddc +ffffffff81a2bb90 t intel_crt_load_detect +ffffffff81a2d000 T intel_first_crtc +ffffffff81a2d020 T intel_crtc_for_pipe +ffffffff81a2d080 T intel_crtc_wait_for_next_vblank +ffffffff81a2d090 T intel_wait_for_vblank_if_active +ffffffff81a2d100 T intel_crtc_get_vblank_counter +ffffffff81a2d180 T intel_crtc_max_vblank_count +ffffffff81a2d210 T intel_crtc_vblank_on +ffffffff81a2d2a0 t assert_vblank_disabled +ffffffff81a2d380 T intel_crtc_vblank_off +ffffffff81a2d3b0 T intel_crtc_state_alloc +ffffffff81a2d450 T intel_crtc_state_reset +ffffffff81a2d4d0 T intel_crtc_init +ffffffff81a2d850 T intel_wait_for_vblank_workers +ffffffff81a2d910 T intel_usecs_to_scanlines +ffffffff81a2d960 T intel_pipe_update_start +ffffffff81a2dda0 T intel_pipe_update_end +ffffffff81a2e0a0 t intel_crtc_destroy +ffffffff81a2e0d0 t intel_crtc_late_register +ffffffff81a2e100 t intel_crtc_vblank_work +ffffffff81a2f000 T intel_output_format_name +ffffffff81a2f040 T intel_crtc_state_dump +ffffffff81a30430 t ilk_dump_csc +ffffffff81a31000 T intel_cursor_plane_create +ffffffff81a31200 t i845_cursor_max_stride +ffffffff81a31230 t i845_cursor_update_arm +ffffffff81a31490 t i845_cursor_disable_arm +ffffffff81a314b0 t i845_cursor_get_hw_state +ffffffff81a31560 t i845_check_cursor +ffffffff81a31700 t i9xx_cursor_max_stride +ffffffff81a31740 t i9xx_cursor_update_arm +ffffffff81a31af0 t i9xx_cursor_disable_arm +ffffffff81a31b10 t i9xx_cursor_get_hw_state +ffffffff81a31c00 t i9xx_check_cursor +ffffffff81a31e80 t intel_check_cursor +ffffffff81a32090 t intel_legacy_cursor_update +ffffffff81a32450 t intel_cursor_format_mod_supported +ffffffff81a33000 T intel_is_c10phy +ffffffff81a33040 T intel_cx0_phy_set_signal_levels +ffffffff81a33630 t intel_cx0_rmw +ffffffff81a33720 T intel_c10pll_readout_hw_state +ffffffff81a338b0 T intel_c10pll_dump_hw_state +ffffffff81a33b30 T intel_cx0_phy_check_hdmi_link_rate +ffffffff81a33ca0 T intel_cx0pll_calc_state +ffffffff81a340b0 T intel_c20pll_readout_hw_state +ffffffff81a345d0 t intel_c20_sram_read +ffffffff81a346e0 T intel_c20pll_dump_hw_state +ffffffff81a34a90 T intel_c10pll_calc_port_clock +ffffffff81a34b70 T intel_c20pll_calc_port_clock +ffffffff81a34c70 T intel_mtl_tbt_calc_port_clock +ffffffff81a34dd0 T intel_mtl_pll_enable +ffffffff81a365e0 T intel_mtl_pll_disable +ffffffff81a36a60 T intel_mtl_port_pll_type +ffffffff81a36af0 T intel_c10pll_state_verify +ffffffff81a36de0 t __intel_cx0_read +ffffffff81a37170 t __intel_cx0_write +ffffffff81a374c0 t intel_cx0_bus_reset +ffffffff81a375f0 t intel_cx0_wait_for_ack +ffffffff81a37770 t intel_cx0_powerdown_change_sequence +ffffffff81a379d0 t intel_c20_sram_write +ffffffff81a38000 T hsw_prepare_dp_ddi_buffers +ffffffff81a381a0 T intel_wait_ddi_buf_idle +ffffffff81a383a0 T intel_ddi_set_dp_msa +ffffffff81a38570 T intel_ddi_enable_transcoder_func +ffffffff81a38650 t intel_ddi_transcoder_func_reg_val_get +ffffffff81a38900 T intel_ddi_disable_transcoder_func +ffffffff81a38af0 T intel_ddi_toggle_hdcp_bits +ffffffff81a38c10 T intel_ddi_connector_get_hw_state +ffffffff81a38d60 T intel_ddi_get_hw_state +ffffffff81a38dd0 t intel_ddi_get_encoder_pipes +ffffffff81a39220 T intel_ddi_enable_transcoder_clock +ffffffff81a392e0 T intel_ddi_disable_transcoder_clock +ffffffff81a39350 T intel_ddi_level +ffffffff81a39530 T icl_ddi_combo_get_pll +ffffffff81a395b0 T hsw_ddi_enable_clock +ffffffff81a39670 T hsw_ddi_disable_clock +ffffffff81a396b0 T hsw_ddi_is_clock_enabled +ffffffff81a39710 T intel_ddi_enable_clock +ffffffff81a39750 T intel_ddi_disable_clock +ffffffff81a39790 T intel_ddi_sanitize_encoder_pll_mapping +ffffffff81a39970 T dp_tp_ctl_reg +ffffffff81a399f0 T dp_tp_status_reg +ffffffff81a39a70 T intel_ddi_update_pipe +ffffffff81a39b00 T intel_ddi_update_active_dpll +ffffffff81a39bf0 T intel_ddi_compute_min_voltage_level +ffffffff81a39c70 T intel_ddi_get_clock +ffffffff81a39d80 T intel_ddi_port_pll_type +ffffffff81a39dc0 T hsw_ddi_get_config +ffffffff81a39eb0 t intel_ddi_get_config +ffffffff81a3a800 T intel_ddi_init +ffffffff81a3b580 t intel_ddi_hotplug +ffffffff81a3b990 t intel_ddi_compute_output_type +ffffffff81a3ba10 t intel_ddi_compute_config +ffffffff81a3bb80 t intel_ddi_compute_config_late +ffffffff81a3be60 t intel_enable_ddi +ffffffff81a3c7b0 t intel_ddi_pre_pll_enable +ffffffff81a3c9a0 t intel_ddi_pre_enable +ffffffff81a3d9a0 t intel_disable_ddi +ffffffff81a3db50 t intel_ddi_post_pll_disable +ffffffff81a3dc30 t intel_ddi_post_disable +ffffffff81a3e0c0 t intel_ddi_sync_state +ffffffff81a3e180 t intel_ddi_initial_fastset_check +ffffffff81a3e240 t intel_ddi_encoder_suspend +ffffffff81a3e250 t intel_ddi_encoder_shutdown +ffffffff81a3e280 t intel_ddi_get_power_domains +ffffffff81a3e400 t mtl_ddi_get_config +ffffffff81a3e4e0 t dg2_ddi_get_config +ffffffff81a3e530 t adls_ddi_enable_clock +ffffffff81a3e6a0 t adls_ddi_disable_clock +ffffffff81a3e750 t adls_ddi_is_clock_enabled +ffffffff81a3e7f0 t adls_ddi_get_config +ffffffff81a3e8b0 t rkl_ddi_enable_clock +ffffffff81a3ea30 t rkl_ddi_disable_clock +ffffffff81a3eac0 t rkl_ddi_is_clock_enabled +ffffffff81a3eb40 t rkl_ddi_get_config +ffffffff81a3ec10 t dg1_ddi_enable_clock +ffffffff81a3edc0 t dg1_ddi_disable_clock +ffffffff81a3ee80 t dg1_ddi_is_clock_enabled +ffffffff81a3ef20 t dg1_ddi_get_config +ffffffff81a3eff0 t jsl_ddi_tc_enable_clock +ffffffff81a3f080 t jsl_ddi_tc_disable_clock +ffffffff81a3f140 t jsl_ddi_tc_is_clock_enabled +ffffffff81a3f1f0 t icl_ddi_tc_port_pll_type +ffffffff81a3f280 t icl_ddi_combo_get_config +ffffffff81a3f320 t icl_ddi_combo_enable_clock +ffffffff81a3f460 t icl_ddi_combo_disable_clock +ffffffff81a3f500 t icl_ddi_combo_is_clock_enabled +ffffffff81a3f580 t icl_ddi_tc_enable_clock +ffffffff81a3f750 t icl_ddi_tc_disable_clock +ffffffff81a3f820 t icl_ddi_tc_is_clock_enabled +ffffffff81a3f8d0 t icl_ddi_tc_get_config +ffffffff81a3faf0 t bxt_ddi_get_config +ffffffff81a3fb60 t skl_ddi_enable_clock +ffffffff81a3fc60 t skl_ddi_disable_clock +ffffffff81a3fcf0 t skl_ddi_is_clock_enabled +ffffffff81a3fd60 t skl_ddi_get_config +ffffffff81a3fdf0 t icl_combo_phy_set_signal_levels +ffffffff81a408b0 t tgl_dkl_phy_set_signal_levels +ffffffff81a40bc0 t icl_mg_phy_set_signal_levels +ffffffff81a41450 t hsw_set_signal_levels +ffffffff81a417c0 t intel_ddi_max_lanes +ffffffff81a41890 t need_aux_ch +ffffffff81a41900 t intel_ddi_tc_encoder_suspend_complete +ffffffff81a41940 t intel_ddi_tc_encoder_shutdown_complete +ffffffff81a41980 t lpt_digital_port_connected +ffffffff81a419f0 t bdw_digital_port_connected +ffffffff81a41a60 t hsw_digital_port_connected +ffffffff81a41ad0 t intel_ddi_init_dp_connector +ffffffff81a41bb0 t intel_ddi_init_hdmi_connector +ffffffff81a41c20 t intel_ddi_encoder_reset +ffffffff81a41d00 t intel_ddi_encoder_destroy +ffffffff81a41db0 t intel_ddi_encoder_late_register +ffffffff81a41e10 t mtl_ddi_enable_d2d +ffffffff81a41fd0 t intel_wait_ddi_buf_active +ffffffff81a422e0 t intel_ddi_main_link_aux_domain +ffffffff81a423d0 t icl_program_mg_dp_mode +ffffffff81a426a0 t intel_ddi_init_dp_buf_reg +ffffffff81a428a0 t intel_disable_ddi_buf +ffffffff81a42a50 t mtl_disable_ddi_buf +ffffffff81a42e70 t intel_ddi_disable_fec_state +ffffffff81a42fc0 t mtl_ddi_prepare_link_retrain +ffffffff81a43300 t intel_ddi_prepare_link_retrain +ffffffff81a43800 t intel_ddi_set_link_train +ffffffff81a43950 t intel_ddi_set_idle_link_train +ffffffff81a43b20 t intel_ddi_dp_voltage_max +ffffffff81a43be0 t intel_ddi_dp_preemph_max +ffffffff81a44000 T is_hobl_buf_trans +ffffffff81a44040 T intel_ddi_buf_trans_init +ffffffff81a44300 t mtl_get_cx0_buf_trans +ffffffff81a443e0 t dg2_get_snps_buf_trans +ffffffff81a44450 t adlp_get_combo_buf_trans +ffffffff81a44570 t adlp_get_dkl_buf_trans +ffffffff81a445d0 t adls_get_combo_buf_trans +ffffffff81a446f0 t rkl_get_combo_buf_trans +ffffffff81a44810 t dg1_get_combo_buf_trans +ffffffff81a44930 t tgl_get_combo_buf_trans +ffffffff81a44a70 t tgl_get_dkl_buf_trans +ffffffff81a44ad0 t jsl_get_combo_buf_trans +ffffffff81a44b70 t ehl_get_combo_buf_trans +ffffffff81a44c10 t icl_get_combo_buf_trans +ffffffff81a44cc0 t icl_get_mg_buf_trans +ffffffff81a44d20 t bxt_get_buf_trans +ffffffff81a44da0 t kbl_y_get_buf_trans +ffffffff81a44e40 t kbl_u_get_buf_trans +ffffffff81a44ee0 t kbl_get_buf_trans +ffffffff81a44f80 t skl_y_get_buf_trans +ffffffff81a45020 t skl_u_get_buf_trans +ffffffff81a450c0 t skl_get_buf_trans +ffffffff81a45160 t bdw_get_buf_trans +ffffffff81a451f0 t hsw_get_buf_trans +ffffffff81a46000 T vlv_get_hpll_vco +ffffffff81a46050 T vlv_get_cck_clock +ffffffff81a46100 T vlv_get_cck_clock_hpll +ffffffff81a46200 T intel_update_czclk +ffffffff81a46280 T is_trans_port_sync_master +ffffffff81a462b0 T is_trans_port_sync_mode +ffffffff81a462f0 T intel_crtc_bigjoiner_slave_pipes +ffffffff81a46350 T intel_crtc_is_bigjoiner_slave +ffffffff81a463b0 T intel_crtc_is_bigjoiner_master +ffffffff81a46410 T intel_master_crtc +ffffffff81a464a0 T assert_transcoder +ffffffff81a46660 t transcoder_name +ffffffff81a466a0 T vlv_wait_port_ready +ffffffff81a467f0 T intel_enable_transcoder +ffffffff81a46a50 t assert_planes_disabled +ffffffff81a46b80 T intel_disable_transcoder +ffffffff81a46da0 T intel_rotation_info_size +ffffffff81a46df0 T intel_remapped_info_size +ffffffff81a46f20 T intel_plane_uses_fence +ffffffff81a46f70 T intel_fb_xy_to_linear +ffffffff81a46fc0 T intel_add_fb_offsets +ffffffff81a47010 T intel_plane_fb_max_stride +ffffffff81a47090 T intel_set_plane_visible +ffffffff81a470e0 T intel_plane_fixup_bitmasks +ffffffff81a47190 T intel_plane_disable_noatomic +ffffffff81a47380 T intel_plane_fence_y_offset +ffffffff81a473e0 T intel_has_pending_fb_unpin +ffffffff81a474d0 T intel_get_crtc_new_encoder +ffffffff81a47660 T ilk_pfit_disable +ffffffff81a47720 T intel_phy_is_combo +ffffffff81a47790 T intel_phy_is_tc +ffffffff81a47800 T intel_phy_is_snps +ffffffff81a47850 T intel_port_to_phy +ffffffff81a47900 T intel_port_to_tc +ffffffff81a47a10 T intel_aux_power_domain +ffffffff81a47a50 T intel_modeset_get_crtc_power_domains +ffffffff81a47c80 T intel_modeset_put_crtc_power_domains +ffffffff81a47cb0 T intel_encoder_destroy +ffffffff81a47ce0 T intel_encoder_get_config +ffffffff81a47d10 t intel_crtc_readout_derived_state +ffffffff81a48150 T intel_link_compute_m_n +ffffffff81a48280 T intel_panel_sanitize_ssc +ffffffff81a48360 T intel_zero_m_n +ffffffff81a483a0 T intel_set_m_n +ffffffff81a48460 T intel_cpu_transcoder_has_m2_n2 +ffffffff81a484c0 T intel_cpu_transcoder_set_m1_n1 +ffffffff81a48670 T intel_cpu_transcoder_set_m2_n2 +ffffffff81a487d0 T i9xx_set_pipeconf +ffffffff81a48980 T ilk_set_pipeconf +ffffffff81a48b50 T bdw_get_pipe_misc_bpp +ffffffff81a48c20 T ilk_get_lanes_required +ffffffff81a48c80 T intel_get_m_n +ffffffff81a48d90 T intel_cpu_transcoder_get_m1_n1 +ffffffff81a48f20 T intel_cpu_transcoder_get_m2_n2 +ffffffff81a49080 T intel_crtc_get_pipe_config +ffffffff81a490f0 T i9xx_crtc_clock_get +ffffffff81a49380 T intel_dotclock_calculate +ffffffff81a493e0 T intel_crtc_dotclock +ffffffff81a494b0 T intel_encoder_current_mode +ffffffff81a49660 T intel_fuzzy_clock_check +ffffffff81a496b0 T intel_pipe_config_compare +ffffffff81a4ca10 t pipe_config_mismatch +ffffffff81a4cb00 t pipe_config_infoframe_mismatch +ffffffff81a4ccb0 T intel_modeset_all_pipes +ffffffff81a4cec0 T intel_atomic_add_affected_planes +ffffffff81a4cf90 T intel_calc_active_pipes +ffffffff81a4d020 T intel_atomic_check +ffffffff81a4f040 t copy_bigjoiner_crtc_state_nomodeset +ffffffff81a4f150 t intel_atomic_check_planes +ffffffff81a4fbc0 t intel_modeset_checks +ffffffff81a4fd50 t intel_atomic_check_crtcs +ffffffff81a50170 t intel_async_flip_check_hw +ffffffff81a50650 T intel_crtc_arm_fifo_underrun +ffffffff81a506f0 T intel_atomic_helper_free_state_worker +ffffffff81a50770 T intel_atomic_commit +ffffffff81a50ad0 t intel_atomic_commit_ready +ffffffff81a50b60 t intel_atomic_commit_work +ffffffff81a50b80 t intel_atomic_commit_tail +ffffffff81a51d10 T intel_plane_destroy +ffffffff81a51d40 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81a51db0 T assert_port_valid +ffffffff81a51e30 T intel_setup_outputs +ffffffff81a526c0 T intel_mode_valid +ffffffff81a52840 T intel_cpu_transcoder_mode_valid +ffffffff81a52900 T intel_mode_valid_max_plane_size +ffffffff81a52980 T intel_init_display_hooks +ffffffff81a52a00 T intel_initial_commit +ffffffff81a52ba0 T i830_enable_pipe +ffffffff81a531e0 T i830_disable_pipe +ffffffff81a53510 T intel_hpd_poll_fini +ffffffff81a53610 T intel_scanout_needs_vtd_wa +ffffffff81a53650 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81a537b0 t intel_atomic_cleanup_work +ffffffff81a538b0 t intel_pre_plane_update +ffffffff81a53e10 t hsw_get_pipe_config +ffffffff81a54a40 t hsw_crtc_enable +ffffffff81a554a0 t hsw_crtc_disable +ffffffff81a557a0 t skl_commit_modeset_enables +ffffffff81a55d70 t intel_get_transcoder_timings +ffffffff81a56080 t intel_get_pipe_src_size +ffffffff81a561a0 t ilk_get_pfit_config +ffffffff81a56320 t enabled_bigjoiner_pipes +ffffffff81a56540 t bdw_set_pipe_misc +ffffffff81a56690 t ilk_pfit_enable +ffffffff81a567c0 t intel_set_transcoder_timings +ffffffff81a56b80 t intel_update_crtc +ffffffff81a57220 t intel_commit_modeset_enables +ffffffff81a57340 t ilk_get_pipe_config +ffffffff81a57590 t ilk_crtc_enable +ffffffff81a57930 t ilk_crtc_disable +ffffffff81a57bc0 t i9xx_get_pipe_config +ffffffff81a58340 t valleyview_crtc_enable +ffffffff81a587a0 t i9xx_crtc_disable +ffffffff81a58b40 t i9xx_pfit_enable +ffffffff81a58cb0 t i9xx_crtc_enable +ffffffff81a5a000 T intel_display_device_probe +ffffffff81a5a0d0 T intel_display_device_info_runtime_init +ffffffff81a5a730 T intel_display_device_info_print +ffffffff81a5b000 T intel_display_driver_probe_defer +ffffffff81a5b030 T intel_display_driver_init_hw +ffffffff81a5b0f0 T intel_display_driver_early_probe +ffffffff81a5b170 T intel_display_driver_probe_noirq +ffffffff81a5b450 T intel_display_driver_probe_nogem +ffffffff81a5b760 T intel_display_driver_probe +ffffffff81a5b800 T intel_display_driver_register +ffffffff81a5b860 T intel_display_driver_remove +ffffffff81a5b910 T intel_display_driver_remove_noirq +ffffffff81a5b9c0 T intel_display_driver_remove_nogem +ffffffff81a5ba00 T intel_display_driver_unregister +ffffffff81a5ba80 T intel_display_driver_suspend +ffffffff81a5bb30 T __intel_display_driver_resume +ffffffff81a5bc40 T intel_display_driver_resume +ffffffff81a5c000 T ilk_update_display_irq +ffffffff81a5c140 T ilk_enable_display_irq +ffffffff81a5c160 T ilk_disable_display_irq +ffffffff81a5c240 T bdw_update_port_irq +ffffffff81a5c390 T bdw_enable_pipe_irq +ffffffff81a5c3b0 t bdw_update_pipe_irq +ffffffff81a5c510 T bdw_disable_pipe_irq +ffffffff81a5c620 T ibx_display_interrupt_update +ffffffff81a5c740 T ibx_enable_display_interrupt +ffffffff81a5c760 T ibx_disable_display_interrupt +ffffffff81a5c820 T i915_pipestat_enable_mask +ffffffff81a5c9b0 T i915_enable_pipestat +ffffffff81a5cb30 T i915_disable_pipestat +ffffffff81a5cca0 T i915_enable_asle_pipestat +ffffffff81a5cd50 T i9xx_pipestat_irq_reset +ffffffff81a5cee0 T i9xx_pipestat_irq_ack +ffffffff81a5d060 T i8xx_pipestat_irq_handler +ffffffff81a5d250 t i9xx_pipe_crc_irq_handler +ffffffff81a5d390 T i915_pipestat_irq_handler +ffffffff81a5d5c0 T i965_pipestat_irq_handler +ffffffff81a5d800 T valleyview_pipestat_irq_handler +ffffffff81a5d9a0 T ilk_display_irq_handler +ffffffff81a5dee0 t cpt_irq_handler +ffffffff81a5e250 T ivb_display_irq_handler +ffffffff81a5e7f0 T gen8_de_pipe_underrun_mask +ffffffff81a5e830 T gen8_de_irq_handler +ffffffff81a5f410 T gen11_gu_misc_irq_ack +ffffffff81a5f460 T gen11_gu_misc_irq_handler +ffffffff81a5f4a0 T gen11_display_irq_handler +ffffffff81a5f530 T i8xx_enable_vblank +ffffffff81a5f5a0 T i915gm_enable_vblank +ffffffff81a5f650 T i965_enable_vblank +ffffffff81a5f6c0 T ilk_enable_vblank +ffffffff81a5f770 T bdw_enable_vblank +ffffffff81a5f920 T i8xx_disable_vblank +ffffffff81a5f980 T i915gm_disable_vblank +ffffffff81a5fa40 T i965_disable_vblank +ffffffff81a5faa0 T ilk_disable_vblank +ffffffff81a5fba0 T bdw_disable_vblank +ffffffff81a5fd20 T vlv_display_irq_reset +ffffffff81a5fe10 T vlv_display_irq_postinstall +ffffffff81a5ff60 T gen8_display_irq_reset +ffffffff81a600f0 T gen11_display_irq_reset +ffffffff81a603c0 T gen8_irq_power_well_post_enable +ffffffff81a60530 T gen8_irq_power_well_pre_disable +ffffffff81a60640 T valleyview_enable_display_irqs +ffffffff81a60760 T valleyview_disable_display_irqs +ffffffff81a60870 T ilk_de_irq_postinstall +ffffffff81a60980 T gen8_de_irq_postinstall +ffffffff81a60df0 T gen11_de_irq_postinstall +ffffffff81a60e60 T dg1_de_irq_postinstall +ffffffff81a60ed0 T intel_display_irq_init +ffffffff81a61000 T intel_display_power_domain_str +ffffffff81a61060 T __intel_display_power_is_enabled +ffffffff81a61120 T intel_display_power_is_enabled +ffffffff81a61240 T intel_display_power_set_target_dc_state +ffffffff81a61360 T intel_display_power_get +ffffffff81a613e0 t __intel_display_power_get_domain +ffffffff81a615d0 T intel_display_power_get_if_enabled +ffffffff81a61700 T __intel_display_power_put_async +ffffffff81a618f0 t __intel_display_power_put_domain +ffffffff81a61a60 T intel_display_power_flush_work +ffffffff81a61b80 t release_async_put_domains +ffffffff81a61c70 T intel_display_power_put_unchecked +ffffffff81a61cd0 T intel_display_power_get_in_set +ffffffff81a61db0 T intel_display_power_get_in_set_if_enabled +ffffffff81a61e60 T intel_display_power_put_mask_in_set +ffffffff81a61f30 T intel_power_domains_init +ffffffff81a62180 t intel_display_power_put_async_work +ffffffff81a623f0 T intel_power_domains_cleanup +ffffffff81a62410 T gen9_dbuf_slices_update +ffffffff81a62620 T intel_power_domains_init_hw +ffffffff81a62b20 t icl_display_core_init +ffffffff81a63320 t bxt_display_core_init +ffffffff81a63470 t vlv_cmnlane_wa +ffffffff81a63540 t assert_ved_power_gated +ffffffff81a635f0 t hsw_assert_cdclk +ffffffff81a63720 t intel_pch_reset_handshake +ffffffff81a637d0 T intel_power_domains_driver_remove +ffffffff81a638c0 T intel_power_domains_sanitize_state +ffffffff81a639b0 T intel_power_domains_enable +ffffffff81a63a10 T intel_power_domains_disable +ffffffff81a63ac0 T intel_power_domains_suspend +ffffffff81a63c70 t icl_display_core_uninit +ffffffff81a63d80 t bxt_display_core_uninit +ffffffff81a63e40 T intel_power_domains_resume +ffffffff81a63f10 T intel_display_power_suspend_late +ffffffff81a63ff0 t hsw_enable_pc8 +ffffffff81a64ce0 T intel_display_power_resume_early +ffffffff81a64dd0 t hsw_disable_pc8 +ffffffff81a65200 T intel_display_power_suspend +ffffffff81a65280 T intel_display_power_resume +ffffffff81a65360 T intel_display_power_debug +ffffffff81a65420 T intel_display_power_ddi_io_domain +ffffffff81a65510 T intel_display_power_ddi_lanes_domain +ffffffff81a65600 T intel_display_power_aux_io_domain +ffffffff81a65710 T intel_display_power_legacy_aux_domain +ffffffff81a65820 T intel_display_power_tbt_aux_domain +ffffffff81a65930 t __delayed_work_tick +ffffffff81a66000 T intel_display_power_map_init +ffffffff81a66180 t __set_power_wells +ffffffff81a66560 T intel_display_power_map_cleanup +ffffffff81a67000 T lookup_power_well +ffffffff81a670c0 T intel_power_well_enable +ffffffff81a67150 T intel_power_well_name +ffffffff81a67190 T intel_power_well_disable +ffffffff81a67200 T intel_power_well_sync_hw +ffffffff81a67270 T intel_power_well_get +ffffffff81a67310 T intel_power_well_put +ffffffff81a67410 T intel_power_well_is_enabled +ffffffff81a67430 T intel_power_well_is_enabled_cached +ffffffff81a67460 T intel_display_power_well_is_enabled +ffffffff81a67510 T intel_power_well_is_always_on +ffffffff81a67550 T intel_power_well_domains +ffffffff81a67580 T intel_power_well_refcount +ffffffff81a675b0 T gen9_sanitize_dc_state +ffffffff81a67680 T gen9_set_dc_state +ffffffff81a679e0 T gen9_enable_dc5 +ffffffff81a67c40 T skl_enable_dc6 +ffffffff81a67da0 T bxt_enable_dc9 +ffffffff81a67f50 T bxt_disable_dc9 +ffffffff81a68040 T gen9_disable_dc_states +ffffffff81a68410 T chv_phy_powergate_ch +ffffffff81a68520 t assert_chv_phy_status +ffffffff81a688d0 T chv_phy_powergate_lanes +ffffffff81a68b30 t i9xx_power_well_sync_hw_noop +ffffffff81a68b60 t i9xx_always_on_power_well_noop +ffffffff81a68b90 t i9xx_always_on_power_well_enabled +ffffffff81a68bc0 t chv_pipe_power_well_sync_hw +ffffffff81a68bf0 t chv_pipe_power_well_enable +ffffffff81a68c20 t chv_pipe_power_well_disable +ffffffff81a68c80 t chv_pipe_power_well_enabled +ffffffff81a68d80 t chv_dpio_cmn_power_well_enable +ffffffff81a68fa0 t chv_dpio_cmn_power_well_disable +ffffffff81a690d0 t vlv_power_well_enabled +ffffffff81a691f0 t i830_pipes_power_well_sync_hw +ffffffff81a692e0 t i830_pipes_power_well_enable +ffffffff81a693a0 t i830_pipes_power_well_disable +ffffffff81a693d0 t i830_pipes_power_well_enabled +ffffffff81a69470 t hsw_power_well_sync_hw +ffffffff81a69560 t hsw_power_well_enable +ffffffff81a697e0 t hsw_power_well_disable +ffffffff81a698a0 t hsw_power_well_enabled +ffffffff81a69980 t gen9_dc_off_power_well_enable +ffffffff81a69990 t gen9_dc_off_power_well_disable +ffffffff81a69a30 t gen9_dc_off_power_well_enabled +ffffffff81a69ac0 t bxt_dpio_cmn_power_well_enable +ffffffff81a69af0 t bxt_dpio_cmn_power_well_disable +ffffffff81a69b20 t bxt_dpio_cmn_power_well_enabled +ffffffff81a69b50 t vlv_display_power_well_enable +ffffffff81a69b80 t vlv_display_power_well_disable +ffffffff81a69bf0 t vlv_dpio_cmn_power_well_enable +ffffffff81a69c70 t vlv_dpio_cmn_power_well_disable +ffffffff81a69d70 t vlv_power_well_enable +ffffffff81a69d90 t vlv_power_well_disable +ffffffff81a69db0 t icl_aux_power_well_enable +ffffffff81a6a490 t icl_aux_power_well_disable +ffffffff81a6a720 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81a6a740 t tgl_tc_cold_off_power_well_enable +ffffffff81a6a760 t tgl_tc_cold_off_power_well_disable +ffffffff81a6a780 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81a6a7b0 t xelpdp_aux_power_well_enable +ffffffff81a6a880 t xelpdp_aux_power_well_disable +ffffffff81a6a950 t xelpdp_aux_power_well_enabled +ffffffff81a6aa00 t chv_set_pipe_power_well +ffffffff81a6ac00 t vlv_display_power_well_init +ffffffff81a6af60 t vlv_set_power_well +ffffffff81a6b180 t hsw_wait_for_power_well_enable +ffffffff81a6b2d0 t hsw_wait_for_power_well_disable +ffffffff81a6b5a0 t tgl_tc_cold_request +ffffffff81a6c000 T intel_display_reset_prepare +ffffffff81a6c1f0 T intel_display_reset_finish +ffffffff81a6d000 T intel_display_rps_boost_after_vblank +ffffffff81a6d110 t do_rps_boost +ffffffff81a6d1c0 T intel_display_rps_mark_interactive +ffffffff81a6e000 T intel_dkl_phy_init +ffffffff81a6e020 T intel_dkl_phy_read +ffffffff81a6e150 T intel_dkl_phy_write +ffffffff81a6e260 T intel_dkl_phy_rmw +ffffffff81a6e390 T intel_dkl_phy_posting_read +ffffffff81a6f000 T intel_dmc_has_payload +ffffffff81a6f050 T intel_dmc_enable_pipe +ffffffff81a6f160 T intel_dmc_disable_pipe +ffffffff81a6f270 T intel_dmc_load_program +ffffffff81a6faa0 t pipedmc_clock_gating_wa +ffffffff81a6fc90 T intel_dmc_disable_program +ffffffff81a6fec0 T assert_dmc_loaded +ffffffff81a70040 T intel_dmc_init +ffffffff81a70300 t dmc_load_work_fn +ffffffff81a70c30 T intel_dmc_suspend +ffffffff81a70cc0 T intel_dmc_resume +ffffffff81a70d60 T intel_dmc_fini +ffffffff81a70eb0 T intel_dmc_print_error_state +ffffffff81a70fb0 T intel_dmc_debugfs_register +ffffffff81a71000 T intel_dp_is_edp +ffffffff81a71030 T intel_dp_is_uhbr +ffffffff81a71070 T intel_dp_max_lane_count +ffffffff81a710e0 T intel_dp_link_required +ffffffff81a71120 T intel_dp_max_data_rate +ffffffff81a71180 T intel_dp_can_bigjoiner +ffffffff81a711d0 T intel_dp_get_link_train_fallback_values +ffffffff81a71580 T intel_dp_mode_to_fec_clock +ffffffff81a715d0 T intel_dp_dsc_nearest_valid_bpp +ffffffff81a716d0 T intel_dp_dsc_get_output_bpp +ffffffff81a717f0 T intel_dp_dsc_get_slice_count +ffffffff81a71980 T intel_dp_min_bpp +ffffffff81a719c0 T intel_dp_need_bigjoiner +ffffffff81a71a20 T intel_dp_source_supports_tps3 +ffffffff81a71a70 T intel_dp_source_supports_tps4 +ffffffff81a71ab0 T intel_dp_max_link_rate +ffffffff81a71b60 T intel_dp_rate_select +ffffffff81a71c00 T intel_dp_compute_rate +ffffffff81a71cd0 T intel_dp_has_hdmi_sink +ffffffff81a71d10 T intel_dp_adjust_compliance_config +ffffffff81a71e50 T intel_dp_dsc_compute_bpp +ffffffff81a71f00 T intel_dp_dsc_compute_config +ffffffff81a725e0 T intel_dp_limited_color_range +ffffffff81a72650 T intel_dp_compute_psr_vsc_sdp +ffffffff81a726d0 T intel_dp_needs_vsc_sdp +ffffffff81a72720 t intel_dp_compute_vsc_colorimetry +ffffffff81a728a0 T intel_dp_compute_config +ffffffff81a72cf0 t intel_dp_compute_output_format +ffffffff81a72f20 t intel_dp_audio_compute_config +ffffffff81a73000 t intel_dp_drrs_compute_config +ffffffff81a731b0 t intel_dp_compute_vsc_sdp +ffffffff81a73250 t intel_dp_compute_hdr_metadata_infoframe_sdp +ffffffff81a732e0 T intel_dp_set_link_params +ffffffff81a73320 T intel_edp_backlight_on +ffffffff81a733c0 T intel_edp_backlight_off +ffffffff81a73450 T intel_dp_sink_set_decompression_state +ffffffff81a734f0 T intel_dp_wait_source_oui +ffffffff81a735e0 T intel_dp_set_power +ffffffff81a73800 T intel_dp_sync_state +ffffffff81a73880 t intel_dp_get_dpcd +ffffffff81a739e0 t intel_dp_reset_max_link_params +ffffffff81a73ae0 T intel_dp_initial_fastset_check +ffffffff81a73c10 T intel_dp_check_frl_training +ffffffff81a741c0 T intel_dp_pcon_dsc_configure +ffffffff81a743b0 T intel_dp_configure_protocol_converter +ffffffff81a74590 T intel_dp_get_colorimetry_status +ffffffff81a745f0 T intel_edp_fixup_vbt_bpp +ffffffff81a74680 T intel_write_dp_vsc_sdp +ffffffff81a74820 T intel_dp_set_infoframes +ffffffff81a74940 t intel_write_dp_sdp +ffffffff81a74c20 T intel_read_dp_sdp +ffffffff81a74f40 T intel_dp_get_active_pipes +ffffffff81a75160 T intel_dp_retrain_link +ffffffff81a75410 t intel_dp_needs_link_retrain +ffffffff81a75590 T intel_dp_phy_test +ffffffff81a75c40 T intel_digital_port_connected +ffffffff81a75cf0 T intel_dp_encoder_flush_work +ffffffff81a75d50 T intel_dp_encoder_suspend +ffffffff81a75d90 T intel_dp_encoder_shutdown +ffffffff81a75dd0 T intel_dp_hpd_pulse +ffffffff81a76440 T intel_dp_is_port_edp +ffffffff81a764d0 T intel_dp_init_connector +ffffffff81a77640 t intel_dp_modeset_retry_work_fn +ffffffff81a776e0 t intel_dp_set_common_rates +ffffffff81a77860 T intel_dp_mst_suspend +ffffffff81a77900 T intel_dp_mst_resume +ffffffff81a779b0 t intel_dp_output_format +ffffffff81a77af0 t intel_dp_compute_link_config +ffffffff81a782b0 t intel_dp_tmds_clock_valid +ffffffff81a78350 t intel_dp_set_sink_rates +ffffffff81a78590 t intel_dp_check_device_service_irq +ffffffff81a78b60 t intel_dp_force +ffffffff81a78c90 t intel_dp_connector_register +ffffffff81a78d60 t intel_dp_connector_unregister +ffffffff81a78dc0 t intel_dp_oob_hotplug_event +ffffffff81a78e40 t intel_dp_set_edid +ffffffff81a79240 t intel_dp_get_modes +ffffffff81a79330 t intel_dp_detect +ffffffff81a79bf0 t intel_dp_mode_valid +ffffffff81a79f70 t intel_dp_connector_atomic_check +ffffffff81a7a2e0 t intel_dp_get_dsc_sink_cap +ffffffff81a7a450 t intel_dp_mode_min_output_bpp +ffffffff81a7a4b0 t intel_dp_mode_valid_downstream +ffffffff81a7a670 t icl_max_source_rate +ffffffff81a7b000 T intel_dp_aux_pack +ffffffff81a7b070 T intel_dp_aux_fini +ffffffff81a7b090 T intel_dp_aux_init +ffffffff81a7b2a0 t xelpdp_aux_ctl_reg +ffffffff81a7b370 t xelpdp_aux_data_reg +ffffffff81a7b440 t tgl_aux_ctl_reg +ffffffff81a7b4c0 t tgl_aux_data_reg +ffffffff81a7b550 t skl_aux_ctl_reg +ffffffff81a7b5d0 t skl_aux_data_reg +ffffffff81a7b660 t ilk_aux_ctl_reg +ffffffff81a7b6e0 t ilk_aux_data_reg +ffffffff81a7b770 t g4x_aux_ctl_reg +ffffffff81a7b7f0 t g4x_aux_data_reg +ffffffff81a7b890 t skl_get_aux_clock_divider +ffffffff81a7b8c0 t hsw_get_aux_clock_divider +ffffffff81a7b950 t ilk_get_aux_clock_divider +ffffffff81a7b9b0 t g4x_get_aux_clock_divider +ffffffff81a7ba00 t skl_get_aux_send_ctl +ffffffff81a7ba80 t g4x_get_aux_send_ctl +ffffffff81a7bae0 t kasprintf +ffffffff81a7bbb0 t intel_dp_aux_transfer +ffffffff81a7be40 T intel_dp_aux_ch +ffffffff81a7bfa0 T intel_dp_aux_irq_handler +ffffffff81a7c040 t intel_dp_aux_xfer +ffffffff81a7d000 T intel_dp_aux_init_backlight_funcs +ffffffff81a7d260 t intel_dp_aux_hdr_setup_backlight +ffffffff81a7d3e0 t intel_dp_aux_hdr_get_backlight +ffffffff81a7d560 t intel_dp_aux_hdr_set_backlight +ffffffff81a7d660 t intel_dp_aux_hdr_disable_backlight +ffffffff81a7d6e0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a7d920 t intel_dp_aux_vesa_setup_backlight +ffffffff81a7db80 t intel_dp_aux_vesa_get_backlight +ffffffff81a7dbb0 t intel_dp_aux_vesa_set_backlight +ffffffff81a7dc50 t intel_dp_aux_vesa_disable_backlight +ffffffff81a7dd00 t intel_dp_aux_vesa_enable_backlight +ffffffff81a7e000 T intel_dp_hdcp_init +ffffffff81a7e0b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a7e1a0 t intel_dp_hdcp_read_bksv +ffffffff81a7e230 t intel_dp_hdcp_read_bstatus +ffffffff81a7e2c0 t intel_dp_hdcp_repeater_present +ffffffff81a7e370 t intel_dp_hdcp_read_ri_prime +ffffffff81a7e400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a7e4a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a7e590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a7e630 t intel_dp_hdcp_toggle_signalling +ffffffff81a7e660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a7e850 t intel_dp_hdcp_check_link +ffffffff81a7e8e0 t intel_dp_hdcp_capable +ffffffff81a7e990 t intel_dp_hdcp2_capable +ffffffff81a7ea10 t intel_dp_hdcp2_write_msg +ffffffff81a7ebc0 t intel_dp_hdcp2_read_msg +ffffffff81a7f290 t intel_dp_hdcp2_config_stream_type +ffffffff81a7f2f0 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a7f560 t intel_dp_mst_hdcp2_check_link +ffffffff81a7f620 t intel_dp_hdcp2_check_link +ffffffff81a80000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a800d0 t intel_dp_init_lttpr +ffffffff81a803b0 T intel_dp_get_adjust_train +ffffffff81a80ab0 T intel_dp_program_link_training_pattern +ffffffff81a80bd0 T intel_dp_set_signal_levels +ffffffff81a80f70 T intel_dp_dump_link_status +ffffffff81a81060 T intel_dp_stop_link_train +ffffffff81a81310 T intel_dp_start_link_train +ffffffff81a830d0 T intel_dp_128b132b_sdp_crc16 +ffffffff81a831a0 t intel_dp_link_train_phy +ffffffff81a85000 T intel_dp_mst_encoder_active_links +ffffffff81a85030 T intel_dp_mst_encoder_init +ffffffff81a85270 T intel_dp_mst_source_support +ffffffff81a852b0 T intel_dp_mst_encoder_cleanup +ffffffff81a85310 T intel_dp_mst_is_master_trans +ffffffff81a85350 T intel_dp_mst_is_slave_trans +ffffffff81a85390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a85450 t intel_dp_add_mst_connector +ffffffff81a85680 t intel_dp_mst_poll_hpd_irq +ffffffff81a856a0 t intel_dp_mst_get_hw_state +ffffffff81a85700 t intel_dp_mst_connector_late_register +ffffffff81a85770 t intel_dp_mst_connector_early_unregister +ffffffff81a857a0 t intel_dp_mst_get_modes +ffffffff81a85840 t intel_dp_mst_detect +ffffffff81a85940 t intel_dp_mst_mode_valid_ctx +ffffffff81a85b70 t intel_mst_atomic_best_encoder +ffffffff81a85bd0 t intel_dp_mst_atomic_check +ffffffff81a85d40 t intel_dp_mst_compute_config +ffffffff81a86290 t intel_dp_mst_compute_config_late +ffffffff81a86390 t intel_mst_disable_dp +ffffffff81a86470 t intel_mst_post_disable_dp +ffffffff81a86720 t intel_mst_post_pll_disable_dp +ffffffff81a86780 t intel_mst_pre_pll_enable_dp +ffffffff81a867c0 t intel_mst_pre_enable_dp +ffffffff81a869e0 t intel_mst_enable_dp +ffffffff81a86d80 t intel_dp_mst_enc_get_hw_state +ffffffff81a86dc0 t intel_dp_mst_enc_get_config +ffffffff81a86de0 t intel_dp_mst_initial_fastset_check +ffffffff81a86e00 t intel_dp_mst_encoder_destroy +ffffffff81a86e30 t intel_dp_mst_find_vcpi_slots_for_bpp +ffffffff81a88000 T bxt_port_to_phy_channel +ffffffff81a88110 T bxt_ddi_phy_set_signal_levels +ffffffff81a884f0 T bxt_ddi_phy_is_enabled +ffffffff81a88620 T bxt_ddi_phy_uninit +ffffffff81a88700 T bxt_ddi_phy_init +ffffffff81a88920 t _bxt_ddi_phy_init +ffffffff81a88e70 T bxt_ddi_phy_verify_state +ffffffff81a89150 t __phy_reg_verify_state +ffffffff81a89250 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a892c0 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a89520 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a89700 T vlv_dig_port_to_channel +ffffffff81a89770 T vlv_dig_port_to_phy +ffffffff81a897e0 T vlv_pipe_to_channel +ffffffff81a89840 T chv_set_phy_signal_level +ffffffff81a89b90 T chv_data_lane_soft_reset +ffffffff81a89d60 T chv_phy_pre_pll_enable +ffffffff81a8a000 T chv_phy_pre_encoder_enable +ffffffff81a8a260 T chv_phy_release_cl2_override +ffffffff81a8a2f0 T chv_phy_post_pll_disable +ffffffff81a8a3a0 T vlv_set_phy_signal_level +ffffffff81a8a510 T vlv_phy_pre_pll_enable +ffffffff81a8a610 T vlv_phy_pre_encoder_enable +ffffffff81a8a710 T vlv_phy_reset_lanes +ffffffff81a8b000 T pnv_calc_dpll_params +ffffffff81a8b0c0 T i9xx_calc_dpll_params +ffffffff81a8b190 T vlv_calc_dpll_params +ffffffff81a8b250 T chv_calc_dpll_params +ffffffff81a8b320 T bxt_find_best_dpll +ffffffff81a8b340 t chv_find_best_dpll +ffffffff81a8b680 T i9xx_dpll_compute_fp +ffffffff81a8b6c0 T vlv_compute_dpll +ffffffff81a8b740 T chv_compute_dpll +ffffffff81a8b7c0 T intel_dpll_crtc_compute_clock +ffffffff81a8b8c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a8ba10 T intel_dpll_init_clock_hook +ffffffff81a8bb20 T i9xx_enable_pll +ffffffff81a8bef0 T vlv_enable_pll +ffffffff81a8c410 T chv_enable_pll +ffffffff81a8c9f0 T vlv_force_pll_on +ffffffff81a8cb40 T vlv_disable_pll +ffffffff81a8cc10 T chv_disable_pll +ffffffff81a8cd40 T i9xx_disable_pll +ffffffff81a8ce60 T vlv_force_pll_off +ffffffff81a8cf60 T assert_pll_enabled +ffffffff81a8d060 T assert_pll_disabled +ffffffff81a8d160 t intel_pll_is_valid +ffffffff81a8d220 t mtl_crtc_compute_clock +ffffffff81a8d2e0 t dg2_crtc_compute_clock +ffffffff81a8d360 t hsw_crtc_compute_clock +ffffffff81a8d420 t hsw_crtc_get_shared_dpll +ffffffff81a8d4c0 t ilk_crtc_compute_clock +ffffffff81a8d7c0 t ilk_crtc_get_shared_dpll +ffffffff81a8d810 t g4x_find_best_dpll +ffffffff81a8db50 t chv_crtc_compute_clock +ffffffff81a8dc60 t vlv_crtc_compute_clock +ffffffff81a8e100 t g4x_crtc_compute_clock +ffffffff81a8e260 t i9xx_compute_dpll +ffffffff81a8e4e0 t pnv_crtc_compute_clock +ffffffff81a8e8c0 t i9xx_crtc_compute_clock +ffffffff81a8e9e0 t i9xx_find_best_dpll +ffffffff81a8ed20 t i8xx_crtc_compute_clock +ffffffff81a8f000 T intel_get_shared_dpll_by_id +ffffffff81a8f040 T assert_shared_dpll +ffffffff81a8f1f0 T intel_dpll_get_hw_state +ffffffff81a8f220 T icl_tc_port_to_pll_id +ffffffff81a8f250 T intel_enable_shared_dpll +ffffffff81a8f5b0 T intel_disable_shared_dpll +ffffffff81a8f850 T intel_unreference_shared_dpll_crtc +ffffffff81a8f950 T intel_shared_dpll_swap_state +ffffffff81a8fa30 T icl_set_active_port_dpll +ffffffff81a8fa70 T intel_shared_dpll_init +ffffffff81a8fc70 T intel_compute_shared_dplls +ffffffff81a8fd00 T intel_reserve_shared_dplls +ffffffff81a8fd90 T intel_release_shared_dplls +ffffffff81a8fdd0 T intel_update_active_dpll +ffffffff81a8fe30 T intel_dpll_get_freq +ffffffff81a8fec0 T intel_dpll_update_ref_clks +ffffffff81a8ff10 T intel_dpll_readout_hw_state +ffffffff81a90140 T intel_dpll_sanitize_state +ffffffff81a90220 T intel_dpll_dump_hw_state +ffffffff81a902a0 T intel_shared_dpll_state_verify +ffffffff81a90480 t verify_single_dpll_state +ffffffff81a90a00 T intel_shared_dpll_verify_disabled +ffffffff81a90a80 t icl_compute_dplls +ffffffff81a916c0 t icl_get_dplls +ffffffff81a91990 t icl_put_dplls +ffffffff81a91a50 t icl_update_active_dpll +ffffffff81a91b00 t icl_update_dpll_ref_clks +ffffffff81a91b40 t icl_dump_hw_state +ffffffff81a91c00 t combo_pll_enable +ffffffff81a91e10 t combo_pll_disable +ffffffff81a91ee0 t combo_pll_get_hw_state +ffffffff81a91f60 t icl_ddi_combo_pll_get_freq +ffffffff81a92130 t icl_dpll_write +ffffffff81a92370 t adlp_cmtg_clock_gating_wa +ffffffff81a924d0 t icl_pll_disable +ffffffff81a92670 t icl_pll_get_hw_state +ffffffff81a92950 t tbt_pll_enable +ffffffff81a92b10 t tbt_pll_disable +ffffffff81a92b30 t tbt_pll_get_hw_state +ffffffff81a92b50 t icl_ddi_tbt_pll_get_freq +ffffffff81a92bc0 t mg_pll_enable +ffffffff81a931e0 t mg_pll_disable +ffffffff81a93220 t dkl_pll_get_hw_state +ffffffff81a93430 t icl_ddi_mg_pll_get_freq +ffffffff81a93510 t icl_calc_dpll_state +ffffffff81a93650 t intel_find_shared_dpll +ffffffff81a93970 t intel_reference_shared_dpll +ffffffff81a93b90 t intel_unreference_shared_dpll +ffffffff81a93d90 t mg_pll_get_hw_state +ffffffff81a93fe0 t bxt_compute_dpll +ffffffff81a942e0 t bxt_get_dpll +ffffffff81a943b0 t intel_put_dpll +ffffffff81a94410 t bxt_update_dpll_ref_clks +ffffffff81a94450 t bxt_dump_hw_state +ffffffff81a94500 t bxt_ddi_pll_enable +ffffffff81a94ee0 t bxt_ddi_pll_disable +ffffffff81a950f0 t bxt_ddi_pll_get_hw_state +ffffffff81a95520 t bxt_ddi_pll_get_freq +ffffffff81a955b0 t bxt_ddi_set_dpll_hw_state +ffffffff81a957a0 t skl_compute_dpll +ffffffff81a95f00 t skl_get_dpll +ffffffff81a95fb0 t skl_update_dpll_ref_clks +ffffffff81a95ff0 t skl_dump_hw_state +ffffffff81a96050 t skl_ddi_dpll0_enable +ffffffff81a96110 t skl_ddi_dpll0_disable +ffffffff81a96140 t skl_ddi_dpll0_get_hw_state +ffffffff81a96240 t skl_ddi_pll_get_freq +ffffffff81a962d0 t skl_ddi_wrpll_get_freq +ffffffff81a96430 t skl_ddi_pll_enable +ffffffff81a96650 t skl_ddi_pll_disable +ffffffff81a966e0 t skl_ddi_pll_get_hw_state +ffffffff81a96800 t hsw_compute_dpll +ffffffff81a97020 t hsw_get_dpll +ffffffff81a97170 t hsw_update_dpll_ref_clks +ffffffff81a971e0 t hsw_dump_hw_state +ffffffff81a97210 t hsw_ddi_wrpll_enable +ffffffff81a97290 t hsw_ddi_wrpll_disable +ffffffff81a97370 t hsw_ddi_wrpll_get_hw_state +ffffffff81a97410 t hsw_ddi_wrpll_get_freq +ffffffff81a97500 t hsw_ddi_spll_enable +ffffffff81a97560 t hsw_ddi_spll_disable +ffffffff81a97630 t hsw_ddi_spll_get_hw_state +ffffffff81a976c0 t hsw_ddi_spll_get_freq +ffffffff81a97760 t hsw_ddi_lcpll_enable +ffffffff81a97790 t hsw_ddi_lcpll_disable +ffffffff81a977c0 t hsw_ddi_lcpll_get_hw_state +ffffffff81a977f0 t hsw_ddi_lcpll_get_freq +ffffffff81a97870 t ibx_compute_dpll +ffffffff81a978a0 t ibx_get_dpll +ffffffff81a979a0 t ibx_dump_hw_state +ffffffff81a97a00 t ibx_pch_dpll_enable +ffffffff81a97bb0 t ibx_pch_dpll_disable +ffffffff81a97c30 t ibx_pch_dpll_get_hw_state +ffffffff81a98000 T intel_dpt_pin +ffffffff81a981e0 T intel_dpt_unpin +ffffffff81a98250 T intel_dpt_resume +ffffffff81a98320 T intel_dpt_suspend +ffffffff81a983f0 T intel_dpt_create +ffffffff81a987f0 t dpt_insert_page +ffffffff81a98860 t dpt_clear_range +ffffffff81a98890 t dpt_insert_entries +ffffffff81a98980 t dpt_cleanup +ffffffff81a989d0 t dpt_bind_vma +ffffffff81a98a60 t dpt_unbind_vma +ffffffff81a98a90 T intel_dpt_destroy +ffffffff81a98ae0 T intel_dpt_configure +ffffffff81a98c80 t __ww_mutex_lock +ffffffff81a99000 T intel_drrs_type_str +ffffffff81a99040 T intel_drrs_is_active +ffffffff81a99070 T intel_drrs_activate +ffffffff81a99260 T intel_drrs_deactivate +ffffffff81a99420 T intel_drrs_invalidate +ffffffff81a99440 t intel_drrs_frontbuffer_update +ffffffff81a99690 T intel_drrs_flush +ffffffff81a996b0 T intel_drrs_crtc_init +ffffffff81a99750 t intel_drrs_downclock_work +ffffffff81a99870 T intel_drrs_crtc_debugfs_add +ffffffff81a998a0 T intel_drrs_connector_debugfs_add +ffffffff81a998b0 t __delayed_work_tick +ffffffff81a9a000 T intel_dsb_reg_write +ffffffff81a9a140 T intel_dsb_finish +ffffffff81a9a1c0 T intel_dsb_commit +ffffffff81a9a380 T intel_dsb_wait +ffffffff81a9a570 T intel_dsb_prepare +ffffffff81a9a6f0 T intel_dsb_cleanup +ffffffff81a9b000 T intel_dsi_wait_panel_power_cycle +ffffffff81a9b0f0 T intel_dsi_shutdown +ffffffff81a9b1e0 T intel_dsi_bitrate +ffffffff81a9b270 T intel_dsi_tlpx_ns +ffffffff81a9b2c0 T intel_dsi_get_modes +ffffffff81a9b2d0 T intel_dsi_mode_valid +ffffffff81a9b390 T intel_dsi_host_init +ffffffff81a9b440 T intel_dsi_get_panel_orientation +ffffffff81a9c000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a9c0a0 t dcs_setup_backlight +ffffffff81a9c120 t dcs_get_backlight +ffffffff81a9c210 t dcs_set_backlight +ffffffff81a9c300 t dcs_disable_backlight +ffffffff81a9c660 t dcs_enable_backlight +ffffffff81a9d000 T intel_dsi_vbt_exec_sequence +ffffffff81a9d020 T intel_dsi_log_params +ffffffff81a9d3a0 T intel_dsi_vbt_init +ffffffff81a9d840 T intel_dsi_vbt_gpio_init +ffffffff81a9d860 T intel_dsi_vbt_gpio_cleanup +ffffffff81a9e000 T intel_dvo_init +ffffffff81a9e650 t intel_disable_dvo +ffffffff81a9e6f0 t intel_enable_dvo +ffffffff81a9e7c0 t intel_dvo_get_hw_state +ffffffff81a9e830 t intel_dvo_get_config +ffffffff81a9e8d0 t intel_dvo_compute_config +ffffffff81a9e960 t intel_dvo_pre_enable +ffffffff81a9ea60 t intel_dvo_connector_get_hw_state +ffffffff81a9eaf0 t intel_dvo_enc_destroy +ffffffff81a9eb30 t intel_dvo_detect +ffffffff81a9ec30 t intel_dvo_get_modes +ffffffff81a9eca0 t intel_dvo_mode_valid +ffffffff81a9f000 T intel_fb_get_format_info +ffffffff81a9f2b0 T intel_fb_is_tiled_modifier +ffffffff81a9f2f0 t lookup_modifier +ffffffff81a9f530 T intel_fb_is_ccs_modifier +ffffffff81a9f570 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a9f5b0 T intel_fb_is_mc_ccs_modifier +ffffffff81a9f5f0 T intel_fb_plane_get_modifiers +ffffffff81a9f7d0 T intel_fb_plane_supports_modifier +ffffffff81a9f850 T intel_format_info_is_yuv_semiplanar +ffffffff81a9f8d0 T intel_fb_is_ccs_aux_plane +ffffffff81a9f980 T intel_fb_rc_ccs_cc_plane +ffffffff81a9fa50 T is_surface_linear +ffffffff81a9fbb0 T main_to_ccs_plane +ffffffff81a9fc60 T skl_ccs_to_main_plane +ffffffff81a9fda0 T skl_main_to_aux_plane +ffffffff81a9fec0 T intel_tile_size +ffffffff81a9ff00 T intel_tile_width_bytes +ffffffff81aa0320 T intel_tile_height +ffffffff81aa0380 T intel_tile_row_size +ffffffff81aa0400 T intel_fb_align_height +ffffffff81aa0480 T intel_fb_modifier_uses_dpt +ffffffff81aa04c0 T intel_fb_uses_dpt +ffffffff81aa0520 T intel_cursor_alignment +ffffffff81aa0580 T intel_surf_alignment +ffffffff81aa0810 T intel_fb_plane_get_subsampling +ffffffff81aa0960 T intel_plane_adjust_aligned_offset +ffffffff81aa09d0 t intel_adjust_aligned_offset +ffffffff81aa0b80 T intel_plane_compute_aligned_offset +ffffffff81aa0c80 t intel_compute_aligned_offset +ffffffff81aa0e40 T intel_fb_needs_pot_stride_remap +ffffffff81aa0eb0 T intel_fb_supports_90_270_rotation +ffffffff81aa0f10 T intel_fill_fb_info +ffffffff81aa1a10 t calc_plane_remap_info +ffffffff81aa23c0 T intel_fb_fill_view +ffffffff81aa2430 T intel_plane_compute_gtt +ffffffff81aa2910 t intel_plane_check_stride +ffffffff81aa2a70 T intel_framebuffer_init +ffffffff81aa32f0 t gen12_ccs_aux_stride +ffffffff81aa3350 T intel_user_framebuffer_create +ffffffff81aa34b0 T intel_framebuffer_create +ffffffff81aa3540 t intel_adjust_tile_offset +ffffffff81aa3680 t intel_user_framebuffer_destroy +ffffffff81aa36f0 t intel_user_framebuffer_create_handle +ffffffff81aa3720 t intel_user_framebuffer_dirty +ffffffff81aa4000 T intel_pin_and_fence_fb_obj +ffffffff81aa4330 t i915_gem_object_lock +ffffffff81aa4550 T intel_unpin_fb_vma +ffffffff81aa45c0 T intel_plane_pin_fb +ffffffff81aa4930 T intel_plane_unpin_fb +ffffffff81aa5000 T intel_fbc_cleanup +ffffffff81aa51c0 T intel_fbc_pre_update +ffffffff81aa5850 T intel_fbc_post_update +ffffffff81aa5a00 T intel_fbc_invalidate +ffffffff81aa5b80 T intel_fbc_flush +ffffffff81aa5e20 T intel_fbc_atomic_check +ffffffff81aa63e0 T intel_fbc_disable +ffffffff81aa64a0 t __intel_fbc_disable +ffffffff81aa65e0 T intel_fbc_update +ffffffff81aa6ca0 T intel_fbc_reset_underrun +ffffffff81aa6e00 T intel_fbc_handle_fifo_underrun_irq +ffffffff81aa6ec0 T intel_fbc_add_plane +ffffffff81aa6ef0 T intel_fbc_init +ffffffff81aa7170 T intel_fbc_sanitize +ffffffff81aa7240 T intel_fbc_crtc_debugfs_add +ffffffff81aa7270 T intel_fbc_debugfs_register +ffffffff81aa72a0 t intel_fbc_is_ok +ffffffff81aa7410 t intel_fbc_update_state +ffffffff81aa7790 t intel_fbc_underrun_work_fn +ffffffff81aa7860 t ivb_fbc_activate +ffffffff81aa7ab0 t ilk_fbc_deactivate +ffffffff81aa7b60 t ilk_fbc_is_active +ffffffff81aa7bc0 t ivb_fbc_is_compressing +ffffffff81aa7c30 t snb_fbc_nuke +ffffffff81aa7cb0 t ilk_fbc_program_cfb +ffffffff81aa7d10 t ivb_fbc_set_false_color +ffffffff81aa7d90 t snb_fbc_activate +ffffffff81aa7e20 t ilk_fbc_is_compressing +ffffffff81aa7e90 t ilk_fbc_activate +ffffffff81aa7fc0 t i965_fbc_nuke +ffffffff81aa8060 t g4x_fbc_activate +ffffffff81aa8170 t g4x_fbc_deactivate +ffffffff81aa8200 t g4x_fbc_is_active +ffffffff81aa8260 t g4x_fbc_is_compressing +ffffffff81aa82c0 t g4x_fbc_program_cfb +ffffffff81aa8310 t i8xx_fbc_activate +ffffffff81aa8480 t i8xx_fbc_deactivate +ffffffff81aa8550 t i8xx_fbc_is_active +ffffffff81aa85b0 t i8xx_fbc_is_compressing +ffffffff81aa8610 t i8xx_fbc_program_cfb +ffffffff81aa8690 t i8xx_fbc_nuke +ffffffff81aa9000 T intel_fbdev_init +ffffffff81aa94f0 t intel_fbdev_suspend_worker +ffffffff81aa9520 T intel_fbdev_initial_config_async +ffffffff81aa9590 T intel_fbdev_unregister +ffffffff81aa95d0 T intel_fbdev_set_suspend +ffffffff81aa9600 T intel_fbdev_fini +ffffffff81aa96a0 T intel_fbdev_output_poll_changed +ffffffff81aa9740 T intel_fbdev_restore_mode +ffffffff81aa97c0 T intel_fbdev_framebuffer +ffffffff81aa9800 t intelfb_create +ffffffff81aaa100 t intelfb_dirty +ffffffff81aaa170 t intel_fbdev_set_par +ffffffff81aab000 T assert_fdi_tx_enabled +ffffffff81aab020 t assert_fdi_tx +ffffffff81aab160 T assert_fdi_tx_disabled +ffffffff81aab180 T assert_fdi_rx_enabled +ffffffff81aab270 T assert_fdi_rx_disabled +ffffffff81aab360 T assert_fdi_tx_pll_enabled +ffffffff81aab450 T assert_fdi_rx_pll_enabled +ffffffff81aab540 T assert_fdi_rx_pll_disabled +ffffffff81aab630 T intel_fdi_link_train +ffffffff81aab650 T intel_fdi_pll_freq_update +ffffffff81aab700 T intel_fdi_link_freq +ffffffff81aab750 T ilk_fdi_compute_config +ffffffff81aaba90 T intel_fdi_normal_train +ffffffff81aabc20 T hsw_fdi_link_train +ffffffff81aac100 T hsw_fdi_disable +ffffffff81aac260 T ilk_fdi_pll_enable +ffffffff81aac450 T ilk_fdi_pll_disable +ffffffff81aac580 T ilk_fdi_disable +ffffffff81aac7d0 T intel_fdi_init_hook +ffffffff81aac830 t ilk_fdi_link_train +ffffffff81aace90 t gen6_fdi_link_train +ffffffff81aad6e0 t ivb_manual_fdi_link_train +ffffffff81aadf60 t cpt_set_fdi_bc_bifurcation +ffffffff81aaf000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81aaf3d0 T intel_set_pch_fifo_underrun_reporting +ffffffff81aaf600 T intel_cpu_fifo_underrun_irq_handler +ffffffff81aaf7f0 T intel_pch_fifo_underrun_irq_handler +ffffffff81aaf870 T intel_check_cpu_fifo_underruns +ffffffff81aafa80 T intel_check_pch_fifo_underruns +ffffffff81aafbb0 T intel_init_fifo_underrun_reporting +ffffffff81ab0000 T intel_frontbuffer_flip_prepare +ffffffff81ab0050 T intel_frontbuffer_flip_complete +ffffffff81ab0130 T intel_frontbuffer_flip +ffffffff81ab0200 T __intel_fb_invalidate +ffffffff81ab0290 T __intel_fb_flush +ffffffff81ab0380 T intel_frontbuffer_get +ffffffff81ab04c0 t frontbuffer_active +ffffffff81ab04f0 t frontbuffer_retire +ffffffff81ab0530 T intel_frontbuffer_put +ffffffff81ab0660 T intel_frontbuffer_track +ffffffff81ab1000 T intel_atomic_global_obj_init +ffffffff81ab1070 T intel_atomic_global_obj_cleanup +ffffffff81ab1160 T intel_atomic_get_global_obj_state +ffffffff81ab13b0 T intel_atomic_get_old_global_obj_state +ffffffff81ab1410 T intel_atomic_get_new_global_obj_state +ffffffff81ab1470 T intel_atomic_swap_global_state +ffffffff81ab15b0 T intel_atomic_clear_global_state +ffffffff81ab16d0 T intel_atomic_lock_global_state +ffffffff81ab1760 T intel_atomic_serialize_global_state +ffffffff81ab17f0 T intel_atomic_global_state_is_serialized +ffffffff81ab2000 T intel_gmbus_is_valid_pin +ffffffff81ab2100 T intel_gmbus_reset +ffffffff81ab2160 T intel_bb_set_bits +ffffffff81ab22a0 T intel_bb_set_dir +ffffffff81ab22d0 T intel_bb_read_bits +ffffffff81ab2460 T intel_acquire_bus +ffffffff81ab2660 T intel_release_bus +ffffffff81ab2800 T intel_send_start +ffffffff81ab2820 T intel_send_stop +ffffffff81ab2840 T intel_initiate_xfer +ffffffff81ab2860 T intel_read_byte +ffffffff81ab2880 T intel_write_byte +ffffffff81ab28a0 T intel_gmbus_output_aksv +ffffffff81ab2970 t do_gmbus_xfer +ffffffff81ab2f70 T intel_gmbus_setup +ffffffff81ab32f0 T intel_gmbus_teardown +ffffffff81ab3370 T intel_gmbus_get_adapter +ffffffff81ab33f0 T intel_gmbus_force_bit +ffffffff81ab3490 T intel_gmbus_is_forced_bit +ffffffff81ab34c0 T intel_gmbus_irq_handler +ffffffff81ab3560 t gmbus_xfer_read +ffffffff81ab3850 t gmbus_xfer_write +ffffffff81ab3a90 t gmbus_wait +ffffffff81ab3e80 t gmbus_wait_idle +ffffffff81ab4010 t gmbus_xfer +ffffffff81ab40f0 t gmbus_func +ffffffff81ab4130 t gmbus_lock_bus +ffffffff81ab4150 t gmbus_trylock_bus +ffffffff81ab41b0 t gmbus_unlock_bus +ffffffff81ab5000 T intel_hdcp_capable +ffffffff81ab50a0 t intel_hdcp_read_valid_bksv +ffffffff81ab5330 T intel_hdcp2_capable +ffffffff81ab5450 T is_hdcp_supported +ffffffff81ab54a0 T intel_hdcp_component_init +ffffffff81ab5500 T intel_hdcp_init +ffffffff81ab5680 t intel_hdcp_check_work +ffffffff81ab7ff0 t intel_hdcp_prop_work +ffffffff81ab8070 T intel_hdcp_enable +ffffffff81ab80c0 T intel_hdcp_disable +ffffffff81ab81f0 t intel_hdcp_update_value +ffffffff81ab83b0 t _intel_hdcp2_disable +ffffffff81ab87a0 t _intel_hdcp_disable +ffffffff81ab8a90 T intel_hdcp_update_pipe +ffffffff81ab8c00 T intel_hdcp_component_fini +ffffffff81ab8ca0 T intel_hdcp_cleanup +ffffffff81ab8de0 T intel_hdcp_atomic_check +ffffffff81ab8e70 T intel_hdcp_handle_cp_irq +ffffffff81ab8f70 t __delayed_work_tick +ffffffff81ab8f90 t hdcp2_authenticate_repeater_topology +ffffffff81ab9250 t transcoder_name +ffffffff81ab9290 t intel_hdcp_get_repeater_ctl +ffffffff81ab9360 t ktime_get_raw +ffffffff81ab93e0 t wait_remaining_ms_from_jiffies +ffffffff81ab9470 t intel_hdcp_auth_downstream +ffffffff81aba650 t intel_write_sha_text +ffffffff81abb000 T intel_hdcp_gsc_cs_required +ffffffff81abb040 T intel_hdcp_gsc_init +ffffffff81abb4c0 T intel_hdcp_gsc_fini +ffffffff81abb520 T intel_hdcp_gsc_msg_send +ffffffff81abb860 t gsc_hdcp_initiate_session +ffffffff81abb8b0 t gsc_hdcp_verify_receiver_cert_prepare_km +ffffffff81abb900 t gsc_hdcp_verify_hprime +ffffffff81abb950 t gsc_hdcp_store_pairing_info +ffffffff81abb9a0 t gsc_hdcp_initiate_locality_check +ffffffff81abb9f0 t gsc_hdcp_verify_lprime +ffffffff81abba40 t gsc_hdcp_get_session_key +ffffffff81abba90 t gsc_hdcp_repeater_check_flow_prepare_ack +ffffffff81abbae0 t gsc_hdcp_verify_mprime +ffffffff81abbb30 t gsc_hdcp_enable_authentication +ffffffff81abbb80 t gsc_hdcp_close_session +ffffffff81abc000 T intel_hdmi_to_i915 +ffffffff81abc040 T hsw_write_infoframe +ffffffff81abc450 t hsw_dip_data_reg +ffffffff81abc600 T hsw_read_infoframe +ffffffff81abc6c0 T intel_hdmi_infoframe_enable +ffffffff81abc760 T intel_hdmi_infoframes_enabled +ffffffff81abc880 T intel_read_infoframe +ffffffff81abca20 T intel_hdmi_read_gcp_infoframe +ffffffff81abcb00 T intel_dp_dual_mode_set_tmds_output +ffffffff81abcbc0 T intel_hdmi_tmds_clock +ffffffff81abcc10 T intel_hdmi_bpc_possible +ffffffff81abcd30 T intel_hdmi_limited_color_range +ffffffff81abcda0 T intel_hdmi_compute_has_hdmi_sink +ffffffff81abce10 T intel_hdmi_compute_config +ffffffff81abd3c0 t intel_hdmi_compute_output_format +ffffffff81abd520 t intel_hdmi_compute_hdmi_infoframe +ffffffff81abd5e0 t intel_hdmi_compute_drm_infoframe +ffffffff81abd6d0 T intel_hdmi_encoder_shutdown +ffffffff81abd7a0 T intel_hdmi_handle_sink_scrambling +ffffffff81abd890 T intel_infoframe_init +ffffffff81abda30 t vlv_write_infoframe +ffffffff81abdd60 t vlv_read_infoframe +ffffffff81abdee0 t vlv_set_infoframes +ffffffff81abe220 t vlv_infoframes_enabled +ffffffff81abe2b0 t g4x_write_infoframe +ffffffff81abe550 t g4x_read_infoframe +ffffffff81abe680 t g4x_set_infoframes +ffffffff81abe910 t g4x_infoframes_enabled +ffffffff81abe990 t hsw_set_infoframes +ffffffff81abec20 t hsw_infoframes_enabled +ffffffff81abecb0 t ibx_write_infoframe +ffffffff81abefc0 t ibx_read_infoframe +ffffffff81abf130 t ibx_set_infoframes +ffffffff81abf460 t ibx_infoframes_enabled +ffffffff81abf4f0 t cpt_write_infoframe +ffffffff81abf7f0 t cpt_read_infoframe +ffffffff81abf960 t cpt_set_infoframes +ffffffff81abfc40 t cpt_infoframes_enabled +ffffffff81abfcb0 T intel_hdmi_init_connector +ffffffff81ac0430 T intel_hdmi_dsc_get_slice_height +ffffffff81ac0490 T intel_hdmi_dsc_get_num_slices +ffffffff81ac0610 T intel_hdmi_dsc_get_bpp +ffffffff81ac06f0 t intel_hdmi_compute_clock +ffffffff81ac0950 t hdmi_port_clock_valid +ffffffff81ac0b70 t intel_write_infoframe +ffffffff81ac0d40 t intel_hdmi_detect +ffffffff81ac0ee0 t intel_hdmi_force +ffffffff81ac0f80 t intel_hdmi_connector_register +ffffffff81ac0f90 t intel_hdmi_connector_unregister +ffffffff81ac0fa0 t intel_hdmi_set_edid +ffffffff81ac1230 t intel_hdmi_get_modes +ffffffff81ac1240 t intel_hdmi_mode_valid +ffffffff81ac13f0 t intel_hdmi_connector_atomic_check +ffffffff81ac1420 t intel_hdmi_mode_clock_valid +ffffffff81ac15c0 t intel_hdmi_hdcp_write_an_aksv +ffffffff81ac1700 t intel_hdmi_hdcp_read_bksv +ffffffff81ac17d0 t intel_hdmi_hdcp_read_bstatus +ffffffff81ac18a0 t intel_hdmi_hdcp_repeater_present +ffffffff81ac1980 t intel_hdmi_hdcp_read_ri_prime +ffffffff81ac1a50 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81ac1b30 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81ac1c00 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81ac1cf0 t intel_hdmi_hdcp_toggle_signalling +ffffffff81ac1f70 t intel_hdmi_hdcp_check_link +ffffffff81ac2290 t intel_hdmi_hdcp2_capable +ffffffff81ac2350 t intel_hdmi_hdcp2_write_msg +ffffffff81ac2440 t intel_hdmi_hdcp2_read_msg +ffffffff81ac2840 t intel_hdmi_hdcp2_check_link +ffffffff81ac3000 T intel_hpd_pin_default +ffffffff81ac3030 T intel_encoder_hotplug +ffffffff81ac3160 T intel_hpd_trigger_irq +ffffffff81ac31d0 T intel_hpd_irq_handler +ffffffff81ac35f0 T intel_hpd_init +ffffffff81ac3700 T intel_hpd_poll_enable +ffffffff81ac3780 T intel_hpd_poll_disable +ffffffff81ac37e0 T intel_hpd_init_early +ffffffff81ac38f0 t i915_hotplug_work_func +ffffffff81ac3cd0 t i915_digport_work_func +ffffffff81ac3e50 t i915_hpd_poll_init_work +ffffffff81ac3f50 t intel_hpd_irq_storm_reenable_work +ffffffff81ac4270 T intel_hpd_cancel_work +ffffffff81ac4390 T intel_hpd_disable +ffffffff81ac4420 T intel_hpd_enable +ffffffff81ac4490 T intel_hpd_debugfs_register +ffffffff81ac44c0 t __delayed_work_tick +ffffffff81ac5000 T i915_hotplug_interrupt_update_locked +ffffffff81ac50c0 T i915_hotplug_interrupt_update +ffffffff81ac5190 T i9xx_hpd_irq_ack +ffffffff81ac52d0 T i9xx_hpd_irq_handler +ffffffff81ac5480 T ibx_hpd_irq_handler +ffffffff81ac5620 T xelpdp_pica_irq_handler +ffffffff81ac58e0 T icp_irq_handler +ffffffff81ac5b70 T spt_irq_handler +ffffffff81ac5e10 T ilk_hpd_irq_handler +ffffffff81ac5f30 T bxt_hpd_irq_handler +ffffffff81ac6090 T gen11_hpd_irq_handler +ffffffff81ac6300 T intel_hpd_enable_detection +ffffffff81ac6340 T intel_hpd_irq_setup +ffffffff81ac6390 T intel_hotplug_irq_init +ffffffff81ac6610 t i915_hpd_irq_setup +ffffffff81ac6720 t i915_hpd_enable_detection +ffffffff81ac67c0 t icp_hpd_irq_setup +ffffffff81ac69b0 t icp_hpd_enable_detection +ffffffff81ac6ab0 t dg1_hpd_irq_setup +ffffffff81ac6b10 t dg1_hpd_enable_detection +ffffffff81ac6c50 t xelpdp_hpd_irq_setup +ffffffff81ac7050 t xelpdp_hpd_enable_detection +ffffffff81ac71f0 t gen11_hpd_irq_setup +ffffffff81ac7440 t gen11_hpd_enable_detection +ffffffff81ac7640 t bxt_hpd_irq_setup +ffffffff81ac77c0 t bxt_hpd_enable_detection +ffffffff81ac78a0 t spt_hpd_irq_setup +ffffffff81ac7ac0 t spt_hpd_enable_detection +ffffffff81ac7be0 t ilk_hpd_irq_setup +ffffffff81ac7e50 t ilk_hpd_enable_detection +ffffffff81ac8000 T intel_hti_init +ffffffff81ac8070 T intel_hti_uses_phy +ffffffff81ac8110 T intel_hti_dpll_mask +ffffffff81ac9000 T intel_load_detect_get_pipe +ffffffff81ac9370 t intel_modeset_disable_planes +ffffffff81ac9430 T intel_load_detect_release_pipe +ffffffff81aca000 T intel_lpe_audio_irq_handler +ffffffff81aca020 T intel_lpe_audio_init +ffffffff81aca050 T intel_lpe_audio_teardown +ffffffff81aca070 T intel_lpe_audio_notify +ffffffff81acb000 T lspcon_detect_hdr_capability +ffffffff81acb0b0 T lspcon_write_infoframe +ffffffff81acb820 T lspcon_read_infoframe +ffffffff81acb860 T lspcon_set_infoframes +ffffffff81acbac0 T lspcon_infoframes_enabled +ffffffff81acbca0 T lspcon_wait_pcon_mode +ffffffff81acbcc0 t lspcon_wait_mode +ffffffff81acbf80 T lspcon_init +ffffffff81acc390 T intel_lspcon_infoframes_enabled +ffffffff81acc3c0 T lspcon_resume +ffffffff81acc660 t lspcon_change_mode +ffffffff81acd000 T intel_lvds_port_enabled +ffffffff81acd080 T intel_get_lvds_encoder +ffffffff81acd0e0 T intel_is_dual_link_lvds +ffffffff81acd140 T intel_lvds_init +ffffffff81acd7e0 t intel_enable_lvds +ffffffff81acd920 t intel_pre_enable_lvds +ffffffff81acdc00 t intel_lvds_compute_config +ffffffff81acdd60 t pch_disable_lvds +ffffffff81acdd80 t pch_post_disable_lvds +ffffffff81acdda0 t gmch_disable_lvds +ffffffff81acddd0 t intel_lvds_get_hw_state +ffffffff81acde90 t intel_lvds_get_config +ffffffff81acdfa0 t intel_lvds_shutdown +ffffffff81ace040 t compute_is_dual_link_lvds +ffffffff81ace110 t intel_no_lvds_dmi_callback +ffffffff81ace160 t intel_disable_lvds +ffffffff81ace290 t intel_lvds_get_modes +ffffffff81ace2e0 t intel_lvds_mode_valid +ffffffff81ace380 t intel_dual_link_lvds_callback +ffffffff81acf000 T _intel_modeset_lock_begin +ffffffff81acf060 T _intel_modeset_lock_loop +ffffffff81acf0a0 T _intel_modeset_lock_end +ffffffff81ad0000 T intel_modeset_setup_hw_state +ffffffff81ad12d0 t intel_crtc_disable_noatomic +ffffffff81ad18b0 t intel_crtc_disable_noatomic_begin +ffffffff81ad2000 T intel_modeset_verify_crtc +ffffffff81ad2560 t verify_connector_state +ffffffff81ad2a00 T intel_modeset_verify_disabled +ffffffff81ad3000 T intel_opregion_notify_encoder +ffffffff81ad3180 t swsci +ffffffff81ad34b0 T intel_opregion_notify_adapter +ffffffff81ad3510 T intel_opregion_asle_intr +ffffffff81ad3560 T intel_opregion_setup +ffffffff81ad3d80 t asle_work +ffffffff81ad41f0 T intel_opregion_get_panel_type +ffffffff81ad42e0 T intel_opregion_get_edid +ffffffff81ad43a0 T intel_opregion_headless_sku +ffffffff81ad43f0 T intel_opregion_register +ffffffff81ad4490 T intel_opregion_resume +ffffffff81ad4530 T intel_opregion_suspend +ffffffff81ad45e0 T intel_opregion_unregister +ffffffff81ad46b0 T intel_opregion_cleanup +ffffffff81ad47a0 t intel_no_opregion_vbt_callback +ffffffff81ad4800 t intel_use_opregion_panel_type_callback +ffffffff81ad5000 T intel_overlay_reset +ffffffff81ad5050 T intel_overlay_switch_off +ffffffff81ad5250 t intel_overlay_release_old_vid +ffffffff81ad53f0 T intel_overlay_put_image_ioctl +ffffffff81ad5700 t update_pfit_vscale_ratio +ffffffff81ad57d0 t check_overlay_dst +ffffffff81ad58a0 t check_overlay_src +ffffffff81ad5af0 t intel_overlay_do_put_image +ffffffff81ad6670 T intel_overlay_attrs_ioctl +ffffffff81ad6990 t check_gamma +ffffffff81ad6b80 T intel_overlay_setup +ffffffff81ad6df0 t intel_overlay_last_flip_retire +ffffffff81ad6e30 T intel_overlay_cleanup +ffffffff81ad6ef0 T intel_overlay_capture_error_state +ffffffff81ad6fe0 T intel_overlay_print_error_state +ffffffff81ad73b0 t intel_overlay_release_old_vid_tail +ffffffff81ad7480 t intel_overlay_off_tail +ffffffff81ad7630 t intel_overlay_flip_prepare +ffffffff81ad8000 T intel_panel_use_ssc +ffffffff81ad8060 T intel_panel_preferred_fixed_mode +ffffffff81ad80b0 T intel_panel_fixed_mode +ffffffff81ad8210 T intel_panel_downclock_mode +ffffffff81ad8300 T intel_panel_highest_mode +ffffffff81ad8360 T intel_panel_get_modes +ffffffff81ad83f0 T intel_panel_drrs_type +ffffffff81ad8420 T intel_panel_compute_config +ffffffff81ad8590 T intel_panel_add_edid_fixed_modes +ffffffff81ad8ac0 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81ad8b20 t intel_panel_add_fixed_mode +ffffffff81ad8ca0 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81ad8d10 T intel_panel_add_encoder_fixed_mode +ffffffff81ad8d50 T intel_panel_fitting +ffffffff81ad93b0 T intel_panel_detect +ffffffff81ad9440 T intel_panel_mode_valid +ffffffff81ad94d0 T intel_panel_init_alloc +ffffffff81ad9520 T intel_panel_init +ffffffff81ad9640 T intel_panel_fini +ffffffff81ada000 T intel_has_pch_trancoder +ffffffff81ada060 T intel_crtc_pch_transcoder +ffffffff81ada0a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81ada0f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81ada140 T ilk_pch_pre_enable +ffffffff81ada170 T ilk_pch_enable +ffffffff81ada750 t ilk_pch_transcoder_set_timings +ffffffff81ada9b0 T ilk_pch_disable +ffffffff81ada9d0 T ilk_pch_post_disable +ffffffff81adadb0 T ilk_pch_get_config +ffffffff81adaf70 T lpt_pch_enable +ffffffff81adb1e0 T lpt_pch_disable +ffffffff81adb2f0 T lpt_pch_get_config +ffffffff81adb3c0 T intel_pch_sanitize +ffffffff81adb6a0 t assert_pch_dp_disabled +ffffffff81adb820 t assert_pch_hdmi_disabled +ffffffff81adc000 T lpt_disable_iclkip +ffffffff81adc070 T lpt_iclkip +ffffffff81adc100 T lpt_program_iclkip +ffffffff81adc390 T lpt_get_iclkip +ffffffff81adc4a0 T lpt_disable_clkout_dp +ffffffff81adc580 T intel_init_pch_refclk +ffffffff81ade000 T intel_crtc_initial_plane_config +ffffffff81adf000 T intel_pmdemand_init +ffffffff81adf120 T intel_pmdemand_init_early +ffffffff81adf1a0 T intel_pmdemand_update_phys_mask +ffffffff81adf240 T intel_pmdemand_update_port_clock +ffffffff81adf280 T intel_pmdemand_atomic_check +ffffffff81adf620 t intel_pmdemand_update_max_ddiclk +ffffffff81adf6f0 t intel_pmdemand_update_active_non_tc_phys +ffffffff81adf8f0 T intel_pmdemand_init_pmdemand_params +ffffffff81adfac0 T intel_pmdemand_program_dbuf +ffffffff81adfc50 t intel_pmdemand_wait +ffffffff81adfe40 T intel_pmdemand_pre_plane_update +ffffffff81adff30 t intel_pmdemand_program_params +ffffffff81ae0370 T intel_pmdemand_post_plane_update +ffffffff81ae0450 t intel_pmdemand_duplicate_state +ffffffff81ae04e0 t intel_pmdemand_destroy_state +ffffffff81ae1000 T intel_pps_lock +ffffffff81ae1060 T intel_pps_unlock +ffffffff81ae10c0 T intel_pps_reset_all +ffffffff81ae1210 T intel_pps_check_power_unlocked +ffffffff81ae14f0 t pps_name +ffffffff81ae1590 T intel_pps_wait_power_cycle +ffffffff81ae1630 t wait_panel_power_cycle +ffffffff81ae1810 T intel_pps_vdd_on_unlocked +ffffffff81ae1d80 T intel_pps_vdd_on +ffffffff81ae1f10 T intel_pps_vdd_off_sync +ffffffff81ae1fe0 t intel_pps_vdd_off_sync_unlocked +ffffffff81ae2400 T intel_pps_vdd_off_unlocked +ffffffff81ae25b0 T intel_pps_on_unlocked +ffffffff81ae2a40 T intel_pps_on +ffffffff81ae2ae0 T intel_pps_off_unlocked +ffffffff81ae2ec0 T intel_pps_off +ffffffff81ae2f60 T intel_pps_backlight_on +ffffffff81ae3150 T intel_pps_backlight_off +ffffffff81ae3340 T intel_pps_backlight_power +ffffffff81ae3530 T vlv_pps_init +ffffffff81ae3710 t vlv_detach_power_sequencer +ffffffff81ae38e0 t vlv_steal_power_sequencer +ffffffff81ae3a10 t pps_init_delays +ffffffff81ae3eb0 t pps_init_registers +ffffffff81ae4240 T intel_pps_have_panel_power_or_vdd +ffffffff81ae4390 T intel_pps_encoder_reset +ffffffff81ae4530 t vlv_initial_power_sequencer_setup +ffffffff81ae4840 t pps_vdd_init +ffffffff81ae49f0 T intel_pps_init +ffffffff81ae4e60 t edp_panel_vdd_work +ffffffff81ae4f10 T intel_pps_init_late +ffffffff81ae5150 T intel_pps_unlock_regs_wa +ffffffff81ae5260 T intel_pps_setup +ffffffff81ae52d0 T assert_pps_unlocked +ffffffff81ae5560 t intel_pps_get_registers +ffffffff81ae5d70 t wait_panel_status +ffffffff81ae6190 t intel_pps_readout_hw_state +ffffffff81ae6340 t __delayed_work_tick +ffffffff81ae7000 T intel_psr_irq_handler +ffffffff81ae7650 t transcoder_name +ffffffff81ae7690 T intel_psr_init_dpcd +ffffffff81ae7930 T intel_psr_compute_config +ffffffff81ae7b10 t intel_psr2_config_valid +ffffffff81ae7f80 T intel_psr_get_config +ffffffff81ae8120 T intel_psr_disable +ffffffff81ae8230 t intel_psr_disable_locked +ffffffff81ae85c0 T intel_psr_pause +ffffffff81ae87c0 t intel_psr_exit +ffffffff81ae8a70 T intel_psr_resume +ffffffff81ae8b00 t intel_psr_activate +ffffffff81ae9230 T intel_psr2_disable_plane_sel_fetch_arm +ffffffff81ae92a0 T intel_psr2_program_plane_sel_fetch_arm +ffffffff81ae9340 T intel_psr2_program_plane_sel_fetch_noarm +ffffffff81ae94b0 T intel_psr2_program_trans_man_trk_ctl +ffffffff81ae95a0 T intel_psr2_sel_fetch_update +ffffffff81ae9cf0 T intel_psr_pre_plane_update +ffffffff81ae9ec0 t wm_optimization_wa +ffffffff81aea050 T intel_psr_post_plane_update +ffffffff81aeac80 T intel_psr_wait_for_idle_locked +ffffffff81aeae50 T intel_psr_debug_set +ffffffff81aeb170 T intel_psr_invalidate +ffffffff81aeb3b0 T intel_psr_flush +ffffffff81aeb7e0 T intel_psr_init +ffffffff81aeb910 t intel_psr_work +ffffffff81aebab0 t tgl_dc3co_disable_work +ffffffff81aebb00 T intel_psr_short_pulse +ffffffff81aebed0 T intel_psr_enabled +ffffffff81aebf50 T intel_psr_lock +ffffffff81aec010 T intel_psr_unlock +ffffffff81aec0d0 T intel_psr_debugfs_register +ffffffff81aec100 T intel_psr_connector_debugfs_add +ffffffff81aec130 t _compute_psr2_sdp_prior_scanline_indication +ffffffff81aec1f0 t _compute_psr2_wake_times +ffffffff81aec2e0 t intel_psr2_sel_fetch_config_valid +ffffffff81aec370 t psr2_granularity_check +ffffffff81aec460 t tgl_psr2_disable_dc3co +ffffffff81aec570 t __delayed_work_tick +ffffffff81aed000 T intel_lookup_range_min_qp +ffffffff81aed110 T intel_lookup_range_max_qp +ffffffff81aee000 T intel_init_quirks +ffffffff81aee0f0 T intel_has_quirk +ffffffff81aee130 t quirk_ssc_force_disable +ffffffff81aee160 t quirk_invert_brightness +ffffffff81aee190 t quirk_backlight_present +ffffffff81aee1c0 t quirk_increase_t12_delay +ffffffff81aee1f0 t quirk_increase_ddi_disabled_time +ffffffff81aee220 t intel_dmi_reverse_brightness +ffffffff81aee270 t intel_dmi_no_pps_backlight +ffffffff81aef000 T intel_sdvo_port_enabled +ffffffff81aef0a0 T intel_sdvo_init +ffffffff81af0030 t intel_sdvo_compute_config +ffffffff81af03f0 t pch_disable_sdvo +ffffffff81af0420 t pch_post_disable_sdvo +ffffffff81af0430 t intel_disable_sdvo +ffffffff81af05a0 t intel_sdvo_pre_enable +ffffffff81af0f20 t intel_enable_sdvo +ffffffff81af10f0 t intel_sdvo_get_hw_state +ffffffff81af11e0 t intel_sdvo_get_config +ffffffff81af1600 t intel_sdvo_set_target_input +ffffffff81af1670 t intel_sdvo_get_input_pixel_clock_range +ffffffff81af1710 t intel_sdvo_ddc_proxy_xfer +ffffffff81af17c0 t intel_sdvo_ddc_proxy_func +ffffffff81af17f0 t __intel_sdvo_write_cmd +ffffffff81af1ca0 t proxy_lock_bus +ffffffff81af1cd0 t proxy_trylock_bus +ffffffff81af1d00 t proxy_unlock_bus +ffffffff81af1d30 t intel_sdvo_enc_destroy +ffffffff81af1d40 t intel_sdvo_set_output_timings_from_mode +ffffffff81af1e40 t intel_sdvo_get_preferred_input_mode +ffffffff81af21d0 t intel_sdvo_get_dtd_from_mode +ffffffff81af2350 t intel_sdvo_read_response +ffffffff81af27f0 t intel_sdvo_get_value +ffffffff81af2860 t intel_sdvo_write_sdvox +ffffffff81af2a50 t intel_sdvo_write_infoframe +ffffffff81af2c10 t intel_sdvo_read_infoframe +ffffffff81af2e30 t intel_sdvo_hotplug +ffffffff81af2e70 t intel_sdvo_connector_get_hw_state +ffffffff81af2f00 t intel_sdvo_detect +ffffffff81af31f0 t intel_sdvo_connector_register +ffffffff81af3200 t intel_sdvo_connector_unregister +ffffffff81af3210 t intel_sdvo_connector_duplicate_state +ffffffff81af3290 t intel_sdvo_connector_atomic_set_property +ffffffff81af3460 t intel_sdvo_connector_atomic_get_property +ffffffff81af3680 t intel_sdvo_get_analog_edid +ffffffff81af36b0 t intel_sdvo_connector_matches_edid +ffffffff81af3740 t intel_sdvo_get_modes +ffffffff81af39e0 t intel_sdvo_mode_valid +ffffffff81af3af0 t intel_sdvo_atomic_check +ffffffff81af3ba0 t intel_sdvo_create_enhance_property +ffffffff81af5000 T intel_snps_phy_wait_for_calibration +ffffffff81af50d0 T intel_snps_phy_update_psr_power_state +ffffffff81af5190 T intel_snps_phy_set_signal_levels +ffffffff81af53e0 T intel_mpllb_calc_state +ffffffff81af5570 T intel_snps_phy_check_hdmi_link_rate +ffffffff81af5610 T intel_mpllb_enable +ffffffff81af5850 T intel_mpllb_disable +ffffffff81af59c0 T intel_mpllb_calc_port_clock +ffffffff81af5a90 T intel_mpllb_readout_hw_state +ffffffff81af5c00 T intel_mpllb_state_verify +ffffffff81af7000 T vlv_plane_min_cdclk +ffffffff81af70f0 T ivb_plane_min_cdclk +ffffffff81af71b0 T hsw_plane_min_cdclk +ffffffff81af7250 T chv_plane_check_rotation +ffffffff81af72c0 T intel_sprite_plane_create +ffffffff81af7610 t vlv_sprite_update_noarm +ffffffff81af7710 t vlv_sprite_update_arm +ffffffff81af7db0 t vlv_sprite_disable_arm +ffffffff81af7e40 t vlv_sprite_get_hw_state +ffffffff81af7f10 t vlv_sprite_check +ffffffff81af7fe0 t ivb_sprite_update_noarm +ffffffff81af8150 t ivb_sprite_update_arm +ffffffff81af8520 t ivb_sprite_disable_arm +ffffffff81af85d0 t ivb_sprite_get_hw_state +ffffffff81af8690 t g4x_sprite_check +ffffffff81af8930 t hsw_sprite_max_stride +ffffffff81af8980 t g4x_sprite_max_stride +ffffffff81af89f0 t ivb_sprite_min_cdclk +ffffffff81af8b30 t g4x_sprite_update_noarm +ffffffff81af8c90 t g4x_sprite_update_arm +ffffffff81af90d0 t g4x_sprite_disable_arm +ffffffff81af9180 t g4x_sprite_get_hw_state +ffffffff81af9240 t g4x_sprite_min_cdclk +ffffffff81af9310 t vlv_sprite_ctl +ffffffff81af9500 t vlv_sprite_format_mod_supported +ffffffff81af9630 t ivb_sprite_ctl +ffffffff81af9860 t g4x_sprite_ctl +ffffffff81af9a20 t snb_sprite_format_mod_supported +ffffffff81af9b10 t g4x_sprite_format_mod_supported +ffffffff81afa000 T intel_sprite_set_colorkey_ioctl +ffffffff81afb000 T intel_tc_port_in_tbt_alt_mode +ffffffff81afb070 T intel_tc_port_in_dp_alt_mode +ffffffff81afb0e0 T intel_tc_port_in_legacy_mode +ffffffff81afb150 T intel_tc_cold_requires_aux_pw +ffffffff81afb1c0 T intel_tc_port_get_lane_mask +ffffffff81afb2f0 T intel_tc_port_get_pin_assignment_mask +ffffffff81afb420 T intel_tc_port_fia_max_lane_count +ffffffff81afb600 T intel_tc_port_set_fia_lane_count +ffffffff81afb7d0 T intel_tc_port_init_mode +ffffffff81afba10 t intel_tc_port_update_mode +ffffffff81afbdc0 T intel_tc_port_sanitize_mode +ffffffff81afc100 T intel_tc_port_connected_locked +ffffffff81afc260 T intel_tc_port_ref_held +ffffffff81afc2c0 T intel_tc_port_connected +ffffffff81afc330 T intel_tc_port_link_needs_reset +ffffffff81afc3e0 T intel_tc_port_link_reset +ffffffff81afc4e0 T intel_tc_port_link_cancel_reset_work +ffffffff81afc590 T intel_tc_port_lock +ffffffff81afc5b0 t __intel_tc_port_lock +ffffffff81afc6f0 T intel_tc_port_suspend +ffffffff81afc750 T intel_tc_port_unlock +ffffffff81afc7d0 T intel_tc_port_get_link +ffffffff81afc860 T intel_tc_port_put_link +ffffffff81afc910 T intel_tc_port_init +ffffffff81afcb50 t kasprintf +ffffffff81afcc20 t intel_tc_port_disconnect_phy_work +ffffffff81afcc70 t intel_tc_port_link_reset_work +ffffffff81afcf70 T intel_tc_port_cleanup +ffffffff81afd030 t intel_tc_port_needs_reset +ffffffff81afd130 t tgl_tc_phy_cold_off_domain +ffffffff81afd160 t xelpdp_tc_phy_hpd_live_status +ffffffff81afd270 t adlp_tc_phy_is_ready +ffffffff81afd370 t xelpdp_tc_phy_is_owned +ffffffff81afd440 t xelpdp_tc_phy_get_hw_state +ffffffff81afd5c0 t xelpdp_tc_phy_connect +ffffffff81afd810 t xelpdp_tc_phy_disconnect +ffffffff81afd950 t adlp_tc_phy_init +ffffffff81afd9c0 t tc_phy_get_current_mode +ffffffff81afdce0 t tc_phy_wait_for_ready +ffffffff81afde50 t xelpdp_tc_phy_enable_tcss_power +ffffffff81afe0a0 t tc_phy_verify_legacy_or_dp_alt_mode +ffffffff81afe280 t xelpdp_tc_phy_wait_for_tcss_power +ffffffff81afe490 t adlp_tc_phy_cold_off_domain +ffffffff81afe4f0 t adlp_tc_phy_hpd_live_status +ffffffff81afe5f0 t adlp_tc_phy_is_owned +ffffffff81afe6b0 t adlp_tc_phy_get_hw_state +ffffffff81afe740 t adlp_tc_phy_connect +ffffffff81afea30 t adlp_tc_phy_disconnect +ffffffff81afeb90 t icl_tc_phy_hpd_live_status +ffffffff81afecf0 t icl_tc_phy_is_ready +ffffffff81afee00 t icl_tc_phy_is_owned +ffffffff81afef10 t icl_tc_phy_get_hw_state +ffffffff81afefa0 t icl_tc_phy_connect +ffffffff81aff110 t icl_tc_phy_disconnect +ffffffff81aff190 t tgl_tc_phy_init +ffffffff81aff2c0 t icl_tc_phy_take_ownership +ffffffff81aff430 t icl_tc_phy_cold_off_domain +ffffffff81aff490 t icl_tc_phy_init +ffffffff81aff4f0 t __delayed_work_tick +ffffffff81b00000 T intel_tv_init +ffffffff81b003f0 t intel_tv_compute_config +ffffffff81b008a0 t intel_tv_get_config +ffffffff81b00d60 t intel_tv_pre_enable +ffffffff81b01680 t intel_enable_tv +ffffffff81b016e0 t intel_disable_tv +ffffffff81b01740 t intel_tv_get_hw_state +ffffffff81b017a0 t intel_tv_connector_duplicate_state +ffffffff81b01820 t intel_tv_mode_to_mode +ffffffff81b01970 t intel_tv_get_modes +ffffffff81b01cb0 t intel_tv_detect +ffffffff81b02140 t intel_tv_mode_valid +ffffffff81b021f0 t intel_tv_atomic_check +ffffffff81b03000 T i915_get_vblank_counter +ffffffff81b031e0 T g4x_get_vblank_counter +ffffffff81b03270 T intel_crtc_get_vblank_timestamp +ffffffff81b03290 t i915_get_crtc_scanoutpos +ffffffff81b03690 T intel_get_crtc_scanline +ffffffff81b03700 t __intel_get_crtc_scanline +ffffffff81b03950 T intel_wait_for_pipe_scanline_stopped +ffffffff81b03960 t wait_for_pipe_scanline_moving +ffffffff81b03bc0 T intel_wait_for_pipe_scanline_moving +ffffffff81b03be0 T intel_crtc_update_active_timings +ffffffff81b04000 T intel_dsc_source_support +ffffffff81b04050 T intel_dsc_compute_params +ffffffff81b04650 T intel_dsc_power_domain +ffffffff81b04700 T intel_dsc_get_num_vdsc_instances +ffffffff81b04750 T intel_dsc_dsi_pps_write +ffffffff81b049f0 T intel_dsc_dp_pps_write +ffffffff81b04ae0 T intel_uncompressed_joiner_enable +ffffffff81b04c00 T intel_dsc_enable +ffffffff81b06600 T intel_dsc_disable +ffffffff81b06780 T intel_dsc_get_config +ffffffff81b07000 T intel_vga_disable +ffffffff81b07120 T intel_vga_redisable_power_on +ffffffff81b071c0 T intel_vga_redisable +ffffffff81b07280 T intel_vga_reset_io_mem +ffffffff81b072e0 T intel_vga_register +ffffffff81b07310 T intel_vga_unregister +ffffffff81b08000 T intel_vrr_is_capable +ffffffff81b08080 T intel_vrr_check_modeset +ffffffff81b08110 T intel_vrr_vmin_vblank_start +ffffffff81b08170 T intel_vrr_vmax_vblank_start +ffffffff81b081d0 T intel_vrr_compute_config +ffffffff81b08360 T intel_vrr_set_transcoder_timings +ffffffff81b08540 T intel_vrr_send_push +ffffffff81b085c0 T intel_vrr_is_push_sent +ffffffff81b08650 T intel_vrr_enable +ffffffff81b08770 T intel_vrr_disable +ffffffff81b088b0 T intel_vrr_get_config +ffffffff81b09000 T intel_update_watermarks +ffffffff81b09040 T intel_compute_pipe_wm +ffffffff81b09090 T intel_compute_intermediate_wm +ffffffff81b09120 T intel_initial_watermarks +ffffffff81b09170 T intel_atomic_update_watermarks +ffffffff81b091b0 T intel_optimize_watermarks +ffffffff81b091f0 T intel_compute_global_watermarks +ffffffff81b09240 T intel_wm_get_hw_state +ffffffff81b09280 T intel_wm_plane_visible +ffffffff81b092e0 T intel_print_wm_latency +ffffffff81b093f0 T intel_wm_init +ffffffff81b09410 T intel_wm_debugfs_register +ffffffff81b0a000 T skl_update_scaler_crtc +ffffffff81b0a0b0 t skl_update_scaler +ffffffff81b0a3f0 T skl_update_scaler_plane +ffffffff81b0a7f0 T intel_atomic_setup_scalers +ffffffff81b0ad50 T skl_pfit_enable +ffffffff81b0b240 T skl_program_plane_scaler +ffffffff81b0b930 T skl_detach_scalers +ffffffff81b0ba90 T skl_scaler_disable +ffffffff81b0bbc0 T skl_scaler_get_config +ffffffff81b0c000 T skl_format_to_fourcc +ffffffff81b0c180 T icl_is_nv12_y_plane +ffffffff81b0c1f0 T icl_hdr_plane_mask +ffffffff81b0c220 T icl_is_hdr_plane +ffffffff81b0c260 T skl_calc_main_surface_offset +ffffffff81b0c4a0 T skl_universal_plane_create +ffffffff81b0cc80 t icl_plane_min_width +ffffffff81b0ce10 t icl_hdr_plane_max_width +ffffffff81b0ce60 t icl_sdr_plane_max_width +ffffffff81b0ce90 t icl_plane_max_height +ffffffff81b0cec0 t icl_plane_min_cdclk +ffffffff81b0cf00 t glk_plane_max_width +ffffffff81b0cfb0 t skl_plane_max_height +ffffffff81b0cfe0 t glk_plane_min_cdclk +ffffffff81b0d050 t skl_plane_max_width +ffffffff81b0d120 t skl_plane_min_cdclk +ffffffff81b0d190 t skl_plane_max_stride +ffffffff81b0d230 t icl_plane_update_noarm +ffffffff81b0dae0 t icl_plane_update_arm +ffffffff81b0dc80 t icl_plane_disable_arm +ffffffff81b0dd90 t skl_plane_update_noarm +ffffffff81b0df30 t skl_plane_update_arm +ffffffff81b0e250 t skl_plane_disable_arm +ffffffff81b0e300 t skl_plane_get_hw_state +ffffffff81b0e3d0 t skl_plane_check +ffffffff81b0f000 t skl_plane_async_flip +ffffffff81b0f130 t skl_plane_enable_flip_done +ffffffff81b0f190 t skl_plane_disable_flip_done +ffffffff81b0f1f0 T skl_get_initial_plane_config +ffffffff81b0f9b0 t skl_plane_aux_dist +ffffffff81b0faa0 t skl_surf_address +ffffffff81b0fbc0 t skl_plane_check_nv12_rotation +ffffffff81b0fc60 t pxp_is_borked +ffffffff81b0fcc0 t skl_plane_ctl +ffffffff81b103a0 t glk_plane_color_ctl +ffffffff81b104f0 t skl_check_main_ccs_coordinates +ffffffff81b10680 t gen12_plane_format_mod_supported +ffffffff81b108d0 t skl_plane_format_mod_supported +ffffffff81b11000 T intel_enabled_dbuf_slices_mask +ffffffff81b11120 T intel_sagv_pre_plane_update +ffffffff81b112b0 T intel_sagv_post_plane_update +ffffffff81b11520 T intel_can_enable_sagv +ffffffff81b11590 T skl_ddb_dbuf_slice_mask +ffffffff81b11640 T skl_write_plane_wm +ffffffff81b11ac0 T skl_write_cursor_wm +ffffffff81b11ea0 T skl_ddb_allocation_overlaps +ffffffff81b11f40 T intel_wm_state_verify +ffffffff81b12940 t skl_pipe_wm_get_hw_state +ffffffff81b12c90 T skl_watermark_ipc_enabled +ffffffff81b12cc0 T skl_watermark_ipc_update +ffffffff81b12d70 T skl_watermark_ipc_init +ffffffff81b12e40 T skl_wm_init +ffffffff81b13680 T intel_atomic_get_dbuf_state +ffffffff81b136a0 T intel_dbuf_init +ffffffff81b13710 T intel_dbuf_pre_plane_update +ffffffff81b139e0 T intel_dbuf_post_plane_update +ffffffff81b13ab0 T intel_mbus_dbox_update +ffffffff81b13d20 T skl_watermark_debugfs_register +ffffffff81b13d50 t skl_sagv_disable +ffffffff81b13e70 t skl_compute_wm +ffffffff81b17160 t skl_wm_get_hw_state_and_sanitize +ffffffff81b17950 t skl_build_plane_wm_single +ffffffff81b17ce0 t skl_compute_wm_params +ffffffff81b180b0 t skl_compute_plane_wm +ffffffff81b184e0 t skl_compute_dbuf_slices +ffffffff81b189e0 t skl_ddb_entry_for_slices +ffffffff81b18b20 t intel_dbuf_duplicate_state +ffffffff81b18bb0 t intel_dbuf_destroy_state +ffffffff81b19000 T pixel_format_from_register_bits +ffffffff81b19060 T vlv_dsi_wait_for_fifo_empty +ffffffff81b19120 T vlv_dsi_init +ffffffff81b19930 t intel_dsi_compute_config +ffffffff81b19a80 t intel_dsi_pre_enable +ffffffff81b1b540 t bxt_dsi_enable +ffffffff81b1b560 t intel_dsi_disable +ffffffff81b1b810 t intel_dsi_post_disable +ffffffff81b1c4b0 t intel_dsi_get_hw_state +ffffffff81b1c780 t intel_dsi_get_config +ffffffff81b1cf20 t intel_dsi_encoder_destroy +ffffffff81b1cf50 t intel_dsi_prepare +ffffffff81b1dc30 t dpi_send_cmd +ffffffff81b1ddc0 t intel_dsi_host_attach +ffffffff81b1ddf0 t intel_dsi_host_detach +ffffffff81b1de20 t intel_dsi_host_transfer +ffffffff81b1e280 t vlv_dsi_mode_valid +ffffffff81b1f000 T vlv_dsi_pll_compute +ffffffff81b1f3a0 t vlv_dsi_pclk +ffffffff81b1f550 T vlv_dsi_pll_enable +ffffffff81b1f790 T vlv_dsi_pll_disable +ffffffff81b1f810 T bxt_dsi_pll_is_enabled +ffffffff81b1f8e0 T bxt_dsi_pll_disable +ffffffff81b1f9e0 T vlv_dsi_get_pclk +ffffffff81b1fa80 T bxt_dsi_get_pclk +ffffffff81b1fb40 T vlv_dsi_reset_clocks +ffffffff81b1fbd0 T bxt_dsi_pll_compute +ffffffff81b1fd70 T bxt_dsi_pll_enable +ffffffff81b200f0 T bxt_dsi_reset_clocks +ffffffff81b20210 T assert_dsi_pll_enabled +ffffffff81b20230 t assert_dsi_pll +ffffffff81b20340 T assert_dsi_pll_disabled +ffffffff81b21000 T i915_gem_busy_ioctl +ffffffff81b22000 T i915_gem_clflush_object +ffffffff81b221f0 t clflush_work +ffffffff81b22250 t clflush_release +ffffffff81b23000 T i915_lut_handle_alloc +ffffffff81b23020 T i915_lut_handle_free +ffffffff81b23040 T i915_gem_context_release +ffffffff81b23070 T i915_gem_init__contexts +ffffffff81b230d0 T i915_gem_context_open +ffffffff81b23230 t i915_gem_create_context +ffffffff81b23a00 t proto_context_close +ffffffff81b23ab0 t gem_context_register +ffffffff81b23c50 T i915_gem_context_close +ffffffff81b23da0 t context_close +ffffffff81b24460 T i915_gem_vm_create_ioctl +ffffffff81b24570 t xa_alloc +ffffffff81b245f0 T i915_gem_vm_destroy_ioctl +ffffffff81b246a0 T i915_gem_user_to_context_sseu +ffffffff81b24900 T i915_gem_context_lookup +ffffffff81b24a30 T i915_gem_context_create_ioctl +ffffffff81b24c80 t proto_context_register +ffffffff81b24dd0 T i915_gem_context_destroy_ioctl +ffffffff81b24ef0 T i915_gem_context_getparam_ioctl +ffffffff81b25310 T i915_gem_context_setparam_ioctl +ffffffff81b257d0 t set_proto_ctx_param +ffffffff81b25ef0 T i915_gem_context_reset_stats_ioctl +ffffffff81b25ff0 T i915_gem_engines_iter_next +ffffffff81b26040 T i915_gem_context_module_exit +ffffffff81b26060 T i915_gem_context_module_init +ffffffff81b260c0 t i915_gem_context_release_work +ffffffff81b26190 t intel_context_set_gem +ffffffff81b262c0 t engines_notify +ffffffff81b26430 t intel_context_unpin +ffffffff81b264c0 t kill_engines +ffffffff81b26650 t create_setparam +ffffffff81b266c0 t invalid_ext +ffffffff81b266f0 t lookup_user_engine +ffffffff81b267b0 t set_proto_ctx_engines_balance +ffffffff81b26a90 t set_proto_ctx_engines_bond +ffffffff81b26e10 t set_proto_ctx_engines_parallel_submit +ffffffff81b28000 T __i915_gem_object_create_user +ffffffff81b28020 t __i915_gem_object_create_user_ext +ffffffff81b284b0 T i915_gem_dumb_create +ffffffff81b28620 T i915_gem_create_ioctl +ffffffff81b286f0 T i915_gem_create_ext_ioctl +ffffffff81b288f0 t ext_set_placements +ffffffff81b28d00 t ext_set_protected +ffffffff81b28d80 t ext_set_pat +ffffffff81b29000 T i915_gem_prime_export +ffffffff81b29090 T i915_gem_prime_import +ffffffff81b2a000 T i915_gem_cpu_write_needs_clflush +ffffffff81b2a070 T i915_gem_object_flush_if_display +ffffffff81b2a280 t i915_gem_object_unlock +ffffffff81b2a340 T i915_gem_object_flush_if_display_locked +ffffffff81b2a3c0 T i915_gem_object_set_to_wc_domain +ffffffff81b2a4c0 t flush_write_domain +ffffffff81b2a610 T i915_gem_object_set_to_gtt_domain +ffffffff81b2a760 T i915_gem_object_set_cache_level +ffffffff81b2a7f0 T i915_gem_get_caching_ioctl +ffffffff81b2a8d0 T i915_gem_set_caching_ioctl +ffffffff81b2ab10 t i915_gem_object_lock_interruptible +ffffffff81b2ac30 T i915_gem_object_pin_to_display_plane +ffffffff81b2ae50 T i915_gem_object_set_to_cpu_domain +ffffffff81b2af40 T i915_gem_set_domain_ioctl +ffffffff81b2b130 T i915_gem_object_prepare_read +ffffffff81b2b260 T i915_gem_object_prepare_write +ffffffff81b2c000 T i915_gem_execbuffer2_ioctl +ffffffff81b2cb80 t eb_select_context +ffffffff81b2cc00 t eb_select_engine +ffffffff81b2d080 t eb_lookup_vmas +ffffffff81b2d7c0 t eb_release_vmas +ffffffff81b2db00 t eb_relocate_parse +ffffffff81b2dc20 t eb_capture_stage +ffffffff81b2dd60 t eb_requests_create +ffffffff81b2e140 t eb_submit +ffffffff81b2e5a0 t eb_requests_get +ffffffff81b2e610 t eb_requests_add +ffffffff81b2e7a0 t signal_fence_array +ffffffff81b2e850 t eb_requests_put +ffffffff81b2e8c0 t eb_put_engine +ffffffff81b2ea10 t parse_timeline_fences +ffffffff81b2ee10 t eb_pin_engine +ffffffff81b2f120 t eb_validate_vmas +ffffffff81b2fa10 t eb_relocate_vma +ffffffff81b2fc50 t eb_parse +ffffffff81b2ffe0 t eb_relocate_parse_slow +ffffffff81b306b0 t eb_pin_timeline +ffffffff81b30900 t i915_gem_object_lock +ffffffff81b30b20 t eb_pin_flags +ffffffff81b30b90 t eb_relocate_entry +ffffffff81b31360 t reloc_cache_reset +ffffffff81b31450 t shadow_batch_pin +ffffffff81b32000 T __i915_gem_object_create_internal +ffffffff81b320c0 T i915_gem_object_create_internal +ffffffff81b32180 t i915_gem_object_get_pages_internal +ffffffff81b32470 t i915_gem_object_put_pages_internal +ffffffff81b33000 T i915_gem_object_lmem_io_map +ffffffff81b33050 T i915_gem_object_is_lmem +ffffffff81b330a0 T __i915_gem_object_is_lmem +ffffffff81b330f0 T __i915_gem_object_create_lmem_with_ps +ffffffff81b33110 T i915_gem_object_create_lmem_from_data +ffffffff81b331f0 T i915_gem_object_create_lmem +ffffffff81b34000 T i915_gem_mmap_ioctl +ffffffff81b341f0 T i915_gem_mmap_gtt_version +ffffffff81b34220 T remap_io_mapping +ffffffff81b342e0 T i915_gem_fault +ffffffff81b34f20 T __i915_gem_object_release_mmap_gtt +ffffffff81b34fa0 T i915_gem_object_release_mmap_gtt +ffffffff81b35050 T i915_gem_object_runtime_pm_release_mmap_offset +ffffffff81b350b0 T i915_gem_object_release_mmap_offset +ffffffff81b351b0 T i915_gem_dumb_mmap_offset +ffffffff81b351e0 t __assign_mmap_offset_handle +ffffffff81b356f0 T i915_gem_mmap_offset_ioctl +ffffffff81b357e0 T i915_gem_mmap +ffffffff81b36000 T i915_gem_get_pat_index +ffffffff81b36080 T i915_gem_object_has_cache_level +ffffffff81b36120 T i915_gem_object_alloc +ffffffff81b36170 T i915_gem_object_free +ffffffff81b36190 T i915_gem_object_init +ffffffff81b362b0 T __i915_gem_object_fini +ffffffff81b362d0 T i915_gem_object_set_cache_coherency +ffffffff81b363f0 T i915_gem_object_set_pat_index +ffffffff81b364a0 T i915_gem_object_can_bypass_llc +ffffffff81b36500 T __i915_gem_free_object_rcu +ffffffff81b36570 T __i915_gem_object_pages_fini +ffffffff81b368d0 T __i915_gem_free_object +ffffffff81b36980 T i915_gem_flush_free_objects +ffffffff81b369d0 t __i915_gem_free_objects +ffffffff81b36ac0 T __i915_gem_object_flush_frontbuffer +ffffffff81b36b70 T __i915_gem_object_invalidate_frontbuffer +ffffffff81b36c20 T i915_gem_object_read_from_page +ffffffff81b36d70 T i915_gem_object_has_struct_page +ffffffff81b36da0 T i915_gem_object_has_iomem +ffffffff81b36de0 T i915_gem_object_evictable +ffffffff81b36e90 T i915_gem_object_migratable +ffffffff81b36ed0 T i915_gem_object_can_migrate +ffffffff81b37040 T i915_gem_object_migrate +ffffffff81b370e0 T __i915_gem_object_migrate +ffffffff81b37180 T i915_gem_object_placement_possible +ffffffff81b37210 T i915_gem_object_needs_ccs_pages +ffffffff81b372b0 T i915_gem_init__objects +ffffffff81b372e0 t __i915_gem_free_work +ffffffff81b37330 T i915_objects_module_exit +ffffffff81b37350 T i915_objects_module_init +ffffffff81b373b0 T i915_gem_object_get_moving_fence +ffffffff81b373d0 T i915_gem_object_wait_moving_fence +ffffffff81b37450 T i915_gem_object_has_unknown_state +ffffffff81b37480 t i915_gem_free_object +ffffffff81b37510 t i915_gem_close_object +ffffffff81b38000 T __i915_gem_object_set_pages +ffffffff81b38320 T ____i915_gem_object_get_pages +ffffffff81b38390 T __i915_gem_object_get_pages +ffffffff81b383f0 T i915_gem_object_pin_pages_unlocked +ffffffff81b38510 t i915_gem_object_lock +ffffffff81b38730 T i915_gem_object_truncate +ffffffff81b38770 T __i915_gem_object_unset_pages +ffffffff81b38950 T __i915_gem_object_put_pages +ffffffff81b389d0 T i915_gem_object_pin_map +ffffffff81b38e90 T i915_gem_object_pin_map_unlocked +ffffffff81b38fa0 T __i915_gem_object_flush_map +ffffffff81b39030 T __i915_gem_object_release_map +ffffffff81b390b0 T __i915_gem_object_page_iter_get_sg +ffffffff81b392a0 T __i915_gem_object_get_page +ffffffff81b392f0 T __i915_gem_object_get_dirty_page +ffffffff81b39360 T __i915_gem_object_get_dma_address_len +ffffffff81b393e0 T __i915_gem_object_get_dma_address +ffffffff81b3a000 T i915_gem_object_put_pages_phys +ffffffff81b3a1c0 T i915_gem_object_pwrite_phys +ffffffff81b3a2c0 T i915_gem_object_pread_phys +ffffffff81b3a370 T i915_gem_object_attach_phys +ffffffff81b3a440 t i915_gem_object_shmem_to_phys +ffffffff81b3b000 T i915_gem_suspend +ffffffff81b3b060 T i915_gem_backup_suspend +ffffffff81b3b1e0 t lmem_suspend +ffffffff81b3b300 T i915_gem_suspend_late +ffffffff81b3b440 T i915_gem_freeze +ffffffff81b3b480 T i915_gem_freeze_late +ffffffff81b3b550 T i915_gem_resume +ffffffff81b3b6b0 t lmem_restore +ffffffff81b3c000 T i915_gem_object_init_memory_region +ffffffff81b3c080 T i915_gem_object_release_memory_region +ffffffff81b3c0e0 T i915_gem_object_create_region +ffffffff81b3c100 t __i915_gem_object_create_region +ffffffff81b3c270 T i915_gem_object_create_region_at +ffffffff81b3c310 T i915_gem_process_region +ffffffff81b3d000 T shmem_sg_free_table +ffffffff81b3d100 T shmem_sg_alloc_table +ffffffff81b3d250 T __shmem_writeback +ffffffff81b3d270 T __i915_gem_object_release_shmem +ffffffff81b3d330 T i915_gem_object_put_pages_shmem +ffffffff81b3d440 t shmem_get_pages +ffffffff81b3d5a0 t shmem_put_pages +ffffffff81b3d5e0 t shmem_truncate +ffffffff81b3d680 t shmem_shrink +ffffffff81b3d6f0 t shmem_pread +ffffffff81b3d760 t shmem_pwrite +ffffffff81b3dab0 t shmem_release +ffffffff81b3db00 T i915_gem_object_create_shmem +ffffffff81b3db20 T i915_gem_object_create_shmem_from_data +ffffffff81b3dc70 T i915_gem_shmem_setup +ffffffff81b3dcd0 T i915_gem_object_is_shmem +ffffffff81b3dd10 t init_shmem +ffffffff81b3dd60 t release_shmem +ffffffff81b3dda0 t shmem_object_init +ffffffff81b3e000 T i915_gem_shrink +ffffffff81b3e710 T i915_gem_shrink_all +ffffffff81b3e790 T i915_gem_driver_register__shrinker +ffffffff81b3e840 t i915_gem_shrinker_scan +ffffffff81b3e8b0 t i915_gem_shrinker_count +ffffffff81b3e930 T i915_gem_driver_unregister__shrinker +ffffffff81b3e950 T i915_gem_shrinker_taints_mutex +ffffffff81b3e980 T i915_gem_object_make_unshrinkable +ffffffff81b3ea80 T __i915_gem_object_make_shrinkable +ffffffff81b3eb70 T __i915_gem_object_make_purgeable +ffffffff81b3ec60 T i915_gem_object_make_shrinkable +ffffffff81b3ed50 T i915_gem_object_make_purgeable +ffffffff81b3f000 T i915_gem_stolen_insert_node_in_range +ffffffff81b3f0d0 T i915_gem_stolen_insert_node +ffffffff81b3f180 T i915_gem_stolen_remove_node +ffffffff81b3f1c0 T i915_gem_object_create_stolen +ffffffff81b3f1e0 T i915_gem_stolen_lmem_setup +ffffffff81b3f500 T i915_gem_stolen_smem_setup +ffffffff81b3f5a0 T i915_gem_object_is_stolen +ffffffff81b3f5e0 T i915_gem_stolen_initialized +ffffffff81b3f620 T i915_gem_stolen_area_address +ffffffff81b3f650 T i915_gem_stolen_area_size +ffffffff81b3f690 T i915_gem_stolen_node_address +ffffffff81b3f6d0 T i915_gem_stolen_node_offset +ffffffff81b3f700 T i915_gem_stolen_node_allocated +ffffffff81b3f730 T i915_gem_stolen_node_size +ffffffff81b3f760 t init_stolen_lmem +ffffffff81b3f8f0 t release_stolen_lmem +ffffffff81b3f960 t _i915_gem_object_stolen_init +ffffffff81b3fd70 t i915_gem_init_stolen +ffffffff81b405c0 t init_stolen_smem +ffffffff81b40620 t release_stolen_smem +ffffffff81b40670 t i915_gem_object_get_pages_stolen +ffffffff81b40760 t i915_gem_object_put_pages_stolen +ffffffff81b40790 t i915_gem_object_release_stolen +ffffffff81b41000 T i915_gem_throttle_ioctl +ffffffff81b42000 T i915_gem_fence_size +ffffffff81b42080 T i915_gem_fence_alignment +ffffffff81b420e0 T i915_gem_object_needs_bit17_swizzle +ffffffff81b42130 T i915_gem_object_set_tiling +ffffffff81b42830 T i915_gem_set_tiling_ioctl +ffffffff81b42aa0 T i915_gem_get_tiling_ioctl +ffffffff81b43000 T i915_ttm_sys_placement +ffffffff81b43030 T i915_ttm_free_cached_io_rsgt +ffffffff81b43110 T i915_ttm_purge +ffffffff81b43260 T i915_ttm_resource_get_st +ffffffff81b43320 T i915_ttm_resource_mappable +ffffffff81b43370 T i915_ttm_driver +ffffffff81b433a0 T i915_ttm_adjust_lru +ffffffff81b43530 t ttm_vm_reference +ffffffff81b43560 t ttm_vm_detach +ffffffff81b435a0 t vm_fault_ttm +ffffffff81b43ae0 T i915_ttm_bo_destroy +ffffffff81b43b50 T __i915_gem_ttm_object_init +ffffffff81b43dd0 T i915_gem_ttm_system_setup +ffffffff81b43e50 t i915_ttm_tt_create +ffffffff81b43fd0 t i915_ttm_tt_populate +ffffffff81b44050 t i915_ttm_tt_unpopulate +ffffffff81b44070 t i915_ttm_tt_destroy +ffffffff81b440f0 t i915_ttm_eviction_valuable +ffffffff81b44180 t i915_ttm_evict_flags +ffffffff81b441e0 t i915_ttm_delete_mem_notify +ffffffff81b44260 t i915_ttm_swap_notify +ffffffff81b442d0 t i915_ttm_io_mem_reserve +ffffffff81b443a0 t i915_ttm_io_mem_pfn +ffffffff81b44410 t i915_ttm_access_memory +ffffffff81b44460 t i915_ttm_tt_release +ffffffff81b44480 t dma_resv_unlock +ffffffff81b44520 t i915_ttm_place_from_region +ffffffff81b44690 t __i915_ttm_get_pages +ffffffff81b44860 t i915_ttm_get_pages +ffffffff81b449a0 t i915_ttm_put_pages +ffffffff81b44a00 t i915_ttm_truncate +ffffffff81b44ac0 t i915_ttm_shrink +ffffffff81b44c20 t i915_ttm_mmap_offset +ffffffff81b44c50 t i915_ttm_unmap_virtual +ffffffff81b44d40 t i915_ttm_delayed_free +ffffffff81b44d50 t i915_ttm_migrate +ffffffff81b45000 T i915_ttm_adjust_domains_after_move +ffffffff81b45070 T i915_ttm_adjust_gem_after_move +ffffffff81b45180 T i915_ttm_move_notify +ffffffff81b451d0 T i915_ttm_move +ffffffff81b455f0 t __i915_ttm_move +ffffffff81b45cb0 T i915_gem_obj_copy_ttm +ffffffff81b45e90 t i915_ttm_memcpy_init +ffffffff81b46040 t __memcpy_cb +ffffffff81b460c0 t get_driver_name +ffffffff81b460f0 t get_timeline_name +ffffffff81b46120 t __memcpy_work +ffffffff81b46240 t __memcpy_irq_work +ffffffff81b47000 T i915_ttm_backup_free +ffffffff81b47060 T i915_ttm_recover_region +ffffffff81b470c0 t i915_ttm_recover +ffffffff81b47130 T i915_ttm_backup_region +ffffffff81b47190 t i915_ttm_backup +ffffffff81b47430 T i915_ttm_restore_region +ffffffff81b47490 t i915_ttm_restore +ffffffff81b475e0 t i915_gem_object_lock +ffffffff81b48000 T i915_gem_userptr_ioctl +ffffffff81b48110 T i915_gem_init_userptr +ffffffff81b48140 T i915_gem_cleanup_userptr +ffffffff81b49000 T i915_gem_fence_wait_priority +ffffffff81b491b0 T i915_gem_object_wait_priority +ffffffff81b49250 T i915_gem_object_wait +ffffffff81b49410 T i915_gem_wait_ioctl +ffffffff81b49660 T i915_gem_object_wait_migration +ffffffff81b4a000 T i915_gemfs_init +ffffffff81b4a030 T i915_gemfs_fini +ffffffff81b4b000 T inteldrm_gmch_match +ffffffff81b4b060 T i915_alloc_ifp +ffffffff81b4b180 T i965_alloc_ifp +ffffffff81b4b2e0 T intel_gtt_chipset_setup +ffffffff81b4b430 T intel_gmch_enable_gtt +ffffffff81b4b480 T intel_gmch_probe +ffffffff81b4b4b0 T intel_gmch_gtt_get +ffffffff81b4b500 T intel_gmch_gtt_flush +ffffffff81b4b600 T intel_gmch_remove +ffffffff81b4b630 T intel_gmch_gtt_insert_sg_entries +ffffffff81b4b7d0 T intel_gmch_gtt_insert_page +ffffffff81b4b900 T intel_gmch_gtt_clear_range +ffffffff81b4c000 T gen2_emit_flush +ffffffff81b4c0f0 T gen4_emit_flush_rcs +ffffffff81b4c240 T gen4_emit_flush_vcs +ffffffff81b4c290 T gen3_emit_breadcrumb +ffffffff81b4c450 T gen5_emit_breadcrumb +ffffffff81b4c590 T i830_emit_bb_start +ffffffff81b4c6c0 T gen3_emit_bb_start +ffffffff81b4c730 T gen4_emit_bb_start +ffffffff81b4c7a0 T gen2_irq_enable +ffffffff81b4c810 T gen2_irq_disable +ffffffff81b4c860 T gen3_irq_enable +ffffffff81b4c8d0 T gen3_irq_disable +ffffffff81b4c910 T gen5_irq_enable +ffffffff81b4c930 T gen5_irq_disable +ffffffff81b4d000 T gen6_emit_flush_rcs +ffffffff81b4d130 T gen6_emit_breadcrumb_rcs +ffffffff81b4d200 T gen6_emit_flush_xcs +ffffffff81b4d270 T gen6_emit_flush_vcs +ffffffff81b4d2e0 T gen6_emit_bb_start +ffffffff81b4d350 T hsw_emit_bb_start +ffffffff81b4d3c0 T gen7_emit_flush_rcs +ffffffff81b4d4a0 T gen7_emit_breadcrumb_rcs +ffffffff81b4d530 T gen6_emit_breadcrumb_xcs +ffffffff81b4d5a0 T gen7_emit_breadcrumb_xcs +ffffffff81b4d670 T gen6_irq_enable +ffffffff81b4d6d0 T gen6_irq_disable +ffffffff81b4d720 T hsw_irq_enable_vecs +ffffffff81b4d770 T hsw_irq_disable_vecs +ffffffff81b4e000 T gen7_ppgtt_enable +ffffffff81b4e0a0 T gen6_ppgtt_enable +ffffffff81b4e1b0 T gen6_ppgtt_pin +ffffffff81b4e270 T gen6_ppgtt_unpin +ffffffff81b4e2b0 T gen6_ppgtt_create +ffffffff81b4e5e0 t gen6_alloc_va_range +ffffffff81b4e820 t gen6_ppgtt_clear_range +ffffffff81b4e990 t gen6_ppgtt_insert_entries +ffffffff81b4ead0 t gen6_ppgtt_cleanup +ffffffff81b4eb70 t gen6_flush_pd +ffffffff81b4ec80 t pd_dummy_obj_get_pages +ffffffff81b4ecc0 t pd_dummy_obj_put_pages +ffffffff81b4ecf0 t pd_vma_bind +ffffffff81b4ed60 t pd_vma_unbind +ffffffff81b4f000 T gen7_setup_clear_gpr_bb +ffffffff81b50000 T gen8_emit_flush_rcs +ffffffff81b501b0 T gen8_emit_flush_xcs +ffffffff81b50240 T gen11_emit_flush_rcs +ffffffff81b50310 T gen12_emit_aux_table_inv +ffffffff81b503f0 T gen12_emit_flush_rcs +ffffffff81b50780 T gen12_emit_flush_xcs +ffffffff81b50980 T gen8_emit_init_breadcrumb +ffffffff81b50a40 T xehp_emit_bb_start_noarb +ffffffff81b50b10 T xehp_emit_bb_start +ffffffff81b50be0 T gen8_emit_bb_start_noarb +ffffffff81b50c60 T gen8_emit_bb_start +ffffffff81b50d30 T gen8_emit_fini_breadcrumb_xcs +ffffffff81b50e50 T gen8_emit_fini_breadcrumb_rcs +ffffffff81b50fa0 T gen11_emit_fini_breadcrumb_rcs +ffffffff81b510f0 T gen12_emit_fini_breadcrumb_xcs +ffffffff81b512b0 T gen12_emit_fini_breadcrumb_rcs +ffffffff81b52000 T gen8_ppgtt_create +ffffffff81b526c0 t gen12_pte_encode +ffffffff81b52730 t gen8_pte_encode +ffffffff81b527a0 t gen8_ppgtt_insert +ffffffff81b534a0 t xehpsdv_ppgtt_insert_entry +ffffffff81b53640 t gen8_ppgtt_insert_entry +ffffffff81b53780 t gen8_ppgtt_alloc +ffffffff81b53820 t gen8_ppgtt_clear +ffffffff81b53890 t gen8_ppgtt_foreach +ffffffff81b53940 t gen8_ppgtt_cleanup +ffffffff81b539f0 t gen8_ppgtt_notify_vgt +ffffffff81b53ca0 t __gen8_ppgtt_alloc +ffffffff81b53f10 t gen8_pde_encode +ffffffff81b53f50 t __gen8_ppgtt_clear +ffffffff81b542c0 t __gen8_ppgtt_cleanup +ffffffff81b54350 t __gen8_ppgtt_foreach +ffffffff81b55000 T intel_breadcrumbs_create +ffffffff81b550d0 t signal_irq_work +ffffffff81b55500 t irq_enable +ffffffff81b55520 t irq_disable +ffffffff81b55540 T intel_breadcrumbs_reset +ffffffff81b555e0 T __intel_breadcrumbs_park +ffffffff81b55690 T intel_breadcrumbs_free +ffffffff81b556c0 T i915_request_enable_breadcrumb +ffffffff81b55890 T i915_request_cancel_breadcrumb +ffffffff81b559e0 T intel_context_remove_breadcrumbs +ffffffff81b55b80 T intel_engine_print_breadcrumbs +ffffffff81b56000 T intel_context_free +ffffffff81b56020 T intel_context_create +ffffffff81b56090 T intel_context_init +ffffffff81b56200 T intel_context_alloc_state +ffffffff81b562b0 T __intel_context_do_pin_ww +ffffffff81b565f0 t i915_gem_object_lock +ffffffff81b56810 t intel_engine_pm_might_get +ffffffff81b56880 t intel_context_active_acquire +ffffffff81b56910 T __intel_context_do_pin +ffffffff81b569a0 T __intel_context_do_unpin +ffffffff81b56a50 t sw_fence_dummy_notify +ffffffff81b56a80 t __intel_context_active +ffffffff81b56b10 t __intel_context_retire +ffffffff81b56bd0 T intel_context_fini +ffffffff81b56c80 T i915_context_module_exit +ffffffff81b56ca0 T i915_context_module_init +ffffffff81b56d00 T intel_context_enter_engine +ffffffff81b56d50 T intel_context_exit_engine +ffffffff81b56de0 T intel_context_prepare_remote_request +ffffffff81b56e60 T intel_context_create_request +ffffffff81b56fd0 T intel_context_get_active_request +ffffffff81b570b0 T intel_context_bind_parent_child +ffffffff81b57130 T intel_context_get_total_runtime_ns +ffffffff81b57210 T intel_context_get_avg_runtime_ns +ffffffff81b57260 T intel_context_ban +ffffffff81b572d0 T intel_context_revoke +ffffffff81b58000 T intel_context_reconfigure_sseu +ffffffff81b59000 T intel_engine_context_size +ffffffff81b59200 T intel_engine_set_hwsp_writemask +ffffffff81b59280 T intel_clamp_heartbeat_interval_ms +ffffffff81b592d0 T intel_clamp_max_busywait_duration_ns +ffffffff81b59320 T intel_clamp_preempt_timeout_ms +ffffffff81b59390 T intel_clamp_stop_timeout_ms +ffffffff81b593e0 T intel_clamp_timeslice_duration_ms +ffffffff81b59450 T intel_engines_release +ffffffff81b59530 T intel_engine_free_request_pool +ffffffff81b59590 T intel_engines_free +ffffffff81b59630 T intel_engines_init_mmio +ffffffff81b5a6b0 T intel_engine_init_execlists +ffffffff81b5a730 T intel_engine_create_pinned_context +ffffffff81b5a860 T intel_engine_destroy_pinned_context +ffffffff81b5a9a0 T intel_engines_init +ffffffff81b5b370 T intel_engine_cleanup_common +ffffffff81b5b500 t cleanup_status_page +ffffffff81b5b5f0 T intel_engine_resume +ffffffff81b5b630 T intel_engine_get_active_head +ffffffff81b5b6c0 t intel_uncore_read64_2x32 +ffffffff81b5b7e0 T intel_engine_get_last_batch_head +ffffffff81b5b860 T intel_engine_stop_cs +ffffffff81b5b9b0 T intel_engine_cancel_stop_cs +ffffffff81b5ba00 T intel_engine_wait_for_pending_mi_fw +ffffffff81b5bad0 T intel_engine_get_instdone +ffffffff81b5bfa0 T __intel_engine_flush_submission +ffffffff81b5c030 T intel_engine_is_idle +ffffffff81b5c1e0 T intel_engines_are_idle +ffffffff81b5c260 T intel_engine_irq_enable +ffffffff81b5c2e0 T intel_engine_irq_disable +ffffffff81b5c350 T intel_engines_reset_default_submission +ffffffff81b5c3e0 T intel_engine_can_store_dword +ffffffff81b5c460 T intel_engine_dump_active_requests +ffffffff81b5c510 t engine_dump_request +ffffffff81b5c790 T intel_engine_dump +ffffffff81b5d5d0 T intel_engine_get_busy_time +ffffffff81b5d5f0 T intel_engine_create_virtual +ffffffff81b5d650 T intel_engine_get_hung_entity +ffffffff81b5d7f0 T xehp_enable_ccs_engines +ffffffff81b5d850 t nop_irq_handler +ffffffff81b5d880 t print_ring +ffffffff81b5e000 T intel_engine_unpark_heartbeat +ffffffff81b5e120 T intel_engine_park_heartbeat +ffffffff81b5e1a0 T intel_gt_unpark_heartbeats +ffffffff81b5e2f0 T intel_gt_park_heartbeats +ffffffff81b5e3a0 T intel_engine_init_heartbeat +ffffffff81b5e400 t heartbeat +ffffffff81b5e7a0 T intel_engine_set_heartbeat +ffffffff81b5e940 t set_heartbeat +ffffffff81b5eab0 t __intel_engine_pulse +ffffffff81b5eb80 T intel_engine_pulse +ffffffff81b5ec80 T intel_engine_flush_barriers +ffffffff81b5ee00 t heartbeat_create +ffffffff81b5ef00 t heartbeat_commit +ffffffff81b5ef90 t __delayed_work_tick +ffffffff81b5efb0 t reset_engine +ffffffff81b5f000 T intel_engine_init__pm +ffffffff81b5f0c0 T intel_engine_reset_pinned_contexts +ffffffff81b5f150 t __engine_unpark +ffffffff81b5f240 t __engine_park +ffffffff81b5f4b0 t duration +ffffffff81b60000 T intel_engine_lookup_user +ffffffff81b60070 T intel_engine_add_user +ffffffff81b600c0 T intel_engine_class_repr +ffffffff81b60100 T intel_engines_driver_register +ffffffff81b604b0 T intel_engines_has_context_isolation +ffffffff81b60570 t engine_cmp +ffffffff81b61000 T execlists_unwind_incomplete_requests +ffffffff81b61020 t __unwind_incomplete_requests +ffffffff81b61180 T intel_execlists_submission_setup +ffffffff81b61590 t execlists_submission_tasklet +ffffffff81b625a0 t execlists_timeslice +ffffffff81b625d0 t execlists_preempt +ffffffff81b62600 t execlists_sanitize +ffffffff81b62730 t execlists_release +ffffffff81b627b0 T intel_execlists_show_requests +ffffffff81b62a90 T intel_execlists_dump_active_requests +ffffffff81b62b30 t process_csb +ffffffff81b62f20 t active_preempt_timeout +ffffffff81b62fa0 t execlists_reset +ffffffff81b634a0 t post_process_csb +ffffffff81b63790 t wa_csb_read +ffffffff81b638c0 t execlists_capture_work +ffffffff81b63b80 t execlists_resume +ffffffff81b63d80 t execlists_request_alloc +ffffffff81b64010 t add_to_engine +ffffffff81b64090 t remove_from_engine +ffffffff81b64170 t execlists_reset_prepare +ffffffff81b64220 t execlists_reset_rewind +ffffffff81b64270 t execlists_reset_cancel +ffffffff81b64510 t execlists_reset_finish +ffffffff81b64560 t execlists_park +ffffffff81b645c0 t execlists_set_default_submission +ffffffff81b64630 t gen8_logical_ring_enable_irq +ffffffff81b64690 t gen8_logical_ring_disable_irq +ffffffff81b646d0 t execlists_irq_handler +ffffffff81b64870 t execlists_engine_busyness +ffffffff81b64980 t execlists_context_alloc +ffffffff81b649a0 t execlists_context_pre_pin +ffffffff81b64a40 t execlists_context_pin +ffffffff81b64a60 t execlists_context_cancel_request +ffffffff81b64af0 t execlists_create_virtual +ffffffff81b64f20 t execlists_create_parallel +ffffffff81b65050 t kick_execlists +ffffffff81b650f0 t virtual_submit_request +ffffffff81b65200 t virtual_submission_tasklet +ffffffff81b65480 t virtual_context_alloc +ffffffff81b654a0 t virtual_context_pre_pin +ffffffff81b65540 t virtual_context_pin +ffffffff81b65560 t virtual_context_enter +ffffffff81b655f0 t virtual_context_exit +ffffffff81b656b0 t virtual_context_destroy +ffffffff81b65710 t virtual_get_sibling +ffffffff81b65750 t rcu_virtual_context_destroy +ffffffff81b658e0 t execlists_reset_csb +ffffffff81b65c40 t nop_submission_tasklet +ffffffff81b65c80 t execlists_submit_request +ffffffff81b66000 T i915_ggtt_init_hw +ffffffff81b661c0 T i915_ggtt_suspend_vm +ffffffff81b66660 T i915_ggtt_suspend +ffffffff81b666e0 T gen6_ggtt_invalidate +ffffffff81b66730 T gen8_ggtt_pte_encode +ffffffff81b66770 T intel_ggtt_bind_vma +ffffffff81b66800 T intel_ggtt_unbind_vma +ffffffff81b66830 T i915_init_ggtt +ffffffff81b66dc0 T i915_ggtt_driver_release +ffffffff81b670a0 T i915_ggtt_driver_late_release +ffffffff81b670d0 T i915_ggtt_probe_hw +ffffffff81b67760 T i915_ggtt_create +ffffffff81b677d0 T i915_ggtt_enable_hw +ffffffff81b67810 T i915_ggtt_resume_vm +ffffffff81b679b0 T i915_ggtt_resume +ffffffff81b67a90 t i915_ggtt_color_adjust +ffffffff81b67af0 t aliasing_gtt_bind_vma +ffffffff81b67b90 t aliasing_gtt_unbind_vma +ffffffff81b67c30 t gen6_gmch_remove +ffffffff81b67c70 t gen8_ggtt_insert_page +ffffffff81b67cd0 t nop_clear_range +ffffffff81b67d00 t gen8_ggtt_clear_range +ffffffff81b67dc0 t gen8_ggtt_insert_entries +ffffffff81b67f20 t bxt_vtd_ggtt_insert_entries__BKL +ffffffff81b67f60 t bxt_vtd_ggtt_insert_page__BKL +ffffffff81b67ff0 t guc_ggtt_invalidate +ffffffff81b680d0 t gen8_ggtt_invalidate +ffffffff81b68140 t mtl_ggtt_pte_encode +ffffffff81b681e0 t ggtt_probe_common +ffffffff81b68420 t gen6_ggtt_clear_range +ffffffff81b684f0 t gen6_ggtt_insert_page +ffffffff81b68550 t gen6_ggtt_insert_entries +ffffffff81b686e0 t iris_pte_encode +ffffffff81b68740 t hsw_pte_encode +ffffffff81b68790 t byt_pte_encode +ffffffff81b687f0 t ivb_pte_encode +ffffffff81b68870 t snb_pte_encode +ffffffff81b69000 T i915_vma_revoke_fence +ffffffff81b690a0 t fence_write +ffffffff81b693a0 T __i915_vma_pin_fence +ffffffff81b69570 t fence_update +ffffffff81b69770 T i915_vma_pin_fence +ffffffff81b698a0 T i915_reserve_fence +ffffffff81b69a10 T i915_unreserve_fence +ffffffff81b69a70 T intel_ggtt_restore_fences +ffffffff81b69ae0 T i915_gem_object_do_bit_17_swizzle +ffffffff81b69d90 T i915_gem_object_save_bit_17_swizzle +ffffffff81b69f40 T intel_ggtt_init_fences +ffffffff81b6a410 T intel_ggtt_fini_fences +ffffffff81b6a480 T intel_gt_init_swizzling +ffffffff81b6b000 T intel_ggtt_gmch_probe +ffffffff81b6b1f0 t gmch_ggtt_insert_page +ffffffff81b6b220 t gmch_ggtt_insert_entries +ffffffff81b6b250 t gmch_ggtt_clear_range +ffffffff81b6b270 t gmch_ggtt_remove +ffffffff81b6b280 t gmch_ggtt_invalidate +ffffffff81b6b290 T intel_ggtt_gmch_enable_hw +ffffffff81b6b2e0 T intel_ggtt_gmch_flush +ffffffff81b6c000 T intel_gsc_irq_handler +ffffffff81b6c080 T intel_gsc_init +ffffffff81b6c0f0 T intel_gsc_fini +ffffffff81b6d000 T intel_gt_common_init_early +ffffffff81b6d0d0 T intel_root_gt_init_early +ffffffff81b6d150 T intel_gt_assign_ggtt +ffffffff81b6d1e0 T intel_gt_init_mmio +ffffffff81b6d220 T intel_gt_init_hw +ffffffff81b6d850 T intel_gt_perf_limit_reasons_reg +ffffffff81b6d8a0 T intel_gt_clear_error_registers +ffffffff81b6dc00 T intel_gt_check_and_clear_faults +ffffffff81b6ded0 T intel_gt_flush_ggtt_writes +ffffffff81b6df70 T intel_gt_chipset_flush +ffffffff81b6dfb0 T intel_gt_driver_register +ffffffff81b6e000 T intel_gt_wait_for_idle +ffffffff81b6e120 T intel_gt_init +ffffffff81b6e430 t __engines_record_defaults +ffffffff81b6e690 t __intel_gt_disable +ffffffff81b6e6c0 T intel_gt_driver_remove +ffffffff81b6e720 T intel_gt_driver_unregister +ffffffff81b6e7b0 T intel_gt_driver_release +ffffffff81b6e870 T intel_gt_driver_late_release_all +ffffffff81b6e930 T intel_gt_probe_all +ffffffff81b6ebd0 t intel_gt_tile_setup +ffffffff81b6eca0 T intel_gt_tiles_init +ffffffff81b6ee50 T intel_gt_info_print +ffffffff81b6ee90 T intel_gt_coherent_map_type +ffffffff81b6f000 T intel_gt_buffer_pool_mark_used +ffffffff81b6f060 T intel_gt_get_buffer_pool +ffffffff81b6f270 T intel_gt_init_buffer_pool +ffffffff81b6f330 t pool_free_work +ffffffff81b6f3d0 T intel_gt_flush_buffer_pool +ffffffff81b6f470 t pool_free_older_than +ffffffff81b6f5f0 T intel_gt_fini_buffer_pool +ffffffff81b6f620 t pool_retire +ffffffff81b6f760 t __delayed_work_tick +ffffffff81b70000 T intel_gt_apply_ccs_mode +ffffffff81b71000 T intel_gt_init_clock_frequency +ffffffff81b71230 T intel_gt_clock_interval_to_ns +ffffffff81b71290 T intel_gt_pm_interval_to_ns +ffffffff81b712f0 T intel_gt_ns_to_clock_interval +ffffffff81b71360 T intel_gt_ns_to_pm_interval +ffffffff81b72000 T intel_gt_debugfs_reset_show +ffffffff81b72050 T intel_gt_debugfs_reset_store +ffffffff81b72160 T intel_gt_debugfs_register +ffffffff81b72190 T intel_gt_debugfs_register_files +ffffffff81b73000 T intel_gt_engines_debugfs_register +ffffffff81b74000 T gen11_gt_irq_handler +ffffffff81b74310 T gen11_gt_reset_one_iir +ffffffff81b74390 t gen11_gt_engine_identity +ffffffff81b744c0 T gen11_gt_irq_reset +ffffffff81b74870 T gen11_gt_irq_postinstall +ffffffff81b74ca0 T gen5_gt_irq_handler +ffffffff81b74d30 T gen6_gt_irq_handler +ffffffff81b74ef0 T gen8_gt_irq_handler +ffffffff81b75080 T gen8_gt_irq_reset +ffffffff81b75100 T gen8_gt_irq_postinstall +ffffffff81b751c0 T gen5_gt_enable_irq +ffffffff81b75220 T gen5_gt_disable_irq +ffffffff81b75260 T gen5_gt_irq_reset +ffffffff81b752f0 T gen5_gt_irq_postinstall +ffffffff81b76000 T intel_gt_mcr_init +ffffffff81b76460 T intel_gt_mcr_lock +ffffffff81b76650 T intel_gt_mcr_unlock +ffffffff81b766e0 T intel_gt_mcr_read +ffffffff81b76700 t rw_with_mcr_steering +ffffffff81b76820 T intel_gt_mcr_unicast_write +ffffffff81b76840 T intel_gt_mcr_multicast_write +ffffffff81b76940 T intel_gt_mcr_multicast_write_fw +ffffffff81b769c0 T intel_gt_mcr_multicast_rmw +ffffffff81b76a30 T intel_gt_mcr_read_any +ffffffff81b76af0 T intel_gt_mcr_get_nonterminated_steering +ffffffff81b76b80 t get_nonterminated_steering +ffffffff81b76cf0 T intel_gt_mcr_read_any_fw +ffffffff81b76de0 t rw_with_mcr_steering_fw +ffffffff81b76fa0 T intel_gt_mcr_report_steering +ffffffff81b77150 t report_steering_type +ffffffff81b77250 T intel_gt_mcr_get_ss_steering +ffffffff81b772d0 T intel_gt_mcr_wait_for_reg +ffffffff81b78000 T intel_gt_pm_init_early +ffffffff81b78060 T intel_gt_pm_init +ffffffff81b780a0 T intel_gt_pm_fini +ffffffff81b780c0 T intel_gt_resume +ffffffff81b783b0 t gt_sanitize +ffffffff81b78550 t intel_gt_pm_get +ffffffff81b785c0 t intel_gt_pm_put +ffffffff81b78630 T intel_gt_suspend_prepare +ffffffff81b78730 T intel_gt_suspend_late +ffffffff81b787f0 T intel_gt_runtime_suspend +ffffffff81b78810 T intel_gt_runtime_resume +ffffffff81b78850 T intel_gt_get_awake_time +ffffffff81b78970 t __gt_unpark +ffffffff81b78a60 t __gt_park +ffffffff81b79000 T intel_gt_pm_debugfs_register +ffffffff81b7a000 T gen6_gt_pm_unmask_irq +ffffffff81b7a090 T gen6_gt_pm_mask_irq +ffffffff81b7a120 T gen6_gt_pm_reset_iir +ffffffff81b7a1b0 T gen6_gt_pm_enable_irq +ffffffff81b7a2b0 T gen6_gt_pm_disable_irq +ffffffff81b7b000 T intel_engine_add_retire +ffffffff81b7b0b0 T intel_engine_init_retire +ffffffff81b7b0e0 t engine_retire +ffffffff81b7b1b0 T intel_engine_fini_retire +ffffffff81b7b1d0 T intel_gt_retire_requests_timeout +ffffffff81b7b530 T intel_gt_init_requests +ffffffff81b7b590 t retire_work_handler +ffffffff81b7b610 T intel_gt_park_requests +ffffffff81b7b680 T intel_gt_unpark_requests +ffffffff81b7b6e0 T intel_gt_fini_requests +ffffffff81b7b740 T intel_gt_watchdog_work +ffffffff81b7b840 t __delayed_work_tick +ffffffff81b7c000 T intel_gt_sysfs_register +ffffffff81b7c030 T intel_gt_sysfs_unregister +ffffffff81b7d000 T intel_gt_sysfs_pm_init +ffffffff81b7e000 T intel_vm_no_concurrent_access_wa +ffffffff81b7e050 T alloc_pt_lmem +ffffffff81b7e0c0 T alloc_pt_dma +ffffffff81b7e130 T map_pt_dma +ffffffff81b7e190 T map_pt_dma_locked +ffffffff81b7e1f0 T i915_vm_lock_objects +ffffffff81b7e230 t i915_gem_object_lock +ffffffff81b7e450 T i915_address_space_fini +ffffffff81b7e470 T i915_vm_resv_release +ffffffff81b7e4b0 T i915_vm_release +ffffffff81b7e4e0 T i915_address_space_init +ffffffff81b7e660 t __i915_vm_release +ffffffff81b7e730 T __px_vaddr +ffffffff81b7e770 T __px_dma +ffffffff81b7e7b0 T __px_page +ffffffff81b7e7f0 T fill_page_dma +ffffffff81b7e8b0 T setup_scratch_page +ffffffff81b7ead0 T free_scratch +ffffffff81b7eb60 T gtt_write_workarounds +ffffffff81b7ed10 T setup_private_pat +ffffffff81b7f1a0 t bdw_setup_private_ppat +ffffffff81b7f200 T __vm_create_scratch_for_read +ffffffff81b7f2b0 T __vm_create_scratch_for_read_pinned +ffffffff81b7f420 t clear_vm_list +ffffffff81b80000 T intel_llc_enable +ffffffff81b801a0 T intel_llc_disable +ffffffff81b81000 T lrc_init_regs +ffffffff81b81020 t __lrc_init_regs +ffffffff81b815e0 T lrc_reset_regs +ffffffff81b81670 T lrc_init_state +ffffffff81b81710 T lrc_indirect_bb +ffffffff81b81750 T lrc_alloc +ffffffff81b81940 T lrc_reset +ffffffff81b819b0 T lrc_update_regs +ffffffff81b81ce0 T lrc_pre_pin +ffffffff81b81d60 T lrc_pin +ffffffff81b81e50 T lrc_unpin +ffffffff81b81eb0 T lrc_post_unpin +ffffffff81b81ef0 T lrc_fini +ffffffff81b81f80 T lrc_destroy +ffffffff81b82000 t gen12_emit_indirect_ctx_xcs +ffffffff81b82150 t gen12_emit_indirect_ctx_rcs +ffffffff81b82490 T lrc_update_offsets +ffffffff81b826f0 T lrc_check_regs +ffffffff81b82870 T lrc_fini_wa_ctx +ffffffff81b82890 T lrc_init_wa_ctx +ffffffff81b82cc0 t gen9_init_indirectctx_bb +ffffffff81b82ec0 t gen8_init_indirectctx_bb +ffffffff81b83070 T lrc_update_runtime +ffffffff81b84000 T intel_migrate_init +ffffffff81b843a0 T intel_migrate_create_context +ffffffff81b84520 T intel_context_migrate_copy +ffffffff81b84e10 t emit_pte +ffffffff81b851b0 t emit_copy_ccs +ffffffff81b852f0 T intel_context_migrate_clear +ffffffff81b85830 T intel_migrate_copy +ffffffff81b859f0 T intel_migrate_clear +ffffffff81b85b80 T intel_migrate_fini +ffffffff81b85bc0 t xehpsdv_insert_pte +ffffffff81b85c50 t xehpsdv_toggle_pdes +ffffffff81b85cd0 t insert_pte +ffffffff81b86000 T intel_mocs_init_engine +ffffffff81b86160 t get_mocs_settings +ffffffff81b863d0 t init_l3cc_table +ffffffff81b86530 T intel_set_mocs_index +ffffffff81b865a0 T intel_mocs_init +ffffffff81b87000 T alloc_pt +ffffffff81b870b0 T __alloc_pd +ffffffff81b87160 T alloc_pd +ffffffff81b87230 T free_px +ffffffff81b87290 T __set_pd_entry +ffffffff81b87300 T clear_pd_entry +ffffffff81b87380 T release_pd_entry +ffffffff81b87450 T i915_ppgtt_init_hw +ffffffff81b874c0 T i915_ppgtt_create +ffffffff81b874f0 T ppgtt_bind_vma +ffffffff81b87590 T ppgtt_unbind_vma +ffffffff81b87610 T i915_vm_alloc_pt_stash +ffffffff81b87800 T i915_vm_free_pt_stash +ffffffff81b878e0 T i915_vm_map_pt_stash +ffffffff81b87990 T ppgtt_init +ffffffff81b88000 T intel_check_bios_c6_setup +ffffffff81b88090 T intel_rc6_init +ffffffff81b88770 T intel_rc6_sanitize +ffffffff81b88870 T intel_rc6_enable +ffffffff81b88e20 t gen9_rc6_enable +ffffffff81b88ff0 t gen8_rc6_enable +ffffffff81b890d0 t gen6_rc6_enable +ffffffff81b89370 T intel_rc6_unpark +ffffffff81b893c0 T intel_rc6_park +ffffffff81b894f0 T intel_rc6_disable +ffffffff81b895d0 T intel_rc6_fini +ffffffff81b89710 T intel_rc6_residency_ns +ffffffff81b89970 T intel_rc6_residency_us +ffffffff81b899d0 T intel_rc6_print_residency +ffffffff81b8a000 T intel_gt_setup_lmem +ffffffff81b8a2c0 t region_lmem_init +ffffffff81b8a3c0 t region_lmem_release +ffffffff81b8b000 T intel_renderstate_init +ffffffff81b8b720 T intel_renderstate_emit +ffffffff81b8b7c0 T intel_renderstate_fini +ffffffff81b8c000 T __i915_request_reset +ffffffff81b8c280 T __intel_gt_reset +ffffffff81b8c600 T intel_has_gpu_reset +ffffffff81b8c660 T intel_has_reset_engine +ffffffff81b8c6b0 T intel_reset_guc +ffffffff81b8c7e0 T intel_gt_set_wedged +ffffffff81b8c870 t __intel_gt_set_wedged +ffffffff81b8ca10 T intel_gt_unset_wedged +ffffffff81b8ca70 t __intel_gt_unset_wedged +ffffffff81b8cba0 T intel_gt_reset +ffffffff81b8d030 t reset_finish +ffffffff81b8d110 T __intel_engine_reset_bh +ffffffff81b8d2c0 T intel_engine_reset +ffffffff81b8d2d0 T intel_gt_handle_error +ffffffff81b8d7a0 T intel_gt_reset_trylock +ffffffff81b8d7e0 T intel_gt_reset_lock_interruptible +ffffffff81b8d920 T intel_gt_reset_unlock +ffffffff81b8d950 T intel_gt_terminally_wedged +ffffffff81b8daa0 T intel_gt_set_wedged_on_init +ffffffff81b8db20 T intel_gt_set_wedged_on_fini +ffffffff81b8dba0 T intel_gt_init_reset +ffffffff81b8dc30 T intel_gt_fini_reset +ffffffff81b8dc60 T __intel_init_wedge +ffffffff81b8dce0 t intel_wedge_me +ffffffff81b8ddb0 T __intel_fini_wedge +ffffffff81b8de20 T intel_engine_reset_needs_wa_22011802037 +ffffffff81b8df00 t gen8_reset_engines +ffffffff81b8e1a0 t gen6_reset_engines +ffffffff81b8e210 t ilk_do_reset +ffffffff81b8e2e0 t g4x_do_reset +ffffffff81b8e570 t g33_do_reset +ffffffff81b8e6b0 t i915_do_reset +ffffffff81b8e920 t __gen11_reset_engines +ffffffff81b8edb0 t __gen6_reset_engines +ffffffff81b8ef00 t nop_submit_request +ffffffff81b8ef70 t __delayed_work_tick +ffffffff81b8f000 T intel_ring_update_space +ffffffff81b8f040 T __intel_ring_pin +ffffffff81b8f070 T intel_ring_pin +ffffffff81b8f1c0 T intel_ring_reset +ffffffff81b8f200 T intel_ring_unpin +ffffffff81b8f2a0 T intel_engine_create_ring +ffffffff81b8f430 T intel_ring_free +ffffffff81b8f480 T intel_ring_begin +ffffffff81b8f600 t wait_for_space +ffffffff81b8f700 T intel_ring_cacheline_align +ffffffff81b90000 T intel_ring_submission_setup +ffffffff81b906f0 t i915_gem_object_lock +ffffffff81b90910 t ring_release +ffffffff81b90a60 t xcs_resume +ffffffff81b91040 t xcs_sanitize +ffffffff81b910b0 t reset_prepare +ffffffff81b911f0 t reset_rewind +ffffffff81b912a0 t reset_cancel +ffffffff81b91330 t reset_finish +ffffffff81b91360 t add_to_engine +ffffffff81b913e0 t remove_from_engine +ffffffff81b91470 t ring_request_alloc +ffffffff81b91800 t i9xx_set_default_submission +ffffffff81b91840 t irq_handler +ffffffff81b91860 t stop_ring +ffffffff81b91960 t ring_context_alloc +ffffffff81b91a50 t ring_context_revoke +ffffffff81b91b10 t ring_context_pre_pin +ffffffff81b91bf0 t ring_context_pin +ffffffff81b91c20 t ring_context_unpin +ffffffff81b91c50 t ring_context_post_unpin +ffffffff81b91ca0 t ring_context_cancel_request +ffffffff81b91d30 t ring_context_reset +ffffffff81b91d80 t ring_context_destroy +ffffffff81b91dd0 t switch_mm +ffffffff81b91f10 t mi_set_context +ffffffff81b921f0 t i9xx_submit_request +ffffffff81b92240 t gen6_bsd_set_default_submission +ffffffff81b92280 t gen6_bsd_submit_request +ffffffff81b93000 T intel_rps_mark_interactive +ffffffff81b93080 t rps_set_power +ffffffff81b931f0 T intel_rps_unpark +ffffffff81b934f0 T intel_rps_set +ffffffff81b93610 T intel_rps_park +ffffffff81b937b0 t rps_disable_interrupts +ffffffff81b93890 t rps_set +ffffffff81b93bd0 T intel_rps_get_boost_frequency +ffffffff81b93cb0 T intel_gpu_freq +ffffffff81b93d80 T intel_rps_set_boost_frequency +ffffffff81b93f10 T intel_rps_dec_waiters +ffffffff81b93f70 T intel_rps_boost +ffffffff81b94090 T gen6_rps_get_freq_caps +ffffffff81b94270 T intel_rps_enable +ffffffff81b94810 t gen9_rps_enable +ffffffff81b94920 t gen8_rps_enable +ffffffff81b94a10 t gen6_rps_enable +ffffffff81b94b10 t gen5_rps_enable +ffffffff81b95530 T intel_rps_disable +ffffffff81b957d0 T intel_freq_opcode +ffffffff81b95890 T gen11_rps_irq_handler +ffffffff81b95920 T gen6_rps_irq_handler +ffffffff81b95a40 T gen5_rps_irq_handler +ffffffff81b95c70 T intel_rps_init_early +ffffffff81b95d10 t rps_work +ffffffff81b96090 t rps_timer +ffffffff81b962b0 T intel_rps_init +ffffffff81b96df0 t gen5_rps_init +ffffffff81b96f50 T intel_rps_sanitize +ffffffff81b96fb0 T intel_rps_read_rpstat +ffffffff81b96ff0 T intel_rps_read_actual_frequency +ffffffff81b97120 T intel_rps_read_actual_frequency_fw +ffffffff81b97200 t __read_cagf +ffffffff81b97390 T intel_rps_read_punit_req_frequency +ffffffff81b974b0 T intel_rps_get_requested_frequency +ffffffff81b97670 T intel_rps_get_max_frequency +ffffffff81b97750 T intel_rps_get_max_raw_freq +ffffffff81b977d0 T intel_rps_get_rp0_frequency +ffffffff81b978b0 T intel_rps_get_rp1_frequency +ffffffff81b97990 T intel_rps_get_rpn_frequency +ffffffff81b97a70 T gen6_rps_frequency_dump +ffffffff81b99110 T intel_rps_set_max_frequency +ffffffff81b99380 T intel_rps_get_min_frequency +ffffffff81b99460 T intel_rps_get_min_raw_freq +ffffffff81b994e0 T intel_rps_set_min_frequency +ffffffff81b99660 T intel_rps_get_up_threshold +ffffffff81b99690 T intel_rps_set_up_threshold +ffffffff81b99770 T intel_rps_get_down_threshold +ffffffff81b997a0 T intel_rps_set_down_threshold +ffffffff81b99880 T intel_rps_raise_unslice +ffffffff81b99960 T intel_rps_lower_unslice +ffffffff81b99a40 T rps_read_mask_mmio +ffffffff81b99ad0 T intel_rps_driver_register +ffffffff81b99b10 T intel_rps_driver_unregister +ffffffff81b99b60 T i915_read_mch_val +ffffffff81b99fd0 T i915_gpu_raise +ffffffff81b9a060 T i915_gpu_lower +ffffffff81b9a0f0 T i915_gpu_busy +ffffffff81b9a160 T i915_gpu_turbo_disable +ffffffff81b9b000 T intel_sa_mediagt_setup +ffffffff81b9c000 T intel_sseu_set_info +ffffffff81b9c040 T intel_sseu_subslice_total +ffffffff81b9c1c0 T intel_sseu_get_hsw_subslices +ffffffff81b9c270 T intel_sseu_copy_eumask_to_user +ffffffff81b9c5c0 T intel_sseu_copy_ssmask_to_user +ffffffff81b9c740 T intel_sseu_info_init +ffffffff81b9d6e0 t cherryview_sseu_info_init +ffffffff81b9d900 t hsw_sseu_info_init +ffffffff81b9dbd0 T intel_sseu_make_rpcs +ffffffff81b9dda0 T intel_sseu_dump +ffffffff81b9dfa0 T intel_sseu_print_topology +ffffffff81b9e260 T intel_sseu_print_ss_info +ffffffff81b9e2c0 T intel_slicemask_from_xehp_dssmask +ffffffff81b9e310 t xehp_load_dss_mask +ffffffff81b9e440 t gen11_compute_sseu_info +ffffffff81b9f000 T intel_sseu_status +ffffffff81b9f840 T intel_sseu_debugfs_register +ffffffff81ba0000 T intel_gt_init_timelines +ffffffff81ba0060 T __intel_timeline_create +ffffffff81ba0220 T intel_timeline_create_from_engine +ffffffff81ba02e0 T __intel_timeline_pin +ffffffff81ba0310 T intel_timeline_pin +ffffffff81ba0440 T intel_timeline_reset_seqno +ffffffff81ba0470 T intel_timeline_enter +ffffffff81ba0550 T intel_timeline_exit +ffffffff81ba0620 T intel_timeline_get_seqno +ffffffff81ba0680 t __intel_timeline_get_seqno +ffffffff81ba0720 T intel_timeline_read_hwsp +ffffffff81ba07f0 T intel_timeline_unpin +ffffffff81ba0840 T __intel_timeline_free +ffffffff81ba08d0 T intel_gt_fini_timelines +ffffffff81ba0900 T intel_gt_show_timelines +ffffffff81ba0c90 t __timeline_active +ffffffff81ba0cd0 t __timeline_retire +ffffffff81ba1000 T intel_gt_invalidate_tlb_full +ffffffff81ba12e0 T intel_gt_init_tlb +ffffffff81ba1340 T intel_gt_fini_tlb +ffffffff81ba2000 T intel_wopcm_init_early +ffffffff81ba2080 T intel_wopcm_init +ffffffff81ba3000 T intel_engine_init_ctx_wa +ffffffff81ba3b80 T intel_engine_emit_ctx_wa +ffffffff81ba3dd0 T intel_gt_init_workarounds +ffffffff81ba5150 T intel_gt_apply_workarounds +ffffffff81ba5170 t wa_list_apply +ffffffff81ba5320 T intel_gt_verify_workarounds +ffffffff81ba5510 T intel_engine_init_whitelist +ffffffff81ba57b0 t tgl_whitelist_build +ffffffff81ba58c0 t icl_whitelist_build +ffffffff81ba5a50 t cml_whitelist_build +ffffffff81ba5ab0 t cfl_whitelist_build +ffffffff81ba5bb0 t glk_whitelist_build +ffffffff81ba5cb0 t kbl_whitelist_build +ffffffff81ba5db0 t bxt_whitelist_build +ffffffff81ba5e90 t skl_whitelist_build +ffffffff81ba5f90 T intel_engine_apply_whitelist +ffffffff81ba6090 T intel_engine_init_workarounds +ffffffff81ba7840 T intel_engine_apply_workarounds +ffffffff81ba7860 T intel_engine_verify_workarounds +ffffffff81ba8110 t gen12_ctx_workarounds_init +ffffffff81ba8220 t _wa_add +ffffffff81ba84b0 t gen9_ctx_workarounds_init +ffffffff81ba8710 t gen8_ctx_workarounds_init +ffffffff81ba8850 t gen12_gt_workarounds_init +ffffffff81ba8a00 t gen9_gt_workarounds_init +ffffffff81ba8b70 t xehp_init_mcr +ffffffff81ba9000 T uao_create_from_data +ffffffff81ba9090 T uao_write +ffffffff81ba90b0 T uao_create_from_object +ffffffff81ba9190 T uao_read_to_iosys_map +ffffffff81ba9310 T uao_read +ffffffff81ba9330 t __uao_rw +ffffffff81baa000 T intel_engines_add_sysfs +ffffffff81bab000 T intel_gsc_uc_fw_proxy_init_done +ffffffff81bab0a0 T intel_gsc_uc_fw_proxy_get_status +ffffffff81bab0d0 T intel_gsc_uc_fw_init_done +ffffffff81bab120 T intel_gsc_fw_get_binary_info +ffffffff81bab490 T intel_gsc_uc_fw_upload +ffffffff81bab830 t gsc_fw_query_compatibility_version +ffffffff81bac000 T intel_gsc_proxy_request_handler +ffffffff81bac840 T intel_gsc_proxy_irq_handler +ffffffff81bac8e0 T intel_gsc_proxy_fini +ffffffff81bac950 T intel_gsc_proxy_init +ffffffff81bad000 T intel_gsc_uc_init_early +ffffffff81bad100 t gsc_work +ffffffff81bad2d0 T intel_gsc_uc_init +ffffffff81bad500 T intel_gsc_uc_fini +ffffffff81bad5f0 T intel_gsc_uc_flush_work +ffffffff81bad630 T intel_gsc_uc_resume +ffffffff81bad6e0 T intel_gsc_uc_load_start +ffffffff81bad770 T intel_gsc_uc_load_status +ffffffff81bae000 T intel_gsc_uc_debugfs_register +ffffffff81baf000 T intel_gsc_uc_heci_cmd_submit_packet +ffffffff81baf2f0 T intel_gsc_uc_heci_cmd_emit_mtl_header +ffffffff81baf350 T intel_gsc_uc_heci_cmd_submit_nonpriv +ffffffff81baf800 t i915_gem_object_lock +ffffffff81bb0000 T intel_guc_notify +ffffffff81bb0040 T intel_guc_init_send_regs +ffffffff81bb00e0 T intel_guc_init_early +ffffffff81bb0230 t gen11_reset_guc_interrupts +ffffffff81bb0280 t gen11_enable_guc_interrupts +ffffffff81bb0300 t gen11_disable_guc_interrupts +ffffffff81bb0370 t gen9_reset_guc_interrupts +ffffffff81bb0440 t gen9_enable_guc_interrupts +ffffffff81bb05b0 t gen9_disable_guc_interrupts +ffffffff81bb06a0 T intel_guc_init_late +ffffffff81bb06b0 T intel_guc_write_params +ffffffff81bb08d0 T intel_guc_dump_time_info +ffffffff81bb0a10 T intel_guc_init +ffffffff81bb0ba0 t guc_init_params +ffffffff81bb10e0 T intel_guc_fini +ffffffff81bb1190 T intel_guc_send_mmio +ffffffff81bb1670 T intel_guc_to_host_process_recv_msg +ffffffff81bb1760 T intel_guc_auth_huc +ffffffff81bb17c0 T intel_guc_suspend +ffffffff81bb18b0 T intel_guc_resume +ffffffff81bb18e0 T intel_guc_allocate_vma +ffffffff81bb1a00 T intel_guc_allocate_and_map_vma +ffffffff81bb1ab0 T intel_guc_self_cfg32 +ffffffff81bb1bb0 T intel_guc_self_cfg64 +ffffffff81bb1cb0 T intel_guc_load_status +ffffffff81bb1e40 T intel_guc_write_barrier +ffffffff81bb2000 T intel_guc_ads_print_policy_info +ffffffff81bb2100 T intel_guc_global_policies_update +ffffffff81bb22e0 T intel_guc_ads_create +ffffffff81bb2830 t guc_prep_golden_context +ffffffff81bb2a40 t guc_capture_prep_lists +ffffffff81bb3110 t __guc_ads_init +ffffffff81bb3640 T intel_guc_ads_init_late +ffffffff81bb3840 T intel_guc_ads_destroy +ffffffff81bb38a0 T intel_guc_ads_reset +ffffffff81bb3950 T intel_guc_engine_usage_offset +ffffffff81bb3990 T intel_guc_engine_usage_record_map +ffffffff81bb3a30 t guc_mmio_reg_add +ffffffff81bb4000 T intel_guc_capture_getlistsize +ffffffff81bb4020 t guc_capture_getlistsize +ffffffff81bb4250 T intel_guc_capture_getlist +ffffffff81bb5100 t guc_cap_list_num_regs +ffffffff81bb5210 T intel_guc_capture_getnullheader +ffffffff81bb52d0 T intel_guc_capture_print_engine_node +ffffffff81bb57e0 T intel_guc_capture_free_node +ffffffff81bb5860 T intel_guc_capture_is_matching_engine +ffffffff81bb5910 T intel_guc_capture_get_matching_node +ffffffff81bb5aa0 T intel_guc_capture_process +ffffffff81bb6a80 T intel_guc_capture_destroy +ffffffff81bb6de0 T intel_guc_capture_init +ffffffff81bb7630 t guc_capture_log_get_register +ffffffff81bb7730 t guc_capture_log_remove_dw +ffffffff81bb8000 T intel_guc_ct_init_early +ffffffff81bb8120 t ct_incoming_request_worker_func +ffffffff81bb84f0 t ct_receive_tasklet_func +ffffffff81bb8510 T intel_guc_ct_init +ffffffff81bb86c0 T intel_guc_ct_fini +ffffffff81bb8720 T intel_guc_ct_enable +ffffffff81bb8aa0 T intel_guc_ct_disable +ffffffff81bb8b70 T intel_guc_ct_send +ffffffff81bb94c0 T intel_guc_ct_event_handler +ffffffff81bb94f0 t ct_try_receive_message +ffffffff81bb9d40 T intel_guc_ct_print_info +ffffffff81bb9e50 t ct_write +ffffffff81bba010 t ktime_get +ffffffff81bba090 t ct_deadlocked +ffffffff81bbb000 T intel_guc_debugfs_register +ffffffff81bbc000 T intel_guc_fw_upload +ffffffff81bbd000 T intel_gt_init_hwconfig +ffffffff81bbd1e0 T intel_gt_fini_hwconfig +ffffffff81bbe000 T intel_guc_log_section_size_capture +ffffffff81bbe040 t guc_log_init_sizes +ffffffff81bbe280 T intel_guc_check_log_buf_overflow +ffffffff81bbe330 T intel_guc_get_log_buffer_size +ffffffff81bbe3c0 T intel_guc_get_log_buffer_offset +ffffffff81bbe4b0 T intel_guc_log_init_early +ffffffff81bbe520 t copy_debug_logs_work +ffffffff81bbe540 T intel_guc_log_create +ffffffff81bbe770 T intel_guc_log_destroy +ffffffff81bbe7a0 T intel_guc_log_set_level +ffffffff81bbe8e0 T intel_guc_log_relay_created +ffffffff81bbe910 T intel_guc_log_relay_open +ffffffff81bbe9b0 T intel_guc_log_relay_start +ffffffff81bbea10 T intel_guc_log_relay_flush +ffffffff81bbeab0 t guc_log_copy_debuglogs_for_relay +ffffffff81bbec00 T intel_guc_log_relay_close +ffffffff81bbec90 T intel_guc_log_handle_flush_event +ffffffff81bbece0 T intel_guc_log_info +ffffffff81bbedd0 T intel_guc_log_dump +ffffffff81bc0000 T intel_guc_log_debugfs_register +ffffffff81bc1000 T intel_guc_rc_init_early +ffffffff81bc1060 T intel_guc_rc_enable +ffffffff81bc1180 T intel_guc_rc_disable +ffffffff81bc2000 T intel_guc_slpc_init_early +ffffffff81bc2060 T intel_guc_slpc_init +ffffffff81bc2180 t slpc_boost_work +ffffffff81bc21d0 T intel_guc_slpc_set_max_freq +ffffffff81bc2310 T intel_guc_slpc_get_max_freq +ffffffff81bc23b0 t slpc_query_task_state +ffffffff81bc24a0 T intel_guc_slpc_set_ignore_eff_freq +ffffffff81bc26c0 T intel_guc_slpc_set_min_freq +ffffffff81bc2810 T intel_guc_slpc_get_min_freq +ffffffff81bc28b0 T intel_guc_slpc_set_media_ratio_mode +ffffffff81bc29e0 T intel_guc_pm_intrmsk_enable +ffffffff81bc2a40 T intel_guc_slpc_override_gucrc_mode +ffffffff81bc2ba0 T intel_guc_slpc_unset_gucrc_mode +ffffffff81bc2c90 T intel_guc_slpc_enable +ffffffff81bc3260 T intel_guc_slpc_set_boost_freq +ffffffff81bc3300 t slpc_force_min_freq +ffffffff81bc3430 T intel_guc_slpc_dec_waiters +ffffffff81bc3470 T intel_guc_slpc_print_info +ffffffff81bc35f0 T intel_guc_slpc_fini +ffffffff81bc4000 T intel_guc_wait_for_pending_msg +ffffffff81bc4160 T intel_guc_wait_for_idle +ffffffff81bc41b0 T intel_guc_busyness_park +ffffffff81bc42c0 T intel_guc_busyness_unpark +ffffffff81bc4370 t guc_update_pm_timestamp +ffffffff81bc4520 T intel_guc_submission_reset_prepare +ffffffff81bc4bf0 t guc_flush_destroyed_contexts +ffffffff81bc4d50 T intel_guc_submission_reset +ffffffff81bc4e60 t __guc_reset_context +ffffffff81bc5160 T intel_guc_submission_cancel_requests +ffffffff81bc5400 T intel_guc_submission_reset_finish +ffffffff81bc54e0 T intel_guc_submission_init +ffffffff81bc5660 T intel_guc_submission_fini +ffffffff81bc5700 T intel_guc_submission_setup +ffffffff81bc5b70 t guc_sched_engine_disabled +ffffffff81bc5ba0 t guc_sched_engine_destroy +ffffffff81bc5c00 t guc_bump_inflight_request_prio +ffffffff81bc5cf0 t guc_retire_inflight_request_prio +ffffffff81bc5d70 t guc_submission_tasklet +ffffffff81bc6140 t guc_sanitize +ffffffff81bc61b0 t guc_release +ffffffff81bc61e0 T intel_guc_submission_enable +ffffffff81bc66d0 T intel_guc_submission_disable +ffffffff81bc6770 T intel_guc_sched_disable_gucid_threshold_max +ffffffff81bc67b0 T intel_guc_submission_init_early +ffffffff81bc6930 t destroyed_worker_func +ffffffff81bc6c10 t reset_fail_worker_func +ffffffff81bc6d00 t guc_timestamp_ping +ffffffff81bc6e60 T intel_guc_deregister_done_process_msg +ffffffff81bc71c0 t register_context +ffffffff81bc7b90 t __guc_context_destroy +ffffffff81bc7c10 T intel_guc_sched_done_process_msg +ffffffff81bc7fe0 T intel_guc_context_reset_process_msg +ffffffff81bc83a0 T intel_guc_error_capture_process_msg +ffffffff81bc8470 T intel_guc_lookup_engine +ffffffff81bc84c0 T intel_guc_engine_failure_process_msg +ffffffff81bc8660 T intel_guc_find_hung_context +ffffffff81bc8830 T intel_guc_dump_active_requests +ffffffff81bc89c0 T intel_guc_submission_print_info +ffffffff81bc8b30 T intel_guc_submission_print_context_info +ffffffff81bc8f60 t emit_bb_start_parent_no_preempt_mid_batch +ffffffff81bc90a0 T intel_guc_virtual_engine_has_heartbeat +ffffffff81bc9130 t guc_update_engine_gt_clks +ffffffff81bc92e0 t guc_virtual_get_sibling +ffffffff81bc9380 t update_context_prio +ffffffff81bc9570 t try_context_registration +ffffffff81bc9860 t guc_wq_item_append +ffffffff81bc9af0 t guc_add_request +ffffffff81bc9d10 t clr_ctx_id_mapping +ffffffff81bc9e30 t guc_context_policy_init_v70 +ffffffff81bc9fb0 t guc_resume +ffffffff81bca0b0 t guc_request_alloc +ffffffff81bca470 t add_to_context +ffffffff81bca570 t remove_from_context +ffffffff81bca640 t guc_engine_reset_prepare +ffffffff81bca6a0 t guc_rewind_nop +ffffffff81bca6d0 t guc_reset_nop +ffffffff81bca700 t guc_set_default_submission +ffffffff81bca740 t guc_engine_busyness +ffffffff81bca930 t guc_context_alloc +ffffffff81bca950 t guc_context_revoke +ffffffff81bcac50 t guc_context_close +ffffffff81bcacd0 t guc_context_pre_pin +ffffffff81bcacf0 t guc_context_pin +ffffffff81bcadb0 t guc_context_unpin +ffffffff81bcaef0 t guc_context_post_unpin +ffffffff81bcaf00 t guc_context_cancel_request +ffffffff81bcb400 t guc_context_sched_disable +ffffffff81bcb540 t guc_context_update_stats +ffffffff81bcb650 t guc_context_destroy +ffffffff81bcb7a0 t guc_create_virtual +ffffffff81bcbae0 t guc_create_parallel +ffffffff81bcbda0 t __guc_context_set_preemption_timeout +ffffffff81bcbef0 t __delay_sched_disable +ffffffff81bcbfb0 t do_sched_disable +ffffffff81bcc100 t unpin_guc_id +ffffffff81bcc1d0 t __release_guc_id +ffffffff81bcc3d0 t virtual_guc_bump_serial +ffffffff81bcc460 t guc_submit_request +ffffffff81bcc670 t guc_virtual_context_alloc +ffffffff81bcc6c0 t guc_virtual_context_pre_pin +ffffffff81bcc720 t guc_virtual_context_pin +ffffffff81bcc860 t guc_virtual_context_unpin +ffffffff81bcc9b0 t guc_virtual_context_enter +ffffffff81bcca70 t guc_virtual_context_exit +ffffffff81bccb30 t emit_fini_breadcrumb_parent_no_preempt_mid_batch +ffffffff81bcccc0 t emit_bb_start_child_no_preempt_mid_batch +ffffffff81bccde0 t emit_fini_breadcrumb_child_no_preempt_mid_batch +ffffffff81bccf50 t guc_parent_context_pin +ffffffff81bcd020 t guc_parent_context_unpin +ffffffff81bcd0e0 t pin_guc_id +ffffffff81bcd4a0 t guc_child_context_pin +ffffffff81bcd530 t guc_child_context_unpin +ffffffff81bcd540 t guc_child_context_post_unpin +ffffffff81bcd5e0 t guc_child_context_destroy +ffffffff81bcd660 t guc_context_init +ffffffff81bcd710 t submit_work_cb +ffffffff81bcd730 t cs_irq_handler +ffffffff81bcd780 t guc_irq_enable_breadcrumbs +ffffffff81bcd840 t guc_irq_disable_breadcrumbs +ffffffff81bcd8e0 t __delayed_work_tick +ffffffff81bce000 T intel_huc_register_gsc_notifier +ffffffff81bce040 t gsc_notifier +ffffffff81bce090 T intel_huc_unregister_gsc_notifier +ffffffff81bce100 T intel_huc_sanitize +ffffffff81bce170 T intel_huc_init_early +ffffffff81bce2c0 T intel_huc_init +ffffffff81bce4e0 T intel_huc_fini +ffffffff81bce560 T intel_huc_suspend +ffffffff81bce5d0 T intel_huc_wait_for_auth_complete +ffffffff81bce6f0 T intel_huc_auth +ffffffff81bce8b0 T intel_huc_is_authenticated +ffffffff81bce960 T intel_huc_check_status +ffffffff81bcea50 t huc_is_fully_authenticated +ffffffff81bceb70 T intel_huc_update_auth_status +ffffffff81bcec80 T intel_huc_load_status +ffffffff81bced60 t sw_fence_dummy_notify +ffffffff81bced90 t huc_delayed_load_timer_callback +ffffffff81bcf000 T intel_huc_debugfs_register +ffffffff81bd0000 T intel_huc_fw_auth_via_gsccs +ffffffff81bd0420 T intel_huc_fw_get_binary_info +ffffffff81bd0710 T intel_huc_fw_load_and_auth_via_gsc +ffffffff81bd07b0 T intel_huc_fw_upload +ffffffff81bd1000 T intel_uc_init_early +ffffffff81bd1170 T intel_uc_init_late +ffffffff81bd11a0 T intel_uc_driver_late_release +ffffffff81bd11d0 T intel_uc_init_mmio +ffffffff81bd11f0 T intel_uc_driver_remove +ffffffff81bd1280 T intel_uc_reset_prepare +ffffffff81bd1300 t __uc_sanitize +ffffffff81bd1430 T intel_uc_reset +ffffffff81bd1480 T intel_uc_reset_finish +ffffffff81bd14d0 T intel_uc_cancel_requests +ffffffff81bd1520 T intel_uc_runtime_suspend +ffffffff81bd1680 T intel_uc_suspend +ffffffff81bd1740 T intel_uc_resume +ffffffff81bd17e0 T intel_uc_runtime_resume +ffffffff81bd18b0 t guc_enable_communication +ffffffff81bd1a00 t __uc_fini +ffffffff81bd1a40 t __uc_check_hw +ffffffff81bd1af0 t __uc_fetch_firmwares +ffffffff81bd1bf0 t __uc_cleanup_firmwares +ffffffff81bd1c30 t __uc_init +ffffffff81bd1cb0 t __uc_init_hw +ffffffff81bd2320 t __uc_fini_hw +ffffffff81bd2380 t __uc_resume_mappings +ffffffff81bd3000 T intel_uc_debugfs_register +ffffffff81bd4000 T intel_uc_fw_version_from_gsc_manifest +ffffffff81bd4050 T intel_uc_fw_init_early +ffffffff81bd4560 t __uc_fw_auto_select +ffffffff81bd4690 T intel_uc_check_file_version +ffffffff81bd48c0 T intel_uc_fw_fetch +ffffffff81bd4db0 t try_firmware_load +ffffffff81bd4f30 t release_firmware +ffffffff81bd4f70 T intel_uc_fw_mark_load_failed +ffffffff81bd5040 T intel_uc_fw_upload +ffffffff81bd53b0 T intel_uc_fw_init +ffffffff81bd55c0 t uc_fw_bind_ggtt +ffffffff81bd56e0 T intel_uc_fw_fini +ffffffff81bd5790 T intel_uc_fw_resume_mapping +ffffffff81bd57d0 T intel_uc_fw_cleanup_fetch +ffffffff81bd5840 T intel_uc_fw_copy_rsa +ffffffff81bd5b50 T intel_uc_fw_dump +ffffffff81bd5cc0 t __check_ccs_header +ffffffff81bd6000 T __i915_active_init +ffffffff81bd60a0 t excl_retire +ffffffff81bd6130 t active_work +ffffffff81bd6190 T i915_active_add_request +ffffffff81bd6310 T i915_active_acquire +ffffffff81bd63f0 t active_instance +ffffffff81bd6560 T __i915_active_fence_set +ffffffff81bd6660 T i915_active_release +ffffffff81bd66e0 T i915_active_set_exclusive +ffffffff81bd67b0 T i915_active_acquire_if_busy +ffffffff81bd6800 T i915_active_acquire_for_context +ffffffff81bd6860 T __i915_active_wait +ffffffff81bd6a90 t flush_lazy_signals +ffffffff81bd6bc0 T i915_request_await_active +ffffffff81bd6bf0 t await_active +ffffffff81bd6ea0 t rq_await_fence +ffffffff81bd6eb0 T i915_sw_fence_await_active +ffffffff81bd6ee0 t sw_await_fence +ffffffff81bd6f00 T i915_active_fini +ffffffff81bd6f40 T i915_active_acquire_preallocate_barrier +ffffffff81bd7310 t node_retire +ffffffff81bd73a0 T i915_active_acquire_barrier +ffffffff81bd7500 T i915_request_add_active_barriers +ffffffff81bd75b0 T i915_active_fence_set +ffffffff81bd7620 T i915_active_noop +ffffffff81bd7660 T i915_active_get +ffffffff81bd7690 T i915_active_put +ffffffff81bd7700 T i915_active_create +ffffffff81bd77f0 t auto_active +ffffffff81bd7820 t auto_retire +ffffffff81bd7890 T i915_active_module_exit +ffffffff81bd78b0 T i915_active_module_init +ffffffff81bd7910 t __active_retire +ffffffff81bd7b00 t barrier_wake +ffffffff81bd8000 T intel_engine_init_cmd_parser +ffffffff81bd86f0 t gen7_render_get_cmd_length_mask +ffffffff81bd8780 t gen7_bsd_get_cmd_length_mask +ffffffff81bd8820 t gen7_blt_get_cmd_length_mask +ffffffff81bd8890 t gen9_blt_get_cmd_length_mask +ffffffff81bd8900 T intel_engine_cleanup_cmd_parser +ffffffff81bd89d0 T intel_engine_cmd_parser +ffffffff81bd9580 T i915_cmd_parser_get_version +ffffffff81bda000 T i915_fence_context_timeout +ffffffff81bdb000 T i915_deps_init +ffffffff81bdb060 T i915_deps_fini +ffffffff81bdb0f0 T i915_deps_sync +ffffffff81bdb1a0 T i915_deps_add_dependency +ffffffff81bdb3f0 T i915_deps_add_resv +ffffffff81bdc000 T i915_print_iommu_status +ffffffff81bdc050 T i915_driver_probe +ffffffff81bdc910 t i915_driver_register +ffffffff81bdca00 T inteldrm_init_backlight +ffffffff81bdca70 t i915_welcome_messages +ffffffff81bdcbf0 T i915_driver_remove +ffffffff81bdccd0 T i915_driver_shutdown +ffffffff81bdce70 T i915_driver_resume_switcheroo +ffffffff81bdced0 t i915_drm_resume_early +ffffffff81bdcfc0 t i915_drm_resume +ffffffff81bdd200 T intagpsubmatch +ffffffff81bdd250 T intagp_print +ffffffff81bdd2a0 T inteldrm_wsioctl +ffffffff81bdd480 T inteldrm_wsmmap +ffffffff81bdd4b0 T inteldrm_alloc_screen +ffffffff81bdd4e0 T inteldrm_free_screen +ffffffff81bdd500 T inteldrm_show_screen +ffffffff81bdd5d0 T inteldrm_load_font +ffffffff81bdd5f0 T inteldrm_list_font +ffffffff81bdd610 T inteldrm_scrollback +ffffffff81bdd630 T inteldrm_getchar +ffffffff81bdd650 T inteldrm_burner +ffffffff81bdd6e0 T inteldrm_enter_ddb +ffffffff81bdd740 T inteldrm_doswitch +ffffffff81bdd7c0 T inteldrm_burner_cb +ffffffff81bdd7f0 T inteldrm_backlight_update_status +ffffffff81bdd850 T inteldrm_backlight_get_brightness +ffffffff81bdd8a0 T inteldrm_match +ffffffff81bdd930 T inteldrm_attach +ffffffff81bddd40 T inteldrm_detach +ffffffff81bddd70 T inteldrm_activate +ffffffff81bde080 T inteldrm_intr +ffffffff81bde0c0 T inteldrm_attachhook +ffffffff81bde320 T inteldrm_forcedetach +ffffffff81bde360 T inteldrm_native_backlight +ffffffff81bde490 T inteldrm_firmware_backlight +ffffffff81bde610 t i915_pcode_init +ffffffff81bde6d0 t i915_driver_open +ffffffff81bde6f0 t i915_driver_postclose +ffffffff81bde750 t i915_driver_lastclose +ffffffff81bde770 t i915_driver_release +ffffffff81bde880 t i915_gem_reject_pin_ioctl +ffffffff81bdf000 T i915_drm_client_alloc +ffffffff81bdf070 T __i915_drm_client_free +ffffffff81be0000 T i915_gem_get_aperture_ioctl +ffffffff81be00d0 T i915_gem_object_unbind +ffffffff81be0340 T i915_gem_pread_ioctl +ffffffff81be04d0 t i915_gem_shmem_pread +ffffffff81be08f0 t i915_gem_gtt_pread +ffffffff81be0b90 T i915_gem_pwrite_ioctl +ffffffff81be0d60 t i915_gem_gtt_pwrite_fast +ffffffff81be1060 t i915_gem_shmem_pwrite +ffffffff81be14f0 T i915_gem_sw_finish_ioctl +ffffffff81be1580 T i915_gem_runtime_suspend +ffffffff81be1680 T i915_gem_object_ggtt_pin_ww +ffffffff81be1920 T i915_gem_object_ggtt_pin +ffffffff81be1a30 t i915_gem_object_lock +ffffffff81be1c50 T i915_gem_madvise_ioctl +ffffffff81be2060 T i915_gem_drain_freed_objects +ffffffff81be20d0 T i915_gem_drain_workqueue +ffffffff81be21b0 T i915_gem_init +ffffffff81be2450 T i915_gem_driver_register +ffffffff81be2460 T i915_gem_driver_unregister +ffffffff81be2470 T i915_gem_driver_remove +ffffffff81be24d0 T i915_gem_driver_release +ffffffff81be25c0 T i915_gem_init_early +ffffffff81be2640 T i915_gem_cleanup_early +ffffffff81be26c0 T i915_gem_open +ffffffff81be27d0 t i915_gem_gtt_prepare +ffffffff81be3000 T i915_gem_evict_something +ffffffff81be3440 t ungrab_vma +ffffffff81be3570 t grab_vma +ffffffff81be3690 T i915_gem_evict_for_node +ffffffff81be38d0 T i915_gem_evict_vm +ffffffff81be4000 T i915_gem_gtt_prepare_pages +ffffffff81be4030 T i915_gem_gtt_finish_pages +ffffffff81be4090 T i915_gem_gtt_reserve +ffffffff81be4140 T i915_gem_gtt_insert +ffffffff81be5000 T i915_gem_ww_ctx_init +ffffffff81be5060 T i915_gem_ww_unlock_single +ffffffff81be51a0 T i915_gem_ww_ctx_fini +ffffffff81be5210 t i915_gem_ww_ctx_unlock_all +ffffffff81be5370 T i915_gem_ww_ctx_backoff +ffffffff81be6000 T i915_getparam_ioctl +ffffffff81be7000 T intel_gpu_error_find_batch +ffffffff81be7070 T i915_error_printf +ffffffff81be7130 T intel_gpu_error_print_vma +ffffffff81be7160 T i915_gpu_coredump_copy_to_buffer +ffffffff81be71b0 T __i915_gpu_coredump_free +ffffffff81be7340 T intel_engine_coredump_alloc +ffffffff81be7b80 T intel_engine_coredump_add_request +ffffffff81be7e20 T intel_engine_coredump_add_vma +ffffffff81be7f40 T i915_gpu_coredump_alloc +ffffffff81be81c0 T intel_gt_coredump_alloc +ffffffff81be8a90 T i915_vma_capture_prepare +ffffffff81be8b00 T i915_vma_capture_finish +ffffffff81be8b60 T i915_gpu_coredump +ffffffff81be8ca0 T i915_error_state_store +ffffffff81be8e40 T i915_capture_error_state +ffffffff81be8ed0 T i915_first_error_state +ffffffff81be8f40 T i915_reset_error_state +ffffffff81be8fe0 T i915_disable_error_state +ffffffff81be9030 t capture_vma +ffffffff81bea000 T i915_reg_read_ioctl +ffffffff81beb000 T gen3_irq_reset +ffffffff81beb0d0 T gen3_assert_iir_is_zero +ffffffff81beb1d0 T gen3_irq_init +ffffffff81beb310 T intel_irq_init +ffffffff81beb3a0 t ivb_parity_work +ffffffff81beb740 T intel_irq_fini +ffffffff81beb780 T intel_irq_install +ffffffff81beb890 t intel_irq_reset +ffffffff81bec260 t intel_irq_postinstall +ffffffff81bec830 T intel_irq_uninstall +ffffffff81bec8a0 T intel_runtime_pm_disable_interrupts +ffffffff81bec8d0 T intel_synchronize_irq +ffffffff81bec8f0 T intel_runtime_pm_enable_interrupts +ffffffff81bec920 T intel_irqs_enabled +ffffffff81bec950 T intel_synchronize_hardirq +ffffffff81bec970 t kasprintf +ffffffff81beca40 t ibx_irq_reset +ffffffff81becb80 t cherryview_irq_handler +ffffffff81becd80 t valleyview_irq_handler +ffffffff81becff0 t i965_irq_handler +ffffffff81bed2c0 t i915_irq_handler +ffffffff81bed560 t i8xx_irq_handler +ffffffff81bed7c0 t dg1_irq_handler +ffffffff81bed910 t gen11_irq_handler +ffffffff81bed9e0 t gen8_irq_handler +ffffffff81bedac0 t ilk_irq_handler +ffffffff81bee000 T i915_memcpy_from_wc +ffffffff81bee120 T i915_unaligned_memcpy_from_wc +ffffffff81bee240 T i915_memcpy_init_early +ffffffff81bef000 T i915_mitigate_clear_residuals +ffffffff81bf0000 T i915_init +ffffffff81bf0220 t i915_check_nomodeset +ffffffff81bf0280 t i915_mock_selftests +ffffffff81bf02b0 t i915_pmu_init +ffffffff81bf02e0 t i915_pmu_exit +ffffffff81bf1000 T i915_params_dump +ffffffff81bf1670 T i915_params_copy +ffffffff81bf1870 T i915_params_free +ffffffff81bf2000 T i915_pci_register_driver +ffffffff81bf2030 T i915_pci_unregister_driver +ffffffff81bf3000 T i915_oa_config_release +ffffffff81bf3060 T i915_perf_get_oa_config +ffffffff81bf30c0 T i915_perf_oa_timestamp_frequency +ffffffff81bf31a0 T i915_oa_init_reg_state +ffffffff81bf3290 T i915_perf_open_ioctl +ffffffff81bf3ae0 T i915_perf_register +ffffffff81bf3b10 T i915_perf_unregister +ffffffff81bf3b80 T i915_perf_add_config_ioctl +ffffffff81bf3bd0 T i915_perf_remove_config_ioctl +ffffffff81bf3c40 T i915_perf_init +ffffffff81bf4320 t gen7_is_valid_b_counter_addr +ffffffff81bf4370 t hsw_is_valid_mux_addr +ffffffff81bf43f0 t hsw_enable_metric_set +ffffffff81bf44b0 t hsw_disable_metric_set +ffffffff81bf4580 t gen7_oa_enable +ffffffff81bf46f0 t gen7_oa_disable +ffffffff81bf47b0 t gen7_oa_read +ffffffff81bf4c20 t gen7_oa_hw_tail_read +ffffffff81bf4c70 t gen8_oa_read +ffffffff81bf52a0 t gen8_is_valid_mux_addr +ffffffff81bf5320 t gen8_is_valid_flex_addr +ffffffff81bf53a0 t chv_is_valid_mux_addr +ffffffff81bf5420 t gen8_oa_enable +ffffffff81bf5560 t gen8_oa_disable +ffffffff81bf5620 t gen8_enable_metric_set +ffffffff81bf56e0 t gen8_disable_metric_set +ffffffff81bf5740 t gen8_oa_hw_tail_read +ffffffff81bf5790 t gen11_is_valid_mux_addr +ffffffff81bf5850 t gen11_disable_metric_set +ffffffff81bf58b0 t xehp_is_valid_b_counter_addr +ffffffff81bf5980 t gen12_is_valid_b_counter_addr +ffffffff81bf59d0 t gen12_is_valid_mux_addr +ffffffff81bf5a70 t gen12_oa_enable +ffffffff81bf5c10 t gen12_oa_disable +ffffffff81bf5d70 t gen12_enable_metric_set +ffffffff81bf5f60 t gen12_disable_metric_set +ffffffff81bf60b0 t gen12_oa_hw_tail_read +ffffffff81bf6110 T i915_perf_sysctl_register +ffffffff81bf6140 T i915_perf_sysctl_unregister +ffffffff81bf6170 T i915_perf_fini +ffffffff81bf6290 t destroy_config +ffffffff81bf6320 T i915_perf_ioctl_version +ffffffff81bf6420 t get_sseu_config +ffffffff81bf6470 t emit_oa_config +ffffffff81bf6b40 t i915_gem_object_lock +ffffffff81bf6d60 t append_oa_status +ffffffff81bf6de0 t append_oa_sample +ffffffff81bf6f40 t lrc_configure_all_contexts +ffffffff81bf70f0 t oa_configure_all_contexts +ffffffff81bf7410 t gen8_modify_self +ffffffff81bf75e0 t gen8_modify_context +ffffffff81bf7790 t gen12_configure_oar_context +ffffffff81bf8000 T i915_query_ioctl +ffffffff81bf8100 t query_topology_info +ffffffff81bf8150 t query_engine_info +ffffffff81bf8390 t query_perf_config +ffffffff81bf8690 t query_memregion_info +ffffffff81bf8920 t query_hwconfig_blob +ffffffff81bf89a0 t query_geometry_subslices +ffffffff81bf8a30 t fill_topology_info +ffffffff81bf8bd0 t query_perf_config_data +ffffffff81bf8f30 t copy_perf_config_registers_or_number +ffffffff81bfa000 T i915_request_slab_cache +ffffffff81bfa030 t i915_fence_get_driver_name +ffffffff81bfa060 t i915_fence_get_timeline_name +ffffffff81bfa0c0 t i915_fence_enable_signaling +ffffffff81bfa0d0 t i915_fence_signaled +ffffffff81bfa120 t i915_fence_wait +ffffffff81bfa140 t i915_fence_release +ffffffff81bfa230 T i915_request_notify_execute_cb_imm +ffffffff81bfa2a0 T i915_request_active_engine +ffffffff81bfa380 T i915_request_free_capture_list +ffffffff81bfa3f0 T i915_request_retire +ffffffff81bfa5d0 T i915_request_retire_upto +ffffffff81bfa640 T __i915_request_skip +ffffffff81bfa6e0 T i915_request_set_error_once +ffffffff81bfa750 T i915_request_mark_eio +ffffffff81bfa7e0 T __i915_request_submit +ffffffff81bfa9d0 T i915_request_submit +ffffffff81bfaa20 T __i915_request_unsubmit +ffffffff81bfaa90 T i915_request_unsubmit +ffffffff81bfab10 T i915_request_cancel +ffffffff81bfab90 T __i915_request_create +ffffffff81bfaea0 t request_alloc_slow +ffffffff81bfaff0 T i915_request_create +ffffffff81bfb160 T i915_request_await_execution +ffffffff81bfb270 t __i915_request_await_execution +ffffffff81bfb3a0 t i915_request_await_external +ffffffff81bfb4e0 T i915_request_await_dma_fence +ffffffff81bfb860 T i915_request_await_deps +ffffffff81bfb8d0 T i915_request_await_object +ffffffff81bfb980 T __i915_request_commit +ffffffff81bfbc40 T __i915_request_queue_bh +ffffffff81bfbc80 T __i915_request_queue +ffffffff81bfbce0 T i915_request_add +ffffffff81bfbd90 T i915_request_wait_timeout +ffffffff81bfc0d0 t request_wait_wake +ffffffff81bfc0f0 T i915_request_wait +ffffffff81bfc150 T i915_request_show +ffffffff81bfc380 T i915_test_request_state +ffffffff81bfc4d0 T i915_request_module_exit +ffffffff81bfc500 T i915_request_module_init +ffffffff81bfc590 t submit_notify +ffffffff81bfc680 t semaphore_notify +ffffffff81bfc6d0 t __rq_watchdog_expired +ffffffff81bfc780 t __await_execution +ffffffff81bfc900 t i915_request_await_start +ffffffff81bfca30 t __emit_semaphore_wait +ffffffff81bfcaf0 t irq_execute_cb +ffffffff81bfd000 T i915_sg_trim +ffffffff81bfd120 T i915_refct_sgt_init +ffffffff81bfd160 T i915_rsgt_from_mm_node +ffffffff81bfd360 T i915_rsgt_from_buddy_resource +ffffffff81bfd5b0 t i915_refct_sgt_release +ffffffff81bfe000 T i915_sched_lookup_priolist +ffffffff81bfe120 T __i915_priolist_free +ffffffff81bfe140 T i915_schedule +ffffffff81bfe610 T i915_sched_node_init +ffffffff81bfe670 T i915_sched_node_reinit +ffffffff81bfe6b0 T __i915_sched_node_add_dependency +ffffffff81bfe7c0 T i915_sched_node_add_dependency +ffffffff81bfe900 T i915_sched_node_fini +ffffffff81bfe9e0 T i915_request_show_with_schedule +ffffffff81bfead0 T i915_sched_engine_create +ffffffff81bfeb80 t default_destroy +ffffffff81bfebd0 t default_disabled +ffffffff81bfec00 T i915_scheduler_module_exit +ffffffff81bfec30 T i915_scheduler_module_init +ffffffff81bff000 T i915_save_display +ffffffff81bff390 T i915_restore_display +ffffffff81c00000 T i915_sw_fence_complete +ffffffff81c00040 t __i915_sw_fence_complete +ffffffff81c001c0 T i915_sw_fence_await +ffffffff81c00240 T __i915_sw_fence_init +ffffffff81c002b0 T i915_sw_fence_reinit +ffffffff81c002f0 T i915_sw_fence_commit +ffffffff81c00330 T i915_sw_fence_await_sw_fence +ffffffff81c00350 t __i915_sw_fence_await_sw_fence +ffffffff81c00570 T i915_sw_fence_await_sw_fence_gfp +ffffffff81c00590 T i915_sw_fence_await_dma_fence +ffffffff81c007c0 t dma_i915_sw_fence_wake +ffffffff81c00840 t irq_i915_sw_fence_work +ffffffff81c00880 t timer_i915_sw_fence_wake +ffffffff81c00960 t dma_i915_sw_fence_wake_timer +ffffffff81c009f0 T __i915_sw_fence_await_dma_fence +ffffffff81c00b30 t __dma_i915_sw_fence_wake +ffffffff81c00b90 T i915_sw_fence_await_reservation +ffffffff81c00c70 t i915_sw_fence_wake +ffffffff81c01000 T dma_fence_work_init +ffffffff81c01080 t fence_notify +ffffffff81c01170 t fence_work +ffffffff81c011d0 T dma_fence_work_chain +ffffffff81c01220 t get_driver_name +ffffffff81c01250 t get_timeline_name +ffffffff81c01290 t fence_release +ffffffff81c02000 T i915_switcheroo_register +ffffffff81c02030 T i915_switcheroo_unregister +ffffffff81c03000 T i915_syncmap_init +ffffffff81c03030 T i915_syncmap_is_later +ffffffff81c03130 T i915_syncmap_set +ffffffff81c031e0 t __sync_set +ffffffff81c034d0 T i915_syncmap_free +ffffffff81c03530 t __sync_free +ffffffff81c04000 T i915_setup_sysfs +ffffffff81c04030 T i915_teardown_sysfs +ffffffff81c05000 T i915_ttm_buddy_man_init +ffffffff81c05210 T i915_ttm_buddy_man_fini +ffffffff81c05400 T i915_ttm_buddy_man_reserve +ffffffff81c054d0 T i915_ttm_buddy_man_visible_size +ffffffff81c05500 T i915_ttm_buddy_man_avail +ffffffff81c05560 t i915_ttm_buddy_man_alloc +ffffffff81c05880 t i915_ttm_buddy_man_free +ffffffff81c058f0 t i915_ttm_buddy_man_intersects +ffffffff81c059a0 t i915_ttm_buddy_man_compatible +ffffffff81c05a50 t i915_ttm_buddy_man_debug +ffffffff81c06000 T i915_user_extensions +ffffffff81c07000 T __i915_printk +ffffffff81c070e0 T add_taint_for_CI +ffffffff81c07110 T cancel_timer +ffffffff81c07160 T set_timer_ms +ffffffff81c07210 T i915_vtd_active +ffffffff81c08000 T intel_vgpu_detect +ffffffff81c08030 T intel_vgpu_register +ffffffff81c08090 T intel_vgpu_active +ffffffff81c080c0 T intel_vgpu_has_full_ppgtt +ffffffff81c08100 T intel_vgpu_has_hwsp_emulation +ffffffff81c08140 T intel_vgpu_has_huge_gtt +ffffffff81c08180 T intel_vgt_deballoon +ffffffff81c083c0 T intel_vgt_balloon +ffffffff81c09000 T i915_vma_instance +ffffffff81c09110 t vma_create +ffffffff81c095a0 T i915_vma_work +ffffffff81c09610 T i915_vma_wait_for_bind +ffffffff81c09690 T i915_vma_bind +ffffffff81c099f0 T i915_vma_pin_iomap +ffffffff81c09b90 T i915_vma_flush_writes +ffffffff81c09be0 T i915_vma_unpin_iomap +ffffffff81c09c50 T i915_vma_unpin_and_release +ffffffff81c09cc0 T i915_vma_misplaced +ffffffff81c09db0 T __i915_vma_set_map_and_fenceable +ffffffff81c09e40 T i915_gem_valid_gtt_space +ffffffff81c09ed0 T vma_invalidate_tlb +ffffffff81c09f40 T i915_vma_pin_ww +ffffffff81c0a5f0 t i915_vma_insert +ffffffff81c0a990 T i915_ggtt_pin +ffffffff81c0aa70 t __i915_ggtt_pin +ffffffff81c0abf0 t i915_gem_object_lock +ffffffff81c0ae10 T i915_ggtt_clear_scanout +ffffffff81c0ae90 T i915_vma_close +ffffffff81c0af60 T i915_vma_reopen +ffffffff81c0afe0 T i915_vma_destroy_locked +ffffffff81c0b0d0 t release_references +ffffffff81c0b210 T i915_vma_destroy +ffffffff81c0b350 T i915_vma_parked +ffffffff81c0b630 T i915_vma_revoke_mmap +ffffffff81c0b730 T _i915_vma_move_to_active +ffffffff81c0b980 T __i915_vma_evict +ffffffff81c0bce0 T __i915_vma_unbind +ffffffff81c0bd80 T i915_vma_unbind +ffffffff81c0bed0 T i915_vma_unbind_async +ffffffff81c0c040 t __i915_vma_unbind_async +ffffffff81c0c100 T i915_vma_unbind_unlocked +ffffffff81c0c210 T i915_vma_make_unshrinkable +ffffffff81c0c250 T i915_vma_make_shrinkable +ffffffff81c0c270 T i915_vma_make_purgeable +ffffffff81c0c290 T i915_vma_module_exit +ffffffff81c0c2b0 T i915_vma_module_init +ffffffff81c0c310 t __i915_vma_active +ffffffff81c0c3b0 t __i915_vma_retire +ffffffff81c0c450 t __vma_bind +ffffffff81c0c4f0 t __vma_release +ffffffff81c0c570 t intel_rotate_pages +ffffffff81c0c8d0 t intel_remap_pages +ffffffff81c0cd20 t intel_partial_pages +ffffffff81c0d000 T i915_vma_resource_alloc +ffffffff81c0d050 T i915_vma_resource_free +ffffffff81c0d090 T i915_vma_resource_unhold +ffffffff81c0d0a0 t __i915_vma_resource_unhold +ffffffff81c0d190 T i915_vma_resource_hold +ffffffff81c0d1e0 T i915_vma_resource_unbind +ffffffff81c0d300 T __i915_vma_resource_init +ffffffff81c0d360 t i915_vma_resource_fence_notify +ffffffff81c0d420 T i915_vma_resource_bind_dep_sync +ffffffff81c0d5c0 T i915_vma_resource_bind_dep_sync_all +ffffffff81c0d660 T i915_vma_resource_bind_dep_await +ffffffff81c0d840 T i915_vma_resource_module_exit +ffffffff81c0d860 T i915_vma_resource_module_init +ffffffff81c0d8c0 t get_driver_name +ffffffff81c0d8f0 t get_timeline_name +ffffffff81c0d920 t unbind_fence_release +ffffffff81c0d960 t i915_vma_resource_unbind_work +ffffffff81c0e000 T intel_clock_gating_init +ffffffff81c0e020 T intel_clock_gating_hooks_init +ffffffff81c0e280 t nop_init_clock_gating +ffffffff81c0e2b0 t pvc_init_clock_gating +ffffffff81c0e430 t dg2_init_clock_gating +ffffffff81c0e490 t xehpsdv_init_clock_gating +ffffffff81c0e570 t adlp_init_clock_gating +ffffffff81c0e670 t gen12lp_init_clock_gating +ffffffff81c0e730 t icl_init_clock_gating +ffffffff81c0e7b0 t cfl_init_clock_gating +ffffffff81c0e8d0 t gen9_init_clock_gating +ffffffff81c0e9e0 t skl_init_clock_gating +ffffffff81c0eb20 t kbl_init_clock_gating +ffffffff81c0ed30 t bxt_init_clock_gating +ffffffff81c0ee90 t glk_init_clock_gating +ffffffff81c0eef0 t bdw_init_clock_gating +ffffffff81c0f320 t chv_init_clock_gating +ffffffff81c0f4b0 t hsw_init_clock_gating +ffffffff81c0f770 t ivb_init_clock_gating +ffffffff81c0f980 t g4x_disable_trickle_feed +ffffffff81c0fad0 t cpt_init_clock_gating +ffffffff81c0fe10 t vlv_init_clock_gating +ffffffff81c0ff20 t gen6_init_clock_gating +ffffffff81c10120 t ilk_init_clock_gating +ffffffff81c10300 t g4x_init_clock_gating +ffffffff81c103c0 t i965gm_init_clock_gating +ffffffff81c10490 t i965g_init_clock_gating +ffffffff81c10510 t gen3_init_clock_gating +ffffffff81c10610 t i85x_init_clock_gating +ffffffff81c106b0 t i830_init_clock_gating +ffffffff81c11000 T intel_platform_name +ffffffff81c11090 T intel_device_info_print +ffffffff81c11a20 T intel_device_info_runtime_init_early +ffffffff81c12010 T intel_device_info_runtime_init +ffffffff81c120d0 T intel_device_info_driver_create +ffffffff81c121e0 T intel_driver_caps_print +ffffffff81c13000 T intel_memory_region_lookup +ffffffff81c130e0 T intel_memory_region_by_type +ffffffff81c131a0 T intel_memory_region_reserve +ffffffff81c131c0 T intel_memory_region_debug +ffffffff81c13220 T intel_memory_region_create +ffffffff81c133a0 T intel_memory_region_set_name +ffffffff81c13420 T intel_memory_region_avail +ffffffff81c134a0 T intel_memory_region_destroy +ffffffff81c13510 T intel_memory_regions_hw_probe +ffffffff81c13660 T intel_memory_regions_driver_release +ffffffff81c14000 T snb_pcode_read +ffffffff81c140d0 t __snb_pcode_rw +ffffffff81c14260 T snb_pcode_write_timeout +ffffffff81c14330 T skl_pcode_request +ffffffff81c14670 T intel_pcode_init +ffffffff81c147b0 T snb_pcode_read_p +ffffffff81c148c0 T snb_pcode_write_p +ffffffff81c15000 T intel_region_ttm_device_init +ffffffff81c15070 T intel_region_ttm_device_fini +ffffffff81c15090 T intel_region_to_ttm_type +ffffffff81c150d0 T intel_region_ttm_init +ffffffff81c15170 T intel_region_ttm_fini +ffffffff81c153d0 T intel_region_ttm_resource_to_rsgt +ffffffff81c15410 T intel_region_ttm_resource_free +ffffffff81c16000 T intel_runtime_pm_get_raw +ffffffff81c16090 T intel_runtime_pm_get +ffffffff81c16140 T intel_runtime_pm_get_if_in_use +ffffffff81c161f0 T intel_runtime_pm_get_if_active +ffffffff81c162a0 T intel_runtime_pm_get_noresume +ffffffff81c163d0 T intel_runtime_pm_put_raw +ffffffff81c16460 T intel_runtime_pm_put_unchecked +ffffffff81c16520 T intel_runtime_pm_enable +ffffffff81c16550 T intel_runtime_pm_disable +ffffffff81c16580 T intel_runtime_pm_driver_release +ffffffff81c16610 T intel_runtime_pm_init_early +ffffffff81c17000 T intel_sbi_read +ffffffff81c17050 t intel_sbi_rw +ffffffff81c17240 T intel_sbi_write +ffffffff81c18000 T intel_step_init +ffffffff81c184d0 T intel_step_name +ffffffff81c18510 t pvc_step_lookup +ffffffff81c19000 T gen3_stolen_base +ffffffff81c19050 T gen11_stolen_base +ffffffff81c190d0 T i830_stolen_size +ffffffff81c19150 T gen3_stolen_size +ffffffff81c191c0 T gen6_stolen_size +ffffffff81c19210 T chv_stolen_size +ffffffff81c19280 T gen8_stolen_size +ffffffff81c192e0 T gen9_stolen_size +ffffffff81c19360 T intel_init_stolen_res +ffffffff81c1a000 T intel_uncore_mmio_debug_init_early +ffffffff81c1a060 T intel_uncore_forcewake_domain_to_str +ffffffff81c1a0d0 T intel_uncore_fw_release_timer +ffffffff81c1a1f0 t fw_domains_put +ffffffff81c1a280 T intel_uncore_suspend +ffffffff81c1a2d0 t intel_uncore_forcewake_reset +ffffffff81c1a5a0 T intel_uncore_resume_early +ffffffff81c1a6d0 T intel_uncore_unclaimed_mmio +ffffffff81c1a740 T intel_uncore_runtime_resume +ffffffff81c1a770 T intel_uncore_forcewake_get +ffffffff81c1a8e0 T intel_uncore_forcewake_user_get +ffffffff81c1aa00 T intel_uncore_forcewake_get__locked +ffffffff81c1aad0 T intel_uncore_forcewake_user_put +ffffffff81c1ac10 T intel_uncore_forcewake_put__locked +ffffffff81c1ad10 T intel_uncore_forcewake_put +ffffffff81c1ae30 T intel_uncore_forcewake_put_delayed +ffffffff81c1af80 T intel_uncore_forcewake_flush +ffffffff81c1b030 T assert_forcewakes_inactive +ffffffff81c1b0a0 T assert_forcewakes_active +ffffffff81c1b0d0 T intel_uncore_setup_mmio +ffffffff81c1b100 t uncore_unmap_mmio +ffffffff81c1b130 T intel_uncore_init_early +ffffffff81c1b1a0 T intel_uncore_init_mmio +ffffffff81c1c5e0 T intel_uncore_prune_engine_fw_domains +ffffffff81c1c7c0 t fw_domain_fini +ffffffff81c1c8c0 T intel_uncore_fini_mmio +ffffffff81c1cae0 T __intel_wait_for_register_fw +ffffffff81c1cda0 T __intel_wait_for_register +ffffffff81c1d140 T intel_uncore_forcewake_for_reg +ffffffff81c1d250 t check_for_unclaimed_mmio +ffffffff81c1d3b0 T intel_uncore_arm_unclaimed_mmio_detection +ffffffff81c1d4c0 t vgpu_write8 +ffffffff81c1d500 t vgpu_write16 +ffffffff81c1d540 t vgpu_write32 +ffffffff81c1d580 t vgpu_read8 +ffffffff81c1d5c0 t vgpu_read16 +ffffffff81c1d600 t vgpu_read32 +ffffffff81c1d640 t vgpu_read64 +ffffffff81c1d680 t gen5_write8 +ffffffff81c1d780 t gen5_write16 +ffffffff81c1d880 t gen5_write32 +ffffffff81c1d980 t gen5_read8 +ffffffff81c1da70 t gen5_read16 +ffffffff81c1db60 t gen5_read32 +ffffffff81c1dc50 t gen5_read64 +ffffffff81c1dd40 t gen2_write8 +ffffffff81c1de20 t gen2_write16 +ffffffff81c1df00 t gen2_write32 +ffffffff81c1dfe0 t gen2_read8 +ffffffff81c1e0b0 t gen2_read16 +ffffffff81c1e180 t gen2_read32 +ffffffff81c1e250 t gen2_read64 +ffffffff81c1e320 t fwtable_read8 +ffffffff81c1e5e0 t fwtable_read16 +ffffffff81c1e8a0 t fwtable_read32 +ffffffff81c1eb50 t fwtable_read64 +ffffffff81c1ee00 t fwtable_reg_read_fw_domains +ffffffff81c1eef0 t fwtable_write8 +ffffffff81c1f220 t fwtable_write16 +ffffffff81c1f550 t fwtable_write32 +ffffffff81c1f880 t fwtable_reg_write_fw_domains +ffffffff81c1fa20 t gen6_write8 +ffffffff81c1fbe0 t gen6_write16 +ffffffff81c1fda0 t gen6_write32 +ffffffff81c1ff60 t gen6_reg_write_fw_domains +ffffffff81c1ff90 t i915_pmic_bus_access_notifier +ffffffff81c20010 t __fw_domain_init +ffffffff81c201a0 t fw_domains_get_with_thread_status +ffffffff81c20390 t fw_domains_get_with_fallback +ffffffff81c20610 t fw_domain_wait_ack_with_fallback +ffffffff81c208a0 t fw_domain_wait_ack_clear +ffffffff81c20a80 t fw_domain_wait_ack_set +ffffffff81c20c10 t fw_domains_get_normal +ffffffff81c20d00 t ___force_wake_auto +ffffffff81c20d90 t __gen6_gt_wait_for_fifo +ffffffff81c21000 T __intel_wakeref_get_first +ffffffff81c210b0 T __intel_wakeref_put_last +ffffffff81c21110 t ____intel_wakeref_put_last +ffffffff81c211e0 T __intel_wakeref_init +ffffffff81c21260 t __intel_wakeref_put_work +ffffffff81c212d0 T intel_wakeref_wait_for_idle +ffffffff81c21400 T intel_wakeref_auto_init +ffffffff81c21480 t wakeref_auto_timeout +ffffffff81c21530 T intel_wakeref_auto +ffffffff81c21740 T intel_wakeref_auto_fini +ffffffff81c21800 t __delayed_work_tick +ffffffff81c22000 T intel_pxp_is_supported +ffffffff81c22030 T intel_pxp_is_enabled +ffffffff81c22060 T intel_pxp_is_active +ffffffff81c22090 T intel_pxp_init +ffffffff81c220c0 T intel_pxp_fini +ffffffff81c22160 T intel_pxp_mark_termination_in_progress +ffffffff81c221a0 T intel_pxp_get_backend_timeout_ms +ffffffff81c221e0 T intel_pxp_end +ffffffff81c22210 T intel_pxp_fini_hw +ffffffff81c22250 T intel_pxp_get_readiness_status +ffffffff81c22280 T intel_pxp_start +ffffffff81c222b0 T intel_pxp_init_hw +ffffffff81c222f0 T intel_pxp_key_check +ffffffff81c22320 T intel_pxp_invalidate +ffffffff81c23000 T intel_pxp_huc_load_and_auth +ffffffff81c24000 T intel_pxp_tee_stream_message +ffffffff81c24160 T intel_pxp_tee_component_init +ffffffff81c243d0 T intel_pxp_tee_component_fini +ffffffff81c24450 T intel_pxp_tee_cmd_create_arb_session +ffffffff81c24680 T intel_pxp_tee_end_arb_fw_session +ffffffff81c24900 t i915_pxp_tee_component_bind +ffffffff81c24a70 t i915_pxp_tee_component_unbind +ffffffff81c25000 T intel_dram_detect +ffffffff81c25430 t gen11_get_dram_info +ffffffff81c25480 t bxt_get_dram_info +ffffffff81c25790 t skl_get_dram_info +ffffffff81c25970 T intel_dram_edram_detect +ffffffff81c25a00 t icl_pcode_read_mem_global_info +ffffffff81c25ae0 t skl_dram_get_channel_info +ffffffff81c25cb0 t skl_dram_get_dimm_info +ffffffff81c26000 T intel_gmch_bridge_setup +ffffffff81c260d0 t intel_gmch_bridge_release +ffffffff81c26100 T intel_gmch_bar_setup +ffffffff81c262f0 T intel_gmch_bar_teardown +ffffffff81c263e0 T intel_gmch_vga_set_state +ffffffff81c27000 T intel_detect_pch +ffffffff81c271b0 t intel_pch_match +ffffffff81c27200 t intel_pch_type +ffffffff81c279c0 t intel_virt_detect_pch +ffffffff81c28000 T vlv_iosf_sb_get +ffffffff81c28020 T vlv_iosf_sb_put +ffffffff81c28040 T vlv_punit_read +ffffffff81c28090 t vlv_sideband_rw +ffffffff81c28240 T vlv_punit_write +ffffffff81c28290 T vlv_bunit_read +ffffffff81c282e0 T vlv_bunit_write +ffffffff81c28330 T vlv_nc_read +ffffffff81c28380 T vlv_iosf_sb_read +ffffffff81c283d0 T vlv_iosf_sb_write +ffffffff81c28420 T vlv_cck_read +ffffffff81c28470 T vlv_cck_write +ffffffff81c284c0 T vlv_ccu_read +ffffffff81c28510 T vlv_ccu_write +ffffffff81c28560 T vlv_dpio_read +ffffffff81c28630 T vlv_dpio_write +ffffffff81c286a0 T vlv_flisdsi_read +ffffffff81c286f0 T vlv_flisdsi_write +ffffffff81c29000 T vlv_suspend_complete +ffffffff81c29a50 T vlv_resume_prepare +ffffffff81c2a4e0 T vlv_suspend_init +ffffffff81c2a550 T vlv_suspend_cleanup +ffffffff81c2a5b0 t vlv_wait_for_pw_status +ffffffff81c2b000 T atom_execute_table_scratch_unlocked +ffffffff81c2b0a0 t atom_execute_table_locked +ffffffff81c2b3b0 T atom_execute_table +ffffffff81c2b460 T atom_parse +ffffffff81c2b610 T atom_destroy +ffffffff81c2b650 T atom_asic_init +ffffffff81c2b860 t get_u32 +ffffffff81c2b8c0 T atom_parse_data_header +ffffffff81c2b960 T atom_parse_cmd_header +ffffffff81c2b9e0 T atom_allocate_fb_scratch +ffffffff81c2bab0 t atom_op_move +ffffffff81c2bc80 t atom_op_and +ffffffff81c2be60 t atom_op_or +ffffffff81c2c040 t atom_op_shift_left +ffffffff81c2c220 t atom_op_shift_right +ffffffff81c2c400 t atom_op_mul +ffffffff81c2c550 t atom_op_div +ffffffff81c2c6c0 t atom_op_add +ffffffff81c2c8a0 t atom_op_sub +ffffffff81c2ca80 t atom_op_setport +ffffffff81c2cc00 t atom_op_setregblock +ffffffff81c2ccc0 t atom_op_setfbbase +ffffffff81c2cd80 t atom_op_compare +ffffffff81c2cf60 t atom_op_switch +ffffffff81c2d190 t atom_op_jump +ffffffff81c2d400 t atom_op_test +ffffffff81c2d5c0 t atom_op_delay +ffffffff81c2d6a0 t atom_op_calltable +ffffffff81c2d7f0 t atom_op_repeat +ffffffff81c2d820 t atom_op_clear +ffffffff81c2d930 t atom_op_nop +ffffffff81c2d960 t atom_op_eot +ffffffff81c2d990 t atom_op_mask +ffffffff81c2dc40 t atom_op_postcard +ffffffff81c2dcf0 t atom_op_beep +ffffffff81c2dd10 t atom_op_savereg +ffffffff81c2dd40 t atom_op_restorereg +ffffffff81c2dd70 t atom_op_setdatablock +ffffffff81c2deb0 t atom_op_xor +ffffffff81c2e090 t atom_op_shl +ffffffff81c2e2b0 t atom_op_shr +ffffffff81c2e4d0 t atom_op_debug +ffffffff81c2e500 t atom_put_dst +ffffffff81c2ea10 t atom_get_src_int +ffffffff81c2f090 t atom_iio_execute +ffffffff81c30000 T atombios_crtc_dpms +ffffffff81c30300 T atombios_crtc_set_base +ffffffff81c30350 t dce4_crtc_do_set_base +ffffffff81c30e90 t avivo_crtc_do_set_base +ffffffff81c31730 T atombios_crtc_set_base_atomic +ffffffff81c31780 T radeon_atom_disp_eng_pll_init +ffffffff81c31860 t atombios_crtc_set_disp_eng_pll +ffffffff81c31970 t atombios_crtc_program_ss +ffffffff81c31c00 T atombios_crtc_mode_set +ffffffff81c32690 T radeon_atombios_init_crtc +ffffffff81c32780 t radeon_bo_reserve +ffffffff81c32900 t radeon_bo_unreserve +ffffffff81c329e0 t atombios_disable_ss +ffffffff81c32ac0 t atombios_crtc_program_pll +ffffffff81c32d70 t atombios_crtc_prepare +ffffffff81c32e30 t atombios_crtc_commit +ffffffff81c32eb0 t atombios_crtc_mode_fixup +ffffffff81c33bc0 t atombios_crtc_disable +ffffffff81c33e20 t radeon_get_shared_dp_ppll +ffffffff81c33f10 t radeon_get_shared_nondp_ppll +ffffffff81c35000 T radeon_atom_copy_swap +ffffffff81c35020 T radeon_dp_aux_init +ffffffff81c35110 t radeon_dp_aux_transfer_atom +ffffffff81c352e0 T radeon_dp_getsinktype +ffffffff81c35350 T radeon_dp_getdpcd +ffffffff81c354c0 T radeon_dp_get_panel_mode +ffffffff81c355d0 T radeon_dp_set_link_config +ffffffff81c35650 t radeon_dp_get_dp_link_config +ffffffff81c357e0 T radeon_dp_mode_valid_helper +ffffffff81c35890 T radeon_dp_needs_link_train +ffffffff81c35900 T radeon_dp_set_rx_power_state +ffffffff81c35980 T radeon_dp_link_train +ffffffff81c36100 t radeon_process_aux_ch +ffffffff81c362b0 t dp_get_adjust_train +ffffffff81c37000 T atombios_get_backlight_level +ffffffff81c37070 T atombios_set_backlight_level +ffffffff81c37220 T atombios_dig_transmitter_setup +ffffffff81c37240 T radeon_atom_backlight_init +ffffffff81c37420 t radeon_atom_backlight_get_brightness +ffffffff81c37480 T atombios_dvo_setup +ffffffff81c37640 T atombios_digital_setup +ffffffff81c37900 T atombios_get_encoder_mode +ffffffff81c37b90 T atombios_dig_encoder_setup2 +ffffffff81c37fd0 T atombios_dig_encoder_setup +ffffffff81c37ff0 T atombios_dig_transmitter_setup2 +ffffffff81c389d0 T atombios_set_edp_panel_power +ffffffff81c38ae0 T radeon_atom_release_dig_encoder +ffffffff81c38b20 T radeon_atom_pick_dig_encoder +ffffffff81c38d40 T radeon_atom_encoder_init +ffffffff81c38e10 t atombios_external_encoder_setup +ffffffff81c39080 T radeon_atom_ext_encoder_setup_ddc +ffffffff81c390d0 T radeon_enc_destroy +ffffffff81c39180 T radeon_add_atom_encoder +ffffffff81c39590 t radeon_atombios_set_dig_info +ffffffff81c39600 t radeon_atombios_set_dac_info +ffffffff81c39670 t radeon_atom_backlight_update_status +ffffffff81c396d0 t radeon_atom_encoder_dpms +ffffffff81c39970 t radeon_atom_mode_fixup +ffffffff81c39ab0 t radeon_atom_encoder_prepare +ffffffff81c39f90 t radeon_atom_encoder_commit +ffffffff81c39fc0 t radeon_atom_encoder_mode_set +ffffffff81c3a570 t radeon_atom_dig_detect +ffffffff81c3a680 t radeon_atom_encoder_disable +ffffffff81c3a910 t radeon_atom_encoder_dpms_avivo +ffffffff81c3ab40 t radeon_atom_encoder_dpms_dig +ffffffff81c3b080 t atombios_dac_setup +ffffffff81c3b160 t radeon_atom_dac_detect +ffffffff81c3b350 t radeon_atom_ext_dpms +ffffffff81c3b380 t radeon_atom_ext_prepare +ffffffff81c3b3b0 t radeon_atom_ext_commit +ffffffff81c3b3e0 t radeon_atom_ext_mode_set +ffffffff81c3b410 t radeon_atom_ext_disable +ffffffff81c3c000 T radeon_atom_hw_i2c_xfer +ffffffff81c3c140 t radeon_process_i2c_ch +ffffffff81c3c310 T radeon_atom_hw_i2c_func +ffffffff81c3d000 T btc_get_max_clock_from_voltage_dependency_table +ffffffff81c3d0d0 T btc_apply_voltage_dependency_rules +ffffffff81c3d140 T btc_skip_blacklist_clocks +ffffffff81c3d230 T btc_adjust_clock_combinations +ffffffff81c3d360 T btc_apply_voltage_delta_rules +ffffffff81c3d480 T btc_program_mgcg_hw_sequence +ffffffff81c3d580 T btc_dpm_enabled +ffffffff81c3d590 T btc_notify_uvd_to_smc +ffffffff81c3d600 T btc_reset_to_default +ffffffff81c3d650 T btc_read_arb_registers +ffffffff81c3d6e0 T btc_dpm_vblank_too_short +ffffffff81c3d750 T btc_dpm_pre_set_power_state +ffffffff81c3e970 T btc_dpm_set_power_state +ffffffff81c3eca0 t btc_set_power_state_conditionally_enable_ulv +ffffffff81c3edd0 T btc_dpm_post_set_power_state +ffffffff81c3eef0 t btc_update_current_ps +ffffffff81c3eff0 T btc_dpm_enable +ffffffff81c3fed0 t btc_cg_clock_gating_enable +ffffffff81c40000 t btc_mg_clock_gating_enable +ffffffff81c40120 t btc_ls_clock_gating_enable +ffffffff81c40250 t btc_init_stutter_mode +ffffffff81c402d0 T btc_dpm_disable +ffffffff81c405b0 T btc_dpm_setup_asic +ffffffff81c40690 T btc_dpm_init +ffffffff81c40a80 T btc_dpm_fini +ffffffff81c40b30 T btc_dpm_debugfs_print_current_performance_level +ffffffff81c40b80 T btc_dpm_get_current_sclk +ffffffff81c40c00 T btc_dpm_get_current_mclk +ffffffff81c40c80 T btc_dpm_get_sclk +ffffffff81c40cd0 T btc_dpm_get_mclk +ffffffff81c41000 T ci_dpm_powergate_uvd +ffffffff81c41380 T ci_dpm_vblank_too_short +ffffffff81c41410 T ci_fan_ctrl_get_fan_speed_percent +ffffffff81c414b0 T ci_fan_ctrl_set_fan_speed_percent +ffffffff81c41580 T ci_fan_ctrl_set_mode +ffffffff81c41720 t ci_fan_ctrl_set_static_mode +ffffffff81c417e0 t ci_thermal_start_smc_fan_control +ffffffff81c41a20 T ci_fan_ctrl_get_mode +ffffffff81c41a80 T ci_dpm_force_performance_level +ffffffff81c42310 t ci_upload_dpm_level_enable_mask +ffffffff81c42640 T ci_dpm_pre_set_power_state +ffffffff81c42930 T ci_dpm_post_set_power_state +ffffffff81c42a00 T ci_dpm_setup_asic +ffffffff81c42c00 T ci_dpm_enable +ffffffff81c444d0 t ci_init_smc_table +ffffffff81c453b0 t ci_init_arb_table_index +ffffffff81c45440 t ci_populate_initial_mc_reg_table +ffffffff81c45730 t ci_populate_pm_base +ffffffff81c45a90 t ci_dpm_start_smc +ffffffff81c45b10 t ci_enable_vr_hot_gpio_interrupt +ffffffff81c45bb0 t ci_notify_smc_display_change +ffffffff81c45c80 t ci_enable_sclk_control +ffffffff81c45cb0 t ci_enable_ulv +ffffffff81c45e00 t ci_enable_ds_master_switch +ffffffff81c45ff0 t ci_start_dpm +ffffffff81c461e0 t ci_enable_didt +ffffffff81c46490 t ci_enable_smc_cac +ffffffff81c46620 t ci_enable_power_containment +ffffffff81c46aa0 t ci_power_control_set_level +ffffffff81c46bb0 t ci_enable_auto_throttle_source +ffffffff81c46c90 t ci_enable_thermal_based_sclk_dpm +ffffffff81c46de0 t ci_thermal_start_thermal_controller +ffffffff81c470e0 T ci_dpm_late_enable +ffffffff81c47180 T ci_dpm_disable +ffffffff81c47870 T ci_dpm_set_power_state +ffffffff81c484e0 t ci_update_sclk_t +ffffffff81c48550 t ci_update_and_upload_mc_reg_table +ffffffff81c487d0 t ci_unfreeze_sclk_mclk_dpm +ffffffff81c48980 t ci_notify_link_speed_change_after_state_change +ffffffff81c48ab0 T ci_dpm_display_configuration_changed +ffffffff81c48c40 T ci_dpm_fini +ffffffff81c48cf0 T ci_dpm_init +ffffffff81c49b50 t ci_initialize_powertune_defaults +ffffffff81c49c40 t ci_get_leakage_voltages +ffffffff81c49df0 t ci_patch_dependency_tables_with_leakage +ffffffff81c4a460 t ci_set_private_data_variables_based_on_pptable +ffffffff81c4a570 T ci_dpm_debugfs_print_current_performance_level +ffffffff81c4a6b0 T ci_dpm_print_power_state +ffffffff81c4a770 T ci_dpm_get_current_sclk +ffffffff81c4a840 T ci_dpm_get_current_mclk +ffffffff81c4a910 T ci_dpm_get_sclk +ffffffff81c4a960 T ci_dpm_get_mclk +ffffffff81c4a9b0 t ci_set_valid_flag +ffffffff81c4aa50 t ci_populate_all_graphic_levels +ffffffff81c4afe0 t ci_populate_all_memory_levels +ffffffff81c4b8d0 t ci_populate_smc_vce_level +ffffffff81c4b9e0 t ci_populate_smc_acp_level +ffffffff81c4bad0 t ci_populate_smc_samu_level +ffffffff81c4bbc0 t ci_do_program_memory_timing_parameters +ffffffff81c4bde0 t ci_populate_smc_uvd_level +ffffffff81c4bf20 t ci_populate_smc_initial_state +ffffffff81c4bfc0 t ci_populate_bapm_parameters_in_dpm_table +ffffffff81c4c140 t ci_populate_smc_voltage_table +ffffffff81c4c260 t ci_min_max_v_gnbl_pm_lid_from_bapm_vddc +ffffffff81c4c4c0 t ci_enable_sclk_mclk_dpm +ffffffff81c4c830 t ci_thermal_enable_alert +ffffffff81c4c9e0 t ci_enable_vce_dpm +ffffffff81c4d000 T ci_copy_bytes_to_smc +ffffffff81c4d240 T ci_start_smc +ffffffff81c4d280 T ci_reset_smc +ffffffff81c4d2c0 T ci_program_jump_on_start +ffffffff81c4d2f0 T ci_stop_smc_clock +ffffffff81c4d330 T ci_start_smc_clock +ffffffff81c4d370 T ci_is_smc_running +ffffffff81c4d3e0 T ci_load_smc_ucode +ffffffff81c4d570 T ci_read_smc_sram_dword +ffffffff81c4d640 T ci_write_smc_sram_dword +ffffffff81c4e000 T cik_get_allowed_info_register +ffffffff81c4e0a0 T cik_didt_rreg +ffffffff81c4e140 T cik_didt_wreg +ffffffff81c4e1c0 T ci_get_temp +ffffffff81c4e210 T kv_get_temp +ffffffff81c4e260 T cik_pciep_rreg +ffffffff81c4e2e0 T cik_pciep_wreg +ffffffff81c4e350 T cik_get_xclk +ffffffff81c4e3c0 T cik_mm_rdoorbell +ffffffff81c4e420 T cik_mm_wdoorbell +ffffffff81c4e470 T ci_mc_load_microcode +ffffffff81c4e7b0 T cik_ring_test +ffffffff81c4ea50 T cik_fence_gfx_ring_emit +ffffffff81c4ee40 T cik_fence_compute_ring_emit +ffffffff81c4f0c0 T cik_semaphore_ring_emit +ffffffff81c4f280 T cik_copy_cpdma +ffffffff81c4f6d0 T cik_ring_ib_execute +ffffffff81c4fc70 T cik_ib_test +ffffffff81c4ff50 T cik_gfx_get_rptr +ffffffff81c4ffb0 T cik_gfx_get_wptr +ffffffff81c4fff0 T cik_gfx_set_wptr +ffffffff81c50030 T cik_compute_get_rptr +ffffffff81c50110 T cik_compute_get_wptr +ffffffff81c501f0 T cik_compute_set_wptr +ffffffff81c50270 T cik_gpu_check_soft_reset +ffffffff81c503e0 T cik_asic_reset +ffffffff81c50890 t cik_gpu_pci_config_reset +ffffffff81c510a0 T cik_gfx_is_lockup +ffffffff81c51110 T cik_pcie_gart_tlb_flush +ffffffff81c51160 T cik_ib_parse +ffffffff81c51190 T cik_vm_init +ffffffff81c511f0 T cik_vm_fini +ffffffff81c51220 T cik_vm_flush +ffffffff81c51e90 T cik_enter_rlc_safe_mode +ffffffff81c51f80 T cik_exit_rlc_safe_mode +ffffffff81c51fc0 T cik_update_cg +ffffffff81c524c0 t cik_enable_mgcg +ffffffff81c529e0 t cik_enable_cgcg +ffffffff81c52d50 T cik_init_cp_pg_table +ffffffff81c52fe0 T cik_get_csb_size +ffffffff81c53070 T cik_get_csb_buffer +ffffffff81c53200 T cik_irq_set +ffffffff81c53f80 t cik_disable_interrupt_state +ffffffff81c54440 T cik_irq_process +ffffffff81c55c10 t cik_irq_ack +ffffffff81c56590 T cik_resume +ffffffff81c56620 t cik_init_golden_registers +ffffffff81c567e0 t cik_startup +ffffffff81c595d0 T cik_suspend +ffffffff81c599c0 T cik_init +ffffffff81c59ef0 t cik_init_microcode +ffffffff81c5ac40 t cik_uvd_init +ffffffff81c5acf0 t cik_vce_init +ffffffff81c5adc0 t cik_cp_fini +ffffffff81c5ae40 t cik_irq_fini +ffffffff81c5af50 t cik_mec_fini +ffffffff81c5b000 t cik_pcie_gart_fini +ffffffff81c5b100 T cik_fini +ffffffff81c5b420 T dce8_program_fmt +ffffffff81c5b550 T dce8_bandwidth_update +ffffffff81c5c160 T cik_get_gpu_clock_counter +ffffffff81c5c220 T cik_set_uvd_clocks +ffffffff81c5c2a0 t cik_set_uvd_clock +ffffffff81c5c410 T cik_set_vce_clocks +ffffffff81c5c650 t cik_wait_for_rlc_serdes +ffffffff81c5c810 t cik_mec_init +ffffffff81c5ca00 t cik_uvd_start +ffffffff81c5caf0 t cik_vce_start +ffffffff81c5cc10 t cik_irq_init +ffffffff81c5d790 t cik_cp_resume +ffffffff81c5ef40 t cik_uvd_resume +ffffffff81c5f010 t cik_vce_resume +ffffffff81c5f110 t pcie_capability_set_word +ffffffff81c5f220 t pcie_capability_read_word +ffffffff81c5f2c0 t pcie_capability_clear_and_set_word +ffffffff81c5f3e0 t pcie_capability_write_word +ffffffff81c5f4a0 t cik_get_cu_active_bitmap +ffffffff81c5f620 t radeon_bo_reserve +ffffffff81c5f7a0 t radeon_bo_unreserve +ffffffff81c5f880 t cik_update_gfx_pg +ffffffff81c5fa20 t cik_compute_stop +ffffffff81c5fb90 t cik_cp_compute_fini +ffffffff81c5fd30 t request_firmware +ffffffff81c5fdc0 t release_firmware +ffffffff81c5fe00 t dce8_latency_watermark +ffffffff81c61000 T cik_sdma_get_rptr +ffffffff81c61070 T cik_sdma_get_wptr +ffffffff81c610c0 T cik_sdma_set_wptr +ffffffff81c61110 T cik_sdma_ring_ib_execute +ffffffff81c61510 T cik_sdma_fence_ring_emit +ffffffff81c616e0 t cik_sdma_hdp_flush_ring_emit +ffffffff81c61910 T cik_sdma_semaphore_ring_emit +ffffffff81c61a30 T cik_sdma_enable +ffffffff81c61c10 T cik_sdma_resume +ffffffff81c620f0 T cik_sdma_fini +ffffffff81c62130 T cik_copy_dma +ffffffff81c62530 T cik_sdma_ring_test +ffffffff81c627e0 T cik_sdma_ib_test +ffffffff81c62a40 T cik_sdma_is_lockup +ffffffff81c62ac0 T cik_sdma_vm_copy_pages +ffffffff81c62bd0 T cik_sdma_vm_write_pages +ffffffff81c62d40 T cik_sdma_vm_set_pages +ffffffff81c62ec0 T cik_sdma_vm_pad_ib +ffffffff81c62f10 T cik_dma_vm_flush +ffffffff81c64000 T cypress_enable_spread_spectrum +ffffffff81c64140 T cypress_start_dpm +ffffffff81c64190 T cypress_enable_sclk_control +ffffffff81c641f0 T cypress_enable_mclk_control +ffffffff81c64250 T cypress_notify_smc_display_change +ffffffff81c642a0 T cypress_program_response_times +ffffffff81c64360 T cypress_advertise_gen2_capability +ffffffff81c64430 T cypress_notify_link_speed_change_after_state_change +ffffffff81c644f0 T cypress_notify_link_speed_change_before_state_change +ffffffff81c645b0 T cypress_get_strobe_mode_settings +ffffffff81c646b0 T cypress_get_mclk_frequency_ratio +ffffffff81c64760 T cypress_map_clkf_to_ibias +ffffffff81c64820 T cypress_convert_power_level_to_smc +ffffffff81c64c00 t cypress_populate_mclk_value +ffffffff81c65010 T cypress_upload_sw_state +ffffffff81c65190 T cypress_upload_mc_reg_table +ffffffff81c65250 t cypress_convert_mc_reg_table_to_smc +ffffffff81c65670 T cypress_calculate_burst_time +ffffffff81c65700 T cypress_program_memory_timing_parameters +ffffffff81c658a0 T cypress_populate_smc_initial_state +ffffffff81c65c50 T cypress_populate_smc_acpi_state +ffffffff81c65fd0 T cypress_construct_voltage_tables +ffffffff81c66160 T cypress_populate_smc_voltage_tables +ffffffff81c66290 T cypress_get_mvdd_configuration +ffffffff81c66360 T cypress_populate_mc_reg_table +ffffffff81c666a0 T cypress_get_table_locations +ffffffff81c66780 T cypress_enable_display_gap +ffffffff81c667e0 T cypress_dpm_setup_asic +ffffffff81c668d0 T cypress_dpm_enable +ffffffff81c673a0 t cypress_force_mc_use_s1 +ffffffff81c67620 t cypress_gfx_clock_gating_enable +ffffffff81c67930 t cypress_mg_clock_gating_enable +ffffffff81c67bb0 T cypress_dpm_disable +ffffffff81c67de0 T cypress_dpm_set_power_state +ffffffff81c68020 T cypress_dpm_display_configuration_changed +ffffffff81c68100 T cypress_dpm_init +ffffffff81c68370 T cypress_dpm_fini +ffffffff81c68400 T cypress_dpm_vblank_too_short +ffffffff81c68470 t cypress_wait_for_mc_sequencer +ffffffff81c69000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81c69070 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81c690e0 T dce3_2_afmt_write_sad_regs +ffffffff81c691e0 T dce3_2_audio_set_dto +ffffffff81c69320 T dce3_2_hdmi_update_acr +ffffffff81c69680 T dce3_2_set_audio_packet +ffffffff81c69810 T dce3_2_set_mute +ffffffff81c6a000 T dce6_endpoint_rreg +ffffffff81c6a0e0 T dce6_endpoint_wreg +ffffffff81c6a1d0 T dce6_audio_get_pin +ffffffff81c6a360 T dce6_afmt_select_pin +ffffffff81c6a3f0 T dce6_afmt_write_latency_fields +ffffffff81c6a4b0 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81c6a580 T dce6_afmt_dp_write_speaker_allocation +ffffffff81c6a650 T dce6_afmt_write_sad_regs +ffffffff81c6a790 T dce6_audio_enable +ffffffff81c6a7e0 T dce6_hdmi_audio_set_dto +ffffffff81c6a850 T dce6_dp_audio_set_dto +ffffffff81c6b000 T eg_cg_rreg +ffffffff81c6b080 T eg_cg_wreg +ffffffff81c6b0f0 T eg_pif_phy0_rreg +ffffffff81c6b170 T eg_pif_phy0_wreg +ffffffff81c6b1d0 T eg_pif_phy1_rreg +ffffffff81c6b250 T eg_pif_phy1_wreg +ffffffff81c6b2b0 T evergreen_get_allowed_info_register +ffffffff81c6b340 T evergreen_tiling_fields +ffffffff81c6b3e0 T sumo_set_uvd_clocks +ffffffff81c6b4c0 t sumo_set_uvd_clock +ffffffff81c6b6b0 T evergreen_set_uvd_clocks +ffffffff81c6bc30 T evergreen_fix_pci_max_read_req_size +ffffffff81c6bdf0 T dce4_program_fmt +ffffffff81c6bf10 T dce4_wait_for_vblank +ffffffff81c6c190 T evergreen_page_flip +ffffffff81c6c320 T evergreen_page_flip_pending +ffffffff81c6c390 T evergreen_get_temp +ffffffff81c6c460 T sumo_get_temp +ffffffff81c6c4b0 T sumo_pm_init_profile +ffffffff81c6c5f0 T btc_pm_init_profile +ffffffff81c6c700 T evergreen_pm_misc +ffffffff81c6c8a0 T evergreen_pm_prepare +ffffffff81c6c9a0 T evergreen_pm_finish +ffffffff81c6caa0 T evergreen_hpd_sense +ffffffff81c6cb10 T evergreen_hpd_set_polarity +ffffffff81c6cc50 T evergreen_hpd_init +ffffffff81c6cd20 T evergreen_hpd_fini +ffffffff81c6cdc0 T evergreen_get_number_of_dram_channels +ffffffff81c6ce10 T evergreen_bandwidth_update +ffffffff81c6cfd0 t evergreen_line_buffer_adjust +ffffffff81c6d1c0 t evergreen_program_watermarks +ffffffff81c6dc20 T evergreen_mc_wait_for_idle +ffffffff81c6dcc0 T evergreen_pcie_gart_tlb_flush +ffffffff81c6dd90 T evergreen_mc_stop +ffffffff81c6e890 T evergreen_mc_resume +ffffffff81c6efa0 T evergreen_mc_program +ffffffff81c6f3a0 T evergreen_ring_ib_execute +ffffffff81c6f830 T evergreen_mc_init +ffffffff81c6f970 T evergreen_print_gpu_status_regs +ffffffff81c6f9c0 T evergreen_is_display_hung +ffffffff81c6fbc0 T evergreen_gpu_check_soft_reset +ffffffff81c6fd20 T evergreen_gpu_pci_config_reset +ffffffff81c6fea0 T evergreen_asic_reset +ffffffff81c70210 T evergreen_gfx_is_lockup +ffffffff81c70280 T sumo_rlc_fini +ffffffff81c70440 t radeon_bo_reserve +ffffffff81c705c0 t radeon_bo_unreserve +ffffffff81c706a0 T sumo_rlc_init +ffffffff81c70e80 T evergreen_rlc_resume +ffffffff81c711f0 T evergreen_get_vblank_counter +ffffffff81c71260 T evergreen_disable_interrupt_state +ffffffff81c71530 T evergreen_irq_set +ffffffff81c71af0 T evergreen_irq_suspend +ffffffff81c71b40 T evergreen_irq_process +ffffffff81c726a0 t evergreen_irq_ack +ffffffff81c72d60 T evergreen_resume +ffffffff81c72e40 t evergreen_init_golden_registers +ffffffff81c73050 t evergreen_startup +ffffffff81c748e0 T evergreen_suspend +ffffffff81c74a80 T evergreen_init +ffffffff81c74ea0 t evergreen_pcie_gart_fini +ffffffff81c74fc0 T evergreen_fini +ffffffff81c751b0 T evergreen_pcie_gen2_enable +ffffffff81c753e0 T evergreen_program_aspm +ffffffff81c75a70 t evergreen_latency_watermark +ffffffff81c75c70 t evergreen_uvd_start +ffffffff81c75d30 t evergreen_cp_load_microcode +ffffffff81c75e90 t evergreen_cp_resume +ffffffff81c76b00 t evergreen_uvd_resume +ffffffff81c77000 T evergreen_cs_parse +ffffffff81c797b0 T evergreen_dma_cs_parse +ffffffff81c7a960 T evergreen_ib_parse +ffffffff81c7adc0 T evergreen_dma_ib_parse +ffffffff81c7af90 t evergreen_cs_track_check +ffffffff81c7c030 t evergreen_cs_handle_reg +ffffffff81c7dec0 t evergreen_surface_value_conv_check +ffffffff81c7e1a0 t evergreen_surface_check +ffffffff81c7e620 t evergreen_cs_track_validate_htile +ffffffff81c7e8d0 t evergreen_vm_reg_valid +ffffffff81c7f000 T evergreen_dma_fence_ring_emit +ffffffff81c7f2b0 T evergreen_dma_ring_ib_execute +ffffffff81c7f600 T evergreen_copy_dma +ffffffff81c7f9a0 T evergreen_dma_is_lockup +ffffffff81c80000 T dce4_audio_enable +ffffffff81c80080 T evergreen_hdmi_update_acr +ffffffff81c802a0 T dce4_afmt_write_latency_fields +ffffffff81c80310 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c80380 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c803f0 T evergreen_hdmi_write_sad_regs +ffffffff81c804f0 T evergreen_set_avi_packet +ffffffff81c80690 T dce4_hdmi_audio_set_dto +ffffffff81c80770 T dce4_dp_audio_set_dto +ffffffff81c80860 T dce4_set_vbi_packet +ffffffff81c808d0 T dce4_hdmi_set_color_depth +ffffffff81c80a20 T dce4_set_audio_packet +ffffffff81c80c30 T dce4_set_mute +ffffffff81c80d40 T evergreen_hdmi_enable +ffffffff81c81070 T evergreen_dp_enable +ffffffff81c82000 T kv_dpm_enable_bapm +ffffffff81c82070 T kv_dpm_enable +ffffffff81c82f70 t kv_populate_vce_table +ffffffff81c831f0 t kv_populate_samu_table +ffffffff81c83450 t kv_populate_acp_table +ffffffff81c835e0 t kv_start_am +ffffffff81c83620 t kv_enable_auto_thermal_throttling +ffffffff81c83660 t kv_enable_dpm_voltage_scaling +ffffffff81c836a0 t kv_set_dpm_interval +ffffffff81c836e0 t kv_start_dpm +ffffffff81c83720 t kv_enable_didt +ffffffff81c839d0 T kv_dpm_late_enable +ffffffff81c83bd0 T kv_dpm_powergate_uvd +ffffffff81c83d50 T kv_dpm_disable +ffffffff81c840c0 T kv_dpm_force_performance_level +ffffffff81c84240 t kv_force_dpm_lowest +ffffffff81c84310 T kv_dpm_pre_set_power_state +ffffffff81c84890 T kv_dpm_set_power_state +ffffffff81c85060 t kv_set_valid_clock_range +ffffffff81c85200 t kv_calculate_ds_divider +ffffffff81c85370 t kv_calculate_nbps_level_settings +ffffffff81c854f0 t kv_update_vce_dpm +ffffffff81c856d0 T kv_dpm_post_set_power_state +ffffffff81c85770 T kv_dpm_setup_asic +ffffffff81c857d0 T kv_dpm_init +ffffffff81c86080 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c860f0 T kv_dpm_get_current_sclk +ffffffff81c86160 T kv_dpm_get_current_mclk +ffffffff81c86190 T kv_dpm_print_power_state +ffffffff81c86230 T kv_dpm_fini +ffffffff81c862d0 T kv_dpm_display_configuration_changed +ffffffff81c86300 T kv_dpm_get_sclk +ffffffff81c86350 T kv_dpm_get_mclk +ffffffff81c87000 T kv_notify_message_to_smu +ffffffff81c870c0 T kv_dpm_get_enable_mask +ffffffff81c87190 T kv_send_msg_to_smc_with_parameter +ffffffff81c87260 T kv_read_smc_sram_dword +ffffffff81c872f0 T kv_smc_dpm_enable +ffffffff81c87420 T kv_smc_bapm_enable +ffffffff81c87550 T kv_copy_bytes_to_smc +ffffffff81c88000 T tn_smc_rreg +ffffffff81c88080 T tn_smc_wreg +ffffffff81c880f0 T ni_mc_load_microcode +ffffffff81c882e0 T ni_init_microcode +ffffffff81c887b0 t request_firmware +ffffffff81c88840 t release_firmware +ffffffff81c88880 T cayman_get_allowed_info_register +ffffffff81c88910 T tn_get_temp +ffffffff81c889a0 T cayman_pcie_gart_tlb_flush +ffffffff81c889f0 T cayman_cp_int_cntl_setup +ffffffff81c88a40 T cayman_fence_ring_emit +ffffffff81c88dd0 T cayman_ring_ib_execute +ffffffff81c89230 T cayman_gfx_get_rptr +ffffffff81c892c0 T cayman_gfx_get_wptr +ffffffff81c89330 T cayman_gfx_set_wptr +ffffffff81c893b0 T cayman_gpu_check_soft_reset +ffffffff81c89540 T cayman_asic_reset +ffffffff81c89850 T cayman_gfx_is_lockup +ffffffff81c898c0 T cayman_resume +ffffffff81c89950 t ni_init_golden_registers +ffffffff81c89a30 t cayman_startup +ffffffff81c8ae70 T cayman_suspend +ffffffff81c8b060 T cayman_init +ffffffff81c8b3d0 t cayman_uvd_init +ffffffff81c8b480 t cayman_vce_init +ffffffff81c8b550 t cayman_cp_fini +ffffffff81c8b5d0 t cayman_pcie_gart_fini +ffffffff81c8b710 T cayman_fini +ffffffff81c8b990 T cayman_vm_init +ffffffff81c8b9f0 T cayman_vm_fini +ffffffff81c8ba20 T cayman_vm_decode_fault +ffffffff81c8bab0 T cayman_vm_flush +ffffffff81c8bf10 T tn_set_vce_clocks +ffffffff81c8c170 t cayman_uvd_start +ffffffff81c8c230 t cayman_vce_start +ffffffff81c8c350 t cayman_cp_load_microcode +ffffffff81c8c4e0 t cayman_cp_resume +ffffffff81c8d3a0 t cayman_uvd_resume +ffffffff81c8d470 t cayman_vce_resume +ffffffff81c8e000 T cayman_dma_get_rptr +ffffffff81c8e070 T cayman_dma_get_wptr +ffffffff81c8e0c0 T cayman_dma_set_wptr +ffffffff81c8e110 T cayman_dma_ring_ib_execute +ffffffff81c8e4a0 T cayman_dma_stop +ffffffff81c8e550 T cayman_dma_resume +ffffffff81c8e7b0 T cayman_dma_fini +ffffffff81c8e870 T cayman_dma_is_lockup +ffffffff81c8e8f0 T cayman_dma_vm_copy_pages +ffffffff81c8e9f0 T cayman_dma_vm_write_pages +ffffffff81c8eb50 T cayman_dma_vm_set_pages +ffffffff81c8ecc0 T cayman_dma_vm_pad_ib +ffffffff81c8ed10 T cayman_dma_vm_flush +ffffffff81c90000 T ni_get_pi +ffffffff81c90030 T ni_get_ps +ffffffff81c90060 T ni_dpm_vblank_too_short +ffffffff81c900d0 T ni_dpm_force_performance_level +ffffffff81c90220 T ni_copy_and_switch_arb_sets +ffffffff81c904f0 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c90570 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c905f0 T ni_dpm_setup_asic +ffffffff81c90800 T ni_update_current_ps +ffffffff81c908c0 T ni_update_requested_ps +ffffffff81c90980 T ni_dpm_enable +ffffffff81c917e0 t ni_init_smc_table +ffffffff81c92180 t ni_init_smc_spll_table +ffffffff81c922f0 t ni_init_arb_table_index +ffffffff81c92390 t ni_populate_mc_reg_table +ffffffff81c928a0 t ni_initialize_smc_cac_tables +ffffffff81c93b30 t ni_initialize_hardware_cac_manager +ffffffff81c94060 t ni_populate_smc_tdp_limits +ffffffff81c94210 t ni_program_response_times +ffffffff81c94320 T ni_dpm_disable +ffffffff81c946e0 t ni_enable_power_containment +ffffffff81c947a0 t ni_enable_smc_cac +ffffffff81c948c0 T ni_dpm_pre_set_power_state +ffffffff81c94ea0 T ni_dpm_set_power_state +ffffffff81c95190 t ni_upload_sw_state +ffffffff81c95d70 t ni_upload_mc_reg_table +ffffffff81c95fd0 t ni_power_control_set_level +ffffffff81c960a0 T ni_dpm_post_set_power_state +ffffffff81c96170 T ni_dpm_init +ffffffff81c96b10 T ni_dpm_fini +ffffffff81c96bc0 T ni_dpm_print_power_state +ffffffff81c96c90 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c96cd0 T ni_dpm_get_current_sclk +ffffffff81c96d40 T ni_dpm_get_current_mclk +ffffffff81c96db0 T ni_dpm_get_sclk +ffffffff81c96e10 T ni_dpm_get_mclk +ffffffff81c96e70 t ni_do_program_memory_timing_parameters +ffffffff81c96fb0 t ni_calculate_sclk_params +ffffffff81c971e0 t ni_calculate_power_boost_limit +ffffffff81c97370 t ni_populate_mclk_value +ffffffff81c98000 T r100_wait_for_vblank +ffffffff81c98190 T r100_page_flip +ffffffff81c98450 T r100_page_flip_pending +ffffffff81c98500 T r100_pm_get_dynpm_state +ffffffff81c98720 T r100_pm_init_profile +ffffffff81c98800 T r100_pm_misc +ffffffff81c98c40 T r100_pm_prepare +ffffffff81c98cf0 T r100_pm_finish +ffffffff81c98da0 T r100_gui_idle +ffffffff81c98de0 T r100_hpd_sense +ffffffff81c98e40 T r100_hpd_set_polarity +ffffffff81c98f00 T r100_hpd_init +ffffffff81c98fa0 T r100_hpd_fini +ffffffff81c99010 T r100_pci_gart_tlb_flush +ffffffff81c99040 T r100_pci_gart_init +ffffffff81c99110 T r100_pci_gart_get_page_entry +ffffffff81c99140 T r100_pci_gart_set_page +ffffffff81c99180 T r100_pci_gart_enable +ffffffff81c99270 T r100_pci_gart_disable +ffffffff81c992f0 T r100_pci_gart_fini +ffffffff81c99370 T r100_irq_set +ffffffff81c99450 T r100_irq_disable +ffffffff81c994c0 T r100_irq_process +ffffffff81c997c0 T r100_get_vblank_counter +ffffffff81c99810 T r100_fence_ring_emit +ffffffff81c99c70 T r100_semaphore_ring_emit +ffffffff81c99ca0 T r100_copy_blit +ffffffff81c9a330 T r100_ring_start +ffffffff81c9a420 T r100_gfx_get_rptr +ffffffff81c9a480 T r100_gfx_get_wptr +ffffffff81c9a4c0 T r100_gfx_set_wptr +ffffffff81c9a500 T r100_cp_init +ffffffff81c9aa30 T r100_debugfs_cp_init +ffffffff81c9aa60 T r100_cp_fini +ffffffff81c9ab00 T r100_cp_disable +ffffffff81c9ac40 T r100_gui_wait_for_idle +ffffffff81c9ad30 T r100_reloc_pitch_offset +ffffffff81c9ae70 T r100_packet3_load_vbpntr +ffffffff81c9b110 T r100_cs_parse_packet0 +ffffffff81c9b220 T r100_cs_packet_parse_vline +ffffffff81c9b430 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c9b4b0 T r100_cs_parse +ffffffff81c9c6a0 T r100_cs_track_clear +ffffffff81c9ca30 T r100_cs_track_check +ffffffff81c9d250 T r100_mc_wait_for_idle +ffffffff81c9d2f0 T r100_gpu_is_lockup +ffffffff81c9d350 T r100_enable_bm +ffffffff81c9d3a0 T r100_bm_disable +ffffffff81c9d450 T r100_asic_reset +ffffffff81c9d780 T r100_mc_stop +ffffffff81c9d940 T r100_mc_resume +ffffffff81c9da00 T r100_set_common_regs +ffffffff81c9dba0 T r100_vram_init_sizes +ffffffff81c9dd90 T r100_vga_set_state +ffffffff81c9ddf0 T r100_pll_errata_after_index +ffffffff81c9de30 T r100_pll_rreg +ffffffff81c9df60 T r100_pll_wreg +ffffffff81c9e070 T r100_debugfs_rbbm_init +ffffffff81c9e0a0 T r100_debugfs_mc_info_init +ffffffff81c9e0d0 T r100_set_surface_reg +ffffffff81c9e2e0 T r100_clear_surface_reg +ffffffff81c9e390 T r100_bandwidth_update +ffffffff81c9ede0 T r100_ring_test +ffffffff81c9f090 T r100_ring_ib_execute +ffffffff81c9f2f0 T r100_ib_test +ffffffff81c9f630 T r100_vga_render_disable +ffffffff81c9f690 T r100_resume +ffffffff81c9f890 t r100_startup +ffffffff81c9fdd0 T r100_suspend +ffffffff81c9feb0 T r100_fini +ffffffff81c9ffc0 T r100_restore_sanity +ffffffff81ca0060 T r100_init +ffffffff81ca04c0 t r100_set_safe_registers +ffffffff81ca0540 T r100_mm_rreg_slow +ffffffff81ca05c0 T r100_mm_wreg_slow +ffffffff81ca0620 T r100_io_rreg +ffffffff81ca06c0 T r100_io_wreg +ffffffff81ca0730 t r100_get_vtx_size +ffffffff81ca0820 t r100_cs_track_texture_print +ffffffff81ca1000 T r200_copy_dma +ffffffff81ca1470 T r200_packet0_check +ffffffff81ca2240 t r200_get_vtx_size_0 +ffffffff81ca2400 t r200_get_vtx_size_1 +ffffffff81ca2490 T r200_set_safe_registers +ffffffff81ca3000 T rv370_pcie_rreg +ffffffff81ca3080 T rv370_pcie_wreg +ffffffff81ca30f0 T rv370_pcie_gart_tlb_flush +ffffffff81ca32f0 T rv370_pcie_gart_get_page_entry +ffffffff81ca3350 T rv370_pcie_gart_set_page +ffffffff81ca3390 T rv370_pcie_gart_init +ffffffff81ca3460 T rv370_pcie_gart_enable +ffffffff81ca37c0 T rv370_pcie_gart_disable +ffffffff81ca3940 T rv370_pcie_gart_fini +ffffffff81ca3970 T r300_fence_ring_emit +ffffffff81ca3ee0 T r300_ring_start +ffffffff81ca4850 T r300_mc_wait_for_idle +ffffffff81ca48f0 T r300_asic_reset +ffffffff81ca4b10 T r300_mc_init +ffffffff81ca4bc0 T rv370_set_pcie_lanes +ffffffff81ca4d80 T rv370_get_pcie_lanes +ffffffff81ca4e30 T r300_cs_parse +ffffffff81ca51a0 t r300_packet0_check +ffffffff81ca6060 T r300_set_reg_safe +ffffffff81ca60a0 T r300_mc_program +ffffffff81ca6230 T r300_clock_startup +ffffffff81ca62c0 T r300_resume +ffffffff81ca6490 t r300_startup +ffffffff81ca67f0 T r300_suspend +ffffffff81ca6870 T r300_fini +ffffffff81ca6950 T r300_init +ffffffff81ca7000 T r420_pm_init_profile +ffffffff81ca70f0 T r420_pipes_init +ffffffff81ca72d0 T r420_mc_rreg +ffffffff81ca7350 T r420_mc_wreg +ffffffff81ca73c0 T r420_resume +ffffffff81ca7590 t r420_startup +ffffffff81ca77a0 T r420_suspend +ffffffff81ca7940 T r420_fini +ffffffff81ca7a20 T r420_init +ffffffff81ca7ca0 T r420_debugfs_pipes_info_init +ffffffff81ca7cd0 t r420_cp_errata_init +ffffffff81ca8000 T r520_mc_wait_for_idle +ffffffff81ca80a0 T r520_resume +ffffffff81ca81a0 t r520_startup +ffffffff81ca8590 T r520_init +ffffffff81ca9000 T r600_rcu_rreg +ffffffff81ca9080 T r600_rcu_wreg +ffffffff81ca90f0 T r600_uvd_ctx_rreg +ffffffff81ca9170 T r600_uvd_ctx_wreg +ffffffff81ca91e0 T r600_get_allowed_info_register +ffffffff81ca9260 T r600_get_xclk +ffffffff81ca9290 T r600_set_uvd_clocks +ffffffff81ca97f0 T dce3_program_fmt +ffffffff81ca9910 T rv6xx_get_temp +ffffffff81ca9960 T r600_pm_get_dynpm_state +ffffffff81ca9d70 T rs780_pm_init_profile +ffffffff81ca9e80 T r600_pm_init_profile +ffffffff81caa120 T r600_pm_misc +ffffffff81caa200 T r600_gui_idle +ffffffff81caa240 T r600_hpd_sense +ffffffff81caa360 T r600_hpd_set_polarity +ffffffff81caa5e0 T r600_hpd_init +ffffffff81caa7c0 T r600_hpd_fini +ffffffff81caa970 T r600_pcie_gart_tlb_flush +ffffffff81caaaa0 T r600_pcie_gart_init +ffffffff81caab40 T r600_mc_wait_for_idle +ffffffff81caabe0 T rs780_mc_rreg +ffffffff81caac80 T rs780_mc_wreg +ffffffff81caad10 T r600_vram_scratch_init +ffffffff81caae10 t radeon_bo_reserve +ffffffff81caaf90 t radeon_bo_unreserve +ffffffff81cab070 T r600_vram_scratch_fini +ffffffff81cab0f0 T r600_set_bios_scratch_engine_hung +ffffffff81cab140 T r600_gpu_check_soft_reset +ffffffff81cab4e0 T r600_asic_reset +ffffffff81cab8a0 t r600_gpu_pci_config_reset +ffffffff81cabab0 T r600_gfx_is_lockup +ffffffff81cabb20 T r6xx_remap_render_backend +ffffffff81cabce0 T r600_count_pipe_bits +ffffffff81cabd50 T r600_pciep_rreg +ffffffff81cabdd0 T r600_pciep_wreg +ffffffff81cabe40 T r600_cp_stop +ffffffff81cabec0 T r600_init_microcode +ffffffff81cac380 t request_firmware +ffffffff81cac410 t release_firmware +ffffffff81cac450 T r600_gfx_get_rptr +ffffffff81cac4b0 T r600_gfx_get_wptr +ffffffff81cac4f0 T r600_gfx_set_wptr +ffffffff81cac530 T r600_cp_start +ffffffff81cac8a0 T r600_cp_resume +ffffffff81cacc00 T r600_ring_init +ffffffff81cacca0 T r600_cp_fini +ffffffff81cacd30 T r600_scratch_init +ffffffff81cacda0 T r600_ring_test +ffffffff81cad040 T r600_fence_ring_emit +ffffffff81cad8e0 T r600_semaphore_ring_emit +ffffffff81cadac0 T r600_copy_cpdma +ffffffff81cae070 T r600_set_surface_reg +ffffffff81cae0a0 T r600_clear_surface_reg +ffffffff81cae0d0 T r600_vga_set_state +ffffffff81cae130 T r600_resume +ffffffff81cae1c0 t r600_startup +ffffffff81cafeb0 T r600_suspend +ffffffff81cb0020 T r600_irq_suspend +ffffffff81cb00e0 t r600_pcie_gart_disable +ffffffff81cb02e0 T r600_init +ffffffff81cb0a60 T r600_ih_ring_init +ffffffff81cb0ad0 T r600_irq_fini +ffffffff81cb0c10 t r600_pcie_gart_fini +ffffffff81cb0c40 T r600_fini +ffffffff81cb0dd0 T r600_ring_ib_execute +ffffffff81cb1260 T r600_ib_test +ffffffff81cb1510 T r600_ih_ring_alloc +ffffffff81cb1630 T r600_ih_ring_fini +ffffffff81cb16c0 T r600_rlc_stop +ffffffff81cb1850 T r600_disable_interrupts +ffffffff81cb1900 T r600_irq_init +ffffffff81cb1d60 t r600_disable_interrupt_state +ffffffff81cb2060 T r600_irq_disable +ffffffff81cb2120 T r600_irq_set +ffffffff81cb28a0 t r600_irq_ack +ffffffff81cb2dd0 T r600_irq_process +ffffffff81cb39d0 T r600_mmio_hdp_flush +ffffffff81cb3a50 T r600_set_pcie_lanes +ffffffff81cb3b80 T r600_get_pcie_lanes +ffffffff81cb3c50 T r600_get_gpu_clock_counter +ffffffff81cb3ce0 t r600_cp_load_microcode +ffffffff81cb3fb0 t r600_uvd_resume +ffffffff81cb5000 T r600_fmt_is_valid_color +ffffffff81cb5040 T r600_fmt_is_valid_texture +ffffffff81cb5090 T r600_fmt_get_blocksize +ffffffff81cb50d0 T r600_fmt_get_nblocksx +ffffffff81cb5120 T r600_fmt_get_nblocksy +ffffffff81cb5180 T r600_cs_common_vline_parse +ffffffff81cb5440 T r600_mip_minify +ffffffff81cb54a0 T r600_cs_parse +ffffffff81cb7380 T r600_dma_cs_next_reloc +ffffffff81cb7400 T r600_dma_cs_parse +ffffffff81cb7ab0 t r600_cs_track_check +ffffffff81cb8c40 t r600_cs_check_reg +ffffffff81cb9b70 t r600_is_safe_reg +ffffffff81cb9c10 t r600_texture_size +ffffffff81cba000 T r600_dma_get_rptr +ffffffff81cba060 T r600_dma_get_wptr +ffffffff81cba0a0 T r600_dma_set_wptr +ffffffff81cba0e0 T r600_dma_stop +ffffffff81cba170 T r600_dma_resume +ffffffff81cba370 T r600_dma_fini +ffffffff81cba3f0 T r600_dma_is_lockup +ffffffff81cba460 T r600_dma_ring_test +ffffffff81cba6d0 T r600_dma_fence_ring_emit +ffffffff81cba8b0 T r600_dma_semaphore_ring_emit +ffffffff81cba9d0 T r600_dma_ib_test +ffffffff81cbabf0 T r600_dma_ring_ib_execute +ffffffff81cbaf40 T r600_copy_dma +ffffffff81cbc000 T r600_dpm_print_class_info +ffffffff81cbc2b0 T r600_dpm_print_cap_info +ffffffff81cbc340 T r600_dpm_print_ps_status +ffffffff81cbc3d0 T r600_dpm_get_vblank_time +ffffffff81cbc490 T r600_dpm_get_vrefresh +ffffffff81cbc520 T r600_calculate_u_and_p +ffffffff81cbc5a0 T r600_calculate_at +ffffffff81cbc650 T r600_gfx_clockgating_enable +ffffffff81cbc750 T r600_dynamicpm_enable +ffffffff81cbc7a0 T r600_enable_thermal_protection +ffffffff81cbc800 T r600_enable_acpi_pm +ffffffff81cbc850 T r600_enable_dynamic_pcie_gen2 +ffffffff81cbc8a0 T r600_dynamicpm_enabled +ffffffff81cbc8e0 T r600_enable_sclk_control +ffffffff81cbc940 T r600_enable_mclk_control +ffffffff81cbc9a0 T r600_enable_spll_bypass +ffffffff81cbc9f0 T r600_wait_for_spll_change +ffffffff81cbca70 T r600_set_bsp +ffffffff81cbcab0 T r600_set_at +ffffffff81cbcb10 T r600_set_tc +ffffffff81cbcb70 T r600_select_td +ffffffff81cbcc20 T r600_set_vrc +ffffffff81cbcc60 T r600_set_tpu +ffffffff81cbccc0 T r600_set_tpc +ffffffff81cbcd20 T r600_set_sstu +ffffffff81cbcd80 T r600_set_sst +ffffffff81cbcdd0 T r600_set_git +ffffffff81cbce20 T r600_set_fctu +ffffffff81cbce80 T r600_set_fct +ffffffff81cbced0 T r600_set_ctxcgtt3d_rphc +ffffffff81cbcf30 T r600_set_ctxcgtt3d_rsdc +ffffffff81cbcf90 T r600_set_vddc3d_oorsu +ffffffff81cbcff0 T r600_set_vddc3d_oorphc +ffffffff81cbd050 T r600_set_vddc3d_oorsdc +ffffffff81cbd0b0 T r600_set_mpll_lock_time +ffffffff81cbd100 T r600_set_mpll_reset_time +ffffffff81cbd150 T r600_engine_clock_entry_enable +ffffffff81cbd250 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81cbd350 T r600_engine_clock_entry_enable_post_divider +ffffffff81cbd450 T r600_engine_clock_entry_set_post_divider +ffffffff81cbd510 T r600_engine_clock_entry_set_reference_divider +ffffffff81cbd5d0 T r600_engine_clock_entry_set_feedback_divider +ffffffff81cbd690 T r600_engine_clock_entry_set_step_time +ffffffff81cbd750 T r600_vid_rt_set_ssu +ffffffff81cbd7b0 T r600_vid_rt_set_vru +ffffffff81cbd810 T r600_vid_rt_set_vrt +ffffffff81cbd870 T r600_voltage_control_enable_pins +ffffffff81cbd8c0 T r600_voltage_control_program_voltages +ffffffff81cbd950 T r600_voltage_control_deactivate_static_control +ffffffff81cbd9e0 T r600_power_level_enable +ffffffff81cbda50 T r600_power_level_set_voltage_index +ffffffff81cbdac0 T r600_power_level_set_mem_clock_index +ffffffff81cbdb20 T r600_power_level_set_eng_clock_index +ffffffff81cbdb90 T r600_power_level_set_watermark_id +ffffffff81cbdc00 T r600_power_level_set_pcie_gen2 +ffffffff81cbdc60 T r600_power_level_get_current_index +ffffffff81cbdca0 T r600_power_level_get_target_index +ffffffff81cbdce0 T r600_power_level_set_enter_index +ffffffff81cbdd40 T r600_wait_for_power_level_unequal +ffffffff81cbde30 T r600_wait_for_power_level +ffffffff81cbdf20 T r600_start_dpm +ffffffff81cbe200 T r600_stop_dpm +ffffffff81cbe250 T r600_dpm_pre_set_power_state +ffffffff81cbe280 T r600_dpm_post_set_power_state +ffffffff81cbe2b0 T r600_is_uvd_state +ffffffff81cbe2f0 T r600_is_internal_thermal_sensor +ffffffff81cbe330 T r600_dpm_late_enable +ffffffff81cbe440 T r600_get_platform_caps +ffffffff81cbe4e0 T r600_parse_extended_power_table +ffffffff81cbf2a0 T r600_free_extended_power_table +ffffffff81cbf3a0 T r600_get_pcie_gen_support +ffffffff81cbf3f0 T r600_get_pcie_lane_support +ffffffff81cbf450 T r600_encode_pci_lane_width +ffffffff81cc0000 T r600_audio_update_hdmi +ffffffff81cc0170 t r600_audio_status +ffffffff81cc0290 T r600_hdmi_buffer_status_changed +ffffffff81cc0330 T r600_hdmi_update_audio_settings +ffffffff81cc0700 T r600_audio_enable +ffffffff81cc0780 T r600_audio_get_pin +ffffffff81cc07b0 T r600_hdmi_update_acr +ffffffff81cc0b50 T r600_set_avi_packet +ffffffff81cc0d50 T r600_hdmi_audio_workaround +ffffffff81cc0e20 T r600_hdmi_audio_set_dto +ffffffff81cc0ee0 T r600_set_vbi_packet +ffffffff81cc0fa0 T r600_set_audio_packet +ffffffff81cc1270 T r600_set_mute +ffffffff81cc1380 T r600_hdmi_enable +ffffffff81cc2000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81cc2040 T radeon_acpi_pcie_notify_device_ready +ffffffff81cc2160 T radeon_acpi_pcie_performance_request +ffffffff81cc24f0 T radeon_acpi_init +ffffffff81cc2c60 t radeon_acpi_event +ffffffff81cc2f60 T radeon_acpi_fini +ffffffff81cc3000 T radeon_agp_head_init +ffffffff81cc3050 T radeon_agp_init +ffffffff81cc30a0 T radeon_agp_resume +ffffffff81cc3140 T radeon_agp_fini +ffffffff81cc3190 T radeon_agp_suspend +ffffffff81cc4000 T radeon_agp_disable +ffffffff81cc4120 T radeon_asic_init +ffffffff81cc48f0 t radeon_invalid_rreg +ffffffff81cc4930 t radeon_invalid_wreg +ffffffff81cc4970 t radeon_invalid_get_allowed_info_register +ffffffff81cc5000 T radeon_atombios_i2c_init +ffffffff81cc53a0 T radeon_atombios_lookup_gpio +ffffffff81cc54a0 T radeon_get_atom_connector_info_from_object_table +ffffffff81cc5de0 t radeon_lookup_i2c_gpio +ffffffff81cc60d0 t radeon_atom_apply_quirks +ffffffff81cc64f0 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81cc69f0 T radeon_atom_get_clock_info +ffffffff81cc6dd0 T radeon_atombios_sideport_present +ffffffff81cc6e80 T radeon_atombios_get_tmds_info +ffffffff81cc6fc0 T radeon_atombios_get_ppll_ss_info +ffffffff81cc70e0 T radeon_atombios_get_asic_ss_info +ffffffff81cc73c0 t radeon_atombios_get_igp_ss_overrides +ffffffff81cc74d0 T radeon_atombios_get_lvds_info +ffffffff81cc7830 T radeon_atombios_get_primary_dac_info +ffffffff81cc78f0 T radeon_atom_get_tv_timings +ffffffff81cc7b30 T radeon_atombios_get_tv_info +ffffffff81cc7bf0 T radeon_atombios_get_tv_dac_info +ffffffff81cc7cf0 T radeon_atombios_get_default_voltages +ffffffff81cc7db0 T radeon_atombios_get_power_modes +ffffffff81cc8e20 T radeon_atom_get_clock_dividers +ffffffff81cc9110 T radeon_atom_get_memory_pll_dividers +ffffffff81cc9250 T radeon_atom_set_clock_gating +ffffffff81cc92a0 T radeon_atom_get_engine_clock +ffffffff81cc92f0 T radeon_atom_get_memory_clock +ffffffff81cc9340 T radeon_atom_set_engine_clock +ffffffff81cc9390 T radeon_atom_set_memory_clock +ffffffff81cc93f0 T radeon_atom_set_engine_dram_timings +ffffffff81cc9460 T radeon_atom_update_memory_dll +ffffffff81cc94b0 T radeon_atom_set_ac_timing +ffffffff81cc9500 T radeon_atom_set_voltage +ffffffff81cc95d0 T radeon_atom_get_max_vddc +ffffffff81cc96b0 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81cc9780 T radeon_atom_get_leakage_id_from_vbios +ffffffff81cc9840 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81cc9a60 T radeon_atom_get_voltage_evv +ffffffff81cc9b20 T radeon_atom_get_voltage_gpio_settings +ffffffff81cc9c20 T radeon_atom_is_voltage_gpio +ffffffff81cc9db0 T radeon_atom_get_svi2_info +ffffffff81cc9ea0 T radeon_atom_get_max_voltage +ffffffff81cca030 T radeon_atom_get_min_voltage +ffffffff81cca170 T radeon_atom_get_voltage_step +ffffffff81cca270 T radeon_atom_round_to_true_voltage +ffffffff81cca3d0 T radeon_atom_get_voltage_table +ffffffff81cca640 T radeon_atom_get_memory_info +ffffffff81cca7f0 T radeon_atom_get_mclk_range_table +ffffffff81ccaa30 T radeon_atom_init_mc_reg_table +ffffffff81ccaca0 T radeon_atom_initialize_bios_scratch_regs +ffffffff81ccad70 T radeon_save_bios_scratch_regs +ffffffff81ccae50 T radeon_restore_bios_scratch_regs +ffffffff81ccaf30 T radeon_atom_output_lock +ffffffff81ccafc0 T radeon_atombios_connected_scratch_regs +ffffffff81ccb730 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81ccb880 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81ccbab0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81ccbc90 t radeon_atombios_add_pplib_thermal_controller +ffffffff81ccc090 t radeon_atombios_parse_pplib_clock_info +ffffffff81ccc440 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81ccd000 T radeon_audio_init +ffffffff81ccd1f0 t radeon_audio_enable +ffffffff81ccd350 T radeon_audio_endpoint_rreg +ffffffff81ccd390 T radeon_audio_endpoint_wreg +ffffffff81ccd3d0 T radeon_audio_get_pin +ffffffff81ccd420 T radeon_audio_detect +ffffffff81ccd580 T radeon_audio_fini +ffffffff81ccd610 T radeon_audio_mode_set +ffffffff81ccd660 T radeon_audio_dpms +ffffffff81ccd6b0 T radeon_audio_decode_dfs_div +ffffffff81ccd710 T radeon_audio_component_init +ffffffff81ccd780 T radeon_audio_component_fini +ffffffff81ccd7d0 t radeon_audio_hdmi_mode_set +ffffffff81ccdeb0 t radeon_audio_write_speaker_allocation +ffffffff81ccdf60 t radeon_audio_write_sad_regs +ffffffff81cce030 t radeon_audio_set_avi_packet +ffffffff81cce170 t radeon_audio_dp_mode_set +ffffffff81cce2f0 t radeon_audio_rreg +ffffffff81cce340 t radeon_audio_wreg +ffffffff81ccf000 T radeon_benchmark +ffffffff81ccf940 t radeon_benchmark_move +ffffffff81ccfc20 t radeon_bo_reserve +ffffffff81ccfda0 t radeon_bo_unreserve +ffffffff81ccfe80 t radeon_benchmark_do_move +ffffffff81cd0000 T radeon_get_bios +ffffffff81cd0fc0 t igp_read_bios_from_vram +ffffffff81cd10d0 t radeon_read_bios +ffffffff81cd2000 T radeon_legacy_get_engine_clock +ffffffff81cd20d0 T radeon_legacy_get_memory_clock +ffffffff81cd21a0 T radeon_get_clock_info +ffffffff81cd2730 T radeon_legacy_set_engine_clock +ffffffff81cd2a80 T radeon_legacy_set_clock_gating +ffffffff81cd4000 T radeon_combios_check_hardcoded_edid +ffffffff81cd4100 t combios_get_table_offset +ffffffff81cd4690 T radeon_bios_get_hardcoded_edid +ffffffff81cd4710 T radeon_combios_i2c_init +ffffffff81cd4db0 t combios_setup_i2c_bus +ffffffff81cd50a0 t radeon_combios_get_i2c_info_from_table +ffffffff81cd52f0 T radeon_combios_get_clock_info +ffffffff81cd54e0 T radeon_combios_sideport_present +ffffffff81cd5560 T radeon_combios_get_primary_dac_info +ffffffff81cd56b0 T radeon_combios_get_tv_info +ffffffff81cd57b0 T radeon_combios_get_tv_dac_info +ffffffff81cd5a40 T radeon_combios_get_lvds_info +ffffffff81cd60b0 T radeon_legacy_get_tmds_info_from_table +ffffffff81cd6180 T radeon_legacy_get_tmds_info_from_combios +ffffffff81cd6390 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81cd65c0 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81cd6900 T radeon_get_legacy_connector_info_from_table +ffffffff81cd8a70 T radeon_get_legacy_connector_info_from_bios +ffffffff81cd9660 T radeon_combios_get_power_modes +ffffffff81cd9d30 T radeon_external_tmds_setup +ffffffff81cd9e00 T radeon_combios_external_tmds_setup +ffffffff81cda380 T radeon_combios_asic_init +ffffffff81cda8d0 t combios_parse_mmio_table +ffffffff81cdaaf0 t combios_parse_pll_table +ffffffff81cdadc0 T radeon_combios_initialize_bios_scratch_regs +ffffffff81cdae50 T radeon_combios_output_lock +ffffffff81cdaeb0 T radeon_combios_connected_scratch_regs +ffffffff81cdb210 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81cdb2f0 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81cdc000 T radeon_connector_hotplug +ffffffff81cdc100 T radeon_get_monitor_bpc +ffffffff81cdc550 T radeon_connector_edid +ffffffff81cdc600 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81cdc680 T radeon_connector_is_dp12_capable +ffffffff81cdc720 T radeon_add_atom_connector +ffffffff81cdd5d0 T radeon_add_legacy_connector +ffffffff81cddac0 t radeon_dp_detect +ffffffff81cdde60 t radeon_dvi_force +ffffffff81cddeb0 t radeon_connector_set_property +ffffffff81cde6f0 t radeon_connector_unregister +ffffffff81cde750 t radeon_connector_destroy +ffffffff81cde7c0 t radeon_best_single_encoder +ffffffff81cde830 t radeon_connector_get_edid +ffffffff81cde990 t radeon_dp_get_modes +ffffffff81cdec90 t radeon_dp_mode_valid +ffffffff81cdee60 t radeon_dvi_encoder +ffffffff81cdef20 t radeon_fixup_lvds_native_mode +ffffffff81cdf060 t radeon_add_common_modes +ffffffff81cdf150 t radeon_fp_native_mode +ffffffff81cdf230 t radeon_lvds_set_property +ffffffff81cdf320 t radeon_vga_detect +ffffffff81cdf5c0 t radeon_connector_analog_encoder_conflict_solve +ffffffff81cdf7e0 t radeon_vga_get_modes +ffffffff81cdf8c0 t radeon_vga_mode_valid +ffffffff81cdf920 t radeon_dvi_detect +ffffffff81cdff80 t radeon_dvi_mode_valid +ffffffff81ce0100 t radeon_tv_detect +ffffffff81ce0340 t radeon_tv_get_modes +ffffffff81ce0420 t radeon_tv_mode_valid +ffffffff81ce0470 t radeon_lvds_detect +ffffffff81ce0610 t radeon_lvds_get_modes +ffffffff81ce0750 t radeon_lvds_mode_valid +ffffffff81ce1000 T radeon_cs_parser_init +ffffffff81ce1490 T radeon_cs_ioctl +ffffffff81ce1c70 t radeon_cs_parser_fini +ffffffff81ce1df0 t radeon_cs_ib_vm_chunk +ffffffff81ce2130 T radeon_cs_packet_parse +ffffffff81ce22e0 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81ce2340 T radeon_cs_dump_packet +ffffffff81ce23c0 T radeon_cs_packet_next_reloc +ffffffff81ce25a0 t cmp_size_smaller_first +ffffffff81ce3000 T radeon_crtc_cursor_move +ffffffff81ce3070 t radeon_lock_cursor +ffffffff81ce3230 t radeon_cursor_move_locked +ffffffff81ce3770 T radeon_crtc_cursor_set2 +ffffffff81ce3a00 t radeon_hide_cursor +ffffffff81ce3ac0 t radeon_bo_reserve +ffffffff81ce3c40 t radeon_bo_unreserve +ffffffff81ce3d20 t radeon_show_cursor +ffffffff81ce3f70 T radeon_cursor_reset +ffffffff81ce4000 T radeon_is_px +ffffffff81ce4040 T radeon_program_register_sequence +ffffffff81ce4170 T radeon_pci_config_reset +ffffffff81ce41a0 T radeon_surface_init +ffffffff81ce4360 T radeon_scratch_init +ffffffff81ce43e0 T radeon_scratch_get +ffffffff81ce4460 T radeon_scratch_free +ffffffff81ce44c0 T radeon_doorbell_get +ffffffff81ce4570 T radeon_doorbell_free +ffffffff81ce45c0 T radeon_wb_disable +ffffffff81ce45f0 T radeon_wb_fini +ffffffff81ce4690 t radeon_bo_reserve +ffffffff81ce4810 t radeon_bo_unreserve +ffffffff81ce48f0 T radeon_wb_init +ffffffff81ce4be0 T radeon_vram_location +ffffffff81ce4d10 T radeon_gtt_location +ffffffff81ce4e40 T radeon_device_is_virtual +ffffffff81ce4e70 T radeon_card_posted +ffffffff81ce5080 T radeon_update_bandwidth_info +ffffffff81ce5100 T radeon_boot_test_post_card +ffffffff81ce51c0 T radeon_dummy_page_init +ffffffff81ce5280 T radeon_dummy_page_fini +ffffffff81ce52e0 T radeon_atombios_init +ffffffff81ce5470 t cail_reg_read +ffffffff81ce54d0 t cail_reg_write +ffffffff81ce5530 t cail_ioreg_read +ffffffff81ce5550 t cail_ioreg_write +ffffffff81ce5570 t cail_mc_read +ffffffff81ce55a0 t cail_mc_write +ffffffff81ce55d0 t cail_pll_read +ffffffff81ce5600 t cail_pll_write +ffffffff81ce5630 T radeon_atombios_fini +ffffffff81ce56e0 T radeon_combios_init +ffffffff81ce5720 T radeon_combios_fini +ffffffff81ce5750 T radeon_device_init +ffffffff81ce6240 T radeon_device_fini +ffffffff81ce6350 T radeon_suspend_kms +ffffffff81ce66c0 T radeon_resume_kms +ffffffff81ce6900 T radeon_gpu_reset +ffffffff81ce7000 T radeon_crtc_load_lut +ffffffff81ce7e60 T radeon_crtc_handle_vblank +ffffffff81ce7fd0 T radeon_get_crtc_scanoutpos +ffffffff81ce85a0 T radeon_crtc_handle_flip +ffffffff81ce86d0 T radeon_compute_pll_avivo +ffffffff81ce8c30 T radeon_compute_pll_legacy +ffffffff81ce9300 T radeon_framebuffer_init +ffffffff81ce9380 T radeon_update_display_priority +ffffffff81ce93e0 T radeon_modeset_init +ffffffff81ce9ec0 T radeon_modeset_fini +ffffffff81cea010 T radeon_crtc_scaling_mode_fixup +ffffffff81cea390 T radeon_get_crtc_scanout_position +ffffffff81cea400 t radeon_user_framebuffer_create +ffffffff81cea5a0 t radeon_crtc_gamma_set +ffffffff81cea5e0 t radeon_crtc_destroy +ffffffff81cea620 t radeon_crtc_set_config +ffffffff81cea6f0 t radeon_crtc_page_flip_target +ffffffff81ceab90 t radeon_flip_work_func +ffffffff81ceadb0 t radeon_unpin_work_func +ffffffff81ceae30 t radeon_bo_reserve +ffffffff81ceafb0 t radeon_bo_unreserve +ffffffff81cec000 T radeon_dp_aux_transfer_native +ffffffff81ced000 T radeondrm_probe +ffffffff81ced060 T radeondrm_attach_kms +ffffffff81ced7a0 T radeondrm_detach_kms +ffffffff81ced830 T radeondrm_activate_kms +ffffffff81ced8f0 T radeondrm_wsioctl +ffffffff81ced9b0 T radeondrm_wsmmap +ffffffff81ced9e0 T radeondrm_alloc_screen +ffffffff81ceda10 T radeondrm_free_screen +ffffffff81ceda20 T radeondrm_show_screen +ffffffff81cedb10 T radeondrm_enter_ddb +ffffffff81cedb70 T radeondrm_doswitch +ffffffff81cedc10 T radeondrm_setpal +ffffffff81cede30 T radeondrm_attachhook +ffffffff81cee170 T radeondrm_forcedetach +ffffffff81cef000 T radeon_setup_encoder_clones +ffffffff81cef0b0 T radeon_get_encoder_enum +ffffffff81cef230 T radeon_link_encoder_connector +ffffffff81cef380 T radeon_encoder_set_active_device +ffffffff81cef440 T radeon_get_connector_for_encoder +ffffffff81cef4b0 T radeon_get_connector_for_encoder_init +ffffffff81cef520 T radeon_get_external_encoder +ffffffff81cef5b0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81cef650 T radeon_panel_mode_fixup +ffffffff81cef820 T radeon_dig_monitor_is_duallink +ffffffff81cef940 T radeon_encoder_is_digital +ffffffff81cf0000 T radeon_fbdev_setup +ffffffff81cf0150 T radeon_fbdev_set_suspend +ffffffff81cf01a0 T radeon_fbdev_robj_is_fb +ffffffff81cf0210 T radeondrm_burner +ffffffff81cf0290 T radeondrm_burner_cb +ffffffff81cf02c0 t radeon_fbdev_fb_helper_fb_probe +ffffffff81cf0800 t radeon_bo_reserve +ffffffff81cf0980 t radeon_bo_unreserve +ffffffff81cf0a60 t radeon_fbdev_client_unregister +ffffffff81cf0ac0 t radeon_fbdev_client_restore +ffffffff81cf0b00 t radeon_fbdev_client_hotplug +ffffffff81cf1000 T radeon_fence_emit +ffffffff81cf1120 T radeon_fence_process +ffffffff81cf11e0 t radeon_fence_activity +ffffffff81cf1450 T radeon_fence_signaled +ffffffff81cf14c0 t radeon_fence_seq_signaled +ffffffff81cf15b0 T radeon_fence_wait_timeout +ffffffff81cf16e0 t radeon_fence_wait_seq_timeout +ffffffff81cf1b50 T radeon_fence_wait +ffffffff81cf1c80 T radeon_fence_wait_any +ffffffff81cf1dc0 T radeon_fence_wait_next +ffffffff81cf1e80 T radeon_fence_wait_empty +ffffffff81cf1f90 T radeon_fence_ref +ffffffff81cf1fd0 T radeon_fence_unref +ffffffff81cf2010 T radeon_fence_count_emitted +ffffffff81cf2110 T radeon_fence_need_sync +ffffffff81cf2170 T radeon_fence_note_sync +ffffffff81cf2340 T radeon_fence_driver_start_ring +ffffffff81cf2520 T radeon_fence_driver_init +ffffffff81cf2660 T radeon_debugfs_fence_init +ffffffff81cf2690 T radeon_fence_driver_fini +ffffffff81cf28c0 T radeon_fence_driver_force_completion +ffffffff81cf29b0 t radeon_fence_get_driver_name +ffffffff81cf29e0 t radeon_fence_get_timeline_name +ffffffff81cf2a80 t radeon_fence_enable_signaling +ffffffff81cf2c90 t radeon_fence_is_signaled +ffffffff81cf2dd0 t radeon_fence_default_wait +ffffffff81cf2f40 t radeon_fence_any_seq_signaled +ffffffff81cf3080 t radeon_fence_check_lockup +ffffffff81cf32e0 t __delayed_work_tick +ffffffff81cf3300 t radeon_fence_check_signaled +ffffffff81cf33a0 t radeon_fence_wait_cb +ffffffff81cf4000 T radeon_gart_table_ram_alloc +ffffffff81cf40c0 T radeon_gart_table_ram_free +ffffffff81cf4130 T radeon_gart_table_vram_alloc +ffffffff81cf41b0 T radeon_gart_table_vram_pin +ffffffff81cf42f0 t radeon_bo_reserve +ffffffff81cf4470 t radeon_bo_unreserve +ffffffff81cf4550 T radeon_gart_table_vram_unpin +ffffffff81cf45d0 T radeon_gart_table_vram_free +ffffffff81cf4610 T radeon_gart_unbind +ffffffff81cf4730 T radeon_gart_bind +ffffffff81cf4880 T radeon_gart_init +ffffffff81cf4990 T radeon_gart_fini +ffffffff81cf5000 T radeon_gem_fault +ffffffff81cf5180 T radeon_gem_vm_reference +ffffffff81cf51b0 T radeon_gem_vm_detach +ffffffff81cf51c0 T radeon_gem_object_create +ffffffff81cf53a0 T radeon_gem_init +ffffffff81cf53e0 T radeon_gem_fini +ffffffff81cf53f0 t radeon_gem_object_free +ffffffff81cf5440 t radeon_gem_object_open +ffffffff81cf54e0 t radeon_gem_object_close +ffffffff81cf55d0 t radeon_gem_object_mmap +ffffffff81cf5670 T radeon_gem_info_ioctl +ffffffff81cf56e0 T radeon_gem_create_ioctl +ffffffff81cf5800 T radeon_gem_userptr_ioctl +ffffffff81cf5830 T radeon_gem_set_domain_ioctl +ffffffff81cf5990 T radeon_mode_dumb_mmap +ffffffff81cf5a40 T radeon_gem_mmap_ioctl +ffffffff81cf5b00 T radeon_gem_busy_ioctl +ffffffff81cf5bb0 T radeon_gem_wait_idle_ioctl +ffffffff81cf5cc0 T radeon_gem_set_tiling_ioctl +ffffffff81cf5d70 T radeon_gem_get_tiling_ioctl +ffffffff81cf5e40 t radeon_bo_reserve +ffffffff81cf6040 t radeon_bo_unreserve +ffffffff81cf6120 T radeon_gem_va_ioctl +ffffffff81cf63d0 t radeon_gem_va_update_vm +ffffffff81cf6520 T radeon_gem_op_ioctl +ffffffff81cf6620 T radeon_align_pitch +ffffffff81cf66b0 T radeon_mode_dumb_create +ffffffff81cf6800 T radeon_gem_debugfs_init +ffffffff81cf7000 T radeon_ddc_probe +ffffffff81cf70c0 T radeon_router_select_ddc_port +ffffffff81cf7320 T radeon_bb_set_bits +ffffffff81cf7490 T radeon_bb_set_dir +ffffffff81cf74c0 T radeon_bb_read_bits +ffffffff81cf75a0 T radeon_acquire_bus +ffffffff81cf79f0 T radeon_release_bus +ffffffff81cf7b60 T radeon_send_start +ffffffff81cf7b80 T radeon_send_stop +ffffffff81cf7ba0 T radeon_initiate_xfer +ffffffff81cf7bc0 T radeon_read_byte +ffffffff81cf7be0 T radeon_write_byte +ffffffff81cf7c00 T radeon_i2c_create +ffffffff81cf7e10 T radeon_i2c_destroy +ffffffff81cf7e90 T radeon_i2c_init +ffffffff81cf7ee0 T radeon_i2c_fini +ffffffff81cf7f90 T radeon_i2c_add +ffffffff81cf8140 T radeon_i2c_lookup +ffffffff81cf8310 T radeon_i2c_get_byte +ffffffff81cf83e0 T radeon_i2c_put_byte +ffffffff81cf8470 T radeon_router_select_cd_port +ffffffff81cf86d0 t radeon_hw_i2c_xfer +ffffffff81cf9270 t radeon_hw_i2c_func +ffffffff81cf92a0 t r100_hw_i2c_xfer +ffffffff81cf9960 t radeon_get_i2c_prescale +ffffffff81cfa000 T radeon_ib_get +ffffffff81cfa100 T radeon_ib_free +ffffffff81cfa140 T radeon_ib_schedule +ffffffff81cfa3d0 T radeon_ib_pool_init +ffffffff81cfa470 T radeon_ib_pool_fini +ffffffff81cfa4e0 T radeon_ib_ring_tests +ffffffff81cfb000 T radeon_driver_irq_handler_kms +ffffffff81cfb050 T radeon_msi_ok +ffffffff81cfb150 T radeon_irq_kms_init +ffffffff81cfb3e0 t radeon_hotplug_work_func +ffffffff81cfb490 t radeon_dp_work_func +ffffffff81cfb500 T radeon_irq_kms_fini +ffffffff81cfb6a0 T radeon_irq_kms_sw_irq_get +ffffffff81cfb740 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81cfb780 T radeon_irq_kms_sw_irq_put +ffffffff81cfb810 T radeon_irq_kms_pflip_irq_get +ffffffff81cfb8c0 T radeon_irq_kms_pflip_irq_put +ffffffff81cfb960 T radeon_irq_kms_enable_afmt +ffffffff81cfb9f0 T radeon_irq_kms_disable_afmt +ffffffff81cfba80 T radeon_irq_kms_enable_hpd +ffffffff81cfbb70 T radeon_irq_kms_disable_hpd +ffffffff81cfbc50 T radeon_irq_kms_set_irq_n_enabled +ffffffff81cfbdc0 t __delayed_work_tick +ffffffff81cfc000 T radeon_info_ioctl +ffffffff81cfcaf0 t radeon_set_filp_rights +ffffffff81cfcb80 T radeon_driver_open_kms +ffffffff81cfccb0 t radeon_bo_reserve +ffffffff81cfce30 T radeon_driver_postclose_kms +ffffffff81cfd050 T radeon_get_vblank_counter_kms +ffffffff81cfd200 T radeon_enable_vblank_kms +ffffffff81cfd2b0 T radeon_disable_vblank_kms +ffffffff81cfe000 T radeon_crtc_set_base +ffffffff81cfe020 T radeon_crtc_do_set_base +ffffffff81cfe590 T radeon_crtc_set_base_atomic +ffffffff81cfe5b0 t radeon_bo_reserve +ffffffff81cfe730 t radeon_bo_unreserve +ffffffff81cfe810 T radeon_legacy_init_crtc +ffffffff81cfe860 t radeon_crtc_dpms +ffffffff81cfea50 t radeon_crtc_prepare +ffffffff81cfead0 t radeon_crtc_commit +ffffffff81cfeb40 t radeon_crtc_mode_fixup +ffffffff81cfeb60 t radeon_crtc_mode_set +ffffffff81cfffd0 t radeon_crtc_disable +ffffffff81d01000 T radeon_legacy_get_backlight_level +ffffffff81d01050 T radeon_legacy_set_backlight_level +ffffffff81d010a0 t radeon_legacy_lvds_update +ffffffff81d013e0 T radeon_legacy_backlight_init +ffffffff81d015b0 t radeon_legacy_backlight_get_brightness +ffffffff81d01610 T radeon_add_legacy_encoder +ffffffff81d01970 t radeon_legacy_backlight_update_status +ffffffff81d01a10 t radeon_lvds_enc_destroy +ffffffff81d01aa0 t radeon_legacy_lvds_dpms +ffffffff81d01af0 t radeon_legacy_mode_fixup +ffffffff81d01b60 t radeon_legacy_lvds_prepare +ffffffff81d01bf0 t radeon_legacy_lvds_commit +ffffffff81d01c70 t radeon_legacy_lvds_mode_set +ffffffff81d01e80 t radeon_legacy_encoder_disable +ffffffff81d01ed0 t radeon_legacy_tmds_int_dpms +ffffffff81d01f90 t radeon_legacy_tmds_int_prepare +ffffffff81d02060 t radeon_legacy_tmds_int_commit +ffffffff81d02130 t radeon_legacy_tmds_int_mode_set +ffffffff81d02390 t radeon_legacy_primary_dac_dpms +ffffffff81d024d0 t radeon_legacy_primary_dac_prepare +ffffffff81d02530 t radeon_legacy_primary_dac_commit +ffffffff81d02580 t radeon_legacy_primary_dac_mode_set +ffffffff81d02710 t radeon_legacy_primary_dac_detect +ffffffff81d02900 t radeon_legacy_tv_dac_dpms +ffffffff81d02b10 t radeon_legacy_tv_dac_prepare +ffffffff81d02b70 t radeon_legacy_tv_dac_commit +ffffffff81d02bc0 t radeon_legacy_tv_dac_mode_set +ffffffff81d02f60 t radeon_legacy_tv_dac_detect +ffffffff81d03b60 t radeon_ext_tmds_enc_destroy +ffffffff81d03bb0 t radeon_legacy_tmds_ext_dpms +ffffffff81d03c80 t radeon_legacy_tmds_ext_prepare +ffffffff81d03d50 t radeon_legacy_tmds_ext_commit +ffffffff81d03e20 t radeon_legacy_tmds_ext_mode_set +ffffffff81d04000 T radeon_legacy_tv_mode_set +ffffffff81d050f0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81d05200 T radeon_legacy_tv_adjust_pll1 +ffffffff81d05300 T radeon_legacy_tv_adjust_pll2 +ffffffff81d06000 T radeon_ttm_bo_is_radeon_bo +ffffffff81d06040 t radeon_ttm_bo_destroy +ffffffff81d06170 T radeon_ttm_placement_from_domain +ffffffff81d062d0 T radeon_bo_create +ffffffff81d064a0 T radeon_bo_kmap +ffffffff81d06590 T radeon_bo_check_tiling +ffffffff81d06670 T radeon_bo_kunmap +ffffffff81d06700 T radeon_bo_ref +ffffffff81d06740 T radeon_bo_unref +ffffffff81d06790 T radeon_bo_pin_restricted +ffffffff81d06ac0 T radeon_bo_pin +ffffffff81d06ae0 T radeon_bo_unpin +ffffffff81d06b50 T radeon_bo_evict_vram +ffffffff81d06bb0 T radeon_bo_force_delete +ffffffff81d06d20 T radeon_bo_init +ffffffff81d06e00 T radeon_bo_fini +ffffffff81d06e40 T radeon_bo_list_validate +ffffffff81d07150 T radeon_bo_get_surface_reg +ffffffff81d073d0 T radeon_bo_set_tiling_flags +ffffffff81d076e0 T radeon_bo_get_tiling_flags +ffffffff81d07730 T radeon_bo_move_notify +ffffffff81d07800 T radeon_bo_fault_reserve_notify +ffffffff81d07a90 t ttm_bo_move_to_lru_tail_unlocked +ffffffff81d07ad0 T radeon_bo_fence +ffffffff81d08000 T radeon_pm_get_type_index +ffffffff81d08080 T radeon_pm_acpi_event_handler +ffffffff81d08160 t radeon_pm_update_profile +ffffffff81d08280 t radeon_pm_set_clocks +ffffffff81d08c50 T radeon_dpm_enable_uvd +ffffffff81d08d10 T radeon_pm_compute_clocks +ffffffff81d09720 T radeon_dpm_enable_vce +ffffffff81d09790 T radeon_pm_suspend +ffffffff81d09890 T radeon_pm_resume +ffffffff81d09b80 T radeon_pm_init +ffffffff81d0a290 T radeon_pm_late_init +ffffffff81d0a350 T radeon_pm_fini +ffffffff81d0a470 t radeon_dpm_thermal_work_handler +ffffffff81d0a550 t radeon_dynpm_idle_work_handler +ffffffff81d0a7d0 t __delayed_work_tick +ffffffff81d0b000 T radeon_gem_prime_get_sg_table +ffffffff81d0b030 T radeon_gem_prime_pin +ffffffff81d0b0c0 t radeon_bo_reserve +ffffffff81d0b240 t radeon_bo_unreserve +ffffffff81d0b320 T radeon_gem_prime_unpin +ffffffff81d0b3a0 T radeon_gem_prime_export +ffffffff81d0c000 T radeon_ring_supports_scratch_reg +ffffffff81d0c030 T radeon_ring_free_size +ffffffff81d0c0e0 T radeon_ring_lockup_update +ffffffff81d0c140 T radeon_ring_alloc +ffffffff81d0c2c0 T radeon_ring_lock +ffffffff81d0c340 T radeon_ring_commit +ffffffff81d0c440 T radeon_ring_unlock_commit +ffffffff81d0c470 T radeon_ring_undo +ffffffff81d0c4a0 T radeon_ring_unlock_undo +ffffffff81d0c4c0 T radeon_ring_test_lockup +ffffffff81d0c5e0 T radeon_ring_backup +ffffffff81d0c780 T radeon_ring_restore +ffffffff81d0c930 T radeon_ring_init +ffffffff81d0cb20 t radeon_bo_reserve +ffffffff81d0cca0 t radeon_bo_unreserve +ffffffff81d0cd80 T radeon_ring_fini +ffffffff81d0d000 T radeon_sa_bo_manager_init +ffffffff81d0d0d0 T radeon_sa_bo_manager_fini +ffffffff81d0d100 T radeon_sa_bo_manager_start +ffffffff81d0d240 t radeon_bo_reserve +ffffffff81d0d3c0 t radeon_bo_unreserve +ffffffff81d0d4a0 T radeon_sa_bo_manager_suspend +ffffffff81d0d550 T radeon_sa_bo_new +ffffffff81d0d5c0 T radeon_sa_bo_free +ffffffff81d0e000 T radeon_semaphore_create +ffffffff81d0e0e0 T radeon_semaphore_emit_signal +ffffffff81d0e170 T radeon_semaphore_emit_wait +ffffffff81d0e200 T radeon_semaphore_free +ffffffff81d0f000 T radeon_sync_create +ffffffff81d0f090 T radeon_sync_fence +ffffffff81d0f140 T radeon_sync_resv +ffffffff81d0f280 T radeon_sync_rings +ffffffff81d0f440 T radeon_sync_free +ffffffff81d10000 T radeon_test_moves +ffffffff81d10070 t radeon_do_test_moves +ffffffff81d10680 T radeon_test_ring_sync +ffffffff81d10950 t radeon_test_create_and_emit_fence +ffffffff81d10ac0 T radeon_test_syncing +ffffffff81d10d90 t radeon_test_ring_sync2 +ffffffff81d11100 t radeon_bo_reserve +ffffffff81d11280 t radeon_bo_unreserve +ffffffff81d12000 T radeon_get_rdev +ffffffff81d12030 T radeon_ttm_tt_set_userptr +ffffffff81d12080 T radeon_ttm_tt_is_bound +ffffffff81d120d0 T radeon_ttm_tt_has_userptr +ffffffff81d12120 T radeon_ttm_tt_is_readonly +ffffffff81d12170 T radeon_ttm_init +ffffffff81d12390 T radeon_ttm_set_active_vram_size +ffffffff81d123d0 t radeon_bo_reserve +ffffffff81d12550 t radeon_bo_unreserve +ffffffff81d12630 T radeon_ttm_fini +ffffffff81d12700 t radeon_ttm_tt_create +ffffffff81d127e0 t radeon_ttm_tt_populate +ffffffff81d12890 t radeon_ttm_tt_unpopulate +ffffffff81d12980 t radeon_ttm_tt_destroy +ffffffff81d129d0 t radeon_evict_flags +ffffffff81d12b30 t radeon_bo_move +ffffffff81d12f30 t radeon_ttm_io_mem_reserve +ffffffff81d13000 T radeon_ucode_print_mc_hdr +ffffffff81d130b0 t radeon_ucode_print_common_hdr +ffffffff81d131e0 T radeon_ucode_print_smc_hdr +ffffffff81d13270 T radeon_ucode_print_gfx_hdr +ffffffff81d13340 T radeon_ucode_print_rlc_hdr +ffffffff81d13440 T radeon_ucode_print_sdma_hdr +ffffffff81d13520 T radeon_ucode_validate +ffffffff81d14000 T radeon_uvd_init +ffffffff81d14500 t radeon_uvd_idle_work_handler +ffffffff81d14670 t radeon_bo_reserve +ffffffff81d14870 t radeon_bo_unreserve +ffffffff81d14950 T radeon_uvd_fini +ffffffff81d14a20 T radeon_uvd_suspend +ffffffff81d14be0 T radeon_uvd_note_usage +ffffffff81d14e20 T radeon_uvd_get_destroy_msg +ffffffff81d14f30 T radeon_uvd_resume +ffffffff81d14fc0 T radeon_uvd_force_into_uvd_segment +ffffffff81d15060 T radeon_uvd_free_handles +ffffffff81d15220 T radeon_uvd_cs_parse +ffffffff81d15940 T radeon_uvd_get_create_msg +ffffffff81d15ac0 t radeon_uvd_send_msg +ffffffff81d15c60 T radeon_uvd_calc_upll_dividers +ffffffff81d15e30 T radeon_uvd_send_upll_ctlreq +ffffffff81d16170 t __delayed_work_tick +ffffffff81d17000 T radeon_vce_init +ffffffff81d17640 t radeon_vce_idle_work_handler +ffffffff81d17700 t radeon_bo_reserve +ffffffff81d17880 t radeon_bo_unreserve +ffffffff81d17960 T radeon_vce_fini +ffffffff81d179e0 T radeon_vce_suspend +ffffffff81d17ac0 T radeon_vce_resume +ffffffff81d17c10 T radeon_vce_note_usage +ffffffff81d17d30 T radeon_vce_free_handles +ffffffff81d17df0 T radeon_vce_get_destroy_msg +ffffffff81d18020 T radeon_vce_get_create_msg +ffffffff81d18370 T radeon_vce_cs_reloc +ffffffff81d18470 T radeon_vce_cs_parse +ffffffff81d18be0 T radeon_vce_semaphore_emit +ffffffff81d18da0 T radeon_vce_ib_execute +ffffffff81d18f30 T radeon_vce_fence_emit +ffffffff81d19160 T radeon_vce_ring_test +ffffffff81d192b0 T radeon_vce_ib_test +ffffffff81d193d0 t __delayed_work_tick +ffffffff81d1a000 T radeon_vm_manager_init +ffffffff81d1a060 T radeon_vm_manager_fini +ffffffff81d1a180 T radeon_vm_get_bos +ffffffff81d1a2d0 T radeon_vm_grab_id +ffffffff81d1a460 T radeon_vm_flush +ffffffff81d1a5f0 T radeon_vm_fence +ffffffff81d1a6a0 T radeon_vm_bo_find +ffffffff81d1a6f0 T radeon_vm_bo_add +ffffffff81d1a7e0 T radeon_vm_bo_set_addr +ffffffff81d1ac30 t radeon_bo_unreserve +ffffffff81d1ad10 t radeon_vm_clear_bo +ffffffff81d1af00 T radeon_vm_map_gart +ffffffff81d1af40 T radeon_vm_update_page_directory +ffffffff81d1b2c0 T radeon_vm_bo_update +ffffffff81d1b900 t radeon_vm_fence_pts +ffffffff81d1b990 T radeon_vm_clear_freed +ffffffff81d1ba70 T radeon_vm_clear_invalids +ffffffff81d1bb10 T radeon_vm_bo_rmv +ffffffff81d1bc00 T radeon_vm_bo_invalidate +ffffffff81d1bcb0 T radeon_vm_init +ffffffff81d1bf50 T radeon_vm_fini +ffffffff81d1c230 t radeon_bo_reserve +ffffffff81d1c3b0 t radeon_vm_frag_ptes +ffffffff81d1d000 T rs400_gart_adjust_size +ffffffff81d1d0c0 T rs400_gart_tlb_flush +ffffffff81d1d140 T rs400_gart_init +ffffffff81d1d240 T rs400_gart_enable +ffffffff81d1d5a0 T rs400_gart_disable +ffffffff81d1d600 T rs400_gart_fini +ffffffff81d1d670 T rs400_gart_get_page_entry +ffffffff81d1d6d0 T rs400_gart_set_page +ffffffff81d1d710 T rs400_mc_wait_for_idle +ffffffff81d1d7b0 T rs400_mc_rreg +ffffffff81d1d840 T rs400_mc_wreg +ffffffff81d1d8c0 T rs400_resume +ffffffff81d1d9f0 t rs400_mc_program +ffffffff81d1daf0 t rs400_startup +ffffffff81d1dce0 T rs400_suspend +ffffffff81d1dd80 T rs400_fini +ffffffff81d1de70 T rs400_init +ffffffff81d1f000 T avivo_wait_for_vblank +ffffffff81d1f280 T rs600_page_flip +ffffffff81d1f550 T rs600_page_flip_pending +ffffffff81d1f5c0 T avivo_program_fmt +ffffffff81d1f6e0 T rs600_pm_misc +ffffffff81d1fa20 T rs600_pm_prepare +ffffffff81d1fb20 T rs600_pm_finish +ffffffff81d1fc20 T rs600_hpd_sense +ffffffff81d1fc80 T rs600_hpd_set_polarity +ffffffff81d1fd40 T rs600_hpd_init +ffffffff81d1fe20 T rs600_hpd_fini +ffffffff81d1fed0 T rs600_asic_reset +ffffffff81d20140 T rs600_gart_tlb_flush +ffffffff81d20200 T rs600_gart_get_page_entry +ffffffff81d20260 T rs600_gart_set_page +ffffffff81d202a0 T rs600_irq_set +ffffffff81d20480 T rs600_irq_disable +ffffffff81d20500 t rs600_irq_ack +ffffffff81d206b0 T rs600_irq_process +ffffffff81d20a10 T rs600_get_vblank_counter +ffffffff81d20a60 T rs600_mc_wait_for_idle +ffffffff81d20b00 T rs600_bandwidth_update +ffffffff81d20bf0 T rs600_mc_rreg +ffffffff81d20c70 T rs600_mc_wreg +ffffffff81d20ce0 T rs600_set_safe_registers +ffffffff81d20d20 T rs600_resume +ffffffff81d20e50 t rs600_startup +ffffffff81d21690 T rs600_suspend +ffffffff81d21790 T rs600_fini +ffffffff81d21890 t rs600_gart_fini +ffffffff81d21900 T rs600_init +ffffffff81d22000 T rs690_mc_wait_for_idle +ffffffff81d220a0 T rs690_pm_info +ffffffff81d22310 T rs690_line_buffer_adjust +ffffffff81d22430 T rs690_bandwidth_update +ffffffff81d22780 t rs690_crtc_bandwidth_compute +ffffffff81d22b70 t rs690_compute_mode_priority +ffffffff81d22ff0 T rs690_mc_rreg +ffffffff81d23080 T rs690_mc_wreg +ffffffff81d23100 T rs690_resume +ffffffff81d231f0 t rs690_startup +ffffffff81d234e0 T rs690_suspend +ffffffff81d23540 T rs690_fini +ffffffff81d235f0 T rs690_init +ffffffff81d24000 T rs780_dpm_enable +ffffffff81d24bf0 T rs780_dpm_disable +ffffffff81d24cd0 T rs780_dpm_set_power_state +ffffffff81d250b0 t rs780_force_voltage +ffffffff81d251f0 t rs780_enable_voltage_scaling +ffffffff81d253b0 T rs780_dpm_setup_asic +ffffffff81d253e0 T rs780_dpm_display_configuration_changed +ffffffff81d25530 T rs780_dpm_init +ffffffff81d25aa0 T rs780_dpm_print_power_state +ffffffff81d25b30 T rs780_dpm_fini +ffffffff81d25bc0 T rs780_dpm_get_sclk +ffffffff81d25c00 T rs780_dpm_get_mclk +ffffffff81d25c30 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81d25c60 T rs780_dpm_get_current_sclk +ffffffff81d25cf0 T rs780_dpm_get_current_mclk +ffffffff81d25d20 T rs780_dpm_force_performance_level +ffffffff81d25f10 t rs780_force_fbdiv +ffffffff81d27000 T rv515_ring_start +ffffffff81d27af0 T rv515_mc_wait_for_idle +ffffffff81d27b90 T rv515_vga_render_disable +ffffffff81d27be0 T rv515_mc_rreg +ffffffff81d27c70 T rv515_mc_wreg +ffffffff81d27cf0 T rv515_debugfs +ffffffff81d27d00 T rv515_mc_stop +ffffffff81d28270 T rv515_mc_resume +ffffffff81d28850 T rv515_clock_startup +ffffffff81d28910 T rv515_resume +ffffffff81d28b50 t rv515_startup +ffffffff81d29020 T rv515_suspend +ffffffff81d29090 T rv515_set_safe_registers +ffffffff81d290d0 T rv515_fini +ffffffff81d29180 T rv515_init +ffffffff81d29470 T atom_rv515_force_tv_scaler +ffffffff81d2cb10 T rv515_bandwidth_avivo_update +ffffffff81d2ccb0 t rv515_crtc_bandwidth_compute +ffffffff81d2cfc0 t rv515_compute_mode_priority +ffffffff81d2d490 T rv515_bandwidth_update +ffffffff81d2e000 T rv6xx_dpm_enable +ffffffff81d2e800 t rv6xx_calculate_stepping_parameters +ffffffff81d2e9e0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81d2efb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81d2f080 t rv6xx_enable_dynamic_pcie_gen2 +ffffffff81d2f240 T rv6xx_dpm_disable +ffffffff81d2f4b0 T rv6xx_dpm_set_power_state +ffffffff81d2fea0 T rv6xx_setup_asic +ffffffff81d2ffe0 T rv6xx_dpm_display_configuration_changed +ffffffff81d30060 T rv6xx_dpm_init +ffffffff81d305a0 T rv6xx_dpm_print_power_state +ffffffff81d30660 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81d30690 T rv6xx_dpm_get_current_sclk +ffffffff81d30700 T rv6xx_dpm_get_current_mclk +ffffffff81d30770 T rv6xx_dpm_fini +ffffffff81d30800 T rv6xx_dpm_get_sclk +ffffffff81d30840 T rv6xx_dpm_get_mclk +ffffffff81d30880 T rv6xx_dpm_force_performance_level +ffffffff81d30a10 t rv6xx_generate_steps +ffffffff81d30d10 t rv6xx_output_stepping +ffffffff81d30e20 t rv6xx_program_mclk_stepping_entry +ffffffff81d31090 t rv6xx_program_engine_spread_spectrum +ffffffff81d31380 t rv6xx_step_sw_voltage +ffffffff81d32000 T rv730_populate_sclk_value +ffffffff81d32230 T rv730_populate_mclk_value +ffffffff81d32470 T rv730_read_clock_registers +ffffffff81d32590 T rv730_populate_smc_acpi_state +ffffffff81d32750 T rv730_populate_smc_initial_state +ffffffff81d32910 T rv730_program_memory_timing_parameters +ffffffff81d32af0 T rv730_start_dpm +ffffffff81d32b80 T rv730_stop_dpm +ffffffff81d32c40 T rv730_program_dcodt +ffffffff81d32d10 T rv730_get_odt_values +ffffffff81d33000 T rv740_get_decoded_reference_divider +ffffffff81d330a0 T rv740_get_dll_speed +ffffffff81d332b0 T rv740_populate_sclk_value +ffffffff81d334b0 T rv740_populate_mclk_value +ffffffff81d33860 T rv740_read_clock_registers +ffffffff81d33990 T rv740_populate_smc_acpi_state +ffffffff81d33bc0 T rv740_enable_mclk_spread_spectrum +ffffffff81d33c10 T rv740_get_mclk_frequency_ratio +ffffffff81d34000 T rv770_set_uvd_clocks +ffffffff81d34570 T rv770_get_xclk +ffffffff81d345d0 T rv770_page_flip +ffffffff81d348d0 T rv770_page_flip_pending +ffffffff81d34940 T rv770_get_temp +ffffffff81d349a0 T rv770_pm_misc +ffffffff81d34a80 T r700_cp_stop +ffffffff81d34b00 T r700_cp_fini +ffffffff81d34b90 T rv770_set_clk_bypass_mode +ffffffff81d34cb0 T r700_vram_gtt_location +ffffffff81d34e40 T rv770_resume +ffffffff81d34ed0 t rv770_init_golden_registers +ffffffff81d35060 t rv770_startup +ffffffff81d36c30 T rv770_suspend +ffffffff81d36e50 T rv770_init +ffffffff81d37260 t rv770_pcie_gart_fini +ffffffff81d373e0 T rv770_fini +ffffffff81d37680 t rv770_uvd_start +ffffffff81d37740 t rv770_cp_load_microcode +ffffffff81d37a10 t rv770_uvd_resume +ffffffff81d38000 T rv770_copy_dma +ffffffff81d39000 T rv770_get_ps +ffffffff81d39030 T rv770_get_pi +ffffffff81d39060 T evergreen_get_pi +ffffffff81d39090 T rv770_restore_cgcg +ffffffff81d39110 T rv770_stop_dpm +ffffffff81d391d0 T rv770_dpm_enabled +ffffffff81d39210 T rv770_enable_thermal_protection +ffffffff81d39270 T rv770_enable_acpi_pm +ffffffff81d392c0 T rv770_get_seq_value +ffffffff81d39300 T rv770_write_smc_soft_register +ffffffff81d39330 T rv770_populate_smc_t +ffffffff81d394d0 T rv770_populate_smc_sp +ffffffff81d39530 T rv770_map_clkf_to_ibias +ffffffff81d39590 T rv770_populate_vddc_value +ffffffff81d39640 T rv770_populate_mvdd_value +ffffffff81d39690 T rv770_calculate_memory_refresh_rate +ffffffff81d39710 T rv770_enable_backbias +ffffffff81d39770 T rv770_setup_bsp +ffffffff81d39860 T rv770_program_git +ffffffff81d398b0 T rv770_program_tp +ffffffff81d39930 T rv770_program_tpp +ffffffff81d39970 T rv770_program_sstp +ffffffff81d399b0 T rv770_program_engine_speed_parameters +ffffffff81d39a00 T rv770_program_vc +ffffffff81d39a50 T rv770_clear_vc +ffffffff81d39a90 T rv770_upload_firmware +ffffffff81d39ad0 T rv770_populate_initial_mvdd_value +ffffffff81d39b20 T rv770_get_memory_module_index +ffffffff81d39b60 T rv770_enable_voltage_control +ffffffff81d39bb0 T rv770_halt_smc +ffffffff81d39c10 T rv770_resume_smc +ffffffff81d39c60 T rv770_set_sw_state +ffffffff81d39cc0 T rv770_set_boot_state +ffffffff81d39d10 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81d39d80 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81d39df0 T rv770_restrict_performance_levels_before_switch +ffffffff81d39e50 T rv770_dpm_force_performance_level +ffffffff81d39f10 T r7xx_start_smc +ffffffff81d39f40 T r7xx_stop_smc +ffffffff81d39f70 T rv770_read_voltage_smio_registers +ffffffff81d39fb0 T rv770_reset_smio_status +ffffffff81d3a070 T rv770_get_memory_type +ffffffff81d3a0c0 T rv770_get_pcie_gen2_status +ffffffff81d3a130 T rv770_get_max_vddc +ffffffff81d3a190 T rv770_program_response_times +ffffffff81d3a2e0 T rv770_enable_auto_throttle_source +ffffffff81d3a460 T rv770_dpm_enable +ffffffff81d3b4e0 T rv770_dpm_late_enable +ffffffff81d3b610 T rv770_dpm_disable +ffffffff81d3b980 T rv770_dpm_set_power_state +ffffffff81d3c070 t rv770_program_dcodt_after_state_switch +ffffffff81d3c0f0 T rv770_dpm_setup_asic +ffffffff81d3c460 T rv770_dpm_display_configuration_changed +ffffffff81d3c4e0 T rv7xx_parse_power_table +ffffffff81d3ca60 T rv770_get_engine_memory_ss +ffffffff81d3caf0 T rv770_dpm_init +ffffffff81d3cd30 T rv770_dpm_print_power_state +ffffffff81d3ce50 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81d3ce80 T rv770_dpm_get_current_sclk +ffffffff81d3cef0 T rv770_dpm_get_current_mclk +ffffffff81d3cf60 T rv770_dpm_fini +ffffffff81d3cff0 T rv770_dpm_get_sclk +ffffffff81d3d040 T rv770_dpm_get_mclk +ffffffff81d3d090 T rv770_dpm_vblank_too_short +ffffffff81d3d100 t rv770_convert_power_level_to_smc +ffffffff81d3e000 T rv770_copy_bytes_to_smc +ffffffff81d3e210 T rv770_start_smc +ffffffff81d3e260 T rv770_reset_smc +ffffffff81d3e2b0 T rv770_stop_smc_clock +ffffffff81d3e300 T rv770_start_smc_clock +ffffffff81d3e350 T rv770_is_smc_running +ffffffff81d3e390 T rv770_send_msg_to_smc +ffffffff81d3e470 T rv770_wait_for_smc_inactive +ffffffff81d3e510 T rv770_load_smc_ucode +ffffffff81d3e6a0 T rv770_read_smc_sram_dword +ffffffff81d3e760 T rv770_write_smc_sram_dword +ffffffff81d3f000 T si_get_allowed_info_register +ffffffff81d3f090 T si_get_xclk +ffffffff81d3f100 T si_get_temp +ffffffff81d3f150 T si_mc_load_microcode +ffffffff81d3f410 T dce6_bandwidth_update +ffffffff81d3f5d0 t dce6_line_buffer_adjust +ffffffff81d3f780 t dce6_program_watermarks +ffffffff81d40230 T si_fence_ring_emit +ffffffff81d40690 T si_ring_ib_execute +ffffffff81d40e00 T si_gpu_check_soft_reset +ffffffff81d40fa0 T si_asic_reset +ffffffff81d41330 t si_gpu_pci_config_reset +ffffffff81d41650 T si_gfx_is_lockup +ffffffff81d416c0 T si_vram_gtt_location +ffffffff81d41760 T si_pcie_gart_tlb_flush +ffffffff81d417b0 T si_ib_parse +ffffffff81d41e60 T si_vm_init +ffffffff81d41ea0 T si_vm_fini +ffffffff81d41ed0 T si_vm_flush +ffffffff81d42570 T si_init_uvd_internal_cg +ffffffff81d425c0 T si_get_csb_size +ffffffff81d42650 T si_get_csb_buffer +ffffffff81d427d0 T si_rlc_reset +ffffffff81d42850 T si_irq_set +ffffffff81d42d40 t si_disable_interrupt_state +ffffffff81d42fc0 T si_irq_process +ffffffff81d442d0 t si_irq_ack +ffffffff81d448c0 T si_resume +ffffffff81d44950 t si_init_golden_registers +ffffffff81d44b10 t si_startup +ffffffff81d46f50 T si_suspend +ffffffff81d47240 t si_fini_cg +ffffffff81d472e0 T si_init +ffffffff81d48650 t si_cp_fini +ffffffff81d48740 t si_irq_fini +ffffffff81d48810 t si_pcie_gart_fini +ffffffff81d48910 T si_fini +ffffffff81d48b30 T si_get_gpu_clock_counter +ffffffff81d48bf0 T si_set_uvd_clocks +ffffffff81d49150 T si_set_vce_clocks +ffffffff81d49690 t si_vce_send_vcepll_ctlreq +ffffffff81d498d0 t dce6_latency_watermark +ffffffff81d49b10 t si_rlc_stop +ffffffff81d49cc0 t si_vm_reg_valid +ffffffff81d49e20 t si_vm_packet3_cp_dma_check +ffffffff81d49f90 t si_uvd_start +ffffffff81d4a050 t si_vce_start +ffffffff81d4a170 t si_irq_init +ffffffff81d4ac50 t si_cp_load_microcode +ffffffff81d4b030 t si_cp_resume +ffffffff81d4bef0 t si_uvd_resume +ffffffff81d4bfc0 t si_vce_resume +ffffffff81d4c0c0 t pcie_capability_set_word +ffffffff81d4c1d0 t pcie_capability_read_word +ffffffff81d4c270 t pcie_capability_clear_and_set_word +ffffffff81d4c390 t pcie_capability_write_word +ffffffff81d4c450 t si_update_cg +ffffffff81d4c9c0 t si_enable_mgcg +ffffffff81d4cde0 t si_enable_cgcg +ffffffff81d4d170 t request_firmware +ffffffff81d4d200 t release_firmware +ffffffff81d4e000 T si_dma_is_lockup +ffffffff81d4e080 T si_dma_vm_copy_pages +ffffffff81d4e170 T si_dma_vm_write_pages +ffffffff81d4e2d0 T si_dma_vm_set_pages +ffffffff81d4e440 T si_dma_vm_flush +ffffffff81d4e8b0 T si_copy_dma +ffffffff81d4f000 T si_dpm_force_performance_level +ffffffff81d4f160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81d4f1c0 T si_get_mclk_frequency_ratio +ffffffff81d4f240 T si_trim_voltage_table_to_fit_state_table +ffffffff81d4f350 T si_dpm_setup_asic +ffffffff81d4f520 T si_fan_ctrl_get_fan_speed_percent +ffffffff81d4f5b0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81d4f670 T si_fan_ctrl_set_mode +ffffffff81d4f8c0 T si_fan_ctrl_get_mode +ffffffff81d4f910 T si_dpm_enable +ffffffff81d50c90 t si_init_smc_table +ffffffff81d51e40 t si_init_smc_spll_table +ffffffff81d51fc0 t si_init_arb_table_index +ffffffff81d52050 t si_populate_mc_reg_table +ffffffff81d52770 t si_initialize_smc_cac_tables +ffffffff81d543c0 t si_initialize_hardware_cac_manager +ffffffff81d54470 t si_initialize_smc_dte_tables +ffffffff81d54760 t si_populate_smc_tdp_limits +ffffffff81d54960 t si_populate_smc_tdp_limits_2 +ffffffff81d54a30 t si_program_response_times +ffffffff81d54b50 t si_program_ds_registers +ffffffff81d54be0 t si_dpm_start_smc +ffffffff81d54c10 t si_enable_auto_throttle_source +ffffffff81d54da0 t si_thermal_start_thermal_controller +ffffffff81d55270 T si_dpm_late_enable +ffffffff81d553c0 T si_dpm_disable +ffffffff81d55740 t si_enable_power_containment +ffffffff81d55810 t si_enable_smc_cac +ffffffff81d55970 T si_dpm_pre_set_power_state +ffffffff81d564e0 T si_dpm_set_power_state +ffffffff81d56a40 t si_halt_smc +ffffffff81d56aa0 t si_upload_sw_state +ffffffff81d57400 t si_upload_smc_data +ffffffff81d57540 t si_upload_ulv_state +ffffffff81d57680 t si_upload_mc_reg_table +ffffffff81d578d0 t si_set_pcie_lane_width_in_smc +ffffffff81d57970 t si_resume_smc +ffffffff81d579d0 t si_set_vce_clock +ffffffff81d57a70 t si_notify_link_speed_change_after_state_change +ffffffff81d57ba0 t si_set_power_state_conditionally_enable_ulv +ffffffff81d57c80 t si_power_control_set_level +ffffffff81d57e10 T si_dpm_post_set_power_state +ffffffff81d57e40 T si_dpm_display_configuration_changed +ffffffff81d57f20 T si_dpm_init +ffffffff81d59960 T si_dpm_fini +ffffffff81d59a10 T si_dpm_debugfs_print_current_performance_level +ffffffff81d59a60 T si_dpm_get_current_sclk +ffffffff81d59ad0 T si_dpm_get_current_mclk +ffffffff81d59b40 t si_do_program_memory_timing_parameters +ffffffff81d59cd0 t si_populate_mvdd_value +ffffffff81d59d50 t si_convert_power_level_to_smc +ffffffff81d5a5f0 t si_calculate_sclk_params +ffffffff81d5a820 t si_program_cac_config_registers +ffffffff81d5b000 T si_copy_bytes_to_smc +ffffffff81d5b240 T si_start_smc +ffffffff81d5b280 T si_reset_smc +ffffffff81d5b2c0 T si_program_jump_on_start +ffffffff81d5b2f0 T si_stop_smc_clock +ffffffff81d5b330 T si_start_smc_clock +ffffffff81d5b370 T si_is_smc_running +ffffffff81d5b3d0 T si_send_msg_to_smc +ffffffff81d5b4a0 T si_wait_for_smc_inactive +ffffffff81d5b540 T si_load_smc_ucode +ffffffff81d5b6e0 T si_read_smc_sram_dword +ffffffff81d5b7b0 T si_write_smc_sram_dword +ffffffff81d5c000 T sumo_get_pi +ffffffff81d5c030 T sumo_gfx_clockgating_initialize +ffffffff81d5c110 T sumo_program_vc +ffffffff81d5c150 T sumo_clear_vc +ffffffff81d5c190 T sumo_program_sstp +ffffffff81d5c210 T sumo_take_smu_control +ffffffff81d5c240 T sumo_get_sleep_divider_from_id +ffffffff81d5c270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d5c320 T sumo_dpm_enable +ffffffff81d5c9b0 T sumo_dpm_late_enable +ffffffff81d5cf70 T sumo_dpm_disable +ffffffff81d5d2c0 T sumo_dpm_pre_set_power_state +ffffffff81d5d7b0 T sumo_dpm_set_power_state +ffffffff81d5e260 T sumo_dpm_post_set_power_state +ffffffff81d5e300 T sumo_dpm_setup_asic +ffffffff81d5e400 T sumo_dpm_display_configuration_changed +ffffffff81d5e430 T sumo_convert_vid2_to_vid7 +ffffffff81d5e480 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d5e540 T sumo_construct_vid_mapping_table +ffffffff81d5e6b0 T sumo_dpm_init +ffffffff81d5ef80 T sumo_dpm_print_power_state +ffffffff81d5f0a0 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d5f0d0 T sumo_dpm_get_current_sclk +ffffffff81d5f140 T sumo_dpm_get_current_mclk +ffffffff81d5f170 T sumo_dpm_get_current_vddc +ffffffff81d5f240 T sumo_dpm_fini +ffffffff81d5f2d0 T sumo_dpm_get_sclk +ffffffff81d5f320 T sumo_dpm_get_mclk +ffffffff81d5f350 T sumo_dpm_force_performance_level +ffffffff81d5f740 t sumo_power_level_enable +ffffffff81d5f970 t sumo_program_power_level +ffffffff81d60000 T sumo_initialize_m3_arb +ffffffff81d602c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d60360 t sumo_send_msg_to_smu +ffffffff81d604f0 T sumo_smu_pg_init +ffffffff81d60510 T sumo_enable_boost_timer +ffffffff81d60640 T sumo_set_tdp_limit +ffffffff81d606c0 T sumo_boost_state_enable +ffffffff81d60710 T sumo_get_running_fw_version +ffffffff81d61000 T trinity_dpm_enable_bapm +ffffffff81d61080 T trinity_dpm_enable +ffffffff81d61520 T trinity_dpm_late_enable +ffffffff81d61a60 T trinity_dpm_disable +ffffffff81d61e50 T trinity_dpm_force_performance_level +ffffffff81d61f00 T trinity_dpm_pre_set_power_state +ffffffff81d624c0 T trinity_dpm_set_power_state +ffffffff81d62a30 T trinity_dpm_post_set_power_state +ffffffff81d62ad0 T trinity_dpm_setup_asic +ffffffff81d62b30 T trinity_dpm_display_configuration_changed +ffffffff81d62bc0 T trinity_dpm_init +ffffffff81d634b0 T trinity_dpm_print_power_state +ffffffff81d635c0 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d63650 T trinity_dpm_get_current_sclk +ffffffff81d636b0 T trinity_dpm_get_current_mclk +ffffffff81d636e0 T trinity_dpm_fini +ffffffff81d63780 T trinity_dpm_get_sclk +ffffffff81d637d0 T trinity_dpm_get_mclk +ffffffff81d63800 t trinity_program_power_level +ffffffff81d64000 T trinity_dpm_bapm_enable +ffffffff81d64150 T trinity_dpm_config +ffffffff81d64230 T trinity_dpm_force_state +ffffffff81d64310 T trinity_dpm_n_levels_disabled +ffffffff81d643f0 T trinity_uvd_dpm_config +ffffffff81d644c0 T trinity_dpm_no_forced_level +ffffffff81d64590 T trinity_dce_enable_voltage_adjustment +ffffffff81d646e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d647b0 T trinity_acquire_mutex +ffffffff81d64840 T trinity_release_mutex +ffffffff81d65000 T uvd_v1_0_get_rptr +ffffffff81d65040 T uvd_v1_0_get_wptr +ffffffff81d65080 T uvd_v1_0_set_wptr +ffffffff81d650c0 T uvd_v1_0_fence_emit +ffffffff81d654b0 T uvd_v1_0_resume +ffffffff81d65610 T uvd_v1_0_init +ffffffff81d65b90 T uvd_v1_0_start +ffffffff81d66310 T uvd_v1_0_fini +ffffffff81d66480 T uvd_v1_0_stop +ffffffff81d665f0 T uvd_v1_0_ring_test +ffffffff81d667c0 T uvd_v1_0_semaphore_emit +ffffffff81d667f0 T uvd_v1_0_ib_execute +ffffffff81d66980 T uvd_v1_0_ib_test +ffffffff81d67000 T uvd_v2_2_fence_emit +ffffffff81d67450 T uvd_v2_2_semaphore_emit +ffffffff81d67650 T uvd_v2_2_resume +ffffffff81d68000 T uvd_v3_1_semaphore_emit +ffffffff81d69000 T uvd_v4_2_resume +ffffffff81d6a000 T vce_v1_0_get_rptr +ffffffff81d6a090 T vce_v1_0_get_wptr +ffffffff81d6a120 T vce_v1_0_set_wptr +ffffffff81d6a1b0 T vce_v1_0_enable_mgcg +ffffffff81d6a470 T vce_v1_0_load_fw +ffffffff81d6a640 T vce_v1_0_bo_size +ffffffff81d6a6b0 T vce_v1_0_resume +ffffffff81d6b020 T vce_v1_0_start +ffffffff81d6b7e0 T vce_v1_0_init +ffffffff81d6c000 T vce_v2_0_enable_mgcg +ffffffff81d6c070 t vce_v2_0_set_dyn_cg +ffffffff81d6c260 T vce_v2_0_bo_size +ffffffff81d6c2d0 T vce_v2_0_resume +ffffffff81d6d000 T aldebaran_reset_init +ffffffff81d6d0c0 t aldebaran_async_reset +ffffffff81d6d120 t aldebaran_get_reset_handler +ffffffff81d6d1c0 T aldebaran_reset_fini +ffffffff81d6d220 t aldebaran_mode2_prepare_hwcontext +ffffffff81d6d340 t aldebaran_mode2_perform_reset +ffffffff81d6d510 t aldebaran_mode2_restore_hwcontext +ffffffff81d6dac0 t aldebaran_mode2_reset +ffffffff81d6e000 T aldebaran_reg_base_init +ffffffff81d6f000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d6f040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d6f070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d6f180 T amdgpu_acpi_pcie_performance_request +ffffffff81d6f500 T amdgpu_acpi_power_shift_control +ffffffff81d6f640 T amdgpu_acpi_smart_shift_update +ffffffff81d6f6e0 T amdgpu_acpi_get_tmr_info +ffffffff81d6f770 T amdgpu_acpi_get_mem_info +ffffffff81d6f830 T amdgpu_acpi_init +ffffffff81d6f8e0 t amdgpu_acpi_event +ffffffff81d6fbf0 T amdgpu_acpi_get_backlight_caps +ffffffff81d6fc40 T amdgpu_acpi_fini +ffffffff81d6fc60 T amdgpu_acpi_should_gpu_reset +ffffffff81d6fcb0 T amdgpu_acpi_detect +ffffffff81d705f0 T amdgpu_acpi_release +ffffffff81d71000 T amdgpu_afmt_acr +ffffffff81d72000 T amdgpu_amdkfd_init +ffffffff81d72040 T amdgpu_amdkfd_fini +ffffffff81d72070 T amdgpu_amdkfd_device_probe +ffffffff81d720a0 T amdgpu_amdkfd_device_init +ffffffff81d72260 t amdgpu_amdkfd_reset_work +ffffffff81d722e0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d72330 T amdgpu_amdkfd_interrupt +ffffffff81d72360 T amdgpu_amdkfd_suspend +ffffffff81d72390 T amdgpu_amdkfd_resume +ffffffff81d723c0 T amdgpu_amdkfd_pre_reset +ffffffff81d723f0 T amdgpu_amdkfd_post_reset +ffffffff81d72420 T amdgpu_amdkfd_gpu_reset +ffffffff81d72480 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d72740 t amdgpu_bo_reserve +ffffffff81d728a0 t amdgpu_bo_unreserve +ffffffff81d72980 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d729f0 T amdgpu_amdkfd_alloc_gws +ffffffff81d72ad0 T amdgpu_amdkfd_free_gws +ffffffff81d72b10 T amdgpu_amdkfd_get_fw_version +ffffffff81d72bc0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d72d60 T amdgpu_amdkfd_xcp_memory_size +ffffffff81d72e00 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d72e40 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d72ea0 T amdgpu_amdkfd_get_cu_info +ffffffff81d72fb0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d73100 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d73170 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d73200 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d73360 T amdgpu_amdkfd_submit_ib +ffffffff81d734c0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d73510 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d73550 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d73680 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d736c0 T amdgpu_amdkfd_have_atomics_support +ffffffff81d736f0 T amdgpu_amdkfd_debug_mem_fence +ffffffff81d73710 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d73720 T amdgpu_amdkfd_send_close_event_drain_irq +ffffffff81d73740 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d73790 T amdgpu_amdkfd_check_and_lock_kfd +ffffffff81d737c0 T amdgpu_amdkfd_unlock_kfd +ffffffff81d737f0 T amdgpu_amdkfd_unmap_hiq +ffffffff81d74000 T amdgpu_atom_execute_table +ffffffff81d740a0 t amdgpu_atom_execute_table_locked +ffffffff81d743c0 T amdgpu_atom_parse +ffffffff81d74910 T amdgpu_atom_destroy +ffffffff81d74950 T amdgpu_atom_asic_init +ffffffff81d74a70 t get_u32 +ffffffff81d74ad0 T amdgpu_atom_parse_data_header +ffffffff81d74b70 T amdgpu_atom_parse_cmd_header +ffffffff81d74bf0 t atom_op_move +ffffffff81d74dc0 t atom_op_and +ffffffff81d74fa0 t atom_op_or +ffffffff81d75180 t atom_op_shift_left +ffffffff81d75360 t atom_op_shift_right +ffffffff81d75540 t atom_op_mul +ffffffff81d75690 t atom_op_div +ffffffff81d75800 t atom_op_add +ffffffff81d759e0 t atom_op_sub +ffffffff81d75bc0 t atom_op_setport +ffffffff81d75d40 t atom_op_setregblock +ffffffff81d75e00 t atom_op_setfbbase +ffffffff81d75ec0 t atom_op_compare +ffffffff81d760a0 t atom_op_switch +ffffffff81d762d0 t atom_op_jump +ffffffff81d76540 t atom_op_test +ffffffff81d76700 t atom_op_delay +ffffffff81d767e0 t atom_op_calltable +ffffffff81d76930 t atom_op_repeat +ffffffff81d76960 t atom_op_clear +ffffffff81d76a70 t atom_op_nop +ffffffff81d76aa0 t atom_op_eot +ffffffff81d76ad0 t atom_op_mask +ffffffff81d76d80 t atom_op_postcard +ffffffff81d76e30 t atom_op_beep +ffffffff81d76e50 t atom_op_savereg +ffffffff81d76e80 t atom_op_restorereg +ffffffff81d76eb0 t atom_op_setdatablock +ffffffff81d76ff0 t atom_op_xor +ffffffff81d771d0 t atom_op_shl +ffffffff81d773f0 t atom_op_shr +ffffffff81d77610 t atom_op_debug +ffffffff81d776c0 t atom_op_processds +ffffffff81d77780 t atom_op_mul32 +ffffffff81d778e0 t atom_op_div32 +ffffffff81d77a70 t atom_put_dst +ffffffff81d77f80 t atom_get_src_int +ffffffff81d78600 t atom_iio_execute +ffffffff81d79000 T amdgpu_atombios_lookup_i2c_gpio +ffffffff81d79260 T amdgpu_atombios_i2c_init +ffffffff81d79520 T amdgpu_atombios_lookup_gpio +ffffffff81d79620 T amdgpu_atombios_has_dce_engine_info +ffffffff81d796a0 T amdgpu_atombios_get_connector_info_from_object_table +ffffffff81d79f00 T amdgpu_atombios_get_clock_info +ffffffff81d7a240 T amdgpu_atombios_get_gfx_info +ffffffff81d7a300 T amdgpu_atombios_get_vram_width +ffffffff81d7a390 T amdgpu_atombios_get_asic_ss_info +ffffffff81d7a670 t amdgpu_atombios_get_igp_ss_overrides +ffffffff81d7a790 T amdgpu_atombios_get_clock_dividers +ffffffff81d7a9b0 T amdgpu_atombios_has_gpu_virtualization_table +ffffffff81d7aa00 T amdgpu_atombios_scratch_regs_lock +ffffffff81d7aa60 T amdgpu_atombios_scratch_regs_engine_hung +ffffffff81d7aab0 T amdgpu_atombios_scratch_regs_set_backlight_level +ffffffff81d7ab10 T amdgpu_atombios_scratch_need_asic_init +ffffffff81d7ab60 T amdgpu_atombios_copy_swap +ffffffff81d7ab80 T amdgpu_atombios_sysfs_init +ffffffff81d7abb0 T amdgpu_atombios_fini +ffffffff81d7ac60 T amdgpu_atombios_init +ffffffff81d7af00 t cail_reg_read +ffffffff81d7af20 t cail_reg_write +ffffffff81d7af40 t cail_mc_read +ffffffff81d7af70 t cail_mc_write +ffffffff81d7afa0 t cail_pll_read +ffffffff81d7afd0 t cail_pll_write +ffffffff81d7b000 T amdgpu_atombios_get_data_table +ffffffff81d7c000 T amdgpu_atombios_crtc_overscan_setup +ffffffff81d7c150 T amdgpu_atombios_crtc_scaler_setup +ffffffff81d7c1d0 T amdgpu_atombios_crtc_lock +ffffffff81d7c230 T amdgpu_atombios_crtc_enable +ffffffff81d7c290 T amdgpu_atombios_crtc_blank +ffffffff81d7c2f0 T amdgpu_atombios_crtc_powergate +ffffffff81d7c360 T amdgpu_atombios_crtc_powergate_init +ffffffff81d7c3d0 T amdgpu_atombios_crtc_set_dtd_timing +ffffffff81d7c500 T amdgpu_atombios_crtc_set_disp_eng_pll +ffffffff81d7c5f0 T amdgpu_atombios_crtc_set_dce_clock +ffffffff81d7c6e0 T amdgpu_atombios_crtc_program_pll +ffffffff81d7ca00 T amdgpu_atombios_crtc_prepare_pll +ffffffff81d7cf00 T amdgpu_atombios_crtc_set_pll +ffffffff81d7e000 T amdgpu_atombios_dp_aux_init +ffffffff81d7e090 t amdgpu_atombios_dp_aux_transfer +ffffffff81d7e200 T amdgpu_atombios_dp_get_sinktype +ffffffff81d7e270 T amdgpu_atombios_dp_get_dpcd +ffffffff81d7e420 T amdgpu_atombios_dp_get_panel_mode +ffffffff81d7e510 T amdgpu_atombios_dp_set_link_config +ffffffff81d7e590 t amdgpu_atombios_dp_get_dp_link_config +ffffffff81d7e720 T amdgpu_atombios_dp_mode_valid_helper +ffffffff81d7e7a0 T amdgpu_atombios_dp_needs_link_train +ffffffff81d7e810 T amdgpu_atombios_dp_set_rx_power_state +ffffffff81d7e890 T amdgpu_atombios_dp_link_train +ffffffff81d7edf0 t amdgpu_atombios_dp_process_aux_ch +ffffffff81d7ef50 t amdgpu_atombios_dp_get_adjust_train +ffffffff81d80000 T amdgpu_atombios_encoder_get_backlight_level_from_reg +ffffffff81d80050 T amdgpu_atombios_encoder_set_backlight_level_to_reg +ffffffff81d800a0 T amdgpu_atombios_encoder_get_backlight_level +ffffffff81d80100 T amdgpu_atombios_encoder_set_backlight_level +ffffffff81d80210 T amdgpu_atombios_encoder_setup_dig_transmitter +ffffffff81d80c30 T amdgpu_atombios_encoder_init_backlight +ffffffff81d80dd0 t amdgpu_atombios_encoder_get_backlight_brightness +ffffffff81d80e30 T amdgpu_atombios_encoder_fini_backlight +ffffffff81d80ec0 T amdgpu_atombios_encoder_is_digital +ffffffff81d80f10 T amdgpu_atombios_encoder_mode_fixup +ffffffff81d80ff0 T amdgpu_atombios_encoder_get_encoder_mode +ffffffff81d81190 T amdgpu_atombios_encoder_setup_dig_encoder +ffffffff81d81670 t amdgpu_atombios_encoder_get_bpc +ffffffff81d816c0 T amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81d817c0 T amdgpu_atombios_encoder_dpms +ffffffff81d81930 t amdgpu_atombios_encoder_setup_dig +ffffffff81d81ce0 t amdgpu_atombios_encoder_setup_dvo +ffffffff81d81e90 T amdgpu_atombios_encoder_set_crtc_source +ffffffff81d82270 T amdgpu_atombios_encoder_init_dig +ffffffff81d82340 t amdgpu_atombios_encoder_setup_external_encoder +ffffffff81d825b0 T amdgpu_atombios_encoder_dac_detect +ffffffff81d82770 T amdgpu_atombios_encoder_dig_detect +ffffffff81d82870 T amdgpu_atombios_encoder_setup_ext_encoder_ddc +ffffffff81d828c0 T amdgpu_atombios_encoder_set_bios_scratch_regs +ffffffff81d82e10 T amdgpu_atombios_encoder_get_lcd_info +ffffffff81d83170 T amdgpu_atombios_encoder_get_dig_info +ffffffff81d831e0 t amdgpu_atombios_encoder_update_backlight_status +ffffffff81d84000 T amdgpu_atombios_i2c_xfer +ffffffff81d84370 T amdgpu_atombios_i2c_func +ffffffff81d843a0 T amdgpu_atombios_i2c_channel_trans +ffffffff81d85000 T amdgpu_atomfirmware_query_firmware_capability +ffffffff81d850a0 T amdgpu_atomfirmware_gpu_virtualization_supported +ffffffff81d850e0 T amdgpu_atomfirmware_scratch_regs_init +ffffffff81d85160 T amdgpu_atomfirmware_allocate_fb_scratch +ffffffff81d85360 T amdgpu_atomfirmware_get_vram_info +ffffffff81d85800 t convert_atom_mem_type_to_vram_type +ffffffff81d85880 T amdgpu_atomfirmware_mem_ecc_supported +ffffffff81d85950 T amdgpu_atomfirmware_sram_ecc_supported +ffffffff81d85990 T amdgpu_atomfirmware_dynamic_boot_config_supported +ffffffff81d859d0 T amdgpu_atomfirmware_ras_rom_addr +ffffffff81d85a80 T amdgpu_atomfirmware_get_clock_info +ffffffff81d85cd0 T amdgpu_atomfirmware_get_gfx_info +ffffffff81d85e50 T amdgpu_atomfirmware_mem_training_supported +ffffffff81d85e90 T amdgpu_atomfirmware_get_fw_reserved_fb_size +ffffffff81d85f20 T amdgpu_atomfirmware_asic_init +ffffffff81d87000 T amdgpu_benchmark +ffffffff81d87790 t amdgpu_benchmark_move +ffffffff81d88000 T amdgpu_read_bios +ffffffff81d88190 t check_atom_bios +ffffffff81d882a0 T amdgpu_get_bios +ffffffff81d887c0 t igp_read_bios_from_vram +ffffffff81d88900 t amdgpu_read_platform_bios +ffffffff81d889d0 T amdgpu_soc15_read_bios_from_rom +ffffffff81d89000 T amdgpu_bo_list_create +ffffffff81d89270 t amdgpu_bo_list_entry_cmp +ffffffff81d892b0 T amdgpu_bo_list_get +ffffffff81d89320 T amdgpu_bo_list_put +ffffffff81d893d0 T amdgpu_bo_create_list_entry_array +ffffffff81d89520 T amdgpu_bo_list_ioctl +ffffffff81d8a000 T amdgpu_cgs_create_device +ffffffff81d8a080 T amdgpu_cgs_destroy_device +ffffffff81d8a0a0 t amdgpu_cgs_read_register +ffffffff81d8a0c0 t amdgpu_cgs_write_register +ffffffff81d8a0e0 t amdgpu_cgs_read_ind_register +ffffffff81d8a1c0 t amdgpu_cgs_write_ind_register +ffffffff81d8a270 t amdgpu_cgs_get_firmware_info +ffffffff81d8b000 T amdgpu_connector_hotplug +ffffffff81d8b110 T amdgpu_connector_get_monitor_bpc +ffffffff81d8b3a0 T amdgpu_connector_edid +ffffffff81d8b450 T amdgpu_connector_encoder_get_dp_bridge_encoder_id +ffffffff81d8b4d0 T amdgpu_connector_is_dp12_capable +ffffffff81d8b560 T amdgpu_connector_add +ffffffff81d8c150 t amdgpu_connector_dp_detect +ffffffff81d8c4a0 t amdgpu_connector_dvi_force +ffffffff81d8c4f0 t amdgpu_connector_set_property +ffffffff81d8ca60 t amdgpu_connector_late_register +ffffffff81d8cac0 t amdgpu_connector_unregister +ffffffff81d8cb20 t amdgpu_connector_destroy +ffffffff81d8cb90 t amdgpu_connector_best_single_encoder +ffffffff81d8cc00 t amdgpu_connector_dp_get_modes +ffffffff81d8cf00 t amdgpu_connector_dp_mode_valid +ffffffff81d8d010 t amdgpu_connector_dvi_encoder +ffffffff81d8d0d0 t amdgpu_connector_get_edid +ffffffff81d8d250 t amdgpu_connector_fixup_lcd_native_mode +ffffffff81d8d390 t amdgpu_connector_add_common_modes +ffffffff81d8d480 t amdgpu_connector_lcd_native_mode +ffffffff81d8d560 t amdgpu_connector_set_lcd_property +ffffffff81d8d650 t amdgpu_connector_vga_detect +ffffffff81d8d890 t amdgpu_connector_vga_get_modes +ffffffff81d8d970 t amdgpu_connector_vga_mode_valid +ffffffff81d8d9c0 t amdgpu_connector_dvi_detect +ffffffff81d8de70 t amdgpu_connector_dvi_mode_valid +ffffffff81d8df20 t amdgpu_connector_lvds_detect +ffffffff81d8e060 t amdgpu_connector_lvds_get_modes +ffffffff81d8e1a0 t amdgpu_connector_lvds_mode_valid +ffffffff81d8f000 T amdgpu_cs_report_moved_bytes +ffffffff81d8f070 T amdgpu_cs_ioctl +ffffffff81d8fda0 t amdgpu_cs_parser_bos +ffffffff81d90580 t amdgpu_cs_patch_jobs +ffffffff81d907b0 t amdgpu_cs_vm_handling +ffffffff81d909f0 t amdgpu_cs_sync_rings +ffffffff81d90ba0 t amdgpu_cs_submit +ffffffff81d90f40 t amdgpu_cs_parser_fini +ffffffff81d910b0 T amdgpu_cs_wait_ioctl +ffffffff81d911f0 T amdgpu_cs_fence_to_handle_ioctl +ffffffff81d91390 t amdgpu_cs_get_fence +ffffffff81d91440 T amdgpu_cs_wait_fences_ioctl +ffffffff81d91740 T amdgpu_cs_find_mapping +ffffffff81d91840 t amdgpu_cs_p1_ib +ffffffff81d91950 t amdgpu_cs_p1_user_fence +ffffffff81d91a20 t amdgpu_cs_p1_bo_handles +ffffffff81d91ab0 t amdgpu_cs_bo_validate +ffffffff81d92000 T amdgpu_csa_vaddr +ffffffff81d92060 T amdgpu_allocate_static_csa +ffffffff81d92100 T amdgpu_free_static_csa +ffffffff81d92120 T amdgpu_map_static_csa +ffffffff81d92270 T amdgpu_unmap_static_csa +ffffffff81d93000 T amdgpu_ctx_priority_is_valid +ffffffff81d93060 T amdgpu_ctx_get_entity +ffffffff81d934a0 T amdgpu_ctx_ioctl +ffffffff81d93b60 T amdgpu_ctx_get +ffffffff81d93be0 T amdgpu_ctx_put +ffffffff81d93d50 T amdgpu_ctx_add_fence +ffffffff81d93ed0 T amdgpu_ctx_get_fence +ffffffff81d93f80 T amdgpu_ctx_priority_override +ffffffff81d941a0 T amdgpu_ctx_wait_prev_fence +ffffffff81d94250 T amdgpu_ctx_mgr_init +ffffffff81d942f0 T amdgpu_ctx_mgr_entity_flush +ffffffff81d94400 T amdgpu_ctx_mgr_entity_fini +ffffffff81d946b0 T amdgpu_ctx_mgr_fini +ffffffff81d94760 t amdgpu_ctx_fini +ffffffff81d94930 T amdgpu_ctx_mgr_usage +ffffffff81d94b70 t amdgpu_ctx_set_stable_pstate +ffffffff81d95000 T amdgpu_debugfs_init +ffffffff81d95030 T amdgpu_debugfs_regs_init +ffffffff81d96000 T amdgpu_device_supports_px +ffffffff81d96040 T amdgpu_device_supports_boco +ffffffff81d96070 T amdgpu_device_supports_baco +ffffffff81d960a0 T amdgpu_device_supports_smart_shift +ffffffff81d960e0 T amdgpu_device_mm_access +ffffffff81d96340 T amdgpu_device_wreg +ffffffff81d96440 T amdgpu_device_rreg +ffffffff81d96520 T amdgpu_device_aper_access +ffffffff81d96660 T amdgpu_device_flush_hdp +ffffffff81d96700 T amdgpu_device_invalidate_hdp +ffffffff81d96780 T amdgpu_device_vram_access +ffffffff81d96810 T amdgpu_device_skip_hw_access +ffffffff81d96840 T amdgpu_mm_rreg8 +ffffffff81d968c0 T amdgpu_mm_wreg8 +ffffffff81d96940 T amdgpu_mm_wreg_mmio_rlc +ffffffff81d96a40 T amdgpu_device_indirect_rreg +ffffffff81d96ae0 T amdgpu_device_indirect_rreg_ext +ffffffff81d96be0 T amdgpu_device_indirect_rreg64 +ffffffff81d96ca0 T amdgpu_device_indirect_wreg +ffffffff81d96d30 T amdgpu_device_indirect_wreg_ext +ffffffff81d96e20 T amdgpu_device_indirect_wreg64 +ffffffff81d96ed0 T amdgpu_device_get_rev_id +ffffffff81d96ef0 T amdgpu_device_program_register_sequence +ffffffff81d97140 T amdgpu_device_pci_config_reset +ffffffff81d97170 T amdgpu_device_pci_reset +ffffffff81d971c0 T amdgpu_device_wb_get +ffffffff81d97270 T amdgpu_device_wb_free +ffffffff81d972c0 T amdgpu_device_resize_fb_bar +ffffffff81d972f0 T amdgpu_device_need_post +ffffffff81d974a0 T amdgpu_device_pcie_dynamic_switching_supported +ffffffff81d974f0 T amdgpu_device_should_use_aspm +ffffffff81d97540 T amdgpu_device_aspm_support_quirk +ffffffff81d97590 T amdgpu_device_ip_set_clockgating_state +ffffffff81d97680 T amdgpu_device_ip_set_powergating_state +ffffffff81d97770 T amdgpu_device_ip_get_clockgating_state +ffffffff81d97810 T amdgpu_device_ip_wait_for_idle +ffffffff81d97890 T amdgpu_device_ip_is_idle +ffffffff81d97900 T amdgpu_device_ip_get_ip_block +ffffffff81d97960 T amdgpu_device_ip_block_version_cmp +ffffffff81d979e0 T amdgpu_device_ip_block_add +ffffffff81d97a90 T amdgpu_device_set_sriov_virtual_display +ffffffff81d97b00 T amdgpu_device_set_cg_state +ffffffff81d97c40 T amdgpu_device_set_pg_state +ffffffff81d97d80 T amdgpu_device_ip_suspend +ffffffff81d97e10 t amdgpu_device_ip_suspend_phase1 +ffffffff81d980c0 t amdgpu_device_ip_suspend_phase2 +ffffffff81d98270 T amdgpu_device_asic_has_dc_support +ffffffff81d982d0 T amdgpu_device_has_dc_support +ffffffff81d98350 T amdgpu_device_init +ffffffff81d99e20 t amdgpu_invalid_rreg +ffffffff81d99e60 t amdgpu_invalid_wreg +ffffffff81d99ea0 t amdgpu_invalid_rreg_ext +ffffffff81d99ee0 t amdgpu_invalid_wreg_ext +ffffffff81d99f20 t amdgpu_invalid_rreg64 +ffffffff81d99f60 t amdgpu_invalid_wreg64 +ffffffff81d99fa0 t amdgpu_block_invalid_rreg +ffffffff81d99fe0 t amdgpu_block_invalid_wreg +ffffffff81d9a020 t amdgpu_device_delayed_init_work_handler +ffffffff81d9a080 t amdgpu_device_delay_enable_gfx_off +ffffffff81d9a160 t amdgpu_device_xgmi_reset_func +ffffffff81d9a460 t amdgpu_device_detect_sriov_bios +ffffffff81d9a4f0 t amdgpu_device_asic_init +ffffffff81d9a560 t amdgpu_device_ip_init +ffffffff81d9ab20 t amdgpu_device_ip_late_init +ffffffff81d9af30 T amdgpu_device_cache_pci_state +ffffffff81d9af60 T amdgpu_device_fini_hw +ffffffff81d9b420 t amdgpu_device_unmap_mmio +ffffffff81d9b510 T amdgpu_device_fini_sw +ffffffff81d9b890 T amdgpu_device_prepare +ffffffff81d9b9a0 T amdgpu_device_suspend +ffffffff81d9bb40 T amdgpu_device_resume +ffffffff81d9beb0 T amdgpu_device_has_job_running +ffffffff81d9bf80 T amdgpu_device_should_recover_gpu +ffffffff81d9c000 T amdgpu_device_mode1_reset +ffffffff81d9c160 T amdgpu_device_load_pci_state +ffffffff81d9c1b0 T amdgpu_device_pre_asic_reset +ffffffff81d9c680 T amdgpu_do_asic_reset +ffffffff81d9cd00 t amdgpu_device_ip_resume_phase1 +ffffffff81d9ce00 t amdgpu_device_fw_loading +ffffffff81d9cf60 t amdgpu_device_recover_vram +ffffffff81d9d140 T amdgpu_device_gpu_recover +ffffffff81d9dea0 T amdgpu_device_is_peer_accessible +ffffffff81d9ded0 T amdgpu_device_baco_enter +ffffffff81d9df80 T amdgpu_device_baco_exit +ffffffff81d9e060 T amdgpu_pci_error_detected +ffffffff81d9e0b0 T amdgpu_pci_mmio_enabled +ffffffff81d9e100 T amdgpu_pci_slot_reset +ffffffff81d9e150 T amdgpu_pci_resume +ffffffff81d9e170 T amdgpu_in_reset +ffffffff81d9e1a0 T amdgpu_device_halt +ffffffff81d9e1f0 T amdgpu_device_pcie_port_rreg +ffffffff81d9e420 T amdgpu_device_pcie_port_wreg +ffffffff81d9e6e0 T amdgpu_device_switch_gang +ffffffff81d9e770 T amdgpu_device_has_display_hardware +ffffffff81d9e7d0 T amdgpu_device_wait_on_rreg +ffffffff81d9e9d0 t __delayed_work_tick +ffffffff81d9e9f0 t amdgpu_device_ip_hw_init_phase2 +ffffffff81d9ead0 t amdgpu_device_init_schedulers +ffffffff81d9f000 T amdgpu_discovery_fini +ffffffff81d9f050 T amdgpu_discovery_set_ip_blocks +ffffffff81da14c0 t amdgpu_discovery_set_psp_ip_blocks +ffffffff81da1600 t amdgpu_discovery_set_ih_ip_blocks +ffffffff81da1740 t amdgpu_discovery_set_smu_ip_blocks +ffffffff81da1850 t amdgpu_discovery_set_display_ip_blocks +ffffffff81da19f0 t amdgpu_discovery_set_gc_ip_blocks +ffffffff81da1b20 t amdgpu_discovery_set_sdma_ip_blocks +ffffffff81da1c60 t amdgpu_discovery_set_mm_ip_blocks +ffffffff81da2000 t amdgpu_discovery_set_mes_ip_blocks +ffffffff81da3000 T amdgpu_display_hotplug_work_func +ffffffff81da30a0 T amdgpu_display_crtc_page_flip_target +ffffffff81da34b0 t amdgpu_display_flip_work_func +ffffffff81da36f0 t amdgpu_display_unpin_work_func +ffffffff81da3780 t amdgpu_bo_reserve +ffffffff81da3980 T amdgpu_display_supported_domains +ffffffff81da39f0 t amdgpu_bo_unreserve +ffffffff81da3ad0 T amdgpu_display_crtc_set_config +ffffffff81da3b90 T amdgpu_display_print_display_setup +ffffffff81da3fb0 T amdgpu_display_ddc_probe +ffffffff81da4070 T amdgpu_lookup_format_info +ffffffff81da42e0 T amdgpu_display_user_framebuffer_create +ffffffff81da50b0 T amdgpu_display_modeset_create_props +ffffffff81da5280 T amdgpu_display_update_priority +ffffffff81da52c0 T amdgpu_display_crtc_scaling_mode_fixup +ffffffff81da5540 T amdgpu_display_get_crtc_scanoutpos +ffffffff81da5750 T amdgpu_display_crtc_idx_to_irq_type +ffffffff81da57a0 T amdgpu_crtc_get_scanout_position +ffffffff81da5810 T amdgpu_display_suspend_helper +ffffffff81da5990 T amdgpu_display_resume_helper +ffffffff81da5af0 t __delayed_work_tick +ffffffff81da5b10 t amdgpu_display_flip_callback +ffffffff81da5b50 t amdgpu_display_verify_plane +ffffffff81da5d40 t get_dcc_block_size +ffffffff81da5de0 t amdgpu_dirtyfb +ffffffff81da6000 T amdgpu_gem_prime_export +ffffffff81da6080 T amdgpu_gem_prime_import +ffffffff81da6360 T amdgpu_dmabuf_is_xgmi_accessible +ffffffff81da7000 T amdgpu_mm_rdoorbell +ffffffff81da7080 T amdgpu_mm_wdoorbell +ffffffff81da7110 T amdgpu_mm_rdoorbell64 +ffffffff81da7190 T amdgpu_mm_wdoorbell64 +ffffffff81da7220 T amdgpu_doorbell_index_on_bar +ffffffff81da7280 T amdgpu_doorbell_create_kernel_doorbells +ffffffff81da7350 T amdgpu_doorbell_init +ffffffff81da7460 T amdgpu_doorbell_fini +ffffffff81da8000 t amdgpu_drv_delayed_reset_work_handler +ffffffff81da8360 t __delayed_work_tick +ffffffff81da8380 T amdgpu_file_to_fpriv +ffffffff81da83d0 T amdgpu_probe +ffffffff81da8500 T amdgpu_attach +ffffffff81da8b80 T amdgpu_detach +ffffffff81da8c20 T amdgpu_activate +ffffffff81da8ce0 T amdgpu_attachhook +ffffffff81da90e0 T amdgpu_forcedetach +ffffffff81da91a0 T amdgpu_wsioctl +ffffffff81da92d0 T amdgpu_wsmmap +ffffffff81da9300 T amdgpu_alloc_screen +ffffffff81da9330 T amdgpu_free_screen +ffffffff81da9340 T amdgpu_show_screen +ffffffff81da9410 T amdgpu_burner +ffffffff81da9490 T amdgpu_enter_ddb +ffffffff81da94f0 T amdgpu_doswitch +ffffffff81da9570 T amdgpu_init_backlight +ffffffff81da9690 T amdgpu_burner_cb +ffffffff81daa000 T amdgpu_eeprom_read +ffffffff81daa020 t amdgpu_eeprom_xfer +ffffffff81daa190 T amdgpu_eeprom_write +ffffffff81daa1b0 t __amdgpu_eeprom_xfer +ffffffff81dab000 T amdgpu_link_encoder_connector +ffffffff81dab0e0 T amdgpu_encoder_set_active_device +ffffffff81dab1a0 T amdgpu_get_connector_for_encoder +ffffffff81dab230 T amdgpu_get_connector_for_encoder_init +ffffffff81dab2c0 T amdgpu_get_external_encoder +ffffffff81dab350 T amdgpu_encoder_get_dp_bridge_encoder_id +ffffffff81dab3f0 T amdgpu_panel_mode_fixup +ffffffff81dab570 T amdgpu_dig_monitor_is_duallink +ffffffff81dac000 T amdgpu_show_fdinfo +ffffffff81dad000 T amdgpu_fence_slab_init +ffffffff81dad060 T amdgpu_fence_slab_fini +ffffffff81dad080 T amdgpu_fence_emit +ffffffff81dad2c0 T amdgpu_fence_emit_polling +ffffffff81dad3d0 T amdgpu_fence_wait_polling +ffffffff81dad480 T amdgpu_fence_process +ffffffff81dad5b0 T amdgpu_fence_wait_empty +ffffffff81dad630 T amdgpu_fence_count_emitted +ffffffff81dad660 T amdgpu_fence_last_unsignaled_time_us +ffffffff81dad770 T amdgpu_fence_update_start_timestamp +ffffffff81dad7e0 T amdgpu_fence_driver_start_ring +ffffffff81dad8b0 T amdgpu_fence_driver_init_ring +ffffffff81dad9a0 t amdgpu_fence_fallback +ffffffff81dada00 T amdgpu_fence_driver_sw_init +ffffffff81dada30 T amdgpu_fence_driver_hw_fini +ffffffff81dadc60 T amdgpu_fence_driver_force_completion +ffffffff81dadcf0 T amdgpu_fence_driver_isr_toggle +ffffffff81dadd10 T amdgpu_fence_driver_sw_fini +ffffffff81daddf0 T amdgpu_fence_driver_hw_init +ffffffff81dadeb0 T amdgpu_fence_driver_clear_job_fences +ffffffff81dadf60 T amdgpu_fence_driver_set_error +ffffffff81dadfe0 T amdgpu_debugfs_fence_init +ffffffff81dae010 t amdgpu_fence_get_driver_name +ffffffff81dae040 t amdgpu_fence_get_timeline_name +ffffffff81dae0a0 t amdgpu_fence_enable_signaling +ffffffff81dae140 t amdgpu_fence_release +ffffffff81dae180 t amdgpu_job_fence_get_timeline_name +ffffffff81dae1c0 t amdgpu_job_fence_enable_signaling +ffffffff81dae240 t amdgpu_job_fence_release +ffffffff81daf000 T amdgpu_fru_get_product_info +ffffffff81daf370 t is_fru_eeprom_supported +ffffffff81daf4c0 T amdgpu_fru_sysfs_init +ffffffff81daf500 T amdgpu_fru_sysfs_fini +ffffffff81db0000 T amdgpu_fw_attestation_debugfs_init +ffffffff81db1000 T amdgpu_gart_dummy_page_fini +ffffffff81db1040 T amdgpu_gart_table_ram_alloc +ffffffff81db1090 T amdgpu_gart_table_ram_free +ffffffff81db1370 T amdgpu_gart_table_vram_alloc +ffffffff81db13e0 T amdgpu_gart_table_vram_free +ffffffff81db1410 T amdgpu_gart_unbind +ffffffff81db1590 T amdgpu_gart_map +ffffffff81db1660 T amdgpu_gart_bind +ffffffff81db1730 T amdgpu_gart_invalidate_tlb +ffffffff81db1840 T amdgpu_gart_init +ffffffff81db2000 T amdgpu_gem_fault +ffffffff81db21b0 T amdgpu_gem_vm_reference +ffffffff81db21e0 T amdgpu_gem_vm_detach +ffffffff81db21f0 T amdgpu_gem_object_create +ffffffff81db22b0 T amdgpu_gem_force_release +ffffffff81db2440 T amdgpu_gem_create_ioctl +ffffffff81db2900 t amdgpu_bo_reserve +ffffffff81db2a80 t amdgpu_bo_unreserve +ffffffff81db2b60 T amdgpu_gem_userptr_ioctl +ffffffff81db2b90 T amdgpu_mode_dumb_mmap +ffffffff81db2c50 T amdgpu_gem_mmap_ioctl +ffffffff81db2d10 T amdgpu_gem_timeout +ffffffff81db2de0 T amdgpu_gem_wait_idle_ioctl +ffffffff81db2f40 T amdgpu_gem_metadata_ioctl +ffffffff81db3080 T amdgpu_gem_va_map_flags +ffffffff81db3100 T amdgpu_gem_va_ioctl +ffffffff81db3400 t amdgpu_gem_va_update_vm +ffffffff81db34c0 T amdgpu_gem_op_ioctl +ffffffff81db36c0 T amdgpu_mode_dumb_create +ffffffff81db3870 T amdgpu_debugfs_gem_init +ffffffff81db38a0 t amdgpu_gem_object_free +ffffffff81db38f0 t amdgpu_gem_object_open +ffffffff81db39b0 t amdgpu_gem_object_close +ffffffff81db3bd0 t amdgpu_gem_object_mmap +ffffffff81db4000 T amdgpu_gfx_mec_queue_to_bit +ffffffff81db4040 T amdgpu_queue_mask_bit_to_mec_queue +ffffffff81db40b0 T amdgpu_gfx_is_mec_queue_enabled +ffffffff81db4120 T amdgpu_gfx_me_queue_to_bit +ffffffff81db4160 T amdgpu_gfx_bit_to_me_queue +ffffffff81db41d0 T amdgpu_gfx_is_me_queue_enabled +ffffffff81db4220 T amdgpu_gfx_parse_disable_cu +ffffffff81db4240 T amdgpu_gfx_is_high_priority_graphics_queue +ffffffff81db42d0 T amdgpu_gfx_is_high_priority_compute_queue +ffffffff81db4310 T amdgpu_gfx_compute_queue_acquire +ffffffff81db4500 T amdgpu_gfx_graphics_queue_acquire +ffffffff81db4730 T amdgpu_gfx_kiq_init_ring +ffffffff81db4980 T amdgpu_gfx_kiq_free_ring +ffffffff81db4990 T amdgpu_gfx_kiq_fini +ffffffff81db49d0 T amdgpu_gfx_kiq_init +ffffffff81db4cf0 T amdgpu_gfx_mqd_sw_init +ffffffff81db5080 T amdgpu_gfx_mqd_sw_fini +ffffffff81db51e0 T amdgpu_gfx_disable_kcq +ffffffff81db5350 T amdgpu_gfx_disable_kgq +ffffffff81db54d0 T amdgpu_gfx_is_master_xcc +ffffffff81db5520 T amdgpu_queue_mask_bit_to_set_resource_bit +ffffffff81db5570 T amdgpu_gfx_enable_kcq +ffffffff81db57e0 T amdgpu_gfx_enable_kgq +ffffffff81db5970 T amdgpu_gfx_off_ctrl +ffffffff81db5b50 T amdgpu_set_gfx_off_residency +ffffffff81db5bc0 T amdgpu_get_gfx_off_residency +ffffffff81db5c30 T amdgpu_get_gfx_off_entrycount +ffffffff81db5ca0 T amdgpu_get_gfx_off_status +ffffffff81db5d10 T amdgpu_gfx_ras_late_init +ffffffff81db5de0 T amdgpu_gfx_ras_sw_init +ffffffff81db5ee0 T amdgpu_gfx_process_ras_data_cb +ffffffff81db5f60 T amdgpu_gfx_poison_consumption_handler +ffffffff81db5fb0 T amdgpu_gfx_cp_ecc_error_irq +ffffffff81db6050 T amdgpu_gfx_ras_error_func +ffffffff81db6160 T amdgpu_kiq_rreg +ffffffff81db63e0 T amdgpu_kiq_wreg +ffffffff81db6620 T amdgpu_gfx_get_num_kcq +ffffffff81db66a0 T amdgpu_gfx_cp_init_microcode +ffffffff81db6910 T amdgpu_gfx_sysfs_init +ffffffff81db6940 T amdgpu_gfx_sysfs_fini +ffffffff81db7000 T amdgpu_gmc_pdb0_alloc +ffffffff81db7290 t amdgpu_bo_unreserve +ffffffff81db7370 T amdgpu_gmc_get_pde_for_bo +ffffffff81db7420 T amdgpu_gmc_pd_addr +ffffffff81db7510 T amdgpu_gmc_set_pte_pde +ffffffff81db7560 T amdgpu_gmc_agp_addr +ffffffff81db75d0 T amdgpu_gmc_vram_location +ffffffff81db7660 T amdgpu_gmc_sysvm_location +ffffffff81db76d0 T amdgpu_gmc_gart_location +ffffffff81db77e0 T amdgpu_gmc_agp_location +ffffffff81db78d0 T amdgpu_gmc_filter_faults +ffffffff81db7a80 T amdgpu_gmc_filter_faults_remove +ffffffff81db7c00 T amdgpu_gmc_ras_sw_init +ffffffff81db7c90 T amdgpu_gmc_ras_late_init +ffffffff81db7cc0 T amdgpu_gmc_ras_fini +ffffffff81db7cf0 T amdgpu_gmc_allocate_vm_inv_eng +ffffffff81db7ec0 T amdgpu_gmc_tmz_set +ffffffff81db7f60 T amdgpu_gmc_noretry_set +ffffffff81db7fd0 T amdgpu_gmc_set_vm_fault_masks +ffffffff81db81a0 T amdgpu_gmc_get_vbios_allocations +ffffffff81db8300 T amdgpu_gmc_init_pdb0 +ffffffff81db8460 T amdgpu_gmc_vram_pa +ffffffff81db84b0 T amdgpu_gmc_vram_mc2pa +ffffffff81db84f0 T amdgpu_gmc_vram_cpu_pa +ffffffff81db8540 T amdgpu_gmc_vram_checking +ffffffff81db8660 T amdgpu_gmc_sysfs_init +ffffffff81db8690 T amdgpu_gmc_sysfs_fini +ffffffff81db9000 T amdgpu_gtt_mgr_has_gart_addr +ffffffff81db9030 T amdgpu_gtt_mgr_recover +ffffffff81db90b0 T amdgpu_gtt_mgr_init +ffffffff81db9240 T amdgpu_gtt_mgr_fini +ffffffff81db93c0 t amdgpu_gtt_mgr_new +ffffffff81db9550 t amdgpu_gtt_mgr_del +ffffffff81db95c0 t amdgpu_gtt_mgr_intersects +ffffffff81db9600 t amdgpu_gtt_mgr_compatible +ffffffff81db9640 t amdgpu_gtt_mgr_debug +ffffffff81dba000 T amdgpu_hdp_ras_sw_init +ffffffff81dbb000 T amdgpu_bb_set_bits +ffffffff81dbb0c0 T amdgpu_bb_set_dir +ffffffff81dbb0f0 T amdgpu_bb_read_bits +ffffffff81dbb180 T amdgpu_acquire_bus +ffffffff81dbb350 T amdgpu_release_bus +ffffffff81dbb410 T amdgpu_send_start +ffffffff81dbb430 T amdgpu_send_stop +ffffffff81dbb450 T amdgpu_initiate_xfer +ffffffff81dbb470 T amdgpu_read_byte +ffffffff81dbb490 T amdgpu_write_byte +ffffffff81dbb4b0 T amdgpu_i2c_create +ffffffff81dbb660 T amdgpu_i2c_destroy +ffffffff81dbb6e0 T amdgpu_i2c_init +ffffffff81dbb720 T amdgpu_i2c_fini +ffffffff81dbb7d0 T amdgpu_i2c_add +ffffffff81dbb980 T amdgpu_i2c_lookup +ffffffff81dbbb50 T amdgpu_i2c_router_select_ddc_port +ffffffff81dbbdb0 T amdgpu_i2c_router_select_cd_port +ffffffff81dbd000 T amdgpu_ib_get +ffffffff81dbd0f0 T amdgpu_ib_free +ffffffff81dbd110 T amdgpu_ib_schedule +ffffffff81dbd8a0 T amdgpu_ib_pool_init +ffffffff81dbd9c0 T amdgpu_ib_pool_fini +ffffffff81dbda30 T amdgpu_ib_ring_tests +ffffffff81dbdbe0 T amdgpu_debugfs_sa_init +ffffffff81dbe000 T amdgpu_pasid_alloc +ffffffff81dbe090 T amdgpu_pasid_free +ffffffff81dbe0b0 T amdgpu_pasid_free_delayed +ffffffff81dbe1c0 t amdgpu_pasid_free_cb +ffffffff81dbe200 T amdgpu_vmid_had_gpu_reset +ffffffff81dbe240 T amdgpu_vmid_grab +ffffffff81dbeaa0 T amdgpu_vmid_alloc_reserved +ffffffff81dbeb50 T amdgpu_vmid_free_reserved +ffffffff81dbebe0 T amdgpu_vmid_reset +ffffffff81dbec60 T amdgpu_vmid_reset_all +ffffffff81dbed60 T amdgpu_vmid_mgr_init +ffffffff81dbef40 T amdgpu_vmid_mgr_fini +ffffffff81dbf000 T amdgpu_ih_ring_init +ffffffff81dbf1f0 T amdgpu_ih_ring_fini +ffffffff81dbf2b0 T amdgpu_ih_ring_write +ffffffff81dbf430 T amdgpu_ih_wait_on_checkpoint_process_ts +ffffffff81dbf710 T amdgpu_ih_process +ffffffff81dbf8a0 T amdgpu_ih_decode_iv_helper +ffffffff81dbf980 T amdgpu_ih_decode_iv_ts_helper +ffffffff81dc0000 T amdgpu_irq_disable_all +ffffffff81dc00f0 T amdgpu_irq_handler +ffffffff81dc0160 T amdgpu_msi_ok +ffffffff81dc0190 T amdgpu_irq_init +ffffffff81dc0290 t amdgpu_irq_handle_ih1 +ffffffff81dc02c0 t amdgpu_irq_handle_ih2 +ffffffff81dc02f0 t amdgpu_irq_handle_ih_soft +ffffffff81dc0320 T amdgpu_irq_fini_hw +ffffffff81dc0390 T amdgpu_irq_fini_sw +ffffffff81dc0460 T amdgpu_irq_add_id +ffffffff81dc0550 T amdgpu_irq_dispatch +ffffffff81dc06e0 T amdgpu_irq_delegate +ffffffff81dc0730 T amdgpu_irq_update +ffffffff81dc07f0 T amdgpu_irq_enabled +ffffffff81dc0850 T amdgpu_irq_gpu_reset_resume_helper +ffffffff81dc09a0 T amdgpu_irq_get +ffffffff81dc0aa0 T amdgpu_irq_put +ffffffff81dc0bd0 T amdgpu_irq_add_domain +ffffffff81dc0c00 T amdgpu_irq_remove_domain +ffffffff81dc0c20 T amdgpu_irq_create_mapping +ffffffff81dc1000 T amdgpu_job_alloc +ffffffff81dc1100 T amdgpu_job_alloc_with_ib +ffffffff81dc1240 T amdgpu_job_set_resources +ffffffff81dc1310 T amdgpu_job_free_resources +ffffffff81dc13d0 T amdgpu_job_set_gang_leader +ffffffff81dc1460 T amdgpu_job_free +ffffffff81dc1580 T amdgpu_job_submit +ffffffff81dc1670 T amdgpu_job_submit_direct +ffffffff81dc16f0 T amdgpu_job_stop_all_jobs_on_sched +ffffffff81dc1850 t amdgpu_job_prepare_job +ffffffff81dc1930 t amdgpu_job_run +ffffffff81dc1ad0 t amdgpu_job_timedout +ffffffff81dc1d10 t amdgpu_job_free_cb +ffffffff81dc2000 T amdgpu_jpeg_sw_init +ffffffff81dc20a0 t amdgpu_jpeg_idle_work_handler +ffffffff81dc21b0 T amdgpu_jpeg_sw_fini +ffffffff81dc2280 T amdgpu_jpeg_suspend +ffffffff81dc22f0 T amdgpu_jpeg_resume +ffffffff81dc2320 T amdgpu_jpeg_ring_begin_use +ffffffff81dc23a0 T amdgpu_jpeg_ring_end_use +ffffffff81dc2400 T amdgpu_jpeg_dec_ring_test_ring +ffffffff81dc2640 T amdgpu_jpeg_dec_ring_test_ib +ffffffff81dc28e0 T amdgpu_jpeg_process_poison_irq +ffffffff81dc2970 T amdgpu_jpeg_ras_late_init +ffffffff81dc2a80 T amdgpu_jpeg_ras_sw_init +ffffffff81dc2b60 t __delayed_work_tick +ffffffff81dc3000 T amdgpu_unregister_gpu_instance +ffffffff81dc30a0 T amdgpu_driver_unload_kms +ffffffff81dc31c0 T amdgpu_register_gpu_instance +ffffffff81dc3240 T amdgpu_driver_load_kms +ffffffff81dc33a0 T amdgpu_info_ioctl +ffffffff81dc4a50 t amdgpu_hw_ip_info +ffffffff81dc55b0 t amdgpu_firmware_info +ffffffff81dc5990 T amdgpu_driver_lastclose_kms +ffffffff81dc59a0 T amdgpu_driver_open_kms +ffffffff81dc5bf0 T amdgpu_driver_postclose_kms +ffffffff81dc5fe0 T amdgpu_driver_release_kms +ffffffff81dc6000 T amdgpu_get_vblank_counter_kms +ffffffff81dc6190 T amdgpu_enable_vblank_kms +ffffffff81dc61d0 T amdgpu_disable_vblank_kms +ffffffff81dc6210 T amdgpu_debugfs_firmware_init +ffffffff81dc7000 T amdgpu_lsdma_wait_for +ffffffff81dc70a0 T amdgpu_lsdma_copy_mem +ffffffff81dc7140 T amdgpu_lsdma_fill_mem +ffffffff81dc8000 T amdgpu_mca_query_correctable_error_count +ffffffff81dc8060 T amdgpu_mca_query_uncorrectable_error_count +ffffffff81dc80c0 T amdgpu_mca_reset_error_count +ffffffff81dc80e0 T amdgpu_mca_query_ras_error_count +ffffffff81dc8170 T amdgpu_mca_mp0_ras_sw_init +ffffffff81dc8240 T amdgpu_mca_mp1_ras_sw_init +ffffffff81dc8310 T amdgpu_mca_mpio_ras_sw_init +ffffffff81dc9000 T amdgpu_mes_doorbell_process_slice +ffffffff81dc9030 T amdgpu_mes_init +ffffffff81dc9410 T amdgpu_mes_fini +ffffffff81dc9490 T amdgpu_mes_create_process +ffffffff81dc9660 T amdgpu_mes_destroy_process +ffffffff81dc9920 T amdgpu_mes_add_gang +ffffffff81dc9b40 T amdgpu_mes_remove_gang +ffffffff81dc9c50 T amdgpu_mes_suspend +ffffffff81dc9d60 T amdgpu_mes_resume +ffffffff81dc9e70 T amdgpu_mes_add_hw_queue +ffffffff81dca770 T amdgpu_mes_remove_hw_queue +ffffffff81dca950 T amdgpu_mes_unmap_legacy_queue +ffffffff81dca9f0 T amdgpu_mes_rreg +ffffffff81dcaaa0 T amdgpu_mes_wreg +ffffffff81dcab50 T amdgpu_mes_reg_write_reg_wait +ffffffff81dcac00 T amdgpu_mes_reg_wait +ffffffff81dcaca0 T amdgpu_mes_set_shader_debugger +ffffffff81dcadd0 T amdgpu_mes_flush_shader_debugger +ffffffff81dcaed0 T amdgpu_mes_ctx_get_offs +ffffffff81dcb0a0 T amdgpu_mes_add_ring +ffffffff81dcb4a0 T amdgpu_mes_remove_ring +ffffffff81dcb500 T amdgpu_mes_get_aggregated_doorbell_index +ffffffff81dcb530 T amdgpu_mes_ctx_alloc_meta_data +ffffffff81dcb600 T amdgpu_mes_ctx_free_meta_data +ffffffff81dcb640 T amdgpu_mes_ctx_map_meta_data +ffffffff81dcb830 T amdgpu_mes_ctx_unmap_meta_data +ffffffff81dcba40 T amdgpu_mes_self_test +ffffffff81dcc020 t amdgpu_mes_test_queues +ffffffff81dcc2f0 T amdgpu_mes_init_microcode +ffffffff81dcd000 T amdgpu_mmhub_ras_sw_init +ffffffff81dce000 T amdgpu_nbio_ras_sw_init +ffffffff81dce0d0 T amdgpu_nbio_get_pcie_replay_count +ffffffff81dce120 T amdgpu_nbio_get_pcie_usage +ffffffff81dce170 T amdgpu_nbio_ras_late_init +ffffffff81dcf000 T amdgpu_bo_is_amdgpu_bo +ffffffff81dcf070 t amdgpu_bo_destroy +ffffffff81dcf100 t amdgpu_bo_user_destroy +ffffffff81dcf1a0 t amdgpu_bo_vm_destroy +ffffffff81dcf2a0 T amdgpu_bo_placement_from_domain +ffffffff81dcf520 T amdgpu_bo_create_reserved +ffffffff81dcf870 T amdgpu_bo_unref +ffffffff81dcf8c0 T amdgpu_bo_create +ffffffff81dcfd10 t amdgpu_bo_reserve +ffffffff81dcff10 T amdgpu_bo_pin +ffffffff81dcff30 T amdgpu_bo_gpu_offset +ffffffff81dd0110 T amdgpu_bo_kmap +ffffffff81dd01d0 T amdgpu_bo_unpin +ffffffff81dd0280 t amdgpu_bo_unreserve +ffffffff81dd0360 T amdgpu_bo_create_kernel +ffffffff81dd03d0 T amdgpu_bo_create_kernel_at +ffffffff81dd05e0 T amdgpu_bo_kunmap +ffffffff81dd0620 T amdgpu_bo_free_kernel +ffffffff81dd0790 T amdgpu_bo_support_uswc +ffffffff81dd07c0 t dma_resv_unlock +ffffffff81dd0860 T amdgpu_bo_create_user +ffffffff81dd08c0 T amdgpu_bo_create_vm +ffffffff81dd0940 T amdgpu_bo_add_to_shadow_list +ffffffff81dd0a10 T amdgpu_bo_ref +ffffffff81dd0a50 T amdgpu_bo_restore_shadow +ffffffff81dd0ae0 T amdgpu_bo_kptr +ffffffff81dd0b10 T amdgpu_bo_pin_restricted +ffffffff81dd0ec0 T amdgpu_bo_get_preferred_domain +ffffffff81dd0f20 T amdgpu_bo_init +ffffffff81dd1000 T amdgpu_bo_fini +ffffffff81dd1090 T amdgpu_bo_set_tiling_flags +ffffffff81dd1120 T amdgpu_bo_get_tiling_flags +ffffffff81dd1190 T amdgpu_bo_set_metadata +ffffffff81dd12d0 T amdgpu_bo_get_metadata +ffffffff81dd13a0 T amdgpu_bo_move_notify +ffffffff81dd1450 T amdgpu_bo_get_memory +ffffffff81dd15b0 T amdgpu_bo_release_notify +ffffffff81dd17a0 t dma_resv_trylock +ffffffff81dd1840 T amdgpu_bo_fence +ffffffff81dd18b0 T amdgpu_bo_fault_reserve_notify +ffffffff81dd1a00 T amdgpu_bo_sync_wait_resv +ffffffff81dd1aa0 T amdgpu_bo_sync_wait +ffffffff81dd1b50 T amdgpu_bo_gpu_offset_no_check +ffffffff81dd2000 T amdgpu_pll_compute +ffffffff81dd2590 T amdgpu_pll_get_use_mask +ffffffff81dd2600 T amdgpu_pll_get_shared_dp_ppll +ffffffff81dd26b0 T amdgpu_pll_get_shared_nondp_ppll +ffffffff81dd3000 T amdgpu_preempt_mgr_init +ffffffff81dd3150 T amdgpu_preempt_mgr_fini +ffffffff81dd32b0 t amdgpu_preempt_mgr_new +ffffffff81dd3340 t amdgpu_preempt_mgr_del +ffffffff81dd4000 T psp_ta_free_shared_buf +ffffffff81dd4050 T psp_wait_for +ffffffff81dd4120 T psp_wait_for_spirom_update +ffffffff81dd41d0 T psp_get_fw_attestation_records_addr +ffffffff81dd4290 t psp_cmd_submit_buf +ffffffff81dd4530 T psp_spatial_partition +ffffffff81dd45e0 T psp_ta_unload +ffffffff81dd4690 T psp_reg_program +ffffffff81dd4750 T psp_ta_init_shared_buf +ffffffff81dd47b0 T psp_ta_invoke +ffffffff81dd4860 T psp_ta_load +ffffffff81dd4990 T psp_copy_fw +ffffffff81dd4a20 T psp_xgmi_invoke +ffffffff81dd4ad0 T psp_xgmi_terminate +ffffffff81dd4bc0 T psp_xgmi_initialize +ffffffff81dd4d50 T psp_xgmi_get_hive_id +ffffffff81dd4e40 T psp_xgmi_get_node_id +ffffffff81dd4f30 T psp_xgmi_get_topology_info +ffffffff81dd5340 T psp_xgmi_set_topology_info +ffffffff81dd5480 T psp_ras_invoke +ffffffff81dd5720 T psp_ras_enable_features +ffffffff81dd57d0 T psp_ras_terminate +ffffffff81dd58a0 T psp_ras_initialize +ffffffff81dd5ce0 T psp_ras_trigger_error +ffffffff81dd5e20 T psp_hdcp_invoke +ffffffff81dd5ee0 T psp_dtm_invoke +ffffffff81dd5fa0 T psp_rap_invoke +ffffffff81dd6130 T psp_securedisplay_invoke +ffffffff81dd6200 T amdgpu_psp_wait_for_bootloader +ffffffff81dd6260 T psp_execute_ip_fw_load +ffffffff81dd6350 T psp_load_fw_list +ffffffff81dd63e0 t psp_print_fw_hdr +ffffffff81dd64b0 T psp_gpu_reset +ffffffff81dd6540 T psp_rlc_autoload_start +ffffffff81dd65d0 T psp_ring_cmd_submit +ffffffff81dd6760 T psp_init_asd_microcode +ffffffff81dd6830 T psp_init_toc_microcode +ffffffff81dd6900 T psp_init_sos_microcode +ffffffff81dd6f10 T psp_init_ta_microcode +ffffffff81dd7300 T psp_init_cap_microcode +ffffffff81dd74a0 T is_psp_fw_valid +ffffffff81dd74d0 t psp_early_init +ffffffff81dd7890 t psp_sw_init +ffffffff81dd7bc0 t psp_sw_fini +ffffffff81dd7d00 t psp_hw_init +ffffffff81dd8150 t psp_hw_fini +ffffffff81dd8590 t psp_suspend +ffffffff81dd8a00 t psp_resume +ffffffff81dd8dc0 t psp_set_clockgating_state +ffffffff81dd8df0 t psp_set_powergating_state +ffffffff81dd8e20 t psp_gfx_cmd_name +ffffffff81dd8e60 t psp_get_runtime_db_entry +ffffffff81dd9060 t psp_free_shared_bufs +ffffffff81dd91b0 t psp_hw_start +ffffffff81dd96f0 t psp_load_non_psp_fw +ffffffff81dd9a10 t psp_hdcp_initialize +ffffffff81dd9b10 t psp_dtm_initialize +ffffffff81dd9c10 t psp_rap_initialize +ffffffff81dd9e20 t psp_load_smu_fw +ffffffff81dd9f20 t psp_securedisplay_terminate +ffffffff81dd9ff0 t psp_tmr_terminate +ffffffff81ddb000 T amdgpu_ta_if_debugfs_init +ffffffff81ddc000 T amdgpu_rap_debugfs_init +ffffffff81ddd000 T get_ras_block_str +ffffffff81ddd060 T amdgpu_ras_set_error_query_ready +ffffffff81ddd0a0 T amdgpu_ras_get_context +ffffffff81ddd0e0 T amdgpu_ras_find_obj +ffffffff81ddd2e0 T amdgpu_ras_feature_enable +ffffffff81ddd520 T amdgpu_ras_is_poison_mode_supported +ffffffff81ddd570 t __amdgpu_ras_feature_enable +ffffffff81ddd780 T amdgpu_ras_feature_enable_on_boot +ffffffff81ddd870 T amdgpu_ras_query_error_status +ffffffff81dddb90 T amdgpu_ras_reset_error_status +ffffffff81dddcd0 T amdgpu_ras_is_supported +ffffffff81ddde30 T amdgpu_ras_error_inject +ffffffff81dde100 T amdgpu_ras_query_error_count +ffffffff81dde360 T amdgpu_ras_sysfs_create +ffffffff81dde3d0 T amdgpu_ras_sysfs_remove +ffffffff81dde490 T amdgpu_ras_interrupt_fatal_error_handler +ffffffff81dde510 T amdgpu_ras_interrupt_dispatch +ffffffff81dde5e0 T amdgpu_ras_interrupt_remove_handler +ffffffff81dde760 T amdgpu_ras_interrupt_add_handler +ffffffff81ddea10 t amdgpu_ras_interrupt_process_handler +ffffffff81ddecd0 T amdgpu_ras_add_bad_pages +ffffffff81ddef40 T amdgpu_ras_save_bad_pages +ffffffff81ddf080 T amdgpu_ras_recovery_init +ffffffff81ddf2e0 t amdgpu_ras_do_recovery +ffffffff81ddf750 t amdgpu_ras_load_bad_pages +ffffffff81ddf860 T amdgpu_ras_init +ffffffff81ddfc90 t amdgpu_ras_counte_dw +ffffffff81ddfd00 T amdgpu_ras_set_context +ffffffff81ddfd40 t amdgpu_ras_query_poison_mode +ffffffff81ddfe50 T amdgpu_persistent_edc_harvesting_supported +ffffffff81ddfe90 T amdgpu_ras_block_late_init +ffffffff81de0150 T amdgpu_ras_block_late_fini +ffffffff81de0240 T amdgpu_ras_resume +ffffffff81de0500 T amdgpu_release_ras_context +ffffffff81de0570 T amdgpu_ras_suspend +ffffffff81de0640 T amdgpu_ras_late_init +ffffffff81de0770 T amdgpu_ras_pre_fini +ffffffff81de0880 T amdgpu_ras_fini +ffffffff81de0a60 T amdgpu_ras_global_ras_isr +ffffffff81de0af0 T amdgpu_ras_reset_gpu +ffffffff81de0b60 T amdgpu_ras_need_emergency_restart +ffffffff81de0bd0 T amdgpu_ras_register_ras_block +ffffffff81de0c70 T amdgpu_ras_get_error_type_name +ffffffff81de0ce0 T amdgpu_ras_inst_get_memory_id_field +ffffffff81de0d70 T amdgpu_ras_inst_get_err_cnt_field +ffffffff81de0df0 T amdgpu_ras_inst_query_ras_error_count +ffffffff81de0f20 T amdgpu_ras_inst_reset_ras_error_count +ffffffff81de0ff0 t __delayed_work_tick +ffffffff81de2000 T amdgpu_ras_eeprom_reset_table +ffffffff81de21e0 t __write_table_header +ffffffff81de22c0 t __write_table_ras_info +ffffffff81de23e0 T amdgpu_ras_debugfs_set_ret_size +ffffffff81de2410 T amdgpu_ras_eeprom_check_err_threshold +ffffffff81de25a0 T amdgpu_ras_eeprom_append +ffffffff81de2c30 T amdgpu_ras_eeprom_read +ffffffff81de2ed0 t __amdgpu_ras_eeprom_read +ffffffff81de2fd0 T amdgpu_ras_eeprom_max_record_count +ffffffff81de3010 T amdgpu_ras_eeprom_init +ffffffff81de3520 t __read_table_ras_info +ffffffff81de3610 t __verify_ras_table_checksum +ffffffff81de3780 t amdgpu_ras_eeprom_correct_header_tag +ffffffff81de3810 t __amdgpu_ras_eeprom_write +ffffffff81de4000 T amdgpu_reset_add_handler +ffffffff81de4050 T amdgpu_reset_init +ffffffff81de40c0 T amdgpu_reset_fini +ffffffff81de4130 T amdgpu_reset_prepare_hwcontext +ffffffff81de41b0 T amdgpu_reset_perform_reset +ffffffff81de4270 T amdgpu_reset_destroy_reset_domain +ffffffff81de42b0 T amdgpu_reset_create_reset_domain +ffffffff81de43b0 T amdgpu_device_lock_reset_domain +ffffffff81de43d0 T amdgpu_device_unlock_reset_domain +ffffffff81de5000 T amdgpu_ring_max_ibs +ffffffff81de5050 T amdgpu_ring_alloc +ffffffff81de5130 T amdgpu_ring_insert_nop +ffffffff81de51e0 T amdgpu_ring_generic_pad_ib +ffffffff81de5240 T amdgpu_ring_commit +ffffffff81de52d0 T amdgpu_ring_undo +ffffffff81de5320 T amdgpu_ring_init +ffffffff81de5a90 T amdgpu_ring_fini +ffffffff81de5bb0 T amdgpu_ring_emit_reg_write_reg_wait_helper +ffffffff81de5c10 T amdgpu_ring_soft_recovery +ffffffff81de5da0 T amdgpu_debugfs_ring_init +ffffffff81de5dd0 T amdgpu_ring_test_helper +ffffffff81de5e80 T amdgpu_ring_init_mqd +ffffffff81de5fc0 T amdgpu_ring_ib_begin +ffffffff81de6000 T amdgpu_ring_ib_end +ffffffff81de6040 T amdgpu_ring_ib_on_emit_cntl +ffffffff81de6080 T amdgpu_ring_ib_on_emit_ce +ffffffff81de60c0 T amdgpu_ring_ib_on_emit_de +ffffffff81de7000 T amdgpu_ring_mux_init +ffffffff81de70d0 t amdgpu_mux_resubmit_fallback +ffffffff81de7160 T amdgpu_ring_mux_fini +ffffffff81de7240 T amdgpu_ring_mux_add_sw_ring +ffffffff81de72c0 T amdgpu_ring_mux_set_wptr +ffffffff81de7400 t amdgpu_mux_resubmit_chunks +ffffffff81de7640 t amdgpu_ring_mux_copy_pkt_from_sw_ring +ffffffff81de7930 T amdgpu_ring_mux_get_wptr +ffffffff81de79a0 T amdgpu_ring_mux_get_rptr +ffffffff81de7aa0 T amdgpu_sw_ring_get_rptr_gfx +ffffffff81de7b00 T amdgpu_sw_ring_get_wptr_gfx +ffffffff81de7bc0 T amdgpu_sw_ring_set_wptr_gfx +ffffffff81de7c30 T amdgpu_sw_ring_insert_nop +ffffffff81de7c90 T amdgpu_sw_ring_name +ffffffff81de7cd0 T amdgpu_sw_ring_priority +ffffffff81de7d10 T amdgpu_sw_ring_ib_begin +ffffffff81de7eb0 T amdgpu_ring_mux_start_ib +ffffffff81de7fa0 T amdgpu_sw_ring_ib_end +ffffffff81de8050 T amdgpu_ring_mux_end_ib +ffffffff81de8160 T amdgpu_sw_ring_ib_mark_offset +ffffffff81de8220 T amdgpu_ring_mux_ib_mark_offset +ffffffff81de82d0 T amdgpu_mcbp_handle_trailing_fence_irq +ffffffff81de9000 T amdgpu_gfx_rlc_enter_safe_mode +ffffffff81de9090 T amdgpu_gfx_rlc_exit_safe_mode +ffffffff81de9120 T amdgpu_gfx_rlc_init_sr +ffffffff81de9290 T amdgpu_gfx_rlc_fini +ffffffff81de9310 t amdgpu_bo_unreserve +ffffffff81de93f0 T amdgpu_gfx_rlc_init_csb +ffffffff81de9520 T amdgpu_gfx_rlc_init_cpt +ffffffff81de97f0 T amdgpu_gfx_rlc_setup_cp_table +ffffffff81de99e0 T amdgpu_gfx_rlc_init_microcode +ffffffff81deb000 T amdgpu_sa_bo_manager_init +ffffffff81deb0e0 T amdgpu_sa_bo_manager_fini +ffffffff81deb170 T amdgpu_sa_bo_new +ffffffff81deb1e0 T amdgpu_sa_bo_free +ffffffff81dec000 T amdgpu_sched_ioctl +ffffffff81ded000 T amdgpu_sdma_get_instance_from_ring +ffffffff81ded080 T amdgpu_sdma_get_index_from_ring +ffffffff81ded100 T amdgpu_sdma_get_csa_mc_addr +ffffffff81ded200 T amdgpu_sdma_ras_late_init +ffffffff81ded2d0 T amdgpu_sdma_process_ras_data_cb +ffffffff81ded320 T amdgpu_sdma_process_ecc_irq +ffffffff81ded3b0 T amdgpu_sdma_destroy_inst_ctx +ffffffff81ded430 T amdgpu_sdma_init_microcode +ffffffff81ded7c0 T amdgpu_sdma_unset_buffer_funcs_helper +ffffffff81ded860 T amdgpu_sdma_ras_sw_init +ffffffff81dee000 T psp_securedisplay_parse_resp_status +ffffffff81dee1e0 T psp_prep_securedisplay_cmd_buf +ffffffff81dee250 T amdgpu_securedisplay_debugfs_init +ffffffff81def000 T amdgpu_sync_create +ffffffff81def0b0 T amdgpu_sync_fence +ffffffff81def1e0 T amdgpu_sync_resv +ffffffff81def3b0 T amdgpu_sync_peek_fence +ffffffff81def4e0 T amdgpu_sync_get_fence +ffffffff81def5c0 T amdgpu_sync_clone +ffffffff81def6c0 T amdgpu_sync_push_to_job +ffffffff81def7e0 T amdgpu_sync_wait +ffffffff81def8b0 T amdgpu_sync_free +ffffffff81def990 T amdgpu_sync_init +ffffffff81def9f0 T amdgpu_sync_fini +ffffffff81df0000 T amdgpu_ttm_copy_mem_to_mem +ffffffff81df0520 t amdgpu_res_first +ffffffff81df0700 t amdgpu_ttm_map_buffer +ffffffff81df0af0 T amdgpu_copy_buffer +ffffffff81df0d80 T amdgpu_res_cpu_visible +ffffffff81df0ec0 T amdgpu_ttm_domain_start +ffffffff81df0f10 T amdgpu_ttm_tt_set_user_pages +ffffffff81df0f70 T amdgpu_ttm_alloc_gart +ffffffff81df11b0 T amdgpu_ttm_tt_pte_flags +ffffffff81df1260 t amdgpu_ttm_gart_bind +ffffffff81df13b0 T amdgpu_ttm_recover_gart +ffffffff81df1490 T amdgpu_ttm_tt_get_userptr +ffffffff81df14e0 T amdgpu_ttm_tt_set_userptr +ffffffff81df1610 t amdgpu_ttm_tt_create +ffffffff81df1700 T amdgpu_ttm_tt_get_usermm +ffffffff81df1760 T amdgpu_ttm_tt_affect_userptr +ffffffff81df17c0 T amdgpu_ttm_tt_is_userptr +ffffffff81df1800 T amdgpu_ttm_tt_is_readonly +ffffffff81df1840 T amdgpu_ttm_tt_pde_flags +ffffffff81df18c0 T amdgpu_ttm_init +ffffffff81df1e30 T amdgpu_ttm_set_buffer_funcs_status +ffffffff81df1f90 t amdgpu_ttm_drv_reserve_vram_init +ffffffff81df2000 t amdgpu_ttm_reserve_tmr +ffffffff81df2270 T amdgpu_ttm_fini +ffffffff81df24a0 T amdgpu_fill_buffer +ffffffff81df2980 T amdgpu_ttm_evict_resources +ffffffff81df29f0 T amdgpu_ttm_debugfs_init +ffffffff81df2a20 t amdgpu_ttm_tt_populate +ffffffff81df2ad0 t amdgpu_ttm_tt_unpopulate +ffffffff81df2c70 t amdgpu_ttm_backend_destroy +ffffffff81df2ca0 t amdgpu_ttm_bo_eviction_valuable +ffffffff81df2db0 t amdgpu_evict_flags +ffffffff81df2f20 t amdgpu_bo_move +ffffffff81df33b0 t amdgpu_bo_delete_mem_notify +ffffffff81df33d0 t amdgpu_ttm_io_mem_reserve +ffffffff81df3480 t amdgpu_ttm_io_mem_pfn +ffffffff81df3510 t amdgpu_ttm_access_memory +ffffffff81df3960 t amdgpu_gmc_vram_full_visible +ffffffff81df39d0 t amdgpu_move_blit +ffffffff81df4000 T amdgpu_ucode_print_mc_hdr +ffffffff81df40b0 t amdgpu_ucode_print_common_hdr +ffffffff81df41e0 T amdgpu_ucode_print_smc_hdr +ffffffff81df4310 T amdgpu_ucode_print_gfx_hdr +ffffffff81df43f0 T amdgpu_ucode_print_rlc_hdr +ffffffff81df4b70 T amdgpu_ucode_print_sdma_hdr +ffffffff81df4d50 T amdgpu_ucode_print_psp_hdr +ffffffff81df5300 T amdgpu_ucode_print_gpu_info_hdr +ffffffff81df53b0 T amdgpu_ucode_hdr_version +ffffffff81df53f0 T amdgpu_ucode_get_load_type +ffffffff81df5460 T amdgpu_ucode_name +ffffffff81df54a0 T amdgpu_ucode_sysfs_init +ffffffff81df54d0 T amdgpu_ucode_sysfs_fini +ffffffff81df5500 T amdgpu_ucode_create_bo +ffffffff81df55f0 T amdgpu_ucode_free_bo +ffffffff81df5620 T amdgpu_ucode_init_bo +ffffffff81df5be0 T amdgpu_ucode_ip_version_decode +ffffffff81df65a0 T amdgpu_ucode_request +ffffffff81df6670 T amdgpu_ucode_release +ffffffff81df7000 T amdgpu_umc_page_retirement_mca +ffffffff81df7180 T amdgpu_umc_poison_handler +ffffffff81df72f0 t amdgpu_umc_do_page_retirement +ffffffff81df7540 T amdgpu_umc_process_ras_data_cb +ffffffff81df7580 T amdgpu_umc_ras_sw_init +ffffffff81df7690 T amdgpu_umc_ras_late_init +ffffffff81df7740 T amdgpu_umc_process_ecc_irq +ffffffff81df77d0 T amdgpu_umc_fill_error_record +ffffffff81df7870 T amdgpu_umc_loop_channels +ffffffff81df8000 T amdgpu_uvd_sw_init +ffffffff81df83c0 t amdgpu_uvd_idle_work_handler +ffffffff81df8560 t amdgpu_uvd_create_msg_bo_helper +ffffffff81df86e0 T amdgpu_uvd_sw_fini +ffffffff81df87f0 T amdgpu_uvd_entity_init +ffffffff81df8870 T amdgpu_uvd_suspend +ffffffff81df8a40 T amdgpu_uvd_resume +ffffffff81df8be0 T amdgpu_uvd_free_handles +ffffffff81df8cd0 T amdgpu_uvd_get_destroy_msg +ffffffff81df8e20 T amdgpu_uvd_ring_parse_cs +ffffffff81df8f40 t amdgpu_uvd_cs_packets +ffffffff81df90d0 t amdgpu_uvd_cs_pass1 +ffffffff81df9210 t amdgpu_uvd_cs_pass2 +ffffffff81df9910 T amdgpu_uvd_get_create_msg +ffffffff81df99e0 t amdgpu_uvd_send_msg +ffffffff81df9d50 T amdgpu_uvd_ring_begin_use +ffffffff81df9e30 T amdgpu_uvd_ring_end_use +ffffffff81df9eb0 T amdgpu_uvd_ring_test_ib +ffffffff81dfa080 T amdgpu_uvd_used_handles +ffffffff81dfa150 t __delayed_work_tick +ffffffff81dfa170 t amdgpu_bo_unreserve +ffffffff81dfb000 T amdgpu_vce_sw_init +ffffffff81dfb360 t amdgpu_vce_idle_work_handler +ffffffff81dfb460 T amdgpu_vce_sw_fini +ffffffff81dfb520 T amdgpu_vce_entity_init +ffffffff81dfb5a0 T amdgpu_vce_suspend +ffffffff81dfb6f0 T amdgpu_vce_resume +ffffffff81dfb980 t amdgpu_bo_unreserve +ffffffff81dfba60 T amdgpu_vce_ring_begin_use +ffffffff81dfbb70 T amdgpu_vce_ring_end_use +ffffffff81dfbbf0 T amdgpu_vce_free_handles +ffffffff81dfbcb0 t amdgpu_vce_get_destroy_msg +ffffffff81dfbf30 T amdgpu_vce_ring_parse_cs +ffffffff81dfc740 t amdgpu_vce_validate_bo +ffffffff81dfc8c0 t amdgpu_vce_validate_handle +ffffffff81dfcbe0 t amdgpu_vce_cs_reloc +ffffffff81dfcd30 T amdgpu_vce_ring_parse_cs_vm +ffffffff81dfd120 T amdgpu_vce_ring_emit_ib +ffffffff81dfd2d0 T amdgpu_vce_ring_emit_fence +ffffffff81dfd570 T amdgpu_vce_ring_test_ring +ffffffff81dfd6a0 T amdgpu_vce_ring_test_ib +ffffffff81dfdb20 T amdgpu_vce_get_ring_prio +ffffffff81dfdb60 t __delayed_work_tick +ffffffff81dfe000 T amdgpu_vcn_early_init +ffffffff81dfe0b0 T amdgpu_vcn_sw_init +ffffffff81dfe590 t amdgpu_vcn_idle_work_handler +ffffffff81dfe7d0 T amdgpu_vcn_sw_fini +ffffffff81dfe930 T amdgpu_vcn_is_disabled_vcn +ffffffff81dfe990 T amdgpu_vcn_suspend +ffffffff81dfead0 T amdgpu_vcn_resume +ffffffff81dfec60 T amdgpu_vcn_ring_begin_use +ffffffff81dfee40 T amdgpu_vcn_ring_end_use +ffffffff81dfeed0 T amdgpu_vcn_dec_ring_test_ring +ffffffff81dff0b0 T amdgpu_vcn_dec_sw_ring_test_ring +ffffffff81dff210 T amdgpu_vcn_dec_ring_test_ib +ffffffff81dff420 t amdgpu_vcn_dec_send_msg +ffffffff81dff640 T amdgpu_vcn_dec_sw_ring_test_ib +ffffffff81dff850 t amdgpu_vcn_dec_sw_send_msg +ffffffff81dffca0 T amdgpu_vcn_enc_ring_test_ring +ffffffff81dffe00 T amdgpu_vcn_enc_ring_test_ib +ffffffff81e006e0 T amdgpu_vcn_unified_ring_test_ib +ffffffff81e00770 T amdgpu_vcn_get_enc_ring_prio +ffffffff81e007b0 T amdgpu_vcn_setup_ucode +ffffffff81e00880 T amdgpu_debugfs_vcn_fwlog_init +ffffffff81e008b0 T amdgpu_vcn_fwlog_init +ffffffff81e008e0 T amdgpu_vcn_process_poison_irq +ffffffff81e009d0 T amdgpu_vcn_ras_late_init +ffffffff81e00ad0 T amdgpu_vcn_ras_sw_init +ffffffff81e00bb0 T amdgpu_vcn_psp_update_sram +ffffffff81e00c50 t __delayed_work_tick +ffffffff81e01000 T amdgpu_vf_error_put +ffffffff81e010d0 T amdgpu_vf_error_trans_all +ffffffff81e02000 T amdgpu_virt_mmio_blocked +ffffffff81e02050 T amdgpu_virt_init_setting +ffffffff81e020f0 T amdgpu_virt_kiq_reg_write_reg_wait +ffffffff81e02300 T amdgpu_virt_request_full_gpu +ffffffff81e02360 T amdgpu_virt_release_full_gpu +ffffffff81e023c0 T amdgpu_virt_reset_gpu +ffffffff81e02420 T amdgpu_virt_request_init_data +ffffffff81e02480 T amdgpu_virt_wait_reset +ffffffff81e024d0 T amdgpu_virt_alloc_mm_table +ffffffff81e025a0 T amdgpu_virt_free_mm_table +ffffffff81e02610 T amd_sriov_msg_checksum +ffffffff81e02700 T amdgpu_virt_release_ras_err_handler_data +ffffffff81e027e0 T amdgpu_virt_fini_data_exchange +ffffffff81e02860 T amdgpu_virt_init_data_exchange +ffffffff81e029b0 T amdgpu_virt_exchange_data +ffffffff81e02cd0 t amdgpu_virt_update_vf2pf_work_item +ffffffff81e02d30 t amdgpu_virt_read_pf2vf_data +ffffffff81e03140 t amdgpu_virt_write_vf2pf_data +ffffffff81e034d0 T amdgpu_detect_virtualization +ffffffff81e03680 T amdgpu_virt_enable_access_debugfs +ffffffff81e03710 T amdgpu_virt_disable_access_debugfs +ffffffff81e03750 T amdgpu_virt_get_sriov_vf_mode +ffffffff81e037a0 T amdgpu_virt_post_reset +ffffffff81e037e0 T amdgpu_virt_fw_load_skip_check +ffffffff81e03880 T amdgpu_virt_update_sriov_video_codec +ffffffff81e03980 T amdgpu_sriov_wreg +ffffffff81e03a10 t amdgpu_virt_rlcg_reg_rw +ffffffff81e03d30 T amdgpu_sriov_rreg +ffffffff81e03d90 t __delayed_work_tick +ffffffff81e04000 T amdgpu_vm_set_pasid +ffffffff81e04130 T amdgpu_vm_bo_base_init +ffffffff81e04370 T amdgpu_vm_lock_pd +ffffffff81e043a0 T amdgpu_vm_move_to_lru_tail +ffffffff81e043e0 T amdgpu_vm_generation +ffffffff81e04440 T amdgpu_vm_validate_pt_bos +ffffffff81e04810 t amdgpu_vm_bo_moved +ffffffff81e04880 T amdgpu_vm_ready +ffffffff81e04910 T amdgpu_vm_check_compute_bug +ffffffff81e049d0 T amdgpu_vm_need_pipeline_sync +ffffffff81e04a70 T amdgpu_vm_flush +ffffffff81e04eb0 T amdgpu_vm_bo_find +ffffffff81e04f10 T amdgpu_vm_map_gart +ffffffff81e04f50 T amdgpu_vm_update_pdes +ffffffff81e05190 T amdgpu_vm_update_range +ffffffff81e05860 t amdgpu_vm_tlb_seq_cb +ffffffff81e05890 T amdgpu_vm_get_memory +ffffffff81e059f0 t amdgpu_vm_bo_get_memory +ffffffff81e05b90 T amdgpu_vm_bo_update +ffffffff81e06050 T amdgpu_vm_clear_freed +ffffffff81e061d0 T amdgpu_vm_handle_moved +ffffffff81e063e0 T amdgpu_vm_bo_add +ffffffff81e064b0 T amdgpu_vm_bo_map +ffffffff81e06680 t amdgpu_vm_bo_insert_map +ffffffff81e06850 T amdgpu_vm_bo_replace_map +ffffffff81e069b0 T amdgpu_vm_bo_clear_mappings +ffffffff81e06f40 T amdgpu_vm_bo_unmap +ffffffff81e07070 T amdgpu_vm_bo_lookup_mapping +ffffffff81e070e0 T amdgpu_vm_bo_trace_cs +ffffffff81e07110 T amdgpu_vm_bo_del +ffffffff81e07300 T amdgpu_vm_evictable +ffffffff81e073b0 T amdgpu_vm_bo_invalidate +ffffffff81e07640 T amdgpu_vm_adjust_size +ffffffff81e078a0 T amdgpu_vm_wait_idle +ffffffff81e07910 T amdgpu_vm_init +ffffffff81e07d00 t amdgpu_bo_reserve +ffffffff81e07e60 t amdgpu_bo_unreserve +ffffffff81e07f40 T amdgpu_vm_make_compute +ffffffff81e08140 T amdgpu_vm_release_compute +ffffffff81e08200 T amdgpu_vm_fini +ffffffff81e087d0 T amdgpu_vm_manager_init +ffffffff81e088f0 T amdgpu_vm_manager_fini +ffffffff81e08950 T amdgpu_vm_ioctl +ffffffff81e08a00 T amdgpu_vm_get_task_info +ffffffff81e08aa0 T amdgpu_vm_set_task_info +ffffffff81e08b90 T amdgpu_vm_handle_fault +ffffffff81e08d80 t amdgpu_vm_add_prt_cb +ffffffff81e08ed0 t amdgpu_vm_prt_cb +ffffffff81e09000 t amdgpu_vm_cpu_map_table +ffffffff81e09020 t amdgpu_vm_cpu_prepare +ffffffff81e09070 t amdgpu_vm_cpu_update +ffffffff81e09160 t amdgpu_vm_cpu_commit +ffffffff81e0a000 T amdgpu_vm_pt_clear +ffffffff81e0a420 T amdgpu_vm_pt_create +ffffffff81e0a9a0 T amdgpu_vm_pt_free_work +ffffffff81e0ac50 t amdgpu_vm_pt_free +ffffffff81e0ad30 T amdgpu_vm_pt_free_root +ffffffff81e0ad50 t amdgpu_vm_pt_free_dfs +ffffffff81e0b180 T amdgpu_vm_pt_is_root_clean +ffffffff81e0b250 T amdgpu_vm_pde_update +ffffffff81e0b340 T amdgpu_vm_ptes_update +ffffffff81e0bcb0 t amdgpu_vm_pt_next +ffffffff81e0bdc0 T amdgpu_vm_pt_map_tables +ffffffff81e0bef0 t amdgpu_vm_pt_next_dfs +ffffffff81e0c030 t amdgpu_vm_pt_sibling +ffffffff81e0d000 t amdgpu_vm_sdma_map_table +ffffffff81e0d060 t amdgpu_vm_sdma_prepare +ffffffff81e0d150 t amdgpu_vm_sdma_update +ffffffff81e0d570 t amdgpu_vm_sdma_commit +ffffffff81e0e000 T amdgpu_vram_mgr_bo_visible_size +ffffffff81e0e100 T amdgpu_vram_mgr_reserve_range +ffffffff81e0e1e0 t amdgpu_vram_mgr_do_reserve +ffffffff81e0e360 T amdgpu_vram_mgr_query_page_status +ffffffff81e0e440 T amdgpu_vram_mgr_alloc_sgt +ffffffff81e0e490 T amdgpu_vram_mgr_free_sgt +ffffffff81e0e4c0 T amdgpu_vram_mgr_vis_usage +ffffffff81e0e4f0 T amdgpu_vram_mgr_init +ffffffff81e0e6d0 T amdgpu_vram_mgr_fini +ffffffff81e0e8f0 t amdgpu_vram_mgr_new +ffffffff81e0ee90 t amdgpu_vram_mgr_del +ffffffff81e0ef70 t amdgpu_vram_mgr_intersects +ffffffff81e0eff0 t amdgpu_vram_mgr_compatible +ffffffff81e0f060 t amdgpu_vram_mgr_debug +ffffffff81e0f140 t amdgpu_dummy_vram_mgr_new +ffffffff81e0f1a0 t amdgpu_dummy_vram_mgr_del +ffffffff81e0f1d0 t amdgpu_dummy_vram_mgr_intersects +ffffffff81e0f220 t amdgpu_dummy_vram_mgr_compatible +ffffffff81e0f270 t amdgpu_dummy_vram_mgr_debug +ffffffff81e10000 T amdgpu_xcp_prepare_suspend +ffffffff81e10010 t amdgpu_xcp_run_transition +ffffffff81e10200 T amdgpu_xcp_suspend +ffffffff81e10220 T amdgpu_xcp_prepare_resume +ffffffff81e10240 T amdgpu_xcp_resume +ffffffff81e10260 T amdgpu_xcp_init +ffffffff81e10580 T amdgpu_xcp_switch_partition_mode +ffffffff81e106e0 T amdgpu_xcp_query_partition_mode +ffffffff81e107e0 T amdgpu_xcp_mgr_init +ffffffff81e10a00 T amdgpu_xcp_get_partition +ffffffff81e10aa0 T amdgpu_xcp_get_inst_details +ffffffff81e10af0 T amdgpu_xcp_dev_register +ffffffff81e10c40 T amdgpu_xcp_dev_unplug +ffffffff81e10d30 T amdgpu_xcp_open_device +ffffffff81e10f20 T amdgpu_xcp_release_sched +ffffffff81e11000 T amdgpu_get_xgmi_hive +ffffffff81e11050 T amdgpu_put_xgmi_hive +ffffffff81e110a0 T amdgpu_xgmi_set_pstate +ffffffff81e110f0 T amdgpu_xgmi_update_topology +ffffffff81e111b0 T amdgpu_xgmi_get_hops_count +ffffffff81e11220 T amdgpu_xgmi_get_num_links +ffffffff81e11290 T amdgpu_xgmi_add_device +ffffffff81e114b0 T amdgpu_xgmi_remove_device +ffffffff81e11600 T amdgpu_xgmi_get_relative_phy_addr +ffffffff81e11640 t amdgpu_ras_error_inject_xgmi +ffffffff81e117c0 t amdgpu_xgmi_query_ras_error_count +ffffffff81e11e60 t amdgpu_xgmi_reset_ras_error_count +ffffffff81e12180 t amdgpu_xgmi_ras_late_init +ffffffff81e12200 T amdgpu_xgmi_ras_sw_init +ffffffff81e13000 T aqua_vanjaram_doorbell_index_init +ffffffff81e13120 T aqua_vanjaram_ip_map_init +ffffffff81e132a0 t aqua_vanjaram_logical_to_dev_inst +ffffffff81e13300 t aqua_vanjaram_logical_to_dev_mask +ffffffff81e133b0 T aqua_vanjaram_encode_ext_smn_addressing +ffffffff81e133f0 t aqua_vanjaram_switch_partition_mode +ffffffff81e137f0 t aqua_vanjaram_query_partition_mode +ffffffff81e13840 t aqua_vanjaram_get_xcp_ip_details +ffffffff81e139f0 t aqua_vanjaram_get_xcp_mem_id +ffffffff81e13b00 t aqua_vanjaram_select_scheds +ffffffff81e13c90 t aqua_vanjaram_update_partition_sched_list +ffffffff81e14180 T aqua_vanjaram_init_soc_config +ffffffff81e15000 T arct_reg_base_init +ffffffff81e16000 T athub_v1_0_set_clockgating +ffffffff81e16220 T athub_v1_0_get_clockgating +ffffffff81e17000 T athub_v2_0_set_clockgating +ffffffff81e171f0 T athub_v2_0_get_clockgating +ffffffff81e18000 T athub_v2_1_set_clockgating +ffffffff81e18200 T athub_v2_1_get_clockgating +ffffffff81e19000 T athub_v3_0_set_clockgating +ffffffff81e190d0 T athub_v3_0_get_clockgating +ffffffff81e19120 t athub_v3_0_get_cg_cntl +ffffffff81e191c0 t athub_v3_0_set_cg_cntl +ffffffff81e1a000 t cz_ih_early_init +ffffffff81e1a050 t cz_ih_sw_init +ffffffff81e1a0b0 t cz_ih_sw_fini +ffffffff81e1a0f0 t cz_ih_hw_init +ffffffff81e1a310 t cz_ih_hw_fini +ffffffff81e1a3e0 t cz_ih_suspend +ffffffff81e1a4b0 t cz_ih_resume +ffffffff81e1a4f0 t cz_ih_is_idle +ffffffff81e1a540 t cz_ih_wait_for_idle +ffffffff81e1a5e0 t cz_ih_soft_reset +ffffffff81e1a6c0 t cz_ih_set_clockgating_state +ffffffff81e1a6f0 t cz_ih_set_powergating_state +ffffffff81e1a720 t cz_ih_get_wptr +ffffffff81e1a830 t cz_ih_decode_iv +ffffffff81e1a8b0 t cz_ih_set_rptr +ffffffff81e1b000 T dce_v10_0_disable_dce +ffffffff81e1b150 t dce_v10_0_early_init +ffffffff81e1b210 t dce_v10_0_sw_init +ffffffff81e1b520 t dce_v10_0_sw_fini +ffffffff81e1b640 t dce_v10_0_hw_init +ffffffff81e1b9a0 t dce_v10_0_hw_fini +ffffffff81e1bb30 t dce_v10_0_suspend +ffffffff81e1bb90 t dce_v10_0_resume +ffffffff81e1bc00 t dce_v10_0_is_idle +ffffffff81e1bc30 t dce_v10_0_wait_for_idle +ffffffff81e1bc60 t dce_v10_0_check_soft_reset +ffffffff81e1bc70 t dce_v10_0_soft_reset +ffffffff81e1bd40 t dce_v10_0_set_clockgating_state +ffffffff81e1bd70 t dce_v10_0_set_powergating_state +ffffffff81e1bda0 t dce_v10_0_audio_endpt_rreg +ffffffff81e1be30 t dce_v10_0_audio_endpt_wreg +ffffffff81e1beb0 t dce_v10_0_bandwidth_update +ffffffff81e1c920 t dce_v10_0_vblank_get_counter +ffffffff81e1c970 t dce_v10_0_hpd_sense +ffffffff81e1c9d0 t dce_v10_0_hpd_set_polarity +ffffffff81e1caa0 t dce_v10_0_hpd_get_gpio_reg +ffffffff81e1cad0 t dce_v10_0_page_flip +ffffffff81e1cbd0 t dce_v10_0_crtc_get_scanoutpos +ffffffff81e1cc70 t dce_v10_0_encoder_add +ffffffff81e1cec0 t dce_v10_0_latency_watermark +ffffffff81e1d0f0 t dce_v10_0_encoder_destroy +ffffffff81e1d150 t dce_v10_0_encoder_prepare +ffffffff81e1d350 t dce_v10_0_encoder_commit +ffffffff81e1d380 t dce_v10_0_encoder_mode_set +ffffffff81e1e2f0 t dce_v10_0_encoder_disable +ffffffff81e1e400 t dce_v10_0_ext_dpms +ffffffff81e1e430 t dce_v10_0_ext_prepare +ffffffff81e1e460 t dce_v10_0_ext_commit +ffffffff81e1e490 t dce_v10_0_ext_mode_set +ffffffff81e1e4c0 t dce_v10_0_ext_disable +ffffffff81e1e4f0 t dce_v10_0_set_crtc_irq_state +ffffffff81e1e5d0 t dce_v10_0_crtc_irq +ffffffff81e1e810 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81e1e8e0 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81e1e9b0 t dce_v10_0_set_pageflip_irq_state +ffffffff81e1ea60 t dce_v10_0_pageflip_irq +ffffffff81e1ebc0 t dce_v10_0_set_hpd_irq_state +ffffffff81e1ec90 t dce_v10_0_hpd_irq +ffffffff81e1edc0 t dce_v10_0_afmt_init +ffffffff81e1eed0 t dce_v10_0_audio_init +ffffffff81e1efa0 t INIT_DELAYED_WORK +ffffffff81e1efe0 t dce_v10_0_crtc_cursor_set2 +ffffffff81e1f2a0 t dce_v10_0_crtc_cursor_move +ffffffff81e1f370 t dce_v10_0_crtc_gamma_set +ffffffff81e1f3b0 t dce_v10_0_crtc_destroy +ffffffff81e1f3e0 t amdgpu_bo_reserve +ffffffff81e1f5e0 t amdgpu_bo_unreserve +ffffffff81e1f6c0 t dce_v10_0_lock_cursor +ffffffff81e1f720 t dce_v10_0_cursor_move_locked +ffffffff81e1f880 t dce_v10_0_show_cursor +ffffffff81e1f920 t dce_v10_0_crtc_load_lut +ffffffff81e1fcb0 t dce_v10_0_crtc_dpms +ffffffff81e1fe90 t dce_v10_0_crtc_prepare +ffffffff81e1fed0 t dce_v10_0_crtc_commit +ffffffff81e1ff00 t dce_v10_0_crtc_mode_fixup +ffffffff81e200b0 t dce_v10_0_crtc_mode_set +ffffffff81e20290 t dce_v10_0_crtc_set_base +ffffffff81e202b0 t dce_v10_0_crtc_set_base_atomic +ffffffff81e202d0 t dce_v10_0_crtc_disable +ffffffff81e20460 t dce_v10_0_crtc_do_set_base +ffffffff81e20b60 t __delayed_work_tick +ffffffff81e20b80 t dce_v10_0_is_display_hung +ffffffff81e21000 T dce_v11_0_disable_dce +ffffffff81e21160 t dce_v11_0_early_init +ffffffff81e21290 t dce_v11_0_sw_init +ffffffff81e215b0 t dce_v11_0_sw_fini +ffffffff81e216d0 t dce_v11_0_hw_init +ffffffff81e21a90 t dce_v11_0_hw_fini +ffffffff81e21c20 t dce_v11_0_suspend +ffffffff81e21c80 t dce_v11_0_resume +ffffffff81e21cf0 t dce_v11_0_is_idle +ffffffff81e21d20 t dce_v11_0_wait_for_idle +ffffffff81e21d50 t dce_v11_0_soft_reset +ffffffff81e21f60 t dce_v11_0_set_clockgating_state +ffffffff81e21f90 t dce_v11_0_set_powergating_state +ffffffff81e21fc0 t dce_v11_0_audio_endpt_rreg +ffffffff81e22050 t dce_v11_0_audio_endpt_wreg +ffffffff81e220d0 t dce_v11_0_bandwidth_update +ffffffff81e22b40 t dce_v11_0_vblank_get_counter +ffffffff81e22b90 t dce_v11_0_hpd_sense +ffffffff81e22bf0 t dce_v11_0_hpd_set_polarity +ffffffff81e22cc0 t dce_v11_0_hpd_get_gpio_reg +ffffffff81e22cf0 t dce_v11_0_page_flip +ffffffff81e22df0 t dce_v11_0_crtc_get_scanoutpos +ffffffff81e22e90 t dce_v11_0_encoder_add +ffffffff81e230e0 t dce_v11_0_latency_watermark +ffffffff81e23310 t dce_v11_0_encoder_destroy +ffffffff81e23370 t dce_v11_0_encoder_prepare +ffffffff81e23570 t dce_v11_0_encoder_commit +ffffffff81e235a0 t dce_v11_0_encoder_mode_set +ffffffff81e24510 t dce_v11_0_encoder_disable +ffffffff81e24620 t dce_v11_0_ext_dpms +ffffffff81e24650 t dce_v11_0_ext_prepare +ffffffff81e24680 t dce_v11_0_ext_commit +ffffffff81e246b0 t dce_v11_0_ext_mode_set +ffffffff81e246e0 t dce_v11_0_ext_disable +ffffffff81e24710 t dce_v11_0_set_crtc_irq_state +ffffffff81e247f0 t dce_v11_0_crtc_irq +ffffffff81e24a10 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81e24ae0 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81e24bb0 t dce_v11_0_set_pageflip_irq_state +ffffffff81e24c60 t dce_v11_0_pageflip_irq +ffffffff81e24dc0 t dce_v11_0_set_hpd_irq_state +ffffffff81e24e90 t dce_v11_0_hpd_irq +ffffffff81e24fc0 t dce_v11_0_afmt_init +ffffffff81e250d0 t dce_v11_0_audio_init +ffffffff81e251d0 t INIT_DELAYED_WORK +ffffffff81e25210 t dce_v11_0_crtc_cursor_set2 +ffffffff81e254d0 t dce_v11_0_crtc_cursor_move +ffffffff81e255a0 t dce_v11_0_crtc_gamma_set +ffffffff81e255e0 t dce_v11_0_crtc_destroy +ffffffff81e25610 t amdgpu_bo_reserve +ffffffff81e25810 t amdgpu_bo_unreserve +ffffffff81e258f0 t dce_v11_0_lock_cursor +ffffffff81e25950 t dce_v11_0_cursor_move_locked +ffffffff81e25ab0 t dce_v11_0_show_cursor +ffffffff81e25b50 t dce_v11_0_crtc_load_lut +ffffffff81e25eb0 t dce_v11_0_crtc_dpms +ffffffff81e26090 t dce_v11_0_crtc_prepare +ffffffff81e260d0 t dce_v11_0_crtc_commit +ffffffff81e26100 t dce_v11_0_crtc_mode_fixup +ffffffff81e26370 t dce_v11_0_crtc_mode_set +ffffffff81e265d0 t dce_v11_0_crtc_set_base +ffffffff81e265f0 t dce_v11_0_crtc_set_base_atomic +ffffffff81e26610 t dce_v11_0_crtc_disable +ffffffff81e267b0 t dce_v11_0_crtc_do_set_base +ffffffff81e26eb0 t __delayed_work_tick +ffffffff81e27000 t df_v1_7_sw_init +ffffffff81e27040 t df_v1_7_sw_fini +ffffffff81e27070 t df_v1_7_enable_broadcast_mode +ffffffff81e271a0 t df_v1_7_get_fb_channel_number +ffffffff81e27230 t df_v1_7_get_hbm_channel_number +ffffffff81e27280 t df_v1_7_update_medium_grain_clock_gating +ffffffff81e27400 t df_v1_7_get_clockgating_state +ffffffff81e27490 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81e28000 t df_v3_6_sw_init +ffffffff81e28150 t df_v3_6_sw_fini +ffffffff81e28180 t df_v3_6_enable_broadcast_mode +ffffffff81e282b0 t df_v3_6_get_fb_channel_number +ffffffff81e28390 t df_v3_6_get_hbm_channel_number +ffffffff81e283e0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81e28580 t df_v3_6_get_clockgating_state +ffffffff81e28610 t df_v3_6_pmc_start +ffffffff81e28910 t df_v3_6_pmc_stop +ffffffff81e28bb0 t df_v3_6_pmc_get_count +ffffffff81e28d40 t df_v3_6_get_fica +ffffffff81e28e30 t df_v3_6_set_fica +ffffffff81e28f10 t df_v3_6_query_ras_poison_mode +ffffffff81e2a000 t df_v4_3_query_ras_poison_mode +ffffffff81e2b000 T dimgrey_cavefish_reg_base_init +ffffffff81e2c000 T emu_soc_asic_init +ffffffff81e2d000 t gfx_v10_0_early_init +ffffffff81e2d800 t gfx_v10_0_late_init +ffffffff81e2d870 t gfx_v10_0_sw_init +ffffffff81e2dd80 t gfx_v10_0_sw_fini +ffffffff81e2dfa0 t gfx_v10_0_hw_init +ffffffff81e30d00 t gfx_v10_0_hw_fini +ffffffff81e30de0 t gfx_v10_0_suspend +ffffffff81e30e20 t gfx_v10_0_resume +ffffffff81e30e30 t gfx_v10_0_is_idle +ffffffff81e30ec0 t gfx_v10_0_wait_for_idle +ffffffff81e30fc0 t gfx_v10_0_soft_reset +ffffffff81e31320 t gfx_v10_0_set_clockgating_state +ffffffff81e315d0 t gfx_v10_0_set_powergating_state +ffffffff81e31690 t gfx_v10_0_get_clockgating_state +ffffffff81e317a0 t gfx_v10_0_get_gpu_clock_counter +ffffffff81e31cb0 t gfx_v10_0_select_se_sh +ffffffff81e31d50 t gfx_v10_0_read_wave_data +ffffffff81e31fb0 t gfx_v10_0_read_wave_vgprs +ffffffff81e31fe0 t gfx_v10_0_read_wave_sgprs +ffffffff81e32060 t gfx_v10_0_select_me_pipe_q +ffffffff81e32080 t gfx_v10_0_init_spm_golden_registers +ffffffff81e320f0 t gfx_v10_0_update_perfmon_mgcg +ffffffff81e32220 t wave_read_ind +ffffffff81e32310 t wave_read_regs +ffffffff81e32470 t gfx10_kiq_set_resources +ffffffff81e32790 t gfx10_kiq_map_queues +ffffffff81e32b20 t gfx10_kiq_unmap_queues +ffffffff81e32f20 t gfx10_kiq_query_status +ffffffff81e33210 t gfx10_kiq_invalidate_tlbs +ffffffff81e33330 t gfx_v10_0_ring_get_rptr_compute +ffffffff81e33360 t gfx_v10_0_ring_get_wptr_compute +ffffffff81e333d0 t gfx_v10_0_ring_set_wptr_compute +ffffffff81e33510 t gfx_v10_0_ring_emit_ib_compute +ffffffff81e33850 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81e33c80 t gfx_v10_0_ring_test_ring +ffffffff81e33ee0 t gfx_v10_0_ring_test_ib +ffffffff81e34170 t gfx_v10_0_ring_emit_rreg +ffffffff81e34400 t gfx_v10_0_ring_emit_wreg +ffffffff81e34630 t gfx_v10_0_ring_emit_reg_wait +ffffffff81e34680 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81e34710 t gfx_v10_0_wait_reg_mem +ffffffff81e34a40 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81e34a70 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81e34b80 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81e34d90 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81e35410 t gfx_v10_0_ring_emit_fence +ffffffff81e357e0 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81e35840 t gfx_v10_0_ring_emit_vm_flush +ffffffff81e35a10 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81e35ae0 t gfx_v10_0_ring_emit_gds_switch +ffffffff81e35bc0 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81e35df0 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81e35eb0 t gfx_v10_0_ring_emit_sb +ffffffff81e35fa0 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81e36490 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81e365a0 t gfx_v10_0_ring_soft_recovery +ffffffff81e36610 t gfx_v10_0_ring_preempt_ib +ffffffff81e36780 t gfx_v10_0_emit_mem_sync +ffffffff81e36ab0 t gfx_v10_0_write_data_to_reg +ffffffff81e36cc0 t gfx_v10_0_set_eop_interrupt_state +ffffffff81e36da0 t gfx_v10_0_eop_irq +ffffffff81e36f50 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81e370f0 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81e372b0 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81e375a0 t gfx_v10_0_kiq_irq +ffffffff81e37620 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81e37760 t gfx_v10_0_priv_reg_irq +ffffffff81e377c0 t gfx_v10_0_handle_priv_fault +ffffffff81e37920 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81e37a60 t gfx_v10_0_priv_inst_irq +ffffffff81e37ac0 t gfx_v10_0_is_rlc_enabled +ffffffff81e37b50 t gfx_v10_0_set_safe_mode +ffffffff81e37e00 t gfx_v10_0_unset_safe_mode +ffffffff81e37eb0 t gfx_v10_0_rlc_init +ffffffff81e37ed0 t gfx_v10_0_get_csb_size +ffffffff81e37f00 t gfx_v10_0_get_csb_buffer +ffffffff81e38070 t gfx_v10_0_rlc_resume +ffffffff81e38ae0 t gfx_v10_0_rlc_stop +ffffffff81e38bc0 t gfx_v10_0_rlc_reset +ffffffff81e38d70 t gfx_v10_0_rlc_start +ffffffff81e38f20 t gfx_v10_0_update_spm_vmid +ffffffff81e38f60 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81e39880 t gfx_v10_0_init_csb +ffffffff81e39b60 t gfx_v10_0_update_spm_vmid_internal +ffffffff81e39c80 t gfx_v10_0_rlc_backdoor_autoload_config_mec_cache +ffffffff81e39f50 t gfx_v10_0_is_rlcg_access_range +ffffffff81e39f80 t gfx_v10_0_gfx_mqd_init +ffffffff81e3a370 t gfx_v10_0_compute_mqd_init +ffffffff81e3a820 t gfx_v10_0_mec_init +ffffffff81e3aa30 t gfx_v10_0_compute_ring_init +ffffffff81e3ab70 t gfx_v10_0_rlc_backdoor_autoload_buffer_init +ffffffff81e3add0 t gfx_v10_0_gpu_early_init +ffffffff81e3b030 t amdgpu_bo_unreserve +ffffffff81e3b110 t gfx_v10_0_cp_resume +ffffffff81e3db00 t gfx_v10_3_get_disabled_sa +ffffffff81e3dc20 t gfx_v10_0_get_rb_active_bitmap +ffffffff81e3dd50 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81e3de60 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81e3df70 t gfx_v10_0_cp_gfx_enable +ffffffff81e3e1e0 t gfx_v10_0_cp_compute_enable +ffffffff81e3e380 t amdgpu_bo_reserve +ffffffff81e3e500 t gfx_v10_0_kiq_init_register +ffffffff81e3f3a0 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81e3f4a0 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81e3f780 t gfx_v10_0_cp_gfx_start +ffffffff81e40170 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81e404c0 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81e40c00 t gfx_v10_0_update_3d_clock_gating +ffffffff81e40ff0 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81e413d0 t gfx_v10_cntl_pg +ffffffff81e42000 t gfx_v11_0_early_init +ffffffff81e42750 t gfx_v11_0_late_init +ffffffff81e427c0 t gfx_v11_0_sw_init +ffffffff81e42d00 t gfx_v11_0_sw_fini +ffffffff81e42f10 t gfx_v11_0_hw_init +ffffffff81e47320 t gfx_v11_0_hw_fini +ffffffff81e47420 t gfx_v11_0_suspend +ffffffff81e47460 t gfx_v11_0_resume +ffffffff81e47470 t gfx_v11_0_is_idle +ffffffff81e47500 t gfx_v11_0_wait_for_idle +ffffffff81e47600 t gfx_v11_0_check_soft_reset +ffffffff81e47730 t gfx_v11_0_soft_reset +ffffffff81e48470 t gfx_v11_0_post_soft_reset +ffffffff81e48480 t gfx_v11_0_set_clockgating_state +ffffffff81e490c0 t gfx_v11_0_set_powergating_state +ffffffff81e49160 t gfx_v11_0_get_clockgating_state +ffffffff81e49330 t gfx_v11_0_get_gpu_clock_counter +ffffffff81e496b0 t gfx_v11_0_select_se_sh +ffffffff81e49750 t gfx_v11_0_read_wave_data +ffffffff81e49990 t gfx_v11_0_read_wave_vgprs +ffffffff81e499c0 t gfx_v11_0_read_wave_sgprs +ffffffff81e49a40 t gfx_v11_0_select_me_pipe_q +ffffffff81e49a60 t gfx_v11_0_update_perf_clk +ffffffff81e49b90 t gfx_v11_0_get_gfx_shadow_info +ffffffff81e49c00 t wave_read_ind +ffffffff81e49cf0 t wave_read_regs +ffffffff81e49e50 t gfx11_kiq_set_resources +ffffffff81e4a170 t gfx11_kiq_map_queues +ffffffff81e4a500 t gfx11_kiq_unmap_queues +ffffffff81e4a900 t gfx11_kiq_query_status +ffffffff81e4abf0 t gfx11_kiq_invalidate_tlbs +ffffffff81e4ad10 t gfx_v11_0_ring_get_rptr_compute +ffffffff81e4ad40 t gfx_v11_0_ring_get_wptr_compute +ffffffff81e4adb0 t gfx_v11_0_ring_set_wptr_compute +ffffffff81e4aef0 t gfx_v11_0_ring_emit_ib_compute +ffffffff81e4b230 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81e4b660 t gfx_v11_0_ring_test_ring +ffffffff81e4b8e0 t gfx_v11_0_ring_test_ib +ffffffff81e4bb80 t gfx_v11_0_ring_emit_rreg +ffffffff81e4be10 t gfx_v11_0_ring_emit_wreg +ffffffff81e4c040 t gfx_v11_0_ring_emit_reg_wait +ffffffff81e4c090 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81e4c100 t gfx_v11_0_wait_reg_mem +ffffffff81e4c430 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81e4c460 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81e4c570 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81e4c790 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81e4ce20 t gfx_v11_0_ring_emit_fence +ffffffff81e4d1f0 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81e4d250 t gfx_v11_0_ring_emit_vm_flush +ffffffff81e4d420 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81e4d4f0 t gfx_v11_0_ring_emit_gds_switch +ffffffff81e4d5d0 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81e4d800 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81e4d8c0 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81e4da20 t gfx_v11_0_ring_emit_gfx_shadow +ffffffff81e4dde0 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81e4def0 t gfx_v11_0_ring_soft_recovery +ffffffff81e4df60 t gfx_v11_0_ring_preempt_ib +ffffffff81e4e0d0 t gfx_v11_0_emit_mem_sync +ffffffff81e4e400 t gfx_v11_0_write_data_to_reg +ffffffff81e4e610 t gfx_v11_0_set_eop_interrupt_state +ffffffff81e4e6a0 t gfx_v11_0_eop_irq +ffffffff81e4e850 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81e4e9f0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81e4eb80 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81e4ecc0 t gfx_v11_0_priv_reg_irq +ffffffff81e4ed20 t gfx_v11_0_handle_priv_fault +ffffffff81e4ee80 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81e4efc0 t gfx_v11_0_priv_inst_irq +ffffffff81e4f020 t gfx_v11_0_rlc_gc_fed_irq +ffffffff81e4f070 t gfx_v11_0_is_rlc_enabled +ffffffff81e4f100 t gfx_v11_0_set_safe_mode +ffffffff81e4f260 t gfx_v11_0_unset_safe_mode +ffffffff81e4f2d0 t gfx_v11_0_rlc_init +ffffffff81e4f350 t gfx_v11_0_get_csb_size +ffffffff81e4f380 t gfx_v11_0_get_csb_buffer +ffffffff81e4f4f0 t gfx_v11_0_rlc_resume +ffffffff81e50250 t gfx_v11_0_rlc_stop +ffffffff81e50330 t gfx_v11_0_rlc_reset +ffffffff81e504e0 t gfx_v11_0_rlc_start +ffffffff81e50690 t gfx_v11_0_update_spm_vmid +ffffffff81e50790 t gfx_v11_0_init_csb +ffffffff81e50920 t gfx_v11_0_gfx_mqd_init +ffffffff81e50d00 t gfx_v11_0_compute_mqd_init +ffffffff81e51230 t gfx_v11_0_mec_init +ffffffff81e51370 t gfx_v11_0_compute_ring_init +ffffffff81e514b0 t gfx_v11_0_rlc_autoload_buffer_init +ffffffff81e516a0 t gfx_v11_0_gpu_early_init +ffffffff81e51770 t amdgpu_bo_unreserve +ffffffff81e51850 t gfx_v11_0_disable_gpa_mode +ffffffff81e519f0 t gfx_v11_0_cp_resume +ffffffff81e55810 t gfx_v11_0_config_me_cache +ffffffff81e55bd0 t gfx_v11_0_config_pfp_cache +ffffffff81e55f90 t gfx_v11_0_config_mec_cache +ffffffff81e56350 t gfx_v11_0_get_sa_active_bitmap +ffffffff81e56470 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81e56580 t gfx_v11_0_cp_compute_enable +ffffffff81e56760 t gfx_v11_0_cp_gfx_enable +ffffffff81e56970 t amdgpu_bo_reserve +ffffffff81e56af0 t gfx_v11_0_kiq_init_register +ffffffff81e57990 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81e57a70 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81e57c50 t gfx_v11_0_cp_gfx_start +ffffffff81e584d0 t gfx_v11_cntl_pg +ffffffff81e59000 t gfx_v11_0_3_rlc_gc_fed_irq +ffffffff81e59200 t gfx_v11_0_3_poison_consumption_handler +ffffffff81e5a000 t gfx_v8_0_early_init +ffffffff81e5a2f0 t gfx_v8_0_late_init +ffffffff81e5aa10 t gfx_v8_0_sw_init +ffffffff81e5add0 t gfx_v8_0_sw_fini +ffffffff81e5af70 t gfx_v8_0_hw_init +ffffffff81e5d110 t gfx_v8_0_hw_fini +ffffffff81e5d5c0 t gfx_v8_0_suspend +ffffffff81e5d600 t gfx_v8_0_resume +ffffffff81e5d610 t gfx_v8_0_is_idle +ffffffff81e5d680 t gfx_v8_0_wait_for_idle +ffffffff81e5d730 t gfx_v8_0_check_soft_reset +ffffffff81e5d810 t gfx_v8_0_pre_soft_reset +ffffffff81e5d970 t gfx_v8_0_soft_reset +ffffffff81e5db30 t gfx_v8_0_post_soft_reset +ffffffff81e5dcb0 t gfx_v8_0_set_clockgating_state +ffffffff81e5df30 t gfx_v8_0_set_powergating_state +ffffffff81e5e2e0 t gfx_v8_0_get_clockgating_state +ffffffff81e5e3c0 t gfx_v8_0_get_gpu_clock_counter +ffffffff81e5e460 t gfx_v8_0_select_se_sh +ffffffff81e5e4c0 t gfx_v8_0_read_wave_data +ffffffff81e5e960 t gfx_v8_0_read_wave_sgprs +ffffffff81e5ea10 t gfx_v8_0_select_me_pipe_q +ffffffff81e5ea30 t gfx_v8_0_ring_get_rptr +ffffffff81e5ea60 t gfx_v8_0_ring_get_wptr_compute +ffffffff81e5ea90 t gfx_v8_0_ring_set_wptr_compute +ffffffff81e5ead0 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81e5eef0 t gfx_v8_0_ring_test_ring +ffffffff81e5f0f0 t gfx_v8_0_ring_emit_rreg +ffffffff81e5f380 t gfx_v8_0_ring_emit_wreg +ffffffff81e5f5b0 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81e5f610 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81e5f680 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81e5fbe0 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81e600d0 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81e603c0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81e60770 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81e60a90 t gfx_v8_0_ring_emit_gds_switch +ffffffff81e61240 t gfx_v8_0_ring_test_ib +ffffffff81e613f0 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81e61620 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81e616d0 t gfx_v8_ring_emit_sb +ffffffff81e617c0 t gfx_v8_ring_emit_cntxcntl +ffffffff81e61d60 t gfx_v8_0_ring_soft_recovery +ffffffff81e61d90 t gfx_v8_0_emit_mem_sync +ffffffff81e61f90 t gfx_v8_0_ring_emit_ib_compute +ffffffff81e62290 t gfx_v8_0_ring_emit_fence_compute +ffffffff81e62590 t gfx_v8_0_emit_mem_sync_compute +ffffffff81e62850 t gfx_v8_0_emit_wave_limit +ffffffff81e62a00 t gfx_v8_0_set_eop_interrupt_state +ffffffff81e62c10 t gfx_v8_0_eop_irq +ffffffff81e62d20 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81e62da0 t gfx_v8_0_priv_reg_irq +ffffffff81e62ea0 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81e62f20 t gfx_v8_0_priv_inst_irq +ffffffff81e63020 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81e63280 t gfx_v8_0_cp_ecc_error_irq +ffffffff81e632d0 t gfx_v8_0_set_sq_int_state +ffffffff81e63360 t gfx_v8_0_sq_irq +ffffffff81e633d0 t gfx_v8_0_parse_sq_irq +ffffffff81e63620 t gfx_v8_0_is_rlc_enabled +ffffffff81e63660 t gfx_v8_0_set_safe_mode +ffffffff81e63760 t gfx_v8_0_unset_safe_mode +ffffffff81e63800 t gfx_v8_0_rlc_init +ffffffff81e638b0 t gfx_v8_0_get_csb_size +ffffffff81e638e0 t gfx_v8_0_get_csb_buffer +ffffffff81e63a50 t gfx_v8_0_cp_jump_table_num +ffffffff81e63a90 t gfx_v8_0_rlc_resume +ffffffff81e63e10 t gfx_v8_0_rlc_stop +ffffffff81e63e80 t gfx_v8_0_rlc_reset +ffffffff81e63f00 t gfx_v8_0_rlc_start +ffffffff81e63f80 t gfx_v8_0_update_spm_vmid +ffffffff81e63ff0 t gfx_v8_0_init_save_restore_list +ffffffff81e64400 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81e64620 t gfx_v8_0_sq_irq_work_func +ffffffff81e64640 t gfx_v8_0_init_microcode +ffffffff81e64ec0 t gfx_v8_0_mec_init +ffffffff81e64fc0 t gfx_v8_0_compute_ring_init +ffffffff81e650f0 t gfx_v8_0_gpu_early_init +ffffffff81e65590 t amdgpu_bo_unreserve +ffffffff81e65670 t gfx_v8_0_kiq_resume +ffffffff81e65920 t gfx_v8_0_cp_gfx_resume +ffffffff81e663e0 t gfx_v8_0_kcq_resume +ffffffff81e66da0 t amdgpu_bo_reserve +ffffffff81e66f20 t gfx_v8_0_mqd_commit +ffffffff81e67100 t gfx_v8_0_mqd_init +ffffffff81e67520 t gfx_v8_0_deactivate_hqd +ffffffff81e675e0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e67920 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e68000 t gfx_v9_0_ras_error_inject +ffffffff81e681b0 t gfx_v9_0_query_ras_error_count +ffffffff81e68d80 t gfx_v9_0_reset_ras_error_count +ffffffff81e697b0 T gfx_v9_0_select_se_sh +ffffffff81e69850 t gfx_v9_0_early_init +ffffffff81e6a380 t gfx_v9_0_late_init +ffffffff81e6b270 t gfx_v9_0_sw_init +ffffffff81e6b930 t gfx_v9_0_sw_fini +ffffffff81e6baf0 t gfx_v9_0_hw_init +ffffffff81e6ead0 t gfx_v9_0_hw_fini +ffffffff81e6f280 t gfx_v9_0_suspend +ffffffff81e6f2c0 t gfx_v9_0_resume +ffffffff81e6f2d0 t gfx_v9_0_is_idle +ffffffff81e6f350 t gfx_v9_0_wait_for_idle +ffffffff81e6f440 t gfx_v9_0_soft_reset +ffffffff81e6f7e0 t gfx_v9_0_set_clockgating_state +ffffffff81e6f8b0 t gfx_v9_0_set_powergating_state +ffffffff81e6fca0 t gfx_v9_0_get_clockgating_state +ffffffff81e6fdb0 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e70540 t gfx_v9_0_read_wave_data +ffffffff81e70780 t gfx_v9_0_read_wave_vgprs +ffffffff81e707e0 t gfx_v9_0_read_wave_sgprs +ffffffff81e70810 t gfx_v9_0_select_me_pipe_q +ffffffff81e70830 t wave_read_ind +ffffffff81e70920 t wave_read_regs +ffffffff81e70a70 t gfx_v9_0_kiq_set_resources +ffffffff81e70d90 t gfx_v9_0_kiq_map_queues +ffffffff81e710d0 t gfx_v9_0_kiq_unmap_queues +ffffffff81e71400 t gfx_v9_0_kiq_query_status +ffffffff81e716f0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e71810 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e71840 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e718b0 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e71910 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e71d40 t gfx_v9_0_ring_test_ring +ffffffff81e71f70 t gfx_v9_0_ring_emit_rreg +ffffffff81e72200 t gfx_v9_0_ring_emit_wreg +ffffffff81e72430 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e72480 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e72520 t gfx_v9_0_wait_reg_mem +ffffffff81e72850 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e72880 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e72990 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e72ac0 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e73140 t gfx_v9_0_ring_emit_fence +ffffffff81e73500 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e73560 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e73670 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e73740 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e73820 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e73a50 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e73b10 t gfx_v9_ring_emit_sb +ffffffff81e73c00 t gfx_v9_ring_emit_cntxcntl +ffffffff81e740e0 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e741f0 t gfx_v9_0_ring_soft_recovery +ffffffff81e74260 t gfx_v9_0_ring_preempt_ib +ffffffff81e74420 t gfx_v9_0_emit_mem_sync +ffffffff81e746e0 t gfx_v9_0_write_data_to_reg +ffffffff81e748f0 t gfx_v9_0_ring_test_ib +ffffffff81e74aa0 t gfx_v9_0_ring_patch_cntl +ffffffff81e74ae0 t gfx_v9_0_ring_patch_ce_meta +ffffffff81e74be0 t gfx_v9_0_ring_patch_de_meta +ffffffff81e74cb0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e74fe0 t gfx_v9_0_emit_wave_limit +ffffffff81e751c0 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e753a0 t gfx_v9_0_eop_irq +ffffffff81e754e0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e756a0 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e757e0 t gfx_v9_0_priv_reg_irq +ffffffff81e758e0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e75a20 t gfx_v9_0_priv_inst_irq +ffffffff81e75b20 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e763b0 t gfx_v9_0_is_rlc_enabled +ffffffff81e76440 t gfx_v9_0_set_safe_mode +ffffffff81e765a0 t gfx_v9_0_unset_safe_mode +ffffffff81e76610 t gfx_v9_0_rlc_init +ffffffff81e76680 t gfx_v9_0_get_csb_size +ffffffff81e766b0 t gfx_v9_0_get_csb_buffer +ffffffff81e767f0 t gfx_v9_0_cp_jump_table_num +ffffffff81e76840 t gfx_v9_0_rlc_resume +ffffffff81e77f50 t gfx_v9_0_rlc_stop +ffffffff81e782f0 t gfx_v9_0_rlc_reset +ffffffff81e78490 t gfx_v9_0_rlc_start +ffffffff81e785e0 t gfx_v9_0_update_spm_vmid +ffffffff81e78620 t gfx_v9_0_is_rlcg_access_range +ffffffff81e78670 t gfx_v9_0_init_csb +ffffffff81e78800 t gfx_v9_0_enable_lbpw +ffffffff81e788f0 t gfx_v9_0_update_spm_vmid_internal +ffffffff81e78a10 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e78ca0 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e78da0 t gfx_v9_0_mec_init +ffffffff81e78f90 t gfx_v9_0_compute_ring_init +ffffffff81e790d0 t gfx_v9_0_gpu_early_init +ffffffff81e79510 t amdgpu_bo_unreserve +ffffffff81e795f0 t gfx_v9_0_cp_gfx_enable +ffffffff81e796e0 t amdgpu_bo_reserve +ffffffff81e79860 t gfx_v9_0_kiq_init_register +ffffffff81e7a540 t gfx_v9_0_mqd_init +ffffffff81e7aa90 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e7afc0 t gfx_v9_0_update_3d_clock_gating +ffffffff81e7b3b0 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e7c000 t gfx_v9_4_query_ras_error_count +ffffffff81e7ce00 t gfx_v9_4_query_ras_error_status +ffffffff81e7cfe0 t gfx_v9_4_reset_ras_error_count +ffffffff81e7e000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e7e750 T gfx_v9_4_2_init_golden_registers +ffffffff81e7e7f0 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e7e8d0 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e7eab0 t gfx_v9_4_2_query_ras_error_count +ffffffff81e7eb60 t gfx_v9_4_2_query_ras_error_status +ffffffff81e7f3c0 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e7f420 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e7f8f0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e7fb20 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e7fba0 t gfx_v9_4_2_run_shader +ffffffff81e7ffa0 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e805f0 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e80930 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e80b10 t wave_read_ind +ffffffff81e81000 t gfx_v9_4_3_xcp_suspend +ffffffff81e810a0 t gfx_v9_4_3_xcp_resume +ffffffff81e811e0 t gfx_v9_4_3_query_ras_error_count +ffffffff81e81200 t gfx_v9_4_3_query_ras_error_status +ffffffff81e81220 t gfx_v9_4_3_reset_ras_error_count +ffffffff81e81240 t gfx_v9_4_3_reset_ras_error_status +ffffffff81e81260 t gfx_v9_4_3_enable_watchdog_timer +ffffffff81e81280 t gfx_v9_4_3_early_init +ffffffff81e81940 t gfx_v9_4_3_late_init +ffffffff81e819c0 t gfx_v9_4_3_sw_init +ffffffff81e81e20 t gfx_v9_4_3_sw_fini +ffffffff81e81fd0 t gfx_v9_4_3_hw_init +ffffffff81e82a70 t gfx_v9_4_3_hw_fini +ffffffff81e82b30 t gfx_v9_4_3_suspend +ffffffff81e82bf0 t gfx_v9_4_3_resume +ffffffff81e82c00 t gfx_v9_4_3_is_idle +ffffffff81e82db0 t gfx_v9_4_3_wait_for_idle +ffffffff81e82e40 t gfx_v9_4_3_soft_reset +ffffffff81e83550 t gfx_v9_4_3_set_clockgating_state +ffffffff81e836b0 t gfx_v9_4_3_set_powergating_state +ffffffff81e836e0 t gfx_v9_4_3_get_clockgating_state +ffffffff81e83850 t gfx_v9_4_3_kiq_set_resources +ffffffff81e83b70 t gfx_v9_4_3_kiq_map_queues +ffffffff81e83ed0 t gfx_v9_4_3_kiq_unmap_queues +ffffffff81e84250 t gfx_v9_4_3_kiq_query_status +ffffffff81e84540 t gfx_v9_4_3_kiq_invalidate_tlbs +ffffffff81e84660 t gfx_v9_4_3_ring_get_rptr_compute +ffffffff81e846a0 t gfx_v9_4_3_ring_get_wptr_compute +ffffffff81e84710 t gfx_v9_4_3_ring_set_wptr_compute +ffffffff81e84770 t gfx_v9_4_3_ring_emit_fence_kiq +ffffffff81e84bc0 t gfx_v9_4_3_ring_test_ring +ffffffff81e84e20 t gfx_v9_4_3_ring_emit_rreg +ffffffff81e850b0 t gfx_v9_4_3_ring_emit_wreg +ffffffff81e852e0 t gfx_v9_4_3_ring_emit_reg_wait +ffffffff81e85330 t gfx_v9_4_3_ring_emit_reg_write_reg_wait +ffffffff81e85350 t gfx_v9_4_3_wait_reg_mem +ffffffff81e85680 t gfx_v9_4_3_ring_emit_ib_compute +ffffffff81e859b0 t gfx_v9_4_3_ring_emit_fence +ffffffff81e85d60 t gfx_v9_4_3_ring_emit_pipeline_sync +ffffffff81e85dc0 t gfx_v9_4_3_ring_emit_vm_flush +ffffffff81e85de0 t gfx_v9_4_3_ring_emit_hdp_flush +ffffffff81e85eb0 t gfx_v9_4_3_ring_emit_gds_switch +ffffffff81e86050 t gfx_v9_4_3_ring_test_ib +ffffffff81e86200 t gfx_v9_4_3_emit_mem_sync +ffffffff81e864c0 t gfx_v9_4_3_emit_wave_limit +ffffffff81e866b0 t gfx_v9_4_3_write_data_to_reg +ffffffff81e868c0 t gfx_v9_4_3_set_eop_interrupt_state +ffffffff81e86a30 t gfx_v9_4_3_eop_irq +ffffffff81e86bd0 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state +ffffffff81e86d30 t gfx_v9_4_3_ih_to_xcc_inst +ffffffff81e86e00 t gfx_v9_4_3_set_priv_reg_fault_state +ffffffff81e871e0 t gfx_v9_4_3_priv_reg_irq +ffffffff81e87240 t gfx_v9_4_3_fault +ffffffff81e873c0 t gfx_v9_4_3_set_priv_inst_fault_state +ffffffff81e877a0 t gfx_v9_4_3_priv_inst_irq +ffffffff81e87800 t gfx_v9_4_3_is_rlc_enabled +ffffffff81e87920 t gfx_v9_4_3_xcc_set_safe_mode +ffffffff81e87bc0 t gfx_v9_4_3_xcc_unset_safe_mode +ffffffff81e87ce0 t gfx_v9_4_3_rlc_init +ffffffff81e87d30 t gfx_v9_4_3_rlc_resume +ffffffff81e87df0 t gfx_v9_4_3_rlc_stop +ffffffff81e87e90 t gfx_v9_4_3_rlc_reset +ffffffff81e88520 t gfx_v9_4_3_rlc_start +ffffffff81e885c0 t gfx_v9_4_3_update_spm_vmid +ffffffff81e887d0 t gfx_v9_4_3_is_rlcg_access_range +ffffffff81e88880 t gfx_v9_4_3_xcc_rlc_resume +ffffffff81e890d0 t gfx_v9_4_3_xcc_rlc_stop +ffffffff81e897f0 t gfx_v9_4_3_xcc_rlc_start +ffffffff81e89b80 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt +ffffffff81e89da0 t gfx_v9_4_3_xcc_select_se_sh +ffffffff81e89fa0 t gfx_v9_4_3_mec_init +ffffffff81e8a2a0 t gfx_v9_4_3_gpu_early_init +ffffffff81e8a4d0 t amdgpu_bo_unreserve +ffffffff81e8a5b0 t gfx_v9_4_3_get_gpu_clock_counter +ffffffff81e8a8f0 t gfx_v9_4_3_read_wave_data +ffffffff81e8abc0 t gfx_v9_4_3_read_wave_vgprs +ffffffff81e8abe0 t gfx_v9_4_3_read_wave_sgprs +ffffffff81e8ac30 t gfx_v9_4_3_select_me_pipe_q +ffffffff81e8aca0 t gfx_v9_4_3_switch_compute_partition +ffffffff81e8b000 t wave_read_ind +ffffffff81e8b200 t wave_read_regs +ffffffff81e8b490 t gfx_v9_4_3_xcc_constants_init +ffffffff81e8c510 t gfx_v9_4_3_xcc_cp_resume +ffffffff81e8d4c0 t gfx_v9_4_3_xcc_cp_compute_enable +ffffffff81e8d660 t amdgpu_bo_reserve +ffffffff81e8d7e0 t gfx_v9_4_3_xcc_kiq_init_register +ffffffff81e8f420 t gfx_v9_4_3_xcc_mqd_init +ffffffff81e8fe60 t gfx_v9_4_3_xcc_fini +ffffffff81e90400 t gfx_v9_4_3_xcc_q_fini_register +ffffffff81e90db0 t gfx_v9_4_3_xcc_update_sram_fgcg +ffffffff81e91020 t gfx_v9_4_3_xcc_update_repeater_fgcg +ffffffff81e91290 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating +ffffffff81e91de0 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating +ffffffff81e92640 t gfx_v9_4_3_inst_query_ras_err_count +ffffffff81e928a0 t gfx_v9_4_3_inst_query_ras_err_status +ffffffff81e93620 t gfx_v9_4_3_inst_reset_ras_err_count +ffffffff81e937e0 t gfx_v9_4_3_inst_reset_ras_err_status +ffffffff81e93f60 t gfx_v9_4_3_inst_enable_watchdog_timer +ffffffff81e95000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e95090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e951d0 t gfxhub_v1_0_gart_enable +ffffffff81e96700 t gfxhub_v1_0_gart_disable +ffffffff81e969a0 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e96aa0 t gfxhub_v1_0_init +ffffffff81e97000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e98000 t gfxhub_v1_2_get_mc_fb_offset +ffffffff81e98120 t gfxhub_v1_2_setup_vm_pt_regs +ffffffff81e98190 t gfxhub_v1_2_gart_enable +ffffffff81e98220 t gfxhub_v1_2_gart_disable +ffffffff81e98280 t gfxhub_v1_2_set_fault_enable_default +ffffffff81e982f0 t gfxhub_v1_2_init +ffffffff81e985f0 t gfxhub_v1_2_get_xgmi_info +ffffffff81e98860 t gfxhub_v1_2_xcp_suspend +ffffffff81e988a0 t gfxhub_v1_2_xcp_resume +ffffffff81e98910 t gfxhub_v1_2_xcc_setup_vm_pt_regs +ffffffff81e98c30 t gfxhub_v1_2_xcc_gart_enable +ffffffff81e9c070 t gfxhub_v1_2_xcc_gart_disable +ffffffff81e9c6e0 t gfxhub_v1_2_xcc_set_fault_enable_default +ffffffff81e9d000 t gfxhub_v2_0_get_fb_location +ffffffff81e9d090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e9d120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e9d260 t gfxhub_v2_0_gart_enable +ffffffff81e9e490 t gfxhub_v2_0_gart_disable +ffffffff81e9e6e0 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e9e7e0 t gfxhub_v2_0_init +ffffffff81e9e8b0 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e9ea90 t gfxhub_v2_0_get_invalidate_req +ffffffff81e9f000 t gfxhub_v2_1_get_fb_location +ffffffff81e9f090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e9f120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e9f260 t gfxhub_v2_1_gart_enable +ffffffff81ea0560 t gfxhub_v2_1_gart_disable +ffffffff81ea07b0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81ea08d0 t gfxhub_v2_1_init +ffffffff81ea09a0 t gfxhub_v2_1_get_xgmi_info +ffffffff81ea0ae0 t gfxhub_v2_1_utcl2_harvest +ffffffff81ea0cc0 t gfxhub_v2_1_save_regs +ffffffff81ea1730 t gfxhub_v2_1_restore_regs +ffffffff81ea2350 t gfxhub_v2_1_halt +ffffffff81ea2720 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81ea2900 t gfxhub_v2_1_get_invalidate_req +ffffffff81ea3000 t gfxhub_v3_0_get_fb_location +ffffffff81ea3090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81ea3120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81ea3260 t gfxhub_v3_0_gart_enable +ffffffff81ea4560 t gfxhub_v3_0_gart_disable +ffffffff81ea4800 t gfxhub_v3_0_set_fault_enable_default +ffffffff81ea49d0 t gfxhub_v3_0_init +ffffffff81ea4aa0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81ea4c80 t gfxhub_v3_0_get_invalidate_req +ffffffff81ea5000 t gfxhub_v3_0_3_get_fb_location +ffffffff81ea5090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81ea5120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81ea5260 t gfxhub_v3_0_3_gart_enable +ffffffff81ea6450 t gfxhub_v3_0_3_gart_disable +ffffffff81ea66f0 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81ea6810 t gfxhub_v3_0_3_init +ffffffff81ea68e0 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81ea6ac0 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81ea7000 t gmc_v10_0_early_init +ffffffff81ea7170 t gmc_v10_0_late_init +ffffffff81ea71e0 t gmc_v10_0_sw_init +ffffffff81ea75d0 t gmc_v10_0_sw_fini +ffffffff81ea7620 t gmc_v10_0_hw_init +ffffffff81ea7830 t gmc_v10_0_hw_fini +ffffffff81ea78f0 t gmc_v10_0_suspend +ffffffff81ea7930 t gmc_v10_0_resume +ffffffff81ea7990 t gmc_v10_0_is_idle +ffffffff81ea79c0 t gmc_v10_0_wait_for_idle +ffffffff81ea79f0 t gmc_v10_0_soft_reset +ffffffff81ea7a20 t gmc_v10_0_set_clockgating_state +ffffffff81ea7ad0 t gmc_v10_0_set_powergating_state +ffffffff81ea7b00 t gmc_v10_0_get_clockgating_state +ffffffff81ea7ba0 t gmc_v10_0_flush_gpu_tlb +ffffffff81ea7e30 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81ea80e0 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81ea8290 t gmc_v10_0_emit_pasid_mapping +ffffffff81ea8310 t gmc_v10_0_map_mtype +ffffffff81ea8360 t gmc_v10_0_get_vm_pde +ffffffff81ea8450 t gmc_v10_0_get_vm_pte +ffffffff81ea8530 t gmc_v10_0_get_vbios_fb_size +ffffffff81ea86a0 t gmc_v10_0_flush_vm_hub +ffffffff81ea8ad0 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81ea8b70 t gmc_v10_0_process_interrupt +ffffffff81ea8e50 t gmc_v10_0_ecc_interrupt_state +ffffffff81ea8e80 t gmc_v10_0_gart_init +ffffffff81ea9000 t gmc_v11_0_early_init +ffffffff81ea91f0 t gmc_v11_0_late_init +ffffffff81ea9260 t gmc_v11_0_sw_init +ffffffff81ea9570 t gmc_v11_0_sw_fini +ffffffff81ea95c0 t gmc_v11_0_hw_init +ffffffff81ea9720 t gmc_v11_0_hw_fini +ffffffff81ea97c0 t gmc_v11_0_suspend +ffffffff81ea9860 t gmc_v11_0_resume +ffffffff81ea98c0 t gmc_v11_0_is_idle +ffffffff81ea98f0 t gmc_v11_0_wait_for_idle +ffffffff81ea9920 t gmc_v11_0_soft_reset +ffffffff81ea9950 t gmc_v11_0_set_clockgating_state +ffffffff81ea99d0 t gmc_v11_0_set_powergating_state +ffffffff81ea9a00 t gmc_v11_0_get_clockgating_state +ffffffff81ea9a40 t gmc_v11_0_flush_gpu_tlb +ffffffff81ea9ef0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81eaa160 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81eaa310 t gmc_v11_0_emit_pasid_mapping +ffffffff81eaa390 t gmc_v11_0_map_mtype +ffffffff81eaa3e0 t gmc_v11_0_get_vm_pde +ffffffff81eaa4e0 t gmc_v11_0_get_vm_pte +ffffffff81eaa5c0 t gmc_v11_0_get_vbios_fb_size +ffffffff81eaa730 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81eaa7d0 t gmc_v11_0_process_interrupt +ffffffff81eaaa00 t gmc_v11_0_ecc_interrupt_state +ffffffff81eaaa30 t gmc_v11_0_gart_init +ffffffff81eab000 t gmc_v7_0_early_init +ffffffff81eab0a0 t gmc_v7_0_late_init +ffffffff81eab0f0 t gmc_v7_0_sw_init +ffffffff81eab520 t gmc_v7_0_sw_fini +ffffffff81eab5a0 t gmc_v7_0_hw_init +ffffffff81eabf20 t gmc_v7_0_hw_fini +ffffffff81eabfe0 t gmc_v7_0_suspend +ffffffff81eac020 t gmc_v7_0_resume +ffffffff81eac080 t gmc_v7_0_is_idle +ffffffff81eac0d0 t gmc_v7_0_wait_for_idle +ffffffff81eac170 t gmc_v7_0_soft_reset +ffffffff81eac3d0 t gmc_v7_0_set_clockgating_state +ffffffff81eac630 t gmc_v7_0_set_powergating_state +ffffffff81eac660 t gmc_v7_0_flush_gpu_tlb +ffffffff81eac690 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81eac750 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81eac7f0 t gmc_v7_0_emit_pasid_mapping +ffffffff81eac820 t gmc_v7_0_set_prt +ffffffff81eac9e0 t gmc_v7_0_get_vm_pde +ffffffff81eaca40 t gmc_v7_0_get_vm_pte +ffffffff81eaca80 t gmc_v7_0_get_vbios_fb_size +ffffffff81eacaf0 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81eacbc0 t gmc_v7_0_process_interrupt +ffffffff81eace70 t gmc_v7_0_gart_init +ffffffff81ead000 t gmc_v8_0_early_init +ffffffff81ead0a0 t gmc_v8_0_late_init +ffffffff81ead0f0 t gmc_v8_0_sw_init +ffffffff81ead6a0 t gmc_v8_0_sw_fini +ffffffff81ead720 t gmc_v8_0_hw_init +ffffffff81eae3b0 t gmc_v8_0_hw_fini +ffffffff81eae470 t gmc_v8_0_suspend +ffffffff81eae4b0 t gmc_v8_0_resume +ffffffff81eae510 t gmc_v8_0_is_idle +ffffffff81eae560 t gmc_v8_0_wait_for_idle +ffffffff81eae600 t gmc_v8_0_check_soft_reset +ffffffff81eae670 t gmc_v8_0_pre_soft_reset +ffffffff81eae7e0 t gmc_v8_0_soft_reset +ffffffff81eae8b0 t gmc_v8_0_post_soft_reset +ffffffff81eae920 t gmc_v8_0_set_clockgating_state +ffffffff81eaeee0 t gmc_v8_0_set_powergating_state +ffffffff81eaef10 t gmc_v8_0_get_clockgating_state +ffffffff81eaef80 t gmc_v8_0_flush_gpu_tlb +ffffffff81eaefb0 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81eaf070 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81eaf110 t gmc_v8_0_emit_pasid_mapping +ffffffff81eaf140 t gmc_v8_0_set_prt +ffffffff81eaf300 t gmc_v8_0_get_vm_pde +ffffffff81eaf360 t gmc_v8_0_get_vm_pte +ffffffff81eaf3b0 t gmc_v8_0_get_vbios_fb_size +ffffffff81eaf420 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81eaf4f0 t gmc_v8_0_process_interrupt +ffffffff81eaf890 t gmc_v8_0_gart_init +ffffffff81eb0000 T gmc_v9_0_restore_registers +ffffffff81eb0160 t gmc_v9_0_early_init +ffffffff81eb0510 t gmc_v9_0_late_init +ffffffff81eb0620 t gmc_v9_0_sw_init +ffffffff81eb0d80 t gmc_v9_0_sw_fini +ffffffff81eb0e40 t gmc_v9_0_hw_init +ffffffff81eb1300 t gmc_v9_0_hw_fini +ffffffff81eb13e0 t gmc_v9_0_suspend +ffffffff81eb1420 t gmc_v9_0_resume +ffffffff81eb1480 t gmc_v9_0_is_idle +ffffffff81eb14b0 t gmc_v9_0_wait_for_idle +ffffffff81eb14e0 t gmc_v9_0_soft_reset +ffffffff81eb1510 t gmc_v9_0_set_clockgating_state +ffffffff81eb1570 t gmc_v9_0_set_powergating_state +ffffffff81eb15a0 t gmc_v9_0_get_clockgating_state +ffffffff81eb15e0 t gmc_v9_0_flush_gpu_tlb +ffffffff81eb1c80 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81eb2030 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81eb2230 t gmc_v9_0_emit_pasid_mapping +ffffffff81eb22b0 t gmc_v9_0_map_mtype +ffffffff81eb22f0 t gmc_v9_0_get_vm_pde +ffffffff81eb23f0 t gmc_v9_0_get_vm_pte +ffffffff81eb2720 t gmc_v9_0_override_vm_pte_flags +ffffffff81eb27e0 t gmc_v9_0_get_vbios_fb_size +ffffffff81eb2980 t gmc_v9_0_query_memory_partition +ffffffff81eb29e0 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81eb2e80 t gmc_v9_0_process_interrupt +ffffffff81eb36a0 t gmc_v9_0_ecc_interrupt_state +ffffffff81eb3800 t gmc_v9_0_init_mem_ranges +ffffffff81eb3c30 t gmc_v9_0_gart_init +ffffffff81eb3d60 t gmc_v9_0_save_registers +ffffffff81eb4000 t hdp_v4_0_query_ras_error_count +ffffffff81eb40c0 t hdp_v4_0_reset_ras_error_count +ffffffff81eb41e0 t hdp_v4_0_flush_hdp +ffffffff81eb4230 t hdp_v4_0_invalidate_hdp +ffffffff81eb4310 t hdp_v4_0_update_clock_gating +ffffffff81eb4410 t hdp_v4_0_get_clockgating_state +ffffffff81eb4460 t hdp_v4_0_init_registers +ffffffff81eb5000 t hdp_v5_0_flush_hdp +ffffffff81eb5050 t hdp_v5_0_invalidate_hdp +ffffffff81eb50f0 t hdp_v5_0_update_clock_gating +ffffffff81eb54f0 t hdp_v5_0_get_clockgating_state +ffffffff81eb5610 t hdp_v5_0_init_registers +ffffffff81eb6000 t hdp_v5_2_flush_hdp +ffffffff81eb6050 t hdp_v5_2_update_clock_gating +ffffffff81eb6460 t hdp_v5_2_get_clockgating_state +ffffffff81eb7000 t hdp_v6_0_flush_hdp +ffffffff81eb7050 t hdp_v6_0_update_clock_gating +ffffffff81eb7380 t hdp_v6_0_get_clockgating_state +ffffffff81eb8000 t iceland_ih_early_init +ffffffff81eb8050 t iceland_ih_sw_init +ffffffff81eb80b0 t iceland_ih_sw_fini +ffffffff81eb80f0 t iceland_ih_hw_init +ffffffff81eb8310 t iceland_ih_hw_fini +ffffffff81eb83e0 t iceland_ih_suspend +ffffffff81eb84b0 t iceland_ih_resume +ffffffff81eb84f0 t iceland_ih_is_idle +ffffffff81eb8540 t iceland_ih_wait_for_idle +ffffffff81eb85e0 t iceland_ih_soft_reset +ffffffff81eb86c0 t iceland_ih_set_clockgating_state +ffffffff81eb86f0 t iceland_ih_set_powergating_state +ffffffff81eb8720 t iceland_ih_get_wptr +ffffffff81eb8830 t iceland_ih_decode_iv +ffffffff81eb88b0 t iceland_ih_set_rptr +ffffffff81eb9000 t ih_v6_0_early_init +ffffffff81eb9050 t ih_v6_0_sw_init +ffffffff81eb91b0 t ih_v6_0_sw_fini +ffffffff81eb91f0 t ih_v6_0_hw_init +ffffffff81eb97a0 t ih_v6_0_hw_fini +ffffffff81eb9800 t ih_v6_0_suspend +ffffffff81eb9860 t ih_v6_0_resume +ffffffff81eb9870 t ih_v6_0_is_idle +ffffffff81eb98a0 t ih_v6_0_wait_for_idle +ffffffff81eb98d0 t ih_v6_0_soft_reset +ffffffff81eb9900 t ih_v6_0_set_clockgating_state +ffffffff81eb9a30 t ih_v6_0_set_powergating_state +ffffffff81eb9bb0 t ih_v6_0_get_clockgating_state +ffffffff81eb9c40 t ih_v6_0_get_wptr +ffffffff81eb9d60 t ih_v6_0_set_rptr +ffffffff81eb9e30 t ih_v6_0_self_irq +ffffffff81eb9ea0 t ih_v6_0_toggle_interrupts +ffffffff81eba080 t force_update_wptr_for_self_int +ffffffff81ebb000 t ih_v6_1_early_init +ffffffff81ebb050 t ih_v6_1_sw_init +ffffffff81ebb1b0 t ih_v6_1_sw_fini +ffffffff81ebb1f0 t ih_v6_1_hw_init +ffffffff81ebb7a0 t ih_v6_1_hw_fini +ffffffff81ebb800 t ih_v6_1_suspend +ffffffff81ebb860 t ih_v6_1_resume +ffffffff81ebb870 t ih_v6_1_is_idle +ffffffff81ebb8a0 t ih_v6_1_wait_for_idle +ffffffff81ebb8d0 t ih_v6_1_soft_reset +ffffffff81ebb900 t ih_v6_1_set_clockgating_state +ffffffff81ebba30 t ih_v6_1_set_powergating_state +ffffffff81ebbbb0 t ih_v6_1_get_clockgating_state +ffffffff81ebbc40 t ih_v6_1_get_wptr +ffffffff81ebbd60 t ih_v6_1_set_rptr +ffffffff81ebbe30 t ih_v6_1_self_irq +ffffffff81ebbea0 t ih_v6_1_toggle_interrupts +ffffffff81ebc080 t force_update_wptr_for_self_int +ffffffff81ebd000 t imu_v11_0_init_microcode +ffffffff81ebd170 t imu_v11_0_load_microcode +ffffffff81ebd4f0 t imu_v11_0_setup +ffffffff81ebd780 t imu_v11_0_start +ffffffff81ebd880 t imu_v11_0_program_rlc_ram +ffffffff81ebda40 t imu_v11_0_wait_for_reset_status +ffffffff81ebdb90 t program_imu_rlc_ram +ffffffff81ebe000 T imu_v11_0_3_program_rlc_ram +ffffffff81ebf000 T jpeg_v1_0_early_init +ffffffff81ebf080 T jpeg_v1_0_sw_init +ffffffff81ebf170 T jpeg_v1_0_sw_fini +ffffffff81ebf190 T jpeg_v1_0_start +ffffffff81ebfc40 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81ebfcd0 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81ebfd60 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81ebfdd0 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81ec06f0 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81ec1030 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81ec10a0 t jpeg_v1_0_decode_ring_nop +ffffffff81ec1200 t jpeg_v1_0_decode_ring_insert_start +ffffffff81ec13c0 t jpeg_v1_0_decode_ring_insert_end +ffffffff81ec1580 t jpeg_v1_0_ring_begin_use +ffffffff81ec1680 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81ec18e0 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81ec1d00 t jpeg_v1_0_set_interrupt_state +ffffffff81ec1d30 t jpeg_v1_0_process_interrupt +ffffffff81ec2000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81ec21a0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81ec2340 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81ec2a20 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81ec31d0 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81ec3580 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81ec35f0 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81ec3830 T jpeg_v2_0_dec_ring_nop +ffffffff81ec3990 t jpeg_v2_0_early_init +ffffffff81ec3a20 t jpeg_v2_0_sw_init +ffffffff81ec3b50 t jpeg_v2_0_sw_fini +ffffffff81ec3ba0 t jpeg_v2_0_hw_init +ffffffff81ec3c20 t jpeg_v2_0_hw_fini +ffffffff81ec3d00 t jpeg_v2_0_suspend +ffffffff81ec3d30 t jpeg_v2_0_resume +ffffffff81ec3dc0 t jpeg_v2_0_is_idle +ffffffff81ec3e50 t jpeg_v2_0_wait_for_idle +ffffffff81ec3e90 t jpeg_v2_0_set_clockgating_state +ffffffff81ec3f40 t jpeg_v2_0_set_powergating_state +ffffffff81ec4660 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81ec46f0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81ec4790 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81ec4830 t jpeg_v2_0_set_interrupt_state +ffffffff81ec4860 t jpeg_v2_0_process_interrupt +ffffffff81ec48f0 t jpeg_v2_0_enable_clock_gating +ffffffff81ec4aa0 t jpeg_v2_0_disable_clock_gating +ffffffff81ec5000 t jpeg_v2_6_query_ras_poison_status +ffffffff81ec5150 t jpeg_v2_5_early_init +ffffffff81ec5350 t jpeg_v2_5_sw_init +ffffffff81ec55f0 t jpeg_v2_5_sw_fini +ffffffff81ec5640 t jpeg_v2_5_hw_init +ffffffff81ec5730 t jpeg_v2_5_hw_fini +ffffffff81ec58b0 t jpeg_v2_5_suspend +ffffffff81ec58e0 t jpeg_v2_5_resume +ffffffff81ec59e0 t jpeg_v2_5_is_idle +ffffffff81ec5ae0 t jpeg_v2_5_wait_for_idle +ffffffff81ec5b90 t jpeg_v2_5_set_clockgating_state +ffffffff81ec5c40 t jpeg_v2_5_set_powergating_state +ffffffff81ec6370 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81ec6410 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81ec64c0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81ec6570 t jpeg_v2_6_dec_ring_insert_start +ffffffff81ec6730 t jpeg_v2_6_dec_ring_insert_end +ffffffff81ec68f0 t jpeg_v2_5_set_interrupt_state +ffffffff81ec6920 t jpeg_v2_5_process_interrupt +ffffffff81ec69e0 t jpeg_v2_6_set_ras_interrupt_state +ffffffff81ec6a10 t jpeg_v2_5_enable_clock_gating +ffffffff81ec6af0 t jpeg_v2_5_disable_clock_gating +ffffffff81ec7000 t jpeg_v3_0_early_init +ffffffff81ec7110 t jpeg_v3_0_sw_init +ffffffff81ec7240 t jpeg_v3_0_sw_fini +ffffffff81ec7290 t jpeg_v3_0_hw_init +ffffffff81ec7310 t jpeg_v3_0_hw_fini +ffffffff81ec73f0 t jpeg_v3_0_suspend +ffffffff81ec7420 t jpeg_v3_0_resume +ffffffff81ec74b0 t jpeg_v3_0_is_idle +ffffffff81ec7540 t jpeg_v3_0_wait_for_idle +ffffffff81ec7580 t jpeg_v3_0_set_clockgating_state +ffffffff81ec7630 t jpeg_v3_0_set_powergating_state +ffffffff81ec7e10 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81ec7ea0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81ec7f40 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81ec7fe0 t jpeg_v3_0_set_interrupt_state +ffffffff81ec8010 t jpeg_v3_0_process_interrupt +ffffffff81ec80a0 t jpeg_v3_0_enable_clock_gating +ffffffff81ec8170 t jpeg_v3_0_disable_clock_gating +ffffffff81ec9000 t jpeg_v4_0_query_ras_poison_status +ffffffff81ec9150 t jpeg_v4_0_early_init +ffffffff81ec9220 t jpeg_v4_0_sw_init +ffffffff81ec93c0 t jpeg_v4_0_sw_fini +ffffffff81ec9410 t jpeg_v4_0_hw_init +ffffffff81ec9a40 t jpeg_v4_0_hw_fini +ffffffff81ec9b10 t jpeg_v4_0_suspend +ffffffff81ec9b40 t jpeg_v4_0_resume +ffffffff81ec9b90 t jpeg_v4_0_is_idle +ffffffff81ec9c20 t jpeg_v4_0_wait_for_idle +ffffffff81ec9c60 t jpeg_v4_0_set_clockgating_state +ffffffff81ec9d10 t jpeg_v4_0_set_powergating_state +ffffffff81eca470 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81eca500 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81eca5a0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81eca640 t jpeg_v4_0_set_interrupt_state +ffffffff81eca670 t jpeg_v4_0_process_interrupt +ffffffff81eca710 t jpeg_v4_0_set_ras_interrupt_state +ffffffff81eca740 t jpeg_v4_0_enable_clock_gating +ffffffff81eca900 t jpeg_v4_0_disable_clock_gating +ffffffff81ecb000 t jpeg_v4_0_3_early_init +ffffffff81ecb170 t jpeg_v4_0_3_sw_init +ffffffff81ecb4a0 t jpeg_v4_0_3_sw_fini +ffffffff81ecb4f0 t jpeg_v4_0_3_hw_init +ffffffff81ecbf50 t jpeg_v4_0_3_hw_fini +ffffffff81ecbfe0 t jpeg_v4_0_3_suspend +ffffffff81ecc060 t jpeg_v4_0_3_resume +ffffffff81ecc0b0 t jpeg_v4_0_3_is_idle +ffffffff81ecc290 t jpeg_v4_0_3_wait_for_idle +ffffffff81ecc3e0 t jpeg_v4_0_3_set_clockgating_state +ffffffff81ecc470 t jpeg_v4_0_3_set_powergating_state +ffffffff81ecd0d0 t jpeg_v4_0_3_dec_ring_get_rptr +ffffffff81ecd240 t jpeg_v4_0_3_dec_ring_get_wptr +ffffffff81ecd3d0 t jpeg_v4_0_3_dec_ring_set_wptr +ffffffff81ecd570 t jpeg_v4_0_3_dec_ring_emit_ib +ffffffff81ecddd0 t jpeg_v4_0_3_dec_ring_emit_fence +ffffffff81ece560 t jpeg_v4_0_3_dec_ring_emit_vm_flush +ffffffff81ece5d0 t jpeg_v4_0_3_dec_ring_nop +ffffffff81ece730 t jpeg_v4_0_3_dec_ring_insert_start +ffffffff81ece8d0 t jpeg_v4_0_3_dec_ring_insert_end +ffffffff81ecea70 t jpeg_v4_0_3_dec_ring_emit_wreg +ffffffff81ececb0 t jpeg_v4_0_3_dec_ring_emit_reg_wait +ffffffff81ecf060 t jpeg_v4_0_3_set_interrupt_state +ffffffff81ecf090 t jpeg_v4_0_3_process_interrupt +ffffffff81ecf2d0 t jpeg_v4_0_3_query_ras_error_count +ffffffff81ecf3c0 t jpeg_v4_0_3_reset_ras_error_count +ffffffff81ecf4b0 t jpeg_v4_0_3_disable_clock_gating +ffffffff81ed0000 t lsdma_v6_0_copy_mem +ffffffff81ed0370 t lsdma_v6_0_fill_mem +ffffffff81ed0660 t lsdma_v6_0_update_memory_power_gating +ffffffff81ed1000 t mca_v3_0_ras_block_match +ffffffff81ed1050 t mca_v3_0_mp0_query_ras_error_count +ffffffff81ed1070 t mca_v3_0_mp1_query_ras_error_count +ffffffff81ed1090 t mca_v3_0_mpio_query_ras_error_count +ffffffff81ed2000 t mes_v10_0_early_init +ffffffff81ed2060 t mes_v10_0_late_init +ffffffff81ed20b0 t mes_v10_1_sw_init +ffffffff81ed2550 t mes_v10_1_sw_fini +ffffffff81ed2670 t mes_v10_1_hw_init +ffffffff81ed2f60 t mes_v10_1_hw_fini +ffffffff81ed3050 t mes_v10_1_suspend +ffffffff81ed3160 t mes_v10_1_resume +ffffffff81ed31b0 t mes_v10_1_kiq_hw_init +ffffffff81ed35c0 t mes_v10_1_add_hw_queue +ffffffff81ed3740 t mes_v10_1_remove_hw_queue +ffffffff81ed37d0 t mes_v10_1_unmap_legacy_queue +ffffffff81ed38c0 t mes_v10_1_suspend_gang +ffffffff81ed38f0 t mes_v10_1_resume_gang +ffffffff81ed3920 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81ed3b20 t mes_v10_1_load_microcode +ffffffff81ed4340 t mes_v10_1_enable +ffffffff81ed47c0 t mes_v10_1_queue_init +ffffffff81ed4a60 t amdgpu_bo_unreserve +ffffffff81ed4b40 t mes_v10_1_ring_get_rptr +ffffffff81ed4b70 t mes_v10_1_ring_get_wptr +ffffffff81ed4be0 t mes_v10_1_ring_set_wptr +ffffffff81ed5000 t mes_v11_0_early_init +ffffffff81ed5060 t mes_v11_0_late_init +ffffffff81ed50d0 t mes_v11_0_sw_init +ffffffff81ed5580 t mes_v11_0_sw_fini +ffffffff81ed5740 t mes_v11_0_hw_init +ffffffff81ed5f70 t mes_v11_0_hw_fini +ffffffff81ed5fa0 t mes_v11_0_suspend +ffffffff81ed5fb0 t mes_v11_0_resume +ffffffff81ed6000 t mes_v11_0_kiq_hw_init +ffffffff81ed6210 t mes_v11_0_kiq_hw_fini +ffffffff81ed6350 t mes_v11_0_add_hw_queue +ffffffff81ed6550 t mes_v11_0_remove_hw_queue +ffffffff81ed65e0 t mes_v11_0_unmap_legacy_queue +ffffffff81ed66e0 t mes_v11_0_suspend_gang +ffffffff81ed6710 t mes_v11_0_resume_gang +ffffffff81ed6740 t mes_v11_0_misc_op +ffffffff81ed6900 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff81ed6b20 t mes_v11_0_load_microcode +ffffffff81ed72c0 t mes_v11_0_enable +ffffffff81ed77d0 t mes_v11_0_queue_init +ffffffff81ed8270 t amdgpu_bo_unreserve +ffffffff81ed8350 t mes_v11_0_mqd_init +ffffffff81ed8540 t mes_v11_0_kiq_dequeue +ffffffff81ed8980 t mes_v11_0_ring_get_rptr +ffffffff81ed89b0 t mes_v11_0_ring_get_wptr +ffffffff81ed8a20 t mes_v11_0_ring_set_wptr +ffffffff81ed9000 t mmhub_v1_0_query_ras_error_count +ffffffff81ed9150 t mmhub_v1_0_reset_ras_error_count +ffffffff81ed9200 t mmhub_v1_0_get_fb_location +ffffffff81ed9320 t mmhub_v1_0_init +ffffffff81ed93d0 t mmhub_v1_0_gart_enable +ffffffff81eda710 t mmhub_v1_0_set_fault_enable_default +ffffffff81eda830 t mmhub_v1_0_gart_disable +ffffffff81edaad0 t mmhub_v1_0_set_clockgating +ffffffff81edaf60 t mmhub_v1_0_get_clockgating +ffffffff81edb080 t mmhub_v1_0_setup_vm_pt_regs +ffffffff81edb1c0 t mmhub_v1_0_update_power_gating +ffffffff81edc000 t mmhub_v1_7_query_ras_error_count +ffffffff81edc150 t mmhub_v1_7_query_ras_error_status +ffffffff81edc230 t mmhub_v1_7_reset_ras_error_count +ffffffff81edc2d0 t mmhub_v1_7_reset_ras_error_status +ffffffff81edc3d0 t mmhub_v1_7_get_fb_location +ffffffff81edc4f0 t mmhub_v1_7_init +ffffffff81edc590 t mmhub_v1_7_gart_enable +ffffffff81eddaa0 t mmhub_v1_7_set_fault_enable_default +ffffffff81eddbc0 t mmhub_v1_7_gart_disable +ffffffff81edde60 t mmhub_v1_7_set_clockgating +ffffffff81ede200 t mmhub_v1_7_get_clockgating +ffffffff81ede320 t mmhub_v1_7_setup_vm_pt_regs +ffffffff81edf000 t mmhub_v1_8_get_fb_location +ffffffff81edf120 t mmhub_v1_8_init +ffffffff81edf280 t mmhub_v1_8_gart_enable +ffffffff81ee0e90 t mmhub_v1_8_set_fault_enable_default +ffffffff81ee1060 t mmhub_v1_8_gart_disable +ffffffff81ee13a0 t mmhub_v1_8_set_clockgating +ffffffff81ee13d0 t mmhub_v1_8_get_clockgating +ffffffff81ee1400 t mmhub_v1_8_setup_vm_pt_regs +ffffffff81ee1610 t mmhub_v1_8_query_ras_error_count +ffffffff81ee1770 t mmhub_v1_8_query_ras_error_status +ffffffff81ee1a20 t mmhub_v1_8_reset_ras_error_count +ffffffff81ee1b40 t mmhub_v1_8_reset_ras_error_status +ffffffff81ee3000 t mmhub_v2_0_init +ffffffff81ee30d0 t mmhub_v2_0_gart_enable +ffffffff81ee4290 t mmhub_v2_0_set_fault_enable_default +ffffffff81ee43b0 t mmhub_v2_0_gart_disable +ffffffff81ee4640 t mmhub_v2_0_set_clockgating +ffffffff81ee4990 t mmhub_v2_0_get_clockgating +ffffffff81ee4b20 t mmhub_v2_0_setup_vm_pt_regs +ffffffff81ee4c60 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff81ee4ec0 t mmhub_v2_0_get_invalidate_req +ffffffff81ee5000 t mmhub_v2_3_init +ffffffff81ee50e0 t mmhub_v2_3_gart_enable +ffffffff81ee64b0 t mmhub_v2_3_set_fault_enable_default +ffffffff81ee65b0 t mmhub_v2_3_gart_disable +ffffffff81ee6850 t mmhub_v2_3_set_clockgating +ffffffff81ee6cf0 t mmhub_v2_3_get_clockgating +ffffffff81ee6ee0 t mmhub_v2_3_setup_vm_pt_regs +ffffffff81ee7020 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff81ee7240 t mmhub_v2_3_get_invalidate_req +ffffffff81ee8000 t mmhub_v3_0_get_fb_location +ffffffff81ee8090 t mmhub_v3_0_get_mc_fb_offset +ffffffff81ee8120 t mmhub_v3_0_init +ffffffff81ee8200 t mmhub_v3_0_gart_enable +ffffffff81ee9420 t mmhub_v3_0_set_fault_enable_default +ffffffff81ee9540 t mmhub_v3_0_gart_disable +ffffffff81ee97d0 t mmhub_v3_0_set_clockgating +ffffffff81ee99a0 t mmhub_v3_0_get_clockgating +ffffffff81ee9a50 t mmhub_v3_0_setup_vm_pt_regs +ffffffff81ee9b90 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff81ee9db0 t mmhub_v3_0_get_invalidate_req +ffffffff81eea000 t mmhub_v3_0_1_get_fb_location +ffffffff81eea090 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff81eea120 t mmhub_v3_0_1_init +ffffffff81eea1f0 t mmhub_v3_0_1_gart_enable +ffffffff81eeb4f0 t mmhub_v3_0_1_set_fault_enable_default +ffffffff81eeb5f0 t mmhub_v3_0_1_gart_disable +ffffffff81eeb890 t mmhub_v3_0_1_set_clockgating +ffffffff81eeba50 t mmhub_v3_0_1_get_clockgating +ffffffff81eebb00 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff81eebc40 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff81eebe50 t mmhub_v3_0_1_get_invalidate_req +ffffffff81eec000 t mmhub_v3_0_2_get_fb_location +ffffffff81eec090 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff81eec120 t mmhub_v3_0_2_init +ffffffff81eec1f0 t mmhub_v3_0_2_gart_enable +ffffffff81eed3e0 t mmhub_v3_0_2_set_fault_enable_default +ffffffff81eed500 t mmhub_v3_0_2_gart_disable +ffffffff81eed790 t mmhub_v3_0_2_set_clockgating +ffffffff81eed7c0 t mmhub_v3_0_2_get_clockgating +ffffffff81eed7f0 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff81eed930 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff81eedb30 t mmhub_v3_0_2_get_invalidate_req +ffffffff81eee000 t mmhub_v9_4_query_ras_error_count +ffffffff81eee150 t mmhub_v9_4_query_ras_error_status +ffffffff81eee230 t mmhub_v9_4_reset_ras_error_count +ffffffff81eee300 t mmhub_v9_4_get_fb_location +ffffffff81eee420 t mmhub_v9_4_init +ffffffff81eee570 t mmhub_v9_4_gart_enable +ffffffff81eefa00 t mmhub_v9_4_set_fault_enable_default +ffffffff81eefbf0 t mmhub_v9_4_gart_disable +ffffffff81eeff60 t mmhub_v9_4_set_clockgating +ffffffff81ef0440 t mmhub_v9_4_get_clockgating +ffffffff81ef0570 t mmhub_v9_4_setup_vm_pt_regs +ffffffff81ef05c0 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff81ef1000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff81ef1050 T xgpu_ai_mailbox_add_irq_id +ffffffff81ef10e0 T xgpu_ai_mailbox_get_irq +ffffffff81ef1190 t xgpu_ai_mailbox_flr_work +ffffffff81ef1390 T xgpu_ai_mailbox_put_irq +ffffffff81ef13d0 t xgpu_ai_request_full_gpu_access +ffffffff81ef13f0 t xgpu_ai_release_full_gpu_access +ffffffff81ef1410 t xgpu_ai_request_init_data +ffffffff81ef1470 t xgpu_ai_request_reset +ffffffff81ef1520 t xgpu_ai_mailbox_trans_msg +ffffffff81ef1740 t xgpu_ai_ras_poison_handler +ffffffff81ef1770 t xgpu_ai_set_mailbox_ack_irq +ffffffff81ef1800 t xgpu_ai_mailbox_ack_irq +ffffffff81ef1850 t xgpu_ai_set_mailbox_rcv_irq +ffffffff81ef18e0 t xgpu_ai_mailbox_rcv_irq +ffffffff81ef19c0 t xgpu_ai_send_access_requests +ffffffff81ef1ab0 t xgpu_ai_poll_msg +ffffffff81ef2000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81ef2050 T xgpu_nv_mailbox_add_irq_id +ffffffff81ef20e0 T xgpu_nv_mailbox_get_irq +ffffffff81ef2190 t xgpu_nv_mailbox_flr_work +ffffffff81ef23b0 T xgpu_nv_mailbox_put_irq +ffffffff81ef23f0 t xgpu_nv_request_full_gpu_access +ffffffff81ef2410 t xgpu_nv_release_full_gpu_access +ffffffff81ef2430 t xgpu_nv_request_init_data +ffffffff81ef2450 t xgpu_nv_request_reset +ffffffff81ef2550 t xgpu_nv_mailbox_trans_msg +ffffffff81ef26f0 t xgpu_nv_ras_poison_handler +ffffffff81ef2710 t xgpu_nv_set_mailbox_ack_irq +ffffffff81ef2790 t xgpu_nv_mailbox_ack_irq +ffffffff81ef27e0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81ef2860 t xgpu_nv_mailbox_rcv_irq +ffffffff81ef2910 t xgpu_nv_send_access_requests +ffffffff81ef3000 T xgpu_vi_init_golden_registers +ffffffff81ef30c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81ef3110 T xgpu_vi_mailbox_add_irq_id +ffffffff81ef31a0 T xgpu_vi_mailbox_get_irq +ffffffff81ef3250 t xgpu_vi_mailbox_flr_work +ffffffff81ef33a0 T xgpu_vi_mailbox_put_irq +ffffffff81ef33e0 t xgpu_vi_request_full_gpu_access +ffffffff81ef3400 t xgpu_vi_release_full_gpu_access +ffffffff81ef3420 t xgpu_vi_request_reset +ffffffff81ef3440 t xgpu_vi_wait_reset_cmpl +ffffffff81ef3520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81ef35a0 t xgpu_vi_mailbox_ack_irq +ffffffff81ef35f0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81ef3670 t xgpu_vi_mailbox_rcv_irq +ffffffff81ef3720 t xgpu_vi_mailbox_rcv_msg +ffffffff81ef3840 t xgpu_vi_send_access_requests +ffffffff81ef4000 t navi10_ih_early_init +ffffffff81ef4060 t navi10_ih_sw_init +ffffffff81ef41d0 t navi10_ih_sw_fini +ffffffff81ef4210 t navi10_ih_hw_init +ffffffff81ef4630 t navi10_ih_hw_fini +ffffffff81ef4690 t navi10_ih_suspend +ffffffff81ef46f0 t navi10_ih_resume +ffffffff81ef4700 t navi10_ih_is_idle +ffffffff81ef4730 t navi10_ih_wait_for_idle +ffffffff81ef4760 t navi10_ih_soft_reset +ffffffff81ef4790 t navi10_ih_set_clockgating_state +ffffffff81ef48c0 t navi10_ih_set_powergating_state +ffffffff81ef48f0 t navi10_ih_get_clockgating_state +ffffffff81ef4980 t navi10_ih_get_wptr +ffffffff81ef4ab0 t navi10_ih_set_rptr +ffffffff81ef4b80 t navi10_ih_self_irq +ffffffff81ef4c00 t navi10_ih_toggle_interrupts +ffffffff81ef4d70 t force_update_wptr_for_self_int +ffffffff81ef6000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff81ef6040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff81ef6080 t nbio_v2_3_get_pcie_index_offset +ffffffff81ef60c0 t nbio_v2_3_get_pcie_data_offset +ffffffff81ef6100 t nbio_v2_3_get_rev_id +ffffffff81ef6160 t nbio_v2_3_mc_access_enable +ffffffff81ef6210 t nbio_v2_3_get_memsize +ffffffff81ef6280 t nbio_v2_3_sdma_doorbell_range +ffffffff81ef6320 t nbio_v2_3_vcn_doorbell_range +ffffffff81ef63a0 t nbio_v2_3_enable_doorbell_aperture +ffffffff81ef64a0 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff81ef6610 t nbio_v2_3_ih_doorbell_range +ffffffff81ef6730 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff81ef67d0 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff81ef6870 t nbio_v2_3_get_clockgating_state +ffffffff81ef68f0 t nbio_v2_3_ih_control +ffffffff81ef6a40 t nbio_v2_3_init_registers +ffffffff81ef6ad0 t nbio_v2_3_remap_hdp_registers +ffffffff81ef6be0 t nbio_v2_3_enable_aspm +ffffffff81ef6c80 t nbio_v2_3_program_aspm +ffffffff81ef7330 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff81ef73c0 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff81ef7430 t nbio_v2_3_clear_doorbell_interrupt +ffffffff81ef8000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff81ef8040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff81ef8080 t nbio_v4_3_get_pcie_index_offset +ffffffff81ef80b0 t nbio_v4_3_get_pcie_data_offset +ffffffff81ef80f0 t nbio_v4_3_get_rev_id +ffffffff81ef8180 t nbio_v4_3_mc_access_enable +ffffffff81ef8230 t nbio_v4_3_get_memsize +ffffffff81ef82a0 t nbio_v4_3_sdma_doorbell_range +ffffffff81ef8410 t nbio_v4_3_vcn_doorbell_range +ffffffff81ef85c0 t nbio_v4_3_gc_doorbell_init +ffffffff81ef86b0 t nbio_v4_3_enable_doorbell_aperture +ffffffff81ef87b0 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81ef8920 t nbio_v4_3_ih_doorbell_range +ffffffff81ef8a40 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81ef8b80 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81ef8cb0 t nbio_v4_3_get_clockgating_state +ffffffff81ef8dc0 t nbio_v4_3_ih_control +ffffffff81ef8f10 t nbio_v4_3_init_registers +ffffffff81ef9040 t nbio_v4_3_remap_hdp_registers +ffffffff81ef9150 t nbio_v4_3_program_aspm +ffffffff81ef9e50 t nbio_v4_3_get_rom_offset +ffffffff81ef9ee0 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81ef9f10 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81ef9f40 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81ef9f70 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81ef9fa0 t nbio_v4_3_handle_ras_err_event_athub_intr_no_bifring +ffffffff81efa0b0 t nbio_v4_3_init_ras_err_event_athub_interrupt +ffffffff81efa0f0 t nbio_v4_3_set_ras_err_event_athub_irq_state +ffffffff81efa200 t nbio_v4_3_process_err_event_athub_irq +ffffffff81efb000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81efb040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81efb080 t nbio_v6_1_get_pcie_index_offset +ffffffff81efb0c0 t nbio_v6_1_get_pcie_data_offset +ffffffff81efb100 t nbio_v6_1_get_rev_id +ffffffff81efb190 t nbio_v6_1_mc_access_enable +ffffffff81efb240 t nbio_v6_1_get_memsize +ffffffff81efb2b0 t nbio_v6_1_sdma_doorbell_range +ffffffff81efb340 t nbio_v6_1_enable_doorbell_aperture +ffffffff81efb440 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff81efb5b0 t nbio_v6_1_ih_doorbell_range +ffffffff81efb6d0 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff81efb770 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff81efb810 t nbio_v6_1_get_clockgating_state +ffffffff81efb890 t nbio_v6_1_ih_control +ffffffff81efb9e0 t nbio_v6_1_init_registers +ffffffff81efbab0 t nbio_v6_1_remap_hdp_registers +ffffffff81efbbc0 t nbio_v6_1_program_aspm +ffffffff81efc000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff81efc040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff81efc080 t nbio_v7_0_get_pcie_index_offset +ffffffff81efc0c0 t nbio_v7_0_get_pcie_data_offset +ffffffff81efc100 t nbio_v7_0_get_rev_id +ffffffff81efc190 t nbio_v7_0_mc_access_enable +ffffffff81efc240 t nbio_v7_0_get_memsize +ffffffff81efc2b0 t nbio_v7_0_sdma_doorbell_range +ffffffff81efc340 t nbio_v7_0_vcn_doorbell_range +ffffffff81efc3c0 t nbio_v7_0_enable_doorbell_aperture +ffffffff81efc4c0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff81efc4f0 t nbio_v7_0_ih_doorbell_range +ffffffff81efc610 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff81efc740 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff81efc7e0 t nbio_v7_0_get_clockgating_state +ffffffff81efc860 t nbio_v7_0_ih_control +ffffffff81efc9b0 t nbio_v7_0_init_registers +ffffffff81efca00 t nbio_v7_0_remap_hdp_registers +ffffffff81efcb10 t nbio_7_0_read_syshub_ind_mmr +ffffffff81efcbe0 t nbio_7_0_write_syshub_ind_mmr +ffffffff81efd000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff81efd040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff81efd080 t nbio_v7_2_get_pcie_index_offset +ffffffff81efd0c0 t nbio_v7_2_get_pcie_data_offset +ffffffff81efd100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff81efd130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff81efd170 t nbio_v7_2_get_rev_id +ffffffff81efd250 t nbio_v7_2_mc_access_enable +ffffffff81efd390 t nbio_v7_2_get_memsize +ffffffff81efd400 t nbio_v7_2_sdma_doorbell_range +ffffffff81efd4a0 t nbio_v7_2_vcn_doorbell_range +ffffffff81efd520 t nbio_v7_2_enable_doorbell_aperture +ffffffff81efd600 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff81efd770 t nbio_v7_2_ih_doorbell_range +ffffffff81efd800 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff81efd8c0 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff81efda50 t nbio_v7_2_get_clockgating_state +ffffffff81efdae0 t nbio_v7_2_ih_control +ffffffff81efdc30 t nbio_v7_2_init_registers +ffffffff81efddf0 t nbio_v7_2_remap_hdp_registers +ffffffff81efe000 t nbio_v7_4_query_ras_error_count +ffffffff81efe1a0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff81efe400 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff81efe5b0 t nbio_v7_4_init_ras_controller_interrupt +ffffffff81efe5f0 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff81efe630 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff81efe670 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff81efe6b0 t nbio_v7_4_get_pcie_index_offset +ffffffff81efe6f0 t nbio_v7_4_get_pcie_data_offset +ffffffff81efe730 t nbio_v7_4_get_rev_id +ffffffff81efe800 t nbio_v7_4_mc_access_enable +ffffffff81efe8b0 t nbio_v7_4_get_memsize +ffffffff81efe920 t nbio_v7_4_sdma_doorbell_range +ffffffff81efe9f0 t nbio_v7_4_vcn_doorbell_range +ffffffff81efea90 t nbio_v7_4_enable_doorbell_aperture +ffffffff81efeb90 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff81efed00 t nbio_v7_4_ih_doorbell_range +ffffffff81efee20 t nbio_v7_4_enable_doorbell_interrupt +ffffffff81efef70 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff81efefa0 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff81eff040 t nbio_v7_4_get_clockgating_state +ffffffff81eff0c0 t nbio_v7_4_ih_control +ffffffff81eff210 t nbio_v7_4_init_registers +ffffffff81eff300 t nbio_v7_4_remap_hdp_registers +ffffffff81eff410 t nbio_v7_4_program_aspm +ffffffff81eff820 t nbio_v7_4_set_ras_controller_irq_state +ffffffff81eff9b0 t nbio_v7_4_process_ras_controller_irq +ffffffff81eff9e0 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff81effb70 t nbio_v7_4_process_err_event_athub_irq +ffffffff81f00000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff81f00040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff81f00080 t nbio_v7_7_get_pcie_index_offset +ffffffff81f000c0 t nbio_v7_7_get_pcie_data_offset +ffffffff81f00100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff81f00130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81f00170 t nbio_v7_7_get_rev_id +ffffffff81f00200 t nbio_v7_7_mc_access_enable +ffffffff81f002b0 t nbio_v7_7_get_memsize +ffffffff81f00320 t nbio_v7_7_sdma_doorbell_range +ffffffff81f003b0 t nbio_v7_7_vcn_doorbell_range +ffffffff81f00430 t nbio_v7_7_enable_doorbell_aperture +ffffffff81f00510 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81f00680 t nbio_v7_7_ih_doorbell_range +ffffffff81f007a0 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81f008e0 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81f00af0 t nbio_v7_7_get_clockgating_state +ffffffff81f00c00 t nbio_v7_7_ih_control +ffffffff81f00d50 t nbio_v7_7_init_registers +ffffffff81f00e70 t nbio_v7_7_remap_hdp_registers +ffffffff81f01000 t nbio_v7_9_get_hdp_flush_req_offset +ffffffff81f01040 t nbio_v7_9_get_hdp_flush_done_offset +ffffffff81f01080 t nbio_v7_9_get_pcie_index_offset +ffffffff81f010c0 t nbio_v7_9_get_pcie_data_offset +ffffffff81f01100 t nbio_v7_9_get_pcie_index_hi_offset +ffffffff81f01140 t nbio_v7_9_get_rev_id +ffffffff81f011d0 t nbio_v7_9_mc_access_enable +ffffffff81f01280 t nbio_v7_9_get_memsize +ffffffff81f012f0 t nbio_v7_9_sdma_doorbell_range +ffffffff81f01630 t nbio_v7_9_vcn_doorbell_range +ffffffff81f017c0 t nbio_v7_9_enable_doorbell_aperture +ffffffff81f01930 t nbio_v7_9_enable_doorbell_selfring_aperture +ffffffff81f01aa0 t nbio_v7_9_ih_doorbell_range +ffffffff81f01ba0 t nbio_v7_9_enable_doorbell_interrupt +ffffffff81f01cb0 t nbio_v7_9_update_medium_grain_clock_gating +ffffffff81f01ce0 t nbio_v7_9_update_medium_grain_light_sleep +ffffffff81f01d10 t nbio_v7_9_get_clockgating_state +ffffffff81f01d40 t nbio_v7_9_ih_control +ffffffff81f01e90 t nbio_v7_9_init_registers +ffffffff81f021a0 t nbio_v7_9_remap_hdp_registers +ffffffff81f022b0 t nbio_v7_9_get_compute_partition_mode +ffffffff81f02340 t nbio_v7_9_get_memory_partition_mode +ffffffff81f02430 t nbio_v7_9_get_pcie_replay_count +ffffffff81f02490 t nbio_v7_9_get_pcie_usage +ffffffff81f025f0 t nbio_v7_9_query_ras_error_count +ffffffff81f02620 t nbio_v7_9_handle_ras_controller_intr_no_bifring +ffffffff81f02740 t nbio_v7_9_handle_ras_err_event_athub_intr_no_bifring +ffffffff81f02850 t nbio_v7_9_init_ras_controller_interrupt +ffffffff81f02890 t nbio_v7_9_init_ras_err_event_athub_interrupt +ffffffff81f028d0 t nbio_v7_9_set_ras_controller_irq_state +ffffffff81f02900 t nbio_v7_9_process_ras_controller_irq +ffffffff81f02930 t nbio_v7_9_set_ras_err_event_athub_irq_state +ffffffff81f02960 t nbio_v7_9_process_err_event_athub_irq +ffffffff81f03000 T nv_grbm_select +ffffffff81f030a0 T nv_set_virt_ops +ffffffff81f030e0 t nv_common_early_init +ffffffff81f034d0 t nv_common_late_init +ffffffff81f03580 t nv_common_sw_init +ffffffff81f035c0 t nv_common_sw_fini +ffffffff81f035f0 t nv_common_hw_init +ffffffff81f036f0 t nv_common_hw_fini +ffffffff81f03750 t nv_common_suspend +ffffffff81f037b0 t nv_common_resume +ffffffff81f037f0 t nv_common_is_idle +ffffffff81f03820 t nv_common_wait_for_idle +ffffffff81f03850 t nv_common_soft_reset +ffffffff81f03880 t nv_common_set_clockgating_state +ffffffff81f03950 t nv_common_set_powergating_state +ffffffff81f03980 t nv_common_get_clockgating_state +ffffffff81f039f0 t nv_didt_rreg +ffffffff81f03a90 t nv_didt_wreg +ffffffff81f03b10 t nv_read_disabled_bios +ffffffff81f03b40 t nv_read_register +ffffffff81f03c30 t nv_asic_reset +ffffffff81f03d70 t nv_asic_reset_method +ffffffff81f03e60 t nv_get_xclk +ffffffff81f03e90 t nv_set_uvd_clocks +ffffffff81f03ec0 t nv_set_vce_clocks +ffffffff81f03ef0 t nv_get_config_memsize +ffffffff81f03f10 t nv_need_full_reset +ffffffff81f03f40 t nv_init_doorbell_index +ffffffff81f04070 t nv_need_reset_on_init +ffffffff81f04110 t nv_pre_asic_init +ffffffff81f04140 t nv_update_umd_stable_pstate +ffffffff81f04200 t nv_query_video_codecs +ffffffff81f05000 T psp_v10_0_set_psp_funcs +ffffffff81f05030 t psp_v10_0_init_microcode +ffffffff81f050f0 t psp_v10_0_ring_create +ffffffff81f05400 t psp_v10_0_ring_stop +ffffffff81f055f0 t psp_v10_0_ring_destroy +ffffffff81f05670 t psp_v10_0_mode1_reset +ffffffff81f056c0 t psp_v10_0_ring_get_wptr +ffffffff81f05720 t psp_v10_0_ring_set_wptr +ffffffff81f06000 T psp_v11_0_set_psp_funcs +ffffffff81f06030 t psp_v11_0_init_microcode +ffffffff81f06180 t psp_v11_0_bootloader_load_kdb +ffffffff81f061a0 t psp_v11_0_bootloader_load_spl +ffffffff81f061c0 t psp_v11_0_bootloader_load_sysdrv +ffffffff81f061e0 t psp_v11_0_bootloader_load_sos +ffffffff81f06540 t psp_v11_0_ring_create +ffffffff81f06be0 t psp_v11_0_ring_stop +ffffffff81f06e00 t psp_v11_0_ring_destroy +ffffffff81f06e80 t psp_v11_0_mode1_reset +ffffffff81f06f80 t psp_v11_0_memory_training +ffffffff81f07400 t psp_v11_0_ring_get_wptr +ffffffff81f07450 t psp_v11_0_ring_set_wptr +ffffffff81f07590 t psp_v11_0_load_usbc_pd_fw +ffffffff81f07780 t psp_v11_0_read_usbc_pd_fw +ffffffff81f078a0 t psp_v11_0_bootloader_load_component +ffffffff81f07a60 t psp_v11_0_wait_for_bootloader +ffffffff81f07c30 t psp_v11_0_memory_training_send_msg +ffffffff81f08000 T psp_v11_0_8_set_psp_funcs +ffffffff81f08030 t psp_v11_0_8_ring_create +ffffffff81f086d0 t psp_v11_0_8_ring_stop +ffffffff81f08a60 t psp_v11_0_8_ring_destroy +ffffffff81f08ae0 t psp_v11_0_8_ring_get_wptr +ffffffff81f08b50 t psp_v11_0_8_ring_set_wptr +ffffffff81f09000 T psp_v12_0_set_psp_funcs +ffffffff81f09030 t psp_v12_0_init_microcode +ffffffff81f090e0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81f09410 t psp_v12_0_bootloader_load_sos +ffffffff81f09790 t psp_v12_0_ring_create +ffffffff81f0a190 t psp_v12_0_ring_stop +ffffffff81f0a3b0 t psp_v12_0_ring_destroy +ffffffff81f0a430 t psp_v12_0_mode1_reset +ffffffff81f0a530 t psp_v12_0_ring_get_wptr +ffffffff81f0a5a0 t psp_v12_0_ring_set_wptr +ffffffff81f0b000 T psp_v13_0_set_psp_funcs +ffffffff81f0b030 t psp_v13_0_init_microcode +ffffffff81f0b130 t psp_v13_0_wait_for_bootloader_steady_state +ffffffff81f0b240 t psp_v13_0_bootloader_load_kdb +ffffffff81f0b260 t psp_v13_0_bootloader_load_spl +ffffffff81f0b280 t psp_v13_0_bootloader_load_sysdrv +ffffffff81f0b2a0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81f0b2c0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81f0b2e0 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81f0b300 t psp_v13_0_bootloader_load_ras_drv +ffffffff81f0b320 t psp_v13_0_bootloader_load_sos +ffffffff81f0b6f0 t psp_v13_0_ring_create +ffffffff81f0bd90 t psp_v13_0_ring_stop +ffffffff81f0c120 t psp_v13_0_ring_destroy +ffffffff81f0c1a0 t psp_v13_0_memory_training +ffffffff81f0c5d0 t psp_v13_0_ring_get_wptr +ffffffff81f0c640 t psp_v13_0_ring_set_wptr +ffffffff81f0c740 t psp_v13_0_load_usbc_pd_fw +ffffffff81f0c930 t psp_v13_0_read_usbc_pd_fw +ffffffff81f0ca50 t psp_v13_0_update_spirom +ffffffff81f0cc30 t psp_v13_0_vbflash_status +ffffffff81f0cc90 t psp_v13_0_fatal_error_recovery_quirk +ffffffff81f0cdc0 t psp_v13_0_bootloader_load_component +ffffffff81f0d030 t psp_v13_0_memory_training_send_msg +ffffffff81f0d1a0 t psp_v13_0_exec_spi_cmd +ffffffff81f0e000 T psp_v13_0_4_set_psp_funcs +ffffffff81f0e030 t psp_v13_0_4_init_microcode +ffffffff81f0e0d0 t psp_v13_0_4_bootloader_load_kdb +ffffffff81f0e0f0 t psp_v13_0_4_bootloader_load_spl +ffffffff81f0e110 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81f0e130 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81f0e150 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81f0e170 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81f0e190 t psp_v13_0_4_bootloader_load_sos +ffffffff81f0e500 t psp_v13_0_4_ring_create +ffffffff81f0ebb0 t psp_v13_0_4_ring_stop +ffffffff81f0ef40 t psp_v13_0_4_ring_destroy +ffffffff81f0efc0 t psp_v13_0_4_ring_get_wptr +ffffffff81f0f030 t psp_v13_0_4_ring_set_wptr +ffffffff81f0f130 t psp_v13_0_4_bootloader_load_component +ffffffff81f0f300 t psp_v13_0_4_wait_for_bootloader +ffffffff81f10000 T psp_v3_1_set_psp_funcs +ffffffff81f10030 t psp_v3_1_init_microcode +ffffffff81f100c0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81f103f0 t psp_v3_1_bootloader_load_sos +ffffffff81f10770 t psp_v3_1_ring_create +ffffffff81f11290 t psp_v3_1_ring_stop +ffffffff81f114b0 t psp_v3_1_ring_destroy +ffffffff81f11530 t psp_v3_1_smu_reload_quirk +ffffffff81f11580 t psp_v3_1_mode1_reset +ffffffff81f11680 t psp_v3_1_ring_get_wptr +ffffffff81f116d0 t psp_v3_1_ring_set_wptr +ffffffff81f12000 t sdma_v2_4_early_init +ffffffff81f120f0 t sdma_v2_4_sw_init +ffffffff81f124a0 t sdma_v2_4_sw_fini +ffffffff81f12550 t sdma_v2_4_hw_init +ffffffff81f128f0 t sdma_v2_4_hw_fini +ffffffff81f12930 t sdma_v2_4_suspend +ffffffff81f12970 t sdma_v2_4_resume +ffffffff81f12980 t sdma_v2_4_is_idle +ffffffff81f129c0 t sdma_v2_4_wait_for_idle +ffffffff81f12a60 t sdma_v2_4_soft_reset +ffffffff81f12ba0 t sdma_v2_4_set_clockgating_state +ffffffff81f12bd0 t sdma_v2_4_set_powergating_state +ffffffff81f12c00 t sdma_v2_4_ring_get_rptr +ffffffff81f12c40 t sdma_v2_4_ring_get_wptr +ffffffff81f12ca0 t sdma_v2_4_ring_set_wptr +ffffffff81f12ce0 t sdma_v2_4_ring_emit_ib +ffffffff81f12f90 t sdma_v2_4_ring_emit_fence +ffffffff81f13390 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81f13610 t sdma_v2_4_ring_emit_vm_flush +ffffffff81f13880 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81f13b00 t sdma_v2_4_ring_test_ring +ffffffff81f13de0 t sdma_v2_4_ring_test_ib +ffffffff81f13fb0 t sdma_v2_4_ring_insert_nop +ffffffff81f140e0 t sdma_v2_4_ring_pad_ib +ffffffff81f14210 t sdma_v2_4_ring_emit_wreg +ffffffff81f14360 t sdma_v2_4_emit_copy_buffer +ffffffff81f14420 t sdma_v2_4_emit_fill_buffer +ffffffff81f144b0 t sdma_v2_4_vm_copy_pte +ffffffff81f14570 t sdma_v2_4_vm_write_pte +ffffffff81f14640 t sdma_v2_4_vm_set_pte_pde +ffffffff81f14740 t sdma_v2_4_set_trap_irq_state +ffffffff81f14800 t sdma_v2_4_process_trap_irq +ffffffff81f148a0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81f14920 t sdma_v2_4_enable +ffffffff81f15000 t sdma_v3_0_early_init +ffffffff81f15100 t sdma_v3_0_sw_init +ffffffff81f154c0 t sdma_v3_0_sw_fini +ffffffff81f15570 t sdma_v3_0_hw_init +ffffffff81f156a0 t sdma_v3_0_hw_fini +ffffffff81f156f0 t sdma_v3_0_suspend +ffffffff81f15740 t sdma_v3_0_resume +ffffffff81f15750 t sdma_v3_0_is_idle +ffffffff81f15790 t sdma_v3_0_wait_for_idle +ffffffff81f15830 t sdma_v3_0_check_soft_reset +ffffffff81f15890 t sdma_v3_0_pre_soft_reset +ffffffff81f158e0 t sdma_v3_0_soft_reset +ffffffff81f159b0 t sdma_v3_0_post_soft_reset +ffffffff81f15a00 t sdma_v3_0_set_clockgating_state +ffffffff81f15c60 t sdma_v3_0_set_powergating_state +ffffffff81f15c90 t sdma_v3_0_get_clockgating_state +ffffffff81f15d10 t sdma_v3_0_ring_get_rptr +ffffffff81f15d50 t sdma_v3_0_ring_get_wptr +ffffffff81f15dd0 t sdma_v3_0_ring_set_wptr +ffffffff81f15e80 t sdma_v3_0_ring_emit_ib +ffffffff81f16130 t sdma_v3_0_ring_emit_fence +ffffffff81f16530 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81f167b0 t sdma_v3_0_ring_emit_vm_flush +ffffffff81f16a20 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81f16ca0 t sdma_v3_0_ring_test_ring +ffffffff81f16f80 t sdma_v3_0_ring_test_ib +ffffffff81f17150 t sdma_v3_0_ring_insert_nop +ffffffff81f17280 t sdma_v3_0_ring_pad_ib +ffffffff81f173b0 t sdma_v3_0_ring_emit_wreg +ffffffff81f17500 t sdma_v3_0_emit_copy_buffer +ffffffff81f175c0 t sdma_v3_0_emit_fill_buffer +ffffffff81f17650 t sdma_v3_0_vm_copy_pte +ffffffff81f17710 t sdma_v3_0_vm_write_pte +ffffffff81f177e0 t sdma_v3_0_vm_set_pte_pde +ffffffff81f178e0 t sdma_v3_0_set_trap_irq_state +ffffffff81f179a0 t sdma_v3_0_process_trap_irq +ffffffff81f17a40 t sdma_v3_0_process_illegal_inst_irq +ffffffff81f17ac0 t sdma_v3_0_ctx_switch_enable +ffffffff81f17c60 t sdma_v3_0_enable +ffffffff81f17dd0 t sdma_v3_0_gfx_resume +ffffffff81f19000 t sdma_v4_0_early_init +ffffffff81f192d0 t sdma_v4_0_late_init +ffffffff81f19570 t sdma_v4_0_sw_init +ffffffff81f199b0 t sdma_v4_0_sw_fini +ffffffff81f19a70 t sdma_v4_0_hw_init +ffffffff81f1c9d0 t sdma_v4_0_hw_fini +ffffffff81f1ca90 t sdma_v4_0_suspend +ffffffff81f1cae0 t sdma_v4_0_resume +ffffffff81f1cb60 t sdma_v4_0_is_idle +ffffffff81f1cc90 t sdma_v4_0_wait_for_idle +ffffffff81f1ce30 t sdma_v4_0_soft_reset +ffffffff81f1ce60 t sdma_v4_0_set_clockgating_state +ffffffff81f1d360 t sdma_v4_0_set_powergating_state +ffffffff81f1d420 t sdma_v4_0_get_clockgating_state +ffffffff81f1d4c0 t sdma_v4_0_query_ras_error_count +ffffffff81f1d690 t sdma_v4_0_reset_ras_error_count +ffffffff81f1d7e0 t sdma_v4_0_ring_get_rptr +ffffffff81f1d840 t sdma_v4_0_ring_get_wptr +ffffffff81f1da30 t sdma_v4_0_ring_set_wptr +ffffffff81f1dcb0 t sdma_v4_0_ring_emit_ib +ffffffff81f1df60 t sdma_v4_0_ring_emit_fence +ffffffff81f1e380 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81f1e3e0 t sdma_v4_0_ring_emit_vm_flush +ffffffff81f1e400 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81f1e4b0 t sdma_v4_0_ring_test_ring +ffffffff81f1e790 t sdma_v4_0_ring_test_ib +ffffffff81f1e960 t sdma_v4_0_ring_insert_nop +ffffffff81f1ea90 t sdma_v4_0_ring_pad_ib +ffffffff81f1ebc0 t sdma_v4_0_ring_emit_wreg +ffffffff81f1ed10 t sdma_v4_0_ring_emit_reg_wait +ffffffff81f1ed60 t sdma_v4_0_wait_reg_mem +ffffffff81f1f070 t sdma_v4_0_page_ring_get_wptr +ffffffff81f1f220 t sdma_v4_0_page_ring_set_wptr +ffffffff81f1f3e0 t sdma_v4_0_emit_copy_buffer +ffffffff81f1f4a0 t sdma_v4_0_emit_fill_buffer +ffffffff81f1f530 t sdma_v4_0_vm_copy_pte +ffffffff81f1f5f0 t sdma_v4_0_vm_write_pte +ffffffff81f1f6c0 t sdma_v4_0_vm_set_pte_pde +ffffffff81f1f7c0 t sdma_v4_0_set_trap_irq_state +ffffffff81f1f960 t sdma_v4_0_process_trap_irq +ffffffff81f1fa90 t sdma_v4_0_process_illegal_inst_irq +ffffffff81f1fbb0 t sdma_v4_0_set_ecc_irq_state +ffffffff81f1fd50 t sdma_v4_0_process_vm_hole_irq +ffffffff81f1fd90 t sdma_v4_0_print_iv_entry +ffffffff81f1fed0 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81f1ff10 t sdma_v4_0_process_pool_timeout_irq +ffffffff81f1ff50 t sdma_v4_0_process_srbm_write_irq +ffffffff81f1ff90 t sdma_v4_0_process_ras_data_cb +ffffffff81f20010 t sdma_v4_0_ctx_switch_enable +ffffffff81f206e0 t sdma_v4_0_enable +ffffffff81f20ca0 t sdma_v4_0_gfx_enable +ffffffff81f22000 t sdma_v4_4_query_ras_error_count +ffffffff81f22290 t sdma_v4_4_reset_ras_error_count +ffffffff81f23000 t sdma_v4_4_2_early_init +ffffffff81f23280 t sdma_v4_4_2_late_init +ffffffff81f232f0 t sdma_v4_4_2_sw_init +ffffffff81f23810 t sdma_v4_4_2_sw_fini +ffffffff81f238c0 t sdma_v4_4_2_hw_init +ffffffff81f23910 t sdma_v4_4_2_hw_fini +ffffffff81f239d0 t sdma_v4_4_2_suspend +ffffffff81f23ab0 t sdma_v4_4_2_resume +ffffffff81f23b00 t sdma_v4_4_2_is_idle +ffffffff81f23ba0 t sdma_v4_4_2_wait_for_idle +ffffffff81f23cc0 t sdma_v4_4_2_soft_reset +ffffffff81f23cf0 t sdma_v4_4_2_set_clockgating_state +ffffffff81f240f0 t sdma_v4_4_2_set_powergating_state +ffffffff81f24120 t sdma_v4_4_2_get_clockgating_state +ffffffff81f24200 t sdma_v4_4_2_xcp_suspend +ffffffff81f242c0 t sdma_v4_4_2_xcp_resume +ffffffff81f24300 t sdma_v4_4_2_ring_get_rptr +ffffffff81f24370 t sdma_v4_4_2_ring_get_wptr +ffffffff81f244b0 t sdma_v4_4_2_ring_set_wptr +ffffffff81f24670 t sdma_v4_4_2_ring_emit_ib +ffffffff81f24920 t sdma_v4_4_2_ring_emit_fence +ffffffff81f24d40 t sdma_v4_4_2_ring_emit_pipeline_sync +ffffffff81f24da0 t sdma_v4_4_2_ring_emit_vm_flush +ffffffff81f24dc0 t sdma_v4_4_2_ring_emit_hdp_flush +ffffffff81f24e70 t sdma_v4_4_2_ring_test_ring +ffffffff81f25150 t sdma_v4_4_2_ring_test_ib +ffffffff81f25320 t sdma_v4_4_2_ring_insert_nop +ffffffff81f25450 t sdma_v4_4_2_ring_pad_ib +ffffffff81f25580 t sdma_v4_4_2_ring_emit_wreg +ffffffff81f256d0 t sdma_v4_4_2_ring_emit_reg_wait +ffffffff81f25720 t sdma_v4_4_2_wait_reg_mem +ffffffff81f25a30 t sdma_v4_4_2_page_ring_get_wptr +ffffffff81f25b30 t sdma_v4_4_2_page_ring_set_wptr +ffffffff81f25c40 t sdma_v4_4_2_emit_copy_buffer +ffffffff81f25d00 t sdma_v4_4_2_emit_fill_buffer +ffffffff81f25d90 t sdma_v4_4_2_vm_copy_pte +ffffffff81f25e50 t sdma_v4_4_2_vm_write_pte +ffffffff81f25f20 t sdma_v4_4_2_vm_set_pte_pde +ffffffff81f26020 t sdma_v4_4_2_set_trap_irq_state +ffffffff81f26100 t sdma_v4_4_2_process_trap_irq +ffffffff81f26220 t sdma_v4_4_2_process_illegal_inst_irq +ffffffff81f262b0 t sdma_v4_4_2_set_ecc_irq_state +ffffffff81f26390 t sdma_v4_4_2_process_vm_hole_irq +ffffffff81f26470 t sdma_v4_4_2_process_doorbell_invalid_irq +ffffffff81f26550 t sdma_v4_4_2_process_pool_timeout_irq +ffffffff81f26630 t sdma_v4_4_2_process_srbm_write_irq +ffffffff81f26710 t sdma_v4_4_2_query_ras_error_count +ffffffff81f26870 t sdma_v4_4_2_reset_ras_error_count +ffffffff81f269a0 t sdma_v4_4_2_inst_init_golden_registers +ffffffff81f26b20 t sdma_v4_4_2_inst_start +ffffffff81f27ec0 t sdma_v4_4_2_inst_ctx_switch_enable +ffffffff81f28190 t sdma_v4_4_2_inst_enable +ffffffff81f29000 t sdma_v5_0_early_init +ffffffff81f29130 t sdma_v5_0_sw_init +ffffffff81f29310 t sdma_v5_0_sw_fini +ffffffff81f293a0 t sdma_v5_0_hw_init +ffffffff81f2a600 t sdma_v5_0_hw_fini +ffffffff81f2a660 t sdma_v5_0_suspend +ffffffff81f2a6c0 t sdma_v5_0_resume +ffffffff81f2a6d0 t sdma_v5_0_is_idle +ffffffff81f2a760 t sdma_v5_0_wait_for_idle +ffffffff81f2a820 t sdma_v5_0_soft_reset +ffffffff81f2a850 t sdma_v5_0_set_clockgating_state +ffffffff81f2aa50 t sdma_v5_0_set_powergating_state +ffffffff81f2aa80 t sdma_v5_0_get_clockgating_state +ffffffff81f2ab20 t sdma_v5_0_ring_get_rptr +ffffffff81f2ab80 t sdma_v5_0_ring_get_wptr +ffffffff81f2ad20 t sdma_v5_0_ring_set_wptr +ffffffff81f2b070 t sdma_v5_0_ring_emit_ib +ffffffff81f2b330 t sdma_v5_0_ring_emit_fence +ffffffff81f2b790 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81f2ba10 t sdma_v5_0_ring_emit_vm_flush +ffffffff81f2ba30 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81f2bcd0 t sdma_v5_0_ring_test_ring +ffffffff81f2c0a0 t sdma_v5_0_ring_test_ib +ffffffff81f2c3d0 t sdma_v5_0_ring_insert_nop +ffffffff81f2c500 t sdma_v5_0_ring_pad_ib +ffffffff81f2c630 t sdma_v5_0_ring_init_cond_exec +ffffffff81f2c860 t sdma_v5_0_ring_patch_cond_exec +ffffffff81f2c920 t sdma_v5_0_ring_emit_wreg +ffffffff81f2ca70 t sdma_v5_0_ring_emit_reg_wait +ffffffff81f2ccf0 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81f2cd70 t sdma_v5_0_ring_preempt_ib +ffffffff81f2ceb0 t sdma_v5_0_ring_emit_mem_sync +ffffffff81f2d0c0 t sdma_v5_0_emit_copy_buffer +ffffffff81f2d180 t sdma_v5_0_emit_fill_buffer +ffffffff81f2d210 t sdma_v5_0_vm_copy_pte +ffffffff81f2d2d0 t sdma_v5_0_vm_write_pte +ffffffff81f2d3a0 t sdma_v5_0_vm_set_pte_pde +ffffffff81f2d4a0 t sdma_v5_0_set_trap_irq_state +ffffffff81f2d530 t sdma_v5_0_process_trap_irq +ffffffff81f2d640 t sdma_v5_0_process_illegal_inst_irq +ffffffff81f2d670 t sdma_v5_0_mqd_init +ffffffff81f2d750 t sdma_v5_0_ctx_switch_enable +ffffffff81f2da90 t sdma_v5_0_enable +ffffffff81f2e000 t sdma_v5_2_early_init +ffffffff81f2e130 t sdma_v5_2_sw_init +ffffffff81f2e390 t sdma_v5_2_sw_fini +ffffffff81f2e420 t sdma_v5_2_hw_init +ffffffff81f2ffc0 t sdma_v5_2_hw_fini +ffffffff81f30020 t sdma_v5_2_suspend +ffffffff81f30080 t sdma_v5_2_resume +ffffffff81f30090 t sdma_v5_2_is_idle +ffffffff81f30140 t sdma_v5_2_wait_for_idle +ffffffff81f30240 t sdma_v5_2_soft_reset +ffffffff81f30500 t sdma_v5_2_set_clockgating_state +ffffffff81f30860 t sdma_v5_2_set_powergating_state +ffffffff81f30890 t sdma_v5_2_get_clockgating_state +ffffffff81f30920 t sdma_v5_2_ring_get_rptr +ffffffff81f30980 t sdma_v5_2_ring_get_wptr +ffffffff81f30ac0 t sdma_v5_2_ring_set_wptr +ffffffff81f30c70 t sdma_v5_2_ring_emit_ib +ffffffff81f30f30 t sdma_v5_2_ring_emit_fence +ffffffff81f31390 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81f31610 t sdma_v5_2_ring_emit_vm_flush +ffffffff81f31630 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81f31900 t sdma_v5_2_ring_test_ring +ffffffff81f31cd0 t sdma_v5_2_ring_test_ib +ffffffff81f32000 t sdma_v5_2_ring_insert_nop +ffffffff81f32130 t sdma_v5_2_ring_pad_ib +ffffffff81f32260 t sdma_v5_2_ring_init_cond_exec +ffffffff81f32490 t sdma_v5_2_ring_patch_cond_exec +ffffffff81f32550 t sdma_v5_2_ring_begin_use +ffffffff81f32570 t sdma_v5_2_ring_end_use +ffffffff81f32590 t sdma_v5_2_ring_emit_wreg +ffffffff81f326e0 t sdma_v5_2_ring_emit_reg_wait +ffffffff81f32960 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81f329e0 t sdma_v5_2_ring_preempt_ib +ffffffff81f32b50 t sdma_v5_2_ring_emit_mem_sync +ffffffff81f32d60 t sdma_v5_2_emit_copy_buffer +ffffffff81f32e20 t sdma_v5_2_emit_fill_buffer +ffffffff81f32eb0 t sdma_v5_2_vm_copy_pte +ffffffff81f32f70 t sdma_v5_2_vm_write_pte +ffffffff81f33040 t sdma_v5_2_vm_set_pte_pde +ffffffff81f33140 t sdma_v5_2_set_trap_irq_state +ffffffff81f33200 t sdma_v5_2_process_trap_irq +ffffffff81f33340 t sdma_v5_2_process_illegal_inst_irq +ffffffff81f33370 t sdma_v5_2_mqd_init +ffffffff81f33450 t sdma_v5_2_ctx_switch_enable +ffffffff81f33860 t sdma_v5_2_enable +ffffffff81f34000 t sdma_v6_0_early_init +ffffffff81f34120 t sdma_v6_0_sw_init +ffffffff81f342f0 t sdma_v6_0_sw_fini +ffffffff81f34380 t sdma_v6_0_hw_init +ffffffff81f34390 t sdma_v6_0_hw_fini +ffffffff81f34460 t sdma_v6_0_suspend +ffffffff81f344a0 t sdma_v6_0_resume +ffffffff81f344b0 t sdma_v6_0_is_idle +ffffffff81f34540 t sdma_v6_0_wait_for_idle +ffffffff81f34600 t sdma_v6_0_check_soft_reset +ffffffff81f346c0 t sdma_v6_0_soft_reset +ffffffff81f34b80 t sdma_v6_0_set_clockgating_state +ffffffff81f34bb0 t sdma_v6_0_set_powergating_state +ffffffff81f34be0 t sdma_v6_0_get_clockgating_state +ffffffff81f34c10 t sdma_v6_0_ring_get_rptr +ffffffff81f34c70 t sdma_v6_0_ring_get_wptr +ffffffff81f34ce0 t sdma_v6_0_ring_set_wptr +ffffffff81f35030 t sdma_v6_0_ring_emit_ib +ffffffff81f352f0 t sdma_v6_0_ring_emit_fence +ffffffff81f35750 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81f359d0 t sdma_v6_0_ring_emit_vm_flush +ffffffff81f35c40 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81f35ee0 t sdma_v6_0_ring_test_ring +ffffffff81f362b0 t sdma_v6_0_ring_test_ib +ffffffff81f365e0 t sdma_v6_0_ring_insert_nop +ffffffff81f36710 t sdma_v6_0_ring_pad_ib +ffffffff81f36840 t sdma_v6_0_ring_init_cond_exec +ffffffff81f36a70 t sdma_v6_0_ring_patch_cond_exec +ffffffff81f36b30 t sdma_v6_0_ring_emit_wreg +ffffffff81f36c80 t sdma_v6_0_ring_emit_reg_wait +ffffffff81f36f00 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81f36f80 t sdma_v6_0_ring_preempt_ib +ffffffff81f370d0 t sdma_v6_0_ring_emit_mem_sync +ffffffff81f372e0 t sdma_v6_0_emit_copy_buffer +ffffffff81f373a0 t sdma_v6_0_emit_fill_buffer +ffffffff81f37430 t sdma_v6_0_vm_copy_pte +ffffffff81f374f0 t sdma_v6_0_vm_write_pte +ffffffff81f375c0 t sdma_v6_0_vm_set_pte_pde +ffffffff81f376c0 t sdma_v6_0_set_trap_irq_state +ffffffff81f37750 t sdma_v6_0_process_trap_irq +ffffffff81f37880 t sdma_v6_0_process_illegal_inst_irq +ffffffff81f378b0 t sdma_v6_0_mqd_init +ffffffff81f379d0 t sdma_v6_0_start +ffffffff81f37cb0 t sdma_v6_0_enable +ffffffff81f37e40 t sdma_v6_0_gfx_resume +ffffffff81f38ed0 t sdma_v6_0_gfx_stop +ffffffff81f3a000 T sienna_cichlid_reset_init +ffffffff81f3a0c0 t sienna_cichlid_async_reset +ffffffff81f3a120 t sienna_cichlid_get_reset_handler +ffffffff81f3a1b0 T sienna_cichlid_reset_fini +ffffffff81f3a210 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81f3a360 t sienna_cichlid_mode2_perform_reset +ffffffff81f3a3e0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81f3a6e0 t sienna_cichlid_mode2_reset +ffffffff81f3b000 T smu_v11_0_i2c_control_init +ffffffff81f3b0d0 T smu_v11_0_i2c_control_fini +ffffffff81f3b110 t smu_v11_0_i2c_xfer +ffffffff81f3c2c0 t smu_v11_0_i2c_func +ffffffff81f3c2f0 t smu_v11_0_i2c_enable +ffffffff81f3c440 t smu_v11_0_i2c_abort +ffffffff81f3c550 t lock_bus +ffffffff81f3c5f0 t trylock_bus +ffffffff81f3c640 t unlock_bus +ffffffff81f3d000 T smu_v13_0_10_reset_init +ffffffff81f3d0c0 t smu_v13_0_10_async_reset +ffffffff81f3d120 t smu_v13_0_10_get_reset_handler +ffffffff81f3d1d0 T smu_v13_0_10_reset_fini +ffffffff81f3d230 t smu_v13_0_10_mode2_prepare_hwcontext +ffffffff81f3d360 t smu_v13_0_10_mode2_perform_reset +ffffffff81f3d3e0 t smu_v13_0_10_mode2_restore_hwcontext +ffffffff81f3d750 t smu_v13_0_10_mode2_reset +ffffffff81f3e000 t smuio_v11_0_get_rom_index_offset +ffffffff81f3e040 t smuio_v11_0_get_rom_data_offset +ffffffff81f3e080 t smuio_v11_0_update_rom_clock_gating +ffffffff81f3e1d0 t smuio_v11_0_get_clock_gating_state +ffffffff81f3f000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81f3f040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81f3f080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81f3f1d0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81f40000 t smuio_v13_0_get_rom_index_offset +ffffffff81f40040 t smuio_v13_0_get_rom_data_offset +ffffffff81f40080 t smuio_v13_0_update_rom_clock_gating +ffffffff81f401d0 t smuio_v13_0_get_clock_gating_state +ffffffff81f40270 t smuio_v13_0_get_die_id +ffffffff81f402f0 t smuio_v13_0_get_socket_id +ffffffff81f40380 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81f41000 t smuio_v13_0_3_get_die_id +ffffffff81f41080 t smuio_v13_0_3_get_socket_id +ffffffff81f41110 t smuio_v13_0_3_get_pkg_type +ffffffff81f42000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81f42040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81f43000 t smuio_v9_0_get_rom_index_offset +ffffffff81f43040 t smuio_v9_0_get_rom_data_offset +ffffffff81f43080 t smuio_v9_0_update_rom_clock_gating +ffffffff81f431c0 t smuio_v9_0_get_clock_gating_state +ffffffff81f44000 T soc15_grbm_select +ffffffff81f44090 T soc15_program_register_sequence +ffffffff81f44290 T soc15_set_virt_ops +ffffffff81f44300 t soc15_common_early_init +ffffffff81f44720 t soc15_common_late_init +ffffffff81f44780 t soc15_common_sw_init +ffffffff81f447e0 t soc15_common_sw_fini +ffffffff81f44830 t soc15_common_hw_init +ffffffff81f44950 t soc15_common_hw_fini +ffffffff81f44a20 t soc15_common_suspend +ffffffff81f44a60 t soc15_common_resume +ffffffff81f44b30 t soc15_common_is_idle +ffffffff81f44b60 t soc15_common_wait_for_idle +ffffffff81f44b90 t soc15_common_soft_reset +ffffffff81f44bc0 t soc15_common_set_clockgating_state +ffffffff81f44f00 t soc15_common_set_powergating_state +ffffffff81f44f30 t soc15_common_get_clockgating_state +ffffffff81f45060 t soc15_uvd_ctx_rreg +ffffffff81f45100 t soc15_uvd_ctx_wreg +ffffffff81f45190 t soc15_didt_rreg +ffffffff81f45230 t soc15_didt_wreg +ffffffff81f452b0 t soc15_gc_cac_rreg +ffffffff81f453d0 t soc15_gc_cac_wreg +ffffffff81f454e0 t soc15_se_cac_rreg +ffffffff81f45600 t soc15_se_cac_wreg +ffffffff81f45710 t soc15_read_disabled_bios +ffffffff81f45740 t soc15_read_register +ffffffff81f45840 t soc15_asic_reset +ffffffff81f459f0 t soc15_asic_reset_method +ffffffff81f45ba0 t soc15_get_xclk +ffffffff81f45c00 t soc15_set_uvd_clocks +ffffffff81f45c30 t soc15_set_vce_clocks +ffffffff81f45c60 t soc15_get_config_memsize +ffffffff81f45c80 t soc15_need_full_reset +ffffffff81f45cb0 t soc15_get_pcie_usage +ffffffff81f45de0 t soc15_need_reset_on_init +ffffffff81f45e90 t soc15_get_pcie_replay_count +ffffffff81f45f00 t soc15_supports_baco +ffffffff81f45f60 t soc15_pre_asic_init +ffffffff81f45f70 t soc15_query_video_codecs +ffffffff81f46060 t vega20_get_pcie_usage +ffffffff81f47000 T soc21_grbm_select +ffffffff81f47090 t soc21_common_early_init +ffffffff81f47200 t soc21_common_late_init +ffffffff81f472e0 t soc21_common_sw_init +ffffffff81f47320 t soc21_common_sw_fini +ffffffff81f47350 t soc21_common_hw_init +ffffffff81f47410 t soc21_common_hw_fini +ffffffff81f474b0 t soc21_common_suspend +ffffffff81f47550 t soc21_common_resume +ffffffff81f47720 t soc21_common_is_idle +ffffffff81f47750 t soc21_common_wait_for_idle +ffffffff81f47780 t soc21_common_soft_reset +ffffffff81f477b0 t soc21_common_set_clockgating_state +ffffffff81f47860 t soc21_common_set_powergating_state +ffffffff81f478c0 t soc21_common_get_clockgating_state +ffffffff81f47910 t soc21_didt_rreg +ffffffff81f479b0 t soc21_didt_wreg +ffffffff81f47a30 t soc21_read_disabled_bios +ffffffff81f47a60 t soc21_read_register +ffffffff81f47b50 t soc21_asic_reset +ffffffff81f47c30 t soc21_asic_reset_method +ffffffff81f47cf0 t soc21_get_xclk +ffffffff81f47d20 t soc21_set_uvd_clocks +ffffffff81f47d50 t soc21_set_vce_clocks +ffffffff81f47d80 t soc21_get_config_memsize +ffffffff81f47da0 t soc21_need_full_reset +ffffffff81f47dd0 t soc21_init_doorbell_index +ffffffff81f47ef0 t soc21_need_reset_on_init +ffffffff81f47f90 t soc21_pre_asic_init +ffffffff81f47fc0 t soc21_update_umd_stable_pstate +ffffffff81f48040 t soc21_query_video_codecs +ffffffff81f49000 t tonga_ih_early_init +ffffffff81f49050 t tonga_ih_sw_init +ffffffff81f490d0 t tonga_ih_sw_fini +ffffffff81f49110 t tonga_ih_hw_init +ffffffff81f492f0 t tonga_ih_hw_fini +ffffffff81f49390 t tonga_ih_suspend +ffffffff81f49430 t tonga_ih_resume +ffffffff81f49470 t tonga_ih_is_idle +ffffffff81f494c0 t tonga_ih_wait_for_idle +ffffffff81f49560 t tonga_ih_check_soft_reset +ffffffff81f495c0 t tonga_ih_pre_soft_reset +ffffffff81f49670 t tonga_ih_soft_reset +ffffffff81f49740 t tonga_ih_post_soft_reset +ffffffff81f49780 t tonga_ih_set_clockgating_state +ffffffff81f497b0 t tonga_ih_set_powergating_state +ffffffff81f497e0 t tonga_ih_get_wptr +ffffffff81f498f0 t tonga_ih_decode_iv +ffffffff81f49970 t tonga_ih_set_rptr +ffffffff81f4a000 t umc_v6_0_init_registers +ffffffff81f4b000 t umc_v6_1_query_ras_error_count +ffffffff81f4b4e0 t umc_v6_1_query_ras_error_address +ffffffff81f4b7c0 t umc_v6_1_err_cnt_init +ffffffff81f4c000 T umc_v6_7_convert_error_address +ffffffff81f4c320 t umc_v6_7_query_ras_error_count +ffffffff81f4c360 t umc_v6_7_query_ras_error_address +ffffffff81f4c380 t umc_v6_7_query_ras_poison_mode +ffffffff81f4c3e0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81f4c400 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81f4c420 t umc_v6_7_query_ecc_error_count +ffffffff81f4c690 t umc_v6_7_reset_error_count_per_channel +ffffffff81f4c790 t umc_v6_7_query_error_address +ffffffff81f4c8b0 t umc_v6_7_ecc_info_querry_ecc_error_count +ffffffff81f4ca80 t umc_v6_7_ecc_info_query_error_address +ffffffff81f4d000 t umc_v8_10_query_ras_error_count +ffffffff81f4d040 t umc_v8_10_query_ras_error_address +ffffffff81f4d060 t umc_v8_10_err_cnt_init +ffffffff81f4d080 t umc_v8_10_query_ras_poison_mode +ffffffff81f4d0b0 t umc_v8_10_ecc_info_query_ras_error_count +ffffffff81f4d0d0 t umc_v8_10_ecc_info_query_ras_error_address +ffffffff81f4d0f0 t umc_v8_10_set_eeprom_table_version +ffffffff81f4d120 t umc_v8_10_query_ecc_error_count +ffffffff81f4d1f0 t umc_v8_10_clear_error_count_per_channel +ffffffff81f4d260 t umc_v8_10_query_error_address +ffffffff81f4d390 t umc_v8_10_convert_error_address +ffffffff81f4d5b0 t umc_v8_10_err_cnt_init_per_channel +ffffffff81f4d660 t umc_v8_10_ecc_info_query_ecc_error_count +ffffffff81f4d740 t umc_v8_10_ecc_info_query_error_address +ffffffff81f4e000 t umc_v8_7_query_ras_error_count +ffffffff81f4e310 t umc_v8_7_query_ras_error_address +ffffffff81f4e4d0 t umc_v8_7_err_cnt_init +ffffffff81f4e630 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81f4e750 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81f4f000 t uvd_v5_0_early_init +ffffffff81f4f050 t uvd_v5_0_sw_init +ffffffff81f4f140 t uvd_v5_0_sw_fini +ffffffff81f4f190 t uvd_v5_0_hw_init +ffffffff81f4f690 t uvd_v5_0_hw_fini +ffffffff81f4f710 t uvd_v5_0_suspend +ffffffff81f4f810 t uvd_v5_0_resume +ffffffff81f4f860 t uvd_v5_0_is_idle +ffffffff81f4f8b0 t uvd_v5_0_wait_for_idle +ffffffff81f4f940 t uvd_v5_0_soft_reset +ffffffff81f4f9e0 t uvd_v5_0_set_clockgating_state +ffffffff81f4fb80 t uvd_v5_0_set_powergating_state +ffffffff81f4fbc0 t uvd_v5_0_get_clockgating_state +ffffffff81f4fc40 t uvd_v5_0_ring_get_rptr +ffffffff81f4fc80 t uvd_v5_0_ring_get_wptr +ffffffff81f4fcc0 t uvd_v5_0_ring_set_wptr +ffffffff81f4fcf0 t uvd_v5_0_ring_emit_ib +ffffffff81f4ff60 t uvd_v5_0_ring_emit_fence +ffffffff81f50510 t uvd_v5_0_ring_test_ring +ffffffff81f506b0 t uvd_v5_0_ring_insert_nop +ffffffff81f50810 t uvd_v5_0_set_interrupt_state +ffffffff81f50840 t uvd_v5_0_process_interrupt +ffffffff81f508a0 t uvd_v5_0_stop +ffffffff81f509b0 t uvd_v5_0_start +ffffffff81f52000 t uvd_v6_0_early_init +ffffffff81f52160 t uvd_v6_0_sw_init +ffffffff81f523c0 t uvd_v6_0_sw_fini +ffffffff81f52480 t uvd_v6_0_hw_init +ffffffff81f52a30 t uvd_v6_0_hw_fini +ffffffff81f52ab0 t uvd_v6_0_suspend +ffffffff81f52bb0 t uvd_v6_0_resume +ffffffff81f52c00 t uvd_v6_0_is_idle +ffffffff81f52c50 t uvd_v6_0_wait_for_idle +ffffffff81f52ce0 t uvd_v6_0_check_soft_reset +ffffffff81f52d60 t uvd_v6_0_pre_soft_reset +ffffffff81f52da0 t uvd_v6_0_soft_reset +ffffffff81f52e70 t uvd_v6_0_post_soft_reset +ffffffff81f52f10 t uvd_v6_0_set_clockgating_state +ffffffff81f530a0 t uvd_v6_0_set_powergating_state +ffffffff81f53110 t uvd_v6_0_get_clockgating_state +ffffffff81f531a0 t uvd_v6_0_ring_get_rptr +ffffffff81f531e0 t uvd_v6_0_ring_get_wptr +ffffffff81f53220 t uvd_v6_0_ring_set_wptr +ffffffff81f53250 t uvd_v6_0_ring_emit_ib +ffffffff81f535b0 t uvd_v6_0_ring_emit_fence +ffffffff81f53b60 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81f53f50 t uvd_v6_0_ring_emit_vm_flush +ffffffff81f542b0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81f542e0 t uvd_v6_0_ring_test_ring +ffffffff81f54480 t uvd_v6_0_ring_insert_nop +ffffffff81f545e0 t uvd_v6_0_ring_emit_wreg +ffffffff81f54860 t uvd_v6_0_enc_ring_get_rptr +ffffffff81f548c0 t uvd_v6_0_enc_ring_get_wptr +ffffffff81f54920 t uvd_v6_0_enc_ring_set_wptr +ffffffff81f54960 t uvd_v6_0_enc_ring_emit_ib +ffffffff81f54ba0 t uvd_v6_0_enc_ring_emit_fence +ffffffff81f54de0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81f54f90 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81f551a0 t uvd_v6_0_enc_ring_test_ring +ffffffff81f552f0 t uvd_v6_0_enc_ring_test_ib +ffffffff81f557d0 t uvd_v6_0_enc_ring_insert_end +ffffffff81f55860 t uvd_v6_0_set_interrupt_state +ffffffff81f55890 t uvd_v6_0_process_interrupt +ffffffff81f55990 t uvd_v6_0_stop +ffffffff81f55aa0 t uvd_v6_0_start +ffffffff81f57000 t uvd_v7_0_early_init +ffffffff81f57270 t uvd_v7_0_sw_init +ffffffff81f57690 t uvd_v7_0_sw_fini +ffffffff81f57780 t uvd_v7_0_hw_init +ffffffff81f5a540 t uvd_v7_0_hw_fini +ffffffff81f5a850 t uvd_v7_0_suspend +ffffffff81f5a900 t uvd_v7_0_resume +ffffffff81f5a950 t uvd_v7_0_set_clockgating_state +ffffffff81f5a980 t uvd_v7_0_ring_get_rptr +ffffffff81f5aa20 t uvd_v7_0_ring_get_wptr +ffffffff81f5aac0 t uvd_v7_0_ring_set_wptr +ffffffff81f5ab40 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81f5abb0 t uvd_v7_0_ring_emit_ib +ffffffff81f5af50 t uvd_v7_0_ring_emit_fence +ffffffff81f5b5a0 t uvd_v7_0_ring_emit_vm_flush +ffffffff81f5b610 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81f5b640 t uvd_v7_0_ring_test_ring +ffffffff81f5b8d0 t uvd_v7_0_ring_insert_nop +ffffffff81f5ba70 t uvd_v7_0_ring_emit_wreg +ffffffff81f5bd40 t uvd_v7_0_ring_emit_reg_wait +ffffffff81f5c0f0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81f5c1e0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81f5c2e0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81f5c3e0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81f5c620 t uvd_v7_0_enc_ring_emit_fence +ffffffff81f5c860 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81f5c8d0 t uvd_v7_0_enc_ring_test_ring +ffffffff81f5ca30 t uvd_v7_0_enc_ring_test_ib +ffffffff81f5cf10 t uvd_v7_0_enc_ring_insert_end +ffffffff81f5cfa0 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81f5d0f0 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81f5d2b0 t uvd_v7_0_set_interrupt_state +ffffffff81f5d2e0 t uvd_v7_0_process_interrupt +ffffffff81f5e000 t vce_v3_0_early_init +ffffffff81f5e180 t vce_v3_0_sw_init +ffffffff81f5e2e0 t vce_v3_0_sw_fini +ffffffff81f5e330 t vce_v3_0_hw_init +ffffffff81f5e400 t vce_v3_0_hw_fini +ffffffff81f5e4f0 t vce_v3_0_suspend +ffffffff81f5e5c0 t vce_v3_0_resume +ffffffff81f5e6a0 t vce_v3_0_is_idle +ffffffff81f5e710 t vce_v3_0_wait_for_idle +ffffffff81f5e7c0 t vce_v3_0_check_soft_reset +ffffffff81f5e8c0 t vce_v3_0_pre_soft_reset +ffffffff81f5e960 t vce_v3_0_soft_reset +ffffffff81f5ea30 t vce_v3_0_post_soft_reset +ffffffff81f5ead0 t vce_v3_0_set_clockgating_state +ffffffff81f5edc0 t vce_v3_0_set_powergating_state +ffffffff81f5f5e0 t vce_v3_0_get_clockgating_state +ffffffff81f5f6a0 t vce_v3_0_ring_get_rptr +ffffffff81f5f770 t vce_v3_0_ring_get_wptr +ffffffff81f5f840 t vce_v3_0_ring_set_wptr +ffffffff81f5f900 t vce_v3_0_ring_emit_ib +ffffffff81f5fb40 t vce_v3_0_emit_pipeline_sync +ffffffff81f5fcf0 t vce_v3_0_emit_vm_flush +ffffffff81f5ff60 t vce_v3_0_set_interrupt_state +ffffffff81f5ffd0 t vce_v3_0_process_interrupt +ffffffff81f60090 t vce_v3_0_stop +ffffffff81f61000 t vce_v4_0_early_init +ffffffff81f610b0 t vce_v4_0_sw_init +ffffffff81f61350 t vce_v4_0_sw_fini +ffffffff81f613d0 t vce_v4_0_hw_init +ffffffff81f61b90 t vce_v4_0_hw_fini +ffffffff81f61cc0 t vce_v4_0_suspend +ffffffff81f61de0 t vce_v4_0_resume +ffffffff81f61e90 t vce_v4_0_set_clockgating_state +ffffffff81f61ec0 t vce_v4_0_set_powergating_state +ffffffff81f61fa0 t vce_v4_0_ring_get_rptr +ffffffff81f62010 t vce_v4_0_ring_get_wptr +ffffffff81f620a0 t vce_v4_0_ring_set_wptr +ffffffff81f62130 t vce_v4_0_ring_emit_ib +ffffffff81f62370 t vce_v4_0_ring_emit_fence +ffffffff81f625b0 t vce_v4_0_emit_vm_flush +ffffffff81f62620 t vce_v4_0_ring_insert_end +ffffffff81f626b0 t vce_v4_0_emit_wreg +ffffffff81f62800 t vce_v4_0_emit_reg_wait +ffffffff81f629c0 t vce_v4_0_set_interrupt_state +ffffffff81f62a50 t vce_v4_0_process_interrupt +ffffffff81f62af0 t vce_v4_0_start +ffffffff81f64000 T vcn_dec_sw_ring_emit_fence +ffffffff81f64240 T vcn_dec_sw_ring_insert_end +ffffffff81f642d0 T vcn_dec_sw_ring_emit_ib +ffffffff81f64510 T vcn_dec_sw_ring_emit_reg_wait +ffffffff81f646d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81f64740 T vcn_dec_sw_ring_emit_wreg +ffffffff81f65000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81f65140 T vcn_v1_0_ring_end_use +ffffffff81f651b0 t vcn_v1_0_early_init +ffffffff81f65310 t vcn_v1_0_sw_init +ffffffff81f655b0 t vcn_v1_0_sw_fini +ffffffff81f65610 t vcn_v1_0_hw_init +ffffffff81f656e0 t vcn_v1_0_hw_fini +ffffffff81f657e0 t vcn_v1_0_suspend +ffffffff81f65850 t vcn_v1_0_resume +ffffffff81f65930 t vcn_v1_0_is_idle +ffffffff81f659c0 t vcn_v1_0_wait_for_idle +ffffffff81f65a00 t vcn_v1_0_set_clockgating_state +ffffffff81f65ab0 t vcn_v1_0_set_powergating_state +ffffffff81f66010 t vcn_v1_0_dec_ring_get_rptr +ffffffff81f660a0 t vcn_v1_0_dec_ring_get_wptr +ffffffff81f66130 t vcn_v1_0_dec_ring_set_wptr +ffffffff81f66240 t vcn_v1_0_ring_patch_cs_in_place +ffffffff81f66400 t vcn_v1_0_dec_ring_emit_ib +ffffffff81f66780 t vcn_v1_0_dec_ring_emit_fence +ffffffff81f66d90 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff81f66e00 t vcn_v1_0_dec_ring_insert_nop +ffffffff81f66f90 t vcn_v1_0_dec_ring_insert_start +ffffffff81f67160 t vcn_v1_0_dec_ring_insert_end +ffffffff81f67270 t vcn_v1_0_ring_begin_use +ffffffff81f67310 t vcn_v1_0_dec_ring_emit_wreg +ffffffff81f675c0 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff81f67940 t vcn_v1_0_enc_ring_get_rptr +ffffffff81f67a20 t vcn_v1_0_enc_ring_get_wptr +ffffffff81f67b00 t vcn_v1_0_enc_ring_set_wptr +ffffffff81f67bc0 t vcn_v1_0_enc_ring_emit_ib +ffffffff81f67e00 t vcn_v1_0_enc_ring_emit_fence +ffffffff81f68040 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81f680b0 t vcn_v1_0_enc_ring_insert_end +ffffffff81f68140 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81f68290 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81f68450 t vcn_v1_0_set_interrupt_state +ffffffff81f68480 t vcn_v1_0_process_interrupt +ffffffff81f68530 t vcn_v1_0_idle_work_handler +ffffffff81f686a0 t vcn_v1_0_pause_dpg_mode +ffffffff81f69540 t vcn_v1_0_enable_clock_gating +ffffffff81f69970 t vcn_v1_0_disable_clock_gating +ffffffff81f69f30 t vcn_1_0_enable_static_power_gating +ffffffff81f6a0e0 t vcn_v1_0_start_dpg_mode +ffffffff81f6dea0 t vcn_v1_0_start_spg_mode +ffffffff81f700a0 t vcn_v1_0_clock_gating_dpg_mode +ffffffff81f71000 T vcn_v2_0_dec_ring_insert_start +ffffffff81f711c0 T vcn_v2_0_dec_ring_insert_end +ffffffff81f712c0 T vcn_v2_0_dec_ring_insert_nop +ffffffff81f71430 T vcn_v2_0_dec_ring_emit_fence +ffffffff81f719f0 T vcn_v2_0_dec_ring_emit_ib +ffffffff81f71d50 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff81f720a0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff81f72110 T vcn_v2_0_dec_ring_emit_wreg +ffffffff81f72390 T vcn_v2_0_enc_ring_emit_fence +ffffffff81f725d0 T vcn_v2_0_enc_ring_insert_end +ffffffff81f72660 T vcn_v2_0_enc_ring_emit_ib +ffffffff81f728a0 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff81f72a60 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff81f72ad0 T vcn_v2_0_enc_ring_emit_wreg +ffffffff81f72c20 T vcn_v2_0_dec_ring_test_ring +ffffffff81f72ec0 t vcn_v2_0_early_init +ffffffff81f73020 t vcn_v2_0_sw_init +ffffffff81f73350 t vcn_v2_0_sw_fini +ffffffff81f733d0 t vcn_v2_0_hw_init +ffffffff81f73d50 t vcn_v2_0_hw_fini +ffffffff81f73e50 t vcn_v2_0_suspend +ffffffff81f73e80 t vcn_v2_0_resume +ffffffff81f73ed0 t vcn_v2_0_is_idle +ffffffff81f73f60 t vcn_v2_0_wait_for_idle +ffffffff81f73fa0 t vcn_v2_0_set_clockgating_state +ffffffff81f74030 t vcn_v2_0_set_powergating_state +ffffffff81f745f0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81f74680 t vcn_v2_0_dec_ring_get_wptr +ffffffff81f74720 t vcn_v2_0_dec_ring_set_wptr +ffffffff81f74860 t vcn_v2_0_enc_ring_get_rptr +ffffffff81f74940 t vcn_v2_0_enc_ring_get_wptr +ffffffff81f74a30 t vcn_v2_0_enc_ring_set_wptr +ffffffff81f74b20 t vcn_v2_0_set_interrupt_state +ffffffff81f74b50 t vcn_v2_0_process_interrupt +ffffffff81f74c00 t vcn_v2_0_pause_dpg_mode +ffffffff81f753f0 t vcn_v2_0_enable_clock_gating +ffffffff81f75680 t vcn_v2_0_disable_clock_gating +ffffffff81f75aa0 t vcn_v2_0_start +ffffffff81f7a050 t vcn_v2_0_enable_static_power_gating +ffffffff81f7a1b0 t vcn_v2_0_clock_gating_dpg_mode +ffffffff81f7af30 t vcn_v2_0_mc_resume_dpg_mode +ffffffff81f80000 t vcn_v2_6_query_poison_status +ffffffff81f800e0 t vcn_v2_5_early_init +ffffffff81f803b0 t vcn_v2_5_sw_init +ffffffff81f80880 t vcn_v2_5_sw_fini +ffffffff81f80950 t vcn_v2_5_hw_init +ffffffff81f81390 t vcn_v2_5_hw_fini +ffffffff81f81500 t vcn_v2_5_suspend +ffffffff81f81530 t vcn_v2_5_resume +ffffffff81f81580 t vcn_v2_5_is_idle +ffffffff81f81670 t vcn_v2_5_wait_for_idle +ffffffff81f81710 t vcn_v2_5_set_clockgating_state +ffffffff81f81790 t vcn_v2_5_set_powergating_state +ffffffff81f839e0 t vcn_v2_5_dec_ring_get_rptr +ffffffff81f83a80 t vcn_v2_5_dec_ring_get_wptr +ffffffff81f83b30 t vcn_v2_5_dec_ring_set_wptr +ffffffff81f83be0 t vcn_v2_5_enc_ring_get_rptr +ffffffff81f83cd0 t vcn_v2_5_enc_ring_get_wptr +ffffffff81f83de0 t vcn_v2_5_enc_ring_set_wptr +ffffffff81f83ef0 t vcn_v2_5_set_interrupt_state +ffffffff81f83f20 t vcn_v2_5_process_interrupt +ffffffff81f84010 t vcn_v2_6_set_ras_interrupt_state +ffffffff81f84040 t vcn_v2_5_pause_dpg_mode +ffffffff81f847c0 t vcn_v2_5_enable_clock_gating +ffffffff81f84ad0 t vcn_v2_5_disable_clock_gating +ffffffff81f84fc0 t vcn_v2_5_start_dpg_mode +ffffffff81f88990 t vcn_v2_5_clock_gating_dpg_mode +ffffffff81f89740 t vcn_v2_5_mc_resume_dpg_mode +ffffffff81f8e000 t vcn_v3_0_early_init +ffffffff81f8e220 t vcn_v3_0_sw_init +ffffffff81f8e6e0 t vcn_v3_0_sw_fini +ffffffff81f8e7c0 t vcn_v3_0_hw_init +ffffffff81f8f310 t vcn_v3_0_hw_fini +ffffffff81f8f410 t vcn_v3_0_suspend +ffffffff81f8f440 t vcn_v3_0_resume +ffffffff81f8f490 t vcn_v3_0_is_idle +ffffffff81f8f580 t vcn_v3_0_wait_for_idle +ffffffff81f8f620 t vcn_v3_0_set_clockgating_state +ffffffff81f8f730 t vcn_v3_0_set_powergating_state +ffffffff81f91cc0 t vcn_v3_0_dec_ring_get_rptr +ffffffff81f91d60 t vcn_v3_0_dec_ring_get_wptr +ffffffff81f91e10 t vcn_v3_0_dec_ring_set_wptr +ffffffff81f91f80 t vcn_v3_0_ring_patch_cs_in_place +ffffffff81f922a0 t vcn_v3_0_enc_ring_get_rptr +ffffffff81f92390 t vcn_v3_0_enc_ring_get_wptr +ffffffff81f924a0 t vcn_v3_0_enc_ring_set_wptr +ffffffff81f925b0 t vcn_v3_0_set_interrupt_state +ffffffff81f925e0 t vcn_v3_0_process_interrupt +ffffffff81f926d0 t vcn_v3_0_pause_dpg_mode +ffffffff81f92f00 t vcn_v3_0_enable_clock_gating +ffffffff81f93190 t vcn_v3_0_disable_clock_gating +ffffffff81f936c0 t vcn_v3_0_start_dpg_mode +ffffffff81f969b0 t vcn_v3_0_clock_gating_dpg_mode +ffffffff81f97790 t vcn_v3_0_mc_resume_dpg_mode +ffffffff81f9c000 t vcn_v4_0_query_ras_poison_status +ffffffff81f9c0e0 t vcn_v4_0_early_init +ffffffff81f9c2a0 t vcn_v4_0_sw_init +ffffffff81f9c560 t vcn_v4_0_sw_fini +ffffffff81f9c640 t vcn_v4_0_hw_init +ffffffff81f9d070 t vcn_v4_0_hw_fini +ffffffff81f9d1c0 t vcn_v4_0_suspend +ffffffff81f9d1f0 t vcn_v4_0_resume +ffffffff81f9d240 t vcn_v4_0_is_idle +ffffffff81f9d340 t vcn_v4_0_wait_for_idle +ffffffff81f9d3f0 t vcn_v4_0_set_clockgating_state +ffffffff81f9d500 t vcn_v4_0_set_powergating_state +ffffffff81f9dd40 t vcn_v4_0_unified_ring_get_rptr +ffffffff81f9de20 t vcn_v4_0_unified_ring_get_wptr +ffffffff81f9df10 t vcn_v4_0_unified_ring_set_wptr +ffffffff81f9e010 t vcn_v4_0_ring_patch_cs_in_place +ffffffff81f9e3a0 t vcn_v4_0_limit_sched +ffffffff81f9e400 t vcn_v4_0_set_interrupt_state +ffffffff81f9e430 t vcn_v4_0_process_interrupt +ffffffff81f9e4f0 t vcn_v4_0_set_ras_interrupt_state +ffffffff81f9e520 t vcn_v4_0_pause_dpg_mode +ffffffff81f9e7a0 t vcn_v4_0_enable_clock_gating +ffffffff81f9eaa0 t vcn_v4_0_disable_clock_gating +ffffffff81f9ef60 t vcn_v4_0_start +ffffffff81fa3a50 t vcn_v4_0_disable_clock_gating_dpg_mode +ffffffff81fa4830 t vcn_v4_0_mc_resume_dpg_mode +ffffffff81fa9000 t vcn_v4_0_3_early_init +ffffffff81fa9100 t vcn_v4_0_3_sw_init +ffffffff81fa9380 t vcn_v4_0_3_sw_fini +ffffffff81fa9440 t vcn_v4_0_3_hw_init +ffffffff81faa140 t vcn_v4_0_3_hw_fini +ffffffff81faa1d0 t vcn_v4_0_3_suspend +ffffffff81faa240 t vcn_v4_0_3_resume +ffffffff81faa290 t vcn_v4_0_3_is_idle +ffffffff81faa400 t vcn_v4_0_3_wait_for_idle +ffffffff81faa500 t vcn_v4_0_3_set_clockgating_state +ffffffff81faa690 t vcn_v4_0_3_set_powergating_state +ffffffff81faad80 t vcn_v4_0_3_unified_ring_get_rptr +ffffffff81faaef0 t vcn_v4_0_3_unified_ring_get_wptr +ffffffff81fab080 t vcn_v4_0_3_unified_ring_set_wptr +ffffffff81fab230 t vcn_v4_0_3_set_interrupt_state +ffffffff81fab260 t vcn_v4_0_3_process_interrupt +ffffffff81fab380 t vcn_v4_0_3_query_ras_error_count +ffffffff81fab470 t vcn_v4_0_3_reset_ras_error_count +ffffffff81fab560 t vcn_v4_0_3_pause_dpg_mode +ffffffff81fab590 t vcn_v4_0_3_enable_clock_gating +ffffffff81fab8b0 t vcn_v4_0_3_disable_clock_gating +ffffffff81fabd90 t vcn_v4_0_3_start +ffffffff81fb04b0 t vcn_v4_0_3_disable_clock_gating_dpg_mode +ffffffff81fb1250 t vcn_v4_0_3_mc_resume_dpg_mode +ffffffff81fb6000 t vega10_ih_early_init +ffffffff81fb6050 t vega10_ih_sw_init +ffffffff81fb6300 t vega10_ih_sw_fini +ffffffff81fb6340 t vega10_ih_hw_init +ffffffff81fb66c0 t vega10_ih_hw_fini +ffffffff81fb6710 t vega10_ih_suspend +ffffffff81fb6760 t vega10_ih_resume +ffffffff81fb6770 t vega10_ih_is_idle +ffffffff81fb67a0 t vega10_ih_wait_for_idle +ffffffff81fb67d0 t vega10_ih_soft_reset +ffffffff81fb6800 t vega10_ih_set_clockgating_state +ffffffff81fb6950 t vega10_ih_set_powergating_state +ffffffff81fb6980 t vega10_ih_get_wptr +ffffffff81fb6ab0 t vega10_ih_set_rptr +ffffffff81fb6b80 t vega10_ih_self_irq +ffffffff81fb6c00 t vega10_ih_toggle_interrupts +ffffffff81fb7000 T vega10_reg_base_init +ffffffff81fb7150 T vega10_doorbell_index_init +ffffffff81fb8000 t vega20_ih_early_init +ffffffff81fb8050 t vega20_ih_sw_init +ffffffff81fb8330 t vega20_ih_sw_fini +ffffffff81fb8370 t vega20_ih_hw_init +ffffffff81fb8990 t vega20_ih_hw_fini +ffffffff81fb89e0 t vega20_ih_suspend +ffffffff81fb8a30 t vega20_ih_resume +ffffffff81fb8a40 t vega20_ih_is_idle +ffffffff81fb8a70 t vega20_ih_wait_for_idle +ffffffff81fb8aa0 t vega20_ih_soft_reset +ffffffff81fb8ad0 t vega20_ih_set_clockgating_state +ffffffff81fb8c00 t vega20_ih_set_powergating_state +ffffffff81fb8c30 t vega20_ih_get_wptr +ffffffff81fb8d60 t vega20_ih_set_rptr +ffffffff81fb8e30 t vega20_ih_self_irq +ffffffff81fb8eb0 t vega20_ih_toggle_interrupts +ffffffff81fba000 T vega20_reg_base_init +ffffffff81fba160 T vega20_doorbell_index_init +ffffffff81fbb000 T vi_srbm_select +ffffffff81fbb050 T vi_set_virt_ops +ffffffff81fbb090 T vi_set_ip_blocks +ffffffff81fbb4c0 T legacy_doorbell_index_init +ffffffff81fbb570 t vi_common_early_init +ffffffff81fbb860 t vi_common_late_init +ffffffff81fbb8a0 t vi_common_sw_init +ffffffff81fbb8e0 t vi_common_sw_fini +ffffffff81fbb910 t vi_common_hw_init +ffffffff81fbbfd0 t vi_common_hw_fini +ffffffff81fbc050 t vi_common_suspend +ffffffff81fbc0d0 t vi_common_resume +ffffffff81fbc110 t vi_common_is_idle +ffffffff81fbc140 t vi_common_wait_for_idle +ffffffff81fbc170 t vi_common_soft_reset +ffffffff81fbc1a0 t vi_common_set_clockgating_state +ffffffff81fbc710 t vi_common_set_powergating_state +ffffffff81fbc740 t vi_common_get_clockgating_state +ffffffff81fbc800 t cz_smc_rreg +ffffffff81fbc880 t cz_smc_wreg +ffffffff81fbc8f0 t vi_smc_rreg +ffffffff81fbc970 t vi_smc_wreg +ffffffff81fbc9e0 t vi_pcie_rreg +ffffffff81fbca80 t vi_pcie_wreg +ffffffff81fbcb10 t vi_uvd_ctx_rreg +ffffffff81fbcba0 t vi_uvd_ctx_wreg +ffffffff81fbcc10 t vi_didt_rreg +ffffffff81fbcc90 t vi_didt_wreg +ffffffff81fbcd00 t vi_gc_cac_rreg +ffffffff81fbcd80 t vi_gc_cac_wreg +ffffffff81fbcdf0 t vi_read_disabled_bios +ffffffff81fbcfc0 t vi_read_bios_from_rom +ffffffff81fbd0c0 t vi_read_register +ffffffff81fbd370 t vi_asic_reset +ffffffff81fbd4d0 t vi_asic_reset_method +ffffffff81fbd580 t vi_get_xclk +ffffffff81fbd630 t vi_set_uvd_clocks +ffffffff81fbd6e0 t vi_set_vce_clocks +ffffffff81fbd980 t vi_get_config_memsize +ffffffff81fbd9a0 t vi_flush_hdp +ffffffff81fbda10 t vi_invalidate_hdp +ffffffff81fbda80 t vi_need_full_reset +ffffffff81fbdad0 t vi_get_pcie_usage +ffffffff81fbdc00 t vi_need_reset_on_init +ffffffff81fbdc80 t vi_get_pcie_replay_count +ffffffff81fbdcf0 t vi_asic_supports_baco +ffffffff81fbdd40 t vi_pre_asic_init +ffffffff81fbdd70 t vi_query_video_codecs +ffffffff81fbde10 t vi_set_uvd_clock +ffffffff81fbe000 T amdgpu_xcp_drm_dev_alloc +ffffffff81fbe050 T amdgpu_xcp_drv_release +ffffffff81fbf000 T amdgpu_dm_find_first_crtc_matching_connector +ffffffff81fbf070 T amdgpu_dm_update_connector_after_detect +ffffffff81fbf5c0 T amdgpu_dm_update_freesync_caps +ffffffff81fbfa70 T dm_atomic_get_state +ffffffff81fbfae0 T amdgpu_dm_connector_atomic_set_property +ffffffff81fbfba0 T amdgpu_dm_connector_atomic_get_property +ffffffff81fbfc40 T amdgpu_dm_connector_funcs_reset +ffffffff81fbfd30 T amdgpu_dm_connector_atomic_duplicate_state +ffffffff81fbfe30 T create_validate_stream_for_sink +ffffffff81fc1500 T amdgpu_dm_connector_mode_valid +ffffffff81fc16d0 T convert_dc_color_depth_into_bpc +ffffffff81fc1710 t dm_encoder_helper_disable +ffffffff81fc1740 t dm_encoder_helper_atomic_check +ffffffff81fc1910 T amdgpu_dm_connector_init_helper +ffffffff81fc1c70 T amdgpu_dm_get_encoder_crtc_mask +ffffffff81fc1cc0 T dm_restore_drm_connector_state +ffffffff81fc1e30 t parse_hdmi_amd_vsdb +ffffffff81fc2160 T amdgpu_dm_trigger_timing_sync +ffffffff81fc2330 T dm_write_reg_func +ffffffff81fc2350 T dm_read_reg_func +ffffffff81fc23f0 T amdgpu_dm_process_dmub_aux_transfer_sync +ffffffff81fc2600 T amdgpu_dm_process_dmub_set_config_sync +ffffffff81fc2770 T check_seamless_boot_capability +ffffffff81fc27c0 T dm_execute_dmub_cmd +ffffffff81fc27e0 T dm_execute_dmub_cmd_list +ffffffff81fc2800 t dm_early_init +ffffffff81fc2bb0 t dm_late_init +ffffffff81fc2e50 t dm_sw_init +ffffffff81fc3400 t dm_sw_fini +ffffffff81fc34a0 t amdgpu_dm_early_fini +ffffffff81fc3500 t dm_hw_init +ffffffff81fc50d0 t dm_hw_fini +ffffffff81fc5120 t dm_suspend +ffffffff81fc54a0 t dm_resume +ffffffff81fc5d00 t dm_is_idle +ffffffff81fc5d30 t dm_wait_for_idle +ffffffff81fc5d60 t dm_check_soft_reset +ffffffff81fc5d90 t dm_soft_reset +ffffffff81fc5dc0 t dm_set_clockgating_state +ffffffff81fc5df0 t dm_set_powergating_state +ffffffff81fc5e20 t dm_bandwidth_update +ffffffff81fc5e50 t dm_vblank_get_counter +ffffffff81fc5ec0 t dm_crtc_get_scanoutpos +ffffffff81fc5f80 t amdgpu_dm_dmub_reg_read +ffffffff81fc6030 t amdgpu_dm_dmub_reg_write +ffffffff81fc6060 t dm_dmub_hw_init +ffffffff81fc6430 t dmub_aux_setconfig_callback +ffffffff81fc64d0 t amdgpu_dm_fini +ffffffff81fc66b0 t emulated_link_detect +ffffffff81fc67b0 t amdgpu_dm_atomic_check +ffffffff81fc7510 t dm_update_plane_state +ffffffff81fc7b30 t dm_update_crtc_state +ffffffff81fc8510 t dm_check_crtc_cursor +ffffffff81fc8880 t is_scaling_state_different +ffffffff81fc8920 t do_aquire_global_lock +ffffffff81fc8b90 t dm_update_mst_vcpi_slots_for_dsc +ffffffff81fc8d80 t dm_atomic_destroy_state +ffffffff81fc8dc0 t dm_check_cursor_fb +ffffffff81fc8f50 t fill_dc_plane_attributes +ffffffff81fc91e0 t fill_dc_plane_info_and_addr +ffffffff81fc9510 t fill_hdr_info_packet +ffffffff81fc9670 t is_timing_unchanged_for_freesync +ffffffff81fc97a0 t get_highest_refresh_rate_mode +ffffffff81fc98d0 t update_stream_scaling_settings +ffffffff81fc9a10 t amdgpu_dm_atomic_commit_tail +ffffffff81fcc700 t amdgpu_dm_backlight_set_level +ffffffff81fcc8e0 t dm_atomic_duplicate_state +ffffffff81fcc980 t amdgpu_dm_audio_component_bind +ffffffff81fcc9e0 t amdgpu_dm_audio_component_unbind +ffffffff81fcca40 t amdgpu_dm_audio_component_get_eld +ffffffff81fccb60 t dm_dmub_outbox1_low_irq +ffffffff81fccde0 t dm_handle_hpd_work +ffffffff81fcce50 t amdgpu_dm_encoder_destroy +ffffffff81fcce80 t amdgpu_dm_i2c_xfer +ffffffff81fccfd0 t amdgpu_dm_i2c_func +ffffffff81fcd000 t amdgpu_dm_connector_detect +ffffffff81fcd0c0 t amdgpu_dm_connector_funcs_force +ffffffff81fcd190 t amdgpu_dm_connector_late_register +ffffffff81fcd2f0 t amdgpu_dm_connector_unregister +ffffffff81fcd310 t amdgpu_dm_connector_destroy +ffffffff81fcd3f0 t amdgpu_dm_backlight_update_status +ffffffff81fcd470 t amdgpu_dm_backlight_get_brightness +ffffffff81fcd660 t get_modes +ffffffff81fcd670 t amdgpu_dm_connector_atomic_check +ffffffff81fcd7a0 t amdgpu_dm_connector_get_modes +ffffffff81fcdd60 t dm_crtc_high_irq +ffffffff81fcdf00 t dm_vupdate_high_irq +ffffffff81fce070 t dm_pflip_high_irq +ffffffff81fce270 t register_hpd_handlers +ffffffff81fce390 t dmub_hpd_callback +ffffffff81fce500 t handle_hpd_irq +ffffffff81fce510 t handle_hpd_rx_irq +ffffffff81fce800 t handle_hpd_irq_helper +ffffffff81fce960 t schedule_hpd_rx_offload_work +ffffffff81fcea10 t dm_handle_hpd_rx_offload_work +ffffffff81fcece0 t dm_gpureset_toggle_interrupts +ffffffff81fceef0 t s3_handle_mst +ffffffff81fd0000 T amdgpu_dm_init_color_mod +ffffffff81fd0010 T amdgpu_dm_verify_lut_sizes +ffffffff81fd00e0 T amdgpu_dm_update_crtc_color_mgmt +ffffffff81fd0760 T amdgpu_dm_update_plane_color_mgmt +ffffffff81fd1000 T amdgpu_dm_crtc_handle_vblank +ffffffff81fd1070 T amdgpu_dm_crtc_modeset_required +ffffffff81fd10b0 T amdgpu_dm_crtc_vrr_active_irq +ffffffff81fd10f0 T amdgpu_dm_crtc_set_vupdate_irq +ffffffff81fd11a0 T amdgpu_dm_crtc_vrr_active +ffffffff81fd11e0 T amdgpu_dm_crtc_enable_vblank +ffffffff81fd1200 t dm_set_vblank +ffffffff81fd1450 T amdgpu_dm_crtc_disable_vblank +ffffffff81fd1470 T amdgpu_dm_crtc_init +ffffffff81fd1650 t vblank_control_worker +ffffffff81fd1770 t dm_crtc_reset_state +ffffffff81fd1810 t amdgpu_dm_crtc_destroy +ffffffff81fd1840 t dm_crtc_duplicate_state +ffffffff81fd19f0 t dm_crtc_destroy_state +ffffffff81fd1a30 t dm_crtc_helper_mode_fixup +ffffffff81fd1a60 t dm_crtc_helper_disable +ffffffff81fd1a90 t dm_crtc_helper_atomic_check +ffffffff81fd2000 T hdcp_update_display +ffffffff81fd2280 t process_output +ffffffff81fd23d0 T hdcp_reset_display +ffffffff81fd2530 T hdcp_handle_cpirq +ffffffff81fd2560 T hdcp_destroy +ffffffff81fd2650 T hdcp_create_workqueue +ffffffff81fd2a30 t event_cpirq +ffffffff81fd2a80 t event_property_update +ffffffff81fd2cb0 t event_callback +ffffffff81fd2d30 t event_watchdog_timer +ffffffff81fd2dc0 t event_property_validate +ffffffff81fd2f30 t lp_write_i2c +ffffffff81fd2fb0 t lp_read_i2c +ffffffff81fd3050 t lp_write_dpcd +ffffffff81fd3080 t lp_read_dpcd +ffffffff81fd30b0 t update_config +ffffffff81fd3420 t enable_assr +ffffffff81fd3540 t __delayed_work_tick +ffffffff81fd4000 T dm_helpers_parse_edid_caps +ffffffff81fd4250 T dm_helpers_dp_update_branch_info +ffffffff81fd4280 T dm_helpers_dp_mst_write_payload_allocation_table +ffffffff81fd4640 T dm_helpers_dp_mst_poll_pending_down_reply +ffffffff81fd4670 T dm_helpers_dp_mst_clear_payload_allocation_table +ffffffff81fd46a0 T dm_helpers_dp_mst_poll_for_allocation_change_trigger +ffffffff81fd4710 T dm_helpers_dp_mst_send_payload_allocation +ffffffff81fd47e0 T dm_dtn_log_begin +ffffffff81fd4830 T dm_dtn_log_append_v +ffffffff81fd4980 T dm_dtn_log_end +ffffffff81fd49d0 T dm_helpers_dp_mst_start_top_mgr +ffffffff81fd4aa0 T dm_helpers_dp_mst_stop_top_mgr +ffffffff81fd4b40 T dm_helpers_dp_read_dpcd +ffffffff81fd4bc0 T dm_helpers_dp_write_dpcd +ffffffff81fd4c40 T dm_helpers_submit_i2c +ffffffff81fd4d60 T dm_helpers_dp_write_dsc_enable +ffffffff81fd5390 T dm_helpers_is_dp_sink_present +ffffffff81fd5420 T dm_helpers_read_local_edid +ffffffff81fd5680 T dm_helper_dmub_aux_transfer_sync +ffffffff81fd56d0 T dm_helpers_dmub_set_config_sync +ffffffff81fd56f0 T dm_set_dcn_clocks +ffffffff81fd5720 T dm_helpers_smu_timeout +ffffffff81fd5750 T dm_helpers_init_panel_settings +ffffffff81fd57c0 T dm_helpers_override_panel_settings +ffffffff81fd5800 T dm_helpers_allocate_gpu_mem +ffffffff81fd5900 T dm_helpers_free_gpu_mem +ffffffff81fd5990 T dm_helpers_dmub_outbox_interrupt_control +ffffffff81fd5a20 T dm_helpers_mst_enable_stream_features +ffffffff81fd5b30 T dm_helpers_dp_handle_test_pattern_request +ffffffff81fd5e60 T dm_set_phyd32clk +ffffffff81fd5e90 T dm_helpers_enable_periodic_detection +ffffffff81fd5ec0 T dm_helpers_dp_mst_update_branch_bandwidth +ffffffff81fd5ef0 T dm_get_adaptive_sync_support_type +ffffffff81fd5f60 t execute_synaptics_rc_command +ffffffff81fd7000 T amdgpu_dm_irq_register_interrupt +ffffffff81fd71a0 t dm_irq_work_func +ffffffff81fd71c0 T amdgpu_dm_irq_unregister_interrupt +ffffffff81fd7340 T amdgpu_dm_irq_init +ffffffff81fd7430 T amdgpu_dm_irq_fini +ffffffff81fd75d0 T amdgpu_dm_irq_suspend +ffffffff81fd76e0 T amdgpu_dm_irq_resume_early +ffffffff81fd78a0 T amdgpu_dm_irq_resume_late +ffffffff81fd7a60 T amdgpu_dm_set_irq_funcs +ffffffff81fd7b20 T amdgpu_dm_outbox_init +ffffffff81fd7b50 T amdgpu_dm_hpd_init +ffffffff81fd7c00 T amdgpu_dm_hpd_fini +ffffffff81fd7cb0 t amdgpu_dm_set_crtc_irq_state +ffffffff81fd7d30 t amdgpu_dm_irq_handler +ffffffff81fd7f30 t amdgpu_dm_set_vline0_irq_state +ffffffff81fd7fb0 t amdgpu_dm_set_dmub_outbox_irq_state +ffffffff81fd8000 t amdgpu_dm_set_vupdate_irq_state +ffffffff81fd8080 t amdgpu_dm_set_dmub_trace_irq_state +ffffffff81fd80d0 t amdgpu_dm_set_pflip_irq_state +ffffffff81fd8150 t amdgpu_dm_set_hpd_irq_state +ffffffff81fd9000 T needs_dsc_aux_workaround +ffffffff81fd9050 T dm_dp_create_fake_mst_encoders +ffffffff81fd9100 T dm_handle_mst_sideband_msg_ready_event +ffffffff81fd9340 T amdgpu_dm_initialize_dp_connector +ffffffff81fd9440 t kasprintf +ffffffff81fd9510 t dm_dp_aux_transfer +ffffffff81fd9650 T dm_mst_get_pbn_divider +ffffffff81fd96b0 T compute_mst_dsc_configs_for_state +ffffffff81fd9950 t is_dsc_need_re_compute +ffffffff81fd9b20 t compute_mst_dsc_configs_for_link +ffffffff81fda150 T pre_validate_dsc +ffffffff81fda700 T dm_dp_mst_is_port_support_mode +ffffffff81fda960 t amdgpu_dm_encoder_destroy +ffffffff81fda970 t dm_dp_add_mst_connector +ffffffff81fdab30 t dm_handle_mst_down_rep_msg_ready +ffffffff81fdab50 t amdgpu_dm_mst_connector_late_register +ffffffff81fdaba0 t amdgpu_dm_mst_connector_early_unregister +ffffffff81fdac70 t dm_dp_mst_connector_destroy +ffffffff81fdacf0 t dm_dp_mst_get_modes +ffffffff81fdb1e0 t dm_dp_mst_detect +ffffffff81fdb3a0 t dm_mst_atomic_best_encoder +ffffffff81fdb400 t dm_dp_mst_atomic_check +ffffffff81fdb430 t set_dsc_configs_from_fairness_vars +ffffffff81fdb700 t increase_dsc_bpp +ffffffff81fdbc50 t try_disable_dsc +ffffffff81fdc000 T amdgpu_dm_plane_get_format_info +ffffffff81fdc020 T amdgpu_dm_plane_fill_blending_from_plane_state +ffffffff81fdc120 T amdgpu_dm_plane_fill_plane_buffer_attributes +ffffffff81fdc6a0 T amdgpu_dm_plane_helper_check_state +ffffffff81fdc8c0 T amdgpu_dm_plane_fill_dc_scaling_info +ffffffff81fdcb20 T amdgpu_dm_plane_handle_cursor_update +ffffffff81fdcdb0 T amdgpu_dm_plane_init +ffffffff81fddbb0 T is_video_format +ffffffff81fddc00 t dm_drm_plane_reset +ffffffff81fddc90 t dm_drm_plane_duplicate_state +ffffffff81fddd20 t dm_drm_plane_destroy_state +ffffffff81fddd60 t dm_plane_format_mod_supported +ffffffff81fdde90 t dm_plane_helper_prepare_fb +ffffffff81fde140 t dm_plane_helper_cleanup_fb +ffffffff81fde1e0 t dm_plane_atomic_check +ffffffff81fde2b0 t dm_plane_atomic_async_check +ffffffff81fde2f0 t dm_plane_atomic_async_update +ffffffff81fde3a0 t amdgpu_bo_reserve +ffffffff81fde5a0 t amdgpu_bo_unreserve +ffffffff81fdf000 T dm_pp_apply_display_requirements +ffffffff81fdf1d0 T dm_pp_get_clock_levels_by_type +ffffffff81fdf510 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff81fdf6d0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff81fdf880 T dm_pp_notify_wm_clock_changes +ffffffff81fdf8d0 T dm_pp_apply_power_level_change_request +ffffffff81fdf900 T dm_pp_apply_clock_for_voltage_request +ffffffff81fdf9a0 T dm_pp_get_static_clocks +ffffffff81fdfa60 T dm_pp_get_funcs +ffffffff81fdfb70 t pp_rv_set_wm_ranges +ffffffff81fdfcf0 t pp_rv_set_pme_wa_enable +ffffffff81fdfd10 t pp_rv_set_active_display_count +ffffffff81fdfd30 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff81fdfd50 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff81fdfd70 t pp_rv_set_hard_min_fclk_by_freq +ffffffff81fdfd90 t pp_nv_set_display_count +ffffffff81fdfdf0 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff81fdfe60 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff81fdfec0 t pp_nv_set_voltage_by_freq +ffffffff81fdff50 t pp_nv_set_wm_ranges +ffffffff81fdffa0 t pp_nv_set_hard_min_uclk_by_freq +ffffffff81fe0010 t pp_nv_get_maximum_sustainable_clocks +ffffffff81fe0070 t pp_nv_get_uclk_dpm_states +ffffffff81fe00d0 t pp_nv_set_pstate_handshake_support +ffffffff81fe0120 t pp_rn_set_wm_ranges +ffffffff81fe0170 t pp_rn_get_dpm_clock_table +ffffffff81fe1000 T amdgpu_dm_set_psr_caps +ffffffff81fe1150 T amdgpu_dm_link_setup_psr +ffffffff81fe12e0 T amdgpu_dm_psr_enable +ffffffff81fe13e0 T amdgpu_dm_psr_disable +ffffffff81fe1460 T amdgpu_dm_psr_disable_all +ffffffff81fe2000 T amdgpu_dm_setup_replay +ffffffff81fe20f0 T amdgpu_dm_replay_enable +ffffffff81fe2270 T amdgpu_dm_replay_disable +ffffffff81fe3000 T dm_get_elapse_time_in_ns +ffffffff81fe3030 T dm_perf_trace_timestamp +ffffffff81fe4000 T dc_assert_fp_enabled +ffffffff81fe4070 T dc_fpu_begin +ffffffff81fe40c0 T dc_fpu_end +ffffffff81fe5000 T dal_vector_construct +ffffffff81fe50d0 T dal_vector_presized_create +ffffffff81fe5340 T dal_vector_create +ffffffff81fe5460 T dal_vector_destruct +ffffffff81fe54b0 T dal_vector_destroy +ffffffff81fe5530 T dal_vector_get_count +ffffffff81fe5560 T dal_vector_at_index +ffffffff81fe55a0 T dal_vector_remove_at_index +ffffffff81fe5630 T dal_vector_set_at_index +ffffffff81fe5690 T dal_vector_insert_at +ffffffff81fe5790 T dal_vector_reserve +ffffffff81fe5840 T dal_vector_append +ffffffff81fe5940 T dal_vector_clone +ffffffff81fe59f0 T dal_vector_capacity +ffffffff81fe5a20 T dal_vector_clear +ffffffff81fe6000 T fixed_point_to_int_frac +ffffffff81fe61f0 T convert_float_matrix +ffffffff81fe62b0 T reduce_fraction +ffffffff81fe7000 T is_rgb_cspace +ffffffff81fe7080 T is_lower_pipe_tree_visible +ffffffff81fe70e0 T is_upper_pipe_tree_visible +ffffffff81fe7140 T is_pipe_tree_visible +ffffffff81fe71c0 T build_prescale_params +ffffffff81fe8000 T dc_fixpt_from_fraction +ffffffff81fe81c0 T dc_fixpt_mul +ffffffff81fe8360 T dc_fixpt_sqr +ffffffff81fe84d0 T dc_fixpt_recip +ffffffff81fe8540 T dc_fixpt_sinc +ffffffff81fe8730 T dc_fixpt_sin +ffffffff81fe8760 T dc_fixpt_cos +ffffffff81fe8850 T dc_fixpt_exp +ffffffff81fe8b30 t fixed31_32_exp_from_taylor_series +ffffffff81fe8f10 T dc_fixpt_log +ffffffff81fe9120 T dc_fixpt_u4d19 +ffffffff81fe9160 T dc_fixpt_u3d19 +ffffffff81fe91a0 T dc_fixpt_u2d19 +ffffffff81fe91e0 T dc_fixpt_u0d19 +ffffffff81fe9210 T dc_fixpt_clamp_u0d14 +ffffffff81fe9260 T dc_fixpt_clamp_u0d10 +ffffffff81fe92b0 T dc_fixpt_s4d19 +ffffffff81fea000 T bios_parser_create +ffffffff81feb270 t bios_parser_get_connectors_number +ffffffff81feb2d0 t bios_parser_get_connector_id +ffffffff81feb360 t bios_parser_get_src_obj +ffffffff81feb460 t bios_parser_get_i2c_info +ffffffff81feb680 t bios_parser_get_hpd_info +ffffffff81feb760 t bios_parser_get_device_tag +ffffffff81feb960 t bios_parser_get_spread_spectrum_info +ffffffff81febb60 t bios_parser_get_ss_entry_number +ffffffff81febda0 t bios_parser_get_embedded_panel_info +ffffffff81fec310 t bios_parser_get_gpio_pin_info +ffffffff81fec420 t bios_parser_get_encoder_cap_info +ffffffff81fec520 t bios_parser_set_scratch_critical_state +ffffffff81fec530 t bios_parser_is_device_id_supported +ffffffff81fec5f0 t bios_parser_encoder_control +ffffffff81fec630 t bios_parser_transmitter_control +ffffffff81fec670 t bios_parser_enable_crtc +ffffffff81fec6c0 t bios_parser_adjust_pixel_clock +ffffffff81fec700 t bios_parser_set_pixel_clock +ffffffff81fec740 t bios_parser_set_dce_clock +ffffffff81fec780 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff81fec7d0 t bios_parser_program_crtc_timing +ffffffff81fec810 t bios_parser_program_display_engine_pll +ffffffff81fec850 t bios_parser_enable_disp_power_gating +ffffffff81fec890 t bios_parser_destroy +ffffffff81fec950 t bios_get_board_layout_info +ffffffff81fecbd0 t get_bios_object +ffffffff81fecda0 t get_ss_info_from_ss_info_table +ffffffff81fecf70 t get_ss_info_v3_1 +ffffffff81fed0e0 t get_ss_entry_number_from_ss_info_tbl +ffffffff81fee000 T firmware_parser_create +ffffffff81fefe70 t bios_parser_get_connectors_number +ffffffff81feffe0 t bios_parser_get_connector_id +ffffffff81ff0040 t bios_parser_get_src_obj +ffffffff81ff02e0 t bios_parser_get_i2c_info +ffffffff81ff0580 t bios_parser_get_hpd_info +ffffffff81ff06f0 t bios_parser_get_device_tag +ffffffff81ff09c0 t bios_parser_get_spread_spectrum_info +ffffffff81ff0e40 t bios_parser_get_ss_entry_number +ffffffff81ff0e70 t bios_parser_get_embedded_panel_info +ffffffff81ff1070 t bios_parser_get_gpio_pin_info +ffffffff81ff1190 t bios_parser_get_encoder_cap_info +ffffffff81ff1300 t bios_parser_is_accelerated_mode +ffffffff81ff1310 t bios_parser_set_scratch_critical_state +ffffffff81ff1320 t bios_parser_is_device_id_supported +ffffffff81ff1390 t bios_parser_encoder_control +ffffffff81ff13d0 t bios_parser_transmitter_control +ffffffff81ff1410 t bios_parser_enable_crtc +ffffffff81ff1460 t bios_parser_set_pixel_clock +ffffffff81ff14a0 t bios_parser_set_dce_clock +ffffffff81ff14e0 t bios_parser_program_crtc_timing +ffffffff81ff1520 t bios_parser_enable_disp_power_gating +ffffffff81ff1560 t firmware_parser_destroy +ffffffff81ff1620 t bios_get_board_layout_info +ffffffff81ff1ac0 t bios_parser_pack_data_tables +ffffffff81ff1af0 t bios_get_atom_dc_golden_table +ffffffff81ff1c30 t bios_parser_enable_lvtma_control +ffffffff81ff1c80 t bios_parser_get_soc_bb_info +ffffffff81ff1d90 t bios_parser_get_disp_connector_caps_info +ffffffff81ff1ef0 t bios_parser_get_lttpr_caps +ffffffff81ff2040 t bios_parser_get_lttpr_interop +ffffffff81ff2180 t bios_parser_get_connector_speed_cap_info +ffffffff81ff22d0 t get_bios_object +ffffffff81ff2430 t get_bios_object_from_path_v3 +ffffffff81ff3000 T object_id_from_bios_object_id +ffffffff81ff4000 T bios_get_image +ffffffff81ff4050 T bios_is_accelerated_mode +ffffffff81ff40b0 T bios_set_scratch_acc_mode_change +ffffffff81ff40f0 T bios_set_scratch_critical_state +ffffffff81ff4130 T bios_get_vga_enabled_displays +ffffffff81ff5000 T dal_bios_parser_create +ffffffff81ff5070 T dal_bios_parser_destroy +ffffffff81ff6000 T dal_bios_parser_init_cmd_tbl +ffffffff81ff6810 t encoder_control_digx_v3 +ffffffff81ff6910 t encoder_control_digx_v4 +ffffffff81ff6a10 t encoder_control_digx_v5 +ffffffff81ff6b60 t encoder_control_dig1_v1 +ffffffff81ff6be0 t encoder_control_dig2_v1 +ffffffff81ff6c60 t encoder_control_dig_v1 +ffffffff81ff6cc0 t transmitter_control_v2 +ffffffff81ff6e60 t transmitter_control_v3 +ffffffff81ff7010 t transmitter_control_v4 +ffffffff81ff71c0 t transmitter_control_v1_5 +ffffffff81ff7330 t transmitter_control_v1_6 +ffffffff81ff7490 t set_pixel_clock_v3 +ffffffff81ff7600 t set_pixel_clock_v5 +ffffffff81ff77a0 t set_pixel_clock_v6 +ffffffff81ff7940 t set_pixel_clock_v7 +ffffffff81ff7b10 t enable_spread_spectrum_on_ppll_v1 +ffffffff81ff7c30 t enable_spread_spectrum_on_ppll_v2 +ffffffff81ff7d60 t enable_spread_spectrum_on_ppll_v3 +ffffffff81ff7e70 t adjust_display_pll_v2 +ffffffff81ff7fc0 t adjust_display_pll_v3 +ffffffff81ff8130 t dac1_encoder_control_v1 +ffffffff81ff81b0 t dac2_encoder_control_v1 +ffffffff81ff8230 t dac1_output_control_v1 +ffffffff81ff8290 t dac2_output_control_v1 +ffffffff81ff82f0 t set_crtc_using_dtd_timing_v3 +ffffffff81ff8440 t set_crtc_timing_v1 +ffffffff81ff85c0 t enable_crtc_v1 +ffffffff81ff8660 t enable_crtc_mem_req_v1 +ffffffff81ff8700 t program_clock_v5 +ffffffff81ff8810 t program_clock_v6 +ffffffff81ff8930 t external_encoder_control_v3 +ffffffff81ff8ae0 t enable_disp_power_gating_v2_1 +ffffffff81ff8bb0 t set_dce_clock_v2_1 +ffffffff81ff9000 T dal_firmware_parser_init_cmd_tbl +ffffffff81ff93d0 t encoder_control_digx_v1_5 +ffffffff81ff95a0 t encoder_control_fallback +ffffffff81ff9600 t transmitter_control_v1_6 +ffffffff81ff97a0 t transmitter_control_v1_7 +ffffffff81ff9990 t transmitter_control_fallback +ffffffff81ff99f0 t set_pixel_clock_v7 +ffffffff81ff9c40 t set_pixel_clock_fallback +ffffffff81ff9ca0 t set_crtc_using_dtd_timing_v3 +ffffffff81ff9df0 t enable_crtc_v1 +ffffffff81ff9e90 t external_encoder_control_v3 +ffffffff81ff9ec0 t enable_disp_power_gating_v2_1 +ffffffff81ffa010 t enable_disp_power_gating_fallback +ffffffff81ffa070 t set_dce_clock_v2_1 +ffffffff81ffa1a0 t get_smu_clock_info_v3_1 +ffffffff81ffa210 t enable_lvtma_control +ffffffff81ffb000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81ffb0a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81ffb1c0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81ffb240 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81ffb2d0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81ffb390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81ffb470 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff81ffc000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff81ffc0b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff81ffc1c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81ffc240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81ffc2d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81ffc3b0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81ffd000 T dal_cmd_tbl_helper_dce110_get_table +ffffffff81ffd030 t encoder_action_to_atom +ffffffff81ffd0b0 t engine_bp_to_atom +ffffffff81ffd100 t clock_source_id_to_atom +ffffffff81ffd1a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81ffd1f0 t signal_type_to_atom_dig_mode +ffffffff81ffd250 t hpd_sel_to_atom +ffffffff81ffd290 t dig_encoder_sel_to_atom +ffffffff81ffd2c0 t phy_id_to_atom +ffffffff81ffd300 t disp_power_gating_action_to_atom +ffffffff81ffe000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff81ffe030 t encoder_action_to_atom ffffffff81ffe0b0 t engine_bp_to_atom ffffffff81ffe100 t clock_source_id_to_atom -ffffffff81ffe1a0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81ffe1f0 t signal_type_to_atom_dig_mode -ffffffff81ffe250 t hpd_sel_to_atom -ffffffff81ffe290 t dig_encoder_sel_to_atom -ffffffff81ffe2c0 t phy_id_to_atom -ffffffff81ffe300 t disp_power_gating_action_to_atom -ffffffff81fff000 T dal_cmd_tbl_helper_dce112_get_table2 +ffffffff81ffe1d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81ffe220 t signal_type_to_atom_dig_mode +ffffffff81ffe280 t hpd_sel_to_atom +ffffffff81ffe2c0 t dig_encoder_sel_to_atom +ffffffff81ffe2f0 t phy_id_to_atom +ffffffff81ffe330 t disp_power_gating_action_to_atom +ffffffff81ffe3a0 t dc_clock_type_to_atom +ffffffff81ffe420 t transmitter_color_depth_to_atom +ffffffff81fff000 T dal_cmd_tbl_helper_dce112_get_table ffffffff81fff030 t encoder_action_to_atom ffffffff81fff0b0 t engine_bp_to_atom ffffffff81fff100 t clock_source_id_to_atom @@ -31704,7 +31716,7 @@ ffffffff81fff2f0 t phy_id_to_atom ffffffff81fff330 t disp_power_gating_action_to_atom ffffffff81fff3a0 t dc_clock_type_to_atom ffffffff81fff420 t transmitter_color_depth_to_atom -ffffffff82000000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff82000000 T dal_cmd_tbl_helper_dce80_get_table ffffffff82000030 t encoder_action_to_atom ffffffff820000b0 t engine_bp_to_atom ffffffff82000100 t clock_source_id_to_atom @@ -31712,4358 +31724,4346 @@ ffffffff820001d0 t clock_source_id_to_atom_phy_clk_src ffffffff82000220 t signal_type_to_atom_dig_mode ffffffff82000280 t hpd_sel_to_atom ffffffff820002c0 t dig_encoder_sel_to_atom -ffffffff820002f0 t phy_id_to_atom -ffffffff82000330 t disp_power_gating_action_to_atom -ffffffff820003a0 t dc_clock_type_to_atom -ffffffff82000420 t transmitter_color_depth_to_atom -ffffffff82001000 T dal_cmd_tbl_helper_dce80_get_table -ffffffff82001030 t encoder_action_to_atom -ffffffff820010b0 t engine_bp_to_atom -ffffffff82001100 t clock_source_id_to_atom -ffffffff820011d0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff82001220 t signal_type_to_atom_dig_mode -ffffffff82001280 t hpd_sel_to_atom -ffffffff820012c0 t dig_encoder_sel_to_atom -ffffffff82001310 t phy_id_to_atom -ffffffff82001350 t disp_power_gating_action_to_atom -ffffffff82002000 T clk_mgr_helper_get_active_display_cnt -ffffffff820020e0 T clk_mgr_helper_get_active_plane_cnt -ffffffff82002190 T clk_mgr_exit_optimized_pwr_state -ffffffff820022a0 T clk_mgr_optimize_pwr_state -ffffffff82002390 T dc_clk_mgr_create -ffffffff82002a50 T dc_destroy_clk_mgr -ffffffff82003000 T dentist_get_divider_from_did -ffffffff82003070 T dce_adjust_dp_ref_freq_for_ss -ffffffff82003170 T dce_get_dp_ref_freq_khz -ffffffff820032a0 T dce12_get_dp_ref_freq_khz -ffffffff820032c0 T dce_get_max_pixel_clock_for_all_paths -ffffffff820034d0 T dce_get_required_clocks_state -ffffffff82003580 T dce_set_clock -ffffffff820036e0 T dce_clock_read_ss_info -ffffffff82003800 T dce_clk_mgr_construct -ffffffff820039f0 t dce_update_clocks -ffffffff82004000 T dce110_get_min_vblank_time_us -ffffffff82004090 T dce110_fill_display_configs -ffffffff82004300 T dce11_pplib_apply_display_requirements -ffffffff820045f0 T dce110_clk_mgr_construct -ffffffff820046a0 t dce11_update_clocks -ffffffff82005000 T dce112_set_clock -ffffffff82005180 T dce112_set_dispclk -ffffffff820052a0 T dce112_set_dprefclk -ffffffff82005310 T dce112_clk_mgr_construct -ffffffff820053c0 t dce112_update_clocks -ffffffff82006000 T dce120_clk_mgr_construct -ffffffff82006090 T dce121_clk_mgr_construct -ffffffff820061c0 t dce12_update_clocks -ffffffff82007000 T rv1_clk_mgr_construct -ffffffff820070c0 t rv1_update_clocks -ffffffff820075a0 t rv1_init_clocks -ffffffff82007630 t rv1_enable_pme_wa -ffffffff82008000 T rv1_vbios_smu_set_dispclk -ffffffff820080e0 t rv1_vbios_smu_send_msg_with_param -ffffffff820081f0 T rv1_vbios_smu_set_dprefclk -ffffffff82009000 T rv2_clk_mgr_construct -ffffffff8200a000 T dentist_get_did_from_divider -ffffffff8200a080 T dcn20_update_clocks_update_dpp_dto -ffffffff8200a150 T dcn20_update_clocks_update_dentist -ffffffff8200a640 T dcn2_update_clocks -ffffffff8200abc0 T dcn2_read_clocks_from_hw_dentist -ffffffff8200ac90 T dcn2_update_clocks_fpga -ffffffff8200adc0 T dcn2_init_clocks -ffffffff8200ae60 T dcn2_get_clock -ffffffff8200aed0 T dcn20_clk_mgr_construct -ffffffff8200b000 t dcn2_enable_pme_wa -ffffffff8200b050 t dcn2_are_clock_states_equal -ffffffff8200b0c0 t dcn2_notify_link_rate_change -ffffffff8200c000 T dcn201_clk_mgr_construct -ffffffff8200c120 t dcn201_update_clocks -ffffffff8200c340 t dcn201_init_clocks -ffffffff8200d000 T rn_clk_mgr_construct -ffffffff8200d8a0 t rn_update_clocks -ffffffff8200de60 t rn_set_low_power_state -ffffffff8200e040 t rn_init_clocks -ffffffff8200e0e0 t rn_enable_pme_wa -ffffffff8200e0f0 t rn_are_clock_states_equal -ffffffff8200e140 t rn_notify_wm_ranges -ffffffff8200e4d0 t rn_notify_link_rate_change -ffffffff8200f000 T rn_vbios_smu_get_smu_version -ffffffff8200f020 t rn_vbios_smu_send_msg_with_param -ffffffff8200f1b0 T rn_vbios_smu_set_dispclk -ffffffff8200f2d0 T rn_vbios_smu_set_dprefclk -ffffffff8200f340 T rn_vbios_smu_set_hard_min_dcfclk -ffffffff8200f3c0 T rn_vbios_smu_set_min_deep_sleep_dcfclk -ffffffff8200f440 T rn_vbios_smu_set_phyclk -ffffffff8200f480 T rn_vbios_smu_set_dppclk -ffffffff8200f530 T rn_vbios_smu_set_dcn_low_power_state -ffffffff8200f550 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn -ffffffff8200f570 T rn_vbios_smu_enable_pme_wa -ffffffff8200f590 T rn_vbios_smu_is_periodic_retraining_disabled -ffffffff82010000 T dcn3_init_clocks -ffffffff820103b0 t dcn3_init_clocks_fpga -ffffffff820103c0 T dcn3_clk_mgr_construct -ffffffff82010510 T dcn3_clk_mgr_destroy -ffffffff82010570 t dcn3_update_clocks -ffffffff82010990 t dcn3_enable_pme_wa -ffffffff820109d0 t dcn3_are_clock_states_equal -ffffffff82010a30 t dcn3_notify_wm_ranges -ffffffff82010cc0 t dcn30_notify_link_rate_change -ffffffff82010de0 t dcn3_set_hard_min_memclk -ffffffff82010e80 t dcn3_set_hard_max_memclk -ffffffff82010ee0 t dcn3_set_max_memclk -ffffffff82010f20 t dcn3_set_min_memclk -ffffffff82010f60 t dcn3_get_memclk_states_from_smu -ffffffff820110a0 t dcn3_is_smu_present -ffffffff82012000 T dcn30_smu_test_message -ffffffff82012070 t dcn30_smu_send_msg_with_param -ffffffff820121d0 T dcn30_smu_get_smu_version -ffffffff820121f0 T dcn30_smu_check_driver_if_version -ffffffff82012240 T dcn30_smu_check_msg_header_version -ffffffff82012290 T dcn30_smu_set_dram_addr_high -ffffffff820122b0 T dcn30_smu_set_dram_addr_low -ffffffff820122d0 T dcn30_smu_transfer_wm_table_smu_2_dram -ffffffff820122f0 T dcn30_smu_transfer_wm_table_dram_2_smu -ffffffff82012310 T dcn30_smu_set_hard_min_by_freq -ffffffff82012360 T dcn30_smu_set_hard_max_by_freq -ffffffff820123b0 T dcn30_smu_get_dpm_freq_by_index -ffffffff82012400 T dcn30_smu_get_dc_mode_max_dpm_freq -ffffffff82012450 T dcn30_smu_set_min_deep_sleep_dcef_clk -ffffffff82012470 T dcn30_smu_set_num_of_displays -ffffffff82012490 T dcn30_smu_set_display_refresh_from_mall -ffffffff820124c0 T dcn30_smu_set_external_client_df_cstate_allow -ffffffff820124e0 T dcn30_smu_set_pme_workaround -ffffffff82013000 T dcn301_smu_get_smu_version -ffffffff82013070 t dcn301_smu_send_msg_with_param -ffffffff820131f0 T dcn301_smu_set_dispclk -ffffffff82013290 T dcn301_smu_set_dprefclk -ffffffff82013340 T dcn301_smu_set_hard_min_dcfclk -ffffffff820133e0 T dcn301_smu_set_min_deep_sleep_dcfclk -ffffffff82013480 T dcn301_smu_set_dppclk -ffffffff82013520 T dcn301_smu_set_display_idle_optimization -ffffffff82013570 T dcn301_smu_enable_phy_refclk_pwrdwn -ffffffff820135c0 T dcn301_smu_enable_pme_wa -ffffffff820135e0 T dcn301_smu_set_dram_addr_high -ffffffff82013630 T dcn301_smu_set_dram_addr_low -ffffffff82013680 T dcn301_smu_transfer_dpm_table_smu_2_dram -ffffffff820136a0 T dcn301_smu_transfer_wm_table_dram_2_smu -ffffffff82014000 T vg_clk_mgr_construct -ffffffff82014840 T vg_clk_mgr_destroy -ffffffff82014890 t vg_update_clocks -ffffffff82014bd0 t vg_init_clocks -ffffffff82014c70 t vg_enable_pme_wa -ffffffff82014c80 t vg_are_clock_states_equal -ffffffff82014cd0 t vg_notify_wm_ranges -ffffffff82016000 T dcn31_update_clocks -ffffffff82016610 T dcn31_init_clocks -ffffffff820166c0 T dcn31_are_clock_states_equal -ffffffff82016720 T dcn31_get_dtb_ref_freq_khz -ffffffff82016750 T dcn31_clk_mgr_construct -ffffffff82016e20 T dcn31_clk_mgr_destroy -ffffffff82016e70 t dcn31_set_low_power_state -ffffffff82017080 t dcn31_enable_pme_wa -ffffffff82017090 t dcn31_notify_wm_ranges -ffffffff82017410 t find_clk_for_voltage -ffffffff82018000 T dcn31_smu_get_smu_version -ffffffff82018020 t dcn31_smu_send_msg_with_param -ffffffff82018230 T dcn31_smu_set_dispclk -ffffffff820182a0 T dcn31_smu_set_dprefclk -ffffffff82018310 T dcn31_smu_set_hard_min_dcfclk -ffffffff82018390 T dcn31_smu_set_min_deep_sleep_dcfclk -ffffffff82018410 T dcn31_smu_set_dppclk -ffffffff82018480 T dcn31_smu_set_display_idle_optimization -ffffffff820184d0 T dcn31_smu_enable_phy_refclk_pwrdwn -ffffffff82018520 T dcn31_smu_enable_pme_wa -ffffffff82018560 T dcn31_smu_set_dram_addr_high -ffffffff820185a0 T dcn31_smu_set_dram_addr_low -ffffffff820185e0 T dcn31_smu_transfer_dpm_table_smu_2_dram -ffffffff82018620 T dcn31_smu_transfer_wm_table_dram_2_smu -ffffffff82018660 T dcn31_smu_set_zstate_support -ffffffff820186d0 T dcn31_smu_set_dtbclk -ffffffff82019000 T dcn314_update_clocks -ffffffff82019650 T dcn314_are_clock_states_equal -ffffffff820196b0 T dcn314_clk_mgr_construct -ffffffff8201a3c0 T dcn314_clk_mgr_destroy -ffffffff8201a410 t dcn314_enable_pme_wa -ffffffff8201a420 t dcn314_notify_wm_ranges -ffffffff8201b000 T dcn314_smu_get_smu_version -ffffffff8201b020 t dcn314_smu_send_msg_with_param -ffffffff8201b250 T dcn314_smu_set_dispclk -ffffffff8201b2c0 T dcn314_smu_set_dprefclk -ffffffff8201b330 T dcn314_smu_set_hard_min_dcfclk -ffffffff8201b3b0 T dcn314_smu_set_min_deep_sleep_dcfclk -ffffffff8201b430 T dcn314_smu_set_dppclk -ffffffff8201b4a0 T dcn314_smu_set_display_idle_optimization -ffffffff8201b4f0 T dcn314_smu_enable_phy_refclk_pwrdwn -ffffffff8201b540 T dcn314_smu_enable_pme_wa -ffffffff8201b580 T dcn314_smu_set_dram_addr_high -ffffffff8201b5c0 T dcn314_smu_set_dram_addr_low -ffffffff8201b600 T dcn314_smu_transfer_dpm_table_smu_2_dram -ffffffff8201b640 T dcn314_smu_transfer_wm_table_dram_2_smu -ffffffff8201b680 T dcn314_smu_set_zstate_support -ffffffff8201b6d0 T dcn314_smu_set_dtbclk -ffffffff8201c000 T dcn315_clk_mgr_construct -ffffffff8201c810 T dcn315_clk_mgr_destroy -ffffffff8201c860 t dcn315_update_clocks -ffffffff8201cda0 t dcn315_enable_pme_wa -ffffffff8201cdb0 t dcn315_notify_wm_ranges -ffffffff8201d130 t dcn315_disable_otg_wa -ffffffff8201e000 T dcn315_smu_get_smu_version -ffffffff8201e020 t dcn315_smu_send_msg_with_param -ffffffff8201e310 T dcn315_smu_set_dispclk -ffffffff8201e380 T dcn315_smu_set_hard_min_dcfclk -ffffffff8201e400 T dcn315_smu_set_min_deep_sleep_dcfclk -ffffffff8201e480 T dcn315_smu_set_dppclk -ffffffff8201e4f0 T dcn315_smu_set_display_idle_optimization -ffffffff8201e540 T dcn315_smu_enable_phy_refclk_pwrdwn -ffffffff8201e590 T dcn315_smu_enable_pme_wa -ffffffff8201e5d0 T dcn315_smu_set_dram_addr_high -ffffffff8201e610 T dcn315_smu_set_dram_addr_low -ffffffff8201e650 T dcn315_smu_transfer_dpm_table_smu_2_dram -ffffffff8201e690 T dcn315_smu_transfer_wm_table_dram_2_smu -ffffffff8201e6d0 T dcn315_smu_get_dpref_clk -ffffffff8201e730 T dcn315_smu_get_dtbclk -ffffffff8201e790 T dcn315_smu_set_dtbclk -ffffffff8201f000 T dcn316_clk_mgr_construct -ffffffff8201f650 T dcn316_clk_mgr_destroy -ffffffff8201f6a0 t dcn316_update_clocks -ffffffff8201fcc0 t dcn316_enable_pme_wa -ffffffff8201fcd0 t dcn316_notify_wm_ranges -ffffffff82020050 t find_clk_for_voltage -ffffffff82021000 T dcn316_smu_get_smu_version -ffffffff82021020 t dcn316_smu_send_msg_with_param -ffffffff820211b0 T dcn316_smu_set_dispclk -ffffffff82021220 T dcn316_smu_set_hard_min_dcfclk -ffffffff820212a0 T dcn316_smu_set_min_deep_sleep_dcfclk -ffffffff82021320 T dcn316_smu_set_dppclk -ffffffff82021390 T dcn316_smu_set_display_idle_optimization -ffffffff820213e0 T dcn316_smu_enable_phy_refclk_pwrdwn -ffffffff82021430 T dcn316_smu_set_dram_addr_high -ffffffff82021470 T dcn316_smu_set_dram_addr_low -ffffffff820214b0 T dcn316_smu_transfer_dpm_table_smu_2_dram -ffffffff820214f0 T dcn316_smu_transfer_wm_table_dram_2_smu -ffffffff82021530 T dcn316_smu_enable_pme_wa -ffffffff82021570 T dcn316_smu_set_dtbclk -ffffffff820215b0 T dcn316_smu_get_dpref_clk -ffffffff82021610 T dcn316_smu_get_smu_fclk -ffffffff82022000 T dcn32_init_clocks -ffffffff82022560 T dcn32_update_clocks_update_dpp_dto -ffffffff820226a0 T dcn32_clk_mgr_construct -ffffffff82022940 t dcn32_dump_clk_registers -ffffffff82022b60 T dcn32_clk_mgr_destroy -ffffffff82022bc0 t dcn32_update_clocks -ffffffff82023420 t dcn32_enable_pme_wa -ffffffff82023460 t dcn32_are_clock_states_equal -ffffffff820234d0 t dcn32_notify_wm_ranges -ffffffff82023650 t dcn32_set_hard_min_memclk -ffffffff820236e0 t dcn32_set_hard_max_memclk -ffffffff82023730 t dcn32_set_max_memclk -ffffffff82023770 t dcn32_set_min_memclk -ffffffff820237b0 t dcn32_get_memclk_states_from_smu -ffffffff82023a00 t dcn32_is_smu_present -ffffffff82023a30 t dcn32_get_dispclk_from_dentist -ffffffff82023ac0 t dcn32_update_clocks_update_dentist -ffffffff82024000 T dcn32_smu_send_fclk_pstate_message -ffffffff82024020 t dcn32_smu_send_msg_with_param -ffffffff82024160 T dcn32_smu_send_cab_for_uclk_message -ffffffff82024190 T dcn32_smu_transfer_wm_table_dram_2_smu -ffffffff820241b0 T dcn32_smu_set_pme_workaround -ffffffff820241d0 T dcn32_smu_set_hard_min_by_freq -ffffffff82024220 T dcn32_smu_wait_for_dmub_ack_mclk -ffffffff82025000 T dc_stream_adjust_vmin_vmax -ffffffff82025170 T dc_stream_get_last_used_drr_vtotal -ffffffff820252d0 T dc_stream_get_crtc_position -ffffffff82025500 T dc_stream_configure_crc -ffffffff82025670 T dc_stream_get_crc -ffffffff82025750 T dc_stream_set_dyn_expansion -ffffffff820259c0 T dc_stream_set_dither_option -ffffffff82025b60 T dc_stream_set_gamut_remap -ffffffff82025ce0 T dc_stream_program_csc_matrix -ffffffff82025f00 T dc_stream_set_static_screen_params -ffffffff82026080 T dc_create -ffffffff82026600 t dc_construct_ctx -ffffffff82026770 t dc_destruct -ffffffff82026a40 T dc_hardware_init -ffffffff82026b10 T dc_init_callbacks -ffffffff82026b60 T dc_deinit_callbacks -ffffffff82026bb0 T dc_destroy -ffffffff82026c00 T dc_validate_boot_timing -ffffffff82026fa0 T dc_enable_stereo -ffffffff820270a0 T dc_trigger_sync -ffffffff820276d0 T dc_z10_restore -ffffffff82027710 T dc_z10_save_init -ffffffff82027750 T dc_commit_streams -ffffffff82027c30 t commit_minimal_transition_state -ffffffff82028060 T dc_create_state -ffffffff820280f0 t dc_commit_state_no_check -ffffffff82029780 T dc_release_state -ffffffff820297e0 T dc_acquire_release_mpc_3dlut -ffffffff820298b0 T dc_post_update_surfaces_to_stream -ffffffff82029cc0 T dc_copy_state -ffffffff82029e90 T dc_retain_state -ffffffff82029ec0 T dc_set_generic_gpio_for_stereo -ffffffff82029fd0 T dc_check_update_surfaces_for_stream -ffffffff8202a9b0 T dc_dmub_update_dirty_rect -ffffffff8202abc0 T dc_update_planes_and_stream -ffffffff8202b740 t fast_update_only -ffffffff8202baa0 t commit_planes_for_stream_fast -ffffffff8202bec0 t commit_planes_for_stream -ffffffff8202d440 T dc_commit_updates_for_stream -ffffffff8202da60 t copy_surface_update_to_plane -ffffffff8202de70 t copy_stream_update_to_stream -ffffffff8202e510 T dc_get_current_stream_count -ffffffff8202e550 T dc_get_stream_at_index -ffffffff8202e5a0 T dc_interrupt_to_irq_source -ffffffff8202e5c0 T dc_interrupt_set -ffffffff8202e610 T dc_interrupt_ack -ffffffff8202e630 T dc_power_down_on_boot -ffffffff8202e680 T dc_set_power_state -ffffffff8202e860 T dc_resume -ffffffff8202e8e0 T dc_is_dmcu_initialized -ffffffff8202e930 T get_clock_requirements_for_state -ffffffff8202e9b0 T dc_set_clock -ffffffff8202e9f0 T dc_get_clock -ffffffff8202ea30 T dc_set_psr_allow_active -ffffffff8202eb30 T dc_allow_idle_optimizations -ffffffff8202ebd0 T dc_unlock_memory_clock_frequency -ffffffff8202ec40 T dc_lock_memory_clock_frequency -ffffffff8202ecd0 T dc_enable_dcmode_clk_limit -ffffffff8202ee90 t blank_and_force_memclk -ffffffff8202f070 T dc_is_plane_eligible_for_idle_optimizations -ffffffff8202f0c0 T dc_hardware_release -ffffffff8202f110 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down -ffffffff8202f150 T dc_is_dmub_outbox_supported -ffffffff8202f1c0 T dc_enable_dmub_notifications -ffffffff8202f230 T dc_enable_dmub_outbox -ffffffff8202f270 T dc_process_dmub_aux_transfer_async -ffffffff8202f3f0 T get_link_index_from_dpia_port_index -ffffffff8202f4a0 T dc_process_dmub_set_config_async -ffffffff8202f580 T dc_process_dmub_set_mst_slots -ffffffff8202f670 T dc_process_dmub_dpia_hpd_int_enable -ffffffff8202f730 T dc_print_dmub_diagnostic_data -ffffffff8202f750 T dc_disable_accelerated_mode -ffffffff8202f770 T dc_notify_vsync_int_state -ffffffff8202f990 T dc_abm_save_restore -ffffffff8202fb60 T dc_query_current_properties -ffffffff8202fbd0 T dc_set_edp_power -ffffffff8202fc40 t create_links -ffffffff820300a0 t create_link_encoders -ffffffff82030180 t dc_update_viusal_confirm_color -ffffffff82031000 T pre_surface_trace -ffffffff82031030 T update_surface_trace -ffffffff82031060 T post_surface_trace -ffffffff82031090 T context_timing_trace -ffffffff82031240 T context_clock_trace -ffffffff82031270 T dc_status_to_str -ffffffff82032000 T find_color_matrix -ffffffff820320b0 T color_space_to_black_color -ffffffff82032120 T hwss_wait_for_blank_complete -ffffffff820321c0 T get_mpctree_visual_confirm_color -ffffffff82032220 T get_surface_visual_confirm_color -ffffffff820322d0 T get_hdr_visual_confirm_color -ffffffff82032390 T get_subvp_visual_confirm_color -ffffffff82032490 T hwss_build_fast_sequence -ffffffff82032b50 T hwss_execute_sequence -ffffffff82032f40 T hwss_setup_dpp -ffffffff82032fe0 T hwss_program_bias_and_scale -ffffffff82033060 T hwss_program_manual_trigger -ffffffff820330b0 T hwss_power_on_mpc_mem_pwr -ffffffff82033100 T hwss_set_output_csc -ffffffff82033150 T hwss_set_ocsc_default -ffffffff820331a0 T hwss_send_dmcub_cmd -ffffffff820331c0 T get_mclk_switch_visual_confirm_color -ffffffff82033320 T get_surface_tile_visual_confirm_color -ffffffff82034000 T link_enc_cfg_init -ffffffff820341b0 T link_enc_cfg_copy -ffffffff820341e0 T link_enc_cfg_link_encs_assign -ffffffff820355a0 T link_enc_cfg_validate -ffffffff82035d40 T link_enc_cfg_link_enc_unassign -ffffffff82035ed0 T link_enc_cfg_is_transmitter_mappable -ffffffff82035ff0 T link_enc_cfg_get_stream_using_link_enc -ffffffff820360f0 T link_enc_cfg_get_link_using_link_enc -ffffffff82036200 T link_enc_cfg_get_link_enc_used_by_link -ffffffff82036380 T link_enc_cfg_get_next_avail_link_enc -ffffffff820364f0 T link_enc_cfg_get_link_enc_used_by_stream -ffffffff82036510 T link_enc_cfg_get_link_enc -ffffffff820365a0 T link_enc_cfg_get_link_enc_used_by_stream_current -ffffffff82036720 T link_enc_cfg_is_link_enc_avail -ffffffff82036920 T link_enc_cfg_set_transient_mode -ffffffff82037000 T dc_get_link_at_index -ffffffff82037030 T dc_get_edp_links -ffffffff820370b0 T dc_get_edp_link_panel_inst -ffffffff82037170 T dc_link_detect -ffffffff820371a0 T dc_link_detect_connection_type -ffffffff820371d0 T dc_link_get_status -ffffffff82037200 T dc_link_is_hdcp14 -ffffffff82037230 T dc_link_is_hdcp22 -ffffffff82037260 T dc_link_clear_dprx_states -ffffffff82037290 T dc_link_reset_cur_dp_mst_topology -ffffffff820372c0 T dc_link_bandwidth_kbps -ffffffff820372f0 T dc_get_cur_link_res_map -ffffffff82037310 T dc_restore_link_res_map -ffffffff82037330 T dc_link_update_dsc_config -ffffffff82037360 T dc_is_oem_i2c_device_present -ffffffff820373b0 T dc_submit_i2c -ffffffff820373e0 T dc_submit_i2c_oem -ffffffff82037430 T dc_link_dp_handle_automated_test -ffffffff82037460 T dc_link_dp_set_test_pattern -ffffffff82037490 T dc_link_set_drive_settings -ffffffff82037520 T dc_link_set_preferred_link_settings -ffffffff82037540 T dc_link_set_preferred_training_settings -ffffffff82037570 T dc_dp_trace_is_initialized -ffffffff820375a0 T dc_dp_trace_set_is_logged_flag -ffffffff820375d0 T dc_dp_trace_is_logged -ffffffff82037600 T dc_dp_trace_get_lt_end_timestamp -ffffffff82037630 T dc_dp_trace_get_lt_counts -ffffffff82037660 T dc_dp_trace_get_link_loss_count -ffffffff82037690 T dc_link_add_remote_sink -ffffffff820376c0 T dc_link_remove_remote_sink -ffffffff820376f0 T dc_link_aux_transfer_raw -ffffffff82037720 T dc_link_bw_kbps_from_raw_frl_link_rate_data -ffffffff82037740 T dc_link_decide_edp_link_settings -ffffffff82037770 T dc_link_dp_get_max_link_enc_cap -ffffffff820377a0 T dc_link_dp_mst_decide_link_encoding_format -ffffffff820377d0 T dc_link_get_link_cap -ffffffff82037800 T dc_link_get_highest_encoding_format -ffffffff820378c0 T dc_link_is_dp_sink_present -ffffffff820378f0 T dc_link_is_fec_supported -ffffffff82037920 T dc_link_overwrite_extended_receiver_cap -ffffffff82037950 T dc_link_should_enable_fec -ffffffff82037980 T dc_link_dp_dpia_handle_usb4_bandwidth_allocation_for_link -ffffffff820379b0 T dc_link_handle_usb4_bw_alloc_response -ffffffff820379e0 T dc_link_check_link_loss_status -ffffffff82037a10 T dc_link_dp_allow_hpd_rx_irq -ffffffff82037a40 T dc_link_dp_handle_link_loss -ffffffff82037a70 T dc_link_dp_read_hpd_rx_irq_data -ffffffff82037aa0 T dc_link_handle_hpd_rx_irq -ffffffff82037ad0 T dc_link_dp_receiver_power_ctrl -ffffffff82037b00 T dc_link_decide_lttpr_mode -ffffffff82037b30 T dc_link_edp_panel_backlight_power_on -ffffffff82037b60 T dc_link_get_backlight_level -ffffffff82037b90 T dc_link_get_backlight_level_nits -ffffffff82037bc0 T dc_link_set_backlight_level -ffffffff82037bf0 T dc_link_set_backlight_level_nits -ffffffff82037c20 T dc_link_get_target_backlight_pwm -ffffffff82037c50 T dc_link_get_psr_state -ffffffff82037c80 T dc_link_set_psr_allow_active -ffffffff82037cb0 T dc_link_setup_psr -ffffffff82037ce0 T dc_link_get_replay_state -ffffffff82037d10 T dc_link_wait_for_t12 -ffffffff82037d40 T dc_link_get_hpd_state -ffffffff82037d70 T dc_link_enable_hpd -ffffffff82037da0 T dc_link_disable_hpd -ffffffff82037dd0 T dc_link_enable_hpd_filter -ffffffff82037e00 T dc_link_dp_dpia_validate -ffffffff82038000 T resource_parse_asic_id -ffffffff82038250 T dc_create_resource_pool -ffffffff82038550 T dc_destroy_resource_pool -ffffffff820385c0 T resource_construct -ffffffff82038aa0 T resource_unreference_clock_source -ffffffff82038b20 T resource_reference_clock_source -ffffffff82038ba0 T resource_get_clock_source_reference -ffffffff82038c20 T resource_are_vblanks_synchronizable -ffffffff82038e40 T resource_are_streams_timing_synchronizable -ffffffff82038f30 T resource_find_used_clk_src_for_sharing -ffffffff82039060 T resource_get_num_mpc_splits -ffffffff820390f0 T resource_get_num_odm_splits -ffffffff820391b0 T resource_get_otg_master -ffffffff82039250 T resource_build_scaling_params -ffffffff82039fe0 t calculate_odm_slice_in_timing_active -ffffffff8203a160 T resource_build_scaling_params_for_context -ffffffff8203a2b0 T resource_find_free_secondary_pipe_legacy -ffffffff8203a350 T resource_find_free_pipe_used_in_cur_mpc_blending_tree -ffffffff8203a3c0 T resource_is_pipe_type -ffffffff8203a440 T recource_find_free_pipe_not_used_in_cur_res_ctx -ffffffff8203a4c0 T resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine -ffffffff8203a5e0 T resource_is_for_mpcc_combine -ffffffff8203a670 T resource_find_any_free_pipe -ffffffff8203a6e0 T resource_get_otg_master_for_stream -ffffffff8203a810 T resource_get_opp_head -ffffffff8203a8a0 T dc_add_plane_to_context -ffffffff8203ab60 T dc_remove_plane_from_context -ffffffff8203ad40 T dc_rem_all_planes_for_stream -ffffffff8203af00 T dc_add_all_planes_for_stream -ffffffff8203b080 T dc_is_timing_changed -ffffffff8203b0e0 T dc_is_stream_unchanged -ffffffff8203b1c0 T dc_is_stream_scaling_unchanged -ffffffff8203b260 T update_audio_usage -ffffffff8203b2d0 T dc_add_stream_to_ctx -ffffffff8203b3a0 T dc_remove_stream_from_ctx -ffffffff8203b7b0 T resource_map_pool_resources -ffffffff8203c210 t acquire_first_split_pipe -ffffffff8203c380 t add_hpo_dp_link_enc_to_ctx -ffffffff8203c450 t find_first_free_audio -ffffffff8203c500 T dc_resource_state_copy_construct_current -ffffffff8203c520 T dc_resource_state_copy_construct -ffffffff8203c6c0 T dc_resource_state_construct -ffffffff8203c6e0 T dc_resource_is_dsc_encoding_supported -ffffffff8203c730 T dc_validate_with_context -ffffffff8203d360 t planes_changed_for_existing_stream -ffffffff8203d4e0 T dc_validate_global_state -ffffffff8203d860 T dc_resource_state_destruct -ffffffff8203d940 T dc_resource_find_first_free_pll -ffffffff8203d9b0 T resource_build_info_frame -ffffffff8203e0e0 T resource_map_clock_resources -ffffffff8203e270 T pipe_need_reprogram -ffffffff8203e3e0 T resource_build_bit_depth_reduction_params -ffffffff8203e610 T dc_validate_stream -ffffffff8203e7e0 T dc_validate_plane -ffffffff8203e870 T resource_pixel_format_to_bpp -ffffffff8203e8f0 T get_audio_check -ffffffff8203ea10 T get_temp_dp_link_res -ffffffff8203eb20 T reset_syncd_pipes_from_disabled_pipes -ffffffff8203ec70 T check_syncd_pipes_for_disabled_master_pipe -ffffffff8203edb0 T reset_sync_context_for_pipe -ffffffff8203ee60 T resource_transmitter_to_phy_idx -ffffffff8203eec0 T get_link_hwss -ffffffff8203ef50 T is_h_timing_divisible_by_2 -ffffffff8203efb0 T dc_resource_acquire_secondary_pipe_for_mpc_odm -ffffffff8203f1c0 T update_dp_encoder_resources_for_test_harness -ffffffff8203f480 t calculate_plane_rec_in_timing_active -ffffffff8203f750 t calculate_init_and_vp -ffffffff82040000 T dc_sink_retain -ffffffff82040030 T dc_sink_release -ffffffff820400a0 T dc_sink_create -ffffffff82041000 T dc_stat_get_dmub_notification -ffffffff820410b0 T dc_stat_get_dmub_dataout -ffffffff82042000 T update_stream_signal -ffffffff82042080 T dc_stream_retain -ffffffff820420b0 T dc_stream_release -ffffffff82042130 T dc_create_stream_for_sink -ffffffff82042470 T dc_copy_stream -ffffffff82042540 T dc_stream_get_status_from_state -ffffffff820425a0 T dc_stream_get_status -ffffffff82042610 T dc_optimize_timing_for_fsft -ffffffff82042660 T dc_stream_set_cursor_attributes -ffffffff82042860 t program_cursor_attributes -ffffffff820429c0 T dc_stream_set_cursor_position -ffffffff82042ae0 t program_cursor_position -ffffffff82042c20 T dc_stream_add_writeback -ffffffff82042e30 T dc_stream_remove_writeback -ffffffff82042f60 T dc_stream_warmup_writeback -ffffffff82042fa0 T dc_stream_get_vblank_counter -ffffffff82043070 T dc_stream_send_dp_sdp -ffffffff82043300 T dc_stream_get_scanoutpos -ffffffff820433e0 T dc_stream_dmdata_status_done -ffffffff820434a0 T dc_stream_set_dynamic_metadata -ffffffff82043600 T dc_stream_add_dsc_to_resource -ffffffff82043650 T dc_stream_get_pipe_ctx -ffffffff82043700 T dc_stream_log -ffffffff82044000 T enable_surface_flip_reporting -ffffffff82044030 T dc_create_plane_state -ffffffff820441d0 T dc_plane_get_status -ffffffff82044350 T dc_plane_state_retain -ffffffff82044380 T dc_plane_state_release -ffffffff820444d0 T dc_gamma_retain -ffffffff82044500 T dc_gamma_release -ffffffff82044560 T dc_create_gamma -ffffffff820445b0 T dc_transfer_func_retain -ffffffff820445e0 T dc_transfer_func_release -ffffffff82044630 T dc_create_transfer_func -ffffffff82044680 T dc_create_3dlut_func -ffffffff820446e0 T dc_3dlut_func_release -ffffffff82044730 T dc_3dlut_func_retain -ffffffff82045000 T vm_helper_mark_vmid_used -ffffffff82045030 T dc_setup_system_context -ffffffff820450c0 T dc_setup_vm_context -ffffffff820450f0 T dc_get_vmid_use_vector -ffffffff82045150 T vm_helper_init -ffffffff82046000 T dc_dmub_srv_create -ffffffff820460a0 T dc_dmub_srv_destroy -ffffffff820460f0 T dc_dmub_srv_wait_idle -ffffffff82046150 T dc_dmub_srv_log_diagnostic_data -ffffffff82046690 T dc_dmub_srv_clear_inbox0_ack -ffffffff820466f0 T dc_dmub_srv_wait_for_inbox0_ack -ffffffff82046750 T dc_dmub_srv_send_inbox0_cmd -ffffffff820467b0 T dc_dmub_srv_cmd_run -ffffffff820467d0 T dc_dmub_srv_cmd_run_list -ffffffff82046980 T dc_dmub_srv_optimized_init_done -ffffffff82046a00 T dc_dmub_srv_notify_stream_mask -ffffffff82046a60 T dc_dmub_srv_is_restore_required -ffffffff82046ae0 T dc_dmub_srv_get_dmub_outbox0_msg -ffffffff82046b10 T dc_dmub_trace_event_control -ffffffff82046b30 T dc_dmub_srv_drr_update_cmd -ffffffff82046bc0 T dc_dmub_srv_set_drr_manual_trigger_cmd -ffffffff82046c50 T dc_dmub_srv_p_state_delegate -ffffffff82047000 T dc_dmub_srv_query_caps_cmd -ffffffff820470c0 T dc_dmub_srv_get_visual_confirm_color_cmd -ffffffff820471a0 T dc_dmub_setup_subvp_dmub_command -ffffffff82047bb0 T dc_dmub_srv_get_diagnostic_data -ffffffff82047bf0 T dc_send_update_cursor_info_to_dmu -ffffffff82047f60 T dc_dmub_check_min_version -ffffffff82047fa0 T dc_dmub_srv_enable_dpia_trace -ffffffff82049000 T dc_edid_parser_send_cea -ffffffff820490b0 T dc_edid_parser_recv_cea_ack -ffffffff82049140 T dc_edid_parser_recv_amd_vsdb -ffffffff8204a000 T generic_reg_update_ex -ffffffff8204a330 t set_reg_field_values -ffffffff8204a4e0 T generic_reg_set_ex -ffffffff8204a6d0 T generic_reg_get -ffffffff8204a740 T generic_reg_get2 -ffffffff8204a7d0 T generic_reg_get3 -ffffffff8204a870 T generic_reg_get4 -ffffffff8204a920 T generic_reg_get5 -ffffffff8204a9e0 T generic_reg_get6 -ffffffff8204aac0 T generic_reg_get7 -ffffffff8204abb0 T generic_reg_get8 -ffffffff8204acc0 T generic_reg_wait -ffffffff8204af10 T generic_write_indirect_reg -ffffffff8204af60 T generic_read_indirect_reg -ffffffff8204b000 T generic_indirect_reg_get -ffffffff8204b1b0 T generic_indirect_reg_update_ex -ffffffff8204b3c0 T generic_indirect_reg_update_ex_sync -ffffffff8204b5b0 T generic_indirect_reg_get_sync -ffffffff8204b6e0 T reg_sequence_start_gather -ffffffff8204b770 T reg_sequence_start_execute -ffffffff8204b910 T reg_sequence_wait_done -ffffffff8204b970 T dce_version_to_string -ffffffff8204c000 T dce_abm_create -ffffffff8204c0b0 T dce_abm_destroy -ffffffff8204c100 t dce_abm_init -ffffffff8204c380 t dce_abm_set_level -ffffffff8204c480 t dce_abm_immediate_disable -ffffffff8204c4d0 t dce_abm_set_pipe -ffffffff8204c620 t dce_abm_set_backlight_level_pwm -ffffffff8204c810 t dce_abm_get_current_backlight -ffffffff8204c840 t dce_abm_get_target_backlight -ffffffff8204d000 T dce_aud_az_enable -ffffffff8204d150 T dce_aud_az_disable -ffffffff8204d340 T dce_aud_az_configure -ffffffff8204dfc0 t check_audio_bandwidth -ffffffff8204e150 T dce_aud_wall_dto_setup -ffffffff8204e2d0 T dce_aud_hw_init -ffffffff8204e4a0 T dce_aud_destroy -ffffffff8204e4f0 T dce_audio_create -ffffffff8204e5b0 t dce_aud_endpoint_valid -ffffffff8204f000 T dce110_engine_destroy -ffffffff8204f050 T dce110_aux_engine_construct -ffffffff8204f0d0 t dce_aux_configure_timeout -ffffffff8204f2b0 T dce_aux_transfer_raw -ffffffff8204fae0 t acquire -ffffffff8204fd50 T dce_aux_transfer_dmub_raw -ffffffff8204fe50 T dce_aux_transfer_with_retries -ffffffff82051000 T look_up_in_video_optimized_rate_tlb -ffffffff82051070 T dce110_clk_src_construct -ffffffff82051270 t calc_pll_max_vco_construct -ffffffff82051410 T dce112_clk_src_construct -ffffffff820514a0 T dcn20_clk_src_construct -ffffffff82051550 T dcn3_clk_src_construct -ffffffff82051600 T dcn31_clk_src_construct -ffffffff820516b0 T dcn301_clk_src_construct -ffffffff82051760 t dce110_clock_source_power_down -ffffffff820517f0 t dce110_program_pix_clk -ffffffff82051e80 t dce110_get_pix_clk_dividers -ffffffff82052500 t get_pixel_clk_frequency_100hz -ffffffff82052610 t get_ss_info_from_atombios -ffffffff820528e0 t dce112_program_pix_clk -ffffffff82052af0 t dce112_get_pix_clk_dividers -ffffffff82052c00 t dcn20_program_pix_clk -ffffffff82052c90 t dcn20_override_dp_pix_clk -ffffffff82052d80 t dcn3_program_pix_clk -ffffffff82052f30 t dcn3_get_pix_clk_dividers -ffffffff82053000 t dcn31_program_pix_clk -ffffffff82054000 T dce_dmcu_create -ffffffff820540c0 T dcn10_dmcu_create -ffffffff82054180 T dcn20_dmcu_create -ffffffff82054240 T dcn21_dmcu_create -ffffffff82054330 T dce_dmcu_destroy -ffffffff82054380 t dce_dmcu_init -ffffffff820543b0 t dce_dmcu_load_iram -ffffffff82054510 t dce_dmcu_set_psr_enable -ffffffff82054640 t dce_dmcu_setup_psr -ffffffff82054970 t dce_get_dmcu_psr_state -ffffffff82054a50 t dce_psr_wait_loop -ffffffff82054b80 t dce_get_psr_wait_loop -ffffffff82054bb0 t dce_is_dmcu_initialized -ffffffff82054c10 t dcn10_dmcu_init -ffffffff82055150 t dcn10_dmcu_load_iram -ffffffff82055390 t dcn10_dmcu_set_psr_enable -ffffffff82055520 t dcn10_dmcu_setup_psr -ffffffff820558e0 t dcn10_get_dmcu_psr_state -ffffffff82055a00 t dcn10_psr_wait_loop -ffffffff82055b10 t dcn10_get_psr_wait_loop -ffffffff82055b40 t dcn10_is_dmcu_initialized -ffffffff82055b70 t dcn10_send_edid_cea -ffffffff82055d10 t dcn10_recv_amd_vsdb -ffffffff82055dc0 t dcn10_recv_edid_cea_ack -ffffffff82055e40 t dcn10_get_scp_results -ffffffff82055f60 t dcn20_lock_phy -ffffffff82056090 t dcn20_unlock_phy -ffffffff820561c0 t dcn21_dmcu_init -ffffffff82057000 T dce_enable_fe_clock -ffffffff82057040 T dce_pipe_control_lock -ffffffff82057240 T dce_set_blender_mode -ffffffff82057350 T dce_clock_gating_power_up -ffffffff820573f0 T dce_crtc_switch_to_clk_src -ffffffff820575b0 T dce_use_lut -ffffffff82058000 T dce_i2c_oem_device_present -ffffffff82058080 T dce_i2c_submit_command -ffffffff82059000 T acquire_i2c_hw_engine -ffffffff820593a0 T dce_i2c_submit_command_hw -ffffffff82059ce0 t set_speed -ffffffff82059e30 T dce_i2c_hw_construct -ffffffff82059ea0 T dce100_i2c_hw_construct -ffffffff82059f10 T dce112_i2c_hw_construct -ffffffff82059f80 T dcn1_i2c_hw_construct -ffffffff82059ff0 T dcn2_i2c_hw_construct -ffffffff8205a080 t is_hw_busy -ffffffff8205b000 T dce_i2c_sw_construct -ffffffff8205b030 T dce_i2c_engine_acquire_sw -ffffffff8205b0d0 T dce_i2c_submit_command_sw -ffffffff8205b8a0 t write_byte_sw -ffffffff8205c000 T dce_ipp_construct -ffffffff8205c050 T dce_ipp_destroy -ffffffff8205c0a0 t dce_ipp_cursor_set_position -ffffffff8205c1d0 t dce_ipp_cursor_set_attributes -ffffffff8205c460 t dce_ipp_program_prescale -ffffffff8205c620 t dce_ipp_program_input_lut -ffffffff8205ca90 t dce_ipp_set_degamma -ffffffff8205d000 T dce110_get_dig_frontend -ffffffff8205d0c0 T dce110_link_encoder_set_dp_phy_pattern_training_pattern -ffffffff8205d160 T dce110_psr_program_dp_dphy_fast_training -ffffffff8205d1d0 T dce110_psr_program_secondary_packet -ffffffff8205d240 T dce110_is_dig_enabled -ffffffff8205d2a0 T dce110_link_encoder_validate_dvi_output -ffffffff8205d350 T dce110_link_encoder_validate_dp_output -ffffffff8205d380 T dce110_link_encoder_construct -ffffffff8205d550 T dce110_link_encoder_validate_output_with_stream -ffffffff8205d700 T dce110_link_encoder_hw_init -ffffffff8205d920 T dce110_link_encoder_destroy -ffffffff8205d970 T dce110_link_encoder_setup -ffffffff8205daa0 T dce110_link_encoder_enable_tmds_output -ffffffff8205db90 T dce110_link_encoder_enable_lvds_output -ffffffff8205dc80 T dce110_link_encoder_enable_dp_output -ffffffff8205dde0 T dce110_link_encoder_enable_dp_mst_output -ffffffff8205df40 T dce110_link_encoder_disable_output -ffffffff8205e150 T dce110_link_encoder_dp_set_lane_settings -ffffffff8205e2f0 T dce110_link_encoder_dp_set_phy_pattern -ffffffff8205eaf0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 -ffffffff8205ed10 T dce110_link_encoder_update_mst_stream_allocation_table -ffffffff8205ef80 T dce110_link_encoder_connect_dig_be_to_fe -ffffffff8205f0b0 T dce110_link_encoder_enable_hpd -ffffffff8205f0e0 T dce110_link_encoder_disable_hpd -ffffffff8205f110 T dce110_link_encoder_get_max_link_cap -ffffffff82060000 T dce_mem_input_construct -ffffffff82060060 T dce112_mem_input_construct -ffffffff820600c0 T dce120_mem_input_construct -ffffffff82060120 t dce_mi_program_display_marks -ffffffff820603f0 t dce_mi_allocate_dmif -ffffffff82060630 t dce_mi_free_dmif -ffffffff82060790 t dce_mi_program_surface_flip_and_addr -ffffffff82060ab0 t dce_mi_program_pte_vm -ffffffff82060c70 t dce_mi_program_surface_config -ffffffff820614f0 t dce_mi_is_flip_pending -ffffffff82061580 t program_nbp_watermark -ffffffff82061780 t dce112_mi_program_display_marks -ffffffff82061c90 t dce120_mi_program_display_marks -ffffffff82062150 t dce120_program_stutter_watermark -ffffffff82063000 T dce110_opp_set_clamping -ffffffff820632b0 T dce110_opp_program_bit_depth_reduction -ffffffff82063a80 T dce110_opp_program_clamping_and_pixel_encoding -ffffffff82063c20 T dce110_opp_set_dyn_expansion -ffffffff82063d70 T dce110_opp_program_fmt -ffffffff82063ef0 T dce110_opp_construct -ffffffff82063f50 T dce110_opp_destroy -ffffffff82064000 T dce_panel_cntl_construct -ffffffff82064060 t dce_panel_cntl_destroy -ffffffff820640b0 t dce_panel_cntl_hw_init -ffffffff820642f0 t dce_is_panel_backlight_on -ffffffff820643a0 t dce_is_panel_powered_on -ffffffff82064450 t dce_store_backlight_level -ffffffff820644f0 t dce_driver_set_backlight -ffffffff82064670 t dce_get_16_bit_backlight_from_pwm -ffffffff82065000 T get_filter_3tap_16p -ffffffff82065090 T get_filter_3tap_64p -ffffffff82065120 T get_filter_4tap_16p -ffffffff820651b0 T get_filter_4tap_64p -ffffffff82065240 T get_filter_5tap_64p -ffffffff820652d0 T get_filter_6tap_64p -ffffffff82065360 T get_filter_7tap_64p -ffffffff820653f0 T get_filter_8tap_64p -ffffffff82065480 T get_filter_2tap_16p -ffffffff820654b0 T get_filter_2tap_64p -ffffffff82066000 T dce110_se_audio_mute_control -ffffffff82066050 T dce110_se_dp_audio_setup -ffffffff82066060 t dce110_se_audio_setup -ffffffff820661c0 T dce110_se_dp_audio_enable -ffffffff82066400 T dce110_se_dp_audio_disable -ffffffff82066560 T dce110_se_hdmi_audio_setup -ffffffff82066a60 T dce110_se_hdmi_audio_disable -ffffffff82066ac0 T dce110_stream_encoder_construct -ffffffff82066b10 t dce110_stream_encoder_dp_set_stream_attribute -ffffffff82067160 t dce110_stream_encoder_hdmi_set_stream_attribute -ffffffff82067690 t dce110_stream_encoder_dvi_set_stream_attribute -ffffffff820677c0 t dce110_stream_encoder_lvds_set_stream_attribute -ffffffff820678a0 t dce110_stream_encoder_set_throttled_vcp_size -ffffffff82067aa0 t dce110_stream_encoder_update_hdmi_info_packets -ffffffff82068190 t dce110_stream_encoder_stop_hdmi_info_packets -ffffffff82068430 t dce110_stream_encoder_update_dp_info_packets -ffffffff820685c0 t dce110_stream_encoder_stop_dp_info_packets -ffffffff82068730 t dce110_stream_encoder_dp_blank -ffffffff82068870 t dce110_stream_encoder_dp_unblank -ffffffff82068a30 t setup_stereo_sync -ffffffff82068ab0 t dce110_stream_encoder_set_avmute -ffffffff82068af0 t dig_connect_to_otg -ffffffff82068b30 t dce110_reset_hdmi_stream_attribute -ffffffff82068c30 t dig_source_otg -ffffffff82068ca0 t dce110_stream_encoder_set_stream_attribute_helper -ffffffff82068d90 t dce110_update_generic_info_packet -ffffffff8206a000 T dce_transform_get_optimal_number_of_taps -ffffffff8206a300 T dce110_opp_set_csc_adjustment -ffffffff8206a3c0 t program_color_matrix -ffffffff8206a5f0 T dce110_opp_set_csc_default -ffffffff8206a730 T dce110_opp_program_regamma_pwl -ffffffff8206afe0 T dce110_opp_power_on_regamma_lut -ffffffff8206b0a0 T dce110_opp_set_regamma_mode -ffffffff8206b110 T dce_transform_construct -ffffffff8206b190 t dce_transform_reset -ffffffff8206b1d0 t dce_transform_set_scaler -ffffffff8206bc70 t dce_transform_set_pixel_storage_depth -ffffffff8206c120 t dce_transform_set_gamut_remap -ffffffff8206c460 t program_multi_taps_filter -ffffffff8206d000 T dmub_abm_create -ffffffff8206d0d0 T dmub_abm_destroy -ffffffff8206d120 t dmub_abm_init_ex -ffffffff8206d130 t dmub_abm_set_level_ex -ffffffff8206d1e0 t dmub_abm_set_backlight_level_pwm_ex -ffffffff8206d280 t dmub_abm_get_current_backlight_ex -ffffffff8206d290 t dmub_abm_get_target_backlight_ex -ffffffff8206d2a0 t dmub_abm_init_config_ex -ffffffff8206d330 t dmub_abm_set_pause_ex -ffffffff8206d3d0 t dmub_abm_save_restore_ex -ffffffff8206d460 t dmub_abm_set_pipe_ex -ffffffff8206e000 T dmub_abm_init -ffffffff8206e3c0 T dmub_abm_get_current_backlight -ffffffff8206e3f0 T dmub_abm_get_target_backlight -ffffffff8206e420 T dmub_abm_set_level -ffffffff8206e4b0 T dmub_abm_init_config -ffffffff8206e5b0 T dmub_abm_set_pause -ffffffff8206e650 T dmub_abm_save_restore -ffffffff8206e770 T dmub_abm_set_pipe -ffffffff8206e810 T dmub_abm_set_backlight_level -ffffffff8206f000 T dmub_hw_lock_mgr_cmd -ffffffff8206f0a0 T dmub_hw_lock_mgr_inbox0_cmd -ffffffff8206f0e0 T should_use_dmub_lock -ffffffff82070000 T dmub_enable_outbox_notification -ffffffff82071000 T dmub_psr_create -ffffffff82071090 T dmub_psr_destroy -ffffffff820710e0 t dmub_psr_copy_settings -ffffffff820715d0 t dmub_psr_enable -ffffffff82071750 t dmub_psr_get_state -ffffffff82071a60 t dmub_psr_set_level -ffffffff82071b30 t dmub_psr_force_static -ffffffff82071bd0 t dmub_psr_get_residency -ffffffff82071c20 t dmub_psr_set_sink_vtotal_in_psr_active -ffffffff82071cc0 t dmub_psr_set_power_opt -ffffffff82072000 T dmub_replay_create -ffffffff82072090 T dmub_replay_destroy -ffffffff820720e0 t dmub_replay_get_state -ffffffff820721d0 t dmub_replay_enable -ffffffff820723f0 t dmub_replay_copy_settings -ffffffff820726b0 t dmub_replay_set_power_opt -ffffffff82072750 t dmub_replay_set_coasting_vtotal -ffffffff820727e0 t dmub_replay_residency -ffffffff82073000 T dce100_enable_display_power_gating -ffffffff820730a0 T dce100_prepare_bandwidth -ffffffff820730f0 T dce100_optimize_bandwidth -ffffffff82073140 T dce100_hw_sequencer_construct -ffffffff82074000 T dce100_add_stream_to_ctx -ffffffff820740a0 T dce100_validate_plane -ffffffff820740e0 T dce100_find_first_free_match_stream_enc_for_link -ffffffff82074190 T dce100_create_resource_pool -ffffffff82074f60 t dce100_resource_destruct -ffffffff82075220 t dce100_destroy_resource_pool -ffffffff82075280 t dce100_panel_cntl_create -ffffffff82075310 t dce100_link_encoder_create -ffffffff82075410 t dce100_validate_bandwidth -ffffffff82075550 t dce100_validate_global -ffffffff820755f0 t read_dce_straps -ffffffff82075660 t create_audio -ffffffff82075690 t dce100_stream_encoder_create -ffffffff82075730 t dce100_hwseq_create -ffffffff82076000 T dce110_compressor_power_up_fbc -ffffffff82076130 T dce110_compressor_enable_fbc -ffffffff82076340 T dce110_compressor_is_fbc_enabled_in_hw -ffffffff820763f0 T dce110_compressor_disable_fbc -ffffffff820766c0 T dce110_compressor_program_compressed_surface_address_and_pitch -ffffffff820767e0 T dce110_compressor_set_fbc_invalidation_triggers -ffffffff82076860 T dce110_compressor_create -ffffffff82076900 T dce110_compressor_construct -ffffffff82076980 T dce110_compressor_destroy -ffffffff820769d0 T get_max_support_fbc_buffersize -ffffffff82077000 T dce110_update_info_frame -ffffffff820770f0 T dce110_enable_stream -ffffffff82077190 T dce110_edp_wait_for_hpd_ready -ffffffff820773f0 T dce110_edp_power_control -ffffffff82077950 T dce110_edp_wait_for_T12 -ffffffff82077b00 T dce110_edp_backlight_control -ffffffff82077e60 T dce110_enable_audio_stream -ffffffff82077f20 T dce110_disable_audio_stream -ffffffff82077fe0 T dce110_disable_stream -ffffffff82078240 T dce110_unblank_stream -ffffffff82078340 T dce110_blank_stream -ffffffff820784b0 T dce110_set_avmute -ffffffff82078500 T dce110_enable_accelerated_mode -ffffffff820788b0 t power_down_all_hw_blocks -ffffffff82078a80 T dce110_set_safe_displaymarks -ffffffff82078ba0 T dce110_apply_ctx_to_hw -ffffffff820794a0 t enable_fbc -ffffffff82079660 T dce110_power_down -ffffffff82079750 T dce110_prepare_bandwidth -ffffffff820798a0 T dce110_optimize_bandwidth -ffffffff82079aa0 T dce110_set_backlight_level -ffffffff82079bb0 T dce110_set_abm_immediate_disable -ffffffff82079c30 T dce110_set_pipe -ffffffff82079ca0 T dce110_enable_lvds_link_output -ffffffff82079d00 T dce110_enable_tmds_link_output -ffffffff82079d70 T dce110_enable_dp_link_output -ffffffff82079fa0 T dce110_disable_link_output -ffffffff8207a090 T dce110_hw_sequencer_construct -ffffffff8207a0e0 t enable_display_pipe_clock_gating -ffffffff8207a110 t build_audio_output -ffffffff8207a270 t init_hw -ffffffff8207a510 t dce110_power_down_fe -ffffffff8207a5e0 t dce110_apply_ctx_for_surface -ffffffff8207ad20 t dce110_post_unlock_program_front_end -ffffffff8207ad50 t update_plane_addr -ffffffff8207adc0 t dce110_wait_for_mpcc_disconnect -ffffffff8207adf0 t dce110_update_pending_status -ffffffff8207aed0 t get_position -ffffffff8207af60 t dce110_enable_per_frame_crtc_position_reset -ffffffff8207b200 t dce110_enable_timing_synchronization -ffffffff8207b4f0 t set_drr -ffffffff8207b5d0 t set_static_screen_control -ffffffff8207b6a0 t dce110_set_cursor_position -ffffffff8207b7f0 t dce110_set_cursor_attribute -ffffffff8207b8b0 t program_gamut_remap -ffffffff8207ba00 t program_output_csc -ffffffff8207bb00 t init_pipes -ffffffff8207bb30 t dce110_reset_hw_ctx_wrap -ffffffff8207bd90 t dce110_set_input_transfer_func -ffffffff8207bf20 t dce110_set_output_transfer_func -ffffffff8207c830 t dce110_enable_display_power_gating -ffffffff8207c990 t dce110_enable_stream_timing -ffffffff8207d000 T dce110_mem_input_v_construct -ffffffff8207d040 t dce_mem_input_v_program_display_marks -ffffffff8207d0c0 t dce_mem_input_program_chroma_display_marks -ffffffff8207d140 t dce110_allocate_mem_input_v -ffffffff8207d250 t dce110_free_mem_input_v -ffffffff8207d280 t dce_mem_input_v_program_surface_flip_and_addr -ffffffff8207d3d0 t dce_mem_input_v_program_pte_vm -ffffffff8207d6a0 t dce_mem_input_v_program_surface_config -ffffffff8207da70 t dce_mem_input_v_is_surface_pending -ffffffff8207dae0 t program_urgency_watermark -ffffffff8207dbf0 t program_nbp_watermark -ffffffff8207dd60 t program_stutter_watermark -ffffffff8207e000 T dce110_opp_v_set_csc_default -ffffffff8207e300 t program_color_matrix_v -ffffffff8207e470 t configure_graphics_mode_v -ffffffff8207e560 T dce110_opp_v_set_csc_adjustment -ffffffff8207f000 T dce110_opp_program_regamma_pwl_v -ffffffff8207f4b0 t power_on_lut -ffffffff8207f5d0 T dce110_opp_power_on_regamma_lut_v -ffffffff8207f630 T dce110_opp_set_regamma_mode_v -ffffffff82080000 T dce110_opp_v_construct -ffffffff82081000 T dce110_resource_build_pipe_hw_param -ffffffff82081150 T dce110_find_first_free_match_stream_enc_for_link -ffffffff820811f0 T dce110_create_resource_pool -ffffffff82082190 t dce110_resource_destruct -ffffffff820824b0 t dce110_destroy_resource_pool -ffffffff82082510 t dce110_panel_cntl_create -ffffffff820825a0 t dce110_link_encoder_create -ffffffff820826a0 t dce110_validate_bandwidth -ffffffff82082790 t dce110_validate_global -ffffffff82082870 t dce110_acquire_underlay -ffffffff82082a50 t dce110_validate_plane -ffffffff82082ab0 t dce110_add_stream_to_ctx -ffffffff82082b80 t read_dce_straps -ffffffff82082bf0 t create_audio -ffffffff82082c20 t dce110_stream_encoder_create -ffffffff82082cc0 t dce110_hwseq_create -ffffffff82083000 T dce110_timing_generator_set_early_control -ffffffff82083070 T dce110_timing_generator_enable_crtc -ffffffff82083100 T dce110_timing_generator_program_blank_color -ffffffff82083190 T dce110_timing_generator_disable_crtc -ffffffff820831e0 T dce110_timing_generator_program_timing_generator -ffffffff820833d0 T dce110_timing_generator_set_drr -ffffffff82083510 T dce110_timing_generator_set_static_screen_control -ffffffff820835a0 T dce110_timing_generator_get_vblank_counter -ffffffff82083600 T dce110_timing_generator_get_position -ffffffff820836a0 T dce110_timing_generator_get_crtc_scanoutpos -ffffffff82083790 T dce110_timing_generator_program_blanking -ffffffff82083a00 T dce110_timing_generator_set_test_pattern -ffffffff82083cf0 T dce110_timing_generator_validate_timing -ffffffff82083db0 T dce110_timing_generator_wait_for_vblank -ffffffff82083f20 T dce110_timing_generator_is_counter_moving -ffffffff82083fa0 T dce110_timing_generator_wait_for_vactive -ffffffff82084080 T dce110_timing_generator_setup_global_swap_lock -ffffffff820841e0 T dce110_timing_generator_tear_down_global_swap_lock -ffffffff82084260 T dce110_timing_generator_enable_advanced_request -ffffffff82084300 T dce110_timing_generator_set_lock_master -ffffffff82084360 T dce110_timing_generator_enable_reset_trigger -ffffffff82084450 T dce110_timing_generator_enable_crtc_reset -ffffffff82084640 T dce110_timing_generator_disable_reset_trigger -ffffffff82084730 T dce110_timing_generator_did_triggered_reset_occur -ffffffff820847c0 T dce110_timing_generator_disable_vga -ffffffff82084820 T dce110_timing_generator_set_overscan_color_black -ffffffff820848c0 T dce110_tg_program_blank_color -ffffffff82084980 T dce110_tg_set_overscan_color -ffffffff820849e0 T dce110_tg_program_timing -ffffffff82084a10 T dce110_tg_is_blanked -ffffffff82084a70 T dce110_tg_set_blank -ffffffff82084ad0 T dce110_tg_validate_timing -ffffffff82084b90 T dce110_tg_wait_for_state -ffffffff82084c90 T dce110_tg_set_colors -ffffffff82084de0 T dce110_arm_vert_intr -ffffffff82084eb0 T dce110_configure_crc -ffffffff82085010 t dce110_is_tg_enabled -ffffffff82085070 T dce110_get_crc -ffffffff82085140 T dce110_timing_generator_construct -ffffffff82086000 T dce110_timing_generator_v_construct -ffffffff82086070 t dce110_timing_generator_v_program_timing -ffffffff82086340 t dce110_timing_generator_v_enable_crtc -ffffffff820863d0 t dce110_timing_generator_v_disable_crtc -ffffffff82086440 t dce110_timing_generator_v_is_counter_moving -ffffffff820864c0 t dce110_timing_generator_v_get_vblank_counter -ffffffff82086510 t dce110_timing_generator_v_set_early_control -ffffffff82086570 t dce110_timing_generator_v_wait_for_state -ffffffff82086700 t dce110_timing_generator_v_set_blank -ffffffff82086790 t dce110_timing_generator_v_set_overscan_color_black -ffffffff82086830 t dce110_timing_generator_v_program_blank_color -ffffffff820868b0 t dce110_timing_generator_v_set_colors -ffffffff820869e0 t dce110_timing_generator_v_disable_vga -ffffffff82086a10 t dce110_timing_generator_v_did_triggered_reset_occur -ffffffff82086a50 t dce110_timing_generator_v_setup_global_swap_lock -ffffffff82086a70 t dce110_timing_generator_v_enable_reset_trigger -ffffffff82086a90 t dce110_timing_generator_v_disable_reset_trigger -ffffffff82086ab0 t dce110_timing_generator_v_tear_down_global_swap_lock -ffffffff82086ad0 t dce110_timing_generator_v_enable_advanced_request -ffffffff82087000 T dce110_transform_v_construct -ffffffff82087060 t dce110_xfmv_reset -ffffffff820870c0 t dce110_xfmv_set_scaler -ffffffff82087800 t dce110_xfmv_set_pixel_storage_depth -ffffffff820878e0 t dce110_xfmv_set_gamut_remap -ffffffff82087910 t program_multi_taps_filter -ffffffff82087d00 t program_viewport -ffffffff82088000 T dce112_compressor_power_up_fbc -ffffffff82088130 T dce112_compressor_enable_fbc -ffffffff820882e0 T dce112_compressor_is_fbc_enabled_in_hw -ffffffff82088390 T dce112_compressor_enable_lpt -ffffffff820884b0 t wait_for_fbc_state_changed -ffffffff82088750 T dce112_compressor_disable_fbc -ffffffff82088850 T dce112_compressor_disable_lpt -ffffffff820889b0 T dce112_compressor_is_lpt_enabled_in_hw -ffffffff82088a00 T dce112_compressor_program_compressed_surface_address_and_pitch -ffffffff82088b40 T dce112_compressor_program_lpt_control -ffffffff82088db0 T dce112_compressor_set_fbc_invalidation_triggers -ffffffff82088e40 T dce112_compressor_construct -ffffffff82088f00 T dce112_compressor_create -ffffffff82088ff0 T dce112_compressor_destroy -ffffffff8208a000 T dce112_hw_sequencer_construct -ffffffff8208a050 t dce112_enable_display_power_gating -ffffffff8208b000 T dce112_validate_bandwidth -ffffffff8208b0c0 T resource_map_phy_clock_resources -ffffffff8208b230 T dce112_add_stream_to_ctx -ffffffff8208b2d0 T dce112_create_resource_pool -ffffffff8208c620 t dce112_resource_destruct -ffffffff8208c8e0 t dce112_destroy_resource_pool -ffffffff8208c940 t dce112_panel_cntl_create -ffffffff8208c9d0 t dce112_link_encoder_create -ffffffff8208cad0 t dce112_validate_global -ffffffff8208cb70 t read_dce_straps -ffffffff8208cbe0 t create_audio -ffffffff8208cc10 t dce112_stream_encoder_create -ffffffff8208ccb0 t dce112_hwseq_create -ffffffff8208d000 T dce121_xgmi_enabled -ffffffff8208d060 T dce120_hw_sequencer_construct -ffffffff8208d0c0 t dce120_enable_display_power_gating -ffffffff8208d0f0 t dce120_update_dchub -ffffffff8208e000 T dce120_create_resource_pool -ffffffff8208f320 t dce120_resource_destruct -ffffffff8208f600 t dce120_destroy_resource_pool -ffffffff8208f660 t dce120_panel_cntl_create -ffffffff8208f6f0 t dce120_link_encoder_create -ffffffff8208f7f0 t read_dce_straps -ffffffff8208f880 t create_audio -ffffffff8208f8b0 t dce120_stream_encoder_create -ffffffff8208f950 t dce121_hwseq_create -ffffffff8208f9c0 t dce120_hwseq_create -ffffffff82090000 T dce120_timing_generator_construct -ffffffff82090090 t dce120_tg_validate_timing -ffffffff82090140 t dce120_tg_program_timing -ffffffff82090310 t dce120_timing_generator_enable_crtc -ffffffff820903b0 t dce120_timing_generator_get_crtc_position -ffffffff82090450 t dce120_timing_generator_get_vblank_counter -ffffffff820904b0 t dce120_timing_generator_get_crtc_scanoutpos -ffffffff820905a0 t dce120_timing_generator_set_early_control -ffffffff820905e0 t dce120_tg_wait_for_state -ffffffff820906f0 t dce120_tg_set_blank -ffffffff820907b0 t dce120_tg_is_blanked -ffffffff82090810 t dce120_timing_generator_set_overscan_color_black -ffffffff820908e0 t dce120_timing_generator_program_blank_color -ffffffff82090960 t dce120_tg_set_colors -ffffffff82090a80 t dce120_timing_generator_disable_vga -ffffffff82090af0 t dce120_timing_generator_did_triggered_reset_occur -ffffffff82090b50 t dce120_timing_generator_setup_global_swap_lock -ffffffff82090c80 t dce120_timing_generator_enable_reset_trigger -ffffffff82090d90 t dce120_timing_generator_disable_reset_trigger -ffffffff82090e40 t dce120_timing_generator_tear_down_global_swap_lock -ffffffff82090f10 t dce120_timing_generator_enable_advanced_request -ffffffff82090fb0 t dce120_timing_generator_set_drr -ffffffff82091180 t dce120_timing_generator_set_static_screen_control -ffffffff82091200 t dce120_timing_generator_set_test_pattern -ffffffff820916a0 t dce120_arm_vert_intr -ffffffff82091760 t dce120_is_tg_enabled -ffffffff820917c0 t dce120_configure_crc -ffffffff820919a0 t dce120_get_crc -ffffffff82092000 T dce80_hw_sequencer_construct -ffffffff82093000 T dce80_create_resource_pool -ffffffff82093e10 T dce81_create_resource_pool -ffffffff82094c10 T dce83_create_resource_pool -ffffffff820958f0 t dce80_resource_destruct -ffffffff82095ba0 t dce80_destroy_resource_pool -ffffffff82095c00 t dce80_panel_cntl_create -ffffffff82095c90 t dce80_link_encoder_create -ffffffff82095d90 t dce80_validate_bandwidth -ffffffff82095ed0 t dce80_validate_global -ffffffff82095f70 t read_dce_straps -ffffffff82095fe0 t create_audio -ffffffff82096010 t dce80_stream_encoder_create -ffffffff820960b0 t dce80_hwseq_create -ffffffff82097000 T dce80_timing_generator_construct -ffffffff82097090 t program_timing -ffffffff82097170 t dce80_timing_generator_enable_advanced_request -ffffffff82098000 T cm_helper_program_color_matrices -ffffffff820980c0 T cm_helper_program_xfer_func -ffffffff82098480 T cm_helper_convert_to_custom_float -ffffffff820988d0 T cm_helper_translate_curve_to_hw_format -ffffffff82099490 T cm_helper_translate_curve_to_degamma_hw_format -ffffffff8209a000 T dpp_read_state -ffffffff8209a270 T dpp1_get_optimal_number_of_taps -ffffffff8209a410 T dpp_reset -ffffffff8209a460 T dpp1_cnv_setup -ffffffff8209a980 T dpp1_set_cursor_attributes -ffffffff8209aab0 T dpp1_set_cursor_position -ffffffff8209ac00 T dpp1_cnv_set_optional_cursor_attributes -ffffffff8209acc0 T dpp1_dppclk_control -ffffffff8209adc0 T dpp1_construct -ffffffff8209ae40 t dpp1_cm_set_regamma_pwl -ffffffff8209b000 T dpp1_cm_set_gamut_remap -ffffffff8209b1a0 T dpp1_cm_set_output_csc_default -ffffffff8209b220 t dpp1_cm_program_color_matrix -ffffffff8209b3e0 T dpp1_cm_set_output_csc_adjustment -ffffffff8209b3f0 T dpp1_cm_power_on_regamma_lut -ffffffff8209b470 T dpp1_cm_program_regamma_lut -ffffffff8209b680 T dpp1_cm_configure_regamma_lut -ffffffff8209b780 T dpp1_cm_program_regamma_luta_settings -ffffffff8209b920 T dpp1_cm_program_regamma_lutb_settings -ffffffff8209bac0 T dpp1_program_input_csc -ffffffff8209bd10 T dpp1_program_bias_and_scale -ffffffff8209be80 T dpp1_program_degamma_lutb_settings -ffffffff8209c030 T dpp1_program_degamma_luta_settings -ffffffff8209c1e0 T dpp1_power_on_degamma_lut -ffffffff8209c260 T dpp1_set_degamma -ffffffff8209c450 T dpp1_degamma_ram_select -ffffffff8209c4b0 T dpp1_program_degamma_lut -ffffffff8209c7d0 T dpp1_set_degamma_pwl -ffffffff8209c9a0 T dpp1_full_bypass -ffffffff8209cb40 T dpp1_program_input_lut -ffffffff8209d1e0 T dpp1_set_hdr_multiplier -ffffffff8209e000 T dpp1_dscl_calc_lb_num_partitions -ffffffff8209e1e0 T dpp1_dscl_is_lb_conf_valid -ffffffff8209e220 T dpp1_dscl_set_scaler_manual_scale -ffffffff8209f640 t dpp1_dscl_get_filter_coeffs_64p -ffffffff8209f710 t dpp1_dscl_set_scaler_filter -ffffffff820a0000 t dwb1_get_caps -ffffffff820a00a0 t dwb1_enable -ffffffff820a01a0 t dwb1_disable -ffffffff820a0300 T dcn10_dwbc_construct -ffffffff820a1000 T hubbub1_wm_read_state -ffffffff820a1320 T hubbub1_allow_self_refresh_control -ffffffff820a13a0 T hubbub1_is_allow_self_refresh_enabled -ffffffff820a1410 T hubbub1_verify_allow_pstate_change_high -ffffffff820a15d0 T hubbub1_wm_change_req_wa -ffffffff820a1670 T hubbub1_program_urgent_watermarks -ffffffff820a1a50 T hubbub1_program_stutter_watermarks -ffffffff820a1eb0 T hubbub1_program_pstate_watermarks -ffffffff820a2100 T hubbub1_program_watermarks -ffffffff820a2230 T hubbub1_update_dchub -ffffffff820a2460 T hubbub1_toggle_watermark_change_req -ffffffff820a2500 T hubbub1_soft_reset -ffffffff820a2540 T hubbub1_construct -ffffffff820a25a0 t hubbub1_get_dcc_compression_cap -ffffffff820a27c0 t hubbub1_dcc_support_swizzle -ffffffff820a2850 t hubbub1_dcc_support_pixel_format -ffffffff820a3000 T hubp1_set_blank -ffffffff820a3110 T hubp1_clear_underflow -ffffffff820a3160 T hubp1_vready_workaround -ffffffff820a31f0 T hubp1_program_tiling -ffffffff820a3450 T hubp1_program_size -ffffffff820a35d0 T hubp1_program_rotation -ffffffff820a3740 T hubp1_program_pixel_format -ffffffff820a3d10 T hubp1_program_surface_flip_and_addr -ffffffff820a4590 T hubp1_dcc_control -ffffffff820a4650 T hubp1_program_surface_config -ffffffff820a4760 T hubp1_program_requestor -ffffffff820a4b30 T hubp1_program_deadline -ffffffff820a5240 T hubp1_is_flip_pending -ffffffff820a5350 T min_set_viewport -ffffffff820a5650 T hubp1_read_state_common -ffffffff820a6340 T hubp1_read_state -ffffffff820a6610 T hubp1_get_cursor_pitch -ffffffff820a66b0 T hubp1_cursor_set_attributes -ffffffff820a6960 T hubp1_cursor_set_position -ffffffff820a6cc0 T hubp1_clk_cntl -ffffffff820a6d10 T hubp1_vtg_sel -ffffffff820a6d50 T hubp1_in_blank -ffffffff820a6dc0 T hubp1_soft_reset -ffffffff820a6e00 T hubp1_set_flip_int -ffffffff820a6e50 T hubp1_init -ffffffff820a6e80 T dcn10_hubp_construct -ffffffff820a6ef0 t hubp1_setup -ffffffff820a6fb0 t hubp1_setup_interdependent -ffffffff820a7330 t hubp1_set_vm_system_aperture_settings -ffffffff820a7550 t hubp1_set_vm_context0_settings -ffffffff820a7830 t hubp1_set_hubp_blank_en -ffffffff820a7870 t hubp1_disconnect -ffffffff820a7900 t hubp1_disable_control -ffffffff820a7940 t hubp1_get_underflow_status -ffffffff820a79b0 t hubp1_wait_pipe_read_start -ffffffff820a8000 T dcn10_lock_all_pipes -ffffffff820a8130 T dcn10_log_hw_state -ffffffff820a9c10 T dcn10_did_underflow_occur -ffffffff820a9cb0 T dcn10_enable_power_gating_plane -ffffffff820a9e50 T dcn10_disable_vga -ffffffff820aa040 T dcn10_dpp_pg_control -ffffffff820aa290 T dcn10_hubp_pg_control -ffffffff820aa4e0 T dcn10_bios_golden_init -ffffffff820aa640 T dcn10_enable_stream_timing -ffffffff820aaa40 T dcn10_verify_allow_pstate_change_high -ffffffff820aad90 T dcn10_plane_atomic_disconnect -ffffffff820aaec0 T dcn10_plane_atomic_power_down -ffffffff820ab020 T dcn10_plane_atomic_disable -ffffffff820ab160 T dcn10_disable_plane -ffffffff820ab300 T dcn10_init_pipes -ffffffff820ab9c0 T dcn10_init_hw -ffffffff820abeb0 T dcn10_power_down_on_boot -ffffffff820ac000 T dcn10_reset_hw_ctx_wrap -ffffffff820ac340 T dcn10_update_plane_addr -ffffffff820ac460 T dcn10_set_input_transfer_func -ffffffff820ac5d0 T dcn10_set_output_transfer_func -ffffffff820ac6b0 T dcn10_pipe_control_lock -ffffffff820ac780 T dcn10_cursor_lock -ffffffff820ac940 T dcn10_enable_vblanks_synchronization -ffffffff820ad120 T dcn10_enable_timing_synchronization -ffffffff820ad520 T dcn10_enable_per_frame_crtc_position_reset -ffffffff820ad6f0 T dcn10_program_gamut_remap -ffffffff820ad8f0 T dcn10_program_output_csc -ffffffff820ada20 T dcn10_update_visual_confirm_color -ffffffff820adaa0 T dcn10_update_mpcc -ffffffff820add50 T dcn10_blank_pixel_data -ffffffff820ade90 T dcn10_set_hdr_multiplier -ffffffff820adf20 T dcn10_program_pipe -ffffffff820aeac0 T dcn10_wait_for_pending_cleared -ffffffff820aebc0 T dcn10_post_unlock_program_front_end -ffffffff820aee60 T dcn10_prepare_bandwidth -ffffffff820af000 T dcn10_optimize_bandwidth -ffffffff820af1a0 T dcn10_set_drr -ffffffff820af2a0 T dcn10_get_position -ffffffff820af330 T dcn10_set_static_screen_control -ffffffff820af3d0 T dcn10_setup_stereo -ffffffff820af520 T dcn10_wait_for_mpcc_disconnect -ffffffff820af6d0 T dcn10_dummy_display_power_gating -ffffffff820af700 T dcn10_update_pending_status -ffffffff820af840 T dcn10_update_dchub -ffffffff820af870 T dcn10_set_cursor_position -ffffffff820afdb0 T dcn10_set_cursor_attribute -ffffffff820afe00 T dcn10_set_cursor_sdr_white_level -ffffffff820afec0 T dcn10_get_vupdate_offset_from_vsync -ffffffff820aff50 T dcn10_calc_vupdate_position -ffffffff820affe0 T dcn10_setup_periodic_interrupt -ffffffff820b00f0 T dcn10_setup_vupdate_interrupt -ffffffff820b01b0 T dcn10_unblank_stream -ffffffff820b02c0 T dcn10_send_immediate_sdp_message -ffffffff820b0320 T dcn10_set_clock -ffffffff820b0430 T dcn10_get_clock -ffffffff820b0490 T dcn10_get_dcc_en_bits -ffffffff820b1000 T snprintf_count -ffffffff820b1090 T dcn10_clear_status_bits -ffffffff820b1240 T dcn10_get_hw_state -ffffffff820b3000 T dcn10_hw_sequencer_construct -ffffffff820b4000 T dcn10_ipp_construct -ffffffff820b4050 T dcn20_ipp_construct -ffffffff820b40a0 t dcn10_ipp_destroy -ffffffff820b5000 T dcn10_link_encoder_set_dp_phy_pattern_training_pattern -ffffffff820b50b0 T dcn10_get_dig_frontend -ffffffff820b5170 T enc1_configure_encoder -ffffffff820b51f0 T dcn10_psr_program_dp_dphy_fast_training -ffffffff820b5270 T dcn10_psr_program_secondary_packet -ffffffff820b52f0 T dcn10_is_dig_enabled -ffffffff820b5350 T dcn10_link_encoder_validate_dvi_output -ffffffff820b5400 T dcn10_link_encoder_validate_dp_output -ffffffff820b5440 T dcn10_link_encoder_construct -ffffffff820b5620 T dcn10_link_encoder_validate_output_with_stream -ffffffff820b5820 T dcn10_link_encoder_hw_init -ffffffff820b5a20 T dcn10_aux_initialize -ffffffff820b5ab0 T dcn10_link_encoder_destroy -ffffffff820b5b00 T dcn10_link_encoder_setup -ffffffff820b5c50 T dcn10_link_encoder_enable_tmds_output -ffffffff820b5d40 T dcn10_link_encoder_enable_tmds_output_with_clk_pattern_wa -ffffffff820b5e60 T dcn10_link_encoder_enable_dp_output -ffffffff820b5fc0 T dcn10_link_encoder_enable_dp_mst_output -ffffffff820b6120 T dcn10_link_encoder_disable_output -ffffffff820b62f0 T dcn10_link_encoder_dp_set_lane_settings -ffffffff820b6490 T dcn10_link_encoder_dp_set_phy_pattern -ffffffff820b6bb0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 -ffffffff820b6db0 T dcn10_link_encoder_update_mst_stream_allocation_table -ffffffff820b7080 T dcn10_link_encoder_connect_dig_be_to_fe -ffffffff820b71c0 T dcn10_link_encoder_enable_hpd -ffffffff820b7200 T dcn10_link_encoder_disable_hpd -ffffffff820b7240 T dcn10_get_dig_mode -ffffffff820b72b0 T dcn10_link_encoder_get_max_link_cap -ffffffff820b7330 t program_pattern_symbols -ffffffff820b8000 T mpc1_set_bg_color -ffffffff820b81e0 T mpc1_get_mpcc -ffffffff820b8270 T mpc1_update_stereo_mix -ffffffff820b8390 T mpc1_assert_idle_mpcc -ffffffff820b8460 T mpc1_get_mpcc_for_dpp -ffffffff820b8510 T mpc1_is_mpcc_idle -ffffffff820b8600 T mpc1_assert_mpcc_idle_before_connect -ffffffff820b8740 T mpc1_insert_plane -ffffffff820b8ce0 T mpc1_remove_mpcc -ffffffff820b90a0 T mpc1_mpc_init -ffffffff820b93c0 T mpc1_mpc_init_single_inst -ffffffff820b95b0 T mpc1_init_mpcc_list_from_hw -ffffffff820b9880 T mpc1_read_mpcc_state -ffffffff820b9a10 T mpc1_cursor_lock -ffffffff820b9a90 T mpc1_get_mpc_out_mux -ffffffff820b9b10 T dcn10_mpc_construct -ffffffff820b9c90 t mpc1_update_blending -ffffffff820ba000 T opp1_program_bit_depth_reduction -ffffffff820ba400 T opp1_set_dyn_expansion -ffffffff820ba570 T opp1_program_fmt -ffffffff820ba870 T opp1_program_stereo -ffffffff820ba960 T opp1_pipe_clock_control -ffffffff820ba9a0 T opp1_destroy -ffffffff820ba9f0 T dcn10_opp_construct -ffffffff820bb000 T optc1_program_global_sync -ffffffff820bb150 T optc1_setup_vertical_interrupt0 -ffffffff820bb1e0 T optc1_setup_vertical_interrupt1 -ffffffff820bb250 T optc1_setup_vertical_interrupt2 -ffffffff820bb2c0 T optc1_program_timing -ffffffff820bb9a0 T optc1_is_two_pixels_per_containter -ffffffff820bb9f0 T optc1_set_vtg_params -ffffffff820bbb20 T optc1_set_blank_data_double_buffer -ffffffff820bbb60 T optc1_set_timing_double_buffer -ffffffff820bbba0 T optc1_set_blank -ffffffff820bbc70 T optc1_is_blanked -ffffffff820bbcf0 T optc1_enable_optc_clock -ffffffff820bbf10 T optc1_disable_crtc -ffffffff820bc000 T optc1_program_blank_color -ffffffff820bc0b0 T optc1_validate_timing -ffffffff820bc1b0 T optc1_get_vblank_counter -ffffffff820bc210 T optc1_lock -ffffffff820bc2f0 T optc1_unlock -ffffffff820bc360 T optc1_get_position -ffffffff820bc3f0 T optc1_is_counter_moving -ffffffff820bc470 T optc1_did_triggered_reset_occur -ffffffff820bc510 T optc1_disable_reset_trigger -ffffffff820bc5d0 T optc1_enable_reset_trigger -ffffffff820bc6e0 T optc1_enable_crtc_reset -ffffffff820bc840 T optc1_wait_for_state -ffffffff820bc910 T optc1_set_early_control -ffffffff820bc940 T optc1_set_static_screen_control -ffffffff820bc9e0 T optc1_set_drr -ffffffff820bcb80 T optc1_set_vtotal_min_max -ffffffff820bcc20 T optc1_get_crtc_scanoutpos -ffffffff820bcd30 T optc1_program_stereo -ffffffff820bcf40 T optc1_is_stereo_left_eye -ffffffff820bcfb0 T optc1_get_hw_timing -ffffffff820bd0c0 T optc1_read_otg_state -ffffffff820bd3d0 T optc1_get_otg_active_size -ffffffff820bd4e0 T optc1_clear_optc_underflow -ffffffff820bd530 T optc1_tg_init -ffffffff820bd5e0 T optc1_is_tg_enabled -ffffffff820bd650 T optc1_is_optc_underflow_occurred -ffffffff820bd6c0 T optc1_configure_crc -ffffffff820bd930 T optc1_get_crc -ffffffff820bda30 T dcn10_timing_generator_init -ffffffff820bdaa0 t optc1_enable_crtc -ffffffff820bdba0 t optc1_set_test_pattern -ffffffff820be290 t optc1_program_manual_trigger -ffffffff820be340 t optc1_setup_manual_trigger -ffffffff820bf000 T dcn10_find_first_free_match_stream_enc_for_link -ffffffff820bf0b0 T dcn10_create_resource_pool -ffffffff820c0230 t dcn10_resource_destruct -ffffffff820c0540 t dcn10_destroy_resource_pool -ffffffff820c05a0 t dcn10_panel_cntl_create -ffffffff820c0630 t dcn10_link_encoder_create -ffffffff820c0730 t dcn10_validate_bandwidth -ffffffff820c07b0 t dcn10_validate_global -ffffffff820c0990 t dcn10_acquire_free_pipe_for_layer -ffffffff820c0ac0 t dcn10_validate_plane -ffffffff820c0b10 t dcn10_add_stream_to_ctx -ffffffff820c0ce0 t dcn10_patch_unknown_plane_state -ffffffff820c0d40 t read_dce_straps -ffffffff820c0d70 t create_audio -ffffffff820c0da0 t dcn10_stream_encoder_create -ffffffff820c0e40 t dcn10_hwseq_create -ffffffff820c0ef0 t dcn10_get_dcc_compression_cap -ffffffff820c1000 T enc1_update_generic_info_packet -ffffffff820c1430 T enc1_stream_encoder_dp_set_stream_attribute -ffffffff820c1910 T enc1_stream_encoder_set_stream_attribute_helper -ffffffff820c1990 T enc1_stream_encoder_hdmi_set_stream_attribute -ffffffff820c1f80 T enc1_stream_encoder_dvi_set_stream_attribute -ffffffff820c2110 T enc1_stream_encoder_set_throttled_vcp_size -ffffffff820c2330 T enc1_stream_encoder_update_dp_info_packets -ffffffff820c2530 T enc1_stream_encoder_send_immediate_sdp_message -ffffffff820c2940 T enc1_stream_encoder_stop_dp_info_packets -ffffffff820c2b10 T enc1_stream_encoder_dp_blank -ffffffff820c2cb0 T enc1_stream_encoder_dp_unblank -ffffffff820c2ee0 T enc1_stream_encoder_set_avmute -ffffffff820c2f20 T enc1_reset_hdmi_stream_attribute -ffffffff820c2ff0 T get_audio_clock_info -ffffffff820c30e0 T enc1_se_enable_audio_clock -ffffffff820c3140 T enc1_se_enable_dp_audio -ffffffff820c3210 T enc1_se_audio_mute_control -ffffffff820c3260 T enc1_se_dp_audio_setup -ffffffff820c3270 t enc1_se_audio_setup -ffffffff820c33d0 T enc1_se_dp_audio_enable -ffffffff820c3620 T enc1_se_dp_audio_disable -ffffffff820c3790 T enc1_se_hdmi_audio_setup -ffffffff820c3c50 T enc1_se_hdmi_audio_disable -ffffffff820c3ce0 T enc1_setup_stereo_sync -ffffffff820c3d60 T enc1_dig_connect_to_otg -ffffffff820c3da0 T enc1_dig_source_otg -ffffffff820c3e10 T enc1_stream_encoder_dp_get_pixel_format -ffffffff820c3f00 T dcn10_stream_encoder_construct -ffffffff820c3f60 t enc1_stream_encoder_update_hdmi_info_packets -ffffffff820c4310 t enc1_stream_encoder_stop_hdmi_info_packets -ffffffff820c5000 T dccg2_update_dpp_dto -ffffffff820c5160 T dccg2_get_dccg_ref_freq -ffffffff820c5220 T dccg2_set_fifo_errdet_ovr_en -ffffffff820c5260 T dccg2_otg_add_pixel -ffffffff820c5300 T dccg2_otg_drop_pixel -ffffffff820c53a0 T dccg2_init -ffffffff820c53d0 T dccg2_create -ffffffff820c5480 T dcn_dccg_destroy -ffffffff820c6000 T dpp20_read_state -ffffffff820c61d0 T dpp2_power_on_obuf -ffffffff820c62a0 T dpp2_dummy_program_input_lut -ffffffff820c62d0 T dscl2_calc_lb_num_partitions -ffffffff820c6400 T dpp2_cnv_set_alpha_keyer -ffffffff820c6680 T dpp2_set_cursor_attributes -ffffffff820c67e0 T oppn20_dummy_program_regamma_pwl -ffffffff820c6810 T dpp2_construct -ffffffff820c6890 t dpp2_cnv_setup -ffffffff820c8000 T dpp2_set_degamma_pwl -ffffffff820c83b0 T dpp2_set_degamma -ffffffff820c8560 T dpp2_cm_set_gamut_remap -ffffffff820c8790 T dpp2_program_input_csc -ffffffff820c89c0 T dpp20_program_blnd_lut -ffffffff820c9120 T dpp20_program_shaper -ffffffff820cb0d0 T dpp20_program_3dlut -ffffffff820cb7a0 t dpp20_set3dlut_ram12 -ffffffff820cb970 T dpp2_set_hdr_multiplier -ffffffff820cc000 T dsc2_construct -ffffffff820cc050 T dsc2_get_enc_caps -ffffffff820cc0d0 T dsc_config_log -ffffffff820cc180 T dsc2_get_packed_pps -ffffffff820cc320 T dsc_prepare_config -ffffffff820cc860 T dsc_log_pps -ffffffff820ccfe0 T dsc_override_rc_params -ffffffff820cd130 T dsc_init_reg_values -ffffffff820cd220 T dsc_dc_pixel_encoding_to_dsc_pixel_format -ffffffff820cd2d0 T dsc_dc_color_depth_to_dsc_bits_per_comp -ffffffff820cd310 T dsc_update_from_dsc_parameters -ffffffff820cd3c0 t dsc2_read_state -ffffffff820cd570 t dsc2_validate_stream -ffffffff820cd5d0 t dsc2_set_config -ffffffff820ce940 t dsc2_enable -ffffffff820ceaf0 t dsc2_disable -ffffffff820cec70 t dsc2_disconnect -ffffffff820cf000 T dwb2_config_dwb_cnv -ffffffff820cf200 T dwb2_disable -ffffffff820cf310 T dwb2_is_enabled -ffffffff820cf3b0 T dwb2_set_stereo -ffffffff820cf490 T dwb2_set_new_content -ffffffff820cf500 T dwb2_set_scaler -ffffffff820cf880 T dcn20_dwbc_construct -ffffffff820cf8d0 t dwb2_get_caps -ffffffff820cf9b0 t dwb2_enable -ffffffff820cfb10 t dwb2_update -ffffffff820cfc70 t dwb2_set_warmup -ffffffff820d0000 T dwb_program_horz_scalar -ffffffff820d04c0 t wbscl_get_filter_coeffs_16p -ffffffff820d0990 t wbscl_set_scaler_filter -ffffffff820d0ba0 T dwb_program_vert_scalar -ffffffff820d2000 T hubbub2_dcc_support_swizzle -ffffffff820d20c0 T hubbub2_dcc_support_pixel_format -ffffffff820d2110 T hubbub2_get_dcc_compression_cap -ffffffff820d2350 T hubbub2_init_vm_ctx -ffffffff820d24a0 T hubbub2_init_dchub_sys_ctx -ffffffff820d26e0 T hubbub2_update_dchub -ffffffff820d28d0 T hubbub2_wm_read_state -ffffffff820d2c00 T hubbub2_get_dchub_ref_freq -ffffffff820d2ce0 T hubbub2_read_state -ffffffff820d2eb0 T hubbub2_construct -ffffffff820d2f10 t hubbub2_program_watermarks -ffffffff820d4000 T hubp2_set_vm_system_aperture_settings -ffffffff820d41e0 T hubp2_program_deadline -ffffffff820d4980 T hubp2_vready_at_or_After_vsync -ffffffff820d4a20 T hubp2_setup_interdependent -ffffffff820d4e90 T hubp2_program_size -ffffffff820d5010 T hubp2_program_rotation -ffffffff820d5180 T hubp2_dcc_control -ffffffff820d5240 T hubp2_program_pixel_format -ffffffff820d5810 T hubp2_program_surface_config -ffffffff820d5a50 T hubp2_get_lines_per_chunk -ffffffff820d5b10 T hubp2_cursor_set_attributes -ffffffff820d5ed0 T hubp2_dmdata_set_attributes -ffffffff820d62b0 T hubp2_dmdata_load -ffffffff820d6340 T hubp2_dmdata_status_done -ffffffff820d63b0 T hubp2_program_surface_flip_and_addr -ffffffff820d6ca0 T hubp2_enable_triplebuffer -ffffffff820d6d70 T hubp2_is_triplebuffer_enabled -ffffffff820d6df0 T hubp2_set_flip_control_surface_gsl -ffffffff820d6e40 T hubp2_is_flip_pending -ffffffff820d6f50 T hubp2_set_blank -ffffffff820d6fb0 T hubp2_set_blank_regs -ffffffff820d70b0 T hubp2_cursor_set_position -ffffffff820d7520 T hubp2_clk_cntl -ffffffff820d7570 T hubp2_vtg_sel -ffffffff820d75b0 T hubp2_clear_underflow -ffffffff820d7600 T hubp2_read_state_common -ffffffff820d8250 T hubp2_read_state -ffffffff820d8520 T hubp2_construct -ffffffff820d8590 t hubp2_setup -ffffffff820d8a30 t hubp2_validate_dml_output -ffffffff820da000 T dcn20_set_flip_control_gsl -ffffffff820da050 T dcn20_enable_power_gating_plane -ffffffff820da4b0 T dcn20_dccg_init -ffffffff820da530 T dcn20_disable_vga -ffffffff820da5f0 T dcn20_program_triple_buffer -ffffffff820da640 T dcn20_init_blank -ffffffff820da850 T dcn20_dsc_pg_control -ffffffff820dac60 T dcn20_dpp_pg_control -ffffffff820daf10 T dcn20_hubp_pg_control -ffffffff820db1c0 T dcn20_plane_atomic_disable -ffffffff820db310 t dcn20_setup_gsl_group_as_lock -ffffffff820db570 T dcn20_disable_plane -ffffffff820db650 T dcn20_disable_pixel_data -ffffffff820db670 T dcn20_blank_pixel_data -ffffffff820db890 T dcn20_enable_stream_timing -ffffffff820dbe50 T dcn20_program_output_csc -ffffffff820dbf40 T dcn20_set_output_transfer_func -ffffffff820dc0c0 T dcn20_set_blend_lut -ffffffff820dc130 T dcn20_set_shaper_3dlut -ffffffff820dc1f0 T dcn20_set_input_transfer_func -ffffffff820dc3b0 T dcn20_update_odm -ffffffff820dc4a0 T dcn20_pipe_control_lock -ffffffff820dc7c0 T dcn20_program_front_end_for_ctx -ffffffff820dd560 t dcn20_program_pipe -ffffffff820de000 T dcn20_post_unlock_program_front_end -ffffffff820de310 T dcn20_prepare_bandwidth -ffffffff820de480 T dcn20_optimize_bandwidth -ffffffff820de690 T dcn20_update_bandwidth -ffffffff820de950 T dcn20_enable_writeback -ffffffff820deaa0 T dcn20_disable_writeback -ffffffff820deb30 T dcn20_wait_for_blank_complete -ffffffff820debc0 T dcn20_dmdata_status_done -ffffffff820dec10 T dcn20_disable_stream_gating -ffffffff820decc0 T dcn20_enable_stream_gating -ffffffff820ded60 T dcn20_set_dmdata_attributes -ffffffff820dee20 T dcn20_init_vm_ctx -ffffffff820deee0 T dcn20_init_sys_ctx -ffffffff820def90 T dcn20_update_plane_addr -ffffffff820df0d0 T dcn20_unblank_stream -ffffffff820df280 T dcn20_setup_vupdate_interrupt -ffffffff820df2f0 T dcn20_reset_hw_ctx_wrap -ffffffff820df6b0 T dcn20_update_mpcc -ffffffff820df910 T dcn20_enable_stream -ffffffff820dfc50 T dcn20_program_dmdata_engine -ffffffff820dfcf0 T dcn20_fpga_init_hw -ffffffff820e02d0 T dcn20_optimize_timing_for_fsft -ffffffff820e0310 T dcn20_set_disp_pattern_generator -ffffffff820e1000 T dcn20_hw_sequencer_construct -ffffffff820e2000 T enc2_fec_set_enable -ffffffff820e2090 T enc2_fec_set_ready -ffffffff820e20d0 T enc2_fec_is_active -ffffffff820e2140 T link_enc2_read_state -ffffffff820e21f0 T dcn20_link_encoder_enable_dp_output -ffffffff820e22f0 T dcn20_link_encoder_get_max_link_cap -ffffffff820e23a0 T dcn20_link_encoder_is_in_alt_mode -ffffffff820e2420 T enc2_hw_init -ffffffff820e2500 T dcn20_link_encoder_construct -ffffffff820e3000 T mmhubbub2_config_mcif_irq -ffffffff820e3130 T mmhubbub2_enable_mcif -ffffffff820e3170 T mmhubbub2_disable_mcif -ffffffff820e31b0 T mcifwb2_dump_frame -ffffffff820e32c0 T dcn20_mmhubbub_construct -ffffffff820e3310 t mmhubbub2_config_mcif_buf -ffffffff820e3960 t mmhubbub2_config_mcif_arb -ffffffff820e4000 T mpc2_update_blending -ffffffff820e42a0 T mpc2_set_denorm -ffffffff820e4310 T mpc2_set_denorm_clamp -ffffffff820e4460 T mpc2_set_output_csc -ffffffff820e4650 T mpc2_set_ocsc_default -ffffffff820e4830 T mpc20_power_on_ogam_lut -ffffffff820e48b0 T mpc2_set_output_gamma -ffffffff820e50b0 T mpc2_assert_idle_mpcc -ffffffff820e51c0 T mpc2_assert_mpcc_idle_before_connect -ffffffff820e5410 T dcn20_mpc_construct -ffffffff820e54d0 t mpc2_get_mpcc_for_dpp -ffffffff820e6000 T opp2_set_disp_pattern_generator -ffffffff820e6810 T opp2_dpg_set_blank_color -ffffffff820e6990 T opp2_program_dpg_dimensions -ffffffff820e6a20 T opp2_dpg_is_blanked -ffffffff820e6ae0 T opp2_program_left_edge_extra_pixel -ffffffff820e6b30 T dcn20_opp_construct -ffffffff820e7000 T optc2_enable_crtc -ffffffff820e7100 T optc2_set_gsl -ffffffff820e71f0 T optc2_set_gsl_source_select -ffffffff820e72b0 T optc2_set_dsc_config -ffffffff820e7380 T optc2_get_dsc_status -ffffffff820e73c0 T optc2_is_two_pixels_per_containter -ffffffff820e73d0 T optc2_set_odm_bypass -ffffffff820e7510 T optc2_set_odm_combine -ffffffff820e7700 T optc2_get_optc_source -ffffffff820e77d0 T optc2_triplebuffer_lock -ffffffff820e78f0 T optc2_triplebuffer_unlock -ffffffff820e79a0 T optc2_lock_doublebuffer_enable -ffffffff820e7b80 T optc2_lock_doublebuffer_disable -ffffffff820e7c60 T optc2_setup_manual_trigger -ffffffff820e7df0 T optc2_program_manual_trigger -ffffffff820e7e60 T optc2_configure_crc -ffffffff820e7ef0 T optc2_get_last_used_drr_vtotal -ffffffff820e7f30 T dcn20_timing_generator_init -ffffffff820e7fa0 t optc2_set_dwb_source -ffffffff820e8040 t optc2_align_vblanks -ffffffff820e9000 T dcn20_dpp_destroy -ffffffff820e9050 T dcn20_dpp_create -ffffffff820e9120 T dcn20_ipp_create -ffffffff820e91d0 T dcn20_opp_create -ffffffff820e9280 T dcn20_aux_engine_create -ffffffff820e9320 T dcn20_i2c_hw_create -ffffffff820e93b0 T dcn20_mpc_create -ffffffff820e9440 T dcn20_hubbub_create -ffffffff820e9510 T dcn20_timing_generator_create -ffffffff820e95a0 T dcn20_link_encoder_create -ffffffff820e96a0 T dcn20_stream_encoder_create -ffffffff820e9760 T dcn20_hwseq_create -ffffffff820e97d0 T dcn20_clock_source_destroy -ffffffff820e9820 T dcn20_dsc_create -ffffffff820e98e0 T dcn20_dsc_destroy -ffffffff820e9930 T dcn20_hubp_create -ffffffff820e9a00 T dcn20_build_mapped_resource -ffffffff820e9c20 T dcn20_acquire_dsc -ffffffff820e9d60 T dcn20_release_dsc -ffffffff820e9dd0 T dcn20_add_dsc_to_stream_resource -ffffffff820e9f40 T dcn20_add_stream_to_ctx -ffffffff820e9fd0 T dcn20_remove_stream_from_ctx -ffffffff820ea0c0 T dcn20_split_stream_for_odm -ffffffff820ea570 T dcn20_split_stream_for_mpc -ffffffff820ea6f0 T dcn20_calc_max_scaled_time -ffffffff820ea760 T dcn20_set_mcif_arb_params -ffffffff820ea8d0 T dcn20_validate_dsc -ffffffff820eaa80 T dcn20_find_secondary_pipe -ffffffff820eac60 T dcn20_merge_pipes_for_validate -ffffffff820eaed0 T dcn20_validate_apply_pipe_split_flags -ffffffff820eb760 T dcn20_fast_validate_bw -ffffffff820ebcb0 T dcn20_validate_bandwidth -ffffffff820ebd30 T dcn20_acquire_free_pipe_for_layer -ffffffff820ebe50 T dcn20_get_dcc_compression_cap -ffffffff820ebe80 T dcn20_patch_unknown_plane_state -ffffffff820ebee0 T dcn20_dwbc_create -ffffffff820ebff0 T dcn20_mmhubbub_create -ffffffff820ec150 T dcn20_create_resource_pool -ffffffff820ed8f0 t dcn20_resource_destruct -ffffffff820edda0 t dcn20_destroy_resource_pool -ffffffff820ede00 t dcn20_panel_cntl_create -ffffffff820ede90 t read_dce_straps -ffffffff820edec0 t dcn20_create_audio -ffffffff820ee000 T enc2_set_dynamic_metadata -ffffffff820ee260 T enc2_stream_encoder_dp_unblank -ffffffff820ee5a0 T enc2_stream_encoder_dp_set_stream_attribute -ffffffff820ee600 T enc2_get_fifo_cal_average_level -ffffffff820ee660 T dcn20_stream_encoder_construct -ffffffff820ee6c0 t enc2_stream_encoder_update_hdmi_info_packets -ffffffff820ee790 t enc2_stream_encoder_stop_hdmi_info_packets -ffffffff820eeaa0 t enc2_stream_encoder_update_dp_info_packets_sdp_line_num -ffffffff820eeb60 t enc2_stream_encoder_update_dp_info_packets -ffffffff820eec10 t enc2_read_state -ffffffff820eed90 t enc2_dp_set_dsc_config -ffffffff820eee60 t enc2_dp_set_dsc_pps_info_packet -ffffffff820ef330 t enc2_dp_set_odm_combine -ffffffff820ef370 t enc2_update_hdmi_info_packet -ffffffff820f0000 T dcn20_vmid_setup -ffffffff820f1000 T dccg201_create -ffffffff820f10b0 t dccg201_update_dpp_dto -ffffffff820f2000 T dpp201_construct -ffffffff820f2080 t dpp201_get_optimal_number_of_taps -ffffffff820f2440 t dpp201_cnv_setup -ffffffff820f3000 T hubbub201_construct -ffffffff820f3060 t hubbub201_program_watermarks -ffffffff820f4000 T dcn201_hubp_construct -ffffffff820f4070 t hubp201_setup -ffffffff820f4350 t hubp201_program_surface_config -ffffffff820f5000 T dcn201_update_plane_addr -ffffffff820f52a0 T dcn201_init_blank -ffffffff820f53e0 T dcn201_init_hw -ffffffff820f5bb0 T dcn201_plane_atomic_disconnect -ffffffff820f5d20 T dcn201_update_mpcc -ffffffff820f5fb0 T dcn201_pipe_control_lock -ffffffff820f60b0 T dcn201_set_cursor_attribute -ffffffff820f6140 T dcn201_set_dmdata_attributes -ffffffff820f6250 T dcn201_unblank_stream -ffffffff820f7000 T dcn201_hw_sequencer_construct -ffffffff820f8000 T dcn201_link_encoder_construct -ffffffff820f8190 t dcn201_link_encoder_is_in_alt_mode -ffffffff820f8200 t dcn201_link_encoder_get_max_link_cap -ffffffff820f9000 T dcn201_mpc_construct -ffffffff820f90c0 t mpc201_set_out_rate_control -ffffffff820fa000 T dcn201_opp_construct -ffffffff820fb000 T optc201_is_two_pixels_per_containter -ffffffff820fb010 T dcn201_timing_generator_init -ffffffff820fb080 t optc201_validate_timing -ffffffff820fb180 t optc201_triplebuffer_unlock -ffffffff820fb230 t optc201_triplebuffer_lock -ffffffff820fb350 t optc201_get_optc_source -ffffffff820fc000 T dcn201_create_resource_pool -ffffffff820fca30 t dcn201_resource_destruct -ffffffff820fcd30 t dcn201_destroy_resource_pool -ffffffff820fcd90 t dcn201_link_init -ffffffff820fcde0 t dcn201_link_encoder_create -ffffffff820fce90 t dcn201_acquire_free_pipe_for_layer -ffffffff820fcfa0 t dcn201_populate_dml_writeback_from_context -ffffffff820fd000 t read_dce_straps -ffffffff820fd030 t dcn201_create_audio -ffffffff820fd060 t dcn201_stream_encoder_create -ffffffff820fd100 t dcn201_hwseq_create -ffffffff820fd170 t dcn201_get_dcc_compression_cap -ffffffff820fe000 T dccg21_create -ffffffff820fe0b0 t dccg21_update_dpp_dto -ffffffff820ff000 T dcn21_dchvm_init -ffffffff820ff200 T hubbub21_init_dchub -ffffffff820ff3d0 T hubbub21_program_urgent_watermarks -ffffffff820ffbf0 T hubbub21_program_stutter_watermarks -ffffffff821000e0 T hubbub21_program_pstate_watermarks -ffffffff82100380 T hubbub21_program_watermarks -ffffffff821004e0 T hubbub21_wm_read_state -ffffffff82100780 T hubbub21_construct -ffffffff821007e0 t hubbub21_apply_DEDCN21_147_wa -ffffffff82101000 T apply_DEDCN21_142_wa_for_hostvm_deadline -ffffffff821012e0 T hubp21_program_deadline -ffffffff82101310 T hubp21_program_requestor -ffffffff821016b0 T hubp21_construct -ffffffff82101720 t hubp21_setup -ffffffff82101780 t hubp21_set_viewport -ffffffff82101a80 t hubp21_program_surface_flip_and_addr -ffffffff82102370 t hubp21_set_vm_system_aperture_settings -ffffffff821024a0 t hubp21_init -ffffffff821024d0 t hubp21_validate_dml_output -ffffffff82104000 T dcn21_init_sys_ctx -ffffffff82104110 T dcn21_s0i3_golden_init_wa -ffffffff82104170 T dcn21_exit_optimized_pwr_state -ffffffff82104190 T dcn21_optimize_pwr_state -ffffffff821041c0 T dcn21_PLAT_58856_wa -ffffffff82104260 T dcn21_set_abm_immediate_disable -ffffffff821043a0 T dcn21_set_pipe -ffffffff821044e0 T dcn21_set_backlight_level -ffffffff82104700 T dcn21_is_abm_supported -ffffffff82105000 T dcn21_hw_sequencer_construct -ffffffff82106000 T dcn21_link_encoder_enable_dp_output -ffffffff82106140 t dcn21_link_encoder_acquire_phy -ffffffff82106320 T dcn21_link_encoder_construct -ffffffff82106500 t dcn21_link_encoder_enable_dp_mst_output -ffffffff82106570 t dcn21_link_encoder_disable_output -ffffffff82107000 T dcn21_fast_validate_bw -ffffffff821076a0 T dcn21_create_resource_pool -ffffffff821089d0 t dcn21_resource_destruct -ffffffff82108e70 t dcn21_destroy_resource_pool -ffffffff82108ed0 t dcn21_panel_cntl_create -ffffffff82108f60 t dcn21_link_encoder_create -ffffffff82109060 t dcn21_validate_bandwidth -ffffffff821090e0 t dcn21_patch_unknown_plane_state -ffffffff82109130 t dcn21_get_panel_config_defaults -ffffffff82109170 t read_dce_straps -ffffffff821091a0 t dcn21_create_audio -ffffffff821091d0 t dcn21_stream_encoder_create -ffffffff82109270 t dcn21_hwseq_create -ffffffff8210a000 T afmt3_setup_hdmi_audio -ffffffff8210a1d0 T afmt3_se_audio_setup -ffffffff8210a370 T afmt3_audio_mute_control -ffffffff8210a3e0 T afmt3_audio_info_immediate_update -ffffffff8210a420 T afmt3_setup_dp_audio -ffffffff8210a510 T afmt3_construct -ffffffff8210b000 T cm_helper_program_gamcor_xfer_func -ffffffff8210b3c0 T cm3_helper_translate_curve_to_hw_format -ffffffff8210bfd0 T cm3_helper_convert_to_custom_float -ffffffff8210c420 T cm3_helper_translate_curve_to_degamma_hw_format -ffffffff8210cc40 T is_rgb_equal -ffffffff8210d000 T dccg3_create -ffffffff8210d0b0 T dccg30_create -ffffffff8210e000 T dcn30_link_encoder_validate_output_with_stream -ffffffff8210e010 T dcn30_link_encoder_construct -ffffffff8210e1f0 T enc3_hw_init -ffffffff8210f000 T enc3_stream_encoder_update_hdmi_info_packets -ffffffff8210f100 t enc3_update_hdmi_info_packet -ffffffff8210f4f0 T enc3_stream_encoder_stop_hdmi_info_packets -ffffffff8210fad0 T enc3_dp_set_dsc_pps_info_packet -ffffffff8210fdf0 T enc3_stream_encoder_update_dp_info_packets_sdp_line_num -ffffffff8210feb0 T enc3_stream_encoder_update_dp_info_packets -ffffffff82110170 T enc3_audio_mute_control -ffffffff821101e0 T enc3_se_dp_audio_setup -ffffffff82110260 T enc3_se_dp_audio_enable -ffffffff82110350 T enc3_se_hdmi_audio_setup -ffffffff82110660 T dcn30_dio_stream_encoder_construct -ffffffff821106d0 t enc3_stream_encoder_hdmi_set_stream_attribute -ffffffff82110cd0 t enc3_stream_encoder_dvi_set_stream_attribute -ffffffff82110ed0 t enc3_read_state -ffffffff82111060 t enc3_dp_set_dsc_config -ffffffff82111130 t enc3_dp_set_odm_combine -ffffffff82112000 T dpp30_read_state -ffffffff82112050 T dpp3_program_post_csc -ffffffff82112240 T dpp3_set_pre_degam -ffffffff821122f0 T dpp3_cnv_setup -ffffffff82112bc0 T dpp3_set_cursor_attributes -ffffffff82112d30 T dpp3_get_optimal_number_of_taps -ffffffff82113750 T dpp3_construct -ffffffff821137b0 t dpp3_deferred_update -ffffffff82113b90 t dpp3_program_blnd_lut -ffffffff821145e0 t dpp3_program_shaper -ffffffff82116660 t dpp3_program_3dlut -ffffffff82116e10 t dpp3_set3dlut_ram12 -ffffffff82117000 T dpp3_program_cm_dealpha -ffffffff821170a0 T dpp3_program_cm_bias -ffffffff82117190 T dpp3_program_gamcor_lut -ffffffff82117bb0 t dpp3_power_on_gamcor_lut -ffffffff82117ce0 T dpp3_set_hdr_multiplier -ffffffff82117d30 T dpp3_cm_set_gamut_remap -ffffffff82118000 T dwb3_config_fc -ffffffff821181b0 T dwb3_set_stereo -ffffffff82118270 T dwb3_enable -ffffffff821183a0 T dwb3_set_denorm -ffffffff821184c0 T dwb3_disable -ffffffff82118570 T dwb3_update -ffffffff821186a0 T dwb3_is_enabled -ffffffff82118740 T dwb3_set_new_content -ffffffff82118780 T dcn30_dwbc_construct -ffffffff821187d0 T dwb3_set_host_read_rate_control -ffffffff82118840 t dwb3_get_caps -ffffffff82119000 T dwb3_ogam_set_input_transfer_func -ffffffff821199f0 T dwb3_set_gamut_remap -ffffffff82119ca0 T dwb3_program_hdr_mult -ffffffff8211a000 T hubbub3_init_dchub_sys_ctx -ffffffff8211a1c0 T hubbub3_program_watermarks -ffffffff8211a2c0 T hubbub3_dcc_support_swizzle -ffffffff8211a380 T hubbub3_get_dcc_compression_cap -ffffffff8211a560 T hubbub3_force_wm_propagate_to_pipes -ffffffff8211a610 T hubbub3_force_pstate_change_control -ffffffff8211a690 T hubbub3_init_watermarks -ffffffff8211a9d0 T hubbub3_construct -ffffffff8211b000 T hubp3_set_vm_system_aperture_settings -ffffffff8211b130 T hubp3_program_surface_flip_and_addr -ffffffff8211bb20 T hubp3_dcc_control -ffffffff8211bbe0 T hubp3_dcc_control_sienna_cichlid -ffffffff8211bd00 T hubp3_dmdata_set_attributes -ffffffff8211bf00 T hubp3_program_surface_config -ffffffff8211c1f0 T hubp3_read_state -ffffffff8211c4c0 T hubp3_setup -ffffffff8211c550 T hubp3_init -ffffffff8211c580 T hubp3_construct -ffffffff8211d000 T dcn30_set_blend_lut -ffffffff8211d070 T dcn30_set_input_transfer_func -ffffffff8211d1d0 T dcn30_set_output_transfer_func -ffffffff8211d500 T dcn30_update_writeback -ffffffff8211d590 t dcn30_set_writeback -ffffffff8211d740 T dcn30_mmhubbub_warmup -ffffffff8211d990 T dcn30_enable_writeback -ffffffff8211da40 T dcn30_disable_writeback -ffffffff8211db20 T dcn30_program_all_writeback_pipes_in_tree -ffffffff8211de20 T dcn30_init_hw -ffffffff8211e550 T dcn30_set_avmute -ffffffff8211e660 T dcn30_update_info_frame -ffffffff8211e750 T dcn30_program_dmdata_engine -ffffffff8211e7f0 T dcn30_apply_idle_power_optimizations -ffffffff8211ed10 T dcn30_does_plane_fit_in_mall -ffffffff8211edc0 T dcn30_hardware_release -ffffffff8211eeb0 T dcn30_set_disp_pattern_generator -ffffffff8211ef20 T dcn30_prepare_bandwidth -ffffffff8211f010 T dcn30_set_static_screen_control -ffffffff82120000 T dcn30_hw_sequencer_construct -ffffffff82121000 T dcn30_mmhubbub_construct -ffffffff82121050 t mmhubbub3_warmup_mcif -ffffffff82121260 t mmhubbub3_config_mcif_buf -ffffffff82121710 t mmhubbub3_config_mcif_arb -ffffffff82122000 T mpc3_is_dwb_idle -ffffffff82122070 T mpc3_set_dwb_mux -ffffffff821220f0 T mpc3_disable_dwb_mux -ffffffff82122170 T mpc3_set_out_rate_control -ffffffff82122280 T mpc3_get_ogam_current -ffffffff82122320 T mpc3_power_on_ogam_lut -ffffffff821223f0 T mpc3_set_output_gamma -ffffffff82123030 T mpc3_set_denorm -ffffffff821230a0 T mpc3_set_denorm_clamp -ffffffff821231f0 T mpc3_program_shaper -ffffffff821253b0 t mpc3_power_on_shaper_3dlut -ffffffff82125730 T mpc3_init_mpcc -ffffffff821257b0 T mpc3_set_gamut_remap -ffffffff82125a20 T mpc3_program_3dlut -ffffffff82126190 t mpc3_set3dlut_ram12 -ffffffff82126370 T mpc3_set_output_csc -ffffffff821264e0 T mpc3_set_ocsc_default -ffffffff82126650 T mpc3_set_rmu_mux -ffffffff821266f0 T mpc3_get_rmu_mux_status -ffffffff821267a0 T mpcc3_acquire_rmu -ffffffff82126900 T dcn30_mpc_construct -ffffffff821269d0 t mpcc3_release_rmu -ffffffff82126b40 t mpc3_set_mpc_mem_lp_mode -ffffffff82127000 T optc3_triplebuffer_lock -ffffffff82127120 T optc3_lock_doublebuffer_enable -ffffffff821273b0 T optc3_lock_doublebuffer_disable -ffffffff821274d0 T optc3_lock -ffffffff821275a0 T optc3_set_out_mux -ffffffff821275e0 T optc3_program_blank_color -ffffffff82127710 T optc3_set_drr_trigger_window -ffffffff821277a0 T optc3_set_vtotal_change_limit -ffffffff82127810 T optc3_set_dsc_config -ffffffff82127860 T optc3_set_odm_bypass -ffffffff821279e0 T optc3_set_odm_combine -ffffffff82127d30 T optc3_wait_drr_doublebuffer_pending_clear -ffffffff82127db0 T optc3_set_vtotal_min_max -ffffffff82127df0 T optc3_tg_init -ffffffff82127e50 T dcn30_timing_generator_init -ffffffff82128000 T dcn30_add_stream_to_ctx -ffffffff82128020 T dcn30_populate_dml_pipes_from_context -ffffffff82128100 T dcn30_populate_dml_writeback_from_context -ffffffff82128160 T dcn30_calc_max_scaled_time -ffffffff821281c0 T dcn30_set_mcif_arb_params -ffffffff82128330 T dcn30_acquire_post_bldn_3dlut -ffffffff821284c0 T dcn30_release_post_bldn_3dlut -ffffffff82128570 T dcn30_internal_validate_bw -ffffffff821292e0 t dcn30_split_stream_for_mpc_or_odm -ffffffff82129600 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch -ffffffff821296e0 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch -ffffffff82129780 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch -ffffffff82129820 T dcn30_update_soc_for_wm_a -ffffffff82129870 T dcn30_calculate_wm_and_dlg -ffffffff821298e0 T dcn30_validate_bandwidth -ffffffff82129d10 T dcn30_update_bw_bounding_box -ffffffff8212a370 T dcn30_create_resource_pool -ffffffff8212b920 t dcn30_resource_destruct -ffffffff8212bea0 t dcn30_destroy_resource_pool -ffffffff8212bf00 t dcn30_panel_cntl_create -ffffffff8212bf90 t dcn30_link_encoder_create -ffffffff8212c040 t dcn30_get_panel_config_defaults -ffffffff8212c0c0 t read_dce_straps -ffffffff8212c0f0 t dcn30_create_audio -ffffffff8212c120 t dcn30_stream_encoder_create -ffffffff8212c2a0 t dcn30_hwseq_create -ffffffff8212d000 T vpg3_update_generic_info_packet -ffffffff8212d9a0 T vpg3_construct -ffffffff8212e000 T dccg301_create -ffffffff8212f000 T dcn301_link_encoder_construct -ffffffff82130000 T hubbub301_construct -ffffffff82131000 T dcn301_hw_sequencer_construct -ffffffff82132000 T optc301_set_drr -ffffffff82132230 T optc301_setup_manual_trigger -ffffffff82132350 T dcn301_timing_generator_init -ffffffff82133000 T dcn301_panel_cntl_construct -ffffffff82133050 t dcn301_panel_cntl_destroy -ffffffff821330a0 t dcn301_panel_cntl_hw_init -ffffffff821332b0 t dcn301_is_panel_backlight_on -ffffffff82133310 t dcn301_is_panel_powered_on -ffffffff821333c0 t dcn301_store_backlight_level -ffffffff82133460 t dcn301_get_16_bit_backlight_from_pwm -ffffffff82134000 T dcn301_create_resource_pool -ffffffff82135590 t dcn301_destruct -ffffffff82135ad0 t dcn301_destroy_resource_pool -ffffffff82135b30 t dcn301_panel_cntl_create -ffffffff82135bc0 t dcn301_link_encoder_create -ffffffff82135c70 t dcn301_calculate_wm_and_dlg -ffffffff82135ce0 t read_dce_straps -ffffffff82135d10 t dcn301_create_audio -ffffffff82135d40 t dcn301_stream_encoder_create -ffffffff82135ec0 t dcn301_hwseq_create -ffffffff82136000 T dcn302_dpp_pg_control -ffffffff821362a0 T dcn302_hubp_pg_control -ffffffff82136550 T dcn302_dsc_pg_control -ffffffff82137000 T dcn302_hw_sequencer_construct -ffffffff82138000 T dcn302_update_bw_bounding_box -ffffffff82138050 T dcn302_create_resource_pool -ffffffff821394a0 t dcn302_resource_destruct -ffffffff821399e0 t dcn302_destroy_resource_pool -ffffffff82139a30 t dcn302_panel_cntl_create -ffffffff82139ac0 t dcn302_link_encoder_create -ffffffff82139b70 t dcn302_get_panel_config_defaults -ffffffff82139bf0 t read_dce_straps -ffffffff82139c20 t dcn302_create_audio -ffffffff82139c50 t dcn302_stream_encoder_create -ffffffff82139dd0 t dcn302_hwseq_create -ffffffff8213a000 T dcn303_dpp_pg_control -ffffffff8213a030 T dcn303_hubp_pg_control -ffffffff8213a060 T dcn303_dsc_pg_control -ffffffff8213a090 T dcn303_enable_power_gating_plane -ffffffff8213b000 T dcn303_hw_sequencer_construct -ffffffff8213c000 T dcn303_update_bw_bounding_box -ffffffff8213c050 T dcn303_create_resource_pool -ffffffff8213d2a0 t dcn303_resource_destruct -ffffffff8213d7e0 t dcn303_destroy_resource_pool -ffffffff8213d830 t dcn303_panel_cntl_create -ffffffff8213d8c0 t dcn303_link_encoder_create -ffffffff8213d970 t dcn303_get_panel_config_defaults -ffffffff8213d9f0 t read_dce_straps -ffffffff8213da20 t dcn303_create_audio -ffffffff8213da50 t dcn303_stream_encoder_create -ffffffff8213dbd0 t dcn303_hwseq_create -ffffffff8213e000 T afmt31_powerdown -ffffffff8213e090 T afmt31_poweron -ffffffff8213e120 T afmt31_construct -ffffffff8213f000 T apg31_construct -ffffffff8213f050 t apg31_se_audio_setup -ffffffff8213f160 t apg31_enable -ffffffff8213f270 t apg31_disable -ffffffff82140000 T dccg31_update_dpp_dto -ffffffff82140160 T dccg31_set_dpstreamclk -ffffffff821402f0 t dccg31_disable_dpstreamclk -ffffffff82140440 T dccg31_enable_symclk32_se -ffffffff82140740 T dccg31_disable_symclk32_se -ffffffff82140a10 T dccg31_enable_symclk32_le -ffffffff82140b20 T dccg31_disable_symclk32_le -ffffffff82140c10 T dccg31_set_symclk32_le_root_clock_gating -ffffffff82140d20 T dccg31_disable_dscclk -ffffffff82140f70 T dccg31_enable_dscclk -ffffffff821411e0 T dccg31_set_physymclk -ffffffff821416f0 T dccg31_set_dtbclk_dto -ffffffff821419a0 T dccg31_set_audio_dtbclk_dto -ffffffff82141ab0 T dccg31_get_dccg_ref_freq -ffffffff82141ae0 T dccg31_set_dispclk_change_mode -ffffffff82141b30 T dccg31_init -ffffffff82142110 T dccg31_otg_add_pixel -ffffffff82142150 T dccg31_otg_drop_pixel -ffffffff82142190 T dccg31_create -ffffffff82143000 T dcn31_link_encoder_set_dio_phy_mux -ffffffff82143390 T dcn31_link_encoder_construct -ffffffff82143560 T dcn31_link_encoder_construct_minimal -ffffffff821435e0 T dcn31_link_encoder_enable_dp_output -ffffffff82143820 T dcn31_link_encoder_enable_dp_mst_output -ffffffff82143a60 T dcn31_link_encoder_disable_output -ffffffff82143cd0 T dcn31_link_encoder_is_in_alt_mode -ffffffff82143e20 T dcn31_link_encoder_get_max_link_cap -ffffffff82143fa0 t enc31_hw_init -ffffffff82144000 T dcn31_hpo_dp_link_enc_enable -ffffffff82144160 T dcn31_hpo_dp_link_enc_disable -ffffffff821441d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern -ffffffff82144b30 T dcn31_hpo_dp_link_enc_update_stream_allocation_table -ffffffff82144db0 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size -ffffffff82145050 T dcn31_hpo_dp_link_enc_read_state -ffffffff821452f0 T dcn31_hpo_dp_link_enc_enable_dp_output -ffffffff821453f0 T dcn31_hpo_dp_link_enc_disable_output -ffffffff82145530 T dcn31_hpo_dp_link_enc_set_ffe -ffffffff82145620 T hpo_dp_link_encoder31_construct -ffffffff82145680 t dcn31_hpo_dp_link_enc_is_in_alt_mode -ffffffff82146000 T dcn31_hpo_dp_stream_encoder_construct -ffffffff82146070 t dcn31_hpo_dp_stream_enc_enable_stream -ffffffff821461b0 t dcn31_hpo_dp_stream_enc_dp_unblank -ffffffff82146460 t dcn31_hpo_dp_stream_enc_dp_blank -ffffffff82146560 t dcn31_hpo_dp_stream_enc_disable -ffffffff821465d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute -ffffffff82146e80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num -ffffffff82146f40 t dcn31_hpo_dp_stream_enc_update_dp_info_packets -ffffffff82147160 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets -ffffffff821472f0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet -ffffffff82147590 t dcn31_hpo_dp_stream_enc_map_stream_to_link -ffffffff82147690 t dcn31_hpo_dp_stream_enc_audio_setup -ffffffff82147740 t dcn31_hpo_dp_stream_enc_audio_enable -ffffffff82147810 t dcn31_hpo_dp_stream_enc_audio_disable -ffffffff821479c0 t dcn31_hpo_dp_stream_enc_read_state -ffffffff82147b50 t dcn31_set_hblank_min_symbol_width -ffffffff82148000 T hubbub31_init_dchub_sys_ctx -ffffffff821481e0 T hubbub31_init -ffffffff82148280 T hubbub31_construct -ffffffff82148320 t hubbub31_get_dcc_compression_cap -ffffffff82148500 t hubbub31_get_dchub_ref_freq -ffffffff821485e0 t hubbub31_program_watermarks -ffffffff82149f00 t hubbub31_verify_allow_pstate_change_high -ffffffff8214a0c0 t dcn31_program_det_size -ffffffff8214a2a0 t dcn31_program_compbuf_size -ffffffff8214a520 t dcn31_init_crb -ffffffff8214b000 T hubp31_set_unbounded_requesting -ffffffff8214b090 T hubp31_soft_reset -ffffffff8214b0e0 T hubp31_construct -ffffffff8214b150 t hubp31_program_extended_blank -ffffffff8214c000 T dcn31_init_hw -ffffffff8214c850 T dcn31_dsc_pg_control -ffffffff8214cba0 T dcn31_enable_power_gating_plane -ffffffff8214ce00 T dcn31_update_info_frame -ffffffff8214cf30 T dcn31_z10_save_init -ffffffff8214cfc0 T dcn31_z10_restore -ffffffff8214d070 T dcn31_hubp_pg_control -ffffffff8214d390 T dcn31_init_sys_ctx -ffffffff8214d440 T dcn31_reset_hw_ctx_wrap -ffffffff8214d7a0 T dcn31_setup_hpo_hw_control -ffffffff8214e000 T dcn31_hw_sequencer_construct -ffffffff8214f000 T optc31_immediate_disable_crtc -ffffffff8214f100 T optc31_set_drr -ffffffff8214f310 T optc3_init_odm -ffffffff8214f480 T dcn31_timing_generator_init -ffffffff8214f4f0 t optc31_enable_crtc -ffffffff8214f5f0 t optc31_disable_crtc -ffffffff8214f6d0 t optc31_set_odm_combine -ffffffff82150000 T dcn31_panel_cntl_construct -ffffffff82150040 t dcn31_panel_cntl_destroy -ffffffff82150090 t dcn31_panel_cntl_hw_init -ffffffff82150190 t dcn31_is_panel_backlight_on -ffffffff82150230 t dcn31_is_panel_powered_on -ffffffff821502e0 t dcn31_store_backlight_level -ffffffff821503b0 t dcn31_get_16_bit_backlight_from_pwm -ffffffff82151000 T dcn31x_populate_dml_pipes_from_context -ffffffff82151180 T dcn31_populate_dml_pipes_from_context -ffffffff821515c0 T dcn31_calculate_wm_and_dlg -ffffffff82151630 T dcn31_populate_dml_writeback_from_context -ffffffff82151690 T dcn31_set_mcif_arb_params -ffffffff821516f0 T dcn31_validate_bandwidth -ffffffff82151ae0 T dcn31_create_resource_pool -ffffffff82152e80 t dcn31_resource_destruct -ffffffff821534f0 t dcn31_destroy_resource_pool -ffffffff82153550 t dcn31_panel_cntl_create -ffffffff821535c0 t dcn31_link_encoder_create -ffffffff82153670 t dcn31_link_enc_create_minimal -ffffffff82153710 t dcn31_get_panel_config_defaults -ffffffff82153750 t read_dce_straps -ffffffff82153780 t dcn31_create_audio -ffffffff821537b0 t dcn31_stream_encoder_create -ffffffff82153930 t dcn31_hpo_dp_stream_encoder_create -ffffffff82153af0 t dcn31_hpo_dp_link_encoder_create -ffffffff82153b80 t dcn31_hwseq_create -ffffffff82154000 T vpg31_powerdown -ffffffff82154090 T vpg31_poweron -ffffffff82154120 T vpg31_construct -ffffffff82155000 T dccg314_create -ffffffff821550b0 t dccg314_init -ffffffff82155210 t dccg314_set_dpstreamclk -ffffffff821555d0 t dccg314_set_dtbclk_dto -ffffffff821557c0 t dccg314_set_pixel_rate_div -ffffffff82155b30 t dccg314_set_valid_pixel_rate -ffffffff82155ba0 t dccg314_trigger_dio_fifo_resync -ffffffff82155c40 t dccg314_dpp_root_clock_control -ffffffff82156000 T dcn314_dio_stream_encoder_construct -ffffffff82156070 t enc314_stream_encoder_hdmi_set_stream_attribute -ffffffff82156670 t enc314_stream_encoder_dvi_set_stream_attribute -ffffffff82156880 t enc314_stream_encoder_dp_blank -ffffffff82156900 t enc314_stream_encoder_dp_unblank -ffffffff82156c80 t enc314_read_state -ffffffff82156de0 t enc314_dp_set_dsc_config -ffffffff82156e30 t enc314_dp_set_odm_combine -ffffffff82156e70 t enc314_set_dig_input_mode -ffffffff82156ec0 t enc314_enable_fifo -ffffffff82156f60 t enc314_disable_fifo -ffffffff82156fb0 t enc314_reset_fifo -ffffffff82158000 T dcn314_update_odm -ffffffff82158600 T dcn314_dsc_pg_control -ffffffff821589d0 T dcn314_enable_power_gating_plane -ffffffff82158c60 T dcn314_calculate_dccg_k1_k2_values -ffffffff82158e10 T dcn314_set_pixels_per_cycle -ffffffff82158f00 T dcn314_resync_fifo_dccg_dio -ffffffff821590a0 T dcn314_dpp_root_clock_control -ffffffff82159100 T dcn314_disable_link_output -ffffffff8215a000 T dcn314_hw_sequencer_construct -ffffffff8215b000 T dcn314_timing_generator_init -ffffffff8215b070 t optc314_enable_crtc -ffffffff8215b170 t optc314_disable_crtc -ffffffff8215b250 t optc314_phantom_crtc_post_enable -ffffffff8215b310 t optc314_set_odm_bypass -ffffffff8215b480 t optc314_set_odm_combine -ffffffff8215b770 t optc314_set_h_timing_div_manual_mode -ffffffff8215c000 T dcn314_validate_bandwidth -ffffffff8215c490 T dcn314_create_resource_pool -ffffffff8215d7b0 t dcn314_resource_destruct -ffffffff8215de20 t dcn314_get_preferred_eng_id_dpia -ffffffff8215de50 t dcn314_destroy_resource_pool -ffffffff8215deb0 t dcn31_panel_cntl_create -ffffffff8215df20 t dcn31_link_encoder_create -ffffffff8215dfd0 t dcn31_link_enc_create_minimal -ffffffff8215e070 t dcn314_populate_dml_pipes_from_context -ffffffff8215e100 t dcn314_update_bw_bounding_box -ffffffff8215e150 t dcn314_get_panel_config_defaults -ffffffff8215e190 t read_dce_straps -ffffffff8215e1c0 t dcn31_create_audio -ffffffff8215e1f0 t dcn314_stream_encoder_create -ffffffff8215e370 t dcn31_hpo_dp_stream_encoder_create -ffffffff8215e530 t dcn31_hpo_dp_link_encoder_create -ffffffff8215e5c0 t dcn314_hwseq_create -ffffffff8215f000 T dcn315_create_resource_pool -ffffffff82160280 t dcn315_resource_destruct -ffffffff821608e0 t dcn315_destroy_resource_pool -ffffffff82160940 t dcn31_panel_cntl_create -ffffffff821609b0 t dcn31_link_encoder_create -ffffffff82160a60 t dcn31_link_enc_create_minimal -ffffffff82160b00 t dcn315_populate_dml_pipes_from_context -ffffffff82161200 t dcn315_get_panel_config_defaults -ffffffff82161240 t read_dce_straps -ffffffff82161270 t dcn31_create_audio -ffffffff821612a0 t dcn315_stream_encoder_create -ffffffff82161420 t dcn31_hpo_dp_stream_encoder_create -ffffffff821615e0 t dcn31_hpo_dp_link_encoder_create -ffffffff82161670 t dcn31_hwseq_create -ffffffff82162000 T dcn316_create_resource_pool -ffffffff82163290 t dcn316_resource_destruct -ffffffff821638f0 t dcn316_destroy_resource_pool -ffffffff82163950 t dcn31_panel_cntl_create -ffffffff821639c0 t dcn31_link_encoder_create -ffffffff82163a70 t dcn31_link_enc_create_minimal -ffffffff82163b10 t dcn316_populate_dml_pipes_from_context -ffffffff82163e40 t dcn316_get_panel_config_defaults -ffffffff82163e80 t read_dce_straps -ffffffff82163eb0 t dcn31_create_audio -ffffffff82163ee0 t dcn316_stream_encoder_create -ffffffff82164060 t dcn31_hpo_dp_stream_encoder_create -ffffffff82164220 t dcn31_hpo_dp_link_encoder_create -ffffffff821642b0 t dcn31_hwseq_create -ffffffff82165000 T dccg32_create -ffffffff821650b0 t dccg32_get_dccg_ref_freq -ffffffff821650e0 t dccg32_otg_add_pixel -ffffffff82165120 t dccg32_otg_drop_pixel -ffffffff82165160 t dccg32_set_dpstreamclk -ffffffff821654a0 t dccg32_set_dtbclk_dto -ffffffff821656a0 t dccg32_set_pixel_rate_div -ffffffff82165a10 t dccg32_set_valid_pixel_rate -ffffffff82165a80 t dccg32_trigger_dio_fifo_resync -ffffffff82166000 T enc32_hw_init -ffffffff82166090 T dcn32_link_encoder_enable_dp_output -ffffffff821660e0 T dcn32_link_encoder_construct -ffffffff821662d0 t dcn32_link_encoder_is_in_alt_mode -ffffffff82166350 t dcn32_link_encoder_get_max_link_cap -ffffffff82167000 T enc32_stream_encoder_dp_unblank -ffffffff82167500 T enc32_enable_fifo -ffffffff821675a0 t enc32_reset_fifo -ffffffff821676a0 T dcn32_dio_stream_encoder_construct -ffffffff82167710 t enc32_stream_encoder_hdmi_set_stream_attribute -ffffffff82167c90 t enc32_stream_encoder_dvi_set_stream_attribute -ffffffff82167e10 t enc32_read_state -ffffffff82167f70 t enc32_dp_set_dsc_config -ffffffff82167fc0 t enc32_dp_set_odm_combine -ffffffff82168000 t enc32_set_dig_input_mode -ffffffff82169000 T dpp32_construct -ffffffff82169060 t dscl32_calc_lb_num_partitions -ffffffff8216a000 T hpo_dp_link_encoder32_construct -ffffffff8216a060 t dcn32_hpo_dp_link_enc_is_in_alt_mode -ffffffff8216b000 T hubbub32_set_request_limit -ffffffff8216b130 T dcn32_program_det_size -ffffffff8216b2d0 T hubbub32_program_urgent_watermarks -ffffffff8216ba40 T hubbub32_program_stutter_watermarks -ffffffff8216be90 T hubbub32_program_pstate_watermarks -ffffffff8216c320 T hubbub32_program_usr_watermarks -ffffffff8216c580 T hubbub32_force_usr_retraining_allow -ffffffff8216c600 T hubbub32_force_wm_propagate_to_pipes -ffffffff8216c6a0 T hubbub32_init -ffffffff8216c7e0 T hubbub32_construct -ffffffff8216c860 t hubbub32_wm_read_state -ffffffff8216cc80 t hubbub32_program_watermarks -ffffffff8216cd90 t hubbub32_init_watermarks -ffffffff8216d1d0 t dcn32_program_compbuf_size -ffffffff8216d460 t dcn32_init_crb -ffffffff8216e000 T hubp32_update_force_pstate_disallow -ffffffff8216e090 T hubp32_update_force_cursor_pstate_disallow -ffffffff8216e120 T hubp32_update_mall_sel -ffffffff8216e1b0 T hubp32_prepare_subvp_buffering -ffffffff8216e250 T hubp32_phantom_hubp_post_enable -ffffffff8216e360 T hubp32_cursor_set_attributes -ffffffff8216e620 T hubp32_init -ffffffff8216e650 T hubp32_construct -ffffffff8216f000 T dcn32_dsc_pg_control -ffffffff8216f320 T dcn32_enable_power_gating_plane -ffffffff8216f590 T dcn32_hubp_pg_control -ffffffff8216f800 T dcn32_apply_idle_power_optimizations -ffffffff8216faf0 T dcn32_commit_subvp_config -ffffffff8216fba0 T dcn32_subvp_pipe_control_lock -ffffffff8216fd70 T dcn32_subvp_pipe_control_lock_fast -ffffffff8216fdf0 T dcn32_set_mpc_shaper_3dlut -ffffffff8216ff10 T dcn32_set_mcm_luts -ffffffff821700a0 T dcn32_set_input_transfer_func -ffffffff821701e0 T dcn32_set_output_transfer_func -ffffffff82170420 T dcn32_update_force_pstate -ffffffff82170640 T dcn32_update_mall_sel -ffffffff82170830 T dcn32_program_mall_pipe_config -ffffffff82170920 T dcn32_init_hw -ffffffff821711e0 T dcn32_update_odm -ffffffff821717e0 T dcn32_calculate_dccg_k1_k2_values -ffffffff82171a10 T dcn32_is_dp_dig_pixel_rate_div_policy -ffffffff82171ab0 T dcn32_set_pixels_per_cycle -ffffffff82171bf0 T dcn32_resync_fifo_dccg_dio -ffffffff82171d90 T dcn32_unblank_stream -ffffffff82171fa0 T dcn32_disable_link_output -ffffffff82172310 T dcn32_update_phantom_vp_position -ffffffff82172420 T dcn32_apply_update_flags_for_phantom -ffffffff821724a0 T dcn32_dsc_pg_status -ffffffff82172580 T dcn32_update_dsc_pg -ffffffff82172680 T dcn32_enable_phantom_streams -ffffffff821727c0 T dcn32_init_blank -ffffffff82172a00 T dcn32_blank_phantom -ffffffff82172b80 T dcn32_is_pipe_topology_transition_seamless -ffffffff82173000 T dcn32_hw_sequencer_init_functions -ffffffff82174000 T dcn32_mmhubbub_construct -ffffffff82174050 t mmhubbub32_warmup_mcif -ffffffff82174260 t mmhubbub32_config_mcif_buf -ffffffff82174710 t mmhubbub32_config_mcif_arb -ffffffff82175000 T mpc32_mpc_init -ffffffff821751e0 T mpc32_power_on_blnd_lut -ffffffff82175350 T mpc32_configure_post1dlut -ffffffff82175450 T mpc32_program_post1dluta_settings -ffffffff82175660 T mpc32_program_post1dlutb_settings -ffffffff82175870 T mpc32_program_post1dlut_pwl -ffffffff82175ca0 T mpc32_program_post1dlut -ffffffff82175fb0 T mpc32_configure_shaper_lut -ffffffff821760d0 T mpc32_program_shaper_luta_settings -ffffffff82176f60 T mpc32_program_shaper_lutb_settings -ffffffff82177df0 T mpc32_program_shaper_lut -ffffffff82177f90 T mpc32_power_on_shaper_3dlut -ffffffff821781c0 T mpc32_program_shaper -ffffffff821784e0 T mpc32_select_3dlut_ram -ffffffff82178590 T mpc32_select_3dlut_ram_mask -ffffffff82178660 T mpc32_set3dlut_ram12 -ffffffff82178860 T mpc32_set3dlut_ram10 -ffffffff82178930 T mpc32_program_3dlut -ffffffff82179300 T dcn32_mpc_construct -ffffffff8217a000 T optc32_set_h_timing_div_manual_mode -ffffffff8217a040 T dcn32_timing_generator_init -ffffffff8217a0b0 t optc32_enable_crtc -ffffffff8217a1b0 t optc32_disable_crtc -ffffffff8217a370 t optc32_phantom_crtc_post_enable -ffffffff8217a430 t optc32_disable_phantom_otg -ffffffff8217a520 t optc32_set_drr -ffffffff8217a6f0 t optc32_set_odm_bypass -ffffffff8217a860 t optc32_set_odm_combine -ffffffff8217b000 T dcn32_panel_cntl_create -ffffffff8217b070 T dcn32_acquire_post_bldn_3dlut -ffffffff8217b160 T dcn32_release_post_bldn_3dlut -ffffffff8217b210 T dcn32_retain_phantom_pipes -ffffffff8217b2f0 T dcn32_remove_phantom_pipes -ffffffff8217b460 T dcn32_add_phantom_pipes -ffffffff8217b890 T dcn32_validate_bandwidth -ffffffff8217bd70 T dcn32_populate_dml_pipes_from_context -ffffffff8217c1a0 T dcn32_calculate_wm_and_dlg -ffffffff8217c210 T dcn32_create_resource_pool -ffffffff8217c2c0 t dcn32_resource_construct -ffffffff82187800 T dcn32_acquire_free_pipe_as_secondary_dpp_pipe -ffffffff82187b00 T dcn32_calc_num_avail_chans_for_mall -ffffffff82187b70 t dcn32_mpc_create -ffffffff8218c1d0 t dcn32_dwbc_create -ffffffff8218cbd0 t dcn32_mmhubbub_create -ffffffff8218d080 t dcn32_resource_destruct -ffffffff8218d710 t dcn32_destroy_resource_pool -ffffffff8218d770 t dcn32_link_encoder_create -ffffffff8218e840 t dcn32_update_bw_bounding_box -ffffffff8218e890 t read_dce_straps -ffffffff8218e8c0 t dcn32_create_audio -ffffffff8218ec40 t dcn32_stream_encoder_create -ffffffff82190a80 t dcn32_hpo_dp_stream_encoder_create -ffffffff82191860 t dcn32_hpo_dp_link_encoder_create -ffffffff82191cb0 t dcn32_hwseq_create -ffffffff821921a0 t dcn32_vpg_create -ffffffff82193000 T dcn32_helper_mall_bytes_to_ways -ffffffff82193060 T dcn32_helper_calculate_mall_bytes_for_cursor -ffffffff82193100 T dcn32_helper_calculate_num_ways_for_subvp -ffffffff82193180 T dcn32_merge_pipes_for_subvp -ffffffff82193340 T dcn32_all_pipes_have_stream_and_plane -ffffffff821933d0 T dcn32_subvp_in_use -ffffffff82193460 T dcn32_mpo_in_use -ffffffff821934d0 T dcn32_any_surfaces_rotated -ffffffff82193560 T dcn32_is_center_timing -ffffffff821935d0 T dcn32_is_psr_capable -ffffffff82193620 T dcn32_determine_det_override -ffffffff82193960 T dcn32_set_det_allocations -ffffffff82193af0 T dcn32_save_mall_state -ffffffff82193ba0 T dcn32_restore_mall_state -ffffffff82193c50 T dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch -ffffffff82193e00 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch -ffffffff82193eb0 T dcn32_check_native_scaling_for_res -ffffffff82193f10 T dcn32_subvp_drr_admissable -ffffffff821940d0 T dcn32_subvp_vblank_admissable -ffffffff82195000 T dcn321_link_encoder_construct -ffffffff82196000 T dcn321_create_resource_pool -ffffffff821960b0 t dcn321_resource_construct -ffffffff821a1550 t dcn321_mpc_create -ffffffff821a5bb0 t dcn321_dwbc_create -ffffffff821a65b0 t dcn321_mmhubbub_create -ffffffff821a6a60 t dcn321_resource_destruct -ffffffff821a70f0 t dcn321_destroy_resource_pool -ffffffff821a7150 t dcn321_link_encoder_create -ffffffff821a8220 t dcn321_update_bw_bounding_box -ffffffff821a8270 t read_dce_straps -ffffffff821a82a0 t dcn321_create_audio -ffffffff821a8620 t dcn321_stream_encoder_create -ffffffff821aa460 t dcn321_hpo_dp_stream_encoder_create -ffffffff821ab240 t dcn321_hpo_dp_link_encoder_create -ffffffff821ab690 t dcn321_hwseq_create -ffffffff821abb80 t dcn321_vpg_create -ffffffff821ac000 T bw_int_to_fixed_nonconst -ffffffff821ac090 T bw_frc_to_fixed -ffffffff821ac260 T bw_floor2 -ffffffff821ac310 T bw_ceil2 -ffffffff821ac390 T bw_mul -ffffffff821ad000 T convert_to_custom_float_format -ffffffff821ae000 T bw_calcs_init -ffffffff821aee60 T bw_calcs -ffffffff821b0800 t calculate_bandwidth -ffffffff821b8000 T scaler_settings_calculation -ffffffff821b8350 T mode_support_and_system_configuration -ffffffff821be180 T display_pipe_configuration -ffffffff821beab0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation -ffffffff821c4000 T dcn_bw_mod -ffffffff821c4060 T dcn_bw_min2 -ffffffff821c40a0 T dcn_bw_max -ffffffff821c40d0 T dcn_bw_max2 -ffffffff821c4110 T dcn_bw_floor2 -ffffffff821c41b0 T dcn_bw_floor -ffffffff821c41e0 T dcn_bw_ceil -ffffffff821c4220 T dcn_bw_ceil2 -ffffffff821c42d0 T dcn_bw_max3 -ffffffff821c4350 T dcn_bw_max5 -ffffffff821c4490 T dcn_bw_pow -ffffffff821c4520 T dcn_bw_fabs -ffffffff821c4560 T dcn_bw_log -ffffffff821c5000 T swizzle_mode_to_macro_tile_size -ffffffff821c5090 T dcn_validate_bandwidth -ffffffff821c7300 T dcn_bw_sync_calcs_and_dml -ffffffff821c7550 t dcn_bw_calc_rq_dlg_ttu -ffffffff821c7d20 T dcn_find_dcfclk_suits_all -ffffffff821c8180 T dcn_bw_update_from_pplib_fclks -ffffffff821c8300 T dcn_bw_update_from_pplib_dcfclks -ffffffff821c83d0 T dcn_get_soc_clks -ffffffff821c8450 T dcn_bw_notify_pplib_of_wm_ranges -ffffffff821c9000 T dcn10_resource_construct_fp -ffffffff821ca000 T dcn20_populate_dml_writeback_from_context -ffffffff821ca180 T dcn20_fpu_set_wb_arb_params -ffffffff821ca330 T dcn20_calculate_dlg_params -ffffffff821cab70 T dcn20_populate_dml_pipes_from_context -ffffffff821cba80 T dcn20_calculate_wm -ffffffff821cc270 T dcn20_update_bounding_box -ffffffff821cc4f0 T dcn20_cap_soc_clocks -ffffffff821cc850 T dcn20_patch_bounding_box -ffffffff821cca40 T dcn20_validate_bandwidth_fp -ffffffff821ccbe0 t dcn20_validate_bandwidth_internal -ffffffff821ccfe0 T dcn20_fpu_set_wm_ranges -ffffffff821cd080 T dcn20_fpu_adjust_dppclk -ffffffff821cd120 T dcn21_populate_dml_pipes_from_context -ffffffff821cd230 T dcn21_validate_bandwidth_fp -ffffffff821cdcc0 T dcn21_update_bw_bounding_box -ffffffff821ce0d0 T dcn21_clk_mgr_set_bw_params_wm_table -ffffffff821ce130 T dcn201_populate_dml_writeback_from_context_fpu -ffffffff821ce430 t calculate_wm_set_for_vlevel -ffffffff821cf000 T dml20_recalculate -ffffffff821cf740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation -ffffffff821d4be0 T dml20_ModeSupportAndSystemConfigurationFull -ffffffff821dc040 t TruncToValidBPP -ffffffff821dc220 t CalculateVMAndRowBytes -ffffffff821dc8e0 t CalculatePrefetchSourceLines -ffffffff821dcab0 t CalculateWriteBackDelay -ffffffff821dcd80 t CalculatePrefetchSchedule -ffffffff821ddc30 t CalculateFlipSchedule -ffffffff821de000 t adjust_ReturnBW -ffffffff821df000 T dml20v2_recalculate -ffffffff821df740 t dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation -ffffffff821e4d60 T dml20v2_ModeSupportAndSystemConfigurationFull -ffffffff821ec140 t TruncToValidBPP -ffffffff821ec6d0 t CalculateVMAndRowBytes -ffffffff821ecd90 t CalculatePrefetchSourceLines -ffffffff821ecf60 t CalculateWriteBackDelay -ffffffff821ed230 t CalculateDelayAfterScaler -ffffffff821ed590 t CalculatePrefetchSchedule -ffffffff821ee2b0 t CalculateFlipSchedule -ffffffff821ee680 t adjust_ReturnBW -ffffffff821ef000 T dml20_rq_dlg_get_rq_reg -ffffffff821ef490 t dml20_rq_dlg_get_rq_params -ffffffff821ef660 T dml20_rq_dlg_get_dlg_reg -ffffffff821f1550 t get_surf_rq_param -ffffffff821f1db0 t calculate_ttu_cursor -ffffffff821f3000 T dml20v2_rq_dlg_get_rq_reg -ffffffff821f3490 t dml20v2_rq_dlg_get_rq_params -ffffffff821f3660 T dml20v2_rq_dlg_get_dlg_reg -ffffffff821f5560 t get_surf_rq_param -ffffffff821f5dc0 t calculate_ttu_cursor -ffffffff821f7000 T dml21_recalculate -ffffffff821f7710 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation -ffffffff821fced0 T dml21_ModeSupportAndSystemConfigurationFull -ffffffff82203380 t TruncToValidBPP -ffffffff82203910 t CalculateDCFCLKDeepSleep -ffffffff82203c50 t CalculateVMAndRowBytes -ffffffff822044b0 t CalculatePrefetchSourceLines -ffffffff82204680 t CalculateWriteBackDelay -ffffffff82204950 t CalculatePrefetchSchedulePerPlane -ffffffff82205190 t CalculateUrgentBurstFactor -ffffffff822055a0 t CalculateFlipSchedule -ffffffff82205a80 t CalculateWatermarksAndDRAMSpeedChangeSupport -ffffffff82206a70 t CalculatePrefetchSchedule -ffffffff82209000 T dml21_rq_dlg_get_rq_reg -ffffffff82209490 t dml_rq_dlg_get_rq_params -ffffffff82209660 T dml21_rq_dlg_get_dlg_reg -ffffffff8220b930 t get_surf_rq_param -ffffffff8220c250 t calculate_ttu_cursor -ffffffff8220d000 T optc3_fpu_set_vrr_m_const -ffffffff8220d4a0 T dcn30_fpu_populate_dml_writeback_from_context -ffffffff8220d7b0 T dcn30_fpu_set_mcif_arb_params -ffffffff8220d920 T dcn30_fpu_update_soc_for_wm_a -ffffffff8220d9f0 T dcn30_fpu_calculate_wm_and_dlg -ffffffff8220e480 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch -ffffffff8220e670 T dcn30_fpu_update_dram_channel_width_bytes -ffffffff8220e6d0 T dcn30_fpu_update_max_clk -ffffffff8220e780 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk -ffffffff8220e880 T dcn30_fpu_update_bw_bounding_box -ffffffff8220ea60 T dcn3_fpu_build_wm_range_table -ffffffff8220ed40 T patch_dcn30_soc_bounding_box -ffffffff8220f000 T dml30_recalculate -ffffffff8220f5f0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation -ffffffff822160b0 T dml30_CalculateBytePerPixelAnd256BBlockSizes -ffffffff82216320 T dml30_CalculateWriteBackDISPCLK -ffffffff82216490 t dml_max3 -ffffffff822164f0 T dml30_ModeSupportAndSystemConfigurationFull -ffffffff8221e040 t CalculateSwathAndDETConfiguration -ffffffff8221e740 t TruncToValidBPP -ffffffff8221e9a0 t CalculateVMAndRowBytes -ffffffff8221f010 t CalculatePrefetchSourceLines -ffffffff8221f1e0 t CalculateUrgentBurstFactor -ffffffff8221f470 t CalculateDCFCLKDeepSleep -ffffffff8221f790 t UseMinimumDCFCLK -ffffffff82220ab0 t CalculatePrefetchSchedule -ffffffff82221f50 t CalculateFlipSchedule -ffffffff82222450 t CalculateWatermarksAndDRAMSpeedChangeSupport -ffffffff82223190 t CalculateSwathWidth -ffffffff82224000 T dml30_rq_dlg_get_rq_reg -ffffffff822244b0 t dml_rq_dlg_get_rq_params -ffffffff82224740 T dml30_rq_dlg_get_dlg_reg -ffffffff82226e10 t get_surf_rq_param -ffffffff822277a0 t calculate_ttu_cursor -ffffffff82228000 T dcn301_update_bw_bounding_box -ffffffff822282e0 T dcn301_fpu_set_wm_ranges -ffffffff82228380 T dcn301_fpu_init_soc_bounding_box -ffffffff82228420 T dcn301_calculate_wm_and_dlg_fp -ffffffff82228750 t calculate_wm_set_for_vlevel -ffffffff82229000 T dcn302_fpu_update_bw_bounding_box -ffffffff82229940 T dcn302_fpu_init_soc_bounding_box -ffffffff8222a000 T dcn303_fpu_update_bw_bounding_box -ffffffff8222a9a0 T dcn303_fpu_init_soc_bounding_box -ffffffff8222b000 T dcn31_zero_pipe_dcc_fraction -ffffffff8222b060 T dcn31_update_soc_for_wm_a -ffffffff8222b110 T dcn315_update_soc_for_wm_a -ffffffff8222b1e0 T dcn31_calculate_wm_and_dlg_fp -ffffffff8222b840 T dcn31_update_bw_bounding_box -ffffffff8222bbe0 T dcn315_update_bw_bounding_box -ffffffff8222bed0 T dcn316_update_bw_bounding_box -ffffffff8222c280 T dcn_get_max_non_odm_pix_rate_100hz -ffffffff8222c2e0 T dcn_get_approx_det_segs_required_for_pstate -ffffffff8222d000 T dml31_recalculate -ffffffff8222d2d0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation -ffffffff82234190 T dml31_CalculateWriteBackDISPCLK -ffffffff82234300 t dml_max3 -ffffffff82234360 T dml31_ModeSupportAndSystemConfigurationFull -ffffffff8223c440 t CalculateSwathAndDETConfiguration -ffffffff8223caa0 t TruncToValidBPP -ffffffff8223ccf0 t CalculateDCFCLKDeepSleep -ffffffff8223d010 t CalculateVMAndRowBytes -ffffffff8223d650 t CalculatePrefetchSourceLines -ffffffff8223d820 t CalculateUrgentBurstFactor -ffffffff8223dab0 t UseMinimumDCFCLK -ffffffff8223ea40 t CalculatePrefetchSchedulePerPlane -ffffffff8223f1a0 t CalculateFlipSchedule -ffffffff8223f730 t CalculateWatermarksAndDRAMSpeedChangeSupport -ffffffff82240350 t CalculateSwathWidth -ffffffff82240860 t CalculatePrefetchSchedule -ffffffff82241c40 t CalculateVupdateAndDynamicMetadataParameters -ffffffff82242000 T dml31_rq_dlg_get_rq_reg -ffffffff822424b0 t dml_rq_dlg_get_rq_params -ffffffff82242740 T dml31_rq_dlg_get_dlg_reg -ffffffff82245100 t get_surf_rq_param -ffffffff82246000 T dcn314_update_bw_bounding_box_fpu -ffffffff822463f0 T dcn314_populate_dml_pipes_from_context_fpu -ffffffff82247000 T dml314_recalculate -ffffffff82247270 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation -ffffffff8224e050 T dml314_CalculateWriteBackDISPCLK -ffffffff8224e1c0 t dml_max3 -ffffffff8224e220 T dml314_ModeSupportAndSystemConfigurationFull -ffffffff822565a0 t CalculateBytePerPixelAnd256BBlockSizes -ffffffff82256810 t CalculateSwathAndDETConfiguration -ffffffff82256e50 t TruncToValidBPP -ffffffff822570a0 t CalculateDCFCLKDeepSleep -ffffffff822573c0 t CalculateVMAndRowBytes -ffffffff82257a00 t CalculatePrefetchSourceLines -ffffffff82257bd0 t CalculateUrgentBurstFactor -ffffffff82257e60 t CalculateMaxVStartup -ffffffff82257fa0 t UseMinimumDCFCLK -ffffffff82258f30 t CalculatePrefetchSchedulePerPlane -ffffffff82259690 t CalculateFlipSchedule -ffffffff82259c20 t CalculateWatermarksAndDRAMSpeedChangeSupport -ffffffff8225a840 t CalculateSwathWidth -ffffffff8225ad50 t CalculatePrefetchSchedule -ffffffff8225c130 t CalculateVupdateAndDynamicMetadataParameters -ffffffff8225d000 T dml314_rq_dlg_get_rq_reg -ffffffff8225d4b0 t dml_rq_dlg_get_rq_params -ffffffff8225d740 T dml314_rq_dlg_get_dlg_reg -ffffffff82260100 t get_surf_rq_param -ffffffff82261000 T dcn32_build_wm_range_table_fpu -ffffffff82261390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch -ffffffff82261540 T dcn32_internal_validate_bw -ffffffff822633b0 T dcn32_helper_populate_phantom_dlg_params -ffffffff82263550 T dcn32_predict_pipe_split -ffffffff82263780 T dcn32_set_phantom_stream_timing -ffffffff82263a90 T dcn32_determine_max_vratio_prefetch -ffffffff82263b70 t dcn32_split_stream_for_mpc_or_odm -ffffffff82263f20 T dcn32_calculate_wm_and_dlg_fpu -ffffffff82265650 T dcn32_patch_dpm_table -ffffffff82265860 T dcn32_update_bw_bounding_box_fpu -ffffffff82267ed0 T dcn32_zero_pipe_dcc_fraction -ffffffff82267f30 T dcn32_allow_subvp_with_active_margin -ffffffff82268000 T dcn32_allow_subvp_high_refresh_rate -ffffffff82268200 T dcn32_assign_fpo_vactive_candidate -ffffffff822682c0 T dcn32_find_vactive_pipe -ffffffff82268430 T dcn32_set_clock_limits -ffffffff82268480 T dcn32_override_min_req_memclk -ffffffff82268540 t subvp_drr_schedulable -ffffffff822687d0 t get_optimal_ntuple -ffffffff82269000 T dml32_recalculate -ffffffff8226d320 T dml32_ModeSupportAndSystemConfigurationFull -ffffffff82275000 T dml32_dscceComputeDelay -ffffffff82275140 T dml32_dscComputeDelay -ffffffff82275180 T IsVertical -ffffffff822751b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput -ffffffff822754d0 t dml_max3 -ffffffff82275530 T dml32_CalculateBytePerPixelAndBlockSizes -ffffffff82275860 T dml32_CalculateSwathAndDETConfiguration -ffffffff82276090 T dml32_CalculateSwathWidth -ffffffff82276950 T dml32_UnboundedRequest -ffffffff822769c0 T dml32_CalculateDETBufferSize -ffffffff82277000 T dml32_CalculateODMMode -ffffffff82277780 T dml32_CalculateRequiredDispclk -ffffffff82277940 T dml32_RoundToDFSGranularity -ffffffff822779d0 T dml32_CalculateOutputLink -ffffffff82278440 T dml32_TruncToValidBPP -ffffffff82278770 T dml32_CalculateDPPCLK -ffffffff82278910 T dml32_RequiredDTBCLK -ffffffff82278b60 t dml_max4 -ffffffff82278be0 T dml32_DSCDelayRequirement -ffffffff822790a0 T dml32_CalculateSurfaceSizeInMall -ffffffff82279bf0 T dml32_CalculateVMRowAndSwath -ffffffff8227aa00 T dml32_CalculateVMAndRowBytes -ffffffff8227b650 T dml32_CalculatePrefetchSourceLines -ffffffff8227b8a0 T dml32_CalculateMALLUseForStaticScreen -ffffffff8227b9e0 T dml32_CalculateRowBandwidth -ffffffff8227bb40 T dml32_CalculateUrgentLatency -ffffffff8227bbf0 T dml32_CalculateUrgentBurstFactor -ffffffff8227bea0 T dml32_CalculateDCFCLKDeepSleep -ffffffff8227c1f0 T dml32_CalculateWriteBackDelay -ffffffff8227c350 T dml32_UseMinimumDCFCLK -ffffffff8227d3c0 T dml32_CalculateExtraLatencyBytes -ffffffff8227d580 T dml32_CalculateTWait -ffffffff8227d670 T dml32_CalculateVUpdateAndDynamicMetadataParameters -ffffffff8227d8d0 T dml32_get_return_bw_mbps -ffffffff8227da90 T dml32_get_return_bw_mbps_vm_only -ffffffff8227db70 T dml32_CalculateExtraLatency -ffffffff8227dd90 T dml32_CalculatePrefetchSchedule -ffffffff8227f400 T dml32_CalculateFlipSchedule -ffffffff8227f960 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport -ffffffff82280a70 T dml32_CalculateWriteBackDISPCLK -ffffffff82280c40 T dml32_CalculateMinAndMaxPrefetchMode -ffffffff82280c90 T dml32_CalculatePixelDeliveryTimes -ffffffff82281110 T dml32_CalculateMetaAndPTETimes -ffffffff82281870 T dml32_CalculateVMGroupAndRequestTimes -ffffffff82281db0 T dml32_CalculateDCCConfiguration -ffffffff822823c0 T dml32_CalculateStutterEfficiency -ffffffff822832e0 T dml32_CalculateMaxDETAndMinCompressedBufferSize -ffffffff822833d0 T dml32_CalculateVActiveBandwithSupport -ffffffff82283540 T dml32_CalculatePrefetchBandwithSupport -ffffffff82283860 T dml32_CalculateBandwidthAvailableForImmediateFlip -ffffffff822839b0 T dml32_CalculateImmediateFlipBandwithSupport -ffffffff82283c30 T dml32_CalculateDETSwathFillLatencyHiding -ffffffff82284000 T dml32_rq_dlg_get_rq_reg -ffffffff822846a0 T dml32_rq_dlg_get_dlg_reg -ffffffff82287000 T dcn321_update_bw_bounding_box_fpu -ffffffff82289760 t get_optimal_ntuple -ffffffff8228a000 T dml_init_instance -ffffffff8228a310 T dml_get_status_message -ffffffff8228a350 T dml_log_pipe_params -ffffffff8228a380 T dml_log_mode_support_params -ffffffff8228b000 T dml_get_voltage_level -ffffffff8228b240 t fetch_socbb_params -ffffffff8228b730 t fetch_ip_params -ffffffff8228bbd0 t fetch_pipe_params -ffffffff8228cc50 T PixelClockAdjustmentForProgressiveToInterlaceUnit -ffffffff8228ccd0 T get_clk_dcf_deepsleep -ffffffff8228cde0 T get_wm_urgent -ffffffff8228cef0 T get_wm_memory_trip -ffffffff8228d000 T get_wm_writeback_urgent -ffffffff8228d110 T get_wm_stutter_exit -ffffffff8228d220 T get_wm_stutter_enter_exit -ffffffff8228d330 T get_wm_z8_stutter_exit -ffffffff8228d440 T get_wm_z8_stutter_enter_exit -ffffffff8228d550 T get_stutter_efficiency_z8 -ffffffff8228d660 T get_stutter_num_bursts_z8 -ffffffff8228d770 T get_wm_dram_clock_change -ffffffff8228d880 T get_wm_writeback_dram_clock_change -ffffffff8228d990 T get_stutter_efficiency -ffffffff8228daa0 T get_stutter_efficiency_no_vblank -ffffffff8228dbb0 T get_stutter_period -ffffffff8228dcc0 T get_urgent_latency -ffffffff8228ddd0 T get_urgent_extra_latency -ffffffff8228dee0 T get_nonurgent_latency -ffffffff8228dff0 T get_dram_clock_change_latency -ffffffff8228e100 T get_dispclk_calculated -ffffffff8228e210 T get_total_data_read_bw -ffffffff8228e320 T get_return_bw -ffffffff8228e430 T get_tcalc -ffffffff8228e540 T get_fraction_of_urgent_bandwidth -ffffffff8228e650 T get_fraction_of_urgent_bandwidth_imm_flip -ffffffff8228e760 T get_cstate_max_cap_mode -ffffffff8228e880 T get_comp_buffer_size_kbytes -ffffffff8228e990 T get_pixel_chunk_size_in_kbyte -ffffffff8228eab0 T get_alpha_pixel_chunk_size_in_kbyte -ffffffff8228ebd0 T get_meta_chunk_size_in_kbyte -ffffffff8228ecf0 T get_min_pixel_chunk_size_in_byte -ffffffff8228ee00 T get_min_meta_chunk_size_in_byte -ffffffff8228ef20 T get_fclk_watermark -ffffffff8228f030 T get_usr_retraining_watermark -ffffffff8228f140 T get_comp_buffer_reserved_space_kbytes -ffffffff8228f260 T get_comp_buffer_reserved_space_64bytes -ffffffff8228f380 T get_comp_buffer_reserved_space_zs -ffffffff8228f4a0 T get_unbounded_request_enabled -ffffffff8228f5c0 T get_dsc_delay -ffffffff8228f6f0 T get_dppclk_calculated -ffffffff8228f810 T get_dscclk_calculated -ffffffff8228f930 T get_min_ttu_vblank -ffffffff8228fa50 T get_min_ttu_vblank_in_us -ffffffff8228fb70 T get_vratio_prefetch_l -ffffffff8228fc90 T get_vratio_prefetch_c -ffffffff8228fdb0 T get_dst_x_after_scaler -ffffffff8228fed0 T get_dst_y_after_scaler -ffffffff8228fff0 T get_dst_y_per_vm_vblank -ffffffff82290110 T get_dst_y_per_row_vblank -ffffffff82290230 T get_dst_y_prefetch -ffffffff82290350 T get_dst_y_per_vm_flip -ffffffff82290470 T get_dst_y_per_row_flip -ffffffff82290590 T get_refcyc_per_vm_group_vblank -ffffffff822906b0 T get_refcyc_per_vm_group_flip -ffffffff822907d0 T get_refcyc_per_vm_req_vblank -ffffffff822908f0 T get_refcyc_per_vm_req_flip -ffffffff82290a10 T get_refcyc_per_vm_group_vblank_in_us -ffffffff82290b30 T get_refcyc_per_vm_group_flip_in_us -ffffffff82290c50 T get_refcyc_per_vm_req_vblank_in_us -ffffffff82290d70 T get_refcyc_per_vm_req_flip_in_us -ffffffff82290e90 T get_refcyc_per_vm_dmdata_in_us -ffffffff82290fb0 T get_dmdata_dl_delta_in_us -ffffffff822910d0 T get_refcyc_per_line_delivery_l_in_us -ffffffff822911f0 T get_refcyc_per_line_delivery_c_in_us -ffffffff82291310 T get_refcyc_per_line_delivery_pre_l_in_us -ffffffff82291430 T get_refcyc_per_line_delivery_pre_c_in_us -ffffffff82291550 T get_refcyc_per_req_delivery_l_in_us -ffffffff82291670 T get_refcyc_per_req_delivery_c_in_us -ffffffff82291790 T get_refcyc_per_req_delivery_pre_l_in_us -ffffffff822918b0 T get_refcyc_per_req_delivery_pre_c_in_us -ffffffff822919d0 T get_refcyc_per_cursor_req_delivery_in_us -ffffffff82291af0 T get_refcyc_per_cursor_req_delivery_pre_in_us -ffffffff82291c10 T get_refcyc_per_meta_chunk_nom_l_in_us -ffffffff82291d30 T get_refcyc_per_meta_chunk_nom_c_in_us -ffffffff82291e50 T get_refcyc_per_meta_chunk_vblank_l_in_us -ffffffff82291f70 T get_refcyc_per_meta_chunk_vblank_c_in_us -ffffffff82292090 T get_refcyc_per_meta_chunk_flip_l_in_us -ffffffff822921b0 T get_refcyc_per_meta_chunk_flip_c_in_us -ffffffff822922d0 T get_vstartup -ffffffff82292400 T get_vupdate_offset -ffffffff82292530 T get_vupdate_width -ffffffff82292650 T get_vready_offset -ffffffff82292770 T get_vready_at_or_after_vsync -ffffffff822928a0 T get_min_dst_y_next_start -ffffffff822929d0 T get_dst_y_per_pte_row_nom_l -ffffffff82292af0 T get_dst_y_per_pte_row_nom_c -ffffffff82292c10 T get_dst_y_per_meta_row_nom_l -ffffffff82292d30 T get_dst_y_per_meta_row_nom_c -ffffffff82292e50 T get_refcyc_per_pte_group_nom_l_in_us -ffffffff82292f70 T get_refcyc_per_pte_group_nom_c_in_us -ffffffff82293090 T get_refcyc_per_pte_group_vblank_l_in_us -ffffffff822931b0 T get_refcyc_per_pte_group_vblank_c_in_us -ffffffff822932d0 T get_refcyc_per_pte_group_flip_l_in_us -ffffffff822933f0 T get_refcyc_per_pte_group_flip_c_in_us -ffffffff82293510 T get_vstartup_calculated -ffffffff82293640 T get_dpte_row_height_linear_c -ffffffff82293770 T get_swath_height_l -ffffffff822938a0 T get_swath_height_c -ffffffff822939d0 T get_det_stored_buffer_size_l_bytes -ffffffff82293b00 T get_det_stored_buffer_size_c_bytes -ffffffff82293c30 T get_dpte_group_size_in_bytes -ffffffff82293d60 T get_vm_group_size_in_bytes -ffffffff82293e90 T get_dpte_row_height_linear_l -ffffffff82293fc0 T get_pte_buffer_mode -ffffffff822940f0 T get_subviewport_lines_needed_in_mall -ffffffff82294220 T get_surface_size_in_mall -ffffffff82294350 T get_total_immediate_flip_bytes -ffffffff82294470 T get_total_immediate_flip_bw -ffffffff82294650 T get_total_prefetch_bw -ffffffff82294830 T get_total_surface_size_in_mall_bytes -ffffffff822949d0 T get_det_buffer_size_kbytes -ffffffff82294b00 T get_is_phantom_pipe -ffffffff82294c30 T Calculate256BBlockSizes -ffffffff82294d20 T CalculateMinAndMaxPrefetchMode -ffffffff82294da0 T ModeSupportAndSystemConfiguration -ffffffff822950b0 T CalculateWriteBackDISPCLK -ffffffff82296000 T print__rq_params_st -ffffffff82296030 T print__data_rq_sizing_params_st -ffffffff82296060 T print__data_rq_dlg_params_st -ffffffff82296090 T print__data_rq_misc_params_st -ffffffff822960c0 T print__rq_dlg_params_st -ffffffff822960f0 T print__dlg_sys_params_st -ffffffff82296120 T print__data_rq_regs_st -ffffffff82296150 T print__rq_regs_st -ffffffff82296180 T print__dlg_regs_st -ffffffff822961b0 T print__ttu_regs_st -ffffffff82297000 T dml1_extract_rq_regs -ffffffff82297330 T dml1_rq_dlg_get_rq_params -ffffffff82297510 t get_surf_rq_param -ffffffff822980c0 T dml1_rq_dlg_get_dlg_params -ffffffff8229b000 T _do_calc_rc_params -ffffffff8229bfc0 t get_qp_set -ffffffff8229d000 T dc_bandwidth_in_kbps_from_timing -ffffffff8229d290 T dc_dsc_stream_bandwidth_in_kbps -ffffffff8229d3e0 T dc_dsc_parse_dsc_dpcd -ffffffff8229d680 t dsc_throughput_from_dpcd -ffffffff8229d840 T dc_dsc_compute_bandwidth_range -ffffffff8229da30 t intersect_dsc_caps -ffffffff8229dc00 t setup_dsc_config -ffffffff8229e3d0 T dc_dsc_compute_config -ffffffff8229e4c0 T dc_dsc_stream_bandwidth_overhead_in_kbps -ffffffff8229e600 T dc_dsc_get_policy_for_timing -ffffffff8229e6a0 T dc_dsc_policy_set_max_target_bpp_limit -ffffffff8229e6d0 T dc_dsc_policy_set_enable_dsc_when_not_needed -ffffffff8229e700 T dc_dsc_policy_set_disable_dsc_stream_overhead -ffffffff8229e730 T dc_set_disable_128b_132b_stream_overhead -ffffffff8229e760 T dc_dsc_get_default_config_option -ffffffff8229e7b0 t fit_num_slices_up -ffffffff8229e860 t decide_dsc_target_bpp_x16 -ffffffff8229f000 T calc_rc_params -ffffffff822a0000 T dscc_compute_dsc_parameters -ffffffff822a1000 T dal_hw_factory_dce110_init -ffffffff822a1060 t define_hpd_registers -ffffffff822a10b0 t define_ddc_registers -ffffffff822a2000 T dal_hw_translate_dce110_init -ffffffff822a2030 t offset_to_id -ffffffff822a2390 t id_to_offset -ffffffff822a3000 T dal_hw_factory_dce120_init -ffffffff822a3060 t define_hpd_registers -ffffffff822a30b0 t define_ddc_registers -ffffffff822a4000 T dal_hw_translate_dce120_init -ffffffff822a4030 t offset_to_id -ffffffff822a43a0 t id_to_offset -ffffffff822a5000 T dal_hw_factory_dce80_init -ffffffff822a5060 t define_hpd_registers -ffffffff822a50b0 t define_ddc_registers -ffffffff822a6000 T dal_hw_translate_dce80_init -ffffffff822a6030 t offset_to_id -ffffffff822a67b0 t id_to_offset -ffffffff822a7000 T dal_hw_factory_dcn10_init -ffffffff822a7060 t define_hpd_registers -ffffffff822a70b0 t define_ddc_registers -ffffffff822a7150 t define_generic_registers -ffffffff822a8000 T dal_hw_translate_dcn10_init -ffffffff822a8030 t offset_to_id -ffffffff822a8390 t id_to_offset -ffffffff822a9000 T dal_hw_factory_dcn20_init -ffffffff822a9060 t define_hpd_registers -ffffffff822a90b0 t define_ddc_registers -ffffffff822a9160 t define_generic_registers -ffffffff822aa000 T dal_hw_translate_dcn20_init -ffffffff822aa030 t offset_to_id -ffffffff822aa2b0 t id_to_offset -ffffffff822ab000 T dal_hw_factory_dcn21_init -ffffffff822ab060 t define_hpd_registers -ffffffff822ab0b0 t define_ddc_registers -ffffffff822ab160 t define_generic_registers -ffffffff822ac000 T dal_hw_translate_dcn21_init -ffffffff822ac030 t offset_to_id -ffffffff822ac2b0 t id_to_offset -ffffffff822ad000 T dal_hw_factory_dcn30_init -ffffffff822ad060 t define_hpd_registers -ffffffff822ad0b0 t define_ddc_registers -ffffffff822ad160 t define_generic_registers -ffffffff822ae000 T dal_hw_translate_dcn30_init -ffffffff822ae030 t offset_to_id -ffffffff822ae2c0 t id_to_offset -ffffffff822af000 T dal_hw_factory_dcn315_init -ffffffff822af060 t define_hpd_registers -ffffffff822af0b0 t define_ddc_registers -ffffffff822af160 t define_generic_registers -ffffffff822b0000 T dal_hw_translate_dcn315_init -ffffffff822b0030 t offset_to_id -ffffffff822b02b0 t id_to_offset -ffffffff822b1000 T dal_hw_factory_dcn32_init -ffffffff822b1060 t define_hpd_registers -ffffffff822b10b0 t define_ddc_registers -ffffffff822b1160 t define_generic_registers -ffffffff822b2000 T dal_hw_translate_dcn32_init -ffffffff822b2030 t offset_to_id -ffffffff822b2290 t id_to_offset -ffffffff822b3000 T dal_gpio_open -ffffffff822b30c0 T dal_gpio_open_ex -ffffffff822b3180 T dal_gpio_get_value -ffffffff822b3200 T dal_gpio_set_value -ffffffff822b3280 T dal_gpio_get_mode -ffffffff822b32b0 T dal_gpio_lock_pin -ffffffff822b32d0 T dal_gpio_unlock_pin -ffffffff822b32f0 T dal_gpio_change_mode -ffffffff822b3370 T dal_gpio_get_id -ffffffff822b33a0 T dal_gpio_get_enum -ffffffff822b33d0 T dal_gpio_set_config -ffffffff822b3450 T dal_gpio_get_pin_info -ffffffff822b34b0 T dal_gpio_get_sync_source -ffffffff822b3540 T dal_gpio_get_output_state -ffffffff822b3570 T dal_gpio_get_ddc -ffffffff822b35a0 T dal_gpio_get_hpd -ffffffff822b35d0 T dal_gpio_get_generic -ffffffff822b3600 T dal_gpio_close -ffffffff822b3650 T dal_gpio_create -ffffffff822b37e0 T dal_gpio_destroy -ffffffff822b4000 T dal_gpio_service_create -ffffffff822b4240 T dal_gpio_service_create_irq -ffffffff822b4300 T dal_gpio_create_irq -ffffffff822b4380 T dal_gpio_service_create_generic_mux -ffffffff822b4420 T dal_gpio_destroy_generic_mux -ffffffff822b44b0 T dal_gpio_get_generic_pin_info -ffffffff822b4510 T dal_gpio_service_destroy -ffffffff822b4640 T dal_mux_setup_config -ffffffff822b46a0 T dal_gpio_service_lock -ffffffff822b4720 T dal_gpio_service_unlock -ffffffff822b47a0 T dal_gpio_service_open -ffffffff822b49e0 T dal_gpio_service_close -ffffffff822b4a80 T dal_irq_get_source -ffffffff822b4af0 T dal_irq_get_rx_source -ffffffff822b4b40 T dal_irq_setup_hpd_filter -ffffffff822b4ba0 T dal_gpio_destroy_irq -ffffffff822b4c30 T dal_gpio_create_ddc -ffffffff822b4da0 T dal_gpio_destroy_ddc -ffffffff822b4e70 T dal_ddc_close -ffffffff822b4ec0 T dal_ddc_open -ffffffff822b5020 T dal_ddc_change_mode -ffffffff822b50c0 T dal_ddc_get_line -ffffffff822b50e0 T dal_ddc_set_config -ffffffff822b6000 T dal_hw_ddc_init -ffffffff822b6100 T dal_hw_ddc_get_pin -ffffffff822b6110 t dal_hw_ddc_destroy -ffffffff822b6170 t set_config -ffffffff822b7000 T dal_hw_factory_init -ffffffff822b8000 T dal_hw_generic_init -ffffffff822b8100 T dal_hw_generic_get_pin -ffffffff822b8110 t dal_hw_generic_destroy -ffffffff822b8170 t set_config -ffffffff822b9000 T dal_hw_gpio_open -ffffffff822b90b0 T dal_hw_gpio_config_mode -ffffffff822b91a0 T dal_hw_gpio_get_value -ffffffff822b9200 T dal_hw_gpio_set_value -ffffffff822b9290 T dal_hw_gpio_change_mode -ffffffff822b92a0 T dal_hw_gpio_close -ffffffff822b9350 T dal_hw_gpio_construct -ffffffff822b93b0 T dal_hw_gpio_destruct -ffffffff822ba000 T dal_hw_hpd_init -ffffffff822ba100 T dal_hw_hpd_get_pin -ffffffff822ba110 t dal_hw_hpd_destroy -ffffffff822ba170 t get_value -ffffffff822ba210 t set_config -ffffffff822bb000 T dal_hw_translate_init -ffffffff822bc000 T dc_process_hdcp_msg -ffffffff822bc180 t hdmi_14_process_transaction -ffffffff822bc2d0 t dp_11_process_transaction -ffffffff822bd000 T dal_irq_service_dummy_set -ffffffff822bd050 T dal_irq_service_dummy_ack -ffffffff822bd0a0 T dce110_vblank_set -ffffffff822bd170 T to_dal_irq_source_dce110 -ffffffff822bd2f0 T dal_irq_service_dce110_create -ffffffff822bd370 t hpd_ack -ffffffff822be000 T dal_irq_service_dce120_create +ffffffff82000310 t phy_id_to_atom +ffffffff82000350 t disp_power_gating_action_to_atom +ffffffff82001000 T clk_mgr_helper_get_active_display_cnt +ffffffff820010e0 T clk_mgr_helper_get_active_plane_cnt +ffffffff82001190 T clk_mgr_exit_optimized_pwr_state +ffffffff820012a0 T clk_mgr_optimize_pwr_state +ffffffff82001390 T dc_clk_mgr_create +ffffffff82001a50 T dc_destroy_clk_mgr +ffffffff82002000 T dentist_get_divider_from_did +ffffffff82002070 T dce_adjust_dp_ref_freq_for_ss +ffffffff82002170 T dce_get_dp_ref_freq_khz +ffffffff820022a0 T dce12_get_dp_ref_freq_khz +ffffffff820022c0 T dce_get_max_pixel_clock_for_all_paths +ffffffff820024d0 T dce_get_required_clocks_state +ffffffff82002580 T dce_set_clock +ffffffff820026e0 T dce_clock_read_ss_info +ffffffff82002800 T dce_clk_mgr_construct +ffffffff820029f0 t dce_update_clocks +ffffffff82003000 T dce110_get_min_vblank_time_us +ffffffff82003090 T dce110_fill_display_configs +ffffffff82003300 T dce11_pplib_apply_display_requirements +ffffffff820035f0 T dce110_clk_mgr_construct +ffffffff820036a0 t dce11_update_clocks +ffffffff82004000 T dce112_set_clock +ffffffff82004180 T dce112_set_dispclk +ffffffff820042a0 T dce112_set_dprefclk +ffffffff82004310 T dce112_clk_mgr_construct +ffffffff820043c0 t dce112_update_clocks +ffffffff82005000 T dce120_clk_mgr_construct +ffffffff82005090 T dce121_clk_mgr_construct +ffffffff820051c0 t dce12_update_clocks +ffffffff82006000 T rv1_clk_mgr_construct +ffffffff820060c0 t rv1_update_clocks +ffffffff820065a0 t rv1_init_clocks +ffffffff82006630 t rv1_enable_pme_wa +ffffffff82007000 T rv1_vbios_smu_set_dispclk +ffffffff820070e0 t rv1_vbios_smu_send_msg_with_param +ffffffff820071f0 T rv1_vbios_smu_set_dprefclk +ffffffff82008000 T rv2_clk_mgr_construct +ffffffff82009000 T dentist_get_did_from_divider +ffffffff82009080 T dcn20_update_clocks_update_dpp_dto +ffffffff82009150 T dcn20_update_clocks_update_dentist +ffffffff82009640 T dcn2_update_clocks +ffffffff82009bc0 T dcn2_read_clocks_from_hw_dentist +ffffffff82009c90 T dcn2_update_clocks_fpga +ffffffff82009dc0 T dcn2_init_clocks +ffffffff82009e60 T dcn2_get_clock +ffffffff82009ed0 T dcn20_clk_mgr_construct +ffffffff8200a000 t dcn2_enable_pme_wa +ffffffff8200a050 t dcn2_are_clock_states_equal +ffffffff8200a0c0 t dcn2_notify_link_rate_change +ffffffff8200b000 T dcn201_clk_mgr_construct +ffffffff8200b120 t dcn201_update_clocks +ffffffff8200b340 t dcn201_init_clocks +ffffffff8200c000 T rn_clk_mgr_construct +ffffffff8200c8a0 t rn_update_clocks +ffffffff8200ce60 t rn_set_low_power_state +ffffffff8200d040 t rn_init_clocks +ffffffff8200d0e0 t rn_enable_pme_wa +ffffffff8200d0f0 t rn_are_clock_states_equal +ffffffff8200d140 t rn_notify_wm_ranges +ffffffff8200d4d0 t rn_notify_link_rate_change +ffffffff8200e000 T rn_vbios_smu_get_smu_version +ffffffff8200e020 t rn_vbios_smu_send_msg_with_param +ffffffff8200e1b0 T rn_vbios_smu_set_dispclk +ffffffff8200e2d0 T rn_vbios_smu_set_dprefclk +ffffffff8200e340 T rn_vbios_smu_set_hard_min_dcfclk +ffffffff8200e3c0 T rn_vbios_smu_set_min_deep_sleep_dcfclk +ffffffff8200e440 T rn_vbios_smu_set_phyclk +ffffffff8200e480 T rn_vbios_smu_set_dppclk +ffffffff8200e530 T rn_vbios_smu_set_dcn_low_power_state +ffffffff8200e550 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff8200e570 T rn_vbios_smu_enable_pme_wa +ffffffff8200e590 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff8200f000 T dcn3_init_clocks +ffffffff8200f3b0 t dcn3_init_clocks_fpga +ffffffff8200f3c0 T dcn3_clk_mgr_construct +ffffffff8200f510 T dcn3_clk_mgr_destroy +ffffffff8200f570 t dcn3_update_clocks +ffffffff8200f990 t dcn3_enable_pme_wa +ffffffff8200f9d0 t dcn3_are_clock_states_equal +ffffffff8200fa30 t dcn3_notify_wm_ranges +ffffffff8200fcc0 t dcn30_notify_link_rate_change +ffffffff8200fde0 t dcn3_set_hard_min_memclk +ffffffff8200fe80 t dcn3_set_hard_max_memclk +ffffffff8200fee0 t dcn3_set_max_memclk +ffffffff8200ff20 t dcn3_set_min_memclk +ffffffff8200ff60 t dcn3_get_memclk_states_from_smu +ffffffff820100a0 t dcn3_is_smu_present +ffffffff82011000 T dcn30_smu_test_message +ffffffff82011070 t dcn30_smu_send_msg_with_param +ffffffff820111d0 T dcn30_smu_get_smu_version +ffffffff820111f0 T dcn30_smu_check_driver_if_version +ffffffff82011240 T dcn30_smu_check_msg_header_version +ffffffff82011290 T dcn30_smu_set_dram_addr_high +ffffffff820112b0 T dcn30_smu_set_dram_addr_low +ffffffff820112d0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff820112f0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff82011310 T dcn30_smu_set_hard_min_by_freq +ffffffff82011360 T dcn30_smu_set_hard_max_by_freq +ffffffff820113b0 T dcn30_smu_get_dpm_freq_by_index +ffffffff82011400 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff82011450 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff82011470 T dcn30_smu_set_num_of_displays +ffffffff82011490 T dcn30_smu_set_display_refresh_from_mall +ffffffff820114c0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff820114e0 T dcn30_smu_set_pme_workaround +ffffffff82012000 T dcn301_smu_get_smu_version +ffffffff82012070 t dcn301_smu_send_msg_with_param +ffffffff820121f0 T dcn301_smu_set_dispclk +ffffffff82012290 T dcn301_smu_set_dprefclk +ffffffff82012340 T dcn301_smu_set_hard_min_dcfclk +ffffffff820123e0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff82012480 T dcn301_smu_set_dppclk +ffffffff82012520 T dcn301_smu_set_display_idle_optimization +ffffffff82012570 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff820125c0 T dcn301_smu_enable_pme_wa +ffffffff820125e0 T dcn301_smu_set_dram_addr_high +ffffffff82012630 T dcn301_smu_set_dram_addr_low +ffffffff82012680 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff820126a0 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff82013000 T vg_clk_mgr_construct +ffffffff82013840 T vg_clk_mgr_destroy +ffffffff82013890 t vg_update_clocks +ffffffff82013bd0 t vg_init_clocks +ffffffff82013c70 t vg_enable_pme_wa +ffffffff82013c80 t vg_are_clock_states_equal +ffffffff82013cd0 t vg_notify_wm_ranges +ffffffff82015000 T dcn31_update_clocks +ffffffff82015610 T dcn31_init_clocks +ffffffff820156c0 T dcn31_are_clock_states_equal +ffffffff82015720 T dcn31_get_dtb_ref_freq_khz +ffffffff82015750 T dcn31_clk_mgr_construct +ffffffff82015e20 T dcn31_clk_mgr_destroy +ffffffff82015e70 t dcn31_set_low_power_state +ffffffff82016080 t dcn31_enable_pme_wa +ffffffff82016090 t dcn31_notify_wm_ranges +ffffffff82016410 t find_clk_for_voltage +ffffffff82017000 T dcn31_smu_get_smu_version +ffffffff82017020 t dcn31_smu_send_msg_with_param +ffffffff82017230 T dcn31_smu_set_dispclk +ffffffff820172a0 T dcn31_smu_set_dprefclk +ffffffff82017310 T dcn31_smu_set_hard_min_dcfclk +ffffffff82017390 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff82017410 T dcn31_smu_set_dppclk +ffffffff82017480 T dcn31_smu_set_display_idle_optimization +ffffffff820174d0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff82017520 T dcn31_smu_enable_pme_wa +ffffffff82017560 T dcn31_smu_set_dram_addr_high +ffffffff820175a0 T dcn31_smu_set_dram_addr_low +ffffffff820175e0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff82017620 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff82017660 T dcn31_smu_set_zstate_support +ffffffff820176d0 T dcn31_smu_set_dtbclk +ffffffff82018000 T dcn314_update_clocks +ffffffff82018650 T dcn314_are_clock_states_equal +ffffffff820186b0 T dcn314_clk_mgr_construct +ffffffff820193c0 T dcn314_clk_mgr_destroy +ffffffff82019410 t dcn314_enable_pme_wa +ffffffff82019420 t dcn314_notify_wm_ranges +ffffffff8201a000 T dcn314_smu_get_smu_version +ffffffff8201a020 t dcn314_smu_send_msg_with_param +ffffffff8201a250 T dcn314_smu_set_dispclk +ffffffff8201a2c0 T dcn314_smu_set_dprefclk +ffffffff8201a330 T dcn314_smu_set_hard_min_dcfclk +ffffffff8201a3b0 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff8201a430 T dcn314_smu_set_dppclk +ffffffff8201a4a0 T dcn314_smu_set_display_idle_optimization +ffffffff8201a4f0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff8201a540 T dcn314_smu_enable_pme_wa +ffffffff8201a580 T dcn314_smu_set_dram_addr_high +ffffffff8201a5c0 T dcn314_smu_set_dram_addr_low +ffffffff8201a600 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff8201a640 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff8201a680 T dcn314_smu_set_zstate_support +ffffffff8201a6d0 T dcn314_smu_set_dtbclk +ffffffff8201b000 T dcn315_clk_mgr_construct +ffffffff8201b810 T dcn315_clk_mgr_destroy +ffffffff8201b860 t dcn315_update_clocks +ffffffff8201bda0 t dcn315_enable_pme_wa +ffffffff8201bdb0 t dcn315_notify_wm_ranges +ffffffff8201c130 t dcn315_disable_otg_wa +ffffffff8201d000 T dcn315_smu_get_smu_version +ffffffff8201d020 t dcn315_smu_send_msg_with_param +ffffffff8201d310 T dcn315_smu_set_dispclk +ffffffff8201d380 T dcn315_smu_set_hard_min_dcfclk +ffffffff8201d400 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff8201d480 T dcn315_smu_set_dppclk +ffffffff8201d4f0 T dcn315_smu_set_display_idle_optimization +ffffffff8201d540 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff8201d590 T dcn315_smu_enable_pme_wa +ffffffff8201d5d0 T dcn315_smu_set_dram_addr_high +ffffffff8201d610 T dcn315_smu_set_dram_addr_low +ffffffff8201d650 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff8201d690 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff8201d6d0 T dcn315_smu_get_dpref_clk +ffffffff8201d730 T dcn315_smu_get_dtbclk +ffffffff8201d790 T dcn315_smu_set_dtbclk +ffffffff8201e000 T dcn316_clk_mgr_construct +ffffffff8201e650 T dcn316_clk_mgr_destroy +ffffffff8201e6a0 t dcn316_update_clocks +ffffffff8201ecc0 t dcn316_enable_pme_wa +ffffffff8201ecd0 t dcn316_notify_wm_ranges +ffffffff8201f050 t find_clk_for_voltage +ffffffff82020000 T dcn316_smu_get_smu_version +ffffffff82020020 t dcn316_smu_send_msg_with_param +ffffffff820201b0 T dcn316_smu_set_dispclk +ffffffff82020220 T dcn316_smu_set_hard_min_dcfclk +ffffffff820202a0 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff82020320 T dcn316_smu_set_dppclk +ffffffff82020390 T dcn316_smu_set_display_idle_optimization +ffffffff820203e0 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff82020430 T dcn316_smu_set_dram_addr_high +ffffffff82020470 T dcn316_smu_set_dram_addr_low +ffffffff820204b0 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff820204f0 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff82020530 T dcn316_smu_enable_pme_wa +ffffffff82020570 T dcn316_smu_set_dtbclk +ffffffff820205b0 T dcn316_smu_get_dpref_clk +ffffffff82020610 T dcn316_smu_get_smu_fclk +ffffffff82021000 T dcn32_init_clocks +ffffffff82021560 T dcn32_update_clocks_update_dpp_dto +ffffffff820216a0 T dcn32_clk_mgr_construct +ffffffff82021940 t dcn32_dump_clk_registers +ffffffff82021b60 T dcn32_clk_mgr_destroy +ffffffff82021bc0 t dcn32_update_clocks +ffffffff82022420 t dcn32_enable_pme_wa +ffffffff82022460 t dcn32_are_clock_states_equal +ffffffff820224d0 t dcn32_notify_wm_ranges +ffffffff82022650 t dcn32_set_hard_min_memclk +ffffffff820226e0 t dcn32_set_hard_max_memclk +ffffffff82022730 t dcn32_set_max_memclk +ffffffff82022770 t dcn32_set_min_memclk +ffffffff820227b0 t dcn32_get_memclk_states_from_smu +ffffffff82022a00 t dcn32_is_smu_present +ffffffff82022a30 t dcn32_get_dispclk_from_dentist +ffffffff82022ac0 t dcn32_update_clocks_update_dentist +ffffffff82023000 T dcn32_smu_send_fclk_pstate_message +ffffffff82023020 t dcn32_smu_send_msg_with_param +ffffffff82023160 T dcn32_smu_send_cab_for_uclk_message +ffffffff82023190 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff820231b0 T dcn32_smu_set_pme_workaround +ffffffff820231d0 T dcn32_smu_set_hard_min_by_freq +ffffffff82023220 T dcn32_smu_wait_for_dmub_ack_mclk +ffffffff82024000 T dc_stream_adjust_vmin_vmax +ffffffff82024170 T dc_stream_get_last_used_drr_vtotal +ffffffff820242d0 T dc_stream_get_crtc_position +ffffffff82024500 T dc_stream_configure_crc +ffffffff82024670 T dc_stream_get_crc +ffffffff82024750 T dc_stream_set_dyn_expansion +ffffffff820249c0 T dc_stream_set_dither_option +ffffffff82024b60 T dc_stream_set_gamut_remap +ffffffff82024ce0 T dc_stream_program_csc_matrix +ffffffff82024f00 T dc_stream_set_static_screen_params +ffffffff82025080 T dc_create +ffffffff82025600 t dc_construct_ctx +ffffffff82025770 t dc_destruct +ffffffff82025a40 T dc_hardware_init +ffffffff82025b10 T dc_init_callbacks +ffffffff82025b60 T dc_deinit_callbacks +ffffffff82025bb0 T dc_destroy +ffffffff82025c00 T dc_validate_boot_timing +ffffffff82025fa0 T dc_enable_stereo +ffffffff820260a0 T dc_trigger_sync +ffffffff820266d0 T dc_z10_restore +ffffffff82026710 T dc_z10_save_init +ffffffff82026750 T dc_commit_streams +ffffffff82026c30 t commit_minimal_transition_state +ffffffff82027060 T dc_create_state +ffffffff820270f0 t dc_commit_state_no_check +ffffffff82028780 T dc_release_state +ffffffff820287e0 T dc_acquire_release_mpc_3dlut +ffffffff820288b0 T dc_post_update_surfaces_to_stream +ffffffff82028cc0 T dc_copy_state +ffffffff82028e90 T dc_retain_state +ffffffff82028ec0 T dc_set_generic_gpio_for_stereo +ffffffff82028fd0 T dc_check_update_surfaces_for_stream +ffffffff820299b0 T dc_dmub_update_dirty_rect +ffffffff82029bc0 T dc_update_planes_and_stream +ffffffff8202a740 t fast_update_only +ffffffff8202aaa0 t commit_planes_for_stream_fast +ffffffff8202aec0 t commit_planes_for_stream +ffffffff8202c440 T dc_commit_updates_for_stream +ffffffff8202ca60 t copy_surface_update_to_plane +ffffffff8202ce70 t copy_stream_update_to_stream +ffffffff8202d510 T dc_get_current_stream_count +ffffffff8202d550 T dc_get_stream_at_index +ffffffff8202d5a0 T dc_interrupt_to_irq_source +ffffffff8202d5c0 T dc_interrupt_set +ffffffff8202d610 T dc_interrupt_ack +ffffffff8202d630 T dc_power_down_on_boot +ffffffff8202d680 T dc_set_power_state +ffffffff8202d860 T dc_resume +ffffffff8202d8e0 T dc_is_dmcu_initialized +ffffffff8202d930 T get_clock_requirements_for_state +ffffffff8202d9b0 T dc_set_clock +ffffffff8202d9f0 T dc_get_clock +ffffffff8202da30 T dc_set_psr_allow_active +ffffffff8202db30 T dc_allow_idle_optimizations +ffffffff8202dbd0 T dc_unlock_memory_clock_frequency +ffffffff8202dc40 T dc_lock_memory_clock_frequency +ffffffff8202dcd0 T dc_enable_dcmode_clk_limit +ffffffff8202de90 t blank_and_force_memclk +ffffffff8202e070 T dc_is_plane_eligible_for_idle_optimizations +ffffffff8202e0c0 T dc_hardware_release +ffffffff8202e110 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff8202e150 T dc_is_dmub_outbox_supported +ffffffff8202e1c0 T dc_enable_dmub_notifications +ffffffff8202e230 T dc_enable_dmub_outbox +ffffffff8202e270 T dc_process_dmub_aux_transfer_async +ffffffff8202e3f0 T get_link_index_from_dpia_port_index +ffffffff8202e4a0 T dc_process_dmub_set_config_async +ffffffff8202e580 T dc_process_dmub_set_mst_slots +ffffffff8202e670 T dc_process_dmub_dpia_hpd_int_enable +ffffffff8202e730 T dc_print_dmub_diagnostic_data +ffffffff8202e750 T dc_disable_accelerated_mode +ffffffff8202e770 T dc_notify_vsync_int_state +ffffffff8202e990 T dc_abm_save_restore +ffffffff8202eb60 T dc_query_current_properties +ffffffff8202ebd0 T dc_set_edp_power +ffffffff8202ec40 t create_links +ffffffff8202f0a0 t create_link_encoders +ffffffff8202f180 t dc_update_viusal_confirm_color +ffffffff82030000 T pre_surface_trace +ffffffff82030030 T update_surface_trace +ffffffff82030060 T post_surface_trace +ffffffff82030090 T context_timing_trace +ffffffff82030240 T context_clock_trace +ffffffff82030270 T dc_status_to_str +ffffffff82031000 T find_color_matrix +ffffffff820310b0 T color_space_to_black_color +ffffffff82031120 T hwss_wait_for_blank_complete +ffffffff820311c0 T get_mpctree_visual_confirm_color +ffffffff82031220 T get_surface_visual_confirm_color +ffffffff820312d0 T get_hdr_visual_confirm_color +ffffffff82031390 T get_subvp_visual_confirm_color +ffffffff82031490 T hwss_build_fast_sequence +ffffffff82031b50 T hwss_execute_sequence +ffffffff82031f40 T hwss_setup_dpp +ffffffff82031fe0 T hwss_program_bias_and_scale +ffffffff82032060 T hwss_program_manual_trigger +ffffffff820320b0 T hwss_power_on_mpc_mem_pwr +ffffffff82032100 T hwss_set_output_csc +ffffffff82032150 T hwss_set_ocsc_default +ffffffff820321a0 T hwss_send_dmcub_cmd +ffffffff820321c0 T get_mclk_switch_visual_confirm_color +ffffffff82032320 T get_surface_tile_visual_confirm_color +ffffffff82033000 T link_enc_cfg_init +ffffffff820331b0 T link_enc_cfg_copy +ffffffff820331e0 T link_enc_cfg_link_encs_assign +ffffffff820345a0 T link_enc_cfg_validate +ffffffff82034d40 T link_enc_cfg_link_enc_unassign +ffffffff82034ed0 T link_enc_cfg_is_transmitter_mappable +ffffffff82034ff0 T link_enc_cfg_get_stream_using_link_enc +ffffffff820350f0 T link_enc_cfg_get_link_using_link_enc +ffffffff82035200 T link_enc_cfg_get_link_enc_used_by_link +ffffffff82035380 T link_enc_cfg_get_next_avail_link_enc +ffffffff820354f0 T link_enc_cfg_get_link_enc_used_by_stream +ffffffff82035510 T link_enc_cfg_get_link_enc +ffffffff820355a0 T link_enc_cfg_get_link_enc_used_by_stream_current +ffffffff82035720 T link_enc_cfg_is_link_enc_avail +ffffffff82035920 T link_enc_cfg_set_transient_mode +ffffffff82036000 T dc_get_link_at_index +ffffffff82036030 T dc_get_edp_links +ffffffff820360b0 T dc_get_edp_link_panel_inst +ffffffff82036170 T dc_link_detect +ffffffff820361a0 T dc_link_detect_connection_type +ffffffff820361d0 T dc_link_get_status +ffffffff82036200 T dc_link_is_hdcp14 +ffffffff82036230 T dc_link_is_hdcp22 +ffffffff82036260 T dc_link_clear_dprx_states +ffffffff82036290 T dc_link_reset_cur_dp_mst_topology +ffffffff820362c0 T dc_link_bandwidth_kbps +ffffffff820362f0 T dc_get_cur_link_res_map +ffffffff82036310 T dc_restore_link_res_map +ffffffff82036330 T dc_link_update_dsc_config +ffffffff82036360 T dc_is_oem_i2c_device_present +ffffffff820363b0 T dc_submit_i2c +ffffffff820363e0 T dc_submit_i2c_oem +ffffffff82036430 T dc_link_dp_handle_automated_test +ffffffff82036460 T dc_link_dp_set_test_pattern +ffffffff82036490 T dc_link_set_drive_settings +ffffffff82036520 T dc_link_set_preferred_link_settings +ffffffff82036540 T dc_link_set_preferred_training_settings +ffffffff82036570 T dc_dp_trace_is_initialized +ffffffff820365a0 T dc_dp_trace_set_is_logged_flag +ffffffff820365d0 T dc_dp_trace_is_logged +ffffffff82036600 T dc_dp_trace_get_lt_end_timestamp +ffffffff82036630 T dc_dp_trace_get_lt_counts +ffffffff82036660 T dc_dp_trace_get_link_loss_count +ffffffff82036690 T dc_link_add_remote_sink +ffffffff820366c0 T dc_link_remove_remote_sink +ffffffff820366f0 T dc_link_aux_transfer_raw +ffffffff82036720 T dc_link_bw_kbps_from_raw_frl_link_rate_data +ffffffff82036740 T dc_link_decide_edp_link_settings +ffffffff82036770 T dc_link_dp_get_max_link_enc_cap +ffffffff820367a0 T dc_link_dp_mst_decide_link_encoding_format +ffffffff820367d0 T dc_link_get_link_cap +ffffffff82036800 T dc_link_get_highest_encoding_format +ffffffff820368c0 T dc_link_is_dp_sink_present +ffffffff820368f0 T dc_link_is_fec_supported +ffffffff82036920 T dc_link_overwrite_extended_receiver_cap +ffffffff82036950 T dc_link_should_enable_fec +ffffffff82036980 T dc_link_dp_dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff820369b0 T dc_link_handle_usb4_bw_alloc_response +ffffffff820369e0 T dc_link_check_link_loss_status +ffffffff82036a10 T dc_link_dp_allow_hpd_rx_irq +ffffffff82036a40 T dc_link_dp_handle_link_loss +ffffffff82036a70 T dc_link_dp_read_hpd_rx_irq_data +ffffffff82036aa0 T dc_link_handle_hpd_rx_irq +ffffffff82036ad0 T dc_link_dp_receiver_power_ctrl +ffffffff82036b00 T dc_link_decide_lttpr_mode +ffffffff82036b30 T dc_link_edp_panel_backlight_power_on +ffffffff82036b60 T dc_link_get_backlight_level +ffffffff82036b90 T dc_link_get_backlight_level_nits +ffffffff82036bc0 T dc_link_set_backlight_level +ffffffff82036bf0 T dc_link_set_backlight_level_nits +ffffffff82036c20 T dc_link_get_target_backlight_pwm +ffffffff82036c50 T dc_link_get_psr_state +ffffffff82036c80 T dc_link_set_psr_allow_active +ffffffff82036cb0 T dc_link_setup_psr +ffffffff82036ce0 T dc_link_get_replay_state +ffffffff82036d10 T dc_link_wait_for_t12 +ffffffff82036d40 T dc_link_get_hpd_state +ffffffff82036d70 T dc_link_enable_hpd +ffffffff82036da0 T dc_link_disable_hpd +ffffffff82036dd0 T dc_link_enable_hpd_filter +ffffffff82036e00 T dc_link_dp_dpia_validate +ffffffff82037000 T resource_parse_asic_id +ffffffff82037250 T dc_create_resource_pool +ffffffff82037550 T dc_destroy_resource_pool +ffffffff820375c0 T resource_construct +ffffffff82037aa0 T resource_unreference_clock_source +ffffffff82037b20 T resource_reference_clock_source +ffffffff82037ba0 T resource_get_clock_source_reference +ffffffff82037c20 T resource_are_vblanks_synchronizable +ffffffff82037e40 T resource_are_streams_timing_synchronizable +ffffffff82037f30 T resource_find_used_clk_src_for_sharing +ffffffff82038060 T resource_get_num_mpc_splits +ffffffff820380f0 T resource_get_num_odm_splits +ffffffff820381b0 T resource_get_otg_master +ffffffff82038250 T resource_build_scaling_params +ffffffff82038fe0 t calculate_odm_slice_in_timing_active +ffffffff82039160 T resource_build_scaling_params_for_context +ffffffff820392b0 T resource_find_free_secondary_pipe_legacy +ffffffff82039350 T resource_find_free_pipe_used_in_cur_mpc_blending_tree +ffffffff820393c0 T resource_is_pipe_type +ffffffff82039440 T recource_find_free_pipe_not_used_in_cur_res_ctx +ffffffff820394c0 T resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine +ffffffff820395e0 T resource_is_for_mpcc_combine +ffffffff82039670 T resource_find_any_free_pipe +ffffffff820396e0 T resource_get_otg_master_for_stream +ffffffff82039810 T resource_get_opp_head +ffffffff820398a0 T dc_add_plane_to_context +ffffffff82039b60 T dc_remove_plane_from_context +ffffffff82039d40 T dc_rem_all_planes_for_stream +ffffffff82039f00 T dc_add_all_planes_for_stream +ffffffff8203a080 T dc_is_timing_changed +ffffffff8203a0e0 T dc_is_stream_unchanged +ffffffff8203a1c0 T dc_is_stream_scaling_unchanged +ffffffff8203a260 T update_audio_usage +ffffffff8203a2d0 T dc_add_stream_to_ctx +ffffffff8203a3a0 T dc_remove_stream_from_ctx +ffffffff8203a7b0 T resource_map_pool_resources +ffffffff8203b210 t acquire_first_split_pipe +ffffffff8203b380 t add_hpo_dp_link_enc_to_ctx +ffffffff8203b450 t find_first_free_audio +ffffffff8203b500 T dc_resource_state_copy_construct_current +ffffffff8203b520 T dc_resource_state_copy_construct +ffffffff8203b6c0 T dc_resource_state_construct +ffffffff8203b6e0 T dc_resource_is_dsc_encoding_supported +ffffffff8203b730 T dc_validate_with_context +ffffffff8203c360 t planes_changed_for_existing_stream +ffffffff8203c4e0 T dc_validate_global_state +ffffffff8203c860 T dc_resource_state_destruct +ffffffff8203c940 T dc_resource_find_first_free_pll +ffffffff8203c9b0 T resource_build_info_frame +ffffffff8203d0e0 T resource_map_clock_resources +ffffffff8203d270 T pipe_need_reprogram +ffffffff8203d3e0 T resource_build_bit_depth_reduction_params +ffffffff8203d610 T dc_validate_stream +ffffffff8203d7e0 T dc_validate_plane +ffffffff8203d870 T resource_pixel_format_to_bpp +ffffffff8203d8f0 T get_audio_check +ffffffff8203da10 T get_temp_dp_link_res +ffffffff8203db20 T reset_syncd_pipes_from_disabled_pipes +ffffffff8203dc70 T check_syncd_pipes_for_disabled_master_pipe +ffffffff8203ddb0 T reset_sync_context_for_pipe +ffffffff8203de60 T resource_transmitter_to_phy_idx +ffffffff8203dec0 T get_link_hwss +ffffffff8203df50 T is_h_timing_divisible_by_2 +ffffffff8203dfb0 T dc_resource_acquire_secondary_pipe_for_mpc_odm +ffffffff8203e1c0 T update_dp_encoder_resources_for_test_harness +ffffffff8203e480 t calculate_plane_rec_in_timing_active +ffffffff8203e750 t calculate_init_and_vp +ffffffff8203f000 T dc_sink_retain +ffffffff8203f030 T dc_sink_release +ffffffff8203f0a0 T dc_sink_create +ffffffff82040000 T dc_stat_get_dmub_notification +ffffffff820400b0 T dc_stat_get_dmub_dataout +ffffffff82041000 T update_stream_signal +ffffffff82041080 T dc_stream_retain +ffffffff820410b0 T dc_stream_release +ffffffff82041130 T dc_create_stream_for_sink +ffffffff82041470 T dc_copy_stream +ffffffff82041540 T dc_stream_get_status_from_state +ffffffff820415a0 T dc_stream_get_status +ffffffff82041610 T dc_optimize_timing_for_fsft +ffffffff82041660 T dc_stream_set_cursor_attributes +ffffffff82041860 t program_cursor_attributes +ffffffff820419c0 T dc_stream_set_cursor_position +ffffffff82041ae0 t program_cursor_position +ffffffff82041c20 T dc_stream_add_writeback +ffffffff82041e30 T dc_stream_remove_writeback +ffffffff82041f60 T dc_stream_warmup_writeback +ffffffff82041fa0 T dc_stream_get_vblank_counter +ffffffff82042070 T dc_stream_send_dp_sdp +ffffffff82042300 T dc_stream_get_scanoutpos +ffffffff820423e0 T dc_stream_dmdata_status_done +ffffffff820424a0 T dc_stream_set_dynamic_metadata +ffffffff82042600 T dc_stream_add_dsc_to_resource +ffffffff82042650 T dc_stream_get_pipe_ctx +ffffffff82042700 T dc_stream_log +ffffffff82043000 T enable_surface_flip_reporting +ffffffff82043030 T dc_create_plane_state +ffffffff820431d0 T dc_plane_get_status +ffffffff82043350 T dc_plane_state_retain +ffffffff82043380 T dc_plane_state_release +ffffffff820434d0 T dc_gamma_retain +ffffffff82043500 T dc_gamma_release +ffffffff82043560 T dc_create_gamma +ffffffff820435b0 T dc_transfer_func_retain +ffffffff820435e0 T dc_transfer_func_release +ffffffff82043630 T dc_create_transfer_func +ffffffff82043680 T dc_create_3dlut_func +ffffffff820436e0 T dc_3dlut_func_release +ffffffff82043730 T dc_3dlut_func_retain +ffffffff82044000 T vm_helper_mark_vmid_used +ffffffff82044030 T dc_setup_system_context +ffffffff820440c0 T dc_setup_vm_context +ffffffff820440f0 T dc_get_vmid_use_vector +ffffffff82044150 T vm_helper_init +ffffffff82045000 T dc_dmub_srv_create +ffffffff820450a0 T dc_dmub_srv_destroy +ffffffff820450f0 T dc_dmub_srv_wait_idle +ffffffff82045150 T dc_dmub_srv_log_diagnostic_data +ffffffff82045690 T dc_dmub_srv_clear_inbox0_ack +ffffffff820456f0 T dc_dmub_srv_wait_for_inbox0_ack +ffffffff82045750 T dc_dmub_srv_send_inbox0_cmd +ffffffff820457b0 T dc_dmub_srv_cmd_run +ffffffff820457d0 T dc_dmub_srv_cmd_run_list +ffffffff82045980 T dc_dmub_srv_optimized_init_done +ffffffff82045a00 T dc_dmub_srv_notify_stream_mask +ffffffff82045a60 T dc_dmub_srv_is_restore_required +ffffffff82045ae0 T dc_dmub_srv_get_dmub_outbox0_msg +ffffffff82045b10 T dc_dmub_trace_event_control +ffffffff82045b30 T dc_dmub_srv_drr_update_cmd +ffffffff82045bc0 T dc_dmub_srv_set_drr_manual_trigger_cmd +ffffffff82045c50 T dc_dmub_srv_p_state_delegate +ffffffff82046000 T dc_dmub_srv_query_caps_cmd +ffffffff820460c0 T dc_dmub_srv_get_visual_confirm_color_cmd +ffffffff820461a0 T dc_dmub_setup_subvp_dmub_command +ffffffff82046bb0 T dc_dmub_srv_get_diagnostic_data +ffffffff82046bf0 T dc_send_update_cursor_info_to_dmu +ffffffff82046f60 T dc_dmub_check_min_version +ffffffff82046fa0 T dc_dmub_srv_enable_dpia_trace +ffffffff82048000 T dc_edid_parser_send_cea +ffffffff820480b0 T dc_edid_parser_recv_cea_ack +ffffffff82048140 T dc_edid_parser_recv_amd_vsdb +ffffffff82049000 T generic_reg_update_ex +ffffffff82049330 t set_reg_field_values +ffffffff820494e0 T generic_reg_set_ex +ffffffff820496d0 T generic_reg_get +ffffffff82049740 T generic_reg_get2 +ffffffff820497d0 T generic_reg_get3 +ffffffff82049870 T generic_reg_get4 +ffffffff82049920 T generic_reg_get5 +ffffffff820499e0 T generic_reg_get6 +ffffffff82049ac0 T generic_reg_get7 +ffffffff82049bb0 T generic_reg_get8 +ffffffff82049cc0 T generic_reg_wait +ffffffff82049f10 T generic_write_indirect_reg +ffffffff82049f60 T generic_read_indirect_reg +ffffffff8204a000 T generic_indirect_reg_get +ffffffff8204a1b0 T generic_indirect_reg_update_ex +ffffffff8204a3c0 T generic_indirect_reg_update_ex_sync +ffffffff8204a5b0 T generic_indirect_reg_get_sync +ffffffff8204a6e0 T reg_sequence_start_gather +ffffffff8204a770 T reg_sequence_start_execute +ffffffff8204a910 T reg_sequence_wait_done +ffffffff8204a970 T dce_version_to_string +ffffffff8204b000 T dce_abm_create +ffffffff8204b0b0 T dce_abm_destroy +ffffffff8204b100 t dce_abm_init +ffffffff8204b380 t dce_abm_set_level +ffffffff8204b480 t dce_abm_immediate_disable +ffffffff8204b4d0 t dce_abm_set_pipe +ffffffff8204b620 t dce_abm_set_backlight_level_pwm +ffffffff8204b810 t dce_abm_get_current_backlight +ffffffff8204b840 t dce_abm_get_target_backlight +ffffffff8204c000 T dce_aud_az_enable +ffffffff8204c150 T dce_aud_az_disable +ffffffff8204c340 T dce_aud_az_configure +ffffffff8204cfc0 t check_audio_bandwidth +ffffffff8204d150 T dce_aud_wall_dto_setup +ffffffff8204d2d0 T dce_aud_hw_init +ffffffff8204d4a0 T dce_aud_destroy +ffffffff8204d4f0 T dce_audio_create +ffffffff8204d5b0 t dce_aud_endpoint_valid +ffffffff8204e000 T dce110_engine_destroy +ffffffff8204e050 T dce110_aux_engine_construct +ffffffff8204e0d0 t dce_aux_configure_timeout +ffffffff8204e2b0 T dce_aux_transfer_raw +ffffffff8204eae0 t acquire +ffffffff8204ed50 T dce_aux_transfer_dmub_raw +ffffffff8204ee50 T dce_aux_transfer_with_retries +ffffffff82050000 T look_up_in_video_optimized_rate_tlb +ffffffff82050070 T dce110_clk_src_construct +ffffffff82050270 t calc_pll_max_vco_construct +ffffffff82050410 T dce112_clk_src_construct +ffffffff820504a0 T dcn20_clk_src_construct +ffffffff82050550 T dcn3_clk_src_construct +ffffffff82050600 T dcn31_clk_src_construct +ffffffff820506b0 T dcn301_clk_src_construct +ffffffff82050760 t dce110_clock_source_power_down +ffffffff820507f0 t dce110_program_pix_clk +ffffffff82050e80 t dce110_get_pix_clk_dividers +ffffffff82051500 t get_pixel_clk_frequency_100hz +ffffffff82051610 t get_ss_info_from_atombios +ffffffff820518e0 t dce112_program_pix_clk +ffffffff82051af0 t dce112_get_pix_clk_dividers +ffffffff82051c00 t dcn20_program_pix_clk +ffffffff82051c90 t dcn20_override_dp_pix_clk +ffffffff82051d80 t dcn3_program_pix_clk +ffffffff82051f30 t dcn3_get_pix_clk_dividers +ffffffff82052000 t dcn31_program_pix_clk +ffffffff82053000 T dce_dmcu_create +ffffffff820530c0 T dcn10_dmcu_create +ffffffff82053180 T dcn20_dmcu_create +ffffffff82053240 T dcn21_dmcu_create +ffffffff82053330 T dce_dmcu_destroy +ffffffff82053380 t dce_dmcu_init +ffffffff820533b0 t dce_dmcu_load_iram +ffffffff82053510 t dce_dmcu_set_psr_enable +ffffffff82053640 t dce_dmcu_setup_psr +ffffffff82053970 t dce_get_dmcu_psr_state +ffffffff82053a50 t dce_psr_wait_loop +ffffffff82053b80 t dce_get_psr_wait_loop +ffffffff82053bb0 t dce_is_dmcu_initialized +ffffffff82053c10 t dcn10_dmcu_init +ffffffff82054150 t dcn10_dmcu_load_iram +ffffffff82054390 t dcn10_dmcu_set_psr_enable +ffffffff82054520 t dcn10_dmcu_setup_psr +ffffffff820548e0 t dcn10_get_dmcu_psr_state +ffffffff82054a00 t dcn10_psr_wait_loop +ffffffff82054b10 t dcn10_get_psr_wait_loop +ffffffff82054b40 t dcn10_is_dmcu_initialized +ffffffff82054b70 t dcn10_send_edid_cea +ffffffff82054d10 t dcn10_recv_amd_vsdb +ffffffff82054dc0 t dcn10_recv_edid_cea_ack +ffffffff82054e40 t dcn10_get_scp_results +ffffffff82054f60 t dcn20_lock_phy +ffffffff82055090 t dcn20_unlock_phy +ffffffff820551c0 t dcn21_dmcu_init +ffffffff82056000 T dce_enable_fe_clock +ffffffff82056040 T dce_pipe_control_lock +ffffffff82056240 T dce_set_blender_mode +ffffffff82056350 T dce_clock_gating_power_up +ffffffff820563f0 T dce_crtc_switch_to_clk_src +ffffffff820565b0 T dce_use_lut +ffffffff82057000 T dce_i2c_oem_device_present +ffffffff82057080 T dce_i2c_submit_command +ffffffff82058000 T acquire_i2c_hw_engine +ffffffff820583a0 T dce_i2c_submit_command_hw +ffffffff82058ce0 t set_speed +ffffffff82058e30 T dce_i2c_hw_construct +ffffffff82058ea0 T dce100_i2c_hw_construct +ffffffff82058f10 T dce112_i2c_hw_construct +ffffffff82058f80 T dcn1_i2c_hw_construct +ffffffff82058ff0 T dcn2_i2c_hw_construct +ffffffff82059080 t is_hw_busy +ffffffff8205a000 T dce_i2c_sw_construct +ffffffff8205a030 T dce_i2c_engine_acquire_sw +ffffffff8205a0d0 T dce_i2c_submit_command_sw +ffffffff8205a8a0 t write_byte_sw +ffffffff8205b000 T dce_ipp_construct +ffffffff8205b050 T dce_ipp_destroy +ffffffff8205b0a0 t dce_ipp_cursor_set_position +ffffffff8205b1d0 t dce_ipp_cursor_set_attributes +ffffffff8205b460 t dce_ipp_program_prescale +ffffffff8205b620 t dce_ipp_program_input_lut +ffffffff8205ba90 t dce_ipp_set_degamma +ffffffff8205c000 T dce110_get_dig_frontend +ffffffff8205c0c0 T dce110_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff8205c160 T dce110_psr_program_dp_dphy_fast_training +ffffffff8205c1d0 T dce110_psr_program_secondary_packet +ffffffff8205c240 T dce110_is_dig_enabled +ffffffff8205c2a0 T dce110_link_encoder_validate_dvi_output +ffffffff8205c350 T dce110_link_encoder_validate_dp_output +ffffffff8205c380 T dce110_link_encoder_construct +ffffffff8205c550 T dce110_link_encoder_validate_output_with_stream +ffffffff8205c700 T dce110_link_encoder_hw_init +ffffffff8205c920 T dce110_link_encoder_destroy +ffffffff8205c970 T dce110_link_encoder_setup +ffffffff8205caa0 T dce110_link_encoder_enable_tmds_output +ffffffff8205cb90 T dce110_link_encoder_enable_lvds_output +ffffffff8205cc80 T dce110_link_encoder_enable_dp_output +ffffffff8205cde0 T dce110_link_encoder_enable_dp_mst_output +ffffffff8205cf40 T dce110_link_encoder_disable_output +ffffffff8205d150 T dce110_link_encoder_dp_set_lane_settings +ffffffff8205d2f0 T dce110_link_encoder_dp_set_phy_pattern +ffffffff8205daf0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff8205dd10 T dce110_link_encoder_update_mst_stream_allocation_table +ffffffff8205df80 T dce110_link_encoder_connect_dig_be_to_fe +ffffffff8205e0b0 T dce110_link_encoder_enable_hpd +ffffffff8205e0e0 T dce110_link_encoder_disable_hpd +ffffffff8205e110 T dce110_link_encoder_get_max_link_cap +ffffffff8205f000 T dce_mem_input_construct +ffffffff8205f060 T dce112_mem_input_construct +ffffffff8205f0c0 T dce120_mem_input_construct +ffffffff8205f120 t dce_mi_program_display_marks +ffffffff8205f3f0 t dce_mi_allocate_dmif +ffffffff8205f630 t dce_mi_free_dmif +ffffffff8205f790 t dce_mi_program_surface_flip_and_addr +ffffffff8205fab0 t dce_mi_program_pte_vm +ffffffff8205fc70 t dce_mi_program_surface_config +ffffffff820604f0 t dce_mi_is_flip_pending +ffffffff82060580 t program_nbp_watermark +ffffffff82060780 t dce112_mi_program_display_marks +ffffffff82060c90 t dce120_mi_program_display_marks +ffffffff82061150 t dce120_program_stutter_watermark +ffffffff82062000 T dce110_opp_set_clamping +ffffffff820622b0 T dce110_opp_program_bit_depth_reduction +ffffffff82062a80 T dce110_opp_program_clamping_and_pixel_encoding +ffffffff82062c20 T dce110_opp_set_dyn_expansion +ffffffff82062d70 T dce110_opp_program_fmt +ffffffff82062ef0 T dce110_opp_construct +ffffffff82062f50 T dce110_opp_destroy +ffffffff82063000 T dce_panel_cntl_construct +ffffffff82063060 t dce_panel_cntl_destroy +ffffffff820630b0 t dce_panel_cntl_hw_init +ffffffff820632f0 t dce_is_panel_backlight_on +ffffffff820633a0 t dce_is_panel_powered_on +ffffffff82063450 t dce_store_backlight_level +ffffffff820634f0 t dce_driver_set_backlight +ffffffff82063670 t dce_get_16_bit_backlight_from_pwm +ffffffff82064000 T get_filter_3tap_16p +ffffffff82064090 T get_filter_3tap_64p +ffffffff82064120 T get_filter_4tap_16p +ffffffff820641b0 T get_filter_4tap_64p +ffffffff82064240 T get_filter_5tap_64p +ffffffff820642d0 T get_filter_6tap_64p +ffffffff82064360 T get_filter_7tap_64p +ffffffff820643f0 T get_filter_8tap_64p +ffffffff82064480 T get_filter_2tap_16p +ffffffff820644b0 T get_filter_2tap_64p +ffffffff82065000 T dce110_se_audio_mute_control +ffffffff82065050 T dce110_se_dp_audio_setup +ffffffff82065060 t dce110_se_audio_setup +ffffffff820651c0 T dce110_se_dp_audio_enable +ffffffff82065400 T dce110_se_dp_audio_disable +ffffffff82065560 T dce110_se_hdmi_audio_setup +ffffffff82065a60 T dce110_se_hdmi_audio_disable +ffffffff82065ac0 T dce110_stream_encoder_construct +ffffffff82065b10 t dce110_stream_encoder_dp_set_stream_attribute +ffffffff82066160 t dce110_stream_encoder_hdmi_set_stream_attribute +ffffffff82066690 t dce110_stream_encoder_dvi_set_stream_attribute +ffffffff820667c0 t dce110_stream_encoder_lvds_set_stream_attribute +ffffffff820668a0 t dce110_stream_encoder_set_throttled_vcp_size +ffffffff82066aa0 t dce110_stream_encoder_update_hdmi_info_packets +ffffffff82067190 t dce110_stream_encoder_stop_hdmi_info_packets +ffffffff82067430 t dce110_stream_encoder_update_dp_info_packets +ffffffff820675c0 t dce110_stream_encoder_stop_dp_info_packets +ffffffff82067730 t dce110_stream_encoder_dp_blank +ffffffff82067870 t dce110_stream_encoder_dp_unblank +ffffffff82067a30 t setup_stereo_sync +ffffffff82067ab0 t dce110_stream_encoder_set_avmute +ffffffff82067af0 t dig_connect_to_otg +ffffffff82067b30 t dce110_reset_hdmi_stream_attribute +ffffffff82067c30 t dig_source_otg +ffffffff82067ca0 t dce110_stream_encoder_set_stream_attribute_helper +ffffffff82067d90 t dce110_update_generic_info_packet +ffffffff82069000 T dce_transform_get_optimal_number_of_taps +ffffffff82069300 T dce110_opp_set_csc_adjustment +ffffffff820693c0 t program_color_matrix +ffffffff820695f0 T dce110_opp_set_csc_default +ffffffff82069730 T dce110_opp_program_regamma_pwl +ffffffff82069fe0 T dce110_opp_power_on_regamma_lut +ffffffff8206a0a0 T dce110_opp_set_regamma_mode +ffffffff8206a110 T dce_transform_construct +ffffffff8206a190 t dce_transform_reset +ffffffff8206a1d0 t dce_transform_set_scaler +ffffffff8206ac70 t dce_transform_set_pixel_storage_depth +ffffffff8206b120 t dce_transform_set_gamut_remap +ffffffff8206b460 t program_multi_taps_filter +ffffffff8206c000 T dmub_abm_create +ffffffff8206c0d0 T dmub_abm_destroy +ffffffff8206c120 t dmub_abm_init_ex +ffffffff8206c130 t dmub_abm_set_level_ex +ffffffff8206c1e0 t dmub_abm_set_backlight_level_pwm_ex +ffffffff8206c280 t dmub_abm_get_current_backlight_ex +ffffffff8206c290 t dmub_abm_get_target_backlight_ex +ffffffff8206c2a0 t dmub_abm_init_config_ex +ffffffff8206c330 t dmub_abm_set_pause_ex +ffffffff8206c3d0 t dmub_abm_save_restore_ex +ffffffff8206c460 t dmub_abm_set_pipe_ex +ffffffff8206d000 T dmub_abm_init +ffffffff8206d3c0 T dmub_abm_get_current_backlight +ffffffff8206d3f0 T dmub_abm_get_target_backlight +ffffffff8206d420 T dmub_abm_set_level +ffffffff8206d4b0 T dmub_abm_init_config +ffffffff8206d5b0 T dmub_abm_set_pause +ffffffff8206d650 T dmub_abm_save_restore +ffffffff8206d770 T dmub_abm_set_pipe +ffffffff8206d810 T dmub_abm_set_backlight_level +ffffffff8206e000 T dmub_hw_lock_mgr_cmd +ffffffff8206e0a0 T dmub_hw_lock_mgr_inbox0_cmd +ffffffff8206e0e0 T should_use_dmub_lock +ffffffff8206f000 T dmub_enable_outbox_notification +ffffffff82070000 T dmub_psr_create +ffffffff82070090 T dmub_psr_destroy +ffffffff820700e0 t dmub_psr_copy_settings +ffffffff820705d0 t dmub_psr_enable +ffffffff82070750 t dmub_psr_get_state +ffffffff82070a60 t dmub_psr_set_level +ffffffff82070b30 t dmub_psr_force_static +ffffffff82070bd0 t dmub_psr_get_residency +ffffffff82070c20 t dmub_psr_set_sink_vtotal_in_psr_active +ffffffff82070cc0 t dmub_psr_set_power_opt +ffffffff82071000 T dmub_replay_create +ffffffff82071090 T dmub_replay_destroy +ffffffff820710e0 t dmub_replay_get_state +ffffffff820711d0 t dmub_replay_enable +ffffffff820713f0 t dmub_replay_copy_settings +ffffffff820716b0 t dmub_replay_set_power_opt +ffffffff82071750 t dmub_replay_set_coasting_vtotal +ffffffff820717e0 t dmub_replay_residency +ffffffff82072000 T dce100_enable_display_power_gating +ffffffff820720a0 T dce100_prepare_bandwidth +ffffffff820720f0 T dce100_optimize_bandwidth +ffffffff82072140 T dce100_hw_sequencer_construct +ffffffff82073000 T dce100_add_stream_to_ctx +ffffffff820730a0 T dce100_validate_plane +ffffffff820730e0 T dce100_find_first_free_match_stream_enc_for_link +ffffffff82073190 T dce100_create_resource_pool +ffffffff82073f60 t dce100_resource_destruct +ffffffff82074220 t dce100_destroy_resource_pool +ffffffff82074280 t dce100_panel_cntl_create +ffffffff82074310 t dce100_link_encoder_create +ffffffff82074410 t dce100_validate_bandwidth +ffffffff82074550 t dce100_validate_global +ffffffff820745f0 t read_dce_straps +ffffffff82074660 t create_audio +ffffffff82074690 t dce100_stream_encoder_create +ffffffff82074730 t dce100_hwseq_create +ffffffff82075000 T dce110_compressor_power_up_fbc +ffffffff82075130 T dce110_compressor_enable_fbc +ffffffff82075340 T dce110_compressor_is_fbc_enabled_in_hw +ffffffff820753f0 T dce110_compressor_disable_fbc +ffffffff820756c0 T dce110_compressor_program_compressed_surface_address_and_pitch +ffffffff820757e0 T dce110_compressor_set_fbc_invalidation_triggers +ffffffff82075860 T dce110_compressor_create +ffffffff82075900 T dce110_compressor_construct +ffffffff82075980 T dce110_compressor_destroy +ffffffff820759d0 T get_max_support_fbc_buffersize +ffffffff82076000 T dce110_update_info_frame +ffffffff820760f0 T dce110_enable_stream +ffffffff82076190 T dce110_edp_wait_for_hpd_ready +ffffffff820763f0 T dce110_edp_power_control +ffffffff82076950 T dce110_edp_wait_for_T12 +ffffffff82076b00 T dce110_edp_backlight_control +ffffffff82076e60 T dce110_enable_audio_stream +ffffffff82076f20 T dce110_disable_audio_stream +ffffffff82076fe0 T dce110_disable_stream +ffffffff82077240 T dce110_unblank_stream +ffffffff82077340 T dce110_blank_stream +ffffffff820774b0 T dce110_set_avmute +ffffffff82077500 T dce110_enable_accelerated_mode +ffffffff820778b0 t power_down_all_hw_blocks +ffffffff82077a80 T dce110_set_safe_displaymarks +ffffffff82077ba0 T dce110_apply_ctx_to_hw +ffffffff820784a0 t enable_fbc +ffffffff82078660 T dce110_power_down +ffffffff82078750 T dce110_prepare_bandwidth +ffffffff820788a0 T dce110_optimize_bandwidth +ffffffff82078aa0 T dce110_set_backlight_level +ffffffff82078bb0 T dce110_set_abm_immediate_disable +ffffffff82078c30 T dce110_set_pipe +ffffffff82078ca0 T dce110_enable_lvds_link_output +ffffffff82078d00 T dce110_enable_tmds_link_output +ffffffff82078d70 T dce110_enable_dp_link_output +ffffffff82078fa0 T dce110_disable_link_output +ffffffff82079090 T dce110_hw_sequencer_construct +ffffffff820790e0 t enable_display_pipe_clock_gating +ffffffff82079110 t build_audio_output +ffffffff82079270 t init_hw +ffffffff82079510 t dce110_power_down_fe +ffffffff820795e0 t dce110_apply_ctx_for_surface +ffffffff82079d20 t dce110_post_unlock_program_front_end +ffffffff82079d50 t update_plane_addr +ffffffff82079dc0 t dce110_wait_for_mpcc_disconnect +ffffffff82079df0 t dce110_update_pending_status +ffffffff82079ed0 t get_position +ffffffff82079f60 t dce110_enable_per_frame_crtc_position_reset +ffffffff8207a200 t dce110_enable_timing_synchronization +ffffffff8207a4f0 t set_drr +ffffffff8207a5d0 t set_static_screen_control +ffffffff8207a6a0 t dce110_set_cursor_position +ffffffff8207a7f0 t dce110_set_cursor_attribute +ffffffff8207a8b0 t program_gamut_remap +ffffffff8207aa00 t program_output_csc +ffffffff8207ab00 t init_pipes +ffffffff8207ab30 t dce110_reset_hw_ctx_wrap +ffffffff8207ad90 t dce110_set_input_transfer_func +ffffffff8207af20 t dce110_set_output_transfer_func +ffffffff8207b830 t dce110_enable_display_power_gating +ffffffff8207b990 t dce110_enable_stream_timing +ffffffff8207c000 T dce110_mem_input_v_construct +ffffffff8207c040 t dce_mem_input_v_program_display_marks +ffffffff8207c0c0 t dce_mem_input_program_chroma_display_marks +ffffffff8207c140 t dce110_allocate_mem_input_v +ffffffff8207c250 t dce110_free_mem_input_v +ffffffff8207c280 t dce_mem_input_v_program_surface_flip_and_addr +ffffffff8207c3d0 t dce_mem_input_v_program_pte_vm +ffffffff8207c6a0 t dce_mem_input_v_program_surface_config +ffffffff8207ca70 t dce_mem_input_v_is_surface_pending +ffffffff8207cae0 t program_urgency_watermark +ffffffff8207cbf0 t program_nbp_watermark +ffffffff8207cd60 t program_stutter_watermark +ffffffff8207d000 T dce110_opp_v_set_csc_default +ffffffff8207d300 t program_color_matrix_v +ffffffff8207d470 t configure_graphics_mode_v +ffffffff8207d560 T dce110_opp_v_set_csc_adjustment +ffffffff8207e000 T dce110_opp_program_regamma_pwl_v +ffffffff8207e4b0 t power_on_lut +ffffffff8207e5d0 T dce110_opp_power_on_regamma_lut_v +ffffffff8207e630 T dce110_opp_set_regamma_mode_v +ffffffff8207f000 T dce110_opp_v_construct +ffffffff82080000 T dce110_resource_build_pipe_hw_param +ffffffff82080150 T dce110_find_first_free_match_stream_enc_for_link +ffffffff820801f0 T dce110_create_resource_pool +ffffffff82081190 t dce110_resource_destruct +ffffffff820814b0 t dce110_destroy_resource_pool +ffffffff82081510 t dce110_panel_cntl_create +ffffffff820815a0 t dce110_link_encoder_create +ffffffff820816a0 t dce110_validate_bandwidth +ffffffff82081790 t dce110_validate_global +ffffffff82081870 t dce110_acquire_underlay +ffffffff82081a50 t dce110_validate_plane +ffffffff82081ab0 t dce110_add_stream_to_ctx +ffffffff82081b80 t read_dce_straps +ffffffff82081bf0 t create_audio +ffffffff82081c20 t dce110_stream_encoder_create +ffffffff82081cc0 t dce110_hwseq_create +ffffffff82082000 T dce110_timing_generator_set_early_control +ffffffff82082070 T dce110_timing_generator_enable_crtc +ffffffff82082100 T dce110_timing_generator_program_blank_color +ffffffff82082190 T dce110_timing_generator_disable_crtc +ffffffff820821e0 T dce110_timing_generator_program_timing_generator +ffffffff820823d0 T dce110_timing_generator_set_drr +ffffffff82082510 T dce110_timing_generator_set_static_screen_control +ffffffff820825a0 T dce110_timing_generator_get_vblank_counter +ffffffff82082600 T dce110_timing_generator_get_position +ffffffff820826a0 T dce110_timing_generator_get_crtc_scanoutpos +ffffffff82082790 T dce110_timing_generator_program_blanking +ffffffff82082a00 T dce110_timing_generator_set_test_pattern +ffffffff82082cf0 T dce110_timing_generator_validate_timing +ffffffff82082db0 T dce110_timing_generator_wait_for_vblank +ffffffff82082f20 T dce110_timing_generator_is_counter_moving +ffffffff82082fa0 T dce110_timing_generator_wait_for_vactive +ffffffff82083080 T dce110_timing_generator_setup_global_swap_lock +ffffffff820831e0 T dce110_timing_generator_tear_down_global_swap_lock +ffffffff82083260 T dce110_timing_generator_enable_advanced_request +ffffffff82083300 T dce110_timing_generator_set_lock_master +ffffffff82083360 T dce110_timing_generator_enable_reset_trigger +ffffffff82083450 T dce110_timing_generator_enable_crtc_reset +ffffffff82083640 T dce110_timing_generator_disable_reset_trigger +ffffffff82083730 T dce110_timing_generator_did_triggered_reset_occur +ffffffff820837c0 T dce110_timing_generator_disable_vga +ffffffff82083820 T dce110_timing_generator_set_overscan_color_black +ffffffff820838c0 T dce110_tg_program_blank_color +ffffffff82083980 T dce110_tg_set_overscan_color +ffffffff820839e0 T dce110_tg_program_timing +ffffffff82083a10 T dce110_tg_is_blanked +ffffffff82083a70 T dce110_tg_set_blank +ffffffff82083ad0 T dce110_tg_validate_timing +ffffffff82083b90 T dce110_tg_wait_for_state +ffffffff82083c90 T dce110_tg_set_colors +ffffffff82083de0 T dce110_arm_vert_intr +ffffffff82083eb0 T dce110_configure_crc +ffffffff82084010 t dce110_is_tg_enabled +ffffffff82084070 T dce110_get_crc +ffffffff82084140 T dce110_timing_generator_construct +ffffffff82085000 T dce110_timing_generator_v_construct +ffffffff82085070 t dce110_timing_generator_v_program_timing +ffffffff82085340 t dce110_timing_generator_v_enable_crtc +ffffffff820853d0 t dce110_timing_generator_v_disable_crtc +ffffffff82085440 t dce110_timing_generator_v_is_counter_moving +ffffffff820854c0 t dce110_timing_generator_v_get_vblank_counter +ffffffff82085510 t dce110_timing_generator_v_set_early_control +ffffffff82085570 t dce110_timing_generator_v_wait_for_state +ffffffff82085700 t dce110_timing_generator_v_set_blank +ffffffff82085790 t dce110_timing_generator_v_set_overscan_color_black +ffffffff82085830 t dce110_timing_generator_v_program_blank_color +ffffffff820858b0 t dce110_timing_generator_v_set_colors +ffffffff820859e0 t dce110_timing_generator_v_disable_vga +ffffffff82085a10 t dce110_timing_generator_v_did_triggered_reset_occur +ffffffff82085a50 t dce110_timing_generator_v_setup_global_swap_lock +ffffffff82085a70 t dce110_timing_generator_v_enable_reset_trigger +ffffffff82085a90 t dce110_timing_generator_v_disable_reset_trigger +ffffffff82085ab0 t dce110_timing_generator_v_tear_down_global_swap_lock +ffffffff82085ad0 t dce110_timing_generator_v_enable_advanced_request +ffffffff82086000 T dce110_transform_v_construct +ffffffff82086060 t dce110_xfmv_reset +ffffffff820860c0 t dce110_xfmv_set_scaler +ffffffff82086800 t dce110_xfmv_set_pixel_storage_depth +ffffffff820868e0 t dce110_xfmv_set_gamut_remap +ffffffff82086910 t program_multi_taps_filter +ffffffff82086d00 t program_viewport +ffffffff82087000 T dce112_compressor_power_up_fbc +ffffffff82087130 T dce112_compressor_enable_fbc +ffffffff820872e0 T dce112_compressor_is_fbc_enabled_in_hw +ffffffff82087390 T dce112_compressor_enable_lpt +ffffffff820874b0 t wait_for_fbc_state_changed +ffffffff82087750 T dce112_compressor_disable_fbc +ffffffff82087850 T dce112_compressor_disable_lpt +ffffffff820879b0 T dce112_compressor_is_lpt_enabled_in_hw +ffffffff82087a00 T dce112_compressor_program_compressed_surface_address_and_pitch +ffffffff82087b40 T dce112_compressor_program_lpt_control +ffffffff82087db0 T dce112_compressor_set_fbc_invalidation_triggers +ffffffff82087e40 T dce112_compressor_construct +ffffffff82087f00 T dce112_compressor_create +ffffffff82087ff0 T dce112_compressor_destroy +ffffffff82089000 T dce112_hw_sequencer_construct +ffffffff82089050 t dce112_enable_display_power_gating +ffffffff8208a000 T dce112_validate_bandwidth +ffffffff8208a0c0 T resource_map_phy_clock_resources +ffffffff8208a230 T dce112_add_stream_to_ctx +ffffffff8208a2d0 T dce112_create_resource_pool +ffffffff8208b620 t dce112_resource_destruct +ffffffff8208b8e0 t dce112_destroy_resource_pool +ffffffff8208b940 t dce112_panel_cntl_create +ffffffff8208b9d0 t dce112_link_encoder_create +ffffffff8208bad0 t dce112_validate_global +ffffffff8208bb70 t read_dce_straps +ffffffff8208bbe0 t create_audio +ffffffff8208bc10 t dce112_stream_encoder_create +ffffffff8208bcb0 t dce112_hwseq_create +ffffffff8208c000 T dce121_xgmi_enabled +ffffffff8208c060 T dce120_hw_sequencer_construct +ffffffff8208c0c0 t dce120_enable_display_power_gating +ffffffff8208c0f0 t dce120_update_dchub +ffffffff8208d000 T dce120_create_resource_pool +ffffffff8208e320 t dce120_resource_destruct +ffffffff8208e600 t dce120_destroy_resource_pool +ffffffff8208e660 t dce120_panel_cntl_create +ffffffff8208e6f0 t dce120_link_encoder_create +ffffffff8208e7f0 t read_dce_straps +ffffffff8208e880 t create_audio +ffffffff8208e8b0 t dce120_stream_encoder_create +ffffffff8208e950 t dce121_hwseq_create +ffffffff8208e9c0 t dce120_hwseq_create +ffffffff8208f000 T dce120_timing_generator_construct +ffffffff8208f090 t dce120_tg_validate_timing +ffffffff8208f140 t dce120_tg_program_timing +ffffffff8208f310 t dce120_timing_generator_enable_crtc +ffffffff8208f3b0 t dce120_timing_generator_get_crtc_position +ffffffff8208f450 t dce120_timing_generator_get_vblank_counter +ffffffff8208f4b0 t dce120_timing_generator_get_crtc_scanoutpos +ffffffff8208f5a0 t dce120_timing_generator_set_early_control +ffffffff8208f5e0 t dce120_tg_wait_for_state +ffffffff8208f6f0 t dce120_tg_set_blank +ffffffff8208f7b0 t dce120_tg_is_blanked +ffffffff8208f810 t dce120_timing_generator_set_overscan_color_black +ffffffff8208f8e0 t dce120_timing_generator_program_blank_color +ffffffff8208f960 t dce120_tg_set_colors +ffffffff8208fa80 t dce120_timing_generator_disable_vga +ffffffff8208faf0 t dce120_timing_generator_did_triggered_reset_occur +ffffffff8208fb50 t dce120_timing_generator_setup_global_swap_lock +ffffffff8208fc80 t dce120_timing_generator_enable_reset_trigger +ffffffff8208fd90 t dce120_timing_generator_disable_reset_trigger +ffffffff8208fe40 t dce120_timing_generator_tear_down_global_swap_lock +ffffffff8208ff10 t dce120_timing_generator_enable_advanced_request +ffffffff8208ffb0 t dce120_timing_generator_set_drr +ffffffff82090180 t dce120_timing_generator_set_static_screen_control +ffffffff82090200 t dce120_timing_generator_set_test_pattern +ffffffff820906a0 t dce120_arm_vert_intr +ffffffff82090760 t dce120_is_tg_enabled +ffffffff820907c0 t dce120_configure_crc +ffffffff820909a0 t dce120_get_crc +ffffffff82091000 T dce80_hw_sequencer_construct +ffffffff82092000 T dce80_create_resource_pool +ffffffff82092e10 T dce81_create_resource_pool +ffffffff82093c10 T dce83_create_resource_pool +ffffffff820948f0 t dce80_resource_destruct +ffffffff82094ba0 t dce80_destroy_resource_pool +ffffffff82094c00 t dce80_panel_cntl_create +ffffffff82094c90 t dce80_link_encoder_create +ffffffff82094d90 t dce80_validate_bandwidth +ffffffff82094ed0 t dce80_validate_global +ffffffff82094f70 t read_dce_straps +ffffffff82094fe0 t create_audio +ffffffff82095010 t dce80_stream_encoder_create +ffffffff820950b0 t dce80_hwseq_create +ffffffff82096000 T dce80_timing_generator_construct +ffffffff82096090 t program_timing +ffffffff82096170 t dce80_timing_generator_enable_advanced_request +ffffffff82097000 T cm_helper_program_color_matrices +ffffffff820970c0 T cm_helper_program_xfer_func +ffffffff82097480 T cm_helper_convert_to_custom_float +ffffffff820978d0 T cm_helper_translate_curve_to_hw_format +ffffffff82098490 T cm_helper_translate_curve_to_degamma_hw_format +ffffffff82099000 T dpp_read_state +ffffffff82099270 T dpp1_get_optimal_number_of_taps +ffffffff82099410 T dpp_reset +ffffffff82099460 T dpp1_cnv_setup +ffffffff82099980 T dpp1_set_cursor_attributes +ffffffff82099ab0 T dpp1_set_cursor_position +ffffffff82099c00 T dpp1_cnv_set_optional_cursor_attributes +ffffffff82099cc0 T dpp1_dppclk_control +ffffffff82099dc0 T dpp1_construct +ffffffff82099e40 t dpp1_cm_set_regamma_pwl +ffffffff8209a000 T dpp1_cm_set_gamut_remap +ffffffff8209a1a0 T dpp1_cm_set_output_csc_default +ffffffff8209a220 t dpp1_cm_program_color_matrix +ffffffff8209a3e0 T dpp1_cm_set_output_csc_adjustment +ffffffff8209a3f0 T dpp1_cm_power_on_regamma_lut +ffffffff8209a470 T dpp1_cm_program_regamma_lut +ffffffff8209a680 T dpp1_cm_configure_regamma_lut +ffffffff8209a780 T dpp1_cm_program_regamma_luta_settings +ffffffff8209a920 T dpp1_cm_program_regamma_lutb_settings +ffffffff8209aac0 T dpp1_program_input_csc +ffffffff8209ad10 T dpp1_program_bias_and_scale +ffffffff8209ae80 T dpp1_program_degamma_lutb_settings +ffffffff8209b030 T dpp1_program_degamma_luta_settings +ffffffff8209b1e0 T dpp1_power_on_degamma_lut +ffffffff8209b260 T dpp1_set_degamma +ffffffff8209b450 T dpp1_degamma_ram_select +ffffffff8209b4b0 T dpp1_program_degamma_lut +ffffffff8209b7d0 T dpp1_set_degamma_pwl +ffffffff8209b9a0 T dpp1_full_bypass +ffffffff8209bb40 T dpp1_program_input_lut +ffffffff8209c1e0 T dpp1_set_hdr_multiplier +ffffffff8209d000 T dpp1_dscl_calc_lb_num_partitions +ffffffff8209d1e0 T dpp1_dscl_is_lb_conf_valid +ffffffff8209d220 T dpp1_dscl_set_scaler_manual_scale +ffffffff8209e640 t dpp1_dscl_get_filter_coeffs_64p +ffffffff8209e710 t dpp1_dscl_set_scaler_filter +ffffffff8209f000 t dwb1_get_caps +ffffffff8209f0a0 t dwb1_enable +ffffffff8209f1a0 t dwb1_disable +ffffffff8209f300 T dcn10_dwbc_construct +ffffffff820a0000 T hubbub1_wm_read_state +ffffffff820a0320 T hubbub1_allow_self_refresh_control +ffffffff820a03a0 T hubbub1_is_allow_self_refresh_enabled +ffffffff820a0410 T hubbub1_verify_allow_pstate_change_high +ffffffff820a05d0 T hubbub1_wm_change_req_wa +ffffffff820a0670 T hubbub1_program_urgent_watermarks +ffffffff820a0a50 T hubbub1_program_stutter_watermarks +ffffffff820a0eb0 T hubbub1_program_pstate_watermarks +ffffffff820a1100 T hubbub1_program_watermarks +ffffffff820a1230 T hubbub1_update_dchub +ffffffff820a1460 T hubbub1_toggle_watermark_change_req +ffffffff820a1500 T hubbub1_soft_reset +ffffffff820a1540 T hubbub1_construct +ffffffff820a15a0 t hubbub1_get_dcc_compression_cap +ffffffff820a17c0 t hubbub1_dcc_support_swizzle +ffffffff820a1850 t hubbub1_dcc_support_pixel_format +ffffffff820a2000 T hubp1_set_blank +ffffffff820a2110 T hubp1_clear_underflow +ffffffff820a2160 T hubp1_vready_workaround +ffffffff820a21f0 T hubp1_program_tiling +ffffffff820a2450 T hubp1_program_size +ffffffff820a25d0 T hubp1_program_rotation +ffffffff820a2740 T hubp1_program_pixel_format +ffffffff820a2d10 T hubp1_program_surface_flip_and_addr +ffffffff820a3590 T hubp1_dcc_control +ffffffff820a3650 T hubp1_program_surface_config +ffffffff820a3760 T hubp1_program_requestor +ffffffff820a3b30 T hubp1_program_deadline +ffffffff820a4240 T hubp1_is_flip_pending +ffffffff820a4350 T min_set_viewport +ffffffff820a4650 T hubp1_read_state_common +ffffffff820a5340 T hubp1_read_state +ffffffff820a5610 T hubp1_get_cursor_pitch +ffffffff820a56b0 T hubp1_cursor_set_attributes +ffffffff820a5960 T hubp1_cursor_set_position +ffffffff820a5cc0 T hubp1_clk_cntl +ffffffff820a5d10 T hubp1_vtg_sel +ffffffff820a5d50 T hubp1_in_blank +ffffffff820a5dc0 T hubp1_soft_reset +ffffffff820a5e00 T hubp1_set_flip_int +ffffffff820a5e50 T hubp1_init +ffffffff820a5e80 T dcn10_hubp_construct +ffffffff820a5ef0 t hubp1_setup +ffffffff820a5fb0 t hubp1_setup_interdependent +ffffffff820a6330 t hubp1_set_vm_system_aperture_settings +ffffffff820a6550 t hubp1_set_vm_context0_settings +ffffffff820a6830 t hubp1_set_hubp_blank_en +ffffffff820a6870 t hubp1_disconnect +ffffffff820a6900 t hubp1_disable_control +ffffffff820a6940 t hubp1_get_underflow_status +ffffffff820a69b0 t hubp1_wait_pipe_read_start +ffffffff820a7000 T dcn10_lock_all_pipes +ffffffff820a7130 T dcn10_log_hw_state +ffffffff820a8c10 T dcn10_did_underflow_occur +ffffffff820a8cb0 T dcn10_enable_power_gating_plane +ffffffff820a8e50 T dcn10_disable_vga +ffffffff820a9040 T dcn10_dpp_pg_control +ffffffff820a9290 T dcn10_hubp_pg_control +ffffffff820a94e0 T dcn10_bios_golden_init +ffffffff820a9640 T dcn10_enable_stream_timing +ffffffff820a9a40 T dcn10_verify_allow_pstate_change_high +ffffffff820a9d90 T dcn10_plane_atomic_disconnect +ffffffff820a9ec0 T dcn10_plane_atomic_power_down +ffffffff820aa020 T dcn10_plane_atomic_disable +ffffffff820aa160 T dcn10_disable_plane +ffffffff820aa300 T dcn10_init_pipes +ffffffff820aa9c0 T dcn10_init_hw +ffffffff820aaeb0 T dcn10_power_down_on_boot +ffffffff820ab000 T dcn10_reset_hw_ctx_wrap +ffffffff820ab340 T dcn10_update_plane_addr +ffffffff820ab460 T dcn10_set_input_transfer_func +ffffffff820ab5d0 T dcn10_set_output_transfer_func +ffffffff820ab6b0 T dcn10_pipe_control_lock +ffffffff820ab780 T dcn10_cursor_lock +ffffffff820ab940 T dcn10_enable_vblanks_synchronization +ffffffff820ac120 T dcn10_enable_timing_synchronization +ffffffff820ac520 T dcn10_enable_per_frame_crtc_position_reset +ffffffff820ac6f0 T dcn10_program_gamut_remap +ffffffff820ac8f0 T dcn10_program_output_csc +ffffffff820aca20 T dcn10_update_visual_confirm_color +ffffffff820acaa0 T dcn10_update_mpcc +ffffffff820acd50 T dcn10_blank_pixel_data +ffffffff820ace90 T dcn10_set_hdr_multiplier +ffffffff820acf20 T dcn10_program_pipe +ffffffff820adac0 T dcn10_wait_for_pending_cleared +ffffffff820adbc0 T dcn10_post_unlock_program_front_end +ffffffff820ade60 T dcn10_prepare_bandwidth +ffffffff820ae000 T dcn10_optimize_bandwidth +ffffffff820ae1a0 T dcn10_set_drr +ffffffff820ae2a0 T dcn10_get_position +ffffffff820ae330 T dcn10_set_static_screen_control +ffffffff820ae3d0 T dcn10_setup_stereo +ffffffff820ae520 T dcn10_wait_for_mpcc_disconnect +ffffffff820ae6d0 T dcn10_dummy_display_power_gating +ffffffff820ae700 T dcn10_update_pending_status +ffffffff820ae840 T dcn10_update_dchub +ffffffff820ae870 T dcn10_set_cursor_position +ffffffff820aedb0 T dcn10_set_cursor_attribute +ffffffff820aee00 T dcn10_set_cursor_sdr_white_level +ffffffff820aeec0 T dcn10_get_vupdate_offset_from_vsync +ffffffff820aef50 T dcn10_calc_vupdate_position +ffffffff820aefe0 T dcn10_setup_periodic_interrupt +ffffffff820af0f0 T dcn10_setup_vupdate_interrupt +ffffffff820af1b0 T dcn10_unblank_stream +ffffffff820af2c0 T dcn10_send_immediate_sdp_message +ffffffff820af320 T dcn10_set_clock +ffffffff820af430 T dcn10_get_clock +ffffffff820af490 T dcn10_get_dcc_en_bits +ffffffff820b0000 T snprintf_count +ffffffff820b0090 T dcn10_clear_status_bits +ffffffff820b0240 T dcn10_get_hw_state +ffffffff820b2000 T dcn10_hw_sequencer_construct +ffffffff820b3000 T dcn10_ipp_construct +ffffffff820b3050 T dcn20_ipp_construct +ffffffff820b30a0 t dcn10_ipp_destroy +ffffffff820b4000 T dcn10_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff820b40b0 T dcn10_get_dig_frontend +ffffffff820b4170 T enc1_configure_encoder +ffffffff820b41f0 T dcn10_psr_program_dp_dphy_fast_training +ffffffff820b4270 T dcn10_psr_program_secondary_packet +ffffffff820b42f0 T dcn10_is_dig_enabled +ffffffff820b4350 T dcn10_link_encoder_validate_dvi_output +ffffffff820b4400 T dcn10_link_encoder_validate_dp_output +ffffffff820b4440 T dcn10_link_encoder_construct +ffffffff820b4620 T dcn10_link_encoder_validate_output_with_stream +ffffffff820b4820 T dcn10_link_encoder_hw_init +ffffffff820b4a20 T dcn10_aux_initialize +ffffffff820b4ab0 T dcn10_link_encoder_destroy +ffffffff820b4b00 T dcn10_link_encoder_setup +ffffffff820b4c50 T dcn10_link_encoder_enable_tmds_output +ffffffff820b4d40 T dcn10_link_encoder_enable_tmds_output_with_clk_pattern_wa +ffffffff820b4e60 T dcn10_link_encoder_enable_dp_output +ffffffff820b4fc0 T dcn10_link_encoder_enable_dp_mst_output +ffffffff820b5120 T dcn10_link_encoder_disable_output +ffffffff820b52f0 T dcn10_link_encoder_dp_set_lane_settings +ffffffff820b5490 T dcn10_link_encoder_dp_set_phy_pattern +ffffffff820b5bb0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff820b5db0 T dcn10_link_encoder_update_mst_stream_allocation_table +ffffffff820b6080 T dcn10_link_encoder_connect_dig_be_to_fe +ffffffff820b61c0 T dcn10_link_encoder_enable_hpd +ffffffff820b6200 T dcn10_link_encoder_disable_hpd +ffffffff820b6240 T dcn10_get_dig_mode +ffffffff820b62b0 T dcn10_link_encoder_get_max_link_cap +ffffffff820b6330 t program_pattern_symbols +ffffffff820b7000 T mpc1_set_bg_color +ffffffff820b71e0 T mpc1_get_mpcc +ffffffff820b7270 T mpc1_update_stereo_mix +ffffffff820b7390 T mpc1_assert_idle_mpcc +ffffffff820b7460 T mpc1_get_mpcc_for_dpp +ffffffff820b7510 T mpc1_is_mpcc_idle +ffffffff820b7600 T mpc1_assert_mpcc_idle_before_connect +ffffffff820b7740 T mpc1_insert_plane +ffffffff820b7ce0 T mpc1_remove_mpcc +ffffffff820b80a0 T mpc1_mpc_init +ffffffff820b83c0 T mpc1_mpc_init_single_inst +ffffffff820b85b0 T mpc1_init_mpcc_list_from_hw +ffffffff820b8880 T mpc1_read_mpcc_state +ffffffff820b8a10 T mpc1_cursor_lock +ffffffff820b8a90 T mpc1_get_mpc_out_mux +ffffffff820b8b10 T dcn10_mpc_construct +ffffffff820b8c90 t mpc1_update_blending +ffffffff820b9000 T opp1_program_bit_depth_reduction +ffffffff820b9400 T opp1_set_dyn_expansion +ffffffff820b9570 T opp1_program_fmt +ffffffff820b9870 T opp1_program_stereo +ffffffff820b9960 T opp1_pipe_clock_control +ffffffff820b99a0 T opp1_destroy +ffffffff820b99f0 T dcn10_opp_construct +ffffffff820ba000 T optc1_program_global_sync +ffffffff820ba150 T optc1_setup_vertical_interrupt0 +ffffffff820ba1e0 T optc1_setup_vertical_interrupt1 +ffffffff820ba250 T optc1_setup_vertical_interrupt2 +ffffffff820ba2c0 T optc1_program_timing +ffffffff820ba9a0 T optc1_is_two_pixels_per_containter +ffffffff820ba9f0 T optc1_set_vtg_params +ffffffff820bab20 T optc1_set_blank_data_double_buffer +ffffffff820bab60 T optc1_set_timing_double_buffer +ffffffff820baba0 T optc1_set_blank +ffffffff820bac70 T optc1_is_blanked +ffffffff820bacf0 T optc1_enable_optc_clock +ffffffff820baf10 T optc1_disable_crtc +ffffffff820bb000 T optc1_program_blank_color +ffffffff820bb0b0 T optc1_validate_timing +ffffffff820bb1b0 T optc1_get_vblank_counter +ffffffff820bb210 T optc1_lock +ffffffff820bb2f0 T optc1_unlock +ffffffff820bb360 T optc1_get_position +ffffffff820bb3f0 T optc1_is_counter_moving +ffffffff820bb470 T optc1_did_triggered_reset_occur +ffffffff820bb510 T optc1_disable_reset_trigger +ffffffff820bb5d0 T optc1_enable_reset_trigger +ffffffff820bb6e0 T optc1_enable_crtc_reset +ffffffff820bb840 T optc1_wait_for_state +ffffffff820bb910 T optc1_set_early_control +ffffffff820bb940 T optc1_set_static_screen_control +ffffffff820bb9e0 T optc1_set_drr +ffffffff820bbb80 T optc1_set_vtotal_min_max +ffffffff820bbc20 T optc1_get_crtc_scanoutpos +ffffffff820bbd30 T optc1_program_stereo +ffffffff820bbf40 T optc1_is_stereo_left_eye +ffffffff820bbfb0 T optc1_get_hw_timing +ffffffff820bc0c0 T optc1_read_otg_state +ffffffff820bc3d0 T optc1_get_otg_active_size +ffffffff820bc4e0 T optc1_clear_optc_underflow +ffffffff820bc530 T optc1_tg_init +ffffffff820bc5e0 T optc1_is_tg_enabled +ffffffff820bc650 T optc1_is_optc_underflow_occurred +ffffffff820bc6c0 T optc1_configure_crc +ffffffff820bc930 T optc1_get_crc +ffffffff820bca30 T dcn10_timing_generator_init +ffffffff820bcaa0 t optc1_enable_crtc +ffffffff820bcba0 t optc1_set_test_pattern +ffffffff820bd290 t optc1_program_manual_trigger +ffffffff820bd340 t optc1_setup_manual_trigger +ffffffff820be000 T dcn10_find_first_free_match_stream_enc_for_link +ffffffff820be0b0 T dcn10_create_resource_pool +ffffffff820bf230 t dcn10_resource_destruct +ffffffff820bf540 t dcn10_destroy_resource_pool +ffffffff820bf5a0 t dcn10_panel_cntl_create +ffffffff820bf630 t dcn10_link_encoder_create +ffffffff820bf730 t dcn10_validate_bandwidth +ffffffff820bf7b0 t dcn10_validate_global +ffffffff820bf990 t dcn10_acquire_free_pipe_for_layer +ffffffff820bfac0 t dcn10_validate_plane +ffffffff820bfb10 t dcn10_add_stream_to_ctx +ffffffff820bfce0 t dcn10_patch_unknown_plane_state +ffffffff820bfd40 t read_dce_straps +ffffffff820bfd70 t create_audio +ffffffff820bfda0 t dcn10_stream_encoder_create +ffffffff820bfe40 t dcn10_hwseq_create +ffffffff820bfef0 t dcn10_get_dcc_compression_cap +ffffffff820c0000 T enc1_update_generic_info_packet +ffffffff820c0430 T enc1_stream_encoder_dp_set_stream_attribute +ffffffff820c0910 T enc1_stream_encoder_set_stream_attribute_helper +ffffffff820c0990 T enc1_stream_encoder_hdmi_set_stream_attribute +ffffffff820c0f80 T enc1_stream_encoder_dvi_set_stream_attribute +ffffffff820c1110 T enc1_stream_encoder_set_throttled_vcp_size +ffffffff820c1330 T enc1_stream_encoder_update_dp_info_packets +ffffffff820c1530 T enc1_stream_encoder_send_immediate_sdp_message +ffffffff820c1940 T enc1_stream_encoder_stop_dp_info_packets +ffffffff820c1b10 T enc1_stream_encoder_dp_blank +ffffffff820c1cb0 T enc1_stream_encoder_dp_unblank +ffffffff820c1ee0 T enc1_stream_encoder_set_avmute +ffffffff820c1f20 T enc1_reset_hdmi_stream_attribute +ffffffff820c1ff0 T get_audio_clock_info +ffffffff820c20e0 T enc1_se_enable_audio_clock +ffffffff820c2140 T enc1_se_enable_dp_audio +ffffffff820c2210 T enc1_se_audio_mute_control +ffffffff820c2260 T enc1_se_dp_audio_setup +ffffffff820c2270 t enc1_se_audio_setup +ffffffff820c23d0 T enc1_se_dp_audio_enable +ffffffff820c2620 T enc1_se_dp_audio_disable +ffffffff820c2790 T enc1_se_hdmi_audio_setup +ffffffff820c2c50 T enc1_se_hdmi_audio_disable +ffffffff820c2ce0 T enc1_setup_stereo_sync +ffffffff820c2d60 T enc1_dig_connect_to_otg +ffffffff820c2da0 T enc1_dig_source_otg +ffffffff820c2e10 T enc1_stream_encoder_dp_get_pixel_format +ffffffff820c2f00 T dcn10_stream_encoder_construct +ffffffff820c2f60 t enc1_stream_encoder_update_hdmi_info_packets +ffffffff820c3310 t enc1_stream_encoder_stop_hdmi_info_packets +ffffffff820c4000 T dccg2_update_dpp_dto +ffffffff820c4160 T dccg2_get_dccg_ref_freq +ffffffff820c4220 T dccg2_set_fifo_errdet_ovr_en +ffffffff820c4260 T dccg2_otg_add_pixel +ffffffff820c4300 T dccg2_otg_drop_pixel +ffffffff820c43a0 T dccg2_init +ffffffff820c43d0 T dccg2_create +ffffffff820c4480 T dcn_dccg_destroy +ffffffff820c5000 T dpp20_read_state +ffffffff820c51d0 T dpp2_power_on_obuf +ffffffff820c52a0 T dpp2_dummy_program_input_lut +ffffffff820c52d0 T dscl2_calc_lb_num_partitions +ffffffff820c5400 T dpp2_cnv_set_alpha_keyer +ffffffff820c5680 T dpp2_set_cursor_attributes +ffffffff820c57e0 T oppn20_dummy_program_regamma_pwl +ffffffff820c5810 T dpp2_construct +ffffffff820c5890 t dpp2_cnv_setup +ffffffff820c7000 T dpp2_set_degamma_pwl +ffffffff820c73b0 T dpp2_set_degamma +ffffffff820c7560 T dpp2_cm_set_gamut_remap +ffffffff820c7790 T dpp2_program_input_csc +ffffffff820c79c0 T dpp20_program_blnd_lut +ffffffff820c8120 T dpp20_program_shaper +ffffffff820ca0d0 T dpp20_program_3dlut +ffffffff820ca7a0 t dpp20_set3dlut_ram12 +ffffffff820ca970 T dpp2_set_hdr_multiplier +ffffffff820cb000 T dsc2_construct +ffffffff820cb050 T dsc2_get_enc_caps +ffffffff820cb0d0 T dsc_config_log +ffffffff820cb180 T dsc2_get_packed_pps +ffffffff820cb320 T dsc_prepare_config +ffffffff820cb860 T dsc_log_pps +ffffffff820cbfe0 T dsc_override_rc_params +ffffffff820cc130 T dsc_init_reg_values +ffffffff820cc220 T dsc_dc_pixel_encoding_to_dsc_pixel_format +ffffffff820cc2d0 T dsc_dc_color_depth_to_dsc_bits_per_comp +ffffffff820cc310 T dsc_update_from_dsc_parameters +ffffffff820cc3c0 t dsc2_read_state +ffffffff820cc570 t dsc2_validate_stream +ffffffff820cc5d0 t dsc2_set_config +ffffffff820cd940 t dsc2_enable +ffffffff820cdaf0 t dsc2_disable +ffffffff820cdc70 t dsc2_disconnect +ffffffff820ce000 T dwb2_config_dwb_cnv +ffffffff820ce200 T dwb2_disable +ffffffff820ce310 T dwb2_is_enabled +ffffffff820ce3b0 T dwb2_set_stereo +ffffffff820ce490 T dwb2_set_new_content +ffffffff820ce500 T dwb2_set_scaler +ffffffff820ce880 T dcn20_dwbc_construct +ffffffff820ce8d0 t dwb2_get_caps +ffffffff820ce9b0 t dwb2_enable +ffffffff820ceb10 t dwb2_update +ffffffff820cec70 t dwb2_set_warmup +ffffffff820cf000 T dwb_program_horz_scalar +ffffffff820cf4c0 t wbscl_get_filter_coeffs_16p +ffffffff820cf990 t wbscl_set_scaler_filter +ffffffff820cfba0 T dwb_program_vert_scalar +ffffffff820d1000 T hubbub2_dcc_support_swizzle +ffffffff820d10c0 T hubbub2_dcc_support_pixel_format +ffffffff820d1110 T hubbub2_get_dcc_compression_cap +ffffffff820d1350 T hubbub2_init_vm_ctx +ffffffff820d14a0 T hubbub2_init_dchub_sys_ctx +ffffffff820d16e0 T hubbub2_update_dchub +ffffffff820d18d0 T hubbub2_wm_read_state +ffffffff820d1c00 T hubbub2_get_dchub_ref_freq +ffffffff820d1ce0 T hubbub2_read_state +ffffffff820d1eb0 T hubbub2_construct +ffffffff820d1f10 t hubbub2_program_watermarks +ffffffff820d3000 T hubp2_set_vm_system_aperture_settings +ffffffff820d31e0 T hubp2_program_deadline +ffffffff820d3980 T hubp2_vready_at_or_After_vsync +ffffffff820d3a20 T hubp2_setup_interdependent +ffffffff820d3e90 T hubp2_program_size +ffffffff820d4010 T hubp2_program_rotation +ffffffff820d4180 T hubp2_dcc_control +ffffffff820d4240 T hubp2_program_pixel_format +ffffffff820d4810 T hubp2_program_surface_config +ffffffff820d4a50 T hubp2_get_lines_per_chunk +ffffffff820d4b10 T hubp2_cursor_set_attributes +ffffffff820d4ed0 T hubp2_dmdata_set_attributes +ffffffff820d52b0 T hubp2_dmdata_load +ffffffff820d5340 T hubp2_dmdata_status_done +ffffffff820d53b0 T hubp2_program_surface_flip_and_addr +ffffffff820d5ca0 T hubp2_enable_triplebuffer +ffffffff820d5d70 T hubp2_is_triplebuffer_enabled +ffffffff820d5df0 T hubp2_set_flip_control_surface_gsl +ffffffff820d5e40 T hubp2_is_flip_pending +ffffffff820d5f50 T hubp2_set_blank +ffffffff820d5fb0 T hubp2_set_blank_regs +ffffffff820d60b0 T hubp2_cursor_set_position +ffffffff820d6520 T hubp2_clk_cntl +ffffffff820d6570 T hubp2_vtg_sel +ffffffff820d65b0 T hubp2_clear_underflow +ffffffff820d6600 T hubp2_read_state_common +ffffffff820d7250 T hubp2_read_state +ffffffff820d7520 T hubp2_construct +ffffffff820d7590 t hubp2_setup +ffffffff820d7a30 t hubp2_validate_dml_output +ffffffff820d9000 T dcn20_set_flip_control_gsl +ffffffff820d9050 T dcn20_enable_power_gating_plane +ffffffff820d94b0 T dcn20_dccg_init +ffffffff820d9530 T dcn20_disable_vga +ffffffff820d95f0 T dcn20_program_triple_buffer +ffffffff820d9640 T dcn20_init_blank +ffffffff820d9850 T dcn20_dsc_pg_control +ffffffff820d9c60 T dcn20_dpp_pg_control +ffffffff820d9f10 T dcn20_hubp_pg_control +ffffffff820da1c0 T dcn20_plane_atomic_disable +ffffffff820da310 t dcn20_setup_gsl_group_as_lock +ffffffff820da570 T dcn20_disable_plane +ffffffff820da650 T dcn20_disable_pixel_data +ffffffff820da670 T dcn20_blank_pixel_data +ffffffff820da890 T dcn20_enable_stream_timing +ffffffff820dae50 T dcn20_program_output_csc +ffffffff820daf40 T dcn20_set_output_transfer_func +ffffffff820db0c0 T dcn20_set_blend_lut +ffffffff820db130 T dcn20_set_shaper_3dlut +ffffffff820db1f0 T dcn20_set_input_transfer_func +ffffffff820db3b0 T dcn20_update_odm +ffffffff820db4a0 T dcn20_pipe_control_lock +ffffffff820db7c0 T dcn20_program_front_end_for_ctx +ffffffff820dc560 t dcn20_program_pipe +ffffffff820dd000 T dcn20_post_unlock_program_front_end +ffffffff820dd310 T dcn20_prepare_bandwidth +ffffffff820dd480 T dcn20_optimize_bandwidth +ffffffff820dd690 T dcn20_update_bandwidth +ffffffff820dd950 T dcn20_enable_writeback +ffffffff820ddaa0 T dcn20_disable_writeback +ffffffff820ddb30 T dcn20_wait_for_blank_complete +ffffffff820ddbc0 T dcn20_dmdata_status_done +ffffffff820ddc10 T dcn20_disable_stream_gating +ffffffff820ddcc0 T dcn20_enable_stream_gating +ffffffff820ddd60 T dcn20_set_dmdata_attributes +ffffffff820dde20 T dcn20_init_vm_ctx +ffffffff820ddee0 T dcn20_init_sys_ctx +ffffffff820ddf90 T dcn20_update_plane_addr +ffffffff820de0d0 T dcn20_unblank_stream +ffffffff820de280 T dcn20_setup_vupdate_interrupt +ffffffff820de2f0 T dcn20_reset_hw_ctx_wrap +ffffffff820de6b0 T dcn20_update_mpcc +ffffffff820de910 T dcn20_enable_stream +ffffffff820dec50 T dcn20_program_dmdata_engine +ffffffff820decf0 T dcn20_fpga_init_hw +ffffffff820df2d0 T dcn20_optimize_timing_for_fsft +ffffffff820df310 T dcn20_set_disp_pattern_generator +ffffffff820e0000 T dcn20_hw_sequencer_construct +ffffffff820e1000 T enc2_fec_set_enable +ffffffff820e1090 T enc2_fec_set_ready +ffffffff820e10d0 T enc2_fec_is_active +ffffffff820e1140 T link_enc2_read_state +ffffffff820e11f0 T dcn20_link_encoder_enable_dp_output +ffffffff820e12f0 T dcn20_link_encoder_get_max_link_cap +ffffffff820e13a0 T dcn20_link_encoder_is_in_alt_mode +ffffffff820e1420 T enc2_hw_init +ffffffff820e1500 T dcn20_link_encoder_construct +ffffffff820e2000 T mmhubbub2_config_mcif_irq +ffffffff820e2130 T mmhubbub2_enable_mcif +ffffffff820e2170 T mmhubbub2_disable_mcif +ffffffff820e21b0 T mcifwb2_dump_frame +ffffffff820e22c0 T dcn20_mmhubbub_construct +ffffffff820e2310 t mmhubbub2_config_mcif_buf +ffffffff820e2960 t mmhubbub2_config_mcif_arb +ffffffff820e3000 T mpc2_update_blending +ffffffff820e32a0 T mpc2_set_denorm +ffffffff820e3310 T mpc2_set_denorm_clamp +ffffffff820e3460 T mpc2_set_output_csc +ffffffff820e3650 T mpc2_set_ocsc_default +ffffffff820e3830 T mpc20_power_on_ogam_lut +ffffffff820e38b0 T mpc2_set_output_gamma +ffffffff820e40b0 T mpc2_assert_idle_mpcc +ffffffff820e41c0 T mpc2_assert_mpcc_idle_before_connect +ffffffff820e4410 T dcn20_mpc_construct +ffffffff820e44d0 t mpc2_get_mpcc_for_dpp +ffffffff820e5000 T opp2_set_disp_pattern_generator +ffffffff820e5810 T opp2_dpg_set_blank_color +ffffffff820e5990 T opp2_program_dpg_dimensions +ffffffff820e5a20 T opp2_dpg_is_blanked +ffffffff820e5ae0 T opp2_program_left_edge_extra_pixel +ffffffff820e5b30 T dcn20_opp_construct +ffffffff820e6000 T optc2_enable_crtc +ffffffff820e6100 T optc2_set_gsl +ffffffff820e61f0 T optc2_set_gsl_source_select +ffffffff820e62b0 T optc2_set_dsc_config +ffffffff820e6380 T optc2_get_dsc_status +ffffffff820e63c0 T optc2_is_two_pixels_per_containter +ffffffff820e63d0 T optc2_set_odm_bypass +ffffffff820e6510 T optc2_set_odm_combine +ffffffff820e6700 T optc2_get_optc_source +ffffffff820e67d0 T optc2_triplebuffer_lock +ffffffff820e68f0 T optc2_triplebuffer_unlock +ffffffff820e69a0 T optc2_lock_doublebuffer_enable +ffffffff820e6b80 T optc2_lock_doublebuffer_disable +ffffffff820e6c60 T optc2_setup_manual_trigger +ffffffff820e6df0 T optc2_program_manual_trigger +ffffffff820e6e60 T optc2_configure_crc +ffffffff820e6ef0 T optc2_get_last_used_drr_vtotal +ffffffff820e6f30 T dcn20_timing_generator_init +ffffffff820e6fa0 t optc2_set_dwb_source +ffffffff820e7040 t optc2_align_vblanks +ffffffff820e8000 T dcn20_dpp_destroy +ffffffff820e8050 T dcn20_dpp_create +ffffffff820e8120 T dcn20_ipp_create +ffffffff820e81d0 T dcn20_opp_create +ffffffff820e8280 T dcn20_aux_engine_create +ffffffff820e8320 T dcn20_i2c_hw_create +ffffffff820e83b0 T dcn20_mpc_create +ffffffff820e8440 T dcn20_hubbub_create +ffffffff820e8510 T dcn20_timing_generator_create +ffffffff820e85a0 T dcn20_link_encoder_create +ffffffff820e86a0 T dcn20_stream_encoder_create +ffffffff820e8760 T dcn20_hwseq_create +ffffffff820e87d0 T dcn20_clock_source_destroy +ffffffff820e8820 T dcn20_dsc_create +ffffffff820e88e0 T dcn20_dsc_destroy +ffffffff820e8930 T dcn20_hubp_create +ffffffff820e8a00 T dcn20_build_mapped_resource +ffffffff820e8c20 T dcn20_acquire_dsc +ffffffff820e8d60 T dcn20_release_dsc +ffffffff820e8dd0 T dcn20_add_dsc_to_stream_resource +ffffffff820e8f40 T dcn20_add_stream_to_ctx +ffffffff820e8fd0 T dcn20_remove_stream_from_ctx +ffffffff820e90c0 T dcn20_split_stream_for_odm +ffffffff820e9570 T dcn20_split_stream_for_mpc +ffffffff820e96f0 T dcn20_calc_max_scaled_time +ffffffff820e9760 T dcn20_set_mcif_arb_params +ffffffff820e98d0 T dcn20_validate_dsc +ffffffff820e9a80 T dcn20_find_secondary_pipe +ffffffff820e9c60 T dcn20_merge_pipes_for_validate +ffffffff820e9ed0 T dcn20_validate_apply_pipe_split_flags +ffffffff820ea760 T dcn20_fast_validate_bw +ffffffff820eacb0 T dcn20_validate_bandwidth +ffffffff820ead30 T dcn20_acquire_free_pipe_for_layer +ffffffff820eae50 T dcn20_get_dcc_compression_cap +ffffffff820eae80 T dcn20_patch_unknown_plane_state +ffffffff820eaee0 T dcn20_dwbc_create +ffffffff820eaff0 T dcn20_mmhubbub_create +ffffffff820eb150 T dcn20_create_resource_pool +ffffffff820ec8f0 t dcn20_resource_destruct +ffffffff820ecda0 t dcn20_destroy_resource_pool +ffffffff820ece00 t dcn20_panel_cntl_create +ffffffff820ece90 t read_dce_straps +ffffffff820ecec0 t dcn20_create_audio +ffffffff820ed000 T enc2_set_dynamic_metadata +ffffffff820ed260 T enc2_stream_encoder_dp_unblank +ffffffff820ed5a0 T enc2_stream_encoder_dp_set_stream_attribute +ffffffff820ed600 T enc2_get_fifo_cal_average_level +ffffffff820ed660 T dcn20_stream_encoder_construct +ffffffff820ed6c0 t enc2_stream_encoder_update_hdmi_info_packets +ffffffff820ed790 t enc2_stream_encoder_stop_hdmi_info_packets +ffffffff820edaa0 t enc2_stream_encoder_update_dp_info_packets_sdp_line_num +ffffffff820edb60 t enc2_stream_encoder_update_dp_info_packets +ffffffff820edc10 t enc2_read_state +ffffffff820edd90 t enc2_dp_set_dsc_config +ffffffff820ede60 t enc2_dp_set_dsc_pps_info_packet +ffffffff820ee330 t enc2_dp_set_odm_combine +ffffffff820ee370 t enc2_update_hdmi_info_packet +ffffffff820ef000 T dcn20_vmid_setup +ffffffff820f0000 T dccg201_create +ffffffff820f00b0 t dccg201_update_dpp_dto +ffffffff820f1000 T dpp201_construct +ffffffff820f1080 t dpp201_get_optimal_number_of_taps +ffffffff820f1440 t dpp201_cnv_setup +ffffffff820f2000 T hubbub201_construct +ffffffff820f2060 t hubbub201_program_watermarks +ffffffff820f3000 T dcn201_hubp_construct +ffffffff820f3070 t hubp201_setup +ffffffff820f3350 t hubp201_program_surface_config +ffffffff820f4000 T dcn201_update_plane_addr +ffffffff820f42a0 T dcn201_init_blank +ffffffff820f43e0 T dcn201_init_hw +ffffffff820f4bb0 T dcn201_plane_atomic_disconnect +ffffffff820f4d20 T dcn201_update_mpcc +ffffffff820f4fb0 T dcn201_pipe_control_lock +ffffffff820f50b0 T dcn201_set_cursor_attribute +ffffffff820f5140 T dcn201_set_dmdata_attributes +ffffffff820f5250 T dcn201_unblank_stream +ffffffff820f6000 T dcn201_hw_sequencer_construct +ffffffff820f7000 T dcn201_link_encoder_construct +ffffffff820f7190 t dcn201_link_encoder_is_in_alt_mode +ffffffff820f7200 t dcn201_link_encoder_get_max_link_cap +ffffffff820f8000 T dcn201_mpc_construct +ffffffff820f80c0 t mpc201_set_out_rate_control +ffffffff820f9000 T dcn201_opp_construct +ffffffff820fa000 T optc201_is_two_pixels_per_containter +ffffffff820fa010 T dcn201_timing_generator_init +ffffffff820fa080 t optc201_validate_timing +ffffffff820fa180 t optc201_triplebuffer_unlock +ffffffff820fa230 t optc201_triplebuffer_lock +ffffffff820fa350 t optc201_get_optc_source +ffffffff820fb000 T dcn201_create_resource_pool +ffffffff820fba30 t dcn201_resource_destruct +ffffffff820fbd30 t dcn201_destroy_resource_pool +ffffffff820fbd90 t dcn201_link_init +ffffffff820fbde0 t dcn201_link_encoder_create +ffffffff820fbe90 t dcn201_acquire_free_pipe_for_layer +ffffffff820fbfa0 t dcn201_populate_dml_writeback_from_context +ffffffff820fc000 t read_dce_straps +ffffffff820fc030 t dcn201_create_audio +ffffffff820fc060 t dcn201_stream_encoder_create +ffffffff820fc100 t dcn201_hwseq_create +ffffffff820fc170 t dcn201_get_dcc_compression_cap +ffffffff820fd000 T dccg21_create +ffffffff820fd0b0 t dccg21_update_dpp_dto +ffffffff820fe000 T dcn21_dchvm_init +ffffffff820fe200 T hubbub21_init_dchub +ffffffff820fe3d0 T hubbub21_program_urgent_watermarks +ffffffff820febf0 T hubbub21_program_stutter_watermarks +ffffffff820ff0e0 T hubbub21_program_pstate_watermarks +ffffffff820ff380 T hubbub21_program_watermarks +ffffffff820ff4e0 T hubbub21_wm_read_state +ffffffff820ff780 T hubbub21_construct +ffffffff820ff7e0 t hubbub21_apply_DEDCN21_147_wa +ffffffff82100000 T apply_DEDCN21_142_wa_for_hostvm_deadline +ffffffff821002e0 T hubp21_program_deadline +ffffffff82100310 T hubp21_program_requestor +ffffffff821006b0 T hubp21_construct +ffffffff82100720 t hubp21_setup +ffffffff82100780 t hubp21_set_viewport +ffffffff82100a80 t hubp21_program_surface_flip_and_addr +ffffffff82101370 t hubp21_set_vm_system_aperture_settings +ffffffff821014a0 t hubp21_init +ffffffff821014d0 t hubp21_validate_dml_output +ffffffff82103000 T dcn21_init_sys_ctx +ffffffff82103110 T dcn21_s0i3_golden_init_wa +ffffffff82103170 T dcn21_exit_optimized_pwr_state +ffffffff82103190 T dcn21_optimize_pwr_state +ffffffff821031c0 T dcn21_PLAT_58856_wa +ffffffff82103260 T dcn21_set_abm_immediate_disable +ffffffff821033a0 T dcn21_set_pipe +ffffffff821034e0 T dcn21_set_backlight_level +ffffffff82103700 T dcn21_is_abm_supported +ffffffff82104000 T dcn21_hw_sequencer_construct +ffffffff82105000 T dcn21_link_encoder_enable_dp_output +ffffffff82105140 t dcn21_link_encoder_acquire_phy +ffffffff82105320 T dcn21_link_encoder_construct +ffffffff82105500 t dcn21_link_encoder_enable_dp_mst_output +ffffffff82105570 t dcn21_link_encoder_disable_output +ffffffff82106000 T dcn21_fast_validate_bw +ffffffff821066a0 T dcn21_create_resource_pool +ffffffff821079d0 t dcn21_resource_destruct +ffffffff82107e70 t dcn21_destroy_resource_pool +ffffffff82107ed0 t dcn21_panel_cntl_create +ffffffff82107f60 t dcn21_link_encoder_create +ffffffff82108060 t dcn21_validate_bandwidth +ffffffff821080e0 t dcn21_patch_unknown_plane_state +ffffffff82108130 t dcn21_get_panel_config_defaults +ffffffff82108170 t read_dce_straps +ffffffff821081a0 t dcn21_create_audio +ffffffff821081d0 t dcn21_stream_encoder_create +ffffffff82108270 t dcn21_hwseq_create +ffffffff82109000 T afmt3_setup_hdmi_audio +ffffffff821091d0 T afmt3_se_audio_setup +ffffffff82109370 T afmt3_audio_mute_control +ffffffff821093e0 T afmt3_audio_info_immediate_update +ffffffff82109420 T afmt3_setup_dp_audio +ffffffff82109510 T afmt3_construct +ffffffff8210a000 T cm_helper_program_gamcor_xfer_func +ffffffff8210a3c0 T cm3_helper_translate_curve_to_hw_format +ffffffff8210afd0 T cm3_helper_convert_to_custom_float +ffffffff8210b420 T cm3_helper_translate_curve_to_degamma_hw_format +ffffffff8210bc40 T is_rgb_equal +ffffffff8210c000 T dccg3_create +ffffffff8210c0b0 T dccg30_create +ffffffff8210d000 T dcn30_link_encoder_validate_output_with_stream +ffffffff8210d010 T dcn30_link_encoder_construct +ffffffff8210d1f0 T enc3_hw_init +ffffffff8210e000 T enc3_stream_encoder_update_hdmi_info_packets +ffffffff8210e100 t enc3_update_hdmi_info_packet +ffffffff8210e4f0 T enc3_stream_encoder_stop_hdmi_info_packets +ffffffff8210ead0 T enc3_dp_set_dsc_pps_info_packet +ffffffff8210edf0 T enc3_stream_encoder_update_dp_info_packets_sdp_line_num +ffffffff8210eeb0 T enc3_stream_encoder_update_dp_info_packets +ffffffff8210f170 T enc3_audio_mute_control +ffffffff8210f1e0 T enc3_se_dp_audio_setup +ffffffff8210f260 T enc3_se_dp_audio_enable +ffffffff8210f350 T enc3_se_hdmi_audio_setup +ffffffff8210f660 T dcn30_dio_stream_encoder_construct +ffffffff8210f6d0 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff8210fcd0 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff8210fed0 t enc3_read_state +ffffffff82110060 t enc3_dp_set_dsc_config +ffffffff82110130 t enc3_dp_set_odm_combine +ffffffff82111000 T dpp30_read_state +ffffffff82111050 T dpp3_program_post_csc +ffffffff82111240 T dpp3_set_pre_degam +ffffffff821112f0 T dpp3_cnv_setup +ffffffff82111bc0 T dpp3_set_cursor_attributes +ffffffff82111d30 T dpp3_get_optimal_number_of_taps +ffffffff82112750 T dpp3_construct +ffffffff821127b0 t dpp3_deferred_update +ffffffff82112b90 t dpp3_program_blnd_lut +ffffffff821135e0 t dpp3_program_shaper +ffffffff82115660 t dpp3_program_3dlut +ffffffff82115e10 t dpp3_set3dlut_ram12 +ffffffff82116000 T dpp3_program_cm_dealpha +ffffffff821160a0 T dpp3_program_cm_bias +ffffffff82116190 T dpp3_program_gamcor_lut +ffffffff82116bb0 t dpp3_power_on_gamcor_lut +ffffffff82116ce0 T dpp3_set_hdr_multiplier +ffffffff82116d30 T dpp3_cm_set_gamut_remap +ffffffff82117000 T dwb3_config_fc +ffffffff821171b0 T dwb3_set_stereo +ffffffff82117270 T dwb3_enable +ffffffff821173a0 T dwb3_set_denorm +ffffffff821174c0 T dwb3_disable +ffffffff82117570 T dwb3_update +ffffffff821176a0 T dwb3_is_enabled +ffffffff82117740 T dwb3_set_new_content +ffffffff82117780 T dcn30_dwbc_construct +ffffffff821177d0 T dwb3_set_host_read_rate_control +ffffffff82117840 t dwb3_get_caps +ffffffff82118000 T dwb3_ogam_set_input_transfer_func +ffffffff821189f0 T dwb3_set_gamut_remap +ffffffff82118ca0 T dwb3_program_hdr_mult +ffffffff82119000 T hubbub3_init_dchub_sys_ctx +ffffffff821191c0 T hubbub3_program_watermarks +ffffffff821192c0 T hubbub3_dcc_support_swizzle +ffffffff82119380 T hubbub3_get_dcc_compression_cap +ffffffff82119560 T hubbub3_force_wm_propagate_to_pipes +ffffffff82119610 T hubbub3_force_pstate_change_control +ffffffff82119690 T hubbub3_init_watermarks +ffffffff821199d0 T hubbub3_construct +ffffffff8211a000 T hubp3_set_vm_system_aperture_settings +ffffffff8211a130 T hubp3_program_surface_flip_and_addr +ffffffff8211ab20 T hubp3_dcc_control +ffffffff8211abe0 T hubp3_dcc_control_sienna_cichlid +ffffffff8211ad00 T hubp3_dmdata_set_attributes +ffffffff8211af00 T hubp3_program_surface_config +ffffffff8211b1f0 T hubp3_read_state +ffffffff8211b4c0 T hubp3_setup +ffffffff8211b550 T hubp3_init +ffffffff8211b580 T hubp3_construct +ffffffff8211c000 T dcn30_set_blend_lut +ffffffff8211c070 T dcn30_set_input_transfer_func +ffffffff8211c1d0 T dcn30_set_output_transfer_func +ffffffff8211c500 T dcn30_update_writeback +ffffffff8211c590 t dcn30_set_writeback +ffffffff8211c740 T dcn30_mmhubbub_warmup +ffffffff8211c990 T dcn30_enable_writeback +ffffffff8211ca40 T dcn30_disable_writeback +ffffffff8211cb20 T dcn30_program_all_writeback_pipes_in_tree +ffffffff8211ce20 T dcn30_init_hw +ffffffff8211d550 T dcn30_set_avmute +ffffffff8211d660 T dcn30_update_info_frame +ffffffff8211d750 T dcn30_program_dmdata_engine +ffffffff8211d7f0 T dcn30_apply_idle_power_optimizations +ffffffff8211dd10 T dcn30_does_plane_fit_in_mall +ffffffff8211ddc0 T dcn30_hardware_release +ffffffff8211deb0 T dcn30_set_disp_pattern_generator +ffffffff8211df20 T dcn30_prepare_bandwidth +ffffffff8211e010 T dcn30_set_static_screen_control +ffffffff8211f000 T dcn30_hw_sequencer_construct +ffffffff82120000 T dcn30_mmhubbub_construct +ffffffff82120050 t mmhubbub3_warmup_mcif +ffffffff82120260 t mmhubbub3_config_mcif_buf +ffffffff82120710 t mmhubbub3_config_mcif_arb +ffffffff82121000 T mpc3_is_dwb_idle +ffffffff82121070 T mpc3_set_dwb_mux +ffffffff821210f0 T mpc3_disable_dwb_mux +ffffffff82121170 T mpc3_set_out_rate_control +ffffffff82121280 T mpc3_get_ogam_current +ffffffff82121320 T mpc3_power_on_ogam_lut +ffffffff821213f0 T mpc3_set_output_gamma +ffffffff82122030 T mpc3_set_denorm +ffffffff821220a0 T mpc3_set_denorm_clamp +ffffffff821221f0 T mpc3_program_shaper +ffffffff821243b0 t mpc3_power_on_shaper_3dlut +ffffffff82124730 T mpc3_init_mpcc +ffffffff821247b0 T mpc3_set_gamut_remap +ffffffff82124a20 T mpc3_program_3dlut +ffffffff82125190 t mpc3_set3dlut_ram12 +ffffffff82125370 T mpc3_set_output_csc +ffffffff821254e0 T mpc3_set_ocsc_default +ffffffff82125650 T mpc3_set_rmu_mux +ffffffff821256f0 T mpc3_get_rmu_mux_status +ffffffff821257a0 T mpcc3_acquire_rmu +ffffffff82125900 T dcn30_mpc_construct +ffffffff821259d0 t mpcc3_release_rmu +ffffffff82125b40 t mpc3_set_mpc_mem_lp_mode +ffffffff82126000 T optc3_triplebuffer_lock +ffffffff82126120 T optc3_lock_doublebuffer_enable +ffffffff821263b0 T optc3_lock_doublebuffer_disable +ffffffff821264d0 T optc3_lock +ffffffff821265a0 T optc3_set_out_mux +ffffffff821265e0 T optc3_program_blank_color +ffffffff82126710 T optc3_set_drr_trigger_window +ffffffff821267a0 T optc3_set_vtotal_change_limit +ffffffff82126810 T optc3_set_dsc_config +ffffffff82126860 T optc3_set_odm_bypass +ffffffff821269e0 T optc3_set_odm_combine +ffffffff82126d30 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff82126db0 T optc3_set_vtotal_min_max +ffffffff82126df0 T optc3_tg_init +ffffffff82126e50 T dcn30_timing_generator_init +ffffffff82127000 T dcn30_add_stream_to_ctx +ffffffff82127020 T dcn30_populate_dml_pipes_from_context +ffffffff82127100 T dcn30_populate_dml_writeback_from_context +ffffffff82127160 T dcn30_calc_max_scaled_time +ffffffff821271c0 T dcn30_set_mcif_arb_params +ffffffff82127330 T dcn30_acquire_post_bldn_3dlut +ffffffff821274c0 T dcn30_release_post_bldn_3dlut +ffffffff82127570 T dcn30_internal_validate_bw +ffffffff821282e0 t dcn30_split_stream_for_mpc_or_odm +ffffffff82128600 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff821286e0 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82128780 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff82128820 T dcn30_update_soc_for_wm_a +ffffffff82128870 T dcn30_calculate_wm_and_dlg +ffffffff821288e0 T dcn30_validate_bandwidth +ffffffff82128d10 T dcn30_update_bw_bounding_box +ffffffff82129370 T dcn30_create_resource_pool +ffffffff8212a920 t dcn30_resource_destruct +ffffffff8212aea0 t dcn30_destroy_resource_pool +ffffffff8212af00 t dcn30_panel_cntl_create +ffffffff8212af90 t dcn30_link_encoder_create +ffffffff8212b040 t dcn30_get_panel_config_defaults +ffffffff8212b0c0 t read_dce_straps +ffffffff8212b0f0 t dcn30_create_audio +ffffffff8212b120 t dcn30_stream_encoder_create +ffffffff8212b2a0 t dcn30_hwseq_create +ffffffff8212c000 T vpg3_update_generic_info_packet +ffffffff8212c9a0 T vpg3_construct +ffffffff8212d000 T dccg301_create +ffffffff8212e000 T dcn301_link_encoder_construct +ffffffff8212f000 T hubbub301_construct +ffffffff82130000 T dcn301_hw_sequencer_construct +ffffffff82131000 T optc301_set_drr +ffffffff82131230 T optc301_setup_manual_trigger +ffffffff82131350 T dcn301_timing_generator_init +ffffffff82132000 T dcn301_panel_cntl_construct +ffffffff82132050 t dcn301_panel_cntl_destroy +ffffffff821320a0 t dcn301_panel_cntl_hw_init +ffffffff821322b0 t dcn301_is_panel_backlight_on +ffffffff82132310 t dcn301_is_panel_powered_on +ffffffff821323c0 t dcn301_store_backlight_level +ffffffff82132460 t dcn301_get_16_bit_backlight_from_pwm +ffffffff82133000 T dcn301_create_resource_pool +ffffffff82134590 t dcn301_destruct +ffffffff82134ad0 t dcn301_destroy_resource_pool +ffffffff82134b30 t dcn301_panel_cntl_create +ffffffff82134bc0 t dcn301_link_encoder_create +ffffffff82134c70 t dcn301_calculate_wm_and_dlg +ffffffff82134ce0 t read_dce_straps +ffffffff82134d10 t dcn301_create_audio +ffffffff82134d40 t dcn301_stream_encoder_create +ffffffff82134ec0 t dcn301_hwseq_create +ffffffff82135000 T dcn302_dpp_pg_control +ffffffff821352a0 T dcn302_hubp_pg_control +ffffffff82135550 T dcn302_dsc_pg_control +ffffffff82136000 T dcn302_hw_sequencer_construct +ffffffff82137000 T dcn302_update_bw_bounding_box +ffffffff82137050 T dcn302_create_resource_pool +ffffffff821384a0 t dcn302_resource_destruct +ffffffff821389e0 t dcn302_destroy_resource_pool +ffffffff82138a30 t dcn302_panel_cntl_create +ffffffff82138ac0 t dcn302_link_encoder_create +ffffffff82138b70 t dcn302_get_panel_config_defaults +ffffffff82138bf0 t read_dce_straps +ffffffff82138c20 t dcn302_create_audio +ffffffff82138c50 t dcn302_stream_encoder_create +ffffffff82138dd0 t dcn302_hwseq_create +ffffffff82139000 T dcn303_dpp_pg_control +ffffffff82139030 T dcn303_hubp_pg_control +ffffffff82139060 T dcn303_dsc_pg_control +ffffffff82139090 T dcn303_enable_power_gating_plane +ffffffff8213a000 T dcn303_hw_sequencer_construct +ffffffff8213b000 T dcn303_update_bw_bounding_box +ffffffff8213b050 T dcn303_create_resource_pool +ffffffff8213c2a0 t dcn303_resource_destruct +ffffffff8213c7e0 t dcn303_destroy_resource_pool +ffffffff8213c830 t dcn303_panel_cntl_create +ffffffff8213c8c0 t dcn303_link_encoder_create +ffffffff8213c970 t dcn303_get_panel_config_defaults +ffffffff8213c9f0 t read_dce_straps +ffffffff8213ca20 t dcn303_create_audio +ffffffff8213ca50 t dcn303_stream_encoder_create +ffffffff8213cbd0 t dcn303_hwseq_create +ffffffff8213d000 T afmt31_powerdown +ffffffff8213d090 T afmt31_poweron +ffffffff8213d120 T afmt31_construct +ffffffff8213e000 T apg31_construct +ffffffff8213e050 t apg31_se_audio_setup +ffffffff8213e160 t apg31_enable +ffffffff8213e270 t apg31_disable +ffffffff8213f000 T dccg31_update_dpp_dto +ffffffff8213f160 T dccg31_set_dpstreamclk +ffffffff8213f2f0 t dccg31_disable_dpstreamclk +ffffffff8213f440 T dccg31_enable_symclk32_se +ffffffff8213f740 T dccg31_disable_symclk32_se +ffffffff8213fa10 T dccg31_enable_symclk32_le +ffffffff8213fb20 T dccg31_disable_symclk32_le +ffffffff8213fc10 T dccg31_set_symclk32_le_root_clock_gating +ffffffff8213fd20 T dccg31_disable_dscclk +ffffffff8213ff70 T dccg31_enable_dscclk +ffffffff821401e0 T dccg31_set_physymclk +ffffffff821406f0 T dccg31_set_dtbclk_dto +ffffffff821409a0 T dccg31_set_audio_dtbclk_dto +ffffffff82140ab0 T dccg31_get_dccg_ref_freq +ffffffff82140ae0 T dccg31_set_dispclk_change_mode +ffffffff82140b30 T dccg31_init +ffffffff82141110 T dccg31_otg_add_pixel +ffffffff82141150 T dccg31_otg_drop_pixel +ffffffff82141190 T dccg31_create +ffffffff82142000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff82142390 T dcn31_link_encoder_construct +ffffffff82142560 T dcn31_link_encoder_construct_minimal +ffffffff821425e0 T dcn31_link_encoder_enable_dp_output +ffffffff82142820 T dcn31_link_encoder_enable_dp_mst_output +ffffffff82142a60 T dcn31_link_encoder_disable_output +ffffffff82142cd0 T dcn31_link_encoder_is_in_alt_mode +ffffffff82142e20 T dcn31_link_encoder_get_max_link_cap +ffffffff82142fa0 t enc31_hw_init +ffffffff82143000 T dcn31_hpo_dp_link_enc_enable +ffffffff82143160 T dcn31_hpo_dp_link_enc_disable +ffffffff821431d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff82143b30 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff82143db0 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff82144050 T dcn31_hpo_dp_link_enc_read_state +ffffffff821442f0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff821443f0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff82144530 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff82144620 T hpo_dp_link_encoder31_construct +ffffffff82144680 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff82145000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff82145070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff821451b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff82145460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff82145560 t dcn31_hpo_dp_stream_enc_disable +ffffffff821455d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff82145e80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num +ffffffff82145f40 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff82146160 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff821462f0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff82146590 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff82146690 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff82146740 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff82146810 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff821469c0 t dcn31_hpo_dp_stream_enc_read_state +ffffffff82146b50 t dcn31_set_hblank_min_symbol_width +ffffffff82147000 T hubbub31_init_dchub_sys_ctx +ffffffff821471e0 T hubbub31_init +ffffffff82147280 T hubbub31_construct +ffffffff82147320 t hubbub31_get_dcc_compression_cap +ffffffff82147500 t hubbub31_get_dchub_ref_freq +ffffffff821475e0 t hubbub31_program_watermarks +ffffffff82148f00 t hubbub31_verify_allow_pstate_change_high +ffffffff821490c0 t dcn31_program_det_size +ffffffff821492a0 t dcn31_program_compbuf_size +ffffffff82149520 t dcn31_init_crb +ffffffff8214a000 T hubp31_set_unbounded_requesting +ffffffff8214a090 T hubp31_soft_reset +ffffffff8214a0e0 T hubp31_construct +ffffffff8214a150 t hubp31_program_extended_blank +ffffffff8214b000 T dcn31_init_hw +ffffffff8214b850 T dcn31_dsc_pg_control +ffffffff8214bba0 T dcn31_enable_power_gating_plane +ffffffff8214be00 T dcn31_update_info_frame +ffffffff8214bf30 T dcn31_z10_save_init +ffffffff8214bfc0 T dcn31_z10_restore +ffffffff8214c070 T dcn31_hubp_pg_control +ffffffff8214c390 T dcn31_init_sys_ctx +ffffffff8214c440 T dcn31_reset_hw_ctx_wrap +ffffffff8214c7a0 T dcn31_setup_hpo_hw_control +ffffffff8214d000 T dcn31_hw_sequencer_construct +ffffffff8214e000 T optc31_immediate_disable_crtc +ffffffff8214e100 T optc31_set_drr +ffffffff8214e310 T optc3_init_odm +ffffffff8214e480 T dcn31_timing_generator_init +ffffffff8214e4f0 t optc31_enable_crtc +ffffffff8214e5f0 t optc31_disable_crtc +ffffffff8214e6d0 t optc31_set_odm_combine +ffffffff8214f000 T dcn31_panel_cntl_construct +ffffffff8214f040 t dcn31_panel_cntl_destroy +ffffffff8214f090 t dcn31_panel_cntl_hw_init +ffffffff8214f190 t dcn31_is_panel_backlight_on +ffffffff8214f230 t dcn31_is_panel_powered_on +ffffffff8214f2e0 t dcn31_store_backlight_level +ffffffff8214f3b0 t dcn31_get_16_bit_backlight_from_pwm +ffffffff82150000 T dcn31x_populate_dml_pipes_from_context +ffffffff82150180 T dcn31_populate_dml_pipes_from_context +ffffffff821505c0 T dcn31_calculate_wm_and_dlg +ffffffff82150630 T dcn31_populate_dml_writeback_from_context +ffffffff82150690 T dcn31_set_mcif_arb_params +ffffffff821506f0 T dcn31_validate_bandwidth +ffffffff82150ae0 T dcn31_create_resource_pool +ffffffff82151e80 t dcn31_resource_destruct +ffffffff821524f0 t dcn31_destroy_resource_pool +ffffffff82152550 t dcn31_panel_cntl_create +ffffffff821525c0 t dcn31_link_encoder_create +ffffffff82152670 t dcn31_link_enc_create_minimal +ffffffff82152710 t dcn31_get_panel_config_defaults +ffffffff82152750 t read_dce_straps +ffffffff82152780 t dcn31_create_audio +ffffffff821527b0 t dcn31_stream_encoder_create +ffffffff82152930 t dcn31_hpo_dp_stream_encoder_create +ffffffff82152af0 t dcn31_hpo_dp_link_encoder_create +ffffffff82152b80 t dcn31_hwseq_create +ffffffff82153000 T vpg31_powerdown +ffffffff82153090 T vpg31_poweron +ffffffff82153120 T vpg31_construct +ffffffff82154000 T dccg314_create +ffffffff821540b0 t dccg314_init +ffffffff82154210 t dccg314_set_dpstreamclk +ffffffff821545d0 t dccg314_set_dtbclk_dto +ffffffff821547c0 t dccg314_set_pixel_rate_div +ffffffff82154b30 t dccg314_set_valid_pixel_rate +ffffffff82154ba0 t dccg314_trigger_dio_fifo_resync +ffffffff82154c40 t dccg314_dpp_root_clock_control +ffffffff82155000 T dcn314_dio_stream_encoder_construct +ffffffff82155070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff82155670 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff82155880 t enc314_stream_encoder_dp_blank +ffffffff82155900 t enc314_stream_encoder_dp_unblank +ffffffff82155c80 t enc314_read_state +ffffffff82155de0 t enc314_dp_set_dsc_config +ffffffff82155e30 t enc314_dp_set_odm_combine +ffffffff82155e70 t enc314_set_dig_input_mode +ffffffff82155ec0 t enc314_enable_fifo +ffffffff82155f60 t enc314_disable_fifo +ffffffff82155fb0 t enc314_reset_fifo +ffffffff82157000 T dcn314_update_odm +ffffffff82157600 T dcn314_dsc_pg_control +ffffffff821579d0 T dcn314_enable_power_gating_plane +ffffffff82157c60 T dcn314_calculate_dccg_k1_k2_values +ffffffff82157e10 T dcn314_set_pixels_per_cycle +ffffffff82157f00 T dcn314_resync_fifo_dccg_dio +ffffffff821580a0 T dcn314_dpp_root_clock_control +ffffffff82158100 T dcn314_disable_link_output +ffffffff82159000 T dcn314_hw_sequencer_construct +ffffffff8215a000 T dcn314_timing_generator_init +ffffffff8215a070 t optc314_enable_crtc +ffffffff8215a170 t optc314_disable_crtc +ffffffff8215a250 t optc314_phantom_crtc_post_enable +ffffffff8215a310 t optc314_set_odm_bypass +ffffffff8215a480 t optc314_set_odm_combine +ffffffff8215a770 t optc314_set_h_timing_div_manual_mode +ffffffff8215b000 T dcn314_validate_bandwidth +ffffffff8215b490 T dcn314_create_resource_pool +ffffffff8215c7b0 t dcn314_resource_destruct +ffffffff8215ce20 t dcn314_get_preferred_eng_id_dpia +ffffffff8215ce50 t dcn314_destroy_resource_pool +ffffffff8215ceb0 t dcn31_panel_cntl_create +ffffffff8215cf20 t dcn31_link_encoder_create +ffffffff8215cfd0 t dcn31_link_enc_create_minimal +ffffffff8215d070 t dcn314_populate_dml_pipes_from_context +ffffffff8215d100 t dcn314_update_bw_bounding_box +ffffffff8215d150 t dcn314_get_panel_config_defaults +ffffffff8215d190 t read_dce_straps +ffffffff8215d1c0 t dcn31_create_audio +ffffffff8215d1f0 t dcn314_stream_encoder_create +ffffffff8215d370 t dcn31_hpo_dp_stream_encoder_create +ffffffff8215d530 t dcn31_hpo_dp_link_encoder_create +ffffffff8215d5c0 t dcn314_hwseq_create +ffffffff8215e000 T dcn315_create_resource_pool +ffffffff8215f280 t dcn315_resource_destruct +ffffffff8215f8e0 t dcn315_destroy_resource_pool +ffffffff8215f940 t dcn31_panel_cntl_create +ffffffff8215f9b0 t dcn31_link_encoder_create +ffffffff8215fa60 t dcn31_link_enc_create_minimal +ffffffff8215fb00 t dcn315_populate_dml_pipes_from_context +ffffffff82160200 t dcn315_get_panel_config_defaults +ffffffff82160240 t read_dce_straps +ffffffff82160270 t dcn31_create_audio +ffffffff821602a0 t dcn315_stream_encoder_create +ffffffff82160420 t dcn31_hpo_dp_stream_encoder_create +ffffffff821605e0 t dcn31_hpo_dp_link_encoder_create +ffffffff82160670 t dcn31_hwseq_create +ffffffff82161000 T dcn316_create_resource_pool +ffffffff82162290 t dcn316_resource_destruct +ffffffff821628f0 t dcn316_destroy_resource_pool +ffffffff82162950 t dcn31_panel_cntl_create +ffffffff821629c0 t dcn31_link_encoder_create +ffffffff82162a70 t dcn31_link_enc_create_minimal +ffffffff82162b10 t dcn316_populate_dml_pipes_from_context +ffffffff82162e40 t dcn316_get_panel_config_defaults +ffffffff82162e80 t read_dce_straps +ffffffff82162eb0 t dcn31_create_audio +ffffffff82162ee0 t dcn316_stream_encoder_create +ffffffff82163060 t dcn31_hpo_dp_stream_encoder_create +ffffffff82163220 t dcn31_hpo_dp_link_encoder_create +ffffffff821632b0 t dcn31_hwseq_create +ffffffff82164000 T dccg32_create +ffffffff821640b0 t dccg32_get_dccg_ref_freq +ffffffff821640e0 t dccg32_otg_add_pixel +ffffffff82164120 t dccg32_otg_drop_pixel +ffffffff82164160 t dccg32_set_dpstreamclk +ffffffff821644a0 t dccg32_set_dtbclk_dto +ffffffff821646a0 t dccg32_set_pixel_rate_div +ffffffff82164a10 t dccg32_set_valid_pixel_rate +ffffffff82164a80 t dccg32_trigger_dio_fifo_resync +ffffffff82165000 T enc32_hw_init +ffffffff82165090 T dcn32_link_encoder_enable_dp_output +ffffffff821650e0 T dcn32_link_encoder_construct +ffffffff821652d0 t dcn32_link_encoder_is_in_alt_mode +ffffffff82165350 t dcn32_link_encoder_get_max_link_cap +ffffffff82166000 T enc32_stream_encoder_dp_unblank +ffffffff82166500 T enc32_enable_fifo +ffffffff821665a0 t enc32_reset_fifo +ffffffff821666a0 T dcn32_dio_stream_encoder_construct +ffffffff82166710 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff82166c90 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff82166e10 t enc32_read_state +ffffffff82166f70 t enc32_dp_set_dsc_config +ffffffff82166fc0 t enc32_dp_set_odm_combine +ffffffff82167000 t enc32_set_dig_input_mode +ffffffff82168000 T dpp32_construct +ffffffff82168060 t dscl32_calc_lb_num_partitions +ffffffff82169000 T hpo_dp_link_encoder32_construct +ffffffff82169060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff8216a000 T hubbub32_set_request_limit +ffffffff8216a130 T dcn32_program_det_size +ffffffff8216a2d0 T hubbub32_program_urgent_watermarks +ffffffff8216aa40 T hubbub32_program_stutter_watermarks +ffffffff8216ae90 T hubbub32_program_pstate_watermarks +ffffffff8216b320 T hubbub32_program_usr_watermarks +ffffffff8216b580 T hubbub32_force_usr_retraining_allow +ffffffff8216b600 T hubbub32_force_wm_propagate_to_pipes +ffffffff8216b6a0 T hubbub32_init +ffffffff8216b7e0 T hubbub32_construct +ffffffff8216b860 t hubbub32_wm_read_state +ffffffff8216bc80 t hubbub32_program_watermarks +ffffffff8216bd90 t hubbub32_init_watermarks +ffffffff8216c1d0 t dcn32_program_compbuf_size +ffffffff8216c460 t dcn32_init_crb +ffffffff8216d000 T hubp32_update_force_pstate_disallow +ffffffff8216d090 T hubp32_update_force_cursor_pstate_disallow +ffffffff8216d120 T hubp32_update_mall_sel +ffffffff8216d1b0 T hubp32_prepare_subvp_buffering +ffffffff8216d250 T hubp32_phantom_hubp_post_enable +ffffffff8216d360 T hubp32_cursor_set_attributes +ffffffff8216d620 T hubp32_init +ffffffff8216d650 T hubp32_construct +ffffffff8216e000 T dcn32_dsc_pg_control +ffffffff8216e320 T dcn32_enable_power_gating_plane +ffffffff8216e590 T dcn32_hubp_pg_control +ffffffff8216e800 T dcn32_apply_idle_power_optimizations +ffffffff8216eaf0 T dcn32_commit_subvp_config +ffffffff8216eba0 T dcn32_subvp_pipe_control_lock +ffffffff8216ed70 T dcn32_subvp_pipe_control_lock_fast +ffffffff8216edf0 T dcn32_set_mpc_shaper_3dlut +ffffffff8216ef10 T dcn32_set_mcm_luts +ffffffff8216f0a0 T dcn32_set_input_transfer_func +ffffffff8216f1e0 T dcn32_set_output_transfer_func +ffffffff8216f420 T dcn32_update_force_pstate +ffffffff8216f640 T dcn32_update_mall_sel +ffffffff8216f830 T dcn32_program_mall_pipe_config +ffffffff8216f920 T dcn32_init_hw +ffffffff821701e0 T dcn32_update_odm +ffffffff821707e0 T dcn32_calculate_dccg_k1_k2_values +ffffffff82170a10 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff82170ab0 T dcn32_set_pixels_per_cycle +ffffffff82170bf0 T dcn32_resync_fifo_dccg_dio +ffffffff82170d90 T dcn32_unblank_stream +ffffffff82170fa0 T dcn32_disable_link_output +ffffffff82171310 T dcn32_update_phantom_vp_position +ffffffff82171420 T dcn32_apply_update_flags_for_phantom +ffffffff821714a0 T dcn32_dsc_pg_status +ffffffff82171580 T dcn32_update_dsc_pg +ffffffff82171680 T dcn32_enable_phantom_streams +ffffffff821717c0 T dcn32_init_blank +ffffffff82171a00 T dcn32_blank_phantom +ffffffff82171b80 T dcn32_is_pipe_topology_transition_seamless +ffffffff82172000 T dcn32_hw_sequencer_init_functions +ffffffff82173000 T dcn32_mmhubbub_construct +ffffffff82173050 t mmhubbub32_warmup_mcif +ffffffff82173260 t mmhubbub32_config_mcif_buf +ffffffff82173710 t mmhubbub32_config_mcif_arb +ffffffff82174000 T mpc32_mpc_init +ffffffff821741e0 T mpc32_power_on_blnd_lut +ffffffff82174350 T mpc32_configure_post1dlut +ffffffff82174450 T mpc32_program_post1dluta_settings +ffffffff82174660 T mpc32_program_post1dlutb_settings +ffffffff82174870 T mpc32_program_post1dlut_pwl +ffffffff82174ca0 T mpc32_program_post1dlut +ffffffff82174fb0 T mpc32_configure_shaper_lut +ffffffff821750d0 T mpc32_program_shaper_luta_settings +ffffffff82175f60 T mpc32_program_shaper_lutb_settings +ffffffff82176df0 T mpc32_program_shaper_lut +ffffffff82176f90 T mpc32_power_on_shaper_3dlut +ffffffff821771c0 T mpc32_program_shaper +ffffffff821774e0 T mpc32_select_3dlut_ram +ffffffff82177590 T mpc32_select_3dlut_ram_mask +ffffffff82177660 T mpc32_set3dlut_ram12 +ffffffff82177860 T mpc32_set3dlut_ram10 +ffffffff82177930 T mpc32_program_3dlut +ffffffff82178300 T dcn32_mpc_construct +ffffffff82179000 T optc32_set_h_timing_div_manual_mode +ffffffff82179040 T dcn32_timing_generator_init +ffffffff821790b0 t optc32_enable_crtc +ffffffff821791b0 t optc32_disable_crtc +ffffffff82179370 t optc32_phantom_crtc_post_enable +ffffffff82179430 t optc32_disable_phantom_otg +ffffffff82179520 t optc32_set_drr +ffffffff821796f0 t optc32_set_odm_bypass +ffffffff82179860 t optc32_set_odm_combine +ffffffff8217a000 T dcn32_panel_cntl_create +ffffffff8217a070 T dcn32_acquire_post_bldn_3dlut +ffffffff8217a160 T dcn32_release_post_bldn_3dlut +ffffffff8217a210 T dcn32_retain_phantom_pipes +ffffffff8217a2f0 T dcn32_remove_phantom_pipes +ffffffff8217a460 T dcn32_add_phantom_pipes +ffffffff8217a890 T dcn32_validate_bandwidth +ffffffff8217ad70 T dcn32_populate_dml_pipes_from_context +ffffffff8217b1a0 T dcn32_calculate_wm_and_dlg +ffffffff8217b210 T dcn32_create_resource_pool +ffffffff8217b2c0 t dcn32_resource_construct +ffffffff82186800 T dcn32_acquire_free_pipe_as_secondary_dpp_pipe +ffffffff82186b00 T dcn32_calc_num_avail_chans_for_mall +ffffffff82186b70 t dcn32_mpc_create +ffffffff8218b1d0 t dcn32_dwbc_create +ffffffff8218bbd0 t dcn32_mmhubbub_create +ffffffff8218c080 t dcn32_resource_destruct +ffffffff8218c710 t dcn32_destroy_resource_pool +ffffffff8218c770 t dcn32_link_encoder_create +ffffffff8218d840 t dcn32_update_bw_bounding_box +ffffffff8218d890 t read_dce_straps +ffffffff8218d8c0 t dcn32_create_audio +ffffffff8218dc40 t dcn32_stream_encoder_create +ffffffff8218fa80 t dcn32_hpo_dp_stream_encoder_create +ffffffff82190860 t dcn32_hpo_dp_link_encoder_create +ffffffff82190cb0 t dcn32_hwseq_create +ffffffff821911a0 t dcn32_vpg_create +ffffffff82192000 T dcn32_helper_mall_bytes_to_ways +ffffffff82192060 T dcn32_helper_calculate_mall_bytes_for_cursor +ffffffff82192100 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff82192180 T dcn32_merge_pipes_for_subvp +ffffffff82192340 T dcn32_all_pipes_have_stream_and_plane +ffffffff821923d0 T dcn32_subvp_in_use +ffffffff82192460 T dcn32_mpo_in_use +ffffffff821924d0 T dcn32_any_surfaces_rotated +ffffffff82192560 T dcn32_is_center_timing +ffffffff821925d0 T dcn32_is_psr_capable +ffffffff82192620 T dcn32_determine_det_override +ffffffff82192960 T dcn32_set_det_allocations +ffffffff82192af0 T dcn32_save_mall_state +ffffffff82192ba0 T dcn32_restore_mall_state +ffffffff82192c50 T dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82192e00 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82192eb0 T dcn32_check_native_scaling_for_res +ffffffff82192f10 T dcn32_subvp_drr_admissable +ffffffff821930d0 T dcn32_subvp_vblank_admissable +ffffffff82194000 T dcn321_link_encoder_construct +ffffffff82195000 T dcn321_create_resource_pool +ffffffff821950b0 t dcn321_resource_construct +ffffffff821a0550 t dcn321_mpc_create +ffffffff821a4bb0 t dcn321_dwbc_create +ffffffff821a55b0 t dcn321_mmhubbub_create +ffffffff821a5a60 t dcn321_resource_destruct +ffffffff821a60f0 t dcn321_destroy_resource_pool +ffffffff821a6150 t dcn321_link_encoder_create +ffffffff821a7220 t dcn321_update_bw_bounding_box +ffffffff821a7270 t read_dce_straps +ffffffff821a72a0 t dcn321_create_audio +ffffffff821a7620 t dcn321_stream_encoder_create +ffffffff821a9460 t dcn321_hpo_dp_stream_encoder_create +ffffffff821aa240 t dcn321_hpo_dp_link_encoder_create +ffffffff821aa690 t dcn321_hwseq_create +ffffffff821aab80 t dcn321_vpg_create +ffffffff821ab000 T bw_int_to_fixed_nonconst +ffffffff821ab090 T bw_frc_to_fixed +ffffffff821ab260 T bw_floor2 +ffffffff821ab310 T bw_ceil2 +ffffffff821ab390 T bw_mul +ffffffff821ac000 T convert_to_custom_float_format +ffffffff821ad000 T bw_calcs_init +ffffffff821ade60 T bw_calcs +ffffffff821af800 t calculate_bandwidth +ffffffff821b7000 T scaler_settings_calculation +ffffffff821b7350 T mode_support_and_system_configuration +ffffffff821bd180 T display_pipe_configuration +ffffffff821bdab0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff821c3000 T dcn_bw_mod +ffffffff821c3060 T dcn_bw_min2 +ffffffff821c30a0 T dcn_bw_max +ffffffff821c30d0 T dcn_bw_max2 +ffffffff821c3110 T dcn_bw_floor2 +ffffffff821c31b0 T dcn_bw_floor +ffffffff821c31e0 T dcn_bw_ceil +ffffffff821c3220 T dcn_bw_ceil2 +ffffffff821c32d0 T dcn_bw_max3 +ffffffff821c3350 T dcn_bw_max5 +ffffffff821c3490 T dcn_bw_pow +ffffffff821c3520 T dcn_bw_fabs +ffffffff821c3560 T dcn_bw_log +ffffffff821c4000 T swizzle_mode_to_macro_tile_size +ffffffff821c4090 T dcn_validate_bandwidth +ffffffff821c6300 T dcn_bw_sync_calcs_and_dml +ffffffff821c6550 t dcn_bw_calc_rq_dlg_ttu +ffffffff821c6d20 T dcn_find_dcfclk_suits_all +ffffffff821c7180 T dcn_bw_update_from_pplib_fclks +ffffffff821c7300 T dcn_bw_update_from_pplib_dcfclks +ffffffff821c73d0 T dcn_get_soc_clks +ffffffff821c7450 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff821c8000 T dcn10_resource_construct_fp +ffffffff821c9000 T dcn20_populate_dml_writeback_from_context +ffffffff821c9180 T dcn20_fpu_set_wb_arb_params +ffffffff821c9330 T dcn20_calculate_dlg_params +ffffffff821c9b70 T dcn20_populate_dml_pipes_from_context +ffffffff821caa80 T dcn20_calculate_wm +ffffffff821cb270 T dcn20_update_bounding_box +ffffffff821cb4f0 T dcn20_cap_soc_clocks +ffffffff821cb850 T dcn20_patch_bounding_box +ffffffff821cba40 T dcn20_validate_bandwidth_fp +ffffffff821cbbe0 t dcn20_validate_bandwidth_internal +ffffffff821cbfe0 T dcn20_fpu_set_wm_ranges +ffffffff821cc080 T dcn20_fpu_adjust_dppclk +ffffffff821cc120 T dcn21_populate_dml_pipes_from_context +ffffffff821cc230 T dcn21_validate_bandwidth_fp +ffffffff821cccc0 T dcn21_update_bw_bounding_box +ffffffff821cd0d0 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff821cd130 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff821cd430 t calculate_wm_set_for_vlevel +ffffffff821ce000 T dml20_recalculate +ffffffff821ce740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821d3be0 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff821db040 t TruncToValidBPP +ffffffff821db220 t CalculateVMAndRowBytes +ffffffff821db8e0 t CalculatePrefetchSourceLines +ffffffff821dbab0 t CalculateWriteBackDelay +ffffffff821dbd80 t CalculatePrefetchSchedule +ffffffff821dcc30 t CalculateFlipSchedule +ffffffff821dd000 t adjust_ReturnBW +ffffffff821de000 T dml20v2_recalculate +ffffffff821de740 t dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821e3d60 T dml20v2_ModeSupportAndSystemConfigurationFull +ffffffff821eb140 t TruncToValidBPP +ffffffff821eb6d0 t CalculateVMAndRowBytes +ffffffff821ebd90 t CalculatePrefetchSourceLines +ffffffff821ebf60 t CalculateWriteBackDelay +ffffffff821ec230 t CalculateDelayAfterScaler +ffffffff821ec590 t CalculatePrefetchSchedule +ffffffff821ed2b0 t CalculateFlipSchedule +ffffffff821ed680 t adjust_ReturnBW +ffffffff821ee000 T dml20_rq_dlg_get_rq_reg +ffffffff821ee490 t dml20_rq_dlg_get_rq_params +ffffffff821ee660 T dml20_rq_dlg_get_dlg_reg +ffffffff821f0550 t get_surf_rq_param +ffffffff821f0db0 t calculate_ttu_cursor +ffffffff821f2000 T dml20v2_rq_dlg_get_rq_reg +ffffffff821f2490 t dml20v2_rq_dlg_get_rq_params +ffffffff821f2660 T dml20v2_rq_dlg_get_dlg_reg +ffffffff821f4560 t get_surf_rq_param +ffffffff821f4dc0 t calculate_ttu_cursor +ffffffff821f6000 T dml21_recalculate +ffffffff821f6710 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821fbed0 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff82202380 t TruncToValidBPP +ffffffff82202910 t CalculateDCFCLKDeepSleep +ffffffff82202c50 t CalculateVMAndRowBytes +ffffffff822034b0 t CalculatePrefetchSourceLines +ffffffff82203680 t CalculateWriteBackDelay +ffffffff82203950 t CalculatePrefetchSchedulePerPlane +ffffffff82204190 t CalculateUrgentBurstFactor +ffffffff822045a0 t CalculateFlipSchedule +ffffffff82204a80 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82205a70 t CalculatePrefetchSchedule +ffffffff82208000 T dml21_rq_dlg_get_rq_reg +ffffffff82208490 t dml_rq_dlg_get_rq_params +ffffffff82208660 T dml21_rq_dlg_get_dlg_reg +ffffffff8220a930 t get_surf_rq_param +ffffffff8220b250 t calculate_ttu_cursor +ffffffff8220c000 T optc3_fpu_set_vrr_m_const +ffffffff8220c4a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff8220c7b0 T dcn30_fpu_set_mcif_arb_params +ffffffff8220c920 T dcn30_fpu_update_soc_for_wm_a +ffffffff8220c9f0 T dcn30_fpu_calculate_wm_and_dlg +ffffffff8220d480 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff8220d670 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff8220d6d0 T dcn30_fpu_update_max_clk +ffffffff8220d780 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff8220d880 T dcn30_fpu_update_bw_bounding_box +ffffffff8220da60 T dcn3_fpu_build_wm_range_table +ffffffff8220dd40 T patch_dcn30_soc_bounding_box +ffffffff8220e000 T dml30_recalculate +ffffffff8220e5f0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff822150b0 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff82215320 T dml30_CalculateWriteBackDISPCLK +ffffffff82215490 t dml_max3 +ffffffff822154f0 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff8221d040 t CalculateSwathAndDETConfiguration +ffffffff8221d740 t TruncToValidBPP +ffffffff8221d9a0 t CalculateVMAndRowBytes +ffffffff8221e010 t CalculatePrefetchSourceLines +ffffffff8221e1e0 t CalculateUrgentBurstFactor +ffffffff8221e470 t CalculateDCFCLKDeepSleep +ffffffff8221e790 t UseMinimumDCFCLK +ffffffff8221fab0 t CalculatePrefetchSchedule +ffffffff82220f50 t CalculateFlipSchedule +ffffffff82221450 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82222190 t CalculateSwathWidth +ffffffff82223000 T dml30_rq_dlg_get_rq_reg +ffffffff822234b0 t dml_rq_dlg_get_rq_params +ffffffff82223740 T dml30_rq_dlg_get_dlg_reg +ffffffff82225e10 t get_surf_rq_param +ffffffff822267a0 t calculate_ttu_cursor +ffffffff82227000 T dcn301_update_bw_bounding_box +ffffffff822272e0 T dcn301_fpu_set_wm_ranges +ffffffff82227380 T dcn301_fpu_init_soc_bounding_box +ffffffff82227420 T dcn301_calculate_wm_and_dlg_fp +ffffffff82227750 t calculate_wm_set_for_vlevel +ffffffff82228000 T dcn302_fpu_update_bw_bounding_box +ffffffff82228940 T dcn302_fpu_init_soc_bounding_box +ffffffff82229000 T dcn303_fpu_update_bw_bounding_box +ffffffff822299a0 T dcn303_fpu_init_soc_bounding_box +ffffffff8222a000 T dcn31_zero_pipe_dcc_fraction +ffffffff8222a060 T dcn31_update_soc_for_wm_a +ffffffff8222a110 T dcn315_update_soc_for_wm_a +ffffffff8222a1e0 T dcn31_calculate_wm_and_dlg_fp +ffffffff8222a840 T dcn31_update_bw_bounding_box +ffffffff8222abe0 T dcn315_update_bw_bounding_box +ffffffff8222aed0 T dcn316_update_bw_bounding_box +ffffffff8222b280 T dcn_get_max_non_odm_pix_rate_100hz +ffffffff8222b2e0 T dcn_get_approx_det_segs_required_for_pstate +ffffffff8222c000 T dml31_recalculate +ffffffff8222c2d0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82233190 T dml31_CalculateWriteBackDISPCLK +ffffffff82233300 t dml_max3 +ffffffff82233360 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff8223b440 t CalculateSwathAndDETConfiguration +ffffffff8223baa0 t TruncToValidBPP +ffffffff8223bcf0 t CalculateDCFCLKDeepSleep +ffffffff8223c010 t CalculateVMAndRowBytes +ffffffff8223c650 t CalculatePrefetchSourceLines +ffffffff8223c820 t CalculateUrgentBurstFactor +ffffffff8223cab0 t UseMinimumDCFCLK +ffffffff8223da40 t CalculatePrefetchSchedulePerPlane +ffffffff8223e1a0 t CalculateFlipSchedule +ffffffff8223e730 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8223f350 t CalculateSwathWidth +ffffffff8223f860 t CalculatePrefetchSchedule +ffffffff82240c40 t CalculateVupdateAndDynamicMetadataParameters +ffffffff82241000 T dml31_rq_dlg_get_rq_reg +ffffffff822414b0 t dml_rq_dlg_get_rq_params +ffffffff82241740 T dml31_rq_dlg_get_dlg_reg +ffffffff82244100 t get_surf_rq_param +ffffffff82245000 T dcn314_update_bw_bounding_box_fpu +ffffffff822453f0 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff82246000 T dml314_recalculate +ffffffff82246270 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8224d050 T dml314_CalculateWriteBackDISPCLK +ffffffff8224d1c0 t dml_max3 +ffffffff8224d220 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff822555a0 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff82255810 t CalculateSwathAndDETConfiguration +ffffffff82255e50 t TruncToValidBPP +ffffffff822560a0 t CalculateDCFCLKDeepSleep +ffffffff822563c0 t CalculateVMAndRowBytes +ffffffff82256a00 t CalculatePrefetchSourceLines +ffffffff82256bd0 t CalculateUrgentBurstFactor +ffffffff82256e60 t CalculateMaxVStartup +ffffffff82256fa0 t UseMinimumDCFCLK +ffffffff82257f30 t CalculatePrefetchSchedulePerPlane +ffffffff82258690 t CalculateFlipSchedule +ffffffff82258c20 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82259840 t CalculateSwathWidth +ffffffff82259d50 t CalculatePrefetchSchedule +ffffffff8225b130 t CalculateVupdateAndDynamicMetadataParameters +ffffffff8225c000 T dml314_rq_dlg_get_rq_reg +ffffffff8225c4b0 t dml_rq_dlg_get_rq_params +ffffffff8225c740 T dml314_rq_dlg_get_dlg_reg +ffffffff8225f100 t get_surf_rq_param +ffffffff82260000 T dcn32_build_wm_range_table_fpu +ffffffff82260390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff82260540 T dcn32_internal_validate_bw +ffffffff822623b0 T dcn32_helper_populate_phantom_dlg_params +ffffffff82262550 T dcn32_predict_pipe_split +ffffffff82262780 T dcn32_set_phantom_stream_timing +ffffffff82262a90 T dcn32_determine_max_vratio_prefetch +ffffffff82262b70 t dcn32_split_stream_for_mpc_or_odm +ffffffff82262f20 T dcn32_calculate_wm_and_dlg_fpu +ffffffff82264650 T dcn32_patch_dpm_table +ffffffff82264860 T dcn32_update_bw_bounding_box_fpu +ffffffff82266ed0 T dcn32_zero_pipe_dcc_fraction +ffffffff82266f30 T dcn32_allow_subvp_with_active_margin +ffffffff82267000 T dcn32_allow_subvp_high_refresh_rate +ffffffff82267200 T dcn32_assign_fpo_vactive_candidate +ffffffff822672c0 T dcn32_find_vactive_pipe +ffffffff82267430 T dcn32_set_clock_limits +ffffffff82267480 T dcn32_override_min_req_memclk +ffffffff82267540 t subvp_drr_schedulable +ffffffff822677d0 t get_optimal_ntuple +ffffffff82268000 T dml32_recalculate +ffffffff8226c320 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff82274000 T dml32_dscceComputeDelay +ffffffff82274140 T dml32_dscComputeDelay +ffffffff82274180 T IsVertical +ffffffff822741b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff822744d0 t dml_max3 +ffffffff82274530 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff82274860 T dml32_CalculateSwathAndDETConfiguration +ffffffff82275090 T dml32_CalculateSwathWidth +ffffffff82275950 T dml32_UnboundedRequest +ffffffff822759c0 T dml32_CalculateDETBufferSize +ffffffff82276000 T dml32_CalculateODMMode +ffffffff82276780 T dml32_CalculateRequiredDispclk +ffffffff82276940 T dml32_RoundToDFSGranularity +ffffffff822769d0 T dml32_CalculateOutputLink +ffffffff82277440 T dml32_TruncToValidBPP +ffffffff82277770 T dml32_CalculateDPPCLK +ffffffff82277910 T dml32_RequiredDTBCLK +ffffffff82277b60 t dml_max4 +ffffffff82277be0 T dml32_DSCDelayRequirement +ffffffff822780a0 T dml32_CalculateSurfaceSizeInMall +ffffffff82278bf0 T dml32_CalculateVMRowAndSwath +ffffffff82279a00 T dml32_CalculateVMAndRowBytes +ffffffff8227a650 T dml32_CalculatePrefetchSourceLines +ffffffff8227a8a0 T dml32_CalculateMALLUseForStaticScreen +ffffffff8227a9e0 T dml32_CalculateRowBandwidth +ffffffff8227ab40 T dml32_CalculateUrgentLatency +ffffffff8227abf0 T dml32_CalculateUrgentBurstFactor +ffffffff8227aea0 T dml32_CalculateDCFCLKDeepSleep +ffffffff8227b1f0 T dml32_CalculateWriteBackDelay +ffffffff8227b350 T dml32_UseMinimumDCFCLK +ffffffff8227c3c0 T dml32_CalculateExtraLatencyBytes +ffffffff8227c580 T dml32_CalculateTWait +ffffffff8227c670 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff8227c8d0 T dml32_get_return_bw_mbps +ffffffff8227ca90 T dml32_get_return_bw_mbps_vm_only +ffffffff8227cb70 T dml32_CalculateExtraLatency +ffffffff8227cd90 T dml32_CalculatePrefetchSchedule +ffffffff8227e400 T dml32_CalculateFlipSchedule +ffffffff8227e960 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff8227fa70 T dml32_CalculateWriteBackDISPCLK +ffffffff8227fc40 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff8227fc90 T dml32_CalculatePixelDeliveryTimes +ffffffff82280110 T dml32_CalculateMetaAndPTETimes +ffffffff82280870 T dml32_CalculateVMGroupAndRequestTimes +ffffffff82280db0 T dml32_CalculateDCCConfiguration +ffffffff822813c0 T dml32_CalculateStutterEfficiency +ffffffff822822e0 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff822823d0 T dml32_CalculateVActiveBandwithSupport +ffffffff82282540 T dml32_CalculatePrefetchBandwithSupport +ffffffff82282860 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff822829b0 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff82282c30 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff82283000 T dml32_rq_dlg_get_rq_reg +ffffffff822836a0 T dml32_rq_dlg_get_dlg_reg +ffffffff82286000 T dcn321_update_bw_bounding_box_fpu +ffffffff82288760 t get_optimal_ntuple +ffffffff82289000 T dml_init_instance +ffffffff82289310 T dml_get_status_message +ffffffff82289350 T dml_log_pipe_params +ffffffff82289380 T dml_log_mode_support_params +ffffffff8228a000 T dml_get_voltage_level +ffffffff8228a240 t fetch_socbb_params +ffffffff8228a730 t fetch_ip_params +ffffffff8228abd0 t fetch_pipe_params +ffffffff8228bc50 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff8228bcd0 T get_clk_dcf_deepsleep +ffffffff8228bde0 T get_wm_urgent +ffffffff8228bef0 T get_wm_memory_trip +ffffffff8228c000 T get_wm_writeback_urgent +ffffffff8228c110 T get_wm_stutter_exit +ffffffff8228c220 T get_wm_stutter_enter_exit +ffffffff8228c330 T get_wm_z8_stutter_exit +ffffffff8228c440 T get_wm_z8_stutter_enter_exit +ffffffff8228c550 T get_stutter_efficiency_z8 +ffffffff8228c660 T get_stutter_num_bursts_z8 +ffffffff8228c770 T get_wm_dram_clock_change +ffffffff8228c880 T get_wm_writeback_dram_clock_change +ffffffff8228c990 T get_stutter_efficiency +ffffffff8228caa0 T get_stutter_efficiency_no_vblank +ffffffff8228cbb0 T get_stutter_period +ffffffff8228ccc0 T get_urgent_latency +ffffffff8228cdd0 T get_urgent_extra_latency +ffffffff8228cee0 T get_nonurgent_latency +ffffffff8228cff0 T get_dram_clock_change_latency +ffffffff8228d100 T get_dispclk_calculated +ffffffff8228d210 T get_total_data_read_bw +ffffffff8228d320 T get_return_bw +ffffffff8228d430 T get_tcalc +ffffffff8228d540 T get_fraction_of_urgent_bandwidth +ffffffff8228d650 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff8228d760 T get_cstate_max_cap_mode +ffffffff8228d880 T get_comp_buffer_size_kbytes +ffffffff8228d990 T get_pixel_chunk_size_in_kbyte +ffffffff8228dab0 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff8228dbd0 T get_meta_chunk_size_in_kbyte +ffffffff8228dcf0 T get_min_pixel_chunk_size_in_byte +ffffffff8228de00 T get_min_meta_chunk_size_in_byte +ffffffff8228df20 T get_fclk_watermark +ffffffff8228e030 T get_usr_retraining_watermark +ffffffff8228e140 T get_comp_buffer_reserved_space_kbytes +ffffffff8228e260 T get_comp_buffer_reserved_space_64bytes +ffffffff8228e380 T get_comp_buffer_reserved_space_zs +ffffffff8228e4a0 T get_unbounded_request_enabled +ffffffff8228e5c0 T get_dsc_delay +ffffffff8228e6f0 T get_dppclk_calculated +ffffffff8228e810 T get_dscclk_calculated +ffffffff8228e930 T get_min_ttu_vblank +ffffffff8228ea50 T get_min_ttu_vblank_in_us +ffffffff8228eb70 T get_vratio_prefetch_l +ffffffff8228ec90 T get_vratio_prefetch_c +ffffffff8228edb0 T get_dst_x_after_scaler +ffffffff8228eed0 T get_dst_y_after_scaler +ffffffff8228eff0 T get_dst_y_per_vm_vblank +ffffffff8228f110 T get_dst_y_per_row_vblank +ffffffff8228f230 T get_dst_y_prefetch +ffffffff8228f350 T get_dst_y_per_vm_flip +ffffffff8228f470 T get_dst_y_per_row_flip +ffffffff8228f590 T get_refcyc_per_vm_group_vblank +ffffffff8228f6b0 T get_refcyc_per_vm_group_flip +ffffffff8228f7d0 T get_refcyc_per_vm_req_vblank +ffffffff8228f8f0 T get_refcyc_per_vm_req_flip +ffffffff8228fa10 T get_refcyc_per_vm_group_vblank_in_us +ffffffff8228fb30 T get_refcyc_per_vm_group_flip_in_us +ffffffff8228fc50 T get_refcyc_per_vm_req_vblank_in_us +ffffffff8228fd70 T get_refcyc_per_vm_req_flip_in_us +ffffffff8228fe90 T get_refcyc_per_vm_dmdata_in_us +ffffffff8228ffb0 T get_dmdata_dl_delta_in_us +ffffffff822900d0 T get_refcyc_per_line_delivery_l_in_us +ffffffff822901f0 T get_refcyc_per_line_delivery_c_in_us +ffffffff82290310 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff82290430 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff82290550 T get_refcyc_per_req_delivery_l_in_us +ffffffff82290670 T get_refcyc_per_req_delivery_c_in_us +ffffffff82290790 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff822908b0 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff822909d0 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff82290af0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff82290c10 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff82290d30 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff82290e50 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff82290f70 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff82291090 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff822911b0 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff822912d0 T get_vstartup +ffffffff82291400 T get_vupdate_offset +ffffffff82291530 T get_vupdate_width +ffffffff82291650 T get_vready_offset +ffffffff82291770 T get_vready_at_or_after_vsync +ffffffff822918a0 T get_min_dst_y_next_start +ffffffff822919d0 T get_dst_y_per_pte_row_nom_l +ffffffff82291af0 T get_dst_y_per_pte_row_nom_c +ffffffff82291c10 T get_dst_y_per_meta_row_nom_l +ffffffff82291d30 T get_dst_y_per_meta_row_nom_c +ffffffff82291e50 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff82291f70 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff82292090 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff822921b0 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff822922d0 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff822923f0 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff82292510 T get_vstartup_calculated +ffffffff82292640 T get_dpte_row_height_linear_c +ffffffff82292770 T get_swath_height_l +ffffffff822928a0 T get_swath_height_c +ffffffff822929d0 T get_det_stored_buffer_size_l_bytes +ffffffff82292b00 T get_det_stored_buffer_size_c_bytes +ffffffff82292c30 T get_dpte_group_size_in_bytes +ffffffff82292d60 T get_vm_group_size_in_bytes +ffffffff82292e90 T get_dpte_row_height_linear_l +ffffffff82292fc0 T get_pte_buffer_mode +ffffffff822930f0 T get_subviewport_lines_needed_in_mall +ffffffff82293220 T get_surface_size_in_mall +ffffffff82293350 T get_total_immediate_flip_bytes +ffffffff82293470 T get_total_immediate_flip_bw +ffffffff82293650 T get_total_prefetch_bw +ffffffff82293830 T get_total_surface_size_in_mall_bytes +ffffffff822939d0 T get_det_buffer_size_kbytes +ffffffff82293b00 T get_is_phantom_pipe +ffffffff82293c30 T Calculate256BBlockSizes +ffffffff82293d20 T CalculateMinAndMaxPrefetchMode +ffffffff82293da0 T ModeSupportAndSystemConfiguration +ffffffff822940b0 T CalculateWriteBackDISPCLK +ffffffff82295000 T print__rq_params_st +ffffffff82295030 T print__data_rq_sizing_params_st +ffffffff82295060 T print__data_rq_dlg_params_st +ffffffff82295090 T print__data_rq_misc_params_st +ffffffff822950c0 T print__rq_dlg_params_st +ffffffff822950f0 T print__dlg_sys_params_st +ffffffff82295120 T print__data_rq_regs_st +ffffffff82295150 T print__rq_regs_st +ffffffff82295180 T print__dlg_regs_st +ffffffff822951b0 T print__ttu_regs_st +ffffffff82296000 T dml1_extract_rq_regs +ffffffff82296330 T dml1_rq_dlg_get_rq_params +ffffffff82296510 t get_surf_rq_param +ffffffff822970c0 T dml1_rq_dlg_get_dlg_params +ffffffff8229a000 T _do_calc_rc_params +ffffffff8229afc0 t get_qp_set +ffffffff8229c000 T dc_bandwidth_in_kbps_from_timing +ffffffff8229c290 T dc_dsc_stream_bandwidth_in_kbps +ffffffff8229c3e0 T dc_dsc_parse_dsc_dpcd +ffffffff8229c680 t dsc_throughput_from_dpcd +ffffffff8229c840 T dc_dsc_compute_bandwidth_range +ffffffff8229ca30 t intersect_dsc_caps +ffffffff8229cc00 t setup_dsc_config +ffffffff8229d3d0 T dc_dsc_compute_config +ffffffff8229d4c0 T dc_dsc_stream_bandwidth_overhead_in_kbps +ffffffff8229d600 T dc_dsc_get_policy_for_timing +ffffffff8229d6a0 T dc_dsc_policy_set_max_target_bpp_limit +ffffffff8229d6d0 T dc_dsc_policy_set_enable_dsc_when_not_needed +ffffffff8229d700 T dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff8229d730 T dc_set_disable_128b_132b_stream_overhead +ffffffff8229d760 T dc_dsc_get_default_config_option +ffffffff8229d7b0 t fit_num_slices_up +ffffffff8229d860 t decide_dsc_target_bpp_x16 +ffffffff8229e000 T calc_rc_params +ffffffff8229f000 T dscc_compute_dsc_parameters +ffffffff822a0000 T dal_hw_factory_dce110_init +ffffffff822a0060 t define_hpd_registers +ffffffff822a00b0 t define_ddc_registers +ffffffff822a1000 T dal_hw_translate_dce110_init +ffffffff822a1030 t offset_to_id +ffffffff822a1390 t id_to_offset +ffffffff822a2000 T dal_hw_factory_dce120_init +ffffffff822a2060 t define_hpd_registers +ffffffff822a20b0 t define_ddc_registers +ffffffff822a3000 T dal_hw_translate_dce120_init +ffffffff822a3030 t offset_to_id +ffffffff822a33a0 t id_to_offset +ffffffff822a4000 T dal_hw_factory_dce80_init +ffffffff822a4060 t define_hpd_registers +ffffffff822a40b0 t define_ddc_registers +ffffffff822a5000 T dal_hw_translate_dce80_init +ffffffff822a5030 t offset_to_id +ffffffff822a57b0 t id_to_offset +ffffffff822a6000 T dal_hw_factory_dcn10_init +ffffffff822a6060 t define_hpd_registers +ffffffff822a60b0 t define_ddc_registers +ffffffff822a6150 t define_generic_registers +ffffffff822a7000 T dal_hw_translate_dcn10_init +ffffffff822a7030 t offset_to_id +ffffffff822a7390 t id_to_offset +ffffffff822a8000 T dal_hw_factory_dcn20_init +ffffffff822a8060 t define_hpd_registers +ffffffff822a80b0 t define_ddc_registers +ffffffff822a8160 t define_generic_registers +ffffffff822a9000 T dal_hw_translate_dcn20_init +ffffffff822a9030 t offset_to_id +ffffffff822a92b0 t id_to_offset +ffffffff822aa000 T dal_hw_factory_dcn21_init +ffffffff822aa060 t define_hpd_registers +ffffffff822aa0b0 t define_ddc_registers +ffffffff822aa160 t define_generic_registers +ffffffff822ab000 T dal_hw_translate_dcn21_init +ffffffff822ab030 t offset_to_id +ffffffff822ab2b0 t id_to_offset +ffffffff822ac000 T dal_hw_factory_dcn30_init +ffffffff822ac060 t define_hpd_registers +ffffffff822ac0b0 t define_ddc_registers +ffffffff822ac160 t define_generic_registers +ffffffff822ad000 T dal_hw_translate_dcn30_init +ffffffff822ad030 t offset_to_id +ffffffff822ad2c0 t id_to_offset +ffffffff822ae000 T dal_hw_factory_dcn315_init +ffffffff822ae060 t define_hpd_registers +ffffffff822ae0b0 t define_ddc_registers +ffffffff822ae160 t define_generic_registers +ffffffff822af000 T dal_hw_translate_dcn315_init +ffffffff822af030 t offset_to_id +ffffffff822af2b0 t id_to_offset +ffffffff822b0000 T dal_hw_factory_dcn32_init +ffffffff822b0060 t define_hpd_registers +ffffffff822b00b0 t define_ddc_registers +ffffffff822b0160 t define_generic_registers +ffffffff822b1000 T dal_hw_translate_dcn32_init +ffffffff822b1030 t offset_to_id +ffffffff822b1290 t id_to_offset +ffffffff822b2000 T dal_gpio_open +ffffffff822b20c0 T dal_gpio_open_ex +ffffffff822b2180 T dal_gpio_get_value +ffffffff822b2200 T dal_gpio_set_value +ffffffff822b2280 T dal_gpio_get_mode +ffffffff822b22b0 T dal_gpio_lock_pin +ffffffff822b22d0 T dal_gpio_unlock_pin +ffffffff822b22f0 T dal_gpio_change_mode +ffffffff822b2370 T dal_gpio_get_id +ffffffff822b23a0 T dal_gpio_get_enum +ffffffff822b23d0 T dal_gpio_set_config +ffffffff822b2450 T dal_gpio_get_pin_info +ffffffff822b24b0 T dal_gpio_get_sync_source +ffffffff822b2540 T dal_gpio_get_output_state +ffffffff822b2570 T dal_gpio_get_ddc +ffffffff822b25a0 T dal_gpio_get_hpd +ffffffff822b25d0 T dal_gpio_get_generic +ffffffff822b2600 T dal_gpio_close +ffffffff822b2650 T dal_gpio_create +ffffffff822b27e0 T dal_gpio_destroy +ffffffff822b3000 T dal_gpio_service_create +ffffffff822b3240 T dal_gpio_service_create_irq +ffffffff822b3300 T dal_gpio_create_irq +ffffffff822b3380 T dal_gpio_service_create_generic_mux +ffffffff822b3420 T dal_gpio_destroy_generic_mux +ffffffff822b34b0 T dal_gpio_get_generic_pin_info +ffffffff822b3510 T dal_gpio_service_destroy +ffffffff822b3640 T dal_mux_setup_config +ffffffff822b36a0 T dal_gpio_service_lock +ffffffff822b3720 T dal_gpio_service_unlock +ffffffff822b37a0 T dal_gpio_service_open +ffffffff822b39e0 T dal_gpio_service_close +ffffffff822b3a80 T dal_irq_get_source +ffffffff822b3af0 T dal_irq_get_rx_source +ffffffff822b3b40 T dal_irq_setup_hpd_filter +ffffffff822b3ba0 T dal_gpio_destroy_irq +ffffffff822b3c30 T dal_gpio_create_ddc +ffffffff822b3da0 T dal_gpio_destroy_ddc +ffffffff822b3e70 T dal_ddc_close +ffffffff822b3ec0 T dal_ddc_open +ffffffff822b4020 T dal_ddc_change_mode +ffffffff822b40c0 T dal_ddc_get_line +ffffffff822b40e0 T dal_ddc_set_config +ffffffff822b5000 T dal_hw_ddc_init +ffffffff822b5100 T dal_hw_ddc_get_pin +ffffffff822b5110 t dal_hw_ddc_destroy +ffffffff822b5170 t set_config +ffffffff822b6000 T dal_hw_factory_init +ffffffff822b7000 T dal_hw_generic_init +ffffffff822b7100 T dal_hw_generic_get_pin +ffffffff822b7110 t dal_hw_generic_destroy +ffffffff822b7170 t set_config +ffffffff822b8000 T dal_hw_gpio_open +ffffffff822b80b0 T dal_hw_gpio_config_mode +ffffffff822b81a0 T dal_hw_gpio_get_value +ffffffff822b8200 T dal_hw_gpio_set_value +ffffffff822b8290 T dal_hw_gpio_change_mode +ffffffff822b82a0 T dal_hw_gpio_close +ffffffff822b8350 T dal_hw_gpio_construct +ffffffff822b83b0 T dal_hw_gpio_destruct +ffffffff822b9000 T dal_hw_hpd_init +ffffffff822b9100 T dal_hw_hpd_get_pin +ffffffff822b9110 t dal_hw_hpd_destroy +ffffffff822b9170 t get_value +ffffffff822b9210 t set_config +ffffffff822ba000 T dal_hw_translate_init +ffffffff822bb000 T dc_process_hdcp_msg +ffffffff822bb180 t hdmi_14_process_transaction +ffffffff822bb2d0 t dp_11_process_transaction +ffffffff822bc000 T dal_irq_service_dummy_set +ffffffff822bc050 T dal_irq_service_dummy_ack +ffffffff822bc0a0 T dce110_vblank_set +ffffffff822bc170 T to_dal_irq_source_dce110 +ffffffff822bc2f0 T dal_irq_service_dce110_create +ffffffff822bc370 t hpd_ack +ffffffff822bd000 T dal_irq_service_dce120_create +ffffffff822bd080 t hpd_ack +ffffffff822be000 T dal_irq_service_dce80_create ffffffff822be080 t hpd_ack -ffffffff822bf000 T dal_irq_service_dce80_create +ffffffff822bf000 T dal_irq_service_dcn10_create ffffffff822bf080 t hpd_ack -ffffffff822c0000 T dal_irq_service_dcn10_create +ffffffff822bf130 t to_dal_irq_source_dcn10 +ffffffff822c0000 T dal_irq_service_dcn20_create ffffffff822c0080 t hpd_ack -ffffffff822c0130 t to_dal_irq_source_dcn10 -ffffffff822c1000 T dal_irq_service_dcn20_create +ffffffff822c0130 t to_dal_irq_source_dcn20 +ffffffff822c1000 T dal_irq_service_dcn201_create ffffffff822c1080 t hpd_ack -ffffffff822c1130 t to_dal_irq_source_dcn20 -ffffffff822c2000 T dal_irq_service_dcn201_create +ffffffff822c1130 t to_dal_irq_source_dcn201 +ffffffff822c2000 T dal_irq_service_dcn21_create ffffffff822c2080 t hpd_ack -ffffffff822c2130 t to_dal_irq_source_dcn201 -ffffffff822c3000 T dal_irq_service_dcn21_create +ffffffff822c2130 t to_dal_irq_source_dcn21 +ffffffff822c3000 T dal_irq_service_dcn30_create ffffffff822c3080 t hpd_ack -ffffffff822c3130 t to_dal_irq_source_dcn21 -ffffffff822c4000 T dal_irq_service_dcn30_create +ffffffff822c3130 t to_dal_irq_source_dcn30 +ffffffff822c4000 T dal_irq_service_dcn302_create ffffffff822c4080 t hpd_ack -ffffffff822c4130 t to_dal_irq_source_dcn30 -ffffffff822c5000 T dal_irq_service_dcn302_create +ffffffff822c4130 t to_dal_irq_source_dcn302 +ffffffff822c5000 T dal_irq_service_dcn303_create ffffffff822c5080 t hpd_ack -ffffffff822c5130 t to_dal_irq_source_dcn302 -ffffffff822c6000 T dal_irq_service_dcn303_create +ffffffff822c5130 t to_dal_irq_source_dcn303 +ffffffff822c6000 T dal_irq_service_dcn31_create ffffffff822c6080 t hpd_ack -ffffffff822c6130 t to_dal_irq_source_dcn303 -ffffffff822c7000 T dal_irq_service_dcn31_create +ffffffff822c6130 t to_dal_irq_source_dcn31 +ffffffff822c7000 T dal_irq_service_dcn314_create ffffffff822c7080 t hpd_ack -ffffffff822c7130 t to_dal_irq_source_dcn31 -ffffffff822c8000 T dal_irq_service_dcn314_create +ffffffff822c7130 t to_dal_irq_source_dcn314 +ffffffff822c8000 T dal_irq_service_dcn315_create ffffffff822c8080 t hpd_ack -ffffffff822c8130 t to_dal_irq_source_dcn314 -ffffffff822c9000 T dal_irq_service_dcn315_create +ffffffff822c8130 t to_dal_irq_source_dcn315 +ffffffff822c9000 T dal_irq_service_dcn32_create ffffffff822c9080 t hpd_ack -ffffffff822c9130 t to_dal_irq_source_dcn315 -ffffffff822ca000 T dal_irq_service_dcn32_create -ffffffff822ca080 t hpd_ack -ffffffff822ca130 t to_dal_irq_source_dcn32 -ffffffff822cb000 T dal_irq_service_construct -ffffffff822cb070 T dal_irq_service_destroy -ffffffff822cb100 T dal_irq_service_set_generic -ffffffff822cb180 T dal_irq_service_set -ffffffff822cb330 T dal_irq_service_ack -ffffffff822cb4a0 T dal_irq_service_ack_generic -ffffffff822cb510 T dal_irq_service_to_irq_source -ffffffff822cc000 T dp_handle_automated_test -ffffffff822cc820 T dp_set_test_pattern -ffffffff822ccf00 t set_crtc_test_pattern -ffffffff822cd370 T dp_set_preferred_link_settings -ffffffff822cd4c0 t dp_retrain_link_dp_test -ffffffff822cd5c0 T dp_set_preferred_training_settings -ffffffff822ce000 T dp_trace_init -ffffffff822ce0a0 T dp_trace_reset -ffffffff822ce130 T dp_trace_is_initialized -ffffffff822ce160 T dp_trace_detect_lt_init -ffffffff822ce1b0 T dp_trace_commit_lt_init -ffffffff822ce200 T dp_trace_link_loss_increment -ffffffff822ce230 T dp_trace_lt_fail_count_update -ffffffff822ce270 T dp_trace_lt_total_count_increment -ffffffff822ce2b0 T dp_trace_set_is_logged_flag -ffffffff822ce2f0 T dp_trace_is_logged -ffffffff822ce330 T dp_trace_lt_result_update -ffffffff822ce370 T dp_trace_set_lt_start_timestamp -ffffffff822ce450 T dp_trace_set_lt_end_timestamp -ffffffff822ce530 T dp_trace_get_lt_end_timestamp -ffffffff822ce570 T dp_trace_get_lt_counts -ffffffff822ce5b0 T dp_trace_get_link_loss_count -ffffffff822ce5e0 T dp_trace_set_edp_power_timestamp -ffffffff822ce6c0 T dp_trace_get_edp_poweron_timestamp -ffffffff822ce6f0 T dp_trace_get_edp_poweroff_timestamp -ffffffff822ce720 T dp_trace_source_sequence -ffffffff822cf000 T dp_fpga_hpo_enable_link_and_stream -ffffffff822d0000 T set_dio_throttled_vcp_size -ffffffff822d0020 T setup_dio_stream_encoder -ffffffff822d0110 T reset_dio_stream_encoder -ffffffff822d01e0 T setup_dio_stream_attribute -ffffffff822d0380 T enable_dio_dp_link_output -ffffffff822d0410 T disable_dio_link_output -ffffffff822d0470 T set_dio_dp_link_test_pattern -ffffffff822d04d0 T set_dio_dp_lane_settings -ffffffff822d0510 T update_dio_stream_allocation_table -ffffffff822d0580 T setup_dio_audio_output -ffffffff822d05f0 T enable_dio_audio_packet -ffffffff822d06b0 T disable_dio_audio_packet -ffffffff822d0790 T can_use_dio_link_hwss -ffffffff822d07d0 T get_dio_link_hwss -ffffffff822d1000 T dp_dio_fixed_vs_pe_retimer_lane_cfg_to_hw_cfg -ffffffff822d1040 T dp_dio_fixed_vs_pe_retimer_exit_manual_automation -ffffffff822d1280 T enable_dio_fixed_vs_pe_retimer_program_4lane_output -ffffffff822d13b0 T requires_fixed_vs_pe_retimer_dio_link_hwss -ffffffff822d13f0 T get_dio_fixed_vs_pe_retimer_link_hwss -ffffffff822d1420 t enable_dio_fixed_vs_pe_retimer_dp_link_output -ffffffff822d1590 t set_dio_fixed_vs_pe_retimer_dp_link_test_pattern -ffffffff822d2000 T can_use_dpia_link_hwss -ffffffff822d2050 T get_dpia_link_hwss -ffffffff822d2080 t update_dpia_stream_allocation_table -ffffffff822d3000 T set_hpo_dp_throttled_vcp_size -ffffffff822d3030 T set_hpo_dp_hblank_min_symbol_width -ffffffff822d3120 T setup_hpo_dp_stream_encoder -ffffffff822d3170 T reset_hpo_dp_stream_encoder -ffffffff822d3190 T setup_hpo_dp_stream_attribute -ffffffff822d3210 T enable_hpo_dp_link_output -ffffffff822d3290 T disable_hpo_dp_link_output -ffffffff822d3330 T update_hpo_dp_stream_allocation_table -ffffffff822d3350 T setup_hpo_dp_audio_output -ffffffff822d3390 T enable_hpo_dp_audio_packet -ffffffff822d33b0 T disable_hpo_dp_audio_packet -ffffffff822d3400 T can_use_hpo_dp_link_hwss -ffffffff822d3430 T get_hpo_dp_link_hwss -ffffffff822d3460 t set_hpo_dp_link_test_pattern -ffffffff822d34b0 t set_hpo_dp_lane_settings -ffffffff822d4000 T requires_fixed_vs_pe_retimer_hpo_link_hwss -ffffffff822d4040 T get_hpo_fixed_vs_pe_retimer_dp_link_hwss -ffffffff822d4070 t enable_hpo_fixed_vs_pe_retimer_dp_link_output -ffffffff822d40d0 t set_hpo_fixed_vs_pe_retimer_dp_link_test_pattern -ffffffff822d4450 t set_hpo_fixed_vs_pe_retimer_dp_lane_settings -ffffffff822d44d0 t dp_hpo_fixed_vs_pe_retimer_set_tx_ffe -ffffffff822d5000 T link_reset_cur_dp_mst_topology -ffffffff822d5060 T link_detect_connection_type -ffffffff822d5180 T link_detect -ffffffff822d6a40 T link_clear_dprx_states -ffffffff822d6a70 T link_is_hdcp14 -ffffffff822d6ad0 T link_is_hdcp22 -ffffffff822d6b40 T link_get_status -ffffffff822d6b70 T link_add_remote_sink -ffffffff822d6d10 T link_remove_remote_sink -ffffffff822d6df0 t wait_for_entering_dp_alt_mode -ffffffff822d7000 T link_blank_all_dp_displays -ffffffff822d70d0 T link_blank_dp_stream -ffffffff822d71e0 T link_blank_all_edp_displays -ffffffff822d72a0 T link_set_all_streams_dpms_off_for_link -ffffffff822d73a0 T link_get_master_pipes_with_dpms_on -ffffffff822d7560 T link_resume -ffffffff822d75a0 T link_set_dsc_on_stream -ffffffff822d7a40 T link_set_dsc_pps_packet -ffffffff822d7dd0 T link_set_dsc_enable -ffffffff822d7e70 T link_update_dsc_config -ffffffff822d7ee0 T link_calculate_sst_avg_time_slots_per_mtp -ffffffff822d7f50 T link_reduce_mst_payload -ffffffff822d8370 t update_mst_stream_alloc_table -ffffffff822d85f0 T link_increase_mst_payload -ffffffff822d8a00 T link_set_dpms_off -ffffffff822d95b0 t update_psp_stream_config -ffffffff822d97b0 t update_sst_payload -ffffffff822d9df0 t get_ext_hdmi_settings -ffffffff822da040 t write_i2c_retimer_setting -ffffffff822da690 t write_i2c_default_retimer_setting -ffffffff822dab80 t write_i2c_redriver_setting -ffffffff822daca0 t disable_link -ffffffff822dae10 T link_set_dpms_on -ffffffff822db850 t enable_stream_features -ffffffff822db910 t allocate_usb4_bandwidth -ffffffff822db940 t allocate_mst_payload -ffffffff822dbda0 t log_vcp_x_y -ffffffff822dbf20 t write_i2c -ffffffff822dbfb0 t enable_link_dp -ffffffff822dd000 T link_create_link_service -ffffffff822dd470 T link_destroy_link_service -ffffffff822dd4c0 T link_create -ffffffff822de4e0 T link_destroy -ffffffff822df000 T link_get_cur_link_res -ffffffff822df150 T link_get_cur_res_map -ffffffff822df230 T link_restore_res_map -ffffffff822e0000 T dp_link_bandwidth_kbps -ffffffff822e00a0 T link_validate_mode_timing -ffffffff822e0680 t get_tmds_output_pixel_clock_100hz -ffffffff822e06f0 T link_validate_dpia_bandwidth -ffffffff822e1000 T link_create_ddc_service -ffffffff822e1170 T link_destroy_ddc_service -ffffffff822e1200 T set_ddc_transaction_type -ffffffff822e1230 T link_is_in_aux_transaction_mode -ffffffff822e1270 T set_dongle_type -ffffffff822e12a0 T link_get_aux_defer_delay -ffffffff822e13d0 T link_query_ddc_data -ffffffff822e1780 T link_aux_transfer_raw -ffffffff822e17b0 T link_get_fixed_vs_pe_retimer_write_address -ffffffff822e1840 T link_get_fixed_vs_pe_retimer_read_address -ffffffff822e18d0 T link_configure_fixed_vs_pe_retimer -ffffffff822e19a0 T link_aux_transfer_with_retries_no_mutex -ffffffff822e19b0 T link_query_fixed_vs_pe_retimer -ffffffff822e1a80 T try_to_configure_aux_timeout -ffffffff822e1b60 T get_ddc_pin -ffffffff822e1b90 T write_scdc_data -ffffffff822e1c80 T read_scdc_data -ffffffff822e2000 T is_dp_active_dongle -ffffffff822e2040 T is_dp_branch_device -ffffffff822e2070 T dp_parse_lttpr_repeater_count -ffffffff822e20f0 T link_bw_kbps_from_raw_frl_link_rate_data -ffffffff822e2130 T dp_is_fec_supported -ffffffff822e21e0 T dp_should_enable_fec -ffffffff822e22f0 T dp_is_128b_132b_signal -ffffffff822e23c0 T dp_is_lttpr_present -ffffffff822e2430 T decide_fallback_link_setting -ffffffff822e2700 T link_dp_get_encoding_format -ffffffff822e2750 t reduce_link_rate -ffffffff822e2810 T edp_decide_link_settings -ffffffff822e2940 T decide_edp_link_settings_with_dsc -ffffffff822e2d00 T link_decide_link_settings -ffffffff822e3130 T mst_decide_link_encoding_format -ffffffff822e31b0 T dp_overwrite_extended_receiver_cap -ffffffff822e32c0 t get_active_converter_info -ffffffff822e36f0 T dpcd_set_source_specific_data -ffffffff822e3830 T dpcd_write_cable_id_to_dprx -ffffffff822e38a0 T read_is_mst_supported -ffffffff822e3950 T dp_retrieve_lttpr_cap -ffffffff822e3b60 T detect_dp_sink_caps -ffffffff822e3b70 t retrieve_link_cap -ffffffff822e4c80 T detect_edp_sink_caps -ffffffff822e4fa0 T dp_get_max_link_enc_cap -ffffffff822e5090 T dp_get_verified_link_cap -ffffffff822e50e0 T dp_get_max_link_cap -ffffffff822e52d0 T dp_verify_link_cap_with_retries -ffffffff822e57a0 T dp_is_sink_present -ffffffff822e5a20 t intersect_frl_link_bw_support -ffffffff822e6000 T dpcd_get_tunneling_device_data -ffffffff822e60d0 T dpia_query_hpd_status -ffffffff822e7000 T link_dp_dpia_set_dptx_usb4_bw_alloc_support -ffffffff822e72e0 T dpia_handle_bw_alloc_response -ffffffff822e7580 T dpia_handle_usb4_bandwidth_allocation_for_link -ffffffff822e7840 T link_dp_dpia_allocate_usb4_bandwidth_for_stream -ffffffff822e7ab0 T dpia_validate_usb4_bw -ffffffff822e7e90 t get_lowest_dpia_index -ffffffff822e8060 T link_dp_dpia_get_dp_overhead_in_dp_tunneling -ffffffff822e9000 T dp_parse_link_loss_status -ffffffff822e9130 T dp_handle_link_loss -ffffffff822e9240 T dp_read_hpd_rx_irq_data -ffffffff822e9370 T dp_should_allow_hpd_rx_irq -ffffffff822e93c0 T dp_handle_hpd_rx_irq -ffffffff822ea000 T dpcd_write_rx_power_ctrl -ffffffff822ea050 T dp_enable_link_phy -ffffffff822ea0e0 T dp_disable_link_phy -ffffffff822ea1b0 T dp_set_hw_lane_settings -ffffffff822ea2a0 T dp_set_drive_settings -ffffffff822ea390 T dp_set_fec_ready -ffffffff822ea510 T dp_set_fec_enable -ffffffff822eb000 T dp_log_training_result -ffffffff822eb190 T dp_initialize_scrambling_data_symbols -ffffffff822eb230 T dp_training_pattern_to_dpcd_training_pattern -ffffffff822eb2b0 T dp_get_nibble_at_index -ffffffff822eb300 T dp_wait_for_training_aux_rd_interval -ffffffff822eb320 T dp_hw_to_dpcd_lane_settings -ffffffff822eb400 T get_dpcd_link_rate -ffffffff822eb470 T dp_translate_training_aux_read_interval -ffffffff822eb4b0 T dp_get_cr_failure -ffffffff822eb520 T is_repeater -ffffffff822eb560 T dp_is_max_vs_reached -ffffffff822eb5f0 T dp_is_cr_done -ffffffff822eb6c0 T dp_is_ch_eq_done -ffffffff822eb770 T dp_is_symbol_locked -ffffffff822eb820 T dp_is_interlane_aligned -ffffffff822eb850 T dp_check_link_loss_status -ffffffff822eb900 T dp_get_lane_status_and_lane_adjust -ffffffff822eba50 T dp_get_lttpr_mode_override -ffffffff822ebb10 T override_training_settings -ffffffff822ebdd0 T decide_cr_training_pattern -ffffffff822ebe10 T decide_eq_training_pattern -ffffffff822ebef0 T dp_decide_lttpr_mode -ffffffff822ebf90 T dp_decide_lane_settings -ffffffff822ec310 T dp_decide_training_settings -ffffffff822ec3a0 T configure_lttpr_mode_transparent -ffffffff822ec3f0 T dpcd_configure_lttpr_mode -ffffffff822ec5b0 T repeater_training_done -ffffffff822ec600 T dpcd_configure_channel_coding -ffffffff822ec660 T dpcd_set_training_pattern -ffffffff822ec710 T dpcd_set_link_settings -ffffffff822ec870 T dpcd_set_lane_settings -ffffffff822ec8b0 T dpcd_set_lt_pattern_and_lane_settings -ffffffff822ecaa0 T start_clock_recovery_pattern_early -ffffffff822ecb80 T dp_set_hw_training_pattern -ffffffff822ecc40 T dp_set_hw_test_pattern -ffffffff822ecce0 T dp_perform_link_training -ffffffff822ed570 T perform_link_training_with_retries -ffffffff822ee000 T dp_perform_128b_132b_link_training -ffffffff822ee3e0 T decide_128b_132b_training_settings -ffffffff822ee4e0 T dp_decide_128b_132b_lttpr_mode -ffffffff822ef000 T decide_8b_10b_training_settings -ffffffff822ef220 T dp_decide_8b_10b_lttpr_mode -ffffffff822ef2f0 T perform_8b_10b_clock_recovery_sequence -ffffffff822ef620 T perform_8b_10b_channel_equalization_sequence -ffffffff822ef8d0 T dp_perform_8b_10b_link_training -ffffffff822f0000 T dp_perform_link_training_skip_aux -ffffffff822f1000 T dpia_perform_link_training -ffffffff822f1f20 t dpia_training_end -ffffffff822f3000 T dp_fixed_vs_pe_read_lane_adjust -ffffffff822f3140 T dp_fixed_vs_pe_set_retimer_lane_settings -ffffffff822f32a0 T dp_perform_fixed_vs_pe_training_sequence_legacy -ffffffff822f3a10 t perform_fixed_vs_pe_nontransparent_training_sequence -ffffffff822f3bd0 T dp_perform_fixed_vs_pe_training_sequence -ffffffff822f5000 T core_link_read_dpcd -ffffffff822f51a0 T core_link_write_dpcd -ffffffff822f6000 T dp_set_panel_mode -ffffffff822f6120 T dp_get_panel_mode -ffffffff822f61e0 T edp_set_backlight_level_nits -ffffffff822f62e0 T edp_get_backlight_level_nits -ffffffff822f6370 T edp_backlight_enable_aux -ffffffff822f63e0 T set_default_brightness_aux -ffffffff822f64b0 T edp_is_ilr_optimization_enabled -ffffffff822f64f0 T get_max_link_rate_from_ilr_table -ffffffff822f65d0 T edp_is_ilr_optimization_required -ffffffff822f6770 T edp_panel_backlight_power_on -ffffffff822f6820 T edp_set_panel_power -ffffffff822f6920 T edp_wait_for_t12 -ffffffff822f6980 T edp_add_delay_for_T9 -ffffffff822f69d0 T edp_receiver_ready_T9 -ffffffff822f6a90 T edp_receiver_ready_T7 -ffffffff822f6c30 T edp_power_alpm_dpcd_enable -ffffffff822f6ca0 T edp_set_backlight_level -ffffffff822f6e10 T edp_set_psr_allow_active -ffffffff822f6ff0 T edp_get_psr_state -ffffffff822f70c0 T edp_setup_psr -ffffffff822f74b0 T edp_get_psr_residency -ffffffff822f7550 T edp_set_sink_vtotal_in_psr_active -ffffffff822f75d0 T edp_set_replay_allow_active -ffffffff822f76f0 T edp_get_replay_state -ffffffff822f77a0 T edp_setup_replay -ffffffff822f7990 T edp_set_coasting_vtotal -ffffffff822f7a40 T edp_replay_residency -ffffffff822f7b00 T edp_get_backlight_level -ffffffff822f7c60 T edp_get_target_backlight_pwm -ffffffff822f8000 T link_get_hpd_state -ffffffff822f8070 T link_enable_hpd -ffffffff822f80c0 T link_disable_hpd -ffffffff822f8110 T link_enable_hpd_filter -ffffffff822f8280 T program_hpd_filter -ffffffff822f8430 T link_get_hpd_gpio -ffffffff822f8510 T query_hpd_status -ffffffff822f8630 T get_hpd_line -ffffffff822f9000 T virtual_link_encoder_construct -ffffffff822f9060 t virtual_link_encoder_validate_output_with_stream -ffffffff822f9090 t virtual_link_encoder_hw_init -ffffffff822f90c0 t virtual_link_encoder_setup -ffffffff822f90f0 t virtual_link_encoder_enable_tmds_output -ffffffff822f9120 t virtual_link_encoder_enable_dp_output -ffffffff822f9150 t virtual_link_encoder_enable_dp_mst_output -ffffffff822f9180 t virtual_link_encoder_disable_output -ffffffff822f91b0 t virtual_link_encoder_dp_set_lane_settings -ffffffff822f91e0 t virtual_link_encoder_dp_set_phy_pattern -ffffffff822f9210 t virtual_link_encoder_update_mst_stream_allocation_table -ffffffff822f9240 t virtual_link_encoder_connect_dig_be_to_fe -ffffffff822f9270 t virtual_link_encoder_destroy -ffffffff822f92c0 t virtual_link_encoder_get_max_link_cap -ffffffff822fa000 T virtual_setup_stream_encoder -ffffffff822fa030 T virtual_setup_stream_attribute -ffffffff822fa060 T virtual_reset_stream_encoder -ffffffff822fa090 T get_virtual_link_hwss -ffffffff822fa0c0 t virtual_disable_link_output -ffffffff822fb000 T virtual_stream_encoder_construct -ffffffff822fb050 T virtual_stream_encoder_create -ffffffff822fb110 t virtual_stream_encoder_dp_set_stream_attribute -ffffffff822fb140 t virtual_stream_encoder_hdmi_set_stream_attribute -ffffffff822fb170 t virtual_stream_encoder_dvi_set_stream_attribute -ffffffff822fb1a0 t virtual_stream_encoder_set_throttled_vcp_size -ffffffff822fb1d0 t virtual_stream_encoder_update_hdmi_info_packets -ffffffff822fb200 t virtual_stream_encoder_stop_hdmi_info_packets -ffffffff822fb230 t virtual_stream_encoder_update_dp_info_packets -ffffffff822fb260 t virtual_stream_encoder_stop_dp_info_packets -ffffffff822fb290 t virtual_stream_encoder_dp_blank -ffffffff822fb2c0 t virtual_stream_encoder_dp_unblank -ffffffff822fb2f0 t virtual_audio_mute_control -ffffffff822fb320 t virtual_setup_stereo_sync -ffffffff822fb350 t virtual_stream_encoder_set_avmute -ffffffff822fb380 t virtual_dig_connect_to_otg -ffffffff822fb3b0 t virtual_stream_encoder_reset_hdmi_stream_attribute -ffffffff822fb3e0 t virtual_stream_encoder_set_dsc_pps_info_packet -ffffffff822fb410 t virtual_enc_dp_set_odm_combine -ffffffff822fc000 T dmub_dcn20_use_cached_inbox -ffffffff822fc040 T dmub_dcn20_reset -ffffffff822fc210 T dmub_dcn20_reset_release -ffffffff822fc2e0 T dmub_dcn20_backdoor_load -ffffffff822fc590 T dmub_dcn20_setup_windows -ffffffff822fcaf0 T dmub_dcn20_setup_mailbox -ffffffff822fcb50 T dmub_dcn20_get_inbox1_wptr -ffffffff822fcb80 T dmub_dcn20_get_inbox1_rptr -ffffffff822fcbb0 T dmub_dcn20_set_inbox1_wptr -ffffffff822fcbe0 T dmub_dcn20_setup_out_mailbox -ffffffff822fcc40 T dmub_dcn20_get_outbox1_wptr -ffffffff822fcc70 T dmub_dcn20_set_outbox1_rptr -ffffffff822fcca0 T dmub_dcn20_setup_outbox0 -ffffffff822fccf0 T dmub_dcn20_get_outbox0_wptr -ffffffff822fcd20 T dmub_dcn20_set_outbox0_rptr -ffffffff822fcd50 T dmub_dcn20_is_hw_init -ffffffff822fcdb0 T dmub_dcn20_is_supported -ffffffff822fce10 T dmub_dcn20_set_gpint -ffffffff822fce40 T dmub_dcn20_is_gpint_acked -ffffffff822fcea0 T dmub_dcn20_get_gpint_response -ffffffff822fced0 T dmub_dcn20_get_fw_boot_status -ffffffff822fcf00 T dmub_dcn20_enable_dmub_boot_options -ffffffff822fcf30 T dmub_dcn20_skip_dmub_panel_power_sequence -ffffffff822fcf90 T dmub_dcn20_get_current_time -ffffffff822fcfc0 T dmub_dcn20_get_diagnostic_data -ffffffff822fe000 T dmub_dcn30_backdoor_load -ffffffff822fe270 T dmub_dcn30_setup_windows -ffffffff822ff000 T dmub_dcn31_reset -ffffffff822ff280 T dmub_dcn31_reset_release -ffffffff822ff350 T dmub_dcn31_backdoor_load -ffffffff822ff5c0 T dmub_dcn31_setup_windows -ffffffff822ff910 T dmub_dcn31_setup_mailbox -ffffffff822ff960 T dmub_dcn31_get_inbox1_wptr -ffffffff822ff990 T dmub_dcn31_get_inbox1_rptr -ffffffff822ff9c0 T dmub_dcn31_set_inbox1_wptr -ffffffff822ff9f0 T dmub_dcn31_setup_out_mailbox -ffffffff822ffa40 T dmub_dcn31_get_outbox1_wptr -ffffffff822ffa70 T dmub_dcn31_set_outbox1_rptr -ffffffff822ffaa0 T dmub_dcn31_is_hw_init -ffffffff822ffb20 T dmub_dcn31_is_supported -ffffffff822ffb80 T dmub_dcn31_is_psrsu_supported -ffffffff822ffbb0 T dmub_dcn31_set_gpint -ffffffff822ffbe0 T dmub_dcn31_is_gpint_acked -ffffffff822ffc40 T dmub_dcn31_get_gpint_response -ffffffff822ffc70 T dmub_dcn31_get_gpint_dataout -ffffffff822ffd90 T dmub_dcn31_get_fw_boot_status -ffffffff822ffdc0 T dmub_dcn31_get_fw_boot_option -ffffffff822ffdf0 T dmub_dcn31_enable_dmub_boot_options -ffffffff822ffe70 T dmub_dcn31_skip_dmub_panel_power_sequence -ffffffff822ffed0 T dmub_dcn31_setup_outbox0 -ffffffff822fff20 T dmub_dcn31_get_outbox0_wptr -ffffffff822fff50 T dmub_dcn31_set_outbox0_rptr -ffffffff822fff80 T dmub_dcn31_get_current_time -ffffffff822fffb0 T dmub_dcn31_get_diagnostic_data -ffffffff82300460 T dmub_dcn31_should_detect -ffffffff82301000 T dmub_dcn314_is_psrsu_supported -ffffffff82302000 T dmub_dcn32_reset -ffffffff82302200 T dmub_dcn32_reset_release -ffffffff823022d0 T dmub_dcn32_backdoor_load -ffffffff82302540 T dmub_dcn32_backdoor_load_zfb_mode -ffffffff82302730 T dmub_dcn32_setup_windows -ffffffff82302a80 T dmub_dcn32_setup_mailbox -ffffffff82302ad0 T dmub_dcn32_get_inbox1_wptr -ffffffff82302b00 T dmub_dcn32_get_inbox1_rptr -ffffffff82302b30 T dmub_dcn32_set_inbox1_wptr -ffffffff82302b60 T dmub_dcn32_setup_out_mailbox -ffffffff82302bb0 T dmub_dcn32_get_outbox1_wptr -ffffffff82302be0 T dmub_dcn32_set_outbox1_rptr -ffffffff82302c10 T dmub_dcn32_is_hw_init -ffffffff82302c90 T dmub_dcn32_is_supported -ffffffff82302cf0 T dmub_dcn32_set_gpint -ffffffff82302d20 T dmub_dcn32_is_gpint_acked -ffffffff82302d80 T dmub_dcn32_get_gpint_response -ffffffff82302db0 T dmub_dcn32_get_gpint_dataout -ffffffff82302ed0 T dmub_dcn32_get_fw_boot_status -ffffffff82302f00 T dmub_dcn32_enable_dmub_boot_options -ffffffff82302f30 T dmub_dcn32_skip_dmub_panel_power_sequence -ffffffff82302f90 T dmub_dcn32_setup_outbox0 -ffffffff82302fe0 T dmub_dcn32_get_outbox0_wptr -ffffffff82303010 T dmub_dcn32_set_outbox0_rptr -ffffffff82303040 T dmub_dcn32_get_current_time -ffffffff82303070 T dmub_dcn32_get_diagnostic_data -ffffffff82303550 T dmub_dcn32_configure_dmub_in_system_memory -ffffffff82303580 T dmub_dcn32_send_inbox0_cmd -ffffffff823035b0 T dmub_dcn32_clear_inbox0_ack_register -ffffffff823035e0 T dmub_dcn32_read_inbox0_ack_register -ffffffff82304000 T dmub_reg_update -ffffffff82304150 T dmub_reg_set -ffffffff823042b0 T dmub_reg_get -ffffffff82305000 T dmub_flush_buffer_mem -ffffffff82305030 T dmub_srv_create -ffffffff823055b0 T dmub_srv_destroy -ffffffff823055d0 T dmub_srv_calc_region_info -ffffffff823059c0 T dmub_srv_calc_mem_info -ffffffff82305b80 T dmub_srv_has_hw_support -ffffffff82305bf0 T dmub_srv_is_hw_init -ffffffff82305c70 T dmub_srv_hw_init -ffffffff823060d0 T dmub_srv_sync_inbox1 -ffffffff82306180 T dmub_srv_hw_reset -ffffffff82306210 T dmub_srv_cmd_queue -ffffffff82306310 T dmub_srv_cmd_execute -ffffffff823063d0 T dmub_srv_wait_for_auto_load -ffffffff82306470 T dmub_srv_wait_for_idle -ffffffff82306520 T dmub_srv_send_gpint_command -ffffffff82306610 T dmub_srv_get_gpint_response -ffffffff82306670 T dmub_srv_get_gpint_dataout -ffffffff823066d0 T dmub_srv_get_fw_boot_status -ffffffff82306740 T dmub_srv_get_fw_boot_option -ffffffff823067b0 T dmub_srv_set_skip_panel_power_sequence -ffffffff82306810 T dmub_srv_cmd_with_reply_data -ffffffff82306a70 T dmub_srv_get_outbox0_msg -ffffffff82306b10 T dmub_srv_get_diagnostic_data -ffffffff82306b60 T dmub_srv_should_detect -ffffffff82306bb0 T dmub_srv_clear_inbox0_ack -ffffffff82306c00 T dmub_srv_wait_for_inbox0_ack -ffffffff82306cb0 T dmub_srv_send_inbox0_cmd -ffffffff82307000 T dmub_srv_stat_get_notification -ffffffff82308000 T setup_x_points_distribution -ffffffff82308170 T log_x_points_distribution -ffffffff823081a0 T precompute_pq -ffffffff82308370 t compute_pq -ffffffff82308570 T precompute_de_pq -ffffffff823086d0 t compute_de_pq -ffffffff82308990 T calculate_user_regamma_coeff -ffffffff82308d70 t apply_lut_1d -ffffffff823090a0 T calculate_user_regamma_ramp -ffffffff82309980 T mod_color_calculate_degamma_params -ffffffff8230a4d0 t build_evenly_distributed_points -ffffffff8230a650 t scale_gamma -ffffffff8230a800 t map_regamma_hw_to_x_user -ffffffff8230af20 T mod_color_calculate_regamma_params -ffffffff8230c840 t scale_gamma_dx -ffffffff8230cf20 t translate_from_linear_space -ffffffff8230d260 t build_coefficients -ffffffff8230d3e0 t calculate_mapped_value -ffffffff8230e000 T mod_color_is_table_init -ffffffff8230e050 T mod_color_get_table -ffffffff8230e0a0 T mod_color_set_table_init_state -ffffffff8230f000 T mod_freesync_create -ffffffff8230f070 T mod_freesync_destroy -ffffffff8230f0b0 T mod_freesync_calc_v_total_from_refresh -ffffffff8230f140 T mod_freesync_get_vmin_vmax -ffffffff8230f180 T mod_freesync_get_v_position -ffffffff8230f200 T mod_freesync_build_vrr_infopacket -ffffffff8230f900 T mod_freesync_build_vrr_params -ffffffff8230fcc0 T mod_freesync_calc_nominal_field_rate -ffffffff8230fd20 T mod_freesync_handle_preflip -ffffffff82310150 T mod_freesync_handle_v_update -ffffffff82310600 T mod_freesync_get_settings -ffffffff82310670 T mod_freesync_calc_field_rate_from_timing -ffffffff823106c0 T mod_freesync_get_freesync_enabled -ffffffff823106f0 T mod_freesync_is_valid_range -ffffffff82311000 T mod_hdcp_get_memory_size -ffffffff82311030 T mod_hdcp_setup -ffffffff823110b0 t reset_connection -ffffffff82311220 t push_error_status -ffffffff82311330 T mod_hdcp_teardown -ffffffff823113b0 T mod_hdcp_add_display -ffffffff82311660 t reset_authentication -ffffffff82311850 t set_state_id -ffffffff823118f0 T mod_hdcp_remove_display -ffffffff82311af0 T mod_hdcp_update_display -ffffffff82311e50 T mod_hdcp_query_display -ffffffff82311fa0 T mod_hdcp_reset_connection -ffffffff82312000 T mod_hdcp_process_event -ffffffff823127e0 T mod_hdcp_signal_type_to_operation_mode -ffffffff82313000 T mod_hdcp_execute_and_set -ffffffff823130b0 T mod_hdcp_hdcp1_execution -ffffffff82313300 t exchange_ksvs -ffffffff82313660 t computations_validate_rx_test_for_repeater -ffffffff82313930 t wait_for_ready -ffffffff82313be0 t read_ksv_list -ffffffff823141d0 T mod_hdcp_hdcp1_dp_execution -ffffffff82315000 T mod_hdcp_hdcp1_transition -ffffffff82315310 t set_state_id -ffffffff823153b0 T mod_hdcp_hdcp1_dp_transition -ffffffff82316000 T mod_hdcp_hdcp2_execution -ffffffff82316580 t locality_check -ffffffff823167b0 t enable_encryption -ffffffff823168a0 t verify_rx_id_list_and_send_ack -ffffffff823169a0 t send_stream_management -ffffffff82316a80 t validate_stream_ready -ffffffff82316ba0 T mod_hdcp_hdcp2_dp_execution -ffffffff823171a0 t check_hdcp2_capable -ffffffff82317200 t check_ake_cert_available -ffffffff82317270 t check_h_prime_available -ffffffff823172e0 t check_pairing_info_available -ffffffff82317350 t poll_l_prime_available -ffffffff82317580 t process_rxstatus -ffffffff82317700 t check_reauthentication_request -ffffffff82317750 t check_link_integrity_failure_dp -ffffffff82317790 t check_device_count -ffffffff82317830 t check_stream_ready_available -ffffffff82318000 T mod_hdcp_hdcp2_transition -ffffffff823187b0 t set_state_id -ffffffff82318850 T mod_hdcp_hdcp2_dp_transition -ffffffff82319000 T mod_hdcp_read_bksv -ffffffff82319080 T mod_hdcp_read_bcaps -ffffffff82319100 T mod_hdcp_read_bstatus -ffffffff82319180 T mod_hdcp_read_r0p -ffffffff82319200 T mod_hdcp_read_ksvlist -ffffffff82319350 T mod_hdcp_read_vp -ffffffff82319520 T mod_hdcp_read_binfo -ffffffff82319590 T mod_hdcp_write_aksv -ffffffff82319630 T mod_hdcp_write_ainfo -ffffffff823196d0 T mod_hdcp_write_an -ffffffff82319770 T mod_hdcp_read_hdcp2version -ffffffff823197e0 T mod_hdcp_read_rxcaps -ffffffff82319850 T mod_hdcp_read_rxstatus -ffffffff823198e0 T mod_hdcp_read_ake_cert -ffffffff823199b0 T mod_hdcp_read_h_prime -ffffffff82319a70 T mod_hdcp_read_pairing_info -ffffffff82319b10 T mod_hdcp_read_l_prime -ffffffff82319bd0 T mod_hdcp_read_rx_id_list -ffffffff82319d40 T mod_hdcp_read_stream_ready -ffffffff82319e00 T mod_hdcp_write_ake_init -ffffffff82319eb0 T mod_hdcp_write_no_stored_km -ffffffff8231a080 T mod_hdcp_write_stored_km -ffffffff8231a180 T mod_hdcp_write_lc_init -ffffffff8231a230 T mod_hdcp_write_eks -ffffffff8231a320 T mod_hdcp_write_repeater_auth_ack -ffffffff8231a3d0 T mod_hdcp_write_stream_manage -ffffffff8231a4c0 T mod_hdcp_write_content_type -ffffffff8231a530 T mod_hdcp_clear_cp_irq_status -ffffffff8231b000 T mod_hdcp_dump_binary_message -ffffffff8231b0e0 T mod_hdcp_log_ddc_trace -ffffffff8231c080 T mod_hdcp_status_to_str -ffffffff8231c0c0 T mod_hdcp_state_id_to_str -ffffffff8231d000 T mod_hdcp_remove_display_from_topology -ffffffff8231d200 t remove_display_from_topology_v2 -ffffffff8231d3b0 T mod_hdcp_add_display_to_topology -ffffffff8231d570 t add_display_to_topology_v2 -ffffffff8231d6d0 T mod_hdcp_hdcp1_create_session -ffffffff8231d850 T mod_hdcp_hdcp1_destroy_session -ffffffff8231dac0 T mod_hdcp_hdcp1_validate_rx -ffffffff8231dbe0 T mod_hdcp_hdcp1_enable_encryption -ffffffff8231dd40 T mod_hdcp_hdcp1_validate_ksvlist_vp -ffffffff8231de70 T mod_hdcp_hdcp1_enable_dp_stream_encryption -ffffffff8231dfb0 T mod_hdcp_hdcp1_link_maintenance -ffffffff8231e070 T mod_hdcp_hdcp2_create_session -ffffffff8231e1e0 T mod_hdcp_hdcp2_destroy_session -ffffffff8231e450 T mod_hdcp_hdcp2_prepare_ake_init -ffffffff8231e550 T mod_hdcp_hdcp2_validate_ake_cert -ffffffff8231e700 T mod_hdcp_hdcp2_validate_h_prime -ffffffff8231e880 T mod_hdcp_hdcp2_prepare_lc_init -ffffffff8231e980 T mod_hdcp_hdcp2_validate_l_prime -ffffffff8231eaa0 T mod_hdcp_hdcp2_prepare_eks -ffffffff8231ebf0 T mod_hdcp_hdcp2_enable_encryption -ffffffff8231ed60 T mod_hdcp_hdcp2_validate_rx_id_list -ffffffff8231eee0 T mod_hdcp_hdcp2_enable_dp_stream_encryption -ffffffff8231f050 T mod_hdcp_hdcp2_prepare_stream_management -ffffffff8231f160 T mod_hdcp_hdcp2_validate_stream_ready -ffffffff82320000 T mod_build_vsc_infopacket -ffffffff82320260 T mod_build_hf_vsif_infopacket -ffffffff823203d0 T mod_build_adaptive_sync_infopacket -ffffffff82320490 T mod_build_adaptive_sync_infopacket_v2 -ffffffff82320500 T mod_build_adaptive_sync_infopacket_v1 -ffffffff82321000 T dmub_init_abm_config -ffffffff82321550 t fill_iram_v_2_3 -ffffffff823219e0 T dmcu_load_iram -ffffffff823221d0 T is_psr_su_specific_panel -ffffffff82322270 T mod_power_calc_psr_configs -ffffffff82322360 T init_replay_config -ffffffff823223b0 T mod_power_only_edp -ffffffff82322400 T psr_su_set_dsc_slice_height -ffffffff823224e0 T fill_custom_backlight_caps -ffffffff82323000 T mod_vmid_get_for_ptb -ffffffff82323220 T mod_vmid_reset -ffffffff823232e0 T mod_vmid_create -ffffffff82323420 T mod_vmid_destroy -ffffffff82324000 T amdgpu_dpm_get_sclk -ffffffff82324090 T amdgpu_dpm_get_mclk -ffffffff82324120 T amdgpu_dpm_set_powergating_by_smu -ffffffff82324200 T amdgpu_dpm_set_gfx_power_up_by_imu -ffffffff82324310 T amdgpu_dpm_baco_enter -ffffffff823243a0 T amdgpu_dpm_baco_exit -ffffffff82324430 T amdgpu_dpm_set_mp1_state -ffffffff823244d0 T amdgpu_dpm_is_baco_supported -ffffffff82324580 T amdgpu_dpm_mode2_reset -ffffffff82324610 T amdgpu_dpm_enable_gfx_features -ffffffff823246a0 T amdgpu_dpm_baco_reset -ffffffff82324750 T amdgpu_dpm_is_mode1_reset_supported -ffffffff823247c0 T amdgpu_dpm_mode1_reset -ffffffff82324840 T amdgpu_dpm_switch_power_profile -ffffffff823248f0 T amdgpu_dpm_set_xgmi_pstate -ffffffff82324990 T amdgpu_dpm_set_df_cstate -ffffffff82324a30 T amdgpu_dpm_allow_xgmi_power_down -ffffffff82324ab0 T amdgpu_dpm_enable_mgpu_fan_boost -ffffffff82324b40 T amdgpu_dpm_set_clockgating_by_smu -ffffffff82324be0 T amdgpu_dpm_smu_i2c_bus_access -ffffffff82324c80 T amdgpu_pm_acpi_event_handler -ffffffff82324d40 T amdgpu_dpm_read_sensor -ffffffff82324e00 T amdgpu_dpm_get_apu_thermal_limit -ffffffff82324ea0 T amdgpu_dpm_set_apu_thermal_limit -ffffffff82324f40 T amdgpu_dpm_compute_clocks -ffffffff82325040 T amdgpu_dpm_enable_uvd -ffffffff82325230 T amdgpu_dpm_enable_vce -ffffffff82325420 T amdgpu_dpm_enable_jpeg -ffffffff82325520 T amdgpu_pm_load_smu_firmware -ffffffff823255d0 T amdgpu_dpm_handle_passthrough_sbr -ffffffff82325650 T amdgpu_dpm_send_hbm_bad_pages_num -ffffffff823256d0 T amdgpu_dpm_send_hbm_bad_channel_flag -ffffffff82325750 T amdgpu_dpm_get_dpm_freq_range -ffffffff823257f0 T amdgpu_dpm_set_soft_freq_range -ffffffff82325890 T amdgpu_dpm_write_watermarks_table -ffffffff82325910 T amdgpu_dpm_wait_for_event -ffffffff823259a0 T amdgpu_dpm_set_residency_gfxoff -ffffffff82325a20 T amdgpu_dpm_get_residency_gfxoff -ffffffff82325aa0 T amdgpu_dpm_get_entrycount_gfxoff -ffffffff82325b20 T amdgpu_dpm_get_status_gfxoff -ffffffff82325ba0 T amdgpu_dpm_get_thermal_throttling_counter -ffffffff82325bf0 T amdgpu_dpm_gfx_state_change -ffffffff82325c60 T amdgpu_dpm_get_ecc_info -ffffffff82325ce0 T amdgpu_dpm_get_vce_clock_state -ffffffff82325d70 T amdgpu_dpm_get_current_power_state -ffffffff82325de0 T amdgpu_dpm_set_power_state -ffffffff82325f40 T amdgpu_dpm_dispatch_task -ffffffff82325fe0 T amdgpu_dpm_get_performance_level -ffffffff82326070 T amdgpu_dpm_force_performance_level -ffffffff82326250 T amdgpu_dpm_get_pp_num_states -ffffffff823262e0 T amdgpu_dpm_get_pp_table -ffffffff82326370 T amdgpu_dpm_set_fine_grain_clk_vol -ffffffff82326410 T amdgpu_dpm_odn_edit_dpm_table -ffffffff823264b0 T amdgpu_dpm_print_clock_levels -ffffffff82326540 T amdgpu_dpm_emit_clock_levels -ffffffff823265e0 T amdgpu_dpm_set_ppfeature_status -ffffffff82326670 T amdgpu_dpm_get_ppfeature_status -ffffffff82326700 T amdgpu_dpm_force_clock_level -ffffffff82326790 T amdgpu_dpm_get_sclk_od -ffffffff82326810 T amdgpu_dpm_set_sclk_od -ffffffff82326990 T amdgpu_dpm_get_mclk_od -ffffffff82326a10 T amdgpu_dpm_set_mclk_od -ffffffff82326b90 T amdgpu_dpm_get_power_profile_mode -ffffffff82326c20 T amdgpu_dpm_set_power_profile_mode -ffffffff82326cc0 T amdgpu_dpm_get_gpu_metrics -ffffffff82326d50 T amdgpu_dpm_get_fan_control_mode -ffffffff82326de0 T amdgpu_dpm_set_fan_speed_pwm -ffffffff82326e70 T amdgpu_dpm_get_fan_speed_pwm -ffffffff82326f00 T amdgpu_dpm_get_fan_speed_rpm -ffffffff82326f90 T amdgpu_dpm_set_fan_speed_rpm -ffffffff82327020 T amdgpu_dpm_set_fan_control_mode -ffffffff823270b0 T amdgpu_dpm_get_power_limit -ffffffff82327160 T amdgpu_dpm_set_power_limit -ffffffff823271f0 T amdgpu_dpm_is_cclk_dpm_supported -ffffffff82327260 T amdgpu_dpm_debugfs_print_current_performance_level -ffffffff823272f0 T amdgpu_dpm_get_smu_prv_buf_details -ffffffff82327390 T amdgpu_dpm_is_overdrive_supported -ffffffff82327400 T amdgpu_dpm_set_pp_table -ffffffff823274a0 T amdgpu_dpm_get_num_cpu_cores -ffffffff823274f0 T amdgpu_dpm_stb_debug_fs_init -ffffffff82327540 T amdgpu_dpm_display_configuration_change -ffffffff823275d0 T amdgpu_dpm_get_clock_by_type -ffffffff82327670 T amdgpu_dpm_get_display_mode_validation_clks -ffffffff82327700 T amdgpu_dpm_get_clock_by_type_with_latency -ffffffff823277a0 T amdgpu_dpm_get_clock_by_type_with_voltage -ffffffff82327840 T amdgpu_dpm_set_watermarks_for_clocks_ranges -ffffffff823278d0 T amdgpu_dpm_display_clock_voltage_request -ffffffff82327960 T amdgpu_dpm_get_current_clocks -ffffffff823279f0 T amdgpu_dpm_notify_smu_enable_pwe -ffffffff82327a70 T amdgpu_dpm_set_active_display_count -ffffffff82327b00 T amdgpu_dpm_set_min_deep_sleep_dcefclk -ffffffff82327b90 T amdgpu_dpm_set_hard_min_dcefclk_by_freq -ffffffff82327c30 T amdgpu_dpm_set_hard_min_fclk_by_freq -ffffffff82327cd0 T amdgpu_dpm_display_disable_memory_clock_switch -ffffffff82327d60 T amdgpu_dpm_get_max_sustainable_clocks_by_dc -ffffffff82327df0 T amdgpu_dpm_get_uclk_dpm_states -ffffffff82327e90 T amdgpu_dpm_get_dpm_clock_table -ffffffff82328000 T amdgpu_dpm_get_active_displays -ffffffff823280a0 T amdgpu_dpm_get_vblank_time -ffffffff82328150 T amdgpu_dpm_get_vrefresh -ffffffff82329000 T amdgpu_pm_sysfs_init -ffffffff82329030 T amdgpu_pm_sysfs_fini -ffffffff82329060 T amdgpu_debugfs_pm_init -ffffffff8232a000 T amdgpu_dpm_print_class_info -ffffffff8232a2b0 T amdgpu_dpm_print_cap_info -ffffffff8232a340 T amdgpu_dpm_print_ps_status -ffffffff8232a3d0 T amdgpu_pm_print_power_states -ffffffff8232a460 T amdgpu_get_platform_caps -ffffffff8232a500 T amdgpu_parse_extended_power_table -ffffffff8232b290 t amdgpu_parse_clk_voltage_dep_table -ffffffff8232b340 T amdgpu_free_extended_power_table -ffffffff8232b450 T amdgpu_add_thermal_controller -ffffffff8232b8a0 T amdgpu_get_vce_clock_state -ffffffff8232b8e0 T amdgpu_legacy_dpm_compute_clocks -ffffffff8232bd70 T amdgpu_dpm_thermal_work_handler -ffffffff8232c000 t pp_early_init -ffffffff8232c100 t pp_late_init -ffffffff8232c220 t pp_sw_init -ffffffff8232c2b0 t pp_sw_fini -ffffffff8232c300 t pp_hw_init -ffffffff8232c360 t pp_hw_fini -ffffffff8232c3d0 t pp_late_fini -ffffffff8232c430 t pp_suspend -ffffffff8232c480 t pp_resume -ffffffff8232c4a0 t pp_is_idle -ffffffff8232c4d0 t pp_wait_for_idle -ffffffff8232c500 t pp_sw_reset -ffffffff8232c530 t pp_set_clockgating_state -ffffffff8232c560 t pp_set_powergating_state -ffffffff8232c590 t pp_dpm_set_fan_control_mode -ffffffff8232c600 t pp_dpm_get_fan_control_mode -ffffffff8232c670 t pp_dpm_set_fan_speed_pwm -ffffffff8232c6d0 t pp_dpm_get_fan_speed_pwm -ffffffff8232c730 t pp_dpm_force_clock_level -ffffffff8232c790 t pp_dpm_print_clock_levels -ffffffff8232c7f0 t pp_dpm_emit_clock_levels -ffffffff8232c850 t pp_dpm_force_performance_level -ffffffff8232c8f0 t pp_dpm_get_sclk_od -ffffffff8232c950 t pp_dpm_set_sclk_od -ffffffff8232c9b0 t pp_dpm_get_mclk_od -ffffffff8232ca10 t pp_dpm_set_mclk_od -ffffffff8232ca70 t pp_dpm_read_sensor -ffffffff8232cb30 t pp_dpm_get_performance_level -ffffffff8232cb70 t pp_dpm_get_current_power_state -ffffffff8232cbf0 t pp_dpm_get_fan_speed_rpm -ffffffff8232cc50 t pp_dpm_set_fan_speed_rpm -ffffffff8232ccb0 t pp_dpm_get_pp_num_states -ffffffff8232cdf0 t pp_dpm_get_pp_table -ffffffff8232ce40 t pp_dpm_set_pp_table -ffffffff8232cf70 t pp_dpm_switch_power_profile -ffffffff8232d0b0 t pp_dpm_get_vce_clock_state -ffffffff8232d100 t pp_dpm_dispatch_tasks -ffffffff8232d140 t pp_dpm_load_fw -ffffffff8232d1b0 t pp_dpm_fw_loading_complete -ffffffff8232d1e0 t pp_set_powergating_by_smu -ffffffff8232d360 t pp_set_clockgating_by_smu -ffffffff8232d3d0 t pp_set_power_limit -ffffffff8232d490 t pp_get_power_limit -ffffffff8232d530 t pp_get_power_profile_mode -ffffffff8232d590 t pp_set_power_profile_mode -ffffffff8232d5f0 t pp_set_fine_grain_clk_vol -ffffffff8232d650 t pp_odn_edit_dpm_table -ffffffff8232d6b0 t pp_dpm_set_mp1_state -ffffffff8232d710 t pp_smu_i2c_bus_access -ffffffff8232d770 t pp_gfx_state_change_set -ffffffff8232d7d0 t pp_dpm_get_sclk -ffffffff8232d820 t pp_dpm_get_mclk -ffffffff8232d870 t pp_display_configuration_change -ffffffff8232d8c0 t pp_get_display_power_level -ffffffff8232d900 t pp_get_current_clocks -ffffffff8232da20 t pp_get_clock_by_type -ffffffff8232da70 t pp_get_clock_by_type_with_latency -ffffffff8232dac0 t pp_get_clock_by_type_with_voltage -ffffffff8232db10 t pp_set_watermarks_for_clocks_ranges -ffffffff8232db50 t pp_display_clock_voltage_request -ffffffff8232db90 t pp_get_display_mode_validation_clocks -ffffffff8232dbf0 t pp_notify_smu_enable_pwe -ffffffff8232dc50 t pp_enable_mgpu_fan_boost -ffffffff8232dcb0 t pp_set_active_display_count -ffffffff8232dcf0 t pp_set_hard_min_dcefclk_by_freq -ffffffff8232dd50 t pp_set_hard_min_fclk_by_freq -ffffffff8232ddb0 t pp_set_min_deep_sleep_dcefclk -ffffffff8232de10 t pp_get_asic_baco_capability -ffffffff8232de80 t pp_get_asic_baco_state -ffffffff8232dee0 t pp_set_asic_baco_state -ffffffff8232df50 t pp_get_ppfeature_status -ffffffff8232dfb0 t pp_set_ppfeature_status -ffffffff8232e000 t pp_asic_reset_mode_2 -ffffffff8232e060 t pp_set_df_cstate -ffffffff8232e0c0 t pp_set_xgmi_pstate -ffffffff8232e120 t pp_get_gpu_metrics -ffffffff8232e180 t pp_get_prv_buffer_details -ffffffff8232e200 t pp_pm_compute_clocks -ffffffff8232e2c0 t pp_swctf_delayed_work_handler -ffffffff8232e410 t __delayed_work_tick -ffffffff8232f000 T ci_baco_set_state -ffffffff82330000 T baco_program_registers -ffffffff823300d0 t baco_cmd_handler -ffffffff82330250 T soc15_baco_program_registers -ffffffff82331000 T fiji_baco_set_state -ffffffff82332000 T phm_setup_asic -ffffffff82332050 T phm_power_down_asic -ffffffff823320a0 T phm_set_power_state -ffffffff82332110 T phm_enable_dynamic_state_management -ffffffff823321c0 T phm_disable_dynamic_state_management -ffffffff82332260 T phm_force_dpm_levels -ffffffff823322b0 T phm_apply_state_adjust_rules -ffffffff82332300 T phm_apply_clock_adjust_rules -ffffffff82332350 T phm_powerdown_uvd -ffffffff823323a0 T phm_disable_clock_power_gatings -ffffffff823323f0 T phm_pre_display_configuration_changed -ffffffff82332450 T phm_display_configuration_changed -ffffffff823324b0 T phm_notify_smc_display_config_after_ps_adjustment -ffffffff82332510 T phm_stop_thermal_controller -ffffffff82332570 T phm_register_irq_handlers -ffffffff823325c0 T phm_start_thermal_controller -ffffffff82332710 T phm_check_smc_update_required_for_display_configuration -ffffffff82332770 T phm_check_states_equal -ffffffff823327c0 T phm_store_dal_configuration_data -ffffffff82332910 T phm_get_dal_power_level -ffffffff82332970 T phm_set_cpu_power_state -ffffffff823329c0 T phm_get_performance_level -ffffffff82332a20 T phm_get_clock_info -ffffffff82332b90 T phm_get_current_shallow_sleep_clocks -ffffffff82332be0 T phm_get_clock_by_type -ffffffff82332c30 T phm_get_clock_by_type_with_latency -ffffffff82332c80 T phm_get_clock_by_type_with_voltage -ffffffff82332cd0 T phm_set_watermarks_for_clocks_ranges -ffffffff82332d20 T phm_display_clock_voltage_request -ffffffff82332d70 T phm_get_max_high_clocks -ffffffff82332dc0 T phm_disable_smc_firmware_ctf -ffffffff82332e20 T phm_set_active_display_count -ffffffff82333000 T hwmgr_early_init -ffffffff82333460 t polaris_set_asic_special_caps -ffffffff823334e0 T hwmgr_sw_init -ffffffff82333550 T hwmgr_sw_fini -ffffffff823335a0 T hwmgr_hw_init -ffffffff82333760 T hwmgr_hw_fini -ffffffff82333820 T hwmgr_suspend -ffffffff823338a0 T hwmgr_resume -ffffffff82333940 T hwmgr_handle_task -ffffffff82334000 T polaris_baco_set_state -ffffffff82335000 T pp_override_get_default_fuse_value -ffffffff82336000 T psm_init_power_state_table -ffffffff823362a0 T psm_fini_power_state_table -ffffffff82336360 T psm_set_boot_states -ffffffff82336410 T psm_set_performance_states -ffffffff823364c0 T psm_set_user_performance_state -ffffffff82336550 T psm_adjust_power_state_dynamic -ffffffff82337000 T atomctrl_initialize_mc_reg_table -ffffffff82337210 T atomctrl_initialize_mc_reg_table_v2_2 -ffffffff82337420 T atomctrl_set_engine_dram_timings_rv770 -ffffffff82337490 T atomctrl_get_memory_pll_dividers_si -ffffffff82337570 T atomctrl_get_memory_pll_dividers_vi -ffffffff823375f0 T atomctrl_get_memory_pll_dividers_ai -ffffffff823376a0 T atomctrl_get_engine_pll_dividers_kong -ffffffff82337720 T atomctrl_get_engine_pll_dividers_vi -ffffffff823377f0 T atomctrl_get_engine_pll_dividers_ai -ffffffff823378d0 T atomctrl_get_dfs_pll_dividers_vi -ffffffff82337990 T atomctrl_get_reference_clock -ffffffff823379f0 T atomctrl_is_voltage_controlled_by_gpio_v3 -ffffffff82337ab0 T atomctrl_get_voltage_table_v3 -ffffffff82337c10 T atomctrl_get_pp_assign_pin -ffffffff82337cf0 T atomctrl_calculate_voltage_evv_on_sclk -ffffffff823380c0 t GetScaledFraction -ffffffff82338150 t fDecodeLeakageID -ffffffff823381b0 t fSqrt -ffffffff82338230 T atomctrl_get_voltage_evv_on_sclk -ffffffff823382b0 T atomctrl_get_voltage_evv -ffffffff82338360 T atomctrl_get_mpll_reference_clock -ffffffff823383d0 T atomctrl_is_asic_internal_ss_supported -ffffffff82338420 T atomctrl_get_memory_clock_spread_spectrum -ffffffff82338520 T atomctrl_get_engine_clock_spread_spectrum -ffffffff82338620 T atomctrl_read_efuse -ffffffff823386d0 T atomctrl_set_ac_timing_ai -ffffffff82338730 T atomctrl_get_voltage_evv_on_sclk_ai -ffffffff823387b0 T atomctrl_get_smc_sclk_range_table -ffffffff82338860 T atomctrl_get_vddc_shared_railinfo -ffffffff823388d0 T atomctrl_get_avfs_information -ffffffff82338a60 T atomctrl_get_svi2_info -ffffffff82338b40 T atomctrl_get_leakage_id_from_efuse -ffffffff82338ba0 T atomctrl_get_leakage_vddc_base_on_leakage -ffffffff82338d40 T atomctrl_get_voltage_range -ffffffff82338e00 T atomctrl_get_edc_hilo_leakage_offset_table -ffffffff82338e80 T atomctrl_get_edc_leakage_table -ffffffff82339000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 -ffffffff823390c0 T pp_atomfwctrl_get_voltage_table_v4 -ffffffff82339280 T pp_atomfwctrl_get_pp_assign_pin -ffffffff82339360 T pp_atomfwctrl_enter_self_refresh -ffffffff82339390 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 -ffffffff82339440 T pp_atomfwctrl_get_avfs_information -ffffffff82339780 T pp_atomfwctrl_get_gpio_information -ffffffff82339820 T pp_atomfwctrl_get_clk_information_by_clkid -ffffffff823398b0 T pp_atomfwctrl_get_vbios_bootup_values -ffffffff82339c30 T pp_atomfwctrl_get_smc_dpm_information -ffffffff8233a000 T encode_pcie_lane_width -ffffffff8233a030 T decode_pcie_lane_width -ffffffff8233b000 t pp_tables_v1_0_initialize -ffffffff8233c450 t pp_tables_v1_0_uninitialize -ffffffff8233c600 T get_number_of_powerplay_table_entries_v1_0 -ffffffff8233c6b0 T get_powerplay_table_entry_v1_0 -ffffffff8233d000 T pp_tables_get_response_times -ffffffff8233d0d0 T pp_tables_get_num_of_entries -ffffffff8233d190 T pp_tables_get_entry -ffffffff8233d4a0 t init_non_clock_fields -ffffffff8233d5e0 t pp_tables_initialize -ffffffff8233e760 t pp_tables_uninitialize -ffffffff8233e960 t get_number_of_vce_state_table_entries -ffffffff8233ea50 t get_vce_state_table_entry -ffffffff8233f000 T smu10_init_function_pointers -ffffffff8233f040 t smu10_hwmgr_backend_init -ffffffff8233f6e0 t smu10_hwmgr_backend_fini -ffffffff8233f820 t smu10_setup_asic_task -ffffffff8233f890 t smu10_get_power_state_size -ffffffff8233f8c0 t smu10_apply_state_adjust_rules -ffffffff8233f8f0 t smu10_dpm_force_dpm_level -ffffffff8233fe70 t smu10_enable_dpm_tasks -ffffffff8233ff30 t smu10_disable_dpm_tasks -ffffffff8233ff60 t smu10_dpm_patch_boot_state -ffffffff8233ff90 t smu10_dpm_get_pp_table_entry -ffffffff8233fff0 t smu10_dpm_get_num_of_pp_table_entries -ffffffff82340040 t smu10_powergate_vcn -ffffffff823400e0 t smu10_dpm_get_mclk -ffffffff82340140 t smu10_dpm_get_sclk -ffffffff82340190 t smu10_set_power_state_tasks -ffffffff82340200 t smu10_set_cpu_power_state -ffffffff82340230 t smu10_store_cc6_data -ffffffff823402a0 t smu10_get_dal_power_level -ffffffff823402d0 t smu10_get_performance_level -ffffffff82340370 t smu10_get_current_shallow_sleep_clocks -ffffffff823403d0 t smu10_get_clock_by_type_with_latency -ffffffff82340520 t smu10_get_clock_by_type_with_voltage -ffffffff82340630 t smu10_set_watermarks_for_clocks_ranges -ffffffff82340700 t smu10_display_clock_voltage_request -ffffffff823407a0 t smu10_get_max_high_clocks -ffffffff823407d0 t smu10_power_off_asic -ffffffff82340820 t smu10_force_clock_level -ffffffff823409e0 t smu10_print_clock_levels -ffffffff82340dd0 t smu10_gfx_off_control -ffffffff82340ee0 t smu10_read_sensor -ffffffff82341070 t smu10_set_active_display_count -ffffffff823410d0 t smu10_set_min_deep_sleep_dcefclk -ffffffff82341130 t smu10_get_power_profile_mode -ffffffff82341170 t smu10_set_power_profile_mode -ffffffff823412a0 t smu10_set_fine_grain_clk_vol -ffffffff823414b0 t smu10_powergate_mmhub -ffffffff823414d0 t smu10_smus_notify_pwe -ffffffff823414f0 t smu10_powergate_sdma -ffffffff82341510 t smu10_set_hard_min_dcefclk_by_freq -ffffffff82341570 t smu10_set_hard_min_fclk_by_freq -ffffffff823415d0 t smu10_set_hard_min_gfxclk_by_freq -ffffffff82341630 t smu10_set_soft_max_gfxclk_by_freq -ffffffff82341690 t smu10_asic_reset -ffffffff823416b0 t smu10_gfx_state_change -ffffffff823416f0 t smu10_dpm_get_pp_table_entry_callback -ffffffff82342000 T smu7_baco_get_capability -ffffffff82342060 T smu7_baco_get_state -ffffffff823420b0 T smu7_baco_set_state -ffffffff82343000 T smu7_powerdown_uvd -ffffffff82343050 T smu7_disable_clock_power_gating -ffffffff823430e0 T smu7_powergate_uvd -ffffffff823431d0 T smu7_powergate_vce -ffffffff823432c0 T smu7_update_clock_gatings -ffffffff82343670 T smu7_powergate_gfx -ffffffff82344000 T smu7_get_sleep_divider_id_from_clock -ffffffff823440a0 T smu7_init_function_pointers -ffffffff82344100 t smu7_hwmgr_backend_init -ffffffff82345f80 t smu7_hwmgr_backend_fini -ffffffff82345ff0 t smu7_setup_asic_task -ffffffff82346360 t smu7_get_power_state_size -ffffffff82346390 t smu7_apply_state_adjust_rules -ffffffff82346830 t smu7_force_dpm_level -ffffffff82346d40 t smu7_enable_dpm_tasks -ffffffff823495d0 t smu7_disable_dpm_tasks -ffffffff82349c10 t smu7_dpm_patch_boot_state -ffffffff82349d50 t smu7_get_pp_table_entry -ffffffff8234a150 t smu7_get_number_of_powerplay_table_entries -ffffffff8234a1c0 t smu7_dpm_get_mclk -ffffffff8234a260 t smu7_dpm_get_sclk -ffffffff8234a300 t smu7_set_power_state_tasks -ffffffff8234b020 t smu7_notify_smc_display_config_after_ps_adjustment -ffffffff8234b050 t smu7_display_configuration_changed_task -ffffffff8234b210 t smu7_set_max_fan_rpm_output -ffffffff8234b240 t smu7_set_max_fan_pwm_output -ffffffff8234b260 t smu7_set_fan_control_mode -ffffffff8234b2f0 t smu7_get_fan_control_mode -ffffffff8234b330 t smu7_register_irq_handlers -ffffffff8234b3e0 t smu7_check_smc_update_required_for_display_configuration -ffffffff8234b490 t smu7_check_states_equal -ffffffff8234b630 t smu7_get_performance_level -ffffffff8234b6c0 t smu7_get_clock_by_type -ffffffff8234b880 t smu7_get_clock_by_type_with_latency -ffffffff8234ba50 t smu7_set_watermarks_for_clocks_ranges -ffffffff8234bc70 t smu7_get_max_high_clocks -ffffffff8234bcf0 t smu7_power_off_asic -ffffffff8234bd50 t smu7_force_clock_level -ffffffff8234be60 t smu7_print_clock_levels -ffffffff8234c450 t smu7_get_sclk_od -ffffffff8234c4b0 t smu7_set_sclk_od -ffffffff8234c570 t smu7_get_mclk_od -ffffffff8234c5d0 t smu7_set_mclk_od -ffffffff8234c690 t smu7_read_sensor -ffffffff8234c8d0 t smu7_avfs_control -ffffffff8234c9a0 t smu7_notify_cac_buffer_info -ffffffff8234cb40 t smu7_get_thermal_temperature_range -ffffffff8234cbe0 t smu7_get_power_profile_mode -ffffffff8234cc20 t smu7_set_power_profile_mode -ffffffff8234ce80 t smu7_odn_edit_dpm_table -ffffffff8234d030 t phm_add_voltage -ffffffff8234d140 t smu7_copy_and_switch_arb_sets -ffffffff8234d370 t smu7_check_dpm_table_updated -ffffffff8234d4d0 t smu7_odn_initial_default_setting -ffffffff8234d600 t smu7_set_dpm_event_sources -ffffffff8234d720 t smu7_get_pp_table_entry_callback_func_v0 -ffffffff8234dbe0 t smu7_get_pp_table_entry_callback_func_v1 -ffffffff8234e600 t smu7_get_gpu_power -ffffffff8234f000 T smu7_enable_didt_config -ffffffff8234f3c0 t smu7_program_pt_config_registers -ffffffff8234f590 t smu7_enable_didt -ffffffff8234f780 T smu7_disable_didt_config -ffffffff8234f850 T smu7_enable_smc_cac -ffffffff8234f8e0 T smu7_disable_smc_cac -ffffffff8234f970 T smu7_set_power_limit -ffffffff8234f9d0 T smu7_enable_power_containment -ffffffff8234fb60 T smu7_disable_power_containment -ffffffff8234fc80 T smu7_power_control_set_level -ffffffff82350000 T smu7_fan_ctrl_get_fan_speed_info -ffffffff82350080 T smu7_fan_ctrl_get_fan_speed_pwm -ffffffff82350150 T smu7_fan_ctrl_get_fan_speed_rpm -ffffffff82350200 T smu7_fan_ctrl_set_static_mode -ffffffff82350330 T smu7_fan_ctrl_set_default_mode -ffffffff82350410 T smu7_fan_ctrl_start_smc_fan_control -ffffffff82350540 T smu7_fan_ctrl_stop_smc_fan_control -ffffffff82350560 T smu7_fan_ctrl_set_fan_speed_pwm -ffffffff82350740 T smu7_fan_ctrl_reset_fan_speed_to_default -ffffffff82350930 T smu7_fan_ctrl_set_fan_speed_rpm -ffffffff82350b10 T smu7_thermal_get_temperature -ffffffff82350b70 T smu7_thermal_disable_alert -ffffffff82350c10 T smu7_thermal_stop_thermal_controller -ffffffff82350d90 T smu7_start_thermal_controller -ffffffff82351120 T smu7_thermal_ctrl_uninitialize_thermal_controller -ffffffff82352000 T smu8_init_function_pointers -ffffffff82352040 t smu8_hwmgr_backend_init -ffffffff82352520 t smu8_hwmgr_backend_fini -ffffffff823525a0 t smu8_setup_asic_task -ffffffff82352ac0 t smu8_get_power_state_size -ffffffff82352af0 t smu8_apply_state_adjust_rules -ffffffff82352c40 t smu8_dpm_force_dpm_level -ffffffff82352f20 t smu8_enable_dpm_tasks -ffffffff823530b0 t smu8_disable_dpm_tasks -ffffffff82353190 t smu8_dpm_patch_boot_state -ffffffff823531f0 t smu8_dpm_get_pp_table_entry -ffffffff82353250 t smu8_dpm_get_num_of_pp_table_entries -ffffffff823532a0 t smu8_dpm_powerdown_uvd -ffffffff823532f0 t smu8_dpm_powergate_vce -ffffffff823534c0 t smu8_dpm_powergate_uvd -ffffffff823536d0 t smu8_dpm_powergate_acp -ffffffff82353730 t smu8_dpm_get_mclk -ffffffff82353760 t smu8_dpm_get_sclk -ffffffff823537d0 t smu8_set_power_state_tasks -ffffffff82353ad0 t smu8_set_cpu_power_state -ffffffff82353b50 t smu8_store_cc6_data -ffffffff82353bd0 t smu8_get_dal_power_level -ffffffff82353c50 t smu8_get_performance_level -ffffffff82353d50 t smu8_get_current_shallow_sleep_clocks -ffffffff82353db0 t smu8_get_clock_by_type -ffffffff82353ef0 t smu8_get_max_high_clocks -ffffffff82353fb0 t smu8_power_off_asic -ffffffff82354030 t smu8_force_clock_level -ffffffff823540a0 t smu8_print_clock_levels -ffffffff82354280 t smu8_read_sensor -ffffffff82354590 t smu8_notify_cac_buffer_info -ffffffff82354640 t smu8_get_thermal_temperature_range -ffffffff823546c0 t smu8_dpm_get_pp_table_entry_callback -ffffffff82355000 T smu9_baco_get_capability -ffffffff823550e0 T smu9_baco_get_state -ffffffff82356000 T convert_to_vid -ffffffff82356050 T convert_to_vddc -ffffffff82356090 T phm_copy_clock_limits_array -ffffffff82356170 T phm_copy_overdrive_settings_limits_array -ffffffff82356250 T phm_set_field_to_u32 -ffffffff823562b0 T phm_wait_on_register -ffffffff823563a0 T phm_wait_on_indirect_register -ffffffff823564b0 T phm_wait_for_register_unequal -ffffffff82356580 T phm_wait_for_indirect_register_unequal -ffffffff82356680 T phm_cf_want_uvd_power_gating -ffffffff823566c0 T phm_cf_want_vce_power_gating -ffffffff82356700 T phm_trim_voltage_table -ffffffff82356820 T phm_get_svi2_mvdd_voltage_table -ffffffff823569a0 T phm_get_svi2_vddci_voltage_table -ffffffff82356b20 T phm_get_svi2_vdd_voltage_table -ffffffff82356bc0 T phm_trim_voltage_table_to_fit_state_table -ffffffff82356cb0 T phm_reset_single_dpm_table -ffffffff82356d10 T phm_setup_pcie_table_entry -ffffffff82356d50 T phm_get_dpm_level_enable_mask_value -ffffffff82356e30 T phm_get_voltage_index -ffffffff82356eb0 T phm_get_voltage_id -ffffffff82356f30 T phm_find_closest_vddci -ffffffff82356fa0 T phm_find_boot_level -ffffffff82357010 T phm_get_sclk_for_voltage_evv -ffffffff823570d0 T phm_initializa_dynamic_state_adjustment_rule_settings -ffffffff823571e0 T phm_get_lowest_enabled_level -ffffffff82357220 T phm_apply_dal_min_voltage_request -ffffffff823572f0 T phm_get_voltage_evv_on_sclk -ffffffff823573a0 T phm_irq_process -ffffffff82357550 T smu9_register_irq_handlers -ffffffff82357600 T smu_atom_get_data_table -ffffffff82357670 T smu_get_voltage_dependency_table_ppt_v1 -ffffffff82357770 T smu_set_watermarks_for_clocks_ranges -ffffffff82358000 T tonga_baco_set_state -ffffffff82359000 T vega10_baco_set_state -ffffffff8235a000 T vega10_enable_disable_vce_dpm -ffffffff8235a090 T vega10_hwmgr_init -ffffffff8235a0f0 t vega10_hwmgr_backend_init -ffffffff8235aef0 t vega10_hwmgr_backend_fini -ffffffff8235af60 t vega10_setup_asic_task -ffffffff8235b090 t vega10_get_power_state_size -ffffffff8235b0c0 t vega10_apply_state_adjust_rules -ffffffff8235b420 t vega10_dpm_force_dpm_level -ffffffff8235b880 t vega10_enable_dpm_tasks -ffffffff8235e650 t vega10_disable_dpm_tasks -ffffffff8235ec30 t vega10_patch_boot_state -ffffffff8235ec60 t vega10_get_pp_table_entry -ffffffff8235ecd0 t vega10_power_gate_vce -ffffffff8235ed70 t vega10_power_gate_uvd -ffffffff8235ee10 t vega10_dpm_get_mclk -ffffffff8235eeb0 t vega10_dpm_get_sclk -ffffffff8235ef50 t vega10_set_power_state_tasks -ffffffff8235f8b0 t vega10_notify_smc_display_config_after_ps_adjustment -ffffffff8235fa60 t vega10_display_configuration_changed_task -ffffffff8235fb30 t vega10_set_fan_control_mode -ffffffff8235fba0 t vega10_get_fan_control_mode -ffffffff8235fbe0 t vega10_check_smc_update_required_for_display_configuration -ffffffff8235fc40 t vega10_check_states_equal -ffffffff8235fda0 t vega10_get_dal_power_level -ffffffff8235fde0 t vega10_get_performance_level -ffffffff8235fe70 t vega10_get_clock_by_type_with_latency -ffffffff82360060 t vega10_get_clock_by_type_with_voltage -ffffffff82360140 t vega10_set_watermarks_for_clocks_ranges -ffffffff823601a0 t vega10_display_clock_voltage_request -ffffffff82360220 t vega10_power_off_asic -ffffffff82360290 t vega10_force_clock_level -ffffffff823603c0 t vega10_emit_clock_levels -ffffffff82360530 t vega10_print_clock_levels -ffffffff82360cd0 t vega10_get_sclk_od -ffffffff82360d40 t vega10_set_sclk_od -ffffffff82360e40 t vega10_get_mclk_od -ffffffff82360eb0 t vega10_set_mclk_od -ffffffff82360fa0 t vega10_read_sensor -ffffffff82361200 t vega10_avfs_enable -ffffffff823612c0 t vega10_notify_cac_buffer_info -ffffffff82361370 t vega10_get_thermal_temperature_range -ffffffff82361490 t vega10_get_power_profile_mode -ffffffff823614d0 t vega10_set_power_profile_mode -ffffffff823615f0 t vega10_odn_edit_dpm_table -ffffffff82361b60 t vega10_get_ppfeature_status -ffffffff82361be0 t vega10_set_ppfeature_status -ffffffff82361c80 t vega10_set_mp1_state -ffffffff82361cf0 t vega10_disable_power_features_for_compute_performance -ffffffff82361ee0 t vega10_upload_dpm_bootup_level -ffffffff82361ff0 t vega10_upload_dpm_max_level -ffffffff823620d0 t vega10_odn_initial_default_setting -ffffffff823622b0 t vega10_populate_all_graphic_levels -ffffffff823624c0 t vega10_populate_all_memory_levels -ffffffff82362620 t vega10_populate_single_gfx_level -ffffffff82362770 t vega10_populate_single_soc_level -ffffffff823628b0 t vega10_populate_single_memory_level -ffffffff82362a20 t vega10_get_pp_table_entry_callback_func -ffffffff82362c60 t vega10_odn_update_power_state -ffffffff82363000 T vega10_enable_didt_config -ffffffff82364870 T vega10_disable_didt_config -ffffffff82364ad0 T vega10_initialize_power_tune_defaults -ffffffff82364c10 T vega10_set_power_limit -ffffffff82364c60 T vega10_enable_power_containment -ffffffff82364d80 T vega10_disable_power_containment -ffffffff82364e50 T vega10_power_control_set_level -ffffffff82364eb0 t vega10_didt_set_mask -ffffffff82366000 t vega10_pp_tables_initialize -ffffffff82367690 t vega10_pp_tables_uninitialize -ffffffff82367840 T vega10_get_number_of_powerplay_table_entries -ffffffff823678f0 T vega10_get_powerplay_table_entry -ffffffff82367a60 T vega10_baco_set_cap -ffffffff82368000 T vega10_fan_ctrl_get_fan_speed_info -ffffffff82368080 T vega10_fan_ctrl_get_fan_speed_pwm -ffffffff823681b0 T vega10_fan_ctrl_get_fan_speed_rpm -ffffffff823682b0 T vega10_fan_ctrl_set_static_mode -ffffffff82368570 T vega10_fan_ctrl_set_default_mode -ffffffff82368790 T vega10_fan_ctrl_start_smc_fan_control -ffffffff82368850 T vega10_fan_ctrl_stop_smc_fan_control -ffffffff82368910 T vega10_fan_ctrl_set_fan_speed_pwm -ffffffff82368b50 T vega10_fan_ctrl_reset_fan_speed_to_default -ffffffff82368c10 T vega10_fan_ctrl_set_fan_speed_rpm -ffffffff82368df0 T vega10_thermal_get_temperature -ffffffff82368e80 T vega10_thermal_disable_alert -ffffffff82368f90 T vega10_thermal_stop_thermal_controller -ffffffff82368ff0 T vega10_enable_mgpu_fan_boost -ffffffff82369100 T vega10_start_thermal_controller -ffffffff823696c0 T vega10_thermal_ctrl_uninitialize_thermal_controller -ffffffff8236a000 T vega12_baco_set_state -ffffffff8236b000 T vega12_enable_disable_vce_dpm -ffffffff8236b090 T vega12_hwmgr_init -ffffffff8236b0d0 t vega12_hwmgr_backend_init -ffffffff8236b900 t vega12_hwmgr_backend_fini -ffffffff8236b960 t vega12_setup_asic_task -ffffffff8236b9a0 t vega12_apply_clocks_adjust_rules -ffffffff8236bd60 t vega12_dpm_force_dpm_level -ffffffff8236c1a0 t vega12_enable_dpm_tasks -ffffffff8236cc70 t vega12_disable_dpm_tasks -ffffffff8236cd70 t vega12_patch_boot_state -ffffffff8236cda0 t vega12_power_gate_vce -ffffffff8236ce50 t vega12_power_gate_uvd -ffffffff8236cf00 t vega12_dpm_get_mclk -ffffffff8236cf50 t vega12_dpm_get_sclk -ffffffff8236cfa0 t vega12_notify_smc_display_config_after_ps_adjustment -ffffffff8236d100 t vega12_pre_display_configuration_changed_task -ffffffff8236d1e0 t vega12_display_configuration_changed_task -ffffffff8236d2c0 t vega12_set_fan_control_mode -ffffffff8236d320 t vega12_get_fan_control_mode -ffffffff8236d360 t vega12_check_smc_update_required_for_display_configuration -ffffffff8236d3c0 t vega12_get_dal_power_level -ffffffff8236d3f0 t vega12_get_performance_level -ffffffff8236d420 t vega12_get_clock_by_type_with_latency -ffffffff8236d700 t vega12_get_clock_by_type_with_voltage -ffffffff8236d730 t vega12_set_watermarks_for_clocks_ranges -ffffffff8236d7b0 t vega12_display_clock_voltage_request -ffffffff8236d830 t vega12_power_off_asic -ffffffff8236d8a0 t vega12_force_clock_level -ffffffff8236dae0 t vega12_print_clock_levels -ffffffff8236e280 t vega12_gfx_off_control -ffffffff8236e2d0 t vega12_read_sensor -ffffffff8236e6b0 t vega12_notify_cac_buffer_info -ffffffff8236e760 t vega12_get_thermal_temperature_range -ffffffff8236e860 t vega12_get_ppfeature_status -ffffffff8236e8e0 t vega12_set_ppfeature_status -ffffffff8236e980 t vega12_set_mp1_state -ffffffff8236e9f0 t vega12_get_gpu_metrics -ffffffff8236eca0 t vega12_upload_dpm_min_level -ffffffff8236eee0 t vega12_upload_dpm_max_level -ffffffff8236f0b0 t vega12_populate_umdpstate_clocks -ffffffff8236f150 t vega12_setup_single_dpm_table -ffffffff82370000 t vega12_pp_tables_initialize -ffffffff82370610 t vega12_pp_tables_uninitialize -ffffffff82371000 T vega12_fan_ctrl_get_fan_speed_info -ffffffff82371050 T vega12_fan_ctrl_get_fan_speed_rpm -ffffffff823710c0 T vega12_fan_ctrl_start_smc_fan_control -ffffffff823710f0 T vega12_fan_ctrl_stop_smc_fan_control -ffffffff82371120 T vega12_fan_ctrl_reset_fan_speed_to_default -ffffffff82371150 T vega12_thermal_get_temperature -ffffffff823711e0 T vega12_thermal_disable_alert -ffffffff82371270 T vega12_thermal_stop_thermal_controller -ffffffff82371300 T vega12_start_thermal_controller -ffffffff82372000 T vega20_baco_get_capability -ffffffff823720c0 T vega20_baco_get_state -ffffffff82372160 T vega20_baco_set_state -ffffffff82372360 T vega20_baco_apply_vdci_flush_workaround -ffffffff82373000 T vega20_hwmgr_init -ffffffff82373040 t vega20_hwmgr_backend_init -ffffffff82373940 t vega20_hwmgr_backend_fini -ffffffff823739a0 t vega20_setup_asic_task -ffffffff82373a90 t vega20_apply_clocks_adjust_rules -ffffffff82373f40 t vega20_dpm_force_dpm_level -ffffffff823746c0 t vega20_enable_dpm_tasks -ffffffff82374b00 t vega20_disable_dpm_tasks -ffffffff82374ca0 t vega20_power_gate_vce -ffffffff82374dd0 t vega20_power_gate_uvd -ffffffff82374e80 t vega20_dpm_get_mclk -ffffffff82374f80 t vega20_dpm_get_sclk -ffffffff82375080 t vega20_notify_smc_display_config_after_ps_adjustment -ffffffff823751c0 t vega20_pre_display_configuration_changed_task -ffffffff82375320 t vega20_display_configuration_changed_task -ffffffff82375400 t vega20_set_fan_control_mode -ffffffff82375470 t vega20_get_fan_control_mode -ffffffff823754b0 t vega20_check_smc_update_required_for_display_configuration -ffffffff82375510 t vega20_get_dal_power_level -ffffffff82375540 t vega20_get_performance_level -ffffffff82375570 t vega20_get_clock_by_type_with_latency -ffffffff823758d0 t vega20_get_clock_by_type_with_voltage -ffffffff82375900 t vega20_set_watermarks_for_clocks_ranges -ffffffff82375980 t vega20_display_clock_voltage_request -ffffffff82375a00 t vega20_power_off_asic -ffffffff82375a70 t vega20_force_clock_level -ffffffff82376080 t vega20_print_clock_levels -ffffffff82376fb0 t vega20_get_sclk_od -ffffffff82377020 t vega20_set_sclk_od -ffffffff823771b0 t vega20_get_mclk_od -ffffffff82377220 t vega20_set_mclk_od -ffffffff823773b0 t vega20_read_sensor -ffffffff823778c0 t vega20_notify_cac_buffer_info -ffffffff82377970 t vega20_get_thermal_temperature_range -ffffffff82377a70 t vega20_get_power_profile_mode -ffffffff82377bc0 t vega20_set_power_profile_mode -ffffffff82377f60 t vega20_odn_edit_dpm_table -ffffffff823783f0 t vega20_enable_mgpu_fan_boost -ffffffff82378450 t vega20_get_ppfeature_status -ffffffff823784d0 t vega20_set_ppfeature_status -ffffffff823785d0 t vega20_set_mp1_state -ffffffff82378660 t vega20_smu_i2c_bus_access -ffffffff823786f0 t vega20_set_df_cstate -ffffffff82378760 t vega20_set_xgmi_pstate -ffffffff823787c0 t vega20_get_gpu_metrics -ffffffff82378a90 t vega20_upload_dpm_min_level -ffffffff82378d00 t vega20_upload_dpm_max_level -ffffffff82378f20 t vega20_enable_all_smu_features -ffffffff82379020 t vega20_override_pcie_parameters -ffffffff82379280 t vega20_setup_default_dpm_tables -ffffffff823797c0 t vega20_init_max_sustainable_clocks -ffffffff82379b70 t vega20_od8_initialize_default_settings -ffffffff8237a1f0 t vega20_populate_umdpstate_clocks -ffffffff8237a290 t vega20_setup_single_dpm_table -ffffffff8237a3b0 t vega20_setup_memclk_dpm_table -ffffffff8237a440 t vega20_get_max_sustainable_clock -ffffffff8237b000 T vega20_set_power_limit -ffffffff8237b050 T vega20_validate_power_level_request -ffffffff8237b090 T vega20_power_control_set_level -ffffffff8237c000 t vega20_pp_tables_initialize -ffffffff8237c760 t vega20_pp_tables_uninitialize -ffffffff8237d000 T vega20_fan_ctrl_stop_smc_fan_control -ffffffff8237d090 T vega20_fan_ctrl_start_smc_fan_control -ffffffff8237d120 T vega20_fan_ctrl_get_fan_speed_pwm -ffffffff8237d250 T vega20_fan_ctrl_set_fan_speed_pwm -ffffffff8237d450 t vega20_fan_ctrl_set_static_mode -ffffffff8237d610 T vega20_fan_ctrl_get_fan_speed_info -ffffffff8237d650 T vega20_fan_ctrl_get_fan_speed_rpm -ffffffff8237d6b0 T vega20_fan_ctrl_set_fan_speed_rpm -ffffffff8237d860 T vega20_thermal_get_temperature -ffffffff8237d8f0 T vega20_thermal_disable_alert -ffffffff8237d980 T vega20_thermal_stop_thermal_controller -ffffffff8237da10 T vega20_start_thermal_controller -ffffffff8237e000 t ci_smu_init -ffffffff8237e060 t ci_smu_fini -ffffffff8237e0c0 t ci_start_smu -ffffffff8237e0f0 t ci_send_msg_to_smc -ffffffff8237e190 t ci_send_msg_to_smc_with_parameter -ffffffff8237e240 t ci_update_smc_table -ffffffff8237e490 t ci_process_firmware_header -ffffffff8237e9a0 t ci_update_sclk_threshold -ffffffff8237ebf0 t ci_thermal_setup_fan_table -ffffffff8237ee70 t ci_init_smc_table -ffffffff8237fb20 t ci_populate_all_graphic_levels -ffffffff8237ffa0 t ci_populate_all_memory_levels -ffffffff82380810 t ci_initialize_mc_reg_table -ffffffff823813a0 t ci_get_offsetof -ffffffff823813f0 t ci_get_mac_definition -ffffffff82381430 t ci_is_dpm_running -ffffffff823814b0 t ci_update_dpm_settings -ffffffff823818a0 t ci_stop_smc -ffffffff82381960 t ci_copy_bytes_to_smc -ffffffff82381c30 t ci_program_memory_timing_parameters -ffffffff82381df0 t ci_populate_smc_acp_level -ffffffff82381f10 t ci_populate_smc_uvd_level -ffffffff82382080 t ci_populate_smc_boot_level -ffffffff82382170 t ci_populate_smc_initial_state -ffffffff82382220 t ci_populate_bapm_parameters_in_dpm_table -ffffffff82382390 t ci_populate_vr_config -ffffffff82382430 t ci_populate_initial_mc_reg_table -ffffffff82382690 t ci_populate_pm_fuses -ffffffff82382d10 t ci_start_smc -ffffffff82382de0 t ci_populate_smc_voltage_table +ffffffff822c9130 t to_dal_irq_source_dcn32 +ffffffff822ca000 T dal_irq_service_construct +ffffffff822ca070 T dal_irq_service_destroy +ffffffff822ca100 T dal_irq_service_set_generic +ffffffff822ca180 T dal_irq_service_set +ffffffff822ca330 T dal_irq_service_ack +ffffffff822ca4a0 T dal_irq_service_ack_generic +ffffffff822ca510 T dal_irq_service_to_irq_source +ffffffff822cb000 T dp_handle_automated_test +ffffffff822cb820 T dp_set_test_pattern +ffffffff822cbf00 t set_crtc_test_pattern +ffffffff822cc370 T dp_set_preferred_link_settings +ffffffff822cc4c0 t dp_retrain_link_dp_test +ffffffff822cc5c0 T dp_set_preferred_training_settings +ffffffff822cd000 T dp_trace_init +ffffffff822cd0a0 T dp_trace_reset +ffffffff822cd130 T dp_trace_is_initialized +ffffffff822cd160 T dp_trace_detect_lt_init +ffffffff822cd1b0 T dp_trace_commit_lt_init +ffffffff822cd200 T dp_trace_link_loss_increment +ffffffff822cd230 T dp_trace_lt_fail_count_update +ffffffff822cd270 T dp_trace_lt_total_count_increment +ffffffff822cd2b0 T dp_trace_set_is_logged_flag +ffffffff822cd2f0 T dp_trace_is_logged +ffffffff822cd330 T dp_trace_lt_result_update +ffffffff822cd370 T dp_trace_set_lt_start_timestamp +ffffffff822cd450 T dp_trace_set_lt_end_timestamp +ffffffff822cd530 T dp_trace_get_lt_end_timestamp +ffffffff822cd570 T dp_trace_get_lt_counts +ffffffff822cd5b0 T dp_trace_get_link_loss_count +ffffffff822cd5e0 T dp_trace_set_edp_power_timestamp +ffffffff822cd6c0 T dp_trace_get_edp_poweron_timestamp +ffffffff822cd6f0 T dp_trace_get_edp_poweroff_timestamp +ffffffff822cd720 T dp_trace_source_sequence +ffffffff822ce000 T dp_fpga_hpo_enable_link_and_stream +ffffffff822cf000 T set_dio_throttled_vcp_size +ffffffff822cf020 T setup_dio_stream_encoder +ffffffff822cf110 T reset_dio_stream_encoder +ffffffff822cf1e0 T setup_dio_stream_attribute +ffffffff822cf380 T enable_dio_dp_link_output +ffffffff822cf410 T disable_dio_link_output +ffffffff822cf470 T set_dio_dp_link_test_pattern +ffffffff822cf4d0 T set_dio_dp_lane_settings +ffffffff822cf510 T update_dio_stream_allocation_table +ffffffff822cf580 T setup_dio_audio_output +ffffffff822cf5f0 T enable_dio_audio_packet +ffffffff822cf6b0 T disable_dio_audio_packet +ffffffff822cf790 T can_use_dio_link_hwss +ffffffff822cf7d0 T get_dio_link_hwss +ffffffff822d0000 T dp_dio_fixed_vs_pe_retimer_lane_cfg_to_hw_cfg +ffffffff822d0040 T dp_dio_fixed_vs_pe_retimer_exit_manual_automation +ffffffff822d0280 T enable_dio_fixed_vs_pe_retimer_program_4lane_output +ffffffff822d03b0 T requires_fixed_vs_pe_retimer_dio_link_hwss +ffffffff822d03f0 T get_dio_fixed_vs_pe_retimer_link_hwss +ffffffff822d0420 t enable_dio_fixed_vs_pe_retimer_dp_link_output +ffffffff822d0590 t set_dio_fixed_vs_pe_retimer_dp_link_test_pattern +ffffffff822d1000 T can_use_dpia_link_hwss +ffffffff822d1050 T get_dpia_link_hwss +ffffffff822d1080 t update_dpia_stream_allocation_table +ffffffff822d2000 T set_hpo_dp_throttled_vcp_size +ffffffff822d2030 T set_hpo_dp_hblank_min_symbol_width +ffffffff822d2120 T setup_hpo_dp_stream_encoder +ffffffff822d2170 T reset_hpo_dp_stream_encoder +ffffffff822d2190 T setup_hpo_dp_stream_attribute +ffffffff822d2210 T enable_hpo_dp_link_output +ffffffff822d2290 T disable_hpo_dp_link_output +ffffffff822d2330 T update_hpo_dp_stream_allocation_table +ffffffff822d2350 T setup_hpo_dp_audio_output +ffffffff822d2390 T enable_hpo_dp_audio_packet +ffffffff822d23b0 T disable_hpo_dp_audio_packet +ffffffff822d2400 T can_use_hpo_dp_link_hwss +ffffffff822d2430 T get_hpo_dp_link_hwss +ffffffff822d2460 t set_hpo_dp_link_test_pattern +ffffffff822d24b0 t set_hpo_dp_lane_settings +ffffffff822d3000 T requires_fixed_vs_pe_retimer_hpo_link_hwss +ffffffff822d3040 T get_hpo_fixed_vs_pe_retimer_dp_link_hwss +ffffffff822d3070 t enable_hpo_fixed_vs_pe_retimer_dp_link_output +ffffffff822d30d0 t set_hpo_fixed_vs_pe_retimer_dp_link_test_pattern +ffffffff822d3450 t set_hpo_fixed_vs_pe_retimer_dp_lane_settings +ffffffff822d34d0 t dp_hpo_fixed_vs_pe_retimer_set_tx_ffe +ffffffff822d4000 T link_reset_cur_dp_mst_topology +ffffffff822d4060 T link_detect_connection_type +ffffffff822d4180 T link_detect +ffffffff822d5a40 T link_clear_dprx_states +ffffffff822d5a70 T link_is_hdcp14 +ffffffff822d5ad0 T link_is_hdcp22 +ffffffff822d5b40 T link_get_status +ffffffff822d5b70 T link_add_remote_sink +ffffffff822d5d10 T link_remove_remote_sink +ffffffff822d5df0 t wait_for_entering_dp_alt_mode +ffffffff822d6000 T link_blank_all_dp_displays +ffffffff822d60d0 T link_blank_dp_stream +ffffffff822d61e0 T link_blank_all_edp_displays +ffffffff822d62a0 T link_set_all_streams_dpms_off_for_link +ffffffff822d63a0 T link_get_master_pipes_with_dpms_on +ffffffff822d6560 T link_resume +ffffffff822d65a0 T link_set_dsc_on_stream +ffffffff822d6a40 T link_set_dsc_pps_packet +ffffffff822d6dd0 T link_set_dsc_enable +ffffffff822d6e70 T link_update_dsc_config +ffffffff822d6ee0 T link_calculate_sst_avg_time_slots_per_mtp +ffffffff822d6f50 T link_reduce_mst_payload +ffffffff822d7370 t update_mst_stream_alloc_table +ffffffff822d75f0 T link_increase_mst_payload +ffffffff822d7a00 T link_set_dpms_off +ffffffff822d85b0 t update_psp_stream_config +ffffffff822d87b0 t update_sst_payload +ffffffff822d8df0 t get_ext_hdmi_settings +ffffffff822d9040 t write_i2c_retimer_setting +ffffffff822d9690 t write_i2c_default_retimer_setting +ffffffff822d9b80 t write_i2c_redriver_setting +ffffffff822d9ca0 t disable_link +ffffffff822d9e10 T link_set_dpms_on +ffffffff822da850 t enable_stream_features +ffffffff822da910 t allocate_usb4_bandwidth +ffffffff822da940 t allocate_mst_payload +ffffffff822dada0 t log_vcp_x_y +ffffffff822daf20 t write_i2c +ffffffff822dafb0 t enable_link_dp +ffffffff822dc000 T link_create_link_service +ffffffff822dc470 T link_destroy_link_service +ffffffff822dc4c0 T link_create +ffffffff822dd4e0 T link_destroy +ffffffff822de000 T link_get_cur_link_res +ffffffff822de150 T link_get_cur_res_map +ffffffff822de230 T link_restore_res_map +ffffffff822df000 T dp_link_bandwidth_kbps +ffffffff822df0a0 T link_validate_mode_timing +ffffffff822df680 t get_tmds_output_pixel_clock_100hz +ffffffff822df6f0 T link_validate_dpia_bandwidth +ffffffff822e0000 T link_create_ddc_service +ffffffff822e0170 T link_destroy_ddc_service +ffffffff822e0200 T set_ddc_transaction_type +ffffffff822e0230 T link_is_in_aux_transaction_mode +ffffffff822e0270 T set_dongle_type +ffffffff822e02a0 T link_get_aux_defer_delay +ffffffff822e03d0 T link_query_ddc_data +ffffffff822e0780 T link_aux_transfer_raw +ffffffff822e07b0 T link_get_fixed_vs_pe_retimer_write_address +ffffffff822e0840 T link_get_fixed_vs_pe_retimer_read_address +ffffffff822e08d0 T link_configure_fixed_vs_pe_retimer +ffffffff822e09a0 T link_aux_transfer_with_retries_no_mutex +ffffffff822e09b0 T link_query_fixed_vs_pe_retimer +ffffffff822e0a80 T try_to_configure_aux_timeout +ffffffff822e0b60 T get_ddc_pin +ffffffff822e0b90 T write_scdc_data +ffffffff822e0c80 T read_scdc_data +ffffffff822e1000 T is_dp_active_dongle +ffffffff822e1040 T is_dp_branch_device +ffffffff822e1070 T dp_parse_lttpr_repeater_count +ffffffff822e10f0 T link_bw_kbps_from_raw_frl_link_rate_data +ffffffff822e1130 T dp_is_fec_supported +ffffffff822e11e0 T dp_should_enable_fec +ffffffff822e12f0 T dp_is_128b_132b_signal +ffffffff822e13c0 T dp_is_lttpr_present +ffffffff822e1430 T decide_fallback_link_setting +ffffffff822e1700 T link_dp_get_encoding_format +ffffffff822e1750 t reduce_link_rate +ffffffff822e1810 T edp_decide_link_settings +ffffffff822e1940 T decide_edp_link_settings_with_dsc +ffffffff822e1d00 T link_decide_link_settings +ffffffff822e2130 T mst_decide_link_encoding_format +ffffffff822e21b0 T dp_overwrite_extended_receiver_cap +ffffffff822e22c0 t get_active_converter_info +ffffffff822e26f0 T dpcd_set_source_specific_data +ffffffff822e2830 T dpcd_write_cable_id_to_dprx +ffffffff822e28a0 T read_is_mst_supported +ffffffff822e2950 T dp_retrieve_lttpr_cap +ffffffff822e2b60 T detect_dp_sink_caps +ffffffff822e2b70 t retrieve_link_cap +ffffffff822e3c80 T detect_edp_sink_caps +ffffffff822e3fa0 T dp_get_max_link_enc_cap +ffffffff822e4090 T dp_get_verified_link_cap +ffffffff822e40e0 T dp_get_max_link_cap +ffffffff822e42d0 T dp_verify_link_cap_with_retries +ffffffff822e47a0 T dp_is_sink_present +ffffffff822e4a20 t intersect_frl_link_bw_support +ffffffff822e5000 T dpcd_get_tunneling_device_data +ffffffff822e50d0 T dpia_query_hpd_status +ffffffff822e6000 T link_dp_dpia_set_dptx_usb4_bw_alloc_support +ffffffff822e62e0 T dpia_handle_bw_alloc_response +ffffffff822e6580 T dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff822e6840 T link_dp_dpia_allocate_usb4_bandwidth_for_stream +ffffffff822e6ab0 T dpia_validate_usb4_bw +ffffffff822e6e90 t get_lowest_dpia_index +ffffffff822e7060 T link_dp_dpia_get_dp_overhead_in_dp_tunneling +ffffffff822e8000 T dp_parse_link_loss_status +ffffffff822e8130 T dp_handle_link_loss +ffffffff822e8240 T dp_read_hpd_rx_irq_data +ffffffff822e8370 T dp_should_allow_hpd_rx_irq +ffffffff822e83c0 T dp_handle_hpd_rx_irq +ffffffff822e9000 T dpcd_write_rx_power_ctrl +ffffffff822e9050 T dp_enable_link_phy +ffffffff822e90e0 T dp_disable_link_phy +ffffffff822e91b0 T dp_set_hw_lane_settings +ffffffff822e92a0 T dp_set_drive_settings +ffffffff822e9390 T dp_set_fec_ready +ffffffff822e9510 T dp_set_fec_enable +ffffffff822ea000 T dp_log_training_result +ffffffff822ea190 T dp_initialize_scrambling_data_symbols +ffffffff822ea230 T dp_training_pattern_to_dpcd_training_pattern +ffffffff822ea2b0 T dp_get_nibble_at_index +ffffffff822ea300 T dp_wait_for_training_aux_rd_interval +ffffffff822ea320 T dp_hw_to_dpcd_lane_settings +ffffffff822ea400 T get_dpcd_link_rate +ffffffff822ea470 T dp_translate_training_aux_read_interval +ffffffff822ea4b0 T dp_get_cr_failure +ffffffff822ea520 T is_repeater +ffffffff822ea560 T dp_is_max_vs_reached +ffffffff822ea5f0 T dp_is_cr_done +ffffffff822ea6c0 T dp_is_ch_eq_done +ffffffff822ea770 T dp_is_symbol_locked +ffffffff822ea820 T dp_is_interlane_aligned +ffffffff822ea850 T dp_check_link_loss_status +ffffffff822ea900 T dp_get_lane_status_and_lane_adjust +ffffffff822eaa50 T dp_get_lttpr_mode_override +ffffffff822eab10 T override_training_settings +ffffffff822eadd0 T decide_cr_training_pattern +ffffffff822eae10 T decide_eq_training_pattern +ffffffff822eaef0 T dp_decide_lttpr_mode +ffffffff822eaf90 T dp_decide_lane_settings +ffffffff822eb310 T dp_decide_training_settings +ffffffff822eb3a0 T configure_lttpr_mode_transparent +ffffffff822eb3f0 T dpcd_configure_lttpr_mode +ffffffff822eb5b0 T repeater_training_done +ffffffff822eb600 T dpcd_configure_channel_coding +ffffffff822eb660 T dpcd_set_training_pattern +ffffffff822eb710 T dpcd_set_link_settings +ffffffff822eb870 T dpcd_set_lane_settings +ffffffff822eb8b0 T dpcd_set_lt_pattern_and_lane_settings +ffffffff822ebaa0 T start_clock_recovery_pattern_early +ffffffff822ebb80 T dp_set_hw_training_pattern +ffffffff822ebc40 T dp_set_hw_test_pattern +ffffffff822ebce0 T dp_perform_link_training +ffffffff822ec570 T perform_link_training_with_retries +ffffffff822ed000 T dp_perform_128b_132b_link_training +ffffffff822ed3e0 T decide_128b_132b_training_settings +ffffffff822ed4e0 T dp_decide_128b_132b_lttpr_mode +ffffffff822ee000 T decide_8b_10b_training_settings +ffffffff822ee220 T dp_decide_8b_10b_lttpr_mode +ffffffff822ee2f0 T perform_8b_10b_clock_recovery_sequence +ffffffff822ee620 T perform_8b_10b_channel_equalization_sequence +ffffffff822ee8d0 T dp_perform_8b_10b_link_training +ffffffff822ef000 T dp_perform_link_training_skip_aux +ffffffff822f0000 T dpia_perform_link_training +ffffffff822f0f20 t dpia_training_end +ffffffff822f2000 T dp_fixed_vs_pe_read_lane_adjust +ffffffff822f2140 T dp_fixed_vs_pe_set_retimer_lane_settings +ffffffff822f22a0 T dp_perform_fixed_vs_pe_training_sequence_legacy +ffffffff822f2a10 t perform_fixed_vs_pe_nontransparent_training_sequence +ffffffff822f2bd0 T dp_perform_fixed_vs_pe_training_sequence +ffffffff822f4000 T core_link_read_dpcd +ffffffff822f41a0 T core_link_write_dpcd +ffffffff822f5000 T dp_set_panel_mode +ffffffff822f5120 T dp_get_panel_mode +ffffffff822f51e0 T edp_set_backlight_level_nits +ffffffff822f52e0 T edp_get_backlight_level_nits +ffffffff822f5370 T edp_backlight_enable_aux +ffffffff822f53e0 T set_default_brightness_aux +ffffffff822f54b0 T edp_is_ilr_optimization_enabled +ffffffff822f54f0 T get_max_link_rate_from_ilr_table +ffffffff822f55d0 T edp_is_ilr_optimization_required +ffffffff822f5770 T edp_panel_backlight_power_on +ffffffff822f5820 T edp_set_panel_power +ffffffff822f5920 T edp_wait_for_t12 +ffffffff822f5980 T edp_add_delay_for_T9 +ffffffff822f59d0 T edp_receiver_ready_T9 +ffffffff822f5a90 T edp_receiver_ready_T7 +ffffffff822f5c30 T edp_power_alpm_dpcd_enable +ffffffff822f5ca0 T edp_set_backlight_level +ffffffff822f5e10 T edp_set_psr_allow_active +ffffffff822f5ff0 T edp_get_psr_state +ffffffff822f60c0 T edp_setup_psr +ffffffff822f64b0 T edp_get_psr_residency +ffffffff822f6550 T edp_set_sink_vtotal_in_psr_active +ffffffff822f65d0 T edp_set_replay_allow_active +ffffffff822f66f0 T edp_get_replay_state +ffffffff822f67a0 T edp_setup_replay +ffffffff822f6990 T edp_set_coasting_vtotal +ffffffff822f6a40 T edp_replay_residency +ffffffff822f6b00 T edp_get_backlight_level +ffffffff822f6c60 T edp_get_target_backlight_pwm +ffffffff822f7000 T link_get_hpd_state +ffffffff822f7070 T link_enable_hpd +ffffffff822f70c0 T link_disable_hpd +ffffffff822f7110 T link_enable_hpd_filter +ffffffff822f7280 T program_hpd_filter +ffffffff822f7430 T link_get_hpd_gpio +ffffffff822f7510 T query_hpd_status +ffffffff822f7630 T get_hpd_line +ffffffff822f8000 T virtual_link_encoder_construct +ffffffff822f8060 t virtual_link_encoder_validate_output_with_stream +ffffffff822f8090 t virtual_link_encoder_hw_init +ffffffff822f80c0 t virtual_link_encoder_setup +ffffffff822f80f0 t virtual_link_encoder_enable_tmds_output +ffffffff822f8120 t virtual_link_encoder_enable_dp_output +ffffffff822f8150 t virtual_link_encoder_enable_dp_mst_output +ffffffff822f8180 t virtual_link_encoder_disable_output +ffffffff822f81b0 t virtual_link_encoder_dp_set_lane_settings +ffffffff822f81e0 t virtual_link_encoder_dp_set_phy_pattern +ffffffff822f8210 t virtual_link_encoder_update_mst_stream_allocation_table +ffffffff822f8240 t virtual_link_encoder_connect_dig_be_to_fe +ffffffff822f8270 t virtual_link_encoder_destroy +ffffffff822f82c0 t virtual_link_encoder_get_max_link_cap +ffffffff822f9000 T virtual_setup_stream_encoder +ffffffff822f9030 T virtual_setup_stream_attribute +ffffffff822f9060 T virtual_reset_stream_encoder +ffffffff822f9090 T get_virtual_link_hwss +ffffffff822f90c0 t virtual_disable_link_output +ffffffff822fa000 T virtual_stream_encoder_construct +ffffffff822fa050 T virtual_stream_encoder_create +ffffffff822fa110 t virtual_stream_encoder_dp_set_stream_attribute +ffffffff822fa140 t virtual_stream_encoder_hdmi_set_stream_attribute +ffffffff822fa170 t virtual_stream_encoder_dvi_set_stream_attribute +ffffffff822fa1a0 t virtual_stream_encoder_set_throttled_vcp_size +ffffffff822fa1d0 t virtual_stream_encoder_update_hdmi_info_packets +ffffffff822fa200 t virtual_stream_encoder_stop_hdmi_info_packets +ffffffff822fa230 t virtual_stream_encoder_update_dp_info_packets +ffffffff822fa260 t virtual_stream_encoder_stop_dp_info_packets +ffffffff822fa290 t virtual_stream_encoder_dp_blank +ffffffff822fa2c0 t virtual_stream_encoder_dp_unblank +ffffffff822fa2f0 t virtual_audio_mute_control +ffffffff822fa320 t virtual_setup_stereo_sync +ffffffff822fa350 t virtual_stream_encoder_set_avmute +ffffffff822fa380 t virtual_dig_connect_to_otg +ffffffff822fa3b0 t virtual_stream_encoder_reset_hdmi_stream_attribute +ffffffff822fa3e0 t virtual_stream_encoder_set_dsc_pps_info_packet +ffffffff822fa410 t virtual_enc_dp_set_odm_combine +ffffffff822fb000 T dmub_dcn20_use_cached_inbox +ffffffff822fb040 T dmub_dcn20_reset +ffffffff822fb210 T dmub_dcn20_reset_release +ffffffff822fb2e0 T dmub_dcn20_backdoor_load +ffffffff822fb590 T dmub_dcn20_setup_windows +ffffffff822fbaf0 T dmub_dcn20_setup_mailbox +ffffffff822fbb50 T dmub_dcn20_get_inbox1_wptr +ffffffff822fbb80 T dmub_dcn20_get_inbox1_rptr +ffffffff822fbbb0 T dmub_dcn20_set_inbox1_wptr +ffffffff822fbbe0 T dmub_dcn20_setup_out_mailbox +ffffffff822fbc40 T dmub_dcn20_get_outbox1_wptr +ffffffff822fbc70 T dmub_dcn20_set_outbox1_rptr +ffffffff822fbca0 T dmub_dcn20_setup_outbox0 +ffffffff822fbcf0 T dmub_dcn20_get_outbox0_wptr +ffffffff822fbd20 T dmub_dcn20_set_outbox0_rptr +ffffffff822fbd50 T dmub_dcn20_is_hw_init +ffffffff822fbdb0 T dmub_dcn20_is_supported +ffffffff822fbe10 T dmub_dcn20_set_gpint +ffffffff822fbe40 T dmub_dcn20_is_gpint_acked +ffffffff822fbea0 T dmub_dcn20_get_gpint_response +ffffffff822fbed0 T dmub_dcn20_get_fw_boot_status +ffffffff822fbf00 T dmub_dcn20_enable_dmub_boot_options +ffffffff822fbf30 T dmub_dcn20_skip_dmub_panel_power_sequence +ffffffff822fbf90 T dmub_dcn20_get_current_time +ffffffff822fbfc0 T dmub_dcn20_get_diagnostic_data +ffffffff822fd000 T dmub_dcn30_backdoor_load +ffffffff822fd270 T dmub_dcn30_setup_windows +ffffffff822fe000 T dmub_dcn31_reset +ffffffff822fe280 T dmub_dcn31_reset_release +ffffffff822fe350 T dmub_dcn31_backdoor_load +ffffffff822fe5c0 T dmub_dcn31_setup_windows +ffffffff822fe910 T dmub_dcn31_setup_mailbox +ffffffff822fe960 T dmub_dcn31_get_inbox1_wptr +ffffffff822fe990 T dmub_dcn31_get_inbox1_rptr +ffffffff822fe9c0 T dmub_dcn31_set_inbox1_wptr +ffffffff822fe9f0 T dmub_dcn31_setup_out_mailbox +ffffffff822fea40 T dmub_dcn31_get_outbox1_wptr +ffffffff822fea70 T dmub_dcn31_set_outbox1_rptr +ffffffff822feaa0 T dmub_dcn31_is_hw_init +ffffffff822feb20 T dmub_dcn31_is_supported +ffffffff822feb80 T dmub_dcn31_is_psrsu_supported +ffffffff822febb0 T dmub_dcn31_set_gpint +ffffffff822febe0 T dmub_dcn31_is_gpint_acked +ffffffff822fec40 T dmub_dcn31_get_gpint_response +ffffffff822fec70 T dmub_dcn31_get_gpint_dataout +ffffffff822fed90 T dmub_dcn31_get_fw_boot_status +ffffffff822fedc0 T dmub_dcn31_get_fw_boot_option +ffffffff822fedf0 T dmub_dcn31_enable_dmub_boot_options +ffffffff822fee70 T dmub_dcn31_skip_dmub_panel_power_sequence +ffffffff822feed0 T dmub_dcn31_setup_outbox0 +ffffffff822fef20 T dmub_dcn31_get_outbox0_wptr +ffffffff822fef50 T dmub_dcn31_set_outbox0_rptr +ffffffff822fef80 T dmub_dcn31_get_current_time +ffffffff822fefb0 T dmub_dcn31_get_diagnostic_data +ffffffff822ff460 T dmub_dcn31_should_detect +ffffffff82300000 T dmub_dcn314_is_psrsu_supported +ffffffff82301000 T dmub_dcn32_reset +ffffffff82301200 T dmub_dcn32_reset_release +ffffffff823012d0 T dmub_dcn32_backdoor_load +ffffffff82301540 T dmub_dcn32_backdoor_load_zfb_mode +ffffffff82301730 T dmub_dcn32_setup_windows +ffffffff82301a80 T dmub_dcn32_setup_mailbox +ffffffff82301ad0 T dmub_dcn32_get_inbox1_wptr +ffffffff82301b00 T dmub_dcn32_get_inbox1_rptr +ffffffff82301b30 T dmub_dcn32_set_inbox1_wptr +ffffffff82301b60 T dmub_dcn32_setup_out_mailbox +ffffffff82301bb0 T dmub_dcn32_get_outbox1_wptr +ffffffff82301be0 T dmub_dcn32_set_outbox1_rptr +ffffffff82301c10 T dmub_dcn32_is_hw_init +ffffffff82301c90 T dmub_dcn32_is_supported +ffffffff82301cf0 T dmub_dcn32_set_gpint +ffffffff82301d20 T dmub_dcn32_is_gpint_acked +ffffffff82301d80 T dmub_dcn32_get_gpint_response +ffffffff82301db0 T dmub_dcn32_get_gpint_dataout +ffffffff82301ed0 T dmub_dcn32_get_fw_boot_status +ffffffff82301f00 T dmub_dcn32_enable_dmub_boot_options +ffffffff82301f30 T dmub_dcn32_skip_dmub_panel_power_sequence +ffffffff82301f90 T dmub_dcn32_setup_outbox0 +ffffffff82301fe0 T dmub_dcn32_get_outbox0_wptr +ffffffff82302010 T dmub_dcn32_set_outbox0_rptr +ffffffff82302040 T dmub_dcn32_get_current_time +ffffffff82302070 T dmub_dcn32_get_diagnostic_data +ffffffff82302550 T dmub_dcn32_configure_dmub_in_system_memory +ffffffff82302580 T dmub_dcn32_send_inbox0_cmd +ffffffff823025b0 T dmub_dcn32_clear_inbox0_ack_register +ffffffff823025e0 T dmub_dcn32_read_inbox0_ack_register +ffffffff82303000 T dmub_reg_update +ffffffff82303150 T dmub_reg_set +ffffffff823032b0 T dmub_reg_get +ffffffff82304000 T dmub_flush_buffer_mem +ffffffff82304030 T dmub_srv_create +ffffffff823045b0 T dmub_srv_destroy +ffffffff823045d0 T dmub_srv_calc_region_info +ffffffff823049c0 T dmub_srv_calc_mem_info +ffffffff82304b80 T dmub_srv_has_hw_support +ffffffff82304bf0 T dmub_srv_is_hw_init +ffffffff82304c70 T dmub_srv_hw_init +ffffffff823050d0 T dmub_srv_sync_inbox1 +ffffffff82305180 T dmub_srv_hw_reset +ffffffff82305210 T dmub_srv_cmd_queue +ffffffff82305310 T dmub_srv_cmd_execute +ffffffff823053d0 T dmub_srv_wait_for_auto_load +ffffffff82305470 T dmub_srv_wait_for_idle +ffffffff82305520 T dmub_srv_send_gpint_command +ffffffff82305610 T dmub_srv_get_gpint_response +ffffffff82305670 T dmub_srv_get_gpint_dataout +ffffffff823056d0 T dmub_srv_get_fw_boot_status +ffffffff82305740 T dmub_srv_get_fw_boot_option +ffffffff823057b0 T dmub_srv_set_skip_panel_power_sequence +ffffffff82305810 T dmub_srv_cmd_with_reply_data +ffffffff82305a70 T dmub_srv_get_outbox0_msg +ffffffff82305b10 T dmub_srv_get_diagnostic_data +ffffffff82305b60 T dmub_srv_should_detect +ffffffff82305bb0 T dmub_srv_clear_inbox0_ack +ffffffff82305c00 T dmub_srv_wait_for_inbox0_ack +ffffffff82305cb0 T dmub_srv_send_inbox0_cmd +ffffffff82306000 T dmub_srv_stat_get_notification +ffffffff82307000 T setup_x_points_distribution +ffffffff82307170 T log_x_points_distribution +ffffffff823071a0 T precompute_pq +ffffffff82307370 t compute_pq +ffffffff82307570 T precompute_de_pq +ffffffff823076d0 t compute_de_pq +ffffffff82307990 T calculate_user_regamma_coeff +ffffffff82307d70 t apply_lut_1d +ffffffff823080a0 T calculate_user_regamma_ramp +ffffffff82308980 T mod_color_calculate_degamma_params +ffffffff823094d0 t build_evenly_distributed_points +ffffffff82309650 t scale_gamma +ffffffff82309800 t map_regamma_hw_to_x_user +ffffffff82309f20 T mod_color_calculate_regamma_params +ffffffff8230b840 t scale_gamma_dx +ffffffff8230bf20 t translate_from_linear_space +ffffffff8230c260 t build_coefficients +ffffffff8230c3e0 t calculate_mapped_value +ffffffff8230d000 T mod_color_is_table_init +ffffffff8230d050 T mod_color_get_table +ffffffff8230d0a0 T mod_color_set_table_init_state +ffffffff8230e000 T mod_freesync_create +ffffffff8230e070 T mod_freesync_destroy +ffffffff8230e0b0 T mod_freesync_calc_v_total_from_refresh +ffffffff8230e140 T mod_freesync_get_vmin_vmax +ffffffff8230e180 T mod_freesync_get_v_position +ffffffff8230e200 T mod_freesync_build_vrr_infopacket +ffffffff8230e900 T mod_freesync_build_vrr_params +ffffffff8230ecc0 T mod_freesync_calc_nominal_field_rate +ffffffff8230ed20 T mod_freesync_handle_preflip +ffffffff8230f150 T mod_freesync_handle_v_update +ffffffff8230f600 T mod_freesync_get_settings +ffffffff8230f670 T mod_freesync_calc_field_rate_from_timing +ffffffff8230f6c0 T mod_freesync_get_freesync_enabled +ffffffff8230f6f0 T mod_freesync_is_valid_range +ffffffff82310000 T mod_hdcp_get_memory_size +ffffffff82310030 T mod_hdcp_setup +ffffffff823100b0 t reset_connection +ffffffff82310220 t push_error_status +ffffffff82310330 T mod_hdcp_teardown +ffffffff823103b0 T mod_hdcp_add_display +ffffffff82310660 t reset_authentication +ffffffff82310850 t set_state_id +ffffffff823108f0 T mod_hdcp_remove_display +ffffffff82310af0 T mod_hdcp_update_display +ffffffff82310e50 T mod_hdcp_query_display +ffffffff82310fa0 T mod_hdcp_reset_connection +ffffffff82311000 T mod_hdcp_process_event +ffffffff823117e0 T mod_hdcp_signal_type_to_operation_mode +ffffffff82312000 T mod_hdcp_execute_and_set +ffffffff823120b0 T mod_hdcp_hdcp1_execution +ffffffff82312300 t exchange_ksvs +ffffffff82312660 t computations_validate_rx_test_for_repeater +ffffffff82312930 t wait_for_ready +ffffffff82312be0 t read_ksv_list +ffffffff823131d0 T mod_hdcp_hdcp1_dp_execution +ffffffff82314000 T mod_hdcp_hdcp1_transition +ffffffff82314310 t set_state_id +ffffffff823143b0 T mod_hdcp_hdcp1_dp_transition +ffffffff82315000 T mod_hdcp_hdcp2_execution +ffffffff82315580 t locality_check +ffffffff823157b0 t enable_encryption +ffffffff823158a0 t verify_rx_id_list_and_send_ack +ffffffff823159a0 t send_stream_management +ffffffff82315a80 t validate_stream_ready +ffffffff82315ba0 T mod_hdcp_hdcp2_dp_execution +ffffffff823161a0 t check_hdcp2_capable +ffffffff82316200 t check_ake_cert_available +ffffffff82316270 t check_h_prime_available +ffffffff823162e0 t check_pairing_info_available +ffffffff82316350 t poll_l_prime_available +ffffffff82316580 t process_rxstatus +ffffffff82316700 t check_reauthentication_request +ffffffff82316750 t check_link_integrity_failure_dp +ffffffff82316790 t check_device_count +ffffffff82316830 t check_stream_ready_available +ffffffff82317000 T mod_hdcp_hdcp2_transition +ffffffff823177b0 t set_state_id +ffffffff82317850 T mod_hdcp_hdcp2_dp_transition +ffffffff82318000 T mod_hdcp_read_bksv +ffffffff82318080 T mod_hdcp_read_bcaps +ffffffff82318100 T mod_hdcp_read_bstatus +ffffffff82318180 T mod_hdcp_read_r0p +ffffffff82318200 T mod_hdcp_read_ksvlist +ffffffff82318350 T mod_hdcp_read_vp +ffffffff82318520 T mod_hdcp_read_binfo +ffffffff82318590 T mod_hdcp_write_aksv +ffffffff82318630 T mod_hdcp_write_ainfo +ffffffff823186d0 T mod_hdcp_write_an +ffffffff82318770 T mod_hdcp_read_hdcp2version +ffffffff823187e0 T mod_hdcp_read_rxcaps +ffffffff82318850 T mod_hdcp_read_rxstatus +ffffffff823188e0 T mod_hdcp_read_ake_cert +ffffffff823189b0 T mod_hdcp_read_h_prime +ffffffff82318a70 T mod_hdcp_read_pairing_info +ffffffff82318b10 T mod_hdcp_read_l_prime +ffffffff82318bd0 T mod_hdcp_read_rx_id_list +ffffffff82318d40 T mod_hdcp_read_stream_ready +ffffffff82318e00 T mod_hdcp_write_ake_init +ffffffff82318eb0 T mod_hdcp_write_no_stored_km +ffffffff82319080 T mod_hdcp_write_stored_km +ffffffff82319180 T mod_hdcp_write_lc_init +ffffffff82319230 T mod_hdcp_write_eks +ffffffff82319320 T mod_hdcp_write_repeater_auth_ack +ffffffff823193d0 T mod_hdcp_write_stream_manage +ffffffff823194c0 T mod_hdcp_write_content_type +ffffffff82319530 T mod_hdcp_clear_cp_irq_status +ffffffff8231a000 T mod_hdcp_dump_binary_message +ffffffff8231a0e0 T mod_hdcp_log_ddc_trace +ffffffff8231b080 T mod_hdcp_status_to_str +ffffffff8231b0c0 T mod_hdcp_state_id_to_str +ffffffff8231c000 T mod_hdcp_remove_display_from_topology +ffffffff8231c200 t remove_display_from_topology_v2 +ffffffff8231c3b0 T mod_hdcp_add_display_to_topology +ffffffff8231c570 t add_display_to_topology_v2 +ffffffff8231c6d0 T mod_hdcp_hdcp1_create_session +ffffffff8231c850 T mod_hdcp_hdcp1_destroy_session +ffffffff8231cac0 T mod_hdcp_hdcp1_validate_rx +ffffffff8231cbe0 T mod_hdcp_hdcp1_enable_encryption +ffffffff8231cd40 T mod_hdcp_hdcp1_validate_ksvlist_vp +ffffffff8231ce70 T mod_hdcp_hdcp1_enable_dp_stream_encryption +ffffffff8231cfb0 T mod_hdcp_hdcp1_link_maintenance +ffffffff8231d070 T mod_hdcp_hdcp2_create_session +ffffffff8231d1e0 T mod_hdcp_hdcp2_destroy_session +ffffffff8231d450 T mod_hdcp_hdcp2_prepare_ake_init +ffffffff8231d550 T mod_hdcp_hdcp2_validate_ake_cert +ffffffff8231d700 T mod_hdcp_hdcp2_validate_h_prime +ffffffff8231d880 T mod_hdcp_hdcp2_prepare_lc_init +ffffffff8231d980 T mod_hdcp_hdcp2_validate_l_prime +ffffffff8231daa0 T mod_hdcp_hdcp2_prepare_eks +ffffffff8231dbf0 T mod_hdcp_hdcp2_enable_encryption +ffffffff8231dd60 T mod_hdcp_hdcp2_validate_rx_id_list +ffffffff8231dee0 T mod_hdcp_hdcp2_enable_dp_stream_encryption +ffffffff8231e050 T mod_hdcp_hdcp2_prepare_stream_management +ffffffff8231e160 T mod_hdcp_hdcp2_validate_stream_ready +ffffffff8231f000 T mod_build_vsc_infopacket +ffffffff8231f260 T mod_build_hf_vsif_infopacket +ffffffff8231f3d0 T mod_build_adaptive_sync_infopacket +ffffffff8231f490 T mod_build_adaptive_sync_infopacket_v2 +ffffffff8231f500 T mod_build_adaptive_sync_infopacket_v1 +ffffffff82320000 T dmub_init_abm_config +ffffffff82320550 t fill_iram_v_2_3 +ffffffff823209f0 T dmcu_load_iram +ffffffff823211d0 T is_psr_su_specific_panel +ffffffff82321270 T mod_power_calc_psr_configs +ffffffff82321360 T init_replay_config +ffffffff823213b0 T mod_power_only_edp +ffffffff82321400 T psr_su_set_dsc_slice_height +ffffffff823214e0 T fill_custom_backlight_caps +ffffffff82322000 T mod_vmid_get_for_ptb +ffffffff82322220 T mod_vmid_reset +ffffffff823222e0 T mod_vmid_create +ffffffff82322420 T mod_vmid_destroy +ffffffff82323000 T amdgpu_dpm_get_sclk +ffffffff82323090 T amdgpu_dpm_get_mclk +ffffffff82323120 T amdgpu_dpm_set_powergating_by_smu +ffffffff82323200 T amdgpu_dpm_set_gfx_power_up_by_imu +ffffffff82323310 T amdgpu_dpm_baco_enter +ffffffff823233a0 T amdgpu_dpm_baco_exit +ffffffff82323430 T amdgpu_dpm_set_mp1_state +ffffffff823234d0 T amdgpu_dpm_is_baco_supported +ffffffff82323580 T amdgpu_dpm_mode2_reset +ffffffff82323610 T amdgpu_dpm_enable_gfx_features +ffffffff823236a0 T amdgpu_dpm_baco_reset +ffffffff82323750 T amdgpu_dpm_is_mode1_reset_supported +ffffffff823237c0 T amdgpu_dpm_mode1_reset +ffffffff82323840 T amdgpu_dpm_switch_power_profile +ffffffff823238f0 T amdgpu_dpm_set_xgmi_pstate +ffffffff82323990 T amdgpu_dpm_set_df_cstate +ffffffff82323a30 T amdgpu_dpm_allow_xgmi_power_down +ffffffff82323ab0 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff82323b40 T amdgpu_dpm_set_clockgating_by_smu +ffffffff82323be0 T amdgpu_dpm_smu_i2c_bus_access +ffffffff82323c80 T amdgpu_pm_acpi_event_handler +ffffffff82323d40 T amdgpu_dpm_read_sensor +ffffffff82323e00 T amdgpu_dpm_get_apu_thermal_limit +ffffffff82323ea0 T amdgpu_dpm_set_apu_thermal_limit +ffffffff82323f40 T amdgpu_dpm_compute_clocks +ffffffff82324040 T amdgpu_dpm_enable_uvd +ffffffff82324230 T amdgpu_dpm_enable_vce +ffffffff82324420 T amdgpu_dpm_enable_jpeg +ffffffff82324520 T amdgpu_pm_load_smu_firmware +ffffffff823245d0 T amdgpu_dpm_handle_passthrough_sbr +ffffffff82324650 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff823246d0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff82324750 T amdgpu_dpm_get_dpm_freq_range +ffffffff823247f0 T amdgpu_dpm_set_soft_freq_range +ffffffff82324890 T amdgpu_dpm_write_watermarks_table +ffffffff82324910 T amdgpu_dpm_wait_for_event +ffffffff823249a0 T amdgpu_dpm_set_residency_gfxoff +ffffffff82324a20 T amdgpu_dpm_get_residency_gfxoff +ffffffff82324aa0 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff82324b20 T amdgpu_dpm_get_status_gfxoff +ffffffff82324ba0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff82324bf0 T amdgpu_dpm_gfx_state_change +ffffffff82324c60 T amdgpu_dpm_get_ecc_info +ffffffff82324ce0 T amdgpu_dpm_get_vce_clock_state +ffffffff82324d70 T amdgpu_dpm_get_current_power_state +ffffffff82324de0 T amdgpu_dpm_set_power_state +ffffffff82324f40 T amdgpu_dpm_dispatch_task +ffffffff82324fe0 T amdgpu_dpm_get_performance_level +ffffffff82325070 T amdgpu_dpm_force_performance_level +ffffffff82325250 T amdgpu_dpm_get_pp_num_states +ffffffff823252e0 T amdgpu_dpm_get_pp_table +ffffffff82325370 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff82325410 T amdgpu_dpm_odn_edit_dpm_table +ffffffff823254b0 T amdgpu_dpm_print_clock_levels +ffffffff82325540 T amdgpu_dpm_emit_clock_levels +ffffffff823255e0 T amdgpu_dpm_set_ppfeature_status +ffffffff82325670 T amdgpu_dpm_get_ppfeature_status +ffffffff82325700 T amdgpu_dpm_force_clock_level +ffffffff82325790 T amdgpu_dpm_get_sclk_od +ffffffff82325810 T amdgpu_dpm_set_sclk_od +ffffffff82325990 T amdgpu_dpm_get_mclk_od +ffffffff82325a10 T amdgpu_dpm_set_mclk_od +ffffffff82325b90 T amdgpu_dpm_get_power_profile_mode +ffffffff82325c20 T amdgpu_dpm_set_power_profile_mode +ffffffff82325cc0 T amdgpu_dpm_get_gpu_metrics +ffffffff82325d50 T amdgpu_dpm_get_fan_control_mode +ffffffff82325de0 T amdgpu_dpm_set_fan_speed_pwm +ffffffff82325e70 T amdgpu_dpm_get_fan_speed_pwm +ffffffff82325f00 T amdgpu_dpm_get_fan_speed_rpm +ffffffff82325f90 T amdgpu_dpm_set_fan_speed_rpm +ffffffff82326020 T amdgpu_dpm_set_fan_control_mode +ffffffff823260b0 T amdgpu_dpm_get_power_limit +ffffffff82326160 T amdgpu_dpm_set_power_limit +ffffffff823261f0 T amdgpu_dpm_is_cclk_dpm_supported +ffffffff82326260 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff823262f0 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff82326390 T amdgpu_dpm_is_overdrive_supported +ffffffff82326400 T amdgpu_dpm_set_pp_table +ffffffff823264a0 T amdgpu_dpm_get_num_cpu_cores +ffffffff823264f0 T amdgpu_dpm_stb_debug_fs_init +ffffffff82326540 T amdgpu_dpm_display_configuration_change +ffffffff823265d0 T amdgpu_dpm_get_clock_by_type +ffffffff82326670 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff82326700 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff823267a0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff82326840 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff823268d0 T amdgpu_dpm_display_clock_voltage_request +ffffffff82326960 T amdgpu_dpm_get_current_clocks +ffffffff823269f0 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff82326a70 T amdgpu_dpm_set_active_display_count +ffffffff82326b00 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff82326b90 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff82326c30 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff82326cd0 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff82326d60 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff82326df0 T amdgpu_dpm_get_uclk_dpm_states +ffffffff82326e90 T amdgpu_dpm_get_dpm_clock_table +ffffffff82327000 T amdgpu_dpm_get_active_displays +ffffffff823270a0 T amdgpu_dpm_get_vblank_time +ffffffff82327150 T amdgpu_dpm_get_vrefresh +ffffffff82328000 T amdgpu_pm_sysfs_init +ffffffff82328030 T amdgpu_pm_sysfs_fini +ffffffff82328060 T amdgpu_debugfs_pm_init +ffffffff82329000 T amdgpu_dpm_print_class_info +ffffffff823292b0 T amdgpu_dpm_print_cap_info +ffffffff82329340 T amdgpu_dpm_print_ps_status +ffffffff823293d0 T amdgpu_pm_print_power_states +ffffffff82329460 T amdgpu_get_platform_caps +ffffffff82329500 T amdgpu_parse_extended_power_table +ffffffff8232a290 t amdgpu_parse_clk_voltage_dep_table +ffffffff8232a340 T amdgpu_free_extended_power_table +ffffffff8232a450 T amdgpu_add_thermal_controller +ffffffff8232a8a0 T amdgpu_get_vce_clock_state +ffffffff8232a8e0 T amdgpu_legacy_dpm_compute_clocks +ffffffff8232ad70 T amdgpu_dpm_thermal_work_handler +ffffffff8232b000 t pp_early_init +ffffffff8232b100 t pp_late_init +ffffffff8232b220 t pp_sw_init +ffffffff8232b2b0 t pp_sw_fini +ffffffff8232b300 t pp_hw_init +ffffffff8232b360 t pp_hw_fini +ffffffff8232b3d0 t pp_late_fini +ffffffff8232b430 t pp_suspend +ffffffff8232b480 t pp_resume +ffffffff8232b4a0 t pp_is_idle +ffffffff8232b4d0 t pp_wait_for_idle +ffffffff8232b500 t pp_sw_reset +ffffffff8232b530 t pp_set_clockgating_state +ffffffff8232b560 t pp_set_powergating_state +ffffffff8232b590 t pp_dpm_set_fan_control_mode +ffffffff8232b600 t pp_dpm_get_fan_control_mode +ffffffff8232b670 t pp_dpm_set_fan_speed_pwm +ffffffff8232b6d0 t pp_dpm_get_fan_speed_pwm +ffffffff8232b730 t pp_dpm_force_clock_level +ffffffff8232b790 t pp_dpm_print_clock_levels +ffffffff8232b7f0 t pp_dpm_emit_clock_levels +ffffffff8232b850 t pp_dpm_force_performance_level +ffffffff8232b8f0 t pp_dpm_get_sclk_od +ffffffff8232b950 t pp_dpm_set_sclk_od +ffffffff8232b9b0 t pp_dpm_get_mclk_od +ffffffff8232ba10 t pp_dpm_set_mclk_od +ffffffff8232ba70 t pp_dpm_read_sensor +ffffffff8232bb30 t pp_dpm_get_performance_level +ffffffff8232bb70 t pp_dpm_get_current_power_state +ffffffff8232bbf0 t pp_dpm_get_fan_speed_rpm +ffffffff8232bc50 t pp_dpm_set_fan_speed_rpm +ffffffff8232bcb0 t pp_dpm_get_pp_num_states +ffffffff8232bdf0 t pp_dpm_get_pp_table +ffffffff8232be40 t pp_dpm_set_pp_table +ffffffff8232bf70 t pp_dpm_switch_power_profile +ffffffff8232c0b0 t pp_dpm_get_vce_clock_state +ffffffff8232c100 t pp_dpm_dispatch_tasks +ffffffff8232c140 t pp_dpm_load_fw +ffffffff8232c1b0 t pp_dpm_fw_loading_complete +ffffffff8232c1e0 t pp_set_powergating_by_smu +ffffffff8232c360 t pp_set_clockgating_by_smu +ffffffff8232c3d0 t pp_set_power_limit +ffffffff8232c490 t pp_get_power_limit +ffffffff8232c530 t pp_get_power_profile_mode +ffffffff8232c590 t pp_set_power_profile_mode +ffffffff8232c5f0 t pp_set_fine_grain_clk_vol +ffffffff8232c650 t pp_odn_edit_dpm_table +ffffffff8232c6b0 t pp_dpm_set_mp1_state +ffffffff8232c710 t pp_smu_i2c_bus_access +ffffffff8232c770 t pp_gfx_state_change_set +ffffffff8232c7d0 t pp_dpm_get_sclk +ffffffff8232c820 t pp_dpm_get_mclk +ffffffff8232c870 t pp_display_configuration_change +ffffffff8232c8c0 t pp_get_display_power_level +ffffffff8232c900 t pp_get_current_clocks +ffffffff8232ca20 t pp_get_clock_by_type +ffffffff8232ca70 t pp_get_clock_by_type_with_latency +ffffffff8232cac0 t pp_get_clock_by_type_with_voltage +ffffffff8232cb10 t pp_set_watermarks_for_clocks_ranges +ffffffff8232cb50 t pp_display_clock_voltage_request +ffffffff8232cb90 t pp_get_display_mode_validation_clocks +ffffffff8232cbf0 t pp_notify_smu_enable_pwe +ffffffff8232cc50 t pp_enable_mgpu_fan_boost +ffffffff8232ccb0 t pp_set_active_display_count +ffffffff8232ccf0 t pp_set_hard_min_dcefclk_by_freq +ffffffff8232cd50 t pp_set_hard_min_fclk_by_freq +ffffffff8232cdb0 t pp_set_min_deep_sleep_dcefclk +ffffffff8232ce10 t pp_get_asic_baco_capability +ffffffff8232ce80 t pp_get_asic_baco_state +ffffffff8232cee0 t pp_set_asic_baco_state +ffffffff8232cf50 t pp_get_ppfeature_status +ffffffff8232cfb0 t pp_set_ppfeature_status +ffffffff8232d000 t pp_asic_reset_mode_2 +ffffffff8232d060 t pp_set_df_cstate +ffffffff8232d0c0 t pp_set_xgmi_pstate +ffffffff8232d120 t pp_get_gpu_metrics +ffffffff8232d180 t pp_get_prv_buffer_details +ffffffff8232d200 t pp_pm_compute_clocks +ffffffff8232d2c0 t pp_swctf_delayed_work_handler +ffffffff8232d410 t __delayed_work_tick +ffffffff8232e000 T ci_baco_set_state +ffffffff8232f000 T baco_program_registers +ffffffff8232f0d0 t baco_cmd_handler +ffffffff8232f250 T soc15_baco_program_registers +ffffffff82330000 T fiji_baco_set_state +ffffffff82331000 T phm_setup_asic +ffffffff82331050 T phm_power_down_asic +ffffffff823310a0 T phm_set_power_state +ffffffff82331110 T phm_enable_dynamic_state_management +ffffffff823311c0 T phm_disable_dynamic_state_management +ffffffff82331260 T phm_force_dpm_levels +ffffffff823312b0 T phm_apply_state_adjust_rules +ffffffff82331300 T phm_apply_clock_adjust_rules +ffffffff82331350 T phm_powerdown_uvd +ffffffff823313a0 T phm_disable_clock_power_gatings +ffffffff823313f0 T phm_pre_display_configuration_changed +ffffffff82331450 T phm_display_configuration_changed +ffffffff823314b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff82331510 T phm_stop_thermal_controller +ffffffff82331570 T phm_register_irq_handlers +ffffffff823315c0 T phm_start_thermal_controller +ffffffff82331710 T phm_check_smc_update_required_for_display_configuration +ffffffff82331770 T phm_check_states_equal +ffffffff823317c0 T phm_store_dal_configuration_data +ffffffff82331910 T phm_get_dal_power_level +ffffffff82331970 T phm_set_cpu_power_state +ffffffff823319c0 T phm_get_performance_level +ffffffff82331a20 T phm_get_clock_info +ffffffff82331b90 T phm_get_current_shallow_sleep_clocks +ffffffff82331be0 T phm_get_clock_by_type +ffffffff82331c30 T phm_get_clock_by_type_with_latency +ffffffff82331c80 T phm_get_clock_by_type_with_voltage +ffffffff82331cd0 T phm_set_watermarks_for_clocks_ranges +ffffffff82331d20 T phm_display_clock_voltage_request +ffffffff82331d70 T phm_get_max_high_clocks +ffffffff82331dc0 T phm_disable_smc_firmware_ctf +ffffffff82331e20 T phm_set_active_display_count +ffffffff82332000 T hwmgr_early_init +ffffffff82332460 t polaris_set_asic_special_caps +ffffffff823324e0 T hwmgr_sw_init +ffffffff82332550 T hwmgr_sw_fini +ffffffff823325a0 T hwmgr_hw_init +ffffffff82332760 T hwmgr_hw_fini +ffffffff82332820 T hwmgr_suspend +ffffffff823328a0 T hwmgr_resume +ffffffff82332940 T hwmgr_handle_task +ffffffff82333000 T polaris_baco_set_state +ffffffff82334000 T pp_override_get_default_fuse_value +ffffffff82335000 T psm_init_power_state_table +ffffffff823352a0 T psm_fini_power_state_table +ffffffff82335360 T psm_set_boot_states +ffffffff82335410 T psm_set_performance_states +ffffffff823354c0 T psm_set_user_performance_state +ffffffff82335550 T psm_adjust_power_state_dynamic +ffffffff82336000 T atomctrl_initialize_mc_reg_table +ffffffff82336210 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff82336420 T atomctrl_set_engine_dram_timings_rv770 +ffffffff82336490 T atomctrl_get_memory_pll_dividers_si +ffffffff82336570 T atomctrl_get_memory_pll_dividers_vi +ffffffff823365f0 T atomctrl_get_memory_pll_dividers_ai +ffffffff823366a0 T atomctrl_get_engine_pll_dividers_kong +ffffffff82336720 T atomctrl_get_engine_pll_dividers_vi +ffffffff823367f0 T atomctrl_get_engine_pll_dividers_ai +ffffffff823368d0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff82336990 T atomctrl_get_reference_clock +ffffffff823369f0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff82336ab0 T atomctrl_get_voltage_table_v3 +ffffffff82336c10 T atomctrl_get_pp_assign_pin +ffffffff82336cf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff823370c0 t GetScaledFraction +ffffffff82337150 t fDecodeLeakageID +ffffffff823371b0 t fSqrt +ffffffff82337230 T atomctrl_get_voltage_evv_on_sclk +ffffffff823372b0 T atomctrl_get_voltage_evv +ffffffff82337360 T atomctrl_get_mpll_reference_clock +ffffffff823373d0 T atomctrl_is_asic_internal_ss_supported +ffffffff82337420 T atomctrl_get_memory_clock_spread_spectrum +ffffffff82337520 T atomctrl_get_engine_clock_spread_spectrum +ffffffff82337620 T atomctrl_read_efuse +ffffffff823376d0 T atomctrl_set_ac_timing_ai +ffffffff82337730 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff823377b0 T atomctrl_get_smc_sclk_range_table +ffffffff82337860 T atomctrl_get_vddc_shared_railinfo +ffffffff823378d0 T atomctrl_get_avfs_information +ffffffff82337a60 T atomctrl_get_svi2_info +ffffffff82337b40 T atomctrl_get_leakage_id_from_efuse +ffffffff82337ba0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff82337d40 T atomctrl_get_voltage_range +ffffffff82337e00 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff82337e80 T atomctrl_get_edc_leakage_table +ffffffff82338000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff823380c0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff82338280 T pp_atomfwctrl_get_pp_assign_pin +ffffffff82338360 T pp_atomfwctrl_enter_self_refresh +ffffffff82338390 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff82338440 T pp_atomfwctrl_get_avfs_information +ffffffff82338780 T pp_atomfwctrl_get_gpio_information +ffffffff82338820 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff823388b0 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff82338c30 T pp_atomfwctrl_get_smc_dpm_information +ffffffff82339000 T encode_pcie_lane_width +ffffffff82339030 T decode_pcie_lane_width +ffffffff8233a000 t pp_tables_v1_0_initialize +ffffffff8233b450 t pp_tables_v1_0_uninitialize +ffffffff8233b600 T get_number_of_powerplay_table_entries_v1_0 +ffffffff8233b6b0 T get_powerplay_table_entry_v1_0 +ffffffff8233c000 T pp_tables_get_response_times +ffffffff8233c0d0 T pp_tables_get_num_of_entries +ffffffff8233c190 T pp_tables_get_entry +ffffffff8233c4a0 t init_non_clock_fields +ffffffff8233c5e0 t pp_tables_initialize +ffffffff8233d760 t pp_tables_uninitialize +ffffffff8233d960 t get_number_of_vce_state_table_entries +ffffffff8233da50 t get_vce_state_table_entry +ffffffff8233e000 T smu10_init_function_pointers +ffffffff8233e040 t smu10_hwmgr_backend_init +ffffffff8233e6e0 t smu10_hwmgr_backend_fini +ffffffff8233e820 t smu10_setup_asic_task +ffffffff8233e890 t smu10_get_power_state_size +ffffffff8233e8c0 t smu10_apply_state_adjust_rules +ffffffff8233e8f0 t smu10_dpm_force_dpm_level +ffffffff8233ee70 t smu10_enable_dpm_tasks +ffffffff8233ef30 t smu10_disable_dpm_tasks +ffffffff8233ef60 t smu10_dpm_patch_boot_state +ffffffff8233ef90 t smu10_dpm_get_pp_table_entry +ffffffff8233eff0 t smu10_dpm_get_num_of_pp_table_entries +ffffffff8233f040 t smu10_powergate_vcn +ffffffff8233f0e0 t smu10_dpm_get_mclk +ffffffff8233f140 t smu10_dpm_get_sclk +ffffffff8233f190 t smu10_set_power_state_tasks +ffffffff8233f200 t smu10_set_cpu_power_state +ffffffff8233f230 t smu10_store_cc6_data +ffffffff8233f2a0 t smu10_get_dal_power_level +ffffffff8233f2d0 t smu10_get_performance_level +ffffffff8233f370 t smu10_get_current_shallow_sleep_clocks +ffffffff8233f3d0 t smu10_get_clock_by_type_with_latency +ffffffff8233f520 t smu10_get_clock_by_type_with_voltage +ffffffff8233f630 t smu10_set_watermarks_for_clocks_ranges +ffffffff8233f700 t smu10_display_clock_voltage_request +ffffffff8233f7a0 t smu10_get_max_high_clocks +ffffffff8233f7d0 t smu10_power_off_asic +ffffffff8233f820 t smu10_force_clock_level +ffffffff8233f9e0 t smu10_print_clock_levels +ffffffff8233fdd0 t smu10_gfx_off_control +ffffffff8233fee0 t smu10_read_sensor +ffffffff82340070 t smu10_set_active_display_count +ffffffff823400d0 t smu10_set_min_deep_sleep_dcefclk +ffffffff82340130 t smu10_get_power_profile_mode +ffffffff82340170 t smu10_set_power_profile_mode +ffffffff823402a0 t smu10_set_fine_grain_clk_vol +ffffffff823404b0 t smu10_powergate_mmhub +ffffffff823404d0 t smu10_smus_notify_pwe +ffffffff823404f0 t smu10_powergate_sdma +ffffffff82340510 t smu10_set_hard_min_dcefclk_by_freq +ffffffff82340570 t smu10_set_hard_min_fclk_by_freq +ffffffff823405d0 t smu10_set_hard_min_gfxclk_by_freq +ffffffff82340630 t smu10_set_soft_max_gfxclk_by_freq +ffffffff82340690 t smu10_asic_reset +ffffffff823406b0 t smu10_gfx_state_change +ffffffff823406f0 t smu10_dpm_get_pp_table_entry_callback +ffffffff82341000 T smu7_baco_get_capability +ffffffff82341060 T smu7_baco_get_state +ffffffff823410b0 T smu7_baco_set_state +ffffffff82342000 T smu7_powerdown_uvd +ffffffff82342050 T smu7_disable_clock_power_gating +ffffffff823420e0 T smu7_powergate_uvd +ffffffff823421d0 T smu7_powergate_vce +ffffffff823422c0 T smu7_update_clock_gatings +ffffffff82342670 T smu7_powergate_gfx +ffffffff82343000 T smu7_get_sleep_divider_id_from_clock +ffffffff823430a0 T smu7_init_function_pointers +ffffffff82343100 t smu7_hwmgr_backend_init +ffffffff82344f80 t smu7_hwmgr_backend_fini +ffffffff82344ff0 t smu7_setup_asic_task +ffffffff82345360 t smu7_get_power_state_size +ffffffff82345390 t smu7_apply_state_adjust_rules +ffffffff82345830 t smu7_force_dpm_level +ffffffff82345d40 t smu7_enable_dpm_tasks +ffffffff823485d0 t smu7_disable_dpm_tasks +ffffffff82348c10 t smu7_dpm_patch_boot_state +ffffffff82348d50 t smu7_get_pp_table_entry +ffffffff82349150 t smu7_get_number_of_powerplay_table_entries +ffffffff823491c0 t smu7_dpm_get_mclk +ffffffff82349260 t smu7_dpm_get_sclk +ffffffff82349300 t smu7_set_power_state_tasks +ffffffff8234a020 t smu7_notify_smc_display_config_after_ps_adjustment +ffffffff8234a050 t smu7_display_configuration_changed_task +ffffffff8234a210 t smu7_set_max_fan_rpm_output +ffffffff8234a240 t smu7_set_max_fan_pwm_output +ffffffff8234a260 t smu7_set_fan_control_mode +ffffffff8234a2f0 t smu7_get_fan_control_mode +ffffffff8234a330 t smu7_register_irq_handlers +ffffffff8234a3e0 t smu7_check_smc_update_required_for_display_configuration +ffffffff8234a490 t smu7_check_states_equal +ffffffff8234a630 t smu7_get_performance_level +ffffffff8234a6c0 t smu7_get_clock_by_type +ffffffff8234a880 t smu7_get_clock_by_type_with_latency +ffffffff8234aa50 t smu7_set_watermarks_for_clocks_ranges +ffffffff8234ac70 t smu7_get_max_high_clocks +ffffffff8234acf0 t smu7_power_off_asic +ffffffff8234ad50 t smu7_force_clock_level +ffffffff8234ae60 t smu7_print_clock_levels +ffffffff8234b450 t smu7_get_sclk_od +ffffffff8234b4b0 t smu7_set_sclk_od +ffffffff8234b570 t smu7_get_mclk_od +ffffffff8234b5d0 t smu7_set_mclk_od +ffffffff8234b690 t smu7_read_sensor +ffffffff8234b8d0 t smu7_avfs_control +ffffffff8234b9a0 t smu7_notify_cac_buffer_info +ffffffff8234bb40 t smu7_get_thermal_temperature_range +ffffffff8234bbe0 t smu7_get_power_profile_mode +ffffffff8234bc20 t smu7_set_power_profile_mode +ffffffff8234be80 t smu7_odn_edit_dpm_table +ffffffff8234c030 t phm_add_voltage +ffffffff8234c140 t smu7_copy_and_switch_arb_sets +ffffffff8234c370 t smu7_check_dpm_table_updated +ffffffff8234c4d0 t smu7_odn_initial_default_setting +ffffffff8234c600 t smu7_set_dpm_event_sources +ffffffff8234c720 t smu7_get_pp_table_entry_callback_func_v0 +ffffffff8234cbe0 t smu7_get_pp_table_entry_callback_func_v1 +ffffffff8234d600 t smu7_get_gpu_power +ffffffff8234e000 T smu7_enable_didt_config +ffffffff8234e3c0 t smu7_program_pt_config_registers +ffffffff8234e590 t smu7_enable_didt +ffffffff8234e780 T smu7_disable_didt_config +ffffffff8234e850 T smu7_enable_smc_cac +ffffffff8234e8e0 T smu7_disable_smc_cac +ffffffff8234e970 T smu7_set_power_limit +ffffffff8234e9d0 T smu7_enable_power_containment +ffffffff8234eb60 T smu7_disable_power_containment +ffffffff8234ec80 T smu7_power_control_set_level +ffffffff8234f000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff8234f080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff8234f150 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff8234f200 T smu7_fan_ctrl_set_static_mode +ffffffff8234f330 T smu7_fan_ctrl_set_default_mode +ffffffff8234f410 T smu7_fan_ctrl_start_smc_fan_control +ffffffff8234f540 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff8234f560 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff8234f740 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff8234f930 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff8234fb10 T smu7_thermal_get_temperature +ffffffff8234fb70 T smu7_thermal_disable_alert +ffffffff8234fc10 T smu7_thermal_stop_thermal_controller +ffffffff8234fd90 T smu7_start_thermal_controller +ffffffff82350120 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff82351000 T smu8_init_function_pointers +ffffffff82351040 t smu8_hwmgr_backend_init +ffffffff82351520 t smu8_hwmgr_backend_fini +ffffffff823515a0 t smu8_setup_asic_task +ffffffff82351ac0 t smu8_get_power_state_size +ffffffff82351af0 t smu8_apply_state_adjust_rules +ffffffff82351c40 t smu8_dpm_force_dpm_level +ffffffff82351f20 t smu8_enable_dpm_tasks +ffffffff823520b0 t smu8_disable_dpm_tasks +ffffffff82352190 t smu8_dpm_patch_boot_state +ffffffff823521f0 t smu8_dpm_get_pp_table_entry +ffffffff82352250 t smu8_dpm_get_num_of_pp_table_entries +ffffffff823522a0 t smu8_dpm_powerdown_uvd +ffffffff823522f0 t smu8_dpm_powergate_vce +ffffffff823524c0 t smu8_dpm_powergate_uvd +ffffffff823526d0 t smu8_dpm_powergate_acp +ffffffff82352730 t smu8_dpm_get_mclk +ffffffff82352760 t smu8_dpm_get_sclk +ffffffff823527d0 t smu8_set_power_state_tasks +ffffffff82352ad0 t smu8_set_cpu_power_state +ffffffff82352b50 t smu8_store_cc6_data +ffffffff82352bd0 t smu8_get_dal_power_level +ffffffff82352c50 t smu8_get_performance_level +ffffffff82352d50 t smu8_get_current_shallow_sleep_clocks +ffffffff82352db0 t smu8_get_clock_by_type +ffffffff82352ef0 t smu8_get_max_high_clocks +ffffffff82352fb0 t smu8_power_off_asic +ffffffff82353030 t smu8_force_clock_level +ffffffff823530a0 t smu8_print_clock_levels +ffffffff82353280 t smu8_read_sensor +ffffffff82353590 t smu8_notify_cac_buffer_info +ffffffff82353640 t smu8_get_thermal_temperature_range +ffffffff823536c0 t smu8_dpm_get_pp_table_entry_callback +ffffffff82354000 T smu9_baco_get_capability +ffffffff823540e0 T smu9_baco_get_state +ffffffff82355000 T convert_to_vid +ffffffff82355050 T convert_to_vddc +ffffffff82355090 T phm_copy_clock_limits_array +ffffffff82355170 T phm_copy_overdrive_settings_limits_array +ffffffff82355250 T phm_set_field_to_u32 +ffffffff823552b0 T phm_wait_on_register +ffffffff823553a0 T phm_wait_on_indirect_register +ffffffff823554b0 T phm_wait_for_register_unequal +ffffffff82355580 T phm_wait_for_indirect_register_unequal +ffffffff82355680 T phm_cf_want_uvd_power_gating +ffffffff823556c0 T phm_cf_want_vce_power_gating +ffffffff82355700 T phm_trim_voltage_table +ffffffff82355820 T phm_get_svi2_mvdd_voltage_table +ffffffff823559a0 T phm_get_svi2_vddci_voltage_table +ffffffff82355b20 T phm_get_svi2_vdd_voltage_table +ffffffff82355bc0 T phm_trim_voltage_table_to_fit_state_table +ffffffff82355cb0 T phm_reset_single_dpm_table +ffffffff82355d10 T phm_setup_pcie_table_entry +ffffffff82355d50 T phm_get_dpm_level_enable_mask_value +ffffffff82355e30 T phm_get_voltage_index +ffffffff82355eb0 T phm_get_voltage_id +ffffffff82355f30 T phm_find_closest_vddci +ffffffff82355fa0 T phm_find_boot_level +ffffffff82356010 T phm_get_sclk_for_voltage_evv +ffffffff823560d0 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff823561e0 T phm_get_lowest_enabled_level +ffffffff82356220 T phm_apply_dal_min_voltage_request +ffffffff823562f0 T phm_get_voltage_evv_on_sclk +ffffffff823563a0 T phm_irq_process +ffffffff82356550 T smu9_register_irq_handlers +ffffffff82356600 T smu_atom_get_data_table +ffffffff82356670 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff82356770 T smu_set_watermarks_for_clocks_ranges +ffffffff82357000 T tonga_baco_set_state +ffffffff82358000 T vega10_baco_set_state +ffffffff82359000 T vega10_enable_disable_vce_dpm +ffffffff82359090 T vega10_hwmgr_init +ffffffff823590f0 t vega10_hwmgr_backend_init +ffffffff82359ef0 t vega10_hwmgr_backend_fini +ffffffff82359f60 t vega10_setup_asic_task +ffffffff8235a090 t vega10_get_power_state_size +ffffffff8235a0c0 t vega10_apply_state_adjust_rules +ffffffff8235a420 t vega10_dpm_force_dpm_level +ffffffff8235a880 t vega10_enable_dpm_tasks +ffffffff8235d650 t vega10_disable_dpm_tasks +ffffffff8235dc30 t vega10_patch_boot_state +ffffffff8235dc60 t vega10_get_pp_table_entry +ffffffff8235dcd0 t vega10_power_gate_vce +ffffffff8235dd70 t vega10_power_gate_uvd +ffffffff8235de10 t vega10_dpm_get_mclk +ffffffff8235deb0 t vega10_dpm_get_sclk +ffffffff8235df50 t vega10_set_power_state_tasks +ffffffff8235e8b0 t vega10_notify_smc_display_config_after_ps_adjustment +ffffffff8235ea60 t vega10_display_configuration_changed_task +ffffffff8235eb30 t vega10_set_fan_control_mode +ffffffff8235eba0 t vega10_get_fan_control_mode +ffffffff8235ebe0 t vega10_check_smc_update_required_for_display_configuration +ffffffff8235ec40 t vega10_check_states_equal +ffffffff8235eda0 t vega10_get_dal_power_level +ffffffff8235ede0 t vega10_get_performance_level +ffffffff8235ee70 t vega10_get_clock_by_type_with_latency +ffffffff8235f060 t vega10_get_clock_by_type_with_voltage +ffffffff8235f140 t vega10_set_watermarks_for_clocks_ranges +ffffffff8235f1a0 t vega10_display_clock_voltage_request +ffffffff8235f220 t vega10_power_off_asic +ffffffff8235f290 t vega10_force_clock_level +ffffffff8235f3c0 t vega10_emit_clock_levels +ffffffff8235f530 t vega10_print_clock_levels +ffffffff8235fcd0 t vega10_get_sclk_od +ffffffff8235fd40 t vega10_set_sclk_od +ffffffff8235fe40 t vega10_get_mclk_od +ffffffff8235feb0 t vega10_set_mclk_od +ffffffff8235ffa0 t vega10_read_sensor +ffffffff82360200 t vega10_avfs_enable +ffffffff823602c0 t vega10_notify_cac_buffer_info +ffffffff82360370 t vega10_get_thermal_temperature_range +ffffffff82360490 t vega10_get_power_profile_mode +ffffffff823604d0 t vega10_set_power_profile_mode +ffffffff823605f0 t vega10_odn_edit_dpm_table +ffffffff82360b60 t vega10_get_ppfeature_status +ffffffff82360be0 t vega10_set_ppfeature_status +ffffffff82360c80 t vega10_set_mp1_state +ffffffff82360cf0 t vega10_disable_power_features_for_compute_performance +ffffffff82360ee0 t vega10_upload_dpm_bootup_level +ffffffff82360ff0 t vega10_upload_dpm_max_level +ffffffff823610d0 t vega10_odn_initial_default_setting +ffffffff823612b0 t vega10_populate_all_graphic_levels +ffffffff823614c0 t vega10_populate_all_memory_levels +ffffffff82361620 t vega10_populate_single_gfx_level +ffffffff82361770 t vega10_populate_single_soc_level +ffffffff823618b0 t vega10_populate_single_memory_level +ffffffff82361a20 t vega10_get_pp_table_entry_callback_func +ffffffff82361c60 t vega10_odn_update_power_state +ffffffff82362000 T vega10_enable_didt_config +ffffffff82363870 T vega10_disable_didt_config +ffffffff82363ad0 T vega10_initialize_power_tune_defaults +ffffffff82363c10 T vega10_set_power_limit +ffffffff82363c60 T vega10_enable_power_containment +ffffffff82363d80 T vega10_disable_power_containment +ffffffff82363e50 T vega10_power_control_set_level +ffffffff82363eb0 t vega10_didt_set_mask +ffffffff82365000 t vega10_pp_tables_initialize +ffffffff82366690 t vega10_pp_tables_uninitialize +ffffffff82366840 T vega10_get_number_of_powerplay_table_entries +ffffffff823668f0 T vega10_get_powerplay_table_entry +ffffffff82366a60 T vega10_baco_set_cap +ffffffff82367000 T vega10_fan_ctrl_get_fan_speed_info +ffffffff82367080 T vega10_fan_ctrl_get_fan_speed_pwm +ffffffff823671b0 T vega10_fan_ctrl_get_fan_speed_rpm +ffffffff823672b0 T vega10_fan_ctrl_set_static_mode +ffffffff82367570 T vega10_fan_ctrl_set_default_mode +ffffffff82367790 T vega10_fan_ctrl_start_smc_fan_control +ffffffff82367850 T vega10_fan_ctrl_stop_smc_fan_control +ffffffff82367910 T vega10_fan_ctrl_set_fan_speed_pwm +ffffffff82367b50 T vega10_fan_ctrl_reset_fan_speed_to_default +ffffffff82367c10 T vega10_fan_ctrl_set_fan_speed_rpm +ffffffff82367df0 T vega10_thermal_get_temperature +ffffffff82367e80 T vega10_thermal_disable_alert +ffffffff82367f90 T vega10_thermal_stop_thermal_controller +ffffffff82367ff0 T vega10_enable_mgpu_fan_boost +ffffffff82368100 T vega10_start_thermal_controller +ffffffff823686c0 T vega10_thermal_ctrl_uninitialize_thermal_controller +ffffffff82369000 T vega12_baco_set_state +ffffffff8236a000 T vega12_enable_disable_vce_dpm +ffffffff8236a090 T vega12_hwmgr_init +ffffffff8236a0d0 t vega12_hwmgr_backend_init +ffffffff8236a900 t vega12_hwmgr_backend_fini +ffffffff8236a960 t vega12_setup_asic_task +ffffffff8236a9a0 t vega12_apply_clocks_adjust_rules +ffffffff8236ad60 t vega12_dpm_force_dpm_level +ffffffff8236b1a0 t vega12_enable_dpm_tasks +ffffffff8236bc70 t vega12_disable_dpm_tasks +ffffffff8236bd70 t vega12_patch_boot_state +ffffffff8236bda0 t vega12_power_gate_vce +ffffffff8236be50 t vega12_power_gate_uvd +ffffffff8236bf00 t vega12_dpm_get_mclk +ffffffff8236bf50 t vega12_dpm_get_sclk +ffffffff8236bfa0 t vega12_notify_smc_display_config_after_ps_adjustment +ffffffff8236c100 t vega12_pre_display_configuration_changed_task +ffffffff8236c1e0 t vega12_display_configuration_changed_task +ffffffff8236c2c0 t vega12_set_fan_control_mode +ffffffff8236c320 t vega12_get_fan_control_mode +ffffffff8236c360 t vega12_check_smc_update_required_for_display_configuration +ffffffff8236c3c0 t vega12_get_dal_power_level +ffffffff8236c3f0 t vega12_get_performance_level +ffffffff8236c420 t vega12_get_clock_by_type_with_latency +ffffffff8236c700 t vega12_get_clock_by_type_with_voltage +ffffffff8236c730 t vega12_set_watermarks_for_clocks_ranges +ffffffff8236c7b0 t vega12_display_clock_voltage_request +ffffffff8236c830 t vega12_power_off_asic +ffffffff8236c8a0 t vega12_force_clock_level +ffffffff8236cae0 t vega12_print_clock_levels +ffffffff8236d280 t vega12_gfx_off_control +ffffffff8236d2d0 t vega12_read_sensor +ffffffff8236d6b0 t vega12_notify_cac_buffer_info +ffffffff8236d760 t vega12_get_thermal_temperature_range +ffffffff8236d860 t vega12_get_ppfeature_status +ffffffff8236d8e0 t vega12_set_ppfeature_status +ffffffff8236d980 t vega12_set_mp1_state +ffffffff8236d9f0 t vega12_get_gpu_metrics +ffffffff8236dca0 t vega12_upload_dpm_min_level +ffffffff8236dee0 t vega12_upload_dpm_max_level +ffffffff8236e0b0 t vega12_populate_umdpstate_clocks +ffffffff8236e150 t vega12_setup_single_dpm_table +ffffffff8236f000 t vega12_pp_tables_initialize +ffffffff8236f610 t vega12_pp_tables_uninitialize +ffffffff82370000 T vega12_fan_ctrl_get_fan_speed_info +ffffffff82370050 T vega12_fan_ctrl_get_fan_speed_rpm +ffffffff823700c0 T vega12_fan_ctrl_start_smc_fan_control +ffffffff823700f0 T vega12_fan_ctrl_stop_smc_fan_control +ffffffff82370120 T vega12_fan_ctrl_reset_fan_speed_to_default +ffffffff82370150 T vega12_thermal_get_temperature +ffffffff823701e0 T vega12_thermal_disable_alert +ffffffff82370270 T vega12_thermal_stop_thermal_controller +ffffffff82370300 T vega12_start_thermal_controller +ffffffff82371000 T vega20_baco_get_capability +ffffffff823710c0 T vega20_baco_get_state +ffffffff82371160 T vega20_baco_set_state +ffffffff82371360 T vega20_baco_apply_vdci_flush_workaround +ffffffff82372000 T vega20_hwmgr_init +ffffffff82372040 t vega20_hwmgr_backend_init +ffffffff82372940 t vega20_hwmgr_backend_fini +ffffffff823729a0 t vega20_setup_asic_task +ffffffff82372a90 t vega20_apply_clocks_adjust_rules +ffffffff82372f40 t vega20_dpm_force_dpm_level +ffffffff823736c0 t vega20_enable_dpm_tasks +ffffffff82373b00 t vega20_disable_dpm_tasks +ffffffff82373ca0 t vega20_power_gate_vce +ffffffff82373dd0 t vega20_power_gate_uvd +ffffffff82373e80 t vega20_dpm_get_mclk +ffffffff82373f80 t vega20_dpm_get_sclk +ffffffff82374080 t vega20_notify_smc_display_config_after_ps_adjustment +ffffffff823741c0 t vega20_pre_display_configuration_changed_task +ffffffff82374320 t vega20_display_configuration_changed_task +ffffffff82374400 t vega20_set_fan_control_mode +ffffffff82374470 t vega20_get_fan_control_mode +ffffffff823744b0 t vega20_check_smc_update_required_for_display_configuration +ffffffff82374510 t vega20_get_dal_power_level +ffffffff82374540 t vega20_get_performance_level +ffffffff82374570 t vega20_get_clock_by_type_with_latency +ffffffff823748d0 t vega20_get_clock_by_type_with_voltage +ffffffff82374900 t vega20_set_watermarks_for_clocks_ranges +ffffffff82374980 t vega20_display_clock_voltage_request +ffffffff82374a00 t vega20_power_off_asic +ffffffff82374a70 t vega20_force_clock_level +ffffffff82375080 t vega20_print_clock_levels +ffffffff82375fb0 t vega20_get_sclk_od +ffffffff82376020 t vega20_set_sclk_od +ffffffff823761b0 t vega20_get_mclk_od +ffffffff82376220 t vega20_set_mclk_od +ffffffff823763b0 t vega20_read_sensor +ffffffff823768c0 t vega20_notify_cac_buffer_info +ffffffff82376970 t vega20_get_thermal_temperature_range +ffffffff82376a70 t vega20_get_power_profile_mode +ffffffff82376bc0 t vega20_set_power_profile_mode +ffffffff82376f60 t vega20_odn_edit_dpm_table +ffffffff823773f0 t vega20_enable_mgpu_fan_boost +ffffffff82377450 t vega20_get_ppfeature_status +ffffffff823774d0 t vega20_set_ppfeature_status +ffffffff823775d0 t vega20_set_mp1_state +ffffffff82377660 t vega20_smu_i2c_bus_access +ffffffff823776f0 t vega20_set_df_cstate +ffffffff82377760 t vega20_set_xgmi_pstate +ffffffff823777c0 t vega20_get_gpu_metrics +ffffffff82377a90 t vega20_upload_dpm_min_level +ffffffff82377d00 t vega20_upload_dpm_max_level +ffffffff82377f20 t vega20_enable_all_smu_features +ffffffff82378020 t vega20_override_pcie_parameters +ffffffff82378280 t vega20_setup_default_dpm_tables +ffffffff823787c0 t vega20_init_max_sustainable_clocks +ffffffff82378b70 t vega20_od8_initialize_default_settings +ffffffff823791f0 t vega20_populate_umdpstate_clocks +ffffffff82379290 t vega20_setup_single_dpm_table +ffffffff823793b0 t vega20_setup_memclk_dpm_table +ffffffff82379440 t vega20_get_max_sustainable_clock +ffffffff8237a000 T vega20_set_power_limit +ffffffff8237a050 T vega20_validate_power_level_request +ffffffff8237a090 T vega20_power_control_set_level +ffffffff8237b000 t vega20_pp_tables_initialize +ffffffff8237b760 t vega20_pp_tables_uninitialize +ffffffff8237c000 T vega20_fan_ctrl_stop_smc_fan_control +ffffffff8237c090 T vega20_fan_ctrl_start_smc_fan_control +ffffffff8237c120 T vega20_fan_ctrl_get_fan_speed_pwm +ffffffff8237c250 T vega20_fan_ctrl_set_fan_speed_pwm +ffffffff8237c450 t vega20_fan_ctrl_set_static_mode +ffffffff8237c610 T vega20_fan_ctrl_get_fan_speed_info +ffffffff8237c650 T vega20_fan_ctrl_get_fan_speed_rpm +ffffffff8237c6b0 T vega20_fan_ctrl_set_fan_speed_rpm +ffffffff8237c860 T vega20_thermal_get_temperature +ffffffff8237c8f0 T vega20_thermal_disable_alert +ffffffff8237c980 T vega20_thermal_stop_thermal_controller +ffffffff8237ca10 T vega20_start_thermal_controller +ffffffff8237d000 t ci_smu_init +ffffffff8237d060 t ci_smu_fini +ffffffff8237d0c0 t ci_start_smu +ffffffff8237d0f0 t ci_send_msg_to_smc +ffffffff8237d190 t ci_send_msg_to_smc_with_parameter +ffffffff8237d240 t ci_update_smc_table +ffffffff8237d490 t ci_process_firmware_header +ffffffff8237d9a0 t ci_update_sclk_threshold +ffffffff8237dc90 t ci_thermal_setup_fan_table +ffffffff8237df10 t ci_init_smc_table +ffffffff8237ebc0 t ci_populate_all_graphic_levels +ffffffff8237f040 t ci_populate_all_memory_levels +ffffffff8237f8d0 t ci_initialize_mc_reg_table +ffffffff82380460 t ci_get_offsetof +ffffffff823804b0 t ci_get_mac_definition +ffffffff823804f0 t ci_is_dpm_running +ffffffff82380570 t ci_update_dpm_settings +ffffffff82380960 t ci_stop_smc +ffffffff82380a20 t ci_copy_bytes_to_smc +ffffffff82380cf0 t ci_program_memory_timing_parameters +ffffffff82380eb0 t ci_populate_smc_acp_level +ffffffff82380fc0 t ci_populate_smc_uvd_level +ffffffff82381120 t ci_populate_smc_boot_level +ffffffff82381210 t ci_populate_smc_initial_state +ffffffff823812c0 t ci_populate_bapm_parameters_in_dpm_table +ffffffff82381450 t ci_populate_vr_config +ffffffff823814f0 t ci_populate_initial_mc_reg_table +ffffffff82381800 t ci_populate_pm_fuses +ffffffff82381e70 t ci_start_smc +ffffffff82381f40 t ci_populate_smc_voltage_table ffffffff82383000 t fiji_smu_init ffffffff82383090 t fiji_start_smu ffffffff82383580 t fiji_update_smc_table @@ -36072,8 +36072,8 @@ ffffffff82383880 t fiji_update_sclk_threshold ffffffff82383950 t fiji_thermal_setup_fan_table ffffffff82383bf0 t fiji_thermal_avfs_enable ffffffff82383c40 t fiji_init_smc_table -ffffffff823846e0 t fiji_populate_all_graphic_levels -ffffffff82384c80 t fiji_populate_all_memory_levels +ffffffff823846f0 t fiji_populate_all_graphic_levels +ffffffff82384c90 t fiji_populate_all_memory_levels ffffffff82385030 t fiji_initialize_mc_reg_table ffffffff823851b0 t fiji_get_offsetof ffffffff82385240 t fiji_get_mac_definition @@ -36084,35 +36084,35 @@ ffffffff82385750 t fiji_program_memory_timing_paramete ffffffff82385920 t fiji_populate_smc_acp_level ffffffff82385a60 t fiji_populate_smc_uvd_level ffffffff82385c10 t fiji_populate_smc_boot_level -ffffffff82385ce0 t fiji_populate_smc_initailial_state -ffffffff82385d90 t fiji_populate_bapm_parameters_in_dpm_table -ffffffff823860a0 t fiji_populate_clock_stretcher_data_table -ffffffff82386640 t fiji_populate_vr_config -ffffffff82386700 t fiji_init_arb_table_index -ffffffff82386780 t fiji_populate_pm_fuses -ffffffff823869e0 t fiji_setup_dpm_led_config -ffffffff82386ab0 t fiji_get_dependency_volt_by_clk +ffffffff82385cf0 t fiji_populate_smc_initailial_state +ffffffff82385da0 t fiji_populate_bapm_parameters_in_dpm_table +ffffffff82386080 t fiji_populate_clock_stretcher_data_table +ffffffff82386630 t fiji_populate_vr_config +ffffffff823866f0 t fiji_init_arb_table_index +ffffffff82386770 t fiji_populate_pm_fuses +ffffffff823869c0 t fiji_setup_dpm_led_config +ffffffff82386a90 t fiji_get_dependency_volt_by_clk ffffffff82387000 t iceland_smu_init ffffffff82387090 t iceland_start_smu ffffffff823873f0 t iceland_request_smu_load_specific_fw ffffffff82387420 t iceland_process_firmware_header ffffffff82387590 t iceland_update_sclk_threshold -ffffffff823877e0 t iceland_thermal_setup_fan_table -ffffffff82387a60 t iceland_init_smc_table -ffffffff823884b0 t iceland_populate_all_graphic_levels -ffffffff82388a40 t iceland_populate_all_memory_levels -ffffffff82389250 t iceland_initialize_mc_reg_table -ffffffff82389de0 t iceland_get_offsetof -ffffffff82389e60 t iceland_get_mac_definition -ffffffff82389ec0 t iceland_is_dpm_running -ffffffff82389f10 t iceland_program_memory_timing_parameters -ffffffff8238a0d0 t iceland_populate_smc_boot_level -ffffffff8238a1d0 t iceland_populate_smc_initial_state -ffffffff8238a280 t iceland_populate_bapm_parameters_in_dpm_table -ffffffff8238a3f0 t iceland_populate_smc_svi2_config -ffffffff8238a490 t iceland_populate_initial_mc_reg_table -ffffffff8238a6f0 t iceland_populate_pm_fuses -ffffffff8238aa20 t iceland_populate_smc_voltage_table +ffffffff82387890 t iceland_thermal_setup_fan_table +ffffffff82387b10 t iceland_init_smc_table +ffffffff82388540 t iceland_populate_all_graphic_levels +ffffffff82388ad0 t iceland_populate_all_memory_levels +ffffffff82389300 t iceland_initialize_mc_reg_table +ffffffff82389e90 t iceland_get_offsetof +ffffffff82389f10 t iceland_get_mac_definition +ffffffff82389f70 t iceland_is_dpm_running +ffffffff82389fc0 t iceland_program_memory_timing_parameters +ffffffff8238a180 t iceland_populate_smc_boot_level +ffffffff8238a280 t iceland_populate_smc_initial_state +ffffffff8238a330 t iceland_populate_bapm_parameters_in_dpm_table +ffffffff8238a4c0 t iceland_populate_smc_svi2_config +ffffffff8238a560 t iceland_populate_initial_mc_reg_table +ffffffff8238a870 t iceland_populate_pm_fuses +ffffffff8238ab80 t iceland_populate_smc_voltage_table ffffffff8238b000 t polaris10_smu_init ffffffff8238b090 t polaris10_start_smu ffffffff8238b640 t polaris10_update_smc_table @@ -36121,26 +36121,26 @@ ffffffff8238ba00 t polaris10_update_sclk_threshold ffffffff8238bae0 t polaris10_thermal_setup_fan_table ffffffff8238bd90 t polaris10_thermal_avfs_enable ffffffff8238be20 t polaris10_init_smc_table -ffffffff8238cce0 t polaris10_populate_all_graphic_levels -ffffffff8238d500 t polaris10_populate_all_memory_levels -ffffffff8238d840 t polaris10_initialize_mc_reg_table -ffffffff8238d8b0 t polaris10_get_offsetof -ffffffff8238d940 t polaris10_get_mac_definition -ffffffff8238d9a0 t polaris10_is_dpm_running -ffffffff8238d9f0 t polaris10_is_hw_avfs_present -ffffffff8238da40 t polaris10_update_dpm_settings -ffffffff8238de30 t polaris10_program_memory_timing_parameters -ffffffff8238e000 t polaris10_populate_smc_samu_level -ffffffff8238e190 t polaris10_populate_smc_uvd_level -ffffffff8238e3a0 t polaris10_populate_smc_boot_level -ffffffff8238e490 t polaris10_populate_smc_initailial_state -ffffffff8238e540 t polaris10_populate_bapm_parameters_in_dpm_table -ffffffff8238e6e0 t polaris10_populate_clock_stretcher_data_table -ffffffff8238e970 t polaris10_populate_avfs_parameters -ffffffff8238efd0 t polaris10_populate_vr_config -ffffffff8238f100 t polaris10_populate_pm_fuses -ffffffff8238f360 t polaris10_get_dependency_volt_by_clk -ffffffff8238f530 t polaris10_calculate_sclk_params +ffffffff8238ce10 t polaris10_populate_all_graphic_levels +ffffffff8238d570 t polaris10_populate_all_memory_levels +ffffffff8238d8b0 t polaris10_initialize_mc_reg_table +ffffffff8238d920 t polaris10_get_offsetof +ffffffff8238d9b0 t polaris10_get_mac_definition +ffffffff8238da10 t polaris10_is_dpm_running +ffffffff8238da60 t polaris10_is_hw_avfs_present +ffffffff8238dab0 t polaris10_update_dpm_settings +ffffffff8238dea0 t polaris10_program_memory_timing_parameters +ffffffff8238e070 t polaris10_populate_smc_samu_level +ffffffff8238e200 t polaris10_populate_smc_uvd_level +ffffffff8238e410 t polaris10_populate_smc_boot_level +ffffffff8238e510 t polaris10_populate_smc_initailial_state +ffffffff8238e5c0 t polaris10_populate_bapm_parameters_in_dpm_table +ffffffff8238e750 t polaris10_populate_clock_stretcher_data_table +ffffffff8238e9e0 t polaris10_populate_avfs_parameters +ffffffff8238f040 t polaris10_populate_vr_config +ffffffff8238f170 t polaris10_populate_pm_fuses +ffffffff8238f3c0 t polaris10_get_dependency_volt_by_clk +ffffffff8238f590 t polaris10_calculate_sclk_params ffffffff82390000 t smu10_smu_init ffffffff82390130 t smu10_smu_fini ffffffff823901c0 t smu10_start_smu @@ -36207,26 +36207,26 @@ ffffffff82397090 t tonga_start_smu ffffffff82397420 t tonga_update_smc_table ffffffff823975c0 t tonga_process_firmware_header ffffffff82397710 t tonga_update_sclk_threshold -ffffffff82397960 t tonga_thermal_setup_fan_table -ffffffff82397be0 t tonga_init_smc_table -ffffffff82398a30 t tonga_populate_all_graphic_levels -ffffffff82398fd0 t tonga_populate_all_memory_levels -ffffffff823996d0 t tonga_initialize_mc_reg_table -ffffffff8239a260 t tonga_get_offsetof -ffffffff8239a2f0 t tonga_get_mac_definition -ffffffff8239a350 t tonga_is_dpm_running -ffffffff8239a3a0 t tonga_update_dpm_settings -ffffffff8239a790 t tonga_program_memory_timing_parameters -ffffffff8239a950 t tonga_populate_smc_acp_level -ffffffff8239aad0 t tonga_populate_smc_uvd_level -ffffffff8239acc0 t tonga_populate_smc_boot_level -ffffffff8239adf0 t tonga_populate_bapm_parameters_in_dpm_table -ffffffff8239af50 t tonga_populate_clock_stretcher_data_table -ffffffff8239b610 t tonga_populate_vr_config -ffffffff8239b6e0 t tonga_init_arb_table_index -ffffffff8239b760 t tonga_populate_pm_fuses -ffffffff8239b990 t tonga_populate_initial_mc_reg_table -ffffffff8239bbf0 t tonga_get_dependency_volt_by_clk +ffffffff82397a10 t tonga_thermal_setup_fan_table +ffffffff82397c90 t tonga_init_smc_table +ffffffff82398ba0 t tonga_populate_all_graphic_levels +ffffffff82399140 t tonga_populate_all_memory_levels +ffffffff823997f0 t tonga_initialize_mc_reg_table +ffffffff8239a380 t tonga_get_offsetof +ffffffff8239a410 t tonga_get_mac_definition +ffffffff8239a470 t tonga_is_dpm_running +ffffffff8239a4c0 t tonga_update_dpm_settings +ffffffff8239a8b0 t tonga_program_memory_timing_parameters +ffffffff8239aa70 t tonga_populate_smc_acp_level +ffffffff8239abf0 t tonga_populate_smc_uvd_level +ffffffff8239ade0 t tonga_populate_smc_boot_level +ffffffff8239af10 t tonga_populate_bapm_parameters_in_dpm_table +ffffffff8239b060 t tonga_populate_clock_stretcher_data_table +ffffffff8239b730 t tonga_populate_vr_config +ffffffff8239b800 t tonga_init_arb_table_index +ffffffff8239b880 t tonga_populate_pm_fuses +ffffffff8239baa0 t tonga_populate_initial_mc_reg_table +ffffffff8239bdb0 t tonga_get_dependency_volt_by_clk ffffffff8239c000 T vega10_enable_smc_features ffffffff8239c040 T vega10_get_enabled_smc_features ffffffff8239c0a0 t vega10_smu_init @@ -36264,22 +36264,22 @@ ffffffff823a0900 t vegam_thermal_setup_fan_table ffffffff823a0960 t vegam_thermal_avfs_enable ffffffff823a09f0 t vegam_init_smc_table ffffffff823a16a0 t vegam_populate_all_graphic_levels -ffffffff823a1de0 t vegam_populate_all_memory_levels -ffffffff823a2100 t vegam_get_offsetof -ffffffff823a2190 t vegam_get_mac_definition -ffffffff823a21f0 t vegam_is_dpm_running -ffffffff823a2240 t vegam_is_hw_avfs_present -ffffffff823a2290 t vegam_program_memory_timing_parameters -ffffffff823a24c0 t vegam_populate_smc_uvd_level -ffffffff823a26d0 t vegam_populate_smc_boot_level -ffffffff823a27b0 t vegam_populate_smc_initial_state -ffffffff823a2860 t vegam_populate_bapm_parameters_in_dpm_table -ffffffff823a2a00 t vegam_populate_clock_stretcher_data_table -ffffffff823a2c20 t vegam_populate_avfs_parameters -ffffffff823a2f60 t vegam_populate_vr_config -ffffffff823a3090 t vegam_populate_pm_fuses -ffffffff823a32f0 t vegam_get_dependency_volt_by_clk -ffffffff823a34d0 t vegam_calculate_sclk_params +ffffffff823a1d60 t vegam_populate_all_memory_levels +ffffffff823a2060 t vegam_get_offsetof +ffffffff823a20f0 t vegam_get_mac_definition +ffffffff823a2150 t vegam_is_dpm_running +ffffffff823a21a0 t vegam_is_hw_avfs_present +ffffffff823a21f0 t vegam_program_memory_timing_parameters +ffffffff823a2420 t vegam_populate_smc_uvd_level +ffffffff823a2630 t vegam_populate_smc_boot_level +ffffffff823a2710 t vegam_populate_smc_initial_state +ffffffff823a27c0 t vegam_populate_bapm_parameters_in_dpm_table +ffffffff823a2950 t vegam_populate_clock_stretcher_data_table +ffffffff823a2b70 t vegam_populate_avfs_parameters +ffffffff823a2ec0 t vegam_populate_vr_config +ffffffff823a2ff0 t vegam_populate_pm_fuses +ffffffff823a3240 t vegam_get_dependency_volt_by_clk +ffffffff823a3420 t vegam_calculate_sclk_params ffffffff823a4000 T smu_set_residency_gfxoff ffffffff823a4050 T smu_get_residency_gfxoff ffffffff823a40a0 T smu_get_entrycount_gfxoff @@ -38414,32 +38414,32 @@ ffffffff82492750 T udl_erasecols ffffffff82492880 T udl_eraserows ffffffff824929b0 T udl_putchar ffffffff82492af0 T udl_do_cursor -ffffffff82492c90 T udl_cmd_write_reg_1 -ffffffff82492d20 T udl_cmd_send_async -ffffffff82492f30 T udl_cmd_save_offset -ffffffff82492f70 T udl_cmd_restore_offset -ffffffff82492fb0 T udl_draw_char -ffffffff82493140 T udl_draw_image -ffffffff824932c0 T udl_ctrl_msg -ffffffff82493360 T udl_poll -ffffffff82493440 T udl_read_1 -ffffffff82493520 T udl_write_1 -ffffffff824935f0 T udl_read_edid -ffffffff82493780 T udl_lookup_mode -ffffffff82493830 T udl_set_enc_key -ffffffff82493900 T udl_set_decomp_table -ffffffff82493a10 T udl_cmd_insert_int_1 -ffffffff82493a50 T udl_cmd_insert_int_4 -ffffffff82493ac0 T udl_cmd_insert_buf -ffffffff82493b20 T udl_cmd_send -ffffffff82493c40 T udl_cmd_insert_int_2 -ffffffff82493cb0 T udl_cmd_insert_int_3 -ffffffff82493d20 T udl_cmd_insert_buf_comp -ffffffff82494000 T udl_cmd_insert_head_comp -ffffffff82494230 T udl_cmd_insert_check -ffffffff82494290 T udl_cmd_write_reg_3 -ffffffff82494400 T udl_cmd_send_async_cb -ffffffff824944c0 T udl_init_fb_offsets +ffffffff82492d90 T udl_cmd_write_reg_1 +ffffffff82492e20 T udl_cmd_send_async +ffffffff82493030 T udl_cmd_save_offset +ffffffff82493070 T udl_cmd_restore_offset +ffffffff824930b0 T udl_draw_char +ffffffff82493240 T udl_draw_image +ffffffff824933c0 T udl_ctrl_msg +ffffffff82493460 T udl_poll +ffffffff82493540 T udl_read_1 +ffffffff82493620 T udl_write_1 +ffffffff824936f0 T udl_read_edid +ffffffff82493880 T udl_lookup_mode +ffffffff82493930 T udl_set_enc_key +ffffffff82493a00 T udl_set_decomp_table +ffffffff82493b10 T udl_cmd_insert_int_1 +ffffffff82493b50 T udl_cmd_insert_int_4 +ffffffff82493bc0 T udl_cmd_insert_buf +ffffffff82493c20 T udl_cmd_send +ffffffff82493d40 T udl_cmd_insert_int_2 +ffffffff82493db0 T udl_cmd_insert_int_3 +ffffffff82493e20 T udl_cmd_insert_buf_comp +ffffffff82494100 T udl_cmd_insert_head_comp +ffffffff82494330 T udl_cmd_insert_check +ffffffff82494390 T udl_cmd_write_reg_3 +ffffffff82494500 T udl_cmd_send_async_cb +ffffffff824945c0 T udl_init_fb_offsets ffffffff82495000 t umidi_open ffffffff82495100 t umidi_close ffffffff82495180 t umidi_output @@ -39232,19 +39232,19 @@ ffffffff824ea280 T ure_rtl8153_nic_reset ffffffff824eb050 T ure_xfer_list_init ffffffff824eb120 T ure_rxeof ffffffff824eb3c0 T ure_start -ffffffff824eb760 T ure_encap_xfer -ffffffff824eb800 T ure_encap_txpkt -ffffffff824eb8b0 T ure_tick -ffffffff824eb920 T ure_xfer_list_free -ffffffff824eb9c0 T ure_rtl8152_init -ffffffff824ebd60 T ure_rtl8153_init -ffffffff824ec730 T ure_rtl8153_phy_status -ffffffff824ec7e0 T ure_rtl8153b_init -ffffffff824ed850 T ure_wait_for_flash -ffffffff824ed9b0 T ure_disable_teredo -ffffffff824edb30 T ure_reset_bmu -ffffffff824edc20 T ure_ioctl -ffffffff824edd80 T ure_tick_task +ffffffff824eb790 T ure_encap_xfer +ffffffff824eb830 T ure_encap_txpkt +ffffffff824eb8f0 T ure_tick +ffffffff824eb960 T ure_xfer_list_free +ffffffff824eba00 T ure_rtl8152_init +ffffffff824ebda0 T ure_rtl8153_init +ffffffff824ec770 T ure_rtl8153_phy_status +ffffffff824ec820 T ure_rtl8153b_init +ffffffff824ed890 T ure_wait_for_flash +ffffffff824ed9f0 T ure_disable_teredo +ffffffff824edb70 T ure_reset_bmu +ffffffff824edc60 T ure_ioctl +ffffffff824eddc0 T ure_tick_task ffffffff824ee000 T uaq_match ffffffff824ee070 T uaq_attach ffffffff824ee3f0 T uaq_detach @@ -40346,9 +40346,9 @@ ffffffff825621f0 T uath_free_rx_cmd_list ffffffff82562240 T uath_free_tx_cmd_list ffffffff82562360 T uath_free_rx_data_list ffffffff825623d0 T uath_init -ffffffff825629b0 T uath_cmd_write -ffffffff825629d0 T uath_set_led -ffffffff82562a30 T uath_switch_channel +ffffffff825629c0 T uath_cmd_write +ffffffff825629e0 T uath_set_led +ffffffff82562a40 T uath_switch_channel ffffffff82562c10 T uath_set_rates ffffffff82562cb0 T uath_cmd ffffffff82562ec0 T uath_cmd_read @@ -40366,7 +40366,7 @@ ffffffff82563bb0 T uath_wme_init ffffffff82563ca0 T uath_set_chan ffffffff82563d20 T uath_set_key ffffffff82563ee0 T uath_set_keys -ffffffff82564170 T uath_set_rxfilter +ffffffff82564160 T uath_set_rxfilter ffffffff82565000 T athn_usb_match ffffffff82565070 T athn_usb_attach ffffffff825651b0 T athn_usb_detach @@ -40550,12 +40550,12 @@ ffffffff82578040 T iicprobenc ffffffff825780f0 T iicprobew ffffffff825781a0 T iicprobe ffffffff82578270 T lm75probe -ffffffff82579780 T adm1032cloneprobe -ffffffff82579af0 T iic_ignore_addr -ffffffff82579ba0 T iic_dump -ffffffff8257a020 T iic_probe_sensor -ffffffff8257f990 T iic_probe_eeprom -ffffffff8257fa50 T iic_scan +ffffffff82579760 T adm1032cloneprobe +ffffffff82579ad0 T iic_ignore_addr +ffffffff82579b80 T iic_dump +ffffffff8257a000 T iic_probe_sensor +ffffffff8257f960 T iic_probe_eeprom +ffffffff8257fa20 T iic_scan ffffffff82580000 T i2c_wait_for_scl ffffffff825800f0 T i2c_bitbang_send_stop ffffffff82580170 T i2c_bitbang_send_start @@ -56707,7 +56707,6 @@ ffffffff836c7000 b stamp_attr ffffffff836c7010 b stamp ffffffff836c8000 b stamp_attr ffffffff836c8010 b stamp -ffffffff836c8110 b stamp_mutex ffffffff836c9000 B fontlist ffffffff836c9010 b wsfont_init.again ffffffff836ca000 B urlphydebug