--- 7.5/2024-05-01T06:17:04Z/2024-04-25T00:00:00Z/nm-bsd-ot14.txt	Sat May  4 05:17:42 2024
+++ 7.5/2024-05-01T06:17:04Z/2024-04-26T00:00:00Z/nm-bsd-ot14.txt	Sat May  4 08:29:56 2024
@@ -4736,33 +4736,33 @@ ffffffff812166e0 T dwiic_i2c_exec
 ffffffff812170e0 T dwiic_read_clear_intrbits
 ffffffff812172f0 T dwiic_intr
 ffffffff81218000 T dwqe_attach
-ffffffff81218810 T dwqe_read
-ffffffff81218830 T dwqe_tick
-ffffffff81218880 T dwqe_rxtick
-ffffffff812189a0 T dwqe_ioctl
-ffffffff81218b50 T dwqe_start
-ffffffff81218ce0 T dwqe_watchdog
-ffffffff81218d00 T dwqe_mii_readreg
-ffffffff81218e00 T dwqe_mii_writereg
-ffffffff81218ef0 T dwqe_mii_statchg
-ffffffff81218fd0 T dwqe_media_change
-ffffffff81219020 T dwqe_media_status
-ffffffff81219090 T dwqe_reset
-ffffffff81219160 T dwqe_write
-ffffffff81219180 T dwqe_mii_attach
-ffffffff81219230 T dwqe_lladdr_read
-ffffffff812192e0 T dwqe_lladdr_write
-ffffffff81219340 T dwqe_encap
-ffffffff81219740 T dwqe_up
-ffffffff81219d20 T dwqe_down
-ffffffff8121a090 T dwqe_iff
-ffffffff8121a210 T dwqe_fill_rx_ring
-ffffffff8121a390 T dwqe_intr
-ffffffff8121a450 T dwqe_rx_proc
-ffffffff8121a6d0 T dwqe_tx_proc
-ffffffff8121a8b0 T dwqe_dmamem_alloc
-ffffffff8121aa30 T dwqe_dmamem_free
-ffffffff8121aaa0 T dwqe_alloc_mbuf
+ffffffff81218840 T dwqe_read
+ffffffff81218860 T dwqe_tick
+ffffffff812188b0 T dwqe_rxtick
+ffffffff812189d0 T dwqe_ioctl
+ffffffff81218b80 T dwqe_start
+ffffffff81218d10 T dwqe_watchdog
+ffffffff81218d30 T dwqe_mii_readreg
+ffffffff81218e30 T dwqe_mii_writereg
+ffffffff81218f20 T dwqe_mii_statchg
+ffffffff81219000 T dwqe_media_change
+ffffffff81219050 T dwqe_media_status
+ffffffff812190c0 T dwqe_reset
+ffffffff81219190 T dwqe_write
+ffffffff812191b0 T dwqe_mii_attach
+ffffffff81219260 T dwqe_lladdr_read
+ffffffff81219310 T dwqe_lladdr_write
+ffffffff81219370 T dwqe_encap
+ffffffff81219770 T dwqe_up
+ffffffff81219d50 T dwqe_down
+ffffffff8121a0c0 T dwqe_iff
+ffffffff8121a240 T dwqe_fill_rx_ring
+ffffffff8121a3c0 T dwqe_intr
+ffffffff8121a480 T dwqe_rx_proc
+ffffffff8121a700 T dwqe_tx_proc
+ffffffff8121a8e0 T dwqe_dmamem_alloc
+ffffffff8121aa60 T dwqe_dmamem_free
+ffffffff8121aad0 T dwqe_alloc_mbuf
 ffffffff8121b000 T ksymsattach
 ffffffff8121b0d0 T ksymsopen
 ffffffff8121b130 T ksymsclose
@@ -42044,19 +42044,19 @@ ffffffff8262812c r dg2_g12_revid_step_tbl
 ffffffff82629000 r isomappings
 ffffffff82629080 r unimappings
 ffffffff82629230 r replacements
-ffffffff8262cb12 r apollo_pio_rec
-ffffffff8267a542 r apollo_udma33_tim
-ffffffff8268fac5 r pp_r600_decoded_lanes
-ffffffff826c6609 r cmd680_setup_channel.udma_tbl
-ffffffff826cebd8 r apollo_udma100_tim
-ffffffff826cebde r cmd0646_9_tim_udma
-ffffffff826dd4d8 r substchar
-ffffffff8273466c r apollo_udma133_tim
-ffffffff82734673 r apollo_udma66_tim
-ffffffff8273469d r cy_pio_rec
-ffffffff82739f10 R drm_ca
-ffffffff82739f38 R drm_filtops
-ffffffff82739f68 R drmread_filtops
+ffffffff8262cb18 r apollo_pio_rec
+ffffffff8267a54f r apollo_udma33_tim
+ffffffff8268fad2 r pp_r600_decoded_lanes
+ffffffff826c6616 r cmd680_setup_channel.udma_tbl
+ffffffff826cebe5 r apollo_udma100_tim
+ffffffff826cebeb r cmd0646_9_tim_udma
+ffffffff826dd4e5 r substchar
+ffffffff82734671 r apollo_udma133_tim
+ffffffff82734678 r apollo_udma66_tim
+ffffffff827346a2 r cy_pio_rec
+ffffffff82739f18 R drm_ca
+ffffffff82739f40 R drm_filtops
+ffffffff82739f70 R drmread_filtops
 ffffffff8273a000 r vga_emulops
 ffffffff8273a048 R vga_stdscreen
 ffffffff8273a078 R vga_stdscreen_mono