--- 7.5/2024-05-01T06:17:04Z/2024-04-18T00:00:00Z/nm-bsd-ot14.txt	Fri May  3 09:46:54 2024
+++ 7.5/2024-05-01T06:17:04Z/2024-04-19T00:00:00Z/nm-bsd-ot14.txt	Fri May  3 12:36:09 2024
@@ -6562,28 +6562,28 @@ ffffffff812e90f0 T initsiginfo
 ffffffff812e91d0 T sigexit
 ffffffff812e9260 T single_thread_set
 ffffffff812e94f0 T proc_stop
-ffffffff812e9630 T single_thread_clear
-ffffffff812e9770 T psignal
-ffffffff812e9790 T cursig
-ffffffff812e9cd0 T postsig
-ffffffff812ea0b0 T coredump
-ffffffff812ea490 T sigabort
-ffffffff812ea530 T sigismasked
-ffffffff812ea600 T coredump_write
-ffffffff812ea770 T coredump_unmap
-ffffffff812ea790 T sys_nosys
-ffffffff812ea7e0 T sys___thrsigdivert
-ffffffff812eaa90 T userret
-ffffffff812eac40 T single_thread_check
-ffffffff812eacc0 T single_thread_check_locked
-ffffffff812eae30 T single_thread_wait
-ffffffff812eaee0 T sigio_del
-ffffffff812eaf80 T sigio_unlink
-ffffffff812eb0a0 T sigio_free
-ffffffff812eb170 T sigio_freelist
-ffffffff812eb260 T sigio_setown
-ffffffff812eb4c0 T sigio_getown
-ffffffff812eb540 T sigio_copy
+ffffffff812e9640 T single_thread_clear
+ffffffff812e9780 T psignal
+ffffffff812e97a0 T cursig
+ffffffff812e9ce0 T postsig
+ffffffff812ea0c0 T coredump
+ffffffff812ea4a0 T sigabort
+ffffffff812ea540 T sigismasked
+ffffffff812ea610 T coredump_write
+ffffffff812ea780 T coredump_unmap
+ffffffff812ea7a0 T sys_nosys
+ffffffff812ea7f0 T sys___thrsigdivert
+ffffffff812eaaa0 T userret
+ffffffff812eac50 T single_thread_check
+ffffffff812eacd0 T single_thread_check_locked
+ffffffff812eae40 T single_thread_wait
+ffffffff812eaef0 T sigio_del
+ffffffff812eaf90 T sigio_unlink
+ffffffff812eb0b0 T sigio_free
+ffffffff812eb180 T sigio_freelist
+ffffffff812eb270 T sigio_setown
+ffffffff812eb4d0 T sigio_getown
+ffffffff812eb550 T sigio_copy
 ffffffff812ec000 T smr_startup
 ffffffff812ec040 T smr_wakeup
 ffffffff812ec090 T smr_startup_thread
@@ -6647,34 +6647,34 @@ ffffffff812f3bd0 T fill_kproc
 ffffffff812f5000 T sleep_queue_init
 ffffffff812f5060 T tsleep
 ffffffff812f51e0 T sleep_setup
-ffffffff812f5340 T sleep_finish
-ffffffff812f55c0 T tsleep_nsec
-ffffffff812f56b0 T msleep
-ffffffff812f5850 T msleep_nsec
-ffffffff812f5950 T rwsleep
-ffffffff812f5a90 T rwsleep_nsec
-ffffffff812f5b90 T sleep_signal_check
-ffffffff812f5c10 T unsleep
-ffffffff812f5d40 T wakeup_proc
-ffffffff812f5e40 T endtsleep
-ffffffff812f5e90 T wakeup_n
-ffffffff812f60b0 T wakeup
-ffffffff812f60d0 T sys_sched_yield
-ffffffff812f6190 T thrsleep_unlock
-ffffffff812f61e0 T thrsleep
-ffffffff812f6570 T sys___thrsleep
-ffffffff812f6600 T sys___thrwakeup
-ffffffff812f6730 T refcnt_init
-ffffffff812f6770 T refcnt_init_trace
-ffffffff812f67f0 T refcnt_take
-ffffffff812f68a0 T refcnt_rele
-ffffffff812f6960 T refcnt_rele_wake
-ffffffff812f6a40 T refcnt_finalize
-ffffffff812f6b80 T refcnt_shared
-ffffffff812f6c10 T refcnt_read
-ffffffff812f6c90 T cond_init
-ffffffff812f6cc0 T cond_signal
-ffffffff812f6ce0 T cond_wait
+ffffffff812f5360 T sleep_finish
+ffffffff812f55e0 T tsleep_nsec
+ffffffff812f56d0 T msleep
+ffffffff812f5870 T msleep_nsec
+ffffffff812f5970 T rwsleep
+ffffffff812f5ab0 T rwsleep_nsec
+ffffffff812f5bb0 T sleep_signal_check
+ffffffff812f5c30 T unsleep
+ffffffff812f5d60 T wakeup_proc
+ffffffff812f5e60 T endtsleep
+ffffffff812f5eb0 T wakeup_n
+ffffffff812f60d0 T wakeup
+ffffffff812f60f0 T sys_sched_yield
+ffffffff812f61b0 T thrsleep_unlock
+ffffffff812f6200 T thrsleep
+ffffffff812f6590 T sys___thrsleep
+ffffffff812f6620 T sys___thrwakeup
+ffffffff812f6750 T refcnt_init
+ffffffff812f6790 T refcnt_init_trace
+ffffffff812f6810 T refcnt_take
+ffffffff812f68c0 T refcnt_rele
+ffffffff812f6980 T refcnt_rele_wake
+ffffffff812f6a60 T refcnt_finalize
+ffffffff812f6ba0 T refcnt_shared
+ffffffff812f6c30 T refcnt_read
+ffffffff812f6cb0 T cond_init
+ffffffff812f6ce0 T cond_signal
+ffffffff812f6d00 T cond_wait
 ffffffff812f7000 T dummy_get_timecount
 ffffffff812f7040 T binboottime
 ffffffff812f70a0 T microboottime
@@ -21317,58 +21317,58 @@ ffffffff81a1a7d0 T intel_cdclk_uninit_hw
 ffffffff81a1a8e0 T intel_cdclk_needs_modeset
 ffffffff81a1a920 T intel_cdclk_dump_config
 ffffffff81a1a9a0 T intel_set_cdclk_pre_plane_update
-ffffffff81a1ac80 t intel_set_cdclk
-ffffffff81a1b050 T intel_set_cdclk_post_plane_update
-ffffffff81a1b2e0 T intel_crtc_compute_min_cdclk
-ffffffff81a1b670 T intel_atomic_get_cdclk_state
-ffffffff81a1b690 T intel_cdclk_atomic_check
-ffffffff81a1b790 T intel_cdclk_init
-ffffffff81a1b800 T intel_modeset_calc_cdclk
-ffffffff81a1be30 t intel_cdclk_can_crawl
-ffffffff81a1bec0 T intel_update_max_cdclk
-ffffffff81a1c220 T intel_update_cdclk
-ffffffff81a1c2c0 T intel_read_rawclk
-ffffffff81a1c440 t i9xx_hrawclk
-ffffffff81a1c4f0 T intel_cdclk_debugfs_register
-ffffffff81a1c520 T intel_init_cdclk_hooks
-ffffffff81a1c940 t bxt_set_cdclk
-ffffffff81a1cfc0 t _bxt_set_cdclk
-ffffffff81a1d780 t skl_set_cdclk
-ffffffff81a1dd90 t intel_cdclk_duplicate_state
-ffffffff81a1de10 t intel_cdclk_destroy_state
-ffffffff81a1de30 t bxt_get_cdclk
-ffffffff81a1e060 t bxt_modeset_calc_cdclk
-ffffffff81a1e4b0 t tgl_calc_voltage_level
-ffffffff81a1e500 t intel_compute_min_cdclk
-ffffffff81a1e700 t rplu_calc_voltage_level
-ffffffff81a1e750 t ehl_calc_voltage_level
-ffffffff81a1e7a0 t icl_calc_voltage_level
-ffffffff81a1e7f0 t bxt_calc_voltage_level
-ffffffff81a1e840 t skl_get_cdclk
-ffffffff81a1ea50 t skl_modeset_calc_cdclk
-ffffffff81a1ec60 t bdw_get_cdclk
-ffffffff81a1ed50 t bdw_set_cdclk
-ffffffff81a1f2e0 t bdw_modeset_calc_cdclk
-ffffffff81a1f3e0 t hsw_get_cdclk
-ffffffff81a1f4b0 t fixed_modeset_calc_cdclk
-ffffffff81a1f4f0 t vlv_get_cdclk
-ffffffff81a1f5b0 t chv_set_cdclk
-ffffffff81a1f920 t vlv_modeset_calc_cdclk
-ffffffff81a1faf0 t vlv_set_cdclk
-ffffffff81a20030 t fixed_400mhz_get_cdclk
-ffffffff81a20060 t fixed_450mhz_get_cdclk
-ffffffff81a20090 t gm45_get_cdclk
-ffffffff81a20190 t intel_hpll_vco
-ffffffff81a202c0 t g33_get_cdclk
-ffffffff81a203d0 t i965gm_get_cdclk
-ffffffff81a204d0 t pnv_get_cdclk
-ffffffff81a20580 t i945gm_get_cdclk
-ffffffff81a205f0 t i915gm_get_cdclk
-ffffffff81a20660 t fixed_333mhz_get_cdclk
-ffffffff81a20690 t fixed_266mhz_get_cdclk
-ffffffff81a206c0 t i85x_get_cdclk
-ffffffff81a20740 t fixed_200mhz_get_cdclk
-ffffffff81a20770 t fixed_133mhz_get_cdclk
+ffffffff81a1ac70 t intel_set_cdclk
+ffffffff81a1b040 T intel_set_cdclk_post_plane_update
+ffffffff81a1b2c0 T intel_crtc_compute_min_cdclk
+ffffffff81a1b650 T intel_atomic_get_cdclk_state
+ffffffff81a1b670 T intel_cdclk_atomic_check
+ffffffff81a1b770 T intel_cdclk_init
+ffffffff81a1b7e0 T intel_modeset_calc_cdclk
+ffffffff81a1be10 t intel_cdclk_can_crawl
+ffffffff81a1bea0 T intel_update_max_cdclk
+ffffffff81a1c200 T intel_update_cdclk
+ffffffff81a1c2a0 T intel_read_rawclk
+ffffffff81a1c420 t i9xx_hrawclk
+ffffffff81a1c4d0 T intel_cdclk_debugfs_register
+ffffffff81a1c500 T intel_init_cdclk_hooks
+ffffffff81a1c920 t bxt_set_cdclk
+ffffffff81a1cfa0 t _bxt_set_cdclk
+ffffffff81a1d760 t skl_set_cdclk
+ffffffff81a1dd70 t intel_cdclk_duplicate_state
+ffffffff81a1ddf0 t intel_cdclk_destroy_state
+ffffffff81a1de10 t bxt_get_cdclk
+ffffffff81a1e040 t bxt_modeset_calc_cdclk
+ffffffff81a1e490 t tgl_calc_voltage_level
+ffffffff81a1e4e0 t intel_compute_min_cdclk
+ffffffff81a1e6e0 t rplu_calc_voltage_level
+ffffffff81a1e730 t ehl_calc_voltage_level
+ffffffff81a1e780 t icl_calc_voltage_level
+ffffffff81a1e7d0 t bxt_calc_voltage_level
+ffffffff81a1e820 t skl_get_cdclk
+ffffffff81a1ea30 t skl_modeset_calc_cdclk
+ffffffff81a1ec40 t bdw_get_cdclk
+ffffffff81a1ed30 t bdw_set_cdclk
+ffffffff81a1f2c0 t bdw_modeset_calc_cdclk
+ffffffff81a1f3c0 t hsw_get_cdclk
+ffffffff81a1f490 t fixed_modeset_calc_cdclk
+ffffffff81a1f4d0 t vlv_get_cdclk
+ffffffff81a1f590 t chv_set_cdclk
+ffffffff81a1f900 t vlv_modeset_calc_cdclk
+ffffffff81a1fad0 t vlv_set_cdclk
+ffffffff81a20010 t fixed_400mhz_get_cdclk
+ffffffff81a20040 t fixed_450mhz_get_cdclk
+ffffffff81a20070 t gm45_get_cdclk
+ffffffff81a20170 t intel_hpll_vco
+ffffffff81a202a0 t g33_get_cdclk
+ffffffff81a203b0 t i965gm_get_cdclk
+ffffffff81a204b0 t pnv_get_cdclk
+ffffffff81a20560 t i945gm_get_cdclk
+ffffffff81a205d0 t i915gm_get_cdclk
+ffffffff81a20640 t fixed_333mhz_get_cdclk
+ffffffff81a20670 t fixed_266mhz_get_cdclk
+ffffffff81a206a0 t i85x_get_cdclk
+ffffffff81a20720 t fixed_200mhz_get_cdclk
+ffffffff81a20750 t fixed_133mhz_get_cdclk
 ffffffff81a21000 T intel_color_load_luts
 ffffffff81a21030 T intel_color_commit_noarm
 ffffffff81a21080 T intel_color_commit_arm
@@ -21582,78 +21582,78 @@ ffffffff81a3e580 t intel_ddi_hotplug
 ffffffff81a3e990 t intel_ddi_compute_output_type
 ffffffff81a3ea10 t intel_ddi_compute_config
 ffffffff81a3eb80 t intel_ddi_compute_config_late
-ffffffff81a3ee40 t intel_enable_ddi
-ffffffff81a3f790 t intel_ddi_pre_pll_enable
-ffffffff81a3f980 t intel_ddi_pre_enable
-ffffffff81a40980 t intel_disable_ddi
-ffffffff81a40b30 t intel_ddi_post_pll_disable
-ffffffff81a40c10 t intel_ddi_post_disable
-ffffffff81a410a0 t intel_ddi_sync_state
-ffffffff81a41160 t intel_ddi_initial_fastset_check
-ffffffff81a41220 t intel_ddi_encoder_suspend
-ffffffff81a41230 t intel_ddi_encoder_shutdown
-ffffffff81a41260 t intel_ddi_get_power_domains
-ffffffff81a413e0 t mtl_ddi_get_config
-ffffffff81a414c0 t dg2_ddi_get_config
-ffffffff81a41510 t adls_ddi_enable_clock
-ffffffff81a41680 t adls_ddi_disable_clock
-ffffffff81a41730 t adls_ddi_is_clock_enabled
-ffffffff81a417d0 t adls_ddi_get_config
-ffffffff81a41890 t rkl_ddi_enable_clock
-ffffffff81a41a10 t rkl_ddi_disable_clock
-ffffffff81a41aa0 t rkl_ddi_is_clock_enabled
-ffffffff81a41b20 t rkl_ddi_get_config
-ffffffff81a41bf0 t dg1_ddi_enable_clock
-ffffffff81a41da0 t dg1_ddi_disable_clock
-ffffffff81a41e60 t dg1_ddi_is_clock_enabled
-ffffffff81a41f00 t dg1_ddi_get_config
-ffffffff81a41fd0 t jsl_ddi_tc_enable_clock
-ffffffff81a42060 t jsl_ddi_tc_disable_clock
-ffffffff81a42120 t jsl_ddi_tc_is_clock_enabled
-ffffffff81a421d0 t icl_ddi_tc_port_pll_type
-ffffffff81a42260 t icl_ddi_combo_get_config
-ffffffff81a42300 t icl_ddi_combo_enable_clock
-ffffffff81a42440 t icl_ddi_combo_disable_clock
-ffffffff81a424e0 t icl_ddi_combo_is_clock_enabled
-ffffffff81a42560 t icl_ddi_tc_enable_clock
-ffffffff81a42730 t icl_ddi_tc_disable_clock
-ffffffff81a42800 t icl_ddi_tc_is_clock_enabled
-ffffffff81a428b0 t icl_ddi_tc_get_config
-ffffffff81a42ad0 t bxt_ddi_get_config
-ffffffff81a42b40 t skl_ddi_enable_clock
-ffffffff81a42c40 t skl_ddi_disable_clock
-ffffffff81a42cd0 t skl_ddi_is_clock_enabled
-ffffffff81a42d40 t skl_ddi_get_config
-ffffffff81a42dd0 t icl_combo_phy_set_signal_levels
-ffffffff81a43890 t tgl_dkl_phy_set_signal_levels
-ffffffff81a43ba0 t icl_mg_phy_set_signal_levels
-ffffffff81a44430 t hsw_set_signal_levels
-ffffffff81a447a0 t intel_ddi_max_lanes
-ffffffff81a44870 t need_aux_ch
-ffffffff81a448e0 t intel_ddi_tc_encoder_suspend_complete
-ffffffff81a44920 t intel_ddi_tc_encoder_shutdown_complete
-ffffffff81a44960 t lpt_digital_port_connected
-ffffffff81a449d0 t bdw_digital_port_connected
-ffffffff81a44a40 t hsw_digital_port_connected
-ffffffff81a44ab0 t intel_ddi_init_dp_connector
-ffffffff81a44b90 t intel_ddi_init_hdmi_connector
-ffffffff81a44c00 t intel_ddi_encoder_reset
-ffffffff81a44ce0 t intel_ddi_encoder_destroy
-ffffffff81a44d90 t intel_ddi_encoder_late_register
-ffffffff81a44df0 t mtl_ddi_enable_d2d
-ffffffff81a44fb0 t intel_wait_ddi_buf_active
-ffffffff81a452c0 t intel_ddi_main_link_aux_domain
-ffffffff81a453b0 t icl_program_mg_dp_mode
-ffffffff81a45680 t intel_ddi_init_dp_buf_reg
-ffffffff81a45880 t intel_disable_ddi_buf
-ffffffff81a45a30 t mtl_disable_ddi_buf
-ffffffff81a45e50 t intel_ddi_disable_fec_state
-ffffffff81a45fa0 t mtl_ddi_prepare_link_retrain
-ffffffff81a462e0 t intel_ddi_prepare_link_retrain
-ffffffff81a467e0 t intel_ddi_set_link_train
-ffffffff81a46930 t intel_ddi_set_idle_link_train
-ffffffff81a46b00 t intel_ddi_dp_voltage_max
-ffffffff81a46bc0 t intel_ddi_dp_preemph_max
+ffffffff81a3ee60 t intel_enable_ddi
+ffffffff81a3f7b0 t intel_ddi_pre_pll_enable
+ffffffff81a3f9a0 t intel_ddi_pre_enable
+ffffffff81a409a0 t intel_disable_ddi
+ffffffff81a40b50 t intel_ddi_post_pll_disable
+ffffffff81a40c30 t intel_ddi_post_disable
+ffffffff81a410c0 t intel_ddi_sync_state
+ffffffff81a41180 t intel_ddi_initial_fastset_check
+ffffffff81a41240 t intel_ddi_encoder_suspend
+ffffffff81a41250 t intel_ddi_encoder_shutdown
+ffffffff81a41280 t intel_ddi_get_power_domains
+ffffffff81a41400 t mtl_ddi_get_config
+ffffffff81a414e0 t dg2_ddi_get_config
+ffffffff81a41530 t adls_ddi_enable_clock
+ffffffff81a416a0 t adls_ddi_disable_clock
+ffffffff81a41750 t adls_ddi_is_clock_enabled
+ffffffff81a417f0 t adls_ddi_get_config
+ffffffff81a418b0 t rkl_ddi_enable_clock
+ffffffff81a41a30 t rkl_ddi_disable_clock
+ffffffff81a41ac0 t rkl_ddi_is_clock_enabled
+ffffffff81a41b40 t rkl_ddi_get_config
+ffffffff81a41c10 t dg1_ddi_enable_clock
+ffffffff81a41dc0 t dg1_ddi_disable_clock
+ffffffff81a41e80 t dg1_ddi_is_clock_enabled
+ffffffff81a41f20 t dg1_ddi_get_config
+ffffffff81a41ff0 t jsl_ddi_tc_enable_clock
+ffffffff81a42080 t jsl_ddi_tc_disable_clock
+ffffffff81a42140 t jsl_ddi_tc_is_clock_enabled
+ffffffff81a421f0 t icl_ddi_tc_port_pll_type
+ffffffff81a42280 t icl_ddi_combo_get_config
+ffffffff81a42320 t icl_ddi_combo_enable_clock
+ffffffff81a42460 t icl_ddi_combo_disable_clock
+ffffffff81a42500 t icl_ddi_combo_is_clock_enabled
+ffffffff81a42580 t icl_ddi_tc_enable_clock
+ffffffff81a42750 t icl_ddi_tc_disable_clock
+ffffffff81a42820 t icl_ddi_tc_is_clock_enabled
+ffffffff81a428d0 t icl_ddi_tc_get_config
+ffffffff81a42af0 t bxt_ddi_get_config
+ffffffff81a42b60 t skl_ddi_enable_clock
+ffffffff81a42c60 t skl_ddi_disable_clock
+ffffffff81a42cf0 t skl_ddi_is_clock_enabled
+ffffffff81a42d60 t skl_ddi_get_config
+ffffffff81a42df0 t icl_combo_phy_set_signal_levels
+ffffffff81a438b0 t tgl_dkl_phy_set_signal_levels
+ffffffff81a43bc0 t icl_mg_phy_set_signal_levels
+ffffffff81a44450 t hsw_set_signal_levels
+ffffffff81a447c0 t intel_ddi_max_lanes
+ffffffff81a44890 t need_aux_ch
+ffffffff81a44900 t intel_ddi_tc_encoder_suspend_complete
+ffffffff81a44940 t intel_ddi_tc_encoder_shutdown_complete
+ffffffff81a44980 t lpt_digital_port_connected
+ffffffff81a449f0 t bdw_digital_port_connected
+ffffffff81a44a60 t hsw_digital_port_connected
+ffffffff81a44ad0 t intel_ddi_init_dp_connector
+ffffffff81a44bb0 t intel_ddi_init_hdmi_connector
+ffffffff81a44c20 t intel_ddi_encoder_reset
+ffffffff81a44d00 t intel_ddi_encoder_destroy
+ffffffff81a44db0 t intel_ddi_encoder_late_register
+ffffffff81a44e10 t mtl_ddi_enable_d2d
+ffffffff81a44fd0 t intel_wait_ddi_buf_active
+ffffffff81a452e0 t intel_ddi_main_link_aux_domain
+ffffffff81a453d0 t icl_program_mg_dp_mode
+ffffffff81a456a0 t intel_ddi_init_dp_buf_reg
+ffffffff81a458a0 t intel_disable_ddi_buf
+ffffffff81a45a50 t mtl_disable_ddi_buf
+ffffffff81a45e70 t intel_ddi_disable_fec_state
+ffffffff81a45fc0 t mtl_ddi_prepare_link_retrain
+ffffffff81a46300 t intel_ddi_prepare_link_retrain
+ffffffff81a46800 t intel_ddi_set_link_train
+ffffffff81a46950 t intel_ddi_set_idle_link_train
+ffffffff81a46b20 t intel_ddi_dp_voltage_max
+ffffffff81a46be0 t intel_ddi_dp_preemph_max
 ffffffff81a47000 T is_hobl_buf_trans
 ffffffff81a47040 T intel_ddi_buf_trans_init
 ffffffff81a47300 t mtl_get_cx0_buf_trans
@@ -23150,12 +23150,12 @@ ffffffff81b0a080 T intel_vrr_check_modeset
 ffffffff81b0a110 T intel_vrr_vmin_vblank_start
 ffffffff81b0a170 T intel_vrr_vmax_vblank_start
 ffffffff81b0a1d0 T intel_vrr_compute_config
-ffffffff81b0a350 T intel_vrr_set_transcoder_timings
-ffffffff81b0a530 T intel_vrr_send_push
-ffffffff81b0a5b0 T intel_vrr_is_push_sent
-ffffffff81b0a640 T intel_vrr_enable
-ffffffff81b0a760 T intel_vrr_disable
-ffffffff81b0a8a0 T intel_vrr_get_config
+ffffffff81b0a360 T intel_vrr_set_transcoder_timings
+ffffffff81b0a540 T intel_vrr_send_push
+ffffffff81b0a5c0 T intel_vrr_is_push_sent
+ffffffff81b0a650 T intel_vrr_enable
+ffffffff81b0a770 T intel_vrr_disable
+ffffffff81b0a8b0 T intel_vrr_get_config
 ffffffff81b0b000 T intel_update_watermarks
 ffffffff81b0b040 T intel_compute_pipe_wm
 ffffffff81b0b090 T intel_compute_intermediate_wm
@@ -30714,28 +30714,28 @@ ffffffff81f49350 t soc21_common_hw_init
 ffffffff81f49410 t soc21_common_hw_fini
 ffffffff81f494b0 t soc21_common_suspend
 ffffffff81f49550 t soc21_common_resume
-ffffffff81f49610 t soc21_common_is_idle
-ffffffff81f49640 t soc21_common_wait_for_idle
-ffffffff81f49670 t soc21_common_soft_reset
-ffffffff81f496a0 t soc21_common_set_clockgating_state
-ffffffff81f49750 t soc21_common_set_powergating_state
-ffffffff81f497b0 t soc21_common_get_clockgating_state
-ffffffff81f49800 t soc21_didt_rreg
-ffffffff81f498a0 t soc21_didt_wreg
-ffffffff81f49920 t soc21_read_disabled_bios
-ffffffff81f49950 t soc21_read_register
-ffffffff81f49a40 t soc21_asic_reset
-ffffffff81f49b20 t soc21_asic_reset_method
-ffffffff81f49be0 t soc21_get_xclk
-ffffffff81f49c10 t soc21_set_uvd_clocks
-ffffffff81f49c40 t soc21_set_vce_clocks
-ffffffff81f49c70 t soc21_get_config_memsize
-ffffffff81f49c90 t soc21_need_full_reset
-ffffffff81f49cf0 t soc21_init_doorbell_index
-ffffffff81f49e10 t soc21_need_reset_on_init
-ffffffff81f49eb0 t soc21_pre_asic_init
-ffffffff81f49ee0 t soc21_update_umd_stable_pstate
-ffffffff81f49f60 t soc21_query_video_codecs
+ffffffff81f49720 t soc21_common_is_idle
+ffffffff81f49750 t soc21_common_wait_for_idle
+ffffffff81f49780 t soc21_common_soft_reset
+ffffffff81f497b0 t soc21_common_set_clockgating_state
+ffffffff81f49860 t soc21_common_set_powergating_state
+ffffffff81f498c0 t soc21_common_get_clockgating_state
+ffffffff81f49910 t soc21_didt_rreg
+ffffffff81f499b0 t soc21_didt_wreg
+ffffffff81f49a30 t soc21_read_disabled_bios
+ffffffff81f49a60 t soc21_read_register
+ffffffff81f49b50 t soc21_asic_reset
+ffffffff81f49c30 t soc21_asic_reset_method
+ffffffff81f49cf0 t soc21_get_xclk
+ffffffff81f49d20 t soc21_set_uvd_clocks
+ffffffff81f49d50 t soc21_set_vce_clocks
+ffffffff81f49d80 t soc21_get_config_memsize
+ffffffff81f49da0 t soc21_need_full_reset
+ffffffff81f49dd0 t soc21_init_doorbell_index
+ffffffff81f49ef0 t soc21_need_reset_on_init
+ffffffff81f49f90 t soc21_pre_asic_init
+ffffffff81f49fc0 t soc21_update_umd_stable_pstate
+ffffffff81f4a040 t soc21_query_video_codecs
 ffffffff81f4b000 t tonga_ih_early_init
 ffffffff81f4b050 t tonga_ih_sw_init
 ffffffff81f4b0d0 t tonga_ih_sw_fini
@@ -31223,62 +31223,62 @@ ffffffff81fc1ba0 T amdgpu_dm_connector_atomic_get_prop
 ffffffff81fc1c40 T amdgpu_dm_connector_funcs_reset
 ffffffff81fc1d30 T amdgpu_dm_connector_atomic_duplicate_state
 ffffffff81fc1e30 T create_validate_stream_for_sink
-ffffffff81fc3510 T amdgpu_dm_connector_mode_valid
-ffffffff81fc36e0 T convert_dc_color_depth_into_bpc
-ffffffff81fc3720 t dm_encoder_helper_disable
-ffffffff81fc3750 t dm_encoder_helper_atomic_check
-ffffffff81fc3920 T amdgpu_dm_connector_init_helper
-ffffffff81fc3c80 T amdgpu_dm_get_encoder_crtc_mask
-ffffffff81fc3cd0 T dm_restore_drm_connector_state
-ffffffff81fc3e40 t parse_hdmi_amd_vsdb
-ffffffff81fc4170 T amdgpu_dm_trigger_timing_sync
-ffffffff81fc4340 T dm_write_reg_func
-ffffffff81fc4360 T dm_read_reg_func
-ffffffff81fc4400 T amdgpu_dm_process_dmub_aux_transfer_sync
-ffffffff81fc4610 T amdgpu_dm_process_dmub_set_config_sync
-ffffffff81fc4780 T check_seamless_boot_capability
-ffffffff81fc47d0 T dm_execute_dmub_cmd
-ffffffff81fc47f0 T dm_execute_dmub_cmd_list
-ffffffff81fc4810 t dm_early_init
-ffffffff81fc4bc0 t dm_late_init
-ffffffff81fc4e60 t dm_sw_init
-ffffffff81fc5410 t dm_sw_fini
-ffffffff81fc54b0 t amdgpu_dm_early_fini
-ffffffff81fc5510 t dm_hw_init
-ffffffff81fc70e0 t dm_hw_fini
-ffffffff81fc7130 t dm_suspend
-ffffffff81fc74b0 t dm_resume
-ffffffff81fc7d10 t dm_is_idle
-ffffffff81fc7d40 t dm_wait_for_idle
-ffffffff81fc7d70 t dm_check_soft_reset
-ffffffff81fc7da0 t dm_soft_reset
-ffffffff81fc7dd0 t dm_set_clockgating_state
-ffffffff81fc7e00 t dm_set_powergating_state
-ffffffff81fc7e30 t dm_bandwidth_update
-ffffffff81fc7e60 t dm_vblank_get_counter
-ffffffff81fc7ed0 t dm_crtc_get_scanoutpos
-ffffffff81fc7f90 t amdgpu_dm_dmub_reg_read
-ffffffff81fc8040 t amdgpu_dm_dmub_reg_write
-ffffffff81fc8070 t dm_dmub_hw_init
-ffffffff81fc8440 t dmub_aux_setconfig_callback
-ffffffff81fc84e0 t amdgpu_dm_fini
-ffffffff81fc86c0 t emulated_link_detect
-ffffffff81fc87c0 t amdgpu_dm_atomic_check
-ffffffff81fc9520 t dm_update_plane_state
-ffffffff81fc9b40 t dm_update_crtc_state
-ffffffff81fca520 t dm_check_crtc_cursor
-ffffffff81fca890 t is_scaling_state_different
-ffffffff81fca930 t do_aquire_global_lock
-ffffffff81fcaba0 t dm_update_mst_vcpi_slots_for_dsc
-ffffffff81fcad90 t dm_atomic_destroy_state
-ffffffff81fcadd0 t dm_check_cursor_fb
-ffffffff81fcaf60 t fill_dc_plane_attributes
-ffffffff81fcb1f0 t fill_dc_plane_info_and_addr
-ffffffff81fcb520 t fill_hdr_info_packet
-ffffffff81fcb680 t is_timing_unchanged_for_freesync
-ffffffff81fcb7b0 t get_highest_refresh_rate_mode
-ffffffff81fcb8e0 t update_stream_scaling_settings
-ffffffff81fcba20 t amdgpu_dm_atomic_commit_tail
+ffffffff81fc3500 T amdgpu_dm_connector_mode_valid
+ffffffff81fc36d0 T convert_dc_color_depth_into_bpc
+ffffffff81fc3710 t dm_encoder_helper_disable
+ffffffff81fc3740 t dm_encoder_helper_atomic_check
+ffffffff81fc3910 T amdgpu_dm_connector_init_helper
+ffffffff81fc3c70 T amdgpu_dm_get_encoder_crtc_mask
+ffffffff81fc3cc0 T dm_restore_drm_connector_state
+ffffffff81fc3e30 t parse_hdmi_amd_vsdb
+ffffffff81fc4160 T amdgpu_dm_trigger_timing_sync
+ffffffff81fc4330 T dm_write_reg_func
+ffffffff81fc4350 T dm_read_reg_func
+ffffffff81fc43f0 T amdgpu_dm_process_dmub_aux_transfer_sync
+ffffffff81fc4600 T amdgpu_dm_process_dmub_set_config_sync
+ffffffff81fc4770 T check_seamless_boot_capability
+ffffffff81fc47c0 T dm_execute_dmub_cmd
+ffffffff81fc47e0 T dm_execute_dmub_cmd_list
+ffffffff81fc4800 t dm_early_init
+ffffffff81fc4bb0 t dm_late_init
+ffffffff81fc4e50 t dm_sw_init
+ffffffff81fc5400 t dm_sw_fini
+ffffffff81fc54a0 t amdgpu_dm_early_fini
+ffffffff81fc5500 t dm_hw_init
+ffffffff81fc70d0 t dm_hw_fini
+ffffffff81fc7120 t dm_suspend
+ffffffff81fc74a0 t dm_resume
+ffffffff81fc7d00 t dm_is_idle
+ffffffff81fc7d30 t dm_wait_for_idle
+ffffffff81fc7d60 t dm_check_soft_reset
+ffffffff81fc7d90 t dm_soft_reset
+ffffffff81fc7dc0 t dm_set_clockgating_state
+ffffffff81fc7df0 t dm_set_powergating_state
+ffffffff81fc7e20 t dm_bandwidth_update
+ffffffff81fc7e50 t dm_vblank_get_counter
+ffffffff81fc7ec0 t dm_crtc_get_scanoutpos
+ffffffff81fc7f80 t amdgpu_dm_dmub_reg_read
+ffffffff81fc8030 t amdgpu_dm_dmub_reg_write
+ffffffff81fc8060 t dm_dmub_hw_init
+ffffffff81fc8430 t dmub_aux_setconfig_callback
+ffffffff81fc84d0 t amdgpu_dm_fini
+ffffffff81fc86b0 t emulated_link_detect
+ffffffff81fc87b0 t amdgpu_dm_atomic_check
+ffffffff81fc9510 t dm_update_plane_state
+ffffffff81fc9b30 t dm_update_crtc_state
+ffffffff81fca510 t dm_check_crtc_cursor
+ffffffff81fca880 t is_scaling_state_different
+ffffffff81fca920 t do_aquire_global_lock
+ffffffff81fcab90 t dm_update_mst_vcpi_slots_for_dsc
+ffffffff81fcad80 t dm_atomic_destroy_state
+ffffffff81fcadc0 t dm_check_cursor_fb
+ffffffff81fcaf50 t fill_dc_plane_attributes
+ffffffff81fcb1e0 t fill_dc_plane_info_and_addr
+ffffffff81fcb510 t fill_hdr_info_packet
+ffffffff81fcb670 t is_timing_unchanged_for_freesync
+ffffffff81fcb7a0 t get_highest_refresh_rate_mode
+ffffffff81fcb8d0 t update_stream_scaling_settings
+ffffffff81fcba10 t amdgpu_dm_atomic_commit_tail
 ffffffff81fce700 t amdgpu_dm_backlight_set_level
 ffffffff81fce8e0 t dm_atomic_duplicate_state
 ffffffff81fce980 t amdgpu_dm_audio_component_bind
@@ -31905,9 +31905,9 @@ ffffffff8201f790 T dcn315_smu_set_dtbclk
 ffffffff82020000 T dcn316_clk_mgr_construct
 ffffffff82020650 T dcn316_clk_mgr_destroy
 ffffffff820206a0 t dcn316_update_clocks
-ffffffff82020c90 t dcn316_enable_pme_wa
-ffffffff82020ca0 t dcn316_notify_wm_ranges
-ffffffff82021020 t find_clk_for_voltage
+ffffffff82020cc0 t dcn316_enable_pme_wa
+ffffffff82020cd0 t dcn316_notify_wm_ranges
+ffffffff82021050 t find_clk_for_voltage
 ffffffff82022000 T dcn316_smu_get_smu_version
 ffffffff82022020 t dcn316_smu_send_msg_with_param
 ffffffff820221b0 T dcn316_smu_set_dispclk
@@ -36792,11 +36792,11 @@ ffffffff823d28a0 t smu_v13_0_4_set_performance_level
 ffffffff823d3460 t smu_v13_0_4_init_smc_tables
 ffffffff823d35d0 t smu_v13_0_4_fini_smc_tables
 ffffffff823d3680 t smu_v13_0_4_system_features_control
-ffffffff823d36d0 t smu_v13_0_4_mode2_reset
-ffffffff823d36f0 t smu_v13_0_4_get_dpm_ultimate_freq
-ffffffff823d3b10 t smu_v13_0_4_get_gpu_metrics
-ffffffff823d3ce0 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters
-ffffffff823d3d40 t smu_v13_0_4_get_current_clk_freq
+ffffffff823d3700 t smu_v13_0_4_mode2_reset
+ffffffff823d3720 t smu_v13_0_4_get_dpm_ultimate_freq
+ffffffff823d3b40 t smu_v13_0_4_get_gpu_metrics
+ffffffff823d3d10 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters
+ffffffff823d3d70 t smu_v13_0_4_get_current_clk_freq
 ffffffff823d4000 T smu_v13_0_5_set_ppt_funcs
 ffffffff823d40a0 t smu_v13_0_5_set_default_dpm_tables
 ffffffff823d40d0 t smu_v13_0_5_print_clk_levels