--- 7.5/2024-04-08T16:39:52Z/2024-03-28T00:00:00Z/nm-bsd-ot14.txt	Wed Apr 10 15:48:13 2024
+++ 7.5/2024-04-08T16:39:52Z/2024-03-29T00:00:00Z/nm-bsd-ot14.txt	Wed Apr 10 18:39:15 2024
@@ -2,14 +2,14 @@
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+ffffffff81ff04e0 t bios_parser_program_crtc_timing
+ffffffff81ff0520 t bios_parser_enable_disp_power_gating
+ffffffff81ff0560 t firmware_parser_destroy
+ffffffff81ff0620 t bios_get_board_layout_info
+ffffffff81ff0ac0 t bios_parser_pack_data_tables
+ffffffff81ff0af0 t bios_get_atom_dc_golden_table
+ffffffff81ff0c30 t bios_parser_enable_lvtma_control
+ffffffff81ff0c80 t bios_parser_get_soc_bb_info
+ffffffff81ff0d90 t bios_parser_get_disp_connector_caps_info
+ffffffff81ff0ef0 t bios_parser_get_lttpr_caps
+ffffffff81ff1040 t bios_parser_get_lttpr_interop
+ffffffff81ff1180 t bios_parser_get_connector_speed_cap_info
+ffffffff81ff12d0 t get_bios_object
+ffffffff81ff1430 t get_bios_object_from_path_v3
+ffffffff81ff2000 T object_id_from_bios_object_id
+ffffffff81ff3000 T bios_get_image
+ffffffff81ff3050 T bios_is_accelerated_mode
+ffffffff81ff30b0 T bios_set_scratch_acc_mode_change
+ffffffff81ff30f0 T bios_set_scratch_critical_state
+ffffffff81ff3130 T bios_get_vga_enabled_displays
+ffffffff81ff4000 T dal_bios_parser_create
+ffffffff81ff4070 T dal_bios_parser_destroy
+ffffffff81ff5000 T dal_bios_parser_init_cmd_tbl
+ffffffff81ff5810 t encoder_control_digx_v3
+ffffffff81ff5910 t encoder_control_digx_v4
+ffffffff81ff5a10 t encoder_control_digx_v5
+ffffffff81ff5b60 t encoder_control_dig1_v1
+ffffffff81ff5be0 t encoder_control_dig2_v1
+ffffffff81ff5c60 t encoder_control_dig_v1
+ffffffff81ff5cc0 t transmitter_control_v2
+ffffffff81ff5e60 t transmitter_control_v3
+ffffffff81ff6010 t transmitter_control_v4
+ffffffff81ff61c0 t transmitter_control_v1_5
+ffffffff81ff6330 t transmitter_control_v1_6
+ffffffff81ff6490 t set_pixel_clock_v3
+ffffffff81ff6600 t set_pixel_clock_v5
+ffffffff81ff67a0 t set_pixel_clock_v6
+ffffffff81ff6940 t set_pixel_clock_v7
+ffffffff81ff6b10 t enable_spread_spectrum_on_ppll_v1
+ffffffff81ff6c30 t enable_spread_spectrum_on_ppll_v2
+ffffffff81ff6d60 t enable_spread_spectrum_on_ppll_v3
+ffffffff81ff6e70 t adjust_display_pll_v2
+ffffffff81ff6fc0 t adjust_display_pll_v3
+ffffffff81ff7130 t dac1_encoder_control_v1
+ffffffff81ff71b0 t dac2_encoder_control_v1
+ffffffff81ff7230 t dac1_output_control_v1
+ffffffff81ff7290 t dac2_output_control_v1
+ffffffff81ff72f0 t set_crtc_using_dtd_timing_v3
+ffffffff81ff7440 t set_crtc_timing_v1
+ffffffff81ff75c0 t enable_crtc_v1
+ffffffff81ff7660 t enable_crtc_mem_req_v1
+ffffffff81ff7700 t program_clock_v5
+ffffffff81ff7810 t program_clock_v6
+ffffffff81ff7930 t external_encoder_control_v3
+ffffffff81ff7ae0 t enable_disp_power_gating_v2_1
+ffffffff81ff7bb0 t set_dce_clock_v2_1
+ffffffff81ff8000 T dal_firmware_parser_init_cmd_tbl
+ffffffff81ff83d0 t encoder_control_digx_v1_5
+ffffffff81ff85a0 t encoder_control_fallback
+ffffffff81ff8600 t transmitter_control_v1_6
+ffffffff81ff87a0 t transmitter_control_v1_7
+ffffffff81ff8990 t transmitter_control_fallback
+ffffffff81ff89f0 t set_pixel_clock_v7
+ffffffff81ff8c40 t set_pixel_clock_fallback
+ffffffff81ff8ca0 t set_crtc_using_dtd_timing_v3
+ffffffff81ff8df0 t enable_crtc_v1
+ffffffff81ff8e90 t external_encoder_control_v3
+ffffffff81ff8ec0 t enable_disp_power_gating_v2_1
+ffffffff81ff9010 t enable_disp_power_gating_fallback
+ffffffff81ff9070 t set_dce_clock_v2_1
+ffffffff81ff91a0 t get_smu_clock_info_v3_1
+ffffffff81ff9210 t enable_lvtma_control
+ffffffff81ffa000 T dal_bios_parser_init_cmd_tbl_helper
+ffffffff81ffa0a0 T dal_cmd_table_helper_controller_id_to_atom
+ffffffff81ffa1c0 T dal_cmd_table_helper_transmitter_bp_to_atom
+ffffffff81ffa240 T dal_cmd_table_helper_encoder_mode_bp_to_atom
+ffffffff81ffa2d0 T dal_cmd_table_helper_assign_control_parameter
+ffffffff81ffa390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src
+ffffffff81ffa470 T dal_cmd_table_helper_encoder_id_to_atom
+ffffffff81ffb000 T dal_bios_parser_init_cmd_tbl_helper2
+ffffffff81ffb0b0 T dal_cmd_table_helper_controller_id_to_atom2
+ffffffff81ffb1c0 T dal_cmd_table_helper_transmitter_bp_to_atom2
+ffffffff81ffb240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2
+ffffffff81ffb2d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2
+ffffffff81ffb3b0 T dal_cmd_table_helper_encoder_id_to_atom2
+ffffffff81ffc000 T dal_cmd_tbl_helper_dce110_get_table
 ffffffff81ffc030 t encoder_action_to_atom
 ffffffff81ffc0b0 t engine_bp_to_atom
 ffffffff81ffc100 t clock_source_id_to_atom
-ffffffff81ffc1d0 t clock_source_id_to_atom_phy_clk_src_id
-ffffffff81ffc220 t signal_type_to_atom_dig_mode
-ffffffff81ffc280 t hpd_sel_to_atom
-ffffffff81ffc2c0 t dig_encoder_sel_to_atom
-ffffffff81ffc2f0 t phy_id_to_atom
-ffffffff81ffc330 t disp_power_gating_action_to_atom
-ffffffff81ffc3a0 t dc_clock_type_to_atom
-ffffffff81ffc420 t transmitter_color_depth_to_atom
-ffffffff81ffd000 T dal_cmd_tbl_helper_dce112_get_table
+ffffffff81ffc1a0 t clock_source_id_to_atom_phy_clk_src_id
+ffffffff81ffc1f0 t signal_type_to_atom_dig_mode
+ffffffff81ffc250 t hpd_sel_to_atom
+ffffffff81ffc290 t dig_encoder_sel_to_atom
+ffffffff81ffc2c0 t phy_id_to_atom
+ffffffff81ffc300 t disp_power_gating_action_to_atom
+ffffffff81ffd000 T dal_cmd_tbl_helper_dce112_get_table2
 ffffffff81ffd030 t encoder_action_to_atom
 ffffffff81ffd0b0 t engine_bp_to_atom
 ffffffff81ffd100 t clock_source_id_to_atom
@@ -31688,7 +31681,7 @@ ffffffff81ffd2f0 t phy_id_to_atom
 ffffffff81ffd330 t disp_power_gating_action_to_atom
 ffffffff81ffd3a0 t dc_clock_type_to_atom
 ffffffff81ffd420 t transmitter_color_depth_to_atom
-ffffffff81ffe000 T dal_cmd_tbl_helper_dce80_get_table
+ffffffff81ffe000 T dal_cmd_tbl_helper_dce112_get_table
 ffffffff81ffe030 t encoder_action_to_atom
 ffffffff81ffe0b0 t engine_bp_to_atom
 ffffffff81ffe100 t clock_source_id_to_atom
@@ -31696,16673 +31689,16677 @@ ffffffff81ffe1d0 t clock_source_id_to_atom_phy_clk_src
 ffffffff81ffe220 t signal_type_to_atom_dig_mode
 ffffffff81ffe280 t hpd_sel_to_atom
 ffffffff81ffe2c0 t dig_encoder_sel_to_atom
-ffffffff81ffe310 t phy_id_to_atom
-ffffffff81ffe350 t disp_power_gating_action_to_atom
-ffffffff81fff000 T clk_mgr_helper_get_active_display_cnt
-ffffffff81fff0e0 T clk_mgr_helper_get_active_plane_cnt
-ffffffff81fff190 T clk_mgr_exit_optimized_pwr_state
-ffffffff81fff2a0 T clk_mgr_optimize_pwr_state
-ffffffff81fff390 T dc_clk_mgr_create
-ffffffff81fffa50 T dc_destroy_clk_mgr
-ffffffff82000000 T dentist_get_divider_from_did
-ffffffff82000070 T dce_adjust_dp_ref_freq_for_ss
-ffffffff82000170 T dce_get_dp_ref_freq_khz
-ffffffff820002a0 T dce12_get_dp_ref_freq_khz
-ffffffff820002c0 T dce_get_max_pixel_clock_for_all_paths
-ffffffff820004d0 T dce_get_required_clocks_state
-ffffffff82000580 T dce_set_clock
-ffffffff820006e0 T dce_clock_read_ss_info
-ffffffff82000800 T dce_clk_mgr_construct
-ffffffff820009f0 t dce_update_clocks
-ffffffff82001000 T dce110_get_min_vblank_time_us
-ffffffff82001090 T dce110_fill_display_configs
-ffffffff82001300 T dce11_pplib_apply_display_requirements
-ffffffff820015f0 T dce110_clk_mgr_construct
-ffffffff820016a0 t dce11_update_clocks
-ffffffff82002000 T dce112_set_clock
-ffffffff82002180 T dce112_set_dispclk
-ffffffff820022a0 T dce112_set_dprefclk
-ffffffff82002310 T dce112_clk_mgr_construct
-ffffffff820023c0 t dce112_update_clocks
-ffffffff82003000 T dce120_clk_mgr_construct
-ffffffff82003090 T dce121_clk_mgr_construct
-ffffffff820031c0 t dce12_update_clocks
-ffffffff82004000 T rv1_clk_mgr_construct
-ffffffff820040c0 t rv1_update_clocks
-ffffffff820045a0 t rv1_init_clocks
-ffffffff82004630 t rv1_enable_pme_wa
-ffffffff82005000 T rv1_vbios_smu_set_dispclk
-ffffffff820050e0 t rv1_vbios_smu_send_msg_with_param
-ffffffff820051f0 T rv1_vbios_smu_set_dprefclk
-ffffffff82006000 T rv2_clk_mgr_construct
-ffffffff82007000 T dentist_get_did_from_divider
-ffffffff82007080 T dcn20_update_clocks_update_dpp_dto
-ffffffff82007150 T dcn20_update_clocks_update_dentist
-ffffffff82007640 T dcn2_update_clocks
-ffffffff82007bc0 T dcn2_read_clocks_from_hw_dentist
-ffffffff82007c90 T dcn2_update_clocks_fpga
-ffffffff82007dc0 T dcn2_init_clocks
-ffffffff82007e60 T dcn2_get_clock
-ffffffff82007ed0 T dcn20_clk_mgr_construct
-ffffffff82008000 t dcn2_enable_pme_wa
-ffffffff82008050 t dcn2_are_clock_states_equal
-ffffffff820080c0 t dcn2_notify_link_rate_change
-ffffffff82009000 T dcn201_clk_mgr_construct
-ffffffff82009120 t dcn201_update_clocks
-ffffffff82009340 t dcn201_init_clocks
-ffffffff8200a000 T rn_clk_mgr_construct
-ffffffff8200a8a0 t rn_update_clocks
-ffffffff8200ae60 t rn_set_low_power_state
-ffffffff8200b040 t rn_init_clocks
-ffffffff8200b0e0 t rn_enable_pme_wa
-ffffffff8200b0f0 t rn_are_clock_states_equal
-ffffffff8200b140 t rn_notify_wm_ranges
-ffffffff8200b4d0 t rn_notify_link_rate_change
-ffffffff8200c000 T rn_vbios_smu_get_smu_version
-ffffffff8200c020 t rn_vbios_smu_send_msg_with_param
-ffffffff8200c1b0 T rn_vbios_smu_set_dispclk
-ffffffff8200c2d0 T rn_vbios_smu_set_dprefclk
-ffffffff8200c340 T rn_vbios_smu_set_hard_min_dcfclk
-ffffffff8200c3c0 T rn_vbios_smu_set_min_deep_sleep_dcfclk
-ffffffff8200c440 T rn_vbios_smu_set_phyclk
-ffffffff8200c480 T rn_vbios_smu_set_dppclk
-ffffffff8200c530 T rn_vbios_smu_set_dcn_low_power_state
-ffffffff8200c550 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn
-ffffffff8200c570 T rn_vbios_smu_enable_pme_wa
-ffffffff8200c590 T rn_vbios_smu_is_periodic_retraining_disabled
-ffffffff8200d000 T dcn3_init_clocks
-ffffffff8200d3b0 t dcn3_init_clocks_fpga
-ffffffff8200d3c0 T dcn3_clk_mgr_construct
-ffffffff8200d510 T dcn3_clk_mgr_destroy
-ffffffff8200d570 t dcn3_update_clocks
-ffffffff8200d990 t dcn3_enable_pme_wa
-ffffffff8200d9d0 t dcn3_are_clock_states_equal
-ffffffff8200da30 t dcn3_notify_wm_ranges
-ffffffff8200dcc0 t dcn30_notify_link_rate_change
-ffffffff8200dde0 t dcn3_set_hard_min_memclk
-ffffffff8200de80 t dcn3_set_hard_max_memclk
-ffffffff8200dee0 t dcn3_set_max_memclk
-ffffffff8200df20 t dcn3_set_min_memclk
-ffffffff8200df60 t dcn3_get_memclk_states_from_smu
-ffffffff8200e0a0 t dcn3_is_smu_present
-ffffffff8200f000 T dcn30_smu_test_message
-ffffffff8200f070 t dcn30_smu_send_msg_with_param
-ffffffff8200f1d0 T dcn30_smu_get_smu_version
-ffffffff8200f1f0 T dcn30_smu_check_driver_if_version
-ffffffff8200f240 T dcn30_smu_check_msg_header_version
-ffffffff8200f290 T dcn30_smu_set_dram_addr_high
-ffffffff8200f2b0 T dcn30_smu_set_dram_addr_low
-ffffffff8200f2d0 T dcn30_smu_transfer_wm_table_smu_2_dram
-ffffffff8200f2f0 T dcn30_smu_transfer_wm_table_dram_2_smu
-ffffffff8200f310 T dcn30_smu_set_hard_min_by_freq
-ffffffff8200f360 T dcn30_smu_set_hard_max_by_freq
-ffffffff8200f3b0 T dcn30_smu_get_dpm_freq_by_index
-ffffffff8200f400 T dcn30_smu_get_dc_mode_max_dpm_freq
-ffffffff8200f450 T dcn30_smu_set_min_deep_sleep_dcef_clk
-ffffffff8200f470 T dcn30_smu_set_num_of_displays
-ffffffff8200f490 T dcn30_smu_set_display_refresh_from_mall
-ffffffff8200f4c0 T dcn30_smu_set_external_client_df_cstate_allow
-ffffffff8200f4e0 T dcn30_smu_set_pme_workaround
-ffffffff82010000 T dcn301_smu_get_smu_version
-ffffffff82010070 t dcn301_smu_send_msg_with_param
-ffffffff820101f0 T dcn301_smu_set_dispclk
-ffffffff82010290 T dcn301_smu_set_dprefclk
-ffffffff82010340 T dcn301_smu_set_hard_min_dcfclk
-ffffffff820103e0 T dcn301_smu_set_min_deep_sleep_dcfclk
-ffffffff82010480 T dcn301_smu_set_dppclk
-ffffffff82010520 T dcn301_smu_set_display_idle_optimization
-ffffffff82010570 T dcn301_smu_enable_phy_refclk_pwrdwn
-ffffffff820105c0 T dcn301_smu_enable_pme_wa
-ffffffff820105e0 T dcn301_smu_set_dram_addr_high
-ffffffff82010630 T dcn301_smu_set_dram_addr_low
-ffffffff82010680 T dcn301_smu_transfer_dpm_table_smu_2_dram
-ffffffff820106a0 T dcn301_smu_transfer_wm_table_dram_2_smu
-ffffffff82011000 T vg_clk_mgr_construct
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-ffffffff82011890 t vg_update_clocks
-ffffffff82011bd0 t vg_init_clocks
-ffffffff82011c70 t vg_enable_pme_wa
-ffffffff82011c80 t vg_are_clock_states_equal
-ffffffff82011cd0 t vg_notify_wm_ranges
-ffffffff82013000 T dcn31_update_clocks
-ffffffff82013610 T dcn31_init_clocks
-ffffffff820136c0 T dcn31_are_clock_states_equal
-ffffffff82013720 T dcn31_get_dtb_ref_freq_khz
-ffffffff82013750 T dcn31_clk_mgr_construct
-ffffffff82013e20 T dcn31_clk_mgr_destroy
-ffffffff82013e70 t dcn31_set_low_power_state
-ffffffff82014080 t dcn31_enable_pme_wa
-ffffffff82014090 t dcn31_notify_wm_ranges
-ffffffff82014410 t find_clk_for_voltage
-ffffffff82015000 T dcn31_smu_get_smu_version
-ffffffff82015020 t dcn31_smu_send_msg_with_param
-ffffffff82015230 T dcn31_smu_set_dispclk
-ffffffff820152a0 T dcn31_smu_set_dprefclk
-ffffffff82015310 T dcn31_smu_set_hard_min_dcfclk
-ffffffff82015390 T dcn31_smu_set_min_deep_sleep_dcfclk
-ffffffff82015410 T dcn31_smu_set_dppclk
-ffffffff82015480 T dcn31_smu_set_display_idle_optimization
-ffffffff820154d0 T dcn31_smu_enable_phy_refclk_pwrdwn
-ffffffff82015520 T dcn31_smu_enable_pme_wa
-ffffffff82015560 T dcn31_smu_set_dram_addr_high
-ffffffff820155a0 T dcn31_smu_set_dram_addr_low
-ffffffff820155e0 T dcn31_smu_transfer_dpm_table_smu_2_dram
-ffffffff82015620 T dcn31_smu_transfer_wm_table_dram_2_smu
-ffffffff82015660 T dcn31_smu_set_zstate_support
-ffffffff820156d0 T dcn31_smu_set_dtbclk
-ffffffff82016000 T dcn314_update_clocks
-ffffffff82016650 T dcn314_are_clock_states_equal
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-ffffffff82017410 t dcn314_enable_pme_wa
-ffffffff82017420 t dcn314_notify_wm_ranges
-ffffffff82018000 T dcn314_smu_get_smu_version
-ffffffff82018020 t dcn314_smu_send_msg_with_param
-ffffffff82018250 T dcn314_smu_set_dispclk
-ffffffff820182c0 T dcn314_smu_set_dprefclk
-ffffffff82018330 T dcn314_smu_set_hard_min_dcfclk
-ffffffff820183b0 T dcn314_smu_set_min_deep_sleep_dcfclk
-ffffffff82018430 T dcn314_smu_set_dppclk
-ffffffff820184a0 T dcn314_smu_set_display_idle_optimization
-ffffffff820184f0 T dcn314_smu_enable_phy_refclk_pwrdwn
-ffffffff82018540 T dcn314_smu_enable_pme_wa
-ffffffff82018580 T dcn314_smu_set_dram_addr_high
-ffffffff820185c0 T dcn314_smu_set_dram_addr_low
-ffffffff82018600 T dcn314_smu_transfer_dpm_table_smu_2_dram
-ffffffff82018640 T dcn314_smu_transfer_wm_table_dram_2_smu
-ffffffff82018680 T dcn314_smu_set_zstate_support
-ffffffff820186d0 T dcn314_smu_set_dtbclk
-ffffffff82019000 T dcn315_clk_mgr_construct
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-ffffffff82019860 t dcn315_update_clocks
-ffffffff82019da0 t dcn315_enable_pme_wa
-ffffffff82019db0 t dcn315_notify_wm_ranges
-ffffffff8201a130 t dcn315_disable_otg_wa
-ffffffff8201b000 T dcn315_smu_get_smu_version
-ffffffff8201b020 t dcn315_smu_send_msg_with_param
-ffffffff8201b310 T dcn315_smu_set_dispclk
-ffffffff8201b380 T dcn315_smu_set_hard_min_dcfclk
-ffffffff8201b400 T dcn315_smu_set_min_deep_sleep_dcfclk
-ffffffff8201b480 T dcn315_smu_set_dppclk
-ffffffff8201b4f0 T dcn315_smu_set_display_idle_optimization
-ffffffff8201b540 T dcn315_smu_enable_phy_refclk_pwrdwn
-ffffffff8201b590 T dcn315_smu_enable_pme_wa
-ffffffff8201b5d0 T dcn315_smu_set_dram_addr_high
-ffffffff8201b610 T dcn315_smu_set_dram_addr_low
-ffffffff8201b650 T dcn315_smu_transfer_dpm_table_smu_2_dram
-ffffffff8201b690 T dcn315_smu_transfer_wm_table_dram_2_smu
-ffffffff8201b6d0 T dcn315_smu_get_dpref_clk
-ffffffff8201b730 T dcn315_smu_get_dtbclk
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-ffffffff8201c000 T dcn316_clk_mgr_construct
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-ffffffff8201c6a0 t dcn316_update_clocks
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-ffffffff8201cca0 t dcn316_notify_wm_ranges
-ffffffff8201d020 t find_clk_for_voltage
-ffffffff8201e000 T dcn316_smu_get_smu_version
-ffffffff8201e020 t dcn316_smu_send_msg_with_param
-ffffffff8201e1b0 T dcn316_smu_set_dispclk
-ffffffff8201e220 T dcn316_smu_set_hard_min_dcfclk
-ffffffff8201e2a0 T dcn316_smu_set_min_deep_sleep_dcfclk
-ffffffff8201e320 T dcn316_smu_set_dppclk
-ffffffff8201e390 T dcn316_smu_set_display_idle_optimization
-ffffffff8201e3e0 T dcn316_smu_enable_phy_refclk_pwrdwn
-ffffffff8201e430 T dcn316_smu_set_dram_addr_high
-ffffffff8201e470 T dcn316_smu_set_dram_addr_low
-ffffffff8201e4b0 T dcn316_smu_transfer_dpm_table_smu_2_dram
-ffffffff8201e4f0 T dcn316_smu_transfer_wm_table_dram_2_smu
-ffffffff8201e530 T dcn316_smu_enable_pme_wa
-ffffffff8201e570 T dcn316_smu_set_dtbclk
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-ffffffff8201e610 T dcn316_smu_get_smu_fclk
-ffffffff8201f000 T dcn32_init_clocks
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-ffffffff82020460 t dcn32_are_clock_states_equal
-ffffffff820204d0 t dcn32_notify_wm_ranges
-ffffffff82020650 t dcn32_set_hard_min_memclk
-ffffffff820206e0 t dcn32_set_hard_max_memclk
-ffffffff82020730 t dcn32_set_max_memclk
-ffffffff82020770 t dcn32_set_min_memclk
-ffffffff820207b0 t dcn32_get_memclk_states_from_smu
-ffffffff82020a00 t dcn32_is_smu_present
-ffffffff82020a30 t dcn32_get_dispclk_from_dentist
-ffffffff82020ac0 t dcn32_update_clocks_update_dentist
-ffffffff82021000 T dcn32_smu_send_fclk_pstate_message
-ffffffff82021020 t dcn32_smu_send_msg_with_param
-ffffffff82021160 T dcn32_smu_send_cab_for_uclk_message
-ffffffff82021190 T dcn32_smu_transfer_wm_table_dram_2_smu
-ffffffff820211b0 T dcn32_smu_set_pme_workaround
-ffffffff820211d0 T dcn32_smu_set_hard_min_by_freq
-ffffffff82021220 T dcn32_smu_wait_for_dmub_ack_mclk
-ffffffff82022000 T dc_stream_adjust_vmin_vmax
-ffffffff82022170 T dc_stream_get_last_used_drr_vtotal
-ffffffff820222d0 T dc_stream_get_crtc_position
-ffffffff82022500 T dc_stream_configure_crc
-ffffffff82022670 T dc_stream_get_crc
-ffffffff82022750 T dc_stream_set_dyn_expansion
-ffffffff820229c0 T dc_stream_set_dither_option
-ffffffff82022b60 T dc_stream_set_gamut_remap
-ffffffff82022ce0 T dc_stream_program_csc_matrix
-ffffffff82022f00 T dc_stream_set_static_screen_params
-ffffffff82023080 T dc_create
-ffffffff82023600 t dc_construct_ctx
-ffffffff82023770 t dc_destruct
-ffffffff82023a40 T dc_hardware_init
-ffffffff82023b10 T dc_init_callbacks
-ffffffff82023b60 T dc_deinit_callbacks
-ffffffff82023bb0 T dc_destroy
-ffffffff82023c00 T dc_validate_boot_timing
-ffffffff82023fa0 T dc_enable_stereo
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-ffffffff82290c30 T Calculate256BBlockSizes
-ffffffff82290d20 T CalculateMinAndMaxPrefetchMode
-ffffffff82290da0 T ModeSupportAndSystemConfiguration
-ffffffff822910b0 T CalculateWriteBackDISPCLK
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-ffffffff822b0380 T dal_gpio_service_create_generic_mux
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-ffffffff822b90a0 T dce110_vblank_set
-ffffffff822b9170 T to_dal_irq_source_dce110
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-ffffffff822ba080 t hpd_ack
-ffffffff822bb000 T dal_irq_service_dce80_create
+ffffffff81ffe2f0 t phy_id_to_atom
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+ffffffff81ffe3a0 t dc_clock_type_to_atom
+ffffffff81ffe420 t transmitter_color_depth_to_atom
+ffffffff81fff000 T dal_cmd_tbl_helper_dce80_get_table
+ffffffff81fff030 t encoder_action_to_atom
+ffffffff81fff0b0 t engine_bp_to_atom
+ffffffff81fff100 t clock_source_id_to_atom
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+ffffffff81fff220 t signal_type_to_atom_dig_mode
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+ffffffff81fff2c0 t dig_encoder_sel_to_atom
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+ffffffff82000000 T clk_mgr_helper_get_active_display_cnt
+ffffffff820000e0 T clk_mgr_helper_get_active_plane_cnt
+ffffffff82000190 T clk_mgr_exit_optimized_pwr_state
+ffffffff820002a0 T clk_mgr_optimize_pwr_state
+ffffffff82000390 T dc_clk_mgr_create
+ffffffff82000a50 T dc_destroy_clk_mgr
+ffffffff82001000 T dentist_get_divider_from_did
+ffffffff82001070 T dce_adjust_dp_ref_freq_for_ss
+ffffffff82001170 T dce_get_dp_ref_freq_khz
+ffffffff820012a0 T dce12_get_dp_ref_freq_khz
+ffffffff820012c0 T dce_get_max_pixel_clock_for_all_paths
+ffffffff820014d0 T dce_get_required_clocks_state
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+ffffffff820016e0 T dce_clock_read_ss_info
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+ffffffff820019f0 t dce_update_clocks
+ffffffff82002000 T dce110_get_min_vblank_time_us
+ffffffff82002090 T dce110_fill_display_configs
+ffffffff82002300 T dce11_pplib_apply_display_requirements
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+ffffffff820026a0 t dce11_update_clocks
+ffffffff82003000 T dce112_set_clock
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+ffffffff820032a0 T dce112_set_dprefclk
+ffffffff82003310 T dce112_clk_mgr_construct
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+ffffffff82004000 T dce120_clk_mgr_construct
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+ffffffff820041c0 t dce12_update_clocks
+ffffffff82005000 T rv1_clk_mgr_construct
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+ffffffff820055a0 t rv1_init_clocks
+ffffffff82005630 t rv1_enable_pme_wa
+ffffffff82006000 T rv1_vbios_smu_set_dispclk
+ffffffff820060e0 t rv1_vbios_smu_send_msg_with_param
+ffffffff820061f0 T rv1_vbios_smu_set_dprefclk
+ffffffff82007000 T rv2_clk_mgr_construct
+ffffffff82008000 T dentist_get_did_from_divider
+ffffffff82008080 T dcn20_update_clocks_update_dpp_dto
+ffffffff82008150 T dcn20_update_clocks_update_dentist
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+ffffffff82009000 t dcn2_enable_pme_wa
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+ffffffff820090c0 t dcn2_notify_link_rate_change
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+ffffffff8200b000 T rn_clk_mgr_construct
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+ffffffff8200be60 t rn_set_low_power_state
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+ffffffff8200c0f0 t rn_are_clock_states_equal
+ffffffff8200c140 t rn_notify_wm_ranges
+ffffffff8200c4d0 t rn_notify_link_rate_change
+ffffffff8200d000 T rn_vbios_smu_get_smu_version
+ffffffff8200d020 t rn_vbios_smu_send_msg_with_param
+ffffffff8200d1b0 T rn_vbios_smu_set_dispclk
+ffffffff8200d2d0 T rn_vbios_smu_set_dprefclk
+ffffffff8200d340 T rn_vbios_smu_set_hard_min_dcfclk
+ffffffff8200d3c0 T rn_vbios_smu_set_min_deep_sleep_dcfclk
+ffffffff8200d440 T rn_vbios_smu_set_phyclk
+ffffffff8200d480 T rn_vbios_smu_set_dppclk
+ffffffff8200d530 T rn_vbios_smu_set_dcn_low_power_state
+ffffffff8200d550 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn
+ffffffff8200d570 T rn_vbios_smu_enable_pme_wa
+ffffffff8200d590 T rn_vbios_smu_is_periodic_retraining_disabled
+ffffffff8200e000 T dcn3_init_clocks
+ffffffff8200e3b0 t dcn3_init_clocks_fpga
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+ffffffff8200ecc0 t dcn30_notify_link_rate_change
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+ffffffff820101d0 T dcn30_smu_get_smu_version
+ffffffff820101f0 T dcn30_smu_check_driver_if_version
+ffffffff82010240 T dcn30_smu_check_msg_header_version
+ffffffff82010290 T dcn30_smu_set_dram_addr_high
+ffffffff820102b0 T dcn30_smu_set_dram_addr_low
+ffffffff820102d0 T dcn30_smu_transfer_wm_table_smu_2_dram
+ffffffff820102f0 T dcn30_smu_transfer_wm_table_dram_2_smu
+ffffffff82010310 T dcn30_smu_set_hard_min_by_freq
+ffffffff82010360 T dcn30_smu_set_hard_max_by_freq
+ffffffff820103b0 T dcn30_smu_get_dpm_freq_by_index
+ffffffff82010400 T dcn30_smu_get_dc_mode_max_dpm_freq
+ffffffff82010450 T dcn30_smu_set_min_deep_sleep_dcef_clk
+ffffffff82010470 T dcn30_smu_set_num_of_displays
+ffffffff82010490 T dcn30_smu_set_display_refresh_from_mall
+ffffffff820104c0 T dcn30_smu_set_external_client_df_cstate_allow
+ffffffff820104e0 T dcn30_smu_set_pme_workaround
+ffffffff82011000 T dcn301_smu_get_smu_version
+ffffffff82011070 t dcn301_smu_send_msg_with_param
+ffffffff820111f0 T dcn301_smu_set_dispclk
+ffffffff82011290 T dcn301_smu_set_dprefclk
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+ffffffff82011480 T dcn301_smu_set_dppclk
+ffffffff82011520 T dcn301_smu_set_display_idle_optimization
+ffffffff82011570 T dcn301_smu_enable_phy_refclk_pwrdwn
+ffffffff820115c0 T dcn301_smu_enable_pme_wa
+ffffffff820115e0 T dcn301_smu_set_dram_addr_high
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+ffffffff82011680 T dcn301_smu_transfer_dpm_table_smu_2_dram
+ffffffff820116a0 T dcn301_smu_transfer_wm_table_dram_2_smu
+ffffffff82012000 T vg_clk_mgr_construct
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+ffffffff82012890 t vg_update_clocks
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+ffffffff82012c70 t vg_enable_pme_wa
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+ffffffff82014000 T dcn31_update_clocks
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+ffffffff820146c0 T dcn31_are_clock_states_equal
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+ffffffff82014e70 t dcn31_set_low_power_state
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+ffffffff82015090 t dcn31_notify_wm_ranges
+ffffffff82015410 t find_clk_for_voltage
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+ffffffff82016230 T dcn31_smu_set_dispclk
+ffffffff820162a0 T dcn31_smu_set_dprefclk
+ffffffff82016310 T dcn31_smu_set_hard_min_dcfclk
+ffffffff82016390 T dcn31_smu_set_min_deep_sleep_dcfclk
+ffffffff82016410 T dcn31_smu_set_dppclk
+ffffffff82016480 T dcn31_smu_set_display_idle_optimization
+ffffffff820164d0 T dcn31_smu_enable_phy_refclk_pwrdwn
+ffffffff82016520 T dcn31_smu_enable_pme_wa
+ffffffff82016560 T dcn31_smu_set_dram_addr_high
+ffffffff820165a0 T dcn31_smu_set_dram_addr_low
+ffffffff820165e0 T dcn31_smu_transfer_dpm_table_smu_2_dram
+ffffffff82016620 T dcn31_smu_transfer_wm_table_dram_2_smu
+ffffffff82016660 T dcn31_smu_set_zstate_support
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+ffffffff82018420 t dcn314_notify_wm_ranges
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+ffffffff820193b0 T dcn314_smu_set_min_deep_sleep_dcfclk
+ffffffff82019430 T dcn314_smu_set_dppclk
+ffffffff820194a0 T dcn314_smu_set_display_idle_optimization
+ffffffff820194f0 T dcn314_smu_enable_phy_refclk_pwrdwn
+ffffffff82019540 T dcn314_smu_enable_pme_wa
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+ffffffff82019640 T dcn314_smu_transfer_wm_table_dram_2_smu
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+ffffffff8201adb0 t dcn315_notify_wm_ranges
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+ffffffff8201c000 T dcn315_smu_get_smu_version
+ffffffff8201c020 t dcn315_smu_send_msg_with_param
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+ffffffff8201c480 T dcn315_smu_set_dppclk
+ffffffff8201c4f0 T dcn315_smu_set_display_idle_optimization
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+ffffffff8228b430 T get_tcalc
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+ffffffff8228b880 T get_comp_buffer_size_kbytes
+ffffffff8228b990 T get_pixel_chunk_size_in_kbyte
+ffffffff8228bab0 T get_alpha_pixel_chunk_size_in_kbyte
+ffffffff8228bbd0 T get_meta_chunk_size_in_kbyte
+ffffffff8228bcf0 T get_min_pixel_chunk_size_in_byte
+ffffffff8228be00 T get_min_meta_chunk_size_in_byte
+ffffffff8228bf20 T get_fclk_watermark
+ffffffff8228c030 T get_usr_retraining_watermark
+ffffffff8228c140 T get_comp_buffer_reserved_space_kbytes
+ffffffff8228c260 T get_comp_buffer_reserved_space_64bytes
+ffffffff8228c380 T get_comp_buffer_reserved_space_zs
+ffffffff8228c4a0 T get_unbounded_request_enabled
+ffffffff8228c5c0 T get_dsc_delay
+ffffffff8228c6f0 T get_dppclk_calculated
+ffffffff8228c810 T get_dscclk_calculated
+ffffffff8228c930 T get_min_ttu_vblank
+ffffffff8228ca50 T get_min_ttu_vblank_in_us
+ffffffff8228cb70 T get_vratio_prefetch_l
+ffffffff8228cc90 T get_vratio_prefetch_c
+ffffffff8228cdb0 T get_dst_x_after_scaler
+ffffffff8228ced0 T get_dst_y_after_scaler
+ffffffff8228cff0 T get_dst_y_per_vm_vblank
+ffffffff8228d110 T get_dst_y_per_row_vblank
+ffffffff8228d230 T get_dst_y_prefetch
+ffffffff8228d350 T get_dst_y_per_vm_flip
+ffffffff8228d470 T get_dst_y_per_row_flip
+ffffffff8228d590 T get_refcyc_per_vm_group_vblank
+ffffffff8228d6b0 T get_refcyc_per_vm_group_flip
+ffffffff8228d7d0 T get_refcyc_per_vm_req_vblank
+ffffffff8228d8f0 T get_refcyc_per_vm_req_flip
+ffffffff8228da10 T get_refcyc_per_vm_group_vblank_in_us
+ffffffff8228db30 T get_refcyc_per_vm_group_flip_in_us
+ffffffff8228dc50 T get_refcyc_per_vm_req_vblank_in_us
+ffffffff8228dd70 T get_refcyc_per_vm_req_flip_in_us
+ffffffff8228de90 T get_refcyc_per_vm_dmdata_in_us
+ffffffff8228dfb0 T get_dmdata_dl_delta_in_us
+ffffffff8228e0d0 T get_refcyc_per_line_delivery_l_in_us
+ffffffff8228e1f0 T get_refcyc_per_line_delivery_c_in_us
+ffffffff8228e310 T get_refcyc_per_line_delivery_pre_l_in_us
+ffffffff8228e430 T get_refcyc_per_line_delivery_pre_c_in_us
+ffffffff8228e550 T get_refcyc_per_req_delivery_l_in_us
+ffffffff8228e670 T get_refcyc_per_req_delivery_c_in_us
+ffffffff8228e790 T get_refcyc_per_req_delivery_pre_l_in_us
+ffffffff8228e8b0 T get_refcyc_per_req_delivery_pre_c_in_us
+ffffffff8228e9d0 T get_refcyc_per_cursor_req_delivery_in_us
+ffffffff8228eaf0 T get_refcyc_per_cursor_req_delivery_pre_in_us
+ffffffff8228ec10 T get_refcyc_per_meta_chunk_nom_l_in_us
+ffffffff8228ed30 T get_refcyc_per_meta_chunk_nom_c_in_us
+ffffffff8228ee50 T get_refcyc_per_meta_chunk_vblank_l_in_us
+ffffffff8228ef70 T get_refcyc_per_meta_chunk_vblank_c_in_us
+ffffffff8228f090 T get_refcyc_per_meta_chunk_flip_l_in_us
+ffffffff8228f1b0 T get_refcyc_per_meta_chunk_flip_c_in_us
+ffffffff8228f2d0 T get_vstartup
+ffffffff8228f400 T get_vupdate_offset
+ffffffff8228f530 T get_vupdate_width
+ffffffff8228f650 T get_vready_offset
+ffffffff8228f770 T get_vready_at_or_after_vsync
+ffffffff8228f8a0 T get_min_dst_y_next_start
+ffffffff8228f9d0 T get_dst_y_per_pte_row_nom_l
+ffffffff8228faf0 T get_dst_y_per_pte_row_nom_c
+ffffffff8228fc10 T get_dst_y_per_meta_row_nom_l
+ffffffff8228fd30 T get_dst_y_per_meta_row_nom_c
+ffffffff8228fe50 T get_refcyc_per_pte_group_nom_l_in_us
+ffffffff8228ff70 T get_refcyc_per_pte_group_nom_c_in_us
+ffffffff82290090 T get_refcyc_per_pte_group_vblank_l_in_us
+ffffffff822901b0 T get_refcyc_per_pte_group_vblank_c_in_us
+ffffffff822902d0 T get_refcyc_per_pte_group_flip_l_in_us
+ffffffff822903f0 T get_refcyc_per_pte_group_flip_c_in_us
+ffffffff82290510 T get_vstartup_calculated
+ffffffff82290640 T get_dpte_row_height_linear_c
+ffffffff82290770 T get_swath_height_l
+ffffffff822908a0 T get_swath_height_c
+ffffffff822909d0 T get_det_stored_buffer_size_l_bytes
+ffffffff82290b00 T get_det_stored_buffer_size_c_bytes
+ffffffff82290c30 T get_dpte_group_size_in_bytes
+ffffffff82290d60 T get_vm_group_size_in_bytes
+ffffffff82290e90 T get_dpte_row_height_linear_l
+ffffffff82290fc0 T get_pte_buffer_mode
+ffffffff822910f0 T get_subviewport_lines_needed_in_mall
+ffffffff82291220 T get_surface_size_in_mall
+ffffffff82291350 T get_total_immediate_flip_bytes
+ffffffff82291470 T get_total_immediate_flip_bw
+ffffffff82291650 T get_total_prefetch_bw
+ffffffff82291830 T get_total_surface_size_in_mall_bytes
+ffffffff822919d0 T get_det_buffer_size_kbytes
+ffffffff82291b00 T get_is_phantom_pipe
+ffffffff82291c30 T Calculate256BBlockSizes
+ffffffff82291d20 T CalculateMinAndMaxPrefetchMode
+ffffffff82291da0 T ModeSupportAndSystemConfiguration
+ffffffff822920b0 T CalculateWriteBackDISPCLK
+ffffffff82293000 T print__rq_params_st
+ffffffff82293030 T print__data_rq_sizing_params_st
+ffffffff82293060 T print__data_rq_dlg_params_st
+ffffffff82293090 T print__data_rq_misc_params_st
+ffffffff822930c0 T print__rq_dlg_params_st
+ffffffff822930f0 T print__dlg_sys_params_st
+ffffffff82293120 T print__data_rq_regs_st
+ffffffff82293150 T print__rq_regs_st
+ffffffff82293180 T print__dlg_regs_st
+ffffffff822931b0 T print__ttu_regs_st
+ffffffff82294000 T dml1_extract_rq_regs
+ffffffff82294330 T dml1_rq_dlg_get_rq_params
+ffffffff82294510 t get_surf_rq_param
+ffffffff822950c0 T dml1_rq_dlg_get_dlg_params
+ffffffff82298000 T _do_calc_rc_params
+ffffffff82298fc0 t get_qp_set
+ffffffff8229a000 T dc_bandwidth_in_kbps_from_timing
+ffffffff8229a290 T dc_dsc_stream_bandwidth_in_kbps
+ffffffff8229a3e0 T dc_dsc_parse_dsc_dpcd
+ffffffff8229a680 t dsc_throughput_from_dpcd
+ffffffff8229a840 T dc_dsc_compute_bandwidth_range
+ffffffff8229aa30 t intersect_dsc_caps
+ffffffff8229ac00 t setup_dsc_config
+ffffffff8229b3d0 T dc_dsc_compute_config
+ffffffff8229b4c0 T dc_dsc_stream_bandwidth_overhead_in_kbps
+ffffffff8229b600 T dc_dsc_get_policy_for_timing
+ffffffff8229b6a0 T dc_dsc_policy_set_max_target_bpp_limit
+ffffffff8229b6d0 T dc_dsc_policy_set_enable_dsc_when_not_needed
+ffffffff8229b700 T dc_dsc_policy_set_disable_dsc_stream_overhead
+ffffffff8229b730 T dc_set_disable_128b_132b_stream_overhead
+ffffffff8229b760 T dc_dsc_get_default_config_option
+ffffffff8229b7b0 t fit_num_slices_up
+ffffffff8229b860 t decide_dsc_target_bpp_x16
+ffffffff8229c000 T calc_rc_params
+ffffffff8229d000 T dscc_compute_dsc_parameters
+ffffffff8229e000 T dal_hw_factory_dce110_init
+ffffffff8229e060 t define_hpd_registers
+ffffffff8229e0b0 t define_ddc_registers
+ffffffff8229f000 T dal_hw_translate_dce110_init
+ffffffff8229f030 t offset_to_id
+ffffffff8229f390 t id_to_offset
+ffffffff822a0000 T dal_hw_factory_dce120_init
+ffffffff822a0060 t define_hpd_registers
+ffffffff822a00b0 t define_ddc_registers
+ffffffff822a1000 T dal_hw_translate_dce120_init
+ffffffff822a1030 t offset_to_id
+ffffffff822a13a0 t id_to_offset
+ffffffff822a2000 T dal_hw_factory_dce80_init
+ffffffff822a2060 t define_hpd_registers
+ffffffff822a20b0 t define_ddc_registers
+ffffffff822a3000 T dal_hw_translate_dce80_init
+ffffffff822a3030 t offset_to_id
+ffffffff822a37b0 t id_to_offset
+ffffffff822a4000 T dal_hw_factory_dcn10_init
+ffffffff822a4060 t define_hpd_registers
+ffffffff822a40b0 t define_ddc_registers
+ffffffff822a4150 t define_generic_registers
+ffffffff822a5000 T dal_hw_translate_dcn10_init
+ffffffff822a5030 t offset_to_id
+ffffffff822a5390 t id_to_offset
+ffffffff822a6000 T dal_hw_factory_dcn20_init
+ffffffff822a6060 t define_hpd_registers
+ffffffff822a60b0 t define_ddc_registers
+ffffffff822a6160 t define_generic_registers
+ffffffff822a7000 T dal_hw_translate_dcn20_init
+ffffffff822a7030 t offset_to_id
+ffffffff822a72b0 t id_to_offset
+ffffffff822a8000 T dal_hw_factory_dcn21_init
+ffffffff822a8060 t define_hpd_registers
+ffffffff822a80b0 t define_ddc_registers
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+ffffffff822a9000 T dal_hw_translate_dcn21_init
+ffffffff822a9030 t offset_to_id
+ffffffff822a92b0 t id_to_offset
+ffffffff822aa000 T dal_hw_factory_dcn30_init
+ffffffff822aa060 t define_hpd_registers
+ffffffff822aa0b0 t define_ddc_registers
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+ffffffff822ab000 T dal_hw_translate_dcn30_init
+ffffffff822ab030 t offset_to_id
+ffffffff822ab2c0 t id_to_offset
+ffffffff822ac000 T dal_hw_factory_dcn315_init
+ffffffff822ac060 t define_hpd_registers
+ffffffff822ac0b0 t define_ddc_registers
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+ffffffff822ad000 T dal_hw_translate_dcn315_init
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+ffffffff822ae000 T dal_hw_factory_dcn32_init
+ffffffff822ae060 t define_hpd_registers
+ffffffff822ae0b0 t define_ddc_registers
+ffffffff822ae160 t define_generic_registers
+ffffffff822af000 T dal_hw_translate_dcn32_init
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+ffffffff822b0000 T dal_gpio_open
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+ffffffff822b0180 T dal_gpio_get_value
+ffffffff822b0200 T dal_gpio_set_value
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+ffffffff822b02b0 T dal_gpio_lock_pin
+ffffffff822b02d0 T dal_gpio_unlock_pin
+ffffffff822b02f0 T dal_gpio_change_mode
+ffffffff822b0370 T dal_gpio_get_id
+ffffffff822b03a0 T dal_gpio_get_enum
+ffffffff822b03d0 T dal_gpio_set_config
+ffffffff822b0450 T dal_gpio_get_pin_info
+ffffffff822b04b0 T dal_gpio_get_sync_source
+ffffffff822b0540 T dal_gpio_get_output_state
+ffffffff822b0570 T dal_gpio_get_ddc
+ffffffff822b05a0 T dal_gpio_get_hpd
+ffffffff822b05d0 T dal_gpio_get_generic
+ffffffff822b0600 T dal_gpio_close
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+ffffffff822b1240 T dal_gpio_service_create_irq
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+ffffffff822b1380 T dal_gpio_service_create_generic_mux
+ffffffff822b1420 T dal_gpio_destroy_generic_mux
+ffffffff822b14b0 T dal_gpio_get_generic_pin_info
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+ffffffff822b1640 T dal_mux_setup_config
+ffffffff822b16a0 T dal_gpio_service_lock
+ffffffff822b1720 T dal_gpio_service_unlock
+ffffffff822b17a0 T dal_gpio_service_open
+ffffffff822b19e0 T dal_gpio_service_close
+ffffffff822b1a80 T dal_irq_get_source
+ffffffff822b1af0 T dal_irq_get_rx_source
+ffffffff822b1b40 T dal_irq_setup_hpd_filter
+ffffffff822b1ba0 T dal_gpio_destroy_irq
+ffffffff822b1c30 T dal_gpio_create_ddc
+ffffffff822b1da0 T dal_gpio_destroy_ddc
+ffffffff822b1e70 T dal_ddc_close
+ffffffff822b1ec0 T dal_ddc_open
+ffffffff822b2020 T dal_ddc_change_mode
+ffffffff822b20c0 T dal_ddc_get_line
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+ffffffff822b3000 T dal_hw_ddc_init
+ffffffff822b3100 T dal_hw_ddc_get_pin
+ffffffff822b3110 t dal_hw_ddc_destroy
+ffffffff822b3170 t set_config
+ffffffff822b4000 T dal_hw_factory_init
+ffffffff822b5000 T dal_hw_generic_init
+ffffffff822b5100 T dal_hw_generic_get_pin
+ffffffff822b5110 t dal_hw_generic_destroy
+ffffffff822b5170 t set_config
+ffffffff822b6000 T dal_hw_gpio_open
+ffffffff822b60b0 T dal_hw_gpio_config_mode
+ffffffff822b61a0 T dal_hw_gpio_get_value
+ffffffff822b6200 T dal_hw_gpio_set_value
+ffffffff822b6290 T dal_hw_gpio_change_mode
+ffffffff822b62a0 T dal_hw_gpio_close
+ffffffff822b6350 T dal_hw_gpio_construct
+ffffffff822b63b0 T dal_hw_gpio_destruct
+ffffffff822b7000 T dal_hw_hpd_init
+ffffffff822b7100 T dal_hw_hpd_get_pin
+ffffffff822b7110 t dal_hw_hpd_destroy
+ffffffff822b7170 t get_value
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+ffffffff822b8000 T dal_hw_translate_init
+ffffffff822b9000 T dc_process_hdcp_msg
+ffffffff822b9180 t hdmi_14_process_transaction
+ffffffff822b92d0 t dp_11_process_transaction
+ffffffff822ba000 T dal_irq_service_dummy_set
+ffffffff822ba050 T dal_irq_service_dummy_ack
+ffffffff822ba0a0 T dce110_vblank_set
+ffffffff822ba170 T to_dal_irq_source_dce110
+ffffffff822ba2f0 T dal_irq_service_dce110_create
+ffffffff822ba370 t hpd_ack
+ffffffff822bb000 T dal_irq_service_dce120_create
 ffffffff822bb080 t hpd_ack
-ffffffff822bc000 T dal_irq_service_dcn10_create
+ffffffff822bc000 T dal_irq_service_dce80_create
 ffffffff822bc080 t hpd_ack
-ffffffff822bc130 t to_dal_irq_source_dcn10
-ffffffff822bd000 T dal_irq_service_dcn20_create
+ffffffff822bd000 T dal_irq_service_dcn10_create
 ffffffff822bd080 t hpd_ack
-ffffffff822bd130 t to_dal_irq_source_dcn20
-ffffffff822be000 T dal_irq_service_dcn201_create
+ffffffff822bd130 t to_dal_irq_source_dcn10
+ffffffff822be000 T dal_irq_service_dcn20_create
 ffffffff822be080 t hpd_ack
-ffffffff822be130 t to_dal_irq_source_dcn201
-ffffffff822bf000 T dal_irq_service_dcn21_create
+ffffffff822be130 t to_dal_irq_source_dcn20
+ffffffff822bf000 T dal_irq_service_dcn201_create
 ffffffff822bf080 t hpd_ack
-ffffffff822bf130 t to_dal_irq_source_dcn21
-ffffffff822c0000 T dal_irq_service_dcn30_create
+ffffffff822bf130 t to_dal_irq_source_dcn201
+ffffffff822c0000 T dal_irq_service_dcn21_create
 ffffffff822c0080 t hpd_ack
-ffffffff822c0130 t to_dal_irq_source_dcn30
-ffffffff822c1000 T dal_irq_service_dcn302_create
+ffffffff822c0130 t to_dal_irq_source_dcn21
+ffffffff822c1000 T dal_irq_service_dcn30_create
 ffffffff822c1080 t hpd_ack
-ffffffff822c1130 t to_dal_irq_source_dcn302
-ffffffff822c2000 T dal_irq_service_dcn303_create
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 ffffffff822c2080 t hpd_ack
-ffffffff822c2130 t to_dal_irq_source_dcn303
-ffffffff822c3000 T dal_irq_service_dcn31_create
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 ffffffff822c3080 t hpd_ack
-ffffffff822c3130 t to_dal_irq_source_dcn31
-ffffffff822c4000 T dal_irq_service_dcn314_create
+ffffffff822c3130 t to_dal_irq_source_dcn303
+ffffffff822c4000 T dal_irq_service_dcn31_create
 ffffffff822c4080 t hpd_ack
-ffffffff822c4130 t to_dal_irq_source_dcn314
-ffffffff822c5000 T dal_irq_service_dcn315_create
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+ffffffff822c5000 T dal_irq_service_dcn314_create
 ffffffff822c5080 t hpd_ack
-ffffffff822c5130 t to_dal_irq_source_dcn315
-ffffffff822c6000 T dal_irq_service_dcn32_create
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+ffffffff822c6000 T dal_irq_service_dcn315_create
 ffffffff822c6080 t hpd_ack
-ffffffff822c6130 t to_dal_irq_source_dcn32
-ffffffff822c7000 T dal_irq_service_construct
-ffffffff822c7070 T dal_irq_service_destroy
-ffffffff822c7100 T dal_irq_service_set_generic
-ffffffff822c7180 T dal_irq_service_set
-ffffffff822c7330 T dal_irq_service_ack
-ffffffff822c74a0 T dal_irq_service_ack_generic
-ffffffff822c7510 T dal_irq_service_to_irq_source
-ffffffff822c8000 T dp_handle_automated_test
-ffffffff822c8820 T dp_set_test_pattern
-ffffffff822c8f00 t set_crtc_test_pattern
-ffffffff822c9370 T dp_set_preferred_link_settings
-ffffffff822c94c0 t dp_retrain_link_dp_test
-ffffffff822c95c0 T dp_set_preferred_training_settings
-ffffffff822ca000 T dp_trace_init
-ffffffff822ca0a0 T dp_trace_reset
-ffffffff822ca130 T dp_trace_is_initialized
-ffffffff822ca160 T dp_trace_detect_lt_init
-ffffffff822ca1b0 T dp_trace_commit_lt_init
-ffffffff822ca200 T dp_trace_link_loss_increment
-ffffffff822ca230 T dp_trace_lt_fail_count_update
-ffffffff822ca270 T dp_trace_lt_total_count_increment
-ffffffff822ca2b0 T dp_trace_set_is_logged_flag
-ffffffff822ca2f0 T dp_trace_is_logged
-ffffffff822ca330 T dp_trace_lt_result_update
-ffffffff822ca370 T dp_trace_set_lt_start_timestamp
-ffffffff822ca450 T dp_trace_set_lt_end_timestamp
-ffffffff822ca530 T dp_trace_get_lt_end_timestamp
-ffffffff822ca570 T dp_trace_get_lt_counts
-ffffffff822ca5b0 T dp_trace_get_link_loss_count
-ffffffff822ca5e0 T dp_trace_set_edp_power_timestamp
-ffffffff822ca6c0 T dp_trace_get_edp_poweron_timestamp
-ffffffff822ca6f0 T dp_trace_get_edp_poweroff_timestamp
-ffffffff822ca720 T dp_trace_source_sequence
-ffffffff822cb000 T dp_fpga_hpo_enable_link_and_stream
-ffffffff822cc000 T set_dio_throttled_vcp_size
-ffffffff822cc020 T setup_dio_stream_encoder
-ffffffff822cc110 T reset_dio_stream_encoder
-ffffffff822cc1e0 T setup_dio_stream_attribute
-ffffffff822cc380 T enable_dio_dp_link_output
-ffffffff822cc410 T disable_dio_link_output
-ffffffff822cc470 T set_dio_dp_link_test_pattern
-ffffffff822cc4d0 T set_dio_dp_lane_settings
-ffffffff822cc510 T update_dio_stream_allocation_table
-ffffffff822cc580 T setup_dio_audio_output
-ffffffff822cc5f0 T enable_dio_audio_packet
-ffffffff822cc6b0 T disable_dio_audio_packet
-ffffffff822cc790 T can_use_dio_link_hwss
-ffffffff822cc7d0 T get_dio_link_hwss
-ffffffff822cd000 T dp_dio_fixed_vs_pe_retimer_lane_cfg_to_hw_cfg
-ffffffff822cd040 T dp_dio_fixed_vs_pe_retimer_exit_manual_automation
-ffffffff822cd280 T enable_dio_fixed_vs_pe_retimer_program_4lane_output
-ffffffff822cd3b0 T requires_fixed_vs_pe_retimer_dio_link_hwss
-ffffffff822cd3f0 T get_dio_fixed_vs_pe_retimer_link_hwss
-ffffffff822cd420 t enable_dio_fixed_vs_pe_retimer_dp_link_output
-ffffffff822cd590 t set_dio_fixed_vs_pe_retimer_dp_link_test_pattern
-ffffffff822ce000 T can_use_dpia_link_hwss
-ffffffff822ce050 T get_dpia_link_hwss
-ffffffff822ce080 t update_dpia_stream_allocation_table
-ffffffff822cf000 T set_hpo_dp_throttled_vcp_size
-ffffffff822cf030 T set_hpo_dp_hblank_min_symbol_width
-ffffffff822cf120 T setup_hpo_dp_stream_encoder
-ffffffff822cf170 T reset_hpo_dp_stream_encoder
-ffffffff822cf190 T setup_hpo_dp_stream_attribute
-ffffffff822cf210 T enable_hpo_dp_link_output
-ffffffff822cf290 T disable_hpo_dp_link_output
-ffffffff822cf330 T update_hpo_dp_stream_allocation_table
-ffffffff822cf350 T setup_hpo_dp_audio_output
-ffffffff822cf390 T enable_hpo_dp_audio_packet
-ffffffff822cf3b0 T disable_hpo_dp_audio_packet
-ffffffff822cf400 T can_use_hpo_dp_link_hwss
-ffffffff822cf430 T get_hpo_dp_link_hwss
-ffffffff822cf460 t set_hpo_dp_link_test_pattern
-ffffffff822cf4b0 t set_hpo_dp_lane_settings
-ffffffff822d0000 T requires_fixed_vs_pe_retimer_hpo_link_hwss
-ffffffff822d0040 T get_hpo_fixed_vs_pe_retimer_dp_link_hwss
-ffffffff822d0070 t enable_hpo_fixed_vs_pe_retimer_dp_link_output
-ffffffff822d00d0 t set_hpo_fixed_vs_pe_retimer_dp_link_test_pattern
-ffffffff822d0450 t set_hpo_fixed_vs_pe_retimer_dp_lane_settings
-ffffffff822d04d0 t dp_hpo_fixed_vs_pe_retimer_set_tx_ffe
-ffffffff822d1000 T link_reset_cur_dp_mst_topology
-ffffffff822d1060 T link_detect_connection_type
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-ffffffff822d2a70 T link_is_hdcp14
-ffffffff822d2ad0 T link_is_hdcp22
-ffffffff822d2b40 T link_get_status
-ffffffff822d2b70 T link_add_remote_sink
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-ffffffff8243f870 T wskbd_displayioctl
-ffffffff8243f890 T wskbd_set_display
-ffffffff8243f9d0 T wskbd_update_layout
-ffffffff8243fa10 T wskbddevprint
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-ffffffff8243fb30 T wskbd_repeat
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-ffffffff8243fc40 T wskbd_set_keymap
-ffffffff8243fcc0 T wskbd_cnattach
-ffffffff8243fdb0 T wskbd_cngetc
-ffffffff8243fec0 T wskbd_cnpollc
-ffffffff8243ff20 T wskbd_cnbell
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-ffffffff82440ab0 T wskbd_rawinput
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-ffffffff82440ea0 T wskbd_do_ioctl_sc
-ffffffff82440f80 T wskbd_displayioctl_sc
-ffffffff824417d0 T wskbdkqfilter
-ffffffff82441830 T wskbd_pickfree
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-ffffffff824418f0 T wskbd_add_mux
-ffffffff82441970 T update_leds
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-ffffffff82441b10 T change_displayparam
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-ffffffff82443000 T wskbd_compose_value
-ffffffff824431a0 T ksym_upcase
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-ffffffff824435d0 T wskbd_init_keymap
-ffffffff82443670 T wskbd_load_keymap
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-ffffffff824442b0 T wsmouse_activate
-ffffffff824442f0 T wsmouse_mux_open
-ffffffff824444a0 T wsmouse_mux_close
-ffffffff82444500 T wsmousedoioctl
-ffffffff82444570 T wsmousedevprint
-ffffffff824445c0 T wsmouseopen
-ffffffff824446a0 T wsmouse_input_cleanup
-ffffffff82444740 T wsmousedoopen
-ffffffff824448f0 T wsmouseclose
-ffffffff824449d0 T wsmouse_input_reset
-ffffffff82444b10 T wsmouseread
-ffffffff82444bd0 T wsmouseioctl
-ffffffff82444c50 T wsmouse_do_ioctl
-ffffffff82444df0 T wsmouse_param_ioctl
-ffffffff82444f20 T wsmouse_set_params
-ffffffff82445240 T wsmouse_get_params
-ffffffff824454a0 T wsmousekqfilter
-ffffffff82445500 T wsmouse_add_mux
-ffffffff82445580 T wsmouse_buttons
-ffffffff824455c0 T wsmouse_motion
-ffffffff82445620 T wsmouse_position
-ffffffff82445720 T wsmouse_touch
-ffffffff824457c0 T wsmouse_mtstate
-ffffffff824459a0 T wsmouse_set
-ffffffff82445c70 T wsmouse_touch_update
-ffffffff82445d10 T wsmouse_mt_update
-ffffffff82445d50 T wsmouse_hysteresis
-ffffffff82445da0 T wsmouse_ptr_ctrl
-ffffffff82445ef0 T wsmouse_mt_convert
-ffffffff82446040 T wsmouse_evq_put
-ffffffff824460e0 T wsmouse_btn_sync
-ffffffff824461e0 T wsmouse_motion_sync
-ffffffff824467d0 T wsmouse_touch_sync
-ffffffff824469b0 T wsmouse_log_input
-ffffffff82446b70 T wsmouse_log_events
-ffffffff82446cb0 T wsmouse_input_sync
-ffffffff824472b0 T wsmouse_id_to_slot
-ffffffff82447390 T wsmouse_matching
-ffffffff824477c0 T wsmouse_mtframe
-ffffffff82447b90 T wsmouse_mt_init
-ffffffff82447d00 T wsmouse_set_mode
-ffffffff82447d60 T wsmouse_get_hw
-ffffffff82447d90 T wsmouse_configure
-ffffffff82448000 T wstpad_set_direction
-ffffffff82448180 T wstpad_is_stable
-ffffffff82448260 T wstpad_scroll_coords
-ffffffff82448350 T wstpad_scroll
-ffffffff824484e0 T wstpad_f2scroll
-ffffffff82448790 T wstpad_edgescroll
-ffffffff82448900 T wstpad_get_sbtn
-ffffffff82448a80 T wstpad_mtbtn_contacts
-ffffffff82448bb0 T wstpad_get_mtbtn
-ffffffff82448c00 T wstpad_softbuttons
-ffffffff82448cd0 T wstpad_is_tap
-ffffffff82448d50 T wstpad_tap_filter
-ffffffff82448df0 T wstpad_tap_touch
-ffffffff82449020 T wstpad_tap_button
-ffffffff82449070 T wstpad_tap
-ffffffff824494a0 T wstpad_tap_sync
-ffffffff82449500 T wstpad_tap_timeout
-ffffffff82449730 T wstpad_click
-ffffffff824497d0 T wstpad_cmds
-ffffffff82449a40 T wstpad_mt_inputs
-ffffffff82449db0 T wstpad_mt_masks
-ffffffff8244a130 T wstpad_touch_inputs
-ffffffff8244a340 T wstpad_process_input
-ffffffff8244a650 T wstpad_track_interval
-ffffffff8244a7b0 T wstpad_init_deceleration
-ffffffff8244a880 T wstpad_decelerate
-ffffffff8244a9f0 T wstpad_filter
-ffffffff8244acd0 T wstpad_compat_convert
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-ffffffff8244aed0 T wstpad_configure
-ffffffff8244b4c0 t isqrt
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-ffffffff8244b730 T wstpad_cleanup
-ffffffff8244b7c0 T wstpad_set_param
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-ffffffff8244c120 T wsmux_mux_close
-ffffffff8244c1e0 T wsmux_do_ioctl
-ffffffff8244c760 T wsmux_do_displayioctl
-ffffffff8244c880 T wsmux_evsrc_set_display
-ffffffff8244c8d0 T wsmuxattach
-ffffffff8244c900 T wsmux_getmux
-ffffffff8244cb40 T wsmux_create
-ffffffff8244cc20 T wsmuxopen
-ffffffff8244cd80 T wsmux_detach_sc
-ffffffff8244ce90 T wsmux_do_open
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-ffffffff8244d080 T wsmux_do_close
-ffffffff8244d120 T wsmuxread
-ffffffff8244d1a0 T wsmuxioctl
-ffffffff8244d1d0 T wsmux_add_mux
-ffffffff8244d2b0 T wsmux_detach_sc_locked
-ffffffff8244d3a0 T wsmuxkqfilter
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-ffffffff8244d4a0 T wsmux_attach_sc
-ffffffff8244d660 T wsmux_set_display
-ffffffff8244d790 T wsmux_get_layout
-ffffffff8244d7c0 T wsmux_set_layout
-ffffffff8244e000 T wsemul_pick
-ffffffff8244e070 T wsemul_getname
-ffffffff8244f000 T wsemul_getchar
-ffffffff8244f1d0 T wsemul_local_translate
-ffffffff8244f4b0 T wsemul_utf8_translate
-ffffffff82450000 T wsemul_vt100_cnattach
-ffffffff82450200 T wsemul_vt100_attach
-ffffffff824504d0 T wsemul_vt100_output
-ffffffff824507e0 T wsemul_vt100_detach
-ffffffff82450910 T wsemul_vt100_resetop
-ffffffff82450ac0 T wsemul_vt100_output_esc
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-ffffffff82451280 T wsemul_vt100_output_scs94
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-ffffffff824514e0 T wsemul_vt100_output_scs96_percent
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-ffffffff82451c40 T wsemul_vt100_nextline
-ffffffff82451cd0 T wsemul_vt100_output_normal
-ffffffff82451f10 T wsemul_vt100_output_c0c1
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-ffffffff82453000 T wsemul_vt100_scrollup
-ffffffff82453150 T wsemul_vt100_scrolldown
-ffffffff82453290 T wsemul_vt100_ed
-ffffffff824534f0 T wsemul_vt100_el
-ffffffff824535e0 T wsemul_vt100_handle_csi
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-ffffffff824545f0 T vt100_decmode
-ffffffff82454720 T vt100_selectattribute
-ffffffff82454860 T wsemul_vt100_handle_dcs
-ffffffff82455000 T vt100_initchartables
-ffffffff82455120 T vt100_setnrc
-ffffffff82456000 T wsemul_vt100_translate
-ffffffff82457000 T pckbdprobe
-ffffffff82457140 T pckbdattach
-ffffffff82457320 T pckbdactivate
-ffffffff824573b0 T pckbd_enable
-ffffffff82457500 T pckbd_set_leds
-ffffffff82457590 T pckbd_ioctl
-ffffffff824576e0 T pckbd_cngetc
-ffffffff824578c0 T pckbd_cnpollc
-ffffffff82457960 T pckbd_cnbell
-ffffffff824579b0 T pckbd_set_xtscancode
-ffffffff82457b30 T pckbd_init
-ffffffff82457b90 T pckbd_input
-ffffffff82457e00 T pckbd_scancode_translate
-ffffffff82457ee0 T pckbd_bell
-ffffffff82457f30 T pckbd_hookup_bell
-ffffffff82457f70 T pckbd_cnattach
-ffffffff82459000 T pmsprobe
-ffffffff824590b0 T pmsattach
-ffffffff82459290 T pmsactivate
-ffffffff824592f0 T pms_enable
-ffffffff82459360 T pms_ioctl
-ffffffff824593b0 T pms_disable
-ffffffff824593f0 T pms_sec_enable
-ffffffff82459460 T pms_sec_ioctl
-ffffffff824594b0 T pms_sec_disable
-ffffffff824594f0 T pms_ioctl_mouse
-ffffffff82459610 T pms_sync_mouse
-ffffffff82459670 T pms_proc_mouse
-ffffffff82459710 T pms_enable_synaptics
-ffffffff82459b40 T pms_ioctl_synaptics
-ffffffff82459c10 T pms_sync_synaptics
-ffffffff82459c70 T pms_proc_synaptics
-ffffffff82459ff0 T pms_disable_synaptics
-ffffffff8245a0d0 T pms_enable_alps
-ffffffff8245a5f0 T pms_ioctl_alps
-ffffffff8245a6a0 T pms_sync_alps
-ffffffff8245a750 T pms_proc_alps
-ffffffff8245a9a0 T pms_enable_elantech_v1
-ffffffff8245abb0 T pms_ioctl_elantech
-ffffffff8245ac70 T pms_sync_elantech_v1
-ffffffff8245ad50 T pms_proc_elantech_v1
-ffffffff8245aec0 T pms_enable_elantech_v2
-ffffffff8245b060 T pms_sync_elantech_v2
-ffffffff8245b150 T pms_proc_elantech_v2
-ffffffff8245b2c0 T pms_enable_elantech_v3
-ffffffff8245b460 T pms_sync_elantech_v3
-ffffffff8245b4f0 T pms_proc_elantech_v3
-ffffffff8245b6e0 T pms_enable_elantech_v4
-ffffffff8245b8e0 T pms_sync_elantech_v4
-ffffffff8245b9b0 T pms_proc_elantech_v4
-ffffffff8245bd00 T pms_enable_intelli
-ffffffff8245bef0 T pms_cmd
-ffffffff8245bf60 T pms_spec_cmd
-ffffffff8245c1f0 T pms_set_scaling
-ffffffff8245c280 T pms_set_resolution
-ffffffff8245c310 T pms_get_devid
-ffffffff8245c3a0 T pms_get_status
-ffffffff8245c430 T pms_set_rate
-ffffffff8245c4c0 T pms_reset
-ffffffff8245c550 T pms_dev_enable
-ffffffff8245c610 T pms_dev_disable
-ffffffff8245c6d0 T pms_protocol_lookup
-ffffffff8245c7d0 T pms_reset_detect
-ffffffff8245c850 T pms_reset_timo
-ffffffff8245c8a0 T pms_reset_task
-ffffffff8245c960 T pms_change_state
-ffffffff8245ccf0 T pmsinput
-ffffffff8245ce90 T synaptics_set_mode
-ffffffff8245cf90 T synaptics_query
-ffffffff8245d080 T synaptics_get_hwinfo
-ffffffff8245d560 T synaptics_sec_proc
-ffffffff8245d630 T synaptics_knock
-ffffffff8245d890 T alps_sec_proc
-ffffffff8245d9b0 T alps_get_hwinfo
-ffffffff8245de20 T elantech_set_absolute_mode_v1
-ffffffff8245e0e0 T elantech_set_absolute_mode_v2
-ffffffff8245e600 T elantech_ps2_cmd
-ffffffff8245e690 T elantech_set_absolute_mode_v3
-ffffffff8245eb00 T elantech_set_absolute_mode_v4
-ffffffff8245ed30 T elantech_get_hwinfo_v1
-ffffffff8245ef30 T elantech_get_hwinfo_v2
-ffffffff8245f240 T elantech_get_hwinfo_v3
-ffffffff8245f450 T elantech_get_hwinfo_v4
-ffffffff8245f6c0 T elantech_knock
-ffffffff82460000 T wscnprobe
-ffffffff824600a0 T wscninit
-ffffffff82460150 T wscn_video_init
-ffffffff824601c0 T wscn_input_init
-ffffffff82460230 T wscnputc
-ffffffff82460240 T wscngetc
-ffffffff82460250 T wscnpollc
-ffffffff82461000 T skgpio_match
-ffffffff82461100 T skgpio_attach
-ffffffff82461350 T skgpio_gpio_read
-ffffffff824613a0 T skgpio_gpio_write
-ffffffff82461410 T skgpio_gpio_ctl
-ffffffff824614a0 T skgpio_led_read
-ffffffff824614f0 T skgpio_led_write
-ffffffff82461520 T skgpio_led_ctl
-ffffffff82462000 T pctrattach
-ffffffff82462080 T pctropen
-ffffffff824620d0 T pctrclose
-ffffffff82462100 T pctrioctl
-ffffffff824623d0 T pctr_reload
-ffffffff82462510 T pctr_resume
-ffffffff82463000 T nvramattach
-ffffffff824630a0 T nvram_csum_valid
-ffffffff82463130 T nvramopen
-ffffffff82463180 T nvramclose
-ffffffff824631b0 T nvramread
-ffffffff824632d0 T nvram_get_byte
-ffffffff82464000 T hid_start_parse
-ffffffff82464070 T hid_end_parse
-ffffffff824640b0 T hid_get_item
-ffffffff82464c60 T hid_report_size
-ffffffff82464db0 T hid_locate
-ffffffff82464f20 T hid_get_data_sub
-ffffffff82465040 T hid_get_data
-ffffffff82465150 T hid_get_udata
-ffffffff82465260 T hid_is_collection
-ffffffff82465370 T hid_get_collection_data
-ffffffff82465440 T hid_get_id_of_collection
-ffffffff82466000 T hidkbd_attach
-ffffffff824660f0 T hidkbd_parse_desc
-ffffffff82466430 T hidkbd_delayed_decode
-ffffffff82466450 T hidkbd_attach_wskbd
-ffffffff824664e0 T hidkbd_detach
-ffffffff82466580 T hidkbd_translate
-ffffffff824665d0 T hidkbd_apple_translate
-ffffffff82466680 T hidkbd_apple_munge
-ffffffff82466870 T hidkbd_apple_tb_munge
-ffffffff82466940 T hidkbd_apple_iso_munge
-ffffffff82466a30 T hidkbd_apple_mba_munge
-ffffffff82466b90 T hidkbd_apple_iso_mba_munge
-ffffffff82466dd0 T hidkbd_input
-ffffffff82466ef0 T hidkbd_decode
-ffffffff82467280 T hidkbd_enable
-ffffffff824672c0 T hidkbd_set_leds
-ffffffff824673a0 T hidkbd_ioctl
-ffffffff82467440 T hidkbd_bell
-ffffffff82467490 T hidkbd_cngetc
-ffffffff82467520 T hidkbd_hookup_bell
-ffffffff82468000 T hidms_stylus_hid_parse
-ffffffff82468320 T hidms_pad_buttons_hid_parse
-ffffffff82468400 T hidms_wacom_setup
-ffffffff82468710 T hidms_setup
-ffffffff82468cb0 T hidms_attach
-ffffffff82468e00 T hidms_detach
-ffffffff82468e40 T hidms_input
-ffffffff824690f0 T hidms_enable
-ffffffff82469140 T hidms_ioctl
-ffffffff82469310 T hidms_disable
-ffffffff8246a000 T hidmt_get_resolution
-ffffffff8246a110 T hidmt_setup
-ffffffff8246a7b0 T hidmt_set_input_mode
-ffffffff8246a840 T hidmt_configure
-ffffffff8246a8e0 T hidmt_attach
-ffffffff8246a9f0 T hidmt_detach
-ffffffff8246aa30 T hidmt_input
-ffffffff8246af10 T hidmt_enable
-ffffffff8246af50 T hidmt_ioctl
-ffffffff8246b020 T hidmt_disable
-ffffffff8246c000 T hidcc_match
-ffffffff8246c0e0 T hidcc_attach
-ffffffff8246c280 T hidcc_parse
-ffffffff8246c640 T hidcc_attach_wskbd
-ffffffff8246c6f0 T hidcc_detach
-ffffffff8246c7a0 T hidcc_intr
-ffffffff8246cab0 T hidcc_intr_slice
-ffffffff8246cba0 T hidcc_setbits
-ffffffff8246cd30 T hidcc_rawinput
-ffffffff8246cdd0 T hidcc_input
-ffffffff8246ce30 T hidcc_bits_to_int
-ffffffff8246ce90 T hidcc_usage_to_sym
-ffffffff8246d0a0 T hidcc_bit_to_sym
-ffffffff8246d0f0 T hidcc_enable
-ffffffff8246d110 T hidcc_set_leds
-ffffffff8246d140 T hidcc_ioctl
-ffffffff8246d1b0 T hidcc_is_array
-ffffffff8246d200 T hidcc_parse_array
-ffffffff8246d310 T hidcc_add_key_volume
-ffffffff8246d440 T hidcc_add_key
-ffffffff8246d510 T hidcc_bits_to_volume
-ffffffff8246e000 T usb_match
-ffffffff8246e030 T usb_attach
-ffffffff8246e330 T usb_detach
-ffffffff8246e3e0 T usb_activate
-ffffffff8246e4f0 T usb_create_task_threads
-ffffffff8246e590 T usb_explore
-ffffffff8246e730 T usb_attach_roothub
-ffffffff8246e7d0 T usb_needs_explore
-ffffffff8246e820 T usb_detach_roothub
-ffffffff8246e910 T usb_wait_task
-ffffffff8246e9b0 T usb_abort_task_thread
-ffffffff8246eaa0 T usb_task_thread
-ffffffff8246ebc0 T usb_add_task
-ffffffff8246ec80 T usb_rem_task
-ffffffff8246ed40 T usb_rem_wait_task
-ffffffff8246ee50 T usbctlprint
-ffffffff8246eea0 T usbopen
-ffffffff8246ef10 T usbclose
-ffffffff8246ef40 T usb_fill_udc_task
-ffffffff8246efe0 T usb_fill_udf_task
-ffffffff8246f050 T usbioctl
-ffffffff8246f6b0 T usb_needs_reattach
-ffffffff8246f700 T usb_schedsoftintr
-ffffffff8246f7d0 T usb_tap
-ffffffff82470000 T usbd_is_dying
-ffffffff82470040 T usbd_deactivate
-ffffffff82470070 T usbd_ref_incr
-ffffffff824700a0 T usbd_ref_decr
-ffffffff824700e0 T usbd_ref_wait
-ffffffff82470160 T usbd_get_devcnt
-ffffffff82470190 T usbd_claim_iface
-ffffffff824701d0 T usbd_iface_claimed
-ffffffff82470210 T usbd_open_pipe
-ffffffff824702f0 T usbd_open_pipe_ival
-ffffffff824703e0 T usbd_open_pipe_intr
-ffffffff82470630 T usbd_alloc_xfer
-ffffffff824706b0 T usbd_setup_xfer
-ffffffff82470720 T usbd_transfer
-ffffffff824709b0 T usbd_free_xfer
-ffffffff82470a30 T usbd_close_pipe
-ffffffff82470ba0 T usbd_abort_pipe
-ffffffff82470c10 T usb_transfer_complete
-ffffffff82470e90 T usbd_dopoll
-ffffffff82470eb0 T usbd_alloc_buffer
-ffffffff82470f40 T usbd_free_buffer
-ffffffff82470f80 T usbd_setup_default_xfer
-ffffffff82471000 T usbd_setup_isoc_xfer
-ffffffff82471130 T usbd_get_xfer_status
-ffffffff82471190 T usbd_get_config_descriptor
-ffffffff824711e0 T usbd_get_interface_descriptor
-ffffffff82471230 T usbd_get_device_descriptor
-ffffffff82471260 T usbd_interface2endpoint_descriptor
-ffffffff824712b0 T usbd_clear_endpoint_stall
-ffffffff82471340 T usbd_clear_endpoint_toggle
-ffffffff82471380 T usbd_do_request
-ffffffff824713a0 T usbd_clear_endpoint_stall_async
-ffffffff82471460 T usbd_request_async
-ffffffff82471570 T usbd_device2interface_handle
-ffffffff82471600 T usbd_set_interface
-ffffffff824716e0 T usbd_get_no_alts
-ffffffff82471750 T usbd_get_interface_altindex
-ffffffff82471780 T usbd_start_next
-ffffffff82471850 T usb_insert_transfer
-ffffffff82471900 T usbd_do_request_flags
-ffffffff82471b80 T usbd_request_async_cb
-ffffffff82471c00 T usbd_get_quirks
-ffffffff82471c50 T usbd_set_polling
-ffffffff82471cb0 T usbd_get_endpoint_descriptor
-ffffffff82471d10 T usbd_ratecheck
-ffffffff82471d30 T usbd_match_device
-ffffffff82471da0 T usbd_desc_iter_init
-ffffffff82471e00 T usbd_desc_iter_next
-ffffffff82471e80 T usbd_str
-ffffffff82472000 T usbd_get_desc
-ffffffff82472070 T usbd_get_device_status
-ffffffff824720c0 T usbd_get_hub_descriptor
-ffffffff82472130 T usbd_get_hub_ss_descriptor
-ffffffff824721a0 T usbd_get_port_status
-ffffffff824721f0 T usbd_set_hub_depth
-ffffffff82472240 T usbd_clear_port_feature
-ffffffff82472290 T usbd_clear_endpoint_feature
-ffffffff824722e0 T usbd_set_port_feature
-ffffffff82472330 T usbd_set_idle
-ffffffff82472390 T usbd_get_report_descriptor
-ffffffff824723e0 T usbd_get_hid_descriptor
-ffffffff82472460 T usbd_get_config
-ffffffff824724b0 T usb_detach_wait
-ffffffff82472530 T usb_detach_wakeup
-ffffffff82473000 T usb_block_allocmem
-ffffffff82473250 T usb_block_freemem
-ffffffff824732b0 T usb_allocmem
-ffffffff82473500 T usb_freemem
-ffffffff824735c0 T usb_syncmem
-ffffffff82474000 T usbd_errstr
-ffffffff82474070 T usbd_get_string_desc
-ffffffff82474130 T usbd_get_string
-ffffffff82474330 T usbd_cache_devinfo
-ffffffff82474670 T usbd_printBCD
-ffffffff824746f0 T usbd_devinfo
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-ffffffff825d5dc0 T toshiba_fn_key_video_output
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-ffffffff825de8b0 T chvgpio_opreg_handler
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-ffffffff825df000 T glkgpio_match
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-ffffffff825e08f0 T pchgpio_write_pin
-ffffffff825e0a00 T pchgpio_intr_establish
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-ffffffff825e0d50 T pchgpio_intr_disable
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-ffffffff825e0f60 T pchgpio_find_group
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-ffffffff825e10c0 T pchgpio_save_pin
-ffffffff825e1280 T pchgpio_restore_pin
-ffffffff825e2000 T tipmic_match
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-ffffffff825e2250 T tipmic_write_1
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-ffffffff825e2470 T tipmic_get_lpat
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-ffffffff825e25b0 T tipmic_write_pin
-ffffffff825e25e0 T tipmic_thermal_opreg_handler
-ffffffff825e2e60 T tipmic_power_opreg_handler
-ffffffff825e3100 T tipmic_read_1
-ffffffff825e31d0 T tipmic_raw_to_temp
-ffffffff825e4000 T ccpmic_match
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-ffffffff825e4240 T ccpmic_read_pin
-ffffffff825e43c0 T ccpmic_write_pin
-ffffffff825e4520 T ccpmic_thermal_opreg_handler
-ffffffff825e4770 T ccpmic_power_opreg_handler
-ffffffff825e4960 T ccpmic_read_1
-ffffffff825e4a30 T ccpmic_write_1
-ffffffff825e4af0 T ccpmic_raw_to_temp
-ffffffff825e5000 T com_acpi_match
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-ffffffff825e53a0 T com_acpi_is_designware
-ffffffff825e5400 T com_acpi_intr_designware
-ffffffff825e5430 T com_acpi_is_console
-ffffffff825e6000 T sdhc_acpi_match
-ffffffff825e6060 T sdhc_acpi_attach
-ffffffff825e6370 T sdhc_acpi_parse_resources
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-ffffffff825e6480 T sdhc_acpi_card_detect_intr
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-ffffffff825e6540 T sdhc_acpi_explore
-ffffffff825e6570 T sdhc_acpi_card_detect_nonremovable
-ffffffff825e65a0 T sdhc_acpi_do_explore
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-ffffffff825e7410 T dwiic_acpi_parse_crs
-ffffffff825e7560 T dwiic_acpi_power
-ffffffff825e7670 T dwiic_acpi_get_params
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-ffffffff825e9000 T acpicbkbd_match
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-ffffffff825e9120 T acpicbkbd_get_backlight
-ffffffff825e91a0 T acpicbkbd_set_backlight
-ffffffff825e9240 T acpicbkbd_write_backlight
-ffffffff825ea000 T acpials_match
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-ffffffff825ea2f0 T acpials_notify
-ffffffff825ea380 T acpials_update
-ffffffff825eb000 T tpm_match
-ffffffff825eb050 T tpm_attach
-ffffffff825eb320 T tpm_activate
-ffffffff825eb430 T tpm2_start_method
-ffffffff825eb4b0 T tpm_probe
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-ffffffff825ec570 T tpm_read_crb
-ffffffff825ec870 T tpm_request_locality_tis
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-ffffffff825ed000 T acpihve_match
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-ffffffff825ee000 T acpisbs_match
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-ffffffff825ee450 T acpisbs_setup_sensors
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-ffffffff825f0000 T ipmi_acpi_match
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-ffffffff825f1000 T amdgpio_match
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-ffffffff825f15f0 T amdgpio_intr_establish
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-ffffffff825f18f0 T amdgpio_save_pin
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-ffffffff825f19d0 T amdgpio_pin_intr
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-ffffffff825f2210 T acpihid_init_dsm
-ffffffff825f2370 T acpihid_eval
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-ffffffff825f3000 t iosf_acpi_match
-ffffffff825f3050 t iosf_acpi_attach
-ffffffff825f3150 t iosf_acpi_mbi_mdr_rd
-ffffffff825f31c0 t iosf_acpi_mbi_mdr_wr
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-ffffffff825f4240 T acpi_map
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-ffffffff825f4380 T acpi_bus_space_map
-ffffffff825f43a0 T acpi_bus_space_unmap
-ffffffff825f43c0 T acpi_intr_establish
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-ffffffff825f46b0 T acpi_acquire_glk
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-ffffffff825f4760 T acpi_attach_machdep
-ffffffff825f48f0 T acpi_sleep_cpu
-ffffffff825f4a90 T acpi_resume_cpu
-ffffffff825f4b90 T sleep_mp
-ffffffff825f4c80 T resume_mp
-ffffffff825f4d70 T acpi_iommu_device_map
-ffffffff825f5000 T hibernate_resume_machdep
-ffffffff825f5050 T hibernate_drop_to_real_mode
-ffffffff825f5060 T hibernate_activate_resume_pt_machdep
-ffffffff825f50a0 T hibernate_switch_stack_machdep
-ffffffff825f50e0 T hibernate_flush
-ffffffff825f5110 T acpi_savecpu
-ffffffff825f6000 T sleep_showstate
-ffffffff825f60f0 T sleep_setstate
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-ffffffff825f62b0 T suspend_finish
-ffffffff825f7000 T acpiopen
-ffffffff825f70d0 T acpiclose
-ffffffff825f7160 T acpiioctl
-ffffffff825f72b0 T request_sleep
-ffffffff825f7330 T acpi_filtdetach
-ffffffff825f7380 T acpi_filtread
-ffffffff825f73c0 T acpikqfilter
-ffffffff825f8000 T acpipci_match
-ffffffff825f8030 T acpipci_attach
-ffffffff825f82f0 T acpipci_osc
-ffffffff825f8430 T acpipci_parse_resources
-ffffffff825f8560 T acpipci_attach_bus
-ffffffff825f8730 T acpipci_print
-ffffffff825f87a0 T acpipci_attach_busses
-ffffffff825f9000 T efiopen
-ffffffff825f9040 T eficlose
-ffffffff825f9070 T efiioctl
-ffffffff825f9110 T efiioc_get_table
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-ffffffff825fa330 T efi_map_runtime
-ffffffff825fa4b0 T efi_enter
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-ffffffff825fa5d0 T efi_fault
-ffffffff825fb000 T vmm_probe
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-ffffffff825fb170 T vmm_activate
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-ffffffff825fb330 T vm_find
-ffffffff825fb450 T vmmioctl
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-ffffffff825fbd60 T vm_resetcpu
-ffffffff825fbe80 T vm_share_mem
-ffffffff825fbfd0 T pledge_ioctl_vmm
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-ffffffff825fc120 T vm_create_check_mem_ranges
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-ffffffff825fc420 T vcpu_must_stop
-ffffffff825fd000 T vmm_enabled
-ffffffff825fd080 T vmm_attach_machdep
-ffffffff825fd230 T vmm_quiesce_vmx
-ffffffff825fd400 T vmm_activate_machdep
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-ffffffff825fd730 T vmmioctl_machdep
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-ffffffff825fd8a0 T vm_mprotect_ept
-ffffffff825fdb20 T pledge_ioctl_vmm_machdep
-ffffffff825fdb70 T vm_rwvmparams
-ffffffff825fdd00 T vmm_init_pvclock
-ffffffff825fddd0 T vm_rwregs
-ffffffff825fdee0 T vcpu_readregs_vmx
-ffffffff825fe310 T vcpu_writeregs_vmx
-ffffffff825fe780 T vcpu_readregs_svm
-ffffffff825fec30 T vcpu_writeregs_svm
-ffffffff825ff100 T vmm_get_guest_memtype
-ffffffff825ff180 T vmx_mprotect_ept
-ffffffff825ff3e0 T vmx_pmap_find_pte_ept
-ffffffff825ff4b0 T start_vmm_on_cpu
-ffffffff825ff5d0 T stop_vmm_on_cpu
-ffffffff825ff670 T vmclear_on_cpu
-ffffffff825ff6f0 T vm_impl_init_vmx
-ffffffff825ff800 T vm_impl_init_svm
-ffffffff825ff910 T vm_impl_init
-ffffffff825ff9b0 T vm_impl_deinit
-ffffffff825ff9e0 T vcpu_reload_vmcs_vmx
-ffffffff825ffb20 T vcpu_reset_regs_svm
-ffffffff825ffeb0 T svm_setmsrbrw
-ffffffff825fffc0 T svm_setmsrbr
-ffffffff82600090 T vmm_alloc_vpid
-ffffffff826001a0 T svm_setmsrbw
-ffffffff82600280 T vmx_setmsrbr
-ffffffff82600330 T vmx_setmsrbw
-ffffffff826003e0 T vmx_setmsrbrw
-ffffffff826004f0 T svm_set_clean
-ffffffff82600540 T svm_set_dirty
-ffffffff82600590 T vcpu_reset_regs_vmx
-ffffffff82600fd0 T vcpu_vmx_check_cap
-ffffffff826010d0 T vcpu_vmx_compute_ctrl
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-ffffffff82601650 T vcpu_deinit_vmx
-ffffffff826017d0 T vcpu_reset_regs
-ffffffff82601810 T vcpu_init_svm
-ffffffff826019a0 T vcpu_deinit_svm
-ffffffff82601ae0 T vcpu_init
-ffffffff82601ba0 T vmm_free_vpid
-ffffffff82601c10 T vcpu_deinit
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-ffffffff82601e10 T vcpu_run_vmx
-ffffffff82602600 T vcpu_run_svm
-ffffffff82602c10 T vmm_fpurestore
-ffffffff82602cd0 T vmm_fpusave
-ffffffff82602d50 T vmm_translate_gva
-ffffffff82603060 T vmm_update_pvclock
-ffffffff82603160 T vmx_get_exit_info
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-ffffffff826035f0 T vmx_instruction_error_decode
-ffffffff826037c0 T vmm_get_guest_cpu_cpl
-ffffffff826038b0 T vmx_handle_intr
-ffffffff82603940 T svm_handle_hlt
-ffffffff82603990 T vmx_handle_hlt
-ffffffff82603a40 T svm_handle_exit
-ffffffff82603d60 T svm_handle_np_fault
-ffffffff82603f00 T vmm_handle_cpuid
-ffffffff82604590 T svm_handle_msr
-ffffffff82604860 T svm_handle_xsetbv
-ffffffff82604900 T svm_handle_inout
-ffffffff82604a00 T vmm_inject_ud
-ffffffff82604a30 T vmm_inject_db
-ffffffff82604a60 T vmx_handle_np_fault
-ffffffff82604bc0 T vmx_handle_inout
-ffffffff82604d40 T vmx_handle_cr
-ffffffff82604f40 T vmx_handle_rdmsr
-ffffffff82605010 T vmx_handle_wrmsr
-ffffffff82605280 T vmx_handle_xsetbv
-ffffffff82605350 T vmm_inject_gp
-ffffffff82605380 T vmx_get_exit_qualification
-ffffffff826053e0 T vmx_get_guest_faulttype
-ffffffff82605480 T svm_get_guest_faulttype
-ffffffff826054b0 T svm_fault_page
-ffffffff82605540 T vmx_fault_page
-ffffffff82605690 T vmm_get_guest_cpu_mode
-ffffffff82605790 T vmx_load_pdptes
-ffffffff82605a10 T vmx_handle_cr0_write
-ffffffff82605c20 T vmx_handle_cr4_write
-ffffffff82605cc0 T vmm_handle_xsetbv
-ffffffff82605d50 T vmx_handle_misc_enable_msr
-ffffffff82605db0 T vmm_pat_is_valid
-ffffffff82605e90 t vmm_handle_cpuid_0xd
-ffffffff82605f90 T vmm_gpa_is_valid
-ffffffff82606000 T vmx_exit_reason_decode
-ffffffff82606040 T svm_exit_reason_decode
-ffffffff82606e50 T vcpu_state_decode
-ffffffff82607000 T vmm_dispatch_intr
-ffffffff82607020 T vmxon
-ffffffff82607050 T vmxoff
-ffffffff82607080 T vmclear
-ffffffff826070b0 T vmptrld
-ffffffff826070e0 T vmptrst
-ffffffff82607110 T vmwrite
-ffffffff82607140 T vmread
-ffffffff82607170 T invvpid
-ffffffff8260718b t invvpid_fail
-ffffffff82607192 t invvpid_ret
-ffffffff826071b0 T invept
-ffffffff826071cb t invept_fail
-ffffffff826071d2 t invept_ret
-ffffffff826071f0 T vmx_enter_guest
-ffffffff8260721b t skip_init
-ffffffff826072fa t no_l1df_msr
-ffffffff826072fd t l1df_tlb_loop
-ffffffff82607316 t l1df_tlb_done
-ffffffff8260731e t l1df_load_cache
-ffffffff82607335 t done_flush
-ffffffff826073c8 t do_resume
-ffffffff8260744d t fail_launch_or_resume
-ffffffff8260748d t fail_launch_unknown
-ffffffff8260749a t fail_launch_invalid_vmcs
-ffffffff826074a7 t fail_launch_valid_vmcs
-ffffffff826074c4 t vmx_exit_handler_asm
-ffffffff82607589 t restore_host
-ffffffff82607630 T svm_enter_guest
-ffffffff826077b2 t restore_host_svm
-ffffffff82608000 T sdmmc_match
-ffffffff82608050 T sdmmc_attach
-ffffffff82608390 T sdmmc_detach
-ffffffff82608440 T sdmmc_activate
-ffffffff82608510 T sdmmc_discover_task
-ffffffff826085d0 T sdmmc_create_thread
-ffffffff82608640 T sdmmc_holds_root_device
-ffffffff826086a0 T sdmmc_task_thread
-ffffffff82608890 T sdmmc_needs_discover
-ffffffff82608940 T sdmmc_del_task
-ffffffff826089f0 T sdmmc_card_detach
-ffffffff82608ad0 T sdmmc_add_task
-ffffffff82608b50 T sdmmc_card_attach
-ffffffff82608c60 T sdmmc_enable
-ffffffff82608db0 T sdmmc_scan
-ffffffff82608e40 T sdmmc_init
-ffffffff82608f40 T sdmmc_disable
-ffffffff826090a0 T sdmmc_function_free
-ffffffff826090c0 T sdmmc_delay
-ffffffff82609110 T sdmmc_select_card
-ffffffff82609330 T sdmmc_set_bus_power
-ffffffff826094e0 T sdmmc_function_alloc
-ffffffff82609570 T sdmmc_app_command
-ffffffff82609700 T sdmmc_mmc_command
-ffffffff82609780 T sdmmc_go_idle_state
-ffffffff82609890 T sdmmc_send_if_cond
-ffffffff826099e0 T sdmmc_set_relative_addr
-ffffffff8260a000 T sdmmc_cisptr
-ffffffff8260a0a0 T sdmmc_read_cis
-ffffffff8260a3e0 T sdmmc_print_cis
-ffffffff8260a550 T sdmmc_check_cis_quirks
-ffffffff8260b000 T sdmmc_io_enable
-ffffffff8260b2a0 T sdmmc_io_reset
-ffffffff8260b3d0 T sdmmc_io_send_op_cond
-ffffffff8260b540 T sdmmc_io_scan
-ffffffff8260b690 T sdmmc_io_init
-ffffffff8260b7c0 T sdmmc_io_set_highspeed
-ffffffff8260ba60 T sdmmc_io_set_bus_width
-ffffffff8260bcf0 T sdmmc_io_function_ready
-ffffffff8260be70 T sdmmc_io_read_1
-ffffffff8260bfc0 T sdmmc_io_function_enable
-ffffffff8260c390 T sdmmc_io_write_1
-ffffffff8260c510 T sdmmc_io_function_disable
-ffffffff8260c790 T sdmmc_io_attach
-ffffffff8260c880 T sdmmc_print
-ffffffff8260cad0 T sdmmc_submatch
-ffffffff8260cb50 T sdmmc_io_detach
-ffffffff8260cc00 T sdmmc_io_rw_direct
-ffffffff8260cda0 T sdmmc_io_rw_extended_subr
-ffffffff8260cf40 T sdmmc_io_rw_extended
-ffffffff8260d340 T sdmmc_io_read_2
-ffffffff8260d4a0 T sdmmc_io_write_2
-ffffffff8260d600 T sdmmc_io_read_4
-ffffffff8260d760 T sdmmc_io_write_4
-ffffffff8260d8c0 T sdmmc_io_read_multi_1
-ffffffff8260d9b0 T sdmmc_io_write_multi_1
-ffffffff8260daa0 T sdmmc_io_read_region_1
-ffffffff8260db90 T sdmmc_io_write_region_1
-ffffffff8260dc80 T sdmmc_io_xchg
-ffffffff8260de10 T sdmmc_intr_enable
-ffffffff8260e080 T sdmmc_intr_disable
-ffffffff8260e2f0 T sdmmc_intr_establish
-ffffffff8260e3f0 T sdmmc_intr_disestablish
-ffffffff8260e4e0 T sdmmc_card_intr
-ffffffff8260e530 T sdmmc_intr_task
-ffffffff8260e5c0 T sdmmc_io_set_blocklen
-ffffffff8260f000 T sdmmc_mem_enable
-ffffffff8260f450 T sdmmc_mem_send_op_cond
-ffffffff8260f600 T sdmmc_mem_signal_voltage
-ffffffff8260f6c0 T sdmmc_mem_scan
-ffffffff8260f9d0 T sdmmc_decode_csd
-ffffffff8260fe00 T sdmmc_decode_cid
-ffffffff826102a0 T sdmmc_mem_send_scr
-ffffffff826103e0 T sdmmc_mem_decode_scr
-ffffffff82610440 T sdmmc_mem_send_cxd_data
-ffffffff826105b0 T sdmmc_mem_set_bus_width
-ffffffff826106c0 T sdmmc_mem_sd_switch
-ffffffff82610970 T sdmmc_be512_to_bitfield512
-ffffffff82610a20 T sdmmc_mem_mmc_switch
-ffffffff82610b10 T sdmmc_mem_init
-ffffffff82610c60 T sdmmc_mem_set_blocklen
-ffffffff82610d60 T sdmmc_mem_sd_init
-ffffffff82611140 T sdmmc_mem_mmc_init
-ffffffff82611800 T sdmmc_mem_select_transfer_mode
-ffffffff82611880 T sdmmc_mem_execute_tuning
-ffffffff82611910 T sdmmc_mem_read_block_subr
-ffffffff82611c70 T sdmmc_mem_single_read_block
-ffffffff82611d40 T sdmmc_mem_read_block
-ffffffff82611ef0 T sdmmc_mem_write_block_subr
-ffffffff82612240 T sdmmc_mem_single_write_block
-ffffffff82612310 T sdmmc_mem_write_block
-ffffffff826124c0 T sdmmc_mem_hibernate_write
-ffffffff82613000 T sdmmc_scsi_cmd
-ffffffff826131f0 T sdmmc_minphys
-ffffffff82613270 T sdmmc_scsi_attach
-ffffffff82613460 T sdmmc_alloc_ccbs
-ffffffff826135a0 T sdmmc_free_ccbs
-ffffffff82613600 T sdmmc_scsi_detach
-ffffffff82613760 T sdmmc_stimeout
-ffffffff826137e0 T sdmmc_ccb_alloc
-ffffffff82613890 T sdmmc_ccb_free
-ffffffff82613970 T sdmmc_inquiry
-ffffffff82613be0 T sdmmc_start_xs
-ffffffff82613cd0 T sdmmc_complete_xs
-ffffffff82613da0 T sdmmc_done_xs
-ffffffff82613df0 T sdmmc_scsi_hibernate_io
-ffffffff82614000 T bwfm_sdio_preinit
-ffffffff826144a0 T bwfm_sdio_txcheck
-ffffffff826144e0 T bwfm_sdio_txdata
-ffffffff82614550 T bwfm_sdio_txctl
-ffffffff826146a0 T bwfm_sdio_buscore_read
-ffffffff826146b0 T bwfm_sdio_buscore_write
-ffffffff826146d0 T bwfm_sdio_buscore_prepare
-ffffffff82614810 T bwfm_sdio_buscore_activate
-ffffffff82614890 T bwfm_sdio_match
-ffffffff82614940 T bwfm_sdio_attach
-ffffffff82614c00 T bwfm_sdio_detach
-ffffffff82614c60 T bwfm_sdio_task
-ffffffff82614dc0 T bwfm_sdio_write_1
-ffffffff82614df0 T bwfm_sdio_read_1
-ffffffff82614e20 T bwfm_sdio_write_4
-ffffffff82614ed0 T bwfm_sdio_read_4
-ffffffff82614f80 T bwfm_sdio_load_microcode
-ffffffff826151e0 T bwfm_sdio_clkctl
-ffffffff82615310 T bwfm_sdio_dev_write
-ffffffff82615360 T bwfm_sdio_intr
-ffffffff826153a0 T bwfm_sdio_ram_read_write
-ffffffff826155d0 T bwfm_sdio_htclk
-ffffffff82615840 T bwfm_sdio_readshared
-ffffffff82615910 T bwfm_sdio_dev_read
-ffffffff82615950 T bwfm_sdio_rx_frames
-ffffffff82615d00 T bwfm_sdio_tx_frames
-ffffffff82615e00 T bwfm_sdio_backplane
-ffffffff82615eb0 T bwfm_sdio_buf_read
-ffffffff82615f90 T bwfm_sdio_buf_write
-ffffffff82616040 T bwfm_sdio_frame_read_write
-ffffffff826161c0 T bwfm_sdio_newbuf
-ffffffff82616240 T bwfm_sdio_tx_ok
-ffffffff826162a0 T bwfm_sdio_tx_ctrlframe
-ffffffff826163a0 T bwfm_sdio_tx_dataframe
-ffffffff826164f0 T bwfm_sdio_rx_glom
-ffffffff82617000 T onewire_match
-ffffffff82617050 T onewire_attach
-ffffffff826170f0 T onewire_detach
-ffffffff82617160 T onewire_activate
-ffffffff82617180 T onewire_scan
-ffffffff826173a0 T onewire_createthread
-ffffffff82617410 T onewire_print
-ffffffff826174e0 T onewirebus_print
-ffffffff82617530 T onewire_lock
-ffffffff82617550 T onewire_unlock
-ffffffff82617570 T onewire_reset
-ffffffff82617590 T onewire_bit
-ffffffff826175b0 T onewire_read_byte
-ffffffff826176f0 T onewire_write_byte
-ffffffff826177d0 T onewire_read_block
-ffffffff82617870 T onewire_write_block
-ffffffff82617910 T onewire_triplet
-ffffffff826179f0 T onewire_matchrom
-ffffffff82617b40 T onewire_search
-ffffffff82617ee0 T onewire_thread
-ffffffff82618000 T onewire_crc
-ffffffff826180b0 T onewire_crc16
-ffffffff82618170 T onewire_famname
-ffffffff826181b0 T onewire_matchbyfam
-ffffffff82619000 T owid_match
-ffffffff82619030 T owid_attach
-ffffffff82619100 T owid_detach
-ffffffff82619140 T owid_activate
-ffffffff8261a000 T owsbm_match
-ffffffff8261a030 T owsbm_attach
-ffffffff8261a1d0 T owsbm_detach
-ffffffff8261a240 T owsbm_activate
-ffffffff8261a270 T owsbm_update
-ffffffff8261b000 T owtemp_match
-ffffffff8261b030 T owtemp_attach
-ffffffff8261b130 T owtemp_detach
-ffffffff8261b1a0 T owtemp_activate
-ffffffff8261b1d0 T owtemp_update
-ffffffff8261c000 T owctr_match
-ffffffff8261c030 T owctr_attach
-ffffffff8261c180 T owctr_detach
-ffffffff8261c1f0 T owctr_activate
-ffffffff8261c220 T owctr_update
-ffffffff8261c250 T owctr_update_counter
-ffffffff8261d000 A __text_page_start
-ffffffff8261d000 T Xsyscall_meltdown
-ffffffff8261d00c T Xsyscall
-ffffffff8261d299 t Xsyscall_trampback
-ffffffff8261d2b0 T intr_user_exit
-ffffffff8261d2f2 t intr_user_exit_post_ast
-ffffffff8261d44b t Xiretq_trampback
-ffffffff8261d457 T doreti_iret
-ffffffff8261e000 T alltraps
-ffffffff8261e138 T recall_trap
-ffffffff8261e150 T alltraps_kern
-ffffffff8261e153 T alltraps_kern_meltdown
-ffffffff8261f000 ? Xtrap00
-ffffffff8261f000 A __kutext_start
-ffffffff8261f000 A __text_page_end
-ffffffff8261f010 ? Xtrap01
-ffffffff8261f020 ? Xtrap02
-ffffffff8261f028 c calltrap_specstk
-ffffffff8261f0f0 ? calltrap_specstk_tramp
-ffffffff8261f110 ? Xtrap03
-ffffffff8261f120 ? Xtrap04
-ffffffff8261f130 ? Xtrap05
-ffffffff8261f140 ? Xtrap06
-ffffffff8261f150 ? Xtrap07
-ffffffff8261f160 ? Xtrap08
-ffffffff8261f170 ? Xtrap09
-ffffffff8261f180 ? Xtrap0a
-ffffffff8261f190 ? Xtrap0b
-ffffffff8261f1a0 ? Xtrap0c
-ffffffff8261f1b0 ? Xtrap0d
-ffffffff8261f240 ? Xtrap0e
-ffffffff8261f250 ? Xintrspurious
-ffffffff8261f250 ? Xtrap0f
-ffffffff8261f260 ? Xtrap10
-ffffffff8261f270 ? Xtrap11
-ffffffff8261f280 ? Xtrap12
-ffffffff8261f290 ? Xtrap13
-ffffffff8261f2a0 ? Xtrap14
-ffffffff8261f2b0 ? Xtrap15
-ffffffff8261f2c0 ? Xtrap16
-ffffffff8261f2c0 ? Xtrap17
-ffffffff8261f2c0 ? Xtrap18
-ffffffff8261f2c0 ? Xtrap19
-ffffffff8261f2c0 ? Xtrap1a
-ffffffff8261f2c0 ? Xtrap1b
-ffffffff8261f2c0 ? Xtrap1c
-ffffffff8261f2c0 ? Xtrap1d
-ffffffff8261f2c0 ? Xtrap1e
-ffffffff8261f2c0 ? Xtrap1f
-ffffffff8261f2d0 ? x2apic_eoi
-ffffffff8261f2f0 ? Xintr_lapic_ipi
-ffffffff8261f330 ? Xipi_invltlb
-ffffffff8261f360 ? Xipi_invlpg
-ffffffff8261f390 ? Xipi_invlrange
-ffffffff8261f3d0 ? Xipi_invltlb_pcid
-ffffffff8261f410 ? Xipi_invlpg_pcid
-ffffffff8261f460 ? Xipi_invlrange_pcid
-ffffffff8261f4d0 ? Xintr_lapic_ltimer
-ffffffff8261f510 ? Xintr_xen_upcall
-ffffffff8261f550 ? Xintr_hyperv_upcall
-ffffffff8261f590 ? Xintr_legacy0
-ffffffff8261f5d0 ? Xintr_legacy1
-ffffffff8261f610 ? Xintr_legacy2
-ffffffff8261f650 ? Xintr_legacy3
-ffffffff8261f690 ? Xintr_legacy4
-ffffffff8261f6d0 ? Xintr_legacy5
-ffffffff8261f710 ? Xintr_legacy6
-ffffffff8261f750 ? Xintr_legacy7
-ffffffff8261f790 ? Xintr_legacy8
-ffffffff8261f7d0 ? Xintr_legacy9
-ffffffff8261f810 ? Xintr_legacy10
-ffffffff8261f850 ? Xintr_legacy11
-ffffffff8261f890 ? Xintr_legacy12
-ffffffff8261f8d0 ? Xintr_legacy13
-ffffffff8261f910 ? Xintr_legacy14
-ffffffff8261f950 ? Xintr_legacy15
-ffffffff8261f990 ? Xintr_ioapic_edge0
-ffffffff8261f9d0 ? Xintr_ioapic_edge1
-ffffffff8261fa10 ? Xintr_ioapic_edge2
-ffffffff8261fa50 ? Xintr_ioapic_edge3
-ffffffff8261fa90 ? Xintr_ioapic_edge4
-ffffffff8261fad0 ? Xintr_ioapic_edge5
-ffffffff8261fb10 ? Xintr_ioapic_edge6
-ffffffff8261fb50 ? Xintr_ioapic_edge7
-ffffffff8261fb90 ? Xintr_ioapic_edge8
-ffffffff8261fbd0 ? Xintr_ioapic_edge9
-ffffffff8261fc10 ? Xintr_ioapic_edge10
-ffffffff8261fc50 ? Xintr_ioapic_edge11
-ffffffff8261fc90 ? Xintr_ioapic_edge12
-ffffffff8261fcd0 ? Xintr_ioapic_edge13
-ffffffff8261fd10 ? Xintr_ioapic_edge14
-ffffffff8261fd50 ? Xintr_ioapic_edge15
-ffffffff8261fd90 ? Xintr_ioapic_edge16
-ffffffff8261fdd0 ? Xintr_ioapic_edge17
-ffffffff8261fe10 ? Xintr_ioapic_edge18
-ffffffff8261fe50 ? Xintr_ioapic_edge19
-ffffffff8261fe90 ? Xintr_ioapic_edge20
-ffffffff8261fed0 ? Xintr_ioapic_edge21
-ffffffff8261ff10 ? Xintr_ioapic_edge22
-ffffffff8261ff50 ? Xintr_ioapic_edge23
-ffffffff8261ff90 ? Xintr_ioapic_edge24
-ffffffff8261ffd0 ? Xintr_ioapic_edge25
-ffffffff82620010 ? Xintr_ioapic_edge26
-ffffffff82620050 ? Xintr_ioapic_edge27
-ffffffff82620090 ? Xintr_ioapic_edge28
-ffffffff826200d0 ? Xintr_ioapic_edge29
-ffffffff82620110 ? Xintr_ioapic_edge30
-ffffffff82620150 ? Xintr_ioapic_edge31
-ffffffff82620190 ? Xintr_ioapic_edge32
-ffffffff826201d0 ? Xintr_ioapic_edge33
-ffffffff82620210 ? Xintr_ioapic_edge34
-ffffffff82620250 ? Xintr_ioapic_edge35
-ffffffff82620290 ? Xintr_ioapic_edge36
-ffffffff826202d0 ? Xintr_ioapic_edge37
-ffffffff82620310 ? Xintr_ioapic_edge38
-ffffffff82620350 ? Xintr_ioapic_edge39
-ffffffff82620390 ? Xintr_ioapic_edge40
-ffffffff826203d0 ? Xintr_ioapic_edge41
-ffffffff82620410 ? Xintr_ioapic_edge42
-ffffffff82620450 ? Xintr_ioapic_edge43
-ffffffff82620490 ? Xintr_ioapic_edge44
-ffffffff826204d0 ? Xintr_ioapic_edge45
-ffffffff82620510 ? Xintr_ioapic_edge46
-ffffffff82620550 ? Xintr_ioapic_edge47
-ffffffff82620590 ? Xintr_ioapic_edge48
-ffffffff826205d0 ? Xintr_ioapic_edge49
-ffffffff82620610 ? Xintr_ioapic_edge50
-ffffffff82620650 ? Xintr_ioapic_edge51
-ffffffff82620690 ? Xintr_ioapic_edge52
-ffffffff826206d0 ? Xintr_ioapic_edge53
-ffffffff82620710 ? Xintr_ioapic_edge54
-ffffffff82620750 ? Xintr_ioapic_edge55
-ffffffff82620790 ? Xintr_ioapic_edge56
-ffffffff826207d0 ? Xintr_ioapic_edge57
-ffffffff82620810 ? Xintr_ioapic_edge58
-ffffffff82620850 ? Xintr_ioapic_edge59
-ffffffff82620890 ? Xintr_ioapic_edge60
-ffffffff826208d0 ? Xintr_ioapic_edge61
-ffffffff82620910 ? Xintr_ioapic_edge62
-ffffffff82620950 ? Xintr_ioapic_edge63
-ffffffff82620990 ? Xintr_ioapic_level0
-ffffffff826209d0 ? Xintr_ioapic_level1
-ffffffff82620a10 ? Xintr_ioapic_level2
-ffffffff82620a50 ? Xintr_ioapic_level3
-ffffffff82620a90 ? Xintr_ioapic_level4
-ffffffff82620ad0 ? Xintr_ioapic_level5
-ffffffff82620b10 ? Xintr_ioapic_level6
-ffffffff82620b50 ? Xintr_ioapic_level7
-ffffffff82620b90 ? Xintr_ioapic_level8
-ffffffff82620bd0 ? Xintr_ioapic_level9
-ffffffff82620c10 ? Xintr_ioapic_level10
-ffffffff82620c50 ? Xintr_ioapic_level11
-ffffffff82620c90 ? Xintr_ioapic_level12
-ffffffff82620cd0 ? Xintr_ioapic_level13
-ffffffff82620d10 ? Xintr_ioapic_level14
-ffffffff82620d50 ? Xintr_ioapic_level15
-ffffffff82620d90 ? Xintr_ioapic_level16
-ffffffff82620dd0 ? Xintr_ioapic_level17
-ffffffff82620e10 ? Xintr_ioapic_level18
-ffffffff82620e50 ? Xintr_ioapic_level19
-ffffffff82620e90 ? Xintr_ioapic_level20
-ffffffff82620ed0 ? Xintr_ioapic_level21
-ffffffff82620f10 ? Xintr_ioapic_level22
-ffffffff82620f50 ? Xintr_ioapic_level23
-ffffffff82620f90 ? Xintr_ioapic_level24
-ffffffff82620fd0 ? Xintr_ioapic_level25
-ffffffff82621010 ? Xintr_ioapic_level26
-ffffffff82621050 ? Xintr_ioapic_level27
-ffffffff82621090 ? Xintr_ioapic_level28
-ffffffff826210d0 ? Xintr_ioapic_level29
-ffffffff82621110 ? Xintr_ioapic_level30
-ffffffff82621150 ? Xintr_ioapic_level31
-ffffffff82621190 ? Xintr_ioapic_level32
-ffffffff826211d0 ? Xintr_ioapic_level33
-ffffffff82621210 ? Xintr_ioapic_level34
-ffffffff82621250 ? Xintr_ioapic_level35
-ffffffff82621290 ? Xintr_ioapic_level36
-ffffffff826212d0 ? Xintr_ioapic_level37
-ffffffff82621310 ? Xintr_ioapic_level38
-ffffffff82621350 ? Xintr_ioapic_level39
-ffffffff82621390 ? Xintr_ioapic_level40
-ffffffff826213d0 ? Xintr_ioapic_level41
-ffffffff82621410 ? Xintr_ioapic_level42
-ffffffff82621450 ? Xintr_ioapic_level43
-ffffffff82621490 ? Xintr_ioapic_level44
-ffffffff826214d0 ? Xintr_ioapic_level45
-ffffffff82621510 ? Xintr_ioapic_level46
-ffffffff82621550 ? Xintr_ioapic_level47
-ffffffff82621590 ? Xintr_ioapic_level48
-ffffffff826215d0 ? Xintr_ioapic_level49
-ffffffff82621610 ? Xintr_ioapic_level50
-ffffffff82621650 ? Xintr_ioapic_level51
-ffffffff82621690 ? Xintr_ioapic_level52
-ffffffff826216d0 ? Xintr_ioapic_level53
-ffffffff82621710 ? Xintr_ioapic_level54
-ffffffff82621750 ? Xintr_ioapic_level55
-ffffffff82621790 ? Xintr_ioapic_level56
-ffffffff826217d0 ? Xintr_ioapic_level57
-ffffffff82621810 ? Xintr_ioapic_level58
-ffffffff82621850 ? Xintr_ioapic_level59
-ffffffff82621890 ? Xintr_ioapic_level60
-ffffffff826218d0 ? Xintr_ioapic_level61
-ffffffff82621910 ? Xintr_ioapic_level62
-ffffffff82621950 ? Xintr_ioapic_level63
-ffffffff82622000 ? codepatch_fill_nop
-ffffffff82622000 A __cptext_start
-ffffffff82622000 A __kutext_end
-ffffffff826220b0 ? codepatch_maprw
-ffffffff82622190 ? codepatch_unmaprw
-ffffffff82622200 ? codepatch_nop
-ffffffff82622360 ? codepatch_replace
-ffffffff82622510 ? codepatch_call
-ffffffff82622530 ? codepatch_control_flow
-ffffffff82622740 ? codepatch_jmp
-ffffffff82623000 A __cptext_end
-ffffffff82623000 A __rodata_start
-ffffffff82623000 C _etext
-ffffffff82623000 C etext
-ffffffff82624000 r seeprom_read
-ffffffff82624004 r icl_mg_pll_find_divisors.div1_vals
-ffffffff82624034 r athn_ac2qid
-ffffffff82624034 r athn_ac2qid
-ffffffff82624034 r athn_ac2qid
-ffffffff82624040 r rtwn_get_rssi.cckoff
-ffffffff82624068 r rsu_ac2qid
-ffffffff82624078 r pckbc_portcmd
-ffffffff8262407c r tht_fifo_write_pad.pad
-ffffffff82624084 r rsu_get_rssi.cckoff
-ffffffff826240a4 r adlp_n_revids
-ffffffff826240e8 r apple_iso_trans
-ffffffff826240f0 r wihap_check_tx.txratetable
-ffffffff826240f4 r dmamode
-ffffffff82624118 r gen9_edram_size_mb.sets
-ffffffff8262412c r dg2_g12_revid_step_tbl
-ffffffff82625000 r isomappings
-ffffffff82625080 r unimappings
-ffffffff82625230 r replacements
-ffffffff82628b08 r apollo_pio_rec
-ffffffff8267650a r apollo_udma33_tim
-ffffffff8268ba43 r pp_r600_decoded_lanes
-ffffffff826c24c0 r cmd680_setup_channel.udma_tbl
-ffffffff826caa9a r apollo_udma100_tim
-ffffffff826caaa0 r cmd0646_9_tim_udma
-ffffffff826d9334 r substchar
-ffffffff827302fa r apollo_udma133_tim
-ffffffff82730301 r apollo_udma66_tim
-ffffffff8273032b r cy_pio_rec
-ffffffff82735b30 R drm_ca
-ffffffff82735b58 R drm_filtops
-ffffffff82735b88 R drmread_filtops
-ffffffff82736000 r vga_emulops
-ffffffff82736048 R vga_stdscreen
-ffffffff82736078 R vga_stdscreen_mono
-ffffffff827360a8 R vga_stdscreen_bf
-ffffffff827360d8 R vga_40lscreen
-ffffffff82736108 R vga_40lscreen_mono
-ffffffff82736138 R vga_40lscreen_bf
-ffffffff82736168 R vga_50lscreen
-ffffffff82736198 R vga_50lscreen_mono
-ffffffff827361c8 R vga_50lscreen_bf
-ffffffff827361f8 R vga_screenlist
-ffffffff82736208 R vga_screenlist_mono
-ffffffff82736218 R vga_accessops
-ffffffff82736278 r i945_wm_info
-ffffffff827362b8 r bgansitopc
-ffffffff827362c0 r pctoansi
-ffffffff82736300 r sdma_offsets
-ffffffff82736300 r sdma_offsets
-ffffffff82736338 r iha_rate_tbl
-ffffffff82736370 r i830_a_wm_info
-ffffffff827363a8 r gen9_edram_size_mb.ways
-ffffffff82736408 r aggr_periodic_times
-ffffffff82736500 r michael_final.pad
-ffffffff82736528 r rt_copysa.maskarray
-ffffffff82736530 r i915_wm_info
-ffffffff82736538 r amdgpu_ih_clientid_jpeg
-ffffffff82736538 r amdgpu_ih_clientid_uvds
-ffffffff82736538 r amdgpu_ih_clientid_vcns
-ffffffff82736538 r amdgpu_ih_clientid_vcns
-ffffffff82736538 r amdgpu_ih_clientid_vcns
-ffffffff82736568 r jsl_ehl_revids
-ffffffff82736578 r vga_setfontset.cmaptabb
-ffffffff827365e8 r i830_bc_wm_info
-ffffffff82736650 r hsw_activate_psr2.map
-ffffffff82736658 r tgl_revids
-ffffffff82736690 r __drm_universal_plane_init.default_modifiers
-ffffffff827366a0 r iwn_tid2fifo
-ffffffff827366b8 r vga_setfontset.cmaptaba
-ffffffff827366c0 r crtc_offsets
-ffffffff827366c0 r crtc_offsets
-ffffffff827366c0 r crtc_offsets
-ffffffff82736768 r rtwn_r88e_get_rssi.cckoff
-ffffffff82737000 R edid_vendors
-ffffffff827372c0 R edid_nvendors
-ffffffff827372d0 R edid_products
-ffffffff82737330 R edid_nproducts
-ffffffff82737340 r _edid_modes
-ffffffff82738000 R videomode_list
-ffffffff82739080 R videomode_count
-ffffffff8273a000 r ahc_hard_errors
-ffffffff8273a080 r critical_sections
-ffffffff8273a0b0 r patches
-ffffffff8273ad50 r seqprog
-ffffffff8273c000 r ahc_switch
-ffffffff8273d000 r termstat_strings
-ffffffff8273d020 r critical_sections
-ffffffff8273d060 r seqprog
-ffffffff8273dd50 r patches
-ffffffff8273f000 r ahd_switch
-ffffffff82740000 R aic_switch
-ffffffff82741000 R adw_switch
-ffffffff82742000 R gdt_switch
-ffffffff82743000 R twe_switch
-ffffffff82744000 R ciss_switch
-ffffffff82744030 R ciss_level
-ffffffff82744050 R ciss_stat
-ffffffff82745000 R ami_switch
-ffffffff82745028 R ami_raw_switch
-ffffffff82746000 R mfi_switch
-ffffffff82746028 R mfi_pd_switch
-ffffffff82746050 r mfi_iop_xscale
-ffffffff82746080 r mfi_iop_ppc
-ffffffff827460b0 r mfi_iop_gen2
-ffffffff827460e0 r mfi_iop_skinny
-ffffffff82746110 r mfi_bbu_indicators
-ffffffff82747000 R qlw_switch
-ffffffff82748000 R isp_2100_risc_code
-ffffffff8275abf0 R isp_2200_risc_code
-ffffffff8276d990 R isp_2300_risc_code
-ffffffff82787408 R qla_switch
-ffffffff82787430 r qla_regs_2100
-ffffffff82787460 r qla_regs_2200
-ffffffff82787490 r qla_regs_23XX
-ffffffff82788000 R ahci_atascsi_methods
-ffffffff82789000 R nvme_switch
-ffffffff82789028 r nvme_ops
-ffffffff8278a000 R mpi_switch
-ffffffff8278a060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs
-ffffffff8278a090 r chv_oa_mux_regs
-ffffffff8278a0b0 r fiji_clock_stretcher_lookup_table
-ffffffff8278a0b0 r tonga_clock_stretcher_lookup_table
-ffffffff8278a0d0 r iosf_pci_devices
-ffffffff8278a0f0 r link_speed
-ffffffff8278a0f0 r link_speed
-ffffffff8278a130 r drm_fb_xfrm.default_dst_pitch
-ffffffff8278a130 r non_supported_protection
-ffffffff8278a140 r tgl_uy_revids
-ffffffff8278a2b0 r bwi_phy_noise_11g_rev1
-ffffffff8278a320 r cardslot_process_event.antonym_ev
-ffffffff8278a3b0 r gen11_oa_mux_regs
-ffffffff8278a450 r dpia_to_preferred_enc_id_table
-ffffffff8278a4c0 r ddr2_cycle_tenths
-ffffffff8278a530 r rtw_intr_rx.ratetbl
-ffffffff8278a5b0 r abm_config
-ffffffff8278a630 r getbootinfo.ports
-ffffffff8278a680 r reg_offsets
-ffffffff8278a690 r bwi_rf_lo_measure_11g.rf_lo_adjust
-ffffffff8278a6a0 r glk_revids
-ffffffff8278a6b0 r init_non_clock_fields.look_up
-ffffffff8278a6c0 r uftdi_8u232am_getrate.roundoff
-ffffffff8278a720 r zyd_rx_data.rates
-ffffffff8278a740 r ieee80211_ra_valid_tx_mcs.max_mcs
-ffffffff8278a770 r intel_engine_init_tlb_invalidation.gen8_regs
-ffffffff8278a7a0 r bwi_phy_noise_11g
-ffffffff8278a7b0 r hpt366_pio
-ffffffff8278a810 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs
-ffffffff8278a830 r ether_crc32_be_update.rev
-ffffffff8278a830 r rtw_grf5101_mac_crypt.caesar
-ffffffff8278a880 r snb_b_fdi_train_param
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-ffffffff8279e280 R w83782d_sensors
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-ffffffff827c7000 R bwi_vendor_led_act
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-ffffffff827c7010 R bwi_led_duration
-ffffffff827c7380 r bwi_sup_bphy
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-ffffffff827c77d0 r bwi_phy_sigma_sq_11g_rev7
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-ffffffff827ca370 R qmi_wlanfw_bdf_download_resp_msg_v01_ei
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-ffffffff827ca790 R qmi_wlanfw_wlan_cfg_req_msg_v01_ei
-ffffffff827ca970 R qmi_wlanfw_wlan_cfg_resp_msg_v01_ei
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-ffffffff827eb000 R video_ca
-ffffffff827eb028 R video_filtops
-ffffffff827ec000 R cd9660_vfsops
-ffffffff827ed000 R cd9660_vops
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-ffffffff827f8000 R kv_exec
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-ffffffff827fe000 R sig_filtops
-ffffffff827fe030 R sigprop
-ffffffff827ff000 R kern_vars
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-ffffffff82804010 r gpt_get_fstype.gpt_uuid_msdos
-ffffffff82804020 r gpt_get_fstype.gpt_uuid_chromerootfs
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-ffffffff8281b040 r dos2unix
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-ffffffff828310a8 R nvgre_mcast_tree_RBT_TYPE
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-ffffffff828310c8 R eoip_tree_RBT_TYPE
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-ffffffff82833006 R lacp_info_tlv_template
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-ffffffff82837000 R pppx_rd_filtops
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-ffffffff82845000 R divertctl_vars
-ffffffff82845030 R divert_usrreqs
-ffffffff82846000 R icmpctl_vars
-ffffffff82847000 R ipctl_vars
-ffffffff82847140 R inetctlerrmap
-ffffffff82848000 R rip_usrreqs
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-ffffffff8284a000 R tcp_usrreqs
-ffffffff8284a0a8 R tcp6_usrreqs
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-ffffffff8284b000 R udp_usrreqs
-ffffffff8284b0a8 R udp6_usrreqs
-ffffffff8284b150 R udpctl_vars
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-ffffffff8284d040 R xformsw
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-ffffffff8285e000 R enc_xform_3des
-ffffffff8285e040 R enc_xform_blf
-ffffffff8285e080 R enc_xform_cast5
-ffffffff8285e0c0 R enc_xform_aes
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-ffffffff8285e140 R enc_xform_aes_gcm
-ffffffff8285e180 R enc_xform_aes_gmac
-ffffffff8285e1c0 R enc_xform_aes_xts
-ffffffff8285e200 R enc_xform_chacha20_poly1305
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+ffffffff825ef6a0 T acpisbs_notify
+ffffffff825ef7e0 T acpi_smbus_read
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+ffffffff825f00c0 T surface_hotkey
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+ffffffff825f3000 T acpihid_match
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+ffffffff825f50a0 T acpi_probe
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+ffffffff825f5760 T acpi_attach_machdep
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+ffffffff825f5a90 T acpi_resume_cpu
+ffffffff825f5b90 T sleep_mp
+ffffffff825f5c80 T resume_mp
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+ffffffff82606e90 t vmm_handle_cpuid_0xd
+ffffffff82606f90 T vmm_gpa_is_valid
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+ffffffff82607e50 T vcpu_state_decode
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+ffffffff82608589 t restore_host
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+ffffffff82609000 T sdmmc_match
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+ffffffff82609640 T sdmmc_holds_root_device
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+ffffffff82609940 T sdmmc_del_task
+ffffffff826099f0 T sdmmc_card_detach
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+ffffffff8260a0c0 T sdmmc_delay
+ffffffff8260a110 T sdmmc_select_card
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+ffffffff8260a4e0 T sdmmc_function_alloc
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+ffffffff8260a700 T sdmmc_mmc_command
+ffffffff8260a780 T sdmmc_go_idle_state
+ffffffff8260a890 T sdmmc_send_if_cond
+ffffffff8260a9e0 T sdmmc_set_relative_addr
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+ffffffff8260b0a0 T sdmmc_read_cis
+ffffffff8260b3e0 T sdmmc_print_cis
+ffffffff8260b550 T sdmmc_check_cis_quirks
+ffffffff8260c000 T sdmmc_io_enable
+ffffffff8260c2a0 T sdmmc_io_reset
+ffffffff8260c3d0 T sdmmc_io_send_op_cond
+ffffffff8260c540 T sdmmc_io_scan
+ffffffff8260c690 T sdmmc_io_init
+ffffffff8260c7c0 T sdmmc_io_set_highspeed
+ffffffff8260ca60 T sdmmc_io_set_bus_width
+ffffffff8260ccf0 T sdmmc_io_function_ready
+ffffffff8260ce70 T sdmmc_io_read_1
+ffffffff8260cfc0 T sdmmc_io_function_enable
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+ffffffff8260d510 T sdmmc_io_function_disable
+ffffffff8260d790 T sdmmc_io_attach
+ffffffff8260d880 T sdmmc_print
+ffffffff8260dad0 T sdmmc_submatch
+ffffffff8260db50 T sdmmc_io_detach
+ffffffff8260dc00 T sdmmc_io_rw_direct
+ffffffff8260dda0 T sdmmc_io_rw_extended_subr
+ffffffff8260df40 T sdmmc_io_rw_extended
+ffffffff8260e340 T sdmmc_io_read_2
+ffffffff8260e4a0 T sdmmc_io_write_2
+ffffffff8260e600 T sdmmc_io_read_4
+ffffffff8260e760 T sdmmc_io_write_4
+ffffffff8260e8c0 T sdmmc_io_read_multi_1
+ffffffff8260e9b0 T sdmmc_io_write_multi_1
+ffffffff8260eaa0 T sdmmc_io_read_region_1
+ffffffff8260eb90 T sdmmc_io_write_region_1
+ffffffff8260ec80 T sdmmc_io_xchg
+ffffffff8260ee10 T sdmmc_intr_enable
+ffffffff8260f080 T sdmmc_intr_disable
+ffffffff8260f2f0 T sdmmc_intr_establish
+ffffffff8260f3f0 T sdmmc_intr_disestablish
+ffffffff8260f4e0 T sdmmc_card_intr
+ffffffff8260f530 T sdmmc_intr_task
+ffffffff8260f5c0 T sdmmc_io_set_blocklen
+ffffffff82610000 T sdmmc_mem_enable
+ffffffff82610450 T sdmmc_mem_send_op_cond
+ffffffff82610600 T sdmmc_mem_signal_voltage
+ffffffff826106c0 T sdmmc_mem_scan
+ffffffff826109d0 T sdmmc_decode_csd
+ffffffff82610e00 T sdmmc_decode_cid
+ffffffff826112a0 T sdmmc_mem_send_scr
+ffffffff826113e0 T sdmmc_mem_decode_scr
+ffffffff82611440 T sdmmc_mem_send_cxd_data
+ffffffff826115b0 T sdmmc_mem_set_bus_width
+ffffffff826116c0 T sdmmc_mem_sd_switch
+ffffffff82611970 T sdmmc_be512_to_bitfield512
+ffffffff82611a20 T sdmmc_mem_mmc_switch
+ffffffff82611b10 T sdmmc_mem_init
+ffffffff82611c60 T sdmmc_mem_set_blocklen
+ffffffff82611d60 T sdmmc_mem_sd_init
+ffffffff82612140 T sdmmc_mem_mmc_init
+ffffffff82612800 T sdmmc_mem_select_transfer_mode
+ffffffff82612880 T sdmmc_mem_execute_tuning
+ffffffff82612910 T sdmmc_mem_read_block_subr
+ffffffff82612c70 T sdmmc_mem_single_read_block
+ffffffff82612d40 T sdmmc_mem_read_block
+ffffffff82612ef0 T sdmmc_mem_write_block_subr
+ffffffff82613240 T sdmmc_mem_single_write_block
+ffffffff82613310 T sdmmc_mem_write_block
+ffffffff826134c0 T sdmmc_mem_hibernate_write
+ffffffff82614000 T sdmmc_scsi_cmd
+ffffffff826141f0 T sdmmc_minphys
+ffffffff82614270 T sdmmc_scsi_attach
+ffffffff82614460 T sdmmc_alloc_ccbs
+ffffffff826145a0 T sdmmc_free_ccbs
+ffffffff82614600 T sdmmc_scsi_detach
+ffffffff82614760 T sdmmc_stimeout
+ffffffff826147e0 T sdmmc_ccb_alloc
+ffffffff82614890 T sdmmc_ccb_free
+ffffffff82614970 T sdmmc_inquiry
+ffffffff82614be0 T sdmmc_start_xs
+ffffffff82614cd0 T sdmmc_complete_xs
+ffffffff82614da0 T sdmmc_done_xs
+ffffffff82614df0 T sdmmc_scsi_hibernate_io
+ffffffff82615000 T bwfm_sdio_preinit
+ffffffff826154a0 T bwfm_sdio_txcheck
+ffffffff826154e0 T bwfm_sdio_txdata
+ffffffff82615550 T bwfm_sdio_txctl
+ffffffff826156a0 T bwfm_sdio_buscore_read
+ffffffff826156b0 T bwfm_sdio_buscore_write
+ffffffff826156d0 T bwfm_sdio_buscore_prepare
+ffffffff82615810 T bwfm_sdio_buscore_activate
+ffffffff82615890 T bwfm_sdio_match
+ffffffff82615940 T bwfm_sdio_attach
+ffffffff82615c00 T bwfm_sdio_detach
+ffffffff82615c60 T bwfm_sdio_task
+ffffffff82615dc0 T bwfm_sdio_write_1
+ffffffff82615df0 T bwfm_sdio_read_1
+ffffffff82615e20 T bwfm_sdio_write_4
+ffffffff82615ed0 T bwfm_sdio_read_4
+ffffffff82615f80 T bwfm_sdio_load_microcode
+ffffffff826161e0 T bwfm_sdio_clkctl
+ffffffff82616310 T bwfm_sdio_dev_write
+ffffffff82616360 T bwfm_sdio_intr
+ffffffff826163a0 T bwfm_sdio_ram_read_write
+ffffffff826165d0 T bwfm_sdio_htclk
+ffffffff82616840 T bwfm_sdio_readshared
+ffffffff82616910 T bwfm_sdio_dev_read
+ffffffff82616950 T bwfm_sdio_rx_frames
+ffffffff82616d00 T bwfm_sdio_tx_frames
+ffffffff82616e00 T bwfm_sdio_backplane
+ffffffff82616eb0 T bwfm_sdio_buf_read
+ffffffff82616f90 T bwfm_sdio_buf_write
+ffffffff82617040 T bwfm_sdio_frame_read_write
+ffffffff826171c0 T bwfm_sdio_newbuf
+ffffffff82617240 T bwfm_sdio_tx_ok
+ffffffff826172a0 T bwfm_sdio_tx_ctrlframe
+ffffffff826173a0 T bwfm_sdio_tx_dataframe
+ffffffff826174f0 T bwfm_sdio_rx_glom
+ffffffff82618000 T onewire_match
+ffffffff82618050 T onewire_attach
+ffffffff826180f0 T onewire_detach
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+ffffffff82618180 T onewire_scan
+ffffffff826183a0 T onewire_createthread
+ffffffff82618410 T onewire_print
+ffffffff826184e0 T onewirebus_print
+ffffffff82618530 T onewire_lock
+ffffffff82618550 T onewire_unlock
+ffffffff82618570 T onewire_reset
+ffffffff82618590 T onewire_bit
+ffffffff826185b0 T onewire_read_byte
+ffffffff826186f0 T onewire_write_byte
+ffffffff826187d0 T onewire_read_block
+ffffffff82618870 T onewire_write_block
+ffffffff82618910 T onewire_triplet
+ffffffff826189f0 T onewire_matchrom
+ffffffff82618b40 T onewire_search
+ffffffff82618ee0 T onewire_thread
+ffffffff82619000 T onewire_crc
+ffffffff826190b0 T onewire_crc16
+ffffffff82619170 T onewire_famname
+ffffffff826191b0 T onewire_matchbyfam
+ffffffff8261a000 T owid_match
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+ffffffff8261a100 T owid_detach
+ffffffff8261a140 T owid_activate
+ffffffff8261b000 T owsbm_match
+ffffffff8261b030 T owsbm_attach
+ffffffff8261b1d0 T owsbm_detach
+ffffffff8261b240 T owsbm_activate
+ffffffff8261b270 T owsbm_update
+ffffffff8261c000 T owtemp_match
+ffffffff8261c030 T owtemp_attach
+ffffffff8261c130 T owtemp_detach
+ffffffff8261c1a0 T owtemp_activate
+ffffffff8261c1d0 T owtemp_update
+ffffffff8261d000 T owctr_match
+ffffffff8261d030 T owctr_attach
+ffffffff8261d180 T owctr_detach
+ffffffff8261d1f0 T owctr_activate
+ffffffff8261d220 T owctr_update
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+ffffffff8261e000 A __text_page_start
+ffffffff8261e000 T Xsyscall_meltdown
+ffffffff8261e00c T Xsyscall
+ffffffff8261e299 t Xsyscall_trampback
+ffffffff8261e2b0 T intr_user_exit
+ffffffff8261e2f2 t intr_user_exit_post_ast
+ffffffff8261e44b t Xiretq_trampback
+ffffffff8261e457 T doreti_iret
+ffffffff8261f000 T alltraps
+ffffffff8261f138 T recall_trap
+ffffffff8261f150 T alltraps_kern
+ffffffff8261f153 T alltraps_kern_meltdown
+ffffffff82620000 ? Xtrap00
+ffffffff82620000 A __kutext_start
+ffffffff82620000 A __text_page_end
+ffffffff82620010 ? Xtrap01
+ffffffff82620020 ? Xtrap02
+ffffffff82620028 c calltrap_specstk
+ffffffff826200f0 ? calltrap_specstk_tramp
+ffffffff82620110 ? Xtrap03
+ffffffff82620120 ? Xtrap04
+ffffffff82620130 ? Xtrap05
+ffffffff82620140 ? Xtrap06
+ffffffff82620150 ? Xtrap07
+ffffffff82620160 ? Xtrap08
+ffffffff82620170 ? Xtrap09
+ffffffff82620180 ? Xtrap0a
+ffffffff82620190 ? Xtrap0b
+ffffffff826201a0 ? Xtrap0c
+ffffffff826201b0 ? Xtrap0d
+ffffffff82620240 ? Xtrap0e
+ffffffff82620250 ? Xintrspurious
+ffffffff82620250 ? Xtrap0f
+ffffffff82620260 ? Xtrap10
+ffffffff82620270 ? Xtrap11
+ffffffff82620280 ? Xtrap12
+ffffffff82620290 ? Xtrap13
+ffffffff826202a0 ? Xtrap14
+ffffffff826202b0 ? Xtrap15
+ffffffff826202c0 ? Xtrap16
+ffffffff826202c0 ? Xtrap17
+ffffffff826202c0 ? Xtrap18
+ffffffff826202c0 ? Xtrap19
+ffffffff826202c0 ? Xtrap1a
+ffffffff826202c0 ? Xtrap1b
+ffffffff826202c0 ? Xtrap1c
+ffffffff826202c0 ? Xtrap1d
+ffffffff826202c0 ? Xtrap1e
+ffffffff826202c0 ? Xtrap1f
+ffffffff826202d0 ? x2apic_eoi
+ffffffff826202f0 ? Xintr_lapic_ipi
+ffffffff82620330 ? Xipi_invltlb
+ffffffff82620360 ? Xipi_invlpg
+ffffffff82620390 ? Xipi_invlrange
+ffffffff826203d0 ? Xipi_invltlb_pcid
+ffffffff82620410 ? Xipi_invlpg_pcid
+ffffffff82620460 ? Xipi_invlrange_pcid
+ffffffff826204d0 ? Xintr_lapic_ltimer
+ffffffff82620510 ? Xintr_xen_upcall
+ffffffff82620550 ? Xintr_hyperv_upcall
+ffffffff82620590 ? Xintr_legacy0
+ffffffff826205d0 ? Xintr_legacy1
+ffffffff82620610 ? Xintr_legacy2
+ffffffff82620650 ? Xintr_legacy3
+ffffffff82620690 ? Xintr_legacy4
+ffffffff826206d0 ? Xintr_legacy5
+ffffffff82620710 ? Xintr_legacy6
+ffffffff82620750 ? Xintr_legacy7
+ffffffff82620790 ? Xintr_legacy8
+ffffffff826207d0 ? Xintr_legacy9
+ffffffff82620810 ? Xintr_legacy10
+ffffffff82620850 ? Xintr_legacy11
+ffffffff82620890 ? Xintr_legacy12
+ffffffff826208d0 ? Xintr_legacy13
+ffffffff82620910 ? Xintr_legacy14
+ffffffff82620950 ? Xintr_legacy15
+ffffffff82620990 ? Xintr_ioapic_edge0
+ffffffff826209d0 ? Xintr_ioapic_edge1
+ffffffff82620a10 ? Xintr_ioapic_edge2
+ffffffff82620a50 ? Xintr_ioapic_edge3
+ffffffff82620a90 ? Xintr_ioapic_edge4
+ffffffff82620ad0 ? Xintr_ioapic_edge5
+ffffffff82620b10 ? Xintr_ioapic_edge6
+ffffffff82620b50 ? Xintr_ioapic_edge7
+ffffffff82620b90 ? Xintr_ioapic_edge8
+ffffffff82620bd0 ? Xintr_ioapic_edge9
+ffffffff82620c10 ? Xintr_ioapic_edge10
+ffffffff82620c50 ? Xintr_ioapic_edge11
+ffffffff82620c90 ? Xintr_ioapic_edge12
+ffffffff82620cd0 ? Xintr_ioapic_edge13
+ffffffff82620d10 ? Xintr_ioapic_edge14
+ffffffff82620d50 ? Xintr_ioapic_edge15
+ffffffff82620d90 ? Xintr_ioapic_edge16
+ffffffff82620dd0 ? Xintr_ioapic_edge17
+ffffffff82620e10 ? Xintr_ioapic_edge18
+ffffffff82620e50 ? Xintr_ioapic_edge19
+ffffffff82620e90 ? Xintr_ioapic_edge20
+ffffffff82620ed0 ? Xintr_ioapic_edge21
+ffffffff82620f10 ? Xintr_ioapic_edge22
+ffffffff82620f50 ? Xintr_ioapic_edge23
+ffffffff82620f90 ? Xintr_ioapic_edge24
+ffffffff82620fd0 ? Xintr_ioapic_edge25
+ffffffff82621010 ? Xintr_ioapic_edge26
+ffffffff82621050 ? Xintr_ioapic_edge27
+ffffffff82621090 ? Xintr_ioapic_edge28
+ffffffff826210d0 ? Xintr_ioapic_edge29
+ffffffff82621110 ? Xintr_ioapic_edge30
+ffffffff82621150 ? Xintr_ioapic_edge31
+ffffffff82621190 ? Xintr_ioapic_edge32
+ffffffff826211d0 ? Xintr_ioapic_edge33
+ffffffff82621210 ? Xintr_ioapic_edge34
+ffffffff82621250 ? Xintr_ioapic_edge35
+ffffffff82621290 ? Xintr_ioapic_edge36
+ffffffff826212d0 ? Xintr_ioapic_edge37
+ffffffff82621310 ? Xintr_ioapic_edge38
+ffffffff82621350 ? Xintr_ioapic_edge39
+ffffffff82621390 ? Xintr_ioapic_edge40
+ffffffff826213d0 ? Xintr_ioapic_edge41
+ffffffff82621410 ? Xintr_ioapic_edge42
+ffffffff82621450 ? Xintr_ioapic_edge43
+ffffffff82621490 ? Xintr_ioapic_edge44
+ffffffff826214d0 ? Xintr_ioapic_edge45
+ffffffff82621510 ? Xintr_ioapic_edge46
+ffffffff82621550 ? Xintr_ioapic_edge47
+ffffffff82621590 ? Xintr_ioapic_edge48
+ffffffff826215d0 ? Xintr_ioapic_edge49
+ffffffff82621610 ? Xintr_ioapic_edge50
+ffffffff82621650 ? Xintr_ioapic_edge51
+ffffffff82621690 ? Xintr_ioapic_edge52
+ffffffff826216d0 ? Xintr_ioapic_edge53
+ffffffff82621710 ? Xintr_ioapic_edge54
+ffffffff82621750 ? Xintr_ioapic_edge55
+ffffffff82621790 ? Xintr_ioapic_edge56
+ffffffff826217d0 ? Xintr_ioapic_edge57
+ffffffff82621810 ? Xintr_ioapic_edge58
+ffffffff82621850 ? Xintr_ioapic_edge59
+ffffffff82621890 ? Xintr_ioapic_edge60
+ffffffff826218d0 ? Xintr_ioapic_edge61
+ffffffff82621910 ? Xintr_ioapic_edge62
+ffffffff82621950 ? Xintr_ioapic_edge63
+ffffffff82621990 ? Xintr_ioapic_level0
+ffffffff826219d0 ? Xintr_ioapic_level1
+ffffffff82621a10 ? Xintr_ioapic_level2
+ffffffff82621a50 ? Xintr_ioapic_level3
+ffffffff82621a90 ? Xintr_ioapic_level4
+ffffffff82621ad0 ? Xintr_ioapic_level5
+ffffffff82621b10 ? Xintr_ioapic_level6
+ffffffff82621b50 ? Xintr_ioapic_level7
+ffffffff82621b90 ? Xintr_ioapic_level8
+ffffffff82621bd0 ? Xintr_ioapic_level9
+ffffffff82621c10 ? Xintr_ioapic_level10
+ffffffff82621c50 ? Xintr_ioapic_level11
+ffffffff82621c90 ? Xintr_ioapic_level12
+ffffffff82621cd0 ? Xintr_ioapic_level13
+ffffffff82621d10 ? Xintr_ioapic_level14
+ffffffff82621d50 ? Xintr_ioapic_level15
+ffffffff82621d90 ? Xintr_ioapic_level16
+ffffffff82621dd0 ? Xintr_ioapic_level17
+ffffffff82621e10 ? Xintr_ioapic_level18
+ffffffff82621e50 ? Xintr_ioapic_level19
+ffffffff82621e90 ? Xintr_ioapic_level20
+ffffffff82621ed0 ? Xintr_ioapic_level21
+ffffffff82621f10 ? Xintr_ioapic_level22
+ffffffff82621f50 ? Xintr_ioapic_level23
+ffffffff82621f90 ? Xintr_ioapic_level24
+ffffffff82621fd0 ? Xintr_ioapic_level25
+ffffffff82622010 ? Xintr_ioapic_level26
+ffffffff82622050 ? Xintr_ioapic_level27
+ffffffff82622090 ? Xintr_ioapic_level28
+ffffffff826220d0 ? Xintr_ioapic_level29
+ffffffff82622110 ? Xintr_ioapic_level30
+ffffffff82622150 ? Xintr_ioapic_level31
+ffffffff82622190 ? Xintr_ioapic_level32
+ffffffff826221d0 ? Xintr_ioapic_level33
+ffffffff82622210 ? Xintr_ioapic_level34
+ffffffff82622250 ? Xintr_ioapic_level35
+ffffffff82622290 ? Xintr_ioapic_level36
+ffffffff826222d0 ? Xintr_ioapic_level37
+ffffffff82622310 ? Xintr_ioapic_level38
+ffffffff82622350 ? Xintr_ioapic_level39
+ffffffff82622390 ? Xintr_ioapic_level40
+ffffffff826223d0 ? Xintr_ioapic_level41
+ffffffff82622410 ? Xintr_ioapic_level42
+ffffffff82622450 ? Xintr_ioapic_level43
+ffffffff82622490 ? Xintr_ioapic_level44
+ffffffff826224d0 ? Xintr_ioapic_level45
+ffffffff82622510 ? Xintr_ioapic_level46
+ffffffff82622550 ? Xintr_ioapic_level47
+ffffffff82622590 ? Xintr_ioapic_level48
+ffffffff826225d0 ? Xintr_ioapic_level49
+ffffffff82622610 ? Xintr_ioapic_level50
+ffffffff82622650 ? Xintr_ioapic_level51
+ffffffff82622690 ? Xintr_ioapic_level52
+ffffffff826226d0 ? Xintr_ioapic_level53
+ffffffff82622710 ? Xintr_ioapic_level54
+ffffffff82622750 ? Xintr_ioapic_level55
+ffffffff82622790 ? Xintr_ioapic_level56
+ffffffff826227d0 ? Xintr_ioapic_level57
+ffffffff82622810 ? Xintr_ioapic_level58
+ffffffff82622850 ? Xintr_ioapic_level59
+ffffffff82622890 ? Xintr_ioapic_level60
+ffffffff826228d0 ? Xintr_ioapic_level61
+ffffffff82622910 ? Xintr_ioapic_level62
+ffffffff82622950 ? Xintr_ioapic_level63
+ffffffff82623000 ? codepatch_fill_nop
+ffffffff82623000 A __cptext_start
+ffffffff82623000 A __kutext_end
+ffffffff826230b0 ? codepatch_maprw
+ffffffff82623190 ? codepatch_unmaprw
+ffffffff82623200 ? codepatch_nop
+ffffffff82623360 ? codepatch_replace
+ffffffff82623510 ? codepatch_call
+ffffffff82623530 ? codepatch_control_flow
+ffffffff82623740 ? codepatch_jmp
+ffffffff82624000 A __cptext_end
+ffffffff82624000 A __rodata_start
+ffffffff82624000 C _etext
+ffffffff82624000 C etext
+ffffffff82625000 r seeprom_read
+ffffffff82625004 r icl_mg_pll_find_divisors.div1_vals
+ffffffff82625034 r athn_ac2qid
+ffffffff82625034 r athn_ac2qid
+ffffffff82625034 r athn_ac2qid
+ffffffff82625040 r rtwn_get_rssi.cckoff
+ffffffff82625068 r rsu_ac2qid
+ffffffff82625078 r pckbc_portcmd
+ffffffff8262507c r tht_fifo_write_pad.pad
+ffffffff82625084 r rsu_get_rssi.cckoff
+ffffffff826250a4 r adlp_n_revids
+ffffffff826250e8 r apple_iso_trans
+ffffffff826250f0 r wihap_check_tx.txratetable
+ffffffff826250f4 r dmamode
+ffffffff82625118 r gen9_edram_size_mb.sets
+ffffffff8262512c r dg2_g12_revid_step_tbl
+ffffffff82626000 r isomappings
+ffffffff82626080 r unimappings
+ffffffff82626230 r replacements
+ffffffff82629b08 r apollo_pio_rec
+ffffffff82677546 r apollo_udma33_tim
+ffffffff8268caac r pp_r600_decoded_lanes
+ffffffff826c352f r cmd680_setup_channel.udma_tbl
+ffffffff826cbb09 r apollo_udma100_tim
+ffffffff826cbb0f r cmd0646_9_tim_udma
+ffffffff826da366 r substchar
+ffffffff8273138e r apollo_udma133_tim
+ffffffff82731395 r apollo_udma66_tim
+ffffffff827313bf r cy_pio_rec
+ffffffff82736be0 R drm_ca
+ffffffff82736c08 R drm_filtops
+ffffffff82736c38 R drmread_filtops
+ffffffff82737000 r vga_emulops
+ffffffff82737048 R vga_stdscreen
+ffffffff82737078 R vga_stdscreen_mono
+ffffffff827370a8 R vga_stdscreen_bf
+ffffffff827370d8 R vga_40lscreen
+ffffffff82737108 R vga_40lscreen_mono
+ffffffff82737138 R vga_40lscreen_bf
+ffffffff82737168 R vga_50lscreen
+ffffffff82737198 R vga_50lscreen_mono
+ffffffff827371c8 R vga_50lscreen_bf
+ffffffff827371f8 R vga_screenlist
+ffffffff82737208 R vga_screenlist_mono
+ffffffff82737218 R vga_accessops
+ffffffff82737278 r i945_wm_info
+ffffffff827372b8 r bgansitopc
+ffffffff827372c0 r pctoansi
+ffffffff82737300 r sdma_offsets
+ffffffff82737300 r sdma_offsets
+ffffffff82737338 r iha_rate_tbl
+ffffffff82737370 r i830_a_wm_info
+ffffffff827373a8 r gen9_edram_size_mb.ways
+ffffffff82737408 r aggr_periodic_times
+ffffffff82737500 r michael_final.pad
+ffffffff82737528 r rt_copysa.maskarray
+ffffffff82737530 r i915_wm_info
+ffffffff82737538 r amdgpu_ih_clientid_jpeg
+ffffffff82737538 r amdgpu_ih_clientid_uvds
+ffffffff82737538 r amdgpu_ih_clientid_vcns
+ffffffff82737538 r amdgpu_ih_clientid_vcns
+ffffffff82737538 r amdgpu_ih_clientid_vcns
+ffffffff82737568 r jsl_ehl_revids
+ffffffff82737578 r vga_setfontset.cmaptabb
+ffffffff827375e8 r i830_bc_wm_info
+ffffffff82737650 r hsw_activate_psr2.map
+ffffffff82737658 r tgl_revids
+ffffffff82737690 r __drm_universal_plane_init.default_modifiers
+ffffffff827376a0 r iwn_tid2fifo
+ffffffff827376b8 r vga_setfontset.cmaptaba
+ffffffff827376c0 r crtc_offsets
+ffffffff827376c0 r crtc_offsets
+ffffffff827376c0 r crtc_offsets
+ffffffff82737768 r rtwn_r88e_get_rssi.cckoff
+ffffffff82738000 R edid_vendors
+ffffffff827382c0 R edid_nvendors
+ffffffff827382d0 R edid_products
+ffffffff82738330 R edid_nproducts
+ffffffff82738340 r _edid_modes
+ffffffff82739000 R videomode_list
+ffffffff8273a080 R videomode_count
+ffffffff8273b000 r ahc_hard_errors
+ffffffff8273b080 r critical_sections
+ffffffff8273b0b0 r patches
+ffffffff8273bd50 r seqprog
+ffffffff8273d000 r ahc_switch
+ffffffff8273e000 r termstat_strings
+ffffffff8273e020 r critical_sections
+ffffffff8273e060 r seqprog
+ffffffff8273ed50 r patches
+ffffffff82740000 r ahd_switch
+ffffffff82741000 R aic_switch
+ffffffff82742000 R adw_switch
+ffffffff82743000 R gdt_switch
+ffffffff82744000 R twe_switch
+ffffffff82745000 R ciss_switch
+ffffffff82745030 R ciss_level
+ffffffff82745050 R ciss_stat
+ffffffff82746000 R ami_switch
+ffffffff82746028 R ami_raw_switch
+ffffffff82747000 R mfi_switch
+ffffffff82747028 R mfi_pd_switch
+ffffffff82747050 r mfi_iop_xscale
+ffffffff82747080 r mfi_iop_ppc
+ffffffff827470b0 r mfi_iop_gen2
+ffffffff827470e0 r mfi_iop_skinny
+ffffffff82747110 r mfi_bbu_indicators
+ffffffff82748000 R qlw_switch
+ffffffff82749000 R isp_2100_risc_code
+ffffffff8275bbf0 R isp_2200_risc_code
+ffffffff8276e990 R isp_2300_risc_code
+ffffffff82788408 R qla_switch
+ffffffff82788430 r qla_regs_2100
+ffffffff82788460 r qla_regs_2200
+ffffffff82788490 r qla_regs_23XX
+ffffffff82789000 R ahci_atascsi_methods
+ffffffff8278a000 R nvme_switch
+ffffffff8278a028 r nvme_ops
+ffffffff8278b000 R mpi_switch
+ffffffff8278b060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs
+ffffffff8278b090 r chv_oa_mux_regs
+ffffffff8278b0b0 r fiji_clock_stretcher_lookup_table
+ffffffff8278b0b0 r tonga_clock_stretcher_lookup_table
+ffffffff8278b0d0 r iosf_pci_devices
+ffffffff8278b0f0 r link_speed
+ffffffff8278b0f0 r link_speed
+ffffffff8278b130 r drm_fb_xfrm.default_dst_pitch
+ffffffff8278b130 r non_supported_protection
+ffffffff8278b140 r tgl_uy_revids
+ffffffff8278b2b0 r bwi_phy_noise_11g_rev1
+ffffffff8278b320 r cardslot_process_event.antonym_ev
+ffffffff8278b3b0 r gen11_oa_mux_regs
+ffffffff8278b450 r dpia_to_preferred_enc_id_table
+ffffffff8278b4c0 r ddr2_cycle_tenths
+ffffffff8278b530 r rtw_intr_rx.ratetbl
+ffffffff8278b5b0 r abm_config
+ffffffff8278b630 r getbootinfo.ports
+ffffffff8278b680 r reg_offsets
+ffffffff8278b690 r bwi_rf_lo_measure_11g.rf_lo_adjust
+ffffffff8278b6a0 r glk_revids
+ffffffff8278b6b0 r init_non_clock_fields.look_up
+ffffffff8278b6c0 r uftdi_8u232am_getrate.roundoff
+ffffffff8278b720 r zyd_rx_data.rates
+ffffffff8278b740 r ieee80211_ra_valid_tx_mcs.max_mcs
+ffffffff8278b770 r intel_engine_init_tlb_invalidation.gen8_regs
+ffffffff8278b7a0 r bwi_phy_noise_11g
+ffffffff8278b7b0 r hpt366_pio
+ffffffff8278b810 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs
+ffffffff8278b830 r ether_crc32_be_update.rev
+ffffffff8278b830 r rtw_grf5101_mac_crypt.caesar
+ffffffff8278b880 r snb_b_fdi_train_param
+ffffffff8278b950 r intel_hpll_vco.elk_vco
+ffffffff8278b970 r icl_revids
+ffffffff8278b9d0 r pin_offsets
+ffffffff8278b9f0 r amdgpu_ih_srcid_jpeg
+ffffffff8278ba30 r firmware_list
+ffffffff8278ba90 r atom_arg_shift
+ffffffff8278ba90 r atom_arg_shift
+ffffffff8278bad0 r pf_syncookie_wstab
+ffffffff8278baf0 r ieee80211_media_init.mopts
+ffffffff8278bb50 r add_entropy_words.twist_table
+ffffffff8278bbf0 r urtw_8225v2_txpwr_cck
+ffffffff8278bc10 r bwfm_pci_prio2fifo
+ffffffff8278bc10 r ieee80211_up_to_ac.up_to_ac
+ffffffff8278bcd0 r paritytab
+ffffffff8278bcd0 r x86emu_parity_tab
+ffffffff8278bcf0 r legacy_connector_convert
+ffffffff8278bd30 r gen7_oa_mux_regs
+ffffffff8278bd50 r hsw_oa_mux_regs
+ffffffff8278bd70 r notetab
+ffffffff8278bd90 r urtw_8225v2_txpwr_cck_ch14
+ffffffff8278bdb0 r bwi_rf_calibval.rf_calibvals
+ffffffff8278be50 r pf_syncookie_msstab
+ffffffff8278beb0 r xgmi3x16_pcs_err_status_reg_aldebaran
+ffffffff8278bf10 r uath_wme_init.uath_wme_11g
+ffffffff8278bf50 r gen7_oa_b_counters
+ffffffff8278c150 r rtwn_iq_calib_run.reg_adda
+ffffffff8278c190 r atom_def_dst
+ffffffff8278c190 r atom_def_dst
+ffffffff8278c1d0 r sha256_initial_hash_value
+ffffffff8278c230 r otus_edca_def
+ffffffff8278c250 r intel_hpll_vco.blb_vco
+ffffffff8278c330 r epic_pci_subsys_info
+ffffffff8278c350 r kbl_revids
+ffffffff8278c370 r atom_arg_mask
+ffffffff8278c370 r atom_arg_mask
+ffffffff8278c3d0 r butmap
+ffffffff8278c410 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS
+ffffffff8278c450 r comsoft.lsrmap
+ffffffff8278c490 r xgmi3x16_pcs_err_noncorrectable_mask_reg_aldebaran
+ffffffff8278c4b0 r tulip_mii_phy_readspecific.table
+ffffffff8278c550 r intel_hpll_vco.pnv_vco
+ffffffff8278c5b0 r dmapageport
+ffffffff8278c670 r intel_hpll_vco.ctg_vco
+ffffffff8278c730 r drm_calculate_luminance_range.pre_computed_values
+ffffffff8278d000 R sili_atascsi_methods
+ffffffff8278e000 R ncr53c9x_switch
+ffffffff8278f000 r scf_period
+ffffffff82790000 R siop_script
+ffffffff827905a0 R lun_switch
+ffffffff827905d0 R tag_switch
+ffffffff82790660 R load_dsa
+ffffffff827906c4 R siop_led_on
+ffffffff827906cc R siop_led_off
+ffffffff827906d8 R siop_switch
+ffffffff82791000 R ep_vortex_media
+ffffffff82791100 R ep_default_to_media
+ffffffff82792000 R wi_card_ident
+ffffffff82794000 R ucode_table
+ffffffff82795000 r re_revisions
+ffffffff82795290 r re_kstats_tpl
+ffffffff82797000 R smc91cxx_media
+ffffffff82797010 R smc91cxx_mii_bitbang_ops
+ffffffff82798000 R dl10019_mii_bitbang_ops
+ffffffff82798028 R dl10022_mii_bitbang_ops
+ffffffff82799000 R ax88190_mii_bitbang_ops
+ffffffff8279b000 R ac97_audio_default
+ffffffff8279b020 R ac97_on_off
+ffffffff8279b324 R ac97_mic_select
+ffffffff8279b628 R ac97_mono_select
+ffffffff8279b92c R ac97_source
+ffffffff8279bc30 R ac97_volume_stereo
+ffffffff8279bc4c R ac97_volume_mono
+ffffffff8279bc70 R source_info
+ffffffff8279c470 R ac97_ad
+ffffffff8279c580 R ac97_ak
+ffffffff8279c610 R ac97_av
+ffffffff8279c750 R ac97_rl
+ffffffff8279c7a0 R ac97_cm
+ffffffff8279c820 R ac97_cr
+ffffffff8279c840 R ac97_cs
+ffffffff8279c920 R ac97_cx
+ffffffff8279c980 R ac97_dt
+ffffffff8279c9a0 R ac97_em
+ffffffff8279c9d0 R ac97_es
+ffffffff8279c9f0 R ac97_is
+ffffffff8279ca10 R ac97_ic
+ffffffff8279ca90 R ac97_it
+ffffffff8279cac0 R ac97_ns
+ffffffff8279cb80 R ac97_ps
+ffffffff8279cbb0 R ac97_sl
+ffffffff8279cbd0 R ac97_st
+ffffffff8279cd20 R ac97_vi
+ffffffff8279cd50 R ac97_tt
+ffffffff8279cdd0 R ac97_ti
+ffffffff8279cdf0 R ac97_wb
+ffffffff8279ce10 R ac97_wo
+ffffffff8279cea0 R ac97_ym
+ffffffff8279cef0 R ac97_vendors
+ffffffff8279d1f0 R ac97enhancement
+ffffffff8279d2f0 R ac97feature
+ffffffff8279e000 R lm_chips
+ffffffff8279e020 R lm78_sensors
+ffffffff8279e1a0 R w83627hf_sensors
+ffffffff8279e3a0 R w83627ehf_sensors
+ffffffff8279e5c0 R w83627dhg_sensors
+ffffffff8279e7c0 R nct6776f_sensors
+ffffffff8279ea00 R nct6779d_sensors
+ffffffff8279ed60 R w83637hf_sensors
+ffffffff8279ef20 R w83697hf_sensors
+ffffffff8279f0c0 R w83781d_sensors
+ffffffff8279f280 R w83782d_sensors
+ffffffff8279f480 R w83783s_sensors
+ffffffff8279f600 R w83791d_sensors
+ffffffff8279f860 R w83792d_sensors
+ffffffff8279fae0 R as99127f_sensors
+ffffffff827a0000 r ar5k_known_products
+ffffffff827a0110 r ar5111_gain_opt
+ffffffff827a01e0 r ar5112_gain_opt
+ffffffff827a02b0 r ar5k_5ghz_channels
+ffffffff827a0a00 r ar5k_2ghz_channels
+ffffffff827a0f10 r ar5111_rf
+ffffffff827a1350 r ar5112a_rf
+ffffffff827a1890 r ar5112_rf
+ffffffff827a1da0 r ar5413_rf
+ffffffff827a21b0 r ar2413_rf
+ffffffff827a24d0 r ar2425_rf
+ffffffff827a2830 r ar5111_rfg
+ffffffff827a2b30 r ar5112_rfg
+ffffffff827a2e30 r ar5413_rfg
+ffffffff827a3130 r ar2413_rfg
+ffffffff827a3430 r ar5k_rt_11a
+ffffffff827a3552 r ar5k_rt_11b
+ffffffff827a3674 r ar5k_rt_11g
+ffffffff827a3796 r ar5k_rt_xr
+ffffffff827a4000 r ar5210_ini
+ffffffff827a5000 r ar5211_mode
+ffffffff827a52c0 r ar5211_ini
+ffffffff827a5ad0 r ar5211_rf
+ffffffff827a6000 r ar5212_pcie
+ffffffff827a6080 r ar5212_mode
+ffffffff827a6310 r ar5212_ini
+ffffffff827a6c80 r ar5212_ar5111_mode
+ffffffff827a6f20 r ar5212_ar5112_mode
+ffffffff827a71b0 r ar5413_mode
+ffffffff827a7b10 r ar2413_mode
+ffffffff827a8430 r ar2425_mode
+ffffffff827a8d90 r ar5111_bbgain
+ffffffff827a9090 r ar5112_bbgain
+ffffffff827aa000 r athn_5ghz_chans
+ffffffff827aa020 r athn_rates
+ffffffff827ab000 r athn_rates
+ffffffff827ac000 r ar9160_ini
+ffffffff827ac068 r ar5416_ini
+ffffffff827ac0d0 r ar5416_serdes
+ffffffff827ac0e8 r ar9160_1_1_addac
+ffffffff827ac0f8 r ar9160_1_0_addac
+ffffffff827ac108 r ar5416_2_2_addac
+ffffffff827ac118 r ar5416_2_1_addac
+ffffffff827ac128 r ar5416_set_power_calib.chainoffset
+ffffffff827ac140 r ar9160_bank6tpc_vals
+ffffffff827ac1c0 r ar5416_bank6tpc_vals
+ffffffff827ac240 r ar5416_bb_rfgain_vals_2g
+ffffffff827ac340 r ar5416_bb_rfgain_vals_5g
+ffffffff827ac440 r ar5416_bank6_vals
+ffffffff827ac4c0 r ar9160_regs
+ffffffff827ac540 r ar9160_vals_5g20
+ffffffff827ac640 r ar9160_vals_5g40
+ffffffff827ac740 r ar9160_vals_2g40
+ffffffff827ac840 r ar9160_vals_2g20
+ffffffff827ac940 r ar9160_cm_regs
+ffffffff827acc30 r ar9160_cm_vals
+ffffffff827ad210 r ar5416_regs
+ffffffff827ad290 r ar5416_vals_5g20
+ffffffff827ad390 r ar5416_vals_5g40
+ffffffff827ad490 r ar5416_vals_2g40
+ffffffff827ad590 r ar5416_vals_2g20
+ffffffff827ad690 r ar5416_cm_regs
+ffffffff827ad980 r ar5416_cm_vals
+ffffffff827adf60 r ar5416_serdes_regs
+ffffffff827adf90 r ar5416_serdes_vals
+ffffffff827adfc0 r ar9160_1_1_addac_vals
+ffffffff827ae040 r ar9160_1_0_addac_vals
+ffffffff827ae0c0 r ar5416_2_2_addac_vals
+ffffffff827ae150 r ar5416_2_1_addac_vals
+ffffffff827af000 r ar9280_2_0_ini
+ffffffff827af068 r ar9280_2_0_serdes
+ffffffff827af080 r ar9280_2_0_rx_gain_23db_backoff
+ffffffff827af0a0 r ar9280_2_0_rx_gain_13db_backoff
+ffffffff827af0c0 r ar9280_2_0_rx_gain
+ffffffff827af0e0 r ar9280_2_0_tx_gain_high_power
+ffffffff827af100 r ar9280_2_0_tx_gain
+ffffffff827af120 r ar9280_init_from_rom.chainoffset
+ffffffff827af130 r ar9280_2_0_regs
+ffffffff827af190 r ar9280_2_0_vals_5g20
+ffffffff827af250 r ar9280_2_0_vals_5g40
+ffffffff827af310 r ar9280_2_0_vals_2g40
+ffffffff827af3d0 r ar9280_2_0_vals_2g20
+ffffffff827af490 r ar9280_2_0_cm_regs
+ffffffff827af740 r ar9280_2_0_cm_vals
+ffffffff827afc90 r ar9280_2_0_fast_clock_regs
+ffffffff827afcb0 r ar9280_2_0_fast_clock_vals_5g20
+ffffffff827afcf0 r ar9280_2_0_fast_clock_vals_5g40
+ffffffff827afd30 r ar9280_2_0_serdes_regs
+ffffffff827afd60 r ar9280_2_0_serdes_vals
+ffffffff827afd90 r ar9280_2_0_rx_gain_regs
+ffffffff827afea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g
+ffffffff827b00b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g
+ffffffff827b02c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g
+ffffffff827b04d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g
+ffffffff827b06e0 r ar9280_2_0_rx_gain_vals_5g
+ffffffff827b08f0 r ar9280_2_0_rx_gain_vals_2g
+ffffffff827b0b00 r ar9280_2_0_tx_gain_regs
+ffffffff827b0b40 r ar9280_2_0_tx_gain_high_power_vals_5g
+ffffffff827b0bc0 r ar9280_2_0_tx_gain_high_power_vals_2g
+ffffffff827b0c40 r ar9280_2_0_tx_gain_vals_5g
+ffffffff827b0cc0 r ar9280_2_0_tx_gain_vals_2g
+ffffffff827b1000 r ar9271_ini
+ffffffff827b1068 r ar9285_1_2_ini
+ffffffff827b10d0 r ar9280_2_0_serdes
+ffffffff827b10e8 r ar9271_tx_gain_high_power
+ffffffff827b1108 r ar9271_tx_gain
+ffffffff827b1128 r ar9285_2_0_tx_gain_high_power
+ffffffff827b1148 r ar9285_2_0_tx_gain
+ffffffff827b1168 r ar9285_1_2_tx_gain_high_power
+ffffffff827b1188 r ar9285_1_2_tx_gain
+ffffffff827b11b0 r ar9271_regs
+ffffffff827b1410 r ar9271_vals_2g40
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+ffffffff827b1d90 r ar9271_cm_regs
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+ffffffff827b4000 r ar9287_1_1_ini
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+ffffffff827b51a0 r ar9287_1_1_tx_gain_regs
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+ffffffff827b6000 r athn_rates
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+ffffffff827b8110 r ar9380_2_2_vals_2g20
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+ffffffff827b8d50 r ar9380_2_2_fast_clock_vals_5g40
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+ffffffff827b8f90 r ar9380_2_2_rx_gain_wo_xlna_vals
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+ffffffff827ba520 r ar9380_2_2_tx_gain_vals_5g
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+ffffffff827bc000 R atw_txthresh_tab_lo
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+ffffffff827c50f0 r digits
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+ffffffff827c8010 R bwi_led_duration
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+ffffffff827c86e0 r bwi_phy_noise_scale_11g_rev7
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+ffffffff827c87d0 r bwi_phy_sigma_sq_11g_rev7
+ffffffff827c8840 r bwi_phy_delay_11g_rev1
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+ffffffff827c8a60 r _bwi_rf_lo_update_11g.rf_lo_measure_order
+ffffffff827c8aa0 r bwi_rf_set_nrssi_ofs_11g.save_phy_comm_regs
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+ffffffff827c8af0 r bwi_regwin_count
+ffffffff827c8b40 r bwi_clkfreq
+ffffffff827c8b58 r bwi_zero_addr
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+ffffffff827c90d0 R qca6390_ops
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+ffffffff827c91a0 R wcn6855_ops
+ffffffff827c9208 R wcn6750_ops
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+ffffffff827c92c8 R ath11k_hw_ring_mask_qca6390
+ffffffff827c9320 R ath11k_hw_ring_mask_qcn9074
+ffffffff827c9378 R ath11k_hw_ring_mask_wcn6750
+ffffffff827c93d0 R ath11k_target_ce_config_wlan_ipq8074
+ffffffff827c94e0 R ath11k_target_service_to_ce_map_wlan_ipq8074
+ffffffff827c95f0 R ath11k_target_service_to_ce_map_wlan_ipq6018
+ffffffff827c96e0 R ath11k_target_ce_config_wlan_qca6390
+ffffffff827c97c0 R ath11k_target_service_to_ce_map_wlan_qca6390
+ffffffff827c9880 R ath11k_target_ce_config_wlan_qcn9074
+ffffffff827c9960 R ath11k_target_service_to_ce_map_wlan_qcn9074
+ffffffff827c9a40 R qwx_host_ce_config_ipq8074
+ffffffff827c9ce0 R qwx_host_ce_config_qca6390
+ffffffff827c9e00 R qwx_host_ce_config_qcn9074
+ffffffff827c9ec0 R ipq8074_regs
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+ffffffff827ca068 R qcn9074_regs
+ffffffff827ca13c R wcn6855_regs
+ffffffff827ca210 R wcn6750_regs
+ffffffff827ca2f0 R qmi_response_type_v01_ei
+ffffffff827ca350 R qmi_wlanfw_ind_register_req_msg_v01_ei
+ffffffff827ca670 R qmi_wlanfw_ind_register_resp_msg_v01_ei
+ffffffff827ca6f0 R qmi_wlanfw_host_cap_req_msg_v01_ei
+ffffffff827caa70 R qmi_wlanfw_host_cap_resp_msg_v01_ei
+ffffffff827caab0 R qmi_wlanfw_mem_cfg_s_v01_ei
+ffffffff827cab30 R qmi_wlanfw_mem_seg_s_v01_ei
+ffffffff827cabd0 R qmi_wlanfw_request_mem_ind_msg_v01_ei
+ffffffff827cac30 R qmi_wlanfw_mem_seg_resp_s_v01_ei
+ffffffff827cacd0 R qmi_wlanfw_respond_mem_req_msg_v01_ei
+ffffffff827cad30 R qmi_wlanfw_respond_mem_resp_msg_v01_ei
+ffffffff827cad70 R qmi_wlanfw_cap_req_msg_v01_ei
+ffffffff827cad90 R qmi_wlanfw_rf_chip_info_s_v01_ei
+ffffffff827cadf0 R qmi_wlanfw_rf_board_info_s_v01_ei
+ffffffff827cae30 R qmi_wlanfw_soc_info_s_v01_ei
+ffffffff827cae70 R qmi_wlanfw_fw_version_info_s_v01_ei
+ffffffff827caed0 R qmi_wlanfw_cap_resp_msg_v01_ei
+ffffffff827cb190 R qmi_wlanfw_bdf_download_req_msg_v01_ei
+ffffffff827cb370 R qmi_wlanfw_bdf_download_resp_msg_v01_ei
+ffffffff827cb3b0 R qmi_wlanfw_m3_info_req_msg_v01_ei
+ffffffff827cb410 R qmi_wlanfw_m3_info_resp_msg_v01_ei
+ffffffff827cb450 R qmi_wlanfw_wlan_ini_req_msg_v01_ei
+ffffffff827cb4b0 R qmi_wlanfw_wlan_ini_resp_msg_v01_ei
+ffffffff827cb4f0 R qmi_wlanfw_ce_tgt_pipe_cfg_s_v01_ei
+ffffffff827cb5b0 R qmi_wlanfw_ce_svc_pipe_cfg_s_v01_ei
+ffffffff827cb630 R qmi_wlanfw_shadow_reg_cfg_s_v01_ei
+ffffffff827cb690 R qmi_wlanfw_shadow_reg_v2_cfg_s_v01_ei
+ffffffff827cb6d0 R qmi_wlanfw_wlan_mode_req_msg_v01_ei
+ffffffff827cb750 R qmi_wlanfw_wlan_mode_resp_msg_v01_ei
+ffffffff827cb790 R qmi_wlanfw_wlan_cfg_req_msg_v01_ei
+ffffffff827cb970 R qmi_wlanfw_wlan_cfg_resp_msg_v01_ei
+ffffffff827cb9b0 r wmi_tlv_policies
+ffffffff827cd710 r qwx_hw_mode_pri_map
+ffffffff827cd740 r ath11k_hw_params
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+ffffffff827cdf98 r ath11k_hw_hal_params_wcn6750
+ffffffff827cdfa8 r ath11k_hw_tcl2wbm_rbm_map_ipq8074
+ffffffff827cdfb1 r ath11k_hw_tcl2wbm_rbm_map_wcn6750
+ffffffff827cf000 R uhci_bus_methods
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+ffffffff827cf090 R uhci_device_ctrl_methods
+ffffffff827cf0c0 R uhci_device_intr_methods
+ffffffff827cf0f0 R uhci_device_bulk_methods
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+ffffffff827d00b0 R ohci_device_ctrl_methods
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+ffffffff827d1090 R ehci_device_ctrl_methods
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+ffffffff827d1150 R ehci_devd
+ffffffff827d1162 R ehci_odevd
+ffffffff827d116c R ehci_confd
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+ffffffff827d117e R ehci_endpd
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+ffffffff827d2060 R xhci_root_intr_methods
+ffffffff827d2090 R xhci_device_ctrl_methods
+ffffffff827d20c0 R xhci_device_intr_methods
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+ffffffff827d2150 R xhci_devd
+ffffffff827d2162 R xhci_confd
+ffffffff827d216b R xhci_ifcd
+ffffffff827d2174 R xhci_endpd
+ffffffff827d217b R xhci_endpcd
+ffffffff827d2181 R xhci_hubd
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+ffffffff827d6000 R ipmi_ca
+ffffffff827d7000 R vscsi_ca
+ffffffff827d7028 R vscsi_switch
+ffffffff827d7050 R vscsi_filtops
+ffffffff827d8000 R mpath_ca
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+ffffffff827d9000 R softraid_ca
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+ffffffff827db020 R kstat_mutex_ops
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+ffffffff827db058 R kstat_id_tree_RBT_TYPE
+ffffffff827db060 r kstat_pv_tree_RBT_INFO
+ffffffff827db078 R kstat_pv_tree_RBT_TYPE
+ffffffff827db080 r kstat_nm_tree_RBT_INFO
+ffffffff827db098 R kstat_nm_tree_RBT_TYPE
+ffffffff827dc000 r fuse_rd_filtops
+ffffffff827dd000 R fusefs_vfsops
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+ffffffff827de000 R fusefs_vops
+ffffffff827de110 R fusefsread_filtops
+ffffffff827de140 R fusefswrite_filtops
+ffffffff827de170 R fusefsvnode_filtops
+ffffffff827df000 r pf_state_tree_RBT_INFO
+ffffffff827df018 R pf_state_tree_RBT_TYPE
+ffffffff827df020 r pf_state_tree_id_RBT_INFO
+ffffffff827df038 R pf_state_tree_id_RBT_TYPE
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+ffffffff827e0000 R hfsc_ops
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+ffffffff827e1088 R pfq_fqcodel_ops
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+ffffffff827e2030 r pfsync_bulk_req_event_names
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+ffffffff827e22e0 r pfsync_acts
+ffffffff827e3000 r bio_mappings_RBT_INFO
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+ffffffff827e4000 R hotplugread_filtops
+ffffffff827e5000 R dtps_static
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+ffffffff827e7000 R ddb_vars
+ffffffff827e8000 R audio_ca
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+ffffffff827e8058 R audiowrite_filtops
+ffffffff827e8088 R audioread_filtops
+ffffffff827e9000 R midi_ca
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+ffffffff827e9058 R midiread_filtops
+ffffffff827ea000 r mulawtolin16
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+ffffffff827ed000 R cd9660_vfsops
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+ffffffff827ee330 R cd9660read_filtops
+ffffffff827ee360 R cd9660write_filtops
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+ffffffff827ef000 R udf_vfsops
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+ffffffff827f2000 R execsw
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+ffffffff827f4000 R copyright
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+ffffffff827f8098 R file_filtops
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+ffffffff827f8100 R sysfilt_ops
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+ffffffff827fd000 R pledge_syscalls
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-ffffffff829d22c0 R ixl_vsi_counters
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-ffffffff829d9000 R epic_pci_ca
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-ffffffff829e7000 R skc_devices
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-ffffffff829e80a8 R mskc_ca
-ffffffff829e80d0 R msk_ca
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-ffffffff829ea000 R puc_devs
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-ffffffff829f0000 R lpt_puc_ca
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-ffffffff829f1030 r wi_pci_products
-ffffffff829f2000 R an_pci_ca
-ffffffff829f2030 R an_pci_devices
-ffffffff829f3000 R iwi_devices
-ffffffff829f3010 R iwi_ca
-ffffffff829f4000 R wpi_ca
-ffffffff829f4028 r wpi_devices
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-ffffffff829f5020 R iwn_ca
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-ffffffff829f5160 r iwn5150_sensitivity_limits
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-ffffffff829f51d8 r iwn6000_sensitivity_limits
-ffffffff829f5214 r iwn2000_sensitivity_limits
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-ffffffff829f5360 r iwn4965_rf_gain_5ghz
-ffffffff829f53d0 r iwn4965_dsp_gain_5ghz
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-ffffffff829f56f0 r iwn4965_post_alive.qid2fifo
-ffffffff829f5700 r iwn_bands
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-ffffffff829f5820 r iwn4965_rf_gain_2ghz
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-ffffffff829f6030 R iwm_nvm_channels_8000
-ffffffff829f6070 R iwm_rates
-ffffffff829f60d0 R iwm_ht_mcs2ridx
-ffffffff829f6110 R iwm_tid_to_ac
-ffffffff829f6118 R iwm_ac_to_tx_fifo
-ffffffff829f6120 R iwm_nvm_to_read
-ffffffff829f6144 r iwm_set_hw_address_8000.reserved_mac
-ffffffff829f6180 r iwm_sf_full_timeout
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-ffffffff829f6320 r iwm_devices
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-ffffffff829f7020 R iwx_9560_qu_c0_jf_b0_cfg
-ffffffff829f7040 R iwx_qu_b0_hr1_b0
-ffffffff829f7060 R iwx_qu_b0_hr_b0
-ffffffff829f7080 R iwx_ax201_cfg_qu_hr
-ffffffff829f70a0 R iwx_qu_c0_hr1_b0
-ffffffff829f70c0 R iwx_qu_c0_hr_b0
-ffffffff829f70e0 R iwx_ax201_cfg_qu_c0_hr_b0
-ffffffff829f7100 R iwx_quz_a0_hr1_b0
-ffffffff829f7120 R iwx_ax201_cfg_quz_hr
-ffffffff829f7140 R iwx_cfg_so_a0_hr_b0
-ffffffff829f7160 R iwx_cfg_quz_a0_hr_b0
-ffffffff829f7180 R iwx_2ax_cfg_so_gf_a0
-ffffffff829f71a0 R iwx_2ax_cfg_so_gf_a0_long
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-ffffffff829f71e0 R iwx_2ax_cfg_so_gf4_a0_long
-ffffffff829f7200 R iwx_2ax_cfg_ty_gf_a0
-ffffffff829f7220 R iwx_2ax_cfg_so_jf_b0
-ffffffff829f7240 R iwx_nvm_channels_8000
-ffffffff829f7280 R iwx_rates
-ffffffff829f72e0 R iwx_mcs2ridx
-ffffffff829f7320 R iwx_tid_to_ac
-ffffffff829f7328 R iwx_ac_to_tx_fifo
-ffffffff829f7330 r iwx_nvm_channels_uhb
-ffffffff829f739e r iwx_is_valid_mac_addr.reserved_mac
-ffffffff829f73b0 r iwx_sf_full_timeout
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-ffffffff829f7590 r iwx_dev_info_table
-ffffffff829f7e18 R iwx_ca
-ffffffff829f8000 R qwx_pci_ca
-ffffffff829f8028 r qwx_pci_devices
-ffffffff829f8030 R qwx_msi_config_one_msi
-ffffffff829f8050 R qwx_msi_config
-ffffffff829f80c8 r qwx_pci_ops_qca6390
-ffffffff829f80f8 r qwx_pci_ops_qcn9074
-ffffffff829f9000 R cmpci_ca
-ffffffff829f9028 R cmpci_hw_if
-ffffffff829f90e0 r cmpci_rate_table
-ffffffff829f9120 R cmpci_devices
-ffffffff829f9130 r cmpci_query_devinfo.mixer_port_names
-ffffffff829f9160 r cmpci_query_devinfo.mixer_classes
-ffffffff829fa000 R iha_pci_ca
-ffffffff829fa028 R iha_switch
-ffffffff829fb000 R pcscp_ca
-ffffffff829fc000 R bge_ca
-ffffffff829fc030 R bge_devices
-ffffffff829fc1b0 r bge_revisions
-ffffffff829fc610 r bge_majorrevs
-ffffffff829fc790 r bge_kstat_tpl
-ffffffff829fd000 R bnx_devices
-ffffffff829fd020 R bnx_ca
-ffffffff829fe000 R vge_ca
-ffffffff829fe028 R vge_devices
-ffffffff829ff000 R stge_ca
-ffffffff829ff028 R stge_mii_bitbang_ops
-ffffffff829ff050 R stge_devices
-ffffffff82a00000 R nfe_ca
-ffffffff82a00030 R nfe_devices
-ffffffff82a01000 R et_devices
-ffffffff82a01008 R et_ca
-ffffffff82a02000 R jme_devices
-ffffffff82a02008 R jme_ca
-ffffffff82a03000 R age_devices
-ffffffff82a03008 R age_ca
-ffffffff82a04000 R alc_devices
-ffffffff82a04038 R alc_ca
-ffffffff82a05000 R ale_devices
-ffffffff82a05008 R ale_ca
-ffffffff82a06000 R amdpm_ca
-ffffffff82a06030 R amdpm_ids
-ffffffff82a07000 R bce_ca
-ffffffff82a07028 R bce_devices
-ffffffff82a08000 R ath_pci_ca
-ffffffff82a09000 R athn_pci_ca
-ffffffff82a09030 r athn_pci_devices
-ffffffff82a0a000 R atw_pci_ca
-ffffffff82a0a028 R atw_pci_devices
-ffffffff82a0b000 R rtw_pci_ca
-ffffffff82a0b030 R rtw_pci_products
-ffffffff82a0c000 R rtwn_pci_ca
-ffffffff82a0c030 r rtwn_pci_devices
-ffffffff82a0c040 r rtl8188eu_mac
-ffffffff82a0c1b0 r rtl8192cu_mac
-ffffffff82a0c310 r rtl8192ce_mac
-ffffffff82a0c458 r rtl8188eu_bb_prog
-ffffffff82a0c480 r rtl8723a_bb_prog
-ffffffff82a0c4a8 r rtl8192ce_bb_prog_1t
-ffffffff82a0c4d0 r rtl8192ce_bb_prog_2t
-ffffffff82a0c500 r rtl8188eu_bb_regs
-ffffffff82a0c680 r rtl8188eu_bb_vals
-ffffffff82a0c980 r rtl8188eu_agc_vals
-ffffffff82a0cb80 r rtl8723a_bb_regs
-ffffffff82a0cd00 r rtl8723a_bb_vals
-ffffffff82a0cff0 r rtl8192ce_agc_vals
-ffffffff82a0d270 r rtl8192ce_bb_regs
-ffffffff82a0d3f0 r rtl8192ce_bb_vals_1t
-ffffffff82a0d6e0 r rtl8192ce_bb_vals_2t
-ffffffff82a0e000 R ral_pci_ca
-ffffffff82a0e030 R ral_pci_devices
-ffffffff82a0f000 R acx_pci_ca
-ffffffff82a0f028 R acx_pci_devices
-ffffffff82a10000 R pgt_pci_ca
-ffffffff82a10028 R pgt_pci_devices
-ffffffff82a11000 R malo_pci_ca
-ffffffff82a11028 R malo_pci_devices
-ffffffff82a12000 R bwi_pci_ca
-ffffffff82a12030 R bwi_pci_devices
-ffffffff82a13000 R piixpm_ca
-ffffffff82a13030 R piixpm_ids
-ffffffff82a14000 R vic_ca
-ffffffff82a14028 R vic_devices
-ffffffff82a15000 R vmx_devices
-ffffffff82a15008 R vmx_ca
-ffffffff82a15030 r vmx_tx_kstat_tpl
-ffffffff82a150d0 r vmx_kstat_rate
-ffffffff82a150e0 r vmx_rx_kstat_tpl
-ffffffff82a16000 R vmwpvs_ca
-ffffffff82a16028 R vmwpvs_switch
-ffffffff82a17000 R lii_ca
-ffffffff82a17028 R lii_devices
-ffffffff82a18000 R ichiic_ca
-ffffffff82a18030 R ichiic_ids
-ffffffff82a19000 R viapm_ca
-ffffffff82a19030 R viapm_ids
-ffffffff82a19070 r val_to_temp
-ffffffff82a19870 r val_to_uV.mult
-ffffffff82a1a000 R amdiic_ca
-ffffffff82a1a028 R amdiic_ids
-ffffffff82a1b000 R nviic_ca
-ffffffff82a1b030 R nviic_ids
-ffffffff82a1c000 R sdhc_pci_ca
-ffffffff82a1d000 R kate_ca
-ffffffff82a1d030 r kate_proc
-ffffffff82a1e000 R km_ca
-ffffffff82a1e030 r km_devices
-ffffffff82a1f000 R ksmn_ca
-ffffffff82a1f030 r ksmn_devices
-ffffffff82a20000 R iosf_pci_ca
-ffffffff82a21000 R itherm_devices
-ffffffff82a21008 R itherm_ca
-ffffffff82a22000 R pchtemp_ca
-ffffffff82a22030 R pchtemp_devices
-ffffffff82a23000 R rtsx_pci_ca
-ffffffff82a24000 R xspd_ca
-ffffffff82a24028 R xspd_devices
-ffffffff82a25000 R virtio_pci_ca
-ffffffff82a26000 R dwiic_pci_ca
-ffffffff82a26030 R dwiic_pci_ids
-ffffffff82a27000 R bwfm_pci_ca
-ffffffff82a27030 r bwfm_pci_devices
-ffffffff82a28000 R ccp_pci_ca
-ffffffff82a28030 r ccp_pci_devices
-ffffffff82a29000 R bnxt_devices
-ffffffff82a29040 R bnxt_ca
-ffffffff82a2a000 R mcx_ca
-ffffffff82a2a030 r mcx_devices
-ffffffff82a2a060 r mcx_rss_config
-ffffffff82a2a0d0 r mcx_eth_cap_map
-ffffffff82a2a2d0 r mcx_kstat_ppcnt_ieee8023
-ffffffff82a2a2e8 r mcx_kstat_ppcnt_rfc2863
-ffffffff82a2a300 r mcx_kstat_ppcnt_rfc2819
-ffffffff82a2a318 r mcx_kstat_ppcnt_rfc3635
-ffffffff82a2a330 r mcx_ppcnt_ieee8023_tpl
-ffffffff82a2a4b0 r mcx_ppcnt_rfc2863_tpl
-ffffffff82a2a5c0 r mcx_ppcnt_rfc2819_tpl
-ffffffff82a2a770 r mcx_ppcnt_rfc3635_tpl
-ffffffff82a2a8b0 r mcx_kstat_mtmp_tpl
-ffffffff82a2a950 r mcx_kstat_mtmp_rate
-ffffffff82a2a960 r mcx_queue_kstat_tpl
-ffffffff82a2b000 R iavf_ca
-ffffffff82a2b030 r iavf_devices
-ffffffff82a2b040 r iavf_aq_regs
-ffffffff82a2b0b0 r iavf_link_speeds
-ffffffff82a2c000 R rge_ca
-ffffffff82a2c028 R rge_devices
-ffffffff82a2c030 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value
-ffffffff82a2c050 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value
-ffffffff82a2c0b0 r rtl8125_mac_cfg3_mcu
-ffffffff82a2c950 r rtl8125_mac_cfg5_mcu
-ffffffff82a2d970 r rtl8125_mac_bps
-ffffffff82a2dd70 r rtl8125b_mac_bps
-ffffffff82a2df98 r rge_kstats_tpl
-ffffffff82a2f000 R igc_devices
-ffffffff82a2f040 R igc_ca
-ffffffff82a30000 R ngbe_devices
-ffffffff82a30008 R ngbe_ca
-ffffffff82a31000 R com_pci_ca
-ffffffff82a31030 R com_pci_ids
-ffffffff82a32000 r agp_attach.agp_max
-ffffffff82a32048 R agp_ca
-ffffffff82a33000 R intagp_ca
-ffffffff82a34000 r drm_plane_create_rotation_property.props
-ffffffff82a35000 r drm_bridge_priv_state_funcs
-ffffffff82a37000 r color_encoding_name
-ffffffff82a37020 r color_range_name
-ffffffff82a38000 r drm_subpixel_enum_list
-ffffffff82a38060 r drm_dpms_enum_list
-ffffffff82a380a0 r drm_dvi_i_select_enum_list
-ffffffff82a380d0 r drm_dvi_i_subconnector_enum_list
-ffffffff82a38100 r drm_tv_mode_enum_list
-ffffffff82a38170 r drm_tv_select_enum_list
-ffffffff82a381c0 r drm_tv_subconnector_enum_list
-ffffffff82a38210 r drm_dp_subconnector_enum_list
-ffffffff82a38280 r colorspace_names
-ffffffff82a38300 r drm_link_status_enum_list
-ffffffff82a38320 r drm_scaling_mode_enum_list
-ffffffff82a38360 r drm_aspect_ratio_enum_list
-ffffffff82a38390 r drm_content_type_enum_list
-ffffffff82a383e0 r drm_panel_orientation_enum_list
-ffffffff82a38420 r privacy_screen_enum
-ffffffff82a39000 r drm_crtc_fence_ops
-ffffffff82a3a000 r drm_dmt_modes
-ffffffff82a3c940 r edid_cea_modes_1
-ffffffff82a404d0 r edid_cea_modes_193
-ffffffff82a41180 r edid_quirk_list
-ffffffff82a41360 r drm_mode_do_interlace_quirk.cea_interlaced
-ffffffff82a413a0 r edid_4k_modes
-ffffffff82a41600 r edid_est_modes
-ffffffff82a41e00 r est3_modes
-ffffffff82a41f60 r stereo_mandatory_modes
-ffffffff82a41fe0 r extra_modes
-ffffffff82a43000 r drm_encoder_enum_list
-ffffffff82a45000 r drm_fbdev_dma_helper_funcs
-ffffffff82a45010 r drm_fbdev_dma_client_funcs
-ffffffff82a45030 r drm_fbdev_dma_fb_ops
-ffffffff82a46000 r drm_fbdev_generic_helper_funcs
-ffffffff82a46010 r drm_fbdev_generic_client_funcs
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-ffffffff82a48000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize
-ffffffff82a48004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize
-ffffffff82a48008 r drm_fb_xrgb8888_to_xrgb1555.dst_pixsize
-ffffffff82a4800c r drm_fb_xrgb8888_to_argb1555.dst_pixsize
-ffffffff82a48010 r drm_fb_xrgb8888_to_rgba5551.dst_pixsize
-ffffffff82a48014 r drm_fb_xrgb8888_to_rgb888.dst_pixsize
-ffffffff82a48018 r drm_fb_xrgb8888_to_argb8888.dst_pixsize
-ffffffff82a4801c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize
-ffffffff82a48020 r drm_fb_xrgb8888_to_argb2101010.dst_pixsize
-ffffffff82a48024 r drm_fb_xrgb8888_to_gray8.dst_pixsize
-ffffffff82a48028 r drm_fb_xrgb8888_to_xbgr8888.dst_pixsize
-ffffffff82a4802c r drm_fb_xrgb8888_to_abgr8888.dst_pixsize
-ffffffff82a49000 r __drm_format_info.formats
-ffffffff82a4a000 R drm_pgops
-ffffffff82a4b000 r drm_gem_dma_default_funcs
-ffffffff82a4c000 R drm_gem_fb_funcs
-ffffffff82a4d000 r drm_ioctls
-ffffffff82a4f000 r dma_fence_stub_ops
-ffffffff82a4f040 R dma_fence_array_ops
-ffffffff82a4f080 R dma_fence_chain_ops
-ffffffff82a4f0c0 R dmabufops
-ffffffff82a4f0f8 R syncfileops
-ffffffff82a50000 r drm_plane_type_enum_list
-ffffffff82a51000 r tv_modes_parameters
-ffffffff82a510c0 r drm_mode_status_names
-ffffffff82a51200 r drm_named_modes
-ffffffff82a52000 r primary_plane_funcs
-ffffffff82a52068 r safe_modeset_formats
-ffffffff82a53000 r orientation_data
-ffffffff82a56718 r lcd800x1280_rightside_up
-ffffffff82a56730 r lcd720x1280_rightside_up
-ffffffff82a56748 r lcd800x1280_leftside_up
-ffffffff82a56760 r lcd1080x1920_leftside_up
-ffffffff82a56778 r lcd1200x1920_rightside_up
-ffffffff82a56790 r gpd_micropc
-ffffffff82a567a8 r gpd_pocket
-ffffffff82a567c0 r gpd_pocket2
-ffffffff82a567d8 r gpd_win
-ffffffff82a567f0 r gpd_win2
-ffffffff82a56808 r itworks_tw891
-ffffffff82a56820 r lcd1600x2560_rightside_up
-ffffffff82a56838 r onegx1_pro
-ffffffff82a56850 r lcd1600x2560_leftside_up
-ffffffff82a56868 r lcd1280x1920_rightside_up
-ffffffff82a56880 r gpd_onemix2s
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-ffffffff82a568d0 r .compoundliteral.9
-ffffffff82a568f0 r .compoundliteral.17
-ffffffff82a56930 r .compoundliteral.21
-ffffffff82a56950 r .compoundliteral.23
-ffffffff82a56960 r .compoundliteral.25
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-ffffffff82a57000 r drm_gem_prime_dmabuf_ops
-ffffffff82a59000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id
-ffffffff82a5a000 r drm_dp_phy_name.phy_names
-ffffffff82a5a048 r drm_dp_i2c_algo
-ffffffff82a5a058 r drm_dp_i2c_lock_ops
-ffffffff82a5a070 r dp_aux_bl_ops
-ffffffff82a5a090 r dpcd_quirk_list
-ffffffff82a5a320 r drm_dp_psr_setup_time.psr_setup_time_us
-ffffffff82a5b000 R drm_dp_mst_topology_state_funcs
-ffffffff82a5b020 r drm_dp_mst_req_type_str.req_type_str
-ffffffff82a5b1f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str
-ffffffff82a5b220 r drm_dp_mst_nak_reason_str.nak_reason_str
-ffffffff82a5b278 r drm_dp_mst_i2c_algo
-ffffffff82a5c000 r rc_parameters_1_2_444
-ffffffff82a5c5f0 r rc_parameters_pre_scr
-ffffffff82a5c920 r rc_parameters_1_2_422
-ffffffff82a5cdf0 r rc_parameters_1_2_420
-ffffffff82a5e000 r hdmi_colorimetry_val
-ffffffff82a5f018 R ttm_bo_vm_ops
-ffffffff82a60000 r ttm_range_manager_func
-ffffffff82a61018 r ttm_kmap_iter_io_ops
-ffffffff82a61030 r ttm_kmap_iter_linear_io_ops
-ffffffff82a62000 r ttm_sys_manager_func
-ffffffff82a63000 r ttm_kmap_iter_tt_ops
-ffffffff82a64000 r drm_sched_fence_ops_scheduled
-ffffffff82a64040 r drm_sched_fence_ops_finished
-ffffffff82a65000 R ch7017_ops
-ffffffff82a66000 R ch7xxx_ops
-ffffffff82a66060 r ch7xxx_ids
-ffffffff82a67000 R ivch_ops
-ffffffff82a67060 r backup_addresses
-ffffffff82a68000 R ns2501_ops
-ffffffff82a68060 r mode_agnostic_values
-ffffffff82a680e0 r ns2501_modes
-ffffffff82a69000 R sil164_ops
-ffffffff82a6a000 R tfp410_ops
-ffffffff82a6b000 r chv_dpll
-ffffffff82a6b050 r vlv_dpll
-ffffffff82a6b0a0 r g4x_dpll
-ffffffff82a6b0f0 r pch_dpll
-ffffffff82a6b138 r intel_dp_enc_funcs
-ffffffff82a6c000 r intel_hdmi_enc_funcs
-ffffffff82a6d000 r vlv_primary_formats
-ffffffff82a6d030 r ivb_primary_formats
-ffffffff82a6d050 r i965_primary_formats
-ffffffff82a6d070 r i8xx_primary_formats
-ffffffff82a6d080 r i965_plane_funcs
-ffffffff82a6d0e8 r i8xx_plane_funcs
-ffffffff82a6e000 r ilk_wm_funcs
-ffffffff82a6e040 r vlv_wm_funcs
-ffffffff82a6e080 r g4x_wm_funcs
-ffffffff82a6e0c0 r nop_funcs
-ffffffff82a6e100 r pnv_wm_funcs
-ffffffff82a6e140 r i965_wm_funcs
-ffffffff82a6e180 r i9xx_wm_funcs
-ffffffff82a6e1c0 r i845_wm_funcs
-ffffffff82a6e200 r cxsr_latency_table
-ffffffff82a6f000 r gen11_dsi_encoder_funcs
-ffffffff82a6f020 r gen11_dsi_connector_funcs
-ffffffff82a6f098 r gen11_dsi_connector_helper_funcs
-ffffffff82a6f0f8 r gen11_dsi_host_ops
-ffffffff82a70000 r intel_plane_helper_funcs
-ffffffff82a71000 r g4x_audio_funcs
-ffffffff82a71018 r ibx_audio_funcs
-ffffffff82a71030 r hsw_audio_funcs
-ffffffff82a71050 r hdmi_audio_clock
-ffffffff82a710c0 r dp_aud_n_m
-ffffffff82a71270 r hdmi_aud_ncts_36bpp
-ffffffff82a71350 r hdmi_aud_ncts_30bpp
-ffffffff82a71430 r hdmi_aud_ncts_24bpp
-ffffffff82a72000 r intel_backlight_device_ops
-ffffffff82a72018 r bxt_pwm_funcs
-ffffffff82a72048 r cnp_pwm_funcs
-ffffffff82a72078 r lpt_pwm_funcs
-ffffffff82a720a8 r spt_pwm_funcs
-ffffffff82a720d8 r pch_pwm_funcs
-ffffffff82a72108 r ext_pwm_funcs
-ffffffff82a72138 r vlv_pwm_funcs
-ffffffff82a72168 r i965_pwm_funcs
-ffffffff82a72198 r i9xx_pwm_funcs
-ffffffff82a721c8 r pwm_bl_funcs
-ffffffff82a73000 r bdb_blocks
-ffffffff82a73160 r adlp_aux_ch_map
-ffffffff82a73169 r adls_aux_ch_map
-ffffffff82a73170 r rkl_aux_ch_map
-ffffffff82a73175 r direct_aux_ch_map
-ffffffff82a7317e r translate_iboost.mapping
-ffffffff82a73181 r adlp_ddc_pin_map
-ffffffff82a7318e r adls_ddc_pin_map
-ffffffff82a7319b r rkl_pch_tgp_ddc_pin_map
-ffffffff82a731a6 r gen9bc_tgp_ddc_pin_map
-ffffffff82a731b1 r icp_ddc_pin_map
-ffffffff82a731c0 r cnp_ddc_pin_map
-ffffffff82a74000 r mtl_sa_info
-ffffffff82a74006 r adlp_sa_info
-ffffffff82a7400c r adls_sa_info
-ffffffff82a74012 r rkl_sa_info
-ffffffff82a74018 r tgl_sa_info
-ffffffff82a74020 r intel_bw_funcs
-ffffffff82a75000 r intel_cdclk_funcs
-ffffffff82a75010 r mtl_cdclk_funcs
-ffffffff82a75030 r mtl_cdclk_table
-ffffffff82a75088 r tgl_cdclk_funcs
-ffffffff82a750b0 r dg2_cdclk_table
-ffffffff82a75160 r adlp_a_step_cdclk_table
-ffffffff82a751e0 r rplu_cdclk_table
-ffffffff82a752c8 r rplu_cdclk_funcs
-ffffffff82a752f0 r adlp_cdclk_table
-ffffffff82a753b0 r rkl_cdclk_table
-ffffffff82a754a0 r icl_cdclk_table
-ffffffff82a75588 r ehl_cdclk_funcs
-ffffffff82a755a8 r icl_cdclk_funcs
-ffffffff82a755c8 r bxt_cdclk_funcs
-ffffffff82a755f0 r glk_cdclk_table
-ffffffff82a75620 r bxt_cdclk_table
-ffffffff82a75668 r skl_cdclk_funcs
-ffffffff82a75688 r bdw_cdclk_funcs
-ffffffff82a756a8 r hsw_cdclk_funcs
-ffffffff82a756c8 r chv_cdclk_funcs
-ffffffff82a756e8 r vlv_cdclk_funcs
-ffffffff82a75708 r fixed_400mhz_cdclk_funcs
-ffffffff82a75728 r ilk_cdclk_funcs
-ffffffff82a75748 r gm45_cdclk_funcs
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-ffffffff82c110d8 r vega20_ih_self_irq_funcs
+ffffffff82bb1000 R gfxhub_v3_0_funcs
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+ffffffff82bb2060 r gfxhub_v3_0_3_vmhub_funcs
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+ffffffff82bb30a0 R gmc_v10_0_ip_block
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+ffffffff82bb3120 r gmc_v10_0_ecc_funcs
+ffffffff82bb4000 R gmc_v11_0_ip_funcs
+ffffffff82bb40a0 R gmc_v11_0_ip_block
+ffffffff82bb40b8 r gmc_v11_0_gmc_funcs
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+ffffffff82bb4120 r gmc_v11_0_ecc_funcs
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+ffffffff82bb50b8 R gmc_v7_4_ip_block
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+ffffffff82bb5128 r gmc_v7_0_irq_funcs
+ffffffff82bb5138 r iceland_mgcg_cgcg_init
+ffffffff82bb5150 r golden_settings_iceland_a11
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+ffffffff82bb60a0 R gmc_v8_0_ip_block
+ffffffff82bb60b8 R gmc_v8_1_ip_block
+ffffffff82bb60d0 R gmc_v8_5_ip_block
+ffffffff82bb60e8 r gmc_v8_0_gmc_funcs
+ffffffff82bb6140 r gmc_v8_0_irq_funcs
+ffffffff82bb6150 r fiji_mgcg_cgcg_init
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+ffffffff82bb6190 r tonga_mgcg_cgcg_init
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+ffffffff82bb6200 r golden_settings_polaris11_a11
+ffffffff82bb6230 r golden_settings_polaris10_a11
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+ffffffff82bb6280 r stoney_mgcg_cgcg_init
+ffffffff82bb62a0 r golden_settings_stoney_common
+ffffffff82bb7000 R gmc_v9_0_ip_funcs
+ffffffff82bb70a0 R gmc_v9_0_ip_block
+ffffffff82bb70b8 r gmc_v9_0_gmc_funcs
+ffffffff82bb7110 r gmc_v9_0_irq_funcs
+ffffffff82bb7120 r gmc_v9_0_ecc_funcs
+ffffffff82bb7130 r gfxhub_client_ids
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+ffffffff82bb7490 r mmhub_client_ids_vega12
+ffffffff82bb7790 r mmhub_client_ids_vega20
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+ffffffff82bbaf50 r golden_settings_mmhub_1_0_0
+ffffffff82bbaf80 r golden_settings_athub_1_0_0
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+ffffffff82bbd000 R hdp_v5_2_funcs
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+ffffffff82bbf0a0 R iceland_ih_ip_block
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+ffffffff82bc0000 r ih_v6_0_ip_funcs
+ffffffff82bc00a0 R ih_v6_0_ip_block
+ffffffff82bc00b8 r ih_v6_0_funcs
+ffffffff82bc00d8 r ih_v6_0_self_irq_funcs
+ffffffff82bc1000 r ih_v6_1_ip_funcs
+ffffffff82bc10a0 R ih_v6_1_ip_block
+ffffffff82bc10b8 r ih_v6_1_funcs
+ffffffff82bc10d8 r ih_v6_1_self_irq_funcs
+ffffffff82bc2000 R gfx_v11_0_imu_funcs
+ffffffff82bc2030 r imu_rlc_ram_golden_11
+ffffffff82bc2680 r imu_rlc_ram_golden_11_0_2
+ffffffff82bc3000 r imu_rlc_ram_golden_11_0_3
+ffffffff82bc4000 r jpeg_v1_0_decode_ring_vm_funcs
+ffffffff82bc4140 r jpeg_v1_0_irq_funcs
+ffffffff82bc5000 r jpeg_v2_0_ip_funcs
+ffffffff82bc50a0 R jpeg_v2_0_ip_block
+ffffffff82bc50b8 r jpeg_v2_0_dec_ring_vm_funcs
+ffffffff82bc51f8 r jpeg_v2_0_irq_funcs
+ffffffff82bc6000 r jpeg_v2_5_ip_funcs
+ffffffff82bc60a0 R jpeg_v2_5_ip_block
+ffffffff82bc60b8 r jpeg_v2_6_ip_funcs
+ffffffff82bc6158 R jpeg_v2_6_ip_block
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+ffffffff82bc62f0 r jpeg_v2_6_dec_ring_vm_funcs
+ffffffff82bc6430 r jpeg_v2_5_irq_funcs
+ffffffff82bc6440 r jpeg_v2_6_ras_irq_funcs
+ffffffff82bc7000 r jpeg_v3_0_ip_funcs
+ffffffff82bc70a0 R jpeg_v3_0_ip_block
+ffffffff82bc70b8 r jpeg_v3_0_dec_ring_vm_funcs
+ffffffff82bc71f8 r jpeg_v3_0_irq_funcs
+ffffffff82bc8000 r jpeg_v4_0_ip_funcs
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+ffffffff82bc80f8 r jpeg_v4_0_dec_ring_vm_funcs
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 ffffffff82c12000 r GC_BASE
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-ffffffff82c123f0 r UVD_BASE
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-ffffffff82c136a0 r stoney_mgcg_cgcg_init
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 ffffffff82c2c000 r clk_mgr_regs
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 ffffffff82c30000 r lpddr5_wm_table
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+ffffffff82ce7a30 r plane_cap
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+ffffffff82ce80c0 r link_enc_aux_regs
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+ffffffff82cf2030 r hpo_dp_le_shift
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+ffffffff82cf3000 r dccg314_funcs
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+ffffffff82cf6008 r res_cap_dcn314
+ffffffff82cf6048 r debug_defaults_diags
+ffffffff82cf61f0 r clk_src_regs
+ffffffff82cf6394 r dccg_regs
+ffffffff82cf6484 r dccg_shift
+ffffffff82cf6524 r dccg_mask
+ffffffff82cf67a0 r abm_regs
+ffffffff82cf6940 r abm_shift
+ffffffff82cf6964 r abm_mask
+ffffffff82cf69f0 r res_create_funcs
+ffffffff82cf6a20 r plane_cap
+ffffffff82cf6a50 r link_enc_regs
+ffffffff82cf70b0 r link_enc_aux_regs
+ffffffff82cf7100 r link_enc_hpd_regs
+ffffffff82cf7114 r le_shift
+ffffffff82cf7204 r le_mask
+ffffffff82cf75bc r link_enc_feature
+ffffffff82cf75cc r panel_config_defaults
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+ffffffff82cf77fc r hubbub_reg
+ffffffff82cf7984 r hubbub_shift
+ffffffff82cf7a14 r hubbub_mask
+ffffffff82cf7c50 r vmid_regs
+ffffffff82cf7e10 r vmid_shifts
+ffffffff82cf7e18 r vmid_masks
+ffffffff82cf7e40 r hubp_regs
+ffffffff82cf8670 r hubp_shift
+ffffffff82cf876c r hubp_mask
+ffffffff82cf8b60 r dpp_regs
+ffffffff82cfa070 r tf_shift
+ffffffff82cfa344 r tf_mask
+ffffffff82cfae90 r opp_regs
+ffffffff82cfaff0 r opp_shift
+ffffffff82cfb028 r opp_mask
+ffffffff82cfb100 r optc_regs
+ffffffff82cfb6a0 r optc_shift
+ffffffff82cfb774 r optc_mask
+ffffffff82cfbabc r mpc_regs
+ffffffff82cfd2a8 r mpc_shift
+ffffffff82cfd384 r mpc_mask
+ffffffff82cfd6f0 r dsc_regs
+ffffffff82cfda00 r dsc_shift
+ffffffff82cfdab8 r dsc_mask
+ffffffff82cfdd90 r dwbc30_regs
+ffffffff82cfdf6c r dwbc30_shift
+ffffffff82cfe0a0 r dwbc30_mask
+ffffffff82cfe570 r mcif_wb30_regs
+ffffffff82cfe66c r mcif_wb30_shift
+ffffffff82cfe718 r mcif_wb30_mask
+ffffffff82cfe9d0 r aux_engine_regs
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+ffffffff82cfeaf8 r aux_shift
+ffffffff82cfeb10 r i2c_hw_regs
+ffffffff82cfec28 r i2c_shifts
+ffffffff82cfec54 r i2c_masks
+ffffffff82cfed00 r audio_regs
+ffffffff82cfee34 r audio_shift
+ffffffff82cfee4c r audio_mask
+ffffffff82cfee90 r stream_enc_regs
+ffffffff82cff534 r se_shift
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+ffffffff82cff980 r vpg_regs
+ffffffff82cffa70 r vpg_shift
+ffffffff82cffa98 r vpg_mask
+ffffffff82cffb40 r afmt_regs
+ffffffff82cffc18 r afmt_shift
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+ffffffff82cffc80 r hpo_dp_stream_enc_regs
+ffffffff82cffeb0 r hpo_dp_se_shift
+ffffffff82cffed8 r hpo_dp_se_mask
+ffffffff82cfff80 r apg_regs
+ffffffff82cfffc0 r apg_shift
+ffffffff82cfffc8 r apg_mask
+ffffffff82cfffe0 r hpo_dp_link_enc_regs
+ffffffff82d000f0 r hpo_dp_le_shift
+ffffffff82d0010c r hpo_dp_le_mask
+ffffffff82d00170 r hwseq_reg
+ffffffff82d0038c r hwseq_shift
+ffffffff82d0040c r hwseq_mask
+ffffffff82d01000 r bios_regs
+ffffffff82d01008 r res_cap_dcn31
+ffffffff82d01050 r clk_src_regs
+ffffffff82d011f4 r dccg_regs
+ffffffff82d012e4 r dccg_shift
+ffffffff82d01384 r dccg_mask
+ffffffff82d01600 r abm_regs
+ffffffff82d017a0 r abm_shift
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+ffffffff82d01850 r res_create_funcs
+ffffffff82d01880 r plane_cap
+ffffffff82d018b0 r link_enc_regs
+ffffffff82d01f10 r link_enc_aux_regs
+ffffffff82d01f60 r link_enc_hpd_regs
+ffffffff82d01f74 r le_shift
+ffffffff82d02064 r le_mask
+ffffffff82d0241c r link_enc_feature
+ffffffff82d0242c r panel_config_defaults
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+ffffffff82d0265c r hubbub_reg
+ffffffff82d027e4 r hubbub_shift
+ffffffff82d02874 r hubbub_mask
+ffffffff82d02ab0 r vmid_regs
+ffffffff82d02c70 r vmid_shifts
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+ffffffff82d02ca0 r hubp_regs
+ffffffff82d034d0 r hubp_shift
+ffffffff82d035cc r hubp_mask
+ffffffff82d039c0 r dpp_regs
+ffffffff82d04ed0 r tf_shift
+ffffffff82d051a4 r tf_mask
+ffffffff82d05cf0 r opp_regs
+ffffffff82d05e50 r opp_shift
+ffffffff82d05e88 r opp_mask
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+ffffffff82d06500 r optc_shift
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+ffffffff82d0691c r mpc_regs
+ffffffff82d08108 r mpc_shift
+ffffffff82d081e4 r mpc_mask
+ffffffff82d08550 r dsc_regs
+ffffffff82d0879c r dsc_shift
+ffffffff82d08854 r dsc_mask
+ffffffff82d08b30 r dwbc30_regs
+ffffffff82d08d0c r dwbc30_shift
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+ffffffff82d09310 r mcif_wb30_regs
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+ffffffff82d099c8 r i2c_shifts
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+ffffffff82d09aa0 r audio_regs
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+ffffffff82d0a9b8 r afmt_shift
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+ffffffff82d0aa20 r hpo_dp_stream_enc_regs
+ffffffff82d0ac50 r hpo_dp_se_shift
+ffffffff82d0ac78 r hpo_dp_se_mask
+ffffffff82d0ad20 r apg_regs
+ffffffff82d0ad60 r apg_shift
+ffffffff82d0ad68 r apg_mask
+ffffffff82d0ad80 r hpo_dp_link_enc_regs
+ffffffff82d0ae90 r hpo_dp_le_shift
+ffffffff82d0aeac r hpo_dp_le_mask
+ffffffff82d0af10 r hwseq_reg
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+ffffffff82d0c008 r res_cap_dcn31
+ffffffff82d0c050 r clk_src_regs
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+ffffffff82d0c2e4 r dccg_shift
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+ffffffff82d0c7a0 r abm_shift
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+ffffffff82d0c850 r res_create_funcs
+ffffffff82d0c880 r plane_cap
+ffffffff82d0c8b0 r link_enc_regs
+ffffffff82d0cf10 r link_enc_aux_regs
+ffffffff82d0cf60 r link_enc_hpd_regs
+ffffffff82d0cf74 r le_shift
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+ffffffff82d0d7e4 r hubbub_shift
+ffffffff82d0d874 r hubbub_mask
+ffffffff82d0dab0 r vmid_regs
+ffffffff82d0dc70 r vmid_shifts
+ffffffff82d0dc78 r vmid_masks
+ffffffff82d0dca0 r hubp_regs
+ffffffff82d0e4d0 r hubp_shift
+ffffffff82d0e5cc r hubp_mask
+ffffffff82d0e9c0 r dpp_regs
+ffffffff82d0fed0 r tf_shift
+ffffffff82d101a4 r tf_mask
+ffffffff82d10cf0 r opp_regs
+ffffffff82d10e50 r opp_shift
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+ffffffff82d11500 r optc_shift
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+ffffffff82d1191c r mpc_regs
+ffffffff82d13108 r mpc_shift
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+ffffffff82d13550 r dsc_regs
+ffffffff82d1379c r dsc_shift
+ffffffff82d13854 r dsc_mask
+ffffffff82d13b30 r dwbc30_regs
+ffffffff82d13d0c r dwbc30_shift
+ffffffff82d13e40 r dwbc30_mask
+ffffffff82d14310 r mcif_wb30_regs
+ffffffff82d1440c r mcif_wb30_shift
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+ffffffff82d14770 r aux_engine_regs
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+ffffffff82d148b0 r i2c_hw_regs
+ffffffff82d149c8 r i2c_shifts
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+ffffffff82d14aa0 r audio_regs
+ffffffff82d14bd4 r audio_shift
+ffffffff82d14bec r audio_mask
+ffffffff82d14c30 r stream_enc_regs
+ffffffff82d152d4 r se_shift
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+ffffffff82d15810 r vpg_shift
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+ffffffff82d15a20 r hpo_dp_stream_enc_regs
+ffffffff82d15c50 r hpo_dp_se_shift
+ffffffff82d15c78 r hpo_dp_se_mask
+ffffffff82d15d20 r apg_regs
+ffffffff82d15d60 r apg_shift
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+ffffffff82d15e90 r hpo_dp_le_shift
+ffffffff82d15eac r hpo_dp_le_mask
+ffffffff82d15f10 r hwseq_reg
+ffffffff82d1612c r hwseq_shift
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+ffffffff82d17000 r dccg32_funcs
+ffffffff82d18000 r dcn32_link_enc_funcs
+ffffffff82d19000 r dcn32_str_enc_funcs
+ffffffff82d1a000 r hubbub32_funcs
+ffffffff82d1b000 r dcn32_funcs
+ffffffff82d1b2e8 r dcn32_private_funcs
+ffffffff82d1c000 r dcn32_mmhubbub_funcs
+ffffffff82d1d000 r dcn32_mpc_funcs
+ffffffff82d1e000 r res_cap_dcn32
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+ffffffff82d1e400 r res_create_funcs
+ffffffff82d1e430 r plane_cap
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+ffffffff82d1e918 r debug_defaults_drv
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+ffffffff82d1eaf4 r hubbub_shift
+ffffffff82d1eb84 r hubbub_mask
+ffffffff82d1edbc r vmid_shifts
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+ffffffff82d1ede4 r hubp_shift
+ffffffff82d1eee0 r hubp_mask
+ffffffff82d1f2d0 r tf_shift
+ffffffff82d1f5a4 r tf_mask
+ffffffff82d200e8 r opp_shift
+ffffffff82d20120 r opp_mask
+ffffffff82d201f4 r optc_shift
+ffffffff82d202c8 r optc_mask
+ffffffff82d20610 r mpc_shift
+ffffffff82d206ec r mpc_mask
+ffffffff82d20a58 r dsc_shift
+ffffffff82d20b10 r dsc_mask
+ffffffff82d20de8 r dwbc30_shift
+ffffffff82d20f1c r dwbc30_mask
+ffffffff82d213e4 r mcif_wb30_shift
+ffffffff82d21490 r mcif_wb30_mask
+ffffffff82d2173c r aux_mask
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+ffffffff82d217b4 r i2c_shifts
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+ffffffff82d21884 r audio_shift
+ffffffff82d2189c r audio_mask
+ffffffff82d218d8 r se_shift
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+ffffffff82d21ddc r afmt_shift
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+ffffffff82d21e5c r hpo_dp_se_mask
+ffffffff82d21efc r apg_shift
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+ffffffff82d21f1c r hpo_dp_le_shift
+ffffffff82d21f38 r hpo_dp_le_mask
+ffffffff82d21f9c r hwseq_shift
+ffffffff82d2201c r hwseq_mask
+ffffffff82d23000 r dcn321_link_enc_funcs
+ffffffff82d24000 r res_cap_dcn321
+ffffffff82d2403c r dccg_shift
+ffffffff82d240dc r dccg_mask
+ffffffff82d24350 r abm_shift
+ffffffff82d24374 r abm_mask
+ffffffff82d24400 r res_create_funcs
+ffffffff82d24430 r plane_cap
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+ffffffff82d24904 r link_enc_feature
+ffffffff82d24918 r debug_defaults_drv
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+ffffffff82d24af4 r hubbub_shift
+ffffffff82d24b84 r hubbub_mask
+ffffffff82d24dbc r vmid_shifts
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+ffffffff82d24de4 r hubp_shift
+ffffffff82d24ee0 r hubp_mask
+ffffffff82d252d0 r tf_shift
+ffffffff82d255a4 r tf_mask
+ffffffff82d260e8 r opp_shift
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+ffffffff82d261f4 r optc_shift
+ffffffff82d262c8 r optc_mask
+ffffffff82d26610 r mpc_shift
+ffffffff82d266ec r mpc_mask
+ffffffff82d26a58 r dsc_shift
+ffffffff82d26b10 r dsc_mask
+ffffffff82d26de8 r dwbc30_shift
+ffffffff82d26f1c r dwbc30_mask
+ffffffff82d273e4 r mcif_wb30_shift
+ffffffff82d27490 r mcif_wb30_mask
+ffffffff82d2773c r aux_mask
+ffffffff82d2779c r aux_shift
+ffffffff82d277b4 r i2c_shifts
+ffffffff82d277e0 r i2c_masks
+ffffffff82d27884 r audio_shift
+ffffffff82d2789c r audio_mask
+ffffffff82d278d8 r se_shift
+ffffffff82d279b4 r se_mask
+ffffffff82d27d20 r vpg_shift
+ffffffff82d27d48 r vpg_mask
+ffffffff82d27ddc r afmt_shift
+ffffffff82d27df0 r afmt_mask
+ffffffff82d27e34 r hpo_dp_se_shift
+ffffffff82d27e5c r hpo_dp_se_mask
+ffffffff82d27efc r apg_shift
+ffffffff82d27f04 r apg_mask
+ffffffff82d27f1c r hpo_dp_le_shift
+ffffffff82d27f38 r hpo_dp_le_mask
+ffffffff82d27f9c r hwseq_shift
+ffffffff82d2801c r hwseq_mask
+ffffffff82d2a000 R dcn10_soc_defaults
+ffffffff82d2a08c R dcn10_ip_defaults
+ffffffff82d36000 r dml20_funcs
+ffffffff82d36030 r dml20v2_funcs
+ffffffff82d36060 r dml21_funcs
+ffffffff82d36090 r dml30_funcs
+ffffffff82d360c0 r dml31_funcs
+ffffffff82d360f0 r dml314_funcs
+ffffffff82d36120 r dml32_funcs
+ffffffff82d39000 r qp_table_444_8bpc_max
+ffffffff82d39940 r qp_table_444_8bpc_min
+ffffffff82d3a280 r qp_table_444_10bpc_max
+ffffffff82d3aec0 r qp_table_444_10bpc_min
+ffffffff82d3bb00 r qp_table_444_12bpc_max
+ffffffff82d3ca40 r qp_table_444_12bpc_min
+ffffffff82d3d980 r qp_table_422_8bpc_max
+ffffffff82d3dec0 r qp_table_422_8bpc_min
+ffffffff82d3e400 r qp_table_422_10bpc_max
+ffffffff82d3eb40 r qp_table_422_10bpc_min
+ffffffff82d3f280 r qp_table_422_12bpc_max
+ffffffff82d3fbc0 r qp_table_422_12bpc_min
+ffffffff82d40500 r qp_table_420_8bpc_max
+ffffffff82d40940 r qp_table_420_8bpc_min
+ffffffff82d40d80 r qp_table_420_10bpc_max
+ffffffff82d41340 r qp_table_420_10bpc_min
+ffffffff82d41900 r qp_table_420_12bpc_max
+ffffffff82d42040 r qp_table_420_12bpc_min
 ffffffff82d44000 r funcs
 ffffffff82d44050 r hpd_regs
 ffffffff82d441a0 r hpd_shift
@@ -48389,111 +48386,111 @@ ffffffff82d481c0 r ddc_data_regs
 ffffffff82d483a0 r ddc_clk_regs
 ffffffff82d48580 r ddc_shift
 ffffffff82d485a8 r ddc_mask
-ffffffff82d485d0 r generic_regs
-ffffffff82d48640 r generic_shift
-ffffffff82d48650 r generic_mask
 ffffffff82d49000 r funcs
 ffffffff82d4a000 r funcs
 ffffffff82d4a050 r hpd_regs
 ffffffff82d4a1a0 r hpd_shift
 ffffffff82d4a1b0 r hpd_mask
-ffffffff82d4a1c0 r ddc_data_regs_dcn
-ffffffff82d4a370 r ddc_clk_regs_dcn
-ffffffff82d4a520 r ddc_shift
-ffffffff82d4a640 r ddc_mask
-ffffffff82d4a760 r generic_regs
-ffffffff82d4a7d0 r generic_shift
-ffffffff82d4a7e0 r generic_mask
+ffffffff82d4a1c0 r ddc_data_regs
+ffffffff82d4a3a0 r ddc_clk_regs
+ffffffff82d4a580 r ddc_shift
+ffffffff82d4a5a8 r ddc_mask
+ffffffff82d4a5d0 r generic_regs
+ffffffff82d4a640 r generic_shift
+ffffffff82d4a650 r generic_mask
 ffffffff82d4b000 r funcs
 ffffffff82d4c000 r funcs
 ffffffff82d4c050 r hpd_regs
-ffffffff82d4c168 r hpd_shift
-ffffffff82d4c178 r hpd_mask
-ffffffff82d4c190 r ddc_data_regs_dcn
-ffffffff82d4c2c0 r ddc_clk_regs_dcn
-ffffffff82d4c3f0 r ddc_shift
-ffffffff82d4c4e0 r ddc_mask
-ffffffff82d4c5d0 r generic_regs
-ffffffff82d4c604 r generic_shift
-ffffffff82d4c60c r generic_mask
+ffffffff82d4c1a0 r hpd_shift
+ffffffff82d4c1b0 r hpd_mask
+ffffffff82d4c1c0 r ddc_data_regs_dcn
+ffffffff82d4c370 r ddc_clk_regs_dcn
+ffffffff82d4c520 r ddc_shift
+ffffffff82d4c640 r ddc_mask
+ffffffff82d4c760 r generic_regs
+ffffffff82d4c7d0 r generic_shift
+ffffffff82d4c7e0 r generic_mask
 ffffffff82d4d000 r funcs
 ffffffff82d4e000 r funcs
 ffffffff82d4e050 r hpd_regs
-ffffffff82d4e1a0 r hpd_shift
-ffffffff82d4e1b0 r hpd_mask
-ffffffff82d4e1c0 r ddc_data_regs_dcn
-ffffffff82d4e370 r ddc_clk_regs_dcn
-ffffffff82d4e520 r ddc_shift
-ffffffff82d4e640 r ddc_mask
-ffffffff82d4e760 r generic_regs
-ffffffff82d4e7d0 r generic_shift
-ffffffff82d4e7e0 r generic_mask
+ffffffff82d4e168 r hpd_shift
+ffffffff82d4e178 r hpd_mask
+ffffffff82d4e190 r ddc_data_regs_dcn
+ffffffff82d4e2c0 r ddc_clk_regs_dcn
+ffffffff82d4e3f0 r ddc_shift
+ffffffff82d4e4e0 r ddc_mask
+ffffffff82d4e5d0 r generic_regs
+ffffffff82d4e604 r generic_shift
+ffffffff82d4e60c r generic_mask
 ffffffff82d4f000 r funcs
 ffffffff82d50000 r funcs
 ffffffff82d50050 r hpd_regs
-ffffffff82d50168 r hpd_shift
-ffffffff82d50178 r hpd_mask
-ffffffff82d50190 r ddc_data_regs_dcn
-ffffffff82d50300 r ddc_clk_regs_dcn
-ffffffff82d50470 r ddc_shift
-ffffffff82d50560 r ddc_mask
-ffffffff82d50650 r generic_regs
-ffffffff82d506c0 r generic_shift
-ffffffff82d506d0 r generic_mask
+ffffffff82d501a0 r hpd_shift
+ffffffff82d501b0 r hpd_mask
+ffffffff82d501c0 r ddc_data_regs_dcn
+ffffffff82d50370 r ddc_clk_regs_dcn
+ffffffff82d50520 r ddc_shift
+ffffffff82d50640 r ddc_mask
+ffffffff82d50760 r generic_regs
+ffffffff82d507d0 r generic_shift
+ffffffff82d507e0 r generic_mask
 ffffffff82d51000 r funcs
 ffffffff82d52000 r funcs
 ffffffff82d52050 r hpd_regs
 ffffffff82d52168 r hpd_shift
 ffffffff82d52178 r hpd_mask
 ffffffff82d52190 r ddc_data_regs_dcn
-ffffffff82d52340 r ddc_clk_regs_dcn
-ffffffff82d524f0 r ddc_shift
-ffffffff82d52610 r ddc_mask
-ffffffff82d52730 r generic_regs
-ffffffff82d527a0 r generic_shift
-ffffffff82d527b0 r generic_mask
+ffffffff82d52300 r ddc_clk_regs_dcn
+ffffffff82d52470 r ddc_shift
+ffffffff82d52560 r ddc_mask
+ffffffff82d52650 r generic_regs
+ffffffff82d526c0 r generic_shift
+ffffffff82d526d0 r generic_mask
 ffffffff82d53000 r funcs
 ffffffff82d54000 r funcs
+ffffffff82d54050 r hpd_regs
+ffffffff82d54168 r hpd_shift
+ffffffff82d54178 r hpd_mask
+ffffffff82d54190 r ddc_data_regs_dcn
+ffffffff82d54340 r ddc_clk_regs_dcn
+ffffffff82d544f0 r ddc_shift
+ffffffff82d54610 r ddc_mask
+ffffffff82d54730 r generic_regs
+ffffffff82d547a0 r generic_shift
+ffffffff82d547b0 r generic_mask
 ffffffff82d55000 r funcs
 ffffffff82d56000 r funcs
-ffffffff82d57000 r hdmi_14_protection
-ffffffff82d57010 r dp_11_protection
-ffffffff82d57020 r hdcp_i2c_offsets
-ffffffff82d57050 r hdcp_dpcd_addrs
-ffffffff82d58000 r irq_service_funcs_dce110
-ffffffff82d58008 r dummy_irq_info_funcs
-ffffffff82d58018 r hpd_irq_info_funcs
-ffffffff82d58028 r hpd_rx_irq_info_funcs
-ffffffff82d58038 r pflip_irq_info_funcs
-ffffffff82d58048 r vupdate_irq_info_funcs
-ffffffff82d58058 r vblank_irq_info_funcs
-ffffffff82d58070 r irq_source_info_dce110
-ffffffff82d5a000 r irq_service_funcs_dce120
+ffffffff82d57000 r funcs
+ffffffff82d58000 r funcs
+ffffffff82d59000 r hdmi_14_protection
+ffffffff82d59010 r dp_11_protection
+ffffffff82d59020 r hdcp_i2c_offsets
+ffffffff82d59050 r hdcp_dpcd_addrs
+ffffffff82d5a000 r irq_service_funcs_dce110
 ffffffff82d5a008 r dummy_irq_info_funcs
 ffffffff82d5a018 r hpd_irq_info_funcs
 ffffffff82d5a028 r hpd_rx_irq_info_funcs
 ffffffff82d5a038 r pflip_irq_info_funcs
 ffffffff82d5a048 r vupdate_irq_info_funcs
 ffffffff82d5a058 r vblank_irq_info_funcs
-ffffffff82d5a070 r irq_source_info_dce120
-ffffffff82d5c000 r irq_service_funcs_dce80
+ffffffff82d5a070 r irq_source_info_dce110
+ffffffff82d5c000 r irq_service_funcs_dce120
 ffffffff82d5c008 r dummy_irq_info_funcs
 ffffffff82d5c018 r hpd_irq_info_funcs
 ffffffff82d5c028 r hpd_rx_irq_info_funcs
 ffffffff82d5c038 r pflip_irq_info_funcs
 ffffffff82d5c048 r vupdate_irq_info_funcs
 ffffffff82d5c058 r vblank_irq_info_funcs
-ffffffff82d5c070 r irq_source_info_dce80
-ffffffff82d5e000 r irq_service_funcs_dcn10
+ffffffff82d5c070 r irq_source_info_dce120
+ffffffff82d5e000 r irq_service_funcs_dce80
 ffffffff82d5e008 r dummy_irq_info_funcs
 ffffffff82d5e018 r hpd_irq_info_funcs
 ffffffff82d5e028 r hpd_rx_irq_info_funcs
 ffffffff82d5e038 r pflip_irq_info_funcs
-ffffffff82d5e048 r vupdate_no_lock_irq_info_funcs
+ffffffff82d5e048 r vupdate_irq_info_funcs
 ffffffff82d5e058 r vblank_irq_info_funcs
-ffffffff82d5e068 r vline0_irq_info_funcs
-ffffffff82d5e080 r irq_source_info_dcn10
-ffffffff82d60000 r irq_service_funcs_dcn20
+ffffffff82d5e070 r irq_source_info_dce80
+ffffffff82d60000 r irq_service_funcs_dcn10
 ffffffff82d60008 r dummy_irq_info_funcs
 ffffffff82d60018 r hpd_irq_info_funcs
 ffffffff82d60028 r hpd_rx_irq_info_funcs
@@ -48501,8 +48498,8 @@ ffffffff82d60038 r pflip_irq_info_funcs
 ffffffff82d60048 r vupdate_no_lock_irq_info_funcs
 ffffffff82d60058 r vblank_irq_info_funcs
 ffffffff82d60068 r vline0_irq_info_funcs
-ffffffff82d60080 r irq_source_info_dcn20
-ffffffff82d62000 r irq_service_funcs_dcn201
+ffffffff82d60080 r irq_source_info_dcn10
+ffffffff82d62000 r irq_service_funcs_dcn20
 ffffffff82d62008 r dummy_irq_info_funcs
 ffffffff82d62018 r hpd_irq_info_funcs
 ffffffff82d62028 r hpd_rx_irq_info_funcs
@@ -48510,19 +48507,18 @@ ffffffff82d62038 r pflip_irq_info_funcs
 ffffffff82d62048 r vupdate_no_lock_irq_info_funcs
 ffffffff82d62058 r vblank_irq_info_funcs
 ffffffff82d62068 r vline0_irq_info_funcs
-ffffffff82d62080 r irq_source_info_dcn201
-ffffffff82d64000 r irq_source_info_dcn21
-ffffffff82d65290 r irq_service_funcs_dcn21
-ffffffff82d65298 r dummy_irq_info_funcs
-ffffffff82d652a8 r hpd_irq_info_funcs
-ffffffff82d652b8 r hpd_rx_irq_info_funcs
-ffffffff82d652c8 r pflip_irq_info_funcs
-ffffffff82d652d8 r vupdate_no_lock_irq_info_funcs
-ffffffff82d652e8 r vblank_irq_info_funcs
-ffffffff82d652f8 r vline0_irq_info_funcs
-ffffffff82d65308 r dmub_outbox_irq_info_funcs
-ffffffff82d66000 r irq_source_info_dcn30
-ffffffff82d67290 r irq_service_funcs_dcn30
+ffffffff82d62080 r irq_source_info_dcn20
+ffffffff82d64000 r irq_service_funcs_dcn201
+ffffffff82d64008 r dummy_irq_info_funcs
+ffffffff82d64018 r hpd_irq_info_funcs
+ffffffff82d64028 r hpd_rx_irq_info_funcs
+ffffffff82d64038 r pflip_irq_info_funcs
+ffffffff82d64048 r vupdate_no_lock_irq_info_funcs
+ffffffff82d64058 r vblank_irq_info_funcs
+ffffffff82d64068 r vline0_irq_info_funcs
+ffffffff82d64080 r irq_source_info_dcn201
+ffffffff82d66000 r irq_source_info_dcn21
+ffffffff82d67290 r irq_service_funcs_dcn21
 ffffffff82d67298 r dummy_irq_info_funcs
 ffffffff82d672a8 r hpd_irq_info_funcs
 ffffffff82d672b8 r hpd_rx_irq_info_funcs
@@ -48530,9 +48526,9 @@ ffffffff82d672c8 r pflip_irq_info_funcs
 ffffffff82d672d8 r vupdate_no_lock_irq_info_funcs
 ffffffff82d672e8 r vblank_irq_info_funcs
 ffffffff82d672f8 r vline0_irq_info_funcs
-ffffffff82d67308 r dmub_trace_irq_info_funcs
-ffffffff82d68000 r irq_source_info_dcn302
-ffffffff82d69290 r irq_service_funcs_dcn302
+ffffffff82d67308 r dmub_outbox_irq_info_funcs
+ffffffff82d68000 r irq_source_info_dcn30
+ffffffff82d69290 r irq_service_funcs_dcn30
 ffffffff82d69298 r dummy_irq_info_funcs
 ffffffff82d692a8 r hpd_irq_info_funcs
 ffffffff82d692b8 r hpd_rx_irq_info_funcs
@@ -48541,27 +48537,27 @@ ffffffff82d692d8 r vupdate_no_lock_irq_info_funcs
 ffffffff82d692e8 r vblank_irq_info_funcs
 ffffffff82d692f8 r vline0_irq_info_funcs
 ffffffff82d69308 r dmub_trace_irq_info_funcs
-ffffffff82d6a000 r irq_service_funcs_dcn303
-ffffffff82d6a008 r dummy_irq_info_funcs
-ffffffff82d6a018 r hpd_irq_info_funcs
-ffffffff82d6a028 r hpd_rx_irq_info_funcs
-ffffffff82d6a038 r pflip_irq_info_funcs
-ffffffff82d6a048 r vupdate_no_lock_irq_info_funcs
-ffffffff82d6a058 r vblank_irq_info_funcs
-ffffffff82d6a068 r vline0_irq_info_funcs
-ffffffff82d6a080 r irq_source_info_dcn303
-ffffffff82d6c000 r irq_source_info_dcn31
-ffffffff82d6d290 r irq_service_funcs_dcn31
-ffffffff82d6d298 r dummy_irq_info_funcs
-ffffffff82d6d2a8 r hpd_irq_info_funcs
-ffffffff82d6d2b8 r hpd_rx_irq_info_funcs
-ffffffff82d6d2c8 r pflip_irq_info_funcs
-ffffffff82d6d2d8 r vupdate_no_lock_irq_info_funcs
-ffffffff82d6d2e8 r vblank_irq_info_funcs
-ffffffff82d6d2f8 r vline0_irq_info_funcs
-ffffffff82d6d308 r outbox_irq_info_funcs
-ffffffff82d6e000 r irq_source_info_dcn314
-ffffffff82d6f290 r irq_service_funcs_dcn314
+ffffffff82d6a000 r irq_source_info_dcn302
+ffffffff82d6b290 r irq_service_funcs_dcn302
+ffffffff82d6b298 r dummy_irq_info_funcs
+ffffffff82d6b2a8 r hpd_irq_info_funcs
+ffffffff82d6b2b8 r hpd_rx_irq_info_funcs
+ffffffff82d6b2c8 r pflip_irq_info_funcs
+ffffffff82d6b2d8 r vupdate_no_lock_irq_info_funcs
+ffffffff82d6b2e8 r vblank_irq_info_funcs
+ffffffff82d6b2f8 r vline0_irq_info_funcs
+ffffffff82d6b308 r dmub_trace_irq_info_funcs
+ffffffff82d6c000 r irq_service_funcs_dcn303
+ffffffff82d6c008 r dummy_irq_info_funcs
+ffffffff82d6c018 r hpd_irq_info_funcs
+ffffffff82d6c028 r hpd_rx_irq_info_funcs
+ffffffff82d6c038 r pflip_irq_info_funcs
+ffffffff82d6c048 r vupdate_no_lock_irq_info_funcs
+ffffffff82d6c058 r vblank_irq_info_funcs
+ffffffff82d6c068 r vline0_irq_info_funcs
+ffffffff82d6c080 r irq_source_info_dcn303
+ffffffff82d6e000 r irq_source_info_dcn31
+ffffffff82d6f290 r irq_service_funcs_dcn31
 ffffffff82d6f298 r dummy_irq_info_funcs
 ffffffff82d6f2a8 r hpd_irq_info_funcs
 ffffffff82d6f2b8 r hpd_rx_irq_info_funcs
@@ -48570,8 +48566,8 @@ ffffffff82d6f2d8 r vupdate_no_lock_irq_info_funcs
 ffffffff82d6f2e8 r vblank_irq_info_funcs
 ffffffff82d6f2f8 r vline0_irq_info_funcs
 ffffffff82d6f308 r outbox_irq_info_funcs
-ffffffff82d70000 r irq_source_info_dcn315
-ffffffff82d71290 r irq_service_funcs_dcn315
+ffffffff82d70000 r irq_source_info_dcn314
+ffffffff82d71290 r irq_service_funcs_dcn314
 ffffffff82d71298 r dummy_irq_info_funcs
 ffffffff82d712a8 r hpd_irq_info_funcs
 ffffffff82d712b8 r hpd_rx_irq_info_funcs
@@ -48580,8 +48576,8 @@ ffffffff82d712d8 r vupdate_no_lock_irq_info_funcs
 ffffffff82d712e8 r vblank_irq_info_funcs
 ffffffff82d712f8 r vline0_irq_info_funcs
 ffffffff82d71308 r outbox_irq_info_funcs
-ffffffff82d72000 r irq_source_info_dcn32
-ffffffff82d73290 r irq_service_funcs_dcn32
+ffffffff82d72000 r irq_source_info_dcn315
+ffffffff82d73290 r irq_service_funcs_dcn315
 ffffffff82d73298 r dummy_irq_info_funcs
 ffffffff82d732a8 r hpd_irq_info_funcs
 ffffffff82d732b8 r hpd_rx_irq_info_funcs
@@ -48590,9106 +48586,9086 @@ ffffffff82d732d8 r vupdate_no_lock_irq_info_funcs
 ffffffff82d732e8 r vblank_irq_info_funcs
 ffffffff82d732f8 r vline0_irq_info_funcs
 ffffffff82d73308 r outbox_irq_info_funcs
-ffffffff82d75000 r dio_link_hwss
-ffffffff82d76000 r dio_fixed_vs_pe_retimer_link_hwss
-ffffffff82d77000 r dpia_link_hwss
-ffffffff82d78000 r hpo_dp_link_hwss
-ffffffff82d79000 r hpo_fixed_vs_pe_retimer_dp_link_hwss
-ffffffff82d7a000 r DP_SINK_BRANCH_DEV_NAME_7580
-ffffffff82d7b000 r DP_VGA_DONGLE_BRANCH_DEV_NAME
-ffffffff82d7b006 r DP_DVI_CONVERTER_ID_4
-ffffffff82d7b00d r DP_DVI_CONVERTER_ID_5
-ffffffff82d7c000 r dp_lt_fallbacks
-ffffffff82d80000 r mandatory_dpcd_partitions
-ffffffff82d81000 r DP_VGA_LVDS_CONVERTER_ID_2
-ffffffff82d81007 r DP_VGA_LVDS_CONVERTER_ID_3
-ffffffff82d82000 r virtual_lnk_enc_funcs
-ffffffff82d83000 r virtual_link_hwss
-ffffffff82d84000 r virtual_str_enc_funcs
-ffffffff82d85000 R dmub_srv_dcn20_regs
-ffffffff82d86000 R dmub_srv_dcn21_regs
-ffffffff82d87000 R dmub_srv_dcn30_regs
-ffffffff82d88000 R dmub_srv_dcn301_regs
-ffffffff82d89000 R dmub_srv_dcn302_regs
-ffffffff82d8a000 R dmub_srv_dcn303_regs
-ffffffff82d8b000 R dmub_srv_dcn31_regs
-ffffffff82d8c000 R dmub_srv_dcn314_regs
-ffffffff82d8d000 R dmub_srv_dcn315_regs
-ffffffff82d8e000 R dmub_srv_dcn316_regs
-ffffffff82d8f000 R dmub_srv_dcn32_regs
-ffffffff82d90000 r numerator01
-ffffffff82d90020 r numerator02
-ffffffff82d90040 r numerator04
-ffffffff82d90060 r numerator05
-ffffffff82d94000 r abm_settings
-ffffffff82d94020 r abm_settings_config0
-ffffffff82d94060 r abm_settings_config1
-ffffffff82d940a0 r abm_settings_config2
-ffffffff82d940d8 r min_reduction_table_v_2_2
-ffffffff82d940e5 r max_reduction_table_v_2_2
-ffffffff82d940f2 r min_reduction_table
-ffffffff82d940ff r max_reduction_table
-ffffffff82d94110 r custom_backlight_curve0
-ffffffff82d95000 R amdgpu_pp_profile_name
-ffffffff82d96000 r pp_lib_thermal_controller_names
-ffffffff82d97000 r pp_ip_funcs
-ffffffff82d970a0 R pp_smu_ip_block
-ffffffff82d970b8 r pp_dpm_funcs
-ffffffff82d98000 r gpio_tbl
-ffffffff82d980f0 r enable_fb_req_rej_tbl
-ffffffff82d98140 r use_bclk_tbl
-ffffffff82d98310 r turn_off_plls_tbl
-ffffffff82d98640 r enter_baco_tbl
-ffffffff82d98730 r exit_baco_tbl
-ffffffff82d98850 r clean_baco_tbl
-ffffffff82d99000 r gpio_tbl
-ffffffff82d990f0 r enable_fb_req_rej_tbl
-ffffffff82d99140 r use_bclk_tbl
-ffffffff82d992e0 r turn_off_plls_tbl
-ffffffff82d99370 r clk_req_b_tbl
-ffffffff82d99490 r enter_baco_tbl
-ffffffff82d995b0 r exit_baco_tbl
-ffffffff82d996d0 r clean_baco_tbl
+ffffffff82d74000 r irq_source_info_dcn32
+ffffffff82d75290 r irq_service_funcs_dcn32
+ffffffff82d75298 r dummy_irq_info_funcs
+ffffffff82d752a8 r hpd_irq_info_funcs
+ffffffff82d752b8 r hpd_rx_irq_info_funcs
+ffffffff82d752c8 r pflip_irq_info_funcs
+ffffffff82d752d8 r vupdate_no_lock_irq_info_funcs
+ffffffff82d752e8 r vblank_irq_info_funcs
+ffffffff82d752f8 r vline0_irq_info_funcs
+ffffffff82d75308 r outbox_irq_info_funcs
+ffffffff82d77000 r dio_link_hwss
+ffffffff82d78000 r dio_fixed_vs_pe_retimer_link_hwss
+ffffffff82d79000 r dpia_link_hwss
+ffffffff82d7a000 r hpo_dp_link_hwss
+ffffffff82d7b000 r hpo_fixed_vs_pe_retimer_dp_link_hwss
+ffffffff82d7c000 r DP_SINK_BRANCH_DEV_NAME_7580
+ffffffff82d7d000 r DP_VGA_DONGLE_BRANCH_DEV_NAME
+ffffffff82d7d006 r DP_DVI_CONVERTER_ID_4
+ffffffff82d7d00d r DP_DVI_CONVERTER_ID_5
+ffffffff82d7e000 r dp_lt_fallbacks
+ffffffff82d82000 r mandatory_dpcd_partitions
+ffffffff82d83000 r DP_VGA_LVDS_CONVERTER_ID_2
+ffffffff82d83007 r DP_VGA_LVDS_CONVERTER_ID_3
+ffffffff82d84000 r virtual_lnk_enc_funcs
+ffffffff82d85000 r virtual_link_hwss
+ffffffff82d86000 r virtual_str_enc_funcs
+ffffffff82d87000 R dmub_srv_dcn20_regs
+ffffffff82d88000 R dmub_srv_dcn21_regs
+ffffffff82d89000 R dmub_srv_dcn30_regs
+ffffffff82d8a000 R dmub_srv_dcn301_regs
+ffffffff82d8b000 R dmub_srv_dcn302_regs
+ffffffff82d8c000 R dmub_srv_dcn303_regs
+ffffffff82d8d000 R dmub_srv_dcn31_regs
+ffffffff82d8e000 R dmub_srv_dcn314_regs
+ffffffff82d8f000 R dmub_srv_dcn315_regs
+ffffffff82d90000 R dmub_srv_dcn316_regs
+ffffffff82d91000 R dmub_srv_dcn32_regs
+ffffffff82d92000 r numerator01
+ffffffff82d92020 r numerator02
+ffffffff82d92040 r numerator04
+ffffffff82d92060 r numerator05
+ffffffff82d96000 r abm_settings
+ffffffff82d96020 r abm_settings_config0
+ffffffff82d96060 r abm_settings_config1
+ffffffff82d960a0 r abm_settings_config2
+ffffffff82d960d8 r min_reduction_table_v_2_2
+ffffffff82d960e5 r max_reduction_table_v_2_2
+ffffffff82d960f2 r min_reduction_table
+ffffffff82d960ff r max_reduction_table
+ffffffff82d96110 r custom_backlight_curve0
+ffffffff82d97000 R amdgpu_pp_profile_name
+ffffffff82d98000 r pp_lib_thermal_controller_names
+ffffffff82d99000 r pp_ip_funcs
+ffffffff82d990a0 R pp_smu_ip_block
+ffffffff82d990b8 r pp_dpm_funcs
 ffffffff82d9a000 r gpio_tbl
 ffffffff82d9a0f0 r enable_fb_req_rej_tbl
-ffffffff82d9a140 r use_bclk_tbl_vg
-ffffffff82d9a200 r turn_off_plls_tbl_vg
-ffffffff82d9a350 r use_bclk_tbl
-ffffffff82d9a440 r turn_off_plls_tbl
-ffffffff82d9a5f0 r clk_req_b_tbl
-ffffffff82d9a710 r enter_baco_tbl
-ffffffff82d9a830 r exit_baco_tbl
-ffffffff82d9a950 r clean_baco_tbl
-ffffffff82d9b000 r vega10_fuses_default
-ffffffff82daa000 r pp_r600_encode_lanes
-ffffffff82dab000 R pptable_v1_0_funcs
-ffffffff82dac000 R pptable_funcs
-ffffffff82dac020 r soft_dummy_pp_table
-ffffffff82dad000 r smu10_hwmgr_funcs
-ffffffff82dae000 r smu7_hwmgr_funcs
-ffffffff82dae2f8 r smu7_irq_funcs
-ffffffff82dae310 r SMU7ThermalPolicy
-ffffffff82daf000 r GCCACConfig_Polaris10
-ffffffff82daf1b0 r DIDTConfig_Polaris10
-ffffffff82dafa50 r GCCACConfig_Polaris11
-ffffffff82dafc00 r DIDTConfig_Polaris11_Kicker
-ffffffff82db04a0 r DIDTConfig_Polaris11
-ffffffff82db0d40 r DIDTConfig_Polaris12
-ffffffff82db15e0 r GCCACConfig_VegaM
-ffffffff82db1790 r DIDTConfig_VegaM
-ffffffff82db3000 r smu8_hwmgr_funcs
-ffffffff82db32f0 r SMU7ThermalPolicy
-ffffffff82db4000 r smu9_irq_funcs
-ffffffff82db5000 r gpio_tbl_iceland
-ffffffff82db5060 r gpio_tbl
-ffffffff82db5150 r enable_fb_req_rej_tbl
-ffffffff82db51a0 r use_bclk_tbl
-ffffffff82db5370 r turn_off_plls_tbl
-ffffffff82db5610 r enter_baco_tbl
-ffffffff82db5730 r exit_baco_tbl_iceland
-ffffffff82db5870 r clean_baco_tbl_iceland
-ffffffff82db5890 r exit_baco_tbl
-ffffffff82db59b0 r clean_baco_tbl
-ffffffff82db6000 r pre_baco_tbl
-ffffffff82db6090 r enter_baco_tbl
-ffffffff82db62b0 r exit_baco_tbl
-ffffffff82db6520 r clean_baco_tbl
-ffffffff82db7000 r vega10_hwmgr_funcs
-ffffffff82db72f0 r channel_number
-ffffffff82db7320 r SMU7ThermalWithDelayPolicy
-ffffffff82db8000 r SEDiDtStallCtrlConfig_vega10
-ffffffff82db8110 r SEDiDtStallPatternConfig_vega10
-ffffffff82db82e0 r SEDiDtWeightConfig_Vega10
-ffffffff82db83b0 r SEDiDtCtrl1Config_Vega10
-ffffffff82db8440 r SEDiDtCtrl2Config_Vega10
-ffffffff82db8510 r SEDiDtCtrl3Config_vega10
-ffffffff82db8820 r SEDiDtTuningCtrlConfig_Vega10
-ffffffff82db88b0 r SELCacConfig_Vega10
-ffffffff82db8a40 r SEDiDtCtrl0Config_Vega10
-ffffffff82db8d10 r AvfsPSMInitConfig_vega10
-ffffffff82db8d90 r SEEDCStallPatternConfig_Vega10
-ffffffff82db8ea0 r SEEDCStallDelayConfig_Vega10
-ffffffff82db8f80 r SEEDCCtrlConfig_Vega10
-ffffffff82db9040 r PSMSEEDCStallPatternConfig_Vega10
-ffffffff82db90c0 r PSMSEEDCStallDelayConfig_Vega10
-ffffffff82db91d0 r PSMSEEDCCtrlResetConfig_Vega10
-ffffffff82db9290 r PSMSEEDCCtrlConfig_Vega10
-ffffffff82db9350 r SEEDCForceStallPatternConfig_Vega10
-ffffffff82db93e0 r SEEDCCtrlForceStallConfig_Vega10
-ffffffff82dba000 R vega10_pptable_funcs
-ffffffff82dbb000 r pre_baco_tbl
-ffffffff82dbb090 r enter_baco_tbl
-ffffffff82dbb2b0 r exit_baco_tbl
-ffffffff82dbb520 r clean_baco_tbl
-ffffffff82dbc000 r vega12_hwmgr_funcs
-ffffffff82dbc2f0 r SMU7ThermalWithDelayPolicy
-ffffffff82dbc340 r link_width
-ffffffff82dbd000 R vega12_pptable_funcs
-ffffffff82dbe000 r clean_baco_tbl
-ffffffff82dbf000 r vega20_hwmgr_funcs
-ffffffff82dbf2f0 r SMU7ThermalWithDelayPolicy
-ffffffff82dbf340 r link_width
-ffffffff82dc0000 R vega20_pptable_funcs
-ffffffff82dc1000 R ci_smu_funcs
-ffffffff82dc10e0 r defaults_hawaii_pro
-ffffffff82dc112c r defaults_hawaii_xt
-ffffffff82dc1178 r defaults_saturn_xt
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-ffffffff82dc2000 R fiji_smu_funcs
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-ffffffff82dc2240 r fiji_power_tune_data_set_array
-ffffffff82dc2246 r fiji_clock_stretch_amount_conversion
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-ffffffff82dc3000 R iceland_smu_funcs
-ffffffff82dc30e0 r defaults_icelandxt
-ffffffff82dc312c r defaults_icelandpro
-ffffffff82dc3178 r defaults_iceland
-ffffffff82dc4000 R polaris10_smu_funcs
-ffffffff82dc40e0 r avfs_graphics_level_polaris10
-ffffffff82dc42a0 r avfs_memory_level_polaris10
-ffffffff82dc42c0 r polaris10_power_tune_data_set_array
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-ffffffff82dc5000 R smu10_smu_funcs
-ffffffff82dc6000 r smu7_program_jump_on_start.data
-ffffffff82dc6010 r pwr_virus_table_pre
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-ffffffff82dd1000 R smu8_smu_funcs
-ffffffff82dd2000 R tonga_smu_funcs
-ffffffff82dd20e0 r tonga_power_tune_data_set_array
-ffffffff82dd212c r tonga_clock_stretch_amount_conversion
-ffffffff82dd2140 r tonga_clock_stretcher_ddt_table
-ffffffff82dd3000 R vega10_smu_funcs
-ffffffff82dd4000 R vega12_smu_funcs
-ffffffff82dd5000 R vega20_smu_funcs
-ffffffff82dd6000 R vegam_smu_funcs
-ffffffff82dd60e0 r vegam_power_tune_data_set_array
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-ffffffff82dd70a0 R smu_v11_0_ip_block
-ffffffff82dd70b8 R smu_v12_0_ip_block
-ffffffff82dd70d0 R smu_v13_0_ip_block
-ffffffff82dd70e8 r swsmu_pm_funcs
-ffffffff82dd8000 r arcturus_ppt_funcs
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-ffffffff82ddb000 r navi10_ppt_funcs
-ffffffff82ddb3f0 r smu11_thermal_policy
-ffffffff82ddb448 r navi10_i2c_algo
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-ffffffff82ddb470 r navi1x_throttler_map
-ffffffff82ddb490 r NoDbiPrbs7
-ffffffff82ddc490 r DbiPrbs7
-ffffffff82dde000 r sienna_cichlid_ppt_funcs
-ffffffff82dde3f0 r smu11_thermal_policy
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-ffffffff82ddf010 r link_width
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-ffffffff82de03e8 r vangogh_throttler_map
-ffffffff82de1000 r renoir_ppt_funcs
-ffffffff82de13e8 r renoir_throttler_map
-ffffffff82de2000 r aldebaran_ppt_funcs
-ffffffff82de23f0 r aldebaran_clk_map
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-ffffffff82de2530 r smu13_thermal_policy
-ffffffff82de2588 r aldebaran_i2c_algo
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-ffffffff82de25b0 r aldebaran_throttler_map
-ffffffff82de25d0 r aldebaran_message_map
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-ffffffff82de4000 R pmfw_decoded_link_speed
-ffffffff82de4020 R pmfw_decoded_link_width
-ffffffff82de4040 r smu_v13_0_irq_funcs
-ffffffff82de5000 r smu_v13_0_0_ppt_funcs
-ffffffff82de53f0 r smu13_thermal_policy
-ffffffff82de5448 r smu_v13_0_0_i2c_algo
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-ffffffff82de5470 r smu_v13_0_0_throttler_map
-ffffffff82de6000 r smu_v13_0_4_ppt_funcs
-ffffffff82de7000 r smu_v13_0_5_ppt_funcs
-ffffffff82de8000 r smu_v13_0_6_ppt_funcs
-ffffffff82de83f0 r smu_v13_0_6_message_map
-ffffffff82de8e70 r smu_v13_0_6_clk_map
-ffffffff82de8f30 r smu_v13_0_6_table_map
-ffffffff82de8fb0 r smu_v13_0_6_i2c_algo
-ffffffff82de8fc0 r smu_v13_0_6_i2c_control_quirks
-ffffffff82de8fd0 r smu_v13_0_6_irq_funcs
-ffffffff82de8fe0 r smu_v13_0_6_throttler_map
-ffffffff82de8ff0 r smu_v13_0_6_feature_mask_map
-ffffffff82dea000 r smu_v13_0_7_ppt_funcs
-ffffffff82dea3f0 r smu13_thermal_policy
-ffffffff82dea450 r smu_v13_0_7_throttler_map
-ffffffff82deb000 r yellow_carp_ppt_funcs
-ffffffff82dec000 R link_speed
-ffffffff82dec020 r __smu_message_names
-ffffffff82ded000 R pchb_ca
-ffffffff82dee000 R amas_ca
-ffffffff82dee028 R amas_devices
-ffffffff82dee040 r amas_feature
-ffffffff82def000 R cardslot_ca
-ffffffff82df0000 R cardbus_ca
-ffffffff82df1000 R com_cardbus_ca
-ffffffff82df2000 R xl_cardbus_ca
-ffffffff82df2030 R xl_cardbus_products
-ffffffff82df3000 R dc_cardbus_ca
-ffffffff82df3030 R dc_cardbus_devices
-ffffffff82df4000 R fxp_cardbus_ca
-ffffffff82df4028 R fxp_cardbus_devices
-ffffffff82df5000 R rl_cardbus_devices
-ffffffff82df5028 R rl_cardbus_ca
-ffffffff82df6000 R re_cardbus_ca
-ffffffff82df6028 R re_cardbus_devices
-ffffffff82df7000 R ath_cardbus_ca
-ffffffff82df8000 R athn_cardbus_ca
-ffffffff82df8030 r athn_cardbus_devices
-ffffffff82df9000 R atw_cardbus_ca
-ffffffff82df9028 R atw_cardbus_devices
-ffffffff82dfa000 R rtw_cardbus_ca
-ffffffff82dfa028 R rtw_cardbus_devices
-ffffffff82dfb000 R ral_cardbus_ca
-ffffffff82dfb030 r ral_cardbus_devices
-ffffffff82dfc000 R acx_cardbus_ca
-ffffffff82dfc028 r acx_cardbus_devices
-ffffffff82dfd000 R pgt_cardbus_ca
-ffffffff82dfd028 R pgt_cardbus_devices
-ffffffff82dfe000 R ehci_cardbus_ca
-ffffffff82dff000 R ohci_cardbus_ca
-ffffffff82e00000 R uhci_cardbus_ca
-ffffffff82e01000 R malo_cardbus_ca
-ffffffff82e01028 r malo_cardbus_devices
-ffffffff82e02000 R bwi_cardbus_ca
-ffffffff82e02030 r bwi_cardbus_devices
-ffffffff82e03000 R pcmcia_ca
-ffffffff82e04000 r pcmcia_parse_cis_tuple.init_cfe
-ffffffff82e05000 r pcmcia_cis_quirks
-ffffffff82e06000 R ep_pcmcia_ca
-ffffffff82e07000 R ne_pcmcia_ca
-ffffffff82e07030 R ne2000devs
-ffffffff82e09000 R aic_pcmcia_ca
-ffffffff82e0a000 R com_pcmcia_ca
-ffffffff82e0b000 R wdc_pcmcia_ca
-ffffffff82e0c000 R sm_pcmcia_ca
-ffffffff82e0d000 R xe_pcmcia_ca
-ffffffff82e0e000 R wi_pcmcia_ca
-ffffffff82e0e030 r wi_pcmcia_products
-ffffffff82e0f000 R malo_pcmcia_ca
-ffffffff82e10000 R an_pcmcia_ca
-ffffffff82e11000 R pcib_ca
-ffffffff82e12000 R amdpcib_ca
-ffffffff82e12028 R amdpcib_devices
-ffffffff82e13000 R tcpcib_ca
-ffffffff82e13028 R tcpcib_devices
-ffffffff82e14000 R aapic_ca
-ffffffff82e15000 R hme_pci_ca
-ffffffff82e15028 r hme_promhdr
-ffffffff82e1502a r hme_promdat
-ffffffff82e16000 R isa_ca
-ffffffff82e17000 R isadma_ca
-ffffffff82e18000 R fdc_ca
-ffffffff82e19000 R fd_ca
-ffffffff82e1a000 R com_isa_ca
-ffffffff82e1b000 R pckbc_isa_ca
-ffffffff82e1c000 R vga_isa_ca
-ffffffff82e1d000 R wdc_isa_ca
-ffffffff82e1e000 R mpu_midi_hw_if
-ffffffff82e1f000 R mpu_isa_ca
-ffffffff82e20000 R pcppi_ca
-ffffffff82e21000 R spkr_ca
-ffffffff82e21030 r pitchtab
-ffffffff82e22000 R lpt_isa_ca
-ffffffff82e23000 R wbsio_ca
-ffffffff82e24000 R schsio_ca
-ffffffff82e25000 R lm_isa_ca
-ffffffff82e25028 R lm_wbsio_ca
-ffffffff82e26000 R it_sensors
-ffffffff82e26110 R it_vrfact
-ffffffff82e26140 R it_fan_regs
-ffffffff82e26160 R it_fan_ext_regs
-ffffffff82e26178 R it_ca
-ffffffff82e27000 R abitkv_sensors
-ffffffff82e27200 R abitaa_sensors
-ffffffff82e27480 R abitav_sensors
-ffffffff82e27700 R abitas_sensors
-ffffffff82e27980 R abitax_sensors
-ffffffff82e27bc0 R abitm4_sensors
-ffffffff82e27e80 R abitan_sensors
-ffffffff82e28120 R abital_sensors
-ffffffff82e283a0 R abitaw_sensors
-ffffffff82e28700 R abitni_sensors
-ffffffff82e289a0 R abitat_sensors
-ffffffff82e28cc0 R abitan2_sensors
-ffffffff82e28f60 R abitab_sensors
-ffffffff82e29220 R abitan3_sensors
-ffffffff82e29500 R abitaw2_sensors
-ffffffff82e29860 R abitat2_sensors
-ffffffff82e29b60 R abitab2_sensors
-ffffffff82e29ea0 R abitin_sensors
-ffffffff82e2a1e0 R uguru_ca
-ffffffff82e2b000 R aps_ca
-ffffffff82e2c000 R wsdisplay_emul_ca
-ffffffff82e2c030 r charClass
-ffffffff82e2d000 r usl_syncops
-ffffffff82e2e000 R wsevent_filtops
-ffffffff82e2f000 R wskbd_ca
-ffffffff82e30000 r latin1_to_upper
-ffffffff82e31000 R wsmouse_ca
-ffffffff82e32000 R cyrillic_to_koi8
-ffffffff82e32060 R unicode_to_latin2
-ffffffff82e320e0 R unicode_to_latin7
-ffffffff82e33000 R wsemul_vt100_ops
-ffffffff82e34000 r decspcgr2uni
-ffffffff82e34100 r dectech2uni
-ffffffff82e34200 r nrctable
-ffffffff82e35000 r vt100_fkeys
-ffffffff82e350c0 r vt100_pfkeys
-ffffffff82e350e0 r vt100_numpad
-ffffffff82e36000 R pckbd_ca
-ffffffff82e36028 R pckbd_accessops
-ffffffff82e36040 R pckbd_consops
-ffffffff82e36060 R pckbd_keymapdata
-ffffffff82e36070 R pckbd_xtbl2
-ffffffff82e36100 R pckbd_xtbl2_ext
-ffffffff82e37000 r pckbd_keydesc_us
-ffffffff82e37250 r pckbd_keydesc_de
-ffffffff82e372f0 r pckbd_keydesc_de_nodead
-ffffffff82e37310 r pckbd_keydesc_fr
-ffffffff82e373d0 r pckbd_keydesc_fr_dvorak_bepo
-ffffffff82e37510 r pckbd_keydesc_dk
-ffffffff82e375a0 r pckbd_keydesc_dk_nodead
-ffffffff82e375b0 r pckbd_keydesc_it
-ffffffff82e37640 r pckbd_keydesc_uk
-ffffffff82e376e0 r pckbd_keydesc_jp
-ffffffff82e37750 r pckbd_keydesc_sv
-ffffffff82e37780 r pckbd_keydesc_sv_nodead
-ffffffff82e37790 r pckbd_keydesc_no
-ffffffff82e377c0 r pckbd_keydesc_no_nodead
-ffffffff82e377d0 r pckbd_keydesc_us_declk
-ffffffff82e37860 r pckbd_keydesc_us_dvorak
-ffffffff82e37900 r pckbd_keydesc_us_colemak
-ffffffff82e37948 r pckbd_keydesc_swapctrlcaps
-ffffffff82e37960 r pckbd_keydesc_iopener
-ffffffff82e379b0 r pckbd_keydesc_es
-ffffffff82e37a50 r pckbd_keydesc_be
-ffffffff82e37b10 r pckbd_keydesc_ru
-ffffffff82e37c80 r pckbd_keydesc_ua
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-ffffffff82e37ec0 r pckbd_keydesc_sg_nodead
-ffffffff82e37ee0 r pckbd_keydesc_sf
-ffffffff82e37f00 r pckbd_keydesc_pt
-ffffffff82e37f90 r pckbd_keydesc_lt
-ffffffff82e38070 r pckbd_keydesc_la
-ffffffff82e38100 r pckbd_keydesc_br
-ffffffff82e38180 r pckbd_keydesc_tr
-ffffffff82e38230 r pckbd_keydesc_tr_nodead
-ffffffff82e38250 r pckbd_keydesc_pl
-ffffffff82e382b0 r pckbd_keydesc_hu
-ffffffff82e383c0 r pckbd_keydesc_si
-ffffffff82e384d0 r pckbd_keydesc_cf
-ffffffff82e385a0 r pckbd_keydesc_cf_nodead
-ffffffff82e385c0 r pckbd_keydesc_lv
-ffffffff82e38640 r pckbd_keydesc_nl
-ffffffff82e38720 r pckbd_keydesc_nl_nodead
-ffffffff82e38740 r pckbd_keydesc_is
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-ffffffff82e387e0 r pckbd_keydesc_ee
-ffffffff82e38890 r pckbd_keydesc_ee_nodead
-ffffffff82e388b0 R pckbd_keydesctab
-ffffffff82e39000 R pms_ca
-ffffffff82e39028 R pms_accessops
-ffffffff82e39040 R pms_sec_accessops
-ffffffff82e39060 R pms_protocols
-ffffffff82e391e0 r alps_models
-ffffffff82e3a000 R skgpio_led_offset
-ffffffff82e3a008 R skgpio_ca
-ffffffff82e3b000 R hidkbd_trtab
-ffffffff82e3b100 r apple_fn_trans
-ffffffff82e3b120 r apple_tb_trans
-ffffffff82e3b140 r apple_mba_trans
-ffffffff82e3c000 r hidcc_attach_wskbd.accessops
-ffffffff82e3c020 r hidcc_keysyms
-ffffffff82e3d000 R usb_ca
-ffffffff82e3e000 R usb_known_products
-ffffffff82e49f90 R usb_known_vendors
-ffffffff82e4c7b0 R usbd_error_strs
-ffffffff82e4d000 R usb_quirks
-ffffffff82e4d390 R usb_dev_quirks
-ffffffff82e4d398 R usbd_no_quirk
-ffffffff82e4e000 R uhub_ca
-ffffffff82e4e028 R uhub_uhub_ca
-ffffffff82e4f000 R uaudio_ca
-ffffffff82e4f028 R uaudio_hw_if
-ffffffff82e4f0e0 R uaudio_rates
-ffffffff82e4f120 r uaudio_clkname.names
-ffffffff82e4f140 r uaudio_feature_addent.features
-ffffffff82e50000 R uvideo_ca
-ffffffff82e50028 R uvideo_hw_if
-ffffffff82e50100 R uvideo_devs
-ffffffff82e51000 r utvfu_select_norm.pal
-ffffffff82e51040 r utvfu_select_norm.ntsc
-ffffffff82e51080 r utvfu_setup_capture.setup
-ffffffff82e51180 r utvfu_audio_start_chip.setup
-ffffffff82e511c8 r utvfu_audio_stop_chip.setup
-ffffffff82e511d8 R utvfu_ca
-ffffffff82e51200 R utvfu_vid_hw_if
-ffffffff82e512d0 R utvfu_au_hw_if
-ffffffff82e52000 R udl_ca
-ffffffff82e52030 r udl_devs
-ffffffff82e520b0 r udl_modes
-ffffffff82e53000 R umidi_hw_if
-ffffffff82e53030 R umidi_ca
-ffffffff82e53060 r umidi_evlen
-ffffffff82e53080 r packet_length
-ffffffff82e54000 r quirk_name
-ffffffff82e55000 R ucom_ca
-ffffffff82e56000 R ugen_ca
-ffffffff82e56028 R ugenread_intr_filtops
-ffffffff82e56058 R ugenread_isoc_filtops
-ffffffff82e57000 R uhidev_ca
-ffffffff82e57030 r uhid_graphire_report_descr
-ffffffff82e570b0 r uhid_graphire3_4x5_report_descr
-ffffffff82e57160 r uhid_xb360gp_report_descr
-ffffffff82e57210 r uhid_xbonegp_report_descr
-ffffffff82e58000 R uhid_ca
-ffffffff82e58028 R uhidread_filtops
-ffffffff82e59000 R fido_ca
-ffffffff82e5a000 R ujoy_ca
-ffffffff82e5b000 r ukbd_keydesc_us
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-ffffffff82e5b370 r ukbd_keydesc_fr
-ffffffff82e5b430 r ukbd_keydesc_fr_apple
-ffffffff82e5b570 r ukbd_keydesc_fr_dvorak_bepo
-ffffffff82e5b6b0 r ukbd_keydesc_dk
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-ffffffff82e5b960 r ukbd_keydesc_no
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-ffffffff82e5ba40 r ukbd_keydesc_us_colemak
-ffffffff82e5ba88 r ukbd_keydesc_swapctrlcaps
-ffffffff82e5baa0 r ukbd_keydesc_iopener
-ffffffff82e5baf0 r ukbd_keydesc_es
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-ffffffff82e5c040 r ukbd_keydesc_sf
-ffffffff82e5c060 r ukbd_keydesc_pt
-ffffffff82e5c0f0 r ukbd_keydesc_pt_apple
-ffffffff82e5c110 r ukbd_keydesc_lt
-ffffffff82e5c1f0 r ukbd_keydesc_la
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-ffffffff82e5c400 r ukbd_keydesc_pl
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-ffffffff82e5c690 r ukbd_keydesc_cf
-ffffffff82e5c770 r ukbd_keydesc_cf_nodead
-ffffffff82e5c790 r ukbd_keydesc_lv
-ffffffff82e5c810 r ukbd_keydesc_nl
-ffffffff82e5c8f0 r ukbd_keydesc_nl_nodead
-ffffffff82e5c910 r ukbd_keydesc_is
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-ffffffff82e5c9b0 r ukbd_keydesc_ee
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-ffffffff82e5ca80 R ukbd_keydesctab
-ffffffff82e5d000 R ukbd_countrylayout
-ffffffff82e5d090 R ukbd_consops
-ffffffff82e5d0b0 R ukbd_accessops
-ffffffff82e5d0c8 R ukbd_ca
-ffffffff82e5d0f0 R ukbd_never_console
-ffffffff82e5e000 R ums_accessops
-ffffffff82e5e018 R ums_ca
-ffffffff82e5f000 R umt_accessops
-ffffffff82e5f018 R umt_ca
-ffffffff82e60000 R uts_devs
-ffffffff82e60010 R uts_accessops
-ffffffff82e60028 R uts_ca
-ffffffff82e61000 R ubcmtp_accessops
-ffffffff82e61018 R ubcmtp_ca
-ffffffff82e61040 r ubcmtp_devices
-ffffffff82e62000 R ucycom_methods
-ffffffff82e62040 R ucycom_devs
-ffffffff82e62050 R ucycom_ca
-ffffffff82e63000 R uslhcom_methods
-ffffffff82e63040 R uslhcom_ca
-ffffffff82e63068 r uslhcom_devs
-ffffffff82e64000 R ulpt_ca
-ffffffff82e65000 R umass_ca
-ffffffff82e65028 R umass_bbb_methods
-ffffffff82e65040 R umass_cbi_methods
-ffffffff82e66000 R umass_quirks
-ffffffff82e67000 R umass_scsi_switch
-ffffffff82e68000 R uthum_devs
-ffffffff82e68008 R uthum_ca
-ffffffff82e68030 r uthum_sensor_type_s
-ffffffff82e69000 R ugold_devs
-ffffffff82e69018 R ugold_ca
-ffffffff82e6a000 R utrh_devs
-ffffffff82e6a008 R utrh_ca
-ffffffff82e6b000 R uoakrh_devs
-ffffffff82e6b008 R uoakrh_ca
-ffffffff82e6b030 R uoakrh_methods
-ffffffff82e6c000 R uoaklux_devs
-ffffffff82e6c008 R uoaklux_ca
-ffffffff82e6c030 R uoaklux_methods
-ffffffff82e6d000 R uoakv_devs
-ffffffff82e6d008 R uoakv_ca
-ffffffff82e6d030 R uoakv_methods
-ffffffff82e6e000 R uonerng_ca
-ffffffff82e6f000 R urng_ca
-ffffffff82e6f030 r urng_devs
-ffffffff82e70000 R udcf_ca
-ffffffff82e70028 r udcf_devs
-ffffffff82e71000 R umbg_ca
-ffffffff82e72000 R uvisor_methods
-ffffffff82e72040 R uvisor_ca
-ffffffff82e72070 r uvisor_devs
-ffffffff82e73000 R udsbr_hw_if
-ffffffff82e73028 R udsbr_ca
-ffffffff82e74000 R utwitch_devs
-ffffffff82e74008 R utwitch_ca
-ffffffff82e75000 R aue_devs
-ffffffff82e751b0 R aue_ca
-ffffffff82e76000 R axe_devs
-ffffffff82e760d0 R axe_ca
-ffffffff82e77000 R axen_devs
-ffffffff82e77020 R axen_ca
-ffffffff82e78000 R smsc_ca
-ffffffff82e78030 r smsc_devs
-ffffffff82e79000 R cue_ca
-ffffffff82e7a000 R kue_devs
-ffffffff82e7a088 R kue_ca
-ffffffff82e7b000 R cdce_devs
-ffffffff82e7b048 R cdce_ca
-ffffffff82e7c000 R urndis_ca
-ffffffff82e7c030 R urndis_class
-ffffffff82e7d000 R mos_devs
-ffffffff82e7d018 R mos_ca
-ffffffff82e7e000 R mue_devs
-ffffffff82e7e020 R mue_ca
-ffffffff82e7f000 R udav_ca
-ffffffff82e7f030 r udav_devs
-ffffffff82e80000 R upl_ca
-ffffffff82e81000 R ugl_ca
-ffffffff82e82000 R url_ca
-ffffffff82e82030 r url_devs
-ffffffff82e83000 R ure_devs
-ffffffff82e830e8 R ure_ca
-ffffffff82e84000 R uaq_devs
-ffffffff82e84018 R uaq_ca
-ffffffff82e85000 R umodem_methods
-ffffffff82e85040 R umodem_ca
-ffffffff82e86000 R uftdi_methods
-ffffffff82e86040 R uftdi_ca
-ffffffff82e86070 r uftdi_devs
-ffffffff82e87000 R uplcom_methods
-ffffffff82e87040 R uplcom_ca
-ffffffff82e87070 r uplcom_devs
-ffffffff82e88000 R umct_methods
-ffffffff82e88040 R umct_ca
-ffffffff82e88070 r umct_devs
-ffffffff82e89000 R uvscom_methods
-ffffffff82e89040 R uvscom_ca
-ffffffff82e89070 r uvscom_devs
-ffffffff82e8a000 R ubsa_methods
-ffffffff82e8a040 R ubsa_devs
-ffffffff82e8a060 R ubsa_ca
-ffffffff82e8b000 R ukspan_ca
-ffffffff82e8b028 r ukspan_devs
-ffffffff82e8b030 r ukspan_methods
-ffffffff82e8c000 R uslcom_methods
-ffffffff82e8c040 R uslcom_ca
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-ffffffff83306000 D mtdphy_cd
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-ffffffff8330a000 D ukphy_cd
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-ffffffff8330d000 D brgphy_cd
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-ffffffff8331e000 D uk_cd
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-ffffffff83322020 D rdac_devices
-ffffffff83323000 D emc_cd
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-ffffffff83324000 D hds_cd
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-ffffffff83325000 D atapiscsi_cd
-ffffffff83326000 D wd_cd
-ffffffff83326020 d wddumpmulti
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-ffffffff83327020 D mba_iba
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-ffffffff8332e040 D cpu_info
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-ffffffff83333000 D pvclock_cd
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-ffffffff83334000 D vmt_tclo_rpc
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-ffffffff8333b000 D hvs_cd
-ffffffff8333c000 D virtio_cd
-ffffffff8333d000 D vio_cd
-ffffffff8333e000 D vioblk_cd
-ffffffff8333f000 D viomb_cd
-ffffffff83340000 D viornd_cd
-ffffffff83341000 D vioscsi_cd
-ffffffff83342000 D vmmci_cd
-ffffffff83343000 D pci_cd
-ffffffff83344000 D arc_fw_hdr
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-ffffffff83347000 D ips_cd
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-ffffffff8334b000 D azalia_cd
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-ffffffff83363000 D myx_cd
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-ffffffff83365000 D dc_devs
-ffffffff83366000 D cas_cd
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-ffffffff8336a1b0 d pccbb_funcs
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-ffffffff8336b000 D skc_cd
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-ffffffff8336c020 D msk_cd
-ffffffff8336d000 D puc_cd
-ffffffff8336e000 D puc_ndevs
-ffffffff8336f000 D iwi_cd
-ffffffff83370000 D wpi_cd
-ffffffff83371000 D iwn_cd
-ffffffff83372000 D iwm_cd
-ffffffff83373000 D iwx_cd
-ffffffff83374000 d .compoundliteral
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-ffffffff83376000 D iha_cd
-ffffffff83377000 D pcscp_cd
-ffffffff83377020 D pcscp_glue
-ffffffff83378000 D bge_cd
-ffffffff83379000 D bnx_firmwares
-ffffffff83379160 D bnx_rv2ps
-ffffffff833791c0 D bnx_cd
-ffffffff833791e0 d flash_5709
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-ffffffff8337a000 D vge_cd
-ffffffff8337b000 D stge_cd
-ffffffff8337c000 D nfe_cd
-ffffffff8337d000 D et_cd
-ffffffff8337e000 D jme_cd
-ffffffff8337f000 D age_cd
-ffffffff83380000 D alc_dma_burst
-ffffffff83380020 D alc_cd
-ffffffff83381000 D ale_cd
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-ffffffff83383000 D bce_cd
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-ffffffff83385000 d ral_rt2560_opns
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-ffffffff83386000 D piixpm_cd
-ffffffff83387000 D vic_cd
-ffffffff83388000 D vmx_cd
-ffffffff83389000 D vmwpvs_cd
-ffffffff8338a000 D lii_cd
-ffffffff8338b000 D ichiic_cd
-ffffffff8338c000 D viapm_cd
-ffffffff8338c020 d viapm_timecounter
-ffffffff8338d000 D amdiic_cd
-ffffffff8338e000 D nviic_cd
-ffffffff8338f000 D kate_cd
-ffffffff83390000 D km_cd
-ffffffff83391000 D cpu_model_offsets
-ffffffff83391070 D ksmn_cd
-ffffffff83392000 D itherm_cd
-ffffffff83393000 D pchtemp_cd
-ffffffff83394000 D xspd_cd
-ffffffff83395000 D virtio_pci_ops
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-ffffffff83397000 D bnxt_cd
-ffffffff83398000 D mcx_cd
-ffffffff83399000 D iavf_cd
-ffffffff8339a000 D rge_cd
-ffffffff8339b000 D igc_cd
-ffffffff8339c000 D ngbe_cd
-ffffffff8339d000 D agp_cd
-ffffffff8339e000 D intagp_cd
-ffffffff8339e020 D agp_i810_methods
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-ffffffff833a0000 d bridge_lock
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-ffffffff833a4018 d dma_fence_stub_mtx
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-ffffffff833b2000 D intel_graphics_stolen_res
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-ffffffff833b4000 d evergreen_cs_packet_parse_vline.vline_start_end
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-ffffffff833b7700 d rv515_asic
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-ffffffff833b8280 d rs780_asic
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-ffffffff833b8840 d evergreen_asic
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+ffffffff82e15000 R tcpcib_ca
+ffffffff82e15028 R tcpcib_devices
+ffffffff82e16000 R aapic_ca
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+ffffffff82e18000 R isa_ca
+ffffffff82e19000 R isadma_ca
+ffffffff82e1a000 R fdc_ca
+ffffffff82e1b000 R fd_ca
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+ffffffff82e1d000 R pckbc_isa_ca
+ffffffff82e1e000 R vga_isa_ca
+ffffffff82e1f000 R wdc_isa_ca
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+ffffffff82e21000 R mpu_isa_ca
+ffffffff82e22000 R pcppi_ca
+ffffffff82e23000 R spkr_ca
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+ffffffff82e24000 R lpt_isa_ca
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+ffffffff82e26000 R schsio_ca
+ffffffff82e27000 R lm_isa_ca
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+ffffffff82e28000 R it_sensors
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+ffffffff82e28140 R it_fan_regs
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+ffffffff82e29980 R abitax_sensors
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+ffffffff82e29e80 R abitan_sensors
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+ffffffff82e2a700 R abitni_sensors
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+ffffffff82e2acc0 R abitan2_sensors
+ffffffff82e2af60 R abitab_sensors
+ffffffff82e2b220 R abitan3_sensors
+ffffffff82e2b500 R abitaw2_sensors
+ffffffff82e2b860 R abitat2_sensors
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+ffffffff82e2bea0 R abitin_sensors
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+ffffffff82e34060 R unicode_to_latin2
+ffffffff82e340e0 R unicode_to_latin7
+ffffffff82e35000 R wsemul_vt100_ops
+ffffffff82e36000 r decspcgr2uni
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+ffffffff82e3b000 R pms_ca
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+ffffffff82e3b060 R pms_protocols
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+ffffffff82e3c000 R skgpio_led_offset
+ffffffff82e3c008 R skgpio_ca
+ffffffff82e3d000 R hidkbd_trtab
+ffffffff82e3d100 r apple_fn_trans
+ffffffff82e3d120 r apple_tb_trans
+ffffffff82e3d140 r apple_mba_trans
+ffffffff82e3e000 r hidcc_attach_wskbd.accessops
+ffffffff82e3e020 r hidcc_keysyms
+ffffffff82e3f000 R usb_ca
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+ffffffff82e4f000 R usb_quirks
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+ffffffff82e4f398 R usbd_no_quirk
+ffffffff82e50000 R uhub_ca
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+ffffffff82e53180 r utvfu_audio_start_chip.setup
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+ffffffff82e532d0 R utvfu_au_hw_if
+ffffffff82e54000 R udl_ca
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+ffffffff82e59000 R uhidev_ca
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+ffffffff82e590b0 r uhid_graphire3_4x5_report_descr
+ffffffff82e59160 r uhid_xb360gp_report_descr
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+ffffffff82e5b000 R fido_ca
+ffffffff82e5c000 R ujoy_ca
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+ffffffff82e5f000 R ukbd_countrylayout
+ffffffff82e5f090 R ukbd_consops
+ffffffff82e5f0b0 R ukbd_accessops
+ffffffff82e5f0c8 R ukbd_ca
+ffffffff82e5f0f0 R ukbd_never_console
+ffffffff82e60000 R ums_accessops
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+ffffffff82e62028 R uts_ca
+ffffffff82e63000 R ubcmtp_accessops
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+ffffffff82e64040 R ucycom_devs
+ffffffff82e64050 R ucycom_ca
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+ffffffff82e65040 R uslhcom_ca
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+ffffffff82e69000 R umass_scsi_switch
+ffffffff82e6a000 R uthum_devs
+ffffffff82e6a008 R uthum_ca
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+ffffffff82e6d000 R uoakrh_devs
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+ffffffff82e6e000 R uoaklux_devs
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+ffffffff82e6f000 R uoakv_devs
+ffffffff82e6f008 R uoakv_ca
+ffffffff82e6f030 R uoakv_methods
+ffffffff82e70000 R uonerng_ca
+ffffffff82e71000 R urng_ca
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+ffffffff82e74040 R uvisor_ca
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+ffffffff82e75000 R udsbr_hw_if
+ffffffff82e75028 R udsbr_ca
+ffffffff82e76000 R utwitch_devs
+ffffffff82e76008 R utwitch_ca
+ffffffff82e77000 R aue_devs
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+ffffffff82e78000 R axe_devs
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+ffffffff82e7e000 R urndis_ca
+ffffffff82e7e030 R urndis_class
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+ffffffff82e81000 R udav_ca
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+ffffffff82e82000 R upl_ca
+ffffffff82e83000 R ugl_ca
+ffffffff82e84000 R url_ca
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+ffffffff82e85000 R ure_devs
+ffffffff82e850e8 R ure_ca
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+ffffffff82e87000 R umodem_methods
+ffffffff82e87040 R umodem_ca
+ffffffff82e88000 R uftdi_methods
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+ffffffff82e89000 R uplcom_methods
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+ffffffff82e8b000 R uvscom_methods
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+ffffffff82e8e000 R uslcom_methods
+ffffffff82e8e040 R uslcom_ca
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+ffffffff82e8f000 R uark_methods
+ffffffff82e8f040 R uark_ca
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+ffffffff82e90000 R moscom_methods
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+ffffffff82e93000 R ucrcom_methods
+ffffffff82e93040 R ucrcom_ca
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+ffffffff82e94040 R uxrcom_ca
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+ffffffff82e97000 R uchcom_methods
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+ffffffff82e9a000 R atu_ca
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+ffffffff82e9e0e0 r rt2870_def_mac
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+ffffffff82e9f070 r rt2860_rates
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+ffffffff82e9f1a0 r mt7601_def_bbp
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+ffffffff82ea0000 R zyd_ca
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+ffffffff82ea2000 R upgt_ca
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+ffffffff82ea2030 r upgt_devs_2
+ffffffff82ea3000 R urtw_ca
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+ffffffff82ea4000 R urtwn_ca
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+ffffffff82ea4340 r rtl8188eu_mac
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-ffffffff83482000 D ugen_cd
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-ffffffff83484000 D uhid_cd
-ffffffff83485000 D fido_cd
-ffffffff83486000 D ujoy_cd
-ffffffff83487000 D ukbd_cd
-ffffffff83488000 D ums_cd
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-ffffffff83489000 D umt_cd
-ffffffff8348a000 D def_scale
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-ffffffff8348b000 D ubcmtp_cd
-ffffffff8348b020 d ubcmtp_wsmousecfg
-ffffffff8348c000 D ucycom_cd
-ffffffff8348d000 D uslhcom_cd
-ffffffff8348e000 D ulpt_fwdevs
-ffffffff8348e060 D ulpt_cd
-ffffffff8348e080 D ulptusein
-ffffffff8348f000 D umass_cd
-ffffffff8348f020 d umass_bbb_transfer.dCBWtag
-ffffffff83490000 D uthum_cd
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-ffffffff83492000 D utrh_cd
-ffffffff83493000 D uoakrh_cd
-ffffffff83494000 D uoaklux_cd
-ffffffff83495000 D uoakv_cd
-ffffffff83496000 D uonerng_cd
-ffffffff83497000 D urng_cd
-ffffffff83498000 D udcf_cd
-ffffffff83499000 D umbg_cd
-ffffffff8349a000 D uvisor_cd
-ffffffff8349b000 D udsbr_cd
-ffffffff8349c000 D utwitch_cd
-ffffffff8349d000 D aue_cd
-ffffffff8349e000 D axe_cd
-ffffffff8349f000 D axen_cd
-ffffffff834a0000 D smsc_cd
-ffffffff834a1000 D cue_devs
-ffffffff834a1010 D cue_cd
-ffffffff834a2000 D kue_cd
-ffffffff834a3000 D cdce_cd
-ffffffff834a4000 D urndis_cd
-ffffffff834a5000 D mos_cd
-ffffffff834a6000 D mue_cd
-ffffffff834a7000 D udav_cd
-ffffffff834a8000 D upl_devs
-ffffffff834a8008 D upl_cd
-ffffffff834a9000 D ugl_devs
-ffffffff834a9008 D ugl_cd
-ffffffff834aa000 D url_cd
-ffffffff834ab000 D ure_cd
-ffffffff834ac000 D uaq_cd
-ffffffff834ad000 D umodem_cd
-ffffffff834ae000 D uftdi_cd
-ffffffff834af000 D uplcom_cd
-ffffffff834b0000 D umct_cd
-ffffffff834b1000 D uvscom_cd
-ffffffff834b2000 D ubsa_cd
-ffffffff834b3000 D ukspan_cd
-ffffffff834b4000 D uslcom_cd
-ffffffff834b5000 D uark_cd
-ffffffff834b6000 D moscom_cd
-ffffffff834b7000 D umcs_cd
-ffffffff834b8000 D uscom_cd
-ffffffff834b9000 D ucrcom_cd
-ffffffff834ba000 D uxrcom_cd
-ffffffff834bb000 D uipaq_cd
-ffffffff834bc000 D umsm_cd
-ffffffff834bd000 D uchcom_cd
-ffffffff834be000 D uticom_cd
-ffffffff834bf000 D wi_func_usb
-ffffffff834bf060 D wi_usb_cd
-ffffffff834c0000 D atu_cd
-ffffffff834c0020 D atu_devs
-ffffffff834c0270 D atu_radfirm
-ffffffff834c1000 D ural_cd
-ffffffff834c2000 D rum_cd
-ffffffff834c3000 D run_cd
-ffffffff834c3020 D rt3070_freqs
-ffffffff834c4000 D mtw_cd
-ffffffff834c5000 D zyd_cd
-ffffffff834c6000 D upgt_cd
-ffffffff834c7000 D urtw_cd
-ffffffff834c8000 D urtwn_cd
-ffffffff834c9000 D rsu_cd
-ffffffff834ca000 D otus_cd
-ffffffff834ca020 d AR_PLCP_HDR_INTR
-ffffffff834cb000 D umb_xfer_tout
-ffffffff834cb010 D umb_uuid_basic_connect
-ffffffff834cb020 D umb_uuid_context_internet
-ffffffff834cb030 D umb_uuid_qmi_mbim
-ffffffff834cb040 D umb_cd
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-ffffffff834cb070 D umb_qmi_alloc_cid
-ffffffff834cb080 D umb_qmi_fcc_auth
-ffffffff834cc000 D uath_cd
-ffffffff834cd000 D uow_cd
-ffffffff834ce000 D uberry_cd
-ffffffff834cf000 D upd_cd
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+ffffffff83555da8 B pf_tcp_secret_init
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+ffffffff83555ea0 B pf_queues
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