--- 7.4/2024-03-01T07:17:08Z/2024-02-12T00:00:00Z/nm-bsd-ot14.txt Sat Mar 2 22:22:40 2024 +++ 7.4/2024-03-01T07:17:08Z/2024-02-13T00:00:00Z/nm-bsd-ot14.txt Sun Mar 3 01:13:20 2024 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -025f0000 T __kernel_kutext_phys -025f4000 C __kernel_cptext_phys -025f5000 C __kernel_rodata_phys -02ee5000 R __kernel_kutext_page_phys -02ee7000 C __kernel_randomdata_phys -031a3000 R __kernel_data_phys -034f9000 D __kernel_kudata_phys -034fa000 C __kernel_bss_phys +025ef000 T __kernel_kutext_phys +025f3000 C __kernel_cptext_phys +025f4000 C __kernel_rodata_phys +02ee4000 R __kernel_kutext_page_phys +02ee6000 C __kernel_randomdata_phys +031a2000 R __kernel_data_phys +034f8000 D __kernel_kudata_phys +034f9000 C __kernel_bss_phys 03a00000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -5532,25460 +5532,25472 @@ ffffffff81295db0 T bufq_simple_nscan ffffffff81295e80 T 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-ffffffff81406b90 T ieee80211_input_ba_gap_timeout -ffffffff81406cb0 T ieee80211_enqueue_data -ffffffff81406e90 T ieee80211_amsdu_decap_validate -ffffffff81406f50 T ieee80211_parse_edca_params_body -ffffffff814070b0 T ieee80211_parse_edca_params -ffffffff81407100 T ieee80211_parse_wmm_params -ffffffff81407150 T ieee80211_parse_rsn_cipher -ffffffff81407200 T ieee80211_parse_rsn_akm -ffffffff814072b0 T ieee80211_parse_rsn_body -ffffffff81407530 T ieee80211_parse_rsn -ffffffff81407580 T ieee80211_parse_wpa -ffffffff814075e0 T ieee80211_save_ie -ffffffff814076a0 T ieee80211_recv_probe_resp -ffffffff814083e0 T ieee80211_recv_probe_req -ffffffff814086a0 T ieee80211_recv_auth -ffffffff81408740 T ieee80211_recv_assoc_req -ffffffff814090c0 T ieee80211_recv_assoc_resp -ffffffff81409640 T ieee80211_recv_deauth -ffffffff814097b0 T ieee80211_recv_disassoc -ffffffff814098c0 T ieee80211_recv_addba_req -ffffffff81409c60 T ieee80211_addba_req_refuse -ffffffff81409d00 T ieee80211_addba_req_accept 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-ffffffff8140d840 T ieee80211_add_ess -ffffffff8140deb0 T ieee80211_ess_adjust_rssi -ffffffff8140df20 T ieee80211_ess_calculate_score -ffffffff8140e080 T ieee80211_ess_is_better -ffffffff8140e1d0 T ieee80211_match_ess -ffffffff8140e2c0 T ieee80211_switch_ess -ffffffff8140e530 T ieee80211_set_ess -ffffffff8140e800 T ieee80211_deselect_ess -ffffffff8140e860 T ieee80211_node_attach -ffffffff8140ea40 T ieee80211_node_alloc -ffffffff8140ea60 T ieee80211_node_free -ffffffff8140eb10 T ieee80211_node_copy -ffffffff8140ecc0 T ieee80211_node_getrssi -ffffffff8140ecf0 T ieee80211_node_checkrssi -ffffffff8140ed80 T ieee80211_set_tim -ffffffff8140edf0 T ieee80211_alloc_node_helper -ffffffff8140ee70 T ieee80211_node_lateattach -ffffffff8140ef30 T ieee80211_node_detach -ffffffff8140f0b0 T ieee80211_free_allnodes -ffffffff8140f1d0 T ieee80211_reset_scan -ffffffff8140f260 T ieee80211_node_raise_inact -ffffffff8140f2a0 T ieee80211_begin_scan -ffffffff8140f450 T ieee80211_node_cleanup -ffffffff8140f500 T ieee80211_iterate_nodes -ffffffff8140f590 T ieee80211_next_scan -ffffffff8140f6c0 T ieee80211_end_scan -ffffffff8140fc20 T ieee80211_create_ibss -ffffffff814100f0 T ieee80211_match_bss -ffffffff81410510 T ieee80211_node_free_unref_cb -ffffffff81410580 T ieee80211_node_tx_stopped -ffffffff81410690 T ieee80211_node_switch_bss -ffffffff81410960 T ieee80211_node_tx_flushed -ffffffff81410ae0 T ieee80211_find_node -ffffffff81410b80 T ieee80211_node_join_bss -ffffffff81410d70 T ieee80211_choose_rsnparams -ffffffff81410ea0 T ieee80211_node_choose_bss -ffffffff81411090 T ieee80211_free_node -ffffffff81411180 T ieee80211_node_cmp -ffffffff814111a0 T ieee80211_clean_inactive_nodes -ffffffff81411260 T ieee80211_get_rate -ffffffff814112c0 T ieee80211_ba_del -ffffffff814113b0 T ieee80211_node_set_timeouts -ffffffff814114b0 T ieee80211_node_addba_request_ac_be_to -ffffffff814114d0 T ieee80211_node_addba_request_ac_bk_to -ffffffff81411500 T ieee80211_node_addba_request_ac_vi_to -ffffffff81411530 T ieee80211_node_addba_request_ac_vo_to -ffffffff81411560 T ieee80211_setup_node -ffffffff814116f0 T ieee80211_alloc_node -ffffffff81411790 T ieee80211_dup_bss -ffffffff81411860 T ieee80211_find_txnode -ffffffff81411a70 T ieee80211_find_rxnode -ffffffff81411d80 T ieee80211_node_tx_ba_clear -ffffffff81411df0 T ieee80211_release_node -ffffffff81411e80 T ieee80211_clean_cached -ffffffff81411f10 T ieee80211_node_leave -ffffffff81412160 T ieee80211_setup_htcaps -ffffffff81412210 T ieee80211_clear_htcaps -ffffffff81412290 T ieee80211_40mhz_valid_secondary_above -ffffffff81412320 T ieee80211_40mhz_valid_secondary_below -ffffffff814123a0 T ieee80211_40mhz_center_freq_valid -ffffffff81412400 T ieee80211_setup_htop -ffffffff814124e0 T ieee80211_setup_vhtcaps -ffffffff81412560 T ieee80211_80mhz_center_freq_valid -ffffffff814125d0 T ieee80211_setup_vhtop -ffffffff814126d0 T ieee80211_clear_vhtcaps -ffffffff81412720 T ieee80211_setup_rates -ffffffff814127f0 T ieee80211_node_trigger_addba_req -ffffffff81412850 T ieee80211_node_addba_request -ffffffff81412880 T ieee80211_iserp_sta -ffffffff81412a40 T ieee80211_needs_auth -ffffffff81412a70 T ieee80211_node_join_ht -ffffffff81412ac0 T ieee80211_node_join_rsn -ffffffff81412bd0 T ieee80211_count_longslotsta -ffffffff81412c20 T ieee80211_count_nonerpsta -ffffffff81412c80 T ieee80211_count_pssta -ffffffff81412cd0 T ieee80211_count_rekeysta -ffffffff81412d20 T ieee80211_node_join_11g -ffffffff81412eb0 T ieee80211_node_join -ffffffff814131a0 T ieee80211_node_leave_ht -ffffffff814132c0 T ieee80211_node_leave_vht -ffffffff81413310 T ieee80211_node_leave_rsn -ffffffff81413440 T ieee80211_node_leave_11g -ffffffff81413620 T ieee80211_node_leave_pwrsave -ffffffff814137e0 T ieee80211_ibss_merge -ffffffff81413ae0 T ieee80211_notify_dtim -ffffffff81413bc0 T ieee80211_ess_cmp -ffffffff81413be0 t ieee80211_tree_RBT_COMPARE -ffffffff81413c00 t ieee80211_ess_tree_RBT_COMPARE -ffffffff81414000 T ieee80211_output -ffffffff814140f0 T ieee80211_action_name -ffffffff81414140 T ieee80211_mgmt_output -ffffffff814143a0 T ieee80211_pwrsave -ffffffff814144d0 T ieee80211_up_to_ac -ffffffff81414590 T ieee80211_classify -ffffffff81414680 T ieee80211_can_use_ampdu -ffffffff814146e0 T ieee80211_tx_compressed_bar -ffffffff81414820 T ieee80211_get_compressed_bar -ffffffff81414900 T ieee80211_encap -ffffffff81414d80 T ieee80211_add_capinfo -ffffffff81414e10 T ieee80211_add_ssid -ffffffff81414e70 T ieee80211_add_rates -ffffffff81414ee0 T ieee80211_add_ds_params -ffffffff81414f40 T ieee80211_add_tim -ffffffff81415080 T ieee80211_add_ibss_params -ffffffff814150b0 T ieee80211_add_edca_params -ffffffff81415240 T ieee80211_add_erp -ffffffff814152e0 T ieee80211_add_qos_capability -ffffffff81415320 T ieee80211_add_wme_info -ffffffff81415360 T ieee80211_add_wme_param -ffffffff81415500 T ieee80211_add_rsn_body -ffffffff81415810 T ieee80211_add_rsn -ffffffff81415870 T ieee80211_add_wpa -ffffffff814158e0 T ieee80211_add_xrates -ffffffff81415970 T ieee80211_add_htcaps -ffffffff81415a50 T ieee80211_add_htop -ffffffff81415b20 T ieee80211_add_vhtcaps -ffffffff81415bd0 T ieee80211_add_tie -ffffffff81415c20 T ieee80211_getmgmt -ffffffff81415ce0 T ieee80211_get_probe_req -ffffffff814160e0 T ieee80211_get_probe_resp -ffffffff81416690 T ieee80211_get_auth -ffffffff81416720 T ieee80211_get_deauth -ffffffff814167a0 T ieee80211_get_assoc_req -ffffffff81416c90 T ieee80211_get_assoc_resp -ffffffff81417080 T ieee80211_get_disassoc -ffffffff81417100 T ieee80211_get_addba_req -ffffffff81417200 T ieee80211_output_ba_move_window -ffffffff81417300 T ieee80211_output_ba_move_window_to_first_unacked -ffffffff814174d0 T ieee80211_output_ba_record_ack -ffffffff81417600 T ieee80211_get_addba_resp -ffffffff81417700 T ieee80211_get_delba -ffffffff814177a0 T ieee80211_get_sa_query -ffffffff81417830 T ieee80211_get_action -ffffffff81417ac0 T ieee80211_send_mgmt -ffffffff81417e40 T ieee80211_get_rts -ffffffff81417ed0 T ieee80211_get_cts_to_self -ffffffff81417f60 T ieee80211_beacon_alloc -ffffffff81419000 T ieee80211_eapol_key_input -ffffffff81419210 T ieee80211_recv_eapol_key_req -ffffffff81419360 T ieee80211_recv_4way_msg3 -ffffffff81419cf0 T ieee80211_recv_4way_msg2or4 -ffffffff81419e30 T ieee80211_recv_4way_msg1 -ffffffff8141a110 T ieee80211_recv_wpa_group_msg1 -ffffffff8141a410 T ieee80211_recv_rsn_group_msg1 -ffffffff8141a920 T ieee80211_recv_group_msg2 -ffffffff8141aa70 T ieee80211_recv_4way_msg2 -ffffffff8141ac70 T ieee80211_must_update_group_key -ffffffff8141acd0 T ieee80211_recv_4way_msg4 -ffffffff8141b000 T ieee80211_send_eapol_key -ffffffff8141b1f0 T ieee80211_eapol_timeout -ffffffff8141b270 T ieee80211_send_4way_msg1 -ffffffff8141b530 T ieee80211_send_4way_msg3 -ffffffff8141ba80 T ieee80211_send_group_msg1 -ffffffff8141bfa0 T ieee80211_add_gtk_kde -ffffffff8141c060 T ieee80211_add_pmkid_kde -ffffffff8141c0b0 T ieee80211_add_igtk_kde -ffffffff8141c180 T ieee80211_get_eapol_key -ffffffff8141c240 T ieee80211_send_4way_msg2 -ffffffff8141c460 T ieee80211_send_4way_msg4 -ffffffff8141c650 T ieee80211_send_group_msg2 -ffffffff8141c830 T ieee80211_send_eapol_key_req -ffffffff8141d000 T ieee80211_proto_attach -ffffffff8141d0b0 T ieee80211_newstate -ffffffff8141dd90 T ieee80211_proto_detach -ffffffff8141ddd0 T ieee80211_print_essid -ffffffff8141df50 T ieee80211_fix_rate -ffffffff8141e250 T ieee80211_reset_erp -ffffffff8141e370 T ieee80211_set_shortslottime -ffffffff8141e3d0 T ieee80211_keyrun -ffffffff8141e540 T ieee80211_setkeys -ffffffff8141e780 t ieee80211_node_gtk_rekey -ffffffff8141e7e0 T ieee80211_setkeysdone -ffffffff8141e8e0 T ieee80211_gtk_rekey_timeout -ffffffff8141e930 T ieee80211_sa_query_timeout -ffffffff8141ea00 T ieee80211_sa_query_request -ffffffff8141ea80 T ieee80211_ht_negotiate -ffffffff8141ec50 T ieee80211_vht_negotiate -ffffffff8141ee70 T ieee80211_tx_ba_timeout -ffffffff8141ef90 T ieee80211_delba_request -ffffffff8141f100 T ieee80211_rx_ba_timeout -ffffffff8141f190 T ieee80211_addba_request -ffffffff8141f360 T ieee80211_auth_open_confirm -ffffffff8141f410 T ieee80211_try_another_bss -ffffffff8141f520 T ieee80211_auth_open -ffffffff8141f820 T ieee80211_set_beacon_miss_threshold -ffffffff8141f8b0 T ieee80211_stop_ampdu_tx -ffffffff8141f9c0 T ieee80211_check_wpa_supplicant_failure -ffffffff8141fa40 T ieee80211_set_link_state -ffffffff8141fad0 T ieee80211_rtm_80211info_task -ffffffff81420000 T ieee80211_ra_get_ht_rateset -ffffffff81420080 T ieee80211_ra_use_ht_sgi -ffffffff81420100 T ieee80211_ra_get_txrate -ffffffff81420190 T ieee80211_ra_next_lower_intra_rate -ffffffff81420320 T ieee80211_ra_next_intra_rate -ffffffff814204a0 T ieee80211_ra_next_rateset -ffffffff814206b0 T ieee80211_ra_best_mcs_in_rateset -ffffffff81420730 T ieee80211_ra_probe_next_rateset -ffffffff814209e0 T ieee80211_ra_next_mcs -ffffffff81420a30 T ieee80211_ra_probe_clear -ffffffff81420a70 T ieee80211_ra_probe_done -ffffffff81420ab0 T ieee80211_ra_intra_mode_ra_finished -ffffffff81420e20 T ieee80211_ra_trigger_next_rateset -ffffffff81420e90 T ieee80211_ra_inter_mode_ra_finished -ffffffff81420ec0 T ieee80211_ra_best_rate -ffffffff81420f60 T ieee80211_ra_probe_next_rate -ffffffff81421000 T ieee80211_ra_valid_tx_mcs -ffffffff81421080 T ieee80211_ra_valid_rates -ffffffff81421150 T ieee80211_ra_probe_valid -ffffffff814211a0 T ieee80211_ra_add_stats_ht -ffffffff81421430 T ieee80211_ra_choose -ffffffff81421860 T ieee80211_ra_node_init -ffffffff81422000 T ieee80211_ra_vht_get_rateset -ffffffff814220a0 T ieee80211_ra_vht_use_sgi -ffffffff81422190 T ieee80211_ra_vht_get_txrate -ffffffff81422230 T ieee80211_ra_vht_next_lower_intra_rate -ffffffff81422270 T ieee80211_ra_vht_get_max_mcs -ffffffff814222f0 T ieee80211_ra_vht_next_intra_rate -ffffffff814223e0 T ieee80211_ra_vht_next_rateset -ffffffff814225e0 T ieee80211_ra_vht_best_mcs_in_rateset -ffffffff81422680 T ieee80211_ra_vht_probe_next_rateset -ffffffff81422a10 T ieee80211_ra_vht_next_mcs -ffffffff81422aa0 T ieee80211_ra_vht_probe_clear -ffffffff81422ad0 T ieee80211_ra_vht_probe_done -ffffffff81422b20 T ieee80211_ra_vht_intra_mode_ra_finished -ffffffff81422fc0 T ieee80211_ra_vht_trigger_next_rateset -ffffffff81423030 T ieee80211_ra_vht_inter_mode_ra_finished -ffffffff81423060 T ieee80211_ra_vht_best_rate -ffffffff814233d0 T ieee80211_ra_vht_probe_next_rate -ffffffff81423480 T ieee80211_ra_vht_init_valid_rates -ffffffff81423670 T ieee80211_ra_vht_probe_valid -ffffffff814236c0 T ieee80211_ra_vht_add_stats -ffffffff81423b10 T ieee80211_ra_vht_choose -ffffffff81423fe0 T ieee80211_ra_vht_node_init -ffffffff81425000 T ieee80211_rssadapt_choose -ffffffff814250e0 T ieee80211_rssadapt_updatestats -ffffffff81425170 T ieee80211_rssadapt_input -ffffffff814251b0 T ieee80211_rssadapt_lower_rate -ffffffff81425230 T ieee80211_rssadapt_raise_rate -ffffffff81426000 T bsearch -ffffffff814260b0 T ieee80211_regdomain_compare_cn -ffffffff814260d0 T ieee80211_regdomain_compare_rn -ffffffff814260f0 T ieee80211_name2countrycode -ffffffff81426190 T ieee80211_name2regdomain -ffffffff81426230 T ieee80211_countrycode2name -ffffffff814262c0 T ieee80211_regdomain2name -ffffffff81426340 T ieee80211_regdomain2flag -ffffffff81426400 T ieee80211_countrycode2regdomain -ffffffff81427000 T arptimer -ffffffff81427080 T arptfree -ffffffff81427170 T arpinit -ffffffff814271f0 T arp_rtrequest -ffffffff81427630 T arprequest -ffffffff81427770 T arpinvalidate -ffffffff814277d0 T arpreply -ffffffff814278c0 T arpresolve -ffffffff81427d30 T arppullup -ffffffff81427df0 T arpinput -ffffffff81427e50 T arpintr -ffffffff81427f00 T in_arpinput -ffffffff81428320 T arplookup -ffffffff81428410 T arpcache -ffffffff81428790 T arpproxy -ffffffff81428870 T revarpinput -ffffffff814288c0 T in_revarpinput -ffffffff81428980 T revarprequest -ffffffff81428ac0 T revarpwhoarewe -ffffffff81428cb0 T revarpwhoami -ffffffff81429000 T igmp_init -ffffffff81429090 T rti_fill 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in_pcbref -ffffffff8142ed30 T in_setsockaddr -ffffffff8142eda0 T in_setpeeraddr -ffffffff8142ee10 T in_sockaddr -ffffffff8142ee90 T in_peeraddr -ffffffff8142ef10 T in_pcbnotifyall -ffffffff8142f070 T in_losing -ffffffff8142f100 T in_rtchange -ffffffff8142f150 T in_pcbrtentry -ffffffff8142f1f0 T in_pcbhash_lookup -ffffffff8142f360 T in_pcblookup -ffffffff8142f3b0 T in_pcblookup_listen -ffffffff8142f5e0 T in_pcbset_rtableid -ffffffff8142f6d0 T in_pcbset_laddr -ffffffff8142f810 T in_pcbunset_faddr -ffffffff8142f8d0 T in_pcbunset_laddr -ffffffff81430000 T inet_nat64_mask -ffffffff81430050 T inet_nat64 -ffffffff814301f0 T inet_nat64_inet -ffffffff814302b0 T inet_nat64_inet6 -ffffffff81430390 T inet_nat46 -ffffffff81430430 T inet_nat46_inet -ffffffff81430490 T inet_nat46_inet6 -ffffffff81431000 T inet_ntop -ffffffff814310c0 t inet_ntop6 -ffffffff81431620 T sockaddr_ntop -ffffffff81432000 T divert_attach -ffffffff81432090 T divert_detach -ffffffff814320e0 T divert_lock -ffffffff81432140 T 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drm_mode_object_get -ffffffff81964560 T drm_object_attach_property -ffffffff81964670 T drm_object_property_set_value -ffffffff81964750 T drm_object_property_get_value -ffffffff819647e0 t __drm_object_property_get_value -ffffffff819648c0 T drm_object_property_get_default_value -ffffffff81964990 T drm_mode_object_get_properties -ffffffff81964ad0 T drm_mode_obj_get_properties_ioctl -ffffffff81964d20 T drm_mode_obj_find_prop_id -ffffffff81964d80 T drm_mode_obj_set_property_ioctl -ffffffff81966000 T drm_mode_debug_printmodeline -ffffffff81966140 T drm_mode_vrefresh -ffffffff819661e0 T drm_mode_create -ffffffff81966200 T drm_mode_destroy -ffffffff81966240 T drm_mode_probed_add -ffffffff819662e0 T drm_analog_tv_mode -ffffffff81966b80 T drm_cvt_mode -ffffffff81967000 T drm_mode_set_name -ffffffff81967050 T drm_gtf_mode_complex -ffffffff81967350 T drm_gtf_mode -ffffffff819673a0 T drm_mode_get_hv_timing -ffffffff819673f0 T drm_mode_init -ffffffff819674c0 T drm_mode_set_crtcinfo -ffffffff81967680 T drm_mode_copy -ffffffff819676e0 T drm_mode_duplicate -ffffffff81967760 T drm_mode_match -ffffffff81967900 T drm_mode_equal -ffffffff81967920 T drm_mode_equal_no_clocks -ffffffff81967940 T drm_mode_equal_no_clocks_no_stereo -ffffffff81967a00 T drm_mode_validate_driver -ffffffff81967af0 T drm_mode_validate_size -ffffffff81967b40 T drm_mode_validate_ycbcr420 -ffffffff81967bb0 T drm_mode_is_420_only -ffffffff81967c00 T drm_get_mode_status_name -ffffffff81967c80 T drm_mode_prune_invalid -ffffffff81967f10 T drm_mode_sort -ffffffff81967f40 t drm_mode_compare -ffffffff819680e0 T drm_connector_list_update -ffffffff819682b0 T drm_mode_parse_command_line_for_connector -ffffffff819682e0 T drm_mode_create_from_cmdline_mode -ffffffff819684a0 T drm_mode_convert_to_umode -ffffffff81968640 T drm_mode_convert_umode -ffffffff81968860 T drm_mode_is_420_also -ffffffff819688b0 T drm_mode_is_420 -ffffffff81969000 T drm_helper_move_panel_connectors_to_head -ffffffff819690f0 T drm_helper_mode_fill_fb_struct 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drm_mode_getplane_res -ffffffff81970e60 T drm_mode_getplane -ffffffff81970fb0 T drm_plane_check_pixel_format -ffffffff81971070 T drm_any_plane_has_format -ffffffff819711a0 T drm_mode_setplane -ffffffff81971490 T drm_mode_cursor_ioctl -ffffffff81971500 t drm_mode_cursor_common -ffffffff81971a40 T drm_mode_cursor2_ioctl -ffffffff81971a60 T drm_mode_page_flip_ioctl -ffffffff81971fe0 T drm_plane_enable_fb_damage_clips -ffffffff81972000 T drm_plane_get_damage_clips_count -ffffffff81972040 T __drm_plane_get_damage_clips -ffffffff81972080 T drm_plane_get_damage_clips -ffffffff81972120 T drm_create_scaling_filter_prop -ffffffff81972270 T drm_plane_create_scaling_filter_property -ffffffff819722e0 t kvasprintf -ffffffff81972380 t kasprintf -ffffffff81972450 t create_in_format_blob -ffffffff81972640 t __setplane_atomic -ffffffff819727e0 t __setplane_internal -ffffffff819729f0 t __setplane_check -ffffffff81973000 T drm_plane_helper_update_primary -ffffffff819734c0 t get_connectors_for_crtc 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drm_helper_probe_detect -ffffffff819764a0 T drm_helper_probe_single_connector_modes -ffffffff81976a20 t __drm_helper_update_and_validate -ffffffff81976dd0 T drm_kms_helper_hotplug_event -ffffffff81976e10 T drm_kms_helper_connector_hotplug_event -ffffffff81976e50 T drm_kms_helper_is_poll_worker -ffffffff81976e80 T drm_kms_helper_poll_disable -ffffffff81976f50 T drm_kms_helper_poll_init -ffffffff81976fb0 t output_poll_execute -ffffffff81977200 T drm_kms_helper_poll_fini -ffffffff81977250 T drm_connector_helper_hpd_irq_event -ffffffff81977310 t check_connector_changed -ffffffff819774e0 T drm_helper_hpd_irq_event -ffffffff81977630 T drm_crtc_helper_mode_valid_fixed -ffffffff81977680 T drm_connector_helper_get_modes_from_ddc -ffffffff81977710 T drm_connector_helper_get_modes_fixed -ffffffff81977880 T drm_connector_helper_get_modes -ffffffff819778f0 T drm_connector_helper_tv_get_modes -ffffffff81977b30 t __delayed_work_tick -ffffffff81978000 T drm_property_create -ffffffff819781f0 T drm_property_create_enum -ffffffff819782a0 T drm_property_add_enum -ffffffff819784a0 T drm_property_destroy -ffffffff81978550 T drm_property_create_bitmask -ffffffff81978680 T drm_property_create_range -ffffffff819786f0 T drm_property_create_signed_range -ffffffff81978760 T drm_property_create_object -ffffffff81978800 T drm_property_create_bool -ffffffff81978860 T drm_mode_getproperty_ioctl -ffffffff81978ab0 T drm_property_create_blob -ffffffff81978bf0 t drm_property_free_blob -ffffffff81978c70 T drm_property_blob_put -ffffffff81978cb0 T drm_property_destroy_user_blobs -ffffffff81978d30 T drm_property_blob_get -ffffffff81978d70 T drm_property_lookup_blob -ffffffff81978d90 T drm_property_replace_global_blob -ffffffff81978ee0 T drm_property_replace_blob -ffffffff81978f50 T drm_mode_getblob_ioctl -ffffffff81979010 T drm_mode_createblob_ioctl -ffffffff81979110 T drm_mode_destroyblob_ioctl -ffffffff81979210 T drm_property_change_valid_get -ffffffff81979470 T drm_property_change_valid_put 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syncobj_eventfd_entry_func -ffffffff8197e320 T drm_syncobj_replace_fence -ffffffff8197e3d0 T drm_syncobj_find_fence -ffffffff8197e720 t drm_syncobj_fence_add_wait -ffffffff8197e7f0 T drm_syncobj_free -ffffffff8197e870 T drm_syncobj_create -ffffffff8197ea40 T drm_syncobj_get_handle -ffffffff8197eb60 T drm_syncobj_get_fd -ffffffff8197ebb0 T drm_syncobj_open -ffffffff8197ebe0 T drm_syncobj_release -ffffffff8197ec20 t drm_syncobj_release_handle -ffffffff8197ece0 T drm_syncobj_create_ioctl -ffffffff8197ee10 T drm_syncobj_destroy_ioctl -ffffffff8197ef50 T drm_syncobj_handle_to_fd_ioctl -ffffffff8197f140 T drm_syncobj_fd_to_handle_ioctl -ffffffff8197f2f0 T drm_syncobj_transfer_ioctl -ffffffff8197f6d0 T drm_timeout_abs_to_jiffies -ffffffff8197f7a0 T drm_syncobj_wait_ioctl -ffffffff8197f920 t drm_syncobj_array_find -ffffffff8197fb40 t drm_syncobj_array_free -ffffffff8197fc30 T drm_syncobj_timeline_wait_ioctl -ffffffff8197fdb0 T drm_syncobj_eventfd_ioctl -ffffffff8197fde0 T drm_syncobj_reset_ioctl -ffffffff8197fec0 T drm_syncobj_signal_ioctl -ffffffff81980020 T drm_syncobj_timeline_signal_ioctl -ffffffff81980260 T drm_syncobj_query_ioctl -ffffffff81980470 t drm_syncobj_array_wait_timeout -ffffffff819808d0 t syncobj_wait_fence_func -ffffffff819808f0 t syncobj_eventfd_entry_fence_func -ffffffff81981000 T drm_vblank_count -ffffffff81981090 T drm_crtc_accurate_vblank_count -ffffffff819811a0 t drm_update_vblank_count -ffffffff819815e0 T drm_vblank_disable_and_save -ffffffff81981730 T drm_vblank_init -ffffffff819818b0 t vblank_disable_fn -ffffffff81981930 t drm_vblank_init_release -ffffffff819819c0 T drm_dev_has_vblank -ffffffff819819f0 T drm_crtc_vblank_waitqueue -ffffffff81981a40 T drm_calc_timestamping_constants -ffffffff81981c60 T drm_crtc_vblank_helper_get_vblank_timestamp_internal -ffffffff819821b0 T drm_crtc_vblank_helper_get_vblank_timestamp -ffffffff819821d0 T drm_crtc_vblank_count -ffffffff81982260 T drm_crtc_vblank_count_and_time -ffffffff81982320 t drm_vblank_count_and_time -ffffffff819823d0 T drm_crtc_next_vblank_start -ffffffff81982520 T drm_crtc_arm_vblank_event -ffffffff81982600 T drm_crtc_send_vblank_event -ffffffff819827b0 t send_vblank_event -ffffffff81982860 T drm_vblank_get -ffffffff81982960 t drm_vblank_enable -ffffffff81982b60 T drm_crtc_vblank_get -ffffffff81982c60 T drm_vblank_put -ffffffff81982d90 T drm_crtc_vblank_put -ffffffff81982db0 T drm_wait_one_vblank -ffffffff819832a0 T drm_crtc_wait_one_vblank -ffffffff819832c0 T drm_crtc_vblank_off -ffffffff819836b0 T drm_crtc_vblank_reset -ffffffff819837e0 T drm_crtc_set_max_vblank_count -ffffffff819838c0 T drm_crtc_vblank_on -ffffffff81983a10 t drm_reset_vblank_timestamp -ffffffff81983bf0 T drm_crtc_vblank_restore -ffffffff81983fd0 T drm_legacy_modeset_ctl_ioctl -ffffffff819841f0 T drm_wait_vblank_ioctl -ffffffff81984740 t drm_wait_vblank_reply -ffffffff81984850 t drm_queue_vblank_event -ffffffff81984b90 T drm_handle_vblank -ffffffff81984e80 t drm_handle_vblank_events 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hdmi_avi_infoframe_check -ffffffff819880c0 T hdmi_avi_infoframe_pack_only -ffffffff819882c0 T hdmi_avi_infoframe_pack -ffffffff81988320 T hdmi_spd_infoframe_init -ffffffff819883e0 T hdmi_spd_infoframe_check -ffffffff81988430 T hdmi_spd_infoframe_pack_only -ffffffff81988570 T hdmi_spd_infoframe_pack -ffffffff819886d0 T hdmi_audio_infoframe_init -ffffffff81988720 T hdmi_audio_infoframe_check -ffffffff81988770 T hdmi_audio_infoframe_pack_only -ffffffff819888d0 T hdmi_audio_infoframe_pack -ffffffff81988920 T hdmi_audio_infoframe_pack_for_dp -ffffffff81988a10 T hdmi_vendor_infoframe_init -ffffffff81988a70 T hdmi_vendor_infoframe_check -ffffffff81988b10 T hdmi_vendor_infoframe_pack_only -ffffffff81988cd0 T hdmi_vendor_infoframe_pack -ffffffff81988d70 T hdmi_drm_infoframe_init -ffffffff81988dd0 T hdmi_drm_infoframe_check -ffffffff81988e20 T hdmi_drm_infoframe_pack_only -ffffffff81989010 T hdmi_drm_infoframe_pack -ffffffff81989060 T hdmi_infoframe_check -ffffffff819891b0 T hdmi_infoframe_pack_only -ffffffff819893d0 T hdmi_infoframe_pack -ffffffff81989540 T hdmi_infoframe_log -ffffffff8198a430 T hdmi_drm_infoframe_unpack_only -ffffffff8198a510 T hdmi_infoframe_unpack -ffffffff8198b000 T list_sort -ffffffff8198c000 T radix_tree_lookup -ffffffff8198c0b0 T radix_tree_iter_find -ffffffff8198c180 T radix_tree_delete -ffffffff8198c310 T radix_tree_iter_delete -ffffffff8198c330 T radix_tree_insert -ffffffff8198d000 T sort -ffffffff8198d040 t qsort -ffffffff8198f000 T drm_dp_dual_mode_read -ffffffff8198f110 T drm_dp_dual_mode_write -ffffffff8198f1f0 T drm_dp_dual_mode_detect -ffffffff8198f490 T drm_dp_dual_mode_max_tmds_clock -ffffffff8198f5b0 T drm_dp_dual_mode_get_tmds_output -ffffffff8198f6d0 T drm_dp_dual_mode_set_tmds_output -ffffffff8198f950 T drm_dp_get_dual_mode_type_name -ffffffff8198f9c0 T drm_lspcon_get_mode -ffffffff8198fbe0 T drm_lspcon_set_mode -ffffffff81990000 T drm_dp_channel_eq_ok -ffffffff81990080 T drm_dp_clock_recovery_ok -ffffffff819900f0 T drm_dp_get_adjust_request_voltage -ffffffff81990130 T drm_dp_get_adjust_request_pre_emphasis -ffffffff81990180 T drm_dp_get_adjust_tx_ffe_preset -ffffffff819901c0 T drm_dp_128b132b_lane_channel_eq_done -ffffffff81990240 T drm_dp_128b132b_lane_symbol_locked -ffffffff819902b0 T drm_dp_128b132b_eq_interlane_align_done -ffffffff819902e0 T drm_dp_128b132b_cds_interlane_align_done -ffffffff81990310 T drm_dp_128b132b_link_training_failed -ffffffff81990340 T drm_dp_read_clock_recovery_delay -ffffffff81990450 T drm_dp_read_channel_eq_delay -ffffffff81990550 T drm_dp_128b132b_read_aux_rd_interval -ffffffff81990600 T drm_dp_link_train_clock_recovery_delay -ffffffff81990690 t __8b10b_clock_recovery_delay_us -ffffffff81990710 T drm_dp_link_train_channel_eq_delay -ffffffff81990780 T drm_dp_phy_name -ffffffff819907c0 T drm_dp_lttpr_link_train_clock_recovery_delay -ffffffff819907e0 T drm_dp_lttpr_link_train_channel_eq_delay -ffffffff81990850 T drm_dp_link_rate_to_bw_code -ffffffff819908c0 T drm_dp_bw_code_to_link_rate -ffffffff81990920 T drm_dp_dpcd_probe -ffffffff81990a60 t drm_dp_dpcd_access -ffffffff81990b90 T drm_dp_dpcd_read -ffffffff81990cc0 T drm_dp_dpcd_write -ffffffff81990dd0 T drm_dp_dpcd_read_link_status -ffffffff81990df0 T drm_dp_dpcd_read_phy_link_status -ffffffff81990ef0 T drm_dp_downstream_is_type -ffffffff81990f40 T drm_dp_downstream_is_tmds -ffffffff81990fb0 T drm_dp_send_real_edid_checksum -ffffffff81991200 T drm_dp_read_dpcd_caps -ffffffff81991390 T drm_dp_read_downstream_info -ffffffff81991490 T drm_dp_downstream_max_dotclock -ffffffff819914e0 T drm_dp_downstream_max_tmds_clock -ffffffff81991580 T drm_dp_downstream_min_tmds_clock -ffffffff81991600 T drm_dp_downstream_max_bpc -ffffffff819916a0 T drm_dp_downstream_420_passthrough -ffffffff81991700 T drm_dp_downstream_444_to_420_conversion -ffffffff81991760 T drm_dp_downstream_rgb_to_ycbcr_conversion -ffffffff819917c0 T drm_dp_downstream_mode -ffffffff81991850 T drm_dp_downstream_id -ffffffff81991870 T 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gfx_v8_0_ring_emit_pipeline_sync -ffffffff81e313c0 t gfx_v8_0_ring_emit_vm_flush -ffffffff81e31770 t gfx_v8_0_ring_emit_hdp_flush -ffffffff81e31a90 t gfx_v8_0_ring_emit_gds_switch -ffffffff81e32240 t gfx_v8_0_ring_test_ib -ffffffff81e323f0 t gfx_v8_0_ring_emit_init_cond_exec -ffffffff81e32620 t gfx_v8_0_ring_emit_patch_cond_exec -ffffffff81e326d0 t gfx_v8_ring_emit_sb -ffffffff81e327c0 t gfx_v8_ring_emit_cntxcntl -ffffffff81e32d60 t gfx_v8_0_ring_soft_recovery -ffffffff81e32d90 t gfx_v8_0_emit_mem_sync -ffffffff81e32f90 t gfx_v8_0_ring_emit_ib_compute -ffffffff81e33290 t gfx_v8_0_ring_emit_fence_compute -ffffffff81e33590 t gfx_v8_0_emit_mem_sync_compute -ffffffff81e33850 t gfx_v8_0_emit_wave_limit -ffffffff81e33a00 t gfx_v8_0_set_eop_interrupt_state -ffffffff81e33c10 t gfx_v8_0_eop_irq -ffffffff81e33d20 t gfx_v8_0_set_priv_reg_fault_state -ffffffff81e33da0 t gfx_v8_0_priv_reg_irq -ffffffff81e33ea0 t gfx_v8_0_set_priv_inst_fault_state -ffffffff81e33f20 t gfx_v8_0_priv_inst_irq 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gfx_v9_0_ring_soft_recovery -ffffffff81e45220 t gfx_v9_0_ring_preempt_ib -ffffffff81e453e0 t gfx_v9_0_emit_mem_sync -ffffffff81e456a0 t gfx_v9_0_write_data_to_reg -ffffffff81e458b0 t gfx_v9_0_ring_test_ib -ffffffff81e45a60 t gfx_v9_0_ring_patch_cntl -ffffffff81e45aa0 t gfx_v9_0_ring_patch_ce_meta -ffffffff81e45ba0 t gfx_v9_0_ring_patch_de_meta -ffffffff81e45c70 t gfx_v9_0_ring_emit_ib_compute -ffffffff81e45fa0 t gfx_v9_0_emit_wave_limit -ffffffff81e46180 t gfx_v9_0_set_eop_interrupt_state -ffffffff81e46360 t gfx_v9_0_eop_irq -ffffffff81e464a0 t gfx_v9_0_set_compute_eop_interrupt_state -ffffffff81e46660 t gfx_v9_0_set_priv_reg_fault_state -ffffffff81e467a0 t gfx_v9_0_priv_reg_irq -ffffffff81e468a0 t gfx_v9_0_set_priv_inst_fault_state -ffffffff81e469e0 t gfx_v9_0_priv_inst_irq -ffffffff81e46ae0 t gfx_v9_0_set_cp_ecc_error_state -ffffffff81e47370 t gfx_v9_0_is_rlc_enabled -ffffffff81e47400 t gfx_v9_0_set_safe_mode -ffffffff81e47560 t gfx_v9_0_unset_safe_mode -ffffffff81e475d0 t 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gfx_v9_0_update_medium_grain_clock_gating -ffffffff81e4bf60 t gfx_v9_0_update_3d_clock_gating -ffffffff81e4c350 t gfx_v9_0_update_coarse_grain_clock_gating -ffffffff81e4d000 t gfx_v9_4_query_ras_error_count -ffffffff81e4de00 t gfx_v9_4_query_ras_error_status -ffffffff81e4dfd0 t gfx_v9_4_reset_ras_error_count -ffffffff81e4f000 T gfx_v9_4_2_do_edc_gpr_workarounds -ffffffff81e4f720 T gfx_v9_4_2_init_golden_registers -ffffffff81e4f7b0 T gfx_v9_4_2_debug_trap_config_init -ffffffff81e4f890 T gfx_v9_4_2_set_power_brake_sequence -ffffffff81e4fa70 t gfx_v9_4_2_query_ras_error_count -ffffffff81e4fb20 t gfx_v9_4_2_query_ras_error_status -ffffffff81e50380 t gfx_v9_4_2_reset_ras_error_count -ffffffff81e503e0 t gfx_v9_4_2_reset_ras_error_status -ffffffff81e508b0 t gfx_v9_4_2_enable_watchdog_timer -ffffffff81e50ad0 t gfx_v9_4_2_query_uctl2_poison_status -ffffffff81e50b50 t gfx_v9_4_2_run_shader -ffffffff81e50f50 t gfx_v9_4_2_wait_for_waves_assigned -ffffffff81e515a0 t gfx_v9_4_2_query_sram_edc_count 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noise_remote_decrypt +ffffffff813f7000 T cookie_maker_init +ffffffff813f7110 T cookie_checker_init +ffffffff813f7250 t ratelimit_deinit +ffffffff813f7310 T cookie_checker_update +ffffffff813f7470 T cookie_checker_deinit +ffffffff813f74a0 T cookie_checker_create_payload +ffffffff813f7570 t cookie_checker_make_cookie +ffffffff813f76f0 T cookie_maker_consume_payload +ffffffff813f77c0 T cookie_maker_mac +ffffffff813f7950 T cookie_checker_validate_macs +ffffffff813f7b20 t ratelimit_allow +ffffffff813f8000 T parity +ffffffff813f8050 T stoeplitz_random_seed +ffffffff813f80c0 T stoeplitz_init +ffffffff813f8240 T stoeplitz_cache_init +ffffffff813f8350 T stoeplitz_hash_ip4 +ffffffff813f83a0 T stoeplitz_hash_ip4port +ffffffff813f83f0 T stoeplitz_hash_ip6 +ffffffff813f8450 T stoeplitz_hash_ip6port +ffffffff813f84b0 T stoeplitz_hash_eaddr +ffffffff813f8500 T stoeplitz_to_key +ffffffff813f9000 T ieee80211_begin_bgscan +ffffffff813f90d0 T ieee80211_bgscan_timeout +ffffffff813f91a0 T ieee80211_channel_init +ffffffff813f9390 T ieee80211_chan2ieee +ffffffff813f9410 T ieee80211_ifattach +ffffffff813f95d0 T ieee80211_setbasicrates +ffffffff813f96c0 T ieee80211_setmode +ffffffff813f9970 T ieee80211_ifdetach +ffffffff813f99f0 T ieee80211_mhz2ieee +ffffffff813f9a80 T ieee80211_ieee2mhz +ffffffff813f9af0 T ieee80211_configure_ampdu_tx +ffffffff813f9b50 T ieee80211_media_init +ffffffff813fa550 T ieee80211_rate2media +ffffffff813fa910 T ieee80211_media_status +ffffffff813fab20 T ieee80211_findrate +ffffffff813fab90 T ieee80211_media_change +ffffffff813fb130 T ieee80211_media2mcs +ffffffff813fb190 T ieee80211_media2rate +ffffffff813fb1e0 T ieee80211_mcs2media +ffffffff813fb260 T ieee80211_watchdog +ffffffff813fb380 T ieee80211_min_basic_rate +ffffffff813fb480 T ieee80211_max_basic_rate +ffffffff813fb560 T ieee80211_next_mode +ffffffff813fb660 T ieee80211_chan2mode +ffffffff813fb6f0 T ieee80211_rate2plcp +ffffffff813fb7f0 T ieee80211_plcp2rate +ffffffff813fc000 T ieee80211_amrr_node_init +ffffffff813fc040 T ieee80211_amrr_choose +ffffffff813fd000 T ieee80211_crypto_attach +ffffffff813fd090 T ieee80211_set_key +ffffffff813fd130 T ieee80211_delete_key +ffffffff813fd1a0 T ieee80211_crypto_detach +ffffffff813fd260 T ieee80211_crypto_clear_groupkeys +ffffffff813fd3b0 T ieee80211_cipher_keylen +ffffffff813fd410 T ieee80211_get_txkey +ffffffff813fd490 T ieee80211_get_rxkey +ffffffff813fd570 T ieee80211_encrypt +ffffffff813fd5f0 T ieee80211_decrypt +ffffffff813fd760 T ieee80211_prf +ffffffff813fd880 T ieee80211_kdf +ffffffff813fd9e0 T ieee80211_derive_ptk +ffffffff813fdb50 T ieee80211_derive_pmkid +ffffffff813fdc70 T ieee80211_eapol_key_mic +ffffffff813fdda0 T ieee80211_eapol_key_check_mic +ffffffff813fde20 T ieee80211_eapol_key_encrypt +ffffffff813fdfd0 T ieee80211_eapol_key_decrypt +ffffffff813fe0e0 T ieee80211_pmksa_add +ffffffff813fe230 T ieee80211_pmksa_find +ffffffff813ff000 T ieee80211_bip_set_key +ffffffff813ff080 T ieee80211_bip_delete_key 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ieee80211_get_hdrlen +ffffffff81404090 T ieee80211_input_hwdecrypt +ffffffff81404270 T ieee80211_inputm +ffffffff81404d60 T ieee80211_input_ba +ffffffff81405040 T ieee80211_amsdu_decap +ffffffff814052d0 T ieee80211_decap +ffffffff81405470 T ieee80211_recv_pspoll +ffffffff81405580 T ieee80211_recv_bar +ffffffff81405660 T ieee80211_input +ffffffff814056d0 T ieee80211_ba_move_window +ffffffff81405820 T ieee80211_input_ba_seq +ffffffff814059c0 T ieee80211_input_ba_flush +ffffffff81405af0 T ieee80211_input_ba_gap_skip +ffffffff81405b90 T ieee80211_input_ba_gap_timeout +ffffffff81405cb0 T ieee80211_enqueue_data +ffffffff81405e90 T ieee80211_amsdu_decap_validate +ffffffff81405f50 T ieee80211_parse_edca_params_body +ffffffff814060b0 T ieee80211_parse_edca_params +ffffffff81406100 T ieee80211_parse_wmm_params +ffffffff81406150 T ieee80211_parse_rsn_cipher +ffffffff81406200 T ieee80211_parse_rsn_akm +ffffffff814062b0 T ieee80211_parse_rsn_body +ffffffff81406530 T ieee80211_parse_rsn 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ieee80211_req2node +ffffffff8140a480 T ieee80211_disable_wep +ffffffff8140a590 T ieee80211_disable_rsn +ffffffff8140a5f0 T ieee80211_ioctl +ffffffff8140ba70 t ieee80211_ioctl_setnwkeys +ffffffff8140bc50 t ieee80211_ioctl_setwpaparms +ffffffff8140c000 T ieee80211_inact_timeout +ffffffff8140c0a0 T ieee80211_node_cache_timeout +ffffffff8140c0e0 T ieee80211_clean_nodes +ffffffff8140c400 T ieee80211_print_ess +ffffffff8140c5f0 T ieee80211_print_ess_list +ffffffff8140c660 T ieee80211_get_ess +ffffffff8140c6f0 T ieee80211_del_ess +ffffffff8140c840 T ieee80211_add_ess +ffffffff8140ceb0 T ieee80211_ess_adjust_rssi +ffffffff8140cf20 T ieee80211_ess_calculate_score +ffffffff8140d080 T ieee80211_ess_is_better +ffffffff8140d1d0 T ieee80211_match_ess +ffffffff8140d2c0 T ieee80211_switch_ess +ffffffff8140d530 T ieee80211_set_ess +ffffffff8140d800 T ieee80211_deselect_ess +ffffffff8140d860 T ieee80211_node_attach +ffffffff8140da40 T ieee80211_node_alloc +ffffffff8140da60 T ieee80211_node_free +ffffffff8140db10 T ieee80211_node_copy +ffffffff8140dcc0 T ieee80211_node_getrssi +ffffffff8140dcf0 T ieee80211_node_checkrssi +ffffffff8140dd80 T ieee80211_set_tim +ffffffff8140ddf0 T ieee80211_alloc_node_helper +ffffffff8140de70 T ieee80211_node_lateattach +ffffffff8140df30 T ieee80211_node_detach +ffffffff8140e0b0 T ieee80211_free_allnodes +ffffffff8140e1d0 T ieee80211_reset_scan +ffffffff8140e260 T ieee80211_node_raise_inact +ffffffff8140e2a0 T ieee80211_begin_scan +ffffffff8140e450 T ieee80211_node_cleanup +ffffffff8140e500 T ieee80211_iterate_nodes +ffffffff8140e590 T ieee80211_next_scan +ffffffff8140e6c0 T ieee80211_end_scan +ffffffff8140ec20 T ieee80211_create_ibss +ffffffff8140f0f0 T ieee80211_match_bss +ffffffff8140f510 T ieee80211_node_free_unref_cb +ffffffff8140f580 T ieee80211_node_tx_stopped +ffffffff8140f690 T ieee80211_node_switch_bss +ffffffff8140f960 T ieee80211_node_tx_flushed +ffffffff8140fae0 T ieee80211_find_node +ffffffff8140fb80 T ieee80211_node_join_bss +ffffffff8140fd70 T ieee80211_choose_rsnparams +ffffffff8140fea0 T ieee80211_node_choose_bss +ffffffff81410090 T ieee80211_free_node +ffffffff81410180 T ieee80211_node_cmp +ffffffff814101a0 T ieee80211_clean_inactive_nodes +ffffffff81410260 T ieee80211_get_rate +ffffffff814102c0 T ieee80211_ba_del +ffffffff814103b0 T ieee80211_node_set_timeouts +ffffffff814104b0 T ieee80211_node_addba_request_ac_be_to +ffffffff814104d0 T ieee80211_node_addba_request_ac_bk_to +ffffffff81410500 T ieee80211_node_addba_request_ac_vi_to +ffffffff81410530 T ieee80211_node_addba_request_ac_vo_to +ffffffff81410560 T ieee80211_setup_node +ffffffff814106f0 T ieee80211_alloc_node +ffffffff81410790 T ieee80211_dup_bss +ffffffff81410860 T ieee80211_find_txnode +ffffffff81410a70 T ieee80211_find_rxnode +ffffffff81410d80 T ieee80211_node_tx_ba_clear +ffffffff81410df0 T ieee80211_release_node +ffffffff81410e80 T ieee80211_clean_cached +ffffffff81410f10 T ieee80211_node_leave +ffffffff81411160 T ieee80211_setup_htcaps +ffffffff81411210 T ieee80211_clear_htcaps +ffffffff81411290 T ieee80211_40mhz_valid_secondary_above +ffffffff81411320 T ieee80211_40mhz_valid_secondary_below +ffffffff814113a0 T ieee80211_40mhz_center_freq_valid +ffffffff81411400 T ieee80211_setup_htop +ffffffff814114e0 T ieee80211_setup_vhtcaps +ffffffff81411560 T ieee80211_80mhz_center_freq_valid +ffffffff814115d0 T ieee80211_setup_vhtop +ffffffff814116d0 T ieee80211_clear_vhtcaps +ffffffff81411720 T ieee80211_setup_rates +ffffffff814117f0 T ieee80211_node_trigger_addba_req +ffffffff81411850 T ieee80211_node_addba_request +ffffffff81411880 T ieee80211_iserp_sta +ffffffff81411a40 T ieee80211_needs_auth +ffffffff81411a70 T ieee80211_node_join_ht +ffffffff81411ac0 T ieee80211_node_join_rsn +ffffffff81411bd0 T ieee80211_count_longslotsta +ffffffff81411c20 T ieee80211_count_nonerpsta +ffffffff81411c80 T ieee80211_count_pssta +ffffffff81411cd0 T ieee80211_count_rekeysta +ffffffff81411d20 T ieee80211_node_join_11g +ffffffff81411eb0 T ieee80211_node_join +ffffffff814121a0 T ieee80211_node_leave_ht +ffffffff814122c0 T ieee80211_node_leave_vht +ffffffff81412310 T ieee80211_node_leave_rsn +ffffffff81412440 T ieee80211_node_leave_11g +ffffffff81412620 T ieee80211_node_leave_pwrsave +ffffffff814127e0 T ieee80211_ibss_merge +ffffffff81412ae0 T ieee80211_notify_dtim +ffffffff81412bc0 T ieee80211_ess_cmp +ffffffff81412be0 t ieee80211_tree_RBT_COMPARE +ffffffff81412c00 t ieee80211_ess_tree_RBT_COMPARE +ffffffff81413000 T ieee80211_output +ffffffff814130f0 T ieee80211_action_name +ffffffff81413140 T ieee80211_mgmt_output +ffffffff814133a0 T ieee80211_pwrsave +ffffffff814134d0 T ieee80211_up_to_ac +ffffffff81413590 T ieee80211_classify +ffffffff81413680 T ieee80211_can_use_ampdu +ffffffff814136e0 T ieee80211_tx_compressed_bar +ffffffff81413820 T ieee80211_get_compressed_bar +ffffffff81413900 T ieee80211_encap +ffffffff81413d80 T ieee80211_add_capinfo +ffffffff81413e10 T ieee80211_add_ssid +ffffffff81413e70 T ieee80211_add_rates +ffffffff81413ee0 T ieee80211_add_ds_params +ffffffff81413f40 T ieee80211_add_tim +ffffffff81414080 T ieee80211_add_ibss_params +ffffffff814140b0 T ieee80211_add_edca_params +ffffffff81414240 T ieee80211_add_erp +ffffffff814142e0 T ieee80211_add_qos_capability +ffffffff81414320 T ieee80211_add_wme_info +ffffffff81414360 T ieee80211_add_wme_param +ffffffff81414500 T ieee80211_add_rsn_body +ffffffff81414810 T ieee80211_add_rsn +ffffffff81414870 T ieee80211_add_wpa +ffffffff814148e0 T ieee80211_add_xrates +ffffffff81414970 T ieee80211_add_htcaps +ffffffff81414a50 T ieee80211_add_htop +ffffffff81414b20 T ieee80211_add_vhtcaps +ffffffff81414bd0 T ieee80211_add_tie +ffffffff81414c20 T ieee80211_getmgmt +ffffffff81414ce0 T ieee80211_get_probe_req +ffffffff814150e0 T ieee80211_get_probe_resp +ffffffff81415690 T ieee80211_get_auth +ffffffff81415720 T ieee80211_get_deauth +ffffffff814157a0 T ieee80211_get_assoc_req +ffffffff81415c90 T ieee80211_get_assoc_resp +ffffffff81416080 T ieee80211_get_disassoc +ffffffff81416100 T ieee80211_get_addba_req +ffffffff81416200 T ieee80211_output_ba_move_window +ffffffff81416300 T ieee80211_output_ba_move_window_to_first_unacked +ffffffff814164d0 T ieee80211_output_ba_record_ack +ffffffff81416600 T ieee80211_get_addba_resp +ffffffff81416700 T ieee80211_get_delba +ffffffff814167a0 T ieee80211_get_sa_query +ffffffff81416830 T ieee80211_get_action +ffffffff81416ac0 T ieee80211_send_mgmt +ffffffff81416e40 T ieee80211_get_rts +ffffffff81416ed0 T ieee80211_get_cts_to_self +ffffffff81416f60 T ieee80211_beacon_alloc +ffffffff81418000 T ieee80211_eapol_key_input +ffffffff81418210 T ieee80211_recv_eapol_key_req +ffffffff81418360 T ieee80211_recv_4way_msg3 +ffffffff81418cf0 T ieee80211_recv_4way_msg2or4 +ffffffff81418e30 T ieee80211_recv_4way_msg1 +ffffffff81419110 T ieee80211_recv_wpa_group_msg1 +ffffffff81419410 T ieee80211_recv_rsn_group_msg1 +ffffffff81419920 T ieee80211_recv_group_msg2 +ffffffff81419a70 T ieee80211_recv_4way_msg2 +ffffffff81419c70 T ieee80211_must_update_group_key +ffffffff81419cd0 T ieee80211_recv_4way_msg4 +ffffffff8141a000 T ieee80211_send_eapol_key +ffffffff8141a1f0 T ieee80211_eapol_timeout +ffffffff8141a270 T ieee80211_send_4way_msg1 +ffffffff8141a530 T ieee80211_send_4way_msg3 +ffffffff8141aa80 T ieee80211_send_group_msg1 +ffffffff8141afa0 T ieee80211_add_gtk_kde +ffffffff8141b060 T ieee80211_add_pmkid_kde +ffffffff8141b0b0 T ieee80211_add_igtk_kde +ffffffff8141b180 T ieee80211_get_eapol_key +ffffffff8141b240 T ieee80211_send_4way_msg2 +ffffffff8141b460 T ieee80211_send_4way_msg4 +ffffffff8141b650 T ieee80211_send_group_msg2 +ffffffff8141b830 T ieee80211_send_eapol_key_req +ffffffff8141c000 T ieee80211_proto_attach +ffffffff8141c0b0 T ieee80211_newstate +ffffffff8141cd90 T ieee80211_proto_detach +ffffffff8141cdd0 T ieee80211_print_essid +ffffffff8141cf50 T ieee80211_fix_rate +ffffffff8141d250 T ieee80211_reset_erp +ffffffff8141d370 T ieee80211_set_shortslottime +ffffffff8141d3d0 T ieee80211_keyrun +ffffffff8141d540 T ieee80211_setkeys +ffffffff8141d780 t ieee80211_node_gtk_rekey +ffffffff8141d7e0 T ieee80211_setkeysdone +ffffffff8141d8e0 T ieee80211_gtk_rekey_timeout +ffffffff8141d930 T ieee80211_sa_query_timeout +ffffffff8141da00 T ieee80211_sa_query_request +ffffffff8141da80 T ieee80211_ht_negotiate +ffffffff8141dc50 T ieee80211_vht_negotiate +ffffffff8141de70 T ieee80211_tx_ba_timeout +ffffffff8141df90 T ieee80211_delba_request +ffffffff8141e100 T ieee80211_rx_ba_timeout +ffffffff8141e190 T ieee80211_addba_request +ffffffff8141e360 T ieee80211_auth_open_confirm +ffffffff8141e410 T ieee80211_try_another_bss +ffffffff8141e520 T ieee80211_auth_open +ffffffff8141e820 T ieee80211_set_beacon_miss_threshold +ffffffff8141e8b0 T ieee80211_stop_ampdu_tx +ffffffff8141e9c0 T ieee80211_check_wpa_supplicant_failure +ffffffff8141ea40 T ieee80211_set_link_state +ffffffff8141ead0 T ieee80211_rtm_80211info_task +ffffffff8141f000 T ieee80211_ra_get_ht_rateset +ffffffff8141f080 T ieee80211_ra_use_ht_sgi +ffffffff8141f100 T ieee80211_ra_get_txrate +ffffffff8141f190 T ieee80211_ra_next_lower_intra_rate +ffffffff8141f320 T ieee80211_ra_next_intra_rate +ffffffff8141f4a0 T ieee80211_ra_next_rateset +ffffffff8141f6b0 T ieee80211_ra_best_mcs_in_rateset +ffffffff8141f730 T ieee80211_ra_probe_next_rateset +ffffffff8141f9e0 T ieee80211_ra_next_mcs +ffffffff8141fa30 T ieee80211_ra_probe_clear +ffffffff8141fa70 T ieee80211_ra_probe_done +ffffffff8141fab0 T ieee80211_ra_intra_mode_ra_finished +ffffffff8141fe20 T ieee80211_ra_trigger_next_rateset +ffffffff8141fe90 T ieee80211_ra_inter_mode_ra_finished +ffffffff8141fec0 T ieee80211_ra_best_rate +ffffffff8141ff60 T ieee80211_ra_probe_next_rate +ffffffff81420000 T ieee80211_ra_valid_tx_mcs +ffffffff81420080 T ieee80211_ra_valid_rates +ffffffff81420150 T ieee80211_ra_probe_valid +ffffffff814201a0 T ieee80211_ra_add_stats_ht +ffffffff81420430 T ieee80211_ra_choose +ffffffff81420860 T ieee80211_ra_node_init +ffffffff81421000 T ieee80211_ra_vht_get_rateset +ffffffff814210a0 T ieee80211_ra_vht_use_sgi +ffffffff81421190 T ieee80211_ra_vht_get_txrate +ffffffff81421230 T ieee80211_ra_vht_next_lower_intra_rate +ffffffff81421270 T ieee80211_ra_vht_get_max_mcs +ffffffff814212f0 T ieee80211_ra_vht_next_intra_rate +ffffffff814213e0 T ieee80211_ra_vht_next_rateset +ffffffff814215e0 T ieee80211_ra_vht_best_mcs_in_rateset +ffffffff81421680 T ieee80211_ra_vht_probe_next_rateset +ffffffff81421a10 T ieee80211_ra_vht_next_mcs +ffffffff81421aa0 T ieee80211_ra_vht_probe_clear +ffffffff81421ad0 T ieee80211_ra_vht_probe_done +ffffffff81421b20 T ieee80211_ra_vht_intra_mode_ra_finished +ffffffff81421fc0 T ieee80211_ra_vht_trigger_next_rateset +ffffffff81422030 T ieee80211_ra_vht_inter_mode_ra_finished +ffffffff81422060 T ieee80211_ra_vht_best_rate +ffffffff814223d0 T ieee80211_ra_vht_probe_next_rate +ffffffff81422480 T ieee80211_ra_vht_init_valid_rates +ffffffff81422670 T ieee80211_ra_vht_probe_valid +ffffffff814226c0 T ieee80211_ra_vht_add_stats +ffffffff81422b10 T ieee80211_ra_vht_choose +ffffffff81422fe0 T ieee80211_ra_vht_node_init +ffffffff81424000 T ieee80211_rssadapt_choose +ffffffff814240e0 T ieee80211_rssadapt_updatestats +ffffffff81424170 T ieee80211_rssadapt_input +ffffffff814241b0 T ieee80211_rssadapt_lower_rate +ffffffff81424230 T ieee80211_rssadapt_raise_rate +ffffffff81425000 T bsearch +ffffffff814250b0 T ieee80211_regdomain_compare_cn +ffffffff814250d0 T ieee80211_regdomain_compare_rn +ffffffff814250f0 T ieee80211_name2countrycode +ffffffff81425190 T ieee80211_name2regdomain +ffffffff81425230 T ieee80211_countrycode2name +ffffffff814252c0 T ieee80211_regdomain2name +ffffffff81425340 T ieee80211_regdomain2flag +ffffffff81425400 T ieee80211_countrycode2regdomain +ffffffff81426000 T arptimer +ffffffff81426080 T arptfree +ffffffff81426170 T arpinit +ffffffff814261f0 T arp_rtrequest +ffffffff81426630 T arprequest +ffffffff81426770 T arpinvalidate +ffffffff814267d0 T arpreply +ffffffff814268c0 T arpresolve +ffffffff81426d30 T arppullup +ffffffff81426df0 T arpinput +ffffffff81426e50 T arpintr +ffffffff81426f00 T in_arpinput +ffffffff81427320 T arplookup +ffffffff81427410 T arpcache +ffffffff81427790 T arpproxy +ffffffff81427870 T revarpinput +ffffffff814278c0 T in_revarpinput +ffffffff81427980 T revarprequest +ffffffff81427ac0 T revarpwhoarewe +ffffffff81427cb0 T revarpwhoami +ffffffff81428000 T igmp_init +ffffffff81428090 T rti_fill +ffffffff81428160 T rti_find +ffffffff81428240 T rti_delete +ffffffff814282d0 T igmp_input +ffffffff814283a0 T igmp_input_if +ffffffff81428b40 T igmp_joingroup +ffffffff81428c80 T igmp_sendpkt +ffffffff81428e00 T igmp_leavegroup +ffffffff81428e80 T igmp_fasttimo +ffffffff81428f10 T igmp_checktimer +ffffffff81428ff0 T igmp_slowtimo +ffffffff81429050 T igmp_sysctl +ffffffff81429170 T igmp_sysctl_igmpstat +ffffffff8142a000 T in_canforward +ffffffff8142a060 T in_socktrim +ffffffff8142a0c0 T in_mask2len +ffffffff8142a1b0 T in_len2mask +ffffffff8142a270 T in_nam2sin +ffffffff8142a2d0 T in_sa2sin +ffffffff8142a310 T in_control +ffffffff8142a350 T in_ioctl +ffffffff8142a6b0 T in_ioctl_get +ffffffff8142a820 T in_ioctl_set_ifaddr +ffffffff8142aa00 T in_ioctl_change_ifaddr +ffffffff8142ae00 T in_scrubhost +ffffffff8142ae30 T in_addhost +ffffffff8142ae60 T in_ifscrub +ffffffff8142af00 T in_ifinit +ffffffff8142b1a0 T in_purgeaddr +ffffffff8142b2a0 T in_remove_prefix +ffffffff8142b310 T in_insert_prefix +ffffffff8142b390 T in_addmulti +ffffffff8142b540 T in_delmulti +ffffffff8142b690 T in_broadcast +ffffffff8142b720 T in_hasmulti +ffffffff8142b7c0 T in_ifdetach +ffffffff8142b850 T in_prefixlen2mask +ffffffff8142c000 T in_init +ffffffff8142c060 T in_pcbhash +ffffffff8142c170 T in_pcblhash +ffffffff8142c210 T in_pcbinit +ffffffff8142c2c0 T in_baddynamic +ffffffff8142c330 T in_rootonly +ffffffff8142c3b0 T in_pcballoc +ffffffff8142c540 T in_pcbresize +ffffffff8142c700 T in_pcbhash_insert +ffffffff8142c8c0 T in_pcbbind_locked +ffffffff8142cbb0 T in_pcbaddrisavail_lock +ffffffff8142cdf0 T in_pcbpickport +ffffffff8142d020 T in_pcbrehash +ffffffff8142d090 T in_pcbbind +ffffffff8142d110 T in_pcblookup_local_lock +ffffffff8142d480 T in_pcbunref +ffffffff8142d560 T in_pcbaddrisavail +ffffffff8142d580 T in_pcbconnect +ffffffff8142d780 T in_pcbselsrc +ffffffff8142d960 T in_pcblookup_lock +ffffffff8142db30 T in_pcbdisconnect +ffffffff8142dba0 T in_pcbdetach +ffffffff8142dce0 T in_pcbref +ffffffff8142dd30 T in_setsockaddr +ffffffff8142dda0 T in_setpeeraddr +ffffffff8142de10 T in_sockaddr +ffffffff8142de90 T in_peeraddr +ffffffff8142df10 T in_pcbnotifyall +ffffffff8142e070 T in_losing +ffffffff8142e100 T in_rtchange +ffffffff8142e150 T in_pcbrtentry +ffffffff8142e1f0 T in_pcbhash_lookup +ffffffff8142e360 T in_pcblookup +ffffffff8142e3b0 T in_pcblookup_listen +ffffffff8142e5e0 T in_pcbset_rtableid +ffffffff8142e6d0 T in_pcbset_laddr +ffffffff8142e810 T in_pcbunset_faddr +ffffffff8142e8d0 T in_pcbunset_laddr +ffffffff8142f000 T inet_nat64_mask +ffffffff8142f050 T inet_nat64 +ffffffff8142f1f0 T inet_nat64_inet +ffffffff8142f2b0 T inet_nat64_inet6 +ffffffff8142f390 T inet_nat46 +ffffffff8142f430 T inet_nat46_inet +ffffffff8142f490 T inet_nat46_inet6 +ffffffff81430000 T inet_ntop +ffffffff814300c0 t inet_ntop6 +ffffffff81430620 T sockaddr_ntop +ffffffff81431000 T divert_attach +ffffffff81431090 T divert_detach +ffffffff814310e0 T divert_lock +ffffffff81431140 T divert_unlock +ffffffff814311a0 T divert_locked +ffffffff81431210 T divert_bind +ffffffff81431250 T divert_shutdown +ffffffff81431290 T divert_send +ffffffff814312d0 T divert_init +ffffffff81431320 T divert_output +ffffffff814315c0 T divert_packet +ffffffff81431840 T divert_sysctl_divstat +ffffffff814318f0 T divert_sysctl +ffffffff81432000 T icmp_init +ffffffff81432080 T icmp_mtudisc_timeout +ffffffff81432180 T icmp_do_error +ffffffff814324a0 T icmp_ratelimit +ffffffff81432500 T icmp_error +ffffffff81432580 T icmp_reflect +ffffffff814328a0 T icmp_send +ffffffff81432980 T icmp_input +ffffffff81432a20 T icmp_input_if +ffffffff814332e0 T iptime +ffffffff81433380 T icmp_sysctl +ffffffff81433530 T icmp_sysctl_icmpstat +ffffffff81433630 T icmp_mtudisc_clone +ffffffff814337e0 T icmp_mtudisc +ffffffff814339b0 T icmp_do_exthdr +ffffffff81434000 T ip_randomid +ffffffff81435000 T ip_init +ffffffff81435290 T ip_ours +ffffffff81435310 T ip_fragcheck +ffffffff81435640 T ipintr +ffffffff814356f0 T ip_deliver +ffffffff81435a40 T ipv4_input +ffffffff81435ac0 T ip_input_if +ffffffff81435f80 T ipv4_check +ffffffff81436280 T ip_dooptions +ffffffff81436850 T in_ouraddr +ffffffff81436b40 T ip_forward +ffffffff81436fb0 T ip_flush +ffffffff814370c0 T ip_reass +ffffffff81437690 T ip_freef +ffffffff81437790 t carp_strict_addr_chk +ffffffff81437810 T ip_slowtimo +ffffffff814378a0 T save_rte +ffffffff81437980 T ip_srcroute +ffffffff81437ae0 T ip_stripoptions +ffffffff81437b80 T ip_sysctl +ffffffff81437ed0 T ip_sysctl_ipstat +ffffffff81438140 T ip_savecontrol +ffffffff81438370 T ip_send_do_dispatch +ffffffff81438450 T ip_send +ffffffff81438480 T ip_send_raw +ffffffff814384b0 t ip_send_dispatch +ffffffff814384d0 t ip_sendraw_dispatch +ffffffff81439000 T mfc_find +ffffffff814390d0 T ip_mrouter_set +ffffffff81439240 T ip_mrouter_init +ffffffff814392c0 T ip_mrouter_done +ffffffff814394d0 T add_vif +ffffffff814396d0 T del_vif +ffffffff81439830 T add_mfc +ffffffff814399e0 T del_mfc +ffffffff81439b60 T set_api_config +ffffffff81439c00 T ip_mrouter_get +ffffffff81439cb0 T get_version +ffffffff81439cf0 T get_api_support +ffffffff81439d40 T get_api_config +ffffffff81439d90 T mrt_ioctl +ffffffff81439ee0 T get_vif_cnt +ffffffff81439f70 T get_sg_cnt +ffffffff8143a090 T if_lookupbyvif +ffffffff8143a0f0 T mrt_sysctl_vif +ffffffff8143a260 T mrt_rtwalk_mfcsysctl +ffffffff8143a3a0 T mrt_sysctl_mfc +ffffffff8143a4c0 T mrouter_rtwalk_delete +ffffffff8143a500 T mrt_mcast_del +ffffffff8143a590 T vif_delete +ffffffff8143a650 T mfc_expire_route +ffffffff8143a730 T mfc_add_route +ffffffff8143a8b0 T rt_mcast_add +ffffffff8143a9e0 T update_mfc_params +ffffffff8143ace0 T mfc_add +ffffffff8143adf0 T socket_send +ffffffff8143ae90 T ip_mforward +ffffffff8143b100 T ip_mdq +ffffffff8143c000 T ip_output +ffffffff8143c9b0 T ip_insertoptions +ffffffff8143cb60 T ip_output_ipsec_lookup +ffffffff8143ccc0 T in_proto_cksum_out +ffffffff8143cf80 T ip_mloopback +ffffffff8143d060 T ip_output_ipsec_send +ffffffff8143d380 T ip_fragment +ffffffff8143d7d0 T ip_output_ipsec_pmtu_update +ffffffff8143d8d0 T ip_optcopy +ffffffff8143da00 T in_hdr_cksum_out +ffffffff8143dae0 T ip_ctloutput +ffffffff8143e350 T ip_pcbopts +ffffffff8143e580 T ip_setmoptions +ffffffff8143ead0 T ip_getmoptions +ffffffff8143ec30 T ip_multicast_if +ffffffff8143ed10 T ip_freemoptions +ffffffff8143eda0 T in_ifcap_cksum +ffffffff8143ee00 T in_delayed_cksum +ffffffff8143f000 T rip_attach +ffffffff8143f0f0 T rip_detach +ffffffff8143f170 T rip_lock +ffffffff8143f1d0 T rip_unlock +ffffffff8143f230 T rip_locked +ffffffff8143f2a0 T rip_bind +ffffffff8143f380 T rip_connect +ffffffff8143f410 T rip_disconnect +ffffffff8143f490 T rip_shutdown +ffffffff8143f4d0 T rip_send +ffffffff8143f5b0 T rip_init +ffffffff8143f5d0 T rip_input +ffffffff8143f980 T rip_output +ffffffff8143fb60 T rip_chkhdr +ffffffff8143fc60 T rip_ctloutput +ffffffff81440000 T tcp_trace +ffffffff81441000 T tcp_reass +ffffffff81441380 t tcpstat_pkt +ffffffff814413e0 T tcp_flush_queue +ffffffff81441570 T tcp_input +ffffffff81444710 T syn_cache_reset +ffffffff81444880 T syn_cache_get +ffffffff81444fb0 T syn_cache_add +ffffffff81445600 T tcp_del_sackholes +ffffffff814456c0 T tcp_dooptions +ffffffff81445bd0 T tcp_xmit_timer +ffffffff81445d20 t sb_notify +ffffffff81445d90 T tcp_clean_sackreport +ffffffff81445e10 T tcp_mss +ffffffff81446090 T tcp_sack_partialack +ffffffff81446140 T tcp_newreno_partialack +ffffffff81446230 T tcp_seq_subtract +ffffffff81446260 T tcp_pulloutofband +ffffffff81446320 T tcp_update_sack_list +ffffffff814467e0 T tcp_sack_option +ffffffff81446d00 T tcp_hdrsz +ffffffff81446d70 T tcp_mss_update +ffffffff81446ec0 T tcp_mss_adv +ffffffff81446f80 T syn_cache_rm +ffffffff81447110 T syn_cache_put +ffffffff81447180 T syn_cache_init +ffffffff81447290 T syn_cache_insert +ffffffff81447870 T syn_cache_timer +ffffffff81447a80 T syn_cache_respond +ffffffff814480a0 T syn_cache_cleanup +ffffffff814481c0 T syn_cache_lookup +ffffffff81448420 T syn_cache_unreach +ffffffff81449000 T tcp_sack_output +ffffffff81449080 T tcp_sack_adjust +ffffffff81449100 T tcp_output +ffffffff8144ac10 T tcp_setpersist +ffffffff8144acf0 T tcp_chopper +ffffffff8144b220 T tcp_if_output_tso +ffffffff8144c000 T tcp_init +ffffffff8144c190 T tcp6_mtudisc_callback +ffffffff8144c1f0 T tcp_template +ffffffff8144c360 T tcp_respond +ffffffff8144c7d0 T tcp_newtcpcb +ffffffff8144ca00 T tcp_drop +ffffffff8144caf0 T tcp_close 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mpii_scsi_cmd_tmo_done +ffffffff817073a0 T mpii_ioctl_cache +ffffffff817075f0 T mpii_ioctl_inq +ffffffff817076a0 T mpii_ioctl_vol +ffffffff81707930 T mpii_ioctl_disk +ffffffff81707b10 T mpii_find_vol +ffffffff81707b60 T mpii_bio_hs +ffffffff81707d30 T mpii_bio_disk +ffffffff81707f80 T mpii_bio_volstate +ffffffff81708120 T mpii_refresh_sensors +ffffffff81709000 T sili_pci_match +ffffffff817090a0 T sili_pci_attach +ffffffff817093a0 T sili_pci_detach +ffffffff81709450 T sili_pci_activate +ffffffff81709490 T sili_lookup +ffffffff8170a000 T aq_fw1x_reset +ffffffff8170a050 T aq1_get_mac_addr +ffffffff8170a130 T aq_fw1x_set_mode +ffffffff8170a160 T aq_fw1x_get_mode +ffffffff8170a190 T aq_fw1x_get_stats +ffffffff8170a1c0 T aq_fw2x_reset +ffffffff8170a250 T aq_fw2x_set_mode +ffffffff8170a3f0 T aq_fw2x_get_mode +ffffffff8170a580 T aq_fw2x_get_stats +ffffffff8170a5b0 T aq2_fw_reset +ffffffff8170a740 T aq2_get_mac_addr +ffffffff8170a7e0 T aq2_fw_set_mode +ffffffff8170a9f0 T aq2_fw_get_mode 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aq2_interface_buffer_read +ffffffff8170e010 T aq1_fw_downld_dwords +ffffffff8170e330 T aq_hw_l3_filter_set +ffffffff8170e540 T aq_hw_init_tx_path +ffffffff8170e7b0 T aq_hw_init_rx_path +ffffffff8170efc0 T aq_set_mac_addr +ffffffff8170f1d0 T aq_hw_qos_set +ffffffff8170f8c0 T aq2_filter_art_set +ffffffff8170fa70 T aq_get_linkmode +ffffffff8170fae0 T aq_txring_reset +ffffffff8170fe90 T aq_rxring_reset +ffffffff81710390 T aq_rx_fill +ffffffff817105a0 T aq_rxeof +ffffffff81710920 T aq_txeof +ffffffff81710b00 T aq_update_link_status +ffffffff81710ba0 T aq_free_slots +ffffffff81710c40 T aq_queue_up +ffffffff81711020 T aq_dmamem_alloc +ffffffff81711170 T aq_dmamem_free +ffffffff817111e0 T aq_queue_down +ffffffff81711490 T aq_invalidate_rx_desc_cache +ffffffff81711510 T aq_up +ffffffff81711930 T aq_down +ffffffff81711a90 T aq_rxrinfo +ffffffff81711b80 T aq_iff +ffffffff81712000 T tulip_probe +ffffffff81712060 T tulip_attach +ffffffff81712a80 T tulip_timeout_callback +ffffffff81712ad0 T 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tulip_identify_asante_nic +ffffffff81719960 T tulip_identify_compex_nic +ffffffff81719ab0 T tulip_srom_decode +ffffffff8171a6e0 T tulip_read_macaddr +ffffffff8171b050 T tulip_ifmedia_add +ffffffff8171b140 T tulip_ifmedia_change +ffffffff8171b320 T tulip_ifmedia_status +ffffffff8171b390 T tulip_alloc_rxmap +ffffffff8171b3d0 T tulip_free_rxmap +ffffffff8171b410 T tulip_alloc_txmap +ffffffff8171b450 T tulip_free_txmap +ffffffff8171b490 T tulip_addr_filter +ffffffff8171b7e0 T tulip_rx_intr +ffffffff8171be00 T tulip_txput_setup +ffffffff8171c0b0 T tulip_tx_intr +ffffffff8171c4b0 T tulip_print_abnormal_interrupt +ffffffff8171c4e0 T tulip_intr_handler +ffffffff8171c870 T tulip_ifstart +ffffffff8171c940 T tulip_intr_shared +ffffffff8171c9b0 T tulip_intr_normal +ffffffff8171ca00 T tulip_ifioctl +ffffffff8171cb00 T tulip_ifwatchdog +ffffffff8171cc00 T tulip_busdma_allocmem +ffffffff8171cd90 T tulip_busdma_init +ffffffff8171cfb0 T tulip_initcsrs +ffffffff8171d0b0 T tulip_initring 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siop_pci_attach_common +ffffffff81722520 T siop_pci_reset +ffffffff81723000 T siop_pci_match +ffffffff81723050 T siop_pci_attach +ffffffff81724000 T sii3114_read_reg +ffffffff81724060 T sii3114_write_reg +ffffffff817240d0 T pdc203xx_read_reg +ffffffff81724130 T pdc203xx_write_reg +ffffffff817241a0 T svwsata_read_reg +ffffffff81724210 T svwsata_write_reg +ffffffff81724260 T svwsata_lba48_write_reg +ffffffff817242b0 T pciide_pci_read +ffffffff81724300 T pciide_pci_write +ffffffff81724370 T default_chip_map +ffffffff817249d0 T artisea_chip_map +ffffffff81724c70 T piix_chip_map +ffffffff817252b0 T piixsata_chip_map +ffffffff817257f0 T sch_chip_map +ffffffff81725b50 T amd756_chip_map +ffffffff81725fb0 T ixp_chip_map +ffffffff81726360 T cmd_chip_map +ffffffff817264c0 T cmd0643_9_chip_map +ffffffff817267b0 T cmd680_chip_map +ffffffff81726990 T sii3112_chip_map +ffffffff81726d20 T sii3114_chip_map +ffffffff81727260 T apollo_chip_map +ffffffff81727900 T sata_chip_map +ffffffff81727b20 T cy693_chip_map +ffffffff81727ef0 T sis_chip_map +ffffffff81728690 T natsemi_chip_map +ffffffff81728b30 T ns_scx200_chip_map +ffffffff81728f00 T acer_chip_map +ffffffff817295c0 T hpt_chip_map +ffffffff81729ae0 T pdc202xx_chip_map +ffffffff8172a4e0 T pdcsata_chip_map +ffffffff8172aca0 T acard_chip_map +ffffffff8172af30 T serverworks_chip_map +ffffffff8172b280 T svwsata_chip_map +ffffffff8172b650 T nforce_chip_map +ffffffff8172bac0 T ite_chip_map +ffffffff8172bd80 T jmicron_chip_map +ffffffff8172c190 T phison_chip_map +ffffffff8172c4f0 T rdc_chip_map +ffffffff8172c980 T pciide_match +ffffffff8172ca20 T pciide_attach +ffffffff8172cb00 T pciide_detach +ffffffff8172cb60 T pciide_activate +ffffffff8172d290 T pciide_lookup_product +ffffffff8172d540 T pciide_dmacmd_read +ffffffff8172d570 T pciide_dmacmd_write +ffffffff8172d5a0 T pciide_dmactl_read +ffffffff8172d5d0 T pciide_dmactl_write +ffffffff8172d600 T pciide_dmatbl_write +ffffffff8172d630 T pciide_mapregs_compat +ffffffff8172d7b0 T pciide_unmapregs_compat +ffffffff8172d840 T pciide_mapregs_native +ffffffff8172db30 T pciide_unmapregs_native +ffffffff8172dbc0 T pciide_mapreg_dma +ffffffff8172dd50 T pciide_dma_init +ffffffff8172dff0 T pciide_dma_start +ffffffff8172e070 T pciide_dma_finish +ffffffff8172e240 T pciide_unmapreg_dma +ffffffff8172e270 T pciide_intr_flag +ffffffff8172e480 T pciide_compat_intr +ffffffff8172e500 T pciide_pci_intr +ffffffff8172e5c0 T pciide_channel_dma_setup +ffffffff8172e690 T pciide_dma_table_setup +ffffffff8172e8e0 T pciide_irqack +ffffffff8172e930 T pciide_chansetup +ffffffff8172ea10 T pciide_chanfree +ffffffff8172ea60 T pciide_mapchan +ffffffff8172eaf0 T pciide_unmap_chan +ffffffff8172ebc0 T pciide_chan_candisable +ffffffff8172ec30 T pciide_map_compat_intr +ffffffff8172ece0 T pciide_unmap_compat_intr +ffffffff8172ed40 T pciide_print_channels +ffffffff8172ee10 T pciide_print_modes +ffffffff8172ee20 T default_chip_unmap +ffffffff8172ef00 T sata_setup_channel +ffffffff8172f020 T piix_timing_debug +ffffffff8172f050 T piix_setup_channel +ffffffff8172f540 T piix3_4_setup_channel +ffffffff8172fd40 T piix_setup_idetim_timings +ffffffff8172fdb0 T piix_setup_idetim_drvs +ffffffff8172fec0 T piix_setup_sidetim_timings +ffffffff8172ff30 T amd756_setup_channel +ffffffff817302e0 T apollo_setup_channel +ffffffff81730630 T cmd_channel_map +ffffffff81730970 T cmd_pci_intr +ffffffff81730a80 T cmd646_9_irqack +ffffffff81730b80 T cmd0643_9_setup_channel +ffffffff81730fb0 T cmd680_setup_channel +ffffffff817314a0 T cmd680_channel_map +ffffffff817317a0 T sii_fixup_cacheline +ffffffff81731a70 T sii3112_setup_channel +ffffffff81731c30 T sii3112_drv_probe +ffffffff81731f80 T sii3114_mapreg_dma +ffffffff81732240 T sii3114_chansetup +ffffffff81732300 T sii3114_mapchan +ffffffff817325f0 T sii3114_dmacmd_read +ffffffff81732630 T sii3114_dmacmd_write +ffffffff81732670 T sii3114_dmactl_read +ffffffff817326b0 T sii3114_dmactl_write +ffffffff817326f0 T sii3114_dmatbl_write +ffffffff81732730 T cy693_setup_channel +ffffffff81732950 T sis_hostbr_match +ffffffff81732a20 T sis_south_match +ffffffff81732a60 T sis_setup_channel +ffffffff81732db0 T sis96x_setup_channel +ffffffff81733060 T natsemi_irqack +ffffffff817330f0 T natsemi_setup_channel +ffffffff817334e0 T natsemi_pci_intr +ffffffff817335d0 T ns_scx200_setup_channel +ffffffff817338b0 T acer_dma_init +ffffffff817338f0 T acer_setup_channel +ffffffff81733d00 T acer_pci_intr +ffffffff81733de0 T hpt_setup_channel +ffffffff81734130 T hpt_pci_intr +ffffffff81734240 T pdc268_config_read +ffffffff817342b0 T pdc20268_setup_channel +ffffffff81734480 T pdc202xx_setup_channel +ffffffff817348d0 T pdc20262_dma_start +ffffffff81734a30 T pdc20262_dma_finish +ffffffff81734b00 T pdc20265_pci_intr +ffffffff81734cb0 T pdc202xx_pci_intr +ffffffff81734dc0 T pdc203xx_pci_intr +ffffffff81734eb0 T pdc205xx_pci_intr +ffffffff81734fe0 T pdc203xx_irqack +ffffffff81735070 T pdc203xx_setup_channel +ffffffff81735170 T pdc205xx_do_reset +ffffffff81735210 T pdc205xx_drv_probe +ffffffff81735490 T pdc203xx_dma_start +ffffffff81735550 T pdc203xx_dma_finish +ffffffff81735640 T serverworks_setup_channel +ffffffff81735a50 T serverworks_pci_intr +ffffffff81735b60 T svwsata_mapreg_dma +ffffffff81735c10 T svwsata_drv_probe +ffffffff81735ee0 T svwsata_mapchan +ffffffff81735fd0 T svwsata_dmacmd_read +ffffffff81736000 T svwsata_dmacmd_write +ffffffff81736030 T svwsata_dmactl_read +ffffffff81736060 T svwsata_dmactl_write +ffffffff81736090 T svwsata_dmatbl_write +ffffffff817360c0 T acard_setup_channel +ffffffff817364f0 T nforce_setup_channel +ffffffff81736830 T nforce_pci_intr +ffffffff81736920 T ite_setup_channel +ffffffff81736c80 T ixp_setup_channel +ffffffff81737030 T jmicron_setup_channel +ffffffff81737290 T phison_setup_channel +ffffffff817374a0 T sch_setup_channel +ffffffff817376a0 T rdc_setup_channel +ffffffff81737ac0 t ba5_read_4_ind +ffffffff81737b50 t ba5_write_4_ind +ffffffff81738000 T ppbmatch +ffffffff81738050 T ppbattach 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T txp_ifmedia_upd +ffffffff81742860 T txp_ifmedia_sts +ffffffff81742b20 T txp_ioctl +ffffffff81742c40 T txp_start +ffffffff81743000 T txp_watchdog +ffffffff81743030 T txp_capabilities +ffffffff817431e0 T txp_tick +ffffffff81743330 T txp_intr +ffffffff817435a0 T txp_reset_adapter +ffffffff817436a0 T txp_download_fw_wait +ffffffff81743790 T txp_download_fw_section +ffffffff81743b00 T txp_dma_malloc +ffffffff81743ca0 T txp_dma_free +ffffffff81743d20 T txp_rx_reclaim +ffffffff81743ff0 T txp_rxbuf_reclaim +ffffffff81744270 T txp_tx_reclaim +ffffffff81744410 T txp_init +ffffffff81744550 T txp_stop +ffffffff81744650 T txp_set_filter +ffffffff817447e0 T txp_command2 +ffffffff81744ae0 T txp_cmd_desc_numfree +ffffffff81744b40 T txp_response +ffffffff81744e10 T txp_rsp_fixup +ffffffff81744ef0 T txp_show_descriptor +ffffffff81746000 T init_audio_devices +ffffffff81746120 T init_BTSC +ffffffff817461e0 T set_audio +ffffffff81746570 T set_bctv_audio +ffffffff817468b0 T msp_autodetect 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em_initialize_receive_unit +ffffffff817595e0 T em_enable_intr +ffffffff81759740 T em_watchdog +ffffffff817598f0 T em_enable_hw_vlans +ffffffff81759990 T em_setup_transmit_structures +ffffffff81759b90 T em_initialize_transmit_unit +ffffffff8175a1f0 T em_setup_receive_structures +ffffffff8175a330 T em_setup_queues_msix +ffffffff8175a9a0 T em_intr +ffffffff8175aaa0 T em_txeof +ffffffff8175ac70 T em_rxeof +ffffffff8175b100 T em_rxrefill_locked +ffffffff8175b210 T em_media_status +ffffffff8175b430 T em_flowstatus +ffffffff8175b530 T em_media_change +ffffffff8175b690 T em_tx_ctx_setup +ffffffff8175b810 T em_transmit_checksum_setup +ffffffff8175b8f0 T em_fill_descriptors +ffffffff8175b970 T em_82547_fifo_workaround +ffffffff8175b9e0 T em_82547_tx_fifo_reset +ffffffff8175be40 T em_pci_clear_mwi +ffffffff8175be70 T em_pci_set_mwi +ffffffff8175bea0 T em_smartspeed +ffffffff8175c090 T em_kstat_read +ffffffff8175c4d0 T em_flush_desc_rings +ffffffff8175c600 T em_free_transmit_structures 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+ffffffff8175efa0 T em_read_sfp_data_byte +ffffffff8175f090 T em_set_media_type +ffffffff8175f300 T em_reset_hw +ffffffff8175feb0 T em_disable_pciex_master +ffffffff8175ff80 T em_check_phy_reset_block +ffffffff81760040 T em_gate_hw_phy_config_ich8lan +ffffffff817600e0 t em_get_software_flag +ffffffff81760260 T em_hv_phy_workarounds_ich8lan +ffffffff817605f0 T em_lv_phy_workarounds_ich8lan +ffffffff817606f0 t em_phy_init_script +ffffffff81760950 T em_read_eeprom +ffffffff81760fc0 T em_set_eee_i350 +ffffffff817610e0 T em_init_hw +ffffffff81762b20 T em_phy_reset +ffffffff81762d10 T em_clear_vfta_i350 +ffffffff81762ef0 T em_read_phy_reg +ffffffff817630a0 T em_setup_link +ffffffff81765340 T em_enable_tx_pkt_filtering +ffffffff81765700 T em_clear_hw_cntrs +ffffffff81765ff0 T em_write_phy_reg +ffffffff81766170 T em_power_up_serdes_link_82575 +ffffffff81766260 T em_copper_link_autoneg +ffffffff81766390 T em_phy_setup_autoneg +ffffffff817664f0 T em_copper_link_postconfig +ffffffff817665c0 T em_config_collision_dist +ffffffff81766650 t em_config_mac_to_phy +ffffffff817667c0 t em_config_fc_after_link_up +ffffffff81766a10 t em_config_dsp_after_link_change +ffffffff817673b0 T em_force_mac_fc +ffffffff81767480 T em_check_for_link +ffffffff81767b00 T em_get_pcs_speed_and_duplex_82575 +ffffffff81767bc0 T em_k1_gig_workaround_hv +ffffffff81767cf0 T em_link_stall_workaround_hv +ffffffff81767dd0 T em_k1_workaround_lv +ffffffff81767e90 T em_k1_workaround_lpt_lp +ffffffff81768150 t em_check_downshift +ffffffff81768200 T em_set_eee_pchlan +ffffffff817682a0 t em_polarity_reversal_workaround +ffffffff817684e0 T em_get_speed_and_duplex +ffffffff81768990 T em_access_phy_wakeup_reg_bm +ffffffff81768af0 t em_write_phy_reg_ex +ffffffff81768d60 t em_read_phy_reg_ex +ffffffff81769210 T em_access_phy_debug_regs_hv +ffffffff817692e0 T em_access_phy_reg_hv +ffffffff81769450 t em_swfw_sync_acquire +ffffffff81769600 t em_swfw_sync_release +ffffffff81769770 T em_sgmii_uses_mdio_82575 +ffffffff817697d0 T em_read_phy_reg_i2c +ffffffff817698b0 T em_write_phy_reg_i2c +ffffffff81769980 T em_phy_hw_reset +ffffffff81769f90 T em_oem_bits_config_pchlan +ffffffff8176a100 T em_initialize_M88E1512_phy +ffffffff8176a2c0 T em_init_eeprom_params +ffffffff8176a7d0 T em_get_flash_presence_i210 +ffffffff8176a830 t em_acquire_eeprom +ffffffff8176aa20 t em_read_eeprom_ich8 +ffffffff8176abf0 t em_release_eeprom +ffffffff8176ad60 t em_standby_eeprom +ffffffff8176af50 t em_shift_out_ee_bits +ffffffff8176b0f0 t em_shift_in_ee_bits +ffffffff8176b230 T em_validate_eeprom_checksum +ffffffff8176b3d0 T em_write_eeprom +ffffffff8176b6f0 T em_update_eeprom_checksum +ffffffff8176b810 t em_commit_shadow_ram +ffffffff8176bd70 t em_write_eeprom_microwire +ffffffff8176bef0 t em_write_eeprom_spi +ffffffff8176c0b0 T em_read_part_num +ffffffff8176c150 T em_read_mac_addr +ffffffff8176c2d0 T em_mc_addr_list_update +ffffffff8176c3e0 T em_hash_mc_addr +ffffffff8176c4e0 T em_mta_set +ffffffff8176c650 T em_rar_set +ffffffff8176c780 T em_get_bus_info +ffffffff8176c910 T em_check_mng_mode +ffffffff8176c990 T em_valid_nvm_bank_detect_ich8lan +ffffffff8176cb40 T em_read_eeprom_spt +ffffffff8176ce00 t em_release_software_flag +ffffffff8176ceb0 T em_read_ich8_data32 +ffffffff8176d020 t em_ich8_cycle_init +ffffffff8176d1c0 t em_ich8_flash_cycle +ffffffff8176d310 T em_configure_k1_ich8lan +ffffffff8176d530 t em_toggle_lanphypc_pch_lpt +ffffffff8176d690 t em_copper_link_ggp_setup +ffffffff8176d940 t em_copper_link_82580_setup +ffffffff8176d9d0 t em_copper_link_rtl8211_setup +ffffffff8176dc60 t em_phy_reset_dsp +ffffffff8176dce0 t em_get_hw_eeprom_semaphore +ffffffff8176de50 t em_shift_out_mdi_bits +ffffffff8176dfe0 t em_erase_ich8_4k_segment +ffffffff8176e220 t em_write_ich8_byte +ffffffff8176e390 t em_read_ich8_data +ffffffff8176f000 T em_lookup_gcu +ffffffff8176f030 T em_attach_miibus +ffffffff8176f060 T gcu_miibus_readreg +ffffffff8176f1d0 T gcu_miibus_writereg +ffffffff8176f320 T gcu_miibus_statchg +ffffffff81770000 T ixgb_probe +ffffffff81770030 T ixgb_attach +ffffffff81770470 T ixgb_local_timer +ffffffff81770520 T ixgb_identify_hardware +ffffffff81770620 T ixgb_allocate_pci_resources +ffffffff817707b0 T ixgb_dma_malloc +ffffffff817709b0 T ixgb_hardware_init +ffffffff81770a70 T ixgb_setup_interface +ffffffff81770ba0 T ixgb_update_stats_counters +ffffffff817714a0 T ixgb_update_link_status +ffffffff81771520 T ixgb_dma_free +ffffffff817715d0 T ixgb_free_pci_resources +ffffffff81771660 T ixgb_start +ffffffff81771890 T ixgb_encap +ffffffff81771a80 T ixgb_ioctl +ffffffff81771d20 T ixgb_init +ffffffff817721c0 T ixgb_set_promisc +ffffffff81772240 T ixgb_stop +ffffffff817722c0 T ixgb_disable_intr +ffffffff817722f0 T ixgb_set_multi +ffffffff81772400 T ixgb_enable_intr +ffffffff81772450 T ixgb_watchdog +ffffffff817724e0 T ixgb_enable_hw_vlans +ffffffff81772530 T ixgb_setup_transmit_structures +ffffffff817726a0 T ixgb_initialize_transmit_unit +ffffffff81772810 T ixgb_setup_receive_structures +ffffffff81772890 T ixgb_initialize_receive_unit +ffffffff81772b20 T ixgb_intr +ffffffff81772d20 T ixgb_rxeof +ffffffff81773160 T ixgb_txeof +ffffffff81773340 T ixgb_media_status +ffffffff81773430 T ixgb_media_change +ffffffff81773480 T ixgb_free_transmit_structures +ffffffff817735b0 T ixgb_free_receive_structures +ffffffff817736e0 T ixgb_allocate_transmit_structures +ffffffff81773760 T ixgb_transmit_checksum_setup +ffffffff81773860 T ixgb_get_buf +ffffffff81773a10 T ixgb_allocate_receive_structures +ffffffff81773b90 T ixgb_receive_checksum +ffffffff81773bf0 T ixgb_write_pci_cfg +ffffffff81774000 T ixgb_validate_eeprom_checksum +ffffffff81774080 T ixgb_read_eeprom +ffffffff817742f0 T ixgb_update_eeprom_checksum +ffffffff81774350 T ixgb_write_eeprom +ffffffff81774830 t ixgb_shift_out_bits +ffffffff81774970 T ixgb_get_eeprom_data +ffffffff81774a10 T ixgb_get_eeprom_word +ffffffff81774ae0 T ixgb_get_ee_mac_addr +ffffffff81774be0 T ixgb_get_ee_pba_number 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ixgbe_allocate_legacy +ffffffff81779300 T ixgbe_setup_interface +ffffffff81779660 T ixgbe_free_transmit_structures +ffffffff817796e0 T ixgbe_free_receive_structures +ffffffff817797a0 T ixgbe_free_pci_resources +ffffffff81779880 T ixgbe_stop +ffffffff81779b80 T ixgbe_init +ffffffff8177a760 T ixgbe_start +ffffffff8177a940 T ixgbe_encap +ffffffff8177ad90 T ixgbe_ioctl +ffffffff8177b0d0 T ixgbe_rxrinfo +ffffffff8177b230 T ixgbe_get_sffpage +ffffffff8177b3e0 T ixgbe_disable_intr +ffffffff8177b4b0 T ixgbe_iff +ffffffff8177b620 T ixgbe_enable_intr +ffffffff8177b730 T ixgbe_enable_queues +ffffffff8177b840 T ixgbe_watchdog +ffffffff8177ba50 T ixgbe_setup_transmit_structures +ffffffff8177bb20 T ixgbe_initialize_transmit_units +ffffffff8177bdf0 T ixgbe_setup_receive_structures +ffffffff8177bf20 T ixgbe_initialize_receive_units +ffffffff8177c400 T ixgbe_config_gpie +ffffffff8177c4d0 T ixgbe_setup_vlan_hw_support +ffffffff8177c640 T ixgbe_configure_ivars +ffffffff8177c7f0 T ixgbe_set_ivar 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ixgbe_free_transmit_buffers +ffffffff8177ee80 T ixgbe_get_buf +ffffffff8177efd0 T ixgbe_allocate_receive_buffers +ffffffff8177f110 T ixgbe_setup_receive_ring +ffffffff8177f1f0 T ixgbe_rxfill +ffffffff8177f330 T ixgbe_initialize_rss_mapping +ffffffff8177f5a0 T ixgbe_map_queue_statistics +ffffffff8177f6c0 T ixgbe_free_receive_buffers +ffffffff8177f7e0 T ixgbe_rx_checksum +ffffffff8177f830 T ixgbe_read_pci_cfg +ffffffff8177f890 T ixgbe_write_pci_cfg +ffffffff8177f910 t ix_kstats_read +ffffffff8177fad0 t ix_rxq_kstats_read +ffffffff8177fc30 t ix_txq_kstats_read +ffffffff81780000 T ixgbe_init_ops_generic +ffffffff81780270 T ixgbe_init_eeprom_params_generic +ffffffff81780320 T ixgbe_read_eerd_generic +ffffffff81780420 T ixgbe_read_eeprom_bit_bang_generic +ffffffff817806c0 T ixgbe_write_eeprom_generic +ffffffff81780b10 T ixgbe_validate_eeprom_checksum_generic +ffffffff81780bc0 T ixgbe_update_eeprom_checksum_generic +ffffffff81780c40 T ixgbe_calc_eeprom_checksum_generic +ffffffff81780de0 T ixgbe_init_hw_generic +ffffffff81780e40 T ixgbe_start_hw_generic +ffffffff81780f60 T ixgbe_clear_hw_cntrs_generic +ffffffff81781940 T ixgbe_enable_rx_dma_generic +ffffffff817819a0 T ixgbe_get_mac_addr_generic +ffffffff81781a30 T ixgbe_stop_adapter_generic +ffffffff81781bb0 T ixgbe_get_bus_info_generic +ffffffff81781c60 T ixgbe_set_lan_id_multi_port_pcie +ffffffff81781d30 T ixgbe_acquire_swfw_sync +ffffffff81781f60 T ixgbe_release_swfw_sync +ffffffff81782010 T prot_autoc_read_generic +ffffffff81782070 T prot_autoc_write_generic +ffffffff817820c0 T ixgbe_led_on_generic +ffffffff81782180 T ixgbe_led_off_generic +ffffffff81782230 T ixgbe_blink_led_start_generic +ffffffff817823a0 T ixgbe_blink_led_stop_generic +ffffffff817824c0 T ixgbe_set_rar_generic +ffffffff817825e0 T ixgbe_clear_rar_generic +ffffffff817826e0 T ixgbe_init_rx_addrs_generic +ffffffff817828e0 T ixgbe_update_mc_addr_list_generic +ffffffff81782ae0 T ixgbe_enable_mc_generic +ffffffff81782b50 T ixgbe_disable_mc_generic +ffffffff81782bb0 T ixgbe_enable_rx_generic +ffffffff81782c70 T ixgbe_disable_rx_generic +ffffffff81782d50 T ixgbe_fc_enable_generic +ffffffff81783180 T ixgbe_setup_fc_generic +ffffffff81783450 T ixgbe_fc_autoneg +ffffffff81783730 T ixgbe_device_supports_autoneg_fc +ffffffff81783820 T ixgbe_start_hw_gen2 +ffffffff81783a00 T ixgbe_identify_phy +ffffffff81783a60 T ixgbe_set_pci_config_data_generic +ffffffff81783ad0 T ixgbe_disable_rx +ffffffff81783b10 T ixgbe_disable_pcie_master +ffffffff81783c60 T ixgbe_read_eerd_buffer_generic +ffffffff81783da0 T ixgbe_poll_eerd_eewr_done +ffffffff81783e40 T ixgbe_write_eewr_buffer_generic +ffffffff81783fc0 T ixgbe_write_eewr_generic +ffffffff81784010 T ixgbe_acquire_eeprom +ffffffff81784190 T ixgbe_get_eeprom_semaphore +ffffffff817843a0 T ixgbe_release_eeprom_semaphore +ffffffff81784410 T ixgbe_ready_eeprom +ffffffff81784580 T ixgbe_shift_out_eeprom_bits +ffffffff81784740 T ixgbe_shift_in_eeprom_bits +ffffffff817848a0 T ixgbe_standby_eeprom +ffffffff81784980 T ixgbe_raise_eeprom_clk +ffffffff817849f0 T ixgbe_lower_eeprom_clk +ffffffff81784a60 T ixgbe_release_eeprom +ffffffff81784b40 T ixgbe_validate_mac_addr +ffffffff81784ba0 T ixgbe_init_uta_tables +ffffffff81784be0 T ixgbe_add_uc_addr +ffffffff81784c50 T ixgbe_mta_vector +ffffffff81784d00 T ixgbe_set_mta +ffffffff81784dc0 T ixgbe_negotiate_fc +ffffffff81784e70 T ixgbe_fc_autoneg_fiber +ffffffff81784f90 T ixgbe_fc_autoneg_backplane +ffffffff81785100 T ixgbe_fc_autoneg_copper +ffffffff81785220 T ixgbe_disable_sec_rx_path_generic +ffffffff817852e0 T ixgbe_enable_sec_rx_path_generic +ffffffff81785370 T ixgbe_enable_rx +ffffffff817853b0 T ixgbe_get_pcie_msix_count_generic +ffffffff81785430 T ixgbe_insert_mac_addr_generic +ffffffff81785640 T ixgbe_set_vmdq +ffffffff81785680 T ixgbe_set_rar +ffffffff817856d0 T ixgbe_clear_vmdq +ffffffff81785710 T ixgbe_clear_vmdq_generic +ffffffff817858c0 T ixgbe_set_vmdq_generic +ffffffff81785970 T ixgbe_init_uta_tables_generic +ffffffff817859f0 T ixgbe_find_vlvf_slot +ffffffff81785aa0 T ixgbe_set_vfta_generic +ffffffff81785bb0 T ixgbe_set_vlvf_generic +ffffffff81785e40 T ixgbe_clear_vfta_generic +ffffffff81785f40 T ixgbe_need_crosstalk_fix +ffffffff81785f90 T ixgbe_check_mac_link_generic +ffffffff81786180 T ixgbe_get_device_caps_generic +ffffffff817861d0 T ixgbe_calculate_checksum +ffffffff81786290 T ixgbe_hic_unlocked +ffffffff81786450 T ixgbe_host_interface_command +ffffffff81786620 T ixgbe_clear_tx_pending +ffffffff817867e0 T ixgbe_mng_present +ffffffff81786850 T ixgbe_mng_enabled +ffffffff81786910 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff81786cb0 T ixgbe_flap_tx_laser +ffffffff81786cf0 T ixgbe_check_link +ffffffff81786d40 T ixgbe_set_soft_rate_select_speed +ffffffff81786e30 T ixgbe_init_shared_code +ffffffff81786ee0 T ixgbe_set_mac_type +ffffffff81787080 T ixgbe_init_hw +ffffffff817870c0 T ixgbe_get_media_type +ffffffff81787100 T ixgbe_read_mbx +ffffffff81787160 T ixgbe_write_mbx +ffffffff817871b0 T ixgbe_check_for_msg +ffffffff817871f0 T ixgbe_check_for_ack +ffffffff81787230 T ixgbe_check_for_rst +ffffffff81787270 T ixgbe_poll_for_msg +ffffffff81787330 T ixgbe_poll_for_ack +ffffffff817873f0 T ixgbe_read_posted_mbx +ffffffff817874d0 T ixgbe_write_posted_mbx +ffffffff817875a0 T ixgbe_init_mbx_ops_generic +ffffffff817875e0 T ixgbe_read_v2p_mailbox +ffffffff81787650 T ixgbe_check_for_bit_pf +ffffffff817876e0 T ixgbe_check_for_msg_pf +ffffffff81787790 T ixgbe_check_for_ack_pf +ffffffff81787830 T ixgbe_check_for_rst_pf +ffffffff81787920 T ixgbe_obtain_mbx_lock_pf +ffffffff817879b0 T ixgbe_write_mbx_pf +ffffffff81787b80 T ixgbe_read_mbx_pf +ffffffff81787c90 T ixgbe_init_mbx_params_pf +ffffffff81788000 T ixgbe_set_pcie_completion_timeout +ffffffff81788090 T ixgbe_init_ops_82598 +ffffffff817881e0 T ixgbe_init_phy_ops_82598 +ffffffff817882d0 T ixgbe_start_hw_82598 +ffffffff81788480 T ixgbe_reset_hw_82598 +ffffffff817887b0 T ixgbe_get_media_type_82598 +ffffffff81788870 T ixgbe_get_supported_physical_layer_82598 +ffffffff81788a40 T ixgbe_read_analog_reg8_82598 +ffffffff81788b00 T ixgbe_write_analog_reg8_82598 +ffffffff81788b80 T ixgbe_set_lan_id_multi_port_pcie_82598 +ffffffff81788c20 T ixgbe_enable_rx_dma_82598 +ffffffff81788c70 T ixgbe_set_vmdq_82598 +ffffffff81788d20 T ixgbe_clear_vmdq_82598 +ffffffff81788dd0 T ixgbe_set_vfta_82598 +ffffffff81788f00 T ixgbe_clear_vfta_82598 +ffffffff817890b0 T ixgbe_fc_enable_82598 +ffffffff81789510 T ixgbe_read_i2c_eeprom_82598 +ffffffff81789530 T ixgbe_check_mac_link_82598 +ffffffff817897d0 T ixgbe_setup_mac_link_82598 +ffffffff81789990 T ixgbe_get_link_capabilities_82598 +ffffffff81789a60 T ixgbe_setup_copper_link_82598 +ffffffff81789b70 T ixgbe_start_mac_link_82598 +ffffffff81789c90 T ixgbe_validate_link_ready +ffffffff81789d40 T ixgbe_read_i2c_phy_82598 +ffffffff8178a000 T ixgbe_init_mac_link_ops_82599 +ffffffff8178a190 T ixgbe_disable_tx_laser_multispeed_fiber +ffffffff8178a260 T ixgbe_enable_tx_laser_multispeed_fiber +ffffffff8178a2e0 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff8178a420 T ixgbe_setup_mac_link_82599 +ffffffff8178a6a0 T ixgbe_set_hard_rate_select_speed +ffffffff8178a760 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff8178a830 T ixgbe_setup_mac_link_smartspeed +ffffffff8178abc0 T ixgbe_init_phy_ops_82599 +ffffffff8178ad10 T ixgbe_read_i2c_byte_82599 +ffffffff8178ae90 T ixgbe_write_i2c_byte_82599 +ffffffff8178b010 T ixgbe_setup_copper_link_82599 +ffffffff8178b070 T ixgbe_setup_sfp_modules_82599 +ffffffff8178b230 T prot_autoc_read_82599 +ffffffff8178b360 T prot_autoc_write_82599 +ffffffff8178b4d0 T ixgbe_reset_pipeline_82599 +ffffffff8178b810 T ixgbe_init_ops_82599 +ffffffff8178b9f0 T ixgbe_identify_phy_82599 +ffffffff8178ba80 T ixgbe_reset_hw_82599 +ffffffff8178be10 T ixgbe_get_media_type_82599 +ffffffff8178bf40 T ixgbe_get_supported_physical_layer_82599 +ffffffff8178c110 T ixgbe_enable_rx_dma_82599 +ffffffff8178c180 T ixgbe_read_analog_reg8_82599 +ffffffff8178c240 T ixgbe_write_analog_reg8_82599 +ffffffff8178c2c0 T ixgbe_start_hw_82599 +ffffffff8178c3c0 T ixgbe_get_link_capabilities_82599 +ffffffff8178c500 T ixgbe_stop_mac_link_on_d3_82599 +ffffffff8178c5c0 T ixgbe_read_eeprom_82599 +ffffffff8178c5f0 T ixgbe_start_mac_link_82599 +ffffffff8178c7f0 T ixgbe_verify_fw_version_82599 +ffffffff8178d000 T ixgbe_init_ops_X540 +ffffffff8178d220 T ixgbe_init_eeprom_params_X540 +ffffffff8178d2b0 T ixgbe_read_eerd_X540 +ffffffff8178d340 T ixgbe_write_eewr_X540 +ffffffff8178d3d0 T ixgbe_update_eeprom_checksum_X540 +ffffffff8178d4a0 T ixgbe_validate_eeprom_checksum_X540 +ffffffff8178d590 T ixgbe_calc_eeprom_checksum_X540 +ffffffff8178d730 T ixgbe_reset_hw_X540 +ffffffff8178d920 T ixgbe_get_media_type_X540 +ffffffff8178d950 T ixgbe_get_supported_physical_layer_X540 +ffffffff8178d9d0 T ixgbe_start_hw_X540 +ffffffff8178da20 T ixgbe_acquire_swfw_sync_X540 +ffffffff8178de70 T ixgbe_release_swfw_sync_X540 +ffffffff8178dfa0 T ixgbe_init_swfw_sync_X540 +ffffffff8178e080 T ixgbe_setup_mac_link_X540 +ffffffff8178e0a0 T ixgbe_blink_led_start_X540 +ffffffff8178e1c0 T ixgbe_blink_led_stop_X540 +ffffffff8178e2c0 T ixgbe_get_link_capabilities_X540 +ffffffff8178e300 T ixgbe_update_flash_X540 +ffffffff8178e4e0 T ixgbe_poll_flash_update_done_X540 +ffffffff8178e570 T ixgbe_get_swfw_sync_semaphore +ffffffff8178e700 T ixgbe_release_swfw_sync_semaphore +ffffffff8178f000 T ixgbe_init_ops_X550 +ffffffff8178f110 T ixgbe_dmac_config_X550 +ffffffff8178f1f0 T ixgbe_dmac_config_tcs_X550 +ffffffff8178f340 T ixgbe_dmac_update_tcs_X550 +ffffffff8178f400 T ixgbe_set_source_address_pruning_X550 +ffffffff8178f4f0 T ixgbe_init_eeprom_params_X550 +ffffffff8178f570 T ixgbe_calc_eeprom_checksum_X550 +ffffffff8178f590 T ixgbe_read_ee_hostif_X550 +ffffffff8178f660 T ixgbe_write_ee_hostif_X550 +ffffffff8178f720 T ixgbe_update_eeprom_checksum_X550 +ffffffff8178f8c0 T ixgbe_validate_eeprom_checksum_X550 +ffffffff8178fa10 T ixgbe_disable_rx_x550 +ffffffff8178fb30 T ixgbe_led_on_t_X550em +ffffffff8178fbf0 T ixgbe_led_off_t_X550em +ffffffff8178fcb0 T ixgbe_read_cs4227 +ffffffff8178fce0 T ixgbe_write_cs4227 +ffffffff8178fd10 T ixgbe_read_pe +ffffffff8178fd60 T ixgbe_write_pe +ffffffff8178fdc0 T ixgbe_reset_cs4227 +ffffffff81790050 T ixgbe_check_cs4227 +ffffffff81790200 T ixgbe_setup_mux_ctl +ffffffff81790290 T ixgbe_identify_phy_x550em +ffffffff817904a0 T ixgbe_read_mng_if_sel_x550em +ffffffff81790520 T ixgbe_fw_phy_activity +ffffffff81790640 T ixgbe_get_phy_id_fw +ffffffff81790750 T ixgbe_identify_phy_fw +ffffffff81790870 T ixgbe_shutdown_fw_phy +ffffffff817908d0 T ixgbe_read_phy_reg_x550em +ffffffff81790900 T ixgbe_write_phy_reg_x550em +ffffffff81790930 T ixgbe_init_ops_X550EM +ffffffff81790bd0 T ixgbe_get_bus_info_X550em +ffffffff81790c20 T ixgbe_get_media_type_X550em +ffffffff81790cf0 T ixgbe_setup_sfp_modules_X550em +ffffffff81790e80 T ixgbe_get_link_capabilities_X550em +ffffffff81790f50 T ixgbe_reset_hw_X550em +ffffffff817913d0 T ixgbe_get_supported_physical_layer_X550em +ffffffff81791550 T ixgbe_setup_fc_X550em +ffffffff817916b0 T ixgbe_init_phy_ops_X550em +ffffffff81791b80 T ixgbe_setup_fw_link +ffffffff81791ca0 T ixgbe_fc_autoneg_fw +ffffffff81791cd0 T ixgbe_setup_eee_fw +ffffffff81791d30 T ixgbe_init_ops_X550EM_a +ffffffff81791e60 T ixgbe_read_iosf_sb_reg_x550 +ffffffff81791fd0 T ixgbe_write_iosf_sb_reg_x550 +ffffffff81792140 T ixgbe_read_iosf_sb_reg_x550a +ffffffff817921d0 T ixgbe_write_iosf_sb_reg_x550a +ffffffff81792260 T ixgbe_acquire_swfw_sync_X550a +ffffffff817923a0 T ixgbe_release_swfw_sync_X550a +ffffffff81792440 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff81792480 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff817925e0 T ixgbe_setup_fc_backplane_x550em_a +ffffffff817927d0 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff817928c0 T ixgbe_init_ops_X550EM_x +ffffffff81792980 T ixgbe_acquire_swfw_sync_X550em +ffffffff81792a40 T ixgbe_release_swfw_sync_X550em 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ixgbe_setup_internal_phy_t_x550em +ffffffff81794180 T ixgbe_enter_lplu_t_x550em +ffffffff817943d0 T ixgbe_handle_lasi_ext_t_x550em +ffffffff81794450 T ixgbe_reset_phy_t_X550em +ffffffff817944a0 T ixgbe_set_mdio_speed +ffffffff81794570 T ixgbe_init_ext_t_x550em +ffffffff81794620 T ixgbe_setup_sfi_x550a +ffffffff817947d0 T ixgbe_setup_ixfi_x550em_x +ffffffff817949b0 T ixgbe_setup_ixfi_x550em +ffffffff81794b90 T ixgbe_ext_phy_t_x550em_get_link +ffffffff81794c20 T ixgbe_setup_phy_loopback_x550em +ffffffff81794e10 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff81794fb0 T ixgbe_write_ee_hostif_data_X550 +ffffffff81795020 T ixgbe_checksum_ptr_x550 +ffffffff817951b0 T ixgbe_calc_checksum_X550 +ffffffff81795340 T ixgbe_update_flash_X550 +ffffffff81795390 T ixgbe_get_lcd_t_x550em +ffffffff81795450 T ixgbe_set_mux +ffffffff81796000 T ixgbe_read_i2c_combined_generic_int +ffffffff81796260 T ixgbe_i2c_start +ffffffff817963b0 t ixgbe_out_i2c_byte_ack +ffffffff81796400 T ixgbe_clock_in_i2c_byte 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ixgbe_identify_qsfp_module_generic +ffffffff81798f30 T ixgbe_get_supported_phy_sfp_layer_generic +ffffffff817990d0 T ixgbe_is_sfp_probe +ffffffff81799120 T ixgbe_read_i2c_byte_generic_int +ffffffff81799320 T ixgbe_clock_out_i2c_byte +ffffffff81799480 T ixgbe_get_i2c_ack +ffffffff81799680 T ixgbe_write_i2c_byte_generic_int +ffffffff817997b0 T ixgbe_set_i2c_data +ffffffff81799960 T ixgbe_raise_i2c_clk +ffffffff81799a80 T ixgbe_lower_i2c_clk +ffffffff81799b10 T ixgbe_clock_in_i2c_bit +ffffffff81799cd0 T ixgbe_get_i2c_data +ffffffff81799d80 T ixgbe_set_copper_phy_power +ffffffff8179a000 t ixl_match +ffffffff8179a0a0 t ixl_attach +ffffffff8179b5f0 t ixl_710_rd_ctl +ffffffff8179b6b0 t ixl_710_wr_ctl +ffffffff8179b780 t ixl_710_set_rss_key +ffffffff8179b900 t ixl_710_set_rss_lut +ffffffff8179b980 t ixl_atq_exec +ffffffff8179baf0 t ixl_wakeup +ffffffff8179bb10 t ixl_722_rd_ctl +ffffffff8179bb40 t ixl_722_wr_ctl +ffffffff8179bb70 t ixl_722_set_rss_key +ffffffff8179bba0 t ixl_722_set_rss_lut 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ixl_arq_unfill +ffffffff817a0070 t ixl_link_state_update_iaq +ffffffff817a0110 t ixl_set_link_status +ffffffff817a0280 t ixl_atq_poll +ffffffff817a0480 t ixl_rxeof +ffffffff817a0760 t ixl_txeof +ffffffff817a0950 t ixl_rxfill +ffffffff817a0c50 t ixl_down +ffffffff817a12a0 t ixl_rxr_free +ffffffff817a13b0 t ixl_txr_free +ffffffff817a14b0 t ixl_rxrefill +ffffffff817a14d0 t ixl_sfp_open +ffffffff817a16d0 t ixl_sfp_get +ffffffff817a17f0 t ixl_sfp_close +ffffffff817a1910 t ixl_qsfp_open +ffffffff817a1950 t ixl_qsfp_get +ffffffff817a1a70 t ixl_qsfp_close +ffffffff817a1aa0 t ixl_kstat_tick +ffffffff817a1b00 t ixl_kstat_create +ffffffff817a1ce0 t ixl_kstat_read +ffffffff817a2000 T dwqe_pci_match +ffffffff817a2030 T dwqe_pci_attach +ffffffff817a3000 T xge_match +ffffffff817a3030 T xge_attach +ffffffff817a3da0 T xge_setup_xgxs_xena +ffffffff817a3e30 T xge_setup_xgxs_herc +ffffffff817a3ec0 T xge_alloc_txmem +ffffffff817a40d0 T xge_alloc_rxmem +ffffffff817a43b0 T xge_add_rxbuf +ffffffff817a45a0 T xge_xgmii_mediachange +ffffffff817a45d0 T xge_ifmedia_status +ffffffff817a4650 T xge_ioctl +ffffffff817a48e0 T xge_start +ffffffff817a4c50 T xge_intr +ffffffff817a5220 T xge_enable +ffffffff817a52d0 T xge_init +ffffffff817a5760 T xge_stop +ffffffff817a5830 T xge_setpromisc +ffffffff817a58b0 T xge_setmulti +ffffffff817a6000 T thtc_match +ffffffff817a6060 T thtc_attach +ffffffff817a6280 T tht_match +ffffffff817a62b0 T tht_attach +ffffffff817a64e0 T thtc_lookup +ffffffff817a6560 T tht_intr +ffffffff817a6720 T thtc_print +ffffffff817a6790 T tht_sw_reset +ffffffff817a6c80 T tht_lladdr_read +ffffffff817a6d30 T tht_ioctl +ffffffff817a6ec0 T tht_start +ffffffff817a7460 T tht_watchdog +ffffffff817a7490 T tht_media_change +ffffffff817a74c0 T tht_media_status +ffffffff817a75b0 T tht_mountroot +ffffffff817a7780 T tht_fifo_alloc +ffffffff817a7890 T tht_fw_load +ffffffff817a7be0 T tht_fifo_free +ffffffff817a7c90 T tht_link_state +ffffffff817a7d40 T tht_write +ffffffff817a7d90 T tht_read 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oce_new_cq +ffffffff817b8be0 T oce_load_ring +ffffffff817b8cf0 T oce_mbox_dispatch +ffffffff817b8ec0 T oce_macaddr_add +ffffffff817b8ff0 T oce_macaddr_del +ffffffff817b9100 T oce_stats_be2 +ffffffff817b9230 T oce_stats_be3 +ffffffff817b9350 T oce_stats_xe +ffffffff817ba000 T dc_pci_match +ffffffff817ba090 T dc_pci_attach +ffffffff817ba820 T dc_pci_detach +ffffffff817bb000 T epic_pci_match +ffffffff817bb030 T epic_pci_attach +ffffffff817bc000 T ti_pci_match +ffffffff817bc030 T ti_pci_attach +ffffffff817bd000 T ne_pci_match +ffffffff817bd100 T ne_pci_attach +ffffffff817bd460 T ne_pci_lookup +ffffffff817be000 T gem_match_pci +ffffffff817be030 T gem_attach_pci +ffffffff817be2a0 T gem_detach_pci +ffffffff817be320 T gem_pci_enaddr +ffffffff817bf000 T cas_match +ffffffff817bf030 T cas_attach +ffffffff817bf1c0 T cas_pci_enaddr +ffffffff817bf490 T cas_intr +ffffffff817bf610 T cas_config +ffffffff817bfd10 T cas_reset +ffffffff817bfdd0 T cas_start +ffffffff817bff20 T cas_ioctl +ffffffff817c0070 T cas_watchdog +ffffffff817c00c0 T cas_mii_readreg +ffffffff817c0190 T cas_mii_writereg +ffffffff817c0280 T cas_mii_statchg +ffffffff817c0340 T cas_mediachange +ffffffff817c03a0 T cas_mediastatus +ffffffff817c0400 T cas_mifinit +ffffffff817c0460 T cas_pcs_readreg +ffffffff817c04f0 T cas_pcs_writereg +ffffffff817c0650 T cas_tick +ffffffff817c0820 T cas_bitwait +ffffffff817c08d0 T cas_reset_rx +ffffffff817c0a70 T cas_reset_tx +ffffffff817c0c10 T cas_rxdrain +ffffffff817c0c40 T cas_stop +ffffffff817c0d90 T cas_disable_rx +ffffffff817c0e50 T cas_disable_tx +ffffffff817c0f10 T cas_meminit +ffffffff817c10d0 T cas_ringsize +ffffffff817c11b0 T cas_cringsize +ffffffff817c12a0 T cas_init +ffffffff817c1720 T cas_init_regs +ffffffff817c1bb0 T cas_iff +ffffffff817c1f30 T cas_rint +ffffffff817c2450 T cas_add_rxbuf +ffffffff817c2550 T cas_eint +ffffffff817c25b0 T cas_pint +ffffffff817c2620 T cas_tint +ffffffff817c27b0 T cas_encap +ffffffff817c3000 T sf_pci_match +ffffffff817c3030 T sf_pci_attach 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sis_ifmedia_upd +ffffffff817c7e70 T sis_ifmedia_sts +ffffffff817c7ed0 T sis_stop +ffffffff817c81c0 T sis_init +ffffffff817c8600 T sis_ring_init +ffffffff817c87c0 T sis_fill_rx_ring +ffffffff817c8870 T sis_newbuf +ffffffff817c89c0 T sis_rxeof +ffffffff817c8c10 T sis_txeof +ffffffff817c8de0 T sis_encap +ffffffff817ca000 T se_match +ffffffff817ca030 T se_attach +ffffffff817ca7a0 T se_activate +ffffffff817ca830 T se_read_eeprom +ffffffff817ca940 T se_get_mac_addr_eeprom +ffffffff817cac90 T se_pcib_match +ffffffff817cacf0 T se_get_mac_addr_apc +ffffffff817cafc0 T se_miibus_cmd +ffffffff817cb060 T se_miibus_readreg +ffffffff817cb150 T se_miibus_writereg +ffffffff817cb230 T se_miibus_statchg +ffffffff817cb390 T se_iff +ffffffff817cb4e0 T se_reset +ffffffff817cb610 T se_intr +ffffffff817cb790 T se_tick +ffffffff817cb810 T se_ioctl +ffffffff817cb950 T se_start +ffffffff817cba90 T se_watchdog +ffffffff817cbb00 T se_ifmedia_upd +ffffffff817cbb70 T se_ifmedia_sts +ffffffff817cbbd0 T se_stop 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pccbbintr_function +ffffffff817d38f0 T pccbb_ctrl +ffffffff817d3a30 T pccbb_detect_card +ffffffff817d3aa0 T cb_detect_voltage +ffffffff817d3af0 T cb_reset +ffffffff817d3c40 T pccbb_cardenable +ffffffff817d3d00 T pccbb_cb_intr_establish +ffffffff817d3d20 T pccbb_intr_establish +ffffffff817d3e70 T pccbb_cb_intr_disestablish +ffffffff817d3e80 T pccbb_intr_disestablish +ffffffff817d3fc0 T pccbb_pcmcia_io_alloc +ffffffff817d40c0 T pccbb_pcmcia_io_free +ffffffff817d40f0 T pccbb_pcmcia_io_map +ffffffff817d41b0 T pccbb_pcmcia_do_io_map +ffffffff817d4310 T pccbb_pcmcia_io_unmap +ffffffff817d43b0 T pccbb_pcmcia_wait_ready +ffffffff817d4460 T pccbb_pcmcia_socket_enable +ffffffff817d47d0 T pccbb_pcmcia_do_mem_map +ffffffff817d4950 T pccbb_pcmcia_socket_disable +ffffffff817d4a70 T pccbb_pcmcia_card_detect +ffffffff817d4ad0 T pccbb_pcmcia_mem_alloc +ffffffff817d4ba0 T pccbb_pcmcia_mem_free +ffffffff817d4bd0 T pccbb_pcmcia_mem_map +ffffffff817d4cf0 T pccbb_pcmcia_mem_unmap +ffffffff817d4d80 T pccbb_pcmcia_intr_establish +ffffffff817d4da0 T pccbb_pcmcia_intr_disestablish +ffffffff817d4dc0 T pccbb_pcmcia_intr_string +ffffffff817d4e00 T pccbb_rbus_cb_space_alloc +ffffffff817d4f20 T pccbb_open_win +ffffffff817d50b0 T pccbb_rbus_cb_space_free +ffffffff817d51c0 T pccbb_close_win +ffffffff817d5280 T pccbb_winlist_insert +ffffffff817d5380 T pccbb_winset +ffffffff817d5660 T pccbb_winlist_delete +ffffffff817d6000 T sk_xmac_miibus_readreg +ffffffff817d6170 T sk_xmac_miibus_writereg +ffffffff817d62d0 T sk_xmac_miibus_statchg +ffffffff817d6390 T sk_marv_miibus_readreg +ffffffff817d64c0 T sk_marv_miibus_writereg +ffffffff817d65e0 T sk_marv_miibus_statchg +ffffffff817d6610 T sk_setfilt +ffffffff817d66e0 T sk_iff +ffffffff817d6710 T sk_iff_xmac +ffffffff817d6950 T sk_iff_yukon +ffffffff817d6b50 T sk_init_rx_ring +ffffffff817d6c90 T sk_fill_rx_ring +ffffffff817d6d10 T sk_newbuf +ffffffff817d6e70 T sk_init_tx_ring +ffffffff817d7070 T sk_ifmedia_upd +ffffffff817d70c0 T sk_ifmedia_sts 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msk_init_rx_ring +ffffffff817dc5d0 T msk_fill_rx_ring +ffffffff817dc840 T msk_init_tx_ring +ffffffff817dc950 T msk_ifmedia_upd +ffffffff817dc9a0 T msk_ifmedia_sts +ffffffff817dca00 T msk_ioctl +ffffffff817dcbb0 T msk_init +ffffffff817dd530 T msk_stop +ffffffff817dd970 T mskc_probe +ffffffff817dd9a0 T mskc_reset +ffffffff817de210 T msk_probe +ffffffff817de260 T msk_reset +ffffffff817de350 T msk_attach +ffffffff817de900 T msk_start +ffffffff817dece0 T msk_watchdog +ffffffff817dee40 T msk_init_yukon +ffffffff817df350 T msk_tick +ffffffff817df3b0 T msk_fill_rx_tick +ffffffff817df420 T msk_kstat_attach +ffffffff817df580 T msk_detach +ffffffff817df6f0 T msk_kstat_detach +ffffffff817df780 T msk_activate +ffffffff817df8b0 T mskcprint +ffffffff817df920 T mskc_attach +ffffffff817e0110 T msk_intr +ffffffff817e0870 T mskc_detach +ffffffff817e0950 T mskc_activate +ffffffff817e0990 T msk_rxeof +ffffffff817e0b00 T msk_txeof +ffffffff817e0c40 T msk_intr_yukon +ffffffff817e0d30 T msk_kstat_read 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iwn_attach +ffffffff817f88f0 T iwn_detach +ffffffff817f8ce0 T iwn_activate +ffffffff817f8da0 T iwn_intr +ffffffff817f9270 T iwn4965_attach +ffffffff817f93c0 T iwn5000_attach +ffffffff817f9710 T iwn_hw_prepare +ffffffff817f9a70 T iwn_read_eeprom +ffffffff817f9d20 T iwn_alloc_fwmem +ffffffff817f9d50 T iwn_alloc_kw +ffffffff817f9d80 T iwn_alloc_ict +ffffffff817f9dc0 T iwn_alloc_sched +ffffffff817f9e00 T iwn_alloc_tx_ring +ffffffff817f9f70 T iwn_alloc_rx_ring +ffffffff817fa180 T iwn_ioctl +ffffffff817fa420 T iwn_start +ffffffff817fa5c0 T iwn_watchdog +ffffffff817fa6b0 T iwn_node_alloc +ffffffff817fa6d0 T iwn_bgscan +ffffffff817fa750 T iwn_newassoc +ffffffff817fa840 T iwn_updateedca +ffffffff817fab50 T iwn_set_key +ffffffff817fac80 T iwn_delete_key +ffffffff817fad90 T iwn_updatechan +ffffffff817fae90 T iwn_updateprot +ffffffff817faf20 T iwn_updateslot +ffffffff817fafa0 T iwn_ampdu_rx_start +ffffffff817fb080 T iwn_ampdu_rx_stop +ffffffff817fb150 T iwn_ampdu_tx_start +ffffffff817fb360 T iwn_ampdu_tx_stop +ffffffff817fb5e0 T iwn_newstate +ffffffff817fb8a0 T iwn_media_change +ffffffff817fba00 T iwn_radiotap_attach +ffffffff817fba90 T iwn_calib_timeout +ffffffff817fbcb0 T iwn_init_task +ffffffff817fbd20 T iwn_free_tx_ring +ffffffff817fbf10 T iwn_free_sched +ffffffff817fc000 T iwn_free_ict +ffffffff817fc0f0 T iwn_free_kw +ffffffff817fc1e0 T iwn_free_fwmem +ffffffff817fc2d0 T iwn4965_load_firmware +ffffffff817fc920 T iwn4965_read_eeprom +ffffffff817fca70 T iwn4965_post_alive +ffffffff817fcf40 T iwn4965_nic_config +ffffffff817fd020 T iwn4965_reset_sched +ffffffff817fd050 T iwn4965_update_sched +ffffffff817fd130 T iwn4965_update_rxon +ffffffff817fd2f0 T iwn4965_get_temperature +ffffffff817fd370 T iwn4965_get_rssi +ffffffff817fd3e0 T iwn4965_set_txpower +ffffffff817fd8d0 T iwn4965_init_gains +ffffffff817fda70 T iwn4965_set_gains +ffffffff817fdda0 T iwn4965_add_node +ffffffff817fde30 T iwn4965_tx_done +ffffffff817fdf90 T iwn4965_ampdu_tx_start +ffffffff817fe3a0 T iwn4965_ampdu_tx_stop +ffffffff817fe5a0 T iwn5000_load_firmware +ffffffff817fe6b0 T iwn5000_read_eeprom +ffffffff817fe900 T iwn5000_post_alive +ffffffff817ff120 T iwn5000_nic_config +ffffffff817ff500 T iwn5000_reset_sched +ffffffff817ff5f0 T iwn5000_update_sched +ffffffff817ff6e0 T iwn5000_update_rxon +ffffffff817ff8d0 T iwn5000_get_temperature +ffffffff817ff930 T iwn5000_get_rssi +ffffffff817ff980 T iwn5000_set_txpower +ffffffff817ff9d0 T iwn5000_init_gains +ffffffff817ffb70 T iwn5000_set_gains +ffffffff817ffe20 T iwn5000_add_node +ffffffff817ffe50 T iwn5000_tx_done +ffffffff81800060 T iwn5000_ampdu_tx_start +ffffffff818004a0 T iwn5000_ampdu_tx_stop +ffffffff81800720 T iwn_free_rx_ring +ffffffff81800910 T iwn_stop +ffffffff81800990 T iwn_wakeup +ffffffff81800a40 T iwn_init +ffffffff81800d40 T iwn_nic_lock +ffffffff81800e00 T iwn_eeprom_lock +ffffffff81800ed0 T iwn_init_otprom +ffffffff81801330 T iwn_clock_wait +ffffffff81801400 T iwn_read_prom_data +ffffffff818017e0 T iwn_dma_contig_alloc +ffffffff818019d0 T iwn_dma_contig_free +ffffffff81801a90 T iwn_reset_rx_ring +ffffffff81801c20 T iwn_reset_tx_ring +ffffffff81801d20 T iwn5000_ict_reset +ffffffff81801e00 T iwn_apm_init +ffffffff81802240 T iwn_apm_stop +ffffffff81802380 T iwn_read_eeprom_channels +ffffffff81802510 T iwn_read_eeprom_enhinfo +ffffffff81802690 T iwn_scan_abort +ffffffff81802820 T iwn_set_led +ffffffff818029e0 T iwn_cmd +ffffffff81802d20 T iwn_scan +ffffffff81803210 T iwn_auth +ffffffff818034c0 T iwn_run +ffffffff81803960 T iwn_iter_func +ffffffff818039f0 T iwn_set_link_quality +ffffffff81803e70 T iwn_ccmp_decap +ffffffff81803f70 T iwn_rx_phy +ffffffff81804050 T iwn_rx_done +ffffffff81804660 T iwn_ra_choose +ffffffff818046e0 T iwn_ampdu_rate_control +ffffffff81804820 T iwn_ht_single_rate_control +ffffffff81804a00 T iwn_rx_compressed_ba +ffffffff81804b90 T iwn_ampdu_txq_advance +ffffffff81804d20 T iwn_clear_oactive +ffffffff81804da0 T iwn5000_rx_calib_results +ffffffff81804f10 T iwn_rx_statistics +ffffffff818050b0 T iwn4965_power_calibration +ffffffff81805100 T iwn_get_noise +ffffffff81805170 T iwn_collect_noise +ffffffff81805480 T iwn_tune_sensitivity +ffffffff81805c30 T iwn_tx_done_free_txdata +ffffffff81805ce0 T iwn_ampdu_tx_done +ffffffff81805f90 T iwn_tx_done +ffffffff818061e0 T iwn_cmd_done +ffffffff818062d0 T iwn_notif_intr +ffffffff81806940 T iwn_init_sensitivity +ffffffff81806bf0 T iwn_wakeup_intr +ffffffff81806cb0 T iwn_fatal_intr +ffffffff81806fa0 T iwn_rval2ridx +ffffffff81807020 T iwn_tx +ffffffff81807b00 T iwn_rxon_ht40_enabled +ffffffff81807b40 T iwn_set_pslevel +ffffffff81807d00 T iwn_add_broadcast_node +ffffffff81807f50 T iwn_set_critical_temp +ffffffff81808130 T iwn_set_timing +ffffffff81808300 T iwn_send_sensitivity +ffffffff81808400 T iwn_send_btcoex +ffffffff818085a0 T iwn_send_advanced_btcoex +ffffffff81808ce0 T iwn5000_runtime_calib +ffffffff81808ed0 T iwn_config +ffffffff818093b0 T iwn6000_temp_offset_calib +ffffffff81809560 T iwn2000_temp_offset_calib +ffffffff81809740 T iwn_get_active_dwell_time +ffffffff81809780 T iwn_limit_dwell +ffffffff818097f0 T iwn_get_passive_dwell_time +ffffffff81809870 T iwn_rxon_configure_ht40 +ffffffff81809910 T iwn_update_rxon_restore_power +ffffffff81809bd0 T iwn5000_query_calibration +ffffffff81809e20 T iwn5000_send_calibration +ffffffff81809f70 T iwn5000_send_wimax_coex +ffffffff8180a140 T iwn5000_crystal_calib +ffffffff8180a2f0 T iwn_hw_stop +ffffffff8180a6e0 T iwn_hw_init +ffffffff8180ad80 T iwn4965_load_bootcode +ffffffff8180b120 T iwn5000_load_firmware_section +ffffffff8180b360 T iwn_read_firmware_leg +ffffffff8180b470 T iwn_read_firmware_tlv +ffffffff8180b6f0 T iwn_read_firmware +ffffffff8180b920 T iwn_apm_stop_master +ffffffff8180c000 T iwm_lookup_cmd_ver +ffffffff8180c070 T iwm_is_mimo_ht_plcp +ffffffff8180c0b0 T iwm_is_mimo_ht_mcs +ffffffff8180c100 T iwm_store_cscheme +ffffffff8180c150 T iwm_firmware_store_section +ffffffff8180c1f0 T iwm_set_default_calib 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iwm_free_tx_ring +ffffffff8180e670 T iwm_reset_tx_ring +ffffffff8180e830 T iwm_enable_rfkill_int +ffffffff8180e950 T iwm_check_rfkill +ffffffff8180e9d0 T iwm_enable_interrupts +ffffffff8180ea80 T iwm_enable_fwload_interrupt +ffffffff8180eb50 T iwm_restore_interrupts +ffffffff8180eb80 T iwm_disable_interrupts +ffffffff8180ec40 T iwm_ict_reset +ffffffff8180ee00 T iwm_set_hw_ready +ffffffff8180efe0 T iwm_prepare_card_hw +ffffffff8180f120 T iwm_apm_config +ffffffff8180f200 T iwm_apm_init +ffffffff8180f8f0 T iwm_apm_stop +ffffffff8180fcb0 T iwm_init_msix_hw +ffffffff8180fd50 T iwm_conf_msix_hw +ffffffff818102a0 T iwm_clear_persistence_bit +ffffffff818103f0 T iwm_start_hw +ffffffff81810610 T iwm_stop_device +ffffffff81810c30 T iwm_nic_config +ffffffff81810d10 T iwm_nic_rx_init +ffffffff81810d30 T iwm_nic_rx_mq_init +ffffffff81811130 T iwm_nic_rx_legacy_init +ffffffff81811370 T iwm_nic_tx_init +ffffffff81811560 T iwm_nic_init +ffffffff818116c0 T iwm_enable_ac_txq +ffffffff81811b40 T iwm_enable_txq +ffffffff81811d20 T iwm_send_cmd_pdu +ffffffff81811da0 T iwm_disable_txq +ffffffff81811e80 T iwm_post_alive +ffffffff81812400 T iwm_phy_db_get_section +ffffffff818124a0 T iwm_phy_db_set_section +ffffffff818125e0 T iwm_is_valid_channel +ffffffff81812650 T iwm_ch_id_to_ch_index +ffffffff818126d0 T iwm_channel_id_to_papd +ffffffff81812770 T iwm_channel_id_to_txp +ffffffff81812900 T iwm_phy_db_get_section_data +ffffffff81812a90 T iwm_send_phy_db_cmd +ffffffff81812b30 T iwm_send_cmd +ffffffff81813210 T iwm_phy_db_send_all_channel_groups +ffffffff818133f0 T iwm_send_phy_db_data +ffffffff81813630 T iwm_send_time_event_cmd +ffffffff81813740 T iwm_free_resp +ffffffff818137c0 T iwm_protect_session +ffffffff81813870 T iwm_unprotect_session +ffffffff81813920 T iwm_nvm_read_chunk +ffffffff81813a80 T iwm_nvm_read_section +ffffffff81813b40 T iwm_fw_valid_tx_ant +ffffffff81813b80 T iwm_fw_valid_rx_ant +ffffffff81813bd0 T iwm_valid_siso_ant_rate_mask +ffffffff81813c30 T iwm_init_channel_map +ffffffff81813d90 T iwm_mimo_enabled +ffffffff81813dd0 T iwm_setup_ht_rates +ffffffff81813e80 T iwm_setup_vht_rates +ffffffff81813f10 T iwm_init_reorder_buffer +ffffffff81813f70 T iwm_clear_reorder_buffer +ffffffff81814030 T iwm_rx_ba_session_expired +ffffffff81814130 T iwm_reorder_timer_expired +ffffffff81814300 T iwm_release_frames +ffffffff818144f0 T iwm_sta_rx_agg +ffffffff818149e0 T iwm_send_cmd_pdu_status +ffffffff81814a70 T iwm_mac_ctxt_task +ffffffff81814bd0 T iwm_mac_ctxt_cmd +ffffffff81814dd0 T iwm_updateprot +ffffffff81814e90 T iwm_add_task +ffffffff81814f00 T iwm_updateslot +ffffffff81814fc0 T iwm_updateedca +ffffffff81815080 T iwm_phy_ctxt_task +ffffffff81815240 T iwm_phy_ctxt_update +ffffffff818153c0 T iwm_setrates +ffffffff81815550 T iwm_updatechan +ffffffff81815610 T iwm_updatedtim +ffffffff818156d0 T iwm_sta_tx_agg +ffffffff81815bb0 T iwm_flush_sta +ffffffff81815d50 T iwm_txq_advance +ffffffff81815f30 T iwm_clear_oactive +ffffffff81815fb0 T iwm_ba_task +ffffffff818161f0 T iwm_ampdu_rx_start +ffffffff818162d0 T iwm_ampdu_rx_stop +ffffffff818163b0 T iwm_ampdu_tx_start +ffffffff81816470 T iwm_ampdu_tx_stop +ffffffff81816550 T iwm_set_hw_address_8000 +ffffffff818167d0 T iwm_parse_nvm_data +ffffffff81816a40 T iwm_parse_nvm_sections +ffffffff81816b40 T iwm_nvm_init +ffffffff81816e00 T iwm_firmware_load_sect +ffffffff81816eb0 T iwm_firmware_load_chunk +ffffffff81817160 T iwm_load_firmware_7000 +ffffffff818173c0 T iwm_load_cpu_sections_8000 +ffffffff81817770 T iwm_load_firmware_8000 +ffffffff81817980 T iwm_load_firmware +ffffffff81817a60 T iwm_start_fw +ffffffff81817c30 T iwm_send_tx_ant_cfg +ffffffff81817cc0 T iwm_send_phy_cfg_cmd +ffffffff81817d70 T iwm_send_dqa_cmd +ffffffff81817e00 T iwm_load_ucode_wait_alive +ffffffff81817f40 T iwm_save_fw_paging +ffffffff81817fb0 T iwm_send_paging_cmd +ffffffff81818100 T iwm_free_fw_paging +ffffffff81818270 T iwm_run_init_mvm_ucode +ffffffff818185b0 T iwm_send_bt_init_conf +ffffffff81818650 T iwm_sf_config +ffffffff81818860 T iwm_config_ltr +ffffffff81818920 T iwm_get_signal_strength +ffffffff81818980 T iwm_rxmq_get_signal_strength +ffffffff818189d0 T iwm_rx_rx_phy_cmd +ffffffff81818a30 T iwm_get_noise +ffffffff81818aa0 T iwm_ccmp_decap +ffffffff81818ba0 T iwm_rx_hwdecrypt +ffffffff81818c70 T iwm_rx_frame +ffffffff81818fa0 T iwm_rx_mpdu +ffffffff818191b0 T iwm_flip_address +ffffffff81819210 T iwm_detect_duplicate +ffffffff81819330 T iwm_is_sn_less +ffffffff81819390 T iwm_oldsn_workaround +ffffffff81819450 T iwm_rx_reorder +ffffffff818199c0 T iwm_rx_mpdu_mq +ffffffff81819dc0 T iwm_ra_choose +ffffffff81819e80 T iwm_ht_single_rate_control +ffffffff8181a0a0 T iwm_vht_single_rate_control +ffffffff8181a2f0 T iwm_rx_tx_cmd_single +ffffffff8181a4c0 T iwm_txd_done +ffffffff8181a590 T iwm_reset_sched +ffffffff8181a640 T iwm_ampdu_tx_done +ffffffff8181a9b0 T iwm_rx_tx_cmd +ffffffff8181ab90 T iwm_ampdu_rate_control +ffffffff8181ad30 T iwm_rx_compressed_ba +ffffffff8181aec0 T iwm_rx_bmiss +ffffffff8181afb0 T iwm_binding_cmd +ffffffff8181b130 T iwm_phy_ctxt_cmd_hdr +ffffffff8181b1a0 T iwm_phy_ctxt_cmd_data +ffffffff8181b310 T iwm_get_vht_ctrl_pos +ffffffff8181b380 T iwm_phy_ctxt_cmd_uhb +ffffffff8181b5b0 T iwm_phy_ctxt_cmd +ffffffff8181b700 T iwm_update_sched +ffffffff8181b7d0 T iwm_send_cmd_status +ffffffff8181b8f0 T iwm_cmd_done +ffffffff8181ba90 T iwm_tx_fill_cmd +ffffffff8181beb0 T iwm_rval2ridx +ffffffff8181bf40 T iwm_tx +ffffffff8181c9e0 T iwm_flush_tx_path +ffffffff8181cab0 T iwm_wait_tx_queues_empty +ffffffff8181cb70 T iwm_led_enable +ffffffff8181cba0 T iwm_led_disable +ffffffff8181cbd0 T iwm_led_is_enabled +ffffffff8181cc30 T iwm_led_blink_timeout +ffffffff8181ccb0 T iwm_led_blink_start +ffffffff8181cd00 T iwm_led_blink_stop +ffffffff8181cd50 T iwm_beacon_filter_send_cmd +ffffffff8181cde0 T iwm_beacon_filter_set_cqm_params +ffffffff8181ce20 T iwm_update_beacon_abort +ffffffff8181cf10 T iwm_power_build_cmd +ffffffff8181cfa0 T iwm_power_mac_update_mode +ffffffff8181d1b0 T iwm_power_update_device +ffffffff8181d250 T iwm_enable_beacon_filter +ffffffff8181d340 T iwm_disable_beacon_filter +ffffffff8181d420 T iwm_add_sta_cmd +ffffffff8181d810 T iwm_add_aux_sta +ffffffff8181d9b0 T iwm_drain_sta +ffffffff8181db60 T iwm_rm_sta_cmd +ffffffff8181dc20 T iwm_scan_rx_chain +ffffffff8181dc90 T iwm_scan_rate_n_flags +ffffffff8181dd90 T iwm_lmac_scan_fill_channels +ffffffff8181de70 T iwm_umac_scan_fill_channels +ffffffff8181df40 T iwm_fill_probe_req_v1 +ffffffff8181dfe0 T iwm_fill_probe_req +ffffffff8181e210 T iwm_lmac_scan +ffffffff8181e720 T iwm_config_umac_scan +ffffffff8181e930 T iwm_umac_scan_size +ffffffff8181e9a0 T iwm_get_scan_req_umac_chan_param +ffffffff8181e9f0 T iwm_get_scan_req_umac_data +ffffffff8181ea40 T iwm_umac_scan +ffffffff8181eea0 T iwm_mcc_update +ffffffff8181ef30 T iwm_ridx2rate +ffffffff8181efa0 T iwm_ack_rates +ffffffff8181f260 T iwm_mac_ctxt_cmd_common +ffffffff8181f570 T iwm_mac_ctxt_cmd_fill_sta +ffffffff8181f630 T iwm_update_quotas +ffffffff8181f9f0 T iwm_del_task +ffffffff8181fa50 T iwm_scan +ffffffff8181fcc0 T iwm_scan_abort +ffffffff8181fde0 T iwm_bgscan +ffffffff8181fe80 T iwm_bgscan_done +ffffffff8181ff20 T iwm_bgscan_done_task +ffffffff81820170 T iwm_umac_scan_abort +ffffffff81820200 T iwm_lmac_scan_abort +ffffffff818202a0 T iwm_auth +ffffffff81820610 T iwm_deauth +ffffffff81820970 T iwm_run +ffffffff81820ea0 T iwm_allow_mcast +ffffffff81820fa0 T iwm_run_stop +ffffffff818215c0 T iwm_node_alloc +ffffffff818215e0 T iwm_set_key_v1 +ffffffff81821720 T iwm_set_key +ffffffff81821980 T iwm_delete_key_v1 +ffffffff81821ab0 T iwm_delete_key +ffffffff81821d20 T iwm_calib_timeout +ffffffff81821de0 T iwm_set_rate_table_vht +ffffffff81822100 T iwm_set_rate_table +ffffffff818224c0 T iwm_media_change +ffffffff818226c0 T iwm_stop +ffffffff81822b40 T iwm_init +ffffffff81822e10 T iwm_newstate_task +ffffffff81822f90 T iwm_newstate +ffffffff818230f0 T iwm_endscan +ffffffff81823140 T iwm_fill_sf_command +ffffffff81823210 T iwm_send_soc_conf +ffffffff81823350 T iwm_send_update_mcc_cmd +ffffffff81823510 T iwm_send_temp_report_ths_cmd +ffffffff818235e0 T iwm_tt_tx_backoff +ffffffff81823670 T iwm_fill_paging_mem +ffffffff818239e0 T iwm_alloc_fw_paging_mem +ffffffff81823d80 T iwm_init_hw +ffffffff81824400 T iwm_preinit +ffffffff818245a0 T iwm_start +ffffffff81824770 T iwm_watchdog +ffffffff81824910 T iwm_nic_error +ffffffff81824df0 T iwm_dump_driver_status +ffffffff81824e90 T iwm_ioctl +ffffffff81824ff0 T iwm_nic_umac_error +ffffffff81825460 T iwm_desc_lookup +ffffffff818255f0 T iwm_rx_pkt_valid +ffffffff81825640 T iwm_rx_pkt +ffffffff81826400 T iwm_notif_intr +ffffffff81826560 T iwm_intr +ffffffff81826990 T iwm_intr_msix +ffffffff81826c20 T iwm_match +ffffffff81826c50 T iwm_attach_hook +ffffffff81826c90 T iwm_attach +ffffffff818279d0 T iwm_radiotap_attach +ffffffff81827a60 T iwm_init_task +ffffffff81827b20 T iwm_resume +ffffffff81827c60 T iwm_wakeup +ffffffff81827d10 T iwm_activate +ffffffff81828000 T iwx_lookup_cmd_ver +ffffffff81828070 T iwx_lookup_notif_ver +ffffffff818280e0 T iwx_is_mimo_ht_plcp +ffffffff81828120 T iwx_store_cscheme +ffffffff81828170 T iwx_ctxt_info_alloc_dma +ffffffff81828210 T iwx_dma_contig_alloc +ffffffff818283f0 T iwx_ctxt_info_free_paging +ffffffff81828550 T iwx_dma_contig_free +ffffffff81828610 T iwx_get_num_sections +ffffffff81828690 T iwx_init_fw_sec +ffffffff81828ae0 T iwx_fw_version_str +ffffffff81828b20 T iwx_alloc_fw_monitor_block +ffffffff81828bd0 T iwx_alloc_fw_monitor +ffffffff81828c90 T iwx_apply_debug_destination +ffffffff818291e0 T iwx_nic_lock +ffffffff81829330 T iwx_write_prph +ffffffff818293d0 T iwx_set_bits_prph +ffffffff818293f0 T iwx_clear_bits_prph +ffffffff81829410 T iwx_read_prph +ffffffff818294b0 T iwx_nic_unlock +ffffffff81829560 T iwx_set_ltr +ffffffff818296b0 T iwx_ctxt_info_init +ffffffff81829970 T iwx_ctxt_info_free_fw_img +ffffffff81829af0 T iwx_ctxt_info_gen3_init +ffffffff8182a0e0 T iwx_write_umac_prph +ffffffff8182a190 T iwx_firmware_store_section +ffffffff8182a230 T iwx_set_default_calib +ffffffff8182a280 T iwx_fw_info_free +ffffffff8182a310 T iwx_read_firmware +ffffffff8182ada0 T iwx_prph_addr_mask +ffffffff8182ade0 T iwx_read_prph_unlocked +ffffffff8182ae60 T iwx_nic_assert_locked +ffffffff8182aec0 T iwx_write_prph_unlocked +ffffffff8182af40 T iwx_write_prph64 +ffffffff8182b070 T iwx_read_umac_prph_unlocked +ffffffff8182b0f0 T iwx_read_umac_prph +ffffffff8182b190 T iwx_write_umac_prph_unlocked +ffffffff8182b210 T iwx_read_mem +ffffffff8182b340 T iwx_write_mem +ffffffff8182b480 T iwx_write_mem32 +ffffffff8182b590 T iwx_poll_bit +ffffffff8182b660 T iwx_set_bits_mask_prph +ffffffff8182b850 T iwx_alloc_rx_ring +ffffffff8182ba30 T iwx_rx_addbuf +ffffffff8182bc50 T iwx_free_rx_ring +ffffffff8182bf00 T iwx_disable_rx_dma +ffffffff8182c160 T iwx_reset_rx_ring +ffffffff8182c200 T iwx_alloc_tx_ring +ffffffff8182c410 T iwx_free_tx_ring +ffffffff8182c6a0 T iwx_reset_tx_ring +ffffffff8182c900 T iwx_enable_rfkill_int +ffffffff8182c9e0 T iwx_check_rfkill +ffffffff8182ca60 T iwx_enable_interrupts +ffffffff8182cb10 T iwx_enable_fwload_interrupt +ffffffff8182cbf0 T iwx_restore_interrupts +ffffffff8182cc20 T iwx_disable_interrupts +ffffffff8182cce0 T iwx_ict_reset +ffffffff8182cea0 T iwx_set_hw_ready +ffffffff8182d080 T iwx_prepare_card_hw +ffffffff8182d1c0 T iwx_force_power_gating +ffffffff8182d270 T iwx_apm_config +ffffffff8182d340 T iwx_apm_init +ffffffff8182d5a0 T iwx_apm_stop +ffffffff8182d960 T iwx_init_msix_hw +ffffffff8182da00 T iwx_conf_msix_hw +ffffffff8182dfa0 T iwx_clear_persistence_bit +ffffffff8182e120 T iwx_start_hw +ffffffff8182e520 T iwx_stop_device +ffffffff8182ea90 T iwx_nic_config +ffffffff8182eb20 T iwx_nic_rx_init +ffffffff8182eb80 T iwx_nic_init +ffffffff8182eca0 T iwx_enable_txq +ffffffff8182ef70 T iwx_send_cmd +ffffffff8182f530 T iwx_free_resp +ffffffff8182f5b0 T iwx_disable_txq +ffffffff8182f810 T iwx_post_alive +ffffffff8182f8a0 T iwx_schedule_session_protection +ffffffff8182f970 T iwx_send_cmd_pdu +ffffffff8182f9f0 T iwx_unprotect_session +ffffffff8182fac0 T iwx_fw_valid_tx_ant +ffffffff8182fb00 T iwx_fw_valid_rx_ant +ffffffff8182fb50 T iwx_init_channel_map +ffffffff8182fd50 T iwx_mimo_enabled +ffffffff8182fd90 T iwx_setup_ht_rates +ffffffff8182fe40 T iwx_setup_vht_rates +ffffffff8182fed0 T iwx_init_reorder_buffer +ffffffff8182ff30 T iwx_clear_reorder_buffer +ffffffff8182fff0 T iwx_rx_ba_session_expired +ffffffff818300f0 T iwx_rx_bar_frame_release +ffffffff818301a0 T iwx_release_frames +ffffffff81830390 T iwx_reorder_timer_expired +ffffffff81830560 T iwx_find_rxba_data +ffffffff818305f0 T iwx_sta_rx_agg_baid_cfg_cmd +ffffffff81830840 T iwx_send_cmd_pdu_status +ffffffff818308d0 T iwx_sta_rx_agg_sta_cmd +ffffffff81830b20 T iwx_sta_rx_agg +ffffffff81830df0 T iwx_mac_ctxt_task +ffffffff81830f80 T iwx_mac_ctxt_cmd +ffffffff81831180 T iwx_phy_ctxt_task +ffffffff81831330 T iwx_phy_ctxt_update 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iwx_ioctl +ffffffff8183e2a0 T iwx_nic_umac_error +ffffffff8183e710 T iwx_desc_lookup +ffffffff8183e8a0 T iwx_rx_pkt_valid +ffffffff8183e8f0 T iwx_rx_pkt +ffffffff8183f8d0 T iwx_notif_intr +ffffffff8183fa20 T iwx_intr +ffffffff8183feb0 T iwx_intr_msix +ffffffff818401b0 T iwx_match +ffffffff818401e0 T iwx_attach_hook +ffffffff81840220 T iwx_find_device_cfg +ffffffff818403c0 T iwx_attach +ffffffff818413b0 T iwx_radiotap_attach +ffffffff81841440 T iwx_init_task +ffffffff81841500 T iwx_resume +ffffffff81841640 T iwx_wakeup +ffffffff81841710 T iwx_activate +ffffffff81842000 T cmpci_match +ffffffff81842030 T cmpci_attach +ffffffff81842500 T cmpci_activate +ffffffff81842580 T cmpci_open +ffffffff818425b0 T cmpci_close +ffffffff818425e0 T cmpci_set_params +ffffffff81842f90 T cmpci_round_blocksize +ffffffff81842fc0 T cmpci_halt_output +ffffffff81843170 T cmpci_halt_input +ffffffff818432f0 T cmpci_set_port +ffffffff81843450 T cmpci_get_port +ffffffff81843520 T cmpci_query_devinfo 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bge_ape_driver_state_change +ffffffff8184a220 T bge_nvram_getbyte +ffffffff8184a470 T bge_read_nvram +ffffffff8184a520 T bge_eeprom_getbyte +ffffffff8184a6a0 T bge_read_eeprom +ffffffff8184a730 T bge_miibus_readreg +ffffffff8184aa10 T bge_miibus_writereg +ffffffff8184ad10 T bge_miibus_statchg +ffffffff8184af10 T bge_newbuf +ffffffff8184b0a0 T bge_newbuf_jumbo +ffffffff8184b320 T bge_init_rx_ring_std +ffffffff8184b480 T bge_fill_rx_ring_std +ffffffff8184b5e0 T bge_rxtick +ffffffff8184b620 T bge_rxtick_jumbo +ffffffff8184b660 T bge_fill_rx_ring_jumbo +ffffffff8184b7c0 T bge_free_rx_ring_std +ffffffff8184b8e0 T bge_init_rx_ring_jumbo +ffffffff8184bac0 T bge_free_rx_ring_jumbo +ffffffff8184bc20 T bge_free_tx_ring +ffffffff8184bd00 T bge_init_tx_ring +ffffffff8184bef0 T bge_iff +ffffffff8184c060 T bge_sig_pre_reset +ffffffff8184c0a0 T bge_sig_post_reset +ffffffff8184c120 T bge_sig_legacy +ffffffff8184c150 T bge_stop_fw +ffffffff8184c180 T bge_dma_swap_options +ffffffff8184c1d0 T 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+ffffffff81898490 T vic_stop +ffffffff818985d0 T vic_rxrinfo +ffffffff818986a0 T vic_free_dmamem +ffffffff81899000 T vmxnet3_match +ffffffff81899030 T vmxnet3_attach +ffffffff81899880 T vmxnet3_intr +ffffffff81899920 T vmxnet3_intr_event +ffffffff818999a0 T vmxnet3_intr_intx +ffffffff81899a10 T vmxnet3_intr_queue +ffffffff81899aa0 T vmxnet3_dma_init +ffffffff81899e90 T vmxnet3_ioctl +ffffffff8189a120 T vmxnet3_start +ffffffff8189a480 T vmxnet3_watchdog +ffffffff8189a4d0 T vmxnet3_media_change +ffffffff8189a500 T vmxnet3_media_status +ffffffff8189a610 T vmxnet3_link_state +ffffffff8189a6d0 T vmxnet3_dma_allocmem +ffffffff8189a820 T vmxnet3_alloc_txring +ffffffff8189a9d0 T vmxnet3_alloc_rxring +ffffffff8189ad20 t vmx_dmamem_alloc +ffffffff8189ae80 T vmxnet3_rxfill_tick +ffffffff8189aef0 T vmxnet3_txinit +ffffffff8189afe0 T vmxnet3_rxfill +ffffffff8189b2d0 T vmxnet3_rxinit +ffffffff8189b410 T vmxnet3_txstop +ffffffff8189b510 T vmxnet3_rxstop +ffffffff8189b670 T vmxnet3_enable_all_intrs +ffffffff8189b740 T vmxnet3_disable_all_intrs +ffffffff8189b810 T vmxnet3_evintr +ffffffff8189b9e0 T vmxnet3_rxintr +ffffffff8189bd30 T vmxnet3_txintr +ffffffff8189bf10 T vmxnet3_init +ffffffff8189c2a0 T vmxnet3_rx_csum +ffffffff8189c300 T vmxnet3_iff +ffffffff8189c440 T vmxnet3_stop +ffffffff8189c6f0 T vmxnet3_reset +ffffffff8189c730 t vmx_kstat_create +ffffffff8189c910 t vmx_kstat_read +ffffffff8189d000 T vmwpvs_match +ffffffff8189d040 T vmwpvs_attach +ffffffff8189d980 T vmwpvs_scsi_cmd +ffffffff8189ddf0 T vmwpvs_intx +ffffffff8189de70 T vmwpvs_msg_task +ffffffff8189e0e0 T vmwpvs_intr +ffffffff8189e2d0 T vmwpvs_get_config +ffffffff8189e4d0 T vmwpvs_dmamem_zalloc +ffffffff8189e530 T vmwpvs_dmamem_alloc +ffffffff8189e6b0 T vmwpvs_ccb_put +ffffffff8189e710 T vmwpvs_setup_rings +ffffffff8189e820 T vmwpvs_setup_msg_ring +ffffffff8189e8f0 T vmwpvs_ccb_get +ffffffff8189e970 T vmwpvs_dmamem_free +ffffffff8189e9f0 T vmwpvs_cmd +ffffffff8189ea90 T vmwpvs_scsi_cmd_done +ffffffff8189ec70 T vmwpvs_scsi_cmd_poll +ffffffff8189f000 T lii_match +ffffffff8189f030 T lii_attach +ffffffff8189f420 T lii_activate +ffffffff8189f520 T lii_reset +ffffffff8189f7f0 T lii_spi_configure +ffffffff8189f8e0 T lii_eeprom_present +ffffffff8189f970 T lii_eeprom_read +ffffffff8189f9a0 T lii_spi_read +ffffffff8189fc60 T lii_read_macaddr +ffffffff8189fdc0 T lii_intr +ffffffff8189fed0 T lii_alloc_rings +ffffffff818a00e0 T lii_tick +ffffffff818a0130 T lii_mii_readreg +ffffffff818a03d0 T lii_mii_writereg +ffffffff818a0670 T lii_mii_statchg +ffffffff818a06e0 T lii_media_change +ffffffff818a0730 T lii_media_status +ffffffff818a0790 T lii_ioctl +ffffffff818a0920 T lii_start +ffffffff818a0ad0 T lii_watchdog +ffffffff818a0b10 T lii_stop +ffffffff818a0b80 T lii_init +ffffffff818a1070 T lii_iff +ffffffff818a11b0 T lii_tx_put +ffffffff818a12c0 T lii_free_tx_space +ffffffff818a1300 T lii_rxintr +ffffffff818a14b0 T lii_txintr +ffffffff818a2000 T ichiic_match +ffffffff818a2030 T ichiic_attach +ffffffff818a2220 T ichiic_intr +ffffffff818a2340 T ichiic_i2c_acquire_bus +ffffffff818a23a0 T ichiic_i2c_release_bus +ffffffff818a23f0 T ichiic_i2c_exec +ffffffff818a3000 T viapm_match +ffffffff818a3030 T viapm_attach +ffffffff818a3680 T viapm_intr +ffffffff818a3790 T viapm_i2c_acquire_bus +ffffffff818a37f0 T viapm_i2c_release_bus +ffffffff818a3840 T viapm_i2c_exec +ffffffff818a3b50 T viapm_refresh_sensor_data +ffffffff818a3e50 T viapm_refresh +ffffffff818a3e80 T val_to_uK +ffffffff818a3f20 T val_to_rpm +ffffffff818a3f60 T val_to_uV +ffffffff818a4000 T viapm_get_timecount +ffffffff818a5000 T amdiic_match +ffffffff818a5030 T amdiic_attach +ffffffff818a5200 T amdiic_intr +ffffffff818a52d0 T amdiic_i2c_acquire_bus +ffffffff818a5330 T amdiic_i2c_release_bus +ffffffff818a5380 T amdiic_i2c_exec +ffffffff818a55e0 T amdiic_read +ffffffff818a5750 T amdiic_wait +ffffffff818a57f0 T amdiic_write +ffffffff818a6000 T nviic_match +ffffffff818a6030 T nviic_attach +ffffffff818a6270 T nviic_i2c_acquire_bus +ffffffff818a62c0 T nviic_i2c_release_bus +ffffffff818a6310 T nviic_i2c_exec +ffffffff818a65a0 T nviic_write +ffffffff818a65f0 T nviic_read +ffffffff818a7000 T sdhc_pci_match +ffffffff818a7060 T sdhc_pci_attach +ffffffff818a73a0 T sdhc_pci_activate +ffffffff818a7400 T sdhc_takecontroller +ffffffff818a74a0 T sdhc_ricohfix +ffffffff818a7610 T sdhc_pci_conf_write +ffffffff818a8000 T kate_match +ffffffff818a8170 T kate_attach +ffffffff818a84b0 T kate_refresh +ffffffff818a9000 T km_match +ffffffff818a9050 T km_attach +ffffffff818a90f0 T km_refresh +ffffffff818aa000 T ksmn_match +ffffffff818aa050 T ksmn_attach +ffffffff818aa240 T ksmn_ccd_attach +ffffffff818aa390 T ksmn_refresh +ffffffff818aa4e0 T ksmn_read_reg +ffffffff818ab000 t iosf_pci_match +ffffffff818ab060 t iosf_pci_attach +ffffffff818ab100 t iosf_pci_mbi_mdr_rd +ffffffff818ab160 t iosf_pci_mbi_mdr_wr +ffffffff818ac000 T itherm_probe +ffffffff818ac030 T itherm_attach +ffffffff818ac3e0 T itherm_activate +ffffffff818ac460 T itherm_enable +ffffffff818ac4c0 T itherm_refresh +ffffffff818ac4d0 T itherm_refresh_sensor_data +ffffffff818ac8c0 T itherm_bias_temperature_sensor +ffffffff818ad000 T pchtemp_match +ffffffff818ad030 T pchtemp_attach +ffffffff818ad1a0 T pchtemp_refresh +ffffffff818ae000 T rtsx_pci_match +ffffffff818ae080 T rtsx_pci_attach +ffffffff818af000 T xspd_match +ffffffff818af030 T xspd_attach +ffffffff818af1f0 T xspd_intr +ffffffff818b0000 T virtio_pci_match +ffffffff818b0080 T virtio_pci_attach +ffffffff818b0420 T virtio_pci_detach +ffffffff818b0500 T virtio_pci_kick +ffffffff818b0560 T virtio_pci_read_device_config_1 +ffffffff818b0590 T virtio_pci_read_device_config_2 +ffffffff818b05c0 T virtio_pci_read_device_config_4 +ffffffff818b05f0 T virtio_pci_read_device_config_8 +ffffffff818b0670 T virtio_pci_write_device_config_1 +ffffffff818b06a0 T virtio_pci_write_device_config_2 +ffffffff818b06d0 T virtio_pci_write_device_config_4 +ffffffff818b0700 T virtio_pci_write_device_config_8 +ffffffff818b0770 T virtio_pci_read_queue_size +ffffffff818b07e0 T virtio_pci_setup_queue +ffffffff818b0ac0 T virtio_pci_set_status +ffffffff818b0bf0 T virtio_pci_negotiate_features +ffffffff818b0d30 T virtio_pci_poll_intr +ffffffff818b0da0 T virtio_pci_find_cap +ffffffff818b0f40 T virtio_pci_attach_10 +ffffffff818b13a0 T virtio_pci_attach_09 +ffffffff818b14e0 T virtio_pci_adjust_config_region +ffffffff818b1580 T virtio_pci_setup_msix +ffffffff818b1910 T virtio_pci_legacy_intr +ffffffff818b19b0 T virtio_pci_legacy_intr_mpsafe +ffffffff818b1a40 T virtio_pci_free_irqs +ffffffff818b1c80 T virtio_pci_negotiate_features_10 +ffffffff818b1eb0 T virtio_pci_msix_establish +ffffffff818b1f80 T virtio_pci_set_msix_queue_vector +ffffffff818b2000 T virtio_pci_set_msix_config_vector +ffffffff818b2040 T virtio_pci_config_intr +ffffffff818b2080 T virtio_pci_shared_queue_intr +ffffffff818b2090 T virtio_pci_queue_intr +ffffffff818b3000 T dwiic_pci_match +ffffffff818b3030 T dwiic_pci_attach +ffffffff818b3350 T dwiic_pci_activate +ffffffff818b33c0 T dwiic_pci_bus_scan +ffffffff818b4000 T bwfm_pci_buscore_read +ffffffff818b4060 T bwfm_pci_buscore_write +ffffffff818b40d0 T bwfm_pci_buscore_prepare +ffffffff818b4100 T bwfm_pci_buscore_reset +ffffffff818b42f0 T bwfm_pci_buscore_activate +ffffffff818b4320 T bwfm_pci_preinit +ffffffff818b5130 T bwfm_pci_stop +ffffffff818b51c0 T bwfm_pci_txcheck +ffffffff818b5280 T bwfm_pci_txdata +ffffffff818b55d0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818b5a00 T bwfm_pci_msgbuf_set_dcmd +ffffffff818b5a50 T bwfm_pci_match +ffffffff818b5a80 T bwfm_pci_attach +ffffffff818b5cf0 T bwfm_pci_detach +ffffffff818b5d30 T bwfm_pci_activate +ffffffff818b5ee0 T bwfm_pci_intr +ffffffff818b6140 T bwfm_pci_select_core +ffffffff818b6220 T bwfm_pci_load_microcode +ffffffff818b66b0 T bwfm_pci_dmamem_alloc +ffffffff818b6850 T bwfm_pci_setup_ring +ffffffff818b6a50 T bwfm_pci_intr_enable +ffffffff818b6aa0 T bwfm_pci_hostready +ffffffff818b6b10 T bwfm_pci_fill_rx_rings +ffffffff818b6b60 T bwfm_pci_dmamem_free +ffffffff818b6bd0 T bwfm_pci_cleanup +ffffffff818b7240 T bwfm_pci_send_mb_data +ffffffff818b7360 T bwfm_pci_intmask +ffffffff818b73a0 T bwfm_pci_pktid_avail +ffffffff818b7420 T bwfm_pci_pktid_new +ffffffff818b7570 T bwfm_pci_pktid_free +ffffffff818b7620 T bwfm_pci_fill_rx_buf_ring +ffffffff818b7960 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818b7cc0 T bwfm_pci_ring_write_reserve +ffffffff818b7db0 T bwfm_pci_ring_write_cancel +ffffffff818b7df0 T bwfm_pci_ring_write_commit +ffffffff818b7ed0 T bwfm_pci_ring_write_rptr +ffffffff818b7f50 T bwfm_pci_ring_write_wptr +ffffffff818b7fd0 T bwfm_pci_setup_flowring +ffffffff818b8120 T bwfm_pci_ring_bell +ffffffff818b8160 T bwfm_pci_ring_update_rptr +ffffffff818b8210 T bwfm_pci_ring_update_wptr +ffffffff818b82c0 T bwfm_pci_ring_write_reserve_multi +ffffffff818b83e0 T bwfm_pci_ring_read_avail +ffffffff818b84e0 T bwfm_pci_ring_read_commit +ffffffff818b8570 T bwfm_pci_ring_rx +ffffffff818b8770 T bwfm_pci_msg_rx +ffffffff818b8d50 T bwfm_pci_flowring_delete_cb +ffffffff818b8e00 T bwfm_pci_msgbuf_rxioctl +ffffffff818b8ef0 T bwfm_pci_intr_status +ffffffff818b8f30 T bwfm_pci_intr_ack +ffffffff818b8f70 T bwfm_pci_flowring_lookup +ffffffff818b90e0 T bwfm_pci_flowring_create +ffffffff818b9210 T bwfm_pci_flowring_create_cb +ffffffff818b9550 T bwfm_pci_flowring_delete +ffffffff818b9820 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818b9a30 T bwfm_pci_handle_mb_data +ffffffff818b9b00 T bwfm_pci_intr_disable +ffffffff818ba000 T ccp_pci_match +ffffffff818ba030 T ccp_pci_attach +ffffffff818bb000 T bnxt_match +ffffffff818bb030 T bnxt_attach +ffffffff818bbbe0 T bnxt_dmamem_alloc +ffffffff818bbd70 T bnxt_dmamem_free +ffffffff818bbe00 T bnxt_hwrm_ver_get +ffffffff818bbf50 T bnxt_hwrm_nvm_get_dev_info +ffffffff818bc0a0 T bnxt_hwrm_func_drv_rgtr +ffffffff818bc1c0 T bnxt_hwrm_func_rgtr_async_events +ffffffff818bc2e0 T bnxt_hwrm_func_qcaps +ffffffff818bc3c0 T bnxt_admin_intr +ffffffff818bc5b0 T bnxt_intr +ffffffff818bca60 T bnxt_hwrm_func_qcfg +ffffffff818bcb10 T bnxt_hwrm_queue_qportcfg +ffffffff818bcbe0 T bnxt_hwrm_func_reset +ffffffff818bcc90 T bnxt_mark_cpr_invalid +ffffffff818bccf0 T bnxt_hwrm_ring_alloc +ffffffff818bcea0 T bnxt_cfg_async_cr +ffffffff818bcfa0 T bnxt_write_cp_doorbell +ffffffff818bcfe0 T bnxt_set_cp_ring_aggint +ffffffff818bd0c0 T bnxt_ioctl +ffffffff818bd250 T bnxt_start +ffffffff818bd7d0 T bnxt_watchdog +ffffffff818bd800 T bnxt_media_change +ffffffff818bd950 T bnxt_media_status +ffffffff818bd970 T bnxt_refill +ffffffff818bd9d0 T bnxt_media_autonegotiate +ffffffff818bdac0 T bnxt_hwrm_port_phy_qcfg +ffffffff818bdf40 T bnxt_free_slots +ffffffff818bdfe0 T bnxt_hwrm_cmd_hdr_init +ffffffff818be030 T hwrm_send_message +ffffffff818be0b0 T bnxt_queue_up +ffffffff818bec30 T bnxt_hwrm_stat_ctx_alloc +ffffffff818bed30 T bnxt_write_tx_doorbell +ffffffff818beda0 T bnxt_write_rx_doorbell +ffffffff818bee20 T bnxt_hwrm_ring_grp_alloc +ffffffff818bef20 T bnxt_rx_fill +ffffffff818bf030 T bnxt_hwrm_ring_grp_free +ffffffff818bf110 T bnxt_hwrm_ring_free +ffffffff818bf200 T bnxt_hwrm_stat_ctx_free +ffffffff818bf2f0 T bnxt_queue_down +ffffffff818bfa10 T bnxt_up +ffffffff818bffa0 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818c0080 T bnxt_hwrm_vnic_alloc +ffffffff818c0180 T bnxt_hwrm_vnic_cfg +ffffffff818c02c0 T bnxt_hwrm_vnic_cfg_placement +ffffffff818c0390 T bnxt_hwrm_set_filter +ffffffff818c0520 T bnxt_hwrm_vnic_rss_cfg +ffffffff818c0600 T bnxt_iff +ffffffff818c0770 T bnxt_hwrm_vnic_free +ffffffff818c0860 T bnxt_hwrm_vnic_ctx_free +ffffffff818c0950 T bnxt_down +ffffffff818c0d20 T bnxt_hwrm_free_filter +ffffffff818c0e00 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff818c0ee0 T bnxt_rxrinfo +ffffffff818c1030 T bnxt_get_sffpage +ffffffff818c1340 T bnxt_load_mbuf +ffffffff818c13f0 T bnxt_handle_async_event +ffffffff818c1440 T bnxt_cpr_next_cmpl +ffffffff818c14b0 T bnxt_cpr_commit +ffffffff818c14e0 T bnxt_cpr_rollback +ffffffff818c1510 T bnxt_write_cp_doorbell_index +ffffffff818c1590 T bnxt_rx +ffffffff818c1830 T bnxt_txeof +ffffffff818c1960 T bnxt_get_media_type +ffffffff818c1ec0 T bnxt_add_media_type +ffffffff818c2080 T _hwrm_send_message +ffffffff818c4da0 T bnxt_rx_fill_slots +ffffffff818c4f80 T bnxt_hwrm_err_map +ffffffff818c4fc0 T _bnxt_hwrm_set_async_event_bit +ffffffff818c6000 t mcx_match +ffffffff818c6030 t mcx_attach +ffffffff818c6c40 T mcx_rx_fill +ffffffff818c6e90 T mcx_load_mbuf +ffffffff818c6f40 t mcx_dmamem_alloc +ffffffff818c70a0 t mcx_init_wait +ffffffff818c7130 t mcx_enable_hca +ffffffff818c7310 t mcx_issi +ffffffff818c7680 t mcx_pages +ffffffff818c7f60 t mcx_hca_max_caps +ffffffff818c84e0 t mcx_hca_set_caps +ffffffff818c89c0 t mcx_init_hca +ffffffff818c8b90 t mcx_set_driver_version +ffffffff818c8ef0 t mcx_iff +ffffffff818c9330 t mcx_alloc_uar +ffffffff818c9520 t mcx_alloc_pd +ffffffff818c9700 t mcx_alloc_tdomain +ffffffff818c98e0 t mcx_admin_intr +ffffffff818c9a90 t mcx_create_eq +ffffffff818ca030 t mcx_query_nic_vport_context +ffffffff818ca3e0 t mcx_query_special_contexts +ffffffff818ca5c0 t mcx_set_port_mtu +ffffffff818ca6d0 t mcx_ioctl +ffffffff818cc9a0 t mcx_start +ffffffff818ccea0 t mcx_watchdog +ffffffff818cced0 t mcx_media_change +ffffffff818cd190 t mcx_media_status +ffffffff818cd2e0 t mcx_media_add_types +ffffffff818cd400 t mcx_refill +ffffffff818cd470 t mcx_cq_intr +ffffffff818cda50 t mcx_calibrate +ffffffff818cdbf0 t mcx_port_change +ffffffff818cdd40 t mcx_kstat_attach +ffffffff818ce110 t mcx_teardown_hca +ffffffff818ce300 t mcx_dmamem_free +ffffffff818ce370 t mcx_set_issi +ffffffff818ce520 t mcx_set_flow_table_entry_mac +ffffffff818ce9f0 t mcx_delete_flow_table_entry +ffffffff818cee70 t mcx_access_hca_reg +ffffffff818cf280 t mcx_cmdq_exec +ffffffff818cf500 t mcx_down +ffffffff818d04c0 t mcx_create_flow_table +ffffffff818d0870 t mcx_create_flow_group +ffffffff818d0d40 t mcx_set_flow_table_root +ffffffff818d10c0 t mcx_create_rqt +ffffffff818d14c0 t mcx_create_tir_direct +ffffffff818d17e0 t mcx_create_tir_indirect +ffffffff818d1b20 t mcx_set_flow_table_entry_proto +ffffffff818d2000 t mcx_ready_sq +ffffffff818d2390 t mcx_ready_rq +ffffffff818d2720 t mcx_calibrate_first +ffffffff818d2810 t mcx_create_rq +ffffffff818d2d20 t mcx_destroy_sq +ffffffff818d2fd0 t mcx_destroy_cq +ffffffff818d3290 t mcx_destroy_flow_table +ffffffff818d3600 t mcx_kstat_attach_ppcnt +ffffffff818d3730 t mcx_kstat_ppcnt_read +ffffffff818d3850 t mcx_kstat_mtmp_read +ffffffff818d39e0 t mcx_kstat_queue_read +ffffffff818d49a0 t mcx_timecounter_read +ffffffff818d5000 t iavf_match +ffffffff818d5030 t iavf_attach +ffffffff818d58a0 t iavf_reset +ffffffff818d5b60 t iavf_dmamem_alloc +ffffffff818d5cc0 t iavf_arq_fill +ffffffff818d5f80 t iavf_arq_timeout +ffffffff818d5fb0 t iavf_init_admin_queue +ffffffff818d6160 t iavf_get_version +ffffffff818d6360 t iavf_get_vf_resources +ffffffff818d6530 t iavf_config_irq_map +ffffffff818d6710 t iavf_intr +ffffffff818d6d90 t iavf_ioctl +ffffffff818d72f0 t iavf_start +ffffffff818d7650 t iavf_watchdog +ffffffff818d7680 t iavf_media_change +ffffffff818d76b0 t iavf_media_status +ffffffff818d7740 t iavf_dmamem_free +ffffffff818d77b0 t iavf_arq_unfill +ffffffff818d78b0 t iavf_down +ffffffff818d7c40 t iavf_up +ffffffff818d8610 t iavf_queue_select +ffffffff818d8800 t iavf_txr_free +ffffffff818d8900 t iavf_rxr_free +ffffffff818d8a10 t iavf_rxfill +ffffffff818d8d20 t iavf_rxrefill +ffffffff818d8d40 t iavf_process_arq +ffffffff818d91c0 t iavf_add_del_addr +ffffffff818da000 T rge_match +ffffffff818da030 T rge_attach +ffffffff818da4c0 T rge_activate +ffffffff818da600 T rge_intr +ffffffff818da8f0 T rge_config_imtype +ffffffff818da960 T rge_chipinit +ffffffff818daa70 T rge_get_macaddr +ffffffff818dac40 T rge_allocmem +ffffffff818db040 T rge_ioctl +ffffffff818db1f0 T rge_start +ffffffff818db3d0 T rge_watchdog +ffffffff818db410 T rge_wol +ffffffff818db640 T rge_tick +ffffffff818db6c0 T rge_txstart +ffffffff818db6f0 T rge_ifmedia_upd +ffffffff818dbcc0 T rge_ifmedia_sts +ffffffff818dbdb0 T rge_add_media_types +ffffffff818dbe60 T rge_kstat_attach +ffffffff818dc140 T rge_wol_power +ffffffff818dc220 T rge_rxeof +ffffffff818dc660 T rge_txeof +ffffffff818dc870 T rge_init +ffffffff818ddf20 T rge_setup_intr +ffffffff818de090 T rge_encap +ffffffff818de360 T rge_stop +ffffffff818de640 T rge_iff +ffffffff818de7c0 T rge_set_macaddr +ffffffff818de890 T rge_rx_list_init +ffffffff818de950 T rge_tx_list_init +ffffffff818dea20 T rge_phy_config +ffffffff818df6d0 T rge_disable_aspm_clkreq +ffffffff818df7d0 T rge_read_csi +ffffffff818df880 T rge_write_csi +ffffffff818df950 T rge_write_mac_ocp +ffffffff818df9a0 T rge_read_mac_ocp +ffffffff818dfa20 T rge_hw_reset +ffffffff818dfb20 T rge_write_phy_ocp +ffffffff818dfbe0 T rge_read_phy_ocp +ffffffff818dfc90 T rge_read_phy +ffffffff818dfd60 T rge_write_phy +ffffffff818dfe40 T rge_get_link_status +ffffffff818dfea0 T rge_newbuf +ffffffff818e0030 T rge_discard_rxbuf +ffffffff818e00a0 T rge_fill_rx_ring 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drm_atomic_helper_set_config +ffffffff81910f60 T drm_atomic_helper_disable_all +ffffffff81911110 T drm_atomic_helper_shutdown +ffffffff81911260 T drm_atomic_helper_duplicate_state +ffffffff819113b0 T drm_atomic_helper_suspend +ffffffff81911500 T drm_atomic_helper_commit_duplicated_state +ffffffff81911640 T drm_atomic_helper_resume +ffffffff81911770 T drm_atomic_helper_page_flip +ffffffff81911830 t page_flip_common +ffffffff81911930 T drm_atomic_helper_page_flip_target +ffffffff81911a50 T drm_atomic_helper_bridge_propagate_bus_fmt +ffffffff81911ac0 t set_best_encoder +ffffffff81912000 T __drm_atomic_helper_crtc_state_reset +ffffffff81912030 T __drm_atomic_helper_crtc_reset +ffffffff81912090 T drm_atomic_helper_crtc_reset +ffffffff81912130 T __drm_atomic_helper_crtc_duplicate_state +ffffffff81912200 T drm_atomic_helper_crtc_duplicate_state +ffffffff819122a0 T __drm_atomic_helper_crtc_destroy_state +ffffffff81912360 T drm_atomic_helper_crtc_destroy_state +ffffffff81912390 T __drm_atomic_helper_plane_state_reset +ffffffff81912460 T __drm_atomic_helper_plane_reset +ffffffff819124c0 T drm_atomic_helper_plane_reset +ffffffff819125a0 T __drm_atomic_helper_plane_destroy_state +ffffffff81912610 T __drm_atomic_helper_plane_duplicate_state +ffffffff81912690 T drm_atomic_helper_plane_duplicate_state +ffffffff81912770 T drm_atomic_helper_plane_destroy_state +ffffffff819127f0 T __drm_atomic_helper_connector_state_reset +ffffffff81912820 T __drm_atomic_helper_connector_reset +ffffffff81912860 T drm_atomic_helper_connector_reset +ffffffff81912930 T __drm_atomic_helper_connector_destroy_state +ffffffff81912990 T drm_atomic_helper_connector_tv_margins_reset +ffffffff819129f0 T drm_atomic_helper_connector_tv_reset +ffffffff81912bf0 T drm_atomic_helper_connector_tv_check +ffffffff81912cd0 T __drm_atomic_helper_connector_duplicate_state +ffffffff81912d60 T drm_atomic_helper_connector_duplicate_state +ffffffff81912e40 T drm_atomic_helper_connector_destroy_state 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drm_bridge_atomic_destroy_priv_state +ffffffff8191a330 t select_bus_fmt_recursive +ffffffff8191b000 T drm_buddy_init +ffffffff8191b470 T drm_buddy_fini +ffffffff8191b560 T drm_get_buddy +ffffffff8191b5a0 T drm_buddy_free_block +ffffffff8191b5f0 t __drm_buddy_free +ffffffff8191b740 T drm_buddy_free_list +ffffffff8191b800 T drm_buddy_block_trim +ffffffff8191ba60 t __alloc_range +ffffffff8191bd40 T drm_buddy_alloc_blocks +ffffffff8191c350 t __drm_buddy_alloc_range +ffffffff8191c3e0 T drm_buddy_block_print +ffffffff8191c420 T drm_buddy_print +ffffffff8191c590 T drm_buddy_module_exit +ffffffff8191c5b0 T drm_buddy_module_init +ffffffff8191c610 t split_block +ffffffff8191d000 T drm_clflush_pages +ffffffff8191d120 T drm_clflush_sg +ffffffff8191d270 T drm_clflush_virt_range +ffffffff8191d340 T drm_need_swiotlb +ffffffff8191d370 T drm_memcpy_from_wc +ffffffff8191d810 T drm_memcpy_init_early +ffffffff8191e000 T drm_client_init +ffffffff8191e110 T drm_client_register +ffffffff8191e1c0 T drm_client_release +ffffffff8191e260 T drm_client_dev_unregister +ffffffff8191e350 T drm_client_dev_hotplug +ffffffff8191e480 T drm_client_dev_restore +ffffffff8191e560 T drm_client_buffer_vmap +ffffffff8191e5d0 T drm_client_buffer_vunmap +ffffffff8191e5f0 T drm_client_framebuffer_create +ffffffff8191e890 T drm_client_framebuffer_delete +ffffffff8191e970 T drm_client_framebuffer_flush +ffffffff8191f000 T drm_client_modeset_create +ffffffff8191f140 T drm_client_modeset_free +ffffffff8191f240 T drm_client_modeset_probe +ffffffff819209a0 t drm_client_pick_crtcs +ffffffff81920c80 T drm_client_rotation +ffffffff81920e20 T drm_client_modeset_check +ffffffff81920ec0 t drm_client_modeset_commit_atomic +ffffffff819210c0 T drm_client_modeset_commit_locked +ffffffff81921260 T drm_client_modeset_commit +ffffffff819212d0 T drm_client_modeset_dpms +ffffffff81921520 t drm_connector_pick_cmdline_mode +ffffffff81922000 T drm_color_ctm_s31_32_to_qm_n +ffffffff819220d0 T drm_crtc_enable_color_mgmt +ffffffff819221b0 T drm_mode_crtc_set_gamma_size +ffffffff819222d0 T drm_mode_gamma_set_ioctl +ffffffff819227b0 T drm_mode_gamma_get_ioctl +ffffffff819228f0 T drm_get_color_encoding_name +ffffffff81922960 T drm_get_color_range_name +ffffffff819229d0 T drm_plane_create_color_properties +ffffffff81922c30 T drm_color_lut_check +ffffffff81923000 T drm_connector_ida_init +ffffffff81923110 T drm_connector_ida_destroy +ffffffff81923220 T drm_get_connector_type_name +ffffffff81923260 T drm_connector_free_work_fn +ffffffff81923320 T drm_connector_init +ffffffff819233a0 t __drm_connector_init +ffffffff81923710 T drm_connector_init_with_ddc +ffffffff819237a0 T drmm_connector_init +ffffffff81923860 t drm_connector_cleanup_action +ffffffff81923880 T drm_connector_attach_edid_property +ffffffff819238a0 T drm_connector_attach_encoder +ffffffff81923920 T drm_connector_has_possible_encoder +ffffffff81923960 T drm_connector_cleanup +ffffffff81923ca0 T drm_connector_unregister +ffffffff81923d40 T drm_mode_put_tile_group +ffffffff81923dd0 T drm_connector_register +ffffffff81923ec0 T drm_connector_unregister_all +ffffffff81924060 T drm_connector_list_iter_begin +ffffffff819240a0 T drm_connector_list_iter_next +ffffffff819241b0 T drm_connector_list_iter_end +ffffffff81924280 T drm_connector_register_all +ffffffff81924410 T drm_get_connector_status_name +ffffffff81924460 T drm_get_connector_force_name +ffffffff819244a0 T drm_get_subpixel_order_name +ffffffff819244e0 T drm_get_dpms_name +ffffffff81924520 T drm_display_info_set_bus_formats +ffffffff819245f0 T drm_get_dvi_i_select_name +ffffffff81924650 T drm_get_dvi_i_subconnector_name +ffffffff819246b0 T drm_get_tv_mode_name +ffffffff819246f0 T drm_get_tv_mode_from_name +ffffffff81924890 T drm_get_tv_select_name +ffffffff819248f0 T drm_get_tv_subconnector_name +ffffffff81924950 T drm_get_dp_subconnector_name +ffffffff819249e0 T drm_get_colorspace_name +ffffffff81924a20 T drm_connector_create_standard_properties +ffffffff81924ba0 T drm_mode_create_dvi_i_properties +ffffffff81924c40 T drm_connector_attach_dp_subconnector_property +ffffffff81924cb0 T drm_connector_attach_content_type_property +ffffffff81924d50 T drm_mode_create_content_type_property +ffffffff81924dd0 T drm_connector_attach_tv_margin_properties +ffffffff81924e40 T drm_mode_create_tv_margin_properties +ffffffff81924f60 T drm_mode_create_tv_properties_legacy +ffffffff819251b0 T drm_mode_create_tv_properties +ffffffff81925390 T drm_mode_create_scaling_mode_property +ffffffff81925400 T drm_connector_attach_vrr_capable_property +ffffffff81925490 T drm_connector_attach_scaling_mode_property +ffffffff81925660 T drm_mode_create_aspect_ratio_property +ffffffff819256e0 T drm_mode_create_hdmi_colorspace_property +ffffffff81925700 t drm_mode_create_colorspace_property +ffffffff81925830 T drm_mode_create_dp_colorspace_property +ffffffff81925860 T drm_mode_create_suggested_offset_properties +ffffffff81925930 T drm_connector_set_path_property +ffffffff81925990 T drm_connector_set_tile_property +ffffffff81925ae0 T drm_connector_set_link_status_property +ffffffff81925b30 T drm_connector_attach_max_bpc_property +ffffffff81925bf0 T drm_connector_attach_hdr_output_metadata_property +ffffffff81925c40 T drm_connector_attach_colorspace_property +ffffffff81925c90 T drm_connector_atomic_hdr_metadata_equal +ffffffff81925d00 T drm_connector_set_vrr_capable_property +ffffffff81925d50 T drm_connector_set_panel_orientation +ffffffff81925e20 T drm_connector_set_panel_orientation_with_quirk +ffffffff81925f00 T drm_connector_set_orientation_from_panel +ffffffff81925ff0 T drm_connector_create_privacy_screen_properties +ffffffff81926090 T drm_connector_attach_privacy_screen_properties +ffffffff81926100 T drm_connector_attach_privacy_screen_provider +ffffffff81926210 t drm_connector_privacy_screen_notifier +ffffffff819262b0 T drm_connector_update_privacy_screen +ffffffff81926320 T drm_connector_set_obj_prop +ffffffff81926400 T drm_connector_property_set_ioctl +ffffffff81926460 T drm_mode_getconnector +ffffffff81926960 T drm_connector_find_by_fwnode +ffffffff81926a10 T drm_connector_oob_hotplug_event +ffffffff81926b00 T drm_mode_get_tile_group +ffffffff81926bd0 T drm_mode_create_tile_group +ffffffff81926ca0 t drm_connector_free +ffffffff81926ce0 t kasprintf +ffffffff81927000 T drm_crtc_from_index +ffffffff81927060 T drm_crtc_force_disable +ffffffff819271a0 T drm_mode_set_config_internal +ffffffff81927220 T drm_crtc_register_all +ffffffff819272a0 T drm_crtc_unregister_all +ffffffff81927310 T drm_crtc_create_fence +ffffffff819273a0 T drm_crtc_init_with_planes +ffffffff81927470 t __drm_crtc_init_with_planes +ffffffff81927870 T drmm_crtc_init_with_planes +ffffffff81927970 T __drmm_crtc_alloc_with_planes +ffffffff81927ae0 T drm_crtc_cleanup +ffffffff81927c00 T drm_mode_getcrtc +ffffffff81927da0 t __drm_mode_set_config_internal +ffffffff81927f50 T drm_crtc_check_viewport +ffffffff81928000 T drm_mode_setcrtc +ffffffff81928780 T drm_mode_crtc_set_obj_prop +ffffffff81928800 T drm_crtc_create_scaling_filter_property +ffffffff81928870 t drm_crtc_fence_get_driver_name +ffffffff819288f0 t drm_crtc_fence_get_timeline_name +ffffffff81928960 t kasprintf +ffffffff81928a30 t drmm_crtc_init_with_planes_cleanup +ffffffff81929000 T drm_helper_encoder_in_use +ffffffff81929180 T drm_helper_crtc_in_use +ffffffff819292b0 T drm_helper_disable_unused_functions +ffffffff81929330 t __drm_helper_disable_unused_functions +ffffffff81929450 T drm_crtc_helper_set_mode +ffffffff819298f0 T drm_crtc_helper_atomic_check +ffffffff81929940 T drm_connector_get_single_encoder +ffffffff81929a20 T drm_crtc_helper_set_config +ffffffff8192a660 T drm_helper_connector_dpms +ffffffff8192a930 T drm_helper_resume_force_mode +ffffffff8192ac30 T drm_helper_force_disable_all +ffffffff8192b000 T drm_atomic_helper_check_plane_damage +ffffffff8192b0a0 T drm_atomic_helper_dirtyfb +ffffffff8192b350 T drm_atomic_helper_damage_iter_init +ffffffff8192b4a0 T drm_atomic_helper_damage_iter_next +ffffffff8192b540 T drm_atomic_helper_damage_merged +ffffffff8192c000 T displayid_iter_edid_begin +ffffffff8192c050 T __displayid_iter_next +ffffffff8192c300 T displayid_iter_end +ffffffff8192c350 T displayid_version +ffffffff8192c380 T displayid_primary_use +ffffffff8192d000 T drm_mode_create_dumb +ffffffff8192d0e0 T drm_mode_create_dumb_ioctl +ffffffff8192d1c0 T drm_mode_mmap_dumb_ioctl +ffffffff8192d230 T drm_mode_destroy_dumb +ffffffff8192d280 T drm_mode_destroy_dumb_ioctl +ffffffff8192e000 T drm_edid_header_is_valid +ffffffff8192e080 T drm_edid_are_equal +ffffffff8192e0f0 T drm_edid_block_valid +ffffffff8192e300 t edid_block_check +ffffffff8192e430 t edid_block_status_print +ffffffff8192e520 T drm_edid_is_valid +ffffffff8192e5a0 T drm_edid_valid +ffffffff8192e6d0 t drm_edid_block_count +ffffffff8192e810 T drm_edid_override_show +ffffffff8192e860 T drm_edid_override_set +ffffffff8192ea00 T drm_edid_alloc +ffffffff8192eac0 T drm_edid_free +ffffffff8192eb20 T drm_edid_override_reset +ffffffff8192ebe0 T drm_edid_override_connector_update +ffffffff8192ecb0 t drm_edid_override_get +ffffffff8192eda0 T drm_edid_connector_update +ffffffff8192f1f0 T drm_edid_connector_add_modes +ffffffff8192f310 T drm_do_get_edid +ffffffff8192f330 t _drm_do_get_edid +ffffffff8192f750 T drm_edid_raw +ffffffff8192f7e0 T drm_edid_dup +ffffffff8192f8b0 T drm_probe_ddc +ffffffff8192f9b0 t drm_do_probe_ddc_edid +ffffffff8192fb00 T drm_get_edid +ffffffff8192fc70 T drm_connector_update_edid_property +ffffffff8192fcd0 T drm_edid_read_custom +ffffffff8192fdc0 T drm_edid_read_ddc +ffffffff8192fef0 T drm_edid_read +ffffffff8192ff70 T drm_edid_get_panel_id +ffffffff819300f0 t edid_block_read +ffffffff81930360 T drm_get_edid_switcheroo +ffffffff819303b0 T drm_edid_read_switcheroo +ffffffff81930400 T drm_edid_duplicate +ffffffff81930480 T drm_mode_find_dmt +ffffffff819305a0 T drm_mode_fixup_1366x768 +ffffffff819305f0 T drm_find_edid_extension +ffffffff81930690 T drm_match_cea_mode +ffffffff81930910 T drm_display_mode_from_cea_vic +ffffffff81930980 T drm_edid_get_monitor_name +ffffffff81930a20 t get_monitor_name +ffffffff81930e80 T drm_edid_to_sad +ffffffff81931080 T drm_edid_to_speaker_allocation +ffffffff81931230 T drm_av_sync_delay +ffffffff819312e0 T drm_detect_hdmi_monitor +ffffffff81931400 T drm_detect_monitor_audio +ffffffff81931590 T drm_default_rgb_quant_range +ffffffff819315d0 t update_display_info +ffffffff81932d90 t _drm_edid_connector_add_modes +ffffffff81934320 T drm_add_edid_modes +ffffffff81934420 T drm_add_modes_noedid +ffffffff81934510 T drm_set_preferred_mode +ffffffff81934570 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff81934830 T drm_hdmi_avi_infoframe_quant_range +ffffffff819348d0 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff81934990 t connector_bad_edid +ffffffff81934b50 t edid_filter_invalid_blocks +ffffffff81934ce0 t drm_for_each_detailed_block +ffffffff81934e80 t __cea_db_iter_next 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drm_i2c_encoder_commit +ffffffff8193a0a0 T drm_i2c_encoder_mode_set +ffffffff8193a0c0 T drm_i2c_encoder_detect +ffffffff8193a0e0 T drm_i2c_encoder_save +ffffffff8193a100 T drm_i2c_encoder_restore +ffffffff8193b000 T drm_exec_init +ffffffff8193b080 T drm_exec_fini +ffffffff8193b100 t drm_exec_unlock_all +ffffffff8193b270 T drm_exec_cleanup +ffffffff8193b300 T drm_exec_lock_obj +ffffffff8193b590 t drm_exec_obj_locked +ffffffff8193b660 t dma_resv_unlock +ffffffff8193b700 T drm_exec_unlock_obj +ffffffff8193b890 T drm_exec_prepare_obj +ffffffff8193b910 T drm_exec_prepare_array +ffffffff8193b9c0 t dma_resv_lock_slow_interruptible +ffffffff8193baf0 t dma_resv_lock_slow +ffffffff8193bbd0 t __ww_mutex_lock +ffffffff8193c000 T drm_fb_helper_debug_enter +ffffffff8193c100 T drm_fb_helper_debug_leave +ffffffff8193c270 T drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff8193c310 t __drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff8193c3c0 T drm_fb_helper_blank +ffffffff8193c4b0 T drm_fb_helper_prepare +ffffffff8193c5a0 t drm_fb_helper_resume_worker +ffffffff8193c5d0 t drm_fb_helper_damage_work +ffffffff8193c730 T drm_fb_helper_unprepare +ffffffff8193c760 T drm_fb_helper_init +ffffffff8193c7d0 T drm_fb_helper_alloc_info +ffffffff8193c830 T drm_fb_helper_release_info +ffffffff8193c880 T drm_fb_helper_unregister_info +ffffffff8193c8b0 T drm_fb_helper_fini +ffffffff8193c9b0 T drm_fb_helper_set_suspend +ffffffff8193c9e0 T drm_fb_helper_set_suspend_unlocked +ffffffff8193ca10 T drm_fb_helper_set_par +ffffffff8193cac0 T drm_fb_helper_pan_display +ffffffff8193cb90 T drm_fb_helper_fill_info +ffffffff8193cc50 T drm_fb_helper_initial_config +ffffffff8193cc80 t __drm_fb_helper_initial_config_and_unlock +ffffffff8193d2c0 T drm_fb_helper_hotplug_event +ffffffff8193d3f0 t drm_setup_crtcs_fb +ffffffff8193d530 T drm_fb_helper_lastclose +ffffffff8193d5e0 T drm_fb_helper_output_poll_changed +ffffffff8193e000 T drm_fb_dma_get_gem_obj +ffffffff8193f000 T drm_fbdev_dma_setup +ffffffff8193f190 t drm_fbdev_dma_helper_fb_probe +ffffffff8193f390 t drm_fbdev_dma_client_unregister +ffffffff8193f3e0 t drm_fbdev_dma_client_restore +ffffffff8193f420 t drm_fbdev_dma_client_hotplug +ffffffff81940000 T drm_fbdev_generic_setup +ffffffff81940190 t drm_fbdev_generic_helper_fb_probe +ffffffff81940300 t drm_fbdev_generic_helper_fb_dirty +ffffffff819405b0 t drm_fbdev_generic_client_unregister +ffffffff81940600 t drm_fbdev_generic_client_restore +ffffffff81940640 t drm_fbdev_generic_client_hotplug +ffffffff81941000 T drm_dev_needs_global_mutex +ffffffff81941060 T drm_file_alloc +ffffffff819412e0 T drm_file_free +ffffffff81941530 T drm_lastclose +ffffffff819415a0 T drm_release +ffffffff819415f0 T drm_file_update_pid +ffffffff81941640 T drm_release_noglobal +ffffffff81941690 T drm_read +ffffffff819416e0 T drm_event_reserve_init_locked +ffffffff81941760 T drm_event_reserve_init +ffffffff81941820 T drm_event_cancel_free +ffffffff819418a0 T drm_send_event_timestamp_locked +ffffffff819418b0 t drm_send_event_helper +ffffffff81941a80 T drm_send_event_locked +ffffffff81941aa0 T drm_send_event +ffffffff81941af0 T drm_print_memory_stats +ffffffff81941d70 T drm_show_memory_stats +ffffffff81941fb0 T drm_show_fdinfo +ffffffff81941fd0 T mock_drm_getfile +ffffffff81943000 T drm_flip_work_allocate_task +ffffffff81943060 T drm_flip_work_queue_task +ffffffff819430b0 T drm_flip_work_queue +ffffffff81943150 T drm_flip_work_commit +ffffffff819431d0 T drm_flip_work_init +ffffffff81943240 t flip_worker +ffffffff81943320 T drm_flip_work_cleanup +ffffffff81944000 T drm_fb_clip_offset +ffffffff81944040 T drm_fb_memcpy +ffffffff819442f0 T drm_fb_swab +ffffffff81944400 t drm_fb_swab32_line +ffffffff81944460 t drm_fb_swab16_line +ffffffff819444c0 t drm_fb_xfrm +ffffffff819447b0 T drm_fb_xrgb8888_to_rgb332 +ffffffff81944810 t drm_fb_xrgb8888_to_rgb332_line +ffffffff81944910 T drm_fb_xrgb8888_to_rgb565 +ffffffff81944990 t drm_fb_xrgb8888_to_rgb565_swab_line +ffffffff81944a10 t drm_fb_xrgb8888_to_rgb565_line +ffffffff81944b20 T drm_fb_xrgb8888_to_xrgb1555 +ffffffff81944b80 t drm_fb_xrgb8888_to_xrgb1555_line +ffffffff81944c90 T drm_fb_xrgb8888_to_argb1555 +ffffffff81944cf0 t drm_fb_xrgb8888_to_argb1555_line +ffffffff81944e10 T drm_fb_xrgb8888_to_rgba5551 +ffffffff81944e70 t drm_fb_xrgb8888_to_rgba5551_line +ffffffff81944f80 T drm_fb_xrgb8888_to_rgb888 +ffffffff81944fe0 t drm_fb_xrgb8888_to_rgb888_line +ffffffff81945070 T drm_fb_xrgb8888_to_argb8888 +ffffffff819450d0 t drm_fb_xrgb8888_to_argb8888_line +ffffffff819451a0 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff81945200 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff81945280 T drm_fb_xrgb8888_to_argb2101010 +ffffffff819452e0 t drm_fb_xrgb8888_to_argb2101010_line +ffffffff81945370 T drm_fb_xrgb8888_to_gray8 +ffffffff819453d0 t drm_fb_xrgb8888_to_gray8_line +ffffffff81945440 T drm_fb_blit +ffffffff81945ac0 T drm_fb_xrgb8888_to_mono +ffffffff81945e50 T drm_fb_build_fourcc_list +ffffffff81946120 t drm_fb_xrgb8888_to_xbgr8888_line +ffffffff81946200 t drm_fb_xrgb8888_to_abgr8888_line +ffffffff81947000 T drm_mode_legacy_fb_format +ffffffff819470f0 T drm_driver_legacy_fb_format +ffffffff819471f0 T __drm_format_info +ffffffff81947270 T drm_format_info +ffffffff81947320 T drm_get_format_info +ffffffff819473f0 T drm_format_info_block_width +ffffffff81947440 T drm_format_info_block_height +ffffffff81947490 T drm_format_info_bpp +ffffffff81947510 T drm_format_info_min_pitch +ffffffff81948000 T drm_framebuffer_check_src_coords +ffffffff81948120 T drm_mode_addfb +ffffffff81948330 T drm_mode_addfb2 +ffffffff81948430 T drm_mode_addfb_ioctl +ffffffff81948450 T drm_internal_framebuffer_create +ffffffff81948a30 T drm_mode_addfb2_ioctl +ffffffff81948b30 T drm_mode_rmfb +ffffffff81948d10 T drm_framebuffer_lookup +ffffffff81948d60 t drm_mode_rmfb_work_fn +ffffffff81948e20 T drm_mode_rmfb_ioctl +ffffffff81948e40 T drm_mode_getfb +ffffffff81948f90 T drm_mode_getfb2_ioctl +ffffffff81949340 T drm_mode_dirtyfb_ioctl +ffffffff819494e0 T drm_fb_release +ffffffff819495f0 T drm_framebuffer_free +ffffffff81949630 T drm_framebuffer_init +ffffffff81949790 T drm_framebuffer_unregister_private +ffffffff819497d0 T drm_framebuffer_cleanup +ffffffff81949830 T drm_framebuffer_remove +ffffffff81949cc0 T drm_framebuffer_plane_width +ffffffff81949d10 T drm_framebuffer_plane_height +ffffffff81949d60 T drm_framebuffer_print_info +ffffffff8194b000 T drm_ref +ffffffff8194b030 T drm_unref +ffffffff8194b0b0 T drm_fault +ffffffff8194b280 T drm_flush +ffffffff8194b2b0 T udv_attach_drm +ffffffff8194b4a0 T drm_gem_init +ffffffff8194b550 t drm_gem_init_release +ffffffff8194b570 T drm_gem_object_init +ffffffff8194b6f0 T drm_gem_private_object_init +ffffffff8194b810 T drm_gem_private_object_fini +ffffffff8194b870 T drm_gem_handle_delete +ffffffff8194b960 t drm_gem_object_release_handle +ffffffff8194b9f0 T drm_gem_dumb_map_offset +ffffffff8194bb20 T drm_gem_object_lookup +ffffffff8194bb90 T drm_gem_create_mmap_offset +ffffffff8194bbc0 T drm_gem_handle_create_tail +ffffffff8194bd30 t drm_gem_object_handle_put_unlocked +ffffffff8194be80 T drm_gem_handle_create +ffffffff8194bed0 T drm_gem_free_mmap_offset +ffffffff8194bf00 T drm_gem_create_mmap_offset_size +ffffffff8194bf30 T drm_gem_get_pages +ffffffff8194bf80 T drm_gem_put_pages +ffffffff8194bfb0 T drm_gem_objects_lookup +ffffffff8194c110 T drm_gem_dma_resv_wait +ffffffff8194c240 T drm_gem_close_ioctl +ffffffff8194c290 T drm_gem_flink_ioctl +ffffffff8194c400 T drm_gem_open_ioctl +ffffffff8194c530 T drm_gem_open +ffffffff8194c560 T drm_gem_release +ffffffff8194c5a0 T drm_gem_object_release +ffffffff8194c6f0 T drm_gem_lru_remove +ffffffff8194c7d0 T drm_gem_object_free +ffffffff8194c820 T drm_gem_mmap_obj +ffffffff8194c920 T drm_gem_mmap +ffffffff8194cb90 T drm_gem_print_info +ffffffff8194ccb0 T drm_gem_pin +ffffffff8194ccf0 T drm_gem_unpin +ffffffff8194cd30 T drm_gem_vmap +ffffffff8194cd90 T drm_gem_vunmap +ffffffff8194ce00 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drm_ht_verbose_list +ffffffff81951140 T drm_ht_insert_item +ffffffff81951190 T drm_ht_just_insert_please +ffffffff81951260 T drm_ht_find_item +ffffffff819512b0 T drm_ht_remove_key +ffffffff81951300 T drm_ht_remove_item +ffffffff81951350 T drm_ht_remove +ffffffff81952000 T drm_getunique +ffffffff819520a0 T drm_getclient +ffffffff81952110 T drm_noop +ffffffff81952170 T drm_invalid_op +ffffffff819521a0 T drm_version +ffffffff819523b0 T pledge_ioctl_drm +ffffffff81952480 T drm_ioctl_kernel +ffffffff819524d0 T drm_ioctl +ffffffff81952520 T drm_ioctl_flags +ffffffff81952570 T drm_do_ioctl +ffffffff819528a0 T drmioctl +ffffffff819529f0 t drm_getstats +ffffffff81952a40 t drm_setversion +ffffffff81952ba0 t drm_getcap +ffffffff81952d60 t drm_setclientcap +ffffffff81953000 T tasklet_unlock_wait +ffffffff81953080 T tasklet_unlock_spin_wait +ffffffff81953100 T tasklet_run +ffffffff81953160 T set_current_state +ffffffff81953200 T __set_current_state +ffffffff81953290 T schedule +ffffffff819532d0 T schedule_timeout +ffffffff81953380 T schedule_timeout_uninterruptible +ffffffff819533e0 T wake_up_process +ffffffff81953460 T autoremove_wake_function +ffffffff81953510 T prepare_to_wait +ffffffff81953600 T finish_wait +ffffffff819536b0 T flush_workqueue +ffffffff819536f0 T flush_work +ffffffff81953740 T flush_delayed_work +ffffffff819537e0 T kthread_func +ffffffff81953820 T kthread_run +ffffffff81953900 T kthread_create_worker +ffffffff819539c0 T kthread_destroy_worker +ffffffff81953a00 T kthread_init_work +ffffffff81953a20 T kthread_queue_work +ffffffff81953a60 T kthread_cancel_work_sync +ffffffff81953aa0 T kthread_flush_work +ffffffff81953ae0 T kthread_flush_worker +ffffffff81953b20 T kthread_lookup +ffffffff81953ba0 T kthread_should_park +ffffffff81953c20 T kthread_parkme +ffffffff81953ce0 T kthread_park +ffffffff81953de0 T kthread_unpark +ffffffff81953e40 T kthread_should_stop +ffffffff81953ec0 T kthread_stop +ffffffff81954020 T dmi_match +ffffffff819540d0 T dmi_first_match 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backlight_schedule_update_status +ffffffff819577a0 T backlight_enable +ffffffff819577e0 T backlight_disable +ffffffff81957820 T backlight_device_get_by_name +ffffffff81957890 T dev_set_drvdata +ffffffff81957930 T dev_get_drvdata +ffffffff81957990 T drm_sysfs_hotplug_event +ffffffff819579b0 T drm_sysfs_connector_hotplug_event +ffffffff819579d0 T drm_sysfs_connector_status_event +ffffffff819579f0 T drm_sysfs_connector_property_event +ffffffff81957a10 T dma_fence_get +ffffffff81957a50 T dma_fence_get_rcu +ffffffff81957a90 T dma_fence_get_rcu_safe +ffffffff81957ad0 T dma_fence_release +ffffffff81957b00 T dma_fence_put +ffffffff81957b70 T dma_fence_signal_timestamp_locked +ffffffff81957c20 T dma_fence_signal +ffffffff81957d50 T dma_fence_signal_locked +ffffffff81957e60 T dma_fence_signal_timestamp +ffffffff81957f40 T dma_fence_is_signaled +ffffffff81957fb0 T dma_fence_is_signaled_locked +ffffffff819580f0 T dma_fence_timestamp +ffffffff81958190 T dma_fence_wait_timeout +ffffffff819581f0 T dma_fence_default_wait +ffffffff819583d0 T dma_fence_wait +ffffffff81958430 T dma_fence_enable_sw_signaling +ffffffff81958580 T dma_fence_init +ffffffff819585e0 T dma_fence_add_callback +ffffffff81958710 T dma_fence_remove_callback +ffffffff81958790 T dma_fence_context_alloc +ffffffff819587d0 t dma_fence_default_wait_cb +ffffffff81958820 T dma_fence_wait_any_timeout +ffffffff81958b30 T dma_fence_set_deadline +ffffffff81958bd0 T dma_fence_get_stub +ffffffff81958d60 T dma_fence_allocate_private_stub +ffffffff81958e80 T dma_fence_array_create +ffffffff81958f90 t irq_dma_fence_array_work +ffffffff81959020 T dma_fence_array_first +ffffffff81959070 T dma_fence_array_next +ffffffff819590c0 t dma_fence_array_get_driver_name +ffffffff819590f0 t dma_fence_array_get_timeline_name +ffffffff81959120 t dma_fence_array_enable_signaling +ffffffff81959220 t dma_fence_array_signaled +ffffffff81959270 t dma_fence_array_release +ffffffff81959330 T dma_fence_chain_find_seqno +ffffffff81959450 T dma_fence_chain_walk +ffffffff81959680 T dma_fence_chain_init +ffffffff81959790 t dma_fence_chain_get_driver_name +ffffffff819597c0 t dma_fence_chain_get_timeline_name +ffffffff819597f0 t dma_fence_chain_enable_signaling +ffffffff819599a0 t dma_fence_chain_signaled +ffffffff81959a90 t dma_fence_chain_release +ffffffff81959bd0 T dma_fence_is_container +ffffffff81959c20 T dmabuf_read +ffffffff81959c50 T dmabuf_write +ffffffff81959c80 T dmabuf_ioctl +ffffffff81959cb0 T dmabuf_kqfilter +ffffffff81959ce0 T dmabuf_stat +ffffffff81959da0 T dmabuf_close +ffffffff81959e10 T dmabuf_seek +ffffffff81959ea0 T dma_buf_export +ffffffff81959f50 T dma_buf_get +ffffffff81959fe0 T dma_buf_put +ffffffff8195a090 T dma_buf_fd +ffffffff8195a1a0 T get_dma_buf +ffffffff8195a1e0 T pcie_get_speed_cap +ffffffff8195a390 T printk +ffffffff8195a430 T pcie_get_width_cap +ffffffff8195a520 T pcie_aspm_enabled +ffffffff8195a5b0 T wait_on_bit +ffffffff8195a680 T wait_on_bit_timeout +ffffffff8195a750 T wake_up_bit +ffffffff8195a790 T clear_and_wake_up_bit +ffffffff8195a7e0 T bit_waitqueue +ffffffff8195a810 T __var_waitqueue +ffffffff8195a840 T drm_linux_init +ffffffff8195a9b0 T drm_linux_exit +ffffffff8195aa10 T pci_resize_resource +ffffffff8195ab60 T register_shrinker +ffffffff8195abb0 T unregister_shrinker +ffffffff8195ac10 T drmbackoff +ffffffff8195aca0 T bitmap_zalloc +ffffffff8195acd0 T bitmap_free +ffffffff8195acf0 T atomic_dec_and_mutex_lock +ffffffff8195ad70 T interval_tree_iter_first +ffffffff8195ae20 T interval_tree_remove +ffffffff8195ae40 T interval_tree_insert +ffffffff8195aeb0 T syncfile_read +ffffffff8195aee0 T syncfile_write +ffffffff8195af10 T syncfile_ioctl +ffffffff8195af40 T syncfile_kqfilter +ffffffff8195af70 T syncfile_stat +ffffffff8195b020 T syncfile_close +ffffffff8195b0c0 T syncfile_seek +ffffffff8195b140 T fd_install +ffffffff8195b210 T fput +ffffffff8195b260 T get_unused_fd_flags +ffffffff8195b370 T put_unused_fd +ffffffff8195b400 T sync_file_get_fence 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+ffffffff8195d060 T mipi_dsi_detach +ffffffff8195d0f0 T devm_mipi_dsi_attach +ffffffff8195d170 T mipi_dsi_packet_format_is_short +ffffffff8195d1b0 T mipi_dsi_packet_format_is_long +ffffffff8195d1f0 T mipi_dsi_create_packet +ffffffff8195d300 T mipi_dsi_shutdown_peripheral +ffffffff8195d3b0 T mipi_dsi_turn_on_peripheral +ffffffff8195d460 T mipi_dsi_set_maximum_return_packet_size +ffffffff8195d510 T mipi_dsi_compression_mode +ffffffff8195d5c0 T mipi_dsi_picture_parameter_set +ffffffff8195d670 T mipi_dsi_generic_write +ffffffff8195d730 T mipi_dsi_generic_read +ffffffff8195d7e0 T mipi_dsi_dcs_write_buffer +ffffffff8195d8a0 T mipi_dsi_dcs_write +ffffffff8195d9f0 T mipi_dsi_dcs_read +ffffffff8195da90 T mipi_dsi_dcs_nop +ffffffff8195db40 T mipi_dsi_dcs_soft_reset +ffffffff8195dbf0 T mipi_dsi_dcs_get_power_mode +ffffffff8195dcb0 T mipi_dsi_dcs_get_pixel_format +ffffffff8195dd70 T mipi_dsi_dcs_enter_sleep_mode +ffffffff8195de20 T mipi_dsi_dcs_exit_sleep_mode +ffffffff8195ded0 T mipi_dsi_dcs_set_display_off +ffffffff8195df80 T mipi_dsi_dcs_set_display_on +ffffffff8195e030 T mipi_dsi_dcs_set_column_address +ffffffff8195e0f0 T mipi_dsi_dcs_set_page_address +ffffffff8195e1b0 T mipi_dsi_dcs_set_tear_off +ffffffff8195e260 T mipi_dsi_dcs_set_tear_on +ffffffff8195e310 T mipi_dsi_dcs_set_pixel_format +ffffffff8195f000 T __drm_mm_interval_first +ffffffff8195f0c0 T drm_mm_reserve_node +ffffffff8195f340 t add_hole +ffffffff8195f4a0 T drm_mm_insert_node_in_range +ffffffff8195fa90 T drm_mm_remove_node +ffffffff8195fbc0 T drm_mm_replace_node +ffffffff8195fda0 T drm_mm_scan_init_with_range +ffffffff8195fe30 T drm_mm_scan_add_block +ffffffff8195ffa0 T drm_mm_scan_remove_block +ffffffff81960020 T drm_mm_scan_color_evict +ffffffff81960100 T drm_mm_init +ffffffff819601b0 T drm_mm_takedown +ffffffff819601f0 T drm_mm_print +ffffffff81961000 T drm_modeset_register_all +ffffffff819610a0 T drm_modeset_unregister_all +ffffffff819610e0 T drm_mode_getresources +ffffffff81961390 T drm_mode_config_reset +ffffffff819614f0 T drmm_mode_config_init +ffffffff81961b70 T drm_mode_config_cleanup +ffffffff81961e90 t drm_mode_config_init_release +ffffffff81961ea0 T drm_mode_config_validate +ffffffff81963000 T __drm_mode_object_add +ffffffff81963100 T drm_mode_object_add +ffffffff819631e0 T drm_mode_object_register +ffffffff81963230 T drm_mode_object_unregister +ffffffff819632d0 T drm_mode_object_lease_required +ffffffff81963320 T __drm_mode_object_find +ffffffff819633d0 T drm_mode_object_find +ffffffff81963480 T drm_mode_object_put +ffffffff81963500 T drm_mode_object_get +ffffffff81963560 T drm_object_attach_property +ffffffff81963670 T drm_object_property_set_value +ffffffff81963750 T drm_object_property_get_value +ffffffff819637e0 t __drm_object_property_get_value +ffffffff819638c0 T drm_object_property_get_default_value +ffffffff81963990 T drm_mode_object_get_properties +ffffffff81963ad0 T drm_mode_obj_get_properties_ioctl +ffffffff81963d20 T drm_mode_obj_find_prop_id +ffffffff81963d80 T drm_mode_obj_set_property_ioctl +ffffffff81965000 T drm_mode_debug_printmodeline +ffffffff81965140 T drm_mode_vrefresh +ffffffff819651e0 T drm_mode_create +ffffffff81965200 T drm_mode_destroy +ffffffff81965240 T drm_mode_probed_add +ffffffff819652e0 T drm_analog_tv_mode +ffffffff81965b80 T drm_cvt_mode +ffffffff81966000 T drm_mode_set_name +ffffffff81966050 T drm_gtf_mode_complex +ffffffff81966350 T drm_gtf_mode +ffffffff819663a0 T drm_mode_get_hv_timing +ffffffff819663f0 T drm_mode_init +ffffffff819664c0 T drm_mode_set_crtcinfo +ffffffff81966680 T drm_mode_copy +ffffffff819666e0 T drm_mode_duplicate +ffffffff81966760 T drm_mode_match +ffffffff81966900 T drm_mode_equal +ffffffff81966920 T drm_mode_equal_no_clocks +ffffffff81966940 T drm_mode_equal_no_clocks_no_stereo +ffffffff81966a00 T drm_mode_validate_driver +ffffffff81966af0 T drm_mode_validate_size +ffffffff81966b40 T drm_mode_validate_ycbcr420 +ffffffff81966bb0 T drm_mode_is_420_only +ffffffff81966c00 T drm_get_mode_status_name +ffffffff81966c80 T drm_mode_prune_invalid +ffffffff81966f10 T drm_mode_sort +ffffffff81966f40 t drm_mode_compare +ffffffff819670e0 T drm_connector_list_update +ffffffff819672b0 T drm_mode_parse_command_line_for_connector +ffffffff819672e0 T drm_mode_create_from_cmdline_mode +ffffffff819674a0 T drm_mode_convert_to_umode +ffffffff81967640 T drm_mode_convert_umode +ffffffff81967860 T drm_mode_is_420_also +ffffffff819678b0 T drm_mode_is_420 +ffffffff81968000 T drm_helper_move_panel_connectors_to_head +ffffffff819680f0 T drm_helper_mode_fill_fb_struct +ffffffff819681b0 T drm_crtc_init +ffffffff81968280 T drm_mode_config_helper_suspend +ffffffff81968310 T drm_mode_config_helper_resume +ffffffff81969000 T drm_modeset_lock_all +ffffffff81969290 T drm_modeset_acquire_init +ffffffff81969320 T drm_modeset_lock_all_ctx +ffffffff81969410 T drm_modeset_backoff +ffffffff819694e0 T drm_modeset_acquire_fini +ffffffff81969510 T drm_warn_on_modeset_not_all_locked +ffffffff81969660 T drm_modeset_unlock_all +ffffffff81969750 T drm_modeset_drop_locks +ffffffff819697e0 T drm_modeset_unlock +ffffffff819698b0 t modeset_lock +ffffffff81969bf0 T drm_modeset_lock_init +ffffffff81969c50 T drm_modeset_lock +ffffffff81969d70 T drm_modeset_lock_single_interruptible +ffffffff81969e90 t __ww_mutex_lock +ffffffff8196b000 T drm_mtrr_add +ffffffff8196b070 T drm_mtrr_del +ffffffff8196c000 T drm_panel_init +ffffffff8196c090 T drm_panel_add +ffffffff8196c0e0 T drm_panel_remove +ffffffff8196c140 T drm_panel_prepare +ffffffff8196c250 T drm_panel_unprepare +ffffffff8196c360 T drm_panel_enable +ffffffff8196c450 T drm_panel_disable +ffffffff8196c530 T drm_panel_get_modes +ffffffff8196c580 T drm_is_panel_follower +ffffffff8196c5d0 T drm_panel_add_follower +ffffffff8196c620 T drm_panel_remove_follower +ffffffff8196c640 T devm_drm_panel_add_follower +ffffffff8196c690 T drm_panel_of_backlight +ffffffff8196d000 T drm_get_panel_orientation_quirk +ffffffff8196e000 T drm_pci_set_busid +ffffffff8196e090 t kasprintf +ffffffff8196f000 T drm_universal_plane_init +ffffffff8196f0e0 t __drm_universal_plane_init +ffffffff8196f5c0 T __drmm_universal_plane_alloc +ffffffff8196f700 t drmm_universal_plane_alloc_release +ffffffff8196f750 T __drm_universal_plane_alloc +ffffffff8196f890 T drm_plane_register_all +ffffffff8196f980 T drm_plane_unregister_all +ffffffff8196f9f0 T drm_plane_cleanup +ffffffff8196fb40 T drm_plane_from_index +ffffffff8196fba0 T drm_plane_force_disable +ffffffff8196fcb0 T drm_mode_plane_set_obj_prop +ffffffff8196fd30 T drm_mode_getplane_res +ffffffff8196fe60 T drm_mode_getplane +ffffffff8196ffb0 T drm_plane_check_pixel_format +ffffffff81970070 T drm_any_plane_has_format +ffffffff819701a0 T drm_mode_setplane +ffffffff81970490 T drm_mode_cursor_ioctl +ffffffff81970500 t drm_mode_cursor_common +ffffffff81970a40 T drm_mode_cursor2_ioctl +ffffffff81970a60 T drm_mode_page_flip_ioctl +ffffffff81970fe0 T drm_plane_enable_fb_damage_clips +ffffffff81971000 T drm_plane_get_damage_clips_count +ffffffff81971040 T __drm_plane_get_damage_clips +ffffffff81971080 T drm_plane_get_damage_clips +ffffffff81971120 T drm_create_scaling_filter_prop +ffffffff81971270 T drm_plane_create_scaling_filter_property +ffffffff819712e0 t kvasprintf +ffffffff81971380 t kasprintf +ffffffff81971450 t create_in_format_blob +ffffffff81971640 t __setplane_atomic +ffffffff819717e0 t __setplane_internal +ffffffff819719f0 t __setplane_check +ffffffff81972000 T drm_plane_helper_update_primary +ffffffff819724c0 t get_connectors_for_crtc +ffffffff819725d0 T drm_plane_helper_disable_primary +ffffffff81972680 T drm_plane_helper_destroy +ffffffff819726b0 T drm_plane_helper_atomic_check +ffffffff81973000 T drm_prime_remove_buf_handle +ffffffff819730a0 T drm_prime_init_file_private +ffffffff81973100 T drm_prime_destroy_file_private +ffffffff81973160 T drm_gem_dmabuf_export +ffffffff819731c0 T drm_gem_dmabuf_release +ffffffff81973200 T drm_gem_prime_fd_to_handle +ffffffff81973420 T drm_gem_prime_import +ffffffff81973480 t drm_prime_add_buf_handle +ffffffff819735c0 T drm_prime_fd_to_handle_ioctl +ffffffff819735f0 T drm_gem_prime_handle_to_fd +ffffffff81973820 T drm_prime_handle_to_fd_ioctl +ffffffff81973890 T drm_gem_map_attach +ffffffff819738e0 T drm_gem_map_detach +ffffffff81973900 T drm_gem_dmabuf_vmap +ffffffff81973920 T drm_gem_dmabuf_vunmap +ffffffff81973940 T drm_gem_prime_mmap +ffffffff81973990 T drm_prime_pages_to_sg +ffffffff819739e0 T drm_prime_get_contiguous_size +ffffffff81973a30 T drm_gem_prime_export +ffffffff81973ac0 T drm_gem_prime_import_dev +ffffffff81973b20 T drm_prime_sg_to_page_array +ffffffff81973b70 T drm_prime_sg_to_dma_addr_array +ffffffff81973bc0 T drm_prime_gem_destroy +ffffffff81974000 T __drm_puts_coredump +ffffffff819740e0 T __drm_printfn_coredump +ffffffff819742b0 T __drm_puts_seq_file +ffffffff819742e0 T __drm_printfn_seq_file +ffffffff81974310 T __drm_printfn_info +ffffffff81974340 T __drm_printfn_debug +ffffffff81974370 T __drm_printfn_err +ffffffff819743b0 T drm_puts +ffffffff819743e0 T drm_printf +ffffffff81974460 T drm_print_bits +ffffffff81974690 T drm_dev_printk +ffffffff81974730 T __drm_dev_dbg +ffffffff819747c0 T ___drm_dbg +ffffffff81974850 T __drm_err +ffffffff819748e0 T drm_print_regset32 +ffffffff81975000 T drm_crtc_mode_valid +ffffffff81975050 T drm_encoder_mode_valid +ffffffff81975090 T drm_connector_mode_valid +ffffffff81975110 T drm_kms_helper_poll_enable +ffffffff81975250 T drm_kms_helper_poll_reschedule +ffffffff819752b0 T drm_helper_probe_detect +ffffffff819754a0 T drm_helper_probe_single_connector_modes +ffffffff81975a20 t __drm_helper_update_and_validate +ffffffff81975dd0 T drm_kms_helper_hotplug_event +ffffffff81975e10 T drm_kms_helper_connector_hotplug_event +ffffffff81975e50 T drm_kms_helper_is_poll_worker +ffffffff81975e80 T drm_kms_helper_poll_disable +ffffffff81975f50 T drm_kms_helper_poll_init +ffffffff81975fb0 t output_poll_execute +ffffffff81976200 T drm_kms_helper_poll_fini +ffffffff81976250 T drm_connector_helper_hpd_irq_event +ffffffff81976310 t check_connector_changed +ffffffff819764e0 T drm_helper_hpd_irq_event +ffffffff81976630 T drm_crtc_helper_mode_valid_fixed +ffffffff81976680 T drm_connector_helper_get_modes_from_ddc +ffffffff81976710 T drm_connector_helper_get_modes_fixed +ffffffff81976880 T drm_connector_helper_get_modes +ffffffff819768f0 T drm_connector_helper_tv_get_modes +ffffffff81976b30 t __delayed_work_tick +ffffffff81977000 T drm_property_create +ffffffff819771f0 T drm_property_create_enum +ffffffff819772a0 T drm_property_add_enum +ffffffff819774a0 T drm_property_destroy +ffffffff81977550 T drm_property_create_bitmask +ffffffff81977680 T drm_property_create_range +ffffffff819776f0 T drm_property_create_signed_range +ffffffff81977760 T drm_property_create_object +ffffffff81977800 T drm_property_create_bool +ffffffff81977860 T drm_mode_getproperty_ioctl +ffffffff81977ab0 T drm_property_create_blob +ffffffff81977bf0 t drm_property_free_blob +ffffffff81977c70 T drm_property_blob_put +ffffffff81977cb0 T drm_property_destroy_user_blobs +ffffffff81977d30 T drm_property_blob_get +ffffffff81977d70 T drm_property_lookup_blob +ffffffff81977d90 T drm_property_replace_global_blob +ffffffff81977ee0 T drm_property_replace_blob +ffffffff81977f50 T drm_mode_getblob_ioctl +ffffffff81978010 T drm_mode_createblob_ioctl +ffffffff81978110 T drm_mode_destroyblob_ioctl +ffffffff81978210 T drm_property_change_valid_get +ffffffff81978470 T drm_property_change_valid_put +ffffffff81979000 T drm_rect_intersect +ffffffff81979080 T drm_rect_clip_scaled +ffffffff819792f0 T drm_rect_calc_hscale +ffffffff819793c0 T drm_rect_calc_vscale +ffffffff81979490 T drm_rect_debug_print +ffffffff819795b0 T drm_rect_rotate +ffffffff81979670 T drm_rect_rotate_inv +ffffffff8197a000 T drm_self_refresh_helper_update_avg_times +ffffffff8197a150 T drm_self_refresh_helper_alter_state +ffffffff8197a2e0 T drm_self_refresh_helper_init +ffffffff8197a470 t drm_self_refresh_helper_entry_work +ffffffff8197a5d0 T drm_self_refresh_helper_cleanup +ffffffff8197a650 t __delayed_work_tick +ffffffff8197b000 T drm_suballoc_manager_init +ffffffff8197b180 T drm_suballoc_manager_fini +ffffffff8197b290 t drm_suballoc_try_free +ffffffff8197b380 T drm_suballoc_new +ffffffff8197bda0 t drm_suballoc_event +ffffffff8197bee0 T drm_suballoc_free +ffffffff8197d000 T drm_syncobj_find +ffffffff8197d080 T drm_syncobj_add_point +ffffffff8197d190 t syncobj_wait_syncobj_func +ffffffff8197d240 t syncobj_eventfd_entry_func +ffffffff8197d320 T drm_syncobj_replace_fence +ffffffff8197d3d0 T drm_syncobj_find_fence +ffffffff8197d720 t drm_syncobj_fence_add_wait +ffffffff8197d7f0 T drm_syncobj_free +ffffffff8197d870 T drm_syncobj_create +ffffffff8197da40 T drm_syncobj_get_handle +ffffffff8197db60 T drm_syncobj_get_fd +ffffffff8197dbb0 T drm_syncobj_open +ffffffff8197dbe0 T drm_syncobj_release +ffffffff8197dc20 t drm_syncobj_release_handle +ffffffff8197dce0 T drm_syncobj_create_ioctl +ffffffff8197de10 T drm_syncobj_destroy_ioctl +ffffffff8197df50 T drm_syncobj_handle_to_fd_ioctl +ffffffff8197e140 T drm_syncobj_fd_to_handle_ioctl +ffffffff8197e2f0 T drm_syncobj_transfer_ioctl +ffffffff8197e6d0 T drm_timeout_abs_to_jiffies +ffffffff8197e7a0 T drm_syncobj_wait_ioctl +ffffffff8197e920 t drm_syncobj_array_find +ffffffff8197eb40 t drm_syncobj_array_free +ffffffff8197ec30 T drm_syncobj_timeline_wait_ioctl +ffffffff8197edb0 T drm_syncobj_eventfd_ioctl +ffffffff8197ede0 T drm_syncobj_reset_ioctl +ffffffff8197eec0 T drm_syncobj_signal_ioctl +ffffffff8197f020 T drm_syncobj_timeline_signal_ioctl +ffffffff8197f260 T drm_syncobj_query_ioctl +ffffffff8197f470 t drm_syncobj_array_wait_timeout +ffffffff8197f8d0 t syncobj_wait_fence_func +ffffffff8197f8f0 t syncobj_eventfd_entry_fence_func +ffffffff81980000 T drm_vblank_count +ffffffff81980090 T drm_crtc_accurate_vblank_count +ffffffff819801a0 t drm_update_vblank_count +ffffffff819805e0 T drm_vblank_disable_and_save +ffffffff81980730 T drm_vblank_init +ffffffff819808b0 t vblank_disable_fn +ffffffff81980930 t drm_vblank_init_release +ffffffff819809c0 T drm_dev_has_vblank +ffffffff819809f0 T drm_crtc_vblank_waitqueue +ffffffff81980a40 T drm_calc_timestamping_constants +ffffffff81980c60 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff819811b0 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff819811d0 T drm_crtc_vblank_count +ffffffff81981260 T drm_crtc_vblank_count_and_time +ffffffff81981320 t drm_vblank_count_and_time +ffffffff819813d0 T drm_crtc_next_vblank_start +ffffffff81981520 T drm_crtc_arm_vblank_event +ffffffff81981600 T drm_crtc_send_vblank_event +ffffffff819817b0 t send_vblank_event +ffffffff81981860 T drm_vblank_get +ffffffff81981960 t drm_vblank_enable +ffffffff81981b60 T drm_crtc_vblank_get +ffffffff81981c60 T drm_vblank_put +ffffffff81981d90 T drm_crtc_vblank_put +ffffffff81981db0 T drm_wait_one_vblank +ffffffff819822a0 T drm_crtc_wait_one_vblank +ffffffff819822c0 T drm_crtc_vblank_off +ffffffff819826b0 T drm_crtc_vblank_reset +ffffffff819827e0 T drm_crtc_set_max_vblank_count +ffffffff819828c0 T drm_crtc_vblank_on +ffffffff81982a10 t drm_reset_vblank_timestamp +ffffffff81982bf0 T drm_crtc_vblank_restore +ffffffff81982fd0 T drm_legacy_modeset_ctl_ioctl +ffffffff819831f0 T drm_wait_vblank_ioctl +ffffffff81983740 t drm_wait_vblank_reply +ffffffff81983850 t drm_queue_vblank_event +ffffffff81983b90 T drm_handle_vblank +ffffffff81983e80 t drm_handle_vblank_events +ffffffff81984110 T drm_crtc_handle_vblank +ffffffff81984130 T drm_crtc_get_sequence_ioctl +ffffffff81984300 T drm_crtc_queue_sequence_ioctl +ffffffff819845c0 t __get_vblank_counter +ffffffff81985000 T drm_handle_vblank_works +ffffffff819851a0 T drm_vblank_cancel_pending_works +ffffffff819852e0 T drm_vblank_work_schedule +ffffffff81985550 T drm_vblank_work_cancel_sync +ffffffff819856a0 T drm_vblank_work_flush +ffffffff819857d0 T drm_vblank_work_init +ffffffff81985840 T drm_vblank_worker_init +ffffffff81986000 T drm_vma_offset_manager_init +ffffffff81986040 T drm_vma_offset_manager_destroy +ffffffff81986060 T drm_vma_offset_lookup_locked +ffffffff819860f0 T drm_vma_offset_add +ffffffff81986180 T drm_vma_offset_remove +ffffffff819861d0 T drm_vma_node_allow +ffffffff819861f0 t vma_node_allow +ffffffff81986310 T drm_vma_node_allow_once +ffffffff81986330 T drm_vma_node_revoke +ffffffff819863b0 T drm_vma_node_is_allowed +ffffffff81987000 T hdmi_avi_infoframe_init +ffffffff81987070 T hdmi_avi_infoframe_check +ffffffff819870c0 T hdmi_avi_infoframe_pack_only +ffffffff819872c0 T hdmi_avi_infoframe_pack +ffffffff81987320 T hdmi_spd_infoframe_init +ffffffff819873e0 T hdmi_spd_infoframe_check +ffffffff81987430 T hdmi_spd_infoframe_pack_only +ffffffff81987570 T hdmi_spd_infoframe_pack +ffffffff819876d0 T hdmi_audio_infoframe_init +ffffffff81987720 T hdmi_audio_infoframe_check +ffffffff81987770 T hdmi_audio_infoframe_pack_only +ffffffff819878d0 T hdmi_audio_infoframe_pack +ffffffff81987920 T hdmi_audio_infoframe_pack_for_dp +ffffffff81987a10 T hdmi_vendor_infoframe_init +ffffffff81987a70 T hdmi_vendor_infoframe_check +ffffffff81987b10 T hdmi_vendor_infoframe_pack_only +ffffffff81987cd0 T hdmi_vendor_infoframe_pack +ffffffff81987d70 T hdmi_drm_infoframe_init +ffffffff81987dd0 T hdmi_drm_infoframe_check +ffffffff81987e20 T hdmi_drm_infoframe_pack_only +ffffffff81988010 T hdmi_drm_infoframe_pack +ffffffff81988060 T hdmi_infoframe_check +ffffffff819881b0 T hdmi_infoframe_pack_only +ffffffff819883d0 T hdmi_infoframe_pack +ffffffff81988540 T hdmi_infoframe_log +ffffffff81989430 T hdmi_drm_infoframe_unpack_only +ffffffff81989510 T hdmi_infoframe_unpack +ffffffff8198a000 T list_sort +ffffffff8198b000 T radix_tree_lookup +ffffffff8198b0b0 T radix_tree_iter_find +ffffffff8198b180 T radix_tree_delete +ffffffff8198b310 T radix_tree_iter_delete +ffffffff8198b330 T radix_tree_insert +ffffffff8198c000 T sort +ffffffff8198c040 t qsort +ffffffff8198e000 T drm_dp_dual_mode_read +ffffffff8198e110 T drm_dp_dual_mode_write +ffffffff8198e1f0 T drm_dp_dual_mode_detect +ffffffff8198e490 T drm_dp_dual_mode_max_tmds_clock +ffffffff8198e5b0 T drm_dp_dual_mode_get_tmds_output +ffffffff8198e6d0 T drm_dp_dual_mode_set_tmds_output +ffffffff8198e950 T drm_dp_get_dual_mode_type_name +ffffffff8198e9c0 T drm_lspcon_get_mode +ffffffff8198ebe0 T drm_lspcon_set_mode +ffffffff8198f000 T drm_dp_channel_eq_ok +ffffffff8198f080 T drm_dp_clock_recovery_ok +ffffffff8198f0f0 T drm_dp_get_adjust_request_voltage +ffffffff8198f130 T drm_dp_get_adjust_request_pre_emphasis +ffffffff8198f180 T drm_dp_get_adjust_tx_ffe_preset +ffffffff8198f1c0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff8198f240 T drm_dp_128b132b_lane_symbol_locked +ffffffff8198f2b0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff8198f2e0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff8198f310 T drm_dp_128b132b_link_training_failed +ffffffff8198f340 T drm_dp_read_clock_recovery_delay +ffffffff8198f450 T drm_dp_read_channel_eq_delay +ffffffff8198f550 T drm_dp_128b132b_read_aux_rd_interval +ffffffff8198f600 T drm_dp_link_train_clock_recovery_delay +ffffffff8198f690 t __8b10b_clock_recovery_delay_us +ffffffff8198f710 T drm_dp_link_train_channel_eq_delay +ffffffff8198f780 T drm_dp_phy_name +ffffffff8198f7c0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff8198f7e0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff8198f850 T drm_dp_link_rate_to_bw_code +ffffffff8198f8c0 T drm_dp_bw_code_to_link_rate +ffffffff8198f920 T drm_dp_dpcd_probe +ffffffff8198fa60 t drm_dp_dpcd_access +ffffffff8198fb90 T drm_dp_dpcd_read +ffffffff8198fcc0 T drm_dp_dpcd_write +ffffffff8198fdd0 T drm_dp_dpcd_read_link_status +ffffffff8198fdf0 T drm_dp_dpcd_read_phy_link_status +ffffffff8198fef0 T drm_dp_downstream_is_type +ffffffff8198ff40 T drm_dp_downstream_is_tmds +ffffffff8198ffb0 T drm_dp_send_real_edid_checksum +ffffffff81990200 T drm_dp_read_dpcd_caps +ffffffff81990390 T drm_dp_read_downstream_info +ffffffff81990490 T drm_dp_downstream_max_dotclock +ffffffff819904e0 T drm_dp_downstream_max_tmds_clock +ffffffff81990580 T drm_dp_downstream_min_tmds_clock +ffffffff81990600 T drm_dp_downstream_max_bpc +ffffffff819906a0 T drm_dp_downstream_420_passthrough +ffffffff81990700 T drm_dp_downstream_444_to_420_conversion +ffffffff81990760 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff819907c0 T drm_dp_downstream_mode +ffffffff81990850 T drm_dp_downstream_id +ffffffff81990870 T drm_dp_downstream_debug +ffffffff81990910 T drm_dp_subconnector_type +ffffffff81990980 T drm_dp_set_subconnector_property +ffffffff819909f0 T drm_dp_read_sink_count_cap +ffffffff81990a40 T drm_dp_read_sink_count +ffffffff81990aa0 T drm_dp_remote_aux_init +ffffffff81990ad0 t drm_dp_aux_crc_work +ffffffff81990c40 T drm_dp_aux_init +ffffffff81990cf0 T drm_dp_aux_register +ffffffff81990e10 T drm_dp_aux_unregister +ffffffff81990e40 T drm_dp_psr_setup_time +ffffffff81990e90 T drm_dp_start_crc +ffffffff81990f40 T drm_dp_stop_crc +ffffffff81990fd0 T drm_dp_read_desc +ffffffff81991190 T drm_dp_dsc_sink_max_slice_count +ffffffff81991220 T drm_dp_dsc_sink_line_buf_depth +ffffffff81991260 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff819912d0 T drm_dp_read_lttpr_common_caps +ffffffff81991390 T drm_dp_read_lttpr_phy_caps +ffffffff81991450 T drm_dp_lttpr_count +ffffffff819914e0 T drm_dp_lttpr_max_link_rate +ffffffff81991540 T drm_dp_lttpr_max_lane_count +ffffffff81991570 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff819915a0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff819915d0 T drm_dp_get_phy_test_pattern +ffffffff819916f0 T drm_dp_set_phy_test_pattern +ffffffff819917b0 T drm_dp_vsc_sdp_log +ffffffff81991ad0 T drm_dp_get_pcon_max_frl_bw +ffffffff81991b20 T drm_dp_pcon_frl_prepare +ffffffff81991b70 T drm_dp_pcon_is_frl_ready +ffffffff81991bd0 T drm_dp_pcon_frl_configure_1 +ffffffff81991cd0 T drm_dp_pcon_frl_configure_2 +ffffffff81991d30 T drm_dp_pcon_reset_frl_config +ffffffff81991d80 T drm_dp_pcon_frl_enable +ffffffff81991e40 T drm_dp_pcon_hdmi_link_active +ffffffff81991e90 T drm_dp_pcon_hdmi_link_mode +ffffffff81991f00 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff81991ff0 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff81992020 T drm_dp_pcon_dsc_max_slices +ffffffff819920b0 T drm_dp_pcon_dsc_max_slice_width +ffffffff819920e0 T drm_dp_pcon_dsc_bpp_incr +ffffffff81992120 T drm_dp_pcon_pps_default +ffffffff819921a0 T drm_dp_pcon_pps_override_buf +ffffffff81992240 T drm_dp_pcon_pps_override_param +ffffffff81992310 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff819923b0 T drm_edp_backlight_set_level +ffffffff81992480 T drm_edp_backlight_enable +ffffffff81992690 t drm_edp_backlight_set_enable +ffffffff819927c0 T drm_edp_backlight_disable +ffffffff81992800 T drm_edp_backlight_init +ffffffff81992d60 T drm_panel_dp_aux_backlight +ffffffff81992ef0 t __128b132b_channel_eq_delay_us +ffffffff81992f70 t __8b10b_channel_eq_delay_us +ffffffff81992ff0 t drm_dp_aux_get_crc +ffffffff819930d0 t drm_dp_i2c_xfer +ffffffff81993340 t drm_dp_i2c_functionality +ffffffff81993370 t drm_dp_i2c_do_msg +ffffffff81993740 t lock_bus +ffffffff81993760 t trylock_bus +ffffffff819937b0 t unlock_bus +ffffffff819937d0 t dp_aux_backlight_update_status +ffffffff81994000 T drm_dp_encode_sideband_req +ffffffff81994440 T drm_dp_decode_sideband_req +ffffffff81994970 T drm_dp_dump_sideband_msg_req_body +ffffffff81994d40 T drm_dp_mst_get_port_malloc +ffffffff81994d90 T drm_dp_mst_put_port_malloc +ffffffff81994e80 t kref_put +ffffffff81994ec0 T drm_atomic_get_mst_payload_state +ffffffff81994f10 T drm_dp_mst_dpcd_read +ffffffff819951d0 T drm_dp_mst_dpcd_write +ffffffff81995220 t drm_dp_send_dpcd_write +ffffffff81995460 T drm_dp_mst_connector_late_register +ffffffff819954e0 T drm_dp_mst_connector_early_unregister +ffffffff81995520 T drm_dp_send_power_updown_phy +ffffffff81995760 t drm_dp_mst_topology_put_port +ffffffff81995880 t drm_dp_mst_wait_tx_reply +ffffffff81995c20 T drm_dp_send_query_stream_enc_status +ffffffff81995ee0 T drm_dp_add_payload_part1 +ffffffff81996090 T drm_dp_remove_payload +ffffffff81996230 T drm_dp_add_payload_part2 +ffffffff819963e0 T drm_dp_get_vc_payload_bw +ffffffff81996480 T drm_dp_read_mst_cap +ffffffff819964e0 T drm_dp_mst_topology_mgr_set_mst +ffffffff81996790 t drm_dp_dpcd_write_payload +ffffffff81996930 t drm_dp_mst_topology_put_mstb +ffffffff81996a30 T drm_dp_mst_topology_mgr_suspend +ffffffff81996af0 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff81996b60 T drm_dp_mst_topology_mgr_resume +ffffffff81996da0 T drm_dp_mst_hpd_irq_handle_event +ffffffff81997d10 T drm_dp_mst_hpd_irq_send_new_request +ffffffff81997d90 T drm_dp_mst_detect_port +ffffffff81997ef0 T drm_dp_mst_edid_read +ffffffff81997ff0 T drm_dp_mst_get_edid +ffffffff81998050 T drm_dp_atomic_find_time_slots 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intel_atomic_state_clear +ffffffff819d96e0 T intel_atomic_get_crtc_state +ffffffff819da000 T intel_plane_alloc +ffffffff819da0c0 T intel_plane_free +ffffffff819da100 T intel_plane_destroy_state +ffffffff819da1d0 T intel_plane_duplicate_state +ffffffff819da280 T intel_adjusted_rate +ffffffff819da300 T intel_plane_pixel_rate +ffffffff819da390 T intel_plane_data_rate +ffffffff819da450 T intel_plane_calc_min_cdclk +ffffffff819da5b0 T intel_plane_copy_uapi_to_hw_state +ffffffff819da720 T intel_plane_copy_hw_state +ffffffff819da810 T intel_plane_set_invisible +ffffffff819da910 T intel_plane_atomic_check_with_state +ffffffff819db580 T intel_plane_atomic_check +ffffffff819db6e0 T intel_plane_update_noarm +ffffffff819db720 T intel_plane_update_arm +ffffffff819db760 T intel_plane_disable_arm +ffffffff819db780 T intel_crtc_planes_update_noarm +ffffffff819db8a0 T intel_crtc_planes_update_arm +ffffffff819dbc90 T intel_atomic_plane_check_clipping +ffffffff819dbef0 T intel_plane_check_src_coordinates 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bxt_enable_backlight +ffffffff819e0b70 t bxt_hz_to_pwm +ffffffff819e0bb0 t cnp_setup_backlight +ffffffff819e0e60 t cnp_disable_backlight +ffffffff819e0f20 t cnp_enable_backlight +ffffffff819e10e0 t cnp_hz_to_pwm +ffffffff819e1120 t lpt_setup_backlight +ffffffff819e1480 t lpt_get_backlight +ffffffff819e14e0 t lpt_set_backlight +ffffffff819e1550 t lpt_disable_backlight +ffffffff819e1670 t lpt_enable_backlight +ffffffff819e1870 t lpt_hz_to_pwm +ffffffff819e18e0 t pch_get_backlight +ffffffff819e1940 t spt_hz_to_pwm +ffffffff819e1990 t pch_setup_backlight +ffffffff819e1ba0 t pch_set_backlight +ffffffff819e1c10 t pch_disable_backlight +ffffffff819e1d00 t pch_enable_backlight +ffffffff819e1f50 t pch_hz_to_pwm +ffffffff819e1f90 t ext_pwm_setup_backlight +ffffffff819e2040 t ext_pwm_get_backlight +ffffffff819e2090 t ext_pwm_set_backlight +ffffffff819e20b0 t ext_pwm_disable_backlight +ffffffff819e20d0 t ext_pwm_enable_backlight +ffffffff819e2100 t vlv_setup_backlight +ffffffff819e2350 t vlv_get_backlight +ffffffff819e23f0 t vlv_set_backlight +ffffffff819e2470 t vlv_disable_backlight +ffffffff819e2530 t vlv_enable_backlight +ffffffff819e26d0 t vlv_hz_to_pwm +ffffffff819e2770 t i965_setup_backlight +ffffffff819e29b0 t i9xx_get_backlight +ffffffff819e2a50 t i9xx_set_backlight +ffffffff819e2b90 t i965_disable_backlight +ffffffff819e2c40 t i965_enable_backlight +ffffffff819e2df0 t i965_hz_to_pwm +ffffffff819e2e50 t i9xx_setup_backlight +ffffffff819e3190 t i9xx_disable_backlight +ffffffff819e3200 t i9xx_enable_backlight +ffffffff819e33b0 t i9xx_hz_to_pwm +ffffffff819e3410 t intel_pwm_setup_backlight +ffffffff819e3520 t intel_pwm_get_backlight +ffffffff819e35f0 t intel_pwm_set_backlight +ffffffff819e36b0 t intel_pwm_disable_backlight +ffffffff819e3770 t intel_pwm_enable_backlight +ffffffff819e4000 T intel_bios_encoder_port +ffffffff819e4080 t dvo_port_to_port +ffffffff819e4260 T intel_bios_dp_max_link_rate +ffffffff819e42e0 T intel_bios_dp_max_lane_count +ffffffff819e4330 T intel_bios_encoder_supports_dvi +ffffffff819e4360 T intel_bios_encoder_supports_hdmi +ffffffff819e43a0 T intel_bios_encoder_supports_dp +ffffffff819e43d0 T intel_bios_encoder_supports_edp +ffffffff819e4410 T intel_bios_encoder_supports_dsi +ffffffff819e4440 T intel_bios_encoder_is_lspcon +ffffffff819e4490 T intel_bios_hdmi_level_shift +ffffffff819e44f0 T intel_bios_hdmi_max_tmds_clock +ffffffff819e4580 T intel_bios_is_valid_vbt +ffffffff819e4670 T intel_bios_init +ffffffff819e6500 T intel_bios_init_panel_early +ffffffff819e6520 t intel_bios_init_panel +ffffffff819e85a0 T intel_bios_init_panel_late +ffffffff819e85c0 T intel_bios_driver_remove +ffffffff819e86b0 T intel_bios_fini_panel +ffffffff819e8790 T intel_bios_is_tv_present +ffffffff819e8810 T intel_bios_is_lvds_present +ffffffff819e88c0 T intel_bios_is_port_present +ffffffff819e8990 T intel_bios_encoder_supports_dp_dual_mode +ffffffff819e8a00 T intel_bios_is_dsi_present +ffffffff819e8ad0 T intel_bios_get_dsc_params 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intel_cdclk_init +ffffffff819ee7f0 T intel_modeset_calc_cdclk +ffffffff819eee20 t intel_cdclk_can_crawl +ffffffff819eeeb0 T intel_update_max_cdclk +ffffffff819ef210 T intel_update_cdclk +ffffffff819ef2b0 T intel_read_rawclk +ffffffff819ef430 t i9xx_hrawclk +ffffffff819ef4e0 T intel_cdclk_debugfs_register +ffffffff819ef510 T intel_init_cdclk_hooks +ffffffff819ef930 t bxt_set_cdclk +ffffffff819effa0 t _bxt_set_cdclk +ffffffff819f0750 t skl_set_cdclk +ffffffff819f0d50 t intel_cdclk_duplicate_state +ffffffff819f0dd0 t intel_cdclk_destroy_state +ffffffff819f0df0 t bxt_get_cdclk +ffffffff819f1020 t bxt_modeset_calc_cdclk +ffffffff819f1470 t tgl_calc_voltage_level +ffffffff819f14c0 t intel_compute_min_cdclk +ffffffff819f16c0 t rplu_calc_voltage_level +ffffffff819f1710 t ehl_calc_voltage_level +ffffffff819f1760 t icl_calc_voltage_level +ffffffff819f17b0 t bxt_calc_voltage_level +ffffffff819f1800 t skl_get_cdclk +ffffffff819f1a10 t skl_modeset_calc_cdclk +ffffffff819f1c20 t bdw_get_cdclk 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intel_color_post_update +ffffffff819f4100 T intel_color_prepare_commit +ffffffff819f4130 T intel_color_cleanup_commit +ffffffff819f4180 T intel_color_check +ffffffff819f41a0 T intel_color_get_config +ffffffff819f4220 T intel_color_lut_equal +ffffffff819f4280 T intel_color_assert_luts +ffffffff819f4570 T intel_color_crtc_init +ffffffff819f45e0 T intel_color_init +ffffffff819f4710 T intel_color_init_hooks +ffffffff819f4840 t chv_color_check +ffffffff819f4d50 t i9xx_color_commit_arm +ffffffff819f4d60 t chv_load_luts +ffffffff819f5160 t chv_read_luts +ffffffff819f53e0 t chv_lut_equal +ffffffff819f5710 t chv_read_csc +ffffffff819f5830 t intel_color_add_affected_planes +ffffffff819f59a0 t _check_luts +ffffffff819f5b00 t i965_load_luts +ffffffff819f5e70 t i965_read_luts +ffffffff819f6240 t vlv_color_check +ffffffff819f66e0 t vlv_load_luts +ffffffff819f6890 t i965_lut_equal +ffffffff819f6a70 t vlv_read_csc +ffffffff819f6c50 t i9xx_color_check +ffffffff819f6ed0 t i9xx_load_luts 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ilk_csc_limited_range +ffffffff819fb290 t ilk_assign_csc +ffffffff819fb590 t ivb_color_check +ffffffff819fbbe0 t bdw_load_luts +ffffffff819fbdc0 t bdw_read_luts +ffffffff819fbfb0 t ivb_lut_equal +ffffffff819fc370 t ilk_assign_luts +ffffffff819fc590 t ilk_color_commit_noarm +ffffffff819fc5e0 t hsw_color_commit_arm +ffffffff819fc690 t ilk_read_csc +ffffffff819fc6e0 t ivb_load_luts +ffffffff819fc8c0 t ivb_read_luts +ffffffff819fcd70 t ivb_load_lut_10 +ffffffff819fcf70 t ilk_color_commit_arm +ffffffff819fcff0 t ilk_color_check +ffffffff819fd250 t ilk_load_luts +ffffffff819fd4e0 t ilk_read_luts +ffffffff819fd740 t ilk_lut_equal +ffffffff819fe000 T intel_combo_phy_power_up_lanes +ffffffff819fe120 T intel_combo_phy_init +ffffffff819fe5c0 T intel_combo_phy_uninit +ffffffff819fe790 t icl_combo_phy_verify_state +ffffffff819ff000 T intel_connector_init +ffffffff819ff070 T intel_connector_alloc +ffffffff819ff100 T intel_connector_free +ffffffff819ff140 T intel_connector_destroy +ffffffff819ff1a0 T intel_connector_register +ffffffff819ff1b0 T intel_connector_unregister +ffffffff819ff1c0 T intel_connector_attach_encoder +ffffffff819ff1e0 T intel_connector_get_hw_state +ffffffff819ff230 T intel_connector_get_pipe +ffffffff819ff2f0 T intel_connector_update_modes +ffffffff819ff320 T intel_ddc_get_modes +ffffffff819ff390 T intel_attach_force_audio_property +ffffffff819ff430 T intel_attach_broadcast_rgb_property +ffffffff819ff4d0 T intel_attach_aspect_ratio_property +ffffffff819ff530 T intel_attach_hdmi_colorspace_property +ffffffff819ff580 T intel_attach_dp_colorspace_property +ffffffff819ff5d0 T intel_attach_scaling_mode_property +ffffffff81a00000 T intel_crt_port_enabled +ffffffff81a00080 T intel_crt_reset +ffffffff81a00160 T intel_crt_init +ffffffff81a00590 t hsw_crt_get_config +ffffffff81a00640 t hsw_crt_compute_config +ffffffff81a00730 t hsw_pre_pll_enable_crt +ffffffff81a007a0 t hsw_pre_enable_crt +ffffffff81a00840 t hsw_enable_crt +ffffffff81a009e0 t hsw_disable_crt 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i9xx_cursor_update_arm +ffffffff81a07b20 t i9xx_cursor_disable_arm +ffffffff81a07b40 t i9xx_cursor_get_hw_state +ffffffff81a07c30 t i9xx_check_cursor +ffffffff81a07eb0 t intel_check_cursor +ffffffff81a080c0 t intel_legacy_cursor_update +ffffffff81a08480 t intel_cursor_format_mod_supported +ffffffff81a09000 T intel_is_c10phy +ffffffff81a09040 T intel_cx0_phy_set_signal_levels +ffffffff81a09630 t intel_cx0_rmw +ffffffff81a09720 T intel_c10pll_readout_hw_state +ffffffff81a098b0 T intel_c10pll_dump_hw_state +ffffffff81a09b30 T intel_cx0_phy_check_hdmi_link_rate +ffffffff81a09ca0 T intel_cx0pll_calc_state +ffffffff81a0a0b0 T intel_c20pll_readout_hw_state +ffffffff81a0a5d0 t intel_c20_sram_read +ffffffff81a0a6e0 T intel_c20pll_dump_hw_state +ffffffff81a0aa90 T intel_c10pll_calc_port_clock +ffffffff81a0ab70 T intel_c20pll_calc_port_clock +ffffffff81a0ac70 T intel_mtl_tbt_calc_port_clock +ffffffff81a0add0 T intel_mtl_pll_enable +ffffffff81a0c5d0 T intel_mtl_pll_disable +ffffffff81a0ca40 T intel_mtl_port_pll_type +ffffffff81a0cad0 T intel_c10pll_state_verify +ffffffff81a0cdc0 t __intel_cx0_read +ffffffff81a0d150 t __intel_cx0_write +ffffffff81a0d4a0 t intel_cx0_bus_reset +ffffffff81a0d5d0 t intel_cx0_wait_for_ack +ffffffff81a0d750 t intel_cx0_powerdown_change_sequence +ffffffff81a0d9b0 t intel_c20_sram_write +ffffffff81a0e000 T hsw_prepare_dp_ddi_buffers +ffffffff81a0e1a0 T intel_wait_ddi_buf_idle +ffffffff81a0e3a0 T intel_ddi_set_dp_msa +ffffffff81a0e570 T intel_ddi_enable_transcoder_func +ffffffff81a0e650 t intel_ddi_transcoder_func_reg_val_get +ffffffff81a0e900 T intel_ddi_disable_transcoder_func +ffffffff81a0eaf0 T intel_ddi_toggle_hdcp_bits +ffffffff81a0ec10 T intel_ddi_connector_get_hw_state +ffffffff81a0ed60 T intel_ddi_get_hw_state +ffffffff81a0edd0 t intel_ddi_get_encoder_pipes +ffffffff81a0f220 T intel_ddi_enable_transcoder_clock +ffffffff81a0f2e0 T intel_ddi_disable_transcoder_clock +ffffffff81a0f350 T intel_ddi_level +ffffffff81a0f530 T icl_ddi_combo_get_pll +ffffffff81a0f5b0 T hsw_ddi_enable_clock +ffffffff81a0f670 T hsw_ddi_disable_clock +ffffffff81a0f6b0 T hsw_ddi_is_clock_enabled +ffffffff81a0f710 T intel_ddi_enable_clock +ffffffff81a0f750 T intel_ddi_disable_clock +ffffffff81a0f790 T intel_ddi_sanitize_encoder_pll_mapping +ffffffff81a0f970 T dp_tp_ctl_reg +ffffffff81a0f9f0 T dp_tp_status_reg +ffffffff81a0fa70 T intel_ddi_update_pipe +ffffffff81a0fb00 T intel_ddi_update_active_dpll +ffffffff81a0fbf0 T intel_ddi_compute_min_voltage_level +ffffffff81a0fc70 T intel_ddi_get_clock +ffffffff81a0fd80 T intel_ddi_port_pll_type +ffffffff81a0fdc0 T hsw_ddi_get_config +ffffffff81a0feb0 t intel_ddi_get_config +ffffffff81a10800 T intel_ddi_init +ffffffff81a11580 t intel_ddi_hotplug +ffffffff81a11990 t intel_ddi_compute_output_type +ffffffff81a11a10 t intel_ddi_compute_config +ffffffff81a11b80 t intel_ddi_compute_config_late +ffffffff81a11e40 t intel_enable_ddi +ffffffff81a12790 t intel_ddi_pre_pll_enable +ffffffff81a12980 t intel_ddi_pre_enable +ffffffff81a13980 t intel_disable_ddi +ffffffff81a13b30 t intel_ddi_post_pll_disable +ffffffff81a13c10 t intel_ddi_post_disable +ffffffff81a140a0 t intel_ddi_sync_state +ffffffff81a14160 t intel_ddi_initial_fastset_check +ffffffff81a14220 t intel_ddi_encoder_suspend +ffffffff81a14230 t intel_ddi_encoder_shutdown +ffffffff81a14260 t intel_ddi_get_power_domains +ffffffff81a143e0 t mtl_ddi_get_config +ffffffff81a144c0 t dg2_ddi_get_config +ffffffff81a14510 t adls_ddi_enable_clock +ffffffff81a14680 t adls_ddi_disable_clock +ffffffff81a14730 t adls_ddi_is_clock_enabled +ffffffff81a147d0 t adls_ddi_get_config +ffffffff81a14890 t rkl_ddi_enable_clock +ffffffff81a14a10 t rkl_ddi_disable_clock +ffffffff81a14aa0 t rkl_ddi_is_clock_enabled +ffffffff81a14b20 t rkl_ddi_get_config +ffffffff81a14bf0 t dg1_ddi_enable_clock +ffffffff81a14da0 t dg1_ddi_disable_clock +ffffffff81a14e60 t dg1_ddi_is_clock_enabled +ffffffff81a14f00 t dg1_ddi_get_config +ffffffff81a14fd0 t jsl_ddi_tc_enable_clock +ffffffff81a15060 t jsl_ddi_tc_disable_clock +ffffffff81a15120 t jsl_ddi_tc_is_clock_enabled +ffffffff81a151d0 t icl_ddi_tc_port_pll_type +ffffffff81a15260 t icl_ddi_combo_get_config +ffffffff81a15300 t icl_ddi_combo_enable_clock +ffffffff81a15440 t icl_ddi_combo_disable_clock +ffffffff81a154e0 t icl_ddi_combo_is_clock_enabled +ffffffff81a15560 t icl_ddi_tc_enable_clock +ffffffff81a15730 t icl_ddi_tc_disable_clock +ffffffff81a15800 t icl_ddi_tc_is_clock_enabled +ffffffff81a158b0 t icl_ddi_tc_get_config +ffffffff81a15ad0 t bxt_ddi_get_config +ffffffff81a15b40 t skl_ddi_enable_clock +ffffffff81a15c40 t skl_ddi_disable_clock +ffffffff81a15cd0 t skl_ddi_is_clock_enabled +ffffffff81a15d40 t skl_ddi_get_config +ffffffff81a15dd0 t icl_combo_phy_set_signal_levels +ffffffff81a16890 t tgl_dkl_phy_set_signal_levels +ffffffff81a16ba0 t icl_mg_phy_set_signal_levels +ffffffff81a17430 t hsw_set_signal_levels +ffffffff81a177a0 t intel_ddi_max_lanes +ffffffff81a17870 t need_aux_ch +ffffffff81a178e0 t intel_ddi_tc_encoder_suspend_complete +ffffffff81a17920 t intel_ddi_tc_encoder_shutdown_complete +ffffffff81a17960 t lpt_digital_port_connected +ffffffff81a179d0 t bdw_digital_port_connected +ffffffff81a17a40 t hsw_digital_port_connected +ffffffff81a17ab0 t intel_ddi_init_dp_connector +ffffffff81a17b90 t intel_ddi_init_hdmi_connector +ffffffff81a17c00 t intel_ddi_encoder_reset +ffffffff81a17ce0 t intel_ddi_encoder_destroy +ffffffff81a17d90 t intel_ddi_encoder_late_register +ffffffff81a17df0 t mtl_ddi_enable_d2d +ffffffff81a17fb0 t intel_wait_ddi_buf_active +ffffffff81a182c0 t intel_ddi_main_link_aux_domain +ffffffff81a183b0 t icl_program_mg_dp_mode +ffffffff81a18680 t intel_ddi_init_dp_buf_reg +ffffffff81a18880 t intel_disable_ddi_buf +ffffffff81a18a30 t mtl_disable_ddi_buf +ffffffff81a18e50 t intel_ddi_disable_fec_state +ffffffff81a18fa0 t mtl_ddi_prepare_link_retrain +ffffffff81a192e0 t intel_ddi_prepare_link_retrain +ffffffff81a197e0 t intel_ddi_set_link_train +ffffffff81a19930 t intel_ddi_set_idle_link_train +ffffffff81a19b00 t intel_ddi_dp_voltage_max +ffffffff81a19bc0 t intel_ddi_dp_preemph_max +ffffffff81a1a000 T is_hobl_buf_trans +ffffffff81a1a040 T intel_ddi_buf_trans_init +ffffffff81a1a300 t mtl_get_cx0_buf_trans +ffffffff81a1a3e0 t dg2_get_snps_buf_trans +ffffffff81a1a450 t adlp_get_combo_buf_trans +ffffffff81a1a570 t adlp_get_dkl_buf_trans +ffffffff81a1a5d0 t adls_get_combo_buf_trans +ffffffff81a1a6f0 t rkl_get_combo_buf_trans +ffffffff81a1a810 t dg1_get_combo_buf_trans +ffffffff81a1a930 t tgl_get_combo_buf_trans +ffffffff81a1aa70 t tgl_get_dkl_buf_trans +ffffffff81a1aad0 t jsl_get_combo_buf_trans +ffffffff81a1ab70 t ehl_get_combo_buf_trans +ffffffff81a1ac10 t icl_get_combo_buf_trans +ffffffff81a1acc0 t icl_get_mg_buf_trans +ffffffff81a1ad20 t bxt_get_buf_trans +ffffffff81a1ada0 t kbl_y_get_buf_trans +ffffffff81a1ae40 t kbl_u_get_buf_trans +ffffffff81a1aee0 t kbl_get_buf_trans +ffffffff81a1af80 t skl_y_get_buf_trans +ffffffff81a1b020 t skl_u_get_buf_trans +ffffffff81a1b0c0 t skl_get_buf_trans +ffffffff81a1b160 t bdw_get_buf_trans +ffffffff81a1b1f0 t hsw_get_buf_trans +ffffffff81a1c000 T vlv_get_hpll_vco +ffffffff81a1c050 T vlv_get_cck_clock +ffffffff81a1c100 T vlv_get_cck_clock_hpll +ffffffff81a1c200 T intel_update_czclk +ffffffff81a1c280 T is_trans_port_sync_master +ffffffff81a1c2b0 T is_trans_port_sync_mode +ffffffff81a1c2f0 T intel_crtc_bigjoiner_slave_pipes +ffffffff81a1c350 T intel_crtc_is_bigjoiner_slave +ffffffff81a1c3b0 T intel_crtc_is_bigjoiner_master +ffffffff81a1c410 T intel_master_crtc +ffffffff81a1c4a0 T assert_transcoder +ffffffff81a1c660 t transcoder_name +ffffffff81a1c6a0 T vlv_wait_port_ready +ffffffff81a1c7f0 T intel_enable_transcoder +ffffffff81a1ca50 t assert_planes_disabled +ffffffff81a1cb80 T intel_disable_transcoder +ffffffff81a1cda0 T intel_rotation_info_size +ffffffff81a1cdf0 T intel_remapped_info_size +ffffffff81a1cf20 T intel_plane_uses_fence +ffffffff81a1cf70 T intel_fb_xy_to_linear +ffffffff81a1cfc0 T intel_add_fb_offsets +ffffffff81a1d010 T intel_plane_fb_max_stride +ffffffff81a1d090 T intel_set_plane_visible +ffffffff81a1d0e0 T intel_plane_fixup_bitmasks +ffffffff81a1d190 T intel_plane_disable_noatomic +ffffffff81a1d380 T intel_plane_fence_y_offset +ffffffff81a1d3e0 T intel_has_pending_fb_unpin +ffffffff81a1d4d0 T intel_get_crtc_new_encoder +ffffffff81a1d660 T ilk_pfit_disable +ffffffff81a1d720 T intel_phy_is_combo +ffffffff81a1d790 T intel_phy_is_tc +ffffffff81a1d800 T intel_phy_is_snps +ffffffff81a1d850 T intel_port_to_phy +ffffffff81a1d900 T intel_port_to_tc +ffffffff81a1da10 T intel_aux_power_domain +ffffffff81a1da50 T intel_modeset_get_crtc_power_domains +ffffffff81a1dc80 T intel_modeset_put_crtc_power_domains +ffffffff81a1dcb0 T intel_encoder_destroy +ffffffff81a1dce0 T intel_encoder_get_config +ffffffff81a1dd10 t intel_crtc_readout_derived_state +ffffffff81a1e150 T intel_link_compute_m_n +ffffffff81a1e280 T intel_panel_sanitize_ssc +ffffffff81a1e360 T intel_zero_m_n +ffffffff81a1e3a0 T intel_set_m_n +ffffffff81a1e460 T intel_cpu_transcoder_has_m2_n2 +ffffffff81a1e4c0 T intel_cpu_transcoder_set_m1_n1 +ffffffff81a1e670 T intel_cpu_transcoder_set_m2_n2 +ffffffff81a1e7d0 T i9xx_set_pipeconf +ffffffff81a1e980 T ilk_set_pipeconf +ffffffff81a1eb50 T bdw_get_pipe_misc_bpp +ffffffff81a1ec20 T ilk_get_lanes_required +ffffffff81a1ec80 T intel_get_m_n +ffffffff81a1ed90 T intel_cpu_transcoder_get_m1_n1 +ffffffff81a1ef20 T intel_cpu_transcoder_get_m2_n2 +ffffffff81a1f080 T intel_crtc_get_pipe_config +ffffffff81a1f0f0 T i9xx_crtc_clock_get +ffffffff81a1f380 T intel_dotclock_calculate +ffffffff81a1f3e0 T intel_crtc_dotclock +ffffffff81a1f4b0 T intel_encoder_current_mode +ffffffff81a1f660 T intel_fuzzy_clock_check +ffffffff81a1f6b0 T intel_pipe_config_compare +ffffffff81a22a00 t pipe_config_mismatch +ffffffff81a22af0 t pipe_config_infoframe_mismatch +ffffffff81a22c90 T intel_modeset_all_pipes +ffffffff81a22ea0 T intel_atomic_add_affected_planes +ffffffff81a22f70 T intel_calc_active_pipes +ffffffff81a23000 T intel_atomic_check +ffffffff81a25010 t copy_bigjoiner_crtc_state_nomodeset +ffffffff81a25120 t intel_atomic_check_planes +ffffffff81a25b90 t intel_modeset_checks +ffffffff81a25d20 t intel_atomic_check_crtcs +ffffffff81a26140 t intel_async_flip_check_hw +ffffffff81a26620 T intel_crtc_arm_fifo_underrun +ffffffff81a266c0 T intel_atomic_helper_free_state_worker +ffffffff81a26740 T intel_atomic_commit +ffffffff81a26aa0 t intel_atomic_commit_ready +ffffffff81a26b30 t intel_atomic_commit_work +ffffffff81a26b50 t intel_atomic_commit_tail +ffffffff81a27cd0 T intel_plane_destroy +ffffffff81a27d00 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81a27d70 T assert_port_valid +ffffffff81a27df0 T intel_setup_outputs +ffffffff81a28680 T intel_mode_valid +ffffffff81a28800 T intel_cpu_transcoder_mode_valid +ffffffff81a288c0 T intel_mode_valid_max_plane_size +ffffffff81a28940 T intel_init_display_hooks +ffffffff81a289c0 T intel_initial_commit +ffffffff81a28b60 T i830_enable_pipe +ffffffff81a291a0 T i830_disable_pipe +ffffffff81a294d0 T intel_hpd_poll_fini +ffffffff81a295d0 T intel_scanout_needs_vtd_wa +ffffffff81a29610 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81a29770 t intel_atomic_cleanup_work +ffffffff81a29870 t intel_pre_plane_update +ffffffff81a29dd0 t hsw_get_pipe_config +ffffffff81a2aa00 t hsw_crtc_enable +ffffffff81a2b460 t hsw_crtc_disable +ffffffff81a2b760 t skl_commit_modeset_enables +ffffffff81a2bd30 t intel_get_transcoder_timings +ffffffff81a2c040 t intel_get_pipe_src_size +ffffffff81a2c160 t ilk_get_pfit_config +ffffffff81a2c2e0 t enabled_bigjoiner_pipes +ffffffff81a2c500 t bdw_set_pipe_misc +ffffffff81a2c650 t ilk_pfit_enable +ffffffff81a2c780 t intel_set_transcoder_timings +ffffffff81a2cb40 t intel_update_crtc +ffffffff81a2d1a0 t intel_commit_modeset_enables +ffffffff81a2d2c0 t ilk_get_pipe_config +ffffffff81a2d510 t ilk_crtc_enable +ffffffff81a2d8b0 t ilk_crtc_disable +ffffffff81a2db40 t i9xx_get_pipe_config +ffffffff81a2e2c0 t valleyview_crtc_enable +ffffffff81a2e720 t i9xx_crtc_disable +ffffffff81a2eac0 t i9xx_pfit_enable +ffffffff81a2ec30 t i9xx_crtc_enable +ffffffff81a2f000 T intel_display_device_probe +ffffffff81a2f0f0 T intel_display_device_info_runtime_init +ffffffff81a2f750 T intel_display_device_info_print +ffffffff81a30000 T intel_display_driver_probe_defer +ffffffff81a30030 T intel_display_driver_init_hw +ffffffff81a300f0 T intel_display_driver_early_probe +ffffffff81a30170 T intel_display_driver_probe_noirq +ffffffff81a30450 T intel_display_driver_probe_nogem +ffffffff81a30760 T intel_display_driver_probe +ffffffff81a30800 T intel_display_driver_register +ffffffff81a30860 T intel_display_driver_remove +ffffffff81a30910 T intel_display_driver_remove_noirq +ffffffff81a309c0 T intel_display_driver_remove_nogem +ffffffff81a30a00 T intel_display_driver_unregister +ffffffff81a30a80 T intel_display_driver_suspend +ffffffff81a30b30 T __intel_display_driver_resume +ffffffff81a30c40 T intel_display_driver_resume +ffffffff81a31000 T ilk_update_display_irq +ffffffff81a31140 T ilk_enable_display_irq +ffffffff81a31160 T ilk_disable_display_irq +ffffffff81a31240 T bdw_update_port_irq +ffffffff81a31390 T bdw_enable_pipe_irq +ffffffff81a313b0 t bdw_update_pipe_irq +ffffffff81a31510 T bdw_disable_pipe_irq +ffffffff81a31620 T ibx_display_interrupt_update +ffffffff81a31740 T ibx_enable_display_interrupt +ffffffff81a31760 T ibx_disable_display_interrupt +ffffffff81a31820 T i915_pipestat_enable_mask +ffffffff81a319b0 T i915_enable_pipestat +ffffffff81a31b30 T i915_disable_pipestat +ffffffff81a31ca0 T i915_enable_asle_pipestat +ffffffff81a31d50 T i9xx_pipestat_irq_reset +ffffffff81a31ee0 T i9xx_pipestat_irq_ack +ffffffff81a32060 T i8xx_pipestat_irq_handler +ffffffff81a32250 t i9xx_pipe_crc_irq_handler +ffffffff81a32390 T i915_pipestat_irq_handler +ffffffff81a325c0 T i965_pipestat_irq_handler +ffffffff81a32800 T valleyview_pipestat_irq_handler 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gen8_irq_power_well_pre_disable +ffffffff81a35600 T valleyview_enable_display_irqs +ffffffff81a35720 T valleyview_disable_display_irqs +ffffffff81a35830 T ilk_de_irq_postinstall +ffffffff81a35940 T gen8_de_irq_postinstall +ffffffff81a35db0 T gen11_de_irq_postinstall +ffffffff81a35e20 T dg1_de_irq_postinstall +ffffffff81a35e90 T intel_display_irq_init +ffffffff81a36000 T intel_display_power_domain_str +ffffffff81a36060 T __intel_display_power_is_enabled +ffffffff81a36120 T intel_display_power_is_enabled +ffffffff81a36240 T intel_display_power_set_target_dc_state +ffffffff81a36360 T intel_display_power_get +ffffffff81a363e0 t __intel_display_power_get_domain +ffffffff81a365d0 T intel_display_power_get_if_enabled +ffffffff81a36700 T __intel_display_power_put_async +ffffffff81a368f0 t __intel_display_power_put_domain +ffffffff81a36a60 T intel_display_power_flush_work +ffffffff81a36b80 t release_async_put_domains +ffffffff81a36c70 T intel_display_power_put_unchecked +ffffffff81a36cd0 T intel_display_power_get_in_set +ffffffff81a36db0 T intel_display_power_get_in_set_if_enabled +ffffffff81a36e60 T intel_display_power_put_mask_in_set +ffffffff81a36f30 T intel_power_domains_init +ffffffff81a37180 t intel_display_power_put_async_work +ffffffff81a373f0 T intel_power_domains_cleanup +ffffffff81a37410 T gen9_dbuf_slices_update +ffffffff81a37620 T intel_power_domains_init_hw +ffffffff81a37b20 t icl_display_core_init +ffffffff81a38320 t bxt_display_core_init +ffffffff81a38470 t vlv_cmnlane_wa +ffffffff81a38540 t assert_ved_power_gated +ffffffff81a385f0 t hsw_assert_cdclk +ffffffff81a38700 t intel_pch_reset_handshake +ffffffff81a387b0 T intel_power_domains_driver_remove +ffffffff81a388a0 T intel_power_domains_sanitize_state +ffffffff81a38990 T intel_power_domains_enable +ffffffff81a389f0 T intel_power_domains_disable +ffffffff81a38aa0 T intel_power_domains_suspend +ffffffff81a38c50 t icl_display_core_uninit +ffffffff81a38d60 t bxt_display_core_uninit +ffffffff81a38e20 T intel_power_domains_resume +ffffffff81a38ef0 T intel_display_power_suspend_late +ffffffff81a38fd0 t hsw_enable_pc8 +ffffffff81a39c80 T intel_display_power_resume_early +ffffffff81a39d70 t hsw_disable_pc8 +ffffffff81a3a190 T intel_display_power_suspend +ffffffff81a3a210 T intel_display_power_resume +ffffffff81a3a2f0 T intel_display_power_debug +ffffffff81a3a3b0 T intel_display_power_ddi_io_domain +ffffffff81a3a4a0 T intel_display_power_ddi_lanes_domain +ffffffff81a3a590 T intel_display_power_aux_io_domain +ffffffff81a3a6a0 T intel_display_power_legacy_aux_domain +ffffffff81a3a7b0 T intel_display_power_tbt_aux_domain +ffffffff81a3a8c0 t __delayed_work_tick +ffffffff81a3b000 T intel_display_power_map_init +ffffffff81a3b180 t __set_power_wells +ffffffff81a3b560 T intel_display_power_map_cleanup +ffffffff81a3c000 T lookup_power_well +ffffffff81a3c0c0 T intel_power_well_enable +ffffffff81a3c150 T intel_power_well_name +ffffffff81a3c190 T intel_power_well_disable +ffffffff81a3c200 T intel_power_well_sync_hw +ffffffff81a3c270 T intel_power_well_get +ffffffff81a3c310 T intel_power_well_put +ffffffff81a3c410 T intel_power_well_is_enabled +ffffffff81a3c430 T intel_power_well_is_enabled_cached +ffffffff81a3c460 T intel_display_power_well_is_enabled +ffffffff81a3c510 T intel_power_well_is_always_on +ffffffff81a3c550 T intel_power_well_domains +ffffffff81a3c580 T intel_power_well_refcount +ffffffff81a3c5b0 T gen9_sanitize_dc_state +ffffffff81a3c680 T gen9_set_dc_state +ffffffff81a3c9e0 T gen9_enable_dc5 +ffffffff81a3cc40 T skl_enable_dc6 +ffffffff81a3cda0 T bxt_enable_dc9 +ffffffff81a3cf50 T bxt_disable_dc9 +ffffffff81a3d040 T gen9_disable_dc_states +ffffffff81a3d410 T chv_phy_powergate_ch +ffffffff81a3d520 t assert_chv_phy_status +ffffffff81a3d8d0 T chv_phy_powergate_lanes +ffffffff81a3db30 t i9xx_power_well_sync_hw_noop +ffffffff81a3db60 t i9xx_always_on_power_well_noop +ffffffff81a3db90 t i9xx_always_on_power_well_enabled +ffffffff81a3dbc0 t chv_pipe_power_well_sync_hw +ffffffff81a3dbf0 t chv_pipe_power_well_enable +ffffffff81a3dc20 t chv_pipe_power_well_disable +ffffffff81a3dc80 t chv_pipe_power_well_enabled +ffffffff81a3dd80 t chv_dpio_cmn_power_well_enable +ffffffff81a3df90 t chv_dpio_cmn_power_well_disable +ffffffff81a3e0c0 t vlv_power_well_enabled +ffffffff81a3e1e0 t i830_pipes_power_well_sync_hw +ffffffff81a3e2d0 t i830_pipes_power_well_enable +ffffffff81a3e390 t i830_pipes_power_well_disable +ffffffff81a3e3c0 t i830_pipes_power_well_enabled +ffffffff81a3e460 t hsw_power_well_sync_hw +ffffffff81a3e550 t hsw_power_well_enable +ffffffff81a3e7d0 t hsw_power_well_disable +ffffffff81a3e890 t hsw_power_well_enabled +ffffffff81a3e970 t gen9_dc_off_power_well_enable +ffffffff81a3e980 t gen9_dc_off_power_well_disable +ffffffff81a3ea20 t gen9_dc_off_power_well_enabled +ffffffff81a3eab0 t bxt_dpio_cmn_power_well_enable +ffffffff81a3eae0 t bxt_dpio_cmn_power_well_disable +ffffffff81a3eb10 t bxt_dpio_cmn_power_well_enabled +ffffffff81a3eb40 t vlv_display_power_well_enable +ffffffff81a3eb70 t vlv_display_power_well_disable +ffffffff81a3ebe0 t vlv_dpio_cmn_power_well_enable +ffffffff81a3ec60 t vlv_dpio_cmn_power_well_disable +ffffffff81a3ed60 t vlv_power_well_enable +ffffffff81a3ed80 t vlv_power_well_disable +ffffffff81a3eda0 t icl_aux_power_well_enable +ffffffff81a3f430 t icl_aux_power_well_disable +ffffffff81a3f6c0 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81a3f6e0 t tgl_tc_cold_off_power_well_enable +ffffffff81a3f700 t tgl_tc_cold_off_power_well_disable +ffffffff81a3f720 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81a3f750 t xelpdp_aux_power_well_enable +ffffffff81a3f820 t xelpdp_aux_power_well_disable +ffffffff81a3f8f0 t xelpdp_aux_power_well_enabled +ffffffff81a3f9a0 t chv_set_pipe_power_well +ffffffff81a3fba0 t vlv_display_power_well_init +ffffffff81a3ff00 t vlv_set_power_well +ffffffff81a40120 t hsw_wait_for_power_well_enable +ffffffff81a40270 t hsw_wait_for_power_well_disable +ffffffff81a40540 t tgl_tc_cold_request +ffffffff81a41000 T intel_display_reset_prepare +ffffffff81a411e0 T intel_display_reset_finish +ffffffff81a42000 T intel_display_rps_boost_after_vblank +ffffffff81a42110 t do_rps_boost +ffffffff81a421c0 T intel_display_rps_mark_interactive +ffffffff81a43000 T intel_dkl_phy_init +ffffffff81a43020 T intel_dkl_phy_read +ffffffff81a43150 T intel_dkl_phy_write +ffffffff81a43260 T intel_dkl_phy_rmw +ffffffff81a43390 T intel_dkl_phy_posting_read +ffffffff81a44000 T intel_dmc_has_payload +ffffffff81a44050 T intel_dmc_enable_pipe +ffffffff81a44160 T intel_dmc_disable_pipe +ffffffff81a44270 T intel_dmc_load_program +ffffffff81a44aa0 t pipedmc_clock_gating_wa +ffffffff81a44c90 T intel_dmc_disable_program +ffffffff81a44ec0 T assert_dmc_loaded +ffffffff81a45040 T intel_dmc_init +ffffffff81a45300 t dmc_load_work_fn +ffffffff81a45c10 T intel_dmc_suspend +ffffffff81a45ca0 T intel_dmc_resume +ffffffff81a45d40 T intel_dmc_fini +ffffffff81a45e90 T intel_dmc_print_error_state +ffffffff81a45f90 T intel_dmc_debugfs_register +ffffffff81a46000 T intel_dp_is_edp +ffffffff81a46030 T intel_dp_is_uhbr +ffffffff81a46070 T intel_dp_max_lane_count +ffffffff81a460e0 T intel_dp_link_required +ffffffff81a46120 T intel_dp_max_data_rate +ffffffff81a46180 T intel_dp_can_bigjoiner +ffffffff81a461d0 T intel_dp_get_link_train_fallback_values +ffffffff81a46580 T intel_dp_mode_to_fec_clock +ffffffff81a465d0 T intel_dp_dsc_nearest_valid_bpp +ffffffff81a466d0 T intel_dp_dsc_get_output_bpp +ffffffff81a467f0 T intel_dp_dsc_get_slice_count +ffffffff81a46980 T intel_dp_min_bpp +ffffffff81a469c0 T intel_dp_need_bigjoiner +ffffffff81a46a20 T intel_dp_source_supports_tps3 +ffffffff81a46a70 T intel_dp_source_supports_tps4 +ffffffff81a46ab0 T intel_dp_max_link_rate +ffffffff81a46b60 T intel_dp_rate_select +ffffffff81a46c00 T intel_dp_compute_rate +ffffffff81a46cd0 T intel_dp_has_hdmi_sink +ffffffff81a46d10 T intel_dp_adjust_compliance_config +ffffffff81a46e50 T intel_dp_dsc_compute_bpp +ffffffff81a46f00 T intel_dp_dsc_compute_config +ffffffff81a475d0 T intel_dp_limited_color_range +ffffffff81a47640 T intel_dp_compute_psr_vsc_sdp +ffffffff81a476c0 T intel_dp_needs_vsc_sdp +ffffffff81a47710 t intel_dp_compute_vsc_colorimetry +ffffffff81a47890 T intel_dp_compute_config +ffffffff81a47ce0 t intel_dp_compute_output_format +ffffffff81a47f10 t intel_dp_audio_compute_config +ffffffff81a47ff0 t intel_dp_drrs_compute_config +ffffffff81a48190 t intel_dp_compute_vsc_sdp +ffffffff81a48230 t intel_dp_compute_hdr_metadata_infoframe_sdp +ffffffff81a482c0 T intel_dp_set_link_params +ffffffff81a48300 T intel_edp_backlight_on +ffffffff81a483a0 T intel_edp_backlight_off +ffffffff81a48430 T intel_dp_sink_set_decompression_state +ffffffff81a484d0 T intel_dp_wait_source_oui +ffffffff81a485c0 T intel_dp_set_power +ffffffff81a487e0 T intel_dp_sync_state +ffffffff81a48860 t intel_dp_get_dpcd +ffffffff81a489c0 t intel_dp_reset_max_link_params +ffffffff81a48ac0 T intel_dp_initial_fastset_check +ffffffff81a48bf0 T intel_dp_check_frl_training +ffffffff81a491a0 T intel_dp_pcon_dsc_configure +ffffffff81a49390 T intel_dp_configure_protocol_converter +ffffffff81a49570 T intel_dp_get_colorimetry_status +ffffffff81a495d0 T intel_edp_fixup_vbt_bpp +ffffffff81a49660 T intel_write_dp_vsc_sdp +ffffffff81a49800 T intel_dp_set_infoframes +ffffffff81a49920 t intel_write_dp_sdp +ffffffff81a49c00 T intel_read_dp_sdp +ffffffff81a49f20 T intel_dp_get_active_pipes +ffffffff81a4a140 T intel_dp_retrain_link +ffffffff81a4a3f0 t intel_dp_needs_link_retrain +ffffffff81a4a570 T intel_dp_phy_test +ffffffff81a4ac20 T intel_digital_port_connected +ffffffff81a4acd0 T intel_dp_encoder_flush_work +ffffffff81a4ad30 T intel_dp_encoder_suspend +ffffffff81a4ad70 T intel_dp_encoder_shutdown +ffffffff81a4adb0 T intel_dp_hpd_pulse +ffffffff81a4b420 T intel_dp_is_port_edp +ffffffff81a4b4b0 T intel_dp_init_connector +ffffffff81a4c610 t intel_dp_modeset_retry_work_fn +ffffffff81a4c6b0 t intel_dp_set_common_rates +ffffffff81a4c830 T intel_dp_mst_suspend +ffffffff81a4c8d0 T intel_dp_mst_resume +ffffffff81a4c980 t intel_dp_output_format +ffffffff81a4cac0 t intel_dp_compute_link_config +ffffffff81a4d280 t intel_dp_tmds_clock_valid +ffffffff81a4d320 t intel_dp_set_sink_rates +ffffffff81a4d550 t intel_dp_check_device_service_irq +ffffffff81a4db20 t intel_dp_force +ffffffff81a4dc50 t intel_dp_connector_register +ffffffff81a4dd20 t intel_dp_connector_unregister +ffffffff81a4dd80 t intel_dp_oob_hotplug_event +ffffffff81a4de00 t intel_dp_set_edid +ffffffff81a4e200 t intel_dp_get_modes +ffffffff81a4e2f0 t intel_dp_detect +ffffffff81a4ebb0 t intel_dp_mode_valid +ffffffff81a4ef30 t intel_dp_connector_atomic_check +ffffffff81a4f2a0 t intel_dp_get_dsc_sink_cap +ffffffff81a4f410 t intel_dp_mode_min_output_bpp +ffffffff81a4f470 t intel_dp_mode_valid_downstream +ffffffff81a4f630 t icl_max_source_rate +ffffffff81a50000 T intel_dp_aux_pack +ffffffff81a50070 T intel_dp_aux_fini +ffffffff81a50090 T intel_dp_aux_init +ffffffff81a502a0 t xelpdp_aux_ctl_reg +ffffffff81a50370 t xelpdp_aux_data_reg +ffffffff81a50440 t tgl_aux_ctl_reg +ffffffff81a504c0 t tgl_aux_data_reg +ffffffff81a50550 t skl_aux_ctl_reg +ffffffff81a505d0 t skl_aux_data_reg +ffffffff81a50660 t ilk_aux_ctl_reg +ffffffff81a506e0 t ilk_aux_data_reg +ffffffff81a50770 t g4x_aux_ctl_reg +ffffffff81a507f0 t g4x_aux_data_reg +ffffffff81a50890 t skl_get_aux_clock_divider +ffffffff81a508c0 t hsw_get_aux_clock_divider +ffffffff81a50950 t ilk_get_aux_clock_divider +ffffffff81a509b0 t g4x_get_aux_clock_divider +ffffffff81a50a00 t skl_get_aux_send_ctl +ffffffff81a50a80 t g4x_get_aux_send_ctl +ffffffff81a50ae0 t kasprintf +ffffffff81a50bb0 t intel_dp_aux_transfer +ffffffff81a50e40 T intel_dp_aux_ch +ffffffff81a50fa0 T intel_dp_aux_irq_handler +ffffffff81a51040 t intel_dp_aux_xfer +ffffffff81a52000 T intel_dp_aux_init_backlight_funcs +ffffffff81a52260 t intel_dp_aux_hdr_setup_backlight +ffffffff81a523e0 t intel_dp_aux_hdr_get_backlight +ffffffff81a52560 t intel_dp_aux_hdr_set_backlight +ffffffff81a52660 t intel_dp_aux_hdr_disable_backlight +ffffffff81a526e0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a52910 t intel_dp_aux_vesa_setup_backlight +ffffffff81a52b70 t intel_dp_aux_vesa_get_backlight +ffffffff81a52ba0 t intel_dp_aux_vesa_set_backlight +ffffffff81a52c40 t intel_dp_aux_vesa_disable_backlight +ffffffff81a52cf0 t intel_dp_aux_vesa_enable_backlight +ffffffff81a53000 T intel_dp_hdcp_init +ffffffff81a530b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a531a0 t intel_dp_hdcp_read_bksv +ffffffff81a53230 t intel_dp_hdcp_read_bstatus +ffffffff81a532c0 t intel_dp_hdcp_repeater_present +ffffffff81a53370 t intel_dp_hdcp_read_ri_prime +ffffffff81a53400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a534a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a53590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a53630 t intel_dp_hdcp_toggle_signalling +ffffffff81a53660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a53850 t intel_dp_hdcp_check_link +ffffffff81a538e0 t intel_dp_hdcp_capable +ffffffff81a53990 t intel_dp_hdcp2_capable +ffffffff81a53a10 t intel_dp_hdcp2_write_msg +ffffffff81a53bc0 t intel_dp_hdcp2_read_msg +ffffffff81a54290 t intel_dp_hdcp2_config_stream_type +ffffffff81a542f0 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a54550 t intel_dp_mst_hdcp2_check_link +ffffffff81a54610 t intel_dp_hdcp2_check_link +ffffffff81a55000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a550d0 t intel_dp_init_lttpr +ffffffff81a553b0 T intel_dp_get_adjust_train +ffffffff81a55ab0 T intel_dp_program_link_training_pattern +ffffffff81a55bd0 T intel_dp_set_signal_levels +ffffffff81a55f70 T intel_dp_dump_link_status +ffffffff81a56060 T intel_dp_stop_link_train +ffffffff81a56310 T intel_dp_start_link_train +ffffffff81a580a0 T intel_dp_128b132b_sdp_crc16 +ffffffff81a58170 t intel_dp_link_train_phy +ffffffff81a5a000 T intel_dp_mst_encoder_active_links +ffffffff81a5a030 T intel_dp_mst_encoder_init +ffffffff81a5a270 T intel_dp_mst_source_support +ffffffff81a5a2b0 T intel_dp_mst_encoder_cleanup +ffffffff81a5a310 T intel_dp_mst_is_master_trans +ffffffff81a5a350 T intel_dp_mst_is_slave_trans +ffffffff81a5a390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a5a450 t intel_dp_add_mst_connector +ffffffff81a5a680 t intel_dp_mst_poll_hpd_irq +ffffffff81a5a6a0 t intel_dp_mst_get_hw_state +ffffffff81a5a700 t intel_dp_mst_connector_late_register +ffffffff81a5a770 t intel_dp_mst_connector_early_unregister +ffffffff81a5a7a0 t intel_dp_mst_get_modes +ffffffff81a5a840 t intel_dp_mst_detect +ffffffff81a5a940 t intel_dp_mst_mode_valid_ctx +ffffffff81a5ab60 t intel_mst_atomic_best_encoder +ffffffff81a5abc0 t intel_dp_mst_atomic_check +ffffffff81a5ad30 t intel_dp_mst_compute_config +ffffffff81a5b280 t intel_dp_mst_compute_config_late +ffffffff81a5b380 t intel_mst_disable_dp +ffffffff81a5b460 t intel_mst_post_disable_dp +ffffffff81a5b710 t intel_mst_post_pll_disable_dp +ffffffff81a5b770 t intel_mst_pre_pll_enable_dp +ffffffff81a5b7b0 t intel_mst_pre_enable_dp +ffffffff81a5b9d0 t intel_mst_enable_dp +ffffffff81a5bd70 t intel_dp_mst_enc_get_hw_state +ffffffff81a5bdb0 t intel_dp_mst_enc_get_config +ffffffff81a5bdd0 t intel_dp_mst_initial_fastset_check +ffffffff81a5bdf0 t intel_dp_mst_encoder_destroy +ffffffff81a5be20 t intel_dp_mst_find_vcpi_slots_for_bpp +ffffffff81a5d000 T bxt_port_to_phy_channel +ffffffff81a5d110 T bxt_ddi_phy_set_signal_levels +ffffffff81a5d4e0 T bxt_ddi_phy_is_enabled +ffffffff81a5d610 T bxt_ddi_phy_uninit +ffffffff81a5d6f0 T bxt_ddi_phy_init +ffffffff81a5d910 t _bxt_ddi_phy_init +ffffffff81a5de50 T bxt_ddi_phy_verify_state +ffffffff81a5e130 t __phy_reg_verify_state +ffffffff81a5e230 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a5e2a0 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a5e500 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a5e6e0 T vlv_dig_port_to_channel +ffffffff81a5e750 T vlv_dig_port_to_phy +ffffffff81a5e7c0 T vlv_pipe_to_channel +ffffffff81a5e820 T chv_set_phy_signal_level +ffffffff81a5eb70 T chv_data_lane_soft_reset +ffffffff81a5ed40 T chv_phy_pre_pll_enable +ffffffff81a5efe0 T chv_phy_pre_encoder_enable +ffffffff81a5f240 T chv_phy_release_cl2_override +ffffffff81a5f2d0 T chv_phy_post_pll_disable +ffffffff81a5f380 T vlv_set_phy_signal_level +ffffffff81a5f4f0 T vlv_phy_pre_pll_enable +ffffffff81a5f5f0 T vlv_phy_pre_encoder_enable +ffffffff81a5f6f0 T vlv_phy_reset_lanes +ffffffff81a60000 T pnv_calc_dpll_params +ffffffff81a600c0 T i9xx_calc_dpll_params +ffffffff81a60190 T vlv_calc_dpll_params +ffffffff81a60250 T chv_calc_dpll_params +ffffffff81a60320 T bxt_find_best_dpll +ffffffff81a60340 t chv_find_best_dpll +ffffffff81a60680 T i9xx_dpll_compute_fp +ffffffff81a606c0 T vlv_compute_dpll +ffffffff81a60740 T chv_compute_dpll +ffffffff81a607c0 T intel_dpll_crtc_compute_clock +ffffffff81a608c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a60a10 T intel_dpll_init_clock_hook +ffffffff81a60b20 T i9xx_enable_pll +ffffffff81a60ef0 T vlv_enable_pll +ffffffff81a61410 T chv_enable_pll +ffffffff81a619e0 T vlv_force_pll_on +ffffffff81a61b30 T vlv_disable_pll +ffffffff81a61c00 T chv_disable_pll +ffffffff81a61d30 T i9xx_disable_pll +ffffffff81a61e50 T vlv_force_pll_off +ffffffff81a61f50 T assert_pll_enabled +ffffffff81a62050 T assert_pll_disabled +ffffffff81a62150 t intel_pll_is_valid +ffffffff81a62210 t mtl_crtc_compute_clock +ffffffff81a622d0 t dg2_crtc_compute_clock +ffffffff81a62350 t hsw_crtc_compute_clock +ffffffff81a62410 t hsw_crtc_get_shared_dpll +ffffffff81a624b0 t ilk_crtc_compute_clock +ffffffff81a627b0 t ilk_crtc_get_shared_dpll +ffffffff81a62800 t g4x_find_best_dpll +ffffffff81a62b40 t chv_crtc_compute_clock +ffffffff81a62c50 t vlv_crtc_compute_clock +ffffffff81a630f0 t g4x_crtc_compute_clock +ffffffff81a63250 t i9xx_compute_dpll +ffffffff81a634d0 t pnv_crtc_compute_clock +ffffffff81a638b0 t i9xx_crtc_compute_clock +ffffffff81a639d0 t i9xx_find_best_dpll +ffffffff81a63d10 t i8xx_crtc_compute_clock +ffffffff81a64000 T intel_get_shared_dpll_by_id +ffffffff81a64040 T assert_shared_dpll +ffffffff81a641f0 T intel_dpll_get_hw_state +ffffffff81a64220 T icl_tc_port_to_pll_id +ffffffff81a64250 T intel_enable_shared_dpll +ffffffff81a645b0 T intel_disable_shared_dpll +ffffffff81a64840 T intel_unreference_shared_dpll_crtc +ffffffff81a64940 T intel_shared_dpll_swap_state +ffffffff81a64a20 T icl_set_active_port_dpll +ffffffff81a64a60 T intel_shared_dpll_init +ffffffff81a64c60 T intel_compute_shared_dplls +ffffffff81a64cf0 T intel_reserve_shared_dplls +ffffffff81a64d80 T intel_release_shared_dplls +ffffffff81a64dc0 T intel_update_active_dpll +ffffffff81a64e20 T intel_dpll_get_freq +ffffffff81a64eb0 T intel_dpll_update_ref_clks +ffffffff81a64f00 T intel_dpll_readout_hw_state +ffffffff81a65130 T intel_dpll_sanitize_state +ffffffff81a65210 T intel_dpll_dump_hw_state +ffffffff81a65290 T intel_shared_dpll_state_verify +ffffffff81a65470 t verify_single_dpll_state +ffffffff81a659e0 T intel_shared_dpll_verify_disabled +ffffffff81a65a60 t icl_compute_dplls +ffffffff81a666a0 t icl_get_dplls +ffffffff81a66970 t icl_put_dplls +ffffffff81a66a30 t icl_update_active_dpll +ffffffff81a66ae0 t icl_update_dpll_ref_clks +ffffffff81a66b20 t icl_dump_hw_state +ffffffff81a66be0 t combo_pll_enable +ffffffff81a66df0 t combo_pll_disable +ffffffff81a66ec0 t combo_pll_get_hw_state +ffffffff81a66f40 t icl_ddi_combo_pll_get_freq +ffffffff81a67110 t icl_dpll_write +ffffffff81a67350 t adlp_cmtg_clock_gating_wa +ffffffff81a674b0 t icl_pll_disable +ffffffff81a67650 t icl_pll_get_hw_state +ffffffff81a67930 t tbt_pll_enable +ffffffff81a67ae0 t tbt_pll_disable +ffffffff81a67b00 t tbt_pll_get_hw_state +ffffffff81a67b20 t icl_ddi_tbt_pll_get_freq +ffffffff81a67b90 t mg_pll_enable +ffffffff81a681a0 t mg_pll_disable +ffffffff81a681e0 t dkl_pll_get_hw_state +ffffffff81a683f0 t icl_ddi_mg_pll_get_freq +ffffffff81a684d0 t icl_calc_dpll_state +ffffffff81a68610 t intel_find_shared_dpll +ffffffff81a68930 t intel_reference_shared_dpll +ffffffff81a68b50 t intel_unreference_shared_dpll +ffffffff81a68d50 t mg_pll_get_hw_state +ffffffff81a68fa0 t bxt_compute_dpll +ffffffff81a692a0 t bxt_get_dpll +ffffffff81a69370 t intel_put_dpll +ffffffff81a693d0 t bxt_update_dpll_ref_clks +ffffffff81a69410 t bxt_dump_hw_state +ffffffff81a694c0 t bxt_ddi_pll_enable +ffffffff81a69e90 t bxt_ddi_pll_disable +ffffffff81a6a0a0 t bxt_ddi_pll_get_hw_state +ffffffff81a6a4d0 t bxt_ddi_pll_get_freq +ffffffff81a6a560 t bxt_ddi_set_dpll_hw_state +ffffffff81a6a750 t skl_compute_dpll +ffffffff81a6aeb0 t skl_get_dpll +ffffffff81a6af60 t skl_update_dpll_ref_clks +ffffffff81a6afa0 t skl_dump_hw_state +ffffffff81a6b000 t skl_ddi_dpll0_enable +ffffffff81a6b0c0 t skl_ddi_dpll0_disable +ffffffff81a6b0f0 t skl_ddi_dpll0_get_hw_state +ffffffff81a6b1f0 t skl_ddi_pll_get_freq +ffffffff81a6b280 t skl_ddi_wrpll_get_freq +ffffffff81a6b3e0 t skl_ddi_pll_enable +ffffffff81a6b600 t skl_ddi_pll_disable +ffffffff81a6b690 t skl_ddi_pll_get_hw_state +ffffffff81a6b7b0 t hsw_compute_dpll +ffffffff81a6bfd0 t hsw_get_dpll +ffffffff81a6c120 t hsw_update_dpll_ref_clks +ffffffff81a6c190 t hsw_dump_hw_state +ffffffff81a6c1c0 t hsw_ddi_wrpll_enable +ffffffff81a6c240 t hsw_ddi_wrpll_disable +ffffffff81a6c320 t hsw_ddi_wrpll_get_hw_state +ffffffff81a6c3c0 t hsw_ddi_wrpll_get_freq +ffffffff81a6c4b0 t hsw_ddi_spll_enable +ffffffff81a6c510 t hsw_ddi_spll_disable +ffffffff81a6c5e0 t hsw_ddi_spll_get_hw_state +ffffffff81a6c670 t hsw_ddi_spll_get_freq +ffffffff81a6c710 t hsw_ddi_lcpll_enable +ffffffff81a6c740 t hsw_ddi_lcpll_disable +ffffffff81a6c770 t hsw_ddi_lcpll_get_hw_state +ffffffff81a6c7a0 t hsw_ddi_lcpll_get_freq +ffffffff81a6c820 t ibx_compute_dpll +ffffffff81a6c850 t ibx_get_dpll +ffffffff81a6c950 t ibx_dump_hw_state +ffffffff81a6c9b0 t ibx_pch_dpll_enable +ffffffff81a6cb50 t ibx_pch_dpll_disable +ffffffff81a6cbd0 t ibx_pch_dpll_get_hw_state +ffffffff81a6d000 T intel_dpt_pin +ffffffff81a6d1e0 T intel_dpt_unpin +ffffffff81a6d250 T intel_dpt_resume +ffffffff81a6d320 T intel_dpt_suspend +ffffffff81a6d3f0 T intel_dpt_create +ffffffff81a6d7e0 t dpt_insert_page +ffffffff81a6d850 t dpt_clear_range +ffffffff81a6d880 t dpt_insert_entries +ffffffff81a6d970 t dpt_cleanup +ffffffff81a6d9c0 t dpt_bind_vma +ffffffff81a6da50 t dpt_unbind_vma +ffffffff81a6da80 T intel_dpt_destroy +ffffffff81a6dad0 T intel_dpt_configure +ffffffff81a6dc70 t __ww_mutex_lock +ffffffff81a6e000 T intel_drrs_type_str +ffffffff81a6e040 T intel_drrs_is_active +ffffffff81a6e070 T intel_drrs_activate +ffffffff81a6e260 T intel_drrs_deactivate +ffffffff81a6e420 T intel_drrs_invalidate +ffffffff81a6e440 t intel_drrs_frontbuffer_update +ffffffff81a6e690 T intel_drrs_flush +ffffffff81a6e6b0 T intel_drrs_crtc_init +ffffffff81a6e750 t intel_drrs_downclock_work +ffffffff81a6e870 T intel_drrs_crtc_debugfs_add +ffffffff81a6e8a0 T intel_drrs_connector_debugfs_add +ffffffff81a6e8b0 t __delayed_work_tick +ffffffff81a6f000 T intel_dsb_reg_write +ffffffff81a6f140 T intel_dsb_finish +ffffffff81a6f1c0 T intel_dsb_commit +ffffffff81a6f370 T intel_dsb_wait +ffffffff81a6f560 T intel_dsb_prepare +ffffffff81a6f6e0 T intel_dsb_cleanup +ffffffff81a70000 T intel_dsi_wait_panel_power_cycle +ffffffff81a700f0 T intel_dsi_shutdown +ffffffff81a701e0 T intel_dsi_bitrate +ffffffff81a70270 T intel_dsi_tlpx_ns +ffffffff81a702c0 T intel_dsi_get_modes +ffffffff81a702d0 T intel_dsi_mode_valid +ffffffff81a70390 T intel_dsi_host_init +ffffffff81a70440 T intel_dsi_get_panel_orientation +ffffffff81a71000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a710a0 t dcs_setup_backlight +ffffffff81a71120 t dcs_get_backlight +ffffffff81a71210 t dcs_set_backlight +ffffffff81a71300 t dcs_disable_backlight +ffffffff81a71660 t dcs_enable_backlight +ffffffff81a72000 T intel_dsi_vbt_exec_sequence +ffffffff81a72020 T intel_dsi_log_params +ffffffff81a723a0 T intel_dsi_vbt_init +ffffffff81a72840 T intel_dsi_vbt_gpio_init +ffffffff81a72860 T intel_dsi_vbt_gpio_cleanup +ffffffff81a73000 T intel_dvo_init +ffffffff81a73650 t intel_disable_dvo +ffffffff81a736f0 t intel_enable_dvo +ffffffff81a737c0 t intel_dvo_get_hw_state +ffffffff81a73830 t intel_dvo_get_config +ffffffff81a738d0 t intel_dvo_compute_config +ffffffff81a73960 t intel_dvo_pre_enable +ffffffff81a73a60 t intel_dvo_connector_get_hw_state +ffffffff81a73af0 t intel_dvo_enc_destroy +ffffffff81a73b30 t intel_dvo_detect +ffffffff81a73c30 t intel_dvo_get_modes +ffffffff81a73ca0 t intel_dvo_mode_valid +ffffffff81a74000 T intel_fb_get_format_info +ffffffff81a742b0 T intel_fb_is_tiled_modifier +ffffffff81a742f0 t lookup_modifier +ffffffff81a74530 T intel_fb_is_ccs_modifier +ffffffff81a74570 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a745b0 T intel_fb_is_mc_ccs_modifier +ffffffff81a745f0 T intel_fb_plane_get_modifiers +ffffffff81a747d0 T intel_fb_plane_supports_modifier +ffffffff81a74850 T intel_format_info_is_yuv_semiplanar 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T intel_fill_fb_info +ffffffff81a76a10 t calc_plane_remap_info +ffffffff81a773c0 T intel_fb_fill_view +ffffffff81a77430 T intel_plane_compute_gtt +ffffffff81a77910 t intel_plane_check_stride +ffffffff81a77a70 T intel_framebuffer_init +ffffffff81a782d0 t gen12_ccs_aux_stride +ffffffff81a78330 T intel_user_framebuffer_create +ffffffff81a78490 T intel_framebuffer_create +ffffffff81a78520 t intel_adjust_tile_offset +ffffffff81a78660 t intel_user_framebuffer_destroy +ffffffff81a786d0 t intel_user_framebuffer_create_handle +ffffffff81a78700 t intel_user_framebuffer_dirty +ffffffff81a79000 T intel_pin_and_fence_fb_obj +ffffffff81a79330 t i915_gem_object_lock +ffffffff81a79540 T intel_unpin_fb_vma +ffffffff81a795b0 T intel_plane_pin_fb +ffffffff81a798e0 T intel_plane_unpin_fb +ffffffff81a7a000 T intel_fbc_cleanup +ffffffff81a7a1c0 T intel_fbc_pre_update +ffffffff81a7a850 T intel_fbc_post_update +ffffffff81a7aa00 T intel_fbc_invalidate +ffffffff81a7ab80 T intel_fbc_flush +ffffffff81a7ae20 T intel_fbc_atomic_check +ffffffff81a7b3e0 T intel_fbc_disable +ffffffff81a7b4a0 t __intel_fbc_disable +ffffffff81a7b5e0 T intel_fbc_update +ffffffff81a7bca0 T intel_fbc_reset_underrun +ffffffff81a7be00 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a7bec0 T intel_fbc_add_plane +ffffffff81a7bef0 T intel_fbc_init +ffffffff81a7c170 T intel_fbc_sanitize +ffffffff81a7c240 T intel_fbc_crtc_debugfs_add +ffffffff81a7c270 T intel_fbc_debugfs_register +ffffffff81a7c2a0 t intel_fbc_is_ok +ffffffff81a7c410 t intel_fbc_update_state +ffffffff81a7c790 t intel_fbc_underrun_work_fn +ffffffff81a7c860 t ivb_fbc_activate +ffffffff81a7cab0 t ilk_fbc_deactivate +ffffffff81a7cb60 t ilk_fbc_is_active +ffffffff81a7cbc0 t ivb_fbc_is_compressing +ffffffff81a7cc30 t snb_fbc_nuke +ffffffff81a7ccb0 t ilk_fbc_program_cfb +ffffffff81a7cd10 t ivb_fbc_set_false_color +ffffffff81a7cd90 t snb_fbc_activate +ffffffff81a7ce20 t ilk_fbc_is_compressing +ffffffff81a7ce90 t ilk_fbc_activate +ffffffff81a7cfc0 t i965_fbc_nuke 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intel_set_pch_fifo_underrun_reporting +ffffffff81a835f0 T intel_cpu_fifo_underrun_irq_handler +ffffffff81a837e0 T intel_pch_fifo_underrun_irq_handler +ffffffff81a83860 T intel_check_cpu_fifo_underruns +ffffffff81a83a70 T intel_check_pch_fifo_underruns +ffffffff81a83ba0 T intel_init_fifo_underrun_reporting +ffffffff81a84000 T intel_frontbuffer_flip_prepare +ffffffff81a84050 T intel_frontbuffer_flip_complete +ffffffff81a84130 T intel_frontbuffer_flip +ffffffff81a84200 T __intel_fb_invalidate +ffffffff81a84290 T __intel_fb_flush +ffffffff81a84380 T intel_frontbuffer_get +ffffffff81a844c0 t frontbuffer_active +ffffffff81a844f0 t frontbuffer_retire +ffffffff81a84530 T intel_frontbuffer_put +ffffffff81a84660 T intel_frontbuffer_track +ffffffff81a85000 T intel_atomic_global_obj_init +ffffffff81a85070 T intel_atomic_global_obj_cleanup +ffffffff81a85160 T intel_atomic_get_global_obj_state +ffffffff81a853b0 T intel_atomic_get_old_global_obj_state +ffffffff81a85410 T intel_atomic_get_new_global_obj_state +ffffffff81a85470 T intel_atomic_swap_global_state +ffffffff81a855b0 T intel_atomic_clear_global_state +ffffffff81a856d0 T intel_atomic_lock_global_state +ffffffff81a85760 T intel_atomic_serialize_global_state +ffffffff81a857f0 T intel_atomic_global_state_is_serialized +ffffffff81a86000 T intel_gmbus_is_valid_pin +ffffffff81a86100 T intel_gmbus_reset +ffffffff81a86160 T intel_bb_set_bits +ffffffff81a862a0 T intel_bb_set_dir +ffffffff81a862d0 T intel_bb_read_bits +ffffffff81a86460 T intel_acquire_bus +ffffffff81a86660 T intel_release_bus +ffffffff81a86800 T intel_send_start +ffffffff81a86820 T intel_send_stop +ffffffff81a86840 T intel_initiate_xfer +ffffffff81a86860 T intel_read_byte +ffffffff81a86880 T intel_write_byte +ffffffff81a868a0 T intel_gmbus_output_aksv +ffffffff81a86970 t do_gmbus_xfer +ffffffff81a86f70 T intel_gmbus_setup +ffffffff81a872f0 T intel_gmbus_teardown +ffffffff81a87370 T intel_gmbus_get_adapter +ffffffff81a873f0 T intel_gmbus_force_bit +ffffffff81a87490 T intel_gmbus_is_forced_bit +ffffffff81a874c0 T intel_gmbus_irq_handler +ffffffff81a87560 t gmbus_xfer_read +ffffffff81a87850 t gmbus_xfer_write +ffffffff81a87a90 t gmbus_wait +ffffffff81a87e70 t gmbus_wait_idle +ffffffff81a88000 t gmbus_xfer +ffffffff81a880e0 t gmbus_func +ffffffff81a88120 t gmbus_lock_bus +ffffffff81a88140 t gmbus_trylock_bus +ffffffff81a881a0 t gmbus_unlock_bus +ffffffff81a89000 T intel_hdcp_capable +ffffffff81a890a0 t intel_hdcp_read_valid_bksv +ffffffff81a89330 T intel_hdcp2_capable +ffffffff81a89450 T is_hdcp_supported +ffffffff81a894a0 T intel_hdcp_component_init +ffffffff81a89500 T intel_hdcp_init +ffffffff81a89680 t intel_hdcp_check_work +ffffffff81a8bfc0 t intel_hdcp_prop_work +ffffffff81a8c040 T intel_hdcp_enable +ffffffff81a8c090 T intel_hdcp_disable +ffffffff81a8c1c0 t intel_hdcp_update_value +ffffffff81a8c380 t _intel_hdcp2_disable +ffffffff81a8c770 t _intel_hdcp_disable +ffffffff81a8ca60 T intel_hdcp_update_pipe +ffffffff81a8cbd0 T intel_hdcp_component_fini +ffffffff81a8cc70 T intel_hdcp_cleanup +ffffffff81a8cdb0 T intel_hdcp_atomic_check +ffffffff81a8ce40 T intel_hdcp_handle_cp_irq +ffffffff81a8cf40 t __delayed_work_tick +ffffffff81a8cf60 t hdcp2_authenticate_repeater_topology +ffffffff81a8d220 t transcoder_name +ffffffff81a8d260 t intel_hdcp_get_repeater_ctl +ffffffff81a8d330 t ktime_get_raw +ffffffff81a8d3b0 t wait_remaining_ms_from_jiffies +ffffffff81a8d440 t intel_hdcp_auth_downstream +ffffffff81a8e610 t intel_write_sha_text +ffffffff81a8f000 T intel_hdcp_gsc_cs_required +ffffffff81a8f040 T intel_hdcp_gsc_init +ffffffff81a8f4b0 T intel_hdcp_gsc_fini +ffffffff81a8f510 T intel_hdcp_gsc_msg_send +ffffffff81a8f840 t gsc_hdcp_initiate_session +ffffffff81a8f890 t gsc_hdcp_verify_receiver_cert_prepare_km +ffffffff81a8f8e0 t gsc_hdcp_verify_hprime +ffffffff81a8f930 t gsc_hdcp_store_pairing_info +ffffffff81a8f980 t gsc_hdcp_initiate_locality_check +ffffffff81a8f9d0 t gsc_hdcp_verify_lprime +ffffffff81a8fa20 t gsc_hdcp_get_session_key +ffffffff81a8fa70 t gsc_hdcp_repeater_check_flow_prepare_ack +ffffffff81a8fac0 t gsc_hdcp_verify_mprime +ffffffff81a8fb10 t gsc_hdcp_enable_authentication +ffffffff81a8fb60 t gsc_hdcp_close_session +ffffffff81a90000 T intel_hdmi_to_i915 +ffffffff81a90040 T hsw_write_infoframe +ffffffff81a90450 t hsw_dip_data_reg +ffffffff81a90600 T hsw_read_infoframe +ffffffff81a906c0 T intel_hdmi_infoframe_enable +ffffffff81a90760 T intel_hdmi_infoframes_enabled +ffffffff81a90880 T intel_read_infoframe +ffffffff81a90a20 T intel_hdmi_read_gcp_infoframe +ffffffff81a90b00 T intel_dp_dual_mode_set_tmds_output +ffffffff81a90bc0 T intel_hdmi_tmds_clock +ffffffff81a90c10 T intel_hdmi_bpc_possible +ffffffff81a90d30 T intel_hdmi_limited_color_range +ffffffff81a90da0 T intel_hdmi_compute_has_hdmi_sink +ffffffff81a90e10 T intel_hdmi_compute_config +ffffffff81a913c0 t intel_hdmi_compute_output_format +ffffffff81a91520 t intel_hdmi_compute_hdmi_infoframe +ffffffff81a915e0 t intel_hdmi_compute_drm_infoframe +ffffffff81a916d0 T intel_hdmi_encoder_shutdown +ffffffff81a917a0 T intel_hdmi_handle_sink_scrambling +ffffffff81a91890 T intel_infoframe_init +ffffffff81a91a30 t vlv_write_infoframe +ffffffff81a91d60 t vlv_read_infoframe +ffffffff81a91ee0 t vlv_set_infoframes +ffffffff81a92220 t vlv_infoframes_enabled +ffffffff81a922b0 t g4x_write_infoframe +ffffffff81a92550 t g4x_read_infoframe +ffffffff81a92680 t g4x_set_infoframes +ffffffff81a92910 t g4x_infoframes_enabled +ffffffff81a92990 t hsw_set_infoframes +ffffffff81a92c20 t hsw_infoframes_enabled +ffffffff81a92cb0 t ibx_write_infoframe +ffffffff81a92fc0 t ibx_read_infoframe +ffffffff81a93130 t ibx_set_infoframes +ffffffff81a93460 t ibx_infoframes_enabled +ffffffff81a934f0 t cpt_write_infoframe +ffffffff81a937f0 t cpt_read_infoframe +ffffffff81a93960 t cpt_set_infoframes +ffffffff81a93c40 t cpt_infoframes_enabled +ffffffff81a93cb0 T intel_hdmi_init_connector +ffffffff81a94430 T intel_hdmi_dsc_get_slice_height +ffffffff81a94490 T intel_hdmi_dsc_get_num_slices +ffffffff81a94610 T intel_hdmi_dsc_get_bpp +ffffffff81a946f0 t intel_hdmi_compute_clock +ffffffff81a94950 t hdmi_port_clock_valid +ffffffff81a94b70 t intel_write_infoframe +ffffffff81a94d40 t intel_hdmi_detect +ffffffff81a94ee0 t intel_hdmi_force +ffffffff81a94f80 t intel_hdmi_connector_register +ffffffff81a94f90 t intel_hdmi_connector_unregister +ffffffff81a94fa0 t intel_hdmi_set_edid +ffffffff81a95230 t intel_hdmi_get_modes +ffffffff81a95240 t intel_hdmi_mode_valid +ffffffff81a953f0 t intel_hdmi_connector_atomic_check +ffffffff81a95420 t intel_hdmi_mode_clock_valid +ffffffff81a955c0 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a95700 t intel_hdmi_hdcp_read_bksv +ffffffff81a957d0 t intel_hdmi_hdcp_read_bstatus +ffffffff81a958a0 t intel_hdmi_hdcp_repeater_present +ffffffff81a95980 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a95a50 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a95b30 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a95c00 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a95cf0 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a95f60 t intel_hdmi_hdcp_check_link +ffffffff81a96280 t intel_hdmi_hdcp2_capable +ffffffff81a96340 t intel_hdmi_hdcp2_write_msg +ffffffff81a96430 t intel_hdmi_hdcp2_read_msg +ffffffff81a96830 t intel_hdmi_hdcp2_check_link +ffffffff81a97000 T intel_hpd_pin_default +ffffffff81a97030 T intel_encoder_hotplug +ffffffff81a97160 T intel_hpd_trigger_irq +ffffffff81a971d0 T intel_hpd_irq_handler +ffffffff81a975f0 T intel_hpd_init +ffffffff81a97700 T intel_hpd_poll_enable +ffffffff81a97780 T intel_hpd_poll_disable +ffffffff81a977e0 T intel_hpd_init_early +ffffffff81a978f0 t i915_hotplug_work_func +ffffffff81a97cd0 t i915_digport_work_func +ffffffff81a97e50 t i915_hpd_poll_init_work +ffffffff81a97f50 t intel_hpd_irq_storm_reenable_work +ffffffff81a98270 T intel_hpd_cancel_work +ffffffff81a98390 T intel_hpd_disable +ffffffff81a98420 T intel_hpd_enable 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xelpdp_hpd_enable_detection +ffffffff81a9b1f0 t gen11_hpd_irq_setup +ffffffff81a9b440 t gen11_hpd_enable_detection +ffffffff81a9b640 t bxt_hpd_irq_setup +ffffffff81a9b7c0 t bxt_hpd_enable_detection +ffffffff81a9b8a0 t spt_hpd_irq_setup +ffffffff81a9bac0 t spt_hpd_enable_detection +ffffffff81a9bbe0 t ilk_hpd_irq_setup +ffffffff81a9be50 t ilk_hpd_enable_detection +ffffffff81a9c000 T intel_hti_init +ffffffff81a9c070 T intel_hti_uses_phy +ffffffff81a9c110 T intel_hti_dpll_mask +ffffffff81a9d000 T intel_load_detect_get_pipe +ffffffff81a9d370 t intel_modeset_disable_planes +ffffffff81a9d430 T intel_load_detect_release_pipe +ffffffff81a9e000 T intel_lpe_audio_irq_handler +ffffffff81a9e020 T intel_lpe_audio_init +ffffffff81a9e050 T intel_lpe_audio_teardown +ffffffff81a9e070 T intel_lpe_audio_notify +ffffffff81a9f000 T lspcon_detect_hdr_capability +ffffffff81a9f0b0 T lspcon_write_infoframe +ffffffff81a9f7f0 T lspcon_read_infoframe +ffffffff81a9f830 T lspcon_set_infoframes +ffffffff81a9fa90 T lspcon_infoframes_enabled +ffffffff81a9fc60 T lspcon_wait_pcon_mode +ffffffff81a9fc80 t lspcon_wait_mode +ffffffff81a9ff40 T lspcon_init +ffffffff81aa0340 T intel_lspcon_infoframes_enabled +ffffffff81aa0370 T lspcon_resume +ffffffff81aa0610 t lspcon_change_mode +ffffffff81aa1000 T intel_lvds_port_enabled +ffffffff81aa1080 T intel_get_lvds_encoder +ffffffff81aa10e0 T intel_is_dual_link_lvds +ffffffff81aa1140 T intel_lvds_init +ffffffff81aa17e0 t intel_enable_lvds +ffffffff81aa1920 t intel_pre_enable_lvds +ffffffff81aa1c00 t intel_lvds_compute_config +ffffffff81aa1d60 t pch_disable_lvds +ffffffff81aa1d80 t pch_post_disable_lvds +ffffffff81aa1da0 t gmch_disable_lvds +ffffffff81aa1dd0 t intel_lvds_get_hw_state +ffffffff81aa1e90 t intel_lvds_get_config +ffffffff81aa1fa0 t intel_lvds_shutdown +ffffffff81aa2040 t compute_is_dual_link_lvds +ffffffff81aa2110 t intel_no_lvds_dmi_callback +ffffffff81aa2160 t intel_disable_lvds +ffffffff81aa2280 t intel_lvds_get_modes +ffffffff81aa22d0 t intel_lvds_mode_valid +ffffffff81aa2370 t intel_dual_link_lvds_callback +ffffffff81aa3000 T _intel_modeset_lock_begin +ffffffff81aa3060 T _intel_modeset_lock_loop +ffffffff81aa30a0 T _intel_modeset_lock_end +ffffffff81aa4000 T intel_modeset_setup_hw_state +ffffffff81aa52d0 t intel_crtc_disable_noatomic +ffffffff81aa58b0 t intel_crtc_disable_noatomic_begin +ffffffff81aa6000 T intel_modeset_verify_crtc +ffffffff81aa6540 t verify_connector_state +ffffffff81aa69d0 T intel_modeset_verify_disabled +ffffffff81aa7000 T intel_opregion_notify_encoder +ffffffff81aa7180 t swsci +ffffffff81aa74b0 T intel_opregion_notify_adapter +ffffffff81aa7510 T intel_opregion_asle_intr +ffffffff81aa7560 T intel_opregion_setup +ffffffff81aa7d70 t asle_work +ffffffff81aa81e0 T intel_opregion_get_panel_type +ffffffff81aa82d0 T intel_opregion_get_edid +ffffffff81aa8390 T intel_opregion_headless_sku +ffffffff81aa83e0 T intel_opregion_register +ffffffff81aa8480 T intel_opregion_resume +ffffffff81aa8520 T intel_opregion_suspend +ffffffff81aa85d0 T intel_opregion_unregister +ffffffff81aa86a0 T intel_opregion_cleanup +ffffffff81aa8790 t intel_no_opregion_vbt_callback +ffffffff81aa87f0 t intel_use_opregion_panel_type_callback +ffffffff81aa9000 T intel_overlay_reset +ffffffff81aa9050 T intel_overlay_switch_off +ffffffff81aa9250 t intel_overlay_release_old_vid +ffffffff81aa93f0 T intel_overlay_put_image_ioctl +ffffffff81aa9700 t update_pfit_vscale_ratio +ffffffff81aa97d0 t check_overlay_dst +ffffffff81aa98a0 t check_overlay_src +ffffffff81aa9af0 t intel_overlay_do_put_image +ffffffff81aaa660 T intel_overlay_attrs_ioctl +ffffffff81aaa980 t check_gamma +ffffffff81aaab70 T intel_overlay_setup +ffffffff81aaade0 t intel_overlay_last_flip_retire +ffffffff81aaae20 T intel_overlay_cleanup +ffffffff81aaaee0 T intel_overlay_capture_error_state +ffffffff81aaafd0 T intel_overlay_print_error_state +ffffffff81aab3a0 t intel_overlay_release_old_vid_tail +ffffffff81aab470 t intel_overlay_off_tail +ffffffff81aab620 t intel_overlay_flip_prepare +ffffffff81aac000 T intel_panel_use_ssc +ffffffff81aac060 T intel_panel_preferred_fixed_mode +ffffffff81aac0b0 T intel_panel_fixed_mode +ffffffff81aac210 T intel_panel_downclock_mode +ffffffff81aac300 T intel_panel_highest_mode +ffffffff81aac360 T intel_panel_get_modes +ffffffff81aac3f0 T intel_panel_drrs_type +ffffffff81aac420 T intel_panel_compute_config +ffffffff81aac590 T intel_panel_add_edid_fixed_modes +ffffffff81aacac0 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81aacb20 t intel_panel_add_fixed_mode +ffffffff81aacca0 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81aacd10 T intel_panel_add_encoder_fixed_mode +ffffffff81aacd50 T intel_panel_fitting +ffffffff81aad3b0 T intel_panel_detect +ffffffff81aad440 T intel_panel_mode_valid +ffffffff81aad4d0 T intel_panel_init_alloc +ffffffff81aad520 T intel_panel_init +ffffffff81aad640 T intel_panel_fini +ffffffff81aae000 T intel_has_pch_trancoder +ffffffff81aae060 T intel_crtc_pch_transcoder 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+ffffffff81ab3240 T intel_pmdemand_update_port_clock +ffffffff81ab3280 T intel_pmdemand_atomic_check +ffffffff81ab3620 t intel_pmdemand_update_max_ddiclk +ffffffff81ab36f0 t intel_pmdemand_update_active_non_tc_phys +ffffffff81ab38f0 T intel_pmdemand_init_pmdemand_params +ffffffff81ab3ac0 T intel_pmdemand_program_dbuf +ffffffff81ab3c50 t intel_pmdemand_wait +ffffffff81ab3e40 T intel_pmdemand_pre_plane_update +ffffffff81ab3f30 t intel_pmdemand_program_params +ffffffff81ab4370 T intel_pmdemand_post_plane_update +ffffffff81ab4450 t intel_pmdemand_duplicate_state +ffffffff81ab44e0 t intel_pmdemand_destroy_state +ffffffff81ab5000 T intel_pps_lock +ffffffff81ab5060 T intel_pps_unlock +ffffffff81ab50c0 T intel_pps_reset_all +ffffffff81ab5210 T intel_pps_check_power_unlocked +ffffffff81ab54f0 t pps_name +ffffffff81ab5590 T intel_pps_wait_power_cycle +ffffffff81ab5630 t wait_panel_power_cycle +ffffffff81ab5810 T intel_pps_vdd_on_unlocked +ffffffff81ab5d80 T intel_pps_vdd_on +ffffffff81ab5f10 T intel_pps_vdd_off_sync +ffffffff81ab5fe0 t intel_pps_vdd_off_sync_unlocked +ffffffff81ab6400 T intel_pps_vdd_off_unlocked +ffffffff81ab65b0 T intel_pps_on_unlocked +ffffffff81ab6a40 T intel_pps_on +ffffffff81ab6ae0 T intel_pps_off_unlocked +ffffffff81ab6ec0 T intel_pps_off +ffffffff81ab6f60 T intel_pps_backlight_on +ffffffff81ab7150 T intel_pps_backlight_off +ffffffff81ab7340 T intel_pps_backlight_power +ffffffff81ab7530 T vlv_pps_init +ffffffff81ab7710 t vlv_detach_power_sequencer +ffffffff81ab78e0 t vlv_steal_power_sequencer +ffffffff81ab7a10 t pps_init_delays +ffffffff81ab7eb0 t pps_init_registers +ffffffff81ab8240 T intel_pps_have_panel_power_or_vdd +ffffffff81ab8390 T intel_pps_encoder_reset +ffffffff81ab8530 t vlv_initial_power_sequencer_setup +ffffffff81ab8840 t pps_vdd_init +ffffffff81ab89f0 T intel_pps_init +ffffffff81ab8e60 t edp_panel_vdd_work +ffffffff81ab8f10 T intel_pps_init_late +ffffffff81ab9150 T intel_pps_unlock_regs_wa +ffffffff81ab9260 T intel_pps_setup +ffffffff81ab92d0 T assert_pps_unlocked +ffffffff81ab9560 t intel_pps_get_registers +ffffffff81ab9d70 t wait_panel_status +ffffffff81aba180 t intel_pps_readout_hw_state +ffffffff81aba330 t __delayed_work_tick +ffffffff81abb000 T intel_psr_irq_handler +ffffffff81abb640 t transcoder_name +ffffffff81abb680 T intel_psr_init_dpcd +ffffffff81abb920 T intel_psr_compute_config +ffffffff81abbb00 t intel_psr2_config_valid +ffffffff81abbf70 T intel_psr_get_config +ffffffff81abc110 T intel_psr_disable +ffffffff81abc220 t intel_psr_disable_locked +ffffffff81abc5a0 T intel_psr_pause +ffffffff81abc790 t intel_psr_exit +ffffffff81abca40 T intel_psr_resume +ffffffff81abcad0 t intel_psr_activate +ffffffff81abd200 T intel_psr2_disable_plane_sel_fetch_arm +ffffffff81abd270 T intel_psr2_program_plane_sel_fetch_arm +ffffffff81abd310 T intel_psr2_program_plane_sel_fetch_noarm +ffffffff81abd480 T intel_psr2_program_trans_man_trk_ctl +ffffffff81abd570 T intel_psr2_sel_fetch_update +ffffffff81abdcf0 T intel_psr_pre_plane_update +ffffffff81abdec0 t wm_optimization_wa +ffffffff81abe050 T intel_psr_post_plane_update +ffffffff81abec80 T intel_psr_wait_for_idle_locked +ffffffff81abee50 T intel_psr_debug_set +ffffffff81abf170 T intel_psr_invalidate +ffffffff81abf3b0 T intel_psr_flush +ffffffff81abf7e0 T intel_psr_init +ffffffff81abf910 t intel_psr_work +ffffffff81abfab0 t tgl_dc3co_disable_work +ffffffff81abfb00 T intel_psr_short_pulse +ffffffff81abfec0 T intel_psr_enabled +ffffffff81abff40 T intel_psr_lock +ffffffff81ac0000 T intel_psr_unlock +ffffffff81ac00c0 T intel_psr_debugfs_register +ffffffff81ac00f0 T intel_psr_connector_debugfs_add +ffffffff81ac0120 t _compute_psr2_sdp_prior_scanline_indication +ffffffff81ac01e0 t _compute_psr2_wake_times +ffffffff81ac02d0 t intel_psr2_sel_fetch_config_valid +ffffffff81ac0360 t psr2_granularity_check +ffffffff81ac0450 t tgl_psr2_disable_dc3co +ffffffff81ac0560 t __delayed_work_tick +ffffffff81ac1000 T intel_lookup_range_min_qp +ffffffff81ac1110 T intel_lookup_range_max_qp +ffffffff81ac2000 T intel_init_quirks +ffffffff81ac20f0 T intel_has_quirk +ffffffff81ac2130 t quirk_ssc_force_disable +ffffffff81ac2160 t quirk_invert_brightness +ffffffff81ac2190 t quirk_backlight_present +ffffffff81ac21c0 t quirk_increase_t12_delay +ffffffff81ac21f0 t quirk_increase_ddi_disabled_time +ffffffff81ac2220 t intel_dmi_reverse_brightness +ffffffff81ac2270 t intel_dmi_no_pps_backlight +ffffffff81ac3000 T intel_sdvo_port_enabled +ffffffff81ac30a0 T intel_sdvo_init +ffffffff81ac4030 t intel_sdvo_compute_config +ffffffff81ac43f0 t pch_disable_sdvo +ffffffff81ac4420 t pch_post_disable_sdvo +ffffffff81ac4430 t intel_disable_sdvo +ffffffff81ac45a0 t intel_sdvo_pre_enable +ffffffff81ac4f20 t intel_enable_sdvo +ffffffff81ac50f0 t intel_sdvo_get_hw_state +ffffffff81ac51e0 t intel_sdvo_get_config +ffffffff81ac5600 t intel_sdvo_set_target_input +ffffffff81ac5670 t intel_sdvo_get_input_pixel_clock_range +ffffffff81ac5710 t intel_sdvo_ddc_proxy_xfer +ffffffff81ac57c0 t intel_sdvo_ddc_proxy_func +ffffffff81ac57f0 t __intel_sdvo_write_cmd +ffffffff81ac5ca0 t proxy_lock_bus +ffffffff81ac5cd0 t proxy_trylock_bus +ffffffff81ac5d00 t proxy_unlock_bus +ffffffff81ac5d30 t intel_sdvo_enc_destroy +ffffffff81ac5d40 t intel_sdvo_set_output_timings_from_mode +ffffffff81ac5e40 t intel_sdvo_get_preferred_input_mode +ffffffff81ac61d0 t intel_sdvo_get_dtd_from_mode +ffffffff81ac6350 t intel_sdvo_read_response +ffffffff81ac67f0 t intel_sdvo_get_value +ffffffff81ac6860 t intel_sdvo_write_sdvox +ffffffff81ac6a50 t intel_sdvo_write_infoframe +ffffffff81ac6c10 t intel_sdvo_read_infoframe +ffffffff81ac6e30 t intel_sdvo_hotplug +ffffffff81ac6e70 t intel_sdvo_connector_get_hw_state +ffffffff81ac6f00 t intel_sdvo_detect +ffffffff81ac71f0 t intel_sdvo_connector_register +ffffffff81ac7200 t intel_sdvo_connector_unregister +ffffffff81ac7210 t intel_sdvo_connector_duplicate_state +ffffffff81ac7290 t intel_sdvo_connector_atomic_set_property +ffffffff81ac7460 t intel_sdvo_connector_atomic_get_property +ffffffff81ac7680 t intel_sdvo_get_analog_edid +ffffffff81ac76b0 t intel_sdvo_connector_matches_edid +ffffffff81ac7740 t intel_sdvo_get_modes +ffffffff81ac79e0 t intel_sdvo_mode_valid +ffffffff81ac7af0 t intel_sdvo_atomic_check +ffffffff81ac7ba0 t intel_sdvo_create_enhance_property +ffffffff81ac9000 T intel_snps_phy_wait_for_calibration +ffffffff81ac90d0 T intel_snps_phy_update_psr_power_state +ffffffff81ac9190 T intel_snps_phy_set_signal_levels +ffffffff81ac93e0 T intel_mpllb_calc_state +ffffffff81ac9570 T intel_snps_phy_check_hdmi_link_rate +ffffffff81ac9610 T intel_mpllb_enable +ffffffff81ac9850 T intel_mpllb_disable +ffffffff81ac99c0 T intel_mpllb_calc_port_clock +ffffffff81ac9a90 T intel_mpllb_readout_hw_state +ffffffff81ac9c00 T intel_mpllb_state_verify +ffffffff81acb000 T vlv_plane_min_cdclk +ffffffff81acb0f0 T ivb_plane_min_cdclk +ffffffff81acb1b0 T hsw_plane_min_cdclk +ffffffff81acb250 T chv_plane_check_rotation +ffffffff81acb2c0 T intel_sprite_plane_create +ffffffff81acb610 t vlv_sprite_update_noarm +ffffffff81acb710 t vlv_sprite_update_arm +ffffffff81acbdb0 t vlv_sprite_disable_arm +ffffffff81acbe40 t vlv_sprite_get_hw_state +ffffffff81acbf10 t vlv_sprite_check +ffffffff81acbfe0 t ivb_sprite_update_noarm +ffffffff81acc150 t ivb_sprite_update_arm +ffffffff81acc520 t ivb_sprite_disable_arm +ffffffff81acc5d0 t ivb_sprite_get_hw_state +ffffffff81acc690 t g4x_sprite_check +ffffffff81acc930 t hsw_sprite_max_stride +ffffffff81acc980 t g4x_sprite_max_stride +ffffffff81acc9f0 t ivb_sprite_min_cdclk +ffffffff81accb30 t g4x_sprite_update_noarm +ffffffff81accc90 t g4x_sprite_update_arm +ffffffff81acd0d0 t g4x_sprite_disable_arm +ffffffff81acd180 t g4x_sprite_get_hw_state +ffffffff81acd240 t g4x_sprite_min_cdclk +ffffffff81acd310 t vlv_sprite_ctl +ffffffff81acd500 t vlv_sprite_format_mod_supported +ffffffff81acd630 t ivb_sprite_ctl +ffffffff81acd860 t g4x_sprite_ctl +ffffffff81acda20 t snb_sprite_format_mod_supported +ffffffff81acdb10 t g4x_sprite_format_mod_supported +ffffffff81ace000 T intel_sprite_set_colorkey_ioctl +ffffffff81acf000 T intel_tc_port_in_tbt_alt_mode +ffffffff81acf070 T intel_tc_port_in_dp_alt_mode +ffffffff81acf0e0 T intel_tc_port_in_legacy_mode +ffffffff81acf150 T intel_tc_cold_requires_aux_pw +ffffffff81acf1c0 T intel_tc_port_get_lane_mask +ffffffff81acf2f0 T intel_tc_port_get_pin_assignment_mask +ffffffff81acf420 T intel_tc_port_fia_max_lane_count +ffffffff81acf600 T intel_tc_port_set_fia_lane_count +ffffffff81acf7d0 T intel_tc_port_init_mode +ffffffff81acfa00 t intel_tc_port_update_mode +ffffffff81acfdb0 T intel_tc_port_sanitize_mode +ffffffff81ad00e0 T intel_tc_port_connected_locked +ffffffff81ad0240 T intel_tc_port_ref_held +ffffffff81ad02a0 T intel_tc_port_connected +ffffffff81ad0310 T intel_tc_port_link_needs_reset +ffffffff81ad03c0 T intel_tc_port_link_reset +ffffffff81ad04c0 T intel_tc_port_link_cancel_reset_work +ffffffff81ad0570 T intel_tc_port_lock +ffffffff81ad0590 t __intel_tc_port_lock +ffffffff81ad06d0 T intel_tc_port_suspend +ffffffff81ad0730 T intel_tc_port_unlock +ffffffff81ad07b0 T intel_tc_port_get_link +ffffffff81ad0840 T intel_tc_port_put_link +ffffffff81ad08f0 T intel_tc_port_init +ffffffff81ad0b30 t kasprintf +ffffffff81ad0c00 t intel_tc_port_disconnect_phy_work +ffffffff81ad0c50 t intel_tc_port_link_reset_work +ffffffff81ad0f50 T intel_tc_port_cleanup +ffffffff81ad1010 t intel_tc_port_needs_reset +ffffffff81ad1110 t tgl_tc_phy_cold_off_domain +ffffffff81ad1140 t xelpdp_tc_phy_hpd_live_status +ffffffff81ad1250 t adlp_tc_phy_is_ready +ffffffff81ad1350 t xelpdp_tc_phy_is_owned +ffffffff81ad1420 t xelpdp_tc_phy_get_hw_state +ffffffff81ad15a0 t xelpdp_tc_phy_connect +ffffffff81ad17f0 t xelpdp_tc_phy_disconnect +ffffffff81ad1930 t adlp_tc_phy_init +ffffffff81ad19a0 t tc_phy_get_current_mode +ffffffff81ad1cc0 t tc_phy_wait_for_ready +ffffffff81ad1e30 t xelpdp_tc_phy_enable_tcss_power +ffffffff81ad2080 t tc_phy_verify_legacy_or_dp_alt_mode +ffffffff81ad2260 t xelpdp_tc_phy_wait_for_tcss_power +ffffffff81ad2470 t adlp_tc_phy_cold_off_domain +ffffffff81ad24d0 t adlp_tc_phy_hpd_live_status +ffffffff81ad25d0 t adlp_tc_phy_is_owned +ffffffff81ad2690 t adlp_tc_phy_get_hw_state +ffffffff81ad2720 t adlp_tc_phy_connect +ffffffff81ad2a10 t adlp_tc_phy_disconnect +ffffffff81ad2b70 t icl_tc_phy_hpd_live_status +ffffffff81ad2cd0 t icl_tc_phy_is_ready +ffffffff81ad2de0 t icl_tc_phy_is_owned +ffffffff81ad2ef0 t icl_tc_phy_get_hw_state +ffffffff81ad2f80 t icl_tc_phy_connect +ffffffff81ad30f0 t icl_tc_phy_disconnect +ffffffff81ad3170 t tgl_tc_phy_init +ffffffff81ad32a0 t icl_tc_phy_take_ownership +ffffffff81ad3410 t icl_tc_phy_cold_off_domain +ffffffff81ad3470 t icl_tc_phy_init +ffffffff81ad34d0 t __delayed_work_tick +ffffffff81ad4000 T intel_tv_init +ffffffff81ad43f0 t intel_tv_compute_config +ffffffff81ad48a0 t intel_tv_get_config +ffffffff81ad4d60 t intel_tv_pre_enable +ffffffff81ad5680 t intel_enable_tv +ffffffff81ad56e0 t intel_disable_tv +ffffffff81ad5740 t intel_tv_get_hw_state +ffffffff81ad57a0 t intel_tv_connector_duplicate_state +ffffffff81ad5820 t intel_tv_mode_to_mode +ffffffff81ad5970 t intel_tv_get_modes +ffffffff81ad5cb0 t intel_tv_detect +ffffffff81ad6140 t intel_tv_mode_valid +ffffffff81ad61f0 t intel_tv_atomic_check +ffffffff81ad7000 T i915_get_vblank_counter +ffffffff81ad71e0 T g4x_get_vblank_counter +ffffffff81ad7270 T intel_crtc_get_vblank_timestamp +ffffffff81ad7290 t i915_get_crtc_scanoutpos +ffffffff81ad7690 T intel_get_crtc_scanline +ffffffff81ad7700 t __intel_get_crtc_scanline +ffffffff81ad7950 T intel_wait_for_pipe_scanline_stopped +ffffffff81ad7960 t wait_for_pipe_scanline_moving +ffffffff81ad7bc0 T intel_wait_for_pipe_scanline_moving +ffffffff81ad7be0 T intel_crtc_update_active_timings +ffffffff81ad8000 T intel_dsc_source_support +ffffffff81ad8050 T intel_dsc_compute_params +ffffffff81ad8650 T intel_dsc_power_domain +ffffffff81ad8700 T intel_dsc_get_num_vdsc_instances +ffffffff81ad8750 T intel_dsc_dsi_pps_write +ffffffff81ad89f0 T intel_dsc_dp_pps_write +ffffffff81ad8ae0 T intel_uncompressed_joiner_enable +ffffffff81ad8c00 T intel_dsc_enable +ffffffff81ada600 T intel_dsc_disable +ffffffff81ada780 T intel_dsc_get_config +ffffffff81adb000 T intel_vga_disable +ffffffff81adb120 T intel_vga_redisable_power_on +ffffffff81adb1c0 T intel_vga_redisable +ffffffff81adb280 T intel_vga_reset_io_mem +ffffffff81adb2e0 T intel_vga_register +ffffffff81adb310 T intel_vga_unregister +ffffffff81adc000 T intel_vrr_is_capable +ffffffff81adc080 T intel_vrr_check_modeset +ffffffff81adc110 T intel_vrr_vmin_vblank_start +ffffffff81adc170 T intel_vrr_vmax_vblank_start +ffffffff81adc1d0 T intel_vrr_compute_config +ffffffff81adc350 T intel_vrr_set_transcoder_timings +ffffffff81adc530 T intel_vrr_send_push +ffffffff81adc5b0 T intel_vrr_is_push_sent +ffffffff81adc640 T intel_vrr_enable +ffffffff81adc760 T intel_vrr_disable +ffffffff81adc8a0 T intel_vrr_get_config +ffffffff81add000 T intel_update_watermarks +ffffffff81add040 T intel_compute_pipe_wm +ffffffff81add090 T intel_compute_intermediate_wm +ffffffff81add120 T intel_initial_watermarks +ffffffff81add170 T intel_atomic_update_watermarks +ffffffff81add1b0 T intel_optimize_watermarks +ffffffff81add1f0 T intel_compute_global_watermarks +ffffffff81add240 T intel_wm_get_hw_state +ffffffff81add280 T intel_wm_plane_visible +ffffffff81add2e0 T intel_print_wm_latency +ffffffff81add3f0 T intel_wm_init +ffffffff81add410 T intel_wm_debugfs_register +ffffffff81ade000 T skl_update_scaler_crtc +ffffffff81ade0b0 t skl_update_scaler +ffffffff81ade3f0 T skl_update_scaler_plane +ffffffff81ade7f0 T intel_atomic_setup_scalers +ffffffff81aded50 T skl_pfit_enable +ffffffff81adf240 T skl_program_plane_scaler +ffffffff81adf930 T skl_detach_scalers +ffffffff81adfa90 T skl_scaler_disable +ffffffff81adfbc0 T skl_scaler_get_config +ffffffff81ae0000 T skl_format_to_fourcc +ffffffff81ae0180 T icl_is_nv12_y_plane +ffffffff81ae01f0 T icl_hdr_plane_mask +ffffffff81ae0220 T icl_is_hdr_plane +ffffffff81ae0260 T skl_calc_main_surface_offset +ffffffff81ae04a0 T skl_universal_plane_create +ffffffff81ae0ce0 t icl_plane_min_width +ffffffff81ae0e70 t icl_hdr_plane_max_width +ffffffff81ae0ec0 t icl_sdr_plane_max_width +ffffffff81ae0ef0 t icl_plane_max_height +ffffffff81ae0f20 t icl_plane_min_cdclk +ffffffff81ae0f60 t glk_plane_max_width +ffffffff81ae1010 t skl_plane_max_height +ffffffff81ae1040 t glk_plane_min_cdclk +ffffffff81ae10b0 t skl_plane_max_width +ffffffff81ae1180 t skl_plane_min_cdclk +ffffffff81ae11f0 t skl_plane_max_stride +ffffffff81ae1290 t icl_plane_update_noarm +ffffffff81ae1b40 t icl_plane_update_arm +ffffffff81ae1ce0 t icl_plane_disable_arm +ffffffff81ae1df0 t skl_plane_update_noarm +ffffffff81ae1f90 t skl_plane_update_arm +ffffffff81ae22b0 t skl_plane_disable_arm +ffffffff81ae2360 t skl_plane_get_hw_state +ffffffff81ae2430 t skl_plane_check +ffffffff81ae3060 t skl_plane_async_flip +ffffffff81ae3190 t skl_plane_enable_flip_done +ffffffff81ae31f0 t skl_plane_disable_flip_done +ffffffff81ae3250 T skl_get_initial_plane_config +ffffffff81ae3a10 t skl_plane_aux_dist +ffffffff81ae3b00 t skl_surf_address +ffffffff81ae3c20 t skl_plane_check_nv12_rotation +ffffffff81ae3cc0 t pxp_is_borked +ffffffff81ae3d20 t skl_plane_ctl +ffffffff81ae4400 t glk_plane_color_ctl +ffffffff81ae4550 t skl_check_main_ccs_coordinates +ffffffff81ae46e0 t gen12_plane_format_mod_supported +ffffffff81ae4930 t skl_plane_format_mod_supported +ffffffff81ae5000 T intel_enabled_dbuf_slices_mask +ffffffff81ae5120 T intel_sagv_pre_plane_update +ffffffff81ae52b0 T intel_sagv_post_plane_update +ffffffff81ae5520 T intel_can_enable_sagv +ffffffff81ae5590 T skl_ddb_dbuf_slice_mask +ffffffff81ae5640 T skl_write_plane_wm +ffffffff81ae5ac0 T skl_write_cursor_wm +ffffffff81ae5ea0 T skl_ddb_allocation_overlaps +ffffffff81ae5f40 T intel_wm_state_verify +ffffffff81ae6920 t skl_pipe_wm_get_hw_state +ffffffff81ae6c70 T skl_watermark_ipc_enabled +ffffffff81ae6ca0 T skl_watermark_ipc_update +ffffffff81ae6d50 T skl_watermark_ipc_init +ffffffff81ae6e20 T skl_wm_init +ffffffff81ae7650 T intel_atomic_get_dbuf_state +ffffffff81ae7670 T intel_dbuf_init +ffffffff81ae76e0 T intel_dbuf_pre_plane_update +ffffffff81ae79b0 T intel_dbuf_post_plane_update +ffffffff81ae7a80 T intel_mbus_dbox_update +ffffffff81ae7cf0 T skl_watermark_debugfs_register +ffffffff81ae7d20 t skl_sagv_disable +ffffffff81ae7e40 t skl_compute_wm +ffffffff81aeb130 t skl_wm_get_hw_state_and_sanitize +ffffffff81aeb920 t skl_build_plane_wm_single +ffffffff81aebcb0 t skl_compute_wm_params +ffffffff81aec080 t skl_compute_plane_wm +ffffffff81aec4b0 t skl_compute_dbuf_slices +ffffffff81aec9b0 t skl_ddb_entry_for_slices +ffffffff81aecaf0 t intel_dbuf_duplicate_state +ffffffff81aecb80 t intel_dbuf_destroy_state +ffffffff81aed000 T pixel_format_from_register_bits +ffffffff81aed060 T vlv_dsi_wait_for_fifo_empty +ffffffff81aed120 T vlv_dsi_init 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intel_guc_ct_print_info +ffffffff81b8de30 t ct_write +ffffffff81b8dff0 t ktime_get +ffffffff81b8e070 t ct_deadlocked +ffffffff81b8f000 T intel_guc_debugfs_register +ffffffff81b90000 T intel_guc_fw_upload +ffffffff81b91000 T intel_gt_init_hwconfig +ffffffff81b911e0 T intel_gt_fini_hwconfig +ffffffff81b92000 T intel_guc_log_section_size_capture +ffffffff81b92040 t guc_log_init_sizes +ffffffff81b92270 T intel_guc_check_log_buf_overflow +ffffffff81b92320 T intel_guc_get_log_buffer_size +ffffffff81b923b0 T intel_guc_get_log_buffer_offset +ffffffff81b924a0 T intel_guc_log_init_early +ffffffff81b92510 t copy_debug_logs_work +ffffffff81b92530 T intel_guc_log_create +ffffffff81b92750 T intel_guc_log_destroy +ffffffff81b92780 T intel_guc_log_set_level +ffffffff81b928c0 T intel_guc_log_relay_created +ffffffff81b928f0 T intel_guc_log_relay_open +ffffffff81b92990 T intel_guc_log_relay_start +ffffffff81b929f0 T intel_guc_log_relay_flush +ffffffff81b92a90 t guc_log_copy_debuglogs_for_relay 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intel_guc_slpc_enable +ffffffff81b961f0 T intel_guc_slpc_set_boost_freq +ffffffff81b96290 t slpc_force_min_freq +ffffffff81b963b0 T intel_guc_slpc_dec_waiters +ffffffff81b963f0 T intel_guc_slpc_print_info +ffffffff81b96570 T intel_guc_slpc_fini +ffffffff81b97000 T intel_guc_wait_for_pending_msg +ffffffff81b97150 T intel_guc_wait_for_idle +ffffffff81b971a0 T intel_guc_busyness_park +ffffffff81b972e0 T intel_guc_busyness_unpark +ffffffff81b97390 t guc_update_pm_timestamp +ffffffff81b97540 T intel_guc_submission_reset_prepare +ffffffff81b97c50 t guc_flush_destroyed_contexts +ffffffff81b97dc0 T intel_guc_submission_reset +ffffffff81b97ed0 t __guc_reset_context +ffffffff81b981d0 T intel_guc_submission_cancel_requests +ffffffff81b98470 T intel_guc_submission_reset_finish +ffffffff81b98550 T intel_guc_submission_init +ffffffff81b986d0 T intel_guc_submission_fini +ffffffff81b98770 T intel_guc_submission_setup +ffffffff81b98bc0 t guc_sched_engine_disabled +ffffffff81b98bf0 t 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intel_guc_find_hung_context +ffffffff81b9b880 T intel_guc_dump_active_requests +ffffffff81b9ba10 T intel_guc_submission_print_info +ffffffff81b9bb80 T intel_guc_submission_print_context_info +ffffffff81b9bfb0 t emit_bb_start_parent_no_preempt_mid_batch +ffffffff81b9c0f0 T intel_guc_virtual_engine_has_heartbeat +ffffffff81b9c180 t guc_virtual_get_sibling +ffffffff81b9c220 t update_context_prio +ffffffff81b9c410 t try_context_registration +ffffffff81b9c700 t guc_wq_item_append +ffffffff81b9c990 t guc_add_request +ffffffff81b9cbb0 t clr_ctx_id_mapping +ffffffff81b9ccd0 t guc_context_policy_init_v70 +ffffffff81b9ce50 t guc_resume +ffffffff81b9cf50 t guc_request_alloc +ffffffff81b9d310 t add_to_context +ffffffff81b9d410 t remove_from_context +ffffffff81b9d4e0 t guc_engine_reset_prepare +ffffffff81b9d5b0 t guc_rewind_nop +ffffffff81b9d5e0 t guc_reset_nop +ffffffff81b9d610 t guc_set_default_submission +ffffffff81b9d650 t guc_engine_busyness +ffffffff81b9d870 t guc_context_alloc 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gen7_blt_get_cmd_length_mask +ffffffff81bab890 t gen9_blt_get_cmd_length_mask +ffffffff81bab900 T intel_engine_cleanup_cmd_parser +ffffffff81bab9d0 T intel_engine_cmd_parser +ffffffff81bac580 T i915_cmd_parser_get_version +ffffffff81bad000 T i915_fence_context_timeout +ffffffff81bae000 T i915_deps_init +ffffffff81bae060 T i915_deps_fini +ffffffff81bae0f0 T i915_deps_sync +ffffffff81bae1a0 T i915_deps_add_dependency +ffffffff81bae3f0 T i915_deps_add_resv +ffffffff81baf000 T i915_print_iommu_status +ffffffff81baf050 T i915_driver_probe +ffffffff81baf8d0 t i915_driver_register +ffffffff81baf9c0 T inteldrm_init_backlight +ffffffff81bafa30 t i915_welcome_messages +ffffffff81bafbb0 T i915_driver_remove +ffffffff81bafc90 T i915_driver_shutdown +ffffffff81bafe30 T i915_driver_resume_switcheroo +ffffffff81bafe90 t i915_drm_resume_early +ffffffff81baff80 t i915_drm_resume +ffffffff81bb01c0 T intagpsubmatch +ffffffff81bb0210 T intagp_print +ffffffff81bb0260 T inteldrm_wsioctl +ffffffff81bb0440 T inteldrm_wsmmap +ffffffff81bb0470 T inteldrm_alloc_screen +ffffffff81bb04a0 T inteldrm_free_screen +ffffffff81bb04c0 T inteldrm_show_screen +ffffffff81bb0590 T inteldrm_load_font +ffffffff81bb05b0 T inteldrm_list_font +ffffffff81bb05d0 T inteldrm_scrollback +ffffffff81bb05f0 T inteldrm_getchar +ffffffff81bb0610 T inteldrm_burner +ffffffff81bb06a0 T inteldrm_enter_ddb +ffffffff81bb0700 T inteldrm_doswitch +ffffffff81bb0780 T inteldrm_burner_cb +ffffffff81bb07b0 T inteldrm_backlight_update_status +ffffffff81bb0810 T inteldrm_backlight_get_brightness +ffffffff81bb0860 T inteldrm_match +ffffffff81bb08f0 T inteldrm_attach +ffffffff81bb0cf0 T inteldrm_detach +ffffffff81bb0d20 T inteldrm_activate +ffffffff81bb1030 T inteldrm_intr +ffffffff81bb1070 T inteldrm_attachhook +ffffffff81bb12d0 T inteldrm_forcedetach +ffffffff81bb1310 T inteldrm_native_backlight +ffffffff81bb1440 T inteldrm_firmware_backlight +ffffffff81bb15c0 t i915_pcode_init +ffffffff81bb1680 t i915_driver_open +ffffffff81bb16a0 t i915_driver_postclose +ffffffff81bb1700 t i915_driver_lastclose +ffffffff81bb1720 t i915_driver_release +ffffffff81bb1830 t i915_gem_reject_pin_ioctl +ffffffff81bb2000 T i915_drm_client_alloc +ffffffff81bb2070 T __i915_drm_client_free +ffffffff81bb3000 T i915_gem_get_aperture_ioctl +ffffffff81bb30d0 T i915_gem_object_unbind +ffffffff81bb3340 T i915_gem_pread_ioctl +ffffffff81bb34d0 t i915_gem_shmem_pread +ffffffff81bb38d0 t i915_gem_gtt_pread +ffffffff81bb3bf0 T i915_gem_pwrite_ioctl +ffffffff81bb3dc0 t i915_gem_gtt_pwrite_fast +ffffffff81bb4170 t i915_gem_shmem_pwrite +ffffffff81bb4600 T i915_gem_sw_finish_ioctl +ffffffff81bb4690 T i915_gem_runtime_suspend +ffffffff81bb4790 T i915_gem_object_ggtt_pin_ww +ffffffff81bb4a30 T i915_gem_object_ggtt_pin +ffffffff81bb4b40 t i915_gem_object_lock +ffffffff81bb4d50 T i915_gem_madvise_ioctl +ffffffff81bb5150 T i915_gem_drain_freed_objects +ffffffff81bb51c0 T i915_gem_drain_workqueue +ffffffff81bb52a0 T i915_gem_init +ffffffff81bb5540 T i915_gem_driver_register +ffffffff81bb5550 T i915_gem_driver_unregister +ffffffff81bb5560 T i915_gem_driver_remove +ffffffff81bb55c0 T i915_gem_driver_release +ffffffff81bb56b0 T i915_gem_init_early +ffffffff81bb5730 T i915_gem_cleanup_early +ffffffff81bb57b0 T i915_gem_open +ffffffff81bb58c0 t i915_gem_gtt_prepare +ffffffff81bb6000 T i915_gem_evict_something +ffffffff81bb6440 t ungrab_vma +ffffffff81bb6570 t grab_vma +ffffffff81bb6690 T i915_gem_evict_for_node +ffffffff81bb68d0 T i915_gem_evict_vm +ffffffff81bb7000 T i915_gem_gtt_prepare_pages +ffffffff81bb7030 T i915_gem_gtt_finish_pages +ffffffff81bb7090 T i915_gem_gtt_reserve +ffffffff81bb7140 T i915_gem_gtt_insert +ffffffff81bb8000 T i915_gem_ww_ctx_init +ffffffff81bb8060 T i915_gem_ww_unlock_single +ffffffff81bb81a0 T i915_gem_ww_ctx_fini +ffffffff81bb8210 t i915_gem_ww_ctx_unlock_all +ffffffff81bb8370 T i915_gem_ww_ctx_backoff +ffffffff81bb9000 T i915_getparam_ioctl +ffffffff81bba000 T intel_gpu_error_find_batch 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i915_memcpy_init_early +ffffffff81bc1000 T i915_mitigate_clear_residuals +ffffffff81bc2000 T i915_init +ffffffff81bc2220 t i915_check_nomodeset +ffffffff81bc2280 t i915_mock_selftests +ffffffff81bc22b0 t i915_pmu_init +ffffffff81bc22e0 t i915_pmu_exit +ffffffff81bc3000 T i915_params_dump +ffffffff81bc3670 T i915_params_copy +ffffffff81bc3870 T i915_params_free +ffffffff81bc4000 T i915_pci_register_driver +ffffffff81bc4030 T i915_pci_unregister_driver +ffffffff81bc5000 T i915_oa_config_release +ffffffff81bc5060 T i915_perf_get_oa_config +ffffffff81bc50c0 T i915_perf_oa_timestamp_frequency +ffffffff81bc5170 T i915_oa_init_reg_state +ffffffff81bc5260 T i915_perf_open_ioctl +ffffffff81bc5a80 T i915_perf_register +ffffffff81bc5ab0 T i915_perf_unregister +ffffffff81bc5b20 T i915_perf_add_config_ioctl +ffffffff81bc5b70 T i915_perf_remove_config_ioctl +ffffffff81bc5be0 T i915_perf_init +ffffffff81bc62c0 t gen7_is_valid_b_counter_addr +ffffffff81bc6310 t hsw_is_valid_mux_addr +ffffffff81bc6390 t hsw_enable_metric_set +ffffffff81bc6450 t hsw_disable_metric_set +ffffffff81bc6520 t gen7_oa_enable +ffffffff81bc6690 t gen7_oa_disable +ffffffff81bc6750 t gen7_oa_read +ffffffff81bc6bb0 t gen7_oa_hw_tail_read +ffffffff81bc6c00 t gen8_oa_read +ffffffff81bc7230 t gen8_is_valid_mux_addr +ffffffff81bc72b0 t gen8_is_valid_flex_addr +ffffffff81bc7330 t chv_is_valid_mux_addr +ffffffff81bc73b0 t gen8_oa_enable +ffffffff81bc74f0 t gen8_oa_disable +ffffffff81bc75b0 t gen8_enable_metric_set +ffffffff81bc7670 t gen8_disable_metric_set +ffffffff81bc76d0 t gen8_oa_hw_tail_read +ffffffff81bc7720 t gen11_is_valid_mux_addr +ffffffff81bc77e0 t gen11_disable_metric_set +ffffffff81bc7840 t xehp_is_valid_b_counter_addr +ffffffff81bc7910 t gen12_is_valid_b_counter_addr +ffffffff81bc7960 t gen12_is_valid_mux_addr +ffffffff81bc79f0 t gen12_oa_enable +ffffffff81bc7b90 t gen12_oa_disable +ffffffff81bc7ce0 t gen12_enable_metric_set +ffffffff81bc7ed0 t gen12_disable_metric_set +ffffffff81bc8020 t gen12_oa_hw_tail_read +ffffffff81bc8080 T i915_perf_sysctl_register +ffffffff81bc80b0 T i915_perf_sysctl_unregister +ffffffff81bc80e0 T i915_perf_fini +ffffffff81bc8200 t destroy_config +ffffffff81bc8290 T i915_perf_ioctl_version +ffffffff81bc8390 t get_sseu_config +ffffffff81bc83e0 t emit_oa_config +ffffffff81bc8ab0 t i915_gem_object_lock +ffffffff81bc8cc0 t append_oa_status +ffffffff81bc8d40 t append_oa_sample +ffffffff81bc8ea0 t lrc_configure_all_contexts +ffffffff81bc9050 t oa_configure_all_contexts +ffffffff81bc9370 t gen8_modify_self +ffffffff81bc9540 t gen8_modify_context +ffffffff81bc96f0 t gen12_configure_oar_context +ffffffff81bca000 T i915_query_ioctl +ffffffff81bca100 t query_topology_info +ffffffff81bca150 t query_engine_info +ffffffff81bca390 t query_perf_config +ffffffff81bca690 t query_memregion_info +ffffffff81bca920 t query_hwconfig_blob +ffffffff81bca9a0 t query_geometry_subslices +ffffffff81bcaa30 t fill_topology_info +ffffffff81bcabd0 t query_perf_config_data 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request_alloc_slow +ffffffff81bccff0 T i915_request_create +ffffffff81bcd160 T i915_request_await_execution +ffffffff81bcd270 t __i915_request_await_execution +ffffffff81bcd3a0 t i915_request_await_external +ffffffff81bcd4e0 T i915_request_await_dma_fence +ffffffff81bcd860 T i915_request_await_deps +ffffffff81bcd8d0 T i915_request_await_object +ffffffff81bcd980 T __i915_request_commit +ffffffff81bcdc40 T __i915_request_queue_bh +ffffffff81bcdc80 T __i915_request_queue +ffffffff81bcdce0 T i915_request_add +ffffffff81bcdd90 T i915_request_wait_timeout +ffffffff81bce0b0 t request_wait_wake +ffffffff81bce0d0 T i915_request_wait +ffffffff81bce130 T i915_request_show +ffffffff81bce360 T i915_test_request_state +ffffffff81bce4b0 T i915_request_module_exit +ffffffff81bce4e0 T i915_request_module_init +ffffffff81bce570 t submit_notify +ffffffff81bce660 t semaphore_notify +ffffffff81bce6b0 t __rq_watchdog_expired +ffffffff81bce760 t __await_execution +ffffffff81bce8e0 t i915_request_await_start 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i915_sw_fence_complete +ffffffff81bd2040 t __i915_sw_fence_complete +ffffffff81bd21c0 T i915_sw_fence_await +ffffffff81bd2240 T __i915_sw_fence_init +ffffffff81bd22b0 T i915_sw_fence_reinit +ffffffff81bd22f0 T i915_sw_fence_commit +ffffffff81bd2330 T i915_sw_fence_await_sw_fence +ffffffff81bd2350 t __i915_sw_fence_await_sw_fence +ffffffff81bd2570 T i915_sw_fence_await_sw_fence_gfp +ffffffff81bd2590 T i915_sw_fence_await_dma_fence +ffffffff81bd27c0 t dma_i915_sw_fence_wake +ffffffff81bd2840 t irq_i915_sw_fence_work +ffffffff81bd2880 t timer_i915_sw_fence_wake +ffffffff81bd2960 t dma_i915_sw_fence_wake_timer +ffffffff81bd29f0 T __i915_sw_fence_await_dma_fence +ffffffff81bd2b30 t __dma_i915_sw_fence_wake +ffffffff81bd2b90 T i915_sw_fence_await_reservation +ffffffff81bd2c70 t i915_sw_fence_wake +ffffffff81bd3000 T dma_fence_work_init +ffffffff81bd3080 t fence_notify +ffffffff81bd3170 t fence_work +ffffffff81bd31d0 T dma_fence_work_chain +ffffffff81bd3220 t get_driver_name +ffffffff81bd3250 t get_timeline_name +ffffffff81bd3290 t fence_release +ffffffff81bd4000 T i915_switcheroo_register +ffffffff81bd4030 T i915_switcheroo_unregister +ffffffff81bd5000 T i915_syncmap_init +ffffffff81bd5030 T i915_syncmap_is_later +ffffffff81bd5130 T i915_syncmap_set +ffffffff81bd51e0 t __sync_set +ffffffff81bd54d0 T i915_syncmap_free +ffffffff81bd5530 t __sync_free +ffffffff81bd6000 T i915_setup_sysfs +ffffffff81bd6030 T i915_teardown_sysfs +ffffffff81bd7000 T i915_ttm_buddy_man_init +ffffffff81bd7210 T i915_ttm_buddy_man_fini +ffffffff81bd7400 T i915_ttm_buddy_man_reserve +ffffffff81bd74d0 T i915_ttm_buddy_man_visible_size +ffffffff81bd7500 T i915_ttm_buddy_man_avail +ffffffff81bd7560 t i915_ttm_buddy_man_alloc +ffffffff81bd7880 t i915_ttm_buddy_man_free +ffffffff81bd78f0 t i915_ttm_buddy_man_intersects +ffffffff81bd79a0 t i915_ttm_buddy_man_compatible +ffffffff81bd7a50 t i915_ttm_buddy_man_debug +ffffffff81bd8000 T i915_user_extensions +ffffffff81bd9000 T __i915_printk +ffffffff81bd90e0 T add_taint_for_CI +ffffffff81bd9110 T cancel_timer +ffffffff81bd9160 T set_timer_ms +ffffffff81bd9210 T i915_vtd_active +ffffffff81bda000 T intel_vgpu_detect +ffffffff81bda030 T intel_vgpu_register +ffffffff81bda090 T intel_vgpu_active +ffffffff81bda0c0 T intel_vgpu_has_full_ppgtt +ffffffff81bda100 T intel_vgpu_has_hwsp_emulation +ffffffff81bda140 T intel_vgpu_has_huge_gtt +ffffffff81bda180 T intel_vgt_deballoon +ffffffff81bda3c0 T intel_vgt_balloon +ffffffff81bdb000 T i915_vma_instance +ffffffff81bdb110 t vma_create +ffffffff81bdb5a0 T i915_vma_work +ffffffff81bdb610 T i915_vma_wait_for_bind +ffffffff81bdb690 T i915_vma_bind +ffffffff81bdb9f0 T i915_vma_pin_iomap +ffffffff81bdbbe0 T i915_vma_flush_writes +ffffffff81bdbc30 T i915_vma_unpin_iomap +ffffffff81bdbca0 T i915_vma_unpin_and_release +ffffffff81bdbd10 T i915_vma_misplaced +ffffffff81bdbe00 T __i915_vma_set_map_and_fenceable +ffffffff81bdbe90 T i915_gem_valid_gtt_space +ffffffff81bdbf20 T vma_invalidate_tlb +ffffffff81bdbf90 T i915_vma_pin_ww +ffffffff81bdc660 t i915_vma_insert +ffffffff81bdca00 T i915_ggtt_pin +ffffffff81bdcae0 t __i915_ggtt_pin +ffffffff81bdcc60 t i915_gem_object_lock +ffffffff81bdce70 T i915_ggtt_clear_scanout +ffffffff81bdcef0 T i915_vma_close +ffffffff81bdcfc0 T i915_vma_reopen +ffffffff81bdd040 T i915_vma_destroy_locked +ffffffff81bdd130 t release_references +ffffffff81bdd270 T i915_vma_destroy +ffffffff81bdd3b0 T i915_vma_parked +ffffffff81bdd680 T i915_vma_revoke_mmap +ffffffff81bdd780 T _i915_vma_move_to_active +ffffffff81bdd9d0 T __i915_vma_evict +ffffffff81bddd50 T __i915_vma_unbind +ffffffff81bdddf0 T i915_vma_unbind +ffffffff81bddf40 T i915_vma_unbind_async +ffffffff81bde0b0 t __i915_vma_unbind_async +ffffffff81bde170 T i915_vma_unbind_unlocked +ffffffff81bde280 T i915_vma_make_unshrinkable +ffffffff81bde2c0 T i915_vma_make_shrinkable +ffffffff81bde2e0 T i915_vma_make_purgeable +ffffffff81bde300 T i915_vma_module_exit +ffffffff81bde320 T i915_vma_module_init +ffffffff81bde380 t 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i915_vma_resource_unbind_work +ffffffff81be0000 T intel_clock_gating_init +ffffffff81be0020 T intel_clock_gating_hooks_init +ffffffff81be0280 t nop_init_clock_gating +ffffffff81be02b0 t pvc_init_clock_gating +ffffffff81be0430 t dg2_init_clock_gating +ffffffff81be0560 t xehpsdv_init_clock_gating +ffffffff81be0640 t adlp_init_clock_gating +ffffffff81be0740 t gen12lp_init_clock_gating +ffffffff81be0800 t icl_init_clock_gating +ffffffff81be0880 t cfl_init_clock_gating +ffffffff81be09a0 t gen9_init_clock_gating +ffffffff81be0ab0 t skl_init_clock_gating +ffffffff81be0bf0 t kbl_init_clock_gating +ffffffff81be0e00 t bxt_init_clock_gating +ffffffff81be0f60 t glk_init_clock_gating +ffffffff81be0fc0 t bdw_init_clock_gating +ffffffff81be13f0 t chv_init_clock_gating +ffffffff81be1580 t hsw_init_clock_gating +ffffffff81be1840 t ivb_init_clock_gating +ffffffff81be1a50 t g4x_disable_trickle_feed +ffffffff81be1ba0 t cpt_init_clock_gating +ffffffff81be1ee0 t vlv_init_clock_gating +ffffffff81be1ff0 t gen6_init_clock_gating +ffffffff81be21f0 t ilk_init_clock_gating +ffffffff81be23d0 t g4x_init_clock_gating +ffffffff81be2490 t i965gm_init_clock_gating +ffffffff81be2560 t i965g_init_clock_gating +ffffffff81be25e0 t gen3_init_clock_gating +ffffffff81be26e0 t i85x_init_clock_gating +ffffffff81be2780 t i830_init_clock_gating +ffffffff81be3000 T intel_platform_name +ffffffff81be3090 T intel_device_info_print +ffffffff81be3a20 T intel_device_info_runtime_init_early +ffffffff81be3ef0 T intel_device_info_runtime_init +ffffffff81be3fb0 T intel_device_info_driver_create +ffffffff81be40c0 T intel_driver_caps_print +ffffffff81be5000 T intel_memory_region_lookup +ffffffff81be50e0 T intel_memory_region_by_type +ffffffff81be51a0 T intel_memory_region_reserve +ffffffff81be51c0 T intel_memory_region_debug +ffffffff81be5220 T intel_memory_region_create +ffffffff81be5390 T intel_memory_region_set_name +ffffffff81be5410 T intel_memory_region_avail +ffffffff81be5490 T intel_memory_region_destroy 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fwtable_read8 +ffffffff81bf05d0 t fwtable_read16 +ffffffff81bf0890 t fwtable_read32 +ffffffff81bf0b40 t fwtable_read64 +ffffffff81bf0df0 t fwtable_reg_read_fw_domains +ffffffff81bf0ee0 t fwtable_write8 +ffffffff81bf1210 t fwtable_write16 +ffffffff81bf1540 t fwtable_write32 +ffffffff81bf1870 t fwtable_reg_write_fw_domains +ffffffff81bf1a10 t gen6_write8 +ffffffff81bf1bd0 t gen6_write16 +ffffffff81bf1d90 t gen6_write32 +ffffffff81bf1f50 t gen6_reg_write_fw_domains +ffffffff81bf1f80 t i915_pmic_bus_access_notifier +ffffffff81bf2000 t __fw_domain_init +ffffffff81bf2190 t fw_domains_get_with_thread_status +ffffffff81bf2380 t fw_domains_get_with_fallback +ffffffff81bf2600 t fw_domain_wait_ack_with_fallback +ffffffff81bf2890 t fw_domain_wait_ack_clear +ffffffff81bf2a70 t fw_domain_wait_ack_set +ffffffff81bf2c00 t fw_domains_get_normal +ffffffff81bf2cf0 t ___force_wake_auto +ffffffff81bf2d80 t __gen6_gt_wait_for_fifo +ffffffff81bf3000 T __intel_wakeref_get_first +ffffffff81bf30b0 T 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atom_execute_table_scratch_unlocked +ffffffff81bfd0a0 t atom_execute_table_locked +ffffffff81bfd3b0 T atom_execute_table +ffffffff81bfd460 T atom_parse +ffffffff81bfd610 T atom_destroy +ffffffff81bfd650 T atom_asic_init +ffffffff81bfd860 t get_u32 +ffffffff81bfd8c0 T atom_parse_data_header +ffffffff81bfd960 T atom_parse_cmd_header +ffffffff81bfd9e0 T atom_allocate_fb_scratch +ffffffff81bfdab0 t atom_op_move +ffffffff81bfdc80 t atom_op_and +ffffffff81bfde60 t atom_op_or +ffffffff81bfe040 t atom_op_shift_left +ffffffff81bfe220 t atom_op_shift_right +ffffffff81bfe400 t atom_op_mul +ffffffff81bfe550 t atom_op_div +ffffffff81bfe6c0 t atom_op_add +ffffffff81bfe8a0 t atom_op_sub +ffffffff81bfea80 t atom_op_setport +ffffffff81bfec00 t atom_op_setregblock +ffffffff81bfecc0 t atom_op_setfbbase +ffffffff81bfed80 t atom_op_compare +ffffffff81bfef60 t atom_op_switch +ffffffff81bff190 t atom_op_jump +ffffffff81bff400 t atom_op_test +ffffffff81bff5c0 t atom_op_delay +ffffffff81bff6a0 t atom_op_calltable +ffffffff81bff7f0 t atom_op_repeat +ffffffff81bff820 t atom_op_clear +ffffffff81bff930 t atom_op_nop +ffffffff81bff960 t atom_op_eot +ffffffff81bff990 t atom_op_mask +ffffffff81bffc40 t atom_op_postcard +ffffffff81bffcf0 t atom_op_beep +ffffffff81bffd10 t atom_op_savereg +ffffffff81bffd40 t atom_op_restorereg +ffffffff81bffd70 t atom_op_setdatablock +ffffffff81bffeb0 t atom_op_xor +ffffffff81c00090 t atom_op_shl +ffffffff81c002b0 t atom_op_shr +ffffffff81c004d0 t atom_op_debug +ffffffff81c00500 t atom_put_dst +ffffffff81c00a10 t atom_get_src_int +ffffffff81c01090 t atom_iio_execute +ffffffff81c02000 T atombios_crtc_dpms +ffffffff81c02300 T atombios_crtc_set_base +ffffffff81c02350 t dce4_crtc_do_set_base +ffffffff81c02e90 t avivo_crtc_do_set_base +ffffffff81c03730 T atombios_crtc_set_base_atomic +ffffffff81c03780 T radeon_atom_disp_eng_pll_init +ffffffff81c03860 t atombios_crtc_set_disp_eng_pll +ffffffff81c03970 t atombios_crtc_program_ss +ffffffff81c03c00 T atombios_crtc_mode_set +ffffffff81c04690 T radeon_atombios_init_crtc +ffffffff81c04780 t radeon_bo_reserve +ffffffff81c048f0 t radeon_bo_unreserve +ffffffff81c049d0 t atombios_disable_ss +ffffffff81c04ab0 t atombios_crtc_program_pll +ffffffff81c04d60 t atombios_crtc_prepare +ffffffff81c04e20 t atombios_crtc_commit +ffffffff81c04ea0 t atombios_crtc_mode_fixup +ffffffff81c05bb0 t atombios_crtc_disable +ffffffff81c05e10 t radeon_get_shared_dp_ppll +ffffffff81c05f00 t radeon_get_shared_nondp_ppll +ffffffff81c07000 T radeon_atom_copy_swap +ffffffff81c07020 T radeon_dp_aux_init +ffffffff81c07110 t radeon_dp_aux_transfer_atom +ffffffff81c072e0 T radeon_dp_getsinktype +ffffffff81c07350 T radeon_dp_getdpcd +ffffffff81c074c0 T radeon_dp_get_panel_mode +ffffffff81c075d0 T radeon_dp_set_link_config +ffffffff81c07650 t radeon_dp_get_dp_link_config +ffffffff81c077e0 T radeon_dp_mode_valid_helper +ffffffff81c07890 T radeon_dp_needs_link_train +ffffffff81c07900 T radeon_dp_set_rx_power_state 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radeon_process_i2c_ch +ffffffff81c0e310 T radeon_atom_hw_i2c_func +ffffffff81c0f000 T btc_get_max_clock_from_voltage_dependency_table +ffffffff81c0f0d0 T btc_apply_voltage_dependency_rules +ffffffff81c0f140 T btc_skip_blacklist_clocks +ffffffff81c0f230 T btc_adjust_clock_combinations +ffffffff81c0f360 T btc_apply_voltage_delta_rules +ffffffff81c0f480 T btc_program_mgcg_hw_sequence +ffffffff81c0f580 T btc_dpm_enabled +ffffffff81c0f590 T btc_notify_uvd_to_smc +ffffffff81c0f600 T btc_reset_to_default +ffffffff81c0f650 T btc_read_arb_registers +ffffffff81c0f6e0 T btc_dpm_vblank_too_short +ffffffff81c0f750 T btc_dpm_pre_set_power_state +ffffffff81c10970 T btc_dpm_set_power_state +ffffffff81c10ca0 t btc_set_power_state_conditionally_enable_ulv +ffffffff81c10dd0 T btc_dpm_post_set_power_state +ffffffff81c10ef0 t btc_update_current_ps +ffffffff81c10ff0 T btc_dpm_enable +ffffffff81c11ed0 t btc_cg_clock_gating_enable +ffffffff81c12000 t btc_mg_clock_gating_enable +ffffffff81c12120 t btc_ls_clock_gating_enable +ffffffff81c12250 t btc_init_stutter_mode +ffffffff81c122d0 T btc_dpm_disable +ffffffff81c125b0 T btc_dpm_setup_asic +ffffffff81c12690 T btc_dpm_init +ffffffff81c12a80 T btc_dpm_fini +ffffffff81c12b30 T btc_dpm_debugfs_print_current_performance_level +ffffffff81c12b80 T btc_dpm_get_current_sclk +ffffffff81c12c00 T btc_dpm_get_current_mclk +ffffffff81c12c80 T btc_dpm_get_sclk +ffffffff81c12cd0 T btc_dpm_get_mclk +ffffffff81c13000 T ci_dpm_powergate_uvd +ffffffff81c13380 T ci_dpm_vblank_too_short +ffffffff81c13410 T ci_fan_ctrl_get_fan_speed_percent +ffffffff81c134b0 T ci_fan_ctrl_set_fan_speed_percent +ffffffff81c13580 T ci_fan_ctrl_set_mode +ffffffff81c13720 t ci_fan_ctrl_set_static_mode +ffffffff81c137e0 t ci_thermal_start_smc_fan_control +ffffffff81c13a20 T ci_fan_ctrl_get_mode +ffffffff81c13a80 T ci_dpm_force_performance_level +ffffffff81c14310 t ci_upload_dpm_level_enable_mask +ffffffff81c14640 T ci_dpm_pre_set_power_state +ffffffff81c14930 T ci_dpm_post_set_power_state +ffffffff81c14a00 T ci_dpm_setup_asic +ffffffff81c14c00 T ci_dpm_enable +ffffffff81c164d0 t ci_init_smc_table +ffffffff81c173c0 t ci_init_arb_table_index +ffffffff81c17450 t ci_populate_initial_mc_reg_table +ffffffff81c17690 t ci_populate_pm_base +ffffffff81c17a00 t ci_dpm_start_smc +ffffffff81c17a80 t ci_enable_vr_hot_gpio_interrupt +ffffffff81c17b20 t ci_notify_smc_display_change +ffffffff81c17bf0 t ci_enable_sclk_control +ffffffff81c17c20 t ci_enable_ulv +ffffffff81c17d70 t ci_enable_ds_master_switch +ffffffff81c17f60 t ci_start_dpm +ffffffff81c18150 t ci_enable_didt +ffffffff81c18400 t ci_enable_smc_cac +ffffffff81c18590 t ci_enable_power_containment +ffffffff81c18a10 t ci_power_control_set_level +ffffffff81c18b20 t ci_enable_auto_throttle_source +ffffffff81c18c00 t ci_enable_thermal_based_sclk_dpm +ffffffff81c18d50 t ci_thermal_start_thermal_controller +ffffffff81c19050 T ci_dpm_late_enable +ffffffff81c190f0 T ci_dpm_disable +ffffffff81c197e0 T ci_dpm_set_power_state +ffffffff81c1a450 t ci_update_sclk_t +ffffffff81c1a4c0 t ci_update_and_upload_mc_reg_table +ffffffff81c1a670 t ci_unfreeze_sclk_mclk_dpm +ffffffff81c1a820 t ci_notify_link_speed_change_after_state_change +ffffffff81c1a950 T ci_dpm_display_configuration_changed +ffffffff81c1aae0 T ci_dpm_fini +ffffffff81c1ab90 T ci_dpm_init +ffffffff81c1b9f0 t ci_initialize_powertune_defaults +ffffffff81c1bae0 t ci_get_leakage_voltages +ffffffff81c1bc90 t ci_patch_dependency_tables_with_leakage +ffffffff81c1c300 t ci_set_private_data_variables_based_on_pptable +ffffffff81c1c410 T ci_dpm_debugfs_print_current_performance_level +ffffffff81c1c550 T ci_dpm_print_power_state +ffffffff81c1c610 T ci_dpm_get_current_sclk +ffffffff81c1c6e0 T ci_dpm_get_current_mclk +ffffffff81c1c7b0 T ci_dpm_get_sclk +ffffffff81c1c800 T ci_dpm_get_mclk +ffffffff81c1c850 t ci_set_valid_flag +ffffffff81c1c8f0 t ci_populate_all_graphic_levels +ffffffff81c1ce80 t ci_populate_all_memory_levels +ffffffff81c1d780 t ci_populate_smc_vce_level +ffffffff81c1d8a0 t ci_populate_smc_acp_level +ffffffff81c1d9a0 t ci_populate_smc_samu_level +ffffffff81c1daa0 t ci_do_program_memory_timing_parameters +ffffffff81c1dcc0 t ci_populate_smc_uvd_level +ffffffff81c1de10 t ci_populate_smc_initial_state +ffffffff81c1deb0 t ci_populate_bapm_parameters_in_dpm_table +ffffffff81c1e040 t ci_populate_smc_voltage_table +ffffffff81c1e160 t ci_min_max_v_gnbl_pm_lid_from_bapm_vddc +ffffffff81c1e3c0 t ci_enable_sclk_mclk_dpm +ffffffff81c1e730 t ci_thermal_enable_alert +ffffffff81c1e8e0 t ci_enable_vce_dpm +ffffffff81c1f000 T ci_copy_bytes_to_smc +ffffffff81c1f240 T ci_start_smc +ffffffff81c1f280 T ci_reset_smc +ffffffff81c1f2c0 T ci_program_jump_on_start +ffffffff81c1f2f0 T ci_stop_smc_clock +ffffffff81c1f330 T ci_start_smc_clock +ffffffff81c1f370 T ci_is_smc_running +ffffffff81c1f3e0 T ci_load_smc_ucode +ffffffff81c1f570 T ci_read_smc_sram_dword +ffffffff81c1f640 T ci_write_smc_sram_dword +ffffffff81c20000 T cik_get_allowed_info_register +ffffffff81c200a0 T cik_didt_rreg +ffffffff81c20140 T cik_didt_wreg +ffffffff81c201c0 T ci_get_temp +ffffffff81c20210 T kv_get_temp +ffffffff81c20260 T cik_pciep_rreg +ffffffff81c202e0 T cik_pciep_wreg +ffffffff81c20350 T cik_get_xclk +ffffffff81c203c0 T cik_mm_rdoorbell +ffffffff81c20420 T cik_mm_wdoorbell +ffffffff81c20470 T ci_mc_load_microcode +ffffffff81c207b0 T cik_ring_test +ffffffff81c20a50 T cik_fence_gfx_ring_emit +ffffffff81c20e40 T cik_fence_compute_ring_emit +ffffffff81c210c0 T cik_semaphore_ring_emit +ffffffff81c21280 T cik_copy_cpdma +ffffffff81c216d0 T cik_ring_ib_execute +ffffffff81c21c70 T cik_ib_test +ffffffff81c21f50 T cik_gfx_get_rptr +ffffffff81c21fb0 T cik_gfx_get_wptr +ffffffff81c21ff0 T cik_gfx_set_wptr +ffffffff81c22030 T cik_compute_get_rptr +ffffffff81c22110 T cik_compute_get_wptr +ffffffff81c221f0 T cik_compute_set_wptr +ffffffff81c22270 T cik_gpu_check_soft_reset +ffffffff81c223e0 T cik_asic_reset +ffffffff81c227f0 t cik_gpu_pci_config_reset +ffffffff81c23000 T cik_gfx_is_lockup +ffffffff81c23070 T cik_pcie_gart_tlb_flush +ffffffff81c230c0 T cik_ib_parse +ffffffff81c230f0 T cik_vm_init +ffffffff81c23150 T cik_vm_fini +ffffffff81c23180 T cik_vm_flush +ffffffff81c23df0 T cik_enter_rlc_safe_mode +ffffffff81c23ee0 T cik_exit_rlc_safe_mode +ffffffff81c23f20 T cik_update_cg +ffffffff81c24420 t cik_enable_mgcg +ffffffff81c24940 t cik_enable_cgcg +ffffffff81c24cb0 T cik_init_cp_pg_table +ffffffff81c24f20 T cik_get_csb_size +ffffffff81c24fb0 T cik_get_csb_buffer +ffffffff81c25140 T cik_irq_set +ffffffff81c25ec0 t cik_disable_interrupt_state +ffffffff81c26380 T cik_irq_process +ffffffff81c27b50 t cik_irq_ack +ffffffff81c284d0 T cik_resume +ffffffff81c28560 t cik_init_golden_registers +ffffffff81c28720 t cik_startup +ffffffff81c2b4f0 T cik_suspend +ffffffff81c2b8e0 T cik_init +ffffffff81c2be00 t cik_init_microcode +ffffffff81c2cb50 t cik_uvd_init +ffffffff81c2cc00 t cik_vce_init +ffffffff81c2ccd0 t cik_cp_fini +ffffffff81c2cd50 t cik_irq_fini +ffffffff81c2ce60 t cik_mec_fini +ffffffff81c2cf10 t cik_pcie_gart_fini +ffffffff81c2d010 T cik_fini +ffffffff81c2d330 T dce8_program_fmt +ffffffff81c2d460 T dce8_bandwidth_update +ffffffff81c2e070 T cik_get_gpu_clock_counter +ffffffff81c2e130 T cik_set_uvd_clocks +ffffffff81c2e1b0 t cik_set_uvd_clock +ffffffff81c2e320 T cik_set_vce_clocks +ffffffff81c2e560 t cik_wait_for_rlc_serdes +ffffffff81c2e720 t cik_mec_init +ffffffff81c2e900 t cik_uvd_start +ffffffff81c2e9e0 t cik_vce_start +ffffffff81c2eaf0 t cik_irq_init +ffffffff81c2f670 t cik_cp_resume +ffffffff81c30e10 t cik_uvd_resume +ffffffff81c30ee0 t cik_vce_resume +ffffffff81c30fd0 t pcie_capability_set_word +ffffffff81c310e0 t pcie_capability_read_word +ffffffff81c31180 t pcie_capability_clear_and_set_word +ffffffff81c312a0 t pcie_capability_write_word +ffffffff81c31360 t cik_get_cu_active_bitmap +ffffffff81c314e0 t radeon_bo_reserve +ffffffff81c31650 t radeon_bo_unreserve +ffffffff81c31730 t cik_update_gfx_pg +ffffffff81c318d0 t cik_compute_stop +ffffffff81c31a40 t cik_cp_compute_fini +ffffffff81c31be0 t request_firmware +ffffffff81c31c70 t release_firmware +ffffffff81c31cb0 t dce8_latency_watermark +ffffffff81c32000 T cik_sdma_get_rptr +ffffffff81c32070 T cik_sdma_get_wptr +ffffffff81c320c0 T cik_sdma_set_wptr +ffffffff81c32110 T cik_sdma_ring_ib_execute +ffffffff81c32510 T cik_sdma_fence_ring_emit +ffffffff81c326e0 t cik_sdma_hdp_flush_ring_emit +ffffffff81c32910 T cik_sdma_semaphore_ring_emit +ffffffff81c32a30 T cik_sdma_enable +ffffffff81c32c10 T cik_sdma_resume +ffffffff81c330f0 T cik_sdma_fini +ffffffff81c33130 T cik_copy_dma +ffffffff81c33530 T cik_sdma_ring_test +ffffffff81c337e0 T cik_sdma_ib_test +ffffffff81c33a40 T cik_sdma_is_lockup +ffffffff81c33ac0 T cik_sdma_vm_copy_pages +ffffffff81c33bd0 T cik_sdma_vm_write_pages +ffffffff81c33d40 T cik_sdma_vm_set_pages +ffffffff81c33ec0 T cik_sdma_vm_pad_ib +ffffffff81c33f10 T cik_dma_vm_flush +ffffffff81c35000 T cypress_enable_spread_spectrum +ffffffff81c35140 T cypress_start_dpm +ffffffff81c35190 T cypress_enable_sclk_control +ffffffff81c351f0 T cypress_enable_mclk_control +ffffffff81c35250 T cypress_notify_smc_display_change +ffffffff81c352a0 T cypress_program_response_times +ffffffff81c35360 T cypress_advertise_gen2_capability +ffffffff81c35430 T cypress_notify_link_speed_change_after_state_change +ffffffff81c354f0 T cypress_notify_link_speed_change_before_state_change +ffffffff81c355b0 T cypress_get_strobe_mode_settings +ffffffff81c356b0 T cypress_get_mclk_frequency_ratio +ffffffff81c35760 T cypress_map_clkf_to_ibias +ffffffff81c35820 T cypress_convert_power_level_to_smc +ffffffff81c35bf0 t cypress_populate_mclk_value +ffffffff81c36000 T cypress_upload_sw_state +ffffffff81c36180 T cypress_upload_mc_reg_table +ffffffff81c36240 t cypress_convert_mc_reg_table_to_smc +ffffffff81c364d0 T cypress_calculate_burst_time +ffffffff81c36560 T cypress_program_memory_timing_parameters +ffffffff81c36700 T cypress_populate_smc_initial_state +ffffffff81c36ab0 T cypress_populate_smc_acpi_state +ffffffff81c36e30 T cypress_construct_voltage_tables +ffffffff81c36fc0 T cypress_populate_smc_voltage_tables +ffffffff81c370f0 T cypress_get_mvdd_configuration +ffffffff81c371c0 T cypress_populate_mc_reg_table +ffffffff81c37410 T cypress_get_table_locations +ffffffff81c374f0 T cypress_enable_display_gap +ffffffff81c37550 T cypress_dpm_setup_asic +ffffffff81c37640 T cypress_dpm_enable +ffffffff81c38110 t cypress_force_mc_use_s1 +ffffffff81c38390 t cypress_gfx_clock_gating_enable +ffffffff81c386a0 t cypress_mg_clock_gating_enable +ffffffff81c38920 T cypress_dpm_disable +ffffffff81c38b50 T cypress_dpm_set_power_state +ffffffff81c38d90 T cypress_dpm_display_configuration_changed +ffffffff81c38e70 T cypress_dpm_init +ffffffff81c390e0 T cypress_dpm_fini +ffffffff81c39170 T cypress_dpm_vblank_too_short +ffffffff81c391e0 t cypress_wait_for_mc_sequencer +ffffffff81c3a000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81c3a070 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81c3a0e0 T dce3_2_afmt_write_sad_regs +ffffffff81c3a1e0 T dce3_2_audio_set_dto +ffffffff81c3a320 T dce3_2_hdmi_update_acr +ffffffff81c3a680 T dce3_2_set_audio_packet +ffffffff81c3a810 T dce3_2_set_mute +ffffffff81c3b000 T dce6_endpoint_rreg +ffffffff81c3b0e0 T dce6_endpoint_wreg +ffffffff81c3b1d0 T dce6_audio_get_pin +ffffffff81c3b360 T dce6_afmt_select_pin +ffffffff81c3b3f0 T dce6_afmt_write_latency_fields +ffffffff81c3b4b0 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81c3b580 T dce6_afmt_dp_write_speaker_allocation +ffffffff81c3b650 T dce6_afmt_write_sad_regs +ffffffff81c3b790 T dce6_audio_enable +ffffffff81c3b7e0 T dce6_hdmi_audio_set_dto +ffffffff81c3b850 T dce6_dp_audio_set_dto +ffffffff81c3c000 T eg_cg_rreg +ffffffff81c3c080 T eg_cg_wreg +ffffffff81c3c0f0 T eg_pif_phy0_rreg +ffffffff81c3c170 T eg_pif_phy0_wreg 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evergreen_get_number_of_dram_channels +ffffffff81c3de10 T evergreen_bandwidth_update +ffffffff81c3dfd0 t evergreen_line_buffer_adjust +ffffffff81c3e1c0 t evergreen_program_watermarks +ffffffff81c3ec20 T evergreen_mc_wait_for_idle +ffffffff81c3ecc0 T evergreen_pcie_gart_tlb_flush +ffffffff81c3ed90 T evergreen_mc_stop +ffffffff81c3f890 T evergreen_mc_resume +ffffffff81c3ffa0 T evergreen_mc_program +ffffffff81c403a0 T evergreen_ring_ib_execute +ffffffff81c40830 T evergreen_mc_init +ffffffff81c40970 T evergreen_print_gpu_status_regs +ffffffff81c409a0 T evergreen_is_display_hung +ffffffff81c40ba0 T evergreen_gpu_check_soft_reset +ffffffff81c40d00 T evergreen_gpu_pci_config_reset +ffffffff81c40e80 T evergreen_asic_reset +ffffffff81c411a0 T evergreen_gfx_is_lockup +ffffffff81c41210 T sumo_rlc_fini +ffffffff81c413c0 t radeon_bo_reserve +ffffffff81c41530 t radeon_bo_unreserve +ffffffff81c41610 T sumo_rlc_init +ffffffff81c41de0 T evergreen_rlc_resume +ffffffff81c42150 T evergreen_get_vblank_counter +ffffffff81c421c0 T evergreen_disable_interrupt_state +ffffffff81c42490 T evergreen_irq_set +ffffffff81c42a50 T evergreen_irq_suspend +ffffffff81c42aa0 T evergreen_irq_process +ffffffff81c435f0 t evergreen_irq_ack +ffffffff81c43cb0 T evergreen_resume +ffffffff81c43d90 t evergreen_init_golden_registers +ffffffff81c43fa0 t evergreen_startup +ffffffff81c45830 T evergreen_suspend +ffffffff81c459d0 T evergreen_init +ffffffff81c45dd0 t evergreen_pcie_gart_fini +ffffffff81c45ef0 T evergreen_fini +ffffffff81c460e0 T evergreen_pcie_gen2_enable +ffffffff81c46310 T evergreen_program_aspm +ffffffff81c469a0 t evergreen_latency_watermark +ffffffff81c46ba0 t evergreen_uvd_start +ffffffff81c46c50 t evergreen_cp_load_microcode +ffffffff81c46db0 t evergreen_cp_resume +ffffffff81c47a20 t evergreen_uvd_resume +ffffffff81c48000 T evergreen_cs_parse +ffffffff81c4a760 T evergreen_dma_cs_parse +ffffffff81c4b8d0 T evergreen_ib_parse +ffffffff81c4bd30 T evergreen_dma_ib_parse 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+ffffffff81c51a20 T dce4_set_audio_packet +ffffffff81c51c30 T dce4_set_mute +ffffffff81c51d40 T evergreen_hdmi_enable +ffffffff81c52070 T evergreen_dp_enable +ffffffff81c53000 T kv_dpm_enable_bapm +ffffffff81c53070 T kv_dpm_enable +ffffffff81c53f70 t kv_populate_vce_table +ffffffff81c541f0 t kv_populate_samu_table +ffffffff81c54450 t kv_populate_acp_table +ffffffff81c545e0 t kv_start_am +ffffffff81c54620 t kv_enable_auto_thermal_throttling +ffffffff81c54660 t kv_enable_dpm_voltage_scaling +ffffffff81c546a0 t kv_set_dpm_interval +ffffffff81c546e0 t kv_start_dpm +ffffffff81c54720 t kv_enable_didt +ffffffff81c549d0 T kv_dpm_late_enable +ffffffff81c54bd0 T kv_dpm_powergate_uvd +ffffffff81c54d50 T kv_dpm_disable +ffffffff81c550c0 T kv_dpm_force_performance_level +ffffffff81c55240 t kv_force_dpm_lowest +ffffffff81c55310 T kv_dpm_pre_set_power_state +ffffffff81c55890 T kv_dpm_set_power_state +ffffffff81c56060 t kv_set_valid_clock_range +ffffffff81c56200 t kv_calculate_ds_divider +ffffffff81c56370 t kv_calculate_nbps_level_settings +ffffffff81c564f0 t kv_update_vce_dpm +ffffffff81c566d0 T kv_dpm_post_set_power_state +ffffffff81c56770 T kv_dpm_setup_asic +ffffffff81c567d0 T kv_dpm_init +ffffffff81c57080 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c570f0 T kv_dpm_get_current_sclk +ffffffff81c57160 T kv_dpm_get_current_mclk +ffffffff81c57190 T kv_dpm_print_power_state +ffffffff81c57230 T kv_dpm_fini +ffffffff81c572d0 T kv_dpm_display_configuration_changed +ffffffff81c57300 T kv_dpm_get_sclk +ffffffff81c57350 T kv_dpm_get_mclk +ffffffff81c58000 T kv_notify_message_to_smu +ffffffff81c580c0 T kv_dpm_get_enable_mask +ffffffff81c58190 T kv_send_msg_to_smc_with_parameter +ffffffff81c58260 T kv_read_smc_sram_dword +ffffffff81c582f0 T kv_smc_dpm_enable +ffffffff81c58420 T kv_smc_bapm_enable +ffffffff81c58550 T kv_copy_bytes_to_smc +ffffffff81c59000 T tn_smc_rreg +ffffffff81c59080 T tn_smc_wreg +ffffffff81c590f0 T ni_mc_load_microcode +ffffffff81c592e0 T ni_init_microcode +ffffffff81c597b0 t request_firmware +ffffffff81c59840 t release_firmware +ffffffff81c59880 T cayman_get_allowed_info_register +ffffffff81c59910 T tn_get_temp +ffffffff81c599a0 T cayman_pcie_gart_tlb_flush +ffffffff81c599f0 T cayman_cp_int_cntl_setup +ffffffff81c59a40 T cayman_fence_ring_emit +ffffffff81c59dd0 T cayman_ring_ib_execute +ffffffff81c5a230 T cayman_gfx_get_rptr +ffffffff81c5a2c0 T cayman_gfx_get_wptr +ffffffff81c5a330 T cayman_gfx_set_wptr +ffffffff81c5a3b0 T cayman_gpu_check_soft_reset +ffffffff81c5a540 T cayman_asic_reset +ffffffff81c5a840 T cayman_gfx_is_lockup +ffffffff81c5a8b0 T cayman_resume +ffffffff81c5a940 t ni_init_golden_registers +ffffffff81c5aa20 t cayman_startup +ffffffff81c5be60 T cayman_suspend +ffffffff81c5c050 T cayman_init +ffffffff81c5c3c0 t cayman_uvd_init +ffffffff81c5c470 t cayman_vce_init +ffffffff81c5c540 t cayman_cp_fini +ffffffff81c5c5c0 t cayman_pcie_gart_fini +ffffffff81c5c700 T cayman_fini +ffffffff81c5c980 T cayman_vm_init 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ni_dpm_vblank_too_short +ffffffff81c610d0 T ni_dpm_force_performance_level +ffffffff81c61220 T ni_copy_and_switch_arb_sets +ffffffff81c614f0 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c61570 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c615f0 T ni_dpm_setup_asic +ffffffff81c61800 T ni_update_current_ps +ffffffff81c618c0 T ni_update_requested_ps +ffffffff81c61980 T ni_dpm_enable +ffffffff81c627e0 t ni_init_smc_table +ffffffff81c63190 t ni_init_smc_spll_table +ffffffff81c63300 t ni_init_arb_table_index +ffffffff81c633a0 t ni_populate_mc_reg_table +ffffffff81c636e0 t ni_initialize_smc_cac_tables +ffffffff81c64960 t ni_initialize_hardware_cac_manager +ffffffff81c64e90 t ni_populate_smc_tdp_limits +ffffffff81c65040 t ni_program_response_times +ffffffff81c65150 T ni_dpm_disable +ffffffff81c65510 t ni_enable_power_containment +ffffffff81c655d0 t ni_enable_smc_cac +ffffffff81c656f0 T ni_dpm_pre_set_power_state +ffffffff81c65cd0 T ni_dpm_set_power_state +ffffffff81c65fc0 t ni_upload_sw_state +ffffffff81c66bb0 t ni_upload_mc_reg_table +ffffffff81c66d60 t ni_power_control_set_level +ffffffff81c66e30 T ni_dpm_post_set_power_state +ffffffff81c66f00 T ni_dpm_init +ffffffff81c678a0 T ni_dpm_fini +ffffffff81c67950 T ni_dpm_print_power_state +ffffffff81c67a20 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c67a60 T ni_dpm_get_current_sclk +ffffffff81c67ad0 T ni_dpm_get_current_mclk +ffffffff81c67b40 T ni_dpm_get_sclk +ffffffff81c67ba0 T ni_dpm_get_mclk +ffffffff81c67c00 t ni_do_program_memory_timing_parameters +ffffffff81c67d40 t ni_calculate_sclk_params +ffffffff81c67f70 t ni_calculate_power_boost_limit +ffffffff81c68130 t ni_populate_mclk_value +ffffffff81c69000 T r100_wait_for_vblank +ffffffff81c69190 T r100_page_flip +ffffffff81c69450 T r100_page_flip_pending +ffffffff81c69500 T r100_pm_get_dynpm_state +ffffffff81c69720 T r100_pm_init_profile +ffffffff81c69800 T r100_pm_misc +ffffffff81c69c40 T r100_pm_prepare +ffffffff81c69cf0 T r100_pm_finish +ffffffff81c69da0 T r100_gui_idle +ffffffff81c69de0 T r100_hpd_sense +ffffffff81c69e40 T r100_hpd_set_polarity +ffffffff81c69f00 T r100_hpd_init +ffffffff81c69fa0 T r100_hpd_fini +ffffffff81c6a010 T r100_pci_gart_tlb_flush +ffffffff81c6a040 T r100_pci_gart_init +ffffffff81c6a110 T r100_pci_gart_get_page_entry +ffffffff81c6a140 T r100_pci_gart_set_page +ffffffff81c6a180 T r100_pci_gart_enable +ffffffff81c6a270 T r100_pci_gart_disable +ffffffff81c6a2f0 T r100_pci_gart_fini +ffffffff81c6a370 T r100_irq_set +ffffffff81c6a450 T r100_irq_disable +ffffffff81c6a4c0 T r100_irq_process +ffffffff81c6a7c0 T r100_get_vblank_counter +ffffffff81c6a810 T r100_fence_ring_emit +ffffffff81c6ac70 T r100_semaphore_ring_emit +ffffffff81c6aca0 T r100_copy_blit +ffffffff81c6b330 T r100_ring_start +ffffffff81c6b420 T r100_gfx_get_rptr +ffffffff81c6b480 T r100_gfx_get_wptr +ffffffff81c6b4c0 T r100_gfx_set_wptr +ffffffff81c6b500 T r100_cp_init +ffffffff81c6ba30 T r100_debugfs_cp_init +ffffffff81c6ba60 T r100_cp_fini +ffffffff81c6bb00 T r100_cp_disable +ffffffff81c6bc40 T r100_gui_wait_for_idle +ffffffff81c6bd30 T r100_reloc_pitch_offset +ffffffff81c6be70 T r100_packet3_load_vbpntr +ffffffff81c6c110 T r100_cs_parse_packet0 +ffffffff81c6c220 T r100_cs_packet_parse_vline +ffffffff81c6c430 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c6c4b0 T r100_cs_parse +ffffffff81c6d6a0 T r100_cs_track_clear +ffffffff81c6da30 T r100_cs_track_check +ffffffff81c6e240 T r100_mc_wait_for_idle +ffffffff81c6e2e0 T r100_gpu_is_lockup +ffffffff81c6e340 T r100_enable_bm +ffffffff81c6e390 T r100_bm_disable +ffffffff81c6e440 T r100_asic_reset +ffffffff81c6e770 T r100_mc_stop +ffffffff81c6e930 T r100_mc_resume +ffffffff81c6e9f0 T r100_set_common_regs +ffffffff81c6eb90 T r100_vram_init_sizes +ffffffff81c6ed80 T r100_vga_set_state +ffffffff81c6ede0 T r100_pll_errata_after_index +ffffffff81c6ee20 T r100_pll_rreg +ffffffff81c6ef50 T r100_pll_wreg +ffffffff81c6f060 T r100_debugfs_rbbm_init +ffffffff81c6f090 T r100_debugfs_mc_info_init +ffffffff81c6f0c0 T r100_set_surface_reg +ffffffff81c6f2d0 T r100_clear_surface_reg +ffffffff81c6f380 T r100_bandwidth_update +ffffffff81c6fdd0 T r100_ring_test +ffffffff81c70080 T r100_ring_ib_execute +ffffffff81c702e0 T r100_ib_test +ffffffff81c70620 T r100_vga_render_disable +ffffffff81c70680 T r100_resume +ffffffff81c70870 t r100_startup +ffffffff81c70db0 T r100_suspend +ffffffff81c70e90 T r100_fini +ffffffff81c70fa0 T r100_restore_sanity +ffffffff81c71040 T r100_init +ffffffff81c71490 t r100_set_safe_registers +ffffffff81c71510 T r100_mm_rreg_slow +ffffffff81c71590 T r100_mm_wreg_slow +ffffffff81c715f0 T r100_io_rreg +ffffffff81c71690 T r100_io_wreg +ffffffff81c71700 t r100_get_vtx_size +ffffffff81c717f0 t r100_cs_track_texture_print +ffffffff81c72000 T r200_copy_dma +ffffffff81c72470 T r200_packet0_check +ffffffff81c73240 t r200_get_vtx_size_0 +ffffffff81c73400 t r200_get_vtx_size_1 +ffffffff81c73490 T r200_set_safe_registers +ffffffff81c74000 T rv370_pcie_rreg +ffffffff81c74080 T rv370_pcie_wreg +ffffffff81c740f0 T rv370_pcie_gart_tlb_flush +ffffffff81c742f0 T rv370_pcie_gart_get_page_entry +ffffffff81c74350 T rv370_pcie_gart_set_page +ffffffff81c74390 T rv370_pcie_gart_init +ffffffff81c74460 T rv370_pcie_gart_enable +ffffffff81c747c0 T rv370_pcie_gart_disable +ffffffff81c74940 T rv370_pcie_gart_fini +ffffffff81c74970 T r300_fence_ring_emit +ffffffff81c74ee0 T r300_ring_start +ffffffff81c75850 T r300_mc_wait_for_idle +ffffffff81c758f0 T r300_asic_reset +ffffffff81c75b10 T r300_mc_init +ffffffff81c75bc0 T rv370_set_pcie_lanes +ffffffff81c75d80 T rv370_get_pcie_lanes +ffffffff81c75e30 T r300_cs_parse +ffffffff81c761a0 t r300_packet0_check +ffffffff81c77060 T r300_set_reg_safe +ffffffff81c770a0 T r300_mc_program +ffffffff81c77230 T r300_clock_startup +ffffffff81c772c0 T r300_resume +ffffffff81c77490 t r300_startup +ffffffff81c777f0 T r300_suspend +ffffffff81c77870 T r300_fini +ffffffff81c77950 T r300_init +ffffffff81c78000 T r420_pm_init_profile +ffffffff81c780f0 T r420_pipes_init +ffffffff81c782d0 T r420_mc_rreg +ffffffff81c78350 T r420_mc_wreg +ffffffff81c783c0 T r420_resume +ffffffff81c78590 t r420_startup +ffffffff81c78790 T r420_suspend +ffffffff81c78930 T r420_fini +ffffffff81c78a10 T r420_init +ffffffff81c78c90 T r420_debugfs_pipes_info_init +ffffffff81c78cc0 t r420_cp_errata_init +ffffffff81c79000 T r520_mc_wait_for_idle +ffffffff81c790a0 T r520_resume +ffffffff81c79190 t r520_startup +ffffffff81c79580 T r520_init +ffffffff81c7a000 T r600_rcu_rreg +ffffffff81c7a080 T r600_rcu_wreg +ffffffff81c7a0f0 T r600_uvd_ctx_rreg +ffffffff81c7a170 T r600_uvd_ctx_wreg +ffffffff81c7a1e0 T r600_get_allowed_info_register +ffffffff81c7a260 T r600_get_xclk +ffffffff81c7a290 T r600_set_uvd_clocks +ffffffff81c7a7f0 T dce3_program_fmt +ffffffff81c7a910 T rv6xx_get_temp +ffffffff81c7a960 T r600_pm_get_dynpm_state +ffffffff81c7ad70 T rs780_pm_init_profile +ffffffff81c7ae80 T r600_pm_init_profile +ffffffff81c7b120 T r600_pm_misc +ffffffff81c7b200 T r600_gui_idle +ffffffff81c7b240 T r600_hpd_sense +ffffffff81c7b360 T r600_hpd_set_polarity +ffffffff81c7b5e0 T r600_hpd_init +ffffffff81c7b7c0 T r600_hpd_fini +ffffffff81c7b970 T r600_pcie_gart_tlb_flush +ffffffff81c7baa0 T r600_pcie_gart_init +ffffffff81c7bb40 T r600_mc_wait_for_idle +ffffffff81c7bbe0 T rs780_mc_rreg +ffffffff81c7bc80 T rs780_mc_wreg +ffffffff81c7bd10 T r600_vram_scratch_init +ffffffff81c7be10 t radeon_bo_reserve +ffffffff81c7bf80 t radeon_bo_unreserve +ffffffff81c7c060 T r600_vram_scratch_fini +ffffffff81c7c0e0 T r600_set_bios_scratch_engine_hung +ffffffff81c7c130 T r600_gpu_check_soft_reset +ffffffff81c7c4d0 T r600_asic_reset +ffffffff81c7c860 t r600_gpu_pci_config_reset +ffffffff81c7ca70 T r600_gfx_is_lockup +ffffffff81c7cae0 T r6xx_remap_render_backend +ffffffff81c7cca0 T r600_count_pipe_bits +ffffffff81c7cd10 T r600_pciep_rreg +ffffffff81c7cd90 T r600_pciep_wreg +ffffffff81c7ce00 T r600_cp_stop +ffffffff81c7ce80 T r600_init_microcode +ffffffff81c7d340 t request_firmware +ffffffff81c7d3d0 t release_firmware +ffffffff81c7d410 T r600_gfx_get_rptr +ffffffff81c7d470 T r600_gfx_get_wptr +ffffffff81c7d4b0 T r600_gfx_set_wptr +ffffffff81c7d4f0 T r600_cp_start +ffffffff81c7d860 T r600_cp_resume +ffffffff81c7dbc0 T r600_ring_init +ffffffff81c7dc60 T r600_cp_fini +ffffffff81c7dcf0 T r600_scratch_init +ffffffff81c7dd60 T r600_ring_test +ffffffff81c7e000 T r600_fence_ring_emit +ffffffff81c7e8a0 T r600_semaphore_ring_emit +ffffffff81c7ea80 T r600_copy_cpdma +ffffffff81c7f030 T r600_set_surface_reg +ffffffff81c7f060 T r600_clear_surface_reg +ffffffff81c7f090 T r600_vga_set_state +ffffffff81c7f0f0 T r600_resume +ffffffff81c7f180 t r600_startup +ffffffff81c80e60 T r600_suspend +ffffffff81c80fd0 T r600_irq_suspend +ffffffff81c81090 t r600_pcie_gart_disable +ffffffff81c81290 T r600_init +ffffffff81c819f0 T r600_ih_ring_init +ffffffff81c81a60 T r600_irq_fini +ffffffff81c81ba0 t r600_pcie_gart_fini +ffffffff81c81bd0 T r600_fini +ffffffff81c81d60 T r600_ring_ib_execute +ffffffff81c821f0 T r600_ib_test +ffffffff81c824a0 T r600_ih_ring_alloc +ffffffff81c825c0 T r600_ih_ring_fini +ffffffff81c82650 T r600_rlc_stop +ffffffff81c827e0 T r600_disable_interrupts +ffffffff81c82890 T r600_irq_init +ffffffff81c82cf0 t r600_disable_interrupt_state +ffffffff81c82ff0 T r600_irq_disable +ffffffff81c830b0 T r600_irq_set +ffffffff81c83830 t r600_irq_ack +ffffffff81c83d60 T r600_irq_process +ffffffff81c84960 T r600_mmio_hdp_flush +ffffffff81c849e0 T r600_set_pcie_lanes +ffffffff81c84b10 T r600_get_pcie_lanes +ffffffff81c84be0 T r600_get_gpu_clock_counter +ffffffff81c84c70 t r600_cp_load_microcode +ffffffff81c84f40 t r600_uvd_resume +ffffffff81c86000 T r600_fmt_is_valid_color +ffffffff81c86040 T r600_fmt_is_valid_texture +ffffffff81c86090 T r600_fmt_get_blocksize +ffffffff81c860d0 T r600_fmt_get_nblocksx +ffffffff81c86120 T r600_fmt_get_nblocksy +ffffffff81c86180 T r600_cs_common_vline_parse +ffffffff81c86440 T r600_mip_minify +ffffffff81c864a0 T r600_cs_parse +ffffffff81c88360 T r600_dma_cs_next_reloc +ffffffff81c883e0 T r600_dma_cs_parse +ffffffff81c88a80 t r600_cs_track_check +ffffffff81c89bc0 t r600_cs_check_reg +ffffffff81c8aae0 t r600_is_safe_reg +ffffffff81c8ab80 t r600_texture_size +ffffffff81c8b000 T r600_dma_get_rptr +ffffffff81c8b060 T r600_dma_get_wptr +ffffffff81c8b0a0 T r600_dma_set_wptr +ffffffff81c8b0e0 T r600_dma_stop +ffffffff81c8b170 T r600_dma_resume +ffffffff81c8b370 T r600_dma_fini +ffffffff81c8b3f0 T r600_dma_is_lockup +ffffffff81c8b460 T r600_dma_ring_test +ffffffff81c8b6d0 T r600_dma_fence_ring_emit +ffffffff81c8b8b0 T r600_dma_semaphore_ring_emit +ffffffff81c8b9d0 T r600_dma_ib_test +ffffffff81c8bbf0 T r600_dma_ring_ib_execute +ffffffff81c8bf40 T r600_copy_dma +ffffffff81c8d000 T r600_dpm_print_class_info +ffffffff81c8d2b0 T r600_dpm_print_cap_info +ffffffff81c8d340 T r600_dpm_print_ps_status +ffffffff81c8d3d0 T r600_dpm_get_vblank_time +ffffffff81c8d490 T r600_dpm_get_vrefresh +ffffffff81c8d520 T r600_calculate_u_and_p +ffffffff81c8d5a0 T r600_calculate_at +ffffffff81c8d650 T r600_gfx_clockgating_enable +ffffffff81c8d750 T r600_dynamicpm_enable +ffffffff81c8d7a0 T r600_enable_thermal_protection +ffffffff81c8d800 T r600_enable_acpi_pm +ffffffff81c8d850 T r600_enable_dynamic_pcie_gen2 +ffffffff81c8d8a0 T r600_dynamicpm_enabled +ffffffff81c8d8e0 T r600_enable_sclk_control +ffffffff81c8d940 T r600_enable_mclk_control +ffffffff81c8d9a0 T r600_enable_spll_bypass +ffffffff81c8d9f0 T r600_wait_for_spll_change +ffffffff81c8da70 T r600_set_bsp +ffffffff81c8dab0 T r600_set_at +ffffffff81c8db10 T r600_set_tc +ffffffff81c8db70 T r600_select_td +ffffffff81c8dc20 T r600_set_vrc +ffffffff81c8dc60 T r600_set_tpu +ffffffff81c8dcc0 T r600_set_tpc +ffffffff81c8dd20 T r600_set_sstu +ffffffff81c8dd80 T r600_set_sst +ffffffff81c8ddd0 T r600_set_git +ffffffff81c8de20 T r600_set_fctu +ffffffff81c8de80 T r600_set_fct +ffffffff81c8ded0 T r600_set_ctxcgtt3d_rphc +ffffffff81c8df30 T r600_set_ctxcgtt3d_rsdc +ffffffff81c8df90 T r600_set_vddc3d_oorsu +ffffffff81c8dff0 T r600_set_vddc3d_oorphc +ffffffff81c8e050 T r600_set_vddc3d_oorsdc +ffffffff81c8e0b0 T r600_set_mpll_lock_time +ffffffff81c8e100 T r600_set_mpll_reset_time +ffffffff81c8e150 T r600_engine_clock_entry_enable +ffffffff81c8e250 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c8e350 T r600_engine_clock_entry_enable_post_divider +ffffffff81c8e450 T r600_engine_clock_entry_set_post_divider +ffffffff81c8e510 T r600_engine_clock_entry_set_reference_divider +ffffffff81c8e5d0 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c8e690 T r600_engine_clock_entry_set_step_time +ffffffff81c8e750 T r600_vid_rt_set_ssu +ffffffff81c8e7b0 T r600_vid_rt_set_vru +ffffffff81c8e810 T r600_vid_rt_set_vrt +ffffffff81c8e870 T r600_voltage_control_enable_pins +ffffffff81c8e8c0 T r600_voltage_control_program_voltages +ffffffff81c8e950 T r600_voltage_control_deactivate_static_control +ffffffff81c8e9e0 T r600_power_level_enable +ffffffff81c8ea50 T r600_power_level_set_voltage_index +ffffffff81c8eac0 T r600_power_level_set_mem_clock_index +ffffffff81c8eb20 T r600_power_level_set_eng_clock_index +ffffffff81c8eb90 T r600_power_level_set_watermark_id +ffffffff81c8ec00 T r600_power_level_set_pcie_gen2 +ffffffff81c8ec60 T r600_power_level_get_current_index +ffffffff81c8eca0 T r600_power_level_get_target_index +ffffffff81c8ece0 T r600_power_level_set_enter_index +ffffffff81c8ed40 T r600_wait_for_power_level_unequal +ffffffff81c8ee30 T r600_wait_for_power_level +ffffffff81c8ef20 T r600_start_dpm +ffffffff81c8f200 T r600_stop_dpm +ffffffff81c8f250 T r600_dpm_pre_set_power_state +ffffffff81c8f280 T r600_dpm_post_set_power_state +ffffffff81c8f2b0 T r600_is_uvd_state +ffffffff81c8f2f0 T r600_is_internal_thermal_sensor +ffffffff81c8f330 T r600_dpm_late_enable +ffffffff81c8f440 T r600_get_platform_caps +ffffffff81c8f4e0 T r600_parse_extended_power_table +ffffffff81c902a0 T r600_free_extended_power_table +ffffffff81c903a0 T r600_get_pcie_gen_support +ffffffff81c903f0 T r600_get_pcie_lane_support +ffffffff81c90450 T r600_encode_pci_lane_width +ffffffff81c91000 T r600_audio_update_hdmi +ffffffff81c91170 t r600_audio_status +ffffffff81c91290 T r600_hdmi_buffer_status_changed +ffffffff81c91330 T r600_hdmi_update_audio_settings +ffffffff81c91700 T r600_audio_enable +ffffffff81c91780 T r600_audio_get_pin +ffffffff81c917b0 T r600_hdmi_update_acr +ffffffff81c91b50 T r600_set_avi_packet +ffffffff81c91d50 T r600_hdmi_audio_workaround +ffffffff81c91e20 T r600_hdmi_audio_set_dto +ffffffff81c91ee0 T r600_set_vbi_packet +ffffffff81c91fa0 T r600_set_audio_packet +ffffffff81c92270 T r600_set_mute +ffffffff81c92380 T r600_hdmi_enable +ffffffff81c93000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c93040 T radeon_acpi_pcie_notify_device_ready +ffffffff81c93160 T radeon_acpi_pcie_performance_request +ffffffff81c934f0 T radeon_acpi_init +ffffffff81c93c60 t radeon_acpi_event +ffffffff81c93f60 T radeon_acpi_fini +ffffffff81c94000 T radeon_agp_head_init +ffffffff81c94050 T radeon_agp_init +ffffffff81c940a0 T radeon_agp_resume +ffffffff81c94130 T radeon_agp_fini +ffffffff81c94180 T radeon_agp_suspend +ffffffff81c95000 T radeon_agp_disable +ffffffff81c95120 T radeon_asic_init +ffffffff81c958f0 t radeon_invalid_rreg +ffffffff81c95930 t radeon_invalid_wreg +ffffffff81c95970 t radeon_invalid_get_allowed_info_register +ffffffff81c96000 T radeon_atombios_i2c_init +ffffffff81c963a0 T radeon_atombios_lookup_gpio +ffffffff81c964a0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c96de0 t radeon_lookup_i2c_gpio +ffffffff81c970d0 t radeon_atom_apply_quirks +ffffffff81c974f0 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81c979f0 T radeon_atom_get_clock_info +ffffffff81c97dd0 T radeon_atombios_sideport_present +ffffffff81c97e80 T radeon_atombios_get_tmds_info +ffffffff81c97fc0 T radeon_atombios_get_ppll_ss_info +ffffffff81c980e0 T radeon_atombios_get_asic_ss_info +ffffffff81c983c0 t radeon_atombios_get_igp_ss_overrides +ffffffff81c984d0 T radeon_atombios_get_lvds_info +ffffffff81c98830 T radeon_atombios_get_primary_dac_info +ffffffff81c988f0 T radeon_atom_get_tv_timings +ffffffff81c98b30 T radeon_atombios_get_tv_info +ffffffff81c98bf0 T radeon_atombios_get_tv_dac_info +ffffffff81c98cf0 T radeon_atombios_get_default_voltages +ffffffff81c98db0 T radeon_atombios_get_power_modes +ffffffff81c99e20 T radeon_atom_get_clock_dividers +ffffffff81c9a110 T radeon_atom_get_memory_pll_dividers +ffffffff81c9a250 T radeon_atom_set_clock_gating +ffffffff81c9a2a0 T radeon_atom_get_engine_clock +ffffffff81c9a2f0 T radeon_atom_get_memory_clock +ffffffff81c9a340 T radeon_atom_set_engine_clock +ffffffff81c9a390 T radeon_atom_set_memory_clock +ffffffff81c9a3f0 T radeon_atom_set_engine_dram_timings +ffffffff81c9a460 T radeon_atom_update_memory_dll +ffffffff81c9a4b0 T radeon_atom_set_ac_timing +ffffffff81c9a500 T radeon_atom_set_voltage +ffffffff81c9a5d0 T radeon_atom_get_max_vddc +ffffffff81c9a6b0 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81c9a780 T radeon_atom_get_leakage_id_from_vbios +ffffffff81c9a840 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81c9aa60 T radeon_atom_get_voltage_evv +ffffffff81c9ab20 T radeon_atom_get_voltage_gpio_settings +ffffffff81c9ac20 T radeon_atom_is_voltage_gpio +ffffffff81c9adb0 T radeon_atom_get_svi2_info +ffffffff81c9aea0 T radeon_atom_get_max_voltage +ffffffff81c9b030 T radeon_atom_get_min_voltage +ffffffff81c9b170 T radeon_atom_get_voltage_step +ffffffff81c9b270 T radeon_atom_round_to_true_voltage +ffffffff81c9b3d0 T radeon_atom_get_voltage_table +ffffffff81c9b640 T radeon_atom_get_memory_info +ffffffff81c9b7f0 T radeon_atom_get_mclk_range_table +ffffffff81c9ba30 T radeon_atom_init_mc_reg_table +ffffffff81c9bca0 T radeon_atom_initialize_bios_scratch_regs +ffffffff81c9bd70 T radeon_save_bios_scratch_regs +ffffffff81c9be50 T radeon_restore_bios_scratch_regs +ffffffff81c9bf30 T radeon_atom_output_lock +ffffffff81c9bfc0 T radeon_atombios_connected_scratch_regs +ffffffff81c9c730 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81c9c880 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81c9cab0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81c9cc90 t radeon_atombios_add_pplib_thermal_controller +ffffffff81c9d090 t radeon_atombios_parse_pplib_clock_info +ffffffff81c9d440 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81c9e000 T radeon_audio_init +ffffffff81c9e1f0 t radeon_audio_enable +ffffffff81c9e350 T radeon_audio_endpoint_rreg +ffffffff81c9e390 T radeon_audio_endpoint_wreg +ffffffff81c9e3d0 T radeon_audio_get_pin +ffffffff81c9e420 T radeon_audio_detect +ffffffff81c9e580 T radeon_audio_fini +ffffffff81c9e610 T radeon_audio_mode_set +ffffffff81c9e660 T radeon_audio_dpms +ffffffff81c9e6b0 T radeon_audio_decode_dfs_div +ffffffff81c9e710 T radeon_audio_component_init +ffffffff81c9e780 T radeon_audio_component_fini +ffffffff81c9e7d0 t radeon_audio_hdmi_mode_set +ffffffff81c9eeb0 t radeon_audio_write_speaker_allocation +ffffffff81c9ef60 t radeon_audio_write_sad_regs +ffffffff81c9f030 t radeon_audio_set_avi_packet +ffffffff81c9f170 t radeon_audio_dp_mode_set +ffffffff81c9f2f0 t radeon_audio_rreg +ffffffff81c9f340 t radeon_audio_wreg +ffffffff81ca0000 T radeon_benchmark +ffffffff81ca0940 t radeon_benchmark_move +ffffffff81ca0c20 t radeon_bo_reserve +ffffffff81ca0d90 t radeon_bo_unreserve +ffffffff81ca0e70 t radeon_benchmark_do_move +ffffffff81ca1000 T radeon_get_bios +ffffffff81ca1fc0 t igp_read_bios_from_vram +ffffffff81ca20d0 t radeon_read_bios +ffffffff81ca3000 T radeon_legacy_get_engine_clock +ffffffff81ca30d0 T radeon_legacy_get_memory_clock +ffffffff81ca31a0 T radeon_get_clock_info +ffffffff81ca3730 T radeon_legacy_set_engine_clock +ffffffff81ca3a80 T radeon_legacy_set_clock_gating +ffffffff81ca5000 T radeon_combios_check_hardcoded_edid +ffffffff81ca5100 t combios_get_table_offset +ffffffff81ca5690 T radeon_bios_get_hardcoded_edid +ffffffff81ca5710 T radeon_combios_i2c_init +ffffffff81ca5db0 t combios_setup_i2c_bus +ffffffff81ca60a0 t radeon_combios_get_i2c_info_from_table +ffffffff81ca62f0 T radeon_combios_get_clock_info +ffffffff81ca64e0 T radeon_combios_sideport_present +ffffffff81ca6560 T radeon_combios_get_primary_dac_info +ffffffff81ca66b0 T radeon_combios_get_tv_info +ffffffff81ca67b0 T radeon_combios_get_tv_dac_info +ffffffff81ca6a40 T radeon_combios_get_lvds_info +ffffffff81ca70b0 T radeon_legacy_get_tmds_info_from_table +ffffffff81ca7180 T radeon_legacy_get_tmds_info_from_combios +ffffffff81ca7390 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81ca75c0 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81ca7900 T radeon_get_legacy_connector_info_from_table +ffffffff81ca9a70 T radeon_get_legacy_connector_info_from_bios +ffffffff81caa660 T radeon_combios_get_power_modes +ffffffff81caad30 T radeon_external_tmds_setup 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radeon_scratch_free +ffffffff81cb54c0 T radeon_doorbell_get +ffffffff81cb5570 T radeon_doorbell_free +ffffffff81cb55c0 T radeon_wb_disable +ffffffff81cb55f0 T radeon_wb_fini +ffffffff81cb5690 t radeon_bo_reserve +ffffffff81cb5800 t radeon_bo_unreserve +ffffffff81cb58e0 T radeon_wb_init +ffffffff81cb5bc0 T radeon_vram_location +ffffffff81cb5ce0 T radeon_gtt_location +ffffffff81cb5e10 T radeon_device_is_virtual +ffffffff81cb5e40 T radeon_card_posted +ffffffff81cb6050 T radeon_update_bandwidth_info +ffffffff81cb60d0 T radeon_boot_test_post_card +ffffffff81cb6190 T radeon_dummy_page_init +ffffffff81cb6250 T radeon_dummy_page_fini +ffffffff81cb62b0 T radeon_atombios_init +ffffffff81cb6440 t cail_reg_read +ffffffff81cb64a0 t cail_reg_write +ffffffff81cb6500 t cail_ioreg_read +ffffffff81cb6520 t cail_ioreg_write +ffffffff81cb6540 t cail_mc_read +ffffffff81cb6570 t cail_mc_write +ffffffff81cb65a0 t cail_pll_read +ffffffff81cb65d0 t cail_pll_write +ffffffff81cb6600 T radeon_atombios_fini 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radeon_encoder_set_active_device +ffffffff81cc0440 T radeon_get_connector_for_encoder +ffffffff81cc04b0 T radeon_get_connector_for_encoder_init +ffffffff81cc0520 T radeon_get_external_encoder +ffffffff81cc05b0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81cc0650 T radeon_panel_mode_fixup +ffffffff81cc0820 T radeon_dig_monitor_is_duallink +ffffffff81cc0940 T radeon_encoder_is_digital +ffffffff81cc1000 T radeon_fbdev_setup +ffffffff81cc1150 T radeon_fbdev_set_suspend +ffffffff81cc11a0 T radeon_fbdev_robj_is_fb +ffffffff81cc1210 T radeondrm_burner +ffffffff81cc1290 T radeondrm_burner_cb +ffffffff81cc12c0 t radeon_fbdev_fb_helper_fb_probe +ffffffff81cc1800 t radeon_bo_reserve +ffffffff81cc1970 t radeon_bo_unreserve +ffffffff81cc1a50 t radeon_fbdev_client_unregister +ffffffff81cc1ab0 t radeon_fbdev_client_restore +ffffffff81cc1af0 t radeon_fbdev_client_hotplug +ffffffff81cc2000 T radeon_fence_emit +ffffffff81cc2120 T radeon_fence_process +ffffffff81cc21e0 t radeon_fence_activity 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T radeon_ib_get +ffffffff81ccb100 T radeon_ib_free +ffffffff81ccb140 T radeon_ib_schedule +ffffffff81ccb3d0 T radeon_ib_pool_init +ffffffff81ccb470 T radeon_ib_pool_fini +ffffffff81ccb4e0 T radeon_ib_ring_tests +ffffffff81ccc000 T radeon_driver_irq_handler_kms +ffffffff81ccc050 T radeon_msi_ok +ffffffff81ccc150 T radeon_irq_kms_init +ffffffff81ccc3e0 t radeon_hotplug_work_func +ffffffff81ccc490 t radeon_dp_work_func +ffffffff81ccc500 T radeon_irq_kms_fini +ffffffff81ccc6a0 T radeon_irq_kms_sw_irq_get +ffffffff81ccc740 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81ccc780 T radeon_irq_kms_sw_irq_put +ffffffff81ccc810 T radeon_irq_kms_pflip_irq_get +ffffffff81ccc8c0 T radeon_irq_kms_pflip_irq_put +ffffffff81ccc960 T radeon_irq_kms_enable_afmt +ffffffff81ccc9f0 T radeon_irq_kms_disable_afmt +ffffffff81ccca80 T radeon_irq_kms_enable_hpd +ffffffff81cccb70 T radeon_irq_kms_disable_hpd +ffffffff81cccc50 T radeon_irq_kms_set_irq_n_enabled +ffffffff81cccdc0 t __delayed_work_tick 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radeon_legacy_primary_dac_detect +ffffffff81cd3900 t radeon_legacy_tv_dac_dpms +ffffffff81cd3b10 t radeon_legacy_tv_dac_prepare +ffffffff81cd3b70 t radeon_legacy_tv_dac_commit +ffffffff81cd3bc0 t radeon_legacy_tv_dac_mode_set +ffffffff81cd3f60 t radeon_legacy_tv_dac_detect +ffffffff81cd4b60 t radeon_ext_tmds_enc_destroy +ffffffff81cd4bb0 t radeon_legacy_tmds_ext_dpms +ffffffff81cd4c80 t radeon_legacy_tmds_ext_prepare +ffffffff81cd4d50 t radeon_legacy_tmds_ext_commit +ffffffff81cd4e20 t radeon_legacy_tmds_ext_mode_set +ffffffff81cd5000 T radeon_legacy_tv_mode_set +ffffffff81cd60f0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81cd6200 T radeon_legacy_tv_adjust_pll1 +ffffffff81cd6300 T radeon_legacy_tv_adjust_pll2 +ffffffff81cd7000 T radeon_ttm_bo_is_radeon_bo +ffffffff81cd7040 t radeon_ttm_bo_destroy +ffffffff81cd7170 T radeon_ttm_placement_from_domain +ffffffff81cd72d0 T radeon_bo_create +ffffffff81cd74a0 T radeon_bo_kmap +ffffffff81cd7590 T radeon_bo_check_tiling +ffffffff81cd7670 T radeon_bo_kunmap +ffffffff81cd7700 T radeon_bo_ref +ffffffff81cd7740 T radeon_bo_unref +ffffffff81cd7790 T radeon_bo_pin_restricted +ffffffff81cd7ab0 T radeon_bo_pin +ffffffff81cd7ad0 T radeon_bo_unpin +ffffffff81cd7b40 T radeon_bo_evict_vram +ffffffff81cd7ba0 T radeon_bo_force_delete +ffffffff81cd7d00 T radeon_bo_init +ffffffff81cd7de0 T radeon_bo_fini +ffffffff81cd7e20 T radeon_bo_list_validate +ffffffff81cd8130 T radeon_bo_get_surface_reg +ffffffff81cd83b0 T radeon_bo_set_tiling_flags +ffffffff81cd86b0 T radeon_bo_get_tiling_flags +ffffffff81cd8700 T radeon_bo_move_notify +ffffffff81cd87d0 T radeon_bo_fault_reserve_notify +ffffffff81cd8a60 t ttm_bo_move_to_lru_tail_unlocked +ffffffff81cd8aa0 T radeon_bo_fence +ffffffff81cd9000 T radeon_pm_get_type_index +ffffffff81cd9080 T radeon_pm_acpi_event_handler +ffffffff81cd9160 t radeon_pm_update_profile +ffffffff81cd9280 t radeon_pm_set_clocks +ffffffff81cd9c40 T radeon_dpm_enable_uvd +ffffffff81cd9d00 T radeon_pm_compute_clocks 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radeon_ring_unlock_undo +ffffffff81cdd4c0 T radeon_ring_test_lockup +ffffffff81cdd5e0 T radeon_ring_backup +ffffffff81cdd780 T radeon_ring_restore +ffffffff81cdd930 T radeon_ring_init +ffffffff81cddb20 t radeon_bo_reserve +ffffffff81cddc90 t radeon_bo_unreserve +ffffffff81cddd70 T radeon_ring_fini +ffffffff81cde000 T radeon_sa_bo_manager_init +ffffffff81cde0d0 T radeon_sa_bo_manager_fini +ffffffff81cde100 T radeon_sa_bo_manager_start +ffffffff81cde240 t radeon_bo_reserve +ffffffff81cde3b0 t radeon_bo_unreserve +ffffffff81cde490 T radeon_sa_bo_manager_suspend +ffffffff81cde540 T radeon_sa_bo_new +ffffffff81cde5b0 T radeon_sa_bo_free +ffffffff81cdf000 T radeon_semaphore_create +ffffffff81cdf0e0 T radeon_semaphore_emit_signal +ffffffff81cdf170 T radeon_semaphore_emit_wait +ffffffff81cdf200 T radeon_semaphore_free +ffffffff81ce0000 T radeon_sync_create +ffffffff81ce0090 T radeon_sync_fence +ffffffff81ce0140 T radeon_sync_resv +ffffffff81ce0280 T radeon_sync_rings +ffffffff81ce0440 T radeon_sync_free +ffffffff81ce1000 T radeon_test_moves +ffffffff81ce1070 t radeon_do_test_moves +ffffffff81ce1680 T radeon_test_ring_sync +ffffffff81ce1950 t radeon_test_create_and_emit_fence +ffffffff81ce1ac0 T radeon_test_syncing +ffffffff81ce1d90 t radeon_test_ring_sync2 +ffffffff81ce2100 t radeon_bo_reserve +ffffffff81ce2270 t radeon_bo_unreserve +ffffffff81ce3000 T radeon_get_rdev +ffffffff81ce3030 T radeon_ttm_tt_set_userptr +ffffffff81ce3080 T radeon_ttm_tt_is_bound +ffffffff81ce30d0 T radeon_ttm_tt_has_userptr +ffffffff81ce3120 T radeon_ttm_tt_is_readonly +ffffffff81ce3170 T radeon_ttm_init +ffffffff81ce3390 T radeon_ttm_set_active_vram_size +ffffffff81ce33d0 t radeon_bo_reserve +ffffffff81ce3540 t radeon_bo_unreserve +ffffffff81ce3620 T radeon_ttm_fini +ffffffff81ce36f0 t radeon_ttm_tt_create +ffffffff81ce37d0 t radeon_ttm_tt_populate +ffffffff81ce3880 t radeon_ttm_tt_unpopulate +ffffffff81ce3970 t radeon_ttm_tt_destroy +ffffffff81ce39c0 t radeon_evict_flags +ffffffff81ce3b20 t radeon_bo_move +ffffffff81ce3f20 t radeon_ttm_io_mem_reserve +ffffffff81ce4000 T radeon_ucode_print_mc_hdr +ffffffff81ce40b0 t radeon_ucode_print_common_hdr +ffffffff81ce41e0 T radeon_ucode_print_smc_hdr +ffffffff81ce4270 T radeon_ucode_print_gfx_hdr +ffffffff81ce4340 T radeon_ucode_print_rlc_hdr +ffffffff81ce4440 T radeon_ucode_print_sdma_hdr +ffffffff81ce4520 T radeon_ucode_validate +ffffffff81ce5000 T radeon_uvd_init +ffffffff81ce54f0 t radeon_uvd_idle_work_handler +ffffffff81ce5660 t radeon_bo_reserve +ffffffff81ce5860 t radeon_bo_unreserve +ffffffff81ce5940 T radeon_uvd_fini +ffffffff81ce5a10 T radeon_uvd_suspend +ffffffff81ce5bd0 T radeon_uvd_note_usage +ffffffff81ce5e10 T radeon_uvd_get_destroy_msg +ffffffff81ce5f20 T radeon_uvd_resume +ffffffff81ce5fb0 T radeon_uvd_force_into_uvd_segment +ffffffff81ce6050 T radeon_uvd_free_handles +ffffffff81ce6210 T radeon_uvd_cs_parse +ffffffff81ce6930 T radeon_uvd_get_create_msg +ffffffff81ce6ab0 t radeon_uvd_send_msg +ffffffff81ce6c50 T radeon_uvd_calc_upll_dividers +ffffffff81ce6e20 T radeon_uvd_send_upll_ctlreq +ffffffff81ce7160 t __delayed_work_tick +ffffffff81ce8000 T radeon_vce_init +ffffffff81ce8620 t radeon_vce_idle_work_handler +ffffffff81ce86e0 t radeon_bo_reserve +ffffffff81ce8850 t radeon_bo_unreserve +ffffffff81ce8930 T radeon_vce_fini +ffffffff81ce89b0 T radeon_vce_suspend +ffffffff81ce8a90 T radeon_vce_resume +ffffffff81ce8be0 T radeon_vce_note_usage +ffffffff81ce8d00 T radeon_vce_free_handles +ffffffff81ce8dc0 T radeon_vce_get_destroy_msg +ffffffff81ce8ff0 T radeon_vce_get_create_msg +ffffffff81ce9340 T radeon_vce_cs_reloc +ffffffff81ce9440 T radeon_vce_cs_parse +ffffffff81ce9bb0 T radeon_vce_semaphore_emit +ffffffff81ce9d70 T radeon_vce_ib_execute +ffffffff81ce9f00 T radeon_vce_fence_emit +ffffffff81cea130 T radeon_vce_ring_test +ffffffff81cea280 T radeon_vce_ib_test +ffffffff81cea3a0 t __delayed_work_tick +ffffffff81ceb000 T radeon_vm_manager_init +ffffffff81ceb060 T radeon_vm_manager_fini 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+ffffffff81cee5a0 T rs400_gart_disable +ffffffff81cee600 T rs400_gart_fini +ffffffff81cee670 T rs400_gart_get_page_entry +ffffffff81cee6d0 T rs400_gart_set_page +ffffffff81cee710 T rs400_mc_wait_for_idle +ffffffff81cee7b0 T rs400_mc_rreg +ffffffff81cee840 T rs400_mc_wreg +ffffffff81cee8c0 T rs400_resume +ffffffff81cee9f0 t rs400_mc_program +ffffffff81ceeae0 t rs400_startup +ffffffff81ceecd0 T rs400_suspend +ffffffff81ceed70 T rs400_fini +ffffffff81ceee60 T rs400_init +ffffffff81cf0000 T avivo_wait_for_vblank +ffffffff81cf0280 T rs600_page_flip +ffffffff81cf0550 T rs600_page_flip_pending +ffffffff81cf05c0 T avivo_program_fmt +ffffffff81cf06e0 T rs600_pm_misc +ffffffff81cf0a20 T rs600_pm_prepare +ffffffff81cf0b20 T rs600_pm_finish +ffffffff81cf0c20 T rs600_hpd_sense +ffffffff81cf0c80 T rs600_hpd_set_polarity +ffffffff81cf0d40 T rs600_hpd_init +ffffffff81cf0e20 T rs600_hpd_fini +ffffffff81cf0ed0 T rs600_asic_reset +ffffffff81cf1140 T rs600_gart_tlb_flush +ffffffff81cf1200 T rs600_gart_get_page_entry +ffffffff81cf1260 T rs600_gart_set_page +ffffffff81cf12a0 T rs600_irq_set +ffffffff81cf1480 T rs600_irq_disable +ffffffff81cf1500 t rs600_irq_ack +ffffffff81cf16b0 T rs600_irq_process +ffffffff81cf1a10 T rs600_get_vblank_counter +ffffffff81cf1a60 T rs600_mc_wait_for_idle +ffffffff81cf1b00 T rs600_bandwidth_update +ffffffff81cf1bf0 T rs600_mc_rreg +ffffffff81cf1c70 T rs600_mc_wreg +ffffffff81cf1ce0 T rs600_set_safe_registers +ffffffff81cf1d20 T rs600_resume +ffffffff81cf1e50 t rs600_startup +ffffffff81cf2670 T rs600_suspend +ffffffff81cf2770 T rs600_fini +ffffffff81cf2870 t rs600_gart_fini +ffffffff81cf28e0 T rs600_init +ffffffff81cf3000 T rs690_mc_wait_for_idle +ffffffff81cf30a0 T rs690_pm_info +ffffffff81cf3310 T rs690_line_buffer_adjust +ffffffff81cf3430 T rs690_bandwidth_update +ffffffff81cf3780 t rs690_crtc_bandwidth_compute +ffffffff81cf3b70 t rs690_compute_mode_priority +ffffffff81cf3ff0 T rs690_mc_rreg +ffffffff81cf4080 T rs690_mc_wreg +ffffffff81cf4100 T rs690_resume +ffffffff81cf41f0 t rs690_startup +ffffffff81cf44d0 T rs690_suspend +ffffffff81cf4530 T rs690_fini +ffffffff81cf45e0 T rs690_init +ffffffff81cf5000 T rs780_dpm_enable +ffffffff81cf5bf0 T rs780_dpm_disable +ffffffff81cf5cd0 T rs780_dpm_set_power_state +ffffffff81cf60b0 t rs780_force_voltage +ffffffff81cf61f0 t rs780_enable_voltage_scaling +ffffffff81cf63b0 T rs780_dpm_setup_asic +ffffffff81cf63e0 T rs780_dpm_display_configuration_changed +ffffffff81cf6530 T rs780_dpm_init +ffffffff81cf6aa0 T rs780_dpm_print_power_state +ffffffff81cf6b30 T rs780_dpm_fini +ffffffff81cf6bc0 T rs780_dpm_get_sclk +ffffffff81cf6c00 T rs780_dpm_get_mclk +ffffffff81cf6c30 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81cf6c60 T rs780_dpm_get_current_sclk +ffffffff81cf6cf0 T rs780_dpm_get_current_mclk +ffffffff81cf6d20 T rs780_dpm_force_performance_level +ffffffff81cf6f10 t rs780_force_fbdiv +ffffffff81cf8000 T rv515_ring_start +ffffffff81cf8af0 T rv515_mc_wait_for_idle +ffffffff81cf8b90 T rv515_vga_render_disable +ffffffff81cf8be0 T rv515_mc_rreg +ffffffff81cf8c70 T rv515_mc_wreg +ffffffff81cf8cf0 T rv515_debugfs +ffffffff81cf8d00 T rv515_mc_stop +ffffffff81cf9270 T rv515_mc_resume +ffffffff81cf9850 T rv515_clock_startup +ffffffff81cf9910 T rv515_resume +ffffffff81cf9b50 t rv515_startup +ffffffff81cfa020 T rv515_suspend +ffffffff81cfa090 T rv515_set_safe_registers +ffffffff81cfa0d0 T rv515_fini +ffffffff81cfa180 T rv515_init +ffffffff81cfa460 T atom_rv515_force_tv_scaler +ffffffff81cfdb00 T rv515_bandwidth_avivo_update +ffffffff81cfdca0 t rv515_crtc_bandwidth_compute +ffffffff81cfdfb0 t rv515_compute_mode_priority +ffffffff81cfe480 T rv515_bandwidth_update +ffffffff81cff000 T rv6xx_dpm_enable +ffffffff81cff800 t rv6xx_calculate_stepping_parameters +ffffffff81cff9e0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81cfffb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81d00080 t rv6xx_enable_dynamic_pcie_gen2 +ffffffff81d00240 T rv6xx_dpm_disable +ffffffff81d004b0 T rv6xx_dpm_set_power_state +ffffffff81d00ea0 T rv6xx_setup_asic +ffffffff81d00fe0 T rv6xx_dpm_display_configuration_changed +ffffffff81d01060 T rv6xx_dpm_init +ffffffff81d015a0 T rv6xx_dpm_print_power_state +ffffffff81d01660 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81d01690 T rv6xx_dpm_get_current_sclk +ffffffff81d01700 T rv6xx_dpm_get_current_mclk +ffffffff81d01770 T rv6xx_dpm_fini +ffffffff81d01800 T rv6xx_dpm_get_sclk +ffffffff81d01840 T rv6xx_dpm_get_mclk +ffffffff81d01880 T rv6xx_dpm_force_performance_level +ffffffff81d01a10 t rv6xx_generate_steps +ffffffff81d01d10 t rv6xx_output_stepping +ffffffff81d01e20 t rv6xx_program_mclk_stepping_entry +ffffffff81d02090 t rv6xx_program_engine_spread_spectrum +ffffffff81d02380 t rv6xx_step_sw_voltage +ffffffff81d03000 T rv730_populate_sclk_value +ffffffff81d03230 T rv730_populate_mclk_value +ffffffff81d03470 T rv730_read_clock_registers +ffffffff81d03590 T rv730_populate_smc_acpi_state +ffffffff81d03740 T rv730_populate_smc_initial_state +ffffffff81d03900 T rv730_program_memory_timing_parameters +ffffffff81d03ae0 T rv730_start_dpm +ffffffff81d03b70 T rv730_stop_dpm +ffffffff81d03c30 T rv730_program_dcodt +ffffffff81d03d00 T rv730_get_odt_values +ffffffff81d04000 T rv740_get_decoded_reference_divider +ffffffff81d040a0 T rv740_get_dll_speed +ffffffff81d042b0 T rv740_populate_sclk_value +ffffffff81d044b0 T rv740_populate_mclk_value +ffffffff81d04860 T rv740_read_clock_registers +ffffffff81d04990 T rv740_populate_smc_acpi_state +ffffffff81d04bc0 T rv740_enable_mclk_spread_spectrum +ffffffff81d04c10 T rv740_get_mclk_frequency_ratio +ffffffff81d05000 T rv770_set_uvd_clocks +ffffffff81d05570 T rv770_get_xclk +ffffffff81d055d0 T rv770_page_flip +ffffffff81d058d0 T rv770_page_flip_pending +ffffffff81d05940 T rv770_get_temp +ffffffff81d059a0 T rv770_pm_misc +ffffffff81d05a80 T r700_cp_stop +ffffffff81d05b00 T r700_cp_fini +ffffffff81d05b90 T rv770_set_clk_bypass_mode +ffffffff81d05cb0 T r700_vram_gtt_location +ffffffff81d05e40 T rv770_resume +ffffffff81d05ed0 t rv770_init_golden_registers +ffffffff81d06060 t rv770_startup +ffffffff81d07c00 T rv770_suspend +ffffffff81d07e20 T rv770_init +ffffffff81d08210 t rv770_pcie_gart_fini +ffffffff81d08390 T rv770_fini +ffffffff81d08630 t rv770_uvd_start +ffffffff81d086e0 t rv770_cp_load_microcode +ffffffff81d089b0 t rv770_uvd_resume +ffffffff81d09000 T rv770_copy_dma +ffffffff81d0a000 T rv770_get_ps +ffffffff81d0a030 T rv770_get_pi +ffffffff81d0a060 T evergreen_get_pi +ffffffff81d0a090 T rv770_restore_cgcg +ffffffff81d0a110 T rv770_stop_dpm +ffffffff81d0a1d0 T rv770_dpm_enabled +ffffffff81d0a210 T rv770_enable_thermal_protection +ffffffff81d0a270 T rv770_enable_acpi_pm +ffffffff81d0a2c0 T rv770_get_seq_value +ffffffff81d0a300 T rv770_write_smc_soft_register +ffffffff81d0a330 T rv770_populate_smc_t +ffffffff81d0a4e0 T rv770_populate_smc_sp +ffffffff81d0a540 T rv770_map_clkf_to_ibias +ffffffff81d0a5a0 T rv770_populate_vddc_value +ffffffff81d0a650 T rv770_populate_mvdd_value +ffffffff81d0a6a0 T rv770_calculate_memory_refresh_rate +ffffffff81d0a720 T rv770_enable_backbias +ffffffff81d0a780 T rv770_setup_bsp +ffffffff81d0a870 T rv770_program_git +ffffffff81d0a8c0 T rv770_program_tp +ffffffff81d0a940 T rv770_program_tpp +ffffffff81d0a980 T rv770_program_sstp +ffffffff81d0a9c0 T rv770_program_engine_speed_parameters +ffffffff81d0aa10 T rv770_program_vc +ffffffff81d0aa60 T rv770_clear_vc +ffffffff81d0aaa0 T rv770_upload_firmware +ffffffff81d0aae0 T rv770_populate_initial_mvdd_value +ffffffff81d0ab30 T rv770_get_memory_module_index +ffffffff81d0ab70 T rv770_enable_voltage_control +ffffffff81d0abc0 T rv770_halt_smc +ffffffff81d0ac20 T rv770_resume_smc +ffffffff81d0ac70 T rv770_set_sw_state +ffffffff81d0acd0 T rv770_set_boot_state +ffffffff81d0ad20 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81d0ad90 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81d0ae00 T rv770_restrict_performance_levels_before_switch +ffffffff81d0ae60 T rv770_dpm_force_performance_level +ffffffff81d0af20 T r7xx_start_smc +ffffffff81d0af50 T r7xx_stop_smc +ffffffff81d0af80 T rv770_read_voltage_smio_registers +ffffffff81d0afc0 T rv770_reset_smio_status +ffffffff81d0b080 T rv770_get_memory_type +ffffffff81d0b0d0 T rv770_get_pcie_gen2_status +ffffffff81d0b140 T rv770_get_max_vddc +ffffffff81d0b1a0 T rv770_program_response_times +ffffffff81d0b2f0 T rv770_enable_auto_throttle_source +ffffffff81d0b470 T rv770_dpm_enable +ffffffff81d0c4f0 T rv770_dpm_late_enable +ffffffff81d0c620 T rv770_dpm_disable +ffffffff81d0c990 T rv770_dpm_set_power_state +ffffffff81d0d080 t rv770_program_dcodt_after_state_switch +ffffffff81d0d100 T rv770_dpm_setup_asic +ffffffff81d0d470 T rv770_dpm_display_configuration_changed +ffffffff81d0d4f0 T rv7xx_parse_power_table +ffffffff81d0da70 T rv770_get_engine_memory_ss +ffffffff81d0db00 T rv770_dpm_init +ffffffff81d0dd40 T rv770_dpm_print_power_state +ffffffff81d0de60 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81d0de90 T rv770_dpm_get_current_sclk +ffffffff81d0df00 T rv770_dpm_get_current_mclk +ffffffff81d0df70 T rv770_dpm_fini +ffffffff81d0e000 T rv770_dpm_get_sclk +ffffffff81d0e050 T rv770_dpm_get_mclk +ffffffff81d0e0a0 T rv770_dpm_vblank_too_short +ffffffff81d0e110 t rv770_convert_power_level_to_smc +ffffffff81d0f000 T rv770_copy_bytes_to_smc +ffffffff81d0f210 T rv770_start_smc +ffffffff81d0f260 T rv770_reset_smc +ffffffff81d0f2b0 T rv770_stop_smc_clock +ffffffff81d0f300 T rv770_start_smc_clock +ffffffff81d0f350 T rv770_is_smc_running +ffffffff81d0f390 T rv770_send_msg_to_smc +ffffffff81d0f470 T rv770_wait_for_smc_inactive +ffffffff81d0f510 T rv770_load_smc_ucode +ffffffff81d0f6a0 T rv770_read_smc_sram_dword +ffffffff81d0f760 T rv770_write_smc_sram_dword +ffffffff81d10000 T si_get_allowed_info_register +ffffffff81d10090 T si_get_xclk +ffffffff81d10100 T si_get_temp +ffffffff81d10150 T si_mc_load_microcode +ffffffff81d10410 T dce6_bandwidth_update +ffffffff81d105d0 t dce6_line_buffer_adjust +ffffffff81d10780 t dce6_program_watermarks +ffffffff81d11230 T si_fence_ring_emit +ffffffff81d11690 T si_ring_ib_execute +ffffffff81d11e00 T si_gpu_check_soft_reset +ffffffff81d11fa0 T si_asic_reset +ffffffff81d12320 t si_gpu_pci_config_reset +ffffffff81d12640 T si_gfx_is_lockup +ffffffff81d126b0 T si_vram_gtt_location +ffffffff81d12750 T si_pcie_gart_tlb_flush +ffffffff81d127a0 T si_ib_parse +ffffffff81d12e40 T si_vm_init +ffffffff81d12e80 T si_vm_fini +ffffffff81d12eb0 T si_vm_flush +ffffffff81d13550 T si_init_uvd_internal_cg +ffffffff81d135a0 T si_get_csb_size +ffffffff81d13630 T si_get_csb_buffer +ffffffff81d137b0 T si_rlc_reset +ffffffff81d13830 T si_irq_set +ffffffff81d13d20 t si_disable_interrupt_state +ffffffff81d13fa0 T si_irq_process +ffffffff81d152a0 t si_irq_ack +ffffffff81d15890 T si_resume +ffffffff81d15920 t si_init_golden_registers +ffffffff81d15ae0 t si_startup +ffffffff81d17f00 T si_suspend +ffffffff81d181f0 t si_fini_cg +ffffffff81d18290 T si_init +ffffffff81d195f0 t si_cp_fini +ffffffff81d196e0 t si_irq_fini +ffffffff81d197b0 t si_pcie_gart_fini +ffffffff81d198b0 T si_fini +ffffffff81d19ad0 T si_get_gpu_clock_counter +ffffffff81d19b90 T si_set_uvd_clocks +ffffffff81d1a0f0 T si_set_vce_clocks +ffffffff81d1a630 t si_vce_send_vcepll_ctlreq +ffffffff81d1a870 t dce6_latency_watermark +ffffffff81d1aab0 t si_rlc_stop +ffffffff81d1ac60 t si_vm_reg_valid +ffffffff81d1adc0 t si_vm_packet3_cp_dma_check +ffffffff81d1af30 t si_uvd_start +ffffffff81d1afe0 t si_vce_start +ffffffff81d1b0f0 t si_irq_init +ffffffff81d1bbd0 t si_cp_load_microcode +ffffffff81d1bfb0 t si_cp_resume +ffffffff81d1ce70 t si_uvd_resume +ffffffff81d1cf40 t si_vce_resume +ffffffff81d1d030 t pcie_capability_set_word +ffffffff81d1d140 t pcie_capability_read_word +ffffffff81d1d1e0 t pcie_capability_clear_and_set_word +ffffffff81d1d300 t pcie_capability_write_word +ffffffff81d1d3c0 t si_update_cg +ffffffff81d1d930 t si_enable_mgcg +ffffffff81d1dd50 t si_enable_cgcg +ffffffff81d1e0e0 t request_firmware +ffffffff81d1e170 t release_firmware +ffffffff81d1f000 T si_dma_is_lockup +ffffffff81d1f080 T si_dma_vm_copy_pages +ffffffff81d1f170 T si_dma_vm_write_pages +ffffffff81d1f2d0 T si_dma_vm_set_pages +ffffffff81d1f440 T si_dma_vm_flush +ffffffff81d1f8b0 T si_copy_dma +ffffffff81d20000 T si_dpm_force_performance_level +ffffffff81d20160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81d201c0 T si_get_mclk_frequency_ratio +ffffffff81d20240 T si_trim_voltage_table_to_fit_state_table +ffffffff81d20350 T si_dpm_setup_asic +ffffffff81d20520 T si_fan_ctrl_get_fan_speed_percent +ffffffff81d205b0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81d20670 T si_fan_ctrl_set_mode +ffffffff81d208c0 T si_fan_ctrl_get_mode +ffffffff81d20910 T si_dpm_enable +ffffffff81d21c90 t si_init_smc_table +ffffffff81d22ea0 t si_init_smc_spll_table +ffffffff81d23020 t si_init_arb_table_index +ffffffff81d230b0 t si_populate_mc_reg_table +ffffffff81d23500 t si_initialize_smc_cac_tables +ffffffff81d25150 t si_initialize_hardware_cac_manager +ffffffff81d25200 t si_initialize_smc_dte_tables +ffffffff81d25400 t si_populate_smc_tdp_limits +ffffffff81d25600 t si_populate_smc_tdp_limits_2 +ffffffff81d256d0 t si_program_response_times +ffffffff81d257f0 t si_program_ds_registers +ffffffff81d25880 t si_dpm_start_smc +ffffffff81d258b0 t si_enable_auto_throttle_source +ffffffff81d25a40 t si_thermal_start_thermal_controller +ffffffff81d25f00 T si_dpm_late_enable +ffffffff81d26050 T si_dpm_disable +ffffffff81d263d0 t si_enable_power_containment +ffffffff81d264a0 t si_enable_smc_cac +ffffffff81d26600 T si_dpm_pre_set_power_state +ffffffff81d27170 T si_dpm_set_power_state +ffffffff81d276d0 t si_halt_smc +ffffffff81d27730 t si_upload_sw_state +ffffffff81d28130 t si_upload_smc_data +ffffffff81d28270 t si_upload_ulv_state +ffffffff81d283b0 t si_upload_mc_reg_table +ffffffff81d28550 t si_set_pcie_lane_width_in_smc +ffffffff81d285f0 t si_resume_smc +ffffffff81d28650 t si_set_vce_clock +ffffffff81d286f0 t si_notify_link_speed_change_after_state_change +ffffffff81d28820 t si_set_power_state_conditionally_enable_ulv +ffffffff81d28900 t si_power_control_set_level +ffffffff81d28a90 T si_dpm_post_set_power_state +ffffffff81d28ac0 T si_dpm_display_configuration_changed +ffffffff81d28ba0 T si_dpm_init +ffffffff81d2a5e0 T si_dpm_fini +ffffffff81d2a690 T si_dpm_debugfs_print_current_performance_level +ffffffff81d2a6e0 T si_dpm_get_current_sclk +ffffffff81d2a750 T si_dpm_get_current_mclk +ffffffff81d2a7c0 t si_do_program_memory_timing_parameters +ffffffff81d2a950 t si_populate_mvdd_value +ffffffff81d2a9d0 t si_convert_power_level_to_smc +ffffffff81d2b280 t si_calculate_sclk_params +ffffffff81d2b4b0 t si_program_cac_config_registers +ffffffff81d2c000 T si_copy_bytes_to_smc +ffffffff81d2c240 T si_start_smc +ffffffff81d2c280 T si_reset_smc +ffffffff81d2c2c0 T si_program_jump_on_start +ffffffff81d2c2f0 T si_stop_smc_clock +ffffffff81d2c330 T si_start_smc_clock +ffffffff81d2c370 T si_is_smc_running +ffffffff81d2c3d0 T si_send_msg_to_smc +ffffffff81d2c4a0 T si_wait_for_smc_inactive +ffffffff81d2c540 T si_load_smc_ucode +ffffffff81d2c6e0 T si_read_smc_sram_dword +ffffffff81d2c7b0 T si_write_smc_sram_dword +ffffffff81d2d000 T sumo_get_pi +ffffffff81d2d030 T sumo_gfx_clockgating_initialize +ffffffff81d2d110 T sumo_program_vc +ffffffff81d2d150 T sumo_clear_vc +ffffffff81d2d190 T sumo_program_sstp +ffffffff81d2d210 T sumo_take_smu_control +ffffffff81d2d240 T sumo_get_sleep_divider_from_id +ffffffff81d2d270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d2d320 T sumo_dpm_enable +ffffffff81d2d9b0 T sumo_dpm_late_enable +ffffffff81d2df70 T sumo_dpm_disable +ffffffff81d2e2c0 T sumo_dpm_pre_set_power_state +ffffffff81d2e7b0 T sumo_dpm_set_power_state +ffffffff81d2f260 T sumo_dpm_post_set_power_state +ffffffff81d2f300 T sumo_dpm_setup_asic +ffffffff81d2f400 T sumo_dpm_display_configuration_changed +ffffffff81d2f430 T sumo_convert_vid2_to_vid7 +ffffffff81d2f480 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d2f540 T sumo_construct_vid_mapping_table +ffffffff81d2f6b0 T sumo_dpm_init +ffffffff81d2ff80 T sumo_dpm_print_power_state +ffffffff81d300a0 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d300d0 T sumo_dpm_get_current_sclk +ffffffff81d30140 T sumo_dpm_get_current_mclk +ffffffff81d30170 T sumo_dpm_get_current_vddc +ffffffff81d30240 T sumo_dpm_fini +ffffffff81d302d0 T sumo_dpm_get_sclk +ffffffff81d30320 T sumo_dpm_get_mclk +ffffffff81d30350 T sumo_dpm_force_performance_level +ffffffff81d30740 t sumo_power_level_enable +ffffffff81d30970 t sumo_program_power_level +ffffffff81d31000 T sumo_initialize_m3_arb +ffffffff81d312c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d31360 t sumo_send_msg_to_smu +ffffffff81d314f0 T sumo_smu_pg_init +ffffffff81d31510 T sumo_enable_boost_timer +ffffffff81d31640 T sumo_set_tdp_limit +ffffffff81d316c0 T sumo_boost_state_enable +ffffffff81d31710 T sumo_get_running_fw_version +ffffffff81d32000 T trinity_dpm_enable_bapm +ffffffff81d32080 T trinity_dpm_enable +ffffffff81d32520 T trinity_dpm_late_enable +ffffffff81d32a60 T trinity_dpm_disable +ffffffff81d32e50 T trinity_dpm_force_performance_level +ffffffff81d32f00 T trinity_dpm_pre_set_power_state +ffffffff81d334c0 T trinity_dpm_set_power_state +ffffffff81d33a30 T trinity_dpm_post_set_power_state +ffffffff81d33ad0 T trinity_dpm_setup_asic +ffffffff81d33b30 T trinity_dpm_display_configuration_changed +ffffffff81d33bc0 T trinity_dpm_init +ffffffff81d344b0 T trinity_dpm_print_power_state +ffffffff81d345c0 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d34650 T trinity_dpm_get_current_sclk +ffffffff81d346b0 T trinity_dpm_get_current_mclk +ffffffff81d346e0 T trinity_dpm_fini +ffffffff81d34780 T trinity_dpm_get_sclk +ffffffff81d347d0 T trinity_dpm_get_mclk +ffffffff81d34800 t trinity_program_power_level +ffffffff81d35000 T trinity_dpm_bapm_enable +ffffffff81d35150 T trinity_dpm_config +ffffffff81d35230 T trinity_dpm_force_state +ffffffff81d35310 T trinity_dpm_n_levels_disabled +ffffffff81d353f0 T trinity_uvd_dpm_config +ffffffff81d354c0 T trinity_dpm_no_forced_level +ffffffff81d35590 T trinity_dce_enable_voltage_adjustment +ffffffff81d356e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d357b0 T trinity_acquire_mutex +ffffffff81d35840 T trinity_release_mutex +ffffffff81d36000 T uvd_v1_0_get_rptr +ffffffff81d36040 T uvd_v1_0_get_wptr +ffffffff81d36080 T uvd_v1_0_set_wptr +ffffffff81d360c0 T uvd_v1_0_fence_emit +ffffffff81d364b0 T uvd_v1_0_resume +ffffffff81d36610 T uvd_v1_0_init +ffffffff81d36b90 T uvd_v1_0_start +ffffffff81d37310 T uvd_v1_0_fini +ffffffff81d37480 T uvd_v1_0_stop +ffffffff81d375f0 T uvd_v1_0_ring_test +ffffffff81d377c0 T uvd_v1_0_semaphore_emit +ffffffff81d377f0 T uvd_v1_0_ib_execute +ffffffff81d37980 T uvd_v1_0_ib_test +ffffffff81d38000 T uvd_v2_2_fence_emit +ffffffff81d38450 T uvd_v2_2_semaphore_emit +ffffffff81d38650 T uvd_v2_2_resume +ffffffff81d39000 T uvd_v3_1_semaphore_emit +ffffffff81d3a000 T uvd_v4_2_resume +ffffffff81d3b000 T vce_v1_0_get_rptr +ffffffff81d3b090 T vce_v1_0_get_wptr +ffffffff81d3b120 T vce_v1_0_set_wptr +ffffffff81d3b1b0 T vce_v1_0_enable_mgcg +ffffffff81d3b470 T vce_v1_0_load_fw +ffffffff81d3b640 T vce_v1_0_bo_size +ffffffff81d3b6b0 T vce_v1_0_resume +ffffffff81d3c020 T vce_v1_0_start +ffffffff81d3c7e0 T vce_v1_0_init +ffffffff81d3d000 T vce_v2_0_enable_mgcg +ffffffff81d3d070 t vce_v2_0_set_dyn_cg +ffffffff81d3d260 T vce_v2_0_bo_size +ffffffff81d3d2d0 T vce_v2_0_resume +ffffffff81d3e000 T aldebaran_reset_init +ffffffff81d3e0c0 t aldebaran_async_reset +ffffffff81d3e120 t aldebaran_get_reset_handler +ffffffff81d3e1c0 T aldebaran_reset_fini +ffffffff81d3e220 t aldebaran_mode2_prepare_hwcontext +ffffffff81d3e340 t aldebaran_mode2_perform_reset +ffffffff81d3e500 t aldebaran_mode2_restore_hwcontext +ffffffff81d3eaa0 t aldebaran_mode2_reset +ffffffff81d3f000 T aldebaran_reg_base_init +ffffffff81d40000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d40040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d40070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d40180 T amdgpu_acpi_pcie_performance_request +ffffffff81d40500 T amdgpu_acpi_power_shift_control +ffffffff81d40640 T amdgpu_acpi_smart_shift_update +ffffffff81d406e0 T amdgpu_acpi_get_tmr_info +ffffffff81d40770 T amdgpu_acpi_get_mem_info +ffffffff81d40830 T amdgpu_acpi_init +ffffffff81d408e0 t amdgpu_acpi_event +ffffffff81d40bf0 T amdgpu_acpi_get_backlight_caps +ffffffff81d40c40 T amdgpu_acpi_fini +ffffffff81d40c60 T amdgpu_acpi_should_gpu_reset +ffffffff81d40cb0 T amdgpu_acpi_detect +ffffffff81d415f0 T amdgpu_acpi_release +ffffffff81d42000 T amdgpu_afmt_acr +ffffffff81d43000 T amdgpu_amdkfd_init +ffffffff81d43040 T amdgpu_amdkfd_fini +ffffffff81d43070 T amdgpu_amdkfd_device_probe +ffffffff81d430a0 T amdgpu_amdkfd_device_init +ffffffff81d43260 t amdgpu_amdkfd_reset_work +ffffffff81d432e0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d43330 T amdgpu_amdkfd_interrupt +ffffffff81d43360 T amdgpu_amdkfd_suspend +ffffffff81d43390 T amdgpu_amdkfd_resume +ffffffff81d433c0 T amdgpu_amdkfd_pre_reset +ffffffff81d433f0 T amdgpu_amdkfd_post_reset +ffffffff81d43420 T amdgpu_amdkfd_gpu_reset +ffffffff81d43480 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d43730 t amdgpu_bo_reserve +ffffffff81d43890 t amdgpu_bo_unreserve +ffffffff81d43970 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d439e0 T amdgpu_amdkfd_alloc_gws +ffffffff81d43ac0 T amdgpu_amdkfd_free_gws +ffffffff81d43b00 T amdgpu_amdkfd_get_fw_version +ffffffff81d43bb0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d43d50 T amdgpu_amdkfd_xcp_memory_size +ffffffff81d43df0 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d43e30 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d43e90 T amdgpu_amdkfd_get_cu_info +ffffffff81d43fa0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d440f0 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d44160 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d441f0 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d44350 T amdgpu_amdkfd_submit_ib +ffffffff81d444b0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d44500 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d44540 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d44670 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d446b0 T amdgpu_amdkfd_have_atomics_support +ffffffff81d446e0 T amdgpu_amdkfd_debug_mem_fence +ffffffff81d44700 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d44710 T amdgpu_amdkfd_send_close_event_drain_irq +ffffffff81d44730 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d44780 T amdgpu_amdkfd_check_and_lock_kfd +ffffffff81d447b0 T amdgpu_amdkfd_unlock_kfd +ffffffff81d447e0 T amdgpu_amdkfd_unmap_hiq +ffffffff81d45000 T amdgpu_atom_execute_table +ffffffff81d450a0 t amdgpu_atom_execute_table_locked +ffffffff81d453c0 T amdgpu_atom_parse +ffffffff81d45910 T amdgpu_atom_destroy +ffffffff81d45950 T amdgpu_atom_asic_init +ffffffff81d45a70 t get_u32 +ffffffff81d45ad0 T amdgpu_atom_parse_data_header +ffffffff81d45b70 T amdgpu_atom_parse_cmd_header +ffffffff81d45bf0 t atom_op_move +ffffffff81d45dc0 t atom_op_and +ffffffff81d45fa0 t atom_op_or +ffffffff81d46180 t atom_op_shift_left +ffffffff81d46360 t atom_op_shift_right +ffffffff81d46540 t atom_op_mul +ffffffff81d46690 t atom_op_div +ffffffff81d46800 t atom_op_add +ffffffff81d469e0 t atom_op_sub +ffffffff81d46bc0 t atom_op_setport +ffffffff81d46d40 t atom_op_setregblock +ffffffff81d46e00 t atom_op_setfbbase +ffffffff81d46ec0 t atom_op_compare +ffffffff81d470a0 t atom_op_switch +ffffffff81d472d0 t atom_op_jump +ffffffff81d47540 t atom_op_test +ffffffff81d47700 t atom_op_delay +ffffffff81d477e0 t atom_op_calltable +ffffffff81d47930 t atom_op_repeat +ffffffff81d47960 t atom_op_clear +ffffffff81d47a70 t atom_op_nop +ffffffff81d47aa0 t atom_op_eot +ffffffff81d47ad0 t atom_op_mask +ffffffff81d47d80 t atom_op_postcard +ffffffff81d47e30 t atom_op_beep +ffffffff81d47e50 t atom_op_savereg +ffffffff81d47e80 t atom_op_restorereg +ffffffff81d47eb0 t atom_op_setdatablock +ffffffff81d47ff0 t atom_op_xor +ffffffff81d481d0 t atom_op_shl +ffffffff81d483f0 t atom_op_shr +ffffffff81d48610 t atom_op_debug +ffffffff81d486c0 t atom_op_processds +ffffffff81d48780 t atom_op_mul32 +ffffffff81d488e0 t atom_op_div32 +ffffffff81d48a70 t atom_put_dst +ffffffff81d48f80 t atom_get_src_int +ffffffff81d49600 t atom_iio_execute +ffffffff81d4a000 T amdgpu_atombios_lookup_i2c_gpio +ffffffff81d4a260 T amdgpu_atombios_i2c_init +ffffffff81d4a520 T amdgpu_atombios_lookup_gpio +ffffffff81d4a620 T amdgpu_atombios_has_dce_engine_info +ffffffff81d4a6a0 T amdgpu_atombios_get_connector_info_from_object_table +ffffffff81d4af00 T amdgpu_atombios_get_clock_info +ffffffff81d4b240 T amdgpu_atombios_get_gfx_info +ffffffff81d4b300 T amdgpu_atombios_get_vram_width +ffffffff81d4b390 T amdgpu_atombios_get_asic_ss_info +ffffffff81d4b670 t amdgpu_atombios_get_igp_ss_overrides +ffffffff81d4b790 T amdgpu_atombios_get_clock_dividers +ffffffff81d4b9b0 T amdgpu_atombios_has_gpu_virtualization_table +ffffffff81d4ba00 T amdgpu_atombios_scratch_regs_lock +ffffffff81d4ba60 T amdgpu_atombios_scratch_regs_engine_hung +ffffffff81d4bab0 T amdgpu_atombios_scratch_regs_set_backlight_level +ffffffff81d4bb10 T amdgpu_atombios_scratch_need_asic_init +ffffffff81d4bb60 T amdgpu_atombios_copy_swap +ffffffff81d4bb80 T amdgpu_atombios_sysfs_init +ffffffff81d4bbb0 T amdgpu_atombios_fini +ffffffff81d4bc60 T amdgpu_atombios_init +ffffffff81d4bf00 t cail_reg_read +ffffffff81d4bf20 t cail_reg_write +ffffffff81d4bf40 t cail_mc_read +ffffffff81d4bf70 t cail_mc_write +ffffffff81d4bfa0 t cail_pll_read +ffffffff81d4bfd0 t cail_pll_write +ffffffff81d4c000 T amdgpu_atombios_get_data_table +ffffffff81d4d000 T amdgpu_atombios_crtc_overscan_setup +ffffffff81d4d150 T amdgpu_atombios_crtc_scaler_setup +ffffffff81d4d1d0 T amdgpu_atombios_crtc_lock +ffffffff81d4d230 T amdgpu_atombios_crtc_enable +ffffffff81d4d290 T amdgpu_atombios_crtc_blank +ffffffff81d4d2f0 T amdgpu_atombios_crtc_powergate +ffffffff81d4d360 T amdgpu_atombios_crtc_powergate_init +ffffffff81d4d3d0 T amdgpu_atombios_crtc_set_dtd_timing +ffffffff81d4d500 T amdgpu_atombios_crtc_set_disp_eng_pll +ffffffff81d4d5f0 T amdgpu_atombios_crtc_set_dce_clock +ffffffff81d4d6e0 T amdgpu_atombios_crtc_program_pll +ffffffff81d4da00 T amdgpu_atombios_crtc_prepare_pll +ffffffff81d4df00 T amdgpu_atombios_crtc_set_pll +ffffffff81d4f000 T amdgpu_atombios_dp_aux_init +ffffffff81d4f090 t amdgpu_atombios_dp_aux_transfer +ffffffff81d4f200 T amdgpu_atombios_dp_get_sinktype +ffffffff81d4f270 T amdgpu_atombios_dp_get_dpcd +ffffffff81d4f420 T amdgpu_atombios_dp_get_panel_mode +ffffffff81d4f510 T amdgpu_atombios_dp_set_link_config +ffffffff81d4f590 t amdgpu_atombios_dp_get_dp_link_config +ffffffff81d4f720 T amdgpu_atombios_dp_mode_valid_helper +ffffffff81d4f7a0 T amdgpu_atombios_dp_needs_link_train +ffffffff81d4f810 T amdgpu_atombios_dp_set_rx_power_state +ffffffff81d4f890 T amdgpu_atombios_dp_link_train +ffffffff81d4fdf0 t amdgpu_atombios_dp_process_aux_ch +ffffffff81d4ff50 t amdgpu_atombios_dp_get_adjust_train +ffffffff81d51000 T amdgpu_atombios_encoder_get_backlight_level_from_reg +ffffffff81d51050 T amdgpu_atombios_encoder_set_backlight_level_to_reg +ffffffff81d510a0 T amdgpu_atombios_encoder_get_backlight_level +ffffffff81d51100 T amdgpu_atombios_encoder_set_backlight_level +ffffffff81d51210 T amdgpu_atombios_encoder_setup_dig_transmitter +ffffffff81d51c30 T amdgpu_atombios_encoder_init_backlight +ffffffff81d51dd0 t amdgpu_atombios_encoder_get_backlight_brightness +ffffffff81d51e30 T amdgpu_atombios_encoder_fini_backlight +ffffffff81d51ec0 T amdgpu_atombios_encoder_is_digital +ffffffff81d51f10 T amdgpu_atombios_encoder_mode_fixup +ffffffff81d51ff0 T amdgpu_atombios_encoder_get_encoder_mode +ffffffff81d52190 T amdgpu_atombios_encoder_setup_dig_encoder +ffffffff81d52670 t amdgpu_atombios_encoder_get_bpc +ffffffff81d526c0 T amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81d527c0 T amdgpu_atombios_encoder_dpms +ffffffff81d52930 t amdgpu_atombios_encoder_setup_dig +ffffffff81d52ce0 t amdgpu_atombios_encoder_setup_dvo +ffffffff81d52e90 T amdgpu_atombios_encoder_set_crtc_source +ffffffff81d53270 T amdgpu_atombios_encoder_init_dig +ffffffff81d53340 t amdgpu_atombios_encoder_setup_external_encoder +ffffffff81d535b0 T amdgpu_atombios_encoder_dac_detect +ffffffff81d53770 T amdgpu_atombios_encoder_dig_detect +ffffffff81d53870 T amdgpu_atombios_encoder_setup_ext_encoder_ddc +ffffffff81d538c0 T amdgpu_atombios_encoder_set_bios_scratch_regs +ffffffff81d53e10 T amdgpu_atombios_encoder_get_lcd_info +ffffffff81d54170 T amdgpu_atombios_encoder_get_dig_info +ffffffff81d541e0 t amdgpu_atombios_encoder_update_backlight_status +ffffffff81d55000 T amdgpu_atombios_i2c_xfer +ffffffff81d55370 T amdgpu_atombios_i2c_func +ffffffff81d553a0 T amdgpu_atombios_i2c_channel_trans +ffffffff81d56000 T amdgpu_atomfirmware_query_firmware_capability +ffffffff81d560a0 T amdgpu_atomfirmware_gpu_virtualization_supported +ffffffff81d560e0 T amdgpu_atomfirmware_scratch_regs_init +ffffffff81d56160 T amdgpu_atomfirmware_allocate_fb_scratch +ffffffff81d56360 T amdgpu_atomfirmware_get_vram_info +ffffffff81d56800 t convert_atom_mem_type_to_vram_type +ffffffff81d56880 T amdgpu_atomfirmware_mem_ecc_supported +ffffffff81d56950 T amdgpu_atomfirmware_sram_ecc_supported +ffffffff81d56990 T amdgpu_atomfirmware_dynamic_boot_config_supported +ffffffff81d569d0 T amdgpu_atomfirmware_ras_rom_addr +ffffffff81d56a80 T amdgpu_atomfirmware_get_clock_info +ffffffff81d56cd0 T amdgpu_atomfirmware_get_gfx_info +ffffffff81d56e50 T amdgpu_atomfirmware_mem_training_supported +ffffffff81d56e90 T amdgpu_atomfirmware_get_fw_reserved_fb_size +ffffffff81d56f20 T amdgpu_atomfirmware_asic_init +ffffffff81d58000 T amdgpu_benchmark +ffffffff81d58790 t amdgpu_benchmark_move +ffffffff81d59000 T amdgpu_read_bios +ffffffff81d59190 t check_atom_bios +ffffffff81d592a0 T amdgpu_get_bios +ffffffff81d597c0 t igp_read_bios_from_vram +ffffffff81d59900 t amdgpu_read_platform_bios +ffffffff81d599d0 T amdgpu_soc15_read_bios_from_rom +ffffffff81d5a000 T amdgpu_bo_list_create +ffffffff81d5a270 t amdgpu_bo_list_entry_cmp +ffffffff81d5a2b0 T amdgpu_bo_list_get +ffffffff81d5a320 T amdgpu_bo_list_put +ffffffff81d5a3d0 T amdgpu_bo_create_list_entry_array +ffffffff81d5a520 T amdgpu_bo_list_ioctl +ffffffff81d5b000 T amdgpu_cgs_create_device +ffffffff81d5b080 T amdgpu_cgs_destroy_device +ffffffff81d5b0a0 t amdgpu_cgs_read_register +ffffffff81d5b0c0 t amdgpu_cgs_write_register +ffffffff81d5b0e0 t amdgpu_cgs_read_ind_register +ffffffff81d5b1c0 t amdgpu_cgs_write_ind_register +ffffffff81d5b270 t amdgpu_cgs_get_firmware_info +ffffffff81d5c000 T amdgpu_connector_hotplug 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amdgpu_vcn_enc_ring_test_ib +ffffffff81dd06c0 T amdgpu_vcn_unified_ring_test_ib +ffffffff81dd0750 T amdgpu_vcn_get_enc_ring_prio +ffffffff81dd0790 T amdgpu_vcn_setup_ucode +ffffffff81dd0860 T amdgpu_debugfs_vcn_fwlog_init +ffffffff81dd0890 T amdgpu_vcn_fwlog_init +ffffffff81dd08c0 T amdgpu_vcn_process_poison_irq +ffffffff81dd09b0 T amdgpu_vcn_ras_late_init +ffffffff81dd0ab0 T amdgpu_vcn_ras_sw_init +ffffffff81dd0b90 T amdgpu_vcn_psp_update_sram +ffffffff81dd0c30 t __delayed_work_tick +ffffffff81dd1000 T amdgpu_vf_error_put +ffffffff81dd10d0 T amdgpu_vf_error_trans_all +ffffffff81dd2000 T amdgpu_virt_mmio_blocked +ffffffff81dd2050 T amdgpu_virt_init_setting +ffffffff81dd20f0 T amdgpu_virt_kiq_reg_write_reg_wait +ffffffff81dd2300 T amdgpu_virt_request_full_gpu +ffffffff81dd2360 T amdgpu_virt_release_full_gpu +ffffffff81dd23c0 T amdgpu_virt_reset_gpu +ffffffff81dd2420 T amdgpu_virt_request_init_data +ffffffff81dd2480 T amdgpu_virt_wait_reset +ffffffff81dd24d0 T amdgpu_virt_alloc_mm_table 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amdgpu_vm_bo_replace_map +ffffffff81dd69a0 T amdgpu_vm_bo_clear_mappings +ffffffff81dd6f10 T amdgpu_vm_bo_unmap +ffffffff81dd7040 T amdgpu_vm_bo_lookup_mapping +ffffffff81dd70b0 T amdgpu_vm_bo_trace_cs +ffffffff81dd70e0 T amdgpu_vm_bo_del +ffffffff81dd72d0 T amdgpu_vm_evictable +ffffffff81dd7380 T amdgpu_vm_bo_invalidate +ffffffff81dd7610 T amdgpu_vm_adjust_size +ffffffff81dd7870 T amdgpu_vm_wait_idle +ffffffff81dd78e0 T amdgpu_vm_init +ffffffff81dd7cd0 t amdgpu_bo_reserve +ffffffff81dd7e30 t amdgpu_bo_unreserve +ffffffff81dd7f10 T amdgpu_vm_make_compute +ffffffff81dd8110 T amdgpu_vm_release_compute +ffffffff81dd81d0 T amdgpu_vm_fini +ffffffff81dd87a0 T amdgpu_vm_manager_init +ffffffff81dd88c0 T amdgpu_vm_manager_fini +ffffffff81dd8920 T amdgpu_vm_ioctl +ffffffff81dd89d0 T amdgpu_vm_get_task_info +ffffffff81dd8a70 T amdgpu_vm_set_task_info +ffffffff81dd8b50 T amdgpu_vm_handle_fault +ffffffff81dd8d40 t amdgpu_vm_add_prt_cb +ffffffff81dd8e90 t amdgpu_vm_prt_cb +ffffffff81dd9000 t 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amdgpu_xcp_init +ffffffff81de0580 T amdgpu_xcp_switch_partition_mode +ffffffff81de06e0 T amdgpu_xcp_query_partition_mode +ffffffff81de07e0 T amdgpu_xcp_mgr_init +ffffffff81de0a00 T amdgpu_xcp_get_partition +ffffffff81de0aa0 T amdgpu_xcp_get_inst_details +ffffffff81de0af0 T amdgpu_xcp_dev_register +ffffffff81de0c40 T amdgpu_xcp_dev_unplug +ffffffff81de0d30 T amdgpu_xcp_open_device +ffffffff81de0f10 T amdgpu_xcp_release_sched +ffffffff81de1000 T amdgpu_get_xgmi_hive +ffffffff81de1050 T amdgpu_put_xgmi_hive +ffffffff81de10a0 T amdgpu_xgmi_set_pstate +ffffffff81de10f0 T amdgpu_xgmi_update_topology +ffffffff81de11a0 T amdgpu_xgmi_get_hops_count +ffffffff81de1210 T amdgpu_xgmi_get_num_links +ffffffff81de1280 T amdgpu_xgmi_add_device +ffffffff81de14a0 T amdgpu_xgmi_remove_device +ffffffff81de15f0 T amdgpu_xgmi_get_relative_phy_addr +ffffffff81de1630 t amdgpu_ras_error_inject_xgmi +ffffffff81de17a0 t amdgpu_xgmi_query_ras_error_count +ffffffff81de1e40 t amdgpu_xgmi_reset_ras_error_count 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dce_v10_0_hw_init +ffffffff81deb9a0 t dce_v10_0_hw_fini +ffffffff81debb30 t dce_v10_0_suspend +ffffffff81debb90 t dce_v10_0_resume +ffffffff81debc00 t dce_v10_0_is_idle +ffffffff81debc30 t dce_v10_0_wait_for_idle +ffffffff81debc60 t dce_v10_0_check_soft_reset +ffffffff81debc70 t dce_v10_0_soft_reset +ffffffff81debd40 t dce_v10_0_set_clockgating_state +ffffffff81debd70 t dce_v10_0_set_powergating_state +ffffffff81debda0 t dce_v10_0_audio_endpt_rreg +ffffffff81debe30 t dce_v10_0_audio_endpt_wreg +ffffffff81debeb0 t dce_v10_0_bandwidth_update +ffffffff81dec920 t dce_v10_0_vblank_get_counter +ffffffff81dec970 t dce_v10_0_hpd_sense +ffffffff81dec9d0 t dce_v10_0_hpd_set_polarity +ffffffff81decaa0 t dce_v10_0_hpd_get_gpio_reg +ffffffff81decad0 t dce_v10_0_page_flip +ffffffff81decbd0 t dce_v10_0_crtc_get_scanoutpos +ffffffff81decc70 t dce_v10_0_encoder_add +ffffffff81decec0 t dce_v10_0_latency_watermark +ffffffff81ded0f0 t dce_v10_0_encoder_destroy +ffffffff81ded150 t dce_v10_0_encoder_prepare +ffffffff81ded350 t dce_v10_0_encoder_commit +ffffffff81ded380 t dce_v10_0_encoder_mode_set +ffffffff81dee2f0 t dce_v10_0_encoder_disable +ffffffff81dee400 t dce_v10_0_ext_dpms +ffffffff81dee430 t dce_v10_0_ext_prepare +ffffffff81dee460 t dce_v10_0_ext_commit +ffffffff81dee490 t dce_v10_0_ext_mode_set +ffffffff81dee4c0 t dce_v10_0_ext_disable +ffffffff81dee4f0 t dce_v10_0_set_crtc_irq_state +ffffffff81dee5d0 t dce_v10_0_crtc_irq +ffffffff81dee810 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81dee8e0 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81dee9b0 t dce_v10_0_set_pageflip_irq_state +ffffffff81deea60 t dce_v10_0_pageflip_irq +ffffffff81deebc0 t dce_v10_0_set_hpd_irq_state +ffffffff81deec90 t dce_v10_0_hpd_irq +ffffffff81deedc0 t dce_v10_0_afmt_init +ffffffff81deeed0 t dce_v10_0_audio_init +ffffffff81deefa0 t INIT_DELAYED_WORK +ffffffff81deefe0 t dce_v10_0_crtc_cursor_set2 +ffffffff81def2a0 t dce_v10_0_crtc_cursor_move +ffffffff81def370 t dce_v10_0_crtc_gamma_set +ffffffff81def3b0 t dce_v10_0_crtc_destroy +ffffffff81def3e0 t amdgpu_bo_reserve +ffffffff81def5e0 t amdgpu_bo_unreserve +ffffffff81def6c0 t dce_v10_0_lock_cursor +ffffffff81def720 t dce_v10_0_cursor_move_locked +ffffffff81def880 t dce_v10_0_show_cursor +ffffffff81def920 t dce_v10_0_crtc_load_lut +ffffffff81defcb0 t dce_v10_0_crtc_dpms +ffffffff81defe90 t dce_v10_0_crtc_prepare +ffffffff81defed0 t dce_v10_0_crtc_commit +ffffffff81deff00 t dce_v10_0_crtc_mode_fixup +ffffffff81df00b0 t dce_v10_0_crtc_mode_set +ffffffff81df0290 t dce_v10_0_crtc_set_base +ffffffff81df02b0 t dce_v10_0_crtc_set_base_atomic +ffffffff81df02d0 t dce_v10_0_crtc_disable +ffffffff81df0460 t dce_v10_0_crtc_do_set_base +ffffffff81df0b60 t __delayed_work_tick +ffffffff81df0b80 t dce_v10_0_is_display_hung +ffffffff81df1000 T dce_v11_0_disable_dce +ffffffff81df1160 t dce_v11_0_early_init +ffffffff81df1290 t dce_v11_0_sw_init +ffffffff81df15b0 t dce_v11_0_sw_fini +ffffffff81df16d0 t dce_v11_0_hw_init +ffffffff81df1a90 t dce_v11_0_hw_fini +ffffffff81df1c20 t dce_v11_0_suspend +ffffffff81df1c80 t dce_v11_0_resume +ffffffff81df1cf0 t dce_v11_0_is_idle +ffffffff81df1d20 t dce_v11_0_wait_for_idle +ffffffff81df1d50 t dce_v11_0_soft_reset +ffffffff81df1f60 t dce_v11_0_set_clockgating_state +ffffffff81df1f90 t dce_v11_0_set_powergating_state +ffffffff81df1fc0 t dce_v11_0_audio_endpt_rreg +ffffffff81df2050 t dce_v11_0_audio_endpt_wreg +ffffffff81df20d0 t dce_v11_0_bandwidth_update +ffffffff81df2b40 t dce_v11_0_vblank_get_counter +ffffffff81df2b90 t dce_v11_0_hpd_sense +ffffffff81df2bf0 t dce_v11_0_hpd_set_polarity +ffffffff81df2cc0 t dce_v11_0_hpd_get_gpio_reg +ffffffff81df2cf0 t dce_v11_0_page_flip +ffffffff81df2df0 t dce_v11_0_crtc_get_scanoutpos +ffffffff81df2e90 t dce_v11_0_encoder_add +ffffffff81df30e0 t dce_v11_0_latency_watermark +ffffffff81df3310 t dce_v11_0_encoder_destroy +ffffffff81df3370 t dce_v11_0_encoder_prepare +ffffffff81df3570 t dce_v11_0_encoder_commit +ffffffff81df35a0 t dce_v11_0_encoder_mode_set +ffffffff81df4510 t dce_v11_0_encoder_disable +ffffffff81df4620 t dce_v11_0_ext_dpms +ffffffff81df4650 t dce_v11_0_ext_prepare +ffffffff81df4680 t dce_v11_0_ext_commit +ffffffff81df46b0 t dce_v11_0_ext_mode_set +ffffffff81df46e0 t dce_v11_0_ext_disable +ffffffff81df4710 t dce_v11_0_set_crtc_irq_state +ffffffff81df47f0 t dce_v11_0_crtc_irq +ffffffff81df4a10 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81df4ae0 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81df4bb0 t dce_v11_0_set_pageflip_irq_state +ffffffff81df4c60 t dce_v11_0_pageflip_irq +ffffffff81df4dc0 t dce_v11_0_set_hpd_irq_state +ffffffff81df4e90 t dce_v11_0_hpd_irq +ffffffff81df4fc0 t dce_v11_0_afmt_init +ffffffff81df50d0 t dce_v11_0_audio_init +ffffffff81df51d0 t INIT_DELAYED_WORK +ffffffff81df5210 t dce_v11_0_crtc_cursor_set2 +ffffffff81df54d0 t dce_v11_0_crtc_cursor_move +ffffffff81df55a0 t dce_v11_0_crtc_gamma_set +ffffffff81df55e0 t dce_v11_0_crtc_destroy +ffffffff81df5610 t amdgpu_bo_reserve +ffffffff81df5810 t amdgpu_bo_unreserve +ffffffff81df58f0 t dce_v11_0_lock_cursor +ffffffff81df5950 t dce_v11_0_cursor_move_locked +ffffffff81df5ab0 t dce_v11_0_show_cursor +ffffffff81df5b50 t dce_v11_0_crtc_load_lut +ffffffff81df5eb0 t dce_v11_0_crtc_dpms +ffffffff81df6090 t dce_v11_0_crtc_prepare +ffffffff81df60d0 t dce_v11_0_crtc_commit +ffffffff81df6100 t dce_v11_0_crtc_mode_fixup +ffffffff81df6370 t dce_v11_0_crtc_mode_set +ffffffff81df65d0 t dce_v11_0_crtc_set_base +ffffffff81df65f0 t dce_v11_0_crtc_set_base_atomic +ffffffff81df6610 t dce_v11_0_crtc_disable +ffffffff81df67b0 t dce_v11_0_crtc_do_set_base +ffffffff81df6eb0 t __delayed_work_tick +ffffffff81df7000 t df_v1_7_sw_init +ffffffff81df7040 t df_v1_7_sw_fini +ffffffff81df7070 t df_v1_7_enable_broadcast_mode +ffffffff81df71a0 t df_v1_7_get_fb_channel_number +ffffffff81df7230 t df_v1_7_get_hbm_channel_number +ffffffff81df7280 t df_v1_7_update_medium_grain_clock_gating +ffffffff81df7400 t df_v1_7_get_clockgating_state +ffffffff81df7490 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81df8000 t df_v3_6_sw_init +ffffffff81df8150 t df_v3_6_sw_fini +ffffffff81df8180 t df_v3_6_enable_broadcast_mode +ffffffff81df82b0 t df_v3_6_get_fb_channel_number +ffffffff81df8390 t df_v3_6_get_hbm_channel_number +ffffffff81df83e0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81df8580 t df_v3_6_get_clockgating_state +ffffffff81df8610 t df_v3_6_pmc_start +ffffffff81df8910 t df_v3_6_pmc_stop +ffffffff81df8bb0 t df_v3_6_pmc_get_count +ffffffff81df8d40 t df_v3_6_get_fica +ffffffff81df8e30 t df_v3_6_set_fica +ffffffff81df8f10 t df_v3_6_query_ras_poison_mode +ffffffff81dfa000 t df_v4_3_query_ras_poison_mode +ffffffff81dfb000 T dimgrey_cavefish_reg_base_init +ffffffff81dfc000 T emu_soc_asic_init +ffffffff81dfd000 t gfx_v10_0_early_init +ffffffff81dfd820 t gfx_v10_0_late_init +ffffffff81dfd890 t gfx_v10_0_sw_init +ffffffff81dfdda0 t gfx_v10_0_sw_fini +ffffffff81dfdfc0 t gfx_v10_0_hw_init +ffffffff81e00d20 t gfx_v10_0_hw_fini +ffffffff81e00e00 t gfx_v10_0_suspend +ffffffff81e00e40 t gfx_v10_0_resume +ffffffff81e00e50 t gfx_v10_0_is_idle +ffffffff81e00ee0 t gfx_v10_0_wait_for_idle +ffffffff81e00fe0 t gfx_v10_0_soft_reset +ffffffff81e01340 t gfx_v10_0_set_clockgating_state +ffffffff81e015f0 t gfx_v10_0_set_powergating_state +ffffffff81e016b0 t gfx_v10_0_get_clockgating_state +ffffffff81e017c0 t gfx_v10_0_get_gpu_clock_counter +ffffffff81e01cd0 t gfx_v10_0_select_se_sh +ffffffff81e01d70 t gfx_v10_0_read_wave_data +ffffffff81e01fd0 t gfx_v10_0_read_wave_vgprs +ffffffff81e02000 t gfx_v10_0_read_wave_sgprs +ffffffff81e02080 t gfx_v10_0_select_me_pipe_q +ffffffff81e020a0 t gfx_v10_0_init_spm_golden_registers +ffffffff81e02110 t gfx_v10_0_update_perfmon_mgcg +ffffffff81e02240 t wave_read_ind +ffffffff81e02330 t wave_read_regs +ffffffff81e02490 t gfx10_kiq_set_resources +ffffffff81e027b0 t gfx10_kiq_map_queues +ffffffff81e02b40 t gfx10_kiq_unmap_queues +ffffffff81e02f40 t gfx10_kiq_query_status +ffffffff81e03230 t gfx10_kiq_invalidate_tlbs +ffffffff81e03350 t gfx_v10_0_ring_get_rptr_compute +ffffffff81e03380 t gfx_v10_0_ring_get_wptr_compute +ffffffff81e033f0 t gfx_v10_0_ring_set_wptr_compute +ffffffff81e03530 t gfx_v10_0_ring_emit_ib_compute +ffffffff81e03870 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81e03ca0 t gfx_v10_0_ring_test_ring +ffffffff81e03f00 t gfx_v10_0_ring_test_ib +ffffffff81e04190 t gfx_v10_0_ring_emit_rreg +ffffffff81e04420 t gfx_v10_0_ring_emit_wreg +ffffffff81e04650 t gfx_v10_0_ring_emit_reg_wait +ffffffff81e046a0 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81e04730 t gfx_v10_0_wait_reg_mem +ffffffff81e04a60 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81e04a90 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81e04ba0 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81e04db0 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81e05430 t gfx_v10_0_ring_emit_fence +ffffffff81e05810 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81e05870 t gfx_v10_0_ring_emit_vm_flush +ffffffff81e05a40 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81e05b10 t gfx_v10_0_ring_emit_gds_switch +ffffffff81e05bf0 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81e05e20 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81e05ee0 t gfx_v10_0_ring_emit_sb +ffffffff81e05fd0 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81e064c0 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81e065d0 t gfx_v10_0_ring_soft_recovery +ffffffff81e06640 t gfx_v10_0_ring_preempt_ib +ffffffff81e067b0 t gfx_v10_0_emit_mem_sync +ffffffff81e06ae0 t gfx_v10_0_write_data_to_reg +ffffffff81e06cf0 t gfx_v10_0_set_eop_interrupt_state +ffffffff81e06dd0 t gfx_v10_0_eop_irq +ffffffff81e06f80 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81e07120 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81e072e0 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81e075d0 t gfx_v10_0_kiq_irq +ffffffff81e07650 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81e07790 t gfx_v10_0_priv_reg_irq +ffffffff81e077f0 t gfx_v10_0_handle_priv_fault +ffffffff81e07950 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81e07a90 t gfx_v10_0_priv_inst_irq +ffffffff81e07af0 t gfx_v10_0_is_rlc_enabled +ffffffff81e07b80 t gfx_v10_0_set_safe_mode +ffffffff81e07e30 t gfx_v10_0_unset_safe_mode +ffffffff81e07ee0 t gfx_v10_0_rlc_init +ffffffff81e07f00 t gfx_v10_0_get_csb_size +ffffffff81e07f30 t gfx_v10_0_get_csb_buffer +ffffffff81e080a0 t gfx_v10_0_rlc_resume +ffffffff81e08b10 t gfx_v10_0_rlc_stop +ffffffff81e08bf0 t gfx_v10_0_rlc_reset +ffffffff81e08da0 t gfx_v10_0_rlc_start +ffffffff81e08f50 t gfx_v10_0_update_spm_vmid +ffffffff81e08f90 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81e098b0 t gfx_v10_0_init_csb +ffffffff81e09b90 t gfx_v10_0_update_spm_vmid_internal +ffffffff81e09cb0 t gfx_v10_0_rlc_backdoor_autoload_config_mec_cache +ffffffff81e09f80 t gfx_v10_0_is_rlcg_access_range +ffffffff81e09fb0 t gfx_v10_0_gfx_mqd_init +ffffffff81e0a3a0 t gfx_v10_0_compute_mqd_init +ffffffff81e0a850 t gfx_v10_0_mec_init +ffffffff81e0aa60 t gfx_v10_0_compute_ring_init +ffffffff81e0aba0 t gfx_v10_0_rlc_backdoor_autoload_buffer_init +ffffffff81e0ae00 t gfx_v10_0_gpu_early_init +ffffffff81e0b060 t amdgpu_bo_unreserve +ffffffff81e0b140 t gfx_v10_0_cp_resume +ffffffff81e0db20 t gfx_v10_3_get_disabled_sa +ffffffff81e0dc40 t gfx_v10_0_get_rb_active_bitmap +ffffffff81e0dd70 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81e0de80 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81e0df90 t gfx_v10_0_cp_gfx_enable +ffffffff81e0e200 t gfx_v10_0_cp_compute_enable +ffffffff81e0e3a0 t amdgpu_bo_reserve +ffffffff81e0e510 t gfx_v10_0_kiq_init_register +ffffffff81e0f3b0 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81e0f4b0 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81e0f790 t gfx_v10_0_cp_gfx_start +ffffffff81e10180 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81e104d0 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81e10c10 t gfx_v10_0_update_3d_clock_gating +ffffffff81e11000 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81e113e0 t gfx_v10_cntl_pg +ffffffff81e12000 t gfx_v11_0_early_init +ffffffff81e12750 t gfx_v11_0_late_init +ffffffff81e127c0 t gfx_v11_0_sw_init +ffffffff81e12d00 t gfx_v11_0_sw_fini +ffffffff81e12f10 t gfx_v11_0_hw_init +ffffffff81e17310 t gfx_v11_0_hw_fini +ffffffff81e17410 t gfx_v11_0_suspend +ffffffff81e17450 t gfx_v11_0_resume +ffffffff81e17460 t gfx_v11_0_is_idle +ffffffff81e174f0 t gfx_v11_0_wait_for_idle +ffffffff81e175f0 t gfx_v11_0_check_soft_reset +ffffffff81e17720 t gfx_v11_0_soft_reset +ffffffff81e18460 t gfx_v11_0_post_soft_reset +ffffffff81e18470 t gfx_v11_0_set_clockgating_state +ffffffff81e190b0 t gfx_v11_0_set_powergating_state +ffffffff81e19150 t gfx_v11_0_get_clockgating_state +ffffffff81e19320 t gfx_v11_0_get_gpu_clock_counter +ffffffff81e196a0 t gfx_v11_0_select_se_sh +ffffffff81e19740 t gfx_v11_0_read_wave_data +ffffffff81e19980 t gfx_v11_0_read_wave_vgprs +ffffffff81e199b0 t gfx_v11_0_read_wave_sgprs +ffffffff81e19a30 t gfx_v11_0_select_me_pipe_q +ffffffff81e19a50 t gfx_v11_0_update_perf_clk +ffffffff81e19b80 t gfx_v11_0_get_gfx_shadow_info +ffffffff81e19bf0 t wave_read_ind +ffffffff81e19ce0 t wave_read_regs +ffffffff81e19e40 t gfx11_kiq_set_resources +ffffffff81e1a160 t gfx11_kiq_map_queues +ffffffff81e1a4f0 t gfx11_kiq_unmap_queues +ffffffff81e1a8f0 t gfx11_kiq_query_status +ffffffff81e1abe0 t gfx11_kiq_invalidate_tlbs +ffffffff81e1ad00 t gfx_v11_0_ring_get_rptr_compute +ffffffff81e1ad30 t gfx_v11_0_ring_get_wptr_compute +ffffffff81e1ada0 t gfx_v11_0_ring_set_wptr_compute +ffffffff81e1aee0 t gfx_v11_0_ring_emit_ib_compute +ffffffff81e1b220 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81e1b650 t gfx_v11_0_ring_test_ring +ffffffff81e1b8d0 t gfx_v11_0_ring_test_ib +ffffffff81e1bb70 t gfx_v11_0_ring_emit_rreg +ffffffff81e1be00 t gfx_v11_0_ring_emit_wreg +ffffffff81e1c030 t gfx_v11_0_ring_emit_reg_wait +ffffffff81e1c080 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81e1c0f0 t gfx_v11_0_wait_reg_mem +ffffffff81e1c420 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81e1c450 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81e1c560 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81e1c780 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81e1ce10 t gfx_v11_0_ring_emit_fence +ffffffff81e1d1e0 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81e1d240 t gfx_v11_0_ring_emit_vm_flush +ffffffff81e1d410 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81e1d4e0 t gfx_v11_0_ring_emit_gds_switch +ffffffff81e1d5c0 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81e1d7f0 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81e1d8b0 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81e1da10 t gfx_v11_0_ring_emit_gfx_shadow +ffffffff81e1ddd0 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81e1dee0 t gfx_v11_0_ring_soft_recovery +ffffffff81e1df50 t gfx_v11_0_ring_preempt_ib +ffffffff81e1e0c0 t gfx_v11_0_emit_mem_sync +ffffffff81e1e3f0 t gfx_v11_0_write_data_to_reg +ffffffff81e1e600 t gfx_v11_0_set_eop_interrupt_state +ffffffff81e1e690 t gfx_v11_0_eop_irq +ffffffff81e1e840 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81e1e9e0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81e1eb70 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81e1ecb0 t gfx_v11_0_priv_reg_irq +ffffffff81e1ed10 t gfx_v11_0_handle_priv_fault +ffffffff81e1ee70 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81e1efb0 t gfx_v11_0_priv_inst_irq +ffffffff81e1f010 t gfx_v11_0_rlc_gc_fed_irq +ffffffff81e1f060 t gfx_v11_0_is_rlc_enabled +ffffffff81e1f0f0 t gfx_v11_0_set_safe_mode +ffffffff81e1f250 t gfx_v11_0_unset_safe_mode +ffffffff81e1f2c0 t gfx_v11_0_rlc_init +ffffffff81e1f340 t gfx_v11_0_get_csb_size +ffffffff81e1f370 t gfx_v11_0_get_csb_buffer +ffffffff81e1f4e0 t gfx_v11_0_rlc_resume +ffffffff81e20240 t gfx_v11_0_rlc_stop +ffffffff81e20320 t gfx_v11_0_rlc_reset +ffffffff81e204d0 t gfx_v11_0_rlc_start +ffffffff81e20680 t gfx_v11_0_update_spm_vmid +ffffffff81e20780 t gfx_v11_0_init_csb +ffffffff81e20910 t gfx_v11_0_gfx_mqd_init +ffffffff81e20cf0 t gfx_v11_0_compute_mqd_init +ffffffff81e21220 t gfx_v11_0_mec_init +ffffffff81e21360 t gfx_v11_0_compute_ring_init +ffffffff81e214a0 t gfx_v11_0_rlc_autoload_buffer_init +ffffffff81e21690 t gfx_v11_0_gpu_early_init +ffffffff81e21760 t amdgpu_bo_unreserve +ffffffff81e21840 t gfx_v11_0_disable_gpa_mode +ffffffff81e219e0 t gfx_v11_0_cp_resume +ffffffff81e257e0 t gfx_v11_0_config_me_cache +ffffffff81e25ba0 t gfx_v11_0_config_pfp_cache +ffffffff81e25f60 t gfx_v11_0_config_mec_cache +ffffffff81e26320 t gfx_v11_0_get_sa_active_bitmap +ffffffff81e26440 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81e26550 t gfx_v11_0_cp_compute_enable +ffffffff81e26730 t gfx_v11_0_cp_gfx_enable +ffffffff81e26940 t amdgpu_bo_reserve +ffffffff81e26ab0 t gfx_v11_0_kiq_init_register +ffffffff81e27950 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81e27a30 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81e27c10 t gfx_v11_0_cp_gfx_start +ffffffff81e28490 t gfx_v11_cntl_pg +ffffffff81e29000 t gfx_v11_0_3_rlc_gc_fed_irq +ffffffff81e29200 t gfx_v11_0_3_poison_consumption_handler +ffffffff81e2a000 t gfx_v8_0_early_init +ffffffff81e2a2f0 t gfx_v8_0_late_init +ffffffff81e2aa10 t gfx_v8_0_sw_init +ffffffff81e2add0 t gfx_v8_0_sw_fini +ffffffff81e2af70 t gfx_v8_0_hw_init +ffffffff81e2d110 t gfx_v8_0_hw_fini +ffffffff81e2d5c0 t gfx_v8_0_suspend +ffffffff81e2d600 t gfx_v8_0_resume +ffffffff81e2d610 t gfx_v8_0_is_idle +ffffffff81e2d680 t gfx_v8_0_wait_for_idle +ffffffff81e2d730 t gfx_v8_0_check_soft_reset +ffffffff81e2d810 t gfx_v8_0_pre_soft_reset +ffffffff81e2d970 t gfx_v8_0_soft_reset +ffffffff81e2db30 t gfx_v8_0_post_soft_reset +ffffffff81e2dcb0 t gfx_v8_0_set_clockgating_state +ffffffff81e2df30 t gfx_v8_0_set_powergating_state +ffffffff81e2e2e0 t gfx_v8_0_get_clockgating_state +ffffffff81e2e3c0 t gfx_v8_0_get_gpu_clock_counter +ffffffff81e2e460 t gfx_v8_0_select_se_sh +ffffffff81e2e4c0 t gfx_v8_0_read_wave_data +ffffffff81e2e960 t gfx_v8_0_read_wave_sgprs +ffffffff81e2ea10 t gfx_v8_0_select_me_pipe_q +ffffffff81e2ea30 t gfx_v8_0_ring_get_rptr +ffffffff81e2ea60 t gfx_v8_0_ring_get_wptr_compute +ffffffff81e2ea90 t gfx_v8_0_ring_set_wptr_compute +ffffffff81e2ead0 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81e2eef0 t gfx_v8_0_ring_test_ring +ffffffff81e2f0f0 t gfx_v8_0_ring_emit_rreg +ffffffff81e2f380 t gfx_v8_0_ring_emit_wreg +ffffffff81e2f5b0 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81e2f610 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81e2f680 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81e2fbe0 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81e300d0 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81e303c0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81e30770 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81e30a90 t gfx_v8_0_ring_emit_gds_switch +ffffffff81e31240 t gfx_v8_0_ring_test_ib +ffffffff81e313f0 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81e31620 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81e316d0 t gfx_v8_ring_emit_sb +ffffffff81e317c0 t gfx_v8_ring_emit_cntxcntl +ffffffff81e31d60 t gfx_v8_0_ring_soft_recovery +ffffffff81e31d90 t gfx_v8_0_emit_mem_sync +ffffffff81e31f90 t gfx_v8_0_ring_emit_ib_compute +ffffffff81e32290 t gfx_v8_0_ring_emit_fence_compute +ffffffff81e32590 t gfx_v8_0_emit_mem_sync_compute +ffffffff81e32850 t gfx_v8_0_emit_wave_limit +ffffffff81e32a00 t gfx_v8_0_set_eop_interrupt_state +ffffffff81e32c10 t gfx_v8_0_eop_irq +ffffffff81e32d20 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81e32da0 t gfx_v8_0_priv_reg_irq +ffffffff81e32ea0 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81e32f20 t gfx_v8_0_priv_inst_irq +ffffffff81e33020 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81e33280 t gfx_v8_0_cp_ecc_error_irq +ffffffff81e332d0 t gfx_v8_0_set_sq_int_state +ffffffff81e33360 t gfx_v8_0_sq_irq +ffffffff81e333d0 t gfx_v8_0_parse_sq_irq +ffffffff81e33620 t gfx_v8_0_is_rlc_enabled +ffffffff81e33660 t gfx_v8_0_set_safe_mode +ffffffff81e33760 t gfx_v8_0_unset_safe_mode +ffffffff81e33800 t gfx_v8_0_rlc_init +ffffffff81e338b0 t gfx_v8_0_get_csb_size +ffffffff81e338e0 t gfx_v8_0_get_csb_buffer +ffffffff81e33a50 t gfx_v8_0_cp_jump_table_num +ffffffff81e33a90 t gfx_v8_0_rlc_resume +ffffffff81e33e10 t gfx_v8_0_rlc_stop +ffffffff81e33e80 t gfx_v8_0_rlc_reset +ffffffff81e33f00 t gfx_v8_0_rlc_start +ffffffff81e33f80 t gfx_v8_0_update_spm_vmid +ffffffff81e33ff0 t gfx_v8_0_init_save_restore_list +ffffffff81e34400 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81e34620 t gfx_v8_0_sq_irq_work_func +ffffffff81e34640 t gfx_v8_0_init_microcode +ffffffff81e34eb0 t gfx_v8_0_mec_init +ffffffff81e34fb0 t gfx_v8_0_compute_ring_init +ffffffff81e350e0 t gfx_v8_0_gpu_early_init +ffffffff81e35580 t amdgpu_bo_unreserve +ffffffff81e35660 t gfx_v8_0_kiq_resume +ffffffff81e35910 t gfx_v8_0_cp_gfx_resume +ffffffff81e363d0 t gfx_v8_0_kcq_resume +ffffffff81e36d90 t amdgpu_bo_reserve +ffffffff81e36f00 t gfx_v8_0_mqd_commit +ffffffff81e370e0 t gfx_v8_0_mqd_init +ffffffff81e37500 t gfx_v8_0_deactivate_hqd +ffffffff81e375c0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e37900 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e38000 t gfx_v9_0_ras_error_inject +ffffffff81e381b0 t gfx_v9_0_query_ras_error_count +ffffffff81e38d80 t gfx_v9_0_reset_ras_error_count +ffffffff81e397b0 T gfx_v9_0_select_se_sh +ffffffff81e39850 t gfx_v9_0_early_init +ffffffff81e3a380 t gfx_v9_0_late_init +ffffffff81e3b270 t gfx_v9_0_sw_init +ffffffff81e3b920 t gfx_v9_0_sw_fini +ffffffff81e3bae0 t gfx_v9_0_hw_init +ffffffff81e3ea90 t gfx_v9_0_hw_fini +ffffffff81e3f240 t gfx_v9_0_suspend +ffffffff81e3f280 t gfx_v9_0_resume +ffffffff81e3f290 t gfx_v9_0_is_idle +ffffffff81e3f310 t gfx_v9_0_wait_for_idle +ffffffff81e3f400 t gfx_v9_0_soft_reset +ffffffff81e3f7a0 t gfx_v9_0_set_clockgating_state +ffffffff81e3f870 t gfx_v9_0_set_powergating_state +ffffffff81e3fc60 t gfx_v9_0_get_clockgating_state +ffffffff81e3fd70 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e40500 t gfx_v9_0_read_wave_data +ffffffff81e40740 t gfx_v9_0_read_wave_vgprs +ffffffff81e407a0 t gfx_v9_0_read_wave_sgprs +ffffffff81e407d0 t gfx_v9_0_select_me_pipe_q +ffffffff81e407f0 t wave_read_ind +ffffffff81e408e0 t wave_read_regs +ffffffff81e40a30 t gfx_v9_0_kiq_set_resources +ffffffff81e40d50 t gfx_v9_0_kiq_map_queues +ffffffff81e41090 t gfx_v9_0_kiq_unmap_queues +ffffffff81e413c0 t gfx_v9_0_kiq_query_status +ffffffff81e416b0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e417d0 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e41800 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e41870 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e418d0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e41d00 t gfx_v9_0_ring_test_ring +ffffffff81e41f30 t gfx_v9_0_ring_emit_rreg +ffffffff81e421c0 t gfx_v9_0_ring_emit_wreg +ffffffff81e423f0 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e42440 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e424e0 t gfx_v9_0_wait_reg_mem +ffffffff81e42810 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e42840 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e42950 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e42a80 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e43100 t gfx_v9_0_ring_emit_fence +ffffffff81e434c0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e43520 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e43630 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e43700 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e437e0 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e43a10 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e43ad0 t gfx_v9_ring_emit_sb +ffffffff81e43bc0 t gfx_v9_ring_emit_cntxcntl +ffffffff81e440a0 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e441b0 t gfx_v9_0_ring_soft_recovery +ffffffff81e44220 t gfx_v9_0_ring_preempt_ib +ffffffff81e443e0 t gfx_v9_0_emit_mem_sync +ffffffff81e446a0 t gfx_v9_0_write_data_to_reg +ffffffff81e448b0 t gfx_v9_0_ring_test_ib +ffffffff81e44a60 t gfx_v9_0_ring_patch_cntl +ffffffff81e44aa0 t gfx_v9_0_ring_patch_ce_meta +ffffffff81e44ba0 t gfx_v9_0_ring_patch_de_meta +ffffffff81e44c70 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e44fa0 t gfx_v9_0_emit_wave_limit +ffffffff81e45180 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e45360 t gfx_v9_0_eop_irq +ffffffff81e454a0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e45660 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e457a0 t gfx_v9_0_priv_reg_irq +ffffffff81e458a0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e459e0 t gfx_v9_0_priv_inst_irq +ffffffff81e45ae0 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e46370 t gfx_v9_0_is_rlc_enabled +ffffffff81e46400 t gfx_v9_0_set_safe_mode +ffffffff81e46560 t gfx_v9_0_unset_safe_mode +ffffffff81e465d0 t gfx_v9_0_rlc_init +ffffffff81e46640 t gfx_v9_0_get_csb_size +ffffffff81e46670 t gfx_v9_0_get_csb_buffer +ffffffff81e467b0 t gfx_v9_0_cp_jump_table_num +ffffffff81e46800 t gfx_v9_0_rlc_resume +ffffffff81e47f10 t gfx_v9_0_rlc_stop +ffffffff81e482b0 t gfx_v9_0_rlc_reset +ffffffff81e48450 t gfx_v9_0_rlc_start +ffffffff81e485a0 t gfx_v9_0_update_spm_vmid +ffffffff81e485e0 t gfx_v9_0_is_rlcg_access_range +ffffffff81e48630 t gfx_v9_0_init_csb +ffffffff81e487c0 t gfx_v9_0_enable_lbpw +ffffffff81e488b0 t gfx_v9_0_update_spm_vmid_internal +ffffffff81e489d0 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e48c60 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e48d60 t gfx_v9_0_mec_init +ffffffff81e48f40 t gfx_v9_0_compute_ring_init +ffffffff81e49080 t gfx_v9_0_gpu_early_init +ffffffff81e494c0 t amdgpu_bo_unreserve +ffffffff81e495a0 t gfx_v9_0_cp_gfx_enable +ffffffff81e49690 t amdgpu_bo_reserve +ffffffff81e49800 t gfx_v9_0_kiq_init_register +ffffffff81e4a4e0 t gfx_v9_0_mqd_init +ffffffff81e4aa30 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e4af60 t gfx_v9_0_update_3d_clock_gating +ffffffff81e4b350 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e4c000 t gfx_v9_4_query_ras_error_count +ffffffff81e4ce00 t gfx_v9_4_query_ras_error_status +ffffffff81e4cfd0 t gfx_v9_4_reset_ras_error_count +ffffffff81e4e000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e4e720 T gfx_v9_4_2_init_golden_registers +ffffffff81e4e7b0 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e4e890 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e4ea70 t gfx_v9_4_2_query_ras_error_count +ffffffff81e4eb20 t gfx_v9_4_2_query_ras_error_status +ffffffff81e4f380 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e4f3e0 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e4f8b0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e4fad0 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e4fb50 t gfx_v9_4_2_run_shader +ffffffff81e4ff50 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e505a0 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e508e0 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e50ac0 t wave_read_ind +ffffffff81e51000 t gfx_v9_4_3_xcp_suspend +ffffffff81e510a0 t gfx_v9_4_3_xcp_resume +ffffffff81e511e0 t gfx_v9_4_3_query_ras_error_count +ffffffff81e51200 t gfx_v9_4_3_query_ras_error_status +ffffffff81e51220 t gfx_v9_4_3_reset_ras_error_count +ffffffff81e51240 t gfx_v9_4_3_reset_ras_error_status +ffffffff81e51260 t gfx_v9_4_3_enable_watchdog_timer +ffffffff81e51280 t gfx_v9_4_3_early_init +ffffffff81e51940 t gfx_v9_4_3_late_init +ffffffff81e519c0 t gfx_v9_4_3_sw_init +ffffffff81e51e20 t gfx_v9_4_3_sw_fini +ffffffff81e51fd0 t gfx_v9_4_3_hw_init +ffffffff81e52a70 t gfx_v9_4_3_hw_fini +ffffffff81e52b30 t gfx_v9_4_3_suspend +ffffffff81e52bf0 t gfx_v9_4_3_resume +ffffffff81e52c00 t gfx_v9_4_3_is_idle +ffffffff81e52db0 t gfx_v9_4_3_wait_for_idle +ffffffff81e52e40 t gfx_v9_4_3_soft_reset +ffffffff81e53550 t gfx_v9_4_3_set_clockgating_state +ffffffff81e536b0 t gfx_v9_4_3_set_powergating_state +ffffffff81e536e0 t gfx_v9_4_3_get_clockgating_state +ffffffff81e53850 t gfx_v9_4_3_kiq_set_resources +ffffffff81e53b70 t gfx_v9_4_3_kiq_map_queues +ffffffff81e53ed0 t gfx_v9_4_3_kiq_unmap_queues +ffffffff81e54250 t gfx_v9_4_3_kiq_query_status +ffffffff81e54540 t gfx_v9_4_3_kiq_invalidate_tlbs +ffffffff81e54660 t gfx_v9_4_3_ring_get_rptr_compute +ffffffff81e546a0 t gfx_v9_4_3_ring_get_wptr_compute +ffffffff81e54710 t gfx_v9_4_3_ring_set_wptr_compute +ffffffff81e54770 t gfx_v9_4_3_ring_emit_fence_kiq +ffffffff81e54bc0 t gfx_v9_4_3_ring_test_ring +ffffffff81e54e20 t gfx_v9_4_3_ring_emit_rreg +ffffffff81e550b0 t gfx_v9_4_3_ring_emit_wreg +ffffffff81e552e0 t gfx_v9_4_3_ring_emit_reg_wait +ffffffff81e55330 t gfx_v9_4_3_ring_emit_reg_write_reg_wait +ffffffff81e55350 t gfx_v9_4_3_wait_reg_mem +ffffffff81e55680 t gfx_v9_4_3_ring_emit_ib_compute +ffffffff81e559b0 t gfx_v9_4_3_ring_emit_fence +ffffffff81e55d60 t gfx_v9_4_3_ring_emit_pipeline_sync +ffffffff81e55dc0 t gfx_v9_4_3_ring_emit_vm_flush +ffffffff81e55de0 t gfx_v9_4_3_ring_emit_hdp_flush +ffffffff81e55eb0 t gfx_v9_4_3_ring_emit_gds_switch +ffffffff81e56050 t gfx_v9_4_3_ring_test_ib +ffffffff81e56200 t gfx_v9_4_3_emit_mem_sync +ffffffff81e564c0 t gfx_v9_4_3_emit_wave_limit +ffffffff81e566b0 t gfx_v9_4_3_write_data_to_reg +ffffffff81e568c0 t gfx_v9_4_3_set_eop_interrupt_state +ffffffff81e56a30 t gfx_v9_4_3_eop_irq +ffffffff81e56bd0 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state +ffffffff81e56d30 t gfx_v9_4_3_ih_to_xcc_inst +ffffffff81e56e00 t gfx_v9_4_3_set_priv_reg_fault_state +ffffffff81e571e0 t gfx_v9_4_3_priv_reg_irq +ffffffff81e57240 t gfx_v9_4_3_fault +ffffffff81e573c0 t gfx_v9_4_3_set_priv_inst_fault_state +ffffffff81e577a0 t gfx_v9_4_3_priv_inst_irq +ffffffff81e57800 t gfx_v9_4_3_is_rlc_enabled +ffffffff81e57920 t gfx_v9_4_3_xcc_set_safe_mode +ffffffff81e57bc0 t gfx_v9_4_3_xcc_unset_safe_mode +ffffffff81e57ce0 t gfx_v9_4_3_rlc_init +ffffffff81e57d30 t gfx_v9_4_3_rlc_resume +ffffffff81e57df0 t gfx_v9_4_3_rlc_stop +ffffffff81e57e90 t gfx_v9_4_3_rlc_reset +ffffffff81e58520 t gfx_v9_4_3_rlc_start +ffffffff81e585c0 t gfx_v9_4_3_update_spm_vmid +ffffffff81e587d0 t gfx_v9_4_3_is_rlcg_access_range +ffffffff81e58880 t gfx_v9_4_3_xcc_rlc_resume +ffffffff81e590d0 t gfx_v9_4_3_xcc_rlc_stop +ffffffff81e597f0 t gfx_v9_4_3_xcc_rlc_start +ffffffff81e59b80 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt +ffffffff81e59da0 t gfx_v9_4_3_xcc_select_se_sh +ffffffff81e59fa0 t gfx_v9_4_3_mec_init +ffffffff81e5a290 t gfx_v9_4_3_gpu_early_init +ffffffff81e5a4c0 t amdgpu_bo_unreserve +ffffffff81e5a5a0 t gfx_v9_4_3_get_gpu_clock_counter +ffffffff81e5a8e0 t gfx_v9_4_3_read_wave_data +ffffffff81e5abb0 t gfx_v9_4_3_read_wave_vgprs +ffffffff81e5abd0 t gfx_v9_4_3_read_wave_sgprs +ffffffff81e5ac20 t gfx_v9_4_3_select_me_pipe_q +ffffffff81e5ac90 t gfx_v9_4_3_switch_compute_partition +ffffffff81e5aff0 t wave_read_ind +ffffffff81e5b1f0 t wave_read_regs +ffffffff81e5b480 t gfx_v9_4_3_xcc_constants_init +ffffffff81e5c500 t gfx_v9_4_3_xcc_cp_resume +ffffffff81e5d4b0 t gfx_v9_4_3_xcc_cp_compute_enable +ffffffff81e5d650 t amdgpu_bo_reserve +ffffffff81e5d7c0 t gfx_v9_4_3_xcc_kiq_init_register +ffffffff81e5f400 t gfx_v9_4_3_xcc_mqd_init +ffffffff81e5fe40 t gfx_v9_4_3_xcc_fini +ffffffff81e603e0 t gfx_v9_4_3_xcc_q_fini_register +ffffffff81e60d90 t gfx_v9_4_3_xcc_update_sram_fgcg +ffffffff81e61000 t gfx_v9_4_3_xcc_update_repeater_fgcg +ffffffff81e61270 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating +ffffffff81e61dc0 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating +ffffffff81e62620 t gfx_v9_4_3_inst_query_ras_err_count +ffffffff81e62880 t gfx_v9_4_3_inst_query_ras_err_status +ffffffff81e63600 t gfx_v9_4_3_inst_reset_ras_err_count +ffffffff81e637c0 t gfx_v9_4_3_inst_reset_ras_err_status +ffffffff81e63f40 t gfx_v9_4_3_inst_enable_watchdog_timer +ffffffff81e65000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e65090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e651d0 t gfxhub_v1_0_gart_enable +ffffffff81e66700 t gfxhub_v1_0_gart_disable +ffffffff81e669a0 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e66aa0 t gfxhub_v1_0_init +ffffffff81e67000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e68000 t gfxhub_v1_2_get_mc_fb_offset +ffffffff81e68120 t gfxhub_v1_2_setup_vm_pt_regs +ffffffff81e68190 t gfxhub_v1_2_gart_enable +ffffffff81e68220 t gfxhub_v1_2_gart_disable +ffffffff81e68280 t gfxhub_v1_2_set_fault_enable_default +ffffffff81e682f0 t gfxhub_v1_2_init +ffffffff81e685f0 t gfxhub_v1_2_get_xgmi_info +ffffffff81e68860 t gfxhub_v1_2_xcp_suspend +ffffffff81e688a0 t gfxhub_v1_2_xcp_resume +ffffffff81e68910 t gfxhub_v1_2_xcc_setup_vm_pt_regs +ffffffff81e68c30 t gfxhub_v1_2_xcc_gart_enable +ffffffff81e6c070 t gfxhub_v1_2_xcc_gart_disable +ffffffff81e6c6e0 t gfxhub_v1_2_xcc_set_fault_enable_default +ffffffff81e6d000 t gfxhub_v2_0_get_fb_location +ffffffff81e6d090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e6d120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e6d260 t gfxhub_v2_0_gart_enable +ffffffff81e6e490 t gfxhub_v2_0_gart_disable +ffffffff81e6e6e0 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e6e7e0 t gfxhub_v2_0_init +ffffffff81e6e8b0 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e6ea80 t gfxhub_v2_0_get_invalidate_req +ffffffff81e6f000 t gfxhub_v2_1_get_fb_location +ffffffff81e6f090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e6f120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e6f260 t gfxhub_v2_1_gart_enable +ffffffff81e70560 t gfxhub_v2_1_gart_disable +ffffffff81e707b0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e708d0 t gfxhub_v2_1_init +ffffffff81e709a0 t gfxhub_v2_1_get_xgmi_info +ffffffff81e70ae0 t gfxhub_v2_1_utcl2_harvest +ffffffff81e70cc0 t gfxhub_v2_1_save_regs +ffffffff81e71730 t gfxhub_v2_1_restore_regs +ffffffff81e72350 t gfxhub_v2_1_halt +ffffffff81e72720 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e728f0 t gfxhub_v2_1_get_invalidate_req +ffffffff81e73000 t gfxhub_v3_0_get_fb_location +ffffffff81e73090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e73120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e73260 t gfxhub_v3_0_gart_enable +ffffffff81e74560 t gfxhub_v3_0_gart_disable +ffffffff81e74800 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e749d0 t gfxhub_v3_0_init +ffffffff81e74aa0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e74c70 t gfxhub_v3_0_get_invalidate_req +ffffffff81e75000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e75090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e75120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e75260 t gfxhub_v3_0_3_gart_enable +ffffffff81e76450 t gfxhub_v3_0_3_gart_disable +ffffffff81e766f0 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e76810 t gfxhub_v3_0_3_init +ffffffff81e768e0 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e76ab0 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e77000 t gmc_v10_0_early_init +ffffffff81e77170 t gmc_v10_0_late_init +ffffffff81e771e0 t gmc_v10_0_sw_init +ffffffff81e775d0 t gmc_v10_0_sw_fini +ffffffff81e77620 t gmc_v10_0_hw_init +ffffffff81e77830 t gmc_v10_0_hw_fini +ffffffff81e778f0 t gmc_v10_0_suspend +ffffffff81e77930 t gmc_v10_0_resume +ffffffff81e77990 t gmc_v10_0_is_idle +ffffffff81e779c0 t gmc_v10_0_wait_for_idle +ffffffff81e779f0 t gmc_v10_0_soft_reset +ffffffff81e77a20 t gmc_v10_0_set_clockgating_state +ffffffff81e77ad0 t gmc_v10_0_set_powergating_state +ffffffff81e77b00 t gmc_v10_0_get_clockgating_state +ffffffff81e77ba0 t gmc_v10_0_flush_gpu_tlb +ffffffff81e77e30 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e780e0 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e78290 t gmc_v10_0_emit_pasid_mapping +ffffffff81e78310 t gmc_v10_0_map_mtype +ffffffff81e78360 t gmc_v10_0_get_vm_pde +ffffffff81e78450 t gmc_v10_0_get_vm_pte +ffffffff81e78530 t gmc_v10_0_get_vbios_fb_size +ffffffff81e786a0 t gmc_v10_0_flush_vm_hub +ffffffff81e78ad0 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e78b70 t gmc_v10_0_process_interrupt +ffffffff81e78e50 t gmc_v10_0_ecc_interrupt_state +ffffffff81e78e80 t gmc_v10_0_gart_init +ffffffff81e79000 t gmc_v11_0_early_init +ffffffff81e791f0 t gmc_v11_0_late_init +ffffffff81e79260 t gmc_v11_0_sw_init +ffffffff81e79570 t gmc_v11_0_sw_fini +ffffffff81e795c0 t gmc_v11_0_hw_init +ffffffff81e79720 t gmc_v11_0_hw_fini +ffffffff81e797c0 t gmc_v11_0_suspend +ffffffff81e79860 t gmc_v11_0_resume +ffffffff81e798c0 t gmc_v11_0_is_idle +ffffffff81e798f0 t gmc_v11_0_wait_for_idle +ffffffff81e79920 t gmc_v11_0_soft_reset +ffffffff81e79950 t gmc_v11_0_set_clockgating_state +ffffffff81e799d0 t gmc_v11_0_set_powergating_state +ffffffff81e79a00 t gmc_v11_0_get_clockgating_state +ffffffff81e79a40 t gmc_v11_0_flush_gpu_tlb +ffffffff81e79ef0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e7a160 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e7a310 t gmc_v11_0_emit_pasid_mapping +ffffffff81e7a390 t gmc_v11_0_map_mtype +ffffffff81e7a3e0 t gmc_v11_0_get_vm_pde +ffffffff81e7a4e0 t gmc_v11_0_get_vm_pte +ffffffff81e7a5c0 t gmc_v11_0_get_vbios_fb_size +ffffffff81e7a730 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e7a7d0 t gmc_v11_0_process_interrupt +ffffffff81e7aa00 t gmc_v11_0_ecc_interrupt_state +ffffffff81e7aa30 t gmc_v11_0_gart_init +ffffffff81e7b000 t gmc_v7_0_early_init +ffffffff81e7b0a0 t gmc_v7_0_late_init +ffffffff81e7b0f0 t gmc_v7_0_sw_init +ffffffff81e7b520 t gmc_v7_0_sw_fini +ffffffff81e7b5a0 t gmc_v7_0_hw_init +ffffffff81e7bf10 t gmc_v7_0_hw_fini +ffffffff81e7bfd0 t gmc_v7_0_suspend +ffffffff81e7c010 t gmc_v7_0_resume +ffffffff81e7c070 t gmc_v7_0_is_idle +ffffffff81e7c0c0 t gmc_v7_0_wait_for_idle +ffffffff81e7c160 t gmc_v7_0_soft_reset +ffffffff81e7c3c0 t gmc_v7_0_set_clockgating_state +ffffffff81e7c620 t gmc_v7_0_set_powergating_state +ffffffff81e7c650 t gmc_v7_0_flush_gpu_tlb +ffffffff81e7c680 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e7c740 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e7c7e0 t gmc_v7_0_emit_pasid_mapping +ffffffff81e7c810 t gmc_v7_0_set_prt +ffffffff81e7c9d0 t gmc_v7_0_get_vm_pde +ffffffff81e7ca30 t gmc_v7_0_get_vm_pte +ffffffff81e7ca70 t gmc_v7_0_get_vbios_fb_size +ffffffff81e7cae0 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e7cbb0 t gmc_v7_0_process_interrupt +ffffffff81e7ce50 t gmc_v7_0_gart_init +ffffffff81e7d000 t gmc_v8_0_early_init +ffffffff81e7d0a0 t gmc_v8_0_late_init +ffffffff81e7d0f0 t gmc_v8_0_sw_init +ffffffff81e7d6a0 t gmc_v8_0_sw_fini +ffffffff81e7d720 t gmc_v8_0_hw_init +ffffffff81e7e390 t gmc_v8_0_hw_fini +ffffffff81e7e450 t gmc_v8_0_suspend +ffffffff81e7e490 t gmc_v8_0_resume +ffffffff81e7e4f0 t gmc_v8_0_is_idle +ffffffff81e7e540 t gmc_v8_0_wait_for_idle +ffffffff81e7e5e0 t gmc_v8_0_check_soft_reset +ffffffff81e7e650 t gmc_v8_0_pre_soft_reset +ffffffff81e7e7c0 t gmc_v8_0_soft_reset +ffffffff81e7e890 t gmc_v8_0_post_soft_reset +ffffffff81e7e900 t gmc_v8_0_set_clockgating_state +ffffffff81e7eec0 t gmc_v8_0_set_powergating_state +ffffffff81e7eef0 t gmc_v8_0_get_clockgating_state +ffffffff81e7ef60 t gmc_v8_0_flush_gpu_tlb +ffffffff81e7ef90 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e7f050 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e7f0f0 t gmc_v8_0_emit_pasid_mapping +ffffffff81e7f120 t gmc_v8_0_set_prt +ffffffff81e7f2e0 t gmc_v8_0_get_vm_pde +ffffffff81e7f340 t gmc_v8_0_get_vm_pte +ffffffff81e7f390 t gmc_v8_0_get_vbios_fb_size +ffffffff81e7f400 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e7f4d0 t gmc_v8_0_process_interrupt +ffffffff81e7f860 t gmc_v8_0_gart_init +ffffffff81e80000 T gmc_v9_0_restore_registers +ffffffff81e80160 t gmc_v9_0_early_init +ffffffff81e80510 t gmc_v9_0_late_init +ffffffff81e80620 t gmc_v9_0_sw_init +ffffffff81e80d80 t gmc_v9_0_sw_fini +ffffffff81e80e40 t gmc_v9_0_hw_init +ffffffff81e812f0 t gmc_v9_0_hw_fini +ffffffff81e813d0 t gmc_v9_0_suspend +ffffffff81e81410 t gmc_v9_0_resume +ffffffff81e81470 t gmc_v9_0_is_idle +ffffffff81e814a0 t gmc_v9_0_wait_for_idle +ffffffff81e814d0 t gmc_v9_0_soft_reset +ffffffff81e81500 t gmc_v9_0_set_clockgating_state +ffffffff81e81560 t gmc_v9_0_set_powergating_state +ffffffff81e81590 t gmc_v9_0_get_clockgating_state +ffffffff81e815d0 t gmc_v9_0_flush_gpu_tlb +ffffffff81e81c70 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e82020 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e82220 t gmc_v9_0_emit_pasid_mapping +ffffffff81e822a0 t gmc_v9_0_map_mtype +ffffffff81e822e0 t gmc_v9_0_get_vm_pde +ffffffff81e823e0 t gmc_v9_0_get_vm_pte +ffffffff81e82710 t gmc_v9_0_override_vm_pte_flags +ffffffff81e827d0 t gmc_v9_0_get_vbios_fb_size +ffffffff81e82970 t gmc_v9_0_query_memory_partition +ffffffff81e829d0 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e82e70 t gmc_v9_0_process_interrupt +ffffffff81e83670 t gmc_v9_0_ecc_interrupt_state +ffffffff81e837d0 t gmc_v9_0_init_mem_ranges +ffffffff81e83bf0 t gmc_v9_0_gart_init +ffffffff81e83d20 t gmc_v9_0_save_registers +ffffffff81e84000 t hdp_v4_0_query_ras_error_count +ffffffff81e840c0 t hdp_v4_0_reset_ras_error_count +ffffffff81e841e0 t hdp_v4_0_flush_hdp +ffffffff81e84230 t hdp_v4_0_invalidate_hdp +ffffffff81e84310 t hdp_v4_0_update_clock_gating +ffffffff81e84410 t hdp_v4_0_get_clockgating_state +ffffffff81e84460 t hdp_v4_0_init_registers +ffffffff81e85000 t hdp_v5_0_flush_hdp +ffffffff81e85050 t hdp_v5_0_invalidate_hdp +ffffffff81e850f0 t hdp_v5_0_update_clock_gating +ffffffff81e854f0 t hdp_v5_0_get_clockgating_state +ffffffff81e85610 t hdp_v5_0_init_registers +ffffffff81e86000 t hdp_v5_2_flush_hdp +ffffffff81e86050 t hdp_v5_2_update_clock_gating +ffffffff81e86460 t hdp_v5_2_get_clockgating_state +ffffffff81e87000 t hdp_v6_0_flush_hdp +ffffffff81e87050 t hdp_v6_0_update_clock_gating +ffffffff81e87380 t hdp_v6_0_get_clockgating_state +ffffffff81e88000 t iceland_ih_early_init +ffffffff81e88050 t iceland_ih_sw_init +ffffffff81e880b0 t iceland_ih_sw_fini +ffffffff81e880f0 t iceland_ih_hw_init +ffffffff81e88310 t iceland_ih_hw_fini +ffffffff81e883e0 t iceland_ih_suspend +ffffffff81e884b0 t iceland_ih_resume +ffffffff81e884f0 t iceland_ih_is_idle +ffffffff81e88540 t iceland_ih_wait_for_idle +ffffffff81e885e0 t iceland_ih_soft_reset +ffffffff81e886c0 t iceland_ih_set_clockgating_state +ffffffff81e886f0 t iceland_ih_set_powergating_state +ffffffff81e88720 t iceland_ih_get_wptr +ffffffff81e88810 t iceland_ih_decode_iv +ffffffff81e88890 t iceland_ih_set_rptr +ffffffff81e89000 t ih_v6_0_early_init +ffffffff81e89050 t ih_v6_0_sw_init +ffffffff81e891b0 t ih_v6_0_sw_fini +ffffffff81e891f0 t ih_v6_0_hw_init +ffffffff81e897a0 t ih_v6_0_hw_fini +ffffffff81e89800 t ih_v6_0_suspend +ffffffff81e89860 t ih_v6_0_resume +ffffffff81e89870 t ih_v6_0_is_idle +ffffffff81e898a0 t ih_v6_0_wait_for_idle +ffffffff81e898d0 t ih_v6_0_soft_reset +ffffffff81e89900 t ih_v6_0_set_clockgating_state +ffffffff81e89a30 t ih_v6_0_set_powergating_state +ffffffff81e89bb0 t ih_v6_0_get_clockgating_state +ffffffff81e89c40 t ih_v6_0_get_wptr +ffffffff81e89d30 t ih_v6_0_set_rptr +ffffffff81e89e00 t ih_v6_0_self_irq +ffffffff81e89e70 t ih_v6_0_toggle_interrupts +ffffffff81e8a050 t force_update_wptr_for_self_int +ffffffff81e8b000 t ih_v6_1_early_init +ffffffff81e8b050 t ih_v6_1_sw_init +ffffffff81e8b1b0 t ih_v6_1_sw_fini +ffffffff81e8b1f0 t ih_v6_1_hw_init +ffffffff81e8b7a0 t ih_v6_1_hw_fini +ffffffff81e8b800 t ih_v6_1_suspend +ffffffff81e8b860 t ih_v6_1_resume +ffffffff81e8b870 t ih_v6_1_is_idle +ffffffff81e8b8a0 t ih_v6_1_wait_for_idle +ffffffff81e8b8d0 t ih_v6_1_soft_reset +ffffffff81e8b900 t ih_v6_1_set_clockgating_state +ffffffff81e8ba30 t ih_v6_1_set_powergating_state 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jpeg_v1_0_decode_ring_emit_fence +ffffffff81e91030 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e910a0 t jpeg_v1_0_decode_ring_nop +ffffffff81e91200 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e913c0 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e91580 t jpeg_v1_0_ring_begin_use +ffffffff81e91680 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e918e0 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e91d00 t jpeg_v1_0_set_interrupt_state +ffffffff81e91d30 t jpeg_v1_0_process_interrupt +ffffffff81e92000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e921a0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e92340 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e92a20 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e931d0 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e93580 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e935f0 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e93830 T jpeg_v2_0_dec_ring_nop +ffffffff81e93990 t jpeg_v2_0_early_init +ffffffff81e93a20 t jpeg_v2_0_sw_init +ffffffff81e93b50 t jpeg_v2_0_sw_fini +ffffffff81e93ba0 t jpeg_v2_0_hw_init +ffffffff81e93c20 t jpeg_v2_0_hw_fini +ffffffff81e93d00 t jpeg_v2_0_suspend +ffffffff81e93d30 t jpeg_v2_0_resume +ffffffff81e93dc0 t jpeg_v2_0_is_idle +ffffffff81e93e50 t jpeg_v2_0_wait_for_idle +ffffffff81e93e90 t jpeg_v2_0_set_clockgating_state +ffffffff81e93f40 t jpeg_v2_0_set_powergating_state +ffffffff81e94660 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e946f0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e94790 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e94830 t jpeg_v2_0_set_interrupt_state +ffffffff81e94860 t jpeg_v2_0_process_interrupt +ffffffff81e948f0 t jpeg_v2_0_enable_clock_gating +ffffffff81e94aa0 t jpeg_v2_0_disable_clock_gating +ffffffff81e95000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e95150 t jpeg_v2_5_early_init +ffffffff81e95350 t jpeg_v2_5_sw_init +ffffffff81e955f0 t jpeg_v2_5_sw_fini +ffffffff81e95640 t jpeg_v2_5_hw_init +ffffffff81e95730 t jpeg_v2_5_hw_fini +ffffffff81e958b0 t jpeg_v2_5_suspend +ffffffff81e958e0 t jpeg_v2_5_resume +ffffffff81e959e0 t jpeg_v2_5_is_idle +ffffffff81e95ae0 t jpeg_v2_5_wait_for_idle +ffffffff81e95b90 t jpeg_v2_5_set_clockgating_state +ffffffff81e95c40 t jpeg_v2_5_set_powergating_state +ffffffff81e96370 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e96410 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e964c0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e96570 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e96730 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e968f0 t jpeg_v2_5_set_interrupt_state +ffffffff81e96920 t jpeg_v2_5_process_interrupt +ffffffff81e969e0 t jpeg_v2_6_set_ras_interrupt_state +ffffffff81e96a10 t jpeg_v2_5_enable_clock_gating +ffffffff81e96af0 t jpeg_v2_5_disable_clock_gating +ffffffff81e97000 t jpeg_v3_0_early_init +ffffffff81e97110 t jpeg_v3_0_sw_init +ffffffff81e97240 t jpeg_v3_0_sw_fini +ffffffff81e97290 t jpeg_v3_0_hw_init +ffffffff81e97310 t jpeg_v3_0_hw_fini +ffffffff81e973f0 t jpeg_v3_0_suspend +ffffffff81e97420 t jpeg_v3_0_resume +ffffffff81e974b0 t jpeg_v3_0_is_idle +ffffffff81e97540 t jpeg_v3_0_wait_for_idle +ffffffff81e97580 t jpeg_v3_0_set_clockgating_state +ffffffff81e97630 t jpeg_v3_0_set_powergating_state +ffffffff81e97e10 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e97ea0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e97f40 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e97fe0 t jpeg_v3_0_set_interrupt_state +ffffffff81e98010 t jpeg_v3_0_process_interrupt +ffffffff81e980a0 t jpeg_v3_0_enable_clock_gating +ffffffff81e98170 t jpeg_v3_0_disable_clock_gating +ffffffff81e99000 t jpeg_v4_0_query_ras_poison_status +ffffffff81e99150 t jpeg_v4_0_early_init +ffffffff81e99220 t jpeg_v4_0_sw_init +ffffffff81e993c0 t jpeg_v4_0_sw_fini +ffffffff81e99410 t jpeg_v4_0_hw_init +ffffffff81e99a40 t jpeg_v4_0_hw_fini +ffffffff81e99b10 t jpeg_v4_0_suspend +ffffffff81e99b40 t jpeg_v4_0_resume +ffffffff81e99b90 t jpeg_v4_0_is_idle +ffffffff81e99c20 t jpeg_v4_0_wait_for_idle +ffffffff81e99c60 t jpeg_v4_0_set_clockgating_state +ffffffff81e99d10 t jpeg_v4_0_set_powergating_state +ffffffff81e9a470 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81e9a500 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81e9a5a0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81e9a640 t jpeg_v4_0_set_interrupt_state +ffffffff81e9a670 t jpeg_v4_0_process_interrupt +ffffffff81e9a710 t jpeg_v4_0_set_ras_interrupt_state +ffffffff81e9a740 t jpeg_v4_0_enable_clock_gating +ffffffff81e9a900 t jpeg_v4_0_disable_clock_gating +ffffffff81e9b000 t jpeg_v4_0_3_early_init +ffffffff81e9b170 t jpeg_v4_0_3_sw_init +ffffffff81e9b4a0 t jpeg_v4_0_3_sw_fini +ffffffff81e9b4f0 t jpeg_v4_0_3_hw_init +ffffffff81e9bf50 t jpeg_v4_0_3_hw_fini +ffffffff81e9bfe0 t jpeg_v4_0_3_suspend +ffffffff81e9c060 t jpeg_v4_0_3_resume +ffffffff81e9c0b0 t jpeg_v4_0_3_is_idle +ffffffff81e9c290 t jpeg_v4_0_3_wait_for_idle +ffffffff81e9c3e0 t jpeg_v4_0_3_set_clockgating_state +ffffffff81e9c470 t jpeg_v4_0_3_set_powergating_state +ffffffff81e9d0d0 t jpeg_v4_0_3_dec_ring_get_rptr +ffffffff81e9d240 t jpeg_v4_0_3_dec_ring_get_wptr +ffffffff81e9d3d0 t jpeg_v4_0_3_dec_ring_set_wptr +ffffffff81e9d570 t jpeg_v4_0_3_dec_ring_emit_ib +ffffffff81e9ddd0 t jpeg_v4_0_3_dec_ring_emit_fence +ffffffff81e9e560 t jpeg_v4_0_3_dec_ring_emit_vm_flush +ffffffff81e9e5d0 t jpeg_v4_0_3_dec_ring_nop +ffffffff81e9e730 t jpeg_v4_0_3_dec_ring_insert_start +ffffffff81e9e8d0 t jpeg_v4_0_3_dec_ring_insert_end +ffffffff81e9ea70 t jpeg_v4_0_3_dec_ring_emit_wreg +ffffffff81e9ecb0 t jpeg_v4_0_3_dec_ring_emit_reg_wait +ffffffff81e9f060 t jpeg_v4_0_3_set_interrupt_state +ffffffff81e9f090 t jpeg_v4_0_3_process_interrupt +ffffffff81e9f2d0 t jpeg_v4_0_3_query_ras_error_count +ffffffff81e9f3c0 t jpeg_v4_0_3_reset_ras_error_count +ffffffff81e9f4b0 t jpeg_v4_0_3_disable_clock_gating +ffffffff81ea0000 t lsdma_v6_0_copy_mem +ffffffff81ea0370 t lsdma_v6_0_fill_mem +ffffffff81ea0660 t lsdma_v6_0_update_memory_power_gating +ffffffff81ea1000 t mca_v3_0_ras_block_match +ffffffff81ea1050 t mca_v3_0_mp0_query_ras_error_count +ffffffff81ea1070 t mca_v3_0_mp1_query_ras_error_count +ffffffff81ea1090 t mca_v3_0_mpio_query_ras_error_count +ffffffff81ea2000 t mes_v10_0_early_init +ffffffff81ea2060 t mes_v10_0_late_init +ffffffff81ea20b0 t mes_v10_1_sw_init +ffffffff81ea2550 t mes_v10_1_sw_fini +ffffffff81ea2670 t mes_v10_1_hw_init +ffffffff81ea2f60 t mes_v10_1_hw_fini +ffffffff81ea3050 t mes_v10_1_suspend +ffffffff81ea3160 t mes_v10_1_resume +ffffffff81ea31b0 t mes_v10_1_kiq_hw_init +ffffffff81ea35c0 t mes_v10_1_add_hw_queue +ffffffff81ea3740 t mes_v10_1_remove_hw_queue +ffffffff81ea37d0 t mes_v10_1_unmap_legacy_queue +ffffffff81ea38c0 t mes_v10_1_suspend_gang +ffffffff81ea38f0 t mes_v10_1_resume_gang +ffffffff81ea3920 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81ea3b20 t mes_v10_1_load_microcode +ffffffff81ea4340 t mes_v10_1_enable +ffffffff81ea47c0 t mes_v10_1_queue_init +ffffffff81ea4a60 t amdgpu_bo_unreserve +ffffffff81ea4b40 t mes_v10_1_ring_get_rptr +ffffffff81ea4b70 t mes_v10_1_ring_get_wptr +ffffffff81ea4be0 t mes_v10_1_ring_set_wptr +ffffffff81ea5000 t mes_v11_0_early_init +ffffffff81ea5060 t mes_v11_0_late_init +ffffffff81ea50d0 t mes_v11_0_sw_init +ffffffff81ea5570 t mes_v11_0_sw_fini +ffffffff81ea5730 t mes_v11_0_hw_init +ffffffff81ea5f60 t mes_v11_0_hw_fini +ffffffff81ea5f90 t mes_v11_0_suspend +ffffffff81ea5fa0 t mes_v11_0_resume +ffffffff81ea5ff0 t mes_v11_0_kiq_hw_init +ffffffff81ea6200 t mes_v11_0_kiq_hw_fini +ffffffff81ea6340 t mes_v11_0_add_hw_queue +ffffffff81ea6540 t mes_v11_0_remove_hw_queue +ffffffff81ea65d0 t mes_v11_0_unmap_legacy_queue +ffffffff81ea66d0 t mes_v11_0_suspend_gang +ffffffff81ea6700 t mes_v11_0_resume_gang +ffffffff81ea6730 t mes_v11_0_misc_op +ffffffff81ea68f0 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff81ea6b10 t mes_v11_0_load_microcode +ffffffff81ea72a0 t mes_v11_0_enable +ffffffff81ea77b0 t mes_v11_0_queue_init +ffffffff81ea8250 t amdgpu_bo_unreserve +ffffffff81ea8330 t mes_v11_0_mqd_init +ffffffff81ea8520 t mes_v11_0_kiq_dequeue +ffffffff81ea8960 t mes_v11_0_ring_get_rptr +ffffffff81ea8990 t mes_v11_0_ring_get_wptr +ffffffff81ea8a00 t mes_v11_0_ring_set_wptr +ffffffff81ea9000 t mmhub_v1_0_query_ras_error_count +ffffffff81ea9150 t mmhub_v1_0_reset_ras_error_count +ffffffff81ea9200 t mmhub_v1_0_get_fb_location +ffffffff81ea9320 t mmhub_v1_0_init +ffffffff81ea93d0 t mmhub_v1_0_gart_enable +ffffffff81eaa710 t mmhub_v1_0_set_fault_enable_default +ffffffff81eaa830 t mmhub_v1_0_gart_disable +ffffffff81eaaad0 t mmhub_v1_0_set_clockgating +ffffffff81eaaf60 t mmhub_v1_0_get_clockgating +ffffffff81eab080 t mmhub_v1_0_setup_vm_pt_regs +ffffffff81eab1c0 t mmhub_v1_0_update_power_gating +ffffffff81eac000 t mmhub_v1_7_query_ras_error_count +ffffffff81eac150 t mmhub_v1_7_query_ras_error_status +ffffffff81eac230 t mmhub_v1_7_reset_ras_error_count +ffffffff81eac2d0 t mmhub_v1_7_reset_ras_error_status +ffffffff81eac3d0 t mmhub_v1_7_get_fb_location +ffffffff81eac4f0 t mmhub_v1_7_init +ffffffff81eac590 t mmhub_v1_7_gart_enable +ffffffff81eadaa0 t mmhub_v1_7_set_fault_enable_default +ffffffff81eadbc0 t mmhub_v1_7_gart_disable +ffffffff81eade60 t mmhub_v1_7_set_clockgating +ffffffff81eae200 t mmhub_v1_7_get_clockgating +ffffffff81eae320 t mmhub_v1_7_setup_vm_pt_regs +ffffffff81eaf000 t mmhub_v1_8_get_fb_location +ffffffff81eaf120 t mmhub_v1_8_init +ffffffff81eaf280 t mmhub_v1_8_gart_enable +ffffffff81eb0e90 t mmhub_v1_8_set_fault_enable_default +ffffffff81eb1060 t mmhub_v1_8_gart_disable +ffffffff81eb13a0 t mmhub_v1_8_set_clockgating +ffffffff81eb13d0 t mmhub_v1_8_get_clockgating +ffffffff81eb1400 t mmhub_v1_8_setup_vm_pt_regs +ffffffff81eb1610 t mmhub_v1_8_query_ras_error_count +ffffffff81eb1770 t mmhub_v1_8_query_ras_error_status +ffffffff81eb1a20 t mmhub_v1_8_reset_ras_error_count +ffffffff81eb1b30 t mmhub_v1_8_reset_ras_error_status +ffffffff81eb3000 t mmhub_v2_0_init +ffffffff81eb30d0 t mmhub_v2_0_gart_enable +ffffffff81eb4290 t mmhub_v2_0_set_fault_enable_default +ffffffff81eb43b0 t mmhub_v2_0_gart_disable +ffffffff81eb4640 t mmhub_v2_0_set_clockgating +ffffffff81eb4990 t mmhub_v2_0_get_clockgating +ffffffff81eb4b20 t mmhub_v2_0_setup_vm_pt_regs +ffffffff81eb4c60 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff81eb4eb0 t mmhub_v2_0_get_invalidate_req +ffffffff81eb5000 t mmhub_v2_3_init +ffffffff81eb50e0 t mmhub_v2_3_gart_enable +ffffffff81eb64b0 t mmhub_v2_3_set_fault_enable_default +ffffffff81eb65b0 t mmhub_v2_3_gart_disable +ffffffff81eb6850 t mmhub_v2_3_set_clockgating +ffffffff81eb6cf0 t mmhub_v2_3_get_clockgating +ffffffff81eb6ee0 t mmhub_v2_3_setup_vm_pt_regs +ffffffff81eb7020 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff81eb7230 t mmhub_v2_3_get_invalidate_req +ffffffff81eb8000 t mmhub_v3_0_get_fb_location +ffffffff81eb8090 t mmhub_v3_0_get_mc_fb_offset +ffffffff81eb8120 t mmhub_v3_0_init +ffffffff81eb8200 t mmhub_v3_0_gart_enable +ffffffff81eb9420 t mmhub_v3_0_set_fault_enable_default +ffffffff81eb9540 t mmhub_v3_0_gart_disable +ffffffff81eb97d0 t mmhub_v3_0_set_clockgating +ffffffff81eb99a0 t mmhub_v3_0_get_clockgating +ffffffff81eb9a50 t mmhub_v3_0_setup_vm_pt_regs +ffffffff81eb9b90 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff81eb9d90 t mmhub_v3_0_get_invalidate_req +ffffffff81eba000 t mmhub_v3_0_1_get_fb_location +ffffffff81eba090 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff81eba120 t mmhub_v3_0_1_init +ffffffff81eba1f0 t mmhub_v3_0_1_gart_enable +ffffffff81ebb4f0 t mmhub_v3_0_1_set_fault_enable_default +ffffffff81ebb5f0 t mmhub_v3_0_1_gart_disable +ffffffff81ebb890 t mmhub_v3_0_1_set_clockgating +ffffffff81ebba50 t mmhub_v3_0_1_get_clockgating +ffffffff81ebbb00 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff81ebbc40 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff81ebbe40 t mmhub_v3_0_1_get_invalidate_req +ffffffff81ebc000 t mmhub_v3_0_2_get_fb_location +ffffffff81ebc090 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff81ebc120 t mmhub_v3_0_2_init +ffffffff81ebc1f0 t mmhub_v3_0_2_gart_enable +ffffffff81ebd3e0 t mmhub_v3_0_2_set_fault_enable_default +ffffffff81ebd500 t mmhub_v3_0_2_gart_disable +ffffffff81ebd790 t mmhub_v3_0_2_set_clockgating +ffffffff81ebd7c0 t mmhub_v3_0_2_get_clockgating +ffffffff81ebd7f0 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff81ebd930 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff81ebdb10 t mmhub_v3_0_2_get_invalidate_req +ffffffff81ebe000 t mmhub_v9_4_query_ras_error_count +ffffffff81ebe150 t mmhub_v9_4_query_ras_error_status +ffffffff81ebe230 t mmhub_v9_4_reset_ras_error_count +ffffffff81ebe300 t mmhub_v9_4_get_fb_location +ffffffff81ebe420 t mmhub_v9_4_init +ffffffff81ebe570 t mmhub_v9_4_gart_enable +ffffffff81ebfa00 t mmhub_v9_4_set_fault_enable_default +ffffffff81ebfbf0 t mmhub_v9_4_gart_disable +ffffffff81ebff60 t mmhub_v9_4_set_clockgating +ffffffff81ec0440 t mmhub_v9_4_get_clockgating +ffffffff81ec0570 t mmhub_v9_4_setup_vm_pt_regs +ffffffff81ec05c0 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff81ec1000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff81ec1050 T xgpu_ai_mailbox_add_irq_id +ffffffff81ec10e0 T xgpu_ai_mailbox_get_irq +ffffffff81ec1190 t xgpu_ai_mailbox_flr_work +ffffffff81ec1390 T xgpu_ai_mailbox_put_irq +ffffffff81ec13d0 t xgpu_ai_request_full_gpu_access +ffffffff81ec13f0 t xgpu_ai_release_full_gpu_access +ffffffff81ec1410 t xgpu_ai_request_init_data +ffffffff81ec1470 t xgpu_ai_request_reset +ffffffff81ec1520 t xgpu_ai_mailbox_trans_msg +ffffffff81ec1740 t xgpu_ai_ras_poison_handler +ffffffff81ec1770 t xgpu_ai_set_mailbox_ack_irq +ffffffff81ec1800 t xgpu_ai_mailbox_ack_irq +ffffffff81ec1850 t xgpu_ai_set_mailbox_rcv_irq +ffffffff81ec18e0 t xgpu_ai_mailbox_rcv_irq +ffffffff81ec19c0 t xgpu_ai_send_access_requests +ffffffff81ec1ab0 t xgpu_ai_poll_msg +ffffffff81ec2000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81ec2050 T xgpu_nv_mailbox_add_irq_id +ffffffff81ec20e0 T xgpu_nv_mailbox_get_irq +ffffffff81ec2190 t xgpu_nv_mailbox_flr_work +ffffffff81ec23b0 T xgpu_nv_mailbox_put_irq +ffffffff81ec23f0 t xgpu_nv_request_full_gpu_access +ffffffff81ec2410 t xgpu_nv_release_full_gpu_access +ffffffff81ec2430 t xgpu_nv_request_init_data +ffffffff81ec2450 t xgpu_nv_request_reset +ffffffff81ec2550 t xgpu_nv_mailbox_trans_msg +ffffffff81ec26f0 t xgpu_nv_ras_poison_handler +ffffffff81ec2710 t xgpu_nv_set_mailbox_ack_irq +ffffffff81ec2790 t xgpu_nv_mailbox_ack_irq +ffffffff81ec27e0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81ec2860 t xgpu_nv_mailbox_rcv_irq +ffffffff81ec2910 t xgpu_nv_send_access_requests +ffffffff81ec3000 T xgpu_vi_init_golden_registers +ffffffff81ec30c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81ec3110 T xgpu_vi_mailbox_add_irq_id +ffffffff81ec31a0 T xgpu_vi_mailbox_get_irq +ffffffff81ec3250 t xgpu_vi_mailbox_flr_work +ffffffff81ec33a0 T xgpu_vi_mailbox_put_irq +ffffffff81ec33e0 t xgpu_vi_request_full_gpu_access +ffffffff81ec3400 t xgpu_vi_release_full_gpu_access +ffffffff81ec3420 t xgpu_vi_request_reset +ffffffff81ec3440 t xgpu_vi_wait_reset_cmpl +ffffffff81ec3520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81ec35a0 t xgpu_vi_mailbox_ack_irq +ffffffff81ec35f0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81ec3670 t xgpu_vi_mailbox_rcv_irq +ffffffff81ec3720 t xgpu_vi_mailbox_rcv_msg +ffffffff81ec3840 t xgpu_vi_send_access_requests +ffffffff81ec4000 t navi10_ih_early_init +ffffffff81ec4060 t navi10_ih_sw_init +ffffffff81ec41d0 t navi10_ih_sw_fini +ffffffff81ec4210 t navi10_ih_hw_init +ffffffff81ec4630 t navi10_ih_hw_fini +ffffffff81ec4690 t navi10_ih_suspend +ffffffff81ec46f0 t navi10_ih_resume +ffffffff81ec4700 t navi10_ih_is_idle +ffffffff81ec4730 t navi10_ih_wait_for_idle +ffffffff81ec4760 t navi10_ih_soft_reset +ffffffff81ec4790 t navi10_ih_set_clockgating_state +ffffffff81ec48c0 t navi10_ih_set_powergating_state +ffffffff81ec48f0 t navi10_ih_get_clockgating_state +ffffffff81ec4980 t navi10_ih_get_wptr +ffffffff81ec4a90 t navi10_ih_set_rptr +ffffffff81ec4b60 t navi10_ih_self_irq +ffffffff81ec4be0 t navi10_ih_toggle_interrupts +ffffffff81ec4d50 t force_update_wptr_for_self_int +ffffffff81ec6000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff81ec6040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff81ec6080 t nbio_v2_3_get_pcie_index_offset +ffffffff81ec60c0 t nbio_v2_3_get_pcie_data_offset +ffffffff81ec6100 t nbio_v2_3_get_rev_id +ffffffff81ec6160 t nbio_v2_3_mc_access_enable +ffffffff81ec6210 t nbio_v2_3_get_memsize +ffffffff81ec6280 t nbio_v2_3_sdma_doorbell_range +ffffffff81ec6320 t nbio_v2_3_vcn_doorbell_range +ffffffff81ec63a0 t nbio_v2_3_enable_doorbell_aperture +ffffffff81ec64a0 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff81ec6610 t nbio_v2_3_ih_doorbell_range +ffffffff81ec6730 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff81ec67d0 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff81ec6870 t nbio_v2_3_get_clockgating_state +ffffffff81ec68f0 t nbio_v2_3_ih_control +ffffffff81ec6a40 t nbio_v2_3_init_registers +ffffffff81ec6ad0 t nbio_v2_3_remap_hdp_registers +ffffffff81ec6be0 t nbio_v2_3_enable_aspm +ffffffff81ec6c80 t nbio_v2_3_program_aspm +ffffffff81ec7330 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff81ec73c0 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff81ec7430 t nbio_v2_3_clear_doorbell_interrupt +ffffffff81ec8000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff81ec8040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff81ec8080 t nbio_v4_3_get_pcie_index_offset +ffffffff81ec80b0 t nbio_v4_3_get_pcie_data_offset +ffffffff81ec80f0 t nbio_v4_3_get_rev_id +ffffffff81ec8180 t nbio_v4_3_mc_access_enable +ffffffff81ec8230 t nbio_v4_3_get_memsize +ffffffff81ec82a0 t nbio_v4_3_sdma_doorbell_range +ffffffff81ec8410 t nbio_v4_3_vcn_doorbell_range +ffffffff81ec85c0 t nbio_v4_3_gc_doorbell_init +ffffffff81ec86b0 t nbio_v4_3_enable_doorbell_aperture +ffffffff81ec87b0 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81ec8920 t nbio_v4_3_ih_doorbell_range +ffffffff81ec8a40 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81ec8b80 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81ec8cb0 t nbio_v4_3_get_clockgating_state +ffffffff81ec8dc0 t nbio_v4_3_ih_control +ffffffff81ec8f10 t nbio_v4_3_init_registers +ffffffff81ec9040 t nbio_v4_3_remap_hdp_registers +ffffffff81ec9150 t nbio_v4_3_program_aspm +ffffffff81ec9e50 t nbio_v4_3_get_rom_offset +ffffffff81ec9ee0 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81ec9f10 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81ec9f40 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81ec9f70 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81ec9fa0 t nbio_v4_3_handle_ras_err_event_athub_intr_no_bifring +ffffffff81eca0b0 t nbio_v4_3_init_ras_err_event_athub_interrupt +ffffffff81eca0f0 t nbio_v4_3_set_ras_err_event_athub_irq_state +ffffffff81eca200 t nbio_v4_3_process_err_event_athub_irq +ffffffff81ecb000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81ecb040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81ecb080 t nbio_v6_1_get_pcie_index_offset +ffffffff81ecb0c0 t nbio_v6_1_get_pcie_data_offset +ffffffff81ecb100 t nbio_v6_1_get_rev_id +ffffffff81ecb190 t nbio_v6_1_mc_access_enable +ffffffff81ecb240 t nbio_v6_1_get_memsize +ffffffff81ecb2b0 t nbio_v6_1_sdma_doorbell_range +ffffffff81ecb340 t nbio_v6_1_enable_doorbell_aperture +ffffffff81ecb440 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff81ecb5b0 t nbio_v6_1_ih_doorbell_range +ffffffff81ecb6d0 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff81ecb770 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff81ecb810 t nbio_v6_1_get_clockgating_state +ffffffff81ecb890 t nbio_v6_1_ih_control +ffffffff81ecb9e0 t nbio_v6_1_init_registers +ffffffff81ecbab0 t nbio_v6_1_remap_hdp_registers +ffffffff81ecbbc0 t nbio_v6_1_program_aspm +ffffffff81ecc000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff81ecc040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff81ecc080 t nbio_v7_0_get_pcie_index_offset +ffffffff81ecc0c0 t nbio_v7_0_get_pcie_data_offset +ffffffff81ecc100 t nbio_v7_0_get_rev_id +ffffffff81ecc190 t nbio_v7_0_mc_access_enable +ffffffff81ecc240 t nbio_v7_0_get_memsize +ffffffff81ecc2b0 t nbio_v7_0_sdma_doorbell_range +ffffffff81ecc340 t nbio_v7_0_vcn_doorbell_range +ffffffff81ecc3c0 t nbio_v7_0_enable_doorbell_aperture +ffffffff81ecc4c0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff81ecc4f0 t nbio_v7_0_ih_doorbell_range +ffffffff81ecc610 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff81ecc740 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff81ecc7e0 t nbio_v7_0_get_clockgating_state +ffffffff81ecc860 t nbio_v7_0_ih_control +ffffffff81ecc9b0 t nbio_v7_0_init_registers +ffffffff81ecca00 t nbio_v7_0_remap_hdp_registers +ffffffff81eccb10 t nbio_7_0_read_syshub_ind_mmr +ffffffff81eccbe0 t nbio_7_0_write_syshub_ind_mmr +ffffffff81ecd000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff81ecd040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff81ecd080 t nbio_v7_2_get_pcie_index_offset +ffffffff81ecd0c0 t nbio_v7_2_get_pcie_data_offset +ffffffff81ecd100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff81ecd130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff81ecd170 t nbio_v7_2_get_rev_id +ffffffff81ecd250 t nbio_v7_2_mc_access_enable +ffffffff81ecd390 t nbio_v7_2_get_memsize +ffffffff81ecd400 t nbio_v7_2_sdma_doorbell_range +ffffffff81ecd4a0 t nbio_v7_2_vcn_doorbell_range +ffffffff81ecd520 t nbio_v7_2_enable_doorbell_aperture +ffffffff81ecd600 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff81ecd770 t nbio_v7_2_ih_doorbell_range +ffffffff81ecd800 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff81ecd8c0 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff81ecda50 t nbio_v7_2_get_clockgating_state +ffffffff81ecdae0 t nbio_v7_2_ih_control +ffffffff81ecdc30 t nbio_v7_2_init_registers +ffffffff81ecddf0 t nbio_v7_2_remap_hdp_registers +ffffffff81ece000 t nbio_v7_4_query_ras_error_count +ffffffff81ece1a0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff81ece3e0 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff81ece590 t nbio_v7_4_init_ras_controller_interrupt +ffffffff81ece5d0 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff81ece610 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff81ece650 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff81ece690 t nbio_v7_4_get_pcie_index_offset +ffffffff81ece6d0 t nbio_v7_4_get_pcie_data_offset +ffffffff81ece710 t nbio_v7_4_get_rev_id +ffffffff81ece7e0 t nbio_v7_4_mc_access_enable +ffffffff81ece890 t nbio_v7_4_get_memsize +ffffffff81ece900 t nbio_v7_4_sdma_doorbell_range +ffffffff81ece9d0 t nbio_v7_4_vcn_doorbell_range +ffffffff81ecea70 t nbio_v7_4_enable_doorbell_aperture +ffffffff81eceb70 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff81ecece0 t nbio_v7_4_ih_doorbell_range +ffffffff81ecee00 t nbio_v7_4_enable_doorbell_interrupt +ffffffff81ecef50 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff81ecef80 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff81ecf020 t nbio_v7_4_get_clockgating_state +ffffffff81ecf0a0 t nbio_v7_4_ih_control +ffffffff81ecf1f0 t nbio_v7_4_init_registers +ffffffff81ecf2e0 t nbio_v7_4_remap_hdp_registers +ffffffff81ecf3f0 t nbio_v7_4_program_aspm +ffffffff81ecf800 t nbio_v7_4_set_ras_controller_irq_state +ffffffff81ecf990 t nbio_v7_4_process_ras_controller_irq +ffffffff81ecf9c0 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff81ecfb50 t nbio_v7_4_process_err_event_athub_irq +ffffffff81ed0000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff81ed0040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff81ed0080 t nbio_v7_7_get_pcie_index_offset +ffffffff81ed00c0 t nbio_v7_7_get_pcie_data_offset +ffffffff81ed0100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff81ed0130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81ed0170 t nbio_v7_7_get_rev_id +ffffffff81ed0200 t nbio_v7_7_mc_access_enable +ffffffff81ed02b0 t nbio_v7_7_get_memsize +ffffffff81ed0320 t nbio_v7_7_sdma_doorbell_range +ffffffff81ed03b0 t nbio_v7_7_vcn_doorbell_range +ffffffff81ed0430 t nbio_v7_7_enable_doorbell_aperture +ffffffff81ed0510 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81ed0680 t nbio_v7_7_ih_doorbell_range +ffffffff81ed07a0 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81ed08e0 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81ed0af0 t nbio_v7_7_get_clockgating_state +ffffffff81ed0c00 t nbio_v7_7_ih_control +ffffffff81ed0d50 t nbio_v7_7_init_registers +ffffffff81ed0e70 t nbio_v7_7_remap_hdp_registers +ffffffff81ed1000 t nbio_v7_9_get_hdp_flush_req_offset +ffffffff81ed1040 t nbio_v7_9_get_hdp_flush_done_offset +ffffffff81ed1080 t nbio_v7_9_get_pcie_index_offset +ffffffff81ed10c0 t nbio_v7_9_get_pcie_data_offset +ffffffff81ed1100 t nbio_v7_9_get_pcie_index_hi_offset +ffffffff81ed1140 t nbio_v7_9_get_rev_id +ffffffff81ed11d0 t nbio_v7_9_mc_access_enable +ffffffff81ed1280 t nbio_v7_9_get_memsize +ffffffff81ed12f0 t nbio_v7_9_sdma_doorbell_range +ffffffff81ed1630 t nbio_v7_9_vcn_doorbell_range +ffffffff81ed17c0 t nbio_v7_9_enable_doorbell_aperture +ffffffff81ed1930 t nbio_v7_9_enable_doorbell_selfring_aperture +ffffffff81ed1aa0 t nbio_v7_9_ih_doorbell_range +ffffffff81ed1ba0 t nbio_v7_9_enable_doorbell_interrupt +ffffffff81ed1cb0 t nbio_v7_9_update_medium_grain_clock_gating +ffffffff81ed1ce0 t nbio_v7_9_update_medium_grain_light_sleep +ffffffff81ed1d10 t nbio_v7_9_get_clockgating_state +ffffffff81ed1d40 t nbio_v7_9_ih_control +ffffffff81ed1e90 t nbio_v7_9_init_registers +ffffffff81ed21a0 t nbio_v7_9_remap_hdp_registers +ffffffff81ed22b0 t nbio_v7_9_get_compute_partition_mode +ffffffff81ed2340 t nbio_v7_9_get_memory_partition_mode +ffffffff81ed2430 t nbio_v7_9_get_pcie_replay_count +ffffffff81ed2490 t nbio_v7_9_get_pcie_usage +ffffffff81ed25f0 t nbio_v7_9_query_ras_error_count +ffffffff81ed2620 t nbio_v7_9_handle_ras_controller_intr_no_bifring +ffffffff81ed2740 t nbio_v7_9_handle_ras_err_event_athub_intr_no_bifring +ffffffff81ed2850 t nbio_v7_9_init_ras_controller_interrupt +ffffffff81ed2890 t nbio_v7_9_init_ras_err_event_athub_interrupt +ffffffff81ed28d0 t nbio_v7_9_set_ras_controller_irq_state +ffffffff81ed2900 t nbio_v7_9_process_ras_controller_irq +ffffffff81ed2930 t nbio_v7_9_set_ras_err_event_athub_irq_state +ffffffff81ed2960 t nbio_v7_9_process_err_event_athub_irq +ffffffff81ed3000 T nv_grbm_select +ffffffff81ed30a0 T nv_set_virt_ops +ffffffff81ed30e0 t nv_common_early_init +ffffffff81ed34d0 t nv_common_late_init +ffffffff81ed3580 t nv_common_sw_init +ffffffff81ed35c0 t nv_common_sw_fini +ffffffff81ed35f0 t nv_common_hw_init +ffffffff81ed36f0 t nv_common_hw_fini +ffffffff81ed3750 t nv_common_suspend +ffffffff81ed37b0 t nv_common_resume +ffffffff81ed37f0 t nv_common_is_idle +ffffffff81ed3820 t nv_common_wait_for_idle +ffffffff81ed3850 t nv_common_soft_reset +ffffffff81ed3880 t nv_common_set_clockgating_state +ffffffff81ed3950 t nv_common_set_powergating_state +ffffffff81ed3980 t nv_common_get_clockgating_state +ffffffff81ed39f0 t nv_didt_rreg +ffffffff81ed3a90 t nv_didt_wreg +ffffffff81ed3b10 t nv_read_disabled_bios +ffffffff81ed3b40 t nv_read_register +ffffffff81ed3c30 t nv_asic_reset +ffffffff81ed3d70 t nv_asic_reset_method +ffffffff81ed3e60 t nv_get_xclk +ffffffff81ed3e90 t nv_set_uvd_clocks +ffffffff81ed3ec0 t nv_set_vce_clocks +ffffffff81ed3ef0 t nv_get_config_memsize +ffffffff81ed3f10 t nv_need_full_reset +ffffffff81ed3f40 t nv_init_doorbell_index +ffffffff81ed4070 t nv_need_reset_on_init +ffffffff81ed4110 t nv_pre_asic_init +ffffffff81ed4140 t nv_update_umd_stable_pstate +ffffffff81ed4200 t nv_query_video_codecs +ffffffff81ed5000 T psp_v10_0_set_psp_funcs +ffffffff81ed5030 t psp_v10_0_init_microcode +ffffffff81ed50f0 t psp_v10_0_ring_create +ffffffff81ed5400 t psp_v10_0_ring_stop +ffffffff81ed55f0 t psp_v10_0_ring_destroy +ffffffff81ed5670 t psp_v10_0_mode1_reset +ffffffff81ed56c0 t psp_v10_0_ring_get_wptr +ffffffff81ed5720 t psp_v10_0_ring_set_wptr +ffffffff81ed6000 T psp_v11_0_set_psp_funcs +ffffffff81ed6030 t psp_v11_0_init_microcode +ffffffff81ed6180 t psp_v11_0_bootloader_load_kdb +ffffffff81ed61a0 t psp_v11_0_bootloader_load_spl +ffffffff81ed61c0 t psp_v11_0_bootloader_load_sysdrv +ffffffff81ed61e0 t psp_v11_0_bootloader_load_sos +ffffffff81ed6540 t psp_v11_0_ring_create +ffffffff81ed6be0 t psp_v11_0_ring_stop +ffffffff81ed6e00 t psp_v11_0_ring_destroy +ffffffff81ed6e80 t psp_v11_0_mode1_reset +ffffffff81ed6f80 t psp_v11_0_memory_training +ffffffff81ed7400 t psp_v11_0_ring_get_wptr +ffffffff81ed7450 t psp_v11_0_ring_set_wptr +ffffffff81ed7590 t psp_v11_0_load_usbc_pd_fw +ffffffff81ed7780 t psp_v11_0_read_usbc_pd_fw +ffffffff81ed78a0 t psp_v11_0_bootloader_load_component +ffffffff81ed7a60 t psp_v11_0_wait_for_bootloader +ffffffff81ed7c30 t psp_v11_0_memory_training_send_msg +ffffffff81ed8000 T psp_v11_0_8_set_psp_funcs +ffffffff81ed8030 t psp_v11_0_8_ring_create +ffffffff81ed86d0 t psp_v11_0_8_ring_stop +ffffffff81ed8a60 t psp_v11_0_8_ring_destroy +ffffffff81ed8ae0 t psp_v11_0_8_ring_get_wptr +ffffffff81ed8b50 t psp_v11_0_8_ring_set_wptr +ffffffff81ed9000 T psp_v12_0_set_psp_funcs +ffffffff81ed9030 t psp_v12_0_init_microcode +ffffffff81ed90e0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81ed9410 t psp_v12_0_bootloader_load_sos +ffffffff81ed9790 t psp_v12_0_ring_create +ffffffff81eda190 t psp_v12_0_ring_stop +ffffffff81eda3b0 t psp_v12_0_ring_destroy +ffffffff81eda430 t psp_v12_0_mode1_reset +ffffffff81eda530 t psp_v12_0_ring_get_wptr +ffffffff81eda5a0 t psp_v12_0_ring_set_wptr +ffffffff81edb000 T psp_v13_0_set_psp_funcs +ffffffff81edb030 t psp_v13_0_init_microcode +ffffffff81edb130 t psp_v13_0_wait_for_bootloader_steady_state +ffffffff81edb240 t psp_v13_0_bootloader_load_kdb +ffffffff81edb260 t psp_v13_0_bootloader_load_spl +ffffffff81edb280 t psp_v13_0_bootloader_load_sysdrv +ffffffff81edb2a0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81edb2c0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81edb2e0 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81edb300 t psp_v13_0_bootloader_load_ras_drv +ffffffff81edb320 t psp_v13_0_bootloader_load_sos +ffffffff81edb6f0 t psp_v13_0_ring_create +ffffffff81edbd90 t psp_v13_0_ring_stop +ffffffff81edc120 t psp_v13_0_ring_destroy +ffffffff81edc1a0 t psp_v13_0_memory_training +ffffffff81edc5d0 t psp_v13_0_ring_get_wptr +ffffffff81edc640 t psp_v13_0_ring_set_wptr +ffffffff81edc740 t psp_v13_0_load_usbc_pd_fw +ffffffff81edc930 t psp_v13_0_read_usbc_pd_fw +ffffffff81edca50 t psp_v13_0_update_spirom +ffffffff81edcc30 t psp_v13_0_vbflash_status +ffffffff81edcc90 t psp_v13_0_fatal_error_recovery_quirk +ffffffff81edcdc0 t psp_v13_0_bootloader_load_component +ffffffff81edd030 t psp_v13_0_memory_training_send_msg +ffffffff81edd1a0 t psp_v13_0_exec_spi_cmd +ffffffff81ede000 T psp_v13_0_4_set_psp_funcs +ffffffff81ede030 t psp_v13_0_4_init_microcode +ffffffff81ede0d0 t psp_v13_0_4_bootloader_load_kdb +ffffffff81ede0f0 t psp_v13_0_4_bootloader_load_spl +ffffffff81ede110 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81ede130 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81ede150 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81ede170 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81ede190 t psp_v13_0_4_bootloader_load_sos +ffffffff81ede500 t psp_v13_0_4_ring_create +ffffffff81edebb0 t psp_v13_0_4_ring_stop +ffffffff81edef40 t psp_v13_0_4_ring_destroy +ffffffff81edefc0 t psp_v13_0_4_ring_get_wptr +ffffffff81edf030 t psp_v13_0_4_ring_set_wptr +ffffffff81edf130 t psp_v13_0_4_bootloader_load_component +ffffffff81edf300 t psp_v13_0_4_wait_for_bootloader +ffffffff81ee0000 T psp_v3_1_set_psp_funcs +ffffffff81ee0030 t psp_v3_1_init_microcode +ffffffff81ee00c0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81ee03f0 t psp_v3_1_bootloader_load_sos +ffffffff81ee0770 t psp_v3_1_ring_create +ffffffff81ee1290 t psp_v3_1_ring_stop +ffffffff81ee14b0 t psp_v3_1_ring_destroy +ffffffff81ee1530 t psp_v3_1_smu_reload_quirk +ffffffff81ee1580 t psp_v3_1_mode1_reset +ffffffff81ee1680 t psp_v3_1_ring_get_wptr +ffffffff81ee16d0 t psp_v3_1_ring_set_wptr +ffffffff81ee2000 t sdma_v2_4_early_init +ffffffff81ee20f0 t sdma_v2_4_sw_init +ffffffff81ee24a0 t sdma_v2_4_sw_fini +ffffffff81ee2550 t sdma_v2_4_hw_init +ffffffff81ee28f0 t sdma_v2_4_hw_fini +ffffffff81ee2930 t sdma_v2_4_suspend +ffffffff81ee2970 t sdma_v2_4_resume +ffffffff81ee2980 t sdma_v2_4_is_idle +ffffffff81ee29c0 t sdma_v2_4_wait_for_idle +ffffffff81ee2a60 t sdma_v2_4_soft_reset +ffffffff81ee2ba0 t sdma_v2_4_set_clockgating_state +ffffffff81ee2bd0 t sdma_v2_4_set_powergating_state +ffffffff81ee2c00 t sdma_v2_4_ring_get_rptr +ffffffff81ee2c40 t sdma_v2_4_ring_get_wptr +ffffffff81ee2ca0 t sdma_v2_4_ring_set_wptr +ffffffff81ee2ce0 t sdma_v2_4_ring_emit_ib +ffffffff81ee2f90 t sdma_v2_4_ring_emit_fence +ffffffff81ee3390 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81ee3610 t sdma_v2_4_ring_emit_vm_flush +ffffffff81ee3880 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81ee3b00 t sdma_v2_4_ring_test_ring +ffffffff81ee3de0 t sdma_v2_4_ring_test_ib +ffffffff81ee3fb0 t sdma_v2_4_ring_insert_nop +ffffffff81ee40e0 t sdma_v2_4_ring_pad_ib +ffffffff81ee4210 t sdma_v2_4_ring_emit_wreg +ffffffff81ee4360 t sdma_v2_4_emit_copy_buffer +ffffffff81ee4420 t sdma_v2_4_emit_fill_buffer +ffffffff81ee44b0 t sdma_v2_4_vm_copy_pte +ffffffff81ee4570 t sdma_v2_4_vm_write_pte +ffffffff81ee4640 t sdma_v2_4_vm_set_pte_pde +ffffffff81ee4740 t sdma_v2_4_set_trap_irq_state +ffffffff81ee4800 t sdma_v2_4_process_trap_irq +ffffffff81ee48a0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81ee4920 t sdma_v2_4_enable +ffffffff81ee5000 t sdma_v3_0_early_init +ffffffff81ee5100 t sdma_v3_0_sw_init +ffffffff81ee54c0 t sdma_v3_0_sw_fini +ffffffff81ee5570 t sdma_v3_0_hw_init +ffffffff81ee56a0 t sdma_v3_0_hw_fini +ffffffff81ee56f0 t sdma_v3_0_suspend +ffffffff81ee5740 t sdma_v3_0_resume +ffffffff81ee5750 t sdma_v3_0_is_idle +ffffffff81ee5790 t sdma_v3_0_wait_for_idle +ffffffff81ee5830 t sdma_v3_0_check_soft_reset +ffffffff81ee5890 t sdma_v3_0_pre_soft_reset +ffffffff81ee58e0 t sdma_v3_0_soft_reset +ffffffff81ee59b0 t sdma_v3_0_post_soft_reset +ffffffff81ee5a00 t sdma_v3_0_set_clockgating_state +ffffffff81ee5c60 t sdma_v3_0_set_powergating_state +ffffffff81ee5c90 t sdma_v3_0_get_clockgating_state +ffffffff81ee5d10 t sdma_v3_0_ring_get_rptr +ffffffff81ee5d50 t sdma_v3_0_ring_get_wptr +ffffffff81ee5dd0 t sdma_v3_0_ring_set_wptr +ffffffff81ee5e80 t sdma_v3_0_ring_emit_ib +ffffffff81ee6130 t sdma_v3_0_ring_emit_fence +ffffffff81ee6530 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81ee67b0 t sdma_v3_0_ring_emit_vm_flush +ffffffff81ee6a20 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81ee6ca0 t sdma_v3_0_ring_test_ring +ffffffff81ee6f80 t sdma_v3_0_ring_test_ib +ffffffff81ee7150 t sdma_v3_0_ring_insert_nop +ffffffff81ee7280 t sdma_v3_0_ring_pad_ib +ffffffff81ee73b0 t sdma_v3_0_ring_emit_wreg +ffffffff81ee7500 t sdma_v3_0_emit_copy_buffer +ffffffff81ee75c0 t sdma_v3_0_emit_fill_buffer +ffffffff81ee7650 t sdma_v3_0_vm_copy_pte +ffffffff81ee7710 t sdma_v3_0_vm_write_pte +ffffffff81ee77e0 t sdma_v3_0_vm_set_pte_pde +ffffffff81ee78e0 t sdma_v3_0_set_trap_irq_state +ffffffff81ee79a0 t sdma_v3_0_process_trap_irq +ffffffff81ee7a40 t sdma_v3_0_process_illegal_inst_irq +ffffffff81ee7ac0 t sdma_v3_0_ctx_switch_enable +ffffffff81ee7c60 t sdma_v3_0_enable +ffffffff81ee7dd0 t sdma_v3_0_gfx_resume +ffffffff81ee9000 t sdma_v4_0_early_init +ffffffff81ee92d0 t sdma_v4_0_late_init +ffffffff81ee9570 t sdma_v4_0_sw_init +ffffffff81ee99b0 t sdma_v4_0_sw_fini +ffffffff81ee9a70 t sdma_v4_0_hw_init +ffffffff81eec9d0 t sdma_v4_0_hw_fini +ffffffff81eeca90 t sdma_v4_0_suspend +ffffffff81eecae0 t sdma_v4_0_resume +ffffffff81eecb60 t sdma_v4_0_is_idle +ffffffff81eecc90 t sdma_v4_0_wait_for_idle +ffffffff81eece30 t sdma_v4_0_soft_reset +ffffffff81eece60 t sdma_v4_0_set_clockgating_state +ffffffff81eed360 t sdma_v4_0_set_powergating_state +ffffffff81eed420 t sdma_v4_0_get_clockgating_state +ffffffff81eed4c0 t sdma_v4_0_query_ras_error_count +ffffffff81eed690 t sdma_v4_0_reset_ras_error_count +ffffffff81eed7e0 t sdma_v4_0_ring_get_rptr +ffffffff81eed840 t sdma_v4_0_ring_get_wptr +ffffffff81eeda30 t sdma_v4_0_ring_set_wptr +ffffffff81eedcb0 t sdma_v4_0_ring_emit_ib +ffffffff81eedf60 t sdma_v4_0_ring_emit_fence +ffffffff81eee380 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81eee3e0 t sdma_v4_0_ring_emit_vm_flush +ffffffff81eee400 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81eee4b0 t sdma_v4_0_ring_test_ring +ffffffff81eee790 t sdma_v4_0_ring_test_ib +ffffffff81eee960 t sdma_v4_0_ring_insert_nop +ffffffff81eeea90 t sdma_v4_0_ring_pad_ib +ffffffff81eeebc0 t sdma_v4_0_ring_emit_wreg +ffffffff81eeed10 t sdma_v4_0_ring_emit_reg_wait +ffffffff81eeed60 t sdma_v4_0_wait_reg_mem +ffffffff81eef070 t sdma_v4_0_page_ring_get_wptr +ffffffff81eef220 t sdma_v4_0_page_ring_set_wptr +ffffffff81eef3e0 t sdma_v4_0_emit_copy_buffer +ffffffff81eef4a0 t sdma_v4_0_emit_fill_buffer +ffffffff81eef530 t sdma_v4_0_vm_copy_pte +ffffffff81eef5f0 t sdma_v4_0_vm_write_pte +ffffffff81eef6c0 t sdma_v4_0_vm_set_pte_pde +ffffffff81eef7c0 t sdma_v4_0_set_trap_irq_state +ffffffff81eef960 t sdma_v4_0_process_trap_irq +ffffffff81eefa90 t sdma_v4_0_process_illegal_inst_irq +ffffffff81eefbb0 t sdma_v4_0_set_ecc_irq_state +ffffffff81eefd50 t sdma_v4_0_process_vm_hole_irq +ffffffff81eefd90 t sdma_v4_0_print_iv_entry +ffffffff81eefed0 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81eeff10 t sdma_v4_0_process_pool_timeout_irq +ffffffff81eeff50 t sdma_v4_0_process_srbm_write_irq +ffffffff81eeff90 t sdma_v4_0_process_ras_data_cb +ffffffff81ef0010 t sdma_v4_0_ctx_switch_enable +ffffffff81ef06e0 t sdma_v4_0_enable +ffffffff81ef0ca0 t sdma_v4_0_gfx_enable +ffffffff81ef2000 t sdma_v4_4_query_ras_error_count +ffffffff81ef2290 t sdma_v4_4_reset_ras_error_count +ffffffff81ef3000 t sdma_v4_4_2_early_init +ffffffff81ef3280 t sdma_v4_4_2_late_init +ffffffff81ef32f0 t sdma_v4_4_2_sw_init +ffffffff81ef3810 t sdma_v4_4_2_sw_fini +ffffffff81ef38c0 t sdma_v4_4_2_hw_init +ffffffff81ef3910 t sdma_v4_4_2_hw_fini +ffffffff81ef39d0 t sdma_v4_4_2_suspend +ffffffff81ef3ab0 t sdma_v4_4_2_resume +ffffffff81ef3b00 t sdma_v4_4_2_is_idle +ffffffff81ef3ba0 t sdma_v4_4_2_wait_for_idle +ffffffff81ef3cc0 t sdma_v4_4_2_soft_reset +ffffffff81ef3cf0 t sdma_v4_4_2_set_clockgating_state +ffffffff81ef40f0 t sdma_v4_4_2_set_powergating_state +ffffffff81ef4120 t sdma_v4_4_2_get_clockgating_state +ffffffff81ef4200 t sdma_v4_4_2_xcp_suspend +ffffffff81ef42c0 t sdma_v4_4_2_xcp_resume +ffffffff81ef4300 t sdma_v4_4_2_ring_get_rptr +ffffffff81ef4370 t sdma_v4_4_2_ring_get_wptr +ffffffff81ef44b0 t sdma_v4_4_2_ring_set_wptr +ffffffff81ef4670 t sdma_v4_4_2_ring_emit_ib +ffffffff81ef4920 t sdma_v4_4_2_ring_emit_fence +ffffffff81ef4d40 t sdma_v4_4_2_ring_emit_pipeline_sync +ffffffff81ef4da0 t sdma_v4_4_2_ring_emit_vm_flush +ffffffff81ef4dc0 t sdma_v4_4_2_ring_emit_hdp_flush +ffffffff81ef4e70 t sdma_v4_4_2_ring_test_ring +ffffffff81ef5150 t sdma_v4_4_2_ring_test_ib +ffffffff81ef5320 t sdma_v4_4_2_ring_insert_nop +ffffffff81ef5450 t sdma_v4_4_2_ring_pad_ib +ffffffff81ef5580 t sdma_v4_4_2_ring_emit_wreg +ffffffff81ef56d0 t sdma_v4_4_2_ring_emit_reg_wait +ffffffff81ef5720 t sdma_v4_4_2_wait_reg_mem +ffffffff81ef5a30 t sdma_v4_4_2_page_ring_get_wptr +ffffffff81ef5b30 t sdma_v4_4_2_page_ring_set_wptr +ffffffff81ef5c40 t sdma_v4_4_2_emit_copy_buffer +ffffffff81ef5d00 t sdma_v4_4_2_emit_fill_buffer +ffffffff81ef5d90 t sdma_v4_4_2_vm_copy_pte +ffffffff81ef5e50 t sdma_v4_4_2_vm_write_pte +ffffffff81ef5f20 t sdma_v4_4_2_vm_set_pte_pde +ffffffff81ef6020 t sdma_v4_4_2_set_trap_irq_state +ffffffff81ef6100 t sdma_v4_4_2_process_trap_irq +ffffffff81ef6220 t sdma_v4_4_2_process_illegal_inst_irq +ffffffff81ef62b0 t sdma_v4_4_2_set_ecc_irq_state +ffffffff81ef6390 t sdma_v4_4_2_process_vm_hole_irq +ffffffff81ef6470 t sdma_v4_4_2_process_doorbell_invalid_irq +ffffffff81ef6550 t sdma_v4_4_2_process_pool_timeout_irq +ffffffff81ef6630 t sdma_v4_4_2_process_srbm_write_irq +ffffffff81ef6710 t sdma_v4_4_2_query_ras_error_count +ffffffff81ef6860 t sdma_v4_4_2_reset_ras_error_count +ffffffff81ef6990 t sdma_v4_4_2_inst_init_golden_registers +ffffffff81ef6b10 t sdma_v4_4_2_inst_start +ffffffff81ef7eb0 t sdma_v4_4_2_inst_ctx_switch_enable +ffffffff81ef8180 t sdma_v4_4_2_inst_enable +ffffffff81ef9000 t sdma_v5_0_early_init +ffffffff81ef9130 t sdma_v5_0_sw_init +ffffffff81ef9310 t sdma_v5_0_sw_fini +ffffffff81ef93a0 t sdma_v5_0_hw_init +ffffffff81efa600 t sdma_v5_0_hw_fini +ffffffff81efa660 t sdma_v5_0_suspend +ffffffff81efa6c0 t sdma_v5_0_resume +ffffffff81efa6d0 t sdma_v5_0_is_idle +ffffffff81efa760 t sdma_v5_0_wait_for_idle +ffffffff81efa820 t sdma_v5_0_soft_reset +ffffffff81efa850 t sdma_v5_0_set_clockgating_state +ffffffff81efaa50 t sdma_v5_0_set_powergating_state +ffffffff81efaa80 t sdma_v5_0_get_clockgating_state +ffffffff81efab20 t sdma_v5_0_ring_get_rptr +ffffffff81efab80 t sdma_v5_0_ring_get_wptr +ffffffff81efad20 t sdma_v5_0_ring_set_wptr +ffffffff81efb070 t sdma_v5_0_ring_emit_ib +ffffffff81efb330 t sdma_v5_0_ring_emit_fence +ffffffff81efb790 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81efba10 t sdma_v5_0_ring_emit_vm_flush +ffffffff81efba30 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81efbcd0 t sdma_v5_0_ring_test_ring +ffffffff81efc090 t sdma_v5_0_ring_test_ib +ffffffff81efc3c0 t sdma_v5_0_ring_insert_nop +ffffffff81efc4f0 t sdma_v5_0_ring_pad_ib +ffffffff81efc620 t sdma_v5_0_ring_init_cond_exec +ffffffff81efc850 t sdma_v5_0_ring_patch_cond_exec +ffffffff81efc910 t sdma_v5_0_ring_emit_wreg +ffffffff81efca60 t sdma_v5_0_ring_emit_reg_wait +ffffffff81efcce0 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81efcd60 t sdma_v5_0_ring_preempt_ib +ffffffff81efcea0 t sdma_v5_0_ring_emit_mem_sync +ffffffff81efd0b0 t sdma_v5_0_emit_copy_buffer +ffffffff81efd170 t sdma_v5_0_emit_fill_buffer +ffffffff81efd200 t sdma_v5_0_vm_copy_pte +ffffffff81efd2c0 t sdma_v5_0_vm_write_pte +ffffffff81efd390 t sdma_v5_0_vm_set_pte_pde +ffffffff81efd490 t sdma_v5_0_set_trap_irq_state +ffffffff81efd520 t sdma_v5_0_process_trap_irq +ffffffff81efd630 t sdma_v5_0_process_illegal_inst_irq +ffffffff81efd660 t sdma_v5_0_mqd_init +ffffffff81efd740 t sdma_v5_0_ctx_switch_enable +ffffffff81efda80 t sdma_v5_0_enable +ffffffff81efe000 t sdma_v5_2_early_init +ffffffff81efe130 t sdma_v5_2_sw_init +ffffffff81efe390 t sdma_v5_2_sw_fini +ffffffff81efe420 t sdma_v5_2_hw_init +ffffffff81efffc0 t sdma_v5_2_hw_fini +ffffffff81f00020 t sdma_v5_2_suspend +ffffffff81f00080 t sdma_v5_2_resume +ffffffff81f00090 t sdma_v5_2_is_idle +ffffffff81f00140 t sdma_v5_2_wait_for_idle +ffffffff81f00240 t sdma_v5_2_soft_reset +ffffffff81f00500 t sdma_v5_2_set_clockgating_state +ffffffff81f00860 t sdma_v5_2_set_powergating_state +ffffffff81f00890 t sdma_v5_2_get_clockgating_state +ffffffff81f00920 t sdma_v5_2_ring_get_rptr +ffffffff81f00980 t sdma_v5_2_ring_get_wptr +ffffffff81f00ac0 t sdma_v5_2_ring_set_wptr +ffffffff81f00c70 t sdma_v5_2_ring_emit_ib +ffffffff81f00f30 t sdma_v5_2_ring_emit_fence +ffffffff81f01390 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81f01610 t sdma_v5_2_ring_emit_vm_flush +ffffffff81f01630 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81f018d0 t sdma_v5_2_ring_test_ring +ffffffff81f01c90 t sdma_v5_2_ring_test_ib +ffffffff81f01fc0 t sdma_v5_2_ring_insert_nop +ffffffff81f020f0 t sdma_v5_2_ring_pad_ib +ffffffff81f02220 t sdma_v5_2_ring_init_cond_exec +ffffffff81f02450 t sdma_v5_2_ring_patch_cond_exec +ffffffff81f02510 t sdma_v5_2_ring_begin_use +ffffffff81f02530 t sdma_v5_2_ring_end_use +ffffffff81f02550 t sdma_v5_2_ring_emit_wreg +ffffffff81f026a0 t sdma_v5_2_ring_emit_reg_wait +ffffffff81f02920 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81f029a0 t sdma_v5_2_ring_preempt_ib +ffffffff81f02b10 t sdma_v5_2_ring_emit_mem_sync +ffffffff81f02d20 t sdma_v5_2_emit_copy_buffer +ffffffff81f02de0 t sdma_v5_2_emit_fill_buffer +ffffffff81f02e70 t sdma_v5_2_vm_copy_pte +ffffffff81f02f30 t sdma_v5_2_vm_write_pte +ffffffff81f03000 t sdma_v5_2_vm_set_pte_pde +ffffffff81f03100 t sdma_v5_2_set_trap_irq_state +ffffffff81f031c0 t sdma_v5_2_process_trap_irq +ffffffff81f03300 t sdma_v5_2_process_illegal_inst_irq +ffffffff81f03330 t sdma_v5_2_mqd_init +ffffffff81f03410 t sdma_v5_2_ctx_switch_enable +ffffffff81f03820 t sdma_v5_2_enable +ffffffff81f04000 t sdma_v6_0_early_init +ffffffff81f04120 t sdma_v6_0_sw_init +ffffffff81f042e0 t sdma_v6_0_sw_fini +ffffffff81f04370 t sdma_v6_0_hw_init +ffffffff81f04380 t sdma_v6_0_hw_fini +ffffffff81f04450 t sdma_v6_0_suspend +ffffffff81f04490 t sdma_v6_0_resume +ffffffff81f044a0 t sdma_v6_0_is_idle +ffffffff81f04530 t sdma_v6_0_wait_for_idle +ffffffff81f045f0 t sdma_v6_0_check_soft_reset +ffffffff81f046b0 t sdma_v6_0_soft_reset +ffffffff81f04b70 t sdma_v6_0_set_clockgating_state +ffffffff81f04ba0 t sdma_v6_0_set_powergating_state +ffffffff81f04bd0 t sdma_v6_0_get_clockgating_state +ffffffff81f04c00 t sdma_v6_0_ring_get_rptr +ffffffff81f04c60 t sdma_v6_0_ring_get_wptr +ffffffff81f04cd0 t sdma_v6_0_ring_set_wptr +ffffffff81f05020 t sdma_v6_0_ring_emit_ib +ffffffff81f052e0 t sdma_v6_0_ring_emit_fence +ffffffff81f05740 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81f059c0 t sdma_v6_0_ring_emit_vm_flush +ffffffff81f05c30 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81f05ed0 t sdma_v6_0_ring_test_ring +ffffffff81f06290 t sdma_v6_0_ring_test_ib +ffffffff81f065c0 t sdma_v6_0_ring_insert_nop +ffffffff81f066f0 t sdma_v6_0_ring_pad_ib +ffffffff81f06820 t sdma_v6_0_ring_init_cond_exec +ffffffff81f06a50 t sdma_v6_0_ring_patch_cond_exec +ffffffff81f06b10 t sdma_v6_0_ring_emit_wreg +ffffffff81f06c60 t sdma_v6_0_ring_emit_reg_wait +ffffffff81f06ee0 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81f06f60 t sdma_v6_0_ring_preempt_ib +ffffffff81f070b0 t sdma_v6_0_ring_emit_mem_sync +ffffffff81f072c0 t sdma_v6_0_emit_copy_buffer +ffffffff81f07380 t sdma_v6_0_emit_fill_buffer +ffffffff81f07410 t sdma_v6_0_vm_copy_pte +ffffffff81f074d0 t sdma_v6_0_vm_write_pte +ffffffff81f075a0 t sdma_v6_0_vm_set_pte_pde +ffffffff81f076a0 t sdma_v6_0_set_trap_irq_state +ffffffff81f07730 t sdma_v6_0_process_trap_irq +ffffffff81f07860 t sdma_v6_0_process_illegal_inst_irq +ffffffff81f07890 t sdma_v6_0_mqd_init +ffffffff81f079b0 t sdma_v6_0_start +ffffffff81f07c90 t sdma_v6_0_enable +ffffffff81f07e20 t sdma_v6_0_gfx_resume +ffffffff81f08eb0 t sdma_v6_0_gfx_stop +ffffffff81f0a000 T sienna_cichlid_reset_init +ffffffff81f0a0c0 t sienna_cichlid_async_reset +ffffffff81f0a120 t sienna_cichlid_get_reset_handler +ffffffff81f0a1b0 T sienna_cichlid_reset_fini +ffffffff81f0a210 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81f0a360 t sienna_cichlid_mode2_perform_reset +ffffffff81f0a3e0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81f0a6d0 t sienna_cichlid_mode2_reset +ffffffff81f0b000 T smu_v11_0_i2c_control_init +ffffffff81f0b0d0 T smu_v11_0_i2c_control_fini +ffffffff81f0b110 t smu_v11_0_i2c_xfer +ffffffff81f0c2c0 t smu_v11_0_i2c_func +ffffffff81f0c2f0 t smu_v11_0_i2c_enable +ffffffff81f0c440 t smu_v11_0_i2c_abort +ffffffff81f0c550 t lock_bus +ffffffff81f0c5f0 t trylock_bus +ffffffff81f0c640 t unlock_bus +ffffffff81f0d000 T smu_v13_0_10_reset_init +ffffffff81f0d0c0 t smu_v13_0_10_async_reset +ffffffff81f0d120 t smu_v13_0_10_get_reset_handler +ffffffff81f0d1d0 T smu_v13_0_10_reset_fini +ffffffff81f0d230 t smu_v13_0_10_mode2_prepare_hwcontext +ffffffff81f0d360 t smu_v13_0_10_mode2_perform_reset +ffffffff81f0d3e0 t smu_v13_0_10_mode2_restore_hwcontext +ffffffff81f0d740 t smu_v13_0_10_mode2_reset +ffffffff81f0e000 t smuio_v11_0_get_rom_index_offset +ffffffff81f0e040 t smuio_v11_0_get_rom_data_offset +ffffffff81f0e080 t smuio_v11_0_update_rom_clock_gating +ffffffff81f0e1d0 t smuio_v11_0_get_clock_gating_state +ffffffff81f0f000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81f0f040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81f0f080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81f0f1d0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81f10000 t smuio_v13_0_get_rom_index_offset +ffffffff81f10040 t smuio_v13_0_get_rom_data_offset +ffffffff81f10080 t smuio_v13_0_update_rom_clock_gating +ffffffff81f101d0 t smuio_v13_0_get_clock_gating_state +ffffffff81f10270 t smuio_v13_0_get_die_id +ffffffff81f102f0 t smuio_v13_0_get_socket_id +ffffffff81f10380 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81f11000 t smuio_v13_0_3_get_die_id +ffffffff81f11080 t smuio_v13_0_3_get_socket_id +ffffffff81f11110 t smuio_v13_0_3_get_pkg_type +ffffffff81f12000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81f12040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81f13000 t smuio_v9_0_get_rom_index_offset +ffffffff81f13040 t smuio_v9_0_get_rom_data_offset +ffffffff81f13080 t smuio_v9_0_update_rom_clock_gating +ffffffff81f131c0 t smuio_v9_0_get_clock_gating_state +ffffffff81f14000 T soc15_grbm_select +ffffffff81f14090 T soc15_program_register_sequence +ffffffff81f14290 T soc15_set_virt_ops +ffffffff81f14300 t soc15_common_early_init +ffffffff81f14720 t soc15_common_late_init +ffffffff81f14780 t soc15_common_sw_init +ffffffff81f147e0 t soc15_common_sw_fini +ffffffff81f14830 t soc15_common_hw_init +ffffffff81f14950 t soc15_common_hw_fini +ffffffff81f14a20 t soc15_common_suspend +ffffffff81f14a60 t soc15_common_resume +ffffffff81f14aa0 t soc15_common_is_idle +ffffffff81f14ad0 t soc15_common_wait_for_idle +ffffffff81f14b00 t soc15_common_soft_reset +ffffffff81f14b30 t soc15_common_set_clockgating_state +ffffffff81f14e70 t soc15_common_set_powergating_state +ffffffff81f14ea0 t soc15_common_get_clockgating_state +ffffffff81f14fd0 t soc15_uvd_ctx_rreg +ffffffff81f15070 t soc15_uvd_ctx_wreg +ffffffff81f15100 t soc15_didt_rreg +ffffffff81f151a0 t soc15_didt_wreg +ffffffff81f15220 t soc15_gc_cac_rreg +ffffffff81f15340 t soc15_gc_cac_wreg +ffffffff81f15450 t soc15_se_cac_rreg +ffffffff81f15570 t soc15_se_cac_wreg +ffffffff81f15680 t soc15_read_disabled_bios +ffffffff81f156b0 t soc15_read_register +ffffffff81f157b0 t soc15_asic_reset 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soc21_common_wait_for_idle +ffffffff81f17670 t soc21_common_soft_reset +ffffffff81f176a0 t soc21_common_set_clockgating_state +ffffffff81f17750 t soc21_common_set_powergating_state +ffffffff81f177b0 t soc21_common_get_clockgating_state +ffffffff81f17800 t soc21_didt_rreg +ffffffff81f178a0 t soc21_didt_wreg +ffffffff81f17920 t soc21_read_disabled_bios +ffffffff81f17950 t soc21_read_register +ffffffff81f17a40 t soc21_asic_reset +ffffffff81f17b20 t soc21_asic_reset_method +ffffffff81f17be0 t soc21_get_xclk +ffffffff81f17c10 t soc21_set_uvd_clocks +ffffffff81f17c40 t soc21_set_vce_clocks +ffffffff81f17c70 t soc21_get_config_memsize +ffffffff81f17c90 t soc21_need_full_reset +ffffffff81f17cf0 t soc21_init_doorbell_index +ffffffff81f17e10 t soc21_need_reset_on_init +ffffffff81f17eb0 t soc21_pre_asic_init +ffffffff81f17ee0 t soc21_update_umd_stable_pstate +ffffffff81f17f60 t soc21_query_video_codecs +ffffffff81f19000 t tonga_ih_early_init +ffffffff81f19050 t tonga_ih_sw_init +ffffffff81f190d0 t tonga_ih_sw_fini +ffffffff81f19110 t tonga_ih_hw_init +ffffffff81f192f0 t tonga_ih_hw_fini +ffffffff81f19390 t tonga_ih_suspend +ffffffff81f19430 t tonga_ih_resume +ffffffff81f19470 t tonga_ih_is_idle +ffffffff81f194c0 t tonga_ih_wait_for_idle +ffffffff81f19560 t tonga_ih_check_soft_reset +ffffffff81f195c0 t tonga_ih_pre_soft_reset +ffffffff81f19670 t tonga_ih_soft_reset +ffffffff81f19740 t tonga_ih_post_soft_reset +ffffffff81f19780 t tonga_ih_set_clockgating_state +ffffffff81f197b0 t tonga_ih_set_powergating_state +ffffffff81f197e0 t tonga_ih_get_wptr +ffffffff81f198d0 t tonga_ih_decode_iv +ffffffff81f19950 t tonga_ih_set_rptr +ffffffff81f1a000 t umc_v6_0_init_registers +ffffffff81f1b000 t umc_v6_1_query_ras_error_count +ffffffff81f1b4e0 t umc_v6_1_query_ras_error_address +ffffffff81f1b7c0 t umc_v6_1_err_cnt_init +ffffffff81f1c000 T umc_v6_7_convert_error_address +ffffffff81f1c320 t umc_v6_7_query_ras_error_count +ffffffff81f1c360 t umc_v6_7_query_ras_error_address +ffffffff81f1c380 t umc_v6_7_query_ras_poison_mode +ffffffff81f1c3e0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81f1c400 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81f1c420 t umc_v6_7_query_ecc_error_count +ffffffff81f1c690 t umc_v6_7_reset_error_count_per_channel +ffffffff81f1c790 t umc_v6_7_query_error_address +ffffffff81f1c8b0 t umc_v6_7_ecc_info_querry_ecc_error_count +ffffffff81f1ca80 t umc_v6_7_ecc_info_query_error_address +ffffffff81f1d000 t umc_v8_10_query_ras_error_count +ffffffff81f1d040 t umc_v8_10_query_ras_error_address +ffffffff81f1d060 t umc_v8_10_err_cnt_init +ffffffff81f1d080 t umc_v8_10_query_ras_poison_mode +ffffffff81f1d0b0 t umc_v8_10_ecc_info_query_ras_error_count +ffffffff81f1d0d0 t umc_v8_10_ecc_info_query_ras_error_address +ffffffff81f1d0f0 t umc_v8_10_set_eeprom_table_version +ffffffff81f1d120 t umc_v8_10_query_ecc_error_count +ffffffff81f1d1f0 t umc_v8_10_clear_error_count_per_channel +ffffffff81f1d260 t umc_v8_10_query_error_address +ffffffff81f1d390 t umc_v8_10_convert_error_address +ffffffff81f1d5b0 t umc_v8_10_err_cnt_init_per_channel +ffffffff81f1d660 t umc_v8_10_ecc_info_query_ecc_error_count +ffffffff81f1d740 t umc_v8_10_ecc_info_query_error_address +ffffffff81f1e000 t umc_v8_7_query_ras_error_count +ffffffff81f1e310 t umc_v8_7_query_ras_error_address +ffffffff81f1e4d0 t umc_v8_7_err_cnt_init +ffffffff81f1e630 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81f1e750 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81f1f000 t uvd_v5_0_early_init +ffffffff81f1f050 t uvd_v5_0_sw_init +ffffffff81f1f140 t uvd_v5_0_sw_fini +ffffffff81f1f190 t uvd_v5_0_hw_init +ffffffff81f1f690 t uvd_v5_0_hw_fini +ffffffff81f1f710 t uvd_v5_0_suspend +ffffffff81f1f810 t uvd_v5_0_resume +ffffffff81f1f860 t uvd_v5_0_is_idle +ffffffff81f1f8b0 t uvd_v5_0_wait_for_idle +ffffffff81f1f940 t uvd_v5_0_soft_reset +ffffffff81f1f9e0 t uvd_v5_0_set_clockgating_state +ffffffff81f1fb80 t uvd_v5_0_set_powergating_state +ffffffff81f1fbc0 t uvd_v5_0_get_clockgating_state +ffffffff81f1fc40 t uvd_v5_0_ring_get_rptr +ffffffff81f1fc80 t uvd_v5_0_ring_get_wptr +ffffffff81f1fcc0 t uvd_v5_0_ring_set_wptr +ffffffff81f1fcf0 t uvd_v5_0_ring_emit_ib +ffffffff81f1ff60 t uvd_v5_0_ring_emit_fence +ffffffff81f20510 t uvd_v5_0_ring_test_ring +ffffffff81f206b0 t uvd_v5_0_ring_insert_nop +ffffffff81f20810 t uvd_v5_0_set_interrupt_state +ffffffff81f20840 t uvd_v5_0_process_interrupt +ffffffff81f208a0 t uvd_v5_0_stop +ffffffff81f209b0 t uvd_v5_0_start +ffffffff81f22000 t uvd_v6_0_early_init +ffffffff81f22160 t uvd_v6_0_sw_init +ffffffff81f223c0 t uvd_v6_0_sw_fini +ffffffff81f22480 t uvd_v6_0_hw_init +ffffffff81f22a30 t uvd_v6_0_hw_fini +ffffffff81f22ab0 t uvd_v6_0_suspend +ffffffff81f22bb0 t uvd_v6_0_resume +ffffffff81f22c00 t uvd_v6_0_is_idle +ffffffff81f22c50 t uvd_v6_0_wait_for_idle +ffffffff81f22ce0 t uvd_v6_0_check_soft_reset +ffffffff81f22d60 t uvd_v6_0_pre_soft_reset +ffffffff81f22da0 t uvd_v6_0_soft_reset +ffffffff81f22e70 t uvd_v6_0_post_soft_reset +ffffffff81f22f10 t uvd_v6_0_set_clockgating_state +ffffffff81f230a0 t uvd_v6_0_set_powergating_state +ffffffff81f23110 t uvd_v6_0_get_clockgating_state +ffffffff81f231a0 t uvd_v6_0_ring_get_rptr +ffffffff81f231e0 t uvd_v6_0_ring_get_wptr +ffffffff81f23220 t uvd_v6_0_ring_set_wptr +ffffffff81f23250 t uvd_v6_0_ring_emit_ib +ffffffff81f235b0 t uvd_v6_0_ring_emit_fence +ffffffff81f23b60 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81f23f50 t uvd_v6_0_ring_emit_vm_flush +ffffffff81f242b0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81f242e0 t uvd_v6_0_ring_test_ring +ffffffff81f24480 t uvd_v6_0_ring_insert_nop +ffffffff81f245e0 t uvd_v6_0_ring_emit_wreg +ffffffff81f24860 t uvd_v6_0_enc_ring_get_rptr +ffffffff81f248c0 t uvd_v6_0_enc_ring_get_wptr +ffffffff81f24920 t uvd_v6_0_enc_ring_set_wptr +ffffffff81f24960 t uvd_v6_0_enc_ring_emit_ib +ffffffff81f24ba0 t uvd_v6_0_enc_ring_emit_fence +ffffffff81f24de0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81f24f90 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81f251a0 t uvd_v6_0_enc_ring_test_ring +ffffffff81f252f0 t uvd_v6_0_enc_ring_test_ib +ffffffff81f257d0 t uvd_v6_0_enc_ring_insert_end +ffffffff81f25860 t uvd_v6_0_set_interrupt_state +ffffffff81f25890 t uvd_v6_0_process_interrupt +ffffffff81f25990 t uvd_v6_0_stop +ffffffff81f25aa0 t uvd_v6_0_start +ffffffff81f27000 t uvd_v7_0_early_init +ffffffff81f27270 t uvd_v7_0_sw_init +ffffffff81f27690 t uvd_v7_0_sw_fini +ffffffff81f27780 t uvd_v7_0_hw_init +ffffffff81f2a540 t uvd_v7_0_hw_fini +ffffffff81f2a850 t uvd_v7_0_suspend +ffffffff81f2a900 t uvd_v7_0_resume +ffffffff81f2a950 t uvd_v7_0_set_clockgating_state +ffffffff81f2a980 t uvd_v7_0_ring_get_rptr +ffffffff81f2aa20 t uvd_v7_0_ring_get_wptr +ffffffff81f2aac0 t uvd_v7_0_ring_set_wptr +ffffffff81f2ab40 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81f2abb0 t uvd_v7_0_ring_emit_ib +ffffffff81f2af50 t uvd_v7_0_ring_emit_fence +ffffffff81f2b5a0 t uvd_v7_0_ring_emit_vm_flush +ffffffff81f2b610 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81f2b640 t uvd_v7_0_ring_test_ring +ffffffff81f2b8d0 t uvd_v7_0_ring_insert_nop +ffffffff81f2ba70 t uvd_v7_0_ring_emit_wreg +ffffffff81f2bd40 t uvd_v7_0_ring_emit_reg_wait +ffffffff81f2c0f0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81f2c1e0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81f2c2e0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81f2c3e0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81f2c620 t uvd_v7_0_enc_ring_emit_fence +ffffffff81f2c860 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81f2c8d0 t uvd_v7_0_enc_ring_test_ring +ffffffff81f2ca30 t uvd_v7_0_enc_ring_test_ib +ffffffff81f2cf10 t uvd_v7_0_enc_ring_insert_end +ffffffff81f2cfa0 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81f2d0f0 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81f2d2b0 t uvd_v7_0_set_interrupt_state +ffffffff81f2d2e0 t uvd_v7_0_process_interrupt +ffffffff81f2e000 t vce_v3_0_early_init +ffffffff81f2e180 t vce_v3_0_sw_init +ffffffff81f2e2e0 t vce_v3_0_sw_fini +ffffffff81f2e330 t vce_v3_0_hw_init +ffffffff81f2e400 t vce_v3_0_hw_fini +ffffffff81f2e4f0 t vce_v3_0_suspend +ffffffff81f2e5c0 t vce_v3_0_resume +ffffffff81f2e6a0 t vce_v3_0_is_idle +ffffffff81f2e710 t vce_v3_0_wait_for_idle +ffffffff81f2e7c0 t vce_v3_0_check_soft_reset +ffffffff81f2e8c0 t vce_v3_0_pre_soft_reset +ffffffff81f2e960 t vce_v3_0_soft_reset +ffffffff81f2ea30 t vce_v3_0_post_soft_reset +ffffffff81f2ead0 t vce_v3_0_set_clockgating_state +ffffffff81f2edc0 t vce_v3_0_set_powergating_state +ffffffff81f2f5e0 t vce_v3_0_get_clockgating_state +ffffffff81f2f6a0 t vce_v3_0_ring_get_rptr +ffffffff81f2f770 t vce_v3_0_ring_get_wptr +ffffffff81f2f840 t vce_v3_0_ring_set_wptr +ffffffff81f2f900 t vce_v3_0_ring_emit_ib +ffffffff81f2fb40 t vce_v3_0_emit_pipeline_sync +ffffffff81f2fcf0 t vce_v3_0_emit_vm_flush +ffffffff81f2ff60 t vce_v3_0_set_interrupt_state +ffffffff81f2ffd0 t vce_v3_0_process_interrupt +ffffffff81f30090 t vce_v3_0_stop +ffffffff81f31000 t vce_v4_0_early_init +ffffffff81f310b0 t vce_v4_0_sw_init +ffffffff81f31350 t vce_v4_0_sw_fini +ffffffff81f313d0 t vce_v4_0_hw_init +ffffffff81f31b90 t vce_v4_0_hw_fini +ffffffff81f31cc0 t vce_v4_0_suspend +ffffffff81f31de0 t vce_v4_0_resume +ffffffff81f31e90 t vce_v4_0_set_clockgating_state +ffffffff81f31ec0 t vce_v4_0_set_powergating_state +ffffffff81f31fa0 t vce_v4_0_ring_get_rptr +ffffffff81f32010 t vce_v4_0_ring_get_wptr +ffffffff81f320a0 t vce_v4_0_ring_set_wptr +ffffffff81f32130 t vce_v4_0_ring_emit_ib +ffffffff81f32370 t vce_v4_0_ring_emit_fence +ffffffff81f325b0 t vce_v4_0_emit_vm_flush +ffffffff81f32620 t vce_v4_0_ring_insert_end +ffffffff81f326b0 t vce_v4_0_emit_wreg +ffffffff81f32800 t vce_v4_0_emit_reg_wait +ffffffff81f329c0 t vce_v4_0_set_interrupt_state +ffffffff81f32a50 t vce_v4_0_process_interrupt +ffffffff81f32af0 t vce_v4_0_start +ffffffff81f34000 T vcn_dec_sw_ring_emit_fence +ffffffff81f34240 T vcn_dec_sw_ring_insert_end +ffffffff81f342d0 T vcn_dec_sw_ring_emit_ib +ffffffff81f34510 T vcn_dec_sw_ring_emit_reg_wait +ffffffff81f346d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81f34740 T vcn_dec_sw_ring_emit_wreg +ffffffff81f35000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81f35140 T vcn_v1_0_ring_end_use +ffffffff81f351b0 t vcn_v1_0_early_init +ffffffff81f35310 t vcn_v1_0_sw_init +ffffffff81f355b0 t vcn_v1_0_sw_fini +ffffffff81f35610 t vcn_v1_0_hw_init +ffffffff81f356e0 t vcn_v1_0_hw_fini +ffffffff81f357e0 t vcn_v1_0_suspend +ffffffff81f35850 t vcn_v1_0_resume +ffffffff81f35930 t vcn_v1_0_is_idle +ffffffff81f359c0 t vcn_v1_0_wait_for_idle +ffffffff81f35a00 t vcn_v1_0_set_clockgating_state +ffffffff81f35ab0 t vcn_v1_0_set_powergating_state +ffffffff81f36010 t vcn_v1_0_dec_ring_get_rptr +ffffffff81f360a0 t vcn_v1_0_dec_ring_get_wptr +ffffffff81f36130 t vcn_v1_0_dec_ring_set_wptr +ffffffff81f36240 t vcn_v1_0_ring_patch_cs_in_place +ffffffff81f36400 t vcn_v1_0_dec_ring_emit_ib +ffffffff81f36780 t vcn_v1_0_dec_ring_emit_fence +ffffffff81f36d90 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff81f36e00 t vcn_v1_0_dec_ring_insert_nop +ffffffff81f36f90 t vcn_v1_0_dec_ring_insert_start +ffffffff81f37160 t vcn_v1_0_dec_ring_insert_end +ffffffff81f37270 t vcn_v1_0_ring_begin_use +ffffffff81f37310 t vcn_v1_0_dec_ring_emit_wreg +ffffffff81f375c0 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff81f37940 t vcn_v1_0_enc_ring_get_rptr +ffffffff81f37a20 t vcn_v1_0_enc_ring_get_wptr +ffffffff81f37b00 t vcn_v1_0_enc_ring_set_wptr +ffffffff81f37bc0 t vcn_v1_0_enc_ring_emit_ib +ffffffff81f37e00 t vcn_v1_0_enc_ring_emit_fence +ffffffff81f38040 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81f380b0 t vcn_v1_0_enc_ring_insert_end +ffffffff81f38140 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81f38290 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81f38450 t vcn_v1_0_set_interrupt_state +ffffffff81f38480 t vcn_v1_0_process_interrupt +ffffffff81f38530 t vcn_v1_0_idle_work_handler +ffffffff81f386a0 t vcn_v1_0_pause_dpg_mode +ffffffff81f39540 t vcn_v1_0_enable_clock_gating +ffffffff81f39970 t vcn_v1_0_disable_clock_gating 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vcn_v2_0_sw_init +ffffffff81f43350 t vcn_v2_0_sw_fini +ffffffff81f433d0 t vcn_v2_0_hw_init +ffffffff81f43d50 t vcn_v2_0_hw_fini +ffffffff81f43e50 t vcn_v2_0_suspend +ffffffff81f43e80 t vcn_v2_0_resume +ffffffff81f43ed0 t vcn_v2_0_is_idle +ffffffff81f43f60 t vcn_v2_0_wait_for_idle +ffffffff81f43fa0 t vcn_v2_0_set_clockgating_state +ffffffff81f44030 t vcn_v2_0_set_powergating_state +ffffffff81f445f0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81f44680 t vcn_v2_0_dec_ring_get_wptr +ffffffff81f44720 t vcn_v2_0_dec_ring_set_wptr +ffffffff81f44860 t vcn_v2_0_enc_ring_get_rptr +ffffffff81f44940 t vcn_v2_0_enc_ring_get_wptr +ffffffff81f44a30 t vcn_v2_0_enc_ring_set_wptr +ffffffff81f44b20 t vcn_v2_0_set_interrupt_state +ffffffff81f44b50 t vcn_v2_0_process_interrupt +ffffffff81f44c00 t vcn_v2_0_pause_dpg_mode +ffffffff81f453f0 t vcn_v2_0_enable_clock_gating +ffffffff81f45680 t vcn_v2_0_disable_clock_gating +ffffffff81f45aa0 t vcn_v2_0_start +ffffffff81f4a050 t vcn_v2_0_enable_static_power_gating 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dm_helpers_dp_read_dpcd +ffffffff81fa4bb0 T dm_helpers_dp_write_dpcd +ffffffff81fa4c30 T dm_helpers_submit_i2c +ffffffff81fa4d50 T dm_helpers_dp_write_dsc_enable +ffffffff81fa5380 T dm_helpers_is_dp_sink_present +ffffffff81fa5410 T dm_helpers_read_local_edid +ffffffff81fa5670 T dm_helper_dmub_aux_transfer_sync +ffffffff81fa56c0 T dm_helpers_dmub_set_config_sync +ffffffff81fa56e0 T dm_set_dcn_clocks +ffffffff81fa5710 T dm_helpers_smu_timeout +ffffffff81fa5740 T dm_helpers_init_panel_settings +ffffffff81fa57b0 T dm_helpers_override_panel_settings +ffffffff81fa57f0 T dm_helpers_allocate_gpu_mem +ffffffff81fa58f0 T dm_helpers_free_gpu_mem +ffffffff81fa5980 T dm_helpers_dmub_outbox_interrupt_control +ffffffff81fa5a10 T dm_helpers_mst_enable_stream_features +ffffffff81fa5b20 T dm_helpers_dp_handle_test_pattern_request +ffffffff81fa5e50 T dm_set_phyd32clk +ffffffff81fa5e80 T dm_helpers_enable_periodic_detection +ffffffff81fa5eb0 T dm_helpers_dp_mst_update_branch_bandwidth +ffffffff81fa5ee0 T dm_get_adaptive_sync_support_type +ffffffff81fa5f50 t execute_synaptics_rc_command +ffffffff81fa7000 T amdgpu_dm_irq_register_interrupt +ffffffff81fa71a0 t dm_irq_work_func +ffffffff81fa71c0 T amdgpu_dm_irq_unregister_interrupt +ffffffff81fa7340 T amdgpu_dm_irq_init +ffffffff81fa7430 T amdgpu_dm_irq_fini +ffffffff81fa75d0 T amdgpu_dm_irq_suspend +ffffffff81fa76e0 T amdgpu_dm_irq_resume_early +ffffffff81fa78a0 T amdgpu_dm_irq_resume_late +ffffffff81fa7a60 T amdgpu_dm_set_irq_funcs +ffffffff81fa7b20 T amdgpu_dm_outbox_init +ffffffff81fa7b50 T amdgpu_dm_hpd_init +ffffffff81fa7c00 T amdgpu_dm_hpd_fini +ffffffff81fa7cb0 t amdgpu_dm_set_crtc_irq_state +ffffffff81fa7d30 t amdgpu_dm_irq_handler +ffffffff81fa7f30 t amdgpu_dm_set_vline0_irq_state +ffffffff81fa7fb0 t amdgpu_dm_set_dmub_outbox_irq_state +ffffffff81fa8000 t amdgpu_dm_set_vupdate_irq_state +ffffffff81fa8080 t amdgpu_dm_set_dmub_trace_irq_state +ffffffff81fa80d0 t amdgpu_dm_set_pflip_irq_state +ffffffff81fa8150 t amdgpu_dm_set_hpd_irq_state +ffffffff81fa9000 T needs_dsc_aux_workaround +ffffffff81fa9050 T dm_dp_create_fake_mst_encoders +ffffffff81fa9100 T dm_handle_mst_sideband_msg_ready_event +ffffffff81fa9340 T amdgpu_dm_initialize_dp_connector +ffffffff81fa9440 t kasprintf +ffffffff81fa9510 t dm_dp_aux_transfer +ffffffff81fa9650 T dm_mst_get_pbn_divider +ffffffff81fa96b0 T compute_mst_dsc_configs_for_state +ffffffff81fa9950 t is_dsc_need_re_compute +ffffffff81fa9b20 t compute_mst_dsc_configs_for_link +ffffffff81faa150 T pre_validate_dsc +ffffffff81faa700 T dm_dp_mst_is_port_support_mode +ffffffff81faa960 t amdgpu_dm_encoder_destroy +ffffffff81faa970 t dm_dp_add_mst_connector +ffffffff81faab30 t dm_handle_mst_down_rep_msg_ready +ffffffff81faab50 t amdgpu_dm_mst_connector_late_register +ffffffff81faaba0 t amdgpu_dm_mst_connector_early_unregister +ffffffff81faac70 t dm_dp_mst_connector_destroy +ffffffff81faacf0 t dm_dp_mst_get_modes +ffffffff81fab1e0 t dm_dp_mst_detect +ffffffff81fab3a0 t dm_mst_atomic_best_encoder +ffffffff81fab400 t dm_dp_mst_atomic_check +ffffffff81fab430 t set_dsc_configs_from_fairness_vars +ffffffff81fab700 t increase_dsc_bpp +ffffffff81fabc50 t try_disable_dsc +ffffffff81fac000 T amdgpu_dm_plane_get_format_info +ffffffff81fac020 T amdgpu_dm_plane_fill_blending_from_plane_state +ffffffff81fac120 T amdgpu_dm_plane_fill_plane_buffer_attributes +ffffffff81fac6a0 T amdgpu_dm_plane_helper_check_state +ffffffff81fac8c0 T amdgpu_dm_plane_fill_dc_scaling_info +ffffffff81facb20 T amdgpu_dm_plane_handle_cursor_update +ffffffff81facdb0 T amdgpu_dm_plane_init +ffffffff81fadbb0 T is_video_format +ffffffff81fadc00 t dm_drm_plane_reset +ffffffff81fadc90 t dm_drm_plane_duplicate_state +ffffffff81fadd20 t dm_drm_plane_destroy_state +ffffffff81fadd60 t dm_plane_format_mod_supported +ffffffff81fade90 t dm_plane_helper_prepare_fb +ffffffff81fae140 t dm_plane_helper_cleanup_fb +ffffffff81fae1e0 t dm_plane_atomic_check +ffffffff81fae2b0 t dm_plane_atomic_async_check +ffffffff81fae2f0 t dm_plane_atomic_async_update +ffffffff81fae3a0 t amdgpu_bo_reserve +ffffffff81fae5a0 t amdgpu_bo_unreserve +ffffffff81faf000 T dm_pp_apply_display_requirements +ffffffff81faf1d0 T dm_pp_get_clock_levels_by_type +ffffffff81faf510 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff81faf6d0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff81faf880 T dm_pp_notify_wm_clock_changes +ffffffff81faf8d0 T dm_pp_apply_power_level_change_request +ffffffff81faf900 T dm_pp_apply_clock_for_voltage_request +ffffffff81faf9a0 T dm_pp_get_static_clocks +ffffffff81fafa60 T dm_pp_get_funcs +ffffffff81fafb70 t pp_rv_set_wm_ranges +ffffffff81fafcf0 t pp_rv_set_pme_wa_enable +ffffffff81fafd10 t pp_rv_set_active_display_count +ffffffff81fafd30 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff81fafd50 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff81fafd70 t pp_rv_set_hard_min_fclk_by_freq +ffffffff81fafd90 t pp_nv_set_display_count +ffffffff81fafdf0 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff81fafe60 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff81fafec0 t pp_nv_set_voltage_by_freq +ffffffff81faff50 t pp_nv_set_wm_ranges +ffffffff81faffa0 t pp_nv_set_hard_min_uclk_by_freq +ffffffff81fb0010 t pp_nv_get_maximum_sustainable_clocks +ffffffff81fb0070 t pp_nv_get_uclk_dpm_states +ffffffff81fb00d0 t pp_nv_set_pstate_handshake_support +ffffffff81fb0120 t pp_rn_set_wm_ranges +ffffffff81fb0170 t pp_rn_get_dpm_clock_table +ffffffff81fb1000 T amdgpu_dm_set_psr_caps +ffffffff81fb1150 T amdgpu_dm_link_setup_psr +ffffffff81fb12e0 T amdgpu_dm_psr_enable +ffffffff81fb13e0 T amdgpu_dm_psr_disable +ffffffff81fb1460 T amdgpu_dm_psr_disable_all +ffffffff81fb2000 T amdgpu_dm_setup_replay +ffffffff81fb20f0 T amdgpu_dm_replay_enable +ffffffff81fb2270 T amdgpu_dm_replay_disable +ffffffff81fb3000 T dm_get_elapse_time_in_ns +ffffffff81fb3030 T dm_perf_trace_timestamp +ffffffff81fb4000 T dc_assert_fp_enabled +ffffffff81fb4070 T dc_fpu_begin +ffffffff81fb40c0 T dc_fpu_end +ffffffff81fb5000 T dal_vector_construct +ffffffff81fb50d0 T dal_vector_presized_create +ffffffff81fb5340 T dal_vector_create +ffffffff81fb5460 T dal_vector_destruct +ffffffff81fb54b0 T dal_vector_destroy +ffffffff81fb5530 T dal_vector_get_count +ffffffff81fb5560 T dal_vector_at_index +ffffffff81fb55a0 T dal_vector_remove_at_index +ffffffff81fb5630 T dal_vector_set_at_index +ffffffff81fb5690 T dal_vector_insert_at +ffffffff81fb5790 T dal_vector_reserve +ffffffff81fb5840 T dal_vector_append +ffffffff81fb5940 T dal_vector_clone +ffffffff81fb59f0 T dal_vector_capacity +ffffffff81fb5a20 T dal_vector_clear +ffffffff81fb6000 T fixed_point_to_int_frac +ffffffff81fb61f0 T convert_float_matrix +ffffffff81fb62b0 T reduce_fraction +ffffffff81fb7000 T is_rgb_cspace +ffffffff81fb7080 T is_lower_pipe_tree_visible +ffffffff81fb70e0 T is_upper_pipe_tree_visible +ffffffff81fb7140 T is_pipe_tree_visible +ffffffff81fb71c0 T build_prescale_params +ffffffff81fb8000 T dc_fixpt_from_fraction +ffffffff81fb81c0 T dc_fixpt_mul +ffffffff81fb8360 T dc_fixpt_sqr +ffffffff81fb84d0 T dc_fixpt_recip +ffffffff81fb8540 T dc_fixpt_sinc +ffffffff81fb8730 T dc_fixpt_sin +ffffffff81fb8760 T dc_fixpt_cos +ffffffff81fb8850 T dc_fixpt_exp +ffffffff81fb8b30 t fixed31_32_exp_from_taylor_series +ffffffff81fb8f10 T dc_fixpt_log +ffffffff81fb9120 T dc_fixpt_u4d19 +ffffffff81fb9160 T dc_fixpt_u3d19 +ffffffff81fb91a0 T dc_fixpt_u2d19 +ffffffff81fb91e0 T dc_fixpt_u0d19 +ffffffff81fb9210 T dc_fixpt_clamp_u0d14 +ffffffff81fb9260 T dc_fixpt_clamp_u0d10 +ffffffff81fb92b0 T dc_fixpt_s4d19 +ffffffff81fba000 T bios_parser_create +ffffffff81fbb270 t bios_parser_get_connectors_number +ffffffff81fbb2d0 t bios_parser_get_connector_id +ffffffff81fbb360 t bios_parser_get_src_obj +ffffffff81fbb460 t bios_parser_get_i2c_info +ffffffff81fbb680 t bios_parser_get_hpd_info +ffffffff81fbb760 t bios_parser_get_device_tag +ffffffff81fbb960 t bios_parser_get_spread_spectrum_info +ffffffff81fbbb60 t bios_parser_get_ss_entry_number +ffffffff81fbbda0 t bios_parser_get_embedded_panel_info +ffffffff81fbc310 t bios_parser_get_gpio_pin_info +ffffffff81fbc420 t bios_parser_get_encoder_cap_info +ffffffff81fbc520 t bios_parser_set_scratch_critical_state +ffffffff81fbc530 t bios_parser_is_device_id_supported +ffffffff81fbc5f0 t bios_parser_encoder_control +ffffffff81fbc630 t bios_parser_transmitter_control +ffffffff81fbc670 t bios_parser_enable_crtc +ffffffff81fbc6c0 t bios_parser_adjust_pixel_clock +ffffffff81fbc700 t bios_parser_set_pixel_clock +ffffffff81fbc740 t bios_parser_set_dce_clock +ffffffff81fbc780 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff81fbc7d0 t bios_parser_program_crtc_timing +ffffffff81fbc810 t bios_parser_program_display_engine_pll +ffffffff81fbc850 t bios_parser_enable_disp_power_gating +ffffffff81fbc890 t bios_parser_destroy +ffffffff81fbc950 t bios_get_board_layout_info +ffffffff81fbcbd0 t get_bios_object +ffffffff81fbcda0 t get_ss_info_from_ss_info_table +ffffffff81fbcf70 t get_ss_info_v3_1 +ffffffff81fbd0e0 t get_ss_entry_number_from_ss_info_tbl +ffffffff81fbe000 T firmware_parser_create +ffffffff81fbfe70 t bios_parser_get_connectors_number +ffffffff81fbffe0 t bios_parser_get_connector_id +ffffffff81fc0040 t bios_parser_get_src_obj +ffffffff81fc02e0 t bios_parser_get_i2c_info +ffffffff81fc0580 t bios_parser_get_hpd_info +ffffffff81fc06f0 t bios_parser_get_device_tag +ffffffff81fc09c0 t bios_parser_get_spread_spectrum_info +ffffffff81fc0e40 t bios_parser_get_ss_entry_number +ffffffff81fc0e70 t bios_parser_get_embedded_panel_info +ffffffff81fc1070 t bios_parser_get_gpio_pin_info +ffffffff81fc1190 t bios_parser_get_encoder_cap_info +ffffffff81fc1300 t bios_parser_is_accelerated_mode +ffffffff81fc1310 t bios_parser_set_scratch_critical_state +ffffffff81fc1320 t bios_parser_is_device_id_supported +ffffffff81fc1390 t bios_parser_encoder_control +ffffffff81fc13d0 t bios_parser_transmitter_control +ffffffff81fc1410 t bios_parser_enable_crtc +ffffffff81fc1460 t bios_parser_set_pixel_clock +ffffffff81fc14a0 t bios_parser_set_dce_clock +ffffffff81fc14e0 t bios_parser_program_crtc_timing +ffffffff81fc1520 t bios_parser_enable_disp_power_gating +ffffffff81fc1560 t firmware_parser_destroy +ffffffff81fc1620 t bios_get_board_layout_info +ffffffff81fc1ac0 t bios_parser_pack_data_tables +ffffffff81fc1af0 t bios_get_atom_dc_golden_table +ffffffff81fc1c30 t bios_parser_enable_lvtma_control +ffffffff81fc1c80 t bios_parser_get_soc_bb_info +ffffffff81fc1d90 t bios_parser_get_disp_connector_caps_info +ffffffff81fc1ef0 t bios_parser_get_lttpr_caps +ffffffff81fc2040 t bios_parser_get_lttpr_interop +ffffffff81fc2180 t bios_parser_get_connector_speed_cap_info +ffffffff81fc22d0 t get_bios_object +ffffffff81fc2430 t get_bios_object_from_path_v3 +ffffffff81fc3000 T object_id_from_bios_object_id +ffffffff81fc4000 T bios_get_image +ffffffff81fc4050 T bios_is_accelerated_mode +ffffffff81fc40b0 T bios_set_scratch_acc_mode_change +ffffffff81fc40f0 T bios_set_scratch_critical_state +ffffffff81fc4130 T bios_get_vga_enabled_displays +ffffffff81fc5000 T dal_bios_parser_create +ffffffff81fc5070 T dal_bios_parser_destroy +ffffffff81fc6000 T dal_bios_parser_init_cmd_tbl +ffffffff81fc6810 t encoder_control_digx_v3 +ffffffff81fc6910 t encoder_control_digx_v4 +ffffffff81fc6a10 t encoder_control_digx_v5 +ffffffff81fc6b60 t encoder_control_dig1_v1 +ffffffff81fc6be0 t encoder_control_dig2_v1 +ffffffff81fc6c60 t encoder_control_dig_v1 +ffffffff81fc6cc0 t transmitter_control_v2 +ffffffff81fc6e60 t transmitter_control_v3 +ffffffff81fc7010 t transmitter_control_v4 +ffffffff81fc71c0 t transmitter_control_v1_5 +ffffffff81fc7330 t transmitter_control_v1_6 +ffffffff81fc7490 t set_pixel_clock_v3 +ffffffff81fc7600 t set_pixel_clock_v5 +ffffffff81fc77a0 t set_pixel_clock_v6 +ffffffff81fc7940 t set_pixel_clock_v7 +ffffffff81fc7b10 t enable_spread_spectrum_on_ppll_v1 +ffffffff81fc7c30 t enable_spread_spectrum_on_ppll_v2 +ffffffff81fc7d60 t enable_spread_spectrum_on_ppll_v3 +ffffffff81fc7e70 t adjust_display_pll_v2 +ffffffff81fc7fc0 t adjust_display_pll_v3 +ffffffff81fc8130 t dac1_encoder_control_v1 +ffffffff81fc81b0 t dac2_encoder_control_v1 +ffffffff81fc8230 t dac1_output_control_v1 +ffffffff81fc8290 t dac2_output_control_v1 +ffffffff81fc82f0 t set_crtc_using_dtd_timing_v3 +ffffffff81fc8440 t set_crtc_timing_v1 +ffffffff81fc85c0 t enable_crtc_v1 +ffffffff81fc8660 t enable_crtc_mem_req_v1 +ffffffff81fc8700 t program_clock_v5 +ffffffff81fc8810 t program_clock_v6 +ffffffff81fc8930 t external_encoder_control_v3 +ffffffff81fc8ae0 t enable_disp_power_gating_v2_1 +ffffffff81fc8bb0 t set_dce_clock_v2_1 +ffffffff81fc9000 T dal_firmware_parser_init_cmd_tbl +ffffffff81fc93d0 t encoder_control_digx_v1_5 +ffffffff81fc95a0 t encoder_control_fallback +ffffffff81fc9600 t transmitter_control_v1_6 +ffffffff81fc97a0 t transmitter_control_v1_7 +ffffffff81fc9990 t transmitter_control_fallback +ffffffff81fc99f0 t set_pixel_clock_v7 +ffffffff81fc9c40 t set_pixel_clock_fallback +ffffffff81fc9ca0 t set_crtc_using_dtd_timing_v3 +ffffffff81fc9df0 t enable_crtc_v1 +ffffffff81fc9e90 t external_encoder_control_v3 +ffffffff81fc9ec0 t enable_disp_power_gating_v2_1 +ffffffff81fca010 t enable_disp_power_gating_fallback +ffffffff81fca070 t set_dce_clock_v2_1 +ffffffff81fca1a0 t get_smu_clock_info_v3_1 +ffffffff81fca210 t enable_lvtma_control +ffffffff81fcb000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81fcb0a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81fcb1c0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81fcb240 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81fcb2d0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81fcb390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81fcb470 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff81fcc000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff81fcc0b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff81fcc1c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81fcc240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81fcc2d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81fcc3b0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81fcd000 T dal_cmd_tbl_helper_dce110_get_table +ffffffff81fcd030 t encoder_action_to_atom +ffffffff81fcd0b0 t engine_bp_to_atom +ffffffff81fcd100 t clock_source_id_to_atom +ffffffff81fcd1a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81fcd1f0 t signal_type_to_atom_dig_mode +ffffffff81fcd250 t hpd_sel_to_atom +ffffffff81fcd290 t dig_encoder_sel_to_atom +ffffffff81fcd2c0 t phy_id_to_atom +ffffffff81fcd300 t disp_power_gating_action_to_atom +ffffffff81fce000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff81fce030 t encoder_action_to_atom ffffffff81fce0b0 t engine_bp_to_atom ffffffff81fce100 t clock_source_id_to_atom -ffffffff81fce1a0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81fce1f0 t signal_type_to_atom_dig_mode -ffffffff81fce250 t hpd_sel_to_atom -ffffffff81fce290 t dig_encoder_sel_to_atom -ffffffff81fce2c0 t phy_id_to_atom -ffffffff81fce300 t disp_power_gating_action_to_atom -ffffffff81fcf000 T dal_cmd_tbl_helper_dce112_get_table2 +ffffffff81fce1d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81fce220 t signal_type_to_atom_dig_mode +ffffffff81fce280 t hpd_sel_to_atom +ffffffff81fce2c0 t dig_encoder_sel_to_atom +ffffffff81fce2f0 t phy_id_to_atom +ffffffff81fce330 t disp_power_gating_action_to_atom +ffffffff81fce3a0 t dc_clock_type_to_atom +ffffffff81fce420 t transmitter_color_depth_to_atom +ffffffff81fcf000 T dal_cmd_tbl_helper_dce112_get_table ffffffff81fcf030 t encoder_action_to_atom ffffffff81fcf0b0 t engine_bp_to_atom ffffffff81fcf100 t clock_source_id_to_atom @@ -30997,7 +31009,7 @@ ffffffff81fcf2f0 t phy_id_to_atom ffffffff81fcf330 t disp_power_gating_action_to_atom ffffffff81fcf3a0 t dc_clock_type_to_atom ffffffff81fcf420 t transmitter_color_depth_to_atom -ffffffff81fd0000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff81fd0000 T dal_cmd_tbl_helper_dce80_get_table ffffffff81fd0030 t encoder_action_to_atom ffffffff81fd00b0 t engine_bp_to_atom ffffffff81fd0100 t clock_source_id_to_atom @@ -31005,26347 +31017,26335 @@ ffffffff81fd01d0 t clock_source_id_to_atom_phy_clk_src ffffffff81fd0220 t signal_type_to_atom_dig_mode ffffffff81fd0280 t hpd_sel_to_atom ffffffff81fd02c0 t dig_encoder_sel_to_atom -ffffffff81fd02f0 t phy_id_to_atom -ffffffff81fd0330 t disp_power_gating_action_to_atom -ffffffff81fd03a0 t dc_clock_type_to_atom -ffffffff81fd0420 t transmitter_color_depth_to_atom -ffffffff81fd1000 T dal_cmd_tbl_helper_dce80_get_table -ffffffff81fd1030 t encoder_action_to_atom -ffffffff81fd10b0 t engine_bp_to_atom -ffffffff81fd1100 t clock_source_id_to_atom -ffffffff81fd11d0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81fd1220 t signal_type_to_atom_dig_mode -ffffffff81fd1280 t hpd_sel_to_atom -ffffffff81fd12c0 t dig_encoder_sel_to_atom -ffffffff81fd1310 t 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-ffffffff82282600 T dal_gpio_close -ffffffff82282650 T dal_gpio_create -ffffffff822827e0 T dal_gpio_destroy -ffffffff82283000 T dal_gpio_service_create -ffffffff82283240 T dal_gpio_service_create_irq -ffffffff82283300 T dal_gpio_create_irq -ffffffff82283380 T dal_gpio_service_create_generic_mux -ffffffff82283420 T dal_gpio_destroy_generic_mux -ffffffff822834b0 T dal_gpio_get_generic_pin_info -ffffffff82283510 T dal_gpio_service_destroy -ffffffff82283640 T dal_mux_setup_config -ffffffff822836a0 T dal_gpio_service_lock -ffffffff82283720 T dal_gpio_service_unlock -ffffffff822837a0 T dal_gpio_service_open -ffffffff822839e0 T dal_gpio_service_close -ffffffff82283a80 T dal_irq_get_source -ffffffff82283af0 T dal_irq_get_rx_source -ffffffff82283b40 T dal_irq_setup_hpd_filter -ffffffff82283ba0 T dal_gpio_destroy_irq -ffffffff82283c30 T dal_gpio_create_ddc -ffffffff82283da0 T dal_gpio_destroy_ddc -ffffffff82283e70 T dal_ddc_close -ffffffff82283ec0 T dal_ddc_open -ffffffff82284020 T dal_ddc_change_mode -ffffffff822840c0 T dal_ddc_get_line -ffffffff822840e0 T dal_ddc_set_config -ffffffff82285000 T dal_hw_ddc_init -ffffffff82285100 T dal_hw_ddc_get_pin -ffffffff82285110 t dal_hw_ddc_destroy -ffffffff82285170 t set_config -ffffffff82286000 T dal_hw_factory_init -ffffffff82287000 T dal_hw_generic_init -ffffffff82287100 T dal_hw_generic_get_pin -ffffffff82287110 t dal_hw_generic_destroy -ffffffff82287170 t set_config -ffffffff82288000 T dal_hw_gpio_open -ffffffff822880b0 T dal_hw_gpio_config_mode -ffffffff822881a0 T dal_hw_gpio_get_value -ffffffff82288200 T dal_hw_gpio_set_value -ffffffff82288290 T dal_hw_gpio_change_mode -ffffffff822882a0 T dal_hw_gpio_close -ffffffff82288350 T dal_hw_gpio_construct -ffffffff822883b0 T dal_hw_gpio_destruct -ffffffff82289000 T dal_hw_hpd_init -ffffffff82289100 T dal_hw_hpd_get_pin -ffffffff82289110 t dal_hw_hpd_destroy -ffffffff82289170 t get_value -ffffffff82289210 t set_config -ffffffff8228a000 T dal_hw_translate_init -ffffffff8228b000 T dc_process_hdcp_msg -ffffffff8228b180 t hdmi_14_process_transaction -ffffffff8228b2d0 t dp_11_process_transaction -ffffffff8228c000 T dal_irq_service_dummy_set -ffffffff8228c050 T dal_irq_service_dummy_ack -ffffffff8228c0a0 T dce110_vblank_set -ffffffff8228c170 T to_dal_irq_source_dce110 -ffffffff8228c2f0 T dal_irq_service_dce110_create -ffffffff8228c370 t hpd_ack -ffffffff8228d000 T dal_irq_service_dce120_create +ffffffff81fd0310 t phy_id_to_atom +ffffffff81fd0350 t disp_power_gating_action_to_atom +ffffffff81fd1000 T clk_mgr_helper_get_active_display_cnt +ffffffff81fd10e0 T clk_mgr_helper_get_active_plane_cnt +ffffffff81fd1190 T clk_mgr_exit_optimized_pwr_state +ffffffff81fd12a0 T clk_mgr_optimize_pwr_state +ffffffff81fd1390 T dc_clk_mgr_create +ffffffff81fd1a50 T dc_destroy_clk_mgr +ffffffff81fd2000 T dentist_get_divider_from_did +ffffffff81fd2070 T dce_adjust_dp_ref_freq_for_ss +ffffffff81fd2170 T dce_get_dp_ref_freq_khz +ffffffff81fd22a0 T dce12_get_dp_ref_freq_khz +ffffffff81fd22c0 T dce_get_max_pixel_clock_for_all_paths +ffffffff81fd24d0 T dce_get_required_clocks_state +ffffffff81fd2580 T dce_set_clock +ffffffff81fd26e0 T dce_clock_read_ss_info +ffffffff81fd2800 T dce_clk_mgr_construct +ffffffff81fd29f0 t dce_update_clocks +ffffffff81fd3000 T dce110_get_min_vblank_time_us +ffffffff81fd3090 T dce110_fill_display_configs +ffffffff81fd3300 T dce11_pplib_apply_display_requirements +ffffffff81fd35f0 T dce110_clk_mgr_construct +ffffffff81fd36a0 t dce11_update_clocks +ffffffff81fd4000 T dce112_set_clock +ffffffff81fd4180 T dce112_set_dispclk +ffffffff81fd42a0 T dce112_set_dprefclk +ffffffff81fd4310 T dce112_clk_mgr_construct +ffffffff81fd43c0 t dce112_update_clocks +ffffffff81fd5000 T dce120_clk_mgr_construct +ffffffff81fd5090 T dce121_clk_mgr_construct +ffffffff81fd51c0 t dce12_update_clocks +ffffffff81fd6000 T rv1_clk_mgr_construct +ffffffff81fd60c0 t rv1_update_clocks +ffffffff81fd65a0 t rv1_init_clocks +ffffffff81fd6630 t rv1_enable_pme_wa +ffffffff81fd7000 T rv1_vbios_smu_set_dispclk +ffffffff81fd70e0 t rv1_vbios_smu_send_msg_with_param +ffffffff81fd71f0 T rv1_vbios_smu_set_dprefclk +ffffffff81fd8000 T rv2_clk_mgr_construct +ffffffff81fd9000 T dentist_get_did_from_divider +ffffffff81fd9080 T dcn20_update_clocks_update_dpp_dto +ffffffff81fd9150 T dcn20_update_clocks_update_dentist +ffffffff81fd9640 T dcn2_update_clocks +ffffffff81fd9bc0 T dcn2_read_clocks_from_hw_dentist +ffffffff81fd9c90 T dcn2_update_clocks_fpga +ffffffff81fd9dc0 T dcn2_init_clocks +ffffffff81fd9e60 T dcn2_get_clock +ffffffff81fd9ed0 T dcn20_clk_mgr_construct +ffffffff81fda000 t dcn2_enable_pme_wa +ffffffff81fda050 t dcn2_are_clock_states_equal +ffffffff81fda0c0 t dcn2_notify_link_rate_change +ffffffff81fdb000 T dcn201_clk_mgr_construct +ffffffff81fdb120 t dcn201_update_clocks +ffffffff81fdb340 t dcn201_init_clocks +ffffffff81fdc000 T rn_clk_mgr_construct +ffffffff81fdc8a0 t rn_update_clocks +ffffffff81fdce60 t rn_set_low_power_state +ffffffff81fdd040 t rn_init_clocks +ffffffff81fdd0e0 t rn_enable_pme_wa +ffffffff81fdd0f0 t rn_are_clock_states_equal +ffffffff81fdd140 t rn_notify_wm_ranges +ffffffff81fdd4d0 t rn_notify_link_rate_change +ffffffff81fde000 T rn_vbios_smu_get_smu_version +ffffffff81fde020 t rn_vbios_smu_send_msg_with_param +ffffffff81fde1b0 T rn_vbios_smu_set_dispclk +ffffffff81fde2d0 T rn_vbios_smu_set_dprefclk +ffffffff81fde340 T rn_vbios_smu_set_hard_min_dcfclk +ffffffff81fde3c0 T rn_vbios_smu_set_min_deep_sleep_dcfclk +ffffffff81fde440 T rn_vbios_smu_set_phyclk +ffffffff81fde480 T rn_vbios_smu_set_dppclk +ffffffff81fde530 T rn_vbios_smu_set_dcn_low_power_state +ffffffff81fde550 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff81fde570 T rn_vbios_smu_enable_pme_wa +ffffffff81fde590 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff81fdf000 T dcn3_init_clocks +ffffffff81fdf3b0 t dcn3_init_clocks_fpga +ffffffff81fdf3c0 T dcn3_clk_mgr_construct +ffffffff81fdf510 T dcn3_clk_mgr_destroy +ffffffff81fdf570 t dcn3_update_clocks +ffffffff81fdf990 t dcn3_enable_pme_wa +ffffffff81fdf9d0 t dcn3_are_clock_states_equal +ffffffff81fdfa30 t dcn3_notify_wm_ranges +ffffffff81fdfcc0 t dcn30_notify_link_rate_change +ffffffff81fdfde0 t dcn3_set_hard_min_memclk +ffffffff81fdfe80 t dcn3_set_hard_max_memclk +ffffffff81fdfee0 t dcn3_set_max_memclk +ffffffff81fdff20 t dcn3_set_min_memclk +ffffffff81fdff60 t dcn3_get_memclk_states_from_smu +ffffffff81fe00a0 t dcn3_is_smu_present +ffffffff81fe1000 T dcn30_smu_test_message +ffffffff81fe1070 t dcn30_smu_send_msg_with_param +ffffffff81fe11d0 T dcn30_smu_get_smu_version +ffffffff81fe11f0 T dcn30_smu_check_driver_if_version +ffffffff81fe1240 T dcn30_smu_check_msg_header_version +ffffffff81fe1290 T dcn30_smu_set_dram_addr_high +ffffffff81fe12b0 T dcn30_smu_set_dram_addr_low +ffffffff81fe12d0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff81fe12f0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff81fe1310 T dcn30_smu_set_hard_min_by_freq +ffffffff81fe1360 T dcn30_smu_set_hard_max_by_freq +ffffffff81fe13b0 T dcn30_smu_get_dpm_freq_by_index +ffffffff81fe1400 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff81fe1450 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff81fe1470 T dcn30_smu_set_num_of_displays +ffffffff81fe1490 T dcn30_smu_set_display_refresh_from_mall +ffffffff81fe14c0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff81fe14e0 T dcn30_smu_set_pme_workaround +ffffffff81fe2000 T dcn301_smu_get_smu_version +ffffffff81fe2070 t dcn301_smu_send_msg_with_param +ffffffff81fe21f0 T dcn301_smu_set_dispclk +ffffffff81fe2290 T dcn301_smu_set_dprefclk +ffffffff81fe2340 T dcn301_smu_set_hard_min_dcfclk +ffffffff81fe23e0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff81fe2480 T dcn301_smu_set_dppclk +ffffffff81fe2520 T dcn301_smu_set_display_idle_optimization +ffffffff81fe2570 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff81fe25c0 T dcn301_smu_enable_pme_wa +ffffffff81fe25e0 T dcn301_smu_set_dram_addr_high +ffffffff81fe2630 T dcn301_smu_set_dram_addr_low +ffffffff81fe2680 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff81fe26a0 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff81fe3000 T vg_clk_mgr_construct +ffffffff81fe3840 T vg_clk_mgr_destroy +ffffffff81fe3890 t vg_update_clocks +ffffffff81fe3bd0 t vg_init_clocks +ffffffff81fe3c70 t vg_enable_pme_wa +ffffffff81fe3c80 t vg_are_clock_states_equal +ffffffff81fe3cd0 t vg_notify_wm_ranges +ffffffff81fe5000 T dcn31_update_clocks +ffffffff81fe5610 T dcn31_init_clocks +ffffffff81fe56c0 T dcn31_are_clock_states_equal +ffffffff81fe5720 T dcn31_get_dtb_ref_freq_khz +ffffffff81fe5750 T dcn31_clk_mgr_construct +ffffffff81fe5e20 T dcn31_clk_mgr_destroy +ffffffff81fe5e70 t dcn31_set_low_power_state +ffffffff81fe6080 t dcn31_enable_pme_wa +ffffffff81fe6090 t dcn31_notify_wm_ranges +ffffffff81fe6410 t find_clk_for_voltage +ffffffff81fe7000 T dcn31_smu_get_smu_version +ffffffff81fe7020 t dcn31_smu_send_msg_with_param +ffffffff81fe7230 T dcn31_smu_set_dispclk +ffffffff81fe72a0 T dcn31_smu_set_dprefclk +ffffffff81fe7310 T dcn31_smu_set_hard_min_dcfclk +ffffffff81fe7390 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff81fe7410 T dcn31_smu_set_dppclk +ffffffff81fe7480 T dcn31_smu_set_display_idle_optimization +ffffffff81fe74d0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff81fe7520 T dcn31_smu_enable_pme_wa +ffffffff81fe7560 T dcn31_smu_set_dram_addr_high +ffffffff81fe75a0 T dcn31_smu_set_dram_addr_low +ffffffff81fe75e0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff81fe7620 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff81fe7660 T dcn31_smu_set_zstate_support +ffffffff81fe76d0 T dcn31_smu_set_dtbclk +ffffffff81fe8000 T dcn314_update_clocks +ffffffff81fe8650 T dcn314_are_clock_states_equal +ffffffff81fe86b0 T dcn314_clk_mgr_construct +ffffffff81fe93c0 T dcn314_clk_mgr_destroy +ffffffff81fe9410 t dcn314_enable_pme_wa +ffffffff81fe9420 t dcn314_notify_wm_ranges +ffffffff81fea000 T dcn314_smu_get_smu_version +ffffffff81fea020 t dcn314_smu_send_msg_with_param +ffffffff81fea250 T dcn314_smu_set_dispclk +ffffffff81fea2c0 T dcn314_smu_set_dprefclk +ffffffff81fea330 T dcn314_smu_set_hard_min_dcfclk +ffffffff81fea3b0 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81fea430 T dcn314_smu_set_dppclk +ffffffff81fea4a0 T dcn314_smu_set_display_idle_optimization +ffffffff81fea4f0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81fea540 T dcn314_smu_enable_pme_wa +ffffffff81fea580 T dcn314_smu_set_dram_addr_high +ffffffff81fea5c0 T dcn314_smu_set_dram_addr_low +ffffffff81fea600 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81fea640 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81fea680 T dcn314_smu_set_zstate_support +ffffffff81fea6d0 T dcn314_smu_set_dtbclk +ffffffff81feb000 T dcn315_clk_mgr_construct +ffffffff81feb810 T dcn315_clk_mgr_destroy +ffffffff81feb860 t dcn315_update_clocks +ffffffff81febda0 t dcn315_enable_pme_wa +ffffffff81febdb0 t dcn315_notify_wm_ranges +ffffffff81fec130 t dcn315_disable_otg_wa +ffffffff81fed000 T dcn315_smu_get_smu_version +ffffffff81fed020 t dcn315_smu_send_msg_with_param +ffffffff81fed310 T dcn315_smu_set_dispclk +ffffffff81fed380 T dcn315_smu_set_hard_min_dcfclk +ffffffff81fed400 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81fed480 T dcn315_smu_set_dppclk +ffffffff81fed4f0 T dcn315_smu_set_display_idle_optimization +ffffffff81fed540 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81fed590 T dcn315_smu_enable_pme_wa +ffffffff81fed5d0 T dcn315_smu_set_dram_addr_high +ffffffff81fed610 T dcn315_smu_set_dram_addr_low +ffffffff81fed650 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81fed690 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81fed6d0 T dcn315_smu_get_dpref_clk +ffffffff81fed730 T dcn315_smu_get_dtbclk +ffffffff81fed790 T dcn315_smu_set_dtbclk +ffffffff81fee000 T dcn316_clk_mgr_construct +ffffffff81fee650 T dcn316_clk_mgr_destroy +ffffffff81fee6a0 t dcn316_update_clocks +ffffffff81feec90 t dcn316_enable_pme_wa +ffffffff81feeca0 t dcn316_notify_wm_ranges +ffffffff81fef020 t find_clk_for_voltage +ffffffff81ff0000 T dcn316_smu_get_smu_version +ffffffff81ff0020 t dcn316_smu_send_msg_with_param +ffffffff81ff01b0 T dcn316_smu_set_dispclk +ffffffff81ff0220 T dcn316_smu_set_hard_min_dcfclk +ffffffff81ff02a0 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff81ff0320 T dcn316_smu_set_dppclk +ffffffff81ff0390 T dcn316_smu_set_display_idle_optimization +ffffffff81ff03e0 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff81ff0430 T dcn316_smu_set_dram_addr_high +ffffffff81ff0470 T dcn316_smu_set_dram_addr_low +ffffffff81ff04b0 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff81ff04f0 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff81ff0530 T dcn316_smu_enable_pme_wa +ffffffff81ff0570 T dcn316_smu_set_dtbclk +ffffffff81ff05b0 T dcn316_smu_get_dpref_clk +ffffffff81ff0610 T dcn316_smu_get_smu_fclk +ffffffff81ff1000 T dcn32_init_clocks +ffffffff81ff1560 T dcn32_update_clocks_update_dpp_dto +ffffffff81ff16a0 T dcn32_clk_mgr_construct +ffffffff81ff1940 t dcn32_dump_clk_registers +ffffffff81ff1b60 T dcn32_clk_mgr_destroy +ffffffff81ff1bc0 t dcn32_update_clocks +ffffffff81ff2420 t dcn32_enable_pme_wa +ffffffff81ff2460 t dcn32_are_clock_states_equal +ffffffff81ff24d0 t dcn32_notify_wm_ranges +ffffffff81ff2650 t dcn32_set_hard_min_memclk +ffffffff81ff26e0 t dcn32_set_hard_max_memclk +ffffffff81ff2730 t dcn32_set_max_memclk +ffffffff81ff2770 t dcn32_set_min_memclk +ffffffff81ff27b0 t dcn32_get_memclk_states_from_smu +ffffffff81ff2a00 t dcn32_is_smu_present +ffffffff81ff2a30 t dcn32_get_dispclk_from_dentist +ffffffff81ff2ac0 t dcn32_update_clocks_update_dentist +ffffffff81ff3000 T dcn32_smu_send_fclk_pstate_message +ffffffff81ff3020 t dcn32_smu_send_msg_with_param +ffffffff81ff3160 T dcn32_smu_send_cab_for_uclk_message +ffffffff81ff3190 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff81ff31b0 T dcn32_smu_set_pme_workaround +ffffffff81ff31d0 T dcn32_smu_set_hard_min_by_freq +ffffffff81ff3220 T dcn32_smu_wait_for_dmub_ack_mclk +ffffffff81ff4000 T dc_stream_adjust_vmin_vmax +ffffffff81ff4170 T dc_stream_get_last_used_drr_vtotal +ffffffff81ff42d0 T dc_stream_get_crtc_position +ffffffff81ff4500 T dc_stream_configure_crc +ffffffff81ff4670 T dc_stream_get_crc +ffffffff81ff4750 T dc_stream_set_dyn_expansion +ffffffff81ff49c0 T dc_stream_set_dither_option +ffffffff81ff4b60 T dc_stream_set_gamut_remap +ffffffff81ff4ce0 T dc_stream_program_csc_matrix +ffffffff81ff4f00 T dc_stream_set_static_screen_params +ffffffff81ff5080 T dc_create +ffffffff81ff5600 t dc_construct_ctx +ffffffff81ff5770 t dc_destruct +ffffffff81ff5a40 T dc_hardware_init +ffffffff81ff5b10 T dc_init_callbacks +ffffffff81ff5b60 T dc_deinit_callbacks +ffffffff81ff5bb0 T dc_destroy +ffffffff81ff5c00 T dc_validate_boot_timing +ffffffff81ff5fa0 T dc_enable_stereo +ffffffff81ff60a0 T dc_trigger_sync +ffffffff81ff66d0 T dc_z10_restore +ffffffff81ff6710 T dc_z10_save_init +ffffffff81ff6750 T dc_commit_streams +ffffffff81ff6c30 t commit_minimal_transition_state +ffffffff81ff7060 T dc_create_state +ffffffff81ff70f0 t dc_commit_state_no_check +ffffffff81ff8780 T dc_release_state +ffffffff81ff87e0 T dc_acquire_release_mpc_3dlut +ffffffff81ff88b0 T dc_post_update_surfaces_to_stream +ffffffff81ff8cc0 T dc_copy_state +ffffffff81ff8e90 T dc_retain_state +ffffffff81ff8ec0 T dc_set_generic_gpio_for_stereo +ffffffff81ff8fd0 T dc_check_update_surfaces_for_stream +ffffffff81ff99b0 T dc_dmub_update_dirty_rect +ffffffff81ff9bc0 T dc_update_planes_and_stream +ffffffff81ffa740 t fast_update_only +ffffffff81ffaaa0 t commit_planes_for_stream_fast +ffffffff81ffaec0 t commit_planes_for_stream +ffffffff81ffc440 T dc_commit_updates_for_stream +ffffffff81ffca60 t copy_surface_update_to_plane +ffffffff81ffce70 t copy_stream_update_to_stream +ffffffff81ffd510 T dc_get_current_stream_count +ffffffff81ffd550 T dc_get_stream_at_index +ffffffff81ffd5a0 T dc_interrupt_to_irq_source +ffffffff81ffd5c0 T dc_interrupt_set +ffffffff81ffd610 T dc_interrupt_ack +ffffffff81ffd630 T dc_power_down_on_boot +ffffffff81ffd680 T dc_set_power_state +ffffffff81ffd860 T dc_resume +ffffffff81ffd8e0 T dc_is_dmcu_initialized +ffffffff81ffd930 T get_clock_requirements_for_state +ffffffff81ffd9b0 T dc_set_clock +ffffffff81ffd9f0 T dc_get_clock +ffffffff81ffda30 T dc_set_psr_allow_active +ffffffff81ffdb30 T dc_allow_idle_optimizations +ffffffff81ffdbd0 T dc_unlock_memory_clock_frequency +ffffffff81ffdc40 T dc_lock_memory_clock_frequency +ffffffff81ffdcd0 T dc_enable_dcmode_clk_limit +ffffffff81ffde90 t blank_and_force_memclk +ffffffff81ffe070 T dc_is_plane_eligible_for_idle_optimizations +ffffffff81ffe0c0 T dc_hardware_release +ffffffff81ffe110 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff81ffe150 T dc_is_dmub_outbox_supported +ffffffff81ffe1c0 T dc_enable_dmub_notifications +ffffffff81ffe230 T dc_enable_dmub_outbox +ffffffff81ffe270 T dc_process_dmub_aux_transfer_async +ffffffff81ffe3f0 T get_link_index_from_dpia_port_index +ffffffff81ffe4a0 T dc_process_dmub_set_config_async +ffffffff81ffe580 T dc_process_dmub_set_mst_slots +ffffffff81ffe670 T dc_process_dmub_dpia_hpd_int_enable +ffffffff81ffe730 T dc_print_dmub_diagnostic_data +ffffffff81ffe750 T dc_disable_accelerated_mode +ffffffff81ffe770 T dc_notify_vsync_int_state +ffffffff81ffe990 T dc_abm_save_restore +ffffffff81ffeb60 T dc_query_current_properties +ffffffff81ffebd0 T dc_set_edp_power +ffffffff81ffec40 t create_links +ffffffff81fff0a0 t create_link_encoders +ffffffff81fff180 t dc_update_viusal_confirm_color +ffffffff82000000 T pre_surface_trace +ffffffff82000030 T update_surface_trace +ffffffff82000060 T post_surface_trace +ffffffff82000090 T context_timing_trace +ffffffff82000240 T context_clock_trace +ffffffff82000270 T dc_status_to_str +ffffffff82001000 T find_color_matrix +ffffffff820010b0 T color_space_to_black_color +ffffffff82001120 T hwss_wait_for_blank_complete +ffffffff820011c0 T get_mpctree_visual_confirm_color +ffffffff82001220 T get_surface_visual_confirm_color +ffffffff820012d0 T get_hdr_visual_confirm_color +ffffffff82001390 T get_subvp_visual_confirm_color +ffffffff82001490 T hwss_build_fast_sequence +ffffffff82001b50 T hwss_execute_sequence +ffffffff82001f40 T hwss_setup_dpp +ffffffff82001fe0 T hwss_program_bias_and_scale +ffffffff82002060 T hwss_program_manual_trigger +ffffffff820020b0 T hwss_power_on_mpc_mem_pwr +ffffffff82002100 T hwss_set_output_csc +ffffffff82002150 T hwss_set_ocsc_default +ffffffff820021a0 T hwss_send_dmcub_cmd +ffffffff820021c0 T get_mclk_switch_visual_confirm_color +ffffffff82002320 T get_surface_tile_visual_confirm_color +ffffffff82003000 T link_enc_cfg_init +ffffffff820031b0 T link_enc_cfg_copy +ffffffff820031e0 T link_enc_cfg_link_encs_assign +ffffffff820045a0 T link_enc_cfg_validate +ffffffff82004d40 T link_enc_cfg_link_enc_unassign +ffffffff82004ed0 T link_enc_cfg_is_transmitter_mappable +ffffffff82004ff0 T link_enc_cfg_get_stream_using_link_enc +ffffffff820050f0 T link_enc_cfg_get_link_using_link_enc +ffffffff82005200 T link_enc_cfg_get_link_enc_used_by_link +ffffffff82005380 T link_enc_cfg_get_next_avail_link_enc +ffffffff820054f0 T link_enc_cfg_get_link_enc_used_by_stream +ffffffff82005510 T link_enc_cfg_get_link_enc +ffffffff820055a0 T link_enc_cfg_get_link_enc_used_by_stream_current +ffffffff82005720 T link_enc_cfg_is_link_enc_avail +ffffffff82005920 T link_enc_cfg_set_transient_mode +ffffffff82006000 T dc_get_link_at_index +ffffffff82006030 T dc_get_edp_links +ffffffff820060b0 T dc_get_edp_link_panel_inst +ffffffff82006170 T dc_link_detect +ffffffff820061a0 T dc_link_detect_connection_type +ffffffff820061d0 T dc_link_get_status +ffffffff82006200 T dc_link_is_hdcp14 +ffffffff82006230 T dc_link_is_hdcp22 +ffffffff82006260 T dc_link_clear_dprx_states +ffffffff82006290 T dc_link_reset_cur_dp_mst_topology +ffffffff820062c0 T dc_link_bandwidth_kbps +ffffffff820062f0 T dc_get_cur_link_res_map +ffffffff82006310 T dc_restore_link_res_map +ffffffff82006330 T dc_link_update_dsc_config +ffffffff82006360 T dc_is_oem_i2c_device_present +ffffffff820063b0 T dc_submit_i2c +ffffffff820063e0 T dc_submit_i2c_oem +ffffffff82006430 T dc_link_dp_handle_automated_test +ffffffff82006460 T dc_link_dp_set_test_pattern +ffffffff82006490 T dc_link_set_drive_settings +ffffffff82006520 T dc_link_set_preferred_link_settings +ffffffff82006540 T dc_link_set_preferred_training_settings +ffffffff82006570 T dc_dp_trace_is_initialized +ffffffff820065a0 T dc_dp_trace_set_is_logged_flag +ffffffff820065d0 T dc_dp_trace_is_logged +ffffffff82006600 T dc_dp_trace_get_lt_end_timestamp +ffffffff82006630 T dc_dp_trace_get_lt_counts +ffffffff82006660 T dc_dp_trace_get_link_loss_count +ffffffff82006690 T dc_link_add_remote_sink +ffffffff820066c0 T dc_link_remove_remote_sink +ffffffff820066f0 T dc_link_aux_transfer_raw +ffffffff82006720 T dc_link_bw_kbps_from_raw_frl_link_rate_data +ffffffff82006740 T dc_link_decide_edp_link_settings +ffffffff82006770 T dc_link_dp_get_max_link_enc_cap +ffffffff820067a0 T dc_link_dp_mst_decide_link_encoding_format +ffffffff820067d0 T dc_link_get_link_cap +ffffffff82006800 T dc_link_get_highest_encoding_format +ffffffff820068c0 T dc_link_is_dp_sink_present +ffffffff820068f0 T dc_link_is_fec_supported +ffffffff82006920 T dc_link_overwrite_extended_receiver_cap +ffffffff82006950 T dc_link_should_enable_fec +ffffffff82006980 T dc_link_dp_dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff820069b0 T dc_link_handle_usb4_bw_alloc_response +ffffffff820069e0 T dc_link_check_link_loss_status +ffffffff82006a10 T dc_link_dp_allow_hpd_rx_irq +ffffffff82006a40 T dc_link_dp_handle_link_loss +ffffffff82006a70 T dc_link_dp_read_hpd_rx_irq_data +ffffffff82006aa0 T dc_link_handle_hpd_rx_irq +ffffffff82006ad0 T dc_link_dp_receiver_power_ctrl +ffffffff82006b00 T dc_link_decide_lttpr_mode +ffffffff82006b30 T dc_link_edp_panel_backlight_power_on +ffffffff82006b60 T dc_link_get_backlight_level +ffffffff82006b90 T dc_link_get_backlight_level_nits +ffffffff82006bc0 T dc_link_set_backlight_level +ffffffff82006bf0 T dc_link_set_backlight_level_nits +ffffffff82006c20 T dc_link_get_target_backlight_pwm +ffffffff82006c50 T dc_link_get_psr_state +ffffffff82006c80 T dc_link_set_psr_allow_active +ffffffff82006cb0 T dc_link_setup_psr +ffffffff82006ce0 T dc_link_get_replay_state +ffffffff82006d10 T dc_link_wait_for_t12 +ffffffff82006d40 T dc_link_get_hpd_state +ffffffff82006d70 T dc_link_enable_hpd +ffffffff82006da0 T dc_link_disable_hpd +ffffffff82006dd0 T dc_link_enable_hpd_filter +ffffffff82006e00 T dc_link_validate +ffffffff82007000 T resource_parse_asic_id +ffffffff82007250 T dc_create_resource_pool +ffffffff82007550 T dc_destroy_resource_pool +ffffffff820075c0 T resource_construct +ffffffff82007aa0 T resource_unreference_clock_source +ffffffff82007b20 T resource_reference_clock_source +ffffffff82007ba0 T resource_get_clock_source_reference +ffffffff82007c20 T resource_are_vblanks_synchronizable +ffffffff82007e40 T resource_are_streams_timing_synchronizable +ffffffff82007f30 T resource_find_used_clk_src_for_sharing +ffffffff82008060 T resource_get_num_mpc_splits +ffffffff820080f0 T resource_get_num_odm_splits +ffffffff820081b0 T resource_get_otg_master +ffffffff82008250 T resource_build_scaling_params +ffffffff82008fe0 t calculate_odm_slice_in_timing_active +ffffffff82009160 T resource_build_scaling_params_for_context +ffffffff820092b0 T resource_find_free_secondary_pipe_legacy +ffffffff82009350 T resource_find_free_pipe_used_in_cur_mpc_blending_tree +ffffffff820093c0 T resource_is_pipe_type +ffffffff82009440 T recource_find_free_pipe_not_used_in_cur_res_ctx +ffffffff820094c0 T resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine +ffffffff820095e0 T resource_is_for_mpcc_combine +ffffffff82009670 T resource_find_any_free_pipe +ffffffff820096e0 T resource_get_otg_master_for_stream +ffffffff82009810 T resource_get_opp_head +ffffffff820098a0 T dc_add_plane_to_context +ffffffff82009b60 T dc_remove_plane_from_context +ffffffff82009d40 T dc_rem_all_planes_for_stream +ffffffff82009f00 T dc_add_all_planes_for_stream +ffffffff8200a080 T dc_is_timing_changed +ffffffff8200a0e0 T dc_is_stream_unchanged +ffffffff8200a1c0 T dc_is_stream_scaling_unchanged +ffffffff8200a260 T update_audio_usage +ffffffff8200a2d0 T dc_add_stream_to_ctx +ffffffff8200a3a0 T dc_remove_stream_from_ctx +ffffffff8200a7b0 T resource_map_pool_resources +ffffffff8200b210 t acquire_first_split_pipe +ffffffff8200b380 t add_hpo_dp_link_enc_to_ctx +ffffffff8200b450 t find_first_free_audio +ffffffff8200b500 T dc_resource_state_copy_construct_current +ffffffff8200b520 T dc_resource_state_copy_construct +ffffffff8200b6c0 T dc_resource_state_construct +ffffffff8200b6e0 T dc_resource_is_dsc_encoding_supported +ffffffff8200b730 T dc_validate_with_context +ffffffff8200c360 t planes_changed_for_existing_stream +ffffffff8200c4e0 T dc_validate_global_state +ffffffff8200c860 T dc_resource_state_destruct +ffffffff8200c940 T dc_resource_find_first_free_pll +ffffffff8200c9b0 T resource_build_info_frame +ffffffff8200d0e0 T resource_map_clock_resources +ffffffff8200d270 T pipe_need_reprogram +ffffffff8200d3e0 T resource_build_bit_depth_reduction_params +ffffffff8200d610 T dc_validate_stream +ffffffff8200d7e0 T dc_validate_plane +ffffffff8200d870 T resource_pixel_format_to_bpp +ffffffff8200d8f0 T get_audio_check +ffffffff8200da10 T get_temp_dp_link_res +ffffffff8200db20 T reset_syncd_pipes_from_disabled_pipes +ffffffff8200dc70 T check_syncd_pipes_for_disabled_master_pipe +ffffffff8200ddb0 T reset_sync_context_for_pipe +ffffffff8200de60 T resource_transmitter_to_phy_idx +ffffffff8200dec0 T get_link_hwss +ffffffff8200df50 T is_h_timing_divisible_by_2 +ffffffff8200dfb0 T dc_resource_acquire_secondary_pipe_for_mpc_odm +ffffffff8200e1c0 T update_dp_encoder_resources_for_test_harness +ffffffff8200e480 t calculate_plane_rec_in_timing_active +ffffffff8200e750 t calculate_init_and_vp +ffffffff8200f000 T dc_sink_retain +ffffffff8200f030 T dc_sink_release +ffffffff8200f0a0 T dc_sink_create +ffffffff82010000 T dc_stat_get_dmub_notification +ffffffff820100b0 T dc_stat_get_dmub_dataout +ffffffff82011000 T update_stream_signal +ffffffff82011080 T dc_stream_retain +ffffffff820110b0 T dc_stream_release +ffffffff82011130 T dc_create_stream_for_sink +ffffffff82011470 T dc_copy_stream +ffffffff82011540 T dc_stream_get_status_from_state +ffffffff820115a0 T dc_stream_get_status +ffffffff82011610 T dc_optimize_timing_for_fsft +ffffffff82011660 T dc_stream_set_cursor_attributes +ffffffff82011860 t program_cursor_attributes +ffffffff820119c0 T dc_stream_set_cursor_position +ffffffff82011ae0 t program_cursor_position +ffffffff82011c20 T dc_stream_add_writeback +ffffffff82011e30 T dc_stream_remove_writeback +ffffffff82011f60 T dc_stream_warmup_writeback +ffffffff82011fa0 T dc_stream_get_vblank_counter +ffffffff82012070 T dc_stream_send_dp_sdp +ffffffff82012300 T dc_stream_get_scanoutpos +ffffffff820123e0 T dc_stream_dmdata_status_done +ffffffff820124a0 T dc_stream_set_dynamic_metadata +ffffffff82012600 T dc_stream_add_dsc_to_resource +ffffffff82012650 T dc_stream_get_pipe_ctx +ffffffff82012700 T dc_stream_log +ffffffff82013000 T enable_surface_flip_reporting +ffffffff82013030 T dc_create_plane_state +ffffffff820131d0 T dc_plane_get_status +ffffffff82013350 T dc_plane_state_retain +ffffffff82013380 T dc_plane_state_release +ffffffff820134d0 T dc_gamma_retain +ffffffff82013500 T dc_gamma_release +ffffffff82013560 T dc_create_gamma +ffffffff820135b0 T dc_transfer_func_retain +ffffffff820135e0 T dc_transfer_func_release +ffffffff82013630 T dc_create_transfer_func +ffffffff82013680 T dc_create_3dlut_func +ffffffff820136e0 T dc_3dlut_func_release +ffffffff82013730 T dc_3dlut_func_retain +ffffffff82014000 T vm_helper_mark_vmid_used +ffffffff82014030 T dc_setup_system_context +ffffffff820140c0 T dc_setup_vm_context +ffffffff820140f0 T dc_get_vmid_use_vector +ffffffff82014150 T vm_helper_init +ffffffff82015000 T dc_dmub_srv_create +ffffffff820150a0 T dc_dmub_srv_destroy +ffffffff820150f0 T dc_dmub_srv_wait_idle +ffffffff82015150 T dc_dmub_srv_log_diagnostic_data +ffffffff82015690 T dc_dmub_srv_clear_inbox0_ack +ffffffff820156f0 T dc_dmub_srv_wait_for_inbox0_ack +ffffffff82015750 T dc_dmub_srv_send_inbox0_cmd +ffffffff820157b0 T dc_dmub_srv_cmd_run +ffffffff820157d0 T dc_dmub_srv_cmd_run_list +ffffffff82015980 T dc_dmub_srv_optimized_init_done +ffffffff82015a00 T dc_dmub_srv_notify_stream_mask +ffffffff82015a60 T dc_dmub_srv_is_restore_required +ffffffff82015ae0 T dc_dmub_srv_get_dmub_outbox0_msg +ffffffff82015b10 T dc_dmub_trace_event_control +ffffffff82015b30 T dc_dmub_srv_drr_update_cmd +ffffffff82015bc0 T dc_dmub_srv_set_drr_manual_trigger_cmd +ffffffff82015c50 T dc_dmub_srv_p_state_delegate +ffffffff82016000 T dc_dmub_srv_query_caps_cmd +ffffffff820160c0 T dc_dmub_srv_get_visual_confirm_color_cmd +ffffffff820161a0 T dc_dmub_setup_subvp_dmub_command +ffffffff82016bb0 T dc_dmub_srv_get_diagnostic_data +ffffffff82016bf0 T dc_send_update_cursor_info_to_dmu +ffffffff82016f60 T dc_dmub_check_min_version +ffffffff82016fa0 T dc_dmub_srv_enable_dpia_trace +ffffffff82018000 T dc_edid_parser_send_cea +ffffffff820180b0 T dc_edid_parser_recv_cea_ack +ffffffff82018140 T dc_edid_parser_recv_amd_vsdb +ffffffff82019000 T generic_reg_update_ex +ffffffff82019330 t set_reg_field_values +ffffffff820194e0 T generic_reg_set_ex +ffffffff820196d0 T generic_reg_get +ffffffff82019740 T generic_reg_get2 +ffffffff820197d0 T generic_reg_get3 +ffffffff82019870 T generic_reg_get4 +ffffffff82019920 T generic_reg_get5 +ffffffff820199e0 T generic_reg_get6 +ffffffff82019ac0 T generic_reg_get7 +ffffffff82019bb0 T generic_reg_get8 +ffffffff82019cc0 T generic_reg_wait +ffffffff82019f10 T generic_write_indirect_reg +ffffffff82019f60 T generic_read_indirect_reg +ffffffff8201a000 T generic_indirect_reg_get +ffffffff8201a1b0 T generic_indirect_reg_update_ex +ffffffff8201a3c0 T generic_indirect_reg_update_ex_sync +ffffffff8201a5b0 T generic_indirect_reg_get_sync +ffffffff8201a6e0 T reg_sequence_start_gather +ffffffff8201a770 T reg_sequence_start_execute +ffffffff8201a910 T reg_sequence_wait_done +ffffffff8201a970 T dce_version_to_string +ffffffff8201b000 T dce_abm_create +ffffffff8201b0b0 T dce_abm_destroy +ffffffff8201b100 t dce_abm_init +ffffffff8201b380 t dce_abm_set_level +ffffffff8201b480 t dce_abm_immediate_disable +ffffffff8201b4d0 t dce_abm_set_pipe +ffffffff8201b620 t dce_abm_set_backlight_level_pwm +ffffffff8201b810 t dce_abm_get_current_backlight +ffffffff8201b840 t dce_abm_get_target_backlight +ffffffff8201c000 T dce_aud_az_enable +ffffffff8201c150 T dce_aud_az_disable +ffffffff8201c340 T dce_aud_az_configure +ffffffff8201cfc0 t check_audio_bandwidth +ffffffff8201d150 T dce_aud_wall_dto_setup +ffffffff8201d2d0 T dce_aud_hw_init +ffffffff8201d4a0 T dce_aud_destroy +ffffffff8201d4f0 T dce_audio_create +ffffffff8201d5b0 t dce_aud_endpoint_valid +ffffffff8201e000 T dce110_engine_destroy +ffffffff8201e050 T dce110_aux_engine_construct +ffffffff8201e0d0 t dce_aux_configure_timeout +ffffffff8201e2b0 T dce_aux_transfer_raw +ffffffff8201eae0 t acquire +ffffffff8201ed50 T dce_aux_transfer_dmub_raw +ffffffff8201ee50 T dce_aux_transfer_with_retries +ffffffff82020000 T look_up_in_video_optimized_rate_tlb +ffffffff82020070 T dce110_clk_src_construct +ffffffff82020270 t calc_pll_max_vco_construct +ffffffff82020410 T dce112_clk_src_construct +ffffffff820204a0 T dcn20_clk_src_construct +ffffffff82020550 T dcn3_clk_src_construct +ffffffff82020600 T dcn31_clk_src_construct +ffffffff820206b0 T dcn301_clk_src_construct +ffffffff82020760 t dce110_clock_source_power_down +ffffffff820207f0 t dce110_program_pix_clk +ffffffff82020e80 t dce110_get_pix_clk_dividers +ffffffff82021500 t get_pixel_clk_frequency_100hz +ffffffff82021610 t get_ss_info_from_atombios +ffffffff820218e0 t dce112_program_pix_clk +ffffffff82021af0 t dce112_get_pix_clk_dividers +ffffffff82021c00 t dcn20_program_pix_clk +ffffffff82021c90 t dcn20_override_dp_pix_clk +ffffffff82021d80 t dcn3_program_pix_clk +ffffffff82021f30 t dcn3_get_pix_clk_dividers +ffffffff82022000 t dcn31_program_pix_clk +ffffffff82023000 T dce_dmcu_create +ffffffff820230c0 T dcn10_dmcu_create +ffffffff82023180 T dcn20_dmcu_create +ffffffff82023240 T dcn21_dmcu_create +ffffffff82023330 T dce_dmcu_destroy +ffffffff82023380 t dce_dmcu_init +ffffffff820233b0 t dce_dmcu_load_iram +ffffffff82023510 t dce_dmcu_set_psr_enable +ffffffff82023640 t dce_dmcu_setup_psr +ffffffff82023970 t dce_get_dmcu_psr_state +ffffffff82023a50 t dce_psr_wait_loop +ffffffff82023b80 t dce_get_psr_wait_loop +ffffffff82023bb0 t dce_is_dmcu_initialized +ffffffff82023c10 t dcn10_dmcu_init +ffffffff82024150 t dcn10_dmcu_load_iram +ffffffff82024390 t dcn10_dmcu_set_psr_enable +ffffffff82024520 t dcn10_dmcu_setup_psr +ffffffff820248e0 t dcn10_get_dmcu_psr_state +ffffffff82024a00 t dcn10_psr_wait_loop +ffffffff82024b10 t dcn10_get_psr_wait_loop +ffffffff82024b40 t dcn10_is_dmcu_initialized +ffffffff82024b70 t dcn10_send_edid_cea +ffffffff82024d10 t dcn10_recv_amd_vsdb +ffffffff82024dc0 t dcn10_recv_edid_cea_ack +ffffffff82024e40 t dcn10_get_scp_results +ffffffff82024f60 t dcn20_lock_phy +ffffffff82025090 t dcn20_unlock_phy +ffffffff820251c0 t dcn21_dmcu_init +ffffffff82026000 T dce_enable_fe_clock +ffffffff82026040 T dce_pipe_control_lock +ffffffff82026240 T dce_set_blender_mode +ffffffff82026350 T dce_clock_gating_power_up +ffffffff820263f0 T dce_crtc_switch_to_clk_src +ffffffff820265b0 T dce_use_lut +ffffffff82027000 T dce_i2c_oem_device_present +ffffffff82027080 T dce_i2c_submit_command +ffffffff82028000 T acquire_i2c_hw_engine +ffffffff820283a0 T dce_i2c_submit_command_hw +ffffffff82028ce0 t set_speed +ffffffff82028e30 T dce_i2c_hw_construct +ffffffff82028ea0 T dce100_i2c_hw_construct +ffffffff82028f10 T dce112_i2c_hw_construct +ffffffff82028f80 T dcn1_i2c_hw_construct +ffffffff82028ff0 T dcn2_i2c_hw_construct +ffffffff82029080 t is_hw_busy +ffffffff8202a000 T dce_i2c_sw_construct +ffffffff8202a030 T dce_i2c_engine_acquire_sw +ffffffff8202a0d0 T dce_i2c_submit_command_sw +ffffffff8202a8a0 t write_byte_sw +ffffffff8202b000 T dce_ipp_construct +ffffffff8202b050 T dce_ipp_destroy +ffffffff8202b0a0 t dce_ipp_cursor_set_position +ffffffff8202b1d0 t dce_ipp_cursor_set_attributes +ffffffff8202b460 t dce_ipp_program_prescale +ffffffff8202b620 t dce_ipp_program_input_lut +ffffffff8202ba90 t dce_ipp_set_degamma +ffffffff8202c000 T dce110_get_dig_frontend +ffffffff8202c0c0 T dce110_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff8202c160 T dce110_psr_program_dp_dphy_fast_training +ffffffff8202c1d0 T dce110_psr_program_secondary_packet +ffffffff8202c240 T dce110_is_dig_enabled +ffffffff8202c2a0 T dce110_link_encoder_validate_dvi_output +ffffffff8202c350 T dce110_link_encoder_validate_dp_output +ffffffff8202c380 T dce110_link_encoder_construct +ffffffff8202c550 T dce110_link_encoder_validate_output_with_stream +ffffffff8202c700 T dce110_link_encoder_hw_init +ffffffff8202c920 T dce110_link_encoder_destroy +ffffffff8202c970 T dce110_link_encoder_setup +ffffffff8202caa0 T dce110_link_encoder_enable_tmds_output +ffffffff8202cb90 T dce110_link_encoder_enable_lvds_output +ffffffff8202cc80 T dce110_link_encoder_enable_dp_output +ffffffff8202cde0 T dce110_link_encoder_enable_dp_mst_output +ffffffff8202cf40 T dce110_link_encoder_disable_output +ffffffff8202d150 T dce110_link_encoder_dp_set_lane_settings +ffffffff8202d2f0 T dce110_link_encoder_dp_set_phy_pattern +ffffffff8202daf0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff8202dd10 T dce110_link_encoder_update_mst_stream_allocation_table +ffffffff8202df80 T dce110_link_encoder_connect_dig_be_to_fe +ffffffff8202e0b0 T dce110_link_encoder_enable_hpd +ffffffff8202e0e0 T dce110_link_encoder_disable_hpd +ffffffff8202e110 T dce110_link_encoder_get_max_link_cap +ffffffff8202f000 T dce_mem_input_construct +ffffffff8202f060 T dce112_mem_input_construct +ffffffff8202f0c0 T dce120_mem_input_construct +ffffffff8202f120 t dce_mi_program_display_marks +ffffffff8202f3f0 t dce_mi_allocate_dmif +ffffffff8202f630 t dce_mi_free_dmif +ffffffff8202f790 t dce_mi_program_surface_flip_and_addr +ffffffff8202fab0 t dce_mi_program_pte_vm +ffffffff8202fc70 t dce_mi_program_surface_config +ffffffff820304f0 t dce_mi_is_flip_pending +ffffffff82030580 t program_nbp_watermark +ffffffff82030780 t dce112_mi_program_display_marks +ffffffff82030c90 t dce120_mi_program_display_marks +ffffffff82031150 t dce120_program_stutter_watermark +ffffffff82032000 T dce110_opp_set_clamping +ffffffff820322b0 T dce110_opp_program_bit_depth_reduction +ffffffff82032a80 T dce110_opp_program_clamping_and_pixel_encoding +ffffffff82032c20 T dce110_opp_set_dyn_expansion +ffffffff82032d70 T dce110_opp_program_fmt +ffffffff82032ef0 T dce110_opp_construct +ffffffff82032f50 T dce110_opp_destroy +ffffffff82033000 T dce_panel_cntl_construct +ffffffff82033060 t dce_panel_cntl_destroy +ffffffff820330b0 t dce_panel_cntl_hw_init +ffffffff820332f0 t dce_is_panel_backlight_on +ffffffff820333a0 t dce_is_panel_powered_on +ffffffff82033450 t dce_store_backlight_level +ffffffff820334f0 t dce_driver_set_backlight +ffffffff82033670 t dce_get_16_bit_backlight_from_pwm +ffffffff82034000 T get_filter_3tap_16p +ffffffff82034090 T get_filter_3tap_64p +ffffffff82034120 T get_filter_4tap_16p +ffffffff820341b0 T get_filter_4tap_64p +ffffffff82034240 T get_filter_5tap_64p +ffffffff820342d0 T get_filter_6tap_64p +ffffffff82034360 T get_filter_7tap_64p +ffffffff820343f0 T get_filter_8tap_64p +ffffffff82034480 T get_filter_2tap_16p +ffffffff820344b0 T get_filter_2tap_64p +ffffffff82035000 T dce110_se_audio_mute_control +ffffffff82035050 T dce110_se_dp_audio_setup +ffffffff82035060 t dce110_se_audio_setup +ffffffff820351c0 T dce110_se_dp_audio_enable +ffffffff82035400 T dce110_se_dp_audio_disable +ffffffff82035560 T dce110_se_hdmi_audio_setup +ffffffff82035a60 T dce110_se_hdmi_audio_disable +ffffffff82035ac0 T dce110_stream_encoder_construct +ffffffff82035b10 t dce110_stream_encoder_dp_set_stream_attribute +ffffffff82036160 t dce110_stream_encoder_hdmi_set_stream_attribute +ffffffff82036690 t dce110_stream_encoder_dvi_set_stream_attribute +ffffffff820367c0 t dce110_stream_encoder_lvds_set_stream_attribute +ffffffff820368a0 t dce110_stream_encoder_set_throttled_vcp_size +ffffffff82036aa0 t dce110_stream_encoder_update_hdmi_info_packets +ffffffff82037190 t dce110_stream_encoder_stop_hdmi_info_packets +ffffffff82037430 t dce110_stream_encoder_update_dp_info_packets +ffffffff820375c0 t dce110_stream_encoder_stop_dp_info_packets +ffffffff82037730 t dce110_stream_encoder_dp_blank +ffffffff82037870 t dce110_stream_encoder_dp_unblank +ffffffff82037a30 t setup_stereo_sync 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dmub_abm_destroy +ffffffff8203c120 t dmub_abm_init_ex +ffffffff8203c130 t dmub_abm_set_level_ex +ffffffff8203c1e0 t dmub_abm_set_backlight_level_pwm_ex +ffffffff8203c280 t dmub_abm_get_current_backlight_ex +ffffffff8203c290 t dmub_abm_get_target_backlight_ex +ffffffff8203c2a0 t dmub_abm_init_config_ex +ffffffff8203c330 t dmub_abm_set_pause_ex +ffffffff8203c3d0 t dmub_abm_save_restore_ex +ffffffff8203c460 t dmub_abm_set_pipe_ex +ffffffff8203d000 T dmub_abm_init +ffffffff8203d3c0 T dmub_abm_get_current_backlight +ffffffff8203d3f0 T dmub_abm_get_target_backlight +ffffffff8203d420 T dmub_abm_set_level +ffffffff8203d4b0 T dmub_abm_init_config +ffffffff8203d5b0 T dmub_abm_set_pause +ffffffff8203d650 T dmub_abm_save_restore +ffffffff8203d770 T dmub_abm_set_pipe +ffffffff8203d810 T dmub_abm_set_backlight_level +ffffffff8203e000 T dmub_hw_lock_mgr_cmd +ffffffff8203e0a0 T dmub_hw_lock_mgr_inbox0_cmd +ffffffff8203e0e0 T should_use_dmub_lock +ffffffff8203f000 T dmub_enable_outbox_notification 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dce100_add_stream_to_ctx +ffffffff820430a0 T dce100_validate_plane +ffffffff820430e0 T dce100_find_first_free_match_stream_enc_for_link +ffffffff82043190 T dce100_create_resource_pool +ffffffff82043f60 t dce100_resource_destruct +ffffffff82044220 t dce100_destroy_resource_pool +ffffffff82044280 t dce100_panel_cntl_create +ffffffff82044310 t dce100_link_encoder_create +ffffffff82044410 t dce100_validate_bandwidth +ffffffff82044550 t dce100_validate_global +ffffffff820445f0 t read_dce_straps +ffffffff82044660 t create_audio +ffffffff82044690 t dce100_stream_encoder_create +ffffffff82044730 t dce100_hwseq_create +ffffffff82045000 T dce110_compressor_power_up_fbc +ffffffff82045130 T dce110_compressor_enable_fbc +ffffffff82045340 T dce110_compressor_is_fbc_enabled_in_hw +ffffffff820453f0 T dce110_compressor_disable_fbc +ffffffff820456c0 T dce110_compressor_program_compressed_surface_address_and_pitch +ffffffff820457e0 T dce110_compressor_set_fbc_invalidation_triggers +ffffffff82045860 T dce110_compressor_create +ffffffff82045900 T dce110_compressor_construct +ffffffff82045980 T dce110_compressor_destroy +ffffffff820459d0 T get_max_support_fbc_buffersize +ffffffff82046000 T dce110_update_info_frame +ffffffff820460f0 T dce110_enable_stream +ffffffff82046190 T dce110_edp_wait_for_hpd_ready +ffffffff820463f0 T dce110_edp_power_control +ffffffff82046950 T dce110_edp_wait_for_T12 +ffffffff82046b00 T dce110_edp_backlight_control +ffffffff82046e60 T dce110_enable_audio_stream +ffffffff82046f20 T dce110_disable_audio_stream +ffffffff82046fe0 T dce110_disable_stream +ffffffff82047230 T dce110_unblank_stream +ffffffff82047330 T dce110_blank_stream +ffffffff820474a0 T dce110_set_avmute +ffffffff820474f0 T dce110_enable_accelerated_mode +ffffffff820478a0 t power_down_all_hw_blocks +ffffffff82047a70 T dce110_set_safe_displaymarks +ffffffff82047b90 T dce110_apply_ctx_to_hw +ffffffff82048490 t enable_fbc +ffffffff82048650 T dce110_power_down +ffffffff82048740 T dce110_prepare_bandwidth +ffffffff82048890 T dce110_optimize_bandwidth +ffffffff82048a90 T dce110_set_backlight_level +ffffffff82048ba0 T dce110_set_abm_immediate_disable +ffffffff82048c20 T dce110_set_pipe +ffffffff82048c90 T dce110_enable_lvds_link_output +ffffffff82048cf0 T dce110_enable_tmds_link_output +ffffffff82048d60 T dce110_enable_dp_link_output +ffffffff82048f90 T dce110_disable_link_output +ffffffff82049080 T dce110_hw_sequencer_construct +ffffffff820490d0 t enable_display_pipe_clock_gating +ffffffff82049100 t build_audio_output +ffffffff82049260 t init_hw +ffffffff82049500 t dce110_power_down_fe +ffffffff820495d0 t dce110_apply_ctx_for_surface +ffffffff82049d10 t dce110_post_unlock_program_front_end +ffffffff82049d40 t update_plane_addr +ffffffff82049db0 t dce110_wait_for_mpcc_disconnect +ffffffff82049de0 t dce110_update_pending_status +ffffffff82049ec0 t get_position +ffffffff82049f50 t dce110_enable_per_frame_crtc_position_reset +ffffffff8204a1f0 t dce110_enable_timing_synchronization +ffffffff8204a4e0 t set_drr +ffffffff8204a5c0 t set_static_screen_control +ffffffff8204a690 t dce110_set_cursor_position +ffffffff8204a7e0 t dce110_set_cursor_attribute +ffffffff8204a8a0 t program_gamut_remap +ffffffff8204a9f0 t program_output_csc +ffffffff8204aaf0 t init_pipes +ffffffff8204ab20 t dce110_reset_hw_ctx_wrap +ffffffff8204ad80 t dce110_set_input_transfer_func +ffffffff8204af10 t dce110_set_output_transfer_func +ffffffff8204b820 t dce110_enable_display_power_gating +ffffffff8204b980 t dce110_enable_stream_timing +ffffffff8204c000 T dce110_mem_input_v_construct +ffffffff8204c040 t dce_mem_input_v_program_display_marks +ffffffff8204c0c0 t dce_mem_input_program_chroma_display_marks +ffffffff8204c140 t dce110_allocate_mem_input_v +ffffffff8204c250 t dce110_free_mem_input_v +ffffffff8204c280 t dce_mem_input_v_program_surface_flip_and_addr +ffffffff8204c3d0 t dce_mem_input_v_program_pte_vm +ffffffff8204c6a0 t dce_mem_input_v_program_surface_config +ffffffff8204ca70 t dce_mem_input_v_is_surface_pending +ffffffff8204cae0 t program_urgency_watermark +ffffffff8204cbf0 t program_nbp_watermark +ffffffff8204cd60 t program_stutter_watermark +ffffffff8204d000 T dce110_opp_v_set_csc_default +ffffffff8204d300 t program_color_matrix_v +ffffffff8204d470 t configure_graphics_mode_v +ffffffff8204d560 T dce110_opp_v_set_csc_adjustment +ffffffff8204e000 T dce110_opp_program_regamma_pwl_v +ffffffff8204e4b0 t power_on_lut +ffffffff8204e5d0 T dce110_opp_power_on_regamma_lut_v +ffffffff8204e630 T dce110_opp_set_regamma_mode_v +ffffffff8204f000 T dce110_opp_v_construct +ffffffff82050000 T dce110_resource_build_pipe_hw_param +ffffffff82050150 T dce110_find_first_free_match_stream_enc_for_link +ffffffff820501f0 T dce110_create_resource_pool +ffffffff82051190 t dce110_resource_destruct +ffffffff820514b0 t dce110_destroy_resource_pool +ffffffff82051510 t dce110_panel_cntl_create +ffffffff820515a0 t dce110_link_encoder_create +ffffffff820516a0 t dce110_validate_bandwidth +ffffffff82051790 t dce110_validate_global +ffffffff82051870 t dce110_acquire_underlay +ffffffff82051a50 t dce110_validate_plane +ffffffff82051ab0 t dce110_add_stream_to_ctx +ffffffff82051b80 t read_dce_straps +ffffffff82051bf0 t create_audio +ffffffff82051c20 t dce110_stream_encoder_create +ffffffff82051cc0 t dce110_hwseq_create +ffffffff82052000 T dce110_timing_generator_set_early_control +ffffffff82052070 T dce110_timing_generator_enable_crtc +ffffffff82052100 T dce110_timing_generator_program_blank_color +ffffffff82052190 T dce110_timing_generator_disable_crtc +ffffffff820521e0 T dce110_timing_generator_program_timing_generator +ffffffff820523d0 T dce110_timing_generator_set_drr +ffffffff82052510 T dce110_timing_generator_set_static_screen_control +ffffffff820525a0 T dce110_timing_generator_get_vblank_counter +ffffffff82052600 T dce110_timing_generator_get_position +ffffffff820526a0 T dce110_timing_generator_get_crtc_scanoutpos +ffffffff82052790 T dce110_timing_generator_program_blanking +ffffffff82052a00 T dce110_timing_generator_set_test_pattern +ffffffff82052cf0 T dce110_timing_generator_validate_timing +ffffffff82052db0 T dce110_timing_generator_wait_for_vblank +ffffffff82052f20 T dce110_timing_generator_is_counter_moving +ffffffff82052fa0 T dce110_timing_generator_wait_for_vactive +ffffffff82053080 T dce110_timing_generator_setup_global_swap_lock +ffffffff820531e0 T dce110_timing_generator_tear_down_global_swap_lock +ffffffff82053260 T dce110_timing_generator_enable_advanced_request +ffffffff82053300 T dce110_timing_generator_set_lock_master +ffffffff82053360 T dce110_timing_generator_enable_reset_trigger +ffffffff82053450 T dce110_timing_generator_enable_crtc_reset +ffffffff82053640 T dce110_timing_generator_disable_reset_trigger +ffffffff82053730 T dce110_timing_generator_did_triggered_reset_occur +ffffffff820537c0 T dce110_timing_generator_disable_vga +ffffffff82053820 T dce110_timing_generator_set_overscan_color_black +ffffffff820538c0 T dce110_tg_program_blank_color +ffffffff82053980 T dce110_tg_set_overscan_color +ffffffff820539e0 T dce110_tg_program_timing +ffffffff82053a10 T dce110_tg_is_blanked +ffffffff82053a70 T dce110_tg_set_blank +ffffffff82053ad0 T dce110_tg_validate_timing +ffffffff82053b90 T dce110_tg_wait_for_state +ffffffff82053c90 T dce110_tg_set_colors +ffffffff82053de0 T dce110_arm_vert_intr +ffffffff82053eb0 T dce110_configure_crc +ffffffff82054010 t dce110_is_tg_enabled +ffffffff82054070 T dce110_get_crc +ffffffff82054140 T dce110_timing_generator_construct +ffffffff82055000 T dce110_timing_generator_v_construct +ffffffff82055070 t dce110_timing_generator_v_program_timing +ffffffff82055340 t dce110_timing_generator_v_enable_crtc +ffffffff820553d0 t dce110_timing_generator_v_disable_crtc +ffffffff82055440 t dce110_timing_generator_v_is_counter_moving +ffffffff820554c0 t dce110_timing_generator_v_get_vblank_counter +ffffffff82055510 t dce110_timing_generator_v_set_early_control +ffffffff82055570 t dce110_timing_generator_v_wait_for_state +ffffffff82055700 t dce110_timing_generator_v_set_blank +ffffffff82055790 t dce110_timing_generator_v_set_overscan_color_black +ffffffff82055830 t dce110_timing_generator_v_program_blank_color +ffffffff820558b0 t dce110_timing_generator_v_set_colors +ffffffff820559e0 t dce110_timing_generator_v_disable_vga +ffffffff82055a10 t dce110_timing_generator_v_did_triggered_reset_occur +ffffffff82055a50 t dce110_timing_generator_v_setup_global_swap_lock +ffffffff82055a70 t dce110_timing_generator_v_enable_reset_trigger +ffffffff82055a90 t dce110_timing_generator_v_disable_reset_trigger +ffffffff82055ab0 t dce110_timing_generator_v_tear_down_global_swap_lock +ffffffff82055ad0 t dce110_timing_generator_v_enable_advanced_request +ffffffff82056000 T dce110_transform_v_construct +ffffffff82056060 t dce110_xfmv_reset +ffffffff820560c0 t dce110_xfmv_set_scaler +ffffffff82056800 t dce110_xfmv_set_pixel_storage_depth +ffffffff820568e0 t dce110_xfmv_set_gamut_remap +ffffffff82056910 t program_multi_taps_filter +ffffffff82056d00 t program_viewport +ffffffff82057000 T dce112_compressor_power_up_fbc +ffffffff82057130 T dce112_compressor_enable_fbc +ffffffff820572e0 T dce112_compressor_is_fbc_enabled_in_hw +ffffffff82057390 T dce112_compressor_enable_lpt +ffffffff820574b0 t wait_for_fbc_state_changed +ffffffff82057750 T dce112_compressor_disable_fbc +ffffffff82057850 T dce112_compressor_disable_lpt +ffffffff820579b0 T dce112_compressor_is_lpt_enabled_in_hw +ffffffff82057a00 T dce112_compressor_program_compressed_surface_address_and_pitch +ffffffff82057b40 T dce112_compressor_program_lpt_control +ffffffff82057db0 T dce112_compressor_set_fbc_invalidation_triggers +ffffffff82057e40 T dce112_compressor_construct +ffffffff82057f00 T dce112_compressor_create +ffffffff82057ff0 T dce112_compressor_destroy +ffffffff82059000 T dce112_hw_sequencer_construct +ffffffff82059050 t dce112_enable_display_power_gating +ffffffff8205a000 T dce112_validate_bandwidth +ffffffff8205a0c0 T resource_map_phy_clock_resources +ffffffff8205a230 T dce112_add_stream_to_ctx +ffffffff8205a2d0 T dce112_create_resource_pool +ffffffff8205b620 t dce112_resource_destruct +ffffffff8205b8e0 t dce112_destroy_resource_pool +ffffffff8205b940 t dce112_panel_cntl_create +ffffffff8205b9d0 t dce112_link_encoder_create +ffffffff8205bad0 t dce112_validate_global +ffffffff8205bb70 t read_dce_straps +ffffffff8205bbe0 t create_audio +ffffffff8205bc10 t dce112_stream_encoder_create +ffffffff8205bcb0 t dce112_hwseq_create +ffffffff8205c000 T dce121_xgmi_enabled +ffffffff8205c060 T dce120_hw_sequencer_construct +ffffffff8205c0c0 t dce120_enable_display_power_gating +ffffffff8205c0f0 t dce120_update_dchub +ffffffff8205d000 T dce120_create_resource_pool +ffffffff8205e320 t dce120_resource_destruct +ffffffff8205e600 t dce120_destroy_resource_pool +ffffffff8205e660 t dce120_panel_cntl_create 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dpp1_cnv_setup +ffffffff82069980 T dpp1_set_cursor_attributes +ffffffff82069ab0 T dpp1_set_cursor_position +ffffffff82069c00 T dpp1_cnv_set_optional_cursor_attributes +ffffffff82069cc0 T dpp1_dppclk_control +ffffffff82069dc0 T dpp1_construct +ffffffff82069e40 t dpp1_cm_set_regamma_pwl +ffffffff8206a000 T dpp1_cm_set_gamut_remap +ffffffff8206a1a0 T dpp1_cm_set_output_csc_default +ffffffff8206a220 t dpp1_cm_program_color_matrix +ffffffff8206a3e0 T dpp1_cm_set_output_csc_adjustment +ffffffff8206a3f0 T dpp1_cm_power_on_regamma_lut +ffffffff8206a470 T dpp1_cm_program_regamma_lut +ffffffff8206a680 T dpp1_cm_configure_regamma_lut +ffffffff8206a780 T dpp1_cm_program_regamma_luta_settings +ffffffff8206a920 T dpp1_cm_program_regamma_lutb_settings +ffffffff8206aac0 T dpp1_program_input_csc +ffffffff8206ad10 T dpp1_program_bias_and_scale +ffffffff8206ae80 T dpp1_program_degamma_lutb_settings +ffffffff8206b030 T dpp1_program_degamma_luta_settings +ffffffff8206b1e0 T dpp1_power_on_degamma_lut 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hubp1_program_deadline +ffffffff82074240 T hubp1_is_flip_pending +ffffffff82074350 T min_set_viewport +ffffffff82074650 T hubp1_read_state_common +ffffffff82075340 T hubp1_read_state +ffffffff82075610 T hubp1_get_cursor_pitch +ffffffff820756b0 T hubp1_cursor_set_attributes +ffffffff82075960 T hubp1_cursor_set_position +ffffffff82075cc0 T hubp1_clk_cntl +ffffffff82075d10 T hubp1_vtg_sel +ffffffff82075d50 T hubp1_in_blank +ffffffff82075dc0 T hubp1_soft_reset +ffffffff82075e00 T hubp1_set_flip_int +ffffffff82075e50 T hubp1_init +ffffffff82075e80 T dcn10_hubp_construct +ffffffff82075ef0 t hubp1_setup +ffffffff82075fb0 t hubp1_setup_interdependent +ffffffff82076330 t hubp1_set_vm_system_aperture_settings +ffffffff82076550 t hubp1_set_vm_context0_settings +ffffffff82076830 t hubp1_set_hubp_blank_en +ffffffff82076870 t hubp1_disconnect +ffffffff82076900 t hubp1_disable_control +ffffffff82076940 t hubp1_get_underflow_status +ffffffff820769b0 t hubp1_wait_pipe_read_start +ffffffff82077000 T dcn10_lock_all_pipes +ffffffff82077130 T dcn10_log_hw_state +ffffffff82078c10 T dcn10_did_underflow_occur +ffffffff82078cb0 T dcn10_enable_power_gating_plane +ffffffff82078e50 T dcn10_disable_vga +ffffffff82079040 T dcn10_dpp_pg_control +ffffffff82079290 T dcn10_hubp_pg_control +ffffffff820794e0 T dcn10_bios_golden_init +ffffffff82079640 T dcn10_enable_stream_timing +ffffffff82079a40 T dcn10_verify_allow_pstate_change_high +ffffffff82079d90 T dcn10_plane_atomic_disconnect +ffffffff82079ec0 T dcn10_plane_atomic_power_down +ffffffff8207a020 T dcn10_plane_atomic_disable +ffffffff8207a160 T dcn10_disable_plane +ffffffff8207a300 T dcn10_init_pipes +ffffffff8207a9c0 T dcn10_init_hw +ffffffff8207aeb0 T dcn10_power_down_on_boot +ffffffff8207b000 T dcn10_reset_hw_ctx_wrap +ffffffff8207b340 T dcn10_update_plane_addr +ffffffff8207b460 T dcn10_set_input_transfer_func +ffffffff8207b5d0 T dcn10_set_output_transfer_func +ffffffff8207b6a0 T dcn10_pipe_control_lock +ffffffff8207b770 T dcn10_cursor_lock +ffffffff8207b930 T dcn10_enable_vblanks_synchronization +ffffffff8207c110 T dcn10_enable_timing_synchronization +ffffffff8207c510 T dcn10_enable_per_frame_crtc_position_reset +ffffffff8207c6e0 T dcn10_program_gamut_remap +ffffffff8207c8e0 T dcn10_program_output_csc +ffffffff8207ca10 T dcn10_update_visual_confirm_color +ffffffff8207ca90 T dcn10_update_mpcc +ffffffff8207cd40 T dcn10_blank_pixel_data +ffffffff8207ce80 T dcn10_set_hdr_multiplier +ffffffff8207cf10 T dcn10_program_pipe +ffffffff8207dab0 T dcn10_wait_for_pending_cleared +ffffffff8207dbb0 T dcn10_post_unlock_program_front_end +ffffffff8207de50 T dcn10_prepare_bandwidth +ffffffff8207dff0 T dcn10_optimize_bandwidth +ffffffff8207e190 T dcn10_set_drr +ffffffff8207e290 T dcn10_get_position +ffffffff8207e320 T dcn10_set_static_screen_control +ffffffff8207e3c0 T dcn10_setup_stereo +ffffffff8207e510 T dcn10_wait_for_mpcc_disconnect +ffffffff8207e6c0 T dcn10_dummy_display_power_gating +ffffffff8207e6f0 T dcn10_update_pending_status +ffffffff8207e830 T dcn10_update_dchub +ffffffff8207e860 T dcn10_set_cursor_position +ffffffff8207eda0 T dcn10_set_cursor_attribute +ffffffff8207edf0 T dcn10_set_cursor_sdr_white_level +ffffffff8207eeb0 T dcn10_get_vupdate_offset_from_vsync +ffffffff8207ef40 T dcn10_calc_vupdate_position +ffffffff8207efd0 T dcn10_setup_periodic_interrupt +ffffffff8207f0e0 T dcn10_setup_vupdate_interrupt +ffffffff8207f1a0 T dcn10_unblank_stream +ffffffff8207f2b0 T dcn10_send_immediate_sdp_message +ffffffff8207f310 T dcn10_set_clock +ffffffff8207f420 T dcn10_get_clock +ffffffff8207f480 T dcn10_get_dcc_en_bits +ffffffff82080000 T snprintf_count +ffffffff82080090 T dcn10_clear_status_bits +ffffffff82080240 T dcn10_get_hw_state +ffffffff82082000 T dcn10_hw_sequencer_construct +ffffffff82083000 T dcn10_ipp_construct +ffffffff82083050 T dcn20_ipp_construct +ffffffff820830a0 t dcn10_ipp_destroy +ffffffff82084000 T dcn10_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff820840b0 T dcn10_get_dig_frontend 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dcn10_link_encoder_dp_set_phy_pattern +ffffffff82085bb0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff82085db0 T dcn10_link_encoder_update_mst_stream_allocation_table +ffffffff82086080 T dcn10_link_encoder_connect_dig_be_to_fe +ffffffff820861c0 T dcn10_link_encoder_enable_hpd +ffffffff82086200 T dcn10_link_encoder_disable_hpd +ffffffff82086240 T dcn10_get_dig_mode +ffffffff820862b0 T dcn10_link_encoder_get_max_link_cap +ffffffff82086330 t program_pattern_symbols +ffffffff82087000 T mpc1_set_bg_color +ffffffff820871e0 T mpc1_get_mpcc +ffffffff82087270 T mpc1_update_stereo_mix +ffffffff82087390 T mpc1_assert_idle_mpcc +ffffffff82087460 T mpc1_get_mpcc_for_dpp +ffffffff82087510 T mpc1_is_mpcc_idle +ffffffff82087600 T mpc1_assert_mpcc_idle_before_connect +ffffffff82087740 T mpc1_insert_plane +ffffffff82087ce0 T mpc1_remove_mpcc +ffffffff820880a0 T mpc1_mpc_init +ffffffff820883c0 T mpc1_mpc_init_single_inst +ffffffff820885b0 T mpc1_init_mpcc_list_from_hw +ffffffff82088880 T mpc1_read_mpcc_state +ffffffff82088a10 T mpc1_cursor_lock +ffffffff82088a90 T mpc1_get_mpc_out_mux +ffffffff82088b10 T dcn10_mpc_construct +ffffffff82088c90 t mpc1_update_blending +ffffffff82089000 T opp1_program_bit_depth_reduction +ffffffff82089400 T opp1_set_dyn_expansion +ffffffff82089570 T opp1_program_fmt +ffffffff82089870 T opp1_program_stereo +ffffffff82089960 T opp1_pipe_clock_control +ffffffff820899a0 T opp1_destroy +ffffffff820899f0 T dcn10_opp_construct +ffffffff8208a000 T optc1_program_global_sync +ffffffff8208a150 T optc1_setup_vertical_interrupt0 +ffffffff8208a1e0 T optc1_setup_vertical_interrupt1 +ffffffff8208a250 T optc1_setup_vertical_interrupt2 +ffffffff8208a2c0 T optc1_program_timing +ffffffff8208a9a0 T optc1_is_two_pixels_per_containter +ffffffff8208a9f0 T optc1_set_vtg_params +ffffffff8208ab20 T optc1_set_blank_data_double_buffer +ffffffff8208ab60 T optc1_set_timing_double_buffer +ffffffff8208aba0 T optc1_set_blank +ffffffff8208ac70 T optc1_is_blanked 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T optc1_get_otg_active_size +ffffffff8208c4e0 T optc1_clear_optc_underflow +ffffffff8208c530 T optc1_tg_init +ffffffff8208c5e0 T optc1_is_tg_enabled +ffffffff8208c650 T optc1_is_optc_underflow_occurred +ffffffff8208c6c0 T optc1_configure_crc +ffffffff8208c930 T optc1_get_crc +ffffffff8208ca30 T dcn10_timing_generator_init +ffffffff8208caa0 t optc1_enable_crtc +ffffffff8208cba0 t optc1_set_test_pattern +ffffffff8208d290 t optc1_program_manual_trigger +ffffffff8208d340 t optc1_setup_manual_trigger +ffffffff8208e000 T dcn10_find_first_free_match_stream_enc_for_link +ffffffff8208e0b0 T dcn10_create_resource_pool +ffffffff8208f230 t dcn10_resource_destruct +ffffffff8208f540 t dcn10_destroy_resource_pool +ffffffff8208f5a0 t dcn10_panel_cntl_create +ffffffff8208f630 t dcn10_link_encoder_create +ffffffff8208f730 t dcn10_validate_bandwidth +ffffffff8208f7b0 t dcn10_validate_global +ffffffff8208f990 t dcn10_acquire_free_pipe_for_layer +ffffffff8208fac0 t dcn10_validate_plane +ffffffff8208fb10 t dcn10_add_stream_to_ctx +ffffffff8208fce0 t dcn10_patch_unknown_plane_state +ffffffff8208fd40 t read_dce_straps +ffffffff8208fd70 t create_audio +ffffffff8208fda0 t dcn10_stream_encoder_create +ffffffff8208fe40 t dcn10_hwseq_create +ffffffff8208fef0 t dcn10_get_dcc_compression_cap +ffffffff82090000 T enc1_update_generic_info_packet +ffffffff82090430 T enc1_stream_encoder_dp_set_stream_attribute +ffffffff82090910 T enc1_stream_encoder_set_stream_attribute_helper +ffffffff82090990 T enc1_stream_encoder_hdmi_set_stream_attribute +ffffffff82090f80 T enc1_stream_encoder_dvi_set_stream_attribute +ffffffff82091110 T enc1_stream_encoder_set_throttled_vcp_size +ffffffff82091330 T enc1_stream_encoder_update_dp_info_packets +ffffffff82091530 T enc1_stream_encoder_send_immediate_sdp_message +ffffffff82091940 T enc1_stream_encoder_stop_dp_info_packets +ffffffff82091b10 T enc1_stream_encoder_dp_blank +ffffffff82091cb0 T enc1_stream_encoder_dp_unblank +ffffffff82091ee0 T enc1_stream_encoder_set_avmute +ffffffff82091f20 T enc1_reset_hdmi_stream_attribute +ffffffff82091ff0 T get_audio_clock_info +ffffffff820920e0 T enc1_se_enable_audio_clock +ffffffff82092140 T enc1_se_enable_dp_audio +ffffffff82092210 T enc1_se_audio_mute_control +ffffffff82092260 T enc1_se_dp_audio_setup +ffffffff82092270 t enc1_se_audio_setup +ffffffff820923d0 T enc1_se_dp_audio_enable +ffffffff82092620 T enc1_se_dp_audio_disable +ffffffff82092790 T enc1_se_hdmi_audio_setup +ffffffff82092c50 T enc1_se_hdmi_audio_disable +ffffffff82092ce0 T enc1_setup_stereo_sync +ffffffff82092d60 T enc1_dig_connect_to_otg +ffffffff82092da0 T enc1_dig_source_otg +ffffffff82092e10 T enc1_stream_encoder_dp_get_pixel_format +ffffffff82092f00 T dcn10_stream_encoder_construct +ffffffff82092f60 t enc1_stream_encoder_update_hdmi_info_packets +ffffffff82093310 t enc1_stream_encoder_stop_hdmi_info_packets +ffffffff82094000 T dccg2_update_dpp_dto +ffffffff82094160 T dccg2_get_dccg_ref_freq +ffffffff82094220 T dccg2_set_fifo_errdet_ovr_en +ffffffff82094260 T dccg2_otg_add_pixel +ffffffff82094300 T dccg2_otg_drop_pixel +ffffffff820943a0 T dccg2_init +ffffffff820943d0 T dccg2_create +ffffffff82094480 T dcn_dccg_destroy +ffffffff82095000 T dpp20_read_state +ffffffff820951d0 T dpp2_power_on_obuf +ffffffff820952a0 T dpp2_dummy_program_input_lut +ffffffff820952d0 T dscl2_calc_lb_num_partitions +ffffffff82095400 T dpp2_cnv_set_alpha_keyer +ffffffff82095680 T dpp2_set_cursor_attributes +ffffffff820957e0 T oppn20_dummy_program_regamma_pwl +ffffffff82095810 T dpp2_construct +ffffffff82095890 t dpp2_cnv_setup +ffffffff82097000 T dpp2_set_degamma_pwl +ffffffff820973b0 T dpp2_set_degamma +ffffffff82097560 T dpp2_cm_set_gamut_remap +ffffffff82097790 T dpp2_program_input_csc +ffffffff820979c0 T dpp20_program_blnd_lut +ffffffff82098120 T dpp20_program_shaper +ffffffff8209a0d0 T dpp20_program_3dlut +ffffffff8209a7a0 t dpp20_set3dlut_ram12 +ffffffff8209a970 T dpp2_set_hdr_multiplier +ffffffff8209b000 T dsc2_construct +ffffffff8209b050 T dsc2_get_enc_caps +ffffffff8209b0d0 T dsc_config_log +ffffffff8209b180 T dsc2_get_packed_pps +ffffffff8209b320 T dsc_prepare_config +ffffffff8209b860 T dsc_log_pps +ffffffff8209bfe0 T dsc_override_rc_params +ffffffff8209c130 T dsc_init_reg_values +ffffffff8209c220 T dsc_dc_pixel_encoding_to_dsc_pixel_format +ffffffff8209c2d0 T dsc_dc_color_depth_to_dsc_bits_per_comp +ffffffff8209c310 T dsc_update_from_dsc_parameters +ffffffff8209c3c0 t dsc2_read_state +ffffffff8209c570 t dsc2_validate_stream +ffffffff8209c5d0 t dsc2_set_config +ffffffff8209d940 t dsc2_enable +ffffffff8209daf0 t dsc2_disable +ffffffff8209dc70 t dsc2_disconnect +ffffffff8209e000 T dwb2_config_dwb_cnv +ffffffff8209e200 T dwb2_disable +ffffffff8209e310 T dwb2_is_enabled +ffffffff8209e3b0 T dwb2_set_stereo +ffffffff8209e490 T dwb2_set_new_content +ffffffff8209e500 T dwb2_set_scaler +ffffffff8209e880 T dcn20_dwbc_construct +ffffffff8209e8d0 t dwb2_get_caps +ffffffff8209e9b0 t dwb2_enable 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hubp2_program_rotation +ffffffff820a4180 T hubp2_dcc_control +ffffffff820a4240 T hubp2_program_pixel_format +ffffffff820a4810 T hubp2_program_surface_config +ffffffff820a4a50 T hubp2_get_lines_per_chunk +ffffffff820a4b10 T hubp2_cursor_set_attributes +ffffffff820a4ed0 T hubp2_dmdata_set_attributes +ffffffff820a52b0 T hubp2_dmdata_load +ffffffff820a5340 T hubp2_dmdata_status_done +ffffffff820a53b0 T hubp2_program_surface_flip_and_addr +ffffffff820a5ca0 T hubp2_enable_triplebuffer +ffffffff820a5d70 T hubp2_is_triplebuffer_enabled +ffffffff820a5df0 T hubp2_set_flip_control_surface_gsl +ffffffff820a5e40 T hubp2_is_flip_pending +ffffffff820a5f50 T hubp2_set_blank +ffffffff820a5fb0 T hubp2_set_blank_regs +ffffffff820a60b0 T hubp2_cursor_set_position +ffffffff820a6520 T hubp2_clk_cntl +ffffffff820a6570 T hubp2_vtg_sel +ffffffff820a65b0 T hubp2_clear_underflow +ffffffff820a6600 T hubp2_read_state_common +ffffffff820a7250 T hubp2_read_state +ffffffff820a7520 T hubp2_construct +ffffffff820a7590 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dcn20_program_dmdata_engine +ffffffff820aed10 T dcn20_fpga_init_hw +ffffffff820af2f0 T dcn20_optimize_timing_for_fsft +ffffffff820af330 T dcn20_set_disp_pattern_generator +ffffffff820b0000 T dcn20_hw_sequencer_construct +ffffffff820b1000 T enc2_fec_set_enable +ffffffff820b1090 T enc2_fec_set_ready +ffffffff820b10d0 T enc2_fec_is_active +ffffffff820b1140 T link_enc2_read_state +ffffffff820b11f0 T dcn20_link_encoder_enable_dp_output +ffffffff820b12f0 T dcn20_link_encoder_get_max_link_cap +ffffffff820b13a0 T dcn20_link_encoder_is_in_alt_mode +ffffffff820b1420 T enc2_hw_init +ffffffff820b1500 T dcn20_link_encoder_construct +ffffffff820b2000 T mmhubbub2_config_mcif_irq +ffffffff820b2130 T mmhubbub2_enable_mcif +ffffffff820b2170 T mmhubbub2_disable_mcif +ffffffff820b21b0 T mcifwb2_dump_frame +ffffffff820b22c0 T dcn20_mmhubbub_construct +ffffffff820b2310 t mmhubbub2_config_mcif_buf +ffffffff820b2960 t mmhubbub2_config_mcif_arb +ffffffff820b3000 T mpc2_update_blending +ffffffff820b32a0 T mpc2_set_denorm +ffffffff820b3310 T mpc2_set_denorm_clamp +ffffffff820b3460 T mpc2_set_output_csc +ffffffff820b3650 T mpc2_set_ocsc_default +ffffffff820b3830 T mpc20_power_on_ogam_lut +ffffffff820b38b0 T mpc2_set_output_gamma +ffffffff820b40b0 T mpc2_assert_idle_mpcc +ffffffff820b41c0 T mpc2_assert_mpcc_idle_before_connect +ffffffff820b4410 T dcn20_mpc_construct +ffffffff820b44d0 t mpc2_get_mpcc_for_dpp +ffffffff820b5000 T opp2_set_disp_pattern_generator +ffffffff820b5810 T opp2_dpg_set_blank_color +ffffffff820b5990 T opp2_program_dpg_dimensions +ffffffff820b5a20 T opp2_dpg_is_blanked +ffffffff820b5ae0 T opp2_program_left_edge_extra_pixel +ffffffff820b5b30 T dcn20_opp_construct +ffffffff820b6000 T optc2_enable_crtc +ffffffff820b6100 T optc2_set_gsl +ffffffff820b61f0 T optc2_set_gsl_source_select +ffffffff820b62b0 T optc2_set_dsc_config +ffffffff820b6380 T optc2_get_dsc_status +ffffffff820b63c0 T optc2_is_two_pixels_per_containter +ffffffff820b63d0 T optc2_set_odm_bypass +ffffffff820b6510 T optc2_set_odm_combine +ffffffff820b6700 T optc2_get_optc_source +ffffffff820b67d0 T optc2_triplebuffer_lock +ffffffff820b68f0 T optc2_triplebuffer_unlock +ffffffff820b69a0 T optc2_lock_doublebuffer_enable +ffffffff820b6b80 T optc2_lock_doublebuffer_disable +ffffffff820b6c60 T optc2_setup_manual_trigger +ffffffff820b6df0 T optc2_program_manual_trigger +ffffffff820b6e60 T optc2_configure_crc +ffffffff820b6ef0 T optc2_get_last_used_drr_vtotal +ffffffff820b6f30 T dcn20_timing_generator_init +ffffffff820b6fa0 t optc2_set_dwb_source +ffffffff820b7040 t optc2_align_vblanks +ffffffff820b8000 T dcn20_dpp_destroy +ffffffff820b8050 T dcn20_dpp_create +ffffffff820b8120 T dcn20_ipp_create +ffffffff820b81d0 T dcn20_opp_create +ffffffff820b8280 T dcn20_aux_engine_create +ffffffff820b8320 T dcn20_i2c_hw_create +ffffffff820b83b0 T dcn20_mpc_create +ffffffff820b8440 T dcn20_hubbub_create +ffffffff820b8510 T dcn20_timing_generator_create +ffffffff820b85a0 T dcn20_link_encoder_create +ffffffff820b86a0 T dcn20_stream_encoder_create +ffffffff820b8760 T dcn20_hwseq_create +ffffffff820b87d0 T dcn20_clock_source_destroy +ffffffff820b8820 T dcn20_dsc_create +ffffffff820b88e0 T dcn20_dsc_destroy +ffffffff820b8930 T dcn20_hubp_create +ffffffff820b8a00 T dcn20_build_mapped_resource +ffffffff820b8c20 T dcn20_acquire_dsc +ffffffff820b8d60 T dcn20_release_dsc +ffffffff820b8dd0 T dcn20_add_dsc_to_stream_resource +ffffffff820b8f40 T dcn20_add_stream_to_ctx +ffffffff820b8fd0 T dcn20_remove_stream_from_ctx +ffffffff820b90c0 T dcn20_split_stream_for_odm +ffffffff820b9570 T dcn20_split_stream_for_mpc +ffffffff820b96f0 T dcn20_calc_max_scaled_time +ffffffff820b9760 T dcn20_set_mcif_arb_params +ffffffff820b98d0 T dcn20_validate_dsc +ffffffff820b9a80 T dcn20_find_secondary_pipe +ffffffff820b9c60 T dcn20_merge_pipes_for_validate +ffffffff820b9ed0 T dcn20_validate_apply_pipe_split_flags +ffffffff820ba760 T dcn20_fast_validate_bw +ffffffff820bacb0 T dcn20_validate_bandwidth +ffffffff820bad30 T dcn20_acquire_free_pipe_for_layer +ffffffff820bae50 T dcn20_get_dcc_compression_cap +ffffffff820bae80 T dcn20_patch_unknown_plane_state +ffffffff820baee0 T dcn20_dwbc_create +ffffffff820baff0 T dcn20_mmhubbub_create +ffffffff820bb150 T dcn20_create_resource_pool +ffffffff820bc8f0 t dcn20_resource_destruct +ffffffff820bcda0 t dcn20_destroy_resource_pool +ffffffff820bce00 t dcn20_panel_cntl_create +ffffffff820bce90 t read_dce_straps +ffffffff820bcec0 t dcn20_create_audio +ffffffff820bd000 T enc2_set_dynamic_metadata +ffffffff820bd260 T enc2_stream_encoder_dp_unblank +ffffffff820bd5a0 T enc2_stream_encoder_dp_set_stream_attribute +ffffffff820bd600 T enc2_get_fifo_cal_average_level +ffffffff820bd660 T dcn20_stream_encoder_construct +ffffffff820bd6c0 t enc2_stream_encoder_update_hdmi_info_packets +ffffffff820bd790 t enc2_stream_encoder_stop_hdmi_info_packets +ffffffff820bdaa0 t enc2_stream_encoder_update_dp_info_packets_sdp_line_num +ffffffff820bdb60 t enc2_stream_encoder_update_dp_info_packets +ffffffff820bdc10 t enc2_read_state +ffffffff820bdd90 t enc2_dp_set_dsc_config +ffffffff820bde60 t enc2_dp_set_dsc_pps_info_packet +ffffffff820be330 t enc2_dp_set_odm_combine +ffffffff820be370 t enc2_update_hdmi_info_packet +ffffffff820bf000 T dcn20_vmid_setup +ffffffff820c0000 T dccg201_create +ffffffff820c00b0 t dccg201_update_dpp_dto +ffffffff820c1000 T dpp201_construct +ffffffff820c1080 t dpp201_get_optimal_number_of_taps +ffffffff820c1440 t dpp201_cnv_setup +ffffffff820c2000 T hubbub201_construct +ffffffff820c2060 t hubbub201_program_watermarks +ffffffff820c3000 T dcn201_hubp_construct +ffffffff820c3070 t hubp201_setup +ffffffff820c3350 t hubp201_program_surface_config +ffffffff820c4000 T dcn201_update_plane_addr +ffffffff820c42a0 T dcn201_init_blank +ffffffff820c43e0 T dcn201_init_hw +ffffffff820c4bb0 T dcn201_plane_atomic_disconnect +ffffffff820c4d20 T dcn201_update_mpcc +ffffffff820c4fb0 T dcn201_pipe_control_lock +ffffffff820c50b0 T dcn201_set_cursor_attribute +ffffffff820c5140 T dcn201_set_dmdata_attributes +ffffffff820c5250 T dcn201_unblank_stream +ffffffff820c6000 T dcn201_hw_sequencer_construct +ffffffff820c7000 T dcn201_link_encoder_construct +ffffffff820c7190 t dcn201_link_encoder_is_in_alt_mode +ffffffff820c7200 t dcn201_link_encoder_get_max_link_cap +ffffffff820c8000 T dcn201_mpc_construct +ffffffff820c80c0 t mpc201_set_out_rate_control +ffffffff820c9000 T dcn201_opp_construct +ffffffff820ca000 T optc201_is_two_pixels_per_containter +ffffffff820ca010 T dcn201_timing_generator_init +ffffffff820ca080 t optc201_validate_timing +ffffffff820ca180 t optc201_triplebuffer_unlock +ffffffff820ca230 t optc201_triplebuffer_lock +ffffffff820ca350 t optc201_get_optc_source +ffffffff820cb000 T dcn201_create_resource_pool +ffffffff820cba30 t dcn201_resource_destruct +ffffffff820cbd30 t dcn201_destroy_resource_pool +ffffffff820cbd90 t dcn201_link_init +ffffffff820cbde0 t dcn201_link_encoder_create +ffffffff820cbe90 t dcn201_acquire_free_pipe_for_layer +ffffffff820cbfa0 t dcn201_populate_dml_writeback_from_context +ffffffff820cc000 t read_dce_straps +ffffffff820cc030 t dcn201_create_audio +ffffffff820cc060 t dcn201_stream_encoder_create +ffffffff820cc100 t dcn201_hwseq_create +ffffffff820cc170 t dcn201_get_dcc_compression_cap +ffffffff820cd000 T dccg21_create +ffffffff820cd0b0 t dccg21_update_dpp_dto +ffffffff820ce000 T dcn21_dchvm_init +ffffffff820ce200 T hubbub21_init_dchub +ffffffff820ce3d0 T hubbub21_program_urgent_watermarks +ffffffff820cebf0 T hubbub21_program_stutter_watermarks +ffffffff820cf0e0 T hubbub21_program_pstate_watermarks +ffffffff820cf380 T hubbub21_program_watermarks +ffffffff820cf4e0 T hubbub21_wm_read_state +ffffffff820cf780 T hubbub21_construct +ffffffff820cf7e0 t hubbub21_apply_DEDCN21_147_wa +ffffffff820d0000 T apply_DEDCN21_142_wa_for_hostvm_deadline +ffffffff820d02e0 T hubp21_program_deadline +ffffffff820d0310 T hubp21_program_requestor +ffffffff820d06b0 T hubp21_construct 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+ffffffff820d6000 T dcn21_fast_validate_bw +ffffffff820d66a0 T dcn21_create_resource_pool +ffffffff820d79d0 t dcn21_resource_destruct +ffffffff820d7e70 t dcn21_destroy_resource_pool +ffffffff820d7ed0 t dcn21_panel_cntl_create +ffffffff820d7f60 t dcn21_link_encoder_create +ffffffff820d8060 t dcn21_validate_bandwidth +ffffffff820d80e0 t dcn21_patch_unknown_plane_state +ffffffff820d8130 t dcn21_get_panel_config_defaults +ffffffff820d8170 t read_dce_straps +ffffffff820d81a0 t dcn21_create_audio +ffffffff820d81d0 t dcn21_stream_encoder_create +ffffffff820d8270 t dcn21_hwseq_create +ffffffff820d9000 T afmt3_setup_hdmi_audio +ffffffff820d91d0 T afmt3_se_audio_setup +ffffffff820d9370 T afmt3_audio_mute_control +ffffffff820d93e0 T afmt3_audio_info_immediate_update +ffffffff820d9420 T afmt3_setup_dp_audio +ffffffff820d9510 T afmt3_construct +ffffffff820da000 T cm_helper_program_gamcor_xfer_func +ffffffff820da3c0 T cm3_helper_translate_curve_to_hw_format +ffffffff820dafd0 T cm3_helper_convert_to_custom_float +ffffffff820db420 T cm3_helper_translate_curve_to_degamma_hw_format +ffffffff820dbc40 T is_rgb_equal +ffffffff820dc000 T dccg3_create +ffffffff820dc0b0 T dccg30_create +ffffffff820dd000 T dcn30_link_encoder_validate_output_with_stream +ffffffff820dd010 T dcn30_link_encoder_construct +ffffffff820dd1f0 T enc3_hw_init +ffffffff820de000 T enc3_stream_encoder_update_hdmi_info_packets +ffffffff820de100 t enc3_update_hdmi_info_packet +ffffffff820de4f0 T enc3_stream_encoder_stop_hdmi_info_packets +ffffffff820dead0 T enc3_dp_set_dsc_pps_info_packet +ffffffff820dedf0 T enc3_stream_encoder_update_dp_info_packets_sdp_line_num +ffffffff820deeb0 T enc3_stream_encoder_update_dp_info_packets +ffffffff820df170 T enc3_audio_mute_control +ffffffff820df1e0 T enc3_se_dp_audio_setup +ffffffff820df260 T enc3_se_dp_audio_enable +ffffffff820df350 T enc3_se_hdmi_audio_setup +ffffffff820df660 T dcn30_dio_stream_encoder_construct +ffffffff820df6d0 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff820dfcd0 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff820dfed0 t enc3_read_state +ffffffff820e0060 t enc3_dp_set_dsc_config +ffffffff820e0130 t enc3_dp_set_odm_combine +ffffffff820e1000 T dpp30_read_state +ffffffff820e1050 T dpp3_program_post_csc +ffffffff820e1240 T dpp3_set_pre_degam +ffffffff820e12f0 T dpp3_cnv_setup +ffffffff820e1bc0 T dpp3_set_cursor_attributes +ffffffff820e1d30 T dpp3_get_optimal_number_of_taps +ffffffff820e2750 T dpp3_construct +ffffffff820e27b0 t dpp3_deferred_update +ffffffff820e2b90 t dpp3_program_blnd_lut +ffffffff820e35e0 t dpp3_program_shaper +ffffffff820e5660 t dpp3_program_3dlut +ffffffff820e5e10 t dpp3_set3dlut_ram12 +ffffffff820e6000 T dpp3_program_cm_dealpha +ffffffff820e60a0 T dpp3_program_cm_bias +ffffffff820e6190 T dpp3_program_gamcor_lut +ffffffff820e6bb0 t dpp3_power_on_gamcor_lut +ffffffff820e6ce0 T dpp3_set_hdr_multiplier +ffffffff820e6d30 T dpp3_cm_set_gamut_remap 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dcn30_apply_idle_power_optimizations +ffffffff820edc60 T dcn30_does_plane_fit_in_mall +ffffffff820edd10 T dcn30_hardware_release +ffffffff820ede00 T dcn30_set_disp_pattern_generator +ffffffff820ede70 T dcn30_prepare_bandwidth +ffffffff820edf60 T dcn30_set_static_screen_control +ffffffff820ee000 T dcn30_hw_sequencer_construct +ffffffff820ef000 T dcn30_mmhubbub_construct +ffffffff820ef050 t mmhubbub3_warmup_mcif +ffffffff820ef260 t mmhubbub3_config_mcif_buf +ffffffff820ef710 t mmhubbub3_config_mcif_arb +ffffffff820f0000 T mpc3_is_dwb_idle +ffffffff820f0070 T mpc3_set_dwb_mux +ffffffff820f00f0 T mpc3_disable_dwb_mux +ffffffff820f0170 T mpc3_set_out_rate_control +ffffffff820f0280 T mpc3_get_ogam_current +ffffffff820f0320 T mpc3_power_on_ogam_lut +ffffffff820f03f0 T mpc3_set_output_gamma +ffffffff820f1030 T mpc3_set_denorm +ffffffff820f10a0 T mpc3_set_denorm_clamp +ffffffff820f11f0 T mpc3_program_shaper +ffffffff820f33b0 t mpc3_power_on_shaper_3dlut +ffffffff820f3730 T mpc3_init_mpcc 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dcn30_update_bw_bounding_box +ffffffff820f8370 T dcn30_create_resource_pool +ffffffff820f9920 t dcn30_resource_destruct +ffffffff820f9ea0 t dcn30_destroy_resource_pool +ffffffff820f9f00 t dcn30_panel_cntl_create +ffffffff820f9f90 t dcn30_link_encoder_create +ffffffff820fa040 t dcn30_get_panel_config_defaults +ffffffff820fa0c0 t read_dce_straps +ffffffff820fa0f0 t dcn30_create_audio +ffffffff820fa120 t dcn30_stream_encoder_create +ffffffff820fa2a0 t dcn30_hwseq_create +ffffffff820fb000 T vpg3_update_generic_info_packet +ffffffff820fb9a0 T vpg3_construct +ffffffff820fc000 T dccg301_create +ffffffff820fd000 T dcn301_link_encoder_construct +ffffffff820fe000 T hubbub301_construct +ffffffff820ff000 T dcn301_hw_sequencer_construct +ffffffff82100000 T optc301_set_drr +ffffffff82100230 T optc301_setup_manual_trigger +ffffffff82100350 T dcn301_timing_generator_init +ffffffff82101000 T dcn301_panel_cntl_construct +ffffffff82101050 t dcn301_panel_cntl_destroy +ffffffff821010a0 t dcn301_panel_cntl_hw_init +ffffffff821012b0 t dcn301_is_panel_backlight_on +ffffffff82101310 t dcn301_is_panel_powered_on +ffffffff821013c0 t dcn301_store_backlight_level +ffffffff82101460 t dcn301_get_16_bit_backlight_from_pwm +ffffffff82102000 T dcn301_create_resource_pool +ffffffff82103590 t dcn301_destruct +ffffffff82103ad0 t dcn301_destroy_resource_pool +ffffffff82103b30 t dcn301_panel_cntl_create +ffffffff82103bc0 t dcn301_link_encoder_create +ffffffff82103c70 t dcn301_calculate_wm_and_dlg +ffffffff82103ce0 t read_dce_straps +ffffffff82103d10 t dcn301_create_audio +ffffffff82103d40 t dcn301_stream_encoder_create +ffffffff82103ec0 t dcn301_hwseq_create +ffffffff82104000 T dcn302_dpp_pg_control +ffffffff821042a0 T dcn302_hubp_pg_control +ffffffff82104550 T dcn302_dsc_pg_control +ffffffff82105000 T dcn302_hw_sequencer_construct +ffffffff82106000 T dcn302_update_bw_bounding_box +ffffffff82106050 T dcn302_create_resource_pool +ffffffff821074a0 t dcn302_resource_destruct +ffffffff821079e0 t dcn302_destroy_resource_pool +ffffffff82107a30 t dcn302_panel_cntl_create +ffffffff82107ac0 t dcn302_link_encoder_create +ffffffff82107b70 t dcn302_get_panel_config_defaults +ffffffff82107bf0 t read_dce_straps +ffffffff82107c20 t dcn302_create_audio +ffffffff82107c50 t dcn302_stream_encoder_create +ffffffff82107dd0 t dcn302_hwseq_create +ffffffff82108000 T dcn303_dpp_pg_control +ffffffff82108030 T dcn303_hubp_pg_control +ffffffff82108060 T dcn303_dsc_pg_control +ffffffff82108090 T dcn303_enable_power_gating_plane +ffffffff82109000 T dcn303_hw_sequencer_construct +ffffffff8210a000 T dcn303_update_bw_bounding_box +ffffffff8210a050 T dcn303_create_resource_pool +ffffffff8210b2a0 t dcn303_resource_destruct +ffffffff8210b7e0 t dcn303_destroy_resource_pool +ffffffff8210b830 t dcn303_panel_cntl_create +ffffffff8210b8c0 t dcn303_link_encoder_create +ffffffff8210b970 t dcn303_get_panel_config_defaults +ffffffff8210b9f0 t read_dce_straps +ffffffff8210ba20 t dcn303_create_audio +ffffffff8210ba50 t dcn303_stream_encoder_create +ffffffff8210bbd0 t dcn303_hwseq_create +ffffffff8210c000 T afmt31_powerdown +ffffffff8210c090 T afmt31_poweron +ffffffff8210c120 T afmt31_construct +ffffffff8210d000 T apg31_construct +ffffffff8210d050 t apg31_se_audio_setup +ffffffff8210d160 t apg31_enable +ffffffff8210d270 t apg31_disable +ffffffff8210e000 T dccg31_update_dpp_dto +ffffffff8210e160 T dccg31_set_dpstreamclk +ffffffff8210e2f0 t dccg31_disable_dpstreamclk +ffffffff8210e440 T dccg31_enable_symclk32_se +ffffffff8210e740 T dccg31_disable_symclk32_se +ffffffff8210ea10 T dccg31_enable_symclk32_le +ffffffff8210eb20 T dccg31_disable_symclk32_le +ffffffff8210ec10 T dccg31_set_symclk32_le_root_clock_gating +ffffffff8210ed20 T dccg31_disable_dscclk +ffffffff8210ef70 T dccg31_enable_dscclk +ffffffff8210f1e0 T dccg31_set_physymclk +ffffffff8210f6f0 T dccg31_set_dtbclk_dto +ffffffff8210f9a0 T dccg31_set_audio_dtbclk_dto +ffffffff8210fab0 T dccg31_get_dccg_ref_freq +ffffffff8210fae0 T dccg31_set_dispclk_change_mode +ffffffff8210fb30 T dccg31_init +ffffffff82110110 T dccg31_otg_add_pixel +ffffffff82110150 T dccg31_otg_drop_pixel +ffffffff82110190 T dccg31_create +ffffffff82111000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff82111390 T dcn31_link_encoder_construct +ffffffff82111560 T dcn31_link_encoder_construct_minimal +ffffffff821115e0 T dcn31_link_encoder_enable_dp_output +ffffffff82111820 T dcn31_link_encoder_enable_dp_mst_output +ffffffff82111a60 T dcn31_link_encoder_disable_output +ffffffff82111cd0 T dcn31_link_encoder_is_in_alt_mode +ffffffff82111e20 T dcn31_link_encoder_get_max_link_cap +ffffffff82111fa0 t enc31_hw_init +ffffffff82112000 T dcn31_hpo_dp_link_enc_enable +ffffffff82112160 T dcn31_hpo_dp_link_enc_disable +ffffffff821121d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff82112b30 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff82112db0 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff82113050 T dcn31_hpo_dp_link_enc_read_state +ffffffff821132f0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff821133f0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff82113530 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff82113620 T hpo_dp_link_encoder31_construct +ffffffff82113680 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff82114000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff82114070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff821141b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff82114460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff82114560 t dcn31_hpo_dp_stream_enc_disable +ffffffff821145d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff82114e80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num +ffffffff82114f40 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff82115160 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff821152f0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff82115590 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff82115690 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff82115740 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff82115810 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff821159c0 t dcn31_hpo_dp_stream_enc_read_state +ffffffff82115b50 t dcn31_set_hblank_min_symbol_width +ffffffff82116000 T hubbub31_init_dchub_sys_ctx +ffffffff821161e0 T hubbub31_init +ffffffff82116280 T hubbub31_construct +ffffffff82116320 t hubbub31_get_dcc_compression_cap +ffffffff82116500 t hubbub31_get_dchub_ref_freq +ffffffff821165e0 t hubbub31_program_watermarks +ffffffff82117f00 t hubbub31_verify_allow_pstate_change_high +ffffffff821180c0 t dcn31_program_det_size +ffffffff821182a0 t dcn31_program_compbuf_size +ffffffff82118520 t dcn31_init_crb +ffffffff82119000 T hubp31_set_unbounded_requesting +ffffffff82119090 T hubp31_soft_reset +ffffffff821190e0 T hubp31_construct +ffffffff82119150 t hubp31_program_extended_blank +ffffffff8211a000 T dcn31_init_hw +ffffffff8211a850 T dcn31_dsc_pg_control +ffffffff8211aba0 T dcn31_enable_power_gating_plane +ffffffff8211ae00 T dcn31_update_info_frame +ffffffff8211af30 T dcn31_z10_save_init +ffffffff8211afc0 T dcn31_z10_restore +ffffffff8211b070 T dcn31_hubp_pg_control +ffffffff8211b390 T dcn31_init_sys_ctx +ffffffff8211b440 T dcn31_reset_hw_ctx_wrap +ffffffff8211b7a0 T dcn31_setup_hpo_hw_control +ffffffff8211c000 T dcn31_hw_sequencer_construct +ffffffff8211d000 T optc31_immediate_disable_crtc +ffffffff8211d100 T optc31_set_drr +ffffffff8211d310 T optc3_init_odm +ffffffff8211d480 T dcn31_timing_generator_init +ffffffff8211d4f0 t optc31_enable_crtc +ffffffff8211d5f0 t optc31_disable_crtc +ffffffff8211d6d0 t optc31_set_odm_combine +ffffffff8211e000 T dcn31_panel_cntl_construct +ffffffff8211e040 t dcn31_panel_cntl_destroy +ffffffff8211e090 t dcn31_panel_cntl_hw_init +ffffffff8211e190 t dcn31_is_panel_backlight_on +ffffffff8211e230 t dcn31_is_panel_powered_on +ffffffff8211e2e0 t dcn31_store_backlight_level +ffffffff8211e3b0 t dcn31_get_16_bit_backlight_from_pwm +ffffffff8211f000 T dcn31x_populate_dml_pipes_from_context +ffffffff8211f180 T dcn31_populate_dml_pipes_from_context +ffffffff8211f5c0 T dcn31_calculate_wm_and_dlg +ffffffff8211f630 T dcn31_populate_dml_writeback_from_context +ffffffff8211f690 T dcn31_set_mcif_arb_params +ffffffff8211f6f0 T dcn31_validate_bandwidth +ffffffff8211fae0 T dcn31_create_resource_pool +ffffffff82120e80 t dcn31_resource_destruct +ffffffff821214f0 t dcn31_destroy_resource_pool +ffffffff82121550 t dcn31_panel_cntl_create +ffffffff821215c0 t dcn31_link_encoder_create +ffffffff82121670 t dcn31_link_enc_create_minimal +ffffffff82121710 t dcn31_get_panel_config_defaults +ffffffff82121750 t read_dce_straps +ffffffff82121780 t dcn31_create_audio +ffffffff821217b0 t dcn31_stream_encoder_create +ffffffff82121930 t dcn31_hpo_dp_stream_encoder_create +ffffffff82121af0 t dcn31_hpo_dp_link_encoder_create +ffffffff82121b80 t dcn31_hwseq_create +ffffffff82122000 T vpg31_powerdown +ffffffff82122090 T vpg31_poweron +ffffffff82122120 T vpg31_construct +ffffffff82123000 T dccg314_create +ffffffff821230b0 t dccg314_init +ffffffff82123210 t dccg314_set_dpstreamclk +ffffffff821235d0 t dccg314_set_dtbclk_dto +ffffffff821237c0 t dccg314_set_pixel_rate_div +ffffffff82123b30 t dccg314_set_valid_pixel_rate +ffffffff82123ba0 t dccg314_trigger_dio_fifo_resync +ffffffff82123c40 t dccg314_dpp_root_clock_control +ffffffff82124000 T dcn314_dio_stream_encoder_construct +ffffffff82124070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff82124670 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff82124880 t enc314_stream_encoder_dp_blank +ffffffff82124900 t enc314_stream_encoder_dp_unblank +ffffffff82124c80 t enc314_read_state +ffffffff82124de0 t enc314_dp_set_dsc_config +ffffffff82124e30 t enc314_dp_set_odm_combine +ffffffff82124e70 t enc314_set_dig_input_mode +ffffffff82124ec0 t enc314_enable_fifo +ffffffff82124f60 t enc314_disable_fifo +ffffffff82124fb0 t enc314_reset_fifo +ffffffff82126000 T dcn314_update_odm +ffffffff82126600 T dcn314_dsc_pg_control +ffffffff821269d0 T dcn314_enable_power_gating_plane +ffffffff82126c60 T dcn314_calculate_dccg_k1_k2_values +ffffffff82126e10 T dcn314_set_pixels_per_cycle +ffffffff82126f00 T dcn314_resync_fifo_dccg_dio +ffffffff821270a0 T dcn314_dpp_root_clock_control +ffffffff82127100 T dcn314_disable_link_output +ffffffff82128000 T dcn314_hw_sequencer_construct +ffffffff82129000 T dcn314_timing_generator_init +ffffffff82129070 t optc314_enable_crtc +ffffffff82129170 t optc314_disable_crtc +ffffffff82129250 t optc314_phantom_crtc_post_enable +ffffffff82129310 t optc314_set_odm_bypass +ffffffff82129480 t optc314_set_odm_combine +ffffffff82129770 t optc314_set_h_timing_div_manual_mode +ffffffff8212a000 T dcn314_validate_bandwidth +ffffffff8212a490 T dcn314_create_resource_pool +ffffffff8212b7b0 t dcn314_resource_destruct +ffffffff8212be20 t dcn314_get_preferred_eng_id_dpia +ffffffff8212be50 t dcn314_destroy_resource_pool +ffffffff8212beb0 t dcn31_panel_cntl_create +ffffffff8212bf20 t dcn31_link_encoder_create +ffffffff8212bfd0 t dcn31_link_enc_create_minimal +ffffffff8212c070 t dcn314_populate_dml_pipes_from_context +ffffffff8212c100 t dcn314_update_bw_bounding_box +ffffffff8212c150 t dcn314_get_panel_config_defaults +ffffffff8212c190 t read_dce_straps +ffffffff8212c1c0 t dcn31_create_audio +ffffffff8212c1f0 t dcn314_stream_encoder_create +ffffffff8212c370 t dcn31_hpo_dp_stream_encoder_create +ffffffff8212c530 t dcn31_hpo_dp_link_encoder_create +ffffffff8212c5c0 t dcn314_hwseq_create +ffffffff8212d000 T dcn315_create_resource_pool +ffffffff8212e280 t dcn315_resource_destruct +ffffffff8212e8e0 t dcn315_destroy_resource_pool +ffffffff8212e940 t dcn31_panel_cntl_create +ffffffff8212e9b0 t dcn31_link_encoder_create +ffffffff8212ea60 t dcn31_link_enc_create_minimal +ffffffff8212eb00 t dcn315_populate_dml_pipes_from_context +ffffffff8212f200 t dcn315_get_panel_config_defaults +ffffffff8212f240 t read_dce_straps +ffffffff8212f270 t dcn31_create_audio +ffffffff8212f2a0 t dcn315_stream_encoder_create +ffffffff8212f420 t dcn31_hpo_dp_stream_encoder_create +ffffffff8212f5e0 t dcn31_hpo_dp_link_encoder_create +ffffffff8212f670 t dcn31_hwseq_create +ffffffff82130000 T dcn316_create_resource_pool +ffffffff82131290 t dcn316_resource_destruct +ffffffff821318f0 t dcn316_destroy_resource_pool +ffffffff82131950 t dcn31_panel_cntl_create +ffffffff821319c0 t dcn31_link_encoder_create +ffffffff82131a70 t dcn31_link_enc_create_minimal +ffffffff82131b10 t dcn316_populate_dml_pipes_from_context +ffffffff82131e40 t dcn316_get_panel_config_defaults +ffffffff82131e80 t read_dce_straps +ffffffff82131eb0 t dcn31_create_audio +ffffffff82131ee0 t dcn316_stream_encoder_create +ffffffff82132060 t dcn31_hpo_dp_stream_encoder_create +ffffffff82132220 t dcn31_hpo_dp_link_encoder_create +ffffffff821322b0 t dcn31_hwseq_create +ffffffff82133000 T dccg32_create +ffffffff821330b0 t dccg32_get_dccg_ref_freq +ffffffff821330e0 t dccg32_otg_add_pixel +ffffffff82133120 t dccg32_otg_drop_pixel +ffffffff82133160 t dccg32_set_dpstreamclk +ffffffff821334a0 t dccg32_set_dtbclk_dto +ffffffff821336a0 t dccg32_set_pixel_rate_div +ffffffff82133a10 t dccg32_set_valid_pixel_rate +ffffffff82133a80 t dccg32_trigger_dio_fifo_resync +ffffffff82134000 T enc32_hw_init +ffffffff82134090 T dcn32_link_encoder_enable_dp_output +ffffffff821340e0 T dcn32_link_encoder_construct +ffffffff821342d0 t dcn32_link_encoder_is_in_alt_mode +ffffffff82134350 t dcn32_link_encoder_get_max_link_cap +ffffffff82135000 T enc32_stream_encoder_dp_unblank +ffffffff82135500 T enc32_enable_fifo +ffffffff821355a0 t enc32_reset_fifo +ffffffff821356a0 T dcn32_dio_stream_encoder_construct +ffffffff82135710 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff82135c90 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff82135e10 t enc32_read_state +ffffffff82135f70 t enc32_dp_set_dsc_config +ffffffff82135fc0 t enc32_dp_set_odm_combine +ffffffff82136000 t enc32_set_dig_input_mode +ffffffff82137000 T dpp32_construct +ffffffff82137060 t dscl32_calc_lb_num_partitions +ffffffff82138000 T hpo_dp_link_encoder32_construct +ffffffff82138060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff82139000 T hubbub32_set_request_limit +ffffffff82139130 T dcn32_program_det_size +ffffffff821392d0 T hubbub32_program_urgent_watermarks +ffffffff82139a40 T hubbub32_program_stutter_watermarks +ffffffff82139e90 T hubbub32_program_pstate_watermarks +ffffffff8213a320 T hubbub32_program_usr_watermarks +ffffffff8213a580 T hubbub32_force_usr_retraining_allow +ffffffff8213a600 T hubbub32_force_wm_propagate_to_pipes +ffffffff8213a6a0 T hubbub32_init +ffffffff8213a7e0 T hubbub32_construct +ffffffff8213a860 t hubbub32_wm_read_state +ffffffff8213ac80 t hubbub32_program_watermarks +ffffffff8213ad90 t hubbub32_init_watermarks +ffffffff8213b1d0 t dcn32_program_compbuf_size +ffffffff8213b460 t dcn32_init_crb +ffffffff8213c000 T hubp32_update_force_pstate_disallow +ffffffff8213c090 T hubp32_update_force_cursor_pstate_disallow +ffffffff8213c120 T hubp32_update_mall_sel +ffffffff8213c1b0 T hubp32_prepare_subvp_buffering +ffffffff8213c250 T hubp32_phantom_hubp_post_enable +ffffffff8213c360 T hubp32_cursor_set_attributes +ffffffff8213c620 T hubp32_init +ffffffff8213c650 T hubp32_construct +ffffffff8213d000 T dcn32_dsc_pg_control +ffffffff8213d320 T dcn32_enable_power_gating_plane +ffffffff8213d590 T dcn32_hubp_pg_control +ffffffff8213d800 T dcn32_apply_idle_power_optimizations +ffffffff8213daf0 T dcn32_commit_subvp_config +ffffffff8213dba0 T dcn32_subvp_pipe_control_lock +ffffffff8213dd70 T dcn32_subvp_pipe_control_lock_fast +ffffffff8213ddf0 T dcn32_set_mpc_shaper_3dlut +ffffffff8213df10 T dcn32_set_mcm_luts +ffffffff8213e0a0 T dcn32_set_input_transfer_func +ffffffff8213e1e0 T dcn32_set_output_transfer_func +ffffffff8213e420 T dcn32_update_force_pstate +ffffffff8213e640 T dcn32_update_mall_sel +ffffffff8213e830 T dcn32_program_mall_pipe_config +ffffffff8213e920 T dcn32_init_hw +ffffffff8213f1e0 T dcn32_update_odm +ffffffff8213f7e0 T dcn32_calculate_dccg_k1_k2_values +ffffffff8213fa10 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff8213fab0 T dcn32_set_pixels_per_cycle +ffffffff8213fbf0 T dcn32_resync_fifo_dccg_dio +ffffffff8213fd90 T dcn32_unblank_stream +ffffffff8213ffa0 T dcn32_disable_link_output +ffffffff82140310 T dcn32_update_phantom_vp_position +ffffffff82140420 T dcn32_apply_update_flags_for_phantom +ffffffff821404a0 T dcn32_dsc_pg_status +ffffffff82140580 T dcn32_update_dsc_pg +ffffffff82140680 T dcn32_enable_phantom_streams +ffffffff821407c0 T dcn32_init_blank +ffffffff82140a00 T dcn32_blank_phantom +ffffffff82140b80 T dcn32_is_pipe_topology_transition_seamless +ffffffff82141000 T dcn32_hw_sequencer_init_functions +ffffffff82142000 T dcn32_mmhubbub_construct +ffffffff82142050 t mmhubbub32_warmup_mcif +ffffffff82142260 t mmhubbub32_config_mcif_buf +ffffffff82142710 t mmhubbub32_config_mcif_arb +ffffffff82143000 T mpc32_mpc_init +ffffffff821431e0 T mpc32_power_on_blnd_lut +ffffffff82143350 T mpc32_configure_post1dlut +ffffffff82143450 T mpc32_program_post1dluta_settings +ffffffff82143660 T mpc32_program_post1dlutb_settings +ffffffff82143870 T mpc32_program_post1dlut_pwl +ffffffff82143ca0 T mpc32_program_post1dlut +ffffffff82143fb0 T mpc32_configure_shaper_lut +ffffffff821440d0 T mpc32_program_shaper_luta_settings +ffffffff82144f60 T mpc32_program_shaper_lutb_settings +ffffffff82145df0 T mpc32_program_shaper_lut +ffffffff82145f90 T mpc32_power_on_shaper_3dlut +ffffffff821461c0 T mpc32_program_shaper +ffffffff821464e0 T mpc32_select_3dlut_ram +ffffffff82146590 T mpc32_select_3dlut_ram_mask +ffffffff82146660 T mpc32_set3dlut_ram12 +ffffffff82146860 T mpc32_set3dlut_ram10 +ffffffff82146930 T mpc32_program_3dlut +ffffffff82147300 T dcn32_mpc_construct +ffffffff82148000 T optc32_set_h_timing_div_manual_mode +ffffffff82148040 T dcn32_timing_generator_init +ffffffff821480b0 t optc32_enable_crtc +ffffffff821481b0 t optc32_disable_crtc +ffffffff82148290 t optc32_phantom_crtc_post_enable +ffffffff82148350 t optc32_disable_phantom_otg +ffffffff82148390 t optc32_set_drr +ffffffff82148550 t optc32_set_odm_bypass +ffffffff821486c0 t optc32_set_odm_combine +ffffffff82149000 T dcn32_panel_cntl_create +ffffffff82149070 T dcn32_acquire_post_bldn_3dlut +ffffffff82149160 T dcn32_release_post_bldn_3dlut +ffffffff82149210 T dcn32_retain_phantom_pipes +ffffffff821492f0 T dcn32_remove_phantom_pipes +ffffffff82149460 T dcn32_add_phantom_pipes +ffffffff82149890 T dcn32_validate_bandwidth +ffffffff82149d70 T dcn32_populate_dml_pipes_from_context +ffffffff8214a1a0 T dcn32_calculate_wm_and_dlg +ffffffff8214a210 T dcn32_create_resource_pool +ffffffff8214a2c0 t dcn32_resource_construct +ffffffff82155800 T dcn32_acquire_free_pipe_as_secondary_dpp_pipe +ffffffff82155b00 T dcn32_calc_num_avail_chans_for_mall +ffffffff82155b70 t dcn32_mpc_create +ffffffff8215a1d0 t dcn32_dwbc_create +ffffffff8215abd0 t dcn32_mmhubbub_create +ffffffff8215b080 t dcn32_resource_destruct +ffffffff8215b710 t dcn32_destroy_resource_pool +ffffffff8215b770 t dcn32_link_encoder_create +ffffffff8215c840 t dcn32_update_bw_bounding_box +ffffffff8215c890 t read_dce_straps +ffffffff8215c8c0 t dcn32_create_audio +ffffffff8215cc40 t dcn32_stream_encoder_create +ffffffff8215ea80 t dcn32_hpo_dp_stream_encoder_create +ffffffff8215f860 t dcn32_hpo_dp_link_encoder_create +ffffffff8215fcb0 t dcn32_hwseq_create +ffffffff821601a0 t dcn32_vpg_create +ffffffff82161000 T dcn32_helper_mall_bytes_to_ways +ffffffff82161060 T dcn32_helper_calculate_mall_bytes_for_cursor +ffffffff82161100 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff82161180 T dcn32_merge_pipes_for_subvp +ffffffff82161340 T dcn32_all_pipes_have_stream_and_plane +ffffffff821613d0 T dcn32_subvp_in_use +ffffffff82161460 T dcn32_mpo_in_use +ffffffff821614d0 T dcn32_any_surfaces_rotated +ffffffff82161560 T dcn32_is_center_timing +ffffffff821615d0 T dcn32_is_psr_capable +ffffffff82161620 T dcn32_determine_det_override +ffffffff82161960 T dcn32_set_det_allocations +ffffffff82161af0 T dcn32_save_mall_state +ffffffff82161ba0 T dcn32_restore_mall_state +ffffffff82161c50 T dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82161e00 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82161eb0 T dcn32_check_native_scaling_for_res +ffffffff82161f10 T dcn32_subvp_drr_admissable +ffffffff821620d0 T dcn32_subvp_vblank_admissable +ffffffff82163000 T dcn321_link_encoder_construct +ffffffff82164000 T dcn321_create_resource_pool +ffffffff821640b0 t dcn321_resource_construct +ffffffff8216f550 t dcn321_mpc_create +ffffffff82173bb0 t dcn321_dwbc_create +ffffffff821745b0 t dcn321_mmhubbub_create +ffffffff82174a60 t dcn321_resource_destruct +ffffffff821750f0 t dcn321_destroy_resource_pool +ffffffff82175150 t dcn321_link_encoder_create +ffffffff82176220 t dcn321_update_bw_bounding_box +ffffffff82176270 t read_dce_straps +ffffffff821762a0 t dcn321_create_audio +ffffffff82176620 t dcn321_stream_encoder_create +ffffffff82178460 t dcn321_hpo_dp_stream_encoder_create +ffffffff82179240 t dcn321_hpo_dp_link_encoder_create +ffffffff82179690 t dcn321_hwseq_create +ffffffff82179b80 t dcn321_vpg_create +ffffffff8217a000 T bw_int_to_fixed_nonconst +ffffffff8217a090 T bw_frc_to_fixed +ffffffff8217a260 T bw_floor2 +ffffffff8217a310 T bw_ceil2 +ffffffff8217a390 T bw_mul +ffffffff8217b000 T convert_to_custom_float_format +ffffffff8217c000 T bw_calcs_init +ffffffff8217ce60 T bw_calcs +ffffffff8217e800 t calculate_bandwidth +ffffffff82186000 T scaler_settings_calculation +ffffffff82186350 T mode_support_and_system_configuration +ffffffff8218c180 T display_pipe_configuration +ffffffff8218cab0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff82192000 T dcn_bw_mod +ffffffff82192060 T dcn_bw_min2 +ffffffff821920a0 T dcn_bw_max +ffffffff821920d0 T dcn_bw_max2 +ffffffff82192110 T dcn_bw_floor2 +ffffffff821921b0 T dcn_bw_floor +ffffffff821921e0 T dcn_bw_ceil +ffffffff82192220 T dcn_bw_ceil2 +ffffffff821922d0 T dcn_bw_max3 +ffffffff82192350 T dcn_bw_max5 +ffffffff82192490 T dcn_bw_pow +ffffffff82192520 T dcn_bw_fabs +ffffffff82192560 T dcn_bw_log +ffffffff82193000 T swizzle_mode_to_macro_tile_size +ffffffff82193090 T dcn_validate_bandwidth +ffffffff82195300 T dcn_bw_sync_calcs_and_dml +ffffffff82195550 t dcn_bw_calc_rq_dlg_ttu +ffffffff82195d20 T dcn_find_dcfclk_suits_all +ffffffff82196180 T dcn_bw_update_from_pplib_fclks +ffffffff82196300 T dcn_bw_update_from_pplib_dcfclks +ffffffff821963d0 T dcn_get_soc_clks +ffffffff82196450 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff82197000 T dcn10_resource_construct_fp +ffffffff82198000 T dcn20_populate_dml_writeback_from_context +ffffffff82198180 T dcn20_fpu_set_wb_arb_params +ffffffff82198330 T dcn20_calculate_dlg_params +ffffffff82198b70 T dcn20_populate_dml_pipes_from_context +ffffffff82199a80 T dcn20_calculate_wm +ffffffff8219a270 T dcn20_update_bounding_box +ffffffff8219a4f0 T dcn20_cap_soc_clocks +ffffffff8219a850 T dcn20_patch_bounding_box +ffffffff8219aa40 T dcn20_validate_bandwidth_fp +ffffffff8219abe0 t dcn20_validate_bandwidth_internal +ffffffff8219afe0 T dcn20_fpu_set_wm_ranges +ffffffff8219b080 T dcn20_fpu_adjust_dppclk +ffffffff8219b120 T dcn21_populate_dml_pipes_from_context +ffffffff8219b230 T dcn21_validate_bandwidth_fp +ffffffff8219bcc0 T dcn21_update_bw_bounding_box +ffffffff8219c0d0 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff8219c130 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff8219c430 t calculate_wm_set_for_vlevel +ffffffff8219d000 T dml20_recalculate +ffffffff8219d740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821a2be0 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff821aa040 t TruncToValidBPP +ffffffff821aa220 t CalculateVMAndRowBytes +ffffffff821aa8e0 t CalculatePrefetchSourceLines +ffffffff821aaab0 t CalculateWriteBackDelay +ffffffff821aad80 t CalculatePrefetchSchedule +ffffffff821abc30 t CalculateFlipSchedule +ffffffff821ac000 t adjust_ReturnBW +ffffffff821ad000 T dml20v2_recalculate +ffffffff821ad740 t dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821b2d60 T dml20v2_ModeSupportAndSystemConfigurationFull +ffffffff821ba140 t TruncToValidBPP +ffffffff821ba6d0 t CalculateVMAndRowBytes +ffffffff821bad90 t CalculatePrefetchSourceLines +ffffffff821baf60 t CalculateWriteBackDelay +ffffffff821bb230 t CalculateDelayAfterScaler +ffffffff821bb590 t CalculatePrefetchSchedule +ffffffff821bc2b0 t CalculateFlipSchedule +ffffffff821bc680 t adjust_ReturnBW +ffffffff821bd000 T dml20_rq_dlg_get_rq_reg +ffffffff821bd490 t dml20_rq_dlg_get_rq_params +ffffffff821bd660 T dml20_rq_dlg_get_dlg_reg +ffffffff821bf550 t get_surf_rq_param +ffffffff821bfdb0 t calculate_ttu_cursor +ffffffff821c1000 T dml20v2_rq_dlg_get_rq_reg +ffffffff821c1490 t dml20v2_rq_dlg_get_rq_params +ffffffff821c1660 T dml20v2_rq_dlg_get_dlg_reg +ffffffff821c3560 t get_surf_rq_param +ffffffff821c3dc0 t calculate_ttu_cursor +ffffffff821c5000 T dml21_recalculate +ffffffff821c5710 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821caed0 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff821d1380 t TruncToValidBPP +ffffffff821d1910 t CalculateDCFCLKDeepSleep +ffffffff821d1c50 t CalculateVMAndRowBytes +ffffffff821d24b0 t CalculatePrefetchSourceLines +ffffffff821d2680 t CalculateWriteBackDelay +ffffffff821d2950 t CalculatePrefetchSchedulePerPlane +ffffffff821d3190 t CalculateUrgentBurstFactor +ffffffff821d35a0 t CalculateFlipSchedule +ffffffff821d3a80 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821d4a70 t CalculatePrefetchSchedule +ffffffff821d7000 T dml21_rq_dlg_get_rq_reg +ffffffff821d7490 t dml_rq_dlg_get_rq_params +ffffffff821d7660 T dml21_rq_dlg_get_dlg_reg +ffffffff821d9930 t get_surf_rq_param +ffffffff821da250 t calculate_ttu_cursor +ffffffff821db000 T optc3_fpu_set_vrr_m_const +ffffffff821db4a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff821db7b0 T dcn30_fpu_set_mcif_arb_params +ffffffff821db920 T dcn30_fpu_update_soc_for_wm_a +ffffffff821db9f0 T dcn30_fpu_calculate_wm_and_dlg +ffffffff821dc480 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821dc670 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff821dc6d0 T dcn30_fpu_update_max_clk +ffffffff821dc780 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff821dc880 T dcn30_fpu_update_bw_bounding_box +ffffffff821dca60 T dcn3_fpu_build_wm_range_table +ffffffff821dcd40 T patch_dcn30_soc_bounding_box +ffffffff821dd000 T dml30_recalculate +ffffffff821dd5f0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821e40b0 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff821e4320 T dml30_CalculateWriteBackDISPCLK +ffffffff821e4490 t dml_max3 +ffffffff821e44f0 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff821ec040 t CalculateSwathAndDETConfiguration +ffffffff821ec740 t TruncToValidBPP +ffffffff821ec9a0 t CalculateVMAndRowBytes +ffffffff821ed010 t CalculatePrefetchSourceLines +ffffffff821ed1e0 t CalculateUrgentBurstFactor +ffffffff821ed470 t CalculateDCFCLKDeepSleep +ffffffff821ed790 t UseMinimumDCFCLK +ffffffff821eeab0 t CalculatePrefetchSchedule +ffffffff821eff50 t CalculateFlipSchedule +ffffffff821f0450 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821f1190 t CalculateSwathWidth +ffffffff821f2000 T dml30_rq_dlg_get_rq_reg +ffffffff821f24b0 t dml_rq_dlg_get_rq_params +ffffffff821f2740 T dml30_rq_dlg_get_dlg_reg +ffffffff821f4e10 t get_surf_rq_param +ffffffff821f57a0 t calculate_ttu_cursor +ffffffff821f6000 T dcn301_update_bw_bounding_box +ffffffff821f62e0 T dcn301_fpu_set_wm_ranges +ffffffff821f6380 T dcn301_fpu_init_soc_bounding_box +ffffffff821f6420 T dcn301_calculate_wm_and_dlg_fp +ffffffff821f6750 t calculate_wm_set_for_vlevel +ffffffff821f7000 T dcn302_fpu_update_bw_bounding_box +ffffffff821f7940 T dcn302_fpu_init_soc_bounding_box +ffffffff821f8000 T dcn303_fpu_update_bw_bounding_box +ffffffff821f89a0 T dcn303_fpu_init_soc_bounding_box +ffffffff821f9000 T dcn31_zero_pipe_dcc_fraction +ffffffff821f9060 T dcn31_update_soc_for_wm_a +ffffffff821f9110 T dcn315_update_soc_for_wm_a +ffffffff821f91e0 T dcn31_calculate_wm_and_dlg_fp +ffffffff821f9840 T dcn31_update_bw_bounding_box +ffffffff821f9be0 T dcn315_update_bw_bounding_box +ffffffff821f9ed0 T dcn316_update_bw_bounding_box +ffffffff821fa280 T dcn_get_max_non_odm_pix_rate_100hz +ffffffff821fa2e0 T dcn_get_approx_det_segs_required_for_pstate +ffffffff821fb000 T dml31_recalculate +ffffffff821fb2d0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82202190 T dml31_CalculateWriteBackDISPCLK +ffffffff82202300 t dml_max3 +ffffffff82202360 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff8220a440 t CalculateSwathAndDETConfiguration +ffffffff8220aaa0 t TruncToValidBPP +ffffffff8220acf0 t CalculateDCFCLKDeepSleep +ffffffff8220b010 t CalculateVMAndRowBytes +ffffffff8220b650 t CalculatePrefetchSourceLines +ffffffff8220b820 t CalculateUrgentBurstFactor +ffffffff8220bab0 t UseMinimumDCFCLK +ffffffff8220ca40 t CalculatePrefetchSchedulePerPlane +ffffffff8220d1a0 t CalculateFlipSchedule +ffffffff8220d730 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8220e350 t CalculateSwathWidth +ffffffff8220e860 t CalculatePrefetchSchedule +ffffffff8220fc40 t CalculateVupdateAndDynamicMetadataParameters +ffffffff82210000 T dml31_rq_dlg_get_rq_reg +ffffffff822104b0 t dml_rq_dlg_get_rq_params +ffffffff82210740 T dml31_rq_dlg_get_dlg_reg +ffffffff82213100 t get_surf_rq_param +ffffffff82214000 T dcn314_update_bw_bounding_box_fpu +ffffffff822143f0 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff82215000 T dml314_recalculate +ffffffff82215270 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8221c050 T dml314_CalculateWriteBackDISPCLK +ffffffff8221c1c0 t dml_max3 +ffffffff8221c220 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff822245a0 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff82224810 t CalculateSwathAndDETConfiguration +ffffffff82224e50 t TruncToValidBPP +ffffffff822250a0 t CalculateDCFCLKDeepSleep +ffffffff822253c0 t CalculateVMAndRowBytes +ffffffff82225a00 t CalculatePrefetchSourceLines +ffffffff82225bd0 t CalculateUrgentBurstFactor +ffffffff82225e60 t CalculateMaxVStartup +ffffffff82225fa0 t UseMinimumDCFCLK +ffffffff82226f30 t CalculatePrefetchSchedulePerPlane +ffffffff82227690 t CalculateFlipSchedule +ffffffff82227c20 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82228840 t CalculateSwathWidth +ffffffff82228d50 t CalculatePrefetchSchedule +ffffffff8222a130 t CalculateVupdateAndDynamicMetadataParameters +ffffffff8222b000 T dml314_rq_dlg_get_rq_reg +ffffffff8222b4b0 t dml_rq_dlg_get_rq_params +ffffffff8222b740 T dml314_rq_dlg_get_dlg_reg +ffffffff8222e100 t get_surf_rq_param +ffffffff8222f000 T dcn32_build_wm_range_table_fpu +ffffffff8222f390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff8222f540 T dcn32_internal_validate_bw +ffffffff822313b0 T dcn32_helper_populate_phantom_dlg_params +ffffffff82231550 T dcn32_predict_pipe_split +ffffffff82231780 T dcn32_set_phantom_stream_timing +ffffffff82231a90 T dcn32_determine_max_vratio_prefetch +ffffffff82231b70 t dcn32_split_stream_for_mpc_or_odm +ffffffff82231f20 T dcn32_calculate_wm_and_dlg_fpu +ffffffff82233650 T dcn32_patch_dpm_table +ffffffff82233860 T dcn32_update_bw_bounding_box_fpu +ffffffff82235ed0 T dcn32_zero_pipe_dcc_fraction +ffffffff82235f30 T dcn32_allow_subvp_with_active_margin +ffffffff82236000 T dcn32_allow_subvp_high_refresh_rate +ffffffff82236200 T dcn32_assign_fpo_vactive_candidate +ffffffff822362c0 T dcn32_find_vactive_pipe +ffffffff82236430 T dcn32_set_clock_limits +ffffffff82236480 T dcn32_override_min_req_memclk +ffffffff82236540 t subvp_drr_schedulable +ffffffff822367d0 t get_optimal_ntuple +ffffffff82237000 T dml32_recalculate +ffffffff8223b320 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff82243000 T dml32_dscceComputeDelay +ffffffff82243140 T dml32_dscComputeDelay +ffffffff82243180 T IsVertical +ffffffff822431b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff822434d0 t dml_max3 +ffffffff82243530 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff82243860 T dml32_CalculateSwathAndDETConfiguration +ffffffff82244090 T dml32_CalculateSwathWidth +ffffffff82244950 T dml32_UnboundedRequest +ffffffff822449c0 T dml32_CalculateDETBufferSize +ffffffff82245000 T dml32_CalculateODMMode +ffffffff82245780 T dml32_CalculateRequiredDispclk +ffffffff82245940 T dml32_RoundToDFSGranularity +ffffffff822459d0 T dml32_CalculateOutputLink +ffffffff82246440 T dml32_TruncToValidBPP +ffffffff82246770 T dml32_CalculateDPPCLK +ffffffff82246910 T dml32_RequiredDTBCLK +ffffffff82246b60 t dml_max4 +ffffffff82246be0 T dml32_DSCDelayRequirement +ffffffff822470a0 T dml32_CalculateSurfaceSizeInMall +ffffffff82247bf0 T dml32_CalculateVMRowAndSwath +ffffffff82248a00 T dml32_CalculateVMAndRowBytes +ffffffff82249650 T dml32_CalculatePrefetchSourceLines +ffffffff822498a0 T dml32_CalculateMALLUseForStaticScreen +ffffffff822499e0 T dml32_CalculateRowBandwidth +ffffffff82249b40 T dml32_CalculateUrgentLatency +ffffffff82249bf0 T dml32_CalculateUrgentBurstFactor +ffffffff82249ea0 T dml32_CalculateDCFCLKDeepSleep +ffffffff8224a1f0 T dml32_CalculateWriteBackDelay +ffffffff8224a350 T dml32_UseMinimumDCFCLK +ffffffff8224b3c0 T dml32_CalculateExtraLatencyBytes +ffffffff8224b580 T dml32_CalculateTWait +ffffffff8224b670 T dml32_CalculateVUpdateAndDynamicMetadataParameters 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dml32_CalculateImmediateFlipBandwithSupport +ffffffff82251c30 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff82252000 T dml32_rq_dlg_get_rq_reg +ffffffff822526a0 T dml32_rq_dlg_get_dlg_reg +ffffffff82255000 T dcn321_update_bw_bounding_box_fpu +ffffffff82257760 t get_optimal_ntuple +ffffffff82258000 T dml_init_instance +ffffffff82258310 T dml_get_status_message +ffffffff82258350 T dml_log_pipe_params +ffffffff82258380 T dml_log_mode_support_params +ffffffff82259000 T dml_get_voltage_level +ffffffff82259240 t fetch_socbb_params +ffffffff82259730 t fetch_ip_params +ffffffff82259bd0 t fetch_pipe_params +ffffffff8225ac50 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff8225acd0 T get_clk_dcf_deepsleep +ffffffff8225ade0 T get_wm_urgent +ffffffff8225aef0 T get_wm_memory_trip +ffffffff8225b000 T get_wm_writeback_urgent +ffffffff8225b110 T get_wm_stutter_exit +ffffffff8225b220 T get_wm_stutter_enter_exit +ffffffff8225b330 T get_wm_z8_stutter_exit +ffffffff8225b440 T get_wm_z8_stutter_enter_exit +ffffffff8225b550 T get_stutter_efficiency_z8 +ffffffff8225b660 T get_stutter_num_bursts_z8 +ffffffff8225b770 T get_wm_dram_clock_change +ffffffff8225b880 T get_wm_writeback_dram_clock_change +ffffffff8225b990 T get_stutter_efficiency +ffffffff8225baa0 T get_stutter_efficiency_no_vblank +ffffffff8225bbb0 T get_stutter_period +ffffffff8225bcc0 T get_urgent_latency +ffffffff8225bdd0 T get_urgent_extra_latency +ffffffff8225bee0 T get_nonurgent_latency +ffffffff8225bff0 T get_dram_clock_change_latency +ffffffff8225c100 T get_dispclk_calculated +ffffffff8225c210 T get_total_data_read_bw +ffffffff8225c320 T get_return_bw +ffffffff8225c430 T get_tcalc +ffffffff8225c540 T get_fraction_of_urgent_bandwidth +ffffffff8225c650 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff8225c760 T get_cstate_max_cap_mode +ffffffff8225c880 T get_comp_buffer_size_kbytes +ffffffff8225c990 T get_pixel_chunk_size_in_kbyte +ffffffff8225cab0 T get_alpha_pixel_chunk_size_in_kbyte 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get_dst_y_per_vm_flip +ffffffff8225e470 T get_dst_y_per_row_flip +ffffffff8225e590 T get_refcyc_per_vm_group_vblank +ffffffff8225e6b0 T get_refcyc_per_vm_group_flip +ffffffff8225e7d0 T get_refcyc_per_vm_req_vblank +ffffffff8225e8f0 T get_refcyc_per_vm_req_flip +ffffffff8225ea10 T get_refcyc_per_vm_group_vblank_in_us +ffffffff8225eb30 T get_refcyc_per_vm_group_flip_in_us +ffffffff8225ec50 T get_refcyc_per_vm_req_vblank_in_us +ffffffff8225ed70 T get_refcyc_per_vm_req_flip_in_us +ffffffff8225ee90 T get_refcyc_per_vm_dmdata_in_us +ffffffff8225efb0 T get_dmdata_dl_delta_in_us +ffffffff8225f0d0 T get_refcyc_per_line_delivery_l_in_us +ffffffff8225f1f0 T get_refcyc_per_line_delivery_c_in_us +ffffffff8225f310 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff8225f430 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff8225f550 T get_refcyc_per_req_delivery_l_in_us +ffffffff8225f670 T get_refcyc_per_req_delivery_c_in_us +ffffffff8225f790 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff8225f8b0 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff8225f9d0 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff8225faf0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff8225fc10 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff8225fd30 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff8225fe50 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff8225ff70 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff82260090 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff822601b0 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff822602d0 T get_vstartup +ffffffff82260400 T get_vupdate_offset +ffffffff82260530 T get_vupdate_width +ffffffff82260650 T get_vready_offset +ffffffff82260770 T get_vready_at_or_after_vsync +ffffffff822608a0 T get_min_dst_y_next_start +ffffffff822609d0 T get_dst_y_per_pte_row_nom_l +ffffffff82260af0 T get_dst_y_per_pte_row_nom_c +ffffffff82260c10 T get_dst_y_per_meta_row_nom_l +ffffffff82260d30 T get_dst_y_per_meta_row_nom_c +ffffffff82260e50 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff82260f70 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff82261090 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff822611b0 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff822612d0 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff822613f0 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff82261510 T get_vstartup_calculated +ffffffff82261640 T get_dpte_row_height_linear_c +ffffffff82261770 T get_swath_height_l +ffffffff822618a0 T get_swath_height_c +ffffffff822619d0 T get_det_stored_buffer_size_l_bytes +ffffffff82261b00 T get_det_stored_buffer_size_c_bytes +ffffffff82261c30 T get_dpte_group_size_in_bytes +ffffffff82261d60 T get_vm_group_size_in_bytes +ffffffff82261e90 T get_dpte_row_height_linear_l +ffffffff82261fc0 T get_pte_buffer_mode +ffffffff822620f0 T get_subviewport_lines_needed_in_mall +ffffffff82262220 T get_surface_size_in_mall +ffffffff82262350 T get_total_immediate_flip_bytes +ffffffff82262470 T get_total_immediate_flip_bw +ffffffff82262650 T get_total_prefetch_bw +ffffffff82262830 T get_total_surface_size_in_mall_bytes +ffffffff822629d0 T get_det_buffer_size_kbytes +ffffffff82262b00 T get_is_phantom_pipe +ffffffff82262c30 T Calculate256BBlockSizes +ffffffff82262d20 T CalculateMinAndMaxPrefetchMode +ffffffff82262da0 T ModeSupportAndSystemConfiguration +ffffffff822630b0 T CalculateWriteBackDISPCLK +ffffffff82264000 T print__rq_params_st +ffffffff82264030 T print__data_rq_sizing_params_st +ffffffff82264060 T print__data_rq_dlg_params_st +ffffffff82264090 T print__data_rq_misc_params_st +ffffffff822640c0 T print__rq_dlg_params_st +ffffffff822640f0 T print__dlg_sys_params_st +ffffffff82264120 T print__data_rq_regs_st +ffffffff82264150 T print__rq_regs_st +ffffffff82264180 T print__dlg_regs_st +ffffffff822641b0 T print__ttu_regs_st +ffffffff82265000 T dml1_extract_rq_regs +ffffffff82265330 T dml1_rq_dlg_get_rq_params +ffffffff82265510 t get_surf_rq_param +ffffffff822660c0 T dml1_rq_dlg_get_dlg_params +ffffffff82269000 T _do_calc_rc_params +ffffffff82269fc0 t get_qp_set +ffffffff8226b000 T dc_bandwidth_in_kbps_from_timing +ffffffff8226b290 T dc_dsc_stream_bandwidth_in_kbps +ffffffff8226b3e0 T dc_dsc_parse_dsc_dpcd +ffffffff8226b680 t dsc_throughput_from_dpcd +ffffffff8226b840 T dc_dsc_compute_bandwidth_range +ffffffff8226ba30 t intersect_dsc_caps +ffffffff8226bc00 t setup_dsc_config +ffffffff8226c3d0 T dc_dsc_compute_config +ffffffff8226c4c0 T dc_dsc_stream_bandwidth_overhead_in_kbps +ffffffff8226c600 T dc_dsc_get_policy_for_timing +ffffffff8226c6a0 T dc_dsc_policy_set_max_target_bpp_limit +ffffffff8226c6d0 T dc_dsc_policy_set_enable_dsc_when_not_needed +ffffffff8226c700 T dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff8226c730 T dc_set_disable_128b_132b_stream_overhead +ffffffff8226c760 T dc_dsc_get_default_config_option +ffffffff8226c7b0 t fit_num_slices_up +ffffffff8226c860 t decide_dsc_target_bpp_x16 +ffffffff8226d000 T calc_rc_params +ffffffff8226e000 T dscc_compute_dsc_parameters +ffffffff8226f000 T dal_hw_factory_dce110_init +ffffffff8226f060 t define_hpd_registers +ffffffff8226f0b0 t define_ddc_registers +ffffffff82270000 T dal_hw_translate_dce110_init +ffffffff82270030 t offset_to_id +ffffffff82270390 t id_to_offset +ffffffff82271000 T dal_hw_factory_dce120_init +ffffffff82271060 t define_hpd_registers +ffffffff822710b0 t define_ddc_registers +ffffffff82272000 T dal_hw_translate_dce120_init +ffffffff82272030 t offset_to_id +ffffffff822723a0 t id_to_offset +ffffffff82273000 T dal_hw_factory_dce80_init +ffffffff82273060 t define_hpd_registers +ffffffff822730b0 t define_ddc_registers +ffffffff82274000 T dal_hw_translate_dce80_init +ffffffff82274030 t offset_to_id +ffffffff822747b0 t id_to_offset +ffffffff82275000 T dal_hw_factory_dcn10_init +ffffffff82275060 t define_hpd_registers +ffffffff822750b0 t define_ddc_registers +ffffffff82275150 t define_generic_registers +ffffffff82276000 T dal_hw_translate_dcn10_init +ffffffff82276030 t offset_to_id +ffffffff82276390 t id_to_offset +ffffffff82277000 T dal_hw_factory_dcn20_init +ffffffff82277060 t define_hpd_registers +ffffffff822770b0 t define_ddc_registers +ffffffff82277160 t define_generic_registers +ffffffff82278000 T dal_hw_translate_dcn20_init +ffffffff82278030 t offset_to_id +ffffffff822782b0 t id_to_offset +ffffffff82279000 T dal_hw_factory_dcn21_init +ffffffff82279060 t define_hpd_registers +ffffffff822790b0 t define_ddc_registers +ffffffff82279160 t define_generic_registers +ffffffff8227a000 T dal_hw_translate_dcn21_init +ffffffff8227a030 t offset_to_id +ffffffff8227a2b0 t id_to_offset +ffffffff8227b000 T dal_hw_factory_dcn30_init +ffffffff8227b060 t define_hpd_registers +ffffffff8227b0b0 t define_ddc_registers +ffffffff8227b160 t define_generic_registers +ffffffff8227c000 T dal_hw_translate_dcn30_init +ffffffff8227c030 t offset_to_id +ffffffff8227c2c0 t id_to_offset +ffffffff8227d000 T dal_hw_factory_dcn315_init +ffffffff8227d060 t define_hpd_registers +ffffffff8227d0b0 t define_ddc_registers +ffffffff8227d160 t define_generic_registers +ffffffff8227e000 T dal_hw_translate_dcn315_init +ffffffff8227e030 t offset_to_id +ffffffff8227e2b0 t id_to_offset +ffffffff8227f000 T dal_hw_factory_dcn32_init +ffffffff8227f060 t define_hpd_registers +ffffffff8227f0b0 t define_ddc_registers +ffffffff8227f160 t define_generic_registers +ffffffff82280000 T dal_hw_translate_dcn32_init +ffffffff82280030 t offset_to_id +ffffffff82280290 t id_to_offset +ffffffff82281000 T dal_gpio_open +ffffffff822810c0 T dal_gpio_open_ex +ffffffff82281180 T dal_gpio_get_value +ffffffff82281200 T dal_gpio_set_value +ffffffff82281280 T dal_gpio_get_mode +ffffffff822812b0 T dal_gpio_lock_pin +ffffffff822812d0 T dal_gpio_unlock_pin +ffffffff822812f0 T dal_gpio_change_mode +ffffffff82281370 T dal_gpio_get_id +ffffffff822813a0 T dal_gpio_get_enum +ffffffff822813d0 T dal_gpio_set_config +ffffffff82281450 T dal_gpio_get_pin_info +ffffffff822814b0 T dal_gpio_get_sync_source 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dal_gpio_create_ddc +ffffffff82282da0 T dal_gpio_destroy_ddc +ffffffff82282e70 T dal_ddc_close +ffffffff82282ec0 T dal_ddc_open +ffffffff82283020 T dal_ddc_change_mode +ffffffff822830c0 T dal_ddc_get_line +ffffffff822830e0 T dal_ddc_set_config +ffffffff82284000 T dal_hw_ddc_init +ffffffff82284100 T dal_hw_ddc_get_pin +ffffffff82284110 t dal_hw_ddc_destroy +ffffffff82284170 t set_config +ffffffff82285000 T dal_hw_factory_init +ffffffff82286000 T dal_hw_generic_init +ffffffff82286100 T dal_hw_generic_get_pin +ffffffff82286110 t dal_hw_generic_destroy +ffffffff82286170 t set_config +ffffffff82287000 T dal_hw_gpio_open +ffffffff822870b0 T dal_hw_gpio_config_mode +ffffffff822871a0 T dal_hw_gpio_get_value +ffffffff82287200 T dal_hw_gpio_set_value +ffffffff82287290 T dal_hw_gpio_change_mode +ffffffff822872a0 T dal_hw_gpio_close +ffffffff82287350 T dal_hw_gpio_construct +ffffffff822873b0 T dal_hw_gpio_destruct +ffffffff82288000 T dal_hw_hpd_init +ffffffff82288100 T dal_hw_hpd_get_pin +ffffffff82288110 t dal_hw_hpd_destroy +ffffffff82288170 t get_value +ffffffff82288210 t set_config +ffffffff82289000 T dal_hw_translate_init +ffffffff8228a000 T dc_process_hdcp_msg +ffffffff8228a180 t hdmi_14_process_transaction +ffffffff8228a2d0 t dp_11_process_transaction +ffffffff8228b000 T dal_irq_service_dummy_set +ffffffff8228b050 T dal_irq_service_dummy_ack +ffffffff8228b0a0 T dce110_vblank_set +ffffffff8228b170 T to_dal_irq_source_dce110 +ffffffff8228b2f0 T dal_irq_service_dce110_create +ffffffff8228b370 t hpd_ack +ffffffff8228c000 T dal_irq_service_dce120_create +ffffffff8228c080 t hpd_ack +ffffffff8228d000 T dal_irq_service_dce80_create ffffffff8228d080 t hpd_ack -ffffffff8228e000 T dal_irq_service_dce80_create +ffffffff8228e000 T dal_irq_service_dcn10_create ffffffff8228e080 t hpd_ack -ffffffff8228f000 T dal_irq_service_dcn10_create +ffffffff8228e130 t to_dal_irq_source_dcn10 +ffffffff8228f000 T dal_irq_service_dcn20_create ffffffff8228f080 t hpd_ack -ffffffff8228f130 t to_dal_irq_source_dcn10 -ffffffff82290000 T dal_irq_service_dcn20_create +ffffffff8228f130 t to_dal_irq_source_dcn20 +ffffffff82290000 T dal_irq_service_dcn201_create ffffffff82290080 t hpd_ack -ffffffff82290130 t to_dal_irq_source_dcn20 -ffffffff82291000 T dal_irq_service_dcn201_create +ffffffff82290130 t to_dal_irq_source_dcn201 +ffffffff82291000 T dal_irq_service_dcn21_create ffffffff82291080 t hpd_ack -ffffffff82291130 t to_dal_irq_source_dcn201 -ffffffff82292000 T dal_irq_service_dcn21_create +ffffffff82291130 t to_dal_irq_source_dcn21 +ffffffff82292000 T dal_irq_service_dcn30_create ffffffff82292080 t hpd_ack -ffffffff82292130 t to_dal_irq_source_dcn21 -ffffffff82293000 T dal_irq_service_dcn30_create +ffffffff82292130 t to_dal_irq_source_dcn30 +ffffffff82293000 T dal_irq_service_dcn302_create ffffffff82293080 t hpd_ack -ffffffff82293130 t to_dal_irq_source_dcn30 -ffffffff82294000 T dal_irq_service_dcn302_create +ffffffff82293130 t to_dal_irq_source_dcn302 +ffffffff82294000 T dal_irq_service_dcn303_create ffffffff82294080 t hpd_ack -ffffffff82294130 t to_dal_irq_source_dcn302 -ffffffff82295000 T dal_irq_service_dcn303_create +ffffffff82294130 t to_dal_irq_source_dcn303 +ffffffff82295000 T dal_irq_service_dcn31_create ffffffff82295080 t hpd_ack -ffffffff82295130 t to_dal_irq_source_dcn303 -ffffffff82296000 T dal_irq_service_dcn31_create +ffffffff82295130 t to_dal_irq_source_dcn31 +ffffffff82296000 T dal_irq_service_dcn314_create ffffffff82296080 t hpd_ack -ffffffff82296130 t to_dal_irq_source_dcn31 -ffffffff82297000 T dal_irq_service_dcn314_create +ffffffff82296130 t to_dal_irq_source_dcn314 +ffffffff82297000 T dal_irq_service_dcn315_create ffffffff82297080 t hpd_ack -ffffffff82297130 t to_dal_irq_source_dcn314 -ffffffff82298000 T dal_irq_service_dcn315_create +ffffffff82297130 t to_dal_irq_source_dcn315 +ffffffff82298000 T dal_irq_service_dcn32_create ffffffff82298080 t hpd_ack -ffffffff82298130 t to_dal_irq_source_dcn315 -ffffffff82299000 T dal_irq_service_dcn32_create -ffffffff82299080 t hpd_ack -ffffffff82299130 t to_dal_irq_source_dcn32 -ffffffff8229a000 T dal_irq_service_construct -ffffffff8229a070 T dal_irq_service_destroy -ffffffff8229a100 T dal_irq_service_set_generic -ffffffff8229a180 T dal_irq_service_set -ffffffff8229a330 T dal_irq_service_ack -ffffffff8229a4a0 T dal_irq_service_ack_generic -ffffffff8229a510 T dal_irq_service_to_irq_source -ffffffff8229b000 T dp_handle_automated_test -ffffffff8229b820 T dp_set_test_pattern -ffffffff8229bf00 t set_crtc_test_pattern -ffffffff8229c370 T dp_set_preferred_link_settings -ffffffff8229c4c0 t dp_retrain_link_dp_test -ffffffff8229c5c0 T dp_set_preferred_training_settings -ffffffff8229d000 T dp_trace_init -ffffffff8229d0a0 T dp_trace_reset -ffffffff8229d130 T dp_trace_is_initialized -ffffffff8229d160 T dp_trace_detect_lt_init -ffffffff8229d1b0 T dp_trace_commit_lt_init -ffffffff8229d200 T dp_trace_link_loss_increment -ffffffff8229d230 T dp_trace_lt_fail_count_update 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set_dio_dp_link_test_pattern -ffffffff8229f4d0 T set_dio_dp_lane_settings -ffffffff8229f510 T update_dio_stream_allocation_table -ffffffff8229f580 T setup_dio_audio_output -ffffffff8229f5f0 T enable_dio_audio_packet -ffffffff8229f6b0 T disable_dio_audio_packet -ffffffff8229f790 T can_use_dio_link_hwss -ffffffff8229f7d0 T get_dio_link_hwss -ffffffff822a0000 T dp_dio_fixed_vs_pe_retimer_lane_cfg_to_hw_cfg -ffffffff822a0040 T dp_dio_fixed_vs_pe_retimer_exit_manual_automation -ffffffff822a0280 T enable_dio_fixed_vs_pe_retimer_program_4lane_output -ffffffff822a03b0 T requires_fixed_vs_pe_retimer_dio_link_hwss -ffffffff822a03f0 T get_dio_fixed_vs_pe_retimer_link_hwss -ffffffff822a0420 t enable_dio_fixed_vs_pe_retimer_dp_link_output -ffffffff822a0590 t set_dio_fixed_vs_pe_retimer_dp_link_test_pattern -ffffffff822a1000 T can_use_dpia_link_hwss -ffffffff822a1050 T get_dpia_link_hwss -ffffffff822a1080 t update_dpia_stream_allocation_table -ffffffff822a2000 T set_hpo_dp_throttled_vcp_size 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T dp_link_bandwidth_kbps -ffffffff822af0a0 T link_validate_mode_timing -ffffffff822af680 t get_tmds_output_pixel_clock_100hz -ffffffff822af6f0 T link_validate_dpia_bandwidth -ffffffff822b0000 T link_create_ddc_service -ffffffff822b0170 T link_destroy_ddc_service -ffffffff822b0200 T set_ddc_transaction_type -ffffffff822b0230 T link_is_in_aux_transaction_mode -ffffffff822b0270 T set_dongle_type -ffffffff822b02a0 T link_get_aux_defer_delay -ffffffff822b03d0 T link_query_ddc_data -ffffffff822b0780 T link_aux_transfer_raw -ffffffff822b07b0 T link_get_fixed_vs_pe_retimer_write_address -ffffffff822b0840 T link_get_fixed_vs_pe_retimer_read_address -ffffffff822b08d0 T link_configure_fixed_vs_pe_retimer -ffffffff822b09a0 T link_aux_transfer_with_retries_no_mutex -ffffffff822b09b0 T link_query_fixed_vs_pe_retimer -ffffffff822b0a80 T try_to_configure_aux_timeout -ffffffff822b0b60 T get_ddc_pin -ffffffff822b0b90 T write_scdc_data -ffffffff822b0c80 T read_scdc_data -ffffffff822b1000 T is_dp_active_dongle -ffffffff822b1040 T is_dp_branch_device -ffffffff822b1070 T dp_parse_lttpr_repeater_count -ffffffff822b10f0 T link_bw_kbps_from_raw_frl_link_rate_data -ffffffff822b1130 T dp_is_fec_supported -ffffffff822b11e0 T dp_should_enable_fec -ffffffff822b12f0 T dp_is_128b_132b_signal -ffffffff822b13c0 T dp_is_lttpr_present -ffffffff822b1430 T decide_fallback_link_setting -ffffffff822b1700 T link_dp_get_encoding_format -ffffffff822b1750 t reduce_link_rate -ffffffff822b1810 T edp_decide_link_settings -ffffffff822b1940 T decide_edp_link_settings_with_dsc -ffffffff822b1d00 T link_decide_link_settings -ffffffff822b2130 T mst_decide_link_encoding_format -ffffffff822b21b0 T dp_overwrite_extended_receiver_cap -ffffffff822b22c0 t get_active_converter_info -ffffffff822b26f0 T dpcd_set_source_specific_data -ffffffff822b2830 T dpcd_write_cable_id_to_dprx -ffffffff822b28a0 T read_is_mst_supported -ffffffff822b2950 T dp_retrieve_lttpr_cap -ffffffff822b2b60 T detect_dp_sink_caps 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smu_v13_0_0_smu_send_bad_mem_page_num -ffffffff8239e940 t smu_v13_0_0_get_ecc_info -ffffffff8239ea40 t smu_v13_0_0_send_bad_mem_channel_flag -ffffffff8239eac0 t smu_v13_0_0_i2c_xfer -ffffffff8239ed60 t smu_v13_0_0_i2c_func -ffffffff8239f000 T smu_v13_0_4_set_ppt_funcs -ffffffff8239f0c0 t smu_v13_0_4_print_clk_levels -ffffffff8239f130 t smu_v13_0_4_force_clk_levels -ffffffff8239f3f0 t smu_v13_0_4_read_sensor -ffffffff8239f6d0 t smu_v13_0_4_is_dpm_running -ffffffff8239f720 t smu_v13_0_4_set_watermarks_table -ffffffff8239f8a0 t smu_v13_0_4_set_performance_level -ffffffff823a0450 t smu_v13_0_4_init_smc_tables -ffffffff823a05c0 t smu_v13_0_4_fini_smc_tables -ffffffff823a0670 t smu_v13_0_4_system_features_control -ffffffff823a06c0 t smu_v13_0_4_mode2_reset -ffffffff823a06e0 t smu_v13_0_4_get_dpm_ultimate_freq -ffffffff823a0b00 t smu_v13_0_4_get_gpu_metrics -ffffffff823a0cd0 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters -ffffffff823a0d30 t smu_v13_0_4_get_current_clk_freq -ffffffff823a1000 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bwfm_sdio_buscore_write -ffffffff825e56d0 T bwfm_sdio_buscore_prepare -ffffffff825e5810 T bwfm_sdio_buscore_activate -ffffffff825e5890 T bwfm_sdio_match -ffffffff825e5940 T bwfm_sdio_attach -ffffffff825e5c00 T bwfm_sdio_detach -ffffffff825e5c60 T bwfm_sdio_task -ffffffff825e5dc0 T bwfm_sdio_write_1 -ffffffff825e5df0 T bwfm_sdio_read_1 -ffffffff825e5e20 T bwfm_sdio_write_4 -ffffffff825e5ed0 T bwfm_sdio_read_4 -ffffffff825e5f80 T bwfm_sdio_load_microcode -ffffffff825e61e0 T bwfm_sdio_clkctl -ffffffff825e6310 T bwfm_sdio_dev_write -ffffffff825e6360 T bwfm_sdio_intr -ffffffff825e63a0 T bwfm_sdio_ram_read_write -ffffffff825e65d0 T bwfm_sdio_htclk -ffffffff825e6840 T bwfm_sdio_readshared -ffffffff825e6910 T bwfm_sdio_dev_read -ffffffff825e6950 T bwfm_sdio_rx_frames -ffffffff825e6d00 T bwfm_sdio_tx_frames -ffffffff825e6e00 T bwfm_sdio_backplane -ffffffff825e6eb0 T bwfm_sdio_buf_read -ffffffff825e6f90 T bwfm_sdio_buf_write -ffffffff825e7040 T bwfm_sdio_frame_read_write -ffffffff825e71c0 T bwfm_sdio_newbuf -ffffffff825e7240 T bwfm_sdio_tx_ok -ffffffff825e72a0 T bwfm_sdio_tx_ctrlframe -ffffffff825e73a0 T bwfm_sdio_tx_dataframe -ffffffff825e74f0 T bwfm_sdio_rx_glom -ffffffff825e8000 T onewire_match -ffffffff825e8050 T onewire_attach -ffffffff825e80f0 T onewire_detach -ffffffff825e8160 T onewire_activate -ffffffff825e8180 T onewire_scan -ffffffff825e83a0 T onewire_createthread -ffffffff825e8410 T onewire_print -ffffffff825e84e0 T onewirebus_print -ffffffff825e8530 T onewire_lock -ffffffff825e8550 T onewire_unlock -ffffffff825e8570 T onewire_reset -ffffffff825e8590 T onewire_bit -ffffffff825e85b0 T onewire_read_byte -ffffffff825e86f0 T onewire_write_byte -ffffffff825e87d0 T onewire_read_block -ffffffff825e8870 T onewire_write_block -ffffffff825e8910 T onewire_triplet -ffffffff825e89f0 T onewire_matchrom -ffffffff825e8b40 T onewire_search -ffffffff825e8ee0 T onewire_thread -ffffffff825e9000 T onewire_crc -ffffffff825e90b0 T onewire_crc16 -ffffffff825e9170 T onewire_famname -ffffffff825e91b0 T onewire_matchbyfam -ffffffff825ea000 T owid_match -ffffffff825ea030 T owid_attach -ffffffff825ea100 T owid_detach -ffffffff825ea140 T owid_activate -ffffffff825eb000 T owsbm_match -ffffffff825eb030 T owsbm_attach -ffffffff825eb1d0 T owsbm_detach -ffffffff825eb240 T owsbm_activate -ffffffff825eb270 T owsbm_update -ffffffff825ec000 T owtemp_match -ffffffff825ec030 T owtemp_attach -ffffffff825ec130 T owtemp_detach -ffffffff825ec1a0 T owtemp_activate -ffffffff825ec1d0 T owtemp_update -ffffffff825ed000 T owctr_match -ffffffff825ed030 T owctr_attach -ffffffff825ed180 T owctr_detach -ffffffff825ed1f0 T owctr_activate -ffffffff825ed220 T owctr_update -ffffffff825ed250 T owctr_update_counter -ffffffff825ee000 A __text_page_start -ffffffff825ee000 T Xsyscall_meltdown -ffffffff825ee00c T Xsyscall -ffffffff825ee26e t Xsyscall_trampback -ffffffff825ee280 T intr_user_exit -ffffffff825ee2c2 t intr_user_exit_post_ast -ffffffff825ee3ee t Xiretq_trampback -ffffffff825ee3fa T doreti_iret -ffffffff825ef000 T alltraps -ffffffff825ef138 T recall_trap -ffffffff825ef150 T alltraps_kern -ffffffff825ef153 T alltraps_kern_meltdown -ffffffff825f0000 ? Xsyscall32 -ffffffff825f0000 A __kutext_start -ffffffff825f0000 A __text_page_end -ffffffff825f1000 ? Xtrap00 -ffffffff825f1010 ? Xtrap01 -ffffffff825f1020 ? Xtrap02 -ffffffff825f1028 c calltrap_specstk -ffffffff825f10f0 ? calltrap_specstk_tramp -ffffffff825f1110 ? Xtrap03 -ffffffff825f1120 ? Xtrap04 -ffffffff825f1130 ? Xtrap05 -ffffffff825f1140 ? Xtrap06 -ffffffff825f1150 ? Xtrap07 -ffffffff825f1160 ? Xtrap08 -ffffffff825f1170 ? Xtrap09 -ffffffff825f1180 ? Xtrap0a -ffffffff825f1190 ? Xtrap0b -ffffffff825f11a0 ? Xtrap0c -ffffffff825f11b0 ? Xtrap0d -ffffffff825f1240 ? Xtrap0e -ffffffff825f1250 ? Xintrspurious -ffffffff825f1250 ? Xtrap0f -ffffffff825f1260 ? Xtrap10 -ffffffff825f1270 ? Xtrap11 -ffffffff825f1280 ? Xtrap12 -ffffffff825f1290 ? Xtrap13 -ffffffff825f12a0 ? Xtrap14 -ffffffff825f12b0 ? Xtrap15 -ffffffff825f12c0 ? Xtrap16 -ffffffff825f12c0 ? Xtrap17 -ffffffff825f12c0 ? Xtrap18 -ffffffff825f12c0 ? Xtrap19 -ffffffff825f12c0 ? Xtrap1a -ffffffff825f12c0 ? Xtrap1b -ffffffff825f12c0 ? Xtrap1c -ffffffff825f12c0 ? Xtrap1d -ffffffff825f12c0 ? Xtrap1e -ffffffff825f12c0 ? Xtrap1f -ffffffff825f12d0 ? x2apic_eoi -ffffffff825f12f0 ? Xintr_lapic_ipi -ffffffff825f1330 ? Xipi_invltlb -ffffffff825f1360 ? Xipi_invlpg -ffffffff825f1390 ? Xipi_invlrange -ffffffff825f13d0 ? Xipi_invltlb_pcid -ffffffff825f1410 ? Xipi_invlpg_pcid -ffffffff825f1460 ? Xipi_invlrange_pcid -ffffffff825f14d0 ? Xintr_lapic_ltimer -ffffffff825f1510 ? Xintr_xen_upcall -ffffffff825f1550 ? Xintr_hyperv_upcall -ffffffff825f1590 ? Xintr_legacy0 -ffffffff825f15d0 ? Xintr_legacy1 -ffffffff825f1610 ? Xintr_legacy2 -ffffffff825f1650 ? Xintr_legacy3 -ffffffff825f1690 ? Xintr_legacy4 -ffffffff825f16d0 ? Xintr_legacy5 -ffffffff825f1710 ? Xintr_legacy6 -ffffffff825f1750 ? Xintr_legacy7 -ffffffff825f1790 ? Xintr_legacy8 -ffffffff825f17d0 ? Xintr_legacy9 -ffffffff825f1810 ? Xintr_legacy10 -ffffffff825f1850 ? Xintr_legacy11 -ffffffff825f1890 ? Xintr_legacy12 -ffffffff825f18d0 ? Xintr_legacy13 -ffffffff825f1910 ? Xintr_legacy14 -ffffffff825f1950 ? Xintr_legacy15 -ffffffff825f1990 ? Xintr_ioapic_edge0 -ffffffff825f19d0 ? Xintr_ioapic_edge1 -ffffffff825f1a10 ? Xintr_ioapic_edge2 -ffffffff825f1a50 ? Xintr_ioapic_edge3 -ffffffff825f1a90 ? Xintr_ioapic_edge4 -ffffffff825f1ad0 ? Xintr_ioapic_edge5 -ffffffff825f1b10 ? Xintr_ioapic_edge6 -ffffffff825f1b50 ? Xintr_ioapic_edge7 -ffffffff825f1b90 ? Xintr_ioapic_edge8 -ffffffff825f1bd0 ? Xintr_ioapic_edge9 -ffffffff825f1c10 ? Xintr_ioapic_edge10 -ffffffff825f1c50 ? Xintr_ioapic_edge11 -ffffffff825f1c90 ? Xintr_ioapic_edge12 -ffffffff825f1cd0 ? Xintr_ioapic_edge13 -ffffffff825f1d10 ? Xintr_ioapic_edge14 -ffffffff825f1d50 ? Xintr_ioapic_edge15 -ffffffff825f1d90 ? Xintr_ioapic_edge16 -ffffffff825f1dd0 ? Xintr_ioapic_edge17 -ffffffff825f1e10 ? Xintr_ioapic_edge18 -ffffffff825f1e50 ? Xintr_ioapic_edge19 -ffffffff825f1e90 ? Xintr_ioapic_edge20 -ffffffff825f1ed0 ? Xintr_ioapic_edge21 -ffffffff825f1f10 ? Xintr_ioapic_edge22 -ffffffff825f1f50 ? Xintr_ioapic_edge23 -ffffffff825f1f90 ? Xintr_ioapic_edge24 -ffffffff825f1fd0 ? Xintr_ioapic_edge25 -ffffffff825f2010 ? Xintr_ioapic_edge26 -ffffffff825f2050 ? Xintr_ioapic_edge27 -ffffffff825f2090 ? Xintr_ioapic_edge28 -ffffffff825f20d0 ? Xintr_ioapic_edge29 -ffffffff825f2110 ? Xintr_ioapic_edge30 -ffffffff825f2150 ? Xintr_ioapic_edge31 -ffffffff825f2190 ? Xintr_ioapic_edge32 -ffffffff825f21d0 ? Xintr_ioapic_edge33 -ffffffff825f2210 ? Xintr_ioapic_edge34 -ffffffff825f2250 ? Xintr_ioapic_edge35 -ffffffff825f2290 ? Xintr_ioapic_edge36 -ffffffff825f22d0 ? Xintr_ioapic_edge37 -ffffffff825f2310 ? Xintr_ioapic_edge38 -ffffffff825f2350 ? Xintr_ioapic_edge39 -ffffffff825f2390 ? Xintr_ioapic_edge40 -ffffffff825f23d0 ? Xintr_ioapic_edge41 -ffffffff825f2410 ? Xintr_ioapic_edge42 -ffffffff825f2450 ? Xintr_ioapic_edge43 -ffffffff825f2490 ? Xintr_ioapic_edge44 -ffffffff825f24d0 ? Xintr_ioapic_edge45 -ffffffff825f2510 ? Xintr_ioapic_edge46 -ffffffff825f2550 ? Xintr_ioapic_edge47 -ffffffff825f2590 ? Xintr_ioapic_edge48 -ffffffff825f25d0 ? Xintr_ioapic_edge49 -ffffffff825f2610 ? Xintr_ioapic_edge50 -ffffffff825f2650 ? Xintr_ioapic_edge51 -ffffffff825f2690 ? Xintr_ioapic_edge52 -ffffffff825f26d0 ? Xintr_ioapic_edge53 -ffffffff825f2710 ? Xintr_ioapic_edge54 -ffffffff825f2750 ? Xintr_ioapic_edge55 -ffffffff825f2790 ? Xintr_ioapic_edge56 -ffffffff825f27d0 ? Xintr_ioapic_edge57 -ffffffff825f2810 ? Xintr_ioapic_edge58 -ffffffff825f2850 ? Xintr_ioapic_edge59 -ffffffff825f2890 ? Xintr_ioapic_edge60 -ffffffff825f28d0 ? Xintr_ioapic_edge61 -ffffffff825f2910 ? Xintr_ioapic_edge62 -ffffffff825f2950 ? Xintr_ioapic_edge63 -ffffffff825f2990 ? Xintr_ioapic_level0 -ffffffff825f29d0 ? Xintr_ioapic_level1 -ffffffff825f2a10 ? Xintr_ioapic_level2 -ffffffff825f2a50 ? Xintr_ioapic_level3 -ffffffff825f2a90 ? Xintr_ioapic_level4 -ffffffff825f2ad0 ? Xintr_ioapic_level5 -ffffffff825f2b10 ? Xintr_ioapic_level6 -ffffffff825f2b50 ? Xintr_ioapic_level7 -ffffffff825f2b90 ? Xintr_ioapic_level8 -ffffffff825f2bd0 ? Xintr_ioapic_level9 -ffffffff825f2c10 ? Xintr_ioapic_level10 -ffffffff825f2c50 ? Xintr_ioapic_level11 -ffffffff825f2c90 ? Xintr_ioapic_level12 -ffffffff825f2cd0 ? Xintr_ioapic_level13 -ffffffff825f2d10 ? Xintr_ioapic_level14 -ffffffff825f2d50 ? Xintr_ioapic_level15 -ffffffff825f2d90 ? Xintr_ioapic_level16 -ffffffff825f2dd0 ? Xintr_ioapic_level17 -ffffffff825f2e10 ? Xintr_ioapic_level18 -ffffffff825f2e50 ? Xintr_ioapic_level19 -ffffffff825f2e90 ? Xintr_ioapic_level20 -ffffffff825f2ed0 ? Xintr_ioapic_level21 -ffffffff825f2f10 ? Xintr_ioapic_level22 -ffffffff825f2f50 ? Xintr_ioapic_level23 -ffffffff825f2f90 ? Xintr_ioapic_level24 -ffffffff825f2fd0 ? Xintr_ioapic_level25 -ffffffff825f3010 ? Xintr_ioapic_level26 -ffffffff825f3050 ? Xintr_ioapic_level27 -ffffffff825f3090 ? Xintr_ioapic_level28 -ffffffff825f30d0 ? Xintr_ioapic_level29 -ffffffff825f3110 ? Xintr_ioapic_level30 -ffffffff825f3150 ? Xintr_ioapic_level31 -ffffffff825f3190 ? Xintr_ioapic_level32 -ffffffff825f31d0 ? Xintr_ioapic_level33 -ffffffff825f3210 ? Xintr_ioapic_level34 -ffffffff825f3250 ? Xintr_ioapic_level35 -ffffffff825f3290 ? Xintr_ioapic_level36 -ffffffff825f32d0 ? Xintr_ioapic_level37 -ffffffff825f3310 ? Xintr_ioapic_level38 -ffffffff825f3350 ? Xintr_ioapic_level39 -ffffffff825f3390 ? Xintr_ioapic_level40 -ffffffff825f33d0 ? Xintr_ioapic_level41 -ffffffff825f3410 ? Xintr_ioapic_level42 -ffffffff825f3450 ? Xintr_ioapic_level43 -ffffffff825f3490 ? Xintr_ioapic_level44 -ffffffff825f34d0 ? Xintr_ioapic_level45 -ffffffff825f3510 ? Xintr_ioapic_level46 -ffffffff825f3550 ? Xintr_ioapic_level47 -ffffffff825f3590 ? Xintr_ioapic_level48 -ffffffff825f35d0 ? Xintr_ioapic_level49 -ffffffff825f3610 ? Xintr_ioapic_level50 -ffffffff825f3650 ? Xintr_ioapic_level51 -ffffffff825f3690 ? Xintr_ioapic_level52 -ffffffff825f36d0 ? Xintr_ioapic_level53 -ffffffff825f3710 ? Xintr_ioapic_level54 -ffffffff825f3750 ? Xintr_ioapic_level55 -ffffffff825f3790 ? Xintr_ioapic_level56 -ffffffff825f37d0 ? Xintr_ioapic_level57 -ffffffff825f3810 ? Xintr_ioapic_level58 -ffffffff825f3850 ? Xintr_ioapic_level59 -ffffffff825f3890 ? Xintr_ioapic_level60 -ffffffff825f38d0 ? Xintr_ioapic_level61 -ffffffff825f3910 ? Xintr_ioapic_level62 -ffffffff825f3950 ? Xintr_ioapic_level63 -ffffffff825f4000 ? codepatch_fill_nop -ffffffff825f4000 A __cptext_start -ffffffff825f4000 A __kutext_end -ffffffff825f40b0 ? codepatch_maprw -ffffffff825f4190 ? codepatch_unmaprw -ffffffff825f4200 ? codepatch_nop -ffffffff825f4360 ? codepatch_replace -ffffffff825f4510 ? codepatch_call -ffffffff825f4530 ? codepatch_control_flow -ffffffff825f4740 ? codepatch_jmp -ffffffff825f5000 A __cptext_end -ffffffff825f5000 A __rodata_start -ffffffff825f5000 C _etext -ffffffff825f5000 C etext -ffffffff825f6000 r seeprom_read -ffffffff825f6004 r icl_mg_pll_find_divisors.div1_vals -ffffffff825f6034 r athn_ac2qid -ffffffff825f6034 r athn_ac2qid -ffffffff825f6034 r athn_ac2qid -ffffffff825f6040 r rtwn_get_rssi.cckoff -ffffffff825f6068 r rsu_ac2qid -ffffffff825f6078 r pckbc_portcmd -ffffffff825f607c r tht_fifo_write_pad.pad -ffffffff825f6084 r rsu_get_rssi.cckoff -ffffffff825f60a4 r adlp_n_revids -ffffffff825f60e8 r apple_iso_trans -ffffffff825f60f0 r wihap_check_tx.txratetable -ffffffff825f60f4 r dmamode -ffffffff825f6118 r gen9_edram_size_mb.sets -ffffffff825f612c r dg2_g12_revid_step_tbl -ffffffff825f7000 r isomappings -ffffffff825f7080 r unimappings -ffffffff825f7230 r replacements -ffffffff825fa8ab r apollo_pio_rec -ffffffff826469f5 r apollo_udma33_tim -ffffffff8265bab3 r pp_r600_decoded_lanes -ffffffff8269170e r cmd680_setup_channel.udma_tbl -ffffffff82699ac6 r apollo_udma100_tim -ffffffff82699acc r cmd0646_9_tim_udma -ffffffff826a7ebc r substchar -ffffffff826fd442 r apollo_udma133_tim -ffffffff826fd449 r apollo_udma66_tim -ffffffff826fd473 r cy_pio_rec -ffffffff82702bd8 R drm_ca -ffffffff82702c00 R drm_filtops -ffffffff82702c30 R drmread_filtops -ffffffff82703000 r vga_emulops -ffffffff82703048 R vga_stdscreen -ffffffff82703078 R vga_stdscreen_mono -ffffffff827030a8 R vga_stdscreen_bf -ffffffff827030d8 R vga_40lscreen -ffffffff82703108 R vga_40lscreen_mono -ffffffff82703138 R vga_40lscreen_bf -ffffffff82703168 R vga_50lscreen -ffffffff82703198 R vga_50lscreen_mono -ffffffff827031c8 R vga_50lscreen_bf -ffffffff827031f8 R vga_screenlist -ffffffff82703208 R vga_screenlist_mono -ffffffff82703218 R vga_accessops -ffffffff82703278 r i945_wm_info -ffffffff827032b8 r bgansitopc -ffffffff827032c0 r pctoansi -ffffffff82703300 r sdma_offsets -ffffffff82703300 r sdma_offsets -ffffffff82703338 r iha_rate_tbl -ffffffff82703370 r i830_a_wm_info -ffffffff827033a8 r gen9_edram_size_mb.ways -ffffffff82703408 r aggr_periodic_times -ffffffff82703500 r michael_final.pad -ffffffff82703528 r rt_copysa.maskarray -ffffffff82703530 r i915_wm_info -ffffffff82703538 r amdgpu_ih_clientid_jpeg -ffffffff82703538 r amdgpu_ih_clientid_uvds -ffffffff82703538 r amdgpu_ih_clientid_vcns -ffffffff82703538 r amdgpu_ih_clientid_vcns -ffffffff82703538 r amdgpu_ih_clientid_vcns -ffffffff82703568 r jsl_ehl_revids -ffffffff82703578 r vga_setfontset.cmaptabb -ffffffff827035e8 r i830_bc_wm_info -ffffffff82703650 r hsw_activate_psr2.map -ffffffff82703658 r tgl_revids -ffffffff82703690 r __drm_universal_plane_init.default_modifiers -ffffffff827036a0 r iwn_tid2fifo -ffffffff827036b8 r vga_setfontset.cmaptaba -ffffffff827036c0 r crtc_offsets -ffffffff827036c0 r crtc_offsets -ffffffff827036c0 r crtc_offsets -ffffffff82703768 r rtwn_r88e_get_rssi.cckoff -ffffffff82704000 R edid_vendors -ffffffff827042c0 R edid_nvendors -ffffffff827042d0 R edid_products -ffffffff82704330 R edid_nproducts -ffffffff82704340 r _edid_modes -ffffffff82705000 R videomode_list -ffffffff82706080 R videomode_count -ffffffff82707000 r ahc_hard_errors -ffffffff82707080 r critical_sections -ffffffff827070b0 r patches -ffffffff82707d50 r seqprog -ffffffff82709000 r ahc_switch -ffffffff8270a000 r termstat_strings -ffffffff8270a020 r critical_sections -ffffffff8270a060 r seqprog -ffffffff8270ad50 r patches -ffffffff8270c000 r ahd_switch -ffffffff8270d000 R aic_switch -ffffffff8270e000 R adw_switch -ffffffff8270f000 R gdt_switch -ffffffff82710000 R twe_switch -ffffffff82711000 R ciss_switch -ffffffff82711030 R ciss_level -ffffffff82711050 R ciss_stat -ffffffff82712000 R ami_switch -ffffffff82712028 R ami_raw_switch -ffffffff82713000 R mfi_switch -ffffffff82713028 R mfi_pd_switch -ffffffff82713050 r mfi_iop_xscale -ffffffff82713080 r mfi_iop_ppc -ffffffff827130b0 r mfi_iop_gen2 -ffffffff827130e0 r mfi_iop_skinny -ffffffff82713110 r mfi_bbu_indicators -ffffffff82714000 R qlw_switch -ffffffff82715000 R isp_2100_risc_code -ffffffff82727bf0 R isp_2200_risc_code -ffffffff8273a990 R isp_2300_risc_code -ffffffff82754408 R qla_switch -ffffffff82754430 r qla_regs_2100 -ffffffff82754460 r qla_regs_2200 -ffffffff82754490 r qla_regs_23XX -ffffffff82755000 R ahci_atascsi_methods -ffffffff82756000 R nvme_switch -ffffffff82756028 r nvme_ops -ffffffff82757000 R mpi_switch -ffffffff82757060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs -ffffffff82757090 r chv_oa_mux_regs -ffffffff827570b0 r fiji_clock_stretcher_lookup_table -ffffffff827570b0 r tonga_clock_stretcher_lookup_table -ffffffff827570d0 r iosf_pci_devices -ffffffff827570f0 r link_speed -ffffffff827570f0 r link_speed -ffffffff82757130 r drm_fb_xfrm.default_dst_pitch -ffffffff82757130 r non_supported_protection -ffffffff82757140 r tgl_uy_revids -ffffffff827572a0 r bwi_phy_noise_11g_rev1 -ffffffff82757310 r cardslot_process_event.antonym_ev -ffffffff827573a0 r gen11_oa_mux_regs -ffffffff82757440 r dpia_to_preferred_enc_id_table -ffffffff827574b0 r ddr2_cycle_tenths -ffffffff82757520 r rtw_intr_rx.ratetbl -ffffffff827575a0 r abm_config -ffffffff82757620 r getbootinfo.ports -ffffffff82757670 r reg_offsets -ffffffff82757680 r bwi_rf_lo_measure_11g.rf_lo_adjust -ffffffff82757690 r glk_revids -ffffffff827576a0 r init_non_clock_fields.look_up -ffffffff827576b0 r uftdi_8u232am_getrate.roundoff -ffffffff82757710 r zyd_rx_data.rates -ffffffff82757730 r ieee80211_ra_valid_tx_mcs.max_mcs -ffffffff82757760 r intel_engine_init_tlb_invalidation.gen8_regs -ffffffff82757790 r bwi_phy_noise_11g -ffffffff827577a0 r hpt366_pio -ffffffff82757800 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs -ffffffff82757820 r ether_crc32_be_update.rev -ffffffff82757820 r rtw_grf5101_mac_crypt.caesar -ffffffff82757870 r snb_b_fdi_train_param -ffffffff82757940 r intel_hpll_vco.elk_vco -ffffffff82757960 r icl_revids -ffffffff827579c0 r pin_offsets -ffffffff827579e0 r amdgpu_ih_srcid_jpeg -ffffffff82757a20 r firmware_list -ffffffff82757a80 r atom_arg_shift -ffffffff82757a80 r atom_arg_shift -ffffffff82757ac0 r pf_syncookie_wstab -ffffffff82757ae0 r ieee80211_media_init.mopts -ffffffff82757b40 r add_entropy_words.twist_table -ffffffff82757be0 r urtw_8225v2_txpwr_cck -ffffffff82757c00 r bwfm_pci_prio2fifo -ffffffff82757c00 r ieee80211_up_to_ac.up_to_ac -ffffffff82757cc0 r paritytab -ffffffff82757cc0 r x86emu_parity_tab -ffffffff82757ce0 r legacy_connector_convert -ffffffff82757d20 r gen7_oa_mux_regs -ffffffff82757d40 r hsw_oa_mux_regs -ffffffff82757d60 r notetab -ffffffff82757d80 r urtw_8225v2_txpwr_cck_ch14 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setup_hpo_dp_stream_encoder +ffffffff822a1170 T reset_hpo_dp_stream_encoder +ffffffff822a1190 T setup_hpo_dp_stream_attribute +ffffffff822a1210 T enable_hpo_dp_link_output +ffffffff822a1290 T disable_hpo_dp_link_output +ffffffff822a1330 T update_hpo_dp_stream_allocation_table +ffffffff822a1350 T setup_hpo_dp_audio_output +ffffffff822a1390 T enable_hpo_dp_audio_packet +ffffffff822a13b0 T disable_hpo_dp_audio_packet +ffffffff822a1400 T can_use_hpo_dp_link_hwss +ffffffff822a1430 T get_hpo_dp_link_hwss +ffffffff822a1460 t set_hpo_dp_link_test_pattern +ffffffff822a14b0 t set_hpo_dp_lane_settings +ffffffff822a2000 T requires_fixed_vs_pe_retimer_hpo_link_hwss +ffffffff822a2040 T get_hpo_fixed_vs_pe_retimer_dp_link_hwss +ffffffff822a2070 t enable_hpo_fixed_vs_pe_retimer_dp_link_output +ffffffff822a20d0 t set_hpo_fixed_vs_pe_retimer_dp_link_test_pattern +ffffffff822a2450 t set_hpo_fixed_vs_pe_retimer_dp_lane_settings +ffffffff822a24d0 t dp_hpo_fixed_vs_pe_retimer_set_tx_ffe +ffffffff822a3000 T link_reset_cur_dp_mst_topology +ffffffff822a3060 T link_detect_connection_type +ffffffff822a3180 T link_detect +ffffffff822a4a40 T link_clear_dprx_states +ffffffff822a4a70 T link_is_hdcp14 +ffffffff822a4ad0 T link_is_hdcp22 +ffffffff822a4b40 T link_get_status +ffffffff822a4b70 T link_add_remote_sink +ffffffff822a4d10 T link_remove_remote_sink +ffffffff822a4df0 t wait_for_entering_dp_alt_mode +ffffffff822a5000 T link_blank_all_dp_displays +ffffffff822a50d0 T link_blank_dp_stream +ffffffff822a51e0 T link_blank_all_edp_displays +ffffffff822a52a0 T link_set_all_streams_dpms_off_for_link +ffffffff822a53a0 T link_get_master_pipes_with_dpms_on +ffffffff822a5560 T link_resume +ffffffff822a55a0 T link_set_dsc_on_stream +ffffffff822a5a40 T link_set_dsc_pps_packet +ffffffff822a5dd0 T link_set_dsc_enable +ffffffff822a5e70 T link_update_dsc_config +ffffffff822a5ee0 T link_calculate_sst_avg_time_slots_per_mtp +ffffffff822a5f50 T link_reduce_mst_payload +ffffffff822a6370 t update_mst_stream_alloc_table +ffffffff822a65f0 T link_increase_mst_payload +ffffffff822a6a00 T link_set_dpms_off +ffffffff822a75b0 t update_psp_stream_config +ffffffff822a77b0 t update_sst_payload +ffffffff822a7df0 t get_ext_hdmi_settings +ffffffff822a8040 t write_i2c_retimer_setting +ffffffff822a8690 t write_i2c_default_retimer_setting +ffffffff822a8b80 t write_i2c_redriver_setting +ffffffff822a8ca0 t disable_link +ffffffff822a8e10 T link_set_dpms_on +ffffffff822a9840 t enable_stream_features +ffffffff822a9900 t allocate_mst_payload +ffffffff822a9d60 t log_vcp_x_y +ffffffff822a9ee0 t write_i2c +ffffffff822a9f70 t enable_link_dp +ffffffff822ab000 T link_create_link_service +ffffffff822ab470 T link_destroy_link_service +ffffffff822ab4c0 T link_create +ffffffff822ac4e0 T link_destroy +ffffffff822ad000 T link_get_cur_link_res +ffffffff822ad150 T link_get_cur_res_map +ffffffff822ad230 T link_restore_res_map +ffffffff822ae000 T dp_link_bandwidth_kbps +ffffffff822ae0a0 T link_validate_mode_timing +ffffffff822ae680 t get_tmds_output_pixel_clock_100hz +ffffffff822ae6f0 T link_validate_dpia_bandwidth +ffffffff822af000 T link_create_ddc_service +ffffffff822af170 T link_destroy_ddc_service +ffffffff822af200 T set_ddc_transaction_type +ffffffff822af230 T link_is_in_aux_transaction_mode +ffffffff822af270 T set_dongle_type +ffffffff822af2a0 T link_get_aux_defer_delay +ffffffff822af3d0 T link_query_ddc_data +ffffffff822af780 T link_aux_transfer_raw +ffffffff822af7b0 T link_get_fixed_vs_pe_retimer_write_address +ffffffff822af840 T link_get_fixed_vs_pe_retimer_read_address +ffffffff822af8d0 T link_configure_fixed_vs_pe_retimer +ffffffff822af9a0 T link_aux_transfer_with_retries_no_mutex +ffffffff822af9b0 T link_query_fixed_vs_pe_retimer +ffffffff822afa80 T try_to_configure_aux_timeout +ffffffff822afb60 T get_ddc_pin +ffffffff822afb90 T write_scdc_data +ffffffff822afc80 T read_scdc_data +ffffffff822b0000 T is_dp_active_dongle +ffffffff822b0040 T is_dp_branch_device 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detect_edp_sink_caps +ffffffff822b2fa0 T dp_get_max_link_enc_cap +ffffffff822b3090 T dp_get_verified_link_cap +ffffffff822b30e0 T dp_get_max_link_cap +ffffffff822b32d0 T dp_verify_link_cap_with_retries +ffffffff822b37a0 T dp_is_sink_present +ffffffff822b3a20 t intersect_frl_link_bw_support +ffffffff822b4000 T dpcd_get_tunneling_device_data +ffffffff822b40d0 T dpia_query_hpd_status +ffffffff822b5000 T link_dp_dpia_set_dptx_usb4_bw_alloc_support +ffffffff822b51e0 T dpia_handle_bw_alloc_response +ffffffff822b5480 T dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff822b5760 T link_dp_dpia_allocate_usb4_bandwidth_for_stream +ffffffff822b59d0 T dpia_validate_usb4_bw +ffffffff822b5b00 t get_lowest_dpia_index +ffffffff822b6000 T dp_parse_link_loss_status +ffffffff822b6130 T dp_handle_link_loss +ffffffff822b6240 T dp_read_hpd_rx_irq_data +ffffffff822b6370 T dp_should_allow_hpd_rx_irq +ffffffff822b63c0 T dp_handle_hpd_rx_irq +ffffffff822b7000 T dpcd_write_rx_power_ctrl +ffffffff822b7050 T dp_enable_link_phy +ffffffff822b70e0 T dp_disable_link_phy +ffffffff822b71b0 T dp_set_hw_lane_settings +ffffffff822b72a0 T dp_set_drive_settings +ffffffff822b7390 T dp_set_fec_ready +ffffffff822b7510 T dp_set_fec_enable +ffffffff822b8000 T dp_log_training_result +ffffffff822b8190 T dp_initialize_scrambling_data_symbols +ffffffff822b8230 T dp_training_pattern_to_dpcd_training_pattern +ffffffff822b82b0 T dp_get_nibble_at_index +ffffffff822b8300 T dp_wait_for_training_aux_rd_interval +ffffffff822b8320 T dp_hw_to_dpcd_lane_settings +ffffffff822b8400 T get_dpcd_link_rate +ffffffff822b8470 T dp_translate_training_aux_read_interval +ffffffff822b84b0 T dp_get_cr_failure +ffffffff822b8520 T is_repeater +ffffffff822b8560 T dp_is_max_vs_reached +ffffffff822b85f0 T dp_is_cr_done +ffffffff822b86c0 T dp_is_ch_eq_done +ffffffff822b8770 T dp_is_symbol_locked +ffffffff822b8820 T dp_is_interlane_aligned +ffffffff822b8850 T dp_check_link_loss_status +ffffffff822b88f0 T dp_get_lane_status_and_lane_adjust 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dp_perform_128b_132b_link_training +ffffffff822bb3e0 T decide_128b_132b_training_settings +ffffffff822bb4e0 T dp_decide_128b_132b_lttpr_mode +ffffffff822bc000 T decide_8b_10b_training_settings +ffffffff822bc220 T dp_decide_8b_10b_lttpr_mode +ffffffff822bc2f0 T perform_8b_10b_clock_recovery_sequence +ffffffff822bc620 T perform_8b_10b_channel_equalization_sequence +ffffffff822bc8d0 T dp_perform_8b_10b_link_training +ffffffff822bd000 T dp_perform_link_training_skip_aux +ffffffff822be000 T dpia_perform_link_training +ffffffff822bef20 t dpia_training_end +ffffffff822c0000 T dp_fixed_vs_pe_read_lane_adjust +ffffffff822c0140 T dp_fixed_vs_pe_set_retimer_lane_settings +ffffffff822c02a0 T dp_perform_fixed_vs_pe_training_sequence_legacy +ffffffff822c0a10 t perform_fixed_vs_pe_nontransparent_training_sequence +ffffffff822c0bd0 T dp_perform_fixed_vs_pe_training_sequence +ffffffff822c2000 T core_link_read_dpcd +ffffffff822c21a0 T core_link_write_dpcd +ffffffff822c3000 T dp_set_panel_mode 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virtual_link_encoder_disable_output +ffffffff822c61b0 t virtual_link_encoder_dp_set_lane_settings +ffffffff822c61e0 t virtual_link_encoder_dp_set_phy_pattern +ffffffff822c6210 t virtual_link_encoder_update_mst_stream_allocation_table +ffffffff822c6240 t virtual_link_encoder_connect_dig_be_to_fe +ffffffff822c6270 t virtual_link_encoder_destroy +ffffffff822c62c0 t virtual_link_encoder_get_max_link_cap +ffffffff822c7000 T virtual_setup_stream_encoder +ffffffff822c7030 T virtual_setup_stream_attribute +ffffffff822c7060 T virtual_reset_stream_encoder +ffffffff822c7090 T get_virtual_link_hwss +ffffffff822c70c0 t virtual_disable_link_output +ffffffff822c8000 T virtual_stream_encoder_construct +ffffffff822c8050 T virtual_stream_encoder_create +ffffffff822c8110 t virtual_stream_encoder_dp_set_stream_attribute +ffffffff822c8140 t virtual_stream_encoder_hdmi_set_stream_attribute +ffffffff822c8170 t virtual_stream_encoder_dvi_set_stream_attribute +ffffffff822c81a0 t virtual_stream_encoder_set_throttled_vcp_size +ffffffff822c81d0 t virtual_stream_encoder_update_hdmi_info_packets +ffffffff822c8200 t virtual_stream_encoder_stop_hdmi_info_packets +ffffffff822c8230 t virtual_stream_encoder_update_dp_info_packets +ffffffff822c8260 t virtual_stream_encoder_stop_dp_info_packets +ffffffff822c8290 t virtual_stream_encoder_dp_blank +ffffffff822c82c0 t virtual_stream_encoder_dp_unblank +ffffffff822c82f0 t virtual_audio_mute_control +ffffffff822c8320 t virtual_setup_stereo_sync +ffffffff822c8350 t virtual_stream_encoder_set_avmute +ffffffff822c8380 t virtual_dig_connect_to_otg +ffffffff822c83b0 t virtual_stream_encoder_reset_hdmi_stream_attribute +ffffffff822c83e0 t virtual_stream_encoder_set_dsc_pps_info_packet +ffffffff822c8410 t virtual_enc_dp_set_odm_combine +ffffffff822c9000 T dmub_dcn20_use_cached_inbox +ffffffff822c9040 T dmub_dcn20_reset +ffffffff822c9210 T dmub_dcn20_reset_release +ffffffff822c92e0 T dmub_dcn20_backdoor_load +ffffffff822c9590 T dmub_dcn20_setup_windows +ffffffff822c9af0 T dmub_dcn20_setup_mailbox +ffffffff822c9b50 T dmub_dcn20_get_inbox1_wptr +ffffffff822c9b80 T dmub_dcn20_get_inbox1_rptr +ffffffff822c9bb0 T dmub_dcn20_set_inbox1_wptr +ffffffff822c9be0 T dmub_dcn20_setup_out_mailbox +ffffffff822c9c40 T dmub_dcn20_get_outbox1_wptr +ffffffff822c9c70 T dmub_dcn20_set_outbox1_rptr +ffffffff822c9ca0 T dmub_dcn20_setup_outbox0 +ffffffff822c9cf0 T dmub_dcn20_get_outbox0_wptr +ffffffff822c9d20 T dmub_dcn20_set_outbox0_rptr +ffffffff822c9d50 T dmub_dcn20_is_hw_init +ffffffff822c9db0 T dmub_dcn20_is_supported +ffffffff822c9e10 T dmub_dcn20_set_gpint +ffffffff822c9e40 T dmub_dcn20_is_gpint_acked +ffffffff822c9ea0 T dmub_dcn20_get_gpint_response +ffffffff822c9ed0 T dmub_dcn20_get_fw_boot_status +ffffffff822c9f00 T dmub_dcn20_enable_dmub_boot_options +ffffffff822c9f30 T dmub_dcn20_skip_dmub_panel_power_sequence +ffffffff822c9f90 T dmub_dcn20_get_current_time +ffffffff822c9fc0 T dmub_dcn20_get_diagnostic_data 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dmub_dcn31_get_fw_boot_option +ffffffff822ccdf0 T dmub_dcn31_enable_dmub_boot_options +ffffffff822cce70 T dmub_dcn31_skip_dmub_panel_power_sequence +ffffffff822cced0 T dmub_dcn31_setup_outbox0 +ffffffff822ccf20 T dmub_dcn31_get_outbox0_wptr +ffffffff822ccf50 T dmub_dcn31_set_outbox0_rptr +ffffffff822ccf80 T dmub_dcn31_get_current_time +ffffffff822ccfb0 T dmub_dcn31_get_diagnostic_data +ffffffff822cd460 T dmub_dcn31_should_detect +ffffffff822ce000 T dmub_dcn314_is_psrsu_supported +ffffffff822cf000 T dmub_dcn32_reset +ffffffff822cf200 T dmub_dcn32_reset_release +ffffffff822cf2d0 T dmub_dcn32_backdoor_load +ffffffff822cf540 T dmub_dcn32_backdoor_load_zfb_mode +ffffffff822cf730 T dmub_dcn32_setup_windows +ffffffff822cfa80 T dmub_dcn32_setup_mailbox +ffffffff822cfad0 T dmub_dcn32_get_inbox1_wptr +ffffffff822cfb00 T dmub_dcn32_get_inbox1_rptr +ffffffff822cfb30 T dmub_dcn32_set_inbox1_wptr +ffffffff822cfb60 T dmub_dcn32_setup_out_mailbox +ffffffff822cfbb0 T dmub_dcn32_get_outbox1_wptr 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mod_hdcp_write_content_type +ffffffff822e7530 T mod_hdcp_clear_cp_irq_status +ffffffff822e8000 T mod_hdcp_dump_binary_message +ffffffff822e80e0 T mod_hdcp_log_ddc_trace +ffffffff822e9080 T mod_hdcp_status_to_str +ffffffff822e90c0 T mod_hdcp_state_id_to_str +ffffffff822ea000 T mod_hdcp_remove_display_from_topology +ffffffff822ea200 t remove_display_from_topology_v2 +ffffffff822ea3b0 T mod_hdcp_add_display_to_topology +ffffffff822ea570 t add_display_to_topology_v2 +ffffffff822ea6d0 T mod_hdcp_hdcp1_create_session +ffffffff822ea850 T mod_hdcp_hdcp1_destroy_session +ffffffff822eaac0 T mod_hdcp_hdcp1_validate_rx +ffffffff822eabe0 T mod_hdcp_hdcp1_enable_encryption +ffffffff822ead40 T mod_hdcp_hdcp1_validate_ksvlist_vp +ffffffff822eae70 T mod_hdcp_hdcp1_enable_dp_stream_encryption +ffffffff822eafb0 T mod_hdcp_hdcp1_link_maintenance +ffffffff822eb070 T mod_hdcp_hdcp2_create_session +ffffffff822eb1e0 T mod_hdcp_hdcp2_destroy_session +ffffffff822eb450 T mod_hdcp_hdcp2_prepare_ake_init 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amdgpu_dpm_switch_power_profile +ffffffff822f18f0 T amdgpu_dpm_set_xgmi_pstate +ffffffff822f1990 T amdgpu_dpm_set_df_cstate +ffffffff822f1a30 T amdgpu_dpm_allow_xgmi_power_down +ffffffff822f1ab0 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff822f1b40 T amdgpu_dpm_set_clockgating_by_smu +ffffffff822f1be0 T amdgpu_dpm_smu_i2c_bus_access +ffffffff822f1c80 T amdgpu_pm_acpi_event_handler +ffffffff822f1d40 T amdgpu_dpm_read_sensor +ffffffff822f1e00 T amdgpu_dpm_get_apu_thermal_limit +ffffffff822f1ea0 T amdgpu_dpm_set_apu_thermal_limit +ffffffff822f1f40 T amdgpu_dpm_compute_clocks +ffffffff822f2040 T amdgpu_dpm_enable_uvd +ffffffff822f2230 T amdgpu_dpm_enable_vce +ffffffff822f2420 T amdgpu_dpm_enable_jpeg +ffffffff822f2520 T amdgpu_pm_load_smu_firmware +ffffffff822f25d0 T amdgpu_dpm_handle_passthrough_sbr +ffffffff822f2650 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff822f26d0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff822f2750 T amdgpu_dpm_get_dpm_freq_range +ffffffff822f27f0 T amdgpu_dpm_set_soft_freq_range +ffffffff822f2890 T amdgpu_dpm_write_watermarks_table +ffffffff822f2910 T amdgpu_dpm_wait_for_event +ffffffff822f29a0 T amdgpu_dpm_set_residency_gfxoff +ffffffff822f2a20 T amdgpu_dpm_get_residency_gfxoff +ffffffff822f2aa0 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff822f2b20 T amdgpu_dpm_get_status_gfxoff +ffffffff822f2ba0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff822f2bf0 T amdgpu_dpm_gfx_state_change +ffffffff822f2c60 T amdgpu_dpm_get_ecc_info +ffffffff822f2ce0 T amdgpu_dpm_get_vce_clock_state +ffffffff822f2d70 T amdgpu_dpm_get_current_power_state +ffffffff822f2de0 T amdgpu_dpm_set_power_state +ffffffff822f2f40 T amdgpu_dpm_dispatch_task +ffffffff822f2fe0 T amdgpu_dpm_get_performance_level +ffffffff822f3070 T amdgpu_dpm_force_performance_level +ffffffff822f3250 T amdgpu_dpm_get_pp_num_states +ffffffff822f32e0 T amdgpu_dpm_get_pp_table +ffffffff822f3370 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff822f3410 T amdgpu_dpm_odn_edit_dpm_table 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amdgpu_dpm_is_cclk_dpm_supported +ffffffff822f4260 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff822f42f0 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff822f4390 T amdgpu_dpm_is_overdrive_supported +ffffffff822f4400 T amdgpu_dpm_set_pp_table +ffffffff822f44a0 T amdgpu_dpm_get_num_cpu_cores +ffffffff822f44f0 T amdgpu_dpm_stb_debug_fs_init +ffffffff822f4540 T amdgpu_dpm_display_configuration_change +ffffffff822f45d0 T amdgpu_dpm_get_clock_by_type +ffffffff822f4670 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff822f4700 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff822f47a0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff822f4840 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff822f48d0 T amdgpu_dpm_display_clock_voltage_request +ffffffff822f4960 T amdgpu_dpm_get_current_clocks +ffffffff822f49f0 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff822f4a70 T amdgpu_dpm_set_active_display_count +ffffffff822f4b00 T amdgpu_dpm_set_min_deep_sleep_dcefclk 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pp_set_hard_min_dcefclk_by_freq +ffffffff822fad50 t pp_set_hard_min_fclk_by_freq +ffffffff822fadb0 t pp_set_min_deep_sleep_dcefclk +ffffffff822fae10 t pp_get_asic_baco_capability +ffffffff822fae80 t pp_get_asic_baco_state +ffffffff822faee0 t pp_set_asic_baco_state +ffffffff822faf50 t pp_get_ppfeature_status +ffffffff822fafb0 t pp_set_ppfeature_status +ffffffff822fb000 t pp_asic_reset_mode_2 +ffffffff822fb060 t pp_set_df_cstate +ffffffff822fb0c0 t pp_set_xgmi_pstate +ffffffff822fb120 t pp_get_gpu_metrics +ffffffff822fb180 t pp_get_prv_buffer_details +ffffffff822fb200 t pp_pm_compute_clocks +ffffffff822fb2c0 t pp_swctf_delayed_work_handler +ffffffff822fb400 t __delayed_work_tick +ffffffff822fc000 T ci_baco_set_state +ffffffff822fd000 T baco_program_registers +ffffffff822fd0d0 t baco_cmd_handler +ffffffff822fd250 T soc15_baco_program_registers +ffffffff822fe000 T fiji_baco_set_state +ffffffff822ff000 T phm_setup_asic +ffffffff822ff050 T phm_power_down_asic +ffffffff822ff0a0 T phm_set_power_state +ffffffff822ff110 T phm_enable_dynamic_state_management +ffffffff822ff1c0 T phm_disable_dynamic_state_management +ffffffff822ff260 T phm_force_dpm_levels +ffffffff822ff2b0 T phm_apply_state_adjust_rules +ffffffff822ff300 T phm_apply_clock_adjust_rules +ffffffff822ff350 T phm_powerdown_uvd +ffffffff822ff3a0 T phm_disable_clock_power_gatings +ffffffff822ff3f0 T phm_pre_display_configuration_changed +ffffffff822ff450 T phm_display_configuration_changed +ffffffff822ff4b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff822ff510 T phm_stop_thermal_controller +ffffffff822ff570 T phm_register_irq_handlers +ffffffff822ff5c0 T phm_start_thermal_controller +ffffffff822ff710 T phm_check_smc_update_required_for_display_configuration +ffffffff822ff770 T phm_check_states_equal +ffffffff822ff7c0 T phm_store_dal_configuration_data +ffffffff822ff910 T phm_get_dal_power_level +ffffffff822ff970 T phm_set_cpu_power_state +ffffffff822ff9c0 T phm_get_performance_level +ffffffff822ffa20 T phm_get_clock_info +ffffffff822ffb90 T phm_get_current_shallow_sleep_clocks +ffffffff822ffbe0 T phm_get_clock_by_type +ffffffff822ffc30 T phm_get_clock_by_type_with_latency +ffffffff822ffc80 T phm_get_clock_by_type_with_voltage +ffffffff822ffcd0 T phm_set_watermarks_for_clocks_ranges +ffffffff822ffd20 T phm_display_clock_voltage_request +ffffffff822ffd70 T phm_get_max_high_clocks +ffffffff822ffdc0 T phm_disable_smc_firmware_ctf +ffffffff822ffe20 T phm_set_active_display_count +ffffffff82300000 T hwmgr_early_init +ffffffff82300460 t polaris_set_asic_special_caps +ffffffff823004e0 T hwmgr_sw_init +ffffffff82300550 T hwmgr_sw_fini +ffffffff823005a0 T hwmgr_hw_init +ffffffff82300760 T hwmgr_hw_fini +ffffffff82300820 T hwmgr_suspend +ffffffff823008a0 T hwmgr_resume +ffffffff82300940 T hwmgr_handle_task +ffffffff82301000 T polaris_baco_set_state +ffffffff82302000 T pp_override_get_default_fuse_value +ffffffff82303000 T psm_init_power_state_table +ffffffff823032a0 T psm_fini_power_state_table +ffffffff82303360 T psm_set_boot_states +ffffffff82303410 T psm_set_performance_states +ffffffff823034c0 T psm_set_user_performance_state +ffffffff82303550 T psm_adjust_power_state_dynamic +ffffffff82304000 T atomctrl_initialize_mc_reg_table +ffffffff82304210 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff82304420 T atomctrl_set_engine_dram_timings_rv770 +ffffffff82304490 T atomctrl_get_memory_pll_dividers_si +ffffffff82304570 T atomctrl_get_memory_pll_dividers_vi +ffffffff823045f0 T atomctrl_get_memory_pll_dividers_ai +ffffffff823046a0 T atomctrl_get_engine_pll_dividers_kong +ffffffff82304720 T atomctrl_get_engine_pll_dividers_vi +ffffffff823047f0 T atomctrl_get_engine_pll_dividers_ai +ffffffff823048d0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff82304990 T atomctrl_get_reference_clock +ffffffff823049f0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff82304ab0 T atomctrl_get_voltage_table_v3 +ffffffff82304c10 T atomctrl_get_pp_assign_pin +ffffffff82304cf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff823050c0 t GetScaledFraction +ffffffff82305150 t fDecodeLeakageID +ffffffff823051b0 t fSqrt +ffffffff82305230 T atomctrl_get_voltage_evv_on_sclk +ffffffff823052b0 T atomctrl_get_voltage_evv +ffffffff82305360 T atomctrl_get_mpll_reference_clock +ffffffff823053d0 T atomctrl_is_asic_internal_ss_supported +ffffffff82305420 T atomctrl_get_memory_clock_spread_spectrum +ffffffff82305520 T atomctrl_get_engine_clock_spread_spectrum +ffffffff82305620 T atomctrl_read_efuse +ffffffff823056d0 T atomctrl_set_ac_timing_ai +ffffffff82305730 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff823057b0 T atomctrl_get_smc_sclk_range_table +ffffffff82305860 T atomctrl_get_vddc_shared_railinfo +ffffffff823058d0 T atomctrl_get_avfs_information +ffffffff82305a60 T atomctrl_get_svi2_info +ffffffff82305b40 T atomctrl_get_leakage_id_from_efuse +ffffffff82305ba0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff82305d40 T atomctrl_get_voltage_range +ffffffff82305e00 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff82305e80 T atomctrl_get_edc_leakage_table +ffffffff82306000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff823060c0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff82306280 T pp_atomfwctrl_get_pp_assign_pin +ffffffff82306360 T pp_atomfwctrl_enter_self_refresh +ffffffff82306390 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff82306440 T pp_atomfwctrl_get_avfs_information +ffffffff82306780 T pp_atomfwctrl_get_gpio_information +ffffffff82306820 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff823068b0 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff82306c30 T pp_atomfwctrl_get_smc_dpm_information +ffffffff82307000 T encode_pcie_lane_width +ffffffff82307030 T decode_pcie_lane_width +ffffffff82308000 t pp_tables_v1_0_initialize +ffffffff82309450 t pp_tables_v1_0_uninitialize +ffffffff82309600 T get_number_of_powerplay_table_entries_v1_0 +ffffffff823096b0 T get_powerplay_table_entry_v1_0 +ffffffff8230a000 T pp_tables_get_response_times +ffffffff8230a0d0 T pp_tables_get_num_of_entries +ffffffff8230a190 T pp_tables_get_entry +ffffffff8230a4a0 t init_non_clock_fields +ffffffff8230a5e0 t pp_tables_initialize +ffffffff8230b760 t pp_tables_uninitialize +ffffffff8230b960 t get_number_of_vce_state_table_entries +ffffffff8230ba50 t get_vce_state_table_entry +ffffffff8230c000 T smu10_init_function_pointers +ffffffff8230c040 t smu10_hwmgr_backend_init +ffffffff8230c6e0 t smu10_hwmgr_backend_fini +ffffffff8230c820 t smu10_setup_asic_task +ffffffff8230c890 t smu10_get_power_state_size +ffffffff8230c8c0 t smu10_apply_state_adjust_rules +ffffffff8230c8f0 t smu10_dpm_force_dpm_level +ffffffff8230ce70 t smu10_enable_dpm_tasks +ffffffff8230cf30 t smu10_disable_dpm_tasks +ffffffff8230cf60 t smu10_dpm_patch_boot_state +ffffffff8230cf90 t smu10_dpm_get_pp_table_entry +ffffffff8230cff0 t smu10_dpm_get_num_of_pp_table_entries +ffffffff8230d040 t smu10_powergate_vcn +ffffffff8230d0e0 t smu10_dpm_get_mclk +ffffffff8230d140 t smu10_dpm_get_sclk +ffffffff8230d190 t smu10_set_power_state_tasks +ffffffff8230d200 t smu10_set_cpu_power_state +ffffffff8230d230 t smu10_store_cc6_data +ffffffff8230d2a0 t smu10_get_dal_power_level +ffffffff8230d2d0 t smu10_get_performance_level +ffffffff8230d370 t smu10_get_current_shallow_sleep_clocks +ffffffff8230d3d0 t smu10_get_clock_by_type_with_latency +ffffffff8230d520 t smu10_get_clock_by_type_with_voltage +ffffffff8230d630 t smu10_set_watermarks_for_clocks_ranges +ffffffff8230d700 t smu10_display_clock_voltage_request +ffffffff8230d7a0 t smu10_get_max_high_clocks +ffffffff8230d7d0 t smu10_power_off_asic +ffffffff8230d820 t smu10_force_clock_level +ffffffff8230d9e0 t smu10_print_clock_levels +ffffffff8230ddd0 t smu10_gfx_off_control +ffffffff8230dee0 t smu10_read_sensor +ffffffff8230e070 t smu10_set_active_display_count +ffffffff8230e0d0 t smu10_set_min_deep_sleep_dcefclk +ffffffff8230e130 t smu10_get_power_profile_mode +ffffffff8230e170 t smu10_set_power_profile_mode +ffffffff8230e2a0 t smu10_set_fine_grain_clk_vol +ffffffff8230e4b0 t smu10_powergate_mmhub +ffffffff8230e4d0 t smu10_smus_notify_pwe +ffffffff8230e4f0 t smu10_powergate_sdma +ffffffff8230e510 t smu10_set_hard_min_dcefclk_by_freq +ffffffff8230e570 t smu10_set_hard_min_fclk_by_freq +ffffffff8230e5d0 t smu10_set_hard_min_gfxclk_by_freq +ffffffff8230e630 t smu10_set_soft_max_gfxclk_by_freq +ffffffff8230e690 t smu10_asic_reset +ffffffff8230e6b0 t smu10_gfx_state_change +ffffffff8230e6f0 t smu10_dpm_get_pp_table_entry_callback +ffffffff8230f000 T smu7_baco_get_capability +ffffffff8230f060 T smu7_baco_get_state +ffffffff8230f0b0 T smu7_baco_set_state +ffffffff82310000 T smu7_powerdown_uvd +ffffffff82310050 T smu7_disable_clock_power_gating +ffffffff823100e0 T smu7_powergate_uvd +ffffffff823101d0 T smu7_powergate_vce +ffffffff823102c0 T smu7_update_clock_gatings +ffffffff82310670 T smu7_powergate_gfx +ffffffff82311000 T smu7_get_sleep_divider_id_from_clock +ffffffff823110a0 T smu7_init_function_pointers +ffffffff82311100 t smu7_hwmgr_backend_init +ffffffff82312f80 t smu7_hwmgr_backend_fini +ffffffff82312ff0 t smu7_setup_asic_task +ffffffff82313360 t smu7_get_power_state_size +ffffffff82313390 t smu7_apply_state_adjust_rules +ffffffff82313830 t smu7_force_dpm_level +ffffffff82313d40 t smu7_enable_dpm_tasks +ffffffff823165d0 t smu7_disable_dpm_tasks +ffffffff82316c10 t smu7_dpm_patch_boot_state +ffffffff82316d50 t smu7_get_pp_table_entry +ffffffff82317150 t smu7_get_number_of_powerplay_table_entries +ffffffff823171c0 t smu7_dpm_get_mclk +ffffffff82317260 t smu7_dpm_get_sclk +ffffffff82317300 t smu7_set_power_state_tasks +ffffffff82318020 t smu7_notify_smc_display_config_after_ps_adjustment +ffffffff82318050 t smu7_display_configuration_changed_task +ffffffff82318210 t smu7_set_max_fan_rpm_output +ffffffff82318240 t smu7_set_max_fan_pwm_output +ffffffff82318260 t smu7_set_fan_control_mode +ffffffff823182f0 t smu7_get_fan_control_mode +ffffffff82318330 t smu7_register_irq_handlers +ffffffff823183e0 t smu7_check_smc_update_required_for_display_configuration +ffffffff82318490 t smu7_check_states_equal +ffffffff82318630 t smu7_get_performance_level +ffffffff823186c0 t smu7_get_clock_by_type +ffffffff82318880 t smu7_get_clock_by_type_with_latency +ffffffff82318a50 t smu7_set_watermarks_for_clocks_ranges +ffffffff82318c70 t smu7_get_max_high_clocks +ffffffff82318cf0 t smu7_power_off_asic +ffffffff82318d50 t smu7_force_clock_level +ffffffff82318e60 t smu7_print_clock_levels +ffffffff82319450 t smu7_get_sclk_od +ffffffff823194b0 t smu7_set_sclk_od +ffffffff82319570 t smu7_get_mclk_od +ffffffff823195d0 t smu7_set_mclk_od +ffffffff82319690 t smu7_read_sensor +ffffffff823198d0 t smu7_avfs_control +ffffffff823199a0 t smu7_notify_cac_buffer_info +ffffffff82319b40 t smu7_get_thermal_temperature_range +ffffffff82319be0 t smu7_get_power_profile_mode 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+ffffffff8231d080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff8231d150 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff8231d200 T smu7_fan_ctrl_set_static_mode +ffffffff8231d330 T smu7_fan_ctrl_set_default_mode +ffffffff8231d410 T smu7_fan_ctrl_start_smc_fan_control +ffffffff8231d540 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff8231d560 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff8231d740 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff8231d930 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff8231db10 T smu7_thermal_get_temperature +ffffffff8231db70 T smu7_thermal_disable_alert +ffffffff8231dc10 T smu7_thermal_stop_thermal_controller +ffffffff8231dd90 T smu7_start_thermal_controller +ffffffff8231e120 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff8231f000 T smu8_init_function_pointers +ffffffff8231f040 t smu8_hwmgr_backend_init +ffffffff8231f520 t smu8_hwmgr_backend_fini +ffffffff8231f5a0 t smu8_setup_asic_task +ffffffff8231fac0 t smu8_get_power_state_size +ffffffff8231faf0 t smu8_apply_state_adjust_rules +ffffffff8231fc40 t smu8_dpm_force_dpm_level +ffffffff8231ff20 t smu8_enable_dpm_tasks +ffffffff823200b0 t smu8_disable_dpm_tasks +ffffffff82320190 t smu8_dpm_patch_boot_state +ffffffff823201f0 t smu8_dpm_get_pp_table_entry +ffffffff82320250 t smu8_dpm_get_num_of_pp_table_entries +ffffffff823202a0 t smu8_dpm_powerdown_uvd +ffffffff823202f0 t smu8_dpm_powergate_vce +ffffffff823204c0 t smu8_dpm_powergate_uvd +ffffffff823206d0 t smu8_dpm_powergate_acp +ffffffff82320730 t smu8_dpm_get_mclk +ffffffff82320760 t smu8_dpm_get_sclk +ffffffff823207d0 t smu8_set_power_state_tasks +ffffffff82320ad0 t smu8_set_cpu_power_state +ffffffff82320b50 t smu8_store_cc6_data +ffffffff82320bd0 t smu8_get_dal_power_level +ffffffff82320c50 t smu8_get_performance_level +ffffffff82320d50 t smu8_get_current_shallow_sleep_clocks +ffffffff82320db0 t smu8_get_clock_by_type +ffffffff82320ef0 t smu8_get_max_high_clocks +ffffffff82320fb0 t smu8_power_off_asic +ffffffff82321030 t smu8_force_clock_level +ffffffff823210a0 t smu8_print_clock_levels +ffffffff82321280 t smu8_read_sensor +ffffffff82321590 t smu8_notify_cac_buffer_info +ffffffff82321640 t smu8_get_thermal_temperature_range +ffffffff823216c0 t smu8_dpm_get_pp_table_entry_callback +ffffffff82322000 T smu9_baco_get_capability +ffffffff823220e0 T smu9_baco_get_state +ffffffff82323000 T convert_to_vid +ffffffff82323050 T convert_to_vddc +ffffffff82323090 T phm_copy_clock_limits_array +ffffffff82323170 T phm_copy_overdrive_settings_limits_array +ffffffff82323250 T phm_set_field_to_u32 +ffffffff823232b0 T phm_wait_on_register +ffffffff823233a0 T phm_wait_on_indirect_register +ffffffff823234b0 T phm_wait_for_register_unequal +ffffffff82323580 T phm_wait_for_indirect_register_unequal +ffffffff82323680 T phm_cf_want_uvd_power_gating +ffffffff823236c0 T phm_cf_want_vce_power_gating +ffffffff82323700 T phm_trim_voltage_table +ffffffff82323820 T phm_get_svi2_mvdd_voltage_table +ffffffff823239a0 T phm_get_svi2_vddci_voltage_table +ffffffff82323b20 T phm_get_svi2_vdd_voltage_table +ffffffff82323bc0 T phm_trim_voltage_table_to_fit_state_table +ffffffff82323cb0 T phm_reset_single_dpm_table +ffffffff82323d10 T phm_setup_pcie_table_entry +ffffffff82323d50 T phm_get_dpm_level_enable_mask_value +ffffffff82323e30 T phm_get_voltage_index +ffffffff82323eb0 T phm_get_voltage_id +ffffffff82323f30 T phm_find_closest_vddci +ffffffff82323fa0 T phm_find_boot_level +ffffffff82324010 T phm_get_sclk_for_voltage_evv +ffffffff823240d0 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff823241e0 T phm_get_lowest_enabled_level +ffffffff82324220 T phm_apply_dal_min_voltage_request +ffffffff823242f0 T phm_get_voltage_evv_on_sclk +ffffffff823243a0 T phm_irq_process +ffffffff82324540 T smu9_register_irq_handlers +ffffffff823245f0 T smu_atom_get_data_table +ffffffff82324660 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff82324760 T smu_set_watermarks_for_clocks_ranges +ffffffff82325000 T tonga_baco_set_state +ffffffff82326000 T vega10_baco_set_state +ffffffff82327000 T vega10_enable_disable_vce_dpm +ffffffff82327090 T vega10_hwmgr_init +ffffffff823270f0 t vega10_hwmgr_backend_init +ffffffff82327ef0 t vega10_hwmgr_backend_fini +ffffffff82327f60 t vega10_setup_asic_task +ffffffff82328090 t vega10_get_power_state_size +ffffffff823280c0 t vega10_apply_state_adjust_rules +ffffffff82328420 t vega10_dpm_force_dpm_level +ffffffff82328880 t vega10_enable_dpm_tasks +ffffffff8232b650 t vega10_disable_dpm_tasks +ffffffff8232bc30 t vega10_patch_boot_state +ffffffff8232bc60 t vega10_get_pp_table_entry +ffffffff8232bcd0 t vega10_power_gate_vce +ffffffff8232bd70 t vega10_power_gate_uvd +ffffffff8232be10 t vega10_dpm_get_mclk +ffffffff8232beb0 t vega10_dpm_get_sclk +ffffffff8232bf50 t vega10_set_power_state_tasks +ffffffff8232c8b0 t vega10_notify_smc_display_config_after_ps_adjustment +ffffffff8232ca60 t vega10_display_configuration_changed_task +ffffffff8232cb30 t vega10_set_fan_control_mode +ffffffff8232cba0 t vega10_get_fan_control_mode +ffffffff8232cbe0 t vega10_check_smc_update_required_for_display_configuration +ffffffff8232cc40 t vega10_check_states_equal +ffffffff8232cda0 t vega10_get_dal_power_level +ffffffff8232cde0 t vega10_get_performance_level +ffffffff8232ce70 t vega10_get_clock_by_type_with_latency +ffffffff8232d060 t vega10_get_clock_by_type_with_voltage +ffffffff8232d140 t vega10_set_watermarks_for_clocks_ranges +ffffffff8232d1a0 t vega10_display_clock_voltage_request +ffffffff8232d220 t vega10_power_off_asic +ffffffff8232d290 t vega10_force_clock_level +ffffffff8232d3c0 t vega10_emit_clock_levels +ffffffff8232d530 t vega10_print_clock_levels +ffffffff8232dcd0 t vega10_get_sclk_od +ffffffff8232dd40 t vega10_set_sclk_od +ffffffff8232de40 t vega10_get_mclk_od +ffffffff8232deb0 t vega10_set_mclk_od +ffffffff8232dfa0 t vega10_read_sensor +ffffffff8232e200 t vega10_avfs_enable +ffffffff8232e2c0 t vega10_notify_cac_buffer_info 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T smu_send_hbm_bad_channel_flag +ffffffff823731e0 t smu_set_fan_control_mode +ffffffff823732a0 t smu_get_fan_control_mode +ffffffff82373320 t smu_set_fan_speed_pwm +ffffffff823733d0 t smu_get_fan_speed_pwm +ffffffff82373430 t smu_force_ppclk_levels +ffffffff823734f0 t smu_print_ppclk_levels +ffffffff82373560 t smu_emit_ppclk_levels +ffffffff823735d0 t smu_force_performance_level +ffffffff82373870 t smu_read_sensor +ffffffff82373ab0 t smu_get_apu_thermal_limit +ffffffff82373b00 t smu_set_apu_thermal_limit +ffffffff82373b50 t smu_get_performance_level +ffffffff82373bc0 t smu_get_current_power_state +ffffffff82373c20 t smu_get_fan_speed_rpm +ffffffff82373c80 t smu_set_fan_speed_rpm +ffffffff82373d30 t smu_get_power_num_states +ffffffff82373db0 t smu_sys_get_pp_table +ffffffff82373e20 t smu_sys_set_pp_table +ffffffff82374010 t smu_switch_power_profile +ffffffff82374120 t smu_handle_dpm_task +ffffffff823741d0 t smu_load_microcode +ffffffff823742b0 t smu_dpm_set_power_gate +ffffffff82374620 t smu_set_power_limit +ffffffff82374750 t smu_get_power_profile_mode +ffffffff823747b0 t smu_set_power_profile_mode +ffffffff82374810 t smu_od_edit_dpm_table +ffffffff82374870 t smu_set_mp1_state +ffffffff823748d0 t smu_gfx_state_change_set +ffffffff82374910 t smu_get_sclk +ffffffff82374990 t smu_get_mclk +ffffffff82374a10 t smu_display_configuration_change +ffffffff82374aa0 t smu_get_clock_by_type_with_latency +ffffffff82374b50 t smu_display_clock_voltage_request +ffffffff82374bb0 t smu_enable_mgpu_fan_boost +ffffffff82374c10 t smu_set_display_count +ffffffff82374c80 t smu_set_deep_sleep_dcefclk +ffffffff82374cf0 t smu_get_baco_capability +ffffffff82374d50 t smu_baco_set_state +ffffffff82374e30 t smu_sys_get_pp_feature_mask +ffffffff82374ea0 t smu_sys_set_pp_feature_mask +ffffffff82374f10 t smu_mode2_reset +ffffffff82374fb0 t smu_enable_gfx_features +ffffffff82375050 t smu_set_df_cstate +ffffffff82375100 t smu_set_xgmi_pstate +ffffffff823751b0 t smu_sys_get_gpu_metrics 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arcturus_get_allowed_feature_mask +ffffffff82377150 t arcturus_set_default_dpm_table +ffffffff82377360 t arcturus_populate_umd_state_clk +ffffffff82377420 t arcturus_print_clk_levels +ffffffff82377660 t arcturus_force_clk_levels +ffffffff823778b0 t arcturus_get_power_profile_mode +ffffffff82377b40 t arcturus_set_power_profile_mode +ffffffff82377e30 t arcturus_dpm_set_vcn_enable +ffffffff82377f00 t arcturus_read_sensor +ffffffff823780e0 t arcturus_is_dpm_running +ffffffff82378130 t arcturus_get_fan_speed_pwm +ffffffff82378270 t arcturus_get_fan_speed_rpm +ffffffff82378380 t arcturus_get_thermal_temperature_range +ffffffff82378470 t arcturus_set_performance_level +ffffffff82378580 t arcturus_dump_pptable +ffffffff823785b0 t arcturus_get_power_limit +ffffffff823786b0 t arcturus_set_df_cstate +ffffffff823787c0 t arcturus_allow_xgmi_power_down +ffffffff823788b0 t arcturus_i2c_control_init +ffffffff823789e0 t arcturus_i2c_control_fini +ffffffff82378a20 t arcturus_get_unique_id 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cyan_skillfish_get_dpm_ultimate_freq +ffffffff8237b890 t cyan_skillfish_get_gpu_metrics +ffffffff8237bb30 t cyan_skillfish_get_smu_metrics_data +ffffffff8237c000 T navi10_set_ppt_funcs +ffffffff8237c050 t navi10_run_btc +ffffffff8237c0d0 t navi10_get_allowed_feature_mask +ffffffff8237c3a0 t navi10_set_default_dpm_table +ffffffff8237c810 t navi10_populate_umd_state_clk +ffffffff8237c9d0 t navi10_print_clk_levels +ffffffff8237cb60 t navi10_emit_clk_levels +ffffffff8237cd80 t navi10_force_clk_levels +ffffffff8237ceb0 t navi10_od_edit_dpm_table +ffffffff8237d460 t navi10_get_clock_by_type_with_latency +ffffffff8237d560 t navi10_get_power_profile_mode +ffffffff8237d7c0 t navi10_set_power_profile_mode +ffffffff8237da90 t navi10_dpm_set_vcn_enable +ffffffff8237db20 t navi10_dpm_set_jpeg_enable +ffffffff8237dba0 t navi10_read_sensor +ffffffff8237dd20 t navi10_pre_display_config_changed +ffffffff8237ddc0 t navi10_display_config_changed +ffffffff8237de40 t navi10_notify_smc_display_config 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navi1x_get_smu_metrics_data +ffffffff82380560 t navi10_od_setting_check_range +ffffffff82380610 t navi10_i2c_xfer +ffffffff823808b0 t navi10_i2c_func +ffffffff823808e0 t navi10_umc_hybrid_cdr_workaround +ffffffff82381000 T sienna_cichlid_set_ppt_funcs +ffffffff82381050 t sienna_cichlid_run_btc +ffffffff823810d0 t sienna_cichlid_get_allowed_feature_mask +ffffffff82381350 t sienna_cichlid_set_default_dpm_table +ffffffff82381930 t sienna_cichlid_populate_umd_state_clk +ffffffff823819f0 t sienna_cichlid_print_clk_levels +ffffffff82381bc0 t sienna_cichlid_force_clk_levels +ffffffff82381cf0 t sienna_cichlid_od_edit_dpm_table +ffffffff82382270 t sienna_cichlid_restore_user_od_settings +ffffffff82382300 t sienna_cichlid_get_power_profile_mode +ffffffff82382560 t sienna_cichlid_set_power_profile_mode +ffffffff82382830 t sienna_cichlid_dpm_set_vcn_enable +ffffffff823828f0 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff82382970 t sienna_cichlid_read_sensor +ffffffff82383170 t sienna_cichlid_pre_display_config_changed +ffffffff823831a0 t sienna_cichlid_display_config_changed +ffffffff82383200 t sienna_cichlid_notify_smc_display_config +ffffffff82383380 t sienna_cichlid_is_dpm_running +ffffffff823833d0 t sienna_cichlid_get_fan_speed_rpm +ffffffff823834e0 t sienna_cichlid_set_watermarks_table +ffffffff82383670 t sienna_cichlid_get_thermal_temperature_range +ffffffff82383750 t sienna_cichlid_get_uclk_dpm_states +ffffffff82383860 t sienna_cichlid_set_default_od_settings +ffffffff82383a10 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff82383a90 t sienna_cichlid_dump_pptable +ffffffff82383ac0 t sienna_cichlid_get_power_limit +ffffffff82383b90 t sienna_cichlid_update_pcie_parameters +ffffffff82383cc0 t sienna_cichlid_i2c_control_init +ffffffff82383df0 t sienna_cichlid_i2c_control_fini +ffffffff82383e30 t sienna_cichlid_get_unique_id +ffffffff82383f80 t sienna_cichlid_init_smc_tables +ffffffff823842a0 t sienna_cichlid_set_mp1_state +ffffffff823842e0 t sienna_cichlid_setup_pptable +ffffffff82384720 t sienna_cichlid_system_features_control +ffffffff823847b0 t sienna_cichlid_baco_enter +ffffffff82384800 t sienna_cichlid_baco_exit +ffffffff82384900 t sienna_cichlid_is_mode1_reset_supported +ffffffff82384980 t sienna_cichlid_is_mode2_reset_supported +ffffffff823849b0 t sienna_cichlid_mode2_reset +ffffffff82384af0 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff82384b10 t sienna_cichlid_get_gpu_metrics +ffffffff82385090 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff823850e0 t sienna_cichlid_get_fan_parameters +ffffffff82385120 t sienna_cichlid_gpo_control +ffffffff823851d0 t sienna_cichlid_get_ecc_info +ffffffff823852c0 t sienna_cichlid_stb_get_data_direct +ffffffff82385360 t sienna_cichlid_get_default_config_table_settings +ffffffff823853d0 t sienna_cichlid_set_config_table +ffffffff823854a0 t sienna_cichlid_get_throttler_status_locked +ffffffff82385600 t sienna_cichlid_get_smartshift_power_percentage +ffffffff82385730 t sienna_cichlid_i2c_xfer +ffffffff823859d0 t sienna_cichlid_i2c_func +ffffffff82386000 T smu_v11_0_init_microcode +ffffffff82386140 T smu_v11_0_fini_microcode +ffffffff82386190 T smu_v11_0_load_microcode +ffffffff823862d0 T smu_v11_0_check_fw_status +ffffffff82386320 T smu_v11_0_check_fw_version +ffffffff82386490 T smu_v11_0_setup_pptable +ffffffff823865b0 T smu_v11_0_init_smc_tables +ffffffff82386710 T smu_v11_0_fini_smc_tables +ffffffff82386940 T smu_v11_0_init_power +ffffffff823869d0 T smu_v11_0_fini_power +ffffffff82386a30 T smu_v11_0_get_vbios_bootup_values +ffffffff82386d90 T smu_v11_0_notify_memory_pool_location +ffffffff82386e80 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff82386f00 T smu_v11_0_set_driver_table_location +ffffffff82386f70 T smu_v11_0_set_tool_table_location +ffffffff82386fe0 T smu_v11_0_init_display_count +ffffffff82387040 T smu_v11_0_set_allowed_mask +ffffffff82387110 T smu_v11_0_system_features_control +ffffffff82387130 T smu_v11_0_notify_display_change +ffffffff823871a0 T smu_v11_0_init_max_sustainable_clocks +ffffffff82387400 t smu_v11_0_get_max_sustainable_clock +ffffffff82387520 T smu_v11_0_get_current_power_limit +ffffffff823875f0 T smu_v11_0_set_power_limit +ffffffff82387730 T smu_v11_0_interrupt_work +ffffffff823877b0 T smu_v11_0_enable_thermal_alert +ffffffff82387850 T smu_v11_0_disable_thermal_alert +ffffffff82387870 T smu_v11_0_get_gfx_vdd +ffffffff82387930 T smu_v11_0_display_clock_voltage_request +ffffffff82387a80 T smu_v11_0_set_hard_freq_limited_range +ffffffff82387b60 T smu_v11_0_gfx_off_control +ffffffff82387bd0 T smu_v11_0_get_fan_control_mode +ffffffff82387c20 T smu_v11_0_set_fan_speed_pwm +ffffffff82387dd0 t smu_v11_0_set_fan_static_mode +ffffffff82387f90 T smu_v11_0_set_fan_speed_rpm +ffffffff823880d0 T smu_v11_0_get_fan_speed_pwm +ffffffff82388210 T smu_v11_0_get_fan_speed_rpm +ffffffff82388310 T smu_v11_0_set_fan_control_mode +ffffffff823884b0 T smu_v11_0_set_xgmi_pstate +ffffffff823884d0 T smu_v11_0_register_irq_handler +ffffffff82388590 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff82388620 T smu_v11_0_set_azalia_d3_pme +ffffffff82388640 T smu_v11_0_baco_set_armd3_sequence +ffffffff82388660 T smu_v11_0_baco_is_support +ffffffff823886f0 T smu_v11_0_baco_get_state +ffffffff82388720 T smu_v11_0_baco_set_state +ffffffff823889d0 T smu_v11_0_baco_enter +ffffffff82388ac0 T smu_v11_0_baco_exit +ffffffff82388bf0 T smu_v11_0_mode1_reset +ffffffff82388c70 T smu_v11_0_handle_passthrough_sbr +ffffffff82388c90 T smu_v11_0_get_dpm_ultimate_freq +ffffffff82388dd0 T smu_v11_0_set_soft_freq_limited_range +ffffffff82388ea0 T smu_v11_0_set_performance_level +ffffffff823891f0 T smu_v11_0_set_power_source +ffffffff82389250 T smu_v11_0_get_dpm_freq_by_index +ffffffff82389300 T smu_v11_0_get_dpm_level_count +ffffffff823893a0 T smu_v11_0_set_single_dpm_table +ffffffff82389600 T smu_v11_0_get_dpm_level_range +ffffffff82389760 T smu_v11_0_get_current_pcie_link_width_level +ffffffff823897b0 T smu_v11_0_get_current_pcie_link_width +ffffffff82389810 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff82389860 T smu_v11_0_get_current_pcie_link_speed +ffffffff823898c0 T smu_v11_0_gfx_ulv_control +ffffffff82389930 T smu_v11_0_deep_sleep_control +ffffffff82389ae0 T smu_v11_0_restore_user_od_settings +ffffffff82389b70 T smu_v11_0_set_smu_mailbox_registers +ffffffff82389be0 t smu_v11_0_set_irq_state +ffffffff8238a190 t smu_v11_0_irq_process +ffffffff8238b000 T vangogh_set_ppt_funcs +ffffffff8238b040 t vangogh_set_default_dpm_tables +ffffffff8238b070 t vangogh_common_print_clk_levels +ffffffff8238b4e0 t vangogh_force_clk_levels +ffffffff8238b710 t vangogh_od_edit_dpm_table +ffffffff8238bc40 t vangogh_get_power_profile_mode +ffffffff8238bd40 t vangogh_set_power_profile_mode +ffffffff8238be60 t vangogh_dpm_set_vcn_enable +ffffffff8238beb0 t vangogh_dpm_set_jpeg_enable +ffffffff8238bf00 t vangogh_read_sensor +ffffffff8238c530 t vangogh_get_apu_thermal_limit +ffffffff8238c550 t vangogh_set_apu_thermal_limit +ffffffff8238c570 t vangogh_is_dpm_running +ffffffff8238c5d0 t vangogh_set_watermarks_table +ffffffff8238c750 t vangogh_set_performance_level +ffffffff8238cf60 t vangogh_get_power_limit +ffffffff8238d0c0 t vangogh_get_ppt_limit +ffffffff8238d130 t vangogh_get_dpm_clock_table +ffffffff8238d2a0 t vangogh_init_smc_tables +ffffffff8238d4e0 t vangogh_system_features_control +ffffffff8238d530 t vangogh_set_power_limit +ffffffff8238d680 t vangogh_get_gfxoff_status +ffffffff8238d710 t vangogh_get_gfxoff_entrycount +ffffffff8238d780 t vangogh_set_gfxoff_residency +ffffffff8238d7f0 t vangogh_get_gfxoff_residency +ffffffff8238d830 t vangogh_mode2_reset +ffffffff8238d970 t vangogh_common_get_gpu_metrics +ffffffff8238e0f0 t vangogh_post_smu_init +ffffffff8238e280 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff8238e2f0 t vangogh_force_dpm_limit_value +ffffffff8238e420 t vangogh_get_dpm_ultimate_freq +ffffffff8238e7e0 t vangogh_set_soft_freq_limited_range +ffffffff8238e960 t vangogh_get_gpu_metrics_v2_3 +ffffffff8238f000 T renoir_set_ppt_funcs +ffffffff8238f0a0 t renoir_get_current_power_state +ffffffff8238f120 t renoir_print_clk_levels +ffffffff8238f530 t renoir_force_clk_levels +ffffffff8238f750 t renoir_od_edit_dpm_table +ffffffff8238fa30 t renoir_get_power_profile_mode +ffffffff8238fb00 t renoir_set_power_profile_mode +ffffffff8238fc20 t renoir_dpm_set_vcn_enable +ffffffff8238fca0 t renoir_dpm_set_jpeg_enable +ffffffff8238fd20 t renoir_read_sensor +ffffffff823900d0 t renoir_is_dpm_running +ffffffff82390110 t renoir_set_watermarks_table +ffffffff823902b0 t renoir_set_performance_level +ffffffff823907d0 t renoir_get_dpm_clock_table +ffffffff82390b20 t renoir_init_smc_tables +ffffffff82390c90 t renoir_get_enabled_mask +ffffffff82390cd0 t renoir_get_dpm_ultimate_freq +ffffffff82390f70 t renoir_get_gpu_metrics +ffffffff82391190 t renoir_gfx_state_change_set +ffffffff823911c0 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff82391260 t renoir_force_dpm_limit_value +ffffffff82392000 T smu_v12_0_check_fw_status +ffffffff82392050 T smu_v12_0_check_fw_version +ffffffff823920c0 T smu_v12_0_powergate_sdma +ffffffff82392110 T smu_v12_0_set_gfx_cgpg +ffffffff82392170 T smu_v12_0_get_gfxoff_status +ffffffff82392200 T smu_v12_0_gfx_off_control +ffffffff82392320 T smu_v12_0_fini_smc_tables +ffffffff823923d0 T smu_v12_0_set_default_dpm_tables +ffffffff82392400 T smu_v12_0_mode2_reset +ffffffff82392420 T smu_v12_0_set_soft_freq_limited_range +ffffffff82392560 T smu_v12_0_set_driver_table_location +ffffffff823925d0 T smu_v12_0_get_vbios_bootup_values +ffffffff82393000 T aldebaran_set_ppt_funcs +ffffffff82393050 t aldebaran_get_allowed_feature_mask +ffffffff823930a0 t aldebaran_set_default_dpm_table +ffffffff823932a0 t aldebaran_populate_umd_state_clk +ffffffff823933a0 t aldebaran_print_clk_levels +ffffffff82393560 t aldebaran_force_clk_levels +ffffffff82393720 t aldebaran_usr_edit_dpm_table +ffffffff82393940 t aldebaran_read_sensor +ffffffff82393b60 t aldebaran_is_dpm_running +ffffffff82393bb0 t aldebaran_get_thermal_temperature_range +ffffffff82393c80 t aldebaran_set_performance_level +ffffffff82393d30 t aldebaran_get_power_limit +ffffffff82393ec0 t aldebaran_set_df_cstate +ffffffff82393f40 t aldebaran_allow_xgmi_power_down +ffffffff82393fe0 t aldebaran_i2c_control_init +ffffffff823940a0 t aldebaran_i2c_control_fini +ffffffff823940e0 t aldebaran_get_unique_id +ffffffff823941c0 t aldebaran_init_smc_tables +ffffffff82394380 t aldebaran_set_mp1_state +ffffffff823943c0 t aldebaran_setup_pptable +ffffffff82394490 t aldebaran_system_features_control +ffffffff823945f0 t aldebaran_set_power_limit +ffffffff82394680 t aldebaran_is_baco_supported +ffffffff823946b0 t aldebaran_is_mode1_reset_supported +ffffffff823946e0 t aldebaran_is_mode2_reset_supported +ffffffff82394710 t aldebaran_mode1_reset +ffffffff823947f0 t aldebaran_mode2_reset +ffffffff82394b10 t aldebaran_set_soft_freq_limited_range +ffffffff82394d10 t aldebaran_log_thermal_throttling_event +ffffffff82395020 t aldebaran_get_gpu_metrics +ffffffff823952a0 t aldebaran_smu_handle_passthrough_sbr +ffffffff823952c0 t aldebaran_smu_send_hbm_bad_page_num +ffffffff82395340 t aldebaran_get_ecc_info +ffffffff823954a0 t aldebaran_send_hbm_bad_channel_flag +ffffffff82395570 t aldebaran_get_current_clk_freq_by_table +ffffffff823956b0 t aldebaran_get_smu_metrics_data +ffffffff82395920 t aldebaran_upload_dpm_level +ffffffff82395a10 t aldebaran_i2c_xfer +ffffffff82395cb0 t aldebaran_i2c_func +ffffffff82396000 T smu_v13_0_init_microcode +ffffffff82396120 T smu_v13_0_fini_microcode +ffffffff82396170 T smu_v13_0_load_microcode +ffffffff823961a0 T smu_v13_0_init_pptable_microcode +ffffffff82396350 T smu_v13_0_get_pptable_from_firmware +ffffffff82396470 T smu_v13_0_check_fw_status +ffffffff823964e0 T smu_v13_0_check_fw_version +ffffffff82396560 T smu_v13_0_setup_pptable +ffffffff823966f0 T smu_v13_0_init_smc_tables +ffffffff82396870 T smu_v13_0_fini_smc_tables +ffffffff82396a80 T smu_v13_0_init_power +ffffffff82396b00 T smu_v13_0_fini_power +ffffffff82396b80 T smu_v13_0_get_vbios_bootup_values +ffffffff82396e20 T smu_v13_0_notify_memory_pool_location +ffffffff82396ee0 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff82396f60 T smu_v13_0_set_driver_table_location +ffffffff82396fd0 T smu_v13_0_set_tool_table_location +ffffffff82397040 T smu_v13_0_init_display_count +ffffffff82397080 T smu_v13_0_set_allowed_mask +ffffffff82397150 T smu_v13_0_gfx_off_control +ffffffff823971d0 T smu_v13_0_system_features_control +ffffffff823971f0 T smu_v13_0_notify_display_change +ffffffff82397250 T smu_v13_0_init_max_sustainable_clocks +ffffffff823974b0 t smu_v13_0_get_max_sustainable_clock +ffffffff823975d0 T smu_v13_0_get_current_power_limit +ffffffff823976a0 T smu_v13_0_set_power_limit +ffffffff823977b0 T smu_v13_0_enable_thermal_alert +ffffffff82397840 T smu_v13_0_disable_thermal_alert +ffffffff82397880 T smu_v13_0_get_gfx_vdd +ffffffff82397940 T smu_v13_0_display_clock_voltage_request +ffffffff82397a90 T smu_v13_0_set_hard_freq_limited_range +ffffffff82397b70 T smu_v13_0_get_fan_control_mode +ffffffff82397bc0 T smu_v13_0_set_fan_speed_pwm +ffffffff82397de0 t smu_v13_0_set_fan_static_mode +ffffffff82397fb0 T smu_v13_0_set_fan_control_mode +ffffffff82398110 T smu_v13_0_set_fan_speed_rpm +ffffffff823982c0 T smu_v13_0_set_xgmi_pstate +ffffffff823982e0 T smu_v13_0_register_irq_handler +ffffffff823983b0 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff82398440 T smu_v13_0_set_azalia_d3_pme +ffffffff82398460 T smu_v13_0_wait_for_event +ffffffff823984b0 T smu_v13_0_get_dpm_ultimate_freq +ffffffff82398610 T smu_v13_0_set_soft_freq_limited_range +ffffffff823986e0 T smu_v13_0_set_performance_level +ffffffff82398e40 T smu_v13_0_set_power_source +ffffffff82398ea0 T smu_v13_0_get_dpm_freq_by_index +ffffffff82398f50 T smu_v13_0_set_single_dpm_table +ffffffff82399240 T smu_v13_0_get_current_pcie_link_width_level +ffffffff82399290 T smu_v13_0_get_current_pcie_link_width +ffffffff823992f0 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff82399340 T smu_v13_0_get_current_pcie_link_speed +ffffffff82399390 T smu_v13_0_set_vcn_enable +ffffffff82399450 T smu_v13_0_set_jpeg_enable +ffffffff82399470 T smu_v13_0_run_btc +ffffffff823994f0 T smu_v13_0_gpo_control +ffffffff82399580 T smu_v13_0_deep_sleep_control +ffffffff823997e0 T smu_v13_0_gfx_ulv_control +ffffffff82399850 T smu_v13_0_baco_set_armd3_sequence +ffffffff823998c0 T smu_v13_0_baco_is_support +ffffffff82399950 T smu_v13_0_baco_get_state +ffffffff82399980 T smu_v13_0_baco_set_state +ffffffff82399a50 T smu_v13_0_baco_enter +ffffffff82399b70 T smu_v13_0_baco_exit +ffffffff82399c10 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff82399c50 T smu_v13_0_od_edit_dpm_table +ffffffff82399f00 T smu_v13_0_set_default_dpm_tables +ffffffff82399f30 T smu_v13_0_set_smu_mailbox_registers +ffffffff82399fa0 T smu_v13_0_mode1_reset +ffffffff8239a020 T smu_v13_0_update_pcie_parameters +ffffffff8239a290 t smu_v13_0_set_irq_state +ffffffff8239a840 t smu_v13_0_irq_process +ffffffff8239b000 T smu_v13_0_0_set_ppt_funcs +ffffffff8239b0f0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff8239b230 t smu_v13_0_0_set_default_dpm_table +ffffffff8239b650 t smu_v13_0_0_populate_umd_state_clk +ffffffff8239b790 t smu_v13_0_0_print_clk_levels +ffffffff8239b8a0 t smu_v13_0_0_force_clk_levels +ffffffff8239ba20 t smu_v13_0_0_od_edit_dpm_table +ffffffff8239bef0 t smu_v13_0_0_restore_user_od_settings +ffffffff8239bfb0 t smu_v13_0_0_get_power_profile_mode +ffffffff8239c0b0 t smu_v13_0_0_set_power_profile_mode +ffffffff8239c300 t smu_v13_0_0_read_sensor +ffffffff8239c520 t smu_v13_0_0_is_dpm_running +ffffffff8239c570 t smu_v13_0_0_get_fan_speed_pwm +ffffffff8239c650 t smu_v13_0_0_get_fan_speed_rpm +ffffffff8239c6c0 t smu_v13_0_0_get_thermal_temperature_range +ffffffff8239c7c0 t smu_v13_0_0_set_default_od_settings +ffffffff8239c8f0 t smu_v13_0_0_dump_pptable +ffffffff8239c920 t smu_v13_0_0_get_power_limit +ffffffff8239ca00 t smu_v13_0_0_set_df_cstate +ffffffff8239ca20 t smu_v13_0_0_i2c_control_init +ffffffff8239cb50 t smu_v13_0_0_i2c_control_fini +ffffffff8239cb90 t smu_v13_0_0_get_unique_id +ffffffff8239cc30 t smu_v13_0_0_init_smc_tables +ffffffff8239ce80 t smu_v13_0_0_set_mp1_state +ffffffff8239cec0 t smu_v13_0_0_setup_pptable +ffffffff8239d020 t smu_v13_0_0_system_features_control +ffffffff8239d030 t smu_v13_0_0_baco_enter +ffffffff8239d090 t smu_v13_0_0_baco_exit +ffffffff8239d0f0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff8239d150 t smu_v13_0_0_mode1_reset +ffffffff8239d270 t smu_v13_0_0_mode2_reset +ffffffff8239d2c0 t smu_v13_0_0_enable_gfx_features +ffffffff8239d310 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff8239d430 t smu_v13_0_0_get_gpu_metrics +ffffffff8239d870 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff8239d8c0 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff8239d940 t smu_v13_0_0_get_ecc_info +ffffffff8239da40 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff8239dac0 t smu_v13_0_0_i2c_xfer +ffffffff8239dd60 t smu_v13_0_0_i2c_func +ffffffff8239e000 T smu_v13_0_4_set_ppt_funcs +ffffffff8239e0c0 t smu_v13_0_4_print_clk_levels +ffffffff8239e130 t smu_v13_0_4_force_clk_levels +ffffffff8239e3f0 t smu_v13_0_4_read_sensor +ffffffff8239e6d0 t smu_v13_0_4_is_dpm_running +ffffffff8239e720 t smu_v13_0_4_set_watermarks_table +ffffffff8239e8a0 t smu_v13_0_4_set_performance_level +ffffffff8239f450 t smu_v13_0_4_init_smc_tables +ffffffff8239f5c0 t smu_v13_0_4_fini_smc_tables +ffffffff8239f670 t smu_v13_0_4_system_features_control +ffffffff8239f6c0 t smu_v13_0_4_mode2_reset +ffffffff8239f6e0 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff8239fb00 t smu_v13_0_4_get_gpu_metrics +ffffffff8239fcd0 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff8239fd30 t smu_v13_0_4_get_current_clk_freq +ffffffff823a0000 T smu_v13_0_5_set_ppt_funcs +ffffffff823a00a0 t smu_v13_0_5_set_default_dpm_tables +ffffffff823a00d0 t smu_v13_0_5_print_clk_levels +ffffffff823a0160 t smu_v13_0_5_force_clk_levels +ffffffff823a02d0 t smu_v13_0_5_od_edit_dpm_table +ffffffff823a0580 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff823a05a0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff823a05c0 t smu_v13_0_5_read_sensor +ffffffff823a07e0 t smu_v13_0_5_is_dpm_running +ffffffff823a0830 t smu_v13_0_5_set_watermarks_table +ffffffff823a09b0 t smu_v13_0_5_set_performance_level +ffffffff823a0f50 t smu_v13_0_5_init_smc_tables +ffffffff823a10c0 t smu_v13_0_5_fini_smc_tables +ffffffff823a1170 t smu_v13_0_5_system_features_control +ffffffff823a11c0 t smu_v13_0_5_mode2_reset +ffffffff823a1240 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff823a1680 t smu_v13_0_5_get_gpu_metrics +ffffffff823a17d0 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff823a2000 T smu_v13_0_6_set_ppt_funcs +ffffffff823a2050 t smu_v13_0_6_get_allowed_feature_mask +ffffffff823a20a0 t smu_v13_0_6_set_default_dpm_table +ffffffff823a25a0 t smu_v13_0_6_populate_umd_state_clk +ffffffff823a26a0 t smu_v13_0_6_print_clk_levels +ffffffff823a2a10 t smu_v13_0_6_force_clk_levels +ffffffff823a2bd0 t smu_v13_0_6_usr_edit_dpm_table +ffffffff823a2df0 t smu_v13_0_6_read_sensor +ffffffff823a3380 t smu_v13_0_6_is_dpm_running +ffffffff823a3400 t smu_v13_0_6_get_thermal_temperature_range +ffffffff823a3550 t smu_v13_0_6_set_performance_level +ffffffff823a3660 t smu_v13_0_6_get_power_limit +ffffffff823a3730 t smu_v13_0_6_set_df_cstate +ffffffff823a3750 t smu_v13_0_6_allow_xgmi_power_down +ffffffff823a3770 t smu_v13_0_6_i2c_control_init +ffffffff823a38a0 t smu_v13_0_6_i2c_control_fini +ffffffff823a38e0 t smu_v13_0_6_get_unique_id +ffffffff823a3960 t smu_v13_0_6_init_smc_tables +ffffffff823a3af0 t smu_v13_0_6_check_fw_status +ffffffff823a3b40 t smu_v13_0_6_setup_pptable +ffffffff823a3b70 t smu_v13_0_6_system_features_control +ffffffff823a3c10 t smu_v13_0_6_get_enabled_mask +ffffffff823a3c80 t smu_v13_0_6_set_power_limit +ffffffff823a3ca0 t smu_v13_0_6_register_irq_handler +ffffffff823a3d00 t smu_v13_0_6_is_baco_supported +ffffffff823a3d30 t smu_v13_0_6_is_mode1_reset_supported +ffffffff823a3d60 t smu_v13_0_6_is_mode2_reset_supported +ffffffff823a3d90 t smu_v13_0_6_mode1_reset +ffffffff823a3e40 t smu_v13_0_6_mode2_reset +ffffffff823a40f0 t smu_v13_0_6_get_dpm_ultimate_freq +ffffffff823a4300 t smu_v13_0_6_set_soft_freq_limited_range +ffffffff823a4530 t smu_v13_0_6_log_thermal_throttling_event +ffffffff823a4820 t smu_v13_0_6_get_gpu_metrics +ffffffff823a4b70 t smu_v13_0_6_smu_send_hbm_bad_page_num +ffffffff823a4bf0 t smu_v13_0_6_get_smu_metrics_data +ffffffff823a4e80 t smu_v13_0_6_upload_dpm_level +ffffffff823a4f80 t smu_v13_0_6_i2c_xfer +ffffffff823a5280 t smu_v13_0_6_i2c_func +ffffffff823a52b0 t smu_v13_0_6_set_irq_state +ffffffff823a5540 t smu_v13_0_6_irq_process +ffffffff823a6000 T smu_v13_0_7_set_ppt_funcs +ffffffff823a6060 t smu_v13_0_7_get_allowed_feature_mask +ffffffff823a61d0 t smu_v13_0_7_set_default_dpm_table +ffffffff823a65f0 t smu_v13_0_7_populate_umd_state_clk +ffffffff823a6730 t smu_v13_0_7_print_clk_levels +ffffffff823a6840 t smu_v13_0_7_force_clk_levels +ffffffff823a69c0 t smu_v13_0_7_od_edit_dpm_table +ffffffff823a6e90 t smu_v13_0_7_restore_user_od_settings +ffffffff823a6f50 t smu_v13_0_7_get_power_profile_mode +ffffffff823a7090 t smu_v13_0_7_set_power_profile_mode +ffffffff823a72d0 t smu_v13_0_7_read_sensor +ffffffff823a74e0 t smu_v13_0_7_is_dpm_running +ffffffff823a7530 t smu_v13_0_7_get_fan_speed_pwm +ffffffff823a7610 t smu_v13_0_7_get_fan_speed_rpm +ffffffff823a7680 t smu_v13_0_7_get_thermal_temperature_range +ffffffff823a7780 t smu_v13_0_7_set_default_od_settings +ffffffff823a78b0 t smu_v13_0_7_dump_pptable +ffffffff823a78e0 t smu_v13_0_7_get_power_limit +ffffffff823a79c0 t smu_v13_0_7_set_df_cstate +ffffffff823a79e0 t smu_v13_0_7_init_smc_tables +ffffffff823a7bd0 t smu_v13_0_7_check_fw_status +ffffffff823a7c20 t smu_v13_0_7_set_mp1_state +ffffffff823a7c60 t smu_v13_0_7_setup_pptable +ffffffff823a7dc0 t smu_v13_0_7_baco_enter +ffffffff823a7e20 t smu_v13_0_7_baco_exit +ffffffff823a7e80 t smu_v13_0_7_is_mode1_reset_supported +ffffffff823a7ec0 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff823a7fe0 t smu_v13_0_7_get_gpu_metrics +ffffffff823a8410 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff823a9000 T yellow_carp_set_ppt_funcs +ffffffff823a9050 t yellow_carp_set_default_dpm_tables +ffffffff823a9080 t yellow_carp_print_clk_levels +ffffffff823a9100 t yellow_carp_force_clk_levels +ffffffff823a93c0 t yellow_carp_od_edit_dpm_table +ffffffff823a9670 t yellow_carp_dpm_set_vcn_enable +ffffffff823a9690 t yellow_carp_dpm_set_jpeg_enable +ffffffff823a96b0 t yellow_carp_read_sensor +ffffffff823a9a20 t yellow_carp_is_dpm_running +ffffffff823a9a70 t yellow_carp_set_watermarks_table +ffffffff823a9bf0 t yellow_carp_set_performance_level +ffffffff823aa680 t yellow_carp_init_smc_tables +ffffffff823aa7f0 t yellow_carp_fini_smc_tables +ffffffff823aa8a0 t yellow_carp_system_features_control +ffffffff823aa8f0 t yellow_carp_get_gfxoff_status +ffffffff823aa980 t yellow_carp_mode2_reset +ffffffff823aaa00 t yellow_carp_get_dpm_ultimate_freq +ffffffff823aae40 t yellow_carp_get_gpu_metrics +ffffffff823aaff0 t yellow_carp_post_smu_init +ffffffff823ab070 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff823ab0d0 t yellow_carp_get_current_clk_freq +ffffffff823ab1d0 t yellow_carp_get_dpm_profile_freq +ffffffff823ac000 T smu_cmn_send_msg_without_waiting +ffffffff823ac170 T smu_cmn_wait_for_response +ffffffff823ac2a0 T smu_cmn_send_smc_msg_with_param +ffffffff823ac5b0 T smu_cmn_to_asic_specific_index +ffffffff823ac6e0 t __smu_cmn_reg_print_error +ffffffff823ac920 T smu_cmn_send_smc_msg +ffffffff823ac940 T smu_cmn_send_debug_smc_msg +ffffffff823ac9c0 T smu_cmn_send_debug_smc_msg_with_param +ffffffff823aca40 T smu_cmn_feature_is_supported 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pci_bus_maxdevs +ffffffff823ae110 T pci_make_tag +ffffffff823ae180 T pci_decompose_tag +ffffffff823ae1e0 T pci_conf_size +ffffffff823ae240 T pci_mcfg_map_bus +ffffffff823ae2c0 T pci_conf_read +ffffffff823ae410 T pci_conf_write +ffffffff823ae550 T pci_msix_table_map +ffffffff823ae680 T pci_msix_table_unmap +ffffffff823ae720 T msi_hwmask +ffffffff823ae750 T msi_hwunmask +ffffffff823ae780 T msi_addroute +ffffffff823ae890 T msi_delroute +ffffffff823ae910 T msi_allocidtvec +ffffffff823aea60 T pci_intr_enable_msivec +ffffffff823aeb40 T pci_intr_map_msi +ffffffff823aebf0 T pci_intr_map_msivec +ffffffff823aeca0 T msix_hwmask +ffffffff823aecd0 T msix_hwunmask +ffffffff823aed00 T msix_addroute +ffffffff823aeef0 T msix_delroute +ffffffff823af050 T pci_intr_map_msix +ffffffff823af120 T pci_intr_map +ffffffff823af350 T pci_intr_string +ffffffff823af430 T pci_intr_establish +ffffffff823af480 T pci_intr_establish_cpu +ffffffff823af5d0 T pci_intr_disestablish +ffffffff823af5f0 T pci_init_extents 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wsdisplay_emulbell_task +ffffffff82407550 T wsscreen_detach +ffffffff82407600 T wsdisplay_screentype_pick +ffffffff824076c0 T wsdisplay_addscreen_print +ffffffff82407740 T wsdisplay_addscreen +ffffffff82407930 T allocate_copybuffer +ffffffff82407a60 T wsdisplay_getscreen +ffffffff82407b10 T wsdisplay_closescreen +ffffffff82407c70 T wsdisplayopen +ffffffff82407e40 T wsdisplay_delscreen +ffffffff82407f90 T wsdisplay_update_rawkbd +ffffffff82408080 T wsdisplay_common_attach +ffffffff82408410 T wsdisplay_common_detach +ffffffff82408640 T wsdisplay_switchtoconsole +ffffffff824086b0 T wsemuldisplaydevprint +ffffffff82408700 T wsemuldisplaydevsubmatch +ffffffff82408750 T wsdisplay_burner +ffffffff82408820 T wsdisplay_burn +ffffffff824088a0 T wsdisplay_cnattach +ffffffff824089f0 T wsdisplaystart +ffffffff82408c10 T wsdisplayparam +ffffffff82408c60 T wsdisplayclose +ffffffff82408de0 T wsdisplay_kbdholdscr +ffffffff82408e40 T wsdisplay_internal_ioctl +ffffffff824094f0 T wsdisplayread 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wsdisplay_usl_ioctl1 +ffffffff8240e7b0 T wsdisplay_usl_ioctl2 +ffffffff8240f000 T filt_wseventdetach +ffffffff8240f050 T filt_wseventread +ffffffff8240f0b0 T wsevent_init +ffffffff8240f150 T wsevent_fini +ffffffff8240f1c0 T wsevent_read +ffffffff8240f360 T wsevent_kqfilter +ffffffff82410000 T wskbd_match +ffffffff82410050 T wskbd_attach +ffffffff82410410 T wskbd_detach +ffffffff82410660 T wskbd_activate +ffffffff824106a0 T wskbd_mux_open +ffffffff82410770 T wskbd_mux_close +ffffffff82410800 T wskbd_do_ioctl +ffffffff82410870 T wskbd_displayioctl +ffffffff82410890 T wskbd_set_display +ffffffff824109d0 T wskbd_update_layout +ffffffff82410a10 T wskbddevprint +ffffffff82410a60 T wskbd_kbd_backlight_task +ffffffff82410b30 T wskbd_repeat +ffffffff82410bd0 T wskbd_brightness_task +ffffffff82410c40 T wskbd_set_keymap +ffffffff82410cc0 T wskbd_cnattach +ffffffff82410db0 T wskbd_cngetc +ffffffff82410ec0 T wskbd_cnpollc +ffffffff82410f20 T wskbd_cnbell +ffffffff82410f70 T wskbd_cndetach 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wsemul_vt100_cnattach +ffffffff82420200 T wsemul_vt100_attach +ffffffff824204d0 T wsemul_vt100_output +ffffffff824207e0 T wsemul_vt100_detach +ffffffff82420910 T wsemul_vt100_resetop +ffffffff82420ac0 T wsemul_vt100_output_esc +ffffffff82421140 T wsemul_vt100_output_csi +ffffffff82421280 T wsemul_vt100_output_scs94 +ffffffff82421340 T wsemul_vt100_output_scs94_percent +ffffffff82421390 T wsemul_vt100_output_scs96 +ffffffff824214e0 T wsemul_vt100_output_scs96_percent +ffffffff82421530 T wsemul_vt100_output_esc_hash +ffffffff82421860 T wsemul_vt100_output_esc_spc +ffffffff82421890 T wsemul_vt100_output_string +ffffffff82421900 T wsemul_vt100_output_string_esc +ffffffff82421950 T wsemul_vt100_output_dcs +ffffffff82421a00 T wsemul_vt100_output_dcs_dollar +ffffffff82421a60 T wsemul_vt100_output_esc_percent +ffffffff82421ac0 T wsemul_vt100_init +ffffffff82421b20 T wsemul_vt100_reset +ffffffff82421c40 T wsemul_vt100_nextline +ffffffff82421cd0 T wsemul_vt100_output_normal +ffffffff82421f10 T wsemul_vt100_output_c0c1 +ffffffff82422190 T wsemul_vt100_jump_scroll +ffffffff82423000 T wsemul_vt100_scrollup +ffffffff82423150 T wsemul_vt100_scrolldown +ffffffff82423290 T wsemul_vt100_ed +ffffffff824234f0 T wsemul_vt100_el +ffffffff824235e0 T wsemul_vt100_handle_csi +ffffffff82424570 T vt100_ansimode +ffffffff824245f0 T vt100_decmode +ffffffff82424720 T vt100_selectattribute +ffffffff82424860 T wsemul_vt100_handle_dcs +ffffffff82425000 T vt100_initchartables +ffffffff82425120 T vt100_setnrc +ffffffff82426000 T wsemul_vt100_translate +ffffffff82427000 T pckbdprobe +ffffffff82427140 T pckbdattach +ffffffff82427320 T pckbdactivate +ffffffff824273b0 T pckbd_enable +ffffffff82427500 T pckbd_set_leds +ffffffff82427590 T pckbd_ioctl +ffffffff824276e0 T pckbd_cngetc +ffffffff824278c0 T pckbd_cnpollc +ffffffff82427960 T pckbd_cnbell +ffffffff824279b0 T pckbd_set_xtscancode +ffffffff82427b30 T pckbd_init +ffffffff82427b90 T pckbd_input +ffffffff82427e00 T pckbd_scancode_translate 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usbd_str +ffffffff82442000 T usbd_get_desc +ffffffff82442070 T usbd_get_device_status +ffffffff824420c0 T usbd_get_hub_descriptor +ffffffff82442130 T usbd_get_hub_ss_descriptor +ffffffff824421a0 T usbd_get_port_status +ffffffff824421f0 T usbd_set_hub_depth +ffffffff82442240 T usbd_clear_port_feature +ffffffff82442290 T usbd_clear_endpoint_feature +ffffffff824422e0 T usbd_set_port_feature +ffffffff82442330 T usbd_set_idle +ffffffff82442390 T usbd_get_report_descriptor +ffffffff824423e0 T usbd_get_hid_descriptor +ffffffff82442460 T usbd_get_config +ffffffff824424b0 T usb_detach_wait +ffffffff82442530 T usb_detach_wakeup +ffffffff82443000 T usb_block_allocmem +ffffffff82443250 T usb_block_freemem +ffffffff824432b0 T usb_allocmem +ffffffff82443500 T usb_freemem +ffffffff824435c0 T usb_syncmem +ffffffff82444000 T usbd_errstr +ffffffff82444070 T usbd_get_string_desc +ffffffff82444130 T usbd_get_string +ffffffff82444330 T usbd_cache_devinfo +ffffffff82444670 T usbd_printBCD +ffffffff824446f0 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uvideo_mappage +ffffffff82453be0 T uvideo_get_bufsize +ffffffff82453c10 T uvideo_start_read +ffffffff82453ce0 T uvideo_ucode_loader_ricoh +ffffffff82453ef0 T uvideo_ucode_loader_apple_isight +ffffffff82454130 T uvideo_vs_close +ffffffff824541b0 T uvideo_vs_free_bulk +ffffffff82454240 T uvideo_vs_free_isoc +ffffffff82454370 T uvideo_vs_free_frame +ffffffff82454440 T uvideo_attach_hook +ffffffff82454580 T uvideo_vs_decode_stream_header_isight +ffffffff824546e0 T uvideo_vs_decode_stream_header +ffffffff82454850 T uvideo_vc_parse_desc +ffffffff82454a10 T uvideo_vs_parse_desc +ffffffff82454be0 T uvideo_vs_negotiation +ffffffff82454fb0 T uvideo_desc_len +ffffffff82455020 T uvideo_vc_parse_desc_header +ffffffff824550c0 T uvideo_vc_parse_desc_pu +ffffffff82455130 T uvideo_vc_get_ctrl +ffffffff824551b0 T uvideo_vc_set_ctrl +ffffffff82455230 T uvideo_find_ctrl +ffffffff82455300 T uvideo_has_ctrl +ffffffff82455350 T uvideo_vs_parse_desc_input_header +ffffffff824553c0 T uvideo_vs_parse_desc_format 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acpidmar_intr +ffffffff82598480 T acpidmar_match_devscope +ffffffff825985c0 T domain_create +ffffffff82598800 t dmar_dmamap_create +ffffffff82598820 t dmar_dmamap_destroy +ffffffff82598830 t dmar_dmamap_load +ffffffff825988a0 t dmar_dmamap_load_mbuf +ffffffff82598900 t dmar_dmamap_load_uio +ffffffff82598960 t dmar_dmamap_load_raw +ffffffff825989d0 t dmar_dmamap_unload +ffffffff82598a00 t dmar_dmamap_sync +ffffffff82598a20 t dmar_dmamem_alloc +ffffffff82598a40 t dmar_dmamem_free +ffffffff82598a60 t dmar_dmamem_map +ffffffff82598a80 t dmar_dmamem_unmap +ffffffff82598aa0 t dmar_dmamem_mmap +ffffffff82598ac0 T domain_add_device +ffffffff82598b40 T domain_remove_device +ffffffff82598bf0 T domain_lookup +ffffffff82598db0 T _iommu_map +ffffffff82598e70 T _iommu_domain +ffffffff82598ed0 T domain_map_device +ffffffff825991d0 T ivhd_flush_devtab +ffffffff82599230 T acpidmar_pci_hook +ffffffff825993f0 T acpidmar_parse_devscope +ffffffff82599510 T acpidmar_drhd +ffffffff825996e0 T acpidmar_rmrr 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+ffffffff8259d390 T acpidock_status +ffffffff8259d420 T acpidock_docklock +ffffffff8259d500 T acpidock_dockctl +ffffffff8259d5e0 T acpidock_foundejd +ffffffff8259d690 T acpidock_notify +ffffffff8259db70 T acpidock_eject +ffffffff8259dc60 T acpidock_walkchildren +ffffffff8259e000 T abl_match +ffffffff8259e030 T abl_attach +ffffffff8259e220 T abl_get_brightness +ffffffff8259e2a0 T abl_get_param +ffffffff8259e300 T abl_set_param +ffffffff8259e3c0 T abl_set_brightness +ffffffff8259f000 T asmc_match +ffffffff8259f050 T asmc_attach +ffffffff8259f5d0 T asmc_activate +ffffffff8259f660 T asmc_try +ffffffff8259fa20 T asmc_get_backlight +ffffffff8259faa0 T asmc_set_backlight +ffffffff8259fb30 T asmc_backlight +ffffffff8259fbc0 T asmc_init +ffffffff8259fdc0 T asmc_update +ffffffff8259ff60 T asmc_detach +ffffffff825a0110 t asmc_temp +ffffffff825a02a0 t asmc_fan +ffffffff825a0460 t asmc_light +ffffffff825a1000 T acpiasus_match +ffffffff825a1030 T acpiasus_attach +ffffffff825a1150 T acpiasus_activate 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thinkpad_volume_down +ffffffff825a4310 T thinkpad_volume_up +ffffffff825a43c0 T thinkpad_get_thinklight +ffffffff825a4410 T thinkpad_adaptive_change +ffffffff825a4530 T thinkpad_get_brightness +ffffffff825a4570 T thinkpad_toggle_wan +ffffffff825a4690 T thinkpad_cmos +ffffffff825a4740 T thinkpad_set_brightness +ffffffff825a4830 T thinkpad_set_thinklight +ffffffff825a48f0 T thinkpad_battery_inhibit_charge +ffffffff825a4a20 T thinkpad_battery_force_discharge +ffffffff825a5000 T toshiba_match +ffffffff825a50a0 T toshiba_attach +ffffffff825a5180 T get_param_brightness +ffffffff825a51e0 T acpitoshiba_get_param +ffffffff825a5240 T set_param_brightness +ffffffff825a52d0 T toshiba_update_brightness +ffffffff825a53d0 T acpitoshiba_set_param +ffffffff825a5470 T toshiba_set_brightness +ffffffff825a5590 T toshiba_enable_events +ffffffff825a5620 T toshiba_read_events +ffffffff825a5780 T toshiba_hotkey +ffffffff825a59b0 T toshiba_get_brightness +ffffffff825a5b20 T toshiba_fn_key_brightness_up +ffffffff825a5c70 T toshiba_fn_key_brightness_down +ffffffff825a5dc0 T toshiba_fn_key_video_output +ffffffff825a5f10 T toshiba_get_video_output +ffffffff825a6080 T toshiba_set_video_output +ffffffff825a7000 T acpisony_match +ffffffff825a7070 T acpisony_attach +ffffffff825a70e0 T acpisony_activate +ffffffff825a7120 T acpisony_notify_setup +ffffffff825a7310 T acpisony_notify +ffffffff825a76b0 T acpisony_find_offset +ffffffff825a77c0 T acpisony_set_hotkey +ffffffff825a79b0 T acpisony_brightness_down +ffffffff825a7ac0 T acpisony_get_brightness +ffffffff825a7b40 T acpisony_set_brightness +ffffffff825a8000 T acpivideo_match +ffffffff825a8070 T acpivideo_attach +ffffffff825a81d0 T acpivideo_getpcibus +ffffffff825a8210 T acpivideo_notify +ffffffff825a8270 T acpivideo_set_policy +ffffffff825a8340 T acpi_foundvout +ffffffff825a8410 T acpivideo_print +ffffffff825a9000 T acpivout_match +ffffffff825a9070 T acpivout_attach +ffffffff825a91c0 T acpivout_notify +ffffffff825a9270 T acpivout_get_bcl +ffffffff825a9390 T acpivout_get_brightness +ffffffff825a9430 T acpivout_get_param +ffffffff825a94d0 T acpivout_set_param +ffffffff825a9630 T acpivout_select_brightness +ffffffff825a9700 T acpivout_find_brightness +ffffffff825a9790 T acpivout_set_brightness +ffffffff825aa000 T acpipwrres_match +ffffffff825aa070 T acpipwrres_attach +ffffffff825aa2b0 T acpipwrres_foundcons +ffffffff825aa440 T acpipwrres_ref_incr +ffffffff825aa4d0 T acpipwrres_hascons +ffffffff825aa520 T acpipwrres_ref_decr +ffffffff825aa5b0 T acpipwrres_addcons +ffffffff825ab000 T aibs_match +ffffffff825ab030 T aibs_attach +ffffffff825ab140 T aibs_probe +ffffffff825ab2a0 T aibs_attach_new +ffffffff825ab3c0 T aibs_attach_sif +ffffffff825ab590 T aibs_notify +ffffffff825ab600 T aibs_add_sensor +ffffffff825ab850 T aibs_getpack +ffffffff825ab8d0 T aibs_refresh +ffffffff825ab930 T aibs_refresh_r +ffffffff825aba70 T aibs_getvalue +ffffffff825abbc0 T aibs_find_cb +ffffffff825ac000 T aplgpio_match +ffffffff825ac060 T aplgpio_attach +ffffffff825ac310 T aplgpio_intr +ffffffff825ac460 T aplgpio_read_pin +ffffffff825ac4b0 T aplgpio_write_pin +ffffffff825ac520 T aplgpio_intr_establish +ffffffff825ac640 T aplgpio_intr_enable +ffffffff825ac6d0 T aplgpio_intr_disable +ffffffff825ad000 T bytgpio_match +ffffffff825ad060 T bytgpio_attach +ffffffff825ad320 T bytgpio_intr +ffffffff825ad450 T bytgpio_read_pin +ffffffff825ad4b0 T bytgpio_write_pin +ffffffff825ad530 T bytgpio_intr_establish +ffffffff825ad5a0 T bytgpio_intr_enable +ffffffff825ad690 T bytgpio_intr_disable +ffffffff825ae000 T chvgpio_match +ffffffff825ae060 T chvgpio_attach +ffffffff825ae300 T chvgpio_intr +ffffffff825ae3d0 T chvgpio_read_pin +ffffffff825ae480 T chvgpio_write_pin +ffffffff825ae540 T chvgpio_intr_establish +ffffffff825ae710 T chvgpio_intr_enable +ffffffff825ae7e0 T chvgpio_intr_disable +ffffffff825ae8b0 T chvgpio_opreg_handler +ffffffff825ae930 T chvgpio_check_pin +ffffffff825af000 T glkgpio_match +ffffffff825af060 T glkgpio_attach +ffffffff825af310 T glkgpio_intr +ffffffff825af460 T glkgpio_read_pin +ffffffff825af4c0 T glkgpio_write_pin +ffffffff825af530 T glkgpio_intr_establish +ffffffff825af650 T glkgpio_intr_enable +ffffffff825af6e0 T glkgpio_intr_disable +ffffffff825b0000 T pchgpio_match +ffffffff825b0060 T pchgpio_attach +ffffffff825b0530 T pchgpio_activate +ffffffff825b05e0 T pchgpio_intr +ffffffff825b0800 T pchgpio_read_pin +ffffffff825b08f0 T pchgpio_write_pin +ffffffff825b0a00 T pchgpio_intr_establish +ffffffff825b0c20 T pchgpio_intr_enable +ffffffff825b0d50 T pchgpio_intr_disable +ffffffff825b0e80 T pchgpio_save +ffffffff825b0ef0 T pchgpio_restore +ffffffff825b0f60 T pchgpio_find_group +ffffffff825b0fe0 T pchgpio_intr_handle +ffffffff825b10c0 T pchgpio_save_pin +ffffffff825b1280 T pchgpio_restore_pin +ffffffff825b2000 T tipmic_match +ffffffff825b2050 T tipmic_attach +ffffffff825b2250 T tipmic_write_1 +ffffffff825b2310 T tipmic_intr +ffffffff825b2470 T tipmic_get_lpat +ffffffff825b2580 T tipmic_read_pin +ffffffff825b25b0 T tipmic_write_pin +ffffffff825b25e0 T tipmic_thermal_opreg_handler +ffffffff825b2e60 T tipmic_power_opreg_handler +ffffffff825b3100 T tipmic_read_1 +ffffffff825b31d0 T tipmic_raw_to_temp +ffffffff825b4000 T ccpmic_match +ffffffff825b4050 T ccpmic_attach +ffffffff825b4130 T ccpmic_get_lpat +ffffffff825b4240 T ccpmic_read_pin +ffffffff825b43c0 T ccpmic_write_pin +ffffffff825b4520 T ccpmic_thermal_opreg_handler +ffffffff825b4770 T ccpmic_power_opreg_handler +ffffffff825b4960 T ccpmic_read_1 +ffffffff825b4a30 T ccpmic_write_1 +ffffffff825b4af0 T ccpmic_raw_to_temp +ffffffff825b5000 T com_acpi_match +ffffffff825b5120 T com_acpi_attach +ffffffff825b53a0 T com_acpi_is_designware +ffffffff825b5400 T com_acpi_intr_designware +ffffffff825b5430 T com_acpi_is_console +ffffffff825b6000 T sdhc_acpi_match +ffffffff825b6060 T sdhc_acpi_attach +ffffffff825b6370 T sdhc_acpi_parse_resources +ffffffff825b6420 T sdhc_acpi_card_detect_gpio +ffffffff825b6480 T sdhc_acpi_card_detect_intr +ffffffff825b64c0 T sdhc_acpi_power_on +ffffffff825b6540 T sdhc_acpi_explore +ffffffff825b6570 T sdhc_acpi_card_detect_nonremovable +ffffffff825b65a0 T sdhc_acpi_do_explore +ffffffff825b7000 T dwiic_acpi_match +ffffffff825b7050 T dwiic_acpi_attach +ffffffff825b7410 T dwiic_acpi_parse_crs +ffffffff825b7560 T dwiic_acpi_power +ffffffff825b7670 T dwiic_acpi_get_params +ffffffff825b77b0 T dwiic_i2c_intr_establish +ffffffff825b7830 T dwiic_i2c_intr_disestablish +ffffffff825b7850 T dwiic_i2c_intr_string +ffffffff825b78e0 T dwiic_acpi_acquire_bus +ffffffff825b7930 T dwiic_acpi_release_bus +ffffffff825b7960 T dwiic_acpi_bus_scan +ffffffff825b79a0 T dwiic_acpi_found_hid +ffffffff825b7d00 T dwiic_matchhids +ffffffff825b7d90 T dwiic_acpi_found_ihidev +ffffffff825b8000 T dwiic_acpi_found_iatp +ffffffff825b8160 T dwiic_acpi_found_ietp +ffffffff825b9000 T acpicbkbd_match +ffffffff825b9030 T acpicbkbd_attach +ffffffff825b90d0 T acpicbkbd_activate +ffffffff825b9120 T acpicbkbd_get_backlight +ffffffff825b91a0 T acpicbkbd_set_backlight +ffffffff825b9240 T acpicbkbd_write_backlight +ffffffff825ba000 T acpials_match +ffffffff825ba090 T acpials_attach +ffffffff825ba230 T acpials_read +ffffffff825ba2b0 T acpials_addtask +ffffffff825ba2f0 T acpials_notify +ffffffff825ba380 T acpials_update +ffffffff825bb000 T tpm_match +ffffffff825bb050 T tpm_attach +ffffffff825bb320 T tpm_activate +ffffffff825bb430 T tpm2_start_method +ffffffff825bb4b0 T tpm_probe +ffffffff825bb560 T tpm_init_tis +ffffffff825bb7d0 T tpm_init_crb +ffffffff825bbb10 T tpm_suspend +ffffffff825bbc00 T tpm_resume +ffffffff825bbc30 T tpm_write_tis +ffffffff825bbfc0 T tpm_read_tis +ffffffff825bc190 T tpm_write_crb +ffffffff825bc570 T tpm_read_crb +ffffffff825bc870 T tpm_request_locality_tis +ffffffff825bc960 T tpm_request_locality_crb +ffffffff825bca60 T tpm_release_locality_crb +ffffffff825bcab0 T tpm_release_locality_tis +ffffffff825bcb20 T tpm_getburst +ffffffff825bcbd0 T tpm_status +ffffffff825bcbf0 T tpm_waitfor +ffffffff825bccd0 T tpm_waitfor_status +ffffffff825bd000 T acpihve_match +ffffffff825bd0b0 T acpihve_attach +ffffffff825be000 T acpisbs_match +ffffffff825be030 T acpisbs_attach +ffffffff825be2b0 T acpisbs_activate +ffffffff825be390 T acpisbs_read +ffffffff825be450 T acpisbs_setup_sensors +ffffffff825be550 T acpisbs_refresh_sensors +ffffffff825be6a0 T acpisbs_notify +ffffffff825be7e0 T acpi_smbus_read +ffffffff825bf000 T surface_match +ffffffff825bf060 T surface_attach +ffffffff825bf0c0 T surface_hotkey +ffffffff825c0000 T ipmi_acpi_match +ffffffff825c0030 T ipmi_acpi_attach +ffffffff825c0260 T ipmi_acpi_parse_crs +ffffffff825c1000 T amdgpio_match +ffffffff825c1060 T amdgpio_attach +ffffffff825c12a0 T amdgpio_activate +ffffffff825c1390 T amdgpio_intr +ffffffff825c1530 T amdgpio_read_pin +ffffffff825c1580 T amdgpio_write_pin +ffffffff825c15f0 T amdgpio_intr_establish +ffffffff825c16e0 T amdgpio_intr_enable +ffffffff825c1760 T amdgpio_intr_disable +ffffffff825c17e0 T amdgpio_save +ffffffff825c1860 T amdgpio_restore +ffffffff825c18f0 T amdgpio_save_pin +ffffffff825c1960 T amdgpio_restore_pin +ffffffff825c19d0 T amdgpio_pin_intr +ffffffff825c2000 T acpihid_match +ffffffff825c2030 T acpihid_attach +ffffffff825c2210 T acpihid_init_dsm +ffffffff825c2370 T acpihid_eval +ffffffff825c2590 T acpihid_notify +ffffffff825c25f0 T acpihid_button_array_enable +ffffffff825c3000 t iosf_acpi_match +ffffffff825c3050 t iosf_acpi_attach +ffffffff825c3150 t iosf_acpi_mbi_mdr_rd +ffffffff825c31c0 t iosf_acpi_mbi_mdr_wr +ffffffff825c4000 T acpi_match +ffffffff825c4060 T acpi_attach +ffffffff825c40a0 T acpi_probe +ffffffff825c4240 T acpi_map +ffffffff825c4330 T acpi_unmap +ffffffff825c4380 T acpi_bus_space_map +ffffffff825c43a0 T acpi_bus_space_unmap +ffffffff825c43c0 T acpi_intr_establish +ffffffff825c4500 T acpi_intr_disestablish +ffffffff825c4510 T acpi_scan +ffffffff825c46b0 T acpi_acquire_glk +ffffffff825c4710 T acpi_release_glk +ffffffff825c4760 T acpi_attach_machdep +ffffffff825c48f0 T acpi_sleep_cpu +ffffffff825c4a90 T acpi_resume_cpu +ffffffff825c4b90 T sleep_mp +ffffffff825c4c80 T resume_mp +ffffffff825c4d70 T acpi_iommu_device_map +ffffffff825c5000 T hibernate_resume_machdep +ffffffff825c5050 T hibernate_drop_to_real_mode +ffffffff825c5060 T hibernate_activate_resume_pt_machdep +ffffffff825c50a0 T hibernate_switch_stack_machdep +ffffffff825c50e0 T hibernate_flush +ffffffff825c5110 T acpi_savecpu +ffffffff825c6000 T sleep_showstate +ffffffff825c60f0 T sleep_setstate +ffffffff825c6150 T gosleep +ffffffff825c6210 T sleep_abort +ffffffff825c6240 T sleep_resume +ffffffff825c62b0 T suspend_finish +ffffffff825c7000 T acpiopen +ffffffff825c70d0 T acpiclose +ffffffff825c7160 T acpiioctl +ffffffff825c72b0 T request_sleep +ffffffff825c7330 T acpi_filtdetach +ffffffff825c7380 T acpi_filtread +ffffffff825c73c0 T acpikqfilter +ffffffff825c8000 T acpipci_match +ffffffff825c8030 T acpipci_attach +ffffffff825c82f0 T acpipci_osc +ffffffff825c8430 T acpipci_parse_resources +ffffffff825c8560 T acpipci_attach_bus +ffffffff825c8730 T acpipci_print +ffffffff825c87a0 T acpipci_attach_busses +ffffffff825c9000 T efiopen +ffffffff825c9040 T eficlose +ffffffff825c9070 T efiioctl +ffffffff825c9110 T efiioc_get_table +ffffffff825c9280 T efiioc_var_get +ffffffff825c9500 T efiioc_var_next +ffffffff825c9720 T efiioc_var_set +ffffffff825c98a0 T efi_adapt_error +ffffffff825ca000 T efi_match +ffffffff825ca060 T efi_attach +ffffffff825ca330 T efi_map_runtime +ffffffff825ca4b0 T efi_enter +ffffffff825ca550 T efi_leave +ffffffff825ca5d0 T efi_fault +ffffffff825cb000 T vmm_probe +ffffffff825cb050 T vmm_attach +ffffffff825cb170 T vmm_activate +ffffffff825cb2b0 T vmmopen +ffffffff825cb300 T vmmclose +ffffffff825cb330 T vm_find +ffffffff825cb450 T vmmioctl +ffffffff825cb6d0 T vm_create +ffffffff825cb9a0 T vm_get_info +ffffffff825cbbf0 T vm_terminate +ffffffff825cbd60 T vm_resetcpu +ffffffff825cbe80 T vm_share_mem +ffffffff825cbfd0 T pledge_ioctl_vmm +ffffffff825cc0c0 T vm_find_vcpu +ffffffff825cc120 T vm_create_check_mem_ranges +ffffffff825cc2e0 T vm_teardown +ffffffff825cc420 T vcpu_must_stop +ffffffff825cd000 T vmm_enabled +ffffffff825cd080 T vmm_attach_machdep +ffffffff825cd230 T vmm_quiesce_vmx +ffffffff825cd400 T vmm_activate_machdep +ffffffff825cd520 T vmm_stop +ffffffff825cd650 T vmm_start +ffffffff825cd730 T vmmioctl_machdep +ffffffff825cd800 T vm_intr_pending +ffffffff825cd8a0 T vm_mprotect_ept +ffffffff825cdb20 T pledge_ioctl_vmm_machdep +ffffffff825cdb70 T vm_rwvmparams +ffffffff825cdd00 T vmm_init_pvclock +ffffffff825cddd0 T vm_rwregs +ffffffff825cdee0 T vcpu_readregs_vmx +ffffffff825ce310 T vcpu_writeregs_vmx +ffffffff825ce780 T vcpu_readregs_svm +ffffffff825cec30 T vcpu_writeregs_svm +ffffffff825cf100 T vmm_get_guest_memtype +ffffffff825cf180 T vmx_mprotect_ept +ffffffff825cf3e0 T vmx_pmap_find_pte_ept +ffffffff825cf4b0 T start_vmm_on_cpu +ffffffff825cf5d0 T stop_vmm_on_cpu +ffffffff825cf670 T vmclear_on_cpu +ffffffff825cf6f0 T vm_impl_init_vmx +ffffffff825cf800 T vm_impl_init_svm +ffffffff825cf910 T vm_impl_init +ffffffff825cf9b0 T vm_impl_deinit +ffffffff825cf9e0 T vcpu_reload_vmcs_vmx +ffffffff825cfb20 T vcpu_reset_regs_svm +ffffffff825cfeb0 T svm_setmsrbrw +ffffffff825cffc0 T svm_setmsrbr +ffffffff825d0090 T vmm_alloc_vpid +ffffffff825d01a0 T svm_setmsrbw +ffffffff825d0280 T vmx_setmsrbr +ffffffff825d0330 T vmx_setmsrbw +ffffffff825d03e0 T vmx_setmsrbrw +ffffffff825d04f0 T svm_set_clean +ffffffff825d0540 T svm_set_dirty +ffffffff825d0590 T vcpu_reset_regs_vmx +ffffffff825d0fd0 T vcpu_vmx_check_cap +ffffffff825d10d0 T vcpu_vmx_compute_ctrl +ffffffff825d12b0 T vcpu_init_vmx +ffffffff825d1650 T vcpu_deinit_vmx +ffffffff825d17d0 T vcpu_reset_regs +ffffffff825d1810 T vcpu_init_svm +ffffffff825d19a0 T vcpu_deinit_svm +ffffffff825d1ae0 T vcpu_init +ffffffff825d1ba0 T vmm_free_vpid +ffffffff825d1c10 T vcpu_deinit +ffffffff825d1c50 T vm_run +ffffffff825d1e10 T vcpu_run_vmx +ffffffff825d2620 T vcpu_run_svm +ffffffff825d2c30 T vmm_fpurestore +ffffffff825d2cf0 T vmm_fpusave +ffffffff825d2d70 T vmm_translate_gva +ffffffff825d3080 T vmm_update_pvclock +ffffffff825d3180 T vmx_get_exit_info +ffffffff825d31e0 T vmx_handle_exit +ffffffff825d3610 T vmx_instruction_error_decode +ffffffff825d37e0 T vmm_get_guest_cpu_cpl +ffffffff825d38d0 T vmx_handle_intr +ffffffff825d3960 T svm_handle_hlt +ffffffff825d39b0 T vmx_handle_hlt +ffffffff825d3a60 T svm_handle_exit +ffffffff825d3d80 T svm_handle_np_fault +ffffffff825d3f20 T vmm_handle_cpuid +ffffffff825d45c0 T svm_handle_msr +ffffffff825d4890 T svm_handle_xsetbv +ffffffff825d4930 T svm_handle_inout +ffffffff825d4a30 T vmm_inject_ud +ffffffff825d4a60 T vmm_inject_db +ffffffff825d4a90 T vmx_handle_np_fault +ffffffff825d4bf0 T vmx_handle_inout +ffffffff825d4d70 T vmx_handle_cr +ffffffff825d4f70 T vmx_handle_rdmsr +ffffffff825d5040 T vmx_handle_wrmsr +ffffffff825d52b0 T vmx_handle_xsetbv +ffffffff825d5380 T vmm_inject_gp +ffffffff825d53b0 T vmx_get_exit_qualification +ffffffff825d5410 T vmx_get_guest_faulttype +ffffffff825d54b0 T svm_get_guest_faulttype +ffffffff825d54e0 T svm_fault_page +ffffffff825d5570 T vmx_fault_page +ffffffff825d56c0 T vmm_get_guest_cpu_mode +ffffffff825d57c0 T vmx_load_pdptes +ffffffff825d5a40 T vmx_handle_cr0_write +ffffffff825d5c50 T vmx_handle_cr4_write +ffffffff825d5cf0 T vmm_handle_xsetbv +ffffffff825d5d80 T vmx_handle_misc_enable_msr +ffffffff825d5de0 T vmm_pat_is_valid +ffffffff825d5ec0 T vmm_gpa_is_valid +ffffffff825d5f30 T vmx_exit_reason_decode +ffffffff825d5f70 T svm_exit_reason_decode +ffffffff825d6d80 T vcpu_state_decode +ffffffff825d7000 T vmm_dispatch_intr +ffffffff825d7020 T vmxon +ffffffff825d7050 T vmxoff +ffffffff825d7080 T vmclear +ffffffff825d70b0 T vmptrld +ffffffff825d70e0 T vmptrst +ffffffff825d7110 T vmwrite +ffffffff825d7140 T vmread +ffffffff825d7170 T invvpid +ffffffff825d718b t invvpid_fail +ffffffff825d7192 t invvpid_ret +ffffffff825d71b0 T invept +ffffffff825d71cb t invept_fail +ffffffff825d71d2 t invept_ret +ffffffff825d71f0 T vmx_enter_guest +ffffffff825d721b t skip_init +ffffffff825d72e8 t no_l1df_msr +ffffffff825d72eb t l1df_tlb_loop +ffffffff825d7304 t l1df_tlb_done +ffffffff825d730c t l1df_load_cache +ffffffff825d7323 t done_flush +ffffffff825d73b6 t do_resume +ffffffff825d743b t fail_launch_or_resume +ffffffff825d747d t fail_launch_unknown +ffffffff825d748a t fail_launch_invalid_vmcs +ffffffff825d7497 t fail_launch_valid_vmcs +ffffffff825d74b4 t vmx_exit_handler_asm +ffffffff825d7579 t restore_host +ffffffff825d7610 T svm_enter_guest +ffffffff825d77a0 t restore_host_svm +ffffffff825d8000 T sdmmc_match +ffffffff825d8050 T sdmmc_attach +ffffffff825d8390 T sdmmc_detach +ffffffff825d8440 T sdmmc_activate +ffffffff825d8510 T sdmmc_discover_task +ffffffff825d85d0 T sdmmc_create_thread +ffffffff825d8640 T sdmmc_holds_root_device +ffffffff825d86a0 T sdmmc_task_thread +ffffffff825d8890 T sdmmc_needs_discover +ffffffff825d8940 T sdmmc_del_task +ffffffff825d89f0 T sdmmc_card_detach +ffffffff825d8ad0 T sdmmc_add_task +ffffffff825d8b50 T sdmmc_card_attach +ffffffff825d8c60 T sdmmc_enable +ffffffff825d8db0 T sdmmc_scan +ffffffff825d8e40 T sdmmc_init +ffffffff825d8f40 T sdmmc_disable +ffffffff825d90a0 T sdmmc_function_free +ffffffff825d90c0 T sdmmc_delay +ffffffff825d9110 T sdmmc_select_card +ffffffff825d9330 T sdmmc_set_bus_power +ffffffff825d94e0 T sdmmc_function_alloc +ffffffff825d9570 T sdmmc_app_command +ffffffff825d9700 T sdmmc_mmc_command +ffffffff825d9780 T sdmmc_go_idle_state +ffffffff825d9890 T sdmmc_send_if_cond +ffffffff825d99e0 T sdmmc_set_relative_addr +ffffffff825da000 T sdmmc_cisptr +ffffffff825da0a0 T sdmmc_read_cis +ffffffff825da3e0 T sdmmc_print_cis +ffffffff825da550 T sdmmc_check_cis_quirks +ffffffff825db000 T sdmmc_io_enable +ffffffff825db2a0 T sdmmc_io_reset +ffffffff825db3d0 T sdmmc_io_send_op_cond +ffffffff825db540 T sdmmc_io_scan +ffffffff825db690 T sdmmc_io_init +ffffffff825db7c0 T sdmmc_io_set_highspeed +ffffffff825dba60 T sdmmc_io_set_bus_width +ffffffff825dbcf0 T sdmmc_io_function_ready +ffffffff825dbe70 T sdmmc_io_read_1 +ffffffff825dbfc0 T sdmmc_io_function_enable +ffffffff825dc390 T sdmmc_io_write_1 +ffffffff825dc510 T sdmmc_io_function_disable +ffffffff825dc790 T sdmmc_io_attach +ffffffff825dc880 T sdmmc_print +ffffffff825dcad0 T sdmmc_submatch +ffffffff825dcb50 T sdmmc_io_detach +ffffffff825dcc00 T sdmmc_io_rw_direct +ffffffff825dcda0 T sdmmc_io_rw_extended_subr +ffffffff825dcf40 T sdmmc_io_rw_extended +ffffffff825dd340 T sdmmc_io_read_2 +ffffffff825dd4a0 T sdmmc_io_write_2 +ffffffff825dd600 T sdmmc_io_read_4 +ffffffff825dd760 T sdmmc_io_write_4 +ffffffff825dd8c0 T sdmmc_io_read_multi_1 +ffffffff825dd9b0 T sdmmc_io_write_multi_1 +ffffffff825ddaa0 T sdmmc_io_read_region_1 +ffffffff825ddb90 T sdmmc_io_write_region_1 +ffffffff825ddc80 T sdmmc_io_xchg +ffffffff825dde10 T sdmmc_intr_enable +ffffffff825de080 T sdmmc_intr_disable +ffffffff825de2f0 T sdmmc_intr_establish +ffffffff825de3f0 T sdmmc_intr_disestablish +ffffffff825de4e0 T sdmmc_card_intr +ffffffff825de530 T sdmmc_intr_task +ffffffff825de5c0 T sdmmc_io_set_blocklen +ffffffff825df000 T sdmmc_mem_enable +ffffffff825df450 T sdmmc_mem_send_op_cond +ffffffff825df600 T sdmmc_mem_signal_voltage +ffffffff825df6c0 T sdmmc_mem_scan +ffffffff825df9d0 T sdmmc_decode_csd +ffffffff825dfe00 T sdmmc_decode_cid +ffffffff825e02a0 T sdmmc_mem_send_scr +ffffffff825e03e0 T sdmmc_mem_decode_scr +ffffffff825e0440 T sdmmc_mem_send_cxd_data +ffffffff825e05b0 T sdmmc_mem_set_bus_width +ffffffff825e06c0 T sdmmc_mem_sd_switch +ffffffff825e0970 T sdmmc_be512_to_bitfield512 +ffffffff825e0a20 T sdmmc_mem_mmc_switch +ffffffff825e0b10 T sdmmc_mem_init +ffffffff825e0c60 T sdmmc_mem_set_blocklen +ffffffff825e0d60 T sdmmc_mem_sd_init +ffffffff825e1140 T sdmmc_mem_mmc_init +ffffffff825e1800 T sdmmc_mem_select_transfer_mode +ffffffff825e1880 T sdmmc_mem_execute_tuning +ffffffff825e1910 T sdmmc_mem_read_block_subr +ffffffff825e1c70 T sdmmc_mem_single_read_block +ffffffff825e1d40 T sdmmc_mem_read_block +ffffffff825e1ef0 T sdmmc_mem_write_block_subr +ffffffff825e2240 T sdmmc_mem_single_write_block +ffffffff825e2310 T sdmmc_mem_write_block +ffffffff825e24c0 T sdmmc_mem_hibernate_write +ffffffff825e3000 T sdmmc_scsi_cmd +ffffffff825e31f0 T sdmmc_minphys +ffffffff825e3270 T sdmmc_scsi_attach +ffffffff825e3460 T sdmmc_alloc_ccbs +ffffffff825e35a0 T sdmmc_free_ccbs +ffffffff825e3600 T sdmmc_scsi_detach +ffffffff825e3760 T sdmmc_stimeout +ffffffff825e37e0 T sdmmc_ccb_alloc +ffffffff825e3890 T sdmmc_ccb_free +ffffffff825e3970 T sdmmc_inquiry +ffffffff825e3be0 T sdmmc_start_xs +ffffffff825e3cd0 T sdmmc_complete_xs +ffffffff825e3da0 T sdmmc_done_xs +ffffffff825e3df0 T sdmmc_scsi_hibernate_io +ffffffff825e4000 T bwfm_sdio_preinit +ffffffff825e44a0 T bwfm_sdio_txcheck +ffffffff825e44e0 T bwfm_sdio_txdata +ffffffff825e4550 T bwfm_sdio_txctl +ffffffff825e46a0 T bwfm_sdio_buscore_read +ffffffff825e46b0 T bwfm_sdio_buscore_write +ffffffff825e46d0 T bwfm_sdio_buscore_prepare +ffffffff825e4810 T bwfm_sdio_buscore_activate +ffffffff825e4890 T bwfm_sdio_match +ffffffff825e4940 T bwfm_sdio_attach +ffffffff825e4c00 T bwfm_sdio_detach +ffffffff825e4c60 T bwfm_sdio_task +ffffffff825e4dc0 T bwfm_sdio_write_1 +ffffffff825e4df0 T bwfm_sdio_read_1 +ffffffff825e4e20 T bwfm_sdio_write_4 +ffffffff825e4ed0 T bwfm_sdio_read_4 +ffffffff825e4f80 T bwfm_sdio_load_microcode +ffffffff825e51e0 T bwfm_sdio_clkctl +ffffffff825e5310 T bwfm_sdio_dev_write +ffffffff825e5360 T bwfm_sdio_intr +ffffffff825e53a0 T bwfm_sdio_ram_read_write +ffffffff825e55d0 T bwfm_sdio_htclk +ffffffff825e5840 T bwfm_sdio_readshared +ffffffff825e5910 T bwfm_sdio_dev_read +ffffffff825e5950 T bwfm_sdio_rx_frames +ffffffff825e5d00 T bwfm_sdio_tx_frames +ffffffff825e5e00 T bwfm_sdio_backplane +ffffffff825e5eb0 T bwfm_sdio_buf_read +ffffffff825e5f90 T bwfm_sdio_buf_write +ffffffff825e6040 T bwfm_sdio_frame_read_write +ffffffff825e61c0 T bwfm_sdio_newbuf +ffffffff825e6240 T bwfm_sdio_tx_ok +ffffffff825e62a0 T bwfm_sdio_tx_ctrlframe +ffffffff825e63a0 T bwfm_sdio_tx_dataframe +ffffffff825e64f0 T bwfm_sdio_rx_glom +ffffffff825e7000 T onewire_match +ffffffff825e7050 T onewire_attach +ffffffff825e70f0 T onewire_detach +ffffffff825e7160 T onewire_activate +ffffffff825e7180 T onewire_scan +ffffffff825e73a0 T onewire_createthread +ffffffff825e7410 T onewire_print +ffffffff825e74e0 T onewirebus_print +ffffffff825e7530 T onewire_lock +ffffffff825e7550 T onewire_unlock +ffffffff825e7570 T onewire_reset +ffffffff825e7590 T onewire_bit +ffffffff825e75b0 T onewire_read_byte +ffffffff825e76f0 T onewire_write_byte +ffffffff825e77d0 T onewire_read_block +ffffffff825e7870 T onewire_write_block +ffffffff825e7910 T onewire_triplet +ffffffff825e79f0 T onewire_matchrom +ffffffff825e7b40 T onewire_search +ffffffff825e7ee0 T onewire_thread +ffffffff825e8000 T onewire_crc +ffffffff825e80b0 T onewire_crc16 +ffffffff825e8170 T onewire_famname +ffffffff825e81b0 T onewire_matchbyfam +ffffffff825e9000 T owid_match +ffffffff825e9030 T owid_attach +ffffffff825e9100 T owid_detach +ffffffff825e9140 T owid_activate +ffffffff825ea000 T owsbm_match +ffffffff825ea030 T owsbm_attach +ffffffff825ea1d0 T owsbm_detach +ffffffff825ea240 T owsbm_activate +ffffffff825ea270 T owsbm_update +ffffffff825eb000 T owtemp_match +ffffffff825eb030 T owtemp_attach +ffffffff825eb130 T owtemp_detach +ffffffff825eb1a0 T owtemp_activate +ffffffff825eb1d0 T owtemp_update +ffffffff825ec000 T owctr_match +ffffffff825ec030 T owctr_attach +ffffffff825ec180 T owctr_detach +ffffffff825ec1f0 T owctr_activate +ffffffff825ec220 T owctr_update +ffffffff825ec250 T owctr_update_counter +ffffffff825ed000 A __text_page_start +ffffffff825ed000 T Xsyscall_meltdown +ffffffff825ed00c T Xsyscall +ffffffff825ed28e t Xsyscall_trampback +ffffffff825ed2a0 T intr_user_exit +ffffffff825ed2e2 t intr_user_exit_post_ast +ffffffff825ed42e t Xiretq_trampback +ffffffff825ed43a T doreti_iret +ffffffff825ee000 T alltraps +ffffffff825ee138 T recall_trap +ffffffff825ee150 T alltraps_kern +ffffffff825ee153 T alltraps_kern_meltdown +ffffffff825ef000 ? Xsyscall32 +ffffffff825ef000 A __kutext_start +ffffffff825ef000 A __text_page_end +ffffffff825f0000 ? Xtrap00 +ffffffff825f0010 ? Xtrap01 +ffffffff825f0020 ? Xtrap02 +ffffffff825f0028 c calltrap_specstk +ffffffff825f00f0 ? calltrap_specstk_tramp +ffffffff825f0110 ? Xtrap03 +ffffffff825f0120 ? Xtrap04 +ffffffff825f0130 ? Xtrap05 +ffffffff825f0140 ? Xtrap06 +ffffffff825f0150 ? Xtrap07 +ffffffff825f0160 ? Xtrap08 +ffffffff825f0170 ? Xtrap09 +ffffffff825f0180 ? Xtrap0a +ffffffff825f0190 ? Xtrap0b +ffffffff825f01a0 ? Xtrap0c +ffffffff825f01b0 ? Xtrap0d +ffffffff825f0240 ? Xtrap0e +ffffffff825f0250 ? Xintrspurious +ffffffff825f0250 ? Xtrap0f +ffffffff825f0260 ? Xtrap10 +ffffffff825f0270 ? Xtrap11 +ffffffff825f0280 ? Xtrap12 +ffffffff825f0290 ? Xtrap13 +ffffffff825f02a0 ? Xtrap14 +ffffffff825f02b0 ? Xtrap15 +ffffffff825f02c0 ? Xtrap16 +ffffffff825f02c0 ? Xtrap17 +ffffffff825f02c0 ? Xtrap18 +ffffffff825f02c0 ? Xtrap19 +ffffffff825f02c0 ? Xtrap1a +ffffffff825f02c0 ? Xtrap1b +ffffffff825f02c0 ? Xtrap1c +ffffffff825f02c0 ? Xtrap1d +ffffffff825f02c0 ? Xtrap1e +ffffffff825f02c0 ? Xtrap1f +ffffffff825f02d0 ? x2apic_eoi +ffffffff825f02f0 ? Xintr_lapic_ipi +ffffffff825f0330 ? Xipi_invltlb +ffffffff825f0360 ? Xipi_invlpg +ffffffff825f0390 ? Xipi_invlrange +ffffffff825f03d0 ? Xipi_invltlb_pcid +ffffffff825f0410 ? Xipi_invlpg_pcid +ffffffff825f0460 ? Xipi_invlrange_pcid +ffffffff825f04d0 ? Xintr_lapic_ltimer +ffffffff825f0510 ? Xintr_xen_upcall +ffffffff825f0550 ? Xintr_hyperv_upcall +ffffffff825f0590 ? Xintr_legacy0 +ffffffff825f05d0 ? Xintr_legacy1 +ffffffff825f0610 ? Xintr_legacy2 +ffffffff825f0650 ? Xintr_legacy3 +ffffffff825f0690 ? Xintr_legacy4 +ffffffff825f06d0 ? Xintr_legacy5 +ffffffff825f0710 ? Xintr_legacy6 +ffffffff825f0750 ? Xintr_legacy7 +ffffffff825f0790 ? Xintr_legacy8 +ffffffff825f07d0 ? Xintr_legacy9 +ffffffff825f0810 ? Xintr_legacy10 +ffffffff825f0850 ? Xintr_legacy11 +ffffffff825f0890 ? Xintr_legacy12 +ffffffff825f08d0 ? Xintr_legacy13 +ffffffff825f0910 ? Xintr_legacy14 +ffffffff825f0950 ? Xintr_legacy15 +ffffffff825f0990 ? Xintr_ioapic_edge0 +ffffffff825f09d0 ? Xintr_ioapic_edge1 +ffffffff825f0a10 ? Xintr_ioapic_edge2 +ffffffff825f0a50 ? Xintr_ioapic_edge3 +ffffffff825f0a90 ? Xintr_ioapic_edge4 +ffffffff825f0ad0 ? Xintr_ioapic_edge5 +ffffffff825f0b10 ? Xintr_ioapic_edge6 +ffffffff825f0b50 ? Xintr_ioapic_edge7 +ffffffff825f0b90 ? Xintr_ioapic_edge8 +ffffffff825f0bd0 ? Xintr_ioapic_edge9 +ffffffff825f0c10 ? Xintr_ioapic_edge10 +ffffffff825f0c50 ? Xintr_ioapic_edge11 +ffffffff825f0c90 ? Xintr_ioapic_edge12 +ffffffff825f0cd0 ? Xintr_ioapic_edge13 +ffffffff825f0d10 ? Xintr_ioapic_edge14 +ffffffff825f0d50 ? Xintr_ioapic_edge15 +ffffffff825f0d90 ? Xintr_ioapic_edge16 +ffffffff825f0dd0 ? Xintr_ioapic_edge17 +ffffffff825f0e10 ? Xintr_ioapic_edge18 +ffffffff825f0e50 ? Xintr_ioapic_edge19 +ffffffff825f0e90 ? Xintr_ioapic_edge20 +ffffffff825f0ed0 ? Xintr_ioapic_edge21 +ffffffff825f0f10 ? Xintr_ioapic_edge22 +ffffffff825f0f50 ? Xintr_ioapic_edge23 +ffffffff825f0f90 ? Xintr_ioapic_edge24 +ffffffff825f0fd0 ? Xintr_ioapic_edge25 +ffffffff825f1010 ? Xintr_ioapic_edge26 +ffffffff825f1050 ? Xintr_ioapic_edge27 +ffffffff825f1090 ? Xintr_ioapic_edge28 +ffffffff825f10d0 ? Xintr_ioapic_edge29 +ffffffff825f1110 ? Xintr_ioapic_edge30 +ffffffff825f1150 ? Xintr_ioapic_edge31 +ffffffff825f1190 ? Xintr_ioapic_edge32 +ffffffff825f11d0 ? Xintr_ioapic_edge33 +ffffffff825f1210 ? Xintr_ioapic_edge34 +ffffffff825f1250 ? Xintr_ioapic_edge35 +ffffffff825f1290 ? Xintr_ioapic_edge36 +ffffffff825f12d0 ? Xintr_ioapic_edge37 +ffffffff825f1310 ? Xintr_ioapic_edge38 +ffffffff825f1350 ? Xintr_ioapic_edge39 +ffffffff825f1390 ? Xintr_ioapic_edge40 +ffffffff825f13d0 ? Xintr_ioapic_edge41 +ffffffff825f1410 ? Xintr_ioapic_edge42 +ffffffff825f1450 ? Xintr_ioapic_edge43 +ffffffff825f1490 ? Xintr_ioapic_edge44 +ffffffff825f14d0 ? Xintr_ioapic_edge45 +ffffffff825f1510 ? Xintr_ioapic_edge46 +ffffffff825f1550 ? Xintr_ioapic_edge47 +ffffffff825f1590 ? Xintr_ioapic_edge48 +ffffffff825f15d0 ? Xintr_ioapic_edge49 +ffffffff825f1610 ? Xintr_ioapic_edge50 +ffffffff825f1650 ? Xintr_ioapic_edge51 +ffffffff825f1690 ? Xintr_ioapic_edge52 +ffffffff825f16d0 ? Xintr_ioapic_edge53 +ffffffff825f1710 ? Xintr_ioapic_edge54 +ffffffff825f1750 ? Xintr_ioapic_edge55 +ffffffff825f1790 ? Xintr_ioapic_edge56 +ffffffff825f17d0 ? Xintr_ioapic_edge57 +ffffffff825f1810 ? Xintr_ioapic_edge58 +ffffffff825f1850 ? Xintr_ioapic_edge59 +ffffffff825f1890 ? Xintr_ioapic_edge60 +ffffffff825f18d0 ? Xintr_ioapic_edge61 +ffffffff825f1910 ? Xintr_ioapic_edge62 +ffffffff825f1950 ? Xintr_ioapic_edge63 +ffffffff825f1990 ? Xintr_ioapic_level0 +ffffffff825f19d0 ? Xintr_ioapic_level1 +ffffffff825f1a10 ? Xintr_ioapic_level2 +ffffffff825f1a50 ? Xintr_ioapic_level3 +ffffffff825f1a90 ? Xintr_ioapic_level4 +ffffffff825f1ad0 ? Xintr_ioapic_level5 +ffffffff825f1b10 ? Xintr_ioapic_level6 +ffffffff825f1b50 ? Xintr_ioapic_level7 +ffffffff825f1b90 ? Xintr_ioapic_level8 +ffffffff825f1bd0 ? Xintr_ioapic_level9 +ffffffff825f1c10 ? Xintr_ioapic_level10 +ffffffff825f1c50 ? Xintr_ioapic_level11 +ffffffff825f1c90 ? Xintr_ioapic_level12 +ffffffff825f1cd0 ? Xintr_ioapic_level13 +ffffffff825f1d10 ? Xintr_ioapic_level14 +ffffffff825f1d50 ? Xintr_ioapic_level15 +ffffffff825f1d90 ? Xintr_ioapic_level16 +ffffffff825f1dd0 ? Xintr_ioapic_level17 +ffffffff825f1e10 ? Xintr_ioapic_level18 +ffffffff825f1e50 ? Xintr_ioapic_level19 +ffffffff825f1e90 ? Xintr_ioapic_level20 +ffffffff825f1ed0 ? Xintr_ioapic_level21 +ffffffff825f1f10 ? Xintr_ioapic_level22 +ffffffff825f1f50 ? Xintr_ioapic_level23 +ffffffff825f1f90 ? Xintr_ioapic_level24 +ffffffff825f1fd0 ? Xintr_ioapic_level25 +ffffffff825f2010 ? Xintr_ioapic_level26 +ffffffff825f2050 ? Xintr_ioapic_level27 +ffffffff825f2090 ? Xintr_ioapic_level28 +ffffffff825f20d0 ? Xintr_ioapic_level29 +ffffffff825f2110 ? Xintr_ioapic_level30 +ffffffff825f2150 ? Xintr_ioapic_level31 +ffffffff825f2190 ? Xintr_ioapic_level32 +ffffffff825f21d0 ? Xintr_ioapic_level33 +ffffffff825f2210 ? Xintr_ioapic_level34 +ffffffff825f2250 ? Xintr_ioapic_level35 +ffffffff825f2290 ? Xintr_ioapic_level36 +ffffffff825f22d0 ? Xintr_ioapic_level37 +ffffffff825f2310 ? Xintr_ioapic_level38 +ffffffff825f2350 ? Xintr_ioapic_level39 +ffffffff825f2390 ? Xintr_ioapic_level40 +ffffffff825f23d0 ? Xintr_ioapic_level41 +ffffffff825f2410 ? Xintr_ioapic_level42 +ffffffff825f2450 ? Xintr_ioapic_level43 +ffffffff825f2490 ? Xintr_ioapic_level44 +ffffffff825f24d0 ? Xintr_ioapic_level45 +ffffffff825f2510 ? Xintr_ioapic_level46 +ffffffff825f2550 ? Xintr_ioapic_level47 +ffffffff825f2590 ? Xintr_ioapic_level48 +ffffffff825f25d0 ? Xintr_ioapic_level49 +ffffffff825f2610 ? Xintr_ioapic_level50 +ffffffff825f2650 ? Xintr_ioapic_level51 +ffffffff825f2690 ? Xintr_ioapic_level52 +ffffffff825f26d0 ? Xintr_ioapic_level53 +ffffffff825f2710 ? Xintr_ioapic_level54 +ffffffff825f2750 ? Xintr_ioapic_level55 +ffffffff825f2790 ? Xintr_ioapic_level56 +ffffffff825f27d0 ? Xintr_ioapic_level57 +ffffffff825f2810 ? Xintr_ioapic_level58 +ffffffff825f2850 ? Xintr_ioapic_level59 +ffffffff825f2890 ? Xintr_ioapic_level60 +ffffffff825f28d0 ? Xintr_ioapic_level61 +ffffffff825f2910 ? Xintr_ioapic_level62 +ffffffff825f2950 ? Xintr_ioapic_level63 +ffffffff825f3000 ? codepatch_fill_nop +ffffffff825f3000 A __cptext_start +ffffffff825f3000 A __kutext_end +ffffffff825f30b0 ? codepatch_maprw +ffffffff825f3190 ? codepatch_unmaprw +ffffffff825f3200 ? codepatch_nop +ffffffff825f3360 ? codepatch_replace +ffffffff825f3510 ? codepatch_call +ffffffff825f3530 ? codepatch_control_flow +ffffffff825f3740 ? codepatch_jmp +ffffffff825f4000 A __cptext_end +ffffffff825f4000 A __rodata_start +ffffffff825f4000 C _etext +ffffffff825f4000 C etext +ffffffff825f5000 r seeprom_read +ffffffff825f5004 r icl_mg_pll_find_divisors.div1_vals +ffffffff825f5034 r athn_ac2qid +ffffffff825f5034 r athn_ac2qid +ffffffff825f5034 r athn_ac2qid +ffffffff825f5040 r rtwn_get_rssi.cckoff +ffffffff825f5068 r rsu_ac2qid +ffffffff825f5078 r pckbc_portcmd +ffffffff825f507c r tht_fifo_write_pad.pad +ffffffff825f5084 r rsu_get_rssi.cckoff +ffffffff825f50a4 r adlp_n_revids +ffffffff825f50e8 r apple_iso_trans +ffffffff825f50f0 r wihap_check_tx.txratetable +ffffffff825f50f4 r dmamode +ffffffff825f5118 r gen9_edram_size_mb.sets +ffffffff825f512c r dg2_g12_revid_step_tbl +ffffffff825f6000 r isomappings +ffffffff825f6080 r unimappings +ffffffff825f6230 r replacements +ffffffff825f98ab r apollo_pio_rec +ffffffff826459f5 r apollo_udma33_tim +ffffffff8265aab3 r pp_r600_decoded_lanes +ffffffff8269070e r cmd680_setup_channel.udma_tbl +ffffffff82698ac6 r apollo_udma100_tim +ffffffff82698acc r cmd0646_9_tim_udma +ffffffff826a6ebc r substchar +ffffffff826fc442 r apollo_udma133_tim +ffffffff826fc449 r apollo_udma66_tim +ffffffff826fc473 r cy_pio_rec +ffffffff82701bd8 R drm_ca +ffffffff82701c00 R drm_filtops +ffffffff82701c30 R drmread_filtops +ffffffff82702000 r vga_emulops +ffffffff82702048 R vga_stdscreen +ffffffff82702078 R vga_stdscreen_mono +ffffffff827020a8 R vga_stdscreen_bf +ffffffff827020d8 R vga_40lscreen +ffffffff82702108 R vga_40lscreen_mono +ffffffff82702138 R vga_40lscreen_bf +ffffffff82702168 R vga_50lscreen +ffffffff82702198 R vga_50lscreen_mono +ffffffff827021c8 R vga_50lscreen_bf +ffffffff827021f8 R vga_screenlist +ffffffff82702208 R vga_screenlist_mono +ffffffff82702218 R vga_accessops +ffffffff82702278 r i945_wm_info +ffffffff827022b8 r bgansitopc +ffffffff827022c0 r pctoansi +ffffffff82702300 r sdma_offsets +ffffffff82702300 r sdma_offsets +ffffffff82702338 r iha_rate_tbl +ffffffff82702370 r i830_a_wm_info +ffffffff827023a8 r gen9_edram_size_mb.ways +ffffffff82702408 r aggr_periodic_times +ffffffff82702500 r michael_final.pad +ffffffff82702528 r rt_copysa.maskarray +ffffffff82702530 r i915_wm_info +ffffffff82702538 r amdgpu_ih_clientid_jpeg +ffffffff82702538 r amdgpu_ih_clientid_uvds +ffffffff82702538 r amdgpu_ih_clientid_vcns +ffffffff82702538 r amdgpu_ih_clientid_vcns +ffffffff82702538 r amdgpu_ih_clientid_vcns +ffffffff82702568 r jsl_ehl_revids +ffffffff82702578 r vga_setfontset.cmaptabb +ffffffff827025e8 r i830_bc_wm_info +ffffffff82702650 r hsw_activate_psr2.map +ffffffff82702658 r tgl_revids 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ciss_switch +ffffffff82710030 R ciss_level +ffffffff82710050 R ciss_stat +ffffffff82711000 R ami_switch +ffffffff82711028 R ami_raw_switch +ffffffff82712000 R mfi_switch +ffffffff82712028 R mfi_pd_switch +ffffffff82712050 r mfi_iop_xscale +ffffffff82712080 r mfi_iop_ppc +ffffffff827120b0 r mfi_iop_gen2 +ffffffff827120e0 r mfi_iop_skinny +ffffffff82712110 r mfi_bbu_indicators +ffffffff82713000 R qlw_switch +ffffffff82714000 R isp_2100_risc_code +ffffffff82726bf0 R isp_2200_risc_code +ffffffff82739990 R isp_2300_risc_code +ffffffff82753408 R qla_switch +ffffffff82753430 r qla_regs_2100 +ffffffff82753460 r qla_regs_2200 +ffffffff82753490 r qla_regs_23XX +ffffffff82754000 R ahci_atascsi_methods +ffffffff82755000 R nvme_switch +ffffffff82755028 r nvme_ops +ffffffff82756000 R mpi_switch +ffffffff82756060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff82756090 r chv_oa_mux_regs +ffffffff827560b0 r fiji_clock_stretcher_lookup_table +ffffffff827560b0 r tonga_clock_stretcher_lookup_table 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hpt366_pio +ffffffff82756800 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff82756820 r ether_crc32_be_update.rev +ffffffff82756820 r rtw_grf5101_mac_crypt.caesar +ffffffff82756870 r snb_b_fdi_train_param +ffffffff82756940 r intel_hpll_vco.elk_vco +ffffffff82756960 r icl_revids +ffffffff827569c0 r pin_offsets +ffffffff827569e0 r amdgpu_ih_srcid_jpeg +ffffffff82756a20 r firmware_list +ffffffff82756a80 r atom_arg_shift +ffffffff82756a80 r atom_arg_shift +ffffffff82756ac0 r pf_syncookie_wstab +ffffffff82756ae0 r ieee80211_media_init.mopts +ffffffff82756b40 r add_entropy_words.twist_table +ffffffff82756be0 r urtw_8225v2_txpwr_cck +ffffffff82756c00 r bwfm_pci_prio2fifo +ffffffff82756c00 r ieee80211_up_to_ac.up_to_ac +ffffffff82756cc0 r paritytab +ffffffff82756cc0 r x86emu_parity_tab +ffffffff82756ce0 r legacy_connector_convert +ffffffff82756d20 r gen7_oa_mux_regs +ffffffff82756d40 r hsw_oa_mux_regs +ffffffff82756d60 r notetab +ffffffff82756d80 r urtw_8225v2_txpwr_cck_ch14 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drm_calculate_luminance_range.pre_computed_values +ffffffff82758000 R sili_atascsi_methods +ffffffff82759000 R ncr53c9x_switch +ffffffff8275a000 r scf_period +ffffffff8275b000 R siop_script +ffffffff8275b5a0 R lun_switch +ffffffff8275b5d0 R tag_switch +ffffffff8275b660 R load_dsa +ffffffff8275b6c4 R siop_led_on +ffffffff8275b6cc R siop_led_off +ffffffff8275b6d8 R siop_switch +ffffffff8275c000 R ep_vortex_media +ffffffff8275c100 R ep_default_to_media +ffffffff8275d000 R wi_card_ident +ffffffff8275f000 R ucode_table +ffffffff82760000 r re_revisions +ffffffff82760290 r re_kstats_tpl +ffffffff82762000 R smc91cxx_media +ffffffff82762010 R smc91cxx_mii_bitbang_ops +ffffffff82763000 R dl10019_mii_bitbang_ops +ffffffff82763028 R dl10022_mii_bitbang_ops +ffffffff82764000 R ax88190_mii_bitbang_ops +ffffffff82766000 R ac97_audio_default +ffffffff82766020 R ac97_on_off +ffffffff82766324 R ac97_mic_select +ffffffff82766628 R ac97_mono_select +ffffffff8276692c R ac97_source +ffffffff82766c30 R ac97_volume_stereo +ffffffff82766c4c R ac97_volume_mono +ffffffff82766c70 R source_info +ffffffff82767470 R ac97_ad +ffffffff82767580 R ac97_ak +ffffffff82767610 R ac97_av +ffffffff82767750 R ac97_rl +ffffffff827677a0 R ac97_cm +ffffffff82767820 R ac97_cr +ffffffff82767840 R ac97_cs +ffffffff82767920 R ac97_cx +ffffffff82767980 R ac97_dt +ffffffff827679a0 R ac97_em +ffffffff827679d0 R ac97_es +ffffffff827679f0 R ac97_is +ffffffff82767a10 R ac97_ic +ffffffff82767a90 R ac97_it +ffffffff82767ac0 R ac97_ns +ffffffff82767b80 R ac97_ps +ffffffff82767bb0 R ac97_sl +ffffffff82767bd0 R ac97_st +ffffffff82767d20 R ac97_vi +ffffffff82767d50 R ac97_tt +ffffffff82767dd0 R ac97_ti +ffffffff82767df0 R ac97_wb +ffffffff82767e10 R ac97_wo +ffffffff82767ea0 R ac97_ym +ffffffff82767ef0 R ac97_vendors +ffffffff827681f0 R ac97enhancement +ffffffff827682f0 R ac97feature +ffffffff82769000 R lm_chips +ffffffff82769020 R lm78_sensors +ffffffff827691a0 R w83627hf_sensors +ffffffff827693a0 R w83627ehf_sensors +ffffffff827695c0 R w83627dhg_sensors +ffffffff827697c0 R nct6776f_sensors +ffffffff82769a00 R nct6779d_sensors +ffffffff82769d60 R w83637hf_sensors +ffffffff82769f20 R w83697hf_sensors +ffffffff8276a0c0 R w83781d_sensors +ffffffff8276a280 R w83782d_sensors +ffffffff8276a480 R w83783s_sensors +ffffffff8276a600 R w83791d_sensors +ffffffff8276a860 R w83792d_sensors +ffffffff8276aae0 R as99127f_sensors +ffffffff8276b000 r ar5k_known_products +ffffffff8276b110 r ar5111_gain_opt +ffffffff8276b1e0 r ar5112_gain_opt +ffffffff8276b2b0 r ar5k_5ghz_channels +ffffffff8276ba00 r ar5k_2ghz_channels +ffffffff8276bf10 r ar5111_rf +ffffffff8276c350 r ar5112a_rf +ffffffff8276c890 r ar5112_rf +ffffffff8276cda0 r ar5413_rf +ffffffff8276d1b0 r ar2413_rf +ffffffff8276d4d0 r ar2425_rf +ffffffff8276d830 r ar5111_rfg +ffffffff8276db30 r ar5112_rfg +ffffffff8276de30 r ar5413_rfg +ffffffff8276e130 r ar2413_rfg +ffffffff8276e430 r ar5k_rt_11a +ffffffff8276e552 r ar5k_rt_11b +ffffffff8276e674 r ar5k_rt_11g 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ar5416_bb_rfgain_vals_2g +ffffffff82777340 r ar5416_bb_rfgain_vals_5g +ffffffff82777440 r ar5416_bank6_vals +ffffffff827774c0 r ar9160_regs +ffffffff82777540 r ar9160_vals_5g20 +ffffffff82777640 r ar9160_vals_5g40 +ffffffff82777740 r ar9160_vals_2g40 +ffffffff82777840 r ar9160_vals_2g20 +ffffffff82777940 r ar9160_cm_regs +ffffffff82777c30 r ar9160_cm_vals +ffffffff82778210 r ar5416_regs +ffffffff82778290 r ar5416_vals_5g20 +ffffffff82778390 r ar5416_vals_5g40 +ffffffff82778490 r ar5416_vals_2g40 +ffffffff82778590 r ar5416_vals_2g20 +ffffffff82778690 r ar5416_cm_regs +ffffffff82778980 r ar5416_cm_vals +ffffffff82778f60 r ar5416_serdes_regs +ffffffff82778f90 r ar5416_serdes_vals +ffffffff82778fc0 r ar9160_1_1_addac_vals +ffffffff82779040 r ar9160_1_0_addac_vals +ffffffff827790c0 r ar5416_2_2_addac_vals +ffffffff82779150 r ar5416_2_1_addac_vals +ffffffff8277a000 r ar9280_2_0_ini +ffffffff8277a068 r ar9280_2_0_serdes +ffffffff8277a080 r ar9280_2_0_rx_gain_23db_backoff +ffffffff8277a0a0 r ar9280_2_0_rx_gain_13db_backoff +ffffffff8277a0c0 r ar9280_2_0_rx_gain +ffffffff8277a0e0 r ar9280_2_0_tx_gain_high_power +ffffffff8277a100 r ar9280_2_0_tx_gain +ffffffff8277a120 r ar9280_init_from_rom.chainoffset +ffffffff8277a130 r ar9280_2_0_regs +ffffffff8277a190 r ar9280_2_0_vals_5g20 +ffffffff8277a250 r ar9280_2_0_vals_5g40 +ffffffff8277a310 r ar9280_2_0_vals_2g40 +ffffffff8277a3d0 r ar9280_2_0_vals_2g20 +ffffffff8277a490 r ar9280_2_0_cm_regs +ffffffff8277a740 r ar9280_2_0_cm_vals +ffffffff8277ac90 r ar9280_2_0_fast_clock_regs +ffffffff8277acb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff8277acf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff8277ad30 r ar9280_2_0_serdes_regs +ffffffff8277ad60 r ar9280_2_0_serdes_vals +ffffffff8277ad90 r ar9280_2_0_rx_gain_regs +ffffffff8277aea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff8277b0b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff8277b2c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff8277b4d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g +ffffffff8277b6e0 r ar9280_2_0_rx_gain_vals_5g +ffffffff8277b8f0 r ar9280_2_0_rx_gain_vals_2g +ffffffff8277bb00 r ar9280_2_0_tx_gain_regs +ffffffff8277bb40 r ar9280_2_0_tx_gain_high_power_vals_5g +ffffffff8277bbc0 r ar9280_2_0_tx_gain_high_power_vals_2g +ffffffff8277bc40 r ar9280_2_0_tx_gain_vals_5g +ffffffff8277bcc0 r ar9280_2_0_tx_gain_vals_2g +ffffffff8277c000 r ar9271_ini +ffffffff8277c068 r ar9285_1_2_ini +ffffffff8277c0d0 r ar9280_2_0_serdes +ffffffff8277c0e8 r ar9271_tx_gain_high_power +ffffffff8277c108 r ar9271_tx_gain +ffffffff8277c128 r ar9285_2_0_tx_gain_high_power +ffffffff8277c148 r ar9285_2_0_tx_gain +ffffffff8277c168 r ar9285_1_2_tx_gain_high_power +ffffffff8277c188 r ar9285_1_2_tx_gain +ffffffff8277c1b0 r ar9271_regs +ffffffff8277c410 r ar9271_vals_2g40 +ffffffff8277c8d0 r ar9271_vals_2g20 +ffffffff8277cd90 r ar9271_cm_regs +ffffffff8277d020 r ar9271_cm_vals +ffffffff8277d540 r ar9285_1_2_regs +ffffffff8277d7a0 r ar9285_1_2_vals_2g40 +ffffffff8277dc60 r ar9285_1_2_vals_2g20 +ffffffff8277e120 r ar9285_1_2_cm_regs +ffffffff8277e3a0 r ar9285_1_2_cm_vals +ffffffff8277e890 r ar9280_2_0_serdes_regs +ffffffff8277e8c0 r ar9280_2_0_serdes_vals +ffffffff8277e8f0 r ar9271_tx_gain_regs +ffffffff8277e940 r ar9271_tx_gain_high_power_vals_2g +ffffffff8277e9d0 r ar9271_tx_gain_vals_2g +ffffffff8277ea60 r ar9285_1_2_tx_gain_regs +ffffffff8277eab0 r ar9285_2_0_tx_gain_high_power_vals_2g +ffffffff8277eb50 r ar9285_2_0_tx_gain_vals_2g +ffffffff8277ebf0 r ar9285_1_2_tx_gain_high_power_vals_2g +ffffffff8277ec90 r ar9285_1_2_tx_gain_vals_2g +ffffffff8277f000 r ar9287_1_1_ini +ffffffff8277f068 r ar9280_2_0_serdes +ffffffff8277f080 r ar9287_1_1_rx_gain +ffffffff8277f0a0 r ar9287_1_1_tx_gain +ffffffff8277f0c0 r ar9287_1_1_regs +ffffffff8277f120 r ar9287_1_1_vals_2g40 +ffffffff8277f1d0 r ar9287_1_1_vals_2g20 +ffffffff8277f280 r ar9287_1_1_cm_regs +ffffffff8277f560 r ar9287_1_1_cm_vals +ffffffff8277fb20 r ar9280_2_0_serdes_regs +ffffffff8277fb50 r ar9280_2_0_serdes_vals +ffffffff8277fb80 r ar9287_1_1_rx_gain_regs +ffffffff8277fd90 r ar9287_1_1_rx_gain_vals_2g +ffffffff827801a0 r ar9287_1_1_tx_gain_regs +ffffffff82780200 r ar9287_1_1_tx_gain_vals_2g +ffffffff82781000 r athn_rates +ffffffff82782000 r ar9485_1_1_ini +ffffffff82782068 r ar9485_1_1_serdes +ffffffff82782080 r ar9380_2_2_ini +ffffffff827820e8 r ar9380_2_2_serdes +ffffffff82782100 r ar9380_2_2_rx_gain_wo_xlna +ffffffff82782120 r ar9380_2_2_rx_gain +ffffffff82782140 r ar9485_1_1_rx_gain +ffffffff82782160 r ar9380_2_2_tx_gain_high_ob_db +ffffffff82782180 r ar9380_2_2_tx_gain_low_ob_db +ffffffff827821a0 r ar9380_2_2_tx_gain_high_power +ffffffff827821c0 r ar9380_2_2_tx_gain +ffffffff827821e0 r ar9485_1_1_tx_gain +ffffffff82782200 r ar9485_1_1_regs +ffffffff82782270 r ar9485_1_1_vals_2g40 +ffffffff82782350 r ar9485_1_1_vals_2g20 +ffffffff82782430 r ar9485_1_1_cm_regs +ffffffff82782720 r ar9485_1_1_cm_vals +ffffffff82782d00 r ar9485_1_1_serdes_regs +ffffffff82782d0c r ar9485_1_1_serdes_vals +ffffffff82782d20 r ar9380_2_2_regs +ffffffff82782db0 r ar9380_2_2_vals_5g20 +ffffffff82782ed0 r ar9380_2_2_vals_5g40 +ffffffff82782ff0 r ar9380_2_2_vals_2g40 +ffffffff82783110 r ar9380_2_2_vals_2g20 +ffffffff82783230 r ar9380_2_2_cm_regs +ffffffff827835d0 r ar9380_2_2_cm_vals +ffffffff82783d00 r ar9380_2_2_fast_clock_regs +ffffffff82783d20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff82783d50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff82783d74 r ar9380_2_2_serdes_regs +ffffffff82783d80 r ar9380_2_2_serdes_vals +ffffffff82783d90 r ar9380_2_2_rx_gain_regs +ffffffff82783f90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff82784390 r ar9380_2_2_rx_gain_vals +ffffffff82784790 r ar9485_1_1_rx_gain_regs +ffffffff82784890 r ar9485_1_1_rx_gain_vals +ffffffff82784a90 r ar9380_2_2_tx_gain_regs +ffffffff82784b60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff82784d00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff82784ea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff82785040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff827851e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff82785380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff82785520 r ar9380_2_2_tx_gain_vals_5g +ffffffff827856c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff82785860 r ar9485_1_1_tx_gain_regs +ffffffff827858f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff82785a10 r ar9380_def_rom +ffffffff82785e50 r ar9380_def_rom_h112 +ffffffff82786290 r ar9380_def_rom_h116 +ffffffff827866d0 r ar9380_def_rom_x112 +ffffffff82786b10 r ar9380_def_rom_x113 +ffffffff82787000 R atw_txthresh_tab_lo +ffffffff82787050 R atw_txthresh_tab_hi +ffffffff827870a0 r atw_attach.empty_macaddr +ffffffff827870b0 r atw_attach.type_strings +ffffffff827870d0 r atw_rfmd2958_ifn +ffffffff82787110 r atw_rfmd2958_rf1r +ffffffff82787150 r atw_rxintr.rate_tbl +ffffffff82788000 r rtw_identify_sta.empty_macaddr +ffffffff82789000 r rtwn_set_key.etherzeroaddr +ffffffff82789010 r rtl8188eu_rf_prog +ffffffff82789030 r rtl8188ftv_rf_prog +ffffffff82789050 r rtl8192e_rf_prog +ffffffff82789080 r rtl8188ce_rf_prog +ffffffff827890a0 r rtl8188ru_rf_prog +ffffffff827890c0 r rtl8188cu_rf_prog +ffffffff827890e0 r rtl8192ce_rf_prog +ffffffff82789110 r rtl8188ru_txagc +ffffffff82789170 r rtl8188eu_rf_regs +ffffffff82789230 r rtl8188eu_rf_vals +ffffffff827893b0 r rtl8188ftv_rf_regs +ffffffff82789490 r rtl8188ftv_rf_vals +ffffffff82789640 r rtl8192e_rf_regs +ffffffff82789710 r rtl8192e_rf_vals +ffffffff827898b0 r rtl8192e_rf2_regs +ffffffff82789950 r rtl8192e_rf2_vals +ffffffff82789a90 r rtl8192ce_rf1_regs +ffffffff82789bb0 r rtl8188ce_rf_vals +ffffffff82789df0 r rtl8188ru_rf_vals +ffffffff8278a030 r rtl8188cu_rf_vals +ffffffff8278a270 r rtl8192ce_rf1_vals +ffffffff8278a4b0 r rtl8192ce_rf2_regs +ffffffff8278a500 r rtl8192ce_rf2_vals +ffffffff8278a5a0 r rtl8192cu_txagc +ffffffff8278b000 r rt2560_rf2522_r2 +ffffffff8278b040 r rt2560_rf2524_r2 +ffffffff8278b080 r rt2560_rf2525_hi_r2 +ffffffff8278b0c0 r rt2560_rf2525_r2 +ffffffff8278b100 r rt2560_rf2525e_r2 +ffffffff8278b140 r rt2560_rf2526_hi_r2 +ffffffff8278b180 r rt2560_rf2526_r2 +ffffffff8278b1c0 r rt2560_def_bbp +ffffffff8278b200 r rt2560_def_mac +ffffffff8278c000 r rt2661_rf5225_1 +ffffffff8278c300 r rt2661_rf5225_2 +ffffffff8278c600 r rt2661_def_bbp +ffffffff8278c640 r rt2661_def_mac +ffffffff8278d000 r rt2860_rf2850 +ffffffff8278d430 r rt2860_rates +ffffffff8278d4f0 r rt3572_def_rf +ffffffff8278d530 r rt3090_def_rf +ffffffff8278d560 r rt5392_def_rf +ffffffff8278d5e0 r rt3290_def_rf +ffffffff8278d640 r rt5390_def_rf +ffffffff8278d6c0 r rt5390_def_bbp +ffffffff8278d6f0 r rt2860_def_mac +ffffffff8278f000 r acx111_reg +ffffffff8278f040 r acx111_rate_map +ffffffff82790000 r acx100_reg +ffffffff82790040 r acx100_txpower_rfmd +ffffffff82790060 r gen8_rcs_offsets +ffffffff82790090 r acx100_txpower_maxim +ffffffff827900b0 r mtl_rcs_offsets +ffffffff827900f0 r digits +ffffffff827900f0 r pppdumpb.digits +ffffffff827900f0 r pppdumpm.digits +ffffffff82790140 r hangpic +ffffffff82790180 r gen11_rcs_offsets +ffffffff827901b0 r xehp_rcs_offsets +ffffffff827901e0 r dg2_rcs_offsets +ffffffff82790220 r dg2_xcs_offsets +ffffffff82790250 r gen12_xcs_offsets +ffffffff82791000 r trinity_override_mgpg_sequences +ffffffff827913c0 r voltage_swing_to_pre_emphasis +ffffffff827913d0 r sgpr_init_compute_shader +ffffffff827914a0 r intel_hpll_vco.cl_vco +ffffffff827914c0 r vgpr_init_compute_shader +ffffffff82792000 r malo_cmd_string.cmds +ffffffff827920b0 r malo_cmd_string_result.results +ffffffff82793000 R bwi_vendor_led_act +ffffffff8279300c R bwi_default_led_act +ffffffff82793010 R bwi_led_duration +ffffffff82793380 r bwi_sup_bphy +ffffffff827933c0 r bwi_phy_freq_11g_rev1 +ffffffff827935c0 r bwi_phy_rotor_11g_rev1 +ffffffff827936a0 r bwi_phy_noise_scale_11g_rev2 +ffffffff827936e0 r bwi_phy_noise_scale_11g_rev7 +ffffffff82793720 r bwi_phy_noise_scale_11g +ffffffff82793760 r bwi_phy_sigma_sq_11g_rev2 +ffffffff827937d0 r bwi_phy_sigma_sq_11g_rev7 +ffffffff82793840 r bwi_phy_delay_11g_rev1 +ffffffff82793920 r bwi_rf_get_gains.save_phy_regs +ffffffff82793940 r bwi_rf_lo_find.map +ffffffff82793960 r bwi_txpower_map_11b +ffffffff827939a0 r bwi_txpower_map_11g +ffffffff827939e0 r _bwi_rf_lo_update_11g.rf_atten_list +ffffffff82793a20 r _bwi_rf_lo_update_11g.rf_atten_init_list +ffffffff82793a60 r _bwi_rf_lo_update_11g.rf_lo_measure_order +ffffffff82793aa0 r bwi_rf_set_nrssi_ofs_11g.save_phy_comm_regs +ffffffff82793ac0 r bwi_bbpid_map +ffffffff82793af0 r bwi_regwin_count +ffffffff82793b40 r bwi_clkfreq +ffffffff82793b58 r bwi_zero_addr +ffffffff82794000 R uhci_bus_methods +ffffffff82794030 R uhci_root_ctrl_methods +ffffffff82794060 R uhci_root_intr_methods +ffffffff82794090 R uhci_device_ctrl_methods +ffffffff827940c0 R uhci_device_intr_methods +ffffffff827940f0 R uhci_device_bulk_methods +ffffffff82794120 R uhci_device_isoc_methods +ffffffff82794150 R uhci_devd +ffffffff82794162 R uhci_confd +ffffffff8279416b R uhci_ifcd +ffffffff82794174 R uhci_endpd +ffffffff8279417b R uhci_hubd_piix +ffffffff82795000 R revbits +ffffffff82795020 R ohci_bus_methods +ffffffff82795050 R ohci_root_ctrl_methods +ffffffff82795080 R ohci_root_intr_methods +ffffffff827950b0 R ohci_device_ctrl_methods +ffffffff827950e0 R ohci_device_intr_methods +ffffffff82795110 R ohci_device_bulk_methods +ffffffff82795140 R ohci_device_isoc_methods +ffffffff82795170 R ohci_devd +ffffffff82795182 R ohci_confd +ffffffff8279518b R ohci_ifcd +ffffffff82795194 R ohci_endpd +ffffffff8279519b R ohci_hubd +ffffffff82796000 R ehci_bus_methods +ffffffff82796030 R ehci_root_ctrl_methods +ffffffff82796060 R ehci_root_intr_methods +ffffffff82796090 R ehci_device_ctrl_methods +ffffffff827960c0 R ehci_device_intr_methods +ffffffff827960f0 R ehci_device_bulk_methods +ffffffff82796120 R ehci_device_isoc_methods +ffffffff82796150 R ehci_devd +ffffffff82796162 R ehci_odevd +ffffffff8279616c R ehci_confd +ffffffff82796175 R ehci_ifcd +ffffffff8279617e R ehci_endpd +ffffffff82796185 R ehci_hubd +ffffffff82797000 R xhci_bus_methods +ffffffff82797030 R xhci_root_ctrl_methods +ffffffff82797060 R xhci_root_intr_methods +ffffffff82797090 R xhci_device_ctrl_methods +ffffffff827970c0 R xhci_device_intr_methods +ffffffff827970f0 R xhci_device_bulk_methods +ffffffff82797120 R xhci_device_isoc_methods +ffffffff82797150 R xhci_devd +ffffffff82797162 R xhci_confd +ffffffff8279716b R xhci_ifcd +ffffffff82797174 R xhci_endpd +ffffffff8279717b R xhci_endpcd +ffffffff82797181 R xhci_hubd +ffffffff8279a000 R radio_ca +ffffffff8279b000 R ipmi_ca +ffffffff8279c000 R vscsi_ca +ffffffff8279c028 R vscsi_switch +ffffffff8279c050 R vscsi_filtops +ffffffff8279d000 R mpath_ca +ffffffff8279d028 R mpath_switch +ffffffff8279e000 R softraid_ca +ffffffff8279e028 R sr_switch +ffffffff8279f000 r spdmem_basic_types +ffffffff8279f0a0 r spdmem_parity_types +ffffffff8279f0e0 r spdmem_ddr4_decode.ddr4_chipsize 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+ffffffff827a6000 r fqcodel_ops +ffffffff827a6038 R ifq_fqcodel_ops +ffffffff827a6040 r fqcodel_pf_ops +ffffffff827a6088 R pfq_fqcodel_ops +ffffffff827a6090 r codel_intervals +ffffffff827a7000 r pfsync_bulk_req_state_names +ffffffff827a7030 r pfsync_bulk_req_event_names +ffffffff827a7060 r pfsync_qs +ffffffff827a70d8 r pfsync_kstat_tpl +ffffffff827a72e0 r pfsync_acts +ffffffff827a8000 r bio_mappings_RBT_INFO +ffffffff827a8018 R bio_mappings_RBT_TYPE +ffffffff827a9000 R hotplugread_filtops +ffffffff827aa000 R dtps_static +ffffffff827ab000 R db_show_all_cmds +ffffffff827ab180 R db_show_cmds +ffffffff827ab4c0 R db_boot_cmds +ffffffff827ab5a0 R db_command_table +ffffffff827ac000 R ddb_vars +ffffffff827ad000 R audio_ca +ffffffff827ad028 R audioctlread_filtops +ffffffff827ad058 R audiowrite_filtops +ffffffff827ad088 R audioread_filtops +ffffffff827ae000 R midi_ca +ffffffff827ae028 R midiwrite_filtops +ffffffff827ae058 R midiread_filtops +ffffffff827af000 r mulawtolin16 +ffffffff827af200 r lintomulaw +ffffffff827b0000 R randomread_filtops +ffffffff827b0030 R randomwrite_filtops +ffffffff827b1000 R video_ca +ffffffff827b1028 R video_filtops +ffffffff827b2000 R cd9660_vfsops +ffffffff827b3000 R cd9660_vops +ffffffff827b3110 R cd9660_specvops +ffffffff827b3220 R cd9660_fifovops +ffffffff827b3330 R cd9660read_filtops +ffffffff827b3360 R cd9660write_filtops +ffffffff827b3390 R cd9660vnode_filtops +ffffffff827b4000 R udf_vfsops +ffffffff827b5000 R udf_vops +ffffffff827b5110 r mon_lens +ffffffff827b6000 r month_days +ffffffff827b7000 R execsw +ffffffff827b8000 r shstrtab +ffffffff827b9000 R copyright +ffffffff827b90c0 r initpaths +ffffffff827ba000 R sysent +ffffffff827bc000 R bufq_impls +ffffffff827bd000 R kqueueops +ffffffff827bd038 R kqread_filtops +ffffffff827bd068 R proc_filtops +ffffffff827bd098 R file_filtops +ffffffff827bd0c8 R timer_filtops +ffffffff827bd100 R sysfilt_ops +ffffffff827bd148 R seltrue_filtops +ffffffff827bd178 R dead_filtops +ffffffff827bd1a8 R badfd_filtops +ffffffff827bd1d8 r mutex_klistops +ffffffff827bd1f0 r rwlock_klistops +ffffffff827be000 R kv_exec +ffffffff827bf000 R addrmask +ffffffff827c0000 r rw_ops +ffffffff827c1000 r proc_printit.pstat +ffffffff827c2000 R pledge_syscalls +ffffffff827c2a60 r pledgenames +ffffffff827c2cb0 r pledgereq +ffffffff827c3000 r unvname_rbt_RBT_INFO +ffffffff827c3018 R unvname_rbt_RBT_TYPE +ffffffff827c4000 R sig_filtops +ffffffff827c4030 R sigprop +ffffffff827c5000 R kern_vars +ffffffff827c52f0 R hw_vars +ffffffff827c6000 R tc_vars +ffffffff827c7000 r sys_gettimeofday.zerotz +ffffffff827c8000 r taskq_sys_name +ffffffff827c8006 r taskq_sys_mp_name +ffffffff827c8010 R systq +ffffffff827c8018 R systqmp +ffffffff827ca000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff827ca010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff827ca020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff827ca030 r gpt_get_fstype.gpt_uuid_linux +ffffffff827ca040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff827ca050 r gpt_get_fstype.gpt_uuid_unused +ffffffff827ca060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff827ca070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff827cb000 r hiballoc_addr_RBT_INFO +ffffffff827cb018 R hiballoc_addr_RBT_TYPE +ffffffff827cc000 R logread_filtops +ffffffff827cd000 r phtree_RBT_INFO +ffffffff827cd018 R phtree_RBT_TYPE +ffffffff827cd020 r pool_lock_ops_rw +ffffffff827cd058 r pool_lock_ops_mtx +ffffffff827ce000 r pselregister.evf +ffffffff827ce00c r pselregister.evff +ffffffff827cf000 R pipe_rfiltops +ffffffff827cf030 R pipe_wfiltops +ffffffff827cf060 R pipe_efiltops +ffffffff827cf090 r pipeops +ffffffff827d0000 R socketops +ffffffff827d1000 R sysvsem_vars +ffffffff827d2000 R char_type +ffffffff827d2100 R ttyread_filtops +ffffffff827d2130 R ttywrite_filtops +ffffffff827d2160 R ttyexcept_filtops +ffffffff827d3000 R ptcread_filtops +ffffffff827d3030 R ptcwrite_filtops +ffffffff827d3060 R ptcexcept_filtops +ffffffff827d5000 R domains +ffffffff827d6000 R unixdomain +ffffffff827d6050 R unixsw +ffffffff827d7000 R soread_filtops +ffffffff827d7030 R sowrite_filtops +ffffffff827d7060 R soexcept_filtops +ffffffff827d8000 R sun_noname +ffffffff827d8010 R uipc_usrreqs +ffffffff827d80b8 R uipc_dgram_usrreqs +ffffffff827d8160 R unpstctl_vars +ffffffff827d8190 R unpsqctl_vars +ffffffff827d81c0 R unpdgctl_vars +ffffffff827d9000 r namecache_rb_cache_RBT_INFO +ffffffff827d9018 R namecache_rb_cache_RBT_TYPE +ffffffff827da000 R generic_filtops +ffffffff827db000 r buf_rb_bufs_RBT_INFO +ffffffff827db018 R buf_rb_bufs_RBT_TYPE +ffffffff827db020 r typename +ffffffff827dc000 R sync_vops +ffffffff827dd000 R vnops +ffffffff827de000 R spec_vops +ffffffff827df000 R dead_vops +ffffffff827e0000 R fifo_vops +ffffffff827e0110 R fiforead_filtops +ffffffff827e0140 R fifowrite_filtops +ffffffff827e0170 R fifoexcept_filtops +ffffffff827e1000 R regyear +ffffffff827e1020 R leapyear +ffffffff827e1040 r dos2unix +ffffffff827e1140 r u2l +ffffffff827e1240 r unix2dos +ffffffff827e2008 R msdosfs_vfsops +ffffffff827e3000 R msdosfs_vops +ffffffff827e3110 R msdosfsread_filtops +ffffffff827e3140 R msdosfswrite_filtops +ffffffff827e3170 R msdosfsvnode_filtops +ffffffff827e4000 r _utf_count +ffffffff827e5000 R ntfs_vfsops +ffffffff827e6000 R ntfs_vops +ffffffff827e7000 R bpfread_filtops +ffffffff827e7030 R bpf_mbuf_ops +ffffffff827e8000 r bpf_mem_ops +ffffffff827e9000 R priq_ops +ffffffff827e9038 R ifq_priq_ops +ffffffff827e9040 r ifq_kstat_tpl +ffffffff827e9180 r ifiq_kstat_tpl +ffffffff827ea000 r ether_crc32_le_update.crctab +ffffffff827ea040 r ether_crc32_be_update.crctab +ffffffff827eb000 r lcp +ffffffff827eb078 r ipcp +ffffffff827eb0f0 r ipv6cp +ffffffff827eb168 r chap +ffffffff827eb1e0 r pap +ffffffff827ec000 R ifmedia_baudrate_descriptions +ffffffff827ed000 r fcstab +ffffffff827ef000 R tunread_filtops +ffffffff827ef030 R tunwrite_filtops +ffffffff827f0000 R bridge_brport +ffffffff827f1000 R bstp_etheraddr +ffffffff827f2000 r eb_tree_RBT_INFO +ffffffff827f2018 R eb_tree_RBT_TYPE +ffffffff827f3000 r veb_etherbridge_ops +ffffffff827f3028 r veb_pf_ipv4 +ffffffff827f3040 r veb_pf_ipv6 +ffffffff827f4000 r pipex_pppoe_padding +ffffffff827f5000 r rn_addmask.normal_chars +ffffffff827f6000 R route_src +ffffffff827f6010 R route_usrreqs +ffffffff827f60b8 R routedomain +ffffffff827f6100 R routesw +ffffffff827f7000 R gre_vars +ffffffff827f7030 r mgre_tree_RBT_INFO +ffffffff827f7048 R mgre_tree_RBT_TYPE +ffffffff827f7050 r egre_tree_RBT_INFO +ffffffff827f7068 R egre_tree_RBT_TYPE +ffffffff827f7070 r nvgre_ucast_tree_RBT_INFO +ffffffff827f7088 R nvgre_ucast_tree_RBT_TYPE +ffffffff827f7090 r nvgre_mcast_tree_RBT_INFO +ffffffff827f70a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff827f70b0 r eoip_tree_RBT_INFO +ffffffff827f70c8 R eoip_tree_RBT_TYPE +ffffffff827f70d0 r nvgre_etherbridge_ops +ffffffff827f8000 r trunk_protos +ffffffff827f9000 R ethermulticastaddr_slowprotocols +ffffffff827f9006 R lacp_info_tlv_template +ffffffff827f900e R marker_info_tlv_template +ffffffff827f9012 R marker_response_tlv_template +ffffffff827f9020 R lacp_timer_funcs +ffffffff827fa000 r lacp_rxm_state_names +ffffffff827fa040 r lacp_rxm_event_names +ffffffff827fa090 r aggr_port_selected_names +ffffffff827fa0b0 r lacp_mux_state_names +ffffffff827fa0e0 r lacp_mux_event_names +ffffffff827fa128 r lacp_address_slow +ffffffff827fb000 r tpmr_pf_ipv4 +ffffffff827fb018 r tpmr_pf_ipv6 +ffffffff827fc000 r bpe_tree_RBT_INFO +ffffffff827fc018 R bpe_tree_RBT_TYPE +ffffffff827fc020 r bpe_etherbridge_ops +ffffffff827fd000 R pppx_rd_filtops +ffffffff827fd030 R pppx_wr_filtops +ffffffff827fd060 r pppx_ifs_RBT_INFO +ffffffff827fd078 R pppx_ifs_RBT_TYPE +ffffffff827fd080 r pppac_rd_filtops +ffffffff827fd0b0 r pppac_wr_filtops +ffffffff827fe000 r vxlan_peers_RBT_INFO +ffffffff827fe018 R vxlan_peers_RBT_TYPE +ffffffff827fe020 r vxlan_etherbridge_ops +ffffffff827ff000 R stoeplitz_cache +ffffffff82800000 R ieee80211_std_rateset_11a +ffffffff82800010 R ieee80211_std_rateset_11b +ffffffff82800020 R ieee80211_std_rateset_11g +ffffffff82800030 R ieee80211_std_ratesets_11n +ffffffff828003b0 R ieee80211_std_ratesets_11ac +ffffffff828006b0 r ieee80211_setbasicrates.basic +ffffffff82800710 r ieee80211_setmode.chanflags +ffffffff82800730 r ieee80211_rate2media.rates +ffffffff828008c0 r ieee80211_media2rate.ieeerates +ffffffff82801000 r Sbox +ffffffff82803000 r ieee80211_ioctl.empty_macaddr +ffffffff82804000 r ieee80211_find_rxnode.zero +ffffffff82804008 r ieee80211_tree_RBT_INFO +ffffffff82804020 R ieee80211_tree_RBT_TYPE +ffffffff82804028 r ieee80211_ess_tree_RBT_INFO +ffffffff82804040 R ieee80211_ess_tree_RBT_TYPE +ffffffff82804048 r ieee80211_do_slow_print.merge_print_intvl +ffffffff82805020 R ieee80211_edca_table +ffffffff828050e0 R ieee80211_qap_edca_table +ffffffff82806000 R ieee80211_mgt_subtype_name +ffffffff82806080 R ieee80211_state_name +ffffffff828060b0 R ieee80211_phymode_name +ffffffff82807000 r ieee80211_r_ctry +ffffffff82807ae0 r ieee80211_r_names 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rdac_mpath_ops +ffffffff8289b000 R emc_ca +ffffffff8289b028 R emc_mpath_ops +ffffffff8289c000 R hds_ca +ffffffff8289c028 R hds_mpath_ops +ffffffff8289d000 R atapiscsi_ca +ffffffff8289d028 r atapiscsi_switch +ffffffff8289e000 R wd_ca +ffffffff8289f000 R atascsi_switch +ffffffff828a0000 R mainbus_ca +ffffffff828a1000 R bios_ca +ffffffff828a2000 R mpbios_ca +ffffffff828a2030 r loc_where +ffffffff828a3000 R mpbios_icu_table +ffffffff828a4000 R cpu_ca +ffffffff828a5000 R lapic_timer_intrclock +ffffffff828a6000 R ioapic_ca +ffffffff828a7000 R efifb_ca +ffffffff828a7028 R efifb_screen_list +ffffffff828a8000 R pvbus_ca +ffffffff828a9000 R pvclock_ca +ffffffff828aa000 R vmt_ca +ffffffff828ab000 R xen_ca +ffffffff828ac000 R xs_errors +ffffffff828ad000 R xnf_ca +ffffffff828ae000 R xbf_ca +ffffffff828ae028 R xbf_switch +ffffffff828af000 R hyperv_ca +ffffffff828af028 R hv_guid_network +ffffffff828af038 R hv_guid_ide +ffffffff828af048 R hv_guid_scsi +ffffffff828af058 R hv_guid_shutdown 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pciide_serverworks_products +ffffffff82982bb0 R pciide_nvidia_products +ffffffff82982e80 R pciide_ite_products +ffffffff82982ea0 R pciide_ati_products +ffffffff82982f20 R pciide_jmicron_products +ffffffff82982f70 R pciide_phison_products +ffffffff82982f80 R pciide_rdc_products +ffffffff82982f90 R pciide_vendors +ffffffff82983140 R pciide_pci_ca +ffffffff82983168 R pciide_jmb_ca +ffffffff82983190 r piix_isp_dma +ffffffff82983193 r piix_rtc_dma +ffffffff82983196 r apollo_pio_set +ffffffff8298319b r cmd0643_9_data_tim_pio +ffffffff829831a0 r cmd0643_9_data_tim_dma +ffffffff829831a3 r cmd680_channel_map.init_val +ffffffff829831b1 r cmd680_setup_channel.udma2_tbl +ffffffff829831b8 r cmd680_setup_channel.dma_tbl +ffffffff829831be r cmd680_setup_channel.pio_tbl +ffffffff829831d0 r satalink_ba5_regmap +ffffffff82983690 r sii3114_chansetup.channel_names +ffffffff829836b0 r cy_pio_pulse +ffffffff829836c0 r sis_udma133new_tim +ffffffff829836e0 r sis_pio133new_tim +ffffffff829836f4 r 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irccable +ffffffff8298d310 r hrccable +ffffffff8298d380 r weurope +ffffffff8298d420 r jpnbcst +ffffffff8298d460 r jpncable +ffffffff8298d4c0 r xussr +ffffffff8298d530 r australia +ffffffff8298d590 r france +ffffffff8298e000 R xl_pci_ca +ffffffff8298e030 R xl_pci_devices +ffffffff8298f000 R fxp_pci_ca +ffffffff8298f030 R fxp_pci_devices +ffffffff82990000 R em_devices +ffffffff82990308 R em_ca +ffffffff82990330 r em_counters +ffffffff82991000 r em_igp_cable_length_table +ffffffff82991100 r em_igp_2_cable_length_table +ffffffff82992000 R ixgb_devices +ffffffff82992010 R ixgb_ca +ffffffff82993000 R ixgbe_devices +ffffffff829930b8 R ix_ca +ffffffff829930e0 r ix_counters +ffffffff829933e0 r ix_rxq_kstats_tpl +ffffffff82993458 r ix_txq_kstats_tpl +ffffffff82994000 r ixgbe_mvals_base +ffffffff82994060 r ixgbe_mvals_X540 +ffffffff829940c0 r ixgbe_mvals_X550 +ffffffff82994120 r ixgbe_mvals_X550EM_x +ffffffff82994180 r ixgbe_mvals_X550EM_a +ffffffff82997000 R ixl_ca +ffffffff82997030 R ixl_port_counters +ffffffff829972c0 R ixl_vsi_counters +ffffffff82997380 r ixl_devices +ffffffff829974c0 r ixl_710 +ffffffff829974e8 r ixl_722 +ffffffff82997510 r ixl_pf_aq_regs +ffffffff82997578 r ixl_710_decrepit +ffffffff829975a0 r ixl_phy_type_map +ffffffff82997770 r ixl_speed_type_map +ffffffff829977b0 r ixl_hmc_pack_rxq +ffffffff82997830 r ixl_hmc_pack_txq +ffffffff829978a0 r ixl_sfp_ops +ffffffff829978b8 r ixl_qsfp_ops +ffffffff82998000 r dwqe_pci_devices +ffffffff82998018 R dwqe_pci_ca +ffffffff82999000 R xge_ca +ffffffff82999028 R xge_devices +ffffffff82999030 r xge_fix_mac +ffffffff82999110 r xge_xena_dtx_cfg +ffffffff82999170 r xge_herc_dtx_cfg +ffffffff8299a000 R thtc_ca +ffffffff8299a028 R tht_ca +ffffffff8299a050 r thtc_devices +ffffffff8299a068 r tht_link_state.interval +ffffffff8299b000 R myx_ca +ffffffff8299b028 R myx_devices +ffffffff8299c000 R oce_ca +ffffffff8299c030 R oce_devices +ffffffff8299d000 R dc_pci_ca +ffffffff8299e000 R epic_pci_ca +ffffffff8299e028 R epic_pci_devices +ffffffff8299f000 R ti_pci_ca +ffffffff8299f030 R ti_devices +ffffffff829a0000 R ne_pci_ca +ffffffff829a0030 R ne_pci_prod +ffffffff829a1000 R gem_pci_ca +ffffffff829a1030 R gem_pci_devices +ffffffff829a1050 r gem_promhdr +ffffffff829a1052 r gem_promdat +ffffffff829a105a r gem_promdat2 +ffffffff829a2000 R cas_ca +ffffffff829a2028 R cas_pci_devices +ffffffff829a2030 r cas_promhdr +ffffffff829a2032 r cas_promdat_sun +ffffffff829a203a r cas_promdat_ns +ffffffff829a2042 r cas_promdat2 +ffffffff829a3000 R sf_pci_ca +ffffffff829a3028 R sf_pci_products +ffffffff829a4000 R sis_ca +ffffffff829a4028 R sis_devices +ffffffff829a5000 R se_devices +ffffffff829a5008 R se_ca +ffffffff829a6000 R mbg_ca +ffffffff829a6030 R mbg_devices +ffffffff829a7000 R uhci_pci_ca +ffffffff829a8000 R ohci_pci_ca +ffffffff829a9000 R ehci_pci_ca +ffffffff829aa000 R xhci_pci_ca +ffffffff829ab000 R cbb_pci_ca +ffffffff829ab028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff829ac000 R skc_devices +ffffffff829ac030 R skc_ca +ffffffff829ac058 R sk_ca +ffffffff829ad000 R mskc_devices +ffffffff829ad0a8 R mskc_ca +ffffffff829ad0d0 R msk_ca +ffffffff829ad100 r msk_mib +ffffffff829ae000 R puc_pci_ca +ffffffff829af000 R puc_devs +ffffffff829b4000 R com_puc_ca +ffffffff829b4030 r puc_port_types +ffffffff829b5000 R lpt_puc_ca +ffffffff829b6000 R wi_pci_ca +ffffffff829b6030 r wi_pci_products +ffffffff829b7000 R an_pci_ca +ffffffff829b7030 R an_pci_devices +ffffffff829b8000 R iwi_devices +ffffffff829b8010 R iwi_ca +ffffffff829b9000 R wpi_ca +ffffffff829b9028 r wpi_devices +ffffffff829b9030 r wpi_rates +ffffffff829b9050 r wpi_rf_gain_5ghz +ffffffff829b90a0 r wpi_dsp_gain_5ghz +ffffffff829b90f0 r wpi_rf_gain_2ghz +ffffffff829b9140 r wpi_dsp_gain_2ghz +ffffffff829b9190 r wpi_pmgt +ffffffff829b9310 r wpi_bands +ffffffff829ba000 R iwn_mcs2ridx +ffffffff829ba020 R iwn_ca +ffffffff829ba050 r iwn_devices +ffffffff829ba0e8 r iwn4965_sensitivity_limits +ffffffff829ba124 r iwn5000_sensitivity_limits +ffffffff829ba160 r iwn5150_sensitivity_limits +ffffffff829ba19c r iwn1000_sensitivity_limits +ffffffff829ba1d8 r iwn6000_sensitivity_limits +ffffffff829ba214 r iwn2000_sensitivity_limits +ffffffff829ba250 r iwn_fw_errmsg +ffffffff829ba340 r iwn4965_set_txpower.tdiv +ffffffff829ba360 r iwn4965_rf_gain_5ghz +ffffffff829ba3d0 r iwn4965_dsp_gain_5ghz +ffffffff829ba440 r iwn4965_dsp_gain_2ghz +ffffffff829ba4b0 r iwn_pmgt +ffffffff829ba6f0 r iwn4965_post_alive.qid2fifo +ffffffff829ba700 r iwn_bands +ffffffff829ba770 r iwn_rates +ffffffff829ba820 r iwn4965_rf_gain_2ghz +ffffffff829bb000 R iwm_nvm_channels +ffffffff829bb030 R iwm_nvm_channels_8000 +ffffffff829bb070 R iwm_rates +ffffffff829bb0d0 R iwm_ht_mcs2ridx +ffffffff829bb110 R iwm_tid_to_ac +ffffffff829bb118 R iwm_ac_to_tx_fifo +ffffffff829bb120 R iwm_nvm_to_read +ffffffff829bb144 r iwm_set_hw_address_8000.reserved_mac +ffffffff829bb180 r iwm_sf_full_timeout +ffffffff829bb1b0 r iwm_sf_full_timeout_def +ffffffff829bb1e0 r advanced_lookup +ffffffff829bb320 r iwm_devices +ffffffff829bb360 R iwm_ca +ffffffff829bc000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff829bc020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff829bc040 R iwx_qu_b0_hr1_b0 +ffffffff829bc060 R iwx_qu_b0_hr_b0 +ffffffff829bc080 R iwx_ax201_cfg_qu_hr +ffffffff829bc0a0 R iwx_qu_c0_hr1_b0 +ffffffff829bc0c0 R iwx_qu_c0_hr_b0 +ffffffff829bc0e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff829bc100 R iwx_quz_a0_hr1_b0 +ffffffff829bc120 R iwx_ax201_cfg_quz_hr +ffffffff829bc140 R iwx_cfg_so_a0_hr_b0 +ffffffff829bc160 R iwx_cfg_quz_a0_hr_b0 +ffffffff829bc180 R iwx_2ax_cfg_so_gf_a0 +ffffffff829bc1a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff829bc1c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff829bc1e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff829bc200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff829bc220 R iwx_2ax_cfg_so_jf_b0 +ffffffff829bc240 R iwx_nvm_channels_8000 +ffffffff829bc280 R iwx_rates +ffffffff829bc2e0 R iwx_mcs2ridx +ffffffff829bc320 R iwx_tid_to_ac +ffffffff829bc328 R iwx_ac_to_tx_fifo +ffffffff829bc330 r iwx_nvm_channels_uhb +ffffffff829bc39e r iwx_is_valid_mac_addr.reserved_mac +ffffffff829bc3b0 r iwx_sf_full_timeout +ffffffff829bc3e0 r iwx_sf_full_timeout_def +ffffffff829bc410 r advanced_lookup +ffffffff829bc550 r iwx_devices +ffffffff829bc590 r iwx_dev_info_table +ffffffff829bce18 R iwx_ca +ffffffff829bd000 R cmpci_ca +ffffffff829bd028 R cmpci_hw_if +ffffffff829bd0e0 r cmpci_rate_table +ffffffff829bd120 R cmpci_devices +ffffffff829bd130 r cmpci_query_devinfo.mixer_port_names +ffffffff829bd160 r cmpci_query_devinfo.mixer_classes +ffffffff829be000 R iha_pci_ca +ffffffff829be028 R iha_switch +ffffffff829bf000 R pcscp_ca +ffffffff829c0000 R bge_ca +ffffffff829c0030 R bge_devices +ffffffff829c01b0 r bge_revisions +ffffffff829c0610 r bge_majorrevs +ffffffff829c0790 r bge_kstat_tpl +ffffffff829c1000 R bnx_devices +ffffffff829c1020 R bnx_ca +ffffffff829c2000 R vge_ca +ffffffff829c2028 R vge_devices +ffffffff829c3000 R stge_ca +ffffffff829c3028 R stge_mii_bitbang_ops +ffffffff829c3050 R stge_devices +ffffffff829c4000 R nfe_ca +ffffffff829c4030 R nfe_devices +ffffffff829c5000 R et_devices +ffffffff829c5008 R et_ca +ffffffff829c6000 R jme_devices +ffffffff829c6008 R jme_ca +ffffffff829c7000 R age_devices +ffffffff829c7008 R age_ca +ffffffff829c8000 R alc_devices +ffffffff829c8038 R alc_ca +ffffffff829c9000 R ale_devices +ffffffff829c9008 R ale_ca +ffffffff829ca000 R amdpm_ca +ffffffff829ca030 R amdpm_ids +ffffffff829cb000 R bce_ca +ffffffff829cb028 R bce_devices +ffffffff829cc000 R ath_pci_ca +ffffffff829cd000 R athn_pci_ca +ffffffff829cd030 r athn_pci_devices +ffffffff829ce000 R atw_pci_ca +ffffffff829ce028 R atw_pci_devices +ffffffff829cf000 R rtw_pci_ca +ffffffff829cf030 R rtw_pci_products +ffffffff829d0000 R rtwn_pci_ca +ffffffff829d0030 r rtwn_pci_devices +ffffffff829d0040 r rtl8188eu_mac +ffffffff829d01b0 r rtl8192cu_mac +ffffffff829d0310 r rtl8192ce_mac +ffffffff829d0458 r rtl8188eu_bb_prog +ffffffff829d0480 r rtl8723a_bb_prog +ffffffff829d04a8 r rtl8192ce_bb_prog_1t +ffffffff829d04d0 r rtl8192ce_bb_prog_2t +ffffffff829d0500 r rtl8188eu_bb_regs +ffffffff829d0680 r rtl8188eu_bb_vals +ffffffff829d0980 r rtl8188eu_agc_vals +ffffffff829d0b80 r rtl8723a_bb_regs +ffffffff829d0d00 r rtl8723a_bb_vals +ffffffff829d0ff0 r rtl8192ce_agc_vals +ffffffff829d1270 r rtl8192ce_bb_regs +ffffffff829d13f0 r rtl8192ce_bb_vals_1t +ffffffff829d16e0 r rtl8192ce_bb_vals_2t +ffffffff829d2000 R ral_pci_ca +ffffffff829d2030 R ral_pci_devices +ffffffff829d3000 R acx_pci_ca +ffffffff829d3028 R acx_pci_devices +ffffffff829d4000 R pgt_pci_ca +ffffffff829d4028 R pgt_pci_devices +ffffffff829d5000 R malo_pci_ca +ffffffff829d5028 R malo_pci_devices +ffffffff829d6000 R bwi_pci_ca +ffffffff829d6030 R bwi_pci_devices +ffffffff829d7000 R piixpm_ca +ffffffff829d7030 R piixpm_ids +ffffffff829d8000 R vic_ca +ffffffff829d8028 R vic_devices +ffffffff829d9000 R vmx_devices +ffffffff829d9008 R vmx_ca +ffffffff829d9030 r vmx_tx_kstat_tpl +ffffffff829d90d0 r vmx_kstat_rate +ffffffff829d90e0 r vmx_rx_kstat_tpl +ffffffff829da000 R vmwpvs_ca +ffffffff829da028 R vmwpvs_switch +ffffffff829db000 R lii_ca +ffffffff829db028 R lii_devices +ffffffff829dc000 R ichiic_ca +ffffffff829dc030 R ichiic_ids +ffffffff829dd000 R viapm_ca +ffffffff829dd030 R viapm_ids +ffffffff829dd070 r val_to_temp +ffffffff829dd870 r val_to_uV.mult +ffffffff829de000 R amdiic_ca +ffffffff829de028 R amdiic_ids +ffffffff829df000 R nviic_ca +ffffffff829df030 R nviic_ids +ffffffff829e0000 R sdhc_pci_ca +ffffffff829e1000 R kate_ca +ffffffff829e1030 r kate_proc +ffffffff829e2000 R km_ca +ffffffff829e2030 r km_devices +ffffffff829e3000 R ksmn_ca +ffffffff829e3030 r ksmn_devices +ffffffff829e4000 R iosf_pci_ca +ffffffff829e5000 R itherm_devices +ffffffff829e5008 R itherm_ca +ffffffff829e6000 R pchtemp_ca +ffffffff829e6030 R pchtemp_devices +ffffffff829e7000 R rtsx_pci_ca +ffffffff829e8000 R xspd_ca +ffffffff829e8028 R xspd_devices +ffffffff829e9000 R virtio_pci_ca +ffffffff829ea000 R dwiic_pci_ca +ffffffff829ea030 R dwiic_pci_ids +ffffffff829eb000 R bwfm_pci_ca +ffffffff829eb030 r bwfm_pci_devices +ffffffff829ec000 R ccp_pci_ca +ffffffff829ec030 r ccp_pci_devices +ffffffff829ed000 R bnxt_devices +ffffffff829ed040 R bnxt_ca +ffffffff829ee000 R mcx_ca +ffffffff829ee030 r mcx_devices +ffffffff829ee060 r mcx_rss_config +ffffffff829ee0d0 r mcx_eth_cap_map +ffffffff829ee2d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff829ee2e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff829ee300 r mcx_kstat_ppcnt_rfc2819 +ffffffff829ee318 r mcx_kstat_ppcnt_rfc3635 +ffffffff829ee330 r mcx_ppcnt_ieee8023_tpl +ffffffff829ee4b0 r mcx_ppcnt_rfc2863_tpl +ffffffff829ee5c0 r mcx_ppcnt_rfc2819_tpl +ffffffff829ee770 r mcx_ppcnt_rfc3635_tpl +ffffffff829ee8b0 r mcx_kstat_mtmp_tpl +ffffffff829ee950 r mcx_kstat_mtmp_rate +ffffffff829ee960 r mcx_queue_kstat_tpl +ffffffff829ef000 R iavf_ca +ffffffff829ef030 r iavf_devices +ffffffff829ef040 r iavf_aq_regs +ffffffff829ef0b0 r iavf_link_speeds +ffffffff829f0000 R rge_ca +ffffffff829f0028 R rge_devices +ffffffff829f0030 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff829f0050 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff829f00b0 r rtl8125_mac_cfg3_mcu +ffffffff829f0950 r rtl8125_mac_cfg5_mcu +ffffffff829f1970 r rtl8125_mac_bps +ffffffff829f1d70 r rtl8125b_mac_bps +ffffffff829f1f98 r rge_kstats_tpl +ffffffff829f3000 R igc_devices +ffffffff829f3040 R igc_ca +ffffffff829f4000 R ngbe_devices +ffffffff829f4008 R ngbe_ca +ffffffff829f5000 R com_pci_ca +ffffffff829f5030 R com_pci_ids +ffffffff829f6000 r agp_attach.agp_max +ffffffff829f6048 R agp_ca +ffffffff829f7000 R intagp_ca +ffffffff829f8000 r drm_plane_create_rotation_property.props +ffffffff829f9000 r drm_bridge_priv_state_funcs +ffffffff829fb000 r color_encoding_name +ffffffff829fb020 r color_range_name +ffffffff829fc000 r drm_subpixel_enum_list +ffffffff829fc060 r drm_dpms_enum_list +ffffffff829fc0a0 r drm_dvi_i_select_enum_list +ffffffff829fc0d0 r drm_dvi_i_subconnector_enum_list +ffffffff829fc100 r drm_tv_mode_enum_list +ffffffff829fc170 r drm_tv_select_enum_list +ffffffff829fc1c0 r drm_tv_subconnector_enum_list +ffffffff829fc210 r drm_dp_subconnector_enum_list +ffffffff829fc280 r colorspace_names +ffffffff829fc300 r drm_link_status_enum_list +ffffffff829fc320 r drm_scaling_mode_enum_list +ffffffff829fc360 r drm_aspect_ratio_enum_list +ffffffff829fc390 r drm_content_type_enum_list +ffffffff829fc3e0 r drm_panel_orientation_enum_list +ffffffff829fc420 r privacy_screen_enum +ffffffff829fd000 r drm_crtc_fence_ops +ffffffff829fe000 r drm_dmt_modes +ffffffff82a00940 r edid_cea_modes_1 +ffffffff82a044d0 r edid_cea_modes_193 +ffffffff82a05180 r edid_quirk_list +ffffffff82a05360 r drm_mode_do_interlace_quirk.cea_interlaced +ffffffff82a053a0 r edid_4k_modes +ffffffff82a05600 r edid_est_modes +ffffffff82a05e00 r est3_modes +ffffffff82a05f60 r stereo_mandatory_modes +ffffffff82a05fe0 r extra_modes +ffffffff82a07000 r drm_encoder_enum_list +ffffffff82a09000 r drm_fbdev_dma_helper_funcs +ffffffff82a09010 r drm_fbdev_dma_client_funcs +ffffffff82a09030 r drm_fbdev_dma_fb_ops +ffffffff82a0a000 r drm_fbdev_generic_helper_funcs +ffffffff82a0a010 r drm_fbdev_generic_client_funcs +ffffffff82a0a030 r drm_fbdev_generic_fb_ops +ffffffff82a0c000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82a0c004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82a0c008 r drm_fb_xrgb8888_to_xrgb1555.dst_pixsize +ffffffff82a0c00c r drm_fb_xrgb8888_to_argb1555.dst_pixsize +ffffffff82a0c010 r drm_fb_xrgb8888_to_rgba5551.dst_pixsize +ffffffff82a0c014 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff82a0c018 r drm_fb_xrgb8888_to_argb8888.dst_pixsize +ffffffff82a0c01c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82a0c020 r drm_fb_xrgb8888_to_argb2101010.dst_pixsize +ffffffff82a0c024 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82a0c028 r drm_fb_xrgb8888_to_xbgr8888.dst_pixsize +ffffffff82a0c02c r drm_fb_xrgb8888_to_abgr8888.dst_pixsize +ffffffff82a0d000 r __drm_format_info.formats +ffffffff82a0e000 R drm_pgops +ffffffff82a0f000 r drm_gem_dma_default_funcs +ffffffff82a10000 R drm_gem_fb_funcs +ffffffff82a11000 r drm_ioctls +ffffffff82a13000 r dma_fence_stub_ops +ffffffff82a13040 R dma_fence_array_ops +ffffffff82a13080 R dma_fence_chain_ops +ffffffff82a130c0 R dmabufops +ffffffff82a130f8 R syncfileops +ffffffff82a14000 r drm_plane_type_enum_list +ffffffff82a15000 r tv_modes_parameters +ffffffff82a150c0 r drm_mode_status_names +ffffffff82a15200 r drm_named_modes +ffffffff82a16000 r primary_plane_funcs +ffffffff82a16068 r safe_modeset_formats +ffffffff82a17000 r orientation_data +ffffffff82a1a718 r lcd800x1280_rightside_up +ffffffff82a1a730 r lcd720x1280_rightside_up +ffffffff82a1a748 r lcd800x1280_leftside_up +ffffffff82a1a760 r lcd1080x1920_leftside_up +ffffffff82a1a778 r lcd1200x1920_rightside_up +ffffffff82a1a790 r gpd_micropc +ffffffff82a1a7a8 r gpd_pocket +ffffffff82a1a7c0 r gpd_pocket2 +ffffffff82a1a7d8 r gpd_win +ffffffff82a1a7f0 r gpd_win2 +ffffffff82a1a808 r itworks_tw891 +ffffffff82a1a820 r lcd1600x2560_rightside_up +ffffffff82a1a838 r onegx1_pro +ffffffff82a1a850 r lcd1600x2560_leftside_up +ffffffff82a1a868 r lcd1280x1920_rightside_up +ffffffff82a1a880 r gpd_onemix2s +ffffffff82a1a898 r .compoundliteral +ffffffff82a1a8a8 r .compoundliteral.5 +ffffffff82a1a8d0 r .compoundliteral.9 +ffffffff82a1a8f0 r .compoundliteral.17 +ffffffff82a1a930 r .compoundliteral.21 +ffffffff82a1a950 r .compoundliteral.23 +ffffffff82a1a960 r .compoundliteral.25 +ffffffff82a1a970 r .compoundliteral.29 +ffffffff82a1b000 r drm_gem_prime_dmabuf_ops +ffffffff82a1d000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82a1e000 r drm_dp_phy_name.phy_names +ffffffff82a1e048 r drm_dp_i2c_algo +ffffffff82a1e058 r drm_dp_i2c_lock_ops +ffffffff82a1e070 r dp_aux_bl_ops +ffffffff82a1e090 r dpcd_quirk_list +ffffffff82a1e320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82a1f000 R drm_dp_mst_topology_state_funcs +ffffffff82a1f020 r drm_dp_mst_req_type_str.req_type_str +ffffffff82a1f1f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82a1f220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82a1f278 r drm_dp_mst_i2c_algo +ffffffff82a20000 r rc_parameters_1_2_444 +ffffffff82a205f0 r rc_parameters_pre_scr +ffffffff82a20920 r rc_parameters_1_2_422 +ffffffff82a20df0 r rc_parameters_1_2_420 +ffffffff82a22000 r hdmi_colorimetry_val +ffffffff82a23018 R ttm_bo_vm_ops +ffffffff82a24000 r ttm_range_manager_func +ffffffff82a25018 r ttm_kmap_iter_io_ops +ffffffff82a25030 r ttm_kmap_iter_linear_io_ops +ffffffff82a26000 r ttm_sys_manager_func +ffffffff82a27000 r ttm_kmap_iter_tt_ops +ffffffff82a28000 r drm_sched_fence_ops_scheduled +ffffffff82a28040 r drm_sched_fence_ops_finished +ffffffff82a29000 R ch7017_ops +ffffffff82a2a000 R ch7xxx_ops +ffffffff82a2a060 r ch7xxx_ids +ffffffff82a2b000 R ivch_ops +ffffffff82a2b060 r backup_addresses +ffffffff82a2c000 R ns2501_ops +ffffffff82a2c060 r mode_agnostic_values +ffffffff82a2c0e0 r ns2501_modes +ffffffff82a2d000 R sil164_ops +ffffffff82a2e000 R tfp410_ops +ffffffff82a2f000 r chv_dpll +ffffffff82a2f050 r vlv_dpll +ffffffff82a2f0a0 r g4x_dpll +ffffffff82a2f0f0 r pch_dpll +ffffffff82a2f138 r intel_dp_enc_funcs +ffffffff82a30000 r intel_hdmi_enc_funcs +ffffffff82a31000 r vlv_primary_formats +ffffffff82a31030 r ivb_primary_formats +ffffffff82a31050 r i965_primary_formats +ffffffff82a31070 r i8xx_primary_formats +ffffffff82a31080 r i965_plane_funcs +ffffffff82a310e8 r i8xx_plane_funcs +ffffffff82a32000 r ilk_wm_funcs +ffffffff82a32040 r vlv_wm_funcs +ffffffff82a32080 r g4x_wm_funcs +ffffffff82a320c0 r nop_funcs +ffffffff82a32100 r pnv_wm_funcs +ffffffff82a32140 r i965_wm_funcs +ffffffff82a32180 r i9xx_wm_funcs +ffffffff82a321c0 r i845_wm_funcs +ffffffff82a32200 r cxsr_latency_table +ffffffff82a33000 r gen11_dsi_encoder_funcs +ffffffff82a33020 r gen11_dsi_connector_funcs +ffffffff82a33098 r gen11_dsi_connector_helper_funcs +ffffffff82a330f8 r gen11_dsi_host_ops +ffffffff82a34000 r intel_plane_helper_funcs +ffffffff82a35000 r g4x_audio_funcs +ffffffff82a35018 r ibx_audio_funcs +ffffffff82a35030 r hsw_audio_funcs +ffffffff82a35050 r hdmi_audio_clock +ffffffff82a350c0 r dp_aud_n_m +ffffffff82a35270 r hdmi_aud_ncts_36bpp +ffffffff82a35350 r hdmi_aud_ncts_30bpp +ffffffff82a35430 r hdmi_aud_ncts_24bpp +ffffffff82a36000 r intel_backlight_device_ops +ffffffff82a36018 r bxt_pwm_funcs +ffffffff82a36048 r cnp_pwm_funcs +ffffffff82a36078 r lpt_pwm_funcs +ffffffff82a360a8 r spt_pwm_funcs +ffffffff82a360d8 r pch_pwm_funcs +ffffffff82a36108 r ext_pwm_funcs +ffffffff82a36138 r vlv_pwm_funcs +ffffffff82a36168 r i965_pwm_funcs +ffffffff82a36198 r i9xx_pwm_funcs +ffffffff82a361c8 r pwm_bl_funcs +ffffffff82a37000 r bdb_blocks +ffffffff82a37160 r adlp_aux_ch_map +ffffffff82a37169 r adls_aux_ch_map +ffffffff82a37170 r rkl_aux_ch_map +ffffffff82a37175 r direct_aux_ch_map +ffffffff82a3717e r translate_iboost.mapping +ffffffff82a37181 r adlp_ddc_pin_map +ffffffff82a3718e r adls_ddc_pin_map +ffffffff82a3719b r rkl_pch_tgp_ddc_pin_map +ffffffff82a371a6 r gen9bc_tgp_ddc_pin_map +ffffffff82a371b1 r icp_ddc_pin_map +ffffffff82a371c0 r cnp_ddc_pin_map +ffffffff82a38000 r mtl_sa_info +ffffffff82a38006 r adlp_sa_info +ffffffff82a3800c r adls_sa_info +ffffffff82a38012 r rkl_sa_info +ffffffff82a38018 r tgl_sa_info +ffffffff82a38020 r intel_bw_funcs +ffffffff82a39000 r intel_cdclk_funcs +ffffffff82a39010 r mtl_cdclk_funcs +ffffffff82a39030 r mtl_cdclk_table +ffffffff82a39088 r tgl_cdclk_funcs +ffffffff82a390b0 r dg2_cdclk_table +ffffffff82a39160 r adlp_a_step_cdclk_table +ffffffff82a391e0 r rplu_cdclk_table +ffffffff82a392c8 r rplu_cdclk_funcs +ffffffff82a392f0 r adlp_cdclk_table +ffffffff82a393b0 r rkl_cdclk_table +ffffffff82a394a0 r icl_cdclk_table +ffffffff82a39588 r ehl_cdclk_funcs +ffffffff82a395a8 r icl_cdclk_funcs +ffffffff82a395c8 r bxt_cdclk_funcs +ffffffff82a395f0 r glk_cdclk_table +ffffffff82a39620 r bxt_cdclk_table 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mtl_c10_hdmi_74_25 +ffffffff82a41330 r mtl_c10_hdmi_75000 +ffffffff82a4134c r mtl_c10_hdmi_78750 +ffffffff82a41368 r mtl_c10_hdmi_85500 +ffffffff82a41384 r mtl_c10_hdmi_88750 +ffffffff82a413a0 r mtl_c10_hdmi_106500 +ffffffff82a413bc r mtl_c10_hdmi_108000 +ffffffff82a413d8 r mtl_c10_hdmi_115500 +ffffffff82a413f4 r mtl_c10_hdmi_119000 +ffffffff82a41410 r mtl_c10_hdmi_135000 +ffffffff82a4142c r mtl_c10_hdmi_138500 +ffffffff82a41448 r mtl_c10_hdmi_147160 +ffffffff82a41464 r mtl_c10_hdmi_148352 +ffffffff82a41480 r mtl_c10_hdmi_148_5 +ffffffff82a4149c r mtl_c10_hdmi_154000 +ffffffff82a414b8 r mtl_c10_hdmi_162000 +ffffffff82a414d4 r mtl_c10_hdmi_167000 +ffffffff82a414f0 r mtl_c10_hdmi_197802 +ffffffff82a4150c r mtl_c10_hdmi_198000 +ffffffff82a41528 r mtl_c10_hdmi_209800 +ffffffff82a41544 r mtl_c10_hdmi_241500 +ffffffff82a41560 r mtl_c10_hdmi_262750 +ffffffff82a4157c r mtl_c10_hdmi_268500 +ffffffff82a41598 r mtl_c10_hdmi_296703 +ffffffff82a415b4 r mtl_c10_hdmi_297000 +ffffffff82a415d0 r mtl_c10_hdmi_319750 +ffffffff82a415ec r mtl_c10_hdmi_497750 +ffffffff82a41608 r mtl_c10_hdmi_592000 +ffffffff82a41624 r mtl_c10_hdmi_593407 +ffffffff82a41640 r mtl_c10_hdmi_594 +ffffffff82a41660 r mtl_c20_hdmi_tables +ffffffff82a416b8 r mtl_c20_hdmi_25_175 +ffffffff82a416e4 r mtl_c20_hdmi_27_0 +ffffffff82a41710 r mtl_c20_hdmi_74_25 +ffffffff82a4173c r mtl_c20_hdmi_148_5 +ffffffff82a41768 r mtl_c20_hdmi_594 +ffffffff82a41794 r mtl_c20_hdmi_300 +ffffffff82a417c0 r mtl_c20_hdmi_600 +ffffffff82a417ec r mtl_c20_hdmi_800 +ffffffff82a41818 r mtl_c20_hdmi_1000 +ffffffff82a41844 r mtl_c20_hdmi_1200 +ffffffff82a41870 r mtl_c10_edp_tables +ffffffff82a418c0 r mtl_c10_dp_tables +ffffffff82a418e8 r mtl_c10_dp_rbr +ffffffff82a41904 r mtl_c10_edp_r216 +ffffffff82a41920 r mtl_c10_edp_r243 +ffffffff82a4193c r mtl_c10_dp_hbr1 +ffffffff82a41958 r mtl_c10_edp_r324 +ffffffff82a41974 r mtl_c10_edp_r432 +ffffffff82a41990 r mtl_c10_dp_hbr2 +ffffffff82a419ac r mtl_c10_edp_r675 +ffffffff82a419c8 r mtl_c10_dp_hbr3 +ffffffff82a419f0 r mtl_c20_dp_tables +ffffffff82a41a30 r mtl_c20_dp_rbr +ffffffff82a41a5c r mtl_c20_dp_hbr1 +ffffffff82a41a88 r mtl_c20_dp_hbr2 +ffffffff82a41ab4 r mtl_c20_dp_hbr3 +ffffffff82a41ae0 r mtl_c20_dp_uhbr13_5 +ffffffff82a41b0c r mtl_c20_dp_uhbr10 +ffffffff82a41b38 r mtl_c20_dp_uhbr20 +ffffffff82a42000 r intel_ddi_funcs +ffffffff82a42020 r index_to_dp_signal_levels +ffffffff82a42030 r gen9_chicken_trans_reg_by_port.trans +ffffffff82a43000 r tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff82a43010 r _tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff82a43080 r mtl_c20_trans_uhbr +ffffffff82a43090 r mtl_c20_trans_hdmi +ffffffff82a430a0 r mtl_c20_trans_dp14 +ffffffff82a430b0 r mtl_c10_trans_dp14 +ffffffff82a430c0 r _mtl_c20_trans_uhbr +ffffffff82a43180 r _mtl_c20_trans_hdmi +ffffffff82a431c0 r _mtl_c20_trans_dp14 +ffffffff82a43240 r _mtl_c10_trans_dp14 +ffffffff82a432b8 r dg2_snps_trans_uhbr +ffffffff82a432c8 r dg2_snps_trans +ffffffff82a432e0 r _dg2_snps_trans_uhbr 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_tgl_uy_combo_phy_trans_dp_hbr2 +ffffffff82a43ec0 r _tgl_combo_phy_trans_dp_hbr2 +ffffffff82a43f38 r tgl_dkl_phy_trans_dp_hbr2 +ffffffff82a43f48 r tgl_dkl_phy_trans_dp_hbr +ffffffff82a43f60 r _tgl_dkl_phy_trans_dp_hbr2 +ffffffff82a43fe0 r _tgl_dkl_phy_trans_dp_hbr +ffffffff82a44058 r jsl_combo_phy_trans_edp_hbr2 +ffffffff82a44068 r jsl_combo_phy_trans_edp_hbr +ffffffff82a44080 r _jsl_combo_phy_trans_edp_hbr2 +ffffffff82a44100 r _jsl_combo_phy_trans_edp_hbr +ffffffff82a44178 r ehl_combo_phy_trans_dp +ffffffff82a44188 r ehl_combo_phy_trans_edp_hbr2 +ffffffff82a441a0 r _ehl_combo_phy_trans_edp_hbr2 +ffffffff82a44220 r _ehl_combo_phy_trans_dp +ffffffff82a44298 r icl_mg_phy_trans_hdmi +ffffffff82a442b0 r _icl_mg_phy_trans_hdmi +ffffffff82a44328 r icl_mg_phy_trans_hbr2_hbr3 +ffffffff82a44338 r icl_mg_phy_trans_rbr_hbr +ffffffff82a44350 r _icl_mg_phy_trans_hbr2_hbr3 +ffffffff82a443d0 r _icl_mg_phy_trans_rbr_hbr +ffffffff82a44448 r bxt_trans_hdmi +ffffffff82a44458 r bxt_trans_edp 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+ffffffff82ad5000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff82ad6000 r didt_config_kv +ffffffff82ad7000 r barts_io_mc_regs +ffffffff82ad70f0 r turks_io_mc_regs +ffffffff82ad71e0 r caicos_io_mc_regs +ffffffff82ad72d0 r cayman_io_mc_regs +ffffffff82ad73c0 r cayman_golden_registers +ffffffff82ad7580 r cayman_golden_registers2 +ffffffff82ad75d0 r dvst_golden_registers +ffffffff82ad7860 r dvst_golden_registers2 +ffffffff82ad7890 r scrapper_golden_registers +ffffffff82ad7d70 r tn_rlc_save_restore_register_list +ffffffff82ad7f60 r cayman_cs_data +ffffffff82ad7fa0 r SECT_CONTEXT_defs +ffffffff82ad8020 r SECT_CLEAR_defs +ffffffff82ad8040 r SECT_CTRLCONST_defs +ffffffff82ad8060 r SECT_CONTEXT_def_2 +ffffffff82ad8080 r SECT_CONTEXT_def_4 +ffffffff82ad8210 r SECT_CONTEXT_def_5 +ffffffff82ad8230 r SECT_CONTEXT_def_1 +ffffffff82ad89d0 r SECT_CONTEXT_def_3 +ffffffff82ad8ab0 r SECT_CONTEXT_def_6 +ffffffff82ad8b90 r SECT_CONTEXT_def_7 +ffffffff82ad9018 r SECT_CLEAR_def_1 +ffffffff82ad9024 r SECT_CTRLCONST_def_1 +ffffffff82ad9030 r cayman_default_state +ffffffff82ada000 r cac_weights_cayman_xt +ffffffff82ada128 r cac_weights_cayman_pro +ffffffff82ada250 r cac_weights_cayman_le +ffffffff82ada380 r cayman_cgcg_cgls_default +ffffffff82ada5c0 r cayman_mgcg_default +ffffffff82adaf20 r cayman_sysls_default +ffffffff82adaff0 r cayman_cgcg_cgls_enable +ffffffff82adb240 r cayman_cgcg_cgls_disable +ffffffff82adb4a0 r cayman_mgcg_enable +ffffffff82adb520 r cayman_mgcg_disable +ffffffff82adb5a0 r cayman_sysls_enable +ffffffff82adb670 r cayman_sysls_disable +ffffffff82adc000 r rn50_reg_safe_bm +ffffffff82adc1a0 r r100_reg_safe_bm +ffffffff82add000 r r200_reg_safe_bm +ffffffff82ade000 r r300_reg_safe_bm +ffffffff82adf000 r r420_reg_safe_bm +ffffffff82ae1000 r color_formats_table +ffffffff82ae1480 r r600_reg_safe_bm +ffffffff82ae4000 R r600_utc +ffffffff82ae4040 R r600_dtc +ffffffff82ae4080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82ae6000 r r100_gfx_ring +ffffffff82ae6070 r r300_gfx_ring +ffffffff82ae60e0 r rv515_gfx_ring +ffffffff82ae6150 r r600_gfx_ring +ffffffff82ae61c0 r r600_dma_ring +ffffffff82ae6230 r rv6xx_uvd_ring +ffffffff82ae62a0 r rv770_uvd_ring +ffffffff82ae6310 r evergreen_gfx_ring +ffffffff82ae6380 r evergreen_dma_ring +ffffffff82ae63f0 r cayman_gfx_ring +ffffffff82ae6460 r cayman_dma_ring +ffffffff82ae64d0 r cayman_uvd_ring +ffffffff82ae6540 r trinity_vce_ring +ffffffff82ae65b0 r si_gfx_ring +ffffffff82ae6620 r si_dma_ring +ffffffff82ae6690 r ci_gfx_ring +ffffffff82ae6700 r ci_cp_ring +ffffffff82ae6770 r ci_dma_ring +ffffffff82ae67e0 r ci_vce_ring +ffffffff82ae7000 r object_connector_convert +ffffffff82ae7060 r supported_devices_connector_convert +ffffffff82ae70a0 r supported_devices_connector_object_id_convert +ffffffff82ae70c0 r thermal_controller_names +ffffffff82ae7100 r pp_lib_thermal_controller_names +ffffffff82ae8000 r pin_offsets +ffffffff82ae8020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff82aea000 r thermal_controller_names +ffffffff82aea020 r default_primarydac_adj +ffffffff82aea120 r default_tvdac_adj +ffffffff82aea220 r default_tmds_pll +ffffffff82aeb000 r radeon_dp_connector_funcs +ffffffff82aeb078 r radeon_dp_connector_helper_funcs +ffffffff82aeb0d8 r radeon_lvds_bridge_connector_funcs +ffffffff82aeb150 r radeon_vga_connector_funcs +ffffffff82aeb1c8 r radeon_vga_connector_helper_funcs +ffffffff82aeb228 r radeon_dvi_connector_funcs +ffffffff82aeb2a0 r radeon_dvi_connector_helper_funcs +ffffffff82aeb300 r radeon_edp_connector_funcs +ffffffff82aeb378 r radeon_tv_connector_funcs +ffffffff82aeb3f0 r radeon_tv_connector_helper_funcs +ffffffff82aeb450 r radeon_lvds_connector_funcs +ffffffff82aeb4c8 r radeon_lvds_connector_helper_funcs +ffffffff82aec000 r radeon_family_name +ffffffff82aec3f0 r radeon_px_quirk_list +ffffffff82aed000 r radeon_fb_funcs +ffffffff82aed018 r radeon_mode_funcs +ffffffff82aed060 r radeon_tmds_pll_enum_list +ffffffff82aed080 r radeon_tv_std_enum_list +ffffffff82aed100 r radeon_underscan_enum_list +ffffffff82aed130 r radeon_audio_enum_list +ffffffff82aed160 r radeon_dither_enum_list +ffffffff82aed180 r radeon_output_csc_enum_list +ffffffff82aed1c0 r radeon_crtc_funcs +ffffffff82aed280 r hpd_names +ffffffff82aed2b0 r encoder_names +ffffffff82aed3e0 r radeon_afmt_init.eg_offsets +ffffffff82aee000 r aux_offset +ffffffff82aef000 R radeondrm_ca +ffffffff82aef030 r pciidlist +ffffffff82af31d0 r kms_driver +ffffffff82af32c0 r radeon_ioctls_kms +ffffffff82af4000 r radeon_fbdev_fb_helper_funcs +ffffffff82af4010 r radeon_fbdev_client_funcs +ffffffff82af4030 r radeon_fbdev_fb_ops +ffffffff82af5000 R radeon_fence_ops +ffffffff82af7000 R radeon_gem_object_funcs +ffffffff82af7070 r radeon_gem_vm_ops +ffffffff82af8000 r radeon_i2c_algo +ffffffff82af8010 r radeon_atom_i2c_algo +ffffffff82af9000 r legacy_helper_funcs +ffffffff82afa000 r radeon_backlight_ops +ffffffff82afa018 r radeon_legacy_lvds_enc_funcs +ffffffff82afa038 r radeon_legacy_lvds_helper_funcs +ffffffff82afa0a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82afa0c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82afa128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82afa148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82afa1b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82afa1d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82afa238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82afa258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82afb000 r SLOPE_value +ffffffff82afb030 r YCOEF_EN_value +ffffffff82afb060 r YCOEF_value +ffffffff82afb090 r available_tv_modes +ffffffff82afb110 r hor_timing_NTSC +ffffffff82afb150 r vert_timing_NTSC +ffffffff82afb190 r hor_timing_PAL +ffffffff82afb1d0 r vert_timing_PAL +ffffffff82afd000 r radeon_pm_state_type_name +ffffffff82afe000 r radeon_evict_flags.placements +ffffffff82b01000 r rs600_reg_safe_bm +ffffffff82b03000 r rv515_reg_safe_bm +ffffffff82b04000 r dll_speed_table +ffffffff82b05000 r r7xx_golden_registers +ffffffff82b05090 r r7xx_golden_dyn_gpr_registers +ffffffff82b05100 r rv770ce_golden_registers +ffffffff82b05160 r rv770_golden_registers +ffffffff82b051b0 r rv770_mgcg_init +ffffffff82b058f0 r rv730_golden_registers +ffffffff82b05950 r rv730_mgcg_init +ffffffff82b05ee0 r rv710_golden_registers +ffffffff82b05f30 r rv710_mgcg_init +ffffffff82b061d0 r rv740_golden_registers +ffffffff82b06360 r rv740_mgcg_init +ffffffff82b08000 r rv730_smc_int_vectors +ffffffff82b08040 r rv710_smc_int_vectors +ffffffff82b08080 r rv740_smc_int_vectors +ffffffff82b080c0 r cypress_smc_int_vectors +ffffffff82b08100 r caicos_smc_int_vectors +ffffffff82b08140 r cayman_smc_int_vectors +ffffffff82b09000 r tahiti_io_mc_regs +ffffffff82b09120 r pitcairn_io_mc_regs +ffffffff82b09240 r verde_io_mc_regs +ffffffff82b09360 r oland_io_mc_regs +ffffffff82b09480 r hainan_io_mc_regs +ffffffff82b095a0 r crtc_offsets +ffffffff82b095c0 r si_disp_int_status +ffffffff82b095e0 r tahiti_golden_registers +ffffffff82b09760 r tahiti_golden_rlc_registers +ffffffff82b097b0 r tahiti_mgcg_cgcg_init +ffffffff82b09d98 r tahiti_golden_registers2 +ffffffff82b09db0 r pitcairn_golden_registers +ffffffff82b09f00 r pitcairn_golden_rlc_registers +ffffffff82b09f40 r pitcairn_mgcg_cgcg_init +ffffffff82b0a3b0 r verde_golden_registers +ffffffff82b0a620 r verde_golden_rlc_registers +ffffffff82b0a660 r verde_mgcg_cgcg_init +ffffffff82b0aae0 r oland_golden_registers +ffffffff82b0ac30 r oland_golden_rlc_registers +ffffffff82b0ac70 r oland_mgcg_cgcg_init +ffffffff82b0b000 r hainan_golden_registers +ffffffff82b0b12c r hainan_golden_registers2 +ffffffff82b0b140 r hainan_mgcg_cgcg_init +ffffffff82b0b4b0 r verde_rlc_save_restore_register_list +ffffffff82b0b820 r si_cs_data +ffffffff82b0b840 r si_SECT_CONTEXT_defs +ffffffff82b0b8c0 r si_SECT_CONTEXT_def_1 +ffffffff82b0bc10 r si_SECT_CONTEXT_def_3 +ffffffff82b0bc30 r si_SECT_CONTEXT_def_4 +ffffffff82b0bea4 r si_SECT_CONTEXT_def_5 +ffffffff82b0bea8 r si_SECT_CONTEXT_def_6 +ffffffff82b0beb0 r si_SECT_CONTEXT_def_2 +ffffffff82b0c2f0 r si_SECT_CONTEXT_def_7 +ffffffff82b0c6a0 r mc_cg_registers +ffffffff82b0c6d0 r si_default_state +ffffffff82b0d000 r cac_weights_tahiti +ffffffff82b0d4d0 r lcac_tahiti +ffffffff82b0dba0 r cac_override_tahiti +ffffffff82b0dbb4 r powertune_data_tahiti +ffffffff82b0dbf0 r dte_data_tahiti +ffffffff82b0dcc0 r dte_data_new_zealand +ffffffff82b0dd90 r dte_data_malta +ffffffff82b0de60 r lcac_pitcairn +ffffffff82b0e530 r cac_override_pitcairn +ffffffff82b0e544 r powertune_data_pitcairn +ffffffff82b0e580 r lcac_cape_verde +ffffffff82b0e9d0 r cac_override_cape_verde +ffffffff82b0e9e4 r powertune_data_cape_verde +ffffffff82b0ea20 r cac_weights_cape_verde_pro +ffffffff82b0eef0 r cac_weights_heathrow +ffffffff82b0f3c0 r cac_weights_chelsea_xt +ffffffff82b0f890 r cac_weights_chelsea_pro +ffffffff82b0fd60 r cac_weights_cape_verde +ffffffff82b10230 r cac_weights_mars_pro +ffffffff82b10700 r lcac_mars_pro +ffffffff82b10a60 r cac_override_oland +ffffffff82b10a74 r powertune_data_mars_pro +ffffffff82b10ab0 r cac_weights_mars_xt +ffffffff82b10f80 r cac_weights_oland_pro +ffffffff82b11450 r cac_weights_oland_xt +ffffffff82b11920 r lcac_oland +ffffffff82b11c7c r powertune_data_oland +ffffffff82b11cc0 r cac_weights_hainan +ffffffff82b12184 r powertune_data_hainan +ffffffff82b121c0 r dte_data_aruba_pro +ffffffff82b12290 r dte_data_tahiti_pro +ffffffff82b12360 r dte_data_curacao_pro +ffffffff82b12430 r dte_data_neptune_xt +ffffffff82b12500 r dte_data_sun_xt +ffffffff82b125d0 r dte_data_venus_xtx +ffffffff82b126a0 r dte_data_venus_xt +ffffffff82b12770 r dte_data_venus_pro +ffffffff82b12840 r dte_data_mars_pro +ffffffff82b13000 r si_program_jump_on_start.data +ffffffff82b14000 r sumo_dtc +ffffffff82b15000 r trinity_mgcg_shls_default +ffffffff82b15380 r trinity_sysls_enable +ffffffff82b15450 r trinity_sysls_disable +ffffffff82b17000 r GC_BASE +ffffffff82b170a8 r HDP_BASE +ffffffff82b17150 r MMHUB_BASE +ffffffff82b171f8 r ATHUB_BASE +ffffffff82b172a0 r NBIO_BASE +ffffffff82b17348 r MP0_BASE +ffffffff82b173f0 r MP1_BASE +ffffffff82b17498 r DF_BASE +ffffffff82b17540 r OSSSYS_BASE +ffffffff82b175e8 r SDMA0_BASE +ffffffff82b17690 r SDMA1_BASE +ffffffff82b17738 r SDMA2_BASE +ffffffff82b177e0 r SDMA3_BASE +ffffffff82b17888 r SDMA4_BASE +ffffffff82b17930 r SMUIO_BASE +ffffffff82b179d8 r THM_BASE +ffffffff82b17a80 r UMC_BASE +ffffffff82b17b28 r VCN_BASE +ffffffff82b18000 r amdgpu_afmt_predefined_acr +ffffffff82b19000 r atom_op_names +ffffffff82b193e0 r opcode_table +ffffffff82b19bd0 r atom_dst_to_src +ffffffff82b19c50 r atom_io_names +ffffffff82b19c80 r atom_table_names +ffffffff82b19ed0 r atom_iio_len +ffffffff82b1a000 r object_connector_convert +ffffffff82b1a058 R amdgpu_vbios_version_attr_group +ffffffff82b1b000 r voltage_names +ffffffff82b1b020 r pre_emph_names +ffffffff82b1c000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82b1e000 r amdgpu_benchmark.common_modes +ffffffff82b1f000 r amdgpu_cgs_ops +ffffffff82b20000 r amdgpu_connector_dp_funcs +ffffffff82b20078 r amdgpu_connector_dp_helper_funcs +ffffffff82b200d8 r amdgpu_connector_edp_funcs +ffffffff82b20150 r amdgpu_connector_vga_funcs +ffffffff82b201c8 r amdgpu_connector_vga_helper_funcs +ffffffff82b20228 r amdgpu_connector_dvi_funcs +ffffffff82b202a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82b20300 r amdgpu_connector_lvds_funcs +ffffffff82b20378 r amdgpu_connector_lvds_helper_funcs +ffffffff82b203e0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82b22000 R amdgpu_ctx_num_entities +ffffffff82b23000 r amdgpu_kms_driver +ffffffff82b230f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82b24000 r hw_id_map +ffffffff82b24090 r hw_id_names +ffffffff82b25000 r hpd_names +ffffffff82b25030 r encoder_names +ffffffff82b25180 r dcc_retile_formats +ffffffff82b25270 r dcc_formats +ffffffff82b25360 R amdgpu_mode_funcs +ffffffff82b253b0 r amdgpu_underscan_enum_list +ffffffff82b253e0 r amdgpu_audio_enum_list +ffffffff82b25410 r amdgpu_dither_enum_list +ffffffff82b25430 r amdgpu_fb_funcs_atomic +ffffffff82b25448 r amdgpu_fb_funcs +ffffffff82b26000 R amdgpu_dmabuf_ops +ffffffff82b27000 R amdgpu_ioctls_kms +ffffffff82b27210 R amdgpu_partition_driver +ffffffff82b272f8 R amdgpu_ca +ffffffff82b27320 r pciidlist +ffffffff82b281f0 r amdgpu_unsupported_pciidlist +ffffffff82b28770 r amdgpu_kms_driver +ffffffff82b29000 r amdgpu_job_fence_ops +ffffffff82b29040 r amdgpu_fence_ops +ffffffff82b2a000 r amdgpu_gem_object_funcs +ffffffff82b2a070 r amdgpu_gem_vm_ops +ffffffff82b2b000 R amdgpu_gtt_mgr_attr_group +ffffffff82b2b018 r amdgpu_gtt_mgr_func +ffffffff82b2c000 r amdgpu_atombios_i2c_algo +ffffffff82b2d000 R node_id_to_phys_map +ffffffff82b2e000 R amdgpu_sched_ops +ffffffff82b30000 r amdgpu_vram_names +ffffffff82b31000 r amdgpu_preempt_mgr_func +ffffffff82b32000 R psp_ip_funcs +ffffffff82b320a0 R psp_v3_1_ip_block +ffffffff82b320b8 R psp_v10_0_ip_block +ffffffff82b320d0 R psp_v11_0_ip_block +ffffffff82b320e8 R psp_v11_0_8_ip_block +ffffffff82b32100 R psp_v12_0_ip_block +ffffffff82b32118 R psp_v13_0_ip_block +ffffffff82b32130 R psp_v13_0_4_ip_block +ffffffff82b34000 r sw_ring_info +ffffffff82b35000 r amdgpu_evict_flags.placements +ffffffff82b39000 R amdgpu_vkms_ip_block +ffffffff82b3a000 R amdgpu_vm_cpu_funcs +ffffffff82b3c000 R amdgpu_vm_sdma_funcs +ffffffff82b3d000 R amdgpu_vram_mgr_attr_group +ffffffff82b3d018 r amdgpu_vram_mgr_func +ffffffff82b3d040 r amdgpu_dummy_vram_mgr_func +ffffffff82b3e000 r xgmi_pcs_err_status_reg_arct +ffffffff82b3e020 r xgmi3x16_pcs_ras_fields +ffffffff82b3e1f0 r xgmi_pcs_ras_fields +ffffffff82b3e310 r wafl_pcs_ras_fields +ffffffff82b3f000 r GC_BASE +ffffffff82b3f0c0 r HDP_BASE +ffffffff82b3f180 r MMHUB_BASE +ffffffff82b3f240 r ATHUB_BASE +ffffffff82b3f300 r NBIF0_BASE +ffffffff82b3f3c0 r MP0_BASE +ffffffff82b3f480 r MP1_BASE +ffffffff82b3f540 r UVD_BASE +ffffffff82b3f600 r DF_BASE +ffffffff82b3f6c0 r OSSSYS_BASE +ffffffff82b3f780 r SDMA0_BASE +ffffffff82b3f840 r SDMA1_BASE +ffffffff82b3f900 r SDMA2_BASE +ffffffff82b3f9c0 r SDMA3_BASE +ffffffff82b3fa80 r SDMA4_BASE +ffffffff82b3fb40 r SDMA5_BASE +ffffffff82b3fc00 r SDMA6_BASE +ffffffff82b3fcc0 r SDMA7_BASE +ffffffff82b3fd80 r SMUIO_BASE +ffffffff82b3fe40 r THM_BASE +ffffffff82b3ff00 r UMC_BASE +ffffffff82b3ffc0 r RSMU_BASE +ffffffff82b41000 r cz_ih_ip_funcs +ffffffff82b410a0 R cz_ih_ip_block +ffffffff82b410b8 r cz_ih_funcs +ffffffff82b42000 r crtc_offsets +ffffffff82b42020 r dce_v10_0_ip_funcs +ffffffff82b420c0 R dce_v10_0_ip_block +ffffffff82b420d8 R dce_v10_1_ip_block +ffffffff82b420f0 r dce_v10_0_display_funcs +ffffffff82b42150 r hpd_offsets +ffffffff82b42168 r dce_v10_0_encoder_funcs +ffffffff82b42188 r dce_v10_0_dac_helper_funcs +ffffffff82b421f0 r dce_v10_0_dig_helper_funcs +ffffffff82b42258 r dce_v10_0_ext_helper_funcs +ffffffff82b422c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82b422f0 r dce_v10_0_crtc_irq_funcs +ffffffff82b42300 r dce_v10_0_pageflip_irq_funcs +ffffffff82b42310 r dce_v10_0_hpd_irq_funcs +ffffffff82b42320 r interrupt_status_offsets +ffffffff82b42380 r dce_v10_0_crtc_funcs +ffffffff82b42440 r dce_v10_0_crtc_helper_funcs +ffffffff82b424c0 r vga_control_regs +ffffffff82b424e0 r dig_offsets +ffffffff82b42500 r pin_offsets +ffffffff82b42520 r fiji_mgcg_cgcg_init +ffffffff82b42540 r golden_settings_fiji_a10 +ffffffff82b42570 r tonga_mgcg_cgcg_init +ffffffff82b42590 r golden_settings_tonga_a11 ffffffff82b43000 r crtc_offsets -ffffffff82b43020 r dce_v10_0_ip_funcs -ffffffff82b430c0 R dce_v10_0_ip_block -ffffffff82b430d8 R dce_v10_1_ip_block -ffffffff82b430f0 r dce_v10_0_display_funcs +ffffffff82b43020 r dce_v11_0_ip_funcs +ffffffff82b430c0 R dce_v11_0_ip_block +ffffffff82b430d8 R dce_v11_2_ip_block +ffffffff82b430f0 r dce_v11_0_display_funcs ffffffff82b43150 r hpd_offsets -ffffffff82b43168 r dce_v10_0_encoder_funcs -ffffffff82b43188 r dce_v10_0_dac_helper_funcs -ffffffff82b431f0 r dce_v10_0_dig_helper_funcs -ffffffff82b43258 r dce_v10_0_ext_helper_funcs -ffffffff82b432c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82b432f0 r dce_v10_0_crtc_irq_funcs -ffffffff82b43300 r dce_v10_0_pageflip_irq_funcs -ffffffff82b43310 r dce_v10_0_hpd_irq_funcs +ffffffff82b43168 r dce_v11_0_encoder_funcs +ffffffff82b43188 r dce_v11_0_dac_helper_funcs +ffffffff82b431f0 r dce_v11_0_dig_helper_funcs +ffffffff82b43258 r dce_v11_0_ext_helper_funcs +ffffffff82b432c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82b432f0 r dce_v11_0_crtc_irq_funcs +ffffffff82b43300 r dce_v11_0_pageflip_irq_funcs +ffffffff82b43310 r dce_v11_0_hpd_irq_funcs ffffffff82b43320 r interrupt_status_offsets -ffffffff82b43380 r dce_v10_0_crtc_funcs -ffffffff82b43440 r dce_v10_0_crtc_helper_funcs +ffffffff82b43380 r dce_v11_0_crtc_funcs +ffffffff82b43440 r dce_v11_0_crtc_helper_funcs ffffffff82b434c0 r vga_control_regs ffffffff82b434e0 r dig_offsets -ffffffff82b43500 r pin_offsets -ffffffff82b43520 r fiji_mgcg_cgcg_init -ffffffff82b43540 r golden_settings_fiji_a10 -ffffffff82b43570 r tonga_mgcg_cgcg_init -ffffffff82b43590 r golden_settings_tonga_a11 -ffffffff82b44000 r crtc_offsets -ffffffff82b44020 r dce_v11_0_ip_funcs -ffffffff82b440c0 R dce_v11_0_ip_block -ffffffff82b440d8 R dce_v11_2_ip_block -ffffffff82b440f0 r dce_v11_0_display_funcs -ffffffff82b44150 r hpd_offsets -ffffffff82b44168 r dce_v11_0_encoder_funcs -ffffffff82b44188 r dce_v11_0_dac_helper_funcs -ffffffff82b441f0 r dce_v11_0_dig_helper_funcs -ffffffff82b44258 r dce_v11_0_ext_helper_funcs -ffffffff82b442c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82b442f0 r dce_v11_0_crtc_irq_funcs -ffffffff82b44300 r dce_v11_0_pageflip_irq_funcs -ffffffff82b44310 r dce_v11_0_hpd_irq_funcs -ffffffff82b44320 r interrupt_status_offsets -ffffffff82b44380 r dce_v11_0_crtc_funcs -ffffffff82b44440 r dce_v11_0_crtc_helper_funcs -ffffffff82b444c0 r vga_control_regs -ffffffff82b444e0 r dig_offsets -ffffffff82b44510 r cz_mgcg_cgcg_init -ffffffff82b44530 r cz_golden_settings_a11 -ffffffff82b44550 r stoney_golden_settings_a11 -ffffffff82b44570 r polaris11_golden_settings_a11 -ffffffff82b445b0 r polaris10_golden_settings_a11 -ffffffff82b45000 R df_v1_7_funcs -ffffffff82b45070 r df_v1_7_channel_number -ffffffff82b46000 R df_v3_6_funcs -ffffffff82b46070 r df_v3_6_channel_number -ffffffff82b47000 R df_v4_3_funcs -ffffffff82b48000 r GC_BASE -ffffffff82b480a8 r HDP_BASE -ffffffff82b48150 r MMHUB_BASE -ffffffff82b481f8 r ATHUB_BASE -ffffffff82b482a0 r NBIO_BASE -ffffffff82b48348 r MP0_BASE -ffffffff82b483f0 r MP1_BASE -ffffffff82b48498 r VCN0_BASE -ffffffff82b48540 r DF_BASE -ffffffff82b485e8 r DCN_BASE -ffffffff82b48690 r OSSSYS_BASE -ffffffff82b48738 r SMUIO_BASE -ffffffff82b487e0 r THM_BASE -ffffffff82b49000 r gfx_v10_0_ip_funcs -ffffffff82b490a0 R gfx_v10_0_ip_block -ffffffff82b490b8 r gfx_v10_0_gfx_funcs -ffffffff82b49120 r golden_settings_gc_rlc_spm_10_0_nv10 -ffffffff82b4f3c0 r golden_settings_gc_rlc_spm_10_1_nv14 -ffffffff82b52de0 r golden_settings_gc_rlc_spm_10_1_2_nv12 -ffffffff82b59080 r gfx_v10_0_kiq_pm4_funcs -ffffffff82b590c0 r gfx_v10_0_ring_funcs_kiq -ffffffff82b59200 r gfx_v10_0_ring_funcs_gfx -ffffffff82b59340 r gfx_v10_0_ring_funcs_compute -ffffffff82b59480 r gfx_v10_0_eop_irq_funcs -ffffffff82b59490 r gfx_v10_0_kiq_irq_funcs -ffffffff82b594a0 r gfx_v10_0_priv_reg_irq_funcs -ffffffff82b594b0 r gfx_v10_0_priv_inst_irq_funcs -ffffffff82b594c0 r gfx_v10_0_rlc_funcs -ffffffff82b59528 r gfx_v10_0_rlc_funcs_sriov -ffffffff82b59590 r gfx10_cs_data -ffffffff82b595b0 r gfx10_SECT_CONTEXT_defs -ffffffff82b59640 r gfx10_SECT_CONTEXT_def_1 -ffffffff82b599a0 r gfx10_SECT_CONTEXT_def_3 -ffffffff82b599b0 r gfx10_SECT_CONTEXT_def_4 -ffffffff82b59c28 r gfx10_SECT_CONTEXT_def_5 -ffffffff82b59c30 r gfx10_SECT_CONTEXT_def_6 -ffffffff82b59c40 r gfx10_SECT_CONTEXT_def_2 -ffffffff82b5a080 r gfx10_SECT_CONTEXT_def_7 -ffffffff82b5a190 r gfx10_SECT_CONTEXT_def_8 -ffffffff82b5a4c0 r golden_settings_gc_10_1 -ffffffff82b5a880 r golden_settings_gc_10_0_nv10 -ffffffff82b5a880 r golden_settings_gc_10_1_1 -ffffffff82b5ac10 r golden_settings_gc_10_1_2 -ffffffff82b5ac10 r golden_settings_gc_10_1_nv14 -ffffffff82b5b000 r golden_settings_gc_10_1_2_nv12 -ffffffff82b5b000 r golden_settings_gc_10_3 -ffffffff82b5b408 r golden_settings_gc_10_3_sienna_cichlid -ffffffff82b5b410 r golden_settings_gc_10_3_2 -ffffffff82b5b800 r golden_settings_gc_10_3_vangogh -ffffffff82b5ba60 r golden_settings_gc_10_3_3 -ffffffff82b5bc40 r golden_settings_gc_10_3_4 -ffffffff82b5bfa0 r golden_settings_gc_10_3_5 -ffffffff82b5c2a0 r golden_settings_gc_10_0_cyan_skillfish -ffffffff82b5c5d0 r golden_settings_gc_10_3_6 -ffffffff82b5c7e0 r golden_settings_gc_10_3_7 -ffffffff82b5d000 r gfx_v11_0_ip_funcs -ffffffff82b5d0a0 R gfx_v11_0_ip_block -ffffffff82b5d0b8 r gfx_v11_0_gfx_funcs -ffffffff82b5d118 r gfx_v11_0_kiq_pm4_funcs -ffffffff82b5d158 r gfx_v11_0_ring_funcs_kiq -ffffffff82b5d298 r gfx_v11_0_ring_funcs_gfx -ffffffff82b5d3d8 r gfx_v11_0_ring_funcs_compute -ffffffff82b5d518 r gfx_v11_0_eop_irq_funcs -ffffffff82b5d528 r gfx_v11_0_priv_reg_irq_funcs -ffffffff82b5d538 r gfx_v11_0_priv_inst_irq_funcs -ffffffff82b5d548 r gfx_v11_0_rlc_gc_fed_irq_funcs -ffffffff82b5d558 r gfx_v11_0_rlc_funcs -ffffffff82b5d5c0 r gfx11_cs_data -ffffffff82b5d5e0 r gfx11_SECT_CONTEXT_defs -ffffffff82b5d660 r gfx11_SECT_CONTEXT_def_1 -ffffffff82b5d9c0 r gfx11_SECT_CONTEXT_def_3 -ffffffff82b5d9d0 r gfx11_SECT_CONTEXT_def_5 -ffffffff82b5d9d8 r gfx11_SECT_CONTEXT_def_6 -ffffffff82b5d9e0 r gfx11_SECT_CONTEXT_def_2 -ffffffff82b5de20 r gfx11_SECT_CONTEXT_def_4 -ffffffff82b5e0a0 r gfx11_SECT_CONTEXT_def_7 -ffffffff82b5e510 r golden_settings_gc_11_0_1 -ffffffff82b5e5f0 r golden_settings_gc_11_0 -ffffffff82b5f000 r gfx_v8_0_ip_funcs -ffffffff82b5f0a0 R gfx_v8_0_ip_block -ffffffff82b5f0b8 R gfx_v8_1_ip_block -ffffffff82b5f0d0 r gfx_v8_0_gfx_funcs -ffffffff82b5f130 r gfx_v8_0_ring_funcs_kiq -ffffffff82b5f270 r gfx_v8_0_ring_funcs_gfx -ffffffff82b5f3b0 r gfx_v8_0_ring_funcs_compute -ffffffff82b5f4f0 r amdgpu_gds_reg_offset -ffffffff82b5f5f0 r gfx_v8_0_eop_irq_funcs -ffffffff82b5f600 r gfx_v8_0_priv_reg_irq_funcs -ffffffff82b5f610 r gfx_v8_0_priv_inst_irq_funcs -ffffffff82b5f620 r gfx_v8_0_cp_ecc_error_irq_funcs -ffffffff82b5f630 r gfx_v8_0_sq_irq_funcs -ffffffff82b5f640 r sq_edc_source_names -ffffffff82b5f678 r iceland_rlc_funcs -ffffffff82b5f6e0 r vi_cs_data -ffffffff82b5f700 r vi_SECT_CONTEXT_defs -ffffffff82b5f780 r vi_SECT_CONTEXT_def_1 -ffffffff82b5fad0 r vi_SECT_CONTEXT_def_3 -ffffffff82b5faf0 r vi_SECT_CONTEXT_def_4 -ffffffff82b5fd64 r vi_SECT_CONTEXT_def_5 -ffffffff82b5fd6c r vi_SECT_CONTEXT_def_6 -ffffffff82b5fd70 r vi_SECT_CONTEXT_def_2 -ffffffff82b601c0 r vi_SECT_CONTEXT_def_7 -ffffffff82b60570 r vgpr_init_compute_shader -ffffffff82b60680 r vgpr_init_regs -ffffffff82b60710 r sgpr1_init_regs -ffffffff82b607a0 r sgpr2_init_regs -ffffffff82b60830 r sec_ded_counter_registers -ffffffff82b608a0 r iceland_mgcg_cgcg_init -ffffffff82b60ba0 r golden_settings_iceland_a11 -ffffffff82b60c60 r iceland_golden_common_all -ffffffff82b60cc0 r fiji_mgcg_cgcg_init -ffffffff82b60e70 r golden_settings_fiji_a10 -ffffffff82b60f00 r fiji_golden_common_all -ffffffff82b60f80 r tonga_mgcg_cgcg_init -ffffffff82b61310 r golden_settings_tonga_a11 -ffffffff82b613d0 r tonga_golden_common_all -ffffffff82b61430 r golden_settings_vegam_a11 -ffffffff82b61500 r vegam_golden_common_all -ffffffff82b61550 r golden_settings_polaris11_a11 -ffffffff82b61620 r polaris11_golden_common_all -ffffffff82b61670 r golden_settings_polaris10_a11 -ffffffff82b61740 r polaris10_golden_common_all -ffffffff82b617a0 r cz_mgcg_cgcg_init -ffffffff82b61b30 r cz_golden_settings_a11 -ffffffff82b61bc0 r cz_golden_common_all -ffffffff82b61c20 r stoney_mgcg_cgcg_init -ffffffff82b61c60 r stoney_golden_settings_a11 -ffffffff82b61ce0 r stoney_golden_common_all -ffffffff82b62000 R gfx_v9_0_ras_ops -ffffffff82b62040 r gfx_v9_0_ip_funcs -ffffffff82b620e0 R gfx_v9_0_ip_block -ffffffff82b62100 r ras_gfx_subblocks -ffffffff82b62b80 r gfx_v9_0_edc_counter_regs -ffffffff82b62f20 r gfx_v9_0_ras_fields -ffffffff82b64000 r gfx_v9_0_gfx_funcs -ffffffff82b64060 r gfx_v9_0_kiq_pm4_funcs -ffffffff82b640a0 r gfx_v9_0_ring_funcs_kiq -ffffffff82b641e0 r gfx_v9_0_ring_funcs_gfx -ffffffff82b64320 r gfx_v9_0_sw_ring_funcs_gfx -ffffffff82b64460 r gfx_v9_0_ring_funcs_compute -ffffffff82b645a0 r gfx_v9_0_eop_irq_funcs -ffffffff82b645b0 r gfx_v9_0_priv_reg_irq_funcs -ffffffff82b645c0 r gfx_v9_0_priv_inst_irq_funcs -ffffffff82b645d0 r gfx_v9_0_cp_ecc_error_irq_funcs -ffffffff82b645e0 r gfx_v9_0_rlc_funcs -ffffffff82b64650 r gfx9_cs_data -ffffffff82b64670 r gfx9_SECT_CONTEXT_defs -ffffffff82b64700 r gfx9_SECT_CONTEXT_def_1 -ffffffff82b64a50 r gfx9_SECT_CONTEXT_def_3 -ffffffff82b64a60 r gfx9_SECT_CONTEXT_def_4 -ffffffff82b64cd4 r gfx9_SECT_CONTEXT_def_5 -ffffffff82b64cdc r gfx9_SECT_CONTEXT_def_6 -ffffffff82b64ce0 r gfx9_SECT_CONTEXT_def_7 -ffffffff82b64df0 r gfx9_SECT_CONTEXT_def_2 -ffffffff82b65260 r gfx9_SECT_CONTEXT_def_8 -ffffffff82b654d0 r vgpr_init_compute_shader_arcturus -ffffffff82b65d60 r vgpr_init_regs_arcturus -ffffffff82b65ef0 r vgpr_init_regs -ffffffff82b66080 r sgpr1_init_regs -ffffffff82b66210 r sgpr2_init_regs -ffffffff82b663a0 r golden_settings_gc_9_0 -ffffffff82b66580 r golden_settings_gc_9_0_vg10 -ffffffff82b66730 r golden_settings_gc_9_2_1 -ffffffff82b668b0 r golden_settings_gc_9_2_1_vg12 -ffffffff82b669f0 r golden_settings_gc_9_0_vg20 -ffffffff82b66b00 r golden_settings_gc_9_4_1_arct -ffffffff82b66c10 r golden_settings_gc_9_1 -ffffffff82b66e50 r golden_settings_gc_9_1_rv2 -ffffffff82b67020 r golden_settings_gc_9_1_rv1 -ffffffff82b670d0 r golden_settings_gc_9_1_rn -ffffffff82b671f0 r golden_settings_gc_9_x_common -ffffffff82b68000 R gfx_v9_4_ras_ops -ffffffff82b68040 r gfx_v9_4_edc_counter_regs -ffffffff82b68420 r gfx_v9_4_ras_fields -ffffffff82b6a000 R vgpr_init_regs_aldebaran -ffffffff82b6a1b0 R sgpr112_init_regs_aldebaran -ffffffff82b6a360 R sgpr96_init_regs_aldebaran -ffffffff82b6a510 R sgpr64_init_regs_aldebaran -ffffffff82b6a6c0 r golden_settings_gc_9_4_2_alde -ffffffff82b6a720 r golden_settings_gc_9_4_2_alde_die_0 -ffffffff82b6a7b0 r golden_settings_gc_9_4_2_alde_die_1 -ffffffff82b6a840 r sgpr112_init_compute_shader_aldebaran -ffffffff82b6aa60 r sgpr96_init_compute_shader_aldebaran -ffffffff82b6ac50 r sgpr64_init_compute_shader_aldebaran -ffffffff82b6adc0 r vgpr_init_compute_shader_aldebaran -ffffffff82b6b6a0 r gfx_v9_4_2_edc_counter_regs -ffffffff82b6ba20 r gfx_v9_4_2_ras_fields -ffffffff82b6d3c0 r gfx_v9_4_2_utc_blocks -ffffffff82b6e000 r gfx_v9_4_3_ip_funcs -ffffffff82b6e0a0 R gfx_v9_4_3_ip_block -ffffffff82b6e0b8 r gfx_v9_4_3_kiq_pm4_funcs -ffffffff82b6e0f8 r gfx_v9_4_3_ring_funcs_kiq -ffffffff82b6e238 r gfx_v9_4_3_ring_funcs_compute -ffffffff82b6e378 r gfx_v9_4_3_eop_irq_funcs -ffffffff82b6e388 r gfx_v9_4_3_priv_reg_irq_funcs -ffffffff82b6e398 r gfx_v9_4_3_priv_inst_irq_funcs -ffffffff82b6e3a8 r gfx_v9_4_3_rlc_funcs -ffffffff82b6e410 r gfx_v9_4_3_gfx_funcs -ffffffff82b6e470 r gfx_v9_4_3_ce_reg_list -ffffffff82b6e800 r gfx_v9_4_3_ras_mem_list_array -ffffffff82b6e960 r gfx_v9_4_3_ue_reg_list -ffffffff82b6ed20 r gfx_v9_4_3_ras_cp_mem_list -ffffffff82b6ed70 r gfx_v9_4_3_ras_gcea_mem_list -ffffffff82b6eeb0 r gfx_v9_4_3_ras_gc_cane_mem_list -ffffffff82b6eec0 r gfx_v9_4_3_ras_gcutcl2_mem_list -ffffffff82b6eed0 r gfx_v9_4_3_ras_gds_mem_list -ffffffff82b6eee0 r gfx_v9_4_3_ras_lds_mem_list -ffffffff82b6f100 r gfx_v9_4_3_ras_rlc_mem_list -ffffffff82b6f180 r gfx_v9_4_3_ras_sp_mem_list -ffffffff82b6f190 r gfx_v9_4_3_ras_spi_mem_list -ffffffff82b6f1d0 r gfx_v9_4_3_ras_sqc_mem_list -ffffffff82b6f340 r gfx_v9_4_3_ras_sq_mem_list -ffffffff82b6f380 r gfx_v9_4_3_ras_ta_mem_list -ffffffff82b6f3d0 r gfx_v9_4_3_ras_tcc_mem_list -ffffffff82b6f3e0 r gfx_v9_4_3_ras_tca_mem_list -ffffffff82b6f3f0 r gfx_v9_4_3_ras_tci_mem_list -ffffffff82b6f400 r gfx_v9_4_3_ras_tcp_mem_list -ffffffff82b6f590 r gfx_v9_4_3_ras_td_mem_list -ffffffff82b6f5c0 r gfx_v9_4_3_ras_tcx_mem_list -ffffffff82b6fb40 r gfx_v9_4_3_ras_atc_l2_mem_list -ffffffff82b6fb50 r gfx_v9_4_3_ras_utcl2_mem_list -ffffffff82b6fb60 r gfx_v9_4_3_ras_vml2_mem_list -ffffffff82b6fb70 r gfx_v9_4_3_ras_vml2_walker_mem_list -ffffffff82b70000 R gfxhub_v1_0_funcs -ffffffff82b71000 R gfxhub_v1_2_funcs -ffffffff82b72000 R gfxhub_v2_0_funcs -ffffffff82b72060 r gfxhub_v2_0_vmhub_funcs +ffffffff82b43510 r cz_mgcg_cgcg_init +ffffffff82b43530 r cz_golden_settings_a11 +ffffffff82b43550 r stoney_golden_settings_a11 +ffffffff82b43570 r polaris11_golden_settings_a11 +ffffffff82b435b0 r polaris10_golden_settings_a11 +ffffffff82b44000 R df_v1_7_funcs +ffffffff82b44070 r df_v1_7_channel_number +ffffffff82b45000 R df_v3_6_funcs +ffffffff82b45070 r df_v3_6_channel_number +ffffffff82b46000 R df_v4_3_funcs +ffffffff82b47000 r GC_BASE +ffffffff82b470a8 r HDP_BASE +ffffffff82b47150 r MMHUB_BASE +ffffffff82b471f8 r ATHUB_BASE +ffffffff82b472a0 r NBIO_BASE +ffffffff82b47348 r MP0_BASE +ffffffff82b473f0 r MP1_BASE +ffffffff82b47498 r VCN0_BASE +ffffffff82b47540 r DF_BASE +ffffffff82b475e8 r DCN_BASE +ffffffff82b47690 r OSSSYS_BASE +ffffffff82b47738 r SMUIO_BASE +ffffffff82b477e0 r THM_BASE +ffffffff82b48000 r gfx_v10_0_ip_funcs +ffffffff82b480a0 R gfx_v10_0_ip_block +ffffffff82b480b8 r gfx_v10_0_gfx_funcs +ffffffff82b48120 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82b4e3c0 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82b51de0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82b58080 r gfx_v10_0_kiq_pm4_funcs +ffffffff82b580c0 r gfx_v10_0_ring_funcs_kiq +ffffffff82b58200 r gfx_v10_0_ring_funcs_gfx +ffffffff82b58340 r gfx_v10_0_ring_funcs_compute +ffffffff82b58480 r gfx_v10_0_eop_irq_funcs +ffffffff82b58490 r gfx_v10_0_kiq_irq_funcs +ffffffff82b584a0 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82b584b0 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82b584c0 r gfx_v10_0_rlc_funcs +ffffffff82b58528 r gfx_v10_0_rlc_funcs_sriov +ffffffff82b58590 r gfx10_cs_data +ffffffff82b585b0 r gfx10_SECT_CONTEXT_defs +ffffffff82b58640 r gfx10_SECT_CONTEXT_def_1 +ffffffff82b589a0 r gfx10_SECT_CONTEXT_def_3 +ffffffff82b589b0 r gfx10_SECT_CONTEXT_def_4 +ffffffff82b58c28 r gfx10_SECT_CONTEXT_def_5 +ffffffff82b58c30 r gfx10_SECT_CONTEXT_def_6 +ffffffff82b58c40 r gfx10_SECT_CONTEXT_def_2 +ffffffff82b59080 r gfx10_SECT_CONTEXT_def_7 +ffffffff82b59190 r gfx10_SECT_CONTEXT_def_8 +ffffffff82b594c0 r golden_settings_gc_10_1 +ffffffff82b59880 r golden_settings_gc_10_0_nv10 +ffffffff82b59880 r golden_settings_gc_10_1_1 +ffffffff82b59c10 r golden_settings_gc_10_1_2 +ffffffff82b59c10 r golden_settings_gc_10_1_nv14 +ffffffff82b5a000 r golden_settings_gc_10_1_2_nv12 +ffffffff82b5a000 r golden_settings_gc_10_3 +ffffffff82b5a408 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82b5a410 r golden_settings_gc_10_3_2 +ffffffff82b5a800 r golden_settings_gc_10_3_vangogh +ffffffff82b5aa60 r golden_settings_gc_10_3_3 +ffffffff82b5ac40 r golden_settings_gc_10_3_4 +ffffffff82b5afa0 r golden_settings_gc_10_3_5 +ffffffff82b5b2a0 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82b5b5d0 r golden_settings_gc_10_3_6 +ffffffff82b5b7e0 r golden_settings_gc_10_3_7 +ffffffff82b5c000 r gfx_v11_0_ip_funcs +ffffffff82b5c0a0 R gfx_v11_0_ip_block +ffffffff82b5c0b8 r gfx_v11_0_gfx_funcs +ffffffff82b5c118 r gfx_v11_0_kiq_pm4_funcs +ffffffff82b5c158 r gfx_v11_0_ring_funcs_kiq +ffffffff82b5c298 r gfx_v11_0_ring_funcs_gfx +ffffffff82b5c3d8 r gfx_v11_0_ring_funcs_compute +ffffffff82b5c518 r gfx_v11_0_eop_irq_funcs +ffffffff82b5c528 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82b5c538 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82b5c548 r gfx_v11_0_rlc_gc_fed_irq_funcs +ffffffff82b5c558 r gfx_v11_0_rlc_funcs +ffffffff82b5c5c0 r gfx11_cs_data +ffffffff82b5c5e0 r gfx11_SECT_CONTEXT_defs +ffffffff82b5c660 r gfx11_SECT_CONTEXT_def_1 +ffffffff82b5c9c0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82b5c9d0 r gfx11_SECT_CONTEXT_def_5 +ffffffff82b5c9d8 r gfx11_SECT_CONTEXT_def_6 +ffffffff82b5c9e0 r gfx11_SECT_CONTEXT_def_2 +ffffffff82b5ce20 r gfx11_SECT_CONTEXT_def_4 +ffffffff82b5d0a0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82b5d510 r golden_settings_gc_11_0_1 +ffffffff82b5d5f0 r golden_settings_gc_11_0 +ffffffff82b5e000 r gfx_v8_0_ip_funcs +ffffffff82b5e0a0 R gfx_v8_0_ip_block +ffffffff82b5e0b8 R gfx_v8_1_ip_block +ffffffff82b5e0d0 r gfx_v8_0_gfx_funcs +ffffffff82b5e130 r gfx_v8_0_ring_funcs_kiq +ffffffff82b5e270 r gfx_v8_0_ring_funcs_gfx +ffffffff82b5e3b0 r gfx_v8_0_ring_funcs_compute +ffffffff82b5e4f0 r amdgpu_gds_reg_offset +ffffffff82b5e5f0 r gfx_v8_0_eop_irq_funcs +ffffffff82b5e600 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82b5e610 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82b5e620 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82b5e630 r gfx_v8_0_sq_irq_funcs +ffffffff82b5e640 r sq_edc_source_names +ffffffff82b5e678 r iceland_rlc_funcs +ffffffff82b5e6e0 r vi_cs_data +ffffffff82b5e700 r vi_SECT_CONTEXT_defs +ffffffff82b5e780 r vi_SECT_CONTEXT_def_1 +ffffffff82b5ead0 r vi_SECT_CONTEXT_def_3 +ffffffff82b5eaf0 r vi_SECT_CONTEXT_def_4 +ffffffff82b5ed64 r vi_SECT_CONTEXT_def_5 +ffffffff82b5ed6c r vi_SECT_CONTEXT_def_6 +ffffffff82b5ed70 r vi_SECT_CONTEXT_def_2 +ffffffff82b5f1c0 r vi_SECT_CONTEXT_def_7 +ffffffff82b5f570 r vgpr_init_compute_shader +ffffffff82b5f680 r vgpr_init_regs +ffffffff82b5f710 r sgpr1_init_regs +ffffffff82b5f7a0 r sgpr2_init_regs +ffffffff82b5f830 r sec_ded_counter_registers +ffffffff82b5f8a0 r iceland_mgcg_cgcg_init +ffffffff82b5fba0 r golden_settings_iceland_a11 +ffffffff82b5fc60 r iceland_golden_common_all +ffffffff82b5fcc0 r fiji_mgcg_cgcg_init +ffffffff82b5fe70 r golden_settings_fiji_a10 +ffffffff82b5ff00 r fiji_golden_common_all +ffffffff82b5ff80 r tonga_mgcg_cgcg_init +ffffffff82b60310 r golden_settings_tonga_a11 +ffffffff82b603d0 r tonga_golden_common_all +ffffffff82b60430 r golden_settings_vegam_a11 +ffffffff82b60500 r vegam_golden_common_all +ffffffff82b60550 r golden_settings_polaris11_a11 +ffffffff82b60620 r polaris11_golden_common_all +ffffffff82b60670 r golden_settings_polaris10_a11 +ffffffff82b60740 r polaris10_golden_common_all +ffffffff82b607a0 r cz_mgcg_cgcg_init +ffffffff82b60b30 r cz_golden_settings_a11 +ffffffff82b60bc0 r cz_golden_common_all +ffffffff82b60c20 r stoney_mgcg_cgcg_init +ffffffff82b60c60 r stoney_golden_settings_a11 +ffffffff82b60ce0 r stoney_golden_common_all +ffffffff82b61000 R gfx_v9_0_ras_ops +ffffffff82b61040 r gfx_v9_0_ip_funcs +ffffffff82b610e0 R gfx_v9_0_ip_block +ffffffff82b61100 r ras_gfx_subblocks +ffffffff82b61b80 r gfx_v9_0_edc_counter_regs +ffffffff82b61f20 r gfx_v9_0_ras_fields +ffffffff82b63000 r gfx_v9_0_gfx_funcs +ffffffff82b63060 r gfx_v9_0_kiq_pm4_funcs +ffffffff82b630a0 r gfx_v9_0_ring_funcs_kiq +ffffffff82b631e0 r gfx_v9_0_ring_funcs_gfx +ffffffff82b63320 r gfx_v9_0_sw_ring_funcs_gfx +ffffffff82b63460 r gfx_v9_0_ring_funcs_compute +ffffffff82b635a0 r gfx_v9_0_eop_irq_funcs +ffffffff82b635b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82b635c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82b635d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82b635e0 r gfx_v9_0_rlc_funcs +ffffffff82b63650 r gfx9_cs_data +ffffffff82b63670 r gfx9_SECT_CONTEXT_defs +ffffffff82b63700 r gfx9_SECT_CONTEXT_def_1 +ffffffff82b63a50 r gfx9_SECT_CONTEXT_def_3 +ffffffff82b63a60 r gfx9_SECT_CONTEXT_def_4 +ffffffff82b63cd4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82b63cdc r gfx9_SECT_CONTEXT_def_6 +ffffffff82b63ce0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82b63df0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82b64260 r gfx9_SECT_CONTEXT_def_8 +ffffffff82b644d0 r vgpr_init_compute_shader_arcturus +ffffffff82b64d60 r vgpr_init_regs_arcturus +ffffffff82b64ef0 r vgpr_init_regs +ffffffff82b65080 r sgpr1_init_regs +ffffffff82b65210 r sgpr2_init_regs +ffffffff82b653a0 r golden_settings_gc_9_0 +ffffffff82b65580 r golden_settings_gc_9_0_vg10 +ffffffff82b65730 r golden_settings_gc_9_2_1 +ffffffff82b658b0 r golden_settings_gc_9_2_1_vg12 +ffffffff82b659f0 r golden_settings_gc_9_0_vg20 +ffffffff82b65b00 r golden_settings_gc_9_4_1_arct +ffffffff82b65c10 r golden_settings_gc_9_1 +ffffffff82b65e50 r golden_settings_gc_9_1_rv2 +ffffffff82b66020 r golden_settings_gc_9_1_rv1 +ffffffff82b660d0 r golden_settings_gc_9_1_rn +ffffffff82b661f0 r golden_settings_gc_9_x_common +ffffffff82b67000 R gfx_v9_4_ras_ops +ffffffff82b67040 r gfx_v9_4_edc_counter_regs +ffffffff82b67420 r gfx_v9_4_ras_fields +ffffffff82b69000 R vgpr_init_regs_aldebaran +ffffffff82b691b0 R sgpr112_init_regs_aldebaran +ffffffff82b69360 R sgpr96_init_regs_aldebaran +ffffffff82b69510 R sgpr64_init_regs_aldebaran +ffffffff82b696c0 r golden_settings_gc_9_4_2_alde +ffffffff82b69720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82b697b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82b69840 r sgpr112_init_compute_shader_aldebaran +ffffffff82b69a60 r sgpr96_init_compute_shader_aldebaran +ffffffff82b69c50 r sgpr64_init_compute_shader_aldebaran +ffffffff82b69dc0 r vgpr_init_compute_shader_aldebaran +ffffffff82b6a6a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82b6aa20 r gfx_v9_4_2_ras_fields +ffffffff82b6c3c0 r gfx_v9_4_2_utc_blocks +ffffffff82b6d000 r gfx_v9_4_3_ip_funcs +ffffffff82b6d0a0 R gfx_v9_4_3_ip_block +ffffffff82b6d0b8 r gfx_v9_4_3_kiq_pm4_funcs +ffffffff82b6d0f8 r gfx_v9_4_3_ring_funcs_kiq +ffffffff82b6d238 r gfx_v9_4_3_ring_funcs_compute +ffffffff82b6d378 r gfx_v9_4_3_eop_irq_funcs +ffffffff82b6d388 r gfx_v9_4_3_priv_reg_irq_funcs +ffffffff82b6d398 r gfx_v9_4_3_priv_inst_irq_funcs +ffffffff82b6d3a8 r gfx_v9_4_3_rlc_funcs +ffffffff82b6d410 r gfx_v9_4_3_gfx_funcs +ffffffff82b6d470 r gfx_v9_4_3_ce_reg_list +ffffffff82b6d800 r gfx_v9_4_3_ras_mem_list_array +ffffffff82b6d960 r gfx_v9_4_3_ue_reg_list +ffffffff82b6dd20 r gfx_v9_4_3_ras_cp_mem_list +ffffffff82b6dd70 r gfx_v9_4_3_ras_gcea_mem_list +ffffffff82b6deb0 r gfx_v9_4_3_ras_gc_cane_mem_list +ffffffff82b6dec0 r gfx_v9_4_3_ras_gcutcl2_mem_list +ffffffff82b6ded0 r gfx_v9_4_3_ras_gds_mem_list +ffffffff82b6dee0 r gfx_v9_4_3_ras_lds_mem_list +ffffffff82b6e100 r gfx_v9_4_3_ras_rlc_mem_list +ffffffff82b6e180 r gfx_v9_4_3_ras_sp_mem_list +ffffffff82b6e190 r gfx_v9_4_3_ras_spi_mem_list +ffffffff82b6e1d0 r gfx_v9_4_3_ras_sqc_mem_list +ffffffff82b6e340 r gfx_v9_4_3_ras_sq_mem_list +ffffffff82b6e380 r gfx_v9_4_3_ras_ta_mem_list +ffffffff82b6e3d0 r gfx_v9_4_3_ras_tcc_mem_list +ffffffff82b6e3e0 r gfx_v9_4_3_ras_tca_mem_list +ffffffff82b6e3f0 r gfx_v9_4_3_ras_tci_mem_list +ffffffff82b6e400 r gfx_v9_4_3_ras_tcp_mem_list +ffffffff82b6e590 r gfx_v9_4_3_ras_td_mem_list +ffffffff82b6e5c0 r gfx_v9_4_3_ras_tcx_mem_list +ffffffff82b6eb40 r gfx_v9_4_3_ras_atc_l2_mem_list +ffffffff82b6eb50 r gfx_v9_4_3_ras_utcl2_mem_list +ffffffff82b6eb60 r gfx_v9_4_3_ras_vml2_mem_list +ffffffff82b6eb70 r gfx_v9_4_3_ras_vml2_walker_mem_list +ffffffff82b6f000 R gfxhub_v1_0_funcs +ffffffff82b70000 R gfxhub_v1_2_funcs +ffffffff82b71000 R gfxhub_v2_0_funcs +ffffffff82b71060 r gfxhub_v2_0_vmhub_funcs +ffffffff82b71070 r gfxhub_client_ids +ffffffff82b72000 R gfxhub_v2_1_funcs +ffffffff82b72060 r gfxhub_v2_1_vmhub_funcs ffffffff82b72070 r gfxhub_client_ids -ffffffff82b73000 R gfxhub_v2_1_funcs -ffffffff82b73060 r gfxhub_v2_1_vmhub_funcs +ffffffff82b73000 R gfxhub_v3_0_funcs +ffffffff82b73060 r gfxhub_v3_0_vmhub_funcs ffffffff82b73070 r gfxhub_client_ids -ffffffff82b74000 R gfxhub_v3_0_funcs -ffffffff82b74060 r gfxhub_v3_0_vmhub_funcs +ffffffff82b74000 R gfxhub_v3_0_3_funcs +ffffffff82b74060 r gfxhub_v3_0_3_vmhub_funcs ffffffff82b74070 r gfxhub_client_ids -ffffffff82b75000 R gfxhub_v3_0_3_funcs -ffffffff82b75060 r gfxhub_v3_0_3_vmhub_funcs -ffffffff82b75070 r gfxhub_client_ids -ffffffff82b76000 R gmc_v10_0_ip_funcs -ffffffff82b760a0 R gmc_v10_0_ip_block -ffffffff82b760b8 r gmc_v10_0_gmc_funcs -ffffffff82b76110 r gmc_v10_0_irq_funcs -ffffffff82b76120 r gmc_v10_0_ecc_funcs -ffffffff82b77000 R gmc_v11_0_ip_funcs -ffffffff82b770a0 R gmc_v11_0_ip_block -ffffffff82b770b8 r gmc_v11_0_gmc_funcs -ffffffff82b77110 r gmc_v11_0_irq_funcs -ffffffff82b77120 r gmc_v11_0_ecc_funcs -ffffffff82b78000 r gmc_v7_0_ip_funcs -ffffffff82b780a0 R gmc_v7_0_ip_block -ffffffff82b780b8 R gmc_v7_4_ip_block -ffffffff82b780d0 r gmc_v7_0_gmc_funcs -ffffffff82b78128 r gmc_v7_0_irq_funcs -ffffffff82b78138 r iceland_mgcg_cgcg_init -ffffffff82b78150 r golden_settings_iceland_a11 -ffffffff82b78180 r mc_cg_registers -ffffffff82b781b0 r mc_cg_en -ffffffff82b781e0 r mc_cg_ls_en -ffffffff82b79000 r gmc_v8_0_ip_funcs -ffffffff82b790a0 R gmc_v8_0_ip_block -ffffffff82b790b8 R gmc_v8_1_ip_block -ffffffff82b790d0 R gmc_v8_5_ip_block -ffffffff82b790e8 r gmc_v8_0_gmc_funcs -ffffffff82b79140 r gmc_v8_0_irq_funcs -ffffffff82b79150 r fiji_mgcg_cgcg_init -ffffffff82b79160 r golden_settings_fiji_a10 -ffffffff82b79190 r tonga_mgcg_cgcg_init -ffffffff82b791a0 r golden_settings_tonga_a11 -ffffffff82b79200 r golden_settings_polaris11_a11 -ffffffff82b79230 r golden_settings_polaris10_a11 -ffffffff82b7926c r cz_mgcg_cgcg_init -ffffffff82b79280 r stoney_mgcg_cgcg_init -ffffffff82b792a0 r golden_settings_stoney_common -ffffffff82b7a000 R gmc_v9_0_ip_funcs -ffffffff82b7a0a0 R gmc_v9_0_ip_block -ffffffff82b7a0b8 r gmc_v9_0_gmc_funcs -ffffffff82b7a110 r gmc_v9_0_irq_funcs -ffffffff82b7a120 r gmc_v9_0_ecc_funcs -ffffffff82b7a130 r gfxhub_client_ids -ffffffff82b7a1a0 r mmhub_client_ids_vega10 -ffffffff82b7a490 r mmhub_client_ids_vega12 -ffffffff82b7a790 r mmhub_client_ids_vega20 -ffffffff82b7aa80 r mmhub_client_ids_arcturus -ffffffff82b7c290 r mmhub_client_ids_raven -ffffffff82b7c450 r mmhub_client_ids_renoir -ffffffff82b7c640 r mmhub_client_ids_aldebaran -ffffffff82b7de50 r ecc_umc_mcumc_ctrl_addrs -ffffffff82b7ded0 r ecc_umc_mcumc_ctrl_mask_addrs -ffffffff82b7df50 r golden_settings_mmhub_1_0_0 -ffffffff82b7df80 r golden_settings_athub_1_0_0 -ffffffff82b7e000 R hdp_v4_0_funcs -ffffffff82b7f000 R hdp_v5_0_funcs -ffffffff82b80000 R hdp_v5_2_funcs -ffffffff82b81000 R hdp_v6_0_funcs -ffffffff82b82000 r iceland_ih_ip_funcs -ffffffff82b820a0 R iceland_ih_ip_block -ffffffff82b820b8 r iceland_ih_funcs -ffffffff82b83000 r ih_v6_0_ip_funcs -ffffffff82b830a0 R ih_v6_0_ip_block -ffffffff82b830b8 r ih_v6_0_funcs -ffffffff82b830d8 r ih_v6_0_self_irq_funcs -ffffffff82b84000 r ih_v6_1_ip_funcs -ffffffff82b840a0 R ih_v6_1_ip_block -ffffffff82b840b8 r ih_v6_1_funcs -ffffffff82b840d8 r ih_v6_1_self_irq_funcs -ffffffff82b85000 R gfx_v11_0_imu_funcs -ffffffff82b85030 r imu_rlc_ram_golden_11 -ffffffff82b85680 r imu_rlc_ram_golden_11_0_2 -ffffffff82b86000 r imu_rlc_ram_golden_11_0_3 -ffffffff82b87000 r jpeg_v1_0_decode_ring_vm_funcs -ffffffff82b87140 r jpeg_v1_0_irq_funcs -ffffffff82b88000 r jpeg_v2_0_ip_funcs -ffffffff82b880a0 R jpeg_v2_0_ip_block -ffffffff82b880b8 r jpeg_v2_0_dec_ring_vm_funcs -ffffffff82b881f8 r jpeg_v2_0_irq_funcs -ffffffff82b89000 r jpeg_v2_5_ip_funcs -ffffffff82b890a0 R jpeg_v2_5_ip_block -ffffffff82b890b8 r jpeg_v2_6_ip_funcs -ffffffff82b89158 R jpeg_v2_6_ip_block -ffffffff82b89170 R jpeg_v2_6_ras_hw_ops -ffffffff82b891b0 r jpeg_v2_5_dec_ring_vm_funcs -ffffffff82b892f0 r jpeg_v2_6_dec_ring_vm_funcs -ffffffff82b89430 r jpeg_v2_5_irq_funcs -ffffffff82b89440 r jpeg_v2_6_ras_irq_funcs -ffffffff82b8a000 r jpeg_v3_0_ip_funcs -ffffffff82b8a0a0 R jpeg_v3_0_ip_block -ffffffff82b8a0b8 r jpeg_v3_0_dec_ring_vm_funcs -ffffffff82b8a1f8 r jpeg_v3_0_irq_funcs -ffffffff82b8b000 r jpeg_v4_0_ip_funcs -ffffffff82b8b0a0 R jpeg_v4_0_ip_block -ffffffff82b8b0b8 R jpeg_v4_0_ras_hw_ops -ffffffff82b8b0f8 r jpeg_v4_0_dec_ring_vm_funcs -ffffffff82b8b238 r jpeg_v4_0_irq_funcs -ffffffff82b8b248 r jpeg_v4_0_ras_irq_funcs -ffffffff82b8c000 r jpeg_v4_0_3_ip_funcs -ffffffff82b8c0a0 R jpeg_v4_0_3_ip_block -ffffffff82b8c0b8 r jpeg_v4_0_3_dec_ring_vm_funcs -ffffffff82b8c1f8 r jpeg_v4_0_3_irq_funcs -ffffffff82b8c208 r jpeg_v4_0_3_ras_hw_ops -ffffffff82b8c250 r jpeg_v4_0_3_ue_reg_list -ffffffff82b8d000 R lsdma_v6_0_funcs -ffffffff82b8e000 r mca_v3_0_mp0_hw_ops -ffffffff82b8e040 r mca_v3_0_mp1_hw_ops -ffffffff82b8e080 r mca_v3_0_mpio_hw_ops -ffffffff82b8f000 r mes_v10_1_ip_funcs -ffffffff82b8f0a0 R mes_v10_1_ip_block -ffffffff82b8f0b8 r mes_v10_1_funcs -ffffffff82b8f0e8 r mes_v10_1_ring_funcs -ffffffff82b90000 r mes_v11_0_ip_funcs -ffffffff82b900a0 R mes_v11_0_ip_block -ffffffff82b900b8 r mes_v11_0_funcs -ffffffff82b900e8 r mes_v11_0_ring_funcs -ffffffff82b91000 R mmhub_v1_0_funcs -ffffffff82b91050 r mmhub_v1_0_edc_cnt_regs -ffffffff82b910c0 r mmhub_v1_0_ras_fields -ffffffff82b92000 R mmhub_v1_7_funcs -ffffffff82b92050 r mmhub_v1_7_edc_cnt_regs -ffffffff82b92250 r mmhub_v1_7_ras_fields -ffffffff82b939c0 r mmhub_v1_7_ea_err_status_regs -ffffffff82b94000 R mmhub_v1_8_funcs -ffffffff82b94050 r mmhub_v1_8_ras_hw_ops -ffffffff82b94090 r mmhub_v1_8_ce_reg_list -ffffffff82b94180 r mmhub_v1_8_ras_memory_list -ffffffff82b942b0 r mmhub_v1_8_ue_reg_list -ffffffff82b95000 R mmhub_v2_0_funcs -ffffffff82b95050 r mmhub_v2_0_vmhub_funcs -ffffffff82b95060 r mmhub_client_ids_navi1x -ffffffff82b95190 r mmhub_client_ids_sienna_cichlid -ffffffff82b95450 r mmhub_client_ids_beige_goby -ffffffff82b96000 R mmhub_v2_3_funcs -ffffffff82b96050 r mmhub_v2_3_vmhub_funcs -ffffffff82b96060 r mmhub_client_ids_vangogh -ffffffff82b97000 R mmhub_v3_0_funcs -ffffffff82b97050 r mmhub_v3_0_vmhub_funcs -ffffffff82b97060 r mmhub_client_ids_v3_0_0 -ffffffff82b98000 R mmhub_v3_0_1_funcs -ffffffff82b98050 r mmhub_v3_0_1_vmhub_funcs -ffffffff82b98060 r mmhub_client_ids_v3_0_1 -ffffffff82b99000 R mmhub_v3_0_2_funcs -ffffffff82b99050 r mmhub_v3_0_2_vmhub_funcs -ffffffff82b99060 r mmhub_client_ids_v3_0_2 -ffffffff82b9a000 R mmhub_v9_4_ras_hw_ops -ffffffff82b9a040 R mmhub_v9_4_funcs -ffffffff82b9a090 r mmhub_v9_4_edc_cnt_regs -ffffffff82b9a330 r mmhub_v9_4_ras_fields -ffffffff82b9c3b0 r mmhub_v9_4_err_status_regs -ffffffff82b9d000 r xgpu_ai_mailbox_ack_irq_funcs -ffffffff82b9d010 r xgpu_ai_mailbox_rcv_irq_funcs -ffffffff82b9d020 R xgpu_ai_virt_ops -ffffffff82b9e000 r xgpu_nv_mailbox_ack_irq_funcs -ffffffff82b9e010 r xgpu_nv_mailbox_rcv_irq_funcs -ffffffff82b9e020 R xgpu_nv_virt_ops -ffffffff82b9f000 r xgpu_fiji_mgcg_cgcg_init -ffffffff82b9f240 r xgpu_fiji_golden_settings_a10 -ffffffff82b9f370 r xgpu_fiji_golden_common_all -ffffffff82b9f3f0 r xgpu_tonga_mgcg_cgcg_init -ffffffff82b9f810 r xgpu_tonga_golden_settings_a11 -ffffffff82b9f9d0 r xgpu_tonga_golden_common_all -ffffffff82b9fa28 r xgpu_vi_mailbox_ack_irq_funcs -ffffffff82b9fa38 r xgpu_vi_mailbox_rcv_irq_funcs -ffffffff82b9fa48 R xgpu_vi_virt_ops -ffffffff82ba0000 r navi10_ih_ip_funcs -ffffffff82ba00a0 R navi10_ih_ip_block -ffffffff82ba00b8 r navi10_ih_funcs -ffffffff82ba00d8 r navi10_ih_self_irq_funcs -ffffffff82ba1000 R nbio_v2_3_hdp_flush_reg -ffffffff82ba1048 R nbio_v2_3_funcs -ffffffff82ba2000 R nbio_v4_3_hdp_flush_reg -ffffffff82ba2048 R nbio_v4_3_funcs -ffffffff82ba2158 R nbio_v4_3_sriov_funcs -ffffffff82ba2268 r nbio_v4_3_ras_err_event_athub_irq_funcs -ffffffff82ba3000 R nbio_v6_1_hdp_flush_reg -ffffffff82ba3048 R nbio_v6_1_funcs -ffffffff82ba4000 R nbio_v7_0_hdp_flush_reg -ffffffff82ba4048 R nbio_v7_0_funcs -ffffffff82ba5000 R nbio_v7_2_hdp_flush_reg -ffffffff82ba5048 R nbio_v7_2_funcs -ffffffff82ba6000 R nbio_v7_4_hdp_flush_reg -ffffffff82ba6048 R nbio_v7_4_ras_hw_ops -ffffffff82ba6088 R nbio_v7_4_funcs -ffffffff82ba6198 r nbio_v7_4_ras_controller_irq_funcs -ffffffff82ba61a8 r nbio_v7_4_ras_err_event_athub_irq_funcs -ffffffff82ba7000 R nbio_v7_7_hdp_flush_reg -ffffffff82ba7048 R nbio_v7_7_funcs -ffffffff82ba8000 R nbio_v7_9_hdp_flush_reg -ffffffff82ba8048 R nbio_v7_9_funcs -ffffffff82ba8158 R nbio_v7_9_ras_hw_ops -ffffffff82ba8198 r nbio_v7_9_ras_controller_irq_funcs -ffffffff82ba81a8 r nbio_v7_9_ras_err_event_athub_irq_funcs -ffffffff82ba9000 r nv_common_ip_funcs -ffffffff82ba90a0 R nv_common_ip_block -ffffffff82ba90b8 r nv_asic_funcs -ffffffff82ba9180 r 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golden_settings_polaris10_a11 -ffffffff82bb2490 r cz_mgcg_cgcg_init -ffffffff82bb24b0 r cz_golden_settings_a11 -ffffffff82bb2540 r stoney_mgcg_cgcg_init -ffffffff82bb2550 r stoney_golden_settings_a11 -ffffffff82bb3000 R sdma_v4_0_ip_funcs -ffffffff82bb30a0 R sdma_v4_0_ras_hw_ops -ffffffff82bb30e0 R sdma_v4_0_ip_block -ffffffff82bb30f8 r sdma_v4_0_ring_funcs -ffffffff82bb3238 r sdma_v4_0_page_ring_funcs -ffffffff82bb3378 r sdma_v4_0_buffer_funcs -ffffffff82bb3398 r sdma_v4_0_vm_pte_funcs -ffffffff82bb33b8 r sdma_v4_0_trap_irq_funcs -ffffffff82bb33c8 r sdma_v4_0_illegal_inst_irq_funcs -ffffffff82bb33d8 r sdma_v4_0_ecc_irq_funcs -ffffffff82bb33e8 r sdma_v4_0_vm_hole_irq_funcs -ffffffff82bb33f8 r sdma_v4_0_doorbell_invalid_irq_funcs -ffffffff82bb3408 r sdma_v4_0_pool_timeout_irq_funcs -ffffffff82bb3418 r sdma_v4_0_srbm_write_irq_funcs -ffffffff82bb3430 r golden_settings_sdma_4 -ffffffff82bb3690 r golden_settings_sdma_vg10 -ffffffff82bb3740 r golden_settings_sdma_vg12 -ffffffff82bb37f0 r golden_settings_sdma0_4_2_init -ffffffff82bb3810 r golden_settings_sdma0_4_2 -ffffffff82bb3aa0 r golden_settings_sdma1_4_2 -ffffffff82bb3d30 r golden_settings_sdma_arct -ffffffff82bb4030 r golden_settings_sdma_aldebaran -ffffffff82bb41a0 r golden_settings_sdma_4_1 -ffffffff82bb42b0 r golden_settings_sdma_rv2 -ffffffff82bb42e0 r golden_settings_sdma_rv1 -ffffffff82bb4310 r golden_settings_sdma_4_3 -ffffffff82bb4400 r sdma_v4_0_ras_fields -ffffffff82bb5000 R sdma_v4_4_ras_hw_ops -ffffffff82bb5040 r sdma_v4_4_ras_fields -ffffffff82bb6000 R sdma_v4_4_2_ip_funcs -ffffffff82bb60a0 R sdma_v4_4_2_ip_block -ffffffff82bb60b8 r sdma_v4_4_2_ring_funcs -ffffffff82bb61f8 r sdma_v4_4_2_page_ring_funcs -ffffffff82bb6338 r sdma_v4_4_2_buffer_funcs -ffffffff82bb6358 r sdma_v4_4_2_vm_pte_funcs -ffffffff82bb6378 r sdma_v4_4_2_trap_irq_funcs -ffffffff82bb6388 r sdma_v4_4_2_illegal_inst_irq_funcs -ffffffff82bb6398 r sdma_v4_4_2_ecc_irq_funcs -ffffffff82bb63a8 r sdma_v4_4_2_vm_hole_irq_funcs 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sdma_v5_2_ring_funcs -ffffffff82bb81f8 r sdma_v5_2_buffer_funcs -ffffffff82bb8218 r sdma_v5_2_vm_pte_funcs -ffffffff82bb8238 r sdma_v5_2_trap_irq_funcs -ffffffff82bb8248 r sdma_v5_2_illegal_inst_irq_funcs -ffffffff82bb9000 R sdma_v6_0_ip_funcs -ffffffff82bb90a0 R sdma_v6_0_ip_block -ffffffff82bb90b8 r sdma_v6_0_ring_funcs -ffffffff82bb91f8 r sdma_v6_0_buffer_funcs -ffffffff82bb9218 r sdma_v6_0_vm_pte_funcs -ffffffff82bb9238 r sdma_v6_0_trap_irq_funcs -ffffffff82bb9248 r sdma_v6_0_illegal_inst_irq_funcs -ffffffff82bba000 r smu_v11_0_i2c_algo -ffffffff82bba010 r smu_v11_0_i2c_i2c_lock_ops -ffffffff82bba028 r smu_v11_0_i2c_control_quirks -ffffffff82bbb000 R smuio_v11_0_funcs -ffffffff82bbc000 R smuio_v11_0_6_funcs -ffffffff82bbd000 R smuio_v13_0_funcs -ffffffff82bbe000 R smuio_v13_0_3_funcs -ffffffff82bbf000 R smuio_v13_0_6_funcs -ffffffff82bc0000 R smuio_v9_0_funcs -ffffffff82bc1000 r soc15_common_ip_funcs -ffffffff82bc10a0 R vega10_common_ip_block -ffffffff82bc10b8 r soc15_asic_funcs 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-ffffffff82bc90a0 R uvd_v5_0_ip_block -ffffffff82bc90b8 r uvd_v5_0_ring_funcs -ffffffff82bc91f8 r uvd_v5_0_irq_funcs -ffffffff82bca000 r uvd_v6_0_ip_funcs -ffffffff82bca0a0 R uvd_v6_0_ip_block -ffffffff82bca0b8 R uvd_v6_2_ip_block -ffffffff82bca0d0 R uvd_v6_3_ip_block -ffffffff82bca0e8 r uvd_v6_0_ring_vm_funcs -ffffffff82bca228 r uvd_v6_0_ring_phys_funcs -ffffffff82bca368 r uvd_v6_0_enc_ring_vm_funcs -ffffffff82bca4a8 r uvd_v6_0_irq_funcs -ffffffff82bcb000 R uvd_v7_0_ip_funcs -ffffffff82bcb0a0 R uvd_v7_0_ip_block -ffffffff82bcb0b8 r uvd_v7_0_ring_vm_funcs -ffffffff82bcb1f8 r uvd_v7_0_enc_ring_vm_funcs -ffffffff82bcb338 r uvd_v7_0_irq_funcs -ffffffff82bcc000 r vce_v3_0_ip_funcs -ffffffff82bcc0a0 R vce_v3_0_ip_block -ffffffff82bcc0b8 R vce_v3_1_ip_block -ffffffff82bcc0d0 R vce_v3_4_ip_block -ffffffff82bcc0e8 r vce_v3_0_ring_vm_funcs -ffffffff82bcc228 r vce_v3_0_ring_phys_funcs -ffffffff82bcc368 r vce_v3_0_irq_funcs -ffffffff82bcd000 R vce_v4_0_ip_funcs -ffffffff82bcd0a0 R vce_v4_0_ip_block -ffffffff82bcd0b8 r vce_v4_0_ring_vm_funcs -ffffffff82bcd1f8 r vce_v4_0_irq_funcs -ffffffff82bce000 r vcn_v1_0_ip_funcs -ffffffff82bce0a0 R vcn_v1_0_ip_block -ffffffff82bce0b8 r vcn_v1_0_dec_ring_vm_funcs -ffffffff82bce1f8 r vcn_v1_0_enc_ring_vm_funcs -ffffffff82bce338 r vcn_v1_0_irq_funcs -ffffffff82bcf000 r vcn_v2_0_ip_funcs -ffffffff82bcf0a0 R vcn_v2_0_ip_block -ffffffff82bcf0b8 r vcn_v2_0_dec_ring_vm_funcs -ffffffff82bcf1f8 r vcn_v2_0_enc_ring_vm_funcs -ffffffff82bcf338 r vcn_v2_0_irq_funcs -ffffffff82bd0000 r vcn_v2_5_ip_funcs -ffffffff82bd00a0 R vcn_v2_5_ip_block -ffffffff82bd00b8 r vcn_v2_6_ip_funcs -ffffffff82bd0158 R vcn_v2_6_ip_block -ffffffff82bd0170 R vcn_v2_6_ras_hw_ops -ffffffff82bd01b0 r vcn_v2_5_dec_ring_vm_funcs -ffffffff82bd02f0 r vcn_v2_5_enc_ring_vm_funcs -ffffffff82bd0430 r vcn_v2_5_irq_funcs -ffffffff82bd0440 r vcn_v2_6_ras_irq_funcs -ffffffff82bd1000 r vcn_v3_0_ip_funcs -ffffffff82bd10a0 R vcn_v3_0_ip_block -ffffffff82bd10b8 r vcn_v3_0_dec_ring_vm_funcs -ffffffff82bd11f8 r vcn_v3_0_enc_ring_vm_funcs -ffffffff82bd1338 r vcn_v3_0_irq_funcs -ffffffff82bd2000 r vcn_v4_0_ip_funcs -ffffffff82bd20a0 R vcn_v4_0_ip_block -ffffffff82bd20b8 R vcn_v4_0_ras_hw_ops -ffffffff82bd20f8 r vcn_v4_0_irq_funcs -ffffffff82bd2108 r vcn_v4_0_ras_irq_funcs -ffffffff82bd3000 r vcn_v4_0_3_ip_funcs -ffffffff82bd30a0 R vcn_v4_0_3_ip_block -ffffffff82bd30b8 r vcn_v4_0_3_unified_ring_vm_funcs -ffffffff82bd31f8 r vcn_v4_0_3_irq_funcs -ffffffff82bd3208 r vcn_v4_0_3_ras_hw_ops -ffffffff82bd3250 r vcn_v4_0_3_ue_reg_list -ffffffff82bd4000 R vega10_ih_ip_funcs -ffffffff82bd40a0 R vega10_ih_ip_block -ffffffff82bd40b8 r vega10_ih_funcs -ffffffff82bd40d8 r vega10_ih_self_irq_funcs -ffffffff82bd5000 r GC_BASE -ffffffff82bd5064 r HDP_BASE -ffffffff82bd50c8 r MMHUB_BASE -ffffffff82bd512c r ATHUB_BASE -ffffffff82bd5190 r NBIO_BASE -ffffffff82bd51f4 r MP0_BASE -ffffffff82bd5258 r MP1_BASE -ffffffff82bd52bc r VCE_BASE -ffffffff82bd5320 r VCN_BASE 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-ffffffff82bd9120 r dm_display_funcs -ffffffff82bd9180 r hpd_disconnect_quirk_table -ffffffff82bd9ef0 r amdgpu_dm_mode_funcs -ffffffff82bd9f38 r amdgpu_dm_audio_component_bind_ops -ffffffff82bd9f48 r amdgpu_dm_audio_component_ops -ffffffff82bd9f80 r amdgpu_dm_encoder_funcs -ffffffff82bd9fa0 r amdgpu_dm_connector_funcs -ffffffff82bda018 r amdgpu_dm_connector_helper_funcs -ffffffff82bda078 r amdgpu_dm_i2c_algo -ffffffff82bda088 r amdgpu_dm_backlight_ops -ffffffff82bda260 r add_fs_modes.common_rates -ffffffff82bdb000 r amdgpu_dm_crtc_funcs -ffffffff82bdb0c0 r amdgpu_dm_crtc_helper_funcs -ffffffff82bdc000 r dm_dtn_log_begin.msg -ffffffff82bdc00d r dm_dtn_log_end.msg -ffffffff82bdc018 r SYNAPTICS_DEVICE_ID -ffffffff82bdd000 r dm_crtc_irq_funcs -ffffffff82bdd010 r dm_vline0_irq_funcs -ffffffff82bdd020 r dm_dmub_outbox_irq_funcs -ffffffff82bdd030 r dm_vupdate_irq_funcs -ffffffff82bdd040 r dm_dmub_trace_irq_funcs -ffffffff82bdd050 r dm_pageflip_irq_funcs -ffffffff82bdd060 r dm_hpd_irq_funcs -ffffffff82bde000 r amdgpu_dm_encoder_funcs -ffffffff82bde020 r dm_mst_cbs -ffffffff82bde030 r dm_dp_mst_connector_funcs -ffffffff82bde0a8 r dm_dp_mst_connector_helper_funcs -ffffffff82bdf000 r dm_plane_funcs -ffffffff82bdf068 r dm_plane_helper_funcs +ffffffff82b75000 R gmc_v10_0_ip_funcs +ffffffff82b750a0 R gmc_v10_0_ip_block +ffffffff82b750b8 r gmc_v10_0_gmc_funcs +ffffffff82b75110 r gmc_v10_0_irq_funcs +ffffffff82b75120 r gmc_v10_0_ecc_funcs +ffffffff82b76000 R gmc_v11_0_ip_funcs +ffffffff82b760a0 R gmc_v11_0_ip_block +ffffffff82b760b8 r gmc_v11_0_gmc_funcs +ffffffff82b76110 r gmc_v11_0_irq_funcs +ffffffff82b76120 r gmc_v11_0_ecc_funcs +ffffffff82b77000 r gmc_v7_0_ip_funcs +ffffffff82b770a0 R gmc_v7_0_ip_block +ffffffff82b770b8 R gmc_v7_4_ip_block +ffffffff82b770d0 r gmc_v7_0_gmc_funcs +ffffffff82b77128 r gmc_v7_0_irq_funcs +ffffffff82b77138 r iceland_mgcg_cgcg_init +ffffffff82b77150 r golden_settings_iceland_a11 +ffffffff82b77180 r mc_cg_registers +ffffffff82b771b0 r mc_cg_en +ffffffff82b771e0 r mc_cg_ls_en +ffffffff82b78000 r gmc_v8_0_ip_funcs +ffffffff82b780a0 R gmc_v8_0_ip_block +ffffffff82b780b8 R gmc_v8_1_ip_block +ffffffff82b780d0 R gmc_v8_5_ip_block +ffffffff82b780e8 r gmc_v8_0_gmc_funcs +ffffffff82b78140 r gmc_v8_0_irq_funcs +ffffffff82b78150 r fiji_mgcg_cgcg_init +ffffffff82b78160 r golden_settings_fiji_a10 +ffffffff82b78190 r tonga_mgcg_cgcg_init +ffffffff82b781a0 r golden_settings_tonga_a11 +ffffffff82b78200 r golden_settings_polaris11_a11 +ffffffff82b78230 r golden_settings_polaris10_a11 +ffffffff82b7826c r cz_mgcg_cgcg_init +ffffffff82b78280 r stoney_mgcg_cgcg_init +ffffffff82b782a0 r golden_settings_stoney_common +ffffffff82b79000 R gmc_v9_0_ip_funcs +ffffffff82b790a0 R gmc_v9_0_ip_block +ffffffff82b790b8 r gmc_v9_0_gmc_funcs +ffffffff82b79110 r gmc_v9_0_irq_funcs +ffffffff82b79120 r gmc_v9_0_ecc_funcs +ffffffff82b79130 r gfxhub_client_ids +ffffffff82b791a0 r mmhub_client_ids_vega10 +ffffffff82b79490 r mmhub_client_ids_vega12 +ffffffff82b79790 r mmhub_client_ids_vega20 +ffffffff82b79a80 r mmhub_client_ids_arcturus +ffffffff82b7b290 r mmhub_client_ids_raven +ffffffff82b7b450 r mmhub_client_ids_renoir +ffffffff82b7b640 r mmhub_client_ids_aldebaran +ffffffff82b7ce50 r ecc_umc_mcumc_ctrl_addrs +ffffffff82b7ced0 r ecc_umc_mcumc_ctrl_mask_addrs +ffffffff82b7cf50 r golden_settings_mmhub_1_0_0 +ffffffff82b7cf80 r golden_settings_athub_1_0_0 +ffffffff82b7d000 R hdp_v4_0_funcs +ffffffff82b7e000 R hdp_v5_0_funcs +ffffffff82b7f000 R hdp_v5_2_funcs +ffffffff82b80000 R hdp_v6_0_funcs +ffffffff82b81000 r iceland_ih_ip_funcs +ffffffff82b810a0 R iceland_ih_ip_block +ffffffff82b810b8 r iceland_ih_funcs +ffffffff82b82000 r ih_v6_0_ip_funcs +ffffffff82b820a0 R ih_v6_0_ip_block +ffffffff82b820b8 r ih_v6_0_funcs +ffffffff82b820d8 r ih_v6_0_self_irq_funcs +ffffffff82b83000 r ih_v6_1_ip_funcs +ffffffff82b830a0 R ih_v6_1_ip_block +ffffffff82b830b8 r ih_v6_1_funcs +ffffffff82b830d8 r ih_v6_1_self_irq_funcs +ffffffff82b84000 R gfx_v11_0_imu_funcs +ffffffff82b84030 r imu_rlc_ram_golden_11 +ffffffff82b84680 r imu_rlc_ram_golden_11_0_2 +ffffffff82b85000 r imu_rlc_ram_golden_11_0_3 +ffffffff82b86000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82b86140 r jpeg_v1_0_irq_funcs +ffffffff82b87000 r jpeg_v2_0_ip_funcs +ffffffff82b870a0 R jpeg_v2_0_ip_block +ffffffff82b870b8 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82b871f8 r jpeg_v2_0_irq_funcs +ffffffff82b88000 r jpeg_v2_5_ip_funcs +ffffffff82b880a0 R jpeg_v2_5_ip_block +ffffffff82b880b8 r jpeg_v2_6_ip_funcs +ffffffff82b88158 R jpeg_v2_6_ip_block +ffffffff82b88170 R jpeg_v2_6_ras_hw_ops +ffffffff82b881b0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82b882f0 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82b88430 r jpeg_v2_5_irq_funcs +ffffffff82b88440 r jpeg_v2_6_ras_irq_funcs +ffffffff82b89000 r jpeg_v3_0_ip_funcs +ffffffff82b890a0 R jpeg_v3_0_ip_block +ffffffff82b890b8 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82b891f8 r jpeg_v3_0_irq_funcs +ffffffff82b8a000 r jpeg_v4_0_ip_funcs +ffffffff82b8a0a0 R jpeg_v4_0_ip_block +ffffffff82b8a0b8 R jpeg_v4_0_ras_hw_ops +ffffffff82b8a0f8 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82b8a238 r jpeg_v4_0_irq_funcs +ffffffff82b8a248 r jpeg_v4_0_ras_irq_funcs +ffffffff82b8b000 r jpeg_v4_0_3_ip_funcs +ffffffff82b8b0a0 R jpeg_v4_0_3_ip_block +ffffffff82b8b0b8 r jpeg_v4_0_3_dec_ring_vm_funcs +ffffffff82b8b1f8 r jpeg_v4_0_3_irq_funcs +ffffffff82b8b208 r jpeg_v4_0_3_ras_hw_ops +ffffffff82b8b250 r jpeg_v4_0_3_ue_reg_list +ffffffff82b8c000 R lsdma_v6_0_funcs +ffffffff82b8d000 r mca_v3_0_mp0_hw_ops +ffffffff82b8d040 r mca_v3_0_mp1_hw_ops +ffffffff82b8d080 r mca_v3_0_mpio_hw_ops +ffffffff82b8e000 r mes_v10_1_ip_funcs +ffffffff82b8e0a0 R mes_v10_1_ip_block +ffffffff82b8e0b8 r mes_v10_1_funcs +ffffffff82b8e0e8 r mes_v10_1_ring_funcs +ffffffff82b8f000 r mes_v11_0_ip_funcs +ffffffff82b8f0a0 R mes_v11_0_ip_block +ffffffff82b8f0b8 r mes_v11_0_funcs +ffffffff82b8f0e8 r mes_v11_0_ring_funcs +ffffffff82b90000 R mmhub_v1_0_funcs +ffffffff82b90050 r mmhub_v1_0_edc_cnt_regs +ffffffff82b900c0 r mmhub_v1_0_ras_fields +ffffffff82b91000 R mmhub_v1_7_funcs +ffffffff82b91050 r mmhub_v1_7_edc_cnt_regs +ffffffff82b91250 r mmhub_v1_7_ras_fields +ffffffff82b929c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82b93000 R mmhub_v1_8_funcs +ffffffff82b93050 r mmhub_v1_8_ras_hw_ops +ffffffff82b93090 r mmhub_v1_8_ce_reg_list +ffffffff82b93180 r mmhub_v1_8_ras_memory_list +ffffffff82b932b0 r mmhub_v1_8_ue_reg_list +ffffffff82b94000 R mmhub_v2_0_funcs +ffffffff82b94050 r mmhub_v2_0_vmhub_funcs +ffffffff82b94060 r mmhub_client_ids_navi1x +ffffffff82b94190 r mmhub_client_ids_sienna_cichlid +ffffffff82b94450 r mmhub_client_ids_beige_goby +ffffffff82b95000 R mmhub_v2_3_funcs +ffffffff82b95050 r mmhub_v2_3_vmhub_funcs +ffffffff82b95060 r mmhub_client_ids_vangogh +ffffffff82b96000 R mmhub_v3_0_funcs +ffffffff82b96050 r mmhub_v3_0_vmhub_funcs +ffffffff82b96060 r mmhub_client_ids_v3_0_0 +ffffffff82b97000 R mmhub_v3_0_1_funcs +ffffffff82b97050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82b97060 r mmhub_client_ids_v3_0_1 +ffffffff82b98000 R mmhub_v3_0_2_funcs +ffffffff82b98050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82b98060 r mmhub_client_ids_v3_0_2 +ffffffff82b99000 R mmhub_v9_4_ras_hw_ops +ffffffff82b99040 R mmhub_v9_4_funcs +ffffffff82b99090 r mmhub_v9_4_edc_cnt_regs +ffffffff82b99330 r mmhub_v9_4_ras_fields +ffffffff82b9b3b0 r mmhub_v9_4_err_status_regs +ffffffff82b9c000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82b9c010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82b9c020 R xgpu_ai_virt_ops +ffffffff82b9d000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82b9d010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82b9d020 R xgpu_nv_virt_ops +ffffffff82b9e000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82b9e240 r xgpu_fiji_golden_settings_a10 +ffffffff82b9e370 r xgpu_fiji_golden_common_all +ffffffff82b9e3f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82b9e810 r xgpu_tonga_golden_settings_a11 +ffffffff82b9e9d0 r xgpu_tonga_golden_common_all +ffffffff82b9ea28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82b9ea38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82b9ea48 R xgpu_vi_virt_ops +ffffffff82b9f000 r navi10_ih_ip_funcs +ffffffff82b9f0a0 R navi10_ih_ip_block +ffffffff82b9f0b8 r navi10_ih_funcs +ffffffff82b9f0d8 r navi10_ih_self_irq_funcs +ffffffff82ba0000 R nbio_v2_3_hdp_flush_reg +ffffffff82ba0048 R nbio_v2_3_funcs +ffffffff82ba1000 R nbio_v4_3_hdp_flush_reg +ffffffff82ba1048 R nbio_v4_3_funcs +ffffffff82ba1158 R nbio_v4_3_sriov_funcs +ffffffff82ba1268 r nbio_v4_3_ras_err_event_athub_irq_funcs +ffffffff82ba2000 R nbio_v6_1_hdp_flush_reg +ffffffff82ba2048 R nbio_v6_1_funcs +ffffffff82ba3000 R nbio_v7_0_hdp_flush_reg +ffffffff82ba3048 R nbio_v7_0_funcs +ffffffff82ba4000 R nbio_v7_2_hdp_flush_reg +ffffffff82ba4048 R nbio_v7_2_funcs +ffffffff82ba5000 R nbio_v7_4_hdp_flush_reg +ffffffff82ba5048 R nbio_v7_4_ras_hw_ops +ffffffff82ba5088 R nbio_v7_4_funcs +ffffffff82ba5198 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82ba51a8 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82ba6000 R nbio_v7_7_hdp_flush_reg +ffffffff82ba6048 R nbio_v7_7_funcs +ffffffff82ba7000 R nbio_v7_9_hdp_flush_reg +ffffffff82ba7048 R nbio_v7_9_funcs +ffffffff82ba7158 R nbio_v7_9_ras_hw_ops +ffffffff82ba7198 r nbio_v7_9_ras_controller_irq_funcs +ffffffff82ba71a8 r nbio_v7_9_ras_err_event_athub_irq_funcs +ffffffff82ba8000 r nv_common_ip_funcs +ffffffff82ba80a0 R nv_common_ip_block +ffffffff82ba80b8 r nv_asic_funcs +ffffffff82ba8180 r nv_allowed_read_registers +ffffffff82ba8300 r sc_video_codecs_encode +ffffffff82ba8310 r sc_video_codecs_decode_vcn1 +ffffffff82ba8320 r sc_video_codecs_decode_vcn0 +ffffffff82ba8330 r yc_video_codecs_decode +ffffffff82ba8340 r bg_video_codecs_encode +ffffffff82ba8350 r bg_video_codecs_decode +ffffffff82ba8360 r nv_video_codecs_encode +ffffffff82ba8370 r nv_video_codecs_decode +ffffffff82ba8380 r sc_video_codecs_encode_array +ffffffff82ba83b0 r sc_video_codecs_decode_array_vcn1 +ffffffff82ba8440 r sc_video_codecs_decode_array_vcn0 +ffffffff82ba84e0 r yc_video_codecs_decode_array +ffffffff82ba8550 r bg_video_codecs_decode_array +ffffffff82ba8590 r nv_video_codecs_encode_array +ffffffff82ba85c0 r nv_video_codecs_decode_array +ffffffff82ba9000 r psp_v10_0_funcs +ffffffff82baa000 r psp_v11_0_funcs +ffffffff82bab000 r psp_v11_0_8_funcs +ffffffff82bac000 r psp_v12_0_funcs +ffffffff82bad000 r psp_v13_0_funcs +ffffffff82bae000 r psp_v13_0_4_funcs +ffffffff82baf000 r psp_v3_1_funcs +ffffffff82bb0000 r sdma_v2_4_ip_funcs +ffffffff82bb00a0 R sdma_v2_4_ip_block +ffffffff82bb00b8 r sdma_v2_4_ring_funcs +ffffffff82bb01f8 r sdma_v2_4_buffer_funcs +ffffffff82bb0218 r sdma_v2_4_vm_pte_funcs +ffffffff82bb0238 r sdma_v2_4_trap_irq_funcs +ffffffff82bb0248 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82bb0260 r iceland_mgcg_cgcg_init +ffffffff82bb0280 r golden_settings_iceland_a11 +ffffffff82bb1000 r sdma_v3_0_ip_funcs +ffffffff82bb10a0 R sdma_v3_0_ip_block +ffffffff82bb10b8 R sdma_v3_1_ip_block +ffffffff82bb10d0 r sdma_v3_0_ring_funcs +ffffffff82bb1210 r sdma_v3_0_buffer_funcs +ffffffff82bb1230 r sdma_v3_0_vm_pte_funcs +ffffffff82bb1250 r sdma_v3_0_trap_irq_funcs +ffffffff82bb1260 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82bb1270 r fiji_mgcg_cgcg_init +ffffffff82bb1290 r golden_settings_fiji_a10 +ffffffff82bb12f0 r tonga_mgcg_cgcg_init +ffffffff82bb1310 r golden_settings_tonga_a11 +ffffffff82bb1390 r golden_settings_polaris11_a11 +ffffffff82bb1410 r golden_settings_polaris10_a11 +ffffffff82bb1490 r cz_mgcg_cgcg_init +ffffffff82bb14b0 r cz_golden_settings_a11 +ffffffff82bb1540 r stoney_mgcg_cgcg_init +ffffffff82bb1550 r stoney_golden_settings_a11 +ffffffff82bb2000 R sdma_v4_0_ip_funcs +ffffffff82bb20a0 R sdma_v4_0_ras_hw_ops +ffffffff82bb20e0 R sdma_v4_0_ip_block +ffffffff82bb20f8 r sdma_v4_0_ring_funcs +ffffffff82bb2238 r sdma_v4_0_page_ring_funcs +ffffffff82bb2378 r sdma_v4_0_buffer_funcs +ffffffff82bb2398 r sdma_v4_0_vm_pte_funcs +ffffffff82bb23b8 r sdma_v4_0_trap_irq_funcs +ffffffff82bb23c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82bb23d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82bb23e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82bb23f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82bb2408 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82bb2418 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82bb2430 r golden_settings_sdma_4 +ffffffff82bb2690 r golden_settings_sdma_vg10 +ffffffff82bb2740 r golden_settings_sdma_vg12 +ffffffff82bb27f0 r golden_settings_sdma0_4_2_init +ffffffff82bb2810 r golden_settings_sdma0_4_2 +ffffffff82bb2aa0 r golden_settings_sdma1_4_2 +ffffffff82bb2d30 r golden_settings_sdma_arct +ffffffff82bb3030 r golden_settings_sdma_aldebaran +ffffffff82bb31a0 r golden_settings_sdma_4_1 +ffffffff82bb32b0 r golden_settings_sdma_rv2 +ffffffff82bb32e0 r golden_settings_sdma_rv1 +ffffffff82bb3310 r golden_settings_sdma_4_3 +ffffffff82bb3400 r sdma_v4_0_ras_fields +ffffffff82bb4000 R sdma_v4_4_ras_hw_ops +ffffffff82bb4040 r sdma_v4_4_ras_fields +ffffffff82bb5000 R sdma_v4_4_2_ip_funcs +ffffffff82bb50a0 R sdma_v4_4_2_ip_block +ffffffff82bb50b8 r sdma_v4_4_2_ring_funcs +ffffffff82bb51f8 r sdma_v4_4_2_page_ring_funcs +ffffffff82bb5338 r sdma_v4_4_2_buffer_funcs +ffffffff82bb5358 r sdma_v4_4_2_vm_pte_funcs +ffffffff82bb5378 r sdma_v4_4_2_trap_irq_funcs +ffffffff82bb5388 r sdma_v4_4_2_illegal_inst_irq_funcs +ffffffff82bb5398 r sdma_v4_4_2_ecc_irq_funcs +ffffffff82bb53a8 r sdma_v4_4_2_vm_hole_irq_funcs +ffffffff82bb53b8 r sdma_v4_4_2_doorbell_invalid_irq_funcs +ffffffff82bb53c8 r sdma_v4_4_2_pool_timeout_irq_funcs +ffffffff82bb53d8 r sdma_v4_4_2_srbm_write_irq_funcs +ffffffff82bb53e8 r sdma_v4_4_2_ras_hw_ops +ffffffff82bb5430 r sdma_v4_2_2_ue_reg_list +ffffffff82bb5460 r sdma_v4_4_2_ras_memory_list +ffffffff82bb6000 R sdma_v5_0_ip_funcs +ffffffff82bb60a0 R sdma_v5_0_ip_block +ffffffff82bb60b8 r sdma_v5_0_ring_funcs +ffffffff82bb61f8 r sdma_v5_0_buffer_funcs +ffffffff82bb6218 r sdma_v5_0_vm_pte_funcs +ffffffff82bb6238 r sdma_v5_0_trap_irq_funcs +ffffffff82bb6248 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82bb6260 r golden_settings_sdma_5 +ffffffff82bb64a0 r golden_settings_sdma_nv10 +ffffffff82bb64d0 r golden_settings_sdma_nv14 +ffffffff82bb6500 r golden_settings_sdma_5_sriov +ffffffff82bb66e0 r golden_settings_sdma_nv12 +ffffffff82bb6770 r golden_settings_sdma_cyan_skillfish +ffffffff82bb7000 R sdma_v5_2_ip_funcs +ffffffff82bb70a0 R sdma_v5_2_ip_block +ffffffff82bb70b8 r sdma_v5_2_ring_funcs +ffffffff82bb71f8 r sdma_v5_2_buffer_funcs +ffffffff82bb7218 r sdma_v5_2_vm_pte_funcs +ffffffff82bb7238 r sdma_v5_2_trap_irq_funcs +ffffffff82bb7248 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82bb8000 R sdma_v6_0_ip_funcs +ffffffff82bb80a0 R sdma_v6_0_ip_block +ffffffff82bb80b8 r sdma_v6_0_ring_funcs +ffffffff82bb81f8 r sdma_v6_0_buffer_funcs +ffffffff82bb8218 r sdma_v6_0_vm_pte_funcs +ffffffff82bb8238 r sdma_v6_0_trap_irq_funcs +ffffffff82bb8248 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82bb9000 r smu_v11_0_i2c_algo +ffffffff82bb9010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82bb9028 r smu_v11_0_i2c_control_quirks +ffffffff82bba000 R smuio_v11_0_funcs +ffffffff82bbb000 R smuio_v11_0_6_funcs +ffffffff82bbc000 R smuio_v13_0_funcs +ffffffff82bbd000 R smuio_v13_0_3_funcs +ffffffff82bbe000 R smuio_v13_0_6_funcs +ffffffff82bbf000 R smuio_v9_0_funcs +ffffffff82bc0000 r soc15_common_ip_funcs +ffffffff82bc00a0 R vega10_common_ip_block +ffffffff82bc00b8 r soc15_asic_funcs +ffffffff82bc0178 r vega20_asic_funcs +ffffffff82bc0238 r aqua_vanjaram_asic_funcs +ffffffff82bc0300 r soc15_allowed_read_registers +ffffffff82bc0490 r vega_video_codecs_encode +ffffffff82bc04a0 r vega_video_codecs_decode +ffffffff82bc04b0 r rv_video_codecs_decode +ffffffff82bc04c0 r rn_video_codecs_decode +ffffffff82bc04d0 r vcn_4_0_3_video_codecs_encode +ffffffff82bc04e0 r vcn_4_0_3_video_codecs_decode +ffffffff82bc04f0 r vega_video_codecs_encode_array +ffffffff82bc0520 r vega_video_codecs_decode_array +ffffffff82bc05a0 r rv_video_codecs_decode_array +ffffffff82bc0630 r rn_video_codecs_decode_array +ffffffff82bc06c0 r vcn_4_0_3_video_codecs_decode_array +ffffffff82bc1000 r soc21_common_ip_funcs +ffffffff82bc10a0 R soc21_common_ip_block +ffffffff82bc10b8 r soc21_asic_funcs +ffffffff82bc1180 r soc21_allowed_read_registers +ffffffff82bc1300 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82bc1310 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82bc1320 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82bc1330 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82bc1340 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82bc1370 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82bc13c0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82bc1400 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82bc2000 r tonga_ih_ip_funcs +ffffffff82bc20a0 R tonga_ih_ip_block +ffffffff82bc20b8 r tonga_ih_funcs +ffffffff82bc3000 R umc_v6_0_funcs +ffffffff82bc4000 R umc_v6_1_channel_idx_tbl +ffffffff82bc4080 R umc_v6_1_ras_hw_ops +ffffffff82bc5000 R umc_v6_7_channel_idx_tbl_second +ffffffff82bc5080 R umc_v6_7_channel_idx_tbl_first +ffffffff82bc5100 R umc_v6_7_ras_hw_ops +ffffffff82bc6000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82bc6040 R umc_v8_10_channel_idx_tbl_ext0 +ffffffff82bc6080 R umc_v8_10_channel_idx_tbl +ffffffff82bc60e0 R umc_v8_10_ras_hw_ops +ffffffff82bc7000 R umc_v8_7_channel_idx_tbl +ffffffff82bc7040 R umc_v8_7_ras_hw_ops +ffffffff82bc8000 r uvd_v5_0_ip_funcs +ffffffff82bc80a0 R uvd_v5_0_ip_block +ffffffff82bc80b8 r uvd_v5_0_ring_funcs +ffffffff82bc81f8 r uvd_v5_0_irq_funcs +ffffffff82bc9000 r uvd_v6_0_ip_funcs +ffffffff82bc90a0 R uvd_v6_0_ip_block +ffffffff82bc90b8 R uvd_v6_2_ip_block +ffffffff82bc90d0 R uvd_v6_3_ip_block +ffffffff82bc90e8 r uvd_v6_0_ring_vm_funcs +ffffffff82bc9228 r uvd_v6_0_ring_phys_funcs +ffffffff82bc9368 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82bc94a8 r uvd_v6_0_irq_funcs +ffffffff82bca000 R uvd_v7_0_ip_funcs +ffffffff82bca0a0 R uvd_v7_0_ip_block +ffffffff82bca0b8 r uvd_v7_0_ring_vm_funcs +ffffffff82bca1f8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82bca338 r uvd_v7_0_irq_funcs +ffffffff82bcb000 r vce_v3_0_ip_funcs +ffffffff82bcb0a0 R vce_v3_0_ip_block +ffffffff82bcb0b8 R vce_v3_1_ip_block +ffffffff82bcb0d0 R vce_v3_4_ip_block +ffffffff82bcb0e8 r vce_v3_0_ring_vm_funcs +ffffffff82bcb228 r vce_v3_0_ring_phys_funcs +ffffffff82bcb368 r vce_v3_0_irq_funcs +ffffffff82bcc000 R vce_v4_0_ip_funcs +ffffffff82bcc0a0 R vce_v4_0_ip_block +ffffffff82bcc0b8 r vce_v4_0_ring_vm_funcs +ffffffff82bcc1f8 r vce_v4_0_irq_funcs +ffffffff82bcd000 r vcn_v1_0_ip_funcs +ffffffff82bcd0a0 R vcn_v1_0_ip_block +ffffffff82bcd0b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82bcd1f8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82bcd338 r vcn_v1_0_irq_funcs +ffffffff82bce000 r vcn_v2_0_ip_funcs +ffffffff82bce0a0 R vcn_v2_0_ip_block +ffffffff82bce0b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82bce1f8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82bce338 r vcn_v2_0_irq_funcs +ffffffff82bcf000 r vcn_v2_5_ip_funcs +ffffffff82bcf0a0 R vcn_v2_5_ip_block +ffffffff82bcf0b8 r vcn_v2_6_ip_funcs +ffffffff82bcf158 R vcn_v2_6_ip_block +ffffffff82bcf170 R vcn_v2_6_ras_hw_ops +ffffffff82bcf1b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82bcf2f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82bcf430 r vcn_v2_5_irq_funcs +ffffffff82bcf440 r vcn_v2_6_ras_irq_funcs +ffffffff82bd0000 r vcn_v3_0_ip_funcs +ffffffff82bd00a0 R vcn_v3_0_ip_block +ffffffff82bd00b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82bd01f8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82bd0338 r vcn_v3_0_irq_funcs +ffffffff82bd1000 r vcn_v4_0_ip_funcs +ffffffff82bd10a0 R vcn_v4_0_ip_block +ffffffff82bd10b8 R vcn_v4_0_ras_hw_ops +ffffffff82bd10f8 r vcn_v4_0_irq_funcs +ffffffff82bd1108 r vcn_v4_0_ras_irq_funcs +ffffffff82bd2000 r vcn_v4_0_3_ip_funcs +ffffffff82bd20a0 R vcn_v4_0_3_ip_block +ffffffff82bd20b8 r vcn_v4_0_3_unified_ring_vm_funcs +ffffffff82bd21f8 r vcn_v4_0_3_irq_funcs +ffffffff82bd2208 r vcn_v4_0_3_ras_hw_ops +ffffffff82bd2250 r vcn_v4_0_3_ue_reg_list +ffffffff82bd3000 R vega10_ih_ip_funcs +ffffffff82bd30a0 R vega10_ih_ip_block +ffffffff82bd30b8 r vega10_ih_funcs +ffffffff82bd30d8 r vega10_ih_self_irq_funcs +ffffffff82bd4000 r GC_BASE +ffffffff82bd4064 r HDP_BASE +ffffffff82bd40c8 r MMHUB_BASE +ffffffff82bd412c r ATHUB_BASE +ffffffff82bd4190 r NBIO_BASE +ffffffff82bd41f4 r MP0_BASE +ffffffff82bd4258 r MP1_BASE +ffffffff82bd42bc r VCE_BASE +ffffffff82bd4320 r VCN_BASE +ffffffff82bd4384 r DF_BASE +ffffffff82bd43e8 r DCE_BASE +ffffffff82bd444c r OSSSYS_BASE +ffffffff82bd44b0 r SDMA0_BASE +ffffffff82bd4514 r SDMA1_BASE +ffffffff82bd4578 r SMUIO_BASE +ffffffff82bd45dc r PWR_BASE +ffffffff82bd4640 r NBIF_BASE +ffffffff82bd46a4 r THM_BASE +ffffffff82bd4708 r CLK_BASE +ffffffff82bd5000 R vega20_ih_ip_funcs +ffffffff82bd50a0 R vega20_ih_ip_block +ffffffff82bd50b8 r vega20_ih_funcs +ffffffff82bd50d8 r vega20_ih_self_irq_funcs +ffffffff82bd6000 r GC_BASE +ffffffff82bd6090 r HDP_BASE +ffffffff82bd6120 r MMHUB_BASE +ffffffff82bd61b0 r ATHUB_BASE +ffffffff82bd6240 r NBIO_BASE +ffffffff82bd62d0 r MP0_BASE +ffffffff82bd6360 r MP1_BASE +ffffffff82bd63f0 r UVD_BASE +ffffffff82bd6480 r VCE_BASE +ffffffff82bd6510 r DF_BASE +ffffffff82bd65a0 r DCE_BASE +ffffffff82bd6630 r OSSSYS_BASE +ffffffff82bd66c0 r SDMA0_BASE +ffffffff82bd6750 r SDMA1_BASE +ffffffff82bd67e0 r SMUIO_BASE +ffffffff82bd6870 r THM_BASE +ffffffff82bd6900 r CLK_BASE +ffffffff82bd6990 r UMC_BASE +ffffffff82bd6a20 r RSMU_BASE +ffffffff82bd7000 r vi_common_ip_block +ffffffff82bd7018 r vi_common_ip_funcs +ffffffff82bd70b8 r vi_asic_funcs +ffffffff82bd7180 r vi_allowed_read_registers +ffffffff82bd73e0 r topaz_video_codecs_encode +ffffffff82bd73f0 r topaz_video_codecs_decode +ffffffff82bd7400 r tonga_video_codecs_encode +ffffffff82bd7410 r tonga_video_codecs_decode +ffffffff82bd7420 r polaris_video_codecs_encode +ffffffff82bd7430 r cz_video_codecs_decode +ffffffff82bd7440 r tonga_video_codecs_encode_array +ffffffff82bd7460 r tonga_video_codecs_decode_array +ffffffff82bd74b0 r polaris_video_codecs_encode_array +ffffffff82bd74e0 r cz_video_codecs_decode_array +ffffffff82bd7560 r iceland_mgcg_cgcg_init +ffffffff82bd75a0 r fiji_mgcg_cgcg_init +ffffffff82bd7600 r tonga_mgcg_cgcg_init +ffffffff82bd7660 r cz_mgcg_cgcg_init +ffffffff82bd76a0 r stoney_mgcg_cgcg_init +ffffffff82bd8000 r amdgpu_dm_funcs +ffffffff82bd80a0 R dm_ip_block +ffffffff82bd80b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82bd8120 r dm_display_funcs +ffffffff82bd8180 r hpd_disconnect_quirk_table +ffffffff82bd8ef0 r amdgpu_dm_mode_funcs +ffffffff82bd8f38 r amdgpu_dm_audio_component_bind_ops +ffffffff82bd8f48 r amdgpu_dm_audio_component_ops +ffffffff82bd8f80 r amdgpu_dm_encoder_funcs +ffffffff82bd8fa0 r amdgpu_dm_connector_funcs +ffffffff82bd9018 r amdgpu_dm_connector_helper_funcs +ffffffff82bd9078 r amdgpu_dm_i2c_algo +ffffffff82bd9088 r amdgpu_dm_backlight_ops +ffffffff82bd9260 r add_fs_modes.common_rates +ffffffff82bda000 r amdgpu_dm_crtc_funcs +ffffffff82bda0c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82bdb000 r dm_dtn_log_begin.msg +ffffffff82bdb00d r dm_dtn_log_end.msg +ffffffff82bdb018 r SYNAPTICS_DEVICE_ID +ffffffff82bdc000 r dm_crtc_irq_funcs +ffffffff82bdc010 r dm_vline0_irq_funcs +ffffffff82bdc020 r dm_dmub_outbox_irq_funcs +ffffffff82bdc030 r dm_vupdate_irq_funcs +ffffffff82bdc040 r dm_dmub_trace_irq_funcs +ffffffff82bdc050 r dm_pageflip_irq_funcs +ffffffff82bdc060 r dm_hpd_irq_funcs +ffffffff82bdd000 r amdgpu_dm_encoder_funcs +ffffffff82bdd020 r dm_mst_cbs +ffffffff82bdd030 r dm_dp_mst_connector_funcs +ffffffff82bdd0a8 r dm_dp_mst_connector_helper_funcs +ffffffff82bde000 r dm_plane_funcs +ffffffff82bde068 r dm_plane_helper_funcs +ffffffff82be0000 r vbios_funcs ffffffff82be1000 r vbios_funcs -ffffffff82be2000 r vbios_funcs +ffffffff82be6000 r command_table_helper_funcs ffffffff82be7000 r command_table_helper_funcs ffffffff82be8000 r command_table_helper_funcs ffffffff82be9000 r command_table_helper_funcs -ffffffff82bea000 r command_table_helper_funcs -ffffffff82beb000 r dce80_max_clks_by_state +ffffffff82bea000 r dce80_max_clks_by_state +ffffffff82bea028 r disp_clk_regs +ffffffff82bea07c r disp_clk_shift +ffffffff82bea088 r disp_clk_mask +ffffffff82beb000 r dce110_max_clks_by_state ffffffff82beb028 r disp_clk_regs ffffffff82beb07c r disp_clk_shift ffffffff82beb088 r disp_clk_mask -ffffffff82bec000 r dce110_max_clks_by_state +ffffffff82bec000 r dce112_max_clks_by_state ffffffff82bec028 r disp_clk_regs ffffffff82bec07c r disp_clk_shift ffffffff82bec088 r disp_clk_mask -ffffffff82bed000 r dce112_max_clks_by_state -ffffffff82bed028 r disp_clk_regs -ffffffff82bed07c r disp_clk_shift -ffffffff82bed088 r disp_clk_mask -ffffffff82bee000 r dce120_max_clks_by_state +ffffffff82bed000 r dce120_max_clks_by_state +ffffffff82bee000 r clk_mgr_regs +ffffffff82bee054 r clk_mgr_shift +ffffffff82bee060 r clk_mgr_mask ffffffff82bef000 r clk_mgr_regs ffffffff82bef054 r clk_mgr_shift ffffffff82bef060 r clk_mgr_mask ffffffff82bf0000 r clk_mgr_regs ffffffff82bf0054 r clk_mgr_shift ffffffff82bf0060 r clk_mgr_mask -ffffffff82bf1000 r clk_mgr_regs -ffffffff82bf1054 r clk_mgr_shift -ffffffff82bf1060 r clk_mgr_mask +ffffffff82bf1000 r lpddr5_wm_table +ffffffff82bf10c0 r ddr5_wm_table ffffffff82bf2000 r lpddr5_wm_table ffffffff82bf20c0 r ddr5_wm_table -ffffffff82bf3000 r lpddr5_wm_table -ffffffff82bf30c0 r ddr5_wm_table -ffffffff82bf4000 r ddr5_wm_table -ffffffff82bf5000 r lpddr5_wm_table -ffffffff82bf50c0 r ddr4_wm_table -ffffffff82bf6000 r clk_mgr_regs_dcn321 -ffffffff82bf6054 r clk_mgr_shift_dcn321 -ffffffff82bf6060 r clk_mgr_mask_dcn321 -ffffffff82bf6084 r clk_mgr_regs_dcn32 -ffffffff82bf60d8 r clk_mgr_shift_dcn32 -ffffffff82bf60e4 r clk_mgr_mask_dcn32 -ffffffff82bf7000 r DC_BUILD_ID -ffffffff82bf9000 r output_csc_matrix -ffffffff82bf90e0 r black_color_format -ffffffff82bfc000 r dce_funcs -ffffffff82bfd000 r funcs -ffffffff82bfe000 R video_optimized_pixel_rates -ffffffff82bfe1c0 r dce110_clk_src_funcs -ffffffff82bfe1e8 r dce112_clk_src_funcs -ffffffff82bfe210 r dcn20_clk_src_funcs -ffffffff82bfe238 r dcn3_clk_src_funcs -ffffffff82bfe260 r dcn31_clk_src_funcs -ffffffff82bff000 r dce_funcs -ffffffff82bff068 r dcn10_funcs -ffffffff82bff0d0 r dcn20_funcs -ffffffff82bff138 r dcn21_funcs -ffffffff82c00000 r dce_ipp_funcs -ffffffff82c01000 r dce110_lnk_enc_funcs -ffffffff82c02000 r dce_mi_funcs -ffffffff82c02090 r dce112_mi_funcs -ffffffff82c02120 r dce120_mi_funcs -ffffffff82c021b0 r pte_settings -ffffffff82c03000 r funcs -ffffffff82c04000 r dce_link_panel_cntl_funcs -ffffffff82c05000 r filter_3tap_16p_upscale -ffffffff82c05040 r filter_3tap_16p_116 -ffffffff82c05080 r filter_3tap_16p_149 -ffffffff82c050c0 r filter_3tap_16p_183 -ffffffff82c05100 r filter_3tap_64p_upscale -ffffffff82c051d0 r filter_3tap_64p_116 -ffffffff82c052a0 r filter_3tap_64p_149 -ffffffff82c05370 r filter_3tap_64p_183 -ffffffff82c05440 r filter_4tap_16p_upscale -ffffffff82c05490 r filter_4tap_16p_116 -ffffffff82c054e0 r filter_4tap_16p_149 -ffffffff82c05530 r filter_4tap_16p_183 -ffffffff82c05580 r filter_4tap_64p_upscale -ffffffff82c05690 r filter_4tap_64p_116 -ffffffff82c057a0 r filter_4tap_64p_149 -ffffffff82c058b0 r filter_4tap_64p_183 -ffffffff82c059c0 r filter_5tap_64p_upscale -ffffffff82c05b10 r filter_5tap_64p_116 -ffffffff82c05c60 r filter_5tap_64p_149 -ffffffff82c05db0 r filter_5tap_64p_183 -ffffffff82c05f00 r filter_6tap_64p_upscale -ffffffff82c06090 r filter_6tap_64p_116 -ffffffff82c06220 r filter_6tap_64p_149 -ffffffff82c063b0 r filter_6tap_64p_183 -ffffffff82c06540 r filter_7tap_64p_upscale -ffffffff82c06710 r filter_7tap_64p_116 -ffffffff82c068e0 r filter_7tap_64p_149 -ffffffff82c06ab0 r filter_7tap_64p_183 -ffffffff82c06c80 r filter_8tap_64p_upscale -ffffffff82c06e90 r filter_8tap_64p_116 -ffffffff82c070a0 r filter_8tap_64p_149 -ffffffff82c072b0 r filter_8tap_64p_183 -ffffffff82c074c0 r filter_2tap_16p -ffffffff82c074f0 r filter_2tap_64p -ffffffff82c08000 r dce110_str_enc_funcs -ffffffff82c08120 r audio_clock_info_table_48bpc -ffffffff82c082b0 r audio_clock_info_table_36bpc -ffffffff82c08440 r audio_clock_info_table -ffffffff82c09000 r global_color_matrix -ffffffff82c090a8 r dce_transform_funcs -ffffffff82c0a000 r abm_funcs -ffffffff82c0b000 r psr_funcs -ffffffff82c0b040 r DP_SINK_DEVICE_STR_ID_1 -ffffffff82c0b045 r DP_SINK_DEVICE_STR_ID_2 -ffffffff82c0c000 r replay_funcs -ffffffff82c0d000 r reg_offsets -ffffffff82c0e000 r bios_regs -ffffffff82c0e008 r res_cap -ffffffff82c0e048 r dce100_res_pool_funcs -ffffffff82c0e140 r clk_src_regs -ffffffff82c0e23c r dmcu_regs -ffffffff82c0e298 r dmcu_shift -ffffffff82c0e2ac r dmcu_mask -ffffffff82c0e2f8 r abm_regs -ffffffff82c0e360 r abm_shift -ffffffff82c0e384 r abm_mask -ffffffff82c0e410 r debug_defaults -ffffffff82c0e5c0 r dce100_tg_offsets -ffffffff82c0e608 r plane_cap -ffffffff82c0e638 r res_create_funcs -ffffffff82c0e670 r panel_cntl_regs -ffffffff82c0e690 r panel_cntl_shift -ffffffff82c0e6a0 r panel_cntl_mask -ffffffff82c0e6e0 r link_enc_regs -ffffffff82c0eaa0 r link_enc_aux_regs -ffffffff82c0eaf0 r link_enc_hpd_regs -ffffffff82c0eb08 r link_enc_feature -ffffffff82c0eb18 r cs_shift -ffffffff82c0eb24 r cs_mask -ffffffff82c0eb50 r mi_regs -ffffffff82c0ee68 r mi_shifts -ffffffff82c0eeb0 r mi_masks -ffffffff82c0efd0 r ipp_regs -ffffffff82c0f1c8 r ipp_shift -ffffffff82c0f1f0 r ipp_mask -ffffffff82c0f290 r xfm_regs -ffffffff82c0f830 r xfm_shift -ffffffff82c0f890 r xfm_mask -ffffffff82c0fa10 r opp_regs -ffffffff82c0fb60 r opp_shift -ffffffff82c0fb8c r opp_mask -ffffffff82c0fc40 r aux_engine_regs -ffffffff82c0fd30 r aux_mask -ffffffff82c0fd90 r aux_shift -ffffffff82c0fdb0 r i2c_hw_regs -ffffffff82c0ff00 r i2c_shifts -ffffffff82c0ff2c r i2c_masks -ffffffff82c0ffd0 r audio_regs -ffffffff82c10104 r audio_shift -ffffffff82c1011c r audio_mask -ffffffff82c10160 r stream_enc_regs -ffffffff82c1080c r se_shift -ffffffff82c10890 r se_mask -ffffffff82c10a94 r hwseq_reg -ffffffff82c10cb0 r hwseq_shift -ffffffff82c10d30 r hwseq_mask -ffffffff82c11000 r reg_offsets -ffffffff82c11018 r dce110_compressor_funcs -ffffffff82c12000 r dce110_funcs -ffffffff82c122e8 r dce110_private_funcs -ffffffff82c13000 r dce110_mem_input_v_funcs -ffffffff82c13090 r dvmm_Hw_Setting_1DTiling -ffffffff82c13120 r dvmm_Hw_Setting_2DTiling -ffffffff82c131b0 r dvmm_Hw_Setting_Linear -ffffffff82c14000 r global_color_matrix -ffffffff82c140b0 r input_csc_matrix -ffffffff82c15000 r funcs -ffffffff82c16000 r bios_regs -ffffffff82c16008 r dce110_res_pool_funcs -ffffffff82c16100 r debug_defaults -ffffffff82c162b0 r clk_src_regs -ffffffff82c163ac r dmcu_regs -ffffffff82c16408 r dmcu_shift -ffffffff82c1641c r dmcu_mask -ffffffff82c16468 r abm_regs -ffffffff82c164d0 r abm_shift -ffffffff82c164f4 r abm_mask -ffffffff82c16580 r dce110_tg_offsets -ffffffff82c165c8 r res_create_funcs -ffffffff82c165f8 r plane_cap -ffffffff82c16624 r underlay_plane_cap -ffffffff82c16650 r stoney_resource_cap -ffffffff82c1668c r carrizo_resource_cap -ffffffff82c166d0 r panel_cntl_regs -ffffffff82c166f0 r panel_cntl_shift -ffffffff82c16700 r panel_cntl_mask -ffffffff82c16740 r link_enc_regs -ffffffff82c16b00 r link_enc_aux_regs -ffffffff82c16b50 r link_enc_hpd_regs -ffffffff82c16b68 r link_enc_feature -ffffffff82c16b78 r cs_shift -ffffffff82c16b84 r cs_mask -ffffffff82c16bb0 r mi_regs -ffffffff82c16d3c r mi_shifts -ffffffff82c16d84 r mi_masks -ffffffff82c16ea0 r ipp_regs -ffffffff82c16f9c r ipp_shift -ffffffff82c16fc4 r ipp_mask -ffffffff82c17060 r xfm_regs -ffffffff82c17330 r xfm_shift -ffffffff82c17390 r xfm_mask -ffffffff82c17510 r opp_regs -ffffffff82c17660 r opp_shift -ffffffff82c1768c r opp_mask -ffffffff82c17740 r aux_engine_regs -ffffffff82c17830 r aux_mask -ffffffff82c17890 r aux_shift -ffffffff82c178b0 r i2c_hw_regs -ffffffff82c17a00 r i2c_shifts -ffffffff82c17a2c r i2c_masks -ffffffff82c17ad0 r audio_regs -ffffffff82c17c04 r audio_shift -ffffffff82c17c1c r audio_mask -ffffffff82c17c60 r stream_enc_regs -ffffffff82c17f3c r se_shift -ffffffff82c17fc0 r se_mask -ffffffff82c181c4 r hwseq_stoney_reg -ffffffff82c183e0 r hwseq_cz_reg -ffffffff82c185fc r hwseq_shift -ffffffff82c1867c r hwseq_mask -ffffffff82c19000 r dce110_tg_funcs -ffffffff82c1a000 r dce110_tg_v_funcs -ffffffff82c1b000 r dce110_xfmv_funcs +ffffffff82bf3000 r ddr5_wm_table +ffffffff82bf4000 r lpddr5_wm_table +ffffffff82bf40c0 r ddr4_wm_table +ffffffff82bf5000 r clk_mgr_regs_dcn321 +ffffffff82bf5054 r clk_mgr_shift_dcn321 +ffffffff82bf5060 r clk_mgr_mask_dcn321 +ffffffff82bf5084 r clk_mgr_regs_dcn32 +ffffffff82bf50d8 r clk_mgr_shift_dcn32 +ffffffff82bf50e4 r clk_mgr_mask_dcn32 +ffffffff82bf6000 r DC_BUILD_ID +ffffffff82bf8000 r output_csc_matrix +ffffffff82bf80e0 r black_color_format +ffffffff82bfb000 r dce_funcs +ffffffff82bfc000 r funcs +ffffffff82bfd000 R video_optimized_pixel_rates +ffffffff82bfd1c0 r dce110_clk_src_funcs +ffffffff82bfd1e8 r dce112_clk_src_funcs +ffffffff82bfd210 r dcn20_clk_src_funcs +ffffffff82bfd238 r dcn3_clk_src_funcs +ffffffff82bfd260 r dcn31_clk_src_funcs +ffffffff82bfe000 r dce_funcs +ffffffff82bfe068 r dcn10_funcs +ffffffff82bfe0d0 r dcn20_funcs +ffffffff82bfe138 r dcn21_funcs +ffffffff82bff000 r dce_ipp_funcs +ffffffff82c00000 r dce110_lnk_enc_funcs +ffffffff82c01000 r dce_mi_funcs +ffffffff82c01090 r dce112_mi_funcs +ffffffff82c01120 r dce120_mi_funcs +ffffffff82c011b0 r pte_settings +ffffffff82c02000 r funcs +ffffffff82c03000 r dce_link_panel_cntl_funcs +ffffffff82c04000 r filter_3tap_16p_upscale +ffffffff82c04040 r filter_3tap_16p_116 +ffffffff82c04080 r filter_3tap_16p_149 +ffffffff82c040c0 r filter_3tap_16p_183 +ffffffff82c04100 r filter_3tap_64p_upscale +ffffffff82c041d0 r filter_3tap_64p_116 +ffffffff82c042a0 r filter_3tap_64p_149 +ffffffff82c04370 r filter_3tap_64p_183 +ffffffff82c04440 r filter_4tap_16p_upscale +ffffffff82c04490 r filter_4tap_16p_116 +ffffffff82c044e0 r filter_4tap_16p_149 +ffffffff82c04530 r filter_4tap_16p_183 +ffffffff82c04580 r filter_4tap_64p_upscale +ffffffff82c04690 r filter_4tap_64p_116 +ffffffff82c047a0 r filter_4tap_64p_149 +ffffffff82c048b0 r filter_4tap_64p_183 +ffffffff82c049c0 r filter_5tap_64p_upscale +ffffffff82c04b10 r filter_5tap_64p_116 +ffffffff82c04c60 r filter_5tap_64p_149 +ffffffff82c04db0 r filter_5tap_64p_183 +ffffffff82c04f00 r filter_6tap_64p_upscale +ffffffff82c05090 r filter_6tap_64p_116 +ffffffff82c05220 r filter_6tap_64p_149 +ffffffff82c053b0 r filter_6tap_64p_183 +ffffffff82c05540 r filter_7tap_64p_upscale +ffffffff82c05710 r filter_7tap_64p_116 +ffffffff82c058e0 r filter_7tap_64p_149 +ffffffff82c05ab0 r filter_7tap_64p_183 +ffffffff82c05c80 r filter_8tap_64p_upscale +ffffffff82c05e90 r filter_8tap_64p_116 +ffffffff82c060a0 r filter_8tap_64p_149 +ffffffff82c062b0 r filter_8tap_64p_183 +ffffffff82c064c0 r filter_2tap_16p +ffffffff82c064f0 r filter_2tap_64p +ffffffff82c07000 r dce110_str_enc_funcs +ffffffff82c07120 r audio_clock_info_table_48bpc +ffffffff82c072b0 r audio_clock_info_table_36bpc +ffffffff82c07440 r audio_clock_info_table +ffffffff82c08000 r global_color_matrix +ffffffff82c080a8 r dce_transform_funcs +ffffffff82c09000 r abm_funcs +ffffffff82c0a000 r psr_funcs +ffffffff82c0a040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82c0a045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82c0b000 r replay_funcs +ffffffff82c0c000 r reg_offsets +ffffffff82c0d000 r bios_regs +ffffffff82c0d008 r res_cap +ffffffff82c0d048 r dce100_res_pool_funcs +ffffffff82c0d140 r clk_src_regs +ffffffff82c0d23c r dmcu_regs +ffffffff82c0d298 r dmcu_shift +ffffffff82c0d2ac r dmcu_mask +ffffffff82c0d2f8 r abm_regs +ffffffff82c0d360 r abm_shift +ffffffff82c0d384 r abm_mask +ffffffff82c0d410 r debug_defaults +ffffffff82c0d5c0 r dce100_tg_offsets +ffffffff82c0d608 r plane_cap +ffffffff82c0d638 r res_create_funcs +ffffffff82c0d670 r panel_cntl_regs +ffffffff82c0d690 r panel_cntl_shift +ffffffff82c0d6a0 r panel_cntl_mask +ffffffff82c0d6e0 r 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qp_table_444_12bpc_max -ffffffff82cffa40 r qp_table_444_12bpc_min -ffffffff82d00980 r qp_table_422_8bpc_max -ffffffff82d00ec0 r qp_table_422_8bpc_min -ffffffff82d01400 r qp_table_422_10bpc_max -ffffffff82d01b40 r qp_table_422_10bpc_min -ffffffff82d02280 r qp_table_422_12bpc_max -ffffffff82d02bc0 r qp_table_422_12bpc_min -ffffffff82d03500 r qp_table_420_8bpc_max -ffffffff82d03940 r qp_table_420_8bpc_min -ffffffff82d03d80 r qp_table_420_10bpc_max -ffffffff82d04340 r qp_table_420_10bpc_min -ffffffff82d04900 r qp_table_420_12bpc_max -ffffffff82d05040 r qp_table_420_12bpc_min +ffffffff82c1d000 r bios_regs +ffffffff82c1d008 r dce112_res_pool_funcs +ffffffff82c1d100 r debug_defaults +ffffffff82c1d2b0 r clk_src_regs +ffffffff82c1d4a8 r dmcu_regs +ffffffff82c1d504 r dmcu_shift +ffffffff82c1d518 r dmcu_mask +ffffffff82c1d564 r abm_regs +ffffffff82c1d5cc r abm_shift +ffffffff82c1d5f0 r abm_mask +ffffffff82c1d680 r dce112_tg_offsets +ffffffff82c1d6c8 r res_create_funcs +ffffffff82c1d6f8 r plane_cap +ffffffff82c1d724 r polaris_11_resource_cap +ffffffff82c1d760 r polaris_10_resource_cap +ffffffff82c1d7a0 r panel_cntl_regs +ffffffff82c1d7c0 r panel_cntl_shift +ffffffff82c1d7d0 r panel_cntl_mask +ffffffff82c1d810 r link_enc_regs +ffffffff82c1dbd0 r link_enc_aux_regs +ffffffff82c1dc20 r link_enc_hpd_regs +ffffffff82c1dc38 r link_enc_feature +ffffffff82c1dc48 r cs_shift +ffffffff82c1dc54 r cs_mask +ffffffff82c1dc80 r mi_regs +ffffffff82c1df98 r mi_shifts +ffffffff82c1dfe0 r mi_masks +ffffffff82c1e100 r ipp_regs +ffffffff82c1e2f8 r ipp_shift +ffffffff82c1e320 r ipp_mask +ffffffff82c1e3c0 r xfm_regs +ffffffff82c1e960 r xfm_shift +ffffffff82c1e9c0 r xfm_mask +ffffffff82c1eb40 r opp_regs +ffffffff82c1ec90 r opp_shift +ffffffff82c1ecbc r opp_mask +ffffffff82c1ed70 r aux_engine_regs +ffffffff82c1ee60 r aux_mask +ffffffff82c1eec0 r aux_shift +ffffffff82c1eee0 r i2c_hw_regs +ffffffff82c1f030 r i2c_shifts +ffffffff82c1f05c r i2c_masks +ffffffff82c1f100 r audio_regs +ffffffff82c1f208 r audio_shift +ffffffff82c1f220 r audio_mask +ffffffff82c1f260 r stream_enc_regs +ffffffff82c1f818 r se_shift +ffffffff82c1f89c r se_mask +ffffffff82c1faa0 r hwseq_reg +ffffffff82c1fcbc r hwseq_shift +ffffffff82c1fd3c r hwseq_mask +ffffffff82c20000 r bios_regs +ffffffff82c20008 r res_cap +ffffffff82c20048 r dce120_res_pool_funcs +ffffffff82c20140 r debug_defaults +ffffffff82c202f0 r clk_src_regs +ffffffff82c204e8 r dmcu_regs +ffffffff82c20544 r dmcu_shift +ffffffff82c20558 r dmcu_mask +ffffffff82c205a4 r abm_regs +ffffffff82c2060c r abm_shift +ffffffff82c20630 r abm_mask +ffffffff82c206c0 r dce120_tg_offsets +ffffffff82c20708 r dce121_res_create_funcs +ffffffff82c20738 r res_create_funcs +ffffffff82c20768 r plane_cap +ffffffff82c207a0 r panel_cntl_regs +ffffffff82c207c0 r panel_cntl_shift +ffffffff82c207d0 r panel_cntl_mask +ffffffff82c20810 r link_enc_regs +ffffffff82c20bd0 r link_enc_aux_regs +ffffffff82c20c20 r link_enc_hpd_regs +ffffffff82c20c38 r link_enc_feature +ffffffff82c20c48 r cs_shift +ffffffff82c20c54 r cs_mask +ffffffff82c20c80 r mi_regs +ffffffff82c20f98 r mi_shifts +ffffffff82c20fe0 r mi_masks +ffffffff82c21100 r ipp_regs +ffffffff82c212f8 r ipp_shift +ffffffff82c21320 r ipp_mask +ffffffff82c213c0 r xfm_regs +ffffffff82c21960 r xfm_shift +ffffffff82c219c0 r xfm_mask +ffffffff82c21b40 r opp_regs +ffffffff82c21c90 r opp_shift +ffffffff82c21cbc r opp_mask +ffffffff82c21d70 r aux_engine_regs +ffffffff82c21e60 r aux_mask +ffffffff82c21ec0 r aux_shift +ffffffff82c21ee0 r i2c_hw_regs +ffffffff82c22030 r i2c_shifts +ffffffff82c2205c r i2c_masks +ffffffff82c22100 r audio_regs +ffffffff82c22234 r audio_shift +ffffffff82c2224c r audio_mask +ffffffff82c22290 r stream_enc_regs +ffffffff82c22848 r se_shift +ffffffff82c228cc r se_mask +ffffffff82c22ad0 r dce121_hwseq_reg +ffffffff82c22cec r dce121_hwseq_shift +ffffffff82c22d6c r dce121_hwseq_mask +ffffffff82c22f60 r hwseq_reg +ffffffff82c2317c r hwseq_shift +ffffffff82c231fc r hwseq_mask +ffffffff82c24000 r dce120_tg_funcs +ffffffff82c25000 r bios_regs +ffffffff82c25008 r res_cap +ffffffff82c25048 r dce80_res_pool_funcs +ffffffff82c25140 r debug_defaults +ffffffff82c252f0 r clk_src_regs +ffffffff82c253ec r dmcu_regs +ffffffff82c25448 r dmcu_shift +ffffffff82c2545c r dmcu_mask +ffffffff82c254a8 r abm_regs +ffffffff82c25510 r abm_shift +ffffffff82c25534 r abm_mask +ffffffff82c255c0 r dce80_tg_offsets +ffffffff82c25608 r plane_cap +ffffffff82c25638 r res_create_funcs +ffffffff82c25670 r panel_cntl_regs +ffffffff82c25690 r panel_cntl_shift +ffffffff82c256a0 r panel_cntl_mask +ffffffff82c256e0 r link_enc_regs +ffffffff82c25aa0 r link_enc_aux_regs +ffffffff82c25af0 r link_enc_hpd_regs +ffffffff82c25b08 r link_enc_feature +ffffffff82c25b18 r cs_shift +ffffffff82c25b24 r cs_mask +ffffffff82c25b50 r mi_regs +ffffffff82c25e68 r mi_shifts +ffffffff82c25eb0 r mi_masks +ffffffff82c25fd0 r ipp_regs +ffffffff82c261c8 r ipp_shift +ffffffff82c261f0 r ipp_mask +ffffffff82c26290 r xfm_regs +ffffffff82c26830 r xfm_shift +ffffffff82c26890 r xfm_mask +ffffffff82c26a10 r opp_regs +ffffffff82c26b60 r opp_shift +ffffffff82c26b8c r opp_mask +ffffffff82c26c40 r aux_engine_regs +ffffffff82c26d30 r aux_mask +ffffffff82c26d90 r aux_shift +ffffffff82c26db0 r i2c_hw_regs +ffffffff82c26f00 r i2c_shifts +ffffffff82c26f2c r i2c_masks +ffffffff82c26fd0 r audio_regs +ffffffff82c27104 r audio_shift +ffffffff82c2711c r audio_mask +ffffffff82c27160 r stream_enc_regs +ffffffff82c2780c r se_shift +ffffffff82c27890 r se_mask +ffffffff82c27a94 r hwseq_reg +ffffffff82c27cb0 r hwseq_shift +ffffffff82c27d30 r hwseq_mask +ffffffff82c27f24 r res_cap_81 +ffffffff82c27f60 r res_cap_83 +ffffffff82c28000 r reg_offsets +ffffffff82c28048 r dce80_tg_funcs +ffffffff82c29000 r dcn10_dpp_funcs +ffffffff82c2a000 r dpp_input_csc_matrix +ffffffff82c2c000 R dcn10_dwbc_funcs +ffffffff82c2d000 r hubbub1_funcs +ffffffff82c2e000 r dcn10_hubp_funcs +ffffffff82c2f000 r reduceSizeAndFraction.prime_numbers +ffffffff82c31000 r dcn10_funcs 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res_create_funcs +ffffffff82c75c40 r plane_cap +ffffffff82c75c70 r panel_cntl_regs +ffffffff82c75c90 r panel_cntl_shift +ffffffff82c75ca0 r panel_cntl_mask +ffffffff82c75ce0 r link_enc_regs +ffffffff82c76480 r link_enc_aux_regs +ffffffff82c764e0 r link_enc_hpd_regs +ffffffff82c764f8 r le_shift +ffffffff82c765e8 r le_mask +ffffffff82c769a0 r link_enc_feature +ffffffff82c769b0 r cs_shift +ffffffff82c769bc r cs_mask +ffffffff82c769e4 r hubbub_reg +ffffffff82c76b6c r hubbub_shift +ffffffff82c76bfc r hubbub_mask +ffffffff82c76e40 r vmid_regs +ffffffff82c77000 r vmid_shifts +ffffffff82c77008 r vmid_masks +ffffffff82c77030 r hubp_regs +ffffffff82c77c78 r hubp_shift +ffffffff82c77d74 r hubp_mask +ffffffff82c78170 r dpp_regs +ffffffff82c7a108 r tf_shift +ffffffff82c7a3dc r tf_mask +ffffffff82c7af20 r opp_regs +ffffffff82c7b130 r opp_shift +ffffffff82c7b168 r opp_mask +ffffffff82c7b240 r optc_regs +ffffffff82c7bab0 r optc_shift +ffffffff82c7bb84 r optc_mask +ffffffff82c7becc r mpc_regs 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panel_cntl_shift +ffffffff82c90af0 r panel_cntl_mask +ffffffff82c90b30 r link_enc_regs +ffffffff82c91190 r link_enc_aux_regs +ffffffff82c911e0 r link_enc_hpd_regs +ffffffff82c911f4 r le_shift +ffffffff82c912e4 r le_mask +ffffffff82c9169c r link_enc_feature +ffffffff82c916ac r cs_shift +ffffffff82c916b8 r cs_mask +ffffffff82c916e0 r hubbub_reg +ffffffff82c91868 r hubbub_shift +ffffffff82c918f8 r hubbub_mask +ffffffff82c91b30 r vmid_regs +ffffffff82c91cf0 r vmid_shifts +ffffffff82c91cf8 r vmid_masks +ffffffff82c91d20 r hubp_regs +ffffffff82c9275c r hubp_shift +ffffffff82c92858 r hubp_mask +ffffffff82c92c50 r dpp_regs +ffffffff82c946a4 r tf_shift +ffffffff82c94978 r tf_mask +ffffffff82c954c0 r opp_regs +ffffffff82c95678 r opp_shift +ffffffff82c956b0 r opp_mask +ffffffff82c95790 r optc_regs +ffffffff82c95e98 r optc_shift +ffffffff82c95f6c r optc_mask +ffffffff82c962b4 r mpc_regs +ffffffff82c97aa0 r mpc_shift +ffffffff82c97b7c r mpc_mask +ffffffff82c97ef0 r dsc_regs +ffffffff82c982c4 r dsc_shift +ffffffff82c9837c r dsc_mask +ffffffff82c98660 r dwbc30_regs +ffffffff82c9883c r dwbc30_shift +ffffffff82c98970 r dwbc30_mask +ffffffff82c98e40 r mcif_wb30_regs +ffffffff82c98f3c r mcif_wb30_shift +ffffffff82c98fe8 r mcif_wb30_mask +ffffffff82c992a0 r aux_engine_regs +ffffffff82c99368 r aux_mask +ffffffff82c993c8 r aux_shift +ffffffff82c993e0 r i2c_hw_regs +ffffffff82c994f8 r i2c_shifts +ffffffff82c99524 r i2c_masks +ffffffff82c995d0 r audio_regs +ffffffff82c99704 r audio_shift +ffffffff82c9971c r audio_mask +ffffffff82c99760 r stream_enc_regs +ffffffff82c99e04 r se_shift +ffffffff82c99ee0 r se_mask +ffffffff82c9a250 r vpg_regs +ffffffff82c9a2c8 r vpg_shift +ffffffff82c9a2f0 r vpg_mask +ffffffff82c9a390 r afmt_regs +ffffffff82c9a468 r afmt_shift +ffffffff82c9a47c r afmt_mask +ffffffff82c9a4c0 r hwseq_reg +ffffffff82c9a6dc r hwseq_shift +ffffffff82c9a75c r hwseq_mask +ffffffff82c9b000 r bios_regs +ffffffff82c9b008 r res_cap_dcn303 +ffffffff82c9b048 r debug_defaults_drv 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+ffffffff82caa124 r le_shift +ffffffff82caa214 r le_mask +ffffffff82caa5cc r link_enc_feature +ffffffff82caa5dc r panel_config_defaults +ffffffff82caa630 r debug_defaults_drv +ffffffff82caa7d8 r cs_shift +ffffffff82caa7e4 r cs_mask +ffffffff82caa80c r hubbub_reg +ffffffff82caa994 r hubbub_shift +ffffffff82caaa24 r hubbub_mask +ffffffff82caac60 r vmid_regs +ffffffff82caae20 r vmid_shifts +ffffffff82caae28 r vmid_masks +ffffffff82caae50 r hubp_regs +ffffffff82cab680 r hubp_shift +ffffffff82cab77c r hubp_mask +ffffffff82cabb70 r dpp_regs +ffffffff82cad080 r tf_shift +ffffffff82cad354 r tf_mask +ffffffff82cadea0 r opp_regs +ffffffff82cae000 r opp_shift +ffffffff82cae038 r opp_mask +ffffffff82cae110 r optc_regs +ffffffff82cae6b0 r optc_shift +ffffffff82cae784 r optc_mask +ffffffff82caeacc r mpc_regs +ffffffff82cb02b8 r mpc_shift +ffffffff82cb0394 r mpc_mask +ffffffff82cb0700 r dsc_regs +ffffffff82cb094c r dsc_shift +ffffffff82cb0a04 r dsc_mask +ffffffff82cb0ce0 r dwbc30_regs +ffffffff82cb0ebc r dwbc30_shift +ffffffff82cb0ff0 r dwbc30_mask +ffffffff82cb14c0 r mcif_wb30_regs +ffffffff82cb15bc r mcif_wb30_shift +ffffffff82cb1668 r mcif_wb30_mask +ffffffff82cb1920 r aux_engine_regs +ffffffff82cb19e8 r aux_mask +ffffffff82cb1a48 r aux_shift +ffffffff82cb1a60 r i2c_hw_regs +ffffffff82cb1b78 r i2c_shifts +ffffffff82cb1ba4 r i2c_masks +ffffffff82cb1c50 r audio_regs +ffffffff82cb1d84 r audio_shift +ffffffff82cb1d9c r audio_mask +ffffffff82cb1dd8 r se_shift +ffffffff82cb1eb4 r se_mask +ffffffff82cb2220 r vpg_regs +ffffffff82cb2310 r vpg_shift +ffffffff82cb2338 r vpg_mask +ffffffff82cb23e0 r afmt_regs +ffffffff82cb24b8 r afmt_shift +ffffffff82cb24cc r afmt_mask +ffffffff82cb2520 r stream_enc_regs +ffffffff82cb3bc0 r hpo_dp_stream_enc_regs +ffffffff82cb3df0 r hpo_dp_se_shift +ffffffff82cb3e18 r hpo_dp_se_mask +ffffffff82cb3ec0 r apg_regs +ffffffff82cb3f00 r apg_shift +ffffffff82cb3f08 r apg_mask +ffffffff82cb3f20 r hpo_dp_link_enc_regs +ffffffff82cb4030 r hpo_dp_le_shift +ffffffff82cb404c r hpo_dp_le_mask +ffffffff82cb40b0 r hwseq_reg +ffffffff82cb42cc r hwseq_shift +ffffffff82cb434c r hwseq_mask +ffffffff82cb5000 r dccg314_funcs +ffffffff82cb6000 r dcn314_str_enc_funcs +ffffffff82cb7000 r dcn314_funcs +ffffffff82cb72e8 r dcn314_private_funcs +ffffffff82cb8000 r bios_regs +ffffffff82cb8008 r res_cap_dcn314 +ffffffff82cb8048 r debug_defaults_diags +ffffffff82cb81f0 r clk_src_regs +ffffffff82cb8394 r dccg_regs +ffffffff82cb8484 r dccg_shift +ffffffff82cb8524 r dccg_mask +ffffffff82cb87a0 r abm_regs +ffffffff82cb8940 r abm_shift +ffffffff82cb8964 r abm_mask +ffffffff82cb89f0 r res_create_funcs +ffffffff82cb8a20 r plane_cap +ffffffff82cb8a50 r link_enc_regs +ffffffff82cb90b0 r link_enc_aux_regs +ffffffff82cb9100 r link_enc_hpd_regs +ffffffff82cb9114 r le_shift +ffffffff82cb9204 r le_mask +ffffffff82cb95bc r link_enc_feature +ffffffff82cb95cc r panel_config_defaults +ffffffff82cb9620 r debug_defaults_drv +ffffffff82cb97c8 r cs_shift +ffffffff82cb97d4 r cs_mask +ffffffff82cb97fc r hubbub_reg +ffffffff82cb9984 r hubbub_shift +ffffffff82cb9a14 r hubbub_mask +ffffffff82cb9c50 r vmid_regs +ffffffff82cb9e10 r vmid_shifts +ffffffff82cb9e18 r vmid_masks +ffffffff82cb9e40 r hubp_regs +ffffffff82cba670 r hubp_shift +ffffffff82cba76c r hubp_mask +ffffffff82cbab60 r dpp_regs +ffffffff82cbc070 r tf_shift +ffffffff82cbc344 r tf_mask +ffffffff82cbce90 r opp_regs +ffffffff82cbcff0 r opp_shift +ffffffff82cbd028 r opp_mask +ffffffff82cbd100 r optc_regs +ffffffff82cbd6a0 r optc_shift +ffffffff82cbd774 r optc_mask +ffffffff82cbdabc r mpc_regs +ffffffff82cbf2a8 r mpc_shift +ffffffff82cbf384 r mpc_mask +ffffffff82cbf6f0 r dsc_regs +ffffffff82cbfa00 r dsc_shift +ffffffff82cbfab8 r dsc_mask +ffffffff82cbfd90 r dwbc30_regs +ffffffff82cbff6c r dwbc30_shift +ffffffff82cc00a0 r dwbc30_mask +ffffffff82cc0570 r mcif_wb30_regs +ffffffff82cc066c r mcif_wb30_shift +ffffffff82cc0718 r mcif_wb30_mask +ffffffff82cc09d0 r aux_engine_regs +ffffffff82cc0a98 r aux_mask +ffffffff82cc0af8 r aux_shift +ffffffff82cc0b10 r i2c_hw_regs +ffffffff82cc0c28 r i2c_shifts +ffffffff82cc0c54 r i2c_masks +ffffffff82cc0d00 r audio_regs +ffffffff82cc0e34 r audio_shift +ffffffff82cc0e4c r audio_mask +ffffffff82cc0e90 r stream_enc_regs +ffffffff82cc1534 r se_shift +ffffffff82cc1610 r se_mask +ffffffff82cc1980 r vpg_regs +ffffffff82cc1a70 r vpg_shift +ffffffff82cc1a98 r vpg_mask +ffffffff82cc1b40 r afmt_regs +ffffffff82cc1c18 r afmt_shift +ffffffff82cc1c2c r afmt_mask +ffffffff82cc1c80 r hpo_dp_stream_enc_regs +ffffffff82cc1eb0 r hpo_dp_se_shift +ffffffff82cc1ed8 r hpo_dp_se_mask +ffffffff82cc1f80 r apg_regs +ffffffff82cc1fc0 r apg_shift +ffffffff82cc1fc8 r apg_mask +ffffffff82cc1fe0 r hpo_dp_link_enc_regs +ffffffff82cc20f0 r hpo_dp_le_shift +ffffffff82cc210c r hpo_dp_le_mask +ffffffff82cc2170 r hwseq_reg +ffffffff82cc238c r hwseq_shift +ffffffff82cc240c r hwseq_mask +ffffffff82cc3000 r bios_regs +ffffffff82cc3008 r res_cap_dcn31 +ffffffff82cc3050 r clk_src_regs +ffffffff82cc31f4 r dccg_regs +ffffffff82cc32e4 r dccg_shift +ffffffff82cc3384 r dccg_mask +ffffffff82cc3600 r abm_regs +ffffffff82cc37a0 r abm_shift +ffffffff82cc37c4 r abm_mask +ffffffff82cc3850 r res_create_funcs +ffffffff82cc3880 r plane_cap +ffffffff82cc38b0 r link_enc_regs +ffffffff82cc3f10 r link_enc_aux_regs +ffffffff82cc3f60 r link_enc_hpd_regs +ffffffff82cc3f74 r le_shift +ffffffff82cc4064 r le_mask +ffffffff82cc441c r link_enc_feature +ffffffff82cc442c r panel_config_defaults +ffffffff82cc4480 r debug_defaults_drv +ffffffff82cc4628 r cs_shift +ffffffff82cc4634 r cs_mask +ffffffff82cc465c r hubbub_reg +ffffffff82cc47e4 r hubbub_shift +ffffffff82cc4874 r hubbub_mask +ffffffff82cc4ab0 r vmid_regs +ffffffff82cc4c70 r vmid_shifts +ffffffff82cc4c78 r vmid_masks +ffffffff82cc4ca0 r hubp_regs +ffffffff82cc54d0 r hubp_shift +ffffffff82cc55cc r hubp_mask +ffffffff82cc59c0 r dpp_regs +ffffffff82cc6ed0 r tf_shift +ffffffff82cc71a4 r tf_mask +ffffffff82cc7cf0 r opp_regs +ffffffff82cc7e50 r opp_shift +ffffffff82cc7e88 r opp_mask +ffffffff82cc7f60 r optc_regs +ffffffff82cc8500 r optc_shift +ffffffff82cc85d4 r optc_mask +ffffffff82cc891c r mpc_regs +ffffffff82cca108 r mpc_shift +ffffffff82cca1e4 r mpc_mask +ffffffff82cca550 r dsc_regs +ffffffff82cca79c r dsc_shift +ffffffff82cca854 r dsc_mask +ffffffff82ccab30 r dwbc30_regs +ffffffff82ccad0c r dwbc30_shift +ffffffff82ccae40 r dwbc30_mask +ffffffff82ccb310 r mcif_wb30_regs +ffffffff82ccb40c r mcif_wb30_shift +ffffffff82ccb4b8 r mcif_wb30_mask +ffffffff82ccb770 r aux_engine_regs +ffffffff82ccb838 r aux_mask +ffffffff82ccb898 r aux_shift +ffffffff82ccb8b0 r i2c_hw_regs +ffffffff82ccb9c8 r i2c_shifts +ffffffff82ccb9f4 r i2c_masks +ffffffff82ccbaa0 r audio_regs +ffffffff82ccbbd4 r audio_shift +ffffffff82ccbbec r audio_mask +ffffffff82ccbc30 r stream_enc_regs +ffffffff82ccc2d4 r se_shift +ffffffff82ccc3b0 r se_mask +ffffffff82ccc720 r vpg_regs +ffffffff82ccc810 r vpg_shift +ffffffff82ccc838 r vpg_mask +ffffffff82ccc8e0 r afmt_regs +ffffffff82ccc9b8 r afmt_shift +ffffffff82ccc9cc r afmt_mask +ffffffff82ccca20 r hpo_dp_stream_enc_regs +ffffffff82cccc50 r hpo_dp_se_shift +ffffffff82cccc78 r hpo_dp_se_mask +ffffffff82cccd20 r apg_regs +ffffffff82cccd60 r apg_shift +ffffffff82cccd68 r apg_mask +ffffffff82cccd80 r hpo_dp_link_enc_regs +ffffffff82ccce90 r hpo_dp_le_shift +ffffffff82ccceac r hpo_dp_le_mask +ffffffff82cccf10 r hwseq_reg +ffffffff82ccd12c r hwseq_shift +ffffffff82ccd1ac r hwseq_mask +ffffffff82cce000 r bios_regs +ffffffff82cce008 r res_cap_dcn31 +ffffffff82cce050 r clk_src_regs +ffffffff82cce1f4 r dccg_regs +ffffffff82cce2e4 r dccg_shift +ffffffff82cce384 r dccg_mask +ffffffff82cce600 r abm_regs +ffffffff82cce7a0 r abm_shift +ffffffff82cce7c4 r abm_mask +ffffffff82cce850 r res_create_funcs +ffffffff82cce880 r plane_cap +ffffffff82cce8b0 r link_enc_regs +ffffffff82ccef10 r link_enc_aux_regs +ffffffff82ccef60 r link_enc_hpd_regs +ffffffff82ccef74 r le_shift +ffffffff82ccf064 r le_mask +ffffffff82ccf41c r link_enc_feature +ffffffff82ccf42c r panel_config_defaults +ffffffff82ccf480 r debug_defaults_drv +ffffffff82ccf628 r cs_shift +ffffffff82ccf634 r cs_mask +ffffffff82ccf65c r hubbub_reg +ffffffff82ccf7e4 r hubbub_shift +ffffffff82ccf874 r hubbub_mask +ffffffff82ccfab0 r vmid_regs +ffffffff82ccfc70 r vmid_shifts +ffffffff82ccfc78 r vmid_masks +ffffffff82ccfca0 r hubp_regs +ffffffff82cd04d0 r hubp_shift +ffffffff82cd05cc r hubp_mask +ffffffff82cd09c0 r dpp_regs +ffffffff82cd1ed0 r tf_shift +ffffffff82cd21a4 r tf_mask +ffffffff82cd2cf0 r opp_regs +ffffffff82cd2e50 r opp_shift +ffffffff82cd2e88 r opp_mask +ffffffff82cd2f60 r optc_regs +ffffffff82cd3500 r optc_shift +ffffffff82cd35d4 r optc_mask +ffffffff82cd391c r mpc_regs +ffffffff82cd5108 r mpc_shift +ffffffff82cd51e4 r mpc_mask +ffffffff82cd5550 r dsc_regs +ffffffff82cd579c r dsc_shift +ffffffff82cd5854 r dsc_mask +ffffffff82cd5b30 r dwbc30_regs +ffffffff82cd5d0c r dwbc30_shift +ffffffff82cd5e40 r dwbc30_mask +ffffffff82cd6310 r mcif_wb30_regs +ffffffff82cd640c r mcif_wb30_shift +ffffffff82cd64b8 r mcif_wb30_mask +ffffffff82cd6770 r aux_engine_regs +ffffffff82cd6838 r aux_mask +ffffffff82cd6898 r aux_shift +ffffffff82cd68b0 r i2c_hw_regs +ffffffff82cd69c8 r i2c_shifts +ffffffff82cd69f4 r i2c_masks +ffffffff82cd6aa0 r audio_regs +ffffffff82cd6bd4 r audio_shift +ffffffff82cd6bec r audio_mask +ffffffff82cd6c30 r stream_enc_regs +ffffffff82cd72d4 r se_shift +ffffffff82cd73b0 r se_mask +ffffffff82cd7720 r vpg_regs +ffffffff82cd7810 r vpg_shift +ffffffff82cd7838 r vpg_mask +ffffffff82cd78e0 r afmt_regs +ffffffff82cd79b8 r afmt_shift +ffffffff82cd79cc r afmt_mask +ffffffff82cd7a20 r hpo_dp_stream_enc_regs +ffffffff82cd7c50 r hpo_dp_se_shift +ffffffff82cd7c78 r hpo_dp_se_mask +ffffffff82cd7d20 r apg_regs +ffffffff82cd7d60 r apg_shift +ffffffff82cd7d68 r apg_mask +ffffffff82cd7d80 r hpo_dp_link_enc_regs +ffffffff82cd7e90 r hpo_dp_le_shift +ffffffff82cd7eac r hpo_dp_le_mask +ffffffff82cd7f10 r hwseq_reg +ffffffff82cd812c r hwseq_shift +ffffffff82cd81ac r hwseq_mask +ffffffff82cd9000 r dccg32_funcs +ffffffff82cda000 r dcn32_link_enc_funcs +ffffffff82cdb000 r dcn32_str_enc_funcs +ffffffff82cdc000 r hubbub32_funcs +ffffffff82cdd000 r dcn32_funcs +ffffffff82cdd2e8 r dcn32_private_funcs +ffffffff82cde000 r dcn32_mmhubbub_funcs +ffffffff82cdf000 r dcn32_mpc_funcs +ffffffff82ce0000 r res_cap_dcn32 +ffffffff82ce003c r dccg_shift +ffffffff82ce00dc r dccg_mask +ffffffff82ce0350 r abm_shift +ffffffff82ce0374 r abm_mask +ffffffff82ce0400 r res_create_funcs +ffffffff82ce0430 r plane_cap +ffffffff82ce045c r le_shift +ffffffff82ce054c r le_mask +ffffffff82ce0904 r link_enc_feature +ffffffff82ce0918 r debug_defaults_drv +ffffffff82ce0ac0 r cs_shift +ffffffff82ce0acc r cs_mask +ffffffff82ce0af4 r hubbub_shift +ffffffff82ce0b84 r hubbub_mask +ffffffff82ce0dbc r vmid_shifts +ffffffff82ce0dc4 r vmid_masks +ffffffff82ce0de4 r hubp_shift +ffffffff82ce0ee0 r hubp_mask +ffffffff82ce12d0 r tf_shift +ffffffff82ce15a4 r tf_mask +ffffffff82ce20e8 r opp_shift +ffffffff82ce2120 r opp_mask +ffffffff82ce21f4 r optc_shift +ffffffff82ce22c8 r optc_mask +ffffffff82ce2610 r mpc_shift +ffffffff82ce26ec r mpc_mask +ffffffff82ce2a58 r dsc_shift +ffffffff82ce2b10 r dsc_mask +ffffffff82ce2de8 r dwbc30_shift +ffffffff82ce2f1c r dwbc30_mask +ffffffff82ce33e4 r mcif_wb30_shift +ffffffff82ce3490 r mcif_wb30_mask +ffffffff82ce373c r aux_mask +ffffffff82ce379c r aux_shift +ffffffff82ce37b4 r i2c_shifts +ffffffff82ce37e0 r i2c_masks +ffffffff82ce3884 r audio_shift +ffffffff82ce389c r audio_mask +ffffffff82ce38d8 r se_shift +ffffffff82ce39b4 r se_mask +ffffffff82ce3d20 r vpg_shift +ffffffff82ce3d48 r vpg_mask +ffffffff82ce3ddc r afmt_shift +ffffffff82ce3df0 r afmt_mask +ffffffff82ce3e34 r hpo_dp_se_shift +ffffffff82ce3e5c r hpo_dp_se_mask +ffffffff82ce3efc r apg_shift +ffffffff82ce3f04 r apg_mask +ffffffff82ce3f1c r hpo_dp_le_shift +ffffffff82ce3f38 r hpo_dp_le_mask +ffffffff82ce3f9c r hwseq_shift +ffffffff82ce401c r hwseq_mask +ffffffff82ce5000 r dcn321_link_enc_funcs +ffffffff82ce6000 r res_cap_dcn321 +ffffffff82ce603c r dccg_shift +ffffffff82ce60dc r dccg_mask +ffffffff82ce6350 r abm_shift +ffffffff82ce6374 r abm_mask +ffffffff82ce6400 r res_create_funcs +ffffffff82ce6430 r plane_cap +ffffffff82ce645c r le_shift +ffffffff82ce654c r le_mask +ffffffff82ce6904 r link_enc_feature +ffffffff82ce6918 r debug_defaults_drv +ffffffff82ce6ac0 r cs_shift +ffffffff82ce6acc r cs_mask +ffffffff82ce6af4 r hubbub_shift +ffffffff82ce6b84 r hubbub_mask +ffffffff82ce6dbc r vmid_shifts +ffffffff82ce6dc4 r vmid_masks +ffffffff82ce6de4 r hubp_shift +ffffffff82ce6ee0 r hubp_mask +ffffffff82ce72d0 r tf_shift +ffffffff82ce75a4 r tf_mask +ffffffff82ce80e8 r opp_shift +ffffffff82ce8120 r opp_mask +ffffffff82ce81f4 r optc_shift +ffffffff82ce82c8 r optc_mask +ffffffff82ce8610 r mpc_shift +ffffffff82ce86ec r mpc_mask +ffffffff82ce8a58 r dsc_shift +ffffffff82ce8b10 r dsc_mask +ffffffff82ce8de8 r dwbc30_shift +ffffffff82ce8f1c r dwbc30_mask +ffffffff82ce93e4 r mcif_wb30_shift +ffffffff82ce9490 r mcif_wb30_mask +ffffffff82ce973c r aux_mask +ffffffff82ce979c r aux_shift +ffffffff82ce97b4 r i2c_shifts +ffffffff82ce97e0 r i2c_masks +ffffffff82ce9884 r audio_shift +ffffffff82ce989c r audio_mask +ffffffff82ce98d8 r se_shift +ffffffff82ce99b4 r se_mask +ffffffff82ce9d20 r vpg_shift +ffffffff82ce9d48 r vpg_mask +ffffffff82ce9ddc r afmt_shift +ffffffff82ce9df0 r afmt_mask +ffffffff82ce9e34 r hpo_dp_se_shift +ffffffff82ce9e5c r hpo_dp_se_mask +ffffffff82ce9efc r apg_shift +ffffffff82ce9f04 r apg_mask +ffffffff82ce9f1c r hpo_dp_le_shift +ffffffff82ce9f38 r hpo_dp_le_mask +ffffffff82ce9f9c r hwseq_shift +ffffffff82cea01c r hwseq_mask +ffffffff82cec000 R dcn10_soc_defaults +ffffffff82cec08c R dcn10_ip_defaults +ffffffff82cf8000 r dml20_funcs +ffffffff82cf8030 r dml20v2_funcs +ffffffff82cf8060 r dml21_funcs +ffffffff82cf8090 r dml30_funcs +ffffffff82cf80c0 r dml31_funcs +ffffffff82cf80f0 r dml314_funcs +ffffffff82cf8120 r dml32_funcs +ffffffff82cfb000 r qp_table_444_8bpc_max +ffffffff82cfb940 r qp_table_444_8bpc_min +ffffffff82cfc280 r qp_table_444_10bpc_max +ffffffff82cfcec0 r qp_table_444_10bpc_min +ffffffff82cfdb00 r qp_table_444_12bpc_max +ffffffff82cfea40 r qp_table_444_12bpc_min +ffffffff82cff980 r qp_table_422_8bpc_max +ffffffff82cffec0 r qp_table_422_8bpc_min +ffffffff82d00400 r qp_table_422_10bpc_max +ffffffff82d00b40 r qp_table_422_10bpc_min +ffffffff82d01280 r qp_table_422_12bpc_max +ffffffff82d01bc0 r qp_table_422_12bpc_min +ffffffff82d02500 r qp_table_420_8bpc_max +ffffffff82d02940 r qp_table_420_8bpc_min +ffffffff82d02d80 r qp_table_420_10bpc_max +ffffffff82d03340 r qp_table_420_10bpc_min +ffffffff82d03900 r qp_table_420_12bpc_max +ffffffff82d04040 r qp_table_420_12bpc_min +ffffffff82d06000 r funcs +ffffffff82d06050 r hpd_regs +ffffffff82d061a0 r hpd_shift +ffffffff82d061b0 r hpd_mask +ffffffff82d061c0 r ddc_data_regs +ffffffff82d063a0 r ddc_clk_regs +ffffffff82d06580 r ddc_shift +ffffffff82d065a8 r ddc_mask ffffffff82d07000 r funcs -ffffffff82d07050 r hpd_regs -ffffffff82d071a0 r hpd_shift -ffffffff82d071b0 r hpd_mask -ffffffff82d071c0 r ddc_data_regs -ffffffff82d073a0 r ddc_clk_regs -ffffffff82d07580 r ddc_shift -ffffffff82d075a8 r ddc_mask ffffffff82d08000 r funcs +ffffffff82d08050 r hpd_regs +ffffffff82d081a0 r hpd_shift +ffffffff82d081b0 r hpd_mask +ffffffff82d081c0 r ddc_data_regs +ffffffff82d083a0 r ddc_clk_regs +ffffffff82d08580 r ddc_shift +ffffffff82d085a8 r ddc_mask ffffffff82d09000 r funcs -ffffffff82d09050 r hpd_regs -ffffffff82d091a0 r hpd_shift -ffffffff82d091b0 r hpd_mask -ffffffff82d091c0 r ddc_data_regs -ffffffff82d093a0 r ddc_clk_regs -ffffffff82d09580 r ddc_shift -ffffffff82d095a8 r ddc_mask ffffffff82d0a000 r funcs +ffffffff82d0a050 r hpd_regs +ffffffff82d0a1a0 r hpd_shift +ffffffff82d0a1b0 r hpd_mask +ffffffff82d0a1c0 r ddc_data_regs +ffffffff82d0a3a0 r ddc_clk_regs +ffffffff82d0a580 r ddc_shift +ffffffff82d0a5a8 r ddc_mask ffffffff82d0b000 r funcs -ffffffff82d0b050 r hpd_regs -ffffffff82d0b1a0 r hpd_shift -ffffffff82d0b1b0 r hpd_mask -ffffffff82d0b1c0 r ddc_data_regs -ffffffff82d0b3a0 r ddc_clk_regs -ffffffff82d0b580 r ddc_shift -ffffffff82d0b5a8 r ddc_mask ffffffff82d0c000 r funcs +ffffffff82d0c050 r hpd_regs +ffffffff82d0c1a0 r hpd_shift +ffffffff82d0c1b0 r hpd_mask +ffffffff82d0c1c0 r ddc_data_regs +ffffffff82d0c3a0 r ddc_clk_regs +ffffffff82d0c580 r ddc_shift +ffffffff82d0c5a8 r ddc_mask +ffffffff82d0c5d0 r generic_regs +ffffffff82d0c640 r generic_shift +ffffffff82d0c650 r generic_mask ffffffff82d0d000 r funcs -ffffffff82d0d050 r hpd_regs -ffffffff82d0d1a0 r hpd_shift -ffffffff82d0d1b0 r hpd_mask -ffffffff82d0d1c0 r ddc_data_regs -ffffffff82d0d3a0 r ddc_clk_regs -ffffffff82d0d580 r ddc_shift -ffffffff82d0d5a8 r ddc_mask -ffffffff82d0d5d0 r generic_regs -ffffffff82d0d640 r generic_shift -ffffffff82d0d650 r generic_mask ffffffff82d0e000 r funcs +ffffffff82d0e050 r hpd_regs +ffffffff82d0e1a0 r hpd_shift +ffffffff82d0e1b0 r hpd_mask +ffffffff82d0e1c0 r ddc_data_regs_dcn +ffffffff82d0e370 r ddc_clk_regs_dcn +ffffffff82d0e520 r ddc_shift +ffffffff82d0e640 r ddc_mask +ffffffff82d0e760 r generic_regs +ffffffff82d0e7d0 r generic_shift +ffffffff82d0e7e0 r generic_mask ffffffff82d0f000 r funcs -ffffffff82d0f050 r hpd_regs -ffffffff82d0f1a0 r hpd_shift -ffffffff82d0f1b0 r hpd_mask -ffffffff82d0f1c0 r ddc_data_regs_dcn -ffffffff82d0f370 r ddc_clk_regs_dcn -ffffffff82d0f520 r ddc_shift -ffffffff82d0f640 r ddc_mask -ffffffff82d0f760 r generic_regs -ffffffff82d0f7d0 r generic_shift -ffffffff82d0f7e0 r generic_mask ffffffff82d10000 r funcs +ffffffff82d10050 r hpd_regs +ffffffff82d10168 r hpd_shift +ffffffff82d10178 r hpd_mask +ffffffff82d10190 r ddc_data_regs_dcn +ffffffff82d102c0 r ddc_clk_regs_dcn +ffffffff82d103f0 r ddc_shift +ffffffff82d104e0 r ddc_mask +ffffffff82d105d0 r generic_regs +ffffffff82d10604 r generic_shift +ffffffff82d1060c r generic_mask ffffffff82d11000 r funcs -ffffffff82d11050 r hpd_regs -ffffffff82d11168 r hpd_shift -ffffffff82d11178 r hpd_mask -ffffffff82d11190 r ddc_data_regs_dcn -ffffffff82d112c0 r ddc_clk_regs_dcn -ffffffff82d113f0 r ddc_shift -ffffffff82d114e0 r ddc_mask -ffffffff82d115d0 r generic_regs -ffffffff82d11604 r generic_shift -ffffffff82d1160c r generic_mask ffffffff82d12000 r funcs +ffffffff82d12050 r hpd_regs +ffffffff82d121a0 r hpd_shift +ffffffff82d121b0 r hpd_mask +ffffffff82d121c0 r ddc_data_regs_dcn +ffffffff82d12370 r ddc_clk_regs_dcn +ffffffff82d12520 r ddc_shift +ffffffff82d12640 r ddc_mask +ffffffff82d12760 r generic_regs +ffffffff82d127d0 r generic_shift +ffffffff82d127e0 r generic_mask ffffffff82d13000 r funcs -ffffffff82d13050 r hpd_regs -ffffffff82d131a0 r hpd_shift -ffffffff82d131b0 r hpd_mask -ffffffff82d131c0 r ddc_data_regs_dcn -ffffffff82d13370 r ddc_clk_regs_dcn -ffffffff82d13520 r ddc_shift -ffffffff82d13640 r ddc_mask -ffffffff82d13760 r generic_regs -ffffffff82d137d0 r generic_shift -ffffffff82d137e0 r generic_mask ffffffff82d14000 r funcs +ffffffff82d14050 r hpd_regs +ffffffff82d14168 r hpd_shift +ffffffff82d14178 r hpd_mask +ffffffff82d14190 r ddc_data_regs_dcn +ffffffff82d14300 r ddc_clk_regs_dcn +ffffffff82d14470 r ddc_shift +ffffffff82d14560 r ddc_mask +ffffffff82d14650 r generic_regs +ffffffff82d146c0 r generic_shift +ffffffff82d146d0 r generic_mask ffffffff82d15000 r funcs -ffffffff82d15050 r hpd_regs -ffffffff82d15168 r hpd_shift -ffffffff82d15178 r hpd_mask -ffffffff82d15190 r ddc_data_regs_dcn -ffffffff82d15300 r ddc_clk_regs_dcn -ffffffff82d15470 r ddc_shift -ffffffff82d15560 r ddc_mask -ffffffff82d15650 r generic_regs -ffffffff82d156c0 r generic_shift -ffffffff82d156d0 r generic_mask ffffffff82d16000 r funcs +ffffffff82d16050 r hpd_regs +ffffffff82d16168 r hpd_shift +ffffffff82d16178 r hpd_mask +ffffffff82d16190 r ddc_data_regs_dcn +ffffffff82d16340 r ddc_clk_regs_dcn +ffffffff82d164f0 r ddc_shift +ffffffff82d16610 r ddc_mask +ffffffff82d16730 r generic_regs +ffffffff82d167a0 r generic_shift +ffffffff82d167b0 r generic_mask ffffffff82d17000 r funcs -ffffffff82d17050 r hpd_regs -ffffffff82d17168 r hpd_shift -ffffffff82d17178 r hpd_mask -ffffffff82d17190 r ddc_data_regs_dcn -ffffffff82d17340 r ddc_clk_regs_dcn -ffffffff82d174f0 r ddc_shift -ffffffff82d17610 r ddc_mask -ffffffff82d17730 r generic_regs -ffffffff82d177a0 r generic_shift -ffffffff82d177b0 r generic_mask ffffffff82d18000 r funcs ffffffff82d19000 r funcs ffffffff82d1a000 r funcs -ffffffff82d1b000 r funcs -ffffffff82d1c000 r hdmi_14_protection -ffffffff82d1c010 r dp_11_protection -ffffffff82d1c020 r hdcp_i2c_offsets -ffffffff82d1c050 r hdcp_dpcd_addrs -ffffffff82d1d000 r irq_service_funcs_dce110 -ffffffff82d1d008 r dummy_irq_info_funcs -ffffffff82d1d018 r hpd_irq_info_funcs -ffffffff82d1d028 r hpd_rx_irq_info_funcs -ffffffff82d1d038 r pflip_irq_info_funcs -ffffffff82d1d048 r vupdate_irq_info_funcs -ffffffff82d1d058 r vblank_irq_info_funcs -ffffffff82d1d070 r irq_source_info_dce110 -ffffffff82d1f000 r irq_service_funcs_dce120 -ffffffff82d1f008 r dummy_irq_info_funcs -ffffffff82d1f018 r hpd_irq_info_funcs -ffffffff82d1f028 r hpd_rx_irq_info_funcs -ffffffff82d1f038 r pflip_irq_info_funcs -ffffffff82d1f048 r vupdate_irq_info_funcs -ffffffff82d1f058 r vblank_irq_info_funcs -ffffffff82d1f070 r irq_source_info_dce120 -ffffffff82d21000 r irq_service_funcs_dce80 -ffffffff82d21008 r dummy_irq_info_funcs -ffffffff82d21018 r hpd_irq_info_funcs -ffffffff82d21028 r hpd_rx_irq_info_funcs -ffffffff82d21038 r pflip_irq_info_funcs -ffffffff82d21048 r vupdate_irq_info_funcs -ffffffff82d21058 r vblank_irq_info_funcs -ffffffff82d21070 r irq_source_info_dce80 -ffffffff82d23000 r irq_service_funcs_dcn10 -ffffffff82d23008 r dummy_irq_info_funcs -ffffffff82d23018 r hpd_irq_info_funcs -ffffffff82d23028 r hpd_rx_irq_info_funcs -ffffffff82d23038 r pflip_irq_info_funcs -ffffffff82d23048 r vupdate_no_lock_irq_info_funcs -ffffffff82d23058 r vblank_irq_info_funcs -ffffffff82d23068 r vline0_irq_info_funcs -ffffffff82d23080 r irq_source_info_dcn10 -ffffffff82d25000 r irq_service_funcs_dcn20 -ffffffff82d25008 r dummy_irq_info_funcs -ffffffff82d25018 r hpd_irq_info_funcs -ffffffff82d25028 r hpd_rx_irq_info_funcs -ffffffff82d25038 r pflip_irq_info_funcs -ffffffff82d25048 r vupdate_no_lock_irq_info_funcs -ffffffff82d25058 r vblank_irq_info_funcs -ffffffff82d25068 r vline0_irq_info_funcs -ffffffff82d25080 r irq_source_info_dcn20 -ffffffff82d27000 r irq_service_funcs_dcn201 -ffffffff82d27008 r dummy_irq_info_funcs -ffffffff82d27018 r hpd_irq_info_funcs -ffffffff82d27028 r hpd_rx_irq_info_funcs -ffffffff82d27038 r pflip_irq_info_funcs -ffffffff82d27048 r vupdate_no_lock_irq_info_funcs -ffffffff82d27058 r vblank_irq_info_funcs -ffffffff82d27068 r vline0_irq_info_funcs -ffffffff82d27080 r irq_source_info_dcn201 -ffffffff82d29000 r irq_source_info_dcn21 -ffffffff82d2a290 r irq_service_funcs_dcn21 -ffffffff82d2a298 r dummy_irq_info_funcs -ffffffff82d2a2a8 r hpd_irq_info_funcs -ffffffff82d2a2b8 r hpd_rx_irq_info_funcs -ffffffff82d2a2c8 r pflip_irq_info_funcs -ffffffff82d2a2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d2a2e8 r vblank_irq_info_funcs -ffffffff82d2a2f8 r vline0_irq_info_funcs -ffffffff82d2a308 r dmub_outbox_irq_info_funcs -ffffffff82d2b000 r irq_source_info_dcn30 -ffffffff82d2c290 r irq_service_funcs_dcn30 -ffffffff82d2c298 r dummy_irq_info_funcs -ffffffff82d2c2a8 r hpd_irq_info_funcs -ffffffff82d2c2b8 r hpd_rx_irq_info_funcs -ffffffff82d2c2c8 r pflip_irq_info_funcs -ffffffff82d2c2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d2c2e8 r vblank_irq_info_funcs -ffffffff82d2c2f8 r vline0_irq_info_funcs -ffffffff82d2c308 r dmub_trace_irq_info_funcs -ffffffff82d2d000 r irq_source_info_dcn302 -ffffffff82d2e290 r irq_service_funcs_dcn302 -ffffffff82d2e298 r dummy_irq_info_funcs -ffffffff82d2e2a8 r hpd_irq_info_funcs -ffffffff82d2e2b8 r hpd_rx_irq_info_funcs -ffffffff82d2e2c8 r pflip_irq_info_funcs -ffffffff82d2e2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d2e2e8 r vblank_irq_info_funcs -ffffffff82d2e2f8 r vline0_irq_info_funcs -ffffffff82d2e308 r dmub_trace_irq_info_funcs -ffffffff82d2f000 r irq_service_funcs_dcn303 -ffffffff82d2f008 r dummy_irq_info_funcs -ffffffff82d2f018 r hpd_irq_info_funcs -ffffffff82d2f028 r hpd_rx_irq_info_funcs -ffffffff82d2f038 r pflip_irq_info_funcs -ffffffff82d2f048 r vupdate_no_lock_irq_info_funcs -ffffffff82d2f058 r vblank_irq_info_funcs -ffffffff82d2f068 r vline0_irq_info_funcs -ffffffff82d2f080 r irq_source_info_dcn303 -ffffffff82d31000 r irq_source_info_dcn31 -ffffffff82d32290 r irq_service_funcs_dcn31 -ffffffff82d32298 r dummy_irq_info_funcs -ffffffff82d322a8 r hpd_irq_info_funcs -ffffffff82d322b8 r hpd_rx_irq_info_funcs -ffffffff82d322c8 r pflip_irq_info_funcs -ffffffff82d322d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d322e8 r vblank_irq_info_funcs -ffffffff82d322f8 r vline0_irq_info_funcs -ffffffff82d32308 r outbox_irq_info_funcs -ffffffff82d33000 r irq_source_info_dcn314 -ffffffff82d34290 r irq_service_funcs_dcn314 -ffffffff82d34298 r dummy_irq_info_funcs -ffffffff82d342a8 r hpd_irq_info_funcs -ffffffff82d342b8 r hpd_rx_irq_info_funcs -ffffffff82d342c8 r pflip_irq_info_funcs -ffffffff82d342d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d342e8 r vblank_irq_info_funcs -ffffffff82d342f8 r vline0_irq_info_funcs -ffffffff82d34308 r outbox_irq_info_funcs -ffffffff82d35000 r irq_source_info_dcn315 -ffffffff82d36290 r irq_service_funcs_dcn315 -ffffffff82d36298 r dummy_irq_info_funcs -ffffffff82d362a8 r hpd_irq_info_funcs -ffffffff82d362b8 r hpd_rx_irq_info_funcs -ffffffff82d362c8 r pflip_irq_info_funcs -ffffffff82d362d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d362e8 r vblank_irq_info_funcs -ffffffff82d362f8 r vline0_irq_info_funcs -ffffffff82d36308 r outbox_irq_info_funcs -ffffffff82d37000 r irq_source_info_dcn32 -ffffffff82d38290 r irq_service_funcs_dcn32 -ffffffff82d38298 r dummy_irq_info_funcs -ffffffff82d382a8 r hpd_irq_info_funcs -ffffffff82d382b8 r hpd_rx_irq_info_funcs -ffffffff82d382c8 r pflip_irq_info_funcs -ffffffff82d382d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d382e8 r vblank_irq_info_funcs -ffffffff82d382f8 r vline0_irq_info_funcs -ffffffff82d38308 r outbox_irq_info_funcs -ffffffff82d3a000 r dio_link_hwss -ffffffff82d3b000 r dio_fixed_vs_pe_retimer_link_hwss -ffffffff82d3c000 r dpia_link_hwss -ffffffff82d3d000 r hpo_dp_link_hwss -ffffffff82d3e000 r hpo_fixed_vs_pe_retimer_dp_link_hwss -ffffffff82d3f000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82d40000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82d40006 r DP_DVI_CONVERTER_ID_4 -ffffffff82d4000d r DP_DVI_CONVERTER_ID_5 -ffffffff82d41000 r dp_lt_fallbacks -ffffffff82d45000 r mandatory_dpcd_partitions -ffffffff82d46000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82d46007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82d47000 r virtual_lnk_enc_funcs -ffffffff82d48000 r virtual_link_hwss -ffffffff82d49000 r virtual_str_enc_funcs -ffffffff82d4a000 R dmub_srv_dcn20_regs -ffffffff82d4b000 R dmub_srv_dcn21_regs -ffffffff82d4c000 R dmub_srv_dcn30_regs -ffffffff82d4d000 R dmub_srv_dcn301_regs -ffffffff82d4e000 R dmub_srv_dcn302_regs -ffffffff82d4f000 R dmub_srv_dcn303_regs -ffffffff82d50000 R dmub_srv_dcn31_regs -ffffffff82d51000 R dmub_srv_dcn314_regs -ffffffff82d52000 R dmub_srv_dcn315_regs -ffffffff82d53000 R dmub_srv_dcn316_regs -ffffffff82d54000 R dmub_srv_dcn32_regs -ffffffff82d55000 r numerator01 -ffffffff82d55020 r numerator02 -ffffffff82d55040 r numerator04 -ffffffff82d55060 r numerator05 -ffffffff82d59000 r abm_settings -ffffffff82d59020 r abm_settings_config0 -ffffffff82d59060 r abm_settings_config1 -ffffffff82d590a0 r abm_settings_config2 -ffffffff82d590d8 r min_reduction_table_v_2_2 -ffffffff82d590e5 r max_reduction_table_v_2_2 -ffffffff82d590f2 r min_reduction_table -ffffffff82d590ff r max_reduction_table -ffffffff82d59110 r custom_backlight_curve0 -ffffffff82d5a000 R amdgpu_pp_profile_name -ffffffff82d5b000 r pp_lib_thermal_controller_names -ffffffff82d5c000 r pp_ip_funcs -ffffffff82d5c0a0 R pp_smu_ip_block -ffffffff82d5c0b8 r pp_dpm_funcs +ffffffff82d1b000 r hdmi_14_protection +ffffffff82d1b010 r dp_11_protection +ffffffff82d1b020 r hdcp_i2c_offsets +ffffffff82d1b050 r hdcp_dpcd_addrs +ffffffff82d1c000 r irq_service_funcs_dce110 +ffffffff82d1c008 r dummy_irq_info_funcs +ffffffff82d1c018 r hpd_irq_info_funcs +ffffffff82d1c028 r hpd_rx_irq_info_funcs +ffffffff82d1c038 r pflip_irq_info_funcs +ffffffff82d1c048 r vupdate_irq_info_funcs +ffffffff82d1c058 r vblank_irq_info_funcs +ffffffff82d1c070 r irq_source_info_dce110 +ffffffff82d1e000 r irq_service_funcs_dce120 +ffffffff82d1e008 r dummy_irq_info_funcs +ffffffff82d1e018 r hpd_irq_info_funcs +ffffffff82d1e028 r hpd_rx_irq_info_funcs +ffffffff82d1e038 r pflip_irq_info_funcs +ffffffff82d1e048 r vupdate_irq_info_funcs +ffffffff82d1e058 r vblank_irq_info_funcs +ffffffff82d1e070 r irq_source_info_dce120 +ffffffff82d20000 r irq_service_funcs_dce80 +ffffffff82d20008 r dummy_irq_info_funcs +ffffffff82d20018 r hpd_irq_info_funcs +ffffffff82d20028 r hpd_rx_irq_info_funcs +ffffffff82d20038 r pflip_irq_info_funcs +ffffffff82d20048 r vupdate_irq_info_funcs +ffffffff82d20058 r vblank_irq_info_funcs +ffffffff82d20070 r irq_source_info_dce80 +ffffffff82d22000 r irq_service_funcs_dcn10 +ffffffff82d22008 r dummy_irq_info_funcs +ffffffff82d22018 r hpd_irq_info_funcs +ffffffff82d22028 r hpd_rx_irq_info_funcs +ffffffff82d22038 r pflip_irq_info_funcs +ffffffff82d22048 r vupdate_no_lock_irq_info_funcs +ffffffff82d22058 r vblank_irq_info_funcs +ffffffff82d22068 r vline0_irq_info_funcs +ffffffff82d22080 r irq_source_info_dcn10 +ffffffff82d24000 r irq_service_funcs_dcn20 +ffffffff82d24008 r dummy_irq_info_funcs +ffffffff82d24018 r hpd_irq_info_funcs +ffffffff82d24028 r hpd_rx_irq_info_funcs +ffffffff82d24038 r pflip_irq_info_funcs +ffffffff82d24048 r vupdate_no_lock_irq_info_funcs +ffffffff82d24058 r vblank_irq_info_funcs +ffffffff82d24068 r vline0_irq_info_funcs +ffffffff82d24080 r irq_source_info_dcn20 +ffffffff82d26000 r irq_service_funcs_dcn201 +ffffffff82d26008 r dummy_irq_info_funcs +ffffffff82d26018 r hpd_irq_info_funcs +ffffffff82d26028 r hpd_rx_irq_info_funcs +ffffffff82d26038 r pflip_irq_info_funcs +ffffffff82d26048 r vupdate_no_lock_irq_info_funcs +ffffffff82d26058 r vblank_irq_info_funcs +ffffffff82d26068 r vline0_irq_info_funcs +ffffffff82d26080 r irq_source_info_dcn201 +ffffffff82d28000 r irq_source_info_dcn21 +ffffffff82d29290 r irq_service_funcs_dcn21 +ffffffff82d29298 r dummy_irq_info_funcs +ffffffff82d292a8 r hpd_irq_info_funcs +ffffffff82d292b8 r hpd_rx_irq_info_funcs +ffffffff82d292c8 r pflip_irq_info_funcs +ffffffff82d292d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d292e8 r vblank_irq_info_funcs +ffffffff82d292f8 r vline0_irq_info_funcs +ffffffff82d29308 r dmub_outbox_irq_info_funcs +ffffffff82d2a000 r irq_source_info_dcn30 +ffffffff82d2b290 r irq_service_funcs_dcn30 +ffffffff82d2b298 r dummy_irq_info_funcs +ffffffff82d2b2a8 r hpd_irq_info_funcs +ffffffff82d2b2b8 r hpd_rx_irq_info_funcs +ffffffff82d2b2c8 r pflip_irq_info_funcs +ffffffff82d2b2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d2b2e8 r vblank_irq_info_funcs +ffffffff82d2b2f8 r vline0_irq_info_funcs +ffffffff82d2b308 r dmub_trace_irq_info_funcs +ffffffff82d2c000 r irq_source_info_dcn302 +ffffffff82d2d290 r irq_service_funcs_dcn302 +ffffffff82d2d298 r dummy_irq_info_funcs +ffffffff82d2d2a8 r hpd_irq_info_funcs +ffffffff82d2d2b8 r hpd_rx_irq_info_funcs +ffffffff82d2d2c8 r pflip_irq_info_funcs +ffffffff82d2d2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d2d2e8 r vblank_irq_info_funcs +ffffffff82d2d2f8 r vline0_irq_info_funcs +ffffffff82d2d308 r dmub_trace_irq_info_funcs +ffffffff82d2e000 r irq_service_funcs_dcn303 +ffffffff82d2e008 r dummy_irq_info_funcs +ffffffff82d2e018 r hpd_irq_info_funcs +ffffffff82d2e028 r hpd_rx_irq_info_funcs +ffffffff82d2e038 r pflip_irq_info_funcs +ffffffff82d2e048 r vupdate_no_lock_irq_info_funcs +ffffffff82d2e058 r vblank_irq_info_funcs +ffffffff82d2e068 r vline0_irq_info_funcs +ffffffff82d2e080 r irq_source_info_dcn303 +ffffffff82d30000 r irq_source_info_dcn31 +ffffffff82d31290 r irq_service_funcs_dcn31 +ffffffff82d31298 r dummy_irq_info_funcs +ffffffff82d312a8 r hpd_irq_info_funcs +ffffffff82d312b8 r hpd_rx_irq_info_funcs +ffffffff82d312c8 r pflip_irq_info_funcs +ffffffff82d312d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d312e8 r vblank_irq_info_funcs +ffffffff82d312f8 r vline0_irq_info_funcs +ffffffff82d31308 r outbox_irq_info_funcs +ffffffff82d32000 r irq_source_info_dcn314 +ffffffff82d33290 r irq_service_funcs_dcn314 +ffffffff82d33298 r dummy_irq_info_funcs +ffffffff82d332a8 r hpd_irq_info_funcs +ffffffff82d332b8 r hpd_rx_irq_info_funcs +ffffffff82d332c8 r pflip_irq_info_funcs +ffffffff82d332d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d332e8 r vblank_irq_info_funcs +ffffffff82d332f8 r vline0_irq_info_funcs +ffffffff82d33308 r outbox_irq_info_funcs +ffffffff82d34000 r irq_source_info_dcn315 +ffffffff82d35290 r irq_service_funcs_dcn315 +ffffffff82d35298 r dummy_irq_info_funcs +ffffffff82d352a8 r hpd_irq_info_funcs +ffffffff82d352b8 r hpd_rx_irq_info_funcs +ffffffff82d352c8 r pflip_irq_info_funcs +ffffffff82d352d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d352e8 r vblank_irq_info_funcs +ffffffff82d352f8 r vline0_irq_info_funcs +ffffffff82d35308 r outbox_irq_info_funcs +ffffffff82d36000 r irq_source_info_dcn32 +ffffffff82d37290 r irq_service_funcs_dcn32 +ffffffff82d37298 r dummy_irq_info_funcs +ffffffff82d372a8 r hpd_irq_info_funcs +ffffffff82d372b8 r hpd_rx_irq_info_funcs +ffffffff82d372c8 r pflip_irq_info_funcs +ffffffff82d372d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d372e8 r vblank_irq_info_funcs +ffffffff82d372f8 r vline0_irq_info_funcs +ffffffff82d37308 r outbox_irq_info_funcs +ffffffff82d39000 r dio_link_hwss +ffffffff82d3a000 r dio_fixed_vs_pe_retimer_link_hwss +ffffffff82d3b000 r dpia_link_hwss +ffffffff82d3c000 r hpo_dp_link_hwss +ffffffff82d3d000 r hpo_fixed_vs_pe_retimer_dp_link_hwss +ffffffff82d3e000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82d3f000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82d3f006 r DP_DVI_CONVERTER_ID_4 +ffffffff82d3f00d r DP_DVI_CONVERTER_ID_5 +ffffffff82d40000 r dp_lt_fallbacks +ffffffff82d44000 r mandatory_dpcd_partitions +ffffffff82d45000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82d45007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82d46000 r virtual_lnk_enc_funcs +ffffffff82d47000 r virtual_link_hwss +ffffffff82d48000 r virtual_str_enc_funcs +ffffffff82d49000 R dmub_srv_dcn20_regs +ffffffff82d4a000 R dmub_srv_dcn21_regs +ffffffff82d4b000 R dmub_srv_dcn30_regs +ffffffff82d4c000 R dmub_srv_dcn301_regs +ffffffff82d4d000 R dmub_srv_dcn302_regs +ffffffff82d4e000 R dmub_srv_dcn303_regs +ffffffff82d4f000 R dmub_srv_dcn31_regs +ffffffff82d50000 R dmub_srv_dcn314_regs +ffffffff82d51000 R dmub_srv_dcn315_regs +ffffffff82d52000 R dmub_srv_dcn316_regs +ffffffff82d53000 R dmub_srv_dcn32_regs +ffffffff82d54000 r numerator01 +ffffffff82d54020 r numerator02 +ffffffff82d54040 r numerator04 +ffffffff82d54060 r numerator05 +ffffffff82d58000 r abm_settings +ffffffff82d58020 r abm_settings_config0 +ffffffff82d58060 r abm_settings_config1 +ffffffff82d580a0 r abm_settings_config2 +ffffffff82d580d8 r min_reduction_table_v_2_2 +ffffffff82d580e5 r max_reduction_table_v_2_2 +ffffffff82d580f2 r min_reduction_table +ffffffff82d580ff r max_reduction_table +ffffffff82d58110 r custom_backlight_curve0 +ffffffff82d59000 R amdgpu_pp_profile_name +ffffffff82d5a000 r pp_lib_thermal_controller_names +ffffffff82d5b000 r pp_ip_funcs +ffffffff82d5b0a0 R pp_smu_ip_block +ffffffff82d5b0b8 r pp_dpm_funcs +ffffffff82d5c000 r gpio_tbl +ffffffff82d5c0f0 r enable_fb_req_rej_tbl +ffffffff82d5c140 r use_bclk_tbl +ffffffff82d5c310 r turn_off_plls_tbl +ffffffff82d5c640 r enter_baco_tbl +ffffffff82d5c730 r exit_baco_tbl +ffffffff82d5c850 r clean_baco_tbl ffffffff82d5d000 r gpio_tbl ffffffff82d5d0f0 r enable_fb_req_rej_tbl ffffffff82d5d140 r use_bclk_tbl -ffffffff82d5d310 r turn_off_plls_tbl -ffffffff82d5d640 r enter_baco_tbl -ffffffff82d5d730 r exit_baco_tbl -ffffffff82d5d850 r clean_baco_tbl +ffffffff82d5d2e0 r turn_off_plls_tbl +ffffffff82d5d370 r clk_req_b_tbl +ffffffff82d5d490 r enter_baco_tbl +ffffffff82d5d5b0 r exit_baco_tbl +ffffffff82d5d6d0 r clean_baco_tbl ffffffff82d5e000 r gpio_tbl ffffffff82d5e0f0 r enable_fb_req_rej_tbl -ffffffff82d5e140 r use_bclk_tbl -ffffffff82d5e2e0 r turn_off_plls_tbl -ffffffff82d5e370 r clk_req_b_tbl -ffffffff82d5e490 r enter_baco_tbl -ffffffff82d5e5b0 r exit_baco_tbl -ffffffff82d5e6d0 r clean_baco_tbl -ffffffff82d5f000 r gpio_tbl -ffffffff82d5f0f0 r enable_fb_req_rej_tbl -ffffffff82d5f140 r use_bclk_tbl_vg -ffffffff82d5f200 r turn_off_plls_tbl_vg -ffffffff82d5f350 r use_bclk_tbl -ffffffff82d5f440 r turn_off_plls_tbl -ffffffff82d5f5f0 r clk_req_b_tbl -ffffffff82d5f710 r enter_baco_tbl -ffffffff82d5f830 r exit_baco_tbl -ffffffff82d5f950 r clean_baco_tbl -ffffffff82d60000 r vega10_fuses_default -ffffffff82d6f000 r pp_r600_encode_lanes -ffffffff82d70000 R pptable_v1_0_funcs -ffffffff82d71000 R pptable_funcs -ffffffff82d71020 r soft_dummy_pp_table -ffffffff82d72000 r smu10_hwmgr_funcs -ffffffff82d73000 r smu7_hwmgr_funcs -ffffffff82d732f8 r smu7_irq_funcs -ffffffff82d73310 r SMU7ThermalPolicy -ffffffff82d74000 r GCCACConfig_Polaris10 -ffffffff82d741b0 r DIDTConfig_Polaris10 -ffffffff82d74a50 r GCCACConfig_Polaris11 -ffffffff82d74c00 r DIDTConfig_Polaris11_Kicker -ffffffff82d754a0 r DIDTConfig_Polaris11 -ffffffff82d75d40 r DIDTConfig_Polaris12 -ffffffff82d765e0 r GCCACConfig_VegaM -ffffffff82d76790 r DIDTConfig_VegaM -ffffffff82d78000 r smu8_hwmgr_funcs -ffffffff82d782f0 r SMU7ThermalPolicy -ffffffff82d79000 r smu9_irq_funcs -ffffffff82d7a000 r gpio_tbl_iceland -ffffffff82d7a060 r gpio_tbl -ffffffff82d7a150 r enable_fb_req_rej_tbl -ffffffff82d7a1a0 r use_bclk_tbl -ffffffff82d7a370 r turn_off_plls_tbl -ffffffff82d7a610 r enter_baco_tbl -ffffffff82d7a730 r exit_baco_tbl_iceland -ffffffff82d7a870 r clean_baco_tbl_iceland -ffffffff82d7a890 r exit_baco_tbl -ffffffff82d7a9b0 r clean_baco_tbl -ffffffff82d7b000 r pre_baco_tbl -ffffffff82d7b090 r enter_baco_tbl -ffffffff82d7b2b0 r exit_baco_tbl -ffffffff82d7b520 r clean_baco_tbl -ffffffff82d7c000 r vega10_hwmgr_funcs -ffffffff82d7c2f0 r channel_number -ffffffff82d7c320 r SMU7ThermalWithDelayPolicy -ffffffff82d7d000 r SEDiDtStallCtrlConfig_vega10 -ffffffff82d7d110 r SEDiDtStallPatternConfig_vega10 -ffffffff82d7d2e0 r SEDiDtWeightConfig_Vega10 -ffffffff82d7d3b0 r SEDiDtCtrl1Config_Vega10 -ffffffff82d7d440 r SEDiDtCtrl2Config_Vega10 -ffffffff82d7d510 r SEDiDtCtrl3Config_vega10 -ffffffff82d7d820 r SEDiDtTuningCtrlConfig_Vega10 -ffffffff82d7d8b0 r SELCacConfig_Vega10 -ffffffff82d7da40 r SEDiDtCtrl0Config_Vega10 -ffffffff82d7dd10 r AvfsPSMInitConfig_vega10 -ffffffff82d7dd90 r SEEDCStallPatternConfig_Vega10 -ffffffff82d7dea0 r SEEDCStallDelayConfig_Vega10 -ffffffff82d7df80 r SEEDCCtrlConfig_Vega10 -ffffffff82d7e040 r PSMSEEDCStallPatternConfig_Vega10 -ffffffff82d7e0c0 r PSMSEEDCStallDelayConfig_Vega10 -ffffffff82d7e1d0 r PSMSEEDCCtrlResetConfig_Vega10 -ffffffff82d7e290 r PSMSEEDCCtrlConfig_Vega10 -ffffffff82d7e350 r SEEDCForceStallPatternConfig_Vega10 -ffffffff82d7e3e0 r SEEDCCtrlForceStallConfig_Vega10 -ffffffff82d7f000 R vega10_pptable_funcs -ffffffff82d80000 r pre_baco_tbl -ffffffff82d80090 r enter_baco_tbl -ffffffff82d802b0 r exit_baco_tbl -ffffffff82d80520 r clean_baco_tbl -ffffffff82d81000 r vega12_hwmgr_funcs -ffffffff82d812f0 r SMU7ThermalWithDelayPolicy -ffffffff82d81340 r link_width -ffffffff82d82000 R vega12_pptable_funcs -ffffffff82d83000 r clean_baco_tbl -ffffffff82d84000 r vega20_hwmgr_funcs -ffffffff82d842f0 r SMU7ThermalWithDelayPolicy -ffffffff82d84340 r link_width -ffffffff82d85000 R vega20_pptable_funcs -ffffffff82d86000 R ci_smu_funcs -ffffffff82d860e0 r defaults_hawaii_pro -ffffffff82d8612c r defaults_hawaii_xt -ffffffff82d86178 r defaults_saturn_xt -ffffffff82d861c4 r defaults_bonaire_xt -ffffffff82d86210 r ci_program_jump_on_start.data -ffffffff82d87000 R fiji_smu_funcs -ffffffff82d870e0 r avfs_graphics_level -ffffffff82d87240 r fiji_power_tune_data_set_array -ffffffff82d87246 r fiji_clock_stretch_amount_conversion -ffffffff82d87260 r fiji_clock_stretcher_ddt_table -ffffffff82d88000 R iceland_smu_funcs -ffffffff82d880e0 r defaults_icelandxt -ffffffff82d8812c r defaults_icelandpro -ffffffff82d88178 r defaults_iceland -ffffffff82d89000 R polaris10_smu_funcs -ffffffff82d890e0 r avfs_graphics_level_polaris10 -ffffffff82d892a0 r avfs_memory_level_polaris10 -ffffffff82d892c0 r polaris10_power_tune_data_set_array -ffffffff82d89310 r Range_Table -ffffffff82d8a000 R smu10_smu_funcs -ffffffff82d8b000 r smu7_program_jump_on_start.data -ffffffff82d8b010 r pwr_virus_table_pre -ffffffff82d8b680 r pwr_virus_table_post -ffffffff82d8bf80 r pwr_virus_section1 -ffffffff82d8c610 r pwr_virus_section2 -ffffffff82d8c660 r pwr_virus_section3 -ffffffff82d93ab0 r pwr_virus_section4 -ffffffff82d93e80 r pwr_virus_section5 -ffffffff82d94490 r pwr_virus_section6 -ffffffff82d96000 R smu8_smu_funcs -ffffffff82d97000 R tonga_smu_funcs -ffffffff82d970e0 r tonga_power_tune_data_set_array -ffffffff82d9712c r tonga_clock_stretch_amount_conversion -ffffffff82d97140 r tonga_clock_stretcher_ddt_table -ffffffff82d98000 R vega10_smu_funcs -ffffffff82d99000 R vega12_smu_funcs -ffffffff82d9a000 R vega20_smu_funcs -ffffffff82d9b000 R vegam_smu_funcs -ffffffff82d9b0e0 r vegam_power_tune_data_set_array -ffffffff82d9b130 r Range_Table -ffffffff82d9c000 R smu_ip_funcs -ffffffff82d9c0a0 R smu_v11_0_ip_block -ffffffff82d9c0b8 R smu_v12_0_ip_block -ffffffff82d9c0d0 R smu_v13_0_ip_block -ffffffff82d9c0e8 r swsmu_pm_funcs -ffffffff82d9d000 r arcturus_ppt_funcs -ffffffff82d9d3f0 r arcturus_table_map -ffffffff82d9d470 r arcturus_pwr_src_map -ffffffff82d9d480 r arcturus_workload_map -ffffffff82d9d4d0 r smu11_thermal_policy -ffffffff82d9d528 r arcturus_i2c_algo -ffffffff82d9d538 r arcturus_i2c_control_quirks -ffffffff82d9d550 r arcturus_throttler_map -ffffffff82d9d570 r arcturus_message_map -ffffffff82d9dff0 r arcturus_clk_map -ffffffff82d9e0b0 r arcturus_feature_mask_map -ffffffff82d9f000 r cyan_skillfish_ppt_funcs -ffffffff82da0000 r navi10_ppt_funcs -ffffffff82da03f0 r smu11_thermal_policy -ffffffff82da0448 r navi10_i2c_algo -ffffffff82da0458 r navi10_i2c_control_quirks -ffffffff82da0470 r navi1x_throttler_map -ffffffff82da0490 r NoDbiPrbs7 -ffffffff82da1490 r DbiPrbs7 -ffffffff82da3000 r sienna_cichlid_ppt_funcs -ffffffff82da33f0 r smu11_thermal_policy -ffffffff82da3448 r sienna_cichlid_i2c_algo -ffffffff82da3458 r sienna_cichlid_i2c_control_quirks -ffffffff82da3470 r sienna_cichlid_throttler_map -ffffffff82da4000 r smu_v11_0_irq_funcs -ffffffff82da4010 r link_width -ffffffff82da5000 r vangogh_ppt_funcs -ffffffff82da53e8 r vangogh_throttler_map -ffffffff82da6000 r renoir_ppt_funcs -ffffffff82da63e8 r renoir_throttler_map -ffffffff82da7000 r aldebaran_ppt_funcs -ffffffff82da73f0 r aldebaran_clk_map -ffffffff82da74b0 r aldebaran_table_map -ffffffff82da7530 r smu13_thermal_policy -ffffffff82da7588 r aldebaran_i2c_algo -ffffffff82da7598 r aldebaran_i2c_control_quirks -ffffffff82da75b0 r aldebaran_throttler_map -ffffffff82da75d0 r aldebaran_message_map -ffffffff82da8050 r aldebaran_feature_mask_map -ffffffff82da9000 R pmfw_decoded_link_speed -ffffffff82da9020 R pmfw_decoded_link_width -ffffffff82da9040 r smu_v13_0_irq_funcs -ffffffff82daa000 r smu_v13_0_0_ppt_funcs -ffffffff82daa3f0 r smu13_thermal_policy -ffffffff82daa448 r smu_v13_0_0_i2c_algo -ffffffff82daa458 r smu_v13_0_0_i2c_control_quirks -ffffffff82daa470 r smu_v13_0_0_throttler_map -ffffffff82dab000 r smu_v13_0_4_ppt_funcs -ffffffff82dac000 r smu_v13_0_5_ppt_funcs -ffffffff82dad000 r smu_v13_0_6_ppt_funcs -ffffffff82dad3f0 r smu_v13_0_6_message_map -ffffffff82dade70 r smu_v13_0_6_clk_map -ffffffff82dadf30 r smu_v13_0_6_table_map -ffffffff82dadfb0 r smu_v13_0_6_i2c_algo -ffffffff82dadfc0 r smu_v13_0_6_i2c_control_quirks -ffffffff82dadfd0 r smu_v13_0_6_irq_funcs -ffffffff82dadfe0 r smu_v13_0_6_throttler_map -ffffffff82dadff0 r smu_v13_0_6_feature_mask_map -ffffffff82daf000 r smu_v13_0_7_ppt_funcs -ffffffff82daf3f0 r smu13_thermal_policy -ffffffff82daf450 r smu_v13_0_7_throttler_map -ffffffff82db0000 r yellow_carp_ppt_funcs -ffffffff82db1000 R link_speed -ffffffff82db1020 r __smu_message_names -ffffffff82db2000 R pchb_ca -ffffffff82db3000 R amas_ca -ffffffff82db3028 R amas_devices -ffffffff82db3040 r amas_feature -ffffffff82db4000 R cardslot_ca -ffffffff82db5000 R cardbus_ca -ffffffff82db6000 R com_cardbus_ca -ffffffff82db7000 R xl_cardbus_ca -ffffffff82db7030 R xl_cardbus_products -ffffffff82db8000 R dc_cardbus_ca -ffffffff82db8030 R dc_cardbus_devices -ffffffff82db9000 R fxp_cardbus_ca -ffffffff82db9028 R fxp_cardbus_devices -ffffffff82dba000 R rl_cardbus_devices -ffffffff82dba028 R rl_cardbus_ca -ffffffff82dbb000 R re_cardbus_ca -ffffffff82dbb028 R re_cardbus_devices -ffffffff82dbc000 R ath_cardbus_ca -ffffffff82dbd000 R athn_cardbus_ca -ffffffff82dbd030 r athn_cardbus_devices -ffffffff82dbe000 R atw_cardbus_ca -ffffffff82dbe028 R atw_cardbus_devices -ffffffff82dbf000 R rtw_cardbus_ca -ffffffff82dbf028 R rtw_cardbus_devices -ffffffff82dc0000 R ral_cardbus_ca -ffffffff82dc0030 r ral_cardbus_devices -ffffffff82dc1000 R acx_cardbus_ca -ffffffff82dc1028 r acx_cardbus_devices -ffffffff82dc2000 R pgt_cardbus_ca -ffffffff82dc2028 R pgt_cardbus_devices -ffffffff82dc3000 R ehci_cardbus_ca -ffffffff82dc4000 R ohci_cardbus_ca -ffffffff82dc5000 R uhci_cardbus_ca -ffffffff82dc6000 R malo_cardbus_ca -ffffffff82dc6028 r malo_cardbus_devices -ffffffff82dc7000 R bwi_cardbus_ca -ffffffff82dc7030 r bwi_cardbus_devices -ffffffff82dc8000 R pcmcia_ca -ffffffff82dc9000 r pcmcia_parse_cis_tuple.init_cfe -ffffffff82dca000 r pcmcia_cis_quirks -ffffffff82dcb000 R ep_pcmcia_ca -ffffffff82dcc000 R ne_pcmcia_ca -ffffffff82dcc030 R ne2000devs -ffffffff82dce000 R aic_pcmcia_ca -ffffffff82dcf000 R com_pcmcia_ca -ffffffff82dd0000 R wdc_pcmcia_ca -ffffffff82dd1000 R sm_pcmcia_ca -ffffffff82dd2000 R xe_pcmcia_ca -ffffffff82dd3000 R wi_pcmcia_ca -ffffffff82dd3030 r wi_pcmcia_products -ffffffff82dd4000 R malo_pcmcia_ca -ffffffff82dd5000 R an_pcmcia_ca -ffffffff82dd6000 R pcib_ca -ffffffff82dd7000 R amdpcib_ca -ffffffff82dd7028 R amdpcib_devices -ffffffff82dd8000 R tcpcib_ca -ffffffff82dd8028 R tcpcib_devices -ffffffff82dd9000 R aapic_ca -ffffffff82dda000 R hme_pci_ca -ffffffff82dda028 r hme_promhdr -ffffffff82dda02a r hme_promdat -ffffffff82ddb000 R isa_ca -ffffffff82ddc000 R isadma_ca -ffffffff82ddd000 R fdc_ca -ffffffff82dde000 R fd_ca -ffffffff82ddf000 R com_isa_ca -ffffffff82de0000 R pckbc_isa_ca -ffffffff82de1000 R vga_isa_ca -ffffffff82de2000 R wdc_isa_ca -ffffffff82de3000 R mpu_midi_hw_if -ffffffff82de4000 R mpu_isa_ca -ffffffff82de5000 R pcppi_ca -ffffffff82de6000 R spkr_ca -ffffffff82de6030 r pitchtab -ffffffff82de7000 R lpt_isa_ca -ffffffff82de8000 R wbsio_ca -ffffffff82de9000 R schsio_ca -ffffffff82dea000 R lm_isa_ca -ffffffff82dea028 R lm_wbsio_ca -ffffffff82deb000 R it_sensors -ffffffff82deb110 R it_vrfact -ffffffff82deb140 R it_fan_regs -ffffffff82deb160 R it_fan_ext_regs -ffffffff82deb178 R it_ca -ffffffff82dec000 R abitkv_sensors -ffffffff82dec200 R abitaa_sensors -ffffffff82dec480 R abitav_sensors -ffffffff82dec700 R abitas_sensors -ffffffff82dec980 R abitax_sensors -ffffffff82decbc0 R abitm4_sensors -ffffffff82dece80 R abitan_sensors -ffffffff82ded120 R abital_sensors -ffffffff82ded3a0 R abitaw_sensors -ffffffff82ded700 R abitni_sensors -ffffffff82ded9a0 R abitat_sensors -ffffffff82dedcc0 R abitan2_sensors -ffffffff82dedf60 R abitab_sensors -ffffffff82dee220 R abitan3_sensors -ffffffff82dee500 R abitaw2_sensors -ffffffff82dee860 R abitat2_sensors -ffffffff82deeb60 R abitab2_sensors -ffffffff82deeea0 R abitin_sensors -ffffffff82def1e0 R uguru_ca -ffffffff82df0000 R aps_ca -ffffffff82df1000 R wsdisplay_emul_ca -ffffffff82df1030 r charClass -ffffffff82df2000 r usl_syncops -ffffffff82df3000 R wsevent_filtops -ffffffff82df4000 R wskbd_ca -ffffffff82df5000 r latin1_to_upper -ffffffff82df6000 R wsmouse_ca -ffffffff82df7000 R cyrillic_to_koi8 -ffffffff82df7060 R unicode_to_latin2 -ffffffff82df70e0 R unicode_to_latin7 -ffffffff82df8000 R wsemul_vt100_ops -ffffffff82df9000 r decspcgr2uni -ffffffff82df9100 r dectech2uni -ffffffff82df9200 r nrctable -ffffffff82dfa000 r vt100_fkeys -ffffffff82dfa0c0 r vt100_pfkeys -ffffffff82dfa0e0 r vt100_numpad -ffffffff82dfb000 R pckbd_ca -ffffffff82dfb028 R pckbd_accessops -ffffffff82dfb040 R pckbd_consops -ffffffff82dfb060 R pckbd_keymapdata -ffffffff82dfb070 R pckbd_xtbl2 -ffffffff82dfb100 R pckbd_xtbl2_ext -ffffffff82dfc000 r pckbd_keydesc_us -ffffffff82dfc250 r pckbd_keydesc_de -ffffffff82dfc2f0 r pckbd_keydesc_de_nodead -ffffffff82dfc310 r pckbd_keydesc_fr -ffffffff82dfc3d0 r pckbd_keydesc_fr_dvorak_bepo -ffffffff82dfc510 r pckbd_keydesc_dk -ffffffff82dfc5a0 r pckbd_keydesc_dk_nodead -ffffffff82dfc5b0 r pckbd_keydesc_it -ffffffff82dfc640 r pckbd_keydesc_uk -ffffffff82dfc6e0 r pckbd_keydesc_jp -ffffffff82dfc750 r pckbd_keydesc_sv -ffffffff82dfc780 r pckbd_keydesc_sv_nodead -ffffffff82dfc790 r pckbd_keydesc_no -ffffffff82dfc7c0 r pckbd_keydesc_no_nodead -ffffffff82dfc7d0 r pckbd_keydesc_us_declk -ffffffff82dfc860 r pckbd_keydesc_us_dvorak -ffffffff82dfc900 r pckbd_keydesc_us_colemak -ffffffff82dfc948 r pckbd_keydesc_swapctrlcaps -ffffffff82dfc960 r pckbd_keydesc_iopener -ffffffff82dfc9b0 r pckbd_keydesc_es -ffffffff82dfca50 r pckbd_keydesc_be -ffffffff82dfcb10 r pckbd_keydesc_ru -ffffffff82dfcc80 r pckbd_keydesc_ua -ffffffff82dfce10 r pckbd_keydesc_sg -ffffffff82dfcec0 r pckbd_keydesc_sg_nodead -ffffffff82dfcee0 r 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D vttoif_tab -ffffffff83231064 D suid_clear -ffffffff83231068 D vnode_mtx -ffffffff83231078 D vfs_stall_lock -ffffffff83231090 D vtypes -ffffffff832310e0 D vtags -ffffffff83232000 D syncer_maxdelay -ffffffff83232004 D syncdelay -ffffffff83233000 D dosdirtemplate -ffffffff83234000 D ntfs_hashlock -ffffffff83235000 D ntfs_toupper_lock -ffffffff83236000 D art_table_gc_mtx -ffffffff83236010 D art_table_gc_task -ffffffff83236040 D art_node_gc_mtx -ffffffff83236050 D art_node_gc_task -ffffffff83237000 D bpf_bufsize -ffffffff83237004 D bpf_maxbufsize -ffffffff83237008 D bpf_sysctl_lk -ffffffff83238000 D ifg_head -ffffffff83238010 D if_cloners_lock -ffffffff83238020 D if_input_task_locked -ffffffff83238050 D netlock -ffffffff83238060 D ifnetlist -ffffffff83239000 D ifiq_maxlen_drop -ffffffff83239004 D ifiq_maxlen_return -ffffffff8323a000 D etherbroadcastaddr -ffffffff8323a006 D ether_ipmulticast_min -ffffffff8323a00c D ether_ipmulticast_max -ffffffff8323a012 D ether_ip6multicast_min -ffffffff8323a018 D ether_ip6multicast_max -ffffffff8323b000 D etherip_cloner -ffffffff8323b030 D etherip_list -ffffffff8323c000 D loop_cloner -ffffffff8323d000 D ifmedia_mtx -ffffffff8323e000 D ppp_compressors -ffffffff8323e020 D ppp_cloner -ffffffff8323f000 D ppp_pkt_init -ffffffff83240000 D ppp_bsd_compress -ffffffff83241000 D ppp_deflate -ffffffff83241070 D ppp_deflate_draft -ffffffff83242000 D tun_cloner -ffffffff83242030 D tap_cloner -ffffffff83243000 D bridgeintrq -ffffffff83243038 D bridge_cloner -ffffffff83244000 d veb_cloner -ffffffff83244030 d vport_cloner -ffffffff83245000 D vlan_tagh_lk -ffffffff83245010 D vlan_cloner -ffffffff83245040 D svlan_cloner -ffffffff83246000 D pipex_list_mtx -ffffffff83246010 D pipex_prune -ffffffff83246018 D pipexoutq -ffffffff83246050 d SHAPad2 -ffffffff83247000 D rtmap_gc -ffffffff83247018 D rt_rc -ffffffff83248000 D rt_labels -ffffffff83248010 D rtlabel_mtx -ffffffff83249000 D enc_cloner -ffffffff8324a000 D gre_cloner -ffffffff8324a030 D gre_list -ffffffff8324a040 D mgre_cloner -ffffffff8324a070 D egre_cloner -ffffffff8324a0a0 D nvgre_cloner -ffffffff8324a0d0 D eoip_cloner -ffffffff8324b000 D trunk_cloner -ffffffff8324c000 d aggr_cloner -ffffffff8324d000 d tpmr_cloner -ffffffff8324e000 D mpe_cloner -ffffffff8324f000 D mpw_cloner -ffffffff83250000 D mpip_cloner -ffffffff83251000 d bpe_cloner -ffffffff83251030 d bpe_lock -ffffffff83252000 D vether_cloner -ffffffff83253000 D pair_cloner -ffffffff83254000 d vxlan_cloner -ffffffff83254030 d vxlan_lock -ffffffff83254040 d vxlan_teps -ffffffff83255000 D underload_interval -ffffffff83255010 D wg_cloner -ffffffff83256000 d stoeplitz_keyseed -ffffffff83257000 D ieee80211_cache_size -ffffffff83258000 D arpt_prune -ffffffff83258004 D arpt_keep -ffffffff83258008 D arpt_down -ffffffff83258010 D arpinq -ffffffff83258048 D arp_mtx -ffffffff83258058 D arp_maxtries -ffffffff83259000 D ipport_firstauto -ffffffff83259004 D ipport_lastauto -ffffffff83259008 D ipport_hifirstauto -ffffffff8325900c D ipport_hilastauto -ffffffff8325a000 D divert_sendspace -ffffffff8325a004 D divert_recvspace -ffffffff8325a008 D divbhashsize -ffffffff8325b000 D icmptstamprepl -ffffffff8325b004 D icmperrppslim -ffffffff8325b008 D icmp_redirtimeout -ffffffff8325c000 D ipsendredirects -ffffffff8325c004 D ip_defttl -ffffffff8325c008 D ip_mtudisc -ffffffff8325c00c D ip_mtudisc_timeout -ffffffff8325c010 D ipq_mutex -ffffffff8325c020 D ip_maxqueue -ffffffff8325c028 D ipintrq -ffffffff8325c060 d ipsend_task -ffffffff8325c090 d ipsendraw_task -ffffffff8325d000 D ip_mrtproto -ffffffff8325d004 d sin -ffffffff8325e000 D rip_sendspace -ffffffff8325e008 D rip_recvspace -ffffffff8325f000 D tcprexmtthresh -ffffffff8325f004 D tcptv_keep_init -ffffffff8325f008 D tcp_rst_ppslim -ffffffff8325f00c D tcp_ackdrop_ppslim -ffffffff8325f010 D tcp_syn_hash_size -ffffffff8325f014 D tcp_syn_cache_limit -ffffffff8325f018 D tcp_syn_bucket_limit -ffffffff8325f01c D tcp_syn_use_limit -ffffffff8325f020 D syn_cache_mtx -ffffffff83260000 D tcp_outflags -ffffffff83261000 D tcp_timer_mtx -ffffffff83261010 D tcp_mssdflt -ffffffff83261014 D tcp_rttdflt -ffffffff83261018 D tcp_do_rfc1323 -ffffffff8326101c D tcp_do_sack -ffffffff83261020 D tcp_do_rfc3390 -ffffffff83261024 D tcp_do_tso -ffffffff83261028 D tcp_reass_limit -ffffffff8326102c D tcp_sackhole_limit -ffffffff83262000 D tcp_backoff -ffffffff83262034 D tcp_totbackoff -ffffffff83263000 D tcp_sendspace -ffffffff83263004 D tcp_recvspace -ffffffff83263008 D tcp_autorcvbuf_inc -ffffffff83264000 D udpcksum -ffffffff83264004 D udp_sendspace -ffffffff83264008 D udp_recvspace -ffffffff83265000 D ipsec_flows_mtx -ffffffff83265010 D ipsec_ids_idle -ffffffff83265014 D ipsec_ids_next_flow -ffffffff83265018 D ipsec_policy_head -ffffffff83265028 D ipsp_ids_gc_timeout -ffffffff83265070 D tdb_sadb_mtx -ffffffff83265080 d tdb_hashmask -ffffffff83266000 D ipo_tdb_mtx -ffffffff83266010 D ipsec_acquire_mtx -ffffffff83266020 D ipsec_acquire_head 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pptable_funcs +ffffffff82d70020 r soft_dummy_pp_table +ffffffff82d71000 r smu10_hwmgr_funcs +ffffffff82d72000 r smu7_hwmgr_funcs +ffffffff82d722f8 r smu7_irq_funcs +ffffffff82d72310 r SMU7ThermalPolicy +ffffffff82d73000 r GCCACConfig_Polaris10 +ffffffff82d731b0 r DIDTConfig_Polaris10 +ffffffff82d73a50 r GCCACConfig_Polaris11 +ffffffff82d73c00 r DIDTConfig_Polaris11_Kicker +ffffffff82d744a0 r DIDTConfig_Polaris11 +ffffffff82d74d40 r DIDTConfig_Polaris12 +ffffffff82d755e0 r GCCACConfig_VegaM +ffffffff82d75790 r DIDTConfig_VegaM +ffffffff82d77000 r smu8_hwmgr_funcs +ffffffff82d772f0 r SMU7ThermalPolicy +ffffffff82d78000 r smu9_irq_funcs +ffffffff82d79000 r gpio_tbl_iceland +ffffffff82d79060 r gpio_tbl +ffffffff82d79150 r enable_fb_req_rej_tbl +ffffffff82d791a0 r use_bclk_tbl +ffffffff82d79370 r turn_off_plls_tbl +ffffffff82d79610 r enter_baco_tbl +ffffffff82d79730 r exit_baco_tbl_iceland +ffffffff82d79870 r clean_baco_tbl_iceland +ffffffff82d79890 r exit_baco_tbl +ffffffff82d799b0 r clean_baco_tbl +ffffffff82d7a000 r pre_baco_tbl +ffffffff82d7a090 r enter_baco_tbl +ffffffff82d7a2b0 r exit_baco_tbl +ffffffff82d7a520 r clean_baco_tbl +ffffffff82d7b000 r vega10_hwmgr_funcs +ffffffff82d7b2f0 r channel_number +ffffffff82d7b320 r SMU7ThermalWithDelayPolicy +ffffffff82d7c000 r SEDiDtStallCtrlConfig_vega10 +ffffffff82d7c110 r SEDiDtStallPatternConfig_vega10 +ffffffff82d7c2e0 r SEDiDtWeightConfig_Vega10 +ffffffff82d7c3b0 r SEDiDtCtrl1Config_Vega10 +ffffffff82d7c440 r SEDiDtCtrl2Config_Vega10 +ffffffff82d7c510 r SEDiDtCtrl3Config_vega10 +ffffffff82d7c820 r SEDiDtTuningCtrlConfig_Vega10 +ffffffff82d7c8b0 r SELCacConfig_Vega10 +ffffffff82d7ca40 r SEDiDtCtrl0Config_Vega10 +ffffffff82d7cd10 r AvfsPSMInitConfig_vega10 +ffffffff82d7cd90 r SEEDCStallPatternConfig_Vega10 +ffffffff82d7cea0 r SEEDCStallDelayConfig_Vega10 +ffffffff82d7cf80 r SEEDCCtrlConfig_Vega10 +ffffffff82d7d040 r PSMSEEDCStallPatternConfig_Vega10 +ffffffff82d7d0c0 r PSMSEEDCStallDelayConfig_Vega10 +ffffffff82d7d1d0 r PSMSEEDCCtrlResetConfig_Vega10 +ffffffff82d7d290 r PSMSEEDCCtrlConfig_Vega10 +ffffffff82d7d350 r SEEDCForceStallPatternConfig_Vega10 +ffffffff82d7d3e0 r SEEDCCtrlForceStallConfig_Vega10 +ffffffff82d7e000 R vega10_pptable_funcs +ffffffff82d7f000 r pre_baco_tbl +ffffffff82d7f090 r enter_baco_tbl +ffffffff82d7f2b0 r exit_baco_tbl +ffffffff82d7f520 r clean_baco_tbl +ffffffff82d80000 r vega12_hwmgr_funcs +ffffffff82d802f0 r SMU7ThermalWithDelayPolicy +ffffffff82d80340 r link_width +ffffffff82d81000 R vega12_pptable_funcs +ffffffff82d82000 r clean_baco_tbl +ffffffff82d83000 r vega20_hwmgr_funcs +ffffffff82d832f0 r SMU7ThermalWithDelayPolicy +ffffffff82d83340 r link_width +ffffffff82d84000 R vega20_pptable_funcs +ffffffff82d85000 R ci_smu_funcs +ffffffff82d850e0 r defaults_hawaii_pro +ffffffff82d8512c r defaults_hawaii_xt +ffffffff82d85178 r defaults_saturn_xt +ffffffff82d851c4 r defaults_bonaire_xt +ffffffff82d85210 r ci_program_jump_on_start.data +ffffffff82d86000 R fiji_smu_funcs +ffffffff82d860e0 r avfs_graphics_level +ffffffff82d86240 r fiji_power_tune_data_set_array +ffffffff82d86246 r fiji_clock_stretch_amount_conversion +ffffffff82d86260 r fiji_clock_stretcher_ddt_table +ffffffff82d87000 R iceland_smu_funcs +ffffffff82d870e0 r defaults_icelandxt +ffffffff82d8712c r defaults_icelandpro +ffffffff82d87178 r defaults_iceland +ffffffff82d88000 R polaris10_smu_funcs +ffffffff82d880e0 r avfs_graphics_level_polaris10 +ffffffff82d882a0 r avfs_memory_level_polaris10 +ffffffff82d882c0 r polaris10_power_tune_data_set_array +ffffffff82d88310 r Range_Table +ffffffff82d89000 R smu10_smu_funcs +ffffffff82d8a000 r smu7_program_jump_on_start.data +ffffffff82d8a010 r pwr_virus_table_pre +ffffffff82d8a680 r pwr_virus_table_post +ffffffff82d8af80 r pwr_virus_section1 +ffffffff82d8b610 r pwr_virus_section2 +ffffffff82d8b660 r pwr_virus_section3 +ffffffff82d92ab0 r pwr_virus_section4 +ffffffff82d92e80 r pwr_virus_section5 +ffffffff82d93490 r pwr_virus_section6 +ffffffff82d95000 R smu8_smu_funcs +ffffffff82d96000 R tonga_smu_funcs +ffffffff82d960e0 r tonga_power_tune_data_set_array +ffffffff82d9612c r tonga_clock_stretch_amount_conversion +ffffffff82d96140 r tonga_clock_stretcher_ddt_table +ffffffff82d97000 R vega10_smu_funcs +ffffffff82d98000 R vega12_smu_funcs +ffffffff82d99000 R vega20_smu_funcs +ffffffff82d9a000 R vegam_smu_funcs +ffffffff82d9a0e0 r vegam_power_tune_data_set_array +ffffffff82d9a130 r Range_Table +ffffffff82d9b000 R smu_ip_funcs +ffffffff82d9b0a0 R smu_v11_0_ip_block +ffffffff82d9b0b8 R smu_v12_0_ip_block +ffffffff82d9b0d0 R smu_v13_0_ip_block +ffffffff82d9b0e8 r swsmu_pm_funcs +ffffffff82d9c000 r arcturus_ppt_funcs +ffffffff82d9c3f0 r arcturus_table_map +ffffffff82d9c470 r arcturus_pwr_src_map +ffffffff82d9c480 r arcturus_workload_map +ffffffff82d9c4d0 r smu11_thermal_policy +ffffffff82d9c528 r arcturus_i2c_algo +ffffffff82d9c538 r arcturus_i2c_control_quirks +ffffffff82d9c550 r arcturus_throttler_map +ffffffff82d9c570 r arcturus_message_map +ffffffff82d9cff0 r arcturus_clk_map +ffffffff82d9d0b0 r arcturus_feature_mask_map +ffffffff82d9e000 r cyan_skillfish_ppt_funcs +ffffffff82d9f000 r navi10_ppt_funcs +ffffffff82d9f3f0 r smu11_thermal_policy +ffffffff82d9f448 r navi10_i2c_algo +ffffffff82d9f458 r navi10_i2c_control_quirks +ffffffff82d9f470 r navi1x_throttler_map +ffffffff82d9f490 r NoDbiPrbs7 +ffffffff82da0490 r DbiPrbs7 +ffffffff82da2000 r sienna_cichlid_ppt_funcs +ffffffff82da23f0 r smu11_thermal_policy +ffffffff82da2448 r sienna_cichlid_i2c_algo +ffffffff82da2458 r sienna_cichlid_i2c_control_quirks +ffffffff82da2470 r sienna_cichlid_throttler_map +ffffffff82da3000 r smu_v11_0_irq_funcs +ffffffff82da3010 r link_width +ffffffff82da4000 r vangogh_ppt_funcs +ffffffff82da43e8 r vangogh_throttler_map +ffffffff82da5000 r renoir_ppt_funcs +ffffffff82da53e8 r renoir_throttler_map +ffffffff82da6000 r aldebaran_ppt_funcs +ffffffff82da63f0 r aldebaran_clk_map +ffffffff82da64b0 r aldebaran_table_map +ffffffff82da6530 r smu13_thermal_policy +ffffffff82da6588 r aldebaran_i2c_algo +ffffffff82da6598 r aldebaran_i2c_control_quirks +ffffffff82da65b0 r aldebaran_throttler_map +ffffffff82da65d0 r aldebaran_message_map +ffffffff82da7050 r aldebaran_feature_mask_map +ffffffff82da8000 R pmfw_decoded_link_speed +ffffffff82da8020 R pmfw_decoded_link_width +ffffffff82da8040 r smu_v13_0_irq_funcs +ffffffff82da9000 r smu_v13_0_0_ppt_funcs +ffffffff82da93f0 r smu13_thermal_policy +ffffffff82da9448 r smu_v13_0_0_i2c_algo +ffffffff82da9458 r smu_v13_0_0_i2c_control_quirks +ffffffff82da9470 r smu_v13_0_0_throttler_map +ffffffff82daa000 r smu_v13_0_4_ppt_funcs +ffffffff82dab000 r smu_v13_0_5_ppt_funcs +ffffffff82dac000 r smu_v13_0_6_ppt_funcs +ffffffff82dac3f0 r smu_v13_0_6_message_map +ffffffff82dace70 r smu_v13_0_6_clk_map +ffffffff82dacf30 r smu_v13_0_6_table_map +ffffffff82dacfb0 r smu_v13_0_6_i2c_algo +ffffffff82dacfc0 r smu_v13_0_6_i2c_control_quirks +ffffffff82dacfd0 r smu_v13_0_6_irq_funcs +ffffffff82dacfe0 r smu_v13_0_6_throttler_map +ffffffff82dacff0 r smu_v13_0_6_feature_mask_map +ffffffff82dae000 r smu_v13_0_7_ppt_funcs +ffffffff82dae3f0 r smu13_thermal_policy +ffffffff82dae450 r smu_v13_0_7_throttler_map +ffffffff82daf000 r yellow_carp_ppt_funcs +ffffffff82db0000 R link_speed +ffffffff82db0020 r __smu_message_names +ffffffff82db1000 R pchb_ca +ffffffff82db2000 R amas_ca +ffffffff82db2028 R amas_devices +ffffffff82db2040 r amas_feature +ffffffff82db3000 R cardslot_ca +ffffffff82db4000 R cardbus_ca +ffffffff82db5000 R com_cardbus_ca +ffffffff82db6000 R xl_cardbus_ca +ffffffff82db6030 R xl_cardbus_products +ffffffff82db7000 R dc_cardbus_ca +ffffffff82db7030 R dc_cardbus_devices +ffffffff82db8000 R fxp_cardbus_ca +ffffffff82db8028 R fxp_cardbus_devices +ffffffff82db9000 R rl_cardbus_devices +ffffffff82db9028 R rl_cardbus_ca +ffffffff82dba000 R re_cardbus_ca +ffffffff82dba028 R re_cardbus_devices +ffffffff82dbb000 R ath_cardbus_ca +ffffffff82dbc000 R athn_cardbus_ca +ffffffff82dbc030 r athn_cardbus_devices +ffffffff82dbd000 R atw_cardbus_ca +ffffffff82dbd028 R atw_cardbus_devices +ffffffff82dbe000 R rtw_cardbus_ca +ffffffff82dbe028 R rtw_cardbus_devices +ffffffff82dbf000 R ral_cardbus_ca +ffffffff82dbf030 r ral_cardbus_devices +ffffffff82dc0000 R acx_cardbus_ca +ffffffff82dc0028 r acx_cardbus_devices +ffffffff82dc1000 R pgt_cardbus_ca +ffffffff82dc1028 R pgt_cardbus_devices +ffffffff82dc2000 R ehci_cardbus_ca +ffffffff82dc3000 R ohci_cardbus_ca +ffffffff82dc4000 R uhci_cardbus_ca +ffffffff82dc5000 R malo_cardbus_ca +ffffffff82dc5028 r malo_cardbus_devices +ffffffff82dc6000 R bwi_cardbus_ca +ffffffff82dc6030 r bwi_cardbus_devices +ffffffff82dc7000 R pcmcia_ca +ffffffff82dc8000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82dc9000 r pcmcia_cis_quirks +ffffffff82dca000 R ep_pcmcia_ca +ffffffff82dcb000 R ne_pcmcia_ca +ffffffff82dcb030 R ne2000devs +ffffffff82dcd000 R aic_pcmcia_ca +ffffffff82dce000 R com_pcmcia_ca +ffffffff82dcf000 R wdc_pcmcia_ca +ffffffff82dd0000 R sm_pcmcia_ca +ffffffff82dd1000 R xe_pcmcia_ca +ffffffff82dd2000 R wi_pcmcia_ca +ffffffff82dd2030 r wi_pcmcia_products +ffffffff82dd3000 R malo_pcmcia_ca +ffffffff82dd4000 R an_pcmcia_ca +ffffffff82dd5000 R pcib_ca +ffffffff82dd6000 R amdpcib_ca +ffffffff82dd6028 R amdpcib_devices +ffffffff82dd7000 R tcpcib_ca +ffffffff82dd7028 R tcpcib_devices +ffffffff82dd8000 R aapic_ca +ffffffff82dd9000 R hme_pci_ca +ffffffff82dd9028 r hme_promhdr +ffffffff82dd902a r hme_promdat +ffffffff82dda000 R isa_ca +ffffffff82ddb000 R isadma_ca +ffffffff82ddc000 R fdc_ca +ffffffff82ddd000 R fd_ca +ffffffff82dde000 R com_isa_ca +ffffffff82ddf000 R pckbc_isa_ca +ffffffff82de0000 R vga_isa_ca +ffffffff82de1000 R wdc_isa_ca +ffffffff82de2000 R mpu_midi_hw_if +ffffffff82de3000 R mpu_isa_ca +ffffffff82de4000 R pcppi_ca +ffffffff82de5000 R spkr_ca +ffffffff82de5030 r pitchtab +ffffffff82de6000 R lpt_isa_ca +ffffffff82de7000 R wbsio_ca +ffffffff82de8000 R schsio_ca +ffffffff82de9000 R lm_isa_ca +ffffffff82de9028 R lm_wbsio_ca +ffffffff82dea000 R it_sensors +ffffffff82dea110 R it_vrfact +ffffffff82dea140 R it_fan_regs +ffffffff82dea160 R it_fan_ext_regs +ffffffff82dea178 R it_ca +ffffffff82deb000 R abitkv_sensors +ffffffff82deb200 R abitaa_sensors +ffffffff82deb480 R abitav_sensors +ffffffff82deb700 R abitas_sensors +ffffffff82deb980 R abitax_sensors +ffffffff82debbc0 R abitm4_sensors +ffffffff82debe80 R abitan_sensors +ffffffff82dec120 R abital_sensors +ffffffff82dec3a0 R abitaw_sensors +ffffffff82dec700 R abitni_sensors +ffffffff82dec9a0 R abitat_sensors +ffffffff82deccc0 R abitan2_sensors +ffffffff82decf60 R abitab_sensors +ffffffff82ded220 R abitan3_sensors +ffffffff82ded500 R abitaw2_sensors +ffffffff82ded860 R abitat2_sensors +ffffffff82dedb60 R abitab2_sensors +ffffffff82dedea0 R abitin_sensors +ffffffff82dee1e0 R uguru_ca +ffffffff82def000 R aps_ca +ffffffff82df0000 R wsdisplay_emul_ca +ffffffff82df0030 r charClass +ffffffff82df1000 r usl_syncops +ffffffff82df2000 R wsevent_filtops +ffffffff82df3000 R wskbd_ca +ffffffff82df4000 r latin1_to_upper +ffffffff82df5000 R wsmouse_ca +ffffffff82df6000 R cyrillic_to_koi8 +ffffffff82df6060 R unicode_to_latin2 +ffffffff82df60e0 R unicode_to_latin7 +ffffffff82df7000 R wsemul_vt100_ops +ffffffff82df8000 r decspcgr2uni +ffffffff82df8100 r dectech2uni +ffffffff82df8200 r nrctable +ffffffff82df9000 r vt100_fkeys +ffffffff82df90c0 r vt100_pfkeys +ffffffff82df90e0 r vt100_numpad +ffffffff82dfa000 R pckbd_ca +ffffffff82dfa028 R pckbd_accessops +ffffffff82dfa040 R pckbd_consops +ffffffff82dfa060 R pckbd_keymapdata +ffffffff82dfa070 R pckbd_xtbl2 +ffffffff82dfa100 R pckbd_xtbl2_ext +ffffffff82dfb000 r pckbd_keydesc_us +ffffffff82dfb250 r pckbd_keydesc_de +ffffffff82dfb2f0 r pckbd_keydesc_de_nodead +ffffffff82dfb310 r pckbd_keydesc_fr +ffffffff82dfb3d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82dfb510 r pckbd_keydesc_dk +ffffffff82dfb5a0 r pckbd_keydesc_dk_nodead +ffffffff82dfb5b0 r pckbd_keydesc_it +ffffffff82dfb640 r pckbd_keydesc_uk +ffffffff82dfb6e0 r pckbd_keydesc_jp +ffffffff82dfb750 r pckbd_keydesc_sv +ffffffff82dfb780 r pckbd_keydesc_sv_nodead +ffffffff82dfb790 r pckbd_keydesc_no +ffffffff82dfb7c0 r pckbd_keydesc_no_nodead +ffffffff82dfb7d0 r pckbd_keydesc_us_declk +ffffffff82dfb860 r pckbd_keydesc_us_dvorak +ffffffff82dfb900 r pckbd_keydesc_us_colemak +ffffffff82dfb948 r pckbd_keydesc_swapctrlcaps +ffffffff82dfb960 r pckbd_keydesc_iopener +ffffffff82dfb9b0 r pckbd_keydesc_es +ffffffff82dfba50 r pckbd_keydesc_be +ffffffff82dfbb10 r pckbd_keydesc_ru +ffffffff82dfbc80 r pckbd_keydesc_ua +ffffffff82dfbe10 r pckbd_keydesc_sg +ffffffff82dfbec0 r pckbd_keydesc_sg_nodead +ffffffff82dfbee0 r pckbd_keydesc_sf +ffffffff82dfbf00 r pckbd_keydesc_pt +ffffffff82dfbf90 r pckbd_keydesc_lt +ffffffff82dfc070 r pckbd_keydesc_la +ffffffff82dfc100 r pckbd_keydesc_br +ffffffff82dfc180 r pckbd_keydesc_tr +ffffffff82dfc230 r pckbd_keydesc_tr_nodead +ffffffff82dfc250 r pckbd_keydesc_pl +ffffffff82dfc2b0 r pckbd_keydesc_hu +ffffffff82dfc3c0 r pckbd_keydesc_si +ffffffff82dfc4d0 r pckbd_keydesc_cf +ffffffff82dfc5a0 r pckbd_keydesc_cf_nodead +ffffffff82dfc5c0 r pckbd_keydesc_lv +ffffffff82dfc640 r pckbd_keydesc_nl +ffffffff82dfc720 r pckbd_keydesc_nl_nodead +ffffffff82dfc740 r pckbd_keydesc_is +ffffffff82dfc7cc r pckbd_keydesc_is_nodead +ffffffff82dfc7e0 r pckbd_keydesc_ee +ffffffff82dfc890 r pckbd_keydesc_ee_nodead +ffffffff82dfc8b0 R pckbd_keydesctab +ffffffff82dfd000 R pms_ca +ffffffff82dfd028 R pms_accessops +ffffffff82dfd040 R pms_sec_accessops +ffffffff82dfd060 R pms_protocols +ffffffff82dfd1e0 r alps_models +ffffffff82dfe000 R skgpio_led_offset +ffffffff82dfe008 R skgpio_ca +ffffffff82dff000 R hidkbd_trtab +ffffffff82dff100 r apple_fn_trans +ffffffff82dff120 r apple_tb_trans +ffffffff82dff140 r apple_mba_trans +ffffffff82e00000 r hidcc_attach_wskbd.accessops +ffffffff82e00020 r hidcc_keysyms +ffffffff82e01000 R usb_ca +ffffffff82e02000 R usb_known_products +ffffffff82e0df90 R usb_known_vendors +ffffffff82e107b0 R usbd_error_strs +ffffffff82e11000 R usb_quirks +ffffffff82e11390 R usb_dev_quirks +ffffffff82e11398 R usbd_no_quirk +ffffffff82e12000 R uhub_ca +ffffffff82e12028 R uhub_uhub_ca +ffffffff82e13000 R uaudio_ca +ffffffff82e13028 R uaudio_hw_if +ffffffff82e130e0 R uaudio_rates +ffffffff82e13120 r uaudio_clkname.names +ffffffff82e13140 r uaudio_feature_addent.features +ffffffff82e14000 R uvideo_ca +ffffffff82e14028 R uvideo_hw_if +ffffffff82e14100 R uvideo_devs +ffffffff82e15000 r utvfu_select_norm.pal +ffffffff82e15040 r utvfu_select_norm.ntsc +ffffffff82e15080 r utvfu_setup_capture.setup +ffffffff82e15180 r utvfu_audio_start_chip.setup +ffffffff82e151c8 r utvfu_audio_stop_chip.setup +ffffffff82e151d8 R utvfu_ca +ffffffff82e15200 R utvfu_vid_hw_if +ffffffff82e152d0 R utvfu_au_hw_if +ffffffff82e16000 R udl_ca +ffffffff82e16030 r udl_devs +ffffffff82e160b0 r udl_modes +ffffffff82e17000 R umidi_hw_if +ffffffff82e17030 R umidi_ca +ffffffff82e17060 r umidi_evlen +ffffffff82e17080 r packet_length +ffffffff82e18000 r quirk_name +ffffffff82e19000 R ucom_ca +ffffffff82e1a000 R ugen_ca +ffffffff82e1a028 R ugenread_intr_filtops +ffffffff82e1a058 R ugenread_isoc_filtops +ffffffff82e1b000 R uhidev_ca +ffffffff82e1b030 r uhid_graphire_report_descr +ffffffff82e1b0b0 r uhid_graphire3_4x5_report_descr +ffffffff82e1b160 r uhid_xb360gp_report_descr +ffffffff82e1b210 r uhid_xbonegp_report_descr +ffffffff82e1c000 R uhid_ca +ffffffff82e1c028 R uhidread_filtops +ffffffff82e1d000 R fido_ca +ffffffff82e1e000 R ujoy_ca +ffffffff82e1f000 r ukbd_keydesc_us +ffffffff82e1f2a0 r ukbd_keydesc_de +ffffffff82e1f350 r ukbd_keydesc_de_nodead +ffffffff82e1f370 r ukbd_keydesc_fr +ffffffff82e1f430 r ukbd_keydesc_fr_apple +ffffffff82e1f570 r ukbd_keydesc_fr_dvorak_bepo +ffffffff82e1f6b0 r ukbd_keydesc_dk +ffffffff82e1f750 r ukbd_keydesc_dk_nodead +ffffffff82e1f760 r ukbd_keydesc_it +ffffffff82e1f800 r ukbd_keydesc_uk +ffffffff82e1f8b0 r ukbd_keydesc_jp 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uslhcom_ca +ffffffff82e27068 r uslhcom_devs +ffffffff82e28000 R ulpt_ca +ffffffff82e29000 R umass_ca +ffffffff82e29028 R umass_bbb_methods +ffffffff82e29040 R umass_cbi_methods +ffffffff82e2a000 R umass_quirks +ffffffff82e2b000 R umass_scsi_switch +ffffffff82e2c000 R uthum_devs +ffffffff82e2c008 R uthum_ca +ffffffff82e2c030 r uthum_sensor_type_s +ffffffff82e2d000 R ugold_devs +ffffffff82e2d018 R ugold_ca +ffffffff82e2e000 R utrh_devs +ffffffff82e2e008 R utrh_ca +ffffffff82e2f000 R uoakrh_devs +ffffffff82e2f008 R uoakrh_ca +ffffffff82e2f030 R uoakrh_methods +ffffffff82e30000 R uoaklux_devs +ffffffff82e30008 R uoaklux_ca +ffffffff82e30030 R uoaklux_methods +ffffffff82e31000 R uoakv_devs +ffffffff82e31008 R uoakv_ca +ffffffff82e31030 R uoakv_methods +ffffffff82e32000 R uonerng_ca +ffffffff82e33000 R urng_ca +ffffffff82e33030 r urng_devs +ffffffff82e34000 R udcf_ca +ffffffff82e34028 r udcf_devs +ffffffff82e35000 R umbg_ca +ffffffff82e36000 R uvisor_methods +ffffffff82e36040 R uvisor_ca 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umodem_methods +ffffffff82e49040 R umodem_ca +ffffffff82e4a000 R uftdi_methods +ffffffff82e4a040 R uftdi_ca +ffffffff82e4a070 r uftdi_devs +ffffffff82e4b000 R uplcom_methods +ffffffff82e4b040 R uplcom_ca +ffffffff82e4b070 r uplcom_devs +ffffffff82e4c000 R umct_methods +ffffffff82e4c040 R umct_ca +ffffffff82e4c070 r umct_devs +ffffffff82e4d000 R uvscom_methods +ffffffff82e4d040 R uvscom_ca +ffffffff82e4d070 r uvscom_devs +ffffffff82e4e000 R ubsa_methods +ffffffff82e4e040 R ubsa_devs +ffffffff82e4e060 R ubsa_ca +ffffffff82e4f000 R ukspan_ca +ffffffff82e4f028 r ukspan_devs +ffffffff82e4f030 r ukspan_methods +ffffffff82e50000 R uslcom_methods +ffffffff82e50040 R uslcom_ca +ffffffff82e50070 r uslcom_devs +ffffffff82e51000 R uark_methods +ffffffff82e51040 R uark_ca +ffffffff82e51068 r uark_devs +ffffffff82e52000 R moscom_methods +ffffffff82e52040 R moscom_ca +ffffffff82e52068 r moscom_devs +ffffffff82e53000 R umcs_methods +ffffffff82e53040 R umcs_devs +ffffffff82e53050 R umcs_ca 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zyd_gct_init.phyini +ffffffff82e629b0 r zyd_gct_init.rfini +ffffffff82e62a50 r zyd_gct_set_channel.rfprog +ffffffff82e62a90 r zyd_maxim_set_channel.phyini +ffffffff82e62ba0 r zyd_maxim_set_channel.rfini +ffffffff82e62be0 r zyd_maxim_set_channel.rfprog +ffffffff82e62c50 r zyd_maxim2_set_channel.phyini +ffffffff82e62d70 r zyd_maxim2_set_channel.rfini +ffffffff82e62db0 r zyd_maxim2_set_channel.rfprog +ffffffff82e62e20 r zyd_rf_name.zyd_rfs +ffffffff82e62ea0 r zyd_def_phyB +ffffffff82e630d0 r zyd_def_phy +ffffffff82e64000 R upgt_ca +ffffffff82e64028 r upgt_devs_1 +ffffffff82e64030 r upgt_devs_2 +ffffffff82e65000 R urtw_ca +ffffffff82e65030 r urtw_devs +ffffffff82e65090 r urtw_ratetable +ffffffff82e650f0 r urtw_8225_gain +ffffffff82e65110 r urtw_8225_txpwr_cck_ch14 +ffffffff82e65140 r urtw_8225_txpwr_cck +ffffffff82e65170 r urtw_8225_tx_gain_cck_ofdm +ffffffff82e65176 r urtw_8225_txpwr_ofdm +ffffffff82e65180 r urtw_8225_rf_part1 +ffffffff82e65200 r urtw_8225_rxgain +ffffffff82e652c0 r urtw_8225_agc +ffffffff82e65340 r urtw_8225_rf_part2 +ffffffff82e65470 r urtw_8225_rf_part3 +ffffffff82e65550 r urtw_8225_channel +ffffffff82e6558c r urtw_8225_threshold +ffffffff82e655a0 r urtw_8225v2_gain_bg +ffffffff82e655c0 r urtw_8225v2_tx_gain_cck_ofdm +ffffffff82e655f0 r urtw_8225v2_rf_part1 +ffffffff82e65670 r urtw_8225v2_rxgain +ffffffff82e65730 r urtw_8225v2_rf_part2 +ffffffff82e65870 r urtw_8225v2_rf_part3 +ffffffff82e65970 r urtw_8187b_regtbl +ffffffff82e65a90 r urtw_8225v2_b_rf +ffffffff82e65b20 r urtw_8225v2_agc +ffffffff82e65ba0 r urtw_8225v2_ofdm +ffffffff82e66000 R urtwn_ca +ffffffff82e66030 r urtwn_devs +ffffffff82e66340 r rtl8188eu_mac +ffffffff82e664b0 r rtl8188ftv_mac +ffffffff82e66650 r rtl8192eu_mac +ffffffff82e667f0 r rtl8192cu_mac +ffffffff82e66948 r rtl8188eu_bb_prog +ffffffff82e66970 r rtl8188ftv_bb_prog +ffffffff82e66998 r rtl8192eu_bb_prog +ffffffff82e669c0 r rtl8188ce_bb_prog +ffffffff82e669e8 r rtl8188ru_bb_prog +ffffffff82e66a10 r rtl8188cu_bb_prog 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rsu_qid2idx_11ep +ffffffff82e6a0ee r r92s_epaddr +ffffffff82e6b000 R otus_ca +ffffffff82e6b030 r otus_devs +ffffffff82e6b090 r ar_chans +ffffffff82e6b0c0 r otus_rates +ffffffff82e6b0e0 r ar5416_phy_regs +ffffffff82e6b380 r ar5416_phy_vals_2ghz_20mhz +ffffffff82e6b8b0 r ar5416_phy_vals_5ghz_20mhz +ffffffff82e6bde0 r ar5416_banks_vals_5ghz +ffffffff82e6bef0 r ar5416_banks_vals_2ghz +ffffffff82e6c000 r ar5416_banks_regs +ffffffff82e6d000 R umb_regstates +ffffffff82e6d080 R umb_dataclasses +ffffffff82e6d190 R umb_simstate +ffffffff82e6d210 R umb_messages +ffffffff82e6d2b0 R umb_status +ffffffff82e6d570 R umb_cids +ffffffff82e6d6e0 R umb_pktstate +ffffffff82e6d740 R umb_actstate +ffffffff82e6d7a0 R umb_error +ffffffff82e6d830 R umb_pintype +ffffffff82e6d960 R umb_istate +ffffffff82e6d9f0 R umb_ca +ffffffff82e6da20 R umb_quirks +ffffffff82e6e000 R uath_ca +ffffffff82e6e030 r uath_devs +ffffffff82e6f000 R athn_usb_ca +ffffffff82e6f030 r athn_usb_devs +ffffffff82e70000 R uow_ca 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pool_gc_task +ffffffff83222000 D kprintf_mutex +ffffffff83222010 D db_panic +ffffffff83222014 D splassert_ctl +ffffffff83222018 D v_putc +ffffffff83222020 D printf_flags +ffffffff83223000 D userconf_base +ffffffff83223004 D userconf_maxdev +ffffffff83223008 D userconf_totdev +ffffffff8322300c D userconf_maxlocnames +ffffffff83223010 D userconf_cnt +ffffffff83223014 D userconf_lines +ffffffff83223018 D userconf_histsz +ffffffff83223020 D userconf_cmds +ffffffff83224000 D ftlock +ffffffff83225000 d ppollcollect.poll_errintvl +ffffffff83226000 D ttydefchars +ffffffff83226014 D ttclos +ffffffff8322601b D ttopen +ffffffff83226022 D ttybg +ffffffff83226028 D ttyin +ffffffff8322602e D ttyout +ffffffff83226038 D ttylist_lock +ffffffff83227000 D linesw +ffffffff83227280 D nlinesw +ffffffff83228000 D pt_softc_lock +ffffffff83229000 d mbstat_boot_boot_cpumem +ffffffff83229080 D mbstat +ffffffff83229090 D mclsizes +ffffffff832290b0 D m_extref_mtx +ffffffff832290c0 D m_pool_allocator +ffffffff8322a000 D somaxconn +ffffffff8322a004 D sominconn +ffffffff8322a008 D sosplice_lock +ffffffff8322b000 D sb_max +ffffffff8322c000 D unp_df_lock +ffffffff8322c010 D unp_gc_lock +ffffffff8322c020 D unp_rights_mtx +ffffffff8322c030 D unp_ino_mtx +ffffffff8322c040 D unp_gc_task +ffffffff8322c070 D unpst_sendspace +ffffffff8322c074 D unpst_recvspace +ffffffff8322c078 D unpsq_sendspace +ffffffff8322c07c D unpsq_recvspace +ffffffff8322c080 D unpdg_sendspace +ffffffff8322c084 D unpdg_recvspace +ffffffff8322d000 D doingcache +ffffffff8322e000 D maxvfsconf +ffffffff8322e010 d vfsconflist +ffffffff8322f000 D lockf_lock +ffffffff8322f010 D maxlocksperuid +ffffffff83230000 D iftovt_tab +ffffffff83230040 D vttoif_tab +ffffffff83230064 D suid_clear +ffffffff83230068 D vnode_mtx +ffffffff83230078 D vfs_stall_lock +ffffffff83230090 D vtypes +ffffffff832300e0 D vtags +ffffffff83231000 D syncer_maxdelay +ffffffff83231004 D syncdelay +ffffffff83232000 D dosdirtemplate +ffffffff83233000 D ntfs_hashlock +ffffffff83234000 D ntfs_toupper_lock +ffffffff83235000 D art_table_gc_mtx +ffffffff83235010 D art_table_gc_task +ffffffff83235040 D art_node_gc_mtx +ffffffff83235050 D art_node_gc_task +ffffffff83236000 D bpf_bufsize +ffffffff83236004 D bpf_maxbufsize +ffffffff83236008 D bpf_sysctl_lk +ffffffff83237000 D ifg_head +ffffffff83237010 D if_cloners_lock +ffffffff83237020 D if_input_task_locked +ffffffff83237050 D netlock +ffffffff83237060 D ifnetlist +ffffffff83238000 D ifiq_maxlen_drop +ffffffff83238004 D ifiq_maxlen_return +ffffffff83239000 D etherbroadcastaddr +ffffffff83239006 D ether_ipmulticast_min +ffffffff8323900c D ether_ipmulticast_max +ffffffff83239012 D ether_ip6multicast_min +ffffffff83239018 D ether_ip6multicast_max +ffffffff8323a000 D etherip_cloner +ffffffff8323a030 D etherip_list +ffffffff8323b000 D loop_cloner +ffffffff8323c000 D ifmedia_mtx +ffffffff8323d000 D ppp_compressors +ffffffff8323d020 D ppp_cloner +ffffffff8323e000 D ppp_pkt_init +ffffffff8323f000 D ppp_bsd_compress +ffffffff83240000 D ppp_deflate +ffffffff83240070 D ppp_deflate_draft +ffffffff83241000 D tun_cloner +ffffffff83241030 D tap_cloner +ffffffff83242000 D bridgeintrq +ffffffff83242038 D bridge_cloner +ffffffff83243000 d veb_cloner +ffffffff83243030 d vport_cloner +ffffffff83244000 D vlan_tagh_lk +ffffffff83244010 D vlan_cloner +ffffffff83244040 D svlan_cloner +ffffffff83245000 D pipex_list_mtx +ffffffff83245010 D pipex_prune +ffffffff83245018 D pipexoutq +ffffffff83245050 d SHAPad2 +ffffffff83246000 D rtmap_gc +ffffffff83246018 D rt_rc +ffffffff83247000 D rt_labels +ffffffff83247010 D rtlabel_mtx +ffffffff83248000 D enc_cloner +ffffffff83249000 D gre_cloner +ffffffff83249030 D gre_list +ffffffff83249040 D mgre_cloner +ffffffff83249070 D egre_cloner +ffffffff832490a0 D nvgre_cloner +ffffffff832490d0 D eoip_cloner +ffffffff8324a000 D trunk_cloner +ffffffff8324b000 d aggr_cloner +ffffffff8324c000 d tpmr_cloner +ffffffff8324d000 D mpe_cloner +ffffffff8324e000 D mpw_cloner +ffffffff8324f000 D mpip_cloner +ffffffff83250000 d bpe_cloner +ffffffff83250030 d bpe_lock +ffffffff83251000 D vether_cloner +ffffffff83252000 D pair_cloner +ffffffff83253000 d vxlan_cloner +ffffffff83253030 d vxlan_lock +ffffffff83253040 d vxlan_teps +ffffffff83254000 D underload_interval +ffffffff83254010 D wg_cloner +ffffffff83255000 d stoeplitz_keyseed +ffffffff83256000 D ieee80211_cache_size +ffffffff83257000 D arpt_prune +ffffffff83257004 D arpt_keep +ffffffff83257008 D arpt_down +ffffffff83257010 D arpinq +ffffffff83257048 D arp_mtx +ffffffff83257058 D arp_maxtries +ffffffff83258000 D ipport_firstauto +ffffffff83258004 D ipport_lastauto +ffffffff83258008 D ipport_hifirstauto +ffffffff8325800c D ipport_hilastauto +ffffffff83259000 D divert_sendspace +ffffffff83259004 D divert_recvspace +ffffffff83259008 D divbhashsize +ffffffff8325a000 D icmptstamprepl +ffffffff8325a004 D icmperrppslim +ffffffff8325a008 D icmp_redirtimeout +ffffffff8325b000 D ipsendredirects +ffffffff8325b004 D ip_defttl +ffffffff8325b008 D ip_mtudisc +ffffffff8325b00c D ip_mtudisc_timeout +ffffffff8325b010 D ipq_mutex +ffffffff8325b020 D ip_maxqueue +ffffffff8325b028 D ipintrq +ffffffff8325b060 d ipsend_task +ffffffff8325b090 d ipsendraw_task +ffffffff8325c000 D ip_mrtproto +ffffffff8325c004 d sin +ffffffff8325d000 D rip_sendspace +ffffffff8325d008 D rip_recvspace +ffffffff8325e000 D tcprexmtthresh +ffffffff8325e004 D tcptv_keep_init +ffffffff8325e008 D tcp_rst_ppslim +ffffffff8325e00c D tcp_ackdrop_ppslim +ffffffff8325e010 D tcp_syn_hash_size +ffffffff8325e014 D tcp_syn_cache_limit +ffffffff8325e018 D tcp_syn_bucket_limit +ffffffff8325e01c D tcp_syn_use_limit +ffffffff8325e020 D syn_cache_mtx +ffffffff8325f000 D tcp_outflags +ffffffff83260000 D tcp_timer_mtx +ffffffff83260010 D tcp_mssdflt +ffffffff83260014 D tcp_rttdflt +ffffffff83260018 D tcp_do_rfc1323 +ffffffff8326001c D tcp_do_sack +ffffffff83260020 D tcp_do_rfc3390 +ffffffff83260024 D tcp_do_tso +ffffffff83260028 D tcp_reass_limit +ffffffff8326002c D tcp_sackhole_limit +ffffffff83261000 D tcp_backoff +ffffffff83261034 D tcp_totbackoff +ffffffff83262000 D tcp_sendspace +ffffffff83262004 D tcp_recvspace +ffffffff83262008 D tcp_autorcvbuf_inc +ffffffff83263000 D udpcksum +ffffffff83263004 D udp_sendspace +ffffffff83263008 D udp_recvspace +ffffffff83264000 D ipsec_flows_mtx +ffffffff83264010 D ipsec_ids_idle +ffffffff83264014 D ipsec_ids_next_flow +ffffffff83264018 D ipsec_policy_head +ffffffff83264028 D ipsp_ids_gc_timeout +ffffffff83264070 D tdb_sadb_mtx +ffffffff83264080 d tdb_hashmask +ffffffff83265000 D ipo_tdb_mtx +ffffffff83265010 D ipsec_acquire_mtx +ffffffff83265020 D ipsec_acquire_head +ffffffff83266000 D ipsec_keep_invalid +ffffffff83266004 D ipsec_require_pfs +ffffffff83266008 D ipsec_soft_timeout +ffffffff8326600c D ipsec_exp_timeout +ffffffff83266010 D ipsec_soft_first_use +ffffffff83266014 D ipsec_exp_first_use +ffffffff83266018 D ipsec_expire_acquire +ffffffff8326601c D esp_enable +ffffffff83266020 D ah_enable +ffffffff83267000 D udpencap_enable +ffffffff83267004 D udpencap_port +ffffffff83268000 D carp_vh_rc +ffffffff83268020 D carp_sc_rc +ffffffff83268040 D carp_opts +ffffffff83268058 D carp_cloner +ffffffff83268088 d carp_send_na.mcast +ffffffff83269000 d PADDING ffffffff8326a000 d PADDING -ffffffff8326b000 d PADDING -ffffffff8326c000 d weak_keys -ffffffff8326d000 D swcr_id -ffffffff8326e000 D window_inflate -ffffffff8326e004 D window_deflate -ffffffff8326f000 D ghash_update -ffffffff83270000 D mpls_defttl -ffffffff83270004 D mpls_mapttl_ip -ffffffff83271000 D nfskevq_lock -ffffffff83272000 D nfs_backoff -ffffffff83272020 D nfs_ptimers -ffffffff83273000 D desirednfsrvcache -ffffffff83273010 D nonidempotent -ffffffff83273070 D nfsv2_repstat -ffffffff83274000 D nfsv2_type -ffffffff83274030 D nfsv3_type -ffffffff83274060 D nv2tov_type -ffffffff83274080 D nv3tov_type -ffffffff832740a0 D nfsv3_procid -ffffffff83274100 D nfsv2_procid -ffffffff8327415c d nfsv3err_getattr -ffffffff83274170 d nfsv3err_setattr -ffffffff83274190 d nfsv3err_lookup -ffffffff832741a4 d nfsv3err_access -ffffffff832741b0 d nfsv3err_readlink -ffffffff832741d0 d nfsv3err_read -ffffffff832741f0 d nfsv3err_write -ffffffff83274210 d nfsv3err_create -ffffffff83274230 d nfsv3err_mkdir -ffffffff83274250 d nfsv3err_symlink -ffffffff83274270 d nfsv3err_mknod -ffffffff83274290 d nfsv3err_remove -ffffffff832742b0 d nfsv3err_rmdir -ffffffff832742d0 d nfsv3err_rename -ffffffff83274300 d nfsv3err_link -ffffffff83274330 d nfsv3err_readdir -ffffffff83274350 d nfsv3err_readdirplus -ffffffff83274366 d nfsv3err_fsstat -ffffffff83274372 d nfsv3err_fsinfo -ffffffff8327437c d nfsv3err_pathconf -ffffffff83274386 d nfsv3err_commit -ffffffff83275000 D nfsrv3_procs -ffffffff832750b8 D nfs_niothreads -ffffffff83276000 D fragtbl -ffffffff83277000 D ffs_vtbl -ffffffff83278000 D dirchk -ffffffff83279000 D desireddquot -ffffffff8327a000 D amap_list_lock -ffffffff8327b000 d uao_list_lock -ffffffff8327c000 d uvmexp_countersboot_boot_cpumem -ffffffff8327c0c0 D uvmexp_counters -ffffffff8327c0c8 D vm_min_kernel_address -ffffffff8327d000 D no_constraint -ffffffff8327e000 d uvm_kmapent_warn_rate -ffffffff8327f000 D maxslp -ffffffff83280000 D uvmpagerops -ffffffff83281000 D uvm_swap_data_lock -ffffffff83281010 D swap_syscall_lock -ffffffff83281020 D oommtx -ffffffff83282000 D uvm_doswapencrypt -ffffffff83283000 D gif_list -ffffffff83283010 D gif_cloner -ffffffff83284000 d sec_cloner -ffffffff83284030 d sec_tdb_gc_mtx -ffffffff83284040 d sec_tdb_gc_task -ffffffff83285000 D divert6_sendspace -ffffffff83285004 D divert6_recvspace -ffffffff83285008 D divb6hashsize -ffffffff83286000 d in6_get_hw_ifid.allone -ffffffff83287000 D ip6_sendredirects -ffffffff83287004 D ip6_defhlim -ffffffff83287008 D ip6_defmcasthlim -ffffffff8328700c D ip6_maxfragpackets -ffffffff83287010 D ip6_maxfrags -ffffffff83287014 D ip6_log_interval -ffffffff83287018 D ip6_hdrnestlimit -ffffffff8328701c D ip6_dad_count -ffffffff83287020 D ip6_auto_flowlabel -ffffffff83287024 D ip6_use_deprecated -ffffffff83287028 D ip6_neighborgcthresh -ffffffff8328702c D ip6_maxdynroutes -ffffffff83287030 D rip6_sendspace -ffffffff83287038 D rip6_recvspace -ffffffff83287040 D icmp6_redirtimeout -ffffffff83287044 D icmp6errppslim -ffffffff83287048 D ip6_mtudisc_timeout -ffffffff83288000 D frag6_mutex -ffffffff83289000 d icmp6_mtudisc_hiwat -ffffffff83289004 d icmp6_mtudisc_lowat -ffffffff8328a000 d randomtab_20 -ffffffff8328b000 D ip6intrq -ffffffff8328b038 d ip6send_task -ffffffff8328c000 D nd6_timer_next -ffffffff8328c008 D nd6_expire_next -ffffffff8328c010 D nd6_delay -ffffffff8328c014 D nd6_umaxtries -ffffffff8328c018 D nd6_mmaxtries -ffffffff8328c01c D nd6_gctimer -ffffffff8328c020 D nd6_maxndopt -ffffffff8328c028 D nd6_mtx -ffffffff8328c038 D nd6_list -ffffffff8328d000 d dadq -ffffffff8328e000 D pfkeyv2_mtx -ffffffff8328e010 d pfkeyv2_seq -ffffffff8328f000 D sadb_exts_allowed_in -ffffffff8328f090 D sadb_exts_required_in -ffffffff83290000 D cold -ffffffff83291000 D bdevsw -ffffffff83291460 D nblkdev -ffffffff83291470 D cdevsw -ffffffff83293400 D nchrdev -ffffffff83293404 D mem_no -ffffffff83293408 D swapdev -ffffffff83293410 D constab -ffffffff83294000 D machine -ffffffff83294008 D cpu_idle_cycle_fcn -ffffffff83294010 D lid_action -ffffffff83294014 D pwr_action -ffffffff83294018 D isa_constraint -ffffffff83294028 D dma_constraint -ffffffff83294040 D uvm_md_constraints -ffffffff83294058 D delay_func -ffffffff83294060 D initclock_func -ffffffff83294068 D startclock_func -ffffffff83294070 D bootinfo_size -ffffffff83294074 D waittime -ffffffff83294078 D dumpmag -ffffffff83295000 D tsc_rdtsc -ffffffff83295008 D tsc_timecounter -ffffffff83295058 D tsc_is_synchronized -ffffffff83296000 D local_apic -ffffffff83296020 D lapic_id -ffffffff83296080 D lapic_tpr -ffffffff832960a0 d lapic_ppr -ffffffff83296100 d lapic_isr -ffffffff83297000 D warn_once -ffffffff83298000 d errata -ffffffff83299000 D cpu_ucode_mtx -ffffffff8329a000 D mem_owner_bios -ffffffff8329a008 D mrops -ffffffff8329a028 D mtrrmask -ffffffff8329a030 D mtrrtomrt -ffffffff8329b000 D pmap_pg_wc -ffffffff8329b008 D pmaps_lock -ffffffff8329b018 d pmap_maxkvaddr -ffffffff8329c000 D kv_physwait -ffffffff8329d000 D fpu_save_len -ffffffff8329e000 D i8259_pic -ffffffff8329f000 D softintr_pic -ffffffff832a0000 D ipifunc -ffffffff832a1000 D setperf_mp_mutex -ffffffff832a2000 D db_Grp6 -ffffffff832a2040 D db_Grp7 -ffffffff832a2100 D db_Grp8 -ffffffff832a2140 D db_Grp9 -ffffffff832a2200 D db_GrpA -ffffffff832a2240 D db_GrpB -ffffffff832a2280 D db_GrpC -ffffffff832a22c0 D db_inst_0f0x -ffffffff832a2440 D db_inst_0f2x -ffffffff832a25c0 D db_inst_0f3x -ffffffff832a2740 D db_inst_0f8x -ffffffff832a28c0 D db_inst_0f9x -ffffffff832a2a40 D db_inst_0fax -ffffffff832a2bc0 D db_inst_0fbx -ffffffff832a2d40 D db_inst_0fcx -ffffffff832a2ec0 D db_inst_0f -ffffffff832a2f40 D db_Esc92 -ffffffff832a2f80 D db_Esc94 -ffffffff832a2fc0 D db_Esc95 -ffffffff832a3000 D db_Esc96 -ffffffff832a3040 D db_Esc97 -ffffffff832a3080 D db_Esca5 -ffffffff832a30c0 D db_Escb4 -ffffffff832a3100 D db_Esce3 -ffffffff832a3140 D db_Escf4 -ffffffff832a3180 D db_Esc8 -ffffffff832a3240 D db_Esc9 -ffffffff832a3300 D db_Esca -ffffffff832a33c0 D db_Escb -ffffffff832a3480 D db_Escc -ffffffff832a3540 D db_Escd -ffffffff832a3600 D db_Esce -ffffffff832a36c0 D db_Escf -ffffffff832a3780 D db_Esc_inst -ffffffff832a37c0 D db_Grp1 -ffffffff832a3800 D db_Grp2 -ffffffff832a3840 D db_Grp3 -ffffffff832a3900 D db_Grp4 -ffffffff832a39c0 D db_Grp5 -ffffffff832a3a80 D db_inst_table -ffffffff832a5280 D db_bad_inst -ffffffff832a52a0 D db_index_reg_16 -ffffffff832a52e0 D db_reg -ffffffff832a54e0 D db_seg_reg -ffffffff832a5520 D db_lengths -ffffffff832a6000 D db_regs -ffffffff832a61e0 D db_eregs -ffffffff832a61f0 D db_reg_args -ffffffff832a7000 D timer_mutex -ffffffff832a7010 d i8254_timecounter -ffffffff832a8000 D spleen8x16 -ffffffff832a8058 D spleen12x24 -ffffffff832a80b0 D spleen16x32 -ffffffff832a8108 D spleen32x64 -ffffffff832a8160 d builtin_fonts -ffffffff832a81e0 d wsfont_add.cookiegen -ffffffff832a81f0 d spleen8x16_data -ffffffff832a8ff0 d spleen12x24_data -ffffffff832ab9f0 d spleen16x32_data -ffffffff832af1f0 d spleen32x64_data -ffffffff832be000 D nsphy_cd -ffffffff832bf000 D nsphyter_cd -ffffffff832c0000 D gentbi_cd -ffffffff832c1000 D qsphy_cd -ffffffff832c2000 D inphy_cd -ffffffff832c3000 D iophy_cd -ffffffff832c4000 D eephy_cd -ffffffff832c5000 D exphy_cd -ffffffff832c6000 D rlphy_cd -ffffffff832c7000 D lxtphy_cd -ffffffff832c8000 D luphy_cd -ffffffff832c9000 D mtdphy_cd -ffffffff832ca000 D icsphy_cd -ffffffff832cb000 D sqphy_cd -ffffffff832cc000 D tqphy_cd -ffffffff832cd000 D ukphy_cd -ffffffff832ce000 D dcphy_cd -ffffffff832cf000 D bmtphy_cd -ffffffff832d0000 D brgphy_cd -ffffffff832d1000 D xmphy_cd -ffffffff832d2000 D amphy_cd -ffffffff832d3000 D acphy_cd -ffffffff832d4000 D nsgphy_cd -ffffffff832d5000 D urlphy_cd -ffffffff832d6000 D rgephy_cd -ffffffff832d7000 D ciphy_cd -ffffffff832d8000 D ipgphy_cd -ffffffff832d9000 D etphy_cd -ffffffff832da000 D jmphy_cd -ffffffff832db000 D atphy_cd -ffffffff832dc000 D scsi_autoconf -ffffffff832dc008 D scsibus_cd -ffffffff832dd000 D cd_cd -ffffffff832de000 D ch_cd -ffffffff832de020 D chquirks -ffffffff832df000 D sd_cd -ffffffff832e0000 D st_cd -ffffffff832e1000 D uk_cd -ffffffff832e2000 D safte_cd -ffffffff832e3000 D ses_cd -ffffffff832e4000 D sym_cd -ffffffff832e4020 D sym_devices -ffffffff832e4070 D asym_devices -ffffffff832e5000 D rdac_cd -ffffffff832e5020 D rdac_devices -ffffffff832e6000 D emc_cd -ffffffff832e6020 D emc_devices -ffffffff832e7000 D hds_cd -ffffffff832e7020 D hds_devices -ffffffff832e8000 D atapiscsi_cd -ffffffff832e9000 D wd_cd -ffffffff832e9020 d wddumpmulti -ffffffff832ea000 D mainbus_cd -ffffffff832ea020 D mba_iba -ffffffff832eb000 D bios_cd -ffffffff832eb020 D smbios_uninfo -ffffffff832ec000 D mpbios_cd -ffffffff832ec020 d mp_conf -ffffffff832ec070 d extint_bus -ffffffff832ec0a0 d smi_bus -ffffffff832ec0d0 d nmi_bus -ffffffff832ed000 D need_retpoline -ffffffff832ee000 D cpu_info_full_primary -ffffffff832f1000 D cpu_info_list -ffffffff832f1008 D mp_cpu_funcs -ffffffff832f1020 D cpu_cd -ffffffff832f1040 D cpu_info -ffffffff832f2000 D local_pic -ffffffff832f2098 D lapic_readreg -ffffffff832f20a0 D lapic_writereg -ffffffff832f20a8 D x86_ipi -ffffffff832f3000 D ioapic_cold -ffffffff832f3008 D ioapic_cd -ffffffff832f4000 D efifb_std_descr -ffffffff832f4030 D efifb_descrs -ffffffff832f4038 D efifb_accessops -ffffffff832f4098 D efifb_cd -ffffffff832f5000 D pvbus_cd -ffffffff832f5020 D pvbus_types -ffffffff832f50e0 D pvbus_dma_tag -ffffffff832f6000 D pvclock_cd -ffffffff832f6020 D pvclock_timecounter -ffffffff832f7000 D vmt_tclo_rpc -ffffffff832f70d0 D vmt_cd -ffffffff832f8000 D xen_cd -ffffffff832f8020 D xen_bus_dma_tag -ffffffff832f9000 D xnf_cd -ffffffff832fa000 D xbf_cd -ffffffff832fb000 D hv_msg_dispatch -ffffffff832fb110 D hv_timecounter -ffffffff832fb160 D hyperv_cd -ffffffff832fc000 d hv_ic_devs -ffffffff832fd000 D hvn_cd -ffffffff832fe000 D hvs_cd -ffffffff832ff000 D virtio_cd -ffffffff83300000 D vio_cd -ffffffff83301000 D vioblk_cd -ffffffff83302000 D viomb_cd -ffffffff83303000 D viornd_cd -ffffffff83304000 D vioscsi_cd -ffffffff83305000 D vmmci_cd -ffffffff83306000 D pci_cd -ffffffff83307000 D arc_fw_hdr -ffffffff83307008 D arc_cd -ffffffff83308000 D jmb_cd -ffffffff83309000 D mfii_cd -ffffffff8330a000 D ips_cd -ffffffff8330b000 D eap_cd -ffffffff8330c000 D auacer_cd -ffffffff8330d000 D auich_cd -ffffffff8330e000 D azalia_cd -ffffffff8330f000 D envy_cd -ffffffff8330f020 D envy_matchids -ffffffff8330f030 D envy_rates -ffffffff8330f0b0 D ak4524_dac -ffffffff8330f0d8 D ak4524_adc -ffffffff8330f100 D ak4358_dac -ffffffff8330f128 D ak5365_adc -ffffffff8330f150 D unkenvy_codec -ffffffff8330f180 D envy_cards -ffffffff8330f3f0 D envy_cards_ht -ffffffff8330f600 d julia_eeprom -ffffffff83310000 D emu_cd -ffffffff83311000 D auixp_cd -ffffffff83312000 D clcs_cd -ffffffff83313000 D yds_cd -ffffffff83314000 D auvia_cd -ffffffff83315000 D qle_cd -ffffffff83316000 D mpii_cd -ffffffff83317000 D aq_cd -ffffffff83318000 D de_cd -ffffffff83319000 D pcn_cd -ffffffff8331a000 D wdc_sii3114_vtbl -ffffffff8331a038 D wdc_pdc203xx_vtbl -ffffffff8331a070 D wdc_svwsata_vtbl -ffffffff8331a0a8 D pciide_cd -ffffffff8331a0d0 d sis_hostbr_type -ffffffff8331b000 D ppb_cd -ffffffff8331c000 D vr_cd -ffffffff8331c020 D vr_devices -ffffffff8331d000 D txp_cd -ffffffff8331e000 D bt848_card_signature -ffffffff8331f000 D bktr_cd -ffffffff83320000 D em_cd -ffffffff83321000 D ixgb_cd -ffffffff83322000 D ix_cd -ffffffff83322020 D ixgbe_smart_speed -ffffffff83322024 D ixgbe_enable_msix -ffffffff83323000 D ixl_cd -ffffffff83323020 d ixl_sff_lock -ffffffff83324000 D xge_cd -ffffffff83325000 D thtc_cd -ffffffff83325020 D tht_cd -ffffffff83325040 D tht_txt_desc -ffffffff83325068 D tht_rxf_desc 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divert6_sendspace +ffffffff83284004 D divert6_recvspace +ffffffff83284008 D divb6hashsize +ffffffff83285000 d in6_get_hw_ifid.allone +ffffffff83286000 D ip6_sendredirects +ffffffff83286004 D ip6_defhlim +ffffffff83286008 D ip6_defmcasthlim +ffffffff8328600c D ip6_maxfragpackets +ffffffff83286010 D ip6_maxfrags +ffffffff83286014 D ip6_log_interval +ffffffff83286018 D ip6_hdrnestlimit +ffffffff8328601c D ip6_dad_count +ffffffff83286020 D ip6_auto_flowlabel +ffffffff83286024 D ip6_use_deprecated +ffffffff83286028 D ip6_neighborgcthresh +ffffffff8328602c D ip6_maxdynroutes +ffffffff83286030 D rip6_sendspace +ffffffff83286038 D rip6_recvspace +ffffffff83286040 D icmp6_redirtimeout +ffffffff83286044 D icmp6errppslim +ffffffff83286048 D ip6_mtudisc_timeout +ffffffff83287000 D frag6_mutex +ffffffff83288000 d icmp6_mtudisc_hiwat +ffffffff83288004 d icmp6_mtudisc_lowat +ffffffff83289000 d randomtab_20 +ffffffff8328a000 D ip6intrq +ffffffff8328a038 d ip6send_task +ffffffff8328b000 D nd6_timer_next +ffffffff8328b008 D nd6_expire_next +ffffffff8328b010 D nd6_delay +ffffffff8328b014 D nd6_umaxtries +ffffffff8328b018 D nd6_mmaxtries +ffffffff8328b01c D nd6_gctimer +ffffffff8328b020 D nd6_maxndopt +ffffffff8328b028 D nd6_mtx +ffffffff8328b038 D nd6_list +ffffffff8328c000 d dadq +ffffffff8328d000 D pfkeyv2_mtx +ffffffff8328d010 d pfkeyv2_seq +ffffffff8328e000 D sadb_exts_allowed_in +ffffffff8328e090 D sadb_exts_required_in +ffffffff8328f000 D cold +ffffffff83290000 D bdevsw +ffffffff83290460 D nblkdev +ffffffff83290470 D cdevsw +ffffffff83292400 D nchrdev +ffffffff83292404 D mem_no +ffffffff83292408 D swapdev +ffffffff83292410 D constab +ffffffff83293000 D machine +ffffffff83293008 D cpu_idle_cycle_fcn +ffffffff83293010 D lid_action +ffffffff83293014 D pwr_action +ffffffff83293018 D isa_constraint +ffffffff83293028 D dma_constraint +ffffffff83293040 D uvm_md_constraints +ffffffff83293058 D delay_func +ffffffff83293060 D initclock_func +ffffffff83293068 D startclock_func +ffffffff83293070 D bootinfo_size +ffffffff83293074 D waittime +ffffffff83293078 D dumpmag +ffffffff83294000 D tsc_rdtsc +ffffffff83294008 D tsc_timecounter +ffffffff83294058 D tsc_is_synchronized +ffffffff83295000 D local_apic +ffffffff83295020 D lapic_id +ffffffff83295080 D lapic_tpr +ffffffff832950a0 d lapic_ppr +ffffffff83295100 d lapic_isr +ffffffff83296000 D warn_once +ffffffff83297000 d errata +ffffffff83298000 D cpu_ucode_mtx +ffffffff83299000 D mem_owner_bios +ffffffff83299008 D mrops +ffffffff83299028 D mtrrmask +ffffffff83299030 D mtrrtomrt +ffffffff8329a000 D pmap_pg_wc +ffffffff8329a008 D pmaps_lock +ffffffff8329a018 d pmap_maxkvaddr +ffffffff8329b000 D kv_physwait +ffffffff8329c000 D fpu_save_len +ffffffff8329d000 D i8259_pic +ffffffff8329e000 D softintr_pic +ffffffff8329f000 D ipifunc +ffffffff832a0000 D setperf_mp_mutex +ffffffff832a1000 D db_Grp6 +ffffffff832a1040 D db_Grp7 +ffffffff832a1100 D db_Grp8 +ffffffff832a1140 D db_Grp9 +ffffffff832a1200 D db_GrpA +ffffffff832a1240 D db_GrpB +ffffffff832a1280 D db_GrpC +ffffffff832a12c0 D db_inst_0f0x +ffffffff832a1440 D db_inst_0f2x +ffffffff832a15c0 D db_inst_0f3x +ffffffff832a1740 D db_inst_0f8x +ffffffff832a18c0 D db_inst_0f9x +ffffffff832a1a40 D db_inst_0fax +ffffffff832a1bc0 D db_inst_0fbx +ffffffff832a1d40 D db_inst_0fcx +ffffffff832a1ec0 D db_inst_0f +ffffffff832a1f40 D db_Esc92 +ffffffff832a1f80 D db_Esc94 +ffffffff832a1fc0 D db_Esc95 +ffffffff832a2000 D db_Esc96 +ffffffff832a2040 D db_Esc97 +ffffffff832a2080 D db_Esca5 +ffffffff832a20c0 D db_Escb4 +ffffffff832a2100 D db_Esce3 +ffffffff832a2140 D db_Escf4 +ffffffff832a2180 D db_Esc8 +ffffffff832a2240 D db_Esc9 +ffffffff832a2300 D db_Esca +ffffffff832a23c0 D db_Escb +ffffffff832a2480 D db_Escc +ffffffff832a2540 D db_Escd +ffffffff832a2600 D db_Esce +ffffffff832a26c0 D db_Escf +ffffffff832a2780 D db_Esc_inst +ffffffff832a27c0 D db_Grp1 +ffffffff832a2800 D db_Grp2 +ffffffff832a2840 D db_Grp3 +ffffffff832a2900 D db_Grp4 +ffffffff832a29c0 D db_Grp5 +ffffffff832a2a80 D db_inst_table +ffffffff832a4280 D db_bad_inst +ffffffff832a42a0 D db_index_reg_16 +ffffffff832a42e0 D db_reg +ffffffff832a44e0 D db_seg_reg +ffffffff832a4520 D db_lengths +ffffffff832a5000 D db_regs +ffffffff832a51e0 D db_eregs +ffffffff832a51f0 D db_reg_args +ffffffff832a6000 D timer_mutex +ffffffff832a6010 d i8254_timecounter +ffffffff832a7000 D spleen8x16 +ffffffff832a7058 D spleen12x24 +ffffffff832a70b0 D spleen16x32 +ffffffff832a7108 D spleen32x64 +ffffffff832a7160 d builtin_fonts +ffffffff832a71e0 d wsfont_add.cookiegen +ffffffff832a71f0 d spleen8x16_data +ffffffff832a7ff0 d spleen12x24_data +ffffffff832aa9f0 d spleen16x32_data +ffffffff832ae1f0 d spleen32x64_data +ffffffff832bd000 D nsphy_cd +ffffffff832be000 D nsphyter_cd +ffffffff832bf000 D gentbi_cd +ffffffff832c0000 D qsphy_cd +ffffffff832c1000 D inphy_cd +ffffffff832c2000 D iophy_cd +ffffffff832c3000 D eephy_cd +ffffffff832c4000 D exphy_cd +ffffffff832c5000 D rlphy_cd +ffffffff832c6000 D lxtphy_cd +ffffffff832c7000 D luphy_cd +ffffffff832c8000 D mtdphy_cd +ffffffff832c9000 D icsphy_cd +ffffffff832ca000 D sqphy_cd +ffffffff832cb000 D tqphy_cd +ffffffff832cc000 D ukphy_cd +ffffffff832cd000 D dcphy_cd +ffffffff832ce000 D bmtphy_cd +ffffffff832cf000 D brgphy_cd +ffffffff832d0000 D xmphy_cd +ffffffff832d1000 D amphy_cd +ffffffff832d2000 D acphy_cd +ffffffff832d3000 D nsgphy_cd +ffffffff832d4000 D urlphy_cd +ffffffff832d5000 D rgephy_cd +ffffffff832d6000 D ciphy_cd +ffffffff832d7000 D ipgphy_cd +ffffffff832d8000 D etphy_cd +ffffffff832d9000 D jmphy_cd +ffffffff832da000 D atphy_cd +ffffffff832db000 D scsi_autoconf +ffffffff832db008 D scsibus_cd +ffffffff832dc000 D cd_cd +ffffffff832dd000 D ch_cd +ffffffff832dd020 D chquirks +ffffffff832de000 D sd_cd +ffffffff832df000 D st_cd +ffffffff832e0000 D uk_cd +ffffffff832e1000 D safte_cd +ffffffff832e2000 D ses_cd +ffffffff832e3000 D sym_cd +ffffffff832e3020 D sym_devices +ffffffff832e3070 D asym_devices +ffffffff832e4000 D rdac_cd +ffffffff832e4020 D rdac_devices +ffffffff832e5000 D emc_cd +ffffffff832e5020 D emc_devices +ffffffff832e6000 D hds_cd +ffffffff832e6020 D hds_devices +ffffffff832e7000 D atapiscsi_cd +ffffffff832e8000 D wd_cd +ffffffff832e8020 d wddumpmulti +ffffffff832e9000 D mainbus_cd +ffffffff832e9020 D mba_iba +ffffffff832ea000 D bios_cd +ffffffff832ea020 D smbios_uninfo +ffffffff832eb000 D mpbios_cd +ffffffff832eb020 d mp_conf +ffffffff832eb070 d extint_bus +ffffffff832eb0a0 d smi_bus +ffffffff832eb0d0 d nmi_bus +ffffffff832ec000 D need_retpoline +ffffffff832ed000 D cpu_info_full_primary +ffffffff832f0000 D cpu_info_list +ffffffff832f0008 D mp_cpu_funcs +ffffffff832f0020 D cpu_cd +ffffffff832f0040 D cpu_info +ffffffff832f1000 D local_pic +ffffffff832f1098 D lapic_readreg +ffffffff832f10a0 D lapic_writereg +ffffffff832f10a8 D x86_ipi +ffffffff832f2000 D ioapic_cold +ffffffff832f2008 D ioapic_cd +ffffffff832f3000 D efifb_std_descr +ffffffff832f3030 D efifb_descrs +ffffffff832f3038 D efifb_accessops +ffffffff832f3098 D efifb_cd +ffffffff832f4000 D pvbus_cd +ffffffff832f4020 D pvbus_types +ffffffff832f40e0 D pvbus_dma_tag +ffffffff832f5000 D pvclock_cd +ffffffff832f5020 D pvclock_timecounter +ffffffff832f6000 D vmt_tclo_rpc +ffffffff832f60d0 D vmt_cd +ffffffff832f7000 D xen_cd +ffffffff832f7020 D xen_bus_dma_tag +ffffffff832f8000 D xnf_cd +ffffffff832f9000 D xbf_cd +ffffffff832fa000 D hv_msg_dispatch +ffffffff832fa110 D hv_timecounter +ffffffff832fa160 D hyperv_cd +ffffffff832fb000 d hv_ic_devs +ffffffff832fc000 D hvn_cd +ffffffff832fd000 D hvs_cd +ffffffff832fe000 D virtio_cd +ffffffff832ff000 D vio_cd +ffffffff83300000 D vioblk_cd +ffffffff83301000 D viomb_cd +ffffffff83302000 D viornd_cd +ffffffff83303000 D vioscsi_cd +ffffffff83304000 D vmmci_cd +ffffffff83305000 D pci_cd +ffffffff83306000 D arc_fw_hdr +ffffffff83306008 D arc_cd +ffffffff83307000 D jmb_cd +ffffffff83308000 D mfii_cd +ffffffff83309000 D ips_cd +ffffffff8330a000 D eap_cd +ffffffff8330b000 D auacer_cd +ffffffff8330c000 D auich_cd +ffffffff8330d000 D azalia_cd +ffffffff8330e000 D envy_cd +ffffffff8330e020 D envy_matchids +ffffffff8330e030 D envy_rates +ffffffff8330e0b0 D ak4524_dac +ffffffff8330e0d8 D ak4524_adc +ffffffff8330e100 D ak4358_dac +ffffffff8330e128 D ak5365_adc +ffffffff8330e150 D unkenvy_codec +ffffffff8330e180 D envy_cards +ffffffff8330e3f0 D envy_cards_ht +ffffffff8330e600 d julia_eeprom +ffffffff8330f000 D emu_cd +ffffffff83310000 D auixp_cd +ffffffff83311000 D clcs_cd +ffffffff83312000 D yds_cd +ffffffff83313000 D auvia_cd +ffffffff83314000 D qle_cd +ffffffff83315000 D mpii_cd +ffffffff83316000 D aq_cd +ffffffff83317000 D de_cd +ffffffff83318000 D pcn_cd +ffffffff83319000 D wdc_sii3114_vtbl +ffffffff83319038 D wdc_pdc203xx_vtbl +ffffffff83319070 D wdc_svwsata_vtbl +ffffffff833190a8 D pciide_cd +ffffffff833190d0 d sis_hostbr_type +ffffffff8331a000 D ppb_cd +ffffffff8331b000 D vr_cd +ffffffff8331b020 D vr_devices +ffffffff8331c000 D txp_cd +ffffffff8331d000 D bt848_card_signature +ffffffff8331e000 D bktr_cd +ffffffff8331f000 D em_cd +ffffffff83320000 D ixgb_cd +ffffffff83321000 D ix_cd +ffffffff83321020 D ixgbe_smart_speed +ffffffff83321024 D ixgbe_enable_msix +ffffffff83322000 D ixl_cd +ffffffff83322020 d ixl_sff_lock +ffffffff83323000 D xge_cd +ffffffff83324000 D thtc_cd +ffffffff83324020 D tht_cd +ffffffff83324040 D tht_txt_desc +ffffffff83324068 D tht_rxf_desc +ffffffff83324090 D tht_rxd_desc +ffffffff833240b8 D tht_txf_desc +ffffffff83325000 D myx_cd +ffffffff83326000 D oce_cd +ffffffff83327000 D dc_devs +ffffffff83328000 D cas_cd +ffffffff83329000 D sis_cd +ffffffff8332a000 D se_cd +ffffffff8332b000 D mbg_cd +ffffffff8332c000 D cbb_cd +ffffffff8332c020 D yc_chipsets +ffffffff8332c1b0 d pccbb_funcs +ffffffff8332c1e0 d pccbb_pcmcia_funcs +ffffffff8332d000 D skc_cd +ffffffff8332d020 D sk_cd +ffffffff8332e000 D mskc_cd +ffffffff8332e020 D msk_cd +ffffffff8332f000 D puc_cd +ffffffff83330000 D puc_ndevs +ffffffff83331000 D iwi_cd +ffffffff83332000 D wpi_cd +ffffffff83333000 D iwn_cd +ffffffff83334000 D iwm_cd +ffffffff83335000 D iwx_cd +ffffffff83336000 D cmpci_cd +ffffffff83337000 D iha_cd +ffffffff83338000 D pcscp_cd +ffffffff83338020 D pcscp_glue +ffffffff83339000 D bge_cd +ffffffff8333a000 D bnx_firmwares +ffffffff8333a160 D bnx_rv2ps +ffffffff8333a1c0 D bnx_cd +ffffffff8333a1e0 d flash_5709 +ffffffff8333a210 d flash_table +ffffffff8333b000 D vge_cd +ffffffff8333c000 D stge_cd +ffffffff8333d000 D nfe_cd +ffffffff8333e000 D et_cd +ffffffff8333f000 D jme_cd +ffffffff83340000 D age_cd +ffffffff83341000 D alc_dma_burst +ffffffff83341020 D alc_cd +ffffffff83342000 D ale_cd +ffffffff83343000 D amdpm_cd +ffffffff83343020 d amdpm_timecounter +ffffffff83344000 D bce_cd +ffffffff83345000 D rtwn_cd +ffffffff83346000 d ral_rt2560_opns +ffffffff83346028 d ral_rt2661_opns +ffffffff83346050 d ral_rt2860_opns +ffffffff83347000 D piixpm_cd +ffffffff83348000 D vic_cd +ffffffff83349000 D vmx_cd +ffffffff8334a000 D vmwpvs_cd +ffffffff8334b000 D lii_cd +ffffffff8334c000 D ichiic_cd +ffffffff8334d000 D viapm_cd +ffffffff8334d020 d viapm_timecounter +ffffffff8334e000 D amdiic_cd +ffffffff8334f000 D nviic_cd +ffffffff83350000 D kate_cd +ffffffff83351000 D km_cd +ffffffff83352000 D cpu_model_offsets +ffffffff83352070 D ksmn_cd +ffffffff83353000 D itherm_cd +ffffffff83354000 D pchtemp_cd +ffffffff83355000 D xspd_cd +ffffffff83356000 D virtio_pci_ops +ffffffff83357000 D bwfm_pci_buscore_ops +ffffffff83357030 D bwfm_pci_bus_ops +ffffffff83357058 D bwfm_pci_msgbuf_ops +ffffffff83358000 D bnxt_cd +ffffffff83359000 D mcx_cd +ffffffff8335a000 D iavf_cd +ffffffff8335b000 D rge_cd +ffffffff8335c000 D igc_cd +ffffffff8335d000 D ngbe_cd +ffffffff8335e000 D agp_cd +ffffffff8335f000 D intagp_cd +ffffffff8335f020 D agp_i810_methods +ffffffff83360000 D reservation_ww_class +ffffffff83361000 d bridge_lock +ffffffff83361010 d bridge_list +ffffffff83362000 d drm_connector_enum_list +ffffffff833621f8 d connector_list_lock +ffffffff83362208 d connector_list +ffffffff83363000 d kernel_fb_helper_list +ffffffff83363010 d kernel_fb_helper_lock +ffffffff83364000 D drm_global_mutex +ffffffff83365000 D i2c_bit_algo +ffffffff83365010 d drm_fence_context_count +ffffffff83365018 d dma_fence_stub_mtx +ffffffff83365028 D wait_bit_mtx +ffffffff83365038 D shrinkers +ffffffff83366000 d crtc_ww_class +ffffffff83367000 d panel_lock +ffffffff83367010 d panel_list +ffffffff83368000 d ttm_global_mutex +ffffffff83369000 D drm_sched_policy +ffffffff8336a000 D intel_bbops +ffffffff8336b000 d i915_sys_placement +ffffffff8336b020 d i915_ttm_bo_driver +ffffffff8336c000 d mchdev_lock +ffffffff8336d000 D inteldrm_stdscreen +ffffffff8336d030 D inteldrm_scrlist +ffffffff8336d038 D inteldrm_screenlist +ffffffff8336d048 D inteldrm_accessops +ffffffff8336d0a8 D inteldrm_cd +ffffffff8336e000 d capture_mutex +ffffffff8336f000 d mitigations +ffffffff83370000 D i915_modparams +ffffffff83371000 d schedule_lock +ffffffff83372000 d unbind_fence_ops +ffffffff83373000 D intel_graphics_stolen_res +ffffffff83374000 D btc_valid_sclk +ffffffff83375000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff83375020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff83376000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff83376008 d r600_cs_packet_parse_vline.vline_status +ffffffff83377000 d r100_asic +ffffffff833772e0 d r200_asic +ffffffff833775c0 d r300_asic_pcie +ffffffff833778a0 d r300_asic +ffffffff83377b80 d r420_asic +ffffffff83377e60 d rs400_asic +ffffffff83378140 d rs600_asic +ffffffff83378420 d rs690_asic +ffffffff83378700 d rv515_asic +ffffffff833789e0 d r520_asic +ffffffff83378cc0 d r600_asic +ffffffff83378fa0 d rv6xx_asic +ffffffff83379280 d rs780_asic +ffffffff83379560 d rv770_asic +ffffffff83379840 d evergreen_asic +ffffffff83379b20 d sumo_asic +ffffffff83379e00 d btc_asic +ffffffff8337a0e0 d cayman_asic +ffffffff8337a3c0 d trinity_asic +ffffffff8337a6a0 d si_asic +ffffffff8337a980 d ci_asic +ffffffff8337ac60 d kv_asic +ffffffff8337b000 d dce6_funcs +ffffffff8337b018 d dce6_hdmi_funcs +ffffffff8337b088 d dce6_dp_funcs +ffffffff8337b0f8 d dce4_funcs +ffffffff8337b110 d dce4_hdmi_funcs +ffffffff8337b180 d dce4_dp_funcs +ffffffff8337b1f0 d dce32_funcs +ffffffff8337b208 d dce32_hdmi_funcs +ffffffff8337b278 d dce32_dp_funcs +ffffffff8337b2e8 d r600_funcs +ffffffff8337b300 d r600_hdmi_funcs +ffffffff8337c000 D radeon_modeset +ffffffff8337c004 D radeon_dynclks +ffffffff8337c008 D radeon_agpmode +ffffffff8337c00c D radeon_gart_size +ffffffff8337c010 D radeon_tv +ffffffff8337c014 D radeon_audio +ffffffff8337c018 D radeon_pcie_gen2 +ffffffff8337c01c D radeon_msi +ffffffff8337c020 D radeon_lockup_timeout +ffffffff8337c024 D radeon_dpm +ffffffff8337c028 D radeon_aspm +ffffffff8337c02c D radeon_runtime_pm +ffffffff8337c030 D radeon_vm_size +ffffffff8337c034 D radeon_vm_block_size +ffffffff8337c038 D radeon_use_pflipirq +ffffffff8337c03c D radeon_bapm +ffffffff8337c040 D radeon_backlight +ffffffff8337c044 D radeon_auxch +ffffffff8337c048 D radeon_uvd +ffffffff8337c04c D radeon_vce +ffffffff8337c050 D radeon_si_support +ffffffff8337c054 D radeon_cik_support +ffffffff8337c058 D radeondrm_cd +ffffffff8337c078 D radeondrm_stdscreen +ffffffff8337c0a8 D radeondrm_scrlist +ffffffff8337c0b0 D radeondrm_screenlist +ffffffff8337c0c0 D radeondrm_accessops +ffffffff8337d000 D radeon_bbops +ffffffff8337e000 d radeon_bo_driver +ffffffff8337f000 d verde_pg_init +ffffffff83380000 d cac_weights_pitcairn +ffffffff833804d0 d cac_weights_oland +ffffffff83381000 d aldebaran_mode2_handler +ffffffff83382000 d amdgpu_vbios_version_attrs +ffffffff83383000 D amdgpu_asic_name +ffffffff83384000 D amdgpu_vram_limit +ffffffff83384004 D amdgpu_gart_size +ffffffff83384008 D amdgpu_gtt_size +ffffffff8338400c D amdgpu_moverate +ffffffff83384010 D amdgpu_audio +ffffffff83384014 D amdgpu_pcie_gen2 +ffffffff83384018 D amdgpu_msi +ffffffff8338401c D amdgpu_dpm +ffffffff83384020 D amdgpu_fw_load_type +ffffffff83384024 D amdgpu_aspm +ffffffff83384028 D amdgpu_runtime_pm +ffffffff8338402c D amdgpu_ip_block_mask +ffffffff83384030 D amdgpu_bapm +ffffffff83384034 D amdgpu_vm_size +ffffffff83384038 D amdgpu_vm_fragment_size +ffffffff8338403c D amdgpu_vm_block_size +ffffffff83384040 D amdgpu_vm_update_mode +ffffffff83384044 D amdgpu_dc +ffffffff83384048 D amdgpu_sched_jobs +ffffffff8338404c D amdgpu_sched_hw_submission +ffffffff83384050 D amdgpu_cg_mask +ffffffff83384058 D amdgpu_pg_mask +ffffffff8338405c D amdgpu_sdma_phase_quantum +ffffffff83384060 D amdgpu_pp_feature_mask +ffffffff83384064 D amdgpu_lbpw +ffffffff83384068 D amdgpu_compute_multipipe +ffffffff8338406c D amdgpu_gpu_recovery +ffffffff83384070 D amdgpu_smu_pptable_id +ffffffff83384074 D amdgpu_dc_feature_mask +ffffffff83384078 D amdgpu_async_gfx_ring +ffffffff8338407c D amdgpu_mcbp +ffffffff83384080 D amdgpu_discovery +ffffffff83384084 D amdgpu_noretry +ffffffff83384088 D amdgpu_force_asic_type +ffffffff8338408c D amdgpu_tmz +ffffffff83384090 D amdgpu_reset_method +ffffffff83384094 D amdgpu_num_kcq +ffffffff83384098 D amdgpu_use_xgmi_p2p +ffffffff8338409c D amdgpu_sg_display +ffffffff833840a0 D amdgpu_user_partt_mode +ffffffff833840a8 D mgpu_info +ffffffff83384558 D amdgpu_ras_enable +ffffffff8338455c D amdgpu_ras_mask +ffffffff83384560 D amdgpu_bad_page_threshold +ffffffff83384564 D amdgpu_backlight +ffffffff83384568 D amdgpu_cd +ffffffff83384588 D amdgpu_stdscreen +ffffffff833845b8 D amdgpu_scrlist +ffffffff833845c0 D amdgpu_screenlist +ffffffff833845d0 D amdgpu_accessops +ffffffff83385000 d amdgpu_gtt_mgr_attributes +ffffffff83386000 D amdgpu_bbops +ffffffff83387000 D soc15_ih_clientid_name +ffffffff83388000 D ras_error_string +ffffffff83388030 D ras_block_string +ffffffff833880c0 D ras_mca_block_string +ffffffff83389000 d amdgpu_bo_driver +ffffffff8338a000 d amdgpu_vram_mgr_attributes +ffffffff8338b000 d xgmi_mutex +ffffffff8338b010 D xgmi_ras_hw_ops +ffffffff8338b050 D xgmi_ras +ffffffff8338c000 D aqua_vanjaram_xcp_funcs +ffffffff8338d000 D gfx_v11_0_3_ras +ffffffff8338e000 d gfx_v9_0_ras +ffffffff8338f000 D gfx_v9_4_ras +ffffffff83390000 D gfx_v9_4_2_ras_ops +ffffffff83390040 D gfx_v9_4_2_ras +ffffffff83391000 D gfx_v9_4_3_xcp_funcs +ffffffff83391020 D gfx_v9_4_3_ras_ops +ffffffff83391060 D gfx_v9_4_3_ras +ffffffff83392000 D gfxhub_v1_2_xcp_funcs +ffffffff83393000 D hdp_v4_0_ras_hw_ops +ffffffff83393040 D hdp_v4_0_ras +ffffffff83394000 d jpeg_v2_6_ras +ffffffff83395000 d jpeg_v4_0_ras +ffffffff83396000 d jpeg_v4_0_3_ras +ffffffff83397000 D mca_v3_0_mp0_ras +ffffffff83397058 D mca_v3_0_mp1_ras +ffffffff833970b0 D mca_v3_0_mpio_ras +ffffffff83398000 D mmhub_v1_0_ras_hw_ops +ffffffff83398040 D mmhub_v1_0_ras +ffffffff83399000 D mmhub_v1_7_ras_hw_ops +ffffffff83399040 D mmhub_v1_7_ras +ffffffff8339a000 D mmhub_v1_8_ras +ffffffff8339b000 D mmhub_v9_4_ras +ffffffff8339c000 D nbio_v4_3_ras +ffffffff8339d000 D nbio_v7_4_ras +ffffffff8339e000 D nbio_v7_9_ras +ffffffff8339f000 d sriov_sc_video_codecs_encode +ffffffff8339f010 d sriov_sc_video_codecs_decode_vcn1 +ffffffff8339f020 d sriov_sc_video_codecs_decode_vcn0 +ffffffff8339f030 d sriov_sc_video_codecs_encode_array +ffffffff8339f060 d sriov_sc_video_codecs_decode_array_vcn1 +ffffffff8339f0f0 d sriov_sc_video_codecs_decode_array_vcn0 +ffffffff833a0000 d sdma_v4_0_ras +ffffffff833a1000 D sdma_v4_4_ras +ffffffff833a2000 D sdma_v4_4_2_xcp_funcs +ffffffff833a2020 d sdma_v4_4_2_ras +ffffffff833a3000 d sdma_v6_0_3_ras +ffffffff833a4000 d sienna_cichlid_mode2_handler +ffffffff833a5000 d smu_v13_0_10_mode2_handler +ffffffff833a6000 d sriov_vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff833a6010 d sriov_vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff833a6020 d sriov_vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff833a6030 d sriov_vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff833a6040 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff833a6070 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff833a6100 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff833a6140 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff833a7000 D umc_v6_1_ras +ffffffff833a8000 D umc_v6_7_ras +ffffffff833a9000 D umc_v8_10_ras +ffffffff833aa000 D umc_v8_7_ras +ffffffff833ab000 d vcn_v2_6_ras +ffffffff833ac000 d vcn_v4_0_unified_ring_vm_funcs +ffffffff833ac140 d vcn_v4_0_ras +ffffffff833ad000 d vcn_v4_0_3_ras +ffffffff833ae000 d amdgpu_dm_mode_config_helperfuncs +ffffffff833ae010 d dm_atomic_state_funcs +ffffffff833af000 d construct_integrated_info.result +ffffffff833af004 d bios_parser_get_firmware_info.result +ffffffff833b0000 d dce_funcs +ffffffff833b1000 d dce110_funcs +ffffffff833b2000 d dce112_funcs +ffffffff833b3000 d dce120_funcs +ffffffff833b4000 d rv1_clk_funcs +ffffffff833b4090 d rv1_clk_internal_funcs +ffffffff833b5000 d rv2_clk_internal_funcs +ffffffff833b6000 d dcn2_funcs +ffffffff833b7000 d dcn201_funcs +ffffffff833b8000 d dcn21_funcs +ffffffff833b8090 d rn_bw_params +ffffffff833b9000 D dcn3_fpga_funcs +ffffffff833b9090 d dcn3_funcs +ffffffff833ba000 d vg_funcs +ffffffff833ba090 d dummy_clocks +ffffffff833ba1c0 d vg_bw_params +ffffffff833bb000 d dcn31_funcs +ffffffff833bb090 d dcn31_bw_params +ffffffff833bc000 d dcn314_funcs +ffffffff833bc090 d dcn314_bw_params +ffffffff833bd000 d dcn315_funcs +ffffffff833bd090 d dcn315_bw_params +ffffffff833be000 d dcn316_funcs +ffffffff833be090 d dcn316_bw_params +ffffffff833bf000 d dcn32_funcs +ffffffff833c0000 d dcn10_dpp_cap +ffffffff833c1000 d dcn20_dpp_funcs +ffffffff833c1110 d dcn20_dpp_cap +ffffffff833c2000 d dcn20_hubp_funcs +ffffffff833c3000 d dcn20_opp_funcs +ffffffff833c4000 d dcn20_tg_funcs +ffffffff833c5000 d dcn201_dpp_funcs +ffffffff833c5110 d dcn201_dpp_cap +ffffffff833c6000 d dcn201_hubp_funcs +ffffffff833c7000 d dcn201_opp_funcs +ffffffff833c8000 d dcn201_tg_funcs +ffffffff833c9000 d dcn201_res_pool_funcs +ffffffff833c90f8 d dcn201_ip +ffffffff833c92b0 d dcn201_soc +ffffffff833cb000 d dcn21_hubp_funcs +ffffffff833cc000 d dcn30_afmt_funcs +ffffffff833cd000 d dcn30_dpp_funcs +ffffffff833cd110 d dcn30_dpp_cap +ffffffff833ce000 d dcn30_hubp_funcs +ffffffff833cf000 d dcn30_tg_funcs +ffffffff833d0000 d dcn30_vpg_funcs +ffffffff833d1000 d dcn30_tg_funcs +ffffffff833d2000 d res_cap_dcn301 +ffffffff833d2040 d dcn301_res_pool_funcs +ffffffff833d3000 d dcn302_res_pool_funcs +ffffffff833d4000 d dcn303_res_pool_funcs +ffffffff833d5000 d dcn31_afmt_funcs +ffffffff833d6000 d dcn31_apg_funcs +ffffffff833d7000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff833d8000 d dcn31_hubp_funcs +ffffffff833d9000 d dcn31_tg_funcs +ffffffff833da000 d dcn31_res_pool_funcs +ffffffff833db000 d dcn31_vpg_funcs +ffffffff833dc000 d dcn314_tg_funcs +ffffffff833dd000 d dcn314_res_pool_funcs +ffffffff833de000 d dcn315_res_pool_funcs +ffffffff833df000 d dcn316_res_pool_funcs +ffffffff833e0000 d dcn32_dpp_funcs +ffffffff833e0110 d dcn32_dpp_cap +ffffffff833e1000 d dcn32_hpo_dp_link_encoder_funcs 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dcn3_03_soc +ffffffff833f6000 D dcn3_1_ip +ffffffff833f61b8 D dcn3_15_ip +ffffffff833f6370 D dcn3_16_ip +ffffffff833f6528 d dcn3_15_soc +ffffffff833f7860 d dcn3_1_soc +ffffffff833f8b98 d dcn3_16_soc +ffffffff833fa000 D dcn3_14_ip +ffffffff833fa1b8 d dcn3_14_soc +ffffffff833fc000 D dcn3_2_ip +ffffffff833fc1b8 D dcn3_2_soc +ffffffff833fe000 D dcn3_21_ip +ffffffff833fe1b8 D dcn3_21_soc +ffffffff83400000 d dsc_policy_max_target_bpp_limit +ffffffff83401000 D DIDTEDCConfig_P12 +ffffffff83401070 d smu7_profiling +ffffffff83402000 d cyan_skillfish_table_map +ffffffff83402080 d cyan_skillfish_message_map +ffffffff83403000 d navi10_table_map +ffffffff83403080 d navi10_pwr_src_map +ffffffff83403090 d navi10_workload_map +ffffffff834030e0 d navi10_message_map +ffffffff83403b60 d navi10_clk_map +ffffffff83403c20 d navi10_feature_mask_map +ffffffff83404000 d sienna_cichlid_table_map +ffffffff83404080 d sienna_cichlid_pwr_src_map +ffffffff83404090 d sienna_cichlid_workload_map +ffffffff834040e0 d sienna_cichlid_message_map +ffffffff83404b60 d sienna_cichlid_clk_map +ffffffff83404c20 d sienna_cichlid_feature_mask_map +ffffffff83405000 d vangogh_message_map +ffffffff83405a80 d vangogh_table_map +ffffffff83405b00 d vangogh_workload_map +ffffffff83405b50 d vangogh_feature_mask_map +ffffffff83406000 d renoir_table_map +ffffffff83406080 d renoir_workload_map +ffffffff834060d0 d renoir_message_map +ffffffff83406b50 d renoir_clk_map +ffffffff83407000 d smu_v13_0_0_message_map +ffffffff83407a80 d smu_v13_0_0_feature_mask_map +ffffffff83407e50 d smu_v13_0_0_table_map +ffffffff83407ed0 d smu_v13_0_0_pwr_src_map +ffffffff83407ee0 d smu_v13_0_0_workload_map +ffffffff83407f30 d smu_v13_0_0_clk_map +ffffffff83408000 d smu_v13_0_4_table_map +ffffffff83408080 d smu_v13_0_4_message_map +ffffffff83408b00 d smu_v13_0_4_feature_mask_map +ffffffff83409000 d smu_v13_0_5_table_map +ffffffff83409080 d smu_v13_0_5_message_map +ffffffff83409b00 d smu_v13_0_5_feature_mask_map +ffffffff8340a000 d smu_v13_0_7_message_map +ffffffff8340aa80 d smu_v13_0_7_feature_mask_map +ffffffff8340ae50 d smu_v13_0_7_table_map +ffffffff8340aed0 d smu_v13_0_7_pwr_src_map +ffffffff8340aee0 d smu_v13_0_7_workload_map +ffffffff8340af30 d smu_v13_0_7_clk_map +ffffffff8340b000 d yellow_carp_table_map +ffffffff8340b080 d yellow_carp_message_map +ffffffff8340bb00 d yellow_carp_feature_mask_map +ffffffff8340c000 D pci_conf_lock +ffffffff8340c010 D pci_bus_dma_tag +ffffffff8340c088 D msi_pic +ffffffff8340c120 D msix_pic +ffffffff8340d000 D pchb_cd +ffffffff8340e000 D amas_cd +ffffffff8340f000 D cardslot_cd +ffffffff83410000 D cardbus_cd +ffffffff83411000 d csdevs +ffffffff83412000 d ral_rt2560_opns +ffffffff83412028 d ral_rt2661_opns +ffffffff83412050 d ral_rt2860_opns +ffffffff83413000 D pcmcia_cd +ffffffff83414000 D pcmcia_3cxem556_func0 +ffffffff834140b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff83414158 D pcmcia_megahertz_xjem1144_func0 +ffffffff83414210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff834142b0 d pcmcia_3cxem556_func1 +ffffffff83414368 d pcmcia_3cxem556_func1_cfe0 +ffffffff83414408 d pcmcia_megahertz_xjem1144_func1 +ffffffff834144c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff83414560 d pcmcia_sierra_a555_func1 +ffffffff83414618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff834146b8 d pcmcia_sveclancard_func0 +ffffffff83414770 d pcmcia_sveclancard_func0_cfe0 +ffffffff83415000 D ep_pcmcia_prod +ffffffff83416000 D aic_pcmcia_prod +ffffffff83417000 D com_pcmcia_prod +ffffffff83418000 D wdc_pcmcia_pr +ffffffff83419000 D sm_pcmcia_prod +ffffffff8341a000 D xe_cd +ffffffff8341b000 D pcib_cd +ffffffff8341c000 D amdpcib_cd +ffffffff8341d000 D tcpcib_cd +ffffffff8341e000 D aapic_cd +ffffffff8341f000 D hme_cd +ffffffff83420000 D isa_cd +ffffffff83421000 D isadma_cd +ffffffff83422000 D fdc_cd +ffffffff83423000 D fd_types +ffffffff834231f8 D fd_cd +ffffffff83424000 D mpu_cd +ffffffff83425000 D pcppi_cd +ffffffff83426000 D spkr_cd +ffffffff83427000 D wbsio_cd +ffffffff83428000 D schsio_cd +ffffffff83429000 D it_cd +ffffffff8342a000 D uguru_cd +ffffffff8342b000 D aps_cd +ffffffff8342c000 D isa_bus_dma_tag +ffffffff8342d000 D wsdisplay_cd +ffffffff8342d020 D wsdisplay_cons +ffffffff8342d058 D wsdisplay_defaultscreens +ffffffff8342e000 D wskbd_cd +ffffffff8342e020 D wskbd_default_bell_data +ffffffff8342e030 D wskbd_default_keyrepeat_data +ffffffff8342e040 D wskbd_srcops +ffffffff8342f000 d compose_tab +ffffffff83430000 D wsmouse_cd +ffffffff83430020 D wsmouse_srcops +ffffffff83431000 D wsmux_srcops +ffffffff83431030 D wsmux_tree_lock +ffffffff83432000 D vt100_output +ffffffff83433000 D pckbd_cd +ffffffff83434000 D pms_cd +ffffffff83434020 d synaptics_params +ffffffff83434030 d alps_params +ffffffff83435000 D skgpio_cd +ffffffff83436000 D pctr_conf_lock +ffffffff83437000 D ukbd_keymapdata +ffffffff83438000 D usbrev_str +ffffffff83438030 D usb_cd +ffffffff83439000 d usbd_ratecheck.errinterval +ffffffff8343a000 D uhub_cd +ffffffff8343b000 D uaudio_cd +ffffffff8343c000 D uvideo_ctrls +ffffffff8343c2d8 D uvideo_cd +ffffffff8343d000 D utvfu_norm_params +ffffffff8343d030 D utvfu_cd +ffffffff8343e000 D udl_reg_vals_640x480_60 +ffffffff8343e020 D udl_reg_vals_640x480_67 +ffffffff8343e040 D udl_reg_vals_640x480_72 +ffffffff8343e060 D udl_reg_vals_640x480_75 +ffffffff8343e080 D udl_reg_vals_800x480_61 +ffffffff8343e0a0 D udl_reg_vals_800x600_56 +ffffffff8343e0c0 D udl_reg_vals_800x600_60 +ffffffff8343e0e0 D udl_reg_vals_800x600_72 +ffffffff8343e100 D udl_reg_vals_800x600_74 +ffffffff8343e120 D udl_reg_vals_800x600_75 +ffffffff8343e140 D udl_reg_vals_1024x768_60 +ffffffff8343e160 D udl_reg_vals_1024x768_70 +ffffffff8343e180 D udl_reg_vals_1024x768_75 +ffffffff8343e1a0 D udl_reg_vals_1280x800_60 +ffffffff8343e1c0 D udl_reg_vals_1280x960_60 +ffffffff8343e1e0 D udl_reg_vals_1280x1024_60 +ffffffff8343e200 D udl_reg_vals_1280x1024_75 +ffffffff8343e220 D udl_reg_vals_1366x768_60 +ffffffff8343e240 D udl_reg_vals_1440x900_60 +ffffffff8343e260 D udl_reg_vals_1440x900_59 +ffffffff8343e280 D udl_reg_vals_1440x900_75 +ffffffff8343e2a0 D udl_reg_vals_1680x1050_60 +ffffffff8343e2c0 D udl_reg_vals_1600x1200_60 +ffffffff8343e2e0 D udl_reg_vals_1920x1080_60 +ffffffff8343e300 D udl_null_key_1 +ffffffff8343e310 D udl_decomp_table +ffffffff8343f510 D udl_cd +ffffffff8343f530 D udl_stdscreen +ffffffff8343f560 D udl_scrlist +ffffffff8343f568 D udl_screenlist +ffffffff8343f578 D udl_accessops +ffffffff83440000 D umidi_cd +ffffffff83441000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff83441020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff83441040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff83441060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff83441080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff834410a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff834410c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff834410e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff83441100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff83441120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff83441140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff83441160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff83441180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff834411a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff834411c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff834411e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff83441200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff83441220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff83441240 D umidi_quirklist +ffffffff834414a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff834414c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff834414d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff834414f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff83441500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff83441520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff83441530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff83441550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff83441560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff83441580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff83441590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff834415b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff834415c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff834415e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff834415f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff83441610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff83441620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff83441640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff83441650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff83441670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff83441680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff834416a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff834416b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff834416d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff834416e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff83441700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff83441710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff83441730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff83441740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff83441760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff83441770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff83441790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff834417a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff834417c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff834417d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff834417f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff83442000 D ucom_cd +ffffffff83442020 D sysctl_ucomlock +ffffffff83443000 D ugen_cd +ffffffff83444000 D uhidev_cd +ffffffff83444020 d uhidev_use_rdesc.reportbuf +ffffffff83445000 D uhid_cd +ffffffff83446000 D fido_cd +ffffffff83447000 D ujoy_cd +ffffffff83448000 D ukbd_cd +ffffffff83449000 D ums_cd +ffffffff83449020 d ums_fix_elecom_descriptor.match +ffffffff8344a000 D umt_cd +ffffffff8344b000 D def_scale +ffffffff8344b020 D uts_cd +ffffffff8344c000 D ubcmtp_cd +ffffffff8344c020 d ubcmtp_wsmousecfg +ffffffff8344d000 D ucycom_cd +ffffffff8344e000 D uslhcom_cd +ffffffff8344f000 D ulpt_fwdevs +ffffffff8344f060 D ulpt_cd +ffffffff8344f080 D ulptusein +ffffffff83450000 D umass_cd +ffffffff83450020 d umass_bbb_transfer.dCBWtag +ffffffff83451000 D uthum_cd +ffffffff83452000 D ugold_cd +ffffffff83452020 d cmd_init +ffffffff83452028 d cmd_type +ffffffff83452030 d cmd_data +ffffffff83453000 D utrh_cd +ffffffff83454000 D uoakrh_cd +ffffffff83455000 D uoaklux_cd +ffffffff83456000 D uoakv_cd +ffffffff83457000 D uonerng_cd +ffffffff83458000 D urng_cd +ffffffff83459000 D udcf_cd +ffffffff8345a000 D umbg_cd +ffffffff8345b000 D uvisor_cd +ffffffff8345c000 D udsbr_cd +ffffffff8345d000 D utwitch_cd +ffffffff8345e000 D aue_cd +ffffffff8345f000 D axe_cd +ffffffff83460000 D axen_cd +ffffffff83461000 D smsc_cd +ffffffff83462000 D cue_devs +ffffffff83462010 D cue_cd +ffffffff83463000 D kue_cd +ffffffff83464000 D cdce_cd +ffffffff83465000 D urndis_cd +ffffffff83466000 D mos_cd +ffffffff83467000 D mue_cd +ffffffff83468000 D udav_cd +ffffffff83469000 D upl_devs +ffffffff83469008 D upl_cd +ffffffff8346a000 D ugl_devs +ffffffff8346a008 D ugl_cd +ffffffff8346b000 D url_cd +ffffffff8346c000 D ure_cd +ffffffff8346d000 D uaq_cd +ffffffff8346e000 D umodem_cd +ffffffff8346f000 D uftdi_cd +ffffffff83470000 D uplcom_cd +ffffffff83471000 D umct_cd +ffffffff83472000 D uvscom_cd +ffffffff83473000 D ubsa_cd +ffffffff83474000 D ukspan_cd +ffffffff83475000 D uslcom_cd +ffffffff83476000 D uark_cd +ffffffff83477000 D moscom_cd +ffffffff83478000 D umcs_cd +ffffffff83479000 D uscom_cd +ffffffff8347a000 D ucrcom_cd +ffffffff8347b000 D uxrcom_cd +ffffffff8347c000 D uipaq_cd +ffffffff8347d000 D umsm_cd +ffffffff8347e000 D uchcom_cd +ffffffff8347f000 D uticom_cd +ffffffff83480000 D wi_func_usb +ffffffff83480060 D wi_usb_cd +ffffffff83481000 D atu_cd +ffffffff83481020 D atu_devs +ffffffff83481270 D atu_radfirm +ffffffff83482000 D ural_cd +ffffffff83483000 D rum_cd +ffffffff83484000 D run_cd +ffffffff83484020 D rt3070_freqs +ffffffff83485000 D mtw_cd +ffffffff83486000 D zyd_cd +ffffffff83487000 D upgt_cd +ffffffff83488000 D urtw_cd +ffffffff83489000 D urtwn_cd +ffffffff8348a000 D rsu_cd +ffffffff8348b000 D otus_cd +ffffffff8348b020 d AR_PLCP_HDR_INTR +ffffffff8348c000 D umb_xfer_tout +ffffffff8348c010 D umb_uuid_basic_connect +ffffffff8348c020 D umb_uuid_context_internet +ffffffff8348c030 D umb_uuid_qmi_mbim +ffffffff8348c040 D umb_cd +ffffffff8348c060 D umb_delay +ffffffff8348c070 D umb_qmi_alloc_cid +ffffffff8348c080 D umb_qmi_fcc_auth +ffffffff8348d000 D uath_cd +ffffffff8348e000 D uow_cd +ffffffff8348f000 D uberry_cd +ffffffff83490000 D upd_cd +ffffffff83490020 d upd_usage_roots +ffffffff834900a0 d upd_usage_batdep +ffffffff83491000 D uwacom_cd +ffffffff83491020 d uwacom_attach.wacom_report_buf +ffffffff83492000 D bwfm_usb_bus_ops +ffffffff83493000 D umstc_cd +ffffffff83494000 D uhidpp_cd +ffffffff83495000 D ucc_cd +ffffffff83496000 D iic_cd +ffffffff83497000 D probe_addrs_sensor +ffffffff83497008 D probe_addrs_eeprom +ffffffff83498000 D lmtemp_cd +ffffffff83499000 D lmn_worklist +ffffffff83499240 D lmn_cd +ffffffff8349a000 D lmenv_cd +ffffffff8349b000 D maxtmp_cd +ffffffff8349c000 D adc_cd +ffffffff8349d000 D admtemp_cd +ffffffff8349e000 D admlc_cd +ffffffff8349f000 D admtm_cd +ffffffff834a0000 D admtmp_cd +ffffffff834a1000 D admtt_cd +ffffffff834a2000 D maxds_cd +ffffffff834a3000 D adt_chips +ffffffff834a3160 D worklist +ffffffff834a31a0 D adt_cd +ffffffff834a4000 D admcts_cd +ffffffff834a5000 D wbng_cd +ffffffff834a6000 D nvt_cd +ffffffff834a7000 D adl_worklist +ffffffff834a7138 D adl_cd +ffffffff834a8000 D andl_cd +ffffffff834a9000 D sdtemp_cd +ffffffff834aa000 D lisa_cd +ffffffff834ab000 D ihidev_cd +ffffffff834ac000 D ikbd_cd +ffffffff834ad000 D ims_cd +ffffffff834ae000 D imt_cd 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pf_tcp_secret_init +ffffffff83514db0 B pf_tcp_secret +ffffffff83514dc0 B pf_tcp_secret_ctx +ffffffff83514e90 B pf_tcp_iss_off +ffffffff83514ea0 B pf_queues +ffffffff83514ec0 B pf_queues_active +ffffffff83514ec8 B pf_queues_inactive +ffffffff83514ed0 B pf_rule_pl +ffffffff83515078 B pf_queue_pl +ffffffff83516000 B pf_frent_pl +ffffffff835161a8 B pf_frnode_pl +ffffffff83516350 B pf_frag_pl +ffffffff835164f8 B pf_state_scrub_pl +ffffffff835166a0 B pf_fragqueue +ffffffff835166b0 B pf_frag_mtx +ffffffff835166c0 B pf_nfrents +ffffffff835166c8 B pf_frnode_tree +ffffffff83517000 B pf_anchors +ffffffff83517008 B pf_main_anchor +ffffffff83517510 B pf_anchor_pl +ffffffff83518000 B pf_ioctl_trans +ffffffff83518008 B pf_default_rule +ffffffff83518548 B pf_tag_pl +ffffffff835186f0 B pf_default_rule_new +ffffffff83518c30 B pf_anchor_stack +ffffffff83518c38 B pf_trans_set +ffffffff83518c60 B pf_tcount +ffffffff8351a000 B pfr_ktable_pl +ffffffff8351a1b0 B pfr_kentry_pl +ffffffff8351a6a8 B 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