--- 7.4/2024-03-01T07:17:08Z/2024-02-06T00:00:00Z/nm-bsd-ot14.txt Sat Mar 2 04:09:19 2024 +++ 7.4/2024-03-01T07:17:08Z/2024-02-07T00:00:00Z/nm-bsd-ot14.txt Sat Mar 2 08:41:54 2024 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -025ee000 T __kernel_kutext_phys -025f2000 C __kernel_cptext_phys -025f3000 C __kernel_rodata_phys -02ee3000 R __kernel_kutext_page_phys -02ee5000 C __kernel_randomdata_phys -031a1000 R __kernel_data_phys -034f7000 D __kernel_kudata_phys -034f8000 C __kernel_bss_phys +025ef000 T __kernel_kutext_phys +025f3000 C __kernel_cptext_phys +025f4000 C __kernel_rodata_phys +02ee4000 R __kernel_kutext_page_phys +02ee6000 C __kernel_randomdata_phys +031a2000 R __kernel_data_phys +034f8000 D __kernel_kudata_phys +034f9000 C __kernel_bss_phys 03a00000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -19059,11941 +19059,11930 @@ ffffffff81941a80 T drm_send_event_locked ffffffff81941aa0 T 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hdmi_audio_infoframe_pack_for_dp -ffffffff81986a10 T hdmi_vendor_infoframe_init -ffffffff81986a70 T hdmi_vendor_infoframe_check -ffffffff81986b10 T hdmi_vendor_infoframe_pack_only -ffffffff81986cd0 T hdmi_vendor_infoframe_pack -ffffffff81986d70 T hdmi_drm_infoframe_init -ffffffff81986dd0 T hdmi_drm_infoframe_check -ffffffff81986e20 T hdmi_drm_infoframe_pack_only -ffffffff81987010 T hdmi_drm_infoframe_pack -ffffffff81987060 T hdmi_infoframe_check -ffffffff819871b0 T hdmi_infoframe_pack_only -ffffffff819873d0 T hdmi_infoframe_pack -ffffffff81987540 T hdmi_infoframe_log -ffffffff81988430 T hdmi_drm_infoframe_unpack_only -ffffffff81988510 T hdmi_infoframe_unpack -ffffffff81989000 T list_sort -ffffffff8198a000 T radix_tree_lookup -ffffffff8198a0b0 T radix_tree_iter_find -ffffffff8198a180 T radix_tree_delete -ffffffff8198a310 T radix_tree_iter_delete -ffffffff8198a330 T radix_tree_insert -ffffffff8198b000 T sort -ffffffff8198b040 t qsort -ffffffff8198d000 T drm_dp_dual_mode_read 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drm_gem_dma_dumb_create +ffffffff8194f440 T drm_gem_dma_fault +ffffffff8194f5e0 T drm_gem_dma_get_sg_table +ffffffff8194f610 T drm_gem_dma_prime_import_sg_table +ffffffff8194f640 T drm_gem_dma_vmap +ffffffff81950000 T drm_gem_fb_destroy +ffffffff819500c0 T drm_gem_fb_create_handle +ffffffff819500e0 T drm_gem_fb_create +ffffffff81950220 T drm_gem_fb_get_obj +ffffffff81951000 T drm_ht_create +ffffffff81951080 T drm_ht_verbose_list +ffffffff81951140 T drm_ht_insert_item +ffffffff81951190 T drm_ht_just_insert_please +ffffffff81951260 T drm_ht_find_item +ffffffff819512b0 T drm_ht_remove_key +ffffffff81951300 T drm_ht_remove_item +ffffffff81951350 T drm_ht_remove +ffffffff81952000 T drm_getunique +ffffffff819520a0 T drm_getclient +ffffffff81952110 T drm_noop +ffffffff81952170 T drm_invalid_op +ffffffff819521a0 T drm_version +ffffffff819523b0 T pledge_ioctl_drm +ffffffff81952480 T drm_ioctl_kernel +ffffffff819524d0 T drm_ioctl +ffffffff81952520 T drm_ioctl_flags +ffffffff81952570 T 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kthread_cancel_work_sync +ffffffff81953aa0 T kthread_flush_work +ffffffff81953ae0 T kthread_flush_worker +ffffffff81953b20 T kthread_lookup +ffffffff81953ba0 T kthread_should_park +ffffffff81953c20 T kthread_parkme +ffffffff81953ce0 T kthread_park +ffffffff81953de0 T kthread_unpark +ffffffff81953e40 T kthread_should_stop +ffffffff81953ec0 T kthread_stop +ffffffff81954020 T dmi_match +ffffffff819540d0 T dmi_first_match +ffffffff819541c0 T dmi_get_system_info +ffffffff81954230 T dmi_check_system +ffffffff81954330 T alloc_pages +ffffffff81954400 T __free_pages +ffffffff81954570 T __pagevec_release +ffffffff81954610 T kmap +ffffffff81954650 T kunmap_va +ffffffff81954670 T kmap_atomic_prot +ffffffff81954700 T kunmap_atomic +ffffffff81954780 T vmap +ffffffff81954860 T vunmap +ffffffff819548b0 T is_vmalloc_addr +ffffffff819548f0 T print_hex_dump +ffffffff819549c0 T memchr_inv +ffffffff81954a30 T panic_cmp +ffffffff81954a50 T linux_root_RB_INSERT_COLOR +ffffffff81954c50 T linux_root_RB_REMOVE_COLOR +ffffffff81954f80 T linux_root_RB_REMOVE +ffffffff819550c0 T linux_root_RB_INSERT +ffffffff81955130 T linux_root_RB_FIND +ffffffff81955180 T linux_root_RB_NFIND +ffffffff819551d0 T linux_root_RB_NEXT +ffffffff81955240 T linux_root_RB_PREV +ffffffff819552b0 T linux_root_RB_MINMAX +ffffffff81955300 T idr_init +ffffffff81955330 T idr_destroy +ffffffff81955470 T idr_tree_SPLAY_REMOVE +ffffffff819554f0 T idr_preload +ffffffff81955580 T idr_alloc +ffffffff81955710 T idr_tree_SPLAY_INSERT +ffffffff819557b0 T idr_replace +ffffffff81955830 T idr_remove +ffffffff819558f0 T idr_find +ffffffff81955960 T idr_get_next +ffffffff81955a90 T idr_for_each +ffffffff81955ba0 T idr_cmp +ffffffff81955be0 T idr_tree_SPLAY +ffffffff81955d10 T idr_tree_SPLAY_MINMAX +ffffffff81955e00 T ida_init +ffffffff81955e30 T ida_destroy +ffffffff81955e40 T ida_simple_get +ffffffff81955e60 T ida_simple_remove +ffffffff81955e80 T ida_alloc_min +ffffffff81955ea0 T ida_alloc_max +ffffffff81955ec0 T ida_free +ffffffff81955ee0 T xarray_cmp +ffffffff81955f20 T xarray_tree_SPLAY_INSERT +ffffffff81955fc0 T xarray_tree_SPLAY +ffffffff819560f0 T xarray_tree_SPLAY_REMOVE +ffffffff81956170 T xarray_tree_SPLAY_MINMAX +ffffffff81956260 T xa_init_flags +ffffffff819562e0 T xa_destroy +ffffffff81956420 T __xa_alloc +ffffffff819565a0 T __xa_alloc_cyclic +ffffffff81956600 T __xa_erase +ffffffff819566c0 T __xa_load +ffffffff81956730 T __xa_store +ffffffff819568b0 T xa_get_next +ffffffff819569e0 T sg_alloc_table +ffffffff81956a60 T sg_free_table +ffffffff81956ac0 T sg_copy_from_buffer +ffffffff81956af0 T i2c_master_xfer +ffffffff81956c20 T __i2c_transfer +ffffffff81956cd0 T i2c_transfer +ffffffff81956da0 T i2c_bb_master_xfer +ffffffff81956e80 T i2c_bb_functionality +ffffffff81956eb0 T i2c_bit_add_bus +ffffffff81956ef0 T vga_disable_bridge +ffffffff81956fa0 T vga_get_uninterruptible +ffffffff81956ff0 T vga_put +ffffffff81957070 T acpi_get_table +ffffffff81957130 T acpi_put_table +ffffffff81957160 T acpi_get_handle +ffffffff819571b0 T acpi_get_name +ffffffff81957250 T acpi_evaluate_object +ffffffff819574b0 T drm_linux_acpi_notify +ffffffff81957530 T register_acpi_notifier +ffffffff81957570 T unregister_acpi_notifier +ffffffff81957600 T acpi_format_exception +ffffffff81957650 T backlight_do_update_status +ffffffff81957670 T backlight_device_register +ffffffff81957720 T backlight_device_unregister +ffffffff81957780 T backlight_schedule_update_status +ffffffff819577a0 T backlight_enable +ffffffff819577e0 T backlight_disable +ffffffff81957820 T backlight_device_get_by_name +ffffffff81957890 T dev_set_drvdata +ffffffff81957930 T dev_get_drvdata +ffffffff81957990 T drm_sysfs_hotplug_event +ffffffff819579b0 T drm_sysfs_connector_hotplug_event +ffffffff819579d0 T drm_sysfs_connector_status_event +ffffffff819579f0 T drm_sysfs_connector_property_event +ffffffff81957a10 T dma_fence_get +ffffffff81957a50 T dma_fence_get_rcu +ffffffff81957a90 T dma_fence_get_rcu_safe +ffffffff81957ad0 T dma_fence_release +ffffffff81957b00 T dma_fence_put +ffffffff81957b70 T dma_fence_signal_timestamp_locked +ffffffff81957c20 T dma_fence_signal +ffffffff81957d50 T dma_fence_signal_locked +ffffffff81957e60 T dma_fence_signal_timestamp +ffffffff81957f40 T dma_fence_is_signaled +ffffffff81957fb0 T dma_fence_is_signaled_locked +ffffffff819580f0 T dma_fence_timestamp +ffffffff81958190 T dma_fence_wait_timeout +ffffffff819581f0 T dma_fence_default_wait +ffffffff819583d0 T dma_fence_wait +ffffffff81958430 T dma_fence_enable_sw_signaling +ffffffff81958580 T dma_fence_init +ffffffff819585e0 T dma_fence_add_callback +ffffffff81958710 T dma_fence_remove_callback +ffffffff81958790 T dma_fence_context_alloc +ffffffff819587d0 t dma_fence_default_wait_cb +ffffffff81958820 T dma_fence_wait_any_timeout +ffffffff81958b30 T dma_fence_set_deadline +ffffffff81958bd0 T dma_fence_get_stub +ffffffff81958d60 T dma_fence_allocate_private_stub +ffffffff81958e80 T dma_fence_array_create +ffffffff81958f90 t irq_dma_fence_array_work +ffffffff81959020 T dma_fence_array_first +ffffffff81959070 T dma_fence_array_next +ffffffff819590c0 t dma_fence_array_get_driver_name +ffffffff819590f0 t dma_fence_array_get_timeline_name +ffffffff81959120 t dma_fence_array_enable_signaling +ffffffff81959220 t dma_fence_array_signaled +ffffffff81959270 t dma_fence_array_release +ffffffff81959330 T dma_fence_chain_find_seqno +ffffffff81959450 T dma_fence_chain_walk +ffffffff81959680 T dma_fence_chain_init +ffffffff81959790 t dma_fence_chain_get_driver_name +ffffffff819597c0 t dma_fence_chain_get_timeline_name +ffffffff819597f0 t dma_fence_chain_enable_signaling +ffffffff819599a0 t dma_fence_chain_signaled +ffffffff81959a90 t dma_fence_chain_release +ffffffff81959bd0 T dma_fence_is_container +ffffffff81959c20 T dmabuf_read +ffffffff81959c50 T dmabuf_write +ffffffff81959c80 T dmabuf_ioctl +ffffffff81959cb0 T dmabuf_kqfilter +ffffffff81959ce0 T dmabuf_stat +ffffffff81959da0 T dmabuf_close +ffffffff81959e10 T dmabuf_seek +ffffffff81959ea0 T dma_buf_export +ffffffff81959f50 T dma_buf_get +ffffffff81959fe0 T dma_buf_put +ffffffff8195a090 T dma_buf_fd +ffffffff8195a1a0 T get_dma_buf +ffffffff8195a1e0 T pcie_get_speed_cap +ffffffff8195a390 T printk +ffffffff8195a430 T pcie_get_width_cap +ffffffff8195a520 T pcie_aspm_enabled +ffffffff8195a5b0 T wait_on_bit +ffffffff8195a680 T wait_on_bit_timeout +ffffffff8195a750 T wake_up_bit +ffffffff8195a790 T clear_and_wake_up_bit +ffffffff8195a7e0 T bit_waitqueue +ffffffff8195a810 T __var_waitqueue +ffffffff8195a840 T drm_linux_init +ffffffff8195a9b0 T drm_linux_exit +ffffffff8195aa10 T pci_resize_resource +ffffffff8195ab60 T register_shrinker +ffffffff8195abb0 T unregister_shrinker +ffffffff8195ac10 T drmbackoff +ffffffff8195aca0 T bitmap_zalloc +ffffffff8195acd0 T bitmap_free +ffffffff8195acf0 T atomic_dec_and_mutex_lock +ffffffff8195ad70 T interval_tree_iter_first +ffffffff8195ae20 T interval_tree_remove +ffffffff8195ae40 T interval_tree_insert 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mipi_dsi_dcs_write_buffer +ffffffff8195d8a0 T mipi_dsi_dcs_write +ffffffff8195d9f0 T mipi_dsi_dcs_read +ffffffff8195da90 T mipi_dsi_dcs_nop +ffffffff8195db40 T mipi_dsi_dcs_soft_reset +ffffffff8195dbf0 T mipi_dsi_dcs_get_power_mode +ffffffff8195dcb0 T mipi_dsi_dcs_get_pixel_format +ffffffff8195dd70 T mipi_dsi_dcs_enter_sleep_mode +ffffffff8195de20 T mipi_dsi_dcs_exit_sleep_mode +ffffffff8195ded0 T mipi_dsi_dcs_set_display_off +ffffffff8195df80 T mipi_dsi_dcs_set_display_on +ffffffff8195e030 T mipi_dsi_dcs_set_column_address +ffffffff8195e0f0 T mipi_dsi_dcs_set_page_address +ffffffff8195e1b0 T mipi_dsi_dcs_set_tear_off +ffffffff8195e260 T mipi_dsi_dcs_set_tear_on +ffffffff8195e310 T mipi_dsi_dcs_set_pixel_format +ffffffff8195f000 T __drm_mm_interval_first +ffffffff8195f0c0 T drm_mm_reserve_node +ffffffff8195f340 t add_hole +ffffffff8195f4a0 T drm_mm_insert_node_in_range +ffffffff8195fa90 T drm_mm_remove_node +ffffffff8195fbc0 T drm_mm_replace_node +ffffffff8195fda0 T drm_mm_scan_init_with_range +ffffffff8195fe30 T drm_mm_scan_add_block +ffffffff8195ffa0 T drm_mm_scan_remove_block +ffffffff81960020 T drm_mm_scan_color_evict +ffffffff81960100 T drm_mm_init +ffffffff819601b0 T drm_mm_takedown +ffffffff819601f0 T drm_mm_print +ffffffff81961000 T drm_modeset_register_all +ffffffff819610a0 T drm_modeset_unregister_all +ffffffff819610e0 T drm_mode_getresources +ffffffff81961390 T drm_mode_config_reset +ffffffff819614f0 T drmm_mode_config_init +ffffffff81961b70 T drm_mode_config_cleanup +ffffffff81961e90 t drm_mode_config_init_release +ffffffff81961ea0 T drm_mode_config_validate +ffffffff81963000 T __drm_mode_object_add +ffffffff81963100 T drm_mode_object_add +ffffffff819631e0 T drm_mode_object_register +ffffffff81963230 T drm_mode_object_unregister +ffffffff819632d0 T drm_mode_object_lease_required +ffffffff81963320 T __drm_mode_object_find +ffffffff819633d0 T drm_mode_object_find +ffffffff81963480 T drm_mode_object_put +ffffffff81963500 T drm_mode_object_get +ffffffff81963560 T drm_object_attach_property +ffffffff81963670 T drm_object_property_set_value +ffffffff81963750 T drm_object_property_get_value +ffffffff819637e0 t __drm_object_property_get_value +ffffffff819638c0 T drm_object_property_get_default_value +ffffffff81963990 T drm_mode_object_get_properties +ffffffff81963ad0 T drm_mode_obj_get_properties_ioctl +ffffffff81963d20 T drm_mode_obj_find_prop_id +ffffffff81963d80 T drm_mode_obj_set_property_ioctl +ffffffff81965000 T drm_mode_debug_printmodeline +ffffffff81965140 T drm_mode_vrefresh +ffffffff819651e0 T drm_mode_create +ffffffff81965200 T drm_mode_destroy +ffffffff81965240 T drm_mode_probed_add +ffffffff819652e0 T drm_analog_tv_mode +ffffffff81965b80 T drm_cvt_mode +ffffffff81966000 T drm_mode_set_name +ffffffff81966050 T drm_gtf_mode_complex +ffffffff81966350 T drm_gtf_mode +ffffffff819663a0 T drm_mode_get_hv_timing +ffffffff819663f0 T drm_mode_init +ffffffff819664c0 T drm_mode_set_crtcinfo +ffffffff81966680 T drm_mode_copy +ffffffff819666e0 T drm_mode_duplicate +ffffffff81966760 T drm_mode_match +ffffffff81966900 T drm_mode_equal +ffffffff81966920 T drm_mode_equal_no_clocks +ffffffff81966940 T drm_mode_equal_no_clocks_no_stereo +ffffffff81966a00 T drm_mode_validate_driver +ffffffff81966af0 T drm_mode_validate_size +ffffffff81966b40 T drm_mode_validate_ycbcr420 +ffffffff81966bb0 T drm_mode_is_420_only +ffffffff81966c00 T drm_get_mode_status_name +ffffffff81966c80 T drm_mode_prune_invalid +ffffffff81966f10 T drm_mode_sort +ffffffff81966f40 t drm_mode_compare +ffffffff819670e0 T drm_connector_list_update +ffffffff819672b0 T drm_mode_parse_command_line_for_connector +ffffffff819672e0 T drm_mode_create_from_cmdline_mode +ffffffff819674a0 T drm_mode_convert_to_umode +ffffffff81967640 T drm_mode_convert_umode +ffffffff81967860 T drm_mode_is_420_also +ffffffff819678b0 T drm_mode_is_420 +ffffffff81968000 T drm_helper_move_panel_connectors_to_head +ffffffff819680f0 T drm_helper_mode_fill_fb_struct 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drm_mode_getplane_res +ffffffff8196fe60 T drm_mode_getplane +ffffffff8196ffb0 T drm_plane_check_pixel_format +ffffffff81970070 T drm_any_plane_has_format +ffffffff819701a0 T drm_mode_setplane +ffffffff81970490 T drm_mode_cursor_ioctl +ffffffff81970500 t drm_mode_cursor_common +ffffffff81970a40 T drm_mode_cursor2_ioctl +ffffffff81970a60 T drm_mode_page_flip_ioctl +ffffffff81970fe0 T drm_plane_enable_fb_damage_clips +ffffffff81971000 T drm_plane_get_damage_clips_count +ffffffff81971040 T __drm_plane_get_damage_clips +ffffffff81971080 T drm_plane_get_damage_clips +ffffffff81971120 T drm_create_scaling_filter_prop +ffffffff81971270 T drm_plane_create_scaling_filter_property +ffffffff819712e0 t kvasprintf +ffffffff81971380 t kasprintf +ffffffff81971450 t create_in_format_blob +ffffffff81971640 t __setplane_atomic +ffffffff819717e0 t __setplane_internal +ffffffff819719f0 t __setplane_check +ffffffff81972000 T drm_plane_helper_update_primary +ffffffff819724c0 t get_connectors_for_crtc +ffffffff819725d0 T drm_plane_helper_disable_primary +ffffffff81972680 T drm_plane_helper_destroy +ffffffff819726b0 T drm_plane_helper_atomic_check +ffffffff81973000 T drm_prime_remove_buf_handle +ffffffff819730a0 T drm_prime_init_file_private +ffffffff81973100 T drm_prime_destroy_file_private +ffffffff81973160 T drm_gem_dmabuf_export +ffffffff819731c0 T drm_gem_dmabuf_release +ffffffff81973200 T drm_gem_prime_fd_to_handle +ffffffff81973420 T drm_gem_prime_import +ffffffff81973480 t drm_prime_add_buf_handle +ffffffff819735c0 T drm_prime_fd_to_handle_ioctl +ffffffff819735f0 T drm_gem_prime_handle_to_fd +ffffffff81973820 T drm_prime_handle_to_fd_ioctl +ffffffff81973890 T drm_gem_map_attach +ffffffff819738e0 T drm_gem_map_detach +ffffffff81973900 T drm_gem_dmabuf_vmap +ffffffff81973920 T drm_gem_dmabuf_vunmap +ffffffff81973940 T drm_gem_prime_mmap +ffffffff81973990 T drm_prime_pages_to_sg +ffffffff819739e0 T drm_prime_get_contiguous_size +ffffffff81973a30 T drm_gem_prime_export +ffffffff81973ac0 T drm_gem_prime_import_dev +ffffffff81973b20 T drm_prime_sg_to_page_array +ffffffff81973b70 T drm_prime_sg_to_dma_addr_array +ffffffff81973bc0 T drm_prime_gem_destroy +ffffffff81974000 T __drm_puts_coredump +ffffffff819740e0 T __drm_printfn_coredump +ffffffff819742b0 T __drm_puts_seq_file +ffffffff819742e0 T __drm_printfn_seq_file +ffffffff81974310 T __drm_printfn_info +ffffffff81974340 T __drm_printfn_debug +ffffffff81974370 T __drm_printfn_err +ffffffff819743b0 T drm_puts +ffffffff819743e0 T drm_printf +ffffffff81974460 T drm_print_bits +ffffffff81974690 T drm_dev_printk +ffffffff81974730 T __drm_dev_dbg +ffffffff819747c0 T ___drm_dbg +ffffffff81974850 T __drm_err +ffffffff819748e0 T drm_print_regset32 +ffffffff81975000 T drm_crtc_mode_valid +ffffffff81975050 T drm_encoder_mode_valid +ffffffff81975090 T drm_connector_mode_valid +ffffffff81975110 T drm_kms_helper_poll_enable +ffffffff81975250 T drm_kms_helper_poll_reschedule +ffffffff819752b0 T drm_helper_probe_detect +ffffffff819754a0 T drm_helper_probe_single_connector_modes +ffffffff81975a20 t __drm_helper_update_and_validate +ffffffff81975dd0 T drm_kms_helper_hotplug_event +ffffffff81975e10 T drm_kms_helper_connector_hotplug_event +ffffffff81975e50 T drm_kms_helper_is_poll_worker +ffffffff81975e80 T drm_kms_helper_poll_disable +ffffffff81975f50 T drm_kms_helper_poll_init +ffffffff81975fb0 t output_poll_execute +ffffffff81976200 T drm_kms_helper_poll_fini +ffffffff81976250 T drm_connector_helper_hpd_irq_event +ffffffff81976310 t check_connector_changed +ffffffff819764e0 T drm_helper_hpd_irq_event +ffffffff81976630 T drm_crtc_helper_mode_valid_fixed +ffffffff81976680 T drm_connector_helper_get_modes_from_ddc +ffffffff81976710 T drm_connector_helper_get_modes_fixed +ffffffff81976880 T drm_connector_helper_get_modes +ffffffff819768f0 T drm_connector_helper_tv_get_modes +ffffffff81976b30 t __delayed_work_tick +ffffffff81977000 T drm_property_create +ffffffff819771f0 T drm_property_create_enum +ffffffff819772a0 T drm_property_add_enum +ffffffff819774a0 T drm_property_destroy +ffffffff81977550 T drm_property_create_bitmask +ffffffff81977680 T drm_property_create_range +ffffffff819776f0 T drm_property_create_signed_range +ffffffff81977760 T drm_property_create_object +ffffffff81977800 T drm_property_create_bool +ffffffff81977860 T drm_mode_getproperty_ioctl +ffffffff81977ab0 T drm_property_create_blob +ffffffff81977bf0 t drm_property_free_blob +ffffffff81977c70 T drm_property_blob_put +ffffffff81977cb0 T drm_property_destroy_user_blobs +ffffffff81977d30 T drm_property_blob_get +ffffffff81977d70 T drm_property_lookup_blob +ffffffff81977d90 T drm_property_replace_global_blob +ffffffff81977ee0 T drm_property_replace_blob +ffffffff81977f50 T drm_mode_getblob_ioctl +ffffffff81978010 T drm_mode_createblob_ioctl +ffffffff81978110 T drm_mode_destroyblob_ioctl +ffffffff81978210 T drm_property_change_valid_get +ffffffff81978470 T drm_property_change_valid_put +ffffffff81979000 T drm_rect_intersect +ffffffff81979080 T drm_rect_clip_scaled +ffffffff819792f0 T drm_rect_calc_hscale +ffffffff819793c0 T drm_rect_calc_vscale +ffffffff81979490 T drm_rect_debug_print +ffffffff819795b0 T drm_rect_rotate +ffffffff81979670 T drm_rect_rotate_inv +ffffffff8197a000 T drm_self_refresh_helper_update_avg_times +ffffffff8197a150 T drm_self_refresh_helper_alter_state +ffffffff8197a2e0 T drm_self_refresh_helper_init +ffffffff8197a470 t drm_self_refresh_helper_entry_work +ffffffff8197a5d0 T drm_self_refresh_helper_cleanup +ffffffff8197a650 t __delayed_work_tick +ffffffff8197b000 T drm_suballoc_manager_init +ffffffff8197b180 T drm_suballoc_manager_fini +ffffffff8197b290 t drm_suballoc_try_free +ffffffff8197b380 T drm_suballoc_new +ffffffff8197bda0 t drm_suballoc_event +ffffffff8197bee0 T drm_suballoc_free +ffffffff8197d000 T drm_syncobj_find +ffffffff8197d080 T drm_syncobj_add_point +ffffffff8197d190 t syncobj_wait_syncobj_func +ffffffff8197d240 t syncobj_eventfd_entry_func +ffffffff8197d320 T drm_syncobj_replace_fence +ffffffff8197d3d0 T drm_syncobj_find_fence +ffffffff8197d720 t drm_syncobj_fence_add_wait +ffffffff8197d7f0 T drm_syncobj_free +ffffffff8197d870 T drm_syncobj_create +ffffffff8197da40 T drm_syncobj_get_handle +ffffffff8197db60 T drm_syncobj_get_fd +ffffffff8197dbb0 T drm_syncobj_open +ffffffff8197dbe0 T drm_syncobj_release +ffffffff8197dc20 t drm_syncobj_release_handle +ffffffff8197dce0 T drm_syncobj_create_ioctl +ffffffff8197de10 T drm_syncobj_destroy_ioctl +ffffffff8197df50 T drm_syncobj_handle_to_fd_ioctl +ffffffff8197e140 T drm_syncobj_fd_to_handle_ioctl +ffffffff8197e2f0 T drm_syncobj_transfer_ioctl +ffffffff8197e6d0 T drm_timeout_abs_to_jiffies +ffffffff8197e7a0 T drm_syncobj_wait_ioctl +ffffffff8197e920 t drm_syncobj_array_find +ffffffff8197eb40 t drm_syncobj_array_free +ffffffff8197ec30 T drm_syncobj_timeline_wait_ioctl +ffffffff8197edb0 T drm_syncobj_eventfd_ioctl +ffffffff8197ede0 T drm_syncobj_reset_ioctl +ffffffff8197eec0 T drm_syncobj_signal_ioctl +ffffffff8197f020 T drm_syncobj_timeline_signal_ioctl +ffffffff8197f260 T drm_syncobj_query_ioctl +ffffffff8197f470 t drm_syncobj_array_wait_timeout +ffffffff8197f8d0 t syncobj_wait_fence_func +ffffffff8197f8f0 t syncobj_eventfd_entry_fence_func +ffffffff81980000 T drm_vblank_count +ffffffff81980090 T drm_crtc_accurate_vblank_count +ffffffff819801a0 t drm_update_vblank_count +ffffffff819805e0 T drm_vblank_disable_and_save +ffffffff81980730 T drm_vblank_init +ffffffff819808b0 t vblank_disable_fn +ffffffff81980930 t drm_vblank_init_release +ffffffff819809c0 T drm_dev_has_vblank +ffffffff819809f0 T drm_crtc_vblank_waitqueue +ffffffff81980a40 T drm_calc_timestamping_constants +ffffffff81980c60 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff819811b0 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff819811d0 T drm_crtc_vblank_count +ffffffff81981260 T drm_crtc_vblank_count_and_time +ffffffff81981320 t drm_vblank_count_and_time +ffffffff819813d0 T drm_crtc_next_vblank_start +ffffffff81981520 T drm_crtc_arm_vblank_event +ffffffff81981600 T drm_crtc_send_vblank_event +ffffffff819817b0 t send_vblank_event +ffffffff81981860 T drm_vblank_get +ffffffff81981960 t drm_vblank_enable +ffffffff81981b60 T drm_crtc_vblank_get +ffffffff81981c60 T drm_vblank_put +ffffffff81981d90 T drm_crtc_vblank_put +ffffffff81981db0 T drm_wait_one_vblank +ffffffff819822a0 T drm_crtc_wait_one_vblank +ffffffff819822c0 T drm_crtc_vblank_off +ffffffff819826b0 T drm_crtc_vblank_reset +ffffffff819827e0 T drm_crtc_set_max_vblank_count +ffffffff819828c0 T drm_crtc_vblank_on +ffffffff81982a10 t drm_reset_vblank_timestamp +ffffffff81982bf0 T drm_crtc_vblank_restore +ffffffff81982fd0 T drm_legacy_modeset_ctl_ioctl +ffffffff819831f0 T drm_wait_vblank_ioctl +ffffffff81983740 t drm_wait_vblank_reply +ffffffff81983850 t drm_queue_vblank_event +ffffffff81983b90 T drm_handle_vblank +ffffffff81983e80 t drm_handle_vblank_events +ffffffff81984110 T drm_crtc_handle_vblank +ffffffff81984130 T drm_crtc_get_sequence_ioctl +ffffffff81984300 T drm_crtc_queue_sequence_ioctl +ffffffff819845c0 t __get_vblank_counter +ffffffff81985000 T drm_handle_vblank_works +ffffffff819851a0 T drm_vblank_cancel_pending_works +ffffffff819852e0 T drm_vblank_work_schedule +ffffffff81985550 T drm_vblank_work_cancel_sync +ffffffff819856a0 T drm_vblank_work_flush +ffffffff819857d0 T drm_vblank_work_init +ffffffff81985840 T drm_vblank_worker_init +ffffffff81986000 T drm_vma_offset_manager_init +ffffffff81986040 T drm_vma_offset_manager_destroy +ffffffff81986060 T drm_vma_offset_lookup_locked +ffffffff819860f0 T drm_vma_offset_add +ffffffff81986180 T drm_vma_offset_remove +ffffffff819861d0 T drm_vma_node_allow +ffffffff819861f0 t vma_node_allow +ffffffff81986310 T drm_vma_node_allow_once +ffffffff81986330 T drm_vma_node_revoke +ffffffff819863b0 T drm_vma_node_is_allowed +ffffffff81987000 T hdmi_avi_infoframe_init +ffffffff81987070 T hdmi_avi_infoframe_check +ffffffff819870c0 T hdmi_avi_infoframe_pack_only +ffffffff819872c0 T hdmi_avi_infoframe_pack +ffffffff81987320 T hdmi_spd_infoframe_init +ffffffff819873e0 T hdmi_spd_infoframe_check +ffffffff81987430 T hdmi_spd_infoframe_pack_only +ffffffff81987570 T hdmi_spd_infoframe_pack +ffffffff819876d0 T hdmi_audio_infoframe_init +ffffffff81987720 T hdmi_audio_infoframe_check +ffffffff81987770 T hdmi_audio_infoframe_pack_only +ffffffff819878d0 T hdmi_audio_infoframe_pack +ffffffff81987920 T hdmi_audio_infoframe_pack_for_dp +ffffffff81987a10 T hdmi_vendor_infoframe_init +ffffffff81987a70 T hdmi_vendor_infoframe_check +ffffffff81987b10 T hdmi_vendor_infoframe_pack_only +ffffffff81987cd0 T hdmi_vendor_infoframe_pack +ffffffff81987d70 T hdmi_drm_infoframe_init +ffffffff81987dd0 T hdmi_drm_infoframe_check +ffffffff81987e20 T hdmi_drm_infoframe_pack_only +ffffffff81988010 T hdmi_drm_infoframe_pack +ffffffff81988060 T hdmi_infoframe_check +ffffffff819881b0 T hdmi_infoframe_pack_only +ffffffff819883d0 T hdmi_infoframe_pack +ffffffff81988540 T hdmi_infoframe_log +ffffffff81989430 T hdmi_drm_infoframe_unpack_only +ffffffff81989510 T hdmi_infoframe_unpack +ffffffff8198a000 T list_sort +ffffffff8198b000 T radix_tree_lookup +ffffffff8198b0b0 T radix_tree_iter_find +ffffffff8198b180 T radix_tree_delete +ffffffff8198b310 T radix_tree_iter_delete +ffffffff8198b330 T radix_tree_insert +ffffffff8198c000 T sort +ffffffff8198c040 t qsort +ffffffff8198e000 T drm_dp_dual_mode_read +ffffffff8198e110 T drm_dp_dual_mode_write +ffffffff8198e1f0 T drm_dp_dual_mode_detect +ffffffff8198e490 T drm_dp_dual_mode_max_tmds_clock +ffffffff8198e5b0 T drm_dp_dual_mode_get_tmds_output +ffffffff8198e6d0 T drm_dp_dual_mode_set_tmds_output +ffffffff8198e950 T drm_dp_get_dual_mode_type_name +ffffffff8198e9c0 T drm_lspcon_get_mode +ffffffff8198ebe0 T drm_lspcon_set_mode +ffffffff8198f000 T drm_dp_channel_eq_ok +ffffffff8198f080 T drm_dp_clock_recovery_ok +ffffffff8198f0f0 T drm_dp_get_adjust_request_voltage +ffffffff8198f130 T drm_dp_get_adjust_request_pre_emphasis +ffffffff8198f180 T drm_dp_get_adjust_tx_ffe_preset +ffffffff8198f1c0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff8198f240 T drm_dp_128b132b_lane_symbol_locked +ffffffff8198f2b0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff8198f2e0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff8198f310 T drm_dp_128b132b_link_training_failed +ffffffff8198f340 T drm_dp_read_clock_recovery_delay +ffffffff8198f450 T drm_dp_read_channel_eq_delay +ffffffff8198f550 T drm_dp_128b132b_read_aux_rd_interval +ffffffff8198f600 T drm_dp_link_train_clock_recovery_delay +ffffffff8198f690 t __8b10b_clock_recovery_delay_us +ffffffff8198f710 T drm_dp_link_train_channel_eq_delay +ffffffff8198f780 T drm_dp_phy_name +ffffffff8198f7c0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff8198f7e0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff8198f850 T drm_dp_link_rate_to_bw_code +ffffffff8198f8c0 T drm_dp_bw_code_to_link_rate +ffffffff8198f920 T drm_dp_dpcd_probe +ffffffff8198fa60 t drm_dp_dpcd_access +ffffffff8198fb90 T drm_dp_dpcd_read +ffffffff8198fcc0 T drm_dp_dpcd_write +ffffffff8198fdd0 T drm_dp_dpcd_read_link_status +ffffffff8198fdf0 T drm_dp_dpcd_read_phy_link_status +ffffffff8198fef0 T drm_dp_downstream_is_type +ffffffff8198ff40 T drm_dp_downstream_is_tmds +ffffffff8198ffb0 T drm_dp_send_real_edid_checksum +ffffffff81990200 T drm_dp_read_dpcd_caps +ffffffff81990390 T drm_dp_read_downstream_info +ffffffff81990490 T drm_dp_downstream_max_dotclock +ffffffff819904e0 T drm_dp_downstream_max_tmds_clock +ffffffff81990580 T drm_dp_downstream_min_tmds_clock +ffffffff81990600 T drm_dp_downstream_max_bpc +ffffffff819906a0 T drm_dp_downstream_420_passthrough +ffffffff81990700 T drm_dp_downstream_444_to_420_conversion +ffffffff81990760 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff819907c0 T drm_dp_downstream_mode +ffffffff81990850 T drm_dp_downstream_id +ffffffff81990870 T drm_dp_downstream_debug +ffffffff81990910 T drm_dp_subconnector_type +ffffffff81990980 T drm_dp_set_subconnector_property +ffffffff819909f0 T drm_dp_read_sink_count_cap +ffffffff81990a40 T drm_dp_read_sink_count +ffffffff81990aa0 T drm_dp_remote_aux_init +ffffffff81990ad0 t drm_dp_aux_crc_work +ffffffff81990c40 T drm_dp_aux_init +ffffffff81990cf0 T drm_dp_aux_register +ffffffff81990e10 T drm_dp_aux_unregister +ffffffff81990e40 T drm_dp_psr_setup_time +ffffffff81990e90 T drm_dp_start_crc +ffffffff81990f40 T drm_dp_stop_crc +ffffffff81990fd0 T drm_dp_read_desc +ffffffff81991190 T drm_dp_dsc_sink_max_slice_count +ffffffff81991220 T drm_dp_dsc_sink_line_buf_depth +ffffffff81991260 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff819912d0 T drm_dp_read_lttpr_common_caps +ffffffff81991390 T drm_dp_read_lttpr_phy_caps +ffffffff81991450 T drm_dp_lttpr_count +ffffffff819914e0 T drm_dp_lttpr_max_link_rate +ffffffff81991540 T drm_dp_lttpr_max_lane_count +ffffffff81991570 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff819915a0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff819915d0 T drm_dp_get_phy_test_pattern +ffffffff819916f0 T drm_dp_set_phy_test_pattern +ffffffff819917b0 T drm_dp_vsc_sdp_log +ffffffff81991ad0 T drm_dp_get_pcon_max_frl_bw +ffffffff81991b20 T drm_dp_pcon_frl_prepare +ffffffff81991b70 T drm_dp_pcon_is_frl_ready +ffffffff81991bd0 T drm_dp_pcon_frl_configure_1 +ffffffff81991cd0 T drm_dp_pcon_frl_configure_2 +ffffffff81991d30 T drm_dp_pcon_reset_frl_config +ffffffff81991d80 T drm_dp_pcon_frl_enable +ffffffff81991e40 T drm_dp_pcon_hdmi_link_active +ffffffff81991e90 T drm_dp_pcon_hdmi_link_mode +ffffffff81991f00 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff81991ff0 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff81992020 T drm_dp_pcon_dsc_max_slices +ffffffff819920b0 T drm_dp_pcon_dsc_max_slice_width +ffffffff819920e0 T drm_dp_pcon_dsc_bpp_incr +ffffffff81992120 T drm_dp_pcon_pps_default +ffffffff819921a0 T drm_dp_pcon_pps_override_buf +ffffffff81992240 T drm_dp_pcon_pps_override_param +ffffffff81992310 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff819923b0 T drm_edp_backlight_set_level +ffffffff81992480 T drm_edp_backlight_enable +ffffffff81992690 t drm_edp_backlight_set_enable +ffffffff819927c0 T drm_edp_backlight_disable +ffffffff81992800 T drm_edp_backlight_init +ffffffff81992d60 T drm_panel_dp_aux_backlight +ffffffff81992ef0 t __128b132b_channel_eq_delay_us +ffffffff81992f70 t __8b10b_channel_eq_delay_us +ffffffff81992ff0 t drm_dp_aux_get_crc +ffffffff819930d0 t drm_dp_i2c_xfer +ffffffff81993340 t drm_dp_i2c_functionality +ffffffff81993370 t drm_dp_i2c_do_msg +ffffffff81993740 t lock_bus +ffffffff81993760 t trylock_bus +ffffffff819937b0 t unlock_bus +ffffffff819937d0 t dp_aux_backlight_update_status +ffffffff81994000 T drm_dp_encode_sideband_req +ffffffff81994440 T drm_dp_decode_sideband_req +ffffffff81994970 T drm_dp_dump_sideband_msg_req_body +ffffffff81994d40 T drm_dp_mst_get_port_malloc +ffffffff81994d90 T drm_dp_mst_put_port_malloc +ffffffff81994e80 t kref_put +ffffffff81994ec0 T drm_atomic_get_mst_payload_state +ffffffff81994f10 T drm_dp_mst_dpcd_read +ffffffff819951d0 T drm_dp_mst_dpcd_write +ffffffff81995220 t drm_dp_send_dpcd_write +ffffffff81995460 T drm_dp_mst_connector_late_register +ffffffff819954e0 T drm_dp_mst_connector_early_unregister +ffffffff81995520 T drm_dp_send_power_updown_phy +ffffffff81995760 t drm_dp_mst_topology_put_port +ffffffff81995880 t drm_dp_mst_wait_tx_reply +ffffffff81995c20 T drm_dp_send_query_stream_enc_status +ffffffff81995ee0 T drm_dp_add_payload_part1 +ffffffff81996090 T drm_dp_remove_payload +ffffffff81996230 T drm_dp_add_payload_part2 +ffffffff819963e0 T drm_dp_get_vc_payload_bw +ffffffff81996480 T drm_dp_read_mst_cap +ffffffff819964e0 T drm_dp_mst_topology_mgr_set_mst +ffffffff81996790 t drm_dp_dpcd_write_payload +ffffffff81996930 t drm_dp_mst_topology_put_mstb +ffffffff81996a30 T drm_dp_mst_topology_mgr_suspend +ffffffff81996af0 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff81996b60 T drm_dp_mst_topology_mgr_resume +ffffffff81996da0 T drm_dp_mst_hpd_irq_handle_event +ffffffff81997d10 T drm_dp_mst_hpd_irq_send_new_request +ffffffff81997d90 T drm_dp_mst_detect_port +ffffffff81997ef0 T drm_dp_mst_edid_read +ffffffff81997ff0 T drm_dp_mst_get_edid +ffffffff81998050 T drm_dp_atomic_find_time_slots +ffffffff81998300 T drm_atomic_get_mst_topology_state +ffffffff81998310 T drm_dp_atomic_release_time_slots +ffffffff81998520 T drm_dp_mst_atomic_setup_commit +ffffffff819986b0 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff81998820 T drm_dp_mst_root_conn_atomic_check +ffffffff81998940 T drm_dp_mst_update_slots +ffffffff819989a0 T drm_dp_check_act_status +ffffffff81998b30 T drm_dp_calc_pbn_mode +ffffffff81998b90 T drm_dp_mst_dump_topology +ffffffff81998e10 t drm_dp_mst_dump_mstb +ffffffff81998e80 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff81998fb0 T drm_dp_mst_dsc_aux_for_port +ffffffff819991e0 T drm_dp_mst_atomic_enable_dsc +ffffffff81999360 T drm_dp_mst_atomic_check +ffffffff81999650 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff819998d0 t drm_dp_mst_duplicate_state +ffffffff81999aa0 t drm_dp_mst_destroy_state +ffffffff81999b60 T drm_atomic_get_old_mst_topology_state +ffffffff81999b70 T drm_atomic_get_new_mst_topology_state +ffffffff81999b80 T drm_dp_mst_topology_mgr_init +ffffffff81999df0 t drm_dp_mst_link_probe_work +ffffffff8199a080 t drm_dp_tx_work +ffffffff8199a0d0 t drm_dp_delayed_destroy_work +ffffffff8199a580 t drm_dp_mst_up_req_work +ffffffff8199aaa0 T drm_dp_mst_topology_mgr_destroy +ffffffff8199ab30 t drm_dp_mst_is_virtual_dpcd +ffffffff8199ac10 t drm_dp_free_mst_branch_device +ffffffff8199ac50 t drm_dp_mst_topology_get_port_validated_locked +ffffffff8199acd0 t drm_dp_mst_dump_sideband_msg_tx +ffffffff8199aee0 t process_single_down_tx_qlock +ffffffff8199b050 t process_single_tx_qlock +ffffffff8199b520 t drm_dp_msg_data_crc4 +ffffffff8199b650 t drm_dp_payload_send_msg +ffffffff8199bab0 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff8199bb30 t drm_dp_get_one_sb_msg +ffffffff8199c270 t drm_dp_get_mst_branch_device +ffffffff8199c3d0 t drm_dp_check_and_send_link_address +ffffffff8199c4a0 t drm_dp_send_link_address +ffffffff8199d160 t drm_dp_send_enum_path_resources +ffffffff8199d3c0 t drm_dp_port_set_pdt +ffffffff8199d690 t drm_dp_mst_port_add_connector +ffffffff8199d870 t drm_dp_mst_i2c_xfer +ffffffff8199df90 t drm_dp_mst_i2c_functionality +ffffffff8199dfc0 t get_mst_branch_device_by_guid_helper +ffffffff8199f000 T drm_dsc_dp_pps_header_init +ffffffff8199f030 T drm_dsc_dp_rc_buffer_size +ffffffff8199f090 T drm_dsc_pps_payload_pack +ffffffff8199f340 T drm_dsc_set_const_params +ffffffff8199f390 T drm_dsc_set_rc_buf_thresh +ffffffff8199f400 T drm_dsc_setup_rc_params +ffffffff8199f5c0 T drm_dsc_compute_rc_parameters +ffffffff8199f8c0 T drm_dsc_get_bpp_int +ffffffff8199f940 T drm_dsc_initial_scale_value +ffffffff8199f980 T drm_dsc_flatness_det_thresh +ffffffff819a0000 T drm_connector_attach_content_protection_property +ffffffff819a0030 T drm_hdcp_check_ksvs_revoked +ffffffff819a0080 T drm_hdcp_update_content_protection +ffffffff819a1000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff819a1120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff819a1180 T drm_hdmi_avi_infoframe_bars +ffffffff819a11d0 T drm_hdmi_avi_infoframe_content_type +ffffffff819a2000 T drm_scdc_read +ffffffff819a2090 T drm_scdc_write +ffffffff819a2170 T drm_scdc_get_scrambling_status +ffffffff819a2250 T drm_scdc_set_scrambling +ffffffff819a23e0 T drm_scdc_set_high_tmds_clock_ratio +ffffffff819a3000 T drm_gem_ttm_mmap +ffffffff819a3070 T drm_gem_ttm_vmap +ffffffff819a3080 T drm_gem_ttm_vunmap +ffffffff819a4000 T ttm_agp_bind +ffffffff819a4050 T ttm_agp_unbind +ffffffff819a4070 T ttm_agp_is_bound +ffffffff819a40c0 T ttm_agp_destroy +ffffffff819a40e0 T ttm_agp_tt_create +ffffffff819a5000 T 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intel_digital_connector_duplicate_state +ffffffff819d9290 T intel_connector_needs_modeset +ffffffff819d9300 T intel_any_crtc_needs_modeset +ffffffff819d9390 T intel_atomic_get_digital_connector_state +ffffffff819d93a0 T intel_crtc_duplicate_state +ffffffff819d94c0 T intel_crtc_free_hw_state +ffffffff819d9520 T intel_crtc_destroy_state +ffffffff819d95d0 T intel_atomic_state_alloc +ffffffff819d9650 T intel_atomic_state_free +ffffffff819d9690 T intel_atomic_state_clear +ffffffff819d96e0 T intel_atomic_get_crtc_state +ffffffff819da000 T intel_plane_alloc +ffffffff819da0c0 T intel_plane_free +ffffffff819da100 T intel_plane_destroy_state +ffffffff819da1d0 T intel_plane_duplicate_state +ffffffff819da280 T intel_adjusted_rate +ffffffff819da300 T intel_plane_pixel_rate +ffffffff819da390 T intel_plane_data_rate +ffffffff819da450 T intel_plane_calc_min_cdclk +ffffffff819da5b0 T intel_plane_copy_uapi_to_hw_state +ffffffff819da720 T intel_plane_copy_hw_state +ffffffff819da810 T intel_plane_set_invisible +ffffffff819da910 T intel_plane_atomic_check_with_state +ffffffff819db580 T intel_plane_atomic_check +ffffffff819db6e0 T intel_plane_update_noarm +ffffffff819db720 T intel_plane_update_arm +ffffffff819db760 T intel_plane_disable_arm +ffffffff819db780 T intel_crtc_planes_update_noarm +ffffffff819db8a0 T intel_crtc_planes_update_arm +ffffffff819dbc90 T intel_atomic_plane_check_clipping +ffffffff819dbef0 T intel_plane_check_src_coordinates +ffffffff819dc0b0 T intel_plane_helper_add +ffffffff819dc0f0 t intel_prepare_plane_fb +ffffffff819dc350 t intel_cleanup_plane_fb +ffffffff819dd000 T intel_audio_sdp_split_update +ffffffff819dd0d0 T intel_audio_compute_config +ffffffff819dd180 T intel_audio_codec_enable +ffffffff819dd370 T intel_audio_codec_disable +ffffffff819dd5c0 T intel_audio_codec_get_config +ffffffff819dd610 T intel_audio_hooks_init +ffffffff819dd690 T intel_audio_cdclk_change_pre +ffffffff819dd720 T intel_audio_cdclk_change_post +ffffffff819dd800 T intel_audio_init +ffffffff819dd810 T intel_audio_deinit +ffffffff819dd860 t g4x_audio_codec_enable +ffffffff819dda20 t g4x_audio_codec_disable +ffffffff819ddaa0 t g4x_audio_codec_get_config +ffffffff819ddbb0 t ibx_audio_codec_enable +ffffffff819ddd70 t ibx_audio_codec_disable +ffffffff819ddf40 t intel_acomp_get_config +ffffffff819ddfc0 t audio_config_hdmi_pixel_clock +ffffffff819de190 t hsw_audio_codec_enable +ffffffff819de9d0 t hsw_audio_codec_disable +ffffffff819df000 T intel_backlight_invert_pwm_level +ffffffff819df0c0 T intel_backlight_set_pwm_level +ffffffff819df130 T intel_backlight_level_to_pwm +ffffffff819df320 T intel_backlight_level_from_pwm +ffffffff819df4c0 T intel_backlight_set_acpi +ffffffff819df6d0 T intel_backlight_disable +ffffffff819df7b0 T intel_backlight_enable +ffffffff819df850 t __intel_backlight_enable +ffffffff819df990 T intel_backlight_device_register +ffffffff819dfc50 t kasprintf +ffffffff819dfd20 T intel_backlight_device_unregister +ffffffff819dfd70 T intel_backlight_update +ffffffff819dfe10 T intel_backlight_setup +ffffffff819dffc0 T intel_backlight_destroy +ffffffff819dfff0 T intel_backlight_init_funcs +ffffffff819e0150 t intel_backlight_device_update_status +ffffffff819e0380 t intel_backlight_device_get_brightness +ffffffff819e0500 t bxt_setup_backlight +ffffffff819e0740 t bxt_get_backlight +ffffffff819e0780 t bxt_set_backlight +ffffffff819e07c0 t bxt_disable_backlight +ffffffff819e08f0 t bxt_enable_backlight +ffffffff819e0b70 t bxt_hz_to_pwm +ffffffff819e0bb0 t cnp_setup_backlight +ffffffff819e0e60 t cnp_disable_backlight +ffffffff819e0f20 t cnp_enable_backlight +ffffffff819e10e0 t cnp_hz_to_pwm +ffffffff819e1120 t lpt_setup_backlight +ffffffff819e1480 t lpt_get_backlight +ffffffff819e14e0 t lpt_set_backlight +ffffffff819e1550 t lpt_disable_backlight +ffffffff819e1670 t lpt_enable_backlight +ffffffff819e1870 t lpt_hz_to_pwm +ffffffff819e18e0 t pch_get_backlight +ffffffff819e1940 t spt_hz_to_pwm +ffffffff819e1990 t pch_setup_backlight +ffffffff819e1ba0 t pch_set_backlight +ffffffff819e1c10 t pch_disable_backlight +ffffffff819e1d00 t pch_enable_backlight +ffffffff819e1f50 t pch_hz_to_pwm +ffffffff819e1f90 t ext_pwm_setup_backlight +ffffffff819e2040 t ext_pwm_get_backlight +ffffffff819e2090 t ext_pwm_set_backlight +ffffffff819e20b0 t ext_pwm_disable_backlight +ffffffff819e20d0 t ext_pwm_enable_backlight +ffffffff819e2100 t vlv_setup_backlight +ffffffff819e2350 t vlv_get_backlight +ffffffff819e23f0 t vlv_set_backlight +ffffffff819e2470 t vlv_disable_backlight +ffffffff819e2530 t vlv_enable_backlight +ffffffff819e26d0 t vlv_hz_to_pwm +ffffffff819e2770 t i965_setup_backlight +ffffffff819e29b0 t i9xx_get_backlight +ffffffff819e2a50 t i9xx_set_backlight +ffffffff819e2b90 t i965_disable_backlight +ffffffff819e2c40 t i965_enable_backlight +ffffffff819e2df0 t i965_hz_to_pwm +ffffffff819e2e50 t i9xx_setup_backlight +ffffffff819e3190 t i9xx_disable_backlight +ffffffff819e3200 t i9xx_enable_backlight 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intel_bios_init_panel +ffffffff819e85a0 T intel_bios_init_panel_late +ffffffff819e85c0 T intel_bios_driver_remove +ffffffff819e86b0 T intel_bios_fini_panel +ffffffff819e8790 T intel_bios_is_tv_present +ffffffff819e8810 T intel_bios_is_lvds_present +ffffffff819e88c0 T intel_bios_is_port_present +ffffffff819e8990 T intel_bios_encoder_supports_dp_dual_mode +ffffffff819e8a00 T intel_bios_is_dsi_present +ffffffff819e8ad0 T intel_bios_get_dsc_params +ffffffff819e8cf0 T intel_bios_dp_aux_ch +ffffffff819e8df0 T intel_bios_dp_has_shared_aux_ch +ffffffff819e8e80 T intel_bios_dp_boost_level +ffffffff819e8f10 T intel_bios_hdmi_boost_level +ffffffff819e8fa0 T intel_bios_hdmi_ddc_pin +ffffffff819e9100 T intel_bios_encoder_supports_typec_usb +ffffffff819e9150 T intel_bios_encoder_supports_tbt +ffffffff819e91a0 T intel_bios_encoder_lane_reversal +ffffffff819e91e0 T intel_bios_encoder_hpd_invert +ffffffff819e9220 T intel_bios_encoder_data_lookup +ffffffff819e92e0 T intel_bios_for_each_encoder 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intel_cdclk_init_hw +ffffffff819ed7d0 T intel_cdclk_uninit_hw +ffffffff819ed8e0 T intel_cdclk_needs_modeset +ffffffff819ed920 T intel_cdclk_dump_config +ffffffff819ed9a0 T intel_set_cdclk_pre_plane_update +ffffffff819edc80 t intel_set_cdclk +ffffffff819ee050 T intel_set_cdclk_post_plane_update +ffffffff819ee2d0 T intel_crtc_compute_min_cdclk +ffffffff819ee660 T intel_atomic_get_cdclk_state +ffffffff819ee680 T intel_cdclk_atomic_check +ffffffff819ee780 T intel_cdclk_init +ffffffff819ee7f0 T intel_modeset_calc_cdclk +ffffffff819eee20 t intel_cdclk_can_crawl +ffffffff819eeeb0 T intel_update_max_cdclk +ffffffff819ef210 T intel_update_cdclk +ffffffff819ef2b0 T intel_read_rawclk +ffffffff819ef430 t i9xx_hrawclk +ffffffff819ef4e0 T intel_cdclk_debugfs_register +ffffffff819ef510 T intel_init_cdclk_hooks +ffffffff819ef930 t bxt_set_cdclk +ffffffff819effa0 t _bxt_set_cdclk +ffffffff819f0750 t skl_set_cdclk +ffffffff819f0d50 t intel_cdclk_duplicate_state +ffffffff819f0dd0 t intel_cdclk_destroy_state +ffffffff819f0df0 t bxt_get_cdclk +ffffffff819f1020 t bxt_modeset_calc_cdclk +ffffffff819f1470 t tgl_calc_voltage_level +ffffffff819f14c0 t intel_compute_min_cdclk +ffffffff819f16c0 t rplu_calc_voltage_level +ffffffff819f1710 t ehl_calc_voltage_level +ffffffff819f1760 t icl_calc_voltage_level +ffffffff819f17b0 t bxt_calc_voltage_level +ffffffff819f1800 t skl_get_cdclk +ffffffff819f1a10 t skl_modeset_calc_cdclk +ffffffff819f1c20 t bdw_get_cdclk +ffffffff819f1d10 t bdw_set_cdclk +ffffffff819f22a0 t bdw_modeset_calc_cdclk +ffffffff819f23a0 t hsw_get_cdclk +ffffffff819f2470 t fixed_modeset_calc_cdclk +ffffffff819f24b0 t vlv_get_cdclk +ffffffff819f2570 t chv_set_cdclk +ffffffff819f28e0 t vlv_modeset_calc_cdclk +ffffffff819f2ab0 t vlv_set_cdclk +ffffffff819f2ff0 t fixed_400mhz_get_cdclk +ffffffff819f3020 t fixed_450mhz_get_cdclk +ffffffff819f3050 t gm45_get_cdclk +ffffffff819f3150 t intel_hpll_vco +ffffffff819f3280 t g33_get_cdclk +ffffffff819f3390 t i965gm_get_cdclk +ffffffff819f3490 t pnv_get_cdclk +ffffffff819f3540 t i945gm_get_cdclk +ffffffff819f35b0 t i915gm_get_cdclk +ffffffff819f3620 t fixed_333mhz_get_cdclk +ffffffff819f3650 t fixed_266mhz_get_cdclk +ffffffff819f3680 t i85x_get_cdclk +ffffffff819f3700 t fixed_200mhz_get_cdclk +ffffffff819f3730 t fixed_133mhz_get_cdclk +ffffffff819f4000 T intel_color_load_luts +ffffffff819f4030 T intel_color_commit_noarm +ffffffff819f4080 T intel_color_commit_arm +ffffffff819f40b0 T intel_color_post_update +ffffffff819f4100 T intel_color_prepare_commit +ffffffff819f4130 T intel_color_cleanup_commit +ffffffff819f4180 T intel_color_check +ffffffff819f41a0 T intel_color_get_config +ffffffff819f4220 T intel_color_lut_equal +ffffffff819f4280 T intel_color_assert_luts +ffffffff819f4570 T intel_color_crtc_init +ffffffff819f45e0 T intel_color_init +ffffffff819f4710 T intel_color_init_hooks +ffffffff819f4840 t chv_color_check +ffffffff819f4d50 t i9xx_color_commit_arm +ffffffff819f4d60 t chv_load_luts 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intel_crt_mode_valid +ffffffff81a015d0 t intel_crt_get_edid +ffffffff81a01670 t intel_crt_detect_hotplug +ffffffff81a01ac0 t intel_crt_detect_ddc +ffffffff81a01b90 t intel_crt_load_detect +ffffffff81a03000 T intel_first_crtc +ffffffff81a03020 T intel_crtc_for_pipe +ffffffff81a03080 T intel_crtc_wait_for_next_vblank +ffffffff81a03090 T intel_wait_for_vblank_if_active +ffffffff81a03100 T intel_crtc_get_vblank_counter +ffffffff81a03180 T intel_crtc_max_vblank_count +ffffffff81a03210 T intel_crtc_vblank_on +ffffffff81a032a0 t assert_vblank_disabled +ffffffff81a03380 T intel_crtc_vblank_off +ffffffff81a033b0 T intel_crtc_state_alloc +ffffffff81a03450 T intel_crtc_state_reset +ffffffff81a034d0 T intel_crtc_init +ffffffff81a03850 T intel_wait_for_vblank_workers +ffffffff81a03910 T intel_usecs_to_scanlines +ffffffff81a03960 T intel_pipe_update_start +ffffffff81a03d50 T intel_pipe_update_end +ffffffff81a04060 t intel_crtc_destroy +ffffffff81a04090 t intel_crtc_late_register +ffffffff81a040c0 t intel_crtc_vblank_work +ffffffff81a05000 T intel_output_format_name +ffffffff81a05040 T intel_crtc_state_dump +ffffffff81a06430 t ilk_dump_csc +ffffffff81a07000 T intel_cursor_plane_create +ffffffff81a07200 t i845_cursor_max_stride +ffffffff81a07230 t i845_cursor_update_arm +ffffffff81a074b0 t i845_cursor_disable_arm +ffffffff81a074d0 t i845_cursor_get_hw_state +ffffffff81a07580 t i845_check_cursor +ffffffff81a07720 t i9xx_cursor_max_stride +ffffffff81a07760 t i9xx_cursor_update_arm +ffffffff81a07b20 t i9xx_cursor_disable_arm +ffffffff81a07b40 t i9xx_cursor_get_hw_state +ffffffff81a07c30 t i9xx_check_cursor +ffffffff81a07eb0 t intel_check_cursor +ffffffff81a080c0 t intel_legacy_cursor_update +ffffffff81a08480 t intel_cursor_format_mod_supported +ffffffff81a09000 T intel_is_c10phy +ffffffff81a09040 T intel_cx0_phy_set_signal_levels +ffffffff81a09630 t intel_cx0_rmw +ffffffff81a09720 T intel_c10pll_readout_hw_state +ffffffff81a098b0 T intel_c10pll_dump_hw_state +ffffffff81a09b30 T intel_cx0_phy_check_hdmi_link_rate +ffffffff81a09ca0 T intel_cx0pll_calc_state +ffffffff81a0a0b0 T intel_c20pll_readout_hw_state +ffffffff81a0a5d0 t intel_c20_sram_read +ffffffff81a0a6e0 T intel_c20pll_dump_hw_state +ffffffff81a0aa90 T intel_c10pll_calc_port_clock +ffffffff81a0ab70 T intel_c20pll_calc_port_clock +ffffffff81a0ac70 T intel_mtl_tbt_calc_port_clock +ffffffff81a0add0 T intel_mtl_pll_enable +ffffffff81a0c5d0 T intel_mtl_pll_disable +ffffffff81a0ca40 T intel_mtl_port_pll_type +ffffffff81a0cad0 T intel_c10pll_state_verify +ffffffff81a0cdc0 t __intel_cx0_read +ffffffff81a0d150 t __intel_cx0_write +ffffffff81a0d4a0 t intel_cx0_bus_reset +ffffffff81a0d5d0 t intel_cx0_wait_for_ack +ffffffff81a0d750 t intel_cx0_powerdown_change_sequence +ffffffff81a0d9b0 t intel_c20_sram_write +ffffffff81a0e000 T hsw_prepare_dp_ddi_buffers +ffffffff81a0e1a0 T intel_wait_ddi_buf_idle +ffffffff81a0e3a0 T intel_ddi_set_dp_msa +ffffffff81a0e570 T intel_ddi_enable_transcoder_func +ffffffff81a0e650 t intel_ddi_transcoder_func_reg_val_get +ffffffff81a0e900 T intel_ddi_disable_transcoder_func +ffffffff81a0eaf0 T intel_ddi_toggle_hdcp_bits +ffffffff81a0ec10 T intel_ddi_connector_get_hw_state +ffffffff81a0ed60 T intel_ddi_get_hw_state +ffffffff81a0edd0 t intel_ddi_get_encoder_pipes +ffffffff81a0f220 T intel_ddi_enable_transcoder_clock +ffffffff81a0f2e0 T intel_ddi_disable_transcoder_clock +ffffffff81a0f350 T intel_ddi_level +ffffffff81a0f530 T icl_ddi_combo_get_pll +ffffffff81a0f5b0 T hsw_ddi_enable_clock +ffffffff81a0f670 T hsw_ddi_disable_clock +ffffffff81a0f6b0 T hsw_ddi_is_clock_enabled +ffffffff81a0f710 T intel_ddi_enable_clock +ffffffff81a0f750 T intel_ddi_disable_clock +ffffffff81a0f790 T intel_ddi_sanitize_encoder_pll_mapping +ffffffff81a0f970 T dp_tp_ctl_reg +ffffffff81a0f9f0 T dp_tp_status_reg +ffffffff81a0fa70 T intel_ddi_update_pipe +ffffffff81a0fb00 T intel_ddi_update_active_dpll +ffffffff81a0fbf0 T intel_ddi_compute_min_voltage_level +ffffffff81a0fc70 T intel_ddi_get_clock +ffffffff81a0fd80 T intel_ddi_port_pll_type +ffffffff81a0fdc0 T hsw_ddi_get_config +ffffffff81a0feb0 t intel_ddi_get_config +ffffffff81a10800 T intel_ddi_init +ffffffff81a11580 t intel_ddi_hotplug +ffffffff81a11990 t intel_ddi_compute_output_type +ffffffff81a11a10 t intel_ddi_compute_config +ffffffff81a11b80 t intel_ddi_compute_config_late +ffffffff81a11e40 t intel_enable_ddi +ffffffff81a12790 t intel_ddi_pre_pll_enable +ffffffff81a12980 t intel_ddi_pre_enable +ffffffff81a13980 t intel_disable_ddi +ffffffff81a13b30 t intel_ddi_post_pll_disable +ffffffff81a13c10 t intel_ddi_post_disable +ffffffff81a140a0 t intel_ddi_sync_state +ffffffff81a14160 t intel_ddi_initial_fastset_check +ffffffff81a14220 t intel_ddi_encoder_suspend +ffffffff81a14230 t intel_ddi_encoder_shutdown +ffffffff81a14260 t intel_ddi_get_power_domains +ffffffff81a143e0 t mtl_ddi_get_config +ffffffff81a144c0 t dg2_ddi_get_config +ffffffff81a14510 t adls_ddi_enable_clock +ffffffff81a14680 t adls_ddi_disable_clock +ffffffff81a14730 t adls_ddi_is_clock_enabled +ffffffff81a147d0 t adls_ddi_get_config +ffffffff81a14890 t rkl_ddi_enable_clock +ffffffff81a14a10 t rkl_ddi_disable_clock +ffffffff81a14aa0 t rkl_ddi_is_clock_enabled +ffffffff81a14b20 t rkl_ddi_get_config +ffffffff81a14bf0 t dg1_ddi_enable_clock +ffffffff81a14da0 t dg1_ddi_disable_clock +ffffffff81a14e60 t dg1_ddi_is_clock_enabled +ffffffff81a14f00 t dg1_ddi_get_config +ffffffff81a14fd0 t jsl_ddi_tc_enable_clock +ffffffff81a15060 t jsl_ddi_tc_disable_clock +ffffffff81a15120 t jsl_ddi_tc_is_clock_enabled +ffffffff81a151d0 t icl_ddi_tc_port_pll_type +ffffffff81a15260 t icl_ddi_combo_get_config +ffffffff81a15300 t icl_ddi_combo_enable_clock +ffffffff81a15440 t icl_ddi_combo_disable_clock +ffffffff81a154e0 t icl_ddi_combo_is_clock_enabled +ffffffff81a15560 t icl_ddi_tc_enable_clock +ffffffff81a15730 t icl_ddi_tc_disable_clock +ffffffff81a15800 t icl_ddi_tc_is_clock_enabled +ffffffff81a158b0 t icl_ddi_tc_get_config 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mtl_ddi_enable_d2d +ffffffff81a17fb0 t intel_wait_ddi_buf_active +ffffffff81a182c0 t intel_ddi_main_link_aux_domain +ffffffff81a183b0 t icl_program_mg_dp_mode +ffffffff81a18680 t intel_ddi_init_dp_buf_reg +ffffffff81a18880 t intel_disable_ddi_buf +ffffffff81a18a30 t mtl_disable_ddi_buf +ffffffff81a18e50 t intel_ddi_disable_fec_state +ffffffff81a18fa0 t mtl_ddi_prepare_link_retrain +ffffffff81a192e0 t intel_ddi_prepare_link_retrain +ffffffff81a197e0 t intel_ddi_set_link_train +ffffffff81a19930 t intel_ddi_set_idle_link_train +ffffffff81a19b00 t intel_ddi_dp_voltage_max +ffffffff81a19bc0 t intel_ddi_dp_preemph_max +ffffffff81a1a000 T is_hobl_buf_trans +ffffffff81a1a040 T intel_ddi_buf_trans_init +ffffffff81a1a300 t mtl_get_cx0_buf_trans +ffffffff81a1a3e0 t dg2_get_snps_buf_trans +ffffffff81a1a450 t adlp_get_combo_buf_trans +ffffffff81a1a570 t adlp_get_dkl_buf_trans +ffffffff81a1a5d0 t adls_get_combo_buf_trans +ffffffff81a1a6f0 t rkl_get_combo_buf_trans +ffffffff81a1a810 t dg1_get_combo_buf_trans +ffffffff81a1a930 t tgl_get_combo_buf_trans +ffffffff81a1aa70 t tgl_get_dkl_buf_trans +ffffffff81a1aad0 t jsl_get_combo_buf_trans +ffffffff81a1ab70 t ehl_get_combo_buf_trans +ffffffff81a1ac10 t icl_get_combo_buf_trans +ffffffff81a1acc0 t icl_get_mg_buf_trans +ffffffff81a1ad20 t bxt_get_buf_trans +ffffffff81a1ada0 t kbl_y_get_buf_trans +ffffffff81a1ae40 t kbl_u_get_buf_trans +ffffffff81a1aee0 t kbl_get_buf_trans +ffffffff81a1af80 t skl_y_get_buf_trans +ffffffff81a1b020 t skl_u_get_buf_trans +ffffffff81a1b0c0 t skl_get_buf_trans +ffffffff81a1b160 t bdw_get_buf_trans +ffffffff81a1b1f0 t hsw_get_buf_trans +ffffffff81a1c000 T vlv_get_hpll_vco +ffffffff81a1c050 T vlv_get_cck_clock +ffffffff81a1c100 T vlv_get_cck_clock_hpll +ffffffff81a1c200 T intel_update_czclk +ffffffff81a1c280 T is_trans_port_sync_master +ffffffff81a1c2b0 T is_trans_port_sync_mode +ffffffff81a1c2f0 T intel_crtc_bigjoiner_slave_pipes +ffffffff81a1c350 T intel_crtc_is_bigjoiner_slave +ffffffff81a1c3b0 T intel_crtc_is_bigjoiner_master +ffffffff81a1c410 T intel_master_crtc +ffffffff81a1c4a0 T assert_transcoder +ffffffff81a1c660 t transcoder_name +ffffffff81a1c6a0 T vlv_wait_port_ready +ffffffff81a1c7f0 T intel_enable_transcoder +ffffffff81a1ca50 t assert_planes_disabled +ffffffff81a1cb80 T intel_disable_transcoder +ffffffff81a1cda0 T intel_rotation_info_size +ffffffff81a1cdf0 T intel_remapped_info_size +ffffffff81a1cf20 T intel_plane_uses_fence +ffffffff81a1cf70 T intel_fb_xy_to_linear +ffffffff81a1cfc0 T intel_add_fb_offsets +ffffffff81a1d010 T intel_plane_fb_max_stride +ffffffff81a1d090 T intel_set_plane_visible +ffffffff81a1d0e0 T intel_plane_fixup_bitmasks +ffffffff81a1d190 T intel_plane_disable_noatomic +ffffffff81a1d380 T intel_plane_fence_y_offset +ffffffff81a1d3e0 T intel_has_pending_fb_unpin +ffffffff81a1d4d0 T intel_get_crtc_new_encoder +ffffffff81a1d660 T ilk_pfit_disable +ffffffff81a1d720 T intel_phy_is_combo +ffffffff81a1d790 T intel_phy_is_tc +ffffffff81a1d800 T intel_phy_is_snps +ffffffff81a1d850 T intel_port_to_phy +ffffffff81a1d900 T intel_port_to_tc +ffffffff81a1da10 T intel_aux_power_domain +ffffffff81a1da50 T intel_modeset_get_crtc_power_domains +ffffffff81a1dc80 T intel_modeset_put_crtc_power_domains +ffffffff81a1dcb0 T intel_encoder_destroy +ffffffff81a1dce0 T intel_encoder_get_config +ffffffff81a1dd10 t intel_crtc_readout_derived_state +ffffffff81a1e150 T intel_link_compute_m_n +ffffffff81a1e280 T intel_panel_sanitize_ssc +ffffffff81a1e360 T intel_zero_m_n +ffffffff81a1e3a0 T intel_set_m_n +ffffffff81a1e460 T intel_cpu_transcoder_has_m2_n2 +ffffffff81a1e4c0 T intel_cpu_transcoder_set_m1_n1 +ffffffff81a1e670 T intel_cpu_transcoder_set_m2_n2 +ffffffff81a1e7d0 T i9xx_set_pipeconf +ffffffff81a1e980 T ilk_set_pipeconf +ffffffff81a1eb50 T bdw_get_pipe_misc_bpp +ffffffff81a1ec20 T ilk_get_lanes_required +ffffffff81a1ec80 T intel_get_m_n +ffffffff81a1ed90 T intel_cpu_transcoder_get_m1_n1 +ffffffff81a1ef20 T intel_cpu_transcoder_get_m2_n2 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intel_atomic_commit_ready +ffffffff81a26b30 t intel_atomic_commit_work +ffffffff81a26b50 t intel_atomic_commit_tail +ffffffff81a27cd0 T intel_plane_destroy +ffffffff81a27d00 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81a27d70 T assert_port_valid +ffffffff81a27df0 T intel_setup_outputs +ffffffff81a28680 T intel_mode_valid +ffffffff81a28800 T intel_cpu_transcoder_mode_valid +ffffffff81a288c0 T intel_mode_valid_max_plane_size +ffffffff81a28940 T intel_init_display_hooks +ffffffff81a289c0 T intel_initial_commit +ffffffff81a28b60 T i830_enable_pipe +ffffffff81a291a0 T i830_disable_pipe +ffffffff81a294d0 T intel_hpd_poll_fini +ffffffff81a295d0 T intel_scanout_needs_vtd_wa +ffffffff81a29610 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81a29770 t intel_atomic_cleanup_work +ffffffff81a29870 t intel_pre_plane_update +ffffffff81a29dd0 t hsw_get_pipe_config +ffffffff81a2aa00 t hsw_crtc_enable +ffffffff81a2b460 t hsw_crtc_disable +ffffffff81a2b760 t skl_commit_modeset_enables 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intel_display_driver_early_probe +ffffffff81a30170 T intel_display_driver_probe_noirq +ffffffff81a30450 T intel_display_driver_probe_nogem +ffffffff81a30760 T intel_display_driver_probe +ffffffff81a30800 T intel_display_driver_register +ffffffff81a30860 T intel_display_driver_remove +ffffffff81a30910 T intel_display_driver_remove_noirq +ffffffff81a309c0 T intel_display_driver_remove_nogem +ffffffff81a30a00 T intel_display_driver_unregister +ffffffff81a30a80 T intel_display_driver_suspend +ffffffff81a30b30 T __intel_display_driver_resume +ffffffff81a30c40 T intel_display_driver_resume +ffffffff81a31000 T ilk_update_display_irq +ffffffff81a31140 T ilk_enable_display_irq +ffffffff81a31160 T ilk_disable_display_irq +ffffffff81a31240 T bdw_update_port_irq +ffffffff81a31390 T bdw_enable_pipe_irq +ffffffff81a313b0 t bdw_update_pipe_irq +ffffffff81a31510 T bdw_disable_pipe_irq +ffffffff81a31620 T ibx_display_interrupt_update +ffffffff81a31740 T ibx_enable_display_interrupt +ffffffff81a31760 T ibx_disable_display_interrupt +ffffffff81a31820 T i915_pipestat_enable_mask +ffffffff81a319b0 T i915_enable_pipestat +ffffffff81a31b30 T i915_disable_pipestat +ffffffff81a31ca0 T i915_enable_asle_pipestat +ffffffff81a31d50 T i9xx_pipestat_irq_reset +ffffffff81a31ee0 T i9xx_pipestat_irq_ack +ffffffff81a32060 T i8xx_pipestat_irq_handler +ffffffff81a32250 t i9xx_pipe_crc_irq_handler +ffffffff81a32390 T i915_pipestat_irq_handler +ffffffff81a325c0 T i965_pipestat_irq_handler +ffffffff81a32800 T valleyview_pipestat_irq_handler +ffffffff81a329a0 T ilk_display_irq_handler +ffffffff81a32ed0 t cpt_irq_handler +ffffffff81a33240 T ivb_display_irq_handler +ffffffff81a337e0 T gen8_de_pipe_underrun_mask +ffffffff81a33820 T gen8_de_irq_handler +ffffffff81a343d0 T gen11_gu_misc_irq_ack +ffffffff81a34420 T gen11_gu_misc_irq_handler +ffffffff81a34460 T gen11_display_irq_handler +ffffffff81a344f0 T i8xx_enable_vblank +ffffffff81a34560 T i915gm_enable_vblank +ffffffff81a34610 T i965_enable_vblank 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T intel_display_power_is_enabled +ffffffff81a36240 T intel_display_power_set_target_dc_state +ffffffff81a36360 T intel_display_power_get +ffffffff81a363e0 t __intel_display_power_get_domain +ffffffff81a365d0 T intel_display_power_get_if_enabled +ffffffff81a36700 T __intel_display_power_put_async +ffffffff81a368f0 t __intel_display_power_put_domain +ffffffff81a36a60 T intel_display_power_flush_work +ffffffff81a36b80 t release_async_put_domains +ffffffff81a36c70 T intel_display_power_put_unchecked +ffffffff81a36cd0 T intel_display_power_get_in_set +ffffffff81a36db0 T intel_display_power_get_in_set_if_enabled +ffffffff81a36e60 T intel_display_power_put_mask_in_set +ffffffff81a36f30 T intel_power_domains_init +ffffffff81a37180 t intel_display_power_put_async_work +ffffffff81a373f0 T intel_power_domains_cleanup +ffffffff81a37410 T gen9_dbuf_slices_update +ffffffff81a37620 T intel_power_domains_init_hw +ffffffff81a37b20 t icl_display_core_init +ffffffff81a38320 t bxt_display_core_init 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intel_display_power_aux_io_domain +ffffffff81a3a6a0 T intel_display_power_legacy_aux_domain +ffffffff81a3a7b0 T intel_display_power_tbt_aux_domain +ffffffff81a3a8c0 t __delayed_work_tick +ffffffff81a3b000 T intel_display_power_map_init +ffffffff81a3b180 t __set_power_wells +ffffffff81a3b560 T intel_display_power_map_cleanup +ffffffff81a3c000 T lookup_power_well +ffffffff81a3c0c0 T intel_power_well_enable +ffffffff81a3c150 T intel_power_well_name +ffffffff81a3c190 T intel_power_well_disable +ffffffff81a3c200 T intel_power_well_sync_hw +ffffffff81a3c270 T intel_power_well_get +ffffffff81a3c310 T intel_power_well_put +ffffffff81a3c410 T intel_power_well_is_enabled +ffffffff81a3c430 T intel_power_well_is_enabled_cached +ffffffff81a3c460 T intel_display_power_well_is_enabled +ffffffff81a3c510 T intel_power_well_is_always_on +ffffffff81a3c550 T intel_power_well_domains +ffffffff81a3c580 T intel_power_well_refcount +ffffffff81a3c5b0 T gen9_sanitize_dc_state +ffffffff81a3c680 T gen9_set_dc_state +ffffffff81a3c9e0 T gen9_enable_dc5 +ffffffff81a3cc40 T skl_enable_dc6 +ffffffff81a3cda0 T bxt_enable_dc9 +ffffffff81a3cf50 T bxt_disable_dc9 +ffffffff81a3d040 T gen9_disable_dc_states +ffffffff81a3d410 T chv_phy_powergate_ch +ffffffff81a3d520 t assert_chv_phy_status +ffffffff81a3d8d0 T chv_phy_powergate_lanes +ffffffff81a3db30 t i9xx_power_well_sync_hw_noop +ffffffff81a3db60 t i9xx_always_on_power_well_noop +ffffffff81a3db90 t i9xx_always_on_power_well_enabled +ffffffff81a3dbc0 t chv_pipe_power_well_sync_hw +ffffffff81a3dbf0 t chv_pipe_power_well_enable +ffffffff81a3dc20 t chv_pipe_power_well_disable +ffffffff81a3dc80 t chv_pipe_power_well_enabled +ffffffff81a3dd80 t chv_dpio_cmn_power_well_enable +ffffffff81a3df90 t chv_dpio_cmn_power_well_disable +ffffffff81a3e0c0 t vlv_power_well_enabled +ffffffff81a3e1e0 t i830_pipes_power_well_sync_hw +ffffffff81a3e2d0 t i830_pipes_power_well_enable +ffffffff81a3e390 t i830_pipes_power_well_disable +ffffffff81a3e3c0 t i830_pipes_power_well_enabled +ffffffff81a3e460 t hsw_power_well_sync_hw +ffffffff81a3e550 t hsw_power_well_enable +ffffffff81a3e7d0 t hsw_power_well_disable +ffffffff81a3e890 t hsw_power_well_enabled +ffffffff81a3e970 t gen9_dc_off_power_well_enable +ffffffff81a3e980 t gen9_dc_off_power_well_disable +ffffffff81a3ea20 t gen9_dc_off_power_well_enabled +ffffffff81a3eab0 t bxt_dpio_cmn_power_well_enable +ffffffff81a3eae0 t bxt_dpio_cmn_power_well_disable +ffffffff81a3eb10 t bxt_dpio_cmn_power_well_enabled +ffffffff81a3eb40 t vlv_display_power_well_enable +ffffffff81a3eb70 t vlv_display_power_well_disable +ffffffff81a3ebe0 t vlv_dpio_cmn_power_well_enable +ffffffff81a3ec60 t vlv_dpio_cmn_power_well_disable +ffffffff81a3ed60 t vlv_power_well_enable +ffffffff81a3ed80 t vlv_power_well_disable +ffffffff81a3eda0 t icl_aux_power_well_enable +ffffffff81a3f430 t icl_aux_power_well_disable +ffffffff81a3f6c0 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81a3f6e0 t tgl_tc_cold_off_power_well_enable +ffffffff81a3f700 t tgl_tc_cold_off_power_well_disable +ffffffff81a3f720 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81a3f750 t xelpdp_aux_power_well_enable +ffffffff81a3f820 t xelpdp_aux_power_well_disable +ffffffff81a3f8f0 t xelpdp_aux_power_well_enabled +ffffffff81a3f9a0 t chv_set_pipe_power_well +ffffffff81a3fba0 t vlv_display_power_well_init +ffffffff81a3ff00 t vlv_set_power_well +ffffffff81a40120 t hsw_wait_for_power_well_enable +ffffffff81a40270 t hsw_wait_for_power_well_disable +ffffffff81a40540 t tgl_tc_cold_request +ffffffff81a41000 T intel_display_reset_prepare +ffffffff81a411e0 T intel_display_reset_finish +ffffffff81a42000 T intel_display_rps_boost_after_vblank +ffffffff81a42110 t do_rps_boost +ffffffff81a421c0 T intel_display_rps_mark_interactive +ffffffff81a43000 T intel_dkl_phy_init +ffffffff81a43020 T intel_dkl_phy_read +ffffffff81a43150 T intel_dkl_phy_write +ffffffff81a43260 T intel_dkl_phy_rmw +ffffffff81a43390 T intel_dkl_phy_posting_read +ffffffff81a44000 T intel_dmc_has_payload +ffffffff81a44050 T intel_dmc_enable_pipe +ffffffff81a44160 T intel_dmc_disable_pipe +ffffffff81a44270 T intel_dmc_load_program +ffffffff81a44aa0 t pipedmc_clock_gating_wa +ffffffff81a44c90 T intel_dmc_disable_program +ffffffff81a44ec0 T assert_dmc_loaded +ffffffff81a45040 T intel_dmc_init +ffffffff81a45300 t dmc_load_work_fn +ffffffff81a45c10 T intel_dmc_suspend +ffffffff81a45ca0 T intel_dmc_resume +ffffffff81a45d40 T intel_dmc_fini +ffffffff81a45e90 T intel_dmc_print_error_state +ffffffff81a45f90 T intel_dmc_debugfs_register +ffffffff81a46000 T intel_dp_is_edp +ffffffff81a46030 T intel_dp_is_uhbr +ffffffff81a46070 T intel_dp_max_lane_count +ffffffff81a460e0 T intel_dp_link_required +ffffffff81a46120 T intel_dp_max_data_rate +ffffffff81a46180 T intel_dp_can_bigjoiner +ffffffff81a461d0 T intel_dp_get_link_train_fallback_values +ffffffff81a46580 T intel_dp_mode_to_fec_clock +ffffffff81a465d0 T intel_dp_dsc_nearest_valid_bpp +ffffffff81a466d0 T intel_dp_dsc_get_output_bpp +ffffffff81a467f0 T intel_dp_dsc_get_slice_count +ffffffff81a46980 T intel_dp_min_bpp +ffffffff81a469c0 T intel_dp_need_bigjoiner +ffffffff81a46a20 T intel_dp_source_supports_tps3 +ffffffff81a46a70 T intel_dp_source_supports_tps4 +ffffffff81a46ab0 T intel_dp_max_link_rate +ffffffff81a46b60 T intel_dp_rate_select +ffffffff81a46c00 T intel_dp_compute_rate +ffffffff81a46cd0 T intel_dp_has_hdmi_sink +ffffffff81a46d10 T intel_dp_adjust_compliance_config +ffffffff81a46e50 T intel_dp_dsc_compute_bpp +ffffffff81a46f00 T intel_dp_dsc_compute_config +ffffffff81a475d0 T intel_dp_limited_color_range +ffffffff81a47640 T intel_dp_compute_psr_vsc_sdp +ffffffff81a476c0 T intel_dp_needs_vsc_sdp +ffffffff81a47710 t intel_dp_compute_vsc_colorimetry +ffffffff81a47890 T intel_dp_compute_config +ffffffff81a47ce0 t intel_dp_compute_output_format +ffffffff81a47f10 t intel_dp_audio_compute_config +ffffffff81a47ff0 t intel_dp_drrs_compute_config +ffffffff81a48190 t intel_dp_compute_vsc_sdp +ffffffff81a48230 t intel_dp_compute_hdr_metadata_infoframe_sdp +ffffffff81a482c0 T intel_dp_set_link_params +ffffffff81a48300 T intel_edp_backlight_on +ffffffff81a483a0 T intel_edp_backlight_off +ffffffff81a48430 T intel_dp_sink_set_decompression_state +ffffffff81a484d0 T intel_dp_wait_source_oui +ffffffff81a485c0 T intel_dp_set_power +ffffffff81a487e0 T intel_dp_sync_state +ffffffff81a48860 t intel_dp_get_dpcd +ffffffff81a489c0 t intel_dp_reset_max_link_params +ffffffff81a48ac0 T intel_dp_initial_fastset_check +ffffffff81a48bf0 T intel_dp_check_frl_training +ffffffff81a491a0 T intel_dp_pcon_dsc_configure +ffffffff81a49390 T intel_dp_configure_protocol_converter +ffffffff81a49570 T intel_dp_get_colorimetry_status +ffffffff81a495d0 T intel_edp_fixup_vbt_bpp +ffffffff81a49660 T intel_write_dp_vsc_sdp +ffffffff81a49800 T intel_dp_set_infoframes +ffffffff81a49920 t intel_write_dp_sdp +ffffffff81a49c00 T intel_read_dp_sdp +ffffffff81a49f20 T intel_dp_get_active_pipes +ffffffff81a4a140 T intel_dp_retrain_link +ffffffff81a4a3f0 t intel_dp_needs_link_retrain +ffffffff81a4a570 T intel_dp_phy_test +ffffffff81a4ac20 T intel_digital_port_connected +ffffffff81a4acd0 T intel_dp_encoder_flush_work +ffffffff81a4ad30 T intel_dp_encoder_suspend +ffffffff81a4ad70 T intel_dp_encoder_shutdown +ffffffff81a4adb0 T intel_dp_hpd_pulse +ffffffff81a4b420 T intel_dp_is_port_edp +ffffffff81a4b4b0 T intel_dp_init_connector +ffffffff81a4c610 t intel_dp_modeset_retry_work_fn +ffffffff81a4c6b0 t intel_dp_set_common_rates +ffffffff81a4c830 T intel_dp_mst_suspend +ffffffff81a4c8d0 T intel_dp_mst_resume +ffffffff81a4c980 t intel_dp_output_format +ffffffff81a4cac0 t intel_dp_compute_link_config +ffffffff81a4d280 t intel_dp_tmds_clock_valid +ffffffff81a4d320 t intel_dp_set_sink_rates +ffffffff81a4d550 t intel_dp_check_device_service_irq +ffffffff81a4db20 t intel_dp_force +ffffffff81a4dc50 t intel_dp_connector_register +ffffffff81a4dd20 t intel_dp_connector_unregister +ffffffff81a4dd80 t intel_dp_oob_hotplug_event +ffffffff81a4de00 t intel_dp_set_edid +ffffffff81a4e200 t intel_dp_get_modes +ffffffff81a4e2f0 t intel_dp_detect +ffffffff81a4ebb0 t intel_dp_mode_valid +ffffffff81a4ef30 t intel_dp_connector_atomic_check +ffffffff81a4f2a0 t intel_dp_get_dsc_sink_cap +ffffffff81a4f410 t intel_dp_mode_min_output_bpp +ffffffff81a4f470 t intel_dp_mode_valid_downstream +ffffffff81a4f630 t icl_max_source_rate +ffffffff81a50000 T intel_dp_aux_pack +ffffffff81a50070 T intel_dp_aux_fini +ffffffff81a50090 T intel_dp_aux_init +ffffffff81a502a0 t xelpdp_aux_ctl_reg +ffffffff81a50370 t xelpdp_aux_data_reg +ffffffff81a50440 t tgl_aux_ctl_reg +ffffffff81a504c0 t tgl_aux_data_reg +ffffffff81a50550 t skl_aux_ctl_reg +ffffffff81a505d0 t skl_aux_data_reg +ffffffff81a50660 t ilk_aux_ctl_reg +ffffffff81a506e0 t ilk_aux_data_reg +ffffffff81a50770 t g4x_aux_ctl_reg +ffffffff81a507f0 t g4x_aux_data_reg +ffffffff81a50890 t skl_get_aux_clock_divider +ffffffff81a508c0 t hsw_get_aux_clock_divider +ffffffff81a50950 t ilk_get_aux_clock_divider +ffffffff81a509b0 t g4x_get_aux_clock_divider +ffffffff81a50a00 t skl_get_aux_send_ctl +ffffffff81a50a80 t g4x_get_aux_send_ctl +ffffffff81a50ae0 t kasprintf +ffffffff81a50bb0 t intel_dp_aux_transfer +ffffffff81a50e40 T intel_dp_aux_ch +ffffffff81a50fa0 T intel_dp_aux_irq_handler +ffffffff81a51040 t intel_dp_aux_xfer +ffffffff81a52000 T intel_dp_aux_init_backlight_funcs +ffffffff81a52260 t intel_dp_aux_hdr_setup_backlight +ffffffff81a523e0 t intel_dp_aux_hdr_get_backlight +ffffffff81a52560 t intel_dp_aux_hdr_set_backlight +ffffffff81a52660 t intel_dp_aux_hdr_disable_backlight +ffffffff81a526e0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a52910 t intel_dp_aux_vesa_setup_backlight +ffffffff81a52b70 t intel_dp_aux_vesa_get_backlight +ffffffff81a52ba0 t intel_dp_aux_vesa_set_backlight +ffffffff81a52c40 t intel_dp_aux_vesa_disable_backlight +ffffffff81a52cf0 t intel_dp_aux_vesa_enable_backlight +ffffffff81a53000 T intel_dp_hdcp_init +ffffffff81a530b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a531a0 t intel_dp_hdcp_read_bksv +ffffffff81a53230 t intel_dp_hdcp_read_bstatus +ffffffff81a532c0 t intel_dp_hdcp_repeater_present +ffffffff81a53370 t intel_dp_hdcp_read_ri_prime +ffffffff81a53400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a534a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a53590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a53630 t intel_dp_hdcp_toggle_signalling +ffffffff81a53660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a53850 t intel_dp_hdcp_check_link +ffffffff81a538e0 t intel_dp_hdcp_capable +ffffffff81a53990 t intel_dp_hdcp2_capable +ffffffff81a53a10 t intel_dp_hdcp2_write_msg +ffffffff81a53bc0 t intel_dp_hdcp2_read_msg +ffffffff81a54290 t intel_dp_hdcp2_config_stream_type +ffffffff81a542f0 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a54550 t intel_dp_mst_hdcp2_check_link +ffffffff81a54610 t intel_dp_hdcp2_check_link +ffffffff81a55000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a550d0 t intel_dp_init_lttpr +ffffffff81a553b0 T intel_dp_get_adjust_train +ffffffff81a55ab0 T intel_dp_program_link_training_pattern +ffffffff81a55bd0 T intel_dp_set_signal_levels +ffffffff81a55f70 T intel_dp_dump_link_status +ffffffff81a56060 T intel_dp_stop_link_train +ffffffff81a56310 T intel_dp_start_link_train +ffffffff81a580a0 T intel_dp_128b132b_sdp_crc16 +ffffffff81a58170 t intel_dp_link_train_phy +ffffffff81a5a000 T intel_dp_mst_encoder_active_links +ffffffff81a5a030 T intel_dp_mst_encoder_init +ffffffff81a5a270 T intel_dp_mst_source_support +ffffffff81a5a2b0 T intel_dp_mst_encoder_cleanup +ffffffff81a5a310 T intel_dp_mst_is_master_trans +ffffffff81a5a350 T intel_dp_mst_is_slave_trans +ffffffff81a5a390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a5a450 t intel_dp_add_mst_connector +ffffffff81a5a680 t intel_dp_mst_poll_hpd_irq +ffffffff81a5a6a0 t intel_dp_mst_get_hw_state +ffffffff81a5a700 t intel_dp_mst_connector_late_register +ffffffff81a5a770 t intel_dp_mst_connector_early_unregister +ffffffff81a5a7a0 t intel_dp_mst_get_modes +ffffffff81a5a840 t intel_dp_mst_detect +ffffffff81a5a940 t intel_dp_mst_mode_valid_ctx +ffffffff81a5ab60 t intel_mst_atomic_best_encoder +ffffffff81a5abc0 t intel_dp_mst_atomic_check +ffffffff81a5ad30 t intel_dp_mst_compute_config +ffffffff81a5b280 t intel_dp_mst_compute_config_late +ffffffff81a5b380 t intel_mst_disable_dp +ffffffff81a5b460 t intel_mst_post_disable_dp +ffffffff81a5b710 t intel_mst_post_pll_disable_dp +ffffffff81a5b770 t intel_mst_pre_pll_enable_dp +ffffffff81a5b7b0 t intel_mst_pre_enable_dp +ffffffff81a5b9d0 t intel_mst_enable_dp +ffffffff81a5bd70 t intel_dp_mst_enc_get_hw_state +ffffffff81a5bdb0 t intel_dp_mst_enc_get_config +ffffffff81a5bdd0 t intel_dp_mst_initial_fastset_check +ffffffff81a5bdf0 t intel_dp_mst_encoder_destroy +ffffffff81a5be20 t intel_dp_mst_find_vcpi_slots_for_bpp +ffffffff81a5d000 T bxt_port_to_phy_channel +ffffffff81a5d110 T bxt_ddi_phy_set_signal_levels +ffffffff81a5d4e0 T bxt_ddi_phy_is_enabled +ffffffff81a5d610 T bxt_ddi_phy_uninit +ffffffff81a5d6f0 T bxt_ddi_phy_init +ffffffff81a5d910 t _bxt_ddi_phy_init +ffffffff81a5de50 T bxt_ddi_phy_verify_state +ffffffff81a5e130 t __phy_reg_verify_state +ffffffff81a5e230 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a5e2a0 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a5e500 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a5e6e0 T vlv_dig_port_to_channel +ffffffff81a5e750 T vlv_dig_port_to_phy +ffffffff81a5e7c0 T vlv_pipe_to_channel +ffffffff81a5e820 T chv_set_phy_signal_level +ffffffff81a5eb70 T chv_data_lane_soft_reset +ffffffff81a5ed40 T chv_phy_pre_pll_enable +ffffffff81a5efe0 T chv_phy_pre_encoder_enable +ffffffff81a5f240 T chv_phy_release_cl2_override +ffffffff81a5f2d0 T chv_phy_post_pll_disable +ffffffff81a5f380 T vlv_set_phy_signal_level +ffffffff81a5f4f0 T vlv_phy_pre_pll_enable +ffffffff81a5f5f0 T vlv_phy_pre_encoder_enable +ffffffff81a5f6f0 T vlv_phy_reset_lanes +ffffffff81a60000 T pnv_calc_dpll_params +ffffffff81a600c0 T i9xx_calc_dpll_params +ffffffff81a60190 T vlv_calc_dpll_params +ffffffff81a60250 T chv_calc_dpll_params +ffffffff81a60320 T bxt_find_best_dpll +ffffffff81a60340 t chv_find_best_dpll +ffffffff81a60680 T i9xx_dpll_compute_fp +ffffffff81a606c0 T vlv_compute_dpll +ffffffff81a60740 T chv_compute_dpll +ffffffff81a607c0 T intel_dpll_crtc_compute_clock +ffffffff81a608c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a60a10 T intel_dpll_init_clock_hook +ffffffff81a60b20 T i9xx_enable_pll +ffffffff81a60ef0 T vlv_enable_pll +ffffffff81a61410 T chv_enable_pll +ffffffff81a619e0 T vlv_force_pll_on +ffffffff81a61b30 T vlv_disable_pll +ffffffff81a61c00 T chv_disable_pll +ffffffff81a61d30 T i9xx_disable_pll +ffffffff81a61e50 T vlv_force_pll_off +ffffffff81a61f50 T assert_pll_enabled +ffffffff81a62050 T assert_pll_disabled +ffffffff81a62150 t intel_pll_is_valid +ffffffff81a62210 t mtl_crtc_compute_clock +ffffffff81a622d0 t dg2_crtc_compute_clock +ffffffff81a62350 t hsw_crtc_compute_clock +ffffffff81a62410 t hsw_crtc_get_shared_dpll +ffffffff81a624b0 t ilk_crtc_compute_clock +ffffffff81a627b0 t ilk_crtc_get_shared_dpll +ffffffff81a62800 t g4x_find_best_dpll +ffffffff81a62b40 t chv_crtc_compute_clock +ffffffff81a62c50 t vlv_crtc_compute_clock +ffffffff81a630f0 t g4x_crtc_compute_clock +ffffffff81a63250 t i9xx_compute_dpll +ffffffff81a634d0 t pnv_crtc_compute_clock +ffffffff81a638b0 t i9xx_crtc_compute_clock +ffffffff81a639d0 t i9xx_find_best_dpll +ffffffff81a63d10 t i8xx_crtc_compute_clock +ffffffff81a64000 T intel_get_shared_dpll_by_id +ffffffff81a64040 T assert_shared_dpll +ffffffff81a641f0 T intel_dpll_get_hw_state +ffffffff81a64220 T icl_tc_port_to_pll_id +ffffffff81a64250 T intel_enable_shared_dpll +ffffffff81a645b0 T intel_disable_shared_dpll +ffffffff81a64840 T intel_unreference_shared_dpll_crtc +ffffffff81a64940 T intel_shared_dpll_swap_state +ffffffff81a64a20 T icl_set_active_port_dpll +ffffffff81a64a60 T intel_shared_dpll_init +ffffffff81a64c60 T intel_compute_shared_dplls +ffffffff81a64cf0 T intel_reserve_shared_dplls +ffffffff81a64d80 T intel_release_shared_dplls +ffffffff81a64dc0 T intel_update_active_dpll +ffffffff81a64e20 T intel_dpll_get_freq +ffffffff81a64eb0 T intel_dpll_update_ref_clks +ffffffff81a64f00 T intel_dpll_readout_hw_state +ffffffff81a65130 T intel_dpll_sanitize_state +ffffffff81a65210 T intel_dpll_dump_hw_state +ffffffff81a65290 T intel_shared_dpll_state_verify +ffffffff81a65470 t verify_single_dpll_state +ffffffff81a659e0 T intel_shared_dpll_verify_disabled +ffffffff81a65a60 t icl_compute_dplls +ffffffff81a666a0 t icl_get_dplls +ffffffff81a66970 t icl_put_dplls +ffffffff81a66a30 t icl_update_active_dpll +ffffffff81a66ae0 t icl_update_dpll_ref_clks +ffffffff81a66b20 t icl_dump_hw_state +ffffffff81a66be0 t combo_pll_enable +ffffffff81a66df0 t combo_pll_disable +ffffffff81a66ec0 t combo_pll_get_hw_state +ffffffff81a66f40 t icl_ddi_combo_pll_get_freq +ffffffff81a67110 t icl_dpll_write +ffffffff81a67350 t adlp_cmtg_clock_gating_wa +ffffffff81a674b0 t icl_pll_disable +ffffffff81a67650 t icl_pll_get_hw_state +ffffffff81a67930 t tbt_pll_enable +ffffffff81a67ae0 t tbt_pll_disable +ffffffff81a67b00 t tbt_pll_get_hw_state +ffffffff81a67b20 t icl_ddi_tbt_pll_get_freq +ffffffff81a67b90 t mg_pll_enable +ffffffff81a681a0 t mg_pll_disable +ffffffff81a681e0 t dkl_pll_get_hw_state +ffffffff81a683f0 t icl_ddi_mg_pll_get_freq +ffffffff81a684d0 t icl_calc_dpll_state +ffffffff81a68610 t intel_find_shared_dpll +ffffffff81a68930 t intel_reference_shared_dpll +ffffffff81a68b50 t intel_unreference_shared_dpll +ffffffff81a68d50 t mg_pll_get_hw_state +ffffffff81a68fa0 t bxt_compute_dpll +ffffffff81a692a0 t bxt_get_dpll +ffffffff81a69370 t intel_put_dpll +ffffffff81a693d0 t bxt_update_dpll_ref_clks +ffffffff81a69410 t bxt_dump_hw_state +ffffffff81a694c0 t bxt_ddi_pll_enable +ffffffff81a69e90 t bxt_ddi_pll_disable +ffffffff81a6a0a0 t bxt_ddi_pll_get_hw_state +ffffffff81a6a4d0 t bxt_ddi_pll_get_freq +ffffffff81a6a560 t bxt_ddi_set_dpll_hw_state +ffffffff81a6a750 t skl_compute_dpll +ffffffff81a6aeb0 t skl_get_dpll +ffffffff81a6af60 t skl_update_dpll_ref_clks +ffffffff81a6afa0 t skl_dump_hw_state +ffffffff81a6b000 t skl_ddi_dpll0_enable +ffffffff81a6b0c0 t skl_ddi_dpll0_disable +ffffffff81a6b0f0 t skl_ddi_dpll0_get_hw_state +ffffffff81a6b1f0 t skl_ddi_pll_get_freq +ffffffff81a6b280 t skl_ddi_wrpll_get_freq +ffffffff81a6b3e0 t skl_ddi_pll_enable +ffffffff81a6b600 t skl_ddi_pll_disable +ffffffff81a6b690 t skl_ddi_pll_get_hw_state +ffffffff81a6b7b0 t hsw_compute_dpll +ffffffff81a6bfd0 t hsw_get_dpll +ffffffff81a6c120 t hsw_update_dpll_ref_clks +ffffffff81a6c190 t hsw_dump_hw_state +ffffffff81a6c1c0 t hsw_ddi_wrpll_enable +ffffffff81a6c240 t hsw_ddi_wrpll_disable +ffffffff81a6c320 t hsw_ddi_wrpll_get_hw_state +ffffffff81a6c3c0 t hsw_ddi_wrpll_get_freq +ffffffff81a6c4b0 t hsw_ddi_spll_enable +ffffffff81a6c510 t hsw_ddi_spll_disable +ffffffff81a6c5e0 t hsw_ddi_spll_get_hw_state +ffffffff81a6c670 t hsw_ddi_spll_get_freq +ffffffff81a6c710 t hsw_ddi_lcpll_enable +ffffffff81a6c740 t hsw_ddi_lcpll_disable +ffffffff81a6c770 t hsw_ddi_lcpll_get_hw_state +ffffffff81a6c7a0 t hsw_ddi_lcpll_get_freq +ffffffff81a6c820 t ibx_compute_dpll +ffffffff81a6c850 t ibx_get_dpll +ffffffff81a6c950 t ibx_dump_hw_state +ffffffff81a6c9b0 t ibx_pch_dpll_enable +ffffffff81a6cb50 t ibx_pch_dpll_disable +ffffffff81a6cbd0 t ibx_pch_dpll_get_hw_state +ffffffff81a6d000 T intel_dpt_pin +ffffffff81a6d1e0 T intel_dpt_unpin +ffffffff81a6d250 T intel_dpt_resume +ffffffff81a6d320 T intel_dpt_suspend +ffffffff81a6d3f0 T intel_dpt_create +ffffffff81a6d7e0 t dpt_insert_page +ffffffff81a6d850 t dpt_clear_range +ffffffff81a6d880 t dpt_insert_entries +ffffffff81a6d970 t dpt_cleanup +ffffffff81a6d9c0 t dpt_bind_vma +ffffffff81a6da50 t dpt_unbind_vma +ffffffff81a6da80 T intel_dpt_destroy +ffffffff81a6dad0 T intel_dpt_configure +ffffffff81a6dc70 t __ww_mutex_lock +ffffffff81a6e000 T intel_drrs_type_str +ffffffff81a6e040 T intel_drrs_is_active +ffffffff81a6e070 T intel_drrs_activate +ffffffff81a6e260 T intel_drrs_deactivate +ffffffff81a6e420 T intel_drrs_invalidate +ffffffff81a6e440 t intel_drrs_frontbuffer_update +ffffffff81a6e690 T intel_drrs_flush +ffffffff81a6e6b0 T intel_drrs_crtc_init +ffffffff81a6e750 t intel_drrs_downclock_work +ffffffff81a6e870 T intel_drrs_crtc_debugfs_add +ffffffff81a6e8a0 T intel_drrs_connector_debugfs_add +ffffffff81a6e8b0 t __delayed_work_tick +ffffffff81a6f000 T intel_dsb_reg_write +ffffffff81a6f140 T intel_dsb_finish +ffffffff81a6f1c0 T intel_dsb_commit +ffffffff81a6f370 T intel_dsb_wait +ffffffff81a6f560 T intel_dsb_prepare +ffffffff81a6f6e0 T intel_dsb_cleanup +ffffffff81a70000 T intel_dsi_wait_panel_power_cycle +ffffffff81a700f0 T intel_dsi_shutdown +ffffffff81a701e0 T intel_dsi_bitrate +ffffffff81a70270 T intel_dsi_tlpx_ns +ffffffff81a702c0 T intel_dsi_get_modes +ffffffff81a702d0 T intel_dsi_mode_valid +ffffffff81a70390 T intel_dsi_host_init +ffffffff81a70440 T intel_dsi_get_panel_orientation +ffffffff81a71000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a710a0 t dcs_setup_backlight +ffffffff81a71120 t dcs_get_backlight +ffffffff81a71210 t dcs_set_backlight +ffffffff81a71300 t dcs_disable_backlight +ffffffff81a71660 t dcs_enable_backlight +ffffffff81a72000 T intel_dsi_vbt_exec_sequence +ffffffff81a72020 T intel_dsi_log_params +ffffffff81a723a0 T intel_dsi_vbt_init +ffffffff81a72840 T intel_dsi_vbt_gpio_init +ffffffff81a72860 T intel_dsi_vbt_gpio_cleanup +ffffffff81a73000 T intel_dvo_init +ffffffff81a73650 t intel_disable_dvo +ffffffff81a736f0 t intel_enable_dvo +ffffffff81a737c0 t intel_dvo_get_hw_state +ffffffff81a73830 t intel_dvo_get_config +ffffffff81a738d0 t intel_dvo_compute_config +ffffffff81a73960 t intel_dvo_pre_enable +ffffffff81a73a60 t intel_dvo_connector_get_hw_state +ffffffff81a73af0 t intel_dvo_enc_destroy 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+ffffffff81a75480 T intel_fb_modifier_uses_dpt +ffffffff81a754c0 T intel_fb_uses_dpt +ffffffff81a75520 T intel_cursor_alignment +ffffffff81a75580 T intel_surf_alignment +ffffffff81a75810 T intel_fb_plane_get_subsampling +ffffffff81a75960 T intel_plane_adjust_aligned_offset +ffffffff81a759d0 t intel_adjust_aligned_offset +ffffffff81a75b80 T intel_plane_compute_aligned_offset +ffffffff81a75c80 t intel_compute_aligned_offset +ffffffff81a75e40 T intel_fb_needs_pot_stride_remap +ffffffff81a75eb0 T intel_fb_supports_90_270_rotation +ffffffff81a75f10 T intel_fill_fb_info +ffffffff81a76a10 t calc_plane_remap_info +ffffffff81a773c0 T intel_fb_fill_view +ffffffff81a77430 T intel_plane_compute_gtt +ffffffff81a77910 t intel_plane_check_stride +ffffffff81a77a70 T intel_framebuffer_init +ffffffff81a782d0 t gen12_ccs_aux_stride +ffffffff81a78330 T intel_user_framebuffer_create +ffffffff81a78490 T intel_framebuffer_create +ffffffff81a78520 t intel_adjust_tile_offset +ffffffff81a78660 t intel_user_framebuffer_destroy +ffffffff81a786d0 t intel_user_framebuffer_create_handle +ffffffff81a78700 t intel_user_framebuffer_dirty +ffffffff81a79000 T intel_pin_and_fence_fb_obj +ffffffff81a79330 t i915_gem_object_lock +ffffffff81a79540 T intel_unpin_fb_vma +ffffffff81a795b0 T intel_plane_pin_fb +ffffffff81a798e0 T intel_plane_unpin_fb +ffffffff81a7a000 T intel_fbc_cleanup +ffffffff81a7a1c0 T intel_fbc_pre_update +ffffffff81a7a850 T intel_fbc_post_update +ffffffff81a7aa00 T intel_fbc_invalidate +ffffffff81a7ab80 T intel_fbc_flush +ffffffff81a7ae20 T intel_fbc_atomic_check +ffffffff81a7b3e0 T intel_fbc_disable +ffffffff81a7b4a0 t __intel_fbc_disable +ffffffff81a7b5e0 T intel_fbc_update +ffffffff81a7bca0 T intel_fbc_reset_underrun +ffffffff81a7be00 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a7bec0 T intel_fbc_add_plane +ffffffff81a7bef0 T intel_fbc_init +ffffffff81a7c170 T intel_fbc_sanitize +ffffffff81a7c240 T intel_fbc_crtc_debugfs_add +ffffffff81a7c270 T intel_fbc_debugfs_register +ffffffff81a7c2a0 t intel_fbc_is_ok +ffffffff81a7c410 t intel_fbc_update_state +ffffffff81a7c790 t intel_fbc_underrun_work_fn +ffffffff81a7c860 t ivb_fbc_activate +ffffffff81a7cab0 t ilk_fbc_deactivate +ffffffff81a7cb60 t ilk_fbc_is_active +ffffffff81a7cbc0 t ivb_fbc_is_compressing +ffffffff81a7cc30 t snb_fbc_nuke +ffffffff81a7ccb0 t ilk_fbc_program_cfb +ffffffff81a7cd10 t ivb_fbc_set_false_color +ffffffff81a7cd90 t snb_fbc_activate +ffffffff81a7ce20 t ilk_fbc_is_compressing +ffffffff81a7ce90 t ilk_fbc_activate +ffffffff81a7cfc0 t i965_fbc_nuke +ffffffff81a7d060 t g4x_fbc_activate +ffffffff81a7d170 t g4x_fbc_deactivate +ffffffff81a7d200 t g4x_fbc_is_active +ffffffff81a7d260 t g4x_fbc_is_compressing +ffffffff81a7d2c0 t g4x_fbc_program_cfb +ffffffff81a7d310 t i8xx_fbc_activate +ffffffff81a7d480 t i8xx_fbc_deactivate +ffffffff81a7d550 t i8xx_fbc_is_active +ffffffff81a7d5b0 t i8xx_fbc_is_compressing +ffffffff81a7d610 t i8xx_fbc_program_cfb +ffffffff81a7d690 t i8xx_fbc_nuke +ffffffff81a7e000 T intel_fbdev_init +ffffffff81a7e4f0 t intel_fbdev_suspend_worker +ffffffff81a7e520 T intel_fbdev_initial_config_async +ffffffff81a7e590 T intel_fbdev_unregister +ffffffff81a7e5d0 T intel_fbdev_set_suspend +ffffffff81a7e600 T intel_fbdev_fini +ffffffff81a7e6a0 T intel_fbdev_output_poll_changed +ffffffff81a7e740 T intel_fbdev_restore_mode +ffffffff81a7e7c0 T intel_fbdev_framebuffer +ffffffff81a7e800 t intelfb_create +ffffffff81a7ee00 t intelfb_dirty +ffffffff81a7ee70 t intel_fbdev_set_par +ffffffff81a7f000 T assert_fdi_tx_enabled +ffffffff81a7f020 t assert_fdi_tx +ffffffff81a7f160 T assert_fdi_tx_disabled +ffffffff81a7f180 T assert_fdi_rx_enabled +ffffffff81a7f270 T assert_fdi_rx_disabled +ffffffff81a7f360 T assert_fdi_tx_pll_enabled +ffffffff81a7f440 T assert_fdi_rx_pll_enabled +ffffffff81a7f530 T assert_fdi_rx_pll_disabled +ffffffff81a7f620 T intel_fdi_link_train +ffffffff81a7f640 T intel_fdi_pll_freq_update +ffffffff81a7f6f0 T intel_fdi_link_freq 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intel_frontbuffer_flip +ffffffff81a84200 T __intel_fb_invalidate +ffffffff81a84290 T __intel_fb_flush +ffffffff81a84380 T intel_frontbuffer_get +ffffffff81a844c0 t frontbuffer_active +ffffffff81a844f0 t frontbuffer_retire +ffffffff81a84530 T intel_frontbuffer_put +ffffffff81a84660 T intel_frontbuffer_track +ffffffff81a85000 T intel_atomic_global_obj_init +ffffffff81a85070 T intel_atomic_global_obj_cleanup +ffffffff81a85160 T intel_atomic_get_global_obj_state +ffffffff81a853b0 T intel_atomic_get_old_global_obj_state +ffffffff81a85410 T intel_atomic_get_new_global_obj_state +ffffffff81a85470 T intel_atomic_swap_global_state +ffffffff81a855b0 T intel_atomic_clear_global_state +ffffffff81a856d0 T intel_atomic_lock_global_state +ffffffff81a85760 T intel_atomic_serialize_global_state +ffffffff81a857f0 T intel_atomic_global_state_is_serialized +ffffffff81a86000 T intel_gmbus_is_valid_pin +ffffffff81a86100 T intel_gmbus_reset +ffffffff81a86160 T intel_bb_set_bits +ffffffff81a862a0 T intel_bb_set_dir +ffffffff81a862d0 T intel_bb_read_bits +ffffffff81a86460 T intel_acquire_bus +ffffffff81a86660 T intel_release_bus +ffffffff81a86800 T intel_send_start +ffffffff81a86820 T intel_send_stop +ffffffff81a86840 T intel_initiate_xfer +ffffffff81a86860 T intel_read_byte +ffffffff81a86880 T intel_write_byte +ffffffff81a868a0 T intel_gmbus_output_aksv +ffffffff81a86970 t do_gmbus_xfer +ffffffff81a86f70 T intel_gmbus_setup +ffffffff81a872f0 T intel_gmbus_teardown +ffffffff81a87370 T intel_gmbus_get_adapter +ffffffff81a873f0 T intel_gmbus_force_bit +ffffffff81a87490 T intel_gmbus_is_forced_bit +ffffffff81a874c0 T intel_gmbus_irq_handler +ffffffff81a87560 t gmbus_xfer_read +ffffffff81a87850 t gmbus_xfer_write +ffffffff81a87a90 t gmbus_wait +ffffffff81a87e70 t gmbus_wait_idle +ffffffff81a88000 t gmbus_xfer +ffffffff81a880e0 t gmbus_func +ffffffff81a88120 t gmbus_lock_bus +ffffffff81a88140 t gmbus_trylock_bus +ffffffff81a881a0 t gmbus_unlock_bus +ffffffff81a89000 T intel_hdcp_capable +ffffffff81a890a0 t intel_hdcp_read_valid_bksv +ffffffff81a89330 T intel_hdcp2_capable +ffffffff81a89450 T is_hdcp_supported +ffffffff81a894a0 T intel_hdcp_component_init +ffffffff81a89500 T intel_hdcp_init +ffffffff81a89680 t intel_hdcp_check_work +ffffffff81a8bfc0 t intel_hdcp_prop_work +ffffffff81a8c040 T intel_hdcp_enable +ffffffff81a8c090 T intel_hdcp_disable +ffffffff81a8c1c0 t intel_hdcp_update_value +ffffffff81a8c380 t _intel_hdcp2_disable +ffffffff81a8c770 t _intel_hdcp_disable +ffffffff81a8ca60 T intel_hdcp_update_pipe +ffffffff81a8cbd0 T intel_hdcp_component_fini +ffffffff81a8cc70 T intel_hdcp_cleanup +ffffffff81a8cdb0 T intel_hdcp_atomic_check +ffffffff81a8ce40 T intel_hdcp_handle_cp_irq +ffffffff81a8cf40 t __delayed_work_tick +ffffffff81a8cf60 t hdcp2_authenticate_repeater_topology +ffffffff81a8d220 t transcoder_name +ffffffff81a8d260 t intel_hdcp_get_repeater_ctl +ffffffff81a8d330 t ktime_get_raw +ffffffff81a8d3b0 t wait_remaining_ms_from_jiffies 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g4x_set_infoframes +ffffffff81a92910 t g4x_infoframes_enabled +ffffffff81a92990 t hsw_set_infoframes +ffffffff81a92c20 t hsw_infoframes_enabled +ffffffff81a92cb0 t ibx_write_infoframe +ffffffff81a92fc0 t ibx_read_infoframe +ffffffff81a93130 t ibx_set_infoframes +ffffffff81a93460 t ibx_infoframes_enabled +ffffffff81a934f0 t cpt_write_infoframe +ffffffff81a937f0 t cpt_read_infoframe +ffffffff81a93960 t cpt_set_infoframes +ffffffff81a93c40 t cpt_infoframes_enabled +ffffffff81a93cb0 T intel_hdmi_init_connector +ffffffff81a94430 T intel_hdmi_dsc_get_slice_height +ffffffff81a94490 T intel_hdmi_dsc_get_num_slices +ffffffff81a94610 T intel_hdmi_dsc_get_bpp +ffffffff81a946f0 t intel_hdmi_compute_clock +ffffffff81a94950 t hdmi_port_clock_valid +ffffffff81a94b70 t intel_write_infoframe +ffffffff81a94d40 t intel_hdmi_detect +ffffffff81a94ee0 t intel_hdmi_force +ffffffff81a94f80 t intel_hdmi_connector_register +ffffffff81a94f90 t intel_hdmi_connector_unregister +ffffffff81a94fa0 t intel_hdmi_set_edid +ffffffff81a95230 t intel_hdmi_get_modes +ffffffff81a95240 t intel_hdmi_mode_valid +ffffffff81a953f0 t intel_hdmi_connector_atomic_check +ffffffff81a95420 t intel_hdmi_mode_clock_valid +ffffffff81a955c0 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a95700 t intel_hdmi_hdcp_read_bksv +ffffffff81a957d0 t intel_hdmi_hdcp_read_bstatus +ffffffff81a958a0 t intel_hdmi_hdcp_repeater_present +ffffffff81a95980 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a95a50 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a95b30 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a95c00 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a95cf0 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a95f60 t intel_hdmi_hdcp_check_link +ffffffff81a96280 t intel_hdmi_hdcp2_capable +ffffffff81a96340 t intel_hdmi_hdcp2_write_msg +ffffffff81a96430 t intel_hdmi_hdcp2_read_msg +ffffffff81a96830 t intel_hdmi_hdcp2_check_link +ffffffff81a97000 T intel_hpd_pin_default +ffffffff81a97030 T intel_encoder_hotplug +ffffffff81a97160 T intel_hpd_trigger_irq +ffffffff81a971d0 T intel_hpd_irq_handler +ffffffff81a975f0 T intel_hpd_init +ffffffff81a97700 T intel_hpd_poll_enable +ffffffff81a97780 T intel_hpd_poll_disable +ffffffff81a977e0 T intel_hpd_init_early +ffffffff81a978f0 t i915_hotplug_work_func +ffffffff81a97cd0 t i915_digport_work_func +ffffffff81a97e50 t i915_hpd_poll_init_work +ffffffff81a97f50 t intel_hpd_irq_storm_reenable_work +ffffffff81a98270 T intel_hpd_cancel_work +ffffffff81a98390 T intel_hpd_disable +ffffffff81a98420 T intel_hpd_enable +ffffffff81a98490 T intel_hpd_debugfs_register +ffffffff81a984c0 t __delayed_work_tick +ffffffff81a99000 T i915_hotplug_interrupt_update_locked +ffffffff81a990c0 T i915_hotplug_interrupt_update +ffffffff81a99190 T i9xx_hpd_irq_ack +ffffffff81a992d0 T i9xx_hpd_irq_handler +ffffffff81a99480 T ibx_hpd_irq_handler +ffffffff81a99620 T xelpdp_pica_irq_handler +ffffffff81a998e0 T icp_irq_handler +ffffffff81a99b70 T spt_irq_handler +ffffffff81a99e10 T ilk_hpd_irq_handler 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intel_hti_dpll_mask +ffffffff81a9d000 T intel_load_detect_get_pipe +ffffffff81a9d370 t intel_modeset_disable_planes +ffffffff81a9d430 T intel_load_detect_release_pipe +ffffffff81a9e000 T intel_lpe_audio_irq_handler +ffffffff81a9e020 T intel_lpe_audio_init +ffffffff81a9e050 T intel_lpe_audio_teardown +ffffffff81a9e070 T intel_lpe_audio_notify +ffffffff81a9f000 T lspcon_detect_hdr_capability +ffffffff81a9f0b0 T lspcon_write_infoframe +ffffffff81a9f7f0 T lspcon_read_infoframe +ffffffff81a9f830 T lspcon_set_infoframes +ffffffff81a9fa90 T lspcon_infoframes_enabled +ffffffff81a9fc60 T lspcon_wait_pcon_mode +ffffffff81a9fc80 t lspcon_wait_mode +ffffffff81a9ff40 T lspcon_init +ffffffff81aa0340 T intel_lspcon_infoframes_enabled +ffffffff81aa0370 T lspcon_resume +ffffffff81aa0610 t lspcon_change_mode +ffffffff81aa1000 T intel_lvds_port_enabled +ffffffff81aa1080 T intel_get_lvds_encoder +ffffffff81aa10e0 T intel_is_dual_link_lvds +ffffffff81aa1140 T intel_lvds_init +ffffffff81aa17e0 t intel_enable_lvds +ffffffff81aa1920 t intel_pre_enable_lvds +ffffffff81aa1c00 t intel_lvds_compute_config +ffffffff81aa1d60 t pch_disable_lvds +ffffffff81aa1d80 t pch_post_disable_lvds +ffffffff81aa1da0 t gmch_disable_lvds +ffffffff81aa1dd0 t intel_lvds_get_hw_state +ffffffff81aa1e90 t intel_lvds_get_config +ffffffff81aa1fa0 t intel_lvds_shutdown +ffffffff81aa2040 t compute_is_dual_link_lvds +ffffffff81aa2110 t intel_no_lvds_dmi_callback +ffffffff81aa2160 t intel_disable_lvds +ffffffff81aa2280 t intel_lvds_get_modes +ffffffff81aa22d0 t intel_lvds_mode_valid +ffffffff81aa2370 t intel_dual_link_lvds_callback +ffffffff81aa3000 T _intel_modeset_lock_begin +ffffffff81aa3060 T _intel_modeset_lock_loop +ffffffff81aa30a0 T _intel_modeset_lock_end +ffffffff81aa4000 T intel_modeset_setup_hw_state +ffffffff81aa52d0 t intel_crtc_disable_noatomic +ffffffff81aa58b0 t intel_crtc_disable_noatomic_begin +ffffffff81aa6000 T intel_modeset_verify_crtc +ffffffff81aa6540 t verify_connector_state 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+ffffffff81aacac0 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81aacb20 t intel_panel_add_fixed_mode +ffffffff81aacca0 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81aacd10 T intel_panel_add_encoder_fixed_mode +ffffffff81aacd50 T intel_panel_fitting +ffffffff81aad3b0 T intel_panel_detect +ffffffff81aad440 T intel_panel_mode_valid +ffffffff81aad4d0 T intel_panel_init_alloc +ffffffff81aad520 T intel_panel_init +ffffffff81aad640 T intel_panel_fini +ffffffff81aae000 T intel_has_pch_trancoder +ffffffff81aae060 T intel_crtc_pch_transcoder +ffffffff81aae0a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81aae0f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81aae140 T ilk_pch_pre_enable +ffffffff81aae170 T ilk_pch_enable +ffffffff81aae750 t ilk_pch_transcoder_set_timings +ffffffff81aae9b0 T ilk_pch_disable +ffffffff81aae9d0 T ilk_pch_post_disable +ffffffff81aaeda0 T ilk_pch_get_config +ffffffff81aaef60 T lpt_pch_enable +ffffffff81aaf1d0 T lpt_pch_disable +ffffffff81aaf2e0 T lpt_pch_get_config +ffffffff81aaf3b0 T intel_pch_sanitize +ffffffff81aaf690 t assert_pch_dp_disabled +ffffffff81aaf810 t assert_pch_hdmi_disabled +ffffffff81ab0000 T lpt_disable_iclkip +ffffffff81ab0070 T lpt_iclkip +ffffffff81ab0100 T lpt_program_iclkip +ffffffff81ab0390 T lpt_get_iclkip +ffffffff81ab04a0 T lpt_disable_clkout_dp +ffffffff81ab0580 T intel_init_pch_refclk +ffffffff81ab2000 T intel_crtc_initial_plane_config +ffffffff81ab3000 T intel_pmdemand_init +ffffffff81ab3120 T intel_pmdemand_init_early +ffffffff81ab31a0 T intel_pmdemand_update_phys_mask +ffffffff81ab3240 T intel_pmdemand_update_port_clock +ffffffff81ab3280 T intel_pmdemand_atomic_check +ffffffff81ab3620 t intel_pmdemand_update_max_ddiclk +ffffffff81ab36f0 t intel_pmdemand_update_active_non_tc_phys +ffffffff81ab38f0 T intel_pmdemand_init_pmdemand_params +ffffffff81ab3ac0 T intel_pmdemand_program_dbuf +ffffffff81ab3c50 t intel_pmdemand_wait +ffffffff81ab3e40 T intel_pmdemand_pre_plane_update +ffffffff81ab3f30 t intel_pmdemand_program_params +ffffffff81ab4370 T intel_pmdemand_post_plane_update +ffffffff81ab4450 t intel_pmdemand_duplicate_state +ffffffff81ab44e0 t intel_pmdemand_destroy_state +ffffffff81ab5000 T intel_pps_lock +ffffffff81ab5060 T intel_pps_unlock +ffffffff81ab50c0 T intel_pps_reset_all +ffffffff81ab5210 T intel_pps_check_power_unlocked +ffffffff81ab54f0 t pps_name +ffffffff81ab5590 T intel_pps_wait_power_cycle +ffffffff81ab5630 t wait_panel_power_cycle +ffffffff81ab5810 T intel_pps_vdd_on_unlocked +ffffffff81ab5d80 T intel_pps_vdd_on +ffffffff81ab5f10 T intel_pps_vdd_off_sync +ffffffff81ab5fe0 t intel_pps_vdd_off_sync_unlocked +ffffffff81ab6400 T intel_pps_vdd_off_unlocked +ffffffff81ab65b0 T intel_pps_on_unlocked +ffffffff81ab6a40 T intel_pps_on +ffffffff81ab6ae0 T intel_pps_off_unlocked +ffffffff81ab6ec0 T intel_pps_off +ffffffff81ab6f60 T intel_pps_backlight_on +ffffffff81ab7150 T intel_pps_backlight_off +ffffffff81ab7340 T intel_pps_backlight_power +ffffffff81ab7530 T vlv_pps_init +ffffffff81ab7710 t vlv_detach_power_sequencer +ffffffff81ab78e0 t vlv_steal_power_sequencer +ffffffff81ab7a10 t pps_init_delays +ffffffff81ab7eb0 t pps_init_registers +ffffffff81ab8240 T intel_pps_have_panel_power_or_vdd +ffffffff81ab8390 T intel_pps_encoder_reset +ffffffff81ab8530 t vlv_initial_power_sequencer_setup +ffffffff81ab8840 t pps_vdd_init +ffffffff81ab89f0 T intel_pps_init +ffffffff81ab8e60 t edp_panel_vdd_work +ffffffff81ab8f10 T intel_pps_init_late +ffffffff81ab9150 T intel_pps_unlock_regs_wa +ffffffff81ab9260 T intel_pps_setup +ffffffff81ab92d0 T assert_pps_unlocked +ffffffff81ab9560 t intel_pps_get_registers +ffffffff81ab9d70 t wait_panel_status +ffffffff81aba180 t intel_pps_readout_hw_state +ffffffff81aba330 t __delayed_work_tick +ffffffff81abb000 T intel_psr_irq_handler +ffffffff81abb640 t transcoder_name +ffffffff81abb680 T intel_psr_init_dpcd +ffffffff81abb920 T intel_psr_compute_config +ffffffff81abbb00 t intel_psr2_config_valid +ffffffff81abbf70 T intel_psr_get_config +ffffffff81abc110 T intel_psr_disable +ffffffff81abc220 t intel_psr_disable_locked +ffffffff81abc5a0 T intel_psr_pause +ffffffff81abc790 t intel_psr_exit +ffffffff81abca40 T intel_psr_resume +ffffffff81abcad0 t intel_psr_activate +ffffffff81abd200 T intel_psr2_disable_plane_sel_fetch_arm +ffffffff81abd270 T intel_psr2_program_plane_sel_fetch_arm +ffffffff81abd310 T intel_psr2_program_plane_sel_fetch_noarm +ffffffff81abd480 T intel_psr2_program_trans_man_trk_ctl +ffffffff81abd570 T intel_psr2_sel_fetch_update +ffffffff81abdcf0 T intel_psr_pre_plane_update +ffffffff81abdec0 t wm_optimization_wa +ffffffff81abe050 T intel_psr_post_plane_update +ffffffff81abec80 T intel_psr_wait_for_idle_locked +ffffffff81abee50 T intel_psr_debug_set +ffffffff81abf170 T intel_psr_invalidate +ffffffff81abf3b0 T intel_psr_flush +ffffffff81abf7e0 T intel_psr_init +ffffffff81abf910 t intel_psr_work +ffffffff81abfab0 t tgl_dc3co_disable_work +ffffffff81abfb00 T intel_psr_short_pulse +ffffffff81abfec0 T intel_psr_enabled +ffffffff81abff40 T intel_psr_lock +ffffffff81ac0000 T intel_psr_unlock +ffffffff81ac00c0 T intel_psr_debugfs_register +ffffffff81ac00f0 T intel_psr_connector_debugfs_add +ffffffff81ac0120 t _compute_psr2_sdp_prior_scanline_indication +ffffffff81ac01e0 t _compute_psr2_wake_times +ffffffff81ac02d0 t intel_psr2_sel_fetch_config_valid +ffffffff81ac0360 t psr2_granularity_check +ffffffff81ac0450 t tgl_psr2_disable_dc3co +ffffffff81ac0560 t __delayed_work_tick +ffffffff81ac1000 T intel_lookup_range_min_qp +ffffffff81ac1110 T intel_lookup_range_max_qp +ffffffff81ac2000 T intel_init_quirks +ffffffff81ac20f0 T intel_has_quirk +ffffffff81ac2130 t quirk_ssc_force_disable +ffffffff81ac2160 t quirk_invert_brightness +ffffffff81ac2190 t quirk_backlight_present +ffffffff81ac21c0 t quirk_increase_t12_delay +ffffffff81ac21f0 t quirk_increase_ddi_disabled_time +ffffffff81ac2220 t intel_dmi_reverse_brightness +ffffffff81ac2270 t intel_dmi_no_pps_backlight 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intel_sdvo_read_response +ffffffff81ac67f0 t intel_sdvo_get_value +ffffffff81ac6860 t intel_sdvo_write_sdvox +ffffffff81ac6a50 t intel_sdvo_write_infoframe +ffffffff81ac6c10 t intel_sdvo_read_infoframe +ffffffff81ac6e30 t intel_sdvo_hotplug +ffffffff81ac6e70 t intel_sdvo_connector_get_hw_state +ffffffff81ac6f00 t intel_sdvo_detect +ffffffff81ac71f0 t intel_sdvo_connector_register +ffffffff81ac7200 t intel_sdvo_connector_unregister +ffffffff81ac7210 t intel_sdvo_connector_duplicate_state +ffffffff81ac7290 t intel_sdvo_connector_atomic_set_property +ffffffff81ac7460 t intel_sdvo_connector_atomic_get_property +ffffffff81ac7680 t intel_sdvo_get_analog_edid +ffffffff81ac76b0 t intel_sdvo_connector_matches_edid +ffffffff81ac7740 t intel_sdvo_get_modes +ffffffff81ac79e0 t intel_sdvo_mode_valid +ffffffff81ac7af0 t intel_sdvo_atomic_check +ffffffff81ac7ba0 t intel_sdvo_create_enhance_property +ffffffff81ac9000 T intel_snps_phy_wait_for_calibration +ffffffff81ac90d0 T intel_snps_phy_update_psr_power_state +ffffffff81ac9190 T intel_snps_phy_set_signal_levels +ffffffff81ac93e0 T intel_mpllb_calc_state +ffffffff81ac9570 T intel_snps_phy_check_hdmi_link_rate +ffffffff81ac9610 T intel_mpllb_enable +ffffffff81ac9850 T intel_mpllb_disable +ffffffff81ac99c0 T intel_mpllb_calc_port_clock +ffffffff81ac9a90 T intel_mpllb_readout_hw_state +ffffffff81ac9c00 T intel_mpllb_state_verify +ffffffff81acb000 T vlv_plane_min_cdclk +ffffffff81acb0f0 T ivb_plane_min_cdclk +ffffffff81acb1b0 T hsw_plane_min_cdclk +ffffffff81acb250 T chv_plane_check_rotation +ffffffff81acb2c0 T intel_sprite_plane_create +ffffffff81acb610 t vlv_sprite_update_noarm +ffffffff81acb710 t vlv_sprite_update_arm +ffffffff81acbdb0 t vlv_sprite_disable_arm +ffffffff81acbe40 t vlv_sprite_get_hw_state +ffffffff81acbf10 t vlv_sprite_check +ffffffff81acbfe0 t ivb_sprite_update_noarm +ffffffff81acc150 t ivb_sprite_update_arm +ffffffff81acc520 t ivb_sprite_disable_arm +ffffffff81acc5d0 t ivb_sprite_get_hw_state +ffffffff81acc690 t g4x_sprite_check +ffffffff81acc930 t hsw_sprite_max_stride +ffffffff81acc980 t g4x_sprite_max_stride +ffffffff81acc9f0 t ivb_sprite_min_cdclk +ffffffff81accb30 t g4x_sprite_update_noarm +ffffffff81accc90 t g4x_sprite_update_arm +ffffffff81acd0d0 t g4x_sprite_disable_arm +ffffffff81acd180 t g4x_sprite_get_hw_state +ffffffff81acd240 t g4x_sprite_min_cdclk +ffffffff81acd310 t vlv_sprite_ctl +ffffffff81acd500 t vlv_sprite_format_mod_supported +ffffffff81acd630 t ivb_sprite_ctl +ffffffff81acd860 t g4x_sprite_ctl +ffffffff81acda20 t snb_sprite_format_mod_supported +ffffffff81acdb10 t g4x_sprite_format_mod_supported +ffffffff81ace000 T intel_sprite_set_colorkey_ioctl +ffffffff81acf000 T intel_tc_port_in_tbt_alt_mode +ffffffff81acf070 T intel_tc_port_in_dp_alt_mode +ffffffff81acf0e0 T intel_tc_port_in_legacy_mode +ffffffff81acf150 T intel_tc_cold_requires_aux_pw +ffffffff81acf1c0 T intel_tc_port_get_lane_mask +ffffffff81acf2f0 T intel_tc_port_get_pin_assignment_mask +ffffffff81acf420 T intel_tc_port_fia_max_lane_count +ffffffff81acf600 T intel_tc_port_set_fia_lane_count +ffffffff81acf7d0 T intel_tc_port_init_mode +ffffffff81acfa00 t intel_tc_port_update_mode +ffffffff81acfdb0 T intel_tc_port_sanitize_mode +ffffffff81ad00e0 T intel_tc_port_connected_locked +ffffffff81ad0240 T intel_tc_port_ref_held +ffffffff81ad02a0 T intel_tc_port_connected +ffffffff81ad0310 T intel_tc_port_link_needs_reset +ffffffff81ad03c0 T intel_tc_port_link_reset +ffffffff81ad04c0 T intel_tc_port_link_cancel_reset_work +ffffffff81ad0570 T intel_tc_port_lock +ffffffff81ad0590 t __intel_tc_port_lock +ffffffff81ad06d0 T intel_tc_port_suspend +ffffffff81ad0730 T intel_tc_port_unlock +ffffffff81ad07b0 T intel_tc_port_get_link +ffffffff81ad0840 T intel_tc_port_put_link +ffffffff81ad08f0 T intel_tc_port_init +ffffffff81ad0b30 t kasprintf +ffffffff81ad0c00 t intel_tc_port_disconnect_phy_work +ffffffff81ad0c50 t intel_tc_port_link_reset_work +ffffffff81ad0f50 T intel_tc_port_cleanup +ffffffff81ad1010 t intel_tc_port_needs_reset +ffffffff81ad1110 t tgl_tc_phy_cold_off_domain +ffffffff81ad1140 t xelpdp_tc_phy_hpd_live_status +ffffffff81ad1250 t adlp_tc_phy_is_ready +ffffffff81ad1350 t xelpdp_tc_phy_is_owned +ffffffff81ad1420 t xelpdp_tc_phy_get_hw_state +ffffffff81ad15a0 t xelpdp_tc_phy_connect +ffffffff81ad17f0 t xelpdp_tc_phy_disconnect +ffffffff81ad1930 t adlp_tc_phy_init +ffffffff81ad19a0 t tc_phy_get_current_mode +ffffffff81ad1cc0 t tc_phy_wait_for_ready +ffffffff81ad1e30 t xelpdp_tc_phy_enable_tcss_power +ffffffff81ad2080 t tc_phy_verify_legacy_or_dp_alt_mode +ffffffff81ad2260 t xelpdp_tc_phy_wait_for_tcss_power +ffffffff81ad2470 t adlp_tc_phy_cold_off_domain +ffffffff81ad24d0 t adlp_tc_phy_hpd_live_status +ffffffff81ad25d0 t adlp_tc_phy_is_owned +ffffffff81ad2690 t adlp_tc_phy_get_hw_state +ffffffff81ad2720 t adlp_tc_phy_connect +ffffffff81ad2a10 t adlp_tc_phy_disconnect +ffffffff81ad2b70 t icl_tc_phy_hpd_live_status +ffffffff81ad2cd0 t icl_tc_phy_is_ready +ffffffff81ad2de0 t icl_tc_phy_is_owned +ffffffff81ad2ef0 t icl_tc_phy_get_hw_state +ffffffff81ad2f80 t icl_tc_phy_connect +ffffffff81ad30f0 t icl_tc_phy_disconnect +ffffffff81ad3170 t tgl_tc_phy_init +ffffffff81ad32a0 t icl_tc_phy_take_ownership +ffffffff81ad3410 t icl_tc_phy_cold_off_domain +ffffffff81ad3470 t icl_tc_phy_init +ffffffff81ad34d0 t __delayed_work_tick +ffffffff81ad4000 T intel_tv_init +ffffffff81ad43f0 t intel_tv_compute_config +ffffffff81ad48a0 t intel_tv_get_config +ffffffff81ad4d60 t intel_tv_pre_enable +ffffffff81ad5680 t intel_enable_tv +ffffffff81ad56e0 t intel_disable_tv +ffffffff81ad5740 t intel_tv_get_hw_state +ffffffff81ad57a0 t intel_tv_connector_duplicate_state +ffffffff81ad5820 t intel_tv_mode_to_mode +ffffffff81ad5970 t intel_tv_get_modes +ffffffff81ad5cb0 t intel_tv_detect +ffffffff81ad6140 t intel_tv_mode_valid +ffffffff81ad61f0 t intel_tv_atomic_check +ffffffff81ad7000 T i915_get_vblank_counter +ffffffff81ad71e0 T g4x_get_vblank_counter +ffffffff81ad7270 T intel_crtc_get_vblank_timestamp +ffffffff81ad7290 t i915_get_crtc_scanoutpos +ffffffff81ad7690 T intel_get_crtc_scanline +ffffffff81ad7700 t __intel_get_crtc_scanline +ffffffff81ad7950 T intel_wait_for_pipe_scanline_stopped +ffffffff81ad7960 t wait_for_pipe_scanline_moving +ffffffff81ad7bc0 T intel_wait_for_pipe_scanline_moving +ffffffff81ad7be0 T intel_crtc_update_active_timings +ffffffff81ad8000 T intel_dsc_source_support +ffffffff81ad8050 T intel_dsc_compute_params +ffffffff81ad8650 T intel_dsc_power_domain +ffffffff81ad8700 T intel_dsc_get_num_vdsc_instances +ffffffff81ad8750 T intel_dsc_dsi_pps_write +ffffffff81ad89f0 T intel_dsc_dp_pps_write +ffffffff81ad8ae0 T intel_uncompressed_joiner_enable +ffffffff81ad8c00 T intel_dsc_enable +ffffffff81ada600 T intel_dsc_disable +ffffffff81ada780 T intel_dsc_get_config +ffffffff81adb000 T intel_vga_disable +ffffffff81adb120 T intel_vga_redisable_power_on +ffffffff81adb1c0 T intel_vga_redisable +ffffffff81adb280 T intel_vga_reset_io_mem +ffffffff81adb2e0 T intel_vga_register +ffffffff81adb310 T intel_vga_unregister +ffffffff81adc000 T intel_vrr_is_capable +ffffffff81adc080 T intel_vrr_check_modeset +ffffffff81adc110 T intel_vrr_vmin_vblank_start +ffffffff81adc170 T intel_vrr_vmax_vblank_start +ffffffff81adc1d0 T intel_vrr_compute_config +ffffffff81adc350 T intel_vrr_set_transcoder_timings +ffffffff81adc530 T intel_vrr_send_push +ffffffff81adc5b0 T intel_vrr_is_push_sent +ffffffff81adc640 T intel_vrr_enable +ffffffff81adc760 T intel_vrr_disable +ffffffff81adc8a0 T intel_vrr_get_config +ffffffff81add000 T intel_update_watermarks +ffffffff81add040 T intel_compute_pipe_wm +ffffffff81add090 T intel_compute_intermediate_wm +ffffffff81add120 T intel_initial_watermarks +ffffffff81add170 T intel_atomic_update_watermarks +ffffffff81add1b0 T intel_optimize_watermarks +ffffffff81add1f0 T intel_compute_global_watermarks +ffffffff81add240 T intel_wm_get_hw_state +ffffffff81add280 T intel_wm_plane_visible +ffffffff81add2e0 T intel_print_wm_latency +ffffffff81add3f0 T intel_wm_init +ffffffff81add410 T intel_wm_debugfs_register +ffffffff81ade000 T skl_update_scaler_crtc +ffffffff81ade0b0 t skl_update_scaler +ffffffff81ade3f0 T skl_update_scaler_plane +ffffffff81ade7f0 T intel_atomic_setup_scalers +ffffffff81aded50 T skl_pfit_enable +ffffffff81adf240 T skl_program_plane_scaler +ffffffff81adf930 T skl_detach_scalers +ffffffff81adfa90 T skl_scaler_disable +ffffffff81adfbc0 T skl_scaler_get_config +ffffffff81ae0000 T skl_format_to_fourcc +ffffffff81ae0180 T icl_is_nv12_y_plane +ffffffff81ae01f0 T icl_hdr_plane_mask +ffffffff81ae0220 T icl_is_hdr_plane +ffffffff81ae0260 T skl_calc_main_surface_offset +ffffffff81ae04a0 T skl_universal_plane_create +ffffffff81ae0ce0 t icl_plane_min_width +ffffffff81ae0e70 t icl_hdr_plane_max_width +ffffffff81ae0ec0 t icl_sdr_plane_max_width +ffffffff81ae0ef0 t icl_plane_max_height +ffffffff81ae0f20 t icl_plane_min_cdclk +ffffffff81ae0f60 t glk_plane_max_width +ffffffff81ae1010 t skl_plane_max_height +ffffffff81ae1040 t glk_plane_min_cdclk +ffffffff81ae10b0 t skl_plane_max_width +ffffffff81ae1180 t skl_plane_min_cdclk +ffffffff81ae11f0 t skl_plane_max_stride +ffffffff81ae1290 t icl_plane_update_noarm +ffffffff81ae1b40 t icl_plane_update_arm +ffffffff81ae1ce0 t icl_plane_disable_arm +ffffffff81ae1df0 t skl_plane_update_noarm +ffffffff81ae1f90 t skl_plane_update_arm +ffffffff81ae22b0 t skl_plane_disable_arm +ffffffff81ae2360 t skl_plane_get_hw_state +ffffffff81ae2430 t skl_plane_check +ffffffff81ae3060 t skl_plane_async_flip +ffffffff81ae3190 t skl_plane_enable_flip_done +ffffffff81ae31f0 t skl_plane_disable_flip_done +ffffffff81ae3250 T skl_get_initial_plane_config +ffffffff81ae3a10 t skl_plane_aux_dist +ffffffff81ae3b00 t skl_surf_address +ffffffff81ae3c20 t skl_plane_check_nv12_rotation +ffffffff81ae3cc0 t pxp_is_borked +ffffffff81ae3d20 t skl_plane_ctl +ffffffff81ae4400 t glk_plane_color_ctl +ffffffff81ae4550 t skl_check_main_ccs_coordinates +ffffffff81ae46e0 t gen12_plane_format_mod_supported +ffffffff81ae4930 t skl_plane_format_mod_supported +ffffffff81ae5000 T intel_enabled_dbuf_slices_mask +ffffffff81ae5120 T intel_sagv_pre_plane_update +ffffffff81ae52b0 T intel_sagv_post_plane_update +ffffffff81ae5520 T intel_can_enable_sagv +ffffffff81ae5590 T skl_ddb_dbuf_slice_mask +ffffffff81ae5640 T skl_write_plane_wm +ffffffff81ae5ac0 T skl_write_cursor_wm +ffffffff81ae5ea0 T skl_ddb_allocation_overlaps +ffffffff81ae5f40 T intel_wm_state_verify +ffffffff81ae6920 t skl_pipe_wm_get_hw_state +ffffffff81ae6c70 T skl_watermark_ipc_enabled +ffffffff81ae6ca0 T skl_watermark_ipc_update +ffffffff81ae6d50 T skl_watermark_ipc_init +ffffffff81ae6e20 T skl_wm_init +ffffffff81ae7650 T intel_atomic_get_dbuf_state +ffffffff81ae7670 T intel_dbuf_init +ffffffff81ae76e0 T intel_dbuf_pre_plane_update +ffffffff81ae79b0 T intel_dbuf_post_plane_update +ffffffff81ae7a80 T intel_mbus_dbox_update +ffffffff81ae7cf0 T skl_watermark_debugfs_register +ffffffff81ae7d20 t skl_sagv_disable +ffffffff81ae7e40 t skl_compute_wm +ffffffff81aeb130 t skl_wm_get_hw_state_and_sanitize +ffffffff81aeb920 t skl_build_plane_wm_single +ffffffff81aebcb0 t skl_compute_wm_params +ffffffff81aec080 t skl_compute_plane_wm +ffffffff81aec4b0 t skl_compute_dbuf_slices +ffffffff81aec9b0 t skl_ddb_entry_for_slices +ffffffff81aecaf0 t intel_dbuf_duplicate_state +ffffffff81aecb80 t intel_dbuf_destroy_state +ffffffff81aed000 T pixel_format_from_register_bits +ffffffff81aed060 T vlv_dsi_wait_for_fifo_empty +ffffffff81aed120 T vlv_dsi_init +ffffffff81aed930 t intel_dsi_compute_config +ffffffff81aeda80 t intel_dsi_pre_enable +ffffffff81aef530 t bxt_dsi_enable +ffffffff81aef550 t intel_dsi_disable +ffffffff81aef800 t intel_dsi_post_disable +ffffffff81af0480 t intel_dsi_get_hw_state +ffffffff81af0750 t intel_dsi_get_config +ffffffff81af0ef0 t intel_dsi_encoder_destroy +ffffffff81af0f20 t intel_dsi_prepare +ffffffff81af1c00 t dpi_send_cmd +ffffffff81af1d80 t intel_dsi_host_attach +ffffffff81af1db0 t intel_dsi_host_detach +ffffffff81af1de0 t intel_dsi_host_transfer +ffffffff81af2240 t vlv_dsi_mode_valid +ffffffff81af3000 T vlv_dsi_pll_compute +ffffffff81af33a0 t vlv_dsi_pclk +ffffffff81af3540 T vlv_dsi_pll_enable +ffffffff81af3770 T vlv_dsi_pll_disable +ffffffff81af37f0 T bxt_dsi_pll_is_enabled +ffffffff81af38c0 T bxt_dsi_pll_disable +ffffffff81af39c0 T vlv_dsi_get_pclk +ffffffff81af3a60 T bxt_dsi_get_pclk +ffffffff81af3b20 T vlv_dsi_reset_clocks +ffffffff81af3bb0 T bxt_dsi_pll_compute +ffffffff81af3d50 T bxt_dsi_pll_enable +ffffffff81af40c0 T bxt_dsi_reset_clocks +ffffffff81af41e0 T assert_dsi_pll_enabled +ffffffff81af4200 t assert_dsi_pll +ffffffff81af4310 T assert_dsi_pll_disabled +ffffffff81af5000 T i915_gem_busy_ioctl +ffffffff81af6000 T i915_gem_clflush_object +ffffffff81af61f0 t clflush_work +ffffffff81af6250 t clflush_release +ffffffff81af7000 T i915_lut_handle_alloc +ffffffff81af7020 T i915_lut_handle_free +ffffffff81af7040 T i915_gem_context_release +ffffffff81af7070 T i915_gem_init__contexts +ffffffff81af70d0 T i915_gem_context_open +ffffffff81af7230 t i915_gem_create_context +ffffffff81af7a00 t proto_context_close +ffffffff81af7ab0 t gem_context_register +ffffffff81af7c50 T i915_gem_context_close +ffffffff81af7da0 t context_close +ffffffff81af8460 T i915_gem_vm_create_ioctl +ffffffff81af8570 t xa_alloc +ffffffff81af85f0 T i915_gem_vm_destroy_ioctl +ffffffff81af86a0 T i915_gem_user_to_context_sseu +ffffffff81af8900 T i915_gem_context_lookup +ffffffff81af8a30 T i915_gem_context_create_ioctl +ffffffff81af8c80 t proto_context_register +ffffffff81af8dd0 T i915_gem_context_destroy_ioctl +ffffffff81af8ef0 T i915_gem_context_getparam_ioctl +ffffffff81af9310 T i915_gem_context_setparam_ioctl +ffffffff81af97c0 t set_proto_ctx_param +ffffffff81af9ee0 T i915_gem_context_reset_stats_ioctl +ffffffff81af9fe0 T i915_gem_engines_iter_next +ffffffff81afa030 T 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intel_guc_load_status +ffffffff81b860a0 T intel_guc_write_barrier +ffffffff81b87000 T intel_guc_ads_print_policy_info +ffffffff81b87020 T intel_guc_global_policies_update +ffffffff81b87070 T intel_guc_ads_create +ffffffff81b87560 T intel_guc_ads_init_late +ffffffff81b875b0 T intel_guc_ads_destroy +ffffffff81b87610 T intel_guc_ads_reset +ffffffff81b87680 T intel_guc_engine_usage_offset +ffffffff81b876c0 T intel_guc_engine_usage_record_map +ffffffff81b88000 T intel_guc_capture_getlistsize +ffffffff81b88020 t guc_capture_getlistsize +ffffffff81b88250 T intel_guc_capture_getlist +ffffffff81b89100 t guc_cap_list_num_regs +ffffffff81b89210 T intel_guc_capture_getnullheader +ffffffff81b892d0 T intel_guc_capture_print_engine_node +ffffffff81b897e0 T intel_guc_capture_free_node +ffffffff81b89860 T intel_guc_capture_is_matching_engine +ffffffff81b89910 T intel_guc_capture_get_matching_node +ffffffff81b89aa0 T intel_guc_capture_process +ffffffff81b8aa80 T intel_guc_capture_destroy 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i915_print_iommu_status +ffffffff81baf050 T i915_driver_probe +ffffffff81baf8d0 t i915_driver_register +ffffffff81baf9c0 T inteldrm_init_backlight +ffffffff81bafa30 t i915_welcome_messages +ffffffff81bafbb0 T i915_driver_remove +ffffffff81bafc90 T i915_driver_shutdown +ffffffff81bafe30 T i915_driver_resume_switcheroo +ffffffff81bafe90 t i915_drm_resume_early +ffffffff81baff80 t i915_drm_resume +ffffffff81bb01c0 T intagpsubmatch +ffffffff81bb0210 T intagp_print +ffffffff81bb0260 T inteldrm_wsioctl +ffffffff81bb0440 T inteldrm_wsmmap +ffffffff81bb0470 T inteldrm_alloc_screen +ffffffff81bb04a0 T inteldrm_free_screen +ffffffff81bb04c0 T inteldrm_show_screen +ffffffff81bb0590 T inteldrm_load_font +ffffffff81bb05b0 T inteldrm_list_font +ffffffff81bb05d0 T inteldrm_scrollback +ffffffff81bb05f0 T inteldrm_getchar +ffffffff81bb0610 T inteldrm_burner +ffffffff81bb06a0 T inteldrm_enter_ddb +ffffffff81bb0700 T inteldrm_doswitch +ffffffff81bb0780 T inteldrm_burner_cb +ffffffff81bb07b0 T inteldrm_backlight_update_status +ffffffff81bb0810 T inteldrm_backlight_get_brightness +ffffffff81bb0860 T inteldrm_match +ffffffff81bb08f0 T inteldrm_attach +ffffffff81bb0cf0 T inteldrm_detach +ffffffff81bb0d20 T inteldrm_activate +ffffffff81bb1030 T inteldrm_intr +ffffffff81bb1070 T inteldrm_attachhook +ffffffff81bb12d0 T inteldrm_forcedetach +ffffffff81bb1310 T inteldrm_native_backlight +ffffffff81bb1440 T inteldrm_firmware_backlight +ffffffff81bb15c0 t i915_pcode_init +ffffffff81bb1680 t i915_driver_open +ffffffff81bb16a0 t i915_driver_postclose +ffffffff81bb1700 t i915_driver_lastclose +ffffffff81bb1720 t i915_driver_release +ffffffff81bb1830 t i915_gem_reject_pin_ioctl +ffffffff81bb2000 T i915_drm_client_alloc +ffffffff81bb2070 T __i915_drm_client_free +ffffffff81bb3000 T i915_gem_get_aperture_ioctl +ffffffff81bb30d0 T i915_gem_object_unbind +ffffffff81bb3340 T i915_gem_pread_ioctl +ffffffff81bb34d0 t i915_gem_shmem_pread +ffffffff81bb38d0 t i915_gem_gtt_pread +ffffffff81bb3bf0 T i915_gem_pwrite_ioctl +ffffffff81bb3dc0 t i915_gem_gtt_pwrite_fast +ffffffff81bb4170 t i915_gem_shmem_pwrite +ffffffff81bb4600 T i915_gem_sw_finish_ioctl +ffffffff81bb4690 T i915_gem_runtime_suspend +ffffffff81bb4790 T i915_gem_object_ggtt_pin_ww +ffffffff81bb4a30 T i915_gem_object_ggtt_pin +ffffffff81bb4b40 t i915_gem_object_lock +ffffffff81bb4d50 T i915_gem_madvise_ioctl +ffffffff81bb5150 T i915_gem_drain_freed_objects +ffffffff81bb51c0 T i915_gem_drain_workqueue +ffffffff81bb52a0 T i915_gem_init +ffffffff81bb5540 T i915_gem_driver_register +ffffffff81bb5550 T i915_gem_driver_unregister +ffffffff81bb5560 T i915_gem_driver_remove +ffffffff81bb55c0 T i915_gem_driver_release +ffffffff81bb56b0 T i915_gem_init_early +ffffffff81bb5730 T i915_gem_cleanup_early +ffffffff81bb57b0 T i915_gem_open +ffffffff81bb58c0 t i915_gem_gtt_prepare +ffffffff81bb6000 T i915_gem_evict_something +ffffffff81bb6440 t ungrab_vma +ffffffff81bb6570 t grab_vma +ffffffff81bb6690 T i915_gem_evict_for_node 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i915_oa_config_release +ffffffff81bc5060 T i915_perf_get_oa_config +ffffffff81bc50c0 T i915_perf_oa_timestamp_frequency +ffffffff81bc5170 T i915_oa_init_reg_state +ffffffff81bc5260 T i915_perf_open_ioctl +ffffffff81bc5a80 T i915_perf_register +ffffffff81bc5ab0 T i915_perf_unregister +ffffffff81bc5b20 T i915_perf_add_config_ioctl +ffffffff81bc5b70 T i915_perf_remove_config_ioctl +ffffffff81bc5be0 T i915_perf_init +ffffffff81bc62c0 t gen7_is_valid_b_counter_addr +ffffffff81bc6310 t hsw_is_valid_mux_addr +ffffffff81bc6390 t hsw_enable_metric_set +ffffffff81bc6450 t hsw_disable_metric_set +ffffffff81bc6520 t gen7_oa_enable +ffffffff81bc6690 t gen7_oa_disable +ffffffff81bc6750 t gen7_oa_read +ffffffff81bc6bb0 t gen7_oa_hw_tail_read +ffffffff81bc6c00 t gen8_oa_read +ffffffff81bc7230 t gen8_is_valid_mux_addr +ffffffff81bc72b0 t gen8_is_valid_flex_addr +ffffffff81bc7330 t chv_is_valid_mux_addr +ffffffff81bc73b0 t gen8_oa_enable +ffffffff81bc74f0 t gen8_oa_disable +ffffffff81bc75b0 t gen8_enable_metric_set +ffffffff81bc7670 t gen8_disable_metric_set +ffffffff81bc76d0 t gen8_oa_hw_tail_read +ffffffff81bc7720 t gen11_is_valid_mux_addr +ffffffff81bc77e0 t gen11_disable_metric_set +ffffffff81bc7840 t xehp_is_valid_b_counter_addr +ffffffff81bc7910 t gen12_is_valid_b_counter_addr +ffffffff81bc7960 t gen12_is_valid_mux_addr +ffffffff81bc79f0 t gen12_oa_enable +ffffffff81bc7b90 t gen12_oa_disable +ffffffff81bc7ce0 t gen12_enable_metric_set +ffffffff81bc7ed0 t gen12_disable_metric_set +ffffffff81bc8020 t gen12_oa_hw_tail_read +ffffffff81bc8080 T i915_perf_sysctl_register +ffffffff81bc80b0 T i915_perf_sysctl_unregister +ffffffff81bc80e0 T i915_perf_fini +ffffffff81bc8200 t destroy_config +ffffffff81bc8290 T i915_perf_ioctl_version +ffffffff81bc8390 t get_sseu_config +ffffffff81bc83e0 t emit_oa_config +ffffffff81bc8ab0 t i915_gem_object_lock +ffffffff81bc8cc0 t append_oa_status +ffffffff81bc8d40 t append_oa_sample +ffffffff81bc8ea0 t lrc_configure_all_contexts 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i915_teardown_sysfs +ffffffff81bd7000 T i915_ttm_buddy_man_init +ffffffff81bd7210 T i915_ttm_buddy_man_fini +ffffffff81bd7400 T i915_ttm_buddy_man_reserve +ffffffff81bd74d0 T i915_ttm_buddy_man_visible_size +ffffffff81bd7500 T i915_ttm_buddy_man_avail +ffffffff81bd7560 t i915_ttm_buddy_man_alloc +ffffffff81bd7880 t i915_ttm_buddy_man_free +ffffffff81bd78f0 t i915_ttm_buddy_man_intersects +ffffffff81bd79a0 t i915_ttm_buddy_man_compatible +ffffffff81bd7a50 t i915_ttm_buddy_man_debug +ffffffff81bd8000 T i915_user_extensions +ffffffff81bd9000 T __i915_printk +ffffffff81bd90e0 T add_taint_for_CI +ffffffff81bd9110 T cancel_timer +ffffffff81bd9160 T set_timer_ms +ffffffff81bd9210 T i915_vtd_active +ffffffff81bda000 T intel_vgpu_detect +ffffffff81bda030 T intel_vgpu_register +ffffffff81bda090 T intel_vgpu_active +ffffffff81bda0c0 T intel_vgpu_has_full_ppgtt +ffffffff81bda100 T intel_vgpu_has_hwsp_emulation +ffffffff81bda140 T intel_vgpu_has_huge_gtt +ffffffff81bda180 T intel_vgt_deballoon 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i915_vma_parked +ffffffff81bdd680 T i915_vma_revoke_mmap +ffffffff81bdd780 T _i915_vma_move_to_active +ffffffff81bdd9d0 T __i915_vma_evict +ffffffff81bddd50 T __i915_vma_unbind +ffffffff81bdddf0 T i915_vma_unbind +ffffffff81bddf40 T i915_vma_unbind_async +ffffffff81bde0b0 t __i915_vma_unbind_async +ffffffff81bde170 T i915_vma_unbind_unlocked +ffffffff81bde280 T i915_vma_make_unshrinkable +ffffffff81bde2c0 T i915_vma_make_shrinkable +ffffffff81bde2e0 T i915_vma_make_purgeable +ffffffff81bde300 T i915_vma_module_exit +ffffffff81bde320 T i915_vma_module_init +ffffffff81bde380 t __i915_vma_active +ffffffff81bde3d0 t __i915_vma_retire +ffffffff81bde420 t __vma_bind +ffffffff81bde4c0 t __vma_release +ffffffff81bde540 t intel_rotate_pages +ffffffff81bde8a0 t intel_remap_pages +ffffffff81bdecf0 t intel_partial_pages +ffffffff81bdf000 T i915_vma_resource_alloc +ffffffff81bdf050 T i915_vma_resource_free +ffffffff81bdf090 T i915_vma_resource_unhold +ffffffff81bdf0a0 t __i915_vma_resource_unhold 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icl_init_clock_gating +ffffffff81be0880 t cfl_init_clock_gating +ffffffff81be09a0 t gen9_init_clock_gating +ffffffff81be0ab0 t skl_init_clock_gating +ffffffff81be0bf0 t kbl_init_clock_gating +ffffffff81be0e00 t bxt_init_clock_gating +ffffffff81be0f60 t glk_init_clock_gating +ffffffff81be0fc0 t bdw_init_clock_gating +ffffffff81be13f0 t chv_init_clock_gating +ffffffff81be1580 t hsw_init_clock_gating +ffffffff81be1840 t ivb_init_clock_gating +ffffffff81be1a50 t g4x_disable_trickle_feed +ffffffff81be1ba0 t cpt_init_clock_gating +ffffffff81be1ee0 t vlv_init_clock_gating +ffffffff81be1ff0 t gen6_init_clock_gating +ffffffff81be21f0 t ilk_init_clock_gating +ffffffff81be23d0 t g4x_init_clock_gating +ffffffff81be2490 t i965gm_init_clock_gating +ffffffff81be2560 t i965g_init_clock_gating +ffffffff81be25e0 t gen3_init_clock_gating +ffffffff81be26e0 t i85x_init_clock_gating +ffffffff81be2780 t i830_init_clock_gating +ffffffff81be3000 T intel_platform_name +ffffffff81be3090 T intel_device_info_print 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intel_region_ttm_device_init +ffffffff81be7070 T intel_region_ttm_device_fini +ffffffff81be7090 T intel_region_to_ttm_type +ffffffff81be70d0 T intel_region_ttm_init +ffffffff81be7170 T intel_region_ttm_fini +ffffffff81be73d0 T intel_region_ttm_resource_to_rsgt +ffffffff81be7410 T intel_region_ttm_resource_free +ffffffff81be8000 T intel_runtime_pm_get_raw +ffffffff81be8090 T intel_runtime_pm_get +ffffffff81be8140 T intel_runtime_pm_get_if_in_use +ffffffff81be81f0 T intel_runtime_pm_get_if_active +ffffffff81be82a0 T intel_runtime_pm_get_noresume +ffffffff81be83d0 T intel_runtime_pm_put_raw +ffffffff81be8460 T intel_runtime_pm_put_unchecked +ffffffff81be8520 T intel_runtime_pm_enable +ffffffff81be8550 T intel_runtime_pm_disable +ffffffff81be8580 T intel_runtime_pm_driver_release +ffffffff81be8610 T intel_runtime_pm_init_early +ffffffff81be9000 T intel_sbi_read +ffffffff81be9050 t intel_sbi_rw +ffffffff81be9240 T intel_sbi_write +ffffffff81bea000 T intel_step_init +ffffffff81bea4d0 T intel_step_name +ffffffff81bea510 t pvc_step_lookup +ffffffff81beb000 T gen3_stolen_base +ffffffff81beb050 T gen11_stolen_base +ffffffff81beb0d0 T i830_stolen_size +ffffffff81beb150 T gen3_stolen_size +ffffffff81beb1c0 T gen6_stolen_size +ffffffff81beb210 T chv_stolen_size +ffffffff81beb280 T gen8_stolen_size +ffffffff81beb2e0 T gen9_stolen_size +ffffffff81beb360 T intel_init_stolen_res +ffffffff81bec000 T intel_uncore_mmio_debug_init_early +ffffffff81bec060 T intel_uncore_forcewake_domain_to_str +ffffffff81bec0d0 T intel_uncore_fw_release_timer +ffffffff81bec1f0 t fw_domains_put +ffffffff81bec280 T intel_uncore_suspend +ffffffff81bec2d0 t intel_uncore_forcewake_reset +ffffffff81bec5a0 T intel_uncore_resume_early +ffffffff81bec6d0 T intel_uncore_unclaimed_mmio +ffffffff81bec740 T intel_uncore_runtime_resume +ffffffff81bec770 T intel_uncore_forcewake_get +ffffffff81bec8e0 T intel_uncore_forcewake_user_get +ffffffff81beca00 T intel_uncore_forcewake_get__locked +ffffffff81becad0 T intel_uncore_forcewake_user_put +ffffffff81becc10 T intel_uncore_forcewake_put__locked +ffffffff81becd10 T intel_uncore_forcewake_put +ffffffff81bece30 T intel_uncore_forcewake_put_delayed +ffffffff81becf80 T intel_uncore_forcewake_flush +ffffffff81bed030 T assert_forcewakes_inactive +ffffffff81bed0a0 T assert_forcewakes_active +ffffffff81bed0d0 T intel_uncore_setup_mmio +ffffffff81bed100 t uncore_unmap_mmio +ffffffff81bed130 T intel_uncore_init_early +ffffffff81bed1a0 T intel_uncore_init_mmio +ffffffff81bee5e0 T intel_uncore_prune_engine_fw_domains +ffffffff81bee7c0 t fw_domain_fini +ffffffff81bee8c0 T intel_uncore_fini_mmio +ffffffff81beead0 T __intel_wait_for_register_fw +ffffffff81beed90 T __intel_wait_for_register +ffffffff81bef130 T intel_uncore_forcewake_for_reg +ffffffff81bef240 t check_for_unclaimed_mmio +ffffffff81bef3a0 T intel_uncore_arm_unclaimed_mmio_detection +ffffffff81bef4b0 t vgpu_write8 +ffffffff81bef4f0 t vgpu_write16 +ffffffff81bef530 t vgpu_write32 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i915_pxp_tee_component_unbind +ffffffff81bf7000 T intel_dram_detect +ffffffff81bf7430 t gen11_get_dram_info +ffffffff81bf7480 t bxt_get_dram_info +ffffffff81bf7790 t skl_get_dram_info +ffffffff81bf7970 T intel_dram_edram_detect +ffffffff81bf7a00 t icl_pcode_read_mem_global_info +ffffffff81bf7ae0 t skl_dram_get_channel_info +ffffffff81bf7cb0 t skl_dram_get_dimm_info +ffffffff81bf8000 T intel_gmch_bridge_setup +ffffffff81bf80d0 t intel_gmch_bridge_release +ffffffff81bf8100 T intel_gmch_bar_setup +ffffffff81bf82f0 T intel_gmch_bar_teardown +ffffffff81bf83e0 T intel_gmch_vga_set_state +ffffffff81bf9000 T intel_detect_pch +ffffffff81bf91b0 t intel_pch_match +ffffffff81bf9200 t intel_pch_type +ffffffff81bf99c0 t intel_virt_detect_pch +ffffffff81bfa000 T vlv_iosf_sb_get +ffffffff81bfa020 T vlv_iosf_sb_put +ffffffff81bfa040 T vlv_punit_read +ffffffff81bfa090 t vlv_sideband_rw +ffffffff81bfa240 T vlv_punit_write +ffffffff81bfa290 T vlv_bunit_read +ffffffff81bfa2e0 T vlv_bunit_write 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t atom_op_move +ffffffff81bfdc80 t atom_op_and +ffffffff81bfde60 t atom_op_or +ffffffff81bfe040 t atom_op_shift_left +ffffffff81bfe220 t atom_op_shift_right +ffffffff81bfe400 t atom_op_mul +ffffffff81bfe550 t atom_op_div +ffffffff81bfe6c0 t atom_op_add +ffffffff81bfe8a0 t atom_op_sub +ffffffff81bfea80 t atom_op_setport +ffffffff81bfec00 t atom_op_setregblock +ffffffff81bfecc0 t atom_op_setfbbase +ffffffff81bfed80 t atom_op_compare +ffffffff81bfef60 t atom_op_switch +ffffffff81bff190 t atom_op_jump +ffffffff81bff400 t atom_op_test +ffffffff81bff5c0 t atom_op_delay +ffffffff81bff6a0 t atom_op_calltable +ffffffff81bff7f0 t atom_op_repeat +ffffffff81bff820 t atom_op_clear +ffffffff81bff930 t atom_op_nop +ffffffff81bff960 t atom_op_eot +ffffffff81bff990 t atom_op_mask +ffffffff81bffc40 t atom_op_postcard +ffffffff81bffcf0 t atom_op_beep +ffffffff81bffd10 t atom_op_savereg +ffffffff81bffd40 t atom_op_restorereg +ffffffff81bffd70 t atom_op_setdatablock +ffffffff81bffeb0 t atom_op_xor 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atombios_dvo_setup +ffffffff81c09640 T atombios_digital_setup +ffffffff81c09900 T atombios_get_encoder_mode +ffffffff81c09b90 T atombios_dig_encoder_setup2 +ffffffff81c09fd0 T atombios_dig_encoder_setup +ffffffff81c09ff0 T atombios_dig_transmitter_setup2 +ffffffff81c0a9d0 T atombios_set_edp_panel_power +ffffffff81c0aae0 T radeon_atom_release_dig_encoder +ffffffff81c0ab20 T radeon_atom_pick_dig_encoder +ffffffff81c0ad40 T radeon_atom_encoder_init +ffffffff81c0ae10 t atombios_external_encoder_setup +ffffffff81c0b080 T radeon_atom_ext_encoder_setup_ddc +ffffffff81c0b0d0 T radeon_enc_destroy +ffffffff81c0b180 T radeon_add_atom_encoder +ffffffff81c0b590 t radeon_atombios_set_dig_info +ffffffff81c0b600 t radeon_atombios_set_dac_info +ffffffff81c0b670 t radeon_atom_backlight_update_status +ffffffff81c0b6d0 t radeon_atom_encoder_dpms +ffffffff81c0b970 t radeon_atom_mode_fixup +ffffffff81c0bab0 t radeon_atom_encoder_prepare +ffffffff81c0bf90 t radeon_atom_encoder_commit +ffffffff81c0bfc0 t radeon_atom_encoder_mode_set +ffffffff81c0c570 t radeon_atom_dig_detect +ffffffff81c0c680 t radeon_atom_encoder_disable +ffffffff81c0c910 t radeon_atom_encoder_dpms_avivo +ffffffff81c0cb40 t radeon_atom_encoder_dpms_dig +ffffffff81c0d080 t atombios_dac_setup +ffffffff81c0d160 t radeon_atom_dac_detect +ffffffff81c0d350 t radeon_atom_ext_dpms +ffffffff81c0d380 t radeon_atom_ext_prepare +ffffffff81c0d3b0 t radeon_atom_ext_commit +ffffffff81c0d3e0 t radeon_atom_ext_mode_set +ffffffff81c0d410 t radeon_atom_ext_disable +ffffffff81c0e000 T radeon_atom_hw_i2c_xfer +ffffffff81c0e140 t radeon_process_i2c_ch +ffffffff81c0e310 T radeon_atom_hw_i2c_func +ffffffff81c0f000 T btc_get_max_clock_from_voltage_dependency_table +ffffffff81c0f0d0 T btc_apply_voltage_dependency_rules +ffffffff81c0f140 T btc_skip_blacklist_clocks +ffffffff81c0f230 T btc_adjust_clock_combinations +ffffffff81c0f360 T btc_apply_voltage_delta_rules +ffffffff81c0f480 T btc_program_mgcg_hw_sequence +ffffffff81c0f580 T btc_dpm_enabled +ffffffff81c0f590 T btc_notify_uvd_to_smc +ffffffff81c0f600 T btc_reset_to_default +ffffffff81c0f650 T btc_read_arb_registers +ffffffff81c0f6e0 T btc_dpm_vblank_too_short +ffffffff81c0f750 T btc_dpm_pre_set_power_state +ffffffff81c10970 T btc_dpm_set_power_state +ffffffff81c10ca0 t btc_set_power_state_conditionally_enable_ulv +ffffffff81c10dd0 T btc_dpm_post_set_power_state +ffffffff81c10ef0 t btc_update_current_ps +ffffffff81c10ff0 T btc_dpm_enable +ffffffff81c11ed0 t btc_cg_clock_gating_enable +ffffffff81c12000 t btc_mg_clock_gating_enable +ffffffff81c12120 t btc_ls_clock_gating_enable +ffffffff81c12250 t btc_init_stutter_mode +ffffffff81c122d0 T btc_dpm_disable +ffffffff81c125b0 T btc_dpm_setup_asic +ffffffff81c12690 T btc_dpm_init +ffffffff81c12a80 T btc_dpm_fini +ffffffff81c12b30 T btc_dpm_debugfs_print_current_performance_level +ffffffff81c12b80 T btc_dpm_get_current_sclk +ffffffff81c12c00 T btc_dpm_get_current_mclk +ffffffff81c12c80 T btc_dpm_get_sclk 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ci_get_leakage_voltages +ffffffff81c1bc90 t ci_patch_dependency_tables_with_leakage +ffffffff81c1c300 t ci_set_private_data_variables_based_on_pptable +ffffffff81c1c410 T ci_dpm_debugfs_print_current_performance_level +ffffffff81c1c550 T ci_dpm_print_power_state +ffffffff81c1c610 T ci_dpm_get_current_sclk +ffffffff81c1c6e0 T ci_dpm_get_current_mclk +ffffffff81c1c7b0 T ci_dpm_get_sclk +ffffffff81c1c800 T ci_dpm_get_mclk +ffffffff81c1c850 t ci_set_valid_flag +ffffffff81c1c8f0 t ci_populate_all_graphic_levels +ffffffff81c1ce80 t ci_populate_all_memory_levels +ffffffff81c1d780 t ci_populate_smc_vce_level +ffffffff81c1d8a0 t ci_populate_smc_acp_level +ffffffff81c1d9a0 t ci_populate_smc_samu_level +ffffffff81c1daa0 t ci_do_program_memory_timing_parameters +ffffffff81c1dcc0 t ci_populate_smc_uvd_level +ffffffff81c1de10 t ci_populate_smc_initial_state +ffffffff81c1deb0 t ci_populate_bapm_parameters_in_dpm_table +ffffffff81c1e040 t ci_populate_smc_voltage_table +ffffffff81c1e160 t ci_min_max_v_gnbl_pm_lid_from_bapm_vddc +ffffffff81c1e3c0 t ci_enable_sclk_mclk_dpm +ffffffff81c1e730 t ci_thermal_enable_alert +ffffffff81c1e8e0 t ci_enable_vce_dpm +ffffffff81c1f000 T ci_copy_bytes_to_smc +ffffffff81c1f240 T ci_start_smc +ffffffff81c1f280 T ci_reset_smc +ffffffff81c1f2c0 T ci_program_jump_on_start +ffffffff81c1f2f0 T ci_stop_smc_clock +ffffffff81c1f330 T ci_start_smc_clock +ffffffff81c1f370 T ci_is_smc_running +ffffffff81c1f3e0 T ci_load_smc_ucode +ffffffff81c1f570 T ci_read_smc_sram_dword +ffffffff81c1f640 T ci_write_smc_sram_dword +ffffffff81c20000 T cik_get_allowed_info_register +ffffffff81c200a0 T cik_didt_rreg +ffffffff81c20140 T cik_didt_wreg +ffffffff81c201c0 T ci_get_temp +ffffffff81c20210 T kv_get_temp +ffffffff81c20260 T cik_pciep_rreg +ffffffff81c202e0 T cik_pciep_wreg +ffffffff81c20350 T cik_get_xclk +ffffffff81c203c0 T cik_mm_rdoorbell +ffffffff81c20420 T cik_mm_wdoorbell +ffffffff81c20470 T ci_mc_load_microcode +ffffffff81c207b0 T cik_ring_test +ffffffff81c20a50 T cik_fence_gfx_ring_emit +ffffffff81c20e40 T cik_fence_compute_ring_emit +ffffffff81c210c0 T cik_semaphore_ring_emit +ffffffff81c21280 T cik_copy_cpdma +ffffffff81c216d0 T cik_ring_ib_execute +ffffffff81c21c70 T cik_ib_test +ffffffff81c21f50 T cik_gfx_get_rptr +ffffffff81c21fb0 T cik_gfx_get_wptr +ffffffff81c21ff0 T cik_gfx_set_wptr +ffffffff81c22030 T cik_compute_get_rptr +ffffffff81c22110 T cik_compute_get_wptr +ffffffff81c221f0 T cik_compute_set_wptr +ffffffff81c22270 T cik_gpu_check_soft_reset +ffffffff81c223e0 T cik_asic_reset +ffffffff81c227f0 t cik_gpu_pci_config_reset +ffffffff81c23000 T cik_gfx_is_lockup +ffffffff81c23070 T cik_pcie_gart_tlb_flush +ffffffff81c230c0 T cik_ib_parse +ffffffff81c230f0 T cik_vm_init +ffffffff81c23150 T cik_vm_fini +ffffffff81c23180 T cik_vm_flush +ffffffff81c23df0 T cik_enter_rlc_safe_mode +ffffffff81c23ee0 T cik_exit_rlc_safe_mode +ffffffff81c23f20 T cik_update_cg +ffffffff81c24420 t cik_enable_mgcg +ffffffff81c24940 t cik_enable_cgcg +ffffffff81c24cb0 T cik_init_cp_pg_table +ffffffff81c24f20 T cik_get_csb_size +ffffffff81c24fb0 T cik_get_csb_buffer +ffffffff81c25140 T cik_irq_set +ffffffff81c25ec0 t cik_disable_interrupt_state +ffffffff81c26380 T cik_irq_process +ffffffff81c27b50 t cik_irq_ack +ffffffff81c284d0 T cik_resume +ffffffff81c28560 t cik_init_golden_registers +ffffffff81c28720 t cik_startup +ffffffff81c2b4f0 T cik_suspend +ffffffff81c2b8e0 T cik_init +ffffffff81c2be00 t cik_init_microcode +ffffffff81c2cb50 t cik_uvd_init +ffffffff81c2cc00 t cik_vce_init +ffffffff81c2ccd0 t cik_cp_fini +ffffffff81c2cd50 t cik_irq_fini +ffffffff81c2ce60 t cik_mec_fini +ffffffff81c2cf10 t cik_pcie_gart_fini +ffffffff81c2d010 T cik_fini +ffffffff81c2d330 T dce8_program_fmt +ffffffff81c2d460 T dce8_bandwidth_update +ffffffff81c2e070 T cik_get_gpu_clock_counter +ffffffff81c2e130 T cik_set_uvd_clocks +ffffffff81c2e1b0 t cik_set_uvd_clock +ffffffff81c2e320 T cik_set_vce_clocks +ffffffff81c2e560 t cik_wait_for_rlc_serdes +ffffffff81c2e720 t cik_mec_init +ffffffff81c2e900 t cik_uvd_start +ffffffff81c2e9e0 t cik_vce_start +ffffffff81c2eaf0 t cik_irq_init +ffffffff81c2f670 t cik_cp_resume +ffffffff81c30e10 t cik_uvd_resume +ffffffff81c30ee0 t cik_vce_resume +ffffffff81c30fd0 t pcie_capability_set_word +ffffffff81c310e0 t pcie_capability_read_word +ffffffff81c31180 t pcie_capability_clear_and_set_word +ffffffff81c312a0 t pcie_capability_write_word +ffffffff81c31360 t cik_get_cu_active_bitmap +ffffffff81c314e0 t radeon_bo_reserve +ffffffff81c31650 t radeon_bo_unreserve +ffffffff81c31730 t cik_update_gfx_pg +ffffffff81c318d0 t cik_compute_stop +ffffffff81c31a40 t cik_cp_compute_fini +ffffffff81c31be0 t request_firmware +ffffffff81c31c70 t release_firmware +ffffffff81c31cb0 t dce8_latency_watermark +ffffffff81c32000 T cik_sdma_get_rptr +ffffffff81c32070 T cik_sdma_get_wptr +ffffffff81c320c0 T cik_sdma_set_wptr +ffffffff81c32110 T cik_sdma_ring_ib_execute +ffffffff81c32510 T cik_sdma_fence_ring_emit +ffffffff81c326e0 t cik_sdma_hdp_flush_ring_emit +ffffffff81c32910 T cik_sdma_semaphore_ring_emit +ffffffff81c32a30 T cik_sdma_enable +ffffffff81c32c10 T cik_sdma_resume +ffffffff81c330f0 T cik_sdma_fini +ffffffff81c33130 T cik_copy_dma +ffffffff81c33530 T cik_sdma_ring_test +ffffffff81c337e0 T cik_sdma_ib_test +ffffffff81c33a40 T cik_sdma_is_lockup +ffffffff81c33ac0 T cik_sdma_vm_copy_pages +ffffffff81c33bd0 T cik_sdma_vm_write_pages +ffffffff81c33d40 T cik_sdma_vm_set_pages +ffffffff81c33ec0 T cik_sdma_vm_pad_ib +ffffffff81c33f10 T cik_dma_vm_flush +ffffffff81c35000 T cypress_enable_spread_spectrum +ffffffff81c35140 T cypress_start_dpm +ffffffff81c35190 T cypress_enable_sclk_control +ffffffff81c351f0 T cypress_enable_mclk_control +ffffffff81c35250 T cypress_notify_smc_display_change +ffffffff81c352a0 T cypress_program_response_times +ffffffff81c35360 T cypress_advertise_gen2_capability +ffffffff81c35430 T cypress_notify_link_speed_change_after_state_change +ffffffff81c354f0 T cypress_notify_link_speed_change_before_state_change +ffffffff81c355b0 T cypress_get_strobe_mode_settings +ffffffff81c356b0 T cypress_get_mclk_frequency_ratio +ffffffff81c35760 T cypress_map_clkf_to_ibias +ffffffff81c35820 T cypress_convert_power_level_to_smc +ffffffff81c35bf0 t cypress_populate_mclk_value +ffffffff81c36000 T cypress_upload_sw_state +ffffffff81c36180 T cypress_upload_mc_reg_table +ffffffff81c36240 t cypress_convert_mc_reg_table_to_smc +ffffffff81c364d0 T cypress_calculate_burst_time +ffffffff81c36560 T cypress_program_memory_timing_parameters +ffffffff81c36700 T cypress_populate_smc_initial_state +ffffffff81c36ab0 T cypress_populate_smc_acpi_state +ffffffff81c36e30 T cypress_construct_voltage_tables +ffffffff81c36fc0 T cypress_populate_smc_voltage_tables +ffffffff81c370f0 T cypress_get_mvdd_configuration +ffffffff81c371c0 T cypress_populate_mc_reg_table +ffffffff81c37410 T cypress_get_table_locations +ffffffff81c374f0 T cypress_enable_display_gap +ffffffff81c37550 T cypress_dpm_setup_asic +ffffffff81c37640 T cypress_dpm_enable +ffffffff81c38110 t cypress_force_mc_use_s1 +ffffffff81c38390 t cypress_gfx_clock_gating_enable +ffffffff81c386a0 t cypress_mg_clock_gating_enable +ffffffff81c38920 T cypress_dpm_disable +ffffffff81c38b50 T cypress_dpm_set_power_state +ffffffff81c38d90 T cypress_dpm_display_configuration_changed +ffffffff81c38e70 T cypress_dpm_init +ffffffff81c390e0 T cypress_dpm_fini +ffffffff81c39170 T cypress_dpm_vblank_too_short +ffffffff81c391e0 t cypress_wait_for_mc_sequencer +ffffffff81c3a000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81c3a070 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81c3a0e0 T dce3_2_afmt_write_sad_regs +ffffffff81c3a1e0 T dce3_2_audio_set_dto +ffffffff81c3a320 T dce3_2_hdmi_update_acr +ffffffff81c3a680 T dce3_2_set_audio_packet +ffffffff81c3a810 T dce3_2_set_mute +ffffffff81c3b000 T dce6_endpoint_rreg +ffffffff81c3b0e0 T dce6_endpoint_wreg +ffffffff81c3b1d0 T dce6_audio_get_pin +ffffffff81c3b360 T dce6_afmt_select_pin +ffffffff81c3b3f0 T dce6_afmt_write_latency_fields +ffffffff81c3b4b0 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81c3b580 T dce6_afmt_dp_write_speaker_allocation +ffffffff81c3b650 T dce6_afmt_write_sad_regs +ffffffff81c3b790 T dce6_audio_enable +ffffffff81c3b7e0 T dce6_hdmi_audio_set_dto +ffffffff81c3b850 T dce6_dp_audio_set_dto +ffffffff81c3c000 T eg_cg_rreg +ffffffff81c3c080 T eg_cg_wreg +ffffffff81c3c0f0 T eg_pif_phy0_rreg +ffffffff81c3c170 T eg_pif_phy0_wreg +ffffffff81c3c1d0 T eg_pif_phy1_rreg +ffffffff81c3c250 T eg_pif_phy1_wreg +ffffffff81c3c2b0 T evergreen_get_allowed_info_register +ffffffff81c3c340 T evergreen_tiling_fields +ffffffff81c3c3e0 T sumo_set_uvd_clocks +ffffffff81c3c4c0 t sumo_set_uvd_clock +ffffffff81c3c6b0 T evergreen_set_uvd_clocks +ffffffff81c3cc30 T evergreen_fix_pci_max_read_req_size +ffffffff81c3cdf0 T dce4_program_fmt +ffffffff81c3cf10 T dce4_wait_for_vblank +ffffffff81c3d190 T evergreen_page_flip +ffffffff81c3d320 T evergreen_page_flip_pending +ffffffff81c3d390 T evergreen_get_temp +ffffffff81c3d460 T sumo_get_temp +ffffffff81c3d4b0 T sumo_pm_init_profile +ffffffff81c3d5f0 T btc_pm_init_profile +ffffffff81c3d700 T evergreen_pm_misc +ffffffff81c3d8a0 T evergreen_pm_prepare +ffffffff81c3d9a0 T evergreen_pm_finish +ffffffff81c3daa0 T evergreen_hpd_sense +ffffffff81c3db10 T evergreen_hpd_set_polarity +ffffffff81c3dc50 T evergreen_hpd_init +ffffffff81c3dd20 T evergreen_hpd_fini +ffffffff81c3ddc0 T evergreen_get_number_of_dram_channels +ffffffff81c3de10 T evergreen_bandwidth_update +ffffffff81c3dfd0 t evergreen_line_buffer_adjust +ffffffff81c3e1c0 t evergreen_program_watermarks +ffffffff81c3ec20 T evergreen_mc_wait_for_idle +ffffffff81c3ecc0 T evergreen_pcie_gart_tlb_flush +ffffffff81c3ed90 T evergreen_mc_stop +ffffffff81c3f890 T evergreen_mc_resume +ffffffff81c3ffa0 T evergreen_mc_program +ffffffff81c403a0 T evergreen_ring_ib_execute +ffffffff81c40830 T evergreen_mc_init +ffffffff81c40970 T evergreen_print_gpu_status_regs +ffffffff81c409a0 T evergreen_is_display_hung +ffffffff81c40ba0 T evergreen_gpu_check_soft_reset +ffffffff81c40d00 T evergreen_gpu_pci_config_reset +ffffffff81c40e80 T evergreen_asic_reset +ffffffff81c411a0 T evergreen_gfx_is_lockup +ffffffff81c41210 T sumo_rlc_fini +ffffffff81c413c0 t radeon_bo_reserve +ffffffff81c41530 t radeon_bo_unreserve +ffffffff81c41610 T sumo_rlc_init +ffffffff81c41de0 T evergreen_rlc_resume +ffffffff81c42150 T evergreen_get_vblank_counter +ffffffff81c421c0 T evergreen_disable_interrupt_state +ffffffff81c42490 T evergreen_irq_set +ffffffff81c42a50 T evergreen_irq_suspend +ffffffff81c42aa0 T evergreen_irq_process +ffffffff81c435f0 t evergreen_irq_ack +ffffffff81c43cb0 T evergreen_resume +ffffffff81c43d90 t evergreen_init_golden_registers +ffffffff81c43fa0 t evergreen_startup +ffffffff81c45830 T evergreen_suspend +ffffffff81c459d0 T evergreen_init +ffffffff81c45dd0 t evergreen_pcie_gart_fini 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dce4_audio_enable +ffffffff81c51080 T evergreen_hdmi_update_acr +ffffffff81c512a0 T dce4_afmt_write_latency_fields +ffffffff81c51310 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c51380 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c513f0 T evergreen_hdmi_write_sad_regs +ffffffff81c514f0 T evergreen_set_avi_packet +ffffffff81c51690 T dce4_hdmi_audio_set_dto +ffffffff81c51770 T dce4_dp_audio_set_dto +ffffffff81c51860 T dce4_set_vbi_packet +ffffffff81c518d0 T dce4_hdmi_set_color_depth +ffffffff81c51a20 T dce4_set_audio_packet +ffffffff81c51c30 T dce4_set_mute +ffffffff81c51d40 T evergreen_hdmi_enable +ffffffff81c52070 T evergreen_dp_enable +ffffffff81c53000 T kv_dpm_enable_bapm +ffffffff81c53070 T kv_dpm_enable +ffffffff81c53f70 t kv_populate_vce_table +ffffffff81c541f0 t kv_populate_samu_table +ffffffff81c54450 t kv_populate_acp_table +ffffffff81c545e0 t kv_start_am +ffffffff81c54620 t kv_enable_auto_thermal_throttling +ffffffff81c54660 t kv_enable_dpm_voltage_scaling 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cayman_gpu_check_soft_reset +ffffffff81c5a540 T cayman_asic_reset +ffffffff81c5a840 T cayman_gfx_is_lockup +ffffffff81c5a8b0 T cayman_resume +ffffffff81c5a940 t ni_init_golden_registers +ffffffff81c5aa20 t cayman_startup +ffffffff81c5be60 T cayman_suspend +ffffffff81c5c050 T cayman_init +ffffffff81c5c3c0 t cayman_uvd_init +ffffffff81c5c470 t cayman_vce_init +ffffffff81c5c540 t cayman_cp_fini +ffffffff81c5c5c0 t cayman_pcie_gart_fini +ffffffff81c5c700 T cayman_fini +ffffffff81c5c980 T cayman_vm_init +ffffffff81c5c9e0 T cayman_vm_fini +ffffffff81c5ca10 T cayman_vm_decode_fault +ffffffff81c5caa0 T cayman_vm_flush +ffffffff81c5cf00 T tn_set_vce_clocks +ffffffff81c5d160 t cayman_uvd_start +ffffffff81c5d210 t cayman_vce_start +ffffffff81c5d320 t cayman_cp_load_microcode +ffffffff81c5d4b0 t cayman_cp_resume +ffffffff81c5e370 t cayman_uvd_resume +ffffffff81c5e440 t cayman_vce_resume +ffffffff81c5f000 T cayman_dma_get_rptr +ffffffff81c5f070 T cayman_dma_get_wptr +ffffffff81c5f0c0 T cayman_dma_set_wptr +ffffffff81c5f110 T cayman_dma_ring_ib_execute +ffffffff81c5f4a0 T cayman_dma_stop +ffffffff81c5f550 T cayman_dma_resume +ffffffff81c5f7b0 T cayman_dma_fini +ffffffff81c5f870 T cayman_dma_is_lockup +ffffffff81c5f8f0 T cayman_dma_vm_copy_pages +ffffffff81c5f9f0 T cayman_dma_vm_write_pages +ffffffff81c5fb50 T cayman_dma_vm_set_pages +ffffffff81c5fcc0 T cayman_dma_vm_pad_ib +ffffffff81c5fd10 T cayman_dma_vm_flush +ffffffff81c61000 T ni_get_pi +ffffffff81c61030 T ni_get_ps +ffffffff81c61060 T ni_dpm_vblank_too_short +ffffffff81c610d0 T ni_dpm_force_performance_level +ffffffff81c61220 T ni_copy_and_switch_arb_sets +ffffffff81c614f0 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c61570 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c615f0 T ni_dpm_setup_asic +ffffffff81c61800 T ni_update_current_ps +ffffffff81c618c0 T ni_update_requested_ps +ffffffff81c61980 T ni_dpm_enable +ffffffff81c627e0 t ni_init_smc_table +ffffffff81c63190 t ni_init_smc_spll_table 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ni_dpm_get_mclk +ffffffff81c67c00 t ni_do_program_memory_timing_parameters +ffffffff81c67d40 t ni_calculate_sclk_params +ffffffff81c67f70 t ni_calculate_power_boost_limit +ffffffff81c68130 t ni_populate_mclk_value +ffffffff81c69000 T r100_wait_for_vblank +ffffffff81c69190 T r100_page_flip +ffffffff81c69450 T r100_page_flip_pending +ffffffff81c69500 T r100_pm_get_dynpm_state +ffffffff81c69720 T r100_pm_init_profile +ffffffff81c69800 T r100_pm_misc +ffffffff81c69c40 T r100_pm_prepare +ffffffff81c69cf0 T r100_pm_finish +ffffffff81c69da0 T r100_gui_idle +ffffffff81c69de0 T r100_hpd_sense +ffffffff81c69e40 T r100_hpd_set_polarity +ffffffff81c69f00 T r100_hpd_init +ffffffff81c69fa0 T r100_hpd_fini +ffffffff81c6a010 T r100_pci_gart_tlb_flush +ffffffff81c6a040 T r100_pci_gart_init +ffffffff81c6a110 T r100_pci_gart_get_page_entry +ffffffff81c6a140 T r100_pci_gart_set_page +ffffffff81c6a180 T r100_pci_gart_enable +ffffffff81c6a270 T r100_pci_gart_disable +ffffffff81c6a2f0 T r100_pci_gart_fini +ffffffff81c6a370 T r100_irq_set +ffffffff81c6a450 T r100_irq_disable +ffffffff81c6a4c0 T r100_irq_process +ffffffff81c6a7c0 T r100_get_vblank_counter +ffffffff81c6a810 T r100_fence_ring_emit +ffffffff81c6ac70 T r100_semaphore_ring_emit +ffffffff81c6aca0 T r100_copy_blit +ffffffff81c6b330 T r100_ring_start +ffffffff81c6b420 T r100_gfx_get_rptr +ffffffff81c6b480 T r100_gfx_get_wptr +ffffffff81c6b4c0 T r100_gfx_set_wptr +ffffffff81c6b500 T r100_cp_init +ffffffff81c6ba30 T r100_debugfs_cp_init +ffffffff81c6ba60 T r100_cp_fini +ffffffff81c6bb00 T r100_cp_disable +ffffffff81c6bc40 T r100_gui_wait_for_idle +ffffffff81c6bd30 T r100_reloc_pitch_offset +ffffffff81c6be70 T r100_packet3_load_vbpntr +ffffffff81c6c110 T r100_cs_parse_packet0 +ffffffff81c6c220 T r100_cs_packet_parse_vline +ffffffff81c6c430 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c6c4b0 T r100_cs_parse +ffffffff81c6d6a0 T r100_cs_track_clear +ffffffff81c6da30 T r100_cs_track_check +ffffffff81c6e240 T r100_mc_wait_for_idle +ffffffff81c6e2e0 T r100_gpu_is_lockup +ffffffff81c6e340 T r100_enable_bm +ffffffff81c6e390 T r100_bm_disable +ffffffff81c6e440 T r100_asic_reset +ffffffff81c6e770 T r100_mc_stop +ffffffff81c6e930 T r100_mc_resume +ffffffff81c6e9f0 T r100_set_common_regs +ffffffff81c6eb90 T r100_vram_init_sizes +ffffffff81c6ed80 T r100_vga_set_state +ffffffff81c6ede0 T r100_pll_errata_after_index +ffffffff81c6ee20 T r100_pll_rreg +ffffffff81c6ef50 T r100_pll_wreg +ffffffff81c6f060 T r100_debugfs_rbbm_init +ffffffff81c6f090 T r100_debugfs_mc_info_init +ffffffff81c6f0c0 T r100_set_surface_reg +ffffffff81c6f2d0 T r100_clear_surface_reg +ffffffff81c6f380 T r100_bandwidth_update +ffffffff81c6fdd0 T r100_ring_test +ffffffff81c70080 T r100_ring_ib_execute +ffffffff81c702e0 T r100_ib_test +ffffffff81c70620 T r100_vga_render_disable +ffffffff81c70680 T r100_resume +ffffffff81c70870 t r100_startup +ffffffff81c70db0 T r100_suspend +ffffffff81c70e90 T r100_fini +ffffffff81c70fa0 T r100_restore_sanity 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+ffffffff81c758f0 T r300_asic_reset +ffffffff81c75b10 T r300_mc_init +ffffffff81c75bc0 T rv370_set_pcie_lanes +ffffffff81c75d80 T rv370_get_pcie_lanes +ffffffff81c75e30 T r300_cs_parse +ffffffff81c761a0 t r300_packet0_check +ffffffff81c77060 T r300_set_reg_safe +ffffffff81c770a0 T r300_mc_program +ffffffff81c77230 T r300_clock_startup +ffffffff81c772c0 T r300_resume +ffffffff81c77490 t r300_startup +ffffffff81c777f0 T r300_suspend +ffffffff81c77870 T r300_fini +ffffffff81c77950 T r300_init +ffffffff81c78000 T r420_pm_init_profile +ffffffff81c780f0 T r420_pipes_init +ffffffff81c782d0 T r420_mc_rreg +ffffffff81c78350 T r420_mc_wreg +ffffffff81c783c0 T r420_resume +ffffffff81c78590 t r420_startup +ffffffff81c78790 T r420_suspend +ffffffff81c78930 T r420_fini +ffffffff81c78a10 T r420_init +ffffffff81c78c90 T r420_debugfs_pipes_info_init +ffffffff81c78cc0 t r420_cp_errata_init +ffffffff81c79000 T r520_mc_wait_for_idle +ffffffff81c790a0 T r520_resume +ffffffff81c79190 t r520_startup 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+ffffffff81c7bf80 t radeon_bo_unreserve +ffffffff81c7c060 T r600_vram_scratch_fini +ffffffff81c7c0e0 T r600_set_bios_scratch_engine_hung +ffffffff81c7c130 T r600_gpu_check_soft_reset +ffffffff81c7c4d0 T r600_asic_reset +ffffffff81c7c860 t r600_gpu_pci_config_reset +ffffffff81c7ca70 T r600_gfx_is_lockup +ffffffff81c7cae0 T r6xx_remap_render_backend +ffffffff81c7cca0 T r600_count_pipe_bits +ffffffff81c7cd10 T r600_pciep_rreg +ffffffff81c7cd90 T r600_pciep_wreg +ffffffff81c7ce00 T r600_cp_stop +ffffffff81c7ce80 T r600_init_microcode +ffffffff81c7d340 t request_firmware +ffffffff81c7d3d0 t release_firmware +ffffffff81c7d410 T r600_gfx_get_rptr +ffffffff81c7d470 T r600_gfx_get_wptr +ffffffff81c7d4b0 T r600_gfx_set_wptr +ffffffff81c7d4f0 T r600_cp_start +ffffffff81c7d860 T r600_cp_resume +ffffffff81c7dbc0 T r600_ring_init +ffffffff81c7dc60 T r600_cp_fini +ffffffff81c7dcf0 T r600_scratch_init +ffffffff81c7dd60 T r600_ring_test +ffffffff81c7e000 T r600_fence_ring_emit +ffffffff81c7e8a0 T r600_semaphore_ring_emit +ffffffff81c7ea80 T r600_copy_cpdma +ffffffff81c7f030 T r600_set_surface_reg +ffffffff81c7f060 T r600_clear_surface_reg +ffffffff81c7f090 T r600_vga_set_state +ffffffff81c7f0f0 T r600_resume +ffffffff81c7f180 t r600_startup +ffffffff81c80e60 T r600_suspend +ffffffff81c80fd0 T r600_irq_suspend +ffffffff81c81090 t r600_pcie_gart_disable +ffffffff81c81290 T r600_init +ffffffff81c819f0 T r600_ih_ring_init +ffffffff81c81a60 T r600_irq_fini +ffffffff81c81ba0 t r600_pcie_gart_fini +ffffffff81c81bd0 T r600_fini +ffffffff81c81d60 T r600_ring_ib_execute +ffffffff81c821f0 T r600_ib_test +ffffffff81c824a0 T r600_ih_ring_alloc +ffffffff81c825c0 T r600_ih_ring_fini +ffffffff81c82650 T r600_rlc_stop +ffffffff81c827e0 T r600_disable_interrupts +ffffffff81c82890 T r600_irq_init +ffffffff81c82cf0 t r600_disable_interrupt_state +ffffffff81c82ff0 T r600_irq_disable +ffffffff81c830b0 T r600_irq_set +ffffffff81c83830 t r600_irq_ack +ffffffff81c83d60 T r600_irq_process +ffffffff81c84960 T r600_mmio_hdp_flush +ffffffff81c849e0 T r600_set_pcie_lanes +ffffffff81c84b10 T r600_get_pcie_lanes +ffffffff81c84be0 T r600_get_gpu_clock_counter +ffffffff81c84c70 t r600_cp_load_microcode +ffffffff81c84f40 t r600_uvd_resume +ffffffff81c86000 T r600_fmt_is_valid_color +ffffffff81c86040 T r600_fmt_is_valid_texture +ffffffff81c86090 T r600_fmt_get_blocksize +ffffffff81c860d0 T r600_fmt_get_nblocksx +ffffffff81c86120 T r600_fmt_get_nblocksy +ffffffff81c86180 T r600_cs_common_vline_parse +ffffffff81c86440 T r600_mip_minify +ffffffff81c864a0 T r600_cs_parse +ffffffff81c88360 T r600_dma_cs_next_reloc +ffffffff81c883e0 T r600_dma_cs_parse +ffffffff81c88a80 t r600_cs_track_check +ffffffff81c89bc0 t r600_cs_check_reg +ffffffff81c8aae0 t r600_is_safe_reg +ffffffff81c8ab80 t r600_texture_size +ffffffff81c8b000 T r600_dma_get_rptr +ffffffff81c8b060 T r600_dma_get_wptr +ffffffff81c8b0a0 T r600_dma_set_wptr +ffffffff81c8b0e0 T r600_dma_stop +ffffffff81c8b170 T r600_dma_resume +ffffffff81c8b370 T r600_dma_fini +ffffffff81c8b3f0 T r600_dma_is_lockup +ffffffff81c8b460 T r600_dma_ring_test +ffffffff81c8b6d0 T r600_dma_fence_ring_emit +ffffffff81c8b8b0 T r600_dma_semaphore_ring_emit +ffffffff81c8b9d0 T r600_dma_ib_test +ffffffff81c8bbf0 T r600_dma_ring_ib_execute +ffffffff81c8bf40 T r600_copy_dma +ffffffff81c8d000 T r600_dpm_print_class_info +ffffffff81c8d2b0 T r600_dpm_print_cap_info +ffffffff81c8d340 T r600_dpm_print_ps_status +ffffffff81c8d3d0 T r600_dpm_get_vblank_time +ffffffff81c8d490 T r600_dpm_get_vrefresh +ffffffff81c8d520 T r600_calculate_u_and_p +ffffffff81c8d5a0 T r600_calculate_at +ffffffff81c8d650 T r600_gfx_clockgating_enable +ffffffff81c8d750 T r600_dynamicpm_enable +ffffffff81c8d7a0 T r600_enable_thermal_protection +ffffffff81c8d800 T r600_enable_acpi_pm +ffffffff81c8d850 T r600_enable_dynamic_pcie_gen2 +ffffffff81c8d8a0 T r600_dynamicpm_enabled +ffffffff81c8d8e0 T r600_enable_sclk_control +ffffffff81c8d940 T r600_enable_mclk_control +ffffffff81c8d9a0 T r600_enable_spll_bypass +ffffffff81c8d9f0 T r600_wait_for_spll_change +ffffffff81c8da70 T r600_set_bsp +ffffffff81c8dab0 T r600_set_at +ffffffff81c8db10 T r600_set_tc +ffffffff81c8db70 T r600_select_td +ffffffff81c8dc20 T r600_set_vrc +ffffffff81c8dc60 T r600_set_tpu +ffffffff81c8dcc0 T r600_set_tpc +ffffffff81c8dd20 T r600_set_sstu +ffffffff81c8dd80 T r600_set_sst +ffffffff81c8ddd0 T r600_set_git +ffffffff81c8de20 T r600_set_fctu +ffffffff81c8de80 T r600_set_fct +ffffffff81c8ded0 T r600_set_ctxcgtt3d_rphc +ffffffff81c8df30 T r600_set_ctxcgtt3d_rsdc +ffffffff81c8df90 T r600_set_vddc3d_oorsu +ffffffff81c8dff0 T r600_set_vddc3d_oorphc +ffffffff81c8e050 T r600_set_vddc3d_oorsdc +ffffffff81c8e0b0 T r600_set_mpll_lock_time +ffffffff81c8e100 T r600_set_mpll_reset_time +ffffffff81c8e150 T r600_engine_clock_entry_enable +ffffffff81c8e250 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c8e350 T r600_engine_clock_entry_enable_post_divider +ffffffff81c8e450 T r600_engine_clock_entry_set_post_divider +ffffffff81c8e510 T r600_engine_clock_entry_set_reference_divider +ffffffff81c8e5d0 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c8e690 T r600_engine_clock_entry_set_step_time +ffffffff81c8e750 T r600_vid_rt_set_ssu +ffffffff81c8e7b0 T r600_vid_rt_set_vru +ffffffff81c8e810 T r600_vid_rt_set_vrt +ffffffff81c8e870 T r600_voltage_control_enable_pins +ffffffff81c8e8c0 T r600_voltage_control_program_voltages +ffffffff81c8e950 T r600_voltage_control_deactivate_static_control +ffffffff81c8e9e0 T r600_power_level_enable +ffffffff81c8ea50 T r600_power_level_set_voltage_index +ffffffff81c8eac0 T r600_power_level_set_mem_clock_index +ffffffff81c8eb20 T r600_power_level_set_eng_clock_index +ffffffff81c8eb90 T r600_power_level_set_watermark_id +ffffffff81c8ec00 T r600_power_level_set_pcie_gen2 +ffffffff81c8ec60 T r600_power_level_get_current_index +ffffffff81c8eca0 T r600_power_level_get_target_index +ffffffff81c8ece0 T r600_power_level_set_enter_index +ffffffff81c8ed40 T r600_wait_for_power_level_unequal +ffffffff81c8ee30 T r600_wait_for_power_level +ffffffff81c8ef20 T r600_start_dpm +ffffffff81c8f200 T r600_stop_dpm +ffffffff81c8f250 T r600_dpm_pre_set_power_state +ffffffff81c8f280 T r600_dpm_post_set_power_state +ffffffff81c8f2b0 T r600_is_uvd_state +ffffffff81c8f2f0 T r600_is_internal_thermal_sensor +ffffffff81c8f330 T r600_dpm_late_enable +ffffffff81c8f440 T r600_get_platform_caps +ffffffff81c8f4e0 T r600_parse_extended_power_table +ffffffff81c902a0 T r600_free_extended_power_table +ffffffff81c903a0 T r600_get_pcie_gen_support +ffffffff81c903f0 T r600_get_pcie_lane_support +ffffffff81c90450 T r600_encode_pci_lane_width +ffffffff81c91000 T r600_audio_update_hdmi +ffffffff81c91170 t r600_audio_status +ffffffff81c91290 T r600_hdmi_buffer_status_changed +ffffffff81c91330 T r600_hdmi_update_audio_settings +ffffffff81c91700 T r600_audio_enable +ffffffff81c91780 T r600_audio_get_pin +ffffffff81c917b0 T r600_hdmi_update_acr +ffffffff81c91b50 T r600_set_avi_packet +ffffffff81c91d50 T r600_hdmi_audio_workaround +ffffffff81c91e20 T r600_hdmi_audio_set_dto +ffffffff81c91ee0 T r600_set_vbi_packet +ffffffff81c91fa0 T r600_set_audio_packet +ffffffff81c92270 T r600_set_mute +ffffffff81c92380 T r600_hdmi_enable +ffffffff81c93000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c93040 T radeon_acpi_pcie_notify_device_ready +ffffffff81c93160 T radeon_acpi_pcie_performance_request +ffffffff81c934f0 T radeon_acpi_init +ffffffff81c93c60 t radeon_acpi_event +ffffffff81c93f60 T radeon_acpi_fini +ffffffff81c94000 T radeon_agp_head_init +ffffffff81c94050 T radeon_agp_init +ffffffff81c940a0 T radeon_agp_resume +ffffffff81c94130 T radeon_agp_fini +ffffffff81c94180 T radeon_agp_suspend +ffffffff81c95000 T radeon_agp_disable +ffffffff81c95120 T radeon_asic_init +ffffffff81c958f0 t radeon_invalid_rreg +ffffffff81c95930 t radeon_invalid_wreg +ffffffff81c95970 t radeon_invalid_get_allowed_info_register +ffffffff81c96000 T radeon_atombios_i2c_init +ffffffff81c963a0 T radeon_atombios_lookup_gpio +ffffffff81c964a0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c96de0 t radeon_lookup_i2c_gpio +ffffffff81c970d0 t radeon_atom_apply_quirks +ffffffff81c974f0 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81c979f0 T radeon_atom_get_clock_info +ffffffff81c97dd0 T radeon_atombios_sideport_present +ffffffff81c97e80 T radeon_atombios_get_tmds_info +ffffffff81c97fc0 T radeon_atombios_get_ppll_ss_info +ffffffff81c980e0 T radeon_atombios_get_asic_ss_info +ffffffff81c983c0 t radeon_atombios_get_igp_ss_overrides +ffffffff81c984d0 T radeon_atombios_get_lvds_info +ffffffff81c98830 T radeon_atombios_get_primary_dac_info +ffffffff81c988f0 T radeon_atom_get_tv_timings +ffffffff81c98b30 T radeon_atombios_get_tv_info +ffffffff81c98bf0 T radeon_atombios_get_tv_dac_info +ffffffff81c98cf0 T radeon_atombios_get_default_voltages +ffffffff81c98db0 T radeon_atombios_get_power_modes +ffffffff81c99e20 T radeon_atom_get_clock_dividers +ffffffff81c9a110 T radeon_atom_get_memory_pll_dividers +ffffffff81c9a250 T radeon_atom_set_clock_gating +ffffffff81c9a2a0 T radeon_atom_get_engine_clock +ffffffff81c9a2f0 T radeon_atom_get_memory_clock +ffffffff81c9a340 T radeon_atom_set_engine_clock +ffffffff81c9a390 T radeon_atom_set_memory_clock +ffffffff81c9a3f0 T radeon_atom_set_engine_dram_timings +ffffffff81c9a460 T radeon_atom_update_memory_dll +ffffffff81c9a4b0 T radeon_atom_set_ac_timing +ffffffff81c9a500 T radeon_atom_set_voltage +ffffffff81c9a5d0 T radeon_atom_get_max_vddc +ffffffff81c9a6b0 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81c9a780 T radeon_atom_get_leakage_id_from_vbios +ffffffff81c9a840 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81c9aa60 T radeon_atom_get_voltage_evv +ffffffff81c9ab20 T radeon_atom_get_voltage_gpio_settings +ffffffff81c9ac20 T radeon_atom_is_voltage_gpio +ffffffff81c9adb0 T radeon_atom_get_svi2_info +ffffffff81c9aea0 T radeon_atom_get_max_voltage +ffffffff81c9b030 T radeon_atom_get_min_voltage +ffffffff81c9b170 T radeon_atom_get_voltage_step +ffffffff81c9b270 T radeon_atom_round_to_true_voltage +ffffffff81c9b3d0 T radeon_atom_get_voltage_table +ffffffff81c9b640 T radeon_atom_get_memory_info +ffffffff81c9b7f0 T radeon_atom_get_mclk_range_table +ffffffff81c9ba30 T radeon_atom_init_mc_reg_table +ffffffff81c9bca0 T radeon_atom_initialize_bios_scratch_regs +ffffffff81c9bd70 T radeon_save_bios_scratch_regs +ffffffff81c9be50 T radeon_restore_bios_scratch_regs +ffffffff81c9bf30 T radeon_atom_output_lock +ffffffff81c9bfc0 T radeon_atombios_connected_scratch_regs +ffffffff81c9c730 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81c9c880 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81c9cab0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81c9cc90 t radeon_atombios_add_pplib_thermal_controller +ffffffff81c9d090 t radeon_atombios_parse_pplib_clock_info +ffffffff81c9d440 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81c9e000 T radeon_audio_init +ffffffff81c9e1f0 t radeon_audio_enable +ffffffff81c9e350 T radeon_audio_endpoint_rreg +ffffffff81c9e390 T radeon_audio_endpoint_wreg +ffffffff81c9e3d0 T radeon_audio_get_pin +ffffffff81c9e420 T radeon_audio_detect +ffffffff81c9e580 T radeon_audio_fini +ffffffff81c9e610 T radeon_audio_mode_set +ffffffff81c9e660 T radeon_audio_dpms +ffffffff81c9e6b0 T radeon_audio_decode_dfs_div +ffffffff81c9e710 T radeon_audio_component_init +ffffffff81c9e780 T radeon_audio_component_fini +ffffffff81c9e7d0 t radeon_audio_hdmi_mode_set +ffffffff81c9eeb0 t radeon_audio_write_speaker_allocation +ffffffff81c9ef60 t radeon_audio_write_sad_regs +ffffffff81c9f030 t radeon_audio_set_avi_packet +ffffffff81c9f170 t radeon_audio_dp_mode_set +ffffffff81c9f2f0 t radeon_audio_rreg +ffffffff81c9f340 t radeon_audio_wreg +ffffffff81ca0000 T radeon_benchmark +ffffffff81ca0940 t radeon_benchmark_move +ffffffff81ca0c20 t radeon_bo_reserve +ffffffff81ca0d90 t radeon_bo_unreserve +ffffffff81ca0e70 t radeon_benchmark_do_move +ffffffff81ca1000 T radeon_get_bios +ffffffff81ca1fc0 t igp_read_bios_from_vram +ffffffff81ca20d0 t radeon_read_bios +ffffffff81ca3000 T radeon_legacy_get_engine_clock +ffffffff81ca30d0 T radeon_legacy_get_memory_clock +ffffffff81ca31a0 T radeon_get_clock_info +ffffffff81ca3730 T radeon_legacy_set_engine_clock +ffffffff81ca3a80 T radeon_legacy_set_clock_gating +ffffffff81ca5000 T radeon_combios_check_hardcoded_edid +ffffffff81ca5100 t combios_get_table_offset +ffffffff81ca5690 T radeon_bios_get_hardcoded_edid +ffffffff81ca5710 T radeon_combios_i2c_init +ffffffff81ca5db0 t combios_setup_i2c_bus +ffffffff81ca60a0 t radeon_combios_get_i2c_info_from_table +ffffffff81ca62f0 T radeon_combios_get_clock_info +ffffffff81ca64e0 T radeon_combios_sideport_present +ffffffff81ca6560 T radeon_combios_get_primary_dac_info +ffffffff81ca66b0 T radeon_combios_get_tv_info +ffffffff81ca67b0 T radeon_combios_get_tv_dac_info +ffffffff81ca6a40 T radeon_combios_get_lvds_info +ffffffff81ca70b0 T radeon_legacy_get_tmds_info_from_table +ffffffff81ca7180 T radeon_legacy_get_tmds_info_from_combios +ffffffff81ca7390 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81ca75c0 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81ca7900 T radeon_get_legacy_connector_info_from_table +ffffffff81ca9a70 T radeon_get_legacy_connector_info_from_bios +ffffffff81caa660 T radeon_combios_get_power_modes +ffffffff81caad30 T radeon_external_tmds_setup +ffffffff81caae00 T radeon_combios_external_tmds_setup +ffffffff81cab380 T radeon_combios_asic_init +ffffffff81cab8d0 t combios_parse_mmio_table +ffffffff81cabaf0 t combios_parse_pll_table +ffffffff81cabdc0 T radeon_combios_initialize_bios_scratch_regs +ffffffff81cabe50 T radeon_combios_output_lock +ffffffff81cabeb0 T radeon_combios_connected_scratch_regs +ffffffff81cac210 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81cac2f0 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81cad000 T radeon_connector_hotplug +ffffffff81cad100 T radeon_get_monitor_bpc +ffffffff81cad550 T radeon_connector_edid +ffffffff81cad600 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81cad680 T radeon_connector_is_dp12_capable +ffffffff81cad720 T radeon_add_atom_connector +ffffffff81cae5d0 T radeon_add_legacy_connector +ffffffff81caeac0 t radeon_dp_detect +ffffffff81caee60 t radeon_dvi_force +ffffffff81caeeb0 t radeon_connector_set_property +ffffffff81caf6f0 t radeon_connector_unregister +ffffffff81caf750 t radeon_connector_destroy +ffffffff81caf7c0 t radeon_best_single_encoder +ffffffff81caf830 t radeon_connector_get_edid +ffffffff81caf990 t radeon_dp_get_modes +ffffffff81cafc90 t radeon_dp_mode_valid +ffffffff81cafe60 t radeon_dvi_encoder +ffffffff81caff20 t radeon_fixup_lvds_native_mode +ffffffff81cb0060 t radeon_add_common_modes +ffffffff81cb0150 t radeon_fp_native_mode +ffffffff81cb0230 t radeon_lvds_set_property +ffffffff81cb0320 t radeon_vga_detect +ffffffff81cb05c0 t radeon_connector_analog_encoder_conflict_solve +ffffffff81cb07e0 t radeon_vga_get_modes +ffffffff81cb08c0 t radeon_vga_mode_valid +ffffffff81cb0920 t radeon_dvi_detect +ffffffff81cb0f80 t radeon_dvi_mode_valid +ffffffff81cb1100 t radeon_tv_detect +ffffffff81cb1340 t radeon_tv_get_modes +ffffffff81cb1420 t radeon_tv_mode_valid +ffffffff81cb1470 t radeon_lvds_detect +ffffffff81cb1610 t radeon_lvds_get_modes +ffffffff81cb1750 t radeon_lvds_mode_valid +ffffffff81cb2000 T radeon_cs_parser_init +ffffffff81cb2490 T radeon_cs_ioctl +ffffffff81cb2c70 t radeon_cs_parser_fini +ffffffff81cb2df0 t radeon_cs_ib_vm_chunk +ffffffff81cb3130 T radeon_cs_packet_parse +ffffffff81cb32e0 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81cb3340 T radeon_cs_dump_packet +ffffffff81cb33c0 T radeon_cs_packet_next_reloc +ffffffff81cb35a0 t cmp_size_smaller_first +ffffffff81cb4000 T radeon_crtc_cursor_move +ffffffff81cb4070 t radeon_lock_cursor +ffffffff81cb4230 t radeon_cursor_move_locked +ffffffff81cb4770 T radeon_crtc_cursor_set2 +ffffffff81cb4a00 t radeon_hide_cursor +ffffffff81cb4ac0 t radeon_bo_reserve +ffffffff81cb4c30 t radeon_bo_unreserve +ffffffff81cb4d10 t radeon_show_cursor +ffffffff81cb4f60 T radeon_cursor_reset +ffffffff81cb5000 T radeon_is_px +ffffffff81cb5040 T radeon_program_register_sequence +ffffffff81cb5170 T radeon_pci_config_reset +ffffffff81cb51a0 T radeon_surface_init +ffffffff81cb5360 T radeon_scratch_init +ffffffff81cb53e0 T radeon_scratch_get +ffffffff81cb5460 T radeon_scratch_free +ffffffff81cb54c0 T radeon_doorbell_get +ffffffff81cb5570 T radeon_doorbell_free +ffffffff81cb55c0 T radeon_wb_disable +ffffffff81cb55f0 T radeon_wb_fini +ffffffff81cb5690 t radeon_bo_reserve +ffffffff81cb5800 t radeon_bo_unreserve +ffffffff81cb58e0 T radeon_wb_init +ffffffff81cb5bc0 T radeon_vram_location +ffffffff81cb5ce0 T radeon_gtt_location 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+ffffffff81cb8fd0 T radeon_get_crtc_scanoutpos +ffffffff81cb95a0 T radeon_crtc_handle_flip +ffffffff81cb96d0 T radeon_compute_pll_avivo +ffffffff81cb9c30 T radeon_compute_pll_legacy +ffffffff81cba300 T radeon_framebuffer_init +ffffffff81cba380 T radeon_update_display_priority +ffffffff81cba3e0 T radeon_modeset_init +ffffffff81cbaec0 T radeon_modeset_fini +ffffffff81cbb010 T radeon_crtc_scaling_mode_fixup +ffffffff81cbb390 T radeon_get_crtc_scanout_position +ffffffff81cbb400 t radeon_user_framebuffer_create +ffffffff81cbb5a0 t radeon_crtc_gamma_set +ffffffff81cbb5e0 t radeon_crtc_destroy +ffffffff81cbb620 t radeon_crtc_set_config +ffffffff81cbb6f0 t radeon_crtc_page_flip_target +ffffffff81cbbb90 t radeon_flip_work_func +ffffffff81cbbdb0 t radeon_unpin_work_func +ffffffff81cbbe30 t radeon_bo_reserve +ffffffff81cbbfa0 t radeon_bo_unreserve +ffffffff81cbd000 T radeon_dp_aux_transfer_native +ffffffff81cbe000 T radeondrm_probe +ffffffff81cbe060 T radeondrm_attach_kms +ffffffff81cbe7a0 T radeondrm_detach_kms +ffffffff81cbe830 T radeondrm_activate_kms +ffffffff81cbe8f0 T radeondrm_wsioctl +ffffffff81cbe9b0 T radeondrm_wsmmap +ffffffff81cbe9e0 T radeondrm_alloc_screen +ffffffff81cbea10 T radeondrm_free_screen +ffffffff81cbea20 T radeondrm_show_screen +ffffffff81cbeb10 T radeondrm_enter_ddb +ffffffff81cbeb70 T radeondrm_doswitch +ffffffff81cbec10 T radeondrm_setpal +ffffffff81cbee30 T radeondrm_attachhook +ffffffff81cbf160 T radeondrm_forcedetach +ffffffff81cc0000 T radeon_setup_encoder_clones +ffffffff81cc00b0 T radeon_get_encoder_enum +ffffffff81cc0230 T radeon_link_encoder_connector +ffffffff81cc0380 T radeon_encoder_set_active_device +ffffffff81cc0440 T radeon_get_connector_for_encoder +ffffffff81cc04b0 T radeon_get_connector_for_encoder_init +ffffffff81cc0520 T radeon_get_external_encoder +ffffffff81cc05b0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81cc0650 T radeon_panel_mode_fixup +ffffffff81cc0820 T radeon_dig_monitor_is_duallink +ffffffff81cc0940 T radeon_encoder_is_digital +ffffffff81cc1000 T radeon_fbdev_setup +ffffffff81cc1150 T radeon_fbdev_set_suspend +ffffffff81cc11a0 T radeon_fbdev_robj_is_fb +ffffffff81cc1210 T radeondrm_burner +ffffffff81cc1290 T radeondrm_burner_cb +ffffffff81cc12c0 t radeon_fbdev_fb_helper_fb_probe +ffffffff81cc1800 t radeon_bo_reserve +ffffffff81cc1970 t radeon_bo_unreserve +ffffffff81cc1a50 t radeon_fbdev_client_unregister +ffffffff81cc1ab0 t radeon_fbdev_client_restore +ffffffff81cc1af0 t radeon_fbdev_client_hotplug +ffffffff81cc2000 T radeon_fence_emit +ffffffff81cc2120 T radeon_fence_process +ffffffff81cc21e0 t radeon_fence_activity +ffffffff81cc2450 T radeon_fence_signaled +ffffffff81cc24c0 t radeon_fence_seq_signaled +ffffffff81cc25b0 T radeon_fence_wait_timeout +ffffffff81cc26e0 t radeon_fence_wait_seq_timeout +ffffffff81cc2b50 T radeon_fence_wait +ffffffff81cc2c80 T radeon_fence_wait_any +ffffffff81cc2dc0 T radeon_fence_wait_next +ffffffff81cc2e80 T radeon_fence_wait_empty +ffffffff81cc2f90 T radeon_fence_ref +ffffffff81cc2fd0 T radeon_fence_unref +ffffffff81cc3010 T radeon_fence_count_emitted +ffffffff81cc3110 T radeon_fence_need_sync +ffffffff81cc3170 T radeon_fence_note_sync +ffffffff81cc3340 T radeon_fence_driver_start_ring +ffffffff81cc3520 T radeon_fence_driver_init +ffffffff81cc3660 T radeon_debugfs_fence_init +ffffffff81cc3690 T radeon_fence_driver_fini +ffffffff81cc38b0 T radeon_fence_driver_force_completion +ffffffff81cc39a0 t radeon_fence_get_driver_name +ffffffff81cc39d0 t radeon_fence_get_timeline_name +ffffffff81cc3a70 t radeon_fence_enable_signaling +ffffffff81cc3c80 t radeon_fence_is_signaled +ffffffff81cc3dc0 t radeon_fence_default_wait +ffffffff81cc3f20 t radeon_fence_any_seq_signaled +ffffffff81cc4060 t radeon_fence_check_lockup +ffffffff81cc42b0 t __delayed_work_tick +ffffffff81cc42d0 t radeon_fence_check_signaled +ffffffff81cc4370 t radeon_fence_wait_cb +ffffffff81cc5000 T radeon_gart_table_ram_alloc +ffffffff81cc50c0 T radeon_gart_table_ram_free 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radeon_gem_set_domain_ioctl +ffffffff81cc6990 T radeon_mode_dumb_mmap +ffffffff81cc6a40 T radeon_gem_mmap_ioctl +ffffffff81cc6b00 T radeon_gem_busy_ioctl +ffffffff81cc6bb0 T radeon_gem_wait_idle_ioctl +ffffffff81cc6cc0 T radeon_gem_set_tiling_ioctl +ffffffff81cc6d70 T radeon_gem_get_tiling_ioctl +ffffffff81cc6e40 t radeon_bo_reserve +ffffffff81cc7040 t radeon_bo_unreserve +ffffffff81cc7120 T radeon_gem_va_ioctl +ffffffff81cc73d0 t radeon_gem_va_update_vm +ffffffff81cc7520 T radeon_gem_op_ioctl +ffffffff81cc7620 T radeon_align_pitch +ffffffff81cc76b0 T radeon_mode_dumb_create +ffffffff81cc7800 T radeon_gem_debugfs_init +ffffffff81cc8000 T radeon_ddc_probe +ffffffff81cc80c0 T radeon_router_select_ddc_port +ffffffff81cc8320 T radeon_bb_set_bits +ffffffff81cc8490 T radeon_bb_set_dir +ffffffff81cc84c0 T radeon_bb_read_bits +ffffffff81cc85a0 T radeon_acquire_bus +ffffffff81cc89f0 T radeon_release_bus +ffffffff81cc8b60 T radeon_send_start +ffffffff81cc8b80 T radeon_send_stop +ffffffff81cc8ba0 T radeon_initiate_xfer +ffffffff81cc8bc0 T radeon_read_byte +ffffffff81cc8be0 T radeon_write_byte +ffffffff81cc8c00 T radeon_i2c_create +ffffffff81cc8e10 T radeon_i2c_destroy +ffffffff81cc8e90 T radeon_i2c_init +ffffffff81cc8ee0 T radeon_i2c_fini +ffffffff81cc8f90 T radeon_i2c_add +ffffffff81cc9140 T radeon_i2c_lookup +ffffffff81cc9310 T radeon_i2c_get_byte +ffffffff81cc93e0 T radeon_i2c_put_byte +ffffffff81cc9470 T radeon_router_select_cd_port +ffffffff81cc96d0 t radeon_hw_i2c_xfer +ffffffff81cca270 t radeon_hw_i2c_func +ffffffff81cca2a0 t r100_hw_i2c_xfer +ffffffff81cca960 t radeon_get_i2c_prescale +ffffffff81ccb000 T radeon_ib_get +ffffffff81ccb100 T radeon_ib_free +ffffffff81ccb140 T radeon_ib_schedule +ffffffff81ccb3d0 T radeon_ib_pool_init +ffffffff81ccb470 T radeon_ib_pool_fini +ffffffff81ccb4e0 T radeon_ib_ring_tests +ffffffff81ccc000 T radeon_driver_irq_handler_kms +ffffffff81ccc050 T radeon_msi_ok +ffffffff81ccc150 T radeon_irq_kms_init +ffffffff81ccc3e0 t radeon_hotplug_work_func +ffffffff81ccc490 t radeon_dp_work_func +ffffffff81ccc500 T radeon_irq_kms_fini +ffffffff81ccc6a0 T radeon_irq_kms_sw_irq_get +ffffffff81ccc740 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81ccc780 T radeon_irq_kms_sw_irq_put +ffffffff81ccc810 T radeon_irq_kms_pflip_irq_get +ffffffff81ccc8c0 T radeon_irq_kms_pflip_irq_put +ffffffff81ccc960 T radeon_irq_kms_enable_afmt +ffffffff81ccc9f0 T radeon_irq_kms_disable_afmt +ffffffff81ccca80 T radeon_irq_kms_enable_hpd +ffffffff81cccb70 T radeon_irq_kms_disable_hpd +ffffffff81cccc50 T radeon_irq_kms_set_irq_n_enabled +ffffffff81cccdc0 t __delayed_work_tick +ffffffff81ccd000 T radeon_info_ioctl +ffffffff81ccdaf0 t radeon_set_filp_rights +ffffffff81ccdb80 T radeon_driver_open_kms +ffffffff81ccdcb0 t radeon_bo_reserve +ffffffff81ccde20 T radeon_driver_postclose_kms +ffffffff81cce040 T radeon_get_vblank_counter_kms +ffffffff81cce1f0 T radeon_enable_vblank_kms +ffffffff81cce2a0 T radeon_disable_vblank_kms +ffffffff81ccf000 T radeon_crtc_set_base +ffffffff81ccf020 T radeon_crtc_do_set_base +ffffffff81ccf590 T radeon_crtc_set_base_atomic +ffffffff81ccf5b0 t radeon_bo_reserve +ffffffff81ccf720 t radeon_bo_unreserve +ffffffff81ccf800 T radeon_legacy_init_crtc +ffffffff81ccf850 t radeon_crtc_dpms +ffffffff81ccfa40 t radeon_crtc_prepare +ffffffff81ccfac0 t radeon_crtc_commit +ffffffff81ccfb30 t radeon_crtc_mode_fixup +ffffffff81ccfb50 t radeon_crtc_mode_set +ffffffff81cd0fc0 t radeon_crtc_disable +ffffffff81cd2000 T radeon_legacy_get_backlight_level +ffffffff81cd2050 T radeon_legacy_set_backlight_level +ffffffff81cd20a0 t radeon_legacy_lvds_update +ffffffff81cd23e0 T radeon_legacy_backlight_init +ffffffff81cd25b0 t radeon_legacy_backlight_get_brightness +ffffffff81cd2610 T radeon_add_legacy_encoder +ffffffff81cd2970 t radeon_legacy_backlight_update_status +ffffffff81cd2a10 t radeon_lvds_enc_destroy +ffffffff81cd2aa0 t radeon_legacy_lvds_dpms +ffffffff81cd2af0 t radeon_legacy_mode_fixup +ffffffff81cd2b60 t radeon_legacy_lvds_prepare +ffffffff81cd2bf0 t radeon_legacy_lvds_commit +ffffffff81cd2c70 t radeon_legacy_lvds_mode_set +ffffffff81cd2e80 t radeon_legacy_encoder_disable +ffffffff81cd2ed0 t radeon_legacy_tmds_int_dpms +ffffffff81cd2f90 t radeon_legacy_tmds_int_prepare +ffffffff81cd3060 t radeon_legacy_tmds_int_commit +ffffffff81cd3130 t radeon_legacy_tmds_int_mode_set +ffffffff81cd3390 t radeon_legacy_primary_dac_dpms +ffffffff81cd34d0 t radeon_legacy_primary_dac_prepare +ffffffff81cd3530 t radeon_legacy_primary_dac_commit +ffffffff81cd3580 t radeon_legacy_primary_dac_mode_set +ffffffff81cd3710 t radeon_legacy_primary_dac_detect +ffffffff81cd3900 t radeon_legacy_tv_dac_dpms +ffffffff81cd3b10 t radeon_legacy_tv_dac_prepare +ffffffff81cd3b70 t radeon_legacy_tv_dac_commit +ffffffff81cd3bc0 t radeon_legacy_tv_dac_mode_set +ffffffff81cd3f60 t radeon_legacy_tv_dac_detect +ffffffff81cd4b60 t radeon_ext_tmds_enc_destroy +ffffffff81cd4bb0 t radeon_legacy_tmds_ext_dpms +ffffffff81cd4c80 t radeon_legacy_tmds_ext_prepare +ffffffff81cd4d50 t radeon_legacy_tmds_ext_commit +ffffffff81cd4e20 t radeon_legacy_tmds_ext_mode_set +ffffffff81cd5000 T radeon_legacy_tv_mode_set +ffffffff81cd60f0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81cd6200 T radeon_legacy_tv_adjust_pll1 +ffffffff81cd6300 T radeon_legacy_tv_adjust_pll2 +ffffffff81cd7000 T radeon_ttm_bo_is_radeon_bo +ffffffff81cd7040 t radeon_ttm_bo_destroy +ffffffff81cd7170 T radeon_ttm_placement_from_domain +ffffffff81cd72d0 T radeon_bo_create +ffffffff81cd74a0 T radeon_bo_kmap +ffffffff81cd7590 T radeon_bo_check_tiling +ffffffff81cd7670 T radeon_bo_kunmap +ffffffff81cd7700 T radeon_bo_ref +ffffffff81cd7740 T radeon_bo_unref +ffffffff81cd7790 T radeon_bo_pin_restricted +ffffffff81cd7ab0 T radeon_bo_pin +ffffffff81cd7ad0 T radeon_bo_unpin +ffffffff81cd7b40 T radeon_bo_evict_vram +ffffffff81cd7ba0 T radeon_bo_force_delete +ffffffff81cd7d00 T radeon_bo_init +ffffffff81cd7de0 T radeon_bo_fini +ffffffff81cd7e20 T radeon_bo_list_validate +ffffffff81cd8130 T radeon_bo_get_surface_reg +ffffffff81cd83b0 T radeon_bo_set_tiling_flags +ffffffff81cd86b0 T radeon_bo_get_tiling_flags +ffffffff81cd8700 T radeon_bo_move_notify +ffffffff81cd87d0 T radeon_bo_fault_reserve_notify +ffffffff81cd8a60 t ttm_bo_move_to_lru_tail_unlocked +ffffffff81cd8aa0 T radeon_bo_fence +ffffffff81cd9000 T radeon_pm_get_type_index +ffffffff81cd9080 T radeon_pm_acpi_event_handler +ffffffff81cd9160 t radeon_pm_update_profile +ffffffff81cd9280 t radeon_pm_set_clocks +ffffffff81cd9c40 T radeon_dpm_enable_uvd +ffffffff81cd9d00 T radeon_pm_compute_clocks +ffffffff81cda710 T radeon_dpm_enable_vce +ffffffff81cda780 T radeon_pm_suspend +ffffffff81cda880 T radeon_pm_resume +ffffffff81cdab70 T radeon_pm_init +ffffffff81cdb280 T radeon_pm_late_init +ffffffff81cdb340 T radeon_pm_fini +ffffffff81cdb460 t radeon_dpm_thermal_work_handler +ffffffff81cdb540 t radeon_dynpm_idle_work_handler +ffffffff81cdb7c0 t __delayed_work_tick +ffffffff81cdc000 T radeon_gem_prime_get_sg_table +ffffffff81cdc030 T radeon_gem_prime_pin +ffffffff81cdc0c0 t radeon_bo_reserve +ffffffff81cdc230 t radeon_bo_unreserve +ffffffff81cdc310 T radeon_gem_prime_unpin +ffffffff81cdc390 T radeon_gem_prime_export +ffffffff81cdd000 T radeon_ring_supports_scratch_reg +ffffffff81cdd030 T radeon_ring_free_size +ffffffff81cdd0e0 T radeon_ring_lockup_update +ffffffff81cdd140 T radeon_ring_alloc +ffffffff81cdd2c0 T radeon_ring_lock +ffffffff81cdd340 T radeon_ring_commit +ffffffff81cdd440 T radeon_ring_unlock_commit +ffffffff81cdd470 T radeon_ring_undo +ffffffff81cdd4a0 T radeon_ring_unlock_undo +ffffffff81cdd4c0 T radeon_ring_test_lockup +ffffffff81cdd5e0 T radeon_ring_backup +ffffffff81cdd780 T radeon_ring_restore +ffffffff81cdd930 T radeon_ring_init +ffffffff81cddb20 t radeon_bo_reserve +ffffffff81cddc90 t radeon_bo_unreserve +ffffffff81cddd70 T radeon_ring_fini +ffffffff81cde000 T radeon_sa_bo_manager_init +ffffffff81cde0d0 T radeon_sa_bo_manager_fini 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radeon_vce_resume +ffffffff81ce8be0 T radeon_vce_note_usage +ffffffff81ce8d00 T radeon_vce_free_handles +ffffffff81ce8dc0 T radeon_vce_get_destroy_msg +ffffffff81ce8ff0 T radeon_vce_get_create_msg +ffffffff81ce9340 T radeon_vce_cs_reloc +ffffffff81ce9440 T radeon_vce_cs_parse +ffffffff81ce9bb0 T radeon_vce_semaphore_emit +ffffffff81ce9d70 T radeon_vce_ib_execute +ffffffff81ce9f00 T radeon_vce_fence_emit +ffffffff81cea130 T radeon_vce_ring_test +ffffffff81cea280 T radeon_vce_ib_test +ffffffff81cea3a0 t __delayed_work_tick +ffffffff81ceb000 T radeon_vm_manager_init +ffffffff81ceb060 T radeon_vm_manager_fini +ffffffff81ceb180 T radeon_vm_get_bos +ffffffff81ceb2d0 T radeon_vm_grab_id +ffffffff81ceb460 T radeon_vm_flush +ffffffff81ceb5f0 T radeon_vm_fence +ffffffff81ceb6a0 T radeon_vm_bo_find +ffffffff81ceb6f0 T radeon_vm_bo_add +ffffffff81ceb7e0 T radeon_vm_bo_set_addr +ffffffff81cebc30 t radeon_bo_unreserve +ffffffff81cebd10 t radeon_vm_clear_bo +ffffffff81cebf00 T radeon_vm_map_gart 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rv6xx_dpm_get_current_mclk +ffffffff81d01770 T rv6xx_dpm_fini +ffffffff81d01800 T rv6xx_dpm_get_sclk +ffffffff81d01840 T rv6xx_dpm_get_mclk +ffffffff81d01880 T rv6xx_dpm_force_performance_level +ffffffff81d01a10 t rv6xx_generate_steps +ffffffff81d01d10 t rv6xx_output_stepping +ffffffff81d01e20 t rv6xx_program_mclk_stepping_entry +ffffffff81d02090 t rv6xx_program_engine_spread_spectrum +ffffffff81d02380 t rv6xx_step_sw_voltage +ffffffff81d03000 T rv730_populate_sclk_value +ffffffff81d03230 T rv730_populate_mclk_value +ffffffff81d03470 T rv730_read_clock_registers +ffffffff81d03590 T rv730_populate_smc_acpi_state +ffffffff81d03740 T rv730_populate_smc_initial_state +ffffffff81d03900 T rv730_program_memory_timing_parameters +ffffffff81d03ae0 T rv730_start_dpm +ffffffff81d03b70 T rv730_stop_dpm +ffffffff81d03c30 T rv730_program_dcodt +ffffffff81d03d00 T rv730_get_odt_values +ffffffff81d04000 T rv740_get_decoded_reference_divider +ffffffff81d040a0 T rv740_get_dll_speed +ffffffff81d042b0 T rv740_populate_sclk_value +ffffffff81d044b0 T rv740_populate_mclk_value +ffffffff81d04860 T rv740_read_clock_registers +ffffffff81d04990 T rv740_populate_smc_acpi_state +ffffffff81d04bc0 T rv740_enable_mclk_spread_spectrum +ffffffff81d04c10 T rv740_get_mclk_frequency_ratio +ffffffff81d05000 T rv770_set_uvd_clocks +ffffffff81d05570 T rv770_get_xclk +ffffffff81d055d0 T rv770_page_flip +ffffffff81d058d0 T rv770_page_flip_pending +ffffffff81d05940 T rv770_get_temp +ffffffff81d059a0 T rv770_pm_misc +ffffffff81d05a80 T r700_cp_stop +ffffffff81d05b00 T r700_cp_fini +ffffffff81d05b90 T rv770_set_clk_bypass_mode +ffffffff81d05cb0 T r700_vram_gtt_location +ffffffff81d05e40 T rv770_resume +ffffffff81d05ed0 t rv770_init_golden_registers +ffffffff81d06060 t rv770_startup +ffffffff81d07c00 T rv770_suspend +ffffffff81d07e20 T rv770_init +ffffffff81d08210 t rv770_pcie_gart_fini +ffffffff81d08390 T rv770_fini +ffffffff81d08630 t rv770_uvd_start +ffffffff81d086e0 t rv770_cp_load_microcode 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rv770_program_engine_speed_parameters +ffffffff81d0aa10 T rv770_program_vc +ffffffff81d0aa60 T rv770_clear_vc +ffffffff81d0aaa0 T rv770_upload_firmware +ffffffff81d0aae0 T rv770_populate_initial_mvdd_value +ffffffff81d0ab30 T rv770_get_memory_module_index +ffffffff81d0ab70 T rv770_enable_voltage_control +ffffffff81d0abc0 T rv770_halt_smc +ffffffff81d0ac20 T rv770_resume_smc +ffffffff81d0ac70 T rv770_set_sw_state +ffffffff81d0acd0 T rv770_set_boot_state +ffffffff81d0ad20 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81d0ad90 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81d0ae00 T rv770_restrict_performance_levels_before_switch +ffffffff81d0ae60 T rv770_dpm_force_performance_level +ffffffff81d0af20 T r7xx_start_smc +ffffffff81d0af50 T r7xx_stop_smc +ffffffff81d0af80 T rv770_read_voltage_smio_registers +ffffffff81d0afc0 T rv770_reset_smio_status +ffffffff81d0b080 T rv770_get_memory_type +ffffffff81d0b0d0 T rv770_get_pcie_gen2_status +ffffffff81d0b140 T rv770_get_max_vddc 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rv770_copy_bytes_to_smc +ffffffff81d0f210 T rv770_start_smc +ffffffff81d0f260 T rv770_reset_smc +ffffffff81d0f2b0 T rv770_stop_smc_clock +ffffffff81d0f300 T rv770_start_smc_clock +ffffffff81d0f350 T rv770_is_smc_running +ffffffff81d0f390 T rv770_send_msg_to_smc +ffffffff81d0f470 T rv770_wait_for_smc_inactive +ffffffff81d0f510 T rv770_load_smc_ucode +ffffffff81d0f6a0 T rv770_read_smc_sram_dword +ffffffff81d0f760 T rv770_write_smc_sram_dword +ffffffff81d10000 T si_get_allowed_info_register +ffffffff81d10090 T si_get_xclk +ffffffff81d10100 T si_get_temp +ffffffff81d10150 T si_mc_load_microcode +ffffffff81d10410 T dce6_bandwidth_update +ffffffff81d105d0 t dce6_line_buffer_adjust +ffffffff81d10780 t dce6_program_watermarks +ffffffff81d11230 T si_fence_ring_emit +ffffffff81d11690 T si_ring_ib_execute +ffffffff81d11e00 T si_gpu_check_soft_reset +ffffffff81d11fa0 T si_asic_reset +ffffffff81d12320 t si_gpu_pci_config_reset +ffffffff81d12640 T si_gfx_is_lockup +ffffffff81d126b0 T si_vram_gtt_location +ffffffff81d12750 T si_pcie_gart_tlb_flush +ffffffff81d127a0 T si_ib_parse +ffffffff81d12e40 T si_vm_init +ffffffff81d12e80 T si_vm_fini +ffffffff81d12eb0 T si_vm_flush +ffffffff81d13550 T si_init_uvd_internal_cg +ffffffff81d135a0 T si_get_csb_size +ffffffff81d13630 T si_get_csb_buffer +ffffffff81d137b0 T si_rlc_reset +ffffffff81d13830 T si_irq_set +ffffffff81d13d20 t si_disable_interrupt_state +ffffffff81d13fa0 T si_irq_process +ffffffff81d152a0 t si_irq_ack +ffffffff81d15890 T si_resume +ffffffff81d15920 t si_init_golden_registers +ffffffff81d15ae0 t si_startup +ffffffff81d17f00 T si_suspend +ffffffff81d181f0 t si_fini_cg +ffffffff81d18290 T si_init +ffffffff81d195f0 t si_cp_fini +ffffffff81d196e0 t si_irq_fini +ffffffff81d197b0 t si_pcie_gart_fini +ffffffff81d198b0 T si_fini +ffffffff81d19ad0 T si_get_gpu_clock_counter +ffffffff81d19b90 T si_set_uvd_clocks +ffffffff81d1a0f0 T si_set_vce_clocks +ffffffff81d1a630 t si_vce_send_vcepll_ctlreq +ffffffff81d1a870 t dce6_latency_watermark +ffffffff81d1aab0 t si_rlc_stop +ffffffff81d1ac60 t si_vm_reg_valid +ffffffff81d1adc0 t si_vm_packet3_cp_dma_check +ffffffff81d1af30 t si_uvd_start +ffffffff81d1afe0 t si_vce_start +ffffffff81d1b0f0 t si_irq_init +ffffffff81d1bbd0 t si_cp_load_microcode +ffffffff81d1bfb0 t si_cp_resume +ffffffff81d1ce70 t si_uvd_resume +ffffffff81d1cf40 t si_vce_resume +ffffffff81d1d030 t pcie_capability_set_word +ffffffff81d1d140 t pcie_capability_read_word +ffffffff81d1d1e0 t pcie_capability_clear_and_set_word +ffffffff81d1d300 t pcie_capability_write_word +ffffffff81d1d3c0 t si_update_cg +ffffffff81d1d930 t si_enable_mgcg +ffffffff81d1dd50 t si_enable_cgcg +ffffffff81d1e0e0 t request_firmware +ffffffff81d1e170 t release_firmware +ffffffff81d1f000 T si_dma_is_lockup +ffffffff81d1f080 T si_dma_vm_copy_pages +ffffffff81d1f170 T si_dma_vm_write_pages +ffffffff81d1f2d0 T si_dma_vm_set_pages +ffffffff81d1f440 T si_dma_vm_flush +ffffffff81d1f8b0 T si_copy_dma +ffffffff81d20000 T si_dpm_force_performance_level +ffffffff81d20160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81d201c0 T si_get_mclk_frequency_ratio +ffffffff81d20240 T si_trim_voltage_table_to_fit_state_table +ffffffff81d20350 T si_dpm_setup_asic +ffffffff81d20520 T si_fan_ctrl_get_fan_speed_percent +ffffffff81d205b0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81d20670 T si_fan_ctrl_set_mode +ffffffff81d208c0 T si_fan_ctrl_get_mode +ffffffff81d20910 T si_dpm_enable +ffffffff81d21c90 t si_init_smc_table +ffffffff81d22ea0 t si_init_smc_spll_table +ffffffff81d23020 t si_init_arb_table_index +ffffffff81d230b0 t si_populate_mc_reg_table +ffffffff81d23500 t si_initialize_smc_cac_tables +ffffffff81d25150 t si_initialize_hardware_cac_manager +ffffffff81d25200 t si_initialize_smc_dte_tables +ffffffff81d25400 t si_populate_smc_tdp_limits +ffffffff81d25600 t si_populate_smc_tdp_limits_2 +ffffffff81d256d0 t si_program_response_times +ffffffff81d257f0 t si_program_ds_registers +ffffffff81d25880 t si_dpm_start_smc +ffffffff81d258b0 t si_enable_auto_throttle_source +ffffffff81d25a40 t si_thermal_start_thermal_controller +ffffffff81d25f00 T si_dpm_late_enable +ffffffff81d26050 T si_dpm_disable +ffffffff81d263d0 t si_enable_power_containment +ffffffff81d264a0 t si_enable_smc_cac +ffffffff81d26600 T si_dpm_pre_set_power_state +ffffffff81d27170 T si_dpm_set_power_state +ffffffff81d276d0 t si_halt_smc +ffffffff81d27730 t si_upload_sw_state +ffffffff81d28130 t si_upload_smc_data +ffffffff81d28270 t si_upload_ulv_state +ffffffff81d283b0 t si_upload_mc_reg_table +ffffffff81d28550 t si_set_pcie_lane_width_in_smc +ffffffff81d285f0 t si_resume_smc +ffffffff81d28650 t si_set_vce_clock +ffffffff81d286f0 t si_notify_link_speed_change_after_state_change +ffffffff81d28820 t si_set_power_state_conditionally_enable_ulv +ffffffff81d28900 t si_power_control_set_level +ffffffff81d28a90 T si_dpm_post_set_power_state +ffffffff81d28ac0 T si_dpm_display_configuration_changed +ffffffff81d28ba0 T si_dpm_init +ffffffff81d2a5e0 T si_dpm_fini +ffffffff81d2a690 T si_dpm_debugfs_print_current_performance_level +ffffffff81d2a6e0 T si_dpm_get_current_sclk +ffffffff81d2a750 T si_dpm_get_current_mclk +ffffffff81d2a7c0 t si_do_program_memory_timing_parameters +ffffffff81d2a950 t si_populate_mvdd_value +ffffffff81d2a9d0 t si_convert_power_level_to_smc +ffffffff81d2b280 t si_calculate_sclk_params +ffffffff81d2b4b0 t si_program_cac_config_registers +ffffffff81d2c000 T si_copy_bytes_to_smc +ffffffff81d2c240 T si_start_smc +ffffffff81d2c280 T si_reset_smc +ffffffff81d2c2c0 T si_program_jump_on_start +ffffffff81d2c2f0 T si_stop_smc_clock +ffffffff81d2c330 T si_start_smc_clock +ffffffff81d2c370 T si_is_smc_running +ffffffff81d2c3d0 T si_send_msg_to_smc +ffffffff81d2c4a0 T si_wait_for_smc_inactive +ffffffff81d2c540 T si_load_smc_ucode +ffffffff81d2c6e0 T si_read_smc_sram_dword +ffffffff81d2c7b0 T si_write_smc_sram_dword +ffffffff81d2d000 T sumo_get_pi +ffffffff81d2d030 T sumo_gfx_clockgating_initialize +ffffffff81d2d110 T sumo_program_vc +ffffffff81d2d150 T sumo_clear_vc +ffffffff81d2d190 T sumo_program_sstp +ffffffff81d2d210 T sumo_take_smu_control +ffffffff81d2d240 T sumo_get_sleep_divider_from_id +ffffffff81d2d270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d2d320 T sumo_dpm_enable +ffffffff81d2d9b0 T sumo_dpm_late_enable +ffffffff81d2df70 T sumo_dpm_disable +ffffffff81d2e2c0 T sumo_dpm_pre_set_power_state +ffffffff81d2e7b0 T sumo_dpm_set_power_state +ffffffff81d2f260 T sumo_dpm_post_set_power_state +ffffffff81d2f300 T sumo_dpm_setup_asic +ffffffff81d2f400 T sumo_dpm_display_configuration_changed +ffffffff81d2f430 T sumo_convert_vid2_to_vid7 +ffffffff81d2f480 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d2f540 T sumo_construct_vid_mapping_table +ffffffff81d2f6b0 T sumo_dpm_init +ffffffff81d2ff80 T sumo_dpm_print_power_state +ffffffff81d300a0 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d300d0 T sumo_dpm_get_current_sclk +ffffffff81d30140 T sumo_dpm_get_current_mclk +ffffffff81d30170 T sumo_dpm_get_current_vddc +ffffffff81d30240 T sumo_dpm_fini +ffffffff81d302d0 T sumo_dpm_get_sclk +ffffffff81d30320 T sumo_dpm_get_mclk +ffffffff81d30350 T sumo_dpm_force_performance_level +ffffffff81d30740 t sumo_power_level_enable +ffffffff81d30970 t sumo_program_power_level +ffffffff81d31000 T sumo_initialize_m3_arb +ffffffff81d312c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d31360 t sumo_send_msg_to_smu +ffffffff81d314f0 T sumo_smu_pg_init +ffffffff81d31510 T sumo_enable_boost_timer +ffffffff81d31640 T sumo_set_tdp_limit +ffffffff81d316c0 T sumo_boost_state_enable +ffffffff81d31710 T sumo_get_running_fw_version +ffffffff81d32000 T trinity_dpm_enable_bapm +ffffffff81d32080 T trinity_dpm_enable +ffffffff81d32520 T trinity_dpm_late_enable +ffffffff81d32a60 T trinity_dpm_disable +ffffffff81d32e50 T trinity_dpm_force_performance_level +ffffffff81d32f00 T trinity_dpm_pre_set_power_state +ffffffff81d334c0 T trinity_dpm_set_power_state +ffffffff81d33a30 T trinity_dpm_post_set_power_state +ffffffff81d33ad0 T trinity_dpm_setup_asic +ffffffff81d33b30 T trinity_dpm_display_configuration_changed +ffffffff81d33bc0 T trinity_dpm_init +ffffffff81d344b0 T trinity_dpm_print_power_state +ffffffff81d345c0 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d34650 T trinity_dpm_get_current_sclk +ffffffff81d346b0 T trinity_dpm_get_current_mclk +ffffffff81d346e0 T trinity_dpm_fini +ffffffff81d34780 T trinity_dpm_get_sclk +ffffffff81d347d0 T trinity_dpm_get_mclk +ffffffff81d34800 t trinity_program_power_level +ffffffff81d35000 T trinity_dpm_bapm_enable +ffffffff81d35150 T trinity_dpm_config +ffffffff81d35230 T trinity_dpm_force_state +ffffffff81d35310 T trinity_dpm_n_levels_disabled +ffffffff81d353f0 T trinity_uvd_dpm_config +ffffffff81d354c0 T trinity_dpm_no_forced_level +ffffffff81d35590 T trinity_dce_enable_voltage_adjustment +ffffffff81d356e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d357b0 T trinity_acquire_mutex +ffffffff81d35840 T trinity_release_mutex +ffffffff81d36000 T uvd_v1_0_get_rptr +ffffffff81d36040 T uvd_v1_0_get_wptr +ffffffff81d36080 T uvd_v1_0_set_wptr +ffffffff81d360c0 T uvd_v1_0_fence_emit +ffffffff81d364b0 T uvd_v1_0_resume +ffffffff81d36610 T uvd_v1_0_init +ffffffff81d36b90 T uvd_v1_0_start +ffffffff81d37310 T uvd_v1_0_fini +ffffffff81d37480 T uvd_v1_0_stop +ffffffff81d375f0 T uvd_v1_0_ring_test +ffffffff81d377c0 T uvd_v1_0_semaphore_emit +ffffffff81d377f0 T uvd_v1_0_ib_execute +ffffffff81d37980 T uvd_v1_0_ib_test +ffffffff81d38000 T uvd_v2_2_fence_emit +ffffffff81d38450 T uvd_v2_2_semaphore_emit +ffffffff81d38650 T uvd_v2_2_resume +ffffffff81d39000 T uvd_v3_1_semaphore_emit +ffffffff81d3a000 T uvd_v4_2_resume +ffffffff81d3b000 T vce_v1_0_get_rptr +ffffffff81d3b090 T vce_v1_0_get_wptr +ffffffff81d3b120 T vce_v1_0_set_wptr +ffffffff81d3b1b0 T vce_v1_0_enable_mgcg +ffffffff81d3b470 T vce_v1_0_load_fw +ffffffff81d3b640 T vce_v1_0_bo_size +ffffffff81d3b6b0 T vce_v1_0_resume +ffffffff81d3c020 T vce_v1_0_start +ffffffff81d3c7e0 T vce_v1_0_init +ffffffff81d3d000 T vce_v2_0_enable_mgcg +ffffffff81d3d070 t vce_v2_0_set_dyn_cg +ffffffff81d3d260 T vce_v2_0_bo_size +ffffffff81d3d2d0 T vce_v2_0_resume +ffffffff81d3e000 T aldebaran_reset_init +ffffffff81d3e0c0 t aldebaran_async_reset +ffffffff81d3e120 t aldebaran_get_reset_handler +ffffffff81d3e1c0 T aldebaran_reset_fini +ffffffff81d3e220 t aldebaran_mode2_prepare_hwcontext +ffffffff81d3e340 t aldebaran_mode2_perform_reset +ffffffff81d3e500 t aldebaran_mode2_restore_hwcontext +ffffffff81d3eaa0 t aldebaran_mode2_reset +ffffffff81d3f000 T aldebaran_reg_base_init +ffffffff81d40000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d40040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d40070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d40180 T amdgpu_acpi_pcie_performance_request +ffffffff81d40500 T amdgpu_acpi_power_shift_control +ffffffff81d40640 T amdgpu_acpi_smart_shift_update +ffffffff81d406e0 T amdgpu_acpi_get_tmr_info +ffffffff81d40770 T amdgpu_acpi_get_mem_info +ffffffff81d40830 T amdgpu_acpi_init +ffffffff81d408e0 t amdgpu_acpi_event +ffffffff81d40bf0 T amdgpu_acpi_get_backlight_caps +ffffffff81d40c40 T amdgpu_acpi_fini +ffffffff81d40c60 T amdgpu_acpi_should_gpu_reset +ffffffff81d40cb0 T amdgpu_acpi_detect +ffffffff81d415f0 T amdgpu_acpi_release +ffffffff81d42000 T amdgpu_afmt_acr +ffffffff81d43000 T amdgpu_amdkfd_init +ffffffff81d43040 T amdgpu_amdkfd_fini +ffffffff81d43070 T amdgpu_amdkfd_device_probe +ffffffff81d430a0 T amdgpu_amdkfd_device_init +ffffffff81d43260 t amdgpu_amdkfd_reset_work +ffffffff81d432e0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d43330 T amdgpu_amdkfd_interrupt +ffffffff81d43360 T amdgpu_amdkfd_suspend +ffffffff81d43390 T amdgpu_amdkfd_resume +ffffffff81d433c0 T amdgpu_amdkfd_pre_reset +ffffffff81d433f0 T amdgpu_amdkfd_post_reset +ffffffff81d43420 T amdgpu_amdkfd_gpu_reset +ffffffff81d43480 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d43730 t amdgpu_bo_reserve +ffffffff81d43890 t amdgpu_bo_unreserve +ffffffff81d43970 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d439e0 T amdgpu_amdkfd_alloc_gws +ffffffff81d43ac0 T amdgpu_amdkfd_free_gws +ffffffff81d43b00 T amdgpu_amdkfd_get_fw_version +ffffffff81d43bb0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d43d50 T amdgpu_amdkfd_xcp_memory_size +ffffffff81d43df0 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d43e30 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d43e90 T amdgpu_amdkfd_get_cu_info +ffffffff81d43fa0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d440f0 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d44160 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d441f0 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d44350 T amdgpu_amdkfd_submit_ib +ffffffff81d444b0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d44500 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d44540 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d44670 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d446b0 T amdgpu_amdkfd_have_atomics_support +ffffffff81d446e0 T amdgpu_amdkfd_debug_mem_fence +ffffffff81d44700 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d44710 T amdgpu_amdkfd_send_close_event_drain_irq +ffffffff81d44730 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d44780 T amdgpu_amdkfd_check_and_lock_kfd +ffffffff81d447b0 T amdgpu_amdkfd_unlock_kfd +ffffffff81d447e0 T amdgpu_amdkfd_unmap_hiq +ffffffff81d45000 T amdgpu_atom_execute_table +ffffffff81d450a0 t amdgpu_atom_execute_table_locked +ffffffff81d453c0 T amdgpu_atom_parse +ffffffff81d45910 T amdgpu_atom_destroy +ffffffff81d45950 T amdgpu_atom_asic_init +ffffffff81d45a70 t get_u32 +ffffffff81d45ad0 T amdgpu_atom_parse_data_header +ffffffff81d45b70 T amdgpu_atom_parse_cmd_header +ffffffff81d45bf0 t atom_op_move +ffffffff81d45dc0 t atom_op_and +ffffffff81d45fa0 t atom_op_or +ffffffff81d46180 t atom_op_shift_left +ffffffff81d46360 t atom_op_shift_right +ffffffff81d46540 t atom_op_mul +ffffffff81d46690 t atom_op_div +ffffffff81d46800 t atom_op_add +ffffffff81d469e0 t atom_op_sub +ffffffff81d46bc0 t atom_op_setport +ffffffff81d46d40 t atom_op_setregblock +ffffffff81d46e00 t atom_op_setfbbase +ffffffff81d46ec0 t atom_op_compare +ffffffff81d470a0 t atom_op_switch +ffffffff81d472d0 t atom_op_jump +ffffffff81d47540 t atom_op_test +ffffffff81d47700 t atom_op_delay +ffffffff81d477e0 t atom_op_calltable +ffffffff81d47930 t atom_op_repeat +ffffffff81d47960 t atom_op_clear +ffffffff81d47a70 t atom_op_nop +ffffffff81d47aa0 t atom_op_eot +ffffffff81d47ad0 t atom_op_mask +ffffffff81d47d80 t atom_op_postcard +ffffffff81d47e30 t atom_op_beep +ffffffff81d47e50 t atom_op_savereg +ffffffff81d47e80 t atom_op_restorereg +ffffffff81d47eb0 t atom_op_setdatablock +ffffffff81d47ff0 t atom_op_xor +ffffffff81d481d0 t atom_op_shl +ffffffff81d483f0 t atom_op_shr +ffffffff81d48610 t atom_op_debug +ffffffff81d486c0 t atom_op_processds +ffffffff81d48780 t atom_op_mul32 +ffffffff81d488e0 t atom_op_div32 +ffffffff81d48a70 t atom_put_dst +ffffffff81d48f80 t atom_get_src_int +ffffffff81d49600 t atom_iio_execute +ffffffff81d4a000 T amdgpu_atombios_lookup_i2c_gpio +ffffffff81d4a260 T amdgpu_atombios_i2c_init +ffffffff81d4a520 T amdgpu_atombios_lookup_gpio +ffffffff81d4a620 T amdgpu_atombios_has_dce_engine_info +ffffffff81d4a6a0 T amdgpu_atombios_get_connector_info_from_object_table +ffffffff81d4af00 T amdgpu_atombios_get_clock_info +ffffffff81d4b240 T amdgpu_atombios_get_gfx_info +ffffffff81d4b300 T amdgpu_atombios_get_vram_width +ffffffff81d4b390 T amdgpu_atombios_get_asic_ss_info +ffffffff81d4b670 t amdgpu_atombios_get_igp_ss_overrides +ffffffff81d4b790 T amdgpu_atombios_get_clock_dividers +ffffffff81d4b9b0 T amdgpu_atombios_has_gpu_virtualization_table +ffffffff81d4ba00 T amdgpu_atombios_scratch_regs_lock +ffffffff81d4ba60 T amdgpu_atombios_scratch_regs_engine_hung +ffffffff81d4bab0 T amdgpu_atombios_scratch_regs_set_backlight_level +ffffffff81d4bb10 T amdgpu_atombios_scratch_need_asic_init +ffffffff81d4bb60 T amdgpu_atombios_copy_swap +ffffffff81d4bb80 T amdgpu_atombios_sysfs_init +ffffffff81d4bbb0 T amdgpu_atombios_fini +ffffffff81d4bc60 T amdgpu_atombios_init +ffffffff81d4bf00 t cail_reg_read +ffffffff81d4bf20 t cail_reg_write +ffffffff81d4bf40 t cail_mc_read +ffffffff81d4bf70 t cail_mc_write +ffffffff81d4bfa0 t cail_pll_read +ffffffff81d4bfd0 t cail_pll_write +ffffffff81d4c000 T amdgpu_atombios_get_data_table +ffffffff81d4d000 T amdgpu_atombios_crtc_overscan_setup +ffffffff81d4d150 T amdgpu_atombios_crtc_scaler_setup +ffffffff81d4d1d0 T amdgpu_atombios_crtc_lock +ffffffff81d4d230 T amdgpu_atombios_crtc_enable +ffffffff81d4d290 T amdgpu_atombios_crtc_blank +ffffffff81d4d2f0 T amdgpu_atombios_crtc_powergate +ffffffff81d4d360 T amdgpu_atombios_crtc_powergate_init +ffffffff81d4d3d0 T amdgpu_atombios_crtc_set_dtd_timing +ffffffff81d4d500 T amdgpu_atombios_crtc_set_disp_eng_pll +ffffffff81d4d5f0 T amdgpu_atombios_crtc_set_dce_clock +ffffffff81d4d6e0 T amdgpu_atombios_crtc_program_pll +ffffffff81d4da00 T amdgpu_atombios_crtc_prepare_pll +ffffffff81d4df00 T amdgpu_atombios_crtc_set_pll +ffffffff81d4f000 T amdgpu_atombios_dp_aux_init +ffffffff81d4f090 t amdgpu_atombios_dp_aux_transfer +ffffffff81d4f200 T amdgpu_atombios_dp_get_sinktype +ffffffff81d4f270 T amdgpu_atombios_dp_get_dpcd +ffffffff81d4f420 T amdgpu_atombios_dp_get_panel_mode +ffffffff81d4f510 T amdgpu_atombios_dp_set_link_config +ffffffff81d4f590 t amdgpu_atombios_dp_get_dp_link_config +ffffffff81d4f720 T amdgpu_atombios_dp_mode_valid_helper +ffffffff81d4f7a0 T amdgpu_atombios_dp_needs_link_train +ffffffff81d4f810 T amdgpu_atombios_dp_set_rx_power_state +ffffffff81d4f890 T amdgpu_atombios_dp_link_train +ffffffff81d4fdf0 t amdgpu_atombios_dp_process_aux_ch +ffffffff81d4ff50 t amdgpu_atombios_dp_get_adjust_train +ffffffff81d51000 T amdgpu_atombios_encoder_get_backlight_level_from_reg +ffffffff81d51050 T amdgpu_atombios_encoder_set_backlight_level_to_reg +ffffffff81d510a0 T amdgpu_atombios_encoder_get_backlight_level +ffffffff81d51100 T amdgpu_atombios_encoder_set_backlight_level +ffffffff81d51210 T amdgpu_atombios_encoder_setup_dig_transmitter +ffffffff81d51c30 T amdgpu_atombios_encoder_init_backlight +ffffffff81d51dd0 t amdgpu_atombios_encoder_get_backlight_brightness +ffffffff81d51e30 T amdgpu_atombios_encoder_fini_backlight +ffffffff81d51ec0 T amdgpu_atombios_encoder_is_digital +ffffffff81d51f10 T amdgpu_atombios_encoder_mode_fixup +ffffffff81d51ff0 T amdgpu_atombios_encoder_get_encoder_mode +ffffffff81d52190 T amdgpu_atombios_encoder_setup_dig_encoder +ffffffff81d52670 t amdgpu_atombios_encoder_get_bpc +ffffffff81d526c0 T amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81d527c0 T amdgpu_atombios_encoder_dpms +ffffffff81d52930 t amdgpu_atombios_encoder_setup_dig +ffffffff81d52ce0 t amdgpu_atombios_encoder_setup_dvo +ffffffff81d52e90 T amdgpu_atombios_encoder_set_crtc_source +ffffffff81d53270 T amdgpu_atombios_encoder_init_dig +ffffffff81d53340 t amdgpu_atombios_encoder_setup_external_encoder +ffffffff81d535b0 T amdgpu_atombios_encoder_dac_detect +ffffffff81d53770 T amdgpu_atombios_encoder_dig_detect +ffffffff81d53870 T amdgpu_atombios_encoder_setup_ext_encoder_ddc +ffffffff81d538c0 T amdgpu_atombios_encoder_set_bios_scratch_regs +ffffffff81d53e10 T amdgpu_atombios_encoder_get_lcd_info +ffffffff81d54170 T amdgpu_atombios_encoder_get_dig_info +ffffffff81d541e0 t amdgpu_atombios_encoder_update_backlight_status +ffffffff81d55000 T amdgpu_atombios_i2c_xfer +ffffffff81d55370 T amdgpu_atombios_i2c_func +ffffffff81d553a0 T amdgpu_atombios_i2c_channel_trans +ffffffff81d56000 T amdgpu_atomfirmware_query_firmware_capability +ffffffff81d560a0 T amdgpu_atomfirmware_gpu_virtualization_supported +ffffffff81d560e0 T amdgpu_atomfirmware_scratch_regs_init +ffffffff81d56160 T amdgpu_atomfirmware_allocate_fb_scratch +ffffffff81d56360 T amdgpu_atomfirmware_get_vram_info +ffffffff81d56800 t convert_atom_mem_type_to_vram_type +ffffffff81d56880 T amdgpu_atomfirmware_mem_ecc_supported +ffffffff81d56950 T amdgpu_atomfirmware_sram_ecc_supported +ffffffff81d56990 T amdgpu_atomfirmware_dynamic_boot_config_supported +ffffffff81d569d0 T amdgpu_atomfirmware_ras_rom_addr +ffffffff81d56a80 T amdgpu_atomfirmware_get_clock_info +ffffffff81d56cd0 T amdgpu_atomfirmware_get_gfx_info +ffffffff81d56e50 T amdgpu_atomfirmware_mem_training_supported +ffffffff81d56e90 T amdgpu_atomfirmware_get_fw_reserved_fb_size +ffffffff81d56f20 T amdgpu_atomfirmware_asic_init +ffffffff81d58000 T amdgpu_benchmark +ffffffff81d58790 t amdgpu_benchmark_move +ffffffff81d59000 T amdgpu_read_bios +ffffffff81d59190 t check_atom_bios +ffffffff81d592a0 T amdgpu_get_bios +ffffffff81d597c0 t igp_read_bios_from_vram +ffffffff81d59900 t amdgpu_read_platform_bios +ffffffff81d599d0 T amdgpu_soc15_read_bios_from_rom +ffffffff81d5a000 T amdgpu_bo_list_create +ffffffff81d5a270 t amdgpu_bo_list_entry_cmp +ffffffff81d5a2b0 T amdgpu_bo_list_get +ffffffff81d5a320 T amdgpu_bo_list_put +ffffffff81d5a3d0 T amdgpu_bo_create_list_entry_array +ffffffff81d5a520 T amdgpu_bo_list_ioctl +ffffffff81d5b000 T amdgpu_cgs_create_device +ffffffff81d5b080 T amdgpu_cgs_destroy_device +ffffffff81d5b0a0 t amdgpu_cgs_read_register +ffffffff81d5b0c0 t amdgpu_cgs_write_register +ffffffff81d5b0e0 t amdgpu_cgs_read_ind_register +ffffffff81d5b1c0 t amdgpu_cgs_write_ind_register +ffffffff81d5b270 t amdgpu_cgs_get_firmware_info +ffffffff81d5c000 T amdgpu_connector_hotplug +ffffffff81d5c110 T amdgpu_connector_get_monitor_bpc +ffffffff81d5c3a0 T amdgpu_connector_edid +ffffffff81d5c450 T amdgpu_connector_encoder_get_dp_bridge_encoder_id +ffffffff81d5c4d0 T amdgpu_connector_is_dp12_capable +ffffffff81d5c560 T amdgpu_connector_add +ffffffff81d5d150 t amdgpu_connector_dp_detect +ffffffff81d5d4a0 t amdgpu_connector_dvi_force +ffffffff81d5d4f0 t amdgpu_connector_set_property +ffffffff81d5da60 t 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dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81dee9b0 t dce_v10_0_set_pageflip_irq_state +ffffffff81deea60 t dce_v10_0_pageflip_irq +ffffffff81deebc0 t dce_v10_0_set_hpd_irq_state +ffffffff81deec90 t dce_v10_0_hpd_irq +ffffffff81deedc0 t dce_v10_0_afmt_init +ffffffff81deeed0 t dce_v10_0_audio_init +ffffffff81deefa0 t INIT_DELAYED_WORK +ffffffff81deefe0 t dce_v10_0_crtc_cursor_set2 +ffffffff81def2a0 t dce_v10_0_crtc_cursor_move +ffffffff81def370 t dce_v10_0_crtc_gamma_set +ffffffff81def3b0 t dce_v10_0_crtc_destroy +ffffffff81def3e0 t amdgpu_bo_reserve +ffffffff81def5e0 t amdgpu_bo_unreserve +ffffffff81def6c0 t dce_v10_0_lock_cursor +ffffffff81def720 t dce_v10_0_cursor_move_locked +ffffffff81def880 t dce_v10_0_show_cursor +ffffffff81def920 t dce_v10_0_crtc_load_lut +ffffffff81defcb0 t dce_v10_0_crtc_dpms +ffffffff81defe90 t dce_v10_0_crtc_prepare +ffffffff81defed0 t dce_v10_0_crtc_commit +ffffffff81deff00 t dce_v10_0_crtc_mode_fixup +ffffffff81df00b0 t dce_v10_0_crtc_mode_set +ffffffff81df0290 t dce_v10_0_crtc_set_base +ffffffff81df02b0 t dce_v10_0_crtc_set_base_atomic +ffffffff81df02d0 t dce_v10_0_crtc_disable +ffffffff81df0460 t dce_v10_0_crtc_do_set_base +ffffffff81df0b60 t __delayed_work_tick +ffffffff81df0b80 t dce_v10_0_is_display_hung +ffffffff81df1000 T dce_v11_0_disable_dce +ffffffff81df1160 t dce_v11_0_early_init +ffffffff81df1290 t dce_v11_0_sw_init +ffffffff81df15b0 t dce_v11_0_sw_fini +ffffffff81df16d0 t dce_v11_0_hw_init +ffffffff81df1a90 t dce_v11_0_hw_fini +ffffffff81df1c20 t dce_v11_0_suspend +ffffffff81df1c80 t dce_v11_0_resume +ffffffff81df1cf0 t dce_v11_0_is_idle +ffffffff81df1d20 t dce_v11_0_wait_for_idle +ffffffff81df1d50 t dce_v11_0_soft_reset +ffffffff81df1f60 t dce_v11_0_set_clockgating_state +ffffffff81df1f90 t dce_v11_0_set_powergating_state +ffffffff81df1fc0 t dce_v11_0_audio_endpt_rreg +ffffffff81df2050 t dce_v11_0_audio_endpt_wreg +ffffffff81df20d0 t dce_v11_0_bandwidth_update +ffffffff81df2b40 t dce_v11_0_vblank_get_counter +ffffffff81df2b90 t dce_v11_0_hpd_sense +ffffffff81df2bf0 t dce_v11_0_hpd_set_polarity +ffffffff81df2cc0 t dce_v11_0_hpd_get_gpio_reg +ffffffff81df2cf0 t dce_v11_0_page_flip +ffffffff81df2df0 t dce_v11_0_crtc_get_scanoutpos +ffffffff81df2e90 t dce_v11_0_encoder_add +ffffffff81df30e0 t dce_v11_0_latency_watermark +ffffffff81df3310 t dce_v11_0_encoder_destroy +ffffffff81df3370 t dce_v11_0_encoder_prepare +ffffffff81df3570 t dce_v11_0_encoder_commit +ffffffff81df35a0 t dce_v11_0_encoder_mode_set +ffffffff81df4510 t dce_v11_0_encoder_disable +ffffffff81df4620 t dce_v11_0_ext_dpms +ffffffff81df4650 t dce_v11_0_ext_prepare +ffffffff81df4680 t dce_v11_0_ext_commit +ffffffff81df46b0 t dce_v11_0_ext_mode_set +ffffffff81df46e0 t dce_v11_0_ext_disable +ffffffff81df4710 t dce_v11_0_set_crtc_irq_state +ffffffff81df47f0 t dce_v11_0_crtc_irq +ffffffff81df4a10 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81df4ae0 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81df4bb0 t dce_v11_0_set_pageflip_irq_state +ffffffff81df4c60 t dce_v11_0_pageflip_irq +ffffffff81df4dc0 t dce_v11_0_set_hpd_irq_state +ffffffff81df4e90 t dce_v11_0_hpd_irq +ffffffff81df4fc0 t dce_v11_0_afmt_init +ffffffff81df50d0 t dce_v11_0_audio_init +ffffffff81df51d0 t INIT_DELAYED_WORK +ffffffff81df5210 t dce_v11_0_crtc_cursor_set2 +ffffffff81df54d0 t dce_v11_0_crtc_cursor_move +ffffffff81df55a0 t dce_v11_0_crtc_gamma_set +ffffffff81df55e0 t dce_v11_0_crtc_destroy +ffffffff81df5610 t amdgpu_bo_reserve +ffffffff81df5810 t amdgpu_bo_unreserve +ffffffff81df58f0 t dce_v11_0_lock_cursor +ffffffff81df5950 t dce_v11_0_cursor_move_locked +ffffffff81df5ab0 t dce_v11_0_show_cursor +ffffffff81df5b50 t dce_v11_0_crtc_load_lut +ffffffff81df5eb0 t dce_v11_0_crtc_dpms +ffffffff81df6090 t dce_v11_0_crtc_prepare +ffffffff81df60d0 t dce_v11_0_crtc_commit +ffffffff81df6100 t dce_v11_0_crtc_mode_fixup +ffffffff81df6370 t dce_v11_0_crtc_mode_set +ffffffff81df65d0 t dce_v11_0_crtc_set_base +ffffffff81df65f0 t dce_v11_0_crtc_set_base_atomic +ffffffff81df6610 t dce_v11_0_crtc_disable +ffffffff81df67b0 t dce_v11_0_crtc_do_set_base +ffffffff81df6eb0 t __delayed_work_tick +ffffffff81df7000 t df_v1_7_sw_init +ffffffff81df7040 t df_v1_7_sw_fini +ffffffff81df7070 t df_v1_7_enable_broadcast_mode +ffffffff81df71a0 t df_v1_7_get_fb_channel_number +ffffffff81df7230 t df_v1_7_get_hbm_channel_number +ffffffff81df7280 t df_v1_7_update_medium_grain_clock_gating +ffffffff81df7400 t df_v1_7_get_clockgating_state +ffffffff81df7490 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81df8000 t df_v3_6_sw_init +ffffffff81df8150 t df_v3_6_sw_fini +ffffffff81df8180 t df_v3_6_enable_broadcast_mode +ffffffff81df82b0 t df_v3_6_get_fb_channel_number +ffffffff81df8390 t df_v3_6_get_hbm_channel_number +ffffffff81df83e0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81df8580 t df_v3_6_get_clockgating_state +ffffffff81df8610 t df_v3_6_pmc_start +ffffffff81df8910 t df_v3_6_pmc_stop +ffffffff81df8bb0 t df_v3_6_pmc_get_count +ffffffff81df8d40 t df_v3_6_get_fica +ffffffff81df8e30 t df_v3_6_set_fica +ffffffff81df8f10 t df_v3_6_query_ras_poison_mode +ffffffff81dfa000 t df_v4_3_query_ras_poison_mode +ffffffff81dfb000 T dimgrey_cavefish_reg_base_init +ffffffff81dfc000 T emu_soc_asic_init +ffffffff81dfd000 t gfx_v10_0_early_init +ffffffff81dfd820 t gfx_v10_0_late_init +ffffffff81dfd890 t gfx_v10_0_sw_init +ffffffff81dfdda0 t gfx_v10_0_sw_fini +ffffffff81dfdfc0 t gfx_v10_0_hw_init +ffffffff81e00d20 t gfx_v10_0_hw_fini +ffffffff81e00e00 t gfx_v10_0_suspend +ffffffff81e00e40 t gfx_v10_0_resume +ffffffff81e00e50 t gfx_v10_0_is_idle +ffffffff81e00ee0 t gfx_v10_0_wait_for_idle +ffffffff81e00fe0 t gfx_v10_0_soft_reset +ffffffff81e01340 t gfx_v10_0_set_clockgating_state +ffffffff81e015f0 t gfx_v10_0_set_powergating_state +ffffffff81e016b0 t gfx_v10_0_get_clockgating_state +ffffffff81e017c0 t gfx_v10_0_get_gpu_clock_counter +ffffffff81e01cd0 t gfx_v10_0_select_se_sh +ffffffff81e01d70 t gfx_v10_0_read_wave_data +ffffffff81e01fd0 t gfx_v10_0_read_wave_vgprs +ffffffff81e02000 t gfx_v10_0_read_wave_sgprs +ffffffff81e02080 t gfx_v10_0_select_me_pipe_q +ffffffff81e020a0 t gfx_v10_0_init_spm_golden_registers +ffffffff81e02110 t gfx_v10_0_update_perfmon_mgcg +ffffffff81e02240 t wave_read_ind +ffffffff81e02330 t wave_read_regs +ffffffff81e02490 t gfx10_kiq_set_resources +ffffffff81e027b0 t gfx10_kiq_map_queues +ffffffff81e02b40 t gfx10_kiq_unmap_queues +ffffffff81e02f40 t gfx10_kiq_query_status +ffffffff81e03230 t gfx10_kiq_invalidate_tlbs +ffffffff81e03350 t gfx_v10_0_ring_get_rptr_compute +ffffffff81e03380 t gfx_v10_0_ring_get_wptr_compute +ffffffff81e033f0 t gfx_v10_0_ring_set_wptr_compute +ffffffff81e03530 t gfx_v10_0_ring_emit_ib_compute +ffffffff81e03870 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81e03ca0 t gfx_v10_0_ring_test_ring +ffffffff81e03f00 t gfx_v10_0_ring_test_ib +ffffffff81e04190 t gfx_v10_0_ring_emit_rreg +ffffffff81e04420 t gfx_v10_0_ring_emit_wreg +ffffffff81e04650 t gfx_v10_0_ring_emit_reg_wait +ffffffff81e046a0 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81e04730 t gfx_v10_0_wait_reg_mem +ffffffff81e04a60 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81e04a90 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81e04ba0 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81e04db0 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81e05430 t gfx_v10_0_ring_emit_fence +ffffffff81e05810 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81e05870 t gfx_v10_0_ring_emit_vm_flush +ffffffff81e05a40 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81e05b10 t gfx_v10_0_ring_emit_gds_switch +ffffffff81e05bf0 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81e05e20 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81e05ee0 t gfx_v10_0_ring_emit_sb +ffffffff81e05fd0 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81e064c0 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81e065d0 t gfx_v10_0_ring_soft_recovery +ffffffff81e06640 t gfx_v10_0_ring_preempt_ib +ffffffff81e067b0 t gfx_v10_0_emit_mem_sync +ffffffff81e06ae0 t gfx_v10_0_write_data_to_reg +ffffffff81e06cf0 t gfx_v10_0_set_eop_interrupt_state +ffffffff81e06dd0 t gfx_v10_0_eop_irq +ffffffff81e06f80 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81e07120 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81e072e0 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81e075d0 t gfx_v10_0_kiq_irq +ffffffff81e07650 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81e07790 t gfx_v10_0_priv_reg_irq +ffffffff81e077f0 t gfx_v10_0_handle_priv_fault +ffffffff81e07950 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81e07a90 t gfx_v10_0_priv_inst_irq +ffffffff81e07af0 t gfx_v10_0_is_rlc_enabled +ffffffff81e07b80 t gfx_v10_0_set_safe_mode +ffffffff81e07e30 t gfx_v10_0_unset_safe_mode +ffffffff81e07ee0 t gfx_v10_0_rlc_init +ffffffff81e07f00 t gfx_v10_0_get_csb_size +ffffffff81e07f30 t gfx_v10_0_get_csb_buffer +ffffffff81e080a0 t gfx_v10_0_rlc_resume +ffffffff81e08b10 t gfx_v10_0_rlc_stop +ffffffff81e08bf0 t gfx_v10_0_rlc_reset +ffffffff81e08da0 t gfx_v10_0_rlc_start +ffffffff81e08f50 t gfx_v10_0_update_spm_vmid +ffffffff81e08f90 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81e098b0 t gfx_v10_0_init_csb +ffffffff81e09b90 t gfx_v10_0_update_spm_vmid_internal +ffffffff81e09cb0 t gfx_v10_0_rlc_backdoor_autoload_config_mec_cache +ffffffff81e09f80 t gfx_v10_0_is_rlcg_access_range +ffffffff81e09fb0 t gfx_v10_0_gfx_mqd_init +ffffffff81e0a3a0 t gfx_v10_0_compute_mqd_init +ffffffff81e0a850 t gfx_v10_0_mec_init +ffffffff81e0aa60 t gfx_v10_0_compute_ring_init +ffffffff81e0aba0 t gfx_v10_0_rlc_backdoor_autoload_buffer_init +ffffffff81e0ae00 t gfx_v10_0_gpu_early_init +ffffffff81e0b060 t amdgpu_bo_unreserve +ffffffff81e0b140 t gfx_v10_0_cp_resume +ffffffff81e0db20 t gfx_v10_3_get_disabled_sa +ffffffff81e0dc40 t gfx_v10_0_get_rb_active_bitmap +ffffffff81e0dd70 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81e0de80 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81e0df90 t gfx_v10_0_cp_gfx_enable +ffffffff81e0e200 t gfx_v10_0_cp_compute_enable +ffffffff81e0e3a0 t amdgpu_bo_reserve +ffffffff81e0e510 t gfx_v10_0_kiq_init_register +ffffffff81e0f3b0 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81e0f4b0 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81e0f790 t gfx_v10_0_cp_gfx_start +ffffffff81e10180 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81e104d0 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81e10c10 t gfx_v10_0_update_3d_clock_gating +ffffffff81e11000 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81e113e0 t gfx_v10_cntl_pg +ffffffff81e12000 t gfx_v11_0_early_init +ffffffff81e12750 t gfx_v11_0_late_init +ffffffff81e127c0 t gfx_v11_0_sw_init +ffffffff81e12d00 t gfx_v11_0_sw_fini +ffffffff81e12f10 t gfx_v11_0_hw_init +ffffffff81e17310 t gfx_v11_0_hw_fini +ffffffff81e17410 t gfx_v11_0_suspend +ffffffff81e17450 t gfx_v11_0_resume +ffffffff81e17460 t gfx_v11_0_is_idle +ffffffff81e174f0 t gfx_v11_0_wait_for_idle +ffffffff81e175f0 t gfx_v11_0_check_soft_reset +ffffffff81e17720 t gfx_v11_0_soft_reset +ffffffff81e18460 t gfx_v11_0_post_soft_reset +ffffffff81e18470 t gfx_v11_0_set_clockgating_state +ffffffff81e190b0 t gfx_v11_0_set_powergating_state +ffffffff81e19150 t gfx_v11_0_get_clockgating_state +ffffffff81e19320 t gfx_v11_0_get_gpu_clock_counter +ffffffff81e196a0 t gfx_v11_0_select_se_sh +ffffffff81e19740 t gfx_v11_0_read_wave_data +ffffffff81e19980 t gfx_v11_0_read_wave_vgprs +ffffffff81e199b0 t gfx_v11_0_read_wave_sgprs +ffffffff81e19a30 t gfx_v11_0_select_me_pipe_q +ffffffff81e19a50 t gfx_v11_0_update_perf_clk +ffffffff81e19b80 t gfx_v11_0_get_gfx_shadow_info +ffffffff81e19bf0 t wave_read_ind +ffffffff81e19ce0 t wave_read_regs +ffffffff81e19e40 t gfx11_kiq_set_resources +ffffffff81e1a160 t gfx11_kiq_map_queues +ffffffff81e1a4f0 t gfx11_kiq_unmap_queues +ffffffff81e1a8f0 t gfx11_kiq_query_status +ffffffff81e1abe0 t gfx11_kiq_invalidate_tlbs +ffffffff81e1ad00 t gfx_v11_0_ring_get_rptr_compute +ffffffff81e1ad30 t gfx_v11_0_ring_get_wptr_compute +ffffffff81e1ada0 t gfx_v11_0_ring_set_wptr_compute +ffffffff81e1aee0 t gfx_v11_0_ring_emit_ib_compute +ffffffff81e1b220 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81e1b650 t gfx_v11_0_ring_test_ring +ffffffff81e1b8d0 t gfx_v11_0_ring_test_ib +ffffffff81e1bb70 t gfx_v11_0_ring_emit_rreg +ffffffff81e1be00 t gfx_v11_0_ring_emit_wreg +ffffffff81e1c030 t gfx_v11_0_ring_emit_reg_wait +ffffffff81e1c080 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81e1c0f0 t gfx_v11_0_wait_reg_mem +ffffffff81e1c420 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81e1c450 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81e1c560 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81e1c780 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81e1ce10 t gfx_v11_0_ring_emit_fence +ffffffff81e1d1e0 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81e1d240 t gfx_v11_0_ring_emit_vm_flush +ffffffff81e1d410 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81e1d4e0 t gfx_v11_0_ring_emit_gds_switch +ffffffff81e1d5c0 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81e1d7f0 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81e1d8b0 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81e1da10 t gfx_v11_0_ring_emit_gfx_shadow +ffffffff81e1ddd0 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81e1dee0 t gfx_v11_0_ring_soft_recovery +ffffffff81e1df50 t gfx_v11_0_ring_preempt_ib +ffffffff81e1e0c0 t gfx_v11_0_emit_mem_sync +ffffffff81e1e3f0 t gfx_v11_0_write_data_to_reg +ffffffff81e1e600 t gfx_v11_0_set_eop_interrupt_state +ffffffff81e1e690 t gfx_v11_0_eop_irq +ffffffff81e1e840 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81e1e9e0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81e1eb70 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81e1ecb0 t gfx_v11_0_priv_reg_irq +ffffffff81e1ed10 t gfx_v11_0_handle_priv_fault +ffffffff81e1ee70 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81e1efb0 t gfx_v11_0_priv_inst_irq +ffffffff81e1f010 t gfx_v11_0_rlc_gc_fed_irq +ffffffff81e1f060 t gfx_v11_0_is_rlc_enabled +ffffffff81e1f0f0 t gfx_v11_0_set_safe_mode +ffffffff81e1f250 t gfx_v11_0_unset_safe_mode +ffffffff81e1f2c0 t gfx_v11_0_rlc_init +ffffffff81e1f340 t gfx_v11_0_get_csb_size +ffffffff81e1f370 t gfx_v11_0_get_csb_buffer +ffffffff81e1f4e0 t gfx_v11_0_rlc_resume +ffffffff81e20240 t gfx_v11_0_rlc_stop +ffffffff81e20320 t gfx_v11_0_rlc_reset +ffffffff81e204d0 t gfx_v11_0_rlc_start +ffffffff81e20680 t gfx_v11_0_update_spm_vmid +ffffffff81e20780 t gfx_v11_0_init_csb +ffffffff81e20910 t gfx_v11_0_gfx_mqd_init +ffffffff81e20cf0 t gfx_v11_0_compute_mqd_init +ffffffff81e21220 t gfx_v11_0_mec_init +ffffffff81e21360 t gfx_v11_0_compute_ring_init +ffffffff81e214a0 t gfx_v11_0_rlc_autoload_buffer_init +ffffffff81e21690 t gfx_v11_0_gpu_early_init +ffffffff81e21760 t amdgpu_bo_unreserve +ffffffff81e21840 t gfx_v11_0_disable_gpa_mode +ffffffff81e219e0 t gfx_v11_0_cp_resume +ffffffff81e257e0 t gfx_v11_0_config_me_cache +ffffffff81e25ba0 t gfx_v11_0_config_pfp_cache +ffffffff81e25f60 t gfx_v11_0_config_mec_cache +ffffffff81e26320 t gfx_v11_0_get_sa_active_bitmap +ffffffff81e26440 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81e26550 t gfx_v11_0_cp_compute_enable +ffffffff81e26730 t gfx_v11_0_cp_gfx_enable +ffffffff81e26940 t amdgpu_bo_reserve +ffffffff81e26ab0 t gfx_v11_0_kiq_init_register +ffffffff81e27950 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81e27a30 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81e27c10 t gfx_v11_0_cp_gfx_start +ffffffff81e28490 t gfx_v11_cntl_pg +ffffffff81e29000 t gfx_v11_0_3_rlc_gc_fed_irq +ffffffff81e29200 t gfx_v11_0_3_poison_consumption_handler +ffffffff81e2a000 t gfx_v8_0_early_init +ffffffff81e2a2f0 t gfx_v8_0_late_init +ffffffff81e2aa10 t gfx_v8_0_sw_init +ffffffff81e2add0 t gfx_v8_0_sw_fini +ffffffff81e2af70 t gfx_v8_0_hw_init +ffffffff81e2d110 t gfx_v8_0_hw_fini +ffffffff81e2d5c0 t gfx_v8_0_suspend +ffffffff81e2d600 t gfx_v8_0_resume +ffffffff81e2d610 t gfx_v8_0_is_idle +ffffffff81e2d680 t gfx_v8_0_wait_for_idle +ffffffff81e2d730 t gfx_v8_0_check_soft_reset +ffffffff81e2d810 t gfx_v8_0_pre_soft_reset +ffffffff81e2d970 t gfx_v8_0_soft_reset +ffffffff81e2db30 t gfx_v8_0_post_soft_reset +ffffffff81e2dcb0 t gfx_v8_0_set_clockgating_state +ffffffff81e2df30 t gfx_v8_0_set_powergating_state +ffffffff81e2e2e0 t gfx_v8_0_get_clockgating_state +ffffffff81e2e3c0 t gfx_v8_0_get_gpu_clock_counter +ffffffff81e2e460 t gfx_v8_0_select_se_sh +ffffffff81e2e4c0 t gfx_v8_0_read_wave_data +ffffffff81e2e960 t gfx_v8_0_read_wave_sgprs +ffffffff81e2ea10 t gfx_v8_0_select_me_pipe_q +ffffffff81e2ea30 t gfx_v8_0_ring_get_rptr +ffffffff81e2ea60 t gfx_v8_0_ring_get_wptr_compute +ffffffff81e2ea90 t gfx_v8_0_ring_set_wptr_compute +ffffffff81e2ead0 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81e2eef0 t gfx_v8_0_ring_test_ring +ffffffff81e2f0f0 t gfx_v8_0_ring_emit_rreg +ffffffff81e2f380 t gfx_v8_0_ring_emit_wreg +ffffffff81e2f5b0 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81e2f610 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81e2f680 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81e2fbe0 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81e300d0 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81e303c0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81e30770 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81e30a90 t gfx_v8_0_ring_emit_gds_switch +ffffffff81e31240 t gfx_v8_0_ring_test_ib +ffffffff81e313f0 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81e31620 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81e316d0 t gfx_v8_ring_emit_sb +ffffffff81e317c0 t gfx_v8_ring_emit_cntxcntl +ffffffff81e31d60 t gfx_v8_0_ring_soft_recovery +ffffffff81e31d90 t gfx_v8_0_emit_mem_sync +ffffffff81e31f90 t gfx_v8_0_ring_emit_ib_compute +ffffffff81e32290 t gfx_v8_0_ring_emit_fence_compute +ffffffff81e32590 t gfx_v8_0_emit_mem_sync_compute +ffffffff81e32850 t gfx_v8_0_emit_wave_limit +ffffffff81e32a00 t gfx_v8_0_set_eop_interrupt_state +ffffffff81e32c10 t gfx_v8_0_eop_irq +ffffffff81e32d20 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81e32da0 t gfx_v8_0_priv_reg_irq +ffffffff81e32ea0 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81e32f20 t gfx_v8_0_priv_inst_irq +ffffffff81e33020 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81e33280 t gfx_v8_0_cp_ecc_error_irq +ffffffff81e332d0 t gfx_v8_0_set_sq_int_state +ffffffff81e33360 t gfx_v8_0_sq_irq +ffffffff81e333d0 t gfx_v8_0_parse_sq_irq +ffffffff81e33620 t gfx_v8_0_is_rlc_enabled +ffffffff81e33660 t gfx_v8_0_set_safe_mode +ffffffff81e33760 t gfx_v8_0_unset_safe_mode +ffffffff81e33800 t gfx_v8_0_rlc_init +ffffffff81e338b0 t gfx_v8_0_get_csb_size +ffffffff81e338e0 t gfx_v8_0_get_csb_buffer +ffffffff81e33a50 t gfx_v8_0_cp_jump_table_num +ffffffff81e33a90 t gfx_v8_0_rlc_resume +ffffffff81e33e10 t gfx_v8_0_rlc_stop +ffffffff81e33e80 t gfx_v8_0_rlc_reset +ffffffff81e33f00 t gfx_v8_0_rlc_start +ffffffff81e33f80 t gfx_v8_0_update_spm_vmid +ffffffff81e33ff0 t gfx_v8_0_init_save_restore_list +ffffffff81e34400 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81e34620 t gfx_v8_0_sq_irq_work_func +ffffffff81e34640 t gfx_v8_0_init_microcode +ffffffff81e34eb0 t gfx_v8_0_mec_init +ffffffff81e34fb0 t gfx_v8_0_compute_ring_init +ffffffff81e350e0 t gfx_v8_0_gpu_early_init +ffffffff81e35580 t amdgpu_bo_unreserve +ffffffff81e35660 t gfx_v8_0_kiq_resume +ffffffff81e35910 t gfx_v8_0_cp_gfx_resume +ffffffff81e363d0 t gfx_v8_0_kcq_resume +ffffffff81e36d90 t amdgpu_bo_reserve +ffffffff81e36f00 t gfx_v8_0_mqd_commit +ffffffff81e370e0 t gfx_v8_0_mqd_init +ffffffff81e37500 t gfx_v8_0_deactivate_hqd +ffffffff81e375c0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e37900 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e38000 t gfx_v9_0_ras_error_inject +ffffffff81e381b0 t gfx_v9_0_query_ras_error_count +ffffffff81e38d80 t gfx_v9_0_reset_ras_error_count +ffffffff81e397b0 T gfx_v9_0_select_se_sh +ffffffff81e39850 t gfx_v9_0_early_init +ffffffff81e3a380 t gfx_v9_0_late_init +ffffffff81e3b270 t gfx_v9_0_sw_init +ffffffff81e3b920 t gfx_v9_0_sw_fini +ffffffff81e3bae0 t gfx_v9_0_hw_init +ffffffff81e3ea90 t gfx_v9_0_hw_fini +ffffffff81e3f240 t gfx_v9_0_suspend +ffffffff81e3f280 t gfx_v9_0_resume +ffffffff81e3f290 t gfx_v9_0_is_idle +ffffffff81e3f310 t gfx_v9_0_wait_for_idle +ffffffff81e3f400 t gfx_v9_0_soft_reset +ffffffff81e3f7a0 t gfx_v9_0_set_clockgating_state +ffffffff81e3f870 t gfx_v9_0_set_powergating_state +ffffffff81e3fc60 t gfx_v9_0_get_clockgating_state +ffffffff81e3fd70 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e40500 t gfx_v9_0_read_wave_data +ffffffff81e40740 t gfx_v9_0_read_wave_vgprs +ffffffff81e407a0 t gfx_v9_0_read_wave_sgprs +ffffffff81e407d0 t gfx_v9_0_select_me_pipe_q +ffffffff81e407f0 t wave_read_ind +ffffffff81e408e0 t wave_read_regs +ffffffff81e40a30 t gfx_v9_0_kiq_set_resources +ffffffff81e40d50 t gfx_v9_0_kiq_map_queues +ffffffff81e41090 t gfx_v9_0_kiq_unmap_queues +ffffffff81e413c0 t gfx_v9_0_kiq_query_status +ffffffff81e416b0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e417d0 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e41800 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e41870 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e418d0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e41d00 t gfx_v9_0_ring_test_ring +ffffffff81e41f30 t gfx_v9_0_ring_emit_rreg +ffffffff81e421c0 t gfx_v9_0_ring_emit_wreg +ffffffff81e423f0 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e42440 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e424e0 t gfx_v9_0_wait_reg_mem +ffffffff81e42810 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e42840 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e42950 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e42a80 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e43100 t gfx_v9_0_ring_emit_fence +ffffffff81e434c0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e43520 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e43630 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e43700 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e437e0 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e43a10 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e43ad0 t gfx_v9_ring_emit_sb +ffffffff81e43bc0 t gfx_v9_ring_emit_cntxcntl +ffffffff81e440a0 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e441b0 t gfx_v9_0_ring_soft_recovery +ffffffff81e44220 t gfx_v9_0_ring_preempt_ib +ffffffff81e443e0 t gfx_v9_0_emit_mem_sync +ffffffff81e446a0 t gfx_v9_0_write_data_to_reg +ffffffff81e448b0 t gfx_v9_0_ring_test_ib +ffffffff81e44a60 t gfx_v9_0_ring_patch_cntl +ffffffff81e44aa0 t gfx_v9_0_ring_patch_ce_meta +ffffffff81e44ba0 t gfx_v9_0_ring_patch_de_meta +ffffffff81e44c70 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e44fa0 t gfx_v9_0_emit_wave_limit +ffffffff81e45180 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e45360 t gfx_v9_0_eop_irq +ffffffff81e454a0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e45660 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e457a0 t gfx_v9_0_priv_reg_irq +ffffffff81e458a0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e459e0 t gfx_v9_0_priv_inst_irq +ffffffff81e45ae0 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e46370 t gfx_v9_0_is_rlc_enabled +ffffffff81e46400 t gfx_v9_0_set_safe_mode +ffffffff81e46560 t gfx_v9_0_unset_safe_mode +ffffffff81e465d0 t gfx_v9_0_rlc_init +ffffffff81e46640 t gfx_v9_0_get_csb_size +ffffffff81e46670 t gfx_v9_0_get_csb_buffer +ffffffff81e467b0 t gfx_v9_0_cp_jump_table_num +ffffffff81e46800 t gfx_v9_0_rlc_resume +ffffffff81e47f10 t gfx_v9_0_rlc_stop +ffffffff81e482b0 t gfx_v9_0_rlc_reset +ffffffff81e48450 t gfx_v9_0_rlc_start +ffffffff81e485a0 t gfx_v9_0_update_spm_vmid +ffffffff81e485e0 t gfx_v9_0_is_rlcg_access_range +ffffffff81e48630 t gfx_v9_0_init_csb +ffffffff81e487c0 t gfx_v9_0_enable_lbpw +ffffffff81e488b0 t gfx_v9_0_update_spm_vmid_internal +ffffffff81e489d0 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e48c60 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e48d60 t gfx_v9_0_mec_init +ffffffff81e48f40 t gfx_v9_0_compute_ring_init +ffffffff81e49080 t gfx_v9_0_gpu_early_init +ffffffff81e494c0 t amdgpu_bo_unreserve +ffffffff81e495a0 t gfx_v9_0_cp_gfx_enable +ffffffff81e49690 t amdgpu_bo_reserve +ffffffff81e49800 t gfx_v9_0_kiq_init_register +ffffffff81e4a4e0 t gfx_v9_0_mqd_init +ffffffff81e4aa30 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e4af60 t gfx_v9_0_update_3d_clock_gating +ffffffff81e4b350 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e4c000 t gfx_v9_4_query_ras_error_count +ffffffff81e4ce00 t gfx_v9_4_query_ras_error_status +ffffffff81e4cfd0 t gfx_v9_4_reset_ras_error_count +ffffffff81e4e000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e4e720 T gfx_v9_4_2_init_golden_registers +ffffffff81e4e7b0 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e4e890 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e4ea70 t gfx_v9_4_2_query_ras_error_count +ffffffff81e4eb20 t gfx_v9_4_2_query_ras_error_status +ffffffff81e4f380 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e4f3e0 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e4f8b0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e4fad0 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e4fb50 t gfx_v9_4_2_run_shader +ffffffff81e4ff50 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e505a0 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e508e0 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e50ac0 t wave_read_ind +ffffffff81e51000 t gfx_v9_4_3_xcp_suspend +ffffffff81e510a0 t gfx_v9_4_3_xcp_resume +ffffffff81e511e0 t gfx_v9_4_3_query_ras_error_count +ffffffff81e51200 t gfx_v9_4_3_query_ras_error_status +ffffffff81e51220 t gfx_v9_4_3_reset_ras_error_count +ffffffff81e51240 t gfx_v9_4_3_reset_ras_error_status +ffffffff81e51260 t gfx_v9_4_3_enable_watchdog_timer +ffffffff81e51280 t gfx_v9_4_3_early_init +ffffffff81e51940 t gfx_v9_4_3_late_init +ffffffff81e519c0 t gfx_v9_4_3_sw_init +ffffffff81e51e20 t gfx_v9_4_3_sw_fini +ffffffff81e51fd0 t gfx_v9_4_3_hw_init +ffffffff81e52a70 t gfx_v9_4_3_hw_fini +ffffffff81e52b30 t gfx_v9_4_3_suspend +ffffffff81e52bf0 t gfx_v9_4_3_resume +ffffffff81e52c00 t gfx_v9_4_3_is_idle +ffffffff81e52db0 t gfx_v9_4_3_wait_for_idle +ffffffff81e52e40 t gfx_v9_4_3_soft_reset +ffffffff81e53550 t gfx_v9_4_3_set_clockgating_state +ffffffff81e536b0 t gfx_v9_4_3_set_powergating_state +ffffffff81e536e0 t gfx_v9_4_3_get_clockgating_state +ffffffff81e53850 t gfx_v9_4_3_kiq_set_resources +ffffffff81e53b70 t gfx_v9_4_3_kiq_map_queues +ffffffff81e53ed0 t gfx_v9_4_3_kiq_unmap_queues +ffffffff81e54250 t gfx_v9_4_3_kiq_query_status +ffffffff81e54540 t gfx_v9_4_3_kiq_invalidate_tlbs +ffffffff81e54660 t gfx_v9_4_3_ring_get_rptr_compute +ffffffff81e546a0 t gfx_v9_4_3_ring_get_wptr_compute +ffffffff81e54710 t gfx_v9_4_3_ring_set_wptr_compute +ffffffff81e54770 t gfx_v9_4_3_ring_emit_fence_kiq +ffffffff81e54bc0 t gfx_v9_4_3_ring_test_ring +ffffffff81e54e20 t gfx_v9_4_3_ring_emit_rreg +ffffffff81e550b0 t gfx_v9_4_3_ring_emit_wreg +ffffffff81e552e0 t gfx_v9_4_3_ring_emit_reg_wait +ffffffff81e55330 t gfx_v9_4_3_ring_emit_reg_write_reg_wait +ffffffff81e55350 t gfx_v9_4_3_wait_reg_mem +ffffffff81e55680 t gfx_v9_4_3_ring_emit_ib_compute +ffffffff81e559b0 t gfx_v9_4_3_ring_emit_fence +ffffffff81e55d60 t gfx_v9_4_3_ring_emit_pipeline_sync +ffffffff81e55dc0 t gfx_v9_4_3_ring_emit_vm_flush +ffffffff81e55de0 t gfx_v9_4_3_ring_emit_hdp_flush +ffffffff81e55eb0 t gfx_v9_4_3_ring_emit_gds_switch +ffffffff81e56050 t gfx_v9_4_3_ring_test_ib +ffffffff81e56200 t gfx_v9_4_3_emit_mem_sync +ffffffff81e564c0 t gfx_v9_4_3_emit_wave_limit +ffffffff81e566b0 t gfx_v9_4_3_write_data_to_reg +ffffffff81e568c0 t gfx_v9_4_3_set_eop_interrupt_state +ffffffff81e56a30 t gfx_v9_4_3_eop_irq +ffffffff81e56bd0 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state +ffffffff81e56d30 t gfx_v9_4_3_ih_to_xcc_inst +ffffffff81e56e00 t gfx_v9_4_3_set_priv_reg_fault_state +ffffffff81e571e0 t gfx_v9_4_3_priv_reg_irq +ffffffff81e57240 t gfx_v9_4_3_fault +ffffffff81e573c0 t gfx_v9_4_3_set_priv_inst_fault_state +ffffffff81e577a0 t gfx_v9_4_3_priv_inst_irq +ffffffff81e57800 t gfx_v9_4_3_is_rlc_enabled +ffffffff81e57920 t gfx_v9_4_3_xcc_set_safe_mode +ffffffff81e57bc0 t gfx_v9_4_3_xcc_unset_safe_mode +ffffffff81e57ce0 t gfx_v9_4_3_rlc_init +ffffffff81e57d30 t gfx_v9_4_3_rlc_resume +ffffffff81e57df0 t gfx_v9_4_3_rlc_stop +ffffffff81e57e90 t gfx_v9_4_3_rlc_reset +ffffffff81e58520 t gfx_v9_4_3_rlc_start +ffffffff81e585c0 t gfx_v9_4_3_update_spm_vmid +ffffffff81e587d0 t gfx_v9_4_3_is_rlcg_access_range +ffffffff81e58880 t gfx_v9_4_3_xcc_rlc_resume +ffffffff81e590d0 t gfx_v9_4_3_xcc_rlc_stop +ffffffff81e597f0 t gfx_v9_4_3_xcc_rlc_start +ffffffff81e59b80 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt +ffffffff81e59da0 t gfx_v9_4_3_xcc_select_se_sh +ffffffff81e59fa0 t gfx_v9_4_3_mec_init +ffffffff81e5a290 t gfx_v9_4_3_gpu_early_init +ffffffff81e5a4c0 t amdgpu_bo_unreserve +ffffffff81e5a5a0 t gfx_v9_4_3_get_gpu_clock_counter +ffffffff81e5a8e0 t gfx_v9_4_3_read_wave_data +ffffffff81e5abb0 t gfx_v9_4_3_read_wave_vgprs +ffffffff81e5abd0 t gfx_v9_4_3_read_wave_sgprs +ffffffff81e5ac20 t gfx_v9_4_3_select_me_pipe_q +ffffffff81e5ac90 t gfx_v9_4_3_switch_compute_partition +ffffffff81e5aff0 t wave_read_ind +ffffffff81e5b1f0 t wave_read_regs +ffffffff81e5b480 t gfx_v9_4_3_xcc_constants_init +ffffffff81e5c500 t gfx_v9_4_3_xcc_cp_resume +ffffffff81e5d4b0 t gfx_v9_4_3_xcc_cp_compute_enable +ffffffff81e5d650 t amdgpu_bo_reserve +ffffffff81e5d7c0 t gfx_v9_4_3_xcc_kiq_init_register +ffffffff81e5f400 t gfx_v9_4_3_xcc_mqd_init +ffffffff81e5fe40 t gfx_v9_4_3_xcc_fini +ffffffff81e603e0 t gfx_v9_4_3_xcc_q_fini_register +ffffffff81e60d90 t gfx_v9_4_3_xcc_update_sram_fgcg +ffffffff81e61000 t gfx_v9_4_3_xcc_update_repeater_fgcg +ffffffff81e61270 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating +ffffffff81e61dc0 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating +ffffffff81e62620 t gfx_v9_4_3_inst_query_ras_err_count +ffffffff81e62880 t gfx_v9_4_3_inst_query_ras_err_status +ffffffff81e63600 t gfx_v9_4_3_inst_reset_ras_err_count +ffffffff81e637c0 t gfx_v9_4_3_inst_reset_ras_err_status +ffffffff81e63f40 t gfx_v9_4_3_inst_enable_watchdog_timer +ffffffff81e65000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e65090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e651d0 t gfxhub_v1_0_gart_enable +ffffffff81e66700 t gfxhub_v1_0_gart_disable +ffffffff81e669a0 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e66aa0 t gfxhub_v1_0_init +ffffffff81e67000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e68000 t gfxhub_v1_2_get_mc_fb_offset +ffffffff81e68120 t gfxhub_v1_2_setup_vm_pt_regs +ffffffff81e68190 t gfxhub_v1_2_gart_enable +ffffffff81e68220 t gfxhub_v1_2_gart_disable +ffffffff81e68280 t gfxhub_v1_2_set_fault_enable_default +ffffffff81e682f0 t gfxhub_v1_2_init +ffffffff81e685f0 t gfxhub_v1_2_get_xgmi_info +ffffffff81e68860 t gfxhub_v1_2_xcp_suspend +ffffffff81e688a0 t gfxhub_v1_2_xcp_resume +ffffffff81e68910 t gfxhub_v1_2_xcc_setup_vm_pt_regs +ffffffff81e68c30 t gfxhub_v1_2_xcc_gart_enable +ffffffff81e6c070 t gfxhub_v1_2_xcc_gart_disable +ffffffff81e6c6e0 t gfxhub_v1_2_xcc_set_fault_enable_default +ffffffff81e6d000 t gfxhub_v2_0_get_fb_location +ffffffff81e6d090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e6d120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e6d260 t gfxhub_v2_0_gart_enable +ffffffff81e6e490 t gfxhub_v2_0_gart_disable +ffffffff81e6e6e0 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e6e7e0 t gfxhub_v2_0_init +ffffffff81e6e8b0 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e6ea80 t gfxhub_v2_0_get_invalidate_req +ffffffff81e6f000 t gfxhub_v2_1_get_fb_location +ffffffff81e6f090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e6f120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e6f260 t gfxhub_v2_1_gart_enable +ffffffff81e70560 t gfxhub_v2_1_gart_disable +ffffffff81e707b0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e708d0 t gfxhub_v2_1_init +ffffffff81e709a0 t gfxhub_v2_1_get_xgmi_info +ffffffff81e70ae0 t gfxhub_v2_1_utcl2_harvest +ffffffff81e70cc0 t gfxhub_v2_1_save_regs +ffffffff81e71730 t gfxhub_v2_1_restore_regs +ffffffff81e72350 t gfxhub_v2_1_halt +ffffffff81e72720 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e728f0 t gfxhub_v2_1_get_invalidate_req +ffffffff81e73000 t gfxhub_v3_0_get_fb_location +ffffffff81e73090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e73120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e73260 t gfxhub_v3_0_gart_enable +ffffffff81e74560 t gfxhub_v3_0_gart_disable +ffffffff81e74800 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e749d0 t gfxhub_v3_0_init +ffffffff81e74aa0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e74c70 t gfxhub_v3_0_get_invalidate_req +ffffffff81e75000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e75090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e75120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e75260 t gfxhub_v3_0_3_gart_enable +ffffffff81e76450 t gfxhub_v3_0_3_gart_disable +ffffffff81e766f0 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e76810 t gfxhub_v3_0_3_init +ffffffff81e768e0 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e76ab0 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e77000 t gmc_v10_0_early_init +ffffffff81e77170 t gmc_v10_0_late_init +ffffffff81e771e0 t gmc_v10_0_sw_init +ffffffff81e775d0 t gmc_v10_0_sw_fini +ffffffff81e77620 t gmc_v10_0_hw_init +ffffffff81e77830 t gmc_v10_0_hw_fini +ffffffff81e778f0 t gmc_v10_0_suspend +ffffffff81e77930 t gmc_v10_0_resume +ffffffff81e77990 t gmc_v10_0_is_idle +ffffffff81e779c0 t gmc_v10_0_wait_for_idle +ffffffff81e779f0 t gmc_v10_0_soft_reset +ffffffff81e77a20 t gmc_v10_0_set_clockgating_state +ffffffff81e77ad0 t gmc_v10_0_set_powergating_state +ffffffff81e77b00 t gmc_v10_0_get_clockgating_state +ffffffff81e77ba0 t gmc_v10_0_flush_gpu_tlb +ffffffff81e77e30 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e780e0 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e78290 t gmc_v10_0_emit_pasid_mapping +ffffffff81e78310 t gmc_v10_0_map_mtype +ffffffff81e78360 t gmc_v10_0_get_vm_pde +ffffffff81e78450 t gmc_v10_0_get_vm_pte +ffffffff81e78530 t gmc_v10_0_get_vbios_fb_size +ffffffff81e786a0 t gmc_v10_0_flush_vm_hub +ffffffff81e78ad0 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e78b70 t gmc_v10_0_process_interrupt +ffffffff81e78e50 t gmc_v10_0_ecc_interrupt_state +ffffffff81e78e80 t gmc_v10_0_gart_init +ffffffff81e79000 t gmc_v11_0_early_init +ffffffff81e791f0 t gmc_v11_0_late_init +ffffffff81e79260 t gmc_v11_0_sw_init +ffffffff81e79570 t gmc_v11_0_sw_fini +ffffffff81e795c0 t gmc_v11_0_hw_init +ffffffff81e79720 t gmc_v11_0_hw_fini +ffffffff81e797c0 t gmc_v11_0_suspend +ffffffff81e79860 t gmc_v11_0_resume +ffffffff81e798c0 t gmc_v11_0_is_idle +ffffffff81e798f0 t gmc_v11_0_wait_for_idle +ffffffff81e79920 t gmc_v11_0_soft_reset +ffffffff81e79950 t gmc_v11_0_set_clockgating_state +ffffffff81e799d0 t gmc_v11_0_set_powergating_state +ffffffff81e79a00 t gmc_v11_0_get_clockgating_state +ffffffff81e79a40 t gmc_v11_0_flush_gpu_tlb +ffffffff81e79ef0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e7a160 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e7a310 t gmc_v11_0_emit_pasid_mapping +ffffffff81e7a390 t gmc_v11_0_map_mtype +ffffffff81e7a3e0 t gmc_v11_0_get_vm_pde +ffffffff81e7a4e0 t gmc_v11_0_get_vm_pte +ffffffff81e7a5c0 t gmc_v11_0_get_vbios_fb_size +ffffffff81e7a730 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e7a7d0 t gmc_v11_0_process_interrupt +ffffffff81e7aa00 t gmc_v11_0_ecc_interrupt_state +ffffffff81e7aa30 t gmc_v11_0_gart_init +ffffffff81e7b000 t gmc_v7_0_early_init +ffffffff81e7b0a0 t gmc_v7_0_late_init +ffffffff81e7b0f0 t gmc_v7_0_sw_init +ffffffff81e7b520 t gmc_v7_0_sw_fini +ffffffff81e7b5a0 t gmc_v7_0_hw_init +ffffffff81e7bf10 t gmc_v7_0_hw_fini +ffffffff81e7bfd0 t gmc_v7_0_suspend +ffffffff81e7c010 t gmc_v7_0_resume +ffffffff81e7c070 t gmc_v7_0_is_idle +ffffffff81e7c0c0 t gmc_v7_0_wait_for_idle +ffffffff81e7c160 t gmc_v7_0_soft_reset +ffffffff81e7c3c0 t gmc_v7_0_set_clockgating_state +ffffffff81e7c620 t gmc_v7_0_set_powergating_state +ffffffff81e7c650 t gmc_v7_0_flush_gpu_tlb +ffffffff81e7c680 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e7c740 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e7c7e0 t gmc_v7_0_emit_pasid_mapping +ffffffff81e7c810 t gmc_v7_0_set_prt +ffffffff81e7c9d0 t gmc_v7_0_get_vm_pde +ffffffff81e7ca30 t gmc_v7_0_get_vm_pte +ffffffff81e7ca70 t gmc_v7_0_get_vbios_fb_size +ffffffff81e7cae0 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e7cbb0 t gmc_v7_0_process_interrupt +ffffffff81e7ce50 t gmc_v7_0_gart_init +ffffffff81e7d000 t gmc_v8_0_early_init +ffffffff81e7d0a0 t gmc_v8_0_late_init +ffffffff81e7d0f0 t gmc_v8_0_sw_init +ffffffff81e7d6a0 t gmc_v8_0_sw_fini +ffffffff81e7d720 t gmc_v8_0_hw_init +ffffffff81e7e390 t gmc_v8_0_hw_fini +ffffffff81e7e450 t gmc_v8_0_suspend +ffffffff81e7e490 t gmc_v8_0_resume +ffffffff81e7e4f0 t gmc_v8_0_is_idle +ffffffff81e7e540 t gmc_v8_0_wait_for_idle +ffffffff81e7e5e0 t gmc_v8_0_check_soft_reset +ffffffff81e7e650 t gmc_v8_0_pre_soft_reset +ffffffff81e7e7c0 t gmc_v8_0_soft_reset +ffffffff81e7e890 t gmc_v8_0_post_soft_reset +ffffffff81e7e900 t gmc_v8_0_set_clockgating_state +ffffffff81e7eec0 t gmc_v8_0_set_powergating_state +ffffffff81e7eef0 t gmc_v8_0_get_clockgating_state +ffffffff81e7ef60 t gmc_v8_0_flush_gpu_tlb +ffffffff81e7ef90 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e7f050 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e7f0f0 t gmc_v8_0_emit_pasid_mapping +ffffffff81e7f120 t gmc_v8_0_set_prt +ffffffff81e7f2e0 t gmc_v8_0_get_vm_pde +ffffffff81e7f340 t gmc_v8_0_get_vm_pte +ffffffff81e7f390 t gmc_v8_0_get_vbios_fb_size +ffffffff81e7f400 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e7f4d0 t gmc_v8_0_process_interrupt +ffffffff81e7f860 t gmc_v8_0_gart_init +ffffffff81e80000 T gmc_v9_0_restore_registers +ffffffff81e80160 t gmc_v9_0_early_init +ffffffff81e80510 t gmc_v9_0_late_init +ffffffff81e80620 t gmc_v9_0_sw_init +ffffffff81e80d80 t gmc_v9_0_sw_fini +ffffffff81e80e40 t gmc_v9_0_hw_init +ffffffff81e812f0 t gmc_v9_0_hw_fini +ffffffff81e813d0 t gmc_v9_0_suspend +ffffffff81e81410 t gmc_v9_0_resume +ffffffff81e81470 t gmc_v9_0_is_idle +ffffffff81e814a0 t gmc_v9_0_wait_for_idle +ffffffff81e814d0 t gmc_v9_0_soft_reset +ffffffff81e81500 t gmc_v9_0_set_clockgating_state +ffffffff81e81560 t gmc_v9_0_set_powergating_state +ffffffff81e81590 t gmc_v9_0_get_clockgating_state +ffffffff81e815d0 t gmc_v9_0_flush_gpu_tlb +ffffffff81e81c70 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e82020 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e82220 t gmc_v9_0_emit_pasid_mapping +ffffffff81e822a0 t gmc_v9_0_map_mtype +ffffffff81e822e0 t gmc_v9_0_get_vm_pde +ffffffff81e823e0 t gmc_v9_0_get_vm_pte +ffffffff81e82710 t gmc_v9_0_override_vm_pte_flags +ffffffff81e827d0 t gmc_v9_0_get_vbios_fb_size +ffffffff81e82970 t gmc_v9_0_query_memory_partition +ffffffff81e829d0 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e82e70 t gmc_v9_0_process_interrupt +ffffffff81e83670 t gmc_v9_0_ecc_interrupt_state +ffffffff81e837d0 t gmc_v9_0_init_mem_ranges +ffffffff81e83bf0 t gmc_v9_0_gart_init +ffffffff81e83d20 t gmc_v9_0_save_registers +ffffffff81e84000 t hdp_v4_0_query_ras_error_count +ffffffff81e840c0 t hdp_v4_0_reset_ras_error_count +ffffffff81e841e0 t hdp_v4_0_flush_hdp +ffffffff81e84230 t hdp_v4_0_invalidate_hdp +ffffffff81e84310 t hdp_v4_0_update_clock_gating +ffffffff81e84410 t hdp_v4_0_get_clockgating_state +ffffffff81e84460 t hdp_v4_0_init_registers +ffffffff81e85000 t hdp_v5_0_flush_hdp +ffffffff81e85050 t hdp_v5_0_invalidate_hdp +ffffffff81e850f0 t hdp_v5_0_update_clock_gating +ffffffff81e854f0 t hdp_v5_0_get_clockgating_state +ffffffff81e85610 t hdp_v5_0_init_registers +ffffffff81e86000 t hdp_v5_2_flush_hdp +ffffffff81e86050 t hdp_v5_2_update_clock_gating +ffffffff81e86460 t hdp_v5_2_get_clockgating_state +ffffffff81e87000 t hdp_v6_0_flush_hdp +ffffffff81e87050 t hdp_v6_0_update_clock_gating +ffffffff81e87380 t hdp_v6_0_get_clockgating_state +ffffffff81e88000 t iceland_ih_early_init +ffffffff81e88050 t iceland_ih_sw_init +ffffffff81e880b0 t iceland_ih_sw_fini +ffffffff81e880f0 t iceland_ih_hw_init +ffffffff81e88310 t iceland_ih_hw_fini +ffffffff81e883e0 t iceland_ih_suspend +ffffffff81e884b0 t iceland_ih_resume +ffffffff81e884f0 t iceland_ih_is_idle +ffffffff81e88540 t iceland_ih_wait_for_idle +ffffffff81e885e0 t iceland_ih_soft_reset +ffffffff81e886c0 t iceland_ih_set_clockgating_state +ffffffff81e886f0 t iceland_ih_set_powergating_state +ffffffff81e88720 t iceland_ih_get_wptr +ffffffff81e88810 t iceland_ih_decode_iv +ffffffff81e88890 t iceland_ih_set_rptr +ffffffff81e89000 t ih_v6_0_early_init +ffffffff81e89050 t ih_v6_0_sw_init +ffffffff81e891b0 t ih_v6_0_sw_fini +ffffffff81e891f0 t ih_v6_0_hw_init +ffffffff81e897a0 t ih_v6_0_hw_fini +ffffffff81e89800 t ih_v6_0_suspend +ffffffff81e89860 t ih_v6_0_resume +ffffffff81e89870 t ih_v6_0_is_idle +ffffffff81e898a0 t ih_v6_0_wait_for_idle +ffffffff81e898d0 t ih_v6_0_soft_reset +ffffffff81e89900 t ih_v6_0_set_clockgating_state +ffffffff81e89a30 t ih_v6_0_set_powergating_state +ffffffff81e89bb0 t ih_v6_0_get_clockgating_state +ffffffff81e89c40 t ih_v6_0_get_wptr +ffffffff81e89d30 t ih_v6_0_set_rptr +ffffffff81e89e00 t ih_v6_0_self_irq +ffffffff81e89e70 t ih_v6_0_toggle_interrupts +ffffffff81e8a050 t force_update_wptr_for_self_int +ffffffff81e8b000 t ih_v6_1_early_init +ffffffff81e8b050 t ih_v6_1_sw_init +ffffffff81e8b1b0 t ih_v6_1_sw_fini +ffffffff81e8b1f0 t ih_v6_1_hw_init +ffffffff81e8b7a0 t ih_v6_1_hw_fini +ffffffff81e8b800 t ih_v6_1_suspend +ffffffff81e8b860 t ih_v6_1_resume +ffffffff81e8b870 t ih_v6_1_is_idle +ffffffff81e8b8a0 t ih_v6_1_wait_for_idle +ffffffff81e8b8d0 t ih_v6_1_soft_reset +ffffffff81e8b900 t ih_v6_1_set_clockgating_state +ffffffff81e8ba30 t ih_v6_1_set_powergating_state +ffffffff81e8bbb0 t ih_v6_1_get_clockgating_state +ffffffff81e8bc40 t ih_v6_1_get_wptr +ffffffff81e8bd30 t ih_v6_1_set_rptr +ffffffff81e8be00 t ih_v6_1_self_irq +ffffffff81e8be70 t ih_v6_1_toggle_interrupts +ffffffff81e8c050 t force_update_wptr_for_self_int +ffffffff81e8d000 t imu_v11_0_init_microcode +ffffffff81e8d170 t imu_v11_0_load_microcode +ffffffff81e8d4f0 t imu_v11_0_setup +ffffffff81e8d780 t imu_v11_0_start +ffffffff81e8d880 t imu_v11_0_program_rlc_ram +ffffffff81e8da40 t imu_v11_0_wait_for_reset_status +ffffffff81e8db90 t program_imu_rlc_ram +ffffffff81e8e000 T imu_v11_0_3_program_rlc_ram +ffffffff81e8f000 T jpeg_v1_0_early_init +ffffffff81e8f080 T jpeg_v1_0_sw_init +ffffffff81e8f170 T jpeg_v1_0_sw_fini +ffffffff81e8f190 T jpeg_v1_0_start +ffffffff81e8fc40 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e8fcd0 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e8fd60 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e8fdd0 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e906f0 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e91030 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e910a0 t jpeg_v1_0_decode_ring_nop +ffffffff81e91200 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e913c0 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e91580 t jpeg_v1_0_ring_begin_use +ffffffff81e91680 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e918e0 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e91d00 t jpeg_v1_0_set_interrupt_state +ffffffff81e91d30 t jpeg_v1_0_process_interrupt +ffffffff81e92000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e921a0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e92340 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e92a20 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e931d0 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e93580 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e935f0 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e93830 T jpeg_v2_0_dec_ring_nop +ffffffff81e93990 t jpeg_v2_0_early_init +ffffffff81e93a20 t jpeg_v2_0_sw_init +ffffffff81e93b50 t jpeg_v2_0_sw_fini +ffffffff81e93ba0 t jpeg_v2_0_hw_init +ffffffff81e93c20 t jpeg_v2_0_hw_fini +ffffffff81e93d00 t jpeg_v2_0_suspend +ffffffff81e93d30 t jpeg_v2_0_resume +ffffffff81e93dc0 t jpeg_v2_0_is_idle +ffffffff81e93e50 t jpeg_v2_0_wait_for_idle +ffffffff81e93e90 t jpeg_v2_0_set_clockgating_state +ffffffff81e93f40 t jpeg_v2_0_set_powergating_state +ffffffff81e94660 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e946f0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e94790 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e94830 t jpeg_v2_0_set_interrupt_state +ffffffff81e94860 t jpeg_v2_0_process_interrupt +ffffffff81e948f0 t jpeg_v2_0_enable_clock_gating +ffffffff81e94aa0 t jpeg_v2_0_disable_clock_gating +ffffffff81e95000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e95150 t jpeg_v2_5_early_init +ffffffff81e95350 t jpeg_v2_5_sw_init +ffffffff81e955f0 t jpeg_v2_5_sw_fini +ffffffff81e95640 t jpeg_v2_5_hw_init +ffffffff81e95730 t jpeg_v2_5_hw_fini +ffffffff81e958b0 t jpeg_v2_5_suspend +ffffffff81e958e0 t jpeg_v2_5_resume +ffffffff81e959e0 t jpeg_v2_5_is_idle +ffffffff81e95ae0 t jpeg_v2_5_wait_for_idle +ffffffff81e95b90 t jpeg_v2_5_set_clockgating_state +ffffffff81e95c40 t jpeg_v2_5_set_powergating_state +ffffffff81e96370 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e96410 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e964c0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e96570 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e96730 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e968f0 t jpeg_v2_5_set_interrupt_state +ffffffff81e96920 t jpeg_v2_5_process_interrupt +ffffffff81e969e0 t jpeg_v2_6_set_ras_interrupt_state +ffffffff81e96a10 t jpeg_v2_5_enable_clock_gating +ffffffff81e96af0 t jpeg_v2_5_disable_clock_gating +ffffffff81e97000 t jpeg_v3_0_early_init +ffffffff81e97110 t jpeg_v3_0_sw_init +ffffffff81e97240 t jpeg_v3_0_sw_fini +ffffffff81e97290 t jpeg_v3_0_hw_init +ffffffff81e97310 t jpeg_v3_0_hw_fini +ffffffff81e973f0 t jpeg_v3_0_suspend +ffffffff81e97420 t jpeg_v3_0_resume +ffffffff81e974b0 t jpeg_v3_0_is_idle +ffffffff81e97540 t jpeg_v3_0_wait_for_idle +ffffffff81e97580 t jpeg_v3_0_set_clockgating_state +ffffffff81e97630 t jpeg_v3_0_set_powergating_state +ffffffff81e97e10 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e97ea0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e97f40 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e97fe0 t jpeg_v3_0_set_interrupt_state +ffffffff81e98010 t jpeg_v3_0_process_interrupt +ffffffff81e980a0 t jpeg_v3_0_enable_clock_gating +ffffffff81e98170 t jpeg_v3_0_disable_clock_gating +ffffffff81e99000 t jpeg_v4_0_query_ras_poison_status +ffffffff81e99150 t jpeg_v4_0_early_init +ffffffff81e99220 t jpeg_v4_0_sw_init +ffffffff81e993c0 t jpeg_v4_0_sw_fini +ffffffff81e99410 t jpeg_v4_0_hw_init +ffffffff81e99a40 t jpeg_v4_0_hw_fini +ffffffff81e99b10 t jpeg_v4_0_suspend +ffffffff81e99b40 t jpeg_v4_0_resume +ffffffff81e99b90 t jpeg_v4_0_is_idle +ffffffff81e99c20 t jpeg_v4_0_wait_for_idle +ffffffff81e99c60 t jpeg_v4_0_set_clockgating_state +ffffffff81e99d10 t jpeg_v4_0_set_powergating_state +ffffffff81e9a470 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81e9a500 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81e9a5a0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81e9a640 t jpeg_v4_0_set_interrupt_state +ffffffff81e9a670 t jpeg_v4_0_process_interrupt +ffffffff81e9a710 t jpeg_v4_0_set_ras_interrupt_state +ffffffff81e9a740 t jpeg_v4_0_enable_clock_gating +ffffffff81e9a900 t jpeg_v4_0_disable_clock_gating +ffffffff81e9b000 t jpeg_v4_0_3_early_init +ffffffff81e9b170 t jpeg_v4_0_3_sw_init +ffffffff81e9b4a0 t jpeg_v4_0_3_sw_fini +ffffffff81e9b4f0 t jpeg_v4_0_3_hw_init +ffffffff81e9bf50 t jpeg_v4_0_3_hw_fini +ffffffff81e9bfe0 t jpeg_v4_0_3_suspend +ffffffff81e9c060 t jpeg_v4_0_3_resume +ffffffff81e9c0b0 t jpeg_v4_0_3_is_idle +ffffffff81e9c290 t jpeg_v4_0_3_wait_for_idle +ffffffff81e9c3e0 t jpeg_v4_0_3_set_clockgating_state +ffffffff81e9c470 t jpeg_v4_0_3_set_powergating_state +ffffffff81e9d0d0 t jpeg_v4_0_3_dec_ring_get_rptr +ffffffff81e9d240 t jpeg_v4_0_3_dec_ring_get_wptr +ffffffff81e9d3d0 t jpeg_v4_0_3_dec_ring_set_wptr +ffffffff81e9d570 t jpeg_v4_0_3_dec_ring_emit_ib +ffffffff81e9ddd0 t jpeg_v4_0_3_dec_ring_emit_fence +ffffffff81e9e560 t jpeg_v4_0_3_dec_ring_emit_vm_flush +ffffffff81e9e5d0 t jpeg_v4_0_3_dec_ring_nop +ffffffff81e9e730 t jpeg_v4_0_3_dec_ring_insert_start +ffffffff81e9e8d0 t jpeg_v4_0_3_dec_ring_insert_end +ffffffff81e9ea70 t jpeg_v4_0_3_dec_ring_emit_wreg +ffffffff81e9ecb0 t jpeg_v4_0_3_dec_ring_emit_reg_wait +ffffffff81e9f060 t jpeg_v4_0_3_set_interrupt_state +ffffffff81e9f090 t jpeg_v4_0_3_process_interrupt +ffffffff81e9f2d0 t jpeg_v4_0_3_query_ras_error_count +ffffffff81e9f3c0 t jpeg_v4_0_3_reset_ras_error_count +ffffffff81e9f4b0 t jpeg_v4_0_3_disable_clock_gating +ffffffff81ea0000 t lsdma_v6_0_copy_mem +ffffffff81ea0370 t lsdma_v6_0_fill_mem +ffffffff81ea0660 t lsdma_v6_0_update_memory_power_gating +ffffffff81ea1000 t mca_v3_0_ras_block_match +ffffffff81ea1050 t mca_v3_0_mp0_query_ras_error_count +ffffffff81ea1070 t mca_v3_0_mp1_query_ras_error_count +ffffffff81ea1090 t mca_v3_0_mpio_query_ras_error_count +ffffffff81ea2000 t mes_v10_0_early_init +ffffffff81ea2060 t mes_v10_0_late_init +ffffffff81ea20b0 t mes_v10_1_sw_init +ffffffff81ea2550 t mes_v10_1_sw_fini +ffffffff81ea2670 t mes_v10_1_hw_init +ffffffff81ea2f60 t mes_v10_1_hw_fini +ffffffff81ea3050 t mes_v10_1_suspend +ffffffff81ea3160 t mes_v10_1_resume +ffffffff81ea31b0 t mes_v10_1_kiq_hw_init +ffffffff81ea35c0 t mes_v10_1_add_hw_queue +ffffffff81ea3740 t mes_v10_1_remove_hw_queue +ffffffff81ea37d0 t mes_v10_1_unmap_legacy_queue +ffffffff81ea38c0 t mes_v10_1_suspend_gang +ffffffff81ea38f0 t mes_v10_1_resume_gang +ffffffff81ea3920 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81ea3b20 t mes_v10_1_load_microcode +ffffffff81ea4340 t mes_v10_1_enable +ffffffff81ea47c0 t mes_v10_1_queue_init +ffffffff81ea4a60 t amdgpu_bo_unreserve +ffffffff81ea4b40 t mes_v10_1_ring_get_rptr +ffffffff81ea4b70 t mes_v10_1_ring_get_wptr +ffffffff81ea4be0 t mes_v10_1_ring_set_wptr +ffffffff81ea5000 t mes_v11_0_early_init +ffffffff81ea5060 t mes_v11_0_late_init +ffffffff81ea50d0 t mes_v11_0_sw_init +ffffffff81ea5570 t mes_v11_0_sw_fini +ffffffff81ea5730 t mes_v11_0_hw_init +ffffffff81ea5f60 t mes_v11_0_hw_fini +ffffffff81ea5f90 t mes_v11_0_suspend +ffffffff81ea5fa0 t mes_v11_0_resume +ffffffff81ea5ff0 t mes_v11_0_kiq_hw_init +ffffffff81ea6200 t mes_v11_0_kiq_hw_fini +ffffffff81ea6340 t mes_v11_0_add_hw_queue +ffffffff81ea6540 t mes_v11_0_remove_hw_queue +ffffffff81ea65d0 t mes_v11_0_unmap_legacy_queue +ffffffff81ea66d0 t mes_v11_0_suspend_gang +ffffffff81ea6700 t mes_v11_0_resume_gang +ffffffff81ea6730 t mes_v11_0_misc_op +ffffffff81ea68f0 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff81ea6b10 t mes_v11_0_load_microcode +ffffffff81ea72a0 t mes_v11_0_enable +ffffffff81ea77b0 t mes_v11_0_queue_init +ffffffff81ea8250 t amdgpu_bo_unreserve +ffffffff81ea8330 t mes_v11_0_mqd_init +ffffffff81ea8520 t mes_v11_0_kiq_dequeue +ffffffff81ea8960 t mes_v11_0_ring_get_rptr +ffffffff81ea8990 t mes_v11_0_ring_get_wptr +ffffffff81ea8a00 t mes_v11_0_ring_set_wptr +ffffffff81ea9000 t mmhub_v1_0_query_ras_error_count +ffffffff81ea9150 t mmhub_v1_0_reset_ras_error_count +ffffffff81ea9200 t mmhub_v1_0_get_fb_location +ffffffff81ea9320 t mmhub_v1_0_init +ffffffff81ea93d0 t mmhub_v1_0_gart_enable +ffffffff81eaa710 t mmhub_v1_0_set_fault_enable_default +ffffffff81eaa830 t mmhub_v1_0_gart_disable +ffffffff81eaaad0 t mmhub_v1_0_set_clockgating +ffffffff81eaaf60 t mmhub_v1_0_get_clockgating +ffffffff81eab080 t mmhub_v1_0_setup_vm_pt_regs +ffffffff81eab1c0 t mmhub_v1_0_update_power_gating +ffffffff81eac000 t mmhub_v1_7_query_ras_error_count +ffffffff81eac150 t mmhub_v1_7_query_ras_error_status +ffffffff81eac230 t mmhub_v1_7_reset_ras_error_count +ffffffff81eac2d0 t mmhub_v1_7_reset_ras_error_status +ffffffff81eac3d0 t mmhub_v1_7_get_fb_location +ffffffff81eac4f0 t mmhub_v1_7_init +ffffffff81eac590 t mmhub_v1_7_gart_enable +ffffffff81eadaa0 t mmhub_v1_7_set_fault_enable_default +ffffffff81eadbc0 t mmhub_v1_7_gart_disable +ffffffff81eade60 t mmhub_v1_7_set_clockgating +ffffffff81eae200 t mmhub_v1_7_get_clockgating +ffffffff81eae320 t mmhub_v1_7_setup_vm_pt_regs +ffffffff81eaf000 t mmhub_v1_8_get_fb_location +ffffffff81eaf120 t mmhub_v1_8_init +ffffffff81eaf280 t mmhub_v1_8_gart_enable +ffffffff81eb0e90 t mmhub_v1_8_set_fault_enable_default +ffffffff81eb1060 t mmhub_v1_8_gart_disable +ffffffff81eb13a0 t mmhub_v1_8_set_clockgating +ffffffff81eb13d0 t mmhub_v1_8_get_clockgating +ffffffff81eb1400 t mmhub_v1_8_setup_vm_pt_regs +ffffffff81eb1610 t mmhub_v1_8_query_ras_error_count +ffffffff81eb1770 t mmhub_v1_8_query_ras_error_status +ffffffff81eb1a20 t mmhub_v1_8_reset_ras_error_count +ffffffff81eb1b30 t mmhub_v1_8_reset_ras_error_status +ffffffff81eb3000 t mmhub_v2_0_init +ffffffff81eb30d0 t mmhub_v2_0_gart_enable +ffffffff81eb4290 t mmhub_v2_0_set_fault_enable_default +ffffffff81eb43b0 t mmhub_v2_0_gart_disable +ffffffff81eb4640 t mmhub_v2_0_set_clockgating +ffffffff81eb4990 t mmhub_v2_0_get_clockgating +ffffffff81eb4b20 t mmhub_v2_0_setup_vm_pt_regs +ffffffff81eb4c60 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff81eb4eb0 t mmhub_v2_0_get_invalidate_req +ffffffff81eb5000 t mmhub_v2_3_init +ffffffff81eb50e0 t mmhub_v2_3_gart_enable +ffffffff81eb64b0 t mmhub_v2_3_set_fault_enable_default +ffffffff81eb65b0 t mmhub_v2_3_gart_disable +ffffffff81eb6850 t mmhub_v2_3_set_clockgating +ffffffff81eb6cf0 t mmhub_v2_3_get_clockgating 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mmhub_v3_0_1_set_clockgating +ffffffff81ebba50 t mmhub_v3_0_1_get_clockgating +ffffffff81ebbb00 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff81ebbc40 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff81ebbe40 t mmhub_v3_0_1_get_invalidate_req +ffffffff81ebc000 t mmhub_v3_0_2_get_fb_location +ffffffff81ebc090 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff81ebc120 t mmhub_v3_0_2_init +ffffffff81ebc1f0 t mmhub_v3_0_2_gart_enable +ffffffff81ebd3e0 t mmhub_v3_0_2_set_fault_enable_default +ffffffff81ebd500 t mmhub_v3_0_2_gart_disable +ffffffff81ebd790 t mmhub_v3_0_2_set_clockgating +ffffffff81ebd7c0 t mmhub_v3_0_2_get_clockgating +ffffffff81ebd7f0 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff81ebd930 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff81ebdb10 t mmhub_v3_0_2_get_invalidate_req +ffffffff81ebe000 t mmhub_v9_4_query_ras_error_count +ffffffff81ebe150 t mmhub_v9_4_query_ras_error_status +ffffffff81ebe230 t mmhub_v9_4_reset_ras_error_count +ffffffff81ebe300 t mmhub_v9_4_get_fb_location +ffffffff81ebe420 t mmhub_v9_4_init +ffffffff81ebe570 t mmhub_v9_4_gart_enable +ffffffff81ebfa00 t mmhub_v9_4_set_fault_enable_default +ffffffff81ebfbf0 t mmhub_v9_4_gart_disable +ffffffff81ebff60 t mmhub_v9_4_set_clockgating +ffffffff81ec0440 t mmhub_v9_4_get_clockgating +ffffffff81ec0570 t mmhub_v9_4_setup_vm_pt_regs +ffffffff81ec05c0 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff81ec1000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff81ec1050 T xgpu_ai_mailbox_add_irq_id +ffffffff81ec10e0 T xgpu_ai_mailbox_get_irq +ffffffff81ec1190 t xgpu_ai_mailbox_flr_work +ffffffff81ec1390 T xgpu_ai_mailbox_put_irq +ffffffff81ec13d0 t xgpu_ai_request_full_gpu_access +ffffffff81ec13f0 t xgpu_ai_release_full_gpu_access +ffffffff81ec1410 t xgpu_ai_request_init_data +ffffffff81ec1470 t xgpu_ai_request_reset +ffffffff81ec1520 t xgpu_ai_mailbox_trans_msg +ffffffff81ec1740 t xgpu_ai_ras_poison_handler +ffffffff81ec1770 t xgpu_ai_set_mailbox_ack_irq +ffffffff81ec1800 t xgpu_ai_mailbox_ack_irq +ffffffff81ec1850 t xgpu_ai_set_mailbox_rcv_irq +ffffffff81ec18e0 t xgpu_ai_mailbox_rcv_irq +ffffffff81ec19c0 t xgpu_ai_send_access_requests +ffffffff81ec1ab0 t xgpu_ai_poll_msg +ffffffff81ec2000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81ec2050 T xgpu_nv_mailbox_add_irq_id +ffffffff81ec20e0 T xgpu_nv_mailbox_get_irq +ffffffff81ec2190 t xgpu_nv_mailbox_flr_work +ffffffff81ec23b0 T xgpu_nv_mailbox_put_irq +ffffffff81ec23f0 t xgpu_nv_request_full_gpu_access +ffffffff81ec2410 t xgpu_nv_release_full_gpu_access +ffffffff81ec2430 t xgpu_nv_request_init_data +ffffffff81ec2450 t xgpu_nv_request_reset +ffffffff81ec2550 t xgpu_nv_mailbox_trans_msg +ffffffff81ec26f0 t xgpu_nv_ras_poison_handler +ffffffff81ec2710 t xgpu_nv_set_mailbox_ack_irq +ffffffff81ec2790 t xgpu_nv_mailbox_ack_irq +ffffffff81ec27e0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81ec2860 t xgpu_nv_mailbox_rcv_irq +ffffffff81ec2910 t xgpu_nv_send_access_requests +ffffffff81ec3000 T xgpu_vi_init_golden_registers +ffffffff81ec30c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81ec3110 T xgpu_vi_mailbox_add_irq_id +ffffffff81ec31a0 T xgpu_vi_mailbox_get_irq +ffffffff81ec3250 t xgpu_vi_mailbox_flr_work +ffffffff81ec33a0 T xgpu_vi_mailbox_put_irq +ffffffff81ec33e0 t xgpu_vi_request_full_gpu_access +ffffffff81ec3400 t xgpu_vi_release_full_gpu_access +ffffffff81ec3420 t xgpu_vi_request_reset +ffffffff81ec3440 t xgpu_vi_wait_reset_cmpl +ffffffff81ec3520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81ec35a0 t xgpu_vi_mailbox_ack_irq +ffffffff81ec35f0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81ec3670 t xgpu_vi_mailbox_rcv_irq +ffffffff81ec3720 t xgpu_vi_mailbox_rcv_msg +ffffffff81ec3840 t xgpu_vi_send_access_requests +ffffffff81ec4000 t navi10_ih_early_init +ffffffff81ec4060 t navi10_ih_sw_init +ffffffff81ec41d0 t navi10_ih_sw_fini +ffffffff81ec4210 t navi10_ih_hw_init +ffffffff81ec4630 t navi10_ih_hw_fini +ffffffff81ec4690 t navi10_ih_suspend +ffffffff81ec46f0 t navi10_ih_resume +ffffffff81ec4700 t navi10_ih_is_idle +ffffffff81ec4730 t navi10_ih_wait_for_idle +ffffffff81ec4760 t navi10_ih_soft_reset +ffffffff81ec4790 t navi10_ih_set_clockgating_state +ffffffff81ec48c0 t navi10_ih_set_powergating_state +ffffffff81ec48f0 t navi10_ih_get_clockgating_state +ffffffff81ec4980 t navi10_ih_get_wptr +ffffffff81ec4a90 t navi10_ih_set_rptr +ffffffff81ec4b60 t navi10_ih_self_irq +ffffffff81ec4be0 t navi10_ih_toggle_interrupts +ffffffff81ec4d50 t force_update_wptr_for_self_int +ffffffff81ec6000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff81ec6040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff81ec6080 t nbio_v2_3_get_pcie_index_offset +ffffffff81ec60c0 t nbio_v2_3_get_pcie_data_offset +ffffffff81ec6100 t nbio_v2_3_get_rev_id +ffffffff81ec6160 t nbio_v2_3_mc_access_enable +ffffffff81ec6210 t nbio_v2_3_get_memsize +ffffffff81ec6280 t nbio_v2_3_sdma_doorbell_range +ffffffff81ec6320 t nbio_v2_3_vcn_doorbell_range +ffffffff81ec63a0 t nbio_v2_3_enable_doorbell_aperture +ffffffff81ec64a0 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff81ec6610 t nbio_v2_3_ih_doorbell_range +ffffffff81ec6730 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff81ec67d0 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff81ec6870 t nbio_v2_3_get_clockgating_state +ffffffff81ec68f0 t nbio_v2_3_ih_control +ffffffff81ec6a40 t nbio_v2_3_init_registers +ffffffff81ec6ad0 t nbio_v2_3_remap_hdp_registers +ffffffff81ec6be0 t nbio_v2_3_enable_aspm +ffffffff81ec6c80 t nbio_v2_3_program_aspm +ffffffff81ec7330 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff81ec73c0 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff81ec7430 t nbio_v2_3_clear_doorbell_interrupt +ffffffff81ec8000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff81ec8040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff81ec8080 t nbio_v4_3_get_pcie_index_offset +ffffffff81ec80b0 t nbio_v4_3_get_pcie_data_offset +ffffffff81ec80f0 t nbio_v4_3_get_rev_id +ffffffff81ec8180 t nbio_v4_3_mc_access_enable +ffffffff81ec8230 t nbio_v4_3_get_memsize +ffffffff81ec82a0 t nbio_v4_3_sdma_doorbell_range +ffffffff81ec8410 t nbio_v4_3_vcn_doorbell_range +ffffffff81ec85c0 t nbio_v4_3_gc_doorbell_init +ffffffff81ec86b0 t nbio_v4_3_enable_doorbell_aperture +ffffffff81ec87b0 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81ec8920 t nbio_v4_3_ih_doorbell_range +ffffffff81ec8a40 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81ec8b80 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81ec8cb0 t nbio_v4_3_get_clockgating_state +ffffffff81ec8dc0 t nbio_v4_3_ih_control +ffffffff81ec8f10 t nbio_v4_3_init_registers +ffffffff81ec9040 t nbio_v4_3_remap_hdp_registers +ffffffff81ec9150 t nbio_v4_3_program_aspm +ffffffff81ec9e50 t nbio_v4_3_get_rom_offset +ffffffff81ec9ee0 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81ec9f10 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81ec9f40 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81ec9f70 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81ec9fa0 t nbio_v4_3_handle_ras_err_event_athub_intr_no_bifring +ffffffff81eca0b0 t nbio_v4_3_init_ras_err_event_athub_interrupt +ffffffff81eca0f0 t nbio_v4_3_set_ras_err_event_athub_irq_state +ffffffff81eca200 t nbio_v4_3_process_err_event_athub_irq +ffffffff81ecb000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81ecb040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81ecb080 t nbio_v6_1_get_pcie_index_offset +ffffffff81ecb0c0 t nbio_v6_1_get_pcie_data_offset +ffffffff81ecb100 t nbio_v6_1_get_rev_id +ffffffff81ecb190 t nbio_v6_1_mc_access_enable +ffffffff81ecb240 t nbio_v6_1_get_memsize +ffffffff81ecb2b0 t nbio_v6_1_sdma_doorbell_range +ffffffff81ecb340 t nbio_v6_1_enable_doorbell_aperture +ffffffff81ecb440 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff81ecb5b0 t nbio_v6_1_ih_doorbell_range +ffffffff81ecb6d0 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff81ecb770 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff81ecb810 t nbio_v6_1_get_clockgating_state +ffffffff81ecb890 t nbio_v6_1_ih_control +ffffffff81ecb9e0 t nbio_v6_1_init_registers +ffffffff81ecbab0 t nbio_v6_1_remap_hdp_registers +ffffffff81ecbbc0 t nbio_v6_1_program_aspm +ffffffff81ecc000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff81ecc040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff81ecc080 t nbio_v7_0_get_pcie_index_offset +ffffffff81ecc0c0 t nbio_v7_0_get_pcie_data_offset +ffffffff81ecc100 t nbio_v7_0_get_rev_id +ffffffff81ecc190 t nbio_v7_0_mc_access_enable +ffffffff81ecc240 t nbio_v7_0_get_memsize +ffffffff81ecc2b0 t nbio_v7_0_sdma_doorbell_range +ffffffff81ecc340 t nbio_v7_0_vcn_doorbell_range +ffffffff81ecc3c0 t nbio_v7_0_enable_doorbell_aperture +ffffffff81ecc4c0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff81ecc4f0 t nbio_v7_0_ih_doorbell_range +ffffffff81ecc610 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff81ecc740 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff81ecc7e0 t nbio_v7_0_get_clockgating_state +ffffffff81ecc860 t nbio_v7_0_ih_control +ffffffff81ecc9b0 t nbio_v7_0_init_registers +ffffffff81ecca00 t nbio_v7_0_remap_hdp_registers +ffffffff81eccb10 t nbio_7_0_read_syshub_ind_mmr +ffffffff81eccbe0 t nbio_7_0_write_syshub_ind_mmr +ffffffff81ecd000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff81ecd040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff81ecd080 t nbio_v7_2_get_pcie_index_offset +ffffffff81ecd0c0 t nbio_v7_2_get_pcie_data_offset +ffffffff81ecd100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff81ecd130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff81ecd170 t nbio_v7_2_get_rev_id +ffffffff81ecd250 t nbio_v7_2_mc_access_enable +ffffffff81ecd390 t nbio_v7_2_get_memsize +ffffffff81ecd400 t nbio_v7_2_sdma_doorbell_range +ffffffff81ecd4a0 t nbio_v7_2_vcn_doorbell_range +ffffffff81ecd520 t nbio_v7_2_enable_doorbell_aperture +ffffffff81ecd600 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff81ecd770 t nbio_v7_2_ih_doorbell_range +ffffffff81ecd800 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff81ecd8c0 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff81ecda50 t nbio_v7_2_get_clockgating_state +ffffffff81ecdae0 t nbio_v7_2_ih_control +ffffffff81ecdc30 t nbio_v7_2_init_registers +ffffffff81ecddf0 t nbio_v7_2_remap_hdp_registers +ffffffff81ece000 t nbio_v7_4_query_ras_error_count +ffffffff81ece1a0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff81ece3e0 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff81ece590 t nbio_v7_4_init_ras_controller_interrupt +ffffffff81ece5d0 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff81ece610 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff81ece650 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff81ece690 t nbio_v7_4_get_pcie_index_offset +ffffffff81ece6d0 t nbio_v7_4_get_pcie_data_offset +ffffffff81ece710 t nbio_v7_4_get_rev_id +ffffffff81ece7e0 t nbio_v7_4_mc_access_enable +ffffffff81ece890 t nbio_v7_4_get_memsize +ffffffff81ece900 t nbio_v7_4_sdma_doorbell_range +ffffffff81ece9d0 t nbio_v7_4_vcn_doorbell_range +ffffffff81ecea70 t nbio_v7_4_enable_doorbell_aperture +ffffffff81eceb70 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff81ecece0 t nbio_v7_4_ih_doorbell_range +ffffffff81ecee00 t nbio_v7_4_enable_doorbell_interrupt +ffffffff81ecef50 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff81ecef80 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff81ecf020 t nbio_v7_4_get_clockgating_state +ffffffff81ecf0a0 t nbio_v7_4_ih_control +ffffffff81ecf1f0 t nbio_v7_4_init_registers +ffffffff81ecf2e0 t nbio_v7_4_remap_hdp_registers +ffffffff81ecf3f0 t nbio_v7_4_program_aspm +ffffffff81ecf800 t nbio_v7_4_set_ras_controller_irq_state +ffffffff81ecf990 t nbio_v7_4_process_ras_controller_irq +ffffffff81ecf9c0 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff81ecfb50 t nbio_v7_4_process_err_event_athub_irq +ffffffff81ed0000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff81ed0040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff81ed0080 t nbio_v7_7_get_pcie_index_offset +ffffffff81ed00c0 t nbio_v7_7_get_pcie_data_offset +ffffffff81ed0100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff81ed0130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81ed0170 t nbio_v7_7_get_rev_id +ffffffff81ed0200 t nbio_v7_7_mc_access_enable +ffffffff81ed02b0 t nbio_v7_7_get_memsize +ffffffff81ed0320 t nbio_v7_7_sdma_doorbell_range +ffffffff81ed03b0 t nbio_v7_7_vcn_doorbell_range +ffffffff81ed0430 t nbio_v7_7_enable_doorbell_aperture +ffffffff81ed0510 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81ed0680 t nbio_v7_7_ih_doorbell_range +ffffffff81ed07a0 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81ed08e0 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81ed0af0 t nbio_v7_7_get_clockgating_state +ffffffff81ed0c00 t nbio_v7_7_ih_control +ffffffff81ed0d50 t nbio_v7_7_init_registers +ffffffff81ed0e70 t nbio_v7_7_remap_hdp_registers +ffffffff81ed1000 t nbio_v7_9_get_hdp_flush_req_offset +ffffffff81ed1040 t nbio_v7_9_get_hdp_flush_done_offset +ffffffff81ed1080 t nbio_v7_9_get_pcie_index_offset +ffffffff81ed10c0 t nbio_v7_9_get_pcie_data_offset +ffffffff81ed1100 t nbio_v7_9_get_pcie_index_hi_offset +ffffffff81ed1140 t nbio_v7_9_get_rev_id +ffffffff81ed11d0 t nbio_v7_9_mc_access_enable +ffffffff81ed1280 t nbio_v7_9_get_memsize +ffffffff81ed12f0 t nbio_v7_9_sdma_doorbell_range +ffffffff81ed1630 t nbio_v7_9_vcn_doorbell_range +ffffffff81ed17c0 t nbio_v7_9_enable_doorbell_aperture +ffffffff81ed1930 t nbio_v7_9_enable_doorbell_selfring_aperture +ffffffff81ed1aa0 t nbio_v7_9_ih_doorbell_range +ffffffff81ed1ba0 t nbio_v7_9_enable_doorbell_interrupt +ffffffff81ed1cb0 t nbio_v7_9_update_medium_grain_clock_gating +ffffffff81ed1ce0 t nbio_v7_9_update_medium_grain_light_sleep +ffffffff81ed1d10 t nbio_v7_9_get_clockgating_state +ffffffff81ed1d40 t nbio_v7_9_ih_control +ffffffff81ed1e90 t nbio_v7_9_init_registers +ffffffff81ed21a0 t nbio_v7_9_remap_hdp_registers +ffffffff81ed22b0 t nbio_v7_9_get_compute_partition_mode +ffffffff81ed2340 t nbio_v7_9_get_memory_partition_mode +ffffffff81ed2430 t nbio_v7_9_get_pcie_replay_count +ffffffff81ed2490 t nbio_v7_9_get_pcie_usage +ffffffff81ed25f0 t nbio_v7_9_query_ras_error_count +ffffffff81ed2620 t nbio_v7_9_handle_ras_controller_intr_no_bifring +ffffffff81ed2740 t nbio_v7_9_handle_ras_err_event_athub_intr_no_bifring +ffffffff81ed2850 t nbio_v7_9_init_ras_controller_interrupt +ffffffff81ed2890 t nbio_v7_9_init_ras_err_event_athub_interrupt +ffffffff81ed28d0 t nbio_v7_9_set_ras_controller_irq_state +ffffffff81ed2900 t nbio_v7_9_process_ras_controller_irq +ffffffff81ed2930 t nbio_v7_9_set_ras_err_event_athub_irq_state +ffffffff81ed2960 t nbio_v7_9_process_err_event_athub_irq +ffffffff81ed3000 T nv_grbm_select +ffffffff81ed30a0 T nv_set_virt_ops +ffffffff81ed30e0 t nv_common_early_init +ffffffff81ed34d0 t nv_common_late_init +ffffffff81ed3580 t nv_common_sw_init +ffffffff81ed35c0 t nv_common_sw_fini +ffffffff81ed35f0 t nv_common_hw_init +ffffffff81ed36f0 t nv_common_hw_fini +ffffffff81ed3750 t nv_common_suspend +ffffffff81ed37b0 t nv_common_resume +ffffffff81ed37f0 t nv_common_is_idle +ffffffff81ed3820 t nv_common_wait_for_idle +ffffffff81ed3850 t nv_common_soft_reset +ffffffff81ed3880 t nv_common_set_clockgating_state +ffffffff81ed3950 t nv_common_set_powergating_state +ffffffff81ed3980 t nv_common_get_clockgating_state +ffffffff81ed39f0 t nv_didt_rreg +ffffffff81ed3a90 t nv_didt_wreg +ffffffff81ed3b10 t nv_read_disabled_bios +ffffffff81ed3b40 t nv_read_register +ffffffff81ed3c30 t nv_asic_reset +ffffffff81ed3d70 t nv_asic_reset_method +ffffffff81ed3e60 t nv_get_xclk +ffffffff81ed3e90 t nv_set_uvd_clocks +ffffffff81ed3ec0 t nv_set_vce_clocks +ffffffff81ed3ef0 t nv_get_config_memsize +ffffffff81ed3f10 t nv_need_full_reset +ffffffff81ed3f40 t nv_init_doorbell_index +ffffffff81ed4070 t nv_need_reset_on_init +ffffffff81ed4110 t nv_pre_asic_init +ffffffff81ed4140 t nv_update_umd_stable_pstate +ffffffff81ed4200 t nv_query_video_codecs +ffffffff81ed5000 T psp_v10_0_set_psp_funcs +ffffffff81ed5030 t psp_v10_0_init_microcode +ffffffff81ed50f0 t psp_v10_0_ring_create +ffffffff81ed5400 t psp_v10_0_ring_stop +ffffffff81ed55f0 t psp_v10_0_ring_destroy +ffffffff81ed5670 t psp_v10_0_mode1_reset +ffffffff81ed56c0 t psp_v10_0_ring_get_wptr +ffffffff81ed5720 t psp_v10_0_ring_set_wptr +ffffffff81ed6000 T psp_v11_0_set_psp_funcs +ffffffff81ed6030 t psp_v11_0_init_microcode +ffffffff81ed6180 t psp_v11_0_bootloader_load_kdb +ffffffff81ed61a0 t psp_v11_0_bootloader_load_spl +ffffffff81ed61c0 t psp_v11_0_bootloader_load_sysdrv +ffffffff81ed61e0 t psp_v11_0_bootloader_load_sos +ffffffff81ed6540 t psp_v11_0_ring_create +ffffffff81ed6be0 t psp_v11_0_ring_stop +ffffffff81ed6e00 t psp_v11_0_ring_destroy +ffffffff81ed6e80 t psp_v11_0_mode1_reset +ffffffff81ed6f80 t psp_v11_0_memory_training +ffffffff81ed7400 t psp_v11_0_ring_get_wptr +ffffffff81ed7450 t psp_v11_0_ring_set_wptr +ffffffff81ed7590 t psp_v11_0_load_usbc_pd_fw +ffffffff81ed7780 t psp_v11_0_read_usbc_pd_fw +ffffffff81ed78a0 t psp_v11_0_bootloader_load_component +ffffffff81ed7a60 t psp_v11_0_wait_for_bootloader +ffffffff81ed7c30 t psp_v11_0_memory_training_send_msg +ffffffff81ed8000 T psp_v11_0_8_set_psp_funcs +ffffffff81ed8030 t psp_v11_0_8_ring_create +ffffffff81ed86d0 t psp_v11_0_8_ring_stop +ffffffff81ed8a60 t psp_v11_0_8_ring_destroy +ffffffff81ed8ae0 t psp_v11_0_8_ring_get_wptr +ffffffff81ed8b50 t psp_v11_0_8_ring_set_wptr +ffffffff81ed9000 T psp_v12_0_set_psp_funcs +ffffffff81ed9030 t psp_v12_0_init_microcode +ffffffff81ed90e0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81ed9410 t psp_v12_0_bootloader_load_sos +ffffffff81ed9790 t psp_v12_0_ring_create +ffffffff81eda190 t psp_v12_0_ring_stop +ffffffff81eda3b0 t psp_v12_0_ring_destroy +ffffffff81eda430 t psp_v12_0_mode1_reset +ffffffff81eda530 t psp_v12_0_ring_get_wptr +ffffffff81eda5a0 t psp_v12_0_ring_set_wptr +ffffffff81edb000 T psp_v13_0_set_psp_funcs +ffffffff81edb030 t psp_v13_0_init_microcode +ffffffff81edb130 t psp_v13_0_wait_for_bootloader_steady_state +ffffffff81edb240 t psp_v13_0_bootloader_load_kdb +ffffffff81edb260 t psp_v13_0_bootloader_load_spl +ffffffff81edb280 t psp_v13_0_bootloader_load_sysdrv +ffffffff81edb2a0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81edb2c0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81edb2e0 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81edb300 t psp_v13_0_bootloader_load_ras_drv +ffffffff81edb320 t psp_v13_0_bootloader_load_sos +ffffffff81edb6f0 t psp_v13_0_ring_create +ffffffff81edbd90 t psp_v13_0_ring_stop +ffffffff81edc120 t psp_v13_0_ring_destroy +ffffffff81edc1a0 t psp_v13_0_memory_training +ffffffff81edc5d0 t psp_v13_0_ring_get_wptr +ffffffff81edc640 t psp_v13_0_ring_set_wptr +ffffffff81edc740 t psp_v13_0_load_usbc_pd_fw +ffffffff81edc930 t psp_v13_0_read_usbc_pd_fw +ffffffff81edca50 t psp_v13_0_update_spirom +ffffffff81edcc30 t psp_v13_0_vbflash_status +ffffffff81edcc90 t psp_v13_0_fatal_error_recovery_quirk +ffffffff81edcdc0 t psp_v13_0_bootloader_load_component +ffffffff81edd030 t psp_v13_0_memory_training_send_msg +ffffffff81edd1a0 t psp_v13_0_exec_spi_cmd +ffffffff81ede000 T psp_v13_0_4_set_psp_funcs +ffffffff81ede030 t psp_v13_0_4_init_microcode +ffffffff81ede0d0 t psp_v13_0_4_bootloader_load_kdb +ffffffff81ede0f0 t psp_v13_0_4_bootloader_load_spl +ffffffff81ede110 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81ede130 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81ede150 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81ede170 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81ede190 t psp_v13_0_4_bootloader_load_sos +ffffffff81ede500 t psp_v13_0_4_ring_create +ffffffff81edebb0 t psp_v13_0_4_ring_stop +ffffffff81edef40 t psp_v13_0_4_ring_destroy +ffffffff81edefc0 t psp_v13_0_4_ring_get_wptr +ffffffff81edf030 t psp_v13_0_4_ring_set_wptr +ffffffff81edf130 t psp_v13_0_4_bootloader_load_component +ffffffff81edf300 t psp_v13_0_4_wait_for_bootloader +ffffffff81ee0000 T psp_v3_1_set_psp_funcs +ffffffff81ee0030 t psp_v3_1_init_microcode +ffffffff81ee00c0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81ee03f0 t psp_v3_1_bootloader_load_sos +ffffffff81ee0770 t psp_v3_1_ring_create +ffffffff81ee1290 t psp_v3_1_ring_stop +ffffffff81ee14b0 t psp_v3_1_ring_destroy +ffffffff81ee1530 t psp_v3_1_smu_reload_quirk +ffffffff81ee1580 t psp_v3_1_mode1_reset +ffffffff81ee1680 t psp_v3_1_ring_get_wptr +ffffffff81ee16d0 t psp_v3_1_ring_set_wptr +ffffffff81ee2000 t sdma_v2_4_early_init +ffffffff81ee20f0 t sdma_v2_4_sw_init +ffffffff81ee24a0 t sdma_v2_4_sw_fini +ffffffff81ee2550 t sdma_v2_4_hw_init +ffffffff81ee28f0 t sdma_v2_4_hw_fini +ffffffff81ee2930 t sdma_v2_4_suspend +ffffffff81ee2970 t sdma_v2_4_resume +ffffffff81ee2980 t sdma_v2_4_is_idle +ffffffff81ee29c0 t sdma_v2_4_wait_for_idle +ffffffff81ee2a60 t sdma_v2_4_soft_reset +ffffffff81ee2ba0 t sdma_v2_4_set_clockgating_state +ffffffff81ee2bd0 t sdma_v2_4_set_powergating_state +ffffffff81ee2c00 t sdma_v2_4_ring_get_rptr +ffffffff81ee2c40 t sdma_v2_4_ring_get_wptr +ffffffff81ee2ca0 t sdma_v2_4_ring_set_wptr +ffffffff81ee2ce0 t sdma_v2_4_ring_emit_ib +ffffffff81ee2f90 t sdma_v2_4_ring_emit_fence +ffffffff81ee3390 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81ee3610 t sdma_v2_4_ring_emit_vm_flush +ffffffff81ee3880 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81ee3b00 t sdma_v2_4_ring_test_ring +ffffffff81ee3de0 t sdma_v2_4_ring_test_ib +ffffffff81ee3fb0 t sdma_v2_4_ring_insert_nop +ffffffff81ee40e0 t sdma_v2_4_ring_pad_ib +ffffffff81ee4210 t sdma_v2_4_ring_emit_wreg +ffffffff81ee4360 t sdma_v2_4_emit_copy_buffer +ffffffff81ee4420 t sdma_v2_4_emit_fill_buffer +ffffffff81ee44b0 t sdma_v2_4_vm_copy_pte +ffffffff81ee4570 t sdma_v2_4_vm_write_pte +ffffffff81ee4640 t sdma_v2_4_vm_set_pte_pde +ffffffff81ee4740 t sdma_v2_4_set_trap_irq_state +ffffffff81ee4800 t sdma_v2_4_process_trap_irq +ffffffff81ee48a0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81ee4920 t sdma_v2_4_enable +ffffffff81ee5000 t sdma_v3_0_early_init +ffffffff81ee5100 t sdma_v3_0_sw_init +ffffffff81ee54c0 t sdma_v3_0_sw_fini +ffffffff81ee5570 t sdma_v3_0_hw_init +ffffffff81ee56a0 t sdma_v3_0_hw_fini +ffffffff81ee56f0 t sdma_v3_0_suspend +ffffffff81ee5740 t sdma_v3_0_resume +ffffffff81ee5750 t sdma_v3_0_is_idle +ffffffff81ee5790 t sdma_v3_0_wait_for_idle +ffffffff81ee5830 t sdma_v3_0_check_soft_reset +ffffffff81ee5890 t sdma_v3_0_pre_soft_reset +ffffffff81ee58e0 t sdma_v3_0_soft_reset +ffffffff81ee59b0 t sdma_v3_0_post_soft_reset +ffffffff81ee5a00 t sdma_v3_0_set_clockgating_state +ffffffff81ee5c60 t sdma_v3_0_set_powergating_state +ffffffff81ee5c90 t sdma_v3_0_get_clockgating_state +ffffffff81ee5d10 t sdma_v3_0_ring_get_rptr +ffffffff81ee5d50 t sdma_v3_0_ring_get_wptr +ffffffff81ee5dd0 t sdma_v3_0_ring_set_wptr +ffffffff81ee5e80 t sdma_v3_0_ring_emit_ib +ffffffff81ee6130 t sdma_v3_0_ring_emit_fence +ffffffff81ee6530 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81ee67b0 t sdma_v3_0_ring_emit_vm_flush +ffffffff81ee6a20 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81ee6ca0 t sdma_v3_0_ring_test_ring +ffffffff81ee6f80 t sdma_v3_0_ring_test_ib +ffffffff81ee7150 t sdma_v3_0_ring_insert_nop +ffffffff81ee7280 t sdma_v3_0_ring_pad_ib +ffffffff81ee73b0 t sdma_v3_0_ring_emit_wreg +ffffffff81ee7500 t sdma_v3_0_emit_copy_buffer +ffffffff81ee75c0 t sdma_v3_0_emit_fill_buffer +ffffffff81ee7650 t sdma_v3_0_vm_copy_pte +ffffffff81ee7710 t sdma_v3_0_vm_write_pte +ffffffff81ee77e0 t sdma_v3_0_vm_set_pte_pde +ffffffff81ee78e0 t sdma_v3_0_set_trap_irq_state +ffffffff81ee79a0 t sdma_v3_0_process_trap_irq +ffffffff81ee7a40 t sdma_v3_0_process_illegal_inst_irq +ffffffff81ee7ac0 t sdma_v3_0_ctx_switch_enable +ffffffff81ee7c60 t sdma_v3_0_enable +ffffffff81ee7dd0 t sdma_v3_0_gfx_resume +ffffffff81ee9000 t sdma_v4_0_early_init +ffffffff81ee92d0 t sdma_v4_0_late_init +ffffffff81ee9570 t sdma_v4_0_sw_init +ffffffff81ee99b0 t sdma_v4_0_sw_fini +ffffffff81ee9a70 t sdma_v4_0_hw_init +ffffffff81eec9d0 t sdma_v4_0_hw_fini +ffffffff81eeca90 t sdma_v4_0_suspend +ffffffff81eecae0 t sdma_v4_0_resume +ffffffff81eecb60 t sdma_v4_0_is_idle +ffffffff81eecc90 t sdma_v4_0_wait_for_idle +ffffffff81eece30 t sdma_v4_0_soft_reset +ffffffff81eece60 t sdma_v4_0_set_clockgating_state +ffffffff81eed360 t sdma_v4_0_set_powergating_state +ffffffff81eed420 t sdma_v4_0_get_clockgating_state +ffffffff81eed4c0 t sdma_v4_0_query_ras_error_count +ffffffff81eed690 t sdma_v4_0_reset_ras_error_count +ffffffff81eed7e0 t sdma_v4_0_ring_get_rptr +ffffffff81eed840 t sdma_v4_0_ring_get_wptr +ffffffff81eeda30 t sdma_v4_0_ring_set_wptr +ffffffff81eedcb0 t sdma_v4_0_ring_emit_ib +ffffffff81eedf60 t sdma_v4_0_ring_emit_fence +ffffffff81eee380 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81eee3e0 t sdma_v4_0_ring_emit_vm_flush +ffffffff81eee400 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81eee4b0 t sdma_v4_0_ring_test_ring +ffffffff81eee790 t sdma_v4_0_ring_test_ib +ffffffff81eee960 t sdma_v4_0_ring_insert_nop +ffffffff81eeea90 t sdma_v4_0_ring_pad_ib +ffffffff81eeebc0 t sdma_v4_0_ring_emit_wreg +ffffffff81eeed10 t sdma_v4_0_ring_emit_reg_wait +ffffffff81eeed60 t sdma_v4_0_wait_reg_mem +ffffffff81eef070 t sdma_v4_0_page_ring_get_wptr +ffffffff81eef220 t sdma_v4_0_page_ring_set_wptr +ffffffff81eef3e0 t sdma_v4_0_emit_copy_buffer +ffffffff81eef4a0 t sdma_v4_0_emit_fill_buffer +ffffffff81eef530 t sdma_v4_0_vm_copy_pte +ffffffff81eef5f0 t sdma_v4_0_vm_write_pte +ffffffff81eef6c0 t sdma_v4_0_vm_set_pte_pde +ffffffff81eef7c0 t sdma_v4_0_set_trap_irq_state +ffffffff81eef960 t sdma_v4_0_process_trap_irq +ffffffff81eefa90 t sdma_v4_0_process_illegal_inst_irq +ffffffff81eefbb0 t sdma_v4_0_set_ecc_irq_state +ffffffff81eefd50 t sdma_v4_0_process_vm_hole_irq +ffffffff81eefd90 t sdma_v4_0_print_iv_entry +ffffffff81eefed0 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81eeff10 t sdma_v4_0_process_pool_timeout_irq +ffffffff81eeff50 t sdma_v4_0_process_srbm_write_irq +ffffffff81eeff90 t sdma_v4_0_process_ras_data_cb +ffffffff81ef0010 t sdma_v4_0_ctx_switch_enable +ffffffff81ef06e0 t sdma_v4_0_enable +ffffffff81ef0ca0 t sdma_v4_0_gfx_enable +ffffffff81ef2000 t sdma_v4_4_query_ras_error_count +ffffffff81ef2290 t sdma_v4_4_reset_ras_error_count +ffffffff81ef3000 t sdma_v4_4_2_early_init +ffffffff81ef3280 t sdma_v4_4_2_late_init +ffffffff81ef32f0 t sdma_v4_4_2_sw_init +ffffffff81ef3810 t sdma_v4_4_2_sw_fini +ffffffff81ef38c0 t sdma_v4_4_2_hw_init +ffffffff81ef3910 t sdma_v4_4_2_hw_fini +ffffffff81ef39d0 t sdma_v4_4_2_suspend +ffffffff81ef3ab0 t sdma_v4_4_2_resume +ffffffff81ef3b00 t sdma_v4_4_2_is_idle +ffffffff81ef3ba0 t sdma_v4_4_2_wait_for_idle +ffffffff81ef3cc0 t sdma_v4_4_2_soft_reset +ffffffff81ef3cf0 t sdma_v4_4_2_set_clockgating_state +ffffffff81ef40f0 t sdma_v4_4_2_set_powergating_state +ffffffff81ef4120 t sdma_v4_4_2_get_clockgating_state +ffffffff81ef4200 t sdma_v4_4_2_xcp_suspend +ffffffff81ef42c0 t sdma_v4_4_2_xcp_resume +ffffffff81ef4300 t sdma_v4_4_2_ring_get_rptr +ffffffff81ef4370 t sdma_v4_4_2_ring_get_wptr +ffffffff81ef44b0 t sdma_v4_4_2_ring_set_wptr +ffffffff81ef4670 t sdma_v4_4_2_ring_emit_ib +ffffffff81ef4920 t sdma_v4_4_2_ring_emit_fence +ffffffff81ef4d40 t sdma_v4_4_2_ring_emit_pipeline_sync +ffffffff81ef4da0 t sdma_v4_4_2_ring_emit_vm_flush +ffffffff81ef4dc0 t sdma_v4_4_2_ring_emit_hdp_flush +ffffffff81ef4e70 t sdma_v4_4_2_ring_test_ring +ffffffff81ef5150 t sdma_v4_4_2_ring_test_ib +ffffffff81ef5320 t sdma_v4_4_2_ring_insert_nop +ffffffff81ef5450 t sdma_v4_4_2_ring_pad_ib +ffffffff81ef5580 t sdma_v4_4_2_ring_emit_wreg +ffffffff81ef56d0 t sdma_v4_4_2_ring_emit_reg_wait +ffffffff81ef5720 t sdma_v4_4_2_wait_reg_mem +ffffffff81ef5a30 t sdma_v4_4_2_page_ring_get_wptr +ffffffff81ef5b30 t sdma_v4_4_2_page_ring_set_wptr +ffffffff81ef5c40 t sdma_v4_4_2_emit_copy_buffer +ffffffff81ef5d00 t sdma_v4_4_2_emit_fill_buffer +ffffffff81ef5d90 t sdma_v4_4_2_vm_copy_pte +ffffffff81ef5e50 t sdma_v4_4_2_vm_write_pte +ffffffff81ef5f20 t sdma_v4_4_2_vm_set_pte_pde +ffffffff81ef6020 t sdma_v4_4_2_set_trap_irq_state +ffffffff81ef6100 t sdma_v4_4_2_process_trap_irq +ffffffff81ef6220 t sdma_v4_4_2_process_illegal_inst_irq +ffffffff81ef62b0 t sdma_v4_4_2_set_ecc_irq_state +ffffffff81ef6390 t sdma_v4_4_2_process_vm_hole_irq +ffffffff81ef6470 t sdma_v4_4_2_process_doorbell_invalid_irq +ffffffff81ef6550 t sdma_v4_4_2_process_pool_timeout_irq +ffffffff81ef6630 t sdma_v4_4_2_process_srbm_write_irq +ffffffff81ef6710 t sdma_v4_4_2_query_ras_error_count +ffffffff81ef6860 t sdma_v4_4_2_reset_ras_error_count +ffffffff81ef6990 t sdma_v4_4_2_inst_init_golden_registers +ffffffff81ef6b10 t sdma_v4_4_2_inst_start +ffffffff81ef7eb0 t sdma_v4_4_2_inst_ctx_switch_enable +ffffffff81ef8180 t sdma_v4_4_2_inst_enable +ffffffff81ef9000 t sdma_v5_0_early_init +ffffffff81ef9130 t sdma_v5_0_sw_init +ffffffff81ef9310 t sdma_v5_0_sw_fini +ffffffff81ef93a0 t sdma_v5_0_hw_init +ffffffff81efa600 t sdma_v5_0_hw_fini +ffffffff81efa660 t sdma_v5_0_suspend +ffffffff81efa6c0 t sdma_v5_0_resume +ffffffff81efa6d0 t sdma_v5_0_is_idle +ffffffff81efa760 t sdma_v5_0_wait_for_idle +ffffffff81efa820 t sdma_v5_0_soft_reset +ffffffff81efa850 t sdma_v5_0_set_clockgating_state +ffffffff81efaa50 t sdma_v5_0_set_powergating_state +ffffffff81efaa80 t sdma_v5_0_get_clockgating_state +ffffffff81efab20 t sdma_v5_0_ring_get_rptr +ffffffff81efab80 t sdma_v5_0_ring_get_wptr +ffffffff81efad20 t sdma_v5_0_ring_set_wptr +ffffffff81efb070 t sdma_v5_0_ring_emit_ib +ffffffff81efb330 t sdma_v5_0_ring_emit_fence +ffffffff81efb790 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81efba10 t sdma_v5_0_ring_emit_vm_flush +ffffffff81efba30 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81efbcd0 t sdma_v5_0_ring_test_ring +ffffffff81efc090 t sdma_v5_0_ring_test_ib +ffffffff81efc3c0 t sdma_v5_0_ring_insert_nop +ffffffff81efc4f0 t sdma_v5_0_ring_pad_ib +ffffffff81efc620 t sdma_v5_0_ring_init_cond_exec +ffffffff81efc850 t sdma_v5_0_ring_patch_cond_exec +ffffffff81efc910 t sdma_v5_0_ring_emit_wreg +ffffffff81efca60 t sdma_v5_0_ring_emit_reg_wait +ffffffff81efcce0 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81efcd60 t sdma_v5_0_ring_preempt_ib +ffffffff81efcea0 t sdma_v5_0_ring_emit_mem_sync +ffffffff81efd0b0 t sdma_v5_0_emit_copy_buffer +ffffffff81efd170 t sdma_v5_0_emit_fill_buffer +ffffffff81efd200 t sdma_v5_0_vm_copy_pte +ffffffff81efd2c0 t sdma_v5_0_vm_write_pte +ffffffff81efd390 t sdma_v5_0_vm_set_pte_pde +ffffffff81efd490 t sdma_v5_0_set_trap_irq_state +ffffffff81efd520 t sdma_v5_0_process_trap_irq +ffffffff81efd630 t sdma_v5_0_process_illegal_inst_irq +ffffffff81efd660 t sdma_v5_0_mqd_init +ffffffff81efd740 t sdma_v5_0_ctx_switch_enable +ffffffff81efda80 t sdma_v5_0_enable +ffffffff81efe000 t sdma_v5_2_early_init +ffffffff81efe130 t sdma_v5_2_sw_init +ffffffff81efe390 t sdma_v5_2_sw_fini +ffffffff81efe420 t sdma_v5_2_hw_init +ffffffff81efffc0 t sdma_v5_2_hw_fini +ffffffff81f00020 t sdma_v5_2_suspend +ffffffff81f00080 t sdma_v5_2_resume +ffffffff81f00090 t sdma_v5_2_is_idle +ffffffff81f00140 t sdma_v5_2_wait_for_idle +ffffffff81f00240 t sdma_v5_2_soft_reset +ffffffff81f00500 t sdma_v5_2_set_clockgating_state +ffffffff81f00860 t sdma_v5_2_set_powergating_state +ffffffff81f00890 t sdma_v5_2_get_clockgating_state +ffffffff81f00920 t sdma_v5_2_ring_get_rptr +ffffffff81f00980 t sdma_v5_2_ring_get_wptr +ffffffff81f00ac0 t sdma_v5_2_ring_set_wptr +ffffffff81f00c70 t sdma_v5_2_ring_emit_ib +ffffffff81f00f30 t sdma_v5_2_ring_emit_fence +ffffffff81f01390 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81f01610 t sdma_v5_2_ring_emit_vm_flush +ffffffff81f01630 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81f018d0 t sdma_v5_2_ring_test_ring +ffffffff81f01c90 t sdma_v5_2_ring_test_ib +ffffffff81f01fc0 t sdma_v5_2_ring_insert_nop +ffffffff81f020f0 t sdma_v5_2_ring_pad_ib +ffffffff81f02220 t sdma_v5_2_ring_init_cond_exec +ffffffff81f02450 t sdma_v5_2_ring_patch_cond_exec +ffffffff81f02510 t sdma_v5_2_ring_begin_use +ffffffff81f02530 t sdma_v5_2_ring_end_use +ffffffff81f02550 t sdma_v5_2_ring_emit_wreg +ffffffff81f026a0 t sdma_v5_2_ring_emit_reg_wait +ffffffff81f02920 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81f029a0 t sdma_v5_2_ring_preempt_ib +ffffffff81f02b10 t sdma_v5_2_ring_emit_mem_sync +ffffffff81f02d20 t sdma_v5_2_emit_copy_buffer +ffffffff81f02de0 t sdma_v5_2_emit_fill_buffer +ffffffff81f02e70 t sdma_v5_2_vm_copy_pte +ffffffff81f02f30 t sdma_v5_2_vm_write_pte +ffffffff81f03000 t sdma_v5_2_vm_set_pte_pde +ffffffff81f03100 t sdma_v5_2_set_trap_irq_state +ffffffff81f031c0 t sdma_v5_2_process_trap_irq +ffffffff81f03300 t sdma_v5_2_process_illegal_inst_irq +ffffffff81f03330 t sdma_v5_2_mqd_init +ffffffff81f03410 t sdma_v5_2_ctx_switch_enable +ffffffff81f03820 t sdma_v5_2_enable +ffffffff81f04000 t sdma_v6_0_early_init +ffffffff81f04120 t sdma_v6_0_sw_init +ffffffff81f042e0 t sdma_v6_0_sw_fini +ffffffff81f04370 t sdma_v6_0_hw_init +ffffffff81f04380 t sdma_v6_0_hw_fini +ffffffff81f04450 t sdma_v6_0_suspend +ffffffff81f04490 t sdma_v6_0_resume +ffffffff81f044a0 t sdma_v6_0_is_idle +ffffffff81f04530 t sdma_v6_0_wait_for_idle +ffffffff81f045f0 t sdma_v6_0_check_soft_reset +ffffffff81f046b0 t sdma_v6_0_soft_reset +ffffffff81f04b70 t sdma_v6_0_set_clockgating_state +ffffffff81f04ba0 t sdma_v6_0_set_powergating_state +ffffffff81f04bd0 t sdma_v6_0_get_clockgating_state +ffffffff81f04c00 t sdma_v6_0_ring_get_rptr +ffffffff81f04c60 t sdma_v6_0_ring_get_wptr +ffffffff81f04cd0 t sdma_v6_0_ring_set_wptr +ffffffff81f05020 t sdma_v6_0_ring_emit_ib +ffffffff81f052e0 t sdma_v6_0_ring_emit_fence +ffffffff81f05740 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81f059c0 t sdma_v6_0_ring_emit_vm_flush +ffffffff81f05c30 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81f05ed0 t sdma_v6_0_ring_test_ring +ffffffff81f06290 t sdma_v6_0_ring_test_ib +ffffffff81f065c0 t sdma_v6_0_ring_insert_nop +ffffffff81f066f0 t sdma_v6_0_ring_pad_ib +ffffffff81f06820 t sdma_v6_0_ring_init_cond_exec +ffffffff81f06a50 t sdma_v6_0_ring_patch_cond_exec +ffffffff81f06b10 t sdma_v6_0_ring_emit_wreg +ffffffff81f06c60 t sdma_v6_0_ring_emit_reg_wait +ffffffff81f06ee0 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81f06f60 t sdma_v6_0_ring_preempt_ib +ffffffff81f070b0 t sdma_v6_0_ring_emit_mem_sync +ffffffff81f072c0 t sdma_v6_0_emit_copy_buffer +ffffffff81f07380 t sdma_v6_0_emit_fill_buffer +ffffffff81f07410 t sdma_v6_0_vm_copy_pte +ffffffff81f074d0 t sdma_v6_0_vm_write_pte +ffffffff81f075a0 t sdma_v6_0_vm_set_pte_pde +ffffffff81f076a0 t sdma_v6_0_set_trap_irq_state +ffffffff81f07730 t sdma_v6_0_process_trap_irq +ffffffff81f07860 t sdma_v6_0_process_illegal_inst_irq +ffffffff81f07890 t sdma_v6_0_mqd_init +ffffffff81f079b0 t sdma_v6_0_start +ffffffff81f07c90 t sdma_v6_0_enable +ffffffff81f07e20 t sdma_v6_0_gfx_resume +ffffffff81f08eb0 t sdma_v6_0_gfx_stop +ffffffff81f0a000 T sienna_cichlid_reset_init +ffffffff81f0a0c0 t sienna_cichlid_async_reset +ffffffff81f0a120 t sienna_cichlid_get_reset_handler +ffffffff81f0a1b0 T sienna_cichlid_reset_fini +ffffffff81f0a210 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81f0a360 t sienna_cichlid_mode2_perform_reset +ffffffff81f0a3e0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81f0a6d0 t sienna_cichlid_mode2_reset +ffffffff81f0b000 T smu_v11_0_i2c_control_init +ffffffff81f0b0d0 T smu_v11_0_i2c_control_fini +ffffffff81f0b110 t smu_v11_0_i2c_xfer +ffffffff81f0c2c0 t smu_v11_0_i2c_func +ffffffff81f0c2f0 t smu_v11_0_i2c_enable +ffffffff81f0c440 t smu_v11_0_i2c_abort +ffffffff81f0c550 t lock_bus +ffffffff81f0c5f0 t trylock_bus +ffffffff81f0c640 t unlock_bus +ffffffff81f0d000 T smu_v13_0_10_reset_init +ffffffff81f0d0c0 t smu_v13_0_10_async_reset +ffffffff81f0d120 t smu_v13_0_10_get_reset_handler +ffffffff81f0d1d0 T smu_v13_0_10_reset_fini +ffffffff81f0d230 t smu_v13_0_10_mode2_prepare_hwcontext +ffffffff81f0d360 t smu_v13_0_10_mode2_perform_reset +ffffffff81f0d3e0 t smu_v13_0_10_mode2_restore_hwcontext +ffffffff81f0d740 t smu_v13_0_10_mode2_reset +ffffffff81f0e000 t smuio_v11_0_get_rom_index_offset +ffffffff81f0e040 t smuio_v11_0_get_rom_data_offset +ffffffff81f0e080 t smuio_v11_0_update_rom_clock_gating +ffffffff81f0e1d0 t smuio_v11_0_get_clock_gating_state +ffffffff81f0f000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81f0f040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81f0f080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81f0f1d0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81f10000 t smuio_v13_0_get_rom_index_offset +ffffffff81f10040 t smuio_v13_0_get_rom_data_offset +ffffffff81f10080 t smuio_v13_0_update_rom_clock_gating +ffffffff81f101d0 t smuio_v13_0_get_clock_gating_state +ffffffff81f10270 t smuio_v13_0_get_die_id +ffffffff81f102f0 t smuio_v13_0_get_socket_id +ffffffff81f10380 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81f11000 t smuio_v13_0_3_get_die_id +ffffffff81f11080 t smuio_v13_0_3_get_socket_id +ffffffff81f11110 t smuio_v13_0_3_get_pkg_type +ffffffff81f12000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81f12040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81f13000 t smuio_v9_0_get_rom_index_offset +ffffffff81f13040 t smuio_v9_0_get_rom_data_offset +ffffffff81f13080 t smuio_v9_0_update_rom_clock_gating +ffffffff81f131c0 t smuio_v9_0_get_clock_gating_state +ffffffff81f14000 T soc15_grbm_select +ffffffff81f14090 T soc15_program_register_sequence +ffffffff81f14290 T soc15_set_virt_ops +ffffffff81f14300 t soc15_common_early_init +ffffffff81f14720 t soc15_common_late_init +ffffffff81f14780 t soc15_common_sw_init +ffffffff81f147e0 t soc15_common_sw_fini +ffffffff81f14830 t soc15_common_hw_init +ffffffff81f14950 t soc15_common_hw_fini +ffffffff81f14a20 t soc15_common_suspend +ffffffff81f14a60 t soc15_common_resume +ffffffff81f14aa0 t soc15_common_is_idle +ffffffff81f14ad0 t soc15_common_wait_for_idle +ffffffff81f14b00 t soc15_common_soft_reset +ffffffff81f14b30 t soc15_common_set_clockgating_state +ffffffff81f14e70 t soc15_common_set_powergating_state +ffffffff81f14ea0 t soc15_common_get_clockgating_state +ffffffff81f14fd0 t soc15_uvd_ctx_rreg +ffffffff81f15070 t soc15_uvd_ctx_wreg +ffffffff81f15100 t soc15_didt_rreg +ffffffff81f151a0 t soc15_didt_wreg +ffffffff81f15220 t soc15_gc_cac_rreg +ffffffff81f15340 t soc15_gc_cac_wreg +ffffffff81f15450 t soc15_se_cac_rreg +ffffffff81f15570 t soc15_se_cac_wreg +ffffffff81f15680 t soc15_read_disabled_bios +ffffffff81f156b0 t soc15_read_register +ffffffff81f157b0 t soc15_asic_reset +ffffffff81f158b0 t soc15_asic_reset_method +ffffffff81f15a60 t soc15_get_xclk +ffffffff81f15ac0 t soc15_set_uvd_clocks +ffffffff81f15af0 t soc15_set_vce_clocks +ffffffff81f15b20 t soc15_get_config_memsize +ffffffff81f15b40 t soc15_need_full_reset +ffffffff81f15b70 t soc15_get_pcie_usage +ffffffff81f15ca0 t soc15_need_reset_on_init +ffffffff81f15d50 t soc15_get_pcie_replay_count +ffffffff81f15dc0 t soc15_supports_baco +ffffffff81f15e20 t soc15_pre_asic_init +ffffffff81f15e30 t soc15_query_video_codecs +ffffffff81f15f20 t vega20_get_pcie_usage +ffffffff81f17000 T soc21_grbm_select +ffffffff81f17090 t soc21_common_early_init +ffffffff81f17200 t soc21_common_late_init +ffffffff81f172e0 t soc21_common_sw_init +ffffffff81f17320 t soc21_common_sw_fini +ffffffff81f17350 t soc21_common_hw_init +ffffffff81f17410 t soc21_common_hw_fini +ffffffff81f174b0 t soc21_common_suspend +ffffffff81f17550 t soc21_common_resume +ffffffff81f17610 t soc21_common_is_idle +ffffffff81f17640 t soc21_common_wait_for_idle +ffffffff81f17670 t soc21_common_soft_reset +ffffffff81f176a0 t soc21_common_set_clockgating_state +ffffffff81f17750 t soc21_common_set_powergating_state +ffffffff81f177b0 t soc21_common_get_clockgating_state +ffffffff81f17800 t soc21_didt_rreg +ffffffff81f178a0 t soc21_didt_wreg +ffffffff81f17920 t soc21_read_disabled_bios +ffffffff81f17950 t soc21_read_register +ffffffff81f17a40 t soc21_asic_reset +ffffffff81f17b20 t soc21_asic_reset_method +ffffffff81f17be0 t soc21_get_xclk +ffffffff81f17c10 t soc21_set_uvd_clocks +ffffffff81f17c40 t soc21_set_vce_clocks +ffffffff81f17c70 t soc21_get_config_memsize +ffffffff81f17c90 t soc21_need_full_reset +ffffffff81f17cf0 t soc21_init_doorbell_index +ffffffff81f17e10 t soc21_need_reset_on_init +ffffffff81f17eb0 t soc21_pre_asic_init +ffffffff81f17ee0 t soc21_update_umd_stable_pstate +ffffffff81f17f60 t soc21_query_video_codecs +ffffffff81f19000 t tonga_ih_early_init +ffffffff81f19050 t tonga_ih_sw_init +ffffffff81f190d0 t tonga_ih_sw_fini +ffffffff81f19110 t tonga_ih_hw_init +ffffffff81f192f0 t tonga_ih_hw_fini +ffffffff81f19390 t tonga_ih_suspend +ffffffff81f19430 t tonga_ih_resume +ffffffff81f19470 t tonga_ih_is_idle +ffffffff81f194c0 t tonga_ih_wait_for_idle +ffffffff81f19560 t tonga_ih_check_soft_reset +ffffffff81f195c0 t tonga_ih_pre_soft_reset +ffffffff81f19670 t tonga_ih_soft_reset +ffffffff81f19740 t tonga_ih_post_soft_reset +ffffffff81f19780 t tonga_ih_set_clockgating_state +ffffffff81f197b0 t tonga_ih_set_powergating_state +ffffffff81f197e0 t tonga_ih_get_wptr +ffffffff81f198d0 t tonga_ih_decode_iv +ffffffff81f19950 t tonga_ih_set_rptr +ffffffff81f1a000 t umc_v6_0_init_registers +ffffffff81f1b000 t umc_v6_1_query_ras_error_count +ffffffff81f1b4e0 t umc_v6_1_query_ras_error_address +ffffffff81f1b7c0 t umc_v6_1_err_cnt_init +ffffffff81f1c000 T umc_v6_7_convert_error_address +ffffffff81f1c320 t umc_v6_7_query_ras_error_count +ffffffff81f1c360 t umc_v6_7_query_ras_error_address +ffffffff81f1c380 t umc_v6_7_query_ras_poison_mode +ffffffff81f1c3e0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81f1c400 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81f1c420 t umc_v6_7_query_ecc_error_count +ffffffff81f1c690 t umc_v6_7_reset_error_count_per_channel +ffffffff81f1c790 t umc_v6_7_query_error_address +ffffffff81f1c8b0 t umc_v6_7_ecc_info_querry_ecc_error_count +ffffffff81f1ca80 t umc_v6_7_ecc_info_query_error_address +ffffffff81f1d000 t umc_v8_10_query_ras_error_count +ffffffff81f1d040 t umc_v8_10_query_ras_error_address +ffffffff81f1d060 t umc_v8_10_err_cnt_init +ffffffff81f1d080 t umc_v8_10_query_ras_poison_mode +ffffffff81f1d0b0 t umc_v8_10_ecc_info_query_ras_error_count +ffffffff81f1d0d0 t umc_v8_10_ecc_info_query_ras_error_address +ffffffff81f1d0f0 t umc_v8_10_set_eeprom_table_version +ffffffff81f1d120 t umc_v8_10_query_ecc_error_count +ffffffff81f1d1f0 t umc_v8_10_clear_error_count_per_channel +ffffffff81f1d260 t umc_v8_10_query_error_address +ffffffff81f1d390 t umc_v8_10_convert_error_address +ffffffff81f1d5b0 t umc_v8_10_err_cnt_init_per_channel +ffffffff81f1d660 t umc_v8_10_ecc_info_query_ecc_error_count +ffffffff81f1d740 t umc_v8_10_ecc_info_query_error_address +ffffffff81f1e000 t umc_v8_7_query_ras_error_count +ffffffff81f1e310 t umc_v8_7_query_ras_error_address +ffffffff81f1e4d0 t umc_v8_7_err_cnt_init +ffffffff81f1e630 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81f1e750 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81f1f000 t uvd_v5_0_early_init +ffffffff81f1f050 t uvd_v5_0_sw_init +ffffffff81f1f140 t uvd_v5_0_sw_fini +ffffffff81f1f190 t uvd_v5_0_hw_init +ffffffff81f1f690 t uvd_v5_0_hw_fini +ffffffff81f1f710 t uvd_v5_0_suspend +ffffffff81f1f810 t uvd_v5_0_resume +ffffffff81f1f860 t uvd_v5_0_is_idle +ffffffff81f1f8b0 t uvd_v5_0_wait_for_idle +ffffffff81f1f940 t uvd_v5_0_soft_reset +ffffffff81f1f9e0 t uvd_v5_0_set_clockgating_state +ffffffff81f1fb80 t uvd_v5_0_set_powergating_state +ffffffff81f1fbc0 t uvd_v5_0_get_clockgating_state +ffffffff81f1fc40 t uvd_v5_0_ring_get_rptr +ffffffff81f1fc80 t uvd_v5_0_ring_get_wptr +ffffffff81f1fcc0 t uvd_v5_0_ring_set_wptr +ffffffff81f1fcf0 t uvd_v5_0_ring_emit_ib +ffffffff81f1ff60 t uvd_v5_0_ring_emit_fence +ffffffff81f20510 t uvd_v5_0_ring_test_ring +ffffffff81f206b0 t uvd_v5_0_ring_insert_nop +ffffffff81f20810 t uvd_v5_0_set_interrupt_state +ffffffff81f20840 t uvd_v5_0_process_interrupt +ffffffff81f208a0 t uvd_v5_0_stop +ffffffff81f209b0 t uvd_v5_0_start +ffffffff81f22000 t uvd_v6_0_early_init +ffffffff81f22160 t uvd_v6_0_sw_init +ffffffff81f223c0 t uvd_v6_0_sw_fini +ffffffff81f22480 t uvd_v6_0_hw_init +ffffffff81f22a30 t uvd_v6_0_hw_fini +ffffffff81f22ab0 t uvd_v6_0_suspend +ffffffff81f22bb0 t uvd_v6_0_resume +ffffffff81f22c00 t uvd_v6_0_is_idle +ffffffff81f22c50 t uvd_v6_0_wait_for_idle +ffffffff81f22ce0 t uvd_v6_0_check_soft_reset +ffffffff81f22d60 t uvd_v6_0_pre_soft_reset +ffffffff81f22da0 t uvd_v6_0_soft_reset +ffffffff81f22e70 t uvd_v6_0_post_soft_reset +ffffffff81f22f10 t uvd_v6_0_set_clockgating_state +ffffffff81f230a0 t uvd_v6_0_set_powergating_state +ffffffff81f23110 t uvd_v6_0_get_clockgating_state +ffffffff81f231a0 t uvd_v6_0_ring_get_rptr +ffffffff81f231e0 t uvd_v6_0_ring_get_wptr +ffffffff81f23220 t uvd_v6_0_ring_set_wptr +ffffffff81f23250 t uvd_v6_0_ring_emit_ib +ffffffff81f235b0 t uvd_v6_0_ring_emit_fence +ffffffff81f23b60 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81f23f50 t uvd_v6_0_ring_emit_vm_flush +ffffffff81f242b0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81f242e0 t uvd_v6_0_ring_test_ring +ffffffff81f24480 t uvd_v6_0_ring_insert_nop +ffffffff81f245e0 t uvd_v6_0_ring_emit_wreg +ffffffff81f24860 t uvd_v6_0_enc_ring_get_rptr +ffffffff81f248c0 t uvd_v6_0_enc_ring_get_wptr +ffffffff81f24920 t uvd_v6_0_enc_ring_set_wptr +ffffffff81f24960 t uvd_v6_0_enc_ring_emit_ib +ffffffff81f24ba0 t uvd_v6_0_enc_ring_emit_fence +ffffffff81f24de0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81f24f90 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81f251a0 t uvd_v6_0_enc_ring_test_ring +ffffffff81f252f0 t uvd_v6_0_enc_ring_test_ib +ffffffff81f257d0 t uvd_v6_0_enc_ring_insert_end +ffffffff81f25860 t uvd_v6_0_set_interrupt_state +ffffffff81f25890 t uvd_v6_0_process_interrupt +ffffffff81f25990 t uvd_v6_0_stop +ffffffff81f25aa0 t uvd_v6_0_start +ffffffff81f27000 t uvd_v7_0_early_init +ffffffff81f27270 t uvd_v7_0_sw_init +ffffffff81f27690 t uvd_v7_0_sw_fini +ffffffff81f27780 t uvd_v7_0_hw_init +ffffffff81f2a540 t uvd_v7_0_hw_fini +ffffffff81f2a850 t uvd_v7_0_suspend +ffffffff81f2a900 t uvd_v7_0_resume +ffffffff81f2a950 t uvd_v7_0_set_clockgating_state +ffffffff81f2a980 t uvd_v7_0_ring_get_rptr +ffffffff81f2aa20 t uvd_v7_0_ring_get_wptr +ffffffff81f2aac0 t uvd_v7_0_ring_set_wptr +ffffffff81f2ab40 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81f2abb0 t uvd_v7_0_ring_emit_ib +ffffffff81f2af50 t uvd_v7_0_ring_emit_fence +ffffffff81f2b5a0 t uvd_v7_0_ring_emit_vm_flush +ffffffff81f2b610 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81f2b640 t uvd_v7_0_ring_test_ring +ffffffff81f2b8d0 t uvd_v7_0_ring_insert_nop +ffffffff81f2ba70 t uvd_v7_0_ring_emit_wreg +ffffffff81f2bd40 t uvd_v7_0_ring_emit_reg_wait +ffffffff81f2c0f0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81f2c1e0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81f2c2e0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81f2c3e0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81f2c620 t uvd_v7_0_enc_ring_emit_fence +ffffffff81f2c860 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81f2c8d0 t uvd_v7_0_enc_ring_test_ring +ffffffff81f2ca30 t uvd_v7_0_enc_ring_test_ib +ffffffff81f2cf10 t uvd_v7_0_enc_ring_insert_end +ffffffff81f2cfa0 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81f2d0f0 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81f2d2b0 t uvd_v7_0_set_interrupt_state +ffffffff81f2d2e0 t uvd_v7_0_process_interrupt +ffffffff81f2e000 t vce_v3_0_early_init +ffffffff81f2e180 t vce_v3_0_sw_init +ffffffff81f2e2e0 t vce_v3_0_sw_fini +ffffffff81f2e330 t vce_v3_0_hw_init +ffffffff81f2e400 t vce_v3_0_hw_fini +ffffffff81f2e4f0 t vce_v3_0_suspend +ffffffff81f2e5c0 t vce_v3_0_resume +ffffffff81f2e6a0 t vce_v3_0_is_idle +ffffffff81f2e710 t vce_v3_0_wait_for_idle +ffffffff81f2e7c0 t vce_v3_0_check_soft_reset +ffffffff81f2e8c0 t vce_v3_0_pre_soft_reset +ffffffff81f2e960 t vce_v3_0_soft_reset +ffffffff81f2ea30 t vce_v3_0_post_soft_reset +ffffffff81f2ead0 t vce_v3_0_set_clockgating_state +ffffffff81f2edc0 t vce_v3_0_set_powergating_state +ffffffff81f2f5e0 t vce_v3_0_get_clockgating_state +ffffffff81f2f6a0 t vce_v3_0_ring_get_rptr +ffffffff81f2f770 t vce_v3_0_ring_get_wptr +ffffffff81f2f840 t vce_v3_0_ring_set_wptr +ffffffff81f2f900 t vce_v3_0_ring_emit_ib +ffffffff81f2fb40 t vce_v3_0_emit_pipeline_sync +ffffffff81f2fcf0 t vce_v3_0_emit_vm_flush +ffffffff81f2ff60 t vce_v3_0_set_interrupt_state +ffffffff81f2ffd0 t vce_v3_0_process_interrupt +ffffffff81f30090 t vce_v3_0_stop +ffffffff81f31000 t vce_v4_0_early_init +ffffffff81f310b0 t vce_v4_0_sw_init +ffffffff81f31350 t vce_v4_0_sw_fini +ffffffff81f313d0 t vce_v4_0_hw_init +ffffffff81f31b90 t vce_v4_0_hw_fini +ffffffff81f31cc0 t vce_v4_0_suspend +ffffffff81f31de0 t vce_v4_0_resume +ffffffff81f31e90 t vce_v4_0_set_clockgating_state +ffffffff81f31ec0 t vce_v4_0_set_powergating_state +ffffffff81f31fa0 t vce_v4_0_ring_get_rptr +ffffffff81f32010 t vce_v4_0_ring_get_wptr +ffffffff81f320a0 t vce_v4_0_ring_set_wptr +ffffffff81f32130 t vce_v4_0_ring_emit_ib +ffffffff81f32370 t vce_v4_0_ring_emit_fence +ffffffff81f325b0 t vce_v4_0_emit_vm_flush +ffffffff81f32620 t vce_v4_0_ring_insert_end +ffffffff81f326b0 t vce_v4_0_emit_wreg +ffffffff81f32800 t vce_v4_0_emit_reg_wait +ffffffff81f329c0 t vce_v4_0_set_interrupt_state +ffffffff81f32a50 t vce_v4_0_process_interrupt +ffffffff81f32af0 t vce_v4_0_start +ffffffff81f34000 T vcn_dec_sw_ring_emit_fence +ffffffff81f34240 T vcn_dec_sw_ring_insert_end +ffffffff81f342d0 T vcn_dec_sw_ring_emit_ib +ffffffff81f34510 T vcn_dec_sw_ring_emit_reg_wait +ffffffff81f346d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81f34740 T vcn_dec_sw_ring_emit_wreg +ffffffff81f35000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81f35140 T vcn_v1_0_ring_end_use +ffffffff81f351b0 t vcn_v1_0_early_init +ffffffff81f35310 t vcn_v1_0_sw_init +ffffffff81f355b0 t vcn_v1_0_sw_fini +ffffffff81f35610 t vcn_v1_0_hw_init +ffffffff81f356e0 t vcn_v1_0_hw_fini +ffffffff81f357e0 t vcn_v1_0_suspend +ffffffff81f35850 t vcn_v1_0_resume +ffffffff81f35930 t vcn_v1_0_is_idle +ffffffff81f359c0 t vcn_v1_0_wait_for_idle +ffffffff81f35a00 t vcn_v1_0_set_clockgating_state +ffffffff81f35ab0 t vcn_v1_0_set_powergating_state +ffffffff81f36010 t vcn_v1_0_dec_ring_get_rptr +ffffffff81f360a0 t vcn_v1_0_dec_ring_get_wptr +ffffffff81f36130 t vcn_v1_0_dec_ring_set_wptr +ffffffff81f36240 t vcn_v1_0_ring_patch_cs_in_place +ffffffff81f36400 t vcn_v1_0_dec_ring_emit_ib +ffffffff81f36780 t vcn_v1_0_dec_ring_emit_fence +ffffffff81f36d90 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff81f36e00 t vcn_v1_0_dec_ring_insert_nop +ffffffff81f36f90 t vcn_v1_0_dec_ring_insert_start +ffffffff81f37160 t vcn_v1_0_dec_ring_insert_end +ffffffff81f37270 t vcn_v1_0_ring_begin_use +ffffffff81f37310 t vcn_v1_0_dec_ring_emit_wreg +ffffffff81f375c0 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff81f37940 t vcn_v1_0_enc_ring_get_rptr +ffffffff81f37a20 t vcn_v1_0_enc_ring_get_wptr +ffffffff81f37b00 t vcn_v1_0_enc_ring_set_wptr +ffffffff81f37bc0 t vcn_v1_0_enc_ring_emit_ib +ffffffff81f37e00 t vcn_v1_0_enc_ring_emit_fence +ffffffff81f38040 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81f380b0 t vcn_v1_0_enc_ring_insert_end +ffffffff81f38140 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81f38290 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81f38450 t vcn_v1_0_set_interrupt_state +ffffffff81f38480 t vcn_v1_0_process_interrupt +ffffffff81f38530 t vcn_v1_0_idle_work_handler +ffffffff81f386a0 t vcn_v1_0_pause_dpg_mode +ffffffff81f39540 t vcn_v1_0_enable_clock_gating +ffffffff81f39970 t vcn_v1_0_disable_clock_gating +ffffffff81f39f30 t vcn_1_0_enable_static_power_gating +ffffffff81f3a0e0 t vcn_v1_0_start_dpg_mode +ffffffff81f3dea0 t vcn_v1_0_start_spg_mode +ffffffff81f400a0 t vcn_v1_0_clock_gating_dpg_mode +ffffffff81f41000 T vcn_v2_0_dec_ring_insert_start +ffffffff81f411c0 T vcn_v2_0_dec_ring_insert_end +ffffffff81f412c0 T vcn_v2_0_dec_ring_insert_nop +ffffffff81f41430 T vcn_v2_0_dec_ring_emit_fence +ffffffff81f419f0 T vcn_v2_0_dec_ring_emit_ib +ffffffff81f41d50 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff81f420a0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff81f42110 T vcn_v2_0_dec_ring_emit_wreg +ffffffff81f42390 T vcn_v2_0_enc_ring_emit_fence +ffffffff81f425d0 T vcn_v2_0_enc_ring_insert_end +ffffffff81f42660 T vcn_v2_0_enc_ring_emit_ib +ffffffff81f428a0 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff81f42a60 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff81f42ad0 T vcn_v2_0_enc_ring_emit_wreg +ffffffff81f42c20 T vcn_v2_0_dec_ring_test_ring +ffffffff81f42ec0 t vcn_v2_0_early_init +ffffffff81f43020 t vcn_v2_0_sw_init +ffffffff81f43350 t vcn_v2_0_sw_fini +ffffffff81f433d0 t vcn_v2_0_hw_init +ffffffff81f43d50 t vcn_v2_0_hw_fini +ffffffff81f43e50 t vcn_v2_0_suspend +ffffffff81f43e80 t vcn_v2_0_resume +ffffffff81f43ed0 t vcn_v2_0_is_idle +ffffffff81f43f60 t vcn_v2_0_wait_for_idle +ffffffff81f43fa0 t vcn_v2_0_set_clockgating_state +ffffffff81f44030 t vcn_v2_0_set_powergating_state +ffffffff81f445f0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81f44680 t vcn_v2_0_dec_ring_get_wptr +ffffffff81f44720 t vcn_v2_0_dec_ring_set_wptr +ffffffff81f44860 t vcn_v2_0_enc_ring_get_rptr +ffffffff81f44940 t vcn_v2_0_enc_ring_get_wptr +ffffffff81f44a30 t vcn_v2_0_enc_ring_set_wptr +ffffffff81f44b20 t vcn_v2_0_set_interrupt_state +ffffffff81f44b50 t vcn_v2_0_process_interrupt +ffffffff81f44c00 t vcn_v2_0_pause_dpg_mode +ffffffff81f453f0 t vcn_v2_0_enable_clock_gating +ffffffff81f45680 t vcn_v2_0_disable_clock_gating +ffffffff81f45aa0 t vcn_v2_0_start +ffffffff81f4a050 t vcn_v2_0_enable_static_power_gating +ffffffff81f4a1b0 t vcn_v2_0_clock_gating_dpg_mode +ffffffff81f4af30 t vcn_v2_0_mc_resume_dpg_mode +ffffffff81f50000 t vcn_v2_6_query_poison_status +ffffffff81f500e0 t vcn_v2_5_early_init +ffffffff81f503b0 t vcn_v2_5_sw_init +ffffffff81f50880 t vcn_v2_5_sw_fini +ffffffff81f50950 t vcn_v2_5_hw_init +ffffffff81f51390 t vcn_v2_5_hw_fini +ffffffff81f51500 t vcn_v2_5_suspend +ffffffff81f51530 t vcn_v2_5_resume +ffffffff81f51580 t vcn_v2_5_is_idle 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+ffffffff81fac8c0 T amdgpu_dm_plane_fill_dc_scaling_info +ffffffff81facb20 T amdgpu_dm_plane_handle_cursor_update +ffffffff81facdb0 T amdgpu_dm_plane_init +ffffffff81fadbb0 T is_video_format +ffffffff81fadc00 t dm_drm_plane_reset +ffffffff81fadc90 t dm_drm_plane_duplicate_state +ffffffff81fadd20 t dm_drm_plane_destroy_state +ffffffff81fadd60 t dm_plane_format_mod_supported +ffffffff81fade90 t dm_plane_helper_prepare_fb +ffffffff81fae140 t dm_plane_helper_cleanup_fb +ffffffff81fae1e0 t dm_plane_atomic_check +ffffffff81fae2b0 t dm_plane_atomic_async_check +ffffffff81fae2f0 t dm_plane_atomic_async_update +ffffffff81fae3a0 t amdgpu_bo_reserve +ffffffff81fae5a0 t amdgpu_bo_unreserve +ffffffff81faf000 T dm_pp_apply_display_requirements +ffffffff81faf1d0 T dm_pp_get_clock_levels_by_type +ffffffff81faf510 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff81faf6d0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff81faf880 T dm_pp_notify_wm_clock_changes +ffffffff81faf8d0 T dm_pp_apply_power_level_change_request +ffffffff81faf900 T dm_pp_apply_clock_for_voltage_request +ffffffff81faf9a0 T dm_pp_get_static_clocks +ffffffff81fafa60 T dm_pp_get_funcs +ffffffff81fafb70 t pp_rv_set_wm_ranges +ffffffff81fafcf0 t pp_rv_set_pme_wa_enable +ffffffff81fafd10 t pp_rv_set_active_display_count +ffffffff81fafd30 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff81fafd50 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff81fafd70 t pp_rv_set_hard_min_fclk_by_freq +ffffffff81fafd90 t pp_nv_set_display_count +ffffffff81fafdf0 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff81fafe60 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff81fafec0 t pp_nv_set_voltage_by_freq +ffffffff81faff50 t pp_nv_set_wm_ranges +ffffffff81faffa0 t pp_nv_set_hard_min_uclk_by_freq +ffffffff81fb0010 t pp_nv_get_maximum_sustainable_clocks +ffffffff81fb0070 t pp_nv_get_uclk_dpm_states +ffffffff81fb00d0 t pp_nv_set_pstate_handshake_support +ffffffff81fb0120 t pp_rn_set_wm_ranges +ffffffff81fb0170 t pp_rn_get_dpm_clock_table +ffffffff81fb1000 T amdgpu_dm_set_psr_caps +ffffffff81fb1150 T amdgpu_dm_link_setup_psr +ffffffff81fb12e0 T amdgpu_dm_psr_enable +ffffffff81fb13e0 T amdgpu_dm_psr_disable +ffffffff81fb1460 T amdgpu_dm_psr_disable_all +ffffffff81fb2000 T amdgpu_dm_setup_replay +ffffffff81fb20f0 T amdgpu_dm_replay_enable +ffffffff81fb2270 T amdgpu_dm_replay_disable +ffffffff81fb3000 T dm_get_elapse_time_in_ns +ffffffff81fb3030 T dm_perf_trace_timestamp +ffffffff81fb4000 T dc_assert_fp_enabled +ffffffff81fb4070 T dc_fpu_begin +ffffffff81fb40c0 T dc_fpu_end +ffffffff81fb5000 T dal_vector_construct +ffffffff81fb50d0 T dal_vector_presized_create +ffffffff81fb5340 T dal_vector_create +ffffffff81fb5460 T dal_vector_destruct +ffffffff81fb54b0 T dal_vector_destroy +ffffffff81fb5530 T dal_vector_get_count +ffffffff81fb5560 T dal_vector_at_index +ffffffff81fb55a0 T dal_vector_remove_at_index +ffffffff81fb5630 T dal_vector_set_at_index +ffffffff81fb5690 T dal_vector_insert_at +ffffffff81fb5790 T dal_vector_reserve +ffffffff81fb5840 T dal_vector_append +ffffffff81fb5940 T dal_vector_clone +ffffffff81fb59f0 T dal_vector_capacity +ffffffff81fb5a20 T dal_vector_clear +ffffffff81fb6000 T fixed_point_to_int_frac +ffffffff81fb61f0 T convert_float_matrix +ffffffff81fb62b0 T reduce_fraction +ffffffff81fb7000 T is_rgb_cspace +ffffffff81fb7080 T is_lower_pipe_tree_visible +ffffffff81fb70e0 T is_upper_pipe_tree_visible +ffffffff81fb7140 T is_pipe_tree_visible +ffffffff81fb71c0 T build_prescale_params +ffffffff81fb8000 T dc_fixpt_from_fraction +ffffffff81fb81c0 T dc_fixpt_mul +ffffffff81fb8360 T dc_fixpt_sqr +ffffffff81fb84d0 T dc_fixpt_recip +ffffffff81fb8540 T dc_fixpt_sinc +ffffffff81fb8730 T dc_fixpt_sin +ffffffff81fb8760 T dc_fixpt_cos +ffffffff81fb8850 T dc_fixpt_exp +ffffffff81fb8b30 t fixed31_32_exp_from_taylor_series +ffffffff81fb8f10 T dc_fixpt_log +ffffffff81fb9120 T dc_fixpt_u4d19 +ffffffff81fb9160 T dc_fixpt_u3d19 +ffffffff81fb91a0 T dc_fixpt_u2d19 +ffffffff81fb91e0 T dc_fixpt_u0d19 +ffffffff81fb9210 T dc_fixpt_clamp_u0d14 +ffffffff81fb9260 T dc_fixpt_clamp_u0d10 +ffffffff81fb92b0 T dc_fixpt_s4d19 +ffffffff81fba000 T bios_parser_create +ffffffff81fbb270 t bios_parser_get_connectors_number +ffffffff81fbb2d0 t bios_parser_get_connector_id +ffffffff81fbb360 t bios_parser_get_src_obj +ffffffff81fbb460 t bios_parser_get_i2c_info +ffffffff81fbb680 t bios_parser_get_hpd_info +ffffffff81fbb760 t bios_parser_get_device_tag +ffffffff81fbb960 t bios_parser_get_spread_spectrum_info +ffffffff81fbbb60 t bios_parser_get_ss_entry_number +ffffffff81fbbda0 t bios_parser_get_embedded_panel_info +ffffffff81fbc310 t bios_parser_get_gpio_pin_info +ffffffff81fbc420 t bios_parser_get_encoder_cap_info +ffffffff81fbc520 t bios_parser_set_scratch_critical_state +ffffffff81fbc530 t bios_parser_is_device_id_supported +ffffffff81fbc5f0 t bios_parser_encoder_control +ffffffff81fbc630 t bios_parser_transmitter_control +ffffffff81fbc670 t bios_parser_enable_crtc +ffffffff81fbc6c0 t bios_parser_adjust_pixel_clock +ffffffff81fbc700 t bios_parser_set_pixel_clock +ffffffff81fbc740 t bios_parser_set_dce_clock +ffffffff81fbc780 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff81fbc7d0 t bios_parser_program_crtc_timing +ffffffff81fbc810 t bios_parser_program_display_engine_pll +ffffffff81fbc850 t bios_parser_enable_disp_power_gating +ffffffff81fbc890 t bios_parser_destroy +ffffffff81fbc950 t bios_get_board_layout_info +ffffffff81fbcbd0 t get_bios_object +ffffffff81fbcda0 t get_ss_info_from_ss_info_table +ffffffff81fbcf70 t get_ss_info_v3_1 +ffffffff81fbd0e0 t get_ss_entry_number_from_ss_info_tbl +ffffffff81fbe000 T firmware_parser_create +ffffffff81fbfe70 t bios_parser_get_connectors_number +ffffffff81fbffe0 t bios_parser_get_connector_id +ffffffff81fc0040 t bios_parser_get_src_obj +ffffffff81fc02e0 t bios_parser_get_i2c_info +ffffffff81fc0580 t bios_parser_get_hpd_info +ffffffff81fc06f0 t bios_parser_get_device_tag +ffffffff81fc09c0 t bios_parser_get_spread_spectrum_info +ffffffff81fc0e40 t bios_parser_get_ss_entry_number +ffffffff81fc0e70 t bios_parser_get_embedded_panel_info +ffffffff81fc1070 t bios_parser_get_gpio_pin_info +ffffffff81fc1190 t bios_parser_get_encoder_cap_info +ffffffff81fc1300 t bios_parser_is_accelerated_mode +ffffffff81fc1310 t bios_parser_set_scratch_critical_state +ffffffff81fc1320 t bios_parser_is_device_id_supported +ffffffff81fc1390 t bios_parser_encoder_control +ffffffff81fc13d0 t bios_parser_transmitter_control +ffffffff81fc1410 t bios_parser_enable_crtc +ffffffff81fc1460 t bios_parser_set_pixel_clock +ffffffff81fc14a0 t bios_parser_set_dce_clock +ffffffff81fc14e0 t bios_parser_program_crtc_timing +ffffffff81fc1520 t bios_parser_enable_disp_power_gating +ffffffff81fc1560 t firmware_parser_destroy +ffffffff81fc1620 t bios_get_board_layout_info +ffffffff81fc1ac0 t bios_parser_pack_data_tables +ffffffff81fc1af0 t bios_get_atom_dc_golden_table +ffffffff81fc1c30 t bios_parser_enable_lvtma_control +ffffffff81fc1c80 t bios_parser_get_soc_bb_info +ffffffff81fc1d90 t bios_parser_get_disp_connector_caps_info +ffffffff81fc1ef0 t bios_parser_get_lttpr_caps +ffffffff81fc2040 t bios_parser_get_lttpr_interop +ffffffff81fc2180 t bios_parser_get_connector_speed_cap_info +ffffffff81fc22d0 t get_bios_object +ffffffff81fc2430 t get_bios_object_from_path_v3 +ffffffff81fc3000 T object_id_from_bios_object_id +ffffffff81fc4000 T bios_get_image +ffffffff81fc4050 T bios_is_accelerated_mode +ffffffff81fc40b0 T bios_set_scratch_acc_mode_change +ffffffff81fc40f0 T bios_set_scratch_critical_state +ffffffff81fc4130 T bios_get_vga_enabled_displays +ffffffff81fc5000 T dal_bios_parser_create +ffffffff81fc5070 T dal_bios_parser_destroy +ffffffff81fc6000 T dal_bios_parser_init_cmd_tbl +ffffffff81fc6810 t encoder_control_digx_v3 +ffffffff81fc6910 t encoder_control_digx_v4 +ffffffff81fc6a10 t encoder_control_digx_v5 +ffffffff81fc6b60 t encoder_control_dig1_v1 +ffffffff81fc6be0 t encoder_control_dig2_v1 +ffffffff81fc6c60 t encoder_control_dig_v1 +ffffffff81fc6cc0 t transmitter_control_v2 +ffffffff81fc6e60 t transmitter_control_v3 +ffffffff81fc7010 t transmitter_control_v4 +ffffffff81fc71c0 t transmitter_control_v1_5 +ffffffff81fc7330 t transmitter_control_v1_6 +ffffffff81fc7490 t set_pixel_clock_v3 +ffffffff81fc7600 t set_pixel_clock_v5 +ffffffff81fc77a0 t set_pixel_clock_v6 +ffffffff81fc7940 t set_pixel_clock_v7 +ffffffff81fc7b10 t enable_spread_spectrum_on_ppll_v1 +ffffffff81fc7c30 t enable_spread_spectrum_on_ppll_v2 +ffffffff81fc7d60 t enable_spread_spectrum_on_ppll_v3 +ffffffff81fc7e70 t adjust_display_pll_v2 +ffffffff81fc7fc0 t adjust_display_pll_v3 +ffffffff81fc8130 t dac1_encoder_control_v1 +ffffffff81fc81b0 t dac2_encoder_control_v1 +ffffffff81fc8230 t dac1_output_control_v1 +ffffffff81fc8290 t dac2_output_control_v1 +ffffffff81fc82f0 t set_crtc_using_dtd_timing_v3 +ffffffff81fc8440 t set_crtc_timing_v1 +ffffffff81fc85c0 t enable_crtc_v1 +ffffffff81fc8660 t enable_crtc_mem_req_v1 +ffffffff81fc8700 t program_clock_v5 +ffffffff81fc8810 t program_clock_v6 +ffffffff81fc8930 t external_encoder_control_v3 +ffffffff81fc8ae0 t enable_disp_power_gating_v2_1 +ffffffff81fc8bb0 t set_dce_clock_v2_1 +ffffffff81fc9000 T dal_firmware_parser_init_cmd_tbl +ffffffff81fc93d0 t encoder_control_digx_v1_5 +ffffffff81fc95a0 t encoder_control_fallback +ffffffff81fc9600 t transmitter_control_v1_6 +ffffffff81fc97a0 t transmitter_control_v1_7 +ffffffff81fc9990 t transmitter_control_fallback +ffffffff81fc99f0 t set_pixel_clock_v7 +ffffffff81fc9c40 t set_pixel_clock_fallback +ffffffff81fc9ca0 t set_crtc_using_dtd_timing_v3 +ffffffff81fc9df0 t enable_crtc_v1 +ffffffff81fc9e90 t external_encoder_control_v3 +ffffffff81fc9ec0 t enable_disp_power_gating_v2_1 +ffffffff81fca010 t enable_disp_power_gating_fallback +ffffffff81fca070 t set_dce_clock_v2_1 +ffffffff81fca1a0 t get_smu_clock_info_v3_1 +ffffffff81fca210 t enable_lvtma_control +ffffffff81fcb000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81fcb0a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81fcb1c0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81fcb240 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81fcb2d0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81fcb390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81fcb470 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff81fcc000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff81fcc0b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff81fcc1c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81fcc240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81fcc2d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81fcc3b0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81fcd000 T dal_cmd_tbl_helper_dce110_get_table ffffffff81fcd030 t encoder_action_to_atom ffffffff81fcd0b0 t engine_bp_to_atom ffffffff81fcd100 t clock_source_id_to_atom -ffffffff81fcd1d0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81fcd220 t signal_type_to_atom_dig_mode -ffffffff81fcd280 t hpd_sel_to_atom -ffffffff81fcd2c0 t dig_encoder_sel_to_atom -ffffffff81fcd2f0 t phy_id_to_atom -ffffffff81fcd330 t disp_power_gating_action_to_atom -ffffffff81fcd3a0 t dc_clock_type_to_atom -ffffffff81fcd420 t transmitter_color_depth_to_atom -ffffffff81fce000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff81fcd1a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81fcd1f0 t signal_type_to_atom_dig_mode +ffffffff81fcd250 t hpd_sel_to_atom +ffffffff81fcd290 t dig_encoder_sel_to_atom +ffffffff81fcd2c0 t phy_id_to_atom +ffffffff81fcd300 t disp_power_gating_action_to_atom +ffffffff81fce000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff81fce030 t encoder_action_to_atom ffffffff81fce0b0 t engine_bp_to_atom ffffffff81fce100 t clock_source_id_to_atom @@ -31005,7 +30994,7 @@ ffffffff81fce2f0 t phy_id_to_atom ffffffff81fce330 t disp_power_gating_action_to_atom ffffffff81fce3a0 t dc_clock_type_to_atom ffffffff81fce420 t transmitter_color_depth_to_atom -ffffffff81fcf000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff81fcf000 T dal_cmd_tbl_helper_dce112_get_table ffffffff81fcf030 t encoder_action_to_atom ffffffff81fcf0b0 t engine_bp_to_atom ffffffff81fcf100 t clock_source_id_to_atom @@ -31013,26334 +31002,26347 @@ ffffffff81fcf1d0 t clock_source_id_to_atom_phy_clk_src ffffffff81fcf220 t signal_type_to_atom_dig_mode ffffffff81fcf280 t hpd_sel_to_atom ffffffff81fcf2c0 t dig_encoder_sel_to_atom -ffffffff81fcf310 t phy_id_to_atom -ffffffff81fcf350 t disp_power_gating_action_to_atom -ffffffff81fd0000 T clk_mgr_helper_get_active_display_cnt -ffffffff81fd00e0 T clk_mgr_helper_get_active_plane_cnt -ffffffff81fd0190 T clk_mgr_exit_optimized_pwr_state -ffffffff81fd02a0 T clk_mgr_optimize_pwr_state -ffffffff81fd0390 T dc_clk_mgr_create -ffffffff81fd0a50 T dc_destroy_clk_mgr -ffffffff81fd1000 T dentist_get_divider_from_did -ffffffff81fd1070 T dce_adjust_dp_ref_freq_for_ss -ffffffff81fd1170 T dce_get_dp_ref_freq_khz -ffffffff81fd12a0 T dce12_get_dp_ref_freq_khz -ffffffff81fd12c0 T dce_get_max_pixel_clock_for_all_paths -ffffffff81fd14d0 T dce_get_required_clocks_state -ffffffff81fd1580 T dce_set_clock -ffffffff81fd16e0 T dce_clock_read_ss_info -ffffffff81fd1800 T dce_clk_mgr_construct -ffffffff81fd19f0 t dce_update_clocks -ffffffff81fd2000 T dce110_get_min_vblank_time_us -ffffffff81fd2090 T dce110_fill_display_configs -ffffffff81fd2300 T dce11_pplib_apply_display_requirements -ffffffff81fd25f0 T dce110_clk_mgr_construct -ffffffff81fd26a0 t dce11_update_clocks -ffffffff81fd3000 T dce112_set_clock -ffffffff81fd3180 T dce112_set_dispclk -ffffffff81fd32a0 T dce112_set_dprefclk -ffffffff81fd3310 T dce112_clk_mgr_construct -ffffffff81fd33c0 t dce112_update_clocks -ffffffff81fd4000 T dce120_clk_mgr_construct -ffffffff81fd4090 T dce121_clk_mgr_construct -ffffffff81fd41c0 t dce12_update_clocks -ffffffff81fd5000 T rv1_clk_mgr_construct -ffffffff81fd50c0 t rv1_update_clocks -ffffffff81fd55a0 t rv1_init_clocks -ffffffff81fd5630 t rv1_enable_pme_wa -ffffffff81fd6000 T rv1_vbios_smu_set_dispclk -ffffffff81fd60e0 t rv1_vbios_smu_send_msg_with_param -ffffffff81fd61f0 T rv1_vbios_smu_set_dprefclk -ffffffff81fd7000 T rv2_clk_mgr_construct -ffffffff81fd8000 T dentist_get_did_from_divider -ffffffff81fd8080 T dcn20_update_clocks_update_dpp_dto -ffffffff81fd8150 T dcn20_update_clocks_update_dentist -ffffffff81fd8640 T dcn2_update_clocks -ffffffff81fd8bc0 T dcn2_read_clocks_from_hw_dentist -ffffffff81fd8c90 T dcn2_update_clocks_fpga -ffffffff81fd8dc0 T dcn2_init_clocks -ffffffff81fd8e60 T dcn2_get_clock -ffffffff81fd8ed0 T dcn20_clk_mgr_construct -ffffffff81fd9000 t dcn2_enable_pme_wa -ffffffff81fd9050 t dcn2_are_clock_states_equal -ffffffff81fd90c0 t dcn2_notify_link_rate_change -ffffffff81fda000 T dcn201_clk_mgr_construct -ffffffff81fda120 t dcn201_update_clocks -ffffffff81fda340 t dcn201_init_clocks -ffffffff81fdb000 T rn_clk_mgr_construct -ffffffff81fdb8a0 t rn_update_clocks -ffffffff81fdbe60 t rn_set_low_power_state -ffffffff81fdc040 t rn_init_clocks -ffffffff81fdc0e0 t rn_enable_pme_wa -ffffffff81fdc0f0 t rn_are_clock_states_equal -ffffffff81fdc140 t rn_notify_wm_ranges -ffffffff81fdc4d0 t rn_notify_link_rate_change -ffffffff81fdd000 T rn_vbios_smu_get_smu_version -ffffffff81fdd020 t rn_vbios_smu_send_msg_with_param -ffffffff81fdd1b0 T rn_vbios_smu_set_dispclk -ffffffff81fdd2d0 T rn_vbios_smu_set_dprefclk -ffffffff81fdd340 T rn_vbios_smu_set_hard_min_dcfclk -ffffffff81fdd3c0 T rn_vbios_smu_set_min_deep_sleep_dcfclk -ffffffff81fdd440 T rn_vbios_smu_set_phyclk -ffffffff81fdd480 T rn_vbios_smu_set_dppclk -ffffffff81fdd530 T rn_vbios_smu_set_dcn_low_power_state -ffffffff81fdd550 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn -ffffffff81fdd570 T rn_vbios_smu_enable_pme_wa -ffffffff81fdd590 T rn_vbios_smu_is_periodic_retraining_disabled -ffffffff81fde000 T dcn3_init_clocks -ffffffff81fde3b0 t dcn3_init_clocks_fpga -ffffffff81fde3c0 T dcn3_clk_mgr_construct -ffffffff81fde510 T dcn3_clk_mgr_destroy -ffffffff81fde570 t dcn3_update_clocks -ffffffff81fde990 t dcn3_enable_pme_wa -ffffffff81fde9d0 t dcn3_are_clock_states_equal -ffffffff81fdea30 t dcn3_notify_wm_ranges -ffffffff81fdecc0 t dcn30_notify_link_rate_change -ffffffff81fdede0 t dcn3_set_hard_min_memclk -ffffffff81fdee80 t dcn3_set_hard_max_memclk -ffffffff81fdeee0 t dcn3_set_max_memclk -ffffffff81fdef20 t dcn3_set_min_memclk -ffffffff81fdef60 t dcn3_get_memclk_states_from_smu -ffffffff81fdf0a0 t dcn3_is_smu_present -ffffffff81fe0000 T dcn30_smu_test_message -ffffffff81fe0070 t dcn30_smu_send_msg_with_param -ffffffff81fe01d0 T dcn30_smu_get_smu_version -ffffffff81fe01f0 T dcn30_smu_check_driver_if_version -ffffffff81fe0240 T dcn30_smu_check_msg_header_version -ffffffff81fe0290 T dcn30_smu_set_dram_addr_high -ffffffff81fe02b0 T dcn30_smu_set_dram_addr_low -ffffffff81fe02d0 T dcn30_smu_transfer_wm_table_smu_2_dram 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dcn301_smu_enable_phy_refclk_pwrdwn -ffffffff81fe15c0 T dcn301_smu_enable_pme_wa -ffffffff81fe15e0 T dcn301_smu_set_dram_addr_high -ffffffff81fe1630 T dcn301_smu_set_dram_addr_low -ffffffff81fe1680 T dcn301_smu_transfer_dpm_table_smu_2_dram -ffffffff81fe16a0 T dcn301_smu_transfer_wm_table_dram_2_smu -ffffffff81fe2000 T vg_clk_mgr_construct -ffffffff81fe2840 T vg_clk_mgr_destroy -ffffffff81fe2890 t vg_update_clocks -ffffffff81fe2bd0 t vg_init_clocks -ffffffff81fe2c70 t vg_enable_pme_wa -ffffffff81fe2c80 t vg_are_clock_states_equal -ffffffff81fe2cd0 t vg_notify_wm_ranges -ffffffff81fe4000 T dcn31_update_clocks -ffffffff81fe4610 T dcn31_init_clocks -ffffffff81fe46c0 T dcn31_are_clock_states_equal -ffffffff81fe4720 T dcn31_get_dtb_ref_freq_khz -ffffffff81fe4750 T dcn31_clk_mgr_construct -ffffffff81fe4e20 T dcn31_clk_mgr_destroy -ffffffff81fe4e70 t dcn31_set_low_power_state -ffffffff81fe5080 t dcn31_enable_pme_wa -ffffffff81fe5090 t dcn31_notify_wm_ranges -ffffffff81fe5410 t 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dentist_get_divider_from_did +ffffffff81fd2070 T dce_adjust_dp_ref_freq_for_ss +ffffffff81fd2170 T dce_get_dp_ref_freq_khz +ffffffff81fd22a0 T dce12_get_dp_ref_freq_khz +ffffffff81fd22c0 T dce_get_max_pixel_clock_for_all_paths +ffffffff81fd24d0 T dce_get_required_clocks_state +ffffffff81fd2580 T dce_set_clock +ffffffff81fd26e0 T dce_clock_read_ss_info +ffffffff81fd2800 T dce_clk_mgr_construct +ffffffff81fd29f0 t dce_update_clocks +ffffffff81fd3000 T dce110_get_min_vblank_time_us +ffffffff81fd3090 T dce110_fill_display_configs +ffffffff81fd3300 T dce11_pplib_apply_display_requirements +ffffffff81fd35f0 T dce110_clk_mgr_construct +ffffffff81fd36a0 t dce11_update_clocks +ffffffff81fd4000 T dce112_set_clock +ffffffff81fd4180 T dce112_set_dispclk +ffffffff81fd42a0 T dce112_set_dprefclk +ffffffff81fd4310 T dce112_clk_mgr_construct +ffffffff81fd43c0 t dce112_update_clocks +ffffffff81fd5000 T dce120_clk_mgr_construct +ffffffff81fd5090 T dce121_clk_mgr_construct +ffffffff81fd51c0 t dce12_update_clocks +ffffffff81fd6000 T rv1_clk_mgr_construct +ffffffff81fd60c0 t rv1_update_clocks +ffffffff81fd65a0 t rv1_init_clocks +ffffffff81fd6630 t rv1_enable_pme_wa +ffffffff81fd7000 T rv1_vbios_smu_set_dispclk +ffffffff81fd70e0 t rv1_vbios_smu_send_msg_with_param +ffffffff81fd71f0 T rv1_vbios_smu_set_dprefclk +ffffffff81fd8000 T rv2_clk_mgr_construct +ffffffff81fd9000 T dentist_get_did_from_divider +ffffffff81fd9080 T dcn20_update_clocks_update_dpp_dto +ffffffff81fd9150 T dcn20_update_clocks_update_dentist +ffffffff81fd9640 T dcn2_update_clocks +ffffffff81fd9bc0 T dcn2_read_clocks_from_hw_dentist +ffffffff81fd9c90 T dcn2_update_clocks_fpga +ffffffff81fd9dc0 T dcn2_init_clocks +ffffffff81fd9e60 T dcn2_get_clock +ffffffff81fd9ed0 T dcn20_clk_mgr_construct +ffffffff81fda000 t dcn2_enable_pme_wa +ffffffff81fda050 t dcn2_are_clock_states_equal +ffffffff81fda0c0 t dcn2_notify_link_rate_change +ffffffff81fdb000 T dcn201_clk_mgr_construct +ffffffff81fdb120 t dcn201_update_clocks +ffffffff81fdb340 t dcn201_init_clocks +ffffffff81fdc000 T rn_clk_mgr_construct +ffffffff81fdc8a0 t rn_update_clocks +ffffffff81fdce60 t rn_set_low_power_state +ffffffff81fdd040 t rn_init_clocks +ffffffff81fdd0e0 t rn_enable_pme_wa +ffffffff81fdd0f0 t rn_are_clock_states_equal +ffffffff81fdd140 t rn_notify_wm_ranges +ffffffff81fdd4d0 t rn_notify_link_rate_change +ffffffff81fde000 T rn_vbios_smu_get_smu_version +ffffffff81fde020 t rn_vbios_smu_send_msg_with_param +ffffffff81fde1b0 T rn_vbios_smu_set_dispclk +ffffffff81fde2d0 T rn_vbios_smu_set_dprefclk +ffffffff81fde340 T rn_vbios_smu_set_hard_min_dcfclk +ffffffff81fde3c0 T rn_vbios_smu_set_min_deep_sleep_dcfclk +ffffffff81fde440 T rn_vbios_smu_set_phyclk +ffffffff81fde480 T rn_vbios_smu_set_dppclk +ffffffff81fde530 T rn_vbios_smu_set_dcn_low_power_state +ffffffff81fde550 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff81fde570 T rn_vbios_smu_enable_pme_wa +ffffffff81fde590 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff81fdf000 T dcn3_init_clocks +ffffffff81fdf3b0 t dcn3_init_clocks_fpga +ffffffff81fdf3c0 T dcn3_clk_mgr_construct +ffffffff81fdf510 T dcn3_clk_mgr_destroy +ffffffff81fdf570 t dcn3_update_clocks +ffffffff81fdf990 t dcn3_enable_pme_wa +ffffffff81fdf9d0 t dcn3_are_clock_states_equal +ffffffff81fdfa30 t dcn3_notify_wm_ranges +ffffffff81fdfcc0 t dcn30_notify_link_rate_change +ffffffff81fdfde0 t dcn3_set_hard_min_memclk +ffffffff81fdfe80 t dcn3_set_hard_max_memclk +ffffffff81fdfee0 t dcn3_set_max_memclk +ffffffff81fdff20 t dcn3_set_min_memclk +ffffffff81fdff60 t dcn3_get_memclk_states_from_smu +ffffffff81fe00a0 t dcn3_is_smu_present +ffffffff81fe1000 T dcn30_smu_test_message +ffffffff81fe1070 t dcn30_smu_send_msg_with_param +ffffffff81fe11d0 T dcn30_smu_get_smu_version +ffffffff81fe11f0 T dcn30_smu_check_driver_if_version +ffffffff81fe1240 T dcn30_smu_check_msg_header_version +ffffffff81fe1290 T dcn30_smu_set_dram_addr_high +ffffffff81fe12b0 T dcn30_smu_set_dram_addr_low +ffffffff81fe12d0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff81fe12f0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff81fe1310 T dcn30_smu_set_hard_min_by_freq +ffffffff81fe1360 T dcn30_smu_set_hard_max_by_freq +ffffffff81fe13b0 T dcn30_smu_get_dpm_freq_by_index +ffffffff81fe1400 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff81fe1450 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff81fe1470 T dcn30_smu_set_num_of_displays +ffffffff81fe1490 T dcn30_smu_set_display_refresh_from_mall +ffffffff81fe14c0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff81fe14e0 T dcn30_smu_set_pme_workaround +ffffffff81fe2000 T dcn301_smu_get_smu_version +ffffffff81fe2070 t dcn301_smu_send_msg_with_param +ffffffff81fe21f0 T dcn301_smu_set_dispclk +ffffffff81fe2290 T dcn301_smu_set_dprefclk +ffffffff81fe2340 T dcn301_smu_set_hard_min_dcfclk +ffffffff81fe23e0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff81fe2480 T dcn301_smu_set_dppclk +ffffffff81fe2520 T dcn301_smu_set_display_idle_optimization +ffffffff81fe2570 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff81fe25c0 T dcn301_smu_enable_pme_wa +ffffffff81fe25e0 T dcn301_smu_set_dram_addr_high +ffffffff81fe2630 T dcn301_smu_set_dram_addr_low +ffffffff81fe2680 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff81fe26a0 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff81fe3000 T vg_clk_mgr_construct +ffffffff81fe3840 T vg_clk_mgr_destroy +ffffffff81fe3890 t vg_update_clocks +ffffffff81fe3bd0 t vg_init_clocks +ffffffff81fe3c70 t vg_enable_pme_wa +ffffffff81fe3c80 t vg_are_clock_states_equal +ffffffff81fe3cd0 t vg_notify_wm_ranges +ffffffff81fe5000 T dcn31_update_clocks +ffffffff81fe5610 T dcn31_init_clocks +ffffffff81fe56c0 T dcn31_are_clock_states_equal +ffffffff81fe5720 T dcn31_get_dtb_ref_freq_khz +ffffffff81fe5750 T dcn31_clk_mgr_construct +ffffffff81fe5e20 T dcn31_clk_mgr_destroy +ffffffff81fe5e70 t dcn31_set_low_power_state +ffffffff81fe6080 t dcn31_enable_pme_wa +ffffffff81fe6090 t dcn31_notify_wm_ranges +ffffffff81fe6410 t find_clk_for_voltage +ffffffff81fe7000 T dcn31_smu_get_smu_version +ffffffff81fe7020 t dcn31_smu_send_msg_with_param +ffffffff81fe7230 T dcn31_smu_set_dispclk +ffffffff81fe72a0 T dcn31_smu_set_dprefclk +ffffffff81fe7310 T dcn31_smu_set_hard_min_dcfclk +ffffffff81fe7390 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff81fe7410 T dcn31_smu_set_dppclk +ffffffff81fe7480 T dcn31_smu_set_display_idle_optimization +ffffffff81fe74d0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff81fe7520 T dcn31_smu_enable_pme_wa +ffffffff81fe7560 T dcn31_smu_set_dram_addr_high +ffffffff81fe75a0 T dcn31_smu_set_dram_addr_low +ffffffff81fe75e0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff81fe7620 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff81fe7660 T dcn31_smu_set_zstate_support +ffffffff81fe76d0 T dcn31_smu_set_dtbclk +ffffffff81fe8000 T dcn314_update_clocks +ffffffff81fe8650 T dcn314_are_clock_states_equal +ffffffff81fe86b0 T dcn314_clk_mgr_construct +ffffffff81fe93c0 T dcn314_clk_mgr_destroy +ffffffff81fe9410 t dcn314_enable_pme_wa +ffffffff81fe9420 t dcn314_notify_wm_ranges +ffffffff81fea000 T dcn314_smu_get_smu_version +ffffffff81fea020 t dcn314_smu_send_msg_with_param +ffffffff81fea250 T dcn314_smu_set_dispclk +ffffffff81fea2c0 T dcn314_smu_set_dprefclk +ffffffff81fea330 T dcn314_smu_set_hard_min_dcfclk +ffffffff81fea3b0 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81fea430 T dcn314_smu_set_dppclk +ffffffff81fea4a0 T dcn314_smu_set_display_idle_optimization +ffffffff81fea4f0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81fea540 T dcn314_smu_enable_pme_wa +ffffffff81fea580 T dcn314_smu_set_dram_addr_high +ffffffff81fea5c0 T dcn314_smu_set_dram_addr_low +ffffffff81fea600 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81fea640 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81fea680 T dcn314_smu_set_zstate_support +ffffffff81fea6d0 T dcn314_smu_set_dtbclk +ffffffff81feb000 T dcn315_clk_mgr_construct +ffffffff81feb810 T dcn315_clk_mgr_destroy +ffffffff81feb860 t dcn315_update_clocks +ffffffff81febda0 t dcn315_enable_pme_wa +ffffffff81febdb0 t dcn315_notify_wm_ranges +ffffffff81fec130 t dcn315_disable_otg_wa +ffffffff81fed000 T dcn315_smu_get_smu_version +ffffffff81fed020 t dcn315_smu_send_msg_with_param +ffffffff81fed310 T dcn315_smu_set_dispclk +ffffffff81fed380 T dcn315_smu_set_hard_min_dcfclk +ffffffff81fed400 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81fed480 T dcn315_smu_set_dppclk +ffffffff81fed4f0 T dcn315_smu_set_display_idle_optimization +ffffffff81fed540 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81fed590 T dcn315_smu_enable_pme_wa +ffffffff81fed5d0 T dcn315_smu_set_dram_addr_high +ffffffff81fed610 T dcn315_smu_set_dram_addr_low +ffffffff81fed650 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81fed690 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81fed6d0 T dcn315_smu_get_dpref_clk +ffffffff81fed730 T dcn315_smu_get_dtbclk +ffffffff81fed790 T dcn315_smu_set_dtbclk +ffffffff81fee000 T dcn316_clk_mgr_construct +ffffffff81fee650 T dcn316_clk_mgr_destroy +ffffffff81fee6a0 t dcn316_update_clocks +ffffffff81feec90 t dcn316_enable_pme_wa +ffffffff81feeca0 t dcn316_notify_wm_ranges +ffffffff81fef020 t find_clk_for_voltage +ffffffff81ff0000 T dcn316_smu_get_smu_version +ffffffff81ff0020 t dcn316_smu_send_msg_with_param +ffffffff81ff01b0 T dcn316_smu_set_dispclk +ffffffff81ff0220 T dcn316_smu_set_hard_min_dcfclk +ffffffff81ff02a0 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff81ff0320 T dcn316_smu_set_dppclk +ffffffff81ff0390 T dcn316_smu_set_display_idle_optimization +ffffffff81ff03e0 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff81ff0430 T dcn316_smu_set_dram_addr_high +ffffffff81ff0470 T dcn316_smu_set_dram_addr_low +ffffffff81ff04b0 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff81ff04f0 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff81ff0530 T dcn316_smu_enable_pme_wa +ffffffff81ff0570 T dcn316_smu_set_dtbclk +ffffffff81ff05b0 T dcn316_smu_get_dpref_clk +ffffffff81ff0610 T dcn316_smu_get_smu_fclk +ffffffff81ff1000 T dcn32_init_clocks +ffffffff81ff1560 T dcn32_update_clocks_update_dpp_dto +ffffffff81ff16a0 T dcn32_clk_mgr_construct +ffffffff81ff1940 t dcn32_dump_clk_registers +ffffffff81ff1b60 T dcn32_clk_mgr_destroy +ffffffff81ff1bc0 t dcn32_update_clocks +ffffffff81ff2420 t dcn32_enable_pme_wa +ffffffff81ff2460 t dcn32_are_clock_states_equal +ffffffff81ff24d0 t dcn32_notify_wm_ranges +ffffffff81ff2650 t dcn32_set_hard_min_memclk +ffffffff81ff26e0 t dcn32_set_hard_max_memclk +ffffffff81ff2730 t dcn32_set_max_memclk +ffffffff81ff2770 t dcn32_set_min_memclk +ffffffff81ff27b0 t dcn32_get_memclk_states_from_smu +ffffffff81ff2a00 t dcn32_is_smu_present +ffffffff81ff2a30 t dcn32_get_dispclk_from_dentist +ffffffff81ff2ac0 t dcn32_update_clocks_update_dentist +ffffffff81ff3000 T dcn32_smu_send_fclk_pstate_message +ffffffff81ff3020 t dcn32_smu_send_msg_with_param +ffffffff81ff3160 T dcn32_smu_send_cab_for_uclk_message +ffffffff81ff3190 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff81ff31b0 T dcn32_smu_set_pme_workaround +ffffffff81ff31d0 T dcn32_smu_set_hard_min_by_freq +ffffffff81ff3220 T dcn32_smu_wait_for_dmub_ack_mclk +ffffffff81ff4000 T dc_stream_adjust_vmin_vmax +ffffffff81ff4170 T dc_stream_get_last_used_drr_vtotal +ffffffff81ff42d0 T dc_stream_get_crtc_position +ffffffff81ff4500 T dc_stream_configure_crc +ffffffff81ff4670 T dc_stream_get_crc +ffffffff81ff4750 T dc_stream_set_dyn_expansion +ffffffff81ff49c0 T dc_stream_set_dither_option +ffffffff81ff4b60 T dc_stream_set_gamut_remap +ffffffff81ff4ce0 T dc_stream_program_csc_matrix +ffffffff81ff4f00 T dc_stream_set_static_screen_params +ffffffff81ff5080 T dc_create +ffffffff81ff5600 t dc_construct_ctx +ffffffff81ff5770 t dc_destruct +ffffffff81ff5a40 T dc_hardware_init +ffffffff81ff5b10 T dc_init_callbacks +ffffffff81ff5b60 T dc_deinit_callbacks +ffffffff81ff5bb0 T dc_destroy +ffffffff81ff5c00 T dc_validate_boot_timing +ffffffff81ff5fa0 T dc_enable_stereo +ffffffff81ff60a0 T dc_trigger_sync +ffffffff81ff66d0 T dc_z10_restore +ffffffff81ff6710 T dc_z10_save_init +ffffffff81ff6750 T dc_commit_streams +ffffffff81ff6c30 t commit_minimal_transition_state +ffffffff81ff7060 T dc_create_state +ffffffff81ff70f0 t dc_commit_state_no_check +ffffffff81ff8780 T dc_release_state +ffffffff81ff87e0 T dc_acquire_release_mpc_3dlut +ffffffff81ff88b0 T dc_post_update_surfaces_to_stream +ffffffff81ff8cc0 T dc_copy_state +ffffffff81ff8e90 T dc_retain_state +ffffffff81ff8ec0 T dc_set_generic_gpio_for_stereo +ffffffff81ff8fd0 T dc_check_update_surfaces_for_stream +ffffffff81ff99b0 T dc_dmub_update_dirty_rect +ffffffff81ff9bc0 T dc_update_planes_and_stream +ffffffff81ffa740 t fast_update_only +ffffffff81ffaaa0 t commit_planes_for_stream_fast +ffffffff81ffaec0 t commit_planes_for_stream +ffffffff81ffc440 T dc_commit_updates_for_stream +ffffffff81ffca60 t copy_surface_update_to_plane +ffffffff81ffce70 t copy_stream_update_to_stream +ffffffff81ffd510 T dc_get_current_stream_count +ffffffff81ffd550 T dc_get_stream_at_index +ffffffff81ffd5a0 T dc_interrupt_to_irq_source +ffffffff81ffd5c0 T dc_interrupt_set +ffffffff81ffd610 T dc_interrupt_ack +ffffffff81ffd630 T dc_power_down_on_boot +ffffffff81ffd680 T dc_set_power_state +ffffffff81ffd860 T dc_resume +ffffffff81ffd8e0 T dc_is_dmcu_initialized +ffffffff81ffd930 T get_clock_requirements_for_state +ffffffff81ffd9b0 T dc_set_clock +ffffffff81ffd9f0 T dc_get_clock +ffffffff81ffda30 T dc_set_psr_allow_active +ffffffff81ffdb30 T dc_allow_idle_optimizations +ffffffff81ffdbd0 T dc_unlock_memory_clock_frequency +ffffffff81ffdc40 T dc_lock_memory_clock_frequency +ffffffff81ffdcd0 T dc_enable_dcmode_clk_limit +ffffffff81ffde90 t blank_and_force_memclk +ffffffff81ffe070 T dc_is_plane_eligible_for_idle_optimizations +ffffffff81ffe0c0 T dc_hardware_release +ffffffff81ffe110 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff81ffe150 T dc_is_dmub_outbox_supported +ffffffff81ffe1c0 T dc_enable_dmub_notifications +ffffffff81ffe230 T dc_enable_dmub_outbox +ffffffff81ffe270 T dc_process_dmub_aux_transfer_async +ffffffff81ffe3f0 T get_link_index_from_dpia_port_index +ffffffff81ffe4a0 T dc_process_dmub_set_config_async +ffffffff81ffe580 T dc_process_dmub_set_mst_slots +ffffffff81ffe670 T dc_process_dmub_dpia_hpd_int_enable +ffffffff81ffe730 T dc_print_dmub_diagnostic_data +ffffffff81ffe750 T dc_disable_accelerated_mode +ffffffff81ffe770 T dc_notify_vsync_int_state +ffffffff81ffe990 T dc_abm_save_restore +ffffffff81ffeb60 T dc_query_current_properties +ffffffff81ffebd0 T dc_set_edp_power +ffffffff81ffec40 t create_links +ffffffff81fff0a0 t create_link_encoders +ffffffff81fff180 t dc_update_viusal_confirm_color +ffffffff82000000 T pre_surface_trace +ffffffff82000030 T update_surface_trace +ffffffff82000060 T post_surface_trace +ffffffff82000090 T context_timing_trace +ffffffff82000240 T context_clock_trace +ffffffff82000270 T dc_status_to_str +ffffffff82001000 T find_color_matrix +ffffffff820010b0 T color_space_to_black_color +ffffffff82001120 T hwss_wait_for_blank_complete +ffffffff820011c0 T get_mpctree_visual_confirm_color +ffffffff82001220 T get_surface_visual_confirm_color +ffffffff820012d0 T get_hdr_visual_confirm_color +ffffffff82001390 T get_subvp_visual_confirm_color +ffffffff82001490 T hwss_build_fast_sequence +ffffffff82001b50 T hwss_execute_sequence +ffffffff82001f40 T hwss_setup_dpp +ffffffff82001fe0 T hwss_program_bias_and_scale +ffffffff82002060 T hwss_program_manual_trigger +ffffffff820020b0 T hwss_power_on_mpc_mem_pwr +ffffffff82002100 T hwss_set_output_csc +ffffffff82002150 T hwss_set_ocsc_default +ffffffff820021a0 T hwss_send_dmcub_cmd +ffffffff820021c0 T get_mclk_switch_visual_confirm_color +ffffffff82002320 T get_surface_tile_visual_confirm_color +ffffffff82003000 T link_enc_cfg_init +ffffffff820031b0 T link_enc_cfg_copy +ffffffff820031e0 T link_enc_cfg_link_encs_assign +ffffffff820045a0 T link_enc_cfg_validate +ffffffff82004d40 T link_enc_cfg_link_enc_unassign +ffffffff82004ed0 T link_enc_cfg_is_transmitter_mappable +ffffffff82004ff0 T link_enc_cfg_get_stream_using_link_enc +ffffffff820050f0 T link_enc_cfg_get_link_using_link_enc +ffffffff82005200 T link_enc_cfg_get_link_enc_used_by_link +ffffffff82005380 T link_enc_cfg_get_next_avail_link_enc +ffffffff820054f0 T link_enc_cfg_get_link_enc_used_by_stream +ffffffff82005510 T link_enc_cfg_get_link_enc +ffffffff820055a0 T link_enc_cfg_get_link_enc_used_by_stream_current +ffffffff82005720 T link_enc_cfg_is_link_enc_avail +ffffffff82005920 T link_enc_cfg_set_transient_mode +ffffffff82006000 T dc_get_link_at_index +ffffffff82006030 T dc_get_edp_links +ffffffff820060b0 T dc_get_edp_link_panel_inst +ffffffff82006170 T dc_link_detect +ffffffff820061a0 T dc_link_detect_connection_type +ffffffff820061d0 T dc_link_get_status +ffffffff82006200 T dc_link_is_hdcp14 +ffffffff82006230 T dc_link_is_hdcp22 +ffffffff82006260 T dc_link_clear_dprx_states +ffffffff82006290 T dc_link_reset_cur_dp_mst_topology +ffffffff820062c0 T dc_link_bandwidth_kbps +ffffffff820062f0 T dc_get_cur_link_res_map +ffffffff82006310 T dc_restore_link_res_map +ffffffff82006330 T dc_link_update_dsc_config +ffffffff82006360 T dc_is_oem_i2c_device_present +ffffffff820063b0 T dc_submit_i2c +ffffffff820063e0 T dc_submit_i2c_oem +ffffffff82006430 T dc_link_dp_handle_automated_test +ffffffff82006460 T dc_link_dp_set_test_pattern +ffffffff82006490 T dc_link_set_drive_settings +ffffffff82006520 T dc_link_set_preferred_link_settings +ffffffff82006540 T dc_link_set_preferred_training_settings +ffffffff82006570 T dc_dp_trace_is_initialized +ffffffff820065a0 T dc_dp_trace_set_is_logged_flag +ffffffff820065d0 T dc_dp_trace_is_logged +ffffffff82006600 T dc_dp_trace_get_lt_end_timestamp +ffffffff82006630 T dc_dp_trace_get_lt_counts +ffffffff82006660 T dc_dp_trace_get_link_loss_count +ffffffff82006690 T dc_link_add_remote_sink +ffffffff820066c0 T dc_link_remove_remote_sink +ffffffff820066f0 T dc_link_aux_transfer_raw +ffffffff82006720 T dc_link_bw_kbps_from_raw_frl_link_rate_data +ffffffff82006740 T dc_link_decide_edp_link_settings +ffffffff82006770 T dc_link_dp_get_max_link_enc_cap +ffffffff820067a0 T dc_link_dp_mst_decide_link_encoding_format +ffffffff820067d0 T dc_link_get_link_cap +ffffffff82006800 T dc_link_get_highest_encoding_format +ffffffff820068c0 T dc_link_is_dp_sink_present +ffffffff820068f0 T dc_link_is_fec_supported +ffffffff82006920 T dc_link_overwrite_extended_receiver_cap +ffffffff82006950 T dc_link_should_enable_fec +ffffffff82006980 T dc_link_dp_dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff820069b0 T dc_link_handle_usb4_bw_alloc_response +ffffffff820069e0 T dc_link_check_link_loss_status +ffffffff82006a10 T dc_link_dp_allow_hpd_rx_irq +ffffffff82006a40 T dc_link_dp_handle_link_loss +ffffffff82006a70 T dc_link_dp_read_hpd_rx_irq_data +ffffffff82006aa0 T dc_link_handle_hpd_rx_irq +ffffffff82006ad0 T dc_link_dp_receiver_power_ctrl +ffffffff82006b00 T dc_link_decide_lttpr_mode +ffffffff82006b30 T dc_link_edp_panel_backlight_power_on +ffffffff82006b60 T dc_link_get_backlight_level +ffffffff82006b90 T dc_link_get_backlight_level_nits +ffffffff82006bc0 T dc_link_set_backlight_level +ffffffff82006bf0 T dc_link_set_backlight_level_nits +ffffffff82006c20 T dc_link_get_target_backlight_pwm +ffffffff82006c50 T dc_link_get_psr_state +ffffffff82006c80 T dc_link_set_psr_allow_active +ffffffff82006cb0 T dc_link_setup_psr +ffffffff82006ce0 T dc_link_get_replay_state +ffffffff82006d10 T dc_link_wait_for_t12 +ffffffff82006d40 T dc_link_get_hpd_state +ffffffff82006d70 T dc_link_enable_hpd +ffffffff82006da0 T dc_link_disable_hpd +ffffffff82006dd0 T dc_link_enable_hpd_filter +ffffffff82006e00 T dc_link_validate +ffffffff82007000 T resource_parse_asic_id +ffffffff82007250 T dc_create_resource_pool +ffffffff82007550 T dc_destroy_resource_pool +ffffffff820075c0 T resource_construct +ffffffff82007aa0 T resource_unreference_clock_source +ffffffff82007b20 T resource_reference_clock_source +ffffffff82007ba0 T resource_get_clock_source_reference +ffffffff82007c20 T resource_are_vblanks_synchronizable +ffffffff82007e40 T resource_are_streams_timing_synchronizable +ffffffff82007f30 T resource_find_used_clk_src_for_sharing +ffffffff82008060 T resource_get_num_mpc_splits +ffffffff820080f0 T resource_get_num_odm_splits +ffffffff820081b0 T resource_get_otg_master +ffffffff82008250 T resource_build_scaling_params +ffffffff82008fe0 t calculate_odm_slice_in_timing_active +ffffffff82009160 T resource_build_scaling_params_for_context +ffffffff820092b0 T resource_find_free_secondary_pipe_legacy +ffffffff82009350 T resource_find_free_pipe_used_in_cur_mpc_blending_tree +ffffffff820093c0 T resource_is_pipe_type +ffffffff82009440 T recource_find_free_pipe_not_used_in_cur_res_ctx +ffffffff820094c0 T resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine +ffffffff820095e0 T resource_is_for_mpcc_combine +ffffffff82009670 T resource_find_any_free_pipe +ffffffff820096e0 T resource_get_otg_master_for_stream +ffffffff82009810 T resource_get_opp_head +ffffffff820098a0 T dc_add_plane_to_context +ffffffff82009b60 T dc_remove_plane_from_context +ffffffff82009d40 T dc_rem_all_planes_for_stream +ffffffff82009f00 T dc_add_all_planes_for_stream +ffffffff8200a080 T dc_is_timing_changed +ffffffff8200a0e0 T dc_is_stream_unchanged +ffffffff8200a1c0 T dc_is_stream_scaling_unchanged +ffffffff8200a260 T update_audio_usage +ffffffff8200a2d0 T dc_add_stream_to_ctx +ffffffff8200a3a0 T dc_remove_stream_from_ctx +ffffffff8200a7b0 T resource_map_pool_resources +ffffffff8200b210 t acquire_first_split_pipe +ffffffff8200b380 t add_hpo_dp_link_enc_to_ctx +ffffffff8200b450 t find_first_free_audio +ffffffff8200b500 T dc_resource_state_copy_construct_current +ffffffff8200b520 T dc_resource_state_copy_construct +ffffffff8200b6c0 T dc_resource_state_construct +ffffffff8200b6e0 T dc_resource_is_dsc_encoding_supported +ffffffff8200b730 T dc_validate_with_context +ffffffff8200c360 t planes_changed_for_existing_stream +ffffffff8200c4e0 T dc_validate_global_state +ffffffff8200c860 T dc_resource_state_destruct +ffffffff8200c940 T dc_resource_find_first_free_pll +ffffffff8200c9b0 T resource_build_info_frame +ffffffff8200d0e0 T resource_map_clock_resources +ffffffff8200d270 T pipe_need_reprogram +ffffffff8200d3e0 T resource_build_bit_depth_reduction_params +ffffffff8200d610 T dc_validate_stream +ffffffff8200d7e0 T dc_validate_plane +ffffffff8200d870 T resource_pixel_format_to_bpp +ffffffff8200d8f0 T get_audio_check +ffffffff8200da10 T get_temp_dp_link_res +ffffffff8200db20 T reset_syncd_pipes_from_disabled_pipes +ffffffff8200dc70 T check_syncd_pipes_for_disabled_master_pipe +ffffffff8200ddb0 T reset_sync_context_for_pipe +ffffffff8200de60 T resource_transmitter_to_phy_idx +ffffffff8200dec0 T get_link_hwss +ffffffff8200df50 T is_h_timing_divisible_by_2 +ffffffff8200dfb0 T dc_resource_acquire_secondary_pipe_for_mpc_odm +ffffffff8200e1c0 T update_dp_encoder_resources_for_test_harness +ffffffff8200e480 t calculate_plane_rec_in_timing_active +ffffffff8200e750 t calculate_init_and_vp +ffffffff8200f000 T dc_sink_retain +ffffffff8200f030 T dc_sink_release +ffffffff8200f0a0 T dc_sink_create +ffffffff82010000 T dc_stat_get_dmub_notification +ffffffff820100b0 T dc_stat_get_dmub_dataout +ffffffff82011000 T update_stream_signal +ffffffff82011080 T dc_stream_retain +ffffffff820110b0 T dc_stream_release +ffffffff82011130 T dc_create_stream_for_sink +ffffffff82011470 T dc_copy_stream +ffffffff82011540 T dc_stream_get_status_from_state +ffffffff820115a0 T dc_stream_get_status +ffffffff82011610 T dc_optimize_timing_for_fsft +ffffffff82011660 T dc_stream_set_cursor_attributes +ffffffff82011860 t program_cursor_attributes +ffffffff820119c0 T dc_stream_set_cursor_position +ffffffff82011ae0 t program_cursor_position +ffffffff82011c20 T dc_stream_add_writeback +ffffffff82011e30 T dc_stream_remove_writeback +ffffffff82011f60 T dc_stream_warmup_writeback +ffffffff82011fa0 T dc_stream_get_vblank_counter +ffffffff82012070 T dc_stream_send_dp_sdp +ffffffff82012300 T dc_stream_get_scanoutpos +ffffffff820123e0 T dc_stream_dmdata_status_done +ffffffff820124a0 T dc_stream_set_dynamic_metadata +ffffffff82012600 T dc_stream_add_dsc_to_resource +ffffffff82012650 T dc_stream_get_pipe_ctx +ffffffff82012700 T dc_stream_log +ffffffff82013000 T enable_surface_flip_reporting +ffffffff82013030 T dc_create_plane_state +ffffffff820131d0 T dc_plane_get_status +ffffffff82013350 T dc_plane_state_retain +ffffffff82013380 T dc_plane_state_release +ffffffff820134d0 T dc_gamma_retain +ffffffff82013500 T dc_gamma_release +ffffffff82013560 T dc_create_gamma +ffffffff820135b0 T dc_transfer_func_retain +ffffffff820135e0 T dc_transfer_func_release +ffffffff82013630 T dc_create_transfer_func +ffffffff82013680 T dc_create_3dlut_func +ffffffff820136e0 T dc_3dlut_func_release +ffffffff82013730 T dc_3dlut_func_retain +ffffffff82014000 T vm_helper_mark_vmid_used +ffffffff82014030 T dc_setup_system_context +ffffffff820140c0 T dc_setup_vm_context +ffffffff820140f0 T dc_get_vmid_use_vector +ffffffff82014150 T vm_helper_init +ffffffff82015000 T dc_dmub_srv_create +ffffffff820150a0 T dc_dmub_srv_destroy +ffffffff820150f0 T dc_dmub_srv_wait_idle +ffffffff82015150 T dc_dmub_srv_log_diagnostic_data +ffffffff82015690 T dc_dmub_srv_clear_inbox0_ack +ffffffff820156f0 T dc_dmub_srv_wait_for_inbox0_ack +ffffffff82015750 T dc_dmub_srv_send_inbox0_cmd +ffffffff820157b0 T dc_dmub_srv_cmd_run +ffffffff820157d0 T dc_dmub_srv_cmd_run_list +ffffffff82015980 T dc_dmub_srv_optimized_init_done +ffffffff82015a00 T dc_dmub_srv_notify_stream_mask +ffffffff82015a60 T dc_dmub_srv_is_restore_required +ffffffff82015ae0 T dc_dmub_srv_get_dmub_outbox0_msg +ffffffff82015b10 T dc_dmub_trace_event_control +ffffffff82015b30 T dc_dmub_srv_drr_update_cmd +ffffffff82015bc0 T dc_dmub_srv_set_drr_manual_trigger_cmd +ffffffff82015c50 T dc_dmub_srv_p_state_delegate +ffffffff82016000 T dc_dmub_srv_query_caps_cmd +ffffffff820160c0 T dc_dmub_srv_get_visual_confirm_color_cmd +ffffffff820161a0 T dc_dmub_setup_subvp_dmub_command +ffffffff82016bb0 T dc_dmub_srv_get_diagnostic_data +ffffffff82016bf0 T dc_send_update_cursor_info_to_dmu +ffffffff82016f60 T dc_dmub_check_min_version +ffffffff82016fa0 T dc_dmub_srv_enable_dpia_trace +ffffffff82018000 T dc_edid_parser_send_cea +ffffffff820180b0 T dc_edid_parser_recv_cea_ack +ffffffff82018140 T dc_edid_parser_recv_amd_vsdb +ffffffff82019000 T generic_reg_update_ex +ffffffff82019330 t set_reg_field_values +ffffffff820194e0 T generic_reg_set_ex +ffffffff820196d0 T generic_reg_get +ffffffff82019740 T generic_reg_get2 +ffffffff820197d0 T generic_reg_get3 +ffffffff82019870 T generic_reg_get4 +ffffffff82019920 T generic_reg_get5 +ffffffff820199e0 T generic_reg_get6 +ffffffff82019ac0 T generic_reg_get7 +ffffffff82019bb0 T generic_reg_get8 +ffffffff82019cc0 T generic_reg_wait +ffffffff82019f10 T generic_write_indirect_reg +ffffffff82019f60 T generic_read_indirect_reg +ffffffff8201a000 T generic_indirect_reg_get +ffffffff8201a1b0 T generic_indirect_reg_update_ex +ffffffff8201a3c0 T generic_indirect_reg_update_ex_sync +ffffffff8201a5b0 T generic_indirect_reg_get_sync +ffffffff8201a6e0 T reg_sequence_start_gather +ffffffff8201a770 T reg_sequence_start_execute +ffffffff8201a910 T reg_sequence_wait_done +ffffffff8201a970 T dce_version_to_string +ffffffff8201b000 T dce_abm_create +ffffffff8201b0b0 T dce_abm_destroy +ffffffff8201b100 t dce_abm_init +ffffffff8201b380 t dce_abm_set_level +ffffffff8201b480 t dce_abm_immediate_disable +ffffffff8201b4d0 t dce_abm_set_pipe +ffffffff8201b620 t dce_abm_set_backlight_level_pwm +ffffffff8201b810 t dce_abm_get_current_backlight +ffffffff8201b840 t dce_abm_get_target_backlight +ffffffff8201c000 T dce_aud_az_enable +ffffffff8201c150 T dce_aud_az_disable +ffffffff8201c340 T dce_aud_az_configure +ffffffff8201cfc0 t check_audio_bandwidth +ffffffff8201d150 T dce_aud_wall_dto_setup +ffffffff8201d2d0 T dce_aud_hw_init +ffffffff8201d4a0 T dce_aud_destroy +ffffffff8201d4f0 T dce_audio_create +ffffffff8201d5b0 t dce_aud_endpoint_valid +ffffffff8201e000 T dce110_engine_destroy +ffffffff8201e050 T dce110_aux_engine_construct +ffffffff8201e0d0 t dce_aux_configure_timeout +ffffffff8201e2b0 T dce_aux_transfer_raw +ffffffff8201eae0 t acquire +ffffffff8201ed50 T dce_aux_transfer_dmub_raw +ffffffff8201ee50 T dce_aux_transfer_with_retries +ffffffff82020000 T look_up_in_video_optimized_rate_tlb +ffffffff82020070 T dce110_clk_src_construct +ffffffff82020270 t calc_pll_max_vco_construct +ffffffff82020410 T dce112_clk_src_construct +ffffffff820204a0 T dcn20_clk_src_construct +ffffffff82020550 T dcn3_clk_src_construct +ffffffff82020600 T dcn31_clk_src_construct +ffffffff820206b0 T dcn301_clk_src_construct +ffffffff82020760 t dce110_clock_source_power_down +ffffffff820207f0 t dce110_program_pix_clk +ffffffff82020e80 t dce110_get_pix_clk_dividers +ffffffff82021500 t get_pixel_clk_frequency_100hz +ffffffff82021610 t get_ss_info_from_atombios +ffffffff820218e0 t dce112_program_pix_clk +ffffffff82021af0 t dce112_get_pix_clk_dividers +ffffffff82021c00 t dcn20_program_pix_clk +ffffffff82021c90 t dcn20_override_dp_pix_clk +ffffffff82021d80 t dcn3_program_pix_clk +ffffffff82021f30 t dcn3_get_pix_clk_dividers +ffffffff82022000 t dcn31_program_pix_clk +ffffffff82023000 T dce_dmcu_create +ffffffff820230c0 T dcn10_dmcu_create +ffffffff82023180 T dcn20_dmcu_create +ffffffff82023240 T dcn21_dmcu_create +ffffffff82023330 T dce_dmcu_destroy +ffffffff82023380 t dce_dmcu_init +ffffffff820233b0 t dce_dmcu_load_iram +ffffffff82023510 t dce_dmcu_set_psr_enable +ffffffff82023640 t dce_dmcu_setup_psr +ffffffff82023970 t dce_get_dmcu_psr_state +ffffffff82023a50 t dce_psr_wait_loop +ffffffff82023b80 t dce_get_psr_wait_loop +ffffffff82023bb0 t dce_is_dmcu_initialized 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dce110_psr_program_secondary_packet +ffffffff8202c240 T dce110_is_dig_enabled +ffffffff8202c2a0 T dce110_link_encoder_validate_dvi_output +ffffffff8202c350 T dce110_link_encoder_validate_dp_output +ffffffff8202c380 T dce110_link_encoder_construct +ffffffff8202c550 T dce110_link_encoder_validate_output_with_stream +ffffffff8202c700 T dce110_link_encoder_hw_init +ffffffff8202c920 T dce110_link_encoder_destroy +ffffffff8202c970 T dce110_link_encoder_setup +ffffffff8202caa0 T dce110_link_encoder_enable_tmds_output +ffffffff8202cb90 T dce110_link_encoder_enable_lvds_output +ffffffff8202cc80 T dce110_link_encoder_enable_dp_output +ffffffff8202cde0 T dce110_link_encoder_enable_dp_mst_output +ffffffff8202cf40 T dce110_link_encoder_disable_output +ffffffff8202d150 T dce110_link_encoder_dp_set_lane_settings +ffffffff8202d2f0 T dce110_link_encoder_dp_set_phy_pattern +ffffffff8202daf0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff8202dd10 T dce110_link_encoder_update_mst_stream_allocation_table +ffffffff8202df80 T dce110_link_encoder_connect_dig_be_to_fe +ffffffff8202e0b0 T dce110_link_encoder_enable_hpd +ffffffff8202e0e0 T dce110_link_encoder_disable_hpd +ffffffff8202e110 T dce110_link_encoder_get_max_link_cap +ffffffff8202f000 T dce_mem_input_construct +ffffffff8202f060 T dce112_mem_input_construct +ffffffff8202f0c0 T dce120_mem_input_construct +ffffffff8202f120 t dce_mi_program_display_marks +ffffffff8202f3f0 t dce_mi_allocate_dmif +ffffffff8202f630 t dce_mi_free_dmif +ffffffff8202f790 t dce_mi_program_surface_flip_and_addr +ffffffff8202fab0 t dce_mi_program_pte_vm +ffffffff8202fc70 t dce_mi_program_surface_config +ffffffff820304f0 t dce_mi_is_flip_pending +ffffffff82030580 t program_nbp_watermark +ffffffff82030780 t dce112_mi_program_display_marks +ffffffff82030c90 t dce120_mi_program_display_marks +ffffffff82031150 t dce120_program_stutter_watermark +ffffffff82032000 T dce110_opp_set_clamping +ffffffff820322b0 T dce110_opp_program_bit_depth_reduction +ffffffff82032a80 T dce110_opp_program_clamping_and_pixel_encoding +ffffffff82032c20 T dce110_opp_set_dyn_expansion +ffffffff82032d70 T dce110_opp_program_fmt +ffffffff82032ef0 T dce110_opp_construct +ffffffff82032f50 T dce110_opp_destroy +ffffffff82033000 T dce_panel_cntl_construct +ffffffff82033060 t dce_panel_cntl_destroy +ffffffff820330b0 t dce_panel_cntl_hw_init +ffffffff820332f0 t dce_is_panel_backlight_on +ffffffff820333a0 t dce_is_panel_powered_on +ffffffff82033450 t dce_store_backlight_level +ffffffff820334f0 t dce_driver_set_backlight +ffffffff82033670 t dce_get_16_bit_backlight_from_pwm +ffffffff82034000 T get_filter_3tap_16p +ffffffff82034090 T get_filter_3tap_64p +ffffffff82034120 T get_filter_4tap_16p +ffffffff820341b0 T get_filter_4tap_64p +ffffffff82034240 T get_filter_5tap_64p +ffffffff820342d0 T get_filter_6tap_64p +ffffffff82034360 T get_filter_7tap_64p +ffffffff820343f0 T get_filter_8tap_64p +ffffffff82034480 T get_filter_2tap_16p +ffffffff820344b0 T get_filter_2tap_64p +ffffffff82035000 T dce110_se_audio_mute_control +ffffffff82035050 T dce110_se_dp_audio_setup +ffffffff82035060 t dce110_se_audio_setup +ffffffff820351c0 T dce110_se_dp_audio_enable +ffffffff82035400 T dce110_se_dp_audio_disable +ffffffff82035560 T dce110_se_hdmi_audio_setup +ffffffff82035a60 T dce110_se_hdmi_audio_disable +ffffffff82035ac0 T dce110_stream_encoder_construct +ffffffff82035b10 t dce110_stream_encoder_dp_set_stream_attribute +ffffffff82036160 t dce110_stream_encoder_hdmi_set_stream_attribute +ffffffff82036690 t dce110_stream_encoder_dvi_set_stream_attribute +ffffffff820367c0 t dce110_stream_encoder_lvds_set_stream_attribute +ffffffff820368a0 t dce110_stream_encoder_set_throttled_vcp_size +ffffffff82036aa0 t dce110_stream_encoder_update_hdmi_info_packets +ffffffff82037190 t dce110_stream_encoder_stop_hdmi_info_packets +ffffffff82037430 t dce110_stream_encoder_update_dp_info_packets +ffffffff820375c0 t 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dce_transform_set_pixel_storage_depth +ffffffff8203b120 t dce_transform_set_gamut_remap +ffffffff8203b460 t program_multi_taps_filter +ffffffff8203c000 T dmub_abm_create +ffffffff8203c0d0 T dmub_abm_destroy +ffffffff8203c120 t dmub_abm_init_ex +ffffffff8203c130 t dmub_abm_set_level_ex +ffffffff8203c1e0 t dmub_abm_set_backlight_level_pwm_ex +ffffffff8203c280 t dmub_abm_get_current_backlight_ex +ffffffff8203c290 t dmub_abm_get_target_backlight_ex +ffffffff8203c2a0 t dmub_abm_init_config_ex +ffffffff8203c330 t dmub_abm_set_pause_ex +ffffffff8203c3d0 t dmub_abm_save_restore_ex +ffffffff8203c460 t dmub_abm_set_pipe_ex +ffffffff8203d000 T dmub_abm_init +ffffffff8203d3c0 T dmub_abm_get_current_backlight +ffffffff8203d3f0 T dmub_abm_get_target_backlight +ffffffff8203d420 T dmub_abm_set_level +ffffffff8203d4b0 T dmub_abm_init_config +ffffffff8203d5b0 T dmub_abm_set_pause +ffffffff8203d650 T dmub_abm_save_restore +ffffffff8203d770 T dmub_abm_set_pipe +ffffffff8203d810 T dmub_abm_set_backlight_level +ffffffff8203e000 T dmub_hw_lock_mgr_cmd +ffffffff8203e0a0 T dmub_hw_lock_mgr_inbox0_cmd +ffffffff8203e0e0 T should_use_dmub_lock +ffffffff8203f000 T dmub_enable_outbox_notification +ffffffff82040000 T dmub_psr_create +ffffffff82040090 T dmub_psr_destroy +ffffffff820400e0 t dmub_psr_copy_settings +ffffffff820405d0 t dmub_psr_enable +ffffffff82040750 t dmub_psr_get_state +ffffffff82040a60 t dmub_psr_set_level +ffffffff82040b30 t dmub_psr_force_static +ffffffff82040bd0 t dmub_psr_get_residency +ffffffff82040c20 t dmub_psr_set_sink_vtotal_in_psr_active +ffffffff82040cc0 t dmub_psr_set_power_opt +ffffffff82041000 T dmub_replay_create +ffffffff82041090 T dmub_replay_destroy +ffffffff820410e0 t dmub_replay_get_state +ffffffff820411d0 t dmub_replay_enable +ffffffff820413f0 t dmub_replay_copy_settings +ffffffff820416b0 t dmub_replay_set_power_opt +ffffffff82041750 t dmub_replay_set_coasting_vtotal +ffffffff820417e0 t dmub_replay_residency +ffffffff82042000 T dce100_enable_display_power_gating +ffffffff820420a0 T dce100_prepare_bandwidth +ffffffff820420f0 T dce100_optimize_bandwidth +ffffffff82042140 T dce100_hw_sequencer_construct +ffffffff82043000 T dce100_add_stream_to_ctx +ffffffff820430a0 T dce100_validate_plane +ffffffff820430e0 T dce100_find_first_free_match_stream_enc_for_link +ffffffff82043190 T dce100_create_resource_pool +ffffffff82043f60 t dce100_resource_destruct +ffffffff82044220 t dce100_destroy_resource_pool +ffffffff82044280 t dce100_panel_cntl_create +ffffffff82044310 t dce100_link_encoder_create +ffffffff82044410 t dce100_validate_bandwidth +ffffffff82044550 t dce100_validate_global +ffffffff820445f0 t read_dce_straps +ffffffff82044660 t create_audio +ffffffff82044690 t dce100_stream_encoder_create +ffffffff82044730 t dce100_hwseq_create +ffffffff82045000 T dce110_compressor_power_up_fbc +ffffffff82045130 T dce110_compressor_enable_fbc +ffffffff82045340 T dce110_compressor_is_fbc_enabled_in_hw +ffffffff820453f0 T dce110_compressor_disable_fbc +ffffffff820456c0 T dce110_compressor_program_compressed_surface_address_and_pitch +ffffffff820457e0 T dce110_compressor_set_fbc_invalidation_triggers +ffffffff82045860 T dce110_compressor_create +ffffffff82045900 T dce110_compressor_construct +ffffffff82045980 T dce110_compressor_destroy +ffffffff820459d0 T get_max_support_fbc_buffersize +ffffffff82046000 T dce110_update_info_frame +ffffffff820460f0 T dce110_enable_stream +ffffffff82046190 T dce110_edp_wait_for_hpd_ready +ffffffff820463f0 T dce110_edp_power_control +ffffffff82046950 T dce110_edp_wait_for_T12 +ffffffff82046b00 T dce110_edp_backlight_control +ffffffff82046e60 T dce110_enable_audio_stream +ffffffff82046f20 T dce110_disable_audio_stream +ffffffff82046fe0 T dce110_disable_stream +ffffffff82047230 T dce110_unblank_stream +ffffffff82047330 T dce110_blank_stream +ffffffff820474a0 T dce110_set_avmute +ffffffff820474f0 T dce110_enable_accelerated_mode +ffffffff820478a0 t power_down_all_hw_blocks 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dce110_resource_destruct +ffffffff820514b0 t dce110_destroy_resource_pool +ffffffff82051510 t dce110_panel_cntl_create +ffffffff820515a0 t dce110_link_encoder_create +ffffffff820516a0 t dce110_validate_bandwidth +ffffffff82051790 t dce110_validate_global +ffffffff82051870 t dce110_acquire_underlay +ffffffff82051a50 t dce110_validate_plane +ffffffff82051ab0 t dce110_add_stream_to_ctx +ffffffff82051b80 t read_dce_straps +ffffffff82051bf0 t create_audio +ffffffff82051c20 t dce110_stream_encoder_create +ffffffff82051cc0 t dce110_hwseq_create +ffffffff82052000 T dce110_timing_generator_set_early_control +ffffffff82052070 T dce110_timing_generator_enable_crtc +ffffffff82052100 T dce110_timing_generator_program_blank_color +ffffffff82052190 T dce110_timing_generator_disable_crtc +ffffffff820521e0 T dce110_timing_generator_program_timing_generator +ffffffff820523d0 T dce110_timing_generator_set_drr +ffffffff82052510 T dce110_timing_generator_set_static_screen_control +ffffffff820525a0 T dce110_timing_generator_get_vblank_counter +ffffffff82052600 T dce110_timing_generator_get_position +ffffffff820526a0 T dce110_timing_generator_get_crtc_scanoutpos +ffffffff82052790 T dce110_timing_generator_program_blanking +ffffffff82052a00 T dce110_timing_generator_set_test_pattern +ffffffff82052cf0 T dce110_timing_generator_validate_timing +ffffffff82052db0 T dce110_timing_generator_wait_for_vblank +ffffffff82052f20 T dce110_timing_generator_is_counter_moving +ffffffff82052fa0 T dce110_timing_generator_wait_for_vactive +ffffffff82053080 T dce110_timing_generator_setup_global_swap_lock +ffffffff820531e0 T dce110_timing_generator_tear_down_global_swap_lock +ffffffff82053260 T dce110_timing_generator_enable_advanced_request +ffffffff82053300 T dce110_timing_generator_set_lock_master +ffffffff82053360 T dce110_timing_generator_enable_reset_trigger +ffffffff82053450 T dce110_timing_generator_enable_crtc_reset +ffffffff82053640 T dce110_timing_generator_disable_reset_trigger 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dce110_transform_v_construct +ffffffff82056060 t dce110_xfmv_reset +ffffffff820560c0 t dce110_xfmv_set_scaler +ffffffff82056800 t dce110_xfmv_set_pixel_storage_depth +ffffffff820568e0 t dce110_xfmv_set_gamut_remap +ffffffff82056910 t program_multi_taps_filter +ffffffff82056d00 t program_viewport +ffffffff82057000 T dce112_compressor_power_up_fbc +ffffffff82057130 T dce112_compressor_enable_fbc +ffffffff820572e0 T dce112_compressor_is_fbc_enabled_in_hw +ffffffff82057390 T dce112_compressor_enable_lpt +ffffffff820574b0 t wait_for_fbc_state_changed +ffffffff82057750 T dce112_compressor_disable_fbc +ffffffff82057850 T dce112_compressor_disable_lpt +ffffffff820579b0 T dce112_compressor_is_lpt_enabled_in_hw +ffffffff82057a00 T dce112_compressor_program_compressed_surface_address_and_pitch +ffffffff82057b40 T dce112_compressor_program_lpt_control +ffffffff82057db0 T dce112_compressor_set_fbc_invalidation_triggers +ffffffff82057e40 T dce112_compressor_construct +ffffffff82057f00 T dce112_compressor_create +ffffffff82057ff0 T dce112_compressor_destroy +ffffffff82059000 T dce112_hw_sequencer_construct +ffffffff82059050 t dce112_enable_display_power_gating +ffffffff8205a000 T dce112_validate_bandwidth +ffffffff8205a0c0 T resource_map_phy_clock_resources +ffffffff8205a230 T dce112_add_stream_to_ctx +ffffffff8205a2d0 T dce112_create_resource_pool +ffffffff8205b620 t dce112_resource_destruct +ffffffff8205b8e0 t dce112_destroy_resource_pool +ffffffff8205b940 t dce112_panel_cntl_create +ffffffff8205b9d0 t dce112_link_encoder_create +ffffffff8205bad0 t dce112_validate_global +ffffffff8205bb70 t read_dce_straps +ffffffff8205bbe0 t create_audio +ffffffff8205bc10 t dce112_stream_encoder_create +ffffffff8205bcb0 t dce112_hwseq_create +ffffffff8205c000 T dce121_xgmi_enabled +ffffffff8205c060 T dce120_hw_sequencer_construct +ffffffff8205c0c0 t dce120_enable_display_power_gating +ffffffff8205c0f0 t dce120_update_dchub +ffffffff8205d000 T dce120_create_resource_pool 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dce120_timing_generator_set_overscan_color_black +ffffffff8205f8e0 t dce120_timing_generator_program_blank_color +ffffffff8205f960 t dce120_tg_set_colors +ffffffff8205fa80 t dce120_timing_generator_disable_vga +ffffffff8205faf0 t dce120_timing_generator_did_triggered_reset_occur +ffffffff8205fb50 t dce120_timing_generator_setup_global_swap_lock +ffffffff8205fc80 t dce120_timing_generator_enable_reset_trigger +ffffffff8205fd90 t dce120_timing_generator_disable_reset_trigger +ffffffff8205fe40 t dce120_timing_generator_tear_down_global_swap_lock +ffffffff8205ff10 t dce120_timing_generator_enable_advanced_request +ffffffff8205ffb0 t dce120_timing_generator_set_drr +ffffffff82060180 t dce120_timing_generator_set_static_screen_control +ffffffff82060200 t dce120_timing_generator_set_test_pattern +ffffffff820606a0 t dce120_arm_vert_intr +ffffffff82060760 t dce120_is_tg_enabled +ffffffff820607c0 t dce120_configure_crc +ffffffff820609a0 t dce120_get_crc +ffffffff82061000 T dce80_hw_sequencer_construct +ffffffff82062000 T dce80_create_resource_pool +ffffffff82062e10 T dce81_create_resource_pool +ffffffff82063c10 T dce83_create_resource_pool +ffffffff820648f0 t dce80_resource_destruct +ffffffff82064ba0 t dce80_destroy_resource_pool +ffffffff82064c00 t dce80_panel_cntl_create +ffffffff82064c90 t dce80_link_encoder_create +ffffffff82064d90 t dce80_validate_bandwidth +ffffffff82064ed0 t dce80_validate_global +ffffffff82064f70 t read_dce_straps +ffffffff82064fe0 t create_audio +ffffffff82065010 t dce80_stream_encoder_create +ffffffff820650b0 t dce80_hwseq_create +ffffffff82066000 T dce80_timing_generator_construct +ffffffff82066090 t program_timing +ffffffff82066170 t dce80_timing_generator_enable_advanced_request +ffffffff82067000 T cm_helper_program_color_matrices +ffffffff820670c0 T cm_helper_program_xfer_func +ffffffff82067480 T cm_helper_convert_to_custom_float +ffffffff820678d0 T cm_helper_translate_curve_to_hw_format +ffffffff82068490 T cm_helper_translate_curve_to_degamma_hw_format +ffffffff82069000 T dpp_read_state +ffffffff82069270 T dpp1_get_optimal_number_of_taps +ffffffff82069410 T dpp_reset +ffffffff82069460 T dpp1_cnv_setup +ffffffff82069980 T dpp1_set_cursor_attributes +ffffffff82069ab0 T dpp1_set_cursor_position +ffffffff82069c00 T dpp1_cnv_set_optional_cursor_attributes +ffffffff82069cc0 T dpp1_dppclk_control +ffffffff82069dc0 T dpp1_construct +ffffffff82069e40 t dpp1_cm_set_regamma_pwl +ffffffff8206a000 T dpp1_cm_set_gamut_remap +ffffffff8206a1a0 T dpp1_cm_set_output_csc_default +ffffffff8206a220 t dpp1_cm_program_color_matrix +ffffffff8206a3e0 T dpp1_cm_set_output_csc_adjustment +ffffffff8206a3f0 T dpp1_cm_power_on_regamma_lut +ffffffff8206a470 T dpp1_cm_program_regamma_lut +ffffffff8206a680 T dpp1_cm_configure_regamma_lut +ffffffff8206a780 T dpp1_cm_program_regamma_luta_settings +ffffffff8206a920 T dpp1_cm_program_regamma_lutb_settings +ffffffff8206aac0 T dpp1_program_input_csc +ffffffff8206ad10 T dpp1_program_bias_and_scale +ffffffff8206ae80 T dpp1_program_degamma_lutb_settings +ffffffff8206b030 T dpp1_program_degamma_luta_settings +ffffffff8206b1e0 T dpp1_power_on_degamma_lut +ffffffff8206b260 T dpp1_set_degamma +ffffffff8206b450 T dpp1_degamma_ram_select +ffffffff8206b4b0 T dpp1_program_degamma_lut +ffffffff8206b7d0 T dpp1_set_degamma_pwl +ffffffff8206b9a0 T dpp1_full_bypass +ffffffff8206bb40 T dpp1_program_input_lut +ffffffff8206c1e0 T dpp1_set_hdr_multiplier +ffffffff8206d000 T dpp1_dscl_calc_lb_num_partitions +ffffffff8206d1e0 T dpp1_dscl_is_lb_conf_valid +ffffffff8206d220 T dpp1_dscl_set_scaler_manual_scale +ffffffff8206e640 t dpp1_dscl_get_filter_coeffs_64p +ffffffff8206e710 t dpp1_dscl_set_scaler_filter +ffffffff8206f000 t dwb1_get_caps +ffffffff8206f0a0 t dwb1_enable +ffffffff8206f1a0 t dwb1_disable +ffffffff8206f300 T dcn10_dwbc_construct +ffffffff82070000 T hubbub1_wm_read_state +ffffffff82070320 T hubbub1_allow_self_refresh_control +ffffffff820703a0 T hubbub1_is_allow_self_refresh_enabled +ffffffff82070410 T hubbub1_verify_allow_pstate_change_high +ffffffff820705d0 T hubbub1_wm_change_req_wa +ffffffff82070670 T hubbub1_program_urgent_watermarks +ffffffff82070a50 T hubbub1_program_stutter_watermarks +ffffffff82070eb0 T hubbub1_program_pstate_watermarks +ffffffff82071100 T hubbub1_program_watermarks +ffffffff82071230 T hubbub1_update_dchub +ffffffff82071460 T hubbub1_toggle_watermark_change_req +ffffffff82071500 T hubbub1_soft_reset +ffffffff82071540 T hubbub1_construct +ffffffff820715a0 t hubbub1_get_dcc_compression_cap +ffffffff820717c0 t hubbub1_dcc_support_swizzle +ffffffff82071850 t hubbub1_dcc_support_pixel_format +ffffffff82072000 T hubp1_set_blank +ffffffff82072110 T hubp1_clear_underflow +ffffffff82072160 T hubp1_vready_workaround +ffffffff820721f0 T hubp1_program_tiling +ffffffff82072450 T hubp1_program_size +ffffffff820725d0 T hubp1_program_rotation +ffffffff82072740 T hubp1_program_pixel_format +ffffffff82072d10 T hubp1_program_surface_flip_and_addr +ffffffff82073590 T hubp1_dcc_control +ffffffff82073650 T hubp1_program_surface_config +ffffffff82073760 T hubp1_program_requestor +ffffffff82073b30 T hubp1_program_deadline +ffffffff82074240 T hubp1_is_flip_pending +ffffffff82074350 T min_set_viewport +ffffffff82074650 T hubp1_read_state_common +ffffffff82075340 T hubp1_read_state +ffffffff82075610 T hubp1_get_cursor_pitch +ffffffff820756b0 T hubp1_cursor_set_attributes +ffffffff82075960 T hubp1_cursor_set_position +ffffffff82075cc0 T hubp1_clk_cntl +ffffffff82075d10 T hubp1_vtg_sel +ffffffff82075d50 T hubp1_in_blank +ffffffff82075dc0 T hubp1_soft_reset +ffffffff82075e00 T hubp1_set_flip_int +ffffffff82075e50 T hubp1_init +ffffffff82075e80 T dcn10_hubp_construct +ffffffff82075ef0 t hubp1_setup +ffffffff82075fb0 t hubp1_setup_interdependent +ffffffff82076330 t hubp1_set_vm_system_aperture_settings +ffffffff82076550 t hubp1_set_vm_context0_settings +ffffffff82076830 t hubp1_set_hubp_blank_en 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dcn10_update_plane_addr +ffffffff8207b460 T dcn10_set_input_transfer_func +ffffffff8207b5d0 T dcn10_set_output_transfer_func +ffffffff8207b6a0 T dcn10_pipe_control_lock +ffffffff8207b770 T dcn10_cursor_lock +ffffffff8207b930 T dcn10_enable_vblanks_synchronization +ffffffff8207c110 T dcn10_enable_timing_synchronization +ffffffff8207c510 T dcn10_enable_per_frame_crtc_position_reset +ffffffff8207c6e0 T dcn10_program_gamut_remap +ffffffff8207c8e0 T dcn10_program_output_csc +ffffffff8207ca10 T dcn10_update_visual_confirm_color +ffffffff8207ca90 T dcn10_update_mpcc +ffffffff8207cd40 T dcn10_blank_pixel_data +ffffffff8207ce80 T dcn10_set_hdr_multiplier +ffffffff8207cf10 T dcn10_program_pipe +ffffffff8207dab0 T dcn10_wait_for_pending_cleared +ffffffff8207dbb0 T dcn10_post_unlock_program_front_end +ffffffff8207de50 T dcn10_prepare_bandwidth +ffffffff8207dff0 T dcn10_optimize_bandwidth +ffffffff8207e190 T dcn10_set_drr +ffffffff8207e290 T dcn10_get_position +ffffffff8207e320 T dcn10_set_static_screen_control +ffffffff8207e3c0 T dcn10_setup_stereo +ffffffff8207e510 T dcn10_wait_for_mpcc_disconnect +ffffffff8207e6c0 T dcn10_dummy_display_power_gating +ffffffff8207e6f0 T dcn10_update_pending_status +ffffffff8207e830 T dcn10_update_dchub +ffffffff8207e860 T dcn10_set_cursor_position +ffffffff8207eda0 T dcn10_set_cursor_attribute +ffffffff8207edf0 T dcn10_set_cursor_sdr_white_level +ffffffff8207eeb0 T dcn10_get_vupdate_offset_from_vsync +ffffffff8207ef40 T dcn10_calc_vupdate_position +ffffffff8207efd0 T dcn10_setup_periodic_interrupt +ffffffff8207f0e0 T dcn10_setup_vupdate_interrupt +ffffffff8207f1a0 T dcn10_unblank_stream +ffffffff8207f2b0 T dcn10_send_immediate_sdp_message +ffffffff8207f310 T dcn10_set_clock +ffffffff8207f420 T dcn10_get_clock +ffffffff8207f480 T dcn10_get_dcc_en_bits +ffffffff82080000 T snprintf_count +ffffffff82080090 T dcn10_clear_status_bits +ffffffff82080240 T dcn10_get_hw_state +ffffffff82082000 T dcn10_hw_sequencer_construct +ffffffff82083000 T dcn10_ipp_construct +ffffffff82083050 T dcn20_ipp_construct +ffffffff820830a0 t dcn10_ipp_destroy +ffffffff82084000 T dcn10_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff820840b0 T dcn10_get_dig_frontend +ffffffff82084170 T enc1_configure_encoder +ffffffff820841f0 T dcn10_psr_program_dp_dphy_fast_training +ffffffff82084270 T dcn10_psr_program_secondary_packet +ffffffff820842f0 T dcn10_is_dig_enabled +ffffffff82084350 T dcn10_link_encoder_validate_dvi_output +ffffffff82084400 T dcn10_link_encoder_validate_dp_output +ffffffff82084440 T dcn10_link_encoder_construct +ffffffff82084620 T dcn10_link_encoder_validate_output_with_stream +ffffffff82084820 T dcn10_link_encoder_hw_init +ffffffff82084a20 T dcn10_aux_initialize +ffffffff82084ab0 T dcn10_link_encoder_destroy +ffffffff82084b00 T dcn10_link_encoder_setup +ffffffff82084c50 T dcn10_link_encoder_enable_tmds_output +ffffffff82084d40 T dcn10_link_encoder_enable_tmds_output_with_clk_pattern_wa +ffffffff82084e60 T dcn10_link_encoder_enable_dp_output +ffffffff82084fc0 T dcn10_link_encoder_enable_dp_mst_output +ffffffff82085120 T dcn10_link_encoder_disable_output +ffffffff820852f0 T dcn10_link_encoder_dp_set_lane_settings +ffffffff82085490 T dcn10_link_encoder_dp_set_phy_pattern +ffffffff82085bb0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff82085db0 T dcn10_link_encoder_update_mst_stream_allocation_table +ffffffff82086080 T dcn10_link_encoder_connect_dig_be_to_fe +ffffffff820861c0 T dcn10_link_encoder_enable_hpd +ffffffff82086200 T dcn10_link_encoder_disable_hpd +ffffffff82086240 T dcn10_get_dig_mode +ffffffff820862b0 T dcn10_link_encoder_get_max_link_cap +ffffffff82086330 t program_pattern_symbols +ffffffff82087000 T mpc1_set_bg_color +ffffffff820871e0 T mpc1_get_mpcc +ffffffff82087270 T mpc1_update_stereo_mix +ffffffff82087390 T mpc1_assert_idle_mpcc +ffffffff82087460 T mpc1_get_mpcc_for_dpp +ffffffff82087510 T mpc1_is_mpcc_idle +ffffffff82087600 T mpc1_assert_mpcc_idle_before_connect +ffffffff82087740 T mpc1_insert_plane +ffffffff82087ce0 T mpc1_remove_mpcc +ffffffff820880a0 T mpc1_mpc_init +ffffffff820883c0 T mpc1_mpc_init_single_inst +ffffffff820885b0 T mpc1_init_mpcc_list_from_hw +ffffffff82088880 T mpc1_read_mpcc_state +ffffffff82088a10 T mpc1_cursor_lock +ffffffff82088a90 T mpc1_get_mpc_out_mux +ffffffff82088b10 T dcn10_mpc_construct +ffffffff82088c90 t mpc1_update_blending +ffffffff82089000 T opp1_program_bit_depth_reduction +ffffffff82089400 T opp1_set_dyn_expansion +ffffffff82089570 T opp1_program_fmt +ffffffff82089870 T opp1_program_stereo +ffffffff82089960 T opp1_pipe_clock_control +ffffffff820899a0 T opp1_destroy +ffffffff820899f0 T dcn10_opp_construct +ffffffff8208a000 T optc1_program_global_sync +ffffffff8208a150 T optc1_setup_vertical_interrupt0 +ffffffff8208a1e0 T optc1_setup_vertical_interrupt1 +ffffffff8208a250 T optc1_setup_vertical_interrupt2 +ffffffff8208a2c0 T optc1_program_timing +ffffffff8208a9a0 T optc1_is_two_pixels_per_containter +ffffffff8208a9f0 T optc1_set_vtg_params +ffffffff8208ab20 T optc1_set_blank_data_double_buffer +ffffffff8208ab60 T optc1_set_timing_double_buffer +ffffffff8208aba0 T optc1_set_blank +ffffffff8208ac70 T optc1_is_blanked +ffffffff8208acf0 T optc1_enable_optc_clock +ffffffff8208af10 T optc1_disable_crtc +ffffffff8208b000 T optc1_program_blank_color +ffffffff8208b0b0 T optc1_validate_timing +ffffffff8208b1b0 T optc1_get_vblank_counter +ffffffff8208b210 T optc1_lock +ffffffff8208b2f0 T optc1_unlock +ffffffff8208b360 T optc1_get_position +ffffffff8208b3f0 T optc1_is_counter_moving +ffffffff8208b470 T optc1_did_triggered_reset_occur +ffffffff8208b510 T optc1_disable_reset_trigger +ffffffff8208b5d0 T optc1_enable_reset_trigger +ffffffff8208b6e0 T optc1_enable_crtc_reset +ffffffff8208b840 T optc1_wait_for_state +ffffffff8208b910 T optc1_set_early_control +ffffffff8208b940 T optc1_set_static_screen_control +ffffffff8208b9e0 T optc1_set_drr +ffffffff8208bb80 T optc1_set_vtotal_min_max +ffffffff8208bc20 T optc1_get_crtc_scanoutpos +ffffffff8208bd30 T optc1_program_stereo +ffffffff8208bf40 T optc1_is_stereo_left_eye +ffffffff8208bfb0 T optc1_get_hw_timing +ffffffff8208c0c0 T optc1_read_otg_state +ffffffff8208c3d0 T optc1_get_otg_active_size +ffffffff8208c4e0 T optc1_clear_optc_underflow +ffffffff8208c530 T optc1_tg_init +ffffffff8208c5e0 T optc1_is_tg_enabled +ffffffff8208c650 T optc1_is_optc_underflow_occurred +ffffffff8208c6c0 T optc1_configure_crc +ffffffff8208c930 T optc1_get_crc +ffffffff8208ca30 T dcn10_timing_generator_init +ffffffff8208caa0 t optc1_enable_crtc +ffffffff8208cba0 t optc1_set_test_pattern +ffffffff8208d290 t optc1_program_manual_trigger +ffffffff8208d340 t optc1_setup_manual_trigger +ffffffff8208e000 T dcn10_find_first_free_match_stream_enc_for_link +ffffffff8208e0b0 T dcn10_create_resource_pool +ffffffff8208f230 t dcn10_resource_destruct +ffffffff8208f540 t dcn10_destroy_resource_pool +ffffffff8208f5a0 t dcn10_panel_cntl_create +ffffffff8208f630 t dcn10_link_encoder_create +ffffffff8208f730 t dcn10_validate_bandwidth +ffffffff8208f7b0 t dcn10_validate_global +ffffffff8208f990 t dcn10_acquire_free_pipe_for_layer +ffffffff8208fac0 t dcn10_validate_plane +ffffffff8208fb10 t dcn10_add_stream_to_ctx +ffffffff8208fce0 t dcn10_patch_unknown_plane_state +ffffffff8208fd40 t read_dce_straps +ffffffff8208fd70 t create_audio +ffffffff8208fda0 t dcn10_stream_encoder_create +ffffffff8208fe40 t dcn10_hwseq_create +ffffffff8208fef0 t dcn10_get_dcc_compression_cap +ffffffff82090000 T enc1_update_generic_info_packet +ffffffff82090430 T enc1_stream_encoder_dp_set_stream_attribute +ffffffff82090910 T enc1_stream_encoder_set_stream_attribute_helper +ffffffff82090990 T enc1_stream_encoder_hdmi_set_stream_attribute +ffffffff82090f80 T enc1_stream_encoder_dvi_set_stream_attribute +ffffffff82091110 T enc1_stream_encoder_set_throttled_vcp_size +ffffffff82091330 T enc1_stream_encoder_update_dp_info_packets +ffffffff82091530 T enc1_stream_encoder_send_immediate_sdp_message +ffffffff82091940 T enc1_stream_encoder_stop_dp_info_packets +ffffffff82091b10 T enc1_stream_encoder_dp_blank +ffffffff82091cb0 T enc1_stream_encoder_dp_unblank +ffffffff82091ee0 T enc1_stream_encoder_set_avmute +ffffffff82091f20 T enc1_reset_hdmi_stream_attribute +ffffffff82091ff0 T get_audio_clock_info +ffffffff820920e0 T enc1_se_enable_audio_clock +ffffffff82092140 T enc1_se_enable_dp_audio +ffffffff82092210 T enc1_se_audio_mute_control +ffffffff82092260 T enc1_se_dp_audio_setup +ffffffff82092270 t enc1_se_audio_setup +ffffffff820923d0 T enc1_se_dp_audio_enable +ffffffff82092620 T enc1_se_dp_audio_disable +ffffffff82092790 T enc1_se_hdmi_audio_setup +ffffffff82092c50 T enc1_se_hdmi_audio_disable +ffffffff82092ce0 T enc1_setup_stereo_sync +ffffffff82092d60 T enc1_dig_connect_to_otg +ffffffff82092da0 T enc1_dig_source_otg +ffffffff82092e10 T enc1_stream_encoder_dp_get_pixel_format +ffffffff82092f00 T dcn10_stream_encoder_construct +ffffffff82092f60 t enc1_stream_encoder_update_hdmi_info_packets +ffffffff82093310 t enc1_stream_encoder_stop_hdmi_info_packets +ffffffff82094000 T dccg2_update_dpp_dto +ffffffff82094160 T dccg2_get_dccg_ref_freq +ffffffff82094220 T dccg2_set_fifo_errdet_ovr_en +ffffffff82094260 T dccg2_otg_add_pixel +ffffffff82094300 T dccg2_otg_drop_pixel +ffffffff820943a0 T dccg2_init +ffffffff820943d0 T dccg2_create +ffffffff82094480 T dcn_dccg_destroy +ffffffff82095000 T dpp20_read_state +ffffffff820951d0 T dpp2_power_on_obuf +ffffffff820952a0 T dpp2_dummy_program_input_lut +ffffffff820952d0 T dscl2_calc_lb_num_partitions +ffffffff82095400 T dpp2_cnv_set_alpha_keyer +ffffffff82095680 T dpp2_set_cursor_attributes +ffffffff820957e0 T oppn20_dummy_program_regamma_pwl +ffffffff82095810 T dpp2_construct +ffffffff82095890 t dpp2_cnv_setup +ffffffff82097000 T dpp2_set_degamma_pwl +ffffffff820973b0 T dpp2_set_degamma +ffffffff82097560 T dpp2_cm_set_gamut_remap +ffffffff82097790 T dpp2_program_input_csc +ffffffff820979c0 T dpp20_program_blnd_lut +ffffffff82098120 T dpp20_program_shaper +ffffffff8209a0d0 T dpp20_program_3dlut +ffffffff8209a7a0 t dpp20_set3dlut_ram12 +ffffffff8209a970 T dpp2_set_hdr_multiplier +ffffffff8209b000 T dsc2_construct +ffffffff8209b050 T dsc2_get_enc_caps +ffffffff8209b0d0 T dsc_config_log +ffffffff8209b180 T dsc2_get_packed_pps +ffffffff8209b320 T dsc_prepare_config +ffffffff8209b860 T dsc_log_pps +ffffffff8209bfe0 T dsc_override_rc_params +ffffffff8209c130 T dsc_init_reg_values +ffffffff8209c220 T dsc_dc_pixel_encoding_to_dsc_pixel_format +ffffffff8209c2d0 T dsc_dc_color_depth_to_dsc_bits_per_comp +ffffffff8209c310 T dsc_update_from_dsc_parameters +ffffffff8209c3c0 t dsc2_read_state +ffffffff8209c570 t dsc2_validate_stream +ffffffff8209c5d0 t dsc2_set_config +ffffffff8209d940 t dsc2_enable +ffffffff8209daf0 t dsc2_disable +ffffffff8209dc70 t dsc2_disconnect +ffffffff8209e000 T dwb2_config_dwb_cnv +ffffffff8209e200 T dwb2_disable +ffffffff8209e310 T dwb2_is_enabled +ffffffff8209e3b0 T dwb2_set_stereo +ffffffff8209e490 T dwb2_set_new_content +ffffffff8209e500 T dwb2_set_scaler +ffffffff8209e880 T dcn20_dwbc_construct +ffffffff8209e8d0 t dwb2_get_caps +ffffffff8209e9b0 t dwb2_enable +ffffffff8209eb10 t dwb2_update +ffffffff8209ec70 t dwb2_set_warmup +ffffffff8209f000 T dwb_program_horz_scalar +ffffffff8209f4c0 t wbscl_get_filter_coeffs_16p +ffffffff8209f990 t wbscl_set_scaler_filter +ffffffff8209fba0 T dwb_program_vert_scalar +ffffffff820a1000 T hubbub2_dcc_support_swizzle +ffffffff820a10c0 T hubbub2_dcc_support_pixel_format +ffffffff820a1110 T hubbub2_get_dcc_compression_cap +ffffffff820a1350 T hubbub2_init_vm_ctx +ffffffff820a14a0 T hubbub2_init_dchub_sys_ctx +ffffffff820a16e0 T hubbub2_update_dchub +ffffffff820a18d0 T hubbub2_wm_read_state +ffffffff820a1c00 T hubbub2_get_dchub_ref_freq +ffffffff820a1ce0 T hubbub2_read_state +ffffffff820a1eb0 T hubbub2_construct +ffffffff820a1f10 t hubbub2_program_watermarks +ffffffff820a3000 T hubp2_set_vm_system_aperture_settings +ffffffff820a31e0 T hubp2_program_deadline +ffffffff820a3980 T hubp2_vready_at_or_After_vsync +ffffffff820a3a20 T hubp2_setup_interdependent +ffffffff820a3e90 T hubp2_program_size +ffffffff820a4010 T hubp2_program_rotation +ffffffff820a4180 T hubp2_dcc_control +ffffffff820a4240 T hubp2_program_pixel_format +ffffffff820a4810 T hubp2_program_surface_config +ffffffff820a4a50 T hubp2_get_lines_per_chunk +ffffffff820a4b10 T hubp2_cursor_set_attributes +ffffffff820a4ed0 T hubp2_dmdata_set_attributes +ffffffff820a52b0 T hubp2_dmdata_load +ffffffff820a5340 T hubp2_dmdata_status_done +ffffffff820a53b0 T hubp2_program_surface_flip_and_addr +ffffffff820a5ca0 T hubp2_enable_triplebuffer +ffffffff820a5d70 T hubp2_is_triplebuffer_enabled +ffffffff820a5df0 T hubp2_set_flip_control_surface_gsl +ffffffff820a5e40 T hubp2_is_flip_pending +ffffffff820a5f50 T hubp2_set_blank +ffffffff820a5fb0 T hubp2_set_blank_regs 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dcn20_enable_stream_timing +ffffffff820aae50 T dcn20_program_output_csc +ffffffff820aaf40 T dcn20_set_output_transfer_func +ffffffff820ab0c0 T dcn20_set_blend_lut +ffffffff820ab130 T dcn20_set_shaper_3dlut +ffffffff820ab1f0 T dcn20_set_input_transfer_func +ffffffff820ab3b0 T dcn20_update_odm +ffffffff820ab4a0 T dcn20_pipe_control_lock +ffffffff820ab7c0 T dcn20_program_front_end_for_ctx +ffffffff820ac560 t dcn20_program_pipe +ffffffff820ad000 T dcn20_post_unlock_program_front_end +ffffffff820ad310 T dcn20_prepare_bandwidth +ffffffff820ad480 T dcn20_optimize_bandwidth +ffffffff820ad690 T dcn20_update_bandwidth +ffffffff820ad950 T dcn20_enable_writeback +ffffffff820adaa0 T dcn20_disable_writeback +ffffffff820adb30 T dcn20_wait_for_blank_complete +ffffffff820adbc0 T dcn20_dmdata_status_done +ffffffff820adc10 T dcn20_disable_stream_gating +ffffffff820adcc0 T dcn20_enable_stream_gating +ffffffff820add60 T dcn20_set_dmdata_attributes +ffffffff820ade20 T dcn20_init_vm_ctx +ffffffff820adee0 T dcn20_init_sys_ctx +ffffffff820adf90 T dcn20_update_plane_addr +ffffffff820ae0d0 T dcn20_unblank_stream +ffffffff820ae280 T dcn20_setup_vupdate_interrupt +ffffffff820ae2f0 T dcn20_reset_hw_ctx_wrap +ffffffff820ae6b0 T dcn20_update_mpcc +ffffffff820ae910 T dcn20_enable_stream +ffffffff820aec70 T dcn20_program_dmdata_engine +ffffffff820aed10 T dcn20_fpga_init_hw +ffffffff820af2f0 T dcn20_optimize_timing_for_fsft +ffffffff820af330 T dcn20_set_disp_pattern_generator +ffffffff820b0000 T dcn20_hw_sequencer_construct +ffffffff820b1000 T enc2_fec_set_enable +ffffffff820b1090 T enc2_fec_set_ready +ffffffff820b10d0 T enc2_fec_is_active +ffffffff820b1140 T link_enc2_read_state +ffffffff820b11f0 T dcn20_link_encoder_enable_dp_output +ffffffff820b12f0 T dcn20_link_encoder_get_max_link_cap +ffffffff820b13a0 T dcn20_link_encoder_is_in_alt_mode +ffffffff820b1420 T enc2_hw_init +ffffffff820b1500 T dcn20_link_encoder_construct +ffffffff820b2000 T mmhubbub2_config_mcif_irq +ffffffff820b2130 T mmhubbub2_enable_mcif +ffffffff820b2170 T mmhubbub2_disable_mcif +ffffffff820b21b0 T mcifwb2_dump_frame +ffffffff820b22c0 T dcn20_mmhubbub_construct +ffffffff820b2310 t mmhubbub2_config_mcif_buf +ffffffff820b2960 t mmhubbub2_config_mcif_arb +ffffffff820b3000 T mpc2_update_blending +ffffffff820b32a0 T mpc2_set_denorm +ffffffff820b3310 T mpc2_set_denorm_clamp +ffffffff820b3460 T mpc2_set_output_csc +ffffffff820b3650 T mpc2_set_ocsc_default +ffffffff820b3830 T mpc20_power_on_ogam_lut +ffffffff820b38b0 T mpc2_set_output_gamma +ffffffff820b40b0 T mpc2_assert_idle_mpcc +ffffffff820b41c0 T mpc2_assert_mpcc_idle_before_connect +ffffffff820b4410 T dcn20_mpc_construct +ffffffff820b44d0 t mpc2_get_mpcc_for_dpp +ffffffff820b5000 T opp2_set_disp_pattern_generator +ffffffff820b5810 T opp2_dpg_set_blank_color +ffffffff820b5990 T opp2_program_dpg_dimensions +ffffffff820b5a20 T opp2_dpg_is_blanked +ffffffff820b5ae0 T opp2_program_left_edge_extra_pixel +ffffffff820b5b30 T dcn20_opp_construct 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dcn20_ipp_create +ffffffff820b81d0 T dcn20_opp_create +ffffffff820b8280 T dcn20_aux_engine_create +ffffffff820b8320 T dcn20_i2c_hw_create +ffffffff820b83b0 T dcn20_mpc_create +ffffffff820b8440 T dcn20_hubbub_create +ffffffff820b8510 T dcn20_timing_generator_create +ffffffff820b85a0 T dcn20_link_encoder_create +ffffffff820b86a0 T dcn20_stream_encoder_create +ffffffff820b8760 T dcn20_hwseq_create +ffffffff820b87d0 T dcn20_clock_source_destroy +ffffffff820b8820 T dcn20_dsc_create +ffffffff820b88e0 T dcn20_dsc_destroy +ffffffff820b8930 T dcn20_hubp_create +ffffffff820b8a00 T dcn20_build_mapped_resource +ffffffff820b8c20 T dcn20_acquire_dsc +ffffffff820b8d60 T dcn20_release_dsc +ffffffff820b8dd0 T dcn20_add_dsc_to_stream_resource +ffffffff820b8f40 T dcn20_add_stream_to_ctx +ffffffff820b8fd0 T dcn20_remove_stream_from_ctx +ffffffff820b90c0 T dcn20_split_stream_for_odm +ffffffff820b9570 T dcn20_split_stream_for_mpc +ffffffff820b96f0 T dcn20_calc_max_scaled_time +ffffffff820b9760 T dcn20_set_mcif_arb_params +ffffffff820b98d0 T dcn20_validate_dsc +ffffffff820b9a80 T dcn20_find_secondary_pipe +ffffffff820b9c60 T dcn20_merge_pipes_for_validate +ffffffff820b9ed0 T dcn20_validate_apply_pipe_split_flags +ffffffff820ba760 T dcn20_fast_validate_bw +ffffffff820bacb0 T dcn20_validate_bandwidth +ffffffff820bad30 T dcn20_acquire_free_pipe_for_layer +ffffffff820bae50 T dcn20_get_dcc_compression_cap +ffffffff820bae80 T dcn20_patch_unknown_plane_state +ffffffff820baee0 T dcn20_dwbc_create +ffffffff820baff0 T dcn20_mmhubbub_create +ffffffff820bb150 T dcn20_create_resource_pool +ffffffff820bc8f0 t dcn20_resource_destruct +ffffffff820bcda0 t dcn20_destroy_resource_pool +ffffffff820bce00 t dcn20_panel_cntl_create +ffffffff820bce90 t read_dce_straps +ffffffff820bcec0 t dcn20_create_audio +ffffffff820bd000 T enc2_set_dynamic_metadata +ffffffff820bd260 T enc2_stream_encoder_dp_unblank +ffffffff820bd5a0 T enc2_stream_encoder_dp_set_stream_attribute +ffffffff820bd600 T enc2_get_fifo_cal_average_level +ffffffff820bd660 T dcn20_stream_encoder_construct +ffffffff820bd6c0 t enc2_stream_encoder_update_hdmi_info_packets +ffffffff820bd790 t enc2_stream_encoder_stop_hdmi_info_packets +ffffffff820bdaa0 t enc2_stream_encoder_update_dp_info_packets_sdp_line_num +ffffffff820bdb60 t enc2_stream_encoder_update_dp_info_packets +ffffffff820bdc10 t enc2_read_state +ffffffff820bdd90 t enc2_dp_set_dsc_config +ffffffff820bde60 t enc2_dp_set_dsc_pps_info_packet +ffffffff820be330 t enc2_dp_set_odm_combine +ffffffff820be370 t enc2_update_hdmi_info_packet +ffffffff820bf000 T dcn20_vmid_setup +ffffffff820c0000 T dccg201_create +ffffffff820c00b0 t dccg201_update_dpp_dto +ffffffff820c1000 T dpp201_construct +ffffffff820c1080 t dpp201_get_optimal_number_of_taps +ffffffff820c1440 t dpp201_cnv_setup +ffffffff820c2000 T hubbub201_construct +ffffffff820c2060 t hubbub201_program_watermarks +ffffffff820c3000 T dcn201_hubp_construct +ffffffff820c3070 t hubp201_setup +ffffffff820c3350 t hubp201_program_surface_config +ffffffff820c4000 T dcn201_update_plane_addr +ffffffff820c42a0 T dcn201_init_blank +ffffffff820c43e0 T dcn201_init_hw +ffffffff820c4bb0 T dcn201_plane_atomic_disconnect +ffffffff820c4d20 T dcn201_update_mpcc +ffffffff820c4fb0 T dcn201_pipe_control_lock +ffffffff820c50b0 T dcn201_set_cursor_attribute +ffffffff820c5140 T dcn201_set_dmdata_attributes +ffffffff820c5250 T dcn201_unblank_stream +ffffffff820c6000 T dcn201_hw_sequencer_construct +ffffffff820c7000 T dcn201_link_encoder_construct +ffffffff820c7190 t dcn201_link_encoder_is_in_alt_mode +ffffffff820c7200 t dcn201_link_encoder_get_max_link_cap +ffffffff820c8000 T dcn201_mpc_construct +ffffffff820c80c0 t mpc201_set_out_rate_control +ffffffff820c9000 T dcn201_opp_construct +ffffffff820ca000 T optc201_is_two_pixels_per_containter +ffffffff820ca010 T dcn201_timing_generator_init +ffffffff820ca080 t optc201_validate_timing +ffffffff820ca180 t optc201_triplebuffer_unlock +ffffffff820ca230 t optc201_triplebuffer_lock +ffffffff820ca350 t optc201_get_optc_source +ffffffff820cb000 T dcn201_create_resource_pool +ffffffff820cba30 t dcn201_resource_destruct +ffffffff820cbd30 t dcn201_destroy_resource_pool +ffffffff820cbd90 t dcn201_link_init +ffffffff820cbde0 t dcn201_link_encoder_create +ffffffff820cbe90 t dcn201_acquire_free_pipe_for_layer +ffffffff820cbfa0 t dcn201_populate_dml_writeback_from_context +ffffffff820cc000 t read_dce_straps +ffffffff820cc030 t dcn201_create_audio +ffffffff820cc060 t dcn201_stream_encoder_create +ffffffff820cc100 t dcn201_hwseq_create +ffffffff820cc170 t dcn201_get_dcc_compression_cap +ffffffff820cd000 T dccg21_create +ffffffff820cd0b0 t dccg21_update_dpp_dto +ffffffff820ce000 T dcn21_dchvm_init +ffffffff820ce200 T hubbub21_init_dchub +ffffffff820ce3d0 T hubbub21_program_urgent_watermarks +ffffffff820cebf0 T hubbub21_program_stutter_watermarks +ffffffff820cf0e0 T hubbub21_program_pstate_watermarks +ffffffff820cf380 T hubbub21_program_watermarks +ffffffff820cf4e0 T hubbub21_wm_read_state +ffffffff820cf780 T hubbub21_construct +ffffffff820cf7e0 t hubbub21_apply_DEDCN21_147_wa +ffffffff820d0000 T apply_DEDCN21_142_wa_for_hostvm_deadline +ffffffff820d02e0 T hubp21_program_deadline +ffffffff820d0310 T hubp21_program_requestor +ffffffff820d06b0 T hubp21_construct +ffffffff820d0720 t hubp21_setup +ffffffff820d0780 t hubp21_set_viewport +ffffffff820d0a80 t hubp21_program_surface_flip_and_addr +ffffffff820d1370 t hubp21_set_vm_system_aperture_settings +ffffffff820d14a0 t hubp21_init +ffffffff820d14d0 t hubp21_validate_dml_output +ffffffff820d3000 T dcn21_init_sys_ctx +ffffffff820d3110 T dcn21_s0i3_golden_init_wa +ffffffff820d3170 T dcn21_exit_optimized_pwr_state +ffffffff820d3190 T dcn21_optimize_pwr_state +ffffffff820d31c0 T dcn21_PLAT_58856_wa +ffffffff820d3260 T dcn21_set_abm_immediate_disable +ffffffff820d33a0 T dcn21_set_pipe +ffffffff820d34d0 T dcn21_set_backlight_level +ffffffff820d36d0 T dcn21_is_abm_supported +ffffffff820d4000 T dcn21_hw_sequencer_construct +ffffffff820d5000 T dcn21_link_encoder_enable_dp_output +ffffffff820d5140 t dcn21_link_encoder_acquire_phy +ffffffff820d5320 T dcn21_link_encoder_construct +ffffffff820d5500 t dcn21_link_encoder_enable_dp_mst_output +ffffffff820d5570 t dcn21_link_encoder_disable_output +ffffffff820d6000 T dcn21_fast_validate_bw +ffffffff820d66a0 T dcn21_create_resource_pool +ffffffff820d79d0 t dcn21_resource_destruct +ffffffff820d7e70 t dcn21_destroy_resource_pool +ffffffff820d7ed0 t dcn21_panel_cntl_create +ffffffff820d7f60 t dcn21_link_encoder_create +ffffffff820d8060 t dcn21_validate_bandwidth +ffffffff820d80e0 t dcn21_patch_unknown_plane_state +ffffffff820d8130 t dcn21_get_panel_config_defaults +ffffffff820d8170 t read_dce_straps +ffffffff820d81a0 t dcn21_create_audio +ffffffff820d81d0 t dcn21_stream_encoder_create +ffffffff820d8270 t dcn21_hwseq_create +ffffffff820d9000 T afmt3_setup_hdmi_audio +ffffffff820d91d0 T afmt3_se_audio_setup +ffffffff820d9370 T afmt3_audio_mute_control +ffffffff820d93e0 T afmt3_audio_info_immediate_update +ffffffff820d9420 T afmt3_setup_dp_audio +ffffffff820d9510 T afmt3_construct +ffffffff820da000 T cm_helper_program_gamcor_xfer_func +ffffffff820da3c0 T cm3_helper_translate_curve_to_hw_format +ffffffff820dafd0 T cm3_helper_convert_to_custom_float +ffffffff820db420 T cm3_helper_translate_curve_to_degamma_hw_format +ffffffff820dbc40 T is_rgb_equal +ffffffff820dc000 T dccg3_create +ffffffff820dc0b0 T dccg30_create +ffffffff820dd000 T dcn30_link_encoder_validate_output_with_stream +ffffffff820dd010 T dcn30_link_encoder_construct +ffffffff820dd1f0 T enc3_hw_init +ffffffff820de000 T enc3_stream_encoder_update_hdmi_info_packets +ffffffff820de100 t enc3_update_hdmi_info_packet +ffffffff820de4f0 T enc3_stream_encoder_stop_hdmi_info_packets +ffffffff820dead0 T enc3_dp_set_dsc_pps_info_packet +ffffffff820dedf0 T enc3_stream_encoder_update_dp_info_packets_sdp_line_num +ffffffff820deeb0 T enc3_stream_encoder_update_dp_info_packets +ffffffff820df170 T enc3_audio_mute_control +ffffffff820df1e0 T enc3_se_dp_audio_setup +ffffffff820df260 T enc3_se_dp_audio_enable +ffffffff820df350 T enc3_se_hdmi_audio_setup +ffffffff820df660 T dcn30_dio_stream_encoder_construct +ffffffff820df6d0 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff820dfcd0 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff820dfed0 t enc3_read_state +ffffffff820e0060 t enc3_dp_set_dsc_config +ffffffff820e0130 t enc3_dp_set_odm_combine +ffffffff820e1000 T dpp30_read_state +ffffffff820e1050 T dpp3_program_post_csc +ffffffff820e1240 T dpp3_set_pre_degam +ffffffff820e12f0 T dpp3_cnv_setup +ffffffff820e1bc0 T dpp3_set_cursor_attributes +ffffffff820e1d30 T dpp3_get_optimal_number_of_taps +ffffffff820e2750 T dpp3_construct +ffffffff820e27b0 t dpp3_deferred_update +ffffffff820e2b90 t dpp3_program_blnd_lut +ffffffff820e35e0 t dpp3_program_shaper +ffffffff820e5660 t dpp3_program_3dlut +ffffffff820e5e10 t dpp3_set3dlut_ram12 +ffffffff820e6000 T dpp3_program_cm_dealpha +ffffffff820e60a0 T dpp3_program_cm_bias +ffffffff820e6190 T dpp3_program_gamcor_lut +ffffffff820e6bb0 t dpp3_power_on_gamcor_lut +ffffffff820e6ce0 T dpp3_set_hdr_multiplier +ffffffff820e6d30 T dpp3_cm_set_gamut_remap +ffffffff820e7000 T dwb3_config_fc +ffffffff820e71b0 T dwb3_set_stereo +ffffffff820e7270 T dwb3_enable +ffffffff820e73a0 T dwb3_set_denorm +ffffffff820e74c0 T dwb3_disable +ffffffff820e7570 T dwb3_update +ffffffff820e76a0 T dwb3_is_enabled +ffffffff820e7740 T dwb3_set_new_content +ffffffff820e7780 T dcn30_dwbc_construct +ffffffff820e77d0 T dwb3_set_host_read_rate_control +ffffffff820e7840 t dwb3_get_caps +ffffffff820e8000 T dwb3_ogam_set_input_transfer_func +ffffffff820e89f0 T dwb3_set_gamut_remap +ffffffff820e8ca0 T dwb3_program_hdr_mult +ffffffff820e9000 T hubbub3_init_dchub_sys_ctx +ffffffff820e91c0 T hubbub3_program_watermarks +ffffffff820e92c0 T hubbub3_dcc_support_swizzle +ffffffff820e9380 T hubbub3_get_dcc_compression_cap +ffffffff820e9560 T hubbub3_force_wm_propagate_to_pipes +ffffffff820e9610 T hubbub3_force_pstate_change_control +ffffffff820e9690 T hubbub3_init_watermarks +ffffffff820e99d0 T hubbub3_construct +ffffffff820ea000 T hubp3_set_vm_system_aperture_settings +ffffffff820ea130 T hubp3_program_surface_flip_and_addr +ffffffff820eab20 T hubp3_dcc_control +ffffffff820eabe0 T hubp3_dcc_control_sienna_cichlid +ffffffff820ead00 T hubp3_dmdata_set_attributes +ffffffff820eaf00 T hubp3_program_surface_config +ffffffff820eb1f0 T hubp3_read_state +ffffffff820eb4c0 T hubp3_setup +ffffffff820eb550 T hubp3_init +ffffffff820eb580 T hubp3_construct +ffffffff820ec000 T dcn30_set_blend_lut +ffffffff820ec070 T dcn30_set_input_transfer_func +ffffffff820ec1d0 T dcn30_set_output_transfer_func +ffffffff820ec500 T dcn30_update_writeback +ffffffff820ec590 t dcn30_set_writeback +ffffffff820ec740 T dcn30_mmhubbub_warmup +ffffffff820ec990 T dcn30_enable_writeback +ffffffff820eca40 T dcn30_disable_writeback +ffffffff820ecb20 T dcn30_program_all_writeback_pipes_in_tree +ffffffff820ece20 T dcn30_init_hw +ffffffff820ed550 T dcn30_set_avmute +ffffffff820ed5b0 T dcn30_update_info_frame +ffffffff820ed6a0 T dcn30_program_dmdata_engine +ffffffff820ed740 T dcn30_apply_idle_power_optimizations +ffffffff820edc60 T dcn30_does_plane_fit_in_mall +ffffffff820edd10 T dcn30_hardware_release +ffffffff820ede00 T dcn30_set_disp_pattern_generator +ffffffff820ede70 T dcn30_prepare_bandwidth +ffffffff820edf60 T dcn30_set_static_screen_control +ffffffff820ee000 T dcn30_hw_sequencer_construct +ffffffff820ef000 T dcn30_mmhubbub_construct +ffffffff820ef050 t mmhubbub3_warmup_mcif +ffffffff820ef260 t mmhubbub3_config_mcif_buf +ffffffff820ef710 t mmhubbub3_config_mcif_arb +ffffffff820f0000 T mpc3_is_dwb_idle +ffffffff820f0070 T mpc3_set_dwb_mux +ffffffff820f00f0 T mpc3_disable_dwb_mux +ffffffff820f0170 T mpc3_set_out_rate_control +ffffffff820f0280 T mpc3_get_ogam_current +ffffffff820f0320 T mpc3_power_on_ogam_lut +ffffffff820f03f0 T mpc3_set_output_gamma +ffffffff820f1030 T mpc3_set_denorm +ffffffff820f10a0 T mpc3_set_denorm_clamp +ffffffff820f11f0 T mpc3_program_shaper +ffffffff820f33b0 t mpc3_power_on_shaper_3dlut +ffffffff820f3730 T mpc3_init_mpcc +ffffffff820f37b0 T mpc3_set_gamut_remap +ffffffff820f3a20 T mpc3_program_3dlut +ffffffff820f4190 t mpc3_set3dlut_ram12 +ffffffff820f4370 T mpc3_set_output_csc +ffffffff820f44e0 T mpc3_set_ocsc_default +ffffffff820f4650 T mpc3_set_rmu_mux +ffffffff820f46f0 T mpc3_get_rmu_mux_status +ffffffff820f47a0 T mpcc3_acquire_rmu +ffffffff820f4900 T dcn30_mpc_construct +ffffffff820f49d0 t mpcc3_release_rmu +ffffffff820f4b40 t mpc3_set_mpc_mem_lp_mode +ffffffff820f5000 T optc3_triplebuffer_lock +ffffffff820f5120 T optc3_lock_doublebuffer_enable +ffffffff820f53b0 T optc3_lock_doublebuffer_disable +ffffffff820f54d0 T optc3_lock +ffffffff820f55a0 T optc3_set_out_mux +ffffffff820f55e0 T optc3_program_blank_color +ffffffff820f5710 T optc3_set_drr_trigger_window +ffffffff820f57a0 T optc3_set_vtotal_change_limit +ffffffff820f5810 T optc3_set_dsc_config +ffffffff820f5860 T optc3_set_odm_bypass +ffffffff820f59e0 T optc3_set_odm_combine +ffffffff820f5d30 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff820f5db0 T optc3_set_vtotal_min_max +ffffffff820f5df0 T optc3_tg_init +ffffffff820f5e50 T dcn30_timing_generator_init +ffffffff820f6000 T dcn30_add_stream_to_ctx +ffffffff820f6020 T dcn30_populate_dml_pipes_from_context +ffffffff820f6100 T dcn30_populate_dml_writeback_from_context +ffffffff820f6160 T dcn30_calc_max_scaled_time +ffffffff820f61c0 T dcn30_set_mcif_arb_params +ffffffff820f6330 T dcn30_acquire_post_bldn_3dlut +ffffffff820f64c0 T dcn30_release_post_bldn_3dlut +ffffffff820f6570 T dcn30_internal_validate_bw +ffffffff820f72e0 t dcn30_split_stream_for_mpc_or_odm +ffffffff820f7600 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff820f76e0 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff820f7780 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff820f7820 T dcn30_update_soc_for_wm_a +ffffffff820f7870 T dcn30_calculate_wm_and_dlg +ffffffff820f78e0 T dcn30_validate_bandwidth +ffffffff820f7d10 T dcn30_update_bw_bounding_box +ffffffff820f8370 T dcn30_create_resource_pool +ffffffff820f9920 t dcn30_resource_destruct +ffffffff820f9ea0 t dcn30_destroy_resource_pool +ffffffff820f9f00 t dcn30_panel_cntl_create +ffffffff820f9f90 t dcn30_link_encoder_create +ffffffff820fa040 t dcn30_get_panel_config_defaults +ffffffff820fa0c0 t read_dce_straps +ffffffff820fa0f0 t dcn30_create_audio +ffffffff820fa120 t dcn30_stream_encoder_create +ffffffff820fa2a0 t dcn30_hwseq_create +ffffffff820fb000 T vpg3_update_generic_info_packet +ffffffff820fb9a0 T vpg3_construct +ffffffff820fc000 T dccg301_create +ffffffff820fd000 T dcn301_link_encoder_construct +ffffffff820fe000 T hubbub301_construct +ffffffff820ff000 T dcn301_hw_sequencer_construct +ffffffff82100000 T optc301_set_drr +ffffffff82100230 T optc301_setup_manual_trigger +ffffffff82100350 T dcn301_timing_generator_init +ffffffff82101000 T dcn301_panel_cntl_construct +ffffffff82101050 t dcn301_panel_cntl_destroy +ffffffff821010a0 t dcn301_panel_cntl_hw_init +ffffffff821012b0 t dcn301_is_panel_backlight_on +ffffffff82101310 t dcn301_is_panel_powered_on +ffffffff821013c0 t dcn301_store_backlight_level +ffffffff82101460 t dcn301_get_16_bit_backlight_from_pwm +ffffffff82102000 T dcn301_create_resource_pool +ffffffff82103590 t dcn301_destruct +ffffffff82103ad0 t dcn301_destroy_resource_pool +ffffffff82103b30 t dcn301_panel_cntl_create +ffffffff82103bc0 t dcn301_link_encoder_create +ffffffff82103c70 t dcn301_calculate_wm_and_dlg +ffffffff82103ce0 t read_dce_straps +ffffffff82103d10 t dcn301_create_audio +ffffffff82103d40 t dcn301_stream_encoder_create +ffffffff82103ec0 t dcn301_hwseq_create +ffffffff82104000 T dcn302_dpp_pg_control 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dcn303_resource_destruct +ffffffff8210b7e0 t dcn303_destroy_resource_pool +ffffffff8210b830 t dcn303_panel_cntl_create +ffffffff8210b8c0 t dcn303_link_encoder_create +ffffffff8210b970 t dcn303_get_panel_config_defaults +ffffffff8210b9f0 t read_dce_straps +ffffffff8210ba20 t dcn303_create_audio +ffffffff8210ba50 t dcn303_stream_encoder_create +ffffffff8210bbd0 t dcn303_hwseq_create +ffffffff8210c000 T afmt31_powerdown +ffffffff8210c090 T afmt31_poweron +ffffffff8210c120 T afmt31_construct +ffffffff8210d000 T apg31_construct +ffffffff8210d050 t apg31_se_audio_setup +ffffffff8210d160 t apg31_enable +ffffffff8210d270 t apg31_disable +ffffffff8210e000 T dccg31_update_dpp_dto +ffffffff8210e160 T dccg31_set_dpstreamclk +ffffffff8210e2f0 t dccg31_disable_dpstreamclk +ffffffff8210e440 T dccg31_enable_symclk32_se +ffffffff8210e740 T dccg31_disable_symclk32_se +ffffffff8210ea10 T dccg31_enable_symclk32_le +ffffffff8210eb20 T dccg31_disable_symclk32_le +ffffffff8210ec10 T dccg31_set_symclk32_le_root_clock_gating +ffffffff8210ed20 T dccg31_disable_dscclk +ffffffff8210ef70 T dccg31_enable_dscclk +ffffffff8210f1e0 T dccg31_set_physymclk +ffffffff8210f6f0 T dccg31_set_dtbclk_dto +ffffffff8210f9a0 T dccg31_set_audio_dtbclk_dto +ffffffff8210fab0 T dccg31_get_dccg_ref_freq +ffffffff8210fae0 T dccg31_set_dispclk_change_mode +ffffffff8210fb30 T dccg31_init +ffffffff82110110 T dccg31_otg_add_pixel +ffffffff82110150 T dccg31_otg_drop_pixel +ffffffff82110190 T dccg31_create +ffffffff82111000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff82111390 T dcn31_link_encoder_construct +ffffffff82111560 T dcn31_link_encoder_construct_minimal +ffffffff821115e0 T dcn31_link_encoder_enable_dp_output +ffffffff82111820 T dcn31_link_encoder_enable_dp_mst_output +ffffffff82111a60 T dcn31_link_encoder_disable_output +ffffffff82111cd0 T dcn31_link_encoder_is_in_alt_mode +ffffffff82111e20 T dcn31_link_encoder_get_max_link_cap +ffffffff82111fa0 t enc31_hw_init +ffffffff82112000 T dcn31_hpo_dp_link_enc_enable +ffffffff82112160 T dcn31_hpo_dp_link_enc_disable +ffffffff821121d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff82112b30 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff82112db0 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff82113050 T dcn31_hpo_dp_link_enc_read_state +ffffffff821132f0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff821133f0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff82113530 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff82113620 T hpo_dp_link_encoder31_construct +ffffffff82113680 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff82114000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff82114070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff821141b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff82114460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff82114560 t dcn31_hpo_dp_stream_enc_disable +ffffffff821145d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff82114e80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num +ffffffff82114f40 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff82115160 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff821152f0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff82115590 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff82115690 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff82115740 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff82115810 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff821159c0 t dcn31_hpo_dp_stream_enc_read_state +ffffffff82115b50 t dcn31_set_hblank_min_symbol_width +ffffffff82116000 T hubbub31_init_dchub_sys_ctx +ffffffff821161e0 T hubbub31_init +ffffffff82116280 T hubbub31_construct +ffffffff82116320 t hubbub31_get_dcc_compression_cap +ffffffff82116500 t hubbub31_get_dchub_ref_freq +ffffffff821165e0 t hubbub31_program_watermarks +ffffffff82117f00 t hubbub31_verify_allow_pstate_change_high +ffffffff821180c0 t dcn31_program_det_size +ffffffff821182a0 t dcn31_program_compbuf_size +ffffffff82118520 t dcn31_init_crb +ffffffff82119000 T hubp31_set_unbounded_requesting +ffffffff82119090 T hubp31_soft_reset +ffffffff821190e0 T hubp31_construct +ffffffff82119150 t hubp31_program_extended_blank +ffffffff8211a000 T dcn31_init_hw +ffffffff8211a850 T dcn31_dsc_pg_control +ffffffff8211aba0 T dcn31_enable_power_gating_plane +ffffffff8211ae00 T dcn31_update_info_frame +ffffffff8211af30 T dcn31_z10_save_init +ffffffff8211afc0 T dcn31_z10_restore +ffffffff8211b070 T dcn31_hubp_pg_control +ffffffff8211b390 T dcn31_init_sys_ctx +ffffffff8211b440 T dcn31_reset_hw_ctx_wrap +ffffffff8211b7a0 T dcn31_setup_hpo_hw_control +ffffffff8211c000 T dcn31_hw_sequencer_construct +ffffffff8211d000 T optc31_immediate_disable_crtc +ffffffff8211d100 T optc31_set_drr +ffffffff8211d310 T optc3_init_odm +ffffffff8211d480 T dcn31_timing_generator_init +ffffffff8211d4f0 t optc31_enable_crtc +ffffffff8211d5f0 t optc31_disable_crtc +ffffffff8211d6d0 t optc31_set_odm_combine +ffffffff8211e000 T dcn31_panel_cntl_construct +ffffffff8211e040 t dcn31_panel_cntl_destroy +ffffffff8211e090 t dcn31_panel_cntl_hw_init +ffffffff8211e190 t dcn31_is_panel_backlight_on +ffffffff8211e230 t dcn31_is_panel_powered_on +ffffffff8211e2e0 t dcn31_store_backlight_level +ffffffff8211e3b0 t dcn31_get_16_bit_backlight_from_pwm +ffffffff8211f000 T dcn31x_populate_dml_pipes_from_context +ffffffff8211f180 T dcn31_populate_dml_pipes_from_context +ffffffff8211f5c0 T dcn31_calculate_wm_and_dlg +ffffffff8211f630 T dcn31_populate_dml_writeback_from_context +ffffffff8211f690 T dcn31_set_mcif_arb_params +ffffffff8211f6f0 T dcn31_validate_bandwidth +ffffffff8211fae0 T dcn31_create_resource_pool +ffffffff82120e80 t dcn31_resource_destruct +ffffffff821214f0 t dcn31_destroy_resource_pool +ffffffff82121550 t dcn31_panel_cntl_create +ffffffff821215c0 t dcn31_link_encoder_create +ffffffff82121670 t dcn31_link_enc_create_minimal +ffffffff82121710 t dcn31_get_panel_config_defaults +ffffffff82121750 t read_dce_straps +ffffffff82121780 t dcn31_create_audio +ffffffff821217b0 t dcn31_stream_encoder_create +ffffffff82121930 t dcn31_hpo_dp_stream_encoder_create +ffffffff82121af0 t dcn31_hpo_dp_link_encoder_create +ffffffff82121b80 t dcn31_hwseq_create +ffffffff82122000 T vpg31_powerdown +ffffffff82122090 T vpg31_poweron +ffffffff82122120 T vpg31_construct +ffffffff82123000 T dccg314_create +ffffffff821230b0 t dccg314_init +ffffffff82123210 t dccg314_set_dpstreamclk +ffffffff821235d0 t dccg314_set_dtbclk_dto +ffffffff821237c0 t dccg314_set_pixel_rate_div +ffffffff82123b30 t dccg314_set_valid_pixel_rate +ffffffff82123ba0 t dccg314_trigger_dio_fifo_resync +ffffffff82123c40 t dccg314_dpp_root_clock_control +ffffffff82124000 T dcn314_dio_stream_encoder_construct +ffffffff82124070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff82124670 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff82124880 t enc314_stream_encoder_dp_blank +ffffffff82124900 t enc314_stream_encoder_dp_unblank +ffffffff82124c80 t enc314_read_state +ffffffff82124de0 t enc314_dp_set_dsc_config +ffffffff82124e30 t enc314_dp_set_odm_combine +ffffffff82124e70 t enc314_set_dig_input_mode +ffffffff82124ec0 t enc314_enable_fifo +ffffffff82124f60 t enc314_disable_fifo +ffffffff82124fb0 t enc314_reset_fifo +ffffffff82126000 T dcn314_update_odm +ffffffff82126600 T dcn314_dsc_pg_control +ffffffff821269d0 T dcn314_enable_power_gating_plane +ffffffff82126c60 T dcn314_calculate_dccg_k1_k2_values +ffffffff82126e10 T dcn314_set_pixels_per_cycle +ffffffff82126f00 T dcn314_resync_fifo_dccg_dio +ffffffff821270a0 T dcn314_dpp_root_clock_control +ffffffff82127100 T dcn314_disable_link_output +ffffffff82128000 T dcn314_hw_sequencer_construct +ffffffff82129000 T dcn314_timing_generator_init +ffffffff82129070 t optc314_enable_crtc +ffffffff82129170 t optc314_disable_crtc +ffffffff82129250 t optc314_phantom_crtc_post_enable +ffffffff82129310 t optc314_set_odm_bypass +ffffffff82129480 t optc314_set_odm_combine +ffffffff82129770 t optc314_set_h_timing_div_manual_mode +ffffffff8212a000 T dcn314_validate_bandwidth +ffffffff8212a490 T dcn314_create_resource_pool +ffffffff8212b7b0 t dcn314_resource_destruct +ffffffff8212be20 t dcn314_get_preferred_eng_id_dpia +ffffffff8212be50 t dcn314_destroy_resource_pool +ffffffff8212beb0 t dcn31_panel_cntl_create +ffffffff8212bf20 t dcn31_link_encoder_create +ffffffff8212bfd0 t dcn31_link_enc_create_minimal +ffffffff8212c070 t dcn314_populate_dml_pipes_from_context +ffffffff8212c100 t dcn314_update_bw_bounding_box +ffffffff8212c150 t dcn314_get_panel_config_defaults +ffffffff8212c190 t read_dce_straps +ffffffff8212c1c0 t dcn31_create_audio +ffffffff8212c1f0 t dcn314_stream_encoder_create +ffffffff8212c370 t dcn31_hpo_dp_stream_encoder_create +ffffffff8212c530 t dcn31_hpo_dp_link_encoder_create +ffffffff8212c5c0 t dcn314_hwseq_create +ffffffff8212d000 T dcn315_create_resource_pool +ffffffff8212e280 t dcn315_resource_destruct +ffffffff8212e8e0 t dcn315_destroy_resource_pool +ffffffff8212e940 t dcn31_panel_cntl_create +ffffffff8212e9b0 t dcn31_link_encoder_create +ffffffff8212ea60 t dcn31_link_enc_create_minimal +ffffffff8212eb00 t dcn315_populate_dml_pipes_from_context +ffffffff8212f200 t dcn315_get_panel_config_defaults +ffffffff8212f240 t read_dce_straps +ffffffff8212f270 t dcn31_create_audio +ffffffff8212f2a0 t dcn315_stream_encoder_create +ffffffff8212f420 t dcn31_hpo_dp_stream_encoder_create +ffffffff8212f5e0 t dcn31_hpo_dp_link_encoder_create +ffffffff8212f670 t dcn31_hwseq_create +ffffffff82130000 T dcn316_create_resource_pool +ffffffff82131290 t dcn316_resource_destruct +ffffffff821318f0 t dcn316_destroy_resource_pool +ffffffff82131950 t dcn31_panel_cntl_create +ffffffff821319c0 t dcn31_link_encoder_create +ffffffff82131a70 t dcn31_link_enc_create_minimal +ffffffff82131b10 t dcn316_populate_dml_pipes_from_context +ffffffff82131e40 t dcn316_get_panel_config_defaults +ffffffff82131e80 t read_dce_straps +ffffffff82131eb0 t dcn31_create_audio +ffffffff82131ee0 t dcn316_stream_encoder_create +ffffffff82132060 t dcn31_hpo_dp_stream_encoder_create +ffffffff82132220 t dcn31_hpo_dp_link_encoder_create +ffffffff821322b0 t dcn31_hwseq_create +ffffffff82133000 T dccg32_create +ffffffff821330b0 t dccg32_get_dccg_ref_freq +ffffffff821330e0 t dccg32_otg_add_pixel +ffffffff82133120 t dccg32_otg_drop_pixel +ffffffff82133160 t dccg32_set_dpstreamclk +ffffffff821334a0 t dccg32_set_dtbclk_dto +ffffffff821336a0 t dccg32_set_pixel_rate_div +ffffffff82133a10 t dccg32_set_valid_pixel_rate +ffffffff82133a80 t dccg32_trigger_dio_fifo_resync +ffffffff82134000 T enc32_hw_init +ffffffff82134090 T dcn32_link_encoder_enable_dp_output +ffffffff821340e0 T dcn32_link_encoder_construct +ffffffff821342d0 t dcn32_link_encoder_is_in_alt_mode +ffffffff82134350 t dcn32_link_encoder_get_max_link_cap +ffffffff82135000 T enc32_stream_encoder_dp_unblank +ffffffff82135500 T enc32_enable_fifo +ffffffff821355a0 t enc32_reset_fifo +ffffffff821356a0 T dcn32_dio_stream_encoder_construct +ffffffff82135710 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff82135c90 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff82135e10 t enc32_read_state +ffffffff82135f70 t enc32_dp_set_dsc_config +ffffffff82135fc0 t enc32_dp_set_odm_combine +ffffffff82136000 t enc32_set_dig_input_mode +ffffffff82137000 T dpp32_construct +ffffffff82137060 t dscl32_calc_lb_num_partitions +ffffffff82138000 T hpo_dp_link_encoder32_construct +ffffffff82138060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff82139000 T hubbub32_set_request_limit +ffffffff82139130 T dcn32_program_det_size +ffffffff821392d0 T hubbub32_program_urgent_watermarks +ffffffff82139a40 T hubbub32_program_stutter_watermarks +ffffffff82139e90 T hubbub32_program_pstate_watermarks +ffffffff8213a320 T hubbub32_program_usr_watermarks +ffffffff8213a580 T hubbub32_force_usr_retraining_allow +ffffffff8213a600 T hubbub32_force_wm_propagate_to_pipes +ffffffff8213a6a0 T hubbub32_init +ffffffff8213a7e0 T hubbub32_construct +ffffffff8213a860 t hubbub32_wm_read_state +ffffffff8213ac80 t hubbub32_program_watermarks +ffffffff8213ad90 t hubbub32_init_watermarks +ffffffff8213b1d0 t dcn32_program_compbuf_size +ffffffff8213b460 t dcn32_init_crb +ffffffff8213c000 T hubp32_update_force_pstate_disallow +ffffffff8213c090 T hubp32_update_force_cursor_pstate_disallow +ffffffff8213c120 T hubp32_update_mall_sel +ffffffff8213c1b0 T hubp32_prepare_subvp_buffering +ffffffff8213c250 T hubp32_phantom_hubp_post_enable +ffffffff8213c360 T hubp32_cursor_set_attributes +ffffffff8213c620 T hubp32_init +ffffffff8213c650 T hubp32_construct +ffffffff8213d000 T dcn32_dsc_pg_control +ffffffff8213d320 T dcn32_enable_power_gating_plane +ffffffff8213d590 T dcn32_hubp_pg_control +ffffffff8213d800 T dcn32_apply_idle_power_optimizations +ffffffff8213daf0 T dcn32_commit_subvp_config +ffffffff8213dba0 T dcn32_subvp_pipe_control_lock +ffffffff8213dd70 T dcn32_subvp_pipe_control_lock_fast +ffffffff8213ddf0 T dcn32_set_mpc_shaper_3dlut +ffffffff8213df10 T dcn32_set_mcm_luts +ffffffff8213e0a0 T dcn32_set_input_transfer_func +ffffffff8213e1e0 T dcn32_set_output_transfer_func +ffffffff8213e420 T dcn32_update_force_pstate +ffffffff8213e640 T dcn32_update_mall_sel +ffffffff8213e830 T dcn32_program_mall_pipe_config +ffffffff8213e920 T dcn32_init_hw +ffffffff8213f1e0 T dcn32_update_odm +ffffffff8213f7e0 T dcn32_calculate_dccg_k1_k2_values +ffffffff8213fa10 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff8213fab0 T dcn32_set_pixels_per_cycle +ffffffff8213fbf0 T dcn32_resync_fifo_dccg_dio +ffffffff8213fd90 T dcn32_unblank_stream +ffffffff8213ffa0 T dcn32_disable_link_output +ffffffff82140310 T dcn32_update_phantom_vp_position +ffffffff82140420 T dcn32_apply_update_flags_for_phantom +ffffffff821404a0 T dcn32_dsc_pg_status +ffffffff82140580 T dcn32_update_dsc_pg +ffffffff82140680 T dcn32_enable_phantom_streams +ffffffff821407c0 T dcn32_init_blank +ffffffff82140a00 T dcn32_blank_phantom +ffffffff82140b80 T dcn32_is_pipe_topology_transition_seamless +ffffffff82141000 T dcn32_hw_sequencer_init_functions +ffffffff82142000 T dcn32_mmhubbub_construct +ffffffff82142050 t mmhubbub32_warmup_mcif +ffffffff82142260 t mmhubbub32_config_mcif_buf +ffffffff82142710 t mmhubbub32_config_mcif_arb +ffffffff82143000 T mpc32_mpc_init +ffffffff821431e0 T mpc32_power_on_blnd_lut +ffffffff82143350 T mpc32_configure_post1dlut +ffffffff82143450 T mpc32_program_post1dluta_settings +ffffffff82143660 T mpc32_program_post1dlutb_settings +ffffffff82143870 T mpc32_program_post1dlut_pwl +ffffffff82143ca0 T mpc32_program_post1dlut +ffffffff82143fb0 T mpc32_configure_shaper_lut +ffffffff821440d0 T mpc32_program_shaper_luta_settings +ffffffff82144f60 T mpc32_program_shaper_lutb_settings +ffffffff82145df0 T mpc32_program_shaper_lut +ffffffff82145f90 T mpc32_power_on_shaper_3dlut +ffffffff821461c0 T mpc32_program_shaper +ffffffff821464e0 T mpc32_select_3dlut_ram +ffffffff82146590 T mpc32_select_3dlut_ram_mask +ffffffff82146660 T mpc32_set3dlut_ram12 +ffffffff82146860 T mpc32_set3dlut_ram10 +ffffffff82146930 T mpc32_program_3dlut +ffffffff82147300 T dcn32_mpc_construct +ffffffff82148000 T optc32_set_h_timing_div_manual_mode +ffffffff82148040 T dcn32_timing_generator_init +ffffffff821480b0 t optc32_enable_crtc +ffffffff821481b0 t optc32_disable_crtc +ffffffff82148290 t optc32_phantom_crtc_post_enable +ffffffff82148350 t optc32_disable_phantom_otg +ffffffff82148390 t optc32_set_drr +ffffffff82148550 t optc32_set_odm_bypass +ffffffff821486c0 t optc32_set_odm_combine +ffffffff82149000 T dcn32_panel_cntl_create +ffffffff82149070 T dcn32_acquire_post_bldn_3dlut +ffffffff82149160 T dcn32_release_post_bldn_3dlut +ffffffff82149210 T dcn32_retain_phantom_pipes +ffffffff821492f0 T dcn32_remove_phantom_pipes +ffffffff82149460 T dcn32_add_phantom_pipes +ffffffff82149890 T dcn32_validate_bandwidth +ffffffff82149d70 T dcn32_populate_dml_pipes_from_context +ffffffff8214a1a0 T dcn32_calculate_wm_and_dlg +ffffffff8214a210 T dcn32_create_resource_pool +ffffffff8214a2c0 t dcn32_resource_construct +ffffffff82155800 T dcn32_acquire_free_pipe_as_secondary_dpp_pipe +ffffffff82155b00 T dcn32_calc_num_avail_chans_for_mall +ffffffff82155b70 t dcn32_mpc_create +ffffffff8215a1d0 t dcn32_dwbc_create +ffffffff8215abd0 t dcn32_mmhubbub_create +ffffffff8215b080 t dcn32_resource_destruct +ffffffff8215b710 t dcn32_destroy_resource_pool +ffffffff8215b770 t dcn32_link_encoder_create +ffffffff8215c840 t dcn32_update_bw_bounding_box +ffffffff8215c890 t read_dce_straps +ffffffff8215c8c0 t dcn32_create_audio +ffffffff8215cc40 t dcn32_stream_encoder_create +ffffffff8215ea80 t dcn32_hpo_dp_stream_encoder_create +ffffffff8215f860 t dcn32_hpo_dp_link_encoder_create +ffffffff8215fcb0 t dcn32_hwseq_create +ffffffff821601a0 t dcn32_vpg_create +ffffffff82161000 T dcn32_helper_mall_bytes_to_ways +ffffffff82161060 T dcn32_helper_calculate_mall_bytes_for_cursor +ffffffff82161100 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff82161180 T dcn32_merge_pipes_for_subvp +ffffffff82161340 T dcn32_all_pipes_have_stream_and_plane +ffffffff821613d0 T dcn32_subvp_in_use +ffffffff82161460 T dcn32_mpo_in_use +ffffffff821614d0 T dcn32_any_surfaces_rotated +ffffffff82161560 T dcn32_is_center_timing +ffffffff821615d0 T dcn32_is_psr_capable +ffffffff82161620 T dcn32_determine_det_override +ffffffff82161960 T dcn32_set_det_allocations +ffffffff82161af0 T dcn32_save_mall_state +ffffffff82161ba0 T dcn32_restore_mall_state +ffffffff82161c50 T dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82161e00 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82161eb0 T dcn32_check_native_scaling_for_res +ffffffff82161f10 T dcn32_subvp_drr_admissable +ffffffff821620d0 T dcn32_subvp_vblank_admissable +ffffffff82163000 T dcn321_link_encoder_construct +ffffffff82164000 T dcn321_create_resource_pool +ffffffff821640b0 t dcn321_resource_construct +ffffffff8216f550 t dcn321_mpc_create +ffffffff82173bb0 t dcn321_dwbc_create +ffffffff821745b0 t dcn321_mmhubbub_create +ffffffff82174a60 t dcn321_resource_destruct +ffffffff821750f0 t dcn321_destroy_resource_pool +ffffffff82175150 t dcn321_link_encoder_create +ffffffff82176220 t dcn321_update_bw_bounding_box +ffffffff82176270 t read_dce_straps +ffffffff821762a0 t dcn321_create_audio +ffffffff82176620 t dcn321_stream_encoder_create +ffffffff82178460 t dcn321_hpo_dp_stream_encoder_create +ffffffff82179240 t dcn321_hpo_dp_link_encoder_create +ffffffff82179690 t dcn321_hwseq_create +ffffffff82179b80 t dcn321_vpg_create +ffffffff8217a000 T bw_int_to_fixed_nonconst +ffffffff8217a090 T bw_frc_to_fixed +ffffffff8217a260 T bw_floor2 +ffffffff8217a310 T bw_ceil2 +ffffffff8217a390 T bw_mul +ffffffff8217b000 T convert_to_custom_float_format +ffffffff8217c000 T bw_calcs_init +ffffffff8217ce60 T bw_calcs +ffffffff8217e800 t calculate_bandwidth +ffffffff82186000 T scaler_settings_calculation +ffffffff82186350 T mode_support_and_system_configuration +ffffffff8218c180 T display_pipe_configuration +ffffffff8218cab0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff82192000 T dcn_bw_mod +ffffffff82192060 T dcn_bw_min2 +ffffffff821920a0 T dcn_bw_max +ffffffff821920d0 T dcn_bw_max2 +ffffffff82192110 T dcn_bw_floor2 +ffffffff821921b0 T dcn_bw_floor +ffffffff821921e0 T dcn_bw_ceil +ffffffff82192220 T dcn_bw_ceil2 +ffffffff821922d0 T dcn_bw_max3 +ffffffff82192350 T dcn_bw_max5 +ffffffff82192490 T dcn_bw_pow +ffffffff82192520 T dcn_bw_fabs +ffffffff82192560 T dcn_bw_log +ffffffff82193000 T swizzle_mode_to_macro_tile_size +ffffffff82193090 T dcn_validate_bandwidth +ffffffff82195300 T dcn_bw_sync_calcs_and_dml +ffffffff82195550 t dcn_bw_calc_rq_dlg_ttu +ffffffff82195d20 T dcn_find_dcfclk_suits_all +ffffffff82196180 T dcn_bw_update_from_pplib_fclks +ffffffff82196300 T dcn_bw_update_from_pplib_dcfclks +ffffffff821963d0 T dcn_get_soc_clks +ffffffff82196450 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff82197000 T dcn10_resource_construct_fp +ffffffff82198000 T dcn20_populate_dml_writeback_from_context +ffffffff82198180 T dcn20_fpu_set_wb_arb_params +ffffffff82198330 T dcn20_calculate_dlg_params +ffffffff82198b70 T dcn20_populate_dml_pipes_from_context +ffffffff82199a80 T dcn20_calculate_wm +ffffffff8219a270 T dcn20_update_bounding_box +ffffffff8219a4f0 T dcn20_cap_soc_clocks +ffffffff8219a850 T dcn20_patch_bounding_box +ffffffff8219aa40 T dcn20_validate_bandwidth_fp +ffffffff8219abe0 t dcn20_validate_bandwidth_internal +ffffffff8219afe0 T dcn20_fpu_set_wm_ranges +ffffffff8219b080 T dcn20_fpu_adjust_dppclk +ffffffff8219b120 T dcn21_populate_dml_pipes_from_context +ffffffff8219b230 T dcn21_validate_bandwidth_fp +ffffffff8219bcc0 T dcn21_update_bw_bounding_box +ffffffff8219c0d0 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff8219c130 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff8219c430 t calculate_wm_set_for_vlevel +ffffffff8219d000 T dml20_recalculate +ffffffff8219d740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821a2be0 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff821aa040 t TruncToValidBPP +ffffffff821aa220 t CalculateVMAndRowBytes +ffffffff821aa8e0 t CalculatePrefetchSourceLines +ffffffff821aaab0 t CalculateWriteBackDelay +ffffffff821aad80 t CalculatePrefetchSchedule +ffffffff821abc30 t CalculateFlipSchedule +ffffffff821ac000 t adjust_ReturnBW +ffffffff821ad000 T dml20v2_recalculate +ffffffff821ad740 t dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821b2d60 T dml20v2_ModeSupportAndSystemConfigurationFull +ffffffff821ba140 t TruncToValidBPP +ffffffff821ba6d0 t CalculateVMAndRowBytes +ffffffff821bad90 t CalculatePrefetchSourceLines +ffffffff821baf60 t CalculateWriteBackDelay +ffffffff821bb230 t CalculateDelayAfterScaler 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CalculatePrefetchSchedulePerPlane +ffffffff821d3190 t CalculateUrgentBurstFactor +ffffffff821d35a0 t CalculateFlipSchedule +ffffffff821d3a80 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821d4a70 t CalculatePrefetchSchedule +ffffffff821d7000 T dml21_rq_dlg_get_rq_reg +ffffffff821d7490 t dml_rq_dlg_get_rq_params +ffffffff821d7660 T dml21_rq_dlg_get_dlg_reg +ffffffff821d9930 t get_surf_rq_param +ffffffff821da250 t calculate_ttu_cursor +ffffffff821db000 T optc3_fpu_set_vrr_m_const +ffffffff821db4a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff821db7b0 T dcn30_fpu_set_mcif_arb_params +ffffffff821db920 T dcn30_fpu_update_soc_for_wm_a +ffffffff821db9f0 T dcn30_fpu_calculate_wm_and_dlg +ffffffff821dc480 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821dc670 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff821dc6d0 T dcn30_fpu_update_max_clk +ffffffff821dc780 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff821dc880 T dcn30_fpu_update_bw_bounding_box +ffffffff821dca60 T dcn3_fpu_build_wm_range_table +ffffffff821dcd40 T patch_dcn30_soc_bounding_box +ffffffff821dd000 T dml30_recalculate +ffffffff821dd5f0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821e40b0 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff821e4320 T dml30_CalculateWriteBackDISPCLK +ffffffff821e4490 t dml_max3 +ffffffff821e44f0 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff821ec040 t CalculateSwathAndDETConfiguration +ffffffff821ec740 t TruncToValidBPP +ffffffff821ec9a0 t CalculateVMAndRowBytes +ffffffff821ed010 t CalculatePrefetchSourceLines +ffffffff821ed1e0 t CalculateUrgentBurstFactor +ffffffff821ed470 t CalculateDCFCLKDeepSleep +ffffffff821ed790 t UseMinimumDCFCLK +ffffffff821eeab0 t CalculatePrefetchSchedule +ffffffff821eff50 t CalculateFlipSchedule +ffffffff821f0450 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821f1190 t CalculateSwathWidth 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dcn316_update_bw_bounding_box +ffffffff821fa280 T dcn_get_max_non_odm_pix_rate_100hz +ffffffff821fa2e0 T dcn_get_approx_det_segs_required_for_pstate +ffffffff821fb000 T dml31_recalculate +ffffffff821fb2d0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82202190 T dml31_CalculateWriteBackDISPCLK +ffffffff82202300 t dml_max3 +ffffffff82202360 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff8220a440 t CalculateSwathAndDETConfiguration +ffffffff8220aaa0 t TruncToValidBPP +ffffffff8220acf0 t CalculateDCFCLKDeepSleep +ffffffff8220b010 t CalculateVMAndRowBytes +ffffffff8220b650 t CalculatePrefetchSourceLines +ffffffff8220b820 t CalculateUrgentBurstFactor +ffffffff8220bab0 t UseMinimumDCFCLK +ffffffff8220ca40 t CalculatePrefetchSchedulePerPlane +ffffffff8220d1a0 t CalculateFlipSchedule +ffffffff8220d730 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8220e350 t CalculateSwathWidth +ffffffff8220e860 t CalculatePrefetchSchedule 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CalculateMaxVStartup +ffffffff82225fa0 t UseMinimumDCFCLK +ffffffff82226f30 t CalculatePrefetchSchedulePerPlane +ffffffff82227690 t CalculateFlipSchedule +ffffffff82227c20 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82228840 t CalculateSwathWidth +ffffffff82228d50 t CalculatePrefetchSchedule +ffffffff8222a130 t CalculateVupdateAndDynamicMetadataParameters +ffffffff8222b000 T dml314_rq_dlg_get_rq_reg +ffffffff8222b4b0 t dml_rq_dlg_get_rq_params +ffffffff8222b740 T dml314_rq_dlg_get_dlg_reg +ffffffff8222e100 t get_surf_rq_param +ffffffff8222f000 T dcn32_build_wm_range_table_fpu +ffffffff8222f390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff8222f540 T dcn32_internal_validate_bw +ffffffff822313b0 T dcn32_helper_populate_phantom_dlg_params +ffffffff82231550 T dcn32_predict_pipe_split +ffffffff82231780 T dcn32_set_phantom_stream_timing +ffffffff82231a90 T dcn32_determine_max_vratio_prefetch +ffffffff82231b70 t dcn32_split_stream_for_mpc_or_odm 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dml32_CalculateSwathAndDETConfiguration +ffffffff82244090 T dml32_CalculateSwathWidth +ffffffff82244950 T dml32_UnboundedRequest +ffffffff822449c0 T dml32_CalculateDETBufferSize +ffffffff82245000 T dml32_CalculateODMMode +ffffffff82245780 T dml32_CalculateRequiredDispclk +ffffffff82245940 T dml32_RoundToDFSGranularity +ffffffff822459d0 T dml32_CalculateOutputLink +ffffffff82246440 T dml32_TruncToValidBPP +ffffffff82246770 T dml32_CalculateDPPCLK +ffffffff82246910 T dml32_RequiredDTBCLK +ffffffff82246b60 t dml_max4 +ffffffff82246be0 T dml32_DSCDelayRequirement +ffffffff822470a0 T dml32_CalculateSurfaceSizeInMall +ffffffff82247bf0 T dml32_CalculateVMRowAndSwath +ffffffff82248a00 T dml32_CalculateVMAndRowBytes +ffffffff82249650 T dml32_CalculatePrefetchSourceLines +ffffffff822498a0 T dml32_CalculateMALLUseForStaticScreen +ffffffff822499e0 T dml32_CalculateRowBandwidth +ffffffff82249b40 T dml32_CalculateUrgentLatency +ffffffff82249bf0 T dml32_CalculateUrgentBurstFactor +ffffffff82249ea0 T dml32_CalculateDCFCLKDeepSleep +ffffffff8224a1f0 T dml32_CalculateWriteBackDelay +ffffffff8224a350 T dml32_UseMinimumDCFCLK +ffffffff8224b3c0 T dml32_CalculateExtraLatencyBytes +ffffffff8224b580 T dml32_CalculateTWait +ffffffff8224b670 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff8224b8d0 T dml32_get_return_bw_mbps +ffffffff8224ba90 T dml32_get_return_bw_mbps_vm_only +ffffffff8224bb70 T dml32_CalculateExtraLatency +ffffffff8224bd90 T dml32_CalculatePrefetchSchedule +ffffffff8224d400 T dml32_CalculateFlipSchedule +ffffffff8224d960 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff8224ea70 T dml32_CalculateWriteBackDISPCLK +ffffffff8224ec40 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff8224ec90 T dml32_CalculatePixelDeliveryTimes +ffffffff8224f110 T dml32_CalculateMetaAndPTETimes +ffffffff8224f870 T dml32_CalculateVMGroupAndRequestTimes +ffffffff8224fdb0 T dml32_CalculateDCCConfiguration +ffffffff822503c0 T dml32_CalculateStutterEfficiency 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+ffffffff8225ade0 T get_wm_urgent +ffffffff8225aef0 T get_wm_memory_trip +ffffffff8225b000 T get_wm_writeback_urgent +ffffffff8225b110 T get_wm_stutter_exit +ffffffff8225b220 T get_wm_stutter_enter_exit +ffffffff8225b330 T get_wm_z8_stutter_exit +ffffffff8225b440 T get_wm_z8_stutter_enter_exit +ffffffff8225b550 T get_stutter_efficiency_z8 +ffffffff8225b660 T get_stutter_num_bursts_z8 +ffffffff8225b770 T get_wm_dram_clock_change +ffffffff8225b880 T get_wm_writeback_dram_clock_change +ffffffff8225b990 T get_stutter_efficiency +ffffffff8225baa0 T get_stutter_efficiency_no_vblank +ffffffff8225bbb0 T get_stutter_period +ffffffff8225bcc0 T get_urgent_latency +ffffffff8225bdd0 T get_urgent_extra_latency +ffffffff8225bee0 T get_nonurgent_latency +ffffffff8225bff0 T get_dram_clock_change_latency +ffffffff8225c100 T get_dispclk_calculated +ffffffff8225c210 T get_total_data_read_bw +ffffffff8225c320 T get_return_bw +ffffffff8225c430 T get_tcalc +ffffffff8225c540 T get_fraction_of_urgent_bandwidth +ffffffff8225c650 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff8225c760 T get_cstate_max_cap_mode +ffffffff8225c880 T get_comp_buffer_size_kbytes +ffffffff8225c990 T get_pixel_chunk_size_in_kbyte +ffffffff8225cab0 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff8225cbd0 T get_meta_chunk_size_in_kbyte +ffffffff8225ccf0 T get_min_pixel_chunk_size_in_byte +ffffffff8225ce00 T get_min_meta_chunk_size_in_byte +ffffffff8225cf20 T get_fclk_watermark +ffffffff8225d030 T get_usr_retraining_watermark +ffffffff8225d140 T get_comp_buffer_reserved_space_kbytes +ffffffff8225d260 T get_comp_buffer_reserved_space_64bytes +ffffffff8225d380 T get_comp_buffer_reserved_space_zs +ffffffff8225d4a0 T get_unbounded_request_enabled +ffffffff8225d5c0 T get_dsc_delay +ffffffff8225d6f0 T get_dppclk_calculated +ffffffff8225d810 T get_dscclk_calculated +ffffffff8225d930 T get_min_ttu_vblank +ffffffff8225da50 T get_min_ttu_vblank_in_us +ffffffff8225db70 T get_vratio_prefetch_l +ffffffff8225dc90 T get_vratio_prefetch_c +ffffffff8225ddb0 T get_dst_x_after_scaler +ffffffff8225ded0 T get_dst_y_after_scaler +ffffffff8225dff0 T get_dst_y_per_vm_vblank +ffffffff8225e110 T get_dst_y_per_row_vblank +ffffffff8225e230 T get_dst_y_prefetch +ffffffff8225e350 T get_dst_y_per_vm_flip +ffffffff8225e470 T get_dst_y_per_row_flip +ffffffff8225e590 T get_refcyc_per_vm_group_vblank +ffffffff8225e6b0 T get_refcyc_per_vm_group_flip +ffffffff8225e7d0 T get_refcyc_per_vm_req_vblank +ffffffff8225e8f0 T get_refcyc_per_vm_req_flip +ffffffff8225ea10 T get_refcyc_per_vm_group_vblank_in_us +ffffffff8225eb30 T get_refcyc_per_vm_group_flip_in_us +ffffffff8225ec50 T get_refcyc_per_vm_req_vblank_in_us +ffffffff8225ed70 T get_refcyc_per_vm_req_flip_in_us +ffffffff8225ee90 T get_refcyc_per_vm_dmdata_in_us +ffffffff8225efb0 T get_dmdata_dl_delta_in_us +ffffffff8225f0d0 T get_refcyc_per_line_delivery_l_in_us +ffffffff8225f1f0 T get_refcyc_per_line_delivery_c_in_us +ffffffff8225f310 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff8225f430 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff8225f550 T get_refcyc_per_req_delivery_l_in_us +ffffffff8225f670 T get_refcyc_per_req_delivery_c_in_us +ffffffff8225f790 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff8225f8b0 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff8225f9d0 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff8225faf0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff8225fc10 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff8225fd30 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff8225fe50 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff8225ff70 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff82260090 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff822601b0 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff822602d0 T get_vstartup +ffffffff82260400 T get_vupdate_offset +ffffffff82260530 T get_vupdate_width +ffffffff82260650 T get_vready_offset +ffffffff82260770 T get_vready_at_or_after_vsync +ffffffff822608a0 T get_min_dst_y_next_start +ffffffff822609d0 T get_dst_y_per_pte_row_nom_l +ffffffff82260af0 T get_dst_y_per_pte_row_nom_c +ffffffff82260c10 T get_dst_y_per_meta_row_nom_l +ffffffff82260d30 T get_dst_y_per_meta_row_nom_c +ffffffff82260e50 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff82260f70 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff82261090 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff822611b0 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff822612d0 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff822613f0 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff82261510 T get_vstartup_calculated +ffffffff82261640 T get_dpte_row_height_linear_c +ffffffff82261770 T get_swath_height_l +ffffffff822618a0 T get_swath_height_c +ffffffff822619d0 T get_det_stored_buffer_size_l_bytes +ffffffff82261b00 T get_det_stored_buffer_size_c_bytes +ffffffff82261c30 T get_dpte_group_size_in_bytes +ffffffff82261d60 T get_vm_group_size_in_bytes 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dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff8226c730 T dc_set_disable_128b_132b_stream_overhead +ffffffff8226c760 T dc_dsc_get_default_config_option +ffffffff8226c7b0 t fit_num_slices_up +ffffffff8226c860 t decide_dsc_target_bpp_x16 +ffffffff8226d000 T calc_rc_params +ffffffff8226e000 T dscc_compute_dsc_parameters +ffffffff8226f000 T dal_hw_factory_dce110_init +ffffffff8226f060 t define_hpd_registers +ffffffff8226f0b0 t define_ddc_registers +ffffffff82270000 T dal_hw_translate_dce110_init +ffffffff82270030 t offset_to_id +ffffffff82270390 t id_to_offset +ffffffff82271000 T dal_hw_factory_dce120_init +ffffffff82271060 t define_hpd_registers +ffffffff822710b0 t define_ddc_registers +ffffffff82272000 T dal_hw_translate_dce120_init +ffffffff82272030 t offset_to_id +ffffffff822723a0 t id_to_offset +ffffffff82273000 T dal_hw_factory_dce80_init +ffffffff82273060 t define_hpd_registers +ffffffff822730b0 t define_ddc_registers +ffffffff82274000 T dal_hw_translate_dce80_init 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smu_v13_0_6_smu_send_hbm_bad_page_num -ffffffff823a3bf0 t smu_v13_0_6_get_smu_metrics_data -ffffffff823a3e80 t smu_v13_0_6_upload_dpm_level -ffffffff823a3f80 t smu_v13_0_6_i2c_xfer -ffffffff823a4280 t smu_v13_0_6_i2c_func -ffffffff823a42b0 t smu_v13_0_6_set_irq_state -ffffffff823a4540 t smu_v13_0_6_irq_process -ffffffff823a5000 T smu_v13_0_7_set_ppt_funcs -ffffffff823a5060 t smu_v13_0_7_get_allowed_feature_mask -ffffffff823a51d0 t smu_v13_0_7_set_default_dpm_table -ffffffff823a55f0 t smu_v13_0_7_populate_umd_state_clk -ffffffff823a5730 t smu_v13_0_7_print_clk_levels -ffffffff823a5840 t smu_v13_0_7_force_clk_levels -ffffffff823a59c0 t smu_v13_0_7_od_edit_dpm_table -ffffffff823a5e90 t smu_v13_0_7_restore_user_od_settings -ffffffff823a5f50 t smu_v13_0_7_get_power_profile_mode -ffffffff823a6090 t smu_v13_0_7_set_power_profile_mode -ffffffff823a62d0 t smu_v13_0_7_read_sensor -ffffffff823a64e0 t smu_v13_0_7_is_dpm_running -ffffffff823a6530 t smu_v13_0_7_get_fan_speed_pwm -ffffffff823a6610 t smu_v13_0_7_get_fan_speed_rpm -ffffffff823a6680 t smu_v13_0_7_get_thermal_temperature_range -ffffffff823a6780 t smu_v13_0_7_set_default_od_settings -ffffffff823a68b0 t smu_v13_0_7_dump_pptable -ffffffff823a68e0 t smu_v13_0_7_get_power_limit -ffffffff823a69c0 t smu_v13_0_7_set_df_cstate -ffffffff823a69e0 t smu_v13_0_7_init_smc_tables -ffffffff823a6bd0 t smu_v13_0_7_check_fw_status -ffffffff823a6c20 t smu_v13_0_7_set_mp1_state -ffffffff823a6c60 t smu_v13_0_7_setup_pptable -ffffffff823a6dc0 t smu_v13_0_7_baco_enter -ffffffff823a6e20 t smu_v13_0_7_baco_exit -ffffffff823a6e80 t smu_v13_0_7_is_mode1_reset_supported -ffffffff823a6ec0 t smu_v13_0_7_get_dpm_ultimate_freq -ffffffff823a6fe0 t smu_v13_0_7_get_gpu_metrics -ffffffff823a7410 t smu_v13_0_7_enable_mgpu_fan_boost -ffffffff823a8000 T yellow_carp_set_ppt_funcs -ffffffff823a8050 t yellow_carp_set_default_dpm_tables -ffffffff823a8080 t yellow_carp_print_clk_levels -ffffffff823a8100 t yellow_carp_force_clk_levels -ffffffff823a83c0 t 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amdgpio_attach -ffffffff825c02a0 T amdgpio_activate -ffffffff825c0390 T amdgpio_intr -ffffffff825c0530 T amdgpio_read_pin -ffffffff825c0580 T amdgpio_write_pin -ffffffff825c05f0 T amdgpio_intr_establish -ffffffff825c06e0 T amdgpio_intr_enable -ffffffff825c0760 T amdgpio_intr_disable -ffffffff825c07e0 T amdgpio_save -ffffffff825c0860 T amdgpio_restore -ffffffff825c08f0 T amdgpio_save_pin -ffffffff825c0960 T amdgpio_restore_pin -ffffffff825c09d0 T amdgpio_pin_intr -ffffffff825c1000 T acpihid_match -ffffffff825c1030 T acpihid_attach -ffffffff825c1210 T acpihid_init_dsm -ffffffff825c1370 T acpihid_eval -ffffffff825c1590 T acpihid_notify -ffffffff825c15f0 T acpihid_button_array_enable -ffffffff825c2000 t iosf_acpi_match -ffffffff825c2050 t iosf_acpi_attach -ffffffff825c2150 t iosf_acpi_mbi_mdr_rd -ffffffff825c21c0 t iosf_acpi_mbi_mdr_wr -ffffffff825c3000 T acpi_match -ffffffff825c3060 T acpi_attach -ffffffff825c30a0 T acpi_probe -ffffffff825c3240 T acpi_map -ffffffff825c3330 T acpi_unmap -ffffffff825c3380 T acpi_bus_space_map -ffffffff825c33a0 T acpi_bus_space_unmap -ffffffff825c33c0 T acpi_intr_establish -ffffffff825c3500 T acpi_intr_disestablish -ffffffff825c3510 T acpi_scan -ffffffff825c36b0 T acpi_acquire_glk -ffffffff825c3710 T acpi_release_glk -ffffffff825c3760 T acpi_attach_machdep -ffffffff825c38f0 T acpi_sleep_cpu -ffffffff825c3a90 T acpi_resume_cpu -ffffffff825c3b90 T sleep_mp -ffffffff825c3c80 T resume_mp -ffffffff825c3d70 T acpi_iommu_device_map -ffffffff825c4000 T hibernate_resume_machdep -ffffffff825c4050 T hibernate_drop_to_real_mode -ffffffff825c4060 T hibernate_activate_resume_pt_machdep -ffffffff825c40a0 T hibernate_switch_stack_machdep -ffffffff825c40e0 T hibernate_flush -ffffffff825c4110 T acpi_savecpu -ffffffff825c5000 T sleep_showstate -ffffffff825c50f0 T sleep_setstate -ffffffff825c5150 T gosleep -ffffffff825c5210 T sleep_abort -ffffffff825c5240 T sleep_resume -ffffffff825c52b0 T suspend_finish -ffffffff825c6000 T acpiopen -ffffffff825c60d0 T acpiclose -ffffffff825c6160 T acpiioctl -ffffffff825c62b0 T request_sleep -ffffffff825c6330 T acpi_filtdetach -ffffffff825c6380 T acpi_filtread -ffffffff825c63c0 T acpikqfilter -ffffffff825c7000 T acpipci_match -ffffffff825c7030 T acpipci_attach -ffffffff825c72f0 T acpipci_osc -ffffffff825c7430 T acpipci_parse_resources -ffffffff825c7560 T acpipci_attach_bus -ffffffff825c7730 T acpipci_print -ffffffff825c77a0 T acpipci_attach_busses -ffffffff825c8000 T efiopen -ffffffff825c8040 T eficlose -ffffffff825c8070 T efiioctl -ffffffff825c8110 T efiioc_get_table -ffffffff825c8280 T efiioc_var_get -ffffffff825c8500 T efiioc_var_next -ffffffff825c8720 T efiioc_var_set -ffffffff825c88a0 T efi_adapt_error -ffffffff825c9000 T efi_match -ffffffff825c9060 T efi_attach -ffffffff825c9330 T efi_map_runtime -ffffffff825c94b0 T efi_enter -ffffffff825c9550 T efi_leave -ffffffff825c95d0 T efi_fault -ffffffff825ca000 T vmm_probe -ffffffff825ca050 T vmm_attach -ffffffff825ca170 T vmm_activate -ffffffff825ca2b0 T vmmopen -ffffffff825ca300 T vmmclose -ffffffff825ca330 T vm_find -ffffffff825ca450 T vmmioctl -ffffffff825ca6d0 T vm_create -ffffffff825ca9a0 T vm_get_info -ffffffff825cabf0 T vm_terminate -ffffffff825cad60 T vm_resetcpu -ffffffff825cae80 T vm_share_mem -ffffffff825cafd0 T pledge_ioctl_vmm -ffffffff825cb0c0 T vm_find_vcpu -ffffffff825cb120 T vm_create_check_mem_ranges -ffffffff825cb2e0 T vm_teardown -ffffffff825cb420 T vcpu_must_stop -ffffffff825cc000 T vmm_enabled -ffffffff825cc080 T vmm_attach_machdep -ffffffff825cc230 T vmm_quiesce_vmx -ffffffff825cc400 T vmm_activate_machdep -ffffffff825cc520 T vmm_stop -ffffffff825cc650 T vmm_start -ffffffff825cc730 T vmmioctl_machdep -ffffffff825cc800 T vm_intr_pending -ffffffff825cc8a0 T vm_mprotect_ept -ffffffff825ccb20 T pledge_ioctl_vmm_machdep -ffffffff825ccb70 T vm_rwvmparams -ffffffff825ccd00 T vmm_init_pvclock -ffffffff825ccdd0 T vm_rwregs -ffffffff825ccee0 T vcpu_readregs_vmx -ffffffff825cd310 T vcpu_writeregs_vmx -ffffffff825cd780 T vcpu_readregs_svm -ffffffff825cdc30 T vcpu_writeregs_svm -ffffffff825ce100 T vmm_get_guest_memtype -ffffffff825ce180 T vmx_mprotect_ept -ffffffff825ce3e0 T vmx_pmap_find_pte_ept -ffffffff825ce4b0 T start_vmm_on_cpu -ffffffff825ce5d0 T stop_vmm_on_cpu -ffffffff825ce670 T vmclear_on_cpu -ffffffff825ce6f0 T vm_impl_init_vmx -ffffffff825ce800 T vm_impl_init_svm -ffffffff825ce910 T vm_impl_init -ffffffff825ce9b0 T vm_impl_deinit -ffffffff825ce9e0 T vcpu_reload_vmcs_vmx -ffffffff825ceb20 T vcpu_reset_regs_svm -ffffffff825ceeb0 T svm_setmsrbrw -ffffffff825cefc0 T svm_setmsrbr -ffffffff825cf090 T vmm_alloc_vpid -ffffffff825cf1a0 T svm_setmsrbw -ffffffff825cf280 T vmx_setmsrbr -ffffffff825cf330 T vmx_setmsrbw -ffffffff825cf3e0 T vmx_setmsrbrw -ffffffff825cf4f0 T svm_set_clean -ffffffff825cf540 T svm_set_dirty -ffffffff825cf590 T vcpu_reset_regs_vmx -ffffffff825cffd0 T vcpu_vmx_check_cap -ffffffff825d00d0 T vcpu_vmx_compute_ctrl -ffffffff825d02b0 T vcpu_init_vmx -ffffffff825d0650 T vcpu_deinit_vmx -ffffffff825d07d0 T vcpu_reset_regs -ffffffff825d0810 T vcpu_init_svm -ffffffff825d09a0 T vcpu_deinit_svm -ffffffff825d0ae0 T vcpu_init -ffffffff825d0ba0 T vmm_free_vpid -ffffffff825d0c10 T vcpu_deinit -ffffffff825d0c50 T vm_run -ffffffff825d0e10 T vcpu_run_vmx -ffffffff825d1600 T vcpu_run_svm -ffffffff825d1bf0 T vmm_fpurestore -ffffffff825d1cb0 T vmm_fpusave -ffffffff825d1d30 T vmm_translate_gva -ffffffff825d2040 T vmm_update_pvclock -ffffffff825d2140 T vmx_get_exit_info -ffffffff825d21a0 T vmx_handle_exit -ffffffff825d25d0 T vmx_instruction_error_decode -ffffffff825d27a0 T vmm_get_guest_cpu_cpl -ffffffff825d2890 T vmx_handle_intr -ffffffff825d2920 T svm_handle_hlt -ffffffff825d2970 T vmx_handle_hlt -ffffffff825d2a20 T svm_handle_exit -ffffffff825d2d40 T svm_handle_np_fault -ffffffff825d2ee0 T vmm_handle_cpuid -ffffffff825d3580 T svm_handle_msr -ffffffff825d3850 T svm_handle_xsetbv -ffffffff825d38f0 T svm_handle_inout -ffffffff825d39f0 T vmm_inject_ud -ffffffff825d3a20 T vmm_inject_db -ffffffff825d3a50 T vmx_handle_np_fault -ffffffff825d3bb0 T vmx_handle_inout -ffffffff825d3d30 T vmx_handle_cr -ffffffff825d3f30 T vmx_handle_rdmsr -ffffffff825d4000 T vmx_handle_wrmsr -ffffffff825d4270 T vmx_handle_xsetbv -ffffffff825d4340 T vmm_inject_gp -ffffffff825d4370 T vmx_get_exit_qualification -ffffffff825d43d0 T vmx_get_guest_faulttype -ffffffff825d4470 T svm_get_guest_faulttype -ffffffff825d44a0 T svm_fault_page -ffffffff825d4530 T vmx_fault_page -ffffffff825d4680 T vmm_get_guest_cpu_mode -ffffffff825d4780 T vmx_load_pdptes -ffffffff825d4a00 T vmx_handle_cr0_write -ffffffff825d4c10 T vmx_handle_cr4_write -ffffffff825d4cb0 T vmm_handle_xsetbv -ffffffff825d4d40 T vmx_handle_misc_enable_msr -ffffffff825d4da0 T vmm_pat_is_valid -ffffffff825d4e80 T vmm_gpa_is_valid -ffffffff825d4ef0 T vmx_exit_reason_decode -ffffffff825d4f30 T svm_exit_reason_decode -ffffffff825d5d40 T vcpu_state_decode -ffffffff825d6000 T vmm_dispatch_intr -ffffffff825d6020 T vmxon -ffffffff825d6050 T vmxoff -ffffffff825d6080 T vmclear -ffffffff825d60b0 T vmptrld -ffffffff825d60e0 T vmptrst -ffffffff825d6110 T vmwrite -ffffffff825d6140 T vmread -ffffffff825d6170 T invvpid -ffffffff825d618b t invvpid_fail -ffffffff825d6192 t invvpid_ret -ffffffff825d61b0 T invept -ffffffff825d61cb t invept_fail -ffffffff825d61d2 t invept_ret -ffffffff825d61f0 T vmx_enter_guest -ffffffff825d621b t skip_init -ffffffff825d62e8 t no_l1df_msr -ffffffff825d62eb t l1df_tlb_loop -ffffffff825d6304 t l1df_tlb_done -ffffffff825d630c t l1df_load_cache -ffffffff825d6323 t done_flush -ffffffff825d63b6 t do_resume -ffffffff825d643b t fail_launch_or_resume -ffffffff825d647d t fail_launch_unknown -ffffffff825d648a t fail_launch_invalid_vmcs -ffffffff825d6497 t fail_launch_valid_vmcs -ffffffff825d64b4 t vmx_exit_handler_asm -ffffffff825d6579 t restore_host -ffffffff825d6610 T svm_enter_guest -ffffffff825d67a0 t restore_host_svm -ffffffff825d7000 T sdmmc_match -ffffffff825d7050 T sdmmc_attach -ffffffff825d7390 T sdmmc_detach -ffffffff825d7440 T sdmmc_activate -ffffffff825d7510 T sdmmc_discover_task -ffffffff825d75d0 T sdmmc_create_thread -ffffffff825d7640 T sdmmc_holds_root_device -ffffffff825d76a0 T sdmmc_task_thread -ffffffff825d7890 T sdmmc_needs_discover -ffffffff825d7940 T sdmmc_del_task -ffffffff825d79f0 T sdmmc_card_detach -ffffffff825d7ad0 T sdmmc_add_task -ffffffff825d7b50 T sdmmc_card_attach -ffffffff825d7c60 T sdmmc_enable -ffffffff825d7db0 T sdmmc_scan -ffffffff825d7e40 T sdmmc_init -ffffffff825d7f40 T sdmmc_disable -ffffffff825d80a0 T sdmmc_function_free -ffffffff825d80c0 T sdmmc_delay -ffffffff825d8110 T sdmmc_select_card -ffffffff825d8330 T sdmmc_set_bus_power -ffffffff825d84e0 T sdmmc_function_alloc -ffffffff825d8570 T sdmmc_app_command -ffffffff825d8700 T sdmmc_mmc_command -ffffffff825d8780 T sdmmc_go_idle_state -ffffffff825d8890 T sdmmc_send_if_cond -ffffffff825d89e0 T sdmmc_set_relative_addr -ffffffff825d9000 T sdmmc_cisptr -ffffffff825d90a0 T sdmmc_read_cis -ffffffff825d93e0 T sdmmc_print_cis -ffffffff825d9550 T sdmmc_check_cis_quirks -ffffffff825da000 T sdmmc_io_enable -ffffffff825da2a0 T sdmmc_io_reset -ffffffff825da3d0 T sdmmc_io_send_op_cond -ffffffff825da540 T sdmmc_io_scan -ffffffff825da690 T sdmmc_io_init -ffffffff825da7c0 T sdmmc_io_set_highspeed -ffffffff825daa60 T sdmmc_io_set_bus_width -ffffffff825dacf0 T sdmmc_io_function_ready -ffffffff825dae70 T sdmmc_io_read_1 -ffffffff825dafc0 T sdmmc_io_function_enable -ffffffff825db390 T sdmmc_io_write_1 -ffffffff825db510 T sdmmc_io_function_disable -ffffffff825db790 T sdmmc_io_attach -ffffffff825db880 T sdmmc_print -ffffffff825dbad0 T sdmmc_submatch -ffffffff825dbb50 T sdmmc_io_detach -ffffffff825dbc00 T sdmmc_io_rw_direct -ffffffff825dbda0 T sdmmc_io_rw_extended_subr -ffffffff825dbf40 T sdmmc_io_rw_extended -ffffffff825dc340 T sdmmc_io_read_2 -ffffffff825dc4a0 T sdmmc_io_write_2 -ffffffff825dc600 T sdmmc_io_read_4 -ffffffff825dc760 T sdmmc_io_write_4 -ffffffff825dc8c0 T sdmmc_io_read_multi_1 -ffffffff825dc9b0 T sdmmc_io_write_multi_1 -ffffffff825dcaa0 T sdmmc_io_read_region_1 -ffffffff825dcb90 T sdmmc_io_write_region_1 -ffffffff825dcc80 T sdmmc_io_xchg -ffffffff825dce10 T sdmmc_intr_enable -ffffffff825dd080 T sdmmc_intr_disable -ffffffff825dd2f0 T sdmmc_intr_establish -ffffffff825dd3f0 T sdmmc_intr_disestablish -ffffffff825dd4e0 T sdmmc_card_intr -ffffffff825dd530 T sdmmc_intr_task -ffffffff825dd5c0 T sdmmc_io_set_blocklen -ffffffff825de000 T sdmmc_mem_enable -ffffffff825de450 T sdmmc_mem_send_op_cond -ffffffff825de600 T sdmmc_mem_signal_voltage -ffffffff825de6c0 T sdmmc_mem_scan -ffffffff825de9d0 T sdmmc_decode_csd -ffffffff825dee00 T sdmmc_decode_cid -ffffffff825df2a0 T sdmmc_mem_send_scr -ffffffff825df3e0 T sdmmc_mem_decode_scr -ffffffff825df440 T sdmmc_mem_send_cxd_data -ffffffff825df5b0 T sdmmc_mem_set_bus_width -ffffffff825df6c0 T sdmmc_mem_sd_switch -ffffffff825df970 T sdmmc_be512_to_bitfield512 -ffffffff825dfa20 T sdmmc_mem_mmc_switch -ffffffff825dfb10 T sdmmc_mem_init -ffffffff825dfc60 T sdmmc_mem_set_blocklen -ffffffff825dfd60 T sdmmc_mem_sd_init -ffffffff825e0140 T sdmmc_mem_mmc_init -ffffffff825e0800 T sdmmc_mem_select_transfer_mode -ffffffff825e0880 T sdmmc_mem_execute_tuning -ffffffff825e0910 T sdmmc_mem_read_block_subr -ffffffff825e0c70 T sdmmc_mem_single_read_block -ffffffff825e0d40 T sdmmc_mem_read_block -ffffffff825e0ef0 T sdmmc_mem_write_block_subr -ffffffff825e1240 T sdmmc_mem_single_write_block -ffffffff825e1310 T sdmmc_mem_write_block -ffffffff825e14c0 T sdmmc_mem_hibernate_write -ffffffff825e2000 T sdmmc_scsi_cmd -ffffffff825e21f0 T sdmmc_minphys -ffffffff825e2270 T sdmmc_scsi_attach -ffffffff825e2460 T sdmmc_alloc_ccbs -ffffffff825e25a0 T sdmmc_free_ccbs -ffffffff825e2600 T sdmmc_scsi_detach -ffffffff825e2760 T sdmmc_stimeout -ffffffff825e27e0 T sdmmc_ccb_alloc -ffffffff825e2890 T sdmmc_ccb_free -ffffffff825e2970 T sdmmc_inquiry -ffffffff825e2be0 T sdmmc_start_xs -ffffffff825e2cd0 T sdmmc_complete_xs -ffffffff825e2da0 T sdmmc_done_xs -ffffffff825e2df0 T sdmmc_scsi_hibernate_io -ffffffff825e3000 T bwfm_sdio_preinit -ffffffff825e34a0 T bwfm_sdio_txcheck -ffffffff825e34e0 T bwfm_sdio_txdata -ffffffff825e3550 T bwfm_sdio_txctl -ffffffff825e36a0 T bwfm_sdio_buscore_read -ffffffff825e36b0 T bwfm_sdio_buscore_write -ffffffff825e36d0 T bwfm_sdio_buscore_prepare -ffffffff825e3810 T bwfm_sdio_buscore_activate -ffffffff825e3890 T bwfm_sdio_match -ffffffff825e3940 T bwfm_sdio_attach -ffffffff825e3c00 T bwfm_sdio_detach -ffffffff825e3c60 T bwfm_sdio_task -ffffffff825e3dc0 T bwfm_sdio_write_1 -ffffffff825e3df0 T bwfm_sdio_read_1 -ffffffff825e3e20 T bwfm_sdio_write_4 -ffffffff825e3ed0 T bwfm_sdio_read_4 -ffffffff825e3f80 T bwfm_sdio_load_microcode -ffffffff825e41e0 T bwfm_sdio_clkctl -ffffffff825e4310 T bwfm_sdio_dev_write -ffffffff825e4360 T bwfm_sdio_intr -ffffffff825e43a0 T bwfm_sdio_ram_read_write -ffffffff825e45d0 T bwfm_sdio_htclk -ffffffff825e4840 T bwfm_sdio_readshared -ffffffff825e4910 T bwfm_sdio_dev_read -ffffffff825e4950 T bwfm_sdio_rx_frames -ffffffff825e4d00 T bwfm_sdio_tx_frames -ffffffff825e4e00 T bwfm_sdio_backplane -ffffffff825e4eb0 T bwfm_sdio_buf_read -ffffffff825e4f90 T bwfm_sdio_buf_write -ffffffff825e5040 T bwfm_sdio_frame_read_write -ffffffff825e51c0 T bwfm_sdio_newbuf -ffffffff825e5240 T bwfm_sdio_tx_ok -ffffffff825e52a0 T bwfm_sdio_tx_ctrlframe -ffffffff825e53a0 T bwfm_sdio_tx_dataframe -ffffffff825e54f0 T bwfm_sdio_rx_glom -ffffffff825e6000 T onewire_match -ffffffff825e6050 T onewire_attach -ffffffff825e60f0 T onewire_detach -ffffffff825e6160 T onewire_activate -ffffffff825e6180 T onewire_scan -ffffffff825e63a0 T onewire_createthread -ffffffff825e6410 T onewire_print -ffffffff825e64e0 T onewirebus_print -ffffffff825e6530 T onewire_lock -ffffffff825e6550 T onewire_unlock -ffffffff825e6570 T onewire_reset -ffffffff825e6590 T onewire_bit -ffffffff825e65b0 T onewire_read_byte -ffffffff825e66f0 T onewire_write_byte -ffffffff825e67d0 T onewire_read_block -ffffffff825e6870 T onewire_write_block -ffffffff825e6910 T onewire_triplet -ffffffff825e69f0 T onewire_matchrom -ffffffff825e6b40 T onewire_search -ffffffff825e6ee0 T onewire_thread -ffffffff825e7000 T onewire_crc -ffffffff825e70b0 T onewire_crc16 -ffffffff825e7170 T onewire_famname -ffffffff825e71b0 T onewire_matchbyfam -ffffffff825e8000 T owid_match -ffffffff825e8030 T owid_attach -ffffffff825e8100 T owid_detach -ffffffff825e8140 T owid_activate -ffffffff825e9000 T owsbm_match -ffffffff825e9030 T owsbm_attach -ffffffff825e91d0 T owsbm_detach -ffffffff825e9240 T owsbm_activate -ffffffff825e9270 T owsbm_update -ffffffff825ea000 T owtemp_match -ffffffff825ea030 T owtemp_attach -ffffffff825ea130 T owtemp_detach -ffffffff825ea1a0 T owtemp_activate -ffffffff825ea1d0 T owtemp_update -ffffffff825eb000 T owctr_match -ffffffff825eb030 T owctr_attach -ffffffff825eb180 T owctr_detach -ffffffff825eb1f0 T owctr_activate -ffffffff825eb220 T owctr_update -ffffffff825eb250 T owctr_update_counter -ffffffff825ec000 A __text_page_start -ffffffff825ec000 T Xsyscall_meltdown -ffffffff825ec00c T Xsyscall -ffffffff825ec26e t Xsyscall_trampback -ffffffff825ec280 T intr_user_exit -ffffffff825ec2c2 t intr_user_exit_post_ast -ffffffff825ec3ee t Xiretq_trampback -ffffffff825ec3fa T doreti_iret -ffffffff825ed000 T alltraps -ffffffff825ed138 T recall_trap -ffffffff825ed150 T alltraps_kern -ffffffff825ed153 T alltraps_kern_meltdown -ffffffff825ee000 ? Xsyscall32 -ffffffff825ee000 A __kutext_start -ffffffff825ee000 A __text_page_end -ffffffff825ef000 ? Xtrap00 -ffffffff825ef010 ? Xtrap01 -ffffffff825ef020 ? Xtrap02 -ffffffff825ef028 c calltrap_specstk -ffffffff825ef0f0 ? calltrap_specstk_tramp -ffffffff825ef110 ? Xtrap03 -ffffffff825ef120 ? Xtrap04 -ffffffff825ef130 ? Xtrap05 -ffffffff825ef140 ? Xtrap06 -ffffffff825ef150 ? Xtrap07 -ffffffff825ef160 ? Xtrap08 -ffffffff825ef170 ? Xtrap09 -ffffffff825ef180 ? Xtrap0a -ffffffff825ef190 ? Xtrap0b -ffffffff825ef1a0 ? Xtrap0c -ffffffff825ef1b0 ? Xtrap0d -ffffffff825ef240 ? Xtrap0e -ffffffff825ef250 ? Xintrspurious -ffffffff825ef250 ? Xtrap0f -ffffffff825ef260 ? Xtrap10 -ffffffff825ef270 ? Xtrap11 -ffffffff825ef280 ? Xtrap12 -ffffffff825ef290 ? Xtrap13 -ffffffff825ef2a0 ? Xtrap14 -ffffffff825ef2b0 ? Xtrap15 -ffffffff825ef2c0 ? Xtrap16 -ffffffff825ef2c0 ? Xtrap17 -ffffffff825ef2c0 ? Xtrap18 -ffffffff825ef2c0 ? Xtrap19 -ffffffff825ef2c0 ? Xtrap1a -ffffffff825ef2c0 ? Xtrap1b -ffffffff825ef2c0 ? Xtrap1c -ffffffff825ef2c0 ? Xtrap1d -ffffffff825ef2c0 ? Xtrap1e -ffffffff825ef2c0 ? Xtrap1f -ffffffff825ef2d0 ? x2apic_eoi -ffffffff825ef2f0 ? Xintr_lapic_ipi -ffffffff825ef330 ? Xipi_invltlb -ffffffff825ef360 ? Xipi_invlpg -ffffffff825ef390 ? Xipi_invlrange -ffffffff825ef3d0 ? Xipi_invltlb_pcid -ffffffff825ef410 ? Xipi_invlpg_pcid -ffffffff825ef460 ? Xipi_invlrange_pcid -ffffffff825ef4d0 ? Xintr_lapic_ltimer -ffffffff825ef510 ? Xintr_xen_upcall -ffffffff825ef550 ? Xintr_hyperv_upcall -ffffffff825ef590 ? Xintr_legacy0 -ffffffff825ef5d0 ? Xintr_legacy1 -ffffffff825ef610 ? Xintr_legacy2 -ffffffff825ef650 ? Xintr_legacy3 -ffffffff825ef690 ? Xintr_legacy4 -ffffffff825ef6d0 ? Xintr_legacy5 -ffffffff825ef710 ? Xintr_legacy6 -ffffffff825ef750 ? Xintr_legacy7 -ffffffff825ef790 ? Xintr_legacy8 -ffffffff825ef7d0 ? Xintr_legacy9 -ffffffff825ef810 ? Xintr_legacy10 -ffffffff825ef850 ? Xintr_legacy11 -ffffffff825ef890 ? Xintr_legacy12 -ffffffff825ef8d0 ? Xintr_legacy13 -ffffffff825ef910 ? Xintr_legacy14 -ffffffff825ef950 ? Xintr_legacy15 -ffffffff825ef990 ? Xintr_ioapic_edge0 -ffffffff825ef9d0 ? Xintr_ioapic_edge1 -ffffffff825efa10 ? Xintr_ioapic_edge2 -ffffffff825efa50 ? Xintr_ioapic_edge3 -ffffffff825efa90 ? Xintr_ioapic_edge4 -ffffffff825efad0 ? Xintr_ioapic_edge5 -ffffffff825efb10 ? Xintr_ioapic_edge6 -ffffffff825efb50 ? Xintr_ioapic_edge7 -ffffffff825efb90 ? Xintr_ioapic_edge8 -ffffffff825efbd0 ? Xintr_ioapic_edge9 -ffffffff825efc10 ? Xintr_ioapic_edge10 -ffffffff825efc50 ? Xintr_ioapic_edge11 -ffffffff825efc90 ? Xintr_ioapic_edge12 -ffffffff825efcd0 ? Xintr_ioapic_edge13 -ffffffff825efd10 ? Xintr_ioapic_edge14 -ffffffff825efd50 ? Xintr_ioapic_edge15 -ffffffff825efd90 ? Xintr_ioapic_edge16 -ffffffff825efdd0 ? Xintr_ioapic_edge17 -ffffffff825efe10 ? Xintr_ioapic_edge18 -ffffffff825efe50 ? Xintr_ioapic_edge19 -ffffffff825efe90 ? Xintr_ioapic_edge20 -ffffffff825efed0 ? Xintr_ioapic_edge21 -ffffffff825eff10 ? Xintr_ioapic_edge22 -ffffffff825eff50 ? Xintr_ioapic_edge23 -ffffffff825eff90 ? Xintr_ioapic_edge24 -ffffffff825effd0 ? Xintr_ioapic_edge25 -ffffffff825f0010 ? Xintr_ioapic_edge26 -ffffffff825f0050 ? Xintr_ioapic_edge27 -ffffffff825f0090 ? Xintr_ioapic_edge28 -ffffffff825f00d0 ? Xintr_ioapic_edge29 -ffffffff825f0110 ? Xintr_ioapic_edge30 -ffffffff825f0150 ? Xintr_ioapic_edge31 -ffffffff825f0190 ? Xintr_ioapic_edge32 -ffffffff825f01d0 ? Xintr_ioapic_edge33 -ffffffff825f0210 ? Xintr_ioapic_edge34 -ffffffff825f0250 ? Xintr_ioapic_edge35 -ffffffff825f0290 ? Xintr_ioapic_edge36 -ffffffff825f02d0 ? Xintr_ioapic_edge37 -ffffffff825f0310 ? Xintr_ioapic_edge38 -ffffffff825f0350 ? Xintr_ioapic_edge39 -ffffffff825f0390 ? Xintr_ioapic_edge40 -ffffffff825f03d0 ? Xintr_ioapic_edge41 -ffffffff825f0410 ? Xintr_ioapic_edge42 -ffffffff825f0450 ? Xintr_ioapic_edge43 -ffffffff825f0490 ? Xintr_ioapic_edge44 -ffffffff825f04d0 ? Xintr_ioapic_edge45 -ffffffff825f0510 ? Xintr_ioapic_edge46 -ffffffff825f0550 ? Xintr_ioapic_edge47 -ffffffff825f0590 ? Xintr_ioapic_edge48 -ffffffff825f05d0 ? Xintr_ioapic_edge49 -ffffffff825f0610 ? Xintr_ioapic_edge50 -ffffffff825f0650 ? Xintr_ioapic_edge51 -ffffffff825f0690 ? Xintr_ioapic_edge52 -ffffffff825f06d0 ? Xintr_ioapic_edge53 -ffffffff825f0710 ? Xintr_ioapic_edge54 -ffffffff825f0750 ? Xintr_ioapic_edge55 -ffffffff825f0790 ? Xintr_ioapic_edge56 -ffffffff825f07d0 ? Xintr_ioapic_edge57 -ffffffff825f0810 ? Xintr_ioapic_edge58 -ffffffff825f0850 ? Xintr_ioapic_edge59 -ffffffff825f0890 ? Xintr_ioapic_edge60 -ffffffff825f08d0 ? Xintr_ioapic_edge61 -ffffffff825f0910 ? Xintr_ioapic_edge62 -ffffffff825f0950 ? Xintr_ioapic_edge63 -ffffffff825f0990 ? Xintr_ioapic_level0 -ffffffff825f09d0 ? Xintr_ioapic_level1 -ffffffff825f0a10 ? Xintr_ioapic_level2 -ffffffff825f0a50 ? Xintr_ioapic_level3 -ffffffff825f0a90 ? Xintr_ioapic_level4 -ffffffff825f0ad0 ? Xintr_ioapic_level5 -ffffffff825f0b10 ? Xintr_ioapic_level6 -ffffffff825f0b50 ? Xintr_ioapic_level7 -ffffffff825f0b90 ? Xintr_ioapic_level8 -ffffffff825f0bd0 ? Xintr_ioapic_level9 -ffffffff825f0c10 ? Xintr_ioapic_level10 -ffffffff825f0c50 ? Xintr_ioapic_level11 -ffffffff825f0c90 ? Xintr_ioapic_level12 -ffffffff825f0cd0 ? Xintr_ioapic_level13 -ffffffff825f0d10 ? Xintr_ioapic_level14 -ffffffff825f0d50 ? Xintr_ioapic_level15 -ffffffff825f0d90 ? Xintr_ioapic_level16 -ffffffff825f0dd0 ? Xintr_ioapic_level17 -ffffffff825f0e10 ? Xintr_ioapic_level18 -ffffffff825f0e50 ? Xintr_ioapic_level19 -ffffffff825f0e90 ? Xintr_ioapic_level20 -ffffffff825f0ed0 ? Xintr_ioapic_level21 -ffffffff825f0f10 ? Xintr_ioapic_level22 -ffffffff825f0f50 ? Xintr_ioapic_level23 -ffffffff825f0f90 ? Xintr_ioapic_level24 -ffffffff825f0fd0 ? Xintr_ioapic_level25 -ffffffff825f1010 ? Xintr_ioapic_level26 -ffffffff825f1050 ? Xintr_ioapic_level27 -ffffffff825f1090 ? Xintr_ioapic_level28 -ffffffff825f10d0 ? Xintr_ioapic_level29 -ffffffff825f1110 ? Xintr_ioapic_level30 -ffffffff825f1150 ? Xintr_ioapic_level31 -ffffffff825f1190 ? Xintr_ioapic_level32 -ffffffff825f11d0 ? Xintr_ioapic_level33 -ffffffff825f1210 ? Xintr_ioapic_level34 -ffffffff825f1250 ? Xintr_ioapic_level35 -ffffffff825f1290 ? Xintr_ioapic_level36 -ffffffff825f12d0 ? Xintr_ioapic_level37 -ffffffff825f1310 ? Xintr_ioapic_level38 -ffffffff825f1350 ? Xintr_ioapic_level39 -ffffffff825f1390 ? Xintr_ioapic_level40 -ffffffff825f13d0 ? Xintr_ioapic_level41 -ffffffff825f1410 ? Xintr_ioapic_level42 -ffffffff825f1450 ? Xintr_ioapic_level43 -ffffffff825f1490 ? Xintr_ioapic_level44 -ffffffff825f14d0 ? Xintr_ioapic_level45 -ffffffff825f1510 ? Xintr_ioapic_level46 -ffffffff825f1550 ? Xintr_ioapic_level47 -ffffffff825f1590 ? Xintr_ioapic_level48 -ffffffff825f15d0 ? Xintr_ioapic_level49 -ffffffff825f1610 ? Xintr_ioapic_level50 -ffffffff825f1650 ? Xintr_ioapic_level51 -ffffffff825f1690 ? Xintr_ioapic_level52 -ffffffff825f16d0 ? Xintr_ioapic_level53 -ffffffff825f1710 ? Xintr_ioapic_level54 -ffffffff825f1750 ? Xintr_ioapic_level55 -ffffffff825f1790 ? Xintr_ioapic_level56 -ffffffff825f17d0 ? Xintr_ioapic_level57 -ffffffff825f1810 ? Xintr_ioapic_level58 -ffffffff825f1850 ? Xintr_ioapic_level59 -ffffffff825f1890 ? Xintr_ioapic_level60 -ffffffff825f18d0 ? Xintr_ioapic_level61 -ffffffff825f1910 ? Xintr_ioapic_level62 -ffffffff825f1950 ? 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vga_50lscreen_mono -ffffffff827011c8 R vga_50lscreen_bf -ffffffff827011f8 R vga_screenlist -ffffffff82701208 R vga_screenlist_mono -ffffffff82701218 R vga_accessops -ffffffff82701278 r i945_wm_info -ffffffff827012b8 r bgansitopc -ffffffff827012c0 r pctoansi -ffffffff82701300 r sdma_offsets -ffffffff82701300 r sdma_offsets -ffffffff82701338 r iha_rate_tbl -ffffffff82701370 r i830_a_wm_info -ffffffff827013a8 r gen9_edram_size_mb.ways -ffffffff82701408 r aggr_periodic_times -ffffffff82701500 r michael_final.pad -ffffffff82701528 r rt_copysa.maskarray -ffffffff82701530 r i915_wm_info -ffffffff82701538 r amdgpu_ih_clientid_jpeg -ffffffff82701538 r amdgpu_ih_clientid_uvds -ffffffff82701538 r amdgpu_ih_clientid_vcns -ffffffff82701538 r amdgpu_ih_clientid_vcns -ffffffff82701538 r amdgpu_ih_clientid_vcns -ffffffff82701568 r jsl_ehl_revids -ffffffff82701578 r vga_setfontset.cmaptabb -ffffffff827015e8 r i830_bc_wm_info -ffffffff82701650 r hsw_activate_psr2.map -ffffffff82701658 r tgl_revids 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ciss_switch -ffffffff8270f030 R ciss_level -ffffffff8270f050 R ciss_stat -ffffffff82710000 R ami_switch -ffffffff82710028 R ami_raw_switch -ffffffff82711000 R mfi_switch -ffffffff82711028 R mfi_pd_switch -ffffffff82711050 r mfi_iop_xscale -ffffffff82711080 r mfi_iop_ppc -ffffffff827110b0 r mfi_iop_gen2 -ffffffff827110e0 r mfi_iop_skinny -ffffffff82711110 r mfi_bbu_indicators -ffffffff82712000 R qlw_switch -ffffffff82713000 R isp_2100_risc_code -ffffffff82725bf0 R isp_2200_risc_code -ffffffff82738990 R isp_2300_risc_code -ffffffff82752408 R qla_switch -ffffffff82752430 r qla_regs_2100 -ffffffff82752460 r qla_regs_2200 -ffffffff82752490 r qla_regs_23XX -ffffffff82753000 R ahci_atascsi_methods -ffffffff82754000 R nvme_switch -ffffffff82754028 r nvme_ops -ffffffff82755000 R mpi_switch -ffffffff82755060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs -ffffffff82755090 r chv_oa_mux_regs -ffffffff827550b0 r fiji_clock_stretcher_lookup_table -ffffffff827550b0 r tonga_clock_stretcher_lookup_table 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hpt366_pio -ffffffff82755800 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs -ffffffff82755820 r ether_crc32_be_update.rev -ffffffff82755820 r rtw_grf5101_mac_crypt.caesar -ffffffff82755870 r snb_b_fdi_train_param -ffffffff82755940 r intel_hpll_vco.elk_vco -ffffffff82755960 r icl_revids -ffffffff827559c0 r pin_offsets -ffffffff827559e0 r amdgpu_ih_srcid_jpeg -ffffffff82755a20 r firmware_list -ffffffff82755a80 r atom_arg_shift -ffffffff82755a80 r atom_arg_shift -ffffffff82755ac0 r pf_syncookie_wstab -ffffffff82755ae0 r ieee80211_media_init.mopts -ffffffff82755b40 r add_entropy_words.twist_table -ffffffff82755be0 r urtw_8225v2_txpwr_cck -ffffffff82755c00 r bwfm_pci_prio2fifo -ffffffff82755c00 r ieee80211_up_to_ac.up_to_ac -ffffffff82755cc0 r paritytab -ffffffff82755cc0 r x86emu_parity_tab -ffffffff82755ce0 r legacy_connector_convert -ffffffff82755d20 r gen7_oa_mux_regs -ffffffff82755d40 r hsw_oa_mux_regs -ffffffff82755d60 r notetab -ffffffff82755d80 r urtw_8225v2_txpwr_cck_ch14 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dmub_dcn32_configure_dmub_in_system_memory +ffffffff822d0580 T dmub_dcn32_send_inbox0_cmd +ffffffff822d05b0 T dmub_dcn32_clear_inbox0_ack_register +ffffffff822d05e0 T dmub_dcn32_read_inbox0_ack_register +ffffffff822d1000 T dmub_reg_update +ffffffff822d1150 T dmub_reg_set +ffffffff822d12b0 T dmub_reg_get +ffffffff822d2000 T dmub_flush_buffer_mem +ffffffff822d2030 T dmub_srv_create +ffffffff822d25b0 T dmub_srv_destroy +ffffffff822d25d0 T dmub_srv_calc_region_info +ffffffff822d29c0 T dmub_srv_calc_mem_info +ffffffff822d2b80 T dmub_srv_has_hw_support +ffffffff822d2bf0 T dmub_srv_is_hw_init +ffffffff822d2c70 T dmub_srv_hw_init +ffffffff822d30d0 T dmub_srv_sync_inbox1 +ffffffff822d3180 T dmub_srv_hw_reset +ffffffff822d3210 T dmub_srv_cmd_queue +ffffffff822d3310 T dmub_srv_cmd_execute +ffffffff822d33d0 T dmub_srv_wait_for_auto_load +ffffffff822d3470 T dmub_srv_wait_for_idle +ffffffff822d3520 T dmub_srv_send_gpint_command +ffffffff822d3610 T dmub_srv_get_gpint_response +ffffffff822d3670 T dmub_srv_get_gpint_dataout +ffffffff822d36d0 T dmub_srv_get_fw_boot_status +ffffffff822d3740 T dmub_srv_get_fw_boot_option +ffffffff822d37b0 T dmub_srv_set_skip_panel_power_sequence +ffffffff822d3810 T dmub_srv_cmd_with_reply_data +ffffffff822d3a70 T dmub_srv_get_outbox0_msg +ffffffff822d3b10 T dmub_srv_get_diagnostic_data +ffffffff822d3b60 T dmub_srv_should_detect +ffffffff822d3bb0 T dmub_srv_clear_inbox0_ack +ffffffff822d3c00 T dmub_srv_wait_for_inbox0_ack +ffffffff822d3cb0 T dmub_srv_send_inbox0_cmd +ffffffff822d4000 T dmub_srv_stat_get_notification +ffffffff822d5000 T setup_x_points_distribution +ffffffff822d5170 T log_x_points_distribution +ffffffff822d51a0 T precompute_pq +ffffffff822d5370 t compute_pq +ffffffff822d5570 T precompute_de_pq +ffffffff822d56d0 t compute_de_pq +ffffffff822d5990 T calculate_user_regamma_coeff +ffffffff822d5d70 t apply_lut_1d +ffffffff822d60a0 T calculate_user_regamma_ramp +ffffffff822d6980 T mod_color_calculate_degamma_params +ffffffff822d74d0 t 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amdgpu_dpm_handle_passthrough_sbr +ffffffff822f2650 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff822f26d0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff822f2750 T amdgpu_dpm_get_dpm_freq_range +ffffffff822f27f0 T amdgpu_dpm_set_soft_freq_range +ffffffff822f2890 T amdgpu_dpm_write_watermarks_table +ffffffff822f2910 T amdgpu_dpm_wait_for_event +ffffffff822f29a0 T amdgpu_dpm_set_residency_gfxoff +ffffffff822f2a20 T amdgpu_dpm_get_residency_gfxoff +ffffffff822f2aa0 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff822f2b20 T amdgpu_dpm_get_status_gfxoff +ffffffff822f2ba0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff822f2bf0 T amdgpu_dpm_gfx_state_change +ffffffff822f2c60 T amdgpu_dpm_get_ecc_info +ffffffff822f2ce0 T amdgpu_dpm_get_vce_clock_state +ffffffff822f2d70 T amdgpu_dpm_get_current_power_state +ffffffff822f2de0 T amdgpu_dpm_set_power_state +ffffffff822f2f40 T amdgpu_dpm_dispatch_task +ffffffff822f2fe0 T amdgpu_dpm_get_performance_level +ffffffff822f3070 T amdgpu_dpm_force_performance_level +ffffffff822f3250 T amdgpu_dpm_get_pp_num_states +ffffffff822f32e0 T amdgpu_dpm_get_pp_table +ffffffff822f3370 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff822f3410 T amdgpu_dpm_odn_edit_dpm_table +ffffffff822f34b0 T amdgpu_dpm_print_clock_levels +ffffffff822f3540 T amdgpu_dpm_emit_clock_levels +ffffffff822f35e0 T amdgpu_dpm_set_ppfeature_status +ffffffff822f3670 T amdgpu_dpm_get_ppfeature_status +ffffffff822f3700 T amdgpu_dpm_force_clock_level +ffffffff822f3790 T amdgpu_dpm_get_sclk_od +ffffffff822f3810 T amdgpu_dpm_set_sclk_od +ffffffff822f3990 T amdgpu_dpm_get_mclk_od +ffffffff822f3a10 T amdgpu_dpm_set_mclk_od +ffffffff822f3b90 T amdgpu_dpm_get_power_profile_mode +ffffffff822f3c20 T amdgpu_dpm_set_power_profile_mode +ffffffff822f3cc0 T amdgpu_dpm_get_gpu_metrics +ffffffff822f3d50 T amdgpu_dpm_get_fan_control_mode +ffffffff822f3de0 T amdgpu_dpm_set_fan_speed_pwm +ffffffff822f3e70 T amdgpu_dpm_get_fan_speed_pwm +ffffffff822f3f00 T amdgpu_dpm_get_fan_speed_rpm +ffffffff822f3f90 T amdgpu_dpm_set_fan_speed_rpm +ffffffff822f4020 T amdgpu_dpm_set_fan_control_mode +ffffffff822f40b0 T amdgpu_dpm_get_power_limit +ffffffff822f4160 T amdgpu_dpm_set_power_limit +ffffffff822f41f0 T amdgpu_dpm_is_cclk_dpm_supported +ffffffff822f4260 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff822f42f0 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff822f4390 T amdgpu_dpm_is_overdrive_supported +ffffffff822f4400 T amdgpu_dpm_set_pp_table +ffffffff822f44a0 T amdgpu_dpm_get_num_cpu_cores +ffffffff822f44f0 T amdgpu_dpm_stb_debug_fs_init +ffffffff822f4540 T amdgpu_dpm_display_configuration_change +ffffffff822f45d0 T amdgpu_dpm_get_clock_by_type +ffffffff822f4670 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff822f4700 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff822f47a0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff822f4840 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff822f48d0 T amdgpu_dpm_display_clock_voltage_request +ffffffff822f4960 T amdgpu_dpm_get_current_clocks +ffffffff822f49f0 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff822f4a70 T amdgpu_dpm_set_active_display_count +ffffffff822f4b00 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff822f4b90 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff822f4c30 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff822f4cd0 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff822f4d60 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff822f4df0 T amdgpu_dpm_get_uclk_dpm_states +ffffffff822f4e90 T amdgpu_dpm_get_dpm_clock_table +ffffffff822f5000 T amdgpu_dpm_get_active_displays +ffffffff822f50a0 T amdgpu_dpm_get_vblank_time +ffffffff822f5150 T amdgpu_dpm_get_vrefresh +ffffffff822f6000 T amdgpu_pm_sysfs_init +ffffffff822f6030 T amdgpu_pm_sysfs_fini +ffffffff822f6060 T amdgpu_debugfs_pm_init +ffffffff822f7000 T amdgpu_dpm_print_class_info +ffffffff822f72b0 T amdgpu_dpm_print_cap_info +ffffffff822f7340 T amdgpu_dpm_print_ps_status +ffffffff822f73d0 T amdgpu_pm_print_power_states +ffffffff822f7460 T amdgpu_get_platform_caps +ffffffff822f7500 T amdgpu_parse_extended_power_table +ffffffff822f8290 t amdgpu_parse_clk_voltage_dep_table +ffffffff822f8340 T amdgpu_free_extended_power_table +ffffffff822f8450 T amdgpu_add_thermal_controller +ffffffff822f88a0 T amdgpu_get_vce_clock_state +ffffffff822f88e0 T amdgpu_legacy_dpm_compute_clocks +ffffffff822f8d70 T amdgpu_dpm_thermal_work_handler +ffffffff822f9000 t pp_early_init +ffffffff822f9100 t pp_late_init +ffffffff822f9220 t pp_sw_init +ffffffff822f92b0 t pp_sw_fini +ffffffff822f9300 t pp_hw_init +ffffffff822f9360 t pp_hw_fini +ffffffff822f93d0 t pp_late_fini +ffffffff822f9430 t pp_suspend +ffffffff822f9480 t pp_resume +ffffffff822f94a0 t pp_is_idle +ffffffff822f94d0 t pp_wait_for_idle +ffffffff822f9500 t pp_sw_reset +ffffffff822f9530 t pp_set_clockgating_state +ffffffff822f9560 t pp_set_powergating_state +ffffffff822f9590 t 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pp_display_clock_voltage_request +ffffffff822fab90 t pp_get_display_mode_validation_clocks +ffffffff822fabf0 t pp_notify_smu_enable_pwe +ffffffff822fac50 t pp_enable_mgpu_fan_boost +ffffffff822facb0 t pp_set_active_display_count +ffffffff822facf0 t pp_set_hard_min_dcefclk_by_freq +ffffffff822fad50 t pp_set_hard_min_fclk_by_freq +ffffffff822fadb0 t pp_set_min_deep_sleep_dcefclk +ffffffff822fae10 t pp_get_asic_baco_capability +ffffffff822fae80 t pp_get_asic_baco_state +ffffffff822faee0 t pp_set_asic_baco_state +ffffffff822faf50 t pp_get_ppfeature_status +ffffffff822fafb0 t pp_set_ppfeature_status +ffffffff822fb000 t pp_asic_reset_mode_2 +ffffffff822fb060 t pp_set_df_cstate +ffffffff822fb0c0 t pp_set_xgmi_pstate +ffffffff822fb120 t pp_get_gpu_metrics +ffffffff822fb180 t pp_get_prv_buffer_details +ffffffff822fb200 t pp_pm_compute_clocks +ffffffff822fb2c0 t pp_swctf_delayed_work_handler +ffffffff822fb400 t __delayed_work_tick +ffffffff822fc000 T ci_baco_set_state +ffffffff822fd000 T baco_program_registers +ffffffff822fd0d0 t baco_cmd_handler +ffffffff822fd250 T soc15_baco_program_registers +ffffffff822fe000 T fiji_baco_set_state +ffffffff822ff000 T phm_setup_asic +ffffffff822ff050 T phm_power_down_asic +ffffffff822ff0a0 T phm_set_power_state +ffffffff822ff110 T phm_enable_dynamic_state_management +ffffffff822ff1c0 T phm_disable_dynamic_state_management +ffffffff822ff260 T phm_force_dpm_levels +ffffffff822ff2b0 T phm_apply_state_adjust_rules +ffffffff822ff300 T phm_apply_clock_adjust_rules +ffffffff822ff350 T phm_powerdown_uvd +ffffffff822ff3a0 T phm_disable_clock_power_gatings +ffffffff822ff3f0 T phm_pre_display_configuration_changed +ffffffff822ff450 T phm_display_configuration_changed +ffffffff822ff4b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff822ff510 T phm_stop_thermal_controller +ffffffff822ff570 T phm_register_irq_handlers +ffffffff822ff5c0 T phm_start_thermal_controller +ffffffff822ff710 T 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atomctrl_get_engine_pll_dividers_ai +ffffffff823048d0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff82304990 T atomctrl_get_reference_clock +ffffffff823049f0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff82304ab0 T atomctrl_get_voltage_table_v3 +ffffffff82304c10 T atomctrl_get_pp_assign_pin +ffffffff82304cf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff823050c0 t GetScaledFraction +ffffffff82305150 t fDecodeLeakageID +ffffffff823051b0 t fSqrt +ffffffff82305230 T atomctrl_get_voltage_evv_on_sclk +ffffffff823052b0 T atomctrl_get_voltage_evv +ffffffff82305360 T atomctrl_get_mpll_reference_clock +ffffffff823053d0 T atomctrl_is_asic_internal_ss_supported +ffffffff82305420 T atomctrl_get_memory_clock_spread_spectrum +ffffffff82305520 T atomctrl_get_engine_clock_spread_spectrum +ffffffff82305620 T atomctrl_read_efuse +ffffffff823056d0 T atomctrl_set_ac_timing_ai +ffffffff82305730 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff823057b0 T atomctrl_get_smc_sclk_range_table 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pp_atomfwctrl_get_smc_dpm_information +ffffffff82307000 T encode_pcie_lane_width +ffffffff82307030 T decode_pcie_lane_width +ffffffff82308000 t pp_tables_v1_0_initialize +ffffffff82309450 t pp_tables_v1_0_uninitialize +ffffffff82309600 T get_number_of_powerplay_table_entries_v1_0 +ffffffff823096b0 T get_powerplay_table_entry_v1_0 +ffffffff8230a000 T pp_tables_get_response_times +ffffffff8230a0d0 T pp_tables_get_num_of_entries +ffffffff8230a190 T pp_tables_get_entry +ffffffff8230a4a0 t init_non_clock_fields +ffffffff8230a5e0 t pp_tables_initialize +ffffffff8230b760 t pp_tables_uninitialize +ffffffff8230b960 t get_number_of_vce_state_table_entries +ffffffff8230ba50 t get_vce_state_table_entry +ffffffff8230c000 T smu10_init_function_pointers +ffffffff8230c040 t smu10_hwmgr_backend_init +ffffffff8230c6e0 t smu10_hwmgr_backend_fini +ffffffff8230c820 t smu10_setup_asic_task +ffffffff8230c890 t smu10_get_power_state_size +ffffffff8230c8c0 t smu10_apply_state_adjust_rules +ffffffff8230c8f0 t smu10_dpm_force_dpm_level +ffffffff8230ce70 t smu10_enable_dpm_tasks +ffffffff8230cf30 t smu10_disable_dpm_tasks +ffffffff8230cf60 t smu10_dpm_patch_boot_state +ffffffff8230cf90 t smu10_dpm_get_pp_table_entry +ffffffff8230cff0 t smu10_dpm_get_num_of_pp_table_entries +ffffffff8230d040 t smu10_powergate_vcn +ffffffff8230d0e0 t smu10_dpm_get_mclk +ffffffff8230d140 t smu10_dpm_get_sclk +ffffffff8230d190 t smu10_set_power_state_tasks +ffffffff8230d200 t smu10_set_cpu_power_state +ffffffff8230d230 t smu10_store_cc6_data +ffffffff8230d2a0 t smu10_get_dal_power_level +ffffffff8230d2d0 t smu10_get_performance_level +ffffffff8230d370 t smu10_get_current_shallow_sleep_clocks +ffffffff8230d3d0 t smu10_get_clock_by_type_with_latency +ffffffff8230d520 t smu10_get_clock_by_type_with_voltage +ffffffff8230d630 t smu10_set_watermarks_for_clocks_ranges +ffffffff8230d700 t smu10_display_clock_voltage_request +ffffffff8230d7a0 t smu10_get_max_high_clocks +ffffffff8230d7d0 t smu10_power_off_asic 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T smu7_baco_set_state +ffffffff82310000 T smu7_powerdown_uvd +ffffffff82310050 T smu7_disable_clock_power_gating +ffffffff823100e0 T smu7_powergate_uvd +ffffffff823101d0 T smu7_powergate_vce +ffffffff823102c0 T smu7_update_clock_gatings +ffffffff82310670 T smu7_powergate_gfx +ffffffff82311000 T smu7_get_sleep_divider_id_from_clock +ffffffff823110a0 T smu7_init_function_pointers +ffffffff82311100 t smu7_hwmgr_backend_init +ffffffff82312f80 t smu7_hwmgr_backend_fini +ffffffff82312ff0 t smu7_setup_asic_task +ffffffff82313360 t smu7_get_power_state_size +ffffffff82313390 t smu7_apply_state_adjust_rules +ffffffff82313830 t smu7_force_dpm_level +ffffffff82313d40 t smu7_enable_dpm_tasks +ffffffff823165d0 t smu7_disable_dpm_tasks +ffffffff82316c10 t smu7_dpm_patch_boot_state +ffffffff82316d50 t smu7_get_pp_table_entry +ffffffff82317150 t smu7_get_number_of_powerplay_table_entries +ffffffff823171c0 t smu7_dpm_get_mclk +ffffffff82317260 t smu7_dpm_get_sclk +ffffffff82317300 t smu7_set_power_state_tasks +ffffffff82318020 t smu7_notify_smc_display_config_after_ps_adjustment +ffffffff82318050 t smu7_display_configuration_changed_task +ffffffff82318210 t smu7_set_max_fan_rpm_output +ffffffff82318240 t smu7_set_max_fan_pwm_output +ffffffff82318260 t smu7_set_fan_control_mode +ffffffff823182f0 t smu7_get_fan_control_mode +ffffffff82318330 t smu7_register_irq_handlers +ffffffff823183e0 t smu7_check_smc_update_required_for_display_configuration +ffffffff82318490 t smu7_check_states_equal +ffffffff82318630 t smu7_get_performance_level +ffffffff823186c0 t smu7_get_clock_by_type +ffffffff82318880 t smu7_get_clock_by_type_with_latency +ffffffff82318a50 t smu7_set_watermarks_for_clocks_ranges +ffffffff82318c70 t smu7_get_max_high_clocks +ffffffff82318cf0 t smu7_power_off_asic +ffffffff82318d50 t smu7_force_clock_level +ffffffff82318e60 t smu7_print_clock_levels +ffffffff82319450 t smu7_get_sclk_od +ffffffff823194b0 t smu7_set_sclk_od +ffffffff82319570 t smu7_get_mclk_od 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smu7_disable_smc_cac +ffffffff8231c970 T smu7_set_power_limit +ffffffff8231c9d0 T smu7_enable_power_containment +ffffffff8231cb60 T smu7_disable_power_containment +ffffffff8231cc80 T smu7_power_control_set_level +ffffffff8231d000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff8231d080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff8231d150 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff8231d200 T smu7_fan_ctrl_set_static_mode +ffffffff8231d330 T smu7_fan_ctrl_set_default_mode +ffffffff8231d410 T smu7_fan_ctrl_start_smc_fan_control +ffffffff8231d540 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff8231d560 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff8231d740 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff8231d930 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff8231db10 T smu7_thermal_get_temperature +ffffffff8231db70 T smu7_thermal_disable_alert +ffffffff8231dc10 T smu7_thermal_stop_thermal_controller +ffffffff8231dd90 T smu7_start_thermal_controller +ffffffff8231e120 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff8231f000 T smu8_init_function_pointers +ffffffff8231f040 t smu8_hwmgr_backend_init +ffffffff8231f520 t smu8_hwmgr_backend_fini +ffffffff8231f5a0 t smu8_setup_asic_task +ffffffff8231fac0 t smu8_get_power_state_size +ffffffff8231faf0 t smu8_apply_state_adjust_rules +ffffffff8231fc40 t smu8_dpm_force_dpm_level +ffffffff8231ff20 t smu8_enable_dpm_tasks +ffffffff823200b0 t smu8_disable_dpm_tasks +ffffffff82320190 t smu8_dpm_patch_boot_state +ffffffff823201f0 t smu8_dpm_get_pp_table_entry +ffffffff82320250 t smu8_dpm_get_num_of_pp_table_entries +ffffffff823202a0 t smu8_dpm_powerdown_uvd +ffffffff823202f0 t smu8_dpm_powergate_vce +ffffffff823204c0 t smu8_dpm_powergate_uvd +ffffffff823206d0 t smu8_dpm_powergate_acp +ffffffff82320730 t smu8_dpm_get_mclk +ffffffff82320760 t smu8_dpm_get_sclk +ffffffff823207d0 t smu8_set_power_state_tasks +ffffffff82320ad0 t smu8_set_cpu_power_state +ffffffff82320b50 t smu8_store_cc6_data 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phm_wait_for_register_unequal +ffffffff82323580 T phm_wait_for_indirect_register_unequal +ffffffff82323680 T phm_cf_want_uvd_power_gating +ffffffff823236c0 T phm_cf_want_vce_power_gating +ffffffff82323700 T phm_trim_voltage_table +ffffffff82323820 T phm_get_svi2_mvdd_voltage_table +ffffffff823239a0 T phm_get_svi2_vddci_voltage_table +ffffffff82323b20 T phm_get_svi2_vdd_voltage_table +ffffffff82323bc0 T phm_trim_voltage_table_to_fit_state_table +ffffffff82323cb0 T phm_reset_single_dpm_table +ffffffff82323d10 T phm_setup_pcie_table_entry +ffffffff82323d50 T phm_get_dpm_level_enable_mask_value +ffffffff82323e30 T phm_get_voltage_index +ffffffff82323eb0 T phm_get_voltage_id +ffffffff82323f30 T phm_find_closest_vddci +ffffffff82323fa0 T phm_find_boot_level +ffffffff82324010 T phm_get_sclk_for_voltage_evv +ffffffff823240d0 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff823241e0 T phm_get_lowest_enabled_level +ffffffff82324220 T phm_apply_dal_min_voltage_request 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vega10_power_gate_uvd +ffffffff8232be10 t vega10_dpm_get_mclk +ffffffff8232beb0 t vega10_dpm_get_sclk +ffffffff8232bf50 t vega10_set_power_state_tasks +ffffffff8232c8b0 t vega10_notify_smc_display_config_after_ps_adjustment +ffffffff8232ca60 t vega10_display_configuration_changed_task +ffffffff8232cb30 t vega10_set_fan_control_mode +ffffffff8232cba0 t vega10_get_fan_control_mode +ffffffff8232cbe0 t vega10_check_smc_update_required_for_display_configuration +ffffffff8232cc40 t vega10_check_states_equal +ffffffff8232cda0 t vega10_get_dal_power_level +ffffffff8232cde0 t vega10_get_performance_level +ffffffff8232ce70 t vega10_get_clock_by_type_with_latency +ffffffff8232d060 t vega10_get_clock_by_type_with_voltage +ffffffff8232d140 t vega10_set_watermarks_for_clocks_ranges +ffffffff8232d1a0 t vega10_display_clock_voltage_request +ffffffff8232d220 t vega10_power_off_asic +ffffffff8232d290 t vega10_force_clock_level +ffffffff8232d3c0 t vega10_emit_clock_levels +ffffffff8232d530 t vega10_print_clock_levels +ffffffff8232dcd0 t vega10_get_sclk_od +ffffffff8232dd40 t vega10_set_sclk_od +ffffffff8232de40 t vega10_get_mclk_od +ffffffff8232deb0 t vega10_set_mclk_od +ffffffff8232dfa0 t vega10_read_sensor +ffffffff8232e200 t vega10_avfs_enable +ffffffff8232e2c0 t vega10_notify_cac_buffer_info +ffffffff8232e370 t vega10_get_thermal_temperature_range +ffffffff8232e490 t vega10_get_power_profile_mode +ffffffff8232e4d0 t vega10_set_power_profile_mode +ffffffff8232e5f0 t vega10_odn_edit_dpm_table +ffffffff8232eb60 t vega10_get_ppfeature_status +ffffffff8232ebe0 t vega10_set_ppfeature_status +ffffffff8232ec80 t vega10_set_mp1_state +ffffffff8232ecf0 t vega10_disable_power_features_for_compute_performance +ffffffff8232eee0 t vega10_upload_dpm_bootup_level +ffffffff8232eff0 t vega10_upload_dpm_max_level +ffffffff8232f0d0 t vega10_odn_initial_default_setting +ffffffff8232f2b0 t vega10_populate_all_graphic_levels +ffffffff8232f4c0 t vega10_populate_all_memory_levels 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vega10_fan_ctrl_get_fan_speed_pwm +ffffffff823351b0 T vega10_fan_ctrl_get_fan_speed_rpm +ffffffff823352b0 T vega10_fan_ctrl_set_static_mode +ffffffff82335570 T vega10_fan_ctrl_set_default_mode +ffffffff82335790 T vega10_fan_ctrl_start_smc_fan_control +ffffffff82335850 T vega10_fan_ctrl_stop_smc_fan_control +ffffffff82335910 T vega10_fan_ctrl_set_fan_speed_pwm +ffffffff82335b50 T vega10_fan_ctrl_reset_fan_speed_to_default +ffffffff82335c10 T vega10_fan_ctrl_set_fan_speed_rpm +ffffffff82335df0 T vega10_thermal_get_temperature +ffffffff82335e80 T vega10_thermal_disable_alert +ffffffff82335f90 T vega10_thermal_stop_thermal_controller +ffffffff82335ff0 T vega10_enable_mgpu_fan_boost +ffffffff82336100 T vega10_start_thermal_controller +ffffffff823366c0 T vega10_thermal_ctrl_uninitialize_thermal_controller +ffffffff82337000 T vega12_baco_set_state +ffffffff82338000 T vega12_enable_disable_vce_dpm +ffffffff82338090 T vega12_hwmgr_init +ffffffff823380d0 t vega12_hwmgr_backend_init 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vega12_get_clock_by_type_with_latency +ffffffff8233a700 t vega12_get_clock_by_type_with_voltage +ffffffff8233a730 t vega12_set_watermarks_for_clocks_ranges +ffffffff8233a7b0 t vega12_display_clock_voltage_request +ffffffff8233a830 t vega12_power_off_asic +ffffffff8233a8a0 t vega12_force_clock_level +ffffffff8233aae0 t vega12_print_clock_levels +ffffffff8233b280 t vega12_gfx_off_control +ffffffff8233b2d0 t vega12_read_sensor +ffffffff8233b6b0 t vega12_notify_cac_buffer_info +ffffffff8233b760 t vega12_get_thermal_temperature_range +ffffffff8233b860 t vega12_get_ppfeature_status +ffffffff8233b8e0 t vega12_set_ppfeature_status +ffffffff8233b980 t vega12_set_mp1_state +ffffffff8233b9f0 t vega12_get_gpu_metrics +ffffffff8233bca0 t vega12_upload_dpm_min_level +ffffffff8233bee0 t vega12_upload_dpm_max_level +ffffffff8233c0b0 t vega12_populate_umdpstate_clocks +ffffffff8233c150 t vega12_setup_single_dpm_table +ffffffff8233d000 t vega12_pp_tables_initialize +ffffffff8233d610 t vega12_pp_tables_uninitialize +ffffffff8233e000 T vega12_fan_ctrl_get_fan_speed_info +ffffffff8233e050 T vega12_fan_ctrl_get_fan_speed_rpm +ffffffff8233e0c0 T vega12_fan_ctrl_start_smc_fan_control +ffffffff8233e0f0 T vega12_fan_ctrl_stop_smc_fan_control +ffffffff8233e120 T vega12_fan_ctrl_reset_fan_speed_to_default +ffffffff8233e150 T vega12_thermal_get_temperature +ffffffff8233e1e0 T vega12_thermal_disable_alert +ffffffff8233e270 T vega12_thermal_stop_thermal_controller +ffffffff8233e300 T vega12_start_thermal_controller +ffffffff8233f000 T vega20_baco_get_capability +ffffffff8233f0c0 T vega20_baco_get_state +ffffffff8233f160 T vega20_baco_set_state +ffffffff8233f360 T vega20_baco_apply_vdci_flush_workaround +ffffffff82340000 T vega20_hwmgr_init +ffffffff82340040 t vega20_hwmgr_backend_init +ffffffff82340940 t vega20_hwmgr_backend_fini +ffffffff823409a0 t vega20_setup_asic_task +ffffffff82340a90 t vega20_apply_clocks_adjust_rules +ffffffff82340f40 t vega20_dpm_force_dpm_level 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cyan_skillfish_set_ppt_funcs +ffffffff8237b030 t cyan_skillfish_print_clk_levels +ffffffff8237b150 t cyan_skillfish_od_edit_dpm_table +ffffffff8237b430 t cyan_skillfish_read_sensor +ffffffff8237b610 t cyan_skillfish_is_dpm_running +ffffffff8237b6b0 t cyan_skillfish_init_smc_tables +ffffffff8237b790 t cyan_skillfish_get_enabled_mask +ffffffff8237b7d0 t cyan_skillfish_get_dpm_ultimate_freq +ffffffff8237b890 t cyan_skillfish_get_gpu_metrics +ffffffff8237bb30 t cyan_skillfish_get_smu_metrics_data +ffffffff8237c000 T navi10_set_ppt_funcs +ffffffff8237c050 t navi10_run_btc +ffffffff8237c0d0 t navi10_get_allowed_feature_mask +ffffffff8237c3a0 t navi10_set_default_dpm_table +ffffffff8237c810 t navi10_populate_umd_state_clk +ffffffff8237c9d0 t navi10_print_clk_levels +ffffffff8237cb60 t navi10_emit_clk_levels +ffffffff8237cd80 t navi10_force_clk_levels +ffffffff8237ceb0 t navi10_od_edit_dpm_table +ffffffff8237d460 t navi10_get_clock_by_type_with_latency +ffffffff8237d560 t navi10_get_power_profile_mode +ffffffff8237d7c0 t navi10_set_power_profile_mode +ffffffff8237da90 t navi10_dpm_set_vcn_enable +ffffffff8237db20 t navi10_dpm_set_jpeg_enable +ffffffff8237dba0 t navi10_read_sensor +ffffffff8237dd20 t navi10_pre_display_config_changed +ffffffff8237ddc0 t navi10_display_config_changed +ffffffff8237de40 t navi10_notify_smc_display_config +ffffffff8237dfc0 t navi10_is_dpm_running +ffffffff8237e010 t navi10_get_fan_speed_rpm +ffffffff8237e0b0 t navi10_set_watermarks_table +ffffffff8237e250 t navi10_get_thermal_temperature_range +ffffffff8237e340 t navi10_get_uclk_dpm_states +ffffffff8237e450 t navi10_set_default_od_settings +ffffffff8237e6b0 t navi10_display_disable_memory_clock_switch +ffffffff8237e730 t navi10_get_power_limit +ffffffff8237e850 t navi10_update_pcie_parameters +ffffffff8237e9c0 t navi10_i2c_control_init +ffffffff8237eaf0 t navi10_i2c_control_fini +ffffffff8237eb30 t navi10_init_smc_tables +ffffffff8237ed80 t navi10_setup_pptable +ffffffff8237efa0 t navi10_baco_enter +ffffffff8237eff0 t navi10_baco_exit +ffffffff8237f0f0 t navi1x_get_gpu_metrics +ffffffff8237fa90 t navi10_enable_mgpu_fan_boost +ffffffff8237fb10 t navi10_get_fan_parameters +ffffffff8237fb50 t navi10_post_smu_init +ffffffff8237fdd0 t navi10_get_default_config_table_settings +ffffffff8237fe20 t navi10_set_config_table +ffffffff8237fed0 t navi1x_get_smu_metrics_data +ffffffff82380560 t navi10_od_setting_check_range +ffffffff82380610 t navi10_i2c_xfer +ffffffff823808b0 t navi10_i2c_func +ffffffff823808e0 t navi10_umc_hybrid_cdr_workaround +ffffffff82381000 T sienna_cichlid_set_ppt_funcs +ffffffff82381050 t sienna_cichlid_run_btc +ffffffff823810d0 t sienna_cichlid_get_allowed_feature_mask +ffffffff82381350 t sienna_cichlid_set_default_dpm_table +ffffffff82381930 t sienna_cichlid_populate_umd_state_clk +ffffffff823819f0 t sienna_cichlid_print_clk_levels +ffffffff82381bc0 t sienna_cichlid_force_clk_levels +ffffffff82381cf0 t sienna_cichlid_od_edit_dpm_table +ffffffff82382270 t sienna_cichlid_restore_user_od_settings +ffffffff82382300 t sienna_cichlid_get_power_profile_mode +ffffffff82382560 t sienna_cichlid_set_power_profile_mode +ffffffff82382830 t sienna_cichlid_dpm_set_vcn_enable +ffffffff823828f0 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff82382970 t sienna_cichlid_read_sensor +ffffffff82383170 t sienna_cichlid_pre_display_config_changed +ffffffff823831a0 t sienna_cichlid_display_config_changed +ffffffff82383200 t sienna_cichlid_notify_smc_display_config +ffffffff82383380 t sienna_cichlid_is_dpm_running +ffffffff823833d0 t sienna_cichlid_get_fan_speed_rpm +ffffffff823834e0 t sienna_cichlid_set_watermarks_table +ffffffff82383670 t sienna_cichlid_get_thermal_temperature_range +ffffffff82383750 t sienna_cichlid_get_uclk_dpm_states +ffffffff82383860 t sienna_cichlid_set_default_od_settings +ffffffff82383a10 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff82383a90 t sienna_cichlid_dump_pptable +ffffffff82383ac0 t sienna_cichlid_get_power_limit +ffffffff82383b90 t sienna_cichlid_update_pcie_parameters +ffffffff82383cc0 t sienna_cichlid_i2c_control_init +ffffffff82383df0 t sienna_cichlid_i2c_control_fini +ffffffff82383e30 t sienna_cichlid_get_unique_id +ffffffff82383f80 t sienna_cichlid_init_smc_tables +ffffffff823842a0 t sienna_cichlid_set_mp1_state +ffffffff823842e0 t sienna_cichlid_setup_pptable +ffffffff82384720 t sienna_cichlid_system_features_control +ffffffff823847b0 t sienna_cichlid_baco_enter +ffffffff82384800 t sienna_cichlid_baco_exit +ffffffff82384900 t sienna_cichlid_is_mode1_reset_supported +ffffffff82384980 t sienna_cichlid_is_mode2_reset_supported +ffffffff823849b0 t sienna_cichlid_mode2_reset +ffffffff82384af0 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff82384b10 t sienna_cichlid_get_gpu_metrics +ffffffff82385090 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff823850e0 t sienna_cichlid_get_fan_parameters +ffffffff82385120 t sienna_cichlid_gpo_control +ffffffff823851d0 t sienna_cichlid_get_ecc_info +ffffffff823852c0 t sienna_cichlid_stb_get_data_direct +ffffffff82385360 t sienna_cichlid_get_default_config_table_settings +ffffffff823853d0 t sienna_cichlid_set_config_table +ffffffff823854a0 t sienna_cichlid_get_throttler_status_locked +ffffffff82385600 t sienna_cichlid_get_smartshift_power_percentage +ffffffff82385730 t sienna_cichlid_i2c_xfer +ffffffff823859d0 t sienna_cichlid_i2c_func +ffffffff82386000 T smu_v11_0_init_microcode +ffffffff82386140 T smu_v11_0_fini_microcode +ffffffff82386190 T smu_v11_0_load_microcode +ffffffff823862d0 T smu_v11_0_check_fw_status +ffffffff82386320 T smu_v11_0_check_fw_version +ffffffff82386490 T smu_v11_0_setup_pptable +ffffffff823865b0 T smu_v11_0_init_smc_tables +ffffffff82386710 T smu_v11_0_fini_smc_tables +ffffffff82386940 T smu_v11_0_init_power +ffffffff823869d0 T smu_v11_0_fini_power +ffffffff82386a30 T smu_v11_0_get_vbios_bootup_values +ffffffff82386d90 T smu_v11_0_notify_memory_pool_location +ffffffff82386e80 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff82386f00 T smu_v11_0_set_driver_table_location +ffffffff82386f70 T smu_v11_0_set_tool_table_location +ffffffff82386fe0 T smu_v11_0_init_display_count +ffffffff82387040 T smu_v11_0_set_allowed_mask +ffffffff82387110 T smu_v11_0_system_features_control +ffffffff82387130 T smu_v11_0_notify_display_change +ffffffff823871a0 T smu_v11_0_init_max_sustainable_clocks +ffffffff82387400 t smu_v11_0_get_max_sustainable_clock +ffffffff82387520 T smu_v11_0_get_current_power_limit +ffffffff823875f0 T smu_v11_0_set_power_limit +ffffffff82387730 T smu_v11_0_interrupt_work +ffffffff823877b0 T smu_v11_0_enable_thermal_alert +ffffffff82387850 T smu_v11_0_disable_thermal_alert +ffffffff82387870 T smu_v11_0_get_gfx_vdd +ffffffff82387930 T smu_v11_0_display_clock_voltage_request +ffffffff82387a80 T smu_v11_0_set_hard_freq_limited_range +ffffffff82387b60 T smu_v11_0_gfx_off_control +ffffffff82387bd0 T smu_v11_0_get_fan_control_mode +ffffffff82387c20 T smu_v11_0_set_fan_speed_pwm +ffffffff82387dd0 t smu_v11_0_set_fan_static_mode +ffffffff82387f90 T smu_v11_0_set_fan_speed_rpm +ffffffff823880d0 T smu_v11_0_get_fan_speed_pwm +ffffffff82388210 T smu_v11_0_get_fan_speed_rpm +ffffffff82388310 T smu_v11_0_set_fan_control_mode +ffffffff823884b0 T smu_v11_0_set_xgmi_pstate +ffffffff823884d0 T smu_v11_0_register_irq_handler +ffffffff82388590 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff82388620 T smu_v11_0_set_azalia_d3_pme +ffffffff82388640 T smu_v11_0_baco_set_armd3_sequence +ffffffff82388660 T smu_v11_0_baco_is_support +ffffffff823886f0 T smu_v11_0_baco_get_state +ffffffff82388720 T smu_v11_0_baco_set_state +ffffffff823889d0 T smu_v11_0_baco_enter +ffffffff82388ac0 T smu_v11_0_baco_exit +ffffffff82388bf0 T smu_v11_0_mode1_reset +ffffffff82388c70 T smu_v11_0_handle_passthrough_sbr +ffffffff82388c90 T smu_v11_0_get_dpm_ultimate_freq +ffffffff82388dd0 T smu_v11_0_set_soft_freq_limited_range +ffffffff82388ea0 T smu_v11_0_set_performance_level +ffffffff823891f0 T smu_v11_0_set_power_source +ffffffff82389250 T smu_v11_0_get_dpm_freq_by_index +ffffffff82389300 T smu_v11_0_get_dpm_level_count +ffffffff823893a0 T smu_v11_0_set_single_dpm_table +ffffffff82389600 T smu_v11_0_get_dpm_level_range +ffffffff82389760 T smu_v11_0_get_current_pcie_link_width_level +ffffffff823897b0 T smu_v11_0_get_current_pcie_link_width +ffffffff82389810 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff82389860 T smu_v11_0_get_current_pcie_link_speed +ffffffff823898c0 T smu_v11_0_gfx_ulv_control +ffffffff82389930 T smu_v11_0_deep_sleep_control +ffffffff82389ae0 T smu_v11_0_restore_user_od_settings +ffffffff82389b70 T smu_v11_0_set_smu_mailbox_registers +ffffffff82389be0 t smu_v11_0_set_irq_state +ffffffff8238a190 t smu_v11_0_irq_process +ffffffff8238b000 T vangogh_set_ppt_funcs +ffffffff8238b040 t vangogh_set_default_dpm_tables +ffffffff8238b070 t vangogh_common_print_clk_levels +ffffffff8238b4e0 t vangogh_force_clk_levels +ffffffff8238b710 t vangogh_od_edit_dpm_table +ffffffff8238bc40 t vangogh_get_power_profile_mode +ffffffff8238bd40 t vangogh_set_power_profile_mode +ffffffff8238be60 t vangogh_dpm_set_vcn_enable +ffffffff8238beb0 t vangogh_dpm_set_jpeg_enable +ffffffff8238bf00 t vangogh_read_sensor +ffffffff8238c530 t vangogh_get_apu_thermal_limit +ffffffff8238c550 t vangogh_set_apu_thermal_limit +ffffffff8238c570 t vangogh_is_dpm_running +ffffffff8238c5d0 t vangogh_set_watermarks_table +ffffffff8238c750 t vangogh_set_performance_level +ffffffff8238cf60 t vangogh_get_power_limit +ffffffff8238d0c0 t vangogh_get_ppt_limit +ffffffff8238d130 t vangogh_get_dpm_clock_table +ffffffff8238d2a0 t vangogh_init_smc_tables +ffffffff8238d4e0 t vangogh_system_features_control +ffffffff8238d530 t vangogh_set_power_limit +ffffffff8238d680 t vangogh_get_gfxoff_status +ffffffff8238d710 t vangogh_get_gfxoff_entrycount +ffffffff8238d780 t vangogh_set_gfxoff_residency +ffffffff8238d7f0 t vangogh_get_gfxoff_residency +ffffffff8238d830 t vangogh_mode2_reset +ffffffff8238d970 t vangogh_common_get_gpu_metrics +ffffffff8238e0f0 t vangogh_post_smu_init +ffffffff8238e280 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff8238e2f0 t vangogh_force_dpm_limit_value +ffffffff8238e420 t vangogh_get_dpm_ultimate_freq +ffffffff8238e7e0 t vangogh_set_soft_freq_limited_range +ffffffff8238e960 t vangogh_get_gpu_metrics_v2_3 +ffffffff8238f000 T renoir_set_ppt_funcs +ffffffff8238f0a0 t renoir_get_current_power_state +ffffffff8238f120 t renoir_print_clk_levels +ffffffff8238f530 t renoir_force_clk_levels +ffffffff8238f750 t renoir_od_edit_dpm_table +ffffffff8238fa30 t renoir_get_power_profile_mode +ffffffff8238fb00 t renoir_set_power_profile_mode +ffffffff8238fc20 t renoir_dpm_set_vcn_enable +ffffffff8238fca0 t renoir_dpm_set_jpeg_enable +ffffffff8238fd20 t renoir_read_sensor +ffffffff823900d0 t renoir_is_dpm_running +ffffffff82390110 t renoir_set_watermarks_table +ffffffff823902b0 t renoir_set_performance_level +ffffffff823907d0 t renoir_get_dpm_clock_table +ffffffff82390b20 t renoir_init_smc_tables +ffffffff82390c90 t renoir_get_enabled_mask +ffffffff82390cd0 t renoir_get_dpm_ultimate_freq +ffffffff82390f70 t renoir_get_gpu_metrics +ffffffff82391190 t renoir_gfx_state_change_set +ffffffff823911c0 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff82391260 t renoir_force_dpm_limit_value +ffffffff82392000 T smu_v12_0_check_fw_status +ffffffff82392050 T smu_v12_0_check_fw_version +ffffffff823920c0 T smu_v12_0_powergate_sdma +ffffffff82392110 T smu_v12_0_set_gfx_cgpg +ffffffff82392170 T smu_v12_0_get_gfxoff_status +ffffffff82392200 T smu_v12_0_gfx_off_control +ffffffff82392320 T smu_v12_0_fini_smc_tables +ffffffff823923d0 T smu_v12_0_set_default_dpm_tables +ffffffff82392400 T smu_v12_0_mode2_reset +ffffffff82392420 T smu_v12_0_set_soft_freq_limited_range +ffffffff82392560 T smu_v12_0_set_driver_table_location +ffffffff823925d0 T smu_v12_0_get_vbios_bootup_values +ffffffff82393000 T aldebaran_set_ppt_funcs +ffffffff82393050 t aldebaran_get_allowed_feature_mask +ffffffff823930a0 t aldebaran_set_default_dpm_table +ffffffff823932a0 t aldebaran_populate_umd_state_clk +ffffffff823933a0 t aldebaran_print_clk_levels +ffffffff82393560 t aldebaran_force_clk_levels +ffffffff82393720 t aldebaran_usr_edit_dpm_table +ffffffff82393940 t aldebaran_read_sensor +ffffffff82393b60 t aldebaran_is_dpm_running +ffffffff82393bb0 t aldebaran_get_thermal_temperature_range +ffffffff82393c80 t aldebaran_set_performance_level +ffffffff82393d30 t aldebaran_get_power_limit +ffffffff82393ec0 t aldebaran_set_df_cstate +ffffffff82393f40 t aldebaran_allow_xgmi_power_down +ffffffff82393fe0 t aldebaran_i2c_control_init +ffffffff823940a0 t aldebaran_i2c_control_fini +ffffffff823940e0 t aldebaran_get_unique_id +ffffffff823941c0 t aldebaran_init_smc_tables +ffffffff82394380 t aldebaran_set_mp1_state +ffffffff823943c0 t aldebaran_setup_pptable +ffffffff82394490 t aldebaran_system_features_control +ffffffff823945f0 t aldebaran_set_power_limit +ffffffff82394680 t aldebaran_is_baco_supported +ffffffff823946b0 t aldebaran_is_mode1_reset_supported +ffffffff823946e0 t aldebaran_is_mode2_reset_supported +ffffffff82394710 t aldebaran_mode1_reset +ffffffff823947f0 t aldebaran_mode2_reset +ffffffff82394b10 t aldebaran_set_soft_freq_limited_range +ffffffff82394d10 t aldebaran_log_thermal_throttling_event +ffffffff82395020 t aldebaran_get_gpu_metrics +ffffffff823952a0 t aldebaran_smu_handle_passthrough_sbr +ffffffff823952c0 t aldebaran_smu_send_hbm_bad_page_num +ffffffff82395340 t aldebaran_get_ecc_info +ffffffff823954a0 t aldebaran_send_hbm_bad_channel_flag +ffffffff82395570 t aldebaran_get_current_clk_freq_by_table +ffffffff823956b0 t aldebaran_get_smu_metrics_data +ffffffff82395920 t aldebaran_upload_dpm_level +ffffffff82395a10 t aldebaran_i2c_xfer +ffffffff82395cb0 t aldebaran_i2c_func +ffffffff82396000 T smu_v13_0_init_microcode +ffffffff82396120 T smu_v13_0_fini_microcode +ffffffff82396170 T smu_v13_0_load_microcode +ffffffff823961a0 T smu_v13_0_init_pptable_microcode +ffffffff82396350 T smu_v13_0_get_pptable_from_firmware +ffffffff82396470 T smu_v13_0_check_fw_status +ffffffff823964e0 T smu_v13_0_check_fw_version +ffffffff82396560 T smu_v13_0_setup_pptable +ffffffff823966f0 T smu_v13_0_init_smc_tables +ffffffff82396870 T smu_v13_0_fini_smc_tables +ffffffff82396a80 T smu_v13_0_init_power +ffffffff82396b00 T smu_v13_0_fini_power +ffffffff82396b80 T smu_v13_0_get_vbios_bootup_values +ffffffff82396e20 T smu_v13_0_notify_memory_pool_location +ffffffff82396ee0 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff82396f60 T smu_v13_0_set_driver_table_location +ffffffff82396fd0 T smu_v13_0_set_tool_table_location +ffffffff82397040 T smu_v13_0_init_display_count +ffffffff82397080 T smu_v13_0_set_allowed_mask +ffffffff82397150 T smu_v13_0_gfx_off_control +ffffffff823971d0 T smu_v13_0_system_features_control +ffffffff823971f0 T smu_v13_0_notify_display_change +ffffffff82397250 T smu_v13_0_init_max_sustainable_clocks +ffffffff823974b0 t smu_v13_0_get_max_sustainable_clock +ffffffff823975d0 T smu_v13_0_get_current_power_limit +ffffffff823976a0 T smu_v13_0_set_power_limit +ffffffff823977b0 T smu_v13_0_enable_thermal_alert +ffffffff82397840 T smu_v13_0_disable_thermal_alert +ffffffff82397880 T smu_v13_0_get_gfx_vdd +ffffffff82397940 T smu_v13_0_display_clock_voltage_request +ffffffff82397a90 T smu_v13_0_set_hard_freq_limited_range +ffffffff82397b70 T smu_v13_0_get_fan_control_mode +ffffffff82397bc0 T smu_v13_0_set_fan_speed_pwm +ffffffff82397de0 t smu_v13_0_set_fan_static_mode +ffffffff82397fb0 T smu_v13_0_set_fan_control_mode +ffffffff82398110 T smu_v13_0_set_fan_speed_rpm +ffffffff823982c0 T smu_v13_0_set_xgmi_pstate +ffffffff823982e0 T smu_v13_0_register_irq_handler +ffffffff823983b0 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff82398440 T smu_v13_0_set_azalia_d3_pme +ffffffff82398460 T smu_v13_0_wait_for_event +ffffffff823984b0 T smu_v13_0_get_dpm_ultimate_freq +ffffffff82398610 T smu_v13_0_set_soft_freq_limited_range +ffffffff823986e0 T smu_v13_0_set_performance_level +ffffffff82398e40 T smu_v13_0_set_power_source +ffffffff82398ea0 T smu_v13_0_get_dpm_freq_by_index +ffffffff82398f50 T smu_v13_0_set_single_dpm_table +ffffffff82399240 T smu_v13_0_get_current_pcie_link_width_level +ffffffff82399290 T smu_v13_0_get_current_pcie_link_width +ffffffff823992f0 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff82399340 T smu_v13_0_get_current_pcie_link_speed +ffffffff82399390 T smu_v13_0_set_vcn_enable +ffffffff82399450 T smu_v13_0_set_jpeg_enable +ffffffff82399470 T smu_v13_0_run_btc +ffffffff823994f0 T smu_v13_0_gpo_control +ffffffff82399580 T smu_v13_0_deep_sleep_control +ffffffff823997e0 T smu_v13_0_gfx_ulv_control +ffffffff82399850 T smu_v13_0_baco_set_armd3_sequence +ffffffff823998c0 T smu_v13_0_baco_is_support +ffffffff82399950 T smu_v13_0_baco_get_state +ffffffff82399980 T smu_v13_0_baco_set_state +ffffffff82399a50 T smu_v13_0_baco_enter +ffffffff82399b70 T smu_v13_0_baco_exit +ffffffff82399c10 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff82399c50 T smu_v13_0_od_edit_dpm_table +ffffffff82399f00 T smu_v13_0_set_default_dpm_tables +ffffffff82399f30 T smu_v13_0_set_smu_mailbox_registers +ffffffff82399fa0 T smu_v13_0_mode1_reset +ffffffff8239a020 T smu_v13_0_update_pcie_parameters +ffffffff8239a290 t smu_v13_0_set_irq_state +ffffffff8239a840 t smu_v13_0_irq_process +ffffffff8239b000 T smu_v13_0_0_set_ppt_funcs +ffffffff8239b0f0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff8239b230 t smu_v13_0_0_set_default_dpm_table +ffffffff8239b650 t smu_v13_0_0_populate_umd_state_clk +ffffffff8239b790 t smu_v13_0_0_print_clk_levels +ffffffff8239b8a0 t smu_v13_0_0_force_clk_levels +ffffffff8239ba20 t smu_v13_0_0_od_edit_dpm_table +ffffffff8239bef0 t smu_v13_0_0_restore_user_od_settings +ffffffff8239bfb0 t smu_v13_0_0_get_power_profile_mode +ffffffff8239c0b0 t smu_v13_0_0_set_power_profile_mode +ffffffff8239c300 t smu_v13_0_0_read_sensor +ffffffff8239c520 t smu_v13_0_0_is_dpm_running +ffffffff8239c570 t smu_v13_0_0_get_fan_speed_pwm +ffffffff8239c650 t smu_v13_0_0_get_fan_speed_rpm +ffffffff8239c6c0 t smu_v13_0_0_get_thermal_temperature_range +ffffffff8239c7c0 t smu_v13_0_0_set_default_od_settings +ffffffff8239c8f0 t smu_v13_0_0_dump_pptable +ffffffff8239c920 t smu_v13_0_0_get_power_limit +ffffffff8239ca00 t smu_v13_0_0_set_df_cstate +ffffffff8239ca20 t smu_v13_0_0_i2c_control_init +ffffffff8239cb50 t smu_v13_0_0_i2c_control_fini +ffffffff8239cb90 t smu_v13_0_0_get_unique_id +ffffffff8239cc30 t smu_v13_0_0_init_smc_tables +ffffffff8239ce80 t smu_v13_0_0_set_mp1_state +ffffffff8239cec0 t smu_v13_0_0_setup_pptable +ffffffff8239d020 t smu_v13_0_0_system_features_control +ffffffff8239d030 t smu_v13_0_0_baco_enter +ffffffff8239d090 t smu_v13_0_0_baco_exit +ffffffff8239d0f0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff8239d150 t smu_v13_0_0_mode1_reset +ffffffff8239d270 t smu_v13_0_0_mode2_reset +ffffffff8239d2c0 t smu_v13_0_0_enable_gfx_features +ffffffff8239d310 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff8239d430 t smu_v13_0_0_get_gpu_metrics +ffffffff8239d870 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff8239d8c0 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff8239d940 t smu_v13_0_0_get_ecc_info +ffffffff8239da40 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff8239dac0 t smu_v13_0_0_i2c_xfer +ffffffff8239dd60 t smu_v13_0_0_i2c_func +ffffffff8239e000 T smu_v13_0_4_set_ppt_funcs +ffffffff8239e0c0 t smu_v13_0_4_print_clk_levels +ffffffff8239e130 t smu_v13_0_4_force_clk_levels +ffffffff8239e3f0 t smu_v13_0_4_read_sensor +ffffffff8239e6d0 t smu_v13_0_4_is_dpm_running +ffffffff8239e720 t smu_v13_0_4_set_watermarks_table +ffffffff8239e8a0 t smu_v13_0_4_set_performance_level +ffffffff8239f450 t smu_v13_0_4_init_smc_tables +ffffffff8239f5c0 t smu_v13_0_4_fini_smc_tables +ffffffff8239f670 t smu_v13_0_4_system_features_control +ffffffff8239f6c0 t smu_v13_0_4_mode2_reset +ffffffff8239f6e0 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff8239fb00 t smu_v13_0_4_get_gpu_metrics +ffffffff8239fcd0 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff8239fd30 t smu_v13_0_4_get_current_clk_freq +ffffffff823a0000 T smu_v13_0_5_set_ppt_funcs +ffffffff823a00a0 t smu_v13_0_5_set_default_dpm_tables +ffffffff823a00d0 t smu_v13_0_5_print_clk_levels +ffffffff823a0160 t smu_v13_0_5_force_clk_levels +ffffffff823a02d0 t smu_v13_0_5_od_edit_dpm_table +ffffffff823a0580 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff823a05a0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff823a05c0 t smu_v13_0_5_read_sensor +ffffffff823a07e0 t smu_v13_0_5_is_dpm_running +ffffffff823a0830 t smu_v13_0_5_set_watermarks_table +ffffffff823a09b0 t smu_v13_0_5_set_performance_level +ffffffff823a0f50 t smu_v13_0_5_init_smc_tables +ffffffff823a10c0 t smu_v13_0_5_fini_smc_tables +ffffffff823a1170 t smu_v13_0_5_system_features_control +ffffffff823a11c0 t smu_v13_0_5_mode2_reset +ffffffff823a1240 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff823a1680 t smu_v13_0_5_get_gpu_metrics +ffffffff823a17d0 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff823a2000 T smu_v13_0_6_set_ppt_funcs +ffffffff823a2050 t smu_v13_0_6_get_allowed_feature_mask +ffffffff823a20a0 t smu_v13_0_6_set_default_dpm_table +ffffffff823a25a0 t smu_v13_0_6_populate_umd_state_clk +ffffffff823a26a0 t smu_v13_0_6_print_clk_levels +ffffffff823a2a10 t smu_v13_0_6_force_clk_levels +ffffffff823a2bd0 t smu_v13_0_6_usr_edit_dpm_table +ffffffff823a2df0 t smu_v13_0_6_read_sensor +ffffffff823a3380 t smu_v13_0_6_is_dpm_running +ffffffff823a3400 t smu_v13_0_6_get_thermal_temperature_range +ffffffff823a3550 t smu_v13_0_6_set_performance_level +ffffffff823a3660 t smu_v13_0_6_get_power_limit +ffffffff823a3730 t smu_v13_0_6_set_df_cstate +ffffffff823a3750 t smu_v13_0_6_allow_xgmi_power_down +ffffffff823a3770 t smu_v13_0_6_i2c_control_init +ffffffff823a38a0 t smu_v13_0_6_i2c_control_fini +ffffffff823a38e0 t smu_v13_0_6_get_unique_id +ffffffff823a3960 t smu_v13_0_6_init_smc_tables +ffffffff823a3af0 t smu_v13_0_6_check_fw_status +ffffffff823a3b40 t smu_v13_0_6_setup_pptable +ffffffff823a3b70 t smu_v13_0_6_system_features_control +ffffffff823a3c10 t smu_v13_0_6_get_enabled_mask +ffffffff823a3c80 t smu_v13_0_6_set_power_limit +ffffffff823a3ca0 t smu_v13_0_6_register_irq_handler +ffffffff823a3d00 t smu_v13_0_6_is_baco_supported +ffffffff823a3d30 t smu_v13_0_6_is_mode1_reset_supported +ffffffff823a3d60 t smu_v13_0_6_is_mode2_reset_supported +ffffffff823a3d90 t smu_v13_0_6_mode1_reset +ffffffff823a3e40 t smu_v13_0_6_mode2_reset +ffffffff823a40f0 t smu_v13_0_6_get_dpm_ultimate_freq +ffffffff823a4300 t smu_v13_0_6_set_soft_freq_limited_range +ffffffff823a4530 t smu_v13_0_6_log_thermal_throttling_event +ffffffff823a4820 t smu_v13_0_6_get_gpu_metrics +ffffffff823a4b70 t smu_v13_0_6_smu_send_hbm_bad_page_num +ffffffff823a4bf0 t smu_v13_0_6_get_smu_metrics_data +ffffffff823a4e80 t smu_v13_0_6_upload_dpm_level +ffffffff823a4f80 t smu_v13_0_6_i2c_xfer +ffffffff823a5280 t smu_v13_0_6_i2c_func +ffffffff823a52b0 t smu_v13_0_6_set_irq_state +ffffffff823a5540 t smu_v13_0_6_irq_process +ffffffff823a6000 T smu_v13_0_7_set_ppt_funcs +ffffffff823a6060 t smu_v13_0_7_get_allowed_feature_mask +ffffffff823a61d0 t smu_v13_0_7_set_default_dpm_table +ffffffff823a65f0 t smu_v13_0_7_populate_umd_state_clk +ffffffff823a6730 t smu_v13_0_7_print_clk_levels +ffffffff823a6840 t smu_v13_0_7_force_clk_levels +ffffffff823a69c0 t smu_v13_0_7_od_edit_dpm_table +ffffffff823a6e90 t smu_v13_0_7_restore_user_od_settings +ffffffff823a6f50 t smu_v13_0_7_get_power_profile_mode +ffffffff823a7090 t smu_v13_0_7_set_power_profile_mode +ffffffff823a72d0 t smu_v13_0_7_read_sensor +ffffffff823a74e0 t smu_v13_0_7_is_dpm_running +ffffffff823a7530 t smu_v13_0_7_get_fan_speed_pwm +ffffffff823a7610 t smu_v13_0_7_get_fan_speed_rpm +ffffffff823a7680 t smu_v13_0_7_get_thermal_temperature_range +ffffffff823a7780 t smu_v13_0_7_set_default_od_settings +ffffffff823a78b0 t smu_v13_0_7_dump_pptable +ffffffff823a78e0 t smu_v13_0_7_get_power_limit +ffffffff823a79c0 t smu_v13_0_7_set_df_cstate +ffffffff823a79e0 t smu_v13_0_7_init_smc_tables +ffffffff823a7bd0 t smu_v13_0_7_check_fw_status +ffffffff823a7c20 t smu_v13_0_7_set_mp1_state +ffffffff823a7c60 t smu_v13_0_7_setup_pptable +ffffffff823a7dc0 t smu_v13_0_7_baco_enter +ffffffff823a7e20 t smu_v13_0_7_baco_exit +ffffffff823a7e80 t smu_v13_0_7_is_mode1_reset_supported +ffffffff823a7ec0 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff823a7fe0 t smu_v13_0_7_get_gpu_metrics +ffffffff823a8410 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff823a9000 T yellow_carp_set_ppt_funcs +ffffffff823a9050 t yellow_carp_set_default_dpm_tables +ffffffff823a9080 t yellow_carp_print_clk_levels +ffffffff823a9100 t yellow_carp_force_clk_levels +ffffffff823a93c0 t yellow_carp_od_edit_dpm_table +ffffffff823a9670 t yellow_carp_dpm_set_vcn_enable +ffffffff823a9690 t yellow_carp_dpm_set_jpeg_enable +ffffffff823a96b0 t yellow_carp_read_sensor +ffffffff823a9a20 t yellow_carp_is_dpm_running +ffffffff823a9a70 t yellow_carp_set_watermarks_table +ffffffff823a9bf0 t yellow_carp_set_performance_level +ffffffff823aa680 t yellow_carp_init_smc_tables +ffffffff823aa7f0 t yellow_carp_fini_smc_tables +ffffffff823aa8a0 t yellow_carp_system_features_control +ffffffff823aa8f0 t yellow_carp_get_gfxoff_status +ffffffff823aa980 t yellow_carp_mode2_reset +ffffffff823aaa00 t yellow_carp_get_dpm_ultimate_freq +ffffffff823aae40 t yellow_carp_get_gpu_metrics +ffffffff823aaff0 t yellow_carp_post_smu_init +ffffffff823ab070 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff823ab0d0 t yellow_carp_get_current_clk_freq +ffffffff823ab1d0 t yellow_carp_get_dpm_profile_freq +ffffffff823ac000 T smu_cmn_send_msg_without_waiting +ffffffff823ac170 T smu_cmn_wait_for_response +ffffffff823ac2a0 T smu_cmn_send_smc_msg_with_param +ffffffff823ac5b0 T smu_cmn_to_asic_specific_index +ffffffff823ac6e0 t __smu_cmn_reg_print_error +ffffffff823ac920 T smu_cmn_send_smc_msg +ffffffff823ac940 T smu_cmn_send_debug_smc_msg +ffffffff823ac9c0 T smu_cmn_send_debug_smc_msg_with_param +ffffffff823aca40 T smu_cmn_feature_is_supported +ffffffff823acaf0 T smu_cmn_feature_is_enabled +ffffffff823acbe0 T smu_cmn_clk_dpm_is_enabled +ffffffff823acce0 T smu_cmn_get_enabled_mask +ffffffff823acdd0 T smu_cmn_get_indep_throttler_status +ffffffff823ace80 T smu_cmn_feature_update_enable_state +ffffffff823acf20 T smu_cmn_feature_set_enabled +ffffffff823acff0 T smu_cmn_get_pp_feature_mask +ffffffff823ad1a0 T smu_cmn_set_pp_feature_mask +ffffffff823ad2a0 T smu_cmn_disable_all_features_with_exception +ffffffff823ad350 T smu_cmn_get_smc_version +ffffffff823ad420 T smu_cmn_update_table +ffffffff823ad580 T smu_cmn_write_watermarks_table +ffffffff823ad650 T smu_cmn_write_pptable +ffffffff823ad710 T smu_cmn_get_metrics_table +ffffffff823ad870 T smu_cmn_get_combo_pptable +ffffffff823ad940 T smu_cmn_init_soft_gpu_metrics +ffffffff823ada30 T smu_cmn_set_mp1_state +ffffffff823adad0 T smu_cmn_is_audio_func_enabled +ffffffff823ae000 T pci_mcfg_init +ffffffff823ae050 T pci_lookup_segment +ffffffff823ae0b0 T pci_attach_hook +ffffffff823ae0e0 T pci_bus_maxdevs +ffffffff823ae110 T pci_make_tag +ffffffff823ae180 T pci_decompose_tag +ffffffff823ae1e0 T pci_conf_size +ffffffff823ae240 T pci_mcfg_map_bus +ffffffff823ae2c0 T pci_conf_read +ffffffff823ae410 T pci_conf_write +ffffffff823ae550 T pci_msix_table_map +ffffffff823ae680 T pci_msix_table_unmap +ffffffff823ae720 T msi_hwmask +ffffffff823ae750 T msi_hwunmask +ffffffff823ae780 T msi_addroute +ffffffff823ae890 T msi_delroute +ffffffff823ae910 T msi_allocidtvec +ffffffff823aea60 T pci_intr_enable_msivec +ffffffff823aeb40 T pci_intr_map_msi +ffffffff823aebf0 T pci_intr_map_msivec +ffffffff823aeca0 T msix_hwmask +ffffffff823aecd0 T msix_hwunmask +ffffffff823aed00 T msix_addroute +ffffffff823aeef0 T msix_delroute +ffffffff823af050 T pci_intr_map_msix +ffffffff823af120 T pci_intr_map +ffffffff823af350 T pci_intr_string +ffffffff823af430 T pci_intr_establish +ffffffff823af480 T pci_intr_establish_cpu +ffffffff823af5d0 T pci_intr_disestablish +ffffffff823af5f0 T pci_init_extents +ffffffff823af7d0 T pci_probe_device_hook +ffffffff823af810 T pci_dev_postattach +ffffffff823af820 T pci_min_powerstate +ffffffff823af830 T pci_set_powerstate_md +ffffffff823b0000 T pciide_machdep_compat_intr_establish +ffffffff823b0060 T pciide_machdep_compat_intr_disestablish +ffffffff823b1000 T vga_post_init +ffffffff823b1310 t vm86_emu_inb +ffffffff823b1360 t vm86_emu_inw +ffffffff823b13a0 t vm86_emu_inl +ffffffff823b13e0 t vm86_emu_outb +ffffffff823b1430 t vm86_emu_outw +ffffffff823b1470 t vm86_emu_outl +ffffffff823b14b0 T vga_post_call +ffffffff823b1520 T vga_post_free +ffffffff823b1590 T ddb_vgapost +ffffffff823b2000 T pchbmatch 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cardbus_read_tuples +ffffffff823b64e0 T parse_tuple +ffffffff823b6750 T cardbus_attach_card +ffffffff823b6ed0 T enable_function +ffffffff823b6f70 T decode_tuples +ffffffff823b7050 T cardbusprint +ffffffff823b7140 T cardbussubmatch +ffffffff823b71a0 T disable_function +ffffffff823b7200 T cardbus_detach_card +ffffffff823b72e0 T cardbus_intr_establish +ffffffff823b7310 T cardbus_intr_disestablish +ffffffff823b7330 T cardbus_function_enable +ffffffff823b7410 T cardbus_function_disable +ffffffff823b7470 T cardbus_matchbyid +ffffffff823b74e0 T decode_tuple +ffffffff823b8000 T cardbus_mapreg_map +ffffffff823b81a0 T cardbus_mapreg_unmap +ffffffff823b9000 T cardbus_read_exrom +ffffffff823ba000 T rbus_space_alloc +ffffffff823ba060 T rbus_space_alloc_subregion +ffffffff823ba230 T rbus_space_free +ffffffff823ba2c0 T rbus_new_body +ffffffff823ba350 T rbus_new_root_delegate +ffffffff823ba420 T rbus_new_root_share +ffffffff823bb000 T com_cardbus_match +ffffffff823bb070 T com_cardbus_attach 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usl_attachtimeout +ffffffff8240e1c0 T usl_detachtimeout +ffffffff8240e230 T usl_sync_done +ffffffff8240e2b0 T usl_sync_check +ffffffff8240e370 T usl_sync_get +ffffffff8240e3c0 T usl_detachproc +ffffffff8240e450 T usl_detachack +ffffffff8240e4e0 T usl_attachproc +ffffffff8240e570 T usl_attachack +ffffffff8240e600 T wsdisplay_usl_ioctl1 +ffffffff8240e7b0 T wsdisplay_usl_ioctl2 +ffffffff8240f000 T filt_wseventdetach +ffffffff8240f050 T filt_wseventread +ffffffff8240f0b0 T wsevent_init +ffffffff8240f150 T wsevent_fini +ffffffff8240f1c0 T wsevent_read +ffffffff8240f360 T wsevent_kqfilter +ffffffff82410000 T wskbd_match +ffffffff82410050 T wskbd_attach +ffffffff82410410 T wskbd_detach +ffffffff82410660 T wskbd_activate +ffffffff824106a0 T wskbd_mux_open +ffffffff82410770 T wskbd_mux_close +ffffffff82410800 T wskbd_do_ioctl +ffffffff82410870 T wskbd_displayioctl +ffffffff82410890 T wskbd_set_display +ffffffff824109d0 T wskbd_update_layout +ffffffff82410a10 T wskbddevprint +ffffffff82410a60 T wskbd_kbd_backlight_task +ffffffff82410b30 T wskbd_repeat +ffffffff82410bd0 T wskbd_brightness_task +ffffffff82410c40 T wskbd_set_keymap +ffffffff82410cc0 T wskbd_cnattach +ffffffff82410db0 T wskbd_cngetc +ffffffff82410ec0 T wskbd_cnpollc +ffffffff82410f20 T wskbd_cnbell +ffffffff82410f70 T wskbd_cndetach +ffffffff82411010 T wskbd_deliver_event +ffffffff82411130 T wskbdopen +ffffffff82411210 T wskbd_input +ffffffff82411370 T wskbd_translate +ffffffff82411ab0 T wskbd_rawinput +ffffffff82411af0 T wskbd_enable +ffffffff82411b90 T wskbd_do_open +ffffffff82411c50 T wskbdclose +ffffffff82411d60 T wskbdread +ffffffff82411e20 T wskbdioctl +ffffffff82411ea0 T wskbd_do_ioctl_sc +ffffffff82411f80 T wskbd_displayioctl_sc +ffffffff824127b0 T wskbdkqfilter +ffffffff82412810 T wskbd_pickfree +ffffffff82412880 T wskbd_set_console_display +ffffffff824128d0 T wskbd_add_mux +ffffffff82412950 T update_leds +ffffffff82412a00 T update_modifier +ffffffff82412af0 T change_displayparam +ffffffff82412bb0 T internal_command +ffffffff82412f90 T wskbd_debugger +ffffffff82413000 T wskbd_compose_value +ffffffff824131a0 T ksym_upcase +ffffffff82413220 T fillmapentry +ffffffff824133b0 T wskbd_get_mapentry +ffffffff824135d0 T wskbd_init_keymap +ffffffff82413670 T wskbd_load_keymap +ffffffff82414000 T wsmouse_match +ffffffff82414030 T wsmouse_attach +ffffffff824140d0 T wsmouse_detach +ffffffff824142b0 T wsmouse_activate +ffffffff824142f0 T wsmouse_mux_open +ffffffff824144a0 T wsmouse_mux_close +ffffffff82414500 T wsmousedoioctl +ffffffff82414570 T wsmousedevprint +ffffffff824145c0 T wsmouseopen +ffffffff824146a0 T wsmouse_input_cleanup +ffffffff82414740 T wsmousedoopen +ffffffff824148f0 T wsmouseclose +ffffffff824149d0 T wsmouse_input_reset +ffffffff82414b10 T wsmouseread +ffffffff82414bd0 T wsmouseioctl +ffffffff82414c50 T wsmouse_do_ioctl +ffffffff82414df0 T wsmouse_param_ioctl +ffffffff82414f20 T wsmouse_set_params +ffffffff82415240 T wsmouse_get_params +ffffffff824154a0 T wsmousekqfilter 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wstpad_set_direction +ffffffff82418180 T wstpad_is_stable +ffffffff82418260 T wstpad_scroll_coords +ffffffff82418350 T wstpad_scroll +ffffffff824184e0 T wstpad_f2scroll +ffffffff82418790 T wstpad_edgescroll +ffffffff82418900 T wstpad_get_sbtn +ffffffff82418a80 T wstpad_mtbtn_contacts +ffffffff82418bb0 T wstpad_get_mtbtn +ffffffff82418c00 T wstpad_softbuttons +ffffffff82418cd0 T wstpad_is_tap +ffffffff82418d50 T wstpad_tap_filter +ffffffff82418df0 T wstpad_tap_touch +ffffffff82419020 T wstpad_tap_button +ffffffff82419070 T wstpad_tap +ffffffff824194a0 T wstpad_tap_sync +ffffffff82419500 T wstpad_tap_timeout +ffffffff82419730 T wstpad_click +ffffffff824197d0 T wstpad_cmds +ffffffff82419a40 T wstpad_mt_inputs +ffffffff82419db0 T wstpad_mt_masks +ffffffff8241a130 T wstpad_touch_inputs +ffffffff8241a340 T wstpad_process_input +ffffffff8241a650 T wstpad_track_interval +ffffffff8241a7b0 T wstpad_init_deceleration +ffffffff8241a880 T wstpad_decelerate +ffffffff8241a9f0 T wstpad_filter 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wsmux_set_display +ffffffff8241d790 T wsmux_get_layout +ffffffff8241d7c0 T wsmux_set_layout +ffffffff8241e000 T wsemul_pick +ffffffff8241e070 T wsemul_getname +ffffffff8241f000 T wsemul_getchar +ffffffff8241f1d0 T wsemul_local_translate +ffffffff8241f4b0 T wsemul_utf8_translate +ffffffff82420000 T wsemul_vt100_cnattach +ffffffff82420200 T wsemul_vt100_attach +ffffffff824204d0 T wsemul_vt100_output +ffffffff824207e0 T wsemul_vt100_detach +ffffffff82420910 T wsemul_vt100_resetop +ffffffff82420ac0 T wsemul_vt100_output_esc +ffffffff82421140 T wsemul_vt100_output_csi +ffffffff82421280 T wsemul_vt100_output_scs94 +ffffffff82421340 T wsemul_vt100_output_scs94_percent +ffffffff82421390 T wsemul_vt100_output_scs96 +ffffffff824214e0 T wsemul_vt100_output_scs96_percent +ffffffff82421530 T wsemul_vt100_output_esc_hash +ffffffff82421860 T wsemul_vt100_output_esc_spc +ffffffff82421890 T wsemul_vt100_output_string +ffffffff82421900 T wsemul_vt100_output_string_esc +ffffffff82421950 T wsemul_vt100_output_dcs +ffffffff82421a00 T wsemul_vt100_output_dcs_dollar +ffffffff82421a60 T wsemul_vt100_output_esc_percent +ffffffff82421ac0 T wsemul_vt100_init +ffffffff82421b20 T wsemul_vt100_reset +ffffffff82421c40 T wsemul_vt100_nextline +ffffffff82421cd0 T wsemul_vt100_output_normal +ffffffff82421f10 T wsemul_vt100_output_c0c1 +ffffffff82422190 T wsemul_vt100_jump_scroll +ffffffff82423000 T wsemul_vt100_scrollup +ffffffff82423150 T wsemul_vt100_scrolldown +ffffffff82423290 T wsemul_vt100_ed +ffffffff824234f0 T wsemul_vt100_el +ffffffff824235e0 T wsemul_vt100_handle_csi +ffffffff82424570 T vt100_ansimode +ffffffff824245f0 T vt100_decmode +ffffffff82424720 T vt100_selectattribute +ffffffff82424860 T wsemul_vt100_handle_dcs +ffffffff82425000 T vt100_initchartables +ffffffff82425120 T vt100_setnrc +ffffffff82426000 T wsemul_vt100_translate +ffffffff82427000 T pckbdprobe +ffffffff82427140 T pckbdattach +ffffffff82427320 T pckbdactivate +ffffffff824273b0 T pckbd_enable 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pms_disable_synaptics +ffffffff8242a0d0 T pms_enable_alps +ffffffff8242a5f0 T pms_ioctl_alps +ffffffff8242a6a0 T pms_sync_alps +ffffffff8242a750 T pms_proc_alps +ffffffff8242a9a0 T pms_enable_elantech_v1 +ffffffff8242abb0 T pms_ioctl_elantech +ffffffff8242ac70 T pms_sync_elantech_v1 +ffffffff8242ad50 T pms_proc_elantech_v1 +ffffffff8242aec0 T pms_enable_elantech_v2 +ffffffff8242b060 T pms_sync_elantech_v2 +ffffffff8242b150 T pms_proc_elantech_v2 +ffffffff8242b2c0 T pms_enable_elantech_v3 +ffffffff8242b460 T pms_sync_elantech_v3 +ffffffff8242b4f0 T pms_proc_elantech_v3 +ffffffff8242b6e0 T pms_enable_elantech_v4 +ffffffff8242b8e0 T pms_sync_elantech_v4 +ffffffff8242b9b0 T pms_proc_elantech_v4 +ffffffff8242bd00 T pms_enable_intelli +ffffffff8242bef0 T pms_cmd +ffffffff8242bf60 T pms_spec_cmd +ffffffff8242c1f0 T pms_set_scaling +ffffffff8242c280 T pms_set_resolution +ffffffff8242c310 T pms_get_devid +ffffffff8242c3a0 T pms_get_status +ffffffff8242c430 T pms_set_rate +ffffffff8242c4c0 T pms_reset +ffffffff8242c550 T pms_dev_enable +ffffffff8242c610 T pms_dev_disable +ffffffff8242c6d0 T pms_protocol_lookup +ffffffff8242c7d0 T pms_reset_detect +ffffffff8242c850 T pms_reset_timo +ffffffff8242c8a0 T pms_reset_task +ffffffff8242c960 T pms_change_state +ffffffff8242ccf0 T pmsinput +ffffffff8242ce90 T synaptics_set_mode +ffffffff8242cf90 T synaptics_query +ffffffff8242d080 T synaptics_get_hwinfo +ffffffff8242d560 T synaptics_sec_proc +ffffffff8242d630 T synaptics_knock +ffffffff8242d890 T alps_sec_proc +ffffffff8242d9b0 T alps_get_hwinfo +ffffffff8242de20 T elantech_set_absolute_mode_v1 +ffffffff8242e0e0 T elantech_set_absolute_mode_v2 +ffffffff8242e600 T elantech_ps2_cmd +ffffffff8242e690 T elantech_set_absolute_mode_v3 +ffffffff8242eb00 T elantech_set_absolute_mode_v4 +ffffffff8242ed30 T elantech_get_hwinfo_v1 +ffffffff8242ef30 T elantech_get_hwinfo_v2 +ffffffff8242f240 T elantech_get_hwinfo_v3 +ffffffff8242f450 T elantech_get_hwinfo_v4 +ffffffff8242f6c0 T elantech_knock +ffffffff82430000 T wscnprobe +ffffffff824300a0 T wscninit +ffffffff82430150 T wscn_video_init +ffffffff824301c0 T wscn_input_init +ffffffff82430230 T wscnputc +ffffffff82430240 T wscngetc +ffffffff82430250 T wscnpollc +ffffffff82431000 T skgpio_match +ffffffff82431100 T skgpio_attach +ffffffff82431350 T skgpio_gpio_read +ffffffff824313a0 T skgpio_gpio_write +ffffffff82431410 T skgpio_gpio_ctl +ffffffff824314a0 T skgpio_led_read +ffffffff824314f0 T skgpio_led_write +ffffffff82431520 T skgpio_led_ctl +ffffffff82432000 T pctrattach +ffffffff82432080 T pctropen +ffffffff824320d0 T pctrclose +ffffffff82432100 T pctrioctl +ffffffff824323d0 T pctr_reload +ffffffff82432510 T pctr_resume +ffffffff82433000 T nvramattach +ffffffff824330a0 T nvram_csum_valid +ffffffff82433130 T nvramopen +ffffffff82433180 T nvramclose +ffffffff824331b0 T nvramread +ffffffff824332d0 T nvram_get_byte +ffffffff82434000 T hid_start_parse +ffffffff82434070 T hid_end_parse +ffffffff824340b0 T hid_get_item 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T hidkbd_cngetc +ffffffff82437520 T hidkbd_hookup_bell +ffffffff82438000 T hidms_stylus_hid_parse +ffffffff82438320 T hidms_pad_buttons_hid_parse +ffffffff82438400 T hidms_wacom_setup +ffffffff82438710 T hidms_setup +ffffffff82438cb0 T hidms_attach +ffffffff82438e00 T hidms_detach +ffffffff82438e40 T hidms_input +ffffffff824390f0 T hidms_enable +ffffffff82439140 T hidms_ioctl +ffffffff82439310 T hidms_disable +ffffffff8243a000 T hidmt_get_resolution +ffffffff8243a110 T hidmt_setup +ffffffff8243a7b0 T hidmt_set_input_mode +ffffffff8243a840 T hidmt_configure +ffffffff8243a8e0 T hidmt_attach +ffffffff8243a9f0 T hidmt_detach +ffffffff8243aa30 T hidmt_input +ffffffff8243af10 T hidmt_enable +ffffffff8243af50 T hidmt_ioctl +ffffffff8243b020 T hidmt_disable +ffffffff8243c000 T hidcc_match +ffffffff8243c0e0 T hidcc_attach +ffffffff8243c280 T hidcc_parse +ffffffff8243c640 T hidcc_attach_wskbd +ffffffff8243c6f0 T hidcc_detach +ffffffff8243c7a0 T hidcc_intr +ffffffff8243cab0 T hidcc_intr_slice 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+ffffffff82440e90 T usbd_dopoll +ffffffff82440eb0 T usbd_alloc_buffer +ffffffff82440f40 T usbd_free_buffer +ffffffff82440f80 T usbd_setup_default_xfer +ffffffff82441000 T usbd_setup_isoc_xfer +ffffffff82441130 T usbd_get_xfer_status +ffffffff82441190 T usbd_get_config_descriptor +ffffffff824411e0 T usbd_get_interface_descriptor +ffffffff82441230 T usbd_get_device_descriptor +ffffffff82441260 T usbd_interface2endpoint_descriptor +ffffffff824412b0 T usbd_clear_endpoint_stall +ffffffff82441340 T usbd_clear_endpoint_toggle +ffffffff82441380 T usbd_do_request +ffffffff824413a0 T usbd_clear_endpoint_stall_async +ffffffff82441460 T usbd_request_async +ffffffff82441570 T usbd_device2interface_handle +ffffffff82441600 T usbd_set_interface +ffffffff824416e0 T usbd_get_no_alts +ffffffff82441750 T usbd_get_interface_altindex +ffffffff82441780 T usbd_start_next +ffffffff82441850 T usb_insert_transfer +ffffffff82441900 T usbd_do_request_flags +ffffffff82441b80 T usbd_request_async_cb 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otus_led_newstate_type2 +ffffffff82524000 T umb_match +ffffffff825240d0 T umb_attach +ffffffff82524900 T umb_detach +ffffffff82524aa0 T umb_state_task +ffffffff82524c40 T umb_get_response_task +ffffffff82524d50 T umb_statechg_timeout +ffffffff82524dc0 T umb_intr +ffffffff82524eb0 T umb_ncm_setup +ffffffff82525070 T umb_ncm_setup_format +ffffffff82525140 T umb_ioctl +ffffffff82525470 T umb_start +ffffffff825256e0 T umb_rtrequest +ffffffff825259d0 T umb_watchdog +ffffffff82525a50 T umb_output +ffffffff82525ab0 T umb_kstat_attach +ffffffff82525be0 T umb_open +ffffffff82525c40 T umb_down +ffffffff82525ed0 T umb_close +ffffffff82525f30 T umb_kstat_detach +ffffffff82525fc0 T umb_alloc_xfers +ffffffff82526080 T umb_free_xfers +ffffffff82526100 T umb_alloc_bulkpipes +ffffffff82526200 T umb_rx +ffffffff82526260 T umb_close_bulkpipes +ffffffff825262f0 T umb_setpin +ffffffff825265d0 T umb_setdataclass +ffffffff825266a0 T umb_encap +ffffffff82526c40 T umb_send_inet_proposal +ffffffff82526e60 T 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uath_ioctl +ffffffff8252dce0 T uath_start +ffffffff8252de90 T uath_watchdog +ffffffff8252df20 T uath_newstate +ffffffff8252dfc0 T uath_media_change +ffffffff8252e020 T uath_close_pipes +ffffffff8252e0d0 T uath_free_tx_data_list +ffffffff8252e1f0 T uath_free_rx_cmd_list +ffffffff8252e240 T uath_free_tx_cmd_list +ffffffff8252e360 T uath_free_rx_data_list +ffffffff8252e3d0 T uath_init +ffffffff8252e9b0 T uath_cmd_write +ffffffff8252e9d0 T uath_set_led +ffffffff8252ea30 T uath_switch_channel +ffffffff8252ec10 T uath_set_rates +ffffffff8252ecb0 T uath_cmd +ffffffff8252eec0 T uath_cmd_read +ffffffff8252eee0 T uath_write_reg +ffffffff8252ef80 T uath_write_multi +ffffffff8252f040 T uath_read_reg +ffffffff8252f0e0 T uath_read_eeprom +ffffffff8252f1a0 T uath_data_rxeof +ffffffff8252f4c0 T uath_tx_null +ffffffff8252f600 T uath_data_txeof +ffffffff8252f700 T uath_tx_data +ffffffff8252f9b0 T uath_stop +ffffffff8252fae0 T uath_reset_tx_queues +ffffffff8252fbb0 T uath_wme_init +ffffffff8252fca0 T uath_set_chan +ffffffff8252fd20 T uath_set_key +ffffffff8252fee0 T uath_set_keys +ffffffff82530170 T uath_set_rxfilter +ffffffff82531000 T athn_usb_match +ffffffff82531070 T athn_usb_attach +ffffffff825311b0 T athn_usb_detach +ffffffff82531260 T athn_usb_read +ffffffff82531300 T athn_usb_write +ffffffff82531390 T athn_usb_write_barrier +ffffffff825313f0 T athn_usb_task +ffffffff825314b0 T athn_usb_open_pipes +ffffffff82531660 T athn_usb_alloc_tx_cmd +ffffffff82531700 T athn_usb_attachhook +ffffffff825318c0 T athn_usb_wait_async +ffffffff825318f0 T athn_usb_close_pipes +ffffffff825319c0 T athn_usb_free_tx_cmd +ffffffff82531a10 T athn_usb_free_tx_list +ffffffff82531b40 T athn_usb_free_rx_list +ffffffff82531b90 T athn_usb_load_firmware +ffffffff82531d80 T athn_usb_htc_setup +ffffffff82532030 T athn_usb_ioctl +ffffffff825321e0 T athn_usb_start +ffffffff82532360 T athn_usb_watchdog +ffffffff825323f0 T athn_usb_node_alloc +ffffffff82532410 T athn_usb_newauth +ffffffff825325c0 T athn_usb_newassoc +ffffffff825326f0 T athn_usb_node_free +ffffffff825327f0 T athn_usb_updateslot +ffffffff82532820 T athn_usb_updateedca +ffffffff825328e0 T athn_usb_set_key +ffffffff82532a20 T athn_usb_delete_key +ffffffff82532b70 T athn_usb_newstate +ffffffff82532c70 T athn_usb_media_change +ffffffff82532d00 T athn_usb_next_scan +ffffffff82532da0 T athn_usb_rx_enable +ffffffff82532e10 T athn_usb_intr +ffffffff82532fa0 T athn_usb_alloc_rx_list +ffffffff82533050 T athn_usb_alloc_tx_list +ffffffff82533150 T athn_usb_do_async +ffffffff82533270 T athn_usb_htc_msg +ffffffff82533300 T athn_usb_htc_connect_svc +ffffffff825334d0 T athn_usb_wmi_xcmd +ffffffff82533700 T athn_usb_read_rom +ffffffff82533860 T athn_usb_stop +ffffffff82533b70 T athn_usb_init +ffffffff82533fc0 T athn_usb_newstate_cb +ffffffff825342c0 T athn_usb_remove_node +ffffffff825343c0 T athn_usb_switch_chan +ffffffff82534580 T athn_usb_create_node +ffffffff825347e0 T athn_usb_newassoc_cb +ffffffff82534960 T athn_usb_node_set_rates +ffffffff82534aa0 T athn_usb_count_active_sta +ffffffff82534af0 T athn_usb_newauth_cb +ffffffff82534bd0 T athn_usb_node_free_cb +ffffffff82534c90 T athn_usb_ampdu_tx_start +ffffffff82534da0 T athn_usb_ampdu_tx_start_cb +ffffffff82534e00 T athn_usb_ampdu_tx_stop +ffffffff82534ee0 T athn_usb_ampdu_tx_stop_cb +ffffffff82534f40 T athn_usb_clean_nodes +ffffffff82535000 T athn_usb_updateedca_cb +ffffffff82535040 T athn_usb_updateslot_cb +ffffffff82535080 T athn_usb_set_key_cb +ffffffff82535140 T athn_usb_delete_key_cb +ffffffff825351a0 T athn_usb_bcneof +ffffffff82535200 T athn_usb_swba +ffffffff82535360 T athn_usb_tx_status +ffffffff825353d0 T athn_usb_rx_wmi_ctrl +ffffffff825355f0 T athn_usb_rx_radiotap +ffffffff825357e0 T athn_usb_rx_frame +ffffffff82535a50 T athn_usb_rxeof +ffffffff82535d70 T athn_usb_txeof +ffffffff82535e30 T athn_usb_tx +ffffffff82537000 T uow_match +ffffffff82537070 T uow_attach +ffffffff82537510 T uow_detach +ffffffff825375e0 T uow_activate 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upd_sensor_invalidate +ffffffff82539c80 T upd_sensor_update +ffffffff8253a000 T uwacom_match +ffffffff8253a0e0 T uwacom_attach +ffffffff8253a300 T uwacom_detach +ffffffff8253a320 T uwacom_enable +ffffffff8253a390 T uwacom_ioctl +ffffffff8253a440 T uwacom_disable +ffffffff8253a470 T uwacom_intr_legacy +ffffffff8253a620 T uwacom_intr +ffffffff8253b000 T bwfm_usb_preinit +ffffffff8253b4b0 T bwfm_usb_txcheck +ffffffff8253b4f0 T bwfm_usb_txdata +ffffffff8253b630 T bwfm_usb_txctl +ffffffff8253b7f0 T bwfm_usb_match +ffffffff8253b860 T bwfm_usb_attach +ffffffff8253b9f0 T bwfm_usb_detach +ffffffff8253bad0 T bwfm_usb_dl_cmd +ffffffff8253bb70 T bwfm_usb_load_microcode +ffffffff8253be60 T bwfm_usb_alloc_rx_list +ffffffff8253bf50 T bwfm_usb_alloc_tx_list +ffffffff8253c080 T bwfm_usb_rxeof +ffffffff8253c230 T bwfm_usb_free_rx_list +ffffffff8253c2b0 T bwfm_usb_free_tx_list +ffffffff8253c330 T bwfm_usb_newbuf +ffffffff8253c3b0 T bwfm_usb_txeof +ffffffff8253c4c0 T bwfm_usb_txctl_cb +ffffffff8253d000 T umstc_match +ffffffff8253d0b0 T umstc_attach +ffffffff8253d1b0 T umstc_detach +ffffffff8253d200 T umstc_intr +ffffffff8253d350 T umstc_brightness_task +ffffffff8253e000 T uhidpp_match +ffffffff8253e0e0 T uhidpp_attach +ffffffff8253e450 T uhidpp_detach +ffffffff8253e690 T uhidpp_intr +ffffffff8253e8a0 T uhidpp_task +ffffffff8253e930 T hidpp10_get_type +ffffffff8253ea30 T hidpp10_get_name +ffffffff8253eb30 T hidpp10_enable_notifications +ffffffff8253eba0 T uhidpp_is_notification +ffffffff8253ec30 T uhidpp_claim_notification +ffffffff8253ed50 T uhidpp_refresh +ffffffff8253ee20 T uhidpp_device_refresh +ffffffff8253eed0 T uhidpp_consume_notification +ffffffff8253f020 T uhidpp_device_connect +ffffffff8253f310 T uhidpp_sleep +ffffffff8253f340 T hidpp_get_protocol_version +ffffffff8253f410 T uhidpp_device_features +ffffffff8253f600 T hidpp20_battery_get_capability +ffffffff8253f6c0 T hidpp20_unified_battery_get_capabilities +ffffffff8253f7b0 T hidpp20_battery_get_level_status +ffffffff8253f8e0 T hidpp20_unified_battery_get_status +ffffffff8253fa00 T hidpp20_root_get_feature +ffffffff8253fac0 T hidpp20_feature_get_count +ffffffff8253fb60 T hidpp20_feature_get_id +ffffffff8253fc10 T hidpp_send_fap_report +ffffffff8253fcf0 T hidpp_send_rap_report +ffffffff8253fdb0 T hidpp20_battery_status_is_charging +ffffffff8253fdf0 T hidpp20_unified_battery_status_is_charging +ffffffff8253fe30 T hidpp_send_validate +ffffffff8253fe80 T hidpp_send_report +ffffffff82541000 T ucc_match +ffffffff825410a0 T ucc_attach +ffffffff825411b0 T ucc_detach +ffffffff82541210 T ucc_intr +ffffffff82541250 T ucc_enable +ffffffff82542000 T iic_match +ffffffff82542050 T iic_attach +ffffffff825420c0 T iicbus_print +ffffffff82542110 T iic_print +ffffffff82542180 T iic_search +ffffffff82542250 T iic_is_compatible +ffffffff82543000 T iic_exec +ffffffff825432c0 T iic_smbus_write_byte +ffffffff825433c0 T iic_smbus_read_byte +ffffffff825434f0 T iic_smbus_receive_byte +ffffffff82544000 T iicprobeinit +ffffffff82544040 T iicprobenc +ffffffff825440f0 T iicprobew +ffffffff825441a0 T iicprobe +ffffffff82544270 T lm75probe +ffffffff82545780 T adm1032cloneprobe +ffffffff82545af0 T iic_ignore_addr +ffffffff82545ba0 T iic_dump +ffffffff82546020 T iic_probe_sensor +ffffffff8254b990 T iic_probe_eeprom +ffffffff8254ba50 T iic_scan +ffffffff8254c000 T i2c_wait_for_scl +ffffffff8254c0f0 T i2c_bitbang_send_stop +ffffffff8254c170 T i2c_bitbang_send_start +ffffffff8254c2d0 T i2c_bitbang_initiate_xfer +ffffffff8254c360 T i2c_bitbang_write_byte +ffffffff8254c600 T i2c_bitbang_read_byte +ffffffff8254d000 T lmtemp_match +ffffffff8254d0b0 T lmtemp_attach +ffffffff8254d300 T lmtemp_refresh_sensor_data +ffffffff8254d3e0 T lmtemp_temp_read +ffffffff8254e000 T lmn_match +ffffffff8254e050 T lmn_attach +ffffffff8254e190 T lmn_refresh +ffffffff8254f000 T lmenv_match +ffffffff8254f0b0 T lmenv_attach +ffffffff8254f600 T lmenv_refresh +ffffffff82550000 T maxtmp_match +ffffffff82550150 T maxtmp_attach +ffffffff825502e0 T maxtmp_refresh +ffffffff82550350 T maxtmp_readport +ffffffff82551000 T adc_match +ffffffff82551070 T adc_attach +ffffffff82551310 T adc_refresh +ffffffff82552000 T admtemp_match +ffffffff82552110 T admtemp_attach +ffffffff82552410 T admtemp_refresh +ffffffff82553000 T admlc_match +ffffffff82553050 T admlc_attach +ffffffff825533f0 T admlc_refresh +ffffffff82554000 T admtm_match +ffffffff82554090 T admtm_attach +ffffffff82554410 T admtm_refresh +ffffffff82555000 T admtmp_match +ffffffff82555050 T admtmp_attach +ffffffff825551c0 T admtmp_refresh +ffffffff82556000 T admtt_match +ffffffff82556050 T admtt_attach +ffffffff82556200 T admtt_refresh +ffffffff82557000 T maxds_match +ffffffff82557090 T maxds_attach +ffffffff82557290 T maxds_refresh +ffffffff82558000 T adt_match +ffffffff82558140 T adt_attach +ffffffff825586b0 T adt_refresh +ffffffff82559000 T lm_i2c_match +ffffffff82559110 T lm_i2c_attach +ffffffff82559210 T lm_i2c_writereg +ffffffff825592c0 T lm_i2c_readreg +ffffffff8255a000 T admcts_match +ffffffff8255a050 T admcts_attach +ffffffff8255a5c0 T admcts_refresh +ffffffff8255b000 T wbng_match +ffffffff8255b050 T wbng_attach +ffffffff8255b600 T wbng_refresh +ffffffff8255b730 T wbng_readreg +ffffffff8255b7a0 T wbng_writereg +ffffffff8255b800 T wbng_refresh_volts +ffffffff8255bb20 T wbng_refresh_temps +ffffffff8255bd20 T wbng_refresh_fans +ffffffff8255c000 T nvt_match +ffffffff8255c050 T nvt_attach +ffffffff8255c3e0 T nvt_readreg +ffffffff8255c450 T nvt_refresh +ffffffff8255c580 T nvt_writereg +ffffffff8255c5e0 T nvt_refresh_volts +ffffffff8255c720 T nvt_refresh_temps +ffffffff8255c870 T nvt_refresh_fans +ffffffff8255d000 T adl_match +ffffffff8255d050 T adl_attach +ffffffff8255d1f0 T adl_refresh +ffffffff8255e000 T andl_match +ffffffff8255e050 T andl_attach +ffffffff8255e340 T andl_refresh +ffffffff8255e3c0 T andl_refresh_temps +ffffffff8255e500 T andl_refresh_volts +ffffffff8255e6c0 T andl_refresh_tachs +ffffffff8255e7e0 T andl_readreg +ffffffff8255e850 T andl_writereg +ffffffff8255f000 T spdmem_iic_match +ffffffff8255f0a0 T spdmem_iic_attach +ffffffff8255f0f0 T spdmem_iic_read +ffffffff82560000 T sdtemp_match +ffffffff82560290 T sdtemp_attach +ffffffff82560340 T sdtemp_refresh +ffffffff82561000 T lisa_match +ffffffff82561050 T lisa_attach +ffffffff82561180 T lisa_refresh +ffffffff825612a0 T lisa_readreg +ffffffff82561310 T lisa_writereg +ffffffff82562000 T ihidev_match +ffffffff82562050 T ihidev_attach +ffffffff82562550 T ihidev_detach +ffffffff825625f0 T ihidev_activate +ffffffff82562730 T ihidev_hid_command +ffffffff82562b10 T ihidev_hid_desc_parse +ffffffff82562d20 T ihidev_intr +ffffffff82563050 T ihidev_maxrepid +ffffffff82563100 T ihidev_submatch +ffffffff82563150 T ihidev_print +ffffffff825631b0 T ihidev_reset +ffffffff825633d0 T ihidev_sleep +ffffffff82563460 T ihidev_poll +ffffffff825634b0 T ihidev_open +ffffffff82563580 T ihidev_close +ffffffff82563680 T ihidev_ioctl +ffffffff825636b0 T ihidev_get_report_desc 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thinkpad_battery_setchargestop +ffffffff825a3140 T thinkpad_battery_setchargemode +ffffffff825a3710 T thinkpad_hotkey +ffffffff825a3d40 T thinkpad_brightness_up +ffffffff825a3ee0 T thinkpad_brightness_down +ffffffff825a4090 T thinkpad_toggle_bluetooth +ffffffff825a41b0 T thinkpad_volume_mute +ffffffff825a4260 T thinkpad_volume_down +ffffffff825a4310 T thinkpad_volume_up +ffffffff825a43c0 T thinkpad_get_thinklight +ffffffff825a4410 T thinkpad_adaptive_change +ffffffff825a4530 T thinkpad_get_brightness +ffffffff825a4570 T thinkpad_toggle_wan +ffffffff825a4690 T thinkpad_cmos +ffffffff825a4740 T thinkpad_set_brightness +ffffffff825a4830 T thinkpad_set_thinklight +ffffffff825a48f0 T thinkpad_battery_inhibit_charge +ffffffff825a4a20 T thinkpad_battery_force_discharge +ffffffff825a5000 T toshiba_match +ffffffff825a50a0 T toshiba_attach +ffffffff825a5180 T get_param_brightness +ffffffff825a51e0 T acpitoshiba_get_param +ffffffff825a5240 T set_param_brightness +ffffffff825a52d0 T toshiba_update_brightness +ffffffff825a53d0 T acpitoshiba_set_param +ffffffff825a5470 T toshiba_set_brightness +ffffffff825a5590 T toshiba_enable_events +ffffffff825a5620 T toshiba_read_events +ffffffff825a5780 T toshiba_hotkey +ffffffff825a59b0 T toshiba_get_brightness +ffffffff825a5b20 T toshiba_fn_key_brightness_up +ffffffff825a5c70 T toshiba_fn_key_brightness_down +ffffffff825a5dc0 T toshiba_fn_key_video_output +ffffffff825a5f10 T toshiba_get_video_output +ffffffff825a6080 T toshiba_set_video_output +ffffffff825a7000 T acpisony_match +ffffffff825a7070 T acpisony_attach +ffffffff825a70e0 T acpisony_activate +ffffffff825a7120 T acpisony_notify_setup +ffffffff825a7310 T acpisony_notify +ffffffff825a76b0 T acpisony_find_offset +ffffffff825a77c0 T acpisony_set_hotkey +ffffffff825a79b0 T acpisony_brightness_down +ffffffff825a7ac0 T acpisony_get_brightness +ffffffff825a7b40 T acpisony_set_brightness +ffffffff825a8000 T acpivideo_match +ffffffff825a8070 T acpivideo_attach +ffffffff825a81d0 T acpivideo_getpcibus +ffffffff825a8210 T acpivideo_notify +ffffffff825a8270 T acpivideo_set_policy +ffffffff825a8340 T acpi_foundvout +ffffffff825a8410 T acpivideo_print +ffffffff825a9000 T acpivout_match +ffffffff825a9070 T acpivout_attach +ffffffff825a91c0 T acpivout_notify +ffffffff825a9270 T acpivout_get_bcl +ffffffff825a9390 T acpivout_get_brightness +ffffffff825a9430 T acpivout_get_param +ffffffff825a94d0 T acpivout_set_param +ffffffff825a9630 T acpivout_select_brightness +ffffffff825a9700 T acpivout_find_brightness +ffffffff825a9790 T acpivout_set_brightness +ffffffff825aa000 T acpipwrres_match +ffffffff825aa070 T acpipwrres_attach +ffffffff825aa2b0 T acpipwrres_foundcons +ffffffff825aa440 T acpipwrres_ref_incr +ffffffff825aa4d0 T acpipwrres_hascons +ffffffff825aa520 T acpipwrres_ref_decr +ffffffff825aa5b0 T acpipwrres_addcons +ffffffff825ab000 T aibs_match +ffffffff825ab030 T aibs_attach +ffffffff825ab140 T aibs_probe +ffffffff825ab2a0 T aibs_attach_new +ffffffff825ab3c0 T aibs_attach_sif +ffffffff825ab590 T aibs_notify +ffffffff825ab600 T aibs_add_sensor +ffffffff825ab850 T aibs_getpack +ffffffff825ab8d0 T aibs_refresh +ffffffff825ab930 T aibs_refresh_r +ffffffff825aba70 T aibs_getvalue +ffffffff825abbc0 T aibs_find_cb +ffffffff825ac000 T aplgpio_match +ffffffff825ac060 T aplgpio_attach +ffffffff825ac310 T aplgpio_intr +ffffffff825ac460 T aplgpio_read_pin +ffffffff825ac4b0 T aplgpio_write_pin +ffffffff825ac520 T aplgpio_intr_establish +ffffffff825ac640 T aplgpio_intr_enable +ffffffff825ac6d0 T aplgpio_intr_disable +ffffffff825ad000 T bytgpio_match +ffffffff825ad060 T bytgpio_attach +ffffffff825ad320 T bytgpio_intr +ffffffff825ad450 T bytgpio_read_pin +ffffffff825ad4b0 T bytgpio_write_pin +ffffffff825ad530 T bytgpio_intr_establish +ffffffff825ad5a0 T bytgpio_intr_enable +ffffffff825ad690 T bytgpio_intr_disable +ffffffff825ae000 T chvgpio_match +ffffffff825ae060 T chvgpio_attach +ffffffff825ae300 T chvgpio_intr +ffffffff825ae3d0 T chvgpio_read_pin +ffffffff825ae480 T chvgpio_write_pin +ffffffff825ae540 T chvgpio_intr_establish +ffffffff825ae710 T chvgpio_intr_enable +ffffffff825ae7e0 T chvgpio_intr_disable +ffffffff825ae8b0 T chvgpio_opreg_handler +ffffffff825ae930 T chvgpio_check_pin +ffffffff825af000 T glkgpio_match +ffffffff825af060 T glkgpio_attach +ffffffff825af310 T glkgpio_intr +ffffffff825af460 T glkgpio_read_pin +ffffffff825af4c0 T glkgpio_write_pin +ffffffff825af530 T glkgpio_intr_establish +ffffffff825af650 T glkgpio_intr_enable +ffffffff825af6e0 T glkgpio_intr_disable +ffffffff825b0000 T pchgpio_match +ffffffff825b0060 T pchgpio_attach +ffffffff825b0530 T pchgpio_activate +ffffffff825b05e0 T pchgpio_intr +ffffffff825b0800 T pchgpio_read_pin +ffffffff825b08f0 T pchgpio_write_pin +ffffffff825b0a00 T pchgpio_intr_establish +ffffffff825b0c20 T pchgpio_intr_enable +ffffffff825b0d50 T pchgpio_intr_disable +ffffffff825b0e80 T pchgpio_save +ffffffff825b0ef0 T pchgpio_restore +ffffffff825b0f60 T pchgpio_find_group +ffffffff825b0fe0 T pchgpio_intr_handle +ffffffff825b10c0 T pchgpio_save_pin +ffffffff825b1280 T pchgpio_restore_pin +ffffffff825b2000 T tipmic_match +ffffffff825b2050 T tipmic_attach +ffffffff825b2250 T tipmic_write_1 +ffffffff825b2310 T tipmic_intr +ffffffff825b2470 T tipmic_get_lpat +ffffffff825b2580 T tipmic_read_pin +ffffffff825b25b0 T tipmic_write_pin +ffffffff825b25e0 T tipmic_thermal_opreg_handler +ffffffff825b2e60 T tipmic_power_opreg_handler +ffffffff825b3100 T tipmic_read_1 +ffffffff825b31d0 T tipmic_raw_to_temp +ffffffff825b4000 T ccpmic_match +ffffffff825b4050 T ccpmic_attach +ffffffff825b4130 T ccpmic_get_lpat +ffffffff825b4240 T ccpmic_read_pin +ffffffff825b43c0 T ccpmic_write_pin +ffffffff825b4520 T ccpmic_thermal_opreg_handler +ffffffff825b4770 T ccpmic_power_opreg_handler +ffffffff825b4960 T ccpmic_read_1 +ffffffff825b4a30 T ccpmic_write_1 +ffffffff825b4af0 T ccpmic_raw_to_temp +ffffffff825b5000 T com_acpi_match +ffffffff825b5120 T com_acpi_attach +ffffffff825b53a0 T com_acpi_is_designware +ffffffff825b5400 T com_acpi_intr_designware +ffffffff825b5430 T com_acpi_is_console +ffffffff825b6000 T sdhc_acpi_match +ffffffff825b6060 T sdhc_acpi_attach +ffffffff825b6370 T sdhc_acpi_parse_resources +ffffffff825b6420 T sdhc_acpi_card_detect_gpio +ffffffff825b6480 T sdhc_acpi_card_detect_intr +ffffffff825b64c0 T sdhc_acpi_power_on +ffffffff825b6540 T sdhc_acpi_explore +ffffffff825b6570 T sdhc_acpi_card_detect_nonremovable +ffffffff825b65a0 T sdhc_acpi_do_explore +ffffffff825b7000 T dwiic_acpi_match +ffffffff825b7050 T dwiic_acpi_attach +ffffffff825b7410 T dwiic_acpi_parse_crs +ffffffff825b7560 T dwiic_acpi_power +ffffffff825b7670 T dwiic_acpi_get_params +ffffffff825b77b0 T dwiic_i2c_intr_establish +ffffffff825b7830 T dwiic_i2c_intr_disestablish +ffffffff825b7850 T dwiic_i2c_intr_string +ffffffff825b78e0 T dwiic_acpi_acquire_bus +ffffffff825b7930 T dwiic_acpi_release_bus +ffffffff825b7960 T dwiic_acpi_bus_scan +ffffffff825b79a0 T dwiic_acpi_found_hid +ffffffff825b7d00 T dwiic_matchhids +ffffffff825b7d90 T dwiic_acpi_found_ihidev +ffffffff825b8000 T dwiic_acpi_found_iatp +ffffffff825b8160 T dwiic_acpi_found_ietp +ffffffff825b9000 T acpicbkbd_match +ffffffff825b9030 T acpicbkbd_attach +ffffffff825b90d0 T acpicbkbd_activate +ffffffff825b9120 T acpicbkbd_get_backlight +ffffffff825b91a0 T acpicbkbd_set_backlight +ffffffff825b9240 T acpicbkbd_write_backlight +ffffffff825ba000 T acpials_match +ffffffff825ba090 T acpials_attach +ffffffff825ba230 T acpials_read +ffffffff825ba2b0 T acpials_addtask +ffffffff825ba2f0 T acpials_notify +ffffffff825ba380 T acpials_update +ffffffff825bb000 T tpm_match +ffffffff825bb050 T tpm_attach +ffffffff825bb320 T tpm_activate +ffffffff825bb430 T tpm2_start_method +ffffffff825bb4b0 T tpm_probe +ffffffff825bb560 T tpm_init_tis +ffffffff825bb7d0 T tpm_init_crb +ffffffff825bbb10 T tpm_suspend +ffffffff825bbc00 T tpm_resume +ffffffff825bbc30 T tpm_write_tis +ffffffff825bbfc0 T tpm_read_tis +ffffffff825bc190 T tpm_write_crb +ffffffff825bc570 T tpm_read_crb +ffffffff825bc870 T tpm_request_locality_tis +ffffffff825bc960 T tpm_request_locality_crb +ffffffff825bca60 T tpm_release_locality_crb +ffffffff825bcab0 T tpm_release_locality_tis +ffffffff825bcb20 T tpm_getburst +ffffffff825bcbd0 T tpm_status +ffffffff825bcbf0 T tpm_waitfor +ffffffff825bccd0 T tpm_waitfor_status +ffffffff825bd000 T acpihve_match +ffffffff825bd0b0 T acpihve_attach +ffffffff825be000 T acpisbs_match +ffffffff825be030 T acpisbs_attach +ffffffff825be2b0 T acpisbs_activate +ffffffff825be390 T acpisbs_read +ffffffff825be450 T acpisbs_setup_sensors +ffffffff825be550 T acpisbs_refresh_sensors +ffffffff825be6a0 T acpisbs_notify +ffffffff825be7e0 T acpi_smbus_read +ffffffff825bf000 T surface_match +ffffffff825bf060 T surface_attach +ffffffff825bf0c0 T surface_hotkey +ffffffff825c0000 T ipmi_acpi_match +ffffffff825c0030 T ipmi_acpi_attach +ffffffff825c0260 T ipmi_acpi_parse_crs +ffffffff825c1000 T amdgpio_match +ffffffff825c1060 T amdgpio_attach +ffffffff825c12a0 T amdgpio_activate +ffffffff825c1390 T amdgpio_intr +ffffffff825c1530 T amdgpio_read_pin +ffffffff825c1580 T amdgpio_write_pin +ffffffff825c15f0 T amdgpio_intr_establish +ffffffff825c16e0 T amdgpio_intr_enable +ffffffff825c1760 T amdgpio_intr_disable +ffffffff825c17e0 T amdgpio_save +ffffffff825c1860 T amdgpio_restore +ffffffff825c18f0 T amdgpio_save_pin +ffffffff825c1960 T amdgpio_restore_pin +ffffffff825c19d0 T amdgpio_pin_intr +ffffffff825c2000 T acpihid_match +ffffffff825c2030 T acpihid_attach +ffffffff825c2210 T acpihid_init_dsm +ffffffff825c2370 T acpihid_eval +ffffffff825c2590 T acpihid_notify +ffffffff825c25f0 T acpihid_button_array_enable +ffffffff825c3000 t iosf_acpi_match +ffffffff825c3050 t iosf_acpi_attach +ffffffff825c3150 t iosf_acpi_mbi_mdr_rd +ffffffff825c31c0 t iosf_acpi_mbi_mdr_wr +ffffffff825c4000 T acpi_match +ffffffff825c4060 T acpi_attach +ffffffff825c40a0 T acpi_probe +ffffffff825c4240 T acpi_map +ffffffff825c4330 T acpi_unmap +ffffffff825c4380 T acpi_bus_space_map +ffffffff825c43a0 T acpi_bus_space_unmap +ffffffff825c43c0 T acpi_intr_establish +ffffffff825c4500 T acpi_intr_disestablish +ffffffff825c4510 T acpi_scan +ffffffff825c46b0 T acpi_acquire_glk +ffffffff825c4710 T acpi_release_glk +ffffffff825c4760 T acpi_attach_machdep +ffffffff825c48f0 T acpi_sleep_cpu +ffffffff825c4a90 T acpi_resume_cpu +ffffffff825c4b90 T sleep_mp +ffffffff825c4c80 T resume_mp +ffffffff825c4d70 T acpi_iommu_device_map +ffffffff825c5000 T hibernate_resume_machdep +ffffffff825c5050 T hibernate_drop_to_real_mode +ffffffff825c5060 T hibernate_activate_resume_pt_machdep +ffffffff825c50a0 T hibernate_switch_stack_machdep +ffffffff825c50e0 T hibernate_flush +ffffffff825c5110 T acpi_savecpu +ffffffff825c6000 T sleep_showstate +ffffffff825c60f0 T sleep_setstate +ffffffff825c6150 T gosleep +ffffffff825c6210 T sleep_abort +ffffffff825c6240 T sleep_resume +ffffffff825c62b0 T suspend_finish +ffffffff825c7000 T acpiopen +ffffffff825c70d0 T acpiclose +ffffffff825c7160 T acpiioctl +ffffffff825c72b0 T request_sleep +ffffffff825c7330 T acpi_filtdetach +ffffffff825c7380 T acpi_filtread +ffffffff825c73c0 T acpikqfilter +ffffffff825c8000 T acpipci_match +ffffffff825c8030 T acpipci_attach +ffffffff825c82f0 T acpipci_osc +ffffffff825c8430 T acpipci_parse_resources +ffffffff825c8560 T acpipci_attach_bus +ffffffff825c8730 T acpipci_print +ffffffff825c87a0 T acpipci_attach_busses +ffffffff825c9000 T efiopen +ffffffff825c9040 T eficlose +ffffffff825c9070 T efiioctl +ffffffff825c9110 T efiioc_get_table +ffffffff825c9280 T efiioc_var_get +ffffffff825c9500 T efiioc_var_next +ffffffff825c9720 T efiioc_var_set +ffffffff825c98a0 T efi_adapt_error +ffffffff825ca000 T efi_match +ffffffff825ca060 T efi_attach +ffffffff825ca330 T efi_map_runtime +ffffffff825ca4b0 T efi_enter +ffffffff825ca550 T efi_leave +ffffffff825ca5d0 T efi_fault +ffffffff825cb000 T vmm_probe +ffffffff825cb050 T vmm_attach +ffffffff825cb170 T vmm_activate +ffffffff825cb2b0 T vmmopen +ffffffff825cb300 T vmmclose +ffffffff825cb330 T vm_find +ffffffff825cb450 T vmmioctl +ffffffff825cb6d0 T vm_create +ffffffff825cb9a0 T vm_get_info +ffffffff825cbbf0 T vm_terminate +ffffffff825cbd60 T vm_resetcpu +ffffffff825cbe80 T vm_share_mem +ffffffff825cbfd0 T pledge_ioctl_vmm +ffffffff825cc0c0 T vm_find_vcpu +ffffffff825cc120 T vm_create_check_mem_ranges +ffffffff825cc2e0 T vm_teardown +ffffffff825cc420 T vcpu_must_stop +ffffffff825cd000 T vmm_enabled +ffffffff825cd080 T vmm_attach_machdep +ffffffff825cd230 T vmm_quiesce_vmx +ffffffff825cd400 T vmm_activate_machdep +ffffffff825cd520 T vmm_stop +ffffffff825cd650 T vmm_start +ffffffff825cd730 T vmmioctl_machdep +ffffffff825cd800 T vm_intr_pending +ffffffff825cd8a0 T vm_mprotect_ept +ffffffff825cdb20 T pledge_ioctl_vmm_machdep +ffffffff825cdb70 T vm_rwvmparams +ffffffff825cdd00 T vmm_init_pvclock +ffffffff825cddd0 T vm_rwregs +ffffffff825cdee0 T vcpu_readregs_vmx +ffffffff825ce310 T vcpu_writeregs_vmx +ffffffff825ce780 T vcpu_readregs_svm +ffffffff825cec30 T vcpu_writeregs_svm +ffffffff825cf100 T vmm_get_guest_memtype +ffffffff825cf180 T vmx_mprotect_ept +ffffffff825cf3e0 T vmx_pmap_find_pte_ept +ffffffff825cf4b0 T start_vmm_on_cpu +ffffffff825cf5d0 T stop_vmm_on_cpu +ffffffff825cf670 T vmclear_on_cpu +ffffffff825cf6f0 T vm_impl_init_vmx +ffffffff825cf800 T vm_impl_init_svm +ffffffff825cf910 T vm_impl_init +ffffffff825cf9b0 T vm_impl_deinit +ffffffff825cf9e0 T vcpu_reload_vmcs_vmx +ffffffff825cfb20 T vcpu_reset_regs_svm +ffffffff825cfeb0 T svm_setmsrbrw +ffffffff825cffc0 T svm_setmsrbr +ffffffff825d0090 T vmm_alloc_vpid +ffffffff825d01a0 T svm_setmsrbw +ffffffff825d0280 T vmx_setmsrbr +ffffffff825d0330 T vmx_setmsrbw +ffffffff825d03e0 T vmx_setmsrbrw +ffffffff825d04f0 T svm_set_clean +ffffffff825d0540 T svm_set_dirty +ffffffff825d0590 T vcpu_reset_regs_vmx +ffffffff825d0fd0 T vcpu_vmx_check_cap +ffffffff825d10d0 T vcpu_vmx_compute_ctrl +ffffffff825d12b0 T vcpu_init_vmx +ffffffff825d1650 T vcpu_deinit_vmx +ffffffff825d17d0 T vcpu_reset_regs +ffffffff825d1810 T vcpu_init_svm +ffffffff825d19a0 T vcpu_deinit_svm +ffffffff825d1ae0 T vcpu_init +ffffffff825d1ba0 T vmm_free_vpid +ffffffff825d1c10 T vcpu_deinit +ffffffff825d1c50 T vm_run +ffffffff825d1e10 T vcpu_run_vmx +ffffffff825d2600 T vcpu_run_svm +ffffffff825d2bf0 T vmm_fpurestore +ffffffff825d2cb0 T vmm_fpusave +ffffffff825d2d30 T vmm_translate_gva +ffffffff825d3040 T vmm_update_pvclock +ffffffff825d3140 T vmx_get_exit_info +ffffffff825d31a0 T vmx_handle_exit +ffffffff825d35d0 T vmx_instruction_error_decode +ffffffff825d37a0 T vmm_get_guest_cpu_cpl +ffffffff825d3890 T vmx_handle_intr +ffffffff825d3920 T svm_handle_hlt +ffffffff825d3970 T vmx_handle_hlt +ffffffff825d3a20 T svm_handle_exit +ffffffff825d3d40 T svm_handle_np_fault +ffffffff825d3ee0 T vmm_handle_cpuid +ffffffff825d4580 T svm_handle_msr +ffffffff825d4850 T svm_handle_xsetbv +ffffffff825d48f0 T svm_handle_inout +ffffffff825d49f0 T vmm_inject_ud +ffffffff825d4a20 T vmm_inject_db +ffffffff825d4a50 T vmx_handle_np_fault +ffffffff825d4bb0 T vmx_handle_inout +ffffffff825d4d30 T vmx_handle_cr +ffffffff825d4f30 T vmx_handle_rdmsr +ffffffff825d5000 T vmx_handle_wrmsr +ffffffff825d5270 T vmx_handle_xsetbv +ffffffff825d5340 T vmm_inject_gp +ffffffff825d5370 T vmx_get_exit_qualification +ffffffff825d53d0 T vmx_get_guest_faulttype +ffffffff825d5470 T svm_get_guest_faulttype +ffffffff825d54a0 T svm_fault_page +ffffffff825d5530 T vmx_fault_page +ffffffff825d5680 T vmm_get_guest_cpu_mode +ffffffff825d5780 T vmx_load_pdptes +ffffffff825d5a00 T vmx_handle_cr0_write +ffffffff825d5c10 T vmx_handle_cr4_write +ffffffff825d5cb0 T vmm_handle_xsetbv +ffffffff825d5d40 T vmx_handle_misc_enable_msr +ffffffff825d5da0 T vmm_pat_is_valid +ffffffff825d5e80 T vmm_gpa_is_valid +ffffffff825d5ef0 T vmx_exit_reason_decode +ffffffff825d5f30 T svm_exit_reason_decode +ffffffff825d6d40 T vcpu_state_decode +ffffffff825d7000 T vmm_dispatch_intr +ffffffff825d7020 T vmxon +ffffffff825d7050 T vmxoff +ffffffff825d7080 T vmclear +ffffffff825d70b0 T vmptrld +ffffffff825d70e0 T vmptrst +ffffffff825d7110 T vmwrite +ffffffff825d7140 T vmread +ffffffff825d7170 T invvpid +ffffffff825d718b t invvpid_fail +ffffffff825d7192 t invvpid_ret +ffffffff825d71b0 T invept +ffffffff825d71cb t invept_fail +ffffffff825d71d2 t invept_ret +ffffffff825d71f0 T vmx_enter_guest +ffffffff825d721b t skip_init +ffffffff825d72e8 t no_l1df_msr +ffffffff825d72eb t l1df_tlb_loop +ffffffff825d7304 t l1df_tlb_done +ffffffff825d730c t l1df_load_cache +ffffffff825d7323 t done_flush +ffffffff825d73b6 t do_resume +ffffffff825d743b t fail_launch_or_resume +ffffffff825d747d t fail_launch_unknown +ffffffff825d748a t fail_launch_invalid_vmcs +ffffffff825d7497 t fail_launch_valid_vmcs +ffffffff825d74b4 t vmx_exit_handler_asm +ffffffff825d7579 t restore_host +ffffffff825d7610 T svm_enter_guest +ffffffff825d77a0 t restore_host_svm +ffffffff825d8000 T sdmmc_match +ffffffff825d8050 T sdmmc_attach +ffffffff825d8390 T sdmmc_detach +ffffffff825d8440 T sdmmc_activate +ffffffff825d8510 T sdmmc_discover_task +ffffffff825d85d0 T sdmmc_create_thread +ffffffff825d8640 T sdmmc_holds_root_device +ffffffff825d86a0 T sdmmc_task_thread +ffffffff825d8890 T sdmmc_needs_discover +ffffffff825d8940 T sdmmc_del_task +ffffffff825d89f0 T sdmmc_card_detach +ffffffff825d8ad0 T sdmmc_add_task +ffffffff825d8b50 T sdmmc_card_attach +ffffffff825d8c60 T sdmmc_enable +ffffffff825d8db0 T sdmmc_scan +ffffffff825d8e40 T sdmmc_init +ffffffff825d8f40 T sdmmc_disable +ffffffff825d90a0 T sdmmc_function_free +ffffffff825d90c0 T sdmmc_delay +ffffffff825d9110 T sdmmc_select_card +ffffffff825d9330 T sdmmc_set_bus_power +ffffffff825d94e0 T sdmmc_function_alloc +ffffffff825d9570 T sdmmc_app_command +ffffffff825d9700 T sdmmc_mmc_command +ffffffff825d9780 T sdmmc_go_idle_state +ffffffff825d9890 T sdmmc_send_if_cond +ffffffff825d99e0 T sdmmc_set_relative_addr +ffffffff825da000 T sdmmc_cisptr +ffffffff825da0a0 T sdmmc_read_cis +ffffffff825da3e0 T sdmmc_print_cis +ffffffff825da550 T sdmmc_check_cis_quirks +ffffffff825db000 T sdmmc_io_enable +ffffffff825db2a0 T sdmmc_io_reset +ffffffff825db3d0 T sdmmc_io_send_op_cond +ffffffff825db540 T sdmmc_io_scan +ffffffff825db690 T sdmmc_io_init +ffffffff825db7c0 T sdmmc_io_set_highspeed +ffffffff825dba60 T sdmmc_io_set_bus_width +ffffffff825dbcf0 T sdmmc_io_function_ready +ffffffff825dbe70 T sdmmc_io_read_1 +ffffffff825dbfc0 T sdmmc_io_function_enable +ffffffff825dc390 T sdmmc_io_write_1 +ffffffff825dc510 T sdmmc_io_function_disable +ffffffff825dc790 T sdmmc_io_attach +ffffffff825dc880 T sdmmc_print +ffffffff825dcad0 T sdmmc_submatch +ffffffff825dcb50 T sdmmc_io_detach +ffffffff825dcc00 T sdmmc_io_rw_direct +ffffffff825dcda0 T sdmmc_io_rw_extended_subr +ffffffff825dcf40 T sdmmc_io_rw_extended +ffffffff825dd340 T sdmmc_io_read_2 +ffffffff825dd4a0 T sdmmc_io_write_2 +ffffffff825dd600 T sdmmc_io_read_4 +ffffffff825dd760 T sdmmc_io_write_4 +ffffffff825dd8c0 T sdmmc_io_read_multi_1 +ffffffff825dd9b0 T sdmmc_io_write_multi_1 +ffffffff825ddaa0 T sdmmc_io_read_region_1 +ffffffff825ddb90 T sdmmc_io_write_region_1 +ffffffff825ddc80 T sdmmc_io_xchg +ffffffff825dde10 T sdmmc_intr_enable +ffffffff825de080 T sdmmc_intr_disable +ffffffff825de2f0 T sdmmc_intr_establish +ffffffff825de3f0 T sdmmc_intr_disestablish +ffffffff825de4e0 T sdmmc_card_intr +ffffffff825de530 T sdmmc_intr_task +ffffffff825de5c0 T sdmmc_io_set_blocklen +ffffffff825df000 T sdmmc_mem_enable +ffffffff825df450 T sdmmc_mem_send_op_cond +ffffffff825df600 T sdmmc_mem_signal_voltage +ffffffff825df6c0 T sdmmc_mem_scan +ffffffff825df9d0 T sdmmc_decode_csd +ffffffff825dfe00 T sdmmc_decode_cid +ffffffff825e02a0 T sdmmc_mem_send_scr +ffffffff825e03e0 T sdmmc_mem_decode_scr +ffffffff825e0440 T sdmmc_mem_send_cxd_data +ffffffff825e05b0 T sdmmc_mem_set_bus_width +ffffffff825e06c0 T sdmmc_mem_sd_switch +ffffffff825e0970 T sdmmc_be512_to_bitfield512 +ffffffff825e0a20 T sdmmc_mem_mmc_switch +ffffffff825e0b10 T sdmmc_mem_init +ffffffff825e0c60 T sdmmc_mem_set_blocklen +ffffffff825e0d60 T sdmmc_mem_sd_init +ffffffff825e1140 T sdmmc_mem_mmc_init +ffffffff825e1800 T sdmmc_mem_select_transfer_mode +ffffffff825e1880 T sdmmc_mem_execute_tuning +ffffffff825e1910 T sdmmc_mem_read_block_subr +ffffffff825e1c70 T sdmmc_mem_single_read_block +ffffffff825e1d40 T sdmmc_mem_read_block +ffffffff825e1ef0 T sdmmc_mem_write_block_subr +ffffffff825e2240 T sdmmc_mem_single_write_block +ffffffff825e2310 T sdmmc_mem_write_block +ffffffff825e24c0 T sdmmc_mem_hibernate_write +ffffffff825e3000 T sdmmc_scsi_cmd +ffffffff825e31f0 T sdmmc_minphys +ffffffff825e3270 T sdmmc_scsi_attach +ffffffff825e3460 T sdmmc_alloc_ccbs +ffffffff825e35a0 T sdmmc_free_ccbs +ffffffff825e3600 T sdmmc_scsi_detach +ffffffff825e3760 T sdmmc_stimeout +ffffffff825e37e0 T sdmmc_ccb_alloc +ffffffff825e3890 T sdmmc_ccb_free +ffffffff825e3970 T sdmmc_inquiry +ffffffff825e3be0 T sdmmc_start_xs +ffffffff825e3cd0 T sdmmc_complete_xs +ffffffff825e3da0 T sdmmc_done_xs +ffffffff825e3df0 T sdmmc_scsi_hibernate_io +ffffffff825e4000 T bwfm_sdio_preinit +ffffffff825e44a0 T bwfm_sdio_txcheck +ffffffff825e44e0 T bwfm_sdio_txdata +ffffffff825e4550 T bwfm_sdio_txctl +ffffffff825e46a0 T bwfm_sdio_buscore_read +ffffffff825e46b0 T bwfm_sdio_buscore_write +ffffffff825e46d0 T bwfm_sdio_buscore_prepare +ffffffff825e4810 T bwfm_sdio_buscore_activate +ffffffff825e4890 T bwfm_sdio_match +ffffffff825e4940 T bwfm_sdio_attach +ffffffff825e4c00 T bwfm_sdio_detach +ffffffff825e4c60 T bwfm_sdio_task +ffffffff825e4dc0 T bwfm_sdio_write_1 +ffffffff825e4df0 T bwfm_sdio_read_1 +ffffffff825e4e20 T bwfm_sdio_write_4 +ffffffff825e4ed0 T bwfm_sdio_read_4 +ffffffff825e4f80 T bwfm_sdio_load_microcode +ffffffff825e51e0 T bwfm_sdio_clkctl +ffffffff825e5310 T bwfm_sdio_dev_write +ffffffff825e5360 T bwfm_sdio_intr +ffffffff825e53a0 T bwfm_sdio_ram_read_write +ffffffff825e55d0 T bwfm_sdio_htclk +ffffffff825e5840 T bwfm_sdio_readshared +ffffffff825e5910 T bwfm_sdio_dev_read +ffffffff825e5950 T bwfm_sdio_rx_frames +ffffffff825e5d00 T bwfm_sdio_tx_frames +ffffffff825e5e00 T bwfm_sdio_backplane +ffffffff825e5eb0 T bwfm_sdio_buf_read +ffffffff825e5f90 T bwfm_sdio_buf_write +ffffffff825e6040 T bwfm_sdio_frame_read_write +ffffffff825e61c0 T bwfm_sdio_newbuf +ffffffff825e6240 T bwfm_sdio_tx_ok +ffffffff825e62a0 T bwfm_sdio_tx_ctrlframe +ffffffff825e63a0 T bwfm_sdio_tx_dataframe +ffffffff825e64f0 T bwfm_sdio_rx_glom +ffffffff825e7000 T onewire_match +ffffffff825e7050 T onewire_attach +ffffffff825e70f0 T onewire_detach +ffffffff825e7160 T onewire_activate +ffffffff825e7180 T onewire_scan +ffffffff825e73a0 T onewire_createthread +ffffffff825e7410 T onewire_print +ffffffff825e74e0 T onewirebus_print +ffffffff825e7530 T onewire_lock +ffffffff825e7550 T onewire_unlock +ffffffff825e7570 T onewire_reset +ffffffff825e7590 T onewire_bit +ffffffff825e75b0 T onewire_read_byte +ffffffff825e76f0 T onewire_write_byte +ffffffff825e77d0 T onewire_read_block +ffffffff825e7870 T onewire_write_block +ffffffff825e7910 T onewire_triplet +ffffffff825e79f0 T onewire_matchrom +ffffffff825e7b40 T onewire_search +ffffffff825e7ee0 T onewire_thread +ffffffff825e8000 T onewire_crc +ffffffff825e80b0 T onewire_crc16 +ffffffff825e8170 T onewire_famname +ffffffff825e81b0 T onewire_matchbyfam +ffffffff825e9000 T owid_match +ffffffff825e9030 T owid_attach +ffffffff825e9100 T owid_detach +ffffffff825e9140 T owid_activate +ffffffff825ea000 T owsbm_match +ffffffff825ea030 T owsbm_attach +ffffffff825ea1d0 T owsbm_detach +ffffffff825ea240 T owsbm_activate +ffffffff825ea270 T owsbm_update +ffffffff825eb000 T owtemp_match +ffffffff825eb030 T owtemp_attach +ffffffff825eb130 T owtemp_detach +ffffffff825eb1a0 T owtemp_activate +ffffffff825eb1d0 T owtemp_update +ffffffff825ec000 T owctr_match +ffffffff825ec030 T owctr_attach +ffffffff825ec180 T owctr_detach +ffffffff825ec1f0 T owctr_activate +ffffffff825ec220 T owctr_update +ffffffff825ec250 T owctr_update_counter +ffffffff825ed000 A __text_page_start +ffffffff825ed000 T Xsyscall_meltdown +ffffffff825ed00c T Xsyscall +ffffffff825ed26e t Xsyscall_trampback +ffffffff825ed280 T intr_user_exit +ffffffff825ed2c2 t intr_user_exit_post_ast +ffffffff825ed3ee t Xiretq_trampback +ffffffff825ed3fa T doreti_iret +ffffffff825ee000 T alltraps +ffffffff825ee138 T recall_trap +ffffffff825ee150 T alltraps_kern +ffffffff825ee153 T alltraps_kern_meltdown +ffffffff825ef000 ? Xsyscall32 +ffffffff825ef000 A __kutext_start +ffffffff825ef000 A __text_page_end +ffffffff825f0000 ? Xtrap00 +ffffffff825f0010 ? Xtrap01 +ffffffff825f0020 ? Xtrap02 +ffffffff825f0028 c calltrap_specstk +ffffffff825f00f0 ? calltrap_specstk_tramp +ffffffff825f0110 ? Xtrap03 +ffffffff825f0120 ? Xtrap04 +ffffffff825f0130 ? Xtrap05 +ffffffff825f0140 ? Xtrap06 +ffffffff825f0150 ? Xtrap07 +ffffffff825f0160 ? Xtrap08 +ffffffff825f0170 ? Xtrap09 +ffffffff825f0180 ? Xtrap0a +ffffffff825f0190 ? Xtrap0b +ffffffff825f01a0 ? Xtrap0c +ffffffff825f01b0 ? Xtrap0d +ffffffff825f0240 ? Xtrap0e +ffffffff825f0250 ? Xintrspurious +ffffffff825f0250 ? Xtrap0f +ffffffff825f0260 ? Xtrap10 +ffffffff825f0270 ? Xtrap11 +ffffffff825f0280 ? Xtrap12 +ffffffff825f0290 ? Xtrap13 +ffffffff825f02a0 ? Xtrap14 +ffffffff825f02b0 ? Xtrap15 +ffffffff825f02c0 ? Xtrap16 +ffffffff825f02c0 ? Xtrap17 +ffffffff825f02c0 ? Xtrap18 +ffffffff825f02c0 ? Xtrap19 +ffffffff825f02c0 ? Xtrap1a +ffffffff825f02c0 ? Xtrap1b +ffffffff825f02c0 ? Xtrap1c +ffffffff825f02c0 ? Xtrap1d +ffffffff825f02c0 ? Xtrap1e +ffffffff825f02c0 ? Xtrap1f +ffffffff825f02d0 ? x2apic_eoi +ffffffff825f02f0 ? Xintr_lapic_ipi +ffffffff825f0330 ? Xipi_invltlb +ffffffff825f0360 ? Xipi_invlpg +ffffffff825f0390 ? Xipi_invlrange +ffffffff825f03d0 ? Xipi_invltlb_pcid +ffffffff825f0410 ? Xipi_invlpg_pcid +ffffffff825f0460 ? Xipi_invlrange_pcid +ffffffff825f04d0 ? Xintr_lapic_ltimer +ffffffff825f0510 ? Xintr_xen_upcall +ffffffff825f0550 ? Xintr_hyperv_upcall +ffffffff825f0590 ? Xintr_legacy0 +ffffffff825f05d0 ? Xintr_legacy1 +ffffffff825f0610 ? Xintr_legacy2 +ffffffff825f0650 ? Xintr_legacy3 +ffffffff825f0690 ? Xintr_legacy4 +ffffffff825f06d0 ? Xintr_legacy5 +ffffffff825f0710 ? Xintr_legacy6 +ffffffff825f0750 ? Xintr_legacy7 +ffffffff825f0790 ? Xintr_legacy8 +ffffffff825f07d0 ? Xintr_legacy9 +ffffffff825f0810 ? Xintr_legacy10 +ffffffff825f0850 ? Xintr_legacy11 +ffffffff825f0890 ? Xintr_legacy12 +ffffffff825f08d0 ? Xintr_legacy13 +ffffffff825f0910 ? Xintr_legacy14 +ffffffff825f0950 ? Xintr_legacy15 +ffffffff825f0990 ? Xintr_ioapic_edge0 +ffffffff825f09d0 ? Xintr_ioapic_edge1 +ffffffff825f0a10 ? Xintr_ioapic_edge2 +ffffffff825f0a50 ? Xintr_ioapic_edge3 +ffffffff825f0a90 ? Xintr_ioapic_edge4 +ffffffff825f0ad0 ? Xintr_ioapic_edge5 +ffffffff825f0b10 ? Xintr_ioapic_edge6 +ffffffff825f0b50 ? Xintr_ioapic_edge7 +ffffffff825f0b90 ? Xintr_ioapic_edge8 +ffffffff825f0bd0 ? Xintr_ioapic_edge9 +ffffffff825f0c10 ? Xintr_ioapic_edge10 +ffffffff825f0c50 ? Xintr_ioapic_edge11 +ffffffff825f0c90 ? Xintr_ioapic_edge12 +ffffffff825f0cd0 ? Xintr_ioapic_edge13 +ffffffff825f0d10 ? Xintr_ioapic_edge14 +ffffffff825f0d50 ? Xintr_ioapic_edge15 +ffffffff825f0d90 ? Xintr_ioapic_edge16 +ffffffff825f0dd0 ? Xintr_ioapic_edge17 +ffffffff825f0e10 ? Xintr_ioapic_edge18 +ffffffff825f0e50 ? Xintr_ioapic_edge19 +ffffffff825f0e90 ? Xintr_ioapic_edge20 +ffffffff825f0ed0 ? Xintr_ioapic_edge21 +ffffffff825f0f10 ? Xintr_ioapic_edge22 +ffffffff825f0f50 ? Xintr_ioapic_edge23 +ffffffff825f0f90 ? Xintr_ioapic_edge24 +ffffffff825f0fd0 ? Xintr_ioapic_edge25 +ffffffff825f1010 ? Xintr_ioapic_edge26 +ffffffff825f1050 ? Xintr_ioapic_edge27 +ffffffff825f1090 ? Xintr_ioapic_edge28 +ffffffff825f10d0 ? Xintr_ioapic_edge29 +ffffffff825f1110 ? Xintr_ioapic_edge30 +ffffffff825f1150 ? Xintr_ioapic_edge31 +ffffffff825f1190 ? Xintr_ioapic_edge32 +ffffffff825f11d0 ? Xintr_ioapic_edge33 +ffffffff825f1210 ? Xintr_ioapic_edge34 +ffffffff825f1250 ? Xintr_ioapic_edge35 +ffffffff825f1290 ? Xintr_ioapic_edge36 +ffffffff825f12d0 ? Xintr_ioapic_edge37 +ffffffff825f1310 ? Xintr_ioapic_edge38 +ffffffff825f1350 ? Xintr_ioapic_edge39 +ffffffff825f1390 ? Xintr_ioapic_edge40 +ffffffff825f13d0 ? Xintr_ioapic_edge41 +ffffffff825f1410 ? Xintr_ioapic_edge42 +ffffffff825f1450 ? Xintr_ioapic_edge43 +ffffffff825f1490 ? Xintr_ioapic_edge44 +ffffffff825f14d0 ? Xintr_ioapic_edge45 +ffffffff825f1510 ? Xintr_ioapic_edge46 +ffffffff825f1550 ? Xintr_ioapic_edge47 +ffffffff825f1590 ? Xintr_ioapic_edge48 +ffffffff825f15d0 ? Xintr_ioapic_edge49 +ffffffff825f1610 ? Xintr_ioapic_edge50 +ffffffff825f1650 ? Xintr_ioapic_edge51 +ffffffff825f1690 ? Xintr_ioapic_edge52 +ffffffff825f16d0 ? Xintr_ioapic_edge53 +ffffffff825f1710 ? Xintr_ioapic_edge54 +ffffffff825f1750 ? Xintr_ioapic_edge55 +ffffffff825f1790 ? Xintr_ioapic_edge56 +ffffffff825f17d0 ? Xintr_ioapic_edge57 +ffffffff825f1810 ? Xintr_ioapic_edge58 +ffffffff825f1850 ? Xintr_ioapic_edge59 +ffffffff825f1890 ? Xintr_ioapic_edge60 +ffffffff825f18d0 ? Xintr_ioapic_edge61 +ffffffff825f1910 ? Xintr_ioapic_edge62 +ffffffff825f1950 ? Xintr_ioapic_edge63 +ffffffff825f1990 ? Xintr_ioapic_level0 +ffffffff825f19d0 ? Xintr_ioapic_level1 +ffffffff825f1a10 ? Xintr_ioapic_level2 +ffffffff825f1a50 ? Xintr_ioapic_level3 +ffffffff825f1a90 ? Xintr_ioapic_level4 +ffffffff825f1ad0 ? Xintr_ioapic_level5 +ffffffff825f1b10 ? Xintr_ioapic_level6 +ffffffff825f1b50 ? Xintr_ioapic_level7 +ffffffff825f1b90 ? Xintr_ioapic_level8 +ffffffff825f1bd0 ? Xintr_ioapic_level9 +ffffffff825f1c10 ? Xintr_ioapic_level10 +ffffffff825f1c50 ? Xintr_ioapic_level11 +ffffffff825f1c90 ? Xintr_ioapic_level12 +ffffffff825f1cd0 ? Xintr_ioapic_level13 +ffffffff825f1d10 ? Xintr_ioapic_level14 +ffffffff825f1d50 ? Xintr_ioapic_level15 +ffffffff825f1d90 ? Xintr_ioapic_level16 +ffffffff825f1dd0 ? Xintr_ioapic_level17 +ffffffff825f1e10 ? Xintr_ioapic_level18 +ffffffff825f1e50 ? Xintr_ioapic_level19 +ffffffff825f1e90 ? Xintr_ioapic_level20 +ffffffff825f1ed0 ? Xintr_ioapic_level21 +ffffffff825f1f10 ? Xintr_ioapic_level22 +ffffffff825f1f50 ? Xintr_ioapic_level23 +ffffffff825f1f90 ? Xintr_ioapic_level24 +ffffffff825f1fd0 ? Xintr_ioapic_level25 +ffffffff825f2010 ? Xintr_ioapic_level26 +ffffffff825f2050 ? Xintr_ioapic_level27 +ffffffff825f2090 ? Xintr_ioapic_level28 +ffffffff825f20d0 ? Xintr_ioapic_level29 +ffffffff825f2110 ? Xintr_ioapic_level30 +ffffffff825f2150 ? Xintr_ioapic_level31 +ffffffff825f2190 ? Xintr_ioapic_level32 +ffffffff825f21d0 ? Xintr_ioapic_level33 +ffffffff825f2210 ? Xintr_ioapic_level34 +ffffffff825f2250 ? Xintr_ioapic_level35 +ffffffff825f2290 ? Xintr_ioapic_level36 +ffffffff825f22d0 ? Xintr_ioapic_level37 +ffffffff825f2310 ? Xintr_ioapic_level38 +ffffffff825f2350 ? Xintr_ioapic_level39 +ffffffff825f2390 ? Xintr_ioapic_level40 +ffffffff825f23d0 ? Xintr_ioapic_level41 +ffffffff825f2410 ? Xintr_ioapic_level42 +ffffffff825f2450 ? Xintr_ioapic_level43 +ffffffff825f2490 ? Xintr_ioapic_level44 +ffffffff825f24d0 ? Xintr_ioapic_level45 +ffffffff825f2510 ? Xintr_ioapic_level46 +ffffffff825f2550 ? Xintr_ioapic_level47 +ffffffff825f2590 ? Xintr_ioapic_level48 +ffffffff825f25d0 ? Xintr_ioapic_level49 +ffffffff825f2610 ? Xintr_ioapic_level50 +ffffffff825f2650 ? Xintr_ioapic_level51 +ffffffff825f2690 ? Xintr_ioapic_level52 +ffffffff825f26d0 ? Xintr_ioapic_level53 +ffffffff825f2710 ? Xintr_ioapic_level54 +ffffffff825f2750 ? Xintr_ioapic_level55 +ffffffff825f2790 ? Xintr_ioapic_level56 +ffffffff825f27d0 ? Xintr_ioapic_level57 +ffffffff825f2810 ? Xintr_ioapic_level58 +ffffffff825f2850 ? Xintr_ioapic_level59 +ffffffff825f2890 ? Xintr_ioapic_level60 +ffffffff825f28d0 ? Xintr_ioapic_level61 +ffffffff825f2910 ? Xintr_ioapic_level62 +ffffffff825f2950 ? Xintr_ioapic_level63 +ffffffff825f3000 ? codepatch_fill_nop +ffffffff825f3000 A __cptext_start +ffffffff825f3000 A __kutext_end +ffffffff825f30b0 ? codepatch_maprw +ffffffff825f3190 ? codepatch_unmaprw +ffffffff825f3200 ? codepatch_nop +ffffffff825f3360 ? codepatch_replace +ffffffff825f3510 ? codepatch_call +ffffffff825f3530 ? codepatch_control_flow +ffffffff825f3740 ? codepatch_jmp +ffffffff825f4000 A __cptext_end +ffffffff825f4000 A __rodata_start +ffffffff825f4000 C _etext +ffffffff825f4000 C etext +ffffffff825f5000 r seeprom_read +ffffffff825f5004 r icl_mg_pll_find_divisors.div1_vals +ffffffff825f5034 r athn_ac2qid +ffffffff825f5034 r athn_ac2qid +ffffffff825f5034 r athn_ac2qid +ffffffff825f5040 r rtwn_get_rssi.cckoff +ffffffff825f5068 r rsu_ac2qid +ffffffff825f5078 r pckbc_portcmd +ffffffff825f507c r tht_fifo_write_pad.pad +ffffffff825f5084 r rsu_get_rssi.cckoff +ffffffff825f50a4 r adlp_n_revids +ffffffff825f50e8 r apple_iso_trans +ffffffff825f50f0 r wihap_check_tx.txratetable +ffffffff825f50f4 r dmamode +ffffffff825f5118 r gen9_edram_size_mb.sets +ffffffff825f512c r dg2_g12_revid_step_tbl +ffffffff825f6000 r isomappings +ffffffff825f6080 r unimappings +ffffffff825f6230 r replacements +ffffffff825f98c5 r apollo_pio_rec +ffffffff82645a33 r apollo_udma33_tim +ffffffff8265aaea r pp_r600_decoded_lanes +ffffffff82690763 r cmd680_setup_channel.udma_tbl +ffffffff82698b1b r apollo_udma100_tim +ffffffff82698b21 r cmd0646_9_tim_udma +ffffffff826a6f11 r substchar +ffffffff826fc450 r apollo_udma133_tim +ffffffff826fc457 r apollo_udma66_tim +ffffffff826fc481 r cy_pio_rec +ffffffff82701be0 R drm_ca +ffffffff82701c08 R drm_filtops +ffffffff82701c38 R drmread_filtops +ffffffff82702000 r vga_emulops +ffffffff82702048 R vga_stdscreen +ffffffff82702078 R vga_stdscreen_mono +ffffffff827020a8 R vga_stdscreen_bf +ffffffff827020d8 R vga_40lscreen +ffffffff82702108 R vga_40lscreen_mono +ffffffff82702138 R vga_40lscreen_bf +ffffffff82702168 R vga_50lscreen +ffffffff82702198 R vga_50lscreen_mono +ffffffff827021c8 R vga_50lscreen_bf +ffffffff827021f8 R vga_screenlist +ffffffff82702208 R vga_screenlist_mono +ffffffff82702218 R vga_accessops +ffffffff82702278 r i945_wm_info +ffffffff827022b8 r bgansitopc +ffffffff827022c0 r pctoansi +ffffffff82702300 r sdma_offsets +ffffffff82702300 r sdma_offsets +ffffffff82702338 r iha_rate_tbl +ffffffff82702370 r i830_a_wm_info +ffffffff827023a8 r gen9_edram_size_mb.ways +ffffffff82702408 r aggr_periodic_times +ffffffff82702500 r michael_final.pad +ffffffff82702528 r rt_copysa.maskarray +ffffffff82702530 r i915_wm_info +ffffffff82702538 r amdgpu_ih_clientid_jpeg +ffffffff82702538 r amdgpu_ih_clientid_uvds +ffffffff82702538 r amdgpu_ih_clientid_vcns +ffffffff82702538 r amdgpu_ih_clientid_vcns +ffffffff82702538 r amdgpu_ih_clientid_vcns +ffffffff82702568 r jsl_ehl_revids +ffffffff82702578 r vga_setfontset.cmaptabb +ffffffff827025e8 r i830_bc_wm_info +ffffffff82702650 r hsw_activate_psr2.map +ffffffff82702658 r tgl_revids +ffffffff82702690 r __drm_universal_plane_init.default_modifiers +ffffffff827026a0 r iwn_tid2fifo +ffffffff827026b8 r vga_setfontset.cmaptaba +ffffffff827026c0 r crtc_offsets +ffffffff827026c0 r crtc_offsets +ffffffff827026c0 r crtc_offsets +ffffffff82702768 r rtwn_r88e_get_rssi.cckoff +ffffffff82703000 R edid_vendors +ffffffff827032c0 R edid_nvendors +ffffffff827032d0 R edid_products +ffffffff82703330 R edid_nproducts +ffffffff82703340 r _edid_modes +ffffffff82704000 R videomode_list +ffffffff82705080 R videomode_count +ffffffff82706000 r ahc_hard_errors +ffffffff82706080 r critical_sections +ffffffff827060b0 r patches +ffffffff82706d50 r seqprog +ffffffff82708000 r ahc_switch +ffffffff82709000 r termstat_strings +ffffffff82709020 r critical_sections +ffffffff82709060 r seqprog +ffffffff82709d50 r patches +ffffffff8270b000 r ahd_switch +ffffffff8270c000 R aic_switch +ffffffff8270d000 R adw_switch +ffffffff8270e000 R gdt_switch +ffffffff8270f000 R twe_switch +ffffffff82710000 R ciss_switch +ffffffff82710030 R ciss_level +ffffffff82710050 R ciss_stat +ffffffff82711000 R ami_switch +ffffffff82711028 R ami_raw_switch +ffffffff82712000 R mfi_switch +ffffffff82712028 R mfi_pd_switch +ffffffff82712050 r mfi_iop_xscale +ffffffff82712080 r mfi_iop_ppc +ffffffff827120b0 r mfi_iop_gen2 +ffffffff827120e0 r mfi_iop_skinny +ffffffff82712110 r mfi_bbu_indicators +ffffffff82713000 R qlw_switch +ffffffff82714000 R isp_2100_risc_code +ffffffff82726bf0 R isp_2200_risc_code +ffffffff82739990 R isp_2300_risc_code +ffffffff82753408 R qla_switch +ffffffff82753430 r qla_regs_2100 +ffffffff82753460 r qla_regs_2200 +ffffffff82753490 r qla_regs_23XX +ffffffff82754000 R ahci_atascsi_methods +ffffffff82755000 R nvme_switch +ffffffff82755028 r nvme_ops +ffffffff82756000 R mpi_switch +ffffffff82756060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff82756090 r chv_oa_mux_regs +ffffffff827560b0 r fiji_clock_stretcher_lookup_table +ffffffff827560b0 r tonga_clock_stretcher_lookup_table +ffffffff827560d0 r iosf_pci_devices +ffffffff827560f0 r link_speed +ffffffff827560f0 r link_speed +ffffffff82756130 r drm_fb_xfrm.default_dst_pitch +ffffffff82756130 r non_supported_protection +ffffffff82756140 r tgl_uy_revids +ffffffff827562a0 r bwi_phy_noise_11g_rev1 +ffffffff82756310 r cardslot_process_event.antonym_ev +ffffffff827563a0 r gen11_oa_mux_regs +ffffffff82756440 r dpia_to_preferred_enc_id_table +ffffffff827564b0 r ddr2_cycle_tenths +ffffffff82756520 r rtw_intr_rx.ratetbl +ffffffff827565a0 r abm_config +ffffffff82756620 r getbootinfo.ports +ffffffff82756670 r reg_offsets +ffffffff82756680 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff82756690 r glk_revids +ffffffff827566a0 r init_non_clock_fields.look_up +ffffffff827566b0 r uftdi_8u232am_getrate.roundoff +ffffffff82756710 r zyd_rx_data.rates +ffffffff82756730 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff82756760 r intel_engine_init_tlb_invalidation.gen8_regs +ffffffff82756790 r bwi_phy_noise_11g +ffffffff827567a0 r hpt366_pio +ffffffff82756800 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff82756820 r ether_crc32_be_update.rev +ffffffff82756820 r rtw_grf5101_mac_crypt.caesar +ffffffff82756870 r snb_b_fdi_train_param +ffffffff82756940 r intel_hpll_vco.elk_vco +ffffffff82756960 r icl_revids +ffffffff827569c0 r pin_offsets +ffffffff827569e0 r amdgpu_ih_srcid_jpeg +ffffffff82756a20 r firmware_list +ffffffff82756a80 r atom_arg_shift +ffffffff82756a80 r atom_arg_shift +ffffffff82756ac0 r pf_syncookie_wstab +ffffffff82756ae0 r ieee80211_media_init.mopts +ffffffff82756b40 r add_entropy_words.twist_table +ffffffff82756be0 r urtw_8225v2_txpwr_cck +ffffffff82756c00 r bwfm_pci_prio2fifo +ffffffff82756c00 r ieee80211_up_to_ac.up_to_ac +ffffffff82756cc0 r paritytab +ffffffff82756cc0 r x86emu_parity_tab +ffffffff82756ce0 r legacy_connector_convert +ffffffff82756d20 r gen7_oa_mux_regs +ffffffff82756d40 r hsw_oa_mux_regs +ffffffff82756d60 r notetab +ffffffff82756d80 r urtw_8225v2_txpwr_cck_ch14 +ffffffff82756da0 r bwi_rf_calibval.rf_calibvals +ffffffff82756e40 r pf_syncookie_msstab +ffffffff82756ea0 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff82756f00 r uath_wme_init.uath_wme_11g +ffffffff82756f40 r gen7_oa_b_counters +ffffffff82757140 r rtwn_iq_calib_run.reg_adda +ffffffff82757180 r atom_def_dst +ffffffff82757180 r atom_def_dst +ffffffff827571c0 r sha256_initial_hash_value +ffffffff82757220 r otus_edca_def +ffffffff82757240 r intel_hpll_vco.blb_vco +ffffffff82757320 r epic_pci_subsys_info +ffffffff82757340 r kbl_revids +ffffffff82757360 r atom_arg_mask +ffffffff82757360 r atom_arg_mask +ffffffff827573c0 r butmap +ffffffff82757400 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff82757440 r comsoft.lsrmap +ffffffff82757480 r xgmi3x16_pcs_err_noncorrectable_mask_reg_aldebaran +ffffffff827574a0 r tulip_mii_phy_readspecific.table +ffffffff82757540 r intel_hpll_vco.pnv_vco +ffffffff827575a0 r dmapageport +ffffffff82757660 r intel_hpll_vco.ctg_vco +ffffffff82757720 r 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ar9280_2_0_rx_gain_13db_backoff +ffffffff8277a0c0 r ar9280_2_0_rx_gain +ffffffff8277a0e0 r ar9280_2_0_tx_gain_high_power +ffffffff8277a100 r ar9280_2_0_tx_gain +ffffffff8277a120 r ar9280_init_from_rom.chainoffset +ffffffff8277a130 r ar9280_2_0_regs +ffffffff8277a190 r ar9280_2_0_vals_5g20 +ffffffff8277a250 r ar9280_2_0_vals_5g40 +ffffffff8277a310 r ar9280_2_0_vals_2g40 +ffffffff8277a3d0 r ar9280_2_0_vals_2g20 +ffffffff8277a490 r ar9280_2_0_cm_regs +ffffffff8277a740 r ar9280_2_0_cm_vals +ffffffff8277ac90 r ar9280_2_0_fast_clock_regs +ffffffff8277acb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff8277acf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff8277ad30 r ar9280_2_0_serdes_regs +ffffffff8277ad60 r ar9280_2_0_serdes_vals +ffffffff8277ad90 r ar9280_2_0_rx_gain_regs +ffffffff8277aea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff8277b0b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff8277b2c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff8277b4d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g +ffffffff8277b6e0 r ar9280_2_0_rx_gain_vals_5g +ffffffff8277b8f0 r ar9280_2_0_rx_gain_vals_2g +ffffffff8277bb00 r ar9280_2_0_tx_gain_regs +ffffffff8277bb40 r ar9280_2_0_tx_gain_high_power_vals_5g +ffffffff8277bbc0 r ar9280_2_0_tx_gain_high_power_vals_2g +ffffffff8277bc40 r ar9280_2_0_tx_gain_vals_5g +ffffffff8277bcc0 r ar9280_2_0_tx_gain_vals_2g +ffffffff8277c000 r ar9271_ini +ffffffff8277c068 r ar9285_1_2_ini +ffffffff8277c0d0 r ar9280_2_0_serdes +ffffffff8277c0e8 r ar9271_tx_gain_high_power +ffffffff8277c108 r ar9271_tx_gain +ffffffff8277c128 r ar9285_2_0_tx_gain_high_power +ffffffff8277c148 r ar9285_2_0_tx_gain +ffffffff8277c168 r ar9285_1_2_tx_gain_high_power +ffffffff8277c188 r ar9285_1_2_tx_gain +ffffffff8277c1b0 r ar9271_regs +ffffffff8277c410 r ar9271_vals_2g40 +ffffffff8277c8d0 r ar9271_vals_2g20 +ffffffff8277cd90 r ar9271_cm_regs +ffffffff8277d020 r ar9271_cm_vals +ffffffff8277d540 r ar9285_1_2_regs +ffffffff8277d7a0 r ar9285_1_2_vals_2g40 +ffffffff8277dc60 r ar9285_1_2_vals_2g20 +ffffffff8277e120 r ar9285_1_2_cm_regs +ffffffff8277e3a0 r ar9285_1_2_cm_vals +ffffffff8277e890 r ar9280_2_0_serdes_regs +ffffffff8277e8c0 r ar9280_2_0_serdes_vals +ffffffff8277e8f0 r ar9271_tx_gain_regs +ffffffff8277e940 r ar9271_tx_gain_high_power_vals_2g +ffffffff8277e9d0 r ar9271_tx_gain_vals_2g +ffffffff8277ea60 r ar9285_1_2_tx_gain_regs +ffffffff8277eab0 r ar9285_2_0_tx_gain_high_power_vals_2g +ffffffff8277eb50 r ar9285_2_0_tx_gain_vals_2g +ffffffff8277ebf0 r ar9285_1_2_tx_gain_high_power_vals_2g +ffffffff8277ec90 r ar9285_1_2_tx_gain_vals_2g +ffffffff8277f000 r ar9287_1_1_ini +ffffffff8277f068 r ar9280_2_0_serdes +ffffffff8277f080 r ar9287_1_1_rx_gain +ffffffff8277f0a0 r ar9287_1_1_tx_gain +ffffffff8277f0c0 r ar9287_1_1_regs +ffffffff8277f120 r ar9287_1_1_vals_2g40 +ffffffff8277f1d0 r ar9287_1_1_vals_2g20 +ffffffff8277f280 r ar9287_1_1_cm_regs +ffffffff8277f560 r ar9287_1_1_cm_vals +ffffffff8277fb20 r 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ar9485_1_1_serdes_regs +ffffffff82782d0c r ar9485_1_1_serdes_vals +ffffffff82782d20 r ar9380_2_2_regs +ffffffff82782db0 r ar9380_2_2_vals_5g20 +ffffffff82782ed0 r ar9380_2_2_vals_5g40 +ffffffff82782ff0 r ar9380_2_2_vals_2g40 +ffffffff82783110 r ar9380_2_2_vals_2g20 +ffffffff82783230 r ar9380_2_2_cm_regs +ffffffff827835d0 r ar9380_2_2_cm_vals +ffffffff82783d00 r ar9380_2_2_fast_clock_regs +ffffffff82783d20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff82783d50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff82783d74 r ar9380_2_2_serdes_regs +ffffffff82783d80 r ar9380_2_2_serdes_vals +ffffffff82783d90 r ar9380_2_2_rx_gain_regs +ffffffff82783f90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff82784390 r ar9380_2_2_rx_gain_vals +ffffffff82784790 r ar9485_1_1_rx_gain_regs +ffffffff82784890 r ar9485_1_1_rx_gain_vals +ffffffff82784a90 r ar9380_2_2_tx_gain_regs +ffffffff82784b60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff82784d00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff82784ea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff82785040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff827851e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff82785380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff82785520 r ar9380_2_2_tx_gain_vals_5g +ffffffff827856c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff82785860 r ar9485_1_1_tx_gain_regs +ffffffff827858f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff82785a10 r ar9380_def_rom +ffffffff82785e50 r ar9380_def_rom_h112 +ffffffff82786290 r ar9380_def_rom_h116 +ffffffff827866d0 r ar9380_def_rom_x112 +ffffffff82786b10 r ar9380_def_rom_x113 +ffffffff82787000 R atw_txthresh_tab_lo +ffffffff82787050 R atw_txthresh_tab_hi +ffffffff827870a0 r atw_attach.empty_macaddr +ffffffff827870b0 r atw_attach.type_strings +ffffffff827870d0 r atw_rfmd2958_ifn +ffffffff82787110 r atw_rfmd2958_rf1r +ffffffff82787150 r atw_rxintr.rate_tbl +ffffffff82788000 r rtw_identify_sta.empty_macaddr +ffffffff82789000 r rtwn_set_key.etherzeroaddr +ffffffff82789010 r rtl8188eu_rf_prog +ffffffff82789030 r rtl8188ftv_rf_prog +ffffffff82789050 r rtl8192e_rf_prog +ffffffff82789080 r rtl8188ce_rf_prog +ffffffff827890a0 r rtl8188ru_rf_prog +ffffffff827890c0 r rtl8188cu_rf_prog +ffffffff827890e0 r rtl8192ce_rf_prog +ffffffff82789110 r rtl8188ru_txagc +ffffffff82789170 r rtl8188eu_rf_regs +ffffffff82789230 r rtl8188eu_rf_vals +ffffffff827893b0 r rtl8188ftv_rf_regs +ffffffff82789490 r rtl8188ftv_rf_vals +ffffffff82789640 r rtl8192e_rf_regs +ffffffff82789710 r rtl8192e_rf_vals +ffffffff827898b0 r rtl8192e_rf2_regs +ffffffff82789950 r rtl8192e_rf2_vals +ffffffff82789a90 r rtl8192ce_rf1_regs +ffffffff82789bb0 r rtl8188ce_rf_vals +ffffffff82789df0 r rtl8188ru_rf_vals +ffffffff8278a030 r rtl8188cu_rf_vals +ffffffff8278a270 r rtl8192ce_rf1_vals +ffffffff8278a4b0 r rtl8192ce_rf2_regs +ffffffff8278a500 r rtl8192ce_rf2_vals +ffffffff8278a5a0 r rtl8192cu_txagc +ffffffff8278b000 r rt2560_rf2522_r2 +ffffffff8278b040 r rt2560_rf2524_r2 +ffffffff8278b080 r rt2560_rf2525_hi_r2 +ffffffff8278b0c0 r rt2560_rf2525_r2 +ffffffff8278b100 r rt2560_rf2525e_r2 +ffffffff8278b140 r rt2560_rf2526_hi_r2 +ffffffff8278b180 r rt2560_rf2526_r2 +ffffffff8278b1c0 r rt2560_def_bbp +ffffffff8278b200 r rt2560_def_mac +ffffffff8278c000 r rt2661_rf5225_1 +ffffffff8278c300 r rt2661_rf5225_2 +ffffffff8278c600 r rt2661_def_bbp +ffffffff8278c640 r rt2661_def_mac +ffffffff8278d000 r rt2860_rf2850 +ffffffff8278d430 r rt2860_rates +ffffffff8278d4f0 r rt3572_def_rf +ffffffff8278d530 r rt3090_def_rf +ffffffff8278d560 r rt5392_def_rf +ffffffff8278d5e0 r rt3290_def_rf +ffffffff8278d640 r rt5390_def_rf +ffffffff8278d6c0 r rt5390_def_bbp +ffffffff8278d6f0 r rt2860_def_mac +ffffffff8278f000 r acx111_reg +ffffffff8278f040 r acx111_rate_map +ffffffff82790000 r acx100_reg +ffffffff82790040 r acx100_txpower_rfmd +ffffffff82790060 r gen8_rcs_offsets +ffffffff82790090 r acx100_txpower_maxim +ffffffff827900b0 r mtl_rcs_offsets +ffffffff827900f0 r digits +ffffffff827900f0 r pppdumpb.digits +ffffffff827900f0 r pppdumpm.digits +ffffffff82790140 r hangpic +ffffffff82790180 r gen11_rcs_offsets +ffffffff827901b0 r xehp_rcs_offsets +ffffffff827901e0 r dg2_rcs_offsets +ffffffff82790220 r dg2_xcs_offsets +ffffffff82790250 r gen12_xcs_offsets +ffffffff82791000 r trinity_override_mgpg_sequences +ffffffff827913c0 r voltage_swing_to_pre_emphasis +ffffffff827913d0 r sgpr_init_compute_shader +ffffffff827914a0 r intel_hpll_vco.cl_vco +ffffffff827914c0 r vgpr_init_compute_shader +ffffffff82792000 r malo_cmd_string.cmds +ffffffff827920b0 r malo_cmd_string_result.results +ffffffff82793000 R bwi_vendor_led_act +ffffffff8279300c R bwi_default_led_act +ffffffff82793010 R bwi_led_duration +ffffffff82793380 r bwi_sup_bphy +ffffffff827933c0 r bwi_phy_freq_11g_rev1 +ffffffff827935c0 r bwi_phy_rotor_11g_rev1 +ffffffff827936a0 r bwi_phy_noise_scale_11g_rev2 +ffffffff827936e0 r bwi_phy_noise_scale_11g_rev7 +ffffffff82793720 r bwi_phy_noise_scale_11g +ffffffff82793760 r bwi_phy_sigma_sq_11g_rev2 +ffffffff827937d0 r bwi_phy_sigma_sq_11g_rev7 +ffffffff82793840 r bwi_phy_delay_11g_rev1 +ffffffff82793920 r bwi_rf_get_gains.save_phy_regs +ffffffff82793940 r bwi_rf_lo_find.map +ffffffff82793960 r bwi_txpower_map_11b +ffffffff827939a0 r bwi_txpower_map_11g +ffffffff827939e0 r _bwi_rf_lo_update_11g.rf_atten_list +ffffffff82793a20 r _bwi_rf_lo_update_11g.rf_atten_init_list +ffffffff82793a60 r _bwi_rf_lo_update_11g.rf_lo_measure_order +ffffffff82793aa0 r bwi_rf_set_nrssi_ofs_11g.save_phy_comm_regs +ffffffff82793ac0 r bwi_bbpid_map +ffffffff82793af0 r bwi_regwin_count +ffffffff82793b40 r bwi_clkfreq +ffffffff82793b58 r bwi_zero_addr +ffffffff82794000 R uhci_bus_methods +ffffffff82794030 R uhci_root_ctrl_methods +ffffffff82794060 R uhci_root_intr_methods +ffffffff82794090 R uhci_device_ctrl_methods +ffffffff827940c0 R uhci_device_intr_methods +ffffffff827940f0 R uhci_device_bulk_methods +ffffffff82794120 R uhci_device_isoc_methods +ffffffff82794150 R uhci_devd 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ehci_confd +ffffffff82796175 R ehci_ifcd +ffffffff8279617e R ehci_endpd +ffffffff82796185 R ehci_hubd +ffffffff82797000 R xhci_bus_methods +ffffffff82797030 R xhci_root_ctrl_methods +ffffffff82797060 R xhci_root_intr_methods +ffffffff82797090 R xhci_device_ctrl_methods +ffffffff827970c0 R xhci_device_intr_methods +ffffffff827970f0 R xhci_device_bulk_methods +ffffffff82797120 R xhci_device_isoc_methods +ffffffff82797150 R xhci_devd +ffffffff82797162 R xhci_confd +ffffffff8279716b R xhci_ifcd +ffffffff82797174 R xhci_endpd +ffffffff8279717b R xhci_endpcd +ffffffff82797181 R xhci_hubd +ffffffff8279a000 R radio_ca +ffffffff8279b000 R ipmi_ca +ffffffff8279c000 R vscsi_ca +ffffffff8279c028 R vscsi_switch +ffffffff8279c050 R vscsi_filtops +ffffffff8279d000 R mpath_ca +ffffffff8279d028 R mpath_switch +ffffffff8279e000 R softraid_ca +ffffffff8279e028 R sr_switch +ffffffff8279f000 r spdmem_basic_types +ffffffff8279f0a0 r spdmem_parity_types +ffffffff8279f0e0 r spdmem_ddr4_decode.ddr4_chipsize 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lintomulaw +ffffffff827b0000 R randomread_filtops +ffffffff827b0030 R randomwrite_filtops +ffffffff827b1000 R video_ca +ffffffff827b1028 R video_filtops +ffffffff827b2000 R cd9660_vfsops +ffffffff827b3000 R cd9660_vops +ffffffff827b3110 R cd9660_specvops +ffffffff827b3220 R cd9660_fifovops +ffffffff827b3330 R cd9660read_filtops +ffffffff827b3360 R cd9660write_filtops +ffffffff827b3390 R cd9660vnode_filtops +ffffffff827b4000 R udf_vfsops +ffffffff827b5000 R udf_vops +ffffffff827b5110 r mon_lens +ffffffff827b6000 r month_days +ffffffff827b7000 R execsw +ffffffff827b8000 r shstrtab +ffffffff827b9000 R copyright +ffffffff827b90c0 r initpaths +ffffffff827ba000 R sysent +ffffffff827bc000 R bufq_impls +ffffffff827bd000 R kqueueops +ffffffff827bd038 R kqread_filtops +ffffffff827bd068 R proc_filtops +ffffffff827bd098 R file_filtops +ffffffff827bd0c8 R timer_filtops +ffffffff827bd100 R sysfilt_ops +ffffffff827bd148 R seltrue_filtops +ffffffff827bd178 R dead_filtops +ffffffff827bd1a8 R badfd_filtops +ffffffff827bd1d8 r mutex_klistops +ffffffff827bd1f0 r rwlock_klistops +ffffffff827be000 R kv_exec +ffffffff827bf000 R addrmask +ffffffff827c0000 r rw_ops +ffffffff827c1000 r proc_printit.pstat +ffffffff827c2000 R pledge_syscalls +ffffffff827c2a60 r pledgenames +ffffffff827c2cb0 r pledgereq +ffffffff827c3000 r unvname_rbt_RBT_INFO +ffffffff827c3018 R unvname_rbt_RBT_TYPE +ffffffff827c4000 R sig_filtops +ffffffff827c4030 R sigprop +ffffffff827c5000 R kern_vars +ffffffff827c52f0 R hw_vars +ffffffff827c6000 R tc_vars +ffffffff827c7000 r sys_gettimeofday.zerotz +ffffffff827c8000 r taskq_sys_name +ffffffff827c8006 r taskq_sys_mp_name +ffffffff827c8010 R systq +ffffffff827c8018 R systqmp +ffffffff827ca000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff827ca010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff827ca020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff827ca030 r gpt_get_fstype.gpt_uuid_linux +ffffffff827ca040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff827ca050 r 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eb_tree_RBT_TYPE +ffffffff827f3000 r veb_etherbridge_ops +ffffffff827f3028 r veb_pf_ipv4 +ffffffff827f3040 r veb_pf_ipv6 +ffffffff827f4000 r pipex_pppoe_padding +ffffffff827f5000 r rn_addmask.normal_chars +ffffffff827f6000 R route_src +ffffffff827f6010 R route_usrreqs +ffffffff827f60b8 R routedomain +ffffffff827f6100 R routesw +ffffffff827f7000 R gre_vars +ffffffff827f7030 r mgre_tree_RBT_INFO +ffffffff827f7048 R mgre_tree_RBT_TYPE +ffffffff827f7050 r egre_tree_RBT_INFO +ffffffff827f7068 R egre_tree_RBT_TYPE +ffffffff827f7070 r nvgre_ucast_tree_RBT_INFO +ffffffff827f7088 R nvgre_ucast_tree_RBT_TYPE +ffffffff827f7090 r nvgre_mcast_tree_RBT_INFO +ffffffff827f70a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff827f70b0 r eoip_tree_RBT_INFO +ffffffff827f70c8 R eoip_tree_RBT_TYPE +ffffffff827f70d0 r nvgre_etherbridge_ops +ffffffff827f8000 r trunk_protos +ffffffff827f9000 R ethermulticastaddr_slowprotocols +ffffffff827f9006 R lacp_info_tlv_template +ffffffff827f900e R marker_info_tlv_template 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ufsvnode_filtops +ffffffff82839000 R ext2fs_vfsops +ffffffff82839070 r incompat +ffffffff8283a000 R ext2fs_vops +ffffffff8283a110 R ext2fs_specvops +ffffffff8283a220 R ext2fs_fifovops +ffffffff8283b000 R uaddr_kernel_functions +ffffffff8283b030 R uaddr_rnd_functions +ffffffff8283b060 R uaddr_bestfit_functions +ffffffff8283b090 R uaddr_pivot_functions +ffffffff8283b0c0 R uaddr_stack_brk_functions +ffffffff8283b0f0 r uaddr_free_rbtree_RBT_INFO +ffffffff8283b108 R uaddr_free_rbtree_RBT_TYPE +ffffffff8283c000 R aobj_pager +ffffffff8283d000 R uvm_deviceops +ffffffff8283e000 R kv_any +ffffffff8283e018 R kv_intrsafe +ffffffff8283e030 R kv_page +ffffffff8283e048 R kp_dirty +ffffffff8283e070 R kp_dma +ffffffff8283e098 R kp_dma_contig +ffffffff8283e0c0 R kp_dma_zero +ffffffff8283e0e8 R kp_zero +ffffffff8283e110 R kp_pageable +ffffffff8283e138 R kp_none +ffffffff8283e160 R kd_waitok +ffffffff8283e178 R kd_nowait +ffffffff8283e190 R kd_trylock +ffffffff8283f000 R vmmapbsy +ffffffff8283f010 r page_flagbits +ffffffff8283f0a8 r uvm_map_addr_RBT_INFO +ffffffff8283f0c0 R uvm_map_addr_RBT_TYPE +ffffffff82840000 R pmap_pager +ffffffff82840048 R bufcache_pager +ffffffff82841000 r uvm_objtree_RBT_INFO +ffffffff82841018 R uvm_objtree_RBT_TYPE +ffffffff82842000 r uvm_pmr_addr_RBT_INFO +ffffffff82842018 R uvm_pmr_addr_RBT_TYPE +ffffffff82842020 r uvm_pmr_size_RBT_INFO +ffffffff82842038 R uvm_pmr_size_RBT_TYPE +ffffffff82842040 r uvm_pmemrange_addr_RBT_INFO +ffffffff82842058 R uvm_pmemrange_addr_RBT_TYPE +ffffffff82843000 R uvm_vnodeops +ffffffff82843048 r uvn_flush.interval +ffffffff82844000 R zeroin6_addr +ffffffff82845000 R in6addr_any +ffffffff82845010 R in6addr_loopback +ffffffff82845020 R in6addr_intfacelocal_allnodes +ffffffff82845030 R in6addr_linklocal_allnodes +ffffffff82845040 R in6addr_linklocal_allrouters +ffffffff82845050 R in6mask0 +ffffffff82845060 R in6mask32 +ffffffff82845070 R in6mask64 +ffffffff82845080 R in6mask96 +ffffffff82845090 R in6mask128 +ffffffff828450a0 R sa6_any +ffffffff82846000 R divert6ctl_vars +ffffffff82846030 R divert6_usrreqs +ffffffff82847000 R inet6domain +ffffffff82847050 R inet6sw +ffffffff82848000 R icmpv6ctl_vars +ffffffff82849000 R inet6ctlerrmap +ffffffff82849020 R ipv6ctl_vars +ffffffff8284a000 R rip6_usrreqs +ffffffff8284b000 R pfkey_addr +ffffffff8284b010 R pfkeyv2_usrreqs +ffffffff8284b0b8 R pfkeydomain +ffffffff8284b100 R pfkeysw +ffffffff8284b160 r ealgs +ffffffff8284b190 r aalgs +ffffffff8284b1c0 r calgs +ffffffff8284c000 R sadb_exts_allowed_out +ffffffff8284c090 R sadb_exts_required_out +ffffffff8284e000 r opc82_byte_operation +ffffffff8284e040 r opc83_long_operation +ffffffff8284e080 r opc83_word_operation +ffffffff8284e0c0 r opcD0_byte_operation +ffffffff8284e100 r opcD1_long_operation +ffffffff8284e140 r opcD1_word_operation +ffffffff8284f000 r crc_table +ffffffff8284f400 r crc_braid_table +ffffffff82851400 r x2n_table +ffffffff82852000 r inflateBack.order ffffffff82852030 r fixedtables.lenfix ffffffff82852830 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nvme_msi_blacklist +ffffffff828f0000 R ami_pci_ca +ffffffff828f0030 r ami_pci_subsys +ffffffff828f0270 r ami_pci_vendors +ffffffff828f1000 R mfi_pci_ca +ffffffff828f1030 r mfi_pci_devices +ffffffff828f2000 R mfii_ca +ffffffff828f2028 R mfii_switch +ffffffff828f2050 R mfii_pd_switch +ffffffff828f2078 R mfii_iop_thunderbolt +ffffffff828f2088 R mfii_iop_25 +ffffffff828f2098 R mfii_iop_35 +ffffffff828f20b0 R mfii_devices +ffffffff828f2180 r mfi_bbu_indicators +ffffffff828f3000 R ips_ca +ffffffff828f3028 r ips_ids +ffffffff828f3040 r ips_chips +ffffffff828f3090 r ips_names +ffffffff828f3128 r ips_switch +ffffffff828f3150 r ips_pt_switch +ffffffff828f4000 R eap_ca +ffffffff828f4028 R eap1370_hw_if +ffffffff828f40e0 R eap1371_hw_if +ffffffff828f4198 R eap_midi_hw_if +ffffffff828f41d0 R eap_devices +ffffffff828f5000 R auacer_pci_devices +ffffffff828f5008 R auacer_ca +ffffffff828f5030 R auacer_hw_if +ffffffff828f6000 R auich_ca +ffffffff828f6028 R auich_hw_if +ffffffff828f60e0 r auich_devices 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+ffffffff8297c000 R aq_devices +ffffffff8297c060 R aq_products +ffffffff8297c1d0 R aq_fw1x_ops +ffffffff8297c1f8 R aq_fw2x_ops +ffffffff8297c220 R aq2_fw_ops +ffffffff8297c248 R aq_ca +ffffffff8297d000 R de_ca +ffffffff8297d030 r tulip_srom_conninfo +ffffffff8297d120 r tulip_mii_phy_attrlist +ffffffff8297d1e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff8297d208 r tulip_21040_10baset_only_boardsw +ffffffff8297d230 r tulip_21040_boardsw +ffffffff8297d258 r tulip_2114x_isv_boardsw +ffffffff8297d280 r tulip_21140_smc9332_boardsw +ffffffff8297d2a8 r tulip_21040_auibnc_only_boardsw +ffffffff8297d2d0 r tulip_21140_cogent_em100_boardsw +ffffffff8297d2f8 r tulip_21140_accton_boardsw +ffffffff8297d320 r tulip_21140_eb_boardsw +ffffffff8297d348 r tulip_21041_boardsw +ffffffff8297d370 r tulip_read_macaddr.testpat +ffffffff8297d380 r tulip_vendors +ffffffff8297d430 r tulip_media_to_ifmedia +ffffffff8297d490 r tulip_chipdescs +ffffffff8297e000 R ep_pci_ca +ffffffff8297e030 R ep_pci_devices +ffffffff8297f000 R pcn_ca +ffffffff8297f028 R pcn_devices +ffffffff8297f030 r pcn_79c970_rcvfw +ffffffff8297f050 r pcn_79c970_xmtsp +ffffffff8297f070 r pcn_79c970_xmtfw +ffffffff8297f090 r pcn_79c971_rcvfw +ffffffff8297f0b0 r pcn_79c971_xmtsp_sram +ffffffff8297f0d0 r pcn_79c971_xmtsp +ffffffff8297f0f0 r pcn_79c971_xmtfw +ffffffff8297f110 r pcn_variants +ffffffff82980000 R siop_products +ffffffff82981000 R siop_pci_ca +ffffffff82982000 R rdcide_setup +ffffffff82982005 R rdcide_hold +ffffffff8298200a R rdcide_udmatim +ffffffff82982010 R rdcide_udmaclk +ffffffff82982028 R default_product_desc +ffffffff82982040 R pciide_intel_products +ffffffff82982630 R pciide_amd_products +ffffffff82982690 R pciide_cmd_products +ffffffff82982730 R pciide_via_products +ffffffff82982810 R pciide_cypress_products +ffffffff82982820 R pciide_sis_products +ffffffff82982870 R pciide_natsemi_products +ffffffff82982890 R pciide_acer_products +ffffffff829828a0 R pciide_triones_products +ffffffff829828f0 R pciide_promise_products +ffffffff82982ac0 R pciide_acard_products +ffffffff82982b10 R pciide_serverworks_products +ffffffff82982bb0 R pciide_nvidia_products +ffffffff82982e80 R pciide_ite_products +ffffffff82982ea0 R pciide_ati_products +ffffffff82982f20 R pciide_jmicron_products +ffffffff82982f70 R pciide_phison_products +ffffffff82982f80 R pciide_rdc_products +ffffffff82982f90 R pciide_vendors +ffffffff82983140 R pciide_pci_ca +ffffffff82983168 R pciide_jmb_ca +ffffffff82983190 r piix_isp_dma +ffffffff82983193 r piix_rtc_dma +ffffffff82983196 r apollo_pio_set +ffffffff8298319b r cmd0643_9_data_tim_pio +ffffffff829831a0 r cmd0643_9_data_tim_dma +ffffffff829831a3 r cmd680_channel_map.init_val +ffffffff829831b1 r cmd680_setup_channel.udma2_tbl +ffffffff829831b8 r cmd680_setup_channel.dma_tbl +ffffffff829831be r cmd680_setup_channel.pio_tbl +ffffffff829831d0 r satalink_ba5_regmap +ffffffff82983690 r sii3114_chansetup.channel_names +ffffffff829836b0 r cy_pio_pulse +ffffffff829836c0 r sis_udma133new_tim +ffffffff829836e0 r sis_pio133new_tim +ffffffff829836f4 r sis_dma133new_tim +ffffffff82983700 r sis_udma66_tim +ffffffff82983706 r sis_udma100new_tim +ffffffff8298370c r sis_udma133old_tim +ffffffff82983713 r sis_pio_act +ffffffff82983718 r sis_pio_rec +ffffffff8298371d r natsemi_pio_pulse +ffffffff82983722 r natsemi_pio_recover +ffffffff82983727 r natsemi_dma_pulse +ffffffff8298372a r natsemi_dma_recover +ffffffff82983730 r scx200_udma33 +ffffffff8298373c r scx200_dma33 +ffffffff82983750 r scx200_pio33 +ffffffff82983778 r acer_udma +ffffffff8298377e r acer_pio +ffffffff82983790 r hpt370_pio +ffffffff829837a4 r hpt370_dma +ffffffff829837b0 r hpt370_udma +ffffffff829837d0 r hpt372_pio +ffffffff829837e4 r hpt372_dma +ffffffff829837f0 r hpt372_udma +ffffffff8298380c r hpt366_dma +ffffffff82983820 r hpt366_udma +ffffffff82983840 r hpt374_pio +ffffffff82983854 r hpt374_dma +ffffffff82983860 r hpt374_udma +ffffffff8298387c r pdc2xx_pa +ffffffff82983881 r pdc2xx_pb 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tuners +ffffffff8298d170 r freqTable +ffffffff8298d260 r nabcst +ffffffff8298d2a0 r irccable +ffffffff8298d310 r hrccable +ffffffff8298d380 r weurope +ffffffff8298d420 r jpnbcst +ffffffff8298d460 r jpncable +ffffffff8298d4c0 r xussr +ffffffff8298d530 r australia +ffffffff8298d590 r france +ffffffff8298e000 R xl_pci_ca +ffffffff8298e030 R xl_pci_devices +ffffffff8298f000 R fxp_pci_ca +ffffffff8298f030 R fxp_pci_devices +ffffffff82990000 R em_devices +ffffffff82990308 R em_ca +ffffffff82990330 r em_counters +ffffffff82991000 r em_igp_cable_length_table +ffffffff82991100 r em_igp_2_cable_length_table +ffffffff82992000 R ixgb_devices +ffffffff82992010 R ixgb_ca +ffffffff82993000 R ixgbe_devices +ffffffff829930b8 R ix_ca +ffffffff829930e0 r ix_counters +ffffffff829933e0 r ix_rxq_kstats_tpl +ffffffff82993458 r ix_txq_kstats_tpl +ffffffff82994000 r ixgbe_mvals_base +ffffffff82994060 r ixgbe_mvals_X540 +ffffffff829940c0 r ixgbe_mvals_X550 +ffffffff82994120 r ixgbe_mvals_X550EM_x +ffffffff82994180 r ixgbe_mvals_X550EM_a +ffffffff82997000 R ixl_ca +ffffffff82997030 R ixl_port_counters +ffffffff829972c0 R ixl_vsi_counters +ffffffff82997380 r ixl_devices +ffffffff829974c0 r ixl_710 +ffffffff829974e8 r ixl_722 +ffffffff82997510 r ixl_pf_aq_regs +ffffffff82997578 r ixl_710_decrepit +ffffffff829975a0 r ixl_phy_type_map +ffffffff82997770 r ixl_speed_type_map +ffffffff829977b0 r ixl_hmc_pack_rxq +ffffffff82997830 r ixl_hmc_pack_txq +ffffffff829978a0 r ixl_sfp_ops +ffffffff829978b8 r ixl_qsfp_ops +ffffffff82998000 r dwqe_pci_devices +ffffffff82998018 R dwqe_pci_ca +ffffffff82999000 R xge_ca +ffffffff82999028 R xge_devices +ffffffff82999030 r xge_fix_mac +ffffffff82999110 r xge_xena_dtx_cfg +ffffffff82999170 r xge_herc_dtx_cfg +ffffffff8299a000 R thtc_ca +ffffffff8299a028 R tht_ca +ffffffff8299a050 r thtc_devices +ffffffff8299a068 r tht_link_state.interval +ffffffff8299b000 R myx_ca +ffffffff8299b028 R myx_devices +ffffffff8299c000 R oce_ca +ffffffff8299c030 R oce_devices +ffffffff8299d000 R dc_pci_ca +ffffffff8299e000 R epic_pci_ca +ffffffff8299e028 R epic_pci_devices +ffffffff8299f000 R ti_pci_ca +ffffffff8299f030 R ti_devices +ffffffff829a0000 R ne_pci_ca +ffffffff829a0030 R ne_pci_prod +ffffffff829a1000 R gem_pci_ca +ffffffff829a1030 R gem_pci_devices +ffffffff829a1050 r gem_promhdr +ffffffff829a1052 r gem_promdat +ffffffff829a105a r gem_promdat2 +ffffffff829a2000 R cas_ca +ffffffff829a2028 R cas_pci_devices +ffffffff829a2030 r cas_promhdr +ffffffff829a2032 r cas_promdat_sun +ffffffff829a203a r cas_promdat_ns +ffffffff829a2042 r cas_promdat2 +ffffffff829a3000 R sf_pci_ca +ffffffff829a3028 R sf_pci_products +ffffffff829a4000 R sis_ca +ffffffff829a4028 R sis_devices +ffffffff829a5000 R se_devices +ffffffff829a5008 R se_ca +ffffffff829a6000 R mbg_ca +ffffffff829a6030 R mbg_devices +ffffffff829a7000 R uhci_pci_ca +ffffffff829a8000 R ohci_pci_ca +ffffffff829a9000 R ehci_pci_ca +ffffffff829aa000 R xhci_pci_ca +ffffffff829ab000 R cbb_pci_ca +ffffffff829ab028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff829ac000 R skc_devices +ffffffff829ac030 R skc_ca +ffffffff829ac058 R sk_ca +ffffffff829ad000 R mskc_devices +ffffffff829ad0a8 R mskc_ca +ffffffff829ad0d0 R msk_ca +ffffffff829ad100 r msk_mib +ffffffff829ae000 R puc_pci_ca +ffffffff829af000 R puc_devs +ffffffff829b4000 R com_puc_ca +ffffffff829b4030 r puc_port_types +ffffffff829b5000 R lpt_puc_ca +ffffffff829b6000 R wi_pci_ca +ffffffff829b6030 r wi_pci_products +ffffffff829b7000 R an_pci_ca +ffffffff829b7030 R an_pci_devices +ffffffff829b8000 R iwi_devices +ffffffff829b8010 R iwi_ca +ffffffff829b9000 R wpi_ca +ffffffff829b9028 r wpi_devices +ffffffff829b9030 r wpi_rates +ffffffff829b9050 r wpi_rf_gain_5ghz +ffffffff829b90a0 r wpi_dsp_gain_5ghz +ffffffff829b90f0 r wpi_rf_gain_2ghz +ffffffff829b9140 r wpi_dsp_gain_2ghz +ffffffff829b9190 r wpi_pmgt +ffffffff829b9310 r wpi_bands +ffffffff829ba000 R iwn_mcs2ridx +ffffffff829ba020 R iwn_ca +ffffffff829ba050 r iwn_devices +ffffffff829ba0e8 r iwn4965_sensitivity_limits +ffffffff829ba124 r iwn5000_sensitivity_limits +ffffffff829ba160 r iwn5150_sensitivity_limits +ffffffff829ba19c r iwn1000_sensitivity_limits +ffffffff829ba1d8 r iwn6000_sensitivity_limits +ffffffff829ba214 r iwn2000_sensitivity_limits +ffffffff829ba250 r iwn_fw_errmsg +ffffffff829ba340 r iwn4965_set_txpower.tdiv +ffffffff829ba360 r iwn4965_rf_gain_5ghz +ffffffff829ba3d0 r iwn4965_dsp_gain_5ghz +ffffffff829ba440 r iwn4965_dsp_gain_2ghz +ffffffff829ba4b0 r iwn_pmgt +ffffffff829ba6f0 r iwn4965_post_alive.qid2fifo +ffffffff829ba700 r iwn_bands +ffffffff829ba770 r iwn_rates +ffffffff829ba820 r iwn4965_rf_gain_2ghz +ffffffff829bb000 R iwm_nvm_channels +ffffffff829bb030 R iwm_nvm_channels_8000 +ffffffff829bb070 R iwm_rates +ffffffff829bb0d0 R iwm_ht_mcs2ridx +ffffffff829bb110 R iwm_tid_to_ac +ffffffff829bb118 R iwm_ac_to_tx_fifo +ffffffff829bb120 R iwm_nvm_to_read +ffffffff829bb144 r iwm_set_hw_address_8000.reserved_mac +ffffffff829bb180 r iwm_sf_full_timeout +ffffffff829bb1b0 r iwm_sf_full_timeout_def +ffffffff829bb1e0 r advanced_lookup +ffffffff829bb320 r iwm_devices +ffffffff829bb360 R iwm_ca +ffffffff829bc000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff829bc020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff829bc040 R iwx_qu_b0_hr1_b0 +ffffffff829bc060 R iwx_qu_b0_hr_b0 +ffffffff829bc080 R iwx_ax201_cfg_qu_hr +ffffffff829bc0a0 R iwx_qu_c0_hr1_b0 +ffffffff829bc0c0 R iwx_qu_c0_hr_b0 +ffffffff829bc0e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff829bc100 R iwx_quz_a0_hr1_b0 +ffffffff829bc120 R iwx_ax201_cfg_quz_hr +ffffffff829bc140 R iwx_cfg_so_a0_hr_b0 +ffffffff829bc160 R iwx_cfg_quz_a0_hr_b0 +ffffffff829bc180 R iwx_2ax_cfg_so_gf_a0 +ffffffff829bc1a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff829bc1c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff829bc1e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff829bc200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff829bc220 R iwx_2ax_cfg_so_jf_b0 +ffffffff829bc240 R iwx_nvm_channels_8000 +ffffffff829bc280 R iwx_rates +ffffffff829bc2e0 R iwx_mcs2ridx +ffffffff829bc320 R iwx_tid_to_ac +ffffffff829bc328 R iwx_ac_to_tx_fifo +ffffffff829bc330 r iwx_nvm_channels_uhb +ffffffff829bc39e r iwx_is_valid_mac_addr.reserved_mac +ffffffff829bc3b0 r iwx_sf_full_timeout +ffffffff829bc3e0 r iwx_sf_full_timeout_def +ffffffff829bc410 r advanced_lookup +ffffffff829bc550 r iwx_devices +ffffffff829bc590 r iwx_dev_info_table +ffffffff829bce18 R iwx_ca +ffffffff829bd000 R cmpci_ca +ffffffff829bd028 R cmpci_hw_if +ffffffff829bd0e0 r cmpci_rate_table +ffffffff829bd120 R cmpci_devices +ffffffff829bd130 r cmpci_query_devinfo.mixer_port_names +ffffffff829bd160 r cmpci_query_devinfo.mixer_classes +ffffffff829be000 R iha_pci_ca +ffffffff829be028 R iha_switch +ffffffff829bf000 R pcscp_ca +ffffffff829c0000 R bge_ca +ffffffff829c0030 R bge_devices +ffffffff829c01b0 r bge_revisions +ffffffff829c0610 r bge_majorrevs +ffffffff829c0790 r bge_kstat_tpl +ffffffff829c1000 R bnx_devices +ffffffff829c1020 R bnx_ca +ffffffff829c2000 R vge_ca +ffffffff829c2028 R vge_devices +ffffffff829c3000 R stge_ca +ffffffff829c3028 R stge_mii_bitbang_ops +ffffffff829c3050 R stge_devices +ffffffff829c4000 R nfe_ca +ffffffff829c4030 R nfe_devices +ffffffff829c5000 R et_devices +ffffffff829c5008 R et_ca +ffffffff829c6000 R jme_devices +ffffffff829c6008 R jme_ca +ffffffff829c7000 R age_devices +ffffffff829c7008 R age_ca +ffffffff829c8000 R alc_devices +ffffffff829c8038 R alc_ca +ffffffff829c9000 R ale_devices +ffffffff829c9008 R ale_ca +ffffffff829ca000 R amdpm_ca +ffffffff829ca030 R amdpm_ids +ffffffff829cb000 R bce_ca +ffffffff829cb028 R bce_devices +ffffffff829cc000 R ath_pci_ca +ffffffff829cd000 R athn_pci_ca +ffffffff829cd030 r athn_pci_devices +ffffffff829ce000 R atw_pci_ca +ffffffff829ce028 R atw_pci_devices +ffffffff829cf000 R rtw_pci_ca +ffffffff829cf030 R rtw_pci_products +ffffffff829d0000 R rtwn_pci_ca +ffffffff829d0030 r rtwn_pci_devices +ffffffff829d0040 r rtl8188eu_mac +ffffffff829d01b0 r rtl8192cu_mac +ffffffff829d0310 r rtl8192ce_mac +ffffffff829d0458 r rtl8188eu_bb_prog +ffffffff829d0480 r rtl8723a_bb_prog +ffffffff829d04a8 r rtl8192ce_bb_prog_1t +ffffffff829d04d0 r rtl8192ce_bb_prog_2t +ffffffff829d0500 r rtl8188eu_bb_regs +ffffffff829d0680 r rtl8188eu_bb_vals +ffffffff829d0980 r rtl8188eu_agc_vals +ffffffff829d0b80 r rtl8723a_bb_regs +ffffffff829d0d00 r rtl8723a_bb_vals +ffffffff829d0ff0 r rtl8192ce_agc_vals +ffffffff829d1270 r rtl8192ce_bb_regs +ffffffff829d13f0 r rtl8192ce_bb_vals_1t +ffffffff829d16e0 r rtl8192ce_bb_vals_2t +ffffffff829d2000 R ral_pci_ca +ffffffff829d2030 R ral_pci_devices +ffffffff829d3000 R acx_pci_ca +ffffffff829d3028 R acx_pci_devices +ffffffff829d4000 R pgt_pci_ca +ffffffff829d4028 R pgt_pci_devices +ffffffff829d5000 R malo_pci_ca +ffffffff829d5028 R malo_pci_devices +ffffffff829d6000 R bwi_pci_ca +ffffffff829d6030 R bwi_pci_devices +ffffffff829d7000 R piixpm_ca +ffffffff829d7030 R piixpm_ids +ffffffff829d8000 R vic_ca +ffffffff829d8028 R vic_devices +ffffffff829d9000 R vmx_devices +ffffffff829d9008 R vmx_ca +ffffffff829d9030 r vmx_tx_kstat_tpl +ffffffff829d90d0 r vmx_kstat_rate +ffffffff829d90e0 r vmx_rx_kstat_tpl +ffffffff829da000 R vmwpvs_ca +ffffffff829da028 R vmwpvs_switch +ffffffff829db000 R lii_ca +ffffffff829db028 R lii_devices +ffffffff829dc000 R ichiic_ca +ffffffff829dc030 R ichiic_ids +ffffffff829dd000 R viapm_ca +ffffffff829dd030 R viapm_ids +ffffffff829dd070 r val_to_temp +ffffffff829dd870 r val_to_uV.mult +ffffffff829de000 R amdiic_ca +ffffffff829de028 R amdiic_ids +ffffffff829df000 R nviic_ca +ffffffff829df030 R nviic_ids +ffffffff829e0000 R sdhc_pci_ca +ffffffff829e1000 R kate_ca +ffffffff829e1030 r kate_proc +ffffffff829e2000 R km_ca +ffffffff829e2030 r km_devices +ffffffff829e3000 R ksmn_ca +ffffffff829e3030 r ksmn_devices +ffffffff829e4000 R iosf_pci_ca +ffffffff829e5000 R itherm_devices +ffffffff829e5008 R itherm_ca +ffffffff829e6000 R pchtemp_ca +ffffffff829e6030 R pchtemp_devices +ffffffff829e7000 R rtsx_pci_ca +ffffffff829e8000 R xspd_ca +ffffffff829e8028 R xspd_devices +ffffffff829e9000 R virtio_pci_ca +ffffffff829ea000 R dwiic_pci_ca +ffffffff829ea030 R dwiic_pci_ids +ffffffff829eb000 R bwfm_pci_ca +ffffffff829eb030 r bwfm_pci_devices +ffffffff829ec000 R ccp_pci_ca +ffffffff829ec030 r ccp_pci_devices +ffffffff829ed000 R bnxt_devices +ffffffff829ed040 R bnxt_ca +ffffffff829ee000 R mcx_ca +ffffffff829ee030 r mcx_devices +ffffffff829ee060 r mcx_rss_config +ffffffff829ee0d0 r mcx_eth_cap_map +ffffffff829ee2d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff829ee2e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff829ee300 r mcx_kstat_ppcnt_rfc2819 +ffffffff829ee318 r mcx_kstat_ppcnt_rfc3635 +ffffffff829ee330 r mcx_ppcnt_ieee8023_tpl +ffffffff829ee4b0 r mcx_ppcnt_rfc2863_tpl +ffffffff829ee5c0 r mcx_ppcnt_rfc2819_tpl +ffffffff829ee770 r mcx_ppcnt_rfc3635_tpl +ffffffff829ee8b0 r mcx_kstat_mtmp_tpl +ffffffff829ee950 r mcx_kstat_mtmp_rate +ffffffff829ee960 r mcx_queue_kstat_tpl +ffffffff829ef000 R iavf_ca +ffffffff829ef030 r iavf_devices +ffffffff829ef040 r iavf_aq_regs +ffffffff829ef0b0 r iavf_link_speeds +ffffffff829f0000 R rge_ca +ffffffff829f0028 R rge_devices +ffffffff829f0030 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff829f0050 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff829f00b0 r rtl8125_mac_cfg3_mcu +ffffffff829f0950 r rtl8125_mac_cfg5_mcu +ffffffff829f1970 r rtl8125_mac_bps +ffffffff829f1d70 r rtl8125b_mac_bps +ffffffff829f1f98 r rge_kstats_tpl +ffffffff829f3000 R igc_devices +ffffffff829f3040 R igc_ca +ffffffff829f4000 R ngbe_devices +ffffffff829f4008 R ngbe_ca +ffffffff829f5000 R com_pci_ca +ffffffff829f5030 R com_pci_ids +ffffffff829f6000 r agp_attach.agp_max +ffffffff829f6048 R agp_ca +ffffffff829f7000 R intagp_ca +ffffffff829f8000 r drm_plane_create_rotation_property.props +ffffffff829f9000 r drm_bridge_priv_state_funcs +ffffffff829fb000 r color_encoding_name +ffffffff829fb020 r color_range_name +ffffffff829fc000 r drm_subpixel_enum_list +ffffffff829fc060 r drm_dpms_enum_list +ffffffff829fc0a0 r drm_dvi_i_select_enum_list +ffffffff829fc0d0 r drm_dvi_i_subconnector_enum_list +ffffffff829fc100 r drm_tv_mode_enum_list +ffffffff829fc170 r drm_tv_select_enum_list +ffffffff829fc1c0 r drm_tv_subconnector_enum_list +ffffffff829fc210 r drm_dp_subconnector_enum_list +ffffffff829fc280 r colorspace_names +ffffffff829fc300 r drm_link_status_enum_list +ffffffff829fc320 r drm_scaling_mode_enum_list +ffffffff829fc360 r drm_aspect_ratio_enum_list +ffffffff829fc390 r drm_content_type_enum_list +ffffffff829fc3e0 r drm_panel_orientation_enum_list +ffffffff829fc420 r privacy_screen_enum +ffffffff829fd000 r drm_crtc_fence_ops +ffffffff829fe000 r drm_dmt_modes +ffffffff82a00940 r edid_cea_modes_1 +ffffffff82a044d0 r edid_cea_modes_193 +ffffffff82a05180 r edid_quirk_list +ffffffff82a05360 r drm_mode_do_interlace_quirk.cea_interlaced +ffffffff82a053a0 r edid_4k_modes +ffffffff82a05600 r edid_est_modes +ffffffff82a05e00 r est3_modes +ffffffff82a05f60 r stereo_mandatory_modes +ffffffff82a05fe0 r extra_modes +ffffffff82a07000 r drm_encoder_enum_list +ffffffff82a09000 r drm_fbdev_dma_helper_funcs +ffffffff82a09010 r drm_fbdev_dma_client_funcs +ffffffff82a09030 r drm_fbdev_dma_fb_ops +ffffffff82a0a000 r drm_fbdev_generic_helper_funcs +ffffffff82a0a010 r drm_fbdev_generic_client_funcs +ffffffff82a0a030 r drm_fbdev_generic_fb_ops +ffffffff82a0c000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82a0c004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82a0c008 r drm_fb_xrgb8888_to_xrgb1555.dst_pixsize +ffffffff82a0c00c r drm_fb_xrgb8888_to_argb1555.dst_pixsize +ffffffff82a0c010 r drm_fb_xrgb8888_to_rgba5551.dst_pixsize +ffffffff82a0c014 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff82a0c018 r drm_fb_xrgb8888_to_argb8888.dst_pixsize +ffffffff82a0c01c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82a0c020 r drm_fb_xrgb8888_to_argb2101010.dst_pixsize +ffffffff82a0c024 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82a0c028 r drm_fb_xrgb8888_to_xbgr8888.dst_pixsize +ffffffff82a0c02c r drm_fb_xrgb8888_to_abgr8888.dst_pixsize +ffffffff82a0d000 r __drm_format_info.formats +ffffffff82a0e000 R drm_pgops +ffffffff82a0f000 r drm_gem_dma_default_funcs +ffffffff82a10000 R drm_gem_fb_funcs +ffffffff82a11000 r drm_ioctls +ffffffff82a13000 r dma_fence_stub_ops +ffffffff82a13040 R dma_fence_array_ops +ffffffff82a13080 R dma_fence_chain_ops +ffffffff82a130c0 R dmabufops +ffffffff82a130f8 R syncfileops +ffffffff82a14000 r drm_plane_type_enum_list +ffffffff82a15000 r tv_modes_parameters +ffffffff82a150c0 r drm_mode_status_names +ffffffff82a15200 r drm_named_modes +ffffffff82a16000 r primary_plane_funcs +ffffffff82a16068 r safe_modeset_formats +ffffffff82a17000 r orientation_data +ffffffff82a1a718 r lcd800x1280_rightside_up +ffffffff82a1a730 r lcd720x1280_rightside_up +ffffffff82a1a748 r lcd800x1280_leftside_up +ffffffff82a1a760 r lcd1080x1920_leftside_up +ffffffff82a1a778 r lcd1200x1920_rightside_up +ffffffff82a1a790 r gpd_micropc +ffffffff82a1a7a8 r gpd_pocket +ffffffff82a1a7c0 r gpd_pocket2 +ffffffff82a1a7d8 r gpd_win +ffffffff82a1a7f0 r gpd_win2 +ffffffff82a1a808 r itworks_tw891 +ffffffff82a1a820 r lcd1600x2560_rightside_up +ffffffff82a1a838 r onegx1_pro +ffffffff82a1a850 r lcd1600x2560_leftside_up +ffffffff82a1a868 r lcd1280x1920_rightside_up +ffffffff82a1a880 r gpd_onemix2s +ffffffff82a1a898 r .compoundliteral +ffffffff82a1a8a8 r .compoundliteral.5 +ffffffff82a1a8d0 r .compoundliteral.9 +ffffffff82a1a8f0 r .compoundliteral.17 +ffffffff82a1a930 r .compoundliteral.21 +ffffffff82a1a950 r .compoundliteral.23 +ffffffff82a1a960 r .compoundliteral.25 +ffffffff82a1a970 r .compoundliteral.29 +ffffffff82a1b000 r drm_gem_prime_dmabuf_ops +ffffffff82a1d000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82a1e000 r drm_dp_phy_name.phy_names +ffffffff82a1e048 r drm_dp_i2c_algo +ffffffff82a1e058 r drm_dp_i2c_lock_ops +ffffffff82a1e070 r dp_aux_bl_ops +ffffffff82a1e090 r dpcd_quirk_list +ffffffff82a1e320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82a1f000 R drm_dp_mst_topology_state_funcs +ffffffff82a1f020 r drm_dp_mst_req_type_str.req_type_str +ffffffff82a1f1f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82a1f220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82a1f278 r drm_dp_mst_i2c_algo +ffffffff82a20000 r rc_parameters_1_2_444 +ffffffff82a205f0 r rc_parameters_pre_scr +ffffffff82a20920 r rc_parameters_1_2_422 +ffffffff82a20df0 r rc_parameters_1_2_420 +ffffffff82a22000 r hdmi_colorimetry_val +ffffffff82a23018 R ttm_bo_vm_ops +ffffffff82a24000 r ttm_range_manager_func +ffffffff82a25018 r ttm_kmap_iter_io_ops +ffffffff82a25030 r ttm_kmap_iter_linear_io_ops +ffffffff82a26000 r ttm_sys_manager_func +ffffffff82a27000 r ttm_kmap_iter_tt_ops +ffffffff82a28000 r drm_sched_fence_ops_scheduled +ffffffff82a28040 r drm_sched_fence_ops_finished +ffffffff82a29000 R ch7017_ops +ffffffff82a2a000 R ch7xxx_ops +ffffffff82a2a060 r ch7xxx_ids +ffffffff82a2b000 R ivch_ops +ffffffff82a2b060 r backup_addresses +ffffffff82a2c000 R ns2501_ops +ffffffff82a2c060 r mode_agnostic_values +ffffffff82a2c0e0 r ns2501_modes +ffffffff82a2d000 R sil164_ops +ffffffff82a2e000 R tfp410_ops +ffffffff82a2f000 r chv_dpll +ffffffff82a2f050 r vlv_dpll +ffffffff82a2f0a0 r g4x_dpll +ffffffff82a2f0f0 r pch_dpll +ffffffff82a2f138 r intel_dp_enc_funcs +ffffffff82a30000 r intel_hdmi_enc_funcs +ffffffff82a31000 r vlv_primary_formats +ffffffff82a31030 r ivb_primary_formats +ffffffff82a31050 r i965_primary_formats +ffffffff82a31070 r i8xx_primary_formats +ffffffff82a31080 r i965_plane_funcs +ffffffff82a310e8 r i8xx_plane_funcs +ffffffff82a32000 r ilk_wm_funcs +ffffffff82a32040 r vlv_wm_funcs +ffffffff82a32080 r g4x_wm_funcs +ffffffff82a320c0 r nop_funcs +ffffffff82a32100 r pnv_wm_funcs +ffffffff82a32140 r i965_wm_funcs +ffffffff82a32180 r i9xx_wm_funcs +ffffffff82a321c0 r i845_wm_funcs +ffffffff82a32200 r cxsr_latency_table +ffffffff82a33000 r gen11_dsi_encoder_funcs +ffffffff82a33020 r gen11_dsi_connector_funcs +ffffffff82a33098 r gen11_dsi_connector_helper_funcs +ffffffff82a330f8 r gen11_dsi_host_ops +ffffffff82a34000 r intel_plane_helper_funcs +ffffffff82a35000 r g4x_audio_funcs +ffffffff82a35018 r ibx_audio_funcs +ffffffff82a35030 r hsw_audio_funcs +ffffffff82a35050 r hdmi_audio_clock +ffffffff82a350c0 r dp_aud_n_m +ffffffff82a35270 r hdmi_aud_ncts_36bpp +ffffffff82a35350 r hdmi_aud_ncts_30bpp +ffffffff82a35430 r hdmi_aud_ncts_24bpp +ffffffff82a36000 r intel_backlight_device_ops +ffffffff82a36018 r bxt_pwm_funcs +ffffffff82a36048 r cnp_pwm_funcs +ffffffff82a36078 r lpt_pwm_funcs +ffffffff82a360a8 r spt_pwm_funcs +ffffffff82a360d8 r pch_pwm_funcs +ffffffff82a36108 r ext_pwm_funcs +ffffffff82a36138 r vlv_pwm_funcs +ffffffff82a36168 r i965_pwm_funcs +ffffffff82a36198 r i9xx_pwm_funcs +ffffffff82a361c8 r pwm_bl_funcs +ffffffff82a37000 r bdb_blocks +ffffffff82a37160 r adlp_aux_ch_map +ffffffff82a37169 r adls_aux_ch_map +ffffffff82a37170 r rkl_aux_ch_map +ffffffff82a37175 r direct_aux_ch_map +ffffffff82a3717e r translate_iboost.mapping +ffffffff82a37181 r adlp_ddc_pin_map +ffffffff82a3718e r adls_ddc_pin_map +ffffffff82a3719b r rkl_pch_tgp_ddc_pin_map +ffffffff82a371a6 r gen9bc_tgp_ddc_pin_map +ffffffff82a371b1 r icp_ddc_pin_map +ffffffff82a371c0 r cnp_ddc_pin_map +ffffffff82a38000 r mtl_sa_info +ffffffff82a38006 r adlp_sa_info +ffffffff82a3800c r adls_sa_info +ffffffff82a38012 r rkl_sa_info +ffffffff82a38018 r tgl_sa_info +ffffffff82a38020 r intel_bw_funcs +ffffffff82a39000 r intel_cdclk_funcs +ffffffff82a39010 r mtl_cdclk_funcs +ffffffff82a39030 r mtl_cdclk_table +ffffffff82a39088 r tgl_cdclk_funcs +ffffffff82a390b0 r dg2_cdclk_table +ffffffff82a39160 r adlp_a_step_cdclk_table +ffffffff82a391e0 r rplu_cdclk_table +ffffffff82a392c8 r rplu_cdclk_funcs +ffffffff82a392f0 r adlp_cdclk_table +ffffffff82a393b0 r rkl_cdclk_table +ffffffff82a394a0 r icl_cdclk_table +ffffffff82a39588 r ehl_cdclk_funcs +ffffffff82a395a8 r icl_cdclk_funcs +ffffffff82a395c8 r bxt_cdclk_funcs +ffffffff82a395f0 r glk_cdclk_table +ffffffff82a39620 r bxt_cdclk_table +ffffffff82a39668 r skl_cdclk_funcs +ffffffff82a39688 r bdw_cdclk_funcs +ffffffff82a396a8 r hsw_cdclk_funcs +ffffffff82a396c8 r chv_cdclk_funcs +ffffffff82a396e8 r vlv_cdclk_funcs +ffffffff82a39708 r fixed_400mhz_cdclk_funcs +ffffffff82a39728 r ilk_cdclk_funcs +ffffffff82a39748 r gm45_cdclk_funcs +ffffffff82a39768 r g33_cdclk_funcs +ffffffff82a39788 r i965gm_cdclk_funcs +ffffffff82a397a8 r pnv_cdclk_funcs +ffffffff82a397c8 r i945gm_cdclk_funcs +ffffffff82a397e8 r i915gm_cdclk_funcs +ffffffff82a39808 r i915g_cdclk_funcs +ffffffff82a39828 r i865g_cdclk_funcs +ffffffff82a39848 r i85x_cdclk_funcs +ffffffff82a39868 r i845g_cdclk_funcs +ffffffff82a39888 r i830_cdclk_funcs +ffffffff82a398a8 r g33_get_cdclk.div_3200 +ffffffff82a398ae r g33_get_cdclk.div_4000 +ffffffff82a398b4 r g33_get_cdclk.div_4800 +ffffffff82a398ba r g33_get_cdclk.div_5333 +ffffffff82a398c0 r i965gm_get_cdclk.div_3200 +ffffffff82a398c3 r i965gm_get_cdclk.div_4000 +ffffffff82a398c6 r i965gm_get_cdclk.div_5333 +ffffffff82a3a000 r chv_color_funcs +ffffffff82a3a040 r vlv_color_funcs +ffffffff82a3a080 r i965_color_funcs +ffffffff82a3a0c0 r i9xx_color_funcs +ffffffff82a3a100 r tgl_color_funcs +ffffffff82a3a140 r icl_color_funcs +ffffffff82a3a180 r glk_color_funcs +ffffffff82a3a1c0 r skl_color_funcs +ffffffff82a3a200 r bdw_color_funcs +ffffffff82a3a240 r hsw_color_funcs +ffffffff82a3a280 r ivb_color_funcs +ffffffff82a3a2c0 r ilk_color_funcs +ffffffff82a3a300 r chv_cgm_csc_matrix_identity +ffffffff82a3a31e r ilk_csc_matrix_rgb_to_ycbcr +ffffffff82a3a33c r ilk_csc_matrix_limited_range +ffffffff82a3a35a r ilk_csc_matrix_identity +ffffffff82a3b000 r icl_procmon_values +ffffffff82a3c000 r force_audio_names +ffffffff82a3c040 r broadcast_rgb_names +ffffffff82a3d000 r intel_crt_connector_funcs +ffffffff82a3d078 r intel_crt_enc_funcs +ffffffff82a3d0a0 r intel_spurious_crt_detect +ffffffff82a3d4a8 r intel_crt_connector_helper_funcs +ffffffff82a3e000 r g4x_crtc_funcs +ffffffff82a3e0c0 r i965_crtc_funcs +ffffffff82a3e180 r i915gm_crtc_funcs +ffffffff82a3e240 r i915_crtc_funcs +ffffffff82a3e300 r i8xx_crtc_funcs +ffffffff82a3e3c0 r bdw_crtc_funcs +ffffffff82a3e480 r ilk_crtc_funcs +ffffffff82a3f000 r output_format_str +ffffffff82a3f020 r output_type_str +ffffffff82a40000 r intel_cursor_plane_funcs +ffffffff82a40068 r intel_cursor_formats +ffffffff82a41000 r mtl_c10_hdmi_tables +ffffffff82a41170 r mtl_c10_hdmi_25_2 +ffffffff82a4118c r mtl_c10_hdmi_27_0 +ffffffff82a411a8 r mtl_c10_hdmi_27027 +ffffffff82a411c4 r mtl_c10_hdmi_28320 +ffffffff82a411e0 r mtl_c10_hdmi_30240 +ffffffff82a411fc r mtl_c10_hdmi_31500 +ffffffff82a41218 r mtl_c10_hdmi_36000 +ffffffff82a41234 r mtl_c10_hdmi_40000 +ffffffff82a41250 r mtl_c10_hdmi_49500 +ffffffff82a4126c r mtl_c10_hdmi_50000 +ffffffff82a41288 r mtl_c10_hdmi_57284 +ffffffff82a412a4 r mtl_c10_hdmi_58000 +ffffffff82a412c0 r mtl_c10_hdmi_65000 +ffffffff82a412dc r mtl_c10_hdmi_71000 +ffffffff82a412f8 r mtl_c10_hdmi_74176 +ffffffff82a41314 r mtl_c10_hdmi_74_25 +ffffffff82a41330 r mtl_c10_hdmi_75000 +ffffffff82a4134c r mtl_c10_hdmi_78750 +ffffffff82a41368 r mtl_c10_hdmi_85500 +ffffffff82a41384 r mtl_c10_hdmi_88750 +ffffffff82a413a0 r mtl_c10_hdmi_106500 +ffffffff82a413bc r mtl_c10_hdmi_108000 +ffffffff82a413d8 r mtl_c10_hdmi_115500 +ffffffff82a413f4 r mtl_c10_hdmi_119000 +ffffffff82a41410 r mtl_c10_hdmi_135000 +ffffffff82a4142c r mtl_c10_hdmi_138500 +ffffffff82a41448 r mtl_c10_hdmi_147160 +ffffffff82a41464 r mtl_c10_hdmi_148352 +ffffffff82a41480 r mtl_c10_hdmi_148_5 +ffffffff82a4149c r mtl_c10_hdmi_154000 +ffffffff82a414b8 r mtl_c10_hdmi_162000 +ffffffff82a414d4 r mtl_c10_hdmi_167000 +ffffffff82a414f0 r mtl_c10_hdmi_197802 +ffffffff82a4150c r mtl_c10_hdmi_198000 +ffffffff82a41528 r mtl_c10_hdmi_209800 +ffffffff82a41544 r mtl_c10_hdmi_241500 +ffffffff82a41560 r mtl_c10_hdmi_262750 +ffffffff82a4157c r mtl_c10_hdmi_268500 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intel_lvds_connector_helper_funcs +ffffffff82a67540 r intel_dual_link_lvds +ffffffff82a68000 r power_state_map +ffffffff82a68030 r intel_no_opregion_vbt +ffffffff82a682e0 r intel_use_opregion_panel_type +ffffffff82a69000 r y_static_hcoeffs +ffffffff82a690b0 r uv_static_hcoeffs +ffffffff82a6a000 r intel_pmdemand_funcs +ffffffff82a6c014 r hsw_psr_setup_aux.aux_msg +ffffffff82a6d000 r rc_range_minqp420_8bpc +ffffffff82a6d100 r rc_range_minqp444_8bpc +ffffffff82a6d330 r rc_range_minqp420_10bpc +ffffffff82a6d490 r rc_range_minqp444_10bpc +ffffffff82a6d770 r rc_range_minqp420_12bpc +ffffffff82a6d930 r rc_range_minqp444_12bpc +ffffffff82a6dcd0 r rc_range_maxqp420_8bpc +ffffffff82a6ddd0 r rc_range_maxqp444_8bpc +ffffffff82a6e000 r rc_range_maxqp420_10bpc +ffffffff82a6e160 r rc_range_maxqp444_10bpc +ffffffff82a6e440 r rc_range_maxqp420_12bpc +ffffffff82a6e600 r rc_range_maxqp444_12bpc +ffffffff82a6f000 r intel_quirks +ffffffff82a6f240 r .compoundliteral +ffffffff82a6f648 r .compoundliteral.4 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dg2_hdmi_148_5 +ffffffff82a713f0 r dg2_hdmi_297 +ffffffff82a71414 r dg2_hdmi_594 +ffffffff82a71438 r dg2_hdmi_25200 +ffffffff82a7145c r dg2_hdmi_27027 +ffffffff82a71480 r dg2_hdmi_28320 +ffffffff82a714a4 r dg2_hdmi_30240 +ffffffff82a714c8 r dg2_hdmi_31500 +ffffffff82a714ec r dg2_hdmi_36000 +ffffffff82a71510 r dg2_hdmi_40000 +ffffffff82a71534 r dg2_hdmi_49500 +ffffffff82a71558 r dg2_hdmi_50000 +ffffffff82a7157c r dg2_hdmi_57284 +ffffffff82a715a0 r dg2_hdmi_58000 +ffffffff82a715c4 r dg2_hdmi_65000 +ffffffff82a715e8 r dg2_hdmi_71000 +ffffffff82a7160c r dg2_hdmi_74176 +ffffffff82a71630 r dg2_hdmi_75000 +ffffffff82a71654 r dg2_hdmi_78750 +ffffffff82a71678 r dg2_hdmi_85500 +ffffffff82a7169c r dg2_hdmi_88750 +ffffffff82a716c0 r dg2_hdmi_106500 +ffffffff82a716e4 r dg2_hdmi_108000 +ffffffff82a71708 r dg2_hdmi_115500 +ffffffff82a7172c r dg2_hdmi_119000 +ffffffff82a71750 r dg2_hdmi_135000 +ffffffff82a71774 r dg2_hdmi_138500 +ffffffff82a71798 r dg2_hdmi_147160 +ffffffff82a717bc r dg2_hdmi_148352 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r600_encode_pci_lane_width.encoded_lanes +ffffffff82ae6000 r r100_gfx_ring +ffffffff82ae6070 r r300_gfx_ring +ffffffff82ae60e0 r rv515_gfx_ring +ffffffff82ae6150 r r600_gfx_ring +ffffffff82ae61c0 r r600_dma_ring +ffffffff82ae6230 r rv6xx_uvd_ring +ffffffff82ae62a0 r rv770_uvd_ring +ffffffff82ae6310 r evergreen_gfx_ring +ffffffff82ae6380 r evergreen_dma_ring +ffffffff82ae63f0 r cayman_gfx_ring +ffffffff82ae6460 r cayman_dma_ring +ffffffff82ae64d0 r cayman_uvd_ring +ffffffff82ae6540 r trinity_vce_ring +ffffffff82ae65b0 r si_gfx_ring +ffffffff82ae6620 r si_dma_ring +ffffffff82ae6690 r ci_gfx_ring +ffffffff82ae6700 r ci_cp_ring +ffffffff82ae6770 r ci_dma_ring +ffffffff82ae67e0 r ci_vce_ring +ffffffff82ae7000 r object_connector_convert +ffffffff82ae7060 r supported_devices_connector_convert +ffffffff82ae70a0 r supported_devices_connector_object_id_convert +ffffffff82ae70c0 r thermal_controller_names +ffffffff82ae7100 r pp_lib_thermal_controller_names +ffffffff82ae8000 r pin_offsets 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radeon_tmds_pll_enum_list +ffffffff82aed080 r radeon_tv_std_enum_list +ffffffff82aed100 r radeon_underscan_enum_list +ffffffff82aed130 r radeon_audio_enum_list +ffffffff82aed160 r radeon_dither_enum_list +ffffffff82aed180 r radeon_output_csc_enum_list +ffffffff82aed1c0 r radeon_crtc_funcs +ffffffff82aed280 r hpd_names +ffffffff82aed2b0 r encoder_names +ffffffff82aed3e0 r radeon_afmt_init.eg_offsets +ffffffff82aee000 r aux_offset +ffffffff82aef000 R radeondrm_ca +ffffffff82aef030 r pciidlist +ffffffff82af31d0 r kms_driver +ffffffff82af32c0 r radeon_ioctls_kms +ffffffff82af4000 r radeon_fbdev_fb_helper_funcs +ffffffff82af4010 r radeon_fbdev_client_funcs +ffffffff82af4030 r radeon_fbdev_fb_ops +ffffffff82af5000 R radeon_fence_ops +ffffffff82af7000 R radeon_gem_object_funcs +ffffffff82af7070 r radeon_gem_vm_ops +ffffffff82af8000 r radeon_i2c_algo +ffffffff82af8010 r radeon_atom_i2c_algo +ffffffff82af9000 r legacy_helper_funcs +ffffffff82afa000 r radeon_backlight_ops +ffffffff82afa018 r radeon_legacy_lvds_enc_funcs +ffffffff82afa038 r radeon_legacy_lvds_helper_funcs +ffffffff82afa0a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82afa0c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82afa128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82afa148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82afa1b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82afa1d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82afa238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82afa258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82afb000 r SLOPE_value +ffffffff82afb030 r YCOEF_EN_value +ffffffff82afb060 r YCOEF_value +ffffffff82afb090 r available_tv_modes +ffffffff82afb110 r hor_timing_NTSC +ffffffff82afb150 r vert_timing_NTSC +ffffffff82afb190 r hor_timing_PAL +ffffffff82afb1d0 r vert_timing_PAL +ffffffff82afd000 r radeon_pm_state_type_name +ffffffff82afe000 r radeon_evict_flags.placements +ffffffff82b01000 r rs600_reg_safe_bm +ffffffff82b03000 r rv515_reg_safe_bm +ffffffff82b04000 r dll_speed_table +ffffffff82b05000 r r7xx_golden_registers +ffffffff82b05090 r r7xx_golden_dyn_gpr_registers +ffffffff82b05100 r rv770ce_golden_registers +ffffffff82b05160 r rv770_golden_registers +ffffffff82b051b0 r rv770_mgcg_init +ffffffff82b058f0 r rv730_golden_registers +ffffffff82b05950 r rv730_mgcg_init +ffffffff82b05ee0 r rv710_golden_registers +ffffffff82b05f30 r rv710_mgcg_init +ffffffff82b061d0 r rv740_golden_registers +ffffffff82b06360 r rv740_mgcg_init +ffffffff82b08000 r rv730_smc_int_vectors +ffffffff82b08040 r rv710_smc_int_vectors +ffffffff82b08080 r rv740_smc_int_vectors +ffffffff82b080c0 r cypress_smc_int_vectors +ffffffff82b08100 r caicos_smc_int_vectors +ffffffff82b08140 r cayman_smc_int_vectors +ffffffff82b09000 r tahiti_io_mc_regs +ffffffff82b09120 r pitcairn_io_mc_regs +ffffffff82b09240 r verde_io_mc_regs +ffffffff82b09360 r oland_io_mc_regs +ffffffff82b09480 r hainan_io_mc_regs +ffffffff82b095a0 r crtc_offsets +ffffffff82b095c0 r si_disp_int_status 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si_SECT_CONTEXT_def_5 +ffffffff82b0bea8 r si_SECT_CONTEXT_def_6 +ffffffff82b0beb0 r si_SECT_CONTEXT_def_2 +ffffffff82b0c2f0 r si_SECT_CONTEXT_def_7 +ffffffff82b0c6a0 r mc_cg_registers +ffffffff82b0c6d0 r si_default_state +ffffffff82b0d000 r cac_weights_tahiti +ffffffff82b0d4d0 r lcac_tahiti +ffffffff82b0dba0 r cac_override_tahiti +ffffffff82b0dbb4 r powertune_data_tahiti +ffffffff82b0dbf0 r dte_data_tahiti +ffffffff82b0dcc0 r dte_data_new_zealand +ffffffff82b0dd90 r dte_data_malta +ffffffff82b0de60 r lcac_pitcairn +ffffffff82b0e530 r cac_override_pitcairn +ffffffff82b0e544 r powertune_data_pitcairn +ffffffff82b0e580 r lcac_cape_verde +ffffffff82b0e9d0 r cac_override_cape_verde +ffffffff82b0e9e4 r powertune_data_cape_verde +ffffffff82b0ea20 r cac_weights_cape_verde_pro +ffffffff82b0eef0 r cac_weights_heathrow +ffffffff82b0f3c0 r cac_weights_chelsea_xt +ffffffff82b0f890 r cac_weights_chelsea_pro +ffffffff82b0fd60 r cac_weights_cape_verde +ffffffff82b10230 r cac_weights_mars_pro +ffffffff82b10700 r lcac_mars_pro +ffffffff82b10a60 r cac_override_oland +ffffffff82b10a74 r powertune_data_mars_pro +ffffffff82b10ab0 r cac_weights_mars_xt +ffffffff82b10f80 r cac_weights_oland_pro +ffffffff82b11450 r cac_weights_oland_xt +ffffffff82b11920 r lcac_oland +ffffffff82b11c7c r powertune_data_oland +ffffffff82b11cc0 r cac_weights_hainan +ffffffff82b12184 r powertune_data_hainan +ffffffff82b121c0 r dte_data_aruba_pro +ffffffff82b12290 r dte_data_tahiti_pro +ffffffff82b12360 r dte_data_curacao_pro +ffffffff82b12430 r dte_data_neptune_xt +ffffffff82b12500 r dte_data_sun_xt +ffffffff82b125d0 r dte_data_venus_xtx +ffffffff82b126a0 r dte_data_venus_xt +ffffffff82b12770 r dte_data_venus_pro +ffffffff82b12840 r dte_data_mars_pro +ffffffff82b13000 r si_program_jump_on_start.data +ffffffff82b14000 r sumo_dtc +ffffffff82b15000 r trinity_mgcg_shls_default +ffffffff82b15380 r trinity_sysls_enable +ffffffff82b15450 r trinity_sysls_disable +ffffffff82b17000 r GC_BASE +ffffffff82b170a8 r HDP_BASE +ffffffff82b17150 r MMHUB_BASE +ffffffff82b171f8 r ATHUB_BASE +ffffffff82b172a0 r NBIO_BASE +ffffffff82b17348 r MP0_BASE +ffffffff82b173f0 r MP1_BASE +ffffffff82b17498 r DF_BASE +ffffffff82b17540 r OSSSYS_BASE +ffffffff82b175e8 r SDMA0_BASE +ffffffff82b17690 r SDMA1_BASE +ffffffff82b17738 r SDMA2_BASE +ffffffff82b177e0 r SDMA3_BASE +ffffffff82b17888 r SDMA4_BASE +ffffffff82b17930 r SMUIO_BASE +ffffffff82b179d8 r THM_BASE +ffffffff82b17a80 r UMC_BASE +ffffffff82b17b28 r VCN_BASE +ffffffff82b18000 r amdgpu_afmt_predefined_acr +ffffffff82b19000 r atom_op_names +ffffffff82b193e0 r opcode_table +ffffffff82b19bd0 r atom_dst_to_src +ffffffff82b19c50 r atom_io_names +ffffffff82b19c80 r atom_table_names +ffffffff82b19ed0 r atom_iio_len +ffffffff82b1a000 r object_connector_convert +ffffffff82b1a058 R amdgpu_vbios_version_attr_group +ffffffff82b1b000 r voltage_names +ffffffff82b1b020 r pre_emph_names +ffffffff82b1c000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82b1e000 r amdgpu_benchmark.common_modes +ffffffff82b1f000 r amdgpu_cgs_ops +ffffffff82b20000 r amdgpu_connector_dp_funcs +ffffffff82b20078 r amdgpu_connector_dp_helper_funcs +ffffffff82b200d8 r amdgpu_connector_edp_funcs +ffffffff82b20150 r amdgpu_connector_vga_funcs +ffffffff82b201c8 r amdgpu_connector_vga_helper_funcs +ffffffff82b20228 r amdgpu_connector_dvi_funcs +ffffffff82b202a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82b20300 r amdgpu_connector_lvds_funcs +ffffffff82b20378 r amdgpu_connector_lvds_helper_funcs +ffffffff82b203e0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82b22000 R amdgpu_ctx_num_entities +ffffffff82b23000 r amdgpu_kms_driver +ffffffff82b230f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82b24000 r hw_id_map +ffffffff82b24090 r hw_id_names +ffffffff82b25000 r hpd_names +ffffffff82b25030 r encoder_names +ffffffff82b25180 r dcc_retile_formats +ffffffff82b25270 r dcc_formats +ffffffff82b25360 R amdgpu_mode_funcs +ffffffff82b253b0 r amdgpu_underscan_enum_list +ffffffff82b253e0 r amdgpu_audio_enum_list +ffffffff82b25410 r amdgpu_dither_enum_list +ffffffff82b25430 r amdgpu_fb_funcs_atomic +ffffffff82b25448 r amdgpu_fb_funcs +ffffffff82b26000 R amdgpu_dmabuf_ops +ffffffff82b27000 R amdgpu_ioctls_kms +ffffffff82b27210 R amdgpu_partition_driver +ffffffff82b272f8 R amdgpu_ca +ffffffff82b27320 r pciidlist +ffffffff82b281f0 r amdgpu_unsupported_pciidlist +ffffffff82b28770 r amdgpu_kms_driver +ffffffff82b29000 r amdgpu_job_fence_ops +ffffffff82b29040 r amdgpu_fence_ops +ffffffff82b2a000 r amdgpu_gem_object_funcs +ffffffff82b2a070 r amdgpu_gem_vm_ops +ffffffff82b2b000 R amdgpu_gtt_mgr_attr_group +ffffffff82b2b018 r amdgpu_gtt_mgr_func +ffffffff82b2c000 r amdgpu_atombios_i2c_algo +ffffffff82b2d000 R node_id_to_phys_map +ffffffff82b2e000 R amdgpu_sched_ops +ffffffff82b30000 r amdgpu_vram_names +ffffffff82b31000 r amdgpu_preempt_mgr_func +ffffffff82b32000 R psp_ip_funcs +ffffffff82b320a0 R psp_v3_1_ip_block +ffffffff82b320b8 R psp_v10_0_ip_block +ffffffff82b320d0 R psp_v11_0_ip_block +ffffffff82b320e8 R psp_v11_0_8_ip_block +ffffffff82b32100 R psp_v12_0_ip_block +ffffffff82b32118 R psp_v13_0_ip_block +ffffffff82b32130 R psp_v13_0_4_ip_block +ffffffff82b34000 r sw_ring_info +ffffffff82b35000 r amdgpu_evict_flags.placements +ffffffff82b39000 R amdgpu_vkms_ip_block +ffffffff82b3a000 R amdgpu_vm_cpu_funcs +ffffffff82b3c000 R amdgpu_vm_sdma_funcs +ffffffff82b3d000 R amdgpu_vram_mgr_attr_group +ffffffff82b3d018 r amdgpu_vram_mgr_func +ffffffff82b3d040 r amdgpu_dummy_vram_mgr_func +ffffffff82b3e000 r xgmi_pcs_err_status_reg_arct +ffffffff82b3e020 r xgmi3x16_pcs_ras_fields +ffffffff82b3e1f0 r xgmi_pcs_ras_fields +ffffffff82b3e310 r wafl_pcs_ras_fields +ffffffff82b3f000 r GC_BASE +ffffffff82b3f0c0 r HDP_BASE +ffffffff82b3f180 r MMHUB_BASE +ffffffff82b3f240 r ATHUB_BASE +ffffffff82b3f300 r NBIF0_BASE +ffffffff82b3f3c0 r MP0_BASE +ffffffff82b3f480 r MP1_BASE +ffffffff82b3f540 r UVD_BASE +ffffffff82b3f600 r DF_BASE +ffffffff82b3f6c0 r OSSSYS_BASE +ffffffff82b3f780 r SDMA0_BASE +ffffffff82b3f840 r SDMA1_BASE +ffffffff82b3f900 r SDMA2_BASE +ffffffff82b3f9c0 r SDMA3_BASE +ffffffff82b3fa80 r SDMA4_BASE +ffffffff82b3fb40 r SDMA5_BASE +ffffffff82b3fc00 r SDMA6_BASE +ffffffff82b3fcc0 r SDMA7_BASE +ffffffff82b3fd80 r SMUIO_BASE +ffffffff82b3fe40 r THM_BASE +ffffffff82b3ff00 r UMC_BASE +ffffffff82b3ffc0 r RSMU_BASE +ffffffff82b41000 r cz_ih_ip_funcs +ffffffff82b410a0 R cz_ih_ip_block +ffffffff82b410b8 r cz_ih_funcs ffffffff82b42000 r crtc_offsets -ffffffff82b42020 r dce_v11_0_ip_funcs -ffffffff82b420c0 R dce_v11_0_ip_block -ffffffff82b420d8 R dce_v11_2_ip_block -ffffffff82b420f0 r dce_v11_0_display_funcs +ffffffff82b42020 r dce_v10_0_ip_funcs +ffffffff82b420c0 R dce_v10_0_ip_block +ffffffff82b420d8 R dce_v10_1_ip_block +ffffffff82b420f0 r dce_v10_0_display_funcs ffffffff82b42150 r hpd_offsets -ffffffff82b42168 r dce_v11_0_encoder_funcs -ffffffff82b42188 r dce_v11_0_dac_helper_funcs -ffffffff82b421f0 r dce_v11_0_dig_helper_funcs -ffffffff82b42258 r dce_v11_0_ext_helper_funcs -ffffffff82b422c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82b422f0 r dce_v11_0_crtc_irq_funcs -ffffffff82b42300 r dce_v11_0_pageflip_irq_funcs -ffffffff82b42310 r dce_v11_0_hpd_irq_funcs +ffffffff82b42168 r dce_v10_0_encoder_funcs +ffffffff82b42188 r dce_v10_0_dac_helper_funcs +ffffffff82b421f0 r dce_v10_0_dig_helper_funcs +ffffffff82b42258 r dce_v10_0_ext_helper_funcs +ffffffff82b422c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82b422f0 r dce_v10_0_crtc_irq_funcs +ffffffff82b42300 r dce_v10_0_pageflip_irq_funcs +ffffffff82b42310 r dce_v10_0_hpd_irq_funcs ffffffff82b42320 r interrupt_status_offsets -ffffffff82b42380 r dce_v11_0_crtc_funcs -ffffffff82b42440 r dce_v11_0_crtc_helper_funcs +ffffffff82b42380 r dce_v10_0_crtc_funcs +ffffffff82b42440 r dce_v10_0_crtc_helper_funcs ffffffff82b424c0 r vga_control_regs ffffffff82b424e0 r dig_offsets -ffffffff82b42510 r cz_mgcg_cgcg_init -ffffffff82b42530 r cz_golden_settings_a11 -ffffffff82b42550 r stoney_golden_settings_a11 -ffffffff82b42570 r polaris11_golden_settings_a11 -ffffffff82b425b0 r polaris10_golden_settings_a11 -ffffffff82b43000 R df_v1_7_funcs -ffffffff82b43070 r df_v1_7_channel_number -ffffffff82b44000 R df_v3_6_funcs -ffffffff82b44070 r df_v3_6_channel_number -ffffffff82b45000 R df_v4_3_funcs -ffffffff82b46000 r GC_BASE -ffffffff82b460a8 r HDP_BASE -ffffffff82b46150 r MMHUB_BASE -ffffffff82b461f8 r ATHUB_BASE -ffffffff82b462a0 r NBIO_BASE -ffffffff82b46348 r MP0_BASE -ffffffff82b463f0 r MP1_BASE -ffffffff82b46498 r VCN0_BASE -ffffffff82b46540 r DF_BASE -ffffffff82b465e8 r DCN_BASE -ffffffff82b46690 r OSSSYS_BASE -ffffffff82b46738 r SMUIO_BASE -ffffffff82b467e0 r THM_BASE -ffffffff82b47000 r gfx_v10_0_ip_funcs -ffffffff82b470a0 R gfx_v10_0_ip_block -ffffffff82b470b8 r gfx_v10_0_gfx_funcs -ffffffff82b47120 r golden_settings_gc_rlc_spm_10_0_nv10 -ffffffff82b4d3c0 r golden_settings_gc_rlc_spm_10_1_nv14 -ffffffff82b50de0 r golden_settings_gc_rlc_spm_10_1_2_nv12 -ffffffff82b57080 r gfx_v10_0_kiq_pm4_funcs -ffffffff82b570c0 r gfx_v10_0_ring_funcs_kiq -ffffffff82b57200 r gfx_v10_0_ring_funcs_gfx -ffffffff82b57340 r gfx_v10_0_ring_funcs_compute -ffffffff82b57480 r gfx_v10_0_eop_irq_funcs -ffffffff82b57490 r gfx_v10_0_kiq_irq_funcs -ffffffff82b574a0 r gfx_v10_0_priv_reg_irq_funcs -ffffffff82b574b0 r gfx_v10_0_priv_inst_irq_funcs -ffffffff82b574c0 r gfx_v10_0_rlc_funcs -ffffffff82b57528 r gfx_v10_0_rlc_funcs_sriov -ffffffff82b57590 r gfx10_cs_data -ffffffff82b575b0 r gfx10_SECT_CONTEXT_defs -ffffffff82b57640 r gfx10_SECT_CONTEXT_def_1 -ffffffff82b579a0 r gfx10_SECT_CONTEXT_def_3 -ffffffff82b579b0 r gfx10_SECT_CONTEXT_def_4 -ffffffff82b57c28 r gfx10_SECT_CONTEXT_def_5 -ffffffff82b57c30 r gfx10_SECT_CONTEXT_def_6 -ffffffff82b57c40 r gfx10_SECT_CONTEXT_def_2 -ffffffff82b58080 r gfx10_SECT_CONTEXT_def_7 -ffffffff82b58190 r gfx10_SECT_CONTEXT_def_8 -ffffffff82b584c0 r golden_settings_gc_10_1 -ffffffff82b58880 r golden_settings_gc_10_0_nv10 -ffffffff82b58880 r golden_settings_gc_10_1_1 -ffffffff82b58c10 r golden_settings_gc_10_1_2 -ffffffff82b58c10 r golden_settings_gc_10_1_nv14 -ffffffff82b59000 r golden_settings_gc_10_1_2_nv12 -ffffffff82b59000 r golden_settings_gc_10_3 -ffffffff82b59408 r golden_settings_gc_10_3_sienna_cichlid -ffffffff82b59410 r golden_settings_gc_10_3_2 -ffffffff82b59800 r golden_settings_gc_10_3_vangogh -ffffffff82b59a60 r golden_settings_gc_10_3_3 -ffffffff82b59c40 r golden_settings_gc_10_3_4 -ffffffff82b59fa0 r golden_settings_gc_10_3_5 -ffffffff82b5a2a0 r golden_settings_gc_10_0_cyan_skillfish -ffffffff82b5a5d0 r golden_settings_gc_10_3_6 -ffffffff82b5a7e0 r golden_settings_gc_10_3_7 -ffffffff82b5b000 r gfx_v11_0_ip_funcs -ffffffff82b5b0a0 R gfx_v11_0_ip_block -ffffffff82b5b0b8 r gfx_v11_0_gfx_funcs -ffffffff82b5b118 r gfx_v11_0_kiq_pm4_funcs -ffffffff82b5b158 r gfx_v11_0_ring_funcs_kiq -ffffffff82b5b298 r gfx_v11_0_ring_funcs_gfx -ffffffff82b5b3d8 r gfx_v11_0_ring_funcs_compute -ffffffff82b5b518 r gfx_v11_0_eop_irq_funcs -ffffffff82b5b528 r gfx_v11_0_priv_reg_irq_funcs -ffffffff82b5b538 r gfx_v11_0_priv_inst_irq_funcs -ffffffff82b5b548 r gfx_v11_0_rlc_gc_fed_irq_funcs -ffffffff82b5b558 r gfx_v11_0_rlc_funcs -ffffffff82b5b5c0 r gfx11_cs_data -ffffffff82b5b5e0 r gfx11_SECT_CONTEXT_defs -ffffffff82b5b660 r gfx11_SECT_CONTEXT_def_1 -ffffffff82b5b9c0 r gfx11_SECT_CONTEXT_def_3 -ffffffff82b5b9d0 r gfx11_SECT_CONTEXT_def_5 -ffffffff82b5b9d8 r gfx11_SECT_CONTEXT_def_6 -ffffffff82b5b9e0 r gfx11_SECT_CONTEXT_def_2 -ffffffff82b5be20 r gfx11_SECT_CONTEXT_def_4 -ffffffff82b5c0a0 r gfx11_SECT_CONTEXT_def_7 -ffffffff82b5c510 r golden_settings_gc_11_0_1 -ffffffff82b5c5f0 r golden_settings_gc_11_0 -ffffffff82b5d000 r gfx_v8_0_ip_funcs -ffffffff82b5d0a0 R gfx_v8_0_ip_block -ffffffff82b5d0b8 R gfx_v8_1_ip_block -ffffffff82b5d0d0 r gfx_v8_0_gfx_funcs -ffffffff82b5d130 r gfx_v8_0_ring_funcs_kiq -ffffffff82b5d270 r gfx_v8_0_ring_funcs_gfx -ffffffff82b5d3b0 r gfx_v8_0_ring_funcs_compute -ffffffff82b5d4f0 r amdgpu_gds_reg_offset -ffffffff82b5d5f0 r gfx_v8_0_eop_irq_funcs -ffffffff82b5d600 r gfx_v8_0_priv_reg_irq_funcs -ffffffff82b5d610 r gfx_v8_0_priv_inst_irq_funcs -ffffffff82b5d620 r gfx_v8_0_cp_ecc_error_irq_funcs -ffffffff82b5d630 r gfx_v8_0_sq_irq_funcs -ffffffff82b5d640 r sq_edc_source_names -ffffffff82b5d678 r iceland_rlc_funcs -ffffffff82b5d6e0 r vi_cs_data -ffffffff82b5d700 r vi_SECT_CONTEXT_defs -ffffffff82b5d780 r vi_SECT_CONTEXT_def_1 -ffffffff82b5dad0 r vi_SECT_CONTEXT_def_3 -ffffffff82b5daf0 r vi_SECT_CONTEXT_def_4 -ffffffff82b5dd64 r vi_SECT_CONTEXT_def_5 -ffffffff82b5dd6c r vi_SECT_CONTEXT_def_6 -ffffffff82b5dd70 r vi_SECT_CONTEXT_def_2 -ffffffff82b5e1c0 r vi_SECT_CONTEXT_def_7 -ffffffff82b5e570 r vgpr_init_compute_shader -ffffffff82b5e680 r vgpr_init_regs -ffffffff82b5e710 r sgpr1_init_regs -ffffffff82b5e7a0 r sgpr2_init_regs -ffffffff82b5e830 r sec_ded_counter_registers -ffffffff82b5e8a0 r iceland_mgcg_cgcg_init -ffffffff82b5eba0 r golden_settings_iceland_a11 -ffffffff82b5ec60 r iceland_golden_common_all -ffffffff82b5ecc0 r fiji_mgcg_cgcg_init -ffffffff82b5ee70 r golden_settings_fiji_a10 -ffffffff82b5ef00 r fiji_golden_common_all -ffffffff82b5ef80 r tonga_mgcg_cgcg_init -ffffffff82b5f310 r golden_settings_tonga_a11 -ffffffff82b5f3d0 r tonga_golden_common_all -ffffffff82b5f430 r golden_settings_vegam_a11 -ffffffff82b5f500 r vegam_golden_common_all -ffffffff82b5f550 r golden_settings_polaris11_a11 -ffffffff82b5f620 r polaris11_golden_common_all -ffffffff82b5f670 r golden_settings_polaris10_a11 -ffffffff82b5f740 r polaris10_golden_common_all -ffffffff82b5f7a0 r cz_mgcg_cgcg_init -ffffffff82b5fb30 r cz_golden_settings_a11 -ffffffff82b5fbc0 r cz_golden_common_all -ffffffff82b5fc20 r stoney_mgcg_cgcg_init -ffffffff82b5fc60 r stoney_golden_settings_a11 -ffffffff82b5fce0 r stoney_golden_common_all -ffffffff82b60000 R gfx_v9_0_ras_ops -ffffffff82b60040 r gfx_v9_0_ip_funcs -ffffffff82b600e0 R gfx_v9_0_ip_block -ffffffff82b60100 r ras_gfx_subblocks -ffffffff82b60b80 r gfx_v9_0_edc_counter_regs -ffffffff82b60f20 r gfx_v9_0_ras_fields -ffffffff82b62000 r gfx_v9_0_gfx_funcs -ffffffff82b62060 r gfx_v9_0_kiq_pm4_funcs -ffffffff82b620a0 r gfx_v9_0_ring_funcs_kiq -ffffffff82b621e0 r gfx_v9_0_ring_funcs_gfx -ffffffff82b62320 r gfx_v9_0_sw_ring_funcs_gfx -ffffffff82b62460 r gfx_v9_0_ring_funcs_compute -ffffffff82b625a0 r gfx_v9_0_eop_irq_funcs -ffffffff82b625b0 r gfx_v9_0_priv_reg_irq_funcs -ffffffff82b625c0 r gfx_v9_0_priv_inst_irq_funcs -ffffffff82b625d0 r gfx_v9_0_cp_ecc_error_irq_funcs -ffffffff82b625e0 r gfx_v9_0_rlc_funcs -ffffffff82b62650 r gfx9_cs_data -ffffffff82b62670 r gfx9_SECT_CONTEXT_defs -ffffffff82b62700 r gfx9_SECT_CONTEXT_def_1 -ffffffff82b62a50 r gfx9_SECT_CONTEXT_def_3 -ffffffff82b62a60 r gfx9_SECT_CONTEXT_def_4 -ffffffff82b62cd4 r gfx9_SECT_CONTEXT_def_5 -ffffffff82b62cdc r gfx9_SECT_CONTEXT_def_6 -ffffffff82b62ce0 r gfx9_SECT_CONTEXT_def_7 -ffffffff82b62df0 r gfx9_SECT_CONTEXT_def_2 -ffffffff82b63260 r gfx9_SECT_CONTEXT_def_8 -ffffffff82b634d0 r vgpr_init_compute_shader_arcturus -ffffffff82b63d60 r vgpr_init_regs_arcturus -ffffffff82b63ef0 r vgpr_init_regs -ffffffff82b64080 r sgpr1_init_regs -ffffffff82b64210 r sgpr2_init_regs -ffffffff82b643a0 r golden_settings_gc_9_0 -ffffffff82b64580 r golden_settings_gc_9_0_vg10 -ffffffff82b64730 r golden_settings_gc_9_2_1 -ffffffff82b648b0 r golden_settings_gc_9_2_1_vg12 -ffffffff82b649f0 r golden_settings_gc_9_0_vg20 -ffffffff82b64b00 r golden_settings_gc_9_4_1_arct -ffffffff82b64c10 r golden_settings_gc_9_1 -ffffffff82b64e50 r golden_settings_gc_9_1_rv2 -ffffffff82b65020 r golden_settings_gc_9_1_rv1 -ffffffff82b650d0 r golden_settings_gc_9_1_rn -ffffffff82b651f0 r golden_settings_gc_9_x_common -ffffffff82b66000 R gfx_v9_4_ras_ops -ffffffff82b66040 r gfx_v9_4_edc_counter_regs -ffffffff82b66420 r gfx_v9_4_ras_fields -ffffffff82b68000 R vgpr_init_regs_aldebaran -ffffffff82b681b0 R sgpr112_init_regs_aldebaran -ffffffff82b68360 R sgpr96_init_regs_aldebaran -ffffffff82b68510 R sgpr64_init_regs_aldebaran -ffffffff82b686c0 r golden_settings_gc_9_4_2_alde -ffffffff82b68720 r golden_settings_gc_9_4_2_alde_die_0 -ffffffff82b687b0 r golden_settings_gc_9_4_2_alde_die_1 -ffffffff82b68840 r sgpr112_init_compute_shader_aldebaran -ffffffff82b68a60 r sgpr96_init_compute_shader_aldebaran -ffffffff82b68c50 r sgpr64_init_compute_shader_aldebaran -ffffffff82b68dc0 r vgpr_init_compute_shader_aldebaran -ffffffff82b696a0 r gfx_v9_4_2_edc_counter_regs -ffffffff82b69a20 r gfx_v9_4_2_ras_fields -ffffffff82b6b3c0 r gfx_v9_4_2_utc_blocks -ffffffff82b6c000 r gfx_v9_4_3_ip_funcs -ffffffff82b6c0a0 R gfx_v9_4_3_ip_block -ffffffff82b6c0b8 r gfx_v9_4_3_kiq_pm4_funcs -ffffffff82b6c0f8 r gfx_v9_4_3_ring_funcs_kiq -ffffffff82b6c238 r gfx_v9_4_3_ring_funcs_compute -ffffffff82b6c378 r gfx_v9_4_3_eop_irq_funcs -ffffffff82b6c388 r gfx_v9_4_3_priv_reg_irq_funcs -ffffffff82b6c398 r gfx_v9_4_3_priv_inst_irq_funcs -ffffffff82b6c3a8 r gfx_v9_4_3_rlc_funcs -ffffffff82b6c410 r gfx_v9_4_3_gfx_funcs -ffffffff82b6c470 r gfx_v9_4_3_ce_reg_list -ffffffff82b6c800 r gfx_v9_4_3_ras_mem_list_array -ffffffff82b6c960 r gfx_v9_4_3_ue_reg_list -ffffffff82b6cd20 r gfx_v9_4_3_ras_cp_mem_list -ffffffff82b6cd70 r gfx_v9_4_3_ras_gcea_mem_list -ffffffff82b6ceb0 r gfx_v9_4_3_ras_gc_cane_mem_list -ffffffff82b6cec0 r gfx_v9_4_3_ras_gcutcl2_mem_list -ffffffff82b6ced0 r gfx_v9_4_3_ras_gds_mem_list -ffffffff82b6cee0 r gfx_v9_4_3_ras_lds_mem_list -ffffffff82b6d100 r gfx_v9_4_3_ras_rlc_mem_list -ffffffff82b6d180 r gfx_v9_4_3_ras_sp_mem_list -ffffffff82b6d190 r gfx_v9_4_3_ras_spi_mem_list -ffffffff82b6d1d0 r gfx_v9_4_3_ras_sqc_mem_list -ffffffff82b6d340 r gfx_v9_4_3_ras_sq_mem_list -ffffffff82b6d380 r gfx_v9_4_3_ras_ta_mem_list -ffffffff82b6d3d0 r gfx_v9_4_3_ras_tcc_mem_list -ffffffff82b6d3e0 r gfx_v9_4_3_ras_tca_mem_list -ffffffff82b6d3f0 r gfx_v9_4_3_ras_tci_mem_list -ffffffff82b6d400 r gfx_v9_4_3_ras_tcp_mem_list -ffffffff82b6d590 r gfx_v9_4_3_ras_td_mem_list -ffffffff82b6d5c0 r gfx_v9_4_3_ras_tcx_mem_list -ffffffff82b6db40 r gfx_v9_4_3_ras_atc_l2_mem_list -ffffffff82b6db50 r gfx_v9_4_3_ras_utcl2_mem_list -ffffffff82b6db60 r gfx_v9_4_3_ras_vml2_mem_list -ffffffff82b6db70 r gfx_v9_4_3_ras_vml2_walker_mem_list -ffffffff82b6e000 R gfxhub_v1_0_funcs -ffffffff82b6f000 R gfxhub_v1_2_funcs -ffffffff82b70000 R gfxhub_v2_0_funcs -ffffffff82b70060 r gfxhub_v2_0_vmhub_funcs -ffffffff82b70070 r gfxhub_client_ids -ffffffff82b71000 R gfxhub_v2_1_funcs -ffffffff82b71060 r gfxhub_v2_1_vmhub_funcs +ffffffff82b42500 r pin_offsets +ffffffff82b42520 r fiji_mgcg_cgcg_init +ffffffff82b42540 r golden_settings_fiji_a10 +ffffffff82b42570 r tonga_mgcg_cgcg_init +ffffffff82b42590 r golden_settings_tonga_a11 +ffffffff82b43000 r crtc_offsets +ffffffff82b43020 r dce_v11_0_ip_funcs +ffffffff82b430c0 R dce_v11_0_ip_block +ffffffff82b430d8 R dce_v11_2_ip_block +ffffffff82b430f0 r dce_v11_0_display_funcs +ffffffff82b43150 r hpd_offsets +ffffffff82b43168 r dce_v11_0_encoder_funcs +ffffffff82b43188 r dce_v11_0_dac_helper_funcs +ffffffff82b431f0 r dce_v11_0_dig_helper_funcs +ffffffff82b43258 r dce_v11_0_ext_helper_funcs +ffffffff82b432c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82b432f0 r dce_v11_0_crtc_irq_funcs +ffffffff82b43300 r dce_v11_0_pageflip_irq_funcs +ffffffff82b43310 r dce_v11_0_hpd_irq_funcs +ffffffff82b43320 r interrupt_status_offsets +ffffffff82b43380 r dce_v11_0_crtc_funcs +ffffffff82b43440 r dce_v11_0_crtc_helper_funcs +ffffffff82b434c0 r vga_control_regs +ffffffff82b434e0 r dig_offsets +ffffffff82b43510 r cz_mgcg_cgcg_init +ffffffff82b43530 r cz_golden_settings_a11 +ffffffff82b43550 r stoney_golden_settings_a11 +ffffffff82b43570 r polaris11_golden_settings_a11 +ffffffff82b435b0 r polaris10_golden_settings_a11 +ffffffff82b44000 R df_v1_7_funcs +ffffffff82b44070 r df_v1_7_channel_number +ffffffff82b45000 R df_v3_6_funcs +ffffffff82b45070 r df_v3_6_channel_number +ffffffff82b46000 R df_v4_3_funcs +ffffffff82b47000 r GC_BASE +ffffffff82b470a8 r HDP_BASE +ffffffff82b47150 r MMHUB_BASE +ffffffff82b471f8 r ATHUB_BASE +ffffffff82b472a0 r NBIO_BASE +ffffffff82b47348 r MP0_BASE +ffffffff82b473f0 r MP1_BASE +ffffffff82b47498 r VCN0_BASE +ffffffff82b47540 r DF_BASE +ffffffff82b475e8 r DCN_BASE +ffffffff82b47690 r OSSSYS_BASE +ffffffff82b47738 r SMUIO_BASE +ffffffff82b477e0 r THM_BASE +ffffffff82b48000 r gfx_v10_0_ip_funcs +ffffffff82b480a0 R gfx_v10_0_ip_block +ffffffff82b480b8 r gfx_v10_0_gfx_funcs +ffffffff82b48120 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82b4e3c0 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82b51de0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82b58080 r gfx_v10_0_kiq_pm4_funcs +ffffffff82b580c0 r gfx_v10_0_ring_funcs_kiq +ffffffff82b58200 r gfx_v10_0_ring_funcs_gfx +ffffffff82b58340 r gfx_v10_0_ring_funcs_compute +ffffffff82b58480 r gfx_v10_0_eop_irq_funcs +ffffffff82b58490 r gfx_v10_0_kiq_irq_funcs +ffffffff82b584a0 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82b584b0 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82b584c0 r gfx_v10_0_rlc_funcs +ffffffff82b58528 r gfx_v10_0_rlc_funcs_sriov +ffffffff82b58590 r gfx10_cs_data +ffffffff82b585b0 r gfx10_SECT_CONTEXT_defs +ffffffff82b58640 r gfx10_SECT_CONTEXT_def_1 +ffffffff82b589a0 r gfx10_SECT_CONTEXT_def_3 +ffffffff82b589b0 r gfx10_SECT_CONTEXT_def_4 +ffffffff82b58c28 r gfx10_SECT_CONTEXT_def_5 +ffffffff82b58c30 r gfx10_SECT_CONTEXT_def_6 +ffffffff82b58c40 r gfx10_SECT_CONTEXT_def_2 +ffffffff82b59080 r gfx10_SECT_CONTEXT_def_7 +ffffffff82b59190 r gfx10_SECT_CONTEXT_def_8 +ffffffff82b594c0 r golden_settings_gc_10_1 +ffffffff82b59880 r golden_settings_gc_10_0_nv10 +ffffffff82b59880 r golden_settings_gc_10_1_1 +ffffffff82b59c10 r golden_settings_gc_10_1_2 +ffffffff82b59c10 r golden_settings_gc_10_1_nv14 +ffffffff82b5a000 r golden_settings_gc_10_1_2_nv12 +ffffffff82b5a000 r golden_settings_gc_10_3 +ffffffff82b5a408 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82b5a410 r golden_settings_gc_10_3_2 +ffffffff82b5a800 r golden_settings_gc_10_3_vangogh +ffffffff82b5aa60 r golden_settings_gc_10_3_3 +ffffffff82b5ac40 r golden_settings_gc_10_3_4 +ffffffff82b5afa0 r golden_settings_gc_10_3_5 +ffffffff82b5b2a0 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82b5b5d0 r golden_settings_gc_10_3_6 +ffffffff82b5b7e0 r golden_settings_gc_10_3_7 +ffffffff82b5c000 r gfx_v11_0_ip_funcs +ffffffff82b5c0a0 R gfx_v11_0_ip_block +ffffffff82b5c0b8 r gfx_v11_0_gfx_funcs +ffffffff82b5c118 r gfx_v11_0_kiq_pm4_funcs +ffffffff82b5c158 r gfx_v11_0_ring_funcs_kiq +ffffffff82b5c298 r gfx_v11_0_ring_funcs_gfx +ffffffff82b5c3d8 r gfx_v11_0_ring_funcs_compute +ffffffff82b5c518 r gfx_v11_0_eop_irq_funcs +ffffffff82b5c528 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82b5c538 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82b5c548 r gfx_v11_0_rlc_gc_fed_irq_funcs +ffffffff82b5c558 r gfx_v11_0_rlc_funcs +ffffffff82b5c5c0 r gfx11_cs_data +ffffffff82b5c5e0 r gfx11_SECT_CONTEXT_defs +ffffffff82b5c660 r gfx11_SECT_CONTEXT_def_1 +ffffffff82b5c9c0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82b5c9d0 r gfx11_SECT_CONTEXT_def_5 +ffffffff82b5c9d8 r gfx11_SECT_CONTEXT_def_6 +ffffffff82b5c9e0 r gfx11_SECT_CONTEXT_def_2 +ffffffff82b5ce20 r gfx11_SECT_CONTEXT_def_4 +ffffffff82b5d0a0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82b5d510 r golden_settings_gc_11_0_1 +ffffffff82b5d5f0 r golden_settings_gc_11_0 +ffffffff82b5e000 r gfx_v8_0_ip_funcs +ffffffff82b5e0a0 R gfx_v8_0_ip_block +ffffffff82b5e0b8 R gfx_v8_1_ip_block +ffffffff82b5e0d0 r gfx_v8_0_gfx_funcs +ffffffff82b5e130 r gfx_v8_0_ring_funcs_kiq +ffffffff82b5e270 r gfx_v8_0_ring_funcs_gfx +ffffffff82b5e3b0 r gfx_v8_0_ring_funcs_compute +ffffffff82b5e4f0 r amdgpu_gds_reg_offset +ffffffff82b5e5f0 r gfx_v8_0_eop_irq_funcs +ffffffff82b5e600 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82b5e610 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82b5e620 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82b5e630 r gfx_v8_0_sq_irq_funcs +ffffffff82b5e640 r sq_edc_source_names +ffffffff82b5e678 r iceland_rlc_funcs +ffffffff82b5e6e0 r vi_cs_data +ffffffff82b5e700 r vi_SECT_CONTEXT_defs +ffffffff82b5e780 r vi_SECT_CONTEXT_def_1 +ffffffff82b5ead0 r vi_SECT_CONTEXT_def_3 +ffffffff82b5eaf0 r vi_SECT_CONTEXT_def_4 +ffffffff82b5ed64 r vi_SECT_CONTEXT_def_5 +ffffffff82b5ed6c r vi_SECT_CONTEXT_def_6 +ffffffff82b5ed70 r vi_SECT_CONTEXT_def_2 +ffffffff82b5f1c0 r vi_SECT_CONTEXT_def_7 +ffffffff82b5f570 r vgpr_init_compute_shader +ffffffff82b5f680 r vgpr_init_regs +ffffffff82b5f710 r sgpr1_init_regs +ffffffff82b5f7a0 r sgpr2_init_regs +ffffffff82b5f830 r sec_ded_counter_registers +ffffffff82b5f8a0 r iceland_mgcg_cgcg_init +ffffffff82b5fba0 r golden_settings_iceland_a11 +ffffffff82b5fc60 r iceland_golden_common_all +ffffffff82b5fcc0 r fiji_mgcg_cgcg_init +ffffffff82b5fe70 r golden_settings_fiji_a10 +ffffffff82b5ff00 r fiji_golden_common_all +ffffffff82b5ff80 r tonga_mgcg_cgcg_init +ffffffff82b60310 r golden_settings_tonga_a11 +ffffffff82b603d0 r tonga_golden_common_all +ffffffff82b60430 r golden_settings_vegam_a11 +ffffffff82b60500 r vegam_golden_common_all +ffffffff82b60550 r golden_settings_polaris11_a11 +ffffffff82b60620 r polaris11_golden_common_all +ffffffff82b60670 r golden_settings_polaris10_a11 +ffffffff82b60740 r polaris10_golden_common_all +ffffffff82b607a0 r cz_mgcg_cgcg_init +ffffffff82b60b30 r cz_golden_settings_a11 +ffffffff82b60bc0 r cz_golden_common_all +ffffffff82b60c20 r stoney_mgcg_cgcg_init +ffffffff82b60c60 r stoney_golden_settings_a11 +ffffffff82b60ce0 r stoney_golden_common_all +ffffffff82b61000 R gfx_v9_0_ras_ops +ffffffff82b61040 r gfx_v9_0_ip_funcs +ffffffff82b610e0 R gfx_v9_0_ip_block +ffffffff82b61100 r ras_gfx_subblocks +ffffffff82b61b80 r gfx_v9_0_edc_counter_regs +ffffffff82b61f20 r gfx_v9_0_ras_fields +ffffffff82b63000 r gfx_v9_0_gfx_funcs +ffffffff82b63060 r gfx_v9_0_kiq_pm4_funcs +ffffffff82b630a0 r gfx_v9_0_ring_funcs_kiq +ffffffff82b631e0 r gfx_v9_0_ring_funcs_gfx +ffffffff82b63320 r gfx_v9_0_sw_ring_funcs_gfx +ffffffff82b63460 r gfx_v9_0_ring_funcs_compute +ffffffff82b635a0 r gfx_v9_0_eop_irq_funcs +ffffffff82b635b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82b635c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82b635d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82b635e0 r gfx_v9_0_rlc_funcs +ffffffff82b63650 r gfx9_cs_data +ffffffff82b63670 r gfx9_SECT_CONTEXT_defs +ffffffff82b63700 r gfx9_SECT_CONTEXT_def_1 +ffffffff82b63a50 r gfx9_SECT_CONTEXT_def_3 +ffffffff82b63a60 r gfx9_SECT_CONTEXT_def_4 +ffffffff82b63cd4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82b63cdc r gfx9_SECT_CONTEXT_def_6 +ffffffff82b63ce0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82b63df0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82b64260 r gfx9_SECT_CONTEXT_def_8 +ffffffff82b644d0 r vgpr_init_compute_shader_arcturus +ffffffff82b64d60 r vgpr_init_regs_arcturus +ffffffff82b64ef0 r vgpr_init_regs +ffffffff82b65080 r sgpr1_init_regs +ffffffff82b65210 r sgpr2_init_regs +ffffffff82b653a0 r golden_settings_gc_9_0 +ffffffff82b65580 r golden_settings_gc_9_0_vg10 +ffffffff82b65730 r golden_settings_gc_9_2_1 +ffffffff82b658b0 r golden_settings_gc_9_2_1_vg12 +ffffffff82b659f0 r golden_settings_gc_9_0_vg20 +ffffffff82b65b00 r golden_settings_gc_9_4_1_arct +ffffffff82b65c10 r golden_settings_gc_9_1 +ffffffff82b65e50 r golden_settings_gc_9_1_rv2 +ffffffff82b66020 r golden_settings_gc_9_1_rv1 +ffffffff82b660d0 r golden_settings_gc_9_1_rn +ffffffff82b661f0 r golden_settings_gc_9_x_common +ffffffff82b67000 R gfx_v9_4_ras_ops +ffffffff82b67040 r gfx_v9_4_edc_counter_regs +ffffffff82b67420 r gfx_v9_4_ras_fields +ffffffff82b69000 R vgpr_init_regs_aldebaran +ffffffff82b691b0 R sgpr112_init_regs_aldebaran +ffffffff82b69360 R sgpr96_init_regs_aldebaran +ffffffff82b69510 R sgpr64_init_regs_aldebaran +ffffffff82b696c0 r golden_settings_gc_9_4_2_alde +ffffffff82b69720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82b697b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82b69840 r sgpr112_init_compute_shader_aldebaran +ffffffff82b69a60 r sgpr96_init_compute_shader_aldebaran +ffffffff82b69c50 r sgpr64_init_compute_shader_aldebaran +ffffffff82b69dc0 r vgpr_init_compute_shader_aldebaran +ffffffff82b6a6a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82b6aa20 r gfx_v9_4_2_ras_fields +ffffffff82b6c3c0 r gfx_v9_4_2_utc_blocks +ffffffff82b6d000 r gfx_v9_4_3_ip_funcs +ffffffff82b6d0a0 R gfx_v9_4_3_ip_block +ffffffff82b6d0b8 r gfx_v9_4_3_kiq_pm4_funcs +ffffffff82b6d0f8 r gfx_v9_4_3_ring_funcs_kiq +ffffffff82b6d238 r gfx_v9_4_3_ring_funcs_compute +ffffffff82b6d378 r gfx_v9_4_3_eop_irq_funcs +ffffffff82b6d388 r gfx_v9_4_3_priv_reg_irq_funcs +ffffffff82b6d398 r gfx_v9_4_3_priv_inst_irq_funcs +ffffffff82b6d3a8 r gfx_v9_4_3_rlc_funcs +ffffffff82b6d410 r gfx_v9_4_3_gfx_funcs +ffffffff82b6d470 r gfx_v9_4_3_ce_reg_list +ffffffff82b6d800 r gfx_v9_4_3_ras_mem_list_array +ffffffff82b6d960 r gfx_v9_4_3_ue_reg_list +ffffffff82b6dd20 r gfx_v9_4_3_ras_cp_mem_list +ffffffff82b6dd70 r gfx_v9_4_3_ras_gcea_mem_list +ffffffff82b6deb0 r gfx_v9_4_3_ras_gc_cane_mem_list +ffffffff82b6dec0 r gfx_v9_4_3_ras_gcutcl2_mem_list +ffffffff82b6ded0 r gfx_v9_4_3_ras_gds_mem_list +ffffffff82b6dee0 r gfx_v9_4_3_ras_lds_mem_list +ffffffff82b6e100 r gfx_v9_4_3_ras_rlc_mem_list +ffffffff82b6e180 r gfx_v9_4_3_ras_sp_mem_list +ffffffff82b6e190 r gfx_v9_4_3_ras_spi_mem_list +ffffffff82b6e1d0 r gfx_v9_4_3_ras_sqc_mem_list +ffffffff82b6e340 r gfx_v9_4_3_ras_sq_mem_list +ffffffff82b6e380 r gfx_v9_4_3_ras_ta_mem_list +ffffffff82b6e3d0 r gfx_v9_4_3_ras_tcc_mem_list +ffffffff82b6e3e0 r gfx_v9_4_3_ras_tca_mem_list +ffffffff82b6e3f0 r gfx_v9_4_3_ras_tci_mem_list +ffffffff82b6e400 r gfx_v9_4_3_ras_tcp_mem_list +ffffffff82b6e590 r gfx_v9_4_3_ras_td_mem_list +ffffffff82b6e5c0 r gfx_v9_4_3_ras_tcx_mem_list +ffffffff82b6eb40 r gfx_v9_4_3_ras_atc_l2_mem_list +ffffffff82b6eb50 r gfx_v9_4_3_ras_utcl2_mem_list +ffffffff82b6eb60 r gfx_v9_4_3_ras_vml2_mem_list +ffffffff82b6eb70 r gfx_v9_4_3_ras_vml2_walker_mem_list +ffffffff82b6f000 R gfxhub_v1_0_funcs +ffffffff82b70000 R gfxhub_v1_2_funcs +ffffffff82b71000 R gfxhub_v2_0_funcs +ffffffff82b71060 r gfxhub_v2_0_vmhub_funcs ffffffff82b71070 r gfxhub_client_ids -ffffffff82b72000 R gfxhub_v3_0_funcs -ffffffff82b72060 r gfxhub_v3_0_vmhub_funcs +ffffffff82b72000 R gfxhub_v2_1_funcs +ffffffff82b72060 r gfxhub_v2_1_vmhub_funcs ffffffff82b72070 r gfxhub_client_ids -ffffffff82b73000 R gfxhub_v3_0_3_funcs -ffffffff82b73060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82b73000 R gfxhub_v3_0_funcs +ffffffff82b73060 r gfxhub_v3_0_vmhub_funcs ffffffff82b73070 r gfxhub_client_ids -ffffffff82b74000 R gmc_v10_0_ip_funcs -ffffffff82b740a0 R gmc_v10_0_ip_block -ffffffff82b740b8 r gmc_v10_0_gmc_funcs -ffffffff82b74110 r gmc_v10_0_irq_funcs -ffffffff82b74120 r gmc_v10_0_ecc_funcs -ffffffff82b75000 R gmc_v11_0_ip_funcs -ffffffff82b750a0 R gmc_v11_0_ip_block -ffffffff82b750b8 r gmc_v11_0_gmc_funcs -ffffffff82b75110 r gmc_v11_0_irq_funcs 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stoney_mgcg_cgcg_init -ffffffff82b772a0 r golden_settings_stoney_common -ffffffff82b78000 R gmc_v9_0_ip_funcs -ffffffff82b780a0 R gmc_v9_0_ip_block -ffffffff82b780b8 r gmc_v9_0_gmc_funcs -ffffffff82b78110 r gmc_v9_0_irq_funcs -ffffffff82b78120 r gmc_v9_0_ecc_funcs -ffffffff82b78130 r gfxhub_client_ids -ffffffff82b781a0 r mmhub_client_ids_vega10 -ffffffff82b78490 r mmhub_client_ids_vega12 -ffffffff82b78790 r mmhub_client_ids_vega20 -ffffffff82b78a80 r mmhub_client_ids_arcturus -ffffffff82b7a290 r mmhub_client_ids_raven -ffffffff82b7a450 r mmhub_client_ids_renoir -ffffffff82b7a640 r mmhub_client_ids_aldebaran -ffffffff82b7be50 r ecc_umc_mcumc_ctrl_addrs -ffffffff82b7bed0 r ecc_umc_mcumc_ctrl_mask_addrs -ffffffff82b7bf50 r golden_settings_mmhub_1_0_0 -ffffffff82b7bf80 r golden_settings_athub_1_0_0 -ffffffff82b7c000 R hdp_v4_0_funcs -ffffffff82b7d000 R hdp_v5_0_funcs -ffffffff82b7e000 R hdp_v5_2_funcs -ffffffff82b7f000 R hdp_v6_0_funcs -ffffffff82b80000 r iceland_ih_ip_funcs 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vce_v4_0_irq_funcs -ffffffff82bcc000 r vcn_v1_0_ip_funcs -ffffffff82bcc0a0 R vcn_v1_0_ip_block -ffffffff82bcc0b8 r vcn_v1_0_dec_ring_vm_funcs -ffffffff82bcc1f8 r vcn_v1_0_enc_ring_vm_funcs -ffffffff82bcc338 r vcn_v1_0_irq_funcs -ffffffff82bcd000 r vcn_v2_0_ip_funcs -ffffffff82bcd0a0 R vcn_v2_0_ip_block -ffffffff82bcd0b8 r vcn_v2_0_dec_ring_vm_funcs -ffffffff82bcd1f8 r vcn_v2_0_enc_ring_vm_funcs -ffffffff82bcd338 r vcn_v2_0_irq_funcs -ffffffff82bce000 r vcn_v2_5_ip_funcs -ffffffff82bce0a0 R vcn_v2_5_ip_block -ffffffff82bce0b8 r vcn_v2_6_ip_funcs -ffffffff82bce158 R vcn_v2_6_ip_block -ffffffff82bce170 R vcn_v2_6_ras_hw_ops -ffffffff82bce1b0 r vcn_v2_5_dec_ring_vm_funcs -ffffffff82bce2f0 r vcn_v2_5_enc_ring_vm_funcs -ffffffff82bce430 r vcn_v2_5_irq_funcs -ffffffff82bce440 r vcn_v2_6_ras_irq_funcs -ffffffff82bcf000 r vcn_v3_0_ip_funcs -ffffffff82bcf0a0 R vcn_v3_0_ip_block -ffffffff82bcf0b8 r vcn_v3_0_dec_ring_vm_funcs -ffffffff82bcf1f8 r vcn_v3_0_enc_ring_vm_funcs -ffffffff82bcf338 r vcn_v3_0_irq_funcs -ffffffff82bd0000 r vcn_v4_0_ip_funcs -ffffffff82bd00a0 R vcn_v4_0_ip_block -ffffffff82bd00b8 R vcn_v4_0_ras_hw_ops -ffffffff82bd00f8 r vcn_v4_0_irq_funcs -ffffffff82bd0108 r vcn_v4_0_ras_irq_funcs -ffffffff82bd1000 r vcn_v4_0_3_ip_funcs -ffffffff82bd10a0 R vcn_v4_0_3_ip_block -ffffffff82bd10b8 r vcn_v4_0_3_unified_ring_vm_funcs -ffffffff82bd11f8 r vcn_v4_0_3_irq_funcs -ffffffff82bd1208 r vcn_v4_0_3_ras_hw_ops -ffffffff82bd1250 r vcn_v4_0_3_ue_reg_list -ffffffff82bd2000 R vega10_ih_ip_funcs -ffffffff82bd20a0 R vega10_ih_ip_block -ffffffff82bd20b8 r vega10_ih_funcs -ffffffff82bd20d8 r vega10_ih_self_irq_funcs -ffffffff82bd3000 r GC_BASE -ffffffff82bd3064 r HDP_BASE -ffffffff82bd30c8 r MMHUB_BASE -ffffffff82bd312c r ATHUB_BASE -ffffffff82bd3190 r NBIO_BASE -ffffffff82bd31f4 r MP0_BASE -ffffffff82bd3258 r MP1_BASE -ffffffff82bd32bc r VCE_BASE -ffffffff82bd3320 r VCN_BASE -ffffffff82bd3384 r DF_BASE -ffffffff82bd33e8 r DCE_BASE -ffffffff82bd344c r OSSSYS_BASE -ffffffff82bd34b0 r SDMA0_BASE -ffffffff82bd3514 r SDMA1_BASE -ffffffff82bd3578 r SMUIO_BASE -ffffffff82bd35dc r PWR_BASE -ffffffff82bd3640 r NBIF_BASE -ffffffff82bd36a4 r THM_BASE -ffffffff82bd3708 r CLK_BASE -ffffffff82bd4000 R vega20_ih_ip_funcs -ffffffff82bd40a0 R vega20_ih_ip_block -ffffffff82bd40b8 r vega20_ih_funcs -ffffffff82bd40d8 r vega20_ih_self_irq_funcs -ffffffff82bd5000 r GC_BASE -ffffffff82bd5090 r HDP_BASE -ffffffff82bd5120 r MMHUB_BASE -ffffffff82bd51b0 r ATHUB_BASE -ffffffff82bd5240 r NBIO_BASE -ffffffff82bd52d0 r MP0_BASE -ffffffff82bd5360 r MP1_BASE -ffffffff82bd53f0 r UVD_BASE -ffffffff82bd5480 r VCE_BASE -ffffffff82bd5510 r DF_BASE -ffffffff82bd55a0 r DCE_BASE -ffffffff82bd5630 r OSSSYS_BASE -ffffffff82bd56c0 r SDMA0_BASE -ffffffff82bd5750 r SDMA1_BASE -ffffffff82bd57e0 r SMUIO_BASE -ffffffff82bd5870 r THM_BASE -ffffffff82bd5900 r CLK_BASE -ffffffff82bd5990 r UMC_BASE -ffffffff82bd5a20 r RSMU_BASE -ffffffff82bd6000 r vi_common_ip_block -ffffffff82bd6018 r vi_common_ip_funcs -ffffffff82bd60b8 r vi_asic_funcs -ffffffff82bd6180 r vi_allowed_read_registers -ffffffff82bd63e0 r topaz_video_codecs_encode -ffffffff82bd63f0 r topaz_video_codecs_decode -ffffffff82bd6400 r tonga_video_codecs_encode -ffffffff82bd6410 r tonga_video_codecs_decode -ffffffff82bd6420 r polaris_video_codecs_encode -ffffffff82bd6430 r cz_video_codecs_decode -ffffffff82bd6440 r tonga_video_codecs_encode_array -ffffffff82bd6460 r tonga_video_codecs_decode_array -ffffffff82bd64b0 r polaris_video_codecs_encode_array -ffffffff82bd64e0 r cz_video_codecs_decode_array -ffffffff82bd6560 r iceland_mgcg_cgcg_init -ffffffff82bd65a0 r fiji_mgcg_cgcg_init -ffffffff82bd6600 r tonga_mgcg_cgcg_init -ffffffff82bd6660 r cz_mgcg_cgcg_init -ffffffff82bd66a0 r stoney_mgcg_cgcg_init -ffffffff82bd7000 r amdgpu_dm_funcs -ffffffff82bd70a0 R dm_ip_block -ffffffff82bd70b8 R amdgpu_dm_encoder_helper_funcs -ffffffff82bd7120 r dm_display_funcs -ffffffff82bd7180 r hpd_disconnect_quirk_table -ffffffff82bd7ef0 r amdgpu_dm_mode_funcs -ffffffff82bd7f38 r amdgpu_dm_audio_component_bind_ops -ffffffff82bd7f48 r amdgpu_dm_audio_component_ops -ffffffff82bd7f80 r amdgpu_dm_encoder_funcs -ffffffff82bd7fa0 r amdgpu_dm_connector_funcs -ffffffff82bd8018 r amdgpu_dm_connector_helper_funcs -ffffffff82bd8078 r amdgpu_dm_i2c_algo -ffffffff82bd8088 r amdgpu_dm_backlight_ops -ffffffff82bd8260 r add_fs_modes.common_rates -ffffffff82bd9000 r amdgpu_dm_crtc_funcs -ffffffff82bd90c0 r amdgpu_dm_crtc_helper_funcs -ffffffff82bda000 r dm_dtn_log_begin.msg -ffffffff82bda00d r dm_dtn_log_end.msg -ffffffff82bda018 r SYNAPTICS_DEVICE_ID -ffffffff82bdb000 r dm_crtc_irq_funcs -ffffffff82bdb010 r dm_vline0_irq_funcs -ffffffff82bdb020 r dm_dmub_outbox_irq_funcs -ffffffff82bdb030 r dm_vupdate_irq_funcs -ffffffff82bdb040 r dm_dmub_trace_irq_funcs -ffffffff82bdb050 r dm_pageflip_irq_funcs -ffffffff82bdb060 r dm_hpd_irq_funcs -ffffffff82bdc000 r amdgpu_dm_encoder_funcs -ffffffff82bdc020 r dm_mst_cbs -ffffffff82bdc030 r dm_dp_mst_connector_funcs -ffffffff82bdc0a8 r dm_dp_mst_connector_helper_funcs -ffffffff82bdd000 r dm_plane_funcs -ffffffff82bdd068 r dm_plane_helper_funcs -ffffffff82bdf000 r vbios_funcs +ffffffff82b74000 R gfxhub_v3_0_3_funcs +ffffffff82b74060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82b74070 r gfxhub_client_ids +ffffffff82b75000 R gmc_v10_0_ip_funcs +ffffffff82b750a0 R gmc_v10_0_ip_block +ffffffff82b750b8 r gmc_v10_0_gmc_funcs +ffffffff82b75110 r gmc_v10_0_irq_funcs +ffffffff82b75120 r gmc_v10_0_ecc_funcs +ffffffff82b76000 R gmc_v11_0_ip_funcs +ffffffff82b760a0 R gmc_v11_0_ip_block +ffffffff82b760b8 r gmc_v11_0_gmc_funcs +ffffffff82b76110 r gmc_v11_0_irq_funcs +ffffffff82b76120 r gmc_v11_0_ecc_funcs +ffffffff82b77000 r gmc_v7_0_ip_funcs +ffffffff82b770a0 R gmc_v7_0_ip_block +ffffffff82b770b8 R gmc_v7_4_ip_block +ffffffff82b770d0 r gmc_v7_0_gmc_funcs +ffffffff82b77128 r gmc_v7_0_irq_funcs +ffffffff82b77138 r iceland_mgcg_cgcg_init +ffffffff82b77150 r golden_settings_iceland_a11 +ffffffff82b77180 r mc_cg_registers +ffffffff82b771b0 r mc_cg_en +ffffffff82b771e0 r mc_cg_ls_en +ffffffff82b78000 r gmc_v8_0_ip_funcs +ffffffff82b780a0 R gmc_v8_0_ip_block +ffffffff82b780b8 R gmc_v8_1_ip_block +ffffffff82b780d0 R gmc_v8_5_ip_block +ffffffff82b780e8 r gmc_v8_0_gmc_funcs +ffffffff82b78140 r gmc_v8_0_irq_funcs +ffffffff82b78150 r fiji_mgcg_cgcg_init +ffffffff82b78160 r golden_settings_fiji_a10 +ffffffff82b78190 r tonga_mgcg_cgcg_init +ffffffff82b781a0 r golden_settings_tonga_a11 +ffffffff82b78200 r golden_settings_polaris11_a11 +ffffffff82b78230 r golden_settings_polaris10_a11 +ffffffff82b7826c r cz_mgcg_cgcg_init +ffffffff82b78280 r stoney_mgcg_cgcg_init +ffffffff82b782a0 r golden_settings_stoney_common +ffffffff82b79000 R gmc_v9_0_ip_funcs +ffffffff82b790a0 R gmc_v9_0_ip_block +ffffffff82b790b8 r gmc_v9_0_gmc_funcs +ffffffff82b79110 r gmc_v9_0_irq_funcs +ffffffff82b79120 r gmc_v9_0_ecc_funcs +ffffffff82b79130 r gfxhub_client_ids +ffffffff82b791a0 r mmhub_client_ids_vega10 +ffffffff82b79490 r mmhub_client_ids_vega12 +ffffffff82b79790 r mmhub_client_ids_vega20 +ffffffff82b79a80 r mmhub_client_ids_arcturus +ffffffff82b7b290 r mmhub_client_ids_raven +ffffffff82b7b450 r mmhub_client_ids_renoir +ffffffff82b7b640 r mmhub_client_ids_aldebaran +ffffffff82b7ce50 r ecc_umc_mcumc_ctrl_addrs +ffffffff82b7ced0 r ecc_umc_mcumc_ctrl_mask_addrs +ffffffff82b7cf50 r golden_settings_mmhub_1_0_0 +ffffffff82b7cf80 r golden_settings_athub_1_0_0 +ffffffff82b7d000 R hdp_v4_0_funcs +ffffffff82b7e000 R hdp_v5_0_funcs +ffffffff82b7f000 R hdp_v5_2_funcs +ffffffff82b80000 R hdp_v6_0_funcs +ffffffff82b81000 r iceland_ih_ip_funcs +ffffffff82b810a0 R iceland_ih_ip_block +ffffffff82b810b8 r iceland_ih_funcs +ffffffff82b82000 r ih_v6_0_ip_funcs +ffffffff82b820a0 R ih_v6_0_ip_block +ffffffff82b820b8 r ih_v6_0_funcs +ffffffff82b820d8 r ih_v6_0_self_irq_funcs +ffffffff82b83000 r ih_v6_1_ip_funcs +ffffffff82b830a0 R ih_v6_1_ip_block +ffffffff82b830b8 r ih_v6_1_funcs +ffffffff82b830d8 r ih_v6_1_self_irq_funcs +ffffffff82b84000 R gfx_v11_0_imu_funcs +ffffffff82b84030 r imu_rlc_ram_golden_11 +ffffffff82b84680 r imu_rlc_ram_golden_11_0_2 +ffffffff82b85000 r imu_rlc_ram_golden_11_0_3 +ffffffff82b86000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82b86140 r jpeg_v1_0_irq_funcs +ffffffff82b87000 r jpeg_v2_0_ip_funcs +ffffffff82b870a0 R jpeg_v2_0_ip_block +ffffffff82b870b8 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82b871f8 r jpeg_v2_0_irq_funcs +ffffffff82b88000 r jpeg_v2_5_ip_funcs +ffffffff82b880a0 R jpeg_v2_5_ip_block +ffffffff82b880b8 r jpeg_v2_6_ip_funcs +ffffffff82b88158 R jpeg_v2_6_ip_block +ffffffff82b88170 R jpeg_v2_6_ras_hw_ops +ffffffff82b881b0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82b882f0 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82b88430 r jpeg_v2_5_irq_funcs +ffffffff82b88440 r jpeg_v2_6_ras_irq_funcs +ffffffff82b89000 r jpeg_v3_0_ip_funcs +ffffffff82b890a0 R jpeg_v3_0_ip_block +ffffffff82b890b8 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82b891f8 r jpeg_v3_0_irq_funcs +ffffffff82b8a000 r jpeg_v4_0_ip_funcs +ffffffff82b8a0a0 R jpeg_v4_0_ip_block +ffffffff82b8a0b8 R jpeg_v4_0_ras_hw_ops +ffffffff82b8a0f8 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82b8a238 r jpeg_v4_0_irq_funcs +ffffffff82b8a248 r jpeg_v4_0_ras_irq_funcs +ffffffff82b8b000 r jpeg_v4_0_3_ip_funcs +ffffffff82b8b0a0 R jpeg_v4_0_3_ip_block +ffffffff82b8b0b8 r jpeg_v4_0_3_dec_ring_vm_funcs +ffffffff82b8b1f8 r jpeg_v4_0_3_irq_funcs +ffffffff82b8b208 r jpeg_v4_0_3_ras_hw_ops +ffffffff82b8b250 r jpeg_v4_0_3_ue_reg_list +ffffffff82b8c000 R lsdma_v6_0_funcs +ffffffff82b8d000 r mca_v3_0_mp0_hw_ops +ffffffff82b8d040 r mca_v3_0_mp1_hw_ops +ffffffff82b8d080 r mca_v3_0_mpio_hw_ops +ffffffff82b8e000 r mes_v10_1_ip_funcs +ffffffff82b8e0a0 R mes_v10_1_ip_block +ffffffff82b8e0b8 r mes_v10_1_funcs +ffffffff82b8e0e8 r mes_v10_1_ring_funcs +ffffffff82b8f000 r mes_v11_0_ip_funcs +ffffffff82b8f0a0 R mes_v11_0_ip_block +ffffffff82b8f0b8 r mes_v11_0_funcs +ffffffff82b8f0e8 r mes_v11_0_ring_funcs +ffffffff82b90000 R mmhub_v1_0_funcs +ffffffff82b90050 r mmhub_v1_0_edc_cnt_regs +ffffffff82b900c0 r mmhub_v1_0_ras_fields +ffffffff82b91000 R mmhub_v1_7_funcs +ffffffff82b91050 r mmhub_v1_7_edc_cnt_regs +ffffffff82b91250 r mmhub_v1_7_ras_fields +ffffffff82b929c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82b93000 R mmhub_v1_8_funcs +ffffffff82b93050 r mmhub_v1_8_ras_hw_ops +ffffffff82b93090 r mmhub_v1_8_ce_reg_list +ffffffff82b93180 r mmhub_v1_8_ras_memory_list +ffffffff82b932b0 r mmhub_v1_8_ue_reg_list +ffffffff82b94000 R mmhub_v2_0_funcs +ffffffff82b94050 r mmhub_v2_0_vmhub_funcs +ffffffff82b94060 r mmhub_client_ids_navi1x +ffffffff82b94190 r mmhub_client_ids_sienna_cichlid +ffffffff82b94450 r mmhub_client_ids_beige_goby +ffffffff82b95000 R mmhub_v2_3_funcs +ffffffff82b95050 r mmhub_v2_3_vmhub_funcs +ffffffff82b95060 r mmhub_client_ids_vangogh +ffffffff82b96000 R mmhub_v3_0_funcs +ffffffff82b96050 r mmhub_v3_0_vmhub_funcs +ffffffff82b96060 r mmhub_client_ids_v3_0_0 +ffffffff82b97000 R mmhub_v3_0_1_funcs +ffffffff82b97050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82b97060 r mmhub_client_ids_v3_0_1 +ffffffff82b98000 R mmhub_v3_0_2_funcs +ffffffff82b98050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82b98060 r mmhub_client_ids_v3_0_2 +ffffffff82b99000 R mmhub_v9_4_ras_hw_ops +ffffffff82b99040 R mmhub_v9_4_funcs +ffffffff82b99090 r mmhub_v9_4_edc_cnt_regs +ffffffff82b99330 r mmhub_v9_4_ras_fields +ffffffff82b9b3b0 r mmhub_v9_4_err_status_regs +ffffffff82b9c000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82b9c010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82b9c020 R xgpu_ai_virt_ops +ffffffff82b9d000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82b9d010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82b9d020 R xgpu_nv_virt_ops +ffffffff82b9e000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82b9e240 r xgpu_fiji_golden_settings_a10 +ffffffff82b9e370 r xgpu_fiji_golden_common_all +ffffffff82b9e3f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82b9e810 r xgpu_tonga_golden_settings_a11 +ffffffff82b9e9d0 r xgpu_tonga_golden_common_all +ffffffff82b9ea28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82b9ea38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82b9ea48 R xgpu_vi_virt_ops +ffffffff82b9f000 r navi10_ih_ip_funcs +ffffffff82b9f0a0 R navi10_ih_ip_block +ffffffff82b9f0b8 r navi10_ih_funcs +ffffffff82b9f0d8 r navi10_ih_self_irq_funcs +ffffffff82ba0000 R nbio_v2_3_hdp_flush_reg +ffffffff82ba0048 R nbio_v2_3_funcs +ffffffff82ba1000 R nbio_v4_3_hdp_flush_reg +ffffffff82ba1048 R nbio_v4_3_funcs +ffffffff82ba1158 R nbio_v4_3_sriov_funcs +ffffffff82ba1268 r nbio_v4_3_ras_err_event_athub_irq_funcs +ffffffff82ba2000 R nbio_v6_1_hdp_flush_reg +ffffffff82ba2048 R nbio_v6_1_funcs +ffffffff82ba3000 R nbio_v7_0_hdp_flush_reg +ffffffff82ba3048 R nbio_v7_0_funcs +ffffffff82ba4000 R nbio_v7_2_hdp_flush_reg +ffffffff82ba4048 R nbio_v7_2_funcs +ffffffff82ba5000 R nbio_v7_4_hdp_flush_reg +ffffffff82ba5048 R nbio_v7_4_ras_hw_ops +ffffffff82ba5088 R nbio_v7_4_funcs +ffffffff82ba5198 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82ba51a8 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82ba6000 R nbio_v7_7_hdp_flush_reg +ffffffff82ba6048 R nbio_v7_7_funcs +ffffffff82ba7000 R nbio_v7_9_hdp_flush_reg +ffffffff82ba7048 R nbio_v7_9_funcs +ffffffff82ba7158 R nbio_v7_9_ras_hw_ops +ffffffff82ba7198 r nbio_v7_9_ras_controller_irq_funcs +ffffffff82ba71a8 r nbio_v7_9_ras_err_event_athub_irq_funcs +ffffffff82ba8000 r nv_common_ip_funcs +ffffffff82ba80a0 R nv_common_ip_block +ffffffff82ba80b8 r nv_asic_funcs +ffffffff82ba8180 r nv_allowed_read_registers +ffffffff82ba8300 r sc_video_codecs_encode +ffffffff82ba8310 r sc_video_codecs_decode_vcn1 +ffffffff82ba8320 r sc_video_codecs_decode_vcn0 +ffffffff82ba8330 r yc_video_codecs_decode +ffffffff82ba8340 r bg_video_codecs_encode +ffffffff82ba8350 r bg_video_codecs_decode +ffffffff82ba8360 r nv_video_codecs_encode +ffffffff82ba8370 r nv_video_codecs_decode +ffffffff82ba8380 r sc_video_codecs_encode_array +ffffffff82ba83b0 r sc_video_codecs_decode_array_vcn1 +ffffffff82ba8440 r sc_video_codecs_decode_array_vcn0 +ffffffff82ba84e0 r yc_video_codecs_decode_array +ffffffff82ba8550 r bg_video_codecs_decode_array +ffffffff82ba8590 r nv_video_codecs_encode_array +ffffffff82ba85c0 r nv_video_codecs_decode_array +ffffffff82ba9000 r psp_v10_0_funcs +ffffffff82baa000 r psp_v11_0_funcs +ffffffff82bab000 r psp_v11_0_8_funcs +ffffffff82bac000 r psp_v12_0_funcs +ffffffff82bad000 r psp_v13_0_funcs +ffffffff82bae000 r psp_v13_0_4_funcs +ffffffff82baf000 r psp_v3_1_funcs +ffffffff82bb0000 r sdma_v2_4_ip_funcs +ffffffff82bb00a0 R sdma_v2_4_ip_block +ffffffff82bb00b8 r sdma_v2_4_ring_funcs +ffffffff82bb01f8 r sdma_v2_4_buffer_funcs +ffffffff82bb0218 r sdma_v2_4_vm_pte_funcs +ffffffff82bb0238 r sdma_v2_4_trap_irq_funcs +ffffffff82bb0248 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82bb0260 r iceland_mgcg_cgcg_init +ffffffff82bb0280 r golden_settings_iceland_a11 +ffffffff82bb1000 r sdma_v3_0_ip_funcs +ffffffff82bb10a0 R sdma_v3_0_ip_block +ffffffff82bb10b8 R sdma_v3_1_ip_block +ffffffff82bb10d0 r sdma_v3_0_ring_funcs +ffffffff82bb1210 r sdma_v3_0_buffer_funcs +ffffffff82bb1230 r sdma_v3_0_vm_pte_funcs +ffffffff82bb1250 r sdma_v3_0_trap_irq_funcs +ffffffff82bb1260 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82bb1270 r fiji_mgcg_cgcg_init +ffffffff82bb1290 r golden_settings_fiji_a10 +ffffffff82bb12f0 r tonga_mgcg_cgcg_init +ffffffff82bb1310 r golden_settings_tonga_a11 +ffffffff82bb1390 r golden_settings_polaris11_a11 +ffffffff82bb1410 r golden_settings_polaris10_a11 +ffffffff82bb1490 r cz_mgcg_cgcg_init +ffffffff82bb14b0 r cz_golden_settings_a11 +ffffffff82bb1540 r stoney_mgcg_cgcg_init +ffffffff82bb1550 r stoney_golden_settings_a11 +ffffffff82bb2000 R sdma_v4_0_ip_funcs +ffffffff82bb20a0 R sdma_v4_0_ras_hw_ops +ffffffff82bb20e0 R sdma_v4_0_ip_block +ffffffff82bb20f8 r sdma_v4_0_ring_funcs +ffffffff82bb2238 r sdma_v4_0_page_ring_funcs +ffffffff82bb2378 r sdma_v4_0_buffer_funcs +ffffffff82bb2398 r sdma_v4_0_vm_pte_funcs +ffffffff82bb23b8 r sdma_v4_0_trap_irq_funcs +ffffffff82bb23c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82bb23d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82bb23e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82bb23f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82bb2408 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82bb2418 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82bb2430 r golden_settings_sdma_4 +ffffffff82bb2690 r golden_settings_sdma_vg10 +ffffffff82bb2740 r golden_settings_sdma_vg12 +ffffffff82bb27f0 r golden_settings_sdma0_4_2_init +ffffffff82bb2810 r golden_settings_sdma0_4_2 +ffffffff82bb2aa0 r golden_settings_sdma1_4_2 +ffffffff82bb2d30 r golden_settings_sdma_arct +ffffffff82bb3030 r golden_settings_sdma_aldebaran +ffffffff82bb31a0 r golden_settings_sdma_4_1 +ffffffff82bb32b0 r golden_settings_sdma_rv2 +ffffffff82bb32e0 r golden_settings_sdma_rv1 +ffffffff82bb3310 r golden_settings_sdma_4_3 +ffffffff82bb3400 r sdma_v4_0_ras_fields +ffffffff82bb4000 R sdma_v4_4_ras_hw_ops +ffffffff82bb4040 r sdma_v4_4_ras_fields +ffffffff82bb5000 R sdma_v4_4_2_ip_funcs +ffffffff82bb50a0 R sdma_v4_4_2_ip_block +ffffffff82bb50b8 r sdma_v4_4_2_ring_funcs +ffffffff82bb51f8 r sdma_v4_4_2_page_ring_funcs +ffffffff82bb5338 r sdma_v4_4_2_buffer_funcs +ffffffff82bb5358 r sdma_v4_4_2_vm_pte_funcs +ffffffff82bb5378 r sdma_v4_4_2_trap_irq_funcs +ffffffff82bb5388 r sdma_v4_4_2_illegal_inst_irq_funcs +ffffffff82bb5398 r sdma_v4_4_2_ecc_irq_funcs +ffffffff82bb53a8 r sdma_v4_4_2_vm_hole_irq_funcs +ffffffff82bb53b8 r sdma_v4_4_2_doorbell_invalid_irq_funcs +ffffffff82bb53c8 r sdma_v4_4_2_pool_timeout_irq_funcs +ffffffff82bb53d8 r sdma_v4_4_2_srbm_write_irq_funcs +ffffffff82bb53e8 r sdma_v4_4_2_ras_hw_ops +ffffffff82bb5430 r sdma_v4_2_2_ue_reg_list +ffffffff82bb5460 r sdma_v4_4_2_ras_memory_list +ffffffff82bb6000 R sdma_v5_0_ip_funcs +ffffffff82bb60a0 R sdma_v5_0_ip_block +ffffffff82bb60b8 r sdma_v5_0_ring_funcs +ffffffff82bb61f8 r sdma_v5_0_buffer_funcs +ffffffff82bb6218 r sdma_v5_0_vm_pte_funcs +ffffffff82bb6238 r sdma_v5_0_trap_irq_funcs +ffffffff82bb6248 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82bb6260 r golden_settings_sdma_5 +ffffffff82bb64a0 r golden_settings_sdma_nv10 +ffffffff82bb64d0 r golden_settings_sdma_nv14 +ffffffff82bb6500 r golden_settings_sdma_5_sriov +ffffffff82bb66e0 r golden_settings_sdma_nv12 +ffffffff82bb6770 r golden_settings_sdma_cyan_skillfish +ffffffff82bb7000 R sdma_v5_2_ip_funcs +ffffffff82bb70a0 R sdma_v5_2_ip_block +ffffffff82bb70b8 r sdma_v5_2_ring_funcs +ffffffff82bb71f8 r sdma_v5_2_buffer_funcs +ffffffff82bb7218 r sdma_v5_2_vm_pte_funcs +ffffffff82bb7238 r sdma_v5_2_trap_irq_funcs +ffffffff82bb7248 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82bb8000 R sdma_v6_0_ip_funcs +ffffffff82bb80a0 R sdma_v6_0_ip_block +ffffffff82bb80b8 r sdma_v6_0_ring_funcs +ffffffff82bb81f8 r sdma_v6_0_buffer_funcs +ffffffff82bb8218 r sdma_v6_0_vm_pte_funcs +ffffffff82bb8238 r sdma_v6_0_trap_irq_funcs +ffffffff82bb8248 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82bb9000 r smu_v11_0_i2c_algo +ffffffff82bb9010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82bb9028 r smu_v11_0_i2c_control_quirks +ffffffff82bba000 R smuio_v11_0_funcs +ffffffff82bbb000 R smuio_v11_0_6_funcs +ffffffff82bbc000 R smuio_v13_0_funcs +ffffffff82bbd000 R smuio_v13_0_3_funcs +ffffffff82bbe000 R smuio_v13_0_6_funcs +ffffffff82bbf000 R smuio_v9_0_funcs +ffffffff82bc0000 r soc15_common_ip_funcs +ffffffff82bc00a0 R vega10_common_ip_block +ffffffff82bc00b8 r soc15_asic_funcs +ffffffff82bc0178 r vega20_asic_funcs +ffffffff82bc0238 r aqua_vanjaram_asic_funcs +ffffffff82bc0300 r soc15_allowed_read_registers +ffffffff82bc0490 r vega_video_codecs_encode +ffffffff82bc04a0 r vega_video_codecs_decode +ffffffff82bc04b0 r rv_video_codecs_decode +ffffffff82bc04c0 r rn_video_codecs_decode +ffffffff82bc04d0 r vcn_4_0_3_video_codecs_encode +ffffffff82bc04e0 r vcn_4_0_3_video_codecs_decode +ffffffff82bc04f0 r vega_video_codecs_encode_array +ffffffff82bc0520 r vega_video_codecs_decode_array +ffffffff82bc05a0 r rv_video_codecs_decode_array +ffffffff82bc0630 r rn_video_codecs_decode_array +ffffffff82bc06c0 r vcn_4_0_3_video_codecs_decode_array +ffffffff82bc1000 r soc21_common_ip_funcs +ffffffff82bc10a0 R soc21_common_ip_block +ffffffff82bc10b8 r soc21_asic_funcs +ffffffff82bc1180 r soc21_allowed_read_registers +ffffffff82bc1300 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82bc1310 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82bc1320 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82bc1330 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82bc1340 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82bc1370 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82bc13c0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82bc1400 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82bc2000 r tonga_ih_ip_funcs +ffffffff82bc20a0 R tonga_ih_ip_block +ffffffff82bc20b8 r tonga_ih_funcs +ffffffff82bc3000 R umc_v6_0_funcs +ffffffff82bc4000 R umc_v6_1_channel_idx_tbl +ffffffff82bc4080 R umc_v6_1_ras_hw_ops +ffffffff82bc5000 R umc_v6_7_channel_idx_tbl_second +ffffffff82bc5080 R umc_v6_7_channel_idx_tbl_first +ffffffff82bc5100 R umc_v6_7_ras_hw_ops +ffffffff82bc6000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82bc6040 R umc_v8_10_channel_idx_tbl_ext0 +ffffffff82bc6080 R umc_v8_10_channel_idx_tbl +ffffffff82bc60e0 R umc_v8_10_ras_hw_ops +ffffffff82bc7000 R umc_v8_7_channel_idx_tbl +ffffffff82bc7040 R umc_v8_7_ras_hw_ops +ffffffff82bc8000 r uvd_v5_0_ip_funcs +ffffffff82bc80a0 R uvd_v5_0_ip_block +ffffffff82bc80b8 r uvd_v5_0_ring_funcs +ffffffff82bc81f8 r uvd_v5_0_irq_funcs +ffffffff82bc9000 r uvd_v6_0_ip_funcs +ffffffff82bc90a0 R uvd_v6_0_ip_block +ffffffff82bc90b8 R uvd_v6_2_ip_block +ffffffff82bc90d0 R uvd_v6_3_ip_block +ffffffff82bc90e8 r uvd_v6_0_ring_vm_funcs +ffffffff82bc9228 r uvd_v6_0_ring_phys_funcs +ffffffff82bc9368 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82bc94a8 r uvd_v6_0_irq_funcs +ffffffff82bca000 R uvd_v7_0_ip_funcs +ffffffff82bca0a0 R uvd_v7_0_ip_block +ffffffff82bca0b8 r uvd_v7_0_ring_vm_funcs +ffffffff82bca1f8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82bca338 r uvd_v7_0_irq_funcs +ffffffff82bcb000 r vce_v3_0_ip_funcs +ffffffff82bcb0a0 R vce_v3_0_ip_block +ffffffff82bcb0b8 R vce_v3_1_ip_block +ffffffff82bcb0d0 R vce_v3_4_ip_block +ffffffff82bcb0e8 r vce_v3_0_ring_vm_funcs +ffffffff82bcb228 r vce_v3_0_ring_phys_funcs +ffffffff82bcb368 r vce_v3_0_irq_funcs +ffffffff82bcc000 R vce_v4_0_ip_funcs +ffffffff82bcc0a0 R vce_v4_0_ip_block +ffffffff82bcc0b8 r vce_v4_0_ring_vm_funcs +ffffffff82bcc1f8 r vce_v4_0_irq_funcs +ffffffff82bcd000 r vcn_v1_0_ip_funcs +ffffffff82bcd0a0 R vcn_v1_0_ip_block +ffffffff82bcd0b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82bcd1f8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82bcd338 r vcn_v1_0_irq_funcs +ffffffff82bce000 r vcn_v2_0_ip_funcs +ffffffff82bce0a0 R vcn_v2_0_ip_block +ffffffff82bce0b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82bce1f8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82bce338 r vcn_v2_0_irq_funcs +ffffffff82bcf000 r vcn_v2_5_ip_funcs +ffffffff82bcf0a0 R vcn_v2_5_ip_block +ffffffff82bcf0b8 r vcn_v2_6_ip_funcs +ffffffff82bcf158 R vcn_v2_6_ip_block +ffffffff82bcf170 R vcn_v2_6_ras_hw_ops +ffffffff82bcf1b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82bcf2f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82bcf430 r vcn_v2_5_irq_funcs +ffffffff82bcf440 r vcn_v2_6_ras_irq_funcs +ffffffff82bd0000 r vcn_v3_0_ip_funcs +ffffffff82bd00a0 R vcn_v3_0_ip_block +ffffffff82bd00b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82bd01f8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82bd0338 r vcn_v3_0_irq_funcs +ffffffff82bd1000 r vcn_v4_0_ip_funcs +ffffffff82bd10a0 R vcn_v4_0_ip_block +ffffffff82bd10b8 R vcn_v4_0_ras_hw_ops +ffffffff82bd10f8 r vcn_v4_0_irq_funcs +ffffffff82bd1108 r vcn_v4_0_ras_irq_funcs +ffffffff82bd2000 r vcn_v4_0_3_ip_funcs +ffffffff82bd20a0 R vcn_v4_0_3_ip_block +ffffffff82bd20b8 r vcn_v4_0_3_unified_ring_vm_funcs +ffffffff82bd21f8 r vcn_v4_0_3_irq_funcs +ffffffff82bd2208 r vcn_v4_0_3_ras_hw_ops +ffffffff82bd2250 r vcn_v4_0_3_ue_reg_list +ffffffff82bd3000 R vega10_ih_ip_funcs +ffffffff82bd30a0 R vega10_ih_ip_block +ffffffff82bd30b8 r vega10_ih_funcs +ffffffff82bd30d8 r vega10_ih_self_irq_funcs +ffffffff82bd4000 r GC_BASE +ffffffff82bd4064 r HDP_BASE +ffffffff82bd40c8 r MMHUB_BASE +ffffffff82bd412c r ATHUB_BASE +ffffffff82bd4190 r NBIO_BASE +ffffffff82bd41f4 r MP0_BASE +ffffffff82bd4258 r MP1_BASE +ffffffff82bd42bc r VCE_BASE +ffffffff82bd4320 r VCN_BASE +ffffffff82bd4384 r DF_BASE +ffffffff82bd43e8 r DCE_BASE +ffffffff82bd444c r OSSSYS_BASE +ffffffff82bd44b0 r SDMA0_BASE +ffffffff82bd4514 r SDMA1_BASE +ffffffff82bd4578 r SMUIO_BASE +ffffffff82bd45dc r PWR_BASE +ffffffff82bd4640 r NBIF_BASE +ffffffff82bd46a4 r THM_BASE +ffffffff82bd4708 r CLK_BASE +ffffffff82bd5000 R vega20_ih_ip_funcs +ffffffff82bd50a0 R vega20_ih_ip_block +ffffffff82bd50b8 r vega20_ih_funcs +ffffffff82bd50d8 r vega20_ih_self_irq_funcs +ffffffff82bd6000 r GC_BASE +ffffffff82bd6090 r HDP_BASE +ffffffff82bd6120 r MMHUB_BASE +ffffffff82bd61b0 r ATHUB_BASE +ffffffff82bd6240 r NBIO_BASE +ffffffff82bd62d0 r MP0_BASE +ffffffff82bd6360 r MP1_BASE +ffffffff82bd63f0 r UVD_BASE +ffffffff82bd6480 r VCE_BASE +ffffffff82bd6510 r DF_BASE +ffffffff82bd65a0 r DCE_BASE +ffffffff82bd6630 r OSSSYS_BASE +ffffffff82bd66c0 r SDMA0_BASE +ffffffff82bd6750 r SDMA1_BASE +ffffffff82bd67e0 r SMUIO_BASE +ffffffff82bd6870 r THM_BASE +ffffffff82bd6900 r CLK_BASE +ffffffff82bd6990 r UMC_BASE +ffffffff82bd6a20 r RSMU_BASE +ffffffff82bd7000 r vi_common_ip_block +ffffffff82bd7018 r vi_common_ip_funcs +ffffffff82bd70b8 r vi_asic_funcs +ffffffff82bd7180 r vi_allowed_read_registers +ffffffff82bd73e0 r topaz_video_codecs_encode +ffffffff82bd73f0 r topaz_video_codecs_decode +ffffffff82bd7400 r tonga_video_codecs_encode +ffffffff82bd7410 r tonga_video_codecs_decode +ffffffff82bd7420 r polaris_video_codecs_encode +ffffffff82bd7430 r cz_video_codecs_decode +ffffffff82bd7440 r tonga_video_codecs_encode_array +ffffffff82bd7460 r tonga_video_codecs_decode_array +ffffffff82bd74b0 r polaris_video_codecs_encode_array +ffffffff82bd74e0 r cz_video_codecs_decode_array +ffffffff82bd7560 r iceland_mgcg_cgcg_init +ffffffff82bd75a0 r fiji_mgcg_cgcg_init +ffffffff82bd7600 r tonga_mgcg_cgcg_init +ffffffff82bd7660 r cz_mgcg_cgcg_init +ffffffff82bd76a0 r stoney_mgcg_cgcg_init +ffffffff82bd8000 r amdgpu_dm_funcs +ffffffff82bd80a0 R dm_ip_block +ffffffff82bd80b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82bd8120 r dm_display_funcs +ffffffff82bd8180 r hpd_disconnect_quirk_table +ffffffff82bd8ef0 r amdgpu_dm_mode_funcs +ffffffff82bd8f38 r amdgpu_dm_audio_component_bind_ops +ffffffff82bd8f48 r amdgpu_dm_audio_component_ops +ffffffff82bd8f80 r amdgpu_dm_encoder_funcs +ffffffff82bd8fa0 r amdgpu_dm_connector_funcs +ffffffff82bd9018 r amdgpu_dm_connector_helper_funcs +ffffffff82bd9078 r amdgpu_dm_i2c_algo +ffffffff82bd9088 r amdgpu_dm_backlight_ops +ffffffff82bd9260 r add_fs_modes.common_rates +ffffffff82bda000 r amdgpu_dm_crtc_funcs +ffffffff82bda0c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82bdb000 r dm_dtn_log_begin.msg +ffffffff82bdb00d r dm_dtn_log_end.msg +ffffffff82bdb018 r SYNAPTICS_DEVICE_ID +ffffffff82bdc000 r dm_crtc_irq_funcs +ffffffff82bdc010 r dm_vline0_irq_funcs +ffffffff82bdc020 r dm_dmub_outbox_irq_funcs +ffffffff82bdc030 r dm_vupdate_irq_funcs +ffffffff82bdc040 r dm_dmub_trace_irq_funcs +ffffffff82bdc050 r dm_pageflip_irq_funcs +ffffffff82bdc060 r dm_hpd_irq_funcs +ffffffff82bdd000 r amdgpu_dm_encoder_funcs +ffffffff82bdd020 r dm_mst_cbs +ffffffff82bdd030 r dm_dp_mst_connector_funcs +ffffffff82bdd0a8 r dm_dp_mst_connector_helper_funcs +ffffffff82bde000 r dm_plane_funcs +ffffffff82bde068 r dm_plane_helper_funcs ffffffff82be0000 r vbios_funcs -ffffffff82be5000 r command_table_helper_funcs +ffffffff82be1000 r vbios_funcs ffffffff82be6000 r command_table_helper_funcs ffffffff82be7000 r command_table_helper_funcs ffffffff82be8000 r command_table_helper_funcs -ffffffff82be9000 r dce80_max_clks_by_state -ffffffff82be9028 r disp_clk_regs -ffffffff82be907c r disp_clk_shift -ffffffff82be9088 r disp_clk_mask -ffffffff82bea000 r dce110_max_clks_by_state +ffffffff82be9000 r command_table_helper_funcs +ffffffff82bea000 r dce80_max_clks_by_state ffffffff82bea028 r disp_clk_regs ffffffff82bea07c r disp_clk_shift ffffffff82bea088 r disp_clk_mask -ffffffff82beb000 r dce112_max_clks_by_state +ffffffff82beb000 r dce110_max_clks_by_state ffffffff82beb028 r disp_clk_regs ffffffff82beb07c r disp_clk_shift ffffffff82beb088 r disp_clk_mask -ffffffff82bec000 r dce120_max_clks_by_state -ffffffff82bed000 r clk_mgr_regs -ffffffff82bed054 r clk_mgr_shift -ffffffff82bed060 r clk_mgr_mask +ffffffff82bec000 r dce112_max_clks_by_state +ffffffff82bec028 r disp_clk_regs +ffffffff82bec07c r disp_clk_shift +ffffffff82bec088 r disp_clk_mask +ffffffff82bed000 r dce120_max_clks_by_state ffffffff82bee000 r clk_mgr_regs ffffffff82bee054 r clk_mgr_shift ffffffff82bee060 r clk_mgr_mask ffffffff82bef000 r clk_mgr_regs ffffffff82bef054 r clk_mgr_shift ffffffff82bef060 r clk_mgr_mask -ffffffff82bf0000 r lpddr5_wm_table -ffffffff82bf00c0 r ddr5_wm_table +ffffffff82bf0000 r clk_mgr_regs +ffffffff82bf0054 r clk_mgr_shift +ffffffff82bf0060 r clk_mgr_mask ffffffff82bf1000 r lpddr5_wm_table ffffffff82bf10c0 r ddr5_wm_table -ffffffff82bf2000 r ddr5_wm_table -ffffffff82bf3000 r lpddr5_wm_table -ffffffff82bf30c0 r ddr4_wm_table -ffffffff82bf4000 r clk_mgr_regs_dcn321 -ffffffff82bf4054 r clk_mgr_shift_dcn321 -ffffffff82bf4060 r clk_mgr_mask_dcn321 -ffffffff82bf4084 r clk_mgr_regs_dcn32 -ffffffff82bf40d8 r clk_mgr_shift_dcn32 -ffffffff82bf40e4 r clk_mgr_mask_dcn32 -ffffffff82bf5000 r DC_BUILD_ID -ffffffff82bf7000 r output_csc_matrix -ffffffff82bf70e0 r black_color_format -ffffffff82bfa000 r dce_funcs -ffffffff82bfb000 r funcs -ffffffff82bfc000 R video_optimized_pixel_rates -ffffffff82bfc1c0 r dce110_clk_src_funcs -ffffffff82bfc1e8 r dce112_clk_src_funcs -ffffffff82bfc210 r dcn20_clk_src_funcs -ffffffff82bfc238 r dcn3_clk_src_funcs -ffffffff82bfc260 r dcn31_clk_src_funcs -ffffffff82bfd000 r dce_funcs -ffffffff82bfd068 r dcn10_funcs -ffffffff82bfd0d0 r dcn20_funcs -ffffffff82bfd138 r dcn21_funcs -ffffffff82bfe000 r dce_ipp_funcs -ffffffff82bff000 r dce110_lnk_enc_funcs -ffffffff82c00000 r dce_mi_funcs -ffffffff82c00090 r dce112_mi_funcs -ffffffff82c00120 r dce120_mi_funcs -ffffffff82c001b0 r pte_settings -ffffffff82c01000 r funcs -ffffffff82c02000 r dce_link_panel_cntl_funcs -ffffffff82c03000 r filter_3tap_16p_upscale -ffffffff82c03040 r filter_3tap_16p_116 -ffffffff82c03080 r filter_3tap_16p_149 -ffffffff82c030c0 r filter_3tap_16p_183 -ffffffff82c03100 r filter_3tap_64p_upscale -ffffffff82c031d0 r filter_3tap_64p_116 -ffffffff82c032a0 r filter_3tap_64p_149 -ffffffff82c03370 r filter_3tap_64p_183 -ffffffff82c03440 r filter_4tap_16p_upscale -ffffffff82c03490 r filter_4tap_16p_116 -ffffffff82c034e0 r filter_4tap_16p_149 -ffffffff82c03530 r filter_4tap_16p_183 -ffffffff82c03580 r filter_4tap_64p_upscale -ffffffff82c03690 r filter_4tap_64p_116 -ffffffff82c037a0 r filter_4tap_64p_149 -ffffffff82c038b0 r filter_4tap_64p_183 -ffffffff82c039c0 r filter_5tap_64p_upscale -ffffffff82c03b10 r filter_5tap_64p_116 -ffffffff82c03c60 r filter_5tap_64p_149 -ffffffff82c03db0 r filter_5tap_64p_183 -ffffffff82c03f00 r filter_6tap_64p_upscale -ffffffff82c04090 r filter_6tap_64p_116 -ffffffff82c04220 r filter_6tap_64p_149 -ffffffff82c043b0 r filter_6tap_64p_183 -ffffffff82c04540 r filter_7tap_64p_upscale -ffffffff82c04710 r filter_7tap_64p_116 -ffffffff82c048e0 r filter_7tap_64p_149 -ffffffff82c04ab0 r filter_7tap_64p_183 -ffffffff82c04c80 r filter_8tap_64p_upscale -ffffffff82c04e90 r filter_8tap_64p_116 -ffffffff82c050a0 r filter_8tap_64p_149 -ffffffff82c052b0 r filter_8tap_64p_183 -ffffffff82c054c0 r filter_2tap_16p -ffffffff82c054f0 r filter_2tap_64p -ffffffff82c06000 r dce110_str_enc_funcs -ffffffff82c06120 r audio_clock_info_table_48bpc -ffffffff82c062b0 r audio_clock_info_table_36bpc -ffffffff82c06440 r audio_clock_info_table -ffffffff82c07000 r global_color_matrix -ffffffff82c070a8 r dce_transform_funcs -ffffffff82c08000 r abm_funcs -ffffffff82c09000 r psr_funcs -ffffffff82c09040 r DP_SINK_DEVICE_STR_ID_1 -ffffffff82c09045 r DP_SINK_DEVICE_STR_ID_2 -ffffffff82c0a000 r replay_funcs -ffffffff82c0b000 r reg_offsets -ffffffff82c0c000 r bios_regs -ffffffff82c0c008 r res_cap -ffffffff82c0c048 r dce100_res_pool_funcs -ffffffff82c0c140 r clk_src_regs -ffffffff82c0c23c r dmcu_regs -ffffffff82c0c298 r dmcu_shift -ffffffff82c0c2ac r dmcu_mask -ffffffff82c0c2f8 r abm_regs -ffffffff82c0c360 r abm_shift -ffffffff82c0c384 r abm_mask -ffffffff82c0c410 r debug_defaults -ffffffff82c0c5c0 r dce100_tg_offsets -ffffffff82c0c608 r plane_cap -ffffffff82c0c638 r res_create_funcs -ffffffff82c0c670 r panel_cntl_regs -ffffffff82c0c690 r panel_cntl_shift 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-ffffffff82c1468c r carrizo_resource_cap -ffffffff82c146d0 r panel_cntl_regs -ffffffff82c146f0 r panel_cntl_shift -ffffffff82c14700 r panel_cntl_mask -ffffffff82c14740 r link_enc_regs -ffffffff82c14b00 r link_enc_aux_regs -ffffffff82c14b50 r link_enc_hpd_regs -ffffffff82c14b68 r link_enc_feature -ffffffff82c14b78 r cs_shift -ffffffff82c14b84 r cs_mask -ffffffff82c14bb0 r mi_regs -ffffffff82c14d3c r mi_shifts -ffffffff82c14d84 r mi_masks -ffffffff82c14ea0 r ipp_regs -ffffffff82c14f9c r ipp_shift -ffffffff82c14fc4 r ipp_mask -ffffffff82c15060 r xfm_regs -ffffffff82c15330 r xfm_shift -ffffffff82c15390 r xfm_mask -ffffffff82c15510 r opp_regs -ffffffff82c15660 r opp_shift -ffffffff82c1568c r opp_mask -ffffffff82c15740 r aux_engine_regs -ffffffff82c15830 r aux_mask -ffffffff82c15890 r aux_shift -ffffffff82c158b0 r i2c_hw_regs -ffffffff82c15a00 r i2c_shifts -ffffffff82c15a2c r i2c_masks -ffffffff82c15ad0 r audio_regs -ffffffff82c15c04 r audio_shift -ffffffff82c15c1c r audio_mask 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+ffffffff82bfd1c0 r dce110_clk_src_funcs +ffffffff82bfd1e8 r dce112_clk_src_funcs +ffffffff82bfd210 r dcn20_clk_src_funcs +ffffffff82bfd238 r dcn3_clk_src_funcs +ffffffff82bfd260 r dcn31_clk_src_funcs +ffffffff82bfe000 r dce_funcs +ffffffff82bfe068 r dcn10_funcs +ffffffff82bfe0d0 r dcn20_funcs +ffffffff82bfe138 r dcn21_funcs +ffffffff82bff000 r dce_ipp_funcs +ffffffff82c00000 r dce110_lnk_enc_funcs +ffffffff82c01000 r dce_mi_funcs +ffffffff82c01090 r dce112_mi_funcs +ffffffff82c01120 r dce120_mi_funcs +ffffffff82c011b0 r pte_settings +ffffffff82c02000 r funcs +ffffffff82c03000 r dce_link_panel_cntl_funcs +ffffffff82c04000 r filter_3tap_16p_upscale +ffffffff82c04040 r filter_3tap_16p_116 +ffffffff82c04080 r filter_3tap_16p_149 +ffffffff82c040c0 r filter_3tap_16p_183 +ffffffff82c04100 r filter_3tap_64p_upscale +ffffffff82c041d0 r filter_3tap_64p_116 +ffffffff82c042a0 r filter_3tap_64p_149 +ffffffff82c04370 r filter_3tap_64p_183 +ffffffff82c04440 r filter_4tap_16p_upscale +ffffffff82c04490 r filter_4tap_16p_116 +ffffffff82c044e0 r filter_4tap_16p_149 +ffffffff82c04530 r filter_4tap_16p_183 +ffffffff82c04580 r filter_4tap_64p_upscale +ffffffff82c04690 r filter_4tap_64p_116 +ffffffff82c047a0 r filter_4tap_64p_149 +ffffffff82c048b0 r filter_4tap_64p_183 +ffffffff82c049c0 r filter_5tap_64p_upscale +ffffffff82c04b10 r filter_5tap_64p_116 +ffffffff82c04c60 r filter_5tap_64p_149 +ffffffff82c04db0 r filter_5tap_64p_183 +ffffffff82c04f00 r filter_6tap_64p_upscale +ffffffff82c05090 r filter_6tap_64p_116 +ffffffff82c05220 r filter_6tap_64p_149 +ffffffff82c053b0 r filter_6tap_64p_183 +ffffffff82c05540 r filter_7tap_64p_upscale +ffffffff82c05710 r filter_7tap_64p_116 +ffffffff82c058e0 r filter_7tap_64p_149 +ffffffff82c05ab0 r filter_7tap_64p_183 +ffffffff82c05c80 r filter_8tap_64p_upscale +ffffffff82c05e90 r filter_8tap_64p_116 +ffffffff82c060a0 r filter_8tap_64p_149 +ffffffff82c062b0 r filter_8tap_64p_183 +ffffffff82c064c0 r filter_2tap_16p +ffffffff82c064f0 r filter_2tap_64p +ffffffff82c07000 r dce110_str_enc_funcs +ffffffff82c07120 r audio_clock_info_table_48bpc +ffffffff82c072b0 r audio_clock_info_table_36bpc +ffffffff82c07440 r audio_clock_info_table +ffffffff82c08000 r global_color_matrix +ffffffff82c080a8 r dce_transform_funcs +ffffffff82c09000 r abm_funcs +ffffffff82c0a000 r psr_funcs +ffffffff82c0a040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82c0a045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82c0b000 r replay_funcs +ffffffff82c0c000 r reg_offsets +ffffffff82c0d000 r bios_regs +ffffffff82c0d008 r res_cap +ffffffff82c0d048 r dce100_res_pool_funcs +ffffffff82c0d140 r clk_src_regs +ffffffff82c0d23c r dmcu_regs +ffffffff82c0d298 r dmcu_shift +ffffffff82c0d2ac r dmcu_mask +ffffffff82c0d2f8 r abm_regs +ffffffff82c0d360 r abm_shift +ffffffff82c0d384 r abm_mask +ffffffff82c0d410 r debug_defaults +ffffffff82c0d5c0 r dce100_tg_offsets +ffffffff82c0d608 r plane_cap +ffffffff82c0d638 r res_create_funcs +ffffffff82c0d670 r panel_cntl_regs +ffffffff82c0d690 r panel_cntl_shift +ffffffff82c0d6a0 r panel_cntl_mask +ffffffff82c0d6e0 r link_enc_regs +ffffffff82c0daa0 r link_enc_aux_regs +ffffffff82c0daf0 r link_enc_hpd_regs +ffffffff82c0db08 r link_enc_feature +ffffffff82c0db18 r cs_shift +ffffffff82c0db24 r cs_mask +ffffffff82c0db50 r mi_regs +ffffffff82c0de68 r mi_shifts +ffffffff82c0deb0 r mi_masks +ffffffff82c0dfd0 r ipp_regs +ffffffff82c0e1c8 r ipp_shift +ffffffff82c0e1f0 r ipp_mask +ffffffff82c0e290 r xfm_regs +ffffffff82c0e830 r xfm_shift +ffffffff82c0e890 r xfm_mask +ffffffff82c0ea10 r opp_regs +ffffffff82c0eb60 r opp_shift +ffffffff82c0eb8c r opp_mask +ffffffff82c0ec40 r aux_engine_regs +ffffffff82c0ed30 r aux_mask +ffffffff82c0ed90 r aux_shift +ffffffff82c0edb0 r i2c_hw_regs +ffffffff82c0ef00 r i2c_shifts +ffffffff82c0ef2c r i2c_masks +ffffffff82c0efd0 r audio_regs +ffffffff82c0f104 r audio_shift +ffffffff82c0f11c r audio_mask +ffffffff82c0f160 r stream_enc_regs +ffffffff82c0f80c r se_shift +ffffffff82c0f890 r se_mask +ffffffff82c0fa94 r hwseq_reg +ffffffff82c0fcb0 r hwseq_shift +ffffffff82c0fd30 r hwseq_mask +ffffffff82c10000 r reg_offsets +ffffffff82c10018 r dce110_compressor_funcs +ffffffff82c11000 r dce110_funcs +ffffffff82c112e8 r dce110_private_funcs +ffffffff82c12000 r dce110_mem_input_v_funcs +ffffffff82c12090 r dvmm_Hw_Setting_1DTiling +ffffffff82c12120 r dvmm_Hw_Setting_2DTiling +ffffffff82c121b0 r dvmm_Hw_Setting_Linear +ffffffff82c13000 r global_color_matrix +ffffffff82c130b0 r input_csc_matrix +ffffffff82c14000 r funcs +ffffffff82c15000 r bios_regs +ffffffff82c15008 r dce110_res_pool_funcs +ffffffff82c15100 r debug_defaults +ffffffff82c152b0 r clk_src_regs +ffffffff82c153ac r dmcu_regs +ffffffff82c15408 r dmcu_shift +ffffffff82c1541c r dmcu_mask +ffffffff82c15468 r abm_regs +ffffffff82c154d0 r abm_shift +ffffffff82c154f4 r abm_mask +ffffffff82c15580 r dce110_tg_offsets +ffffffff82c155c8 r res_create_funcs +ffffffff82c155f8 r plane_cap +ffffffff82c15624 r underlay_plane_cap +ffffffff82c15650 r stoney_resource_cap +ffffffff82c1568c r carrizo_resource_cap +ffffffff82c156d0 r panel_cntl_regs +ffffffff82c156f0 r panel_cntl_shift +ffffffff82c15700 r panel_cntl_mask +ffffffff82c15740 r link_enc_regs +ffffffff82c15b00 r link_enc_aux_regs +ffffffff82c15b50 r link_enc_hpd_regs +ffffffff82c15b68 r link_enc_feature +ffffffff82c15b78 r cs_shift +ffffffff82c15b84 r cs_mask +ffffffff82c15bb0 r mi_regs +ffffffff82c15d3c r mi_shifts +ffffffff82c15d84 r mi_masks +ffffffff82c15ea0 r ipp_regs +ffffffff82c15f9c r ipp_shift +ffffffff82c15fc4 r ipp_mask +ffffffff82c16060 r xfm_regs +ffffffff82c16330 r xfm_shift +ffffffff82c16390 r xfm_mask +ffffffff82c16510 r opp_regs +ffffffff82c16660 r opp_shift +ffffffff82c1668c r opp_mask +ffffffff82c16740 r aux_engine_regs +ffffffff82c16830 r aux_mask +ffffffff82c16890 r aux_shift +ffffffff82c168b0 r i2c_hw_regs +ffffffff82c16a00 r i2c_shifts +ffffffff82c16a2c r i2c_masks +ffffffff82c16ad0 r audio_regs +ffffffff82c16c04 r audio_shift +ffffffff82c16c1c r audio_mask +ffffffff82c16c60 r stream_enc_regs +ffffffff82c16f3c r se_shift +ffffffff82c16fc0 r se_mask +ffffffff82c171c4 r hwseq_stoney_reg +ffffffff82c173e0 r hwseq_cz_reg +ffffffff82c175fc r hwseq_shift +ffffffff82c1767c r hwseq_mask +ffffffff82c18000 r dce110_tg_funcs +ffffffff82c19000 r dce110_tg_v_funcs +ffffffff82c1a000 r dce110_xfmv_funcs ffffffff82c1b000 r reg_offsets -ffffffff82c1c000 r bios_regs -ffffffff82c1c008 r dce112_res_pool_funcs -ffffffff82c1c100 r debug_defaults -ffffffff82c1c2b0 r clk_src_regs -ffffffff82c1c4a8 r dmcu_regs -ffffffff82c1c504 r dmcu_shift -ffffffff82c1c518 r dmcu_mask -ffffffff82c1c564 r abm_regs -ffffffff82c1c5cc r abm_shift -ffffffff82c1c5f0 r abm_mask -ffffffff82c1c680 r dce112_tg_offsets -ffffffff82c1c6c8 r res_create_funcs -ffffffff82c1c6f8 r plane_cap -ffffffff82c1c724 r polaris_11_resource_cap -ffffffff82c1c760 r polaris_10_resource_cap -ffffffff82c1c7a0 r panel_cntl_regs -ffffffff82c1c7c0 r panel_cntl_shift -ffffffff82c1c7d0 r panel_cntl_mask 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-ffffffff82c1ed3c r hwseq_mask -ffffffff82c1f000 r bios_regs -ffffffff82c1f008 r res_cap -ffffffff82c1f048 r dce120_res_pool_funcs -ffffffff82c1f140 r debug_defaults -ffffffff82c1f2f0 r clk_src_regs -ffffffff82c1f4e8 r dmcu_regs -ffffffff82c1f544 r dmcu_shift -ffffffff82c1f558 r dmcu_mask -ffffffff82c1f5a4 r abm_regs -ffffffff82c1f60c r abm_shift -ffffffff82c1f630 r abm_mask -ffffffff82c1f6c0 r dce120_tg_offsets -ffffffff82c1f708 r dce121_res_create_funcs -ffffffff82c1f738 r res_create_funcs -ffffffff82c1f768 r plane_cap -ffffffff82c1f7a0 r panel_cntl_regs -ffffffff82c1f7c0 r panel_cntl_shift -ffffffff82c1f7d0 r panel_cntl_mask -ffffffff82c1f810 r link_enc_regs -ffffffff82c1fbd0 r link_enc_aux_regs -ffffffff82c1fc20 r link_enc_hpd_regs -ffffffff82c1fc38 r link_enc_feature -ffffffff82c1fc48 r cs_shift -ffffffff82c1fc54 r cs_mask -ffffffff82c1fc80 r mi_regs -ffffffff82c1ff98 r mi_shifts -ffffffff82c1ffe0 r mi_masks -ffffffff82c20100 r ipp_regs -ffffffff82c202f8 r ipp_shift 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r aux_mask -ffffffff82c25d90 r aux_shift -ffffffff82c25db0 r i2c_hw_regs -ffffffff82c25f00 r i2c_shifts -ffffffff82c25f2c r i2c_masks -ffffffff82c25fd0 r audio_regs -ffffffff82c26104 r audio_shift -ffffffff82c2611c r audio_mask -ffffffff82c26160 r stream_enc_regs -ffffffff82c2680c r se_shift -ffffffff82c26890 r se_mask -ffffffff82c26a94 r hwseq_reg -ffffffff82c26cb0 r hwseq_shift -ffffffff82c26d30 r hwseq_mask -ffffffff82c26f24 r res_cap_81 -ffffffff82c26f60 r res_cap_83 -ffffffff82c27000 r reg_offsets -ffffffff82c27048 r dce80_tg_funcs -ffffffff82c28000 r dcn10_dpp_funcs -ffffffff82c29000 r dpp_input_csc_matrix -ffffffff82c2b000 R dcn10_dwbc_funcs -ffffffff82c2c000 r hubbub1_funcs -ffffffff82c2d000 r dcn10_hubp_funcs -ffffffff82c2e000 r reduceSizeAndFraction.prime_numbers -ffffffff82c30000 r dcn10_funcs -ffffffff82c302e8 r dcn10_private_funcs -ffffffff82c31000 r dcn10_ipp_funcs -ffffffff82c31048 r dcn20_ipp_funcs -ffffffff82c32000 r dcn10_lnk_enc_funcs -ffffffff82c33000 r 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opp_shift +ffffffff82c1ecbc r opp_mask +ffffffff82c1ed70 r aux_engine_regs +ffffffff82c1ee60 r aux_mask +ffffffff82c1eec0 r aux_shift +ffffffff82c1eee0 r i2c_hw_regs +ffffffff82c1f030 r i2c_shifts +ffffffff82c1f05c r i2c_masks +ffffffff82c1f100 r audio_regs +ffffffff82c1f208 r audio_shift +ffffffff82c1f220 r audio_mask +ffffffff82c1f260 r stream_enc_regs +ffffffff82c1f818 r se_shift +ffffffff82c1f89c r se_mask +ffffffff82c1faa0 r hwseq_reg +ffffffff82c1fcbc r hwseq_shift +ffffffff82c1fd3c r hwseq_mask +ffffffff82c20000 r bios_regs +ffffffff82c20008 r res_cap +ffffffff82c20048 r dce120_res_pool_funcs +ffffffff82c20140 r debug_defaults +ffffffff82c202f0 r clk_src_regs +ffffffff82c204e8 r dmcu_regs +ffffffff82c20544 r dmcu_shift +ffffffff82c20558 r dmcu_mask +ffffffff82c205a4 r abm_regs +ffffffff82c2060c r abm_shift +ffffffff82c20630 r abm_mask +ffffffff82c206c0 r dce120_tg_offsets +ffffffff82c20708 r dce121_res_create_funcs +ffffffff82c20738 r res_create_funcs +ffffffff82c20768 r plane_cap +ffffffff82c207a0 r panel_cntl_regs +ffffffff82c207c0 r panel_cntl_shift +ffffffff82c207d0 r panel_cntl_mask +ffffffff82c20810 r link_enc_regs +ffffffff82c20bd0 r link_enc_aux_regs +ffffffff82c20c20 r link_enc_hpd_regs +ffffffff82c20c38 r link_enc_feature +ffffffff82c20c48 r cs_shift +ffffffff82c20c54 r cs_mask +ffffffff82c20c80 r mi_regs +ffffffff82c20f98 r mi_shifts +ffffffff82c20fe0 r mi_masks +ffffffff82c21100 r ipp_regs +ffffffff82c212f8 r ipp_shift +ffffffff82c21320 r ipp_mask +ffffffff82c213c0 r xfm_regs +ffffffff82c21960 r xfm_shift +ffffffff82c219c0 r xfm_mask +ffffffff82c21b40 r opp_regs +ffffffff82c21c90 r opp_shift +ffffffff82c21cbc r opp_mask +ffffffff82c21d70 r aux_engine_regs +ffffffff82c21e60 r aux_mask +ffffffff82c21ec0 r aux_shift +ffffffff82c21ee0 r i2c_hw_regs +ffffffff82c22030 r i2c_shifts +ffffffff82c2205c r i2c_masks +ffffffff82c22100 r audio_regs +ffffffff82c22234 r audio_shift +ffffffff82c2224c r audio_mask +ffffffff82c22290 r stream_enc_regs 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link_enc_feature +ffffffff82c25b18 r cs_shift +ffffffff82c25b24 r cs_mask +ffffffff82c25b50 r mi_regs +ffffffff82c25e68 r mi_shifts +ffffffff82c25eb0 r mi_masks +ffffffff82c25fd0 r ipp_regs +ffffffff82c261c8 r ipp_shift +ffffffff82c261f0 r ipp_mask +ffffffff82c26290 r xfm_regs +ffffffff82c26830 r xfm_shift +ffffffff82c26890 r xfm_mask +ffffffff82c26a10 r opp_regs +ffffffff82c26b60 r opp_shift +ffffffff82c26b8c r opp_mask +ffffffff82c26c40 r aux_engine_regs +ffffffff82c26d30 r aux_mask +ffffffff82c26d90 r aux_shift +ffffffff82c26db0 r i2c_hw_regs +ffffffff82c26f00 r i2c_shifts +ffffffff82c26f2c r i2c_masks +ffffffff82c26fd0 r audio_regs +ffffffff82c27104 r audio_shift +ffffffff82c2711c r audio_mask +ffffffff82c27160 r stream_enc_regs +ffffffff82c2780c r se_shift +ffffffff82c27890 r se_mask +ffffffff82c27a94 r hwseq_reg +ffffffff82c27cb0 r hwseq_shift +ffffffff82c27d30 r hwseq_mask +ffffffff82c27f24 r res_cap_81 +ffffffff82c27f60 r res_cap_83 +ffffffff82c28000 r reg_offsets +ffffffff82c28048 r dce80_tg_funcs +ffffffff82c29000 r dcn10_dpp_funcs +ffffffff82c2a000 r dpp_input_csc_matrix +ffffffff82c2c000 R dcn10_dwbc_funcs +ffffffff82c2d000 r hubbub1_funcs +ffffffff82c2e000 r dcn10_hubp_funcs +ffffffff82c2f000 r reduceSizeAndFraction.prime_numbers +ffffffff82c31000 r dcn10_funcs +ffffffff82c312e8 r dcn10_private_funcs +ffffffff82c32000 r dcn10_ipp_funcs +ffffffff82c32048 r dcn20_ipp_funcs +ffffffff82c33000 r dcn10_lnk_enc_funcs +ffffffff82c34000 r dcn10_mpc_funcs +ffffffff82c35000 r dcn10_opp_funcs +ffffffff82c36000 r dcn10_tg_funcs +ffffffff82c37000 r bios_regs +ffffffff82c37008 r rv2_res_cap +ffffffff82c37044 r res_cap +ffffffff82c37080 r dcn10_res_pool_funcs +ffffffff82c37178 r debug_defaults_drv +ffffffff82c37320 r debug_defaults_diags +ffffffff82c374d0 r clk_src_regs +ffffffff82c37620 r dmcu_regs +ffffffff82c3767c r dmcu_shift +ffffffff82c37690 r dmcu_mask +ffffffff82c376dc r abm_regs +ffffffff82c37744 r abm_shift +ffffffff82c37768 r abm_mask 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filter_12tap_16p_183 +ffffffff82c43380 r filter_11tap_16p_upscale +ffffffff82c43450 r filter_11tap_16p_117 +ffffffff82c43520 r filter_11tap_16p_150 +ffffffff82c435f0 r filter_11tap_16p_183 +ffffffff82c436c0 r filter_10tap_16p_upscale +ffffffff82c43780 r filter_10tap_16p_117 +ffffffff82c43840 r filter_10tap_16p_150 +ffffffff82c43900 r filter_10tap_16p_183 +ffffffff82c439c0 r filter_9tap_16p_upscale +ffffffff82c43a70 r filter_9tap_16p_117 +ffffffff82c43b20 r filter_9tap_16p_150 +ffffffff82c43bd0 r filter_9tap_16p_183 +ffffffff82c43c80 r filter_8tap_16p_upscale +ffffffff82c43d10 r filter_8tap_16p_117 +ffffffff82c43da0 r filter_8tap_16p_150 +ffffffff82c43e30 r filter_8tap_16p_183 +ffffffff82c43ec0 r filter_7tap_16p_upscale +ffffffff82c43f40 r filter_7tap_16p_117 +ffffffff82c43fc0 r filter_7tap_16p_150 +ffffffff82c44040 r filter_7tap_16p_183 +ffffffff82c440c0 r filter_6tap_16p_upscale +ffffffff82c44130 r filter_6tap_16p_117 +ffffffff82c441a0 r filter_6tap_16p_150 +ffffffff82c44210 r filter_6tap_16p_183 +ffffffff82c44280 r filter_5tap_16p_upscale +ffffffff82c442e0 r filter_5tap_16p_117 +ffffffff82c44340 r filter_5tap_16p_150 +ffffffff82c443a0 r filter_5tap_16p_183 +ffffffff82c44400 r filter_4tap_16p_upscale +ffffffff82c44450 r filter_4tap_16p_117 +ffffffff82c444a0 r filter_4tap_16p_150 +ffffffff82c444f0 r filter_4tap_16p_183 +ffffffff82c44540 r filter_3tap_16p_upscale +ffffffff82c44580 r filter_3tap_16p_117 +ffffffff82c445c0 r filter_3tap_16p_150 +ffffffff82c44600 r filter_3tap_16p_183 +ffffffff82c45000 r hubbub2_funcs +ffffffff82c46000 r dcn20_funcs +ffffffff82c462e8 r dcn20_private_funcs +ffffffff82c47000 r dcn20_link_enc_funcs +ffffffff82c470e0 r dcn2_mpll_cfg +ffffffff82c48000 r dcn20_mmhubbub_funcs +ffffffff82c49000 r dcn20_mpc_funcs +ffffffff82c4a000 r tf_regs +ffffffff82c4b938 r tf_shift +ffffffff82c4bbc0 r tf_mask +ffffffff82c4c5e0 r ipp_regs +ffffffff82c4c730 r ipp_shift +ffffffff82c4c74c r ipp_mask +ffffffff82c4c7c0 r opp_regs +ffffffff82c4c9d0 r opp_shift +ffffffff82c4ca08 r opp_mask +ffffffff82c4cae0 r aux_engine_regs +ffffffff82c4cbd0 r aux_mask +ffffffff82c4cc30 r aux_shift +ffffffff82c4cc50 r i2c_hw_regs +ffffffff82c4cda0 r i2c_shifts +ffffffff82c4cdcc r i2c_masks +ffffffff82c4ce70 r mpc_regs +ffffffff82c4d3b8 r mpc_shift +ffffffff82c4d400 r mpc_mask +ffffffff82c4d514 r hubbub_reg +ffffffff82c4d69c r hubbub_shift +ffffffff82c4d72c r hubbub_mask +ffffffff82c4d964 r res_cap_nv10 +ffffffff82c4d9a0 r vmid_regs +ffffffff82c4db60 r vmid_shifts +ffffffff82c4db68 r vmid_masks +ffffffff82c4db90 r tg_regs +ffffffff82c4e400 r tg_shift +ffffffff82c4e4d4 r tg_mask +ffffffff82c4e820 r link_enc_regs +ffffffff82c4efc0 r link_enc_aux_regs +ffffffff82c4f020 r link_enc_hpd_regs +ffffffff82c4f038 r le_shift +ffffffff82c4f128 r le_mask +ffffffff82c4f4e0 r stream_enc_regs +ffffffff82c4fcd8 r se_shift +ffffffff82c4fdb4 r se_mask +ffffffff82c50120 r hwseq_reg +ffffffff82c5033c r hwseq_shift +ffffffff82c503bc r hwseq_mask +ffffffff82c505b0 r dsc_regs +ffffffff82c50a48 r dsc_shift +ffffffff82c50b00 r dsc_mask +ffffffff82c50de0 r hubp_regs +ffffffff82c51a28 r hubp_shift +ffffffff82c51b24 r hubp_mask +ffffffff82c51f20 r dwbc20_regs +ffffffff82c51fd8 r dwbc20_shift +ffffffff82c52058 r dwbc20_mask +ffffffff82c52250 r mcif_wb20_regs +ffffffff82c52330 r mcif_wb20_shift +ffffffff82c523d0 r mcif_wb20_mask +ffffffff82c52650 r link_enc_feature +ffffffff82c52660 r bios_regs +ffffffff82c52668 r dcn20_res_pool_funcs +ffffffff82c52760 r res_cap_nv14 +ffffffff82c527a0 r debug_defaults_drv +ffffffff82c52950 r clk_src_regs +ffffffff82c52b48 r dccg_regs +ffffffff82c52c38 r dccg_shift +ffffffff82c52cd8 r dccg_mask +ffffffff82c52f4c r dmcu_regs +ffffffff82c52fa8 r dmcu_shift +ffffffff82c52fbc r dmcu_mask +ffffffff82c53008 r abm_regs +ffffffff82c53070 r abm_shift +ffffffff82c53094 r abm_mask +ffffffff82c53120 r res_create_funcs +ffffffff82c53150 r plane_cap +ffffffff82c53180 r panel_cntl_regs +ffffffff82c531a0 r panel_cntl_shift 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cs_mask +ffffffff82c5aeb0 r hubp_regs +ffffffff82c5b640 r hubp_shift +ffffffff82c5b718 r hubp_mask +ffffffff82c5ba80 r ipp_regs +ffffffff82c5bb60 r ipp_shift +ffffffff82c5bb7c r ipp_mask +ffffffff82c5bbf0 r tf_regs +ffffffff82c5cc40 r tf_shift +ffffffff82c5cec8 r tf_mask +ffffffff82c5d8e0 r opp_regs +ffffffff82c5d990 r opp_shift +ffffffff82c5d9c8 r opp_mask +ffffffff82c5daa0 r aux_engine_regs +ffffffff82c5daf0 r aux_mask +ffffffff82c5db50 r aux_shift +ffffffff82c5db70 r i2c_hw_regs +ffffffff82c5dbe0 r i2c_shifts +ffffffff82c5dc0c r i2c_masks +ffffffff82c5dcb0 r tg_regs +ffffffff82c5df80 r tg_shift +ffffffff82c5e054 r tg_mask +ffffffff82c5e39c r mpc_regs +ffffffff82c5e8e4 r mpc_shift +ffffffff82c5e930 r mpc_mask +ffffffff82c5ea58 r hubbub_reg +ffffffff82c5ebe0 r hubbub_shift +ffffffff82c5ec70 r hubbub_mask +ffffffff82c5eeb0 r audio_regs +ffffffff82c5ef08 r audio_shift +ffffffff82c5ef20 r audio_mask +ffffffff82c5ef60 r stream_enc_regs +ffffffff82c5f208 r se_shift +ffffffff82c5f2e4 r se_mask +ffffffff82c5f650 r hwseq_reg +ffffffff82c5f86c r hwseq_shift +ffffffff82c5f8ec r hwseq_mask +ffffffff82c60000 r dccg21_funcs +ffffffff82c61000 r hubbub21_funcs +ffffffff82c62000 r dcn21_funcs +ffffffff82c622e8 r dcn21_private_funcs +ffffffff82c63000 r dcn21_link_enc_funcs +ffffffff82c630e0 r dcn21_mpll_cfg_ref +ffffffff82c64000 r bios_regs +ffffffff82c64008 r res_cap_rn +ffffffff82c64048 r dcn21_res_pool_funcs +ffffffff82c64140 r debug_defaults_drv +ffffffff82c642f0 r clk_src_regs +ffffffff82c64494 r dccg_regs +ffffffff82c64584 r dccg_shift +ffffffff82c64624 r dccg_mask +ffffffff82c64898 r dmcu_regs +ffffffff82c648f4 r dmcu_shift +ffffffff82c64908 r dmcu_mask +ffffffff82c64954 r abm_regs +ffffffff82c649bc r abm_shift +ffffffff82c649e0 r abm_mask +ffffffff82c64a70 r res_create_funcs +ffffffff82c64aa0 r plane_cap +ffffffff82c64ad0 r panel_cntl_regs +ffffffff82c64af0 r panel_cntl_shift +ffffffff82c64b00 r panel_cntl_mask +ffffffff82c64b40 r link_enc_regs +ffffffff82c651a0 r link_enc_aux_regs +ffffffff82c651f0 r link_enc_hpd_regs +ffffffff82c65204 r le_shift +ffffffff82c652f4 r le_mask +ffffffff82c656ac r link_enc_feature +ffffffff82c656bc r panel_config_defaults +ffffffff82c65710 r cs_shift +ffffffff82c6571c r cs_mask +ffffffff82c65750 r hubp_regs +ffffffff82c65f80 r hubp_shift +ffffffff82c6607c r hubp_mask +ffffffff82c66470 r ipp_regs +ffffffff82c66550 r ipp_shift +ffffffff82c6656c r ipp_mask +ffffffff82c665e0 r tf_regs +ffffffff82c676b0 r tf_shift +ffffffff82c67938 r tf_mask +ffffffff82c68350 r opp_regs +ffffffff82c68560 r opp_shift +ffffffff82c68598 r opp_mask +ffffffff82c68670 r tg_regs +ffffffff82c68c10 r tg_shift +ffffffff82c68ce4 r tg_mask +ffffffff82c69030 r aux_engine_regs +ffffffff82c690f8 r aux_mask +ffffffff82c69158 r aux_shift +ffffffff82c69170 r i2c_hw_regs +ffffffff82c69288 r i2c_shifts +ffffffff82c692b4 r i2c_masks +ffffffff82c69358 r mpc_regs +ffffffff82c698a0 r mpc_shift +ffffffff82c698e8 r mpc_mask +ffffffff82c699fc r hubbub_reg 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r dwbc30_regs +ffffffff82c8db4c r dwbc30_shift +ffffffff82c8dc80 r dwbc30_mask +ffffffff82c8e150 r mcif_wb30_regs +ffffffff82c8e24c r mcif_wb30_shift +ffffffff82c8e2f8 r mcif_wb30_mask +ffffffff82c8e5b0 r aux_engine_regs +ffffffff82c8e650 r aux_mask +ffffffff82c8e6b0 r aux_shift +ffffffff82c8e6d0 r i2c_hw_regs +ffffffff82c8e7b0 r i2c_shifts +ffffffff82c8e7dc r i2c_masks +ffffffff82c8e880 r audio_regs +ffffffff82c8e9b4 r audio_shift +ffffffff82c8e9cc r audio_mask +ffffffff82c8ea10 r stream_enc_regs +ffffffff82c8ef60 r se_shift +ffffffff82c8f03c r se_mask +ffffffff82c8f3b0 r vpg_regs +ffffffff82c8f400 r vpg_shift +ffffffff82c8f428 r vpg_mask +ffffffff82c8f4c0 r afmt_regs +ffffffff82c8f550 r afmt_shift +ffffffff82c8f564 r afmt_mask +ffffffff82c8f5a8 r hwseq_reg +ffffffff82c8f7c4 r hwseq_shift +ffffffff82c8f844 r hwseq_mask +ffffffff82c90000 r bios_regs +ffffffff82c90008 r res_cap_dcn302 +ffffffff82c90048 r debug_defaults_drv +ffffffff82c901f0 r clk_src_regs +ffffffff82c90394 r dccg_regs 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afmt_regs +ffffffff82c9a468 r afmt_shift +ffffffff82c9a47c r afmt_mask +ffffffff82c9a4c0 r hwseq_reg +ffffffff82c9a6dc r hwseq_shift +ffffffff82c9a75c r hwseq_mask +ffffffff82c9b000 r bios_regs +ffffffff82c9b008 r res_cap_dcn303 +ffffffff82c9b048 r debug_defaults_drv +ffffffff82c9b1f0 r clk_src_regs +ffffffff82c9b298 r dccg_regs +ffffffff82c9b388 r dccg_shift +ffffffff82c9b428 r dccg_mask +ffffffff82c9b6a0 r abm_regs +ffffffff82c9b770 r abm_shift +ffffffff82c9b794 r abm_mask +ffffffff82c9b820 r res_create_funcs +ffffffff82c9b850 r plane_cap +ffffffff82c9b880 r panel_cntl_regs +ffffffff82c9b8a0 r panel_cntl_shift +ffffffff82c9b8b0 r panel_cntl_mask +ffffffff82c9b8f0 r link_enc_regs +ffffffff82c9bb80 r link_enc_aux_regs +ffffffff82c9bba0 r link_enc_hpd_regs +ffffffff82c9bba8 r le_shift +ffffffff82c9bc98 r le_mask +ffffffff82c9c050 r link_enc_feature +ffffffff82c9c060 r cs_shift +ffffffff82c9c06c r cs_mask +ffffffff82c9c094 r hubbub_reg +ffffffff82c9c21c r hubbub_shift +ffffffff82c9c2ac r hubbub_mask +ffffffff82c9c4f0 r vmid_regs +ffffffff82c9c6b0 r vmid_shifts +ffffffff82c9c6b8 r vmid_masks +ffffffff82c9c6e0 r hubp_regs +ffffffff82c9caf8 r hubp_shift +ffffffff82c9cbf4 r hubp_mask +ffffffff82c9cff0 r dpp_regs +ffffffff82c9da78 r tf_shift +ffffffff82c9dd4c r tf_mask +ffffffff82c9e890 r opp_regs +ffffffff82c9e940 r opp_shift +ffffffff82c9e978 r opp_mask +ffffffff82c9ea50 r optc_regs +ffffffff82c9ed20 r optc_shift +ffffffff82c9edf4 r optc_mask +ffffffff82c9f13c r mpc_regs +ffffffff82ca0928 r mpc_shift +ffffffff82ca0a04 r mpc_mask +ffffffff82ca0d70 r dsc_regs +ffffffff82ca0ef8 r dsc_shift +ffffffff82ca0fb0 r dsc_mask +ffffffff82ca1290 r dwbc30_regs +ffffffff82ca146c r dwbc30_shift +ffffffff82ca15a0 r dwbc30_mask +ffffffff82ca1a70 r mcif_wb30_regs +ffffffff82ca1b6c r mcif_wb30_shift +ffffffff82ca1c18 r mcif_wb30_mask +ffffffff82ca1ed0 r aux_engine_regs +ffffffff82ca1f20 r aux_mask +ffffffff82ca1f80 r aux_shift +ffffffff82ca1fa0 r i2c_hw_regs +ffffffff82ca2010 r i2c_shifts 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r abm_regs +ffffffff82ca9950 r abm_shift +ffffffff82ca9974 r abm_mask +ffffffff82ca9a00 r res_create_funcs +ffffffff82ca9a30 r plane_cap +ffffffff82ca9a60 r link_enc_regs +ffffffff82caa0c0 r link_enc_aux_regs +ffffffff82caa110 r link_enc_hpd_regs +ffffffff82caa124 r le_shift +ffffffff82caa214 r le_mask +ffffffff82caa5cc r link_enc_feature +ffffffff82caa5dc r panel_config_defaults +ffffffff82caa630 r debug_defaults_drv +ffffffff82caa7d8 r cs_shift +ffffffff82caa7e4 r cs_mask +ffffffff82caa80c r hubbub_reg +ffffffff82caa994 r hubbub_shift +ffffffff82caaa24 r hubbub_mask +ffffffff82caac60 r vmid_regs +ffffffff82caae20 r vmid_shifts +ffffffff82caae28 r vmid_masks +ffffffff82caae50 r hubp_regs +ffffffff82cab680 r hubp_shift +ffffffff82cab77c r hubp_mask +ffffffff82cabb70 r dpp_regs +ffffffff82cad080 r tf_shift +ffffffff82cad354 r tf_mask +ffffffff82cadea0 r opp_regs +ffffffff82cae000 r opp_shift +ffffffff82cae038 r opp_mask +ffffffff82cae110 r optc_regs +ffffffff82cae6b0 r optc_shift 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hpo_dp_stream_enc_regs +ffffffff82cb3df0 r hpo_dp_se_shift +ffffffff82cb3e18 r hpo_dp_se_mask +ffffffff82cb3ec0 r apg_regs +ffffffff82cb3f00 r apg_shift +ffffffff82cb3f08 r apg_mask +ffffffff82cb3f20 r hpo_dp_link_enc_regs +ffffffff82cb4030 r hpo_dp_le_shift +ffffffff82cb404c r hpo_dp_le_mask +ffffffff82cb40b0 r hwseq_reg +ffffffff82cb42cc r hwseq_shift +ffffffff82cb434c r hwseq_mask +ffffffff82cb5000 r dccg314_funcs +ffffffff82cb6000 r dcn314_str_enc_funcs +ffffffff82cb7000 r dcn314_funcs +ffffffff82cb72e8 r dcn314_private_funcs +ffffffff82cb8000 r bios_regs +ffffffff82cb8008 r res_cap_dcn314 +ffffffff82cb8048 r debug_defaults_diags +ffffffff82cb81f0 r clk_src_regs +ffffffff82cb8394 r dccg_regs +ffffffff82cb8484 r dccg_shift +ffffffff82cb8524 r dccg_mask +ffffffff82cb87a0 r abm_regs +ffffffff82cb8940 r abm_shift +ffffffff82cb8964 r abm_mask +ffffffff82cb89f0 r res_create_funcs +ffffffff82cb8a20 r plane_cap +ffffffff82cb8a50 r link_enc_regs +ffffffff82cb90b0 r link_enc_aux_regs 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vmid_shifts +ffffffff82cc4c78 r vmid_masks +ffffffff82cc4ca0 r hubp_regs +ffffffff82cc54d0 r hubp_shift +ffffffff82cc55cc r hubp_mask +ffffffff82cc59c0 r dpp_regs +ffffffff82cc6ed0 r tf_shift +ffffffff82cc71a4 r tf_mask +ffffffff82cc7cf0 r opp_regs +ffffffff82cc7e50 r opp_shift +ffffffff82cc7e88 r opp_mask +ffffffff82cc7f60 r optc_regs +ffffffff82cc8500 r optc_shift +ffffffff82cc85d4 r optc_mask +ffffffff82cc891c r mpc_regs +ffffffff82cca108 r mpc_shift +ffffffff82cca1e4 r mpc_mask +ffffffff82cca550 r dsc_regs +ffffffff82cca79c r dsc_shift +ffffffff82cca854 r dsc_mask +ffffffff82ccab30 r dwbc30_regs +ffffffff82ccad0c r dwbc30_shift +ffffffff82ccae40 r dwbc30_mask +ffffffff82ccb310 r mcif_wb30_regs +ffffffff82ccb40c r mcif_wb30_shift +ffffffff82ccb4b8 r mcif_wb30_mask +ffffffff82ccb770 r aux_engine_regs +ffffffff82ccb838 r aux_mask +ffffffff82ccb898 r aux_shift +ffffffff82ccb8b0 r i2c_hw_regs +ffffffff82ccb9c8 r i2c_shifts +ffffffff82ccb9f4 r i2c_masks +ffffffff82ccbaa0 r audio_regs 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r mpc_regs +ffffffff82cd5108 r mpc_shift +ffffffff82cd51e4 r mpc_mask +ffffffff82cd5550 r dsc_regs +ffffffff82cd579c r dsc_shift +ffffffff82cd5854 r dsc_mask +ffffffff82cd5b30 r dwbc30_regs +ffffffff82cd5d0c r dwbc30_shift +ffffffff82cd5e40 r dwbc30_mask +ffffffff82cd6310 r mcif_wb30_regs +ffffffff82cd640c r mcif_wb30_shift +ffffffff82cd64b8 r mcif_wb30_mask +ffffffff82cd6770 r aux_engine_regs +ffffffff82cd6838 r aux_mask +ffffffff82cd6898 r aux_shift +ffffffff82cd68b0 r i2c_hw_regs +ffffffff82cd69c8 r i2c_shifts +ffffffff82cd69f4 r i2c_masks +ffffffff82cd6aa0 r audio_regs +ffffffff82cd6bd4 r audio_shift +ffffffff82cd6bec r audio_mask +ffffffff82cd6c30 r stream_enc_regs +ffffffff82cd72d4 r se_shift +ffffffff82cd73b0 r se_mask +ffffffff82cd7720 r vpg_regs +ffffffff82cd7810 r vpg_shift +ffffffff82cd7838 r vpg_mask +ffffffff82cd78e0 r afmt_regs +ffffffff82cd79b8 r afmt_shift +ffffffff82cd79cc r afmt_mask +ffffffff82cd7a20 r hpo_dp_stream_enc_regs +ffffffff82cd7c50 r hpo_dp_se_shift +ffffffff82cd7c78 r hpo_dp_se_mask +ffffffff82cd7d20 r apg_regs +ffffffff82cd7d60 r apg_shift +ffffffff82cd7d68 r apg_mask +ffffffff82cd7d80 r hpo_dp_link_enc_regs +ffffffff82cd7e90 r hpo_dp_le_shift +ffffffff82cd7eac r hpo_dp_le_mask +ffffffff82cd7f10 r hwseq_reg +ffffffff82cd812c r hwseq_shift +ffffffff82cd81ac r hwseq_mask +ffffffff82cd9000 r dccg32_funcs +ffffffff82cda000 r dcn32_link_enc_funcs +ffffffff82cdb000 r dcn32_str_enc_funcs +ffffffff82cdc000 r hubbub32_funcs +ffffffff82cdd000 r dcn32_funcs +ffffffff82cdd2e8 r dcn32_private_funcs +ffffffff82cde000 r dcn32_mmhubbub_funcs +ffffffff82cdf000 r dcn32_mpc_funcs +ffffffff82ce0000 r res_cap_dcn32 +ffffffff82ce003c r dccg_shift +ffffffff82ce00dc r dccg_mask +ffffffff82ce0350 r abm_shift +ffffffff82ce0374 r abm_mask +ffffffff82ce0400 r res_create_funcs +ffffffff82ce0430 r plane_cap +ffffffff82ce045c r le_shift +ffffffff82ce054c r le_mask +ffffffff82ce0904 r link_enc_feature +ffffffff82ce0918 r debug_defaults_drv +ffffffff82ce0ac0 r cs_shift +ffffffff82ce0acc r cs_mask +ffffffff82ce0af4 r hubbub_shift +ffffffff82ce0b84 r hubbub_mask +ffffffff82ce0dbc r vmid_shifts +ffffffff82ce0dc4 r vmid_masks +ffffffff82ce0de4 r hubp_shift +ffffffff82ce0ee0 r hubp_mask +ffffffff82ce12d0 r tf_shift +ffffffff82ce15a4 r tf_mask +ffffffff82ce20e8 r opp_shift +ffffffff82ce2120 r opp_mask +ffffffff82ce21f4 r optc_shift +ffffffff82ce22c8 r optc_mask +ffffffff82ce2610 r mpc_shift +ffffffff82ce26ec r mpc_mask +ffffffff82ce2a58 r dsc_shift +ffffffff82ce2b10 r dsc_mask +ffffffff82ce2de8 r dwbc30_shift +ffffffff82ce2f1c r dwbc30_mask +ffffffff82ce33e4 r mcif_wb30_shift +ffffffff82ce3490 r mcif_wb30_mask +ffffffff82ce373c r aux_mask +ffffffff82ce379c r aux_shift +ffffffff82ce37b4 r i2c_shifts +ffffffff82ce37e0 r i2c_masks +ffffffff82ce3884 r audio_shift +ffffffff82ce389c r audio_mask +ffffffff82ce38d8 r se_shift +ffffffff82ce39b4 r se_mask +ffffffff82ce3d20 r vpg_shift +ffffffff82ce3d48 r vpg_mask +ffffffff82ce3ddc r afmt_shift +ffffffff82ce3df0 r afmt_mask +ffffffff82ce3e34 r hpo_dp_se_shift +ffffffff82ce3e5c r hpo_dp_se_mask +ffffffff82ce3efc r apg_shift +ffffffff82ce3f04 r apg_mask +ffffffff82ce3f1c r hpo_dp_le_shift +ffffffff82ce3f38 r hpo_dp_le_mask +ffffffff82ce3f9c r hwseq_shift +ffffffff82ce401c r hwseq_mask +ffffffff82ce5000 r dcn321_link_enc_funcs +ffffffff82ce6000 r res_cap_dcn321 +ffffffff82ce603c r dccg_shift +ffffffff82ce60dc r dccg_mask +ffffffff82ce6350 r abm_shift +ffffffff82ce6374 r abm_mask +ffffffff82ce6400 r res_create_funcs +ffffffff82ce6430 r plane_cap +ffffffff82ce645c r le_shift +ffffffff82ce654c r le_mask +ffffffff82ce6904 r link_enc_feature +ffffffff82ce6918 r debug_defaults_drv +ffffffff82ce6ac0 r cs_shift +ffffffff82ce6acc r cs_mask +ffffffff82ce6af4 r hubbub_shift +ffffffff82ce6b84 r hubbub_mask +ffffffff82ce6dbc r vmid_shifts +ffffffff82ce6dc4 r vmid_masks +ffffffff82ce6de4 r hubp_shift +ffffffff82ce6ee0 r hubp_mask +ffffffff82ce72d0 r tf_shift +ffffffff82ce75a4 r tf_mask +ffffffff82ce80e8 r opp_shift +ffffffff82ce8120 r opp_mask +ffffffff82ce81f4 r optc_shift +ffffffff82ce82c8 r optc_mask +ffffffff82ce8610 r mpc_shift +ffffffff82ce86ec r mpc_mask +ffffffff82ce8a58 r dsc_shift +ffffffff82ce8b10 r dsc_mask +ffffffff82ce8de8 r dwbc30_shift +ffffffff82ce8f1c r dwbc30_mask +ffffffff82ce93e4 r mcif_wb30_shift +ffffffff82ce9490 r mcif_wb30_mask +ffffffff82ce973c r aux_mask +ffffffff82ce979c r aux_shift +ffffffff82ce97b4 r i2c_shifts +ffffffff82ce97e0 r i2c_masks +ffffffff82ce9884 r audio_shift +ffffffff82ce989c r audio_mask +ffffffff82ce98d8 r se_shift +ffffffff82ce99b4 r se_mask +ffffffff82ce9d20 r vpg_shift +ffffffff82ce9d48 r vpg_mask +ffffffff82ce9ddc r afmt_shift +ffffffff82ce9df0 r afmt_mask +ffffffff82ce9e34 r hpo_dp_se_shift +ffffffff82ce9e5c r hpo_dp_se_mask +ffffffff82ce9efc r apg_shift +ffffffff82ce9f04 r apg_mask +ffffffff82ce9f1c r hpo_dp_le_shift +ffffffff82ce9f38 r hpo_dp_le_mask +ffffffff82ce9f9c r hwseq_shift +ffffffff82cea01c r hwseq_mask +ffffffff82cec000 R dcn10_soc_defaults +ffffffff82cec08c R dcn10_ip_defaults +ffffffff82cf8000 r dml20_funcs +ffffffff82cf8030 r dml20v2_funcs +ffffffff82cf8060 r dml21_funcs +ffffffff82cf8090 r dml30_funcs +ffffffff82cf80c0 r dml31_funcs +ffffffff82cf80f0 r dml314_funcs +ffffffff82cf8120 r dml32_funcs +ffffffff82cfb000 r qp_table_444_8bpc_max +ffffffff82cfb940 r qp_table_444_8bpc_min +ffffffff82cfc280 r qp_table_444_10bpc_max +ffffffff82cfcec0 r qp_table_444_10bpc_min +ffffffff82cfdb00 r qp_table_444_12bpc_max +ffffffff82cfea40 r qp_table_444_12bpc_min +ffffffff82cff980 r qp_table_422_8bpc_max +ffffffff82cffec0 r qp_table_422_8bpc_min +ffffffff82d00400 r qp_table_422_10bpc_max +ffffffff82d00b40 r qp_table_422_10bpc_min +ffffffff82d01280 r qp_table_422_12bpc_max +ffffffff82d01bc0 r qp_table_422_12bpc_min +ffffffff82d02500 r qp_table_420_8bpc_max +ffffffff82d02940 r qp_table_420_8bpc_min +ffffffff82d02d80 r qp_table_420_10bpc_max +ffffffff82d03340 r qp_table_420_10bpc_min +ffffffff82d03900 r qp_table_420_12bpc_max +ffffffff82d04040 r qp_table_420_12bpc_min ffffffff82d06000 r funcs +ffffffff82d06050 r hpd_regs +ffffffff82d061a0 r hpd_shift +ffffffff82d061b0 r hpd_mask +ffffffff82d061c0 r ddc_data_regs +ffffffff82d063a0 r ddc_clk_regs +ffffffff82d06580 r ddc_shift +ffffffff82d065a8 r ddc_mask ffffffff82d07000 r funcs -ffffffff82d07050 r hpd_regs -ffffffff82d071a0 r hpd_shift -ffffffff82d071b0 r hpd_mask -ffffffff82d071c0 r ddc_data_regs -ffffffff82d073a0 r ddc_clk_regs -ffffffff82d07580 r ddc_shift -ffffffff82d075a8 r ddc_mask ffffffff82d08000 r funcs +ffffffff82d08050 r hpd_regs +ffffffff82d081a0 r hpd_shift +ffffffff82d081b0 r hpd_mask +ffffffff82d081c0 r ddc_data_regs +ffffffff82d083a0 r ddc_clk_regs +ffffffff82d08580 r ddc_shift +ffffffff82d085a8 r ddc_mask ffffffff82d09000 r funcs -ffffffff82d09050 r hpd_regs -ffffffff82d091a0 r hpd_shift -ffffffff82d091b0 r hpd_mask -ffffffff82d091c0 r ddc_data_regs -ffffffff82d093a0 r ddc_clk_regs -ffffffff82d09580 r ddc_shift -ffffffff82d095a8 r ddc_mask ffffffff82d0a000 r funcs +ffffffff82d0a050 r hpd_regs +ffffffff82d0a1a0 r hpd_shift +ffffffff82d0a1b0 r hpd_mask +ffffffff82d0a1c0 r ddc_data_regs +ffffffff82d0a3a0 r ddc_clk_regs +ffffffff82d0a580 r ddc_shift +ffffffff82d0a5a8 r ddc_mask ffffffff82d0b000 r funcs -ffffffff82d0b050 r hpd_regs -ffffffff82d0b1a0 r hpd_shift -ffffffff82d0b1b0 r hpd_mask -ffffffff82d0b1c0 r ddc_data_regs -ffffffff82d0b3a0 r ddc_clk_regs -ffffffff82d0b580 r ddc_shift -ffffffff82d0b5a8 r ddc_mask -ffffffff82d0b5d0 r generic_regs -ffffffff82d0b640 r generic_shift -ffffffff82d0b650 r generic_mask ffffffff82d0c000 r funcs +ffffffff82d0c050 r hpd_regs +ffffffff82d0c1a0 r hpd_shift +ffffffff82d0c1b0 r hpd_mask +ffffffff82d0c1c0 r ddc_data_regs +ffffffff82d0c3a0 r ddc_clk_regs +ffffffff82d0c580 r ddc_shift +ffffffff82d0c5a8 r ddc_mask +ffffffff82d0c5d0 r generic_regs +ffffffff82d0c640 r generic_shift +ffffffff82d0c650 r generic_mask ffffffff82d0d000 r funcs -ffffffff82d0d050 r hpd_regs -ffffffff82d0d1a0 r hpd_shift -ffffffff82d0d1b0 r hpd_mask -ffffffff82d0d1c0 r ddc_data_regs_dcn -ffffffff82d0d370 r ddc_clk_regs_dcn -ffffffff82d0d520 r ddc_shift -ffffffff82d0d640 r ddc_mask -ffffffff82d0d760 r generic_regs -ffffffff82d0d7d0 r generic_shift -ffffffff82d0d7e0 r generic_mask ffffffff82d0e000 r funcs +ffffffff82d0e050 r hpd_regs +ffffffff82d0e1a0 r hpd_shift +ffffffff82d0e1b0 r hpd_mask +ffffffff82d0e1c0 r ddc_data_regs_dcn +ffffffff82d0e370 r ddc_clk_regs_dcn +ffffffff82d0e520 r ddc_shift +ffffffff82d0e640 r ddc_mask +ffffffff82d0e760 r generic_regs +ffffffff82d0e7d0 r generic_shift +ffffffff82d0e7e0 r generic_mask ffffffff82d0f000 r funcs -ffffffff82d0f050 r hpd_regs -ffffffff82d0f168 r hpd_shift -ffffffff82d0f178 r hpd_mask -ffffffff82d0f190 r ddc_data_regs_dcn -ffffffff82d0f2c0 r ddc_clk_regs_dcn -ffffffff82d0f3f0 r ddc_shift -ffffffff82d0f4e0 r ddc_mask -ffffffff82d0f5d0 r generic_regs -ffffffff82d0f604 r generic_shift -ffffffff82d0f60c r generic_mask ffffffff82d10000 r funcs +ffffffff82d10050 r hpd_regs +ffffffff82d10168 r hpd_shift +ffffffff82d10178 r hpd_mask +ffffffff82d10190 r ddc_data_regs_dcn +ffffffff82d102c0 r ddc_clk_regs_dcn +ffffffff82d103f0 r ddc_shift +ffffffff82d104e0 r ddc_mask +ffffffff82d105d0 r generic_regs +ffffffff82d10604 r generic_shift +ffffffff82d1060c r generic_mask ffffffff82d11000 r funcs -ffffffff82d11050 r hpd_regs -ffffffff82d111a0 r hpd_shift -ffffffff82d111b0 r hpd_mask -ffffffff82d111c0 r ddc_data_regs_dcn -ffffffff82d11370 r ddc_clk_regs_dcn -ffffffff82d11520 r ddc_shift -ffffffff82d11640 r ddc_mask -ffffffff82d11760 r generic_regs -ffffffff82d117d0 r generic_shift -ffffffff82d117e0 r generic_mask ffffffff82d12000 r funcs +ffffffff82d12050 r hpd_regs +ffffffff82d121a0 r hpd_shift +ffffffff82d121b0 r hpd_mask +ffffffff82d121c0 r ddc_data_regs_dcn +ffffffff82d12370 r ddc_clk_regs_dcn +ffffffff82d12520 r ddc_shift +ffffffff82d12640 r ddc_mask +ffffffff82d12760 r generic_regs +ffffffff82d127d0 r generic_shift +ffffffff82d127e0 r generic_mask ffffffff82d13000 r funcs -ffffffff82d13050 r hpd_regs -ffffffff82d13168 r hpd_shift -ffffffff82d13178 r hpd_mask -ffffffff82d13190 r ddc_data_regs_dcn -ffffffff82d13300 r ddc_clk_regs_dcn -ffffffff82d13470 r ddc_shift -ffffffff82d13560 r ddc_mask -ffffffff82d13650 r generic_regs -ffffffff82d136c0 r generic_shift -ffffffff82d136d0 r generic_mask ffffffff82d14000 r funcs +ffffffff82d14050 r hpd_regs +ffffffff82d14168 r hpd_shift +ffffffff82d14178 r hpd_mask +ffffffff82d14190 r ddc_data_regs_dcn +ffffffff82d14300 r ddc_clk_regs_dcn +ffffffff82d14470 r ddc_shift +ffffffff82d14560 r ddc_mask +ffffffff82d14650 r generic_regs +ffffffff82d146c0 r generic_shift +ffffffff82d146d0 r generic_mask ffffffff82d15000 r funcs -ffffffff82d15050 r hpd_regs -ffffffff82d15168 r hpd_shift -ffffffff82d15178 r hpd_mask -ffffffff82d15190 r ddc_data_regs_dcn -ffffffff82d15340 r ddc_clk_regs_dcn -ffffffff82d154f0 r ddc_shift -ffffffff82d15610 r ddc_mask -ffffffff82d15730 r generic_regs -ffffffff82d157a0 r generic_shift -ffffffff82d157b0 r generic_mask ffffffff82d16000 r funcs +ffffffff82d16050 r hpd_regs +ffffffff82d16168 r hpd_shift +ffffffff82d16178 r hpd_mask +ffffffff82d16190 r ddc_data_regs_dcn +ffffffff82d16340 r ddc_clk_regs_dcn +ffffffff82d164f0 r ddc_shift +ffffffff82d16610 r ddc_mask +ffffffff82d16730 r generic_regs +ffffffff82d167a0 r generic_shift +ffffffff82d167b0 r generic_mask ffffffff82d17000 r funcs ffffffff82d18000 r funcs ffffffff82d19000 r funcs -ffffffff82d1a000 r hdmi_14_protection -ffffffff82d1a010 r dp_11_protection -ffffffff82d1a020 r hdcp_i2c_offsets -ffffffff82d1a050 r hdcp_dpcd_addrs -ffffffff82d1b000 r irq_service_funcs_dce110 -ffffffff82d1b008 r dummy_irq_info_funcs -ffffffff82d1b018 r hpd_irq_info_funcs -ffffffff82d1b028 r hpd_rx_irq_info_funcs -ffffffff82d1b038 r pflip_irq_info_funcs -ffffffff82d1b048 r vupdate_irq_info_funcs -ffffffff82d1b058 r vblank_irq_info_funcs -ffffffff82d1b070 r irq_source_info_dce110 -ffffffff82d1d000 r irq_service_funcs_dce120 -ffffffff82d1d008 r dummy_irq_info_funcs -ffffffff82d1d018 r hpd_irq_info_funcs -ffffffff82d1d028 r hpd_rx_irq_info_funcs -ffffffff82d1d038 r pflip_irq_info_funcs -ffffffff82d1d048 r vupdate_irq_info_funcs -ffffffff82d1d058 r vblank_irq_info_funcs -ffffffff82d1d070 r irq_source_info_dce120 -ffffffff82d1f000 r irq_service_funcs_dce80 -ffffffff82d1f008 r dummy_irq_info_funcs -ffffffff82d1f018 r hpd_irq_info_funcs -ffffffff82d1f028 r hpd_rx_irq_info_funcs -ffffffff82d1f038 r pflip_irq_info_funcs -ffffffff82d1f048 r vupdate_irq_info_funcs -ffffffff82d1f058 r vblank_irq_info_funcs -ffffffff82d1f070 r irq_source_info_dce80 -ffffffff82d21000 r irq_service_funcs_dcn10 -ffffffff82d21008 r dummy_irq_info_funcs -ffffffff82d21018 r hpd_irq_info_funcs -ffffffff82d21028 r hpd_rx_irq_info_funcs -ffffffff82d21038 r pflip_irq_info_funcs -ffffffff82d21048 r vupdate_no_lock_irq_info_funcs -ffffffff82d21058 r vblank_irq_info_funcs -ffffffff82d21068 r vline0_irq_info_funcs -ffffffff82d21080 r irq_source_info_dcn10 -ffffffff82d23000 r irq_service_funcs_dcn20 -ffffffff82d23008 r dummy_irq_info_funcs -ffffffff82d23018 r hpd_irq_info_funcs -ffffffff82d23028 r hpd_rx_irq_info_funcs -ffffffff82d23038 r pflip_irq_info_funcs -ffffffff82d23048 r vupdate_no_lock_irq_info_funcs -ffffffff82d23058 r vblank_irq_info_funcs -ffffffff82d23068 r vline0_irq_info_funcs -ffffffff82d23080 r irq_source_info_dcn20 -ffffffff82d25000 r irq_service_funcs_dcn201 -ffffffff82d25008 r dummy_irq_info_funcs -ffffffff82d25018 r hpd_irq_info_funcs -ffffffff82d25028 r hpd_rx_irq_info_funcs -ffffffff82d25038 r pflip_irq_info_funcs -ffffffff82d25048 r vupdate_no_lock_irq_info_funcs -ffffffff82d25058 r vblank_irq_info_funcs -ffffffff82d25068 r vline0_irq_info_funcs -ffffffff82d25080 r irq_source_info_dcn201 -ffffffff82d27000 r irq_source_info_dcn21 -ffffffff82d28290 r irq_service_funcs_dcn21 -ffffffff82d28298 r dummy_irq_info_funcs -ffffffff82d282a8 r hpd_irq_info_funcs -ffffffff82d282b8 r hpd_rx_irq_info_funcs -ffffffff82d282c8 r pflip_irq_info_funcs -ffffffff82d282d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d282e8 r vblank_irq_info_funcs -ffffffff82d282f8 r vline0_irq_info_funcs -ffffffff82d28308 r dmub_outbox_irq_info_funcs -ffffffff82d29000 r irq_source_info_dcn30 -ffffffff82d2a290 r irq_service_funcs_dcn30 -ffffffff82d2a298 r dummy_irq_info_funcs -ffffffff82d2a2a8 r hpd_irq_info_funcs -ffffffff82d2a2b8 r hpd_rx_irq_info_funcs -ffffffff82d2a2c8 r pflip_irq_info_funcs -ffffffff82d2a2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d2a2e8 r vblank_irq_info_funcs -ffffffff82d2a2f8 r vline0_irq_info_funcs -ffffffff82d2a308 r dmub_trace_irq_info_funcs -ffffffff82d2b000 r irq_source_info_dcn302 -ffffffff82d2c290 r irq_service_funcs_dcn302 -ffffffff82d2c298 r dummy_irq_info_funcs -ffffffff82d2c2a8 r hpd_irq_info_funcs -ffffffff82d2c2b8 r hpd_rx_irq_info_funcs -ffffffff82d2c2c8 r pflip_irq_info_funcs -ffffffff82d2c2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d2c2e8 r vblank_irq_info_funcs -ffffffff82d2c2f8 r vline0_irq_info_funcs -ffffffff82d2c308 r dmub_trace_irq_info_funcs -ffffffff82d2d000 r irq_service_funcs_dcn303 -ffffffff82d2d008 r dummy_irq_info_funcs -ffffffff82d2d018 r hpd_irq_info_funcs -ffffffff82d2d028 r hpd_rx_irq_info_funcs -ffffffff82d2d038 r pflip_irq_info_funcs -ffffffff82d2d048 r vupdate_no_lock_irq_info_funcs -ffffffff82d2d058 r vblank_irq_info_funcs -ffffffff82d2d068 r vline0_irq_info_funcs -ffffffff82d2d080 r irq_source_info_dcn303 -ffffffff82d2f000 r irq_source_info_dcn31 -ffffffff82d30290 r irq_service_funcs_dcn31 -ffffffff82d30298 r dummy_irq_info_funcs -ffffffff82d302a8 r hpd_irq_info_funcs -ffffffff82d302b8 r hpd_rx_irq_info_funcs -ffffffff82d302c8 r pflip_irq_info_funcs -ffffffff82d302d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d302e8 r vblank_irq_info_funcs -ffffffff82d302f8 r vline0_irq_info_funcs -ffffffff82d30308 r outbox_irq_info_funcs -ffffffff82d31000 r irq_source_info_dcn314 -ffffffff82d32290 r irq_service_funcs_dcn314 -ffffffff82d32298 r dummy_irq_info_funcs -ffffffff82d322a8 r hpd_irq_info_funcs -ffffffff82d322b8 r hpd_rx_irq_info_funcs -ffffffff82d322c8 r pflip_irq_info_funcs -ffffffff82d322d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d322e8 r vblank_irq_info_funcs -ffffffff82d322f8 r vline0_irq_info_funcs -ffffffff82d32308 r outbox_irq_info_funcs -ffffffff82d33000 r irq_source_info_dcn315 -ffffffff82d34290 r irq_service_funcs_dcn315 -ffffffff82d34298 r dummy_irq_info_funcs -ffffffff82d342a8 r hpd_irq_info_funcs -ffffffff82d342b8 r hpd_rx_irq_info_funcs -ffffffff82d342c8 r pflip_irq_info_funcs -ffffffff82d342d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d342e8 r vblank_irq_info_funcs -ffffffff82d342f8 r vline0_irq_info_funcs -ffffffff82d34308 r outbox_irq_info_funcs -ffffffff82d35000 r irq_source_info_dcn32 -ffffffff82d36290 r irq_service_funcs_dcn32 -ffffffff82d36298 r dummy_irq_info_funcs -ffffffff82d362a8 r hpd_irq_info_funcs -ffffffff82d362b8 r hpd_rx_irq_info_funcs -ffffffff82d362c8 r pflip_irq_info_funcs -ffffffff82d362d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d362e8 r vblank_irq_info_funcs -ffffffff82d362f8 r vline0_irq_info_funcs -ffffffff82d36308 r outbox_irq_info_funcs -ffffffff82d38000 r dio_link_hwss -ffffffff82d39000 r dio_fixed_vs_pe_retimer_link_hwss -ffffffff82d3a000 r dpia_link_hwss -ffffffff82d3b000 r hpo_dp_link_hwss -ffffffff82d3c000 r hpo_fixed_vs_pe_retimer_dp_link_hwss -ffffffff82d3d000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82d3e000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82d3e006 r DP_DVI_CONVERTER_ID_4 -ffffffff82d3e00d r DP_DVI_CONVERTER_ID_5 -ffffffff82d3f000 r dp_lt_fallbacks -ffffffff82d43000 r mandatory_dpcd_partitions -ffffffff82d44000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82d44007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82d45000 r virtual_lnk_enc_funcs -ffffffff82d46000 r virtual_link_hwss -ffffffff82d47000 r virtual_str_enc_funcs -ffffffff82d48000 R dmub_srv_dcn20_regs -ffffffff82d49000 R dmub_srv_dcn21_regs -ffffffff82d4a000 R dmub_srv_dcn30_regs -ffffffff82d4b000 R dmub_srv_dcn301_regs -ffffffff82d4c000 R dmub_srv_dcn302_regs -ffffffff82d4d000 R dmub_srv_dcn303_regs -ffffffff82d4e000 R dmub_srv_dcn31_regs -ffffffff82d4f000 R dmub_srv_dcn314_regs -ffffffff82d50000 R dmub_srv_dcn315_regs -ffffffff82d51000 R dmub_srv_dcn316_regs -ffffffff82d52000 R dmub_srv_dcn32_regs -ffffffff82d53000 r numerator01 -ffffffff82d53020 r numerator02 -ffffffff82d53040 r numerator04 -ffffffff82d53060 r numerator05 -ffffffff82d57000 r abm_settings -ffffffff82d57020 r abm_settings_config0 -ffffffff82d57060 r abm_settings_config1 -ffffffff82d570a0 r abm_settings_config2 -ffffffff82d570d8 r min_reduction_table_v_2_2 -ffffffff82d570e5 r max_reduction_table_v_2_2 -ffffffff82d570f2 r min_reduction_table -ffffffff82d570ff r max_reduction_table -ffffffff82d57110 r custom_backlight_curve0 -ffffffff82d58000 R amdgpu_pp_profile_name -ffffffff82d59000 r pp_lib_thermal_controller_names -ffffffff82d5a000 r pp_ip_funcs -ffffffff82d5a0a0 R pp_smu_ip_block -ffffffff82d5a0b8 r pp_dpm_funcs -ffffffff82d5b000 r gpio_tbl -ffffffff82d5b0f0 r enable_fb_req_rej_tbl -ffffffff82d5b140 r use_bclk_tbl -ffffffff82d5b310 r turn_off_plls_tbl -ffffffff82d5b640 r enter_baco_tbl -ffffffff82d5b730 r exit_baco_tbl -ffffffff82d5b850 r clean_baco_tbl +ffffffff82d1a000 r funcs +ffffffff82d1b000 r hdmi_14_protection +ffffffff82d1b010 r dp_11_protection +ffffffff82d1b020 r hdcp_i2c_offsets +ffffffff82d1b050 r hdcp_dpcd_addrs +ffffffff82d1c000 r irq_service_funcs_dce110 +ffffffff82d1c008 r dummy_irq_info_funcs +ffffffff82d1c018 r hpd_irq_info_funcs +ffffffff82d1c028 r hpd_rx_irq_info_funcs +ffffffff82d1c038 r pflip_irq_info_funcs +ffffffff82d1c048 r vupdate_irq_info_funcs +ffffffff82d1c058 r vblank_irq_info_funcs +ffffffff82d1c070 r irq_source_info_dce110 +ffffffff82d1e000 r irq_service_funcs_dce120 +ffffffff82d1e008 r dummy_irq_info_funcs +ffffffff82d1e018 r hpd_irq_info_funcs +ffffffff82d1e028 r hpd_rx_irq_info_funcs +ffffffff82d1e038 r pflip_irq_info_funcs +ffffffff82d1e048 r vupdate_irq_info_funcs +ffffffff82d1e058 r vblank_irq_info_funcs +ffffffff82d1e070 r irq_source_info_dce120 +ffffffff82d20000 r irq_service_funcs_dce80 +ffffffff82d20008 r dummy_irq_info_funcs +ffffffff82d20018 r hpd_irq_info_funcs +ffffffff82d20028 r hpd_rx_irq_info_funcs +ffffffff82d20038 r pflip_irq_info_funcs +ffffffff82d20048 r vupdate_irq_info_funcs +ffffffff82d20058 r vblank_irq_info_funcs +ffffffff82d20070 r irq_source_info_dce80 +ffffffff82d22000 r irq_service_funcs_dcn10 +ffffffff82d22008 r dummy_irq_info_funcs +ffffffff82d22018 r hpd_irq_info_funcs +ffffffff82d22028 r hpd_rx_irq_info_funcs +ffffffff82d22038 r pflip_irq_info_funcs +ffffffff82d22048 r vupdate_no_lock_irq_info_funcs +ffffffff82d22058 r vblank_irq_info_funcs +ffffffff82d22068 r vline0_irq_info_funcs +ffffffff82d22080 r irq_source_info_dcn10 +ffffffff82d24000 r irq_service_funcs_dcn20 +ffffffff82d24008 r dummy_irq_info_funcs +ffffffff82d24018 r hpd_irq_info_funcs +ffffffff82d24028 r hpd_rx_irq_info_funcs +ffffffff82d24038 r pflip_irq_info_funcs +ffffffff82d24048 r vupdate_no_lock_irq_info_funcs +ffffffff82d24058 r vblank_irq_info_funcs +ffffffff82d24068 r vline0_irq_info_funcs +ffffffff82d24080 r irq_source_info_dcn20 +ffffffff82d26000 r irq_service_funcs_dcn201 +ffffffff82d26008 r dummy_irq_info_funcs +ffffffff82d26018 r hpd_irq_info_funcs +ffffffff82d26028 r hpd_rx_irq_info_funcs +ffffffff82d26038 r pflip_irq_info_funcs +ffffffff82d26048 r vupdate_no_lock_irq_info_funcs +ffffffff82d26058 r vblank_irq_info_funcs +ffffffff82d26068 r vline0_irq_info_funcs +ffffffff82d26080 r irq_source_info_dcn201 +ffffffff82d28000 r irq_source_info_dcn21 +ffffffff82d29290 r irq_service_funcs_dcn21 +ffffffff82d29298 r dummy_irq_info_funcs +ffffffff82d292a8 r hpd_irq_info_funcs +ffffffff82d292b8 r hpd_rx_irq_info_funcs +ffffffff82d292c8 r pflip_irq_info_funcs +ffffffff82d292d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d292e8 r vblank_irq_info_funcs +ffffffff82d292f8 r vline0_irq_info_funcs +ffffffff82d29308 r dmub_outbox_irq_info_funcs +ffffffff82d2a000 r irq_source_info_dcn30 +ffffffff82d2b290 r irq_service_funcs_dcn30 +ffffffff82d2b298 r dummy_irq_info_funcs +ffffffff82d2b2a8 r hpd_irq_info_funcs +ffffffff82d2b2b8 r hpd_rx_irq_info_funcs +ffffffff82d2b2c8 r pflip_irq_info_funcs +ffffffff82d2b2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d2b2e8 r vblank_irq_info_funcs +ffffffff82d2b2f8 r vline0_irq_info_funcs +ffffffff82d2b308 r dmub_trace_irq_info_funcs +ffffffff82d2c000 r irq_source_info_dcn302 +ffffffff82d2d290 r irq_service_funcs_dcn302 +ffffffff82d2d298 r dummy_irq_info_funcs +ffffffff82d2d2a8 r hpd_irq_info_funcs +ffffffff82d2d2b8 r hpd_rx_irq_info_funcs +ffffffff82d2d2c8 r pflip_irq_info_funcs +ffffffff82d2d2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d2d2e8 r vblank_irq_info_funcs +ffffffff82d2d2f8 r vline0_irq_info_funcs +ffffffff82d2d308 r dmub_trace_irq_info_funcs +ffffffff82d2e000 r irq_service_funcs_dcn303 +ffffffff82d2e008 r dummy_irq_info_funcs +ffffffff82d2e018 r hpd_irq_info_funcs +ffffffff82d2e028 r hpd_rx_irq_info_funcs +ffffffff82d2e038 r pflip_irq_info_funcs +ffffffff82d2e048 r vupdate_no_lock_irq_info_funcs +ffffffff82d2e058 r vblank_irq_info_funcs +ffffffff82d2e068 r vline0_irq_info_funcs +ffffffff82d2e080 r irq_source_info_dcn303 +ffffffff82d30000 r irq_source_info_dcn31 +ffffffff82d31290 r irq_service_funcs_dcn31 +ffffffff82d31298 r dummy_irq_info_funcs +ffffffff82d312a8 r hpd_irq_info_funcs +ffffffff82d312b8 r hpd_rx_irq_info_funcs +ffffffff82d312c8 r pflip_irq_info_funcs +ffffffff82d312d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d312e8 r vblank_irq_info_funcs +ffffffff82d312f8 r vline0_irq_info_funcs +ffffffff82d31308 r outbox_irq_info_funcs +ffffffff82d32000 r irq_source_info_dcn314 +ffffffff82d33290 r irq_service_funcs_dcn314 +ffffffff82d33298 r dummy_irq_info_funcs +ffffffff82d332a8 r hpd_irq_info_funcs +ffffffff82d332b8 r hpd_rx_irq_info_funcs +ffffffff82d332c8 r pflip_irq_info_funcs +ffffffff82d332d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d332e8 r vblank_irq_info_funcs +ffffffff82d332f8 r vline0_irq_info_funcs +ffffffff82d33308 r outbox_irq_info_funcs +ffffffff82d34000 r irq_source_info_dcn315 +ffffffff82d35290 r irq_service_funcs_dcn315 +ffffffff82d35298 r dummy_irq_info_funcs +ffffffff82d352a8 r hpd_irq_info_funcs +ffffffff82d352b8 r hpd_rx_irq_info_funcs +ffffffff82d352c8 r pflip_irq_info_funcs +ffffffff82d352d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d352e8 r vblank_irq_info_funcs +ffffffff82d352f8 r vline0_irq_info_funcs +ffffffff82d35308 r outbox_irq_info_funcs +ffffffff82d36000 r irq_source_info_dcn32 +ffffffff82d37290 r irq_service_funcs_dcn32 +ffffffff82d37298 r dummy_irq_info_funcs +ffffffff82d372a8 r hpd_irq_info_funcs +ffffffff82d372b8 r hpd_rx_irq_info_funcs +ffffffff82d372c8 r pflip_irq_info_funcs +ffffffff82d372d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d372e8 r vblank_irq_info_funcs +ffffffff82d372f8 r vline0_irq_info_funcs +ffffffff82d37308 r outbox_irq_info_funcs +ffffffff82d39000 r dio_link_hwss +ffffffff82d3a000 r dio_fixed_vs_pe_retimer_link_hwss +ffffffff82d3b000 r dpia_link_hwss +ffffffff82d3c000 r hpo_dp_link_hwss +ffffffff82d3d000 r hpo_fixed_vs_pe_retimer_dp_link_hwss +ffffffff82d3e000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82d3f000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82d3f006 r DP_DVI_CONVERTER_ID_4 +ffffffff82d3f00d r DP_DVI_CONVERTER_ID_5 +ffffffff82d40000 r dp_lt_fallbacks +ffffffff82d44000 r mandatory_dpcd_partitions +ffffffff82d45000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82d45007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82d46000 r virtual_lnk_enc_funcs +ffffffff82d47000 r virtual_link_hwss +ffffffff82d48000 r virtual_str_enc_funcs +ffffffff82d49000 R dmub_srv_dcn20_regs +ffffffff82d4a000 R dmub_srv_dcn21_regs +ffffffff82d4b000 R dmub_srv_dcn30_regs +ffffffff82d4c000 R dmub_srv_dcn301_regs +ffffffff82d4d000 R dmub_srv_dcn302_regs +ffffffff82d4e000 R dmub_srv_dcn303_regs +ffffffff82d4f000 R dmub_srv_dcn31_regs +ffffffff82d50000 R dmub_srv_dcn314_regs +ffffffff82d51000 R dmub_srv_dcn315_regs +ffffffff82d52000 R dmub_srv_dcn316_regs +ffffffff82d53000 R dmub_srv_dcn32_regs +ffffffff82d54000 r numerator01 +ffffffff82d54020 r numerator02 +ffffffff82d54040 r numerator04 +ffffffff82d54060 r numerator05 +ffffffff82d58000 r abm_settings +ffffffff82d58020 r abm_settings_config0 +ffffffff82d58060 r abm_settings_config1 +ffffffff82d580a0 r abm_settings_config2 +ffffffff82d580d8 r min_reduction_table_v_2_2 +ffffffff82d580e5 r max_reduction_table_v_2_2 +ffffffff82d580f2 r min_reduction_table +ffffffff82d580ff r max_reduction_table +ffffffff82d58110 r custom_backlight_curve0 +ffffffff82d59000 R amdgpu_pp_profile_name +ffffffff82d5a000 r pp_lib_thermal_controller_names +ffffffff82d5b000 r pp_ip_funcs +ffffffff82d5b0a0 R pp_smu_ip_block +ffffffff82d5b0b8 r pp_dpm_funcs ffffffff82d5c000 r gpio_tbl ffffffff82d5c0f0 r enable_fb_req_rej_tbl ffffffff82d5c140 r use_bclk_tbl -ffffffff82d5c2e0 r turn_off_plls_tbl -ffffffff82d5c370 r clk_req_b_tbl -ffffffff82d5c490 r enter_baco_tbl -ffffffff82d5c5b0 r exit_baco_tbl -ffffffff82d5c6d0 r clean_baco_tbl +ffffffff82d5c310 r turn_off_plls_tbl +ffffffff82d5c640 r enter_baco_tbl +ffffffff82d5c730 r exit_baco_tbl +ffffffff82d5c850 r clean_baco_tbl ffffffff82d5d000 r gpio_tbl ffffffff82d5d0f0 r enable_fb_req_rej_tbl -ffffffff82d5d140 r use_bclk_tbl_vg -ffffffff82d5d200 r turn_off_plls_tbl_vg -ffffffff82d5d350 r use_bclk_tbl -ffffffff82d5d440 r turn_off_plls_tbl -ffffffff82d5d5f0 r clk_req_b_tbl -ffffffff82d5d710 r enter_baco_tbl -ffffffff82d5d830 r exit_baco_tbl -ffffffff82d5d950 r clean_baco_tbl -ffffffff82d5e000 r vega10_fuses_default -ffffffff82d6d000 r pp_r600_encode_lanes -ffffffff82d6e000 R pptable_v1_0_funcs -ffffffff82d6f000 R pptable_funcs -ffffffff82d6f020 r soft_dummy_pp_table -ffffffff82d70000 r smu10_hwmgr_funcs -ffffffff82d71000 r smu7_hwmgr_funcs -ffffffff82d712f8 r smu7_irq_funcs -ffffffff82d71310 r SMU7ThermalPolicy -ffffffff82d72000 r GCCACConfig_Polaris10 -ffffffff82d721b0 r DIDTConfig_Polaris10 -ffffffff82d72a50 r GCCACConfig_Polaris11 -ffffffff82d72c00 r DIDTConfig_Polaris11_Kicker -ffffffff82d734a0 r DIDTConfig_Polaris11 -ffffffff82d73d40 r DIDTConfig_Polaris12 -ffffffff82d745e0 r GCCACConfig_VegaM -ffffffff82d74790 r DIDTConfig_VegaM -ffffffff82d76000 r smu8_hwmgr_funcs -ffffffff82d762f0 r SMU7ThermalPolicy -ffffffff82d77000 r smu9_irq_funcs -ffffffff82d78000 r gpio_tbl_iceland -ffffffff82d78060 r gpio_tbl -ffffffff82d78150 r enable_fb_req_rej_tbl -ffffffff82d781a0 r use_bclk_tbl -ffffffff82d78370 r turn_off_plls_tbl -ffffffff82d78610 r enter_baco_tbl -ffffffff82d78730 r exit_baco_tbl_iceland -ffffffff82d78870 r clean_baco_tbl_iceland -ffffffff82d78890 r exit_baco_tbl -ffffffff82d789b0 r clean_baco_tbl -ffffffff82d79000 r pre_baco_tbl -ffffffff82d79090 r enter_baco_tbl -ffffffff82d792b0 r exit_baco_tbl -ffffffff82d79520 r clean_baco_tbl -ffffffff82d7a000 r vega10_hwmgr_funcs -ffffffff82d7a2f0 r channel_number -ffffffff82d7a320 r SMU7ThermalWithDelayPolicy -ffffffff82d7b000 r SEDiDtStallCtrlConfig_vega10 -ffffffff82d7b110 r SEDiDtStallPatternConfig_vega10 -ffffffff82d7b2e0 r SEDiDtWeightConfig_Vega10 -ffffffff82d7b3b0 r SEDiDtCtrl1Config_Vega10 -ffffffff82d7b440 r SEDiDtCtrl2Config_Vega10 -ffffffff82d7b510 r SEDiDtCtrl3Config_vega10 -ffffffff82d7b820 r SEDiDtTuningCtrlConfig_Vega10 -ffffffff82d7b8b0 r SELCacConfig_Vega10 -ffffffff82d7ba40 r SEDiDtCtrl0Config_Vega10 -ffffffff82d7bd10 r AvfsPSMInitConfig_vega10 -ffffffff82d7bd90 r SEEDCStallPatternConfig_Vega10 -ffffffff82d7bea0 r SEEDCStallDelayConfig_Vega10 -ffffffff82d7bf80 r SEEDCCtrlConfig_Vega10 -ffffffff82d7c040 r PSMSEEDCStallPatternConfig_Vega10 -ffffffff82d7c0c0 r PSMSEEDCStallDelayConfig_Vega10 -ffffffff82d7c1d0 r PSMSEEDCCtrlResetConfig_Vega10 -ffffffff82d7c290 r PSMSEEDCCtrlConfig_Vega10 -ffffffff82d7c350 r SEEDCForceStallPatternConfig_Vega10 -ffffffff82d7c3e0 r SEEDCCtrlForceStallConfig_Vega10 -ffffffff82d7d000 R vega10_pptable_funcs -ffffffff82d7e000 r pre_baco_tbl -ffffffff82d7e090 r enter_baco_tbl -ffffffff82d7e2b0 r exit_baco_tbl -ffffffff82d7e520 r clean_baco_tbl -ffffffff82d7f000 r vega12_hwmgr_funcs -ffffffff82d7f2f0 r SMU7ThermalWithDelayPolicy -ffffffff82d7f340 r link_width -ffffffff82d80000 R vega12_pptable_funcs -ffffffff82d81000 r clean_baco_tbl -ffffffff82d82000 r vega20_hwmgr_funcs -ffffffff82d822f0 r SMU7ThermalWithDelayPolicy -ffffffff82d82340 r link_width -ffffffff82d83000 R vega20_pptable_funcs -ffffffff82d84000 R ci_smu_funcs -ffffffff82d840e0 r defaults_hawaii_pro -ffffffff82d8412c r defaults_hawaii_xt -ffffffff82d84178 r defaults_saturn_xt -ffffffff82d841c4 r defaults_bonaire_xt -ffffffff82d84210 r ci_program_jump_on_start.data -ffffffff82d85000 R fiji_smu_funcs -ffffffff82d850e0 r avfs_graphics_level -ffffffff82d85240 r fiji_power_tune_data_set_array -ffffffff82d85246 r fiji_clock_stretch_amount_conversion -ffffffff82d85260 r fiji_clock_stretcher_ddt_table -ffffffff82d86000 R iceland_smu_funcs -ffffffff82d860e0 r defaults_icelandxt -ffffffff82d8612c r defaults_icelandpro -ffffffff82d86178 r defaults_iceland -ffffffff82d87000 R polaris10_smu_funcs -ffffffff82d870e0 r avfs_graphics_level_polaris10 -ffffffff82d872a0 r avfs_memory_level_polaris10 -ffffffff82d872c0 r polaris10_power_tune_data_set_array -ffffffff82d87310 r Range_Table -ffffffff82d88000 R smu10_smu_funcs -ffffffff82d89000 r smu7_program_jump_on_start.data -ffffffff82d89010 r pwr_virus_table_pre -ffffffff82d89680 r pwr_virus_table_post -ffffffff82d89f80 r pwr_virus_section1 -ffffffff82d8a610 r pwr_virus_section2 -ffffffff82d8a660 r pwr_virus_section3 -ffffffff82d91ab0 r pwr_virus_section4 -ffffffff82d91e80 r pwr_virus_section5 -ffffffff82d92490 r pwr_virus_section6 -ffffffff82d94000 R smu8_smu_funcs -ffffffff82d95000 R tonga_smu_funcs -ffffffff82d950e0 r tonga_power_tune_data_set_array -ffffffff82d9512c r tonga_clock_stretch_amount_conversion -ffffffff82d95140 r tonga_clock_stretcher_ddt_table -ffffffff82d96000 R vega10_smu_funcs -ffffffff82d97000 R vega12_smu_funcs -ffffffff82d98000 R vega20_smu_funcs -ffffffff82d99000 R vegam_smu_funcs -ffffffff82d990e0 r vegam_power_tune_data_set_array -ffffffff82d99130 r Range_Table -ffffffff82d9a000 R smu_ip_funcs -ffffffff82d9a0a0 R smu_v11_0_ip_block -ffffffff82d9a0b8 R smu_v12_0_ip_block -ffffffff82d9a0d0 R smu_v13_0_ip_block -ffffffff82d9a0e8 r swsmu_pm_funcs -ffffffff82d9b000 r arcturus_ppt_funcs -ffffffff82d9b3f0 r arcturus_table_map -ffffffff82d9b470 r arcturus_pwr_src_map -ffffffff82d9b480 r arcturus_workload_map -ffffffff82d9b4d0 r smu11_thermal_policy -ffffffff82d9b528 r arcturus_i2c_algo -ffffffff82d9b538 r arcturus_i2c_control_quirks -ffffffff82d9b550 r arcturus_throttler_map -ffffffff82d9b570 r arcturus_message_map -ffffffff82d9bff0 r arcturus_clk_map -ffffffff82d9c0b0 r arcturus_feature_mask_map -ffffffff82d9d000 r cyan_skillfish_ppt_funcs -ffffffff82d9e000 r navi10_ppt_funcs -ffffffff82d9e3f0 r smu11_thermal_policy -ffffffff82d9e448 r navi10_i2c_algo -ffffffff82d9e458 r navi10_i2c_control_quirks -ffffffff82d9e470 r navi1x_throttler_map -ffffffff82d9e490 r NoDbiPrbs7 -ffffffff82d9f490 r DbiPrbs7 -ffffffff82da1000 r sienna_cichlid_ppt_funcs -ffffffff82da13f0 r smu11_thermal_policy -ffffffff82da1448 r sienna_cichlid_i2c_algo -ffffffff82da1458 r sienna_cichlid_i2c_control_quirks -ffffffff82da1470 r sienna_cichlid_throttler_map -ffffffff82da2000 r smu_v11_0_irq_funcs -ffffffff82da2010 r link_width -ffffffff82da3000 r vangogh_ppt_funcs -ffffffff82da33e8 r vangogh_throttler_map -ffffffff82da4000 r renoir_ppt_funcs -ffffffff82da43e8 r renoir_throttler_map -ffffffff82da5000 r aldebaran_ppt_funcs -ffffffff82da53f0 r aldebaran_clk_map -ffffffff82da54b0 r aldebaran_table_map -ffffffff82da5530 r smu13_thermal_policy -ffffffff82da5588 r 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startuphook_list -ffffffff83215000 D sysctl_lock -ffffffff83215010 D sysctl_disklock -ffffffff83215020 d openbsd -ffffffff83215024 d arg_max -ffffffff83215028 d posix_version -ffffffff8321502c d ngroups_max -ffffffff83215030 d int_one -ffffffff83215034 d maxpartitions -ffffffff83215038 d raw_part -ffffffff8321503c D allowpowerdown -ffffffff83215040 D hw_power -ffffffff83215044 d byte_order -ffffffff83215048 d page_size -ffffffff83216000 d thrsleep_queue -ffffffff83216010 d thrsleep_lock -ffffffff83217000 D tc_lock -ffffffff83217010 D windup_mtx -ffffffff83217020 d dummy_timecounter -ffffffff83217070 D timecounter -ffffffff83217078 D time_second -ffffffff83217080 d timehands -ffffffff83217088 d th0 -ffffffff83217120 d th1 -ffffffff83218000 D itimer_mtx -ffffffff83218010 D ratecheck_mtx -ffffffff83218020 D ppsratecheck_mtx -ffffffff83218030 D resettodr_to -ffffffff83218078 D resettodr_task -ffffffff83219000 D timeout_mutex -ffffffff8321a000 D wdog_auto -ffffffff8321b000 D taskq_sys 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unp_rights_mtx -ffffffff8322b030 D unp_ino_mtx -ffffffff8322b040 D unp_gc_task -ffffffff8322b070 D unpst_sendspace -ffffffff8322b074 D unpst_recvspace -ffffffff8322b078 D unpsq_sendspace -ffffffff8322b07c D unpsq_recvspace -ffffffff8322b080 D unpdg_sendspace -ffffffff8322b084 D unpdg_recvspace -ffffffff8322c000 D doingcache -ffffffff8322d000 D maxvfsconf -ffffffff8322d010 d vfsconflist -ffffffff8322e000 D lockf_lock -ffffffff8322e010 D maxlocksperuid -ffffffff8322f000 D iftovt_tab -ffffffff8322f040 D vttoif_tab -ffffffff8322f064 D suid_clear -ffffffff8322f068 D vnode_mtx -ffffffff8322f078 D vfs_stall_lock -ffffffff8322f090 D vtypes -ffffffff8322f0e0 D vtags -ffffffff83230000 D syncer_maxdelay -ffffffff83230004 D syncdelay -ffffffff83231000 D dosdirtemplate -ffffffff83232000 D ntfs_hashlock -ffffffff83233000 D ntfs_toupper_lock -ffffffff83234000 D art_table_gc_mtx -ffffffff83234010 D art_table_gc_task -ffffffff83234040 D art_node_gc_mtx -ffffffff83234050 D art_node_gc_task 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carp_cloner -ffffffff83267088 d carp_send_na.mcast -ffffffff83268000 d PADDING +ffffffff82d5d140 r use_bclk_tbl +ffffffff82d5d2e0 r turn_off_plls_tbl +ffffffff82d5d370 r clk_req_b_tbl +ffffffff82d5d490 r enter_baco_tbl +ffffffff82d5d5b0 r exit_baco_tbl +ffffffff82d5d6d0 r clean_baco_tbl +ffffffff82d5e000 r gpio_tbl +ffffffff82d5e0f0 r enable_fb_req_rej_tbl +ffffffff82d5e140 r use_bclk_tbl_vg +ffffffff82d5e200 r turn_off_plls_tbl_vg +ffffffff82d5e350 r use_bclk_tbl +ffffffff82d5e440 r turn_off_plls_tbl +ffffffff82d5e5f0 r clk_req_b_tbl +ffffffff82d5e710 r enter_baco_tbl +ffffffff82d5e830 r exit_baco_tbl +ffffffff82d5e950 r clean_baco_tbl +ffffffff82d5f000 r vega10_fuses_default +ffffffff82d6e000 r pp_r600_encode_lanes +ffffffff82d6f000 R pptable_v1_0_funcs +ffffffff82d70000 R pptable_funcs +ffffffff82d70020 r soft_dummy_pp_table +ffffffff82d71000 r smu10_hwmgr_funcs +ffffffff82d72000 r smu7_hwmgr_funcs +ffffffff82d722f8 r smu7_irq_funcs +ffffffff82d72310 r SMU7ThermalPolicy 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fiji_clock_stretcher_ddt_table +ffffffff82d87000 R iceland_smu_funcs +ffffffff82d870e0 r defaults_icelandxt +ffffffff82d8712c r defaults_icelandpro +ffffffff82d87178 r defaults_iceland +ffffffff82d88000 R polaris10_smu_funcs +ffffffff82d880e0 r avfs_graphics_level_polaris10 +ffffffff82d882a0 r avfs_memory_level_polaris10 +ffffffff82d882c0 r polaris10_power_tune_data_set_array +ffffffff82d88310 r Range_Table +ffffffff82d89000 R smu10_smu_funcs +ffffffff82d8a000 r smu7_program_jump_on_start.data +ffffffff82d8a010 r pwr_virus_table_pre +ffffffff82d8a680 r pwr_virus_table_post +ffffffff82d8af80 r pwr_virus_section1 +ffffffff82d8b610 r pwr_virus_section2 +ffffffff82d8b660 r pwr_virus_section3 +ffffffff82d92ab0 r pwr_virus_section4 +ffffffff82d92e80 r pwr_virus_section5 +ffffffff82d93490 r pwr_virus_section6 +ffffffff82d95000 R smu8_smu_funcs +ffffffff82d96000 R tonga_smu_funcs +ffffffff82d960e0 r tonga_power_tune_data_set_array +ffffffff82d9612c r tonga_clock_stretch_amount_conversion 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navi10_ppt_funcs +ffffffff82d9f3f0 r smu11_thermal_policy +ffffffff82d9f448 r navi10_i2c_algo +ffffffff82d9f458 r navi10_i2c_control_quirks +ffffffff82d9f470 r navi1x_throttler_map +ffffffff82d9f490 r NoDbiPrbs7 +ffffffff82da0490 r DbiPrbs7 +ffffffff82da2000 r sienna_cichlid_ppt_funcs +ffffffff82da23f0 r smu11_thermal_policy +ffffffff82da2448 r sienna_cichlid_i2c_algo +ffffffff82da2458 r sienna_cichlid_i2c_control_quirks +ffffffff82da2470 r sienna_cichlid_throttler_map +ffffffff82da3000 r smu_v11_0_irq_funcs +ffffffff82da3010 r link_width +ffffffff82da4000 r vangogh_ppt_funcs +ffffffff82da43e8 r vangogh_throttler_map +ffffffff82da5000 r renoir_ppt_funcs +ffffffff82da53e8 r renoir_throttler_map +ffffffff82da6000 r aldebaran_ppt_funcs +ffffffff82da63f0 r aldebaran_clk_map +ffffffff82da64b0 r aldebaran_table_map +ffffffff82da6530 r smu13_thermal_policy +ffffffff82da6588 r aldebaran_i2c_algo +ffffffff82da6598 r aldebaran_i2c_control_quirks +ffffffff82da65b0 r aldebaran_throttler_map +ffffffff82da65d0 r aldebaran_message_map +ffffffff82da7050 r aldebaran_feature_mask_map +ffffffff82da8000 R pmfw_decoded_link_speed +ffffffff82da8020 R pmfw_decoded_link_width +ffffffff82da8040 r smu_v13_0_irq_funcs +ffffffff82da9000 r smu_v13_0_0_ppt_funcs +ffffffff82da93f0 r smu13_thermal_policy +ffffffff82da9448 r smu_v13_0_0_i2c_algo +ffffffff82da9458 r smu_v13_0_0_i2c_control_quirks +ffffffff82da9470 r smu_v13_0_0_throttler_map +ffffffff82daa000 r smu_v13_0_4_ppt_funcs +ffffffff82dab000 r smu_v13_0_5_ppt_funcs +ffffffff82dac000 r smu_v13_0_6_ppt_funcs +ffffffff82dac3f0 r smu_v13_0_6_message_map +ffffffff82dace70 r smu_v13_0_6_clk_map +ffffffff82dacf30 r smu_v13_0_6_table_map +ffffffff82dacfb0 r smu_v13_0_6_i2c_algo +ffffffff82dacfc0 r smu_v13_0_6_i2c_control_quirks +ffffffff82dacfd0 r smu_v13_0_6_irq_funcs +ffffffff82dacfe0 r smu_v13_0_6_throttler_map +ffffffff82dacff0 r smu_v13_0_6_feature_mask_map +ffffffff82dae000 r smu_v13_0_7_ppt_funcs +ffffffff82dae3f0 r smu13_thermal_policy +ffffffff82dae450 r smu_v13_0_7_throttler_map +ffffffff82daf000 r yellow_carp_ppt_funcs +ffffffff82db0000 R link_speed +ffffffff82db0020 r __smu_message_names +ffffffff82db1000 R pchb_ca +ffffffff82db2000 R amas_ca +ffffffff82db2028 R amas_devices +ffffffff82db2040 r amas_feature +ffffffff82db3000 R cardslot_ca +ffffffff82db4000 R cardbus_ca +ffffffff82db5000 R com_cardbus_ca +ffffffff82db6000 R xl_cardbus_ca +ffffffff82db6030 R xl_cardbus_products +ffffffff82db7000 R dc_cardbus_ca +ffffffff82db7030 R dc_cardbus_devices +ffffffff82db8000 R fxp_cardbus_ca +ffffffff82db8028 R fxp_cardbus_devices +ffffffff82db9000 R rl_cardbus_devices +ffffffff82db9028 R rl_cardbus_ca +ffffffff82dba000 R re_cardbus_ca +ffffffff82dba028 R re_cardbus_devices +ffffffff82dbb000 R ath_cardbus_ca +ffffffff82dbc000 R athn_cardbus_ca +ffffffff82dbc030 r athn_cardbus_devices +ffffffff82dbd000 R atw_cardbus_ca +ffffffff82dbd028 R atw_cardbus_devices +ffffffff82dbe000 R rtw_cardbus_ca +ffffffff82dbe028 R rtw_cardbus_devices +ffffffff82dbf000 R ral_cardbus_ca +ffffffff82dbf030 r ral_cardbus_devices +ffffffff82dc0000 R acx_cardbus_ca +ffffffff82dc0028 r acx_cardbus_devices +ffffffff82dc1000 R pgt_cardbus_ca +ffffffff82dc1028 R pgt_cardbus_devices +ffffffff82dc2000 R ehci_cardbus_ca +ffffffff82dc3000 R ohci_cardbus_ca +ffffffff82dc4000 R uhci_cardbus_ca +ffffffff82dc5000 R malo_cardbus_ca +ffffffff82dc5028 r malo_cardbus_devices +ffffffff82dc6000 R bwi_cardbus_ca +ffffffff82dc6030 r bwi_cardbus_devices +ffffffff82dc7000 R pcmcia_ca +ffffffff82dc8000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82dc9000 r pcmcia_cis_quirks +ffffffff82dca000 R ep_pcmcia_ca +ffffffff82dcb000 R ne_pcmcia_ca +ffffffff82dcb030 R ne2000devs +ffffffff82dcd000 R aic_pcmcia_ca +ffffffff82dce000 R com_pcmcia_ca +ffffffff82dcf000 R wdc_pcmcia_ca +ffffffff82dd0000 R sm_pcmcia_ca +ffffffff82dd1000 R xe_pcmcia_ca +ffffffff82dd2000 R wi_pcmcia_ca +ffffffff82dd2030 r wi_pcmcia_products +ffffffff82dd3000 R malo_pcmcia_ca +ffffffff82dd4000 R an_pcmcia_ca +ffffffff82dd5000 R pcib_ca +ffffffff82dd6000 R amdpcib_ca +ffffffff82dd6028 R amdpcib_devices +ffffffff82dd7000 R tcpcib_ca +ffffffff82dd7028 R tcpcib_devices +ffffffff82dd8000 R aapic_ca +ffffffff82dd9000 R hme_pci_ca +ffffffff82dd9028 r hme_promhdr +ffffffff82dd902a r hme_promdat +ffffffff82dda000 R isa_ca +ffffffff82ddb000 R isadma_ca +ffffffff82ddc000 R fdc_ca +ffffffff82ddd000 R fd_ca +ffffffff82dde000 R com_isa_ca +ffffffff82ddf000 R pckbc_isa_ca +ffffffff82de0000 R vga_isa_ca +ffffffff82de1000 R wdc_isa_ca +ffffffff82de2000 R mpu_midi_hw_if +ffffffff82de3000 R mpu_isa_ca +ffffffff82de4000 R pcppi_ca +ffffffff82de5000 R spkr_ca +ffffffff82de5030 r pitchtab +ffffffff82de6000 R lpt_isa_ca +ffffffff82de7000 R wbsio_ca +ffffffff82de8000 R schsio_ca +ffffffff82de9000 R lm_isa_ca +ffffffff82de9028 R lm_wbsio_ca +ffffffff82dea000 R it_sensors +ffffffff82dea110 R it_vrfact +ffffffff82dea140 R it_fan_regs +ffffffff82dea160 R it_fan_ext_regs +ffffffff82dea178 R it_ca +ffffffff82deb000 R abitkv_sensors +ffffffff82deb200 R abitaa_sensors +ffffffff82deb480 R abitav_sensors +ffffffff82deb700 R abitas_sensors +ffffffff82deb980 R abitax_sensors +ffffffff82debbc0 R abitm4_sensors +ffffffff82debe80 R abitan_sensors +ffffffff82dec120 R abital_sensors +ffffffff82dec3a0 R abitaw_sensors +ffffffff82dec700 R abitni_sensors +ffffffff82dec9a0 R abitat_sensors +ffffffff82deccc0 R abitan2_sensors +ffffffff82decf60 R abitab_sensors +ffffffff82ded220 R abitan3_sensors +ffffffff82ded500 R abitaw2_sensors +ffffffff82ded860 R abitat2_sensors +ffffffff82dedb60 R abitab2_sensors +ffffffff82dedea0 R abitin_sensors +ffffffff82dee1e0 R uguru_ca +ffffffff82def000 R aps_ca +ffffffff82df0000 R wsdisplay_emul_ca +ffffffff82df0030 r charClass +ffffffff82df1000 r usl_syncops +ffffffff82df2000 R wsevent_filtops +ffffffff82df3000 R wskbd_ca +ffffffff82df4000 r latin1_to_upper +ffffffff82df5000 R wsmouse_ca +ffffffff82df6000 R cyrillic_to_koi8 +ffffffff82df6060 R unicode_to_latin2 +ffffffff82df60e0 R unicode_to_latin7 +ffffffff82df7000 R wsemul_vt100_ops +ffffffff82df8000 r decspcgr2uni +ffffffff82df8100 r dectech2uni +ffffffff82df8200 r nrctable +ffffffff82df9000 r vt100_fkeys +ffffffff82df90c0 r vt100_pfkeys +ffffffff82df90e0 r vt100_numpad +ffffffff82dfa000 R pckbd_ca +ffffffff82dfa028 R pckbd_accessops +ffffffff82dfa040 R pckbd_consops +ffffffff82dfa060 R pckbd_keymapdata +ffffffff82dfa070 R pckbd_xtbl2 +ffffffff82dfa100 R pckbd_xtbl2_ext +ffffffff82dfb000 r pckbd_keydesc_us +ffffffff82dfb250 r pckbd_keydesc_de +ffffffff82dfb2f0 r pckbd_keydesc_de_nodead +ffffffff82dfb310 r pckbd_keydesc_fr +ffffffff82dfb3d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82dfb510 r pckbd_keydesc_dk +ffffffff82dfb5a0 r pckbd_keydesc_dk_nodead +ffffffff82dfb5b0 r pckbd_keydesc_it +ffffffff82dfb640 r pckbd_keydesc_uk +ffffffff82dfb6e0 r pckbd_keydesc_jp +ffffffff82dfb750 r pckbd_keydesc_sv +ffffffff82dfb780 r pckbd_keydesc_sv_nodead +ffffffff82dfb790 r pckbd_keydesc_no +ffffffff82dfb7c0 r pckbd_keydesc_no_nodead +ffffffff82dfb7d0 r pckbd_keydesc_us_declk +ffffffff82dfb860 r pckbd_keydesc_us_dvorak +ffffffff82dfb900 r pckbd_keydesc_us_colemak +ffffffff82dfb948 r pckbd_keydesc_swapctrlcaps +ffffffff82dfb960 r pckbd_keydesc_iopener +ffffffff82dfb9b0 r pckbd_keydesc_es +ffffffff82dfba50 r pckbd_keydesc_be +ffffffff82dfbb10 r pckbd_keydesc_ru +ffffffff82dfbc80 r pckbd_keydesc_ua +ffffffff82dfbe10 r pckbd_keydesc_sg +ffffffff82dfbec0 r pckbd_keydesc_sg_nodead +ffffffff82dfbee0 r pckbd_keydesc_sf +ffffffff82dfbf00 r pckbd_keydesc_pt +ffffffff82dfbf90 r pckbd_keydesc_lt +ffffffff82dfc070 r pckbd_keydesc_la +ffffffff82dfc100 r pckbd_keydesc_br +ffffffff82dfc180 r pckbd_keydesc_tr +ffffffff82dfc230 r pckbd_keydesc_tr_nodead +ffffffff82dfc250 r pckbd_keydesc_pl +ffffffff82dfc2b0 r pckbd_keydesc_hu +ffffffff82dfc3c0 r pckbd_keydesc_si +ffffffff82dfc4d0 r pckbd_keydesc_cf +ffffffff82dfc5a0 r pckbd_keydesc_cf_nodead +ffffffff82dfc5c0 r pckbd_keydesc_lv +ffffffff82dfc640 r pckbd_keydesc_nl +ffffffff82dfc720 r pckbd_keydesc_nl_nodead +ffffffff82dfc740 r pckbd_keydesc_is +ffffffff82dfc7cc r pckbd_keydesc_is_nodead +ffffffff82dfc7e0 r pckbd_keydesc_ee +ffffffff82dfc890 r pckbd_keydesc_ee_nodead +ffffffff82dfc8b0 R pckbd_keydesctab +ffffffff82dfd000 R pms_ca +ffffffff82dfd028 R pms_accessops +ffffffff82dfd040 R pms_sec_accessops +ffffffff82dfd060 R pms_protocols +ffffffff82dfd1e0 r alps_models +ffffffff82dfe000 R skgpio_led_offset +ffffffff82dfe008 R skgpio_ca +ffffffff82dff000 R hidkbd_trtab +ffffffff82dff100 r apple_fn_trans +ffffffff82dff120 r apple_tb_trans +ffffffff82dff140 r apple_mba_trans +ffffffff82e00000 r hidcc_attach_wskbd.accessops +ffffffff82e00020 r hidcc_keysyms +ffffffff82e01000 R usb_ca +ffffffff82e02000 R usb_known_products +ffffffff82e0df90 R usb_known_vendors +ffffffff82e107b0 R usbd_error_strs +ffffffff82e11000 R usb_quirks +ffffffff82e11390 R usb_dev_quirks +ffffffff82e11398 R usbd_no_quirk +ffffffff82e12000 R uhub_ca +ffffffff82e12028 R uhub_uhub_ca +ffffffff82e13000 R uaudio_ca +ffffffff82e13028 R uaudio_hw_if +ffffffff82e130e0 R uaudio_rates +ffffffff82e13120 r uaudio_clkname.names +ffffffff82e13140 r uaudio_feature_addent.features +ffffffff82e14000 R uvideo_ca +ffffffff82e14028 R uvideo_hw_if +ffffffff82e14100 R uvideo_devs +ffffffff82e15000 r utvfu_select_norm.pal +ffffffff82e15040 r utvfu_select_norm.ntsc +ffffffff82e15080 r utvfu_setup_capture.setup +ffffffff82e15180 r utvfu_audio_start_chip.setup +ffffffff82e151c8 r utvfu_audio_stop_chip.setup +ffffffff82e151d8 R utvfu_ca +ffffffff82e15200 R utvfu_vid_hw_if +ffffffff82e152d0 R utvfu_au_hw_if +ffffffff82e16000 R udl_ca +ffffffff82e16030 r udl_devs +ffffffff82e160b0 r udl_modes +ffffffff82e17000 R umidi_hw_if +ffffffff82e17030 R umidi_ca +ffffffff82e17060 r umidi_evlen +ffffffff82e17080 r packet_length +ffffffff82e18000 r quirk_name +ffffffff82e19000 R ucom_ca +ffffffff82e1a000 R ugen_ca +ffffffff82e1a028 R ugenread_intr_filtops +ffffffff82e1a058 R ugenread_isoc_filtops +ffffffff82e1b000 R uhidev_ca +ffffffff82e1b030 r uhid_graphire_report_descr +ffffffff82e1b0b0 r uhid_graphire3_4x5_report_descr +ffffffff82e1b160 r uhid_xb360gp_report_descr +ffffffff82e1b210 r uhid_xbonegp_report_descr +ffffffff82e1c000 R uhid_ca +ffffffff82e1c028 R uhidread_filtops +ffffffff82e1d000 R fido_ca +ffffffff82e1e000 R ujoy_ca +ffffffff82e1f000 r ukbd_keydesc_us +ffffffff82e1f2a0 r ukbd_keydesc_de +ffffffff82e1f350 r ukbd_keydesc_de_nodead +ffffffff82e1f370 r ukbd_keydesc_fr +ffffffff82e1f430 r ukbd_keydesc_fr_apple +ffffffff82e1f570 r ukbd_keydesc_fr_dvorak_bepo +ffffffff82e1f6b0 r ukbd_keydesc_dk +ffffffff82e1f750 r ukbd_keydesc_dk_nodead +ffffffff82e1f760 r ukbd_keydesc_it +ffffffff82e1f800 r ukbd_keydesc_uk +ffffffff82e1f8b0 r ukbd_keydesc_jp +ffffffff82e1f920 r ukbd_keydesc_sv +ffffffff82e1f950 r ukbd_keydesc_sv_nodead +ffffffff82e1f960 r ukbd_keydesc_no +ffffffff82e1f990 r ukbd_keydesc_no_nodead +ffffffff82e1f9a0 r ukbd_keydesc_us_dvorak +ffffffff82e1fa40 r ukbd_keydesc_us_colemak +ffffffff82e1fa88 r ukbd_keydesc_swapctrlcaps +ffffffff82e1faa0 r ukbd_keydesc_iopener +ffffffff82e1faf0 r ukbd_keydesc_es +ffffffff82e1fb90 r ukbd_keydesc_be +ffffffff82e1fc50 r ukbd_keydesc_ru +ffffffff82e1fdc0 r ukbd_keydesc_ua +ffffffff82e1ff60 r ukbd_keydesc_sg +ffffffff82e20020 r ukbd_keydesc_sg_nodead +ffffffff82e20040 r ukbd_keydesc_sf +ffffffff82e20060 r ukbd_keydesc_pt +ffffffff82e200f0 r ukbd_keydesc_pt_apple +ffffffff82e20110 r ukbd_keydesc_lt +ffffffff82e201f0 r ukbd_keydesc_la +ffffffff82e20290 r ukbd_keydesc_br +ffffffff82e20320 r ukbd_keydesc_tr +ffffffff82e203e0 r ukbd_keydesc_tr_nodead +ffffffff82e20400 r ukbd_keydesc_pl +ffffffff82e20460 r ukbd_keydesc_hu +ffffffff82e20570 r ukbd_keydesc_si +ffffffff82e20690 r ukbd_keydesc_cf +ffffffff82e20770 r ukbd_keydesc_cf_nodead +ffffffff82e20790 r ukbd_keydesc_lv +ffffffff82e20810 r ukbd_keydesc_nl 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umass_bbb_methods +ffffffff82e29040 R umass_cbi_methods +ffffffff82e2a000 R umass_quirks +ffffffff82e2b000 R umass_scsi_switch +ffffffff82e2c000 R uthum_devs +ffffffff82e2c008 R uthum_ca +ffffffff82e2c030 r uthum_sensor_type_s +ffffffff82e2d000 R ugold_devs +ffffffff82e2d018 R ugold_ca +ffffffff82e2e000 R utrh_devs +ffffffff82e2e008 R utrh_ca +ffffffff82e2f000 R uoakrh_devs +ffffffff82e2f008 R uoakrh_ca +ffffffff82e2f030 R uoakrh_methods +ffffffff82e30000 R uoaklux_devs +ffffffff82e30008 R uoaklux_ca +ffffffff82e30030 R uoaklux_methods +ffffffff82e31000 R uoakv_devs +ffffffff82e31008 R uoakv_ca +ffffffff82e31030 R uoakv_methods +ffffffff82e32000 R uonerng_ca +ffffffff82e33000 R urng_ca +ffffffff82e33030 r urng_devs +ffffffff82e34000 R udcf_ca +ffffffff82e34028 r udcf_devs +ffffffff82e35000 R umbg_ca +ffffffff82e36000 R uvisor_methods +ffffffff82e36040 R uvisor_ca +ffffffff82e36070 r uvisor_devs +ffffffff82e37000 R udsbr_hw_if +ffffffff82e37028 R udsbr_ca +ffffffff82e38000 R utwitch_devs +ffffffff82e38008 R utwitch_ca +ffffffff82e39000 R aue_devs +ffffffff82e391b0 R aue_ca +ffffffff82e3a000 R axe_devs +ffffffff82e3a0d0 R axe_ca +ffffffff82e3b000 R axen_devs +ffffffff82e3b020 R axen_ca +ffffffff82e3c000 R smsc_ca +ffffffff82e3c030 r smsc_devs +ffffffff82e3d000 R cue_ca +ffffffff82e3e000 R kue_devs +ffffffff82e3e088 R kue_ca +ffffffff82e3f000 R cdce_devs +ffffffff82e3f048 R cdce_ca +ffffffff82e40000 R urndis_ca +ffffffff82e40030 R urndis_class +ffffffff82e41000 R mos_devs +ffffffff82e41018 R mos_ca +ffffffff82e42000 R mue_devs +ffffffff82e42020 R mue_ca +ffffffff82e43000 R udav_ca +ffffffff82e43030 r udav_devs +ffffffff82e44000 R upl_ca +ffffffff82e45000 R ugl_ca +ffffffff82e46000 R url_ca +ffffffff82e46030 r url_devs +ffffffff82e47000 R ure_devs +ffffffff82e470e8 R ure_ca +ffffffff82e48000 R uaq_devs +ffffffff82e48018 R uaq_ca +ffffffff82e49000 R umodem_methods +ffffffff82e49040 R umodem_ca +ffffffff82e4a000 R uftdi_methods +ffffffff82e4a040 R uftdi_ca +ffffffff82e4a070 r uftdi_devs +ffffffff82e4b000 R uplcom_methods +ffffffff82e4b040 R uplcom_ca +ffffffff82e4b070 r uplcom_devs +ffffffff82e4c000 R umct_methods +ffffffff82e4c040 R umct_ca +ffffffff82e4c070 r umct_devs +ffffffff82e4d000 R uvscom_methods +ffffffff82e4d040 R uvscom_ca +ffffffff82e4d070 r uvscom_devs +ffffffff82e4e000 R ubsa_methods +ffffffff82e4e040 R ubsa_devs +ffffffff82e4e060 R ubsa_ca +ffffffff82e4f000 R ukspan_ca +ffffffff82e4f028 r ukspan_devs +ffffffff82e4f030 r ukspan_methods +ffffffff82e50000 R uslcom_methods +ffffffff82e50040 R uslcom_ca +ffffffff82e50070 r uslcom_devs +ffffffff82e51000 R uark_methods +ffffffff82e51040 R uark_ca +ffffffff82e51068 r uark_devs +ffffffff82e52000 R moscom_methods +ffffffff82e52040 R moscom_ca +ffffffff82e52068 r moscom_devs +ffffffff82e53000 R umcs_methods +ffffffff82e53040 R umcs_devs +ffffffff82e53050 R umcs_ca +ffffffff82e54000 R uscom_methods +ffffffff82e54040 R uscom_ca +ffffffff82e54068 r uscom_devs +ffffffff82e55000 R ucrcom_methods +ffffffff82e55040 R ucrcom_ca +ffffffff82e56000 R uxrcom_methods +ffffffff82e56040 R uxrcom_ca +ffffffff82e56068 r uxrcom_devs +ffffffff82e57000 R uipaq_methods +ffffffff82e57040 R uipaq_ca +ffffffff82e57070 r uipaq_devs +ffffffff82e58000 R umsm_methods +ffffffff82e58040 R umsm_ca +ffffffff82e58070 r umsm_devs +ffffffff82e59000 R uchcom_methods +ffffffff82e59040 R uchcom_ca +ffffffff82e59068 r uchcom_devs +ffffffff82e59080 r dividers +ffffffff82e5a000 R uticom_methods +ffffffff82e5a040 R uticom_ca +ffffffff82e5a070 r uticom_devs +ffffffff82e5b000 R wi_usb_devs +ffffffff82e5b0f0 R wi_usb_ca +ffffffff82e5c000 R atu_ca +ffffffff82e5d000 R ural_ca +ffffffff82e5d030 r ural_devs +ffffffff82e5d0a0 r ural_rf2522_r2 +ffffffff82e5d0e0 r ural_rf2524_r2 +ffffffff82e5d120 r ural_rf2525_hi_r2 +ffffffff82e5d160 r ural_rf2525_r2 +ffffffff82e5d1a0 r ural_rf2525e_r2 +ffffffff82e5d1e0 r ural_rf2526_hi_r2 +ffffffff82e5d220 r ural_rf2526_r2 +ffffffff82e5d260 r ural_def_bbp +ffffffff82e5d2a0 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+ffffffff831d8000 D bwi_cd +ffffffff831d8020 D bwi_constraint +ffffffff831d8030 D bwi_pa_mode +ffffffff831d9000 D iosf_cd +ffffffff831d9020 d iosf_lock +ffffffff831d9030 d iosf_mbi_mtx +ffffffff831da000 D uhci_cd +ffffffff831db000 D ohci_cd +ffffffff831dc000 D ehci_cd +ffffffff831dd000 D xhci_cd +ffffffff831de000 D ccp_cd +ffffffff831df000 D sdhc_functions +ffffffff831df068 D sdhc_cd +ffffffff831e0000 D rtsx_functions +ffffffff831e0068 D rtsx_cd +ffffffff831e1000 D radio_cd +ffffffff831e2000 D kcs_if +ffffffff831e2040 D smic_if +ffffffff831e2080 D bt_if +ffffffff831e20c0 D ipmi_cd +ffffffff831e20e0 D maxsdrlen +ffffffff831e3000 D vscsi_cd +ffffffff831e4000 D mpath_cd +ffffffff831e5000 D softraid_cd +ffffffff831e5020 D smd +ffffffff831e6000 D spdmem_cd +ffffffff831e7000 D dwiic_cd +ffffffff831e8000 D dwqe_cd +ffffffff831e9000 D kstat_lock +ffffffff831e9010 D kstat_next_id +ffffffff831e9018 D kstat_default_lock +ffffffff831ea000 D pf_inp_mtx +ffffffff831ea010 D pf_hdr_limit +ffffffff831ea020 D pf_pool_limits +ffffffff831ea090 D pf_state_list +ffffffff831ea0c0 D pf_purge_states_task +ffffffff831ea0f0 D pf_purge_states_to +ffffffff831ea138 D pf_purge_states_collect +ffffffff831ea140 D pf_purge_to +ffffffff831ea188 D pf_purge_task +ffffffff831eb000 D pf_tags +ffffffff831eb010 D pf_qids +ffffffff831eb020 D pf_lock +ffffffff831eb030 D pf_state_lock +ffffffff831eb040 D pfioctl_rw +ffffffff831eb050 d pf_open_trans.ticket +ffffffff831ec000 D pfi_update +ffffffff831ed000 D pflog_cloner +ffffffff831ee000 D pfsync_cloner +ffffffff831ef000 D pflow_cloner +ffffffff831f0000 d hotplug_mtx +ffffffff831f1000 D pppoe_cloner +ffffffff831f1030 D pppoediscinq +ffffffff831f1060 D pppoeinq +ffffffff831f2000 D dt_lock +ffffffff831f3000 D dt_prov_profile +ffffffff831f3030 D dt_prov_interval +ffffffff831f4000 D dtps_nsysent +ffffffff831f4008 D dt_prov_syscall +ffffffff831f5000 D dt_prov_static +ffffffff831f5030 D dt_static_sched_dequeue +ffffffff831f50a0 D dt_static_sched_enqueue +ffffffff831f5110 D dt_static_sched_fork +ffffffff831f5180 D dt_static_sched_off__cpu +ffffffff831f51f0 D dt_static_sched_on__cpu +ffffffff831f5260 D dt_static_sched_remain__cpu +ffffffff831f52d0 D dt_static_sched_sleep +ffffffff831f5340 D dt_static_sched_steal +ffffffff831f53b0 D dt_static_sched_unsleep +ffffffff831f5420 D dt_static_sched_wakeup +ffffffff831f5490 D dt_static_raw_syscalls_sys_enter +ffffffff831f5500 D dt_static_raw_syscalls_sys_exit +ffffffff831f5570 D dt_static_uvm_fault +ffffffff831f55e0 D dt_static_uvm_map_insert +ffffffff831f5650 D dt_static_uvm_map_remove +ffffffff831f56c0 D dt_static_uvm_malloc +ffffffff831f5730 D dt_static_uvm_free +ffffffff831f57a0 D dt_static_uvm_pool_get +ffffffff831f5810 D dt_static_uvm_pool_put +ffffffff831f5880 D dt_static_vfs_bufcache_rel +ffffffff831f58f0 D dt_static_vfs_bufcache_take +ffffffff831f5960 D dt_static_vfs_cleaner +ffffffff831f59d0 D dt_static_vmm_guest_enter +ffffffff831f5a40 D dt_static_vmm_guest_exit +ffffffff831f5ab0 D dt_static_vmm_inout +ffffffff831f5b20 D dt_static_smr_call +ffffffff831f5b90 D dt_static_smr_called +ffffffff831f5c00 D dt_static_smr_barrier_enter +ffffffff831f5c70 D dt_static_smr_barrier_exit +ffffffff831f5ce0 D dt_static_smr_wakeup +ffffffff831f5d50 D dt_static_smr_thread +ffffffff831f5dc0 D dt_static_refcnt_none +ffffffff831f5e30 D dt_static_refcnt_ethmulti +ffffffff831f5ea0 D dt_static_refcnt_ifaddr +ffffffff831f5f10 D dt_static_refcnt_ifmaddr +ffffffff831f5f80 D dt_static_refcnt_inpcb +ffffffff831f5ff0 D dt_static_refcnt_rtentry +ffffffff831f6060 D dt_static_refcnt_syncache +ffffffff831f60d0 D dt_static_refcnt_tdb +ffffffff831f7000 D db_next_free_breakpoint +ffffffff831f7008 D db_breakpoints_inserted +ffffffff831f8000 D db_ed_style +ffffffff831f9000 D db_examine_format +ffffffff831f9078 D db_print_format +ffffffff831fa000 D db_history_size +ffffffff831fa008 D db_history_curr +ffffffff831fa010 D db_history_last +ffffffff831fb000 D db_tab_stop_width +ffffffff831fb004 D db_max_line +ffffffff831fb008 D db_max_width +ffffffff831fb00c D db_radix +ffffffff831fc000 D db_lastsym +ffffffff831fc008 D db_maxoff +ffffffff831fd000 D db_vars +ffffffff831fd090 D db_evars +ffffffff831fe000 D db_watchpoints_inserted +ffffffff831fe008 D db_next_free_watchpoint +ffffffff831ff000 D db_log +ffffffff83200000 D audio_cd +ffffffff83200020 D audio_lock +ffffffff83201000 D midi_cd +ffffffff83202000 D rnd_cold +ffffffff83202004 D rnd_slowextract +ffffffff83202008 D rnd_timeout +ffffffff83202050 D rndlock +ffffffff83202060 D rndreinit_timeout +ffffffff832020a8 D rnd_task +ffffffff83203000 D video_cd +ffffffff83204000 d rrip_table_analyze +ffffffff832040e0 d rrip_table_getname +ffffffff832041e0 d rrip_table_getsymname +ffffffff83204280 d rrip_table_extref +ffffffff83205000 D nexecs +ffffffff83206000 D elf_note_names +ffffffff83207000 D ncpus +ffffffff83207004 D ncpusfound +ffffffff83208000 D acct_lock +ffffffff83208010 D acctsuspend +ffffffff83208014 D acctresume +ffffffff83208018 D acctrate +ffffffff83209000 D ticks +ffffffff8320a000 D fhdlk +ffffffff8320b000 D kqueue_klist_lock +ffffffff8320b010 D kq_timeoutmax +ffffffff8320c000 D stackgap_random +ffffffff8320d000 D nprocesses +ffffffff8320d004 D nthreads +ffffffff8320d008 D fork_tfmrate +ffffffff8320e000 D kthread_q +ffffffff8320f000 D nkmempages +ffffffff8320f008 D malloc_mtx +ffffffff8320f020 D memname +ffffffff8320f4b0 D sysctl_kmemlock +ffffffff8320f4c0 D malloc_errintvl +ffffffff83210000 D maxdmap +ffffffff83210008 D maxsmap +ffffffff83210010 D rlimit_lock +ffffffff83211000 D sched_cost_load +ffffffff83211004 D sched_cost_priority +ffffffff83211008 D sched_cost_runnable +ffffffff8321100c D sched_cost_resident +ffffffff83212000 D intrmap_lock +ffffffff83213000 D nosuidcoredump +ffffffff83213008 D sigio_lock +ffffffff83214000 D smr_lock +ffffffff83214010 D smr_logintvl +ffffffff83215000 D startuphook_list +ffffffff83216000 D sysctl_lock +ffffffff83216010 D sysctl_disklock +ffffffff83216020 d openbsd +ffffffff83216024 d arg_max +ffffffff83216028 d posix_version +ffffffff8321602c d ngroups_max +ffffffff83216030 d int_one +ffffffff83216034 d maxpartitions +ffffffff83216038 d raw_part +ffffffff8321603c D allowpowerdown +ffffffff83216040 D hw_power +ffffffff83216044 d byte_order +ffffffff83216048 d page_size +ffffffff83217000 d thrsleep_queue +ffffffff83217010 d thrsleep_lock +ffffffff83218000 D tc_lock +ffffffff83218010 D windup_mtx +ffffffff83218020 d dummy_timecounter +ffffffff83218070 D timecounter +ffffffff83218078 D time_second +ffffffff83218080 d timehands +ffffffff83218088 d th0 +ffffffff83218120 d th1 +ffffffff83219000 D itimer_mtx +ffffffff83219010 D ratecheck_mtx +ffffffff83219020 D ppsratecheck_mtx +ffffffff83219030 D resettodr_to +ffffffff83219078 D resettodr_task +ffffffff8321a000 D timeout_mutex +ffffffff8321b000 D wdog_auto +ffffffff8321c000 D taskq_sys +ffffffff8321c050 D taskq_sys_mp +ffffffff8321d000 d update_loadavg.to +ffffffff8321d048 D ccpu +ffffffff8321d050 d schedcpu.to +ffffffff8321d098 D perflevel +ffffffff8321d09c D perfpolicy +ffffffff8321d0a0 D setperf_to +ffffffff8321e000 D autoconf_attdet_mtx +ffffffff8321e010 D msgs +ffffffff8321f000 d evcount_list +ffffffff8321f010 d evcount_percpu_init_list +ffffffff83220000 D syslogf_rwlock +ffffffff83220010 D log_mtx +ffffffff83220020 D logstash_in +ffffffff83220028 D logstash_out +ffffffff83220030 D logstash_rwlock +ffffffff83221000 D pool_head +ffffffff83221010 D pool_lock +ffffffff83221020 D pool_debug +ffffffff83221028 D pool_allocator_single +ffffffff83221040 D pool_allocator_multi +ffffffff83221058 D pool_allocator_multi_ni +ffffffff83221070 D pool_gc_tick +ffffffff832210b8 D pool_gc_task +ffffffff83222000 D kprintf_mutex +ffffffff83222010 D db_panic +ffffffff83222014 D splassert_ctl +ffffffff83222018 D v_putc +ffffffff83222020 D printf_flags +ffffffff83223000 D userconf_base +ffffffff83223004 D userconf_maxdev +ffffffff83223008 D userconf_totdev +ffffffff8322300c D userconf_maxlocnames +ffffffff83223010 D userconf_cnt +ffffffff83223014 D userconf_lines +ffffffff83223018 D userconf_histsz +ffffffff83223020 D userconf_cmds +ffffffff83224000 D ftlock +ffffffff83225000 d ppollcollect.poll_errintvl +ffffffff83226000 D ttydefchars +ffffffff83226014 D ttclos +ffffffff8322601b D ttopen +ffffffff83226022 D ttybg +ffffffff83226028 D ttyin +ffffffff8322602e D ttyout +ffffffff83226038 D ttylist_lock +ffffffff83227000 D linesw +ffffffff83227280 D nlinesw +ffffffff83228000 D pt_softc_lock +ffffffff83229000 d mbstat_boot_boot_cpumem +ffffffff83229080 D mbstat +ffffffff83229090 D mclsizes +ffffffff832290b0 D m_extref_mtx +ffffffff832290c0 D m_pool_allocator +ffffffff8322a000 D somaxconn +ffffffff8322a004 D sominconn +ffffffff8322a008 D sosplice_lock +ffffffff8322b000 D sb_max +ffffffff8322c000 D unp_df_lock +ffffffff8322c010 D unp_gc_lock +ffffffff8322c020 D unp_rights_mtx +ffffffff8322c030 D unp_ino_mtx +ffffffff8322c040 D unp_gc_task +ffffffff8322c070 D unpst_sendspace +ffffffff8322c074 D unpst_recvspace +ffffffff8322c078 D unpsq_sendspace +ffffffff8322c07c D unpsq_recvspace +ffffffff8322c080 D unpdg_sendspace +ffffffff8322c084 D unpdg_recvspace +ffffffff8322d000 D doingcache +ffffffff8322e000 D maxvfsconf +ffffffff8322e010 d vfsconflist +ffffffff8322f000 D lockf_lock +ffffffff8322f010 D maxlocksperuid +ffffffff83230000 D iftovt_tab +ffffffff83230040 D vttoif_tab +ffffffff83230064 D suid_clear +ffffffff83230068 D vnode_mtx +ffffffff83230078 D vfs_stall_lock +ffffffff83230090 D vtypes +ffffffff832300e0 D vtags +ffffffff83231000 D syncer_maxdelay +ffffffff83231004 D syncdelay +ffffffff83232000 D dosdirtemplate +ffffffff83233000 D ntfs_hashlock +ffffffff83234000 D ntfs_toupper_lock +ffffffff83235000 D art_table_gc_mtx +ffffffff83235010 D art_table_gc_task +ffffffff83235040 D art_node_gc_mtx +ffffffff83235050 D art_node_gc_task +ffffffff83236000 D bpf_bufsize +ffffffff83236004 D bpf_maxbufsize +ffffffff83236008 D bpf_sysctl_lk +ffffffff83237000 D ifg_head +ffffffff83237010 D if_cloners_lock +ffffffff83237020 D if_input_task_locked +ffffffff83237050 D netlock +ffffffff83237060 D ifnetlist +ffffffff83238000 D ifiq_maxlen_drop +ffffffff83238004 D ifiq_maxlen_return +ffffffff83239000 D etherbroadcastaddr +ffffffff83239006 D ether_ipmulticast_min +ffffffff8323900c D ether_ipmulticast_max +ffffffff83239012 D ether_ip6multicast_min +ffffffff83239018 D ether_ip6multicast_max +ffffffff8323a000 D etherip_cloner +ffffffff8323a030 D etherip_list +ffffffff8323b000 D loop_cloner +ffffffff8323c000 D ifmedia_mtx +ffffffff8323d000 D ppp_compressors +ffffffff8323d020 D ppp_cloner +ffffffff8323e000 D ppp_pkt_init +ffffffff8323f000 D ppp_bsd_compress +ffffffff83240000 D ppp_deflate +ffffffff83240070 D ppp_deflate_draft +ffffffff83241000 D tun_cloner +ffffffff83241030 D tap_cloner +ffffffff83242000 D bridgeintrq +ffffffff83242038 D bridge_cloner +ffffffff83243000 d veb_cloner +ffffffff83243030 d vport_cloner +ffffffff83244000 D vlan_tagh_lk +ffffffff83244010 D vlan_cloner +ffffffff83244040 D svlan_cloner +ffffffff83245000 D pipex_list_mtx +ffffffff83245010 D pipex_prune +ffffffff83245018 D pipexoutq +ffffffff83245050 d SHAPad2 +ffffffff83246000 D rtmap_gc +ffffffff83246018 D rt_rc +ffffffff83247000 D rt_labels +ffffffff83247010 D rtlabel_mtx +ffffffff83248000 D enc_cloner +ffffffff83249000 D gre_cloner +ffffffff83249030 D gre_list +ffffffff83249040 D mgre_cloner +ffffffff83249070 D egre_cloner +ffffffff832490a0 D nvgre_cloner +ffffffff832490d0 D eoip_cloner +ffffffff8324a000 D trunk_cloner +ffffffff8324b000 d aggr_cloner +ffffffff8324c000 d tpmr_cloner +ffffffff8324d000 D mpe_cloner +ffffffff8324e000 D mpw_cloner +ffffffff8324f000 D mpip_cloner +ffffffff83250000 d bpe_cloner +ffffffff83250030 d bpe_lock +ffffffff83251000 D vether_cloner +ffffffff83252000 D pair_cloner +ffffffff83253000 d vxlan_cloner +ffffffff83253030 d vxlan_lock +ffffffff83253040 d vxlan_teps +ffffffff83254000 D underload_interval +ffffffff83254010 D wg_cloner +ffffffff83255000 d stoeplitz_keyseed +ffffffff83256000 D ieee80211_cache_size +ffffffff83257000 D arpt_prune +ffffffff83257004 D arpt_keep +ffffffff83257008 D arpt_down +ffffffff83257010 D arpinq +ffffffff83257048 D arp_mtx +ffffffff83257058 D arp_maxtries +ffffffff83258000 D ipport_firstauto +ffffffff83258004 D ipport_lastauto +ffffffff83258008 D ipport_hifirstauto +ffffffff8325800c D ipport_hilastauto +ffffffff83259000 D divert_sendspace +ffffffff83259004 D divert_recvspace +ffffffff83259008 D divbhashsize +ffffffff8325a000 D icmptstamprepl +ffffffff8325a004 D icmperrppslim +ffffffff8325a008 D icmp_redirtimeout +ffffffff8325b000 D ipsendredirects +ffffffff8325b004 D ip_defttl +ffffffff8325b008 D ip_mtudisc +ffffffff8325b00c D ip_mtudisc_timeout +ffffffff8325b010 D ipq_mutex +ffffffff8325b020 D ip_maxqueue +ffffffff8325b028 D ipintrq +ffffffff8325b060 d ipsend_task +ffffffff8325b090 d ipsendraw_task +ffffffff8325c000 D ip_mrtproto +ffffffff8325c004 d sin +ffffffff8325d000 D rip_sendspace +ffffffff8325d008 D rip_recvspace +ffffffff8325e000 D tcprexmtthresh +ffffffff8325e004 D tcptv_keep_init +ffffffff8325e008 D tcp_rst_ppslim +ffffffff8325e00c D tcp_ackdrop_ppslim +ffffffff8325e010 D tcp_syn_hash_size +ffffffff8325e014 D tcp_syn_cache_limit +ffffffff8325e018 D tcp_syn_bucket_limit +ffffffff8325e01c D tcp_syn_use_limit +ffffffff8325e020 D syn_cache_mtx +ffffffff8325f000 D tcp_outflags +ffffffff83260000 D tcp_timer_mtx +ffffffff83260010 D tcp_mssdflt +ffffffff83260014 D tcp_rttdflt +ffffffff83260018 D tcp_do_rfc1323 +ffffffff8326001c D tcp_do_sack +ffffffff83260020 D tcp_do_rfc3390 +ffffffff83260024 D tcp_do_tso +ffffffff83260028 D tcp_reass_limit +ffffffff8326002c D tcp_sackhole_limit +ffffffff83261000 D tcp_backoff +ffffffff83261034 D tcp_totbackoff +ffffffff83262000 D tcp_sendspace +ffffffff83262004 D tcp_recvspace +ffffffff83262008 D tcp_autorcvbuf_inc +ffffffff83263000 D udpcksum +ffffffff83263004 D udp_sendspace +ffffffff83263008 D udp_recvspace +ffffffff83264000 D ipsec_flows_mtx +ffffffff83264010 D ipsec_ids_idle +ffffffff83264014 D ipsec_ids_next_flow +ffffffff83264018 D ipsec_policy_head +ffffffff83264028 D ipsp_ids_gc_timeout +ffffffff83264070 D tdb_sadb_mtx +ffffffff83264080 d tdb_hashmask +ffffffff83265000 D ipo_tdb_mtx +ffffffff83265010 D ipsec_acquire_mtx +ffffffff83265020 D ipsec_acquire_head +ffffffff83266000 D ipsec_keep_invalid +ffffffff83266004 D ipsec_require_pfs +ffffffff83266008 D ipsec_soft_timeout +ffffffff8326600c D ipsec_exp_timeout +ffffffff83266010 D ipsec_soft_first_use +ffffffff83266014 D ipsec_exp_first_use +ffffffff83266018 D ipsec_expire_acquire +ffffffff8326601c D esp_enable +ffffffff83266020 D ah_enable +ffffffff83267000 D udpencap_enable +ffffffff83267004 D udpencap_port +ffffffff83268000 D carp_vh_rc +ffffffff83268020 D carp_sc_rc +ffffffff83268040 D carp_opts +ffffffff83268058 D carp_cloner +ffffffff83268088 d carp_send_na.mcast ffffffff83269000 d PADDING -ffffffff8326a000 d weak_keys -ffffffff8326b000 D swcr_id -ffffffff8326c000 D window_inflate -ffffffff8326c004 D window_deflate -ffffffff8326d000 D ghash_update -ffffffff8326e000 D mpls_defttl -ffffffff8326e004 D mpls_mapttl_ip -ffffffff8326f000 D nfskevq_lock -ffffffff83270000 D nfs_backoff -ffffffff83270020 D nfs_ptimers -ffffffff83271000 D desirednfsrvcache -ffffffff83271010 D nonidempotent -ffffffff83271070 D nfsv2_repstat -ffffffff83272000 D nfsv2_type -ffffffff83272030 D nfsv3_type -ffffffff83272060 D nv2tov_type -ffffffff83272080 D nv3tov_type -ffffffff832720a0 D nfsv3_procid -ffffffff83272100 D nfsv2_procid -ffffffff8327215c d nfsv3err_getattr -ffffffff83272170 d nfsv3err_setattr -ffffffff83272190 d nfsv3err_lookup -ffffffff832721a4 d nfsv3err_access -ffffffff832721b0 d nfsv3err_readlink -ffffffff832721d0 d nfsv3err_read -ffffffff832721f0 d nfsv3err_write -ffffffff83272210 d nfsv3err_create -ffffffff83272230 d nfsv3err_mkdir -ffffffff83272250 d nfsv3err_symlink -ffffffff83272270 d nfsv3err_mknod -ffffffff83272290 d nfsv3err_remove -ffffffff832722b0 d nfsv3err_rmdir -ffffffff832722d0 d nfsv3err_rename -ffffffff83272300 d nfsv3err_link -ffffffff83272330 d nfsv3err_readdir -ffffffff83272350 d nfsv3err_readdirplus -ffffffff83272366 d nfsv3err_fsstat -ffffffff83272372 d nfsv3err_fsinfo -ffffffff8327237c d nfsv3err_pathconf -ffffffff83272386 d nfsv3err_commit -ffffffff83273000 D nfsrv3_procs -ffffffff832730b8 D nfs_niothreads -ffffffff83274000 D fragtbl -ffffffff83275000 D ffs_vtbl -ffffffff83276000 D dirchk -ffffffff83277000 D desireddquot -ffffffff83278000 D amap_list_lock -ffffffff83279000 d uao_list_lock -ffffffff8327a000 d uvmexp_countersboot_boot_cpumem -ffffffff8327a0c0 D uvmexp_counters -ffffffff8327a0c8 D vm_min_kernel_address -ffffffff8327b000 D no_constraint -ffffffff8327c000 d uvm_kmapent_warn_rate -ffffffff8327d000 D maxslp -ffffffff8327e000 D uvmpagerops -ffffffff8327f000 D uvm_swap_data_lock -ffffffff8327f010 D swap_syscall_lock -ffffffff8327f020 D oommtx -ffffffff83280000 D uvm_doswapencrypt -ffffffff83281000 D gif_list -ffffffff83281010 D gif_cloner -ffffffff83282000 d sec_cloner -ffffffff83282030 d sec_tdb_gc_mtx -ffffffff83282040 d sec_tdb_gc_task -ffffffff83283000 D divert6_sendspace -ffffffff83283004 D divert6_recvspace -ffffffff83283008 D divb6hashsize -ffffffff83284000 d in6_get_hw_ifid.allone -ffffffff83285000 D ip6_sendredirects -ffffffff83285004 D ip6_defhlim -ffffffff83285008 D ip6_defmcasthlim -ffffffff8328500c D ip6_maxfragpackets -ffffffff83285010 D ip6_maxfrags -ffffffff83285014 D ip6_log_interval -ffffffff83285018 D ip6_hdrnestlimit -ffffffff8328501c D ip6_dad_count -ffffffff83285020 D ip6_auto_flowlabel -ffffffff83285024 D ip6_use_deprecated -ffffffff83285028 D ip6_neighborgcthresh -ffffffff8328502c D ip6_maxdynroutes -ffffffff83285030 D rip6_sendspace -ffffffff83285038 D rip6_recvspace -ffffffff83285040 D icmp6_redirtimeout -ffffffff83285044 D icmp6errppslim -ffffffff83285048 D ip6_mtudisc_timeout -ffffffff83286000 D frag6_mutex -ffffffff83287000 d icmp6_mtudisc_hiwat -ffffffff83287004 d icmp6_mtudisc_lowat -ffffffff83288000 d randomtab_20 -ffffffff83289000 D ip6intrq -ffffffff83289038 d ip6send_task -ffffffff8328a000 D nd6_timer_next -ffffffff8328a008 D nd6_expire_next -ffffffff8328a010 D nd6_delay -ffffffff8328a014 D nd6_umaxtries -ffffffff8328a018 D nd6_mmaxtries -ffffffff8328a01c D nd6_gctimer -ffffffff8328a020 D nd6_maxndopt -ffffffff8328a028 D nd6_mtx -ffffffff8328a038 D nd6_list -ffffffff8328b000 d dadq -ffffffff8328c000 D pfkeyv2_mtx -ffffffff8328c010 d pfkeyv2_seq -ffffffff8328d000 D sadb_exts_allowed_in -ffffffff8328d090 D sadb_exts_required_in -ffffffff8328e000 D cold -ffffffff8328f000 D bdevsw -ffffffff8328f460 D nblkdev -ffffffff8328f470 D cdevsw -ffffffff83291400 D nchrdev -ffffffff83291404 D mem_no -ffffffff83291408 D swapdev -ffffffff83291410 D constab -ffffffff83292000 D machine -ffffffff83292008 D cpu_idle_cycle_fcn -ffffffff83292010 D lid_action -ffffffff83292014 D pwr_action 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-ffffffff83669038 B allowaperture -ffffffff83669040 B msgbuf_paddr -ffffffff83669048 B msgbuf_vaddr -ffffffff83669050 B physmem -ffffffff83669058 B idt_vaddr -ffffffff83669060 B idt_paddr -ffffffff83669068 B bios_diskinfo -ffffffff83669070 B bios_cksumlen -ffffffff83669074 B kbd_reset -ffffffff83669078 B forceukbd -ffffffff8366907c B dumpsize -ffffffff83669080 B dumplo -ffffffff83669088 B mem_cluster_cnt -ffffffff83669090 B mem_clusters -ffffffff83669190 B dumpmem_vaddr -ffffffff83669198 B dumppcb -ffffffff83669520 B dumpmem_sz -ffffffff83669528 B proc0paddr -ffffffff83669530 B idt -ffffffff83669538 b cpu_init_extents.already_done -ffffffff83669540 B lo32_vaddr -ffffffff83669548 B lo32_paddr -ffffffff83669550 B tramp_pdirpa -ffffffff83669558 B early_pte_pages -ffffffff83669560 B bootinfo -ffffffff8366a560 B avail_start -ffffffff8366a568 B avail_end -ffffffff8366a570 B bios_memmap -ffffffff8366a578 B bios_efiinfo -ffffffff8366a580 B mmap -ffffffff8366a588 B kern_end -ffffffff8366a590 B dumpmem_paddr -ffffffff8366a5a0 B idt_allocmap -ffffffff8366a6a0 B cpuresetfn -ffffffff8366a6a8 B bios_bootmac -ffffffff8366a6b0 B bios_ucode -ffffffff8366a6b8 B amd64_delay_quality -ffffffff8366a6c0 B dumpmem_low -ffffffff8366a6c8 B dumpmem_high -ffffffff8366a6d0 B cpu_class -ffffffff8366b000 B cpuspeed -ffffffff8366b004 B amd64_has_xcrypt -ffffffff8366b010 B cpu_model -ffffffff8366b040 B setperf_setup -ffffffff8366b048 B has_rdrand -ffffffff8366b04c B has_rdseed -ffffffff8366b050 B amd64_has_pclmul -ffffffff8366b054 B amd64_has_aesni -ffffffff8366c000 B tsc_is_invariant -ffffffff8366c008 B tsc_frequency -ffffffff8366c010 B tsc_recalibrate -ffffffff8366c040 B tsc_bp_status -ffffffff8366c0c0 B tsc_test_cycles -ffffffff8366c0c8 B tsc_test_rounds -ffffffff8366c0cc B tsc_ingress_barrier -ffffffff8366c0d0 B tsc_egress_barrier -ffffffff8366c100 B tsc_ap_status -ffffffff8366c180 B tsc_ap_name -ffffffff8366d000 b vc3_sc -ffffffff8366d010 b viac3_rnd.buffer -ffffffff8366d058 B viac3_rnd_tmo -ffffffff8366d0a0 B viac3_rnd_present -ffffffff8366e000 B aesni_sc -ffffffff8366e008 B aesnipl -ffffffff8366e1b0 B aesni_ops -ffffffff8366f000 b amd64_errata.printed -ffffffff83670000 B cpu_ucode_size -ffffffff83670008 B cpu_ucode_data -ffffffff83670010 B cpu_ucode_intel_applied -ffffffff83671000 b ap_open_count -ffffffff83671008 B zeropage -ffffffff83671010 B mem_range_softc -ffffffff83672000 B mtrrdef -ffffffff83672008 B mtrrcap -ffffffff83673000 B nkptp -ffffffff83673020 B pg_nx -ffffffff83673028 B pg_g_kern -ffffffff83673030 B pmap_initialized -ffffffff83673038 B kernel_pmap_store -ffffffff83673110 B cr3_reuse_pcid -ffffffff83673118 b cr3_pcid_temp -ffffffff83673120 B virtual_avail -ffffffff83673128 B pg_xo -ffffffff83673130 B protection_codes -ffffffff83673170 B pmap_use_pcid -ffffffff83673174 b cr3_pcid_proc -ffffffff83673178 B cr3_pcid_proc_intel -ffffffff83673180 B pmaps -ffffffff83673188 B pmap_pmap_pool -ffffffff83673330 B pmap_pv_pool -ffffffff836734d8 B pmap_pdp_pool -ffffffff83674000 B fpu_mxcsr_mask -ffffffff83674008 B xsave_mask -ffffffff83675000 B x86_soft_intrs -ffffffff83676000 B i8259_imen -ffffffff83677000 B intr_shared_edge -ffffffff83677008 B fake_softclock_intrhand -ffffffff83677078 B fake_softnet_intrhand -ffffffff836770e8 B fake_softtty_intrhand -ffffffff83677158 B fake_timer_intrhand -ffffffff836771c8 B fake_ipi_intrhand -ffffffff83677238 B fake_xen_intrhand -ffffffff836772a8 B fake_hyperv_intrhand -ffffffff83678000 B atdevbase -ffffffff83678010 b ioport_ex_storage -ffffffff836782e0 B ioport_ex -ffffffff836782f0 b iomem_ex_storage -ffffffff836785c0 B iomem_ex -ffffffff836785c8 b ioport_malloc_safe -ffffffff83679000 B mp_perflevel -ffffffff83679008 B ul_setperf -ffffffff8367a000 B cn_tab -ffffffff8367b000 B ddb_mp_mutex -ffffffff8367b010 B ddb_state -ffffffff8367b018 B ddb_regs -ffffffff8367b0c8 B db_switch_cpu -ffffffff8367b0d0 B db_switch_to_cpu -ffffffff8367b0d8 B ddb_active_cpu -ffffffff8367c000 B rtclock_tval -ffffffff8367c008 B i8254_ticked -ffffffff8367c00c B i8254_offset -ffffffff8367c010 B i8254_lastcount -ffffffff8367c018 b rtcstart.rtcdrain_timeout -ffffffff8367c060 B rtc_update_century -ffffffff8367c068 B rtc_todr -ffffffff8367d000 B k8pnow_current_state -ffffffff8367e000 B bus_clock -ffffffff8367e008 b est_fqlist -ffffffff8367f000 B k1x_current_state -ffffffff83680000 B rotatedfonts -ffffffff83680008 B rasops_framebuffers -ffffffff83681000 b stamp_attr -ffffffff83681010 b stamp +ffffffff8326a000 d PADDING +ffffffff8326b000 d weak_keys +ffffffff8326c000 D swcr_id +ffffffff8326d000 D window_inflate +ffffffff8326d004 D window_deflate +ffffffff8326e000 D ghash_update +ffffffff8326f000 D mpls_defttl +ffffffff8326f004 D mpls_mapttl_ip +ffffffff83270000 D nfskevq_lock +ffffffff83271000 D nfs_backoff +ffffffff83271020 D nfs_ptimers +ffffffff83272000 D desirednfsrvcache +ffffffff83272010 D nonidempotent +ffffffff83272070 D nfsv2_repstat +ffffffff83273000 D nfsv2_type +ffffffff83273030 D nfsv3_type +ffffffff83273060 D nv2tov_type +ffffffff83273080 D nv3tov_type +ffffffff832730a0 D nfsv3_procid +ffffffff83273100 D nfsv2_procid +ffffffff8327315c d nfsv3err_getattr +ffffffff83273170 d nfsv3err_setattr +ffffffff83273190 d nfsv3err_lookup +ffffffff832731a4 d nfsv3err_access +ffffffff832731b0 d nfsv3err_readlink +ffffffff832731d0 d nfsv3err_read +ffffffff832731f0 d nfsv3err_write +ffffffff83273210 d nfsv3err_create +ffffffff83273230 d nfsv3err_mkdir +ffffffff83273250 d nfsv3err_symlink +ffffffff83273270 d nfsv3err_mknod +ffffffff83273290 d nfsv3err_remove +ffffffff832732b0 d nfsv3err_rmdir +ffffffff832732d0 d nfsv3err_rename +ffffffff83273300 d nfsv3err_link +ffffffff83273330 d nfsv3err_readdir +ffffffff83273350 d nfsv3err_readdirplus +ffffffff83273366 d nfsv3err_fsstat +ffffffff83273372 d nfsv3err_fsinfo +ffffffff8327337c d nfsv3err_pathconf +ffffffff83273386 d nfsv3err_commit +ffffffff83274000 D nfsrv3_procs +ffffffff832740b8 D nfs_niothreads +ffffffff83275000 D fragtbl +ffffffff83276000 D ffs_vtbl +ffffffff83277000 D dirchk +ffffffff83278000 D desireddquot +ffffffff83279000 D amap_list_lock +ffffffff8327a000 d uao_list_lock +ffffffff8327b000 d uvmexp_countersboot_boot_cpumem +ffffffff8327b0c0 D uvmexp_counters +ffffffff8327b0c8 D vm_min_kernel_address +ffffffff8327c000 D no_constraint +ffffffff8327d000 d uvm_kmapent_warn_rate +ffffffff8327e000 D maxslp +ffffffff8327f000 D uvmpagerops +ffffffff83280000 D uvm_swap_data_lock +ffffffff83280010 D swap_syscall_lock +ffffffff83280020 D oommtx +ffffffff83281000 D uvm_doswapencrypt +ffffffff83282000 D gif_list +ffffffff83282010 D gif_cloner +ffffffff83283000 d sec_cloner +ffffffff83283030 d sec_tdb_gc_mtx +ffffffff83283040 d sec_tdb_gc_task +ffffffff83284000 D divert6_sendspace +ffffffff83284004 D divert6_recvspace +ffffffff83284008 D divb6hashsize +ffffffff83285000 d in6_get_hw_ifid.allone +ffffffff83286000 D ip6_sendredirects +ffffffff83286004 D ip6_defhlim +ffffffff83286008 D ip6_defmcasthlim +ffffffff8328600c D ip6_maxfragpackets +ffffffff83286010 D ip6_maxfrags +ffffffff83286014 D ip6_log_interval +ffffffff83286018 D ip6_hdrnestlimit +ffffffff8328601c D ip6_dad_count +ffffffff83286020 D ip6_auto_flowlabel +ffffffff83286024 D ip6_use_deprecated +ffffffff83286028 D ip6_neighborgcthresh +ffffffff8328602c D ip6_maxdynroutes +ffffffff83286030 D rip6_sendspace +ffffffff83286038 D rip6_recvspace +ffffffff83286040 D icmp6_redirtimeout +ffffffff83286044 D icmp6errppslim +ffffffff83286048 D ip6_mtudisc_timeout +ffffffff83287000 D frag6_mutex +ffffffff83288000 d icmp6_mtudisc_hiwat +ffffffff83288004 d icmp6_mtudisc_lowat +ffffffff83289000 d randomtab_20 +ffffffff8328a000 D ip6intrq +ffffffff8328a038 d ip6send_task +ffffffff8328b000 D nd6_timer_next +ffffffff8328b008 D nd6_expire_next +ffffffff8328b010 D nd6_delay +ffffffff8328b014 D nd6_umaxtries +ffffffff8328b018 D nd6_mmaxtries +ffffffff8328b01c D nd6_gctimer +ffffffff8328b020 D nd6_maxndopt +ffffffff8328b028 D nd6_mtx +ffffffff8328b038 D nd6_list +ffffffff8328c000 d dadq +ffffffff8328d000 D pfkeyv2_mtx +ffffffff8328d010 d pfkeyv2_seq +ffffffff8328e000 D sadb_exts_allowed_in +ffffffff8328e090 D sadb_exts_required_in +ffffffff8328f000 D cold +ffffffff83290000 D bdevsw +ffffffff83290460 D nblkdev +ffffffff83290470 D cdevsw +ffffffff83292400 D nchrdev +ffffffff83292404 D mem_no +ffffffff83292408 D swapdev +ffffffff83292410 D constab +ffffffff83293000 D machine +ffffffff83293008 D cpu_idle_cycle_fcn +ffffffff83293010 D lid_action +ffffffff83293014 D pwr_action +ffffffff83293018 D isa_constraint +ffffffff83293028 D dma_constraint +ffffffff83293040 D uvm_md_constraints +ffffffff83293058 D delay_func +ffffffff83293060 D initclock_func +ffffffff83293068 D startclock_func +ffffffff83293070 D bootinfo_size +ffffffff83293074 D waittime +ffffffff83293078 D dumpmag +ffffffff83294000 D tsc_rdtsc +ffffffff83294008 D tsc_timecounter +ffffffff83294058 D tsc_is_synchronized +ffffffff83295000 D local_apic +ffffffff83295020 D lapic_id +ffffffff83295080 D lapic_tpr +ffffffff832950a0 d lapic_ppr +ffffffff83295100 d lapic_isr +ffffffff83296000 D warn_once +ffffffff83297000 d errata +ffffffff83298000 D cpu_ucode_mtx +ffffffff83299000 D mem_owner_bios +ffffffff83299008 D mrops +ffffffff83299028 D mtrrmask +ffffffff83299030 D mtrrtomrt +ffffffff8329a000 D pmap_pg_wc +ffffffff8329a008 D pmaps_lock +ffffffff8329a018 d pmap_maxkvaddr +ffffffff8329b000 D kv_physwait +ffffffff8329c000 D fpu_save_len +ffffffff8329d000 D i8259_pic +ffffffff8329e000 D softintr_pic +ffffffff8329f000 D ipifunc +ffffffff832a0000 D setperf_mp_mutex +ffffffff832a1000 D db_Grp6 +ffffffff832a1040 D db_Grp7 +ffffffff832a1100 D db_Grp8 +ffffffff832a1140 D db_Grp9 +ffffffff832a1200 D db_GrpA +ffffffff832a1240 D db_GrpB +ffffffff832a1280 D db_GrpC +ffffffff832a12c0 D db_inst_0f0x +ffffffff832a1440 D db_inst_0f2x +ffffffff832a15c0 D db_inst_0f3x +ffffffff832a1740 D db_inst_0f8x +ffffffff832a18c0 D db_inst_0f9x +ffffffff832a1a40 D db_inst_0fax +ffffffff832a1bc0 D db_inst_0fbx +ffffffff832a1d40 D db_inst_0fcx +ffffffff832a1ec0 D db_inst_0f +ffffffff832a1f40 D db_Esc92 +ffffffff832a1f80 D db_Esc94 +ffffffff832a1fc0 D db_Esc95 +ffffffff832a2000 D db_Esc96 +ffffffff832a2040 D db_Esc97 +ffffffff832a2080 D db_Esca5 +ffffffff832a20c0 D db_Escb4 +ffffffff832a2100 D db_Esce3 +ffffffff832a2140 D db_Escf4 +ffffffff832a2180 D db_Esc8 +ffffffff832a2240 D db_Esc9 +ffffffff832a2300 D db_Esca +ffffffff832a23c0 D db_Escb +ffffffff832a2480 D db_Escc +ffffffff832a2540 D db_Escd +ffffffff832a2600 D db_Esce +ffffffff832a26c0 D db_Escf +ffffffff832a2780 D db_Esc_inst +ffffffff832a27c0 D db_Grp1 +ffffffff832a2800 D db_Grp2 +ffffffff832a2840 D db_Grp3 +ffffffff832a2900 D db_Grp4 +ffffffff832a29c0 D db_Grp5 +ffffffff832a2a80 D db_inst_table +ffffffff832a4280 D db_bad_inst +ffffffff832a42a0 D db_index_reg_16 +ffffffff832a42e0 D db_reg +ffffffff832a44e0 D db_seg_reg +ffffffff832a4520 D db_lengths +ffffffff832a5000 D db_regs +ffffffff832a51e0 D db_eregs +ffffffff832a51f0 D db_reg_args +ffffffff832a6000 D timer_mutex +ffffffff832a6010 d i8254_timecounter +ffffffff832a7000 D spleen8x16 +ffffffff832a7058 D spleen12x24 +ffffffff832a70b0 D spleen16x32 +ffffffff832a7108 D spleen32x64 +ffffffff832a7160 d builtin_fonts +ffffffff832a71e0 d wsfont_add.cookiegen +ffffffff832a71f0 d spleen8x16_data +ffffffff832a7ff0 d spleen12x24_data +ffffffff832aa9f0 d spleen16x32_data +ffffffff832ae1f0 d spleen32x64_data +ffffffff832bd000 D nsphy_cd +ffffffff832be000 D nsphyter_cd +ffffffff832bf000 D gentbi_cd +ffffffff832c0000 D qsphy_cd +ffffffff832c1000 D inphy_cd +ffffffff832c2000 D iophy_cd +ffffffff832c3000 D eephy_cd +ffffffff832c4000 D exphy_cd +ffffffff832c5000 D rlphy_cd +ffffffff832c6000 D lxtphy_cd +ffffffff832c7000 D luphy_cd +ffffffff832c8000 D mtdphy_cd +ffffffff832c9000 D icsphy_cd +ffffffff832ca000 D sqphy_cd +ffffffff832cb000 D tqphy_cd +ffffffff832cc000 D ukphy_cd +ffffffff832cd000 D dcphy_cd +ffffffff832ce000 D bmtphy_cd +ffffffff832cf000 D brgphy_cd +ffffffff832d0000 D xmphy_cd +ffffffff832d1000 D amphy_cd +ffffffff832d2000 D acphy_cd +ffffffff832d3000 D nsgphy_cd +ffffffff832d4000 D urlphy_cd +ffffffff832d5000 D rgephy_cd +ffffffff832d6000 D ciphy_cd +ffffffff832d7000 D ipgphy_cd +ffffffff832d8000 D etphy_cd +ffffffff832d9000 D jmphy_cd +ffffffff832da000 D atphy_cd +ffffffff832db000 D scsi_autoconf +ffffffff832db008 D scsibus_cd +ffffffff832dc000 D cd_cd +ffffffff832dd000 D ch_cd +ffffffff832dd020 D chquirks +ffffffff832de000 D sd_cd +ffffffff832df000 D st_cd +ffffffff832e0000 D uk_cd +ffffffff832e1000 D safte_cd +ffffffff832e2000 D ses_cd +ffffffff832e3000 D sym_cd +ffffffff832e3020 D sym_devices +ffffffff832e3070 D asym_devices +ffffffff832e4000 D rdac_cd +ffffffff832e4020 D rdac_devices +ffffffff832e5000 D emc_cd +ffffffff832e5020 D emc_devices +ffffffff832e6000 D hds_cd +ffffffff832e6020 D hds_devices +ffffffff832e7000 D atapiscsi_cd +ffffffff832e8000 D wd_cd +ffffffff832e8020 d wddumpmulti +ffffffff832e9000 D mainbus_cd +ffffffff832e9020 D mba_iba +ffffffff832ea000 D bios_cd +ffffffff832ea020 D smbios_uninfo +ffffffff832eb000 D mpbios_cd +ffffffff832eb020 d mp_conf +ffffffff832eb070 d extint_bus +ffffffff832eb0a0 d smi_bus +ffffffff832eb0d0 d nmi_bus +ffffffff832ec000 D need_retpoline +ffffffff832ed000 D cpu_info_full_primary +ffffffff832f0000 D cpu_info_list +ffffffff832f0008 D mp_cpu_funcs +ffffffff832f0020 D cpu_cd +ffffffff832f0040 D cpu_info +ffffffff832f1000 D local_pic +ffffffff832f1098 D lapic_readreg +ffffffff832f10a0 D lapic_writereg +ffffffff832f10a8 D x86_ipi +ffffffff832f2000 D ioapic_cold +ffffffff832f2008 D ioapic_cd +ffffffff832f3000 D efifb_std_descr +ffffffff832f3030 D efifb_descrs +ffffffff832f3038 D efifb_accessops +ffffffff832f3098 D efifb_cd +ffffffff832f4000 D pvbus_cd +ffffffff832f4020 D pvbus_types +ffffffff832f40e0 D pvbus_dma_tag +ffffffff832f5000 D pvclock_cd +ffffffff832f5020 D pvclock_timecounter +ffffffff832f6000 D vmt_tclo_rpc +ffffffff832f60d0 D vmt_cd +ffffffff832f7000 D xen_cd +ffffffff832f7020 D xen_bus_dma_tag +ffffffff832f8000 D xnf_cd +ffffffff832f9000 D xbf_cd +ffffffff832fa000 D hv_msg_dispatch +ffffffff832fa110 D hv_timecounter +ffffffff832fa160 D hyperv_cd +ffffffff832fb000 d hv_ic_devs +ffffffff832fc000 D hvn_cd +ffffffff832fd000 D hvs_cd +ffffffff832fe000 D virtio_cd +ffffffff832ff000 D vio_cd +ffffffff83300000 D vioblk_cd +ffffffff83301000 D viomb_cd +ffffffff83302000 D viornd_cd +ffffffff83303000 D vioscsi_cd +ffffffff83304000 D vmmci_cd +ffffffff83305000 D pci_cd +ffffffff83306000 D arc_fw_hdr +ffffffff83306008 D arc_cd +ffffffff83307000 D jmb_cd +ffffffff83308000 D mfii_cd +ffffffff83309000 D ips_cd +ffffffff8330a000 D eap_cd +ffffffff8330b000 D auacer_cd +ffffffff8330c000 D auich_cd +ffffffff8330d000 D azalia_cd +ffffffff8330e000 D envy_cd +ffffffff8330e020 D envy_matchids +ffffffff8330e030 D envy_rates +ffffffff8330e0b0 D ak4524_dac +ffffffff8330e0d8 D ak4524_adc +ffffffff8330e100 D ak4358_dac +ffffffff8330e128 D ak5365_adc +ffffffff8330e150 D unkenvy_codec +ffffffff8330e180 D envy_cards +ffffffff8330e3f0 D envy_cards_ht +ffffffff8330e600 d julia_eeprom +ffffffff8330f000 D emu_cd +ffffffff83310000 D auixp_cd +ffffffff83311000 D clcs_cd +ffffffff83312000 D yds_cd +ffffffff83313000 D auvia_cd +ffffffff83314000 D qle_cd +ffffffff83315000 D mpii_cd +ffffffff83316000 D aq_cd +ffffffff83317000 D de_cd +ffffffff83318000 D pcn_cd +ffffffff83319000 D wdc_sii3114_vtbl +ffffffff83319038 D wdc_pdc203xx_vtbl +ffffffff83319070 D wdc_svwsata_vtbl +ffffffff833190a8 D pciide_cd +ffffffff833190d0 d sis_hostbr_type +ffffffff8331a000 D ppb_cd +ffffffff8331b000 D vr_cd +ffffffff8331b020 D vr_devices +ffffffff8331c000 D txp_cd +ffffffff8331d000 D bt848_card_signature +ffffffff8331e000 D bktr_cd +ffffffff8331f000 D em_cd +ffffffff83320000 D ixgb_cd +ffffffff83321000 D ix_cd +ffffffff83321020 D ixgbe_smart_speed +ffffffff83321024 D ixgbe_enable_msix +ffffffff83322000 D ixl_cd +ffffffff83322020 d ixl_sff_lock +ffffffff83323000 D xge_cd +ffffffff83324000 D thtc_cd +ffffffff83324020 D tht_cd +ffffffff83324040 D tht_txt_desc +ffffffff83324068 D tht_rxf_desc +ffffffff83324090 D tht_rxd_desc +ffffffff833240b8 D tht_txf_desc +ffffffff83325000 D myx_cd +ffffffff83326000 D oce_cd +ffffffff83327000 D dc_devs +ffffffff83328000 D cas_cd +ffffffff83329000 D sis_cd +ffffffff8332a000 D se_cd +ffffffff8332b000 D mbg_cd +ffffffff8332c000 D cbb_cd +ffffffff8332c020 D yc_chipsets +ffffffff8332c1b0 d pccbb_funcs +ffffffff8332c1e0 d pccbb_pcmcia_funcs +ffffffff8332d000 D skc_cd +ffffffff8332d020 D sk_cd +ffffffff8332e000 D mskc_cd +ffffffff8332e020 D msk_cd +ffffffff8332f000 D puc_cd +ffffffff83330000 D puc_ndevs +ffffffff83331000 D iwi_cd +ffffffff83332000 D wpi_cd +ffffffff83333000 D iwn_cd +ffffffff83334000 D iwm_cd +ffffffff83335000 D iwx_cd +ffffffff83336000 D cmpci_cd +ffffffff83337000 D iha_cd +ffffffff83338000 D pcscp_cd +ffffffff83338020 D pcscp_glue +ffffffff83339000 D bge_cd +ffffffff8333a000 D bnx_firmwares +ffffffff8333a160 D bnx_rv2ps +ffffffff8333a1c0 D bnx_cd +ffffffff8333a1e0 d flash_5709 +ffffffff8333a210 d flash_table +ffffffff8333b000 D vge_cd +ffffffff8333c000 D stge_cd +ffffffff8333d000 D nfe_cd +ffffffff8333e000 D et_cd +ffffffff8333f000 D jme_cd +ffffffff83340000 D age_cd +ffffffff83341000 D alc_dma_burst +ffffffff83341020 D alc_cd +ffffffff83342000 D ale_cd +ffffffff83343000 D amdpm_cd +ffffffff83343020 d amdpm_timecounter +ffffffff83344000 D bce_cd +ffffffff83345000 D rtwn_cd +ffffffff83346000 d ral_rt2560_opns +ffffffff83346028 d ral_rt2661_opns +ffffffff83346050 d ral_rt2860_opns +ffffffff83347000 D piixpm_cd +ffffffff83348000 D vic_cd +ffffffff83349000 D vmx_cd +ffffffff8334a000 D vmwpvs_cd +ffffffff8334b000 D lii_cd +ffffffff8334c000 D ichiic_cd +ffffffff8334d000 D viapm_cd +ffffffff8334d020 d viapm_timecounter +ffffffff8334e000 D amdiic_cd +ffffffff8334f000 D nviic_cd +ffffffff83350000 D kate_cd +ffffffff83351000 D km_cd +ffffffff83352000 D cpu_model_offsets +ffffffff83352070 D ksmn_cd +ffffffff83353000 D itherm_cd +ffffffff83354000 D pchtemp_cd +ffffffff83355000 D xspd_cd +ffffffff83356000 D virtio_pci_ops +ffffffff83357000 D bwfm_pci_buscore_ops +ffffffff83357030 D bwfm_pci_bus_ops +ffffffff83357058 D bwfm_pci_msgbuf_ops +ffffffff83358000 D bnxt_cd +ffffffff83359000 D mcx_cd +ffffffff8335a000 D iavf_cd +ffffffff8335b000 D rge_cd +ffffffff8335c000 D igc_cd +ffffffff8335d000 D ngbe_cd +ffffffff8335e000 D agp_cd +ffffffff8335f000 D intagp_cd +ffffffff8335f020 D agp_i810_methods +ffffffff83360000 D reservation_ww_class +ffffffff83361000 d bridge_lock +ffffffff83361010 d bridge_list +ffffffff83362000 d drm_connector_enum_list +ffffffff833621f8 d connector_list_lock +ffffffff83362208 d connector_list +ffffffff83363000 d kernel_fb_helper_list +ffffffff83363010 d kernel_fb_helper_lock +ffffffff83364000 D drm_global_mutex +ffffffff83365000 D i2c_bit_algo +ffffffff83365010 d drm_fence_context_count +ffffffff83365018 d dma_fence_stub_mtx +ffffffff83365028 D wait_bit_mtx +ffffffff83365038 D shrinkers +ffffffff83366000 d crtc_ww_class +ffffffff83367000 d panel_lock +ffffffff83367010 d panel_list +ffffffff83368000 d ttm_global_mutex +ffffffff83369000 D drm_sched_policy +ffffffff8336a000 D intel_bbops +ffffffff8336b000 d i915_sys_placement +ffffffff8336b020 d i915_ttm_bo_driver +ffffffff8336c000 d mchdev_lock +ffffffff8336d000 D inteldrm_stdscreen +ffffffff8336d030 D inteldrm_scrlist +ffffffff8336d038 D inteldrm_screenlist +ffffffff8336d048 D inteldrm_accessops +ffffffff8336d0a8 D inteldrm_cd +ffffffff8336e000 d capture_mutex +ffffffff8336f000 d mitigations +ffffffff83370000 D i915_modparams +ffffffff83371000 d schedule_lock +ffffffff83372000 d unbind_fence_ops +ffffffff83373000 D intel_graphics_stolen_res +ffffffff83374000 D btc_valid_sclk +ffffffff83375000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff83375020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff83376000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff83376008 d r600_cs_packet_parse_vline.vline_status +ffffffff83377000 d r100_asic +ffffffff833772e0 d r200_asic +ffffffff833775c0 d r300_asic_pcie +ffffffff833778a0 d r300_asic +ffffffff83377b80 d r420_asic +ffffffff83377e60 d rs400_asic +ffffffff83378140 d rs600_asic +ffffffff83378420 d rs690_asic +ffffffff83378700 d rv515_asic +ffffffff833789e0 d r520_asic +ffffffff83378cc0 d r600_asic +ffffffff83378fa0 d rv6xx_asic +ffffffff83379280 d rs780_asic +ffffffff83379560 d rv770_asic +ffffffff83379840 d evergreen_asic +ffffffff83379b20 d sumo_asic +ffffffff83379e00 d btc_asic +ffffffff8337a0e0 d cayman_asic +ffffffff8337a3c0 d trinity_asic +ffffffff8337a6a0 d si_asic +ffffffff8337a980 d ci_asic +ffffffff8337ac60 d kv_asic +ffffffff8337b000 d dce6_funcs +ffffffff8337b018 d dce6_hdmi_funcs +ffffffff8337b088 d dce6_dp_funcs +ffffffff8337b0f8 d dce4_funcs +ffffffff8337b110 d dce4_hdmi_funcs +ffffffff8337b180 d dce4_dp_funcs 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radeondrm_stdscreen +ffffffff8337c0a8 D radeondrm_scrlist +ffffffff8337c0b0 D radeondrm_screenlist +ffffffff8337c0c0 D radeondrm_accessops +ffffffff8337d000 D radeon_bbops +ffffffff8337e000 d radeon_bo_driver +ffffffff8337f000 d verde_pg_init +ffffffff83380000 d cac_weights_pitcairn +ffffffff833804d0 d cac_weights_oland +ffffffff83381000 d aldebaran_mode2_handler +ffffffff83382000 d amdgpu_vbios_version_attrs +ffffffff83383000 D amdgpu_asic_name +ffffffff83384000 D amdgpu_vram_limit +ffffffff83384004 D amdgpu_gart_size +ffffffff83384008 D amdgpu_gtt_size +ffffffff8338400c D amdgpu_moverate +ffffffff83384010 D amdgpu_audio +ffffffff83384014 D amdgpu_pcie_gen2 +ffffffff83384018 D amdgpu_msi +ffffffff8338401c D amdgpu_dpm +ffffffff83384020 D amdgpu_fw_load_type +ffffffff83384024 D amdgpu_aspm +ffffffff83384028 D amdgpu_runtime_pm +ffffffff8338402c D amdgpu_ip_block_mask +ffffffff83384030 D amdgpu_bapm +ffffffff83384034 D amdgpu_vm_size +ffffffff83384038 D amdgpu_vm_fragment_size +ffffffff8338403c D amdgpu_vm_block_size +ffffffff83384040 D amdgpu_vm_update_mode +ffffffff83384044 D amdgpu_dc +ffffffff83384048 D amdgpu_sched_jobs +ffffffff8338404c D amdgpu_sched_hw_submission +ffffffff83384050 D amdgpu_cg_mask +ffffffff83384058 D amdgpu_pg_mask +ffffffff8338405c D amdgpu_sdma_phase_quantum +ffffffff83384060 D amdgpu_pp_feature_mask +ffffffff83384064 D amdgpu_lbpw +ffffffff83384068 D amdgpu_compute_multipipe +ffffffff8338406c D amdgpu_gpu_recovery +ffffffff83384070 D amdgpu_smu_pptable_id +ffffffff83384074 D amdgpu_dc_feature_mask +ffffffff83384078 D amdgpu_async_gfx_ring +ffffffff8338407c D amdgpu_mcbp +ffffffff83384080 D amdgpu_discovery +ffffffff83384084 D amdgpu_noretry +ffffffff83384088 D amdgpu_force_asic_type +ffffffff8338408c D amdgpu_tmz +ffffffff83384090 D amdgpu_reset_method +ffffffff83384094 D amdgpu_num_kcq +ffffffff83384098 D amdgpu_use_xgmi_p2p +ffffffff8338409c D amdgpu_sg_display +ffffffff833840a0 D amdgpu_user_partt_mode +ffffffff833840a8 D mgpu_info +ffffffff83384558 D amdgpu_ras_enable +ffffffff8338455c D amdgpu_ras_mask +ffffffff83384560 D amdgpu_bad_page_threshold +ffffffff83384564 D amdgpu_backlight +ffffffff83384568 D amdgpu_cd +ffffffff83384588 D amdgpu_stdscreen +ffffffff833845b8 D amdgpu_scrlist +ffffffff833845c0 D amdgpu_screenlist +ffffffff833845d0 D amdgpu_accessops +ffffffff83385000 d amdgpu_gtt_mgr_attributes +ffffffff83386000 D amdgpu_bbops +ffffffff83387000 D soc15_ih_clientid_name +ffffffff83388000 D ras_error_string +ffffffff83388030 D ras_block_string +ffffffff833880c0 D ras_mca_block_string +ffffffff83389000 d amdgpu_bo_driver +ffffffff8338a000 d amdgpu_vram_mgr_attributes +ffffffff8338b000 d xgmi_mutex +ffffffff8338b010 D xgmi_ras_hw_ops +ffffffff8338b050 D xgmi_ras +ffffffff8338c000 D aqua_vanjaram_xcp_funcs +ffffffff8338d000 D gfx_v11_0_3_ras +ffffffff8338e000 d gfx_v9_0_ras +ffffffff8338f000 D gfx_v9_4_ras +ffffffff83390000 D gfx_v9_4_2_ras_ops +ffffffff83390040 D gfx_v9_4_2_ras +ffffffff83391000 D gfx_v9_4_3_xcp_funcs +ffffffff83391020 D gfx_v9_4_3_ras_ops +ffffffff83391060 D gfx_v9_4_3_ras +ffffffff83392000 D gfxhub_v1_2_xcp_funcs +ffffffff83393000 D hdp_v4_0_ras_hw_ops +ffffffff83393040 D hdp_v4_0_ras +ffffffff83394000 d jpeg_v2_6_ras +ffffffff83395000 d jpeg_v4_0_ras +ffffffff83396000 d jpeg_v4_0_3_ras +ffffffff83397000 D mca_v3_0_mp0_ras +ffffffff83397058 D mca_v3_0_mp1_ras +ffffffff833970b0 D mca_v3_0_mpio_ras +ffffffff83398000 D mmhub_v1_0_ras_hw_ops +ffffffff83398040 D mmhub_v1_0_ras +ffffffff83399000 D mmhub_v1_7_ras_hw_ops +ffffffff83399040 D mmhub_v1_7_ras +ffffffff8339a000 D mmhub_v1_8_ras +ffffffff8339b000 D mmhub_v9_4_ras +ffffffff8339c000 D nbio_v4_3_ras +ffffffff8339d000 D nbio_v7_4_ras +ffffffff8339e000 D nbio_v7_9_ras +ffffffff8339f000 d sriov_sc_video_codecs_encode +ffffffff8339f010 d sriov_sc_video_codecs_decode_vcn1 +ffffffff8339f020 d sriov_sc_video_codecs_decode_vcn0 +ffffffff8339f030 d sriov_sc_video_codecs_encode_array +ffffffff8339f060 d sriov_sc_video_codecs_decode_array_vcn1 +ffffffff8339f0f0 d sriov_sc_video_codecs_decode_array_vcn0 +ffffffff833a0000 d sdma_v4_0_ras +ffffffff833a1000 D sdma_v4_4_ras +ffffffff833a2000 D sdma_v4_4_2_xcp_funcs +ffffffff833a2020 d sdma_v4_4_2_ras +ffffffff833a3000 d sdma_v6_0_3_ras +ffffffff833a4000 d sienna_cichlid_mode2_handler +ffffffff833a5000 d smu_v13_0_10_mode2_handler +ffffffff833a6000 d sriov_vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff833a6010 d sriov_vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff833a6020 d sriov_vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff833a6030 d sriov_vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff833a6040 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff833a6070 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff833a6100 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff833a6140 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff833a7000 D umc_v6_1_ras +ffffffff833a8000 D umc_v6_7_ras +ffffffff833a9000 D umc_v8_10_ras +ffffffff833aa000 D umc_v8_7_ras +ffffffff833ab000 d vcn_v2_6_ras +ffffffff833ac000 d vcn_v4_0_unified_ring_vm_funcs +ffffffff833ac140 d vcn_v4_0_ras +ffffffff833ad000 d vcn_v4_0_3_ras +ffffffff833ae000 d amdgpu_dm_mode_config_helperfuncs +ffffffff833ae010 d dm_atomic_state_funcs +ffffffff833af000 d construct_integrated_info.result +ffffffff833af004 d bios_parser_get_firmware_info.result +ffffffff833b0000 d dce_funcs +ffffffff833b1000 d dce110_funcs +ffffffff833b2000 d dce112_funcs +ffffffff833b3000 d dce120_funcs +ffffffff833b4000 d rv1_clk_funcs +ffffffff833b4090 d rv1_clk_internal_funcs +ffffffff833b5000 d rv2_clk_internal_funcs +ffffffff833b6000 d dcn2_funcs +ffffffff833b7000 d dcn201_funcs +ffffffff833b8000 d dcn21_funcs +ffffffff833b8090 d rn_bw_params +ffffffff833b9000 D dcn3_fpga_funcs +ffffffff833b9090 d dcn3_funcs +ffffffff833ba000 d vg_funcs +ffffffff833ba090 d dummy_clocks +ffffffff833ba1c0 d vg_bw_params +ffffffff833bb000 d dcn31_funcs +ffffffff833bb090 d dcn31_bw_params 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+ffffffff833d1000 d dcn30_tg_funcs +ffffffff833d2000 d res_cap_dcn301 +ffffffff833d2040 d dcn301_res_pool_funcs +ffffffff833d3000 d dcn302_res_pool_funcs +ffffffff833d4000 d dcn303_res_pool_funcs +ffffffff833d5000 d dcn31_afmt_funcs +ffffffff833d6000 d dcn31_apg_funcs +ffffffff833d7000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff833d8000 d dcn31_hubp_funcs +ffffffff833d9000 d dcn31_tg_funcs +ffffffff833da000 d dcn31_res_pool_funcs +ffffffff833db000 d dcn31_vpg_funcs +ffffffff833dc000 d dcn314_tg_funcs +ffffffff833dd000 d dcn314_res_pool_funcs +ffffffff833de000 d dcn315_res_pool_funcs +ffffffff833df000 d dcn316_res_pool_funcs +ffffffff833e0000 d dcn32_dpp_funcs +ffffffff833e0110 d dcn32_dpp_cap +ffffffff833e1000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff833e2000 d dcn32_hubp_funcs +ffffffff833e3000 d dcn32_tg_funcs +ffffffff833e4000 d dcn32_res_pool_funcs +ffffffff833e5000 d dcn321_res_pool_funcs +ffffffff833e6000 D dcn1_0_ip +ffffffff833e61b8 D dcn1_0_soc +ffffffff833e8000 D dcn2_0_ip +ffffffff833e81b8 D dcn2_0_nv14_ip +ffffffff833e8370 D dcn2_0_soc +ffffffff833e96a8 D dcn2_0_nv14_soc +ffffffff833ea9e0 D dcn2_0_nv12_soc +ffffffff833ebd18 D dcn2_1_ip +ffffffff833ebed0 D dcn2_1_soc +ffffffff833ed208 D ddr4_wm_table_gs +ffffffff833ed2c8 D lpddr4_wm_table_gs +ffffffff833ed388 D lpddr4_wm_table_with_disabled_ppt +ffffffff833ed448 D ddr4_wm_table_rn +ffffffff833ed508 D ddr4_1R_wm_table_rn +ffffffff833ed5c8 D lpddr4_wm_table_rn +ffffffff833ee000 D dcn3_0_ip +ffffffff833ee1b8 D dcn3_0_soc +ffffffff833f0000 D dcn3_01_ip +ffffffff833f01b8 D dcn3_01_soc +ffffffff833f14f0 D ddr4_wm_table +ffffffff833f15b0 D lpddr5_wm_table +ffffffff833f2000 D dcn3_02_ip +ffffffff833f21b8 D dcn3_02_soc +ffffffff833f4000 D dcn3_03_ip +ffffffff833f41b8 D dcn3_03_soc +ffffffff833f6000 D dcn3_1_ip +ffffffff833f61b8 D dcn3_15_ip +ffffffff833f6370 D dcn3_16_ip +ffffffff833f6528 d dcn3_15_soc +ffffffff833f7860 d dcn3_1_soc +ffffffff833f8b98 d dcn3_16_soc +ffffffff833fa000 D dcn3_14_ip +ffffffff833fa1b8 d dcn3_14_soc +ffffffff833fc000 D dcn3_2_ip +ffffffff833fc1b8 D dcn3_2_soc +ffffffff833fe000 D dcn3_21_ip +ffffffff833fe1b8 D dcn3_21_soc +ffffffff83400000 d dsc_policy_max_target_bpp_limit +ffffffff83401000 D DIDTEDCConfig_P12 +ffffffff83401070 d smu7_profiling +ffffffff83402000 d cyan_skillfish_table_map +ffffffff83402080 d cyan_skillfish_message_map +ffffffff83403000 d navi10_table_map +ffffffff83403080 d navi10_pwr_src_map +ffffffff83403090 d navi10_workload_map +ffffffff834030e0 d navi10_message_map +ffffffff83403b60 d navi10_clk_map +ffffffff83403c20 d navi10_feature_mask_map +ffffffff83404000 d sienna_cichlid_table_map +ffffffff83404080 d sienna_cichlid_pwr_src_map +ffffffff83404090 d sienna_cichlid_workload_map +ffffffff834040e0 d sienna_cichlid_message_map +ffffffff83404b60 d sienna_cichlid_clk_map +ffffffff83404c20 d sienna_cichlid_feature_mask_map +ffffffff83405000 d vangogh_message_map +ffffffff83405a80 d vangogh_table_map +ffffffff83405b00 d vangogh_workload_map +ffffffff83405b50 d vangogh_feature_mask_map +ffffffff83406000 d renoir_table_map +ffffffff83406080 d renoir_workload_map +ffffffff834060d0 d renoir_message_map +ffffffff83406b50 d renoir_clk_map +ffffffff83407000 d smu_v13_0_0_message_map +ffffffff83407a80 d smu_v13_0_0_feature_mask_map +ffffffff83407e50 d smu_v13_0_0_table_map +ffffffff83407ed0 d smu_v13_0_0_pwr_src_map +ffffffff83407ee0 d smu_v13_0_0_workload_map +ffffffff83407f30 d smu_v13_0_0_clk_map +ffffffff83408000 d smu_v13_0_4_table_map +ffffffff83408080 d smu_v13_0_4_message_map +ffffffff83408b00 d smu_v13_0_4_feature_mask_map +ffffffff83409000 d smu_v13_0_5_table_map +ffffffff83409080 d smu_v13_0_5_message_map +ffffffff83409b00 d smu_v13_0_5_feature_mask_map +ffffffff8340a000 d smu_v13_0_7_message_map +ffffffff8340aa80 d smu_v13_0_7_feature_mask_map +ffffffff8340ae50 d smu_v13_0_7_table_map +ffffffff8340aed0 d smu_v13_0_7_pwr_src_map +ffffffff8340aee0 d smu_v13_0_7_workload_map +ffffffff8340af30 d smu_v13_0_7_clk_map +ffffffff8340b000 d yellow_carp_table_map +ffffffff8340b080 d yellow_carp_message_map +ffffffff8340bb00 d yellow_carp_feature_mask_map +ffffffff8340c000 D pci_conf_lock +ffffffff8340c010 D pci_bus_dma_tag +ffffffff8340c088 D msi_pic +ffffffff8340c120 D msix_pic +ffffffff8340d000 D pchb_cd +ffffffff8340e000 D amas_cd +ffffffff8340f000 D cardslot_cd +ffffffff83410000 D cardbus_cd +ffffffff83411000 d csdevs +ffffffff83412000 d ral_rt2560_opns +ffffffff83412028 d ral_rt2661_opns +ffffffff83412050 d ral_rt2860_opns +ffffffff83413000 D pcmcia_cd +ffffffff83414000 D pcmcia_3cxem556_func0 +ffffffff834140b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff83414158 D pcmcia_megahertz_xjem1144_func0 +ffffffff83414210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff834142b0 d pcmcia_3cxem556_func1 +ffffffff83414368 d pcmcia_3cxem556_func1_cfe0 +ffffffff83414408 d pcmcia_megahertz_xjem1144_func1 +ffffffff834144c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff83414560 d pcmcia_sierra_a555_func1 +ffffffff83414618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff834146b8 d pcmcia_sveclancard_func0 +ffffffff83414770 d pcmcia_sveclancard_func0_cfe0 +ffffffff83415000 D ep_pcmcia_prod +ffffffff83416000 D aic_pcmcia_prod +ffffffff83417000 D com_pcmcia_prod +ffffffff83418000 D wdc_pcmcia_pr +ffffffff83419000 D sm_pcmcia_prod +ffffffff8341a000 D xe_cd +ffffffff8341b000 D pcib_cd +ffffffff8341c000 D amdpcib_cd +ffffffff8341d000 D tcpcib_cd +ffffffff8341e000 D aapic_cd +ffffffff8341f000 D hme_cd +ffffffff83420000 D isa_cd +ffffffff83421000 D isadma_cd +ffffffff83422000 D fdc_cd +ffffffff83423000 D fd_types +ffffffff834231f8 D fd_cd +ffffffff83424000 D mpu_cd +ffffffff83425000 D pcppi_cd +ffffffff83426000 D spkr_cd +ffffffff83427000 D wbsio_cd +ffffffff83428000 D schsio_cd +ffffffff83429000 D it_cd +ffffffff8342a000 D uguru_cd +ffffffff8342b000 D aps_cd +ffffffff8342c000 D isa_bus_dma_tag +ffffffff8342d000 D wsdisplay_cd +ffffffff8342d020 D wsdisplay_cons +ffffffff8342d058 D wsdisplay_defaultscreens +ffffffff8342e000 D wskbd_cd +ffffffff8342e020 D wskbd_default_bell_data +ffffffff8342e030 D wskbd_default_keyrepeat_data +ffffffff8342e040 D wskbd_srcops +ffffffff8342f000 d compose_tab +ffffffff83430000 D wsmouse_cd +ffffffff83430020 D wsmouse_srcops +ffffffff83431000 D wsmux_srcops +ffffffff83431030 D wsmux_tree_lock +ffffffff83432000 D vt100_output +ffffffff83433000 D pckbd_cd +ffffffff83434000 D pms_cd +ffffffff83434020 d synaptics_params +ffffffff83434030 d alps_params +ffffffff83435000 D skgpio_cd +ffffffff83436000 D pctr_conf_lock +ffffffff83437000 D ukbd_keymapdata +ffffffff83438000 D usbrev_str +ffffffff83438030 D usb_cd +ffffffff83439000 d usbd_ratecheck.errinterval +ffffffff8343a000 D uhub_cd +ffffffff8343b000 D uaudio_cd +ffffffff8343c000 D uvideo_ctrls +ffffffff8343c2d8 D uvideo_cd +ffffffff8343d000 D utvfu_norm_params +ffffffff8343d030 D utvfu_cd +ffffffff8343e000 D udl_reg_vals_640x480_60 +ffffffff8343e020 D udl_reg_vals_640x480_67 +ffffffff8343e040 D udl_reg_vals_640x480_72 +ffffffff8343e060 D udl_reg_vals_640x480_75 +ffffffff8343e080 D udl_reg_vals_800x480_61 +ffffffff8343e0a0 D udl_reg_vals_800x600_56 +ffffffff8343e0c0 D udl_reg_vals_800x600_60 +ffffffff8343e0e0 D udl_reg_vals_800x600_72 +ffffffff8343e100 D udl_reg_vals_800x600_74 +ffffffff8343e120 D udl_reg_vals_800x600_75 +ffffffff8343e140 D udl_reg_vals_1024x768_60 +ffffffff8343e160 D udl_reg_vals_1024x768_70 +ffffffff8343e180 D udl_reg_vals_1024x768_75 +ffffffff8343e1a0 D udl_reg_vals_1280x800_60 +ffffffff8343e1c0 D udl_reg_vals_1280x960_60 +ffffffff8343e1e0 D udl_reg_vals_1280x1024_60 +ffffffff8343e200 D udl_reg_vals_1280x1024_75 +ffffffff8343e220 D udl_reg_vals_1366x768_60 +ffffffff8343e240 D udl_reg_vals_1440x900_60 +ffffffff8343e260 D udl_reg_vals_1440x900_59 +ffffffff8343e280 D udl_reg_vals_1440x900_75 +ffffffff8343e2a0 D udl_reg_vals_1680x1050_60 +ffffffff8343e2c0 D udl_reg_vals_1600x1200_60 +ffffffff8343e2e0 D udl_reg_vals_1920x1080_60 +ffffffff8343e300 D udl_null_key_1 +ffffffff8343e310 D udl_decomp_table +ffffffff8343f510 D udl_cd +ffffffff8343f530 D udl_stdscreen +ffffffff8343f560 D udl_scrlist +ffffffff8343f568 D udl_screenlist +ffffffff8343f578 D udl_accessops +ffffffff83440000 D umidi_cd +ffffffff83441000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff83441020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff83441040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff83441060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff83441080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff834410a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff834410c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff834410e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff83441100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff83441120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff83441140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff83441160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff83441180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff834411a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff834411c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff834411e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff83441200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff83441220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff83441240 D umidi_quirklist +ffffffff834414a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff834414c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff834414d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff834414f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff83441500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff83441520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff83441530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff83441550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff83441560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff83441580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff83441590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff834415b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff834415c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff834415e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff834415f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff83441610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff83441620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff83441640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff83441650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff83441670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff83441680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff834416a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff834416b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff834416d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff834416e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff83441700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff83441710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff83441730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff83441740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff83441760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff83441770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff83441790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff834417a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff834417c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff834417d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff834417f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff83442000 D ucom_cd +ffffffff83442020 D sysctl_ucomlock +ffffffff83443000 D ugen_cd +ffffffff83444000 D uhidev_cd +ffffffff83444020 d uhidev_use_rdesc.reportbuf +ffffffff83445000 D uhid_cd +ffffffff83446000 D fido_cd +ffffffff83447000 D ujoy_cd +ffffffff83448000 D ukbd_cd +ffffffff83449000 D ums_cd +ffffffff83449020 d ums_fix_elecom_descriptor.match +ffffffff8344a000 D umt_cd +ffffffff8344b000 D def_scale +ffffffff8344b020 D uts_cd +ffffffff8344c000 D ubcmtp_cd +ffffffff8344c020 d ubcmtp_wsmousecfg +ffffffff8344d000 D ucycom_cd +ffffffff8344e000 D uslhcom_cd +ffffffff8344f000 D ulpt_fwdevs +ffffffff8344f060 D ulpt_cd +ffffffff8344f080 D ulptusein +ffffffff83450000 D umass_cd +ffffffff83450020 d umass_bbb_transfer.dCBWtag +ffffffff83451000 D uthum_cd +ffffffff83452000 D ugold_cd +ffffffff83452020 d cmd_init +ffffffff83452028 d cmd_type +ffffffff83452030 d cmd_data +ffffffff83453000 D utrh_cd +ffffffff83454000 D uoakrh_cd +ffffffff83455000 D uoaklux_cd +ffffffff83456000 D uoakv_cd +ffffffff83457000 D uonerng_cd +ffffffff83458000 D urng_cd +ffffffff83459000 D udcf_cd +ffffffff8345a000 D umbg_cd +ffffffff8345b000 D uvisor_cd +ffffffff8345c000 D udsbr_cd +ffffffff8345d000 D utwitch_cd +ffffffff8345e000 D aue_cd +ffffffff8345f000 D axe_cd +ffffffff83460000 D axen_cd +ffffffff83461000 D smsc_cd +ffffffff83462000 D cue_devs +ffffffff83462010 D cue_cd +ffffffff83463000 D kue_cd +ffffffff83464000 D cdce_cd +ffffffff83465000 D urndis_cd +ffffffff83466000 D mos_cd +ffffffff83467000 D mue_cd +ffffffff83468000 D udav_cd +ffffffff83469000 D upl_devs +ffffffff83469008 D upl_cd +ffffffff8346a000 D ugl_devs +ffffffff8346a008 D ugl_cd +ffffffff8346b000 D url_cd +ffffffff8346c000 D ure_cd +ffffffff8346d000 D uaq_cd +ffffffff8346e000 D umodem_cd +ffffffff8346f000 D uftdi_cd +ffffffff83470000 D uplcom_cd +ffffffff83471000 D umct_cd +ffffffff83472000 D uvscom_cd +ffffffff83473000 D ubsa_cd +ffffffff83474000 D ukspan_cd +ffffffff83475000 D uslcom_cd +ffffffff83476000 D uark_cd +ffffffff83477000 D moscom_cd +ffffffff83478000 D umcs_cd +ffffffff83479000 D uscom_cd +ffffffff8347a000 D ucrcom_cd +ffffffff8347b000 D uxrcom_cd +ffffffff8347c000 D uipaq_cd +ffffffff8347d000 D umsm_cd +ffffffff8347e000 D uchcom_cd +ffffffff8347f000 D uticom_cd +ffffffff83480000 D wi_func_usb +ffffffff83480060 D wi_usb_cd +ffffffff83481000 D atu_cd +ffffffff83481020 D atu_devs +ffffffff83481270 D atu_radfirm +ffffffff83482000 D ural_cd +ffffffff83483000 D rum_cd +ffffffff83484000 D run_cd +ffffffff83484020 D rt3070_freqs +ffffffff83485000 D mtw_cd +ffffffff83486000 D zyd_cd +ffffffff83487000 D upgt_cd +ffffffff83488000 D urtw_cd +ffffffff83489000 D urtwn_cd +ffffffff8348a000 D rsu_cd +ffffffff8348b000 D otus_cd +ffffffff8348b020 d AR_PLCP_HDR_INTR +ffffffff8348c000 D umb_xfer_tout +ffffffff8348c010 D umb_uuid_basic_connect +ffffffff8348c020 D umb_uuid_context_internet +ffffffff8348c030 D umb_uuid_qmi_mbim +ffffffff8348c040 D umb_cd +ffffffff8348c060 D umb_delay +ffffffff8348c070 D umb_qmi_alloc_cid +ffffffff8348c080 D umb_qmi_fcc_auth +ffffffff8348d000 D uath_cd +ffffffff8348e000 D uow_cd +ffffffff8348f000 D uberry_cd +ffffffff83490000 D upd_cd +ffffffff83490020 d upd_usage_roots +ffffffff834900a0 d upd_usage_batdep +ffffffff83491000 D uwacom_cd +ffffffff83491020 d uwacom_attach.wacom_report_buf +ffffffff83492000 D bwfm_usb_bus_ops +ffffffff83493000 D umstc_cd +ffffffff83494000 D uhidpp_cd +ffffffff83495000 D ucc_cd +ffffffff83496000 D iic_cd +ffffffff83497000 D probe_addrs_sensor +ffffffff83497008 D probe_addrs_eeprom +ffffffff83498000 D lmtemp_cd +ffffffff83499000 D lmn_worklist +ffffffff83499240 D lmn_cd +ffffffff8349a000 D lmenv_cd +ffffffff8349b000 D maxtmp_cd +ffffffff8349c000 D adc_cd +ffffffff8349d000 D admtemp_cd +ffffffff8349e000 D admlc_cd +ffffffff8349f000 D admtm_cd +ffffffff834a0000 D admtmp_cd +ffffffff834a1000 D admtt_cd +ffffffff834a2000 D maxds_cd +ffffffff834a3000 D adt_chips +ffffffff834a3160 D worklist +ffffffff834a31a0 D adt_cd +ffffffff834a4000 D admcts_cd +ffffffff834a5000 D wbng_cd +ffffffff834a6000 D nvt_cd +ffffffff834a7000 D adl_worklist +ffffffff834a7138 D adl_cd +ffffffff834a8000 D andl_cd +ffffffff834a9000 D sdtemp_cd +ffffffff834aa000 D lisa_cd +ffffffff834ab000 D ihidev_cd +ffffffff834ac000 D ikbd_cd +ffffffff834ad000 D ims_cd +ffffffff834ae000 D imt_cd +ffffffff834af000 D iatp_cd +ffffffff834b0000 D ietp_cd +ffffffff834b1000 D bgw_cd +ffffffff834b2000 D icc_cd +ffffffff834b3000 D gpio_cd +ffffffff834b4000 D acpi_cd +ffffffff834b4020 D acpi_pcidevs +ffffffff834b4030 D acpi_pcirootdevs +ffffffff834b4040 D acpi_taskq +ffffffff834b4050 d acpi_indicator.save_led_state +ffffffff834b4060 d acpi_getprop.prop_guid +ffffffff834b4070 d acpi_getpropint.prop_guid +ffffffff834b4080 D acpi_skip_hids +ffffffff834b40f0 D acpi_isa_hids +ffffffff834b5000 D aml_intlen +ffffffff834b5010 D aml_table +ffffffff834b5af0 d osstring +ffffffff834b5b10 D aml_defobj +ffffffff834b5ca0 D aml_valid_osi +ffffffff834b5d78 D acpi_max_osi +ffffffff834b5d80 D aml_regionspace +ffffffff834b7000 D acpitimer_cd +ffffffff834b7020 d acpi_timecounter +ffffffff834b8000 D acpiac_cd +ffffffff834b8020 D acpiac_hids +ffffffff834b9000 D acpibat_cd +ffffffff834b9020 D acpibat_hids +ffffffff834ba000 D acpibtn_cd +ffffffff834ba020 D acpibtn_hids +ffffffff834bb000 D acpicmos_cd +ffffffff834bb020 D acpicmos_hids +ffffffff834bc000 D acpicpu_cd +ffffffff834bc020 D acpicpu_hids +ffffffff834bc030 d acpicpu_set_pdc.cpu_oscuuid +ffffffff834bd000 D acpihpet_cd +ffffffff834bd020 d hpet_timecounter +ffffffff834be000 D acpiec_cd +ffffffff834be020 D acpiec_hids +ffffffff834bf000 D acpitz_cd +ffffffff834bf020 D acpitz_perflevel +ffffffff834c0000 D acpimadt_cd +ffffffff834c1000 D acpimcfg_cd +ffffffff834c2000 D acpiprt_map_list +ffffffff834c2010 D acpiprt_cd +ffffffff834c2030 D acpiprt_pri +ffffffff834c3000 D acpidmar_force_cm +ffffffff834c3008 D acpidmar_cd +ffffffff834c3030 D vtd_faults +ffffffff834c4000 D acpidock_cd +ffffffff834c5000 D abl_cd +ffffffff834c5020 D abl_hids +ffffffff834c6000 D asmc_cd +ffffffff834c6020 D asmc_hids +ffffffff834c7000 D acpiasus_cd +ffffffff834c7020 D acpiasus_hids +ffffffff834c8000 D acpithinkpad_cd +ffffffff834c8020 D acpithinkpad_hids +ffffffff834c9000 D acpitoshiba_cd +ffffffff834c9020 D acpitoshiba_hids +ffffffff834ca000 D acpisony_cd +ffffffff834cb000 D acpivideo_cd +ffffffff834cc000 D acpivout_cd +ffffffff834cd000 D acpipwrres_cd +ffffffff834ce000 D aibs_cd +ffffffff834ce020 d aibs_hids +ffffffff834cf000 D aplgpio_cd +ffffffff834cf020 D aplgpio_hids +ffffffff834d0000 D bytgpio_cd +ffffffff834d0020 D bytgpio_hids +ffffffff834d1000 D chvgpio_cd +ffffffff834d1020 D chvgpio_hids +ffffffff834d2000 D glkgpio_cd +ffffffff834d2020 D glkgpio_hids +ffffffff834d3000 D pchgpio_cd +ffffffff834d3020 D pchgpio_hids +ffffffff834d3080 D pchgpio_devices +ffffffff834d4000 D tipmic_cd +ffffffff834d4020 D tipmic_thermal_regmap +ffffffff834d4030 D tipmic_power_regmap +ffffffff834d5000 D ccpmic_cd +ffffffff834d5020 D ccpmic_thermal_regmap +ffffffff834d5023 D ccpmic_power_regmap +ffffffff834d6000 D com_hids +ffffffff834d7000 D sdhc_hids +ffffffff834d8000 D dwiic_hids +ffffffff834d8050 D ihidev_hids +ffffffff834d8070 D ietp_hids +ffffffff834d8220 D iatp_hids +ffffffff834d8240 d dwiic_acpi_found_ihidev.i2c_hid_guid +ffffffff834d9000 D acpicbkbd_cd +ffffffff834d9020 D acpicbkbd_hids +ffffffff834da000 D acpials_cd +ffffffff834da020 D acpials_hids +ffffffff834db000 D tpm_cd +ffffffff834db020 D tpm_hids +ffffffff834dc000 D acpihve_cd +ffffffff834dd000 D acpisbs_cd +ffffffff834dd020 D acpisbs_hids +ffffffff834de000 D acpisurface_cd +ffffffff834de020 D acpisurface_hids +ffffffff834df000 D ipmi_acpi_hids +ffffffff834e0000 D amdgpio_cd +ffffffff834e0020 D amdgpio_hids +ffffffff834e1000 D acpihid_cd +ffffffff834e1020 D acpihid_hids +ffffffff834e1030 d acpihid_guid +ffffffff834e2000 d iosf_hids +ffffffff834e3000 D acpipci_cd +ffffffff834e3020 D acpipci_hids +ffffffff834e3040 d acpipci_osc.uuid +ffffffff834e4000 D efi_cd +ffffffff834e5000 D vmm_cd +ffffffff834e6000 D vmm_hv_signature +ffffffff834e7000 D sdmmc_cd +ffffffff834e8000 D bwfm_sdio_bus_ops +ffffffff834e8028 D bwfm_sdio_buscore_ops +ffffffff834e9000 D onewire_cd +ffffffff834ea000 D owid_cd +ffffffff834eb000 D owsbm_cd +ffffffff834ec000 D owtemp_cd +ffffffff834ed000 D owctr_cd +ffffffff834ee000 D hz +ffffffff834ee004 D tick +ffffffff834ee008 D tick_nsec +ffffffff834ee00c D initialvnodes +ffffffff834ee010 D maxprocess +ffffffff834ee014 D maxthread +ffffffff834ee018 D maxfiles +ffffffff834ee020 D nmbclust +ffffffff834ee028 D bufcachepercent +ffffffff834ee02c D fscale +ffffffff834ee030 D shminfo +ffffffff834ee044 D seminfo +ffffffff834ef000 D extraloc +ffffffff834ef100 D rextraloc +ffffffff834ef110 D locnames +ffffffff834ef1f0 D locnamp +ffffffff834ef410 D pv_size +ffffffff834ef420 D pv +ffffffff834ef640 d loc +ffffffff834efad0 D cfdata +ffffffff834f6638 D cfroots +ffffffff834f6644 D cfroots_size +ffffffff834f6650 D pdevnames +ffffffff834f67b8 D pdevnames_size +ffffffff834f67c0 D pdevinit +ffffffff834f7000 D rootdev +ffffffff834f7004 D dumpdev +ffffffff834f7010 D swdevt +ffffffff834f8000 A __kudata_start +ffffffff834f8000 D tlb_shoot_first_pcid +ffffffff834f8008 D tlb_shoot_addr1 +ffffffff834f8010 D tlb_shoot_addr2 +ffffffff834f8018 D tlb_shoot_wait +ffffffff834f9000 A __kudata_end +ffffffff834f9000 C _edata +ffffffff834f9000 b drm_minors_idr +ffffffff834f9008 B drm_refcnt +ffffffff834fa000 B vga_console_screen +ffffffff834fa070 B vga_console_attached +ffffffff834fa078 B vga_console_vc +ffffffff834fa488 B vgaconsole +ffffffff834fa48c B vga_console_type +ffffffff834fb000 b wdc_alloc_queue.inited +ffffffff834fb008 B wdc_xfer_pool +ffffffff834fb1b0 B wdc_xfer_iopool +ffffffff834fc000 B aic_debug +ffffffff834fd000 B gdt_cnt +ffffffff834fd004 B gdt_polling +ffffffff834fd005 B gdt_from_wait +ffffffff834fd008 b gdt_exec_ccb.__level +ffffffff834fd00c B gdt_wait_index +ffffffff834fd010 B gdt_wait_gdt +ffffffff834fe000 B sili_error_pmp_ports +ffffffff834ff000 B ncr53c9x_debug +ffffffff834ff008 b ecb_iopool +ffffffff834ff048 b ecb_pool_initialized +ffffffff834ff050 b ecb_pool +ffffffff834ff1f8 B sdebug +ffffffff83500000 B epic_copy_small +ffffffff83501000 B comconsaddr +ffffffff83501008 B comconsiot +ffffffff83501010 B comconsioh +ffffffff83501018 B comconsfreq +ffffffff8350101c B comcons_reg_width +ffffffff83501020 B commajor +ffffffff83501024 B comconsunit +ffffffff83501028 B comcons_reg_shift +ffffffff8350102c B comconsattached +ffffffff83502000 B pckbc_console +ffffffff83502004 B pckbc_console_attached +ffffffff83502008 B pckbc_consdata +ffffffff835020e0 b pckbc_cons_slotdata +ffffffff83503000 b cy_poll.counter +ffffffff83504000 B atw_xindiv2 +ffffffff83505000 B rtw_rfprog_fallback +ffffffff83505004 B rtw_do_chip_reset +ffffffff83506000 b malo_cmd_string.cmd_buf +ffffffff83507000 b iosf_mbi +ffffffff83508000 B uhcixfer +ffffffff83509000 B ohcixfer +ffffffff83509008 b ohci_intr.ohci_intr_tv +ffffffff8350a000 B ehcixfer +ffffffff8350b000 B xhcixfer +ffffffff8350c000 B ipmi_enabled +ffffffff8350c008 B ipmi_sensor_list +ffffffff8350d000 B mpath +ffffffff8350e000 B sr_bootuuid +ffffffff8350e010 B sr_bootkey +ffffffff8350e030 B softraid0 +ffffffff8350e038 B sr_hotplug_callbacks +ffffffff8350f000 B gf_pow +ffffffff8350f300 B gf_map +ffffffff8350fb00 B gf_log +ffffffff83510000 b ksym_syms +ffffffff83510008 b ksym_syms_size +ffffffff83511000 B kstat_version +ffffffff83511008 B kstat_id_tree +ffffffff83511010 B kstat_pv_tree +ffffffff83511018 B kstat_nm_tree +ffffffff83511020 b kstat_init.initialized +ffffffff83511028 B kstat_pool +ffffffff83512000 B stat_fbufs_in +ffffffff83512004 B stat_fbufs_wait +ffffffff83512008 B stat_opened_fusedev +ffffffff83512010 B fuse_d_list +ffffffff83513000 B fusefs_fbuf_pool +ffffffff83514000 B pf_state_pl +ffffffff835141a8 B pf_src_tree_pl +ffffffff83514350 B pf_pktdelay_pl +ffffffff835144f8 B pf_status +ffffffff835146e0 B tree_id +ffffffff835146e8 B tree_src_tracking +ffffffff835146f0 B pf_sn_item_pl +ffffffff83514898 B pf_statetbl +ffffffff835148a0 B pf_state_item_pl +ffffffff83514a48 B pf_state_key_pl +ffffffff83514bf0 B pf_purge_states_limit +ffffffff83514bf8 B pf_rule_item_pl +ffffffff83514da0 b pf_purge_expired_states.cur +ffffffff83514da8 B pf_tcp_secret_init +ffffffff83514db0 B pf_tcp_secret +ffffffff83514dc0 B pf_tcp_secret_ctx +ffffffff83514e90 B pf_tcp_iss_off +ffffffff83514ea0 B pf_queues +ffffffff83514ec0 B pf_queues_active +ffffffff83514ec8 B pf_queues_inactive +ffffffff83514ed0 B pf_rule_pl +ffffffff83515078 B pf_queue_pl +ffffffff83516000 B pf_frent_pl +ffffffff835161a8 B pf_frnode_pl +ffffffff83516350 B pf_frag_pl +ffffffff835164f8 B pf_state_scrub_pl +ffffffff835166a0 B pf_fragqueue +ffffffff835166b0 B pf_frag_mtx +ffffffff835166c0 B pf_nfrents +ffffffff835166c8 B pf_frnode_tree +ffffffff83517000 B pf_anchors +ffffffff83517008 B pf_main_anchor +ffffffff83517510 B pf_anchor_pl +ffffffff83518000 B pf_ioctl_trans +ffffffff83518008 B pf_default_rule +ffffffff83518548 B pf_tag_pl +ffffffff835186f0 B pf_default_rule_new +ffffffff83518c30 B pf_anchor_stack +ffffffff83518c38 B pf_trans_set +ffffffff83518c60 B pf_tcount +ffffffff8351a000 B pfr_ktable_pl +ffffffff8351a1b0 B pfr_kentry_pl +ffffffff8351a6a8 B pfr_kcounters_pl +ffffffff8351a850 B pfr_ffaddr +ffffffff8351a860 B pfr_nulltable +ffffffff8351ac88 B pfr_ktables +ffffffff8351ac90 B pfr_ktable_cnt +ffffffff8351ac94 B pfr_mask +ffffffff8351b000 B pf_osfp_list +ffffffff8351b008 B pf_osfp_entry_pl +ffffffff8351b1b0 B pf_osfp_pl +ffffffff8351c000 B pfi_all +ffffffff8351c008 B pfi_addr_pl +ffffffff8351c1b0 B pfi_buffer_max +ffffffff8351c1b8 B pfi_buffer +ffffffff8351c1c0 B pfi_ifs +ffffffff8351c1c8 B pfi_buffer_cnt +ffffffff8351d000 b pf_syncookie_status +ffffffff8351e000 B hfsc_class_pl +ffffffff8351e1a8 B hfsc_internal_sc_pl +ffffffff8351f000 B pflog_ifs +ffffffff83520000 b pfsynccounters +ffffffff83520008 b pfsyncif +ffffffff83520010 b pfsync_deferrals_pool +ffffffff83521000 B pflowif_list +ffffffff83521008 B pflow_counters +ffffffff83522000 B bios +ffffffff83523000 b opened +ffffffff83523004 b evqueue_head +ffffffff83523008 b evqueue_tail +ffffffff8352300c b evqueue_count +ffffffff83523010 b hotplug_klist +ffffffff83523030 b evqueue +ffffffff83524000 B pppoe_softc_list +ffffffff83525000 B dt_tracing +ffffffff83525008 B dtdev_list +ffffffff83525010 B dt_probe_list +ffffffff83525020 B dt_nprobes +ffffffff83525024 B allowdt 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ln_hold_total +ffffffff836672bc B nd6_inuse +ffffffff83668000 B rawin6pcbtable +ffffffff83668078 B rip6counters +ffffffff83669000 B pkptable +ffffffff83669038 B pkpcb_pool +ffffffff836691e0 b nregistered +ffffffff836691e4 b npromisc +ffffffff8366a000 B setperf_prio +ffffffff8366a004 B cpureset_delay +ffffffff8366a008 B ssym +ffffffff8366a010 B esym +ffffffff8366a018 B bootdev +ffffffff8366a01c B biosbasemem +ffffffff8366a020 B bootapiver +ffffffff8366a024 B safepri +ffffffff8366a028 B exec_map +ffffffff8366a030 B phys_map +ffffffff8366a038 B allowaperture +ffffffff8366a040 B msgbuf_paddr +ffffffff8366a048 B msgbuf_vaddr +ffffffff8366a050 B physmem +ffffffff8366a058 B idt_vaddr +ffffffff8366a060 B idt_paddr +ffffffff8366a068 B bios_diskinfo +ffffffff8366a070 B bios_cksumlen +ffffffff8366a074 B kbd_reset +ffffffff8366a078 B forceukbd +ffffffff8366a07c B dumpsize +ffffffff8366a080 B dumplo +ffffffff8366a088 B mem_cluster_cnt +ffffffff8366a090 B mem_clusters +ffffffff8366a190 B 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acpibtn_lids +ffffffff8383b000 B cst_stats +ffffffff8383c000 B acpihpet_attached +ffffffff8383d000 b acpiec_wait.acpiecnowait +ffffffff8383e000 B acpitz_cpu_setperf +ffffffff8383f000 B acpimadt_busses +ffffffff83842000 B acpimadt_isa_bus +ffffffff83842030 b lapic_map +ffffffff83843000 B acpidmar_ddb +ffffffff83843010 b dmar_bdf.bdf +ffffffff83843030 B acpidmar_sc +ffffffff83843038 B domain_map_page +ffffffff83843040 b dom_bdf.mmm +ffffffff83843070 b iommu_init.niommu +ffffffff83843078 b acpidmar_pci_attach.dom +ffffffff83843080 b sid_flag +ffffffff83883080 b ivhd_showpage.show +ffffffff83883084 b ivhd_iommu_init.niommu +ffffffff83883088 b acpidmar_intr.ofe.0 +ffffffff83883090 b acpidmar_intr.ofe.1 +ffffffff83884000 b dwiic_i2c_intr_string.irqstr +ffffffff83885000 B acpihve_attached +ffffffff83886000 B efi_jmpbuf +ffffffff83887000 B vm_pool +ffffffff838871a8 B vcpu_pool +ffffffff83887350 B vmm_softc +ffffffff83888000 B l1tf_flush_region +ffffffff83889000 B sdmmc_verbose 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