--- 7.4/2024-03-01T07:17:08Z/2024-02-05T00:00:00Z/nm-bsd-ot14.txt Sat Mar 2 01:13:01 2024 +++ 7.4/2024-03-01T07:17:08Z/2024-02-06T00:00:00Z/nm-bsd-ot14.txt Sat Mar 2 04:09:19 2024 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -025ed000 T __kernel_kutext_phys -025f1000 C __kernel_cptext_phys -025f2000 C __kernel_rodata_phys -02ee2000 R __kernel_kutext_page_phys -02ee4000 C __kernel_randomdata_phys -031a0000 R __kernel_data_phys -034f6000 D __kernel_kudata_phys -034f7000 C __kernel_bss_phys +025ee000 T __kernel_kutext_phys +025f2000 C __kernel_cptext_phys +025f3000 C __kernel_rodata_phys +02ee3000 R __kernel_kutext_page_phys +02ee5000 C __kernel_randomdata_phys +031a1000 R __kernel_data_phys +034f7000 D __kernel_kudata_phys +034f8000 C __kernel_bss_phys 03a00000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -6940,33 +6940,33 @@ ffffffff8132bdf0 T sobind ffffffff8132be70 T solisten ffffffff8132bf60 T sounsplice ffffffff8132c130 T sorflush -ffffffff8132c250 T soreaper -ffffffff8132c2a0 T soclose -ffffffff8132c580 T sodisconnect -ffffffff8132c5f0 T soabort -ffffffff8132c620 T soaccept -ffffffff8132c6d0 T soconnect -ffffffff8132c7a0 T soconnect2 -ffffffff8132c850 T sosend -ffffffff8132ce30 T m_getuio -ffffffff8132d000 T sbsync -ffffffff8132d060 T soreceive -ffffffff8132dff0 T soshutdown -ffffffff8132e080 T sosplice -ffffffff8132e4a0 T soidle -ffffffff8132e4f0 T sotask -ffffffff8132e530 T somove -ffffffff8132efa0 T sorwakeup -ffffffff8132f060 T sowwakeup -ffffffff8132f100 T soput -ffffffff8132f140 T sosetopt -ffffffff8132f640 T sogetopt -ffffffff8132fae0 T sohasoutofband -ffffffff8132fb20 T sofilt_lock -ffffffff8132fb70 T sofilt_unlock -ffffffff8132fbd0 T soo_kqfilter -ffffffff8132fc60 T sobuf_print -ffffffff8132fda0 T so_print +ffffffff8132c260 T soreaper +ffffffff8132c2b0 T soclose +ffffffff8132c590 T sodisconnect +ffffffff8132c600 T soabort +ffffffff8132c630 T soaccept +ffffffff8132c6e0 T soconnect +ffffffff8132c7b0 T soconnect2 +ffffffff8132c860 T sosend +ffffffff8132ce40 T m_getuio +ffffffff8132d010 T sbsync +ffffffff8132d070 T soreceive +ffffffff8132e000 T soshutdown +ffffffff8132e090 T sosplice +ffffffff8132e4b0 T soidle +ffffffff8132e500 T sotask +ffffffff8132e540 T somove +ffffffff8132efb0 T sorwakeup +ffffffff8132f070 T sowwakeup +ffffffff8132f110 T soput +ffffffff8132f150 T sosetopt +ffffffff8132f660 T sogetopt +ffffffff8132fb00 T sohasoutofband +ffffffff8132fb40 T sofilt_lock +ffffffff8132fb90 T sofilt_unlock +ffffffff8132fbf0 T soo_kqfilter +ffffffff8132fc80 T sobuf_print +ffffffff8132fdc0 T so_print ffffffff81331000 T soisconnecting ffffffff81331050 T soassertlocked ffffffff81331180 T soisconnected @@ -6978,32 +6978,32 @@ ffffffff813316c0 T soqinsque ffffffff81331780 T soisdisconnecting ffffffff813317e0 T soisdisconnected ffffffff81331840 T sonewconn -ffffffff81331ce0 T soreserve -ffffffff81331e60 T socantsendmore -ffffffff81331e90 T socantrcvmore -ffffffff81331ec0 T solock_shared -ffffffff81331f20 T solock_pair -ffffffff81332060 T sounlock_shared -ffffffff813320c0 T soassertlocked_readonly -ffffffff81332150 T sosleep_nsec -ffffffff81332260 T sbwait -ffffffff813322d0 T sblock -ffffffff813323e0 T sbunlock -ffffffff81332470 T sowakeup -ffffffff81332540 T sbreserve -ffffffff81332600 T sbrelease -ffffffff81332650 T sbcheckreserve -ffffffff813326c0 T sbchecklowmem -ffffffff81332720 T sbflush -ffffffff813328c0 T sbappend -ffffffff81332970 T sbappendrecord -ffffffff81332a90 T sbcompress -ffffffff81332d00 T sbappendstream -ffffffff81332dc0 T sbappendaddr -ffffffff81333020 T sbappendcontrol -ffffffff81333240 T sbdrop -ffffffff81333450 T sbdroprecord -ffffffff81333510 T sbcreatecontrol +ffffffff81331d40 T soreserve +ffffffff81331ec0 T socantsendmore +ffffffff81331ef0 T socantrcvmore +ffffffff81331f20 T solock_shared +ffffffff81331f80 T solock_pair +ffffffff813320c0 T sounlock_shared +ffffffff81332120 T soassertlocked_readonly +ffffffff813321b0 T sosleep_nsec +ffffffff813322c0 T sbwait +ffffffff81332330 T sblock +ffffffff81332440 T sbunlock +ffffffff813324d0 T sowakeup +ffffffff813325a0 T sbreserve +ffffffff81332660 T sbrelease +ffffffff813326b0 T sbcheckreserve +ffffffff81332720 T sbchecklowmem +ffffffff81332780 T sbflush +ffffffff81332920 T sbappend +ffffffff813329d0 T sbappendrecord +ffffffff81332af0 T sbcompress +ffffffff81332d60 T sbappendstream +ffffffff81332e20 T sbappendaddr +ffffffff81333080 T sbappendcontrol +ffffffff813332a0 T sbdrop +ffffffff813334b0 T sbdroprecord +ffffffff81333570 T sbcreatecontrol ffffffff81334000 T sys_socket ffffffff813341c0 T sys_bind ffffffff81334320 T getsock @@ -7666,100 +7666,100 @@ ffffffff81379da0 T if_slowtimo ffffffff81379e50 T if_get ffffffff81379ef0 T if_watchdog_task ffffffff81379fe0 T if_linkstate_task -ffffffff8137a0e0 T if_alloc_sadl -ffffffff8137a200 T if_free_sadl -ffffffff8137a260 T if_attachhead -ffffffff8137a2e0 T if_attach_common -ffffffff8137a580 T if_attach -ffffffff8137a5e0 T if_attach_queues -ffffffff8137a730 T if_attach_iqueues -ffffffff8137a840 T if_qstart_compat -ffffffff8137a890 T if_rtrequest_dummy -ffffffff8137a8c0 T if_enqueue_ifq -ffffffff8137a950 T if_attach_ifq -ffffffff8137a970 T if_start -ffffffff8137a9f0 T if_enqueue -ffffffff8137aa70 T if_input -ffffffff8137aa90 T if_input_local -ffffffff8137ad80 T if_output_ml -ffffffff8137ae10 T if_output_tso -ffffffff8137af10 T unhandled_af -ffffffff8137af30 T if_output_mq -ffffffff8137b020 T if_output_local -ffffffff8137b0a0 T if_input_process -ffffffff8137b150 T if_vinput -ffffffff8137b210 T if_hooks_run -ffffffff8137b350 T if_remove -ffffffff8137b3e0 T if_deactivate -ffffffff8137b420 T if_detachhook_add -ffffffff8137b480 T if_detachhook_del -ffffffff8137b4e0 T if_detach -ffffffff8137ba10 T if_detached_qstart -ffffffff8137ba20 T if_detached_ioctl -ffffffff8137ba50 T net_tq -ffffffff8137bab0 T if_delgroup -ffffffff8137bc70 T ifa_del -ffffffff8137bd10 T if_counters_free -ffffffff8137bd90 T if_isconnected -ffffffff8137bec0 T if_clone_create -ffffffff8137c060 T if_clone_lookup -ffffffff8137c3a0 T if_unit -ffffffff8137c450 T if_setrdomain -ffffffff8137c5c0 T if_clone_destroy -ffffffff8137c6d0 T if_down -ffffffff8137c790 T if_clone_attach -ffffffff8137c820 T if_clone_list -ffffffff8137c920 T if_congestion -ffffffff8137c950 T if_congested -ffffffff8137c9c0 T ifa_ifwithaddr -ffffffff8137cab0 T ifa_ifwithdstaddr -ffffffff8137cbc0 T ifaof_ifpforaddr -ffffffff8137ccf0 T p2p_rtrequest -ffffffff8137ce80 T p2p_bpf_mtap -ffffffff8137cea0 T p2p_input -ffffffff8137cf00 T if_downall -ffffffff8137cfb0 T if_linkstate -ffffffff8137d020 T if_up -ffffffff8137d100 T if_linkstatehook_add -ffffffff8137d160 T if_linkstatehook_del -ffffffff8137d1c0 T if_link_state_change -ffffffff8137d220 T if_setlladdr -ffffffff8137d290 T if_createrdomain -ffffffff8137d400 T ifioctl -ffffffff8137e280 T if_setgroupattribs -ffffffff8137e360 T ifioctl_get -ffffffff8137e920 T ifsetlro -ffffffff8137eb90 T ifnewlladdr -ffffffff8137ed10 T ifconf -ffffffff8137f030 T if_getgroupmembers -ffffffff8137f150 T if_getgroupattribs -ffffffff8137f1e0 T if_getgrouplist -ffffffff8137f2d0 T if_getdata -ffffffff8137f410 T if_getgroup -ffffffff8137f500 T if_txhprio_l2_check -ffffffff8137f540 T if_txhprio_l3_check -ffffffff8137f580 T if_rxhprio_l2_check -ffffffff8137f5c0 T if_rxhprio_l3_check -ffffffff8137f600 T if_counters_alloc -ffffffff8137f670 T if_creategroup -ffffffff8137f730 T if_group_routechange -ffffffff8137f7e0 T if_group_egress_build -ffffffff8137fa00 T ifpromisc -ffffffff8137fb40 T ifa_add -ffffffff8137fbd0 T ifa_update_broadaddr -ffffffff8137fc10 T ifa_print_all -ffffffff8137fcf0 T if_addrhook_add -ffffffff8137fd40 T if_addrhook_del -ffffffff8137fda0 T if_addrhooks_run -ffffffff8137fdc0 T if_rxr_init -ffffffff8137fe10 T if_rxr_livelocked -ffffffff8137fe60 T if_rxr_get -ffffffff8137fed0 T if_rxr_info_ioctl -ffffffff8137ff70 T if_rxr_ioctl -ffffffff81380060 T niq_init -ffffffff813800b0 T niq_enqueue -ffffffff81380150 T niq_enlist -ffffffff813801f0 T net_tq_barriers +ffffffff8137a0f0 T if_alloc_sadl +ffffffff8137a210 T if_free_sadl +ffffffff8137a270 T if_attachhead +ffffffff8137a2f0 T if_attach_common +ffffffff8137a590 T if_attach +ffffffff8137a5f0 T if_attach_queues +ffffffff8137a740 T if_attach_iqueues +ffffffff8137a850 T if_qstart_compat +ffffffff8137a8a0 T if_rtrequest_dummy +ffffffff8137a8d0 T if_enqueue_ifq +ffffffff8137a960 T if_attach_ifq +ffffffff8137a980 T if_start +ffffffff8137aa00 T if_enqueue +ffffffff8137aa80 T if_input +ffffffff8137aaa0 T if_input_local +ffffffff8137ad90 T if_output_ml +ffffffff8137ae20 T if_output_tso +ffffffff8137af20 T unhandled_af +ffffffff8137af40 T if_output_mq +ffffffff8137b030 T if_output_local +ffffffff8137b0b0 T if_input_process +ffffffff8137b160 T if_vinput +ffffffff8137b220 T if_hooks_run +ffffffff8137b360 T if_remove +ffffffff8137b3f0 T if_deactivate +ffffffff8137b430 T if_detachhook_add +ffffffff8137b490 T if_detachhook_del +ffffffff8137b4f0 T if_detach +ffffffff8137ba20 T if_detached_qstart +ffffffff8137ba30 T if_detached_ioctl +ffffffff8137ba60 T net_tq +ffffffff8137bac0 T if_delgroup +ffffffff8137bc80 T ifa_del +ffffffff8137bd20 T if_counters_free +ffffffff8137bda0 T if_isconnected +ffffffff8137bed0 T if_clone_create +ffffffff8137c070 T if_clone_lookup +ffffffff8137c3b0 T if_unit +ffffffff8137c460 T if_setrdomain +ffffffff8137c5d0 T if_clone_destroy +ffffffff8137c6e0 T if_down +ffffffff8137c7b0 T if_clone_attach +ffffffff8137c840 T if_clone_list +ffffffff8137c940 T if_congestion +ffffffff8137c970 T if_congested +ffffffff8137c9e0 T ifa_ifwithaddr +ffffffff8137cad0 T ifa_ifwithdstaddr +ffffffff8137cbe0 T ifaof_ifpforaddr +ffffffff8137cd10 T p2p_rtrequest +ffffffff8137cea0 T p2p_bpf_mtap +ffffffff8137cec0 T p2p_input +ffffffff8137cf20 T if_downall +ffffffff8137cfd0 T if_linkstate +ffffffff8137d050 T if_up +ffffffff8137d130 T if_linkstatehook_add +ffffffff8137d190 T if_linkstatehook_del +ffffffff8137d1f0 T if_link_state_change +ffffffff8137d250 T if_setlladdr +ffffffff8137d2c0 T if_createrdomain +ffffffff8137d430 T ifioctl +ffffffff8137e2b0 T if_setgroupattribs +ffffffff8137e390 T ifioctl_get +ffffffff8137e950 T ifsetlro +ffffffff8137ebd0 T ifnewlladdr +ffffffff8137ed50 T ifconf +ffffffff8137f070 T if_getgroupmembers +ffffffff8137f190 T if_getgroupattribs +ffffffff8137f220 T if_getgrouplist +ffffffff8137f310 T if_getdata +ffffffff8137f450 T if_getgroup +ffffffff8137f540 T if_txhprio_l2_check +ffffffff8137f580 T if_txhprio_l3_check +ffffffff8137f5c0 T if_rxhprio_l2_check +ffffffff8137f600 T if_rxhprio_l3_check +ffffffff8137f640 T if_counters_alloc +ffffffff8137f6b0 T if_creategroup +ffffffff8137f770 T if_group_routechange +ffffffff8137f820 T if_group_egress_build +ffffffff8137fa40 T ifpromisc +ffffffff8137fb80 T ifa_add +ffffffff8137fc10 T ifa_update_broadaddr +ffffffff8137fc50 T ifa_print_all +ffffffff8137fd30 T if_addrhook_add +ffffffff8137fd80 T if_addrhook_del +ffffffff8137fde0 T if_addrhooks_run +ffffffff8137fe00 T if_rxr_init +ffffffff8137fe50 T if_rxr_livelocked +ffffffff8137fea0 T if_rxr_get +ffffffff8137ff10 T if_rxr_info_ioctl +ffffffff8137ffb0 T if_rxr_ioctl +ffffffff813800a0 T niq_init +ffffffff813800f0 T niq_enqueue +ffffffff81380190 T niq_enlist +ffffffff81380230 T net_tq_barriers ffffffff81381000 T priq_idx ffffffff81381040 T priq_enq ffffffff81381190 T priq_deq_begin @@ -8399,57 +8399,57 @@ ffffffff813bbef0 T rtable_mpath_capable ffffffff813bbf20 T rtable_mpath_reprio ffffffff813bd000 T route_init ffffffff813bd090 T route_cache -ffffffff813bd1a0 T rtisvalid -ffffffff813bd240 T rtfree -ffffffff813bd400 T rt_match -ffffffff813bd4c0 T rt_clone -ffffffff813bd5b0 T rtrequest -ffffffff813bdc30 T rt_hash -ffffffff813be030 T rtalloc_mpath -ffffffff813be0e0 T rtalloc -ffffffff813be1a0 T rt_setgwroute -ffffffff813be450 T rt_plen2mask -ffffffff813be510 T rt_putgwroute -ffffffff813be610 T rtref -ffffffff813be630 T rt_timer_remove_all -ffffffff813be840 T ifafree -ffffffff813be8a0 T rtlabel_unref -ffffffff813be970 T rt_mpls_clear -ffffffff813be9d0 T ifaref -ffffffff813bea10 T rtredirect -ffffffff813bee40 T rt_setgate -ffffffff813bef50 T rtdeletemsg -ffffffff813bf130 T rtlabel_id2sa -ffffffff813bf250 T rtrequest_delete -ffffffff813bf400 T rtflushclone1 -ffffffff813bf4b0 T rtflushclone -ffffffff813bf5c0 T rtlabel_name2id -ffffffff813bf740 T rt_mpls_set -ffffffff813bf810 T rt_getll -ffffffff813bf880 T rt_maskedcopy -ffffffff813bf920 T rt_ifa_add -ffffffff813bfac0 T rt_ifa_del -ffffffff813bfd40 T rt_ifa_addlocal -ffffffff813bfe70 T rt_ifa_dellocal -ffffffff813bffa0 T rt_ifa_purge -ffffffff813c00f0 T rt_ifa_purge_walker -ffffffff813c0130 T rt_timer_init -ffffffff813c0180 T rt_timer_queue_init -ffffffff813c01d0 T rt_timer_queue_change -ffffffff813c0210 T rt_timer_queue_flush -ffffffff813c0440 T rt_timer_queue_count -ffffffff813c0470 T rt_timer_get_expire -ffffffff813c0500 T rt_timer_add -ffffffff813c0770 T rt_timer_timer -ffffffff813c08c0 T rtlabel_id2name_locked -ffffffff813c0970 T rtlabel_id2name -ffffffff813c0a60 T rt_if_track -ffffffff813c0bb0 T rt_if_linkstate_change -ffffffff813c0d40 T rt_plentosa -ffffffff813c0e00 T db_print_sa -ffffffff813c0eb0 T db_print_ifa -ffffffff813c1110 T db_show_rtentry -ffffffff813c1330 T db_show_rtable +ffffffff813bd200 T rtisvalid +ffffffff813bd2a0 T rtfree +ffffffff813bd460 T rt_match +ffffffff813bd520 T rt_clone +ffffffff813bd610 T rtrequest +ffffffff813bdc90 T rt_hash +ffffffff813be090 T rtalloc_mpath +ffffffff813be140 T rtalloc +ffffffff813be200 T rt_setgwroute +ffffffff813be4b0 T rt_plen2mask +ffffffff813be570 T rt_putgwroute +ffffffff813be670 T rtref +ffffffff813be690 T rt_timer_remove_all +ffffffff813be8a0 T ifafree +ffffffff813be900 T rtlabel_unref +ffffffff813be9d0 T rt_mpls_clear +ffffffff813bea30 T ifaref +ffffffff813bea70 T rtredirect +ffffffff813beea0 T rt_setgate +ffffffff813befb0 T rtdeletemsg +ffffffff813bf190 T rtlabel_id2sa +ffffffff813bf2b0 T rtrequest_delete +ffffffff813bf460 T rtflushclone1 +ffffffff813bf510 T rtflushclone +ffffffff813bf620 T rtlabel_name2id +ffffffff813bf7a0 T rt_mpls_set +ffffffff813bf870 T rt_getll +ffffffff813bf8e0 T rt_maskedcopy +ffffffff813bf980 T rt_ifa_add +ffffffff813bfb20 T rt_ifa_del +ffffffff813bfd90 T rt_ifa_addlocal +ffffffff813bfec0 T rt_ifa_dellocal +ffffffff813bfff0 T rt_ifa_purge +ffffffff813c0140 T rt_ifa_purge_walker +ffffffff813c0180 T rt_timer_init +ffffffff813c01d0 T rt_timer_queue_init +ffffffff813c0220 T rt_timer_queue_change +ffffffff813c0260 T rt_timer_queue_flush +ffffffff813c0480 T rt_timer_queue_count +ffffffff813c04b0 T rt_timer_get_expire +ffffffff813c0540 T rt_timer_add +ffffffff813c07b0 T rt_timer_timer +ffffffff813c0900 T rtlabel_id2name_locked +ffffffff813c09b0 T rtlabel_id2name +ffffffff813c0aa0 T rt_if_track +ffffffff813c0bf0 T rt_if_linkstate_change +ffffffff813c0d80 T rt_plentosa +ffffffff813c0e40 T db_print_sa +ffffffff813c0ef0 T db_print_ifa +ffffffff813c1150 T db_show_rtentry +ffffffff813c1370 T db_show_rtable ffffffff813c2000 T route_prinit ffffffff813c20a0 T rcb_ref ffffffff813c20c0 T rcb_unref @@ -9527,12 +9527,12 @@ ffffffff81437980 T ip_srcroute ffffffff81437ae0 T ip_stripoptions ffffffff81437b80 T ip_sysctl ffffffff81437ed0 T ip_sysctl_ipstat -ffffffff81438120 T ip_savecontrol -ffffffff81438350 T ip_send_do_dispatch -ffffffff81438430 T ip_send -ffffffff81438460 T ip_send_raw -ffffffff81438490 t ip_send_dispatch -ffffffff814384b0 t ip_sendraw_dispatch +ffffffff81438140 T ip_savecontrol +ffffffff81438370 T ip_send_do_dispatch +ffffffff81438450 T ip_send +ffffffff81438480 T ip_send_raw +ffffffff814384b0 t ip_send_dispatch +ffffffff814384d0 t ip_sendraw_dispatch ffffffff81439000 T mfc_find ffffffff814390d0 T ip_mrouter_set ffffffff81439240 T ip_mrouter_init @@ -10143,20857 +10143,20845 @@ ffffffff814ac000 T nfs_init_rtt ffffffff814ac0a0 T nfs_update_rtt ffffffff814ac130 T nfs_estimate_rto ffffffff814ac1e0 T nfs_connect -ffffffff814ac690 T nfs_disconnect -ffffffff814ac6f0 T nfs_sigintr -ffffffff814ac770 T nfs_reconnect -ffffffff814ac860 T nfs_send -ffffffff814ac970 T nfs_receive -ffffffff814acfb0 T nfs_sndlock -ffffffff814ad0f0 T nfs_sndunlock -ffffffff814ad170 T nfs_realign -ffffffff814ad1a0 T nfs_reply -ffffffff814ad4a0 T nfs_rcvlock -ffffffff814ad5e0 T nfs_rcvunlock -ffffffff814ad660 T nfs_request -ffffffff814adcd0 T nfs_msg -ffffffff814add40 T nfs_rephead -ffffffff814adf50 T nfs_timer -ffffffff814ae320 T nfs_realign_fixup -ffffffff814ae3f0 T nfs_getreq -ffffffff814ae840 T nfsrv_rcv -ffffffff814aeae0 T nfsrv_getstream -ffffffff814aee00 T nfsrv_wakenfsd -ffffffff814aeeb0 T nfsrv_dorec -ffffffff814af000 T nfsrv_cleanentry -ffffffff814af060 T nfsrv_initcache -ffffffff814af0e0 T nfsrv_getcache -ffffffff814af480 T nfsrv_lookupcache -ffffffff814af5a0 T nfsrv_updatecache -ffffffff814af6d0 T nfsrv_cleancache -ffffffff814b0000 T nfsm_reqhead -ffffffff814b0080 T nfs_get_xid -ffffffff814b00e0 T nfsm_rpchead -ffffffff814b0360 T nfsm_build -ffffffff814b0410 T nfsm_mbuftouio -ffffffff814b0600 T nfs_adv -ffffffff814b0680 T nfsm_uiotombuf -ffffffff814b07c0 T nfsm_buftombuf -ffffffff814b0830 T nfsm_strtombuf -ffffffff814b08c0 T nfsm_disct -ffffffff814b0a80 T nfs_init -ffffffff814b0b90 T nfs_vfs_init -ffffffff814b0c10 T nfs_loadattrcache -ffffffff814b10f0 T nfs_attrtimeo -ffffffff814b11b0 T nfs_getattrcache -ffffffff814b1380 T nfs_namei -ffffffff814b15f0 T nfsrv_fhtovp -ffffffff814b1790 T nfsm_adj -ffffffff814b18e0 T nfsm_srvwcc -ffffffff814b1a20 T nfsm_srvpostop_attr -ffffffff814b1b60 T nfsm_srvfattr -ffffffff814b1e00 T txdr_nfsv2time -ffffffff814b1e90 T netaddr_match -ffffffff814b1ee0 T nfs_clearcommit -ffffffff814b1f80 T nfs_merge_commit_ranges -ffffffff814b2020 T nfs_in_committed_range -ffffffff814b2090 T nfs_in_tobecommitted_range -ffffffff814b2100 T nfs_add_committed_range -ffffffff814b2190 T nfs_del_committed_range -ffffffff814b2220 T nfs_add_tobecommitted_range -ffffffff814b22b0 T nfs_del_tobecommitted_range -ffffffff814b2340 T nfsrv_errmap -ffffffff814b23c0 T nfsm_v3attrbuild -ffffffff814b29a0 T nfsm_fhtom -ffffffff814b2b40 T nfsm_srvfhtom -ffffffff814b2d30 T nfsm_srvsattr -ffffffff814b4000 T sys_nfssvc -ffffffff814b4200 T nfssvc_addsock -ffffffff814b4410 T nfssvc_nfsd -ffffffff814b49c0 T nfsrv_getslp -ffffffff814b4aa0 T nfsrv_zapsock -ffffffff814b4b60 T nfsrv_slpderef -ffffffff814b4be0 T nfsrv_init -ffffffff814b4db0 T nfssvc_iod -ffffffff814b51f0 T nfs_getset_niothreads -ffffffff814b6000 T nfs_mount -ffffffff814b61b0 T nfs_start -ffffffff814b61e0 T nfs_unmount -ffffffff814b6310 T nfs_root -ffffffff814b6380 T nfs_quotactl -ffffffff814b63b0 T nfs_statfs -ffffffff814b6710 T nfs_sync -ffffffff814b6800 T nfs_vget -ffffffff814b6830 T nfs_fhtovp -ffffffff814b6860 T nfs_vptofh -ffffffff814b6890 T nfs_sysctl -ffffffff814b69d0 T nfs_checkexp -ffffffff814b6a00 T nfs_fsinfo -ffffffff814b6c50 T nfs_mountroot -ffffffff814b6eb0 T nfs_mount_diskless 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drm_helper_probe_detect -ffffffff819734a0 T drm_helper_probe_single_connector_modes -ffffffff81973a20 t __drm_helper_update_and_validate -ffffffff81973dd0 T drm_kms_helper_hotplug_event -ffffffff81973e10 T drm_kms_helper_connector_hotplug_event -ffffffff81973e50 T drm_kms_helper_is_poll_worker -ffffffff81973e80 T drm_kms_helper_poll_disable -ffffffff81973f50 T drm_kms_helper_poll_init -ffffffff81973fb0 t output_poll_execute -ffffffff81974200 T drm_kms_helper_poll_fini -ffffffff81974250 T drm_connector_helper_hpd_irq_event -ffffffff81974310 t check_connector_changed -ffffffff819744e0 T drm_helper_hpd_irq_event -ffffffff81974630 T drm_crtc_helper_mode_valid_fixed -ffffffff81974680 T drm_connector_helper_get_modes_from_ddc -ffffffff81974710 T drm_connector_helper_get_modes_fixed -ffffffff81974880 T drm_connector_helper_get_modes -ffffffff819748f0 T drm_connector_helper_tv_get_modes -ffffffff81974b30 t __delayed_work_tick -ffffffff81975000 T drm_property_create -ffffffff819751f0 T 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drm_syncobj_reset_ioctl -ffffffff8197cec0 T drm_syncobj_signal_ioctl -ffffffff8197d020 T drm_syncobj_timeline_signal_ioctl -ffffffff8197d260 T drm_syncobj_query_ioctl -ffffffff8197d470 t drm_syncobj_array_wait_timeout -ffffffff8197d8d0 t syncobj_wait_fence_func -ffffffff8197d8f0 t syncobj_eventfd_entry_fence_func -ffffffff8197e000 T drm_vblank_count -ffffffff8197e090 T drm_crtc_accurate_vblank_count -ffffffff8197e1a0 t drm_update_vblank_count -ffffffff8197e5e0 T drm_vblank_disable_and_save -ffffffff8197e730 T drm_vblank_init -ffffffff8197e8b0 t vblank_disable_fn -ffffffff8197e930 t drm_vblank_init_release -ffffffff8197e9c0 T drm_dev_has_vblank -ffffffff8197e9f0 T drm_crtc_vblank_waitqueue -ffffffff8197ea40 T drm_calc_timestamping_constants -ffffffff8197ec60 T drm_crtc_vblank_helper_get_vblank_timestamp_internal -ffffffff8197f1b0 T drm_crtc_vblank_helper_get_vblank_timestamp -ffffffff8197f1d0 T drm_crtc_vblank_count -ffffffff8197f260 T drm_crtc_vblank_count_and_time -ffffffff8197f320 t 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hdmi_avi_infoframe_check -ffffffff819850c0 T hdmi_avi_infoframe_pack_only -ffffffff819852c0 T hdmi_avi_infoframe_pack -ffffffff81985320 T hdmi_spd_infoframe_init -ffffffff819853e0 T hdmi_spd_infoframe_check -ffffffff81985430 T hdmi_spd_infoframe_pack_only -ffffffff81985570 T hdmi_spd_infoframe_pack -ffffffff819856d0 T hdmi_audio_infoframe_init -ffffffff81985720 T hdmi_audio_infoframe_check -ffffffff81985770 T hdmi_audio_infoframe_pack_only -ffffffff819858d0 T hdmi_audio_infoframe_pack -ffffffff81985920 T hdmi_audio_infoframe_pack_for_dp -ffffffff81985a10 T hdmi_vendor_infoframe_init -ffffffff81985a70 T hdmi_vendor_infoframe_check -ffffffff81985b10 T hdmi_vendor_infoframe_pack_only -ffffffff81985cd0 T hdmi_vendor_infoframe_pack -ffffffff81985d70 T hdmi_drm_infoframe_init -ffffffff81985dd0 T hdmi_drm_infoframe_check -ffffffff81985e20 T hdmi_drm_infoframe_pack_only -ffffffff81986010 T hdmi_drm_infoframe_pack -ffffffff81986060 T hdmi_infoframe_check -ffffffff819861b0 T hdmi_infoframe_pack_only -ffffffff819863d0 T hdmi_infoframe_pack -ffffffff81986540 T hdmi_infoframe_log -ffffffff81987430 T hdmi_drm_infoframe_unpack_only -ffffffff81987510 T hdmi_infoframe_unpack -ffffffff81988000 T list_sort -ffffffff81989000 T radix_tree_lookup -ffffffff819890b0 T radix_tree_iter_find -ffffffff81989180 T radix_tree_delete -ffffffff81989310 T radix_tree_iter_delete -ffffffff81989330 T radix_tree_insert -ffffffff8198a000 T sort -ffffffff8198a040 t qsort -ffffffff8198c000 T drm_dp_dual_mode_read -ffffffff8198c110 T drm_dp_dual_mode_write -ffffffff8198c1f0 T drm_dp_dual_mode_detect -ffffffff8198c490 T drm_dp_dual_mode_max_tmds_clock -ffffffff8198c5b0 T drm_dp_dual_mode_get_tmds_output -ffffffff8198c6d0 T drm_dp_dual_mode_set_tmds_output -ffffffff8198c950 T drm_dp_get_dual_mode_type_name -ffffffff8198c9c0 T drm_lspcon_get_mode -ffffffff8198cbe0 T drm_lspcon_set_mode -ffffffff8198d000 T drm_dp_channel_eq_ok -ffffffff8198d080 T drm_dp_clock_recovery_ok -ffffffff8198d0f0 T drm_dp_get_adjust_request_voltage -ffffffff8198d130 T drm_dp_get_adjust_request_pre_emphasis -ffffffff8198d180 T drm_dp_get_adjust_tx_ffe_preset -ffffffff8198d1c0 T drm_dp_128b132b_lane_channel_eq_done -ffffffff8198d240 T drm_dp_128b132b_lane_symbol_locked -ffffffff8198d2b0 T drm_dp_128b132b_eq_interlane_align_done -ffffffff8198d2e0 T drm_dp_128b132b_cds_interlane_align_done -ffffffff8198d310 T drm_dp_128b132b_link_training_failed -ffffffff8198d340 T drm_dp_read_clock_recovery_delay -ffffffff8198d450 T drm_dp_read_channel_eq_delay -ffffffff8198d550 T drm_dp_128b132b_read_aux_rd_interval -ffffffff8198d600 T drm_dp_link_train_clock_recovery_delay -ffffffff8198d690 t __8b10b_clock_recovery_delay_us -ffffffff8198d710 T drm_dp_link_train_channel_eq_delay -ffffffff8198d780 T drm_dp_phy_name -ffffffff8198d7c0 T drm_dp_lttpr_link_train_clock_recovery_delay -ffffffff8198d7e0 T drm_dp_lttpr_link_train_channel_eq_delay -ffffffff8198d850 T drm_dp_link_rate_to_bw_code -ffffffff8198d8c0 T drm_dp_bw_code_to_link_rate -ffffffff8198d920 T drm_dp_dpcd_probe -ffffffff8198da60 t drm_dp_dpcd_access -ffffffff8198db90 T drm_dp_dpcd_read -ffffffff8198dcc0 T drm_dp_dpcd_write -ffffffff8198ddd0 T drm_dp_dpcd_read_link_status -ffffffff8198ddf0 T drm_dp_dpcd_read_phy_link_status -ffffffff8198def0 T drm_dp_downstream_is_type -ffffffff8198df40 T drm_dp_downstream_is_tmds -ffffffff8198dfb0 T drm_dp_send_real_edid_checksum -ffffffff8198e200 T drm_dp_read_dpcd_caps -ffffffff8198e390 T drm_dp_read_downstream_info -ffffffff8198e490 T drm_dp_downstream_max_dotclock -ffffffff8198e4e0 T drm_dp_downstream_max_tmds_clock -ffffffff8198e580 T drm_dp_downstream_min_tmds_clock -ffffffff8198e600 T drm_dp_downstream_max_bpc -ffffffff8198e6a0 T drm_dp_downstream_420_passthrough -ffffffff8198e700 T drm_dp_downstream_444_to_420_conversion -ffffffff8198e760 T drm_dp_downstream_rgb_to_ycbcr_conversion -ffffffff8198e7c0 T drm_dp_downstream_mode -ffffffff8198e850 T drm_dp_downstream_id -ffffffff8198e870 T drm_dp_downstream_debug -ffffffff8198e910 T drm_dp_subconnector_type -ffffffff8198e980 T drm_dp_set_subconnector_property -ffffffff8198e9f0 T drm_dp_read_sink_count_cap -ffffffff8198ea40 T drm_dp_read_sink_count -ffffffff8198eaa0 T drm_dp_remote_aux_init -ffffffff8198ead0 t drm_dp_aux_crc_work -ffffffff8198ec40 T drm_dp_aux_init -ffffffff8198ecf0 T drm_dp_aux_register -ffffffff8198ee10 T drm_dp_aux_unregister -ffffffff8198ee40 T drm_dp_psr_setup_time -ffffffff8198ee90 T drm_dp_start_crc -ffffffff8198ef40 T drm_dp_stop_crc -ffffffff8198efd0 T drm_dp_read_desc -ffffffff8198f190 T drm_dp_dsc_sink_max_slice_count -ffffffff8198f220 T drm_dp_dsc_sink_line_buf_depth -ffffffff8198f260 T drm_dp_dsc_sink_supported_input_bpcs -ffffffff8198f2d0 T drm_dp_read_lttpr_common_caps -ffffffff8198f390 T drm_dp_read_lttpr_phy_caps -ffffffff8198f450 T drm_dp_lttpr_count -ffffffff8198f4e0 T drm_dp_lttpr_max_link_rate -ffffffff8198f540 T drm_dp_lttpr_max_lane_count -ffffffff8198f570 T drm_dp_lttpr_voltage_swing_level_3_supported -ffffffff8198f5a0 T drm_dp_lttpr_pre_emphasis_level_3_supported -ffffffff8198f5d0 T drm_dp_get_phy_test_pattern -ffffffff8198f6f0 T drm_dp_set_phy_test_pattern -ffffffff8198f7b0 T drm_dp_vsc_sdp_log -ffffffff8198fad0 T drm_dp_get_pcon_max_frl_bw -ffffffff8198fb20 T drm_dp_pcon_frl_prepare -ffffffff8198fb70 T drm_dp_pcon_is_frl_ready -ffffffff8198fbd0 T drm_dp_pcon_frl_configure_1 -ffffffff8198fcd0 T drm_dp_pcon_frl_configure_2 -ffffffff8198fd30 T drm_dp_pcon_reset_frl_config -ffffffff8198fd80 T drm_dp_pcon_frl_enable -ffffffff8198fe40 T drm_dp_pcon_hdmi_link_active -ffffffff8198fe90 T drm_dp_pcon_hdmi_link_mode -ffffffff8198ff00 T drm_dp_pcon_hdmi_frl_link_error_count -ffffffff8198fff0 T drm_dp_pcon_enc_is_dsc_1_2 -ffffffff81990020 T drm_dp_pcon_dsc_max_slices -ffffffff819900b0 T drm_dp_pcon_dsc_max_slice_width -ffffffff819900e0 T drm_dp_pcon_dsc_bpp_incr -ffffffff81990120 T drm_dp_pcon_pps_default -ffffffff819901a0 T drm_dp_pcon_pps_override_buf -ffffffff81990240 T drm_dp_pcon_pps_override_param -ffffffff81990310 T drm_dp_pcon_convert_rgb_to_ycbcr -ffffffff819903b0 T drm_edp_backlight_set_level -ffffffff81990480 T drm_edp_backlight_enable -ffffffff81990690 t drm_edp_backlight_set_enable -ffffffff819907c0 T drm_edp_backlight_disable -ffffffff81990800 T drm_edp_backlight_init -ffffffff81990d60 T drm_panel_dp_aux_backlight -ffffffff81990ef0 t __128b132b_channel_eq_delay_us -ffffffff81990f70 t __8b10b_channel_eq_delay_us -ffffffff81990ff0 t drm_dp_aux_get_crc -ffffffff819910d0 t drm_dp_i2c_xfer -ffffffff81991340 t drm_dp_i2c_functionality -ffffffff81991370 t drm_dp_i2c_do_msg -ffffffff81991740 t lock_bus -ffffffff81991760 t trylock_bus -ffffffff819917b0 t unlock_bus -ffffffff819917d0 t dp_aux_backlight_update_status -ffffffff81992000 T drm_dp_encode_sideband_req -ffffffff81992440 T drm_dp_decode_sideband_req -ffffffff81992970 T drm_dp_dump_sideband_msg_req_body -ffffffff81992d40 T drm_dp_mst_get_port_malloc -ffffffff81992d90 T drm_dp_mst_put_port_malloc -ffffffff81992e80 t kref_put -ffffffff81992ec0 T drm_atomic_get_mst_payload_state -ffffffff81992f10 T drm_dp_mst_dpcd_read -ffffffff819931d0 T drm_dp_mst_dpcd_write -ffffffff81993220 t drm_dp_send_dpcd_write -ffffffff81993460 T drm_dp_mst_connector_late_register -ffffffff819934e0 T drm_dp_mst_connector_early_unregister -ffffffff81993520 T drm_dp_send_power_updown_phy -ffffffff81993760 t drm_dp_mst_topology_put_port -ffffffff81993880 t drm_dp_mst_wait_tx_reply -ffffffff81993c20 T drm_dp_send_query_stream_enc_status -ffffffff81993ee0 T drm_dp_add_payload_part1 -ffffffff81994090 T drm_dp_remove_payload -ffffffff81994230 T drm_dp_add_payload_part2 -ffffffff819943e0 T drm_dp_get_vc_payload_bw -ffffffff81994480 T drm_dp_read_mst_cap -ffffffff819944e0 T drm_dp_mst_topology_mgr_set_mst -ffffffff81994790 t drm_dp_dpcd_write_payload -ffffffff81994930 t drm_dp_mst_topology_put_mstb -ffffffff81994a30 T drm_dp_mst_topology_mgr_suspend -ffffffff81994af0 t drm_dp_mst_topology_mgr_invalidate_mstb -ffffffff81994b60 T drm_dp_mst_topology_mgr_resume -ffffffff81994da0 T drm_dp_mst_hpd_irq_handle_event -ffffffff81995d10 T drm_dp_mst_hpd_irq_send_new_request -ffffffff81995d90 T drm_dp_mst_detect_port -ffffffff81995ef0 T drm_dp_mst_edid_read -ffffffff81995ff0 T drm_dp_mst_get_edid -ffffffff81996050 T drm_dp_atomic_find_time_slots -ffffffff81996300 T drm_atomic_get_mst_topology_state -ffffffff81996310 T drm_dp_atomic_release_time_slots -ffffffff81996520 T drm_dp_mst_atomic_setup_commit -ffffffff819966b0 T drm_dp_mst_atomic_wait_for_dependencies -ffffffff81996820 T drm_dp_mst_root_conn_atomic_check -ffffffff81996940 T drm_dp_mst_update_slots -ffffffff819969a0 T drm_dp_check_act_status -ffffffff81996b30 T drm_dp_calc_pbn_mode -ffffffff81996b90 T drm_dp_mst_dump_topology -ffffffff81996e10 t drm_dp_mst_dump_mstb -ffffffff81996e80 T drm_dp_mst_add_affected_dsc_crtcs -ffffffff81996fb0 T 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gfx_v10_0_rlc_start -ffffffff81e06f50 t gfx_v10_0_update_spm_vmid -ffffffff81e06f90 t gfx_v10_0_wait_for_rlc_autoload_complete -ffffffff81e078b0 t gfx_v10_0_init_csb -ffffffff81e07b90 t gfx_v10_0_update_spm_vmid_internal -ffffffff81e07cb0 t gfx_v10_0_rlc_backdoor_autoload_config_mec_cache -ffffffff81e07f80 t gfx_v10_0_is_rlcg_access_range -ffffffff81e07fb0 t gfx_v10_0_gfx_mqd_init -ffffffff81e083a0 t gfx_v10_0_compute_mqd_init -ffffffff81e08850 t gfx_v10_0_mec_init -ffffffff81e08a60 t gfx_v10_0_compute_ring_init -ffffffff81e08ba0 t gfx_v10_0_rlc_backdoor_autoload_buffer_init -ffffffff81e08e00 t gfx_v10_0_gpu_early_init -ffffffff81e09060 t amdgpu_bo_unreserve -ffffffff81e09140 t gfx_v10_0_cp_resume -ffffffff81e0bb20 t gfx_v10_3_get_disabled_sa -ffffffff81e0bc40 t gfx_v10_0_get_rb_active_bitmap -ffffffff81e0bd70 t gfx_v10_0_get_wgp_active_bitmap_per_sh -ffffffff81e0be80 t gfx_v10_0_enable_gui_idle_interrupt -ffffffff81e0bf90 t gfx_v10_0_cp_gfx_enable -ffffffff81e0c200 t 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gfx_v11_0_ring_emit_patch_cond_exec -ffffffff81e1b8b0 t gfx_v11_0_ring_emit_cntxcntl -ffffffff81e1ba10 t gfx_v11_0_ring_emit_gfx_shadow -ffffffff81e1bdd0 t gfx_v11_0_ring_emit_frame_cntl -ffffffff81e1bee0 t gfx_v11_0_ring_soft_recovery -ffffffff81e1bf50 t gfx_v11_0_ring_preempt_ib -ffffffff81e1c0c0 t gfx_v11_0_emit_mem_sync -ffffffff81e1c3f0 t gfx_v11_0_write_data_to_reg -ffffffff81e1c600 t gfx_v11_0_set_eop_interrupt_state -ffffffff81e1c690 t gfx_v11_0_eop_irq -ffffffff81e1c840 t gfx_v11_0_set_gfx_eop_interrupt_state -ffffffff81e1c9e0 t gfx_v11_0_set_compute_eop_interrupt_state -ffffffff81e1cb70 t gfx_v11_0_set_priv_reg_fault_state -ffffffff81e1ccb0 t gfx_v11_0_priv_reg_irq -ffffffff81e1cd10 t gfx_v11_0_handle_priv_fault -ffffffff81e1ce70 t gfx_v11_0_set_priv_inst_fault_state -ffffffff81e1cfb0 t gfx_v11_0_priv_inst_irq -ffffffff81e1d010 t gfx_v11_0_rlc_gc_fed_irq -ffffffff81e1d060 t gfx_v11_0_is_rlc_enabled -ffffffff81e1d0f0 t gfx_v11_0_set_safe_mode -ffffffff81e1d250 t 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gfx_v9_0_update_medium_grain_clock_gating -ffffffff81e48f60 t gfx_v9_0_update_3d_clock_gating -ffffffff81e49350 t gfx_v9_0_update_coarse_grain_clock_gating -ffffffff81e4a000 t gfx_v9_4_query_ras_error_count -ffffffff81e4ae00 t gfx_v9_4_query_ras_error_status -ffffffff81e4afd0 t gfx_v9_4_reset_ras_error_count -ffffffff81e4c000 T gfx_v9_4_2_do_edc_gpr_workarounds -ffffffff81e4c720 T gfx_v9_4_2_init_golden_registers -ffffffff81e4c7b0 T gfx_v9_4_2_debug_trap_config_init -ffffffff81e4c890 T gfx_v9_4_2_set_power_brake_sequence -ffffffff81e4ca70 t gfx_v9_4_2_query_ras_error_count -ffffffff81e4cb20 t gfx_v9_4_2_query_ras_error_status -ffffffff81e4d380 t gfx_v9_4_2_reset_ras_error_count -ffffffff81e4d3e0 t gfx_v9_4_2_reset_ras_error_status -ffffffff81e4d8b0 t gfx_v9_4_2_enable_watchdog_timer -ffffffff81e4dad0 t gfx_v9_4_2_query_uctl2_poison_status -ffffffff81e4db50 t gfx_v9_4_2_run_shader -ffffffff81e4df50 t gfx_v9_4_2_wait_for_waves_assigned -ffffffff81e4e5a0 t gfx_v9_4_2_query_sram_edc_count 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Xrecurse_ioapic_edge28 +ffffffff815d55c0 T Xresume_ioapic_edge28 +ffffffff815d55f0 T Xintr_ioapic_edge28_untramp +ffffffff815d5810 T Xrecurse_ioapic_edge29 +ffffffff815d5890 T Xresume_ioapic_edge29 +ffffffff815d58c0 T Xintr_ioapic_edge29_untramp +ffffffff815d5ae0 T Xrecurse_ioapic_edge30 +ffffffff815d5b60 T Xresume_ioapic_edge30 +ffffffff815d5b90 T Xintr_ioapic_edge30_untramp +ffffffff815d5db0 T Xrecurse_ioapic_edge31 +ffffffff815d5e30 T Xresume_ioapic_edge31 +ffffffff815d5e60 T Xintr_ioapic_edge31_untramp +ffffffff815d6090 T Xrecurse_ioapic_edge32 +ffffffff815d6110 T Xresume_ioapic_edge32 +ffffffff815d6140 T Xintr_ioapic_edge32_untramp +ffffffff815d6370 T Xrecurse_ioapic_edge33 +ffffffff815d63f0 T Xresume_ioapic_edge33 +ffffffff815d6420 T Xintr_ioapic_edge33_untramp +ffffffff815d6650 T Xrecurse_ioapic_edge34 +ffffffff815d66d0 T Xresume_ioapic_edge34 +ffffffff815d6700 T Xintr_ioapic_edge34_untramp +ffffffff815d6930 T Xrecurse_ioapic_edge35 +ffffffff815d69b0 T Xresume_ioapic_edge35 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Xrecurse_ioapic_edge43 +ffffffff815d80b0 T Xresume_ioapic_edge43 +ffffffff815d80e0 T Xintr_ioapic_edge43_untramp +ffffffff815d8310 T Xrecurse_ioapic_edge44 +ffffffff815d8390 T Xresume_ioapic_edge44 +ffffffff815d83c0 T Xintr_ioapic_edge44_untramp +ffffffff815d85f0 T Xrecurse_ioapic_edge45 +ffffffff815d8670 T Xresume_ioapic_edge45 +ffffffff815d86a0 T Xintr_ioapic_edge45_untramp +ffffffff815d88d0 T Xrecurse_ioapic_edge46 +ffffffff815d8950 T Xresume_ioapic_edge46 +ffffffff815d8980 T Xintr_ioapic_edge46_untramp +ffffffff815d8bb0 T Xrecurse_ioapic_edge47 +ffffffff815d8c30 T Xresume_ioapic_edge47 +ffffffff815d8c60 T Xintr_ioapic_edge47_untramp +ffffffff815d8e90 T Xrecurse_ioapic_edge48 +ffffffff815d8f10 T Xresume_ioapic_edge48 +ffffffff815d8f40 T Xintr_ioapic_edge48_untramp +ffffffff815d9170 T Xrecurse_ioapic_edge49 +ffffffff815d91f0 T Xresume_ioapic_edge49 +ffffffff815d9220 T Xintr_ioapic_edge49_untramp +ffffffff815d9450 T Xrecurse_ioapic_edge50 +ffffffff815d94d0 T Xresume_ioapic_edge50 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Xrecurse_ioapic_edge58 +ffffffff815dabd0 T Xresume_ioapic_edge58 +ffffffff815dac00 T Xintr_ioapic_edge58_untramp +ffffffff815dae30 T Xrecurse_ioapic_edge59 +ffffffff815daeb0 T Xresume_ioapic_edge59 +ffffffff815daee0 T Xintr_ioapic_edge59_untramp +ffffffff815db110 T Xrecurse_ioapic_edge60 +ffffffff815db190 T Xresume_ioapic_edge60 +ffffffff815db1c0 T Xintr_ioapic_edge60_untramp +ffffffff815db3f0 T Xrecurse_ioapic_edge61 +ffffffff815db470 T Xresume_ioapic_edge61 +ffffffff815db4a0 T Xintr_ioapic_edge61_untramp +ffffffff815db6d0 T Xrecurse_ioapic_edge62 +ffffffff815db750 T Xresume_ioapic_edge62 +ffffffff815db780 T Xintr_ioapic_edge62_untramp +ffffffff815db9b0 T Xrecurse_ioapic_edge63 +ffffffff815dba30 T Xresume_ioapic_edge63 +ffffffff815dba60 T Xintr_ioapic_edge63_untramp +ffffffff815dbc90 T Xrecurse_ioapic_level0 +ffffffff815dbd10 T Xresume_ioapic_level0 +ffffffff815dbd40 T Xintr_ioapic_level0_untramp +ffffffff815dc050 T Xrecurse_ioapic_level1 +ffffffff815dc0d0 T Xresume_ioapic_level1 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Xrecurse_ioapic_level9 +ffffffff815dded0 T Xresume_ioapic_level9 +ffffffff815ddf00 T Xintr_ioapic_level9_untramp +ffffffff815de210 T Xrecurse_ioapic_level10 +ffffffff815de290 T Xresume_ioapic_level10 +ffffffff815de2c0 T Xintr_ioapic_level10_untramp +ffffffff815de5d0 T Xrecurse_ioapic_level11 +ffffffff815de650 T Xresume_ioapic_level11 +ffffffff815de680 T Xintr_ioapic_level11_untramp +ffffffff815de990 T Xrecurse_ioapic_level12 +ffffffff815dea10 T Xresume_ioapic_level12 +ffffffff815dea40 T Xintr_ioapic_level12_untramp +ffffffff815ded50 T Xrecurse_ioapic_level13 +ffffffff815dedd0 T Xresume_ioapic_level13 +ffffffff815dee00 T Xintr_ioapic_level13_untramp +ffffffff815df110 T Xrecurse_ioapic_level14 +ffffffff815df190 T Xresume_ioapic_level14 +ffffffff815df1c0 T Xintr_ioapic_level14_untramp +ffffffff815df4d0 T Xrecurse_ioapic_level15 +ffffffff815df550 T Xresume_ioapic_level15 +ffffffff815df580 T Xintr_ioapic_level15_untramp +ffffffff815df890 T Xrecurse_ioapic_level16 +ffffffff815df910 T Xresume_ioapic_level16 +ffffffff815df940 T Xintr_ioapic_level16_untramp +ffffffff815dfc50 T Xrecurse_ioapic_level17 +ffffffff815dfcd0 T Xresume_ioapic_level17 +ffffffff815dfd00 T Xintr_ioapic_level17_untramp +ffffffff815e0010 T Xrecurse_ioapic_level18 +ffffffff815e0090 T Xresume_ioapic_level18 +ffffffff815e00c0 T Xintr_ioapic_level18_untramp +ffffffff815e03d0 T Xrecurse_ioapic_level19 +ffffffff815e0450 T Xresume_ioapic_level19 +ffffffff815e0480 T Xintr_ioapic_level19_untramp +ffffffff815e0790 T Xrecurse_ioapic_level20 +ffffffff815e0810 T Xresume_ioapic_level20 +ffffffff815e0840 T Xintr_ioapic_level20_untramp +ffffffff815e0b50 T Xrecurse_ioapic_level21 +ffffffff815e0bd0 T Xresume_ioapic_level21 +ffffffff815e0c00 T Xintr_ioapic_level21_untramp +ffffffff815e0f10 T Xrecurse_ioapic_level22 +ffffffff815e0f90 T Xresume_ioapic_level22 +ffffffff815e0fc0 T Xintr_ioapic_level22_untramp +ffffffff815e12d0 T Xrecurse_ioapic_level23 +ffffffff815e1350 T Xresume_ioapic_level23 +ffffffff815e1380 T Xintr_ioapic_level23_untramp +ffffffff815e1690 T Xrecurse_ioapic_level24 +ffffffff815e1710 T Xresume_ioapic_level24 +ffffffff815e1740 T Xintr_ioapic_level24_untramp +ffffffff815e1a50 T Xrecurse_ioapic_level25 +ffffffff815e1ad0 T Xresume_ioapic_level25 +ffffffff815e1b00 T Xintr_ioapic_level25_untramp +ffffffff815e1e10 T Xrecurse_ioapic_level26 +ffffffff815e1e90 T Xresume_ioapic_level26 +ffffffff815e1ec0 T Xintr_ioapic_level26_untramp +ffffffff815e21d0 T Xrecurse_ioapic_level27 +ffffffff815e2250 T Xresume_ioapic_level27 +ffffffff815e2280 T Xintr_ioapic_level27_untramp +ffffffff815e2590 T Xrecurse_ioapic_level28 +ffffffff815e2610 T Xresume_ioapic_level28 +ffffffff815e2640 T Xintr_ioapic_level28_untramp +ffffffff815e2950 T Xrecurse_ioapic_level29 +ffffffff815e29d0 T Xresume_ioapic_level29 +ffffffff815e2a00 T Xintr_ioapic_level29_untramp +ffffffff815e2d10 T Xrecurse_ioapic_level30 +ffffffff815e2d90 T Xresume_ioapic_level30 +ffffffff815e2dc0 T Xintr_ioapic_level30_untramp +ffffffff815e30d0 T Xrecurse_ioapic_level31 +ffffffff815e3150 T Xresume_ioapic_level31 +ffffffff815e3180 T Xintr_ioapic_level31_untramp +ffffffff815e3490 T Xrecurse_ioapic_level32 +ffffffff815e3510 T Xresume_ioapic_level32 +ffffffff815e3540 T Xintr_ioapic_level32_untramp +ffffffff815e3850 T Xrecurse_ioapic_level33 +ffffffff815e38d0 T Xresume_ioapic_level33 +ffffffff815e3900 T Xintr_ioapic_level33_untramp +ffffffff815e3c10 T Xrecurse_ioapic_level34 +ffffffff815e3c90 T Xresume_ioapic_level34 +ffffffff815e3cc0 T Xintr_ioapic_level34_untramp +ffffffff815e3fd0 T Xrecurse_ioapic_level35 +ffffffff815e4050 T Xresume_ioapic_level35 +ffffffff815e4080 T Xintr_ioapic_level35_untramp +ffffffff815e4390 T Xrecurse_ioapic_level36 +ffffffff815e4410 T Xresume_ioapic_level36 +ffffffff815e4440 T Xintr_ioapic_level36_untramp +ffffffff815e4750 T Xrecurse_ioapic_level37 +ffffffff815e47d0 T Xresume_ioapic_level37 +ffffffff815e4800 T Xintr_ioapic_level37_untramp +ffffffff815e4b10 T Xrecurse_ioapic_level38 +ffffffff815e4b90 T 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Xrecurse_ioapic_level53 +ffffffff815e83d0 T Xresume_ioapic_level53 +ffffffff815e8400 T Xintr_ioapic_level53_untramp +ffffffff815e8710 T Xrecurse_ioapic_level54 +ffffffff815e8790 T Xresume_ioapic_level54 +ffffffff815e87c0 T Xintr_ioapic_level54_untramp +ffffffff815e8ad0 T Xrecurse_ioapic_level55 +ffffffff815e8b50 T Xresume_ioapic_level55 +ffffffff815e8b80 T Xintr_ioapic_level55_untramp +ffffffff815e8e90 T Xrecurse_ioapic_level56 +ffffffff815e8f10 T Xresume_ioapic_level56 +ffffffff815e8f40 T Xintr_ioapic_level56_untramp +ffffffff815e9250 T Xrecurse_ioapic_level57 +ffffffff815e92d0 T Xresume_ioapic_level57 +ffffffff815e9300 T Xintr_ioapic_level57_untramp +ffffffff815e9610 T Xrecurse_ioapic_level58 +ffffffff815e9690 T Xresume_ioapic_level58 +ffffffff815e96c0 T Xintr_ioapic_level58_untramp +ffffffff815e99d0 T Xrecurse_ioapic_level59 +ffffffff815e9a50 T Xresume_ioapic_level59 +ffffffff815e9a80 T Xintr_ioapic_level59_untramp +ffffffff815e9d90 T Xrecurse_ioapic_level60 +ffffffff815e9e10 T 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auvia_waitvalid_codec +ffffffff816f57b0 T auvia_set_params_sub +ffffffff816f5920 T auvia_build_dma_ops +ffffffff816f6000 T gdt_pci_probe +ffffffff816f6080 T gdt_pci_attach +ffffffff816f6960 T gdt_pci_copy_cmd +ffffffff816f6990 T gdt_pci_get_status +ffffffff816f69c0 T gdt_pci_intr +ffffffff816f69f0 T gdt_pci_release_event +ffffffff816f6a20 T gdt_pci_set_sema0 +ffffffff816f6a50 T gdt_pci_test_busy +ffffffff816f6a80 T gdt_pcinew_copy_cmd +ffffffff816f6ab0 T gdt_pcinew_get_status +ffffffff816f6ae0 T gdt_pcinew_intr +ffffffff816f6b10 T gdt_pcinew_release_event +ffffffff816f6b40 T gdt_pcinew_set_sema0 +ffffffff816f6b70 T gdt_pcinew_test_busy +ffffffff816f6ba0 T gdt_mpr_copy_cmd +ffffffff816f6c80 T gdt_mpr_get_status +ffffffff816f6ca0 T gdt_mpr_intr +ffffffff816f6da0 T gdt_mpr_release_event +ffffffff816f6de0 T gdt_mpr_set_sema0 +ffffffff816f6e10 T gdt_mpr_test_busy +ffffffff816f6e60 T gdt_pci_enable_intr +ffffffff816f7000 T ciss_pci_match +ffffffff816f7030 T ciss_pci_attach +ffffffff816f7410 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T qle_get_loop_id +ffffffff816fd220 T qle_get_port_db +ffffffff816fd300 T qle_get_port_name_list +ffffffff816fd560 T qle_add_loop_port +ffffffff816fd7e0 T qle_add_fabric_port +ffffffff816fd9a0 T qle_add_logged_in_port +ffffffff816fdbf0 T qle_handle_resp +ffffffff816fdfa0 T qle_dump_iocb +ffffffff816fdfd0 T qle_async +ffffffff816fe1f0 T qle_read +ffffffff816fe240 T qle_write +ffffffff816fe290 T qle_clear_isr +ffffffff816fe2e0 T qle_put_marker +ffffffff816fe320 T qle_put_cmd +ffffffff816fe670 T qle_write_mbox +ffffffff816fe6c0 T qle_set_ints +ffffffff816fe720 T qle_update_done +ffffffff816fe750 T qle_update_cancel +ffffffff816fe7a0 T qle_update_start +ffffffff816fe7f0 T qle_update_defer +ffffffff816fe840 T qle_clear_port_lists +ffffffff816fe9a0 T qle_update_topology +ffffffff816fea80 T qle_update_fabric +ffffffff816feb90 T qle_ct_pass_through +ffffffff816fee80 T qle_sge +ffffffff816feec0 T qle_next_fabric_port +ffffffff816ff030 T qle_fabric_plogx +ffffffff816ff2c0 T qle_fabric_plogi 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mpii_board_info +ffffffff817030f0 T mpii_portfacts +ffffffff81703220 T mpii_target_map +ffffffff81703310 T mpii_cfg_coalescing +ffffffff817033e0 T mpii_eventnotify +ffffffff817035b0 T mpii_portenable +ffffffff817036a0 T mpii_intr +ffffffff81703af0 T mpii_ioctl +ffffffff81703c00 T mpii_create_sensors +ffffffff81703d90 T mpii_dmamem_free +ffffffff81703e20 T mpii_get_ccb +ffffffff81703eb0 T mpii_reply +ffffffff81703f80 T mpii_event_process +ffffffff81704230 T mpii_load_xs_sas3 +ffffffff817043d0 T mpii_load_xs +ffffffff817045c0 T mpii_req_cfg_header +ffffffff81704780 T mpii_req_cfg_page +ffffffff817049d0 T mpii_wait_ne +ffffffff81704ae0 T mpii_reset_soft +ffffffff81704d10 T mpii_reset_hard +ffffffff81704ff0 T mpii_handshake_send +ffffffff817053f0 T mpii_handshake_recv_dword +ffffffff817056a0 T mpii_handshake_recv +ffffffff81705900 T mpii_empty_done +ffffffff81705930 T mpii_push_reply +ffffffff817059b0 T mpii_poll +ffffffff81705b90 T mpii_eventack +ffffffff81705d80 T mpii_eventack_done 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aq_hw_reset +ffffffff8170c2c0 T aq_init_rss +ffffffff8170c630 T aq_hw_init +ffffffff8170c940 T aq_ifmedia_change +ffffffff8170ca30 T aq_ifmedia_status +ffffffff8170cb30 T aq_ioctl +ffffffff8170cd70 T aq_start +ffffffff8170d0c0 T aq_watchdog +ffffffff8170d0f0 T aq_set_linkmode +ffffffff8170d120 T aq_refill +ffffffff8170d190 T aq_intr_queue +ffffffff8170d270 T aq_enable_intr +ffffffff8170d390 T aq1_fw_read_version +ffffffff8170d430 T aq1_mac_soft_reset +ffffffff8170d460 T aq1_fw_version_init +ffffffff8170d5e0 T aq1_hw_init_ucp +ffffffff8170d760 T aq1_mac_soft_reset_rbl +ffffffff8170da00 T aq1_global_software_reset +ffffffff8170db20 T aq1_mac_soft_reset_flb +ffffffff8170ded0 T aq2_interface_buffer_read +ffffffff8170e010 T aq1_fw_downld_dwords +ffffffff8170e330 T aq_hw_l3_filter_set +ffffffff8170e540 T aq_hw_init_tx_path +ffffffff8170e7b0 T aq_hw_init_rx_path +ffffffff8170efc0 T aq_set_mac_addr +ffffffff8170f1d0 T aq_hw_qos_set +ffffffff8170f8c0 T aq2_filter_art_set +ffffffff8170fa70 T aq_get_linkmode +ffffffff8170fae0 T aq_txring_reset +ffffffff8170fe90 T aq_rxring_reset +ffffffff81710390 T aq_rx_fill +ffffffff817105a0 T aq_rxeof +ffffffff81710920 T aq_txeof +ffffffff81710b00 T aq_update_link_status +ffffffff81710ba0 T aq_free_slots +ffffffff81710c40 T aq_queue_up +ffffffff81711020 T aq_dmamem_alloc +ffffffff81711170 T aq_dmamem_free +ffffffff817111e0 T aq_queue_down +ffffffff81711490 T aq_invalidate_rx_desc_cache +ffffffff81711510 T aq_up +ffffffff81711930 T aq_down +ffffffff81711a90 T aq_rxrinfo +ffffffff81711b80 T aq_iff +ffffffff81712000 T tulip_probe +ffffffff81712060 T tulip_attach +ffffffff81712a80 T tulip_timeout_callback +ffffffff81712ad0 T tulip_timeout +ffffffff81712b40 T tulip_txprobe +ffffffff81712c80 T tulip_txput +ffffffff817131f0 T tulip_media_set +ffffffff817137f0 T tulip_reset +ffffffff81713bb0 T tulip_mii_autonegotiate +ffffffff81713eb0 T tulip_mii_readreg +ffffffff81714060 T tulip_mii_writereg +ffffffff81714220 T tulip_linkup +ffffffff817142f0 T tulip_init +ffffffff81714470 T tulip_media_print +ffffffff817144c0 T tulip_media_link_monitor +ffffffff817146f0 T tulip_mii_map_abilities +ffffffff81714780 T tulip_media_poll +ffffffff81714c60 T tulip_mii_phy_readspecific +ffffffff81714e20 T tulip_media_select +ffffffff81714f30 T tulip_21040_mediainfo_init +ffffffff81715030 T tulip_21040_media_probe +ffffffff81715120 T tulip_21040_10baset_only_media_probe +ffffffff817151e0 T tulip_21040_10baset_only_media_select +ffffffff81715240 T tulip_21040_auibnc_only_media_probe +ffffffff817152d0 T tulip_21040_auibnc_only_media_select +ffffffff81715320 T tulip_21041_mediainfo_init +ffffffff817153e0 T tulip_21041_media_probe +ffffffff817154c0 T tulip_21041_media_poll +ffffffff817157f0 T tulip_mii_get_phyaddr +ffffffff817158b0 T tulip_2114x_media_preset +ffffffff81715ad0 T tulip_null_media_poll +ffffffff81715b00 T tulip_21140_mediainit +ffffffff81715b50 T tulip_21140_evalboard_media_probe +ffffffff81715d30 T tulip_21140_accton_media_probe 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serverworks_chip_map +ffffffff8172b280 T svwsata_chip_map +ffffffff8172b650 T nforce_chip_map +ffffffff8172bac0 T ite_chip_map +ffffffff8172bd80 T jmicron_chip_map +ffffffff8172c190 T phison_chip_map +ffffffff8172c4f0 T rdc_chip_map +ffffffff8172c980 T pciide_match +ffffffff8172ca20 T pciide_attach +ffffffff8172cb00 T pciide_detach +ffffffff8172cb60 T pciide_activate +ffffffff8172d290 T pciide_lookup_product +ffffffff8172d540 T pciide_dmacmd_read +ffffffff8172d570 T pciide_dmacmd_write +ffffffff8172d5a0 T pciide_dmactl_read +ffffffff8172d5d0 T pciide_dmactl_write +ffffffff8172d600 T pciide_dmatbl_write +ffffffff8172d630 T pciide_mapregs_compat +ffffffff8172d7b0 T pciide_unmapregs_compat +ffffffff8172d840 T pciide_mapregs_native +ffffffff8172db30 T pciide_unmapregs_native +ffffffff8172dbc0 T pciide_mapreg_dma +ffffffff8172dd50 T pciide_dma_init +ffffffff8172dff0 T pciide_dma_start +ffffffff8172e070 T pciide_dma_finish +ffffffff8172e240 T pciide_unmapreg_dma +ffffffff8172e270 T pciide_intr_flag +ffffffff8172e480 T pciide_compat_intr +ffffffff8172e500 T pciide_pci_intr +ffffffff8172e5c0 T pciide_channel_dma_setup +ffffffff8172e690 T pciide_dma_table_setup +ffffffff8172e8e0 T pciide_irqack +ffffffff8172e930 T pciide_chansetup +ffffffff8172ea10 T pciide_chanfree +ffffffff8172ea60 T pciide_mapchan +ffffffff8172eaf0 T pciide_unmap_chan +ffffffff8172ebc0 T pciide_chan_candisable +ffffffff8172ec30 T pciide_map_compat_intr +ffffffff8172ece0 T pciide_unmap_compat_intr +ffffffff8172ed40 T pciide_print_channels +ffffffff8172ee10 T pciide_print_modes +ffffffff8172ee20 T default_chip_unmap +ffffffff8172ef00 T sata_setup_channel +ffffffff8172f020 T piix_timing_debug +ffffffff8172f050 T piix_setup_channel +ffffffff8172f540 T piix3_4_setup_channel +ffffffff8172fd40 T piix_setup_idetim_timings +ffffffff8172fdb0 T piix_setup_idetim_drvs +ffffffff8172fec0 T piix_setup_sidetim_timings +ffffffff8172ff30 T amd756_setup_channel +ffffffff817302e0 T apollo_setup_channel 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ns_scx200_setup_channel +ffffffff817338b0 T acer_dma_init +ffffffff817338f0 T acer_setup_channel +ffffffff81733d00 T acer_pci_intr +ffffffff81733de0 T hpt_setup_channel +ffffffff81734130 T hpt_pci_intr +ffffffff81734240 T pdc268_config_read +ffffffff817342b0 T pdc20268_setup_channel +ffffffff81734480 T pdc202xx_setup_channel +ffffffff817348d0 T pdc20262_dma_start +ffffffff81734a30 T pdc20262_dma_finish +ffffffff81734b00 T pdc20265_pci_intr +ffffffff81734cb0 T pdc202xx_pci_intr +ffffffff81734dc0 T pdc203xx_pci_intr +ffffffff81734eb0 T pdc205xx_pci_intr +ffffffff81734fe0 T pdc203xx_irqack +ffffffff81735070 T pdc203xx_setup_channel +ffffffff81735170 T pdc205xx_do_reset +ffffffff81735210 T pdc205xx_drv_probe +ffffffff81735490 T pdc203xx_dma_start +ffffffff81735550 T pdc203xx_dma_finish +ffffffff81735640 T serverworks_setup_channel +ffffffff81735a50 T serverworks_pci_intr +ffffffff81735b60 T svwsata_mapreg_dma +ffffffff81735c10 T svwsata_drv_probe +ffffffff81735ee0 T svwsata_mapchan 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ppb_alloc_resources +ffffffff817398f0 T ppbprint +ffffffff8173a000 T cy_pci_match +ffffffff8173a030 T cy_pci_attach +ffffffff8173b000 T rl_pci_match +ffffffff8173b060 T rl_pci_attach +ffffffff8173b220 T rl_pci_detach +ffffffff8173c000 T re_pci_probe +ffffffff8173c0a0 T re_pci_attach +ffffffff8173c3d0 T re_pci_detach +ffffffff8173c440 T re_pci_activate +ffffffff8173d000 T vr_probe +ffffffff8173d0d0 T vr_attach +ffffffff8173d6a0 T vr_activate +ffffffff8173d720 T vr_mii_readreg +ffffffff8173d880 T vr_mii_writereg +ffffffff8173d9d0 T vr_miibus_readreg +ffffffff8173da40 T vr_miibus_writereg +ffffffff8173dab0 T vr_miibus_statchg +ffffffff8173dad0 T vr_setcfg +ffffffff8173dcf0 T vr_iff +ffffffff8173de70 T vr_reset +ffffffff8173df80 T vr_quirks +ffffffff8173e080 T vr_dmamem_alloc +ffffffff8173e1e0 T vr_dmamem_free +ffffffff8173e250 T vr_intr +ffffffff8173e480 T vr_chipinit +ffffffff8173e560 T vr_ioctl +ffffffff8173e700 T vr_start +ffffffff8173e8d0 T vr_watchdog +ffffffff8173e960 T vr_wol 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txp_download_fw_wait +ffffffff81743790 T txp_download_fw_section +ffffffff81743b00 T txp_dma_malloc +ffffffff81743ca0 T txp_dma_free +ffffffff81743d20 T txp_rx_reclaim +ffffffff81743ff0 T txp_rxbuf_reclaim +ffffffff81744270 T txp_tx_reclaim +ffffffff81744410 T txp_init +ffffffff81744550 T txp_stop +ffffffff81744650 T txp_set_filter +ffffffff817447e0 T txp_command2 +ffffffff81744ae0 T txp_cmd_desc_numfree +ffffffff81744b40 T txp_response +ffffffff81744e10 T txp_rsp_fixup +ffffffff81744ef0 T txp_show_descriptor +ffffffff81746000 T init_audio_devices +ffffffff81746120 T init_BTSC +ffffffff817461e0 T set_audio +ffffffff81746570 T set_bctv_audio +ffffffff817468b0 T msp_autodetect +ffffffff81746ce0 T temp_mute +ffffffff81746d80 T set_BTSC +ffffffff81746da0 T bctv_gpio_write +ffffffff81746f10 T msp_read_id +ffffffff81746fd0 T dpl_read_id +ffffffff81747090 T dpl_autodetect +ffffffff81748000 T writeEEProm +ffffffff81748030 T readEEProm +ffffffff81748100 T signCard +ffffffff817481b0 T probeCard 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em_setup_interface +ffffffff81756c80 T em_update_link_status +ffffffff81756e70 T em_local_timer +ffffffff81756f20 T em_82547_move_tail +ffffffff81756f60 T em_identify_hardware +ffffffff81757070 T em_allocate_pci_resources +ffffffff81757470 T em_allocate_desc_rings +ffffffff81757580 T em_hardware_init +ffffffff81757830 T em_kstat_attach +ffffffff81757980 T em_start +ffffffff81757c70 T em_encap +ffffffff817580d0 T em_82547_move_tail_locked +ffffffff81758300 T em_82547_update_fifo_head +ffffffff81758350 T em_ioctl +ffffffff81758620 T em_init +ffffffff81758990 T em_get_sffpage +ffffffff81758a50 T em_disable_intr +ffffffff81758b50 T em_iff +ffffffff81758e60 T em_initialize_receive_unit +ffffffff817595e0 T em_enable_intr +ffffffff81759740 T em_watchdog +ffffffff817598f0 T em_enable_hw_vlans +ffffffff81759990 T em_setup_transmit_structures +ffffffff81759b90 T em_initialize_transmit_unit +ffffffff8175a1f0 T em_setup_receive_structures +ffffffff8175a330 T em_setup_queues_msix +ffffffff8175a9a0 T em_intr +ffffffff8175aaa0 T em_txeof +ffffffff8175ac70 T em_rxeof +ffffffff8175b100 T em_rxrefill_locked +ffffffff8175b210 T em_media_status +ffffffff8175b430 T em_flowstatus +ffffffff8175b530 T em_media_change +ffffffff8175b690 T em_tx_ctx_setup +ffffffff8175b810 T em_transmit_checksum_setup +ffffffff8175b8f0 T em_fill_descriptors +ffffffff8175b970 T em_82547_fifo_workaround +ffffffff8175b9e0 T em_82547_tx_fifo_reset +ffffffff8175be40 T em_pci_clear_mwi +ffffffff8175be70 T em_pci_set_mwi +ffffffff8175bea0 T em_smartspeed +ffffffff8175c090 T em_kstat_read +ffffffff8175c4d0 T em_flush_desc_rings +ffffffff8175c600 T em_free_transmit_structures +ffffffff8175c7d0 T em_free_receive_structures +ffffffff8175c9d0 T em_legacy_irq_quirk_spt +ffffffff8175cab0 T em_rxrefill +ffffffff8175caf0 T em_allocate_msix +ffffffff8175cd00 T em_allocate_legacy +ffffffff8175ce20 T em_dma_free +ffffffff8175ce90 T em_disable_aspm +ffffffff8175cf60 T em_dma_malloc +ffffffff8175d0f0 T em_allocate_transmit_structures +ffffffff8175d1e0 T em_get_buf +ffffffff8175d340 T em_allocate_receive_structures +ffffffff8175d510 T em_rxfill +ffffffff8175d640 T em_tbi_adjust_stats +ffffffff8175d810 T em_receive_checksum +ffffffff8175d880 T em_write_pci_cfg +ffffffff8175d8f0 T em_read_pci_cfg +ffffffff8175d960 T em_read_pcie_cap_reg +ffffffff8175d990 T em_flush_tx_ring +ffffffff8175db00 T em_flush_rx_ring +ffffffff8175dcc0 T em_queue_intr_msix +ffffffff8175dd70 T em_link_intr_msix +ffffffff8175dea0 T em_enable_queue_intr_msix +ffffffff8175e000 T em_set_mac_type +ffffffff8175ea20 T em_set_sfp_media_type_82575 +ffffffff8175ed70 T em_translate_82542_register +ffffffff8175efa0 T em_read_sfp_data_byte +ffffffff8175f090 T em_set_media_type +ffffffff8175f300 T em_reset_hw +ffffffff8175feb0 T em_disable_pciex_master +ffffffff8175ff80 T em_check_phy_reset_block +ffffffff81760040 T em_gate_hw_phy_config_ich8lan +ffffffff817600e0 t em_get_software_flag +ffffffff81760260 T em_hv_phy_workarounds_ich8lan +ffffffff817605f0 T em_lv_phy_workarounds_ich8lan +ffffffff817606f0 t em_phy_init_script +ffffffff81760950 T em_read_eeprom +ffffffff81760fc0 T em_set_eee_i350 +ffffffff817610e0 T em_init_hw +ffffffff81762b20 T em_phy_reset +ffffffff81762d10 T em_clear_vfta_i350 +ffffffff81762ef0 T em_read_phy_reg +ffffffff817630a0 T em_setup_link +ffffffff81765340 T em_enable_tx_pkt_filtering +ffffffff81765700 T em_clear_hw_cntrs +ffffffff81765ff0 T em_write_phy_reg +ffffffff81766170 T em_power_up_serdes_link_82575 +ffffffff81766260 T em_copper_link_autoneg +ffffffff81766390 T em_phy_setup_autoneg +ffffffff817664f0 T em_copper_link_postconfig +ffffffff817665c0 T em_config_collision_dist +ffffffff81766650 t em_config_mac_to_phy +ffffffff817667c0 t em_config_fc_after_link_up +ffffffff81766a10 t em_config_dsp_after_link_change +ffffffff817673b0 T em_force_mac_fc +ffffffff81767480 T em_check_for_link +ffffffff81767b00 T em_get_pcs_speed_and_duplex_82575 +ffffffff81767bc0 T em_k1_gig_workaround_hv +ffffffff81767cf0 T em_link_stall_workaround_hv +ffffffff81767dd0 T em_k1_workaround_lv +ffffffff81767e90 T em_k1_workaround_lpt_lp +ffffffff81768150 t em_check_downshift +ffffffff81768200 T em_set_eee_pchlan +ffffffff817682a0 t em_polarity_reversal_workaround +ffffffff817684e0 T em_get_speed_and_duplex +ffffffff81768990 T em_access_phy_wakeup_reg_bm +ffffffff81768af0 t em_write_phy_reg_ex +ffffffff81768d60 t em_read_phy_reg_ex +ffffffff81769210 T em_access_phy_debug_regs_hv +ffffffff817692e0 T em_access_phy_reg_hv +ffffffff81769450 t em_swfw_sync_acquire +ffffffff81769600 t em_swfw_sync_release +ffffffff81769770 T em_sgmii_uses_mdio_82575 +ffffffff817697d0 T em_read_phy_reg_i2c +ffffffff817698b0 T em_write_phy_reg_i2c +ffffffff81769980 T em_phy_hw_reset +ffffffff81769f90 T em_oem_bits_config_pchlan +ffffffff8176a100 T em_initialize_M88E1512_phy +ffffffff8176a2c0 T em_init_eeprom_params +ffffffff8176a7d0 T em_get_flash_presence_i210 +ffffffff8176a830 t em_acquire_eeprom +ffffffff8176aa20 t em_read_eeprom_ich8 +ffffffff8176abf0 t em_release_eeprom +ffffffff8176ad60 t em_standby_eeprom +ffffffff8176af50 t em_shift_out_ee_bits +ffffffff8176b0f0 t em_shift_in_ee_bits +ffffffff8176b230 T em_validate_eeprom_checksum +ffffffff8176b3d0 T em_write_eeprom +ffffffff8176b6f0 T em_update_eeprom_checksum +ffffffff8176b810 t em_commit_shadow_ram +ffffffff8176bd70 t em_write_eeprom_microwire +ffffffff8176bef0 t em_write_eeprom_spi +ffffffff8176c0b0 T em_read_part_num +ffffffff8176c150 T em_read_mac_addr +ffffffff8176c2d0 T em_mc_addr_list_update +ffffffff8176c3e0 T em_hash_mc_addr +ffffffff8176c4e0 T em_mta_set +ffffffff8176c650 T em_rar_set +ffffffff8176c780 T em_get_bus_info +ffffffff8176c910 T em_check_mng_mode +ffffffff8176c990 T em_valid_nvm_bank_detect_ich8lan +ffffffff8176cb40 T em_read_eeprom_spt +ffffffff8176ce00 t em_release_software_flag +ffffffff8176ceb0 T em_read_ich8_data32 +ffffffff8176d020 t em_ich8_cycle_init +ffffffff8176d1c0 t em_ich8_flash_cycle +ffffffff8176d310 T em_configure_k1_ich8lan +ffffffff8176d530 t em_toggle_lanphypc_pch_lpt +ffffffff8176d690 t em_copper_link_ggp_setup +ffffffff8176d940 t em_copper_link_82580_setup +ffffffff8176d9d0 t em_copper_link_rtl8211_setup +ffffffff8176dc60 t em_phy_reset_dsp +ffffffff8176dce0 t em_get_hw_eeprom_semaphore +ffffffff8176de50 t em_shift_out_mdi_bits +ffffffff8176dfe0 t em_erase_ich8_4k_segment +ffffffff8176e220 t em_write_ich8_byte +ffffffff8176e390 t em_read_ich8_data +ffffffff8176f000 T em_lookup_gcu +ffffffff8176f030 T em_attach_miibus +ffffffff8176f060 T gcu_miibus_readreg +ffffffff8176f1d0 T gcu_miibus_writereg +ffffffff8176f320 T gcu_miibus_statchg +ffffffff81770000 T ixgb_probe +ffffffff81770030 T ixgb_attach +ffffffff81770470 T ixgb_local_timer +ffffffff81770520 T ixgb_identify_hardware +ffffffff81770620 T ixgb_allocate_pci_resources +ffffffff817707b0 T ixgb_dma_malloc +ffffffff817709b0 T ixgb_hardware_init +ffffffff81770a70 T ixgb_setup_interface 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ixgb_free_receive_structures +ffffffff817736e0 T ixgb_allocate_transmit_structures +ffffffff81773760 T ixgb_transmit_checksum_setup +ffffffff81773860 T ixgb_get_buf +ffffffff81773a10 T ixgb_allocate_receive_structures +ffffffff81773b90 T ixgb_receive_checksum +ffffffff81773bf0 T ixgb_write_pci_cfg +ffffffff81774000 T ixgb_validate_eeprom_checksum +ffffffff81774080 T ixgb_read_eeprom +ffffffff817742f0 T ixgb_update_eeprom_checksum +ffffffff81774350 T ixgb_write_eeprom +ffffffff81774830 t ixgb_shift_out_bits +ffffffff81774970 T ixgb_get_eeprom_data +ffffffff81774a10 T ixgb_get_eeprom_word +ffffffff81774ae0 T ixgb_get_ee_mac_addr +ffffffff81774be0 T ixgb_get_ee_pba_number +ffffffff81774ca0 T ixgb_get_ee_device_id +ffffffff81775000 T ixgb_mac_reset +ffffffff817751e0 T ixgb_adapter_stop +ffffffff81775320 T ixgb_init_hw +ffffffff81775620 T ixgb_init_rx_addrs +ffffffff81775750 T mac_addr_valid +ffffffff817757b0 T ixgb_clear_vfta +ffffffff81775830 T ixgb_clear_hw_cntrs +ffffffff81775f10 T ixgb_setup_fc +ffffffff817760a0 T ixgb_check_for_link +ffffffff817762b0 T ixgb_rar_set +ffffffff81776320 T ixgb_mc_addr_list_update +ffffffff817765a0 T ixgb_write_vfta +ffffffff817765d0 T ixgb_read_phy_reg +ffffffff81776ad0 T ixgb_write_phy_reg +ffffffff81776fc0 T ixgb_check_for_bad_link +ffffffff81777080 T ixgb_led_on +ffffffff817770d0 T ixgb_led_off +ffffffff81778000 T ixgbe_probe +ffffffff81778030 T ixgbe_attach +ffffffff81778580 T ixgbe_detach +ffffffff81778790 T ixgbe_activate +ffffffff817788a0 T ixgbe_identify_hardware +ffffffff81778960 T ixgbe_allocate_pci_resources +ffffffff81778ab0 T ixgbe_allocate_queues +ffffffff81778fb0 T ixgbe_allocate_msix +ffffffff817791e0 T ixgbe_allocate_legacy +ffffffff81779300 T ixgbe_setup_interface +ffffffff81779660 T ixgbe_free_transmit_structures +ffffffff817796e0 T ixgbe_free_receive_structures +ffffffff817797a0 T ixgbe_free_pci_resources +ffffffff81779880 T ixgbe_stop +ffffffff81779b80 T ixgbe_init +ffffffff8177a760 T ixgbe_start +ffffffff8177a940 T ixgbe_encap +ffffffff8177ad90 T ixgbe_ioctl +ffffffff8177b0d0 T ixgbe_rxrinfo +ffffffff8177b230 T ixgbe_get_sffpage +ffffffff8177b3e0 T ixgbe_disable_intr +ffffffff8177b4b0 T ixgbe_iff +ffffffff8177b620 T ixgbe_enable_intr +ffffffff8177b730 T ixgbe_enable_queues +ffffffff8177b840 T ixgbe_watchdog +ffffffff8177ba50 T ixgbe_setup_transmit_structures +ffffffff8177bb20 T ixgbe_initialize_transmit_units +ffffffff8177bdf0 T ixgbe_setup_receive_structures +ffffffff8177bf20 T ixgbe_initialize_receive_units +ffffffff8177c400 T ixgbe_config_gpie +ffffffff8177c4d0 T ixgbe_setup_vlan_hw_support +ffffffff8177c640 T ixgbe_configure_ivars +ffffffff8177c7f0 T ixgbe_set_ivar +ffffffff8177c9a0 T ixgbe_config_link +ffffffff8177cb40 T ixgbe_config_delay_values +ffffffff8177cc60 t ix_kstats_tick +ffffffff8177cd20 T ixgbe_enable_queue +ffffffff8177cdf0 T ixgbe_disable_queue +ffffffff8177cec0 T ixgbe_link_intr +ffffffff8177ced0 T ixgbe_intr +ffffffff8177d3a0 T ixgbe_queue_intr +ffffffff8177d4f0 T ixgbe_rxeof +ffffffff8177da40 T ixgbe_txeof +ffffffff8177dbd0 T ixgbe_rxrefill +ffffffff8177dc90 T ixgbe_legacy_intr +ffffffff8177de40 T ixgbe_update_link_status +ffffffff8177df80 T ixgbe_handle_mod +ffffffff8177e0a0 T ixgbe_handle_msf +ffffffff8177e170 T ixgbe_handle_phy +ffffffff8177e200 T ixgbe_media_status +ffffffff8177e410 T ixgbe_media_change +ffffffff8177e4c0 T ixgbe_mc_array_itr +ffffffff8177e500 T ixgbe_setup_msix +ffffffff8177e590 T ixgbe_add_media_types +ffffffff8177e830 T ixgbe_dma_malloc +ffffffff8177ea30 T ixgbe_dma_free +ffffffff8177eae0 T ixgbe_allocate_transmit_buffers +ffffffff8177ec00 T ixgbe_setup_transmit_ring +ffffffff8177ed50 T ixgbe_free_transmit_buffers +ffffffff8177ee80 T ixgbe_get_buf +ffffffff8177efd0 T ixgbe_allocate_receive_buffers +ffffffff8177f110 T ixgbe_setup_receive_ring +ffffffff8177f1f0 T ixgbe_rxfill +ffffffff8177f330 T ixgbe_initialize_rss_mapping +ffffffff8177f5a0 T ixgbe_map_queue_statistics +ffffffff8177f6c0 T ixgbe_free_receive_buffers +ffffffff8177f7e0 T ixgbe_rx_checksum +ffffffff8177f830 T ixgbe_read_pci_cfg +ffffffff8177f890 T ixgbe_write_pci_cfg +ffffffff8177f910 t ix_kstats_read +ffffffff8177fad0 t ix_rxq_kstats_read +ffffffff8177fc30 t ix_txq_kstats_read +ffffffff81780000 T ixgbe_init_ops_generic +ffffffff81780270 T ixgbe_init_eeprom_params_generic +ffffffff81780320 T ixgbe_read_eerd_generic +ffffffff81780420 T ixgbe_read_eeprom_bit_bang_generic +ffffffff817806c0 T ixgbe_write_eeprom_generic +ffffffff81780b10 T ixgbe_validate_eeprom_checksum_generic +ffffffff81780bc0 T ixgbe_update_eeprom_checksum_generic +ffffffff81780c40 T ixgbe_calc_eeprom_checksum_generic +ffffffff81780de0 T ixgbe_init_hw_generic +ffffffff81780e40 T ixgbe_start_hw_generic +ffffffff81780f60 T ixgbe_clear_hw_cntrs_generic +ffffffff81781940 T ixgbe_enable_rx_dma_generic +ffffffff817819a0 T ixgbe_get_mac_addr_generic +ffffffff81781a30 T ixgbe_stop_adapter_generic +ffffffff81781bb0 T ixgbe_get_bus_info_generic +ffffffff81781c60 T ixgbe_set_lan_id_multi_port_pcie +ffffffff81781d30 T ixgbe_acquire_swfw_sync +ffffffff81781f60 T ixgbe_release_swfw_sync +ffffffff81782010 T prot_autoc_read_generic +ffffffff81782070 T prot_autoc_write_generic +ffffffff817820c0 T ixgbe_led_on_generic +ffffffff81782180 T ixgbe_led_off_generic +ffffffff81782230 T ixgbe_blink_led_start_generic +ffffffff817823a0 T ixgbe_blink_led_stop_generic +ffffffff817824c0 T ixgbe_set_rar_generic +ffffffff817825e0 T ixgbe_clear_rar_generic +ffffffff817826e0 T ixgbe_init_rx_addrs_generic +ffffffff817828e0 T ixgbe_update_mc_addr_list_generic +ffffffff81782ae0 T ixgbe_enable_mc_generic +ffffffff81782b50 T ixgbe_disable_mc_generic +ffffffff81782bb0 T ixgbe_enable_rx_generic +ffffffff81782c70 T ixgbe_disable_rx_generic +ffffffff81782d50 T ixgbe_fc_enable_generic +ffffffff81783180 T ixgbe_setup_fc_generic +ffffffff81783450 T ixgbe_fc_autoneg +ffffffff81783730 T ixgbe_device_supports_autoneg_fc +ffffffff81783820 T ixgbe_start_hw_gen2 +ffffffff81783a00 T ixgbe_identify_phy +ffffffff81783a60 T ixgbe_set_pci_config_data_generic +ffffffff81783ad0 T ixgbe_disable_rx +ffffffff81783b10 T ixgbe_disable_pcie_master +ffffffff81783c60 T ixgbe_read_eerd_buffer_generic +ffffffff81783da0 T ixgbe_poll_eerd_eewr_done +ffffffff81783e40 T ixgbe_write_eewr_buffer_generic +ffffffff81783fc0 T ixgbe_write_eewr_generic +ffffffff81784010 T ixgbe_acquire_eeprom +ffffffff81784190 T ixgbe_get_eeprom_semaphore +ffffffff817843a0 T ixgbe_release_eeprom_semaphore +ffffffff81784410 T ixgbe_ready_eeprom +ffffffff81784580 T ixgbe_shift_out_eeprom_bits +ffffffff81784740 T ixgbe_shift_in_eeprom_bits +ffffffff817848a0 T ixgbe_standby_eeprom +ffffffff81784980 T ixgbe_raise_eeprom_clk +ffffffff817849f0 T ixgbe_lower_eeprom_clk +ffffffff81784a60 T ixgbe_release_eeprom +ffffffff81784b40 T ixgbe_validate_mac_addr +ffffffff81784ba0 T ixgbe_init_uta_tables +ffffffff81784be0 T ixgbe_add_uc_addr +ffffffff81784c50 T ixgbe_mta_vector +ffffffff81784d00 T ixgbe_set_mta +ffffffff81784dc0 T ixgbe_negotiate_fc +ffffffff81784e70 T ixgbe_fc_autoneg_fiber +ffffffff81784f90 T ixgbe_fc_autoneg_backplane +ffffffff81785100 T ixgbe_fc_autoneg_copper +ffffffff81785220 T ixgbe_disable_sec_rx_path_generic +ffffffff817852e0 T ixgbe_enable_sec_rx_path_generic +ffffffff81785370 T ixgbe_enable_rx +ffffffff817853b0 T ixgbe_get_pcie_msix_count_generic +ffffffff81785430 T ixgbe_insert_mac_addr_generic +ffffffff81785640 T ixgbe_set_vmdq +ffffffff81785680 T ixgbe_set_rar +ffffffff817856d0 T ixgbe_clear_vmdq +ffffffff81785710 T ixgbe_clear_vmdq_generic +ffffffff817858c0 T ixgbe_set_vmdq_generic +ffffffff81785970 T ixgbe_init_uta_tables_generic +ffffffff817859f0 T ixgbe_find_vlvf_slot +ffffffff81785aa0 T ixgbe_set_vfta_generic +ffffffff81785bb0 T ixgbe_set_vlvf_generic +ffffffff81785e40 T ixgbe_clear_vfta_generic +ffffffff81785f40 T ixgbe_need_crosstalk_fix +ffffffff81785f90 T ixgbe_check_mac_link_generic +ffffffff81786180 T ixgbe_get_device_caps_generic +ffffffff817861d0 T ixgbe_calculate_checksum +ffffffff81786290 T ixgbe_hic_unlocked +ffffffff81786450 T ixgbe_host_interface_command +ffffffff81786620 T ixgbe_clear_tx_pending +ffffffff817867e0 T ixgbe_mng_present +ffffffff81786850 T ixgbe_mng_enabled +ffffffff81786910 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff81786cb0 T ixgbe_flap_tx_laser +ffffffff81786cf0 T ixgbe_check_link +ffffffff81786d40 T ixgbe_set_soft_rate_select_speed +ffffffff81786e30 T ixgbe_init_shared_code +ffffffff81786ee0 T ixgbe_set_mac_type +ffffffff81787080 T ixgbe_init_hw +ffffffff817870c0 T ixgbe_get_media_type +ffffffff81787100 T ixgbe_read_mbx +ffffffff81787160 T ixgbe_write_mbx +ffffffff817871b0 T ixgbe_check_for_msg +ffffffff817871f0 T ixgbe_check_for_ack +ffffffff81787230 T ixgbe_check_for_rst +ffffffff81787270 T ixgbe_poll_for_msg +ffffffff81787330 T ixgbe_poll_for_ack +ffffffff817873f0 T ixgbe_read_posted_mbx +ffffffff817874d0 T ixgbe_write_posted_mbx +ffffffff817875a0 T ixgbe_init_mbx_ops_generic +ffffffff817875e0 T ixgbe_read_v2p_mailbox +ffffffff81787650 T ixgbe_check_for_bit_pf +ffffffff817876e0 T ixgbe_check_for_msg_pf +ffffffff81787790 T ixgbe_check_for_ack_pf +ffffffff81787830 T ixgbe_check_for_rst_pf +ffffffff81787920 T ixgbe_obtain_mbx_lock_pf +ffffffff817879b0 T ixgbe_write_mbx_pf +ffffffff81787b80 T ixgbe_read_mbx_pf +ffffffff81787c90 T ixgbe_init_mbx_params_pf +ffffffff81788000 T ixgbe_set_pcie_completion_timeout +ffffffff81788090 T ixgbe_init_ops_82598 +ffffffff817881e0 T ixgbe_init_phy_ops_82598 +ffffffff817882d0 T ixgbe_start_hw_82598 +ffffffff81788480 T ixgbe_reset_hw_82598 +ffffffff817887b0 T ixgbe_get_media_type_82598 +ffffffff81788870 T ixgbe_get_supported_physical_layer_82598 +ffffffff81788a40 T ixgbe_read_analog_reg8_82598 +ffffffff81788b00 T ixgbe_write_analog_reg8_82598 +ffffffff81788b80 T ixgbe_set_lan_id_multi_port_pcie_82598 +ffffffff81788c20 T ixgbe_enable_rx_dma_82598 +ffffffff81788c70 T ixgbe_set_vmdq_82598 +ffffffff81788d20 T ixgbe_clear_vmdq_82598 +ffffffff81788dd0 T ixgbe_set_vfta_82598 +ffffffff81788f00 T ixgbe_clear_vfta_82598 +ffffffff817890b0 T ixgbe_fc_enable_82598 +ffffffff81789510 T ixgbe_read_i2c_eeprom_82598 +ffffffff81789530 T ixgbe_check_mac_link_82598 +ffffffff817897d0 T ixgbe_setup_mac_link_82598 +ffffffff81789990 T ixgbe_get_link_capabilities_82598 +ffffffff81789a60 T ixgbe_setup_copper_link_82598 +ffffffff81789b70 T ixgbe_start_mac_link_82598 +ffffffff81789c90 T ixgbe_validate_link_ready +ffffffff81789d40 T ixgbe_read_i2c_phy_82598 +ffffffff8178a000 T ixgbe_init_mac_link_ops_82599 +ffffffff8178a190 T ixgbe_disable_tx_laser_multispeed_fiber +ffffffff8178a260 T ixgbe_enable_tx_laser_multispeed_fiber +ffffffff8178a2e0 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff8178a420 T ixgbe_setup_mac_link_82599 +ffffffff8178a6a0 T ixgbe_set_hard_rate_select_speed +ffffffff8178a760 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff8178a830 T ixgbe_setup_mac_link_smartspeed +ffffffff8178abc0 T ixgbe_init_phy_ops_82599 +ffffffff8178ad10 T ixgbe_read_i2c_byte_82599 +ffffffff8178ae90 T ixgbe_write_i2c_byte_82599 +ffffffff8178b010 T ixgbe_setup_copper_link_82599 +ffffffff8178b070 T ixgbe_setup_sfp_modules_82599 +ffffffff8178b230 T prot_autoc_read_82599 +ffffffff8178b360 T prot_autoc_write_82599 +ffffffff8178b4d0 T ixgbe_reset_pipeline_82599 +ffffffff8178b810 T ixgbe_init_ops_82599 +ffffffff8178b9f0 T ixgbe_identify_phy_82599 +ffffffff8178ba80 T ixgbe_reset_hw_82599 +ffffffff8178be10 T ixgbe_get_media_type_82599 +ffffffff8178bf40 T ixgbe_get_supported_physical_layer_82599 +ffffffff8178c110 T ixgbe_enable_rx_dma_82599 +ffffffff8178c180 T ixgbe_read_analog_reg8_82599 +ffffffff8178c240 T ixgbe_write_analog_reg8_82599 +ffffffff8178c2c0 T ixgbe_start_hw_82599 +ffffffff8178c3c0 T ixgbe_get_link_capabilities_82599 +ffffffff8178c500 T ixgbe_stop_mac_link_on_d3_82599 +ffffffff8178c5c0 T ixgbe_read_eeprom_82599 +ffffffff8178c5f0 T ixgbe_start_mac_link_82599 +ffffffff8178c7f0 T ixgbe_verify_fw_version_82599 +ffffffff8178d000 T ixgbe_init_ops_X540 +ffffffff8178d220 T ixgbe_init_eeprom_params_X540 +ffffffff8178d2b0 T ixgbe_read_eerd_X540 +ffffffff8178d340 T ixgbe_write_eewr_X540 +ffffffff8178d3d0 T ixgbe_update_eeprom_checksum_X540 +ffffffff8178d4a0 T ixgbe_validate_eeprom_checksum_X540 +ffffffff8178d590 T ixgbe_calc_eeprom_checksum_X540 +ffffffff8178d730 T ixgbe_reset_hw_X540 +ffffffff8178d920 T ixgbe_get_media_type_X540 +ffffffff8178d950 T ixgbe_get_supported_physical_layer_X540 +ffffffff8178d9d0 T ixgbe_start_hw_X540 +ffffffff8178da20 T ixgbe_acquire_swfw_sync_X540 +ffffffff8178de70 T ixgbe_release_swfw_sync_X540 +ffffffff8178dfa0 T ixgbe_init_swfw_sync_X540 +ffffffff8178e080 T ixgbe_setup_mac_link_X540 +ffffffff8178e0a0 T ixgbe_blink_led_start_X540 +ffffffff8178e1c0 T ixgbe_blink_led_stop_X540 +ffffffff8178e2c0 T ixgbe_get_link_capabilities_X540 +ffffffff8178e300 T ixgbe_update_flash_X540 +ffffffff8178e4e0 T ixgbe_poll_flash_update_done_X540 +ffffffff8178e570 T ixgbe_get_swfw_sync_semaphore +ffffffff8178e700 T ixgbe_release_swfw_sync_semaphore +ffffffff8178f000 T ixgbe_init_ops_X550 +ffffffff8178f110 T ixgbe_dmac_config_X550 +ffffffff8178f1f0 T ixgbe_dmac_config_tcs_X550 +ffffffff8178f340 T ixgbe_dmac_update_tcs_X550 +ffffffff8178f400 T ixgbe_set_source_address_pruning_X550 +ffffffff8178f4f0 T ixgbe_init_eeprom_params_X550 +ffffffff8178f570 T ixgbe_calc_eeprom_checksum_X550 +ffffffff8178f590 T ixgbe_read_ee_hostif_X550 +ffffffff8178f660 T ixgbe_write_ee_hostif_X550 +ffffffff8178f720 T ixgbe_update_eeprom_checksum_X550 +ffffffff8178f8c0 T ixgbe_validate_eeprom_checksum_X550 +ffffffff8178fa10 T ixgbe_disable_rx_x550 +ffffffff8178fb30 T ixgbe_led_on_t_X550em +ffffffff8178fbf0 T ixgbe_led_off_t_X550em +ffffffff8178fcb0 T ixgbe_read_cs4227 +ffffffff8178fce0 T ixgbe_write_cs4227 +ffffffff8178fd10 T ixgbe_read_pe +ffffffff8178fd60 T ixgbe_write_pe +ffffffff8178fdc0 T ixgbe_reset_cs4227 +ffffffff81790050 T ixgbe_check_cs4227 +ffffffff81790200 T ixgbe_setup_mux_ctl +ffffffff81790290 T ixgbe_identify_phy_x550em +ffffffff817904a0 T ixgbe_read_mng_if_sel_x550em +ffffffff81790520 T ixgbe_fw_phy_activity +ffffffff81790640 T ixgbe_get_phy_id_fw +ffffffff81790750 T ixgbe_identify_phy_fw +ffffffff81790870 T ixgbe_shutdown_fw_phy +ffffffff817908d0 T ixgbe_read_phy_reg_x550em +ffffffff81790900 T ixgbe_write_phy_reg_x550em +ffffffff81790930 T ixgbe_init_ops_X550EM +ffffffff81790bd0 T ixgbe_get_bus_info_X550em +ffffffff81790c20 T ixgbe_get_media_type_X550em +ffffffff81790cf0 T ixgbe_setup_sfp_modules_X550em +ffffffff81790e80 T ixgbe_get_link_capabilities_X550em +ffffffff81790f50 T ixgbe_reset_hw_X550em +ffffffff817913d0 T ixgbe_get_supported_physical_layer_X550em +ffffffff81791550 T ixgbe_setup_fc_X550em +ffffffff817916b0 T ixgbe_init_phy_ops_X550em +ffffffff81791b80 T ixgbe_setup_fw_link +ffffffff81791ca0 T ixgbe_fc_autoneg_fw +ffffffff81791cd0 T ixgbe_setup_eee_fw +ffffffff81791d30 T ixgbe_init_ops_X550EM_a +ffffffff81791e60 T ixgbe_read_iosf_sb_reg_x550 +ffffffff81791fd0 T ixgbe_write_iosf_sb_reg_x550 +ffffffff81792140 T ixgbe_read_iosf_sb_reg_x550a +ffffffff817921d0 T ixgbe_write_iosf_sb_reg_x550a +ffffffff81792260 T ixgbe_acquire_swfw_sync_X550a +ffffffff817923a0 T ixgbe_release_swfw_sync_X550a +ffffffff81792440 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff81792480 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff817925e0 T ixgbe_setup_fc_backplane_x550em_a +ffffffff817927d0 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff817928c0 T ixgbe_init_ops_X550EM_x +ffffffff81792980 T ixgbe_acquire_swfw_sync_X550em +ffffffff81792a40 T ixgbe_release_swfw_sync_X550em +ffffffff81792ad0 T ixgbe_iosf_wait +ffffffff81792b80 T ixgbe_get_phy_token +ffffffff81792c00 T ixgbe_put_phy_token +ffffffff81792c80 T ixgbe_supported_sfp_modules_X550em +ffffffff81792d00 T ixgbe_identify_sfp_module_X550em +ffffffff81792d80 T ixgbe_init_mac_link_ops_X550em +ffffffff81792ec0 T ixgbe_restart_an_internal_phy_x550em +ffffffff81792fd0 T ixgbe_setup_sgmii +ffffffff817931a0 T ixgbe_setup_sgmii_fw +ffffffff817933a0 T ixgbe_setup_mac_link_sfp_x550a +ffffffff81793590 T ixgbe_setup_mac_link_sfp_x550em +ffffffff81793650 T ixgbe_setup_mac_link_t_X550em +ffffffff81793700 T ixgbe_check_link_t_X550em +ffffffff817937e0 T ixgbe_get_lasi_ext_t_x550em +ffffffff81793960 T ixgbe_enable_lasi_ext_t_x550em +ffffffff81793af0 T ixgbe_setup_kr_speed_x550em +ffffffff81793d00 T ixgbe_reset_phy_fw +ffffffff81793dd0 T ixgbe_check_overtemp_fw +ffffffff81793e60 T ixgbe_read_phy_reg_x550a +ffffffff81793f00 T ixgbe_write_phy_reg_x550a +ffffffff81793fb0 T ixgbe_setup_kr_x550em +ffffffff81794020 T ixgbe_setup_internal_phy_t_x550em +ffffffff81794180 T ixgbe_enter_lplu_t_x550em +ffffffff817943d0 T ixgbe_handle_lasi_ext_t_x550em +ffffffff81794450 T ixgbe_reset_phy_t_X550em +ffffffff817944a0 T ixgbe_set_mdio_speed +ffffffff81794570 T ixgbe_init_ext_t_x550em +ffffffff81794620 T ixgbe_setup_sfi_x550a +ffffffff817947d0 T ixgbe_setup_ixfi_x550em_x +ffffffff817949b0 T ixgbe_setup_ixfi_x550em +ffffffff81794b90 T ixgbe_ext_phy_t_x550em_get_link +ffffffff81794c20 T ixgbe_setup_phy_loopback_x550em +ffffffff81794e10 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff81794fb0 T ixgbe_write_ee_hostif_data_X550 +ffffffff81795020 T ixgbe_checksum_ptr_x550 +ffffffff817951b0 T ixgbe_calc_checksum_X550 +ffffffff81795340 T ixgbe_update_flash_X550 +ffffffff81795390 T ixgbe_get_lcd_t_x550em +ffffffff81795450 T ixgbe_set_mux +ffffffff81796000 T ixgbe_read_i2c_combined_generic_int +ffffffff81796260 T ixgbe_i2c_start +ffffffff817963b0 t ixgbe_out_i2c_byte_ack +ffffffff81796400 T ixgbe_clock_in_i2c_byte +ffffffff81796500 T ixgbe_clock_out_i2c_bit +ffffffff81796610 T ixgbe_i2c_stop +ffffffff81796790 T ixgbe_i2c_bus_clear +ffffffff817968a0 T ixgbe_read_i2c_combined_generic +ffffffff817968c0 T ixgbe_read_i2c_combined_generic_unlocked +ffffffff817968e0 T ixgbe_write_i2c_combined_generic_int +ffffffff81796aa0 T ixgbe_write_i2c_combined_generic +ffffffff81796ac0 T ixgbe_write_i2c_combined_generic_unlocked +ffffffff81796ae0 T ixgbe_init_phy_ops_generic +ffffffff81796c10 T ixgbe_identify_phy_generic +ffffffff81796ce0 T ixgbe_reset_phy_generic +ffffffff81796ef0 T ixgbe_read_phy_reg_generic +ffffffff81796f90 T ixgbe_write_phy_reg_generic +ffffffff81797030 T ixgbe_read_phy_reg_mdi +ffffffff81797190 T ixgbe_write_phy_reg_mdi +ffffffff817972f0 T ixgbe_setup_phy_link_generic +ffffffff817975a0 T ixgbe_setup_phy_link_speed_generic +ffffffff817975f0 T ixgbe_get_phy_firmware_version_generic +ffffffff81797620 T ixgbe_read_i2c_byte_generic +ffffffff81797640 T ixgbe_write_i2c_byte_generic +ffffffff81797660 T ixgbe_read_i2c_eeprom_generic +ffffffff81797690 T ixgbe_write_i2c_eeprom_generic +ffffffff817976b0 T ixgbe_identify_module_generic +ffffffff81797720 T ixgbe_read_i2c_byte_generic_unlocked +ffffffff81797740 T ixgbe_write_i2c_byte_generic_unlocked +ffffffff81797760 T ixgbe_tn_check_overtemp +ffffffff817977d0 t ixgbe_probe_phy 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+ffffffff81799960 T ixgbe_raise_i2c_clk +ffffffff81799a80 T ixgbe_lower_i2c_clk +ffffffff81799b10 T ixgbe_clock_in_i2c_bit +ffffffff81799cd0 T ixgbe_get_i2c_data +ffffffff81799d80 T ixgbe_set_copper_phy_power +ffffffff8179a000 t ixl_match +ffffffff8179a0a0 t ixl_attach +ffffffff8179b5f0 t ixl_710_rd_ctl +ffffffff8179b6b0 t ixl_710_wr_ctl +ffffffff8179b780 t ixl_710_set_rss_key +ffffffff8179b900 t ixl_710_set_rss_lut +ffffffff8179b980 t ixl_atq_exec +ffffffff8179baf0 t ixl_wakeup +ffffffff8179bb10 t ixl_722_rd_ctl +ffffffff8179bb40 t ixl_722_wr_ctl +ffffffff8179bb70 t ixl_722_set_rss_key +ffffffff8179bba0 t ixl_722_set_rss_lut +ffffffff8179bbd0 t ixl_dmamem_alloc +ffffffff8179bd30 t ixl_arq +ffffffff8179bfd0 t ixl_arq_fill +ffffffff8179c240 t ixl_pxe_clear +ffffffff8179c2f0 t ixl_get_mac +ffffffff8179c4c0 t ixl_hmc +ffffffff8179cb50 t ixl_lldp_shut +ffffffff8179cbe0 t ixl_phy_mask_ints +ffffffff8179cc90 t ixl_restart_an +ffffffff8179cd40 t ixl_get_switch_config +ffffffff8179cf30 t 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tht_fifo_writable +ffffffff817a9b90 T tht_fifo_readable +ffffffff817a9c00 T tht_rxf_drain +ffffffff817a9d10 T tht_fifo_pre +ffffffff817a9d60 T tht_pkt_get +ffffffff817a9de0 T tht_load_pkt +ffffffff817a9f20 T tht_pkt_put +ffffffff817a9f90 T tht_fifo_write +ffffffff817aa040 T tht_fifo_write_dmap +ffffffff817aa170 T tht_fifo_write_pad +ffffffff817aa240 T tht_fifo_post +ffffffff817aa2f0 T tht_fifo_read +ffffffff817aa390 T tht_pkt_used +ffffffff817aa3c0 T tht_dmamem_alloc +ffffffff817aa530 T tht_dmamem_free +ffffffff817aa5b0 T tht_wait_eq +ffffffff817aa670 T tht_wait_ne +ffffffff817ab000 T myx_match +ffffffff817ab030 T myx_attach +ffffffff817ab2a0 T myx_mcl_small +ffffffff817ab300 T myx_refill +ffffffff817ab360 T myx_mcl_big +ffffffff817ab410 T myx_query +ffffffff817ab700 T myx_pcie_dc +ffffffff817ab7e0 T myx_attachhook +ffffffff817abaf0 T myx_ether_aton +ffffffff817abbb0 T myx_read +ffffffff817abbe0 T myx_loadfirmware +ffffffff817abde0 T myx_write +ffffffff817abe40 T myx_boot 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oce_create_iface +ffffffff817b6460 T oce_create_eq +ffffffff817b65c0 T oce_create_wq +ffffffff817b6870 T oce_create_rq +ffffffff817b6b20 T oce_create_mq +ffffffff817b6ce0 T oce_release_queues +ffffffff817b6df0 T oce_destroy_rq +ffffffff817b7010 T oce_destroy_wq +ffffffff817b7230 T oce_destroy_mq +ffffffff817b73d0 T oce_destroy_eq +ffffffff817b7560 T oce_create_ring +ffffffff817b7740 T oce_create_cq +ffffffff817b78e0 T oce_destroy_ring +ffffffff817b7990 T oce_pkt_alloc +ffffffff817b7a40 T oce_new_wq +ffffffff817b7d40 T oce_destroy_cq +ffffffff817b7ed0 T oce_pkt_free +ffffffff817b7f20 T oce_new_eq +ffffffff817b82d0 T oce_new_mq +ffffffff817b8650 T oce_drain_mq +ffffffff817b8770 T oce_new_cq +ffffffff817b8be0 T oce_load_ring +ffffffff817b8cf0 T oce_mbox_dispatch +ffffffff817b8ec0 T oce_macaddr_add +ffffffff817b8ff0 T oce_macaddr_del +ffffffff817b9100 T oce_stats_be2 +ffffffff817b9230 T oce_stats_be3 +ffffffff817b9350 T oce_stats_xe +ffffffff817ba000 T dc_pci_match +ffffffff817ba090 T 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iwm_channel_id_to_papd +ffffffff81812770 T iwm_channel_id_to_txp +ffffffff81812900 T iwm_phy_db_get_section_data +ffffffff81812a90 T iwm_send_phy_db_cmd +ffffffff81812b30 T iwm_send_cmd +ffffffff81813210 T iwm_phy_db_send_all_channel_groups +ffffffff818133f0 T iwm_send_phy_db_data +ffffffff81813630 T iwm_send_time_event_cmd +ffffffff81813740 T iwm_free_resp +ffffffff818137c0 T iwm_protect_session +ffffffff81813870 T iwm_unprotect_session +ffffffff81813920 T iwm_nvm_read_chunk +ffffffff81813a80 T iwm_nvm_read_section +ffffffff81813b40 T iwm_fw_valid_tx_ant +ffffffff81813b80 T iwm_fw_valid_rx_ant +ffffffff81813bd0 T iwm_valid_siso_ant_rate_mask +ffffffff81813c30 T iwm_init_channel_map +ffffffff81813d90 T iwm_mimo_enabled +ffffffff81813dd0 T iwm_setup_ht_rates +ffffffff81813e80 T iwm_setup_vht_rates +ffffffff81813f10 T iwm_init_reorder_buffer +ffffffff81813f70 T iwm_clear_reorder_buffer +ffffffff81814030 T iwm_rx_ba_session_expired +ffffffff81814130 T iwm_reorder_timer_expired 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T iwm_auth +ffffffff81820610 T iwm_deauth +ffffffff81820970 T iwm_run +ffffffff81820ea0 T iwm_allow_mcast +ffffffff81820fa0 T iwm_run_stop +ffffffff818215c0 T iwm_node_alloc +ffffffff818215e0 T iwm_set_key_v1 +ffffffff81821720 T iwm_set_key +ffffffff81821980 T iwm_delete_key_v1 +ffffffff81821ab0 T iwm_delete_key +ffffffff81821d20 T iwm_calib_timeout +ffffffff81821de0 T iwm_set_rate_table_vht +ffffffff81822100 T iwm_set_rate_table +ffffffff818224c0 T iwm_media_change +ffffffff818226c0 T iwm_stop +ffffffff81822b40 T iwm_init +ffffffff81822e10 T iwm_newstate_task +ffffffff81822f90 T iwm_newstate +ffffffff818230f0 T iwm_endscan +ffffffff81823140 T iwm_fill_sf_command +ffffffff81823210 T iwm_send_soc_conf +ffffffff81823350 T iwm_send_update_mcc_cmd +ffffffff81823510 T iwm_send_temp_report_ths_cmd +ffffffff818235e0 T iwm_tt_tx_backoff +ffffffff81823670 T iwm_fill_paging_mem +ffffffff818239e0 T iwm_alloc_fw_paging_mem +ffffffff81823d80 T iwm_init_hw +ffffffff81824400 T iwm_preinit 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iwx_dma_contig_free +ffffffff81828610 T iwx_get_num_sections +ffffffff81828690 T iwx_init_fw_sec +ffffffff81828ae0 T iwx_fw_version_str +ffffffff81828b20 T iwx_alloc_fw_monitor_block +ffffffff81828bd0 T iwx_alloc_fw_monitor +ffffffff81828c90 T iwx_apply_debug_destination +ffffffff818291e0 T iwx_nic_lock +ffffffff81829330 T iwx_write_prph +ffffffff818293d0 T iwx_set_bits_prph +ffffffff818293f0 T iwx_clear_bits_prph +ffffffff81829410 T iwx_read_prph +ffffffff818294b0 T iwx_nic_unlock +ffffffff81829560 T iwx_set_ltr +ffffffff818296b0 T iwx_ctxt_info_init +ffffffff81829970 T iwx_ctxt_info_free_fw_img +ffffffff81829af0 T iwx_ctxt_info_gen3_init +ffffffff8182a0e0 T iwx_write_umac_prph +ffffffff8182a190 T iwx_firmware_store_section +ffffffff8182a230 T iwx_set_default_calib +ffffffff8182a280 T iwx_fw_info_free +ffffffff8182a310 T iwx_read_firmware +ffffffff8182ada0 T iwx_prph_addr_mask +ffffffff8182ade0 T iwx_read_prph_unlocked +ffffffff8182ae60 T iwx_nic_assert_locked +ffffffff8182aec0 T iwx_write_prph_unlocked +ffffffff8182af40 T iwx_write_prph64 +ffffffff8182b070 T iwx_read_umac_prph_unlocked +ffffffff8182b0f0 T iwx_read_umac_prph +ffffffff8182b190 T iwx_write_umac_prph_unlocked +ffffffff8182b210 T iwx_read_mem +ffffffff8182b340 T iwx_write_mem +ffffffff8182b480 T iwx_write_mem32 +ffffffff8182b590 T iwx_poll_bit +ffffffff8182b660 T iwx_set_bits_mask_prph +ffffffff8182b850 T iwx_alloc_rx_ring +ffffffff8182ba30 T iwx_rx_addbuf +ffffffff8182bc50 T iwx_free_rx_ring +ffffffff8182bf00 T iwx_disable_rx_dma +ffffffff8182c160 T iwx_reset_rx_ring +ffffffff8182c200 T iwx_alloc_tx_ring +ffffffff8182c410 T iwx_free_tx_ring +ffffffff8182c6a0 T iwx_reset_tx_ring +ffffffff8182c900 T iwx_enable_rfkill_int +ffffffff8182c9e0 T iwx_check_rfkill +ffffffff8182ca60 T iwx_enable_interrupts +ffffffff8182cb10 T iwx_enable_fwload_interrupt +ffffffff8182cbf0 T iwx_restore_interrupts +ffffffff8182cc20 T iwx_disable_interrupts +ffffffff8182cce0 T iwx_ict_reset +ffffffff8182cea0 T iwx_set_hw_ready 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iwx_setup_vht_rates +ffffffff8182fed0 T iwx_init_reorder_buffer +ffffffff8182ff30 T iwx_clear_reorder_buffer +ffffffff8182fff0 T iwx_rx_ba_session_expired +ffffffff818300f0 T iwx_rx_bar_frame_release +ffffffff818301a0 T iwx_release_frames +ffffffff81830390 T iwx_reorder_timer_expired +ffffffff81830560 T iwx_find_rxba_data +ffffffff818305f0 T iwx_sta_rx_agg_baid_cfg_cmd +ffffffff81830840 T iwx_send_cmd_pdu_status +ffffffff818308d0 T iwx_sta_rx_agg_sta_cmd +ffffffff81830b20 T iwx_sta_rx_agg +ffffffff81830df0 T iwx_mac_ctxt_task +ffffffff81830f80 T iwx_mac_ctxt_cmd +ffffffff81831180 T iwx_phy_ctxt_task +ffffffff81831330 T iwx_phy_ctxt_update +ffffffff81831780 T iwx_updatechan +ffffffff81831840 T iwx_add_task +ffffffff818318b0 T iwx_updateprot +ffffffff81831970 T iwx_updateslot +ffffffff81831a30 T iwx_updateedca +ffffffff81831af0 T iwx_updatedtim +ffffffff81831bb0 T iwx_sta_tx_agg_start +ffffffff81831da0 T iwx_ba_task +ffffffff81831ef0 T iwx_ampdu_rx_start +ffffffff81831fd0 T iwx_ampdu_rx_stop +ffffffff818320b0 T iwx_ampdu_tx_start +ffffffff81832160 T iwx_set_mac_addr_from_csr +ffffffff81832380 T iwx_flip_hw_address +ffffffff818323d0 T iwx_is_valid_mac_addr +ffffffff81832470 T iwx_nvm_get +ffffffff81832750 T iwx_load_firmware +ffffffff81832930 T iwx_start_fw +ffffffff81832b10 T iwx_pnvm_handle_section +ffffffff81832e10 T iwx_ctxt_info_gen3_set_pnvm +ffffffff81832e60 T iwx_pnvm_parse +ffffffff81832f50 T iwx_load_pnvm +ffffffff818332f0 T iwx_send_tx_ant_cfg +ffffffff81833380 T iwx_send_phy_cfg_cmd +ffffffff81833430 T iwx_send_dqa_cmd +ffffffff818334c0 T iwx_load_ucode_wait_alive +ffffffff81833580 T iwx_run_init_mvm_ucode +ffffffff818337e0 T iwx_config_ltr +ffffffff818338a0 T iwx_update_rx_desc +ffffffff81833940 T iwx_rxmq_get_signal_strength +ffffffff81833990 T iwx_rx_rx_phy_cmd +ffffffff818339f0 T iwx_get_noise +ffffffff81833a60 T iwx_ccmp_decap +ffffffff81833ba0 T iwx_rx_hwdecrypt +ffffffff81833ca0 T iwx_rx_frame +ffffffff81833f40 T iwx_detect_duplicate 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iwx_flush_sta +ffffffff81836f60 T iwx_beacon_filter_send_cmd +ffffffff81836ff0 T iwx_update_beacon_abort +ffffffff81837100 T iwx_power_build_cmd +ffffffff81837190 T iwx_power_mac_update_mode +ffffffff818373b0 T iwx_power_update_device +ffffffff81837450 T iwx_enable_beacon_filter +ffffffff81837560 T iwx_disable_beacon_filter +ffffffff81837650 T iwx_add_sta_cmd +ffffffff81837950 T iwx_rm_sta_cmd +ffffffff81837a10 T iwx_rm_sta +ffffffff81837e70 T iwx_disable_mgmt_queue +ffffffff81837f50 T iwx_umac_scan_fill_channels +ffffffff81838060 T iwx_fill_probe_req +ffffffff81838290 T iwx_config_umac_scan_reduced +ffffffff818383f0 T iwx_scan_umac_flags_v2 +ffffffff81838430 T iwx_scan_umac_dwell_v10 +ffffffff818384a0 T iwx_scan_umac_fill_general_p_v10 +ffffffff81838530 T iwx_scan_umac_fill_ch_p_v6 +ffffffff81838650 T iwx_umac_scan_v14 +ffffffff81838940 T iwx_mcc_update +ffffffff818389d0 T iwx_ridx2rate +ffffffff81838a40 T iwx_ack_rates +ffffffff81838d00 T iwx_mac_ctxt_cmd_common +ffffffff81839020 T iwx_mac_ctxt_cmd_fill_sta +ffffffff818390b0 T iwx_clear_statistics +ffffffff81839190 T iwx_del_task +ffffffff818391f0 T iwx_scan +ffffffff81839390 T iwx_scan_abort +ffffffff81839440 T iwx_bgscan +ffffffff818394c0 T iwx_bgscan_done +ffffffff81839560 T iwx_bgscan_done_task +ffffffff81839860 T iwx_umac_scan_abort +ffffffff818398f0 T iwx_enable_mgmt_queue +ffffffff81839980 T iwx_rs_rval2idx +ffffffff818399f0 T iwx_rs_ht_rates +ffffffff81839ac0 T iwx_rs_vht_rates +ffffffff81839b80 T iwx_rs_init_v3 +ffffffff81839f80 T iwx_rs_init_v4 +ffffffff8183a3a0 T iwx_rs_init +ffffffff8183a400 T iwx_rs_update +ffffffff8183a6a0 T iwx_phy_send_rlc +ffffffff8183a790 T iwx_auth +ffffffff8183aae0 T iwx_deauth +ffffffff8183ad80 T iwx_run +ffffffff8183b210 T iwx_sf_config +ffffffff8183b420 T iwx_allow_mcast +ffffffff8183b520 T iwx_run_stop +ffffffff8183b810 T iwx_node_alloc +ffffffff8183b830 T iwx_set_key +ffffffff8183b960 T iwx_add_sta_key +ffffffff8183bbd0 T iwx_setkey_task +ffffffff8183bcc0 T iwx_delete_key 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pcscp_dma_intr +ffffffff81847a80 T pcscp_dma_setup +ffffffff81847cf0 T pcscp_dma_go +ffffffff81847e20 T pcscp_dma_stop +ffffffff81847eb0 T pcscp_dma_isactive +ffffffff81848000 T bge_probe +ffffffff81848030 T bge_attach +ffffffff81849450 T bge_detach +ffffffff818495a0 T bge_activate +ffffffff81849650 T bge_readmem_ind +ffffffff81849700 T bge_writemem_ind +ffffffff818497d0 T bge_writereg_ind +ffffffff81849820 T bge_writembx +ffffffff81849870 T bge_ape_lock_init +ffffffff81849a90 T bge_ape_read_fw_ver +ffffffff81849bf0 T bge_ape_lock +ffffffff81849da0 T bge_ape_unlock +ffffffff81849e60 T bge_ape_send_event +ffffffff8184a050 T bge_ape_driver_state_change +ffffffff8184a220 T bge_nvram_getbyte +ffffffff8184a470 T bge_read_nvram +ffffffff8184a520 T bge_eeprom_getbyte +ffffffff8184a6a0 T bge_read_eeprom +ffffffff8184a730 T bge_miibus_readreg +ffffffff8184aa10 T bge_miibus_writereg +ffffffff8184ad10 T bge_miibus_statchg +ffffffff8184af10 T bge_newbuf +ffffffff8184b0a0 T bge_newbuf_jumbo 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vmx_kstat_read +ffffffff8189d000 T vmwpvs_match +ffffffff8189d040 T vmwpvs_attach +ffffffff8189d980 T vmwpvs_scsi_cmd +ffffffff8189ddf0 T vmwpvs_intx +ffffffff8189de70 T vmwpvs_msg_task +ffffffff8189e0e0 T vmwpvs_intr +ffffffff8189e2d0 T vmwpvs_get_config +ffffffff8189e4d0 T vmwpvs_dmamem_zalloc +ffffffff8189e530 T vmwpvs_dmamem_alloc +ffffffff8189e6b0 T vmwpvs_ccb_put +ffffffff8189e710 T vmwpvs_setup_rings +ffffffff8189e820 T vmwpvs_setup_msg_ring +ffffffff8189e8f0 T vmwpvs_ccb_get +ffffffff8189e970 T vmwpvs_dmamem_free +ffffffff8189e9f0 T vmwpvs_cmd +ffffffff8189ea90 T vmwpvs_scsi_cmd_done +ffffffff8189ec70 T vmwpvs_scsi_cmd_poll +ffffffff8189f000 T lii_match +ffffffff8189f030 T lii_attach +ffffffff8189f420 T lii_activate +ffffffff8189f520 T lii_reset +ffffffff8189f7f0 T lii_spi_configure +ffffffff8189f8e0 T lii_eeprom_present +ffffffff8189f970 T lii_eeprom_read +ffffffff8189f9a0 T lii_spi_read +ffffffff8189fc60 T lii_read_macaddr +ffffffff8189fdc0 T lii_intr +ffffffff8189fed0 T lii_alloc_rings +ffffffff818a00e0 T lii_tick +ffffffff818a0130 T lii_mii_readreg +ffffffff818a03d0 T lii_mii_writereg +ffffffff818a0670 T lii_mii_statchg +ffffffff818a06e0 T lii_media_change +ffffffff818a0730 T lii_media_status +ffffffff818a0790 T lii_ioctl +ffffffff818a0920 T lii_start +ffffffff818a0ad0 T lii_watchdog +ffffffff818a0b10 T lii_stop +ffffffff818a0b80 T lii_init +ffffffff818a1070 T lii_iff +ffffffff818a11b0 T lii_tx_put +ffffffff818a12c0 T lii_free_tx_space +ffffffff818a1300 T lii_rxintr +ffffffff818a14b0 T lii_txintr +ffffffff818a2000 T ichiic_match +ffffffff818a2030 T ichiic_attach +ffffffff818a2220 T ichiic_intr +ffffffff818a2340 T ichiic_i2c_acquire_bus +ffffffff818a23a0 T ichiic_i2c_release_bus +ffffffff818a23f0 T ichiic_i2c_exec +ffffffff818a3000 T viapm_match +ffffffff818a3030 T viapm_attach +ffffffff818a3680 T viapm_intr +ffffffff818a3790 T viapm_i2c_acquire_bus +ffffffff818a37f0 T viapm_i2c_release_bus +ffffffff818a3840 T viapm_i2c_exec +ffffffff818a3b50 T viapm_refresh_sensor_data +ffffffff818a3e50 T viapm_refresh +ffffffff818a3e80 T val_to_uK +ffffffff818a3f20 T val_to_rpm +ffffffff818a3f60 T val_to_uV +ffffffff818a4000 T viapm_get_timecount +ffffffff818a5000 T amdiic_match +ffffffff818a5030 T amdiic_attach +ffffffff818a5200 T amdiic_intr +ffffffff818a52d0 T amdiic_i2c_acquire_bus +ffffffff818a5330 T amdiic_i2c_release_bus +ffffffff818a5380 T amdiic_i2c_exec +ffffffff818a55e0 T amdiic_read +ffffffff818a5750 T amdiic_wait +ffffffff818a57f0 T amdiic_write +ffffffff818a6000 T nviic_match +ffffffff818a6030 T nviic_attach +ffffffff818a6270 T nviic_i2c_acquire_bus +ffffffff818a62c0 T nviic_i2c_release_bus +ffffffff818a6310 T nviic_i2c_exec +ffffffff818a65a0 T nviic_write +ffffffff818a65f0 T nviic_read +ffffffff818a7000 T sdhc_pci_match +ffffffff818a7060 T sdhc_pci_attach +ffffffff818a73a0 T sdhc_pci_activate +ffffffff818a7400 T sdhc_takecontroller +ffffffff818a74a0 T sdhc_ricohfix +ffffffff818a7610 T sdhc_pci_conf_write +ffffffff818a8000 T kate_match +ffffffff818a8170 T kate_attach +ffffffff818a84b0 T kate_refresh +ffffffff818a9000 T km_match +ffffffff818a9050 T km_attach +ffffffff818a90f0 T km_refresh +ffffffff818aa000 T ksmn_match +ffffffff818aa050 T ksmn_attach +ffffffff818aa240 T ksmn_ccd_attach +ffffffff818aa390 T ksmn_refresh +ffffffff818aa4e0 T ksmn_read_reg +ffffffff818ab000 t iosf_pci_match +ffffffff818ab060 t iosf_pci_attach +ffffffff818ab100 t iosf_pci_mbi_mdr_rd +ffffffff818ab160 t iosf_pci_mbi_mdr_wr +ffffffff818ac000 T itherm_probe +ffffffff818ac030 T itherm_attach +ffffffff818ac3e0 T itherm_activate +ffffffff818ac460 T itherm_enable +ffffffff818ac4c0 T itherm_refresh +ffffffff818ac4d0 T itherm_refresh_sensor_data +ffffffff818ac8c0 T itherm_bias_temperature_sensor +ffffffff818ad000 T pchtemp_match +ffffffff818ad030 T pchtemp_attach +ffffffff818ad1a0 T pchtemp_refresh +ffffffff818ae000 T rtsx_pci_match +ffffffff818ae080 T rtsx_pci_attach +ffffffff818af000 T xspd_match +ffffffff818af030 T xspd_attach +ffffffff818af1f0 T xspd_intr +ffffffff818b0000 T virtio_pci_match +ffffffff818b0080 T virtio_pci_attach +ffffffff818b0420 T virtio_pci_detach +ffffffff818b0500 T virtio_pci_kick +ffffffff818b0560 T virtio_pci_read_device_config_1 +ffffffff818b0590 T virtio_pci_read_device_config_2 +ffffffff818b05c0 T virtio_pci_read_device_config_4 +ffffffff818b05f0 T virtio_pci_read_device_config_8 +ffffffff818b0670 T virtio_pci_write_device_config_1 +ffffffff818b06a0 T virtio_pci_write_device_config_2 +ffffffff818b06d0 T virtio_pci_write_device_config_4 +ffffffff818b0700 T virtio_pci_write_device_config_8 +ffffffff818b0770 T virtio_pci_read_queue_size +ffffffff818b07e0 T virtio_pci_setup_queue +ffffffff818b0ac0 T virtio_pci_set_status +ffffffff818b0bf0 T virtio_pci_negotiate_features +ffffffff818b0d30 T virtio_pci_poll_intr +ffffffff818b0da0 T virtio_pci_find_cap +ffffffff818b0f40 T virtio_pci_attach_10 +ffffffff818b13a0 T virtio_pci_attach_09 +ffffffff818b14e0 T virtio_pci_adjust_config_region +ffffffff818b1580 T virtio_pci_setup_msix +ffffffff818b1910 T virtio_pci_legacy_intr +ffffffff818b19b0 T virtio_pci_legacy_intr_mpsafe +ffffffff818b1a40 T virtio_pci_free_irqs +ffffffff818b1c80 T virtio_pci_negotiate_features_10 +ffffffff818b1eb0 T virtio_pci_msix_establish +ffffffff818b1f80 T virtio_pci_set_msix_queue_vector +ffffffff818b2000 T virtio_pci_set_msix_config_vector +ffffffff818b2040 T virtio_pci_config_intr +ffffffff818b2080 T virtio_pci_shared_queue_intr +ffffffff818b2090 T virtio_pci_queue_intr +ffffffff818b3000 T dwiic_pci_match +ffffffff818b3030 T dwiic_pci_attach +ffffffff818b3350 T dwiic_pci_activate +ffffffff818b33c0 T dwiic_pci_bus_scan +ffffffff818b4000 T bwfm_pci_buscore_read +ffffffff818b4060 T bwfm_pci_buscore_write +ffffffff818b40d0 T bwfm_pci_buscore_prepare +ffffffff818b4100 T bwfm_pci_buscore_reset +ffffffff818b42f0 T bwfm_pci_buscore_activate +ffffffff818b4320 T bwfm_pci_preinit +ffffffff818b5130 T bwfm_pci_stop +ffffffff818b51c0 T bwfm_pci_txcheck +ffffffff818b5280 T bwfm_pci_txdata +ffffffff818b55d0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818b5a00 T bwfm_pci_msgbuf_set_dcmd +ffffffff818b5a50 T bwfm_pci_match +ffffffff818b5a80 T bwfm_pci_attach +ffffffff818b5cf0 T bwfm_pci_detach +ffffffff818b5d30 T bwfm_pci_activate +ffffffff818b5ee0 T bwfm_pci_intr +ffffffff818b6140 T bwfm_pci_select_core +ffffffff818b6220 T bwfm_pci_load_microcode +ffffffff818b66b0 T bwfm_pci_dmamem_alloc +ffffffff818b6850 T bwfm_pci_setup_ring +ffffffff818b6a50 T bwfm_pci_intr_enable +ffffffff818b6aa0 T bwfm_pci_hostready +ffffffff818b6b10 T bwfm_pci_fill_rx_rings +ffffffff818b6b60 T bwfm_pci_dmamem_free +ffffffff818b6bd0 T bwfm_pci_cleanup +ffffffff818b7240 T bwfm_pci_send_mb_data +ffffffff818b7360 T bwfm_pci_intmask +ffffffff818b73a0 T bwfm_pci_pktid_avail +ffffffff818b7420 T bwfm_pci_pktid_new +ffffffff818b7570 T bwfm_pci_pktid_free +ffffffff818b7620 T bwfm_pci_fill_rx_buf_ring +ffffffff818b7960 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818b7cc0 T bwfm_pci_ring_write_reserve +ffffffff818b7db0 T bwfm_pci_ring_write_cancel +ffffffff818b7df0 T bwfm_pci_ring_write_commit +ffffffff818b7ed0 T bwfm_pci_ring_write_rptr +ffffffff818b7f50 T bwfm_pci_ring_write_wptr +ffffffff818b7fd0 T bwfm_pci_setup_flowring +ffffffff818b8120 T bwfm_pci_ring_bell +ffffffff818b8160 T bwfm_pci_ring_update_rptr +ffffffff818b8210 T bwfm_pci_ring_update_wptr +ffffffff818b82c0 T bwfm_pci_ring_write_reserve_multi +ffffffff818b83e0 T bwfm_pci_ring_read_avail +ffffffff818b84e0 T bwfm_pci_ring_read_commit +ffffffff818b8570 T bwfm_pci_ring_rx +ffffffff818b8770 T bwfm_pci_msg_rx +ffffffff818b8d50 T bwfm_pci_flowring_delete_cb +ffffffff818b8e00 T bwfm_pci_msgbuf_rxioctl +ffffffff818b8ef0 T bwfm_pci_intr_status +ffffffff818b8f30 T bwfm_pci_intr_ack +ffffffff818b8f70 T bwfm_pci_flowring_lookup +ffffffff818b90e0 T bwfm_pci_flowring_create +ffffffff818b9210 T bwfm_pci_flowring_create_cb +ffffffff818b9550 T bwfm_pci_flowring_delete +ffffffff818b9820 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818b9a30 T bwfm_pci_handle_mb_data +ffffffff818b9b00 T bwfm_pci_intr_disable +ffffffff818ba000 T ccp_pci_match +ffffffff818ba030 T ccp_pci_attach +ffffffff818bb000 T bnxt_match +ffffffff818bb030 T bnxt_attach +ffffffff818bbbe0 T bnxt_dmamem_alloc +ffffffff818bbd70 T bnxt_dmamem_free +ffffffff818bbe00 T bnxt_hwrm_ver_get +ffffffff818bbf50 T bnxt_hwrm_nvm_get_dev_info +ffffffff818bc0a0 T bnxt_hwrm_func_drv_rgtr +ffffffff818bc1c0 T bnxt_hwrm_func_rgtr_async_events +ffffffff818bc2e0 T bnxt_hwrm_func_qcaps +ffffffff818bc3c0 T bnxt_admin_intr +ffffffff818bc5b0 T bnxt_intr +ffffffff818bca60 T bnxt_hwrm_func_qcfg +ffffffff818bcb10 T bnxt_hwrm_queue_qportcfg +ffffffff818bcbe0 T bnxt_hwrm_func_reset +ffffffff818bcc90 T bnxt_mark_cpr_invalid +ffffffff818bccf0 T bnxt_hwrm_ring_alloc +ffffffff818bcea0 T bnxt_cfg_async_cr +ffffffff818bcfa0 T bnxt_write_cp_doorbell +ffffffff818bcfe0 T bnxt_set_cp_ring_aggint +ffffffff818bd0c0 T bnxt_ioctl +ffffffff818bd250 T bnxt_start +ffffffff818bd7d0 T bnxt_watchdog +ffffffff818bd800 T bnxt_media_change +ffffffff818bd950 T bnxt_media_status +ffffffff818bd970 T bnxt_refill +ffffffff818bd9d0 T bnxt_media_autonegotiate +ffffffff818bdac0 T bnxt_hwrm_port_phy_qcfg +ffffffff818bdf40 T bnxt_free_slots +ffffffff818bdfe0 T bnxt_hwrm_cmd_hdr_init +ffffffff818be030 T hwrm_send_message +ffffffff818be0b0 T bnxt_queue_up +ffffffff818bec30 T bnxt_hwrm_stat_ctx_alloc +ffffffff818bed30 T bnxt_write_tx_doorbell +ffffffff818beda0 T bnxt_write_rx_doorbell +ffffffff818bee20 T bnxt_hwrm_ring_grp_alloc +ffffffff818bef20 T bnxt_rx_fill +ffffffff818bf030 T bnxt_hwrm_ring_grp_free +ffffffff818bf110 T bnxt_hwrm_ring_free +ffffffff818bf200 T bnxt_hwrm_stat_ctx_free +ffffffff818bf2f0 T bnxt_queue_down +ffffffff818bfa10 T bnxt_up +ffffffff818bffa0 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818c0080 T bnxt_hwrm_vnic_alloc +ffffffff818c0180 T bnxt_hwrm_vnic_cfg +ffffffff818c02c0 T bnxt_hwrm_vnic_cfg_placement +ffffffff818c0390 T bnxt_hwrm_set_filter +ffffffff818c0520 T bnxt_hwrm_vnic_rss_cfg +ffffffff818c0600 T bnxt_iff +ffffffff818c0770 T bnxt_hwrm_vnic_free +ffffffff818c0860 T bnxt_hwrm_vnic_ctx_free +ffffffff818c0950 T bnxt_down +ffffffff818c0d20 T bnxt_hwrm_free_filter +ffffffff818c0e00 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff818c0ee0 T bnxt_rxrinfo +ffffffff818c1030 T bnxt_get_sffpage +ffffffff818c1340 T bnxt_load_mbuf +ffffffff818c13f0 T bnxt_handle_async_event +ffffffff818c1440 T bnxt_cpr_next_cmpl +ffffffff818c14b0 T bnxt_cpr_commit +ffffffff818c14e0 T bnxt_cpr_rollback +ffffffff818c1510 T bnxt_write_cp_doorbell_index +ffffffff818c1590 T bnxt_rx +ffffffff818c1830 T bnxt_txeof +ffffffff818c1960 T bnxt_get_media_type +ffffffff818c1ec0 T bnxt_add_media_type +ffffffff818c2080 T _hwrm_send_message +ffffffff818c4da0 T bnxt_rx_fill_slots +ffffffff818c4f80 T bnxt_hwrm_err_map +ffffffff818c4fc0 T _bnxt_hwrm_set_async_event_bit +ffffffff818c6000 t mcx_match +ffffffff818c6030 t mcx_attach +ffffffff818c6c40 T mcx_rx_fill +ffffffff818c6e90 T mcx_load_mbuf +ffffffff818c6f40 t mcx_dmamem_alloc +ffffffff818c70a0 t mcx_init_wait +ffffffff818c7130 t mcx_enable_hca +ffffffff818c7310 t mcx_issi +ffffffff818c7680 t mcx_pages +ffffffff818c7f60 t mcx_hca_max_caps +ffffffff818c84e0 t mcx_hca_set_caps +ffffffff818c89c0 t mcx_init_hca +ffffffff818c8b90 t mcx_set_driver_version +ffffffff818c8ef0 t mcx_iff +ffffffff818c9330 t mcx_alloc_uar +ffffffff818c9520 t mcx_alloc_pd +ffffffff818c9700 t mcx_alloc_tdomain +ffffffff818c98e0 t mcx_admin_intr +ffffffff818c9a90 t mcx_create_eq +ffffffff818ca030 t mcx_query_nic_vport_context +ffffffff818ca3e0 t mcx_query_special_contexts +ffffffff818ca5c0 t mcx_set_port_mtu +ffffffff818ca6d0 t mcx_ioctl +ffffffff818cc9a0 t mcx_start +ffffffff818ccea0 t mcx_watchdog +ffffffff818cced0 t mcx_media_change +ffffffff818cd190 t mcx_media_status +ffffffff818cd2e0 t mcx_media_add_types +ffffffff818cd400 t mcx_refill +ffffffff818cd470 t mcx_cq_intr +ffffffff818cda50 t mcx_calibrate +ffffffff818cdbf0 t mcx_port_change +ffffffff818cdd40 t mcx_kstat_attach +ffffffff818ce110 t mcx_teardown_hca +ffffffff818ce300 t mcx_dmamem_free +ffffffff818ce370 t mcx_set_issi +ffffffff818ce520 t mcx_set_flow_table_entry_mac +ffffffff818ce9f0 t mcx_delete_flow_table_entry +ffffffff818cee70 t mcx_access_hca_reg +ffffffff818cf280 t mcx_cmdq_exec +ffffffff818cf500 t mcx_down +ffffffff818d04c0 t mcx_create_flow_table +ffffffff818d0870 t mcx_create_flow_group +ffffffff818d0d40 t mcx_set_flow_table_root +ffffffff818d10c0 t mcx_create_rqt +ffffffff818d14c0 t mcx_create_tir_direct +ffffffff818d17e0 t mcx_create_tir_indirect +ffffffff818d1b20 t mcx_set_flow_table_entry_proto +ffffffff818d2000 t mcx_ready_sq +ffffffff818d2390 t mcx_ready_rq +ffffffff818d2720 t mcx_calibrate_first +ffffffff818d2810 t mcx_create_rq +ffffffff818d2d20 t mcx_destroy_sq +ffffffff818d2fd0 t mcx_destroy_cq +ffffffff818d3290 t mcx_destroy_flow_table +ffffffff818d3600 t mcx_kstat_attach_ppcnt +ffffffff818d3730 t mcx_kstat_ppcnt_read +ffffffff818d3850 t mcx_kstat_mtmp_read +ffffffff818d39e0 t mcx_kstat_queue_read +ffffffff818d49a0 t mcx_timecounter_read +ffffffff818d5000 t iavf_match +ffffffff818d5030 t iavf_attach +ffffffff818d58a0 t iavf_reset +ffffffff818d5b60 t iavf_dmamem_alloc +ffffffff818d5cc0 t iavf_arq_fill +ffffffff818d5f80 t iavf_arq_timeout +ffffffff818d5fb0 t iavf_init_admin_queue +ffffffff818d6160 t iavf_get_version +ffffffff818d6360 t iavf_get_vf_resources +ffffffff818d6530 t iavf_config_irq_map +ffffffff818d6710 t iavf_intr +ffffffff818d6d90 t iavf_ioctl +ffffffff818d72f0 t iavf_start +ffffffff818d7650 t iavf_watchdog +ffffffff818d7680 t iavf_media_change +ffffffff818d76b0 t iavf_media_status +ffffffff818d7740 t iavf_dmamem_free +ffffffff818d77b0 t iavf_arq_unfill +ffffffff818d78b0 t iavf_down +ffffffff818d7c40 t iavf_up +ffffffff818d8610 t iavf_queue_select +ffffffff818d8800 t iavf_txr_free +ffffffff818d8900 t iavf_rxr_free +ffffffff818d8a10 t iavf_rxfill +ffffffff818d8d20 t iavf_rxrefill +ffffffff818d8d40 t iavf_process_arq +ffffffff818d91c0 t iavf_add_del_addr +ffffffff818da000 T rge_match +ffffffff818da030 T rge_attach +ffffffff818da4c0 T rge_activate +ffffffff818da600 T rge_intr +ffffffff818da8f0 T rge_config_imtype +ffffffff818da960 T rge_chipinit +ffffffff818daa70 T rge_get_macaddr +ffffffff818dac40 T rge_allocmem +ffffffff818db040 T rge_ioctl +ffffffff818db1f0 T rge_start +ffffffff818db3d0 T rge_watchdog +ffffffff818db410 T rge_wol +ffffffff818db640 T rge_tick +ffffffff818db6c0 T rge_txstart +ffffffff818db6f0 T rge_ifmedia_upd +ffffffff818dbcc0 T rge_ifmedia_sts +ffffffff818dbdb0 T rge_add_media_types +ffffffff818dbe60 T rge_kstat_attach +ffffffff818dc140 T rge_wol_power +ffffffff818dc220 T rge_rxeof +ffffffff818dc660 T rge_txeof +ffffffff818dc870 T rge_init +ffffffff818ddf20 T rge_setup_intr +ffffffff818de090 T rge_encap +ffffffff818de360 T rge_stop +ffffffff818de640 T rge_iff +ffffffff818de7c0 T rge_set_macaddr +ffffffff818de890 T rge_rx_list_init +ffffffff818de950 T rge_tx_list_init +ffffffff818dea20 T rge_phy_config +ffffffff818df6d0 T rge_disable_aspm_clkreq +ffffffff818df7d0 T rge_read_csi +ffffffff818df880 T rge_write_csi +ffffffff818df950 T rge_write_mac_ocp +ffffffff818df9a0 T rge_read_mac_ocp +ffffffff818dfa20 T rge_hw_reset +ffffffff818dfb20 T rge_write_phy_ocp +ffffffff818dfbe0 T rge_read_phy_ocp +ffffffff818dfc90 T rge_read_phy +ffffffff818dfd60 T rge_write_phy +ffffffff818dfe40 T rge_get_link_status +ffffffff818dfea0 T rge_newbuf +ffffffff818e0030 T rge_discard_rxbuf +ffffffff818e00a0 T rge_fill_rx_ring +ffffffff818e0120 T rge_reset +ffffffff818e0390 T rge_exit_oob +ffffffff818e0b90 T rge_set_phy_power +ffffffff818e0df0 T rge_hw_init +ffffffff818e1540 T rge_ephy_config +ffffffff818e1590 T rge_ephy_config_mac_cfg3 +ffffffff818e17e0 T rge_ephy_config_mac_cfg5 +ffffffff818e18c0 T rge_write_ephy +ffffffff818e1b20 T rge_read_ephy +ffffffff818e1da0 T rge_phy_config_mac_cfg3 +ffffffff818e38d0 T rge_phy_config_mac_cfg5 +ffffffff818e4420 T rge_patch_phy_mcu +ffffffff818e4740 T rge_phy_config_mcu +ffffffff818e4f40 T rge_switch_mcu_ram_page +ffffffff818e4fd0 T rge_disable_phy_ocp_pwrsave +ffffffff818e51a0 T rge_disable_hw_im +ffffffff818e51d0 T rge_disable_sim_im +ffffffff818e5230 T rge_setup_sim_im +ffffffff818e52b0 T rge_link_state +ffffffff818e5330 t rge_kstat_read +ffffffff818e54d0 t rge_kstat_copy +ffffffff818e6000 T igc_match +ffffffff818e6030 T igc_attach +ffffffff818e6360 T igc_detach +ffffffff818e6550 T igc_identify_hardware +ffffffff818e65c0 T igc_allocate_pci_resources +ffffffff818e66e0 T igc_allocate_queues +ffffffff818e6bd0 T igc_is_valid_ether_addr +ffffffff818e6c30 T igc_allocate_msix +ffffffff818e6e70 T igc_setup_interface +ffffffff818e70b0 T igc_reset +ffffffff818e71f0 T igc_update_link_status +ffffffff818e7300 T igc_get_hw_control +ffffffff818e7360 T igc_release_hw_control +ffffffff818e73c0 T igc_free_pci_resources +ffffffff818e74a0 T igc_stop +ffffffff818e77a0 T igc_free_transmit_structures +ffffffff818e7820 T igc_free_receive_structures +ffffffff818e78d0 T igc_setup_msix +ffffffff818e7960 T igc_dma_malloc +ffffffff818e7ac0 T igc_rxrefill +ffffffff818e7b90 T igc_dma_free +ffffffff818e7c40 T igc_init_dmac +ffffffff818e7ee0 T igc_intr_queue +ffffffff818e7ff0 T igc_intr_link +ffffffff818e8170 T igc_ioctl +ffffffff818e8450 T igc_start +ffffffff818e8880 T igc_watchdog +ffffffff818e88b0 T igc_media_change +ffffffff818e89c0 T igc_media_status +ffffffff818e8b60 T igc_init +ffffffff818e9050 T igc_setup_transmit_structures +ffffffff818e9110 T igc_initialize_transmit_unit +ffffffff818e9330 T igc_setup_receive_structures +ffffffff818e9490 T igc_initialize_receive_unit +ffffffff818e9880 T igc_iff +ffffffff818e99d0 T igc_configure_queues +ffffffff818e9be0 T igc_rxfill +ffffffff818e9d20 T igc_enable_intr +ffffffff818e9df0 T igc_tx_ctx_setup +ffffffff818e9f00 T igc_txeof +ffffffff818ea0c0 T igc_disable_intr +ffffffff818ea160 T igc_rxrinfo +ffffffff818ea290 T igc_get_buf +ffffffff818ea3d0 T igc_rxeof +ffffffff818ea770 T igc_rx_checksum +ffffffff818ea7c0 T igc_set_queues +ffffffff818ea8a0 T igc_enable_queue +ffffffff818ea8d0 T igc_allocate_transmit_buffers +ffffffff818ea9f0 T igc_setup_transmit_ring +ffffffff818eab30 T igc_free_transmit_buffers +ffffffff818eac50 T igc_allocate_receive_buffers +ffffffff818ead80 T igc_setup_receive_ring +ffffffff818eae40 T igc_initialize_rss_mapping +ffffffff818eb060 T igc_free_receive_buffers +ffffffff818ec000 T igc_init_mac_params +ffffffff818ec040 T igc_init_nvm_params +ffffffff818ec080 T igc_init_phy_params +ffffffff818ec0c0 T igc_set_mac_type +ffffffff818ec160 T igc_setup_init_funcs +ffffffff818ec2c0 T igc_update_mc_addr_list +ffffffff818ec300 T igc_check_for_link +ffffffff818ec340 T igc_reset_hw +ffffffff818ec380 T igc_init_hw +ffffffff818ec3c0 T igc_get_speed_and_duplex +ffffffff818ec400 T igc_rar_set +ffffffff818ec440 T igc_check_reset_block +ffffffff818ec480 T igc_get_phy_info +ffffffff818ec4c0 T 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drm_file_get_master +ffffffff81917920 T drm_master_internal_acquire +ffffffff81917990 T drm_master_internal_release +ffffffff81918000 T drm_plane_create_alpha_property +ffffffff819180a0 T drm_plane_create_rotation_property +ffffffff819181e0 T drm_rotation_simplify +ffffffff81918250 T drm_plane_create_zpos_property +ffffffff81918310 T drm_plane_create_zpos_immutable_property +ffffffff819183c0 T drm_atomic_normalize_zpos +ffffffff819186b0 T drm_plane_create_blend_mode_property +ffffffff81918850 t drm_atomic_state_zpos_cmp +ffffffff81919000 T drm_bridge_add +ffffffff81919070 T devm_drm_bridge_add +ffffffff81919110 T drm_bridge_remove +ffffffff81919170 T drm_bridge_attach +ffffffff81919330 T drm_bridge_detach +ffffffff81919420 T drm_bridge_chain_mode_fixup +ffffffff819194c0 T drm_bridge_chain_mode_valid +ffffffff81919560 T drm_bridge_chain_mode_set +ffffffff819195f0 T drm_atomic_bridge_chain_disable +ffffffff819196f0 T drm_atomic_bridge_chain_post_disable +ffffffff81919920 T drm_atomic_bridge_chain_pre_enable +ffffffff81919b60 T drm_atomic_bridge_chain_enable +ffffffff81919c70 T drm_atomic_bridge_chain_check +ffffffff8191a000 T drm_bridge_detect +ffffffff8191a060 T drm_bridge_get_modes +ffffffff8191a0c0 T drm_bridge_get_edid +ffffffff8191a120 T drm_bridge_hpd_enable +ffffffff8191a1f0 T drm_bridge_hpd_disable +ffffffff8191a290 T drm_bridge_hpd_notify +ffffffff8191a2f0 t drm_bridge_atomic_duplicate_priv_state +ffffffff8191a310 t drm_bridge_atomic_destroy_priv_state +ffffffff8191a330 t select_bus_fmt_recursive +ffffffff8191b000 T drm_buddy_init +ffffffff8191b470 T drm_buddy_fini +ffffffff8191b560 T drm_get_buddy +ffffffff8191b5a0 T drm_buddy_free_block +ffffffff8191b5f0 t __drm_buddy_free +ffffffff8191b740 T drm_buddy_free_list +ffffffff8191b800 T drm_buddy_block_trim +ffffffff8191ba60 t __alloc_range +ffffffff8191bd40 T drm_buddy_alloc_blocks +ffffffff8191c350 t __drm_buddy_alloc_range +ffffffff8191c3e0 T drm_buddy_block_print +ffffffff8191c420 T drm_buddy_print +ffffffff8191c590 T drm_buddy_module_exit +ffffffff8191c5b0 T drm_buddy_module_init +ffffffff8191c610 t split_block +ffffffff8191d000 T drm_clflush_pages +ffffffff8191d120 T drm_clflush_sg +ffffffff8191d270 T drm_clflush_virt_range +ffffffff8191d340 T drm_need_swiotlb +ffffffff8191d370 T drm_memcpy_from_wc +ffffffff8191d810 T drm_memcpy_init_early +ffffffff8191e000 T drm_client_init +ffffffff8191e110 T drm_client_register +ffffffff8191e1c0 T drm_client_release +ffffffff8191e260 T drm_client_dev_unregister +ffffffff8191e350 T drm_client_dev_hotplug +ffffffff8191e480 T drm_client_dev_restore +ffffffff8191e560 T drm_client_buffer_vmap +ffffffff8191e5d0 T drm_client_buffer_vunmap +ffffffff8191e5f0 T drm_client_framebuffer_create +ffffffff8191e890 T drm_client_framebuffer_delete +ffffffff8191e970 T drm_client_framebuffer_flush +ffffffff8191f000 T drm_client_modeset_create +ffffffff8191f140 T drm_client_modeset_free +ffffffff8191f240 T drm_client_modeset_probe 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drm_connector_init +ffffffff819233a0 t __drm_connector_init +ffffffff81923710 T drm_connector_init_with_ddc +ffffffff819237a0 T drmm_connector_init +ffffffff81923860 t drm_connector_cleanup_action +ffffffff81923880 T drm_connector_attach_edid_property +ffffffff819238a0 T drm_connector_attach_encoder +ffffffff81923920 T drm_connector_has_possible_encoder +ffffffff81923960 T drm_connector_cleanup +ffffffff81923ca0 T drm_connector_unregister +ffffffff81923d40 T drm_mode_put_tile_group +ffffffff81923dd0 T drm_connector_register +ffffffff81923ec0 T drm_connector_unregister_all +ffffffff81924060 T drm_connector_list_iter_begin +ffffffff819240a0 T drm_connector_list_iter_next +ffffffff819241b0 T drm_connector_list_iter_end +ffffffff81924280 T drm_connector_register_all +ffffffff81924410 T drm_get_connector_status_name +ffffffff81924460 T drm_get_connector_force_name +ffffffff819244a0 T drm_get_subpixel_order_name +ffffffff819244e0 T drm_get_dpms_name +ffffffff81924520 T drm_display_info_set_bus_formats +ffffffff819245f0 T drm_get_dvi_i_select_name +ffffffff81924650 T drm_get_dvi_i_subconnector_name +ffffffff819246b0 T drm_get_tv_mode_name +ffffffff819246f0 T drm_get_tv_mode_from_name +ffffffff81924890 T drm_get_tv_select_name +ffffffff819248f0 T drm_get_tv_subconnector_name +ffffffff81924950 T drm_get_dp_subconnector_name +ffffffff819249e0 T drm_get_colorspace_name +ffffffff81924a20 T drm_connector_create_standard_properties +ffffffff81924ba0 T drm_mode_create_dvi_i_properties +ffffffff81924c40 T drm_connector_attach_dp_subconnector_property +ffffffff81924cb0 T drm_connector_attach_content_type_property +ffffffff81924d50 T drm_mode_create_content_type_property +ffffffff81924dd0 T drm_connector_attach_tv_margin_properties +ffffffff81924e40 T drm_mode_create_tv_margin_properties +ffffffff81924f60 T drm_mode_create_tv_properties_legacy +ffffffff819251b0 T drm_mode_create_tv_properties +ffffffff81925390 T drm_mode_create_scaling_mode_property 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drm_connector_set_panel_orientation_with_quirk +ffffffff81925f00 T drm_connector_set_orientation_from_panel +ffffffff81925ff0 T drm_connector_create_privacy_screen_properties +ffffffff81926090 T drm_connector_attach_privacy_screen_properties +ffffffff81926100 T drm_connector_attach_privacy_screen_provider +ffffffff81926210 t drm_connector_privacy_screen_notifier +ffffffff819262b0 T drm_connector_update_privacy_screen +ffffffff81926320 T drm_connector_set_obj_prop +ffffffff81926400 T drm_connector_property_set_ioctl +ffffffff81926460 T drm_mode_getconnector +ffffffff81926960 T drm_connector_find_by_fwnode +ffffffff81926a10 T drm_connector_oob_hotplug_event +ffffffff81926b00 T drm_mode_get_tile_group +ffffffff81926bd0 T drm_mode_create_tile_group +ffffffff81926ca0 t drm_connector_free +ffffffff81926ce0 t kasprintf +ffffffff81927000 T drm_crtc_from_index +ffffffff81927060 T drm_crtc_force_disable +ffffffff819271a0 T drm_mode_set_config_internal +ffffffff81927220 T drm_crtc_register_all +ffffffff819272a0 T drm_crtc_unregister_all +ffffffff81927310 T drm_crtc_create_fence +ffffffff819273a0 T drm_crtc_init_with_planes +ffffffff81927470 t __drm_crtc_init_with_planes +ffffffff81927870 T drmm_crtc_init_with_planes +ffffffff81927970 T __drmm_crtc_alloc_with_planes +ffffffff81927ae0 T drm_crtc_cleanup +ffffffff81927c00 T drm_mode_getcrtc +ffffffff81927da0 t __drm_mode_set_config_internal +ffffffff81927f50 T drm_crtc_check_viewport +ffffffff81928000 T drm_mode_setcrtc +ffffffff81928780 T drm_mode_crtc_set_obj_prop +ffffffff81928800 T drm_crtc_create_scaling_filter_property +ffffffff81928870 t drm_crtc_fence_get_driver_name +ffffffff819288f0 t drm_crtc_fence_get_timeline_name +ffffffff81928960 t kasprintf +ffffffff81928a30 t drmm_crtc_init_with_planes_cleanup +ffffffff81929000 T drm_helper_encoder_in_use +ffffffff81929180 T drm_helper_crtc_in_use +ffffffff819292b0 T drm_helper_disable_unused_functions +ffffffff81929330 t __drm_helper_disable_unused_functions +ffffffff81929450 T drm_crtc_helper_set_mode +ffffffff819298f0 T drm_crtc_helper_atomic_check +ffffffff81929940 T drm_connector_get_single_encoder +ffffffff81929a20 T drm_crtc_helper_set_config +ffffffff8192a660 T drm_helper_connector_dpms +ffffffff8192a930 T drm_helper_resume_force_mode +ffffffff8192ac30 T drm_helper_force_disable_all +ffffffff8192b000 T drm_atomic_helper_check_plane_damage +ffffffff8192b0a0 T drm_atomic_helper_dirtyfb +ffffffff8192b350 T drm_atomic_helper_damage_iter_init +ffffffff8192b4a0 T drm_atomic_helper_damage_iter_next +ffffffff8192b540 T drm_atomic_helper_damage_merged +ffffffff8192c000 T displayid_iter_edid_begin +ffffffff8192c050 T __displayid_iter_next +ffffffff8192c300 T displayid_iter_end +ffffffff8192c350 T displayid_version +ffffffff8192c380 T displayid_primary_use +ffffffff8192d000 T drm_mode_create_dumb +ffffffff8192d0e0 T drm_mode_create_dumb_ioctl +ffffffff8192d1c0 T drm_mode_mmap_dumb_ioctl +ffffffff8192d230 T drm_mode_destroy_dumb +ffffffff8192d280 T drm_mode_destroy_dumb_ioctl +ffffffff8192e000 T drm_edid_header_is_valid +ffffffff8192e080 T drm_edid_are_equal +ffffffff8192e0f0 T drm_edid_block_valid +ffffffff8192e300 t edid_block_check +ffffffff8192e430 t edid_block_status_print +ffffffff8192e520 T drm_edid_is_valid +ffffffff8192e5a0 T drm_edid_valid +ffffffff8192e6d0 t drm_edid_block_count +ffffffff8192e810 T drm_edid_override_show +ffffffff8192e860 T drm_edid_override_set +ffffffff8192ea00 T drm_edid_alloc +ffffffff8192eac0 T drm_edid_free +ffffffff8192eb20 T drm_edid_override_reset +ffffffff8192ebe0 T drm_edid_override_connector_update +ffffffff8192ecb0 t drm_edid_override_get +ffffffff8192eda0 T drm_edid_connector_update +ffffffff8192f1f0 T drm_edid_connector_add_modes +ffffffff8192f310 T drm_do_get_edid +ffffffff8192f330 t _drm_do_get_edid +ffffffff8192f750 T drm_edid_raw +ffffffff8192f7e0 T drm_edid_dup +ffffffff8192f8b0 T drm_probe_ddc +ffffffff8192f9b0 t drm_do_probe_ddc_edid +ffffffff8192fb00 T drm_get_edid +ffffffff8192fc70 T drm_connector_update_edid_property +ffffffff8192fcd0 T drm_edid_read_custom +ffffffff8192fdc0 T drm_edid_read_ddc +ffffffff8192fef0 T drm_edid_read +ffffffff8192ff70 T drm_edid_get_panel_id +ffffffff819300f0 t edid_block_read +ffffffff81930360 T drm_get_edid_switcheroo +ffffffff819303b0 T drm_edid_read_switcheroo +ffffffff81930400 T drm_edid_duplicate +ffffffff81930480 T drm_mode_find_dmt +ffffffff819305a0 T drm_mode_fixup_1366x768 +ffffffff819305f0 T drm_find_edid_extension +ffffffff81930690 T drm_match_cea_mode +ffffffff81930910 T drm_display_mode_from_cea_vic +ffffffff81930980 T drm_edid_get_monitor_name +ffffffff81930a20 t get_monitor_name +ffffffff81930e80 T drm_edid_to_sad +ffffffff81931080 T drm_edid_to_speaker_allocation +ffffffff81931230 T drm_av_sync_delay +ffffffff819312e0 T drm_detect_hdmi_monitor +ffffffff81931400 T drm_detect_monitor_audio +ffffffff81931590 T drm_default_rgb_quant_range +ffffffff819315d0 t update_display_info +ffffffff81932d90 t _drm_edid_connector_add_modes +ffffffff81934320 T drm_add_edid_modes +ffffffff81934420 T drm_add_modes_noedid +ffffffff81934510 T drm_set_preferred_mode +ffffffff81934570 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff81934830 T drm_hdmi_avi_infoframe_quant_range +ffffffff819348d0 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff81934990 t connector_bad_edid +ffffffff81934b50 t edid_filter_invalid_blocks +ffffffff81934ce0 t drm_for_each_detailed_block +ffffffff81934e80 t __cea_db_iter_next +ffffffff81935090 t get_monitor_range +ffffffff81935130 t do_detailed_mode +ffffffff81935b40 t do_cvt_mode +ffffffff81935d80 t drm_mode_std +ffffffff81936760 t do_standard_modes +ffffffff819368a0 t drm_monitor_supports_rb +ffffffff81936cb0 t drm_gtf2_mode +ffffffff81937a60 t drm_gtf2_hbreak +ffffffff81937dd0 t do_established_modes +ffffffff81937fd0 t drm_match_hdmi_mode +ffffffff81938150 t do_inferred_modes +ffffffff81938810 t mode_in_range +ffffffff81939000 T drm_encoder_register_all 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drm_exec_unlock_obj +ffffffff8193b890 T drm_exec_prepare_obj +ffffffff8193b910 T drm_exec_prepare_array +ffffffff8193b9c0 t dma_resv_lock_slow_interruptible +ffffffff8193baf0 t dma_resv_lock_slow +ffffffff8193bbd0 t __ww_mutex_lock +ffffffff8193c000 T drm_fb_helper_debug_enter +ffffffff8193c100 T drm_fb_helper_debug_leave +ffffffff8193c270 T drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff8193c310 t __drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff8193c3c0 T drm_fb_helper_blank +ffffffff8193c4b0 T drm_fb_helper_prepare +ffffffff8193c5a0 t drm_fb_helper_resume_worker +ffffffff8193c5d0 t drm_fb_helper_damage_work +ffffffff8193c730 T drm_fb_helper_unprepare +ffffffff8193c760 T drm_fb_helper_init +ffffffff8193c7d0 T drm_fb_helper_alloc_info +ffffffff8193c830 T drm_fb_helper_release_info +ffffffff8193c880 T drm_fb_helper_unregister_info +ffffffff8193c8b0 T drm_fb_helper_fini +ffffffff8193c9b0 T drm_fb_helper_set_suspend +ffffffff8193c9e0 T drm_fb_helper_set_suspend_unlocked +ffffffff8193ca10 T drm_fb_helper_set_par +ffffffff8193cac0 T drm_fb_helper_pan_display +ffffffff8193cb90 T drm_fb_helper_fill_info +ffffffff8193cc50 T drm_fb_helper_initial_config +ffffffff8193cc80 t __drm_fb_helper_initial_config_and_unlock +ffffffff8193d2c0 T drm_fb_helper_hotplug_event +ffffffff8193d3f0 t drm_setup_crtcs_fb +ffffffff8193d530 T drm_fb_helper_lastclose +ffffffff8193d5e0 T drm_fb_helper_output_poll_changed +ffffffff8193e000 T drm_fb_dma_get_gem_obj +ffffffff8193f000 T drm_fbdev_dma_setup +ffffffff8193f190 t drm_fbdev_dma_helper_fb_probe +ffffffff8193f390 t drm_fbdev_dma_client_unregister +ffffffff8193f3e0 t drm_fbdev_dma_client_restore +ffffffff8193f420 t drm_fbdev_dma_client_hotplug +ffffffff81940000 T drm_fbdev_generic_setup +ffffffff81940190 t drm_fbdev_generic_helper_fb_probe +ffffffff81940300 t drm_fbdev_generic_helper_fb_dirty +ffffffff819405b0 t drm_fbdev_generic_client_unregister +ffffffff81940600 t drm_fbdev_generic_client_restore +ffffffff81940640 t drm_fbdev_generic_client_hotplug +ffffffff81941000 T drm_dev_needs_global_mutex +ffffffff81941060 T drm_file_alloc +ffffffff819412e0 T drm_file_free +ffffffff81941530 T drm_lastclose +ffffffff819415a0 T drm_release +ffffffff819415f0 T drm_file_update_pid +ffffffff81941640 T drm_release_noglobal +ffffffff81941690 T drm_read +ffffffff819416e0 T drm_event_reserve_init_locked +ffffffff81941760 T drm_event_reserve_init +ffffffff81941820 T drm_event_cancel_free +ffffffff819418a0 T drm_send_event_timestamp_locked +ffffffff819418b0 t drm_send_event_helper +ffffffff81941a80 T drm_send_event_locked +ffffffff81941aa0 T drm_send_event +ffffffff81941af0 T drm_print_memory_stats +ffffffff81941d70 T drm_show_memory_stats +ffffffff81941f80 T drm_show_fdinfo +ffffffff81941fa0 T mock_drm_getfile +ffffffff81942000 T drm_flip_work_allocate_task +ffffffff81942060 T drm_flip_work_queue_task +ffffffff819420b0 T drm_flip_work_queue +ffffffff81942150 T drm_flip_work_commit +ffffffff819421d0 T drm_flip_work_init +ffffffff81942240 t flip_worker +ffffffff81942320 T drm_flip_work_cleanup +ffffffff81943000 T drm_fb_clip_offset +ffffffff81943040 T drm_fb_memcpy +ffffffff819432f0 T drm_fb_swab +ffffffff81943400 t drm_fb_swab32_line +ffffffff81943460 t drm_fb_swab16_line +ffffffff819434c0 t drm_fb_xfrm +ffffffff819437b0 T drm_fb_xrgb8888_to_rgb332 +ffffffff81943810 t drm_fb_xrgb8888_to_rgb332_line +ffffffff81943910 T drm_fb_xrgb8888_to_rgb565 +ffffffff81943990 t drm_fb_xrgb8888_to_rgb565_swab_line +ffffffff81943a10 t drm_fb_xrgb8888_to_rgb565_line +ffffffff81943b20 T drm_fb_xrgb8888_to_xrgb1555 +ffffffff81943b80 t drm_fb_xrgb8888_to_xrgb1555_line +ffffffff81943c90 T drm_fb_xrgb8888_to_argb1555 +ffffffff81943cf0 t drm_fb_xrgb8888_to_argb1555_line +ffffffff81943e10 T drm_fb_xrgb8888_to_rgba5551 +ffffffff81943e70 t drm_fb_xrgb8888_to_rgba5551_line +ffffffff81943f80 T drm_fb_xrgb8888_to_rgb888 +ffffffff81943fe0 t drm_fb_xrgb8888_to_rgb888_line +ffffffff81944070 T drm_fb_xrgb8888_to_argb8888 +ffffffff819440d0 t drm_fb_xrgb8888_to_argb8888_line +ffffffff819441a0 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff81944200 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff81944280 T drm_fb_xrgb8888_to_argb2101010 +ffffffff819442e0 t drm_fb_xrgb8888_to_argb2101010_line +ffffffff81944370 T drm_fb_xrgb8888_to_gray8 +ffffffff819443d0 t drm_fb_xrgb8888_to_gray8_line +ffffffff81944440 T drm_fb_blit +ffffffff81944ac0 T drm_fb_xrgb8888_to_mono +ffffffff81944e50 T drm_fb_build_fourcc_list +ffffffff81945120 t drm_fb_xrgb8888_to_xbgr8888_line +ffffffff81945200 t drm_fb_xrgb8888_to_abgr8888_line +ffffffff81946000 T drm_mode_legacy_fb_format +ffffffff819460f0 T drm_driver_legacy_fb_format +ffffffff819461f0 T __drm_format_info +ffffffff81946270 T drm_format_info +ffffffff81946320 T drm_get_format_info +ffffffff819463f0 T drm_format_info_block_width +ffffffff81946440 T drm_format_info_block_height +ffffffff81946490 T drm_format_info_bpp +ffffffff81946510 T drm_format_info_min_pitch +ffffffff81947000 T drm_framebuffer_check_src_coords +ffffffff81947120 T drm_mode_addfb +ffffffff81947330 T drm_mode_addfb2 +ffffffff81947430 T drm_mode_addfb_ioctl +ffffffff81947450 T drm_internal_framebuffer_create +ffffffff81947a30 T drm_mode_addfb2_ioctl +ffffffff81947b30 T drm_mode_rmfb +ffffffff81947d10 T drm_framebuffer_lookup +ffffffff81947d60 t drm_mode_rmfb_work_fn +ffffffff81947e20 T drm_mode_rmfb_ioctl +ffffffff81947e40 T drm_mode_getfb +ffffffff81947f90 T drm_mode_getfb2_ioctl +ffffffff81948340 T drm_mode_dirtyfb_ioctl +ffffffff819484e0 T drm_fb_release +ffffffff819485f0 T drm_framebuffer_free +ffffffff81948630 T drm_framebuffer_init +ffffffff81948790 T drm_framebuffer_unregister_private +ffffffff819487d0 T drm_framebuffer_cleanup +ffffffff81948830 T drm_framebuffer_remove +ffffffff81948cc0 T drm_framebuffer_plane_width +ffffffff81948d10 T drm_framebuffer_plane_height +ffffffff81948d60 T drm_framebuffer_print_info +ffffffff8194a000 T drm_ref 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pledge_ioctl_drm +ffffffff81951480 T drm_ioctl_kernel +ffffffff819514d0 T drm_ioctl +ffffffff81951520 T drm_ioctl_flags +ffffffff81951570 T drm_do_ioctl +ffffffff819518a0 T drmioctl +ffffffff819519f0 t drm_getstats +ffffffff81951a40 t drm_setversion +ffffffff81951ba0 t drm_getcap +ffffffff81951d60 t drm_setclientcap +ffffffff81952000 T tasklet_unlock_wait +ffffffff81952080 T tasklet_unlock_spin_wait +ffffffff81952100 T tasklet_run +ffffffff81952160 T set_current_state +ffffffff81952200 T __set_current_state +ffffffff81952290 T schedule +ffffffff819522d0 T schedule_timeout +ffffffff81952380 T schedule_timeout_uninterruptible +ffffffff819523e0 T wake_up_process +ffffffff81952460 T autoremove_wake_function +ffffffff81952510 T prepare_to_wait +ffffffff81952600 T finish_wait +ffffffff819526b0 T flush_workqueue +ffffffff819526f0 T flush_work +ffffffff81952740 T flush_delayed_work +ffffffff819527e0 T kthread_func +ffffffff81952820 T kthread_run +ffffffff81952900 T kthread_create_worker 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dma_fence_get_stub +ffffffff81957d60 T dma_fence_allocate_private_stub +ffffffff81957e80 T dma_fence_array_create +ffffffff81957f90 t irq_dma_fence_array_work +ffffffff81958020 T dma_fence_array_first +ffffffff81958070 T dma_fence_array_next +ffffffff819580c0 t dma_fence_array_get_driver_name +ffffffff819580f0 t dma_fence_array_get_timeline_name +ffffffff81958120 t dma_fence_array_enable_signaling +ffffffff81958220 t dma_fence_array_signaled +ffffffff81958270 t dma_fence_array_release +ffffffff81958330 T dma_fence_chain_find_seqno +ffffffff81958450 T dma_fence_chain_walk +ffffffff81958680 T dma_fence_chain_init +ffffffff81958790 t dma_fence_chain_get_driver_name +ffffffff819587c0 t dma_fence_chain_get_timeline_name +ffffffff819587f0 t dma_fence_chain_enable_signaling +ffffffff819589a0 t dma_fence_chain_signaled +ffffffff81958a90 t dma_fence_chain_release +ffffffff81958bd0 T dma_fence_is_container +ffffffff81958c20 T dmabuf_read +ffffffff81958c50 T dmabuf_write +ffffffff81958c80 T dmabuf_ioctl +ffffffff81958cb0 T dmabuf_kqfilter +ffffffff81958ce0 T dmabuf_stat +ffffffff81958da0 T dmabuf_close +ffffffff81958e10 T dmabuf_seek +ffffffff81958ea0 T dma_buf_export +ffffffff81958f50 T dma_buf_get +ffffffff81958fe0 T dma_buf_put +ffffffff81959090 T dma_buf_fd +ffffffff819591a0 T get_dma_buf +ffffffff819591e0 T pcie_get_speed_cap +ffffffff81959390 T printk +ffffffff81959430 T pcie_get_width_cap +ffffffff81959520 T pcie_aspm_enabled +ffffffff819595b0 T wait_on_bit +ffffffff81959680 T wait_on_bit_timeout +ffffffff81959750 T wake_up_bit +ffffffff81959790 T clear_and_wake_up_bit +ffffffff819597e0 T bit_waitqueue +ffffffff81959810 T __var_waitqueue +ffffffff81959840 T drm_linux_init +ffffffff819599b0 T drm_linux_exit +ffffffff81959a10 T pci_resize_resource +ffffffff81959b60 T register_shrinker +ffffffff81959bb0 T unregister_shrinker +ffffffff81959c10 T drmbackoff +ffffffff81959ca0 T bitmap_zalloc +ffffffff81959cd0 T bitmap_free +ffffffff81959cf0 T atomic_dec_and_mutex_lock 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component_master_add_with_match +ffffffff8195acc0 t dma_fence_stub_get_name +ffffffff8195acf0 t dma_fence_array_cb_func +ffffffff8195ad70 t dma_fence_chain_cb +ffffffff8195ae30 t dma_fence_chain_timo +ffffffff8195b000 T drmm_kzalloc +ffffffff8195b100 T drmm_kcalloc +ffffffff8195b210 T drmm_kstrdup +ffffffff8195b340 T drmm_kfree +ffffffff8195b440 T drmm_add_action +ffffffff8195b500 T drmm_add_action_or_reset +ffffffff8195b5d0 T drm_managed_release +ffffffff8195b690 T drmm_add_final_kfree +ffffffff8195c000 T mipi_dsi_attach +ffffffff8195c050 T mipi_dsi_detach +ffffffff8195c0a0 T devm_mipi_dsi_attach +ffffffff8195c110 T mipi_dsi_packet_format_is_short +ffffffff8195c150 T mipi_dsi_packet_format_is_long +ffffffff8195c190 T mipi_dsi_create_packet +ffffffff8195c2a0 T mipi_dsi_shutdown_peripheral +ffffffff8195c350 T mipi_dsi_turn_on_peripheral +ffffffff8195c400 T mipi_dsi_set_maximum_return_packet_size +ffffffff8195c4b0 T mipi_dsi_compression_mode +ffffffff8195c560 T mipi_dsi_picture_parameter_set +ffffffff8195c610 T mipi_dsi_generic_write +ffffffff8195c6d0 T mipi_dsi_generic_read +ffffffff8195c780 T mipi_dsi_dcs_write_buffer +ffffffff8195c840 T mipi_dsi_dcs_write +ffffffff8195c990 T mipi_dsi_dcs_read +ffffffff8195ca30 T mipi_dsi_dcs_nop +ffffffff8195cae0 T mipi_dsi_dcs_soft_reset +ffffffff8195cb90 T mipi_dsi_dcs_get_power_mode +ffffffff8195cc50 T mipi_dsi_dcs_get_pixel_format +ffffffff8195cd10 T mipi_dsi_dcs_enter_sleep_mode +ffffffff8195cdc0 T mipi_dsi_dcs_exit_sleep_mode +ffffffff8195ce70 T mipi_dsi_dcs_set_display_off +ffffffff8195cf20 T mipi_dsi_dcs_set_display_on +ffffffff8195cfd0 T mipi_dsi_dcs_set_column_address +ffffffff8195d090 T mipi_dsi_dcs_set_page_address +ffffffff8195d150 T mipi_dsi_dcs_set_tear_off +ffffffff8195d200 T mipi_dsi_dcs_set_tear_on +ffffffff8195d2b0 T mipi_dsi_dcs_set_pixel_format +ffffffff8195e000 T __drm_mm_interval_first +ffffffff8195e0c0 T drm_mm_reserve_node +ffffffff8195e340 t add_hole +ffffffff8195e4a0 T drm_mm_insert_node_in_range +ffffffff8195ea90 T drm_mm_remove_node +ffffffff8195ebc0 T drm_mm_replace_node +ffffffff8195eda0 T drm_mm_scan_init_with_range +ffffffff8195ee30 T drm_mm_scan_add_block +ffffffff8195efa0 T drm_mm_scan_remove_block +ffffffff8195f020 T drm_mm_scan_color_evict +ffffffff8195f100 T drm_mm_init +ffffffff8195f1b0 T drm_mm_takedown +ffffffff8195f1f0 T drm_mm_print +ffffffff81960000 T drm_modeset_register_all +ffffffff819600a0 T drm_modeset_unregister_all +ffffffff819600e0 T drm_mode_getresources +ffffffff81960390 T drm_mode_config_reset +ffffffff819604f0 T drmm_mode_config_init +ffffffff81960b70 T drm_mode_config_cleanup +ffffffff81960e90 t drm_mode_config_init_release +ffffffff81960ea0 T drm_mode_config_validate +ffffffff81962000 T __drm_mode_object_add +ffffffff81962100 T drm_mode_object_add +ffffffff819621e0 T drm_mode_object_register +ffffffff81962230 T drm_mode_object_unregister +ffffffff819622d0 T drm_mode_object_lease_required +ffffffff81962320 T __drm_mode_object_find +ffffffff819623d0 T drm_mode_object_find +ffffffff81962480 T drm_mode_object_put +ffffffff81962500 T drm_mode_object_get +ffffffff81962560 T drm_object_attach_property +ffffffff81962670 T drm_object_property_set_value +ffffffff81962750 T drm_object_property_get_value +ffffffff819627e0 t __drm_object_property_get_value +ffffffff819628c0 T drm_object_property_get_default_value +ffffffff81962990 T drm_mode_object_get_properties +ffffffff81962ad0 T drm_mode_obj_get_properties_ioctl +ffffffff81962d20 T drm_mode_obj_find_prop_id +ffffffff81962d80 T drm_mode_obj_set_property_ioctl +ffffffff81964000 T drm_mode_debug_printmodeline +ffffffff81964140 T drm_mode_vrefresh +ffffffff819641e0 T drm_mode_create +ffffffff81964200 T drm_mode_destroy +ffffffff81964240 T drm_mode_probed_add +ffffffff819642e0 T drm_analog_tv_mode +ffffffff81964b80 T drm_cvt_mode +ffffffff81965000 T drm_mode_set_name +ffffffff81965050 T drm_gtf_mode_complex +ffffffff81965350 T drm_gtf_mode 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drm_plane_from_index +ffffffff8196eba0 T drm_plane_force_disable +ffffffff8196ecb0 T drm_mode_plane_set_obj_prop +ffffffff8196ed30 T drm_mode_getplane_res +ffffffff8196ee60 T drm_mode_getplane +ffffffff8196efb0 T drm_plane_check_pixel_format +ffffffff8196f070 T drm_any_plane_has_format +ffffffff8196f1a0 T drm_mode_setplane +ffffffff8196f490 T drm_mode_cursor_ioctl +ffffffff8196f500 t drm_mode_cursor_common +ffffffff8196fa40 T drm_mode_cursor2_ioctl +ffffffff8196fa60 T drm_mode_page_flip_ioctl +ffffffff8196ffe0 T drm_plane_enable_fb_damage_clips +ffffffff81970000 T drm_plane_get_damage_clips_count +ffffffff81970040 T __drm_plane_get_damage_clips +ffffffff81970080 T drm_plane_get_damage_clips +ffffffff81970120 T drm_create_scaling_filter_prop +ffffffff81970270 T drm_plane_create_scaling_filter_property +ffffffff819702e0 t kvasprintf +ffffffff81970380 t kasprintf +ffffffff81970450 t create_in_format_blob +ffffffff81970640 t __setplane_atomic +ffffffff819707e0 t __setplane_internal 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+ffffffff81972990 T drm_prime_pages_to_sg +ffffffff819729e0 T drm_prime_get_contiguous_size +ffffffff81972a30 T drm_gem_prime_export +ffffffff81972ac0 T drm_gem_prime_import_dev +ffffffff81972b20 T drm_prime_sg_to_page_array +ffffffff81972b70 T drm_prime_sg_to_dma_addr_array +ffffffff81972bc0 T drm_prime_gem_destroy +ffffffff81973000 T __drm_puts_coredump +ffffffff819730e0 T __drm_printfn_coredump +ffffffff819732b0 T __drm_puts_seq_file +ffffffff819732e0 T __drm_printfn_seq_file +ffffffff81973310 T __drm_printfn_info +ffffffff81973340 T __drm_printfn_debug +ffffffff81973370 T __drm_printfn_err +ffffffff819733b0 T drm_puts +ffffffff819733e0 T drm_printf +ffffffff81973460 T drm_print_bits +ffffffff81973690 T drm_dev_printk +ffffffff81973730 T __drm_dev_dbg +ffffffff819737c0 T ___drm_dbg +ffffffff81973850 T __drm_err +ffffffff819738e0 T drm_print_regset32 +ffffffff81974000 T drm_crtc_mode_valid +ffffffff81974050 T drm_encoder_mode_valid +ffffffff81974090 T drm_connector_mode_valid +ffffffff81974110 T drm_kms_helper_poll_enable +ffffffff81974250 T drm_kms_helper_poll_reschedule +ffffffff819742b0 T drm_helper_probe_detect +ffffffff819744a0 T drm_helper_probe_single_connector_modes +ffffffff81974a20 t __drm_helper_update_and_validate +ffffffff81974dd0 T drm_kms_helper_hotplug_event +ffffffff81974e10 T drm_kms_helper_connector_hotplug_event +ffffffff81974e50 T drm_kms_helper_is_poll_worker +ffffffff81974e80 T drm_kms_helper_poll_disable +ffffffff81974f50 T drm_kms_helper_poll_init +ffffffff81974fb0 t output_poll_execute +ffffffff81975200 T drm_kms_helper_poll_fini +ffffffff81975250 T drm_connector_helper_hpd_irq_event +ffffffff81975310 t check_connector_changed +ffffffff819754e0 T drm_helper_hpd_irq_event +ffffffff81975630 T drm_crtc_helper_mode_valid_fixed +ffffffff81975680 T drm_connector_helper_get_modes_from_ddc +ffffffff81975710 T drm_connector_helper_get_modes_fixed +ffffffff81975880 T drm_connector_helper_get_modes +ffffffff819758f0 T drm_connector_helper_tv_get_modes +ffffffff81975b30 t __delayed_work_tick +ffffffff81976000 T drm_property_create +ffffffff819761f0 T drm_property_create_enum +ffffffff819762a0 T drm_property_add_enum +ffffffff819764a0 T drm_property_destroy +ffffffff81976550 T drm_property_create_bitmask +ffffffff81976680 T drm_property_create_range +ffffffff819766f0 T drm_property_create_signed_range +ffffffff81976760 T drm_property_create_object +ffffffff81976800 T drm_property_create_bool +ffffffff81976860 T drm_mode_getproperty_ioctl +ffffffff81976ab0 T drm_property_create_blob +ffffffff81976bf0 t drm_property_free_blob +ffffffff81976c70 T drm_property_blob_put +ffffffff81976cb0 T drm_property_destroy_user_blobs +ffffffff81976d30 T drm_property_blob_get +ffffffff81976d70 T drm_property_lookup_blob +ffffffff81976d90 T drm_property_replace_global_blob +ffffffff81976ee0 T drm_property_replace_blob +ffffffff81976f50 T drm_mode_getblob_ioctl +ffffffff81977010 T drm_mode_createblob_ioctl +ffffffff81977110 T drm_mode_destroyblob_ioctl +ffffffff81977210 T drm_property_change_valid_get +ffffffff81977470 T drm_property_change_valid_put +ffffffff81978000 T drm_rect_intersect +ffffffff81978080 T drm_rect_clip_scaled +ffffffff819782f0 T drm_rect_calc_hscale +ffffffff819783c0 T drm_rect_calc_vscale +ffffffff81978490 T drm_rect_debug_print +ffffffff819785b0 T drm_rect_rotate +ffffffff81978670 T drm_rect_rotate_inv +ffffffff81979000 T drm_self_refresh_helper_update_avg_times +ffffffff81979150 T drm_self_refresh_helper_alter_state +ffffffff819792e0 T drm_self_refresh_helper_init +ffffffff81979470 t drm_self_refresh_helper_entry_work +ffffffff819795d0 T drm_self_refresh_helper_cleanup +ffffffff81979650 t __delayed_work_tick +ffffffff8197a000 T drm_suballoc_manager_init +ffffffff8197a180 T drm_suballoc_manager_fini +ffffffff8197a290 t drm_suballoc_try_free +ffffffff8197a380 T drm_suballoc_new +ffffffff8197ada0 t drm_suballoc_event +ffffffff8197aee0 T drm_suballoc_free +ffffffff8197c000 T drm_syncobj_find +ffffffff8197c080 T drm_syncobj_add_point +ffffffff8197c190 t syncobj_wait_syncobj_func +ffffffff8197c240 t syncobj_eventfd_entry_func +ffffffff8197c320 T drm_syncobj_replace_fence +ffffffff8197c3d0 T drm_syncobj_find_fence +ffffffff8197c720 t drm_syncobj_fence_add_wait +ffffffff8197c7f0 T drm_syncobj_free +ffffffff8197c870 T drm_syncobj_create +ffffffff8197ca40 T drm_syncobj_get_handle +ffffffff8197cb60 T drm_syncobj_get_fd +ffffffff8197cbb0 T drm_syncobj_open +ffffffff8197cbe0 T drm_syncobj_release +ffffffff8197cc20 t drm_syncobj_release_handle +ffffffff8197cce0 T drm_syncobj_create_ioctl +ffffffff8197ce10 T drm_syncobj_destroy_ioctl +ffffffff8197cf50 T drm_syncobj_handle_to_fd_ioctl +ffffffff8197d140 T drm_syncobj_fd_to_handle_ioctl +ffffffff8197d2f0 T drm_syncobj_transfer_ioctl +ffffffff8197d6d0 T drm_timeout_abs_to_jiffies +ffffffff8197d7a0 T drm_syncobj_wait_ioctl +ffffffff8197d920 t drm_syncobj_array_find +ffffffff8197db40 t drm_syncobj_array_free +ffffffff8197dc30 T drm_syncobj_timeline_wait_ioctl +ffffffff8197ddb0 T drm_syncobj_eventfd_ioctl +ffffffff8197dde0 T drm_syncobj_reset_ioctl +ffffffff8197dec0 T drm_syncobj_signal_ioctl +ffffffff8197e020 T drm_syncobj_timeline_signal_ioctl +ffffffff8197e260 T drm_syncobj_query_ioctl +ffffffff8197e470 t drm_syncobj_array_wait_timeout +ffffffff8197e8d0 t syncobj_wait_fence_func +ffffffff8197e8f0 t syncobj_eventfd_entry_fence_func +ffffffff8197f000 T drm_vblank_count +ffffffff8197f090 T drm_crtc_accurate_vblank_count +ffffffff8197f1a0 t drm_update_vblank_count +ffffffff8197f5e0 T drm_vblank_disable_and_save +ffffffff8197f730 T drm_vblank_init +ffffffff8197f8b0 t vblank_disable_fn +ffffffff8197f930 t drm_vblank_init_release +ffffffff8197f9c0 T drm_dev_has_vblank +ffffffff8197f9f0 T drm_crtc_vblank_waitqueue +ffffffff8197fa40 T drm_calc_timestamping_constants +ffffffff8197fc60 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff819801b0 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff819801d0 T drm_crtc_vblank_count +ffffffff81980260 T drm_crtc_vblank_count_and_time +ffffffff81980320 t drm_vblank_count_and_time +ffffffff819803d0 T drm_crtc_next_vblank_start +ffffffff81980520 T drm_crtc_arm_vblank_event +ffffffff81980600 T drm_crtc_send_vblank_event +ffffffff819807b0 t send_vblank_event +ffffffff81980860 T drm_vblank_get +ffffffff81980960 t drm_vblank_enable +ffffffff81980b60 T drm_crtc_vblank_get +ffffffff81980c60 T drm_vblank_put +ffffffff81980d90 T drm_crtc_vblank_put +ffffffff81980db0 T drm_wait_one_vblank +ffffffff819812a0 T drm_crtc_wait_one_vblank +ffffffff819812c0 T drm_crtc_vblank_off +ffffffff819816b0 T drm_crtc_vblank_reset +ffffffff819817e0 T drm_crtc_set_max_vblank_count +ffffffff819818c0 T drm_crtc_vblank_on +ffffffff81981a10 t drm_reset_vblank_timestamp +ffffffff81981bf0 T drm_crtc_vblank_restore +ffffffff81981fd0 T drm_legacy_modeset_ctl_ioctl +ffffffff819821f0 T drm_wait_vblank_ioctl +ffffffff81982740 t drm_wait_vblank_reply +ffffffff81982850 t drm_queue_vblank_event +ffffffff81982b90 T drm_handle_vblank +ffffffff81982e80 t drm_handle_vblank_events +ffffffff81983110 T drm_crtc_handle_vblank +ffffffff81983130 T drm_crtc_get_sequence_ioctl +ffffffff81983300 T drm_crtc_queue_sequence_ioctl +ffffffff819835c0 t __get_vblank_counter +ffffffff81984000 T drm_handle_vblank_works +ffffffff819841a0 T drm_vblank_cancel_pending_works +ffffffff819842e0 T drm_vblank_work_schedule +ffffffff81984550 T drm_vblank_work_cancel_sync +ffffffff819846a0 T drm_vblank_work_flush +ffffffff819847d0 T drm_vblank_work_init +ffffffff81984840 T drm_vblank_worker_init +ffffffff81985000 T drm_vma_offset_manager_init +ffffffff81985040 T drm_vma_offset_manager_destroy +ffffffff81985060 T drm_vma_offset_lookup_locked +ffffffff819850f0 T drm_vma_offset_add +ffffffff81985180 T drm_vma_offset_remove +ffffffff819851d0 T drm_vma_node_allow +ffffffff819851f0 t vma_node_allow +ffffffff81985310 T drm_vma_node_allow_once +ffffffff81985330 T drm_vma_node_revoke +ffffffff819853b0 T drm_vma_node_is_allowed +ffffffff81986000 T hdmi_avi_infoframe_init +ffffffff81986070 T hdmi_avi_infoframe_check +ffffffff819860c0 T hdmi_avi_infoframe_pack_only +ffffffff819862c0 T hdmi_avi_infoframe_pack +ffffffff81986320 T hdmi_spd_infoframe_init +ffffffff819863e0 T hdmi_spd_infoframe_check +ffffffff81986430 T hdmi_spd_infoframe_pack_only +ffffffff81986570 T hdmi_spd_infoframe_pack +ffffffff819866d0 T hdmi_audio_infoframe_init +ffffffff81986720 T hdmi_audio_infoframe_check +ffffffff81986770 T hdmi_audio_infoframe_pack_only +ffffffff819868d0 T hdmi_audio_infoframe_pack +ffffffff81986920 T hdmi_audio_infoframe_pack_for_dp +ffffffff81986a10 T hdmi_vendor_infoframe_init +ffffffff81986a70 T hdmi_vendor_infoframe_check +ffffffff81986b10 T hdmi_vendor_infoframe_pack_only +ffffffff81986cd0 T hdmi_vendor_infoframe_pack +ffffffff81986d70 T hdmi_drm_infoframe_init +ffffffff81986dd0 T hdmi_drm_infoframe_check +ffffffff81986e20 T hdmi_drm_infoframe_pack_only +ffffffff81987010 T hdmi_drm_infoframe_pack +ffffffff81987060 T hdmi_infoframe_check +ffffffff819871b0 T hdmi_infoframe_pack_only +ffffffff819873d0 T hdmi_infoframe_pack +ffffffff81987540 T hdmi_infoframe_log +ffffffff81988430 T hdmi_drm_infoframe_unpack_only +ffffffff81988510 T hdmi_infoframe_unpack +ffffffff81989000 T list_sort +ffffffff8198a000 T radix_tree_lookup +ffffffff8198a0b0 T radix_tree_iter_find +ffffffff8198a180 T radix_tree_delete +ffffffff8198a310 T radix_tree_iter_delete +ffffffff8198a330 T radix_tree_insert +ffffffff8198b000 T sort +ffffffff8198b040 t qsort +ffffffff8198d000 T drm_dp_dual_mode_read +ffffffff8198d110 T drm_dp_dual_mode_write +ffffffff8198d1f0 T drm_dp_dual_mode_detect +ffffffff8198d490 T drm_dp_dual_mode_max_tmds_clock +ffffffff8198d5b0 T drm_dp_dual_mode_get_tmds_output +ffffffff8198d6d0 T drm_dp_dual_mode_set_tmds_output +ffffffff8198d950 T drm_dp_get_dual_mode_type_name +ffffffff8198d9c0 T drm_lspcon_get_mode +ffffffff8198dbe0 T drm_lspcon_set_mode +ffffffff8198e000 T drm_dp_channel_eq_ok +ffffffff8198e080 T drm_dp_clock_recovery_ok +ffffffff8198e0f0 T drm_dp_get_adjust_request_voltage +ffffffff8198e130 T drm_dp_get_adjust_request_pre_emphasis +ffffffff8198e180 T drm_dp_get_adjust_tx_ffe_preset +ffffffff8198e1c0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff8198e240 T drm_dp_128b132b_lane_symbol_locked +ffffffff8198e2b0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff8198e2e0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff8198e310 T drm_dp_128b132b_link_training_failed +ffffffff8198e340 T drm_dp_read_clock_recovery_delay +ffffffff8198e450 T drm_dp_read_channel_eq_delay +ffffffff8198e550 T drm_dp_128b132b_read_aux_rd_interval +ffffffff8198e600 T drm_dp_link_train_clock_recovery_delay +ffffffff8198e690 t __8b10b_clock_recovery_delay_us +ffffffff8198e710 T drm_dp_link_train_channel_eq_delay +ffffffff8198e780 T drm_dp_phy_name +ffffffff8198e7c0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff8198e7e0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff8198e850 T drm_dp_link_rate_to_bw_code +ffffffff8198e8c0 T drm_dp_bw_code_to_link_rate +ffffffff8198e920 T drm_dp_dpcd_probe +ffffffff8198ea60 t drm_dp_dpcd_access +ffffffff8198eb90 T drm_dp_dpcd_read +ffffffff8198ecc0 T drm_dp_dpcd_write +ffffffff8198edd0 T drm_dp_dpcd_read_link_status +ffffffff8198edf0 T drm_dp_dpcd_read_phy_link_status +ffffffff8198eef0 T drm_dp_downstream_is_type +ffffffff8198ef40 T drm_dp_downstream_is_tmds +ffffffff8198efb0 T drm_dp_send_real_edid_checksum +ffffffff8198f200 T drm_dp_read_dpcd_caps +ffffffff8198f390 T drm_dp_read_downstream_info +ffffffff8198f490 T drm_dp_downstream_max_dotclock +ffffffff8198f4e0 T drm_dp_downstream_max_tmds_clock +ffffffff8198f580 T drm_dp_downstream_min_tmds_clock +ffffffff8198f600 T drm_dp_downstream_max_bpc +ffffffff8198f6a0 T drm_dp_downstream_420_passthrough +ffffffff8198f700 T drm_dp_downstream_444_to_420_conversion +ffffffff8198f760 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff8198f7c0 T drm_dp_downstream_mode +ffffffff8198f850 T drm_dp_downstream_id +ffffffff8198f870 T drm_dp_downstream_debug +ffffffff8198f910 T drm_dp_subconnector_type +ffffffff8198f980 T drm_dp_set_subconnector_property +ffffffff8198f9f0 T drm_dp_read_sink_count_cap +ffffffff8198fa40 T drm_dp_read_sink_count +ffffffff8198faa0 T drm_dp_remote_aux_init +ffffffff8198fad0 t drm_dp_aux_crc_work +ffffffff8198fc40 T drm_dp_aux_init +ffffffff8198fcf0 T drm_dp_aux_register +ffffffff8198fe10 T drm_dp_aux_unregister +ffffffff8198fe40 T drm_dp_psr_setup_time +ffffffff8198fe90 T drm_dp_start_crc +ffffffff8198ff40 T drm_dp_stop_crc +ffffffff8198ffd0 T drm_dp_read_desc +ffffffff81990190 T drm_dp_dsc_sink_max_slice_count +ffffffff81990220 T drm_dp_dsc_sink_line_buf_depth +ffffffff81990260 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff819902d0 T drm_dp_read_lttpr_common_caps +ffffffff81990390 T drm_dp_read_lttpr_phy_caps +ffffffff81990450 T drm_dp_lttpr_count +ffffffff819904e0 T drm_dp_lttpr_max_link_rate +ffffffff81990540 T drm_dp_lttpr_max_lane_count +ffffffff81990570 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff819905a0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff819905d0 T drm_dp_get_phy_test_pattern +ffffffff819906f0 T drm_dp_set_phy_test_pattern +ffffffff819907b0 T drm_dp_vsc_sdp_log +ffffffff81990ad0 T drm_dp_get_pcon_max_frl_bw +ffffffff81990b20 T drm_dp_pcon_frl_prepare +ffffffff81990b70 T drm_dp_pcon_is_frl_ready +ffffffff81990bd0 T drm_dp_pcon_frl_configure_1 +ffffffff81990cd0 T drm_dp_pcon_frl_configure_2 +ffffffff81990d30 T drm_dp_pcon_reset_frl_config +ffffffff81990d80 T drm_dp_pcon_frl_enable +ffffffff81990e40 T drm_dp_pcon_hdmi_link_active +ffffffff81990e90 T drm_dp_pcon_hdmi_link_mode +ffffffff81990f00 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff81990ff0 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff81991020 T drm_dp_pcon_dsc_max_slices +ffffffff819910b0 T drm_dp_pcon_dsc_max_slice_width +ffffffff819910e0 T drm_dp_pcon_dsc_bpp_incr +ffffffff81991120 T drm_dp_pcon_pps_default +ffffffff819911a0 T drm_dp_pcon_pps_override_buf +ffffffff81991240 T drm_dp_pcon_pps_override_param +ffffffff81991310 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff819913b0 T drm_edp_backlight_set_level +ffffffff81991480 T drm_edp_backlight_enable +ffffffff81991690 t drm_edp_backlight_set_enable +ffffffff819917c0 T drm_edp_backlight_disable +ffffffff81991800 T drm_edp_backlight_init +ffffffff81991d60 T drm_panel_dp_aux_backlight +ffffffff81991ef0 t __128b132b_channel_eq_delay_us +ffffffff81991f70 t __8b10b_channel_eq_delay_us +ffffffff81991ff0 t drm_dp_aux_get_crc +ffffffff819920d0 t drm_dp_i2c_xfer +ffffffff81992340 t drm_dp_i2c_functionality +ffffffff81992370 t drm_dp_i2c_do_msg +ffffffff81992740 t lock_bus +ffffffff81992760 t trylock_bus +ffffffff819927b0 t unlock_bus +ffffffff819927d0 t dp_aux_backlight_update_status +ffffffff81993000 T drm_dp_encode_sideband_req +ffffffff81993440 T drm_dp_decode_sideband_req +ffffffff81993970 T drm_dp_dump_sideband_msg_req_body +ffffffff81993d40 T drm_dp_mst_get_port_malloc +ffffffff81993d90 T drm_dp_mst_put_port_malloc +ffffffff81993e80 t kref_put +ffffffff81993ec0 T drm_atomic_get_mst_payload_state +ffffffff81993f10 T drm_dp_mst_dpcd_read +ffffffff819941d0 T drm_dp_mst_dpcd_write +ffffffff81994220 t drm_dp_send_dpcd_write +ffffffff81994460 T drm_dp_mst_connector_late_register +ffffffff819944e0 T drm_dp_mst_connector_early_unregister +ffffffff81994520 T drm_dp_send_power_updown_phy +ffffffff81994760 t drm_dp_mst_topology_put_port +ffffffff81994880 t drm_dp_mst_wait_tx_reply +ffffffff81994c20 T drm_dp_send_query_stream_enc_status +ffffffff81994ee0 T drm_dp_add_payload_part1 +ffffffff81995090 T drm_dp_remove_payload +ffffffff81995230 T drm_dp_add_payload_part2 +ffffffff819953e0 T drm_dp_get_vc_payload_bw +ffffffff81995480 T drm_dp_read_mst_cap +ffffffff819954e0 T drm_dp_mst_topology_mgr_set_mst +ffffffff81995790 t drm_dp_dpcd_write_payload +ffffffff81995930 t drm_dp_mst_topology_put_mstb +ffffffff81995a30 T drm_dp_mst_topology_mgr_suspend +ffffffff81995af0 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff81995b60 T drm_dp_mst_topology_mgr_resume +ffffffff81995da0 T drm_dp_mst_hpd_irq_handle_event +ffffffff81996d10 T drm_dp_mst_hpd_irq_send_new_request +ffffffff81996d90 T drm_dp_mst_detect_port +ffffffff81996ef0 T drm_dp_mst_edid_read +ffffffff81996ff0 T drm_dp_mst_get_edid +ffffffff81997050 T drm_dp_atomic_find_time_slots +ffffffff81997300 T drm_atomic_get_mst_topology_state +ffffffff81997310 T drm_dp_atomic_release_time_slots +ffffffff81997520 T drm_dp_mst_atomic_setup_commit +ffffffff819976b0 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff81997820 T drm_dp_mst_root_conn_atomic_check +ffffffff81997940 T drm_dp_mst_update_slots +ffffffff819979a0 T drm_dp_check_act_status +ffffffff81997b30 T drm_dp_calc_pbn_mode +ffffffff81997b90 T drm_dp_mst_dump_topology +ffffffff81997e10 t drm_dp_mst_dump_mstb +ffffffff81997e80 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff81997fb0 T drm_dp_mst_dsc_aux_for_port +ffffffff819981e0 T drm_dp_mst_atomic_enable_dsc +ffffffff81998360 T drm_dp_mst_atomic_check +ffffffff81998650 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff819988d0 t drm_dp_mst_duplicate_state +ffffffff81998aa0 t drm_dp_mst_destroy_state +ffffffff81998b60 T drm_atomic_get_old_mst_topology_state +ffffffff81998b70 T drm_atomic_get_new_mst_topology_state +ffffffff81998b80 T drm_dp_mst_topology_mgr_init +ffffffff81998df0 t drm_dp_mst_link_probe_work +ffffffff81999080 t drm_dp_tx_work +ffffffff819990d0 t drm_dp_delayed_destroy_work +ffffffff81999580 t drm_dp_mst_up_req_work +ffffffff81999aa0 T drm_dp_mst_topology_mgr_destroy +ffffffff81999b30 t drm_dp_mst_is_virtual_dpcd +ffffffff81999c10 t drm_dp_free_mst_branch_device +ffffffff81999c50 t drm_dp_mst_topology_get_port_validated_locked +ffffffff81999cd0 t drm_dp_mst_dump_sideband_msg_tx +ffffffff81999ee0 t process_single_down_tx_qlock +ffffffff8199a050 t process_single_tx_qlock +ffffffff8199a520 t drm_dp_msg_data_crc4 +ffffffff8199a650 t drm_dp_payload_send_msg +ffffffff8199aab0 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff8199ab30 t drm_dp_get_one_sb_msg +ffffffff8199b270 t drm_dp_get_mst_branch_device +ffffffff8199b3d0 t drm_dp_check_and_send_link_address +ffffffff8199b4a0 t drm_dp_send_link_address +ffffffff8199c160 t drm_dp_send_enum_path_resources +ffffffff8199c3c0 t drm_dp_port_set_pdt +ffffffff8199c690 t drm_dp_mst_port_add_connector +ffffffff8199c870 t drm_dp_mst_i2c_xfer +ffffffff8199cf90 t drm_dp_mst_i2c_functionality +ffffffff8199cfc0 t get_mst_branch_device_by_guid_helper +ffffffff8199e000 T drm_dsc_dp_pps_header_init +ffffffff8199e030 T drm_dsc_dp_rc_buffer_size +ffffffff8199e090 T drm_dsc_pps_payload_pack +ffffffff8199e340 T drm_dsc_set_const_params +ffffffff8199e390 T drm_dsc_set_rc_buf_thresh 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drm_sched_job_cleanup +ffffffff819b6e10 T drm_sched_wakeup_if_can_queue +ffffffff819b6ed0 T drm_sched_pick_best +ffffffff819b6f80 T drm_sched_init +ffffffff819b7230 t drm_sched_job_timedout +ffffffff819b7380 t drm_sched_main +ffffffff819b77b0 T drm_sched_fini +ffffffff819b7990 T drm_sched_increase_karma +ffffffff819b7ab0 t __delayed_work_tick +ffffffff819b7ad0 t drm_sched_get_cleanup_job +ffffffff819b7c10 t drm_sched_select_entity +ffffffff819b8000 t ch7017_init +ffffffff819b8140 t ch7017_dpms +ffffffff819b8380 t ch7017_mode_valid +ffffffff819b83c0 t ch7017_mode_set +ffffffff819b8670 t ch7017_detect +ffffffff819b86a0 t ch7017_get_hw_state +ffffffff819b8730 t ch7017_destroy +ffffffff819b8780 t ch7017_dump_regs +ffffffff819b9000 t ch7xxx_init +ffffffff819b92a0 t ch7xxx_dpms +ffffffff819b9380 t ch7xxx_mode_valid +ffffffff819b93c0 t ch7xxx_mode_set +ffffffff819b9940 t ch7xxx_detect +ffffffff819b9b90 t ch7xxx_get_hw_state +ffffffff819b9c70 t ch7xxx_destroy +ffffffff819b9cc0 t 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intel_digital_connector_atomic_set_property +ffffffff819d8110 T intel_digital_connector_atomic_check +ffffffff819d8210 T intel_digital_connector_duplicate_state +ffffffff819d8290 T intel_connector_needs_modeset +ffffffff819d8300 T intel_any_crtc_needs_modeset +ffffffff819d8390 T intel_atomic_get_digital_connector_state +ffffffff819d83a0 T intel_crtc_duplicate_state +ffffffff819d84c0 T intel_crtc_free_hw_state +ffffffff819d8520 T intel_crtc_destroy_state +ffffffff819d85d0 T intel_atomic_state_alloc +ffffffff819d8650 T intel_atomic_state_free +ffffffff819d8690 T intel_atomic_state_clear +ffffffff819d86e0 T intel_atomic_get_crtc_state +ffffffff819d9000 T intel_plane_alloc +ffffffff819d90c0 T intel_plane_free +ffffffff819d9100 T intel_plane_destroy_state +ffffffff819d91d0 T intel_plane_duplicate_state +ffffffff819d9280 T intel_adjusted_rate +ffffffff819d9300 T intel_plane_pixel_rate +ffffffff819d9390 T intel_plane_data_rate +ffffffff819d9450 T intel_plane_calc_min_cdclk +ffffffff819d95b0 T intel_plane_copy_uapi_to_hw_state +ffffffff819d9720 T intel_plane_copy_hw_state +ffffffff819d9810 T intel_plane_set_invisible +ffffffff819d9910 T intel_plane_atomic_check_with_state +ffffffff819da580 T intel_plane_atomic_check +ffffffff819da6e0 T intel_plane_update_noarm +ffffffff819da720 T intel_plane_update_arm +ffffffff819da760 T intel_plane_disable_arm +ffffffff819da780 T intel_crtc_planes_update_noarm +ffffffff819da8a0 T intel_crtc_planes_update_arm +ffffffff819dac90 T intel_atomic_plane_check_clipping +ffffffff819daef0 T intel_plane_check_src_coordinates +ffffffff819db0b0 T intel_plane_helper_add +ffffffff819db0f0 t intel_prepare_plane_fb +ffffffff819db350 t intel_cleanup_plane_fb +ffffffff819dc000 T intel_audio_sdp_split_update +ffffffff819dc0d0 T intel_audio_compute_config +ffffffff819dc180 T intel_audio_codec_enable +ffffffff819dc370 T intel_audio_codec_disable +ffffffff819dc5c0 T intel_audio_codec_get_config +ffffffff819dc610 T intel_audio_hooks_init +ffffffff819dc690 T intel_audio_cdclk_change_pre +ffffffff819dc720 T intel_audio_cdclk_change_post +ffffffff819dc800 T intel_audio_init +ffffffff819dc810 T intel_audio_deinit +ffffffff819dc860 t g4x_audio_codec_enable +ffffffff819dca20 t g4x_audio_codec_disable +ffffffff819dcaa0 t g4x_audio_codec_get_config +ffffffff819dcbb0 t ibx_audio_codec_enable +ffffffff819dcd70 t ibx_audio_codec_disable +ffffffff819dcf40 t intel_acomp_get_config +ffffffff819dcfc0 t audio_config_hdmi_pixel_clock +ffffffff819dd190 t hsw_audio_codec_enable +ffffffff819dd9d0 t hsw_audio_codec_disable +ffffffff819de000 T intel_backlight_invert_pwm_level +ffffffff819de0c0 T intel_backlight_set_pwm_level +ffffffff819de130 T intel_backlight_level_to_pwm +ffffffff819de320 T intel_backlight_level_from_pwm +ffffffff819de4c0 T intel_backlight_set_acpi +ffffffff819de6d0 T intel_backlight_disable +ffffffff819de7b0 T intel_backlight_enable +ffffffff819de850 t __intel_backlight_enable +ffffffff819de990 T intel_backlight_device_register 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intel_bios_init +ffffffff819e5500 T intel_bios_init_panel_early +ffffffff819e5520 t intel_bios_init_panel +ffffffff819e75a0 T intel_bios_init_panel_late +ffffffff819e75c0 T intel_bios_driver_remove +ffffffff819e76b0 T intel_bios_fini_panel +ffffffff819e7790 T intel_bios_is_tv_present +ffffffff819e7810 T intel_bios_is_lvds_present +ffffffff819e78c0 T intel_bios_is_port_present +ffffffff819e7990 T intel_bios_encoder_supports_dp_dual_mode +ffffffff819e7a00 T intel_bios_is_dsi_present +ffffffff819e7ad0 T intel_bios_get_dsc_params +ffffffff819e7cf0 T intel_bios_dp_aux_ch +ffffffff819e7df0 T intel_bios_dp_has_shared_aux_ch +ffffffff819e7e80 T intel_bios_dp_boost_level +ffffffff819e7f10 T intel_bios_hdmi_boost_level +ffffffff819e7fa0 T intel_bios_hdmi_ddc_pin +ffffffff819e8100 T intel_bios_encoder_supports_typec_usb +ffffffff819e8150 T intel_bios_encoder_supports_tbt +ffffffff819e81a0 T intel_bios_encoder_lane_reversal +ffffffff819e81e0 T intel_bios_encoder_hpd_invert +ffffffff819e8220 T intel_bios_encoder_data_lookup +ffffffff819e82e0 T intel_bios_for_each_encoder +ffffffff819e8360 t opregion_get_panel_type +ffffffff819e8380 t vbt_get_panel_type +ffffffff819e8470 t pnpid_get_panel_type +ffffffff819e8650 t fallback_get_panel_type +ffffffff819e8680 t fill_detail_timing_data +ffffffff819e9000 T icl_pcode_restrict_qgv_points +ffffffff819e9120 T intel_bw_init_hw +ffffffff819e9290 t tgl_get_bw_info +ffffffff819e9880 t icl_get_bw_info +ffffffff819e9c50 T intel_bw_crtc_update +ffffffff819e9d30 t intel_bw_crtc_data_rate +ffffffff819e9e50 T intel_atomic_get_old_bw_state +ffffffff819e9e70 T intel_atomic_get_new_bw_state +ffffffff819e9e90 T intel_atomic_get_bw_state +ffffffff819e9eb0 T intel_bw_min_cdclk +ffffffff819ea130 T intel_bw_calc_min_cdclk +ffffffff819ea4f0 T intel_bw_atomic_check +ffffffff819eaf60 T intel_bw_init +ffffffff819eafd0 t icl_get_qgv_points +ffffffff819eb530 t skl_plane_calc_dbuf_bw +ffffffff819eb670 t intel_bw_duplicate_state +ffffffff819eb6e0 t intel_bw_destroy_state +ffffffff819ec000 T intel_cdclk_get_cdclk +ffffffff819ec020 T intel_cdclk_init_hw +ffffffff819ec7d0 T intel_cdclk_uninit_hw +ffffffff819ec8e0 T intel_cdclk_needs_modeset +ffffffff819ec920 T intel_cdclk_dump_config +ffffffff819ec9a0 T intel_set_cdclk_pre_plane_update +ffffffff819ecc80 t intel_set_cdclk +ffffffff819ed050 T intel_set_cdclk_post_plane_update +ffffffff819ed2d0 T intel_crtc_compute_min_cdclk +ffffffff819ed660 T intel_atomic_get_cdclk_state +ffffffff819ed680 T intel_cdclk_atomic_check +ffffffff819ed780 T intel_cdclk_init +ffffffff819ed7f0 T intel_modeset_calc_cdclk +ffffffff819ede20 t intel_cdclk_can_crawl +ffffffff819edeb0 T intel_update_max_cdclk +ffffffff819ee210 T intel_update_cdclk +ffffffff819ee2b0 T intel_read_rawclk +ffffffff819ee430 t i9xx_hrawclk +ffffffff819ee4e0 T intel_cdclk_debugfs_register +ffffffff819ee510 T intel_init_cdclk_hooks +ffffffff819ee930 t bxt_set_cdclk +ffffffff819eefa0 t _bxt_set_cdclk +ffffffff819ef750 t skl_set_cdclk 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i9xx_color_commit_arm +ffffffff819f3d60 t chv_load_luts +ffffffff819f4160 t chv_read_luts +ffffffff819f43e0 t chv_lut_equal +ffffffff819f4710 t chv_read_csc +ffffffff819f4830 t intel_color_add_affected_planes +ffffffff819f49a0 t _check_luts +ffffffff819f4b00 t i965_load_luts +ffffffff819f4e70 t i965_read_luts +ffffffff819f5240 t vlv_color_check +ffffffff819f56e0 t vlv_load_luts +ffffffff819f5890 t i965_lut_equal +ffffffff819f5a70 t vlv_read_csc +ffffffff819f5c50 t i9xx_color_check +ffffffff819f5ed0 t i9xx_load_luts +ffffffff819f6340 t i9xx_read_luts +ffffffff819f66e0 t i9xx_lut_equal +ffffffff819f68f0 t icl_color_check +ffffffff819f6cf0 t icl_color_commit_noarm +ffffffff819f6fb0 t icl_color_commit_arm +ffffffff819f7090 t icl_load_luts +ffffffff819f78a0 t icl_read_luts +ffffffff819f7bc0 t icl_lut_equal +ffffffff819f7f30 t icl_read_csc +ffffffff819f81e0 t ilk_csc_convert_ctm +ffffffff819f8600 t ilk_update_pipe_csc +ffffffff819f8850 t glk_load_degamma_lut +ffffffff819f8af0 t ivb_load_lut_ext_max +ffffffff819f8c20 t glk_load_lut_ext2_max +ffffffff819f8d50 t bdw_load_lut_10 +ffffffff819f8f90 t glk_read_degamma_lut +ffffffff819f9110 t bdw_read_lut_10 +ffffffff819f9290 t ilk_read_pipe_csc +ffffffff819f94c0 t icl_color_post_update +ffffffff819f94f0 t glk_color_check +ffffffff819f99e0 t skl_color_commit_noarm +ffffffff819f9a30 t skl_color_commit_arm +ffffffff819f9b50 t glk_load_luts +ffffffff819f9d00 t glk_read_luts +ffffffff819f9e80 t glk_lut_equal +ffffffff819fa1a0 t skl_read_csc +ffffffff819fa1f0 t ilk_csc_limited_range +ffffffff819fa290 t ilk_assign_csc +ffffffff819fa590 t ivb_color_check +ffffffff819fabe0 t bdw_load_luts +ffffffff819fadc0 t bdw_read_luts +ffffffff819fafb0 t ivb_lut_equal +ffffffff819fb370 t ilk_assign_luts +ffffffff819fb590 t ilk_color_commit_noarm +ffffffff819fb5e0 t hsw_color_commit_arm +ffffffff819fb690 t ilk_read_csc +ffffffff819fb6e0 t ivb_load_luts +ffffffff819fb8c0 t ivb_read_luts +ffffffff819fbd70 t ivb_load_lut_10 +ffffffff819fbf70 t ilk_color_commit_arm +ffffffff819fbff0 t ilk_color_check +ffffffff819fc250 t ilk_load_luts +ffffffff819fc4e0 t ilk_read_luts +ffffffff819fc740 t ilk_lut_equal +ffffffff819fd000 T intel_combo_phy_power_up_lanes +ffffffff819fd120 T intel_combo_phy_init +ffffffff819fd5c0 T intel_combo_phy_uninit +ffffffff819fd790 t icl_combo_phy_verify_state +ffffffff819fe000 T intel_connector_init +ffffffff819fe070 T intel_connector_alloc +ffffffff819fe100 T intel_connector_free +ffffffff819fe140 T intel_connector_destroy +ffffffff819fe1a0 T intel_connector_register +ffffffff819fe1b0 T intel_connector_unregister +ffffffff819fe1c0 T intel_connector_attach_encoder +ffffffff819fe1e0 T intel_connector_get_hw_state +ffffffff819fe230 T intel_connector_get_pipe +ffffffff819fe2f0 T intel_connector_update_modes +ffffffff819fe320 T intel_ddc_get_modes +ffffffff819fe390 T intel_attach_force_audio_property +ffffffff819fe430 T intel_attach_broadcast_rgb_property +ffffffff819fe4d0 T intel_attach_aspect_ratio_property +ffffffff819fe530 T intel_attach_hdmi_colorspace_property +ffffffff819fe580 T intel_attach_dp_colorspace_property +ffffffff819fe5d0 T intel_attach_scaling_mode_property +ffffffff819ff000 T intel_crt_port_enabled +ffffffff819ff080 T intel_crt_reset +ffffffff819ff160 T intel_crt_init +ffffffff819ff590 t hsw_crt_get_config +ffffffff819ff640 t hsw_crt_compute_config +ffffffff819ff730 t hsw_pre_pll_enable_crt +ffffffff819ff7a0 t hsw_pre_enable_crt +ffffffff819ff840 t hsw_enable_crt +ffffffff819ff9e0 t hsw_disable_crt +ffffffff819ffa50 t hsw_post_disable_crt +ffffffff819ffbf0 t pch_crt_compute_config +ffffffff819ffc40 t pch_disable_crt +ffffffff819ffc70 t pch_post_disable_crt +ffffffff819ffd60 t intel_crt_compute_config +ffffffff819ffdb0 t intel_disable_crt +ffffffff819ffea0 t intel_crt_get_config +ffffffff819fff40 t intel_crt_get_hw_state +ffffffff81a00000 t intel_enable_crt +ffffffff81a000f0 t intel_spurious_crt_detect_dmi_callback +ffffffff81a00150 t intel_crt_get_modes +ffffffff81a00250 t intel_crt_detect +ffffffff81a004c0 t intel_crt_mode_valid +ffffffff81a005d0 t intel_crt_get_edid +ffffffff81a00670 t intel_crt_detect_hotplug +ffffffff81a00ac0 t intel_crt_detect_ddc +ffffffff81a00b90 t intel_crt_load_detect +ffffffff81a02000 T intel_first_crtc +ffffffff81a02020 T intel_crtc_for_pipe +ffffffff81a02080 T intel_crtc_wait_for_next_vblank +ffffffff81a02090 T intel_wait_for_vblank_if_active +ffffffff81a02100 T intel_crtc_get_vblank_counter +ffffffff81a02180 T intel_crtc_max_vblank_count +ffffffff81a02210 T intel_crtc_vblank_on +ffffffff81a022a0 t assert_vblank_disabled +ffffffff81a02380 T intel_crtc_vblank_off +ffffffff81a023b0 T intel_crtc_state_alloc +ffffffff81a02450 T intel_crtc_state_reset +ffffffff81a024d0 T intel_crtc_init +ffffffff81a02850 T intel_wait_for_vblank_workers +ffffffff81a02910 T intel_usecs_to_scanlines +ffffffff81a02960 T intel_pipe_update_start +ffffffff81a02d50 T intel_pipe_update_end +ffffffff81a03060 t intel_crtc_destroy +ffffffff81a03090 t intel_crtc_late_register +ffffffff81a030c0 t intel_crtc_vblank_work +ffffffff81a04000 T intel_output_format_name +ffffffff81a04040 T intel_crtc_state_dump +ffffffff81a05430 t ilk_dump_csc +ffffffff81a06000 T intel_cursor_plane_create +ffffffff81a06200 t i845_cursor_max_stride +ffffffff81a06230 t i845_cursor_update_arm +ffffffff81a064b0 t i845_cursor_disable_arm +ffffffff81a064d0 t i845_cursor_get_hw_state +ffffffff81a06580 t i845_check_cursor +ffffffff81a06720 t i9xx_cursor_max_stride +ffffffff81a06760 t i9xx_cursor_update_arm +ffffffff81a06b20 t i9xx_cursor_disable_arm +ffffffff81a06b40 t i9xx_cursor_get_hw_state +ffffffff81a06c30 t i9xx_check_cursor +ffffffff81a06eb0 t intel_check_cursor +ffffffff81a070c0 t intel_legacy_cursor_update +ffffffff81a07480 t intel_cursor_format_mod_supported +ffffffff81a08000 T intel_is_c10phy +ffffffff81a08040 T intel_cx0_phy_set_signal_levels +ffffffff81a08630 t intel_cx0_rmw +ffffffff81a08720 T intel_c10pll_readout_hw_state +ffffffff81a088b0 T intel_c10pll_dump_hw_state +ffffffff81a08b30 T intel_cx0_phy_check_hdmi_link_rate +ffffffff81a08ca0 T intel_cx0pll_calc_state +ffffffff81a090b0 T intel_c20pll_readout_hw_state +ffffffff81a095d0 t intel_c20_sram_read +ffffffff81a096e0 T intel_c20pll_dump_hw_state +ffffffff81a09a90 T intel_c10pll_calc_port_clock +ffffffff81a09b70 T intel_c20pll_calc_port_clock +ffffffff81a09c70 T intel_mtl_tbt_calc_port_clock +ffffffff81a09dd0 T intel_mtl_pll_enable +ffffffff81a0b5d0 T intel_mtl_pll_disable +ffffffff81a0ba40 T intel_mtl_port_pll_type +ffffffff81a0bad0 T intel_c10pll_state_verify +ffffffff81a0bdc0 t __intel_cx0_read +ffffffff81a0c150 t __intel_cx0_write +ffffffff81a0c4a0 t intel_cx0_bus_reset +ffffffff81a0c5d0 t intel_cx0_wait_for_ack +ffffffff81a0c750 t intel_cx0_powerdown_change_sequence +ffffffff81a0c9b0 t intel_c20_sram_write +ffffffff81a0d000 T hsw_prepare_dp_ddi_buffers +ffffffff81a0d1a0 T intel_wait_ddi_buf_idle +ffffffff81a0d3a0 T intel_ddi_set_dp_msa +ffffffff81a0d570 T intel_ddi_enable_transcoder_func +ffffffff81a0d650 t intel_ddi_transcoder_func_reg_val_get +ffffffff81a0d900 T intel_ddi_disable_transcoder_func +ffffffff81a0daf0 T intel_ddi_toggle_hdcp_bits +ffffffff81a0dc10 T intel_ddi_connector_get_hw_state +ffffffff81a0dd60 T intel_ddi_get_hw_state +ffffffff81a0ddd0 t intel_ddi_get_encoder_pipes +ffffffff81a0e220 T intel_ddi_enable_transcoder_clock +ffffffff81a0e2e0 T intel_ddi_disable_transcoder_clock +ffffffff81a0e350 T intel_ddi_level +ffffffff81a0e530 T icl_ddi_combo_get_pll +ffffffff81a0e5b0 T hsw_ddi_enable_clock +ffffffff81a0e670 T hsw_ddi_disable_clock +ffffffff81a0e6b0 T hsw_ddi_is_clock_enabled +ffffffff81a0e710 T intel_ddi_enable_clock +ffffffff81a0e750 T intel_ddi_disable_clock +ffffffff81a0e790 T intel_ddi_sanitize_encoder_pll_mapping +ffffffff81a0e970 T dp_tp_ctl_reg +ffffffff81a0e9f0 T dp_tp_status_reg +ffffffff81a0ea70 T intel_ddi_update_pipe +ffffffff81a0eb00 T intel_ddi_update_active_dpll +ffffffff81a0ebf0 T intel_ddi_compute_min_voltage_level +ffffffff81a0ec70 T intel_ddi_get_clock +ffffffff81a0ed80 T intel_ddi_port_pll_type +ffffffff81a0edc0 T hsw_ddi_get_config +ffffffff81a0eeb0 t intel_ddi_get_config +ffffffff81a0f800 T intel_ddi_init +ffffffff81a10580 t intel_ddi_hotplug +ffffffff81a10990 t intel_ddi_compute_output_type +ffffffff81a10a10 t intel_ddi_compute_config +ffffffff81a10b80 t intel_ddi_compute_config_late +ffffffff81a10e40 t intel_enable_ddi +ffffffff81a11790 t intel_ddi_pre_pll_enable +ffffffff81a11980 t intel_ddi_pre_enable +ffffffff81a12980 t intel_disable_ddi +ffffffff81a12b30 t intel_ddi_post_pll_disable +ffffffff81a12c10 t intel_ddi_post_disable +ffffffff81a130a0 t intel_ddi_sync_state +ffffffff81a13160 t intel_ddi_initial_fastset_check +ffffffff81a13220 t intel_ddi_encoder_suspend +ffffffff81a13230 t intel_ddi_encoder_shutdown +ffffffff81a13260 t intel_ddi_get_power_domains +ffffffff81a133e0 t mtl_ddi_get_config +ffffffff81a134c0 t dg2_ddi_get_config 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icl_ddi_tc_is_clock_enabled +ffffffff81a148b0 t icl_ddi_tc_get_config +ffffffff81a14ad0 t bxt_ddi_get_config +ffffffff81a14b40 t skl_ddi_enable_clock +ffffffff81a14c40 t skl_ddi_disable_clock +ffffffff81a14cd0 t skl_ddi_is_clock_enabled +ffffffff81a14d40 t skl_ddi_get_config +ffffffff81a14dd0 t icl_combo_phy_set_signal_levels +ffffffff81a15890 t tgl_dkl_phy_set_signal_levels +ffffffff81a15ba0 t icl_mg_phy_set_signal_levels +ffffffff81a16430 t hsw_set_signal_levels +ffffffff81a167a0 t intel_ddi_max_lanes +ffffffff81a16870 t need_aux_ch +ffffffff81a168e0 t intel_ddi_tc_encoder_suspend_complete +ffffffff81a16920 t intel_ddi_tc_encoder_shutdown_complete +ffffffff81a16960 t lpt_digital_port_connected +ffffffff81a169d0 t bdw_digital_port_connected +ffffffff81a16a40 t hsw_digital_port_connected +ffffffff81a16ab0 t intel_ddi_init_dp_connector +ffffffff81a16b90 t intel_ddi_init_hdmi_connector +ffffffff81a16c00 t intel_ddi_encoder_reset +ffffffff81a16ce0 t intel_ddi_encoder_destroy +ffffffff81a16d90 t intel_ddi_encoder_late_register +ffffffff81a16df0 t mtl_ddi_enable_d2d +ffffffff81a16fb0 t intel_wait_ddi_buf_active +ffffffff81a172c0 t intel_ddi_main_link_aux_domain +ffffffff81a173b0 t icl_program_mg_dp_mode +ffffffff81a17680 t intel_ddi_init_dp_buf_reg +ffffffff81a17880 t intel_disable_ddi_buf +ffffffff81a17a30 t mtl_disable_ddi_buf +ffffffff81a17e50 t intel_ddi_disable_fec_state +ffffffff81a17fa0 t mtl_ddi_prepare_link_retrain +ffffffff81a182e0 t intel_ddi_prepare_link_retrain +ffffffff81a187e0 t intel_ddi_set_link_train +ffffffff81a18930 t intel_ddi_set_idle_link_train +ffffffff81a18b00 t intel_ddi_dp_voltage_max +ffffffff81a18bc0 t intel_ddi_dp_preemph_max +ffffffff81a19000 T is_hobl_buf_trans +ffffffff81a19040 T intel_ddi_buf_trans_init +ffffffff81a19300 t mtl_get_cx0_buf_trans +ffffffff81a193e0 t dg2_get_snps_buf_trans +ffffffff81a19450 t adlp_get_combo_buf_trans +ffffffff81a19570 t adlp_get_dkl_buf_trans +ffffffff81a195d0 t adls_get_combo_buf_trans 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intel_phy_is_combo +ffffffff81a1c790 T intel_phy_is_tc +ffffffff81a1c800 T intel_phy_is_snps +ffffffff81a1c850 T intel_port_to_phy +ffffffff81a1c900 T intel_port_to_tc +ffffffff81a1ca10 T intel_aux_power_domain +ffffffff81a1ca50 T intel_modeset_get_crtc_power_domains +ffffffff81a1cc80 T intel_modeset_put_crtc_power_domains +ffffffff81a1ccb0 T intel_encoder_destroy +ffffffff81a1cce0 T intel_encoder_get_config +ffffffff81a1cd10 t intel_crtc_readout_derived_state +ffffffff81a1d150 T intel_link_compute_m_n +ffffffff81a1d280 T intel_panel_sanitize_ssc +ffffffff81a1d360 T intel_zero_m_n +ffffffff81a1d3a0 T intel_set_m_n +ffffffff81a1d460 T intel_cpu_transcoder_has_m2_n2 +ffffffff81a1d4c0 T intel_cpu_transcoder_set_m1_n1 +ffffffff81a1d670 T intel_cpu_transcoder_set_m2_n2 +ffffffff81a1d7d0 T i9xx_set_pipeconf +ffffffff81a1d980 T ilk_set_pipeconf +ffffffff81a1db50 T bdw_get_pipe_misc_bpp +ffffffff81a1dc20 T ilk_get_lanes_required +ffffffff81a1dc80 T intel_get_m_n +ffffffff81a1dd90 T intel_cpu_transcoder_get_m1_n1 +ffffffff81a1df20 T intel_cpu_transcoder_get_m2_n2 +ffffffff81a1e080 T intel_crtc_get_pipe_config +ffffffff81a1e0f0 T i9xx_crtc_clock_get +ffffffff81a1e380 T intel_dotclock_calculate +ffffffff81a1e3e0 T intel_crtc_dotclock +ffffffff81a1e4b0 T intel_encoder_current_mode +ffffffff81a1e660 T intel_fuzzy_clock_check +ffffffff81a1e6b0 T intel_pipe_config_compare +ffffffff81a21a00 t pipe_config_mismatch +ffffffff81a21af0 t pipe_config_infoframe_mismatch +ffffffff81a21c90 T intel_modeset_all_pipes +ffffffff81a21ea0 T intel_atomic_add_affected_planes +ffffffff81a21f70 T intel_calc_active_pipes +ffffffff81a22000 T intel_atomic_check +ffffffff81a24010 t copy_bigjoiner_crtc_state_nomodeset +ffffffff81a24120 t intel_atomic_check_planes +ffffffff81a24b90 t intel_modeset_checks +ffffffff81a24d20 t intel_atomic_check_crtcs +ffffffff81a25140 t intel_async_flip_check_hw +ffffffff81a25620 T intel_crtc_arm_fifo_underrun +ffffffff81a256c0 T intel_atomic_helper_free_state_worker +ffffffff81a25740 T intel_atomic_commit +ffffffff81a25aa0 t intel_atomic_commit_ready +ffffffff81a25b30 t intel_atomic_commit_work +ffffffff81a25b50 t intel_atomic_commit_tail +ffffffff81a26cd0 T intel_plane_destroy +ffffffff81a26d00 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81a26d70 T assert_port_valid +ffffffff81a26df0 T intel_setup_outputs +ffffffff81a27680 T intel_mode_valid +ffffffff81a27800 T intel_cpu_transcoder_mode_valid +ffffffff81a278c0 T intel_mode_valid_max_plane_size +ffffffff81a27940 T intel_init_display_hooks +ffffffff81a279c0 T intel_initial_commit +ffffffff81a27b60 T i830_enable_pipe +ffffffff81a281a0 T i830_disable_pipe +ffffffff81a284d0 T intel_hpd_poll_fini +ffffffff81a285d0 T intel_scanout_needs_vtd_wa +ffffffff81a28610 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81a28770 t intel_atomic_cleanup_work +ffffffff81a28870 t intel_pre_plane_update +ffffffff81a28dd0 t hsw_get_pipe_config +ffffffff81a29a00 t hsw_crtc_enable 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i915gm_enable_vblank +ffffffff81a33610 T i965_enable_vblank +ffffffff81a33680 T ilk_enable_vblank +ffffffff81a33730 T bdw_enable_vblank +ffffffff81a338e0 T i8xx_disable_vblank +ffffffff81a33940 T i915gm_disable_vblank +ffffffff81a33a00 T i965_disable_vblank +ffffffff81a33a60 T ilk_disable_vblank +ffffffff81a33b60 T bdw_disable_vblank +ffffffff81a33ce0 T vlv_display_irq_reset +ffffffff81a33dd0 T vlv_display_irq_postinstall +ffffffff81a33f20 T gen8_display_irq_reset +ffffffff81a340b0 T gen11_display_irq_reset +ffffffff81a34380 T gen8_irq_power_well_post_enable +ffffffff81a344f0 T gen8_irq_power_well_pre_disable +ffffffff81a34600 T valleyview_enable_display_irqs +ffffffff81a34720 T valleyview_disable_display_irqs +ffffffff81a34830 T ilk_de_irq_postinstall +ffffffff81a34940 T gen8_de_irq_postinstall +ffffffff81a34db0 T gen11_de_irq_postinstall +ffffffff81a34e20 T dg1_de_irq_postinstall +ffffffff81a34e90 T intel_display_irq_init +ffffffff81a35000 T intel_display_power_domain_str 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icl_display_core_init +ffffffff81a37320 t bxt_display_core_init +ffffffff81a37470 t vlv_cmnlane_wa +ffffffff81a37540 t assert_ved_power_gated +ffffffff81a375f0 t hsw_assert_cdclk +ffffffff81a37700 t intel_pch_reset_handshake +ffffffff81a377b0 T intel_power_domains_driver_remove +ffffffff81a378a0 T intel_power_domains_sanitize_state +ffffffff81a37990 T intel_power_domains_enable +ffffffff81a379f0 T intel_power_domains_disable +ffffffff81a37aa0 T intel_power_domains_suspend +ffffffff81a37c50 t icl_display_core_uninit +ffffffff81a37d60 t bxt_display_core_uninit +ffffffff81a37e20 T intel_power_domains_resume +ffffffff81a37ef0 T intel_display_power_suspend_late +ffffffff81a37fd0 t hsw_enable_pc8 +ffffffff81a38c80 T intel_display_power_resume_early +ffffffff81a38d70 t hsw_disable_pc8 +ffffffff81a39190 T intel_display_power_suspend +ffffffff81a39210 T intel_display_power_resume +ffffffff81a392f0 T intel_display_power_debug +ffffffff81a393b0 T intel_display_power_ddi_io_domain +ffffffff81a394a0 T intel_display_power_ddi_lanes_domain +ffffffff81a39590 T intel_display_power_aux_io_domain +ffffffff81a396a0 T intel_display_power_legacy_aux_domain +ffffffff81a397b0 T intel_display_power_tbt_aux_domain +ffffffff81a398c0 t __delayed_work_tick +ffffffff81a3a000 T intel_display_power_map_init +ffffffff81a3a180 t __set_power_wells +ffffffff81a3a560 T intel_display_power_map_cleanup +ffffffff81a3b000 T lookup_power_well +ffffffff81a3b0c0 T intel_power_well_enable +ffffffff81a3b150 T intel_power_well_name +ffffffff81a3b190 T intel_power_well_disable +ffffffff81a3b200 T intel_power_well_sync_hw +ffffffff81a3b270 T intel_power_well_get +ffffffff81a3b310 T intel_power_well_put +ffffffff81a3b410 T intel_power_well_is_enabled +ffffffff81a3b430 T intel_power_well_is_enabled_cached +ffffffff81a3b460 T intel_display_power_well_is_enabled +ffffffff81a3b510 T intel_power_well_is_always_on +ffffffff81a3b550 T intel_power_well_domains +ffffffff81a3b580 T intel_power_well_refcount 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t i830_pipes_power_well_disable +ffffffff81a3d3c0 t i830_pipes_power_well_enabled +ffffffff81a3d460 t hsw_power_well_sync_hw +ffffffff81a3d550 t hsw_power_well_enable +ffffffff81a3d7d0 t hsw_power_well_disable +ffffffff81a3d890 t hsw_power_well_enabled +ffffffff81a3d970 t gen9_dc_off_power_well_enable +ffffffff81a3d980 t gen9_dc_off_power_well_disable +ffffffff81a3da20 t gen9_dc_off_power_well_enabled +ffffffff81a3dab0 t bxt_dpio_cmn_power_well_enable +ffffffff81a3dae0 t bxt_dpio_cmn_power_well_disable +ffffffff81a3db10 t bxt_dpio_cmn_power_well_enabled +ffffffff81a3db40 t vlv_display_power_well_enable +ffffffff81a3db70 t vlv_display_power_well_disable +ffffffff81a3dbe0 t vlv_dpio_cmn_power_well_enable +ffffffff81a3dc60 t vlv_dpio_cmn_power_well_disable +ffffffff81a3dd60 t vlv_power_well_enable +ffffffff81a3dd80 t vlv_power_well_disable +ffffffff81a3dda0 t icl_aux_power_well_enable +ffffffff81a3e430 t icl_aux_power_well_disable +ffffffff81a3e6c0 t tgl_tc_cold_off_power_well_sync_hw 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+ffffffff81a42390 T intel_dkl_phy_posting_read +ffffffff81a43000 T intel_dmc_has_payload +ffffffff81a43050 T intel_dmc_enable_pipe +ffffffff81a43160 T intel_dmc_disable_pipe +ffffffff81a43270 T intel_dmc_load_program +ffffffff81a43aa0 t pipedmc_clock_gating_wa +ffffffff81a43c90 T intel_dmc_disable_program +ffffffff81a43ec0 T assert_dmc_loaded +ffffffff81a44040 T intel_dmc_init +ffffffff81a44300 t dmc_load_work_fn +ffffffff81a44c10 T intel_dmc_suspend +ffffffff81a44ca0 T intel_dmc_resume +ffffffff81a44d40 T intel_dmc_fini +ffffffff81a44e90 T intel_dmc_print_error_state +ffffffff81a44f90 T intel_dmc_debugfs_register +ffffffff81a45000 T intel_dp_is_edp +ffffffff81a45030 T intel_dp_is_uhbr +ffffffff81a45070 T intel_dp_max_lane_count +ffffffff81a450e0 T intel_dp_link_required +ffffffff81a45120 T intel_dp_max_data_rate +ffffffff81a45180 T intel_dp_can_bigjoiner +ffffffff81a451d0 T intel_dp_get_link_train_fallback_values +ffffffff81a45580 T intel_dp_mode_to_fec_clock +ffffffff81a455d0 T intel_dp_dsc_nearest_valid_bpp +ffffffff81a456d0 T intel_dp_dsc_get_output_bpp +ffffffff81a457f0 T intel_dp_dsc_get_slice_count +ffffffff81a45980 T intel_dp_min_bpp +ffffffff81a459c0 T intel_dp_need_bigjoiner +ffffffff81a45a20 T intel_dp_source_supports_tps3 +ffffffff81a45a70 T intel_dp_source_supports_tps4 +ffffffff81a45ab0 T intel_dp_max_link_rate +ffffffff81a45b60 T intel_dp_rate_select +ffffffff81a45c00 T intel_dp_compute_rate +ffffffff81a45cd0 T intel_dp_has_hdmi_sink +ffffffff81a45d10 T intel_dp_adjust_compliance_config +ffffffff81a45e50 T intel_dp_dsc_compute_bpp +ffffffff81a45f00 T intel_dp_dsc_compute_config +ffffffff81a465d0 T intel_dp_limited_color_range +ffffffff81a46640 T intel_dp_compute_psr_vsc_sdp +ffffffff81a466c0 T intel_dp_needs_vsc_sdp +ffffffff81a46710 t intel_dp_compute_vsc_colorimetry +ffffffff81a46890 T intel_dp_compute_config +ffffffff81a46ce0 t intel_dp_compute_output_format +ffffffff81a46f10 t intel_dp_audio_compute_config +ffffffff81a46ff0 t intel_dp_drrs_compute_config +ffffffff81a47190 t intel_dp_compute_vsc_sdp +ffffffff81a47230 t intel_dp_compute_hdr_metadata_infoframe_sdp +ffffffff81a472c0 T intel_dp_set_link_params +ffffffff81a47300 T intel_edp_backlight_on +ffffffff81a473a0 T intel_edp_backlight_off +ffffffff81a47430 T intel_dp_sink_set_decompression_state +ffffffff81a474d0 T intel_dp_wait_source_oui +ffffffff81a475c0 T intel_dp_set_power +ffffffff81a477e0 T intel_dp_sync_state +ffffffff81a47860 t intel_dp_get_dpcd +ffffffff81a479c0 t intel_dp_reset_max_link_params +ffffffff81a47ac0 T intel_dp_initial_fastset_check +ffffffff81a47bf0 T intel_dp_check_frl_training +ffffffff81a481a0 T intel_dp_pcon_dsc_configure +ffffffff81a48390 T intel_dp_configure_protocol_converter +ffffffff81a48570 T intel_dp_get_colorimetry_status +ffffffff81a485d0 T intel_edp_fixup_vbt_bpp +ffffffff81a48660 T intel_write_dp_vsc_sdp +ffffffff81a48800 T intel_dp_set_infoframes +ffffffff81a48920 t intel_write_dp_sdp +ffffffff81a48c00 T intel_read_dp_sdp +ffffffff81a48f20 T intel_dp_get_active_pipes +ffffffff81a49140 T intel_dp_retrain_link +ffffffff81a493f0 t intel_dp_needs_link_retrain +ffffffff81a49570 T intel_dp_phy_test +ffffffff81a49c20 T intel_digital_port_connected +ffffffff81a49cd0 T intel_dp_encoder_flush_work +ffffffff81a49d30 T intel_dp_encoder_suspend +ffffffff81a49d70 T intel_dp_encoder_shutdown +ffffffff81a49db0 T intel_dp_hpd_pulse +ffffffff81a4a420 T intel_dp_is_port_edp +ffffffff81a4a4b0 T intel_dp_init_connector +ffffffff81a4b610 t intel_dp_modeset_retry_work_fn +ffffffff81a4b6b0 t intel_dp_set_common_rates +ffffffff81a4b830 T intel_dp_mst_suspend +ffffffff81a4b8d0 T intel_dp_mst_resume +ffffffff81a4b980 t intel_dp_output_format +ffffffff81a4bac0 t intel_dp_compute_link_config +ffffffff81a4c280 t intel_dp_tmds_clock_valid +ffffffff81a4c320 t intel_dp_set_sink_rates +ffffffff81a4c550 t intel_dp_check_device_service_irq +ffffffff81a4cb20 t intel_dp_force +ffffffff81a4cc50 t intel_dp_connector_register +ffffffff81a4cd20 t intel_dp_connector_unregister +ffffffff81a4cd80 t intel_dp_oob_hotplug_event +ffffffff81a4ce00 t intel_dp_set_edid +ffffffff81a4d200 t intel_dp_get_modes +ffffffff81a4d2f0 t intel_dp_detect +ffffffff81a4dbb0 t intel_dp_mode_valid +ffffffff81a4df30 t intel_dp_connector_atomic_check +ffffffff81a4e2a0 t intel_dp_get_dsc_sink_cap +ffffffff81a4e410 t intel_dp_mode_min_output_bpp +ffffffff81a4e470 t intel_dp_mode_valid_downstream +ffffffff81a4e630 t icl_max_source_rate +ffffffff81a4f000 T intel_dp_aux_pack +ffffffff81a4f070 T intel_dp_aux_fini +ffffffff81a4f090 T intel_dp_aux_init +ffffffff81a4f2a0 t xelpdp_aux_ctl_reg +ffffffff81a4f370 t xelpdp_aux_data_reg +ffffffff81a4f440 t tgl_aux_ctl_reg +ffffffff81a4f4c0 t tgl_aux_data_reg +ffffffff81a4f550 t skl_aux_ctl_reg +ffffffff81a4f5d0 t skl_aux_data_reg +ffffffff81a4f660 t ilk_aux_ctl_reg +ffffffff81a4f6e0 t ilk_aux_data_reg +ffffffff81a4f770 t g4x_aux_ctl_reg +ffffffff81a4f7f0 t g4x_aux_data_reg +ffffffff81a4f890 t skl_get_aux_clock_divider +ffffffff81a4f8c0 t hsw_get_aux_clock_divider +ffffffff81a4f950 t ilk_get_aux_clock_divider +ffffffff81a4f9b0 t g4x_get_aux_clock_divider +ffffffff81a4fa00 t skl_get_aux_send_ctl +ffffffff81a4fa80 t g4x_get_aux_send_ctl +ffffffff81a4fae0 t kasprintf +ffffffff81a4fbb0 t intel_dp_aux_transfer +ffffffff81a4fe40 T intel_dp_aux_ch +ffffffff81a4ffa0 T intel_dp_aux_irq_handler +ffffffff81a50040 t intel_dp_aux_xfer +ffffffff81a51000 T intel_dp_aux_init_backlight_funcs +ffffffff81a51260 t intel_dp_aux_hdr_setup_backlight +ffffffff81a513e0 t intel_dp_aux_hdr_get_backlight +ffffffff81a51560 t intel_dp_aux_hdr_set_backlight +ffffffff81a51660 t intel_dp_aux_hdr_disable_backlight +ffffffff81a516e0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a51910 t intel_dp_aux_vesa_setup_backlight +ffffffff81a51b70 t intel_dp_aux_vesa_get_backlight +ffffffff81a51ba0 t intel_dp_aux_vesa_set_backlight +ffffffff81a51c40 t intel_dp_aux_vesa_disable_backlight +ffffffff81a51cf0 t intel_dp_aux_vesa_enable_backlight +ffffffff81a52000 T intel_dp_hdcp_init +ffffffff81a520b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a521a0 t intel_dp_hdcp_read_bksv +ffffffff81a52230 t intel_dp_hdcp_read_bstatus +ffffffff81a522c0 t intel_dp_hdcp_repeater_present +ffffffff81a52370 t intel_dp_hdcp_read_ri_prime +ffffffff81a52400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a524a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a52590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a52630 t intel_dp_hdcp_toggle_signalling +ffffffff81a52660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a52850 t intel_dp_hdcp_check_link +ffffffff81a528e0 t intel_dp_hdcp_capable +ffffffff81a52990 t intel_dp_hdcp2_capable +ffffffff81a52a10 t intel_dp_hdcp2_write_msg +ffffffff81a52bc0 t intel_dp_hdcp2_read_msg +ffffffff81a53290 t intel_dp_hdcp2_config_stream_type +ffffffff81a532f0 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a53550 t intel_dp_mst_hdcp2_check_link +ffffffff81a53610 t intel_dp_hdcp2_check_link +ffffffff81a54000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a540d0 t intel_dp_init_lttpr +ffffffff81a543b0 T intel_dp_get_adjust_train +ffffffff81a54ab0 T intel_dp_program_link_training_pattern +ffffffff81a54bd0 T intel_dp_set_signal_levels +ffffffff81a54f70 T intel_dp_dump_link_status +ffffffff81a55060 T intel_dp_stop_link_train +ffffffff81a55310 T intel_dp_start_link_train +ffffffff81a570a0 T intel_dp_128b132b_sdp_crc16 +ffffffff81a57170 t intel_dp_link_train_phy +ffffffff81a59000 T intel_dp_mst_encoder_active_links +ffffffff81a59030 T intel_dp_mst_encoder_init +ffffffff81a59270 T intel_dp_mst_source_support +ffffffff81a592b0 T intel_dp_mst_encoder_cleanup +ffffffff81a59310 T intel_dp_mst_is_master_trans +ffffffff81a59350 T intel_dp_mst_is_slave_trans +ffffffff81a59390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a59450 t intel_dp_add_mst_connector +ffffffff81a59680 t intel_dp_mst_poll_hpd_irq +ffffffff81a596a0 t intel_dp_mst_get_hw_state +ffffffff81a59700 t intel_dp_mst_connector_late_register +ffffffff81a59770 t intel_dp_mst_connector_early_unregister +ffffffff81a597a0 t intel_dp_mst_get_modes +ffffffff81a59840 t intel_dp_mst_detect +ffffffff81a59940 t intel_dp_mst_mode_valid_ctx +ffffffff81a59b60 t intel_mst_atomic_best_encoder +ffffffff81a59bc0 t intel_dp_mst_atomic_check +ffffffff81a59d30 t intel_dp_mst_compute_config +ffffffff81a5a280 t intel_dp_mst_compute_config_late +ffffffff81a5a380 t intel_mst_disable_dp +ffffffff81a5a460 t intel_mst_post_disable_dp +ffffffff81a5a710 t intel_mst_post_pll_disable_dp +ffffffff81a5a770 t intel_mst_pre_pll_enable_dp +ffffffff81a5a7b0 t intel_mst_pre_enable_dp +ffffffff81a5a9d0 t intel_mst_enable_dp +ffffffff81a5ad70 t intel_dp_mst_enc_get_hw_state +ffffffff81a5adb0 t intel_dp_mst_enc_get_config +ffffffff81a5add0 t intel_dp_mst_initial_fastset_check +ffffffff81a5adf0 t intel_dp_mst_encoder_destroy +ffffffff81a5ae20 t intel_dp_mst_find_vcpi_slots_for_bpp +ffffffff81a5c000 T bxt_port_to_phy_channel +ffffffff81a5c110 T bxt_ddi_phy_set_signal_levels +ffffffff81a5c4e0 T bxt_ddi_phy_is_enabled +ffffffff81a5c610 T bxt_ddi_phy_uninit +ffffffff81a5c6f0 T bxt_ddi_phy_init +ffffffff81a5c910 t _bxt_ddi_phy_init +ffffffff81a5ce50 T bxt_ddi_phy_verify_state +ffffffff81a5d130 t __phy_reg_verify_state +ffffffff81a5d230 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a5d2a0 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a5d500 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a5d6e0 T vlv_dig_port_to_channel +ffffffff81a5d750 T vlv_dig_port_to_phy +ffffffff81a5d7c0 T vlv_pipe_to_channel +ffffffff81a5d820 T chv_set_phy_signal_level +ffffffff81a5db70 T chv_data_lane_soft_reset +ffffffff81a5dd40 T chv_phy_pre_pll_enable +ffffffff81a5dfe0 T chv_phy_pre_encoder_enable +ffffffff81a5e240 T chv_phy_release_cl2_override +ffffffff81a5e2d0 T chv_phy_post_pll_disable +ffffffff81a5e380 T vlv_set_phy_signal_level +ffffffff81a5e4f0 T vlv_phy_pre_pll_enable +ffffffff81a5e5f0 T vlv_phy_pre_encoder_enable +ffffffff81a5e6f0 T vlv_phy_reset_lanes +ffffffff81a5f000 T pnv_calc_dpll_params +ffffffff81a5f0c0 T i9xx_calc_dpll_params +ffffffff81a5f190 T vlv_calc_dpll_params +ffffffff81a5f250 T chv_calc_dpll_params +ffffffff81a5f320 T bxt_find_best_dpll +ffffffff81a5f340 t chv_find_best_dpll +ffffffff81a5f680 T i9xx_dpll_compute_fp +ffffffff81a5f6c0 T vlv_compute_dpll +ffffffff81a5f740 T chv_compute_dpll +ffffffff81a5f7c0 T intel_dpll_crtc_compute_clock +ffffffff81a5f8c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a5fa10 T intel_dpll_init_clock_hook +ffffffff81a5fb20 T i9xx_enable_pll +ffffffff81a5fef0 T vlv_enable_pll +ffffffff81a60410 T chv_enable_pll +ffffffff81a609e0 T vlv_force_pll_on +ffffffff81a60b30 T vlv_disable_pll +ffffffff81a60c00 T chv_disable_pll +ffffffff81a60d30 T i9xx_disable_pll +ffffffff81a60e50 T vlv_force_pll_off +ffffffff81a60f50 T assert_pll_enabled +ffffffff81a61050 T assert_pll_disabled +ffffffff81a61150 t intel_pll_is_valid +ffffffff81a61210 t mtl_crtc_compute_clock +ffffffff81a612d0 t dg2_crtc_compute_clock +ffffffff81a61350 t hsw_crtc_compute_clock +ffffffff81a61410 t hsw_crtc_get_shared_dpll +ffffffff81a614b0 t ilk_crtc_compute_clock +ffffffff81a617b0 t ilk_crtc_get_shared_dpll +ffffffff81a61800 t g4x_find_best_dpll +ffffffff81a61b40 t chv_crtc_compute_clock +ffffffff81a61c50 t vlv_crtc_compute_clock +ffffffff81a620f0 t g4x_crtc_compute_clock +ffffffff81a62250 t i9xx_compute_dpll +ffffffff81a624d0 t pnv_crtc_compute_clock +ffffffff81a628b0 t i9xx_crtc_compute_clock +ffffffff81a629d0 t i9xx_find_best_dpll +ffffffff81a62d10 t i8xx_crtc_compute_clock +ffffffff81a63000 T intel_get_shared_dpll_by_id +ffffffff81a63040 T assert_shared_dpll +ffffffff81a631f0 T intel_dpll_get_hw_state +ffffffff81a63220 T icl_tc_port_to_pll_id +ffffffff81a63250 T intel_enable_shared_dpll +ffffffff81a635b0 T intel_disable_shared_dpll +ffffffff81a63840 T intel_unreference_shared_dpll_crtc +ffffffff81a63940 T intel_shared_dpll_swap_state +ffffffff81a63a20 T icl_set_active_port_dpll +ffffffff81a63a60 T intel_shared_dpll_init +ffffffff81a63c60 T intel_compute_shared_dplls +ffffffff81a63cf0 T intel_reserve_shared_dplls +ffffffff81a63d80 T intel_release_shared_dplls +ffffffff81a63dc0 T intel_update_active_dpll +ffffffff81a63e20 T intel_dpll_get_freq +ffffffff81a63eb0 T intel_dpll_update_ref_clks +ffffffff81a63f00 T intel_dpll_readout_hw_state +ffffffff81a64130 T intel_dpll_sanitize_state +ffffffff81a64210 T intel_dpll_dump_hw_state +ffffffff81a64290 T intel_shared_dpll_state_verify +ffffffff81a64470 t verify_single_dpll_state +ffffffff81a649e0 T intel_shared_dpll_verify_disabled +ffffffff81a64a60 t icl_compute_dplls +ffffffff81a656a0 t icl_get_dplls +ffffffff81a65970 t icl_put_dplls +ffffffff81a65a30 t icl_update_active_dpll +ffffffff81a65ae0 t icl_update_dpll_ref_clks +ffffffff81a65b20 t icl_dump_hw_state +ffffffff81a65be0 t combo_pll_enable +ffffffff81a65df0 t combo_pll_disable +ffffffff81a65ec0 t combo_pll_get_hw_state +ffffffff81a65f40 t icl_ddi_combo_pll_get_freq +ffffffff81a66110 t icl_dpll_write +ffffffff81a66350 t adlp_cmtg_clock_gating_wa +ffffffff81a664b0 t icl_pll_disable +ffffffff81a66650 t icl_pll_get_hw_state +ffffffff81a66930 t tbt_pll_enable +ffffffff81a66ae0 t tbt_pll_disable +ffffffff81a66b00 t tbt_pll_get_hw_state +ffffffff81a66b20 t icl_ddi_tbt_pll_get_freq +ffffffff81a66b90 t mg_pll_enable +ffffffff81a671a0 t mg_pll_disable +ffffffff81a671e0 t dkl_pll_get_hw_state +ffffffff81a673f0 t icl_ddi_mg_pll_get_freq +ffffffff81a674d0 t icl_calc_dpll_state +ffffffff81a67610 t intel_find_shared_dpll +ffffffff81a67930 t intel_reference_shared_dpll +ffffffff81a67b50 t intel_unreference_shared_dpll +ffffffff81a67d50 t mg_pll_get_hw_state +ffffffff81a67fa0 t bxt_compute_dpll +ffffffff81a682a0 t bxt_get_dpll +ffffffff81a68370 t intel_put_dpll +ffffffff81a683d0 t bxt_update_dpll_ref_clks +ffffffff81a68410 t bxt_dump_hw_state +ffffffff81a684c0 t bxt_ddi_pll_enable +ffffffff81a68e90 t bxt_ddi_pll_disable +ffffffff81a690a0 t bxt_ddi_pll_get_hw_state +ffffffff81a694d0 t bxt_ddi_pll_get_freq +ffffffff81a69560 t bxt_ddi_set_dpll_hw_state +ffffffff81a69750 t skl_compute_dpll +ffffffff81a69eb0 t skl_get_dpll +ffffffff81a69f60 t skl_update_dpll_ref_clks +ffffffff81a69fa0 t skl_dump_hw_state +ffffffff81a6a000 t skl_ddi_dpll0_enable +ffffffff81a6a0c0 t skl_ddi_dpll0_disable +ffffffff81a6a0f0 t skl_ddi_dpll0_get_hw_state +ffffffff81a6a1f0 t skl_ddi_pll_get_freq +ffffffff81a6a280 t skl_ddi_wrpll_get_freq +ffffffff81a6a3e0 t skl_ddi_pll_enable +ffffffff81a6a600 t skl_ddi_pll_disable +ffffffff81a6a690 t skl_ddi_pll_get_hw_state +ffffffff81a6a7b0 t hsw_compute_dpll +ffffffff81a6afd0 t hsw_get_dpll +ffffffff81a6b120 t hsw_update_dpll_ref_clks +ffffffff81a6b190 t hsw_dump_hw_state +ffffffff81a6b1c0 t hsw_ddi_wrpll_enable +ffffffff81a6b240 t hsw_ddi_wrpll_disable +ffffffff81a6b320 t hsw_ddi_wrpll_get_hw_state +ffffffff81a6b3c0 t hsw_ddi_wrpll_get_freq +ffffffff81a6b4b0 t hsw_ddi_spll_enable +ffffffff81a6b510 t hsw_ddi_spll_disable +ffffffff81a6b5e0 t hsw_ddi_spll_get_hw_state +ffffffff81a6b670 t hsw_ddi_spll_get_freq +ffffffff81a6b710 t hsw_ddi_lcpll_enable +ffffffff81a6b740 t hsw_ddi_lcpll_disable +ffffffff81a6b770 t hsw_ddi_lcpll_get_hw_state +ffffffff81a6b7a0 t hsw_ddi_lcpll_get_freq +ffffffff81a6b820 t ibx_compute_dpll +ffffffff81a6b850 t ibx_get_dpll +ffffffff81a6b950 t ibx_dump_hw_state +ffffffff81a6b9b0 t ibx_pch_dpll_enable +ffffffff81a6bb50 t ibx_pch_dpll_disable +ffffffff81a6bbd0 t ibx_pch_dpll_get_hw_state +ffffffff81a6c000 T intel_dpt_pin +ffffffff81a6c1e0 T intel_dpt_unpin +ffffffff81a6c250 T intel_dpt_resume +ffffffff81a6c320 T intel_dpt_suspend +ffffffff81a6c3f0 T intel_dpt_create +ffffffff81a6c7e0 t dpt_insert_page +ffffffff81a6c850 t dpt_clear_range +ffffffff81a6c880 t dpt_insert_entries +ffffffff81a6c970 t dpt_cleanup +ffffffff81a6c9c0 t dpt_bind_vma +ffffffff81a6ca50 t dpt_unbind_vma +ffffffff81a6ca80 T intel_dpt_destroy +ffffffff81a6cad0 T intel_dpt_configure +ffffffff81a6cc70 t __ww_mutex_lock +ffffffff81a6d000 T intel_drrs_type_str +ffffffff81a6d040 T intel_drrs_is_active +ffffffff81a6d070 T intel_drrs_activate +ffffffff81a6d260 T intel_drrs_deactivate +ffffffff81a6d420 T intel_drrs_invalidate +ffffffff81a6d440 t intel_drrs_frontbuffer_update +ffffffff81a6d690 T intel_drrs_flush +ffffffff81a6d6b0 T intel_drrs_crtc_init +ffffffff81a6d750 t intel_drrs_downclock_work +ffffffff81a6d870 T intel_drrs_crtc_debugfs_add +ffffffff81a6d8a0 T intel_drrs_connector_debugfs_add +ffffffff81a6d8b0 t __delayed_work_tick +ffffffff81a6e000 T intel_dsb_reg_write +ffffffff81a6e140 T intel_dsb_finish +ffffffff81a6e1c0 T intel_dsb_commit +ffffffff81a6e370 T intel_dsb_wait +ffffffff81a6e560 T intel_dsb_prepare +ffffffff81a6e6e0 T intel_dsb_cleanup +ffffffff81a6f000 T intel_dsi_wait_panel_power_cycle +ffffffff81a6f0f0 T intel_dsi_shutdown +ffffffff81a6f1e0 T intel_dsi_bitrate +ffffffff81a6f270 T intel_dsi_tlpx_ns +ffffffff81a6f2c0 T intel_dsi_get_modes +ffffffff81a6f2d0 T intel_dsi_mode_valid +ffffffff81a6f390 T intel_dsi_host_init +ffffffff81a6f440 T intel_dsi_get_panel_orientation +ffffffff81a70000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a700a0 t dcs_setup_backlight +ffffffff81a70120 t dcs_get_backlight +ffffffff81a70210 t dcs_set_backlight +ffffffff81a70300 t dcs_disable_backlight +ffffffff81a70660 t dcs_enable_backlight +ffffffff81a71000 T intel_dsi_vbt_exec_sequence +ffffffff81a71020 T intel_dsi_log_params +ffffffff81a713a0 T intel_dsi_vbt_init +ffffffff81a71840 T intel_dsi_vbt_gpio_init +ffffffff81a71860 T intel_dsi_vbt_gpio_cleanup +ffffffff81a72000 T intel_dvo_init +ffffffff81a72650 t intel_disable_dvo +ffffffff81a726f0 t intel_enable_dvo +ffffffff81a727c0 t intel_dvo_get_hw_state +ffffffff81a72830 t intel_dvo_get_config +ffffffff81a728d0 t intel_dvo_compute_config +ffffffff81a72960 t intel_dvo_pre_enable +ffffffff81a72a60 t intel_dvo_connector_get_hw_state +ffffffff81a72af0 t intel_dvo_enc_destroy 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intel_user_framebuffer_destroy +ffffffff81a776d0 t intel_user_framebuffer_create_handle +ffffffff81a77700 t intel_user_framebuffer_dirty +ffffffff81a78000 T intel_pin_and_fence_fb_obj +ffffffff81a78330 t i915_gem_object_lock +ffffffff81a78540 T intel_unpin_fb_vma +ffffffff81a785b0 T intel_plane_pin_fb +ffffffff81a788e0 T intel_plane_unpin_fb +ffffffff81a79000 T intel_fbc_cleanup +ffffffff81a791c0 T intel_fbc_pre_update +ffffffff81a79850 T intel_fbc_post_update +ffffffff81a79a00 T intel_fbc_invalidate +ffffffff81a79b80 T intel_fbc_flush +ffffffff81a79e20 T intel_fbc_atomic_check +ffffffff81a7a3e0 T intel_fbc_disable +ffffffff81a7a4a0 t __intel_fbc_disable +ffffffff81a7a5e0 T intel_fbc_update +ffffffff81a7aca0 T intel_fbc_reset_underrun +ffffffff81a7ae00 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a7aec0 T intel_fbc_add_plane +ffffffff81a7aef0 T intel_fbc_init +ffffffff81a7b170 T intel_fbc_sanitize +ffffffff81a7b240 T intel_fbc_crtc_debugfs_add +ffffffff81a7b270 T intel_fbc_debugfs_register +ffffffff81a7b2a0 t intel_fbc_is_ok +ffffffff81a7b410 t intel_fbc_update_state +ffffffff81a7b790 t intel_fbc_underrun_work_fn +ffffffff81a7b860 t ivb_fbc_activate +ffffffff81a7bab0 t ilk_fbc_deactivate +ffffffff81a7bb60 t ilk_fbc_is_active +ffffffff81a7bbc0 t ivb_fbc_is_compressing +ffffffff81a7bc30 t snb_fbc_nuke +ffffffff81a7bcb0 t ilk_fbc_program_cfb +ffffffff81a7bd10 t ivb_fbc_set_false_color +ffffffff81a7bd90 t snb_fbc_activate +ffffffff81a7be20 t ilk_fbc_is_compressing +ffffffff81a7be90 t ilk_fbc_activate +ffffffff81a7bfc0 t i965_fbc_nuke +ffffffff81a7c060 t g4x_fbc_activate +ffffffff81a7c170 t g4x_fbc_deactivate +ffffffff81a7c200 t g4x_fbc_is_active +ffffffff81a7c260 t g4x_fbc_is_compressing +ffffffff81a7c2c0 t g4x_fbc_program_cfb +ffffffff81a7c310 t i8xx_fbc_activate +ffffffff81a7c480 t i8xx_fbc_deactivate +ffffffff81a7c550 t i8xx_fbc_is_active +ffffffff81a7c5b0 t i8xx_fbc_is_compressing +ffffffff81a7c610 t i8xx_fbc_program_cfb +ffffffff81a7c690 t i8xx_fbc_nuke +ffffffff81a7d000 T intel_fbdev_init +ffffffff81a7d4f0 t intel_fbdev_suspend_worker +ffffffff81a7d520 T intel_fbdev_initial_config_async +ffffffff81a7d590 T intel_fbdev_unregister +ffffffff81a7d5d0 T intel_fbdev_set_suspend +ffffffff81a7d600 T intel_fbdev_fini +ffffffff81a7d6a0 T intel_fbdev_output_poll_changed +ffffffff81a7d740 T intel_fbdev_restore_mode +ffffffff81a7d7c0 T intel_fbdev_framebuffer +ffffffff81a7d800 t intelfb_create +ffffffff81a7de00 t intelfb_dirty +ffffffff81a7de70 t intel_fbdev_set_par +ffffffff81a7e000 T assert_fdi_tx_enabled +ffffffff81a7e020 t assert_fdi_tx +ffffffff81a7e160 T assert_fdi_tx_disabled +ffffffff81a7e180 T assert_fdi_rx_enabled +ffffffff81a7e270 T assert_fdi_rx_disabled +ffffffff81a7e360 T assert_fdi_tx_pll_enabled +ffffffff81a7e440 T assert_fdi_rx_pll_enabled +ffffffff81a7e530 T assert_fdi_rx_pll_disabled +ffffffff81a7e620 T intel_fdi_link_train +ffffffff81a7e640 T intel_fdi_pll_freq_update +ffffffff81a7e6f0 T intel_fdi_link_freq +ffffffff81a7e740 T ilk_fdi_compute_config +ffffffff81a7ea80 T intel_fdi_normal_train +ffffffff81a7ec10 T hsw_fdi_link_train +ffffffff81a7f0f0 T hsw_fdi_disable +ffffffff81a7f250 T ilk_fdi_pll_enable +ffffffff81a7f440 T ilk_fdi_pll_disable +ffffffff81a7f570 T ilk_fdi_disable +ffffffff81a7f7c0 T intel_fdi_init_hook +ffffffff81a7f820 t ilk_fdi_link_train +ffffffff81a7fe80 t gen6_fdi_link_train +ffffffff81a806c0 t ivb_manual_fdi_link_train +ffffffff81a80f40 t cpt_set_fdi_bc_bifurcation +ffffffff81a82000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81a823c0 T intel_set_pch_fifo_underrun_reporting +ffffffff81a825f0 T intel_cpu_fifo_underrun_irq_handler +ffffffff81a827e0 T intel_pch_fifo_underrun_irq_handler +ffffffff81a82860 T intel_check_cpu_fifo_underruns +ffffffff81a82a70 T intel_check_pch_fifo_underruns +ffffffff81a82ba0 T intel_init_fifo_underrun_reporting +ffffffff81a83000 T intel_frontbuffer_flip_prepare +ffffffff81a83050 T intel_frontbuffer_flip_complete +ffffffff81a83130 T intel_frontbuffer_flip +ffffffff81a83200 T __intel_fb_invalidate +ffffffff81a83290 T __intel_fb_flush +ffffffff81a83380 T intel_frontbuffer_get +ffffffff81a834c0 t frontbuffer_active +ffffffff81a834f0 t frontbuffer_retire +ffffffff81a83530 T intel_frontbuffer_put +ffffffff81a83660 T intel_frontbuffer_track +ffffffff81a84000 T intel_atomic_global_obj_init +ffffffff81a84070 T intel_atomic_global_obj_cleanup +ffffffff81a84160 T intel_atomic_get_global_obj_state +ffffffff81a843b0 T intel_atomic_get_old_global_obj_state +ffffffff81a84410 T intel_atomic_get_new_global_obj_state +ffffffff81a84470 T intel_atomic_swap_global_state +ffffffff81a845b0 T intel_atomic_clear_global_state +ffffffff81a846d0 T intel_atomic_lock_global_state +ffffffff81a84760 T intel_atomic_serialize_global_state +ffffffff81a847f0 T intel_atomic_global_state_is_serialized +ffffffff81a85000 T intel_gmbus_is_valid_pin +ffffffff81a85100 T intel_gmbus_reset +ffffffff81a85160 T intel_bb_set_bits +ffffffff81a852a0 T intel_bb_set_dir +ffffffff81a852d0 T intel_bb_read_bits +ffffffff81a85460 T intel_acquire_bus +ffffffff81a85660 T intel_release_bus +ffffffff81a85800 T intel_send_start +ffffffff81a85820 T intel_send_stop +ffffffff81a85840 T intel_initiate_xfer +ffffffff81a85860 T intel_read_byte +ffffffff81a85880 T intel_write_byte +ffffffff81a858a0 T intel_gmbus_output_aksv +ffffffff81a85970 t do_gmbus_xfer +ffffffff81a85f70 T intel_gmbus_setup +ffffffff81a862f0 T intel_gmbus_teardown +ffffffff81a86370 T intel_gmbus_get_adapter +ffffffff81a863f0 T intel_gmbus_force_bit +ffffffff81a86490 T intel_gmbus_is_forced_bit +ffffffff81a864c0 T intel_gmbus_irq_handler +ffffffff81a86560 t gmbus_xfer_read +ffffffff81a86850 t gmbus_xfer_write +ffffffff81a86a90 t gmbus_wait +ffffffff81a86e70 t gmbus_wait_idle +ffffffff81a87000 t gmbus_xfer +ffffffff81a870e0 t gmbus_func +ffffffff81a87120 t gmbus_lock_bus +ffffffff81a87140 t gmbus_trylock_bus +ffffffff81a871a0 t gmbus_unlock_bus +ffffffff81a88000 T intel_hdcp_capable +ffffffff81a880a0 t intel_hdcp_read_valid_bksv +ffffffff81a88330 T intel_hdcp2_capable +ffffffff81a88450 T is_hdcp_supported +ffffffff81a884a0 T intel_hdcp_component_init +ffffffff81a88500 T intel_hdcp_init +ffffffff81a88680 t intel_hdcp_check_work +ffffffff81a8afc0 t intel_hdcp_prop_work +ffffffff81a8b040 T intel_hdcp_enable +ffffffff81a8b090 T intel_hdcp_disable +ffffffff81a8b1c0 t intel_hdcp_update_value +ffffffff81a8b380 t _intel_hdcp2_disable +ffffffff81a8b770 t _intel_hdcp_disable +ffffffff81a8ba60 T intel_hdcp_update_pipe +ffffffff81a8bbd0 T intel_hdcp_component_fini +ffffffff81a8bc70 T intel_hdcp_cleanup +ffffffff81a8bdb0 T intel_hdcp_atomic_check +ffffffff81a8be40 T intel_hdcp_handle_cp_irq +ffffffff81a8bf40 t __delayed_work_tick +ffffffff81a8bf60 t hdcp2_authenticate_repeater_topology +ffffffff81a8c220 t transcoder_name +ffffffff81a8c260 t intel_hdcp_get_repeater_ctl +ffffffff81a8c330 t ktime_get_raw +ffffffff81a8c3b0 t wait_remaining_ms_from_jiffies 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+ffffffff81a8f760 T intel_hdmi_infoframes_enabled +ffffffff81a8f880 T intel_read_infoframe +ffffffff81a8fa20 T intel_hdmi_read_gcp_infoframe +ffffffff81a8fb00 T intel_dp_dual_mode_set_tmds_output +ffffffff81a8fbc0 T intel_hdmi_tmds_clock +ffffffff81a8fc10 T intel_hdmi_bpc_possible +ffffffff81a8fd30 T intel_hdmi_limited_color_range +ffffffff81a8fda0 T intel_hdmi_compute_has_hdmi_sink +ffffffff81a8fe10 T intel_hdmi_compute_config +ffffffff81a903c0 t intel_hdmi_compute_output_format +ffffffff81a90520 t intel_hdmi_compute_hdmi_infoframe +ffffffff81a905e0 t intel_hdmi_compute_drm_infoframe +ffffffff81a906d0 T intel_hdmi_encoder_shutdown +ffffffff81a907a0 T intel_hdmi_handle_sink_scrambling +ffffffff81a90890 T intel_infoframe_init +ffffffff81a90a30 t vlv_write_infoframe +ffffffff81a90d60 t vlv_read_infoframe +ffffffff81a90ee0 t vlv_set_infoframes +ffffffff81a91220 t vlv_infoframes_enabled +ffffffff81a912b0 t g4x_write_infoframe +ffffffff81a91550 t g4x_read_infoframe +ffffffff81a91680 t g4x_set_infoframes +ffffffff81a91910 t g4x_infoframes_enabled +ffffffff81a91990 t hsw_set_infoframes +ffffffff81a91c20 t hsw_infoframes_enabled +ffffffff81a91cb0 t ibx_write_infoframe +ffffffff81a91fc0 t ibx_read_infoframe +ffffffff81a92130 t ibx_set_infoframes +ffffffff81a92460 t ibx_infoframes_enabled +ffffffff81a924f0 t cpt_write_infoframe +ffffffff81a927f0 t cpt_read_infoframe +ffffffff81a92960 t cpt_set_infoframes +ffffffff81a92c40 t cpt_infoframes_enabled +ffffffff81a92cb0 T intel_hdmi_init_connector +ffffffff81a93430 T intel_hdmi_dsc_get_slice_height +ffffffff81a93490 T intel_hdmi_dsc_get_num_slices +ffffffff81a93610 T intel_hdmi_dsc_get_bpp +ffffffff81a936f0 t intel_hdmi_compute_clock +ffffffff81a93950 t hdmi_port_clock_valid +ffffffff81a93b70 t intel_write_infoframe +ffffffff81a93d40 t intel_hdmi_detect +ffffffff81a93ee0 t intel_hdmi_force +ffffffff81a93f80 t intel_hdmi_connector_register +ffffffff81a93f90 t intel_hdmi_connector_unregister +ffffffff81a93fa0 t intel_hdmi_set_edid +ffffffff81a94230 t intel_hdmi_get_modes +ffffffff81a94240 t intel_hdmi_mode_valid +ffffffff81a943f0 t intel_hdmi_connector_atomic_check +ffffffff81a94420 t intel_hdmi_mode_clock_valid +ffffffff81a945c0 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a94700 t intel_hdmi_hdcp_read_bksv +ffffffff81a947d0 t intel_hdmi_hdcp_read_bstatus +ffffffff81a948a0 t intel_hdmi_hdcp_repeater_present +ffffffff81a94980 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a94a50 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a94b30 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a94c00 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a94cf0 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a94f60 t intel_hdmi_hdcp_check_link +ffffffff81a95280 t intel_hdmi_hdcp2_capable +ffffffff81a95340 t intel_hdmi_hdcp2_write_msg +ffffffff81a95430 t intel_hdmi_hdcp2_read_msg +ffffffff81a95830 t intel_hdmi_hdcp2_check_link +ffffffff81a96000 T intel_hpd_pin_default +ffffffff81a96030 T intel_encoder_hotplug +ffffffff81a96160 T intel_hpd_trigger_irq +ffffffff81a961d0 T intel_hpd_irq_handler +ffffffff81a965f0 T intel_hpd_init +ffffffff81a96700 T intel_hpd_poll_enable +ffffffff81a96780 T intel_hpd_poll_disable +ffffffff81a967e0 T intel_hpd_init_early +ffffffff81a968f0 t i915_hotplug_work_func +ffffffff81a96cd0 t i915_digport_work_func +ffffffff81a96e50 t i915_hpd_poll_init_work +ffffffff81a96f50 t intel_hpd_irq_storm_reenable_work +ffffffff81a97270 T intel_hpd_cancel_work +ffffffff81a97390 T intel_hpd_disable +ffffffff81a97420 T intel_hpd_enable +ffffffff81a97490 T intel_hpd_debugfs_register +ffffffff81a974c0 t __delayed_work_tick +ffffffff81a98000 T i915_hotplug_interrupt_update_locked +ffffffff81a980c0 T i915_hotplug_interrupt_update +ffffffff81a98190 T i9xx_hpd_irq_ack +ffffffff81a982d0 T i9xx_hpd_irq_handler +ffffffff81a98480 T ibx_hpd_irq_handler +ffffffff81a98620 T xelpdp_pica_irq_handler +ffffffff81a988e0 T icp_irq_handler +ffffffff81a98b70 T spt_irq_handler +ffffffff81a98e10 T ilk_hpd_irq_handler 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intel_hti_dpll_mask +ffffffff81a9c000 T intel_load_detect_get_pipe +ffffffff81a9c370 t intel_modeset_disable_planes +ffffffff81a9c430 T intel_load_detect_release_pipe +ffffffff81a9d000 T intel_lpe_audio_irq_handler +ffffffff81a9d020 T intel_lpe_audio_init +ffffffff81a9d050 T intel_lpe_audio_teardown +ffffffff81a9d070 T intel_lpe_audio_notify +ffffffff81a9e000 T lspcon_detect_hdr_capability +ffffffff81a9e0b0 T lspcon_write_infoframe +ffffffff81a9e7f0 T lspcon_read_infoframe +ffffffff81a9e830 T lspcon_set_infoframes +ffffffff81a9ea90 T lspcon_infoframes_enabled +ffffffff81a9ec60 T lspcon_wait_pcon_mode +ffffffff81a9ec80 t lspcon_wait_mode +ffffffff81a9ef40 T lspcon_init +ffffffff81a9f340 T intel_lspcon_infoframes_enabled +ffffffff81a9f370 T lspcon_resume +ffffffff81a9f610 t lspcon_change_mode +ffffffff81aa0000 T intel_lvds_port_enabled +ffffffff81aa0080 T intel_get_lvds_encoder +ffffffff81aa00e0 T intel_is_dual_link_lvds +ffffffff81aa0140 T intel_lvds_init +ffffffff81aa07e0 t intel_enable_lvds +ffffffff81aa0920 t intel_pre_enable_lvds +ffffffff81aa0c00 t intel_lvds_compute_config +ffffffff81aa0d60 t pch_disable_lvds +ffffffff81aa0d80 t pch_post_disable_lvds +ffffffff81aa0da0 t gmch_disable_lvds +ffffffff81aa0dd0 t intel_lvds_get_hw_state +ffffffff81aa0e90 t intel_lvds_get_config +ffffffff81aa0fa0 t intel_lvds_shutdown +ffffffff81aa1040 t compute_is_dual_link_lvds +ffffffff81aa1110 t intel_no_lvds_dmi_callback +ffffffff81aa1160 t intel_disable_lvds +ffffffff81aa1280 t intel_lvds_get_modes +ffffffff81aa12d0 t intel_lvds_mode_valid +ffffffff81aa1370 t intel_dual_link_lvds_callback +ffffffff81aa2000 T _intel_modeset_lock_begin +ffffffff81aa2060 T _intel_modeset_lock_loop +ffffffff81aa20a0 T _intel_modeset_lock_end +ffffffff81aa3000 T intel_modeset_setup_hw_state +ffffffff81aa42d0 t intel_crtc_disable_noatomic +ffffffff81aa48b0 t intel_crtc_disable_noatomic_begin +ffffffff81aa5000 T intel_modeset_verify_crtc +ffffffff81aa5540 t verify_connector_state +ffffffff81aa59d0 T intel_modeset_verify_disabled +ffffffff81aa6000 T intel_opregion_notify_encoder +ffffffff81aa6180 t swsci +ffffffff81aa64b0 T intel_opregion_notify_adapter +ffffffff81aa6510 T intel_opregion_asle_intr +ffffffff81aa6560 T intel_opregion_setup +ffffffff81aa6d70 t asle_work +ffffffff81aa71e0 T intel_opregion_get_panel_type +ffffffff81aa72d0 T intel_opregion_get_edid +ffffffff81aa7390 T intel_opregion_headless_sku +ffffffff81aa73e0 T intel_opregion_register +ffffffff81aa7480 T intel_opregion_resume +ffffffff81aa7520 T intel_opregion_suspend +ffffffff81aa75d0 T intel_opregion_unregister +ffffffff81aa76a0 T intel_opregion_cleanup +ffffffff81aa7790 t intel_no_opregion_vbt_callback +ffffffff81aa77f0 t intel_use_opregion_panel_type_callback +ffffffff81aa8000 T intel_overlay_reset +ffffffff81aa8050 T intel_overlay_switch_off +ffffffff81aa8250 t intel_overlay_release_old_vid +ffffffff81aa83f0 T intel_overlay_put_image_ioctl +ffffffff81aa8700 t update_pfit_vscale_ratio +ffffffff81aa87d0 t check_overlay_dst +ffffffff81aa88a0 t check_overlay_src +ffffffff81aa8af0 t intel_overlay_do_put_image +ffffffff81aa9660 T intel_overlay_attrs_ioctl +ffffffff81aa9980 t check_gamma +ffffffff81aa9b70 T intel_overlay_setup +ffffffff81aa9de0 t intel_overlay_last_flip_retire +ffffffff81aa9e20 T intel_overlay_cleanup +ffffffff81aa9ee0 T intel_overlay_capture_error_state +ffffffff81aa9fd0 T intel_overlay_print_error_state +ffffffff81aaa3a0 t intel_overlay_release_old_vid_tail +ffffffff81aaa470 t intel_overlay_off_tail +ffffffff81aaa620 t intel_overlay_flip_prepare +ffffffff81aab000 T intel_panel_use_ssc +ffffffff81aab060 T intel_panel_preferred_fixed_mode +ffffffff81aab0b0 T intel_panel_fixed_mode +ffffffff81aab210 T intel_panel_downclock_mode +ffffffff81aab300 T intel_panel_highest_mode +ffffffff81aab360 T intel_panel_get_modes +ffffffff81aab3f0 T intel_panel_drrs_type +ffffffff81aab420 T intel_panel_compute_config +ffffffff81aab590 T intel_panel_add_edid_fixed_modes +ffffffff81aabac0 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81aabb20 t intel_panel_add_fixed_mode +ffffffff81aabca0 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81aabd10 T intel_panel_add_encoder_fixed_mode +ffffffff81aabd50 T intel_panel_fitting +ffffffff81aac3b0 T intel_panel_detect +ffffffff81aac440 T intel_panel_mode_valid +ffffffff81aac4d0 T intel_panel_init_alloc +ffffffff81aac520 T intel_panel_init +ffffffff81aac640 T intel_panel_fini +ffffffff81aad000 T intel_has_pch_trancoder +ffffffff81aad060 T intel_crtc_pch_transcoder +ffffffff81aad0a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81aad0f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81aad140 T ilk_pch_pre_enable +ffffffff81aad170 T ilk_pch_enable +ffffffff81aad750 t ilk_pch_transcoder_set_timings +ffffffff81aad9b0 T ilk_pch_disable +ffffffff81aad9d0 T ilk_pch_post_disable +ffffffff81aadda0 T ilk_pch_get_config +ffffffff81aadf60 T lpt_pch_enable +ffffffff81aae1d0 T lpt_pch_disable +ffffffff81aae2e0 T lpt_pch_get_config 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intel_pmdemand_program_params +ffffffff81ab3370 T intel_pmdemand_post_plane_update +ffffffff81ab3450 t intel_pmdemand_duplicate_state +ffffffff81ab34e0 t intel_pmdemand_destroy_state +ffffffff81ab4000 T intel_pps_lock +ffffffff81ab4060 T intel_pps_unlock +ffffffff81ab40c0 T intel_pps_reset_all +ffffffff81ab4210 T intel_pps_check_power_unlocked +ffffffff81ab44f0 t pps_name +ffffffff81ab4590 T intel_pps_wait_power_cycle +ffffffff81ab4630 t wait_panel_power_cycle +ffffffff81ab4810 T intel_pps_vdd_on_unlocked +ffffffff81ab4d80 T intel_pps_vdd_on +ffffffff81ab4f10 T intel_pps_vdd_off_sync +ffffffff81ab4fe0 t intel_pps_vdd_off_sync_unlocked +ffffffff81ab5400 T intel_pps_vdd_off_unlocked +ffffffff81ab55b0 T intel_pps_on_unlocked +ffffffff81ab5a40 T intel_pps_on +ffffffff81ab5ae0 T intel_pps_off_unlocked +ffffffff81ab5ec0 T intel_pps_off +ffffffff81ab5f60 T intel_pps_backlight_on +ffffffff81ab6150 T intel_pps_backlight_off +ffffffff81ab6340 T intel_pps_backlight_power +ffffffff81ab6530 T vlv_pps_init +ffffffff81ab6710 t vlv_detach_power_sequencer +ffffffff81ab68e0 t vlv_steal_power_sequencer +ffffffff81ab6a10 t pps_init_delays +ffffffff81ab6eb0 t pps_init_registers +ffffffff81ab7240 T intel_pps_have_panel_power_or_vdd +ffffffff81ab7390 T intel_pps_encoder_reset +ffffffff81ab7530 t vlv_initial_power_sequencer_setup +ffffffff81ab7840 t pps_vdd_init +ffffffff81ab79f0 T intel_pps_init +ffffffff81ab7e60 t edp_panel_vdd_work +ffffffff81ab7f10 T intel_pps_init_late +ffffffff81ab8150 T intel_pps_unlock_regs_wa +ffffffff81ab8260 T intel_pps_setup +ffffffff81ab82d0 T assert_pps_unlocked +ffffffff81ab8560 t intel_pps_get_registers +ffffffff81ab8d70 t wait_panel_status +ffffffff81ab9180 t intel_pps_readout_hw_state +ffffffff81ab9330 t __delayed_work_tick +ffffffff81aba000 T intel_psr_irq_handler +ffffffff81aba640 t transcoder_name +ffffffff81aba680 T intel_psr_init_dpcd +ffffffff81aba920 T intel_psr_compute_config +ffffffff81abab00 t intel_psr2_config_valid +ffffffff81abaf70 T intel_psr_get_config +ffffffff81abb110 T intel_psr_disable +ffffffff81abb220 t intel_psr_disable_locked +ffffffff81abb5a0 T intel_psr_pause +ffffffff81abb790 t intel_psr_exit +ffffffff81abba40 T intel_psr_resume +ffffffff81abbad0 t intel_psr_activate +ffffffff81abc200 T intel_psr2_disable_plane_sel_fetch_arm +ffffffff81abc270 T intel_psr2_program_plane_sel_fetch_arm +ffffffff81abc310 T intel_psr2_program_plane_sel_fetch_noarm +ffffffff81abc480 T intel_psr2_program_trans_man_trk_ctl +ffffffff81abc570 T intel_psr2_sel_fetch_update +ffffffff81abccf0 T intel_psr_pre_plane_update +ffffffff81abcec0 t wm_optimization_wa +ffffffff81abd050 T intel_psr_post_plane_update +ffffffff81abdc80 T intel_psr_wait_for_idle_locked +ffffffff81abde50 T intel_psr_debug_set +ffffffff81abe170 T intel_psr_invalidate +ffffffff81abe3b0 T intel_psr_flush +ffffffff81abe7e0 T intel_psr_init +ffffffff81abe910 t intel_psr_work +ffffffff81abeab0 t tgl_dc3co_disable_work +ffffffff81abeb00 T intel_psr_short_pulse +ffffffff81abeec0 T intel_psr_enabled +ffffffff81abef40 T intel_psr_lock +ffffffff81abf000 T intel_psr_unlock +ffffffff81abf0c0 T intel_psr_debugfs_register +ffffffff81abf0f0 T intel_psr_connector_debugfs_add +ffffffff81abf120 t _compute_psr2_sdp_prior_scanline_indication +ffffffff81abf1e0 t _compute_psr2_wake_times +ffffffff81abf2d0 t intel_psr2_sel_fetch_config_valid +ffffffff81abf360 t psr2_granularity_check +ffffffff81abf450 t tgl_psr2_disable_dc3co +ffffffff81abf560 t __delayed_work_tick +ffffffff81ac0000 T intel_lookup_range_min_qp +ffffffff81ac0110 T intel_lookup_range_max_qp +ffffffff81ac1000 T intel_init_quirks +ffffffff81ac10f0 T intel_has_quirk +ffffffff81ac1130 t quirk_ssc_force_disable +ffffffff81ac1160 t quirk_invert_brightness +ffffffff81ac1190 t quirk_backlight_present +ffffffff81ac11c0 t quirk_increase_t12_delay +ffffffff81ac11f0 t quirk_increase_ddi_disabled_time +ffffffff81ac1220 t intel_dmi_reverse_brightness +ffffffff81ac1270 t intel_dmi_no_pps_backlight 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intel_sdvo_read_response +ffffffff81ac57f0 t intel_sdvo_get_value +ffffffff81ac5860 t intel_sdvo_write_sdvox +ffffffff81ac5a50 t intel_sdvo_write_infoframe +ffffffff81ac5c10 t intel_sdvo_read_infoframe +ffffffff81ac5e30 t intel_sdvo_hotplug +ffffffff81ac5e70 t intel_sdvo_connector_get_hw_state +ffffffff81ac5f00 t intel_sdvo_detect +ffffffff81ac61f0 t intel_sdvo_connector_register +ffffffff81ac6200 t intel_sdvo_connector_unregister +ffffffff81ac6210 t intel_sdvo_connector_duplicate_state +ffffffff81ac6290 t intel_sdvo_connector_atomic_set_property +ffffffff81ac6460 t intel_sdvo_connector_atomic_get_property +ffffffff81ac6680 t intel_sdvo_get_analog_edid +ffffffff81ac66b0 t intel_sdvo_connector_matches_edid +ffffffff81ac6740 t intel_sdvo_get_modes +ffffffff81ac69e0 t intel_sdvo_mode_valid +ffffffff81ac6af0 t intel_sdvo_atomic_check +ffffffff81ac6ba0 t intel_sdvo_create_enhance_property +ffffffff81ac8000 T intel_snps_phy_wait_for_calibration +ffffffff81ac80d0 T intel_snps_phy_update_psr_power_state +ffffffff81ac8190 T intel_snps_phy_set_signal_levels +ffffffff81ac83e0 T intel_mpllb_calc_state +ffffffff81ac8570 T intel_snps_phy_check_hdmi_link_rate +ffffffff81ac8610 T intel_mpllb_enable +ffffffff81ac8850 T intel_mpllb_disable +ffffffff81ac89c0 T intel_mpllb_calc_port_clock +ffffffff81ac8a90 T intel_mpllb_readout_hw_state +ffffffff81ac8c00 T intel_mpllb_state_verify +ffffffff81aca000 T vlv_plane_min_cdclk +ffffffff81aca0f0 T ivb_plane_min_cdclk +ffffffff81aca1b0 T hsw_plane_min_cdclk +ffffffff81aca250 T chv_plane_check_rotation +ffffffff81aca2c0 T intel_sprite_plane_create +ffffffff81aca610 t vlv_sprite_update_noarm +ffffffff81aca710 t vlv_sprite_update_arm +ffffffff81acadb0 t vlv_sprite_disable_arm +ffffffff81acae40 t vlv_sprite_get_hw_state +ffffffff81acaf10 t vlv_sprite_check +ffffffff81acafe0 t ivb_sprite_update_noarm +ffffffff81acb150 t ivb_sprite_update_arm +ffffffff81acb520 t ivb_sprite_disable_arm +ffffffff81acb5d0 t ivb_sprite_get_hw_state +ffffffff81acb690 t g4x_sprite_check +ffffffff81acb930 t hsw_sprite_max_stride +ffffffff81acb980 t g4x_sprite_max_stride +ffffffff81acb9f0 t ivb_sprite_min_cdclk +ffffffff81acbb30 t g4x_sprite_update_noarm +ffffffff81acbc90 t g4x_sprite_update_arm +ffffffff81acc0d0 t g4x_sprite_disable_arm +ffffffff81acc180 t g4x_sprite_get_hw_state +ffffffff81acc240 t g4x_sprite_min_cdclk +ffffffff81acc310 t vlv_sprite_ctl +ffffffff81acc500 t vlv_sprite_format_mod_supported +ffffffff81acc630 t ivb_sprite_ctl +ffffffff81acc860 t g4x_sprite_ctl +ffffffff81acca20 t snb_sprite_format_mod_supported +ffffffff81accb10 t g4x_sprite_format_mod_supported +ffffffff81acd000 T intel_sprite_set_colorkey_ioctl +ffffffff81ace000 T intel_tc_port_in_tbt_alt_mode +ffffffff81ace070 T intel_tc_port_in_dp_alt_mode +ffffffff81ace0e0 T intel_tc_port_in_legacy_mode +ffffffff81ace150 T intel_tc_cold_requires_aux_pw +ffffffff81ace1c0 T intel_tc_port_get_lane_mask +ffffffff81ace2f0 T intel_tc_port_get_pin_assignment_mask +ffffffff81ace420 T intel_tc_port_fia_max_lane_count +ffffffff81ace600 T intel_tc_port_set_fia_lane_count +ffffffff81ace7d0 T intel_tc_port_init_mode +ffffffff81acea00 t intel_tc_port_update_mode +ffffffff81acedb0 T intel_tc_port_sanitize_mode +ffffffff81acf0e0 T intel_tc_port_connected_locked +ffffffff81acf240 T intel_tc_port_ref_held +ffffffff81acf2a0 T intel_tc_port_connected +ffffffff81acf310 T intel_tc_port_link_needs_reset +ffffffff81acf3c0 T intel_tc_port_link_reset +ffffffff81acf4c0 T intel_tc_port_link_cancel_reset_work +ffffffff81acf570 T intel_tc_port_lock +ffffffff81acf590 t __intel_tc_port_lock +ffffffff81acf6d0 T intel_tc_port_suspend +ffffffff81acf730 T intel_tc_port_unlock +ffffffff81acf7b0 T intel_tc_port_get_link +ffffffff81acf840 T intel_tc_port_put_link +ffffffff81acf8f0 T intel_tc_port_init +ffffffff81acfb30 t kasprintf +ffffffff81acfc00 t intel_tc_port_disconnect_phy_work +ffffffff81acfc50 t intel_tc_port_link_reset_work +ffffffff81acff50 T intel_tc_port_cleanup +ffffffff81ad0010 t intel_tc_port_needs_reset +ffffffff81ad0110 t tgl_tc_phy_cold_off_domain +ffffffff81ad0140 t xelpdp_tc_phy_hpd_live_status +ffffffff81ad0250 t adlp_tc_phy_is_ready +ffffffff81ad0350 t xelpdp_tc_phy_is_owned +ffffffff81ad0420 t xelpdp_tc_phy_get_hw_state +ffffffff81ad05a0 t xelpdp_tc_phy_connect +ffffffff81ad07f0 t xelpdp_tc_phy_disconnect +ffffffff81ad0930 t adlp_tc_phy_init +ffffffff81ad09a0 t tc_phy_get_current_mode +ffffffff81ad0cc0 t tc_phy_wait_for_ready +ffffffff81ad0e30 t xelpdp_tc_phy_enable_tcss_power +ffffffff81ad1080 t tc_phy_verify_legacy_or_dp_alt_mode +ffffffff81ad1260 t xelpdp_tc_phy_wait_for_tcss_power +ffffffff81ad1470 t adlp_tc_phy_cold_off_domain +ffffffff81ad14d0 t adlp_tc_phy_hpd_live_status +ffffffff81ad15d0 t adlp_tc_phy_is_owned +ffffffff81ad1690 t adlp_tc_phy_get_hw_state +ffffffff81ad1720 t adlp_tc_phy_connect +ffffffff81ad1a10 t adlp_tc_phy_disconnect +ffffffff81ad1b70 t icl_tc_phy_hpd_live_status +ffffffff81ad1cd0 t icl_tc_phy_is_ready +ffffffff81ad1de0 t icl_tc_phy_is_owned +ffffffff81ad1ef0 t icl_tc_phy_get_hw_state +ffffffff81ad1f80 t icl_tc_phy_connect +ffffffff81ad20f0 t icl_tc_phy_disconnect +ffffffff81ad2170 t tgl_tc_phy_init +ffffffff81ad22a0 t icl_tc_phy_take_ownership +ffffffff81ad2410 t icl_tc_phy_cold_off_domain +ffffffff81ad2470 t icl_tc_phy_init +ffffffff81ad24d0 t __delayed_work_tick +ffffffff81ad3000 T intel_tv_init +ffffffff81ad33f0 t intel_tv_compute_config +ffffffff81ad38a0 t intel_tv_get_config +ffffffff81ad3d60 t intel_tv_pre_enable +ffffffff81ad4680 t intel_enable_tv +ffffffff81ad46e0 t intel_disable_tv +ffffffff81ad4740 t intel_tv_get_hw_state +ffffffff81ad47a0 t intel_tv_connector_duplicate_state +ffffffff81ad4820 t intel_tv_mode_to_mode +ffffffff81ad4970 t intel_tv_get_modes +ffffffff81ad4cb0 t intel_tv_detect +ffffffff81ad5140 t intel_tv_mode_valid +ffffffff81ad51f0 t intel_tv_atomic_check +ffffffff81ad6000 T i915_get_vblank_counter +ffffffff81ad61e0 T g4x_get_vblank_counter +ffffffff81ad6270 T intel_crtc_get_vblank_timestamp +ffffffff81ad6290 t i915_get_crtc_scanoutpos +ffffffff81ad6690 T intel_get_crtc_scanline +ffffffff81ad6700 t __intel_get_crtc_scanline +ffffffff81ad6950 T intel_wait_for_pipe_scanline_stopped +ffffffff81ad6960 t wait_for_pipe_scanline_moving +ffffffff81ad6bc0 T intel_wait_for_pipe_scanline_moving +ffffffff81ad6be0 T intel_crtc_update_active_timings +ffffffff81ad7000 T intel_dsc_source_support +ffffffff81ad7050 T intel_dsc_compute_params +ffffffff81ad7650 T intel_dsc_power_domain +ffffffff81ad7700 T intel_dsc_get_num_vdsc_instances +ffffffff81ad7750 T intel_dsc_dsi_pps_write +ffffffff81ad79f0 T intel_dsc_dp_pps_write +ffffffff81ad7ae0 T intel_uncompressed_joiner_enable +ffffffff81ad7c00 T intel_dsc_enable +ffffffff81ad9600 T intel_dsc_disable +ffffffff81ad9780 T intel_dsc_get_config +ffffffff81ada000 T intel_vga_disable +ffffffff81ada120 T intel_vga_redisable_power_on +ffffffff81ada1c0 T intel_vga_redisable +ffffffff81ada280 T intel_vga_reset_io_mem +ffffffff81ada2e0 T intel_vga_register +ffffffff81ada310 T intel_vga_unregister +ffffffff81adb000 T intel_vrr_is_capable +ffffffff81adb080 T intel_vrr_check_modeset +ffffffff81adb110 T intel_vrr_vmin_vblank_start +ffffffff81adb170 T intel_vrr_vmax_vblank_start +ffffffff81adb1d0 T intel_vrr_compute_config +ffffffff81adb350 T intel_vrr_set_transcoder_timings +ffffffff81adb530 T intel_vrr_send_push +ffffffff81adb5b0 T intel_vrr_is_push_sent +ffffffff81adb640 T intel_vrr_enable +ffffffff81adb760 T intel_vrr_disable +ffffffff81adb8a0 T intel_vrr_get_config +ffffffff81adc000 T intel_update_watermarks +ffffffff81adc040 T intel_compute_pipe_wm +ffffffff81adc090 T intel_compute_intermediate_wm +ffffffff81adc120 T intel_initial_watermarks +ffffffff81adc170 T intel_atomic_update_watermarks +ffffffff81adc1b0 T intel_optimize_watermarks +ffffffff81adc1f0 T intel_compute_global_watermarks +ffffffff81adc240 T intel_wm_get_hw_state +ffffffff81adc280 T intel_wm_plane_visible +ffffffff81adc2e0 T intel_print_wm_latency +ffffffff81adc3f0 T intel_wm_init +ffffffff81adc410 T intel_wm_debugfs_register +ffffffff81add000 T skl_update_scaler_crtc +ffffffff81add0b0 t skl_update_scaler +ffffffff81add3f0 T skl_update_scaler_plane +ffffffff81add7f0 T intel_atomic_setup_scalers +ffffffff81addd50 T skl_pfit_enable +ffffffff81ade240 T skl_program_plane_scaler +ffffffff81ade930 T skl_detach_scalers +ffffffff81adea90 T skl_scaler_disable +ffffffff81adebc0 T skl_scaler_get_config +ffffffff81adf000 T skl_format_to_fourcc +ffffffff81adf180 T icl_is_nv12_y_plane +ffffffff81adf1f0 T icl_hdr_plane_mask +ffffffff81adf220 T icl_is_hdr_plane +ffffffff81adf260 T skl_calc_main_surface_offset +ffffffff81adf4a0 T skl_universal_plane_create +ffffffff81adfce0 t icl_plane_min_width +ffffffff81adfe70 t icl_hdr_plane_max_width +ffffffff81adfec0 t icl_sdr_plane_max_width +ffffffff81adfef0 t icl_plane_max_height +ffffffff81adff20 t icl_plane_min_cdclk +ffffffff81adff60 t glk_plane_max_width +ffffffff81ae0010 t skl_plane_max_height +ffffffff81ae0040 t glk_plane_min_cdclk +ffffffff81ae00b0 t skl_plane_max_width +ffffffff81ae0180 t skl_plane_min_cdclk +ffffffff81ae01f0 t skl_plane_max_stride +ffffffff81ae0290 t icl_plane_update_noarm +ffffffff81ae0b40 t icl_plane_update_arm +ffffffff81ae0ce0 t icl_plane_disable_arm +ffffffff81ae0df0 t skl_plane_update_noarm +ffffffff81ae0f90 t skl_plane_update_arm +ffffffff81ae12b0 t skl_plane_disable_arm +ffffffff81ae1360 t skl_plane_get_hw_state +ffffffff81ae1430 t skl_plane_check +ffffffff81ae2060 t skl_plane_async_flip +ffffffff81ae2190 t skl_plane_enable_flip_done +ffffffff81ae21f0 t skl_plane_disable_flip_done +ffffffff81ae2250 T skl_get_initial_plane_config +ffffffff81ae2a10 t skl_plane_aux_dist +ffffffff81ae2b00 t skl_surf_address +ffffffff81ae2c20 t skl_plane_check_nv12_rotation +ffffffff81ae2cc0 t pxp_is_borked +ffffffff81ae2d20 t skl_plane_ctl +ffffffff81ae3400 t glk_plane_color_ctl +ffffffff81ae3550 t skl_check_main_ccs_coordinates +ffffffff81ae36e0 t gen12_plane_format_mod_supported +ffffffff81ae3930 t skl_plane_format_mod_supported +ffffffff81ae4000 T intel_enabled_dbuf_slices_mask +ffffffff81ae4120 T intel_sagv_pre_plane_update +ffffffff81ae42b0 T intel_sagv_post_plane_update +ffffffff81ae4520 T intel_can_enable_sagv +ffffffff81ae4590 T skl_ddb_dbuf_slice_mask +ffffffff81ae4640 T skl_write_plane_wm +ffffffff81ae4ac0 T skl_write_cursor_wm +ffffffff81ae4ea0 T skl_ddb_allocation_overlaps +ffffffff81ae4f40 T intel_wm_state_verify +ffffffff81ae5920 t skl_pipe_wm_get_hw_state +ffffffff81ae5c70 T skl_watermark_ipc_enabled +ffffffff81ae5ca0 T skl_watermark_ipc_update +ffffffff81ae5d50 T skl_watermark_ipc_init +ffffffff81ae5e20 T skl_wm_init +ffffffff81ae6650 T intel_atomic_get_dbuf_state +ffffffff81ae6670 T intel_dbuf_init +ffffffff81ae66e0 T intel_dbuf_pre_plane_update +ffffffff81ae69b0 T intel_dbuf_post_plane_update +ffffffff81ae6a80 T intel_mbus_dbox_update +ffffffff81ae6cf0 T skl_watermark_debugfs_register +ffffffff81ae6d20 t skl_sagv_disable +ffffffff81ae6e40 t skl_compute_wm +ffffffff81aea130 t skl_wm_get_hw_state_and_sanitize +ffffffff81aea920 t skl_build_plane_wm_single +ffffffff81aeacb0 t skl_compute_wm_params +ffffffff81aeb080 t skl_compute_plane_wm +ffffffff81aeb4b0 t skl_compute_dbuf_slices +ffffffff81aeb9b0 t skl_ddb_entry_for_slices +ffffffff81aebaf0 t intel_dbuf_duplicate_state +ffffffff81aebb80 t intel_dbuf_destroy_state +ffffffff81aec000 T pixel_format_from_register_bits +ffffffff81aec060 T vlv_dsi_wait_for_fifo_empty +ffffffff81aec120 T vlv_dsi_init +ffffffff81aec930 t intel_dsi_compute_config +ffffffff81aeca80 t intel_dsi_pre_enable +ffffffff81aee530 t bxt_dsi_enable +ffffffff81aee550 t intel_dsi_disable +ffffffff81aee800 t intel_dsi_post_disable +ffffffff81aef480 t intel_dsi_get_hw_state +ffffffff81aef750 t intel_dsi_get_config +ffffffff81aefef0 t intel_dsi_encoder_destroy +ffffffff81aeff20 t intel_dsi_prepare +ffffffff81af0c00 t dpi_send_cmd +ffffffff81af0d80 t intel_dsi_host_attach +ffffffff81af0db0 t intel_dsi_host_detach +ffffffff81af0de0 t intel_dsi_host_transfer +ffffffff81af1240 t vlv_dsi_mode_valid +ffffffff81af2000 T vlv_dsi_pll_compute +ffffffff81af23a0 t vlv_dsi_pclk +ffffffff81af2540 T vlv_dsi_pll_enable +ffffffff81af2770 T vlv_dsi_pll_disable +ffffffff81af27f0 T bxt_dsi_pll_is_enabled +ffffffff81af28c0 T bxt_dsi_pll_disable +ffffffff81af29c0 T vlv_dsi_get_pclk +ffffffff81af2a60 T bxt_dsi_get_pclk +ffffffff81af2b20 T vlv_dsi_reset_clocks +ffffffff81af2bb0 T bxt_dsi_pll_compute +ffffffff81af2d50 T bxt_dsi_pll_enable +ffffffff81af30c0 T bxt_dsi_reset_clocks +ffffffff81af31e0 T assert_dsi_pll_enabled +ffffffff81af3200 t assert_dsi_pll +ffffffff81af3310 T assert_dsi_pll_disabled +ffffffff81af4000 T i915_gem_busy_ioctl +ffffffff81af5000 T i915_gem_clflush_object +ffffffff81af51f0 t clflush_work +ffffffff81af5250 t clflush_release +ffffffff81af6000 T i915_lut_handle_alloc +ffffffff81af6020 T i915_lut_handle_free +ffffffff81af6040 T i915_gem_context_release +ffffffff81af6070 T i915_gem_init__contexts +ffffffff81af60d0 T i915_gem_context_open +ffffffff81af6230 t i915_gem_create_context +ffffffff81af6a00 t proto_context_close +ffffffff81af6ab0 t gem_context_register +ffffffff81af6c50 T i915_gem_context_close +ffffffff81af6da0 t context_close +ffffffff81af7460 T i915_gem_vm_create_ioctl +ffffffff81af7570 t xa_alloc +ffffffff81af75f0 T i915_gem_vm_destroy_ioctl +ffffffff81af76a0 T i915_gem_user_to_context_sseu +ffffffff81af7900 T i915_gem_context_lookup +ffffffff81af7a30 T i915_gem_context_create_ioctl +ffffffff81af7c80 t proto_context_register +ffffffff81af7dd0 T i915_gem_context_destroy_ioctl +ffffffff81af7ef0 T i915_gem_context_getparam_ioctl +ffffffff81af8310 T i915_gem_context_setparam_ioctl +ffffffff81af87c0 t set_proto_ctx_param +ffffffff81af8ee0 T i915_gem_context_reset_stats_ioctl +ffffffff81af8fe0 T i915_gem_engines_iter_next +ffffffff81af9030 T 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intel_guc_load_status +ffffffff81b850a0 T intel_guc_write_barrier +ffffffff81b86000 T intel_guc_ads_print_policy_info +ffffffff81b86020 T intel_guc_global_policies_update +ffffffff81b86070 T intel_guc_ads_create +ffffffff81b86560 T intel_guc_ads_init_late +ffffffff81b865b0 T intel_guc_ads_destroy +ffffffff81b86610 T intel_guc_ads_reset +ffffffff81b86680 T intel_guc_engine_usage_offset +ffffffff81b866c0 T intel_guc_engine_usage_record_map +ffffffff81b87000 T intel_guc_capture_getlistsize +ffffffff81b87020 t guc_capture_getlistsize +ffffffff81b87250 T intel_guc_capture_getlist +ffffffff81b88100 t guc_cap_list_num_regs +ffffffff81b88210 T intel_guc_capture_getnullheader +ffffffff81b882d0 T intel_guc_capture_print_engine_node +ffffffff81b887e0 T intel_guc_capture_free_node +ffffffff81b88860 T intel_guc_capture_is_matching_engine +ffffffff81b88910 T intel_guc_capture_get_matching_node +ffffffff81b88aa0 T intel_guc_capture_process +ffffffff81b89a80 T intel_guc_capture_destroy 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intel_guc_check_log_buf_overflow +ffffffff81b91320 T intel_guc_get_log_buffer_size +ffffffff81b913b0 T intel_guc_get_log_buffer_offset +ffffffff81b914a0 T intel_guc_log_init_early +ffffffff81b91510 t copy_debug_logs_work +ffffffff81b91530 T intel_guc_log_create +ffffffff81b91750 T intel_guc_log_destroy +ffffffff81b91780 T intel_guc_log_set_level +ffffffff81b918c0 T intel_guc_log_relay_created +ffffffff81b918f0 T intel_guc_log_relay_open +ffffffff81b91990 T intel_guc_log_relay_start +ffffffff81b919f0 T intel_guc_log_relay_flush +ffffffff81b91a90 t guc_log_copy_debuglogs_for_relay +ffffffff81b91be0 T intel_guc_log_relay_close +ffffffff81b91c70 T intel_guc_log_handle_flush_event +ffffffff81b91cc0 T intel_guc_log_info +ffffffff81b91db0 T intel_guc_log_dump +ffffffff81b92000 T intel_guc_log_debugfs_register +ffffffff81b93000 T intel_guc_rc_init_early +ffffffff81b93060 T intel_guc_rc_enable +ffffffff81b93180 T intel_guc_rc_disable +ffffffff81b94000 T intel_guc_slpc_init_early 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i915_print_iommu_status +ffffffff81bae050 T i915_driver_probe +ffffffff81bae8d0 t i915_driver_register +ffffffff81bae9c0 T inteldrm_init_backlight +ffffffff81baea30 t i915_welcome_messages +ffffffff81baebb0 T i915_driver_remove +ffffffff81baec90 T i915_driver_shutdown +ffffffff81baee30 T i915_driver_resume_switcheroo +ffffffff81baee90 t i915_drm_resume_early +ffffffff81baef80 t i915_drm_resume +ffffffff81baf1c0 T intagpsubmatch +ffffffff81baf210 T intagp_print +ffffffff81baf260 T inteldrm_wsioctl +ffffffff81baf440 T inteldrm_wsmmap +ffffffff81baf470 T inteldrm_alloc_screen +ffffffff81baf4a0 T inteldrm_free_screen +ffffffff81baf4c0 T inteldrm_show_screen +ffffffff81baf590 T inteldrm_load_font +ffffffff81baf5b0 T inteldrm_list_font +ffffffff81baf5d0 T inteldrm_scrollback +ffffffff81baf5f0 T inteldrm_getchar +ffffffff81baf610 T inteldrm_burner +ffffffff81baf6a0 T inteldrm_enter_ddb +ffffffff81baf700 T inteldrm_doswitch +ffffffff81baf780 T inteldrm_burner_cb +ffffffff81baf7b0 T inteldrm_backlight_update_status +ffffffff81baf810 T inteldrm_backlight_get_brightness +ffffffff81baf860 T inteldrm_match +ffffffff81baf8f0 T inteldrm_attach +ffffffff81bafcf0 T inteldrm_detach +ffffffff81bafd20 T inteldrm_activate +ffffffff81bb0030 T inteldrm_intr +ffffffff81bb0070 T inteldrm_attachhook +ffffffff81bb02d0 T inteldrm_forcedetach +ffffffff81bb0310 T inteldrm_native_backlight +ffffffff81bb0440 T inteldrm_firmware_backlight +ffffffff81bb05c0 t i915_pcode_init +ffffffff81bb0680 t i915_driver_open +ffffffff81bb06a0 t i915_driver_postclose +ffffffff81bb0700 t i915_driver_lastclose +ffffffff81bb0720 t i915_driver_release +ffffffff81bb0830 t i915_gem_reject_pin_ioctl +ffffffff81bb1000 T i915_drm_client_alloc +ffffffff81bb1070 T __i915_drm_client_free +ffffffff81bb2000 T i915_gem_get_aperture_ioctl +ffffffff81bb20d0 T i915_gem_object_unbind +ffffffff81bb2340 T i915_gem_pread_ioctl +ffffffff81bb24d0 t i915_gem_shmem_pread +ffffffff81bb28d0 t i915_gem_gtt_pread +ffffffff81bb2bf0 T i915_gem_pwrite_ioctl +ffffffff81bb2dc0 t i915_gem_gtt_pwrite_fast +ffffffff81bb3170 t i915_gem_shmem_pwrite +ffffffff81bb3600 T i915_gem_sw_finish_ioctl +ffffffff81bb3690 T i915_gem_runtime_suspend +ffffffff81bb3790 T i915_gem_object_ggtt_pin_ww +ffffffff81bb3a30 T i915_gem_object_ggtt_pin +ffffffff81bb3b40 t i915_gem_object_lock +ffffffff81bb3d50 T i915_gem_madvise_ioctl +ffffffff81bb4150 T i915_gem_drain_freed_objects +ffffffff81bb41c0 T i915_gem_drain_workqueue +ffffffff81bb42a0 T i915_gem_init +ffffffff81bb4540 T i915_gem_driver_register +ffffffff81bb4550 T i915_gem_driver_unregister +ffffffff81bb4560 T i915_gem_driver_remove +ffffffff81bb45c0 T i915_gem_driver_release +ffffffff81bb46b0 T i915_gem_init_early +ffffffff81bb4730 T i915_gem_cleanup_early +ffffffff81bb47b0 T i915_gem_open +ffffffff81bb48c0 t i915_gem_gtt_prepare +ffffffff81bb5000 T i915_gem_evict_something +ffffffff81bb5440 t ungrab_vma +ffffffff81bb5570 t grab_vma +ffffffff81bb5690 T i915_gem_evict_for_node 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i915_oa_config_release +ffffffff81bc4060 T i915_perf_get_oa_config +ffffffff81bc40c0 T i915_perf_oa_timestamp_frequency +ffffffff81bc4170 T i915_oa_init_reg_state +ffffffff81bc4260 T i915_perf_open_ioctl +ffffffff81bc4a80 T i915_perf_register +ffffffff81bc4ab0 T i915_perf_unregister +ffffffff81bc4b20 T i915_perf_add_config_ioctl +ffffffff81bc4b70 T i915_perf_remove_config_ioctl +ffffffff81bc4be0 T i915_perf_init +ffffffff81bc52c0 t gen7_is_valid_b_counter_addr +ffffffff81bc5310 t hsw_is_valid_mux_addr +ffffffff81bc5390 t hsw_enable_metric_set +ffffffff81bc5450 t hsw_disable_metric_set +ffffffff81bc5520 t gen7_oa_enable +ffffffff81bc5690 t gen7_oa_disable +ffffffff81bc5750 t gen7_oa_read +ffffffff81bc5bb0 t gen7_oa_hw_tail_read +ffffffff81bc5c00 t gen8_oa_read +ffffffff81bc6230 t gen8_is_valid_mux_addr +ffffffff81bc62b0 t gen8_is_valid_flex_addr +ffffffff81bc6330 t chv_is_valid_mux_addr +ffffffff81bc63b0 t gen8_oa_enable +ffffffff81bc64f0 t gen8_oa_disable +ffffffff81bc65b0 t gen8_enable_metric_set +ffffffff81bc6670 t gen8_disable_metric_set +ffffffff81bc66d0 t gen8_oa_hw_tail_read +ffffffff81bc6720 t gen11_is_valid_mux_addr +ffffffff81bc67e0 t gen11_disable_metric_set +ffffffff81bc6840 t xehp_is_valid_b_counter_addr +ffffffff81bc6910 t gen12_is_valid_b_counter_addr +ffffffff81bc6960 t gen12_is_valid_mux_addr +ffffffff81bc69f0 t gen12_oa_enable +ffffffff81bc6b90 t gen12_oa_disable +ffffffff81bc6ce0 t gen12_enable_metric_set +ffffffff81bc6ed0 t gen12_disable_metric_set +ffffffff81bc7020 t gen12_oa_hw_tail_read +ffffffff81bc7080 T i915_perf_sysctl_register +ffffffff81bc70b0 T i915_perf_sysctl_unregister +ffffffff81bc70e0 T i915_perf_fini +ffffffff81bc7200 t destroy_config +ffffffff81bc7290 T i915_perf_ioctl_version +ffffffff81bc7390 t get_sseu_config +ffffffff81bc73e0 t emit_oa_config +ffffffff81bc7ab0 t i915_gem_object_lock +ffffffff81bc7cc0 t append_oa_status +ffffffff81bc7d40 t append_oa_sample +ffffffff81bc7ea0 t lrc_configure_all_contexts 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i915_teardown_sysfs +ffffffff81bd6000 T i915_ttm_buddy_man_init +ffffffff81bd6210 T i915_ttm_buddy_man_fini +ffffffff81bd6400 T i915_ttm_buddy_man_reserve +ffffffff81bd64d0 T i915_ttm_buddy_man_visible_size +ffffffff81bd6500 T i915_ttm_buddy_man_avail +ffffffff81bd6560 t i915_ttm_buddy_man_alloc +ffffffff81bd6880 t i915_ttm_buddy_man_free +ffffffff81bd68f0 t i915_ttm_buddy_man_intersects +ffffffff81bd69a0 t i915_ttm_buddy_man_compatible +ffffffff81bd6a50 t i915_ttm_buddy_man_debug +ffffffff81bd7000 T i915_user_extensions +ffffffff81bd8000 T __i915_printk +ffffffff81bd80e0 T add_taint_for_CI +ffffffff81bd8110 T cancel_timer +ffffffff81bd8160 T set_timer_ms +ffffffff81bd8210 T i915_vtd_active +ffffffff81bd9000 T intel_vgpu_detect +ffffffff81bd9030 T intel_vgpu_register +ffffffff81bd9090 T intel_vgpu_active +ffffffff81bd90c0 T intel_vgpu_has_full_ppgtt +ffffffff81bd9100 T intel_vgpu_has_hwsp_emulation +ffffffff81bd9140 T intel_vgpu_has_huge_gtt +ffffffff81bd9180 T intel_vgt_deballoon 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i915_vma_parked +ffffffff81bdc680 T i915_vma_revoke_mmap +ffffffff81bdc780 T _i915_vma_move_to_active +ffffffff81bdc9d0 T __i915_vma_evict +ffffffff81bdcd50 T __i915_vma_unbind +ffffffff81bdcdf0 T i915_vma_unbind +ffffffff81bdcf40 T i915_vma_unbind_async +ffffffff81bdd0b0 t __i915_vma_unbind_async +ffffffff81bdd170 T i915_vma_unbind_unlocked +ffffffff81bdd280 T i915_vma_make_unshrinkable +ffffffff81bdd2c0 T i915_vma_make_shrinkable +ffffffff81bdd2e0 T i915_vma_make_purgeable +ffffffff81bdd300 T i915_vma_module_exit +ffffffff81bdd320 T i915_vma_module_init +ffffffff81bdd380 t __i915_vma_active +ffffffff81bdd3d0 t __i915_vma_retire +ffffffff81bdd420 t __vma_bind +ffffffff81bdd4c0 t __vma_release +ffffffff81bdd540 t intel_rotate_pages +ffffffff81bdd8a0 t intel_remap_pages +ffffffff81bddcf0 t intel_partial_pages +ffffffff81bde000 T i915_vma_resource_alloc +ffffffff81bde050 T i915_vma_resource_free +ffffffff81bde090 T i915_vma_resource_unhold +ffffffff81bde0a0 t __i915_vma_resource_unhold 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icl_init_clock_gating +ffffffff81bdf880 t cfl_init_clock_gating +ffffffff81bdf9a0 t gen9_init_clock_gating +ffffffff81bdfab0 t skl_init_clock_gating +ffffffff81bdfbf0 t kbl_init_clock_gating +ffffffff81bdfe00 t bxt_init_clock_gating +ffffffff81bdff60 t glk_init_clock_gating +ffffffff81bdffc0 t bdw_init_clock_gating +ffffffff81be03f0 t chv_init_clock_gating +ffffffff81be0580 t hsw_init_clock_gating +ffffffff81be0840 t ivb_init_clock_gating +ffffffff81be0a50 t g4x_disable_trickle_feed +ffffffff81be0ba0 t cpt_init_clock_gating +ffffffff81be0ee0 t vlv_init_clock_gating +ffffffff81be0ff0 t gen6_init_clock_gating +ffffffff81be11f0 t ilk_init_clock_gating +ffffffff81be13d0 t g4x_init_clock_gating +ffffffff81be1490 t i965gm_init_clock_gating +ffffffff81be1560 t i965g_init_clock_gating +ffffffff81be15e0 t gen3_init_clock_gating +ffffffff81be16e0 t i85x_init_clock_gating +ffffffff81be1780 t i830_init_clock_gating +ffffffff81be2000 T intel_platform_name +ffffffff81be2090 T intel_device_info_print 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intel_region_ttm_device_init +ffffffff81be6070 T intel_region_ttm_device_fini +ffffffff81be6090 T intel_region_to_ttm_type +ffffffff81be60d0 T intel_region_ttm_init +ffffffff81be6170 T intel_region_ttm_fini +ffffffff81be63d0 T intel_region_ttm_resource_to_rsgt +ffffffff81be6410 T intel_region_ttm_resource_free +ffffffff81be7000 T intel_runtime_pm_get_raw +ffffffff81be7090 T intel_runtime_pm_get +ffffffff81be7140 T intel_runtime_pm_get_if_in_use +ffffffff81be71f0 T intel_runtime_pm_get_if_active +ffffffff81be72a0 T intel_runtime_pm_get_noresume +ffffffff81be73d0 T intel_runtime_pm_put_raw +ffffffff81be7460 T intel_runtime_pm_put_unchecked +ffffffff81be7520 T intel_runtime_pm_enable +ffffffff81be7550 T intel_runtime_pm_disable +ffffffff81be7580 T intel_runtime_pm_driver_release +ffffffff81be7610 T intel_runtime_pm_init_early +ffffffff81be8000 T intel_sbi_read +ffffffff81be8050 t intel_sbi_rw +ffffffff81be8240 T intel_sbi_write +ffffffff81be9000 T intel_step_init +ffffffff81be94d0 T intel_step_name +ffffffff81be9510 t pvc_step_lookup +ffffffff81bea000 T gen3_stolen_base +ffffffff81bea050 T gen11_stolen_base +ffffffff81bea0d0 T i830_stolen_size +ffffffff81bea150 T gen3_stolen_size +ffffffff81bea1c0 T gen6_stolen_size +ffffffff81bea210 T chv_stolen_size +ffffffff81bea280 T gen8_stolen_size +ffffffff81bea2e0 T gen9_stolen_size +ffffffff81bea360 T intel_init_stolen_res +ffffffff81beb000 T intel_uncore_mmio_debug_init_early +ffffffff81beb060 T intel_uncore_forcewake_domain_to_str +ffffffff81beb0d0 T intel_uncore_fw_release_timer +ffffffff81beb1f0 t fw_domains_put +ffffffff81beb280 T intel_uncore_suspend +ffffffff81beb2d0 t intel_uncore_forcewake_reset +ffffffff81beb5a0 T intel_uncore_resume_early +ffffffff81beb6d0 T intel_uncore_unclaimed_mmio +ffffffff81beb740 T intel_uncore_runtime_resume +ffffffff81beb770 T intel_uncore_forcewake_get +ffffffff81beb8e0 T intel_uncore_forcewake_user_get +ffffffff81beba00 T intel_uncore_forcewake_get__locked +ffffffff81bebad0 T intel_uncore_forcewake_user_put +ffffffff81bebc10 T intel_uncore_forcewake_put__locked +ffffffff81bebd10 T intel_uncore_forcewake_put +ffffffff81bebe30 T intel_uncore_forcewake_put_delayed +ffffffff81bebf80 T intel_uncore_forcewake_flush +ffffffff81bec030 T assert_forcewakes_inactive +ffffffff81bec0a0 T assert_forcewakes_active +ffffffff81bec0d0 T intel_uncore_setup_mmio +ffffffff81bec100 t uncore_unmap_mmio +ffffffff81bec130 T intel_uncore_init_early +ffffffff81bec1a0 T intel_uncore_init_mmio +ffffffff81bed5e0 T intel_uncore_prune_engine_fw_domains +ffffffff81bed7c0 t fw_domain_fini +ffffffff81bed8c0 T intel_uncore_fini_mmio +ffffffff81bedad0 T __intel_wait_for_register_fw +ffffffff81bedd90 T __intel_wait_for_register +ffffffff81bee130 T intel_uncore_forcewake_for_reg +ffffffff81bee240 t check_for_unclaimed_mmio +ffffffff81bee3a0 T intel_uncore_arm_unclaimed_mmio_detection +ffffffff81bee4b0 t vgpu_write8 +ffffffff81bee4f0 t vgpu_write16 +ffffffff81bee530 t vgpu_write32 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i915_pxp_tee_component_unbind +ffffffff81bf6000 T intel_dram_detect +ffffffff81bf6430 t gen11_get_dram_info +ffffffff81bf6480 t bxt_get_dram_info +ffffffff81bf6790 t skl_get_dram_info +ffffffff81bf6970 T intel_dram_edram_detect +ffffffff81bf6a00 t icl_pcode_read_mem_global_info +ffffffff81bf6ae0 t skl_dram_get_channel_info +ffffffff81bf6cb0 t skl_dram_get_dimm_info +ffffffff81bf7000 T intel_gmch_bridge_setup +ffffffff81bf70d0 t intel_gmch_bridge_release +ffffffff81bf7100 T intel_gmch_bar_setup +ffffffff81bf72f0 T intel_gmch_bar_teardown +ffffffff81bf73e0 T intel_gmch_vga_set_state +ffffffff81bf8000 T intel_detect_pch +ffffffff81bf81b0 t intel_pch_match +ffffffff81bf8200 t intel_pch_type +ffffffff81bf89c0 t intel_virt_detect_pch +ffffffff81bf9000 T vlv_iosf_sb_get +ffffffff81bf9020 T vlv_iosf_sb_put +ffffffff81bf9040 T vlv_punit_read +ffffffff81bf9090 t vlv_sideband_rw +ffffffff81bf9240 T vlv_punit_write +ffffffff81bf9290 T vlv_bunit_read +ffffffff81bf92e0 T vlv_bunit_write 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t atom_op_move +ffffffff81bfcc80 t atom_op_and +ffffffff81bfce60 t atom_op_or +ffffffff81bfd040 t atom_op_shift_left +ffffffff81bfd220 t atom_op_shift_right +ffffffff81bfd400 t atom_op_mul +ffffffff81bfd550 t atom_op_div +ffffffff81bfd6c0 t atom_op_add +ffffffff81bfd8a0 t atom_op_sub +ffffffff81bfda80 t atom_op_setport +ffffffff81bfdc00 t atom_op_setregblock +ffffffff81bfdcc0 t atom_op_setfbbase +ffffffff81bfdd80 t atom_op_compare +ffffffff81bfdf60 t atom_op_switch +ffffffff81bfe190 t atom_op_jump +ffffffff81bfe400 t atom_op_test +ffffffff81bfe5c0 t atom_op_delay +ffffffff81bfe6a0 t atom_op_calltable +ffffffff81bfe7f0 t atom_op_repeat +ffffffff81bfe820 t atom_op_clear +ffffffff81bfe930 t atom_op_nop +ffffffff81bfe960 t atom_op_eot +ffffffff81bfe990 t atom_op_mask +ffffffff81bfec40 t atom_op_postcard +ffffffff81bfecf0 t atom_op_beep +ffffffff81bfed10 t atom_op_savereg +ffffffff81bfed40 t atom_op_restorereg +ffffffff81bfed70 t atom_op_setdatablock +ffffffff81bfeeb0 t atom_op_xor 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atombios_dvo_setup +ffffffff81c08640 T atombios_digital_setup +ffffffff81c08900 T atombios_get_encoder_mode +ffffffff81c08b90 T atombios_dig_encoder_setup2 +ffffffff81c08fd0 T atombios_dig_encoder_setup +ffffffff81c08ff0 T atombios_dig_transmitter_setup2 +ffffffff81c099d0 T atombios_set_edp_panel_power +ffffffff81c09ae0 T radeon_atom_release_dig_encoder +ffffffff81c09b20 T radeon_atom_pick_dig_encoder +ffffffff81c09d40 T radeon_atom_encoder_init +ffffffff81c09e10 t atombios_external_encoder_setup +ffffffff81c0a080 T radeon_atom_ext_encoder_setup_ddc +ffffffff81c0a0d0 T radeon_enc_destroy +ffffffff81c0a180 T radeon_add_atom_encoder +ffffffff81c0a590 t radeon_atombios_set_dig_info +ffffffff81c0a600 t radeon_atombios_set_dac_info +ffffffff81c0a670 t radeon_atom_backlight_update_status +ffffffff81c0a6d0 t radeon_atom_encoder_dpms +ffffffff81c0a970 t radeon_atom_mode_fixup +ffffffff81c0aab0 t radeon_atom_encoder_prepare +ffffffff81c0af90 t radeon_atom_encoder_commit +ffffffff81c0afc0 t radeon_atom_encoder_mode_set +ffffffff81c0b570 t radeon_atom_dig_detect +ffffffff81c0b680 t radeon_atom_encoder_disable +ffffffff81c0b910 t radeon_atom_encoder_dpms_avivo +ffffffff81c0bb40 t radeon_atom_encoder_dpms_dig +ffffffff81c0c080 t atombios_dac_setup +ffffffff81c0c160 t radeon_atom_dac_detect +ffffffff81c0c350 t radeon_atom_ext_dpms +ffffffff81c0c380 t radeon_atom_ext_prepare +ffffffff81c0c3b0 t radeon_atom_ext_commit +ffffffff81c0c3e0 t radeon_atom_ext_mode_set +ffffffff81c0c410 t radeon_atom_ext_disable +ffffffff81c0d000 T radeon_atom_hw_i2c_xfer +ffffffff81c0d140 t radeon_process_i2c_ch +ffffffff81c0d310 T radeon_atom_hw_i2c_func +ffffffff81c0e000 T btc_get_max_clock_from_voltage_dependency_table +ffffffff81c0e0d0 T btc_apply_voltage_dependency_rules +ffffffff81c0e140 T btc_skip_blacklist_clocks +ffffffff81c0e230 T btc_adjust_clock_combinations +ffffffff81c0e360 T btc_apply_voltage_delta_rules +ffffffff81c0e480 T btc_program_mgcg_hw_sequence +ffffffff81c0e580 T btc_dpm_enabled +ffffffff81c0e590 T btc_notify_uvd_to_smc +ffffffff81c0e600 T btc_reset_to_default +ffffffff81c0e650 T btc_read_arb_registers +ffffffff81c0e6e0 T btc_dpm_vblank_too_short +ffffffff81c0e750 T btc_dpm_pre_set_power_state +ffffffff81c0f970 T btc_dpm_set_power_state +ffffffff81c0fca0 t btc_set_power_state_conditionally_enable_ulv +ffffffff81c0fdd0 T btc_dpm_post_set_power_state +ffffffff81c0fef0 t btc_update_current_ps +ffffffff81c0fff0 T btc_dpm_enable +ffffffff81c10ed0 t btc_cg_clock_gating_enable +ffffffff81c11000 t btc_mg_clock_gating_enable +ffffffff81c11120 t btc_ls_clock_gating_enable +ffffffff81c11250 t btc_init_stutter_mode +ffffffff81c112d0 T btc_dpm_disable +ffffffff81c115b0 T btc_dpm_setup_asic +ffffffff81c11690 T btc_dpm_init +ffffffff81c11a80 T btc_dpm_fini +ffffffff81c11b30 T btc_dpm_debugfs_print_current_performance_level +ffffffff81c11b80 T btc_dpm_get_current_sclk +ffffffff81c11c00 T btc_dpm_get_current_mclk +ffffffff81c11c80 T btc_dpm_get_sclk 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ci_get_leakage_voltages +ffffffff81c1ac90 t ci_patch_dependency_tables_with_leakage +ffffffff81c1b300 t ci_set_private_data_variables_based_on_pptable +ffffffff81c1b410 T ci_dpm_debugfs_print_current_performance_level +ffffffff81c1b550 T ci_dpm_print_power_state +ffffffff81c1b610 T ci_dpm_get_current_sclk +ffffffff81c1b6e0 T ci_dpm_get_current_mclk +ffffffff81c1b7b0 T ci_dpm_get_sclk +ffffffff81c1b800 T ci_dpm_get_mclk +ffffffff81c1b850 t ci_set_valid_flag +ffffffff81c1b8f0 t ci_populate_all_graphic_levels +ffffffff81c1be80 t ci_populate_all_memory_levels +ffffffff81c1c780 t ci_populate_smc_vce_level +ffffffff81c1c8a0 t ci_populate_smc_acp_level +ffffffff81c1c9a0 t ci_populate_smc_samu_level +ffffffff81c1caa0 t ci_do_program_memory_timing_parameters +ffffffff81c1ccc0 t ci_populate_smc_uvd_level +ffffffff81c1ce10 t ci_populate_smc_initial_state +ffffffff81c1ceb0 t ci_populate_bapm_parameters_in_dpm_table +ffffffff81c1d040 t ci_populate_smc_voltage_table +ffffffff81c1d160 t ci_min_max_v_gnbl_pm_lid_from_bapm_vddc +ffffffff81c1d3c0 t ci_enable_sclk_mclk_dpm +ffffffff81c1d730 t ci_thermal_enable_alert +ffffffff81c1d8e0 t ci_enable_vce_dpm +ffffffff81c1e000 T ci_copy_bytes_to_smc +ffffffff81c1e240 T ci_start_smc +ffffffff81c1e280 T ci_reset_smc +ffffffff81c1e2c0 T ci_program_jump_on_start +ffffffff81c1e2f0 T ci_stop_smc_clock +ffffffff81c1e330 T ci_start_smc_clock +ffffffff81c1e370 T ci_is_smc_running +ffffffff81c1e3e0 T ci_load_smc_ucode +ffffffff81c1e570 T ci_read_smc_sram_dword +ffffffff81c1e640 T ci_write_smc_sram_dword +ffffffff81c1f000 T cik_get_allowed_info_register +ffffffff81c1f0a0 T cik_didt_rreg +ffffffff81c1f140 T cik_didt_wreg +ffffffff81c1f1c0 T ci_get_temp +ffffffff81c1f210 T kv_get_temp +ffffffff81c1f260 T cik_pciep_rreg +ffffffff81c1f2e0 T cik_pciep_wreg +ffffffff81c1f350 T cik_get_xclk +ffffffff81c1f3c0 T cik_mm_rdoorbell +ffffffff81c1f420 T cik_mm_wdoorbell +ffffffff81c1f470 T ci_mc_load_microcode +ffffffff81c1f7b0 T cik_ring_test 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cik_enable_cgcg +ffffffff81c23cb0 T cik_init_cp_pg_table +ffffffff81c23f20 T cik_get_csb_size +ffffffff81c23fb0 T cik_get_csb_buffer +ffffffff81c24140 T cik_irq_set +ffffffff81c24ec0 t cik_disable_interrupt_state +ffffffff81c25380 T cik_irq_process +ffffffff81c26b50 t cik_irq_ack +ffffffff81c274d0 T cik_resume +ffffffff81c27560 t cik_init_golden_registers +ffffffff81c27720 t cik_startup +ffffffff81c2a4f0 T cik_suspend +ffffffff81c2a8e0 T cik_init +ffffffff81c2ae00 t cik_init_microcode +ffffffff81c2bb50 t cik_uvd_init +ffffffff81c2bc00 t cik_vce_init +ffffffff81c2bcd0 t cik_cp_fini +ffffffff81c2bd50 t cik_irq_fini +ffffffff81c2be60 t cik_mec_fini +ffffffff81c2bf10 t cik_pcie_gart_fini +ffffffff81c2c010 T cik_fini +ffffffff81c2c330 T dce8_program_fmt +ffffffff81c2c460 T dce8_bandwidth_update +ffffffff81c2d070 T cik_get_gpu_clock_counter +ffffffff81c2d130 T cik_set_uvd_clocks +ffffffff81c2d1b0 t cik_set_uvd_clock +ffffffff81c2d320 T cik_set_vce_clocks +ffffffff81c2d560 t cik_wait_for_rlc_serdes +ffffffff81c2d720 t cik_mec_init +ffffffff81c2d900 t cik_uvd_start +ffffffff81c2d9e0 t cik_vce_start +ffffffff81c2daf0 t cik_irq_init +ffffffff81c2e670 t cik_cp_resume +ffffffff81c2fe10 t cik_uvd_resume +ffffffff81c2fee0 t cik_vce_resume +ffffffff81c2ffd0 t pcie_capability_set_word +ffffffff81c300e0 t pcie_capability_read_word +ffffffff81c30180 t pcie_capability_clear_and_set_word +ffffffff81c302a0 t pcie_capability_write_word +ffffffff81c30360 t cik_get_cu_active_bitmap +ffffffff81c304e0 t radeon_bo_reserve +ffffffff81c30650 t radeon_bo_unreserve +ffffffff81c30730 t cik_update_gfx_pg +ffffffff81c308d0 t cik_compute_stop +ffffffff81c30a40 t cik_cp_compute_fini +ffffffff81c30be0 t request_firmware +ffffffff81c30c70 t release_firmware +ffffffff81c30cb0 t dce8_latency_watermark +ffffffff81c31000 T cik_sdma_get_rptr +ffffffff81c31070 T cik_sdma_get_wptr +ffffffff81c310c0 T cik_sdma_set_wptr +ffffffff81c31110 T cik_sdma_ring_ib_execute +ffffffff81c31510 T cik_sdma_fence_ring_emit +ffffffff81c316e0 t cik_sdma_hdp_flush_ring_emit +ffffffff81c31910 T cik_sdma_semaphore_ring_emit +ffffffff81c31a30 T cik_sdma_enable +ffffffff81c31c10 T cik_sdma_resume +ffffffff81c320f0 T cik_sdma_fini +ffffffff81c32130 T cik_copy_dma +ffffffff81c32530 T cik_sdma_ring_test +ffffffff81c327e0 T cik_sdma_ib_test +ffffffff81c32a40 T cik_sdma_is_lockup +ffffffff81c32ac0 T cik_sdma_vm_copy_pages +ffffffff81c32bd0 T cik_sdma_vm_write_pages +ffffffff81c32d40 T cik_sdma_vm_set_pages +ffffffff81c32ec0 T cik_sdma_vm_pad_ib +ffffffff81c32f10 T cik_dma_vm_flush +ffffffff81c34000 T cypress_enable_spread_spectrum +ffffffff81c34140 T cypress_start_dpm +ffffffff81c34190 T cypress_enable_sclk_control +ffffffff81c341f0 T cypress_enable_mclk_control +ffffffff81c34250 T cypress_notify_smc_display_change +ffffffff81c342a0 T cypress_program_response_times +ffffffff81c34360 T cypress_advertise_gen2_capability +ffffffff81c34430 T cypress_notify_link_speed_change_after_state_change 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+ffffffff81c36550 T cypress_dpm_setup_asic +ffffffff81c36640 T cypress_dpm_enable +ffffffff81c37110 t cypress_force_mc_use_s1 +ffffffff81c37390 t cypress_gfx_clock_gating_enable +ffffffff81c376a0 t cypress_mg_clock_gating_enable +ffffffff81c37920 T cypress_dpm_disable +ffffffff81c37b50 T cypress_dpm_set_power_state +ffffffff81c37d90 T cypress_dpm_display_configuration_changed +ffffffff81c37e70 T cypress_dpm_init +ffffffff81c380e0 T cypress_dpm_fini +ffffffff81c38170 T cypress_dpm_vblank_too_short +ffffffff81c381e0 t cypress_wait_for_mc_sequencer +ffffffff81c39000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81c39070 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81c390e0 T dce3_2_afmt_write_sad_regs +ffffffff81c391e0 T dce3_2_audio_set_dto +ffffffff81c39320 T dce3_2_hdmi_update_acr +ffffffff81c39680 T dce3_2_set_audio_packet +ffffffff81c39810 T dce3_2_set_mute +ffffffff81c3a000 T dce6_endpoint_rreg +ffffffff81c3a0e0 T dce6_endpoint_wreg +ffffffff81c3a1d0 T dce6_audio_get_pin +ffffffff81c3a360 T dce6_afmt_select_pin +ffffffff81c3a3f0 T dce6_afmt_write_latency_fields +ffffffff81c3a4b0 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81c3a580 T dce6_afmt_dp_write_speaker_allocation +ffffffff81c3a650 T dce6_afmt_write_sad_regs +ffffffff81c3a790 T dce6_audio_enable +ffffffff81c3a7e0 T dce6_hdmi_audio_set_dto +ffffffff81c3a850 T dce6_dp_audio_set_dto +ffffffff81c3b000 T eg_cg_rreg +ffffffff81c3b080 T eg_cg_wreg +ffffffff81c3b0f0 T eg_pif_phy0_rreg +ffffffff81c3b170 T eg_pif_phy0_wreg +ffffffff81c3b1d0 T eg_pif_phy1_rreg +ffffffff81c3b250 T eg_pif_phy1_wreg +ffffffff81c3b2b0 T evergreen_get_allowed_info_register +ffffffff81c3b340 T evergreen_tiling_fields +ffffffff81c3b3e0 T sumo_set_uvd_clocks +ffffffff81c3b4c0 t sumo_set_uvd_clock +ffffffff81c3b6b0 T evergreen_set_uvd_clocks +ffffffff81c3bc30 T evergreen_fix_pci_max_read_req_size +ffffffff81c3bdf0 T dce4_program_fmt +ffffffff81c3bf10 T dce4_wait_for_vblank +ffffffff81c3c190 T evergreen_page_flip +ffffffff81c3c320 T evergreen_page_flip_pending +ffffffff81c3c390 T evergreen_get_temp +ffffffff81c3c460 T sumo_get_temp +ffffffff81c3c4b0 T sumo_pm_init_profile +ffffffff81c3c5f0 T btc_pm_init_profile +ffffffff81c3c700 T evergreen_pm_misc +ffffffff81c3c8a0 T evergreen_pm_prepare +ffffffff81c3c9a0 T evergreen_pm_finish +ffffffff81c3caa0 T evergreen_hpd_sense +ffffffff81c3cb10 T evergreen_hpd_set_polarity +ffffffff81c3cc50 T evergreen_hpd_init +ffffffff81c3cd20 T evergreen_hpd_fini +ffffffff81c3cdc0 T evergreen_get_number_of_dram_channels +ffffffff81c3ce10 T evergreen_bandwidth_update +ffffffff81c3cfd0 t evergreen_line_buffer_adjust +ffffffff81c3d1c0 t evergreen_program_watermarks +ffffffff81c3dc20 T evergreen_mc_wait_for_idle +ffffffff81c3dcc0 T evergreen_pcie_gart_tlb_flush +ffffffff81c3dd90 T evergreen_mc_stop +ffffffff81c3e890 T evergreen_mc_resume +ffffffff81c3efa0 T evergreen_mc_program +ffffffff81c3f3a0 T evergreen_ring_ib_execute +ffffffff81c3f830 T evergreen_mc_init +ffffffff81c3f970 T evergreen_print_gpu_status_regs +ffffffff81c3f9a0 T evergreen_is_display_hung +ffffffff81c3fba0 T evergreen_gpu_check_soft_reset +ffffffff81c3fd00 T evergreen_gpu_pci_config_reset +ffffffff81c3fe80 T evergreen_asic_reset +ffffffff81c401a0 T evergreen_gfx_is_lockup +ffffffff81c40210 T sumo_rlc_fini +ffffffff81c403c0 t radeon_bo_reserve +ffffffff81c40530 t radeon_bo_unreserve +ffffffff81c40610 T sumo_rlc_init +ffffffff81c40de0 T evergreen_rlc_resume +ffffffff81c41150 T evergreen_get_vblank_counter +ffffffff81c411c0 T evergreen_disable_interrupt_state +ffffffff81c41490 T evergreen_irq_set +ffffffff81c41a50 T evergreen_irq_suspend +ffffffff81c41aa0 T evergreen_irq_process +ffffffff81c425f0 t evergreen_irq_ack +ffffffff81c42cb0 T evergreen_resume +ffffffff81c42d90 t evergreen_init_golden_registers +ffffffff81c42fa0 t evergreen_startup +ffffffff81c44830 T evergreen_suspend +ffffffff81c449d0 T evergreen_init +ffffffff81c44dd0 t evergreen_pcie_gart_fini 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dce4_audio_enable +ffffffff81c50080 T evergreen_hdmi_update_acr +ffffffff81c502a0 T dce4_afmt_write_latency_fields +ffffffff81c50310 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c50380 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c503f0 T evergreen_hdmi_write_sad_regs +ffffffff81c504f0 T evergreen_set_avi_packet +ffffffff81c50690 T dce4_hdmi_audio_set_dto +ffffffff81c50770 T dce4_dp_audio_set_dto +ffffffff81c50860 T dce4_set_vbi_packet +ffffffff81c508d0 T dce4_hdmi_set_color_depth +ffffffff81c50a20 T dce4_set_audio_packet +ffffffff81c50c30 T dce4_set_mute +ffffffff81c50d40 T evergreen_hdmi_enable +ffffffff81c51070 T evergreen_dp_enable +ffffffff81c52000 T kv_dpm_enable_bapm +ffffffff81c52070 T kv_dpm_enable +ffffffff81c52f70 t kv_populate_vce_table +ffffffff81c531f0 t kv_populate_samu_table +ffffffff81c53450 t kv_populate_acp_table +ffffffff81c535e0 t kv_start_am +ffffffff81c53620 t kv_enable_auto_thermal_throttling +ffffffff81c53660 t kv_enable_dpm_voltage_scaling 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cayman_gpu_check_soft_reset +ffffffff81c59540 T cayman_asic_reset +ffffffff81c59840 T cayman_gfx_is_lockup +ffffffff81c598b0 T cayman_resume +ffffffff81c59940 t ni_init_golden_registers +ffffffff81c59a20 t cayman_startup +ffffffff81c5ae60 T cayman_suspend +ffffffff81c5b050 T cayman_init +ffffffff81c5b3c0 t cayman_uvd_init +ffffffff81c5b470 t cayman_vce_init +ffffffff81c5b540 t cayman_cp_fini +ffffffff81c5b5c0 t cayman_pcie_gart_fini +ffffffff81c5b700 T cayman_fini +ffffffff81c5b980 T cayman_vm_init +ffffffff81c5b9e0 T cayman_vm_fini +ffffffff81c5ba10 T cayman_vm_decode_fault +ffffffff81c5baa0 T cayman_vm_flush +ffffffff81c5bf00 T tn_set_vce_clocks +ffffffff81c5c160 t cayman_uvd_start +ffffffff81c5c210 t cayman_vce_start +ffffffff81c5c320 t cayman_cp_load_microcode +ffffffff81c5c4b0 t cayman_cp_resume +ffffffff81c5d370 t cayman_uvd_resume +ffffffff81c5d440 t cayman_vce_resume +ffffffff81c5e000 T cayman_dma_get_rptr +ffffffff81c5e070 T cayman_dma_get_wptr +ffffffff81c5e0c0 T cayman_dma_set_wptr +ffffffff81c5e110 T cayman_dma_ring_ib_execute +ffffffff81c5e4a0 T cayman_dma_stop +ffffffff81c5e550 T cayman_dma_resume +ffffffff81c5e7b0 T cayman_dma_fini +ffffffff81c5e870 T cayman_dma_is_lockup +ffffffff81c5e8f0 T cayman_dma_vm_copy_pages +ffffffff81c5e9f0 T cayman_dma_vm_write_pages +ffffffff81c5eb50 T cayman_dma_vm_set_pages +ffffffff81c5ecc0 T cayman_dma_vm_pad_ib +ffffffff81c5ed10 T cayman_dma_vm_flush +ffffffff81c60000 T ni_get_pi +ffffffff81c60030 T ni_get_ps +ffffffff81c60060 T ni_dpm_vblank_too_short +ffffffff81c600d0 T ni_dpm_force_performance_level +ffffffff81c60220 T ni_copy_and_switch_arb_sets +ffffffff81c604f0 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c60570 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c605f0 T ni_dpm_setup_asic +ffffffff81c60800 T ni_update_current_ps +ffffffff81c608c0 T ni_update_requested_ps +ffffffff81c60980 T ni_dpm_enable +ffffffff81c617e0 t ni_init_smc_table +ffffffff81c62190 t ni_init_smc_spll_table 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ni_dpm_get_mclk +ffffffff81c66c00 t ni_do_program_memory_timing_parameters +ffffffff81c66d40 t ni_calculate_sclk_params +ffffffff81c66f70 t ni_calculate_power_boost_limit +ffffffff81c67130 t ni_populate_mclk_value +ffffffff81c68000 T r100_wait_for_vblank +ffffffff81c68190 T r100_page_flip +ffffffff81c68450 T r100_page_flip_pending +ffffffff81c68500 T r100_pm_get_dynpm_state +ffffffff81c68720 T r100_pm_init_profile +ffffffff81c68800 T r100_pm_misc +ffffffff81c68c40 T r100_pm_prepare +ffffffff81c68cf0 T r100_pm_finish +ffffffff81c68da0 T r100_gui_idle +ffffffff81c68de0 T r100_hpd_sense +ffffffff81c68e40 T r100_hpd_set_polarity +ffffffff81c68f00 T r100_hpd_init +ffffffff81c68fa0 T r100_hpd_fini +ffffffff81c69010 T r100_pci_gart_tlb_flush +ffffffff81c69040 T r100_pci_gart_init +ffffffff81c69110 T r100_pci_gart_get_page_entry +ffffffff81c69140 T r100_pci_gart_set_page +ffffffff81c69180 T r100_pci_gart_enable +ffffffff81c69270 T r100_pci_gart_disable +ffffffff81c692f0 T r100_pci_gart_fini +ffffffff81c69370 T r100_irq_set +ffffffff81c69450 T r100_irq_disable +ffffffff81c694c0 T r100_irq_process +ffffffff81c697c0 T r100_get_vblank_counter +ffffffff81c69810 T r100_fence_ring_emit +ffffffff81c69c70 T r100_semaphore_ring_emit +ffffffff81c69ca0 T r100_copy_blit +ffffffff81c6a330 T r100_ring_start +ffffffff81c6a420 T r100_gfx_get_rptr +ffffffff81c6a480 T r100_gfx_get_wptr +ffffffff81c6a4c0 T r100_gfx_set_wptr +ffffffff81c6a500 T r100_cp_init +ffffffff81c6aa30 T r100_debugfs_cp_init +ffffffff81c6aa60 T r100_cp_fini +ffffffff81c6ab00 T r100_cp_disable +ffffffff81c6ac40 T r100_gui_wait_for_idle +ffffffff81c6ad30 T r100_reloc_pitch_offset +ffffffff81c6ae70 T r100_packet3_load_vbpntr +ffffffff81c6b110 T r100_cs_parse_packet0 +ffffffff81c6b220 T r100_cs_packet_parse_vline +ffffffff81c6b430 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c6b4b0 T r100_cs_parse +ffffffff81c6c6a0 T r100_cs_track_clear +ffffffff81c6ca30 T r100_cs_track_check +ffffffff81c6d240 T r100_mc_wait_for_idle +ffffffff81c6d2e0 T r100_gpu_is_lockup +ffffffff81c6d340 T r100_enable_bm +ffffffff81c6d390 T r100_bm_disable +ffffffff81c6d440 T r100_asic_reset +ffffffff81c6d770 T r100_mc_stop +ffffffff81c6d930 T r100_mc_resume +ffffffff81c6d9f0 T r100_set_common_regs +ffffffff81c6db90 T r100_vram_init_sizes +ffffffff81c6dd80 T r100_vga_set_state +ffffffff81c6dde0 T r100_pll_errata_after_index +ffffffff81c6de20 T r100_pll_rreg +ffffffff81c6df50 T r100_pll_wreg +ffffffff81c6e060 T r100_debugfs_rbbm_init +ffffffff81c6e090 T r100_debugfs_mc_info_init +ffffffff81c6e0c0 T r100_set_surface_reg +ffffffff81c6e2d0 T r100_clear_surface_reg +ffffffff81c6e380 T r100_bandwidth_update +ffffffff81c6edd0 T r100_ring_test +ffffffff81c6f080 T r100_ring_ib_execute +ffffffff81c6f2e0 T r100_ib_test +ffffffff81c6f620 T r100_vga_render_disable +ffffffff81c6f680 T r100_resume +ffffffff81c6f870 t r100_startup +ffffffff81c6fdb0 T r100_suspend +ffffffff81c6fe90 T r100_fini +ffffffff81c6ffa0 T r100_restore_sanity +ffffffff81c70040 T r100_init +ffffffff81c70490 t r100_set_safe_registers +ffffffff81c70510 T r100_mm_rreg_slow +ffffffff81c70590 T r100_mm_wreg_slow +ffffffff81c705f0 T r100_io_rreg +ffffffff81c70690 T r100_io_wreg +ffffffff81c70700 t r100_get_vtx_size +ffffffff81c707f0 t r100_cs_track_texture_print +ffffffff81c71000 T r200_copy_dma +ffffffff81c71470 T r200_packet0_check +ffffffff81c72240 t r200_get_vtx_size_0 +ffffffff81c72400 t r200_get_vtx_size_1 +ffffffff81c72490 T r200_set_safe_registers +ffffffff81c73000 T rv370_pcie_rreg +ffffffff81c73080 T rv370_pcie_wreg +ffffffff81c730f0 T rv370_pcie_gart_tlb_flush +ffffffff81c732f0 T rv370_pcie_gart_get_page_entry +ffffffff81c73350 T rv370_pcie_gart_set_page +ffffffff81c73390 T rv370_pcie_gart_init +ffffffff81c73460 T rv370_pcie_gart_enable +ffffffff81c737c0 T rv370_pcie_gart_disable +ffffffff81c73940 T rv370_pcie_gart_fini +ffffffff81c73970 T r300_fence_ring_emit +ffffffff81c73ee0 T r300_ring_start +ffffffff81c74850 T r300_mc_wait_for_idle +ffffffff81c748f0 T r300_asic_reset +ffffffff81c74b10 T r300_mc_init +ffffffff81c74bc0 T rv370_set_pcie_lanes +ffffffff81c74d80 T rv370_get_pcie_lanes +ffffffff81c74e30 T r300_cs_parse +ffffffff81c751a0 t r300_packet0_check +ffffffff81c76060 T r300_set_reg_safe +ffffffff81c760a0 T r300_mc_program +ffffffff81c76230 T r300_clock_startup +ffffffff81c762c0 T r300_resume +ffffffff81c76490 t r300_startup +ffffffff81c767f0 T r300_suspend +ffffffff81c76870 T r300_fini +ffffffff81c76950 T r300_init +ffffffff81c77000 T r420_pm_init_profile +ffffffff81c770f0 T r420_pipes_init +ffffffff81c772d0 T r420_mc_rreg +ffffffff81c77350 T r420_mc_wreg +ffffffff81c773c0 T r420_resume +ffffffff81c77590 t r420_startup +ffffffff81c77790 T r420_suspend +ffffffff81c77930 T r420_fini +ffffffff81c77a10 T r420_init +ffffffff81c77c90 T r420_debugfs_pipes_info_init +ffffffff81c77cc0 t r420_cp_errata_init +ffffffff81c78000 T r520_mc_wait_for_idle +ffffffff81c780a0 T r520_resume +ffffffff81c78190 t r520_startup +ffffffff81c78580 T r520_init +ffffffff81c79000 T r600_rcu_rreg +ffffffff81c79080 T r600_rcu_wreg +ffffffff81c790f0 T r600_uvd_ctx_rreg +ffffffff81c79170 T r600_uvd_ctx_wreg +ffffffff81c791e0 T r600_get_allowed_info_register +ffffffff81c79260 T r600_get_xclk +ffffffff81c79290 T r600_set_uvd_clocks +ffffffff81c797f0 T dce3_program_fmt +ffffffff81c79910 T rv6xx_get_temp +ffffffff81c79960 T r600_pm_get_dynpm_state +ffffffff81c79d70 T rs780_pm_init_profile +ffffffff81c79e80 T r600_pm_init_profile +ffffffff81c7a120 T r600_pm_misc +ffffffff81c7a200 T r600_gui_idle +ffffffff81c7a240 T r600_hpd_sense +ffffffff81c7a360 T r600_hpd_set_polarity +ffffffff81c7a5e0 T r600_hpd_init +ffffffff81c7a7c0 T r600_hpd_fini +ffffffff81c7a970 T r600_pcie_gart_tlb_flush +ffffffff81c7aaa0 T r600_pcie_gart_init +ffffffff81c7ab40 T r600_mc_wait_for_idle +ffffffff81c7abe0 T rs780_mc_rreg +ffffffff81c7ac80 T rs780_mc_wreg +ffffffff81c7ad10 T r600_vram_scratch_init +ffffffff81c7ae10 t radeon_bo_reserve +ffffffff81c7af80 t radeon_bo_unreserve +ffffffff81c7b060 T r600_vram_scratch_fini +ffffffff81c7b0e0 T r600_set_bios_scratch_engine_hung +ffffffff81c7b130 T r600_gpu_check_soft_reset +ffffffff81c7b4d0 T r600_asic_reset +ffffffff81c7b860 t r600_gpu_pci_config_reset +ffffffff81c7ba70 T r600_gfx_is_lockup +ffffffff81c7bae0 T r6xx_remap_render_backend +ffffffff81c7bca0 T r600_count_pipe_bits +ffffffff81c7bd10 T r600_pciep_rreg +ffffffff81c7bd90 T r600_pciep_wreg +ffffffff81c7be00 T r600_cp_stop +ffffffff81c7be80 T r600_init_microcode +ffffffff81c7c340 t request_firmware +ffffffff81c7c3d0 t release_firmware +ffffffff81c7c410 T r600_gfx_get_rptr +ffffffff81c7c470 T r600_gfx_get_wptr +ffffffff81c7c4b0 T r600_gfx_set_wptr +ffffffff81c7c4f0 T r600_cp_start +ffffffff81c7c860 T r600_cp_resume +ffffffff81c7cbc0 T r600_ring_init +ffffffff81c7cc60 T r600_cp_fini +ffffffff81c7ccf0 T r600_scratch_init +ffffffff81c7cd60 T r600_ring_test +ffffffff81c7d000 T r600_fence_ring_emit +ffffffff81c7d8a0 T r600_semaphore_ring_emit +ffffffff81c7da80 T r600_copy_cpdma +ffffffff81c7e030 T r600_set_surface_reg +ffffffff81c7e060 T r600_clear_surface_reg +ffffffff81c7e090 T r600_vga_set_state +ffffffff81c7e0f0 T r600_resume +ffffffff81c7e180 t r600_startup +ffffffff81c7fe60 T r600_suspend +ffffffff81c7ffd0 T r600_irq_suspend +ffffffff81c80090 t r600_pcie_gart_disable +ffffffff81c80290 T r600_init +ffffffff81c809f0 T r600_ih_ring_init +ffffffff81c80a60 T r600_irq_fini +ffffffff81c80ba0 t r600_pcie_gart_fini +ffffffff81c80bd0 T r600_fini +ffffffff81c80d60 T r600_ring_ib_execute +ffffffff81c811f0 T r600_ib_test +ffffffff81c814a0 T r600_ih_ring_alloc +ffffffff81c815c0 T r600_ih_ring_fini +ffffffff81c81650 T r600_rlc_stop +ffffffff81c817e0 T r600_disable_interrupts +ffffffff81c81890 T r600_irq_init +ffffffff81c81cf0 t r600_disable_interrupt_state +ffffffff81c81ff0 T r600_irq_disable +ffffffff81c820b0 T r600_irq_set +ffffffff81c82830 t r600_irq_ack +ffffffff81c82d60 T r600_irq_process +ffffffff81c83960 T r600_mmio_hdp_flush +ffffffff81c839e0 T r600_set_pcie_lanes +ffffffff81c83b10 T r600_get_pcie_lanes +ffffffff81c83be0 T r600_get_gpu_clock_counter +ffffffff81c83c70 t r600_cp_load_microcode +ffffffff81c83f40 t r600_uvd_resume +ffffffff81c85000 T r600_fmt_is_valid_color +ffffffff81c85040 T r600_fmt_is_valid_texture +ffffffff81c85090 T r600_fmt_get_blocksize +ffffffff81c850d0 T r600_fmt_get_nblocksx +ffffffff81c85120 T r600_fmt_get_nblocksy +ffffffff81c85180 T r600_cs_common_vline_parse +ffffffff81c85440 T r600_mip_minify +ffffffff81c854a0 T r600_cs_parse +ffffffff81c87360 T r600_dma_cs_next_reloc +ffffffff81c873e0 T r600_dma_cs_parse +ffffffff81c87a80 t r600_cs_track_check +ffffffff81c88bc0 t r600_cs_check_reg +ffffffff81c89ae0 t r600_is_safe_reg +ffffffff81c89b80 t r600_texture_size +ffffffff81c8a000 T r600_dma_get_rptr +ffffffff81c8a060 T r600_dma_get_wptr +ffffffff81c8a0a0 T r600_dma_set_wptr +ffffffff81c8a0e0 T r600_dma_stop +ffffffff81c8a170 T r600_dma_resume +ffffffff81c8a370 T r600_dma_fini +ffffffff81c8a3f0 T r600_dma_is_lockup +ffffffff81c8a460 T r600_dma_ring_test +ffffffff81c8a6d0 T r600_dma_fence_ring_emit +ffffffff81c8a8b0 T r600_dma_semaphore_ring_emit +ffffffff81c8a9d0 T r600_dma_ib_test +ffffffff81c8abf0 T r600_dma_ring_ib_execute +ffffffff81c8af40 T r600_copy_dma +ffffffff81c8c000 T r600_dpm_print_class_info +ffffffff81c8c2b0 T r600_dpm_print_cap_info +ffffffff81c8c340 T r600_dpm_print_ps_status +ffffffff81c8c3d0 T r600_dpm_get_vblank_time +ffffffff81c8c490 T r600_dpm_get_vrefresh +ffffffff81c8c520 T r600_calculate_u_and_p +ffffffff81c8c5a0 T r600_calculate_at +ffffffff81c8c650 T r600_gfx_clockgating_enable +ffffffff81c8c750 T r600_dynamicpm_enable +ffffffff81c8c7a0 T r600_enable_thermal_protection +ffffffff81c8c800 T r600_enable_acpi_pm +ffffffff81c8c850 T r600_enable_dynamic_pcie_gen2 +ffffffff81c8c8a0 T r600_dynamicpm_enabled +ffffffff81c8c8e0 T r600_enable_sclk_control +ffffffff81c8c940 T r600_enable_mclk_control +ffffffff81c8c9a0 T r600_enable_spll_bypass +ffffffff81c8c9f0 T r600_wait_for_spll_change +ffffffff81c8ca70 T r600_set_bsp +ffffffff81c8cab0 T r600_set_at +ffffffff81c8cb10 T r600_set_tc +ffffffff81c8cb70 T r600_select_td +ffffffff81c8cc20 T r600_set_vrc +ffffffff81c8cc60 T r600_set_tpu +ffffffff81c8ccc0 T r600_set_tpc +ffffffff81c8cd20 T r600_set_sstu +ffffffff81c8cd80 T r600_set_sst +ffffffff81c8cdd0 T r600_set_git +ffffffff81c8ce20 T r600_set_fctu +ffffffff81c8ce80 T r600_set_fct +ffffffff81c8ced0 T r600_set_ctxcgtt3d_rphc +ffffffff81c8cf30 T r600_set_ctxcgtt3d_rsdc +ffffffff81c8cf90 T r600_set_vddc3d_oorsu +ffffffff81c8cff0 T r600_set_vddc3d_oorphc +ffffffff81c8d050 T r600_set_vddc3d_oorsdc +ffffffff81c8d0b0 T r600_set_mpll_lock_time +ffffffff81c8d100 T r600_set_mpll_reset_time +ffffffff81c8d150 T r600_engine_clock_entry_enable +ffffffff81c8d250 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c8d350 T r600_engine_clock_entry_enable_post_divider +ffffffff81c8d450 T r600_engine_clock_entry_set_post_divider +ffffffff81c8d510 T r600_engine_clock_entry_set_reference_divider +ffffffff81c8d5d0 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c8d690 T r600_engine_clock_entry_set_step_time +ffffffff81c8d750 T r600_vid_rt_set_ssu +ffffffff81c8d7b0 T r600_vid_rt_set_vru +ffffffff81c8d810 T r600_vid_rt_set_vrt +ffffffff81c8d870 T r600_voltage_control_enable_pins +ffffffff81c8d8c0 T r600_voltage_control_program_voltages +ffffffff81c8d950 T r600_voltage_control_deactivate_static_control +ffffffff81c8d9e0 T r600_power_level_enable +ffffffff81c8da50 T r600_power_level_set_voltage_index +ffffffff81c8dac0 T r600_power_level_set_mem_clock_index +ffffffff81c8db20 T r600_power_level_set_eng_clock_index +ffffffff81c8db90 T r600_power_level_set_watermark_id +ffffffff81c8dc00 T r600_power_level_set_pcie_gen2 +ffffffff81c8dc60 T r600_power_level_get_current_index +ffffffff81c8dca0 T r600_power_level_get_target_index +ffffffff81c8dce0 T r600_power_level_set_enter_index +ffffffff81c8dd40 T r600_wait_for_power_level_unequal +ffffffff81c8de30 T r600_wait_for_power_level +ffffffff81c8df20 T r600_start_dpm +ffffffff81c8e200 T r600_stop_dpm +ffffffff81c8e250 T r600_dpm_pre_set_power_state +ffffffff81c8e280 T r600_dpm_post_set_power_state +ffffffff81c8e2b0 T r600_is_uvd_state +ffffffff81c8e2f0 T r600_is_internal_thermal_sensor +ffffffff81c8e330 T r600_dpm_late_enable +ffffffff81c8e440 T r600_get_platform_caps +ffffffff81c8e4e0 T r600_parse_extended_power_table +ffffffff81c8f2a0 T r600_free_extended_power_table +ffffffff81c8f3a0 T r600_get_pcie_gen_support +ffffffff81c8f3f0 T r600_get_pcie_lane_support +ffffffff81c8f450 T r600_encode_pci_lane_width +ffffffff81c90000 T r600_audio_update_hdmi +ffffffff81c90170 t r600_audio_status +ffffffff81c90290 T r600_hdmi_buffer_status_changed +ffffffff81c90330 T r600_hdmi_update_audio_settings +ffffffff81c90700 T r600_audio_enable +ffffffff81c90780 T r600_audio_get_pin +ffffffff81c907b0 T r600_hdmi_update_acr +ffffffff81c90b50 T r600_set_avi_packet +ffffffff81c90d50 T r600_hdmi_audio_workaround +ffffffff81c90e20 T r600_hdmi_audio_set_dto +ffffffff81c90ee0 T r600_set_vbi_packet +ffffffff81c90fa0 T r600_set_audio_packet +ffffffff81c91270 T r600_set_mute +ffffffff81c91380 T r600_hdmi_enable +ffffffff81c92000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c92040 T radeon_acpi_pcie_notify_device_ready +ffffffff81c92160 T radeon_acpi_pcie_performance_request +ffffffff81c924f0 T radeon_acpi_init +ffffffff81c92c60 t radeon_acpi_event +ffffffff81c92f60 T radeon_acpi_fini +ffffffff81c93000 T radeon_agp_head_init +ffffffff81c93050 T radeon_agp_init +ffffffff81c930a0 T radeon_agp_resume +ffffffff81c93130 T radeon_agp_fini +ffffffff81c93180 T radeon_agp_suspend +ffffffff81c94000 T radeon_agp_disable +ffffffff81c94120 T radeon_asic_init +ffffffff81c948f0 t radeon_invalid_rreg +ffffffff81c94930 t radeon_invalid_wreg +ffffffff81c94970 t radeon_invalid_get_allowed_info_register +ffffffff81c95000 T radeon_atombios_i2c_init +ffffffff81c953a0 T radeon_atombios_lookup_gpio +ffffffff81c954a0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c95de0 t radeon_lookup_i2c_gpio +ffffffff81c960d0 t radeon_atom_apply_quirks +ffffffff81c964f0 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81c969f0 T radeon_atom_get_clock_info +ffffffff81c96dd0 T radeon_atombios_sideport_present +ffffffff81c96e80 T radeon_atombios_get_tmds_info +ffffffff81c96fc0 T radeon_atombios_get_ppll_ss_info +ffffffff81c970e0 T radeon_atombios_get_asic_ss_info +ffffffff81c973c0 t radeon_atombios_get_igp_ss_overrides +ffffffff81c974d0 T radeon_atombios_get_lvds_info +ffffffff81c97830 T radeon_atombios_get_primary_dac_info +ffffffff81c978f0 T radeon_atom_get_tv_timings +ffffffff81c97b30 T radeon_atombios_get_tv_info +ffffffff81c97bf0 T radeon_atombios_get_tv_dac_info +ffffffff81c97cf0 T radeon_atombios_get_default_voltages +ffffffff81c97db0 T radeon_atombios_get_power_modes +ffffffff81c98e20 T radeon_atom_get_clock_dividers +ffffffff81c99110 T radeon_atom_get_memory_pll_dividers +ffffffff81c99250 T radeon_atom_set_clock_gating +ffffffff81c992a0 T radeon_atom_get_engine_clock +ffffffff81c992f0 T radeon_atom_get_memory_clock +ffffffff81c99340 T radeon_atom_set_engine_clock +ffffffff81c99390 T radeon_atom_set_memory_clock +ffffffff81c993f0 T radeon_atom_set_engine_dram_timings +ffffffff81c99460 T radeon_atom_update_memory_dll +ffffffff81c994b0 T radeon_atom_set_ac_timing +ffffffff81c99500 T radeon_atom_set_voltage +ffffffff81c995d0 T radeon_atom_get_max_vddc +ffffffff81c996b0 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81c99780 T radeon_atom_get_leakage_id_from_vbios +ffffffff81c99840 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81c99a60 T radeon_atom_get_voltage_evv +ffffffff81c99b20 T radeon_atom_get_voltage_gpio_settings +ffffffff81c99c20 T radeon_atom_is_voltage_gpio +ffffffff81c99db0 T radeon_atom_get_svi2_info +ffffffff81c99ea0 T radeon_atom_get_max_voltage +ffffffff81c9a030 T radeon_atom_get_min_voltage +ffffffff81c9a170 T radeon_atom_get_voltage_step +ffffffff81c9a270 T radeon_atom_round_to_true_voltage +ffffffff81c9a3d0 T radeon_atom_get_voltage_table +ffffffff81c9a640 T radeon_atom_get_memory_info +ffffffff81c9a7f0 T radeon_atom_get_mclk_range_table +ffffffff81c9aa30 T radeon_atom_init_mc_reg_table +ffffffff81c9aca0 T radeon_atom_initialize_bios_scratch_regs +ffffffff81c9ad70 T radeon_save_bios_scratch_regs +ffffffff81c9ae50 T radeon_restore_bios_scratch_regs +ffffffff81c9af30 T radeon_atom_output_lock +ffffffff81c9afc0 T radeon_atombios_connected_scratch_regs +ffffffff81c9b730 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81c9b880 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81c9bab0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81c9bc90 t radeon_atombios_add_pplib_thermal_controller +ffffffff81c9c090 t radeon_atombios_parse_pplib_clock_info +ffffffff81c9c440 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81c9d000 T radeon_audio_init +ffffffff81c9d1f0 t radeon_audio_enable +ffffffff81c9d350 T radeon_audio_endpoint_rreg +ffffffff81c9d390 T radeon_audio_endpoint_wreg +ffffffff81c9d3d0 T radeon_audio_get_pin +ffffffff81c9d420 T radeon_audio_detect +ffffffff81c9d580 T radeon_audio_fini +ffffffff81c9d610 T radeon_audio_mode_set +ffffffff81c9d660 T radeon_audio_dpms +ffffffff81c9d6b0 T radeon_audio_decode_dfs_div +ffffffff81c9d710 T radeon_audio_component_init +ffffffff81c9d780 T radeon_audio_component_fini +ffffffff81c9d7d0 t radeon_audio_hdmi_mode_set +ffffffff81c9deb0 t radeon_audio_write_speaker_allocation +ffffffff81c9df60 t radeon_audio_write_sad_regs +ffffffff81c9e030 t radeon_audio_set_avi_packet +ffffffff81c9e170 t radeon_audio_dp_mode_set +ffffffff81c9e2f0 t radeon_audio_rreg +ffffffff81c9e340 t radeon_audio_wreg +ffffffff81c9f000 T radeon_benchmark +ffffffff81c9f940 t radeon_benchmark_move +ffffffff81c9fc20 t radeon_bo_reserve +ffffffff81c9fd90 t radeon_bo_unreserve +ffffffff81c9fe70 t radeon_benchmark_do_move +ffffffff81ca0000 T radeon_get_bios +ffffffff81ca0fc0 t igp_read_bios_from_vram +ffffffff81ca10d0 t radeon_read_bios +ffffffff81ca2000 T radeon_legacy_get_engine_clock +ffffffff81ca20d0 T radeon_legacy_get_memory_clock +ffffffff81ca21a0 T radeon_get_clock_info +ffffffff81ca2730 T radeon_legacy_set_engine_clock +ffffffff81ca2a80 T radeon_legacy_set_clock_gating +ffffffff81ca4000 T radeon_combios_check_hardcoded_edid +ffffffff81ca4100 t combios_get_table_offset +ffffffff81ca4690 T radeon_bios_get_hardcoded_edid +ffffffff81ca4710 T radeon_combios_i2c_init +ffffffff81ca4db0 t combios_setup_i2c_bus +ffffffff81ca50a0 t radeon_combios_get_i2c_info_from_table +ffffffff81ca52f0 T radeon_combios_get_clock_info +ffffffff81ca54e0 T radeon_combios_sideport_present +ffffffff81ca5560 T radeon_combios_get_primary_dac_info +ffffffff81ca56b0 T radeon_combios_get_tv_info +ffffffff81ca57b0 T radeon_combios_get_tv_dac_info +ffffffff81ca5a40 T radeon_combios_get_lvds_info +ffffffff81ca60b0 T radeon_legacy_get_tmds_info_from_table +ffffffff81ca6180 T radeon_legacy_get_tmds_info_from_combios +ffffffff81ca6390 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81ca65c0 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81ca6900 T radeon_get_legacy_connector_info_from_table +ffffffff81ca8a70 T radeon_get_legacy_connector_info_from_bios +ffffffff81ca9660 T radeon_combios_get_power_modes +ffffffff81ca9d30 T radeon_external_tmds_setup +ffffffff81ca9e00 T radeon_combios_external_tmds_setup +ffffffff81caa380 T radeon_combios_asic_init +ffffffff81caa8d0 t combios_parse_mmio_table +ffffffff81caaaf0 t combios_parse_pll_table +ffffffff81caadc0 T radeon_combios_initialize_bios_scratch_regs +ffffffff81caae50 T radeon_combios_output_lock +ffffffff81caaeb0 T radeon_combios_connected_scratch_regs +ffffffff81cab210 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81cab2f0 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81cac000 T radeon_connector_hotplug +ffffffff81cac100 T radeon_get_monitor_bpc +ffffffff81cac550 T radeon_connector_edid +ffffffff81cac600 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81cac680 T radeon_connector_is_dp12_capable +ffffffff81cac720 T radeon_add_atom_connector +ffffffff81cad5d0 T radeon_add_legacy_connector +ffffffff81cadac0 t radeon_dp_detect +ffffffff81cade60 t radeon_dvi_force +ffffffff81cadeb0 t radeon_connector_set_property +ffffffff81cae6f0 t radeon_connector_unregister +ffffffff81cae750 t radeon_connector_destroy +ffffffff81cae7c0 t radeon_best_single_encoder +ffffffff81cae830 t radeon_connector_get_edid +ffffffff81cae990 t radeon_dp_get_modes +ffffffff81caec90 t radeon_dp_mode_valid +ffffffff81caee60 t radeon_dvi_encoder +ffffffff81caef20 t radeon_fixup_lvds_native_mode +ffffffff81caf060 t radeon_add_common_modes +ffffffff81caf150 t radeon_fp_native_mode +ffffffff81caf230 t radeon_lvds_set_property +ffffffff81caf320 t radeon_vga_detect +ffffffff81caf5c0 t radeon_connector_analog_encoder_conflict_solve +ffffffff81caf7e0 t radeon_vga_get_modes +ffffffff81caf8c0 t radeon_vga_mode_valid +ffffffff81caf920 t radeon_dvi_detect +ffffffff81caff80 t radeon_dvi_mode_valid +ffffffff81cb0100 t radeon_tv_detect +ffffffff81cb0340 t radeon_tv_get_modes +ffffffff81cb0420 t radeon_tv_mode_valid +ffffffff81cb0470 t radeon_lvds_detect +ffffffff81cb0610 t radeon_lvds_get_modes +ffffffff81cb0750 t radeon_lvds_mode_valid +ffffffff81cb1000 T radeon_cs_parser_init +ffffffff81cb1490 T radeon_cs_ioctl +ffffffff81cb1c70 t radeon_cs_parser_fini +ffffffff81cb1df0 t radeon_cs_ib_vm_chunk +ffffffff81cb2130 T radeon_cs_packet_parse +ffffffff81cb22e0 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81cb2340 T radeon_cs_dump_packet +ffffffff81cb23c0 T radeon_cs_packet_next_reloc +ffffffff81cb25a0 t cmp_size_smaller_first +ffffffff81cb3000 T radeon_crtc_cursor_move +ffffffff81cb3070 t radeon_lock_cursor +ffffffff81cb3230 t radeon_cursor_move_locked +ffffffff81cb3770 T radeon_crtc_cursor_set2 +ffffffff81cb3a00 t radeon_hide_cursor +ffffffff81cb3ac0 t radeon_bo_reserve +ffffffff81cb3c30 t radeon_bo_unreserve +ffffffff81cb3d10 t radeon_show_cursor +ffffffff81cb3f60 T radeon_cursor_reset +ffffffff81cb4000 T radeon_is_px +ffffffff81cb4040 T radeon_program_register_sequence +ffffffff81cb4170 T radeon_pci_config_reset +ffffffff81cb41a0 T radeon_surface_init +ffffffff81cb4360 T radeon_scratch_init +ffffffff81cb43e0 T radeon_scratch_get +ffffffff81cb4460 T radeon_scratch_free +ffffffff81cb44c0 T radeon_doorbell_get +ffffffff81cb4570 T radeon_doorbell_free +ffffffff81cb45c0 T radeon_wb_disable +ffffffff81cb45f0 T radeon_wb_fini +ffffffff81cb4690 t radeon_bo_reserve +ffffffff81cb4800 t radeon_bo_unreserve +ffffffff81cb48e0 T radeon_wb_init +ffffffff81cb4bc0 T radeon_vram_location +ffffffff81cb4ce0 T radeon_gtt_location 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+ffffffff81cb7fd0 T radeon_get_crtc_scanoutpos +ffffffff81cb85a0 T radeon_crtc_handle_flip +ffffffff81cb86d0 T radeon_compute_pll_avivo +ffffffff81cb8c30 T radeon_compute_pll_legacy +ffffffff81cb9300 T radeon_framebuffer_init +ffffffff81cb9380 T radeon_update_display_priority +ffffffff81cb93e0 T radeon_modeset_init +ffffffff81cb9ec0 T radeon_modeset_fini +ffffffff81cba010 T radeon_crtc_scaling_mode_fixup +ffffffff81cba390 T radeon_get_crtc_scanout_position +ffffffff81cba400 t radeon_user_framebuffer_create +ffffffff81cba5a0 t radeon_crtc_gamma_set +ffffffff81cba5e0 t radeon_crtc_destroy +ffffffff81cba620 t radeon_crtc_set_config +ffffffff81cba6f0 t radeon_crtc_page_flip_target +ffffffff81cbab90 t radeon_flip_work_func +ffffffff81cbadb0 t radeon_unpin_work_func +ffffffff81cbae30 t radeon_bo_reserve +ffffffff81cbafa0 t radeon_bo_unreserve +ffffffff81cbc000 T radeon_dp_aux_transfer_native +ffffffff81cbd000 T radeondrm_probe +ffffffff81cbd060 T radeondrm_attach_kms +ffffffff81cbd7a0 T radeondrm_detach_kms +ffffffff81cbd830 T radeondrm_activate_kms +ffffffff81cbd8f0 T radeondrm_wsioctl +ffffffff81cbd9b0 T radeondrm_wsmmap +ffffffff81cbd9e0 T radeondrm_alloc_screen +ffffffff81cbda10 T radeondrm_free_screen +ffffffff81cbda20 T radeondrm_show_screen +ffffffff81cbdb10 T radeondrm_enter_ddb +ffffffff81cbdb70 T radeondrm_doswitch +ffffffff81cbdc10 T radeondrm_setpal +ffffffff81cbde30 T radeondrm_attachhook +ffffffff81cbe160 T radeondrm_forcedetach +ffffffff81cbf000 T radeon_setup_encoder_clones +ffffffff81cbf0b0 T radeon_get_encoder_enum +ffffffff81cbf230 T radeon_link_encoder_connector +ffffffff81cbf380 T radeon_encoder_set_active_device +ffffffff81cbf440 T radeon_get_connector_for_encoder +ffffffff81cbf4b0 T radeon_get_connector_for_encoder_init +ffffffff81cbf520 T radeon_get_external_encoder +ffffffff81cbf5b0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81cbf650 T radeon_panel_mode_fixup +ffffffff81cbf820 T radeon_dig_monitor_is_duallink +ffffffff81cbf940 T radeon_encoder_is_digital +ffffffff81cc0000 T radeon_fbdev_setup +ffffffff81cc0150 T radeon_fbdev_set_suspend +ffffffff81cc01a0 T radeon_fbdev_robj_is_fb +ffffffff81cc0210 T radeondrm_burner +ffffffff81cc0290 T radeondrm_burner_cb +ffffffff81cc02c0 t radeon_fbdev_fb_helper_fb_probe +ffffffff81cc0800 t radeon_bo_reserve +ffffffff81cc0970 t radeon_bo_unreserve +ffffffff81cc0a50 t radeon_fbdev_client_unregister +ffffffff81cc0ab0 t radeon_fbdev_client_restore +ffffffff81cc0af0 t radeon_fbdev_client_hotplug +ffffffff81cc1000 T radeon_fence_emit +ffffffff81cc1120 T radeon_fence_process +ffffffff81cc11e0 t radeon_fence_activity +ffffffff81cc1450 T radeon_fence_signaled +ffffffff81cc14c0 t radeon_fence_seq_signaled +ffffffff81cc15b0 T radeon_fence_wait_timeout +ffffffff81cc16e0 t radeon_fence_wait_seq_timeout +ffffffff81cc1b50 T radeon_fence_wait +ffffffff81cc1c80 T radeon_fence_wait_any +ffffffff81cc1dc0 T radeon_fence_wait_next +ffffffff81cc1e80 T radeon_fence_wait_empty +ffffffff81cc1f90 T radeon_fence_ref +ffffffff81cc1fd0 T radeon_fence_unref +ffffffff81cc2010 T radeon_fence_count_emitted +ffffffff81cc2110 T radeon_fence_need_sync +ffffffff81cc2170 T radeon_fence_note_sync +ffffffff81cc2340 T radeon_fence_driver_start_ring +ffffffff81cc2520 T radeon_fence_driver_init +ffffffff81cc2660 T radeon_debugfs_fence_init +ffffffff81cc2690 T radeon_fence_driver_fini +ffffffff81cc28b0 T radeon_fence_driver_force_completion +ffffffff81cc29a0 t radeon_fence_get_driver_name +ffffffff81cc29d0 t radeon_fence_get_timeline_name +ffffffff81cc2a70 t radeon_fence_enable_signaling +ffffffff81cc2c80 t radeon_fence_is_signaled +ffffffff81cc2dc0 t radeon_fence_default_wait +ffffffff81cc2f20 t radeon_fence_any_seq_signaled +ffffffff81cc3060 t radeon_fence_check_lockup +ffffffff81cc32b0 t __delayed_work_tick +ffffffff81cc32d0 t radeon_fence_check_signaled +ffffffff81cc3370 t radeon_fence_wait_cb +ffffffff81cc4000 T radeon_gart_table_ram_alloc +ffffffff81cc40c0 T radeon_gart_table_ram_free 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radeon_gem_set_domain_ioctl +ffffffff81cc5990 T radeon_mode_dumb_mmap +ffffffff81cc5a40 T radeon_gem_mmap_ioctl +ffffffff81cc5b00 T radeon_gem_busy_ioctl +ffffffff81cc5bb0 T radeon_gem_wait_idle_ioctl +ffffffff81cc5cc0 T radeon_gem_set_tiling_ioctl +ffffffff81cc5d70 T radeon_gem_get_tiling_ioctl +ffffffff81cc5e40 t radeon_bo_reserve +ffffffff81cc6040 t radeon_bo_unreserve +ffffffff81cc6120 T radeon_gem_va_ioctl +ffffffff81cc63d0 t radeon_gem_va_update_vm +ffffffff81cc6520 T radeon_gem_op_ioctl +ffffffff81cc6620 T radeon_align_pitch +ffffffff81cc66b0 T radeon_mode_dumb_create +ffffffff81cc6800 T radeon_gem_debugfs_init +ffffffff81cc7000 T radeon_ddc_probe +ffffffff81cc70c0 T radeon_router_select_ddc_port +ffffffff81cc7320 T radeon_bb_set_bits +ffffffff81cc7490 T radeon_bb_set_dir +ffffffff81cc74c0 T radeon_bb_read_bits +ffffffff81cc75a0 T radeon_acquire_bus +ffffffff81cc79f0 T radeon_release_bus +ffffffff81cc7b60 T radeon_send_start +ffffffff81cc7b80 T radeon_send_stop +ffffffff81cc7ba0 T radeon_initiate_xfer +ffffffff81cc7bc0 T radeon_read_byte +ffffffff81cc7be0 T radeon_write_byte +ffffffff81cc7c00 T radeon_i2c_create +ffffffff81cc7e10 T radeon_i2c_destroy +ffffffff81cc7e90 T radeon_i2c_init +ffffffff81cc7ee0 T radeon_i2c_fini +ffffffff81cc7f90 T radeon_i2c_add +ffffffff81cc8140 T radeon_i2c_lookup +ffffffff81cc8310 T radeon_i2c_get_byte +ffffffff81cc83e0 T radeon_i2c_put_byte +ffffffff81cc8470 T radeon_router_select_cd_port +ffffffff81cc86d0 t radeon_hw_i2c_xfer +ffffffff81cc9270 t radeon_hw_i2c_func +ffffffff81cc92a0 t r100_hw_i2c_xfer +ffffffff81cc9960 t radeon_get_i2c_prescale +ffffffff81cca000 T radeon_ib_get +ffffffff81cca100 T radeon_ib_free +ffffffff81cca140 T radeon_ib_schedule +ffffffff81cca3d0 T radeon_ib_pool_init +ffffffff81cca470 T radeon_ib_pool_fini +ffffffff81cca4e0 T radeon_ib_ring_tests +ffffffff81ccb000 T radeon_driver_irq_handler_kms +ffffffff81ccb050 T radeon_msi_ok +ffffffff81ccb150 T radeon_irq_kms_init +ffffffff81ccb3e0 t radeon_hotplug_work_func +ffffffff81ccb490 t radeon_dp_work_func +ffffffff81ccb500 T radeon_irq_kms_fini +ffffffff81ccb6a0 T radeon_irq_kms_sw_irq_get +ffffffff81ccb740 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81ccb780 T radeon_irq_kms_sw_irq_put +ffffffff81ccb810 T radeon_irq_kms_pflip_irq_get +ffffffff81ccb8c0 T radeon_irq_kms_pflip_irq_put +ffffffff81ccb960 T radeon_irq_kms_enable_afmt +ffffffff81ccb9f0 T radeon_irq_kms_disable_afmt +ffffffff81ccba80 T radeon_irq_kms_enable_hpd +ffffffff81ccbb70 T radeon_irq_kms_disable_hpd +ffffffff81ccbc50 T radeon_irq_kms_set_irq_n_enabled +ffffffff81ccbdc0 t __delayed_work_tick +ffffffff81ccc000 T radeon_info_ioctl +ffffffff81cccaf0 t radeon_set_filp_rights +ffffffff81cccb80 T radeon_driver_open_kms +ffffffff81ccccb0 t radeon_bo_reserve +ffffffff81ccce20 T radeon_driver_postclose_kms +ffffffff81ccd040 T radeon_get_vblank_counter_kms +ffffffff81ccd1f0 T radeon_enable_vblank_kms +ffffffff81ccd2a0 T radeon_disable_vblank_kms +ffffffff81cce000 T radeon_crtc_set_base +ffffffff81cce020 T radeon_crtc_do_set_base +ffffffff81cce590 T radeon_crtc_set_base_atomic +ffffffff81cce5b0 t radeon_bo_reserve +ffffffff81cce720 t radeon_bo_unreserve +ffffffff81cce800 T radeon_legacy_init_crtc +ffffffff81cce850 t radeon_crtc_dpms +ffffffff81ccea40 t radeon_crtc_prepare +ffffffff81cceac0 t radeon_crtc_commit +ffffffff81cceb30 t radeon_crtc_mode_fixup +ffffffff81cceb50 t radeon_crtc_mode_set +ffffffff81ccffc0 t radeon_crtc_disable +ffffffff81cd1000 T radeon_legacy_get_backlight_level +ffffffff81cd1050 T radeon_legacy_set_backlight_level +ffffffff81cd10a0 t radeon_legacy_lvds_update +ffffffff81cd13e0 T radeon_legacy_backlight_init +ffffffff81cd15b0 t radeon_legacy_backlight_get_brightness +ffffffff81cd1610 T radeon_add_legacy_encoder +ffffffff81cd1970 t radeon_legacy_backlight_update_status +ffffffff81cd1a10 t radeon_lvds_enc_destroy +ffffffff81cd1aa0 t radeon_legacy_lvds_dpms +ffffffff81cd1af0 t radeon_legacy_mode_fixup +ffffffff81cd1b60 t radeon_legacy_lvds_prepare +ffffffff81cd1bf0 t radeon_legacy_lvds_commit +ffffffff81cd1c70 t radeon_legacy_lvds_mode_set +ffffffff81cd1e80 t radeon_legacy_encoder_disable +ffffffff81cd1ed0 t radeon_legacy_tmds_int_dpms +ffffffff81cd1f90 t radeon_legacy_tmds_int_prepare +ffffffff81cd2060 t radeon_legacy_tmds_int_commit +ffffffff81cd2130 t radeon_legacy_tmds_int_mode_set +ffffffff81cd2390 t radeon_legacy_primary_dac_dpms +ffffffff81cd24d0 t radeon_legacy_primary_dac_prepare +ffffffff81cd2530 t radeon_legacy_primary_dac_commit +ffffffff81cd2580 t radeon_legacy_primary_dac_mode_set +ffffffff81cd2710 t radeon_legacy_primary_dac_detect +ffffffff81cd2900 t radeon_legacy_tv_dac_dpms +ffffffff81cd2b10 t radeon_legacy_tv_dac_prepare +ffffffff81cd2b70 t radeon_legacy_tv_dac_commit +ffffffff81cd2bc0 t radeon_legacy_tv_dac_mode_set +ffffffff81cd2f60 t radeon_legacy_tv_dac_detect +ffffffff81cd3b60 t radeon_ext_tmds_enc_destroy +ffffffff81cd3bb0 t radeon_legacy_tmds_ext_dpms +ffffffff81cd3c80 t radeon_legacy_tmds_ext_prepare +ffffffff81cd3d50 t radeon_legacy_tmds_ext_commit +ffffffff81cd3e20 t radeon_legacy_tmds_ext_mode_set +ffffffff81cd4000 T radeon_legacy_tv_mode_set +ffffffff81cd50f0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81cd5200 T radeon_legacy_tv_adjust_pll1 +ffffffff81cd5300 T radeon_legacy_tv_adjust_pll2 +ffffffff81cd6000 T radeon_ttm_bo_is_radeon_bo +ffffffff81cd6040 t radeon_ttm_bo_destroy +ffffffff81cd6170 T radeon_ttm_placement_from_domain +ffffffff81cd62d0 T radeon_bo_create +ffffffff81cd64a0 T radeon_bo_kmap +ffffffff81cd6590 T radeon_bo_check_tiling +ffffffff81cd6670 T radeon_bo_kunmap +ffffffff81cd6700 T radeon_bo_ref +ffffffff81cd6740 T radeon_bo_unref +ffffffff81cd6790 T radeon_bo_pin_restricted +ffffffff81cd6ab0 T radeon_bo_pin +ffffffff81cd6ad0 T radeon_bo_unpin +ffffffff81cd6b40 T radeon_bo_evict_vram +ffffffff81cd6ba0 T radeon_bo_force_delete +ffffffff81cd6d00 T radeon_bo_init +ffffffff81cd6de0 T radeon_bo_fini +ffffffff81cd6e20 T radeon_bo_list_validate +ffffffff81cd7130 T radeon_bo_get_surface_reg +ffffffff81cd73b0 T radeon_bo_set_tiling_flags +ffffffff81cd76b0 T radeon_bo_get_tiling_flags +ffffffff81cd7700 T radeon_bo_move_notify +ffffffff81cd77d0 T radeon_bo_fault_reserve_notify +ffffffff81cd7a60 t ttm_bo_move_to_lru_tail_unlocked +ffffffff81cd7aa0 T radeon_bo_fence +ffffffff81cd8000 T radeon_pm_get_type_index +ffffffff81cd8080 T radeon_pm_acpi_event_handler +ffffffff81cd8160 t radeon_pm_update_profile +ffffffff81cd8280 t radeon_pm_set_clocks +ffffffff81cd8c40 T radeon_dpm_enable_uvd +ffffffff81cd8d00 T radeon_pm_compute_clocks +ffffffff81cd9710 T radeon_dpm_enable_vce +ffffffff81cd9780 T radeon_pm_suspend +ffffffff81cd9880 T radeon_pm_resume +ffffffff81cd9b70 T radeon_pm_init +ffffffff81cda280 T radeon_pm_late_init +ffffffff81cda340 T radeon_pm_fini +ffffffff81cda460 t radeon_dpm_thermal_work_handler +ffffffff81cda540 t radeon_dynpm_idle_work_handler +ffffffff81cda7c0 t __delayed_work_tick +ffffffff81cdb000 T radeon_gem_prime_get_sg_table +ffffffff81cdb030 T radeon_gem_prime_pin +ffffffff81cdb0c0 t radeon_bo_reserve +ffffffff81cdb230 t radeon_bo_unreserve +ffffffff81cdb310 T radeon_gem_prime_unpin +ffffffff81cdb390 T radeon_gem_prime_export +ffffffff81cdc000 T radeon_ring_supports_scratch_reg +ffffffff81cdc030 T radeon_ring_free_size +ffffffff81cdc0e0 T radeon_ring_lockup_update +ffffffff81cdc140 T radeon_ring_alloc +ffffffff81cdc2c0 T radeon_ring_lock +ffffffff81cdc340 T radeon_ring_commit +ffffffff81cdc440 T radeon_ring_unlock_commit +ffffffff81cdc470 T radeon_ring_undo +ffffffff81cdc4a0 T radeon_ring_unlock_undo +ffffffff81cdc4c0 T radeon_ring_test_lockup +ffffffff81cdc5e0 T radeon_ring_backup +ffffffff81cdc780 T radeon_ring_restore +ffffffff81cdc930 T radeon_ring_init +ffffffff81cdcb20 t radeon_bo_reserve +ffffffff81cdcc90 t radeon_bo_unreserve +ffffffff81cdcd70 T radeon_ring_fini +ffffffff81cdd000 T radeon_sa_bo_manager_init +ffffffff81cdd0d0 T radeon_sa_bo_manager_fini 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radeon_vce_resume +ffffffff81ce7be0 T radeon_vce_note_usage +ffffffff81ce7d00 T radeon_vce_free_handles +ffffffff81ce7dc0 T radeon_vce_get_destroy_msg +ffffffff81ce7ff0 T radeon_vce_get_create_msg +ffffffff81ce8340 T radeon_vce_cs_reloc +ffffffff81ce8440 T radeon_vce_cs_parse +ffffffff81ce8bb0 T radeon_vce_semaphore_emit +ffffffff81ce8d70 T radeon_vce_ib_execute +ffffffff81ce8f00 T radeon_vce_fence_emit +ffffffff81ce9130 T radeon_vce_ring_test +ffffffff81ce9280 T radeon_vce_ib_test +ffffffff81ce93a0 t __delayed_work_tick +ffffffff81cea000 T radeon_vm_manager_init +ffffffff81cea060 T radeon_vm_manager_fini +ffffffff81cea180 T radeon_vm_get_bos +ffffffff81cea2d0 T radeon_vm_grab_id +ffffffff81cea460 T radeon_vm_flush +ffffffff81cea5f0 T radeon_vm_fence +ffffffff81cea6a0 T radeon_vm_bo_find +ffffffff81cea6f0 T radeon_vm_bo_add +ffffffff81cea7e0 T radeon_vm_bo_set_addr +ffffffff81ceac30 t radeon_bo_unreserve +ffffffff81cead10 t radeon_vm_clear_bo +ffffffff81ceaf00 T radeon_vm_map_gart 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T rs400_suspend +ffffffff81cedd70 T rs400_fini +ffffffff81cede60 T rs400_init +ffffffff81cef000 T avivo_wait_for_vblank +ffffffff81cef280 T rs600_page_flip +ffffffff81cef550 T rs600_page_flip_pending +ffffffff81cef5c0 T avivo_program_fmt +ffffffff81cef6e0 T rs600_pm_misc +ffffffff81cefa20 T rs600_pm_prepare +ffffffff81cefb20 T rs600_pm_finish +ffffffff81cefc20 T rs600_hpd_sense +ffffffff81cefc80 T rs600_hpd_set_polarity +ffffffff81cefd40 T rs600_hpd_init +ffffffff81cefe20 T rs600_hpd_fini +ffffffff81cefed0 T rs600_asic_reset +ffffffff81cf0140 T rs600_gart_tlb_flush +ffffffff81cf0200 T rs600_gart_get_page_entry +ffffffff81cf0260 T rs600_gart_set_page +ffffffff81cf02a0 T rs600_irq_set +ffffffff81cf0480 T rs600_irq_disable +ffffffff81cf0500 t rs600_irq_ack +ffffffff81cf06b0 T rs600_irq_process +ffffffff81cf0a10 T rs600_get_vblank_counter +ffffffff81cf0a60 T rs600_mc_wait_for_idle +ffffffff81cf0b00 T rs600_bandwidth_update +ffffffff81cf0bf0 T rs600_mc_rreg +ffffffff81cf0c70 T rs600_mc_wreg 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rv6xx_dpm_get_current_mclk +ffffffff81d00770 T rv6xx_dpm_fini +ffffffff81d00800 T rv6xx_dpm_get_sclk +ffffffff81d00840 T rv6xx_dpm_get_mclk +ffffffff81d00880 T rv6xx_dpm_force_performance_level +ffffffff81d00a10 t rv6xx_generate_steps +ffffffff81d00d10 t rv6xx_output_stepping +ffffffff81d00e20 t rv6xx_program_mclk_stepping_entry +ffffffff81d01090 t rv6xx_program_engine_spread_spectrum +ffffffff81d01380 t rv6xx_step_sw_voltage +ffffffff81d02000 T rv730_populate_sclk_value +ffffffff81d02230 T rv730_populate_mclk_value +ffffffff81d02470 T rv730_read_clock_registers +ffffffff81d02590 T rv730_populate_smc_acpi_state +ffffffff81d02740 T rv730_populate_smc_initial_state +ffffffff81d02900 T rv730_program_memory_timing_parameters +ffffffff81d02ae0 T rv730_start_dpm +ffffffff81d02b70 T rv730_stop_dpm +ffffffff81d02c30 T rv730_program_dcodt +ffffffff81d02d00 T rv730_get_odt_values +ffffffff81d03000 T rv740_get_decoded_reference_divider +ffffffff81d030a0 T rv740_get_dll_speed +ffffffff81d032b0 T rv740_populate_sclk_value +ffffffff81d034b0 T rv740_populate_mclk_value +ffffffff81d03860 T rv740_read_clock_registers +ffffffff81d03990 T rv740_populate_smc_acpi_state +ffffffff81d03bc0 T rv740_enable_mclk_spread_spectrum +ffffffff81d03c10 T rv740_get_mclk_frequency_ratio +ffffffff81d04000 T rv770_set_uvd_clocks +ffffffff81d04570 T rv770_get_xclk +ffffffff81d045d0 T rv770_page_flip +ffffffff81d048d0 T rv770_page_flip_pending +ffffffff81d04940 T rv770_get_temp +ffffffff81d049a0 T rv770_pm_misc +ffffffff81d04a80 T r700_cp_stop +ffffffff81d04b00 T r700_cp_fini +ffffffff81d04b90 T rv770_set_clk_bypass_mode +ffffffff81d04cb0 T r700_vram_gtt_location +ffffffff81d04e40 T rv770_resume +ffffffff81d04ed0 t rv770_init_golden_registers +ffffffff81d05060 t rv770_startup +ffffffff81d06c00 T rv770_suspend +ffffffff81d06e20 T rv770_init +ffffffff81d07210 t rv770_pcie_gart_fini +ffffffff81d07390 T rv770_fini +ffffffff81d07630 t rv770_uvd_start +ffffffff81d076e0 t rv770_cp_load_microcode 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rv770_program_engine_speed_parameters +ffffffff81d09a10 T rv770_program_vc +ffffffff81d09a60 T rv770_clear_vc +ffffffff81d09aa0 T rv770_upload_firmware +ffffffff81d09ae0 T rv770_populate_initial_mvdd_value +ffffffff81d09b30 T rv770_get_memory_module_index +ffffffff81d09b70 T rv770_enable_voltage_control +ffffffff81d09bc0 T rv770_halt_smc +ffffffff81d09c20 T rv770_resume_smc +ffffffff81d09c70 T rv770_set_sw_state +ffffffff81d09cd0 T rv770_set_boot_state +ffffffff81d09d20 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81d09d90 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81d09e00 T rv770_restrict_performance_levels_before_switch +ffffffff81d09e60 T rv770_dpm_force_performance_level +ffffffff81d09f20 T r7xx_start_smc +ffffffff81d09f50 T r7xx_stop_smc +ffffffff81d09f80 T rv770_read_voltage_smio_registers +ffffffff81d09fc0 T rv770_reset_smio_status +ffffffff81d0a080 T rv770_get_memory_type +ffffffff81d0a0d0 T rv770_get_pcie_gen2_status +ffffffff81d0a140 T rv770_get_max_vddc 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rv770_copy_bytes_to_smc +ffffffff81d0e210 T rv770_start_smc +ffffffff81d0e260 T rv770_reset_smc +ffffffff81d0e2b0 T rv770_stop_smc_clock +ffffffff81d0e300 T rv770_start_smc_clock +ffffffff81d0e350 T rv770_is_smc_running +ffffffff81d0e390 T rv770_send_msg_to_smc +ffffffff81d0e470 T rv770_wait_for_smc_inactive +ffffffff81d0e510 T rv770_load_smc_ucode +ffffffff81d0e6a0 T rv770_read_smc_sram_dword +ffffffff81d0e760 T rv770_write_smc_sram_dword +ffffffff81d0f000 T si_get_allowed_info_register +ffffffff81d0f090 T si_get_xclk +ffffffff81d0f100 T si_get_temp +ffffffff81d0f150 T si_mc_load_microcode +ffffffff81d0f410 T dce6_bandwidth_update +ffffffff81d0f5d0 t dce6_line_buffer_adjust +ffffffff81d0f780 t dce6_program_watermarks +ffffffff81d10230 T si_fence_ring_emit +ffffffff81d10690 T si_ring_ib_execute +ffffffff81d10e00 T si_gpu_check_soft_reset +ffffffff81d10fa0 T si_asic_reset +ffffffff81d11320 t si_gpu_pci_config_reset +ffffffff81d11640 T si_gfx_is_lockup +ffffffff81d116b0 T si_vram_gtt_location +ffffffff81d11750 T si_pcie_gart_tlb_flush +ffffffff81d117a0 T si_ib_parse +ffffffff81d11e40 T si_vm_init +ffffffff81d11e80 T si_vm_fini +ffffffff81d11eb0 T si_vm_flush +ffffffff81d12550 T si_init_uvd_internal_cg +ffffffff81d125a0 T si_get_csb_size +ffffffff81d12630 T si_get_csb_buffer +ffffffff81d127b0 T si_rlc_reset +ffffffff81d12830 T si_irq_set +ffffffff81d12d20 t si_disable_interrupt_state +ffffffff81d12fa0 T si_irq_process +ffffffff81d142a0 t si_irq_ack +ffffffff81d14890 T si_resume +ffffffff81d14920 t si_init_golden_registers +ffffffff81d14ae0 t si_startup +ffffffff81d16f00 T si_suspend +ffffffff81d171f0 t si_fini_cg +ffffffff81d17290 T si_init +ffffffff81d185f0 t si_cp_fini +ffffffff81d186e0 t si_irq_fini +ffffffff81d187b0 t si_pcie_gart_fini +ffffffff81d188b0 T si_fini +ffffffff81d18ad0 T si_get_gpu_clock_counter +ffffffff81d18b90 T si_set_uvd_clocks +ffffffff81d190f0 T si_set_vce_clocks +ffffffff81d19630 t si_vce_send_vcepll_ctlreq +ffffffff81d19870 t dce6_latency_watermark +ffffffff81d19ab0 t si_rlc_stop +ffffffff81d19c60 t si_vm_reg_valid +ffffffff81d19dc0 t si_vm_packet3_cp_dma_check +ffffffff81d19f30 t si_uvd_start +ffffffff81d19fe0 t si_vce_start +ffffffff81d1a0f0 t si_irq_init +ffffffff81d1abd0 t si_cp_load_microcode +ffffffff81d1afb0 t si_cp_resume +ffffffff81d1be70 t si_uvd_resume +ffffffff81d1bf40 t si_vce_resume +ffffffff81d1c030 t pcie_capability_set_word +ffffffff81d1c140 t pcie_capability_read_word +ffffffff81d1c1e0 t pcie_capability_clear_and_set_word +ffffffff81d1c300 t pcie_capability_write_word +ffffffff81d1c3c0 t si_update_cg +ffffffff81d1c930 t si_enable_mgcg +ffffffff81d1cd50 t si_enable_cgcg +ffffffff81d1d0e0 t request_firmware +ffffffff81d1d170 t release_firmware +ffffffff81d1e000 T si_dma_is_lockup +ffffffff81d1e080 T si_dma_vm_copy_pages +ffffffff81d1e170 T si_dma_vm_write_pages +ffffffff81d1e2d0 T si_dma_vm_set_pages +ffffffff81d1e440 T si_dma_vm_flush +ffffffff81d1e8b0 T si_copy_dma +ffffffff81d1f000 T si_dpm_force_performance_level +ffffffff81d1f160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81d1f1c0 T si_get_mclk_frequency_ratio +ffffffff81d1f240 T si_trim_voltage_table_to_fit_state_table +ffffffff81d1f350 T si_dpm_setup_asic +ffffffff81d1f520 T si_fan_ctrl_get_fan_speed_percent +ffffffff81d1f5b0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81d1f670 T si_fan_ctrl_set_mode +ffffffff81d1f8c0 T si_fan_ctrl_get_mode +ffffffff81d1f910 T si_dpm_enable +ffffffff81d20c90 t si_init_smc_table +ffffffff81d21ea0 t si_init_smc_spll_table +ffffffff81d22020 t si_init_arb_table_index +ffffffff81d220b0 t si_populate_mc_reg_table +ffffffff81d22500 t si_initialize_smc_cac_tables +ffffffff81d24150 t si_initialize_hardware_cac_manager +ffffffff81d24200 t si_initialize_smc_dte_tables +ffffffff81d24400 t si_populate_smc_tdp_limits +ffffffff81d24600 t si_populate_smc_tdp_limits_2 +ffffffff81d246d0 t si_program_response_times +ffffffff81d247f0 t si_program_ds_registers +ffffffff81d24880 t si_dpm_start_smc +ffffffff81d248b0 t si_enable_auto_throttle_source +ffffffff81d24a40 t si_thermal_start_thermal_controller +ffffffff81d24f00 T si_dpm_late_enable +ffffffff81d25050 T si_dpm_disable +ffffffff81d253d0 t si_enable_power_containment +ffffffff81d254a0 t si_enable_smc_cac +ffffffff81d25600 T si_dpm_pre_set_power_state +ffffffff81d26170 T si_dpm_set_power_state +ffffffff81d266d0 t si_halt_smc +ffffffff81d26730 t si_upload_sw_state +ffffffff81d27130 t si_upload_smc_data +ffffffff81d27270 t si_upload_ulv_state +ffffffff81d273b0 t si_upload_mc_reg_table +ffffffff81d27550 t si_set_pcie_lane_width_in_smc +ffffffff81d275f0 t si_resume_smc +ffffffff81d27650 t si_set_vce_clock +ffffffff81d276f0 t si_notify_link_speed_change_after_state_change +ffffffff81d27820 t si_set_power_state_conditionally_enable_ulv +ffffffff81d27900 t si_power_control_set_level +ffffffff81d27a90 T si_dpm_post_set_power_state +ffffffff81d27ac0 T si_dpm_display_configuration_changed +ffffffff81d27ba0 T si_dpm_init +ffffffff81d295e0 T si_dpm_fini +ffffffff81d29690 T si_dpm_debugfs_print_current_performance_level +ffffffff81d296e0 T si_dpm_get_current_sclk +ffffffff81d29750 T si_dpm_get_current_mclk +ffffffff81d297c0 t si_do_program_memory_timing_parameters +ffffffff81d29950 t si_populate_mvdd_value +ffffffff81d299d0 t si_convert_power_level_to_smc +ffffffff81d2a280 t si_calculate_sclk_params +ffffffff81d2a4b0 t si_program_cac_config_registers +ffffffff81d2b000 T si_copy_bytes_to_smc +ffffffff81d2b240 T si_start_smc +ffffffff81d2b280 T si_reset_smc +ffffffff81d2b2c0 T si_program_jump_on_start +ffffffff81d2b2f0 T si_stop_smc_clock +ffffffff81d2b330 T si_start_smc_clock +ffffffff81d2b370 T si_is_smc_running +ffffffff81d2b3d0 T si_send_msg_to_smc +ffffffff81d2b4a0 T si_wait_for_smc_inactive +ffffffff81d2b540 T si_load_smc_ucode +ffffffff81d2b6e0 T si_read_smc_sram_dword +ffffffff81d2b7b0 T si_write_smc_sram_dword +ffffffff81d2c000 T sumo_get_pi +ffffffff81d2c030 T sumo_gfx_clockgating_initialize +ffffffff81d2c110 T sumo_program_vc +ffffffff81d2c150 T sumo_clear_vc +ffffffff81d2c190 T sumo_program_sstp +ffffffff81d2c210 T sumo_take_smu_control +ffffffff81d2c240 T sumo_get_sleep_divider_from_id +ffffffff81d2c270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d2c320 T sumo_dpm_enable +ffffffff81d2c9b0 T sumo_dpm_late_enable +ffffffff81d2cf70 T sumo_dpm_disable +ffffffff81d2d2c0 T sumo_dpm_pre_set_power_state +ffffffff81d2d7b0 T sumo_dpm_set_power_state +ffffffff81d2e260 T sumo_dpm_post_set_power_state +ffffffff81d2e300 T sumo_dpm_setup_asic +ffffffff81d2e400 T sumo_dpm_display_configuration_changed +ffffffff81d2e430 T sumo_convert_vid2_to_vid7 +ffffffff81d2e480 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d2e540 T sumo_construct_vid_mapping_table +ffffffff81d2e6b0 T sumo_dpm_init +ffffffff81d2ef80 T sumo_dpm_print_power_state +ffffffff81d2f0a0 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d2f0d0 T sumo_dpm_get_current_sclk +ffffffff81d2f140 T sumo_dpm_get_current_mclk +ffffffff81d2f170 T sumo_dpm_get_current_vddc +ffffffff81d2f240 T sumo_dpm_fini +ffffffff81d2f2d0 T sumo_dpm_get_sclk +ffffffff81d2f320 T sumo_dpm_get_mclk +ffffffff81d2f350 T sumo_dpm_force_performance_level +ffffffff81d2f740 t sumo_power_level_enable +ffffffff81d2f970 t sumo_program_power_level +ffffffff81d30000 T sumo_initialize_m3_arb +ffffffff81d302c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d30360 t sumo_send_msg_to_smu +ffffffff81d304f0 T sumo_smu_pg_init +ffffffff81d30510 T sumo_enable_boost_timer +ffffffff81d30640 T sumo_set_tdp_limit +ffffffff81d306c0 T sumo_boost_state_enable +ffffffff81d30710 T sumo_get_running_fw_version +ffffffff81d31000 T trinity_dpm_enable_bapm +ffffffff81d31080 T trinity_dpm_enable +ffffffff81d31520 T trinity_dpm_late_enable +ffffffff81d31a60 T trinity_dpm_disable +ffffffff81d31e50 T trinity_dpm_force_performance_level +ffffffff81d31f00 T trinity_dpm_pre_set_power_state +ffffffff81d324c0 T trinity_dpm_set_power_state +ffffffff81d32a30 T trinity_dpm_post_set_power_state +ffffffff81d32ad0 T trinity_dpm_setup_asic +ffffffff81d32b30 T trinity_dpm_display_configuration_changed +ffffffff81d32bc0 T trinity_dpm_init +ffffffff81d334b0 T trinity_dpm_print_power_state +ffffffff81d335c0 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d33650 T trinity_dpm_get_current_sclk +ffffffff81d336b0 T trinity_dpm_get_current_mclk +ffffffff81d336e0 T trinity_dpm_fini +ffffffff81d33780 T trinity_dpm_get_sclk +ffffffff81d337d0 T trinity_dpm_get_mclk +ffffffff81d33800 t trinity_program_power_level +ffffffff81d34000 T trinity_dpm_bapm_enable +ffffffff81d34150 T trinity_dpm_config +ffffffff81d34230 T trinity_dpm_force_state +ffffffff81d34310 T trinity_dpm_n_levels_disabled +ffffffff81d343f0 T trinity_uvd_dpm_config +ffffffff81d344c0 T trinity_dpm_no_forced_level +ffffffff81d34590 T trinity_dce_enable_voltage_adjustment +ffffffff81d346e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d347b0 T trinity_acquire_mutex +ffffffff81d34840 T trinity_release_mutex +ffffffff81d35000 T uvd_v1_0_get_rptr +ffffffff81d35040 T uvd_v1_0_get_wptr +ffffffff81d35080 T uvd_v1_0_set_wptr +ffffffff81d350c0 T uvd_v1_0_fence_emit +ffffffff81d354b0 T uvd_v1_0_resume +ffffffff81d35610 T uvd_v1_0_init +ffffffff81d35b90 T uvd_v1_0_start +ffffffff81d36310 T uvd_v1_0_fini +ffffffff81d36480 T uvd_v1_0_stop +ffffffff81d365f0 T uvd_v1_0_ring_test +ffffffff81d367c0 T uvd_v1_0_semaphore_emit +ffffffff81d367f0 T uvd_v1_0_ib_execute +ffffffff81d36980 T uvd_v1_0_ib_test +ffffffff81d37000 T uvd_v2_2_fence_emit +ffffffff81d37450 T uvd_v2_2_semaphore_emit +ffffffff81d37650 T uvd_v2_2_resume +ffffffff81d38000 T uvd_v3_1_semaphore_emit +ffffffff81d39000 T uvd_v4_2_resume +ffffffff81d3a000 T vce_v1_0_get_rptr +ffffffff81d3a090 T vce_v1_0_get_wptr +ffffffff81d3a120 T vce_v1_0_set_wptr +ffffffff81d3a1b0 T vce_v1_0_enable_mgcg +ffffffff81d3a470 T vce_v1_0_load_fw +ffffffff81d3a640 T vce_v1_0_bo_size +ffffffff81d3a6b0 T vce_v1_0_resume +ffffffff81d3b020 T vce_v1_0_start +ffffffff81d3b7e0 T vce_v1_0_init +ffffffff81d3c000 T vce_v2_0_enable_mgcg +ffffffff81d3c070 t vce_v2_0_set_dyn_cg +ffffffff81d3c260 T vce_v2_0_bo_size +ffffffff81d3c2d0 T vce_v2_0_resume +ffffffff81d3d000 T aldebaran_reset_init +ffffffff81d3d0c0 t aldebaran_async_reset +ffffffff81d3d120 t aldebaran_get_reset_handler +ffffffff81d3d1c0 T aldebaran_reset_fini +ffffffff81d3d220 t aldebaran_mode2_prepare_hwcontext +ffffffff81d3d340 t aldebaran_mode2_perform_reset +ffffffff81d3d500 t aldebaran_mode2_restore_hwcontext +ffffffff81d3d9e0 t aldebaran_mode2_reset +ffffffff81d3e000 T aldebaran_reg_base_init +ffffffff81d3f000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d3f040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d3f070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d3f180 T amdgpu_acpi_pcie_performance_request +ffffffff81d3f500 T amdgpu_acpi_power_shift_control +ffffffff81d3f640 T amdgpu_acpi_smart_shift_update +ffffffff81d3f6e0 T amdgpu_acpi_get_tmr_info +ffffffff81d3f770 T amdgpu_acpi_get_mem_info +ffffffff81d3f830 T amdgpu_acpi_init +ffffffff81d3f8e0 t amdgpu_acpi_event +ffffffff81d3fbf0 T amdgpu_acpi_get_backlight_caps +ffffffff81d3fc40 T amdgpu_acpi_fini +ffffffff81d3fc60 T amdgpu_acpi_should_gpu_reset +ffffffff81d3fcb0 T amdgpu_acpi_detect +ffffffff81d405f0 T amdgpu_acpi_release +ffffffff81d41000 T amdgpu_afmt_acr +ffffffff81d42000 T amdgpu_amdkfd_init +ffffffff81d42040 T amdgpu_amdkfd_fini +ffffffff81d42070 T amdgpu_amdkfd_device_probe +ffffffff81d420a0 T amdgpu_amdkfd_device_init +ffffffff81d42260 t amdgpu_amdkfd_reset_work +ffffffff81d422e0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d42330 T amdgpu_amdkfd_interrupt +ffffffff81d42360 T amdgpu_amdkfd_suspend +ffffffff81d42390 T amdgpu_amdkfd_resume +ffffffff81d423c0 T amdgpu_amdkfd_pre_reset +ffffffff81d423f0 T amdgpu_amdkfd_post_reset +ffffffff81d42420 T amdgpu_amdkfd_gpu_reset +ffffffff81d42480 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d42730 t amdgpu_bo_reserve +ffffffff81d42890 t amdgpu_bo_unreserve +ffffffff81d42970 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d429e0 T amdgpu_amdkfd_alloc_gws +ffffffff81d42ac0 T amdgpu_amdkfd_free_gws +ffffffff81d42b00 T amdgpu_amdkfd_get_fw_version +ffffffff81d42bb0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d42d50 T amdgpu_amdkfd_xcp_memory_size +ffffffff81d42df0 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d42e30 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d42e90 T amdgpu_amdkfd_get_cu_info +ffffffff81d42fa0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d430f0 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d43160 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d431f0 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d43350 T amdgpu_amdkfd_submit_ib +ffffffff81d434b0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d43500 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d43540 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d43670 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d436b0 T amdgpu_amdkfd_have_atomics_support +ffffffff81d436e0 T amdgpu_amdkfd_debug_mem_fence +ffffffff81d43700 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d43710 T amdgpu_amdkfd_send_close_event_drain_irq +ffffffff81d43730 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d43780 T amdgpu_amdkfd_check_and_lock_kfd +ffffffff81d437b0 T amdgpu_amdkfd_unlock_kfd +ffffffff81d437e0 T amdgpu_amdkfd_unmap_hiq +ffffffff81d44000 T amdgpu_atom_execute_table +ffffffff81d440a0 t amdgpu_atom_execute_table_locked +ffffffff81d443c0 T amdgpu_atom_parse +ffffffff81d44910 T amdgpu_atom_destroy +ffffffff81d44950 T amdgpu_atom_asic_init +ffffffff81d44a70 t get_u32 +ffffffff81d44ad0 T amdgpu_atom_parse_data_header +ffffffff81d44b70 T amdgpu_atom_parse_cmd_header +ffffffff81d44bf0 t atom_op_move +ffffffff81d44dc0 t atom_op_and +ffffffff81d44fa0 t atom_op_or +ffffffff81d45180 t atom_op_shift_left +ffffffff81d45360 t atom_op_shift_right +ffffffff81d45540 t atom_op_mul +ffffffff81d45690 t atom_op_div +ffffffff81d45800 t atom_op_add +ffffffff81d459e0 t atom_op_sub +ffffffff81d45bc0 t atom_op_setport +ffffffff81d45d40 t atom_op_setregblock +ffffffff81d45e00 t atom_op_setfbbase +ffffffff81d45ec0 t atom_op_compare +ffffffff81d460a0 t atom_op_switch +ffffffff81d462d0 t atom_op_jump +ffffffff81d46540 t atom_op_test +ffffffff81d46700 t atom_op_delay +ffffffff81d467e0 t atom_op_calltable +ffffffff81d46930 t atom_op_repeat +ffffffff81d46960 t atom_op_clear +ffffffff81d46a70 t atom_op_nop +ffffffff81d46aa0 t atom_op_eot +ffffffff81d46ad0 t atom_op_mask +ffffffff81d46d80 t atom_op_postcard +ffffffff81d46e30 t atom_op_beep +ffffffff81d46e50 t atom_op_savereg +ffffffff81d46e80 t atom_op_restorereg +ffffffff81d46eb0 t atom_op_setdatablock +ffffffff81d46ff0 t atom_op_xor +ffffffff81d471d0 t atom_op_shl +ffffffff81d473f0 t atom_op_shr +ffffffff81d47610 t atom_op_debug +ffffffff81d476c0 t atom_op_processds +ffffffff81d47780 t atom_op_mul32 +ffffffff81d478e0 t atom_op_div32 +ffffffff81d47a70 t atom_put_dst +ffffffff81d47f80 t atom_get_src_int +ffffffff81d48600 t atom_iio_execute +ffffffff81d49000 T amdgpu_atombios_lookup_i2c_gpio +ffffffff81d49260 T amdgpu_atombios_i2c_init +ffffffff81d49520 T amdgpu_atombios_lookup_gpio +ffffffff81d49620 T amdgpu_atombios_has_dce_engine_info +ffffffff81d496a0 T amdgpu_atombios_get_connector_info_from_object_table +ffffffff81d49f00 T amdgpu_atombios_get_clock_info +ffffffff81d4a240 T amdgpu_atombios_get_gfx_info +ffffffff81d4a300 T amdgpu_atombios_get_vram_width +ffffffff81d4a390 T amdgpu_atombios_get_asic_ss_info +ffffffff81d4a670 t amdgpu_atombios_get_igp_ss_overrides +ffffffff81d4a790 T amdgpu_atombios_get_clock_dividers +ffffffff81d4a9b0 T amdgpu_atombios_has_gpu_virtualization_table +ffffffff81d4aa00 T amdgpu_atombios_scratch_regs_lock +ffffffff81d4aa60 T amdgpu_atombios_scratch_regs_engine_hung +ffffffff81d4aab0 T amdgpu_atombios_scratch_regs_set_backlight_level +ffffffff81d4ab10 T amdgpu_atombios_scratch_need_asic_init +ffffffff81d4ab60 T amdgpu_atombios_copy_swap +ffffffff81d4ab80 T amdgpu_atombios_sysfs_init +ffffffff81d4abb0 T amdgpu_atombios_fini +ffffffff81d4ac60 T amdgpu_atombios_init +ffffffff81d4af00 t cail_reg_read +ffffffff81d4af20 t cail_reg_write +ffffffff81d4af40 t cail_mc_read +ffffffff81d4af70 t cail_mc_write +ffffffff81d4afa0 t cail_pll_read +ffffffff81d4afd0 t cail_pll_write +ffffffff81d4b000 T amdgpu_atombios_get_data_table +ffffffff81d4c000 T amdgpu_atombios_crtc_overscan_setup +ffffffff81d4c150 T amdgpu_atombios_crtc_scaler_setup +ffffffff81d4c1d0 T amdgpu_atombios_crtc_lock +ffffffff81d4c230 T amdgpu_atombios_crtc_enable +ffffffff81d4c290 T amdgpu_atombios_crtc_blank +ffffffff81d4c2f0 T amdgpu_atombios_crtc_powergate +ffffffff81d4c360 T amdgpu_atombios_crtc_powergate_init +ffffffff81d4c3d0 T amdgpu_atombios_crtc_set_dtd_timing +ffffffff81d4c500 T amdgpu_atombios_crtc_set_disp_eng_pll +ffffffff81d4c5f0 T amdgpu_atombios_crtc_set_dce_clock +ffffffff81d4c6e0 T amdgpu_atombios_crtc_program_pll +ffffffff81d4ca00 T amdgpu_atombios_crtc_prepare_pll +ffffffff81d4cf00 T amdgpu_atombios_crtc_set_pll +ffffffff81d4e000 T amdgpu_atombios_dp_aux_init +ffffffff81d4e090 t amdgpu_atombios_dp_aux_transfer +ffffffff81d4e200 T amdgpu_atombios_dp_get_sinktype +ffffffff81d4e270 T amdgpu_atombios_dp_get_dpcd +ffffffff81d4e420 T amdgpu_atombios_dp_get_panel_mode +ffffffff81d4e510 T amdgpu_atombios_dp_set_link_config +ffffffff81d4e590 t amdgpu_atombios_dp_get_dp_link_config +ffffffff81d4e720 T amdgpu_atombios_dp_mode_valid_helper +ffffffff81d4e7a0 T amdgpu_atombios_dp_needs_link_train +ffffffff81d4e810 T amdgpu_atombios_dp_set_rx_power_state +ffffffff81d4e890 T amdgpu_atombios_dp_link_train +ffffffff81d4edf0 t amdgpu_atombios_dp_process_aux_ch +ffffffff81d4ef50 t amdgpu_atombios_dp_get_adjust_train +ffffffff81d50000 T amdgpu_atombios_encoder_get_backlight_level_from_reg +ffffffff81d50050 T amdgpu_atombios_encoder_set_backlight_level_to_reg +ffffffff81d500a0 T amdgpu_atombios_encoder_get_backlight_level +ffffffff81d50100 T amdgpu_atombios_encoder_set_backlight_level +ffffffff81d50210 T amdgpu_atombios_encoder_setup_dig_transmitter +ffffffff81d50c30 T amdgpu_atombios_encoder_init_backlight +ffffffff81d50dd0 t amdgpu_atombios_encoder_get_backlight_brightness +ffffffff81d50e30 T amdgpu_atombios_encoder_fini_backlight +ffffffff81d50ec0 T amdgpu_atombios_encoder_is_digital +ffffffff81d50f10 T amdgpu_atombios_encoder_mode_fixup +ffffffff81d50ff0 T amdgpu_atombios_encoder_get_encoder_mode +ffffffff81d51190 T amdgpu_atombios_encoder_setup_dig_encoder +ffffffff81d51670 t amdgpu_atombios_encoder_get_bpc +ffffffff81d516c0 T amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81d517c0 T amdgpu_atombios_encoder_dpms +ffffffff81d51930 t amdgpu_atombios_encoder_setup_dig +ffffffff81d51ce0 t amdgpu_atombios_encoder_setup_dvo +ffffffff81d51e90 T amdgpu_atombios_encoder_set_crtc_source +ffffffff81d52270 T amdgpu_atombios_encoder_init_dig +ffffffff81d52340 t amdgpu_atombios_encoder_setup_external_encoder +ffffffff81d525b0 T amdgpu_atombios_encoder_dac_detect +ffffffff81d52770 T amdgpu_atombios_encoder_dig_detect +ffffffff81d52870 T amdgpu_atombios_encoder_setup_ext_encoder_ddc +ffffffff81d528c0 T amdgpu_atombios_encoder_set_bios_scratch_regs +ffffffff81d52e10 T amdgpu_atombios_encoder_get_lcd_info +ffffffff81d53170 T amdgpu_atombios_encoder_get_dig_info +ffffffff81d531e0 t amdgpu_atombios_encoder_update_backlight_status +ffffffff81d54000 T amdgpu_atombios_i2c_xfer +ffffffff81d54370 T amdgpu_atombios_i2c_func +ffffffff81d543a0 T amdgpu_atombios_i2c_channel_trans +ffffffff81d55000 T amdgpu_atomfirmware_query_firmware_capability +ffffffff81d550a0 T amdgpu_atomfirmware_gpu_virtualization_supported +ffffffff81d550e0 T amdgpu_atomfirmware_scratch_regs_init +ffffffff81d55160 T amdgpu_atomfirmware_allocate_fb_scratch +ffffffff81d55360 T amdgpu_atomfirmware_get_vram_info +ffffffff81d55800 t convert_atom_mem_type_to_vram_type +ffffffff81d55880 T amdgpu_atomfirmware_mem_ecc_supported +ffffffff81d55950 T amdgpu_atomfirmware_sram_ecc_supported +ffffffff81d55990 T amdgpu_atomfirmware_dynamic_boot_config_supported +ffffffff81d559d0 T amdgpu_atomfirmware_ras_rom_addr +ffffffff81d55a80 T amdgpu_atomfirmware_get_clock_info +ffffffff81d55cd0 T amdgpu_atomfirmware_get_gfx_info +ffffffff81d55e50 T amdgpu_atomfirmware_mem_training_supported +ffffffff81d55e90 T amdgpu_atomfirmware_get_fw_reserved_fb_size +ffffffff81d55f20 T amdgpu_atomfirmware_asic_init +ffffffff81d57000 T amdgpu_benchmark +ffffffff81d57790 t amdgpu_benchmark_move +ffffffff81d58000 T amdgpu_read_bios +ffffffff81d58190 t check_atom_bios +ffffffff81d582a0 T amdgpu_get_bios +ffffffff81d587c0 t igp_read_bios_from_vram +ffffffff81d58900 t amdgpu_read_platform_bios +ffffffff81d589d0 T amdgpu_soc15_read_bios_from_rom +ffffffff81d59000 T amdgpu_bo_list_create +ffffffff81d59270 t amdgpu_bo_list_entry_cmp +ffffffff81d592b0 T amdgpu_bo_list_get +ffffffff81d59320 T amdgpu_bo_list_put +ffffffff81d593d0 T amdgpu_bo_create_list_entry_array +ffffffff81d59520 T amdgpu_bo_list_ioctl +ffffffff81d5a000 T amdgpu_cgs_create_device +ffffffff81d5a080 T amdgpu_cgs_destroy_device +ffffffff81d5a0a0 t amdgpu_cgs_read_register +ffffffff81d5a0c0 t amdgpu_cgs_write_register +ffffffff81d5a0e0 t amdgpu_cgs_read_ind_register +ffffffff81d5a1c0 t amdgpu_cgs_write_ind_register +ffffffff81d5a270 t amdgpu_cgs_get_firmware_info +ffffffff81d5b000 T amdgpu_connector_hotplug +ffffffff81d5b110 T amdgpu_connector_get_monitor_bpc +ffffffff81d5b3a0 T amdgpu_connector_edid +ffffffff81d5b450 T amdgpu_connector_encoder_get_dp_bridge_encoder_id +ffffffff81d5b4d0 T amdgpu_connector_is_dp12_capable +ffffffff81d5b560 T amdgpu_connector_add +ffffffff81d5c150 t amdgpu_connector_dp_detect +ffffffff81d5c4a0 t amdgpu_connector_dvi_force +ffffffff81d5c4f0 t amdgpu_connector_set_property +ffffffff81d5ca60 t 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psp_xgmi_get_node_id +ffffffff81da4f30 T psp_xgmi_get_topology_info +ffffffff81da5340 T psp_xgmi_set_topology_info +ffffffff81da5480 T psp_ras_invoke +ffffffff81da5710 T psp_ras_enable_features +ffffffff81da57c0 T psp_ras_terminate +ffffffff81da5890 T psp_ras_initialize +ffffffff81da5cc0 T psp_ras_trigger_error +ffffffff81da5e00 T psp_hdcp_invoke +ffffffff81da5ec0 T psp_dtm_invoke +ffffffff81da5f80 T psp_rap_invoke +ffffffff81da6110 T psp_securedisplay_invoke +ffffffff81da61e0 T amdgpu_psp_wait_for_bootloader +ffffffff81da6240 T psp_execute_ip_fw_load +ffffffff81da6330 T psp_load_fw_list +ffffffff81da63c0 t psp_print_fw_hdr +ffffffff81da6490 T psp_gpu_reset +ffffffff81da6520 T psp_rlc_autoload_start +ffffffff81da65b0 T psp_ring_cmd_submit +ffffffff81da6740 T psp_init_asd_microcode +ffffffff81da6810 T psp_init_toc_microcode +ffffffff81da68e0 T psp_init_sos_microcode +ffffffff81da6ef0 T psp_init_ta_microcode +ffffffff81da72f0 T psp_init_cap_microcode +ffffffff81da7490 T is_psp_fw_valid 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dce_v11_0_set_pageflip_irq_state +ffffffff81df3c60 t dce_v11_0_pageflip_irq +ffffffff81df3dc0 t dce_v11_0_set_hpd_irq_state +ffffffff81df3e90 t dce_v11_0_hpd_irq +ffffffff81df3fc0 t dce_v11_0_afmt_init +ffffffff81df40d0 t dce_v11_0_audio_init +ffffffff81df41d0 t INIT_DELAYED_WORK +ffffffff81df4210 t dce_v11_0_crtc_cursor_set2 +ffffffff81df44d0 t dce_v11_0_crtc_cursor_move +ffffffff81df45a0 t dce_v11_0_crtc_gamma_set +ffffffff81df45e0 t dce_v11_0_crtc_destroy +ffffffff81df4610 t amdgpu_bo_reserve +ffffffff81df4810 t amdgpu_bo_unreserve +ffffffff81df48f0 t dce_v11_0_lock_cursor +ffffffff81df4950 t dce_v11_0_cursor_move_locked +ffffffff81df4ab0 t dce_v11_0_show_cursor +ffffffff81df4b50 t dce_v11_0_crtc_load_lut +ffffffff81df4eb0 t dce_v11_0_crtc_dpms +ffffffff81df5090 t dce_v11_0_crtc_prepare +ffffffff81df50d0 t dce_v11_0_crtc_commit +ffffffff81df5100 t dce_v11_0_crtc_mode_fixup +ffffffff81df5370 t dce_v11_0_crtc_mode_set +ffffffff81df55d0 t dce_v11_0_crtc_set_base +ffffffff81df55f0 t dce_v11_0_crtc_set_base_atomic +ffffffff81df5610 t dce_v11_0_crtc_disable +ffffffff81df57b0 t dce_v11_0_crtc_do_set_base +ffffffff81df5eb0 t __delayed_work_tick +ffffffff81df6000 t df_v1_7_sw_init +ffffffff81df6040 t df_v1_7_sw_fini +ffffffff81df6070 t df_v1_7_enable_broadcast_mode +ffffffff81df61a0 t df_v1_7_get_fb_channel_number +ffffffff81df6230 t df_v1_7_get_hbm_channel_number +ffffffff81df6280 t df_v1_7_update_medium_grain_clock_gating +ffffffff81df6400 t df_v1_7_get_clockgating_state +ffffffff81df6490 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81df7000 t df_v3_6_sw_init +ffffffff81df7150 t df_v3_6_sw_fini +ffffffff81df7180 t df_v3_6_enable_broadcast_mode +ffffffff81df72b0 t df_v3_6_get_fb_channel_number +ffffffff81df7390 t df_v3_6_get_hbm_channel_number +ffffffff81df73e0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81df7580 t df_v3_6_get_clockgating_state +ffffffff81df7610 t df_v3_6_pmc_start +ffffffff81df7910 t df_v3_6_pmc_stop +ffffffff81df7bb0 t df_v3_6_pmc_get_count +ffffffff81df7d40 t df_v3_6_get_fica +ffffffff81df7e30 t df_v3_6_set_fica +ffffffff81df7f10 t df_v3_6_query_ras_poison_mode +ffffffff81df9000 t df_v4_3_query_ras_poison_mode +ffffffff81dfa000 T dimgrey_cavefish_reg_base_init +ffffffff81dfb000 T emu_soc_asic_init +ffffffff81dfc000 t gfx_v10_0_early_init +ffffffff81dfc820 t gfx_v10_0_late_init +ffffffff81dfc890 t gfx_v10_0_sw_init +ffffffff81dfcda0 t gfx_v10_0_sw_fini +ffffffff81dfcfc0 t gfx_v10_0_hw_init +ffffffff81dffd20 t gfx_v10_0_hw_fini +ffffffff81dffe00 t gfx_v10_0_suspend +ffffffff81dffe40 t gfx_v10_0_resume +ffffffff81dffe50 t gfx_v10_0_is_idle +ffffffff81dffee0 t gfx_v10_0_wait_for_idle +ffffffff81dfffe0 t gfx_v10_0_soft_reset +ffffffff81e00340 t gfx_v10_0_set_clockgating_state +ffffffff81e005f0 t gfx_v10_0_set_powergating_state +ffffffff81e006b0 t gfx_v10_0_get_clockgating_state +ffffffff81e007c0 t gfx_v10_0_get_gpu_clock_counter +ffffffff81e00cd0 t gfx_v10_0_select_se_sh +ffffffff81e00d70 t gfx_v10_0_read_wave_data +ffffffff81e00fd0 t gfx_v10_0_read_wave_vgprs +ffffffff81e01000 t gfx_v10_0_read_wave_sgprs +ffffffff81e01080 t gfx_v10_0_select_me_pipe_q +ffffffff81e010a0 t gfx_v10_0_init_spm_golden_registers +ffffffff81e01110 t gfx_v10_0_update_perfmon_mgcg +ffffffff81e01240 t wave_read_ind +ffffffff81e01330 t wave_read_regs +ffffffff81e01490 t gfx10_kiq_set_resources +ffffffff81e017b0 t gfx10_kiq_map_queues +ffffffff81e01b40 t gfx10_kiq_unmap_queues +ffffffff81e01f40 t gfx10_kiq_query_status +ffffffff81e02230 t gfx10_kiq_invalidate_tlbs +ffffffff81e02350 t gfx_v10_0_ring_get_rptr_compute +ffffffff81e02380 t gfx_v10_0_ring_get_wptr_compute +ffffffff81e023f0 t gfx_v10_0_ring_set_wptr_compute +ffffffff81e02530 t gfx_v10_0_ring_emit_ib_compute +ffffffff81e02870 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81e02ca0 t gfx_v10_0_ring_test_ring +ffffffff81e02f00 t gfx_v10_0_ring_test_ib +ffffffff81e03190 t gfx_v10_0_ring_emit_rreg +ffffffff81e03420 t gfx_v10_0_ring_emit_wreg +ffffffff81e03650 t gfx_v10_0_ring_emit_reg_wait +ffffffff81e036a0 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81e03730 t gfx_v10_0_wait_reg_mem +ffffffff81e03a60 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81e03a90 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81e03ba0 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81e03db0 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81e04430 t gfx_v10_0_ring_emit_fence +ffffffff81e04810 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81e04870 t gfx_v10_0_ring_emit_vm_flush +ffffffff81e04a40 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81e04b10 t gfx_v10_0_ring_emit_gds_switch +ffffffff81e04bf0 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81e04e20 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81e04ee0 t gfx_v10_0_ring_emit_sb +ffffffff81e04fd0 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81e054c0 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81e055d0 t gfx_v10_0_ring_soft_recovery +ffffffff81e05640 t gfx_v10_0_ring_preempt_ib +ffffffff81e057b0 t gfx_v10_0_emit_mem_sync +ffffffff81e05ae0 t gfx_v10_0_write_data_to_reg +ffffffff81e05cf0 t gfx_v10_0_set_eop_interrupt_state +ffffffff81e05dd0 t gfx_v10_0_eop_irq +ffffffff81e05f80 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81e06120 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81e062e0 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81e065d0 t gfx_v10_0_kiq_irq +ffffffff81e06650 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81e06790 t gfx_v10_0_priv_reg_irq +ffffffff81e067f0 t gfx_v10_0_handle_priv_fault +ffffffff81e06950 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81e06a90 t gfx_v10_0_priv_inst_irq +ffffffff81e06af0 t gfx_v10_0_is_rlc_enabled +ffffffff81e06b80 t gfx_v10_0_set_safe_mode +ffffffff81e06e30 t gfx_v10_0_unset_safe_mode +ffffffff81e06ee0 t gfx_v10_0_rlc_init +ffffffff81e06f00 t gfx_v10_0_get_csb_size +ffffffff81e06f30 t gfx_v10_0_get_csb_buffer +ffffffff81e070a0 t gfx_v10_0_rlc_resume +ffffffff81e07b10 t gfx_v10_0_rlc_stop +ffffffff81e07bf0 t gfx_v10_0_rlc_reset +ffffffff81e07da0 t gfx_v10_0_rlc_start +ffffffff81e07f50 t gfx_v10_0_update_spm_vmid +ffffffff81e07f90 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81e088b0 t gfx_v10_0_init_csb +ffffffff81e08b90 t gfx_v10_0_update_spm_vmid_internal +ffffffff81e08cb0 t gfx_v10_0_rlc_backdoor_autoload_config_mec_cache +ffffffff81e08f80 t gfx_v10_0_is_rlcg_access_range +ffffffff81e08fb0 t gfx_v10_0_gfx_mqd_init +ffffffff81e093a0 t gfx_v10_0_compute_mqd_init +ffffffff81e09850 t gfx_v10_0_mec_init +ffffffff81e09a60 t gfx_v10_0_compute_ring_init +ffffffff81e09ba0 t gfx_v10_0_rlc_backdoor_autoload_buffer_init +ffffffff81e09e00 t gfx_v10_0_gpu_early_init +ffffffff81e0a060 t amdgpu_bo_unreserve +ffffffff81e0a140 t gfx_v10_0_cp_resume +ffffffff81e0cb20 t gfx_v10_3_get_disabled_sa +ffffffff81e0cc40 t gfx_v10_0_get_rb_active_bitmap +ffffffff81e0cd70 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81e0ce80 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81e0cf90 t gfx_v10_0_cp_gfx_enable +ffffffff81e0d200 t gfx_v10_0_cp_compute_enable +ffffffff81e0d3a0 t amdgpu_bo_reserve +ffffffff81e0d510 t gfx_v10_0_kiq_init_register +ffffffff81e0e3b0 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81e0e4b0 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81e0e790 t gfx_v10_0_cp_gfx_start +ffffffff81e0f180 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81e0f4d0 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81e0fc10 t gfx_v10_0_update_3d_clock_gating +ffffffff81e10000 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81e103e0 t gfx_v10_cntl_pg +ffffffff81e11000 t gfx_v11_0_early_init +ffffffff81e11750 t gfx_v11_0_late_init +ffffffff81e117c0 t gfx_v11_0_sw_init +ffffffff81e11d00 t gfx_v11_0_sw_fini +ffffffff81e11f10 t gfx_v11_0_hw_init +ffffffff81e16310 t gfx_v11_0_hw_fini +ffffffff81e16410 t gfx_v11_0_suspend +ffffffff81e16450 t gfx_v11_0_resume +ffffffff81e16460 t gfx_v11_0_is_idle +ffffffff81e164f0 t gfx_v11_0_wait_for_idle +ffffffff81e165f0 t gfx_v11_0_check_soft_reset +ffffffff81e16720 t gfx_v11_0_soft_reset +ffffffff81e17460 t gfx_v11_0_post_soft_reset +ffffffff81e17470 t gfx_v11_0_set_clockgating_state +ffffffff81e180b0 t gfx_v11_0_set_powergating_state +ffffffff81e18150 t gfx_v11_0_get_clockgating_state +ffffffff81e18320 t gfx_v11_0_get_gpu_clock_counter +ffffffff81e186a0 t gfx_v11_0_select_se_sh +ffffffff81e18740 t gfx_v11_0_read_wave_data +ffffffff81e18980 t gfx_v11_0_read_wave_vgprs +ffffffff81e189b0 t gfx_v11_0_read_wave_sgprs +ffffffff81e18a30 t gfx_v11_0_select_me_pipe_q +ffffffff81e18a50 t gfx_v11_0_update_perf_clk +ffffffff81e18b80 t gfx_v11_0_get_gfx_shadow_info +ffffffff81e18bf0 t wave_read_ind +ffffffff81e18ce0 t wave_read_regs +ffffffff81e18e40 t gfx11_kiq_set_resources +ffffffff81e19160 t gfx11_kiq_map_queues +ffffffff81e194f0 t gfx11_kiq_unmap_queues +ffffffff81e198f0 t gfx11_kiq_query_status +ffffffff81e19be0 t gfx11_kiq_invalidate_tlbs +ffffffff81e19d00 t gfx_v11_0_ring_get_rptr_compute +ffffffff81e19d30 t gfx_v11_0_ring_get_wptr_compute +ffffffff81e19da0 t gfx_v11_0_ring_set_wptr_compute +ffffffff81e19ee0 t gfx_v11_0_ring_emit_ib_compute +ffffffff81e1a220 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81e1a650 t gfx_v11_0_ring_test_ring +ffffffff81e1a8d0 t gfx_v11_0_ring_test_ib +ffffffff81e1ab70 t gfx_v11_0_ring_emit_rreg +ffffffff81e1ae00 t gfx_v11_0_ring_emit_wreg +ffffffff81e1b030 t gfx_v11_0_ring_emit_reg_wait +ffffffff81e1b080 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81e1b0f0 t gfx_v11_0_wait_reg_mem +ffffffff81e1b420 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81e1b450 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81e1b560 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81e1b780 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81e1be10 t gfx_v11_0_ring_emit_fence +ffffffff81e1c1e0 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81e1c240 t gfx_v11_0_ring_emit_vm_flush +ffffffff81e1c410 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81e1c4e0 t gfx_v11_0_ring_emit_gds_switch +ffffffff81e1c5c0 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81e1c7f0 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81e1c8b0 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81e1ca10 t gfx_v11_0_ring_emit_gfx_shadow +ffffffff81e1cdd0 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81e1cee0 t gfx_v11_0_ring_soft_recovery +ffffffff81e1cf50 t gfx_v11_0_ring_preempt_ib +ffffffff81e1d0c0 t gfx_v11_0_emit_mem_sync +ffffffff81e1d3f0 t gfx_v11_0_write_data_to_reg +ffffffff81e1d600 t gfx_v11_0_set_eop_interrupt_state +ffffffff81e1d690 t gfx_v11_0_eop_irq +ffffffff81e1d840 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81e1d9e0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81e1db70 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81e1dcb0 t gfx_v11_0_priv_reg_irq +ffffffff81e1dd10 t gfx_v11_0_handle_priv_fault +ffffffff81e1de70 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81e1dfb0 t gfx_v11_0_priv_inst_irq +ffffffff81e1e010 t gfx_v11_0_rlc_gc_fed_irq +ffffffff81e1e060 t gfx_v11_0_is_rlc_enabled +ffffffff81e1e0f0 t gfx_v11_0_set_safe_mode +ffffffff81e1e250 t gfx_v11_0_unset_safe_mode +ffffffff81e1e2c0 t gfx_v11_0_rlc_init +ffffffff81e1e340 t gfx_v11_0_get_csb_size +ffffffff81e1e370 t gfx_v11_0_get_csb_buffer +ffffffff81e1e4e0 t gfx_v11_0_rlc_resume +ffffffff81e1f240 t gfx_v11_0_rlc_stop +ffffffff81e1f320 t gfx_v11_0_rlc_reset +ffffffff81e1f4d0 t gfx_v11_0_rlc_start +ffffffff81e1f680 t gfx_v11_0_update_spm_vmid +ffffffff81e1f780 t gfx_v11_0_init_csb +ffffffff81e1f910 t gfx_v11_0_gfx_mqd_init +ffffffff81e1fcf0 t gfx_v11_0_compute_mqd_init +ffffffff81e20220 t gfx_v11_0_mec_init +ffffffff81e20360 t gfx_v11_0_compute_ring_init +ffffffff81e204a0 t gfx_v11_0_rlc_autoload_buffer_init +ffffffff81e20690 t gfx_v11_0_gpu_early_init +ffffffff81e20760 t amdgpu_bo_unreserve +ffffffff81e20840 t gfx_v11_0_disable_gpa_mode +ffffffff81e209e0 t gfx_v11_0_cp_resume +ffffffff81e247e0 t gfx_v11_0_config_me_cache +ffffffff81e24ba0 t gfx_v11_0_config_pfp_cache +ffffffff81e24f60 t gfx_v11_0_config_mec_cache +ffffffff81e25320 t gfx_v11_0_get_sa_active_bitmap +ffffffff81e25440 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81e25550 t gfx_v11_0_cp_compute_enable +ffffffff81e25730 t gfx_v11_0_cp_gfx_enable +ffffffff81e25940 t amdgpu_bo_reserve +ffffffff81e25ab0 t gfx_v11_0_kiq_init_register +ffffffff81e26950 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81e26a30 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81e26c10 t gfx_v11_0_cp_gfx_start +ffffffff81e27490 t gfx_v11_cntl_pg +ffffffff81e28000 t gfx_v11_0_3_rlc_gc_fed_irq +ffffffff81e28200 t gfx_v11_0_3_poison_consumption_handler +ffffffff81e29000 t gfx_v8_0_early_init +ffffffff81e292f0 t gfx_v8_0_late_init +ffffffff81e29a10 t gfx_v8_0_sw_init +ffffffff81e29dd0 t gfx_v8_0_sw_fini +ffffffff81e29f70 t gfx_v8_0_hw_init +ffffffff81e2c110 t gfx_v8_0_hw_fini +ffffffff81e2c5c0 t gfx_v8_0_suspend +ffffffff81e2c600 t gfx_v8_0_resume +ffffffff81e2c610 t gfx_v8_0_is_idle +ffffffff81e2c680 t gfx_v8_0_wait_for_idle +ffffffff81e2c730 t gfx_v8_0_check_soft_reset +ffffffff81e2c810 t gfx_v8_0_pre_soft_reset +ffffffff81e2c970 t gfx_v8_0_soft_reset +ffffffff81e2cb30 t gfx_v8_0_post_soft_reset +ffffffff81e2ccb0 t gfx_v8_0_set_clockgating_state +ffffffff81e2cf30 t gfx_v8_0_set_powergating_state +ffffffff81e2d2e0 t gfx_v8_0_get_clockgating_state +ffffffff81e2d3c0 t gfx_v8_0_get_gpu_clock_counter +ffffffff81e2d460 t gfx_v8_0_select_se_sh +ffffffff81e2d4c0 t gfx_v8_0_read_wave_data +ffffffff81e2d960 t gfx_v8_0_read_wave_sgprs +ffffffff81e2da10 t gfx_v8_0_select_me_pipe_q +ffffffff81e2da30 t gfx_v8_0_ring_get_rptr +ffffffff81e2da60 t gfx_v8_0_ring_get_wptr_compute +ffffffff81e2da90 t gfx_v8_0_ring_set_wptr_compute +ffffffff81e2dad0 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81e2def0 t gfx_v8_0_ring_test_ring +ffffffff81e2e0f0 t gfx_v8_0_ring_emit_rreg +ffffffff81e2e380 t gfx_v8_0_ring_emit_wreg +ffffffff81e2e5b0 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81e2e610 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81e2e680 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81e2ebe0 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81e2f0d0 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81e2f3c0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81e2f770 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81e2fa90 t gfx_v8_0_ring_emit_gds_switch +ffffffff81e30240 t gfx_v8_0_ring_test_ib +ffffffff81e303f0 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81e30620 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81e306d0 t gfx_v8_ring_emit_sb +ffffffff81e307c0 t gfx_v8_ring_emit_cntxcntl +ffffffff81e30d60 t gfx_v8_0_ring_soft_recovery +ffffffff81e30d90 t gfx_v8_0_emit_mem_sync +ffffffff81e30f90 t gfx_v8_0_ring_emit_ib_compute +ffffffff81e31290 t gfx_v8_0_ring_emit_fence_compute +ffffffff81e31590 t gfx_v8_0_emit_mem_sync_compute +ffffffff81e31850 t gfx_v8_0_emit_wave_limit +ffffffff81e31a00 t gfx_v8_0_set_eop_interrupt_state +ffffffff81e31c10 t gfx_v8_0_eop_irq +ffffffff81e31d20 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81e31da0 t gfx_v8_0_priv_reg_irq +ffffffff81e31ea0 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81e31f20 t gfx_v8_0_priv_inst_irq +ffffffff81e32020 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81e32280 t gfx_v8_0_cp_ecc_error_irq +ffffffff81e322d0 t gfx_v8_0_set_sq_int_state +ffffffff81e32360 t gfx_v8_0_sq_irq +ffffffff81e323d0 t gfx_v8_0_parse_sq_irq +ffffffff81e32620 t gfx_v8_0_is_rlc_enabled +ffffffff81e32660 t gfx_v8_0_set_safe_mode +ffffffff81e32760 t gfx_v8_0_unset_safe_mode +ffffffff81e32800 t gfx_v8_0_rlc_init +ffffffff81e328b0 t gfx_v8_0_get_csb_size +ffffffff81e328e0 t gfx_v8_0_get_csb_buffer +ffffffff81e32a50 t gfx_v8_0_cp_jump_table_num +ffffffff81e32a90 t gfx_v8_0_rlc_resume +ffffffff81e32e10 t gfx_v8_0_rlc_stop +ffffffff81e32e80 t gfx_v8_0_rlc_reset +ffffffff81e32f00 t gfx_v8_0_rlc_start +ffffffff81e32f80 t gfx_v8_0_update_spm_vmid +ffffffff81e32ff0 t gfx_v8_0_init_save_restore_list +ffffffff81e33400 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81e33620 t gfx_v8_0_sq_irq_work_func +ffffffff81e33640 t gfx_v8_0_init_microcode +ffffffff81e33eb0 t gfx_v8_0_mec_init +ffffffff81e33fb0 t gfx_v8_0_compute_ring_init +ffffffff81e340e0 t gfx_v8_0_gpu_early_init +ffffffff81e34580 t amdgpu_bo_unreserve +ffffffff81e34660 t gfx_v8_0_kiq_resume +ffffffff81e34910 t gfx_v8_0_cp_gfx_resume +ffffffff81e353d0 t gfx_v8_0_kcq_resume +ffffffff81e35d90 t amdgpu_bo_reserve +ffffffff81e35f00 t gfx_v8_0_mqd_commit +ffffffff81e360e0 t gfx_v8_0_mqd_init +ffffffff81e36500 t gfx_v8_0_deactivate_hqd +ffffffff81e365c0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e36900 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e37000 t gfx_v9_0_ras_error_inject +ffffffff81e371b0 t gfx_v9_0_query_ras_error_count +ffffffff81e37d80 t gfx_v9_0_reset_ras_error_count +ffffffff81e387b0 T gfx_v9_0_select_se_sh +ffffffff81e38850 t gfx_v9_0_early_init +ffffffff81e39380 t gfx_v9_0_late_init +ffffffff81e3a270 t gfx_v9_0_sw_init +ffffffff81e3a920 t gfx_v9_0_sw_fini +ffffffff81e3aae0 t gfx_v9_0_hw_init +ffffffff81e3da90 t gfx_v9_0_hw_fini +ffffffff81e3e240 t gfx_v9_0_suspend +ffffffff81e3e280 t gfx_v9_0_resume +ffffffff81e3e290 t gfx_v9_0_is_idle +ffffffff81e3e310 t gfx_v9_0_wait_for_idle +ffffffff81e3e400 t gfx_v9_0_soft_reset +ffffffff81e3e7a0 t gfx_v9_0_set_clockgating_state +ffffffff81e3e870 t gfx_v9_0_set_powergating_state +ffffffff81e3ec60 t gfx_v9_0_get_clockgating_state +ffffffff81e3ed70 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e3f500 t gfx_v9_0_read_wave_data +ffffffff81e3f740 t gfx_v9_0_read_wave_vgprs +ffffffff81e3f7a0 t gfx_v9_0_read_wave_sgprs +ffffffff81e3f7d0 t gfx_v9_0_select_me_pipe_q +ffffffff81e3f7f0 t wave_read_ind +ffffffff81e3f8e0 t wave_read_regs +ffffffff81e3fa30 t gfx_v9_0_kiq_set_resources +ffffffff81e3fd50 t gfx_v9_0_kiq_map_queues +ffffffff81e40090 t gfx_v9_0_kiq_unmap_queues +ffffffff81e403c0 t gfx_v9_0_kiq_query_status +ffffffff81e406b0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e407d0 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e40800 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e40870 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e408d0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e40d00 t gfx_v9_0_ring_test_ring +ffffffff81e40f30 t gfx_v9_0_ring_emit_rreg +ffffffff81e411c0 t gfx_v9_0_ring_emit_wreg +ffffffff81e413f0 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e41440 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e414e0 t gfx_v9_0_wait_reg_mem +ffffffff81e41810 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e41840 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e41950 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e41a80 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e42100 t gfx_v9_0_ring_emit_fence +ffffffff81e424c0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e42520 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e42630 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e42700 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e427e0 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e42a10 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e42ad0 t gfx_v9_ring_emit_sb +ffffffff81e42bc0 t gfx_v9_ring_emit_cntxcntl +ffffffff81e430a0 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e431b0 t gfx_v9_0_ring_soft_recovery +ffffffff81e43220 t gfx_v9_0_ring_preempt_ib +ffffffff81e433e0 t gfx_v9_0_emit_mem_sync +ffffffff81e436a0 t gfx_v9_0_write_data_to_reg +ffffffff81e438b0 t gfx_v9_0_ring_test_ib +ffffffff81e43a60 t gfx_v9_0_ring_patch_cntl +ffffffff81e43aa0 t gfx_v9_0_ring_patch_ce_meta +ffffffff81e43ba0 t gfx_v9_0_ring_patch_de_meta +ffffffff81e43c70 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e43fa0 t gfx_v9_0_emit_wave_limit +ffffffff81e44180 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e44360 t gfx_v9_0_eop_irq +ffffffff81e444a0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e44660 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e447a0 t gfx_v9_0_priv_reg_irq +ffffffff81e448a0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e449e0 t gfx_v9_0_priv_inst_irq +ffffffff81e44ae0 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e45370 t gfx_v9_0_is_rlc_enabled +ffffffff81e45400 t gfx_v9_0_set_safe_mode +ffffffff81e45560 t gfx_v9_0_unset_safe_mode +ffffffff81e455d0 t gfx_v9_0_rlc_init +ffffffff81e45640 t gfx_v9_0_get_csb_size +ffffffff81e45670 t gfx_v9_0_get_csb_buffer +ffffffff81e457b0 t gfx_v9_0_cp_jump_table_num +ffffffff81e45800 t gfx_v9_0_rlc_resume +ffffffff81e46f10 t gfx_v9_0_rlc_stop +ffffffff81e472b0 t gfx_v9_0_rlc_reset +ffffffff81e47450 t gfx_v9_0_rlc_start +ffffffff81e475a0 t gfx_v9_0_update_spm_vmid +ffffffff81e475e0 t gfx_v9_0_is_rlcg_access_range +ffffffff81e47630 t gfx_v9_0_init_csb +ffffffff81e477c0 t gfx_v9_0_enable_lbpw +ffffffff81e478b0 t gfx_v9_0_update_spm_vmid_internal +ffffffff81e479d0 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e47c60 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e47d60 t gfx_v9_0_mec_init +ffffffff81e47f40 t gfx_v9_0_compute_ring_init +ffffffff81e48080 t gfx_v9_0_gpu_early_init +ffffffff81e484c0 t amdgpu_bo_unreserve +ffffffff81e485a0 t gfx_v9_0_cp_gfx_enable +ffffffff81e48690 t amdgpu_bo_reserve +ffffffff81e48800 t gfx_v9_0_kiq_init_register +ffffffff81e494e0 t gfx_v9_0_mqd_init +ffffffff81e49a30 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e49f60 t gfx_v9_0_update_3d_clock_gating +ffffffff81e4a350 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e4b000 t gfx_v9_4_query_ras_error_count +ffffffff81e4be00 t gfx_v9_4_query_ras_error_status +ffffffff81e4bfd0 t gfx_v9_4_reset_ras_error_count +ffffffff81e4d000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e4d720 T gfx_v9_4_2_init_golden_registers +ffffffff81e4d7b0 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e4d890 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e4da70 t gfx_v9_4_2_query_ras_error_count +ffffffff81e4db20 t gfx_v9_4_2_query_ras_error_status +ffffffff81e4e380 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e4e3e0 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e4e8b0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e4ead0 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e4eb50 t gfx_v9_4_2_run_shader +ffffffff81e4ef50 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e4f5a0 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e4f8e0 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e4fac0 t wave_read_ind +ffffffff81e50000 t gfx_v9_4_3_xcp_suspend +ffffffff81e500a0 t gfx_v9_4_3_xcp_resume +ffffffff81e501e0 t gfx_v9_4_3_query_ras_error_count +ffffffff81e50200 t gfx_v9_4_3_query_ras_error_status +ffffffff81e50220 t gfx_v9_4_3_reset_ras_error_count +ffffffff81e50240 t gfx_v9_4_3_reset_ras_error_status +ffffffff81e50260 t gfx_v9_4_3_enable_watchdog_timer +ffffffff81e50280 t gfx_v9_4_3_early_init +ffffffff81e50940 t gfx_v9_4_3_late_init +ffffffff81e509c0 t gfx_v9_4_3_sw_init +ffffffff81e50e20 t gfx_v9_4_3_sw_fini +ffffffff81e50fd0 t gfx_v9_4_3_hw_init +ffffffff81e51a70 t gfx_v9_4_3_hw_fini +ffffffff81e51b30 t gfx_v9_4_3_suspend +ffffffff81e51bf0 t gfx_v9_4_3_resume +ffffffff81e51c00 t gfx_v9_4_3_is_idle +ffffffff81e51db0 t gfx_v9_4_3_wait_for_idle +ffffffff81e51e40 t gfx_v9_4_3_soft_reset +ffffffff81e52550 t gfx_v9_4_3_set_clockgating_state +ffffffff81e526b0 t gfx_v9_4_3_set_powergating_state +ffffffff81e526e0 t gfx_v9_4_3_get_clockgating_state +ffffffff81e52850 t gfx_v9_4_3_kiq_set_resources +ffffffff81e52b70 t gfx_v9_4_3_kiq_map_queues +ffffffff81e52ed0 t gfx_v9_4_3_kiq_unmap_queues +ffffffff81e53250 t gfx_v9_4_3_kiq_query_status +ffffffff81e53540 t gfx_v9_4_3_kiq_invalidate_tlbs +ffffffff81e53660 t gfx_v9_4_3_ring_get_rptr_compute +ffffffff81e536a0 t gfx_v9_4_3_ring_get_wptr_compute +ffffffff81e53710 t gfx_v9_4_3_ring_set_wptr_compute +ffffffff81e53770 t gfx_v9_4_3_ring_emit_fence_kiq +ffffffff81e53bc0 t gfx_v9_4_3_ring_test_ring +ffffffff81e53e20 t gfx_v9_4_3_ring_emit_rreg +ffffffff81e540b0 t gfx_v9_4_3_ring_emit_wreg +ffffffff81e542e0 t gfx_v9_4_3_ring_emit_reg_wait +ffffffff81e54330 t gfx_v9_4_3_ring_emit_reg_write_reg_wait +ffffffff81e54350 t gfx_v9_4_3_wait_reg_mem +ffffffff81e54680 t gfx_v9_4_3_ring_emit_ib_compute +ffffffff81e549b0 t gfx_v9_4_3_ring_emit_fence +ffffffff81e54d60 t gfx_v9_4_3_ring_emit_pipeline_sync +ffffffff81e54dc0 t gfx_v9_4_3_ring_emit_vm_flush +ffffffff81e54de0 t gfx_v9_4_3_ring_emit_hdp_flush +ffffffff81e54eb0 t gfx_v9_4_3_ring_emit_gds_switch +ffffffff81e55050 t gfx_v9_4_3_ring_test_ib +ffffffff81e55200 t gfx_v9_4_3_emit_mem_sync +ffffffff81e554c0 t gfx_v9_4_3_emit_wave_limit +ffffffff81e556b0 t gfx_v9_4_3_write_data_to_reg +ffffffff81e558c0 t gfx_v9_4_3_set_eop_interrupt_state +ffffffff81e55a30 t gfx_v9_4_3_eop_irq +ffffffff81e55bd0 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state +ffffffff81e55d30 t gfx_v9_4_3_ih_to_xcc_inst +ffffffff81e55e00 t gfx_v9_4_3_set_priv_reg_fault_state +ffffffff81e561e0 t gfx_v9_4_3_priv_reg_irq +ffffffff81e56240 t gfx_v9_4_3_fault +ffffffff81e563c0 t gfx_v9_4_3_set_priv_inst_fault_state +ffffffff81e567a0 t gfx_v9_4_3_priv_inst_irq +ffffffff81e56800 t gfx_v9_4_3_is_rlc_enabled +ffffffff81e56920 t gfx_v9_4_3_xcc_set_safe_mode +ffffffff81e56bc0 t gfx_v9_4_3_xcc_unset_safe_mode +ffffffff81e56ce0 t gfx_v9_4_3_rlc_init +ffffffff81e56d30 t gfx_v9_4_3_rlc_resume +ffffffff81e56df0 t gfx_v9_4_3_rlc_stop +ffffffff81e56e90 t gfx_v9_4_3_rlc_reset +ffffffff81e57520 t gfx_v9_4_3_rlc_start +ffffffff81e575c0 t gfx_v9_4_3_update_spm_vmid +ffffffff81e577d0 t gfx_v9_4_3_is_rlcg_access_range +ffffffff81e57880 t gfx_v9_4_3_xcc_rlc_resume +ffffffff81e580d0 t gfx_v9_4_3_xcc_rlc_stop +ffffffff81e587f0 t gfx_v9_4_3_xcc_rlc_start +ffffffff81e58b80 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt +ffffffff81e58da0 t gfx_v9_4_3_xcc_select_se_sh +ffffffff81e58fa0 t gfx_v9_4_3_mec_init +ffffffff81e59290 t gfx_v9_4_3_gpu_early_init +ffffffff81e594c0 t amdgpu_bo_unreserve +ffffffff81e595a0 t gfx_v9_4_3_get_gpu_clock_counter +ffffffff81e598e0 t gfx_v9_4_3_read_wave_data +ffffffff81e59bb0 t gfx_v9_4_3_read_wave_vgprs +ffffffff81e59bd0 t gfx_v9_4_3_read_wave_sgprs +ffffffff81e59c20 t gfx_v9_4_3_select_me_pipe_q +ffffffff81e59c90 t gfx_v9_4_3_switch_compute_partition +ffffffff81e59ff0 t wave_read_ind +ffffffff81e5a1f0 t wave_read_regs +ffffffff81e5a480 t gfx_v9_4_3_xcc_constants_init +ffffffff81e5b500 t gfx_v9_4_3_xcc_cp_resume +ffffffff81e5c4b0 t gfx_v9_4_3_xcc_cp_compute_enable +ffffffff81e5c650 t amdgpu_bo_reserve +ffffffff81e5c7c0 t gfx_v9_4_3_xcc_kiq_init_register +ffffffff81e5e400 t gfx_v9_4_3_xcc_mqd_init +ffffffff81e5ee40 t gfx_v9_4_3_xcc_fini +ffffffff81e5f3e0 t gfx_v9_4_3_xcc_q_fini_register +ffffffff81e5fd90 t gfx_v9_4_3_xcc_update_sram_fgcg +ffffffff81e60000 t gfx_v9_4_3_xcc_update_repeater_fgcg +ffffffff81e60270 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating +ffffffff81e60dc0 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating +ffffffff81e61620 t gfx_v9_4_3_inst_query_ras_err_count +ffffffff81e61880 t gfx_v9_4_3_inst_query_ras_err_status +ffffffff81e62600 t gfx_v9_4_3_inst_reset_ras_err_count +ffffffff81e627c0 t gfx_v9_4_3_inst_reset_ras_err_status +ffffffff81e62f40 t gfx_v9_4_3_inst_enable_watchdog_timer +ffffffff81e64000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e64090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e641d0 t gfxhub_v1_0_gart_enable +ffffffff81e65700 t gfxhub_v1_0_gart_disable +ffffffff81e659a0 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e65aa0 t gfxhub_v1_0_init +ffffffff81e66000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e67000 t gfxhub_v1_2_get_mc_fb_offset +ffffffff81e67120 t gfxhub_v1_2_setup_vm_pt_regs +ffffffff81e67190 t gfxhub_v1_2_gart_enable +ffffffff81e67220 t gfxhub_v1_2_gart_disable +ffffffff81e67280 t gfxhub_v1_2_set_fault_enable_default +ffffffff81e672f0 t gfxhub_v1_2_init +ffffffff81e675f0 t gfxhub_v1_2_get_xgmi_info +ffffffff81e67860 t gfxhub_v1_2_xcp_suspend +ffffffff81e678a0 t gfxhub_v1_2_xcp_resume +ffffffff81e67910 t gfxhub_v1_2_xcc_setup_vm_pt_regs +ffffffff81e67c30 t gfxhub_v1_2_xcc_gart_enable +ffffffff81e6b070 t gfxhub_v1_2_xcc_gart_disable +ffffffff81e6b6e0 t gfxhub_v1_2_xcc_set_fault_enable_default +ffffffff81e6c000 t gfxhub_v2_0_get_fb_location +ffffffff81e6c090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e6c120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e6c260 t gfxhub_v2_0_gart_enable +ffffffff81e6d490 t gfxhub_v2_0_gart_disable +ffffffff81e6d6e0 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e6d7e0 t gfxhub_v2_0_init +ffffffff81e6d8b0 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e6da80 t gfxhub_v2_0_get_invalidate_req +ffffffff81e6e000 t gfxhub_v2_1_get_fb_location +ffffffff81e6e090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e6e120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e6e260 t gfxhub_v2_1_gart_enable +ffffffff81e6f560 t gfxhub_v2_1_gart_disable +ffffffff81e6f7b0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e6f8d0 t gfxhub_v2_1_init +ffffffff81e6f9a0 t gfxhub_v2_1_get_xgmi_info +ffffffff81e6fae0 t gfxhub_v2_1_utcl2_harvest +ffffffff81e6fcc0 t gfxhub_v2_1_save_regs +ffffffff81e70730 t gfxhub_v2_1_restore_regs +ffffffff81e71350 t gfxhub_v2_1_halt +ffffffff81e71720 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e718f0 t gfxhub_v2_1_get_invalidate_req +ffffffff81e72000 t gfxhub_v3_0_get_fb_location +ffffffff81e72090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e72120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e72260 t gfxhub_v3_0_gart_enable +ffffffff81e73560 t gfxhub_v3_0_gart_disable +ffffffff81e73800 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e739d0 t gfxhub_v3_0_init +ffffffff81e73aa0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e73c70 t gfxhub_v3_0_get_invalidate_req +ffffffff81e74000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e74090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e74120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e74260 t gfxhub_v3_0_3_gart_enable +ffffffff81e75450 t gfxhub_v3_0_3_gart_disable +ffffffff81e756f0 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e75810 t gfxhub_v3_0_3_init +ffffffff81e758e0 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e75ab0 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e76000 t gmc_v10_0_early_init +ffffffff81e76170 t gmc_v10_0_late_init +ffffffff81e761e0 t gmc_v10_0_sw_init +ffffffff81e765d0 t gmc_v10_0_sw_fini +ffffffff81e76620 t gmc_v10_0_hw_init +ffffffff81e76830 t gmc_v10_0_hw_fini +ffffffff81e768d0 t gmc_v10_0_suspend +ffffffff81e76970 t gmc_v10_0_resume +ffffffff81e769d0 t gmc_v10_0_is_idle +ffffffff81e76a00 t gmc_v10_0_wait_for_idle +ffffffff81e76a30 t gmc_v10_0_soft_reset +ffffffff81e76a60 t gmc_v10_0_set_clockgating_state +ffffffff81e76b10 t gmc_v10_0_set_powergating_state +ffffffff81e76b40 t gmc_v10_0_get_clockgating_state +ffffffff81e76be0 t gmc_v10_0_flush_gpu_tlb +ffffffff81e76e70 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e77120 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e772d0 t gmc_v10_0_emit_pasid_mapping +ffffffff81e77350 t gmc_v10_0_map_mtype +ffffffff81e773a0 t gmc_v10_0_get_vm_pde +ffffffff81e77490 t gmc_v10_0_get_vm_pte +ffffffff81e77570 t gmc_v10_0_get_vbios_fb_size +ffffffff81e776e0 t gmc_v10_0_flush_vm_hub +ffffffff81e77b10 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e77bb0 t gmc_v10_0_process_interrupt +ffffffff81e77e90 t gmc_v10_0_ecc_interrupt_state +ffffffff81e77ec0 t gmc_v10_0_gart_init +ffffffff81e78000 t gmc_v11_0_early_init +ffffffff81e781f0 t gmc_v11_0_late_init +ffffffff81e78260 t gmc_v11_0_sw_init +ffffffff81e78570 t gmc_v11_0_sw_fini +ffffffff81e785c0 t gmc_v11_0_hw_init +ffffffff81e78720 t gmc_v11_0_hw_fini +ffffffff81e787a0 t gmc_v11_0_suspend +ffffffff81e78820 t gmc_v11_0_resume +ffffffff81e78880 t gmc_v11_0_is_idle +ffffffff81e788b0 t gmc_v11_0_wait_for_idle +ffffffff81e788e0 t gmc_v11_0_soft_reset +ffffffff81e78910 t gmc_v11_0_set_clockgating_state +ffffffff81e78990 t gmc_v11_0_set_powergating_state +ffffffff81e789c0 t gmc_v11_0_get_clockgating_state +ffffffff81e78a00 t gmc_v11_0_flush_gpu_tlb +ffffffff81e78eb0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e79120 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e792d0 t gmc_v11_0_emit_pasid_mapping +ffffffff81e79350 t gmc_v11_0_map_mtype +ffffffff81e793a0 t gmc_v11_0_get_vm_pde +ffffffff81e794a0 t gmc_v11_0_get_vm_pte +ffffffff81e79580 t gmc_v11_0_get_vbios_fb_size +ffffffff81e796f0 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e79790 t gmc_v11_0_process_interrupt +ffffffff81e799c0 t gmc_v11_0_ecc_interrupt_state +ffffffff81e799f0 t gmc_v11_0_gart_init +ffffffff81e7a000 t gmc_v7_0_early_init +ffffffff81e7a0a0 t gmc_v7_0_late_init +ffffffff81e7a0f0 t gmc_v7_0_sw_init +ffffffff81e7a520 t gmc_v7_0_sw_fini +ffffffff81e7a5a0 t gmc_v7_0_hw_init +ffffffff81e7af10 t gmc_v7_0_hw_fini +ffffffff81e7afd0 t gmc_v7_0_suspend +ffffffff81e7b010 t gmc_v7_0_resume +ffffffff81e7b070 t gmc_v7_0_is_idle +ffffffff81e7b0c0 t gmc_v7_0_wait_for_idle +ffffffff81e7b160 t gmc_v7_0_soft_reset +ffffffff81e7b3c0 t gmc_v7_0_set_clockgating_state +ffffffff81e7b620 t gmc_v7_0_set_powergating_state +ffffffff81e7b650 t gmc_v7_0_flush_gpu_tlb +ffffffff81e7b680 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e7b740 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e7b7e0 t gmc_v7_0_emit_pasid_mapping +ffffffff81e7b810 t gmc_v7_0_set_prt +ffffffff81e7b9d0 t gmc_v7_0_get_vm_pde +ffffffff81e7ba30 t gmc_v7_0_get_vm_pte +ffffffff81e7ba70 t gmc_v7_0_get_vbios_fb_size +ffffffff81e7bae0 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e7bbb0 t gmc_v7_0_process_interrupt +ffffffff81e7be50 t gmc_v7_0_gart_init +ffffffff81e7c000 t gmc_v8_0_early_init +ffffffff81e7c0a0 t gmc_v8_0_late_init +ffffffff81e7c0f0 t gmc_v8_0_sw_init +ffffffff81e7c6a0 t gmc_v8_0_sw_fini +ffffffff81e7c720 t gmc_v8_0_hw_init +ffffffff81e7d390 t gmc_v8_0_hw_fini +ffffffff81e7d450 t gmc_v8_0_suspend +ffffffff81e7d490 t gmc_v8_0_resume +ffffffff81e7d4f0 t gmc_v8_0_is_idle +ffffffff81e7d540 t gmc_v8_0_wait_for_idle +ffffffff81e7d5e0 t gmc_v8_0_check_soft_reset +ffffffff81e7d650 t gmc_v8_0_pre_soft_reset +ffffffff81e7d7c0 t gmc_v8_0_soft_reset +ffffffff81e7d890 t gmc_v8_0_post_soft_reset +ffffffff81e7d900 t gmc_v8_0_set_clockgating_state +ffffffff81e7dec0 t gmc_v8_0_set_powergating_state +ffffffff81e7def0 t gmc_v8_0_get_clockgating_state +ffffffff81e7df60 t gmc_v8_0_flush_gpu_tlb +ffffffff81e7df90 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e7e050 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e7e0f0 t gmc_v8_0_emit_pasid_mapping +ffffffff81e7e120 t gmc_v8_0_set_prt +ffffffff81e7e2e0 t gmc_v8_0_get_vm_pde +ffffffff81e7e340 t gmc_v8_0_get_vm_pte +ffffffff81e7e390 t gmc_v8_0_get_vbios_fb_size +ffffffff81e7e400 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e7e4d0 t gmc_v8_0_process_interrupt +ffffffff81e7e860 t gmc_v8_0_gart_init +ffffffff81e7f000 T gmc_v9_0_restore_registers +ffffffff81e7f160 t gmc_v9_0_early_init +ffffffff81e7f510 t gmc_v9_0_late_init +ffffffff81e7f620 t gmc_v9_0_sw_init +ffffffff81e7fd80 t gmc_v9_0_sw_fini +ffffffff81e7fe40 t gmc_v9_0_hw_init +ffffffff81e802f0 t gmc_v9_0_hw_fini +ffffffff81e803b0 t gmc_v9_0_suspend +ffffffff81e80470 t gmc_v9_0_resume +ffffffff81e804d0 t gmc_v9_0_is_idle +ffffffff81e80500 t gmc_v9_0_wait_for_idle +ffffffff81e80530 t gmc_v9_0_soft_reset +ffffffff81e80560 t gmc_v9_0_set_clockgating_state +ffffffff81e805c0 t gmc_v9_0_set_powergating_state +ffffffff81e805f0 t gmc_v9_0_get_clockgating_state +ffffffff81e80630 t gmc_v9_0_flush_gpu_tlb +ffffffff81e80cd0 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e81080 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e81280 t gmc_v9_0_emit_pasid_mapping +ffffffff81e81300 t gmc_v9_0_map_mtype +ffffffff81e81340 t gmc_v9_0_get_vm_pde +ffffffff81e81440 t gmc_v9_0_get_vm_pte +ffffffff81e81770 t gmc_v9_0_override_vm_pte_flags +ffffffff81e81830 t gmc_v9_0_get_vbios_fb_size +ffffffff81e819d0 t gmc_v9_0_query_memory_partition +ffffffff81e81a30 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e81ed0 t gmc_v9_0_process_interrupt +ffffffff81e826d0 t gmc_v9_0_ecc_interrupt_state +ffffffff81e82830 t gmc_v9_0_init_mem_ranges +ffffffff81e82c50 t gmc_v9_0_gart_init +ffffffff81e82d80 t gmc_v9_0_save_registers +ffffffff81e83000 t hdp_v4_0_query_ras_error_count +ffffffff81e830c0 t hdp_v4_0_reset_ras_error_count +ffffffff81e831e0 t hdp_v4_0_flush_hdp +ffffffff81e83230 t hdp_v4_0_invalidate_hdp +ffffffff81e83310 t hdp_v4_0_update_clock_gating +ffffffff81e83410 t hdp_v4_0_get_clockgating_state +ffffffff81e83460 t hdp_v4_0_init_registers +ffffffff81e84000 t hdp_v5_0_flush_hdp +ffffffff81e84050 t hdp_v5_0_invalidate_hdp +ffffffff81e840f0 t hdp_v5_0_update_clock_gating +ffffffff81e844f0 t hdp_v5_0_get_clockgating_state +ffffffff81e84610 t hdp_v5_0_init_registers +ffffffff81e85000 t hdp_v5_2_flush_hdp +ffffffff81e85050 t hdp_v5_2_update_clock_gating +ffffffff81e85460 t hdp_v5_2_get_clockgating_state +ffffffff81e86000 t hdp_v6_0_flush_hdp +ffffffff81e86050 t hdp_v6_0_update_clock_gating +ffffffff81e86380 t hdp_v6_0_get_clockgating_state +ffffffff81e87000 t iceland_ih_early_init +ffffffff81e87050 t iceland_ih_sw_init +ffffffff81e870b0 t iceland_ih_sw_fini +ffffffff81e870f0 t iceland_ih_hw_init +ffffffff81e87310 t iceland_ih_hw_fini +ffffffff81e873e0 t iceland_ih_suspend +ffffffff81e874b0 t iceland_ih_resume +ffffffff81e874f0 t iceland_ih_is_idle +ffffffff81e87540 t iceland_ih_wait_for_idle +ffffffff81e875e0 t iceland_ih_soft_reset +ffffffff81e876c0 t iceland_ih_set_clockgating_state +ffffffff81e876f0 t iceland_ih_set_powergating_state +ffffffff81e87720 t iceland_ih_get_wptr +ffffffff81e87810 t iceland_ih_decode_iv +ffffffff81e87890 t iceland_ih_set_rptr +ffffffff81e88000 t ih_v6_0_early_init +ffffffff81e88050 t ih_v6_0_sw_init +ffffffff81e881b0 t ih_v6_0_sw_fini +ffffffff81e881f0 t ih_v6_0_hw_init +ffffffff81e887a0 t ih_v6_0_hw_fini +ffffffff81e88800 t ih_v6_0_suspend +ffffffff81e88860 t ih_v6_0_resume +ffffffff81e88870 t ih_v6_0_is_idle +ffffffff81e888a0 t ih_v6_0_wait_for_idle +ffffffff81e888d0 t ih_v6_0_soft_reset +ffffffff81e88900 t ih_v6_0_set_clockgating_state +ffffffff81e88a30 t ih_v6_0_set_powergating_state +ffffffff81e88bb0 t ih_v6_0_get_clockgating_state +ffffffff81e88c40 t ih_v6_0_get_wptr +ffffffff81e88d30 t ih_v6_0_set_rptr +ffffffff81e88e00 t ih_v6_0_self_irq +ffffffff81e88e70 t ih_v6_0_toggle_interrupts +ffffffff81e89050 t force_update_wptr_for_self_int +ffffffff81e8a000 t ih_v6_1_early_init +ffffffff81e8a050 t ih_v6_1_sw_init +ffffffff81e8a1b0 t ih_v6_1_sw_fini +ffffffff81e8a1f0 t ih_v6_1_hw_init +ffffffff81e8a7a0 t ih_v6_1_hw_fini +ffffffff81e8a800 t ih_v6_1_suspend +ffffffff81e8a860 t ih_v6_1_resume +ffffffff81e8a870 t ih_v6_1_is_idle +ffffffff81e8a8a0 t ih_v6_1_wait_for_idle +ffffffff81e8a8d0 t ih_v6_1_soft_reset +ffffffff81e8a900 t ih_v6_1_set_clockgating_state +ffffffff81e8aa30 t ih_v6_1_set_powergating_state +ffffffff81e8abb0 t ih_v6_1_get_clockgating_state +ffffffff81e8ac40 t ih_v6_1_get_wptr +ffffffff81e8ad30 t ih_v6_1_set_rptr +ffffffff81e8ae00 t ih_v6_1_self_irq +ffffffff81e8ae70 t ih_v6_1_toggle_interrupts +ffffffff81e8b050 t force_update_wptr_for_self_int +ffffffff81e8c000 t imu_v11_0_init_microcode +ffffffff81e8c170 t imu_v11_0_load_microcode +ffffffff81e8c4f0 t imu_v11_0_setup +ffffffff81e8c780 t imu_v11_0_start +ffffffff81e8c880 t imu_v11_0_program_rlc_ram +ffffffff81e8ca40 t imu_v11_0_wait_for_reset_status +ffffffff81e8cb90 t program_imu_rlc_ram +ffffffff81e8d000 T imu_v11_0_3_program_rlc_ram +ffffffff81e8e000 T jpeg_v1_0_early_init +ffffffff81e8e080 T jpeg_v1_0_sw_init +ffffffff81e8e170 T jpeg_v1_0_sw_fini +ffffffff81e8e190 T jpeg_v1_0_start +ffffffff81e8ec40 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e8ecd0 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e8ed60 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e8edd0 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e8f6f0 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e90030 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e900a0 t jpeg_v1_0_decode_ring_nop +ffffffff81e90200 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e903c0 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e90580 t jpeg_v1_0_ring_begin_use +ffffffff81e90680 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e908e0 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e90d00 t jpeg_v1_0_set_interrupt_state +ffffffff81e90d30 t jpeg_v1_0_process_interrupt +ffffffff81e91000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e911a0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e91340 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e91a20 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e921d0 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e92580 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e925f0 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e92830 T jpeg_v2_0_dec_ring_nop +ffffffff81e92990 t jpeg_v2_0_early_init +ffffffff81e92a20 t jpeg_v2_0_sw_init +ffffffff81e92b50 t jpeg_v2_0_sw_fini +ffffffff81e92ba0 t jpeg_v2_0_hw_init +ffffffff81e92c20 t jpeg_v2_0_hw_fini +ffffffff81e92d00 t jpeg_v2_0_suspend +ffffffff81e92d30 t jpeg_v2_0_resume +ffffffff81e92dc0 t jpeg_v2_0_is_idle +ffffffff81e92e50 t jpeg_v2_0_wait_for_idle +ffffffff81e92e90 t jpeg_v2_0_set_clockgating_state +ffffffff81e92f40 t jpeg_v2_0_set_powergating_state +ffffffff81e93660 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e936f0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e93790 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e93830 t jpeg_v2_0_set_interrupt_state +ffffffff81e93860 t jpeg_v2_0_process_interrupt +ffffffff81e938f0 t jpeg_v2_0_enable_clock_gating +ffffffff81e93aa0 t jpeg_v2_0_disable_clock_gating +ffffffff81e94000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e94150 t jpeg_v2_5_early_init +ffffffff81e94350 t jpeg_v2_5_sw_init +ffffffff81e945f0 t jpeg_v2_5_sw_fini +ffffffff81e94640 t jpeg_v2_5_hw_init +ffffffff81e94730 t jpeg_v2_5_hw_fini +ffffffff81e948b0 t jpeg_v2_5_suspend +ffffffff81e948e0 t jpeg_v2_5_resume +ffffffff81e949e0 t jpeg_v2_5_is_idle +ffffffff81e94ae0 t jpeg_v2_5_wait_for_idle +ffffffff81e94b90 t jpeg_v2_5_set_clockgating_state +ffffffff81e94c40 t jpeg_v2_5_set_powergating_state +ffffffff81e95370 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e95410 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e954c0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e95570 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e95730 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e958f0 t jpeg_v2_5_set_interrupt_state +ffffffff81e95920 t jpeg_v2_5_process_interrupt +ffffffff81e959e0 t jpeg_v2_6_set_ras_interrupt_state +ffffffff81e95a10 t jpeg_v2_5_enable_clock_gating +ffffffff81e95af0 t jpeg_v2_5_disable_clock_gating +ffffffff81e96000 t jpeg_v3_0_early_init +ffffffff81e96110 t jpeg_v3_0_sw_init +ffffffff81e96240 t jpeg_v3_0_sw_fini +ffffffff81e96290 t jpeg_v3_0_hw_init +ffffffff81e96310 t jpeg_v3_0_hw_fini +ffffffff81e963f0 t jpeg_v3_0_suspend +ffffffff81e96420 t jpeg_v3_0_resume +ffffffff81e964b0 t jpeg_v3_0_is_idle +ffffffff81e96540 t jpeg_v3_0_wait_for_idle +ffffffff81e96580 t jpeg_v3_0_set_clockgating_state +ffffffff81e96630 t jpeg_v3_0_set_powergating_state +ffffffff81e96e10 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e96ea0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e96f40 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e96fe0 t jpeg_v3_0_set_interrupt_state +ffffffff81e97010 t jpeg_v3_0_process_interrupt +ffffffff81e970a0 t jpeg_v3_0_enable_clock_gating +ffffffff81e97170 t jpeg_v3_0_disable_clock_gating +ffffffff81e98000 t jpeg_v4_0_query_ras_poison_status +ffffffff81e98150 t jpeg_v4_0_early_init +ffffffff81e98220 t jpeg_v4_0_sw_init +ffffffff81e983c0 t jpeg_v4_0_sw_fini +ffffffff81e98410 t jpeg_v4_0_hw_init +ffffffff81e98a40 t jpeg_v4_0_hw_fini +ffffffff81e98b10 t jpeg_v4_0_suspend +ffffffff81e98b40 t jpeg_v4_0_resume +ffffffff81e98b90 t jpeg_v4_0_is_idle +ffffffff81e98c20 t jpeg_v4_0_wait_for_idle +ffffffff81e98c60 t jpeg_v4_0_set_clockgating_state +ffffffff81e98d10 t jpeg_v4_0_set_powergating_state +ffffffff81e99470 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81e99500 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81e995a0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81e99640 t jpeg_v4_0_set_interrupt_state +ffffffff81e99670 t jpeg_v4_0_process_interrupt +ffffffff81e99710 t jpeg_v4_0_set_ras_interrupt_state +ffffffff81e99740 t jpeg_v4_0_enable_clock_gating +ffffffff81e99900 t jpeg_v4_0_disable_clock_gating +ffffffff81e9a000 t jpeg_v4_0_3_early_init +ffffffff81e9a170 t jpeg_v4_0_3_sw_init +ffffffff81e9a4a0 t jpeg_v4_0_3_sw_fini +ffffffff81e9a4f0 t jpeg_v4_0_3_hw_init +ffffffff81e9af50 t jpeg_v4_0_3_hw_fini +ffffffff81e9afe0 t jpeg_v4_0_3_suspend +ffffffff81e9b060 t jpeg_v4_0_3_resume +ffffffff81e9b0b0 t jpeg_v4_0_3_is_idle +ffffffff81e9b290 t jpeg_v4_0_3_wait_for_idle +ffffffff81e9b3e0 t jpeg_v4_0_3_set_clockgating_state +ffffffff81e9b470 t jpeg_v4_0_3_set_powergating_state +ffffffff81e9c0d0 t jpeg_v4_0_3_dec_ring_get_rptr +ffffffff81e9c240 t jpeg_v4_0_3_dec_ring_get_wptr +ffffffff81e9c3d0 t jpeg_v4_0_3_dec_ring_set_wptr +ffffffff81e9c570 t jpeg_v4_0_3_dec_ring_emit_ib +ffffffff81e9cdd0 t jpeg_v4_0_3_dec_ring_emit_fence +ffffffff81e9d560 t jpeg_v4_0_3_dec_ring_emit_vm_flush +ffffffff81e9d5d0 t jpeg_v4_0_3_dec_ring_nop +ffffffff81e9d730 t jpeg_v4_0_3_dec_ring_insert_start +ffffffff81e9d8d0 t jpeg_v4_0_3_dec_ring_insert_end +ffffffff81e9da70 t jpeg_v4_0_3_dec_ring_emit_wreg +ffffffff81e9dcb0 t jpeg_v4_0_3_dec_ring_emit_reg_wait +ffffffff81e9e060 t jpeg_v4_0_3_set_interrupt_state +ffffffff81e9e090 t jpeg_v4_0_3_process_interrupt +ffffffff81e9e2d0 t jpeg_v4_0_3_query_ras_error_count +ffffffff81e9e3c0 t jpeg_v4_0_3_reset_ras_error_count +ffffffff81e9e4b0 t jpeg_v4_0_3_disable_clock_gating +ffffffff81e9f000 t lsdma_v6_0_copy_mem +ffffffff81e9f370 t lsdma_v6_0_fill_mem +ffffffff81e9f660 t lsdma_v6_0_update_memory_power_gating +ffffffff81ea0000 t mca_v3_0_ras_block_match +ffffffff81ea0050 t mca_v3_0_mp0_query_ras_error_count +ffffffff81ea0070 t mca_v3_0_mp1_query_ras_error_count +ffffffff81ea0090 t mca_v3_0_mpio_query_ras_error_count +ffffffff81ea1000 t mes_v10_0_early_init +ffffffff81ea1060 t mes_v10_0_late_init +ffffffff81ea10b0 t mes_v10_1_sw_init +ffffffff81ea1550 t mes_v10_1_sw_fini +ffffffff81ea1670 t mes_v10_1_hw_init +ffffffff81ea1f60 t mes_v10_1_hw_fini +ffffffff81ea2050 t mes_v10_1_suspend +ffffffff81ea2160 t mes_v10_1_resume +ffffffff81ea21b0 t mes_v10_1_kiq_hw_init +ffffffff81ea25c0 t mes_v10_1_add_hw_queue +ffffffff81ea2740 t mes_v10_1_remove_hw_queue +ffffffff81ea27d0 t mes_v10_1_unmap_legacy_queue +ffffffff81ea28c0 t mes_v10_1_suspend_gang +ffffffff81ea28f0 t mes_v10_1_resume_gang +ffffffff81ea2920 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81ea2b20 t mes_v10_1_load_microcode +ffffffff81ea3340 t mes_v10_1_enable +ffffffff81ea37c0 t mes_v10_1_queue_init +ffffffff81ea3a60 t amdgpu_bo_unreserve +ffffffff81ea3b40 t mes_v10_1_ring_get_rptr +ffffffff81ea3b70 t mes_v10_1_ring_get_wptr +ffffffff81ea3be0 t mes_v10_1_ring_set_wptr +ffffffff81ea4000 t mes_v11_0_early_init +ffffffff81ea4060 t mes_v11_0_late_init +ffffffff81ea40d0 t mes_v11_0_sw_init +ffffffff81ea4570 t mes_v11_0_sw_fini +ffffffff81ea4730 t mes_v11_0_hw_init +ffffffff81ea4f60 t mes_v11_0_hw_fini +ffffffff81ea4f90 t mes_v11_0_suspend +ffffffff81ea4fa0 t mes_v11_0_resume +ffffffff81ea4ff0 t mes_v11_0_kiq_hw_init +ffffffff81ea5200 t mes_v11_0_kiq_hw_fini +ffffffff81ea5340 t mes_v11_0_add_hw_queue +ffffffff81ea5540 t mes_v11_0_remove_hw_queue +ffffffff81ea55d0 t mes_v11_0_unmap_legacy_queue +ffffffff81ea56d0 t mes_v11_0_suspend_gang +ffffffff81ea5700 t mes_v11_0_resume_gang +ffffffff81ea5730 t mes_v11_0_misc_op +ffffffff81ea58f0 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff81ea5b10 t mes_v11_0_load_microcode +ffffffff81ea62a0 t mes_v11_0_enable +ffffffff81ea67b0 t mes_v11_0_queue_init +ffffffff81ea7250 t amdgpu_bo_unreserve +ffffffff81ea7330 t mes_v11_0_mqd_init +ffffffff81ea7520 t mes_v11_0_kiq_dequeue +ffffffff81ea7960 t mes_v11_0_ring_get_rptr +ffffffff81ea7990 t mes_v11_0_ring_get_wptr +ffffffff81ea7a00 t mes_v11_0_ring_set_wptr +ffffffff81ea8000 t mmhub_v1_0_query_ras_error_count +ffffffff81ea8150 t mmhub_v1_0_reset_ras_error_count +ffffffff81ea8200 t mmhub_v1_0_get_fb_location +ffffffff81ea8320 t mmhub_v1_0_init +ffffffff81ea83d0 t mmhub_v1_0_gart_enable +ffffffff81ea9720 t mmhub_v1_0_set_fault_enable_default +ffffffff81ea9840 t mmhub_v1_0_gart_disable +ffffffff81ea9ae0 t mmhub_v1_0_set_clockgating +ffffffff81ea9f70 t mmhub_v1_0_get_clockgating +ffffffff81eaa090 t mmhub_v1_0_setup_vm_pt_regs +ffffffff81eaa1d0 t mmhub_v1_0_update_power_gating +ffffffff81eab000 t mmhub_v1_7_query_ras_error_count +ffffffff81eab150 t mmhub_v1_7_query_ras_error_status +ffffffff81eab230 t mmhub_v1_7_reset_ras_error_count +ffffffff81eab2d0 t mmhub_v1_7_reset_ras_error_status +ffffffff81eab3d0 t mmhub_v1_7_get_fb_location +ffffffff81eab4f0 t mmhub_v1_7_init +ffffffff81eab590 t mmhub_v1_7_gart_enable +ffffffff81eacaa0 t mmhub_v1_7_set_fault_enable_default +ffffffff81eacbc0 t mmhub_v1_7_gart_disable +ffffffff81eace60 t mmhub_v1_7_set_clockgating +ffffffff81ead200 t mmhub_v1_7_get_clockgating +ffffffff81ead320 t mmhub_v1_7_setup_vm_pt_regs +ffffffff81eae000 t mmhub_v1_8_get_fb_location +ffffffff81eae120 t mmhub_v1_8_init +ffffffff81eae280 t mmhub_v1_8_gart_enable +ffffffff81eafe90 t mmhub_v1_8_set_fault_enable_default +ffffffff81eb0060 t mmhub_v1_8_gart_disable +ffffffff81eb03a0 t mmhub_v1_8_set_clockgating +ffffffff81eb03d0 t mmhub_v1_8_get_clockgating +ffffffff81eb0400 t mmhub_v1_8_setup_vm_pt_regs +ffffffff81eb0610 t mmhub_v1_8_query_ras_error_count +ffffffff81eb0770 t mmhub_v1_8_query_ras_error_status +ffffffff81eb0a20 t mmhub_v1_8_reset_ras_error_count +ffffffff81eb0b30 t mmhub_v1_8_reset_ras_error_status +ffffffff81eb2000 t mmhub_v2_0_init +ffffffff81eb20d0 t mmhub_v2_0_gart_enable +ffffffff81eb3290 t mmhub_v2_0_set_fault_enable_default +ffffffff81eb33b0 t mmhub_v2_0_gart_disable +ffffffff81eb3640 t mmhub_v2_0_set_clockgating +ffffffff81eb3990 t mmhub_v2_0_get_clockgating +ffffffff81eb3b20 t mmhub_v2_0_setup_vm_pt_regs +ffffffff81eb3c60 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff81eb3eb0 t mmhub_v2_0_get_invalidate_req +ffffffff81eb4000 t mmhub_v2_3_init +ffffffff81eb40e0 t mmhub_v2_3_gart_enable +ffffffff81eb54b0 t mmhub_v2_3_set_fault_enable_default +ffffffff81eb55b0 t mmhub_v2_3_gart_disable +ffffffff81eb5850 t mmhub_v2_3_set_clockgating +ffffffff81eb5cf0 t mmhub_v2_3_get_clockgating +ffffffff81eb5ee0 t mmhub_v2_3_setup_vm_pt_regs +ffffffff81eb6020 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff81eb6230 t mmhub_v2_3_get_invalidate_req +ffffffff81eb7000 t mmhub_v3_0_get_fb_location +ffffffff81eb7090 t mmhub_v3_0_get_mc_fb_offset +ffffffff81eb7120 t mmhub_v3_0_init +ffffffff81eb7200 t mmhub_v3_0_gart_enable +ffffffff81eb8420 t mmhub_v3_0_set_fault_enable_default +ffffffff81eb8540 t mmhub_v3_0_gart_disable +ffffffff81eb87d0 t mmhub_v3_0_set_clockgating +ffffffff81eb89a0 t mmhub_v3_0_get_clockgating +ffffffff81eb8a50 t mmhub_v3_0_setup_vm_pt_regs +ffffffff81eb8b90 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff81eb8d90 t mmhub_v3_0_get_invalidate_req +ffffffff81eb9000 t mmhub_v3_0_1_get_fb_location +ffffffff81eb9090 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff81eb9120 t mmhub_v3_0_1_init +ffffffff81eb91f0 t mmhub_v3_0_1_gart_enable +ffffffff81eba4f0 t mmhub_v3_0_1_set_fault_enable_default +ffffffff81eba5f0 t mmhub_v3_0_1_gart_disable +ffffffff81eba890 t mmhub_v3_0_1_set_clockgating +ffffffff81ebaa50 t mmhub_v3_0_1_get_clockgating +ffffffff81ebab00 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff81ebac40 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff81ebae40 t mmhub_v3_0_1_get_invalidate_req +ffffffff81ebb000 t mmhub_v3_0_2_get_fb_location +ffffffff81ebb090 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff81ebb120 t mmhub_v3_0_2_init +ffffffff81ebb1f0 t mmhub_v3_0_2_gart_enable +ffffffff81ebc3e0 t mmhub_v3_0_2_set_fault_enable_default +ffffffff81ebc500 t mmhub_v3_0_2_gart_disable +ffffffff81ebc790 t mmhub_v3_0_2_set_clockgating +ffffffff81ebc7c0 t mmhub_v3_0_2_get_clockgating +ffffffff81ebc7f0 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff81ebc930 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff81ebcb10 t mmhub_v3_0_2_get_invalidate_req +ffffffff81ebd000 t mmhub_v9_4_query_ras_error_count +ffffffff81ebd150 t mmhub_v9_4_query_ras_error_status +ffffffff81ebd230 t mmhub_v9_4_reset_ras_error_count +ffffffff81ebd300 t mmhub_v9_4_get_fb_location +ffffffff81ebd420 t mmhub_v9_4_init +ffffffff81ebd570 t mmhub_v9_4_gart_enable +ffffffff81ebea00 t mmhub_v9_4_set_fault_enable_default +ffffffff81ebebf0 t mmhub_v9_4_gart_disable +ffffffff81ebef60 t mmhub_v9_4_set_clockgating +ffffffff81ebf440 t mmhub_v9_4_get_clockgating +ffffffff81ebf570 t mmhub_v9_4_setup_vm_pt_regs +ffffffff81ebf5c0 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff81ec0000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff81ec0050 T xgpu_ai_mailbox_add_irq_id +ffffffff81ec00e0 T xgpu_ai_mailbox_get_irq +ffffffff81ec0190 t xgpu_ai_mailbox_flr_work +ffffffff81ec0390 T xgpu_ai_mailbox_put_irq +ffffffff81ec03d0 t xgpu_ai_request_full_gpu_access +ffffffff81ec03f0 t xgpu_ai_release_full_gpu_access +ffffffff81ec0410 t xgpu_ai_request_init_data +ffffffff81ec0470 t xgpu_ai_request_reset +ffffffff81ec0520 t xgpu_ai_mailbox_trans_msg +ffffffff81ec0740 t xgpu_ai_ras_poison_handler +ffffffff81ec0770 t xgpu_ai_set_mailbox_ack_irq +ffffffff81ec0800 t xgpu_ai_mailbox_ack_irq +ffffffff81ec0850 t xgpu_ai_set_mailbox_rcv_irq +ffffffff81ec08e0 t xgpu_ai_mailbox_rcv_irq +ffffffff81ec09c0 t xgpu_ai_send_access_requests +ffffffff81ec0ab0 t xgpu_ai_poll_msg +ffffffff81ec1000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81ec1050 T xgpu_nv_mailbox_add_irq_id +ffffffff81ec10e0 T xgpu_nv_mailbox_get_irq +ffffffff81ec1190 t xgpu_nv_mailbox_flr_work +ffffffff81ec13b0 T xgpu_nv_mailbox_put_irq +ffffffff81ec13f0 t xgpu_nv_request_full_gpu_access +ffffffff81ec1410 t xgpu_nv_release_full_gpu_access +ffffffff81ec1430 t xgpu_nv_request_init_data +ffffffff81ec1450 t xgpu_nv_request_reset +ffffffff81ec1550 t xgpu_nv_mailbox_trans_msg +ffffffff81ec16f0 t xgpu_nv_ras_poison_handler +ffffffff81ec1710 t xgpu_nv_set_mailbox_ack_irq +ffffffff81ec1790 t xgpu_nv_mailbox_ack_irq +ffffffff81ec17e0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81ec1860 t xgpu_nv_mailbox_rcv_irq +ffffffff81ec1910 t xgpu_nv_send_access_requests +ffffffff81ec2000 T xgpu_vi_init_golden_registers +ffffffff81ec20c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81ec2110 T xgpu_vi_mailbox_add_irq_id +ffffffff81ec21a0 T xgpu_vi_mailbox_get_irq +ffffffff81ec2250 t xgpu_vi_mailbox_flr_work +ffffffff81ec23a0 T xgpu_vi_mailbox_put_irq +ffffffff81ec23e0 t xgpu_vi_request_full_gpu_access +ffffffff81ec2400 t xgpu_vi_release_full_gpu_access +ffffffff81ec2420 t xgpu_vi_request_reset +ffffffff81ec2440 t xgpu_vi_wait_reset_cmpl +ffffffff81ec2520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81ec25a0 t xgpu_vi_mailbox_ack_irq +ffffffff81ec25f0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81ec2670 t xgpu_vi_mailbox_rcv_irq +ffffffff81ec2720 t xgpu_vi_mailbox_rcv_msg +ffffffff81ec2840 t xgpu_vi_send_access_requests +ffffffff81ec3000 t navi10_ih_early_init +ffffffff81ec3060 t navi10_ih_sw_init +ffffffff81ec31d0 t navi10_ih_sw_fini +ffffffff81ec3210 t navi10_ih_hw_init +ffffffff81ec3630 t navi10_ih_hw_fini +ffffffff81ec3690 t navi10_ih_suspend +ffffffff81ec36f0 t navi10_ih_resume +ffffffff81ec3700 t navi10_ih_is_idle +ffffffff81ec3730 t navi10_ih_wait_for_idle +ffffffff81ec3760 t navi10_ih_soft_reset +ffffffff81ec3790 t navi10_ih_set_clockgating_state +ffffffff81ec38c0 t navi10_ih_set_powergating_state +ffffffff81ec38f0 t navi10_ih_get_clockgating_state +ffffffff81ec3980 t navi10_ih_get_wptr +ffffffff81ec3a90 t navi10_ih_set_rptr +ffffffff81ec3b60 t navi10_ih_self_irq +ffffffff81ec3be0 t navi10_ih_toggle_interrupts +ffffffff81ec3d50 t force_update_wptr_for_self_int +ffffffff81ec5000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff81ec5040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff81ec5080 t nbio_v2_3_get_pcie_index_offset +ffffffff81ec50c0 t nbio_v2_3_get_pcie_data_offset +ffffffff81ec5100 t nbio_v2_3_get_rev_id +ffffffff81ec5160 t nbio_v2_3_mc_access_enable +ffffffff81ec5210 t nbio_v2_3_get_memsize +ffffffff81ec5280 t nbio_v2_3_sdma_doorbell_range +ffffffff81ec5320 t nbio_v2_3_vcn_doorbell_range +ffffffff81ec53a0 t nbio_v2_3_enable_doorbell_aperture +ffffffff81ec54a0 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff81ec5610 t nbio_v2_3_ih_doorbell_range +ffffffff81ec5730 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff81ec57d0 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff81ec5870 t nbio_v2_3_get_clockgating_state +ffffffff81ec58f0 t nbio_v2_3_ih_control +ffffffff81ec5a40 t nbio_v2_3_init_registers +ffffffff81ec5ad0 t nbio_v2_3_remap_hdp_registers +ffffffff81ec5be0 t nbio_v2_3_enable_aspm +ffffffff81ec5c80 t nbio_v2_3_program_aspm +ffffffff81ec6330 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff81ec63c0 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff81ec6430 t nbio_v2_3_clear_doorbell_interrupt +ffffffff81ec7000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff81ec7040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff81ec7080 t nbio_v4_3_get_pcie_index_offset +ffffffff81ec70b0 t nbio_v4_3_get_pcie_data_offset +ffffffff81ec70f0 t nbio_v4_3_get_rev_id +ffffffff81ec7180 t nbio_v4_3_mc_access_enable +ffffffff81ec7230 t nbio_v4_3_get_memsize +ffffffff81ec72a0 t nbio_v4_3_sdma_doorbell_range +ffffffff81ec7410 t nbio_v4_3_vcn_doorbell_range +ffffffff81ec75c0 t nbio_v4_3_gc_doorbell_init +ffffffff81ec76b0 t nbio_v4_3_enable_doorbell_aperture +ffffffff81ec77b0 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81ec7920 t nbio_v4_3_ih_doorbell_range +ffffffff81ec7a40 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81ec7b80 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81ec7cb0 t nbio_v4_3_get_clockgating_state +ffffffff81ec7dc0 t nbio_v4_3_ih_control +ffffffff81ec7f10 t nbio_v4_3_init_registers +ffffffff81ec8040 t nbio_v4_3_remap_hdp_registers +ffffffff81ec8150 t nbio_v4_3_program_aspm +ffffffff81ec8e50 t nbio_v4_3_get_rom_offset +ffffffff81ec8ee0 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81ec8f10 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81ec8f40 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81ec8f70 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81ec8fa0 t nbio_v4_3_handle_ras_err_event_athub_intr_no_bifring +ffffffff81ec90b0 t nbio_v4_3_init_ras_err_event_athub_interrupt +ffffffff81ec90f0 t nbio_v4_3_set_ras_err_event_athub_irq_state +ffffffff81ec9200 t nbio_v4_3_process_err_event_athub_irq +ffffffff81eca000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81eca040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81eca080 t nbio_v6_1_get_pcie_index_offset +ffffffff81eca0c0 t nbio_v6_1_get_pcie_data_offset +ffffffff81eca100 t nbio_v6_1_get_rev_id +ffffffff81eca190 t nbio_v6_1_mc_access_enable +ffffffff81eca240 t nbio_v6_1_get_memsize +ffffffff81eca2b0 t nbio_v6_1_sdma_doorbell_range +ffffffff81eca340 t nbio_v6_1_enable_doorbell_aperture +ffffffff81eca440 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff81eca5b0 t nbio_v6_1_ih_doorbell_range +ffffffff81eca6d0 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff81eca770 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff81eca810 t nbio_v6_1_get_clockgating_state +ffffffff81eca890 t nbio_v6_1_ih_control +ffffffff81eca9e0 t nbio_v6_1_init_registers +ffffffff81ecaab0 t nbio_v6_1_remap_hdp_registers +ffffffff81ecabc0 t nbio_v6_1_program_aspm +ffffffff81ecb000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff81ecb040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff81ecb080 t nbio_v7_0_get_pcie_index_offset +ffffffff81ecb0c0 t nbio_v7_0_get_pcie_data_offset +ffffffff81ecb100 t nbio_v7_0_get_rev_id +ffffffff81ecb190 t nbio_v7_0_mc_access_enable +ffffffff81ecb240 t nbio_v7_0_get_memsize +ffffffff81ecb2b0 t nbio_v7_0_sdma_doorbell_range +ffffffff81ecb340 t nbio_v7_0_vcn_doorbell_range +ffffffff81ecb3c0 t nbio_v7_0_enable_doorbell_aperture +ffffffff81ecb4c0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff81ecb4f0 t nbio_v7_0_ih_doorbell_range +ffffffff81ecb610 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff81ecb740 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff81ecb7e0 t nbio_v7_0_get_clockgating_state +ffffffff81ecb860 t nbio_v7_0_ih_control +ffffffff81ecb9b0 t nbio_v7_0_init_registers +ffffffff81ecba00 t nbio_v7_0_remap_hdp_registers +ffffffff81ecbb10 t nbio_7_0_read_syshub_ind_mmr +ffffffff81ecbbe0 t nbio_7_0_write_syshub_ind_mmr +ffffffff81ecc000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff81ecc040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff81ecc080 t nbio_v7_2_get_pcie_index_offset +ffffffff81ecc0c0 t nbio_v7_2_get_pcie_data_offset +ffffffff81ecc100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff81ecc130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff81ecc170 t nbio_v7_2_get_rev_id +ffffffff81ecc250 t nbio_v7_2_mc_access_enable +ffffffff81ecc390 t nbio_v7_2_get_memsize +ffffffff81ecc400 t nbio_v7_2_sdma_doorbell_range +ffffffff81ecc4a0 t nbio_v7_2_vcn_doorbell_range +ffffffff81ecc520 t nbio_v7_2_enable_doorbell_aperture +ffffffff81ecc600 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff81ecc770 t nbio_v7_2_ih_doorbell_range +ffffffff81ecc800 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff81ecc8c0 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff81ecca50 t nbio_v7_2_get_clockgating_state +ffffffff81eccae0 t nbio_v7_2_ih_control +ffffffff81eccc30 t nbio_v7_2_init_registers +ffffffff81eccdf0 t nbio_v7_2_remap_hdp_registers +ffffffff81ecd000 t nbio_v7_4_query_ras_error_count +ffffffff81ecd1a0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff81ecd3e0 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff81ecd590 t nbio_v7_4_init_ras_controller_interrupt +ffffffff81ecd5d0 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff81ecd610 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff81ecd650 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff81ecd690 t nbio_v7_4_get_pcie_index_offset +ffffffff81ecd6d0 t nbio_v7_4_get_pcie_data_offset +ffffffff81ecd710 t nbio_v7_4_get_rev_id +ffffffff81ecd7e0 t nbio_v7_4_mc_access_enable +ffffffff81ecd890 t nbio_v7_4_get_memsize +ffffffff81ecd900 t nbio_v7_4_sdma_doorbell_range +ffffffff81ecd9d0 t nbio_v7_4_vcn_doorbell_range +ffffffff81ecda70 t nbio_v7_4_enable_doorbell_aperture +ffffffff81ecdb70 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff81ecdce0 t nbio_v7_4_ih_doorbell_range +ffffffff81ecde00 t nbio_v7_4_enable_doorbell_interrupt +ffffffff81ecdf50 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff81ecdf80 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff81ece020 t nbio_v7_4_get_clockgating_state +ffffffff81ece0a0 t nbio_v7_4_ih_control +ffffffff81ece1f0 t nbio_v7_4_init_registers +ffffffff81ece2e0 t nbio_v7_4_remap_hdp_registers +ffffffff81ece3f0 t nbio_v7_4_program_aspm +ffffffff81ece800 t nbio_v7_4_set_ras_controller_irq_state +ffffffff81ece990 t nbio_v7_4_process_ras_controller_irq +ffffffff81ece9c0 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff81eceb50 t nbio_v7_4_process_err_event_athub_irq +ffffffff81ecf000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff81ecf040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff81ecf080 t nbio_v7_7_get_pcie_index_offset +ffffffff81ecf0c0 t nbio_v7_7_get_pcie_data_offset +ffffffff81ecf100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff81ecf130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81ecf170 t nbio_v7_7_get_rev_id +ffffffff81ecf200 t nbio_v7_7_mc_access_enable +ffffffff81ecf2b0 t nbio_v7_7_get_memsize +ffffffff81ecf320 t nbio_v7_7_sdma_doorbell_range +ffffffff81ecf3b0 t nbio_v7_7_vcn_doorbell_range +ffffffff81ecf430 t nbio_v7_7_enable_doorbell_aperture +ffffffff81ecf510 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81ecf680 t nbio_v7_7_ih_doorbell_range +ffffffff81ecf7a0 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81ecf8e0 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81ecfaf0 t nbio_v7_7_get_clockgating_state +ffffffff81ecfc00 t nbio_v7_7_ih_control +ffffffff81ecfd50 t nbio_v7_7_init_registers +ffffffff81ecfe70 t nbio_v7_7_remap_hdp_registers +ffffffff81ed0000 t nbio_v7_9_get_hdp_flush_req_offset +ffffffff81ed0040 t nbio_v7_9_get_hdp_flush_done_offset +ffffffff81ed0080 t nbio_v7_9_get_pcie_index_offset +ffffffff81ed00c0 t nbio_v7_9_get_pcie_data_offset +ffffffff81ed0100 t nbio_v7_9_get_pcie_index_hi_offset +ffffffff81ed0140 t nbio_v7_9_get_rev_id +ffffffff81ed01d0 t nbio_v7_9_mc_access_enable +ffffffff81ed0280 t nbio_v7_9_get_memsize +ffffffff81ed02f0 t nbio_v7_9_sdma_doorbell_range +ffffffff81ed0630 t nbio_v7_9_vcn_doorbell_range +ffffffff81ed07c0 t nbio_v7_9_enable_doorbell_aperture +ffffffff81ed0930 t nbio_v7_9_enable_doorbell_selfring_aperture +ffffffff81ed0aa0 t nbio_v7_9_ih_doorbell_range +ffffffff81ed0ba0 t nbio_v7_9_enable_doorbell_interrupt +ffffffff81ed0cb0 t nbio_v7_9_update_medium_grain_clock_gating +ffffffff81ed0ce0 t nbio_v7_9_update_medium_grain_light_sleep +ffffffff81ed0d10 t nbio_v7_9_get_clockgating_state +ffffffff81ed0d40 t nbio_v7_9_ih_control +ffffffff81ed0e90 t nbio_v7_9_init_registers +ffffffff81ed11a0 t nbio_v7_9_remap_hdp_registers +ffffffff81ed12b0 t nbio_v7_9_get_compute_partition_mode +ffffffff81ed1340 t nbio_v7_9_get_memory_partition_mode +ffffffff81ed1430 t nbio_v7_9_get_pcie_replay_count +ffffffff81ed1490 t nbio_v7_9_get_pcie_usage +ffffffff81ed15f0 t nbio_v7_9_query_ras_error_count +ffffffff81ed1620 t nbio_v7_9_handle_ras_controller_intr_no_bifring +ffffffff81ed1740 t nbio_v7_9_handle_ras_err_event_athub_intr_no_bifring +ffffffff81ed1850 t nbio_v7_9_init_ras_controller_interrupt +ffffffff81ed1890 t nbio_v7_9_init_ras_err_event_athub_interrupt +ffffffff81ed18d0 t nbio_v7_9_set_ras_controller_irq_state +ffffffff81ed1900 t nbio_v7_9_process_ras_controller_irq +ffffffff81ed1930 t nbio_v7_9_set_ras_err_event_athub_irq_state +ffffffff81ed1960 t nbio_v7_9_process_err_event_athub_irq +ffffffff81ed2000 T nv_grbm_select +ffffffff81ed20a0 T nv_set_virt_ops +ffffffff81ed20e0 t nv_common_early_init +ffffffff81ed24d0 t nv_common_late_init +ffffffff81ed2580 t nv_common_sw_init +ffffffff81ed25c0 t nv_common_sw_fini +ffffffff81ed25f0 t nv_common_hw_init +ffffffff81ed26f0 t nv_common_hw_fini +ffffffff81ed2750 t nv_common_suspend +ffffffff81ed27b0 t nv_common_resume +ffffffff81ed27f0 t nv_common_is_idle +ffffffff81ed2820 t nv_common_wait_for_idle +ffffffff81ed2850 t nv_common_soft_reset +ffffffff81ed2880 t nv_common_set_clockgating_state +ffffffff81ed2950 t nv_common_set_powergating_state +ffffffff81ed2980 t nv_common_get_clockgating_state +ffffffff81ed29f0 t nv_didt_rreg +ffffffff81ed2a90 t nv_didt_wreg +ffffffff81ed2b10 t nv_read_disabled_bios +ffffffff81ed2b40 t nv_read_register +ffffffff81ed2c30 t nv_asic_reset +ffffffff81ed2d70 t nv_asic_reset_method +ffffffff81ed2e60 t nv_get_xclk +ffffffff81ed2e90 t nv_set_uvd_clocks +ffffffff81ed2ec0 t nv_set_vce_clocks +ffffffff81ed2ef0 t nv_get_config_memsize +ffffffff81ed2f10 t nv_need_full_reset +ffffffff81ed2f40 t nv_init_doorbell_index +ffffffff81ed3070 t nv_need_reset_on_init +ffffffff81ed3110 t nv_pre_asic_init +ffffffff81ed3140 t nv_update_umd_stable_pstate +ffffffff81ed3200 t nv_query_video_codecs +ffffffff81ed4000 T psp_v10_0_set_psp_funcs +ffffffff81ed4030 t psp_v10_0_init_microcode +ffffffff81ed40f0 t psp_v10_0_ring_create +ffffffff81ed4400 t psp_v10_0_ring_stop +ffffffff81ed45f0 t psp_v10_0_ring_destroy +ffffffff81ed4670 t psp_v10_0_mode1_reset +ffffffff81ed46c0 t psp_v10_0_ring_get_wptr +ffffffff81ed4720 t psp_v10_0_ring_set_wptr +ffffffff81ed5000 T psp_v11_0_set_psp_funcs +ffffffff81ed5030 t psp_v11_0_init_microcode +ffffffff81ed5180 t psp_v11_0_bootloader_load_kdb +ffffffff81ed51a0 t psp_v11_0_bootloader_load_spl +ffffffff81ed51c0 t psp_v11_0_bootloader_load_sysdrv +ffffffff81ed51e0 t psp_v11_0_bootloader_load_sos +ffffffff81ed5540 t psp_v11_0_ring_create +ffffffff81ed5be0 t psp_v11_0_ring_stop +ffffffff81ed5e00 t psp_v11_0_ring_destroy +ffffffff81ed5e80 t psp_v11_0_mode1_reset +ffffffff81ed5f80 t psp_v11_0_memory_training +ffffffff81ed6400 t psp_v11_0_ring_get_wptr +ffffffff81ed6450 t psp_v11_0_ring_set_wptr +ffffffff81ed6590 t psp_v11_0_load_usbc_pd_fw +ffffffff81ed6780 t psp_v11_0_read_usbc_pd_fw +ffffffff81ed68a0 t psp_v11_0_bootloader_load_component +ffffffff81ed6a60 t psp_v11_0_wait_for_bootloader +ffffffff81ed6c30 t psp_v11_0_memory_training_send_msg +ffffffff81ed7000 T psp_v11_0_8_set_psp_funcs +ffffffff81ed7030 t psp_v11_0_8_ring_create +ffffffff81ed76d0 t psp_v11_0_8_ring_stop +ffffffff81ed7a60 t psp_v11_0_8_ring_destroy +ffffffff81ed7ae0 t psp_v11_0_8_ring_get_wptr +ffffffff81ed7b50 t psp_v11_0_8_ring_set_wptr +ffffffff81ed8000 T psp_v12_0_set_psp_funcs +ffffffff81ed8030 t psp_v12_0_init_microcode +ffffffff81ed80e0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81ed8410 t psp_v12_0_bootloader_load_sos +ffffffff81ed8790 t psp_v12_0_ring_create +ffffffff81ed9190 t psp_v12_0_ring_stop +ffffffff81ed93b0 t psp_v12_0_ring_destroy +ffffffff81ed9430 t psp_v12_0_mode1_reset +ffffffff81ed9530 t psp_v12_0_ring_get_wptr +ffffffff81ed95a0 t psp_v12_0_ring_set_wptr +ffffffff81eda000 T psp_v13_0_set_psp_funcs +ffffffff81eda030 t psp_v13_0_init_microcode +ffffffff81eda130 t psp_v13_0_wait_for_bootloader_steady_state +ffffffff81eda240 t psp_v13_0_bootloader_load_kdb +ffffffff81eda260 t psp_v13_0_bootloader_load_spl +ffffffff81eda280 t psp_v13_0_bootloader_load_sysdrv +ffffffff81eda2a0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81eda2c0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81eda2e0 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81eda300 t psp_v13_0_bootloader_load_ras_drv +ffffffff81eda320 t psp_v13_0_bootloader_load_sos +ffffffff81eda6f0 t psp_v13_0_ring_create +ffffffff81edad90 t psp_v13_0_ring_stop +ffffffff81edb120 t psp_v13_0_ring_destroy +ffffffff81edb1a0 t psp_v13_0_memory_training +ffffffff81edb5d0 t psp_v13_0_ring_get_wptr +ffffffff81edb640 t psp_v13_0_ring_set_wptr +ffffffff81edb740 t psp_v13_0_load_usbc_pd_fw +ffffffff81edb930 t psp_v13_0_read_usbc_pd_fw +ffffffff81edba50 t psp_v13_0_update_spirom +ffffffff81edbc30 t psp_v13_0_vbflash_status +ffffffff81edbc90 t psp_v13_0_fatal_error_recovery_quirk +ffffffff81edbdc0 t psp_v13_0_bootloader_load_component +ffffffff81edc030 t psp_v13_0_memory_training_send_msg +ffffffff81edc1a0 t psp_v13_0_exec_spi_cmd +ffffffff81edd000 T psp_v13_0_4_set_psp_funcs +ffffffff81edd030 t psp_v13_0_4_init_microcode +ffffffff81edd0d0 t psp_v13_0_4_bootloader_load_kdb +ffffffff81edd0f0 t psp_v13_0_4_bootloader_load_spl +ffffffff81edd110 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81edd130 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81edd150 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81edd170 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81edd190 t psp_v13_0_4_bootloader_load_sos +ffffffff81edd500 t psp_v13_0_4_ring_create +ffffffff81eddbb0 t psp_v13_0_4_ring_stop +ffffffff81eddf40 t psp_v13_0_4_ring_destroy +ffffffff81eddfc0 t psp_v13_0_4_ring_get_wptr +ffffffff81ede030 t psp_v13_0_4_ring_set_wptr +ffffffff81ede130 t psp_v13_0_4_bootloader_load_component +ffffffff81ede300 t psp_v13_0_4_wait_for_bootloader +ffffffff81edf000 T psp_v3_1_set_psp_funcs +ffffffff81edf030 t psp_v3_1_init_microcode +ffffffff81edf0c0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81edf3f0 t psp_v3_1_bootloader_load_sos +ffffffff81edf770 t psp_v3_1_ring_create +ffffffff81ee0290 t psp_v3_1_ring_stop +ffffffff81ee04b0 t psp_v3_1_ring_destroy +ffffffff81ee0530 t psp_v3_1_smu_reload_quirk +ffffffff81ee0580 t psp_v3_1_mode1_reset +ffffffff81ee0680 t psp_v3_1_ring_get_wptr +ffffffff81ee06d0 t psp_v3_1_ring_set_wptr +ffffffff81ee1000 t sdma_v2_4_early_init +ffffffff81ee10f0 t sdma_v2_4_sw_init +ffffffff81ee14a0 t sdma_v2_4_sw_fini +ffffffff81ee1550 t sdma_v2_4_hw_init +ffffffff81ee18f0 t sdma_v2_4_hw_fini +ffffffff81ee1930 t sdma_v2_4_suspend +ffffffff81ee1970 t sdma_v2_4_resume +ffffffff81ee1980 t sdma_v2_4_is_idle +ffffffff81ee19c0 t sdma_v2_4_wait_for_idle +ffffffff81ee1a60 t sdma_v2_4_soft_reset +ffffffff81ee1ba0 t sdma_v2_4_set_clockgating_state +ffffffff81ee1bd0 t sdma_v2_4_set_powergating_state +ffffffff81ee1c00 t sdma_v2_4_ring_get_rptr +ffffffff81ee1c40 t sdma_v2_4_ring_get_wptr +ffffffff81ee1ca0 t sdma_v2_4_ring_set_wptr +ffffffff81ee1ce0 t sdma_v2_4_ring_emit_ib +ffffffff81ee1f90 t sdma_v2_4_ring_emit_fence +ffffffff81ee2390 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81ee2610 t sdma_v2_4_ring_emit_vm_flush +ffffffff81ee2880 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81ee2b00 t sdma_v2_4_ring_test_ring +ffffffff81ee2de0 t sdma_v2_4_ring_test_ib +ffffffff81ee2fb0 t sdma_v2_4_ring_insert_nop +ffffffff81ee30e0 t sdma_v2_4_ring_pad_ib +ffffffff81ee3210 t sdma_v2_4_ring_emit_wreg +ffffffff81ee3360 t sdma_v2_4_emit_copy_buffer +ffffffff81ee3420 t sdma_v2_4_emit_fill_buffer +ffffffff81ee34b0 t sdma_v2_4_vm_copy_pte +ffffffff81ee3570 t sdma_v2_4_vm_write_pte +ffffffff81ee3640 t sdma_v2_4_vm_set_pte_pde +ffffffff81ee3740 t sdma_v2_4_set_trap_irq_state +ffffffff81ee3800 t sdma_v2_4_process_trap_irq +ffffffff81ee38a0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81ee3920 t sdma_v2_4_enable +ffffffff81ee4000 t sdma_v3_0_early_init +ffffffff81ee4100 t sdma_v3_0_sw_init +ffffffff81ee44c0 t sdma_v3_0_sw_fini +ffffffff81ee4570 t sdma_v3_0_hw_init +ffffffff81ee46a0 t sdma_v3_0_hw_fini +ffffffff81ee46f0 t sdma_v3_0_suspend +ffffffff81ee4740 t sdma_v3_0_resume +ffffffff81ee4750 t sdma_v3_0_is_idle +ffffffff81ee4790 t sdma_v3_0_wait_for_idle +ffffffff81ee4830 t sdma_v3_0_check_soft_reset +ffffffff81ee4890 t sdma_v3_0_pre_soft_reset +ffffffff81ee48e0 t sdma_v3_0_soft_reset +ffffffff81ee49b0 t sdma_v3_0_post_soft_reset +ffffffff81ee4a00 t sdma_v3_0_set_clockgating_state +ffffffff81ee4c60 t sdma_v3_0_set_powergating_state +ffffffff81ee4c90 t sdma_v3_0_get_clockgating_state +ffffffff81ee4d10 t sdma_v3_0_ring_get_rptr +ffffffff81ee4d50 t sdma_v3_0_ring_get_wptr +ffffffff81ee4dd0 t sdma_v3_0_ring_set_wptr +ffffffff81ee4e80 t sdma_v3_0_ring_emit_ib +ffffffff81ee5130 t sdma_v3_0_ring_emit_fence +ffffffff81ee5530 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81ee57b0 t sdma_v3_0_ring_emit_vm_flush +ffffffff81ee5a20 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81ee5ca0 t sdma_v3_0_ring_test_ring +ffffffff81ee5f80 t sdma_v3_0_ring_test_ib +ffffffff81ee6150 t sdma_v3_0_ring_insert_nop +ffffffff81ee6280 t sdma_v3_0_ring_pad_ib +ffffffff81ee63b0 t sdma_v3_0_ring_emit_wreg +ffffffff81ee6500 t sdma_v3_0_emit_copy_buffer +ffffffff81ee65c0 t sdma_v3_0_emit_fill_buffer +ffffffff81ee6650 t sdma_v3_0_vm_copy_pte +ffffffff81ee6710 t sdma_v3_0_vm_write_pte +ffffffff81ee67e0 t sdma_v3_0_vm_set_pte_pde +ffffffff81ee68e0 t sdma_v3_0_set_trap_irq_state +ffffffff81ee69a0 t sdma_v3_0_process_trap_irq +ffffffff81ee6a40 t sdma_v3_0_process_illegal_inst_irq +ffffffff81ee6ac0 t sdma_v3_0_ctx_switch_enable +ffffffff81ee6c60 t sdma_v3_0_enable +ffffffff81ee6dd0 t sdma_v3_0_gfx_resume +ffffffff81ee8000 t sdma_v4_0_early_init +ffffffff81ee82d0 t sdma_v4_0_late_init +ffffffff81ee8570 t sdma_v4_0_sw_init +ffffffff81ee89b0 t sdma_v4_0_sw_fini +ffffffff81ee8a70 t sdma_v4_0_hw_init +ffffffff81eeb9d0 t sdma_v4_0_hw_fini +ffffffff81eeba90 t sdma_v4_0_suspend +ffffffff81eebae0 t sdma_v4_0_resume +ffffffff81eebb60 t sdma_v4_0_is_idle +ffffffff81eebc90 t sdma_v4_0_wait_for_idle +ffffffff81eebe30 t sdma_v4_0_soft_reset +ffffffff81eebe60 t sdma_v4_0_set_clockgating_state +ffffffff81eec360 t sdma_v4_0_set_powergating_state +ffffffff81eec420 t sdma_v4_0_get_clockgating_state +ffffffff81eec4c0 t sdma_v4_0_query_ras_error_count +ffffffff81eec690 t sdma_v4_0_reset_ras_error_count +ffffffff81eec7e0 t sdma_v4_0_ring_get_rptr +ffffffff81eec840 t sdma_v4_0_ring_get_wptr +ffffffff81eeca30 t sdma_v4_0_ring_set_wptr +ffffffff81eeccb0 t sdma_v4_0_ring_emit_ib +ffffffff81eecf60 t sdma_v4_0_ring_emit_fence +ffffffff81eed380 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81eed3e0 t sdma_v4_0_ring_emit_vm_flush +ffffffff81eed400 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81eed4b0 t sdma_v4_0_ring_test_ring +ffffffff81eed790 t sdma_v4_0_ring_test_ib +ffffffff81eed960 t sdma_v4_0_ring_insert_nop +ffffffff81eeda90 t sdma_v4_0_ring_pad_ib +ffffffff81eedbc0 t sdma_v4_0_ring_emit_wreg +ffffffff81eedd10 t sdma_v4_0_ring_emit_reg_wait +ffffffff81eedd60 t sdma_v4_0_wait_reg_mem +ffffffff81eee070 t sdma_v4_0_page_ring_get_wptr +ffffffff81eee220 t sdma_v4_0_page_ring_set_wptr +ffffffff81eee3e0 t sdma_v4_0_emit_copy_buffer +ffffffff81eee4a0 t sdma_v4_0_emit_fill_buffer +ffffffff81eee530 t sdma_v4_0_vm_copy_pte +ffffffff81eee5f0 t sdma_v4_0_vm_write_pte +ffffffff81eee6c0 t sdma_v4_0_vm_set_pte_pde +ffffffff81eee7c0 t sdma_v4_0_set_trap_irq_state +ffffffff81eee960 t sdma_v4_0_process_trap_irq +ffffffff81eeea90 t sdma_v4_0_process_illegal_inst_irq +ffffffff81eeebb0 t sdma_v4_0_set_ecc_irq_state +ffffffff81eeed50 t sdma_v4_0_process_vm_hole_irq +ffffffff81eeed90 t sdma_v4_0_print_iv_entry +ffffffff81eeeed0 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81eeef10 t sdma_v4_0_process_pool_timeout_irq +ffffffff81eeef50 t sdma_v4_0_process_srbm_write_irq +ffffffff81eeef90 t sdma_v4_0_process_ras_data_cb +ffffffff81eef010 t sdma_v4_0_ctx_switch_enable +ffffffff81eef6e0 t sdma_v4_0_enable +ffffffff81eefca0 t sdma_v4_0_gfx_enable +ffffffff81ef1000 t sdma_v4_4_query_ras_error_count +ffffffff81ef1290 t sdma_v4_4_reset_ras_error_count +ffffffff81ef2000 t sdma_v4_4_2_early_init +ffffffff81ef2280 t sdma_v4_4_2_late_init +ffffffff81ef22f0 t sdma_v4_4_2_sw_init +ffffffff81ef2810 t sdma_v4_4_2_sw_fini +ffffffff81ef28c0 t sdma_v4_4_2_hw_init +ffffffff81ef2910 t sdma_v4_4_2_hw_fini +ffffffff81ef29d0 t sdma_v4_4_2_suspend +ffffffff81ef2ab0 t sdma_v4_4_2_resume +ffffffff81ef2b00 t sdma_v4_4_2_is_idle +ffffffff81ef2ba0 t sdma_v4_4_2_wait_for_idle +ffffffff81ef2cc0 t sdma_v4_4_2_soft_reset +ffffffff81ef2cf0 t sdma_v4_4_2_set_clockgating_state +ffffffff81ef30f0 t sdma_v4_4_2_set_powergating_state +ffffffff81ef3120 t sdma_v4_4_2_get_clockgating_state +ffffffff81ef3200 t sdma_v4_4_2_xcp_suspend +ffffffff81ef32c0 t sdma_v4_4_2_xcp_resume +ffffffff81ef3300 t sdma_v4_4_2_ring_get_rptr +ffffffff81ef3370 t sdma_v4_4_2_ring_get_wptr +ffffffff81ef34b0 t sdma_v4_4_2_ring_set_wptr +ffffffff81ef3670 t sdma_v4_4_2_ring_emit_ib +ffffffff81ef3920 t sdma_v4_4_2_ring_emit_fence +ffffffff81ef3d40 t sdma_v4_4_2_ring_emit_pipeline_sync +ffffffff81ef3da0 t sdma_v4_4_2_ring_emit_vm_flush +ffffffff81ef3dc0 t sdma_v4_4_2_ring_emit_hdp_flush +ffffffff81ef3e70 t sdma_v4_4_2_ring_test_ring +ffffffff81ef4150 t sdma_v4_4_2_ring_test_ib +ffffffff81ef4320 t sdma_v4_4_2_ring_insert_nop +ffffffff81ef4450 t sdma_v4_4_2_ring_pad_ib +ffffffff81ef4580 t sdma_v4_4_2_ring_emit_wreg +ffffffff81ef46d0 t sdma_v4_4_2_ring_emit_reg_wait +ffffffff81ef4720 t sdma_v4_4_2_wait_reg_mem +ffffffff81ef4a30 t sdma_v4_4_2_page_ring_get_wptr +ffffffff81ef4b30 t sdma_v4_4_2_page_ring_set_wptr +ffffffff81ef4c40 t sdma_v4_4_2_emit_copy_buffer +ffffffff81ef4d00 t sdma_v4_4_2_emit_fill_buffer +ffffffff81ef4d90 t sdma_v4_4_2_vm_copy_pte +ffffffff81ef4e50 t sdma_v4_4_2_vm_write_pte +ffffffff81ef4f20 t sdma_v4_4_2_vm_set_pte_pde +ffffffff81ef5020 t sdma_v4_4_2_set_trap_irq_state +ffffffff81ef5100 t sdma_v4_4_2_process_trap_irq +ffffffff81ef5220 t sdma_v4_4_2_process_illegal_inst_irq +ffffffff81ef52b0 t sdma_v4_4_2_set_ecc_irq_state +ffffffff81ef5390 t sdma_v4_4_2_process_vm_hole_irq +ffffffff81ef5470 t sdma_v4_4_2_process_doorbell_invalid_irq +ffffffff81ef5550 t sdma_v4_4_2_process_pool_timeout_irq +ffffffff81ef5630 t sdma_v4_4_2_process_srbm_write_irq +ffffffff81ef5710 t sdma_v4_4_2_query_ras_error_count +ffffffff81ef5860 t sdma_v4_4_2_reset_ras_error_count +ffffffff81ef5990 t sdma_v4_4_2_inst_init_golden_registers +ffffffff81ef5b10 t sdma_v4_4_2_inst_start +ffffffff81ef6eb0 t sdma_v4_4_2_inst_ctx_switch_enable +ffffffff81ef7180 t sdma_v4_4_2_inst_enable +ffffffff81ef8000 t sdma_v5_0_early_init +ffffffff81ef8130 t sdma_v5_0_sw_init +ffffffff81ef8310 t sdma_v5_0_sw_fini +ffffffff81ef83a0 t sdma_v5_0_hw_init +ffffffff81ef9600 t sdma_v5_0_hw_fini +ffffffff81ef9660 t sdma_v5_0_suspend +ffffffff81ef96c0 t sdma_v5_0_resume +ffffffff81ef96d0 t sdma_v5_0_is_idle +ffffffff81ef9760 t sdma_v5_0_wait_for_idle +ffffffff81ef9820 t sdma_v5_0_soft_reset +ffffffff81ef9850 t sdma_v5_0_set_clockgating_state +ffffffff81ef9a50 t sdma_v5_0_set_powergating_state +ffffffff81ef9a80 t sdma_v5_0_get_clockgating_state +ffffffff81ef9b20 t sdma_v5_0_ring_get_rptr +ffffffff81ef9b80 t sdma_v5_0_ring_get_wptr +ffffffff81ef9d20 t sdma_v5_0_ring_set_wptr +ffffffff81efa070 t sdma_v5_0_ring_emit_ib +ffffffff81efa330 t sdma_v5_0_ring_emit_fence +ffffffff81efa790 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81efaa10 t sdma_v5_0_ring_emit_vm_flush +ffffffff81efaa30 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81efacd0 t sdma_v5_0_ring_test_ring +ffffffff81efb090 t sdma_v5_0_ring_test_ib +ffffffff81efb3c0 t sdma_v5_0_ring_insert_nop +ffffffff81efb4f0 t sdma_v5_0_ring_pad_ib +ffffffff81efb620 t sdma_v5_0_ring_init_cond_exec +ffffffff81efb850 t sdma_v5_0_ring_patch_cond_exec +ffffffff81efb910 t sdma_v5_0_ring_emit_wreg +ffffffff81efba60 t sdma_v5_0_ring_emit_reg_wait +ffffffff81efbce0 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81efbd60 t sdma_v5_0_ring_preempt_ib +ffffffff81efbea0 t sdma_v5_0_ring_emit_mem_sync +ffffffff81efc0b0 t sdma_v5_0_emit_copy_buffer +ffffffff81efc170 t sdma_v5_0_emit_fill_buffer +ffffffff81efc200 t sdma_v5_0_vm_copy_pte +ffffffff81efc2c0 t sdma_v5_0_vm_write_pte +ffffffff81efc390 t sdma_v5_0_vm_set_pte_pde +ffffffff81efc490 t sdma_v5_0_set_trap_irq_state +ffffffff81efc520 t sdma_v5_0_process_trap_irq +ffffffff81efc630 t sdma_v5_0_process_illegal_inst_irq +ffffffff81efc660 t sdma_v5_0_mqd_init +ffffffff81efc740 t sdma_v5_0_ctx_switch_enable +ffffffff81efca80 t sdma_v5_0_enable +ffffffff81efd000 t sdma_v5_2_early_init +ffffffff81efd130 t sdma_v5_2_sw_init +ffffffff81efd390 t sdma_v5_2_sw_fini +ffffffff81efd420 t sdma_v5_2_hw_init +ffffffff81efefc0 t sdma_v5_2_hw_fini +ffffffff81eff020 t sdma_v5_2_suspend +ffffffff81eff080 t sdma_v5_2_resume +ffffffff81eff090 t sdma_v5_2_is_idle +ffffffff81eff140 t sdma_v5_2_wait_for_idle +ffffffff81eff240 t sdma_v5_2_soft_reset +ffffffff81eff500 t sdma_v5_2_set_clockgating_state +ffffffff81eff860 t sdma_v5_2_set_powergating_state +ffffffff81eff890 t sdma_v5_2_get_clockgating_state +ffffffff81eff920 t sdma_v5_2_ring_get_rptr +ffffffff81eff980 t sdma_v5_2_ring_get_wptr +ffffffff81effac0 t sdma_v5_2_ring_set_wptr +ffffffff81effc70 t sdma_v5_2_ring_emit_ib +ffffffff81efff30 t sdma_v5_2_ring_emit_fence +ffffffff81f00390 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81f00610 t sdma_v5_2_ring_emit_vm_flush +ffffffff81f00630 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81f008d0 t sdma_v5_2_ring_test_ring +ffffffff81f00c90 t sdma_v5_2_ring_test_ib +ffffffff81f00fc0 t sdma_v5_2_ring_insert_nop +ffffffff81f010f0 t sdma_v5_2_ring_pad_ib +ffffffff81f01220 t sdma_v5_2_ring_init_cond_exec +ffffffff81f01450 t sdma_v5_2_ring_patch_cond_exec +ffffffff81f01510 t sdma_v5_2_ring_begin_use +ffffffff81f01530 t sdma_v5_2_ring_end_use +ffffffff81f01550 t sdma_v5_2_ring_emit_wreg +ffffffff81f016a0 t sdma_v5_2_ring_emit_reg_wait +ffffffff81f01920 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81f019a0 t sdma_v5_2_ring_preempt_ib +ffffffff81f01b10 t sdma_v5_2_ring_emit_mem_sync +ffffffff81f01d20 t sdma_v5_2_emit_copy_buffer +ffffffff81f01de0 t sdma_v5_2_emit_fill_buffer +ffffffff81f01e70 t sdma_v5_2_vm_copy_pte +ffffffff81f01f30 t sdma_v5_2_vm_write_pte +ffffffff81f02000 t sdma_v5_2_vm_set_pte_pde +ffffffff81f02100 t sdma_v5_2_set_trap_irq_state +ffffffff81f021c0 t sdma_v5_2_process_trap_irq +ffffffff81f02300 t sdma_v5_2_process_illegal_inst_irq +ffffffff81f02330 t sdma_v5_2_mqd_init +ffffffff81f02410 t sdma_v5_2_ctx_switch_enable +ffffffff81f02820 t sdma_v5_2_enable +ffffffff81f03000 t sdma_v6_0_early_init +ffffffff81f03120 t sdma_v6_0_sw_init +ffffffff81f032e0 t sdma_v6_0_sw_fini +ffffffff81f03370 t sdma_v6_0_hw_init +ffffffff81f03380 t sdma_v6_0_hw_fini +ffffffff81f03450 t sdma_v6_0_suspend +ffffffff81f03490 t sdma_v6_0_resume +ffffffff81f034a0 t sdma_v6_0_is_idle +ffffffff81f03530 t sdma_v6_0_wait_for_idle +ffffffff81f035f0 t sdma_v6_0_check_soft_reset +ffffffff81f036b0 t sdma_v6_0_soft_reset +ffffffff81f03b70 t sdma_v6_0_set_clockgating_state +ffffffff81f03ba0 t sdma_v6_0_set_powergating_state +ffffffff81f03bd0 t sdma_v6_0_get_clockgating_state +ffffffff81f03c00 t sdma_v6_0_ring_get_rptr +ffffffff81f03c60 t sdma_v6_0_ring_get_wptr +ffffffff81f03cd0 t sdma_v6_0_ring_set_wptr +ffffffff81f04020 t sdma_v6_0_ring_emit_ib +ffffffff81f042e0 t sdma_v6_0_ring_emit_fence +ffffffff81f04740 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81f049c0 t sdma_v6_0_ring_emit_vm_flush +ffffffff81f04c30 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81f04ed0 t sdma_v6_0_ring_test_ring +ffffffff81f05290 t sdma_v6_0_ring_test_ib +ffffffff81f055c0 t sdma_v6_0_ring_insert_nop +ffffffff81f056f0 t sdma_v6_0_ring_pad_ib +ffffffff81f05820 t sdma_v6_0_ring_init_cond_exec +ffffffff81f05a50 t sdma_v6_0_ring_patch_cond_exec +ffffffff81f05b10 t sdma_v6_0_ring_emit_wreg +ffffffff81f05c60 t sdma_v6_0_ring_emit_reg_wait +ffffffff81f05ee0 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81f05f60 t sdma_v6_0_ring_preempt_ib +ffffffff81f060b0 t sdma_v6_0_ring_emit_mem_sync +ffffffff81f062c0 t sdma_v6_0_emit_copy_buffer +ffffffff81f06380 t sdma_v6_0_emit_fill_buffer +ffffffff81f06410 t sdma_v6_0_vm_copy_pte +ffffffff81f064d0 t sdma_v6_0_vm_write_pte +ffffffff81f065a0 t sdma_v6_0_vm_set_pte_pde +ffffffff81f066a0 t sdma_v6_0_set_trap_irq_state +ffffffff81f06730 t sdma_v6_0_process_trap_irq +ffffffff81f06860 t sdma_v6_0_process_illegal_inst_irq +ffffffff81f06890 t sdma_v6_0_mqd_init +ffffffff81f069b0 t sdma_v6_0_start +ffffffff81f06c90 t sdma_v6_0_enable +ffffffff81f06e20 t sdma_v6_0_gfx_resume +ffffffff81f07eb0 t sdma_v6_0_gfx_stop +ffffffff81f09000 T sienna_cichlid_reset_init +ffffffff81f090c0 t sienna_cichlid_async_reset +ffffffff81f09120 t sienna_cichlid_get_reset_handler +ffffffff81f091b0 T sienna_cichlid_reset_fini +ffffffff81f09210 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81f09360 t sienna_cichlid_mode2_perform_reset +ffffffff81f093e0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81f096d0 t sienna_cichlid_mode2_reset +ffffffff81f0a000 T smu_v11_0_i2c_control_init +ffffffff81f0a0d0 T smu_v11_0_i2c_control_fini +ffffffff81f0a110 t smu_v11_0_i2c_xfer +ffffffff81f0b2c0 t smu_v11_0_i2c_func +ffffffff81f0b2f0 t smu_v11_0_i2c_enable +ffffffff81f0b440 t smu_v11_0_i2c_abort +ffffffff81f0b550 t lock_bus +ffffffff81f0b5f0 t trylock_bus +ffffffff81f0b640 t unlock_bus +ffffffff81f0c000 T smu_v13_0_10_reset_init +ffffffff81f0c0c0 t smu_v13_0_10_async_reset +ffffffff81f0c120 t smu_v13_0_10_get_reset_handler +ffffffff81f0c1d0 T smu_v13_0_10_reset_fini +ffffffff81f0c230 t smu_v13_0_10_mode2_prepare_hwcontext +ffffffff81f0c360 t smu_v13_0_10_mode2_perform_reset +ffffffff81f0c3e0 t smu_v13_0_10_mode2_restore_hwcontext +ffffffff81f0c740 t smu_v13_0_10_mode2_reset +ffffffff81f0d000 t smuio_v11_0_get_rom_index_offset +ffffffff81f0d040 t smuio_v11_0_get_rom_data_offset +ffffffff81f0d080 t smuio_v11_0_update_rom_clock_gating +ffffffff81f0d1d0 t smuio_v11_0_get_clock_gating_state +ffffffff81f0e000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81f0e040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81f0e080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81f0e1d0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81f0f000 t smuio_v13_0_get_rom_index_offset +ffffffff81f0f040 t smuio_v13_0_get_rom_data_offset +ffffffff81f0f080 t smuio_v13_0_update_rom_clock_gating +ffffffff81f0f1d0 t smuio_v13_0_get_clock_gating_state +ffffffff81f0f270 t smuio_v13_0_get_die_id +ffffffff81f0f2f0 t smuio_v13_0_get_socket_id +ffffffff81f0f380 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81f10000 t smuio_v13_0_3_get_die_id +ffffffff81f10080 t smuio_v13_0_3_get_socket_id +ffffffff81f10110 t smuio_v13_0_3_get_pkg_type +ffffffff81f11000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81f11040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81f12000 t smuio_v9_0_get_rom_index_offset +ffffffff81f12040 t smuio_v9_0_get_rom_data_offset +ffffffff81f12080 t smuio_v9_0_update_rom_clock_gating +ffffffff81f121c0 t smuio_v9_0_get_clock_gating_state +ffffffff81f13000 T soc15_grbm_select +ffffffff81f13090 T soc15_program_register_sequence +ffffffff81f13290 T soc15_set_virt_ops +ffffffff81f13300 t soc15_common_early_init +ffffffff81f13720 t soc15_common_late_init +ffffffff81f13780 t soc15_common_sw_init +ffffffff81f137e0 t soc15_common_sw_fini +ffffffff81f13830 t soc15_common_hw_init +ffffffff81f13950 t soc15_common_hw_fini +ffffffff81f13a20 t soc15_common_suspend +ffffffff81f13a60 t soc15_common_resume +ffffffff81f13aa0 t soc15_common_is_idle +ffffffff81f13ad0 t soc15_common_wait_for_idle +ffffffff81f13b00 t soc15_common_soft_reset +ffffffff81f13b30 t soc15_common_set_clockgating_state +ffffffff81f13e70 t soc15_common_set_powergating_state +ffffffff81f13ea0 t soc15_common_get_clockgating_state +ffffffff81f13fd0 t soc15_uvd_ctx_rreg +ffffffff81f14070 t soc15_uvd_ctx_wreg +ffffffff81f14100 t soc15_didt_rreg +ffffffff81f141a0 t soc15_didt_wreg +ffffffff81f14220 t soc15_gc_cac_rreg +ffffffff81f14340 t soc15_gc_cac_wreg +ffffffff81f14450 t soc15_se_cac_rreg +ffffffff81f14570 t soc15_se_cac_wreg +ffffffff81f14680 t soc15_read_disabled_bios +ffffffff81f146b0 t soc15_read_register +ffffffff81f147b0 t soc15_asic_reset +ffffffff81f148b0 t soc15_asic_reset_method +ffffffff81f14a60 t soc15_get_xclk +ffffffff81f14ac0 t soc15_set_uvd_clocks +ffffffff81f14af0 t soc15_set_vce_clocks +ffffffff81f14b20 t soc15_get_config_memsize +ffffffff81f14b40 t soc15_need_full_reset +ffffffff81f14b70 t soc15_get_pcie_usage +ffffffff81f14ca0 t soc15_need_reset_on_init +ffffffff81f14d50 t soc15_get_pcie_replay_count +ffffffff81f14dc0 t soc15_supports_baco +ffffffff81f14e20 t soc15_pre_asic_init +ffffffff81f14e30 t soc15_query_video_codecs +ffffffff81f14f20 t vega20_get_pcie_usage +ffffffff81f16000 T soc21_grbm_select +ffffffff81f16090 t soc21_common_early_init +ffffffff81f16200 t soc21_common_late_init +ffffffff81f162e0 t soc21_common_sw_init +ffffffff81f16320 t soc21_common_sw_fini +ffffffff81f16350 t soc21_common_hw_init +ffffffff81f16410 t soc21_common_hw_fini +ffffffff81f164b0 t soc21_common_suspend +ffffffff81f16550 t soc21_common_resume +ffffffff81f16610 t soc21_common_is_idle +ffffffff81f16640 t soc21_common_wait_for_idle +ffffffff81f16670 t soc21_common_soft_reset +ffffffff81f166a0 t soc21_common_set_clockgating_state +ffffffff81f16750 t soc21_common_set_powergating_state +ffffffff81f167b0 t soc21_common_get_clockgating_state +ffffffff81f16800 t soc21_didt_rreg +ffffffff81f168a0 t soc21_didt_wreg +ffffffff81f16920 t soc21_read_disabled_bios +ffffffff81f16950 t soc21_read_register +ffffffff81f16a40 t soc21_asic_reset +ffffffff81f16b20 t soc21_asic_reset_method +ffffffff81f16be0 t soc21_get_xclk +ffffffff81f16c10 t soc21_set_uvd_clocks +ffffffff81f16c40 t soc21_set_vce_clocks +ffffffff81f16c70 t soc21_get_config_memsize +ffffffff81f16c90 t soc21_need_full_reset +ffffffff81f16cf0 t soc21_init_doorbell_index +ffffffff81f16e10 t soc21_need_reset_on_init +ffffffff81f16eb0 t soc21_pre_asic_init +ffffffff81f16ee0 t soc21_update_umd_stable_pstate +ffffffff81f16f60 t soc21_query_video_codecs +ffffffff81f18000 t tonga_ih_early_init +ffffffff81f18050 t tonga_ih_sw_init +ffffffff81f180d0 t tonga_ih_sw_fini +ffffffff81f18110 t tonga_ih_hw_init +ffffffff81f182f0 t tonga_ih_hw_fini +ffffffff81f18390 t tonga_ih_suspend +ffffffff81f18430 t tonga_ih_resume +ffffffff81f18470 t tonga_ih_is_idle +ffffffff81f184c0 t tonga_ih_wait_for_idle +ffffffff81f18560 t tonga_ih_check_soft_reset +ffffffff81f185c0 t tonga_ih_pre_soft_reset +ffffffff81f18670 t tonga_ih_soft_reset +ffffffff81f18740 t tonga_ih_post_soft_reset +ffffffff81f18780 t tonga_ih_set_clockgating_state +ffffffff81f187b0 t tonga_ih_set_powergating_state +ffffffff81f187e0 t tonga_ih_get_wptr +ffffffff81f188d0 t tonga_ih_decode_iv +ffffffff81f18950 t tonga_ih_set_rptr +ffffffff81f19000 t umc_v6_0_init_registers +ffffffff81f1a000 t umc_v6_1_query_ras_error_count +ffffffff81f1a4e0 t umc_v6_1_query_ras_error_address +ffffffff81f1a7c0 t umc_v6_1_err_cnt_init +ffffffff81f1b000 T umc_v6_7_convert_error_address +ffffffff81f1b320 t umc_v6_7_query_ras_error_count +ffffffff81f1b360 t umc_v6_7_query_ras_error_address +ffffffff81f1b380 t umc_v6_7_query_ras_poison_mode +ffffffff81f1b3e0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81f1b400 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81f1b420 t umc_v6_7_query_ecc_error_count +ffffffff81f1b690 t umc_v6_7_reset_error_count_per_channel +ffffffff81f1b790 t umc_v6_7_query_error_address +ffffffff81f1b8b0 t umc_v6_7_ecc_info_querry_ecc_error_count +ffffffff81f1ba80 t umc_v6_7_ecc_info_query_error_address +ffffffff81f1c000 t umc_v8_10_query_ras_error_count +ffffffff81f1c040 t umc_v8_10_query_ras_error_address +ffffffff81f1c060 t umc_v8_10_err_cnt_init +ffffffff81f1c080 t umc_v8_10_query_ras_poison_mode +ffffffff81f1c0b0 t umc_v8_10_ecc_info_query_ras_error_count +ffffffff81f1c0d0 t umc_v8_10_ecc_info_query_ras_error_address +ffffffff81f1c0f0 t umc_v8_10_set_eeprom_table_version +ffffffff81f1c120 t umc_v8_10_query_ecc_error_count +ffffffff81f1c1f0 t umc_v8_10_clear_error_count_per_channel +ffffffff81f1c260 t umc_v8_10_query_error_address +ffffffff81f1c390 t umc_v8_10_convert_error_address +ffffffff81f1c5b0 t umc_v8_10_err_cnt_init_per_channel +ffffffff81f1c660 t umc_v8_10_ecc_info_query_ecc_error_count +ffffffff81f1c740 t umc_v8_10_ecc_info_query_error_address +ffffffff81f1d000 t umc_v8_7_query_ras_error_count +ffffffff81f1d310 t umc_v8_7_query_ras_error_address +ffffffff81f1d4d0 t umc_v8_7_err_cnt_init +ffffffff81f1d630 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81f1d750 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81f1e000 t uvd_v5_0_early_init +ffffffff81f1e050 t uvd_v5_0_sw_init +ffffffff81f1e140 t uvd_v5_0_sw_fini +ffffffff81f1e190 t uvd_v5_0_hw_init +ffffffff81f1e690 t uvd_v5_0_hw_fini +ffffffff81f1e710 t uvd_v5_0_suspend +ffffffff81f1e810 t uvd_v5_0_resume +ffffffff81f1e860 t uvd_v5_0_is_idle +ffffffff81f1e8b0 t uvd_v5_0_wait_for_idle +ffffffff81f1e940 t uvd_v5_0_soft_reset +ffffffff81f1e9e0 t uvd_v5_0_set_clockgating_state +ffffffff81f1eb80 t uvd_v5_0_set_powergating_state +ffffffff81f1ebc0 t uvd_v5_0_get_clockgating_state +ffffffff81f1ec40 t uvd_v5_0_ring_get_rptr +ffffffff81f1ec80 t uvd_v5_0_ring_get_wptr +ffffffff81f1ecc0 t uvd_v5_0_ring_set_wptr +ffffffff81f1ecf0 t uvd_v5_0_ring_emit_ib +ffffffff81f1ef60 t uvd_v5_0_ring_emit_fence +ffffffff81f1f510 t uvd_v5_0_ring_test_ring +ffffffff81f1f6b0 t uvd_v5_0_ring_insert_nop +ffffffff81f1f810 t uvd_v5_0_set_interrupt_state +ffffffff81f1f840 t uvd_v5_0_process_interrupt +ffffffff81f1f8a0 t uvd_v5_0_stop +ffffffff81f1f9b0 t uvd_v5_0_start +ffffffff81f21000 t uvd_v6_0_early_init +ffffffff81f21160 t uvd_v6_0_sw_init +ffffffff81f213c0 t uvd_v6_0_sw_fini +ffffffff81f21480 t uvd_v6_0_hw_init +ffffffff81f21a30 t uvd_v6_0_hw_fini +ffffffff81f21ab0 t uvd_v6_0_suspend +ffffffff81f21bb0 t uvd_v6_0_resume +ffffffff81f21c00 t uvd_v6_0_is_idle +ffffffff81f21c50 t uvd_v6_0_wait_for_idle +ffffffff81f21ce0 t uvd_v6_0_check_soft_reset +ffffffff81f21d60 t uvd_v6_0_pre_soft_reset +ffffffff81f21da0 t uvd_v6_0_soft_reset +ffffffff81f21e70 t uvd_v6_0_post_soft_reset +ffffffff81f21f10 t uvd_v6_0_set_clockgating_state +ffffffff81f220a0 t uvd_v6_0_set_powergating_state +ffffffff81f22110 t uvd_v6_0_get_clockgating_state +ffffffff81f221a0 t uvd_v6_0_ring_get_rptr +ffffffff81f221e0 t uvd_v6_0_ring_get_wptr +ffffffff81f22220 t uvd_v6_0_ring_set_wptr +ffffffff81f22250 t uvd_v6_0_ring_emit_ib +ffffffff81f225b0 t uvd_v6_0_ring_emit_fence +ffffffff81f22b60 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81f22f50 t uvd_v6_0_ring_emit_vm_flush +ffffffff81f232b0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81f232e0 t uvd_v6_0_ring_test_ring +ffffffff81f23480 t uvd_v6_0_ring_insert_nop +ffffffff81f235e0 t uvd_v6_0_ring_emit_wreg +ffffffff81f23860 t uvd_v6_0_enc_ring_get_rptr +ffffffff81f238c0 t uvd_v6_0_enc_ring_get_wptr +ffffffff81f23920 t uvd_v6_0_enc_ring_set_wptr +ffffffff81f23960 t uvd_v6_0_enc_ring_emit_ib +ffffffff81f23ba0 t uvd_v6_0_enc_ring_emit_fence +ffffffff81f23de0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81f23f90 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81f241a0 t uvd_v6_0_enc_ring_test_ring +ffffffff81f242f0 t uvd_v6_0_enc_ring_test_ib +ffffffff81f247d0 t uvd_v6_0_enc_ring_insert_end +ffffffff81f24860 t uvd_v6_0_set_interrupt_state +ffffffff81f24890 t uvd_v6_0_process_interrupt +ffffffff81f24990 t uvd_v6_0_stop +ffffffff81f24aa0 t uvd_v6_0_start +ffffffff81f26000 t uvd_v7_0_early_init +ffffffff81f26270 t uvd_v7_0_sw_init +ffffffff81f26690 t uvd_v7_0_sw_fini +ffffffff81f26780 t uvd_v7_0_hw_init +ffffffff81f29540 t uvd_v7_0_hw_fini +ffffffff81f29850 t uvd_v7_0_suspend +ffffffff81f29900 t uvd_v7_0_resume +ffffffff81f29950 t uvd_v7_0_set_clockgating_state +ffffffff81f29980 t uvd_v7_0_ring_get_rptr +ffffffff81f29a20 t uvd_v7_0_ring_get_wptr +ffffffff81f29ac0 t uvd_v7_0_ring_set_wptr +ffffffff81f29b40 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81f29bb0 t uvd_v7_0_ring_emit_ib +ffffffff81f29f50 t uvd_v7_0_ring_emit_fence +ffffffff81f2a5a0 t uvd_v7_0_ring_emit_vm_flush +ffffffff81f2a610 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81f2a640 t uvd_v7_0_ring_test_ring +ffffffff81f2a8d0 t uvd_v7_0_ring_insert_nop +ffffffff81f2aa70 t uvd_v7_0_ring_emit_wreg +ffffffff81f2ad40 t uvd_v7_0_ring_emit_reg_wait +ffffffff81f2b0f0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81f2b1e0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81f2b2e0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81f2b3e0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81f2b620 t uvd_v7_0_enc_ring_emit_fence +ffffffff81f2b860 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81f2b8d0 t uvd_v7_0_enc_ring_test_ring +ffffffff81f2ba30 t uvd_v7_0_enc_ring_test_ib +ffffffff81f2bf10 t uvd_v7_0_enc_ring_insert_end +ffffffff81f2bfa0 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81f2c0f0 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81f2c2b0 t uvd_v7_0_set_interrupt_state +ffffffff81f2c2e0 t uvd_v7_0_process_interrupt +ffffffff81f2d000 t vce_v3_0_early_init +ffffffff81f2d180 t vce_v3_0_sw_init +ffffffff81f2d2e0 t vce_v3_0_sw_fini +ffffffff81f2d330 t vce_v3_0_hw_init +ffffffff81f2d400 t vce_v3_0_hw_fini +ffffffff81f2d4f0 t vce_v3_0_suspend +ffffffff81f2d5c0 t vce_v3_0_resume +ffffffff81f2d6a0 t vce_v3_0_is_idle +ffffffff81f2d710 t vce_v3_0_wait_for_idle +ffffffff81f2d7c0 t vce_v3_0_check_soft_reset +ffffffff81f2d8c0 t vce_v3_0_pre_soft_reset +ffffffff81f2d960 t vce_v3_0_soft_reset +ffffffff81f2da30 t vce_v3_0_post_soft_reset +ffffffff81f2dad0 t vce_v3_0_set_clockgating_state +ffffffff81f2ddc0 t vce_v3_0_set_powergating_state +ffffffff81f2e5e0 t vce_v3_0_get_clockgating_state +ffffffff81f2e6a0 t vce_v3_0_ring_get_rptr +ffffffff81f2e770 t vce_v3_0_ring_get_wptr +ffffffff81f2e840 t vce_v3_0_ring_set_wptr +ffffffff81f2e900 t vce_v3_0_ring_emit_ib +ffffffff81f2eb40 t vce_v3_0_emit_pipeline_sync +ffffffff81f2ecf0 t vce_v3_0_emit_vm_flush +ffffffff81f2ef60 t vce_v3_0_set_interrupt_state +ffffffff81f2efd0 t vce_v3_0_process_interrupt +ffffffff81f2f090 t vce_v3_0_stop +ffffffff81f30000 t vce_v4_0_early_init +ffffffff81f300b0 t vce_v4_0_sw_init +ffffffff81f30350 t vce_v4_0_sw_fini +ffffffff81f303d0 t vce_v4_0_hw_init +ffffffff81f30b90 t vce_v4_0_hw_fini +ffffffff81f30cc0 t vce_v4_0_suspend +ffffffff81f30de0 t vce_v4_0_resume +ffffffff81f30e90 t vce_v4_0_set_clockgating_state +ffffffff81f30ec0 t vce_v4_0_set_powergating_state +ffffffff81f30fa0 t vce_v4_0_ring_get_rptr +ffffffff81f31010 t vce_v4_0_ring_get_wptr +ffffffff81f310a0 t vce_v4_0_ring_set_wptr +ffffffff81f31130 t vce_v4_0_ring_emit_ib +ffffffff81f31370 t vce_v4_0_ring_emit_fence +ffffffff81f315b0 t vce_v4_0_emit_vm_flush +ffffffff81f31620 t vce_v4_0_ring_insert_end +ffffffff81f316b0 t vce_v4_0_emit_wreg +ffffffff81f31800 t vce_v4_0_emit_reg_wait +ffffffff81f319c0 t vce_v4_0_set_interrupt_state +ffffffff81f31a50 t vce_v4_0_process_interrupt +ffffffff81f31af0 t vce_v4_0_start +ffffffff81f33000 T vcn_dec_sw_ring_emit_fence +ffffffff81f33240 T vcn_dec_sw_ring_insert_end +ffffffff81f332d0 T vcn_dec_sw_ring_emit_ib +ffffffff81f33510 T vcn_dec_sw_ring_emit_reg_wait +ffffffff81f336d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81f33740 T vcn_dec_sw_ring_emit_wreg +ffffffff81f34000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81f34140 T vcn_v1_0_ring_end_use +ffffffff81f341b0 t vcn_v1_0_early_init +ffffffff81f34310 t vcn_v1_0_sw_init +ffffffff81f345b0 t vcn_v1_0_sw_fini +ffffffff81f34610 t vcn_v1_0_hw_init +ffffffff81f346e0 t vcn_v1_0_hw_fini +ffffffff81f347e0 t vcn_v1_0_suspend +ffffffff81f34850 t vcn_v1_0_resume +ffffffff81f34930 t vcn_v1_0_is_idle +ffffffff81f349c0 t vcn_v1_0_wait_for_idle +ffffffff81f34a00 t vcn_v1_0_set_clockgating_state +ffffffff81f34ab0 t vcn_v1_0_set_powergating_state +ffffffff81f35010 t vcn_v1_0_dec_ring_get_rptr +ffffffff81f350a0 t vcn_v1_0_dec_ring_get_wptr +ffffffff81f35130 t vcn_v1_0_dec_ring_set_wptr +ffffffff81f35240 t vcn_v1_0_ring_patch_cs_in_place +ffffffff81f35400 t vcn_v1_0_dec_ring_emit_ib +ffffffff81f35780 t vcn_v1_0_dec_ring_emit_fence +ffffffff81f35d90 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff81f35e00 t vcn_v1_0_dec_ring_insert_nop +ffffffff81f35f90 t vcn_v1_0_dec_ring_insert_start +ffffffff81f36160 t vcn_v1_0_dec_ring_insert_end +ffffffff81f36270 t vcn_v1_0_ring_begin_use +ffffffff81f36310 t vcn_v1_0_dec_ring_emit_wreg +ffffffff81f365c0 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff81f36940 t vcn_v1_0_enc_ring_get_rptr +ffffffff81f36a20 t vcn_v1_0_enc_ring_get_wptr +ffffffff81f36b00 t vcn_v1_0_enc_ring_set_wptr +ffffffff81f36bc0 t vcn_v1_0_enc_ring_emit_ib +ffffffff81f36e00 t vcn_v1_0_enc_ring_emit_fence +ffffffff81f37040 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81f370b0 t vcn_v1_0_enc_ring_insert_end +ffffffff81f37140 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81f37290 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81f37450 t vcn_v1_0_set_interrupt_state +ffffffff81f37480 t vcn_v1_0_process_interrupt +ffffffff81f37530 t vcn_v1_0_idle_work_handler +ffffffff81f376a0 t vcn_v1_0_pause_dpg_mode +ffffffff81f38540 t vcn_v1_0_enable_clock_gating +ffffffff81f38970 t vcn_v1_0_disable_clock_gating +ffffffff81f38f30 t vcn_1_0_enable_static_power_gating +ffffffff81f390e0 t vcn_v1_0_start_dpg_mode +ffffffff81f3cea0 t vcn_v1_0_start_spg_mode +ffffffff81f3f0a0 t vcn_v1_0_clock_gating_dpg_mode +ffffffff81f40000 T vcn_v2_0_dec_ring_insert_start +ffffffff81f401c0 T vcn_v2_0_dec_ring_insert_end +ffffffff81f402c0 T vcn_v2_0_dec_ring_insert_nop +ffffffff81f40430 T vcn_v2_0_dec_ring_emit_fence +ffffffff81f409f0 T vcn_v2_0_dec_ring_emit_ib +ffffffff81f40d50 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff81f410a0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff81f41110 T vcn_v2_0_dec_ring_emit_wreg +ffffffff81f41390 T vcn_v2_0_enc_ring_emit_fence +ffffffff81f415d0 T vcn_v2_0_enc_ring_insert_end +ffffffff81f41660 T vcn_v2_0_enc_ring_emit_ib +ffffffff81f418a0 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff81f41a60 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff81f41ad0 T vcn_v2_0_enc_ring_emit_wreg +ffffffff81f41c20 T vcn_v2_0_dec_ring_test_ring +ffffffff81f41ec0 t vcn_v2_0_early_init +ffffffff81f42020 t vcn_v2_0_sw_init +ffffffff81f42350 t vcn_v2_0_sw_fini +ffffffff81f423d0 t vcn_v2_0_hw_init +ffffffff81f42d50 t vcn_v2_0_hw_fini +ffffffff81f42e50 t vcn_v2_0_suspend +ffffffff81f42e80 t vcn_v2_0_resume +ffffffff81f42ed0 t vcn_v2_0_is_idle +ffffffff81f42f60 t vcn_v2_0_wait_for_idle +ffffffff81f42fa0 t vcn_v2_0_set_clockgating_state +ffffffff81f43030 t vcn_v2_0_set_powergating_state +ffffffff81f435f0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81f43680 t vcn_v2_0_dec_ring_get_wptr +ffffffff81f43720 t vcn_v2_0_dec_ring_set_wptr +ffffffff81f43860 t vcn_v2_0_enc_ring_get_rptr +ffffffff81f43940 t vcn_v2_0_enc_ring_get_wptr +ffffffff81f43a30 t vcn_v2_0_enc_ring_set_wptr +ffffffff81f43b20 t vcn_v2_0_set_interrupt_state +ffffffff81f43b50 t vcn_v2_0_process_interrupt +ffffffff81f43c00 t vcn_v2_0_pause_dpg_mode +ffffffff81f443f0 t vcn_v2_0_enable_clock_gating +ffffffff81f44680 t vcn_v2_0_disable_clock_gating +ffffffff81f44aa0 t vcn_v2_0_start +ffffffff81f49050 t vcn_v2_0_enable_static_power_gating +ffffffff81f491b0 t vcn_v2_0_clock_gating_dpg_mode +ffffffff81f49f30 t vcn_v2_0_mc_resume_dpg_mode +ffffffff81f4f000 t vcn_v2_6_query_poison_status +ffffffff81f4f0e0 t vcn_v2_5_early_init +ffffffff81f4f3b0 t vcn_v2_5_sw_init +ffffffff81f4f880 t vcn_v2_5_sw_fini +ffffffff81f4f950 t vcn_v2_5_hw_init +ffffffff81f50390 t vcn_v2_5_hw_fini +ffffffff81f50500 t vcn_v2_5_suspend +ffffffff81f50530 t vcn_v2_5_resume +ffffffff81f50580 t vcn_v2_5_is_idle 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vcn_v3_0_hw_init +ffffffff81f5e310 t vcn_v3_0_hw_fini +ffffffff81f5e410 t vcn_v3_0_suspend +ffffffff81f5e440 t vcn_v3_0_resume +ffffffff81f5e490 t vcn_v3_0_is_idle +ffffffff81f5e580 t vcn_v3_0_wait_for_idle +ffffffff81f5e620 t vcn_v3_0_set_clockgating_state +ffffffff81f5e730 t vcn_v3_0_set_powergating_state +ffffffff81f60cc0 t vcn_v3_0_dec_ring_get_rptr +ffffffff81f60d60 t vcn_v3_0_dec_ring_get_wptr +ffffffff81f60e10 t vcn_v3_0_dec_ring_set_wptr +ffffffff81f60f80 t vcn_v3_0_ring_patch_cs_in_place +ffffffff81f612a0 t vcn_v3_0_enc_ring_get_rptr +ffffffff81f61390 t vcn_v3_0_enc_ring_get_wptr +ffffffff81f614a0 t vcn_v3_0_enc_ring_set_wptr +ffffffff81f615b0 t vcn_v3_0_set_interrupt_state +ffffffff81f615e0 t vcn_v3_0_process_interrupt +ffffffff81f616d0 t vcn_v3_0_pause_dpg_mode +ffffffff81f61f00 t vcn_v3_0_enable_clock_gating +ffffffff81f62190 t vcn_v3_0_disable_clock_gating +ffffffff81f626c0 t vcn_v3_0_start_dpg_mode +ffffffff81f659b0 t vcn_v3_0_clock_gating_dpg_mode +ffffffff81f66790 t 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dm_pp_apply_power_level_change_request +ffffffff81fae900 T dm_pp_apply_clock_for_voltage_request +ffffffff81fae9a0 T dm_pp_get_static_clocks +ffffffff81faea60 T dm_pp_get_funcs +ffffffff81faeb70 t pp_rv_set_wm_ranges +ffffffff81faecf0 t pp_rv_set_pme_wa_enable +ffffffff81faed10 t pp_rv_set_active_display_count +ffffffff81faed30 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff81faed50 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff81faed70 t pp_rv_set_hard_min_fclk_by_freq +ffffffff81faed90 t pp_nv_set_display_count +ffffffff81faedf0 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff81faee60 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff81faeec0 t pp_nv_set_voltage_by_freq +ffffffff81faef50 t pp_nv_set_wm_ranges +ffffffff81faefa0 t pp_nv_set_hard_min_uclk_by_freq +ffffffff81faf010 t pp_nv_get_maximum_sustainable_clocks +ffffffff81faf070 t pp_nv_get_uclk_dpm_states +ffffffff81faf0d0 t pp_nv_set_pstate_handshake_support +ffffffff81faf120 t pp_rn_set_wm_ranges +ffffffff81faf170 t pp_rn_get_dpm_clock_table +ffffffff81fb0000 T amdgpu_dm_set_psr_caps +ffffffff81fb0150 T amdgpu_dm_link_setup_psr +ffffffff81fb02e0 T amdgpu_dm_psr_enable +ffffffff81fb03e0 T amdgpu_dm_psr_disable +ffffffff81fb0460 T amdgpu_dm_psr_disable_all +ffffffff81fb1000 T amdgpu_dm_setup_replay +ffffffff81fb10f0 T amdgpu_dm_replay_enable +ffffffff81fb1270 T amdgpu_dm_replay_disable +ffffffff81fb2000 T dm_get_elapse_time_in_ns +ffffffff81fb2030 T dm_perf_trace_timestamp +ffffffff81fb3000 T dc_assert_fp_enabled +ffffffff81fb3070 T dc_fpu_begin +ffffffff81fb30c0 T dc_fpu_end +ffffffff81fb4000 T dal_vector_construct +ffffffff81fb40d0 T dal_vector_presized_create +ffffffff81fb4340 T dal_vector_create +ffffffff81fb4460 T dal_vector_destruct +ffffffff81fb44b0 T dal_vector_destroy +ffffffff81fb4530 T dal_vector_get_count +ffffffff81fb4560 T dal_vector_at_index +ffffffff81fb45a0 T dal_vector_remove_at_index +ffffffff81fb4630 T dal_vector_set_at_index +ffffffff81fb4690 T dal_vector_insert_at +ffffffff81fb4790 T dal_vector_reserve +ffffffff81fb4840 T dal_vector_append +ffffffff81fb4940 T dal_vector_clone +ffffffff81fb49f0 T dal_vector_capacity +ffffffff81fb4a20 T dal_vector_clear +ffffffff81fb5000 T fixed_point_to_int_frac +ffffffff81fb51f0 T convert_float_matrix +ffffffff81fb52b0 T reduce_fraction +ffffffff81fb6000 T is_rgb_cspace +ffffffff81fb6080 T is_lower_pipe_tree_visible +ffffffff81fb60e0 T is_upper_pipe_tree_visible +ffffffff81fb6140 T is_pipe_tree_visible +ffffffff81fb61c0 T build_prescale_params +ffffffff81fb7000 T dc_fixpt_from_fraction +ffffffff81fb71c0 T dc_fixpt_mul +ffffffff81fb7360 T dc_fixpt_sqr +ffffffff81fb74d0 T dc_fixpt_recip +ffffffff81fb7540 T dc_fixpt_sinc +ffffffff81fb7730 T dc_fixpt_sin +ffffffff81fb7760 T dc_fixpt_cos +ffffffff81fb7850 T dc_fixpt_exp +ffffffff81fb7b30 t fixed31_32_exp_from_taylor_series +ffffffff81fb7f10 T dc_fixpt_log +ffffffff81fb8120 T dc_fixpt_u4d19 +ffffffff81fb8160 T dc_fixpt_u3d19 +ffffffff81fb81a0 T dc_fixpt_u2d19 +ffffffff81fb81e0 T dc_fixpt_u0d19 +ffffffff81fb8210 T dc_fixpt_clamp_u0d14 +ffffffff81fb8260 T dc_fixpt_clamp_u0d10 +ffffffff81fb82b0 T dc_fixpt_s4d19 +ffffffff81fb9000 T bios_parser_create +ffffffff81fba270 t bios_parser_get_connectors_number +ffffffff81fba2d0 t bios_parser_get_connector_id +ffffffff81fba360 t bios_parser_get_src_obj +ffffffff81fba460 t bios_parser_get_i2c_info +ffffffff81fba680 t bios_parser_get_hpd_info +ffffffff81fba760 t bios_parser_get_device_tag +ffffffff81fba960 t bios_parser_get_spread_spectrum_info +ffffffff81fbab60 t bios_parser_get_ss_entry_number +ffffffff81fbada0 t bios_parser_get_embedded_panel_info +ffffffff81fbb310 t bios_parser_get_gpio_pin_info +ffffffff81fbb420 t bios_parser_get_encoder_cap_info +ffffffff81fbb520 t bios_parser_set_scratch_critical_state +ffffffff81fbb530 t bios_parser_is_device_id_supported +ffffffff81fbb5f0 t bios_parser_encoder_control +ffffffff81fbb630 t bios_parser_transmitter_control +ffffffff81fbb670 t bios_parser_enable_crtc +ffffffff81fbb6c0 t bios_parser_adjust_pixel_clock +ffffffff81fbb700 t bios_parser_set_pixel_clock +ffffffff81fbb740 t bios_parser_set_dce_clock +ffffffff81fbb780 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff81fbb7d0 t bios_parser_program_crtc_timing +ffffffff81fbb810 t bios_parser_program_display_engine_pll +ffffffff81fbb850 t bios_parser_enable_disp_power_gating +ffffffff81fbb890 t bios_parser_destroy +ffffffff81fbb950 t bios_get_board_layout_info +ffffffff81fbbbd0 t get_bios_object +ffffffff81fbbda0 t get_ss_info_from_ss_info_table +ffffffff81fbbf70 t get_ss_info_v3_1 +ffffffff81fbc0e0 t get_ss_entry_number_from_ss_info_tbl +ffffffff81fbd000 T firmware_parser_create +ffffffff81fbee70 t bios_parser_get_connectors_number +ffffffff81fbefe0 t bios_parser_get_connector_id +ffffffff81fbf040 t bios_parser_get_src_obj +ffffffff81fbf2e0 t bios_parser_get_i2c_info +ffffffff81fbf580 t bios_parser_get_hpd_info +ffffffff81fbf6f0 t bios_parser_get_device_tag +ffffffff81fbf9c0 t bios_parser_get_spread_spectrum_info +ffffffff81fbfe40 t bios_parser_get_ss_entry_number +ffffffff81fbfe70 t bios_parser_get_embedded_panel_info +ffffffff81fc0070 t bios_parser_get_gpio_pin_info +ffffffff81fc0190 t bios_parser_get_encoder_cap_info +ffffffff81fc0300 t bios_parser_is_accelerated_mode +ffffffff81fc0310 t bios_parser_set_scratch_critical_state +ffffffff81fc0320 t bios_parser_is_device_id_supported +ffffffff81fc0390 t bios_parser_encoder_control +ffffffff81fc03d0 t bios_parser_transmitter_control +ffffffff81fc0410 t bios_parser_enable_crtc +ffffffff81fc0460 t bios_parser_set_pixel_clock +ffffffff81fc04a0 t bios_parser_set_dce_clock +ffffffff81fc04e0 t bios_parser_program_crtc_timing +ffffffff81fc0520 t bios_parser_enable_disp_power_gating +ffffffff81fc0560 t firmware_parser_destroy +ffffffff81fc0620 t bios_get_board_layout_info +ffffffff81fc0ac0 t bios_parser_pack_data_tables +ffffffff81fc0af0 t bios_get_atom_dc_golden_table +ffffffff81fc0c30 t bios_parser_enable_lvtma_control +ffffffff81fc0c80 t bios_parser_get_soc_bb_info +ffffffff81fc0d90 t bios_parser_get_disp_connector_caps_info +ffffffff81fc0ef0 t bios_parser_get_lttpr_caps +ffffffff81fc1040 t bios_parser_get_lttpr_interop +ffffffff81fc1180 t bios_parser_get_connector_speed_cap_info +ffffffff81fc12d0 t get_bios_object +ffffffff81fc1430 t get_bios_object_from_path_v3 +ffffffff81fc2000 T object_id_from_bios_object_id +ffffffff81fc3000 T bios_get_image +ffffffff81fc3050 T bios_is_accelerated_mode +ffffffff81fc30b0 T bios_set_scratch_acc_mode_change +ffffffff81fc30f0 T bios_set_scratch_critical_state +ffffffff81fc3130 T bios_get_vga_enabled_displays +ffffffff81fc4000 T dal_bios_parser_create +ffffffff81fc4070 T dal_bios_parser_destroy +ffffffff81fc5000 T dal_bios_parser_init_cmd_tbl +ffffffff81fc5810 t encoder_control_digx_v3 +ffffffff81fc5910 t encoder_control_digx_v4 +ffffffff81fc5a10 t encoder_control_digx_v5 +ffffffff81fc5b60 t encoder_control_dig1_v1 +ffffffff81fc5be0 t encoder_control_dig2_v1 +ffffffff81fc5c60 t encoder_control_dig_v1 +ffffffff81fc5cc0 t transmitter_control_v2 +ffffffff81fc5e60 t transmitter_control_v3 +ffffffff81fc6010 t transmitter_control_v4 +ffffffff81fc61c0 t transmitter_control_v1_5 +ffffffff81fc6330 t transmitter_control_v1_6 +ffffffff81fc6490 t set_pixel_clock_v3 +ffffffff81fc6600 t set_pixel_clock_v5 +ffffffff81fc67a0 t set_pixel_clock_v6 +ffffffff81fc6940 t set_pixel_clock_v7 +ffffffff81fc6b10 t enable_spread_spectrum_on_ppll_v1 +ffffffff81fc6c30 t enable_spread_spectrum_on_ppll_v2 +ffffffff81fc6d60 t enable_spread_spectrum_on_ppll_v3 +ffffffff81fc6e70 t adjust_display_pll_v2 +ffffffff81fc6fc0 t adjust_display_pll_v3 +ffffffff81fc7130 t dac1_encoder_control_v1 +ffffffff81fc71b0 t dac2_encoder_control_v1 +ffffffff81fc7230 t dac1_output_control_v1 +ffffffff81fc7290 t dac2_output_control_v1 +ffffffff81fc72f0 t set_crtc_using_dtd_timing_v3 +ffffffff81fc7440 t set_crtc_timing_v1 +ffffffff81fc75c0 t enable_crtc_v1 +ffffffff81fc7660 t enable_crtc_mem_req_v1 +ffffffff81fc7700 t program_clock_v5 +ffffffff81fc7810 t program_clock_v6 +ffffffff81fc7930 t external_encoder_control_v3 +ffffffff81fc7ae0 t enable_disp_power_gating_v2_1 +ffffffff81fc7bb0 t set_dce_clock_v2_1 +ffffffff81fc8000 T dal_firmware_parser_init_cmd_tbl +ffffffff81fc83d0 t encoder_control_digx_v1_5 +ffffffff81fc85a0 t encoder_control_fallback +ffffffff81fc8600 t transmitter_control_v1_6 +ffffffff81fc87a0 t transmitter_control_v1_7 +ffffffff81fc8990 t transmitter_control_fallback +ffffffff81fc89f0 t set_pixel_clock_v7 +ffffffff81fc8c40 t set_pixel_clock_fallback +ffffffff81fc8ca0 t set_crtc_using_dtd_timing_v3 +ffffffff81fc8df0 t enable_crtc_v1 +ffffffff81fc8e90 t external_encoder_control_v3 +ffffffff81fc8ec0 t enable_disp_power_gating_v2_1 +ffffffff81fc9010 t enable_disp_power_gating_fallback +ffffffff81fc9070 t set_dce_clock_v2_1 +ffffffff81fc91a0 t get_smu_clock_info_v3_1 +ffffffff81fc9210 t enable_lvtma_control +ffffffff81fca000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81fca0a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81fca1c0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81fca240 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81fca2d0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81fca390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81fca470 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff81fcb000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff81fcb0b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff81fcb1c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81fcb240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81fcb2d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81fcb3b0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81fcc000 T dal_cmd_tbl_helper_dce110_get_table ffffffff81fcc030 t encoder_action_to_atom ffffffff81fcc0b0 t engine_bp_to_atom ffffffff81fcc100 t clock_source_id_to_atom -ffffffff81fcc1d0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81fcc220 t signal_type_to_atom_dig_mode -ffffffff81fcc280 t hpd_sel_to_atom -ffffffff81fcc2c0 t dig_encoder_sel_to_atom -ffffffff81fcc2f0 t phy_id_to_atom -ffffffff81fcc330 t disp_power_gating_action_to_atom -ffffffff81fcc3a0 t dc_clock_type_to_atom -ffffffff81fcc420 t transmitter_color_depth_to_atom -ffffffff81fcd000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff81fcc1a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81fcc1f0 t signal_type_to_atom_dig_mode +ffffffff81fcc250 t hpd_sel_to_atom +ffffffff81fcc290 t dig_encoder_sel_to_atom +ffffffff81fcc2c0 t phy_id_to_atom +ffffffff81fcc300 t disp_power_gating_action_to_atom +ffffffff81fcd000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff81fcd030 t encoder_action_to_atom ffffffff81fcd0b0 t engine_bp_to_atom ffffffff81fcd100 t clock_source_id_to_atom @@ -31005,7 +30993,7 @@ ffffffff81fcd2f0 t phy_id_to_atom ffffffff81fcd330 t disp_power_gating_action_to_atom ffffffff81fcd3a0 t dc_clock_type_to_atom ffffffff81fcd420 t transmitter_color_depth_to_atom -ffffffff81fce000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff81fce000 T dal_cmd_tbl_helper_dce112_get_table ffffffff81fce030 t encoder_action_to_atom ffffffff81fce0b0 t engine_bp_to_atom ffffffff81fce100 t clock_source_id_to_atom @@ -31013,26334 +31001,26346 @@ ffffffff81fce1d0 t clock_source_id_to_atom_phy_clk_src ffffffff81fce220 t signal_type_to_atom_dig_mode ffffffff81fce280 t hpd_sel_to_atom ffffffff81fce2c0 t dig_encoder_sel_to_atom -ffffffff81fce310 t phy_id_to_atom -ffffffff81fce350 t disp_power_gating_action_to_atom -ffffffff81fcf000 T clk_mgr_helper_get_active_display_cnt -ffffffff81fcf0e0 T clk_mgr_helper_get_active_plane_cnt -ffffffff81fcf190 T clk_mgr_exit_optimized_pwr_state -ffffffff81fcf2a0 T clk_mgr_optimize_pwr_state -ffffffff81fcf390 T dc_clk_mgr_create -ffffffff81fcfa50 T dc_destroy_clk_mgr -ffffffff81fd0000 T dentist_get_divider_from_did -ffffffff81fd0070 T dce_adjust_dp_ref_freq_for_ss -ffffffff81fd0170 T dce_get_dp_ref_freq_khz -ffffffff81fd02a0 T dce12_get_dp_ref_freq_khz -ffffffff81fd02c0 T dce_get_max_pixel_clock_for_all_paths -ffffffff81fd04d0 T dce_get_required_clocks_state -ffffffff81fd0580 T dce_set_clock -ffffffff81fd06e0 T dce_clock_read_ss_info -ffffffff81fd0800 T dce_clk_mgr_construct -ffffffff81fd09f0 t dce_update_clocks -ffffffff81fd1000 T dce110_get_min_vblank_time_us -ffffffff81fd1090 T dce110_fill_display_configs -ffffffff81fd1300 T dce11_pplib_apply_display_requirements -ffffffff81fd15f0 T dce110_clk_mgr_construct -ffffffff81fd16a0 t dce11_update_clocks -ffffffff81fd2000 T dce112_set_clock -ffffffff81fd2180 T dce112_set_dispclk -ffffffff81fd22a0 T dce112_set_dprefclk -ffffffff81fd2310 T dce112_clk_mgr_construct -ffffffff81fd23c0 t dce112_update_clocks -ffffffff81fd3000 T dce120_clk_mgr_construct -ffffffff81fd3090 T dce121_clk_mgr_construct -ffffffff81fd31c0 t dce12_update_clocks -ffffffff81fd4000 T rv1_clk_mgr_construct -ffffffff81fd40c0 t rv1_update_clocks -ffffffff81fd45a0 t rv1_init_clocks -ffffffff81fd4630 t rv1_enable_pme_wa -ffffffff81fd5000 T rv1_vbios_smu_set_dispclk -ffffffff81fd50e0 t rv1_vbios_smu_send_msg_with_param -ffffffff81fd51f0 T rv1_vbios_smu_set_dprefclk -ffffffff81fd6000 T rv2_clk_mgr_construct -ffffffff81fd7000 T dentist_get_did_from_divider -ffffffff81fd7080 T dcn20_update_clocks_update_dpp_dto -ffffffff81fd7150 T dcn20_update_clocks_update_dentist -ffffffff81fd7640 T dcn2_update_clocks -ffffffff81fd7bc0 T dcn2_read_clocks_from_hw_dentist -ffffffff81fd7c90 T dcn2_update_clocks_fpga -ffffffff81fd7dc0 T dcn2_init_clocks -ffffffff81fd7e60 T dcn2_get_clock -ffffffff81fd7ed0 T dcn20_clk_mgr_construct -ffffffff81fd8000 t dcn2_enable_pme_wa -ffffffff81fd8050 t dcn2_are_clock_states_equal -ffffffff81fd80c0 t dcn2_notify_link_rate_change -ffffffff81fd9000 T dcn201_clk_mgr_construct -ffffffff81fd9120 t dcn201_update_clocks -ffffffff81fd9340 t dcn201_init_clocks -ffffffff81fda000 T rn_clk_mgr_construct -ffffffff81fda8a0 t rn_update_clocks -ffffffff81fdae60 t rn_set_low_power_state -ffffffff81fdb040 t rn_init_clocks -ffffffff81fdb0e0 t rn_enable_pme_wa -ffffffff81fdb0f0 t rn_are_clock_states_equal -ffffffff81fdb140 t rn_notify_wm_ranges -ffffffff81fdb4d0 t rn_notify_link_rate_change -ffffffff81fdc000 T rn_vbios_smu_get_smu_version -ffffffff81fdc020 t rn_vbios_smu_send_msg_with_param -ffffffff81fdc1b0 T rn_vbios_smu_set_dispclk -ffffffff81fdc2d0 T rn_vbios_smu_set_dprefclk -ffffffff81fdc340 T rn_vbios_smu_set_hard_min_dcfclk -ffffffff81fdc3c0 T rn_vbios_smu_set_min_deep_sleep_dcfclk -ffffffff81fdc440 T rn_vbios_smu_set_phyclk -ffffffff81fdc480 T rn_vbios_smu_set_dppclk -ffffffff81fdc530 T rn_vbios_smu_set_dcn_low_power_state -ffffffff81fdc550 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn -ffffffff81fdc570 T rn_vbios_smu_enable_pme_wa -ffffffff81fdc590 T rn_vbios_smu_is_periodic_retraining_disabled -ffffffff81fdd000 T dcn3_init_clocks -ffffffff81fdd3b0 t dcn3_init_clocks_fpga -ffffffff81fdd3c0 T dcn3_clk_mgr_construct -ffffffff81fdd510 T dcn3_clk_mgr_destroy -ffffffff81fdd570 t dcn3_update_clocks -ffffffff81fdd990 t dcn3_enable_pme_wa -ffffffff81fdd9d0 t dcn3_are_clock_states_equal -ffffffff81fdda30 t dcn3_notify_wm_ranges -ffffffff81fddcc0 t dcn30_notify_link_rate_change -ffffffff81fddde0 t dcn3_set_hard_min_memclk -ffffffff81fdde80 t dcn3_set_hard_max_memclk -ffffffff81fddee0 t dcn3_set_max_memclk -ffffffff81fddf20 t dcn3_set_min_memclk -ffffffff81fddf60 t dcn3_get_memclk_states_from_smu -ffffffff81fde0a0 t dcn3_is_smu_present -ffffffff81fdf000 T dcn30_smu_test_message -ffffffff81fdf070 t dcn30_smu_send_msg_with_param -ffffffff81fdf1d0 T dcn30_smu_get_smu_version -ffffffff81fdf1f0 T dcn30_smu_check_driver_if_version -ffffffff81fdf240 T dcn30_smu_check_msg_header_version -ffffffff81fdf290 T dcn30_smu_set_dram_addr_high -ffffffff81fdf2b0 T dcn30_smu_set_dram_addr_low -ffffffff81fdf2d0 T dcn30_smu_transfer_wm_table_smu_2_dram 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dal_irq_service_dce80_create +ffffffff81fce2f0 t phy_id_to_atom +ffffffff81fce330 t disp_power_gating_action_to_atom +ffffffff81fce3a0 t dc_clock_type_to_atom +ffffffff81fce420 t transmitter_color_depth_to_atom +ffffffff81fcf000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff81fcf030 t encoder_action_to_atom +ffffffff81fcf0b0 t engine_bp_to_atom +ffffffff81fcf100 t clock_source_id_to_atom +ffffffff81fcf1d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81fcf220 t signal_type_to_atom_dig_mode +ffffffff81fcf280 t hpd_sel_to_atom +ffffffff81fcf2c0 t dig_encoder_sel_to_atom +ffffffff81fcf310 t phy_id_to_atom +ffffffff81fcf350 t disp_power_gating_action_to_atom +ffffffff81fd0000 T clk_mgr_helper_get_active_display_cnt +ffffffff81fd00e0 T clk_mgr_helper_get_active_plane_cnt +ffffffff81fd0190 T clk_mgr_exit_optimized_pwr_state +ffffffff81fd02a0 T clk_mgr_optimize_pwr_state +ffffffff81fd0390 T dc_clk_mgr_create +ffffffff81fd0a50 T dc_destroy_clk_mgr +ffffffff81fd1000 T dentist_get_divider_from_did +ffffffff81fd1070 T dce_adjust_dp_ref_freq_for_ss +ffffffff81fd1170 T dce_get_dp_ref_freq_khz +ffffffff81fd12a0 T dce12_get_dp_ref_freq_khz +ffffffff81fd12c0 T dce_get_max_pixel_clock_for_all_paths +ffffffff81fd14d0 T dce_get_required_clocks_state +ffffffff81fd1580 T dce_set_clock +ffffffff81fd16e0 T dce_clock_read_ss_info +ffffffff81fd1800 T dce_clk_mgr_construct +ffffffff81fd19f0 t dce_update_clocks +ffffffff81fd2000 T dce110_get_min_vblank_time_us +ffffffff81fd2090 T dce110_fill_display_configs +ffffffff81fd2300 T dce11_pplib_apply_display_requirements +ffffffff81fd25f0 T dce110_clk_mgr_construct +ffffffff81fd26a0 t dce11_update_clocks +ffffffff81fd3000 T dce112_set_clock +ffffffff81fd3180 T dce112_set_dispclk +ffffffff81fd32a0 T dce112_set_dprefclk +ffffffff81fd3310 T dce112_clk_mgr_construct +ffffffff81fd33c0 t dce112_update_clocks +ffffffff81fd4000 T dce120_clk_mgr_construct +ffffffff81fd4090 T dce121_clk_mgr_construct +ffffffff81fd41c0 t dce12_update_clocks +ffffffff81fd5000 T rv1_clk_mgr_construct +ffffffff81fd50c0 t rv1_update_clocks +ffffffff81fd55a0 t rv1_init_clocks +ffffffff81fd5630 t rv1_enable_pme_wa +ffffffff81fd6000 T rv1_vbios_smu_set_dispclk +ffffffff81fd60e0 t rv1_vbios_smu_send_msg_with_param +ffffffff81fd61f0 T rv1_vbios_smu_set_dprefclk +ffffffff81fd7000 T rv2_clk_mgr_construct +ffffffff81fd8000 T dentist_get_did_from_divider +ffffffff81fd8080 T dcn20_update_clocks_update_dpp_dto +ffffffff81fd8150 T dcn20_update_clocks_update_dentist +ffffffff81fd8640 T dcn2_update_clocks +ffffffff81fd8bc0 T dcn2_read_clocks_from_hw_dentist +ffffffff81fd8c90 T dcn2_update_clocks_fpga +ffffffff81fd8dc0 T dcn2_init_clocks +ffffffff81fd8e60 T dcn2_get_clock +ffffffff81fd8ed0 T dcn20_clk_mgr_construct +ffffffff81fd9000 t dcn2_enable_pme_wa +ffffffff81fd9050 t dcn2_are_clock_states_equal +ffffffff81fd90c0 t dcn2_notify_link_rate_change +ffffffff81fda000 T dcn201_clk_mgr_construct +ffffffff81fda120 t dcn201_update_clocks +ffffffff81fda340 t dcn201_init_clocks +ffffffff81fdb000 T rn_clk_mgr_construct +ffffffff81fdb8a0 t rn_update_clocks +ffffffff81fdbe60 t rn_set_low_power_state +ffffffff81fdc040 t rn_init_clocks +ffffffff81fdc0e0 t rn_enable_pme_wa +ffffffff81fdc0f0 t rn_are_clock_states_equal +ffffffff81fdc140 t rn_notify_wm_ranges +ffffffff81fdc4d0 t rn_notify_link_rate_change +ffffffff81fdd000 T rn_vbios_smu_get_smu_version +ffffffff81fdd020 t rn_vbios_smu_send_msg_with_param +ffffffff81fdd1b0 T rn_vbios_smu_set_dispclk +ffffffff81fdd2d0 T rn_vbios_smu_set_dprefclk +ffffffff81fdd340 T rn_vbios_smu_set_hard_min_dcfclk +ffffffff81fdd3c0 T rn_vbios_smu_set_min_deep_sleep_dcfclk +ffffffff81fdd440 T rn_vbios_smu_set_phyclk +ffffffff81fdd480 T rn_vbios_smu_set_dppclk +ffffffff81fdd530 T rn_vbios_smu_set_dcn_low_power_state +ffffffff81fdd550 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff81fdd570 T rn_vbios_smu_enable_pme_wa +ffffffff81fdd590 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff81fde000 T dcn3_init_clocks +ffffffff81fde3b0 t dcn3_init_clocks_fpga +ffffffff81fde3c0 T dcn3_clk_mgr_construct +ffffffff81fde510 T dcn3_clk_mgr_destroy +ffffffff81fde570 t dcn3_update_clocks +ffffffff81fde990 t dcn3_enable_pme_wa +ffffffff81fde9d0 t dcn3_are_clock_states_equal +ffffffff81fdea30 t dcn3_notify_wm_ranges +ffffffff81fdecc0 t dcn30_notify_link_rate_change +ffffffff81fdede0 t dcn3_set_hard_min_memclk +ffffffff81fdee80 t dcn3_set_hard_max_memclk +ffffffff81fdeee0 t dcn3_set_max_memclk +ffffffff81fdef20 t dcn3_set_min_memclk +ffffffff81fdef60 t dcn3_get_memclk_states_from_smu +ffffffff81fdf0a0 t dcn3_is_smu_present +ffffffff81fe0000 T dcn30_smu_test_message +ffffffff81fe0070 t dcn30_smu_send_msg_with_param +ffffffff81fe01d0 T dcn30_smu_get_smu_version +ffffffff81fe01f0 T dcn30_smu_check_driver_if_version +ffffffff81fe0240 T dcn30_smu_check_msg_header_version +ffffffff81fe0290 T dcn30_smu_set_dram_addr_high +ffffffff81fe02b0 T dcn30_smu_set_dram_addr_low +ffffffff81fe02d0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff81fe02f0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff81fe0310 T dcn30_smu_set_hard_min_by_freq +ffffffff81fe0360 T dcn30_smu_set_hard_max_by_freq +ffffffff81fe03b0 T dcn30_smu_get_dpm_freq_by_index +ffffffff81fe0400 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff81fe0450 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff81fe0470 T dcn30_smu_set_num_of_displays +ffffffff81fe0490 T dcn30_smu_set_display_refresh_from_mall +ffffffff81fe04c0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff81fe04e0 T dcn30_smu_set_pme_workaround +ffffffff81fe1000 T dcn301_smu_get_smu_version +ffffffff81fe1070 t dcn301_smu_send_msg_with_param +ffffffff81fe11f0 T dcn301_smu_set_dispclk +ffffffff81fe1290 T dcn301_smu_set_dprefclk +ffffffff81fe1340 T dcn301_smu_set_hard_min_dcfclk +ffffffff81fe13e0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff81fe1480 T dcn301_smu_set_dppclk +ffffffff81fe1520 T dcn301_smu_set_display_idle_optimization +ffffffff81fe1570 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff81fe15c0 T dcn301_smu_enable_pme_wa +ffffffff81fe15e0 T dcn301_smu_set_dram_addr_high +ffffffff81fe1630 T dcn301_smu_set_dram_addr_low +ffffffff81fe1680 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff81fe16a0 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff81fe2000 T vg_clk_mgr_construct +ffffffff81fe2840 T vg_clk_mgr_destroy +ffffffff81fe2890 t vg_update_clocks +ffffffff81fe2bd0 t vg_init_clocks +ffffffff81fe2c70 t vg_enable_pme_wa +ffffffff81fe2c80 t vg_are_clock_states_equal +ffffffff81fe2cd0 t vg_notify_wm_ranges +ffffffff81fe4000 T dcn31_update_clocks +ffffffff81fe4610 T dcn31_init_clocks +ffffffff81fe46c0 T dcn31_are_clock_states_equal +ffffffff81fe4720 T dcn31_get_dtb_ref_freq_khz +ffffffff81fe4750 T dcn31_clk_mgr_construct +ffffffff81fe4e20 T dcn31_clk_mgr_destroy +ffffffff81fe4e70 t dcn31_set_low_power_state +ffffffff81fe5080 t dcn31_enable_pme_wa +ffffffff81fe5090 t dcn31_notify_wm_ranges +ffffffff81fe5410 t find_clk_for_voltage +ffffffff81fe6000 T dcn31_smu_get_smu_version +ffffffff81fe6020 t dcn31_smu_send_msg_with_param +ffffffff81fe6230 T dcn31_smu_set_dispclk +ffffffff81fe62a0 T dcn31_smu_set_dprefclk +ffffffff81fe6310 T dcn31_smu_set_hard_min_dcfclk +ffffffff81fe6390 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff81fe6410 T dcn31_smu_set_dppclk +ffffffff81fe6480 T dcn31_smu_set_display_idle_optimization +ffffffff81fe64d0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff81fe6520 T dcn31_smu_enable_pme_wa +ffffffff81fe6560 T dcn31_smu_set_dram_addr_high +ffffffff81fe65a0 T dcn31_smu_set_dram_addr_low +ffffffff81fe65e0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff81fe6620 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff81fe6660 T dcn31_smu_set_zstate_support +ffffffff81fe66d0 T dcn31_smu_set_dtbclk +ffffffff81fe7000 T dcn314_update_clocks +ffffffff81fe7650 T dcn314_are_clock_states_equal +ffffffff81fe76b0 T dcn314_clk_mgr_construct +ffffffff81fe83c0 T dcn314_clk_mgr_destroy +ffffffff81fe8410 t dcn314_enable_pme_wa +ffffffff81fe8420 t dcn314_notify_wm_ranges +ffffffff81fe9000 T dcn314_smu_get_smu_version +ffffffff81fe9020 t dcn314_smu_send_msg_with_param +ffffffff81fe9250 T dcn314_smu_set_dispclk +ffffffff81fe92c0 T dcn314_smu_set_dprefclk +ffffffff81fe9330 T dcn314_smu_set_hard_min_dcfclk +ffffffff81fe93b0 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81fe9430 T dcn314_smu_set_dppclk +ffffffff81fe94a0 T dcn314_smu_set_display_idle_optimization +ffffffff81fe94f0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81fe9540 T dcn314_smu_enable_pme_wa +ffffffff81fe9580 T dcn314_smu_set_dram_addr_high +ffffffff81fe95c0 T dcn314_smu_set_dram_addr_low +ffffffff81fe9600 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81fe9640 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81fe9680 T dcn314_smu_set_zstate_support +ffffffff81fe96d0 T dcn314_smu_set_dtbclk +ffffffff81fea000 T dcn315_clk_mgr_construct +ffffffff81fea810 T dcn315_clk_mgr_destroy +ffffffff81fea860 t dcn315_update_clocks +ffffffff81feada0 t dcn315_enable_pme_wa +ffffffff81feadb0 t dcn315_notify_wm_ranges +ffffffff81feb130 t dcn315_disable_otg_wa +ffffffff81fec000 T dcn315_smu_get_smu_version +ffffffff81fec020 t dcn315_smu_send_msg_with_param +ffffffff81fec310 T dcn315_smu_set_dispclk +ffffffff81fec380 T dcn315_smu_set_hard_min_dcfclk +ffffffff81fec400 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81fec480 T dcn315_smu_set_dppclk +ffffffff81fec4f0 T dcn315_smu_set_display_idle_optimization +ffffffff81fec540 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81fec590 T dcn315_smu_enable_pme_wa +ffffffff81fec5d0 T dcn315_smu_set_dram_addr_high +ffffffff81fec610 T dcn315_smu_set_dram_addr_low +ffffffff81fec650 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81fec690 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81fec6d0 T dcn315_smu_get_dpref_clk +ffffffff81fec730 T dcn315_smu_get_dtbclk +ffffffff81fec790 T dcn315_smu_set_dtbclk +ffffffff81fed000 T dcn316_clk_mgr_construct +ffffffff81fed650 T dcn316_clk_mgr_destroy +ffffffff81fed6a0 t dcn316_update_clocks +ffffffff81fedc90 t dcn316_enable_pme_wa +ffffffff81fedca0 t dcn316_notify_wm_ranges +ffffffff81fee020 t find_clk_for_voltage +ffffffff81fef000 T dcn316_smu_get_smu_version +ffffffff81fef020 t dcn316_smu_send_msg_with_param +ffffffff81fef1b0 T dcn316_smu_set_dispclk +ffffffff81fef220 T dcn316_smu_set_hard_min_dcfclk +ffffffff81fef2a0 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff81fef320 T dcn316_smu_set_dppclk +ffffffff81fef390 T dcn316_smu_set_display_idle_optimization +ffffffff81fef3e0 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff81fef430 T dcn316_smu_set_dram_addr_high +ffffffff81fef470 T dcn316_smu_set_dram_addr_low +ffffffff81fef4b0 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff81fef4f0 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff81fef530 T dcn316_smu_enable_pme_wa +ffffffff81fef570 T dcn316_smu_set_dtbclk +ffffffff81fef5b0 T dcn316_smu_get_dpref_clk +ffffffff81fef610 T dcn316_smu_get_smu_fclk +ffffffff81ff0000 T dcn32_init_clocks +ffffffff81ff0560 T dcn32_update_clocks_update_dpp_dto +ffffffff81ff06a0 T dcn32_clk_mgr_construct +ffffffff81ff0940 t dcn32_dump_clk_registers +ffffffff81ff0b60 T dcn32_clk_mgr_destroy +ffffffff81ff0bc0 t dcn32_update_clocks +ffffffff81ff1420 t dcn32_enable_pme_wa +ffffffff81ff1460 t dcn32_are_clock_states_equal +ffffffff81ff14d0 t dcn32_notify_wm_ranges +ffffffff81ff1650 t dcn32_set_hard_min_memclk +ffffffff81ff16e0 t dcn32_set_hard_max_memclk +ffffffff81ff1730 t dcn32_set_max_memclk +ffffffff81ff1770 t dcn32_set_min_memclk +ffffffff81ff17b0 t dcn32_get_memclk_states_from_smu +ffffffff81ff1a00 t dcn32_is_smu_present +ffffffff81ff1a30 t dcn32_get_dispclk_from_dentist +ffffffff81ff1ac0 t dcn32_update_clocks_update_dentist +ffffffff81ff2000 T dcn32_smu_send_fclk_pstate_message +ffffffff81ff2020 t dcn32_smu_send_msg_with_param +ffffffff81ff2160 T dcn32_smu_send_cab_for_uclk_message +ffffffff81ff2190 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff81ff21b0 T dcn32_smu_set_pme_workaround +ffffffff81ff21d0 T dcn32_smu_set_hard_min_by_freq +ffffffff81ff2220 T dcn32_smu_wait_for_dmub_ack_mclk +ffffffff81ff3000 T dc_stream_adjust_vmin_vmax +ffffffff81ff3170 T dc_stream_get_last_used_drr_vtotal +ffffffff81ff32d0 T dc_stream_get_crtc_position +ffffffff81ff3500 T dc_stream_configure_crc +ffffffff81ff3670 T dc_stream_get_crc +ffffffff81ff3750 T dc_stream_set_dyn_expansion +ffffffff81ff39c0 T dc_stream_set_dither_option +ffffffff81ff3b60 T dc_stream_set_gamut_remap +ffffffff81ff3ce0 T dc_stream_program_csc_matrix +ffffffff81ff3f00 T dc_stream_set_static_screen_params +ffffffff81ff4080 T dc_create +ffffffff81ff4600 t dc_construct_ctx +ffffffff81ff4770 t dc_destruct +ffffffff81ff4a40 T dc_hardware_init +ffffffff81ff4b10 T dc_init_callbacks +ffffffff81ff4b60 T dc_deinit_callbacks +ffffffff81ff4bb0 T dc_destroy +ffffffff81ff4c00 T dc_validate_boot_timing +ffffffff81ff4fa0 T dc_enable_stereo +ffffffff81ff50a0 T dc_trigger_sync +ffffffff81ff56d0 T dc_z10_restore +ffffffff81ff5710 T dc_z10_save_init +ffffffff81ff5750 T dc_commit_streams +ffffffff81ff5c30 t commit_minimal_transition_state +ffffffff81ff6060 T dc_create_state +ffffffff81ff60f0 t dc_commit_state_no_check +ffffffff81ff7770 T dc_release_state +ffffffff81ff77d0 T dc_acquire_release_mpc_3dlut +ffffffff81ff78a0 T dc_post_update_surfaces_to_stream +ffffffff81ff7cb0 T dc_copy_state +ffffffff81ff7e80 T dc_retain_state +ffffffff81ff7eb0 T dc_set_generic_gpio_for_stereo +ffffffff81ff7fc0 T dc_check_update_surfaces_for_stream +ffffffff81ff89a0 T dc_dmub_update_dirty_rect +ffffffff81ff8bb0 T dc_update_planes_and_stream +ffffffff81ff9730 t fast_update_only +ffffffff81ff9a90 t commit_planes_for_stream_fast +ffffffff81ff9eb0 t commit_planes_for_stream +ffffffff81ffb430 T dc_commit_updates_for_stream +ffffffff81ffba50 t copy_surface_update_to_plane +ffffffff81ffbe60 t copy_stream_update_to_stream +ffffffff81ffc500 T dc_get_current_stream_count +ffffffff81ffc540 T dc_get_stream_at_index +ffffffff81ffc590 T dc_interrupt_to_irq_source +ffffffff81ffc5b0 T dc_interrupt_set +ffffffff81ffc600 T dc_interrupt_ack +ffffffff81ffc620 T dc_power_down_on_boot +ffffffff81ffc670 T dc_set_power_state +ffffffff81ffc850 T dc_resume +ffffffff81ffc8d0 T dc_is_dmcu_initialized +ffffffff81ffc920 T get_clock_requirements_for_state +ffffffff81ffc9a0 T dc_set_clock +ffffffff81ffc9e0 T dc_get_clock +ffffffff81ffca20 T dc_set_psr_allow_active +ffffffff81ffcb20 T dc_allow_idle_optimizations +ffffffff81ffcbc0 T dc_unlock_memory_clock_frequency +ffffffff81ffcc30 T dc_lock_memory_clock_frequency +ffffffff81ffccc0 T dc_enable_dcmode_clk_limit +ffffffff81ffce80 t blank_and_force_memclk +ffffffff81ffd060 T dc_is_plane_eligible_for_idle_optimizations +ffffffff81ffd0b0 T dc_hardware_release +ffffffff81ffd100 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff81ffd140 T dc_is_dmub_outbox_supported +ffffffff81ffd1b0 T dc_enable_dmub_notifications +ffffffff81ffd220 T dc_enable_dmub_outbox +ffffffff81ffd260 T dc_process_dmub_aux_transfer_async +ffffffff81ffd3e0 T get_link_index_from_dpia_port_index +ffffffff81ffd490 T dc_process_dmub_set_config_async +ffffffff81ffd570 T dc_process_dmub_set_mst_slots +ffffffff81ffd660 T dc_process_dmub_dpia_hpd_int_enable +ffffffff81ffd720 T dc_print_dmub_diagnostic_data +ffffffff81ffd740 T dc_disable_accelerated_mode +ffffffff81ffd760 T dc_notify_vsync_int_state +ffffffff81ffd980 T dc_abm_save_restore +ffffffff81ffdb50 T dc_query_current_properties +ffffffff81ffdbc0 T dc_set_edp_power +ffffffff81ffdc30 t create_links +ffffffff81ffe090 t create_link_encoders +ffffffff81ffe170 t dc_update_viusal_confirm_color +ffffffff81fff000 T pre_surface_trace +ffffffff81fff030 T update_surface_trace +ffffffff81fff060 T post_surface_trace +ffffffff81fff090 T context_timing_trace +ffffffff81fff240 T context_clock_trace +ffffffff81fff270 T dc_status_to_str +ffffffff82000000 T find_color_matrix +ffffffff820000b0 T color_space_to_black_color +ffffffff82000120 T hwss_wait_for_blank_complete +ffffffff820001c0 T get_mpctree_visual_confirm_color +ffffffff82000220 T get_surface_visual_confirm_color +ffffffff820002d0 T get_hdr_visual_confirm_color +ffffffff82000390 T get_subvp_visual_confirm_color +ffffffff82000490 T hwss_build_fast_sequence +ffffffff82000b50 T hwss_execute_sequence +ffffffff82000f40 T hwss_setup_dpp +ffffffff82000fe0 T hwss_program_bias_and_scale +ffffffff82001060 T hwss_program_manual_trigger +ffffffff820010b0 T hwss_power_on_mpc_mem_pwr +ffffffff82001100 T hwss_set_output_csc +ffffffff82001150 T hwss_set_ocsc_default +ffffffff820011a0 T hwss_send_dmcub_cmd +ffffffff820011c0 T get_mclk_switch_visual_confirm_color +ffffffff82001320 T get_surface_tile_visual_confirm_color +ffffffff82002000 T link_enc_cfg_init +ffffffff820021b0 T link_enc_cfg_copy +ffffffff820021e0 T link_enc_cfg_link_encs_assign +ffffffff820035a0 T link_enc_cfg_validate +ffffffff82003d40 T link_enc_cfg_link_enc_unassign +ffffffff82003ed0 T link_enc_cfg_is_transmitter_mappable +ffffffff82003ff0 T link_enc_cfg_get_stream_using_link_enc +ffffffff820040f0 T link_enc_cfg_get_link_using_link_enc +ffffffff82004200 T link_enc_cfg_get_link_enc_used_by_link +ffffffff82004380 T link_enc_cfg_get_next_avail_link_enc +ffffffff820044f0 T link_enc_cfg_get_link_enc_used_by_stream +ffffffff82004510 T link_enc_cfg_get_link_enc +ffffffff820045a0 T link_enc_cfg_get_link_enc_used_by_stream_current +ffffffff82004720 T link_enc_cfg_is_link_enc_avail +ffffffff82004920 T link_enc_cfg_set_transient_mode +ffffffff82005000 T dc_get_link_at_index +ffffffff82005030 T dc_get_edp_links +ffffffff820050b0 T dc_get_edp_link_panel_inst +ffffffff82005170 T dc_link_detect +ffffffff820051a0 T dc_link_detect_connection_type +ffffffff820051d0 T dc_link_get_status +ffffffff82005200 T dc_link_is_hdcp14 +ffffffff82005230 T dc_link_is_hdcp22 +ffffffff82005260 T dc_link_clear_dprx_states +ffffffff82005290 T dc_link_reset_cur_dp_mst_topology +ffffffff820052c0 T dc_link_bandwidth_kbps +ffffffff820052f0 T dc_get_cur_link_res_map +ffffffff82005310 T dc_restore_link_res_map +ffffffff82005330 T dc_link_update_dsc_config +ffffffff82005360 T dc_is_oem_i2c_device_present +ffffffff820053b0 T dc_submit_i2c +ffffffff820053e0 T dc_submit_i2c_oem +ffffffff82005430 T dc_link_dp_handle_automated_test +ffffffff82005460 T dc_link_dp_set_test_pattern +ffffffff82005490 T dc_link_set_drive_settings +ffffffff82005520 T dc_link_set_preferred_link_settings +ffffffff82005540 T dc_link_set_preferred_training_settings +ffffffff82005570 T dc_dp_trace_is_initialized +ffffffff820055a0 T dc_dp_trace_set_is_logged_flag +ffffffff820055d0 T dc_dp_trace_is_logged +ffffffff82005600 T dc_dp_trace_get_lt_end_timestamp +ffffffff82005630 T dc_dp_trace_get_lt_counts +ffffffff82005660 T dc_dp_trace_get_link_loss_count +ffffffff82005690 T dc_link_add_remote_sink +ffffffff820056c0 T dc_link_remove_remote_sink +ffffffff820056f0 T dc_link_aux_transfer_raw +ffffffff82005720 T dc_link_bw_kbps_from_raw_frl_link_rate_data +ffffffff82005740 T dc_link_decide_edp_link_settings +ffffffff82005770 T dc_link_dp_get_max_link_enc_cap +ffffffff820057a0 T dc_link_dp_mst_decide_link_encoding_format +ffffffff820057d0 T dc_link_get_link_cap +ffffffff82005800 T dc_link_get_highest_encoding_format +ffffffff820058c0 T dc_link_is_dp_sink_present +ffffffff820058f0 T dc_link_is_fec_supported +ffffffff82005920 T dc_link_overwrite_extended_receiver_cap +ffffffff82005950 T dc_link_should_enable_fec +ffffffff82005980 T dc_link_dp_dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff820059b0 T dc_link_handle_usb4_bw_alloc_response +ffffffff820059e0 T dc_link_check_link_loss_status +ffffffff82005a10 T dc_link_dp_allow_hpd_rx_irq +ffffffff82005a40 T dc_link_dp_handle_link_loss +ffffffff82005a70 T dc_link_dp_read_hpd_rx_irq_data +ffffffff82005aa0 T dc_link_handle_hpd_rx_irq +ffffffff82005ad0 T dc_link_dp_receiver_power_ctrl +ffffffff82005b00 T dc_link_decide_lttpr_mode +ffffffff82005b30 T dc_link_edp_panel_backlight_power_on +ffffffff82005b60 T dc_link_get_backlight_level +ffffffff82005b90 T dc_link_get_backlight_level_nits +ffffffff82005bc0 T dc_link_set_backlight_level +ffffffff82005bf0 T dc_link_set_backlight_level_nits +ffffffff82005c20 T dc_link_get_target_backlight_pwm +ffffffff82005c50 T dc_link_get_psr_state +ffffffff82005c80 T dc_link_set_psr_allow_active +ffffffff82005cb0 T dc_link_setup_psr +ffffffff82005ce0 T dc_link_get_replay_state +ffffffff82005d10 T dc_link_wait_for_t12 +ffffffff82005d40 T dc_link_get_hpd_state +ffffffff82005d70 T dc_link_enable_hpd +ffffffff82005da0 T dc_link_disable_hpd +ffffffff82005dd0 T dc_link_enable_hpd_filter +ffffffff82005e00 T dc_link_validate +ffffffff82006000 T resource_parse_asic_id +ffffffff82006250 T dc_create_resource_pool +ffffffff82006550 T dc_destroy_resource_pool +ffffffff820065c0 T resource_construct +ffffffff82006aa0 T resource_unreference_clock_source +ffffffff82006b20 T resource_reference_clock_source +ffffffff82006ba0 T resource_get_clock_source_reference +ffffffff82006c20 T resource_are_vblanks_synchronizable +ffffffff82006e40 T resource_are_streams_timing_synchronizable +ffffffff82006f30 T resource_find_used_clk_src_for_sharing +ffffffff82007060 T resource_get_num_mpc_splits +ffffffff820070f0 T resource_get_num_odm_splits +ffffffff820071b0 T resource_get_otg_master +ffffffff82007250 T resource_build_scaling_params +ffffffff82007fe0 t calculate_odm_slice_in_timing_active +ffffffff82008160 T resource_build_scaling_params_for_context +ffffffff820082b0 T resource_find_free_secondary_pipe_legacy +ffffffff82008350 T resource_find_free_pipe_used_in_cur_mpc_blending_tree +ffffffff820083c0 T resource_is_pipe_type +ffffffff82008440 T recource_find_free_pipe_not_used_in_cur_res_ctx +ffffffff820084c0 T resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine +ffffffff820085e0 T resource_is_for_mpcc_combine +ffffffff82008670 T resource_find_any_free_pipe +ffffffff820086e0 T resource_get_otg_master_for_stream +ffffffff82008810 T resource_get_opp_head +ffffffff820088a0 T dc_add_plane_to_context +ffffffff82008b60 T dc_remove_plane_from_context +ffffffff82008d40 T dc_rem_all_planes_for_stream +ffffffff82008f00 T dc_add_all_planes_for_stream +ffffffff82009080 T dc_is_timing_changed +ffffffff820090e0 T dc_is_stream_unchanged +ffffffff820091c0 T dc_is_stream_scaling_unchanged +ffffffff82009260 T update_audio_usage +ffffffff820092d0 T dc_add_stream_to_ctx +ffffffff820093a0 T dc_remove_stream_from_ctx +ffffffff820097b0 T resource_map_pool_resources +ffffffff8200a210 t acquire_first_split_pipe +ffffffff8200a380 t add_hpo_dp_link_enc_to_ctx +ffffffff8200a450 t find_first_free_audio +ffffffff8200a500 T dc_resource_state_copy_construct_current +ffffffff8200a520 T dc_resource_state_copy_construct +ffffffff8200a6c0 T dc_resource_state_construct +ffffffff8200a6e0 T dc_resource_is_dsc_encoding_supported +ffffffff8200a730 T dc_validate_with_context +ffffffff8200b360 t planes_changed_for_existing_stream +ffffffff8200b4e0 T dc_validate_global_state +ffffffff8200b860 T dc_resource_state_destruct +ffffffff8200b940 T dc_resource_find_first_free_pll +ffffffff8200b9b0 T resource_build_info_frame +ffffffff8200c0e0 T resource_map_clock_resources +ffffffff8200c270 T pipe_need_reprogram +ffffffff8200c3e0 T resource_build_bit_depth_reduction_params +ffffffff8200c610 T dc_validate_stream +ffffffff8200c7e0 T dc_validate_plane +ffffffff8200c870 T resource_pixel_format_to_bpp +ffffffff8200c8f0 T get_audio_check +ffffffff8200ca10 T get_temp_dp_link_res +ffffffff8200cb20 T reset_syncd_pipes_from_disabled_pipes +ffffffff8200cc70 T check_syncd_pipes_for_disabled_master_pipe +ffffffff8200cdb0 T reset_sync_context_for_pipe +ffffffff8200ce60 T resource_transmitter_to_phy_idx +ffffffff8200cec0 T get_link_hwss +ffffffff8200cf50 T is_h_timing_divisible_by_2 +ffffffff8200cfb0 T dc_resource_acquire_secondary_pipe_for_mpc_odm +ffffffff8200d1c0 T update_dp_encoder_resources_for_test_harness +ffffffff8200d480 t calculate_plane_rec_in_timing_active +ffffffff8200d750 t calculate_init_and_vp +ffffffff8200e000 T dc_sink_retain +ffffffff8200e030 T dc_sink_release +ffffffff8200e0a0 T dc_sink_create +ffffffff8200f000 T dc_stat_get_dmub_notification +ffffffff8200f0b0 T dc_stat_get_dmub_dataout +ffffffff82010000 T update_stream_signal +ffffffff82010080 T dc_stream_retain +ffffffff820100b0 T dc_stream_release +ffffffff82010130 T dc_create_stream_for_sink +ffffffff82010470 T dc_copy_stream +ffffffff82010540 T dc_stream_get_status_from_state +ffffffff820105a0 T dc_stream_get_status +ffffffff82010610 T dc_optimize_timing_for_fsft +ffffffff82010660 T dc_stream_set_cursor_attributes +ffffffff82010860 t program_cursor_attributes +ffffffff820109c0 T dc_stream_set_cursor_position +ffffffff82010ae0 t program_cursor_position +ffffffff82010c20 T dc_stream_add_writeback +ffffffff82010e30 T dc_stream_remove_writeback +ffffffff82010f60 T dc_stream_warmup_writeback +ffffffff82010fa0 T dc_stream_get_vblank_counter +ffffffff82011070 T dc_stream_send_dp_sdp +ffffffff82011300 T dc_stream_get_scanoutpos +ffffffff820113e0 T dc_stream_dmdata_status_done +ffffffff820114a0 T dc_stream_set_dynamic_metadata +ffffffff82011600 T dc_stream_add_dsc_to_resource +ffffffff82011650 T dc_stream_get_pipe_ctx +ffffffff82011700 T dc_stream_log +ffffffff82012000 T enable_surface_flip_reporting +ffffffff82012030 T dc_create_plane_state +ffffffff820121d0 T dc_plane_get_status +ffffffff82012350 T dc_plane_state_retain +ffffffff82012380 T dc_plane_state_release +ffffffff820124d0 T dc_gamma_retain +ffffffff82012500 T dc_gamma_release +ffffffff82012560 T dc_create_gamma +ffffffff820125b0 T dc_transfer_func_retain +ffffffff820125e0 T dc_transfer_func_release +ffffffff82012630 T dc_create_transfer_func +ffffffff82012680 T dc_create_3dlut_func +ffffffff820126e0 T dc_3dlut_func_release +ffffffff82012730 T dc_3dlut_func_retain +ffffffff82013000 T vm_helper_mark_vmid_used +ffffffff82013030 T dc_setup_system_context +ffffffff820130c0 T dc_setup_vm_context +ffffffff820130f0 T dc_get_vmid_use_vector +ffffffff82013150 T vm_helper_init +ffffffff82014000 T dc_dmub_srv_create +ffffffff820140a0 T dc_dmub_srv_destroy +ffffffff820140f0 T dc_dmub_srv_wait_idle +ffffffff82014150 T dc_dmub_srv_log_diagnostic_data +ffffffff82014690 T dc_dmub_srv_clear_inbox0_ack +ffffffff820146f0 T dc_dmub_srv_wait_for_inbox0_ack +ffffffff82014750 T dc_dmub_srv_send_inbox0_cmd +ffffffff820147b0 T dc_dmub_srv_cmd_run +ffffffff820147d0 T dc_dmub_srv_cmd_run_list +ffffffff82014980 T dc_dmub_srv_optimized_init_done +ffffffff82014a00 T dc_dmub_srv_notify_stream_mask +ffffffff82014a60 T dc_dmub_srv_is_restore_required +ffffffff82014ae0 T dc_dmub_srv_get_dmub_outbox0_msg +ffffffff82014b10 T dc_dmub_trace_event_control +ffffffff82014b30 T dc_dmub_srv_drr_update_cmd +ffffffff82014bc0 T dc_dmub_srv_set_drr_manual_trigger_cmd +ffffffff82014c50 T dc_dmub_srv_p_state_delegate +ffffffff82015000 T dc_dmub_srv_query_caps_cmd +ffffffff820150c0 T dc_dmub_srv_get_visual_confirm_color_cmd +ffffffff820151a0 T dc_dmub_setup_subvp_dmub_command +ffffffff82015bb0 T dc_dmub_srv_get_diagnostic_data +ffffffff82015bf0 T dc_send_update_cursor_info_to_dmu +ffffffff82015f60 T dc_dmub_check_min_version +ffffffff82015fa0 T dc_dmub_srv_enable_dpia_trace +ffffffff82017000 T dc_edid_parser_send_cea +ffffffff820170b0 T dc_edid_parser_recv_cea_ack +ffffffff82017140 T dc_edid_parser_recv_amd_vsdb +ffffffff82018000 T generic_reg_update_ex +ffffffff82018330 t set_reg_field_values +ffffffff820184e0 T generic_reg_set_ex +ffffffff820186d0 T generic_reg_get +ffffffff82018740 T generic_reg_get2 +ffffffff820187d0 T generic_reg_get3 +ffffffff82018870 T generic_reg_get4 +ffffffff82018920 T generic_reg_get5 +ffffffff820189e0 T generic_reg_get6 +ffffffff82018ac0 T generic_reg_get7 +ffffffff82018bb0 T generic_reg_get8 +ffffffff82018cc0 T generic_reg_wait +ffffffff82018f10 T generic_write_indirect_reg +ffffffff82018f60 T generic_read_indirect_reg +ffffffff82019000 T generic_indirect_reg_get +ffffffff820191b0 T generic_indirect_reg_update_ex +ffffffff820193c0 T generic_indirect_reg_update_ex_sync +ffffffff820195b0 T generic_indirect_reg_get_sync +ffffffff820196e0 T reg_sequence_start_gather +ffffffff82019770 T reg_sequence_start_execute +ffffffff82019910 T reg_sequence_wait_done +ffffffff82019970 T dce_version_to_string +ffffffff8201a000 T dce_abm_create +ffffffff8201a0b0 T dce_abm_destroy +ffffffff8201a100 t dce_abm_init +ffffffff8201a380 t dce_abm_set_level +ffffffff8201a480 t dce_abm_immediate_disable +ffffffff8201a4d0 t dce_abm_set_pipe +ffffffff8201a620 t dce_abm_set_backlight_level_pwm +ffffffff8201a810 t dce_abm_get_current_backlight +ffffffff8201a840 t dce_abm_get_target_backlight +ffffffff8201b000 T dce_aud_az_enable +ffffffff8201b150 T dce_aud_az_disable +ffffffff8201b340 T dce_aud_az_configure +ffffffff8201bfc0 t check_audio_bandwidth +ffffffff8201c150 T dce_aud_wall_dto_setup +ffffffff8201c2d0 T dce_aud_hw_init +ffffffff8201c4a0 T dce_aud_destroy +ffffffff8201c4f0 T dce_audio_create +ffffffff8201c5b0 t dce_aud_endpoint_valid +ffffffff8201d000 T dce110_engine_destroy +ffffffff8201d050 T dce110_aux_engine_construct +ffffffff8201d0d0 t dce_aux_configure_timeout +ffffffff8201d2b0 T dce_aux_transfer_raw +ffffffff8201dae0 t acquire +ffffffff8201dd50 T dce_aux_transfer_dmub_raw +ffffffff8201de50 T dce_aux_transfer_with_retries +ffffffff8201f000 T look_up_in_video_optimized_rate_tlb +ffffffff8201f070 T dce110_clk_src_construct +ffffffff8201f270 t calc_pll_max_vco_construct +ffffffff8201f410 T dce112_clk_src_construct +ffffffff8201f4a0 T dcn20_clk_src_construct +ffffffff8201f550 T dcn3_clk_src_construct +ffffffff8201f600 T dcn31_clk_src_construct +ffffffff8201f6b0 T dcn301_clk_src_construct +ffffffff8201f760 t dce110_clock_source_power_down +ffffffff8201f7f0 t dce110_program_pix_clk +ffffffff8201fe80 t dce110_get_pix_clk_dividers +ffffffff82020500 t get_pixel_clk_frequency_100hz +ffffffff82020610 t get_ss_info_from_atombios +ffffffff820208e0 t dce112_program_pix_clk +ffffffff82020af0 t dce112_get_pix_clk_dividers +ffffffff82020c00 t dcn20_program_pix_clk +ffffffff82020c90 t dcn20_override_dp_pix_clk +ffffffff82020d80 t dcn3_program_pix_clk +ffffffff82020f30 t dcn3_get_pix_clk_dividers +ffffffff82021000 t dcn31_program_pix_clk +ffffffff82022000 T dce_dmcu_create +ffffffff820220c0 T dcn10_dmcu_create +ffffffff82022180 T dcn20_dmcu_create +ffffffff82022240 T dcn21_dmcu_create +ffffffff82022330 T dce_dmcu_destroy +ffffffff82022380 t dce_dmcu_init +ffffffff820223b0 t dce_dmcu_load_iram +ffffffff82022510 t dce_dmcu_set_psr_enable +ffffffff82022640 t dce_dmcu_setup_psr +ffffffff82022970 t dce_get_dmcu_psr_state +ffffffff82022a50 t dce_psr_wait_loop +ffffffff82022b80 t dce_get_psr_wait_loop +ffffffff82022bb0 t dce_is_dmcu_initialized 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dce110_psr_program_secondary_packet +ffffffff8202b240 T dce110_is_dig_enabled +ffffffff8202b2a0 T dce110_link_encoder_validate_dvi_output +ffffffff8202b350 T dce110_link_encoder_validate_dp_output +ffffffff8202b380 T dce110_link_encoder_construct +ffffffff8202b550 T dce110_link_encoder_validate_output_with_stream +ffffffff8202b700 T dce110_link_encoder_hw_init +ffffffff8202b920 T dce110_link_encoder_destroy +ffffffff8202b970 T dce110_link_encoder_setup +ffffffff8202baa0 T dce110_link_encoder_enable_tmds_output +ffffffff8202bb90 T dce110_link_encoder_enable_lvds_output +ffffffff8202bc80 T dce110_link_encoder_enable_dp_output +ffffffff8202bde0 T dce110_link_encoder_enable_dp_mst_output +ffffffff8202bf40 T dce110_link_encoder_disable_output +ffffffff8202c150 T dce110_link_encoder_dp_set_lane_settings +ffffffff8202c2f0 T dce110_link_encoder_dp_set_phy_pattern +ffffffff8202caf0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff8202cd10 T dce110_link_encoder_update_mst_stream_allocation_table +ffffffff8202cf80 T dce110_link_encoder_connect_dig_be_to_fe +ffffffff8202d0b0 T dce110_link_encoder_enable_hpd +ffffffff8202d0e0 T dce110_link_encoder_disable_hpd +ffffffff8202d110 T dce110_link_encoder_get_max_link_cap +ffffffff8202e000 T dce_mem_input_construct +ffffffff8202e060 T dce112_mem_input_construct +ffffffff8202e0c0 T dce120_mem_input_construct +ffffffff8202e120 t dce_mi_program_display_marks +ffffffff8202e3f0 t dce_mi_allocate_dmif +ffffffff8202e630 t dce_mi_free_dmif +ffffffff8202e790 t dce_mi_program_surface_flip_and_addr +ffffffff8202eab0 t dce_mi_program_pte_vm +ffffffff8202ec70 t dce_mi_program_surface_config +ffffffff8202f4f0 t dce_mi_is_flip_pending +ffffffff8202f580 t program_nbp_watermark +ffffffff8202f780 t dce112_mi_program_display_marks +ffffffff8202fc90 t dce120_mi_program_display_marks +ffffffff82030150 t dce120_program_stutter_watermark +ffffffff82031000 T dce110_opp_set_clamping +ffffffff820312b0 T dce110_opp_program_bit_depth_reduction +ffffffff82031a80 T dce110_opp_program_clamping_and_pixel_encoding +ffffffff82031c20 T dce110_opp_set_dyn_expansion +ffffffff82031d70 T dce110_opp_program_fmt +ffffffff82031ef0 T dce110_opp_construct +ffffffff82031f50 T dce110_opp_destroy +ffffffff82032000 T dce_panel_cntl_construct +ffffffff82032060 t dce_panel_cntl_destroy +ffffffff820320b0 t dce_panel_cntl_hw_init +ffffffff820322f0 t dce_is_panel_backlight_on +ffffffff820323a0 t dce_is_panel_powered_on +ffffffff82032450 t dce_store_backlight_level +ffffffff820324f0 t dce_driver_set_backlight +ffffffff82032670 t dce_get_16_bit_backlight_from_pwm +ffffffff82033000 T get_filter_3tap_16p +ffffffff82033090 T get_filter_3tap_64p +ffffffff82033120 T get_filter_4tap_16p +ffffffff820331b0 T get_filter_4tap_64p +ffffffff82033240 T get_filter_5tap_64p +ffffffff820332d0 T get_filter_6tap_64p +ffffffff82033360 T get_filter_7tap_64p +ffffffff820333f0 T get_filter_8tap_64p +ffffffff82033480 T get_filter_2tap_16p +ffffffff820334b0 T get_filter_2tap_64p +ffffffff82034000 T dce110_se_audio_mute_control +ffffffff82034050 T dce110_se_dp_audio_setup +ffffffff82034060 t dce110_se_audio_setup +ffffffff820341c0 T dce110_se_dp_audio_enable +ffffffff82034400 T dce110_se_dp_audio_disable +ffffffff82034560 T dce110_se_hdmi_audio_setup +ffffffff82034a60 T dce110_se_hdmi_audio_disable +ffffffff82034ac0 T dce110_stream_encoder_construct +ffffffff82034b10 t dce110_stream_encoder_dp_set_stream_attribute +ffffffff82035160 t dce110_stream_encoder_hdmi_set_stream_attribute +ffffffff82035690 t dce110_stream_encoder_dvi_set_stream_attribute +ffffffff820357c0 t dce110_stream_encoder_lvds_set_stream_attribute +ffffffff820358a0 t dce110_stream_encoder_set_throttled_vcp_size +ffffffff82035aa0 t dce110_stream_encoder_update_hdmi_info_packets +ffffffff82036190 t dce110_stream_encoder_stop_hdmi_info_packets +ffffffff82036430 t dce110_stream_encoder_update_dp_info_packets +ffffffff820365c0 t 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dce_transform_set_pixel_storage_depth +ffffffff8203a120 t dce_transform_set_gamut_remap +ffffffff8203a460 t program_multi_taps_filter +ffffffff8203b000 T dmub_abm_create +ffffffff8203b0d0 T dmub_abm_destroy +ffffffff8203b120 t dmub_abm_init_ex +ffffffff8203b130 t dmub_abm_set_level_ex +ffffffff8203b1e0 t dmub_abm_set_backlight_level_pwm_ex +ffffffff8203b280 t dmub_abm_get_current_backlight_ex +ffffffff8203b290 t dmub_abm_get_target_backlight_ex +ffffffff8203b2a0 t dmub_abm_init_config_ex +ffffffff8203b330 t dmub_abm_set_pause_ex +ffffffff8203b3d0 t dmub_abm_save_restore_ex +ffffffff8203b460 t dmub_abm_set_pipe_ex +ffffffff8203c000 T dmub_abm_init +ffffffff8203c3c0 T dmub_abm_get_current_backlight +ffffffff8203c3f0 T dmub_abm_get_target_backlight +ffffffff8203c420 T dmub_abm_set_level +ffffffff8203c4b0 T dmub_abm_init_config +ffffffff8203c5b0 T dmub_abm_set_pause +ffffffff8203c650 T dmub_abm_save_restore +ffffffff8203c770 T dmub_abm_set_pipe +ffffffff8203c810 T dmub_abm_set_backlight_level +ffffffff8203d000 T dmub_hw_lock_mgr_cmd +ffffffff8203d0a0 T dmub_hw_lock_mgr_inbox0_cmd +ffffffff8203d0e0 T should_use_dmub_lock +ffffffff8203e000 T dmub_enable_outbox_notification +ffffffff8203f000 T dmub_psr_create +ffffffff8203f090 T dmub_psr_destroy +ffffffff8203f0e0 t dmub_psr_copy_settings +ffffffff8203f5d0 t dmub_psr_enable +ffffffff8203f750 t dmub_psr_get_state +ffffffff8203fa60 t dmub_psr_set_level +ffffffff8203fb30 t dmub_psr_force_static +ffffffff8203fbd0 t dmub_psr_get_residency +ffffffff8203fc20 t dmub_psr_set_sink_vtotal_in_psr_active +ffffffff8203fcc0 t dmub_psr_set_power_opt +ffffffff82040000 T dmub_replay_create +ffffffff82040090 T dmub_replay_destroy +ffffffff820400e0 t dmub_replay_get_state +ffffffff820401d0 t dmub_replay_enable +ffffffff820403f0 t dmub_replay_copy_settings +ffffffff820406b0 t dmub_replay_set_power_opt +ffffffff82040750 t dmub_replay_set_coasting_vtotal +ffffffff820407e0 t dmub_replay_residency +ffffffff82041000 T dce100_enable_display_power_gating +ffffffff820410a0 T dce100_prepare_bandwidth +ffffffff820410f0 T dce100_optimize_bandwidth +ffffffff82041140 T dce100_hw_sequencer_construct +ffffffff82042000 T dce100_add_stream_to_ctx +ffffffff820420a0 T dce100_validate_plane +ffffffff820420e0 T dce100_find_first_free_match_stream_enc_for_link +ffffffff82042190 T dce100_create_resource_pool +ffffffff82042f60 t dce100_resource_destruct +ffffffff82043220 t dce100_destroy_resource_pool +ffffffff82043280 t dce100_panel_cntl_create +ffffffff82043310 t dce100_link_encoder_create +ffffffff82043410 t dce100_validate_bandwidth +ffffffff82043550 t dce100_validate_global +ffffffff820435f0 t read_dce_straps +ffffffff82043660 t create_audio +ffffffff82043690 t dce100_stream_encoder_create +ffffffff82043730 t dce100_hwseq_create +ffffffff82044000 T dce110_compressor_power_up_fbc +ffffffff82044130 T dce110_compressor_enable_fbc +ffffffff82044340 T dce110_compressor_is_fbc_enabled_in_hw +ffffffff820443f0 T dce110_compressor_disable_fbc +ffffffff820446c0 T dce110_compressor_program_compressed_surface_address_and_pitch +ffffffff820447e0 T dce110_compressor_set_fbc_invalidation_triggers +ffffffff82044860 T dce110_compressor_create +ffffffff82044900 T dce110_compressor_construct +ffffffff82044980 T dce110_compressor_destroy +ffffffff820449d0 T get_max_support_fbc_buffersize +ffffffff82045000 T dce110_update_info_frame +ffffffff820450f0 T dce110_enable_stream +ffffffff82045190 T dce110_edp_wait_for_hpd_ready +ffffffff820453f0 T dce110_edp_power_control +ffffffff82045950 T dce110_edp_wait_for_T12 +ffffffff82045b00 T dce110_edp_backlight_control +ffffffff82045e60 T dce110_enable_audio_stream +ffffffff82045f20 T dce110_disable_audio_stream +ffffffff82045fe0 T dce110_disable_stream +ffffffff82046230 T dce110_unblank_stream +ffffffff82046330 T dce110_blank_stream +ffffffff820464a0 T dce110_set_avmute +ffffffff820464f0 T dce110_enable_accelerated_mode +ffffffff820468a0 t power_down_all_hw_blocks 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dce110_resource_destruct +ffffffff820504b0 t dce110_destroy_resource_pool +ffffffff82050510 t dce110_panel_cntl_create +ffffffff820505a0 t dce110_link_encoder_create +ffffffff820506a0 t dce110_validate_bandwidth +ffffffff82050790 t dce110_validate_global +ffffffff82050870 t dce110_acquire_underlay +ffffffff82050a50 t dce110_validate_plane +ffffffff82050ab0 t dce110_add_stream_to_ctx +ffffffff82050b80 t read_dce_straps +ffffffff82050bf0 t create_audio +ffffffff82050c20 t dce110_stream_encoder_create +ffffffff82050cc0 t dce110_hwseq_create +ffffffff82051000 T dce110_timing_generator_set_early_control +ffffffff82051070 T dce110_timing_generator_enable_crtc +ffffffff82051100 T dce110_timing_generator_program_blank_color +ffffffff82051190 T dce110_timing_generator_disable_crtc +ffffffff820511e0 T dce110_timing_generator_program_timing_generator +ffffffff820513d0 T dce110_timing_generator_set_drr +ffffffff82051510 T dce110_timing_generator_set_static_screen_control +ffffffff820515a0 T dce110_timing_generator_get_vblank_counter +ffffffff82051600 T dce110_timing_generator_get_position +ffffffff820516a0 T dce110_timing_generator_get_crtc_scanoutpos +ffffffff82051790 T dce110_timing_generator_program_blanking +ffffffff82051a00 T dce110_timing_generator_set_test_pattern +ffffffff82051cf0 T dce110_timing_generator_validate_timing +ffffffff82051db0 T dce110_timing_generator_wait_for_vblank +ffffffff82051f20 T dce110_timing_generator_is_counter_moving +ffffffff82051fa0 T dce110_timing_generator_wait_for_vactive +ffffffff82052080 T dce110_timing_generator_setup_global_swap_lock +ffffffff820521e0 T dce110_timing_generator_tear_down_global_swap_lock +ffffffff82052260 T dce110_timing_generator_enable_advanced_request +ffffffff82052300 T dce110_timing_generator_set_lock_master +ffffffff82052360 T dce110_timing_generator_enable_reset_trigger +ffffffff82052450 T dce110_timing_generator_enable_crtc_reset +ffffffff82052640 T dce110_timing_generator_disable_reset_trigger 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dce110_transform_v_construct +ffffffff82055060 t dce110_xfmv_reset +ffffffff820550c0 t dce110_xfmv_set_scaler +ffffffff82055800 t dce110_xfmv_set_pixel_storage_depth +ffffffff820558e0 t dce110_xfmv_set_gamut_remap +ffffffff82055910 t program_multi_taps_filter +ffffffff82055d00 t program_viewport +ffffffff82056000 T dce112_compressor_power_up_fbc +ffffffff82056130 T dce112_compressor_enable_fbc +ffffffff820562e0 T dce112_compressor_is_fbc_enabled_in_hw +ffffffff82056390 T dce112_compressor_enable_lpt +ffffffff820564b0 t wait_for_fbc_state_changed +ffffffff82056750 T dce112_compressor_disable_fbc +ffffffff82056850 T dce112_compressor_disable_lpt +ffffffff820569b0 T dce112_compressor_is_lpt_enabled_in_hw +ffffffff82056a00 T dce112_compressor_program_compressed_surface_address_and_pitch +ffffffff82056b40 T dce112_compressor_program_lpt_control +ffffffff82056db0 T dce112_compressor_set_fbc_invalidation_triggers +ffffffff82056e40 T dce112_compressor_construct +ffffffff82056f00 T dce112_compressor_create +ffffffff82056ff0 T dce112_compressor_destroy +ffffffff82058000 T dce112_hw_sequencer_construct +ffffffff82058050 t dce112_enable_display_power_gating +ffffffff82059000 T dce112_validate_bandwidth +ffffffff820590c0 T resource_map_phy_clock_resources +ffffffff82059230 T dce112_add_stream_to_ctx +ffffffff820592d0 T dce112_create_resource_pool +ffffffff8205a620 t dce112_resource_destruct +ffffffff8205a8e0 t dce112_destroy_resource_pool +ffffffff8205a940 t dce112_panel_cntl_create +ffffffff8205a9d0 t dce112_link_encoder_create +ffffffff8205aad0 t dce112_validate_global +ffffffff8205ab70 t read_dce_straps +ffffffff8205abe0 t create_audio +ffffffff8205ac10 t dce112_stream_encoder_create +ffffffff8205acb0 t dce112_hwseq_create +ffffffff8205b000 T dce121_xgmi_enabled +ffffffff8205b060 T dce120_hw_sequencer_construct +ffffffff8205b0c0 t dce120_enable_display_power_gating +ffffffff8205b0f0 t dce120_update_dchub +ffffffff8205c000 T dce120_create_resource_pool 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dce80_hw_sequencer_construct +ffffffff82061000 T dce80_create_resource_pool +ffffffff82061e10 T dce81_create_resource_pool +ffffffff82062c10 T dce83_create_resource_pool +ffffffff820638f0 t dce80_resource_destruct +ffffffff82063ba0 t dce80_destroy_resource_pool +ffffffff82063c00 t dce80_panel_cntl_create +ffffffff82063c90 t dce80_link_encoder_create +ffffffff82063d90 t dce80_validate_bandwidth +ffffffff82063ed0 t dce80_validate_global +ffffffff82063f70 t read_dce_straps +ffffffff82063fe0 t create_audio +ffffffff82064010 t dce80_stream_encoder_create +ffffffff820640b0 t dce80_hwseq_create +ffffffff82065000 T dce80_timing_generator_construct +ffffffff82065090 t program_timing +ffffffff82065170 t dce80_timing_generator_enable_advanced_request +ffffffff82066000 T cm_helper_program_color_matrices +ffffffff820660c0 T cm_helper_program_xfer_func +ffffffff82066480 T cm_helper_convert_to_custom_float +ffffffff820668d0 T cm_helper_translate_curve_to_hw_format +ffffffff82067490 T cm_helper_translate_curve_to_degamma_hw_format +ffffffff82068000 T dpp_read_state +ffffffff82068270 T dpp1_get_optimal_number_of_taps +ffffffff82068410 T dpp_reset +ffffffff82068460 T dpp1_cnv_setup +ffffffff82068980 T dpp1_set_cursor_attributes +ffffffff82068ab0 T dpp1_set_cursor_position +ffffffff82068c00 T dpp1_cnv_set_optional_cursor_attributes +ffffffff82068cc0 T dpp1_dppclk_control +ffffffff82068dc0 T dpp1_construct +ffffffff82068e40 t dpp1_cm_set_regamma_pwl +ffffffff82069000 T dpp1_cm_set_gamut_remap +ffffffff820691a0 T dpp1_cm_set_output_csc_default +ffffffff82069220 t dpp1_cm_program_color_matrix +ffffffff820693e0 T dpp1_cm_set_output_csc_adjustment +ffffffff820693f0 T dpp1_cm_power_on_regamma_lut +ffffffff82069470 T dpp1_cm_program_regamma_lut +ffffffff82069680 T dpp1_cm_configure_regamma_lut +ffffffff82069780 T dpp1_cm_program_regamma_luta_settings +ffffffff82069920 T dpp1_cm_program_regamma_lutb_settings +ffffffff82069ac0 T dpp1_program_input_csc +ffffffff82069d10 T dpp1_program_bias_and_scale +ffffffff82069e80 T dpp1_program_degamma_lutb_settings +ffffffff8206a030 T dpp1_program_degamma_luta_settings +ffffffff8206a1e0 T dpp1_power_on_degamma_lut +ffffffff8206a260 T dpp1_set_degamma +ffffffff8206a450 T dpp1_degamma_ram_select +ffffffff8206a4b0 T dpp1_program_degamma_lut +ffffffff8206a7d0 T dpp1_set_degamma_pwl +ffffffff8206a9a0 T dpp1_full_bypass +ffffffff8206ab40 T dpp1_program_input_lut +ffffffff8206b1e0 T dpp1_set_hdr_multiplier +ffffffff8206c000 T dpp1_dscl_calc_lb_num_partitions +ffffffff8206c1e0 T dpp1_dscl_is_lb_conf_valid +ffffffff8206c220 T dpp1_dscl_set_scaler_manual_scale +ffffffff8206d640 t dpp1_dscl_get_filter_coeffs_64p +ffffffff8206d710 t dpp1_dscl_set_scaler_filter +ffffffff8206e000 t dwb1_get_caps +ffffffff8206e0a0 t dwb1_enable +ffffffff8206e1a0 t dwb1_disable +ffffffff8206e300 T dcn10_dwbc_construct +ffffffff8206f000 T hubbub1_wm_read_state +ffffffff8206f320 T hubbub1_allow_self_refresh_control +ffffffff8206f3a0 T hubbub1_is_allow_self_refresh_enabled +ffffffff8206f410 T hubbub1_verify_allow_pstate_change_high +ffffffff8206f5d0 T hubbub1_wm_change_req_wa +ffffffff8206f670 T hubbub1_program_urgent_watermarks +ffffffff8206fa50 T hubbub1_program_stutter_watermarks +ffffffff8206feb0 T hubbub1_program_pstate_watermarks +ffffffff82070100 T hubbub1_program_watermarks +ffffffff82070230 T hubbub1_update_dchub +ffffffff82070460 T hubbub1_toggle_watermark_change_req +ffffffff82070500 T hubbub1_soft_reset +ffffffff82070540 T hubbub1_construct +ffffffff820705a0 t hubbub1_get_dcc_compression_cap +ffffffff820707c0 t hubbub1_dcc_support_swizzle +ffffffff82070850 t hubbub1_dcc_support_pixel_format +ffffffff82071000 T hubp1_set_blank +ffffffff82071110 T hubp1_clear_underflow +ffffffff82071160 T hubp1_vready_workaround +ffffffff820711f0 T hubp1_program_tiling +ffffffff82071450 T hubp1_program_size +ffffffff820715d0 T hubp1_program_rotation +ffffffff82071740 T hubp1_program_pixel_format +ffffffff82071d10 T hubp1_program_surface_flip_and_addr +ffffffff82072590 T hubp1_dcc_control +ffffffff82072650 T hubp1_program_surface_config +ffffffff82072760 T hubp1_program_requestor +ffffffff82072b30 T hubp1_program_deadline +ffffffff82073240 T hubp1_is_flip_pending +ffffffff82073350 T min_set_viewport +ffffffff82073650 T hubp1_read_state_common +ffffffff82074340 T hubp1_read_state +ffffffff82074610 T hubp1_get_cursor_pitch +ffffffff820746b0 T hubp1_cursor_set_attributes +ffffffff82074960 T hubp1_cursor_set_position +ffffffff82074cc0 T hubp1_clk_cntl +ffffffff82074d10 T hubp1_vtg_sel +ffffffff82074d50 T hubp1_in_blank +ffffffff82074dc0 T hubp1_soft_reset +ffffffff82074e00 T hubp1_set_flip_int +ffffffff82074e50 T hubp1_init +ffffffff82074e80 T dcn10_hubp_construct +ffffffff82074ef0 t hubp1_setup +ffffffff82074fb0 t hubp1_setup_interdependent +ffffffff82075330 t hubp1_set_vm_system_aperture_settings +ffffffff82075550 t hubp1_set_vm_context0_settings +ffffffff82075830 t hubp1_set_hubp_blank_en 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dcn10_update_plane_addr +ffffffff8207a460 T dcn10_set_input_transfer_func +ffffffff8207a5d0 T dcn10_set_output_transfer_func +ffffffff8207a6a0 T dcn10_pipe_control_lock +ffffffff8207a770 T dcn10_cursor_lock +ffffffff8207a930 T dcn10_enable_vblanks_synchronization +ffffffff8207b110 T dcn10_enable_timing_synchronization +ffffffff8207b510 T dcn10_enable_per_frame_crtc_position_reset +ffffffff8207b6e0 T dcn10_program_gamut_remap +ffffffff8207b8e0 T dcn10_program_output_csc +ffffffff8207ba10 T dcn10_update_visual_confirm_color +ffffffff8207ba90 T dcn10_update_mpcc +ffffffff8207bd40 T dcn10_blank_pixel_data +ffffffff8207be80 T dcn10_set_hdr_multiplier +ffffffff8207bf10 T dcn10_program_pipe +ffffffff8207cab0 T dcn10_wait_for_pending_cleared +ffffffff8207cbb0 T dcn10_post_unlock_program_front_end +ffffffff8207ce50 T dcn10_prepare_bandwidth +ffffffff8207cff0 T dcn10_optimize_bandwidth +ffffffff8207d190 T dcn10_set_drr +ffffffff8207d290 T dcn10_get_position +ffffffff8207d320 T dcn10_set_static_screen_control +ffffffff8207d3c0 T dcn10_setup_stereo +ffffffff8207d510 T dcn10_wait_for_mpcc_disconnect +ffffffff8207d6c0 T dcn10_dummy_display_power_gating +ffffffff8207d6f0 T dcn10_update_pending_status +ffffffff8207d830 T dcn10_update_dchub +ffffffff8207d860 T dcn10_set_cursor_position +ffffffff8207dda0 T dcn10_set_cursor_attribute +ffffffff8207ddf0 T dcn10_set_cursor_sdr_white_level +ffffffff8207deb0 T dcn10_get_vupdate_offset_from_vsync +ffffffff8207df40 T dcn10_calc_vupdate_position +ffffffff8207dfd0 T dcn10_setup_periodic_interrupt +ffffffff8207e0e0 T dcn10_setup_vupdate_interrupt +ffffffff8207e1a0 T dcn10_unblank_stream +ffffffff8207e2b0 T dcn10_send_immediate_sdp_message +ffffffff8207e310 T dcn10_set_clock +ffffffff8207e420 T dcn10_get_clock +ffffffff8207e480 T dcn10_get_dcc_en_bits +ffffffff8207f000 T snprintf_count +ffffffff8207f090 T dcn10_clear_status_bits +ffffffff8207f240 T dcn10_get_hw_state +ffffffff82081000 T dcn10_hw_sequencer_construct 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+ffffffff82083e60 T dcn10_link_encoder_enable_dp_output +ffffffff82083fc0 T dcn10_link_encoder_enable_dp_mst_output +ffffffff82084120 T dcn10_link_encoder_disable_output +ffffffff820842f0 T dcn10_link_encoder_dp_set_lane_settings +ffffffff82084490 T dcn10_link_encoder_dp_set_phy_pattern +ffffffff82084bb0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff82084db0 T dcn10_link_encoder_update_mst_stream_allocation_table +ffffffff82085080 T dcn10_link_encoder_connect_dig_be_to_fe +ffffffff820851c0 T dcn10_link_encoder_enable_hpd +ffffffff82085200 T dcn10_link_encoder_disable_hpd +ffffffff82085240 T dcn10_get_dig_mode +ffffffff820852b0 T dcn10_link_encoder_get_max_link_cap +ffffffff82085330 t program_pattern_symbols +ffffffff82086000 T mpc1_set_bg_color +ffffffff820861e0 T mpc1_get_mpcc +ffffffff82086270 T mpc1_update_stereo_mix +ffffffff82086390 T mpc1_assert_idle_mpcc +ffffffff82086460 T mpc1_get_mpcc_for_dpp +ffffffff82086510 T mpc1_is_mpcc_idle +ffffffff82086600 T mpc1_assert_mpcc_idle_before_connect +ffffffff82086740 T mpc1_insert_plane +ffffffff82086ce0 T mpc1_remove_mpcc +ffffffff820870a0 T mpc1_mpc_init +ffffffff820873c0 T mpc1_mpc_init_single_inst +ffffffff820875b0 T mpc1_init_mpcc_list_from_hw +ffffffff82087880 T mpc1_read_mpcc_state +ffffffff82087a10 T mpc1_cursor_lock +ffffffff82087a90 T mpc1_get_mpc_out_mux +ffffffff82087b10 T dcn10_mpc_construct +ffffffff82087c90 t mpc1_update_blending +ffffffff82088000 T opp1_program_bit_depth_reduction +ffffffff82088400 T opp1_set_dyn_expansion +ffffffff82088570 T opp1_program_fmt +ffffffff82088870 T opp1_program_stereo +ffffffff82088960 T opp1_pipe_clock_control +ffffffff820889a0 T opp1_destroy +ffffffff820889f0 T dcn10_opp_construct +ffffffff82089000 T optc1_program_global_sync +ffffffff82089150 T optc1_setup_vertical_interrupt0 +ffffffff820891e0 T optc1_setup_vertical_interrupt1 +ffffffff82089250 T optc1_setup_vertical_interrupt2 +ffffffff820892c0 T optc1_program_timing +ffffffff820899a0 T optc1_is_two_pixels_per_containter +ffffffff820899f0 T optc1_set_vtg_params +ffffffff82089b20 T optc1_set_blank_data_double_buffer +ffffffff82089b60 T optc1_set_timing_double_buffer +ffffffff82089ba0 T optc1_set_blank +ffffffff82089c70 T optc1_is_blanked +ffffffff82089cf0 T optc1_enable_optc_clock +ffffffff82089f10 T optc1_disable_crtc +ffffffff8208a000 T optc1_program_blank_color +ffffffff8208a0b0 T optc1_validate_timing +ffffffff8208a1b0 T optc1_get_vblank_counter +ffffffff8208a210 T optc1_lock +ffffffff8208a2f0 T optc1_unlock +ffffffff8208a360 T optc1_get_position +ffffffff8208a3f0 T optc1_is_counter_moving +ffffffff8208a470 T optc1_did_triggered_reset_occur +ffffffff8208a510 T optc1_disable_reset_trigger +ffffffff8208a5d0 T optc1_enable_reset_trigger +ffffffff8208a6e0 T optc1_enable_crtc_reset +ffffffff8208a840 T optc1_wait_for_state +ffffffff8208a910 T optc1_set_early_control +ffffffff8208a940 T optc1_set_static_screen_control +ffffffff8208a9e0 T optc1_set_drr +ffffffff8208ab80 T optc1_set_vtotal_min_max +ffffffff8208ac20 T optc1_get_crtc_scanoutpos +ffffffff8208ad30 T optc1_program_stereo +ffffffff8208af40 T optc1_is_stereo_left_eye +ffffffff8208afb0 T optc1_get_hw_timing +ffffffff8208b0c0 T optc1_read_otg_state +ffffffff8208b3d0 T optc1_get_otg_active_size +ffffffff8208b4e0 T optc1_clear_optc_underflow +ffffffff8208b530 T optc1_tg_init +ffffffff8208b5e0 T optc1_is_tg_enabled +ffffffff8208b650 T optc1_is_optc_underflow_occurred +ffffffff8208b6c0 T optc1_configure_crc +ffffffff8208b930 T optc1_get_crc +ffffffff8208ba30 T dcn10_timing_generator_init +ffffffff8208baa0 t optc1_enable_crtc +ffffffff8208bba0 t optc1_set_test_pattern +ffffffff8208c290 t optc1_program_manual_trigger +ffffffff8208c340 t optc1_setup_manual_trigger +ffffffff8208d000 T dcn10_find_first_free_match_stream_enc_for_link +ffffffff8208d0b0 T dcn10_create_resource_pool +ffffffff8208e230 t dcn10_resource_destruct +ffffffff8208e540 t dcn10_destroy_resource_pool +ffffffff8208e5a0 t dcn10_panel_cntl_create +ffffffff8208e630 t dcn10_link_encoder_create +ffffffff8208e730 t dcn10_validate_bandwidth +ffffffff8208e7b0 t dcn10_validate_global +ffffffff8208e990 t dcn10_acquire_free_pipe_for_layer +ffffffff8208eac0 t dcn10_validate_plane +ffffffff8208eb10 t dcn10_add_stream_to_ctx +ffffffff8208ece0 t dcn10_patch_unknown_plane_state +ffffffff8208ed40 t read_dce_straps +ffffffff8208ed70 t create_audio +ffffffff8208eda0 t dcn10_stream_encoder_create +ffffffff8208ee40 t dcn10_hwseq_create +ffffffff8208eef0 t dcn10_get_dcc_compression_cap +ffffffff8208f000 T enc1_update_generic_info_packet +ffffffff8208f430 T enc1_stream_encoder_dp_set_stream_attribute +ffffffff8208f910 T enc1_stream_encoder_set_stream_attribute_helper +ffffffff8208f990 T enc1_stream_encoder_hdmi_set_stream_attribute +ffffffff8208ff80 T enc1_stream_encoder_dvi_set_stream_attribute +ffffffff82090110 T enc1_stream_encoder_set_throttled_vcp_size +ffffffff82090330 T enc1_stream_encoder_update_dp_info_packets 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dcn10_stream_encoder_construct +ffffffff82091f60 t enc1_stream_encoder_update_hdmi_info_packets +ffffffff82092310 t enc1_stream_encoder_stop_hdmi_info_packets +ffffffff82093000 T dccg2_update_dpp_dto +ffffffff82093160 T dccg2_get_dccg_ref_freq +ffffffff82093220 T dccg2_set_fifo_errdet_ovr_en +ffffffff82093260 T dccg2_otg_add_pixel +ffffffff82093300 T dccg2_otg_drop_pixel +ffffffff820933a0 T dccg2_init +ffffffff820933d0 T dccg2_create +ffffffff82093480 T dcn_dccg_destroy +ffffffff82094000 T dpp20_read_state +ffffffff820941d0 T dpp2_power_on_obuf +ffffffff820942a0 T dpp2_dummy_program_input_lut +ffffffff820942d0 T dscl2_calc_lb_num_partitions +ffffffff82094400 T dpp2_cnv_set_alpha_keyer +ffffffff82094680 T dpp2_set_cursor_attributes +ffffffff820947e0 T oppn20_dummy_program_regamma_pwl +ffffffff82094810 T dpp2_construct +ffffffff82094890 t dpp2_cnv_setup +ffffffff82096000 T dpp2_set_degamma_pwl +ffffffff820963b0 T dpp2_set_degamma +ffffffff82096560 T dpp2_cm_set_gamut_remap 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dwb2_disable +ffffffff8209d310 T dwb2_is_enabled +ffffffff8209d3b0 T dwb2_set_stereo +ffffffff8209d490 T dwb2_set_new_content +ffffffff8209d500 T dwb2_set_scaler +ffffffff8209d880 T dcn20_dwbc_construct +ffffffff8209d8d0 t dwb2_get_caps +ffffffff8209d9b0 t dwb2_enable +ffffffff8209db10 t dwb2_update +ffffffff8209dc70 t dwb2_set_warmup +ffffffff8209e000 T dwb_program_horz_scalar +ffffffff8209e4c0 t wbscl_get_filter_coeffs_16p +ffffffff8209e990 t wbscl_set_scaler_filter +ffffffff8209eba0 T dwb_program_vert_scalar +ffffffff820a0000 T hubbub2_dcc_support_swizzle +ffffffff820a00c0 T hubbub2_dcc_support_pixel_format +ffffffff820a0110 T hubbub2_get_dcc_compression_cap +ffffffff820a0350 T hubbub2_init_vm_ctx +ffffffff820a04a0 T hubbub2_init_dchub_sys_ctx +ffffffff820a06e0 T hubbub2_update_dchub +ffffffff820a08d0 T hubbub2_wm_read_state +ffffffff820a0c00 T hubbub2_get_dchub_ref_freq +ffffffff820a0ce0 T hubbub2_read_state +ffffffff820a0eb0 T hubbub2_construct +ffffffff820a0f10 t hubbub2_program_watermarks +ffffffff820a2000 T hubp2_set_vm_system_aperture_settings +ffffffff820a21e0 T hubp2_program_deadline +ffffffff820a2980 T hubp2_vready_at_or_After_vsync +ffffffff820a2a20 T hubp2_setup_interdependent +ffffffff820a2e90 T hubp2_program_size +ffffffff820a3010 T hubp2_program_rotation +ffffffff820a3180 T hubp2_dcc_control +ffffffff820a3240 T hubp2_program_pixel_format +ffffffff820a3810 T hubp2_program_surface_config +ffffffff820a3a50 T hubp2_get_lines_per_chunk +ffffffff820a3b10 T hubp2_cursor_set_attributes +ffffffff820a3ed0 T hubp2_dmdata_set_attributes +ffffffff820a42b0 T hubp2_dmdata_load +ffffffff820a4340 T hubp2_dmdata_status_done +ffffffff820a43b0 T hubp2_program_surface_flip_and_addr +ffffffff820a4ca0 T hubp2_enable_triplebuffer +ffffffff820a4d70 T hubp2_is_triplebuffer_enabled +ffffffff820a4df0 T hubp2_set_flip_control_surface_gsl +ffffffff820a4e40 T hubp2_is_flip_pending +ffffffff820a4f50 T hubp2_set_blank +ffffffff820a4fb0 T hubp2_set_blank_regs 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dcn20_enable_stream_timing +ffffffff820a9e50 T dcn20_program_output_csc +ffffffff820a9f40 T dcn20_set_output_transfer_func +ffffffff820aa0c0 T dcn20_set_blend_lut +ffffffff820aa130 T dcn20_set_shaper_3dlut +ffffffff820aa1f0 T dcn20_set_input_transfer_func +ffffffff820aa3b0 T dcn20_update_odm +ffffffff820aa4a0 T dcn20_pipe_control_lock +ffffffff820aa7c0 T dcn20_program_front_end_for_ctx +ffffffff820ab470 t dcn20_program_pipe +ffffffff820abf10 T dcn20_post_unlock_program_front_end +ffffffff820ac1e0 T dcn20_prepare_bandwidth +ffffffff820ac350 T dcn20_optimize_bandwidth +ffffffff820ac560 T dcn20_update_bandwidth +ffffffff820ac820 T dcn20_enable_writeback +ffffffff820ac970 T dcn20_disable_writeback +ffffffff820aca00 T dcn20_wait_for_blank_complete +ffffffff820aca90 T dcn20_dmdata_status_done +ffffffff820acae0 T dcn20_disable_stream_gating +ffffffff820acb90 T dcn20_enable_stream_gating +ffffffff820acc30 T dcn20_set_dmdata_attributes +ffffffff820accf0 T dcn20_init_vm_ctx +ffffffff820acdb0 T dcn20_init_sys_ctx +ffffffff820ace60 T dcn20_update_plane_addr +ffffffff820acfa0 T dcn20_unblank_stream +ffffffff820ad150 T dcn20_setup_vupdate_interrupt +ffffffff820ad1c0 T dcn20_reset_hw_ctx_wrap +ffffffff820ad560 T dcn20_update_mpcc +ffffffff820ad7c0 T dcn20_enable_stream +ffffffff820adb20 T dcn20_program_dmdata_engine +ffffffff820adbc0 T dcn20_fpga_init_hw +ffffffff820ae1a0 T dcn20_optimize_timing_for_fsft +ffffffff820ae1e0 T dcn20_set_disp_pattern_generator +ffffffff820af000 T dcn20_hw_sequencer_construct +ffffffff820b0000 T enc2_fec_set_enable +ffffffff820b0090 T enc2_fec_set_ready +ffffffff820b00d0 T enc2_fec_is_active +ffffffff820b0140 T link_enc2_read_state +ffffffff820b01f0 T dcn20_link_encoder_enable_dp_output +ffffffff820b02f0 T dcn20_link_encoder_get_max_link_cap +ffffffff820b03a0 T dcn20_link_encoder_is_in_alt_mode +ffffffff820b0420 T enc2_hw_init +ffffffff820b0500 T dcn20_link_encoder_construct +ffffffff820b1000 T mmhubbub2_config_mcif_irq +ffffffff820b1130 T mmhubbub2_enable_mcif +ffffffff820b1170 T mmhubbub2_disable_mcif +ffffffff820b11b0 T mcifwb2_dump_frame +ffffffff820b12c0 T dcn20_mmhubbub_construct +ffffffff820b1310 t mmhubbub2_config_mcif_buf +ffffffff820b1960 t mmhubbub2_config_mcif_arb +ffffffff820b2000 T mpc2_update_blending +ffffffff820b22a0 T mpc2_set_denorm +ffffffff820b2310 T mpc2_set_denorm_clamp +ffffffff820b2460 T mpc2_set_output_csc +ffffffff820b2650 T mpc2_set_ocsc_default +ffffffff820b2830 T mpc20_power_on_ogam_lut +ffffffff820b28b0 T mpc2_set_output_gamma +ffffffff820b30b0 T mpc2_assert_idle_mpcc +ffffffff820b31c0 T mpc2_assert_mpcc_idle_before_connect +ffffffff820b3410 T dcn20_mpc_construct +ffffffff820b34d0 t mpc2_get_mpcc_for_dpp +ffffffff820b4000 T opp2_set_disp_pattern_generator +ffffffff820b4810 T opp2_dpg_set_blank_color +ffffffff820b4990 T opp2_program_dpg_dimensions +ffffffff820b4a20 T opp2_dpg_is_blanked +ffffffff820b4ae0 T opp2_program_left_edge_extra_pixel +ffffffff820b4b30 T dcn20_opp_construct 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dcn20_ipp_create +ffffffff820b71d0 T dcn20_opp_create +ffffffff820b7280 T dcn20_aux_engine_create +ffffffff820b7320 T dcn20_i2c_hw_create +ffffffff820b73b0 T dcn20_mpc_create +ffffffff820b7440 T dcn20_hubbub_create +ffffffff820b7510 T dcn20_timing_generator_create +ffffffff820b75a0 T dcn20_link_encoder_create +ffffffff820b76a0 T dcn20_stream_encoder_create +ffffffff820b7760 T dcn20_hwseq_create +ffffffff820b77d0 T dcn20_clock_source_destroy +ffffffff820b7820 T dcn20_dsc_create +ffffffff820b78e0 T dcn20_dsc_destroy +ffffffff820b7930 T dcn20_hubp_create +ffffffff820b7a00 T dcn20_build_mapped_resource +ffffffff820b7c20 T dcn20_acquire_dsc +ffffffff820b7d60 T dcn20_release_dsc +ffffffff820b7dd0 T dcn20_add_dsc_to_stream_resource +ffffffff820b7f40 T dcn20_add_stream_to_ctx +ffffffff820b7fd0 T dcn20_remove_stream_from_ctx +ffffffff820b80c0 T dcn20_split_stream_for_odm +ffffffff820b8570 T dcn20_split_stream_for_mpc +ffffffff820b86f0 T dcn20_calc_max_scaled_time +ffffffff820b8760 T dcn20_set_mcif_arb_params +ffffffff820b88d0 T dcn20_validate_dsc +ffffffff820b8a80 T dcn20_find_secondary_pipe +ffffffff820b8c60 T dcn20_merge_pipes_for_validate +ffffffff820b8ed0 T dcn20_validate_apply_pipe_split_flags +ffffffff820b9760 T dcn20_fast_validate_bw +ffffffff820b9cb0 T dcn20_validate_bandwidth +ffffffff820b9d30 T dcn20_acquire_free_pipe_for_layer +ffffffff820b9e50 T dcn20_get_dcc_compression_cap +ffffffff820b9e80 T dcn20_patch_unknown_plane_state +ffffffff820b9ee0 T dcn20_dwbc_create +ffffffff820b9ff0 T dcn20_mmhubbub_create +ffffffff820ba150 T dcn20_create_resource_pool +ffffffff820bb8f0 t dcn20_resource_destruct +ffffffff820bbda0 t dcn20_destroy_resource_pool +ffffffff820bbe00 t dcn20_panel_cntl_create +ffffffff820bbe90 t read_dce_straps +ffffffff820bbec0 t dcn20_create_audio +ffffffff820bc000 T enc2_set_dynamic_metadata +ffffffff820bc260 T enc2_stream_encoder_dp_unblank +ffffffff820bc5a0 T enc2_stream_encoder_dp_set_stream_attribute +ffffffff820bc600 T enc2_get_fifo_cal_average_level +ffffffff820bc660 T dcn20_stream_encoder_construct +ffffffff820bc6c0 t enc2_stream_encoder_update_hdmi_info_packets +ffffffff820bc790 t enc2_stream_encoder_stop_hdmi_info_packets +ffffffff820bcaa0 t enc2_stream_encoder_update_dp_info_packets_sdp_line_num +ffffffff820bcb60 t enc2_stream_encoder_update_dp_info_packets +ffffffff820bcc10 t enc2_read_state +ffffffff820bcd90 t enc2_dp_set_dsc_config +ffffffff820bce60 t enc2_dp_set_dsc_pps_info_packet +ffffffff820bd330 t enc2_dp_set_odm_combine +ffffffff820bd370 t enc2_update_hdmi_info_packet +ffffffff820be000 T dcn20_vmid_setup +ffffffff820bf000 T dccg201_create +ffffffff820bf0b0 t dccg201_update_dpp_dto +ffffffff820c0000 T dpp201_construct +ffffffff820c0080 t dpp201_get_optimal_number_of_taps +ffffffff820c0440 t dpp201_cnv_setup +ffffffff820c1000 T hubbub201_construct +ffffffff820c1060 t hubbub201_program_watermarks +ffffffff820c2000 T dcn201_hubp_construct +ffffffff820c2070 t hubp201_setup +ffffffff820c2350 t hubp201_program_surface_config +ffffffff820c3000 T dcn201_update_plane_addr +ffffffff820c32a0 T dcn201_init_blank +ffffffff820c33e0 T dcn201_init_hw +ffffffff820c3bb0 T dcn201_plane_atomic_disconnect +ffffffff820c3d20 T dcn201_update_mpcc +ffffffff820c3fb0 T dcn201_pipe_control_lock +ffffffff820c40b0 T dcn201_set_cursor_attribute +ffffffff820c4140 T dcn201_set_dmdata_attributes +ffffffff820c4250 T dcn201_unblank_stream +ffffffff820c5000 T dcn201_hw_sequencer_construct +ffffffff820c6000 T dcn201_link_encoder_construct +ffffffff820c6190 t dcn201_link_encoder_is_in_alt_mode +ffffffff820c6200 t dcn201_link_encoder_get_max_link_cap +ffffffff820c7000 T dcn201_mpc_construct +ffffffff820c70c0 t mpc201_set_out_rate_control +ffffffff820c8000 T dcn201_opp_construct +ffffffff820c9000 T optc201_is_two_pixels_per_containter +ffffffff820c9010 T dcn201_timing_generator_init +ffffffff820c9080 t optc201_validate_timing +ffffffff820c9180 t optc201_triplebuffer_unlock +ffffffff820c9230 t optc201_triplebuffer_lock +ffffffff820c9350 t optc201_get_optc_source +ffffffff820ca000 T dcn201_create_resource_pool +ffffffff820caa30 t dcn201_resource_destruct +ffffffff820cad30 t dcn201_destroy_resource_pool +ffffffff820cad90 t dcn201_link_init +ffffffff820cade0 t dcn201_link_encoder_create +ffffffff820cae90 t dcn201_acquire_free_pipe_for_layer +ffffffff820cafa0 t dcn201_populate_dml_writeback_from_context +ffffffff820cb000 t read_dce_straps +ffffffff820cb030 t dcn201_create_audio +ffffffff820cb060 t dcn201_stream_encoder_create +ffffffff820cb100 t dcn201_hwseq_create +ffffffff820cb170 t dcn201_get_dcc_compression_cap +ffffffff820cc000 T dccg21_create +ffffffff820cc0b0 t dccg21_update_dpp_dto +ffffffff820cd000 T dcn21_dchvm_init +ffffffff820cd200 T hubbub21_init_dchub +ffffffff820cd3d0 T hubbub21_program_urgent_watermarks +ffffffff820cdbf0 T hubbub21_program_stutter_watermarks +ffffffff820ce0e0 T hubbub21_program_pstate_watermarks +ffffffff820ce380 T hubbub21_program_watermarks +ffffffff820ce4e0 T hubbub21_wm_read_state +ffffffff820ce780 T hubbub21_construct +ffffffff820ce7e0 t hubbub21_apply_DEDCN21_147_wa +ffffffff820cf000 T apply_DEDCN21_142_wa_for_hostvm_deadline +ffffffff820cf2e0 T hubp21_program_deadline +ffffffff820cf310 T hubp21_program_requestor +ffffffff820cf6b0 T hubp21_construct +ffffffff820cf720 t hubp21_setup +ffffffff820cf780 t hubp21_set_viewport +ffffffff820cfa80 t hubp21_program_surface_flip_and_addr +ffffffff820d0370 t hubp21_set_vm_system_aperture_settings +ffffffff820d04a0 t hubp21_init +ffffffff820d04d0 t hubp21_validate_dml_output +ffffffff820d2000 T dcn21_init_sys_ctx +ffffffff820d2110 T dcn21_s0i3_golden_init_wa +ffffffff820d2170 T dcn21_exit_optimized_pwr_state +ffffffff820d2190 T dcn21_optimize_pwr_state +ffffffff820d21c0 T dcn21_PLAT_58856_wa +ffffffff820d2260 T dcn21_set_abm_immediate_disable +ffffffff820d23a0 T dcn21_set_pipe +ffffffff820d24d0 T dcn21_set_backlight_level +ffffffff820d26d0 T dcn21_is_abm_supported +ffffffff820d3000 T dcn21_hw_sequencer_construct +ffffffff820d4000 T dcn21_link_encoder_enable_dp_output +ffffffff820d4140 t dcn21_link_encoder_acquire_phy +ffffffff820d4320 T dcn21_link_encoder_construct +ffffffff820d4500 t dcn21_link_encoder_enable_dp_mst_output +ffffffff820d4570 t dcn21_link_encoder_disable_output +ffffffff820d5000 T dcn21_fast_validate_bw +ffffffff820d56a0 T dcn21_create_resource_pool +ffffffff820d69d0 t dcn21_resource_destruct +ffffffff820d6e70 t dcn21_destroy_resource_pool +ffffffff820d6ed0 t dcn21_panel_cntl_create +ffffffff820d6f60 t dcn21_link_encoder_create +ffffffff820d7060 t dcn21_validate_bandwidth +ffffffff820d70e0 t dcn21_patch_unknown_plane_state +ffffffff820d7130 t dcn21_get_panel_config_defaults +ffffffff820d7170 t read_dce_straps +ffffffff820d71a0 t dcn21_create_audio +ffffffff820d71d0 t dcn21_stream_encoder_create +ffffffff820d7270 t dcn21_hwseq_create +ffffffff820d8000 T afmt3_setup_hdmi_audio +ffffffff820d81d0 T afmt3_se_audio_setup +ffffffff820d8370 T afmt3_audio_mute_control +ffffffff820d83e0 T afmt3_audio_info_immediate_update +ffffffff820d8420 T afmt3_setup_dp_audio +ffffffff820d8510 T afmt3_construct +ffffffff820d9000 T cm_helper_program_gamcor_xfer_func +ffffffff820d93c0 T cm3_helper_translate_curve_to_hw_format +ffffffff820d9fd0 T cm3_helper_convert_to_custom_float +ffffffff820da420 T cm3_helper_translate_curve_to_degamma_hw_format +ffffffff820dac40 T is_rgb_equal +ffffffff820db000 T dccg3_create +ffffffff820db0b0 T dccg30_create +ffffffff820dc000 T dcn30_link_encoder_validate_output_with_stream +ffffffff820dc010 T dcn30_link_encoder_construct +ffffffff820dc1f0 T enc3_hw_init +ffffffff820dd000 T enc3_stream_encoder_update_hdmi_info_packets +ffffffff820dd100 t enc3_update_hdmi_info_packet +ffffffff820dd4f0 T enc3_stream_encoder_stop_hdmi_info_packets +ffffffff820ddad0 T enc3_dp_set_dsc_pps_info_packet +ffffffff820dddf0 T enc3_stream_encoder_update_dp_info_packets_sdp_line_num +ffffffff820ddeb0 T enc3_stream_encoder_update_dp_info_packets +ffffffff820de170 T enc3_audio_mute_control +ffffffff820de1e0 T enc3_se_dp_audio_setup +ffffffff820de260 T enc3_se_dp_audio_enable +ffffffff820de350 T enc3_se_hdmi_audio_setup +ffffffff820de660 T dcn30_dio_stream_encoder_construct +ffffffff820de6d0 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff820decd0 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff820deed0 t enc3_read_state +ffffffff820df060 t enc3_dp_set_dsc_config +ffffffff820df130 t enc3_dp_set_odm_combine +ffffffff820e0000 T dpp30_read_state +ffffffff820e0050 T dpp3_program_post_csc +ffffffff820e0240 T dpp3_set_pre_degam +ffffffff820e02f0 T dpp3_cnv_setup +ffffffff820e0bc0 T dpp3_set_cursor_attributes +ffffffff820e0d30 T dpp3_get_optimal_number_of_taps +ffffffff820e1750 T dpp3_construct +ffffffff820e17b0 t dpp3_deferred_update +ffffffff820e1b90 t dpp3_program_blnd_lut +ffffffff820e25e0 t dpp3_program_shaper +ffffffff820e4660 t dpp3_program_3dlut +ffffffff820e4e10 t dpp3_set3dlut_ram12 +ffffffff820e5000 T dpp3_program_cm_dealpha +ffffffff820e50a0 T dpp3_program_cm_bias +ffffffff820e5190 T dpp3_program_gamcor_lut +ffffffff820e5bb0 t dpp3_power_on_gamcor_lut +ffffffff820e5ce0 T dpp3_set_hdr_multiplier +ffffffff820e5d30 T dpp3_cm_set_gamut_remap +ffffffff820e6000 T dwb3_config_fc +ffffffff820e61b0 T dwb3_set_stereo +ffffffff820e6270 T dwb3_enable +ffffffff820e63a0 T dwb3_set_denorm +ffffffff820e64c0 T dwb3_disable +ffffffff820e6570 T dwb3_update +ffffffff820e66a0 T dwb3_is_enabled +ffffffff820e6740 T dwb3_set_new_content +ffffffff820e6780 T dcn30_dwbc_construct +ffffffff820e67d0 T dwb3_set_host_read_rate_control +ffffffff820e6840 t dwb3_get_caps +ffffffff820e7000 T dwb3_ogam_set_input_transfer_func +ffffffff820e79f0 T dwb3_set_gamut_remap +ffffffff820e7ca0 T dwb3_program_hdr_mult +ffffffff820e8000 T hubbub3_init_dchub_sys_ctx +ffffffff820e81c0 T hubbub3_program_watermarks +ffffffff820e82c0 T hubbub3_dcc_support_swizzle +ffffffff820e8380 T hubbub3_get_dcc_compression_cap +ffffffff820e8560 T hubbub3_force_wm_propagate_to_pipes +ffffffff820e8610 T hubbub3_force_pstate_change_control +ffffffff820e8690 T hubbub3_init_watermarks +ffffffff820e89d0 T hubbub3_construct +ffffffff820e9000 T hubp3_set_vm_system_aperture_settings +ffffffff820e9130 T hubp3_program_surface_flip_and_addr +ffffffff820e9b20 T hubp3_dcc_control +ffffffff820e9be0 T hubp3_dcc_control_sienna_cichlid +ffffffff820e9d00 T hubp3_dmdata_set_attributes +ffffffff820e9f00 T hubp3_program_surface_config +ffffffff820ea1f0 T hubp3_read_state +ffffffff820ea4c0 T hubp3_setup +ffffffff820ea550 T hubp3_init +ffffffff820ea580 T hubp3_construct +ffffffff820eb000 T dcn30_set_blend_lut +ffffffff820eb070 T dcn30_set_input_transfer_func +ffffffff820eb1d0 T dcn30_set_output_transfer_func +ffffffff820eb500 T dcn30_update_writeback +ffffffff820eb590 t dcn30_set_writeback +ffffffff820eb740 T dcn30_mmhubbub_warmup +ffffffff820eb990 T dcn30_enable_writeback +ffffffff820eba40 T dcn30_disable_writeback +ffffffff820ebb20 T dcn30_program_all_writeback_pipes_in_tree +ffffffff820ebe20 T dcn30_init_hw +ffffffff820ec550 T dcn30_set_avmute +ffffffff820ec5b0 T dcn30_update_info_frame +ffffffff820ec6a0 T dcn30_program_dmdata_engine +ffffffff820ec740 T dcn30_apply_idle_power_optimizations +ffffffff820ecc60 T dcn30_does_plane_fit_in_mall +ffffffff820ecd10 T dcn30_hardware_release +ffffffff820ece00 T dcn30_set_disp_pattern_generator +ffffffff820ece70 T dcn30_prepare_bandwidth +ffffffff820ecf60 T dcn30_set_static_screen_control +ffffffff820ed000 T dcn30_hw_sequencer_construct +ffffffff820ee000 T dcn30_mmhubbub_construct +ffffffff820ee050 t mmhubbub3_warmup_mcif +ffffffff820ee260 t mmhubbub3_config_mcif_buf +ffffffff820ee710 t mmhubbub3_config_mcif_arb +ffffffff820ef000 T mpc3_is_dwb_idle +ffffffff820ef070 T mpc3_set_dwb_mux +ffffffff820ef0f0 T mpc3_disable_dwb_mux +ffffffff820ef170 T mpc3_set_out_rate_control +ffffffff820ef280 T mpc3_get_ogam_current +ffffffff820ef320 T mpc3_power_on_ogam_lut +ffffffff820ef3f0 T mpc3_set_output_gamma +ffffffff820f0030 T mpc3_set_denorm +ffffffff820f00a0 T mpc3_set_denorm_clamp +ffffffff820f01f0 T mpc3_program_shaper +ffffffff820f23b0 t mpc3_power_on_shaper_3dlut +ffffffff820f2730 T mpc3_init_mpcc +ffffffff820f27b0 T mpc3_set_gamut_remap +ffffffff820f2a20 T mpc3_program_3dlut +ffffffff820f3190 t mpc3_set3dlut_ram12 +ffffffff820f3370 T mpc3_set_output_csc +ffffffff820f34e0 T mpc3_set_ocsc_default +ffffffff820f3650 T mpc3_set_rmu_mux +ffffffff820f36f0 T mpc3_get_rmu_mux_status +ffffffff820f37a0 T mpcc3_acquire_rmu +ffffffff820f3900 T dcn30_mpc_construct +ffffffff820f39d0 t mpcc3_release_rmu +ffffffff820f3b40 t mpc3_set_mpc_mem_lp_mode +ffffffff820f4000 T optc3_triplebuffer_lock +ffffffff820f4120 T optc3_lock_doublebuffer_enable +ffffffff820f43b0 T optc3_lock_doublebuffer_disable +ffffffff820f44d0 T optc3_lock +ffffffff820f45a0 T optc3_set_out_mux +ffffffff820f45e0 T optc3_program_blank_color +ffffffff820f4710 T optc3_set_drr_trigger_window +ffffffff820f47a0 T optc3_set_vtotal_change_limit +ffffffff820f4810 T optc3_set_dsc_config +ffffffff820f4860 T optc3_set_odm_bypass +ffffffff820f49e0 T optc3_set_odm_combine +ffffffff820f4d30 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff820f4db0 T optc3_set_vtotal_min_max +ffffffff820f4df0 T optc3_tg_init +ffffffff820f4e50 T dcn30_timing_generator_init +ffffffff820f5000 T dcn30_add_stream_to_ctx +ffffffff820f5020 T dcn30_populate_dml_pipes_from_context +ffffffff820f5100 T dcn30_populate_dml_writeback_from_context +ffffffff820f5160 T dcn30_calc_max_scaled_time +ffffffff820f51c0 T dcn30_set_mcif_arb_params +ffffffff820f5330 T dcn30_acquire_post_bldn_3dlut +ffffffff820f54c0 T dcn30_release_post_bldn_3dlut +ffffffff820f5570 T dcn30_internal_validate_bw +ffffffff820f62e0 t dcn30_split_stream_for_mpc_or_odm +ffffffff820f6600 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff820f66e0 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff820f6780 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff820f6820 T dcn30_update_soc_for_wm_a +ffffffff820f6870 T dcn30_calculate_wm_and_dlg +ffffffff820f68e0 T dcn30_validate_bandwidth +ffffffff820f6d10 T dcn30_update_bw_bounding_box +ffffffff820f7370 T dcn30_create_resource_pool +ffffffff820f8920 t dcn30_resource_destruct +ffffffff820f8ea0 t dcn30_destroy_resource_pool +ffffffff820f8f00 t dcn30_panel_cntl_create +ffffffff820f8f90 t dcn30_link_encoder_create +ffffffff820f9040 t dcn30_get_panel_config_defaults +ffffffff820f90c0 t read_dce_straps +ffffffff820f90f0 t dcn30_create_audio +ffffffff820f9120 t dcn30_stream_encoder_create +ffffffff820f92a0 t dcn30_hwseq_create +ffffffff820fa000 T vpg3_update_generic_info_packet +ffffffff820fa9a0 T vpg3_construct +ffffffff820fb000 T dccg301_create +ffffffff820fc000 T dcn301_link_encoder_construct +ffffffff820fd000 T hubbub301_construct +ffffffff820fe000 T dcn301_hw_sequencer_construct +ffffffff820ff000 T optc301_set_drr +ffffffff820ff230 T optc301_setup_manual_trigger +ffffffff820ff350 T dcn301_timing_generator_init +ffffffff82100000 T dcn301_panel_cntl_construct +ffffffff82100050 t dcn301_panel_cntl_destroy +ffffffff821000a0 t dcn301_panel_cntl_hw_init +ffffffff821002b0 t dcn301_is_panel_backlight_on +ffffffff82100310 t dcn301_is_panel_powered_on +ffffffff821003c0 t dcn301_store_backlight_level +ffffffff82100460 t dcn301_get_16_bit_backlight_from_pwm +ffffffff82101000 T dcn301_create_resource_pool +ffffffff82102590 t dcn301_destruct +ffffffff82102ad0 t dcn301_destroy_resource_pool +ffffffff82102b30 t dcn301_panel_cntl_create +ffffffff82102bc0 t dcn301_link_encoder_create +ffffffff82102c70 t dcn301_calculate_wm_and_dlg +ffffffff82102ce0 t read_dce_straps +ffffffff82102d10 t dcn301_create_audio +ffffffff82102d40 t dcn301_stream_encoder_create +ffffffff82102ec0 t dcn301_hwseq_create +ffffffff82103000 T dcn302_dpp_pg_control +ffffffff821032a0 T dcn302_hubp_pg_control +ffffffff82103550 T dcn302_dsc_pg_control +ffffffff82104000 T dcn302_hw_sequencer_construct +ffffffff82105000 T dcn302_update_bw_bounding_box +ffffffff82105050 T dcn302_create_resource_pool +ffffffff821064a0 t dcn302_resource_destruct +ffffffff821069e0 t dcn302_destroy_resource_pool +ffffffff82106a30 t dcn302_panel_cntl_create +ffffffff82106ac0 t dcn302_link_encoder_create +ffffffff82106b70 t dcn302_get_panel_config_defaults +ffffffff82106bf0 t read_dce_straps +ffffffff82106c20 t dcn302_create_audio +ffffffff82106c50 t dcn302_stream_encoder_create +ffffffff82106dd0 t dcn302_hwseq_create +ffffffff82107000 T dcn303_dpp_pg_control +ffffffff82107030 T dcn303_hubp_pg_control +ffffffff82107060 T dcn303_dsc_pg_control +ffffffff82107090 T dcn303_enable_power_gating_plane +ffffffff82108000 T dcn303_hw_sequencer_construct +ffffffff82109000 T dcn303_update_bw_bounding_box +ffffffff82109050 T dcn303_create_resource_pool +ffffffff8210a2a0 t dcn303_resource_destruct +ffffffff8210a7e0 t dcn303_destroy_resource_pool +ffffffff8210a830 t dcn303_panel_cntl_create +ffffffff8210a8c0 t dcn303_link_encoder_create +ffffffff8210a970 t dcn303_get_panel_config_defaults +ffffffff8210a9f0 t read_dce_straps +ffffffff8210aa20 t dcn303_create_audio +ffffffff8210aa50 t dcn303_stream_encoder_create +ffffffff8210abd0 t dcn303_hwseq_create +ffffffff8210b000 T afmt31_powerdown +ffffffff8210b090 T afmt31_poweron +ffffffff8210b120 T afmt31_construct +ffffffff8210c000 T apg31_construct +ffffffff8210c050 t apg31_se_audio_setup +ffffffff8210c160 t apg31_enable +ffffffff8210c270 t apg31_disable +ffffffff8210d000 T dccg31_update_dpp_dto +ffffffff8210d160 T dccg31_set_dpstreamclk +ffffffff8210d2f0 t dccg31_disable_dpstreamclk +ffffffff8210d440 T dccg31_enable_symclk32_se +ffffffff8210d740 T dccg31_disable_symclk32_se +ffffffff8210da10 T dccg31_enable_symclk32_le +ffffffff8210db20 T dccg31_disable_symclk32_le +ffffffff8210dc10 T dccg31_set_symclk32_le_root_clock_gating +ffffffff8210dd20 T dccg31_disable_dscclk +ffffffff8210df70 T dccg31_enable_dscclk +ffffffff8210e1e0 T dccg31_set_physymclk +ffffffff8210e6f0 T dccg31_set_dtbclk_dto +ffffffff8210e9a0 T dccg31_set_audio_dtbclk_dto +ffffffff8210eab0 T dccg31_get_dccg_ref_freq +ffffffff8210eae0 T dccg31_set_dispclk_change_mode +ffffffff8210eb30 T dccg31_init +ffffffff8210f110 T dccg31_otg_add_pixel +ffffffff8210f150 T dccg31_otg_drop_pixel +ffffffff8210f190 T dccg31_create +ffffffff82110000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff82110390 T dcn31_link_encoder_construct +ffffffff82110560 T dcn31_link_encoder_construct_minimal +ffffffff821105e0 T dcn31_link_encoder_enable_dp_output +ffffffff82110820 T dcn31_link_encoder_enable_dp_mst_output +ffffffff82110a60 T dcn31_link_encoder_disable_output +ffffffff82110cd0 T dcn31_link_encoder_is_in_alt_mode +ffffffff82110e20 T dcn31_link_encoder_get_max_link_cap +ffffffff82110fa0 t enc31_hw_init +ffffffff82111000 T dcn31_hpo_dp_link_enc_enable +ffffffff82111160 T dcn31_hpo_dp_link_enc_disable +ffffffff821111d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff82111b30 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff82111db0 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff82112050 T dcn31_hpo_dp_link_enc_read_state +ffffffff821122f0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff821123f0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff82112530 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff82112620 T hpo_dp_link_encoder31_construct +ffffffff82112680 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff82113000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff82113070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff821131b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff82113460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff82113560 t dcn31_hpo_dp_stream_enc_disable +ffffffff821135d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff82113e80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num +ffffffff82113f40 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff82114160 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff821142f0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff82114590 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff82114690 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff82114740 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff82114810 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff821149c0 t dcn31_hpo_dp_stream_enc_read_state +ffffffff82114b50 t dcn31_set_hblank_min_symbol_width +ffffffff82115000 T hubbub31_init_dchub_sys_ctx +ffffffff821151e0 T hubbub31_init +ffffffff82115280 T hubbub31_construct +ffffffff82115320 t hubbub31_get_dcc_compression_cap +ffffffff82115500 t hubbub31_get_dchub_ref_freq +ffffffff821155e0 t hubbub31_program_watermarks +ffffffff82116f00 t hubbub31_verify_allow_pstate_change_high +ffffffff821170c0 t dcn31_program_det_size +ffffffff821172a0 t dcn31_program_compbuf_size +ffffffff82117520 t dcn31_init_crb +ffffffff82118000 T hubp31_set_unbounded_requesting +ffffffff82118090 T hubp31_soft_reset +ffffffff821180e0 T hubp31_construct +ffffffff82118150 t hubp31_program_extended_blank +ffffffff82119000 T dcn31_init_hw +ffffffff82119850 T dcn31_dsc_pg_control +ffffffff82119ba0 T dcn31_enable_power_gating_plane +ffffffff82119e00 T dcn31_update_info_frame +ffffffff82119f30 T dcn31_z10_save_init +ffffffff82119fc0 T dcn31_z10_restore +ffffffff8211a070 T dcn31_hubp_pg_control +ffffffff8211a390 T dcn31_init_sys_ctx +ffffffff8211a440 T dcn31_reset_hw_ctx_wrap +ffffffff8211a790 T dcn31_setup_hpo_hw_control +ffffffff8211b000 T dcn31_hw_sequencer_construct +ffffffff8211c000 T optc31_immediate_disable_crtc +ffffffff8211c100 T optc31_set_drr +ffffffff8211c310 T optc3_init_odm +ffffffff8211c480 T dcn31_timing_generator_init +ffffffff8211c4f0 t optc31_enable_crtc +ffffffff8211c5f0 t optc31_disable_crtc +ffffffff8211c6d0 t optc31_set_odm_combine +ffffffff8211d000 T dcn31_panel_cntl_construct +ffffffff8211d040 t dcn31_panel_cntl_destroy +ffffffff8211d090 t dcn31_panel_cntl_hw_init +ffffffff8211d190 t dcn31_is_panel_backlight_on +ffffffff8211d230 t dcn31_is_panel_powered_on +ffffffff8211d2e0 t dcn31_store_backlight_level +ffffffff8211d3b0 t dcn31_get_16_bit_backlight_from_pwm +ffffffff8211e000 T dcn31x_populate_dml_pipes_from_context +ffffffff8211e180 T dcn31_populate_dml_pipes_from_context +ffffffff8211e5c0 T dcn31_calculate_wm_and_dlg +ffffffff8211e630 T dcn31_populate_dml_writeback_from_context +ffffffff8211e690 T dcn31_set_mcif_arb_params +ffffffff8211e6f0 T dcn31_validate_bandwidth +ffffffff8211eae0 T dcn31_create_resource_pool +ffffffff8211fe80 t dcn31_resource_destruct +ffffffff821204f0 t dcn31_destroy_resource_pool +ffffffff82120550 t dcn31_panel_cntl_create +ffffffff821205c0 t dcn31_link_encoder_create +ffffffff82120670 t dcn31_link_enc_create_minimal +ffffffff82120710 t dcn31_get_panel_config_defaults +ffffffff82120750 t read_dce_straps +ffffffff82120780 t dcn31_create_audio +ffffffff821207b0 t dcn31_stream_encoder_create +ffffffff82120930 t dcn31_hpo_dp_stream_encoder_create +ffffffff82120af0 t dcn31_hpo_dp_link_encoder_create +ffffffff82120b80 t dcn31_hwseq_create +ffffffff82121000 T vpg31_powerdown +ffffffff82121090 T vpg31_poweron +ffffffff82121120 T vpg31_construct +ffffffff82122000 T dccg314_create +ffffffff821220b0 t dccg314_init +ffffffff82122210 t dccg314_set_dpstreamclk +ffffffff821225d0 t dccg314_set_dtbclk_dto +ffffffff821227c0 t dccg314_set_pixel_rate_div +ffffffff82122b30 t dccg314_set_valid_pixel_rate +ffffffff82122ba0 t dccg314_trigger_dio_fifo_resync +ffffffff82122c40 t dccg314_dpp_root_clock_control +ffffffff82123000 T dcn314_dio_stream_encoder_construct +ffffffff82123070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff82123670 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff82123880 t enc314_stream_encoder_dp_blank +ffffffff82123900 t enc314_stream_encoder_dp_unblank +ffffffff82123c80 t enc314_read_state +ffffffff82123de0 t enc314_dp_set_dsc_config +ffffffff82123e30 t enc314_dp_set_odm_combine +ffffffff82123e70 t enc314_set_dig_input_mode +ffffffff82123ec0 t enc314_enable_fifo +ffffffff82123f60 t enc314_disable_fifo +ffffffff82123fb0 t enc314_reset_fifo +ffffffff82125000 T dcn314_update_odm +ffffffff82125600 T dcn314_dsc_pg_control +ffffffff821259d0 T dcn314_enable_power_gating_plane +ffffffff82125c60 T dcn314_calculate_dccg_k1_k2_values +ffffffff82125e10 T dcn314_set_pixels_per_cycle +ffffffff82125f00 T dcn314_resync_fifo_dccg_dio +ffffffff821260a0 T dcn314_dpp_root_clock_control +ffffffff82126100 T dcn314_disable_link_output +ffffffff82127000 T dcn314_hw_sequencer_construct +ffffffff82128000 T dcn314_timing_generator_init +ffffffff82128070 t optc314_enable_crtc +ffffffff82128170 t optc314_disable_crtc +ffffffff82128250 t optc314_phantom_crtc_post_enable +ffffffff82128310 t optc314_set_odm_bypass +ffffffff82128480 t optc314_set_odm_combine +ffffffff82128770 t optc314_set_h_timing_div_manual_mode +ffffffff82129000 T dcn314_validate_bandwidth +ffffffff82129490 T dcn314_create_resource_pool +ffffffff8212a7b0 t dcn314_resource_destruct +ffffffff8212ae20 t dcn314_get_preferred_eng_id_dpia +ffffffff8212ae50 t dcn314_destroy_resource_pool +ffffffff8212aeb0 t dcn31_panel_cntl_create +ffffffff8212af20 t dcn31_link_encoder_create +ffffffff8212afd0 t dcn31_link_enc_create_minimal +ffffffff8212b070 t dcn314_populate_dml_pipes_from_context +ffffffff8212b100 t dcn314_update_bw_bounding_box +ffffffff8212b150 t dcn314_get_panel_config_defaults +ffffffff8212b190 t read_dce_straps +ffffffff8212b1c0 t dcn31_create_audio +ffffffff8212b1f0 t dcn314_stream_encoder_create +ffffffff8212b370 t dcn31_hpo_dp_stream_encoder_create +ffffffff8212b530 t dcn31_hpo_dp_link_encoder_create +ffffffff8212b5c0 t dcn314_hwseq_create +ffffffff8212c000 T dcn315_create_resource_pool +ffffffff8212d280 t dcn315_resource_destruct +ffffffff8212d8e0 t dcn315_destroy_resource_pool +ffffffff8212d940 t dcn31_panel_cntl_create +ffffffff8212d9b0 t dcn31_link_encoder_create +ffffffff8212da60 t dcn31_link_enc_create_minimal +ffffffff8212db00 t dcn315_populate_dml_pipes_from_context +ffffffff8212e200 t dcn315_get_panel_config_defaults +ffffffff8212e240 t read_dce_straps +ffffffff8212e270 t dcn31_create_audio +ffffffff8212e2a0 t dcn315_stream_encoder_create +ffffffff8212e420 t dcn31_hpo_dp_stream_encoder_create +ffffffff8212e5e0 t dcn31_hpo_dp_link_encoder_create +ffffffff8212e670 t dcn31_hwseq_create +ffffffff8212f000 T dcn316_create_resource_pool +ffffffff82130290 t dcn316_resource_destruct +ffffffff821308f0 t dcn316_destroy_resource_pool +ffffffff82130950 t dcn31_panel_cntl_create +ffffffff821309c0 t dcn31_link_encoder_create +ffffffff82130a70 t dcn31_link_enc_create_minimal +ffffffff82130b10 t dcn316_populate_dml_pipes_from_context +ffffffff82130e40 t dcn316_get_panel_config_defaults +ffffffff82130e80 t read_dce_straps +ffffffff82130eb0 t dcn31_create_audio +ffffffff82130ee0 t dcn316_stream_encoder_create +ffffffff82131060 t dcn31_hpo_dp_stream_encoder_create +ffffffff82131220 t dcn31_hpo_dp_link_encoder_create +ffffffff821312b0 t dcn31_hwseq_create +ffffffff82132000 T dccg32_create +ffffffff821320b0 t dccg32_get_dccg_ref_freq +ffffffff821320e0 t dccg32_otg_add_pixel +ffffffff82132120 t dccg32_otg_drop_pixel +ffffffff82132160 t dccg32_set_dpstreamclk +ffffffff821324a0 t dccg32_set_dtbclk_dto +ffffffff821326a0 t dccg32_set_pixel_rate_div +ffffffff82132a10 t dccg32_set_valid_pixel_rate +ffffffff82132a80 t dccg32_trigger_dio_fifo_resync +ffffffff82133000 T enc32_hw_init +ffffffff82133090 T dcn32_link_encoder_enable_dp_output +ffffffff821330e0 T dcn32_link_encoder_construct +ffffffff821332d0 t dcn32_link_encoder_is_in_alt_mode +ffffffff82133350 t dcn32_link_encoder_get_max_link_cap +ffffffff82134000 T enc32_stream_encoder_dp_unblank +ffffffff82134500 T enc32_enable_fifo +ffffffff821345a0 t enc32_reset_fifo +ffffffff821346a0 T dcn32_dio_stream_encoder_construct +ffffffff82134710 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff82134c90 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff82134e10 t enc32_read_state +ffffffff82134f70 t enc32_dp_set_dsc_config +ffffffff82134fc0 t enc32_dp_set_odm_combine +ffffffff82135000 t enc32_set_dig_input_mode +ffffffff82136000 T dpp32_construct +ffffffff82136060 t dscl32_calc_lb_num_partitions +ffffffff82137000 T hpo_dp_link_encoder32_construct +ffffffff82137060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff82138000 T hubbub32_set_request_limit +ffffffff82138130 T dcn32_program_det_size +ffffffff821382d0 T hubbub32_program_urgent_watermarks +ffffffff82138a40 T hubbub32_program_stutter_watermarks +ffffffff82138e90 T hubbub32_program_pstate_watermarks +ffffffff82139320 T hubbub32_program_usr_watermarks +ffffffff82139580 T hubbub32_force_usr_retraining_allow +ffffffff82139600 T hubbub32_force_wm_propagate_to_pipes +ffffffff821396a0 T hubbub32_init +ffffffff821397e0 T hubbub32_construct +ffffffff82139860 t hubbub32_wm_read_state +ffffffff82139c80 t hubbub32_program_watermarks +ffffffff82139d90 t hubbub32_init_watermarks +ffffffff8213a1d0 t dcn32_program_compbuf_size +ffffffff8213a460 t dcn32_init_crb +ffffffff8213b000 T hubp32_update_force_pstate_disallow +ffffffff8213b090 T hubp32_update_force_cursor_pstate_disallow +ffffffff8213b120 T hubp32_update_mall_sel +ffffffff8213b1b0 T hubp32_prepare_subvp_buffering +ffffffff8213b250 T hubp32_phantom_hubp_post_enable +ffffffff8213b360 T hubp32_cursor_set_attributes +ffffffff8213b620 T hubp32_init +ffffffff8213b650 T hubp32_construct +ffffffff8213c000 T dcn32_dsc_pg_control +ffffffff8213c320 T dcn32_enable_power_gating_plane +ffffffff8213c590 T dcn32_hubp_pg_control +ffffffff8213c800 T dcn32_apply_idle_power_optimizations +ffffffff8213caf0 T dcn32_commit_subvp_config +ffffffff8213cba0 T dcn32_subvp_pipe_control_lock +ffffffff8213cd70 T dcn32_subvp_pipe_control_lock_fast +ffffffff8213cdf0 T dcn32_set_mpc_shaper_3dlut +ffffffff8213cf10 T dcn32_set_mcm_luts +ffffffff8213d0a0 T dcn32_set_input_transfer_func +ffffffff8213d1e0 T dcn32_set_output_transfer_func +ffffffff8213d420 T dcn32_update_force_pstate +ffffffff8213d640 T dcn32_update_mall_sel +ffffffff8213d830 T dcn32_program_mall_pipe_config +ffffffff8213d920 T dcn32_init_hw +ffffffff8213e1e0 T dcn32_update_odm +ffffffff8213e7e0 T dcn32_calculate_dccg_k1_k2_values +ffffffff8213ea10 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff8213eab0 T dcn32_set_pixels_per_cycle +ffffffff8213ebf0 T dcn32_resync_fifo_dccg_dio +ffffffff8213ed90 T dcn32_unblank_stream +ffffffff8213efa0 T dcn32_disable_link_output +ffffffff8213f310 T dcn32_update_phantom_vp_position +ffffffff8213f420 T dcn32_apply_update_flags_for_phantom +ffffffff8213f4a0 T dcn32_dsc_pg_status +ffffffff8213f580 T dcn32_update_dsc_pg +ffffffff8213f680 T dcn32_enable_phantom_streams +ffffffff8213f7c0 T dcn32_init_blank +ffffffff8213fa00 T dcn32_blank_phantom +ffffffff8213fb80 T dcn32_is_pipe_topology_transition_seamless +ffffffff82140000 T dcn32_hw_sequencer_init_functions +ffffffff82141000 T dcn32_mmhubbub_construct +ffffffff82141050 t mmhubbub32_warmup_mcif +ffffffff82141260 t mmhubbub32_config_mcif_buf +ffffffff82141710 t mmhubbub32_config_mcif_arb +ffffffff82142000 T mpc32_mpc_init +ffffffff821421e0 T mpc32_power_on_blnd_lut +ffffffff82142350 T mpc32_configure_post1dlut +ffffffff82142450 T mpc32_program_post1dluta_settings +ffffffff82142660 T mpc32_program_post1dlutb_settings +ffffffff82142870 T mpc32_program_post1dlut_pwl +ffffffff82142ca0 T mpc32_program_post1dlut +ffffffff82142fb0 T mpc32_configure_shaper_lut +ffffffff821430d0 T mpc32_program_shaper_luta_settings +ffffffff82143f60 T mpc32_program_shaper_lutb_settings +ffffffff82144df0 T mpc32_program_shaper_lut +ffffffff82144f90 T mpc32_power_on_shaper_3dlut +ffffffff821451c0 T mpc32_program_shaper +ffffffff821454e0 T mpc32_select_3dlut_ram +ffffffff82145590 T mpc32_select_3dlut_ram_mask +ffffffff82145660 T mpc32_set3dlut_ram12 +ffffffff82145860 T mpc32_set3dlut_ram10 +ffffffff82145930 T mpc32_program_3dlut +ffffffff82146300 T dcn32_mpc_construct +ffffffff82147000 T optc32_set_h_timing_div_manual_mode +ffffffff82147040 T dcn32_timing_generator_init +ffffffff821470b0 t optc32_enable_crtc +ffffffff821471b0 t optc32_disable_crtc +ffffffff82147290 t optc32_phantom_crtc_post_enable +ffffffff82147350 t optc32_disable_phantom_otg +ffffffff82147390 t optc32_set_drr +ffffffff82147550 t optc32_set_odm_bypass +ffffffff821476c0 t optc32_set_odm_combine +ffffffff82148000 T dcn32_panel_cntl_create +ffffffff82148070 T dcn32_acquire_post_bldn_3dlut +ffffffff82148160 T dcn32_release_post_bldn_3dlut +ffffffff82148210 T dcn32_retain_phantom_pipes +ffffffff821482f0 T dcn32_remove_phantom_pipes +ffffffff82148460 T dcn32_add_phantom_pipes +ffffffff82148890 T dcn32_validate_bandwidth +ffffffff82148d70 T dcn32_populate_dml_pipes_from_context +ffffffff821491a0 T dcn32_calculate_wm_and_dlg +ffffffff82149210 T dcn32_create_resource_pool +ffffffff821492c0 t dcn32_resource_construct +ffffffff82154800 T dcn32_acquire_free_pipe_as_secondary_dpp_pipe +ffffffff82154b00 T dcn32_calc_num_avail_chans_for_mall +ffffffff82154b70 t dcn32_mpc_create +ffffffff821591d0 t dcn32_dwbc_create +ffffffff82159bd0 t dcn32_mmhubbub_create +ffffffff8215a080 t dcn32_resource_destruct +ffffffff8215a710 t dcn32_destroy_resource_pool +ffffffff8215a770 t dcn32_link_encoder_create +ffffffff8215b840 t dcn32_update_bw_bounding_box +ffffffff8215b890 t read_dce_straps +ffffffff8215b8c0 t dcn32_create_audio +ffffffff8215bc40 t dcn32_stream_encoder_create +ffffffff8215da80 t dcn32_hpo_dp_stream_encoder_create +ffffffff8215e860 t dcn32_hpo_dp_link_encoder_create +ffffffff8215ecb0 t dcn32_hwseq_create +ffffffff8215f1a0 t dcn32_vpg_create +ffffffff82160000 T dcn32_helper_mall_bytes_to_ways +ffffffff82160060 T dcn32_helper_calculate_mall_bytes_for_cursor +ffffffff82160100 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff82160180 T dcn32_merge_pipes_for_subvp +ffffffff82160340 T dcn32_all_pipes_have_stream_and_plane +ffffffff821603d0 T dcn32_subvp_in_use +ffffffff82160460 T dcn32_mpo_in_use +ffffffff821604d0 T dcn32_any_surfaces_rotated +ffffffff82160560 T dcn32_is_center_timing +ffffffff821605d0 T dcn32_is_psr_capable +ffffffff82160620 T dcn32_determine_det_override +ffffffff82160960 T dcn32_set_det_allocations +ffffffff82160af0 T dcn32_save_mall_state +ffffffff82160ba0 T dcn32_restore_mall_state +ffffffff82160c50 T dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82160e00 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82160eb0 T dcn32_check_native_scaling_for_res +ffffffff82160f10 T dcn32_subvp_drr_admissable +ffffffff821610d0 T dcn32_subvp_vblank_admissable +ffffffff82162000 T dcn321_link_encoder_construct +ffffffff82163000 T dcn321_create_resource_pool +ffffffff821630b0 t dcn321_resource_construct +ffffffff8216e550 t dcn321_mpc_create +ffffffff82172bb0 t dcn321_dwbc_create +ffffffff821735b0 t dcn321_mmhubbub_create +ffffffff82173a60 t dcn321_resource_destruct +ffffffff821740f0 t dcn321_destroy_resource_pool +ffffffff82174150 t dcn321_link_encoder_create +ffffffff82175220 t dcn321_update_bw_bounding_box +ffffffff82175270 t read_dce_straps +ffffffff821752a0 t dcn321_create_audio +ffffffff82175620 t dcn321_stream_encoder_create +ffffffff82177460 t dcn321_hpo_dp_stream_encoder_create +ffffffff82178240 t dcn321_hpo_dp_link_encoder_create +ffffffff82178690 t dcn321_hwseq_create +ffffffff82178b80 t dcn321_vpg_create +ffffffff82179000 T bw_int_to_fixed_nonconst +ffffffff82179090 T bw_frc_to_fixed +ffffffff82179260 T bw_floor2 +ffffffff82179310 T bw_ceil2 +ffffffff82179390 T bw_mul +ffffffff8217a000 T convert_to_custom_float_format +ffffffff8217b000 T bw_calcs_init +ffffffff8217be60 T bw_calcs +ffffffff8217d800 t calculate_bandwidth +ffffffff82185000 T scaler_settings_calculation +ffffffff82185350 T mode_support_and_system_configuration +ffffffff8218b180 T display_pipe_configuration +ffffffff8218bab0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff82191000 T dcn_bw_mod +ffffffff82191060 T dcn_bw_min2 +ffffffff821910a0 T dcn_bw_max +ffffffff821910d0 T dcn_bw_max2 +ffffffff82191110 T dcn_bw_floor2 +ffffffff821911b0 T dcn_bw_floor +ffffffff821911e0 T dcn_bw_ceil +ffffffff82191220 T dcn_bw_ceil2 +ffffffff821912d0 T dcn_bw_max3 +ffffffff82191350 T dcn_bw_max5 +ffffffff82191490 T dcn_bw_pow +ffffffff82191520 T dcn_bw_fabs +ffffffff82191560 T dcn_bw_log +ffffffff82192000 T swizzle_mode_to_macro_tile_size +ffffffff82192090 T dcn_validate_bandwidth +ffffffff82194300 T dcn_bw_sync_calcs_and_dml +ffffffff82194550 t dcn_bw_calc_rq_dlg_ttu +ffffffff82194d20 T dcn_find_dcfclk_suits_all +ffffffff82195180 T dcn_bw_update_from_pplib_fclks +ffffffff82195300 T dcn_bw_update_from_pplib_dcfclks +ffffffff821953d0 T dcn_get_soc_clks +ffffffff82195450 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff82196000 T dcn10_resource_construct_fp +ffffffff82197000 T dcn20_populate_dml_writeback_from_context +ffffffff82197180 T dcn20_fpu_set_wb_arb_params +ffffffff82197330 T dcn20_calculate_dlg_params +ffffffff82197b70 T dcn20_populate_dml_pipes_from_context +ffffffff82198a80 T dcn20_calculate_wm +ffffffff82199270 T dcn20_update_bounding_box +ffffffff821994f0 T dcn20_cap_soc_clocks +ffffffff82199850 T dcn20_patch_bounding_box +ffffffff82199a40 T dcn20_validate_bandwidth_fp +ffffffff82199be0 t dcn20_validate_bandwidth_internal +ffffffff82199fe0 T dcn20_fpu_set_wm_ranges +ffffffff8219a080 T dcn20_fpu_adjust_dppclk +ffffffff8219a120 T dcn21_populate_dml_pipes_from_context +ffffffff8219a230 T dcn21_validate_bandwidth_fp +ffffffff8219acc0 T dcn21_update_bw_bounding_box +ffffffff8219b0d0 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff8219b130 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff8219b430 t calculate_wm_set_for_vlevel +ffffffff8219c000 T dml20_recalculate +ffffffff8219c740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821a1be0 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff821a9040 t TruncToValidBPP +ffffffff821a9220 t CalculateVMAndRowBytes +ffffffff821a98e0 t CalculatePrefetchSourceLines +ffffffff821a9ab0 t CalculateWriteBackDelay +ffffffff821a9d80 t CalculatePrefetchSchedule +ffffffff821aac30 t CalculateFlipSchedule +ffffffff821ab000 t adjust_ReturnBW +ffffffff821ac000 T dml20v2_recalculate +ffffffff821ac740 t dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821b1d60 T dml20v2_ModeSupportAndSystemConfigurationFull +ffffffff821b9140 t TruncToValidBPP +ffffffff821b96d0 t CalculateVMAndRowBytes +ffffffff821b9d90 t CalculatePrefetchSourceLines +ffffffff821b9f60 t CalculateWriteBackDelay +ffffffff821ba230 t CalculateDelayAfterScaler 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CalculatePrefetchSchedulePerPlane +ffffffff821d2190 t CalculateUrgentBurstFactor +ffffffff821d25a0 t CalculateFlipSchedule +ffffffff821d2a80 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821d3a70 t CalculatePrefetchSchedule +ffffffff821d6000 T dml21_rq_dlg_get_rq_reg +ffffffff821d6490 t dml_rq_dlg_get_rq_params +ffffffff821d6660 T dml21_rq_dlg_get_dlg_reg +ffffffff821d8930 t get_surf_rq_param +ffffffff821d9250 t calculate_ttu_cursor +ffffffff821da000 T optc3_fpu_set_vrr_m_const +ffffffff821da4a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff821da7b0 T dcn30_fpu_set_mcif_arb_params +ffffffff821da920 T dcn30_fpu_update_soc_for_wm_a +ffffffff821da9f0 T dcn30_fpu_calculate_wm_and_dlg +ffffffff821db480 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821db670 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff821db6d0 T dcn30_fpu_update_max_clk +ffffffff821db780 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff821db880 T dcn30_fpu_update_bw_bounding_box +ffffffff821dba60 T dcn3_fpu_build_wm_range_table +ffffffff821dbd40 T patch_dcn30_soc_bounding_box +ffffffff821dc000 T dml30_recalculate +ffffffff821dc5f0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821e30b0 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff821e3320 T dml30_CalculateWriteBackDISPCLK +ffffffff821e3490 t dml_max3 +ffffffff821e34f0 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff821eb040 t CalculateSwathAndDETConfiguration +ffffffff821eb740 t TruncToValidBPP +ffffffff821eb9a0 t CalculateVMAndRowBytes +ffffffff821ec010 t CalculatePrefetchSourceLines +ffffffff821ec1e0 t CalculateUrgentBurstFactor +ffffffff821ec470 t CalculateDCFCLKDeepSleep +ffffffff821ec790 t UseMinimumDCFCLK +ffffffff821edab0 t CalculatePrefetchSchedule +ffffffff821eef50 t CalculateFlipSchedule +ffffffff821ef450 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821f0190 t CalculateSwathWidth +ffffffff821f1000 T dml30_rq_dlg_get_rq_reg +ffffffff821f14b0 t dml_rq_dlg_get_rq_params +ffffffff821f1740 T dml30_rq_dlg_get_dlg_reg +ffffffff821f3e10 t get_surf_rq_param +ffffffff821f47a0 t calculate_ttu_cursor +ffffffff821f5000 T dcn301_update_bw_bounding_box +ffffffff821f52e0 T dcn301_fpu_set_wm_ranges +ffffffff821f5380 T dcn301_fpu_init_soc_bounding_box +ffffffff821f5420 T dcn301_calculate_wm_and_dlg_fp +ffffffff821f5750 t calculate_wm_set_for_vlevel +ffffffff821f6000 T dcn302_fpu_update_bw_bounding_box +ffffffff821f6940 T dcn302_fpu_init_soc_bounding_box +ffffffff821f7000 T dcn303_fpu_update_bw_bounding_box +ffffffff821f79a0 T dcn303_fpu_init_soc_bounding_box +ffffffff821f8000 T dcn31_zero_pipe_dcc_fraction +ffffffff821f8060 T dcn31_update_soc_for_wm_a +ffffffff821f8110 T dcn315_update_soc_for_wm_a +ffffffff821f81e0 T dcn31_calculate_wm_and_dlg_fp +ffffffff821f8840 T dcn31_update_bw_bounding_box +ffffffff821f8be0 T dcn315_update_bw_bounding_box +ffffffff821f8ed0 T dcn316_update_bw_bounding_box +ffffffff821f9280 T dcn_get_max_non_odm_pix_rate_100hz +ffffffff821f92e0 T dcn_get_approx_det_segs_required_for_pstate +ffffffff821fa000 T dml31_recalculate +ffffffff821fa2d0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82201190 T dml31_CalculateWriteBackDISPCLK +ffffffff82201300 t dml_max3 +ffffffff82201360 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff82209440 t CalculateSwathAndDETConfiguration +ffffffff82209aa0 t TruncToValidBPP +ffffffff82209cf0 t CalculateDCFCLKDeepSleep +ffffffff8220a010 t CalculateVMAndRowBytes +ffffffff8220a650 t CalculatePrefetchSourceLines +ffffffff8220a820 t CalculateUrgentBurstFactor +ffffffff8220aab0 t UseMinimumDCFCLK +ffffffff8220ba40 t CalculatePrefetchSchedulePerPlane +ffffffff8220c1a0 t CalculateFlipSchedule +ffffffff8220c730 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8220d350 t CalculateSwathWidth +ffffffff8220d860 t CalculatePrefetchSchedule +ffffffff8220ec40 t CalculateVupdateAndDynamicMetadataParameters +ffffffff8220f000 T dml31_rq_dlg_get_rq_reg +ffffffff8220f4b0 t dml_rq_dlg_get_rq_params +ffffffff8220f740 T dml31_rq_dlg_get_dlg_reg +ffffffff82212100 t get_surf_rq_param +ffffffff82213000 T dcn314_update_bw_bounding_box_fpu +ffffffff822133f0 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff82214000 T dml314_recalculate +ffffffff82214270 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8221b050 T dml314_CalculateWriteBackDISPCLK +ffffffff8221b1c0 t dml_max3 +ffffffff8221b220 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff822235a0 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff82223810 t CalculateSwathAndDETConfiguration +ffffffff82223e50 t TruncToValidBPP +ffffffff822240a0 t CalculateDCFCLKDeepSleep +ffffffff822243c0 t CalculateVMAndRowBytes +ffffffff82224a00 t CalculatePrefetchSourceLines +ffffffff82224bd0 t CalculateUrgentBurstFactor +ffffffff82224e60 t CalculateMaxVStartup +ffffffff82224fa0 t UseMinimumDCFCLK +ffffffff82225f30 t CalculatePrefetchSchedulePerPlane +ffffffff82226690 t CalculateFlipSchedule +ffffffff82226c20 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82227840 t CalculateSwathWidth +ffffffff82227d50 t CalculatePrefetchSchedule +ffffffff82229130 t CalculateVupdateAndDynamicMetadataParameters +ffffffff8222a000 T dml314_rq_dlg_get_rq_reg +ffffffff8222a4b0 t dml_rq_dlg_get_rq_params +ffffffff8222a740 T dml314_rq_dlg_get_dlg_reg +ffffffff8222d100 t get_surf_rq_param +ffffffff8222e000 T dcn32_build_wm_range_table_fpu +ffffffff8222e390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff8222e540 T dcn32_internal_validate_bw +ffffffff822303b0 T dcn32_helper_populate_phantom_dlg_params +ffffffff82230550 T dcn32_predict_pipe_split +ffffffff82230780 T dcn32_set_phantom_stream_timing +ffffffff82230a90 T dcn32_determine_max_vratio_prefetch +ffffffff82230b70 t dcn32_split_stream_for_mpc_or_odm +ffffffff82230f20 T dcn32_calculate_wm_and_dlg_fpu +ffffffff82232650 T dcn32_patch_dpm_table +ffffffff82232860 T dcn32_update_bw_bounding_box_fpu +ffffffff82234ed0 T dcn32_zero_pipe_dcc_fraction +ffffffff82234f30 T dcn32_allow_subvp_with_active_margin +ffffffff82235000 T dcn32_allow_subvp_high_refresh_rate +ffffffff82235200 T dcn32_assign_fpo_vactive_candidate +ffffffff822352c0 T dcn32_find_vactive_pipe +ffffffff82235430 T dcn32_set_clock_limits +ffffffff82235480 T dcn32_override_min_req_memclk +ffffffff82235540 t subvp_drr_schedulable +ffffffff822357d0 t get_optimal_ntuple +ffffffff82236000 T dml32_recalculate +ffffffff8223a320 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff82242000 T dml32_dscceComputeDelay +ffffffff82242140 T dml32_dscComputeDelay +ffffffff82242180 T IsVertical +ffffffff822421b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff822424d0 t dml_max3 +ffffffff82242530 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff82242860 T dml32_CalculateSwathAndDETConfiguration +ffffffff82243090 T dml32_CalculateSwathWidth +ffffffff82243950 T dml32_UnboundedRequest +ffffffff822439c0 T dml32_CalculateDETBufferSize +ffffffff82244000 T dml32_CalculateODMMode +ffffffff82244780 T dml32_CalculateRequiredDispclk +ffffffff82244940 T dml32_RoundToDFSGranularity +ffffffff822449d0 T dml32_CalculateOutputLink +ffffffff82245440 T dml32_TruncToValidBPP +ffffffff82245770 T dml32_CalculateDPPCLK +ffffffff82245910 T dml32_RequiredDTBCLK +ffffffff82245b60 t dml_max4 +ffffffff82245be0 T dml32_DSCDelayRequirement +ffffffff822460a0 T dml32_CalculateSurfaceSizeInMall +ffffffff82246bf0 T dml32_CalculateVMRowAndSwath +ffffffff82247a00 T dml32_CalculateVMAndRowBytes +ffffffff82248650 T dml32_CalculatePrefetchSourceLines +ffffffff822488a0 T dml32_CalculateMALLUseForStaticScreen +ffffffff822489e0 T dml32_CalculateRowBandwidth +ffffffff82248b40 T dml32_CalculateUrgentLatency +ffffffff82248bf0 T dml32_CalculateUrgentBurstFactor +ffffffff82248ea0 T dml32_CalculateDCFCLKDeepSleep +ffffffff822491f0 T dml32_CalculateWriteBackDelay +ffffffff82249350 T dml32_UseMinimumDCFCLK +ffffffff8224a3c0 T dml32_CalculateExtraLatencyBytes +ffffffff8224a580 T dml32_CalculateTWait +ffffffff8224a670 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff8224a8d0 T dml32_get_return_bw_mbps +ffffffff8224aa90 T dml32_get_return_bw_mbps_vm_only +ffffffff8224ab70 T dml32_CalculateExtraLatency +ffffffff8224ad90 T dml32_CalculatePrefetchSchedule +ffffffff8224c3a0 T dml32_CalculateFlipSchedule +ffffffff8224c900 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff8224da10 T dml32_CalculateWriteBackDISPCLK +ffffffff8224dbe0 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff8224dc30 T dml32_CalculatePixelDeliveryTimes +ffffffff8224e0b0 T dml32_CalculateMetaAndPTETimes +ffffffff8224e810 T dml32_CalculateVMGroupAndRequestTimes +ffffffff8224ed50 T dml32_CalculateDCCConfiguration +ffffffff8224f360 T dml32_CalculateStutterEfficiency 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+ffffffff82259de0 T get_wm_urgent +ffffffff82259ef0 T get_wm_memory_trip +ffffffff8225a000 T get_wm_writeback_urgent +ffffffff8225a110 T get_wm_stutter_exit +ffffffff8225a220 T get_wm_stutter_enter_exit +ffffffff8225a330 T get_wm_z8_stutter_exit +ffffffff8225a440 T get_wm_z8_stutter_enter_exit +ffffffff8225a550 T get_stutter_efficiency_z8 +ffffffff8225a660 T get_stutter_num_bursts_z8 +ffffffff8225a770 T get_wm_dram_clock_change +ffffffff8225a880 T get_wm_writeback_dram_clock_change +ffffffff8225a990 T get_stutter_efficiency +ffffffff8225aaa0 T get_stutter_efficiency_no_vblank +ffffffff8225abb0 T get_stutter_period +ffffffff8225acc0 T get_urgent_latency +ffffffff8225add0 T get_urgent_extra_latency +ffffffff8225aee0 T get_nonurgent_latency +ffffffff8225aff0 T get_dram_clock_change_latency +ffffffff8225b100 T get_dispclk_calculated +ffffffff8225b210 T get_total_data_read_bw +ffffffff8225b320 T get_return_bw +ffffffff8225b430 T get_tcalc +ffffffff8225b540 T get_fraction_of_urgent_bandwidth +ffffffff8225b650 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff8225b760 T get_cstate_max_cap_mode +ffffffff8225b880 T get_comp_buffer_size_kbytes +ffffffff8225b990 T get_pixel_chunk_size_in_kbyte +ffffffff8225bab0 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff8225bbd0 T get_meta_chunk_size_in_kbyte +ffffffff8225bcf0 T get_min_pixel_chunk_size_in_byte +ffffffff8225be00 T get_min_meta_chunk_size_in_byte +ffffffff8225bf20 T get_fclk_watermark +ffffffff8225c030 T get_usr_retraining_watermark +ffffffff8225c140 T get_comp_buffer_reserved_space_kbytes +ffffffff8225c260 T get_comp_buffer_reserved_space_64bytes +ffffffff8225c380 T get_comp_buffer_reserved_space_zs +ffffffff8225c4a0 T get_unbounded_request_enabled +ffffffff8225c5c0 T get_dsc_delay +ffffffff8225c6f0 T get_dppclk_calculated +ffffffff8225c810 T get_dscclk_calculated +ffffffff8225c930 T get_min_ttu_vblank +ffffffff8225ca50 T get_min_ttu_vblank_in_us +ffffffff8225cb70 T get_vratio_prefetch_l +ffffffff8225cc90 T get_vratio_prefetch_c +ffffffff8225cdb0 T get_dst_x_after_scaler +ffffffff8225ced0 T get_dst_y_after_scaler +ffffffff8225cff0 T get_dst_y_per_vm_vblank +ffffffff8225d110 T get_dst_y_per_row_vblank +ffffffff8225d230 T get_dst_y_prefetch +ffffffff8225d350 T get_dst_y_per_vm_flip +ffffffff8225d470 T get_dst_y_per_row_flip +ffffffff8225d590 T get_refcyc_per_vm_group_vblank +ffffffff8225d6b0 T get_refcyc_per_vm_group_flip +ffffffff8225d7d0 T get_refcyc_per_vm_req_vblank +ffffffff8225d8f0 T get_refcyc_per_vm_req_flip +ffffffff8225da10 T get_refcyc_per_vm_group_vblank_in_us +ffffffff8225db30 T get_refcyc_per_vm_group_flip_in_us +ffffffff8225dc50 T get_refcyc_per_vm_req_vblank_in_us +ffffffff8225dd70 T get_refcyc_per_vm_req_flip_in_us +ffffffff8225de90 T get_refcyc_per_vm_dmdata_in_us +ffffffff8225dfb0 T get_dmdata_dl_delta_in_us +ffffffff8225e0d0 T get_refcyc_per_line_delivery_l_in_us +ffffffff8225e1f0 T get_refcyc_per_line_delivery_c_in_us +ffffffff8225e310 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff8225e430 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff8225e550 T get_refcyc_per_req_delivery_l_in_us +ffffffff8225e670 T get_refcyc_per_req_delivery_c_in_us +ffffffff8225e790 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff8225e8b0 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff8225e9d0 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff8225eaf0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff8225ec10 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff8225ed30 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff8225ee50 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff8225ef70 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff8225f090 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff8225f1b0 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff8225f2d0 T get_vstartup +ffffffff8225f400 T get_vupdate_offset +ffffffff8225f530 T get_vupdate_width +ffffffff8225f650 T get_vready_offset +ffffffff8225f770 T get_vready_at_or_after_vsync +ffffffff8225f8a0 T get_min_dst_y_next_start +ffffffff8225f9d0 T get_dst_y_per_pte_row_nom_l +ffffffff8225faf0 T get_dst_y_per_pte_row_nom_c +ffffffff8225fc10 T get_dst_y_per_meta_row_nom_l +ffffffff8225fd30 T get_dst_y_per_meta_row_nom_c +ffffffff8225fe50 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff8225ff70 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff82260090 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff822601b0 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff822602d0 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff822603f0 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff82260510 T get_vstartup_calculated +ffffffff82260640 T get_dpte_row_height_linear_c +ffffffff82260770 T get_swath_height_l +ffffffff822608a0 T get_swath_height_c +ffffffff822609d0 T get_det_stored_buffer_size_l_bytes +ffffffff82260b00 T get_det_stored_buffer_size_c_bytes +ffffffff82260c30 T get_dpte_group_size_in_bytes +ffffffff82260d60 T get_vm_group_size_in_bytes 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smu_v13_0_6_smu_send_hbm_bad_page_num -ffffffff823a2bf0 t smu_v13_0_6_get_smu_metrics_data -ffffffff823a2e80 t smu_v13_0_6_upload_dpm_level -ffffffff823a2f80 t smu_v13_0_6_i2c_xfer -ffffffff823a3280 t smu_v13_0_6_i2c_func -ffffffff823a32b0 t smu_v13_0_6_set_irq_state -ffffffff823a3540 t smu_v13_0_6_irq_process -ffffffff823a4000 T smu_v13_0_7_set_ppt_funcs -ffffffff823a4060 t smu_v13_0_7_get_allowed_feature_mask -ffffffff823a41d0 t smu_v13_0_7_set_default_dpm_table -ffffffff823a45f0 t smu_v13_0_7_populate_umd_state_clk -ffffffff823a4730 t smu_v13_0_7_print_clk_levels -ffffffff823a4840 t smu_v13_0_7_force_clk_levels -ffffffff823a49c0 t smu_v13_0_7_od_edit_dpm_table -ffffffff823a4e90 t smu_v13_0_7_restore_user_od_settings -ffffffff823a4f50 t smu_v13_0_7_get_power_profile_mode -ffffffff823a5090 t smu_v13_0_7_set_power_profile_mode -ffffffff823a52d0 t smu_v13_0_7_read_sensor -ffffffff823a54e0 t smu_v13_0_7_is_dpm_running -ffffffff823a5530 t smu_v13_0_7_get_fan_speed_pwm -ffffffff823a5610 t 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tpm_write_crb -ffffffff825ba570 T tpm_read_crb -ffffffff825ba870 T tpm_request_locality_tis -ffffffff825ba960 T tpm_request_locality_crb -ffffffff825baa60 T tpm_release_locality_crb -ffffffff825baab0 T tpm_release_locality_tis -ffffffff825bab20 T tpm_getburst -ffffffff825babd0 T tpm_status -ffffffff825babf0 T tpm_waitfor -ffffffff825bacd0 T tpm_waitfor_status -ffffffff825bb000 T acpihve_match -ffffffff825bb0b0 T acpihve_attach -ffffffff825bc000 T acpisbs_match -ffffffff825bc030 T acpisbs_attach -ffffffff825bc2b0 T acpisbs_activate -ffffffff825bc390 T acpisbs_read -ffffffff825bc450 T acpisbs_setup_sensors -ffffffff825bc550 T acpisbs_refresh_sensors -ffffffff825bc6a0 T acpisbs_notify -ffffffff825bc7e0 T acpi_smbus_read -ffffffff825bd000 T surface_match -ffffffff825bd060 T surface_attach -ffffffff825bd0c0 T surface_hotkey -ffffffff825be000 T ipmi_acpi_match -ffffffff825be030 T ipmi_acpi_attach -ffffffff825be260 T ipmi_acpi_parse_crs -ffffffff825bf000 T amdgpio_match -ffffffff825bf060 T amdgpio_attach -ffffffff825bf2a0 T amdgpio_activate -ffffffff825bf390 T amdgpio_intr -ffffffff825bf530 T amdgpio_read_pin -ffffffff825bf580 T amdgpio_write_pin -ffffffff825bf5f0 T amdgpio_intr_establish -ffffffff825bf6e0 T amdgpio_intr_enable -ffffffff825bf760 T amdgpio_intr_disable -ffffffff825bf7e0 T amdgpio_save -ffffffff825bf860 T amdgpio_restore -ffffffff825bf8f0 T amdgpio_save_pin -ffffffff825bf960 T amdgpio_restore_pin -ffffffff825bf9d0 T amdgpio_pin_intr -ffffffff825c0000 T acpihid_match -ffffffff825c0030 T acpihid_attach -ffffffff825c0210 T acpihid_init_dsm -ffffffff825c0370 T acpihid_eval -ffffffff825c0590 T acpihid_notify -ffffffff825c05f0 T acpihid_button_array_enable -ffffffff825c1000 t iosf_acpi_match -ffffffff825c1050 t iosf_acpi_attach -ffffffff825c1150 t iosf_acpi_mbi_mdr_rd -ffffffff825c11c0 t iosf_acpi_mbi_mdr_wr -ffffffff825c2000 T acpi_match -ffffffff825c2060 T acpi_attach -ffffffff825c20a0 T acpi_probe -ffffffff825c2240 T acpi_map -ffffffff825c2330 T acpi_unmap -ffffffff825c2380 T acpi_bus_space_map -ffffffff825c23a0 T acpi_bus_space_unmap -ffffffff825c23c0 T acpi_intr_establish -ffffffff825c2500 T acpi_intr_disestablish -ffffffff825c2510 T acpi_scan -ffffffff825c26b0 T acpi_acquire_glk -ffffffff825c2710 T acpi_release_glk -ffffffff825c2760 T acpi_attach_machdep -ffffffff825c28f0 T acpi_sleep_cpu -ffffffff825c2a90 T acpi_resume_cpu -ffffffff825c2b90 T sleep_mp -ffffffff825c2c80 T resume_mp -ffffffff825c2d70 T acpi_iommu_device_map -ffffffff825c3000 T hibernate_resume_machdep -ffffffff825c3050 T hibernate_drop_to_real_mode -ffffffff825c3060 T hibernate_activate_resume_pt_machdep -ffffffff825c30a0 T hibernate_switch_stack_machdep -ffffffff825c30e0 T hibernate_flush -ffffffff825c3110 T acpi_savecpu -ffffffff825c4000 T sleep_showstate -ffffffff825c40f0 T sleep_setstate -ffffffff825c4150 T gosleep -ffffffff825c4210 T sleep_abort -ffffffff825c4240 T sleep_resume -ffffffff825c42b0 T suspend_finish -ffffffff825c5000 T acpiopen -ffffffff825c50d0 T acpiclose -ffffffff825c5160 T acpiioctl -ffffffff825c52b0 T request_sleep -ffffffff825c5330 T acpi_filtdetach -ffffffff825c5380 T acpi_filtread -ffffffff825c53c0 T acpikqfilter -ffffffff825c6000 T acpipci_match -ffffffff825c6030 T acpipci_attach -ffffffff825c62f0 T acpipci_osc -ffffffff825c6430 T acpipci_parse_resources -ffffffff825c6560 T acpipci_attach_bus -ffffffff825c6730 T acpipci_print -ffffffff825c67a0 T acpipci_attach_busses -ffffffff825c7000 T efiopen -ffffffff825c7040 T eficlose -ffffffff825c7070 T efiioctl -ffffffff825c7110 T efiioc_get_table -ffffffff825c7280 T efiioc_var_get -ffffffff825c7500 T efiioc_var_next -ffffffff825c7720 T efiioc_var_set -ffffffff825c78a0 T efi_adapt_error -ffffffff825c8000 T efi_match -ffffffff825c8060 T efi_attach -ffffffff825c8330 T efi_map_runtime -ffffffff825c84b0 T efi_enter -ffffffff825c8550 T efi_leave -ffffffff825c85d0 T efi_fault -ffffffff825c9000 T vmm_probe -ffffffff825c9050 T vmm_attach -ffffffff825c9170 T vmm_activate -ffffffff825c92b0 T vmmopen -ffffffff825c9300 T vmmclose -ffffffff825c9330 T vm_find -ffffffff825c9450 T vmmioctl -ffffffff825c96d0 T vm_create -ffffffff825c99a0 T vm_get_info -ffffffff825c9bf0 T vm_terminate -ffffffff825c9d60 T vm_resetcpu -ffffffff825c9e80 T vm_share_mem -ffffffff825c9fd0 T pledge_ioctl_vmm -ffffffff825ca0c0 T vm_find_vcpu -ffffffff825ca120 T vm_create_check_mem_ranges -ffffffff825ca2e0 T vm_teardown -ffffffff825ca420 T vcpu_must_stop -ffffffff825cb000 T vmm_enabled -ffffffff825cb080 T vmm_attach_machdep -ffffffff825cb230 T vmm_quiesce_vmx -ffffffff825cb400 T vmm_activate_machdep -ffffffff825cb520 T vmm_stop -ffffffff825cb650 T vmm_start -ffffffff825cb730 T vmmioctl_machdep -ffffffff825cb800 T vm_intr_pending -ffffffff825cb8a0 T vm_mprotect_ept -ffffffff825cbb20 T pledge_ioctl_vmm_machdep -ffffffff825cbb70 T vm_rwvmparams -ffffffff825cbd00 T vmm_init_pvclock -ffffffff825cbdd0 T vm_rwregs -ffffffff825cbee0 T vcpu_readregs_vmx -ffffffff825cc310 T vcpu_writeregs_vmx -ffffffff825cc780 T vcpu_readregs_svm -ffffffff825ccc30 T vcpu_writeregs_svm -ffffffff825cd100 T vmm_get_guest_memtype -ffffffff825cd180 T vmx_mprotect_ept -ffffffff825cd3e0 T vmx_pmap_find_pte_ept -ffffffff825cd4b0 T start_vmm_on_cpu -ffffffff825cd5d0 T stop_vmm_on_cpu -ffffffff825cd670 T vmclear_on_cpu -ffffffff825cd6f0 T vm_impl_init_vmx -ffffffff825cd800 T vm_impl_init_svm -ffffffff825cd910 T vm_impl_init -ffffffff825cd9b0 T vm_impl_deinit -ffffffff825cd9e0 T vcpu_reload_vmcs_vmx -ffffffff825cdb20 T vcpu_reset_regs_svm -ffffffff825cdeb0 T svm_setmsrbrw -ffffffff825cdfc0 T svm_setmsrbr -ffffffff825ce090 T vmm_alloc_vpid -ffffffff825ce1a0 T svm_setmsrbw -ffffffff825ce280 T vmx_setmsrbr -ffffffff825ce330 T vmx_setmsrbw -ffffffff825ce3e0 T vmx_setmsrbrw -ffffffff825ce4f0 T svm_set_clean -ffffffff825ce540 T svm_set_dirty -ffffffff825ce590 T vcpu_reset_regs_vmx -ffffffff825cefd0 T vcpu_vmx_check_cap -ffffffff825cf0d0 T vcpu_vmx_compute_ctrl -ffffffff825cf2b0 T vcpu_init_vmx -ffffffff825cf650 T vcpu_deinit_vmx -ffffffff825cf7d0 T vcpu_reset_regs -ffffffff825cf810 T vcpu_init_svm -ffffffff825cf9a0 T vcpu_deinit_svm -ffffffff825cfae0 T vcpu_init -ffffffff825cfba0 T vmm_free_vpid -ffffffff825cfc10 T vcpu_deinit -ffffffff825cfc50 T vm_run -ffffffff825cfe10 T vcpu_run_vmx -ffffffff825d0600 T vcpu_run_svm -ffffffff825d0bf0 T vmm_fpurestore -ffffffff825d0cb0 T vmm_fpusave -ffffffff825d0d30 T vmm_translate_gva -ffffffff825d1040 T vmm_update_pvclock -ffffffff825d1140 T vmx_get_exit_info -ffffffff825d11a0 T vmx_handle_exit -ffffffff825d15d0 T vmx_instruction_error_decode -ffffffff825d17a0 T vmm_get_guest_cpu_cpl -ffffffff825d1890 T vmx_handle_intr -ffffffff825d1920 T svm_handle_hlt -ffffffff825d1970 T vmx_handle_hlt -ffffffff825d1a20 T svm_handle_exit -ffffffff825d1d40 T svm_handle_np_fault -ffffffff825d1ee0 T vmm_handle_cpuid -ffffffff825d2580 T svm_handle_msr -ffffffff825d2850 T svm_handle_xsetbv -ffffffff825d28f0 T svm_handle_inout -ffffffff825d29f0 T vmm_inject_ud -ffffffff825d2a20 T vmm_inject_db -ffffffff825d2a50 T vmx_handle_np_fault -ffffffff825d2bb0 T vmx_handle_inout -ffffffff825d2d30 T vmx_handle_cr -ffffffff825d2f30 T vmx_handle_rdmsr -ffffffff825d3000 T vmx_handle_wrmsr -ffffffff825d3270 T vmx_handle_xsetbv -ffffffff825d3340 T vmm_inject_gp -ffffffff825d3370 T vmx_get_exit_qualification -ffffffff825d33d0 T vmx_get_guest_faulttype -ffffffff825d3470 T svm_get_guest_faulttype -ffffffff825d34a0 T svm_fault_page -ffffffff825d3530 T vmx_fault_page -ffffffff825d3680 T vmm_get_guest_cpu_mode -ffffffff825d3780 T vmx_load_pdptes -ffffffff825d3a00 T vmx_handle_cr0_write -ffffffff825d3c10 T vmx_handle_cr4_write -ffffffff825d3cb0 T vmm_handle_xsetbv -ffffffff825d3d40 T vmx_handle_misc_enable_msr -ffffffff825d3da0 T vmm_pat_is_valid -ffffffff825d3e80 T vmm_gpa_is_valid -ffffffff825d3ef0 T vmx_exit_reason_decode -ffffffff825d3f30 T svm_exit_reason_decode -ffffffff825d4d40 T vcpu_state_decode -ffffffff825d5000 T vmm_dispatch_intr -ffffffff825d5020 T vmxon -ffffffff825d5050 T vmxoff -ffffffff825d5080 T vmclear -ffffffff825d50b0 T vmptrld -ffffffff825d50e0 T vmptrst -ffffffff825d5110 T vmwrite -ffffffff825d5140 T vmread -ffffffff825d5170 T invvpid -ffffffff825d518b t invvpid_fail -ffffffff825d5192 t invvpid_ret -ffffffff825d51b0 T invept -ffffffff825d51cb t invept_fail -ffffffff825d51d2 t invept_ret -ffffffff825d51f0 T vmx_enter_guest -ffffffff825d521b t skip_init -ffffffff825d52e8 t no_l1df_msr -ffffffff825d52eb t l1df_tlb_loop -ffffffff825d5304 t l1df_tlb_done -ffffffff825d530c t l1df_load_cache -ffffffff825d5323 t done_flush -ffffffff825d53b6 t do_resume -ffffffff825d543b t fail_launch_or_resume -ffffffff825d547d t fail_launch_unknown -ffffffff825d548a t fail_launch_invalid_vmcs -ffffffff825d5497 t fail_launch_valid_vmcs -ffffffff825d54b4 t vmx_exit_handler_asm -ffffffff825d5579 t restore_host -ffffffff825d5610 T svm_enter_guest -ffffffff825d57a0 t restore_host_svm -ffffffff825d6000 T sdmmc_match -ffffffff825d6050 T sdmmc_attach -ffffffff825d6390 T sdmmc_detach -ffffffff825d6440 T sdmmc_activate -ffffffff825d6510 T sdmmc_discover_task -ffffffff825d65d0 T sdmmc_create_thread -ffffffff825d6640 T sdmmc_holds_root_device -ffffffff825d66a0 T sdmmc_task_thread -ffffffff825d6890 T sdmmc_needs_discover -ffffffff825d6940 T sdmmc_del_task -ffffffff825d69f0 T sdmmc_card_detach -ffffffff825d6ad0 T sdmmc_add_task -ffffffff825d6b50 T sdmmc_card_attach -ffffffff825d6c60 T sdmmc_enable -ffffffff825d6db0 T sdmmc_scan -ffffffff825d6e40 T sdmmc_init -ffffffff825d6f40 T sdmmc_disable -ffffffff825d70a0 T sdmmc_function_free -ffffffff825d70c0 T sdmmc_delay -ffffffff825d7110 T sdmmc_select_card -ffffffff825d7330 T sdmmc_set_bus_power -ffffffff825d74e0 T sdmmc_function_alloc -ffffffff825d7570 T sdmmc_app_command -ffffffff825d7700 T sdmmc_mmc_command -ffffffff825d7780 T sdmmc_go_idle_state -ffffffff825d7890 T sdmmc_send_if_cond -ffffffff825d79e0 T sdmmc_set_relative_addr -ffffffff825d8000 T sdmmc_cisptr -ffffffff825d80a0 T sdmmc_read_cis -ffffffff825d83e0 T sdmmc_print_cis -ffffffff825d8550 T sdmmc_check_cis_quirks -ffffffff825d9000 T sdmmc_io_enable -ffffffff825d92a0 T sdmmc_io_reset -ffffffff825d93d0 T sdmmc_io_send_op_cond -ffffffff825d9540 T sdmmc_io_scan -ffffffff825d9690 T sdmmc_io_init -ffffffff825d97c0 T sdmmc_io_set_highspeed -ffffffff825d9a60 T sdmmc_io_set_bus_width -ffffffff825d9cf0 T sdmmc_io_function_ready -ffffffff825d9e70 T sdmmc_io_read_1 -ffffffff825d9fc0 T sdmmc_io_function_enable -ffffffff825da390 T sdmmc_io_write_1 -ffffffff825da510 T sdmmc_io_function_disable -ffffffff825da790 T sdmmc_io_attach -ffffffff825da880 T sdmmc_print -ffffffff825daad0 T sdmmc_submatch -ffffffff825dab50 T sdmmc_io_detach -ffffffff825dac00 T sdmmc_io_rw_direct -ffffffff825dada0 T sdmmc_io_rw_extended_subr -ffffffff825daf40 T sdmmc_io_rw_extended -ffffffff825db340 T sdmmc_io_read_2 -ffffffff825db4a0 T sdmmc_io_write_2 -ffffffff825db600 T sdmmc_io_read_4 -ffffffff825db760 T sdmmc_io_write_4 -ffffffff825db8c0 T sdmmc_io_read_multi_1 -ffffffff825db9b0 T sdmmc_io_write_multi_1 -ffffffff825dbaa0 T sdmmc_io_read_region_1 -ffffffff825dbb90 T sdmmc_io_write_region_1 -ffffffff825dbc80 T sdmmc_io_xchg -ffffffff825dbe10 T sdmmc_intr_enable -ffffffff825dc080 T sdmmc_intr_disable -ffffffff825dc2f0 T sdmmc_intr_establish -ffffffff825dc3f0 T sdmmc_intr_disestablish -ffffffff825dc4e0 T sdmmc_card_intr -ffffffff825dc530 T sdmmc_intr_task -ffffffff825dc5c0 T sdmmc_io_set_blocklen -ffffffff825dd000 T sdmmc_mem_enable -ffffffff825dd450 T sdmmc_mem_send_op_cond -ffffffff825dd600 T sdmmc_mem_signal_voltage -ffffffff825dd6c0 T sdmmc_mem_scan -ffffffff825dd9d0 T sdmmc_decode_csd -ffffffff825dde00 T sdmmc_decode_cid -ffffffff825de2a0 T sdmmc_mem_send_scr -ffffffff825de3e0 T sdmmc_mem_decode_scr -ffffffff825de440 T sdmmc_mem_send_cxd_data -ffffffff825de5b0 T sdmmc_mem_set_bus_width -ffffffff825de6c0 T sdmmc_mem_sd_switch -ffffffff825de970 T sdmmc_be512_to_bitfield512 -ffffffff825dea20 T sdmmc_mem_mmc_switch -ffffffff825deb10 T sdmmc_mem_init -ffffffff825dec60 T sdmmc_mem_set_blocklen -ffffffff825ded60 T sdmmc_mem_sd_init -ffffffff825df140 T sdmmc_mem_mmc_init -ffffffff825df800 T sdmmc_mem_select_transfer_mode -ffffffff825df880 T sdmmc_mem_execute_tuning -ffffffff825df910 T sdmmc_mem_read_block_subr -ffffffff825dfc70 T sdmmc_mem_single_read_block -ffffffff825dfd40 T sdmmc_mem_read_block -ffffffff825dfef0 T sdmmc_mem_write_block_subr -ffffffff825e0240 T sdmmc_mem_single_write_block -ffffffff825e0310 T sdmmc_mem_write_block -ffffffff825e04c0 T sdmmc_mem_hibernate_write -ffffffff825e1000 T sdmmc_scsi_cmd -ffffffff825e11f0 T sdmmc_minphys -ffffffff825e1270 T sdmmc_scsi_attach -ffffffff825e1460 T sdmmc_alloc_ccbs -ffffffff825e15a0 T sdmmc_free_ccbs -ffffffff825e1600 T sdmmc_scsi_detach -ffffffff825e1760 T sdmmc_stimeout -ffffffff825e17e0 T sdmmc_ccb_alloc -ffffffff825e1890 T sdmmc_ccb_free -ffffffff825e1970 T sdmmc_inquiry -ffffffff825e1be0 T sdmmc_start_xs -ffffffff825e1cd0 T sdmmc_complete_xs -ffffffff825e1da0 T sdmmc_done_xs -ffffffff825e1df0 T sdmmc_scsi_hibernate_io -ffffffff825e2000 T bwfm_sdio_preinit -ffffffff825e24a0 T bwfm_sdio_txcheck -ffffffff825e24e0 T bwfm_sdio_txdata -ffffffff825e2550 T bwfm_sdio_txctl -ffffffff825e26a0 T bwfm_sdio_buscore_read -ffffffff825e26b0 T bwfm_sdio_buscore_write -ffffffff825e26d0 T bwfm_sdio_buscore_prepare -ffffffff825e2810 T bwfm_sdio_buscore_activate -ffffffff825e2890 T bwfm_sdio_match -ffffffff825e2940 T bwfm_sdio_attach -ffffffff825e2c00 T bwfm_sdio_detach -ffffffff825e2c60 T bwfm_sdio_task -ffffffff825e2dc0 T bwfm_sdio_write_1 -ffffffff825e2df0 T bwfm_sdio_read_1 -ffffffff825e2e20 T bwfm_sdio_write_4 -ffffffff825e2ed0 T bwfm_sdio_read_4 -ffffffff825e2f80 T bwfm_sdio_load_microcode -ffffffff825e31e0 T bwfm_sdio_clkctl -ffffffff825e3310 T bwfm_sdio_dev_write -ffffffff825e3360 T bwfm_sdio_intr -ffffffff825e33a0 T bwfm_sdio_ram_read_write -ffffffff825e35d0 T bwfm_sdio_htclk -ffffffff825e3840 T bwfm_sdio_readshared -ffffffff825e3910 T bwfm_sdio_dev_read -ffffffff825e3950 T bwfm_sdio_rx_frames -ffffffff825e3d00 T bwfm_sdio_tx_frames -ffffffff825e3e00 T bwfm_sdio_backplane -ffffffff825e3eb0 T bwfm_sdio_buf_read -ffffffff825e3f90 T bwfm_sdio_buf_write -ffffffff825e4040 T bwfm_sdio_frame_read_write -ffffffff825e41c0 T bwfm_sdio_newbuf -ffffffff825e4240 T bwfm_sdio_tx_ok -ffffffff825e42a0 T bwfm_sdio_tx_ctrlframe -ffffffff825e43a0 T bwfm_sdio_tx_dataframe -ffffffff825e44f0 T bwfm_sdio_rx_glom -ffffffff825e5000 T onewire_match -ffffffff825e5050 T onewire_attach -ffffffff825e50f0 T onewire_detach -ffffffff825e5160 T onewire_activate -ffffffff825e5180 T onewire_scan -ffffffff825e53a0 T onewire_createthread -ffffffff825e5410 T onewire_print -ffffffff825e54e0 T onewirebus_print -ffffffff825e5530 T onewire_lock -ffffffff825e5550 T onewire_unlock -ffffffff825e5570 T onewire_reset -ffffffff825e5590 T onewire_bit -ffffffff825e55b0 T onewire_read_byte -ffffffff825e56f0 T onewire_write_byte -ffffffff825e57d0 T onewire_read_block -ffffffff825e5870 T onewire_write_block -ffffffff825e5910 T onewire_triplet -ffffffff825e59f0 T onewire_matchrom -ffffffff825e5b40 T onewire_search -ffffffff825e5ee0 T onewire_thread -ffffffff825e6000 T onewire_crc -ffffffff825e60b0 T onewire_crc16 -ffffffff825e6170 T onewire_famname -ffffffff825e61b0 T onewire_matchbyfam -ffffffff825e7000 T owid_match -ffffffff825e7030 T owid_attach -ffffffff825e7100 T owid_detach -ffffffff825e7140 T owid_activate -ffffffff825e8000 T owsbm_match -ffffffff825e8030 T owsbm_attach -ffffffff825e81d0 T owsbm_detach -ffffffff825e8240 T owsbm_activate -ffffffff825e8270 T owsbm_update -ffffffff825e9000 T owtemp_match -ffffffff825e9030 T owtemp_attach -ffffffff825e9130 T owtemp_detach -ffffffff825e91a0 T owtemp_activate -ffffffff825e91d0 T owtemp_update -ffffffff825ea000 T owctr_match -ffffffff825ea030 T owctr_attach -ffffffff825ea180 T owctr_detach -ffffffff825ea1f0 T owctr_activate -ffffffff825ea220 T owctr_update -ffffffff825ea250 T owctr_update_counter -ffffffff825eb000 A __text_page_start -ffffffff825eb000 T Xsyscall_meltdown -ffffffff825eb00c T Xsyscall -ffffffff825eb26e t Xsyscall_trampback -ffffffff825eb280 T intr_user_exit -ffffffff825eb2c2 t intr_user_exit_post_ast -ffffffff825eb3ee t Xiretq_trampback -ffffffff825eb3fa T doreti_iret -ffffffff825ec000 T alltraps -ffffffff825ec138 T recall_trap -ffffffff825ec150 T alltraps_kern -ffffffff825ec153 T alltraps_kern_meltdown -ffffffff825ed000 ? Xsyscall32 -ffffffff825ed000 A __kutext_start -ffffffff825ed000 A __text_page_end -ffffffff825ee000 ? Xtrap00 -ffffffff825ee010 ? Xtrap01 -ffffffff825ee020 ? Xtrap02 -ffffffff825ee028 c calltrap_specstk -ffffffff825ee0f0 ? calltrap_specstk_tramp -ffffffff825ee110 ? Xtrap03 -ffffffff825ee120 ? Xtrap04 -ffffffff825ee130 ? Xtrap05 -ffffffff825ee140 ? Xtrap06 -ffffffff825ee150 ? Xtrap07 -ffffffff825ee160 ? Xtrap08 -ffffffff825ee170 ? Xtrap09 -ffffffff825ee180 ? Xtrap0a -ffffffff825ee190 ? Xtrap0b -ffffffff825ee1a0 ? Xtrap0c -ffffffff825ee1b0 ? Xtrap0d -ffffffff825ee240 ? Xtrap0e -ffffffff825ee250 ? Xintrspurious -ffffffff825ee250 ? Xtrap0f -ffffffff825ee260 ? Xtrap10 -ffffffff825ee270 ? Xtrap11 -ffffffff825ee280 ? Xtrap12 -ffffffff825ee290 ? Xtrap13 -ffffffff825ee2a0 ? Xtrap14 -ffffffff825ee2b0 ? Xtrap15 -ffffffff825ee2c0 ? Xtrap16 -ffffffff825ee2c0 ? Xtrap17 -ffffffff825ee2c0 ? Xtrap18 -ffffffff825ee2c0 ? Xtrap19 -ffffffff825ee2c0 ? Xtrap1a -ffffffff825ee2c0 ? Xtrap1b -ffffffff825ee2c0 ? Xtrap1c -ffffffff825ee2c0 ? Xtrap1d -ffffffff825ee2c0 ? Xtrap1e -ffffffff825ee2c0 ? Xtrap1f -ffffffff825ee2d0 ? x2apic_eoi -ffffffff825ee2f0 ? Xintr_lapic_ipi -ffffffff825ee330 ? Xipi_invltlb -ffffffff825ee360 ? Xipi_invlpg -ffffffff825ee390 ? Xipi_invlrange -ffffffff825ee3d0 ? Xipi_invltlb_pcid -ffffffff825ee410 ? Xipi_invlpg_pcid -ffffffff825ee460 ? Xipi_invlrange_pcid -ffffffff825ee4d0 ? Xintr_lapic_ltimer -ffffffff825ee510 ? Xintr_xen_upcall -ffffffff825ee550 ? Xintr_hyperv_upcall -ffffffff825ee590 ? Xintr_legacy0 -ffffffff825ee5d0 ? Xintr_legacy1 -ffffffff825ee610 ? Xintr_legacy2 -ffffffff825ee650 ? Xintr_legacy3 -ffffffff825ee690 ? Xintr_legacy4 -ffffffff825ee6d0 ? Xintr_legacy5 -ffffffff825ee710 ? Xintr_legacy6 -ffffffff825ee750 ? Xintr_legacy7 -ffffffff825ee790 ? Xintr_legacy8 -ffffffff825ee7d0 ? Xintr_legacy9 -ffffffff825ee810 ? Xintr_legacy10 -ffffffff825ee850 ? Xintr_legacy11 -ffffffff825ee890 ? Xintr_legacy12 -ffffffff825ee8d0 ? Xintr_legacy13 -ffffffff825ee910 ? Xintr_legacy14 -ffffffff825ee950 ? Xintr_legacy15 -ffffffff825ee990 ? Xintr_ioapic_edge0 -ffffffff825ee9d0 ? Xintr_ioapic_edge1 -ffffffff825eea10 ? Xintr_ioapic_edge2 -ffffffff825eea50 ? Xintr_ioapic_edge3 -ffffffff825eea90 ? Xintr_ioapic_edge4 -ffffffff825eead0 ? Xintr_ioapic_edge5 -ffffffff825eeb10 ? Xintr_ioapic_edge6 -ffffffff825eeb50 ? Xintr_ioapic_edge7 -ffffffff825eeb90 ? Xintr_ioapic_edge8 -ffffffff825eebd0 ? Xintr_ioapic_edge9 -ffffffff825eec10 ? Xintr_ioapic_edge10 -ffffffff825eec50 ? Xintr_ioapic_edge11 -ffffffff825eec90 ? Xintr_ioapic_edge12 -ffffffff825eecd0 ? Xintr_ioapic_edge13 -ffffffff825eed10 ? Xintr_ioapic_edge14 -ffffffff825eed50 ? Xintr_ioapic_edge15 -ffffffff825eed90 ? Xintr_ioapic_edge16 -ffffffff825eedd0 ? Xintr_ioapic_edge17 -ffffffff825eee10 ? Xintr_ioapic_edge18 -ffffffff825eee50 ? Xintr_ioapic_edge19 -ffffffff825eee90 ? Xintr_ioapic_edge20 -ffffffff825eeed0 ? Xintr_ioapic_edge21 -ffffffff825eef10 ? Xintr_ioapic_edge22 -ffffffff825eef50 ? Xintr_ioapic_edge23 -ffffffff825eef90 ? Xintr_ioapic_edge24 -ffffffff825eefd0 ? Xintr_ioapic_edge25 -ffffffff825ef010 ? Xintr_ioapic_edge26 -ffffffff825ef050 ? Xintr_ioapic_edge27 -ffffffff825ef090 ? Xintr_ioapic_edge28 -ffffffff825ef0d0 ? Xintr_ioapic_edge29 -ffffffff825ef110 ? Xintr_ioapic_edge30 -ffffffff825ef150 ? Xintr_ioapic_edge31 -ffffffff825ef190 ? Xintr_ioapic_edge32 -ffffffff825ef1d0 ? Xintr_ioapic_edge33 -ffffffff825ef210 ? Xintr_ioapic_edge34 -ffffffff825ef250 ? Xintr_ioapic_edge35 -ffffffff825ef290 ? Xintr_ioapic_edge36 -ffffffff825ef2d0 ? Xintr_ioapic_edge37 -ffffffff825ef310 ? Xintr_ioapic_edge38 -ffffffff825ef350 ? Xintr_ioapic_edge39 -ffffffff825ef390 ? Xintr_ioapic_edge40 -ffffffff825ef3d0 ? Xintr_ioapic_edge41 -ffffffff825ef410 ? Xintr_ioapic_edge42 -ffffffff825ef450 ? Xintr_ioapic_edge43 -ffffffff825ef490 ? Xintr_ioapic_edge44 -ffffffff825ef4d0 ? Xintr_ioapic_edge45 -ffffffff825ef510 ? Xintr_ioapic_edge46 -ffffffff825ef550 ? Xintr_ioapic_edge47 -ffffffff825ef590 ? Xintr_ioapic_edge48 -ffffffff825ef5d0 ? Xintr_ioapic_edge49 -ffffffff825ef610 ? Xintr_ioapic_edge50 -ffffffff825ef650 ? Xintr_ioapic_edge51 -ffffffff825ef690 ? Xintr_ioapic_edge52 -ffffffff825ef6d0 ? Xintr_ioapic_edge53 -ffffffff825ef710 ? Xintr_ioapic_edge54 -ffffffff825ef750 ? Xintr_ioapic_edge55 -ffffffff825ef790 ? Xintr_ioapic_edge56 -ffffffff825ef7d0 ? Xintr_ioapic_edge57 -ffffffff825ef810 ? Xintr_ioapic_edge58 -ffffffff825ef850 ? Xintr_ioapic_edge59 -ffffffff825ef890 ? Xintr_ioapic_edge60 -ffffffff825ef8d0 ? Xintr_ioapic_edge61 -ffffffff825ef910 ? Xintr_ioapic_edge62 -ffffffff825ef950 ? Xintr_ioapic_edge63 -ffffffff825ef990 ? Xintr_ioapic_level0 -ffffffff825ef9d0 ? Xintr_ioapic_level1 -ffffffff825efa10 ? Xintr_ioapic_level2 -ffffffff825efa50 ? Xintr_ioapic_level3 -ffffffff825efa90 ? Xintr_ioapic_level4 -ffffffff825efad0 ? Xintr_ioapic_level5 -ffffffff825efb10 ? Xintr_ioapic_level6 -ffffffff825efb50 ? Xintr_ioapic_level7 -ffffffff825efb90 ? Xintr_ioapic_level8 -ffffffff825efbd0 ? Xintr_ioapic_level9 -ffffffff825efc10 ? Xintr_ioapic_level10 -ffffffff825efc50 ? Xintr_ioapic_level11 -ffffffff825efc90 ? Xintr_ioapic_level12 -ffffffff825efcd0 ? Xintr_ioapic_level13 -ffffffff825efd10 ? Xintr_ioapic_level14 -ffffffff825efd50 ? Xintr_ioapic_level15 -ffffffff825efd90 ? Xintr_ioapic_level16 -ffffffff825efdd0 ? Xintr_ioapic_level17 -ffffffff825efe10 ? Xintr_ioapic_level18 -ffffffff825efe50 ? Xintr_ioapic_level19 -ffffffff825efe90 ? Xintr_ioapic_level20 -ffffffff825efed0 ? Xintr_ioapic_level21 -ffffffff825eff10 ? Xintr_ioapic_level22 -ffffffff825eff50 ? Xintr_ioapic_level23 -ffffffff825eff90 ? Xintr_ioapic_level24 -ffffffff825effd0 ? Xintr_ioapic_level25 -ffffffff825f0010 ? Xintr_ioapic_level26 -ffffffff825f0050 ? Xintr_ioapic_level27 -ffffffff825f0090 ? Xintr_ioapic_level28 -ffffffff825f00d0 ? Xintr_ioapic_level29 -ffffffff825f0110 ? Xintr_ioapic_level30 -ffffffff825f0150 ? Xintr_ioapic_level31 -ffffffff825f0190 ? Xintr_ioapic_level32 -ffffffff825f01d0 ? Xintr_ioapic_level33 -ffffffff825f0210 ? Xintr_ioapic_level34 -ffffffff825f0250 ? Xintr_ioapic_level35 -ffffffff825f0290 ? Xintr_ioapic_level36 -ffffffff825f02d0 ? Xintr_ioapic_level37 -ffffffff825f0310 ? Xintr_ioapic_level38 -ffffffff825f0350 ? Xintr_ioapic_level39 -ffffffff825f0390 ? Xintr_ioapic_level40 -ffffffff825f03d0 ? Xintr_ioapic_level41 -ffffffff825f0410 ? Xintr_ioapic_level42 -ffffffff825f0450 ? Xintr_ioapic_level43 -ffffffff825f0490 ? Xintr_ioapic_level44 -ffffffff825f04d0 ? Xintr_ioapic_level45 -ffffffff825f0510 ? Xintr_ioapic_level46 -ffffffff825f0550 ? Xintr_ioapic_level47 -ffffffff825f0590 ? Xintr_ioapic_level48 -ffffffff825f05d0 ? Xintr_ioapic_level49 -ffffffff825f0610 ? Xintr_ioapic_level50 -ffffffff825f0650 ? Xintr_ioapic_level51 -ffffffff825f0690 ? Xintr_ioapic_level52 -ffffffff825f06d0 ? Xintr_ioapic_level53 -ffffffff825f0710 ? Xintr_ioapic_level54 -ffffffff825f0750 ? Xintr_ioapic_level55 -ffffffff825f0790 ? Xintr_ioapic_level56 -ffffffff825f07d0 ? Xintr_ioapic_level57 -ffffffff825f0810 ? Xintr_ioapic_level58 -ffffffff825f0850 ? Xintr_ioapic_level59 -ffffffff825f0890 ? Xintr_ioapic_level60 -ffffffff825f08d0 ? Xintr_ioapic_level61 -ffffffff825f0910 ? Xintr_ioapic_level62 -ffffffff825f0950 ? Xintr_ioapic_level63 -ffffffff825f1000 ? codepatch_fill_nop -ffffffff825f1000 A __cptext_start -ffffffff825f1000 A __kutext_end -ffffffff825f10b0 ? codepatch_maprw -ffffffff825f1190 ? codepatch_unmaprw -ffffffff825f1200 ? codepatch_nop -ffffffff825f1360 ? codepatch_replace -ffffffff825f1510 ? codepatch_call -ffffffff825f1530 ? codepatch_control_flow -ffffffff825f1740 ? codepatch_jmp -ffffffff825f2000 A __cptext_end -ffffffff825f2000 A __rodata_start -ffffffff825f2000 C _etext -ffffffff825f2000 C etext -ffffffff825f3000 r seeprom_read -ffffffff825f3004 r icl_mg_pll_find_divisors.div1_vals -ffffffff825f3034 r athn_ac2qid -ffffffff825f3034 r athn_ac2qid -ffffffff825f3034 r athn_ac2qid -ffffffff825f3040 r rtwn_get_rssi.cckoff -ffffffff825f3068 r rsu_ac2qid -ffffffff825f3078 r pckbc_portcmd -ffffffff825f307c r tht_fifo_write_pad.pad -ffffffff825f3084 r rsu_get_rssi.cckoff -ffffffff825f30a4 r adlp_n_revids -ffffffff825f30e8 r apple_iso_trans -ffffffff825f30f0 r wihap_check_tx.txratetable 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vga_50lscreen_mono -ffffffff827001c8 R vga_50lscreen_bf -ffffffff827001f8 R vga_screenlist -ffffffff82700208 R vga_screenlist_mono -ffffffff82700218 R vga_accessops -ffffffff82700278 r i945_wm_info -ffffffff827002b8 r bgansitopc -ffffffff827002c0 r pctoansi -ffffffff82700300 r sdma_offsets -ffffffff82700300 r sdma_offsets -ffffffff82700338 r iha_rate_tbl -ffffffff82700370 r i830_a_wm_info -ffffffff827003a8 r gen9_edram_size_mb.ways -ffffffff82700408 r aggr_periodic_times -ffffffff82700500 r michael_final.pad -ffffffff82700528 r rt_copysa.maskarray -ffffffff82700530 r i915_wm_info -ffffffff82700538 r amdgpu_ih_clientid_jpeg -ffffffff82700538 r amdgpu_ih_clientid_uvds -ffffffff82700538 r amdgpu_ih_clientid_vcns -ffffffff82700538 r amdgpu_ih_clientid_vcns -ffffffff82700538 r amdgpu_ih_clientid_vcns -ffffffff82700568 r jsl_ehl_revids -ffffffff82700578 r vga_setfontset.cmaptabb -ffffffff827005e8 r i830_bc_wm_info -ffffffff82700650 r hsw_activate_psr2.map -ffffffff82700658 r tgl_revids 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ciss_switch -ffffffff8270e030 R ciss_level -ffffffff8270e050 R ciss_stat -ffffffff8270f000 R ami_switch -ffffffff8270f028 R ami_raw_switch -ffffffff82710000 R mfi_switch -ffffffff82710028 R mfi_pd_switch -ffffffff82710050 r mfi_iop_xscale -ffffffff82710080 r mfi_iop_ppc -ffffffff827100b0 r mfi_iop_gen2 -ffffffff827100e0 r mfi_iop_skinny -ffffffff82710110 r mfi_bbu_indicators -ffffffff82711000 R qlw_switch -ffffffff82712000 R isp_2100_risc_code -ffffffff82724bf0 R isp_2200_risc_code -ffffffff82737990 R isp_2300_risc_code -ffffffff82751408 R qla_switch -ffffffff82751430 r qla_regs_2100 -ffffffff82751460 r qla_regs_2200 -ffffffff82751490 r qla_regs_23XX -ffffffff82752000 R ahci_atascsi_methods -ffffffff82753000 R nvme_switch -ffffffff82753028 r nvme_ops -ffffffff82754000 R mpi_switch -ffffffff82754060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs -ffffffff82754090 r chv_oa_mux_regs -ffffffff827540b0 r fiji_clock_stretcher_lookup_table -ffffffff827540b0 r tonga_clock_stretcher_lookup_table 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hpt366_pio -ffffffff82754800 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs -ffffffff82754820 r ether_crc32_be_update.rev -ffffffff82754820 r rtw_grf5101_mac_crypt.caesar -ffffffff82754870 r snb_b_fdi_train_param -ffffffff82754940 r intel_hpll_vco.elk_vco -ffffffff82754960 r icl_revids -ffffffff827549c0 r pin_offsets -ffffffff827549e0 r amdgpu_ih_srcid_jpeg -ffffffff82754a20 r firmware_list -ffffffff82754a80 r atom_arg_shift -ffffffff82754a80 r atom_arg_shift -ffffffff82754ac0 r pf_syncookie_wstab -ffffffff82754ae0 r ieee80211_media_init.mopts -ffffffff82754b40 r add_entropy_words.twist_table -ffffffff82754be0 r urtw_8225v2_txpwr_cck -ffffffff82754c00 r bwfm_pci_prio2fifo -ffffffff82754c00 r ieee80211_up_to_ac.up_to_ac -ffffffff82754cc0 r paritytab -ffffffff82754cc0 r x86emu_parity_tab -ffffffff82754ce0 r legacy_connector_convert -ffffffff82754d20 r gen7_oa_mux_regs -ffffffff82754d40 r hsw_oa_mux_regs -ffffffff82754d60 r notetab -ffffffff82754d80 r urtw_8225v2_txpwr_cck_ch14 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drm_calculate_luminance_range.pre_computed_values -ffffffff82756000 R sili_atascsi_methods -ffffffff82757000 R ncr53c9x_switch -ffffffff82758000 r scf_period -ffffffff82759000 R siop_script -ffffffff827595a0 R lun_switch -ffffffff827595d0 R tag_switch -ffffffff82759660 R load_dsa -ffffffff827596c4 R siop_led_on -ffffffff827596cc R siop_led_off -ffffffff827596d8 R siop_switch -ffffffff8275a000 R ep_vortex_media -ffffffff8275a100 R ep_default_to_media -ffffffff8275b000 R wi_card_ident -ffffffff8275d000 R ucode_table -ffffffff8275e000 r re_revisions -ffffffff8275e290 r re_kstats_tpl -ffffffff82760000 R smc91cxx_media -ffffffff82760010 R smc91cxx_mii_bitbang_ops -ffffffff82761000 R dl10019_mii_bitbang_ops -ffffffff82761028 R dl10022_mii_bitbang_ops -ffffffff82762000 R ax88190_mii_bitbang_ops -ffffffff82764000 R ac97_audio_default -ffffffff82764020 R ac97_on_off -ffffffff82764324 R ac97_mic_select -ffffffff82764628 R ac97_mono_select -ffffffff8276492c R ac97_source -ffffffff82764c30 R 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amdgpu_dpm_handle_passthrough_sbr +ffffffff822f1650 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff822f16d0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff822f1750 T amdgpu_dpm_get_dpm_freq_range +ffffffff822f17f0 T amdgpu_dpm_set_soft_freq_range +ffffffff822f1890 T amdgpu_dpm_write_watermarks_table +ffffffff822f1910 T amdgpu_dpm_wait_for_event +ffffffff822f19a0 T amdgpu_dpm_set_residency_gfxoff +ffffffff822f1a20 T amdgpu_dpm_get_residency_gfxoff +ffffffff822f1aa0 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff822f1b20 T amdgpu_dpm_get_status_gfxoff +ffffffff822f1ba0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff822f1bf0 T amdgpu_dpm_gfx_state_change +ffffffff822f1c60 T amdgpu_dpm_get_ecc_info +ffffffff822f1ce0 T amdgpu_dpm_get_vce_clock_state +ffffffff822f1d70 T amdgpu_dpm_get_current_power_state +ffffffff822f1de0 T amdgpu_dpm_set_power_state +ffffffff822f1f40 T amdgpu_dpm_dispatch_task +ffffffff822f1fe0 T amdgpu_dpm_get_performance_level +ffffffff822f2070 T amdgpu_dpm_force_performance_level +ffffffff822f2250 T amdgpu_dpm_get_pp_num_states +ffffffff822f22e0 T amdgpu_dpm_get_pp_table +ffffffff822f2370 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff822f2410 T amdgpu_dpm_odn_edit_dpm_table +ffffffff822f24b0 T amdgpu_dpm_print_clock_levels +ffffffff822f2540 T amdgpu_dpm_emit_clock_levels +ffffffff822f25e0 T amdgpu_dpm_set_ppfeature_status +ffffffff822f2670 T amdgpu_dpm_get_ppfeature_status +ffffffff822f2700 T amdgpu_dpm_force_clock_level +ffffffff822f2790 T amdgpu_dpm_get_sclk_od +ffffffff822f2810 T amdgpu_dpm_set_sclk_od +ffffffff822f2990 T amdgpu_dpm_get_mclk_od +ffffffff822f2a10 T amdgpu_dpm_set_mclk_od +ffffffff822f2b90 T amdgpu_dpm_get_power_profile_mode +ffffffff822f2c20 T amdgpu_dpm_set_power_profile_mode +ffffffff822f2cc0 T amdgpu_dpm_get_gpu_metrics +ffffffff822f2d50 T amdgpu_dpm_get_fan_control_mode +ffffffff822f2de0 T amdgpu_dpm_set_fan_speed_pwm +ffffffff822f2e70 T amdgpu_dpm_get_fan_speed_pwm +ffffffff822f2f00 T amdgpu_dpm_get_fan_speed_rpm +ffffffff822f2f90 T amdgpu_dpm_set_fan_speed_rpm +ffffffff822f3020 T amdgpu_dpm_set_fan_control_mode +ffffffff822f30b0 T amdgpu_dpm_get_power_limit +ffffffff822f3160 T amdgpu_dpm_set_power_limit +ffffffff822f31f0 T amdgpu_dpm_is_cclk_dpm_supported +ffffffff822f3260 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff822f32f0 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff822f3390 T amdgpu_dpm_is_overdrive_supported +ffffffff822f3400 T amdgpu_dpm_set_pp_table +ffffffff822f34a0 T amdgpu_dpm_get_num_cpu_cores +ffffffff822f34f0 T amdgpu_dpm_stb_debug_fs_init +ffffffff822f3540 T amdgpu_dpm_display_configuration_change +ffffffff822f35d0 T amdgpu_dpm_get_clock_by_type +ffffffff822f3670 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff822f3700 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff822f37a0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff822f3840 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff822f38d0 T amdgpu_dpm_display_clock_voltage_request +ffffffff822f3960 T amdgpu_dpm_get_current_clocks +ffffffff822f39f0 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff822f3a70 T amdgpu_dpm_set_active_display_count +ffffffff822f3b00 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff822f3b90 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff822f3c30 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff822f3cd0 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff822f3d60 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff822f3df0 T amdgpu_dpm_get_uclk_dpm_states +ffffffff822f3e90 T amdgpu_dpm_get_dpm_clock_table +ffffffff822f4000 T amdgpu_dpm_get_active_displays +ffffffff822f40a0 T amdgpu_dpm_get_vblank_time +ffffffff822f4150 T amdgpu_dpm_get_vrefresh +ffffffff822f5000 T amdgpu_pm_sysfs_init +ffffffff822f5030 T amdgpu_pm_sysfs_fini +ffffffff822f5060 T amdgpu_debugfs_pm_init +ffffffff822f6000 T amdgpu_dpm_print_class_info +ffffffff822f62b0 T amdgpu_dpm_print_cap_info +ffffffff822f6340 T amdgpu_dpm_print_ps_status +ffffffff822f63d0 T amdgpu_pm_print_power_states +ffffffff822f6460 T amdgpu_get_platform_caps +ffffffff822f6500 T amdgpu_parse_extended_power_table +ffffffff822f7290 t amdgpu_parse_clk_voltage_dep_table +ffffffff822f7340 T amdgpu_free_extended_power_table +ffffffff822f7450 T amdgpu_add_thermal_controller +ffffffff822f78a0 T amdgpu_get_vce_clock_state +ffffffff822f78e0 T amdgpu_legacy_dpm_compute_clocks +ffffffff822f7d70 T amdgpu_dpm_thermal_work_handler +ffffffff822f8000 t pp_early_init +ffffffff822f8100 t pp_late_init +ffffffff822f8220 t pp_sw_init +ffffffff822f82b0 t pp_sw_fini +ffffffff822f8300 t pp_hw_init +ffffffff822f8360 t pp_hw_fini +ffffffff822f83d0 t pp_late_fini +ffffffff822f8430 t pp_suspend +ffffffff822f8480 t pp_resume +ffffffff822f84a0 t pp_is_idle +ffffffff822f84d0 t pp_wait_for_idle +ffffffff822f8500 t pp_sw_reset +ffffffff822f8530 t pp_set_clockgating_state +ffffffff822f8560 t pp_set_powergating_state +ffffffff822f8590 t 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baco_program_registers +ffffffff822fc0d0 t baco_cmd_handler +ffffffff822fc250 T soc15_baco_program_registers +ffffffff822fd000 T fiji_baco_set_state +ffffffff822fe000 T phm_setup_asic +ffffffff822fe050 T phm_power_down_asic +ffffffff822fe0a0 T phm_set_power_state +ffffffff822fe110 T phm_enable_dynamic_state_management +ffffffff822fe1c0 T phm_disable_dynamic_state_management +ffffffff822fe260 T phm_force_dpm_levels +ffffffff822fe2b0 T phm_apply_state_adjust_rules +ffffffff822fe300 T phm_apply_clock_adjust_rules +ffffffff822fe350 T phm_powerdown_uvd +ffffffff822fe3a0 T phm_disable_clock_power_gatings +ffffffff822fe3f0 T phm_pre_display_configuration_changed +ffffffff822fe450 T phm_display_configuration_changed +ffffffff822fe4b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff822fe510 T phm_stop_thermal_controller +ffffffff822fe570 T phm_register_irq_handlers +ffffffff822fe5c0 T phm_start_thermal_controller +ffffffff822fe710 T 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atomctrl_get_engine_pll_dividers_ai +ffffffff823038d0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff82303990 T atomctrl_get_reference_clock +ffffffff823039f0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff82303ab0 T atomctrl_get_voltage_table_v3 +ffffffff82303c10 T atomctrl_get_pp_assign_pin +ffffffff82303cf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff823040c0 t GetScaledFraction +ffffffff82304150 t fDecodeLeakageID +ffffffff823041b0 t fSqrt +ffffffff82304230 T atomctrl_get_voltage_evv_on_sclk +ffffffff823042b0 T atomctrl_get_voltage_evv +ffffffff82304360 T atomctrl_get_mpll_reference_clock +ffffffff823043d0 T atomctrl_is_asic_internal_ss_supported +ffffffff82304420 T atomctrl_get_memory_clock_spread_spectrum +ffffffff82304520 T atomctrl_get_engine_clock_spread_spectrum +ffffffff82304620 T atomctrl_read_efuse +ffffffff823046d0 T atomctrl_set_ac_timing_ai +ffffffff82304730 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff823047b0 T atomctrl_get_smc_sclk_range_table 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pp_atomfwctrl_get_smc_dpm_information +ffffffff82306000 T encode_pcie_lane_width +ffffffff82306030 T decode_pcie_lane_width +ffffffff82307000 t pp_tables_v1_0_initialize +ffffffff82308450 t pp_tables_v1_0_uninitialize +ffffffff82308600 T get_number_of_powerplay_table_entries_v1_0 +ffffffff823086b0 T get_powerplay_table_entry_v1_0 +ffffffff82309000 T pp_tables_get_response_times +ffffffff823090d0 T pp_tables_get_num_of_entries +ffffffff82309190 T pp_tables_get_entry +ffffffff823094a0 t init_non_clock_fields +ffffffff823095e0 t pp_tables_initialize +ffffffff8230a760 t pp_tables_uninitialize +ffffffff8230a960 t get_number_of_vce_state_table_entries +ffffffff8230aa50 t get_vce_state_table_entry +ffffffff8230b000 T smu10_init_function_pointers +ffffffff8230b040 t smu10_hwmgr_backend_init +ffffffff8230b6e0 t smu10_hwmgr_backend_fini +ffffffff8230b820 t smu10_setup_asic_task +ffffffff8230b890 t smu10_get_power_state_size +ffffffff8230b8c0 t smu10_apply_state_adjust_rules +ffffffff8230b8f0 t smu10_dpm_force_dpm_level +ffffffff8230be70 t smu10_enable_dpm_tasks +ffffffff8230bf30 t smu10_disable_dpm_tasks +ffffffff8230bf60 t smu10_dpm_patch_boot_state +ffffffff8230bf90 t smu10_dpm_get_pp_table_entry +ffffffff8230bff0 t smu10_dpm_get_num_of_pp_table_entries +ffffffff8230c040 t smu10_powergate_vcn +ffffffff8230c0e0 t smu10_dpm_get_mclk +ffffffff8230c140 t smu10_dpm_get_sclk +ffffffff8230c190 t smu10_set_power_state_tasks +ffffffff8230c200 t smu10_set_cpu_power_state +ffffffff8230c230 t smu10_store_cc6_data +ffffffff8230c2a0 t smu10_get_dal_power_level +ffffffff8230c2d0 t smu10_get_performance_level +ffffffff8230c370 t smu10_get_current_shallow_sleep_clocks +ffffffff8230c3d0 t smu10_get_clock_by_type_with_latency +ffffffff8230c520 t smu10_get_clock_by_type_with_voltage +ffffffff8230c630 t smu10_set_watermarks_for_clocks_ranges +ffffffff8230c700 t smu10_display_clock_voltage_request +ffffffff8230c7a0 t smu10_get_max_high_clocks +ffffffff8230c7d0 t smu10_power_off_asic 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T smu7_baco_set_state +ffffffff8230f000 T smu7_powerdown_uvd +ffffffff8230f050 T smu7_disable_clock_power_gating +ffffffff8230f0e0 T smu7_powergate_uvd +ffffffff8230f1d0 T smu7_powergate_vce +ffffffff8230f2c0 T smu7_update_clock_gatings +ffffffff8230f670 T smu7_powergate_gfx +ffffffff82310000 T smu7_get_sleep_divider_id_from_clock +ffffffff823100a0 T smu7_init_function_pointers +ffffffff82310100 t smu7_hwmgr_backend_init +ffffffff82311f80 t smu7_hwmgr_backend_fini +ffffffff82311ff0 t smu7_setup_asic_task +ffffffff82312360 t smu7_get_power_state_size +ffffffff82312390 t smu7_apply_state_adjust_rules +ffffffff82312830 t smu7_force_dpm_level +ffffffff82312d40 t smu7_enable_dpm_tasks +ffffffff823155d0 t smu7_disable_dpm_tasks +ffffffff82315c10 t smu7_dpm_patch_boot_state +ffffffff82315d50 t smu7_get_pp_table_entry +ffffffff82316150 t smu7_get_number_of_powerplay_table_entries +ffffffff823161c0 t smu7_dpm_get_mclk +ffffffff82316260 t smu7_dpm_get_sclk +ffffffff82316300 t smu7_set_power_state_tasks +ffffffff82317020 t smu7_notify_smc_display_config_after_ps_adjustment +ffffffff82317050 t smu7_display_configuration_changed_task +ffffffff82317210 t smu7_set_max_fan_rpm_output +ffffffff82317240 t smu7_set_max_fan_pwm_output +ffffffff82317260 t smu7_set_fan_control_mode +ffffffff823172f0 t smu7_get_fan_control_mode +ffffffff82317330 t smu7_register_irq_handlers +ffffffff823173e0 t smu7_check_smc_update_required_for_display_configuration +ffffffff82317490 t smu7_check_states_equal +ffffffff82317630 t smu7_get_performance_level +ffffffff823176c0 t smu7_get_clock_by_type +ffffffff82317880 t smu7_get_clock_by_type_with_latency +ffffffff82317a50 t smu7_set_watermarks_for_clocks_ranges +ffffffff82317c70 t smu7_get_max_high_clocks +ffffffff82317cf0 t smu7_power_off_asic +ffffffff82317d50 t smu7_force_clock_level +ffffffff82317e60 t smu7_print_clock_levels +ffffffff82318450 t smu7_get_sclk_od +ffffffff823184b0 t smu7_set_sclk_od +ffffffff82318570 t smu7_get_mclk_od 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smu7_set_power_limit +ffffffff8231b9d0 T smu7_enable_power_containment +ffffffff8231bb60 T smu7_disable_power_containment +ffffffff8231bc80 T smu7_power_control_set_level +ffffffff8231c000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff8231c080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff8231c150 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff8231c200 T smu7_fan_ctrl_set_static_mode +ffffffff8231c330 T smu7_fan_ctrl_set_default_mode +ffffffff8231c410 T smu7_fan_ctrl_start_smc_fan_control +ffffffff8231c540 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff8231c560 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff8231c740 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff8231c930 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff8231cb10 T smu7_thermal_get_temperature +ffffffff8231cb70 T smu7_thermal_disable_alert +ffffffff8231cc10 T smu7_thermal_stop_thermal_controller +ffffffff8231cd90 T smu7_start_thermal_controller +ffffffff8231d120 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff8231e000 T smu8_init_function_pointers +ffffffff8231e040 t smu8_hwmgr_backend_init +ffffffff8231e520 t smu8_hwmgr_backend_fini +ffffffff8231e5a0 t smu8_setup_asic_task +ffffffff8231eac0 t smu8_get_power_state_size +ffffffff8231eaf0 t smu8_apply_state_adjust_rules +ffffffff8231ec40 t smu8_dpm_force_dpm_level +ffffffff8231ef20 t smu8_enable_dpm_tasks +ffffffff8231f0b0 t smu8_disable_dpm_tasks +ffffffff8231f190 t smu8_dpm_patch_boot_state +ffffffff8231f1f0 t smu8_dpm_get_pp_table_entry +ffffffff8231f250 t smu8_dpm_get_num_of_pp_table_entries +ffffffff8231f2a0 t smu8_dpm_powerdown_uvd +ffffffff8231f2f0 t smu8_dpm_powergate_vce +ffffffff8231f4c0 t smu8_dpm_powergate_uvd +ffffffff8231f6d0 t smu8_dpm_powergate_acp +ffffffff8231f730 t smu8_dpm_get_mclk +ffffffff8231f760 t smu8_dpm_get_sclk +ffffffff8231f7d0 t smu8_set_power_state_tasks +ffffffff8231fad0 t smu8_set_cpu_power_state +ffffffff8231fb50 t smu8_store_cc6_data +ffffffff8231fbd0 t smu8_get_dal_power_level +ffffffff8231fc50 t smu8_get_performance_level +ffffffff8231fd50 t smu8_get_current_shallow_sleep_clocks +ffffffff8231fdb0 t smu8_get_clock_by_type +ffffffff8231fef0 t smu8_get_max_high_clocks +ffffffff8231ffb0 t smu8_power_off_asic +ffffffff82320030 t smu8_force_clock_level +ffffffff823200a0 t smu8_print_clock_levels +ffffffff82320280 t smu8_read_sensor +ffffffff82320590 t smu8_notify_cac_buffer_info +ffffffff82320640 t smu8_get_thermal_temperature_range +ffffffff823206c0 t smu8_dpm_get_pp_table_entry_callback +ffffffff82321000 T smu9_baco_get_capability +ffffffff823210e0 T smu9_baco_get_state +ffffffff82322000 T convert_to_vid +ffffffff82322050 T convert_to_vddc +ffffffff82322090 T phm_copy_clock_limits_array +ffffffff82322170 T phm_copy_overdrive_settings_limits_array +ffffffff82322250 T phm_set_field_to_u32 +ffffffff823222b0 T phm_wait_on_register +ffffffff823223a0 T phm_wait_on_indirect_register +ffffffff823224b0 T phm_wait_for_register_unequal +ffffffff82322580 T phm_wait_for_indirect_register_unequal +ffffffff82322680 T phm_cf_want_uvd_power_gating +ffffffff823226c0 T phm_cf_want_vce_power_gating +ffffffff82322700 T phm_trim_voltage_table +ffffffff82322820 T phm_get_svi2_mvdd_voltage_table +ffffffff823229a0 T phm_get_svi2_vddci_voltage_table +ffffffff82322b20 T phm_get_svi2_vdd_voltage_table +ffffffff82322bc0 T phm_trim_voltage_table_to_fit_state_table +ffffffff82322cb0 T phm_reset_single_dpm_table +ffffffff82322d10 T phm_setup_pcie_table_entry +ffffffff82322d50 T phm_get_dpm_level_enable_mask_value +ffffffff82322e30 T phm_get_voltage_index +ffffffff82322eb0 T phm_get_voltage_id +ffffffff82322f30 T phm_find_closest_vddci +ffffffff82322fa0 T phm_find_boot_level +ffffffff82323010 T phm_get_sclk_for_voltage_evv +ffffffff823230d0 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff823231e0 T phm_get_lowest_enabled_level +ffffffff82323220 T phm_apply_dal_min_voltage_request +ffffffff823232f0 T phm_get_voltage_evv_on_sclk +ffffffff823233a0 T phm_irq_process +ffffffff82323540 T smu9_register_irq_handlers +ffffffff823235f0 T smu_atom_get_data_table +ffffffff82323660 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff82323760 T smu_set_watermarks_for_clocks_ranges +ffffffff82324000 T tonga_baco_set_state +ffffffff82325000 T vega10_baco_set_state +ffffffff82326000 T vega10_enable_disable_vce_dpm +ffffffff82326090 T vega10_hwmgr_init +ffffffff823260f0 t vega10_hwmgr_backend_init +ffffffff82326ef0 t vega10_hwmgr_backend_fini +ffffffff82326f60 t vega10_setup_asic_task +ffffffff82327090 t vega10_get_power_state_size +ffffffff823270c0 t vega10_apply_state_adjust_rules +ffffffff82327420 t vega10_dpm_force_dpm_level +ffffffff82327880 t vega10_enable_dpm_tasks +ffffffff8232a650 t vega10_disable_dpm_tasks +ffffffff8232ac30 t vega10_patch_boot_state +ffffffff8232ac60 t vega10_get_pp_table_entry +ffffffff8232acd0 t vega10_power_gate_vce +ffffffff8232ad70 t vega10_power_gate_uvd +ffffffff8232ae10 t vega10_dpm_get_mclk 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vega10_populate_single_soc_level +ffffffff8232e8b0 t vega10_populate_single_memory_level +ffffffff8232ea20 t vega10_get_pp_table_entry_callback_func +ffffffff8232ec60 t vega10_odn_update_power_state +ffffffff8232f000 T vega10_enable_didt_config +ffffffff82330870 T vega10_disable_didt_config +ffffffff82330ad0 T vega10_initialize_power_tune_defaults +ffffffff82330c10 T vega10_set_power_limit +ffffffff82330c60 T vega10_enable_power_containment +ffffffff82330d80 T vega10_disable_power_containment +ffffffff82330e50 T vega10_power_control_set_level +ffffffff82330eb0 t vega10_didt_set_mask +ffffffff82332000 t vega10_pp_tables_initialize +ffffffff82333690 t vega10_pp_tables_uninitialize +ffffffff82333840 T vega10_get_number_of_powerplay_table_entries +ffffffff823338f0 T vega10_get_powerplay_table_entry +ffffffff82333a60 T vega10_baco_set_cap +ffffffff82334000 T vega10_fan_ctrl_get_fan_speed_info +ffffffff82334080 T vega10_fan_ctrl_get_fan_speed_pwm +ffffffff823341b0 T vega10_fan_ctrl_get_fan_speed_rpm +ffffffff823342b0 T vega10_fan_ctrl_set_static_mode +ffffffff82334570 T vega10_fan_ctrl_set_default_mode +ffffffff82334790 T vega10_fan_ctrl_start_smc_fan_control +ffffffff82334850 T vega10_fan_ctrl_stop_smc_fan_control +ffffffff82334910 T vega10_fan_ctrl_set_fan_speed_pwm +ffffffff82334b50 T vega10_fan_ctrl_reset_fan_speed_to_default +ffffffff82334c10 T vega10_fan_ctrl_set_fan_speed_rpm +ffffffff82334df0 T vega10_thermal_get_temperature +ffffffff82334e80 T vega10_thermal_disable_alert +ffffffff82334f90 T vega10_thermal_stop_thermal_controller +ffffffff82334ff0 T vega10_enable_mgpu_fan_boost +ffffffff82335100 T vega10_start_thermal_controller +ffffffff823356c0 T vega10_thermal_ctrl_uninitialize_thermal_controller +ffffffff82336000 T vega12_baco_set_state +ffffffff82337000 T vega12_enable_disable_vce_dpm +ffffffff82337090 T vega12_hwmgr_init +ffffffff823370d0 t vega12_hwmgr_backend_init +ffffffff82337900 t vega12_hwmgr_backend_fini +ffffffff82337960 t vega12_setup_asic_task +ffffffff823379a0 t vega12_apply_clocks_adjust_rules +ffffffff82337d60 t vega12_dpm_force_dpm_level +ffffffff823381a0 t vega12_enable_dpm_tasks +ffffffff82338c70 t vega12_disable_dpm_tasks +ffffffff82338d70 t vega12_patch_boot_state +ffffffff82338da0 t vega12_power_gate_vce +ffffffff82338e50 t vega12_power_gate_uvd +ffffffff82338f00 t vega12_dpm_get_mclk +ffffffff82338f50 t vega12_dpm_get_sclk +ffffffff82338fa0 t vega12_notify_smc_display_config_after_ps_adjustment +ffffffff82339100 t vega12_pre_display_configuration_changed_task +ffffffff823391e0 t vega12_display_configuration_changed_task +ffffffff823392c0 t vega12_set_fan_control_mode +ffffffff82339320 t vega12_get_fan_control_mode +ffffffff82339360 t vega12_check_smc_update_required_for_display_configuration +ffffffff823393c0 t vega12_get_dal_power_level +ffffffff823393f0 t vega12_get_performance_level +ffffffff82339420 t vega12_get_clock_by_type_with_latency +ffffffff82339700 t vega12_get_clock_by_type_with_voltage +ffffffff82339730 t vega12_set_watermarks_for_clocks_ranges +ffffffff823397b0 t vega12_display_clock_voltage_request +ffffffff82339830 t vega12_power_off_asic +ffffffff823398a0 t vega12_force_clock_level +ffffffff82339ae0 t vega12_print_clock_levels +ffffffff8233a280 t vega12_gfx_off_control +ffffffff8233a2d0 t vega12_read_sensor +ffffffff8233a6b0 t vega12_notify_cac_buffer_info +ffffffff8233a760 t vega12_get_thermal_temperature_range +ffffffff8233a860 t vega12_get_ppfeature_status +ffffffff8233a8e0 t vega12_set_ppfeature_status +ffffffff8233a980 t vega12_set_mp1_state +ffffffff8233a9f0 t vega12_get_gpu_metrics +ffffffff8233aca0 t vega12_upload_dpm_min_level +ffffffff8233aee0 t vega12_upload_dpm_max_level +ffffffff8233b0b0 t vega12_populate_umdpstate_clocks +ffffffff8233b150 t vega12_setup_single_dpm_table +ffffffff8233c000 t vega12_pp_tables_initialize +ffffffff8233c610 t vega12_pp_tables_uninitialize +ffffffff8233d000 T vega12_fan_ctrl_get_fan_speed_info +ffffffff8233d050 T vega12_fan_ctrl_get_fan_speed_rpm +ffffffff8233d0c0 T vega12_fan_ctrl_start_smc_fan_control +ffffffff8233d0f0 T vega12_fan_ctrl_stop_smc_fan_control +ffffffff8233d120 T vega12_fan_ctrl_reset_fan_speed_to_default +ffffffff8233d150 T vega12_thermal_get_temperature +ffffffff8233d1e0 T vega12_thermal_disable_alert +ffffffff8233d270 T vega12_thermal_stop_thermal_controller +ffffffff8233d300 T vega12_start_thermal_controller +ffffffff8233e000 T vega20_baco_get_capability +ffffffff8233e0c0 T vega20_baco_get_state +ffffffff8233e160 T vega20_baco_set_state +ffffffff8233e360 T vega20_baco_apply_vdci_flush_workaround +ffffffff8233f000 T vega20_hwmgr_init +ffffffff8233f040 t vega20_hwmgr_backend_init +ffffffff8233f940 t vega20_hwmgr_backend_fini +ffffffff8233f9a0 t vega20_setup_asic_task +ffffffff8233fa90 t vega20_apply_clocks_adjust_rules +ffffffff8233ff40 t vega20_dpm_force_dpm_level +ffffffff823406c0 t vega20_enable_dpm_tasks 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cyan_skillfish_set_ppt_funcs +ffffffff8237a030 t cyan_skillfish_print_clk_levels +ffffffff8237a150 t cyan_skillfish_od_edit_dpm_table +ffffffff8237a430 t cyan_skillfish_read_sensor +ffffffff8237a610 t cyan_skillfish_is_dpm_running +ffffffff8237a6b0 t cyan_skillfish_init_smc_tables +ffffffff8237a790 t cyan_skillfish_get_enabled_mask +ffffffff8237a7d0 t cyan_skillfish_get_dpm_ultimate_freq +ffffffff8237a890 t cyan_skillfish_get_gpu_metrics +ffffffff8237ab30 t cyan_skillfish_get_smu_metrics_data +ffffffff8237b000 T navi10_set_ppt_funcs +ffffffff8237b050 t navi10_run_btc +ffffffff8237b0d0 t navi10_get_allowed_feature_mask +ffffffff8237b3a0 t navi10_set_default_dpm_table +ffffffff8237b810 t navi10_populate_umd_state_clk +ffffffff8237b9d0 t navi10_print_clk_levels +ffffffff8237bb60 t navi10_emit_clk_levels +ffffffff8237bd80 t navi10_force_clk_levels +ffffffff8237beb0 t navi10_od_edit_dpm_table +ffffffff8237c460 t navi10_get_clock_by_type_with_latency +ffffffff8237c560 t navi10_get_power_profile_mode +ffffffff8237c7c0 t navi10_set_power_profile_mode +ffffffff8237ca90 t navi10_dpm_set_vcn_enable +ffffffff8237cb20 t navi10_dpm_set_jpeg_enable +ffffffff8237cba0 t navi10_read_sensor +ffffffff8237cd20 t navi10_pre_display_config_changed +ffffffff8237cdc0 t navi10_display_config_changed +ffffffff8237ce40 t navi10_notify_smc_display_config +ffffffff8237cfc0 t navi10_is_dpm_running +ffffffff8237d010 t navi10_get_fan_speed_rpm +ffffffff8237d0b0 t navi10_set_watermarks_table +ffffffff8237d250 t navi10_get_thermal_temperature_range +ffffffff8237d340 t navi10_get_uclk_dpm_states +ffffffff8237d450 t navi10_set_default_od_settings +ffffffff8237d6b0 t navi10_display_disable_memory_clock_switch +ffffffff8237d730 t navi10_get_power_limit +ffffffff8237d850 t navi10_update_pcie_parameters +ffffffff8237d9c0 t navi10_i2c_control_init +ffffffff8237daf0 t navi10_i2c_control_fini +ffffffff8237db30 t navi10_init_smc_tables +ffffffff8237dd80 t navi10_setup_pptable +ffffffff8237dfa0 t navi10_baco_enter +ffffffff8237dff0 t navi10_baco_exit +ffffffff8237e0f0 t navi1x_get_gpu_metrics +ffffffff8237ea90 t navi10_enable_mgpu_fan_boost +ffffffff8237eb10 t navi10_get_fan_parameters +ffffffff8237eb50 t navi10_post_smu_init +ffffffff8237edd0 t navi10_get_default_config_table_settings +ffffffff8237ee20 t navi10_set_config_table +ffffffff8237eed0 t navi1x_get_smu_metrics_data +ffffffff8237f560 t navi10_od_setting_check_range +ffffffff8237f610 t navi10_i2c_xfer +ffffffff8237f8b0 t navi10_i2c_func +ffffffff8237f8e0 t navi10_umc_hybrid_cdr_workaround +ffffffff82380000 T sienna_cichlid_set_ppt_funcs +ffffffff82380050 t sienna_cichlid_run_btc +ffffffff823800d0 t sienna_cichlid_get_allowed_feature_mask +ffffffff82380350 t sienna_cichlid_set_default_dpm_table +ffffffff82380930 t sienna_cichlid_populate_umd_state_clk +ffffffff823809f0 t sienna_cichlid_print_clk_levels +ffffffff82380bc0 t sienna_cichlid_force_clk_levels +ffffffff82380cf0 t sienna_cichlid_od_edit_dpm_table +ffffffff82381270 t sienna_cichlid_restore_user_od_settings +ffffffff82381300 t sienna_cichlid_get_power_profile_mode +ffffffff82381560 t sienna_cichlid_set_power_profile_mode +ffffffff82381830 t sienna_cichlid_dpm_set_vcn_enable +ffffffff823818f0 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff82381970 t sienna_cichlid_read_sensor +ffffffff82382170 t sienna_cichlid_pre_display_config_changed +ffffffff823821a0 t sienna_cichlid_display_config_changed +ffffffff82382200 t sienna_cichlid_notify_smc_display_config +ffffffff82382380 t sienna_cichlid_is_dpm_running +ffffffff823823d0 t sienna_cichlid_get_fan_speed_rpm +ffffffff823824e0 t sienna_cichlid_set_watermarks_table +ffffffff82382670 t sienna_cichlid_get_thermal_temperature_range +ffffffff82382750 t sienna_cichlid_get_uclk_dpm_states +ffffffff82382860 t sienna_cichlid_set_default_od_settings +ffffffff82382a10 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff82382a90 t sienna_cichlid_dump_pptable +ffffffff82382ac0 t sienna_cichlid_get_power_limit +ffffffff82382b90 t sienna_cichlid_update_pcie_parameters +ffffffff82382cc0 t sienna_cichlid_i2c_control_init +ffffffff82382df0 t sienna_cichlid_i2c_control_fini +ffffffff82382e30 t sienna_cichlid_get_unique_id +ffffffff82382f80 t sienna_cichlid_init_smc_tables +ffffffff823832a0 t sienna_cichlid_set_mp1_state +ffffffff823832e0 t sienna_cichlid_setup_pptable +ffffffff82383720 t sienna_cichlid_system_features_control +ffffffff823837b0 t sienna_cichlid_baco_enter +ffffffff82383800 t sienna_cichlid_baco_exit +ffffffff82383900 t sienna_cichlid_is_mode1_reset_supported +ffffffff82383980 t sienna_cichlid_is_mode2_reset_supported +ffffffff823839b0 t sienna_cichlid_mode2_reset +ffffffff82383af0 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff82383b10 t sienna_cichlid_get_gpu_metrics +ffffffff82384090 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff823840e0 t sienna_cichlid_get_fan_parameters +ffffffff82384120 t sienna_cichlid_gpo_control +ffffffff823841d0 t sienna_cichlid_get_ecc_info +ffffffff823842c0 t sienna_cichlid_stb_get_data_direct +ffffffff82384360 t sienna_cichlid_get_default_config_table_settings +ffffffff823843d0 t sienna_cichlid_set_config_table +ffffffff823844a0 t sienna_cichlid_get_throttler_status_locked +ffffffff82384600 t sienna_cichlid_get_smartshift_power_percentage +ffffffff82384730 t sienna_cichlid_i2c_xfer +ffffffff823849d0 t sienna_cichlid_i2c_func +ffffffff82385000 T smu_v11_0_init_microcode +ffffffff82385140 T smu_v11_0_fini_microcode +ffffffff82385190 T smu_v11_0_load_microcode +ffffffff823852d0 T smu_v11_0_check_fw_status +ffffffff82385320 T smu_v11_0_check_fw_version +ffffffff82385490 T smu_v11_0_setup_pptable +ffffffff823855b0 T smu_v11_0_init_smc_tables +ffffffff82385710 T smu_v11_0_fini_smc_tables +ffffffff82385940 T smu_v11_0_init_power +ffffffff823859d0 T smu_v11_0_fini_power +ffffffff82385a30 T smu_v11_0_get_vbios_bootup_values +ffffffff82385d90 T smu_v11_0_notify_memory_pool_location +ffffffff82385e80 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff82385f00 T smu_v11_0_set_driver_table_location +ffffffff82385f70 T smu_v11_0_set_tool_table_location +ffffffff82385fe0 T smu_v11_0_init_display_count +ffffffff82386040 T smu_v11_0_set_allowed_mask +ffffffff82386110 T smu_v11_0_system_features_control +ffffffff82386130 T smu_v11_0_notify_display_change +ffffffff823861a0 T smu_v11_0_init_max_sustainable_clocks +ffffffff82386400 t smu_v11_0_get_max_sustainable_clock +ffffffff82386520 T smu_v11_0_get_current_power_limit +ffffffff823865f0 T smu_v11_0_set_power_limit +ffffffff82386730 T smu_v11_0_interrupt_work +ffffffff823867b0 T smu_v11_0_enable_thermal_alert +ffffffff82386850 T smu_v11_0_disable_thermal_alert +ffffffff82386870 T smu_v11_0_get_gfx_vdd +ffffffff82386930 T smu_v11_0_display_clock_voltage_request +ffffffff82386a80 T smu_v11_0_set_hard_freq_limited_range +ffffffff82386b60 T smu_v11_0_gfx_off_control +ffffffff82386bd0 T smu_v11_0_get_fan_control_mode +ffffffff82386c20 T smu_v11_0_set_fan_speed_pwm +ffffffff82386dd0 t smu_v11_0_set_fan_static_mode +ffffffff82386f90 T smu_v11_0_set_fan_speed_rpm +ffffffff823870d0 T smu_v11_0_get_fan_speed_pwm +ffffffff82387210 T smu_v11_0_get_fan_speed_rpm +ffffffff82387310 T smu_v11_0_set_fan_control_mode +ffffffff823874b0 T smu_v11_0_set_xgmi_pstate +ffffffff823874d0 T smu_v11_0_register_irq_handler +ffffffff82387590 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff82387620 T smu_v11_0_set_azalia_d3_pme +ffffffff82387640 T smu_v11_0_baco_set_armd3_sequence +ffffffff82387660 T smu_v11_0_baco_is_support +ffffffff823876f0 T smu_v11_0_baco_get_state +ffffffff82387720 T smu_v11_0_baco_set_state +ffffffff823879d0 T smu_v11_0_baco_enter +ffffffff82387ac0 T smu_v11_0_baco_exit +ffffffff82387bf0 T smu_v11_0_mode1_reset +ffffffff82387c70 T smu_v11_0_handle_passthrough_sbr +ffffffff82387c90 T smu_v11_0_get_dpm_ultimate_freq +ffffffff82387dd0 T smu_v11_0_set_soft_freq_limited_range +ffffffff82387ea0 T smu_v11_0_set_performance_level +ffffffff823881f0 T smu_v11_0_set_power_source +ffffffff82388250 T smu_v11_0_get_dpm_freq_by_index +ffffffff82388300 T smu_v11_0_get_dpm_level_count +ffffffff823883a0 T smu_v11_0_set_single_dpm_table +ffffffff82388600 T smu_v11_0_get_dpm_level_range +ffffffff82388760 T smu_v11_0_get_current_pcie_link_width_level +ffffffff823887b0 T smu_v11_0_get_current_pcie_link_width +ffffffff82388810 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff82388860 T smu_v11_0_get_current_pcie_link_speed +ffffffff823888c0 T smu_v11_0_gfx_ulv_control +ffffffff82388930 T smu_v11_0_deep_sleep_control +ffffffff82388ae0 T smu_v11_0_restore_user_od_settings +ffffffff82388b70 T smu_v11_0_set_smu_mailbox_registers +ffffffff82388be0 t smu_v11_0_set_irq_state +ffffffff82389190 t smu_v11_0_irq_process +ffffffff8238a000 T vangogh_set_ppt_funcs +ffffffff8238a040 t vangogh_set_default_dpm_tables +ffffffff8238a070 t vangogh_common_print_clk_levels +ffffffff8238a4e0 t vangogh_force_clk_levels +ffffffff8238a710 t vangogh_od_edit_dpm_table +ffffffff8238ac40 t vangogh_get_power_profile_mode +ffffffff8238ad40 t vangogh_set_power_profile_mode +ffffffff8238ae60 t vangogh_dpm_set_vcn_enable +ffffffff8238aeb0 t vangogh_dpm_set_jpeg_enable +ffffffff8238af00 t vangogh_read_sensor +ffffffff8238b530 t vangogh_get_apu_thermal_limit +ffffffff8238b550 t vangogh_set_apu_thermal_limit +ffffffff8238b570 t vangogh_is_dpm_running +ffffffff8238b5d0 t vangogh_set_watermarks_table +ffffffff8238b750 t vangogh_set_performance_level +ffffffff8238bf60 t vangogh_get_power_limit +ffffffff8238c0c0 t vangogh_get_ppt_limit +ffffffff8238c130 t vangogh_get_dpm_clock_table +ffffffff8238c2a0 t vangogh_init_smc_tables +ffffffff8238c4e0 t vangogh_system_features_control +ffffffff8238c530 t vangogh_set_power_limit +ffffffff8238c680 t vangogh_get_gfxoff_status +ffffffff8238c710 t vangogh_get_gfxoff_entrycount +ffffffff8238c780 t vangogh_set_gfxoff_residency +ffffffff8238c7f0 t vangogh_get_gfxoff_residency +ffffffff8238c830 t vangogh_mode2_reset +ffffffff8238c970 t vangogh_common_get_gpu_metrics +ffffffff8238d0f0 t vangogh_post_smu_init +ffffffff8238d280 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff8238d2f0 t vangogh_force_dpm_limit_value +ffffffff8238d420 t vangogh_get_dpm_ultimate_freq +ffffffff8238d7e0 t vangogh_set_soft_freq_limited_range +ffffffff8238d960 t vangogh_get_gpu_metrics_v2_3 +ffffffff8238e000 T renoir_set_ppt_funcs +ffffffff8238e0a0 t renoir_get_current_power_state +ffffffff8238e120 t renoir_print_clk_levels +ffffffff8238e530 t renoir_force_clk_levels +ffffffff8238e750 t renoir_od_edit_dpm_table +ffffffff8238ea30 t renoir_get_power_profile_mode +ffffffff8238eb00 t renoir_set_power_profile_mode +ffffffff8238ec20 t renoir_dpm_set_vcn_enable +ffffffff8238eca0 t renoir_dpm_set_jpeg_enable +ffffffff8238ed20 t renoir_read_sensor +ffffffff8238f0d0 t renoir_is_dpm_running +ffffffff8238f110 t renoir_set_watermarks_table +ffffffff8238f2b0 t renoir_set_performance_level +ffffffff8238f7d0 t renoir_get_dpm_clock_table +ffffffff8238fb20 t renoir_init_smc_tables +ffffffff8238fc90 t renoir_get_enabled_mask +ffffffff8238fcd0 t renoir_get_dpm_ultimate_freq +ffffffff8238ff70 t renoir_get_gpu_metrics +ffffffff82390190 t renoir_gfx_state_change_set +ffffffff823901c0 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff82390260 t renoir_force_dpm_limit_value +ffffffff82391000 T smu_v12_0_check_fw_status +ffffffff82391050 T smu_v12_0_check_fw_version +ffffffff823910c0 T smu_v12_0_powergate_sdma +ffffffff82391110 T smu_v12_0_set_gfx_cgpg +ffffffff82391170 T smu_v12_0_get_gfxoff_status +ffffffff82391200 T smu_v12_0_gfx_off_control +ffffffff82391320 T smu_v12_0_fini_smc_tables +ffffffff823913d0 T smu_v12_0_set_default_dpm_tables +ffffffff82391400 T smu_v12_0_mode2_reset +ffffffff82391420 T smu_v12_0_set_soft_freq_limited_range +ffffffff82391560 T smu_v12_0_set_driver_table_location +ffffffff823915d0 T smu_v12_0_get_vbios_bootup_values +ffffffff82392000 T aldebaran_set_ppt_funcs +ffffffff82392050 t aldebaran_get_allowed_feature_mask +ffffffff823920a0 t aldebaran_set_default_dpm_table +ffffffff823922a0 t aldebaran_populate_umd_state_clk +ffffffff823923a0 t aldebaran_print_clk_levels +ffffffff82392560 t aldebaran_force_clk_levels +ffffffff82392720 t aldebaran_usr_edit_dpm_table +ffffffff82392940 t aldebaran_read_sensor +ffffffff82392b60 t aldebaran_is_dpm_running +ffffffff82392bb0 t aldebaran_get_thermal_temperature_range +ffffffff82392c80 t aldebaran_set_performance_level +ffffffff82392d30 t aldebaran_get_power_limit +ffffffff82392ec0 t aldebaran_set_df_cstate +ffffffff82392f40 t aldebaran_allow_xgmi_power_down +ffffffff82392fe0 t aldebaran_i2c_control_init +ffffffff823930a0 t aldebaran_i2c_control_fini +ffffffff823930e0 t aldebaran_get_unique_id +ffffffff823931c0 t aldebaran_init_smc_tables +ffffffff82393380 t aldebaran_set_mp1_state +ffffffff823933c0 t aldebaran_setup_pptable +ffffffff82393490 t aldebaran_system_features_control +ffffffff823935f0 t aldebaran_set_power_limit +ffffffff82393680 t aldebaran_is_baco_supported +ffffffff823936b0 t aldebaran_is_mode1_reset_supported +ffffffff823936e0 t aldebaran_is_mode2_reset_supported +ffffffff82393710 t aldebaran_mode1_reset +ffffffff823937f0 t aldebaran_mode2_reset +ffffffff82393b10 t aldebaran_set_soft_freq_limited_range +ffffffff82393d10 t aldebaran_log_thermal_throttling_event +ffffffff82394020 t aldebaran_get_gpu_metrics +ffffffff823942a0 t aldebaran_smu_handle_passthrough_sbr +ffffffff823942c0 t aldebaran_smu_send_hbm_bad_page_num +ffffffff82394340 t aldebaran_get_ecc_info +ffffffff823944a0 t aldebaran_send_hbm_bad_channel_flag +ffffffff82394570 t aldebaran_get_current_clk_freq_by_table +ffffffff823946b0 t aldebaran_get_smu_metrics_data +ffffffff82394920 t aldebaran_upload_dpm_level +ffffffff82394a10 t aldebaran_i2c_xfer +ffffffff82394cb0 t aldebaran_i2c_func +ffffffff82395000 T smu_v13_0_init_microcode +ffffffff82395120 T smu_v13_0_fini_microcode +ffffffff82395170 T smu_v13_0_load_microcode +ffffffff823951a0 T smu_v13_0_init_pptable_microcode +ffffffff82395350 T smu_v13_0_get_pptable_from_firmware +ffffffff82395470 T smu_v13_0_check_fw_status +ffffffff823954e0 T smu_v13_0_check_fw_version +ffffffff82395560 T smu_v13_0_setup_pptable +ffffffff823956f0 T smu_v13_0_init_smc_tables +ffffffff82395870 T smu_v13_0_fini_smc_tables +ffffffff82395a80 T smu_v13_0_init_power +ffffffff82395b00 T smu_v13_0_fini_power +ffffffff82395b80 T smu_v13_0_get_vbios_bootup_values +ffffffff82395e20 T smu_v13_0_notify_memory_pool_location +ffffffff82395ee0 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff82395f60 T smu_v13_0_set_driver_table_location +ffffffff82395fd0 T smu_v13_0_set_tool_table_location +ffffffff82396040 T smu_v13_0_init_display_count +ffffffff82396080 T smu_v13_0_set_allowed_mask +ffffffff82396150 T smu_v13_0_gfx_off_control +ffffffff823961d0 T smu_v13_0_system_features_control +ffffffff823961f0 T smu_v13_0_notify_display_change +ffffffff82396250 T smu_v13_0_init_max_sustainable_clocks +ffffffff823964b0 t smu_v13_0_get_max_sustainable_clock +ffffffff823965d0 T smu_v13_0_get_current_power_limit +ffffffff823966a0 T smu_v13_0_set_power_limit +ffffffff823967b0 T smu_v13_0_enable_thermal_alert +ffffffff82396840 T smu_v13_0_disable_thermal_alert +ffffffff82396880 T smu_v13_0_get_gfx_vdd +ffffffff82396940 T smu_v13_0_display_clock_voltage_request +ffffffff82396a90 T smu_v13_0_set_hard_freq_limited_range +ffffffff82396b70 T smu_v13_0_get_fan_control_mode +ffffffff82396bc0 T smu_v13_0_set_fan_speed_pwm +ffffffff82396de0 t smu_v13_0_set_fan_static_mode +ffffffff82396fb0 T smu_v13_0_set_fan_control_mode +ffffffff82397110 T smu_v13_0_set_fan_speed_rpm +ffffffff823972c0 T smu_v13_0_set_xgmi_pstate +ffffffff823972e0 T smu_v13_0_register_irq_handler +ffffffff823973b0 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff82397440 T smu_v13_0_set_azalia_d3_pme +ffffffff82397460 T smu_v13_0_wait_for_event +ffffffff823974b0 T smu_v13_0_get_dpm_ultimate_freq +ffffffff82397610 T smu_v13_0_set_soft_freq_limited_range +ffffffff823976e0 T smu_v13_0_set_performance_level +ffffffff82397e40 T smu_v13_0_set_power_source +ffffffff82397ea0 T smu_v13_0_get_dpm_freq_by_index +ffffffff82397f50 T smu_v13_0_set_single_dpm_table +ffffffff82398240 T smu_v13_0_get_current_pcie_link_width_level +ffffffff82398290 T smu_v13_0_get_current_pcie_link_width +ffffffff823982f0 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff82398340 T smu_v13_0_get_current_pcie_link_speed +ffffffff82398390 T smu_v13_0_set_vcn_enable +ffffffff82398450 T smu_v13_0_set_jpeg_enable +ffffffff82398470 T smu_v13_0_run_btc +ffffffff823984f0 T smu_v13_0_gpo_control +ffffffff82398580 T smu_v13_0_deep_sleep_control +ffffffff823987e0 T smu_v13_0_gfx_ulv_control +ffffffff82398850 T smu_v13_0_baco_set_armd3_sequence +ffffffff823988c0 T smu_v13_0_baco_is_support +ffffffff82398950 T smu_v13_0_baco_get_state +ffffffff82398980 T smu_v13_0_baco_set_state +ffffffff82398a50 T smu_v13_0_baco_enter +ffffffff82398b70 T smu_v13_0_baco_exit +ffffffff82398c10 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff82398c50 T smu_v13_0_od_edit_dpm_table +ffffffff82398f00 T smu_v13_0_set_default_dpm_tables +ffffffff82398f30 T smu_v13_0_set_smu_mailbox_registers +ffffffff82398fa0 T smu_v13_0_mode1_reset +ffffffff82399020 T smu_v13_0_update_pcie_parameters +ffffffff82399290 t smu_v13_0_set_irq_state +ffffffff82399840 t smu_v13_0_irq_process +ffffffff8239a000 T smu_v13_0_0_set_ppt_funcs +ffffffff8239a0f0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff8239a230 t smu_v13_0_0_set_default_dpm_table +ffffffff8239a650 t smu_v13_0_0_populate_umd_state_clk +ffffffff8239a790 t smu_v13_0_0_print_clk_levels +ffffffff8239a8a0 t smu_v13_0_0_force_clk_levels +ffffffff8239aa20 t smu_v13_0_0_od_edit_dpm_table +ffffffff8239aef0 t smu_v13_0_0_restore_user_od_settings +ffffffff8239afb0 t smu_v13_0_0_get_power_profile_mode +ffffffff8239b0b0 t smu_v13_0_0_set_power_profile_mode +ffffffff8239b300 t smu_v13_0_0_read_sensor +ffffffff8239b520 t smu_v13_0_0_is_dpm_running +ffffffff8239b570 t smu_v13_0_0_get_fan_speed_pwm +ffffffff8239b650 t smu_v13_0_0_get_fan_speed_rpm +ffffffff8239b6c0 t smu_v13_0_0_get_thermal_temperature_range +ffffffff8239b7c0 t smu_v13_0_0_set_default_od_settings +ffffffff8239b8f0 t smu_v13_0_0_dump_pptable +ffffffff8239b920 t smu_v13_0_0_get_power_limit +ffffffff8239ba00 t smu_v13_0_0_set_df_cstate +ffffffff8239ba20 t smu_v13_0_0_i2c_control_init +ffffffff8239bb50 t smu_v13_0_0_i2c_control_fini +ffffffff8239bb90 t smu_v13_0_0_get_unique_id +ffffffff8239bc30 t smu_v13_0_0_init_smc_tables +ffffffff8239be80 t smu_v13_0_0_set_mp1_state +ffffffff8239bec0 t smu_v13_0_0_setup_pptable +ffffffff8239c020 t smu_v13_0_0_system_features_control +ffffffff8239c030 t smu_v13_0_0_baco_enter +ffffffff8239c090 t smu_v13_0_0_baco_exit +ffffffff8239c0f0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff8239c150 t smu_v13_0_0_mode1_reset +ffffffff8239c270 t smu_v13_0_0_mode2_reset +ffffffff8239c2c0 t smu_v13_0_0_enable_gfx_features +ffffffff8239c310 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff8239c430 t smu_v13_0_0_get_gpu_metrics +ffffffff8239c870 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff8239c8c0 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff8239c940 t smu_v13_0_0_get_ecc_info +ffffffff8239ca40 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff8239cac0 t smu_v13_0_0_i2c_xfer +ffffffff8239cd60 t smu_v13_0_0_i2c_func +ffffffff8239d000 T smu_v13_0_4_set_ppt_funcs +ffffffff8239d0c0 t smu_v13_0_4_print_clk_levels +ffffffff8239d130 t smu_v13_0_4_force_clk_levels +ffffffff8239d3f0 t smu_v13_0_4_read_sensor +ffffffff8239d6d0 t smu_v13_0_4_is_dpm_running +ffffffff8239d720 t smu_v13_0_4_set_watermarks_table +ffffffff8239d8a0 t smu_v13_0_4_set_performance_level +ffffffff8239e450 t smu_v13_0_4_init_smc_tables +ffffffff8239e5c0 t smu_v13_0_4_fini_smc_tables +ffffffff8239e670 t smu_v13_0_4_system_features_control +ffffffff8239e6c0 t smu_v13_0_4_mode2_reset +ffffffff8239e6e0 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff8239eb00 t smu_v13_0_4_get_gpu_metrics +ffffffff8239ecd0 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff8239ed30 t smu_v13_0_4_get_current_clk_freq +ffffffff8239f000 T smu_v13_0_5_set_ppt_funcs +ffffffff8239f0a0 t smu_v13_0_5_set_default_dpm_tables +ffffffff8239f0d0 t smu_v13_0_5_print_clk_levels +ffffffff8239f160 t smu_v13_0_5_force_clk_levels +ffffffff8239f2d0 t smu_v13_0_5_od_edit_dpm_table +ffffffff8239f580 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff8239f5a0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff8239f5c0 t smu_v13_0_5_read_sensor +ffffffff8239f7e0 t smu_v13_0_5_is_dpm_running +ffffffff8239f830 t smu_v13_0_5_set_watermarks_table +ffffffff8239f9b0 t smu_v13_0_5_set_performance_level +ffffffff8239ff50 t smu_v13_0_5_init_smc_tables +ffffffff823a00c0 t smu_v13_0_5_fini_smc_tables +ffffffff823a0170 t smu_v13_0_5_system_features_control +ffffffff823a01c0 t smu_v13_0_5_mode2_reset +ffffffff823a0240 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff823a0680 t smu_v13_0_5_get_gpu_metrics +ffffffff823a07d0 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff823a1000 T smu_v13_0_6_set_ppt_funcs +ffffffff823a1050 t smu_v13_0_6_get_allowed_feature_mask +ffffffff823a10a0 t smu_v13_0_6_set_default_dpm_table +ffffffff823a15a0 t smu_v13_0_6_populate_umd_state_clk +ffffffff823a16a0 t smu_v13_0_6_print_clk_levels +ffffffff823a1a10 t smu_v13_0_6_force_clk_levels +ffffffff823a1bd0 t smu_v13_0_6_usr_edit_dpm_table +ffffffff823a1df0 t smu_v13_0_6_read_sensor +ffffffff823a2380 t smu_v13_0_6_is_dpm_running +ffffffff823a2400 t smu_v13_0_6_get_thermal_temperature_range +ffffffff823a2550 t smu_v13_0_6_set_performance_level +ffffffff823a2660 t smu_v13_0_6_get_power_limit +ffffffff823a2730 t smu_v13_0_6_set_df_cstate +ffffffff823a2750 t smu_v13_0_6_allow_xgmi_power_down +ffffffff823a2770 t smu_v13_0_6_i2c_control_init +ffffffff823a28a0 t smu_v13_0_6_i2c_control_fini +ffffffff823a28e0 t smu_v13_0_6_get_unique_id +ffffffff823a2960 t smu_v13_0_6_init_smc_tables +ffffffff823a2af0 t smu_v13_0_6_check_fw_status +ffffffff823a2b40 t smu_v13_0_6_setup_pptable +ffffffff823a2b70 t smu_v13_0_6_system_features_control +ffffffff823a2c10 t smu_v13_0_6_get_enabled_mask +ffffffff823a2c80 t smu_v13_0_6_set_power_limit +ffffffff823a2ca0 t smu_v13_0_6_register_irq_handler +ffffffff823a2d00 t smu_v13_0_6_is_baco_supported +ffffffff823a2d30 t smu_v13_0_6_is_mode1_reset_supported +ffffffff823a2d60 t smu_v13_0_6_is_mode2_reset_supported +ffffffff823a2d90 t smu_v13_0_6_mode1_reset +ffffffff823a2e40 t smu_v13_0_6_mode2_reset +ffffffff823a30f0 t smu_v13_0_6_get_dpm_ultimate_freq +ffffffff823a3300 t smu_v13_0_6_set_soft_freq_limited_range +ffffffff823a3530 t smu_v13_0_6_log_thermal_throttling_event +ffffffff823a3820 t smu_v13_0_6_get_gpu_metrics +ffffffff823a3b70 t smu_v13_0_6_smu_send_hbm_bad_page_num +ffffffff823a3bf0 t smu_v13_0_6_get_smu_metrics_data +ffffffff823a3e80 t smu_v13_0_6_upload_dpm_level +ffffffff823a3f80 t smu_v13_0_6_i2c_xfer +ffffffff823a4280 t smu_v13_0_6_i2c_func +ffffffff823a42b0 t smu_v13_0_6_set_irq_state +ffffffff823a4540 t smu_v13_0_6_irq_process +ffffffff823a5000 T smu_v13_0_7_set_ppt_funcs +ffffffff823a5060 t smu_v13_0_7_get_allowed_feature_mask +ffffffff823a51d0 t smu_v13_0_7_set_default_dpm_table +ffffffff823a55f0 t smu_v13_0_7_populate_umd_state_clk +ffffffff823a5730 t smu_v13_0_7_print_clk_levels +ffffffff823a5840 t smu_v13_0_7_force_clk_levels +ffffffff823a59c0 t smu_v13_0_7_od_edit_dpm_table +ffffffff823a5e90 t smu_v13_0_7_restore_user_od_settings +ffffffff823a5f50 t smu_v13_0_7_get_power_profile_mode +ffffffff823a6090 t smu_v13_0_7_set_power_profile_mode +ffffffff823a62d0 t smu_v13_0_7_read_sensor +ffffffff823a64e0 t smu_v13_0_7_is_dpm_running +ffffffff823a6530 t smu_v13_0_7_get_fan_speed_pwm +ffffffff823a6610 t smu_v13_0_7_get_fan_speed_rpm +ffffffff823a6680 t smu_v13_0_7_get_thermal_temperature_range +ffffffff823a6780 t smu_v13_0_7_set_default_od_settings +ffffffff823a68b0 t smu_v13_0_7_dump_pptable +ffffffff823a68e0 t smu_v13_0_7_get_power_limit +ffffffff823a69c0 t smu_v13_0_7_set_df_cstate +ffffffff823a69e0 t smu_v13_0_7_init_smc_tables +ffffffff823a6bd0 t smu_v13_0_7_check_fw_status +ffffffff823a6c20 t smu_v13_0_7_set_mp1_state +ffffffff823a6c60 t smu_v13_0_7_setup_pptable +ffffffff823a6dc0 t smu_v13_0_7_baco_enter +ffffffff823a6e20 t smu_v13_0_7_baco_exit +ffffffff823a6e80 t smu_v13_0_7_is_mode1_reset_supported +ffffffff823a6ec0 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff823a6fe0 t smu_v13_0_7_get_gpu_metrics +ffffffff823a7410 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff823a8000 T yellow_carp_set_ppt_funcs +ffffffff823a8050 t yellow_carp_set_default_dpm_tables +ffffffff823a8080 t yellow_carp_print_clk_levels +ffffffff823a8100 t yellow_carp_force_clk_levels +ffffffff823a83c0 t yellow_carp_od_edit_dpm_table +ffffffff823a8670 t yellow_carp_dpm_set_vcn_enable +ffffffff823a8690 t yellow_carp_dpm_set_jpeg_enable +ffffffff823a86b0 t yellow_carp_read_sensor +ffffffff823a8a20 t yellow_carp_is_dpm_running +ffffffff823a8a70 t yellow_carp_set_watermarks_table +ffffffff823a8bf0 t yellow_carp_set_performance_level +ffffffff823a9680 t yellow_carp_init_smc_tables +ffffffff823a97f0 t yellow_carp_fini_smc_tables +ffffffff823a98a0 t yellow_carp_system_features_control +ffffffff823a98f0 t yellow_carp_get_gfxoff_status +ffffffff823a9980 t yellow_carp_mode2_reset +ffffffff823a9a00 t yellow_carp_get_dpm_ultimate_freq +ffffffff823a9e40 t yellow_carp_get_gpu_metrics +ffffffff823a9ff0 t yellow_carp_post_smu_init +ffffffff823aa070 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff823aa0d0 t yellow_carp_get_current_clk_freq +ffffffff823aa1d0 t yellow_carp_get_dpm_profile_freq +ffffffff823ab000 T smu_cmn_send_msg_without_waiting +ffffffff823ab170 T smu_cmn_wait_for_response +ffffffff823ab2a0 T smu_cmn_send_smc_msg_with_param +ffffffff823ab5b0 T smu_cmn_to_asic_specific_index +ffffffff823ab6e0 t __smu_cmn_reg_print_error +ffffffff823ab920 T smu_cmn_send_smc_msg +ffffffff823ab940 T smu_cmn_send_debug_smc_msg +ffffffff823ab9c0 T smu_cmn_send_debug_smc_msg_with_param +ffffffff823aba40 T smu_cmn_feature_is_supported +ffffffff823abaf0 T smu_cmn_feature_is_enabled +ffffffff823abbe0 T smu_cmn_clk_dpm_is_enabled +ffffffff823abce0 T smu_cmn_get_enabled_mask +ffffffff823abdd0 T smu_cmn_get_indep_throttler_status +ffffffff823abe80 T smu_cmn_feature_update_enable_state +ffffffff823abf20 T smu_cmn_feature_set_enabled +ffffffff823abff0 T smu_cmn_get_pp_feature_mask +ffffffff823ac1a0 T smu_cmn_set_pp_feature_mask +ffffffff823ac2a0 T smu_cmn_disable_all_features_with_exception +ffffffff823ac350 T smu_cmn_get_smc_version +ffffffff823ac420 T smu_cmn_update_table +ffffffff823ac580 T smu_cmn_write_watermarks_table +ffffffff823ac650 T smu_cmn_write_pptable +ffffffff823ac710 T smu_cmn_get_metrics_table +ffffffff823ac870 T smu_cmn_get_combo_pptable +ffffffff823ac940 T smu_cmn_init_soft_gpu_metrics +ffffffff823aca30 T smu_cmn_set_mp1_state +ffffffff823acad0 T smu_cmn_is_audio_func_enabled +ffffffff823ad000 T pci_mcfg_init +ffffffff823ad050 T pci_lookup_segment +ffffffff823ad0b0 T pci_attach_hook +ffffffff823ad0e0 T pci_bus_maxdevs +ffffffff823ad110 T pci_make_tag +ffffffff823ad180 T pci_decompose_tag +ffffffff823ad1e0 T pci_conf_size +ffffffff823ad240 T pci_mcfg_map_bus +ffffffff823ad2c0 T pci_conf_read +ffffffff823ad410 T pci_conf_write +ffffffff823ad550 T pci_msix_table_map +ffffffff823ad680 T pci_msix_table_unmap +ffffffff823ad720 T msi_hwmask +ffffffff823ad750 T msi_hwunmask +ffffffff823ad780 T msi_addroute +ffffffff823ad890 T msi_delroute +ffffffff823ad910 T msi_allocidtvec +ffffffff823ada60 T pci_intr_enable_msivec +ffffffff823adb40 T pci_intr_map_msi +ffffffff823adbf0 T pci_intr_map_msivec +ffffffff823adca0 T msix_hwmask +ffffffff823adcd0 T msix_hwunmask +ffffffff823add00 T msix_addroute +ffffffff823adef0 T msix_delroute +ffffffff823ae050 T pci_intr_map_msix +ffffffff823ae120 T pci_intr_map +ffffffff823ae350 T pci_intr_string +ffffffff823ae430 T pci_intr_establish +ffffffff823ae480 T pci_intr_establish_cpu +ffffffff823ae5d0 T pci_intr_disestablish +ffffffff823ae5f0 T pci_init_extents +ffffffff823ae7d0 T pci_probe_device_hook +ffffffff823ae810 T pci_dev_postattach +ffffffff823ae820 T pci_min_powerstate +ffffffff823ae830 T pci_set_powerstate_md +ffffffff823af000 T pciide_machdep_compat_intr_establish +ffffffff823af060 T pciide_machdep_compat_intr_disestablish +ffffffff823b0000 T vga_post_init +ffffffff823b0310 t vm86_emu_inb +ffffffff823b0360 t vm86_emu_inw +ffffffff823b03a0 t vm86_emu_inl +ffffffff823b03e0 t vm86_emu_outb +ffffffff823b0430 t vm86_emu_outw +ffffffff823b0470 t vm86_emu_outl +ffffffff823b04b0 T vga_post_call +ffffffff823b0520 T vga_post_free +ffffffff823b0590 T ddb_vgapost +ffffffff823b1000 T pchbmatch +ffffffff823b1040 T pchbattach +ffffffff823b14a0 T pchbactivate +ffffffff823b1510 T pchb_amd64ht_attach +ffffffff823b1660 T pchb_rnd +ffffffff823b16e0 T pchb_print +ffffffff823b2000 T amas_match +ffffffff823b2050 T amas_attach +ffffffff823b20b0 T amas_intl_nodes +ffffffff823b2140 T amas_get_pagerange +ffffffff823b3000 T agp_flush_cache +ffffffff823b3030 T agp_flush_cache_range +ffffffff823b3040 T agp_init_map +ffffffff823b3110 T agp_destroy_map +ffffffff823b3150 T agp_map_subregion +ffffffff823b3180 T agp_unmap_subregion +ffffffff823b31b0 T agp_map_atomic +ffffffff823b31e0 T agp_unmap_atomic +ffffffff823b4000 T cardslotmatch +ffffffff823b4050 T cardslotattach +ffffffff823b42a0 T cardslot_event +ffffffff823b4300 T cardslot_cb_print +ffffffff823b4350 T cardslot_16_print +ffffffff823b43a0 T cardslot_16_submatch +ffffffff823b43f0 T cardslot_event_throw +ffffffff823b4490 T cardslot_process_event +ffffffff823b5000 T cardbusmatch +ffffffff823b5050 T cardbusattach +ffffffff823b5130 T cardbus_read_tuples +ffffffff823b54e0 T parse_tuple +ffffffff823b5750 T cardbus_attach_card +ffffffff823b5ed0 T enable_function +ffffffff823b5f70 T decode_tuples +ffffffff823b6050 T cardbusprint +ffffffff823b6140 T cardbussubmatch +ffffffff823b61a0 T disable_function +ffffffff823b6200 T cardbus_detach_card +ffffffff823b62e0 T cardbus_intr_establish +ffffffff823b6310 T cardbus_intr_disestablish +ffffffff823b6330 T cardbus_function_enable +ffffffff823b6410 T cardbus_function_disable +ffffffff823b6470 T cardbus_matchbyid +ffffffff823b64e0 T decode_tuple +ffffffff823b7000 T cardbus_mapreg_map +ffffffff823b71a0 T cardbus_mapreg_unmap +ffffffff823b8000 T cardbus_read_exrom +ffffffff823b9000 T rbus_space_alloc +ffffffff823b9060 T rbus_space_alloc_subregion +ffffffff823b9230 T rbus_space_free +ffffffff823b92c0 T rbus_new_body +ffffffff823b9350 T rbus_new_root_delegate +ffffffff823b9420 T rbus_new_root_share +ffffffff823ba000 T com_cardbus_match +ffffffff823ba070 T com_cardbus_attach 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usl_attachtimeout +ffffffff8240d1c0 T usl_detachtimeout +ffffffff8240d230 T usl_sync_done +ffffffff8240d2b0 T usl_sync_check +ffffffff8240d370 T usl_sync_get +ffffffff8240d3c0 T usl_detachproc +ffffffff8240d450 T usl_detachack +ffffffff8240d4e0 T usl_attachproc +ffffffff8240d570 T usl_attachack +ffffffff8240d600 T wsdisplay_usl_ioctl1 +ffffffff8240d7b0 T wsdisplay_usl_ioctl2 +ffffffff8240e000 T filt_wseventdetach +ffffffff8240e050 T filt_wseventread +ffffffff8240e0b0 T wsevent_init +ffffffff8240e150 T wsevent_fini +ffffffff8240e1c0 T wsevent_read +ffffffff8240e360 T wsevent_kqfilter +ffffffff8240f000 T wskbd_match +ffffffff8240f050 T wskbd_attach +ffffffff8240f410 T wskbd_detach +ffffffff8240f660 T wskbd_activate +ffffffff8240f6a0 T wskbd_mux_open +ffffffff8240f770 T wskbd_mux_close +ffffffff8240f800 T wskbd_do_ioctl +ffffffff8240f870 T wskbd_displayioctl +ffffffff8240f890 T wskbd_set_display +ffffffff8240f9d0 T wskbd_update_layout +ffffffff8240fa10 T wskbddevprint +ffffffff8240fa60 T wskbd_kbd_backlight_task +ffffffff8240fb30 T wskbd_repeat +ffffffff8240fbd0 T wskbd_brightness_task +ffffffff8240fc40 T wskbd_set_keymap +ffffffff8240fcc0 T wskbd_cnattach +ffffffff8240fdb0 T wskbd_cngetc +ffffffff8240fec0 T wskbd_cnpollc +ffffffff8240ff20 T wskbd_cnbell +ffffffff8240ff70 T wskbd_cndetach +ffffffff82410010 T wskbd_deliver_event +ffffffff82410130 T wskbdopen +ffffffff82410210 T wskbd_input +ffffffff82410370 T wskbd_translate +ffffffff82410ab0 T wskbd_rawinput +ffffffff82410af0 T wskbd_enable +ffffffff82410b90 T wskbd_do_open +ffffffff82410c50 T wskbdclose +ffffffff82410d60 T wskbdread +ffffffff82410e20 T wskbdioctl +ffffffff82410ea0 T wskbd_do_ioctl_sc +ffffffff82410f80 T wskbd_displayioctl_sc +ffffffff824117b0 T wskbdkqfilter +ffffffff82411810 T wskbd_pickfree +ffffffff82411880 T wskbd_set_console_display +ffffffff824118d0 T wskbd_add_mux +ffffffff82411950 T update_leds +ffffffff82411a00 T update_modifier +ffffffff82411af0 T change_displayparam +ffffffff82411bb0 T internal_command +ffffffff82411f90 T wskbd_debugger +ffffffff82412000 T wskbd_compose_value +ffffffff824121a0 T ksym_upcase +ffffffff82412220 T fillmapentry +ffffffff824123b0 T wskbd_get_mapentry +ffffffff824125d0 T wskbd_init_keymap +ffffffff82412670 T wskbd_load_keymap +ffffffff82413000 T wsmouse_match +ffffffff82413030 T wsmouse_attach +ffffffff824130d0 T wsmouse_detach +ffffffff824132b0 T wsmouse_activate +ffffffff824132f0 T wsmouse_mux_open +ffffffff824134a0 T wsmouse_mux_close +ffffffff82413500 T wsmousedoioctl +ffffffff82413570 T wsmousedevprint +ffffffff824135c0 T wsmouseopen +ffffffff824136a0 T wsmouse_input_cleanup +ffffffff82413740 T wsmousedoopen +ffffffff824138f0 T wsmouseclose +ffffffff824139d0 T wsmouse_input_reset +ffffffff82413b10 T wsmouseread +ffffffff82413bd0 T wsmouseioctl +ffffffff82413c50 T wsmouse_do_ioctl +ffffffff82413df0 T wsmouse_param_ioctl +ffffffff82413f20 T wsmouse_set_params +ffffffff82414240 T wsmouse_get_params +ffffffff824144a0 T wsmousekqfilter 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wstpad_set_direction +ffffffff82417180 T wstpad_is_stable +ffffffff82417260 T wstpad_scroll_coords +ffffffff82417350 T wstpad_scroll +ffffffff824174e0 T wstpad_f2scroll +ffffffff82417790 T wstpad_edgescroll +ffffffff82417900 T wstpad_get_sbtn +ffffffff82417a80 T wstpad_mtbtn_contacts +ffffffff82417bb0 T wstpad_get_mtbtn +ffffffff82417c00 T wstpad_softbuttons +ffffffff82417cd0 T wstpad_is_tap +ffffffff82417d50 T wstpad_tap_filter +ffffffff82417df0 T wstpad_tap_touch +ffffffff82418020 T wstpad_tap_button +ffffffff82418070 T wstpad_tap +ffffffff824184a0 T wstpad_tap_sync +ffffffff82418500 T wstpad_tap_timeout +ffffffff82418730 T wstpad_click +ffffffff824187d0 T wstpad_cmds +ffffffff82418a40 T wstpad_mt_inputs +ffffffff82418db0 T wstpad_mt_masks +ffffffff82419130 T wstpad_touch_inputs +ffffffff82419340 T wstpad_process_input +ffffffff82419650 T wstpad_track_interval +ffffffff824197b0 T wstpad_init_deceleration +ffffffff82419880 T wstpad_decelerate +ffffffff824199f0 T wstpad_filter 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wsmux_set_display +ffffffff8241c790 T wsmux_get_layout +ffffffff8241c7c0 T wsmux_set_layout +ffffffff8241d000 T wsemul_pick +ffffffff8241d070 T wsemul_getname +ffffffff8241e000 T wsemul_getchar +ffffffff8241e1d0 T wsemul_local_translate +ffffffff8241e4b0 T wsemul_utf8_translate +ffffffff8241f000 T wsemul_vt100_cnattach +ffffffff8241f200 T wsemul_vt100_attach +ffffffff8241f4d0 T wsemul_vt100_output +ffffffff8241f7e0 T wsemul_vt100_detach +ffffffff8241f910 T wsemul_vt100_resetop +ffffffff8241fac0 T wsemul_vt100_output_esc +ffffffff82420140 T wsemul_vt100_output_csi +ffffffff82420280 T wsemul_vt100_output_scs94 +ffffffff82420340 T wsemul_vt100_output_scs94_percent +ffffffff82420390 T wsemul_vt100_output_scs96 +ffffffff824204e0 T wsemul_vt100_output_scs96_percent +ffffffff82420530 T wsemul_vt100_output_esc_hash +ffffffff82420860 T wsemul_vt100_output_esc_spc +ffffffff82420890 T wsemul_vt100_output_string +ffffffff82420900 T wsemul_vt100_output_string_esc +ffffffff82420950 T wsemul_vt100_output_dcs +ffffffff82420a00 T wsemul_vt100_output_dcs_dollar +ffffffff82420a60 T wsemul_vt100_output_esc_percent +ffffffff82420ac0 T wsemul_vt100_init +ffffffff82420b20 T wsemul_vt100_reset +ffffffff82420c40 T wsemul_vt100_nextline +ffffffff82420cd0 T wsemul_vt100_output_normal +ffffffff82420f10 T wsemul_vt100_output_c0c1 +ffffffff82421190 T wsemul_vt100_jump_scroll +ffffffff82422000 T wsemul_vt100_scrollup +ffffffff82422150 T wsemul_vt100_scrolldown +ffffffff82422290 T wsemul_vt100_ed +ffffffff824224f0 T wsemul_vt100_el +ffffffff824225e0 T wsemul_vt100_handle_csi +ffffffff82423570 T vt100_ansimode +ffffffff824235f0 T vt100_decmode +ffffffff82423720 T vt100_selectattribute +ffffffff82423860 T wsemul_vt100_handle_dcs +ffffffff82424000 T vt100_initchartables +ffffffff82424120 T vt100_setnrc +ffffffff82425000 T wsemul_vt100_translate +ffffffff82426000 T pckbdprobe +ffffffff82426140 T pckbdattach +ffffffff82426320 T pckbdactivate +ffffffff824263b0 T pckbd_enable +ffffffff82426500 T pckbd_set_leds +ffffffff82426590 T pckbd_ioctl +ffffffff824266e0 T pckbd_cngetc +ffffffff824268c0 T pckbd_cnpollc +ffffffff82426960 T pckbd_cnbell +ffffffff824269b0 T pckbd_set_xtscancode +ffffffff82426b30 T pckbd_init +ffffffff82426b90 T pckbd_input +ffffffff82426e00 T pckbd_scancode_translate +ffffffff82426ee0 T pckbd_bell +ffffffff82426f30 T pckbd_hookup_bell +ffffffff82426f70 T pckbd_cnattach +ffffffff82428000 T pmsprobe +ffffffff824280b0 T pmsattach +ffffffff82428290 T pmsactivate +ffffffff824282f0 T pms_enable +ffffffff82428360 T pms_ioctl +ffffffff824283b0 T pms_disable +ffffffff824283f0 T pms_sec_enable +ffffffff82428460 T pms_sec_ioctl +ffffffff824284b0 T pms_sec_disable +ffffffff824284f0 T pms_ioctl_mouse +ffffffff82428610 T pms_sync_mouse +ffffffff82428670 T pms_proc_mouse +ffffffff82428710 T pms_enable_synaptics +ffffffff82428b40 T pms_ioctl_synaptics +ffffffff82428c10 T pms_sync_synaptics +ffffffff82428c70 T pms_proc_synaptics +ffffffff82428ff0 T pms_disable_synaptics +ffffffff824290d0 T pms_enable_alps +ffffffff824295f0 T pms_ioctl_alps +ffffffff824296a0 T pms_sync_alps +ffffffff82429750 T pms_proc_alps +ffffffff824299a0 T pms_enable_elantech_v1 +ffffffff82429bb0 T pms_ioctl_elantech +ffffffff82429c70 T pms_sync_elantech_v1 +ffffffff82429d50 T pms_proc_elantech_v1 +ffffffff82429ec0 T pms_enable_elantech_v2 +ffffffff8242a060 T pms_sync_elantech_v2 +ffffffff8242a150 T pms_proc_elantech_v2 +ffffffff8242a2c0 T pms_enable_elantech_v3 +ffffffff8242a460 T pms_sync_elantech_v3 +ffffffff8242a4f0 T pms_proc_elantech_v3 +ffffffff8242a6e0 T pms_enable_elantech_v4 +ffffffff8242a8e0 T pms_sync_elantech_v4 +ffffffff8242a9b0 T pms_proc_elantech_v4 +ffffffff8242ad00 T pms_enable_intelli +ffffffff8242aef0 T pms_cmd +ffffffff8242af60 T pms_spec_cmd +ffffffff8242b1f0 T pms_set_scaling +ffffffff8242b280 T pms_set_resolution +ffffffff8242b310 T pms_get_devid +ffffffff8242b3a0 T pms_get_status +ffffffff8242b430 T pms_set_rate +ffffffff8242b4c0 T pms_reset +ffffffff8242b550 T pms_dev_enable +ffffffff8242b610 T pms_dev_disable +ffffffff8242b6d0 T pms_protocol_lookup +ffffffff8242b7d0 T pms_reset_detect +ffffffff8242b850 T pms_reset_timo +ffffffff8242b8a0 T pms_reset_task +ffffffff8242b960 T pms_change_state +ffffffff8242bcf0 T pmsinput +ffffffff8242be90 T synaptics_set_mode +ffffffff8242bf90 T synaptics_query +ffffffff8242c080 T synaptics_get_hwinfo +ffffffff8242c560 T synaptics_sec_proc +ffffffff8242c630 T synaptics_knock +ffffffff8242c890 T alps_sec_proc +ffffffff8242c9b0 T alps_get_hwinfo +ffffffff8242ce20 T elantech_set_absolute_mode_v1 +ffffffff8242d0e0 T elantech_set_absolute_mode_v2 +ffffffff8242d600 T elantech_ps2_cmd +ffffffff8242d690 T elantech_set_absolute_mode_v3 +ffffffff8242db00 T elantech_set_absolute_mode_v4 +ffffffff8242dd30 T elantech_get_hwinfo_v1 +ffffffff8242df30 T elantech_get_hwinfo_v2 +ffffffff8242e240 T elantech_get_hwinfo_v3 +ffffffff8242e450 T elantech_get_hwinfo_v4 +ffffffff8242e6c0 T elantech_knock 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T hidkbd_cngetc +ffffffff82436520 T hidkbd_hookup_bell +ffffffff82437000 T hidms_stylus_hid_parse +ffffffff82437320 T hidms_pad_buttons_hid_parse +ffffffff82437400 T hidms_wacom_setup +ffffffff82437710 T hidms_setup +ffffffff82437cb0 T hidms_attach +ffffffff82437e00 T hidms_detach +ffffffff82437e40 T hidms_input +ffffffff824380f0 T hidms_enable +ffffffff82438140 T hidms_ioctl +ffffffff82438310 T hidms_disable +ffffffff82439000 T hidmt_get_resolution +ffffffff82439110 T hidmt_setup +ffffffff824397b0 T hidmt_set_input_mode +ffffffff82439840 T hidmt_configure +ffffffff824398e0 T hidmt_attach +ffffffff824399f0 T hidmt_detach +ffffffff82439a30 T hidmt_input +ffffffff82439f10 T hidmt_enable +ffffffff82439f50 T hidmt_ioctl +ffffffff8243a020 T hidmt_disable +ffffffff8243b000 T hidcc_match +ffffffff8243b0e0 T hidcc_attach +ffffffff8243b280 T hidcc_parse +ffffffff8243b640 T hidcc_attach_wskbd +ffffffff8243b6f0 T hidcc_detach +ffffffff8243b7a0 T hidcc_intr +ffffffff8243bab0 T hidcc_intr_slice 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otus_led_newstate_type2 +ffffffff82523000 T umb_match +ffffffff825230d0 T umb_attach +ffffffff82523900 T umb_detach +ffffffff82523aa0 T umb_state_task +ffffffff82523c40 T umb_get_response_task +ffffffff82523d50 T umb_statechg_timeout +ffffffff82523dc0 T umb_intr +ffffffff82523eb0 T umb_ncm_setup +ffffffff82524070 T umb_ncm_setup_format +ffffffff82524140 T umb_ioctl +ffffffff82524470 T umb_start +ffffffff825246e0 T umb_rtrequest +ffffffff825249d0 T umb_watchdog +ffffffff82524a50 T umb_output +ffffffff82524ab0 T umb_kstat_attach +ffffffff82524be0 T umb_open +ffffffff82524c40 T umb_down +ffffffff82524ed0 T umb_close +ffffffff82524f30 T umb_kstat_detach +ffffffff82524fc0 T umb_alloc_xfers +ffffffff82525080 T umb_free_xfers +ffffffff82525100 T umb_alloc_bulkpipes +ffffffff82525200 T umb_rx +ffffffff82525260 T umb_close_bulkpipes +ffffffff825252f0 T umb_setpin +ffffffff825255d0 T umb_setdataclass +ffffffff825256a0 T umb_encap +ffffffff82525c40 T umb_send_inet_proposal +ffffffff82525e60 T umb_newstate +ffffffff82525fd0 T umb_cmd +ffffffff825260c0 T umb_up +ffffffff82526640 T umb_allocate_cid +ffffffff825266f0 T umb_radio +ffffffff82526790 T umb_send_fcc_auth +ffffffff82526900 T umb_packet_service +ffffffff825269a0 T umb_connect +ffffffff82526a20 T umb_qry_ipconfig +ffffffff82526af0 T umb_clear_addr +ffffffff82526de0 T umb_disconnect +ffffffff82526e30 T umb_get_encap_response +ffffffff82526ed0 T umb_decode_response +ffffffff82526f90 T umb_handle_indicate_status_msg +ffffffff82527030 T umb_handle_opendone_msg +ffffffff82527280 T umb_handle_closedone_msg +ffffffff825272c0 T umb_command_done +ffffffff825275c0 T umb_decode_cid +ffffffff825278d0 T umb_decode_register_state +ffffffff82527b60 T umb_decode_devices_caps +ffffffff82527d40 T umb_decode_subscriber_status +ffffffff82527fe0 T umb_decode_radio_state +ffffffff825280c0 T umb_decode_pin +ffffffff82528200 T umb_decode_packet_service +ffffffff825285f0 T umb_decode_signal_state +ffffffff82528770 T umb_decode_connect_info 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uath_ioctl +ffffffff8252cce0 T uath_start +ffffffff8252ce90 T uath_watchdog +ffffffff8252cf20 T uath_newstate +ffffffff8252cfc0 T uath_media_change +ffffffff8252d020 T uath_close_pipes +ffffffff8252d0d0 T uath_free_tx_data_list +ffffffff8252d1f0 T uath_free_rx_cmd_list +ffffffff8252d240 T uath_free_tx_cmd_list +ffffffff8252d360 T uath_free_rx_data_list +ffffffff8252d3d0 T uath_init +ffffffff8252d9b0 T uath_cmd_write +ffffffff8252d9d0 T uath_set_led +ffffffff8252da30 T uath_switch_channel +ffffffff8252dc10 T uath_set_rates +ffffffff8252dcb0 T uath_cmd +ffffffff8252dec0 T uath_cmd_read +ffffffff8252dee0 T uath_write_reg +ffffffff8252df80 T uath_write_multi +ffffffff8252e040 T uath_read_reg +ffffffff8252e0e0 T uath_read_eeprom +ffffffff8252e1a0 T uath_data_rxeof +ffffffff8252e4c0 T uath_tx_null +ffffffff8252e600 T uath_data_txeof +ffffffff8252e700 T uath_tx_data +ffffffff8252e9b0 T uath_stop +ffffffff8252eae0 T uath_reset_tx_queues +ffffffff8252ebb0 T uath_wme_init +ffffffff8252eca0 T uath_set_chan +ffffffff8252ed20 T uath_set_key +ffffffff8252eee0 T uath_set_keys +ffffffff8252f170 T uath_set_rxfilter +ffffffff82530000 T athn_usb_match +ffffffff82530070 T athn_usb_attach +ffffffff825301b0 T athn_usb_detach +ffffffff82530260 T athn_usb_read +ffffffff82530300 T athn_usb_write +ffffffff82530390 T athn_usb_write_barrier +ffffffff825303f0 T athn_usb_task +ffffffff825304b0 T athn_usb_open_pipes +ffffffff82530660 T athn_usb_alloc_tx_cmd +ffffffff82530700 T athn_usb_attachhook +ffffffff825308c0 T athn_usb_wait_async +ffffffff825308f0 T athn_usb_close_pipes +ffffffff825309c0 T athn_usb_free_tx_cmd +ffffffff82530a10 T athn_usb_free_tx_list +ffffffff82530b40 T athn_usb_free_rx_list +ffffffff82530b90 T athn_usb_load_firmware +ffffffff82530d80 T athn_usb_htc_setup +ffffffff82531030 T athn_usb_ioctl +ffffffff825311e0 T athn_usb_start +ffffffff82531360 T athn_usb_watchdog +ffffffff825313f0 T athn_usb_node_alloc +ffffffff82531410 T athn_usb_newauth +ffffffff825315c0 T athn_usb_newassoc +ffffffff825316f0 T athn_usb_node_free +ffffffff825317f0 T athn_usb_updateslot +ffffffff82531820 T athn_usb_updateedca +ffffffff825318e0 T athn_usb_set_key +ffffffff82531a20 T athn_usb_delete_key +ffffffff82531b70 T athn_usb_newstate +ffffffff82531c70 T athn_usb_media_change +ffffffff82531d00 T athn_usb_next_scan +ffffffff82531da0 T athn_usb_rx_enable +ffffffff82531e10 T athn_usb_intr +ffffffff82531fa0 T athn_usb_alloc_rx_list +ffffffff82532050 T athn_usb_alloc_tx_list +ffffffff82532150 T athn_usb_do_async +ffffffff82532270 T athn_usb_htc_msg +ffffffff82532300 T athn_usb_htc_connect_svc +ffffffff825324d0 T athn_usb_wmi_xcmd +ffffffff82532700 T athn_usb_read_rom +ffffffff82532860 T athn_usb_stop +ffffffff82532b70 T athn_usb_init +ffffffff82532fc0 T athn_usb_newstate_cb +ffffffff825332c0 T athn_usb_remove_node +ffffffff825333c0 T athn_usb_switch_chan +ffffffff82533580 T athn_usb_create_node +ffffffff825337e0 T athn_usb_newassoc_cb +ffffffff82533960 T athn_usb_node_set_rates +ffffffff82533aa0 T athn_usb_count_active_sta +ffffffff82533af0 T athn_usb_newauth_cb +ffffffff82533bd0 T athn_usb_node_free_cb +ffffffff82533c90 T athn_usb_ampdu_tx_start +ffffffff82533da0 T athn_usb_ampdu_tx_start_cb +ffffffff82533e00 T athn_usb_ampdu_tx_stop +ffffffff82533ee0 T athn_usb_ampdu_tx_stop_cb +ffffffff82533f40 T athn_usb_clean_nodes +ffffffff82534000 T athn_usb_updateedca_cb +ffffffff82534040 T athn_usb_updateslot_cb +ffffffff82534080 T athn_usb_set_key_cb +ffffffff82534140 T athn_usb_delete_key_cb +ffffffff825341a0 T athn_usb_bcneof +ffffffff82534200 T athn_usb_swba +ffffffff82534360 T athn_usb_tx_status +ffffffff825343d0 T athn_usb_rx_wmi_ctrl +ffffffff825345f0 T athn_usb_rx_radiotap +ffffffff825347e0 T athn_usb_rx_frame +ffffffff82534a50 T athn_usb_rxeof +ffffffff82534d70 T athn_usb_txeof +ffffffff82534e30 T athn_usb_tx +ffffffff82536000 T uow_match +ffffffff82536070 T uow_attach +ffffffff82536510 T uow_detach +ffffffff825365e0 T uow_activate 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upd_sensor_invalidate +ffffffff82538c80 T upd_sensor_update +ffffffff82539000 T uwacom_match +ffffffff825390e0 T uwacom_attach +ffffffff82539300 T uwacom_detach +ffffffff82539320 T uwacom_enable +ffffffff82539390 T uwacom_ioctl +ffffffff82539440 T uwacom_disable +ffffffff82539470 T uwacom_intr_legacy +ffffffff82539620 T uwacom_intr +ffffffff8253a000 T bwfm_usb_preinit +ffffffff8253a4b0 T bwfm_usb_txcheck +ffffffff8253a4f0 T bwfm_usb_txdata +ffffffff8253a630 T bwfm_usb_txctl +ffffffff8253a7f0 T bwfm_usb_match +ffffffff8253a860 T bwfm_usb_attach +ffffffff8253a9f0 T bwfm_usb_detach +ffffffff8253aad0 T bwfm_usb_dl_cmd +ffffffff8253ab70 T bwfm_usb_load_microcode +ffffffff8253ae60 T bwfm_usb_alloc_rx_list +ffffffff8253af50 T bwfm_usb_alloc_tx_list +ffffffff8253b080 T bwfm_usb_rxeof +ffffffff8253b230 T bwfm_usb_free_rx_list +ffffffff8253b2b0 T bwfm_usb_free_tx_list +ffffffff8253b330 T bwfm_usb_newbuf +ffffffff8253b3b0 T bwfm_usb_txeof +ffffffff8253b4c0 T bwfm_usb_txctl_cb +ffffffff8253c000 T umstc_match +ffffffff8253c0b0 T umstc_attach +ffffffff8253c1b0 T umstc_detach +ffffffff8253c200 T umstc_intr +ffffffff8253c350 T umstc_brightness_task +ffffffff8253d000 T uhidpp_match +ffffffff8253d0e0 T uhidpp_attach +ffffffff8253d450 T uhidpp_detach +ffffffff8253d690 T uhidpp_intr +ffffffff8253d8a0 T uhidpp_task +ffffffff8253d930 T hidpp10_get_type +ffffffff8253da30 T hidpp10_get_name +ffffffff8253db30 T hidpp10_enable_notifications +ffffffff8253dba0 T uhidpp_is_notification +ffffffff8253dc30 T uhidpp_claim_notification +ffffffff8253dd50 T uhidpp_refresh +ffffffff8253de20 T uhidpp_device_refresh +ffffffff8253ded0 T uhidpp_consume_notification +ffffffff8253e020 T uhidpp_device_connect +ffffffff8253e310 T uhidpp_sleep +ffffffff8253e340 T hidpp_get_protocol_version +ffffffff8253e410 T uhidpp_device_features +ffffffff8253e600 T hidpp20_battery_get_capability +ffffffff8253e6c0 T hidpp20_unified_battery_get_capabilities +ffffffff8253e7b0 T hidpp20_battery_get_level_status +ffffffff8253e8e0 T hidpp20_unified_battery_get_status +ffffffff8253ea00 T hidpp20_root_get_feature +ffffffff8253eac0 T hidpp20_feature_get_count +ffffffff8253eb60 T hidpp20_feature_get_id +ffffffff8253ec10 T hidpp_send_fap_report +ffffffff8253ecf0 T hidpp_send_rap_report +ffffffff8253edb0 T hidpp20_battery_status_is_charging +ffffffff8253edf0 T hidpp20_unified_battery_status_is_charging +ffffffff8253ee30 T hidpp_send_validate +ffffffff8253ee80 T hidpp_send_report +ffffffff82540000 T ucc_match +ffffffff825400a0 T ucc_attach +ffffffff825401b0 T ucc_detach +ffffffff82540210 T ucc_intr +ffffffff82540250 T ucc_enable +ffffffff82541000 T iic_match +ffffffff82541050 T iic_attach +ffffffff825410c0 T iicbus_print +ffffffff82541110 T iic_print +ffffffff82541180 T iic_search +ffffffff82541250 T iic_is_compatible +ffffffff82542000 T iic_exec +ffffffff825422c0 T iic_smbus_write_byte +ffffffff825423c0 T iic_smbus_read_byte +ffffffff825424f0 T iic_smbus_receive_byte +ffffffff82543000 T iicprobeinit +ffffffff82543040 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maxtmp_refresh +ffffffff8254f350 T maxtmp_readport +ffffffff82550000 T adc_match +ffffffff82550070 T adc_attach +ffffffff82550310 T adc_refresh +ffffffff82551000 T admtemp_match +ffffffff82551110 T admtemp_attach +ffffffff82551410 T admtemp_refresh +ffffffff82552000 T admlc_match +ffffffff82552050 T admlc_attach +ffffffff825523f0 T admlc_refresh +ffffffff82553000 T admtm_match +ffffffff82553090 T admtm_attach +ffffffff82553410 T admtm_refresh +ffffffff82554000 T admtmp_match +ffffffff82554050 T admtmp_attach +ffffffff825541c0 T admtmp_refresh +ffffffff82555000 T admtt_match +ffffffff82555050 T admtt_attach +ffffffff82555200 T admtt_refresh +ffffffff82556000 T maxds_match +ffffffff82556090 T maxds_attach +ffffffff82556290 T maxds_refresh +ffffffff82557000 T adt_match +ffffffff82557140 T adt_attach +ffffffff825576b0 T adt_refresh +ffffffff82558000 T lm_i2c_match +ffffffff82558110 T lm_i2c_attach +ffffffff82558210 T lm_i2c_writereg +ffffffff825582c0 T lm_i2c_readreg +ffffffff82559000 T admcts_match +ffffffff82559050 T admcts_attach +ffffffff825595c0 T admcts_refresh +ffffffff8255a000 T wbng_match +ffffffff8255a050 T wbng_attach +ffffffff8255a600 T wbng_refresh +ffffffff8255a730 T wbng_readreg +ffffffff8255a7a0 T wbng_writereg +ffffffff8255a800 T wbng_refresh_volts +ffffffff8255ab20 T wbng_refresh_temps +ffffffff8255ad20 T wbng_refresh_fans +ffffffff8255b000 T nvt_match +ffffffff8255b050 T nvt_attach +ffffffff8255b3e0 T nvt_readreg +ffffffff8255b450 T nvt_refresh +ffffffff8255b580 T nvt_writereg +ffffffff8255b5e0 T nvt_refresh_volts +ffffffff8255b720 T nvt_refresh_temps +ffffffff8255b870 T nvt_refresh_fans +ffffffff8255c000 T adl_match +ffffffff8255c050 T adl_attach +ffffffff8255c1f0 T adl_refresh +ffffffff8255d000 T andl_match +ffffffff8255d050 T andl_attach +ffffffff8255d340 T andl_refresh +ffffffff8255d3c0 T andl_refresh_temps +ffffffff8255d500 T andl_refresh_volts +ffffffff8255d6c0 T andl_refresh_tachs +ffffffff8255d7e0 T andl_readreg +ffffffff8255d850 T andl_writereg +ffffffff8255e000 T spdmem_iic_match +ffffffff8255e0a0 T spdmem_iic_attach +ffffffff8255e0f0 T spdmem_iic_read +ffffffff8255f000 T sdtemp_match +ffffffff8255f290 T sdtemp_attach +ffffffff8255f340 T sdtemp_refresh +ffffffff82560000 T lisa_match +ffffffff82560050 T lisa_attach +ffffffff82560180 T lisa_refresh +ffffffff825602a0 T lisa_readreg +ffffffff82560310 T lisa_writereg +ffffffff82561000 T ihidev_match +ffffffff82561050 T ihidev_attach +ffffffff82561550 T ihidev_detach +ffffffff825615f0 T ihidev_activate +ffffffff82561730 T ihidev_hid_command +ffffffff82561b10 T ihidev_hid_desc_parse +ffffffff82561d20 T ihidev_intr +ffffffff82562050 T ihidev_maxrepid +ffffffff82562100 T ihidev_submatch +ffffffff82562150 T ihidev_print +ffffffff825621b0 T ihidev_reset +ffffffff825623d0 T ihidev_sleep +ffffffff82562460 T ihidev_poll +ffffffff825624b0 T ihidev_open +ffffffff82562580 T ihidev_close +ffffffff82562680 T ihidev_ioctl +ffffffff825626b0 T ihidev_get_report_desc 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thinkpad_battery_setchargestop +ffffffff825a2140 T thinkpad_battery_setchargemode +ffffffff825a2710 T thinkpad_hotkey +ffffffff825a2d40 T thinkpad_brightness_up +ffffffff825a2ee0 T thinkpad_brightness_down +ffffffff825a3090 T thinkpad_toggle_bluetooth +ffffffff825a31b0 T thinkpad_volume_mute +ffffffff825a3260 T thinkpad_volume_down +ffffffff825a3310 T thinkpad_volume_up +ffffffff825a33c0 T thinkpad_get_thinklight +ffffffff825a3410 T thinkpad_adaptive_change +ffffffff825a3530 T thinkpad_get_brightness +ffffffff825a3570 T thinkpad_toggle_wan +ffffffff825a3690 T thinkpad_cmos +ffffffff825a3740 T thinkpad_set_brightness +ffffffff825a3830 T thinkpad_set_thinklight +ffffffff825a38f0 T thinkpad_battery_inhibit_charge +ffffffff825a3a20 T thinkpad_battery_force_discharge +ffffffff825a4000 T toshiba_match +ffffffff825a40a0 T toshiba_attach +ffffffff825a4180 T get_param_brightness +ffffffff825a41e0 T acpitoshiba_get_param +ffffffff825a4240 T set_param_brightness +ffffffff825a42d0 T toshiba_update_brightness +ffffffff825a43d0 T acpitoshiba_set_param +ffffffff825a4470 T toshiba_set_brightness +ffffffff825a4590 T toshiba_enable_events +ffffffff825a4620 T toshiba_read_events +ffffffff825a4780 T toshiba_hotkey +ffffffff825a49b0 T toshiba_get_brightness +ffffffff825a4b20 T toshiba_fn_key_brightness_up +ffffffff825a4c70 T toshiba_fn_key_brightness_down +ffffffff825a4dc0 T toshiba_fn_key_video_output +ffffffff825a4f10 T toshiba_get_video_output +ffffffff825a5080 T toshiba_set_video_output +ffffffff825a6000 T acpisony_match +ffffffff825a6070 T acpisony_attach +ffffffff825a60e0 T acpisony_activate +ffffffff825a6120 T acpisony_notify_setup +ffffffff825a6310 T acpisony_notify +ffffffff825a66b0 T acpisony_find_offset +ffffffff825a67c0 T acpisony_set_hotkey +ffffffff825a69b0 T acpisony_brightness_down +ffffffff825a6ac0 T acpisony_get_brightness +ffffffff825a6b40 T acpisony_set_brightness +ffffffff825a7000 T acpivideo_match +ffffffff825a7070 T acpivideo_attach +ffffffff825a71d0 T acpivideo_getpcibus +ffffffff825a7210 T acpivideo_notify +ffffffff825a7270 T acpivideo_set_policy +ffffffff825a7340 T acpi_foundvout +ffffffff825a7410 T acpivideo_print +ffffffff825a8000 T acpivout_match +ffffffff825a8070 T acpivout_attach +ffffffff825a81c0 T acpivout_notify +ffffffff825a8270 T acpivout_get_bcl +ffffffff825a8390 T acpivout_get_brightness +ffffffff825a8430 T acpivout_get_param +ffffffff825a84d0 T acpivout_set_param +ffffffff825a8630 T acpivout_select_brightness +ffffffff825a8700 T acpivout_find_brightness +ffffffff825a8790 T acpivout_set_brightness +ffffffff825a9000 T acpipwrres_match +ffffffff825a9070 T acpipwrres_attach +ffffffff825a92b0 T acpipwrres_foundcons +ffffffff825a9440 T acpipwrres_ref_incr +ffffffff825a94d0 T acpipwrres_hascons +ffffffff825a9520 T acpipwrres_ref_decr +ffffffff825a95b0 T acpipwrres_addcons +ffffffff825aa000 T aibs_match +ffffffff825aa030 T aibs_attach +ffffffff825aa140 T aibs_probe +ffffffff825aa2a0 T aibs_attach_new +ffffffff825aa3c0 T aibs_attach_sif +ffffffff825aa590 T aibs_notify +ffffffff825aa600 T aibs_add_sensor +ffffffff825aa850 T aibs_getpack +ffffffff825aa8d0 T aibs_refresh +ffffffff825aa930 T aibs_refresh_r +ffffffff825aaa70 T aibs_getvalue +ffffffff825aabc0 T aibs_find_cb +ffffffff825ab000 T aplgpio_match +ffffffff825ab060 T aplgpio_attach +ffffffff825ab310 T aplgpio_intr +ffffffff825ab460 T aplgpio_read_pin +ffffffff825ab4b0 T aplgpio_write_pin +ffffffff825ab520 T aplgpio_intr_establish +ffffffff825ab640 T aplgpio_intr_enable +ffffffff825ab6d0 T aplgpio_intr_disable +ffffffff825ac000 T bytgpio_match +ffffffff825ac060 T bytgpio_attach +ffffffff825ac320 T bytgpio_intr +ffffffff825ac450 T bytgpio_read_pin +ffffffff825ac4b0 T bytgpio_write_pin +ffffffff825ac530 T bytgpio_intr_establish +ffffffff825ac5a0 T bytgpio_intr_enable +ffffffff825ac690 T bytgpio_intr_disable +ffffffff825ad000 T chvgpio_match +ffffffff825ad060 T chvgpio_attach +ffffffff825ad300 T chvgpio_intr +ffffffff825ad3d0 T chvgpio_read_pin +ffffffff825ad480 T chvgpio_write_pin +ffffffff825ad540 T chvgpio_intr_establish +ffffffff825ad710 T chvgpio_intr_enable +ffffffff825ad7e0 T chvgpio_intr_disable +ffffffff825ad8b0 T chvgpio_opreg_handler +ffffffff825ad930 T chvgpio_check_pin +ffffffff825ae000 T glkgpio_match +ffffffff825ae060 T glkgpio_attach +ffffffff825ae310 T glkgpio_intr +ffffffff825ae460 T glkgpio_read_pin +ffffffff825ae4c0 T glkgpio_write_pin +ffffffff825ae530 T glkgpio_intr_establish +ffffffff825ae650 T glkgpio_intr_enable +ffffffff825ae6e0 T glkgpio_intr_disable +ffffffff825af000 T pchgpio_match +ffffffff825af060 T pchgpio_attach +ffffffff825af530 T pchgpio_activate +ffffffff825af5e0 T pchgpio_intr +ffffffff825af800 T pchgpio_read_pin +ffffffff825af8f0 T pchgpio_write_pin +ffffffff825afa00 T pchgpio_intr_establish +ffffffff825afc20 T pchgpio_intr_enable +ffffffff825afd50 T pchgpio_intr_disable +ffffffff825afe80 T pchgpio_save +ffffffff825afef0 T pchgpio_restore +ffffffff825aff60 T pchgpio_find_group +ffffffff825affe0 T pchgpio_intr_handle +ffffffff825b00c0 T pchgpio_save_pin +ffffffff825b0280 T pchgpio_restore_pin +ffffffff825b1000 T tipmic_match +ffffffff825b1050 T tipmic_attach +ffffffff825b1250 T tipmic_write_1 +ffffffff825b1310 T tipmic_intr +ffffffff825b1470 T tipmic_get_lpat +ffffffff825b1580 T tipmic_read_pin +ffffffff825b15b0 T tipmic_write_pin +ffffffff825b15e0 T tipmic_thermal_opreg_handler +ffffffff825b1e60 T tipmic_power_opreg_handler +ffffffff825b2100 T tipmic_read_1 +ffffffff825b21d0 T tipmic_raw_to_temp +ffffffff825b3000 T ccpmic_match +ffffffff825b3050 T ccpmic_attach +ffffffff825b3130 T ccpmic_get_lpat +ffffffff825b3240 T ccpmic_read_pin +ffffffff825b33c0 T ccpmic_write_pin +ffffffff825b3520 T ccpmic_thermal_opreg_handler +ffffffff825b3770 T ccpmic_power_opreg_handler +ffffffff825b3960 T ccpmic_read_1 +ffffffff825b3a30 T ccpmic_write_1 +ffffffff825b3af0 T ccpmic_raw_to_temp +ffffffff825b4000 T com_acpi_match +ffffffff825b4120 T com_acpi_attach +ffffffff825b43a0 T com_acpi_is_designware +ffffffff825b4400 T com_acpi_intr_designware +ffffffff825b4430 T com_acpi_is_console +ffffffff825b5000 T sdhc_acpi_match +ffffffff825b5060 T sdhc_acpi_attach +ffffffff825b5370 T sdhc_acpi_parse_resources +ffffffff825b5420 T sdhc_acpi_card_detect_gpio +ffffffff825b5480 T sdhc_acpi_card_detect_intr +ffffffff825b54c0 T sdhc_acpi_power_on +ffffffff825b5540 T sdhc_acpi_explore +ffffffff825b5570 T sdhc_acpi_card_detect_nonremovable +ffffffff825b55a0 T sdhc_acpi_do_explore +ffffffff825b6000 T dwiic_acpi_match +ffffffff825b6050 T dwiic_acpi_attach +ffffffff825b6410 T dwiic_acpi_parse_crs +ffffffff825b6560 T dwiic_acpi_power +ffffffff825b6670 T dwiic_acpi_get_params +ffffffff825b67b0 T dwiic_i2c_intr_establish +ffffffff825b6830 T dwiic_i2c_intr_disestablish +ffffffff825b6850 T dwiic_i2c_intr_string +ffffffff825b68e0 T dwiic_acpi_acquire_bus +ffffffff825b6930 T dwiic_acpi_release_bus +ffffffff825b6960 T dwiic_acpi_bus_scan +ffffffff825b69a0 T dwiic_acpi_found_hid +ffffffff825b6d00 T dwiic_matchhids +ffffffff825b6d90 T dwiic_acpi_found_ihidev +ffffffff825b7000 T dwiic_acpi_found_iatp +ffffffff825b7160 T dwiic_acpi_found_ietp +ffffffff825b8000 T acpicbkbd_match +ffffffff825b8030 T acpicbkbd_attach +ffffffff825b80d0 T acpicbkbd_activate +ffffffff825b8120 T acpicbkbd_get_backlight +ffffffff825b81a0 T acpicbkbd_set_backlight +ffffffff825b8240 T acpicbkbd_write_backlight +ffffffff825b9000 T acpials_match +ffffffff825b9090 T acpials_attach +ffffffff825b9230 T acpials_read +ffffffff825b92b0 T acpials_addtask +ffffffff825b92f0 T acpials_notify +ffffffff825b9380 T acpials_update +ffffffff825ba000 T tpm_match +ffffffff825ba050 T tpm_attach +ffffffff825ba320 T tpm_activate +ffffffff825ba430 T tpm2_start_method +ffffffff825ba4b0 T tpm_probe +ffffffff825ba560 T tpm_init_tis +ffffffff825ba7d0 T tpm_init_crb +ffffffff825bab10 T tpm_suspend +ffffffff825bac00 T tpm_resume +ffffffff825bac30 T tpm_write_tis +ffffffff825bafc0 T tpm_read_tis +ffffffff825bb190 T tpm_write_crb +ffffffff825bb570 T tpm_read_crb +ffffffff825bb870 T tpm_request_locality_tis +ffffffff825bb960 T tpm_request_locality_crb +ffffffff825bba60 T tpm_release_locality_crb +ffffffff825bbab0 T tpm_release_locality_tis +ffffffff825bbb20 T tpm_getburst +ffffffff825bbbd0 T tpm_status +ffffffff825bbbf0 T tpm_waitfor +ffffffff825bbcd0 T tpm_waitfor_status +ffffffff825bc000 T acpihve_match +ffffffff825bc0b0 T acpihve_attach +ffffffff825bd000 T acpisbs_match +ffffffff825bd030 T acpisbs_attach +ffffffff825bd2b0 T acpisbs_activate +ffffffff825bd390 T acpisbs_read +ffffffff825bd450 T acpisbs_setup_sensors +ffffffff825bd550 T acpisbs_refresh_sensors +ffffffff825bd6a0 T acpisbs_notify +ffffffff825bd7e0 T acpi_smbus_read +ffffffff825be000 T surface_match +ffffffff825be060 T surface_attach +ffffffff825be0c0 T surface_hotkey +ffffffff825bf000 T ipmi_acpi_match +ffffffff825bf030 T ipmi_acpi_attach +ffffffff825bf260 T ipmi_acpi_parse_crs +ffffffff825c0000 T amdgpio_match +ffffffff825c0060 T amdgpio_attach +ffffffff825c02a0 T amdgpio_activate +ffffffff825c0390 T amdgpio_intr +ffffffff825c0530 T amdgpio_read_pin +ffffffff825c0580 T amdgpio_write_pin +ffffffff825c05f0 T amdgpio_intr_establish +ffffffff825c06e0 T amdgpio_intr_enable +ffffffff825c0760 T amdgpio_intr_disable +ffffffff825c07e0 T amdgpio_save +ffffffff825c0860 T amdgpio_restore +ffffffff825c08f0 T amdgpio_save_pin +ffffffff825c0960 T amdgpio_restore_pin +ffffffff825c09d0 T amdgpio_pin_intr +ffffffff825c1000 T acpihid_match +ffffffff825c1030 T acpihid_attach +ffffffff825c1210 T acpihid_init_dsm +ffffffff825c1370 T acpihid_eval +ffffffff825c1590 T acpihid_notify +ffffffff825c15f0 T acpihid_button_array_enable +ffffffff825c2000 t iosf_acpi_match +ffffffff825c2050 t iosf_acpi_attach +ffffffff825c2150 t iosf_acpi_mbi_mdr_rd +ffffffff825c21c0 t iosf_acpi_mbi_mdr_wr +ffffffff825c3000 T acpi_match +ffffffff825c3060 T acpi_attach +ffffffff825c30a0 T acpi_probe +ffffffff825c3240 T acpi_map +ffffffff825c3330 T acpi_unmap +ffffffff825c3380 T acpi_bus_space_map +ffffffff825c33a0 T acpi_bus_space_unmap +ffffffff825c33c0 T acpi_intr_establish +ffffffff825c3500 T acpi_intr_disestablish +ffffffff825c3510 T acpi_scan +ffffffff825c36b0 T acpi_acquire_glk +ffffffff825c3710 T acpi_release_glk +ffffffff825c3760 T acpi_attach_machdep +ffffffff825c38f0 T acpi_sleep_cpu +ffffffff825c3a90 T acpi_resume_cpu +ffffffff825c3b90 T sleep_mp +ffffffff825c3c80 T resume_mp +ffffffff825c3d70 T acpi_iommu_device_map +ffffffff825c4000 T hibernate_resume_machdep +ffffffff825c4050 T hibernate_drop_to_real_mode +ffffffff825c4060 T hibernate_activate_resume_pt_machdep +ffffffff825c40a0 T hibernate_switch_stack_machdep +ffffffff825c40e0 T hibernate_flush +ffffffff825c4110 T acpi_savecpu +ffffffff825c5000 T sleep_showstate +ffffffff825c50f0 T sleep_setstate +ffffffff825c5150 T gosleep +ffffffff825c5210 T sleep_abort +ffffffff825c5240 T sleep_resume +ffffffff825c52b0 T suspend_finish +ffffffff825c6000 T acpiopen +ffffffff825c60d0 T acpiclose +ffffffff825c6160 T acpiioctl +ffffffff825c62b0 T request_sleep +ffffffff825c6330 T acpi_filtdetach +ffffffff825c6380 T acpi_filtread +ffffffff825c63c0 T acpikqfilter +ffffffff825c7000 T acpipci_match +ffffffff825c7030 T acpipci_attach +ffffffff825c72f0 T acpipci_osc +ffffffff825c7430 T acpipci_parse_resources +ffffffff825c7560 T acpipci_attach_bus +ffffffff825c7730 T acpipci_print +ffffffff825c77a0 T acpipci_attach_busses +ffffffff825c8000 T efiopen +ffffffff825c8040 T eficlose +ffffffff825c8070 T efiioctl +ffffffff825c8110 T efiioc_get_table +ffffffff825c8280 T efiioc_var_get +ffffffff825c8500 T efiioc_var_next +ffffffff825c8720 T efiioc_var_set +ffffffff825c88a0 T efi_adapt_error +ffffffff825c9000 T efi_match +ffffffff825c9060 T efi_attach +ffffffff825c9330 T efi_map_runtime +ffffffff825c94b0 T efi_enter +ffffffff825c9550 T efi_leave +ffffffff825c95d0 T efi_fault +ffffffff825ca000 T vmm_probe +ffffffff825ca050 T vmm_attach +ffffffff825ca170 T vmm_activate +ffffffff825ca2b0 T vmmopen +ffffffff825ca300 T vmmclose +ffffffff825ca330 T vm_find +ffffffff825ca450 T vmmioctl +ffffffff825ca6d0 T vm_create +ffffffff825ca9a0 T vm_get_info +ffffffff825cabf0 T vm_terminate +ffffffff825cad60 T vm_resetcpu +ffffffff825cae80 T vm_share_mem +ffffffff825cafd0 T pledge_ioctl_vmm +ffffffff825cb0c0 T vm_find_vcpu +ffffffff825cb120 T vm_create_check_mem_ranges +ffffffff825cb2e0 T vm_teardown +ffffffff825cb420 T vcpu_must_stop +ffffffff825cc000 T vmm_enabled +ffffffff825cc080 T vmm_attach_machdep +ffffffff825cc230 T vmm_quiesce_vmx +ffffffff825cc400 T vmm_activate_machdep +ffffffff825cc520 T vmm_stop +ffffffff825cc650 T vmm_start +ffffffff825cc730 T vmmioctl_machdep +ffffffff825cc800 T vm_intr_pending +ffffffff825cc8a0 T vm_mprotect_ept +ffffffff825ccb20 T pledge_ioctl_vmm_machdep +ffffffff825ccb70 T vm_rwvmparams +ffffffff825ccd00 T vmm_init_pvclock +ffffffff825ccdd0 T vm_rwregs +ffffffff825ccee0 T vcpu_readregs_vmx +ffffffff825cd310 T vcpu_writeregs_vmx +ffffffff825cd780 T vcpu_readregs_svm +ffffffff825cdc30 T vcpu_writeregs_svm +ffffffff825ce100 T vmm_get_guest_memtype +ffffffff825ce180 T vmx_mprotect_ept +ffffffff825ce3e0 T vmx_pmap_find_pte_ept +ffffffff825ce4b0 T start_vmm_on_cpu +ffffffff825ce5d0 T stop_vmm_on_cpu +ffffffff825ce670 T vmclear_on_cpu +ffffffff825ce6f0 T vm_impl_init_vmx +ffffffff825ce800 T vm_impl_init_svm +ffffffff825ce910 T vm_impl_init +ffffffff825ce9b0 T vm_impl_deinit +ffffffff825ce9e0 T vcpu_reload_vmcs_vmx +ffffffff825ceb20 T vcpu_reset_regs_svm +ffffffff825ceeb0 T svm_setmsrbrw +ffffffff825cefc0 T svm_setmsrbr +ffffffff825cf090 T vmm_alloc_vpid +ffffffff825cf1a0 T svm_setmsrbw +ffffffff825cf280 T vmx_setmsrbr +ffffffff825cf330 T vmx_setmsrbw +ffffffff825cf3e0 T vmx_setmsrbrw +ffffffff825cf4f0 T svm_set_clean +ffffffff825cf540 T svm_set_dirty +ffffffff825cf590 T vcpu_reset_regs_vmx +ffffffff825cffd0 T vcpu_vmx_check_cap +ffffffff825d00d0 T vcpu_vmx_compute_ctrl +ffffffff825d02b0 T vcpu_init_vmx +ffffffff825d0650 T vcpu_deinit_vmx +ffffffff825d07d0 T vcpu_reset_regs +ffffffff825d0810 T vcpu_init_svm +ffffffff825d09a0 T vcpu_deinit_svm +ffffffff825d0ae0 T vcpu_init +ffffffff825d0ba0 T vmm_free_vpid +ffffffff825d0c10 T vcpu_deinit +ffffffff825d0c50 T vm_run +ffffffff825d0e10 T vcpu_run_vmx +ffffffff825d1600 T vcpu_run_svm +ffffffff825d1bf0 T vmm_fpurestore +ffffffff825d1cb0 T vmm_fpusave +ffffffff825d1d30 T vmm_translate_gva +ffffffff825d2040 T vmm_update_pvclock +ffffffff825d2140 T vmx_get_exit_info +ffffffff825d21a0 T vmx_handle_exit +ffffffff825d25d0 T vmx_instruction_error_decode +ffffffff825d27a0 T vmm_get_guest_cpu_cpl +ffffffff825d2890 T vmx_handle_intr +ffffffff825d2920 T svm_handle_hlt +ffffffff825d2970 T vmx_handle_hlt +ffffffff825d2a20 T svm_handle_exit +ffffffff825d2d40 T svm_handle_np_fault +ffffffff825d2ee0 T vmm_handle_cpuid +ffffffff825d3580 T svm_handle_msr +ffffffff825d3850 T svm_handle_xsetbv +ffffffff825d38f0 T svm_handle_inout +ffffffff825d39f0 T vmm_inject_ud +ffffffff825d3a20 T vmm_inject_db +ffffffff825d3a50 T vmx_handle_np_fault +ffffffff825d3bb0 T vmx_handle_inout +ffffffff825d3d30 T vmx_handle_cr +ffffffff825d3f30 T vmx_handle_rdmsr +ffffffff825d4000 T vmx_handle_wrmsr +ffffffff825d4270 T vmx_handle_xsetbv +ffffffff825d4340 T vmm_inject_gp +ffffffff825d4370 T vmx_get_exit_qualification +ffffffff825d43d0 T vmx_get_guest_faulttype +ffffffff825d4470 T svm_get_guest_faulttype +ffffffff825d44a0 T svm_fault_page +ffffffff825d4530 T vmx_fault_page +ffffffff825d4680 T vmm_get_guest_cpu_mode +ffffffff825d4780 T vmx_load_pdptes +ffffffff825d4a00 T vmx_handle_cr0_write +ffffffff825d4c10 T vmx_handle_cr4_write +ffffffff825d4cb0 T vmm_handle_xsetbv +ffffffff825d4d40 T vmx_handle_misc_enable_msr +ffffffff825d4da0 T vmm_pat_is_valid +ffffffff825d4e80 T vmm_gpa_is_valid +ffffffff825d4ef0 T vmx_exit_reason_decode +ffffffff825d4f30 T svm_exit_reason_decode +ffffffff825d5d40 T vcpu_state_decode +ffffffff825d6000 T vmm_dispatch_intr +ffffffff825d6020 T vmxon +ffffffff825d6050 T vmxoff +ffffffff825d6080 T vmclear +ffffffff825d60b0 T vmptrld +ffffffff825d60e0 T vmptrst +ffffffff825d6110 T vmwrite +ffffffff825d6140 T vmread +ffffffff825d6170 T invvpid +ffffffff825d618b t invvpid_fail +ffffffff825d6192 t invvpid_ret +ffffffff825d61b0 T invept +ffffffff825d61cb t invept_fail +ffffffff825d61d2 t invept_ret +ffffffff825d61f0 T vmx_enter_guest +ffffffff825d621b t skip_init +ffffffff825d62e8 t no_l1df_msr +ffffffff825d62eb t l1df_tlb_loop +ffffffff825d6304 t l1df_tlb_done +ffffffff825d630c t l1df_load_cache +ffffffff825d6323 t done_flush +ffffffff825d63b6 t do_resume +ffffffff825d643b t fail_launch_or_resume +ffffffff825d647d t fail_launch_unknown +ffffffff825d648a t fail_launch_invalid_vmcs +ffffffff825d6497 t fail_launch_valid_vmcs +ffffffff825d64b4 t vmx_exit_handler_asm +ffffffff825d6579 t restore_host +ffffffff825d6610 T svm_enter_guest +ffffffff825d67a0 t restore_host_svm +ffffffff825d7000 T sdmmc_match +ffffffff825d7050 T sdmmc_attach +ffffffff825d7390 T sdmmc_detach +ffffffff825d7440 T sdmmc_activate +ffffffff825d7510 T sdmmc_discover_task +ffffffff825d75d0 T sdmmc_create_thread +ffffffff825d7640 T sdmmc_holds_root_device +ffffffff825d76a0 T sdmmc_task_thread +ffffffff825d7890 T sdmmc_needs_discover +ffffffff825d7940 T sdmmc_del_task +ffffffff825d79f0 T sdmmc_card_detach +ffffffff825d7ad0 T sdmmc_add_task +ffffffff825d7b50 T sdmmc_card_attach +ffffffff825d7c60 T sdmmc_enable +ffffffff825d7db0 T sdmmc_scan +ffffffff825d7e40 T sdmmc_init +ffffffff825d7f40 T sdmmc_disable +ffffffff825d80a0 T sdmmc_function_free +ffffffff825d80c0 T sdmmc_delay +ffffffff825d8110 T sdmmc_select_card +ffffffff825d8330 T sdmmc_set_bus_power +ffffffff825d84e0 T sdmmc_function_alloc +ffffffff825d8570 T sdmmc_app_command +ffffffff825d8700 T sdmmc_mmc_command +ffffffff825d8780 T sdmmc_go_idle_state +ffffffff825d8890 T sdmmc_send_if_cond +ffffffff825d89e0 T sdmmc_set_relative_addr +ffffffff825d9000 T sdmmc_cisptr +ffffffff825d90a0 T sdmmc_read_cis +ffffffff825d93e0 T sdmmc_print_cis +ffffffff825d9550 T sdmmc_check_cis_quirks +ffffffff825da000 T sdmmc_io_enable +ffffffff825da2a0 T sdmmc_io_reset +ffffffff825da3d0 T sdmmc_io_send_op_cond +ffffffff825da540 T sdmmc_io_scan +ffffffff825da690 T sdmmc_io_init +ffffffff825da7c0 T sdmmc_io_set_highspeed +ffffffff825daa60 T sdmmc_io_set_bus_width +ffffffff825dacf0 T sdmmc_io_function_ready +ffffffff825dae70 T sdmmc_io_read_1 +ffffffff825dafc0 T sdmmc_io_function_enable +ffffffff825db390 T sdmmc_io_write_1 +ffffffff825db510 T sdmmc_io_function_disable +ffffffff825db790 T sdmmc_io_attach +ffffffff825db880 T sdmmc_print +ffffffff825dbad0 T sdmmc_submatch +ffffffff825dbb50 T sdmmc_io_detach +ffffffff825dbc00 T sdmmc_io_rw_direct +ffffffff825dbda0 T sdmmc_io_rw_extended_subr +ffffffff825dbf40 T sdmmc_io_rw_extended +ffffffff825dc340 T sdmmc_io_read_2 +ffffffff825dc4a0 T sdmmc_io_write_2 +ffffffff825dc600 T sdmmc_io_read_4 +ffffffff825dc760 T sdmmc_io_write_4 +ffffffff825dc8c0 T sdmmc_io_read_multi_1 +ffffffff825dc9b0 T sdmmc_io_write_multi_1 +ffffffff825dcaa0 T sdmmc_io_read_region_1 +ffffffff825dcb90 T sdmmc_io_write_region_1 +ffffffff825dcc80 T sdmmc_io_xchg +ffffffff825dce10 T sdmmc_intr_enable +ffffffff825dd080 T sdmmc_intr_disable +ffffffff825dd2f0 T sdmmc_intr_establish +ffffffff825dd3f0 T sdmmc_intr_disestablish +ffffffff825dd4e0 T sdmmc_card_intr +ffffffff825dd530 T sdmmc_intr_task +ffffffff825dd5c0 T sdmmc_io_set_blocklen +ffffffff825de000 T sdmmc_mem_enable +ffffffff825de450 T sdmmc_mem_send_op_cond +ffffffff825de600 T sdmmc_mem_signal_voltage +ffffffff825de6c0 T sdmmc_mem_scan +ffffffff825de9d0 T sdmmc_decode_csd +ffffffff825dee00 T sdmmc_decode_cid +ffffffff825df2a0 T sdmmc_mem_send_scr +ffffffff825df3e0 T sdmmc_mem_decode_scr +ffffffff825df440 T sdmmc_mem_send_cxd_data +ffffffff825df5b0 T sdmmc_mem_set_bus_width +ffffffff825df6c0 T sdmmc_mem_sd_switch +ffffffff825df970 T sdmmc_be512_to_bitfield512 +ffffffff825dfa20 T sdmmc_mem_mmc_switch +ffffffff825dfb10 T sdmmc_mem_init +ffffffff825dfc60 T sdmmc_mem_set_blocklen +ffffffff825dfd60 T sdmmc_mem_sd_init +ffffffff825e0140 T sdmmc_mem_mmc_init +ffffffff825e0800 T sdmmc_mem_select_transfer_mode +ffffffff825e0880 T sdmmc_mem_execute_tuning +ffffffff825e0910 T sdmmc_mem_read_block_subr +ffffffff825e0c70 T sdmmc_mem_single_read_block +ffffffff825e0d40 T sdmmc_mem_read_block +ffffffff825e0ef0 T sdmmc_mem_write_block_subr +ffffffff825e1240 T sdmmc_mem_single_write_block +ffffffff825e1310 T sdmmc_mem_write_block +ffffffff825e14c0 T sdmmc_mem_hibernate_write +ffffffff825e2000 T sdmmc_scsi_cmd +ffffffff825e21f0 T sdmmc_minphys +ffffffff825e2270 T sdmmc_scsi_attach +ffffffff825e2460 T sdmmc_alloc_ccbs +ffffffff825e25a0 T sdmmc_free_ccbs +ffffffff825e2600 T sdmmc_scsi_detach +ffffffff825e2760 T sdmmc_stimeout +ffffffff825e27e0 T sdmmc_ccb_alloc +ffffffff825e2890 T sdmmc_ccb_free +ffffffff825e2970 T sdmmc_inquiry +ffffffff825e2be0 T sdmmc_start_xs +ffffffff825e2cd0 T sdmmc_complete_xs +ffffffff825e2da0 T sdmmc_done_xs +ffffffff825e2df0 T sdmmc_scsi_hibernate_io +ffffffff825e3000 T bwfm_sdio_preinit +ffffffff825e34a0 T bwfm_sdio_txcheck +ffffffff825e34e0 T bwfm_sdio_txdata +ffffffff825e3550 T bwfm_sdio_txctl +ffffffff825e36a0 T bwfm_sdio_buscore_read +ffffffff825e36b0 T bwfm_sdio_buscore_write +ffffffff825e36d0 T bwfm_sdio_buscore_prepare +ffffffff825e3810 T bwfm_sdio_buscore_activate +ffffffff825e3890 T bwfm_sdio_match +ffffffff825e3940 T bwfm_sdio_attach +ffffffff825e3c00 T bwfm_sdio_detach +ffffffff825e3c60 T bwfm_sdio_task +ffffffff825e3dc0 T bwfm_sdio_write_1 +ffffffff825e3df0 T bwfm_sdio_read_1 +ffffffff825e3e20 T bwfm_sdio_write_4 +ffffffff825e3ed0 T bwfm_sdio_read_4 +ffffffff825e3f80 T bwfm_sdio_load_microcode +ffffffff825e41e0 T bwfm_sdio_clkctl +ffffffff825e4310 T bwfm_sdio_dev_write +ffffffff825e4360 T bwfm_sdio_intr +ffffffff825e43a0 T bwfm_sdio_ram_read_write +ffffffff825e45d0 T bwfm_sdio_htclk +ffffffff825e4840 T bwfm_sdio_readshared +ffffffff825e4910 T bwfm_sdio_dev_read +ffffffff825e4950 T bwfm_sdio_rx_frames +ffffffff825e4d00 T bwfm_sdio_tx_frames +ffffffff825e4e00 T bwfm_sdio_backplane +ffffffff825e4eb0 T bwfm_sdio_buf_read +ffffffff825e4f90 T bwfm_sdio_buf_write +ffffffff825e5040 T bwfm_sdio_frame_read_write +ffffffff825e51c0 T bwfm_sdio_newbuf +ffffffff825e5240 T bwfm_sdio_tx_ok +ffffffff825e52a0 T bwfm_sdio_tx_ctrlframe +ffffffff825e53a0 T bwfm_sdio_tx_dataframe +ffffffff825e54f0 T bwfm_sdio_rx_glom +ffffffff825e6000 T onewire_match +ffffffff825e6050 T onewire_attach +ffffffff825e60f0 T onewire_detach +ffffffff825e6160 T onewire_activate +ffffffff825e6180 T onewire_scan +ffffffff825e63a0 T onewire_createthread +ffffffff825e6410 T onewire_print +ffffffff825e64e0 T onewirebus_print +ffffffff825e6530 T onewire_lock +ffffffff825e6550 T onewire_unlock +ffffffff825e6570 T onewire_reset +ffffffff825e6590 T onewire_bit +ffffffff825e65b0 T onewire_read_byte +ffffffff825e66f0 T onewire_write_byte +ffffffff825e67d0 T onewire_read_block +ffffffff825e6870 T onewire_write_block +ffffffff825e6910 T onewire_triplet +ffffffff825e69f0 T onewire_matchrom +ffffffff825e6b40 T onewire_search +ffffffff825e6ee0 T onewire_thread +ffffffff825e7000 T onewire_crc +ffffffff825e70b0 T onewire_crc16 +ffffffff825e7170 T onewire_famname +ffffffff825e71b0 T onewire_matchbyfam +ffffffff825e8000 T owid_match +ffffffff825e8030 T owid_attach +ffffffff825e8100 T owid_detach +ffffffff825e8140 T owid_activate +ffffffff825e9000 T owsbm_match +ffffffff825e9030 T owsbm_attach +ffffffff825e91d0 T owsbm_detach +ffffffff825e9240 T owsbm_activate +ffffffff825e9270 T owsbm_update +ffffffff825ea000 T owtemp_match +ffffffff825ea030 T owtemp_attach +ffffffff825ea130 T owtemp_detach +ffffffff825ea1a0 T owtemp_activate +ffffffff825ea1d0 T owtemp_update +ffffffff825eb000 T owctr_match +ffffffff825eb030 T owctr_attach +ffffffff825eb180 T owctr_detach +ffffffff825eb1f0 T owctr_activate +ffffffff825eb220 T owctr_update +ffffffff825eb250 T owctr_update_counter +ffffffff825ec000 A __text_page_start +ffffffff825ec000 T Xsyscall_meltdown +ffffffff825ec00c T Xsyscall +ffffffff825ec26e t Xsyscall_trampback +ffffffff825ec280 T intr_user_exit +ffffffff825ec2c2 t intr_user_exit_post_ast +ffffffff825ec3ee t Xiretq_trampback +ffffffff825ec3fa T doreti_iret +ffffffff825ed000 T alltraps +ffffffff825ed138 T recall_trap +ffffffff825ed150 T alltraps_kern +ffffffff825ed153 T alltraps_kern_meltdown +ffffffff825ee000 ? Xsyscall32 +ffffffff825ee000 A __kutext_start +ffffffff825ee000 A __text_page_end +ffffffff825ef000 ? Xtrap00 +ffffffff825ef010 ? Xtrap01 +ffffffff825ef020 ? Xtrap02 +ffffffff825ef028 c calltrap_specstk +ffffffff825ef0f0 ? calltrap_specstk_tramp +ffffffff825ef110 ? Xtrap03 +ffffffff825ef120 ? Xtrap04 +ffffffff825ef130 ? Xtrap05 +ffffffff825ef140 ? Xtrap06 +ffffffff825ef150 ? Xtrap07 +ffffffff825ef160 ? Xtrap08 +ffffffff825ef170 ? Xtrap09 +ffffffff825ef180 ? Xtrap0a +ffffffff825ef190 ? Xtrap0b +ffffffff825ef1a0 ? Xtrap0c +ffffffff825ef1b0 ? Xtrap0d +ffffffff825ef240 ? Xtrap0e +ffffffff825ef250 ? Xintrspurious +ffffffff825ef250 ? Xtrap0f +ffffffff825ef260 ? Xtrap10 +ffffffff825ef270 ? Xtrap11 +ffffffff825ef280 ? Xtrap12 +ffffffff825ef290 ? Xtrap13 +ffffffff825ef2a0 ? Xtrap14 +ffffffff825ef2b0 ? Xtrap15 +ffffffff825ef2c0 ? Xtrap16 +ffffffff825ef2c0 ? Xtrap17 +ffffffff825ef2c0 ? Xtrap18 +ffffffff825ef2c0 ? Xtrap19 +ffffffff825ef2c0 ? Xtrap1a +ffffffff825ef2c0 ? Xtrap1b +ffffffff825ef2c0 ? Xtrap1c +ffffffff825ef2c0 ? Xtrap1d +ffffffff825ef2c0 ? Xtrap1e +ffffffff825ef2c0 ? Xtrap1f +ffffffff825ef2d0 ? x2apic_eoi +ffffffff825ef2f0 ? Xintr_lapic_ipi +ffffffff825ef330 ? Xipi_invltlb +ffffffff825ef360 ? Xipi_invlpg +ffffffff825ef390 ? Xipi_invlrange +ffffffff825ef3d0 ? Xipi_invltlb_pcid +ffffffff825ef410 ? Xipi_invlpg_pcid +ffffffff825ef460 ? Xipi_invlrange_pcid +ffffffff825ef4d0 ? Xintr_lapic_ltimer +ffffffff825ef510 ? Xintr_xen_upcall +ffffffff825ef550 ? Xintr_hyperv_upcall +ffffffff825ef590 ? Xintr_legacy0 +ffffffff825ef5d0 ? Xintr_legacy1 +ffffffff825ef610 ? Xintr_legacy2 +ffffffff825ef650 ? Xintr_legacy3 +ffffffff825ef690 ? Xintr_legacy4 +ffffffff825ef6d0 ? Xintr_legacy5 +ffffffff825ef710 ? Xintr_legacy6 +ffffffff825ef750 ? Xintr_legacy7 +ffffffff825ef790 ? Xintr_legacy8 +ffffffff825ef7d0 ? Xintr_legacy9 +ffffffff825ef810 ? Xintr_legacy10 +ffffffff825ef850 ? Xintr_legacy11 +ffffffff825ef890 ? Xintr_legacy12 +ffffffff825ef8d0 ? Xintr_legacy13 +ffffffff825ef910 ? Xintr_legacy14 +ffffffff825ef950 ? Xintr_legacy15 +ffffffff825ef990 ? Xintr_ioapic_edge0 +ffffffff825ef9d0 ? Xintr_ioapic_edge1 +ffffffff825efa10 ? Xintr_ioapic_edge2 +ffffffff825efa50 ? Xintr_ioapic_edge3 +ffffffff825efa90 ? Xintr_ioapic_edge4 +ffffffff825efad0 ? Xintr_ioapic_edge5 +ffffffff825efb10 ? Xintr_ioapic_edge6 +ffffffff825efb50 ? Xintr_ioapic_edge7 +ffffffff825efb90 ? Xintr_ioapic_edge8 +ffffffff825efbd0 ? Xintr_ioapic_edge9 +ffffffff825efc10 ? Xintr_ioapic_edge10 +ffffffff825efc50 ? Xintr_ioapic_edge11 +ffffffff825efc90 ? Xintr_ioapic_edge12 +ffffffff825efcd0 ? Xintr_ioapic_edge13 +ffffffff825efd10 ? Xintr_ioapic_edge14 +ffffffff825efd50 ? Xintr_ioapic_edge15 +ffffffff825efd90 ? Xintr_ioapic_edge16 +ffffffff825efdd0 ? Xintr_ioapic_edge17 +ffffffff825efe10 ? Xintr_ioapic_edge18 +ffffffff825efe50 ? Xintr_ioapic_edge19 +ffffffff825efe90 ? Xintr_ioapic_edge20 +ffffffff825efed0 ? Xintr_ioapic_edge21 +ffffffff825eff10 ? Xintr_ioapic_edge22 +ffffffff825eff50 ? Xintr_ioapic_edge23 +ffffffff825eff90 ? Xintr_ioapic_edge24 +ffffffff825effd0 ? Xintr_ioapic_edge25 +ffffffff825f0010 ? Xintr_ioapic_edge26 +ffffffff825f0050 ? Xintr_ioapic_edge27 +ffffffff825f0090 ? Xintr_ioapic_edge28 +ffffffff825f00d0 ? Xintr_ioapic_edge29 +ffffffff825f0110 ? Xintr_ioapic_edge30 +ffffffff825f0150 ? Xintr_ioapic_edge31 +ffffffff825f0190 ? Xintr_ioapic_edge32 +ffffffff825f01d0 ? Xintr_ioapic_edge33 +ffffffff825f0210 ? Xintr_ioapic_edge34 +ffffffff825f0250 ? Xintr_ioapic_edge35 +ffffffff825f0290 ? Xintr_ioapic_edge36 +ffffffff825f02d0 ? Xintr_ioapic_edge37 +ffffffff825f0310 ? Xintr_ioapic_edge38 +ffffffff825f0350 ? Xintr_ioapic_edge39 +ffffffff825f0390 ? Xintr_ioapic_edge40 +ffffffff825f03d0 ? Xintr_ioapic_edge41 +ffffffff825f0410 ? Xintr_ioapic_edge42 +ffffffff825f0450 ? Xintr_ioapic_edge43 +ffffffff825f0490 ? Xintr_ioapic_edge44 +ffffffff825f04d0 ? Xintr_ioapic_edge45 +ffffffff825f0510 ? Xintr_ioapic_edge46 +ffffffff825f0550 ? Xintr_ioapic_edge47 +ffffffff825f0590 ? Xintr_ioapic_edge48 +ffffffff825f05d0 ? Xintr_ioapic_edge49 +ffffffff825f0610 ? Xintr_ioapic_edge50 +ffffffff825f0650 ? Xintr_ioapic_edge51 +ffffffff825f0690 ? Xintr_ioapic_edge52 +ffffffff825f06d0 ? Xintr_ioapic_edge53 +ffffffff825f0710 ? Xintr_ioapic_edge54 +ffffffff825f0750 ? Xintr_ioapic_edge55 +ffffffff825f0790 ? Xintr_ioapic_edge56 +ffffffff825f07d0 ? Xintr_ioapic_edge57 +ffffffff825f0810 ? Xintr_ioapic_edge58 +ffffffff825f0850 ? Xintr_ioapic_edge59 +ffffffff825f0890 ? Xintr_ioapic_edge60 +ffffffff825f08d0 ? Xintr_ioapic_edge61 +ffffffff825f0910 ? Xintr_ioapic_edge62 +ffffffff825f0950 ? Xintr_ioapic_edge63 +ffffffff825f0990 ? Xintr_ioapic_level0 +ffffffff825f09d0 ? Xintr_ioapic_level1 +ffffffff825f0a10 ? Xintr_ioapic_level2 +ffffffff825f0a50 ? Xintr_ioapic_level3 +ffffffff825f0a90 ? Xintr_ioapic_level4 +ffffffff825f0ad0 ? Xintr_ioapic_level5 +ffffffff825f0b10 ? Xintr_ioapic_level6 +ffffffff825f0b50 ? Xintr_ioapic_level7 +ffffffff825f0b90 ? Xintr_ioapic_level8 +ffffffff825f0bd0 ? Xintr_ioapic_level9 +ffffffff825f0c10 ? Xintr_ioapic_level10 +ffffffff825f0c50 ? Xintr_ioapic_level11 +ffffffff825f0c90 ? Xintr_ioapic_level12 +ffffffff825f0cd0 ? Xintr_ioapic_level13 +ffffffff825f0d10 ? Xintr_ioapic_level14 +ffffffff825f0d50 ? Xintr_ioapic_level15 +ffffffff825f0d90 ? Xintr_ioapic_level16 +ffffffff825f0dd0 ? Xintr_ioapic_level17 +ffffffff825f0e10 ? Xintr_ioapic_level18 +ffffffff825f0e50 ? Xintr_ioapic_level19 +ffffffff825f0e90 ? Xintr_ioapic_level20 +ffffffff825f0ed0 ? Xintr_ioapic_level21 +ffffffff825f0f10 ? Xintr_ioapic_level22 +ffffffff825f0f50 ? Xintr_ioapic_level23 +ffffffff825f0f90 ? Xintr_ioapic_level24 +ffffffff825f0fd0 ? Xintr_ioapic_level25 +ffffffff825f1010 ? Xintr_ioapic_level26 +ffffffff825f1050 ? Xintr_ioapic_level27 +ffffffff825f1090 ? Xintr_ioapic_level28 +ffffffff825f10d0 ? Xintr_ioapic_level29 +ffffffff825f1110 ? Xintr_ioapic_level30 +ffffffff825f1150 ? Xintr_ioapic_level31 +ffffffff825f1190 ? Xintr_ioapic_level32 +ffffffff825f11d0 ? Xintr_ioapic_level33 +ffffffff825f1210 ? Xintr_ioapic_level34 +ffffffff825f1250 ? Xintr_ioapic_level35 +ffffffff825f1290 ? Xintr_ioapic_level36 +ffffffff825f12d0 ? Xintr_ioapic_level37 +ffffffff825f1310 ? Xintr_ioapic_level38 +ffffffff825f1350 ? Xintr_ioapic_level39 +ffffffff825f1390 ? Xintr_ioapic_level40 +ffffffff825f13d0 ? Xintr_ioapic_level41 +ffffffff825f1410 ? Xintr_ioapic_level42 +ffffffff825f1450 ? Xintr_ioapic_level43 +ffffffff825f1490 ? Xintr_ioapic_level44 +ffffffff825f14d0 ? Xintr_ioapic_level45 +ffffffff825f1510 ? Xintr_ioapic_level46 +ffffffff825f1550 ? Xintr_ioapic_level47 +ffffffff825f1590 ? Xintr_ioapic_level48 +ffffffff825f15d0 ? Xintr_ioapic_level49 +ffffffff825f1610 ? Xintr_ioapic_level50 +ffffffff825f1650 ? Xintr_ioapic_level51 +ffffffff825f1690 ? Xintr_ioapic_level52 +ffffffff825f16d0 ? Xintr_ioapic_level53 +ffffffff825f1710 ? Xintr_ioapic_level54 +ffffffff825f1750 ? Xintr_ioapic_level55 +ffffffff825f1790 ? Xintr_ioapic_level56 +ffffffff825f17d0 ? Xintr_ioapic_level57 +ffffffff825f1810 ? Xintr_ioapic_level58 +ffffffff825f1850 ? Xintr_ioapic_level59 +ffffffff825f1890 ? Xintr_ioapic_level60 +ffffffff825f18d0 ? Xintr_ioapic_level61 +ffffffff825f1910 ? Xintr_ioapic_level62 +ffffffff825f1950 ? Xintr_ioapic_level63 +ffffffff825f2000 ? codepatch_fill_nop +ffffffff825f2000 A __cptext_start +ffffffff825f2000 A __kutext_end +ffffffff825f20b0 ? codepatch_maprw +ffffffff825f2190 ? codepatch_unmaprw +ffffffff825f2200 ? codepatch_nop +ffffffff825f2360 ? codepatch_replace +ffffffff825f2510 ? codepatch_call +ffffffff825f2530 ? codepatch_control_flow +ffffffff825f2740 ? codepatch_jmp +ffffffff825f3000 A __cptext_end +ffffffff825f3000 A __rodata_start +ffffffff825f3000 C _etext +ffffffff825f3000 C etext +ffffffff825f4000 r seeprom_read +ffffffff825f4004 r icl_mg_pll_find_divisors.div1_vals +ffffffff825f4034 r athn_ac2qid +ffffffff825f4034 r athn_ac2qid +ffffffff825f4034 r athn_ac2qid +ffffffff825f4040 r rtwn_get_rssi.cckoff +ffffffff825f4068 r rsu_ac2qid +ffffffff825f4078 r pckbc_portcmd +ffffffff825f407c r tht_fifo_write_pad.pad +ffffffff825f4084 r rsu_get_rssi.cckoff +ffffffff825f40a4 r adlp_n_revids +ffffffff825f40e8 r apple_iso_trans +ffffffff825f40f0 r wihap_check_tx.txratetable +ffffffff825f40f4 r dmamode +ffffffff825f4118 r gen9_edram_size_mb.sets +ffffffff825f412c r dg2_g12_revid_step_tbl +ffffffff825f5000 r isomappings +ffffffff825f5080 r unimappings +ffffffff825f5230 r replacements +ffffffff825f88c5 r apollo_pio_rec +ffffffff82644925 r apollo_udma33_tim +ffffffff826599dc r pp_r600_decoded_lanes +ffffffff8268f571 r cmd680_setup_channel.udma_tbl +ffffffff82697929 r apollo_udma100_tim +ffffffff8269792f r cmd0646_9_tim_udma +ffffffff826a5d21 r substchar +ffffffff826fb1f0 r apollo_udma133_tim +ffffffff826fb1f7 r apollo_udma66_tim +ffffffff826fb221 r cy_pio_rec +ffffffff82700900 R drm_ca +ffffffff82700928 R drm_filtops +ffffffff82700958 R drmread_filtops +ffffffff82701000 r vga_emulops +ffffffff82701048 R vga_stdscreen +ffffffff82701078 R vga_stdscreen_mono +ffffffff827010a8 R vga_stdscreen_bf +ffffffff827010d8 R vga_40lscreen +ffffffff82701108 R vga_40lscreen_mono +ffffffff82701138 R vga_40lscreen_bf +ffffffff82701168 R vga_50lscreen +ffffffff82701198 R vga_50lscreen_mono +ffffffff827011c8 R vga_50lscreen_bf +ffffffff827011f8 R vga_screenlist +ffffffff82701208 R vga_screenlist_mono +ffffffff82701218 R vga_accessops +ffffffff82701278 r i945_wm_info +ffffffff827012b8 r bgansitopc +ffffffff827012c0 r pctoansi +ffffffff82701300 r sdma_offsets +ffffffff82701300 r sdma_offsets +ffffffff82701338 r iha_rate_tbl +ffffffff82701370 r i830_a_wm_info +ffffffff827013a8 r gen9_edram_size_mb.ways +ffffffff82701408 r aggr_periodic_times +ffffffff82701500 r michael_final.pad +ffffffff82701528 r rt_copysa.maskarray +ffffffff82701530 r i915_wm_info +ffffffff82701538 r amdgpu_ih_clientid_jpeg +ffffffff82701538 r amdgpu_ih_clientid_uvds +ffffffff82701538 r amdgpu_ih_clientid_vcns +ffffffff82701538 r amdgpu_ih_clientid_vcns +ffffffff82701538 r amdgpu_ih_clientid_vcns +ffffffff82701568 r jsl_ehl_revids +ffffffff82701578 r vga_setfontset.cmaptabb +ffffffff827015e8 r i830_bc_wm_info +ffffffff82701650 r hsw_activate_psr2.map +ffffffff82701658 r tgl_revids +ffffffff82701690 r __drm_universal_plane_init.default_modifiers +ffffffff827016a0 r iwn_tid2fifo +ffffffff827016b8 r vga_setfontset.cmaptaba +ffffffff827016c0 r crtc_offsets +ffffffff827016c0 r crtc_offsets +ffffffff827016c0 r crtc_offsets +ffffffff82701768 r rtwn_r88e_get_rssi.cckoff +ffffffff82702000 R edid_vendors +ffffffff827022c0 R edid_nvendors +ffffffff827022d0 R edid_products +ffffffff82702330 R edid_nproducts +ffffffff82702340 r _edid_modes +ffffffff82703000 R videomode_list +ffffffff82704080 R videomode_count +ffffffff82705000 r ahc_hard_errors +ffffffff82705080 r critical_sections +ffffffff827050b0 r patches +ffffffff82705d50 r seqprog +ffffffff82707000 r ahc_switch +ffffffff82708000 r termstat_strings +ffffffff82708020 r critical_sections +ffffffff82708060 r seqprog +ffffffff82708d50 r patches +ffffffff8270a000 r ahd_switch +ffffffff8270b000 R aic_switch +ffffffff8270c000 R adw_switch +ffffffff8270d000 R gdt_switch +ffffffff8270e000 R twe_switch +ffffffff8270f000 R ciss_switch +ffffffff8270f030 R ciss_level +ffffffff8270f050 R ciss_stat +ffffffff82710000 R ami_switch +ffffffff82710028 R ami_raw_switch +ffffffff82711000 R mfi_switch +ffffffff82711028 R mfi_pd_switch +ffffffff82711050 r mfi_iop_xscale +ffffffff82711080 r mfi_iop_ppc +ffffffff827110b0 r mfi_iop_gen2 +ffffffff827110e0 r mfi_iop_skinny +ffffffff82711110 r mfi_bbu_indicators +ffffffff82712000 R qlw_switch +ffffffff82713000 R isp_2100_risc_code +ffffffff82725bf0 R isp_2200_risc_code +ffffffff82738990 R isp_2300_risc_code +ffffffff82752408 R qla_switch +ffffffff82752430 r qla_regs_2100 +ffffffff82752460 r qla_regs_2200 +ffffffff82752490 r qla_regs_23XX +ffffffff82753000 R ahci_atascsi_methods +ffffffff82754000 R nvme_switch +ffffffff82754028 r nvme_ops +ffffffff82755000 R mpi_switch +ffffffff82755060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff82755090 r chv_oa_mux_regs +ffffffff827550b0 r fiji_clock_stretcher_lookup_table +ffffffff827550b0 r tonga_clock_stretcher_lookup_table +ffffffff827550d0 r iosf_pci_devices +ffffffff827550f0 r link_speed +ffffffff827550f0 r link_speed +ffffffff82755130 r drm_fb_xfrm.default_dst_pitch +ffffffff82755130 r non_supported_protection +ffffffff82755140 r tgl_uy_revids +ffffffff827552a0 r bwi_phy_noise_11g_rev1 +ffffffff82755310 r cardslot_process_event.antonym_ev +ffffffff827553a0 r gen11_oa_mux_regs +ffffffff82755440 r dpia_to_preferred_enc_id_table +ffffffff827554b0 r ddr2_cycle_tenths +ffffffff82755520 r rtw_intr_rx.ratetbl +ffffffff827555a0 r abm_config +ffffffff82755620 r getbootinfo.ports +ffffffff82755670 r reg_offsets +ffffffff82755680 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff82755690 r glk_revids +ffffffff827556a0 r init_non_clock_fields.look_up +ffffffff827556b0 r uftdi_8u232am_getrate.roundoff +ffffffff82755710 r zyd_rx_data.rates +ffffffff82755730 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff82755760 r intel_engine_init_tlb_invalidation.gen8_regs +ffffffff82755790 r bwi_phy_noise_11g +ffffffff827557a0 r hpt366_pio +ffffffff82755800 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff82755820 r ether_crc32_be_update.rev +ffffffff82755820 r rtw_grf5101_mac_crypt.caesar +ffffffff82755870 r snb_b_fdi_train_param +ffffffff82755940 r intel_hpll_vco.elk_vco +ffffffff82755960 r icl_revids +ffffffff827559c0 r pin_offsets +ffffffff827559e0 r amdgpu_ih_srcid_jpeg +ffffffff82755a20 r firmware_list +ffffffff82755a80 r atom_arg_shift +ffffffff82755a80 r atom_arg_shift +ffffffff82755ac0 r pf_syncookie_wstab +ffffffff82755ae0 r ieee80211_media_init.mopts +ffffffff82755b40 r add_entropy_words.twist_table +ffffffff82755be0 r urtw_8225v2_txpwr_cck +ffffffff82755c00 r bwfm_pci_prio2fifo +ffffffff82755c00 r ieee80211_up_to_ac.up_to_ac +ffffffff82755cc0 r paritytab +ffffffff82755cc0 r x86emu_parity_tab +ffffffff82755ce0 r legacy_connector_convert +ffffffff82755d20 r gen7_oa_mux_regs +ffffffff82755d40 r hsw_oa_mux_regs +ffffffff82755d60 r notetab +ffffffff82755d80 r urtw_8225v2_txpwr_cck_ch14 +ffffffff82755da0 r bwi_rf_calibval.rf_calibvals +ffffffff82755e40 r pf_syncookie_msstab +ffffffff82755ea0 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff82755f00 r uath_wme_init.uath_wme_11g +ffffffff82755f40 r gen7_oa_b_counters +ffffffff82756140 r rtwn_iq_calib_run.reg_adda +ffffffff82756180 r atom_def_dst +ffffffff82756180 r atom_def_dst +ffffffff827561c0 r sha256_initial_hash_value +ffffffff82756220 r otus_edca_def +ffffffff82756240 r intel_hpll_vco.blb_vco +ffffffff82756320 r epic_pci_subsys_info +ffffffff82756340 r kbl_revids +ffffffff82756360 r atom_arg_mask +ffffffff82756360 r atom_arg_mask +ffffffff827563c0 r butmap +ffffffff82756400 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff82756440 r comsoft.lsrmap +ffffffff82756480 r xgmi3x16_pcs_err_noncorrectable_mask_reg_aldebaran +ffffffff827564a0 r tulip_mii_phy_readspecific.table +ffffffff82756540 r intel_hpll_vco.pnv_vco +ffffffff827565a0 r dmapageport +ffffffff82756660 r intel_hpll_vco.ctg_vco +ffffffff82756720 r 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ar9280_2_0_rx_gain_13db_backoff +ffffffff827790c0 r ar9280_2_0_rx_gain +ffffffff827790e0 r ar9280_2_0_tx_gain_high_power +ffffffff82779100 r ar9280_2_0_tx_gain +ffffffff82779120 r ar9280_init_from_rom.chainoffset +ffffffff82779130 r ar9280_2_0_regs +ffffffff82779190 r ar9280_2_0_vals_5g20 +ffffffff82779250 r ar9280_2_0_vals_5g40 +ffffffff82779310 r ar9280_2_0_vals_2g40 +ffffffff827793d0 r ar9280_2_0_vals_2g20 +ffffffff82779490 r ar9280_2_0_cm_regs +ffffffff82779740 r ar9280_2_0_cm_vals +ffffffff82779c90 r ar9280_2_0_fast_clock_regs +ffffffff82779cb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff82779cf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff82779d30 r ar9280_2_0_serdes_regs +ffffffff82779d60 r ar9280_2_0_serdes_vals +ffffffff82779d90 r ar9280_2_0_rx_gain_regs +ffffffff82779ea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff8277a0b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff8277a2c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff8277a4d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g +ffffffff8277a6e0 r ar9280_2_0_rx_gain_vals_5g +ffffffff8277a8f0 r ar9280_2_0_rx_gain_vals_2g +ffffffff8277ab00 r ar9280_2_0_tx_gain_regs +ffffffff8277ab40 r ar9280_2_0_tx_gain_high_power_vals_5g +ffffffff8277abc0 r ar9280_2_0_tx_gain_high_power_vals_2g +ffffffff8277ac40 r ar9280_2_0_tx_gain_vals_5g +ffffffff8277acc0 r ar9280_2_0_tx_gain_vals_2g +ffffffff8277b000 r ar9271_ini +ffffffff8277b068 r ar9285_1_2_ini +ffffffff8277b0d0 r ar9280_2_0_serdes +ffffffff8277b0e8 r ar9271_tx_gain_high_power +ffffffff8277b108 r ar9271_tx_gain +ffffffff8277b128 r ar9285_2_0_tx_gain_high_power +ffffffff8277b148 r ar9285_2_0_tx_gain +ffffffff8277b168 r ar9285_1_2_tx_gain_high_power +ffffffff8277b188 r ar9285_1_2_tx_gain +ffffffff8277b1b0 r ar9271_regs +ffffffff8277b410 r ar9271_vals_2g40 +ffffffff8277b8d0 r ar9271_vals_2g20 +ffffffff8277bd90 r ar9271_cm_regs +ffffffff8277c020 r ar9271_cm_vals +ffffffff8277c540 r ar9285_1_2_regs +ffffffff8277c7a0 r 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ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff82784040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff827841e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff82784380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff82784520 r ar9380_2_2_tx_gain_vals_5g +ffffffff827846c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff82784860 r ar9485_1_1_tx_gain_regs +ffffffff827848f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff82784a10 r ar9380_def_rom +ffffffff82784e50 r ar9380_def_rom_h112 +ffffffff82785290 r ar9380_def_rom_h116 +ffffffff827856d0 r ar9380_def_rom_x112 +ffffffff82785b10 r ar9380_def_rom_x113 +ffffffff82786000 R atw_txthresh_tab_lo +ffffffff82786050 R atw_txthresh_tab_hi +ffffffff827860a0 r atw_attach.empty_macaddr +ffffffff827860b0 r atw_attach.type_strings +ffffffff827860d0 r atw_rfmd2958_ifn +ffffffff82786110 r atw_rfmd2958_rf1r +ffffffff82786150 r atw_rxintr.rate_tbl +ffffffff82787000 r rtw_identify_sta.empty_macaddr +ffffffff82788000 r rtwn_set_key.etherzeroaddr +ffffffff82788010 r rtl8188eu_rf_prog +ffffffff82788030 r rtl8188ftv_rf_prog +ffffffff82788050 r rtl8192e_rf_prog +ffffffff82788080 r rtl8188ce_rf_prog +ffffffff827880a0 r rtl8188ru_rf_prog +ffffffff827880c0 r rtl8188cu_rf_prog +ffffffff827880e0 r rtl8192ce_rf_prog +ffffffff82788110 r rtl8188ru_txagc +ffffffff82788170 r rtl8188eu_rf_regs +ffffffff82788230 r rtl8188eu_rf_vals +ffffffff827883b0 r rtl8188ftv_rf_regs +ffffffff82788490 r rtl8188ftv_rf_vals +ffffffff82788640 r rtl8192e_rf_regs +ffffffff82788710 r rtl8192e_rf_vals +ffffffff827888b0 r rtl8192e_rf2_regs +ffffffff82788950 r rtl8192e_rf2_vals +ffffffff82788a90 r rtl8192ce_rf1_regs +ffffffff82788bb0 r rtl8188ce_rf_vals +ffffffff82788df0 r rtl8188ru_rf_vals +ffffffff82789030 r rtl8188cu_rf_vals +ffffffff82789270 r rtl8192ce_rf1_vals +ffffffff827894b0 r rtl8192ce_rf2_regs +ffffffff82789500 r rtl8192ce_rf2_vals +ffffffff827895a0 r rtl8192cu_txagc +ffffffff8278a000 r rt2560_rf2522_r2 +ffffffff8278a040 r rt2560_rf2524_r2 +ffffffff8278a080 r rt2560_rf2525_hi_r2 +ffffffff8278a0c0 r rt2560_rf2525_r2 +ffffffff8278a100 r rt2560_rf2525e_r2 +ffffffff8278a140 r rt2560_rf2526_hi_r2 +ffffffff8278a180 r rt2560_rf2526_r2 +ffffffff8278a1c0 r rt2560_def_bbp +ffffffff8278a200 r rt2560_def_mac +ffffffff8278b000 r rt2661_rf5225_1 +ffffffff8278b300 r rt2661_rf5225_2 +ffffffff8278b600 r rt2661_def_bbp +ffffffff8278b640 r rt2661_def_mac +ffffffff8278c000 r rt2860_rf2850 +ffffffff8278c430 r rt2860_rates +ffffffff8278c4f0 r rt3572_def_rf +ffffffff8278c530 r rt3090_def_rf +ffffffff8278c560 r rt5392_def_rf +ffffffff8278c5e0 r rt3290_def_rf +ffffffff8278c640 r rt5390_def_rf +ffffffff8278c6c0 r rt5390_def_bbp +ffffffff8278c6f0 r rt2860_def_mac +ffffffff8278e000 r acx111_reg +ffffffff8278e040 r acx111_rate_map +ffffffff8278f000 r acx100_reg +ffffffff8278f040 r acx100_txpower_rfmd +ffffffff8278f060 r gen8_rcs_offsets +ffffffff8278f090 r acx100_txpower_maxim +ffffffff8278f0b0 r mtl_rcs_offsets +ffffffff8278f0f0 r digits +ffffffff8278f0f0 r pppdumpb.digits +ffffffff8278f0f0 r pppdumpm.digits +ffffffff8278f140 r hangpic +ffffffff8278f180 r gen11_rcs_offsets +ffffffff8278f1b0 r xehp_rcs_offsets +ffffffff8278f1e0 r dg2_rcs_offsets +ffffffff8278f220 r dg2_xcs_offsets +ffffffff8278f250 r gen12_xcs_offsets +ffffffff82790000 r trinity_override_mgpg_sequences +ffffffff827903c0 r voltage_swing_to_pre_emphasis +ffffffff827903d0 r sgpr_init_compute_shader +ffffffff827904a0 r intel_hpll_vco.cl_vco +ffffffff827904c0 r vgpr_init_compute_shader +ffffffff82791000 r malo_cmd_string.cmds +ffffffff827910b0 r malo_cmd_string_result.results +ffffffff82792000 R bwi_vendor_led_act +ffffffff8279200c R bwi_default_led_act +ffffffff82792010 R bwi_led_duration +ffffffff82792380 r bwi_sup_bphy +ffffffff827923c0 r bwi_phy_freq_11g_rev1 +ffffffff827925c0 r bwi_phy_rotor_11g_rev1 +ffffffff827926a0 r bwi_phy_noise_scale_11g_rev2 +ffffffff827926e0 r bwi_phy_noise_scale_11g_rev7 +ffffffff82792720 r bwi_phy_noise_scale_11g +ffffffff82792760 r bwi_phy_sigma_sq_11g_rev2 +ffffffff827927d0 r bwi_phy_sigma_sq_11g_rev7 +ffffffff82792840 r bwi_phy_delay_11g_rev1 +ffffffff82792920 r bwi_rf_get_gains.save_phy_regs +ffffffff82792940 r bwi_rf_lo_find.map +ffffffff82792960 r bwi_txpower_map_11b +ffffffff827929a0 r bwi_txpower_map_11g +ffffffff827929e0 r _bwi_rf_lo_update_11g.rf_atten_list +ffffffff82792a20 r _bwi_rf_lo_update_11g.rf_atten_init_list +ffffffff82792a60 r _bwi_rf_lo_update_11g.rf_lo_measure_order +ffffffff82792aa0 r bwi_rf_set_nrssi_ofs_11g.save_phy_comm_regs +ffffffff82792ac0 r bwi_bbpid_map +ffffffff82792af0 r bwi_regwin_count +ffffffff82792b40 r bwi_clkfreq +ffffffff82792b58 r bwi_zero_addr +ffffffff82793000 R uhci_bus_methods +ffffffff82793030 R uhci_root_ctrl_methods +ffffffff82793060 R uhci_root_intr_methods +ffffffff82793090 R uhci_device_ctrl_methods +ffffffff827930c0 R uhci_device_intr_methods +ffffffff827930f0 R uhci_device_bulk_methods +ffffffff82793120 R uhci_device_isoc_methods +ffffffff82793150 R uhci_devd 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ehci_confd +ffffffff82795175 R ehci_ifcd +ffffffff8279517e R ehci_endpd +ffffffff82795185 R ehci_hubd +ffffffff82796000 R xhci_bus_methods +ffffffff82796030 R xhci_root_ctrl_methods +ffffffff82796060 R xhci_root_intr_methods +ffffffff82796090 R xhci_device_ctrl_methods +ffffffff827960c0 R xhci_device_intr_methods +ffffffff827960f0 R xhci_device_bulk_methods +ffffffff82796120 R xhci_device_isoc_methods +ffffffff82796150 R xhci_devd +ffffffff82796162 R xhci_confd +ffffffff8279616b R xhci_ifcd +ffffffff82796174 R xhci_endpd +ffffffff8279617b R xhci_endpcd +ffffffff82796181 R xhci_hubd +ffffffff82799000 R radio_ca +ffffffff8279a000 R ipmi_ca +ffffffff8279b000 R vscsi_ca +ffffffff8279b028 R vscsi_switch +ffffffff8279b050 R vscsi_filtops +ffffffff8279c000 R mpath_ca +ffffffff8279c028 R mpath_switch +ffffffff8279d000 R softraid_ca +ffffffff8279d028 R sr_switch +ffffffff8279e000 r spdmem_basic_types +ffffffff8279e0a0 r spdmem_parity_types +ffffffff8279e0e0 r spdmem_ddr4_decode.ddr4_chipsize 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lintomulaw +ffffffff827af000 R randomread_filtops +ffffffff827af030 R randomwrite_filtops +ffffffff827b0000 R video_ca +ffffffff827b0028 R video_filtops +ffffffff827b1000 R cd9660_vfsops +ffffffff827b2000 R cd9660_vops +ffffffff827b2110 R cd9660_specvops +ffffffff827b2220 R cd9660_fifovops +ffffffff827b2330 R cd9660read_filtops +ffffffff827b2360 R cd9660write_filtops +ffffffff827b2390 R cd9660vnode_filtops +ffffffff827b3000 R udf_vfsops +ffffffff827b4000 R udf_vops +ffffffff827b4110 r mon_lens +ffffffff827b5000 r month_days +ffffffff827b6000 R execsw +ffffffff827b7000 r shstrtab +ffffffff827b8000 R copyright +ffffffff827b80c0 r initpaths +ffffffff827b9000 R sysent +ffffffff827bb000 R bufq_impls +ffffffff827bc000 R kqueueops +ffffffff827bc038 R kqread_filtops +ffffffff827bc068 R proc_filtops +ffffffff827bc098 R file_filtops +ffffffff827bc0c8 R timer_filtops +ffffffff827bc100 R sysfilt_ops +ffffffff827bc148 R seltrue_filtops +ffffffff827bc178 R dead_filtops +ffffffff827bc1a8 R badfd_filtops +ffffffff827bc1d8 r mutex_klistops +ffffffff827bc1f0 r rwlock_klistops +ffffffff827bd000 R kv_exec +ffffffff827be000 R addrmask +ffffffff827bf000 r rw_ops +ffffffff827c0000 r proc_printit.pstat +ffffffff827c1000 R pledge_syscalls +ffffffff827c1a60 r pledgenames +ffffffff827c1cb0 r pledgereq +ffffffff827c2000 r unvname_rbt_RBT_INFO +ffffffff827c2018 R unvname_rbt_RBT_TYPE +ffffffff827c3000 R sig_filtops +ffffffff827c3030 R sigprop +ffffffff827c4000 R kern_vars +ffffffff827c42f0 R hw_vars +ffffffff827c5000 R tc_vars +ffffffff827c6000 r sys_gettimeofday.zerotz +ffffffff827c7000 r taskq_sys_name +ffffffff827c7006 r taskq_sys_mp_name +ffffffff827c7010 R systq +ffffffff827c7018 R systqmp +ffffffff827c9000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff827c9010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff827c9020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff827c9030 r gpt_get_fstype.gpt_uuid_linux +ffffffff827c9040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff827c9050 r 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R msdosfs_vfsops +ffffffff827e2000 R msdosfs_vops +ffffffff827e2110 R msdosfsread_filtops +ffffffff827e2140 R msdosfswrite_filtops +ffffffff827e2170 R msdosfsvnode_filtops +ffffffff827e3000 r _utf_count +ffffffff827e4000 R ntfs_vfsops +ffffffff827e5000 R ntfs_vops +ffffffff827e6000 R bpfread_filtops +ffffffff827e6030 R bpf_mbuf_ops +ffffffff827e7000 r bpf_mem_ops +ffffffff827e8000 R priq_ops +ffffffff827e8038 R ifq_priq_ops +ffffffff827e8040 r ifq_kstat_tpl +ffffffff827e8180 r ifiq_kstat_tpl +ffffffff827e9000 r ether_crc32_le_update.crctab +ffffffff827e9040 r ether_crc32_be_update.crctab +ffffffff827ea000 r lcp +ffffffff827ea078 r ipcp +ffffffff827ea0f0 r ipv6cp +ffffffff827ea168 r chap +ffffffff827ea1e0 r pap +ffffffff827eb000 R ifmedia_baudrate_descriptions +ffffffff827ec000 r fcstab +ffffffff827ee000 R tunread_filtops +ffffffff827ee030 R tunwrite_filtops +ffffffff827ef000 R bridge_brport +ffffffff827f0000 R bstp_etheraddr +ffffffff827f1000 r eb_tree_RBT_INFO +ffffffff827f1018 R eb_tree_RBT_TYPE +ffffffff827f2000 r veb_etherbridge_ops +ffffffff827f2028 r veb_pf_ipv4 +ffffffff827f2040 r veb_pf_ipv6 +ffffffff827f3000 r pipex_pppoe_padding +ffffffff827f4000 r rn_addmask.normal_chars +ffffffff827f5000 R route_src +ffffffff827f5010 R route_usrreqs +ffffffff827f50b8 R routedomain +ffffffff827f5100 R routesw +ffffffff827f6000 R gre_vars +ffffffff827f6030 r mgre_tree_RBT_INFO +ffffffff827f6048 R mgre_tree_RBT_TYPE +ffffffff827f6050 r egre_tree_RBT_INFO +ffffffff827f6068 R egre_tree_RBT_TYPE +ffffffff827f6070 r nvgre_ucast_tree_RBT_INFO +ffffffff827f6088 R nvgre_ucast_tree_RBT_TYPE +ffffffff827f6090 r nvgre_mcast_tree_RBT_INFO +ffffffff827f60a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff827f60b0 r eoip_tree_RBT_INFO +ffffffff827f60c8 R eoip_tree_RBT_TYPE +ffffffff827f60d0 r nvgre_etherbridge_ops +ffffffff827f7000 r trunk_protos +ffffffff827f8000 R ethermulticastaddr_slowprotocols +ffffffff827f8006 R lacp_info_tlv_template +ffffffff827f800e R marker_info_tlv_template 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ufsvnode_filtops +ffffffff82838000 R ext2fs_vfsops +ffffffff82838070 r incompat +ffffffff82839000 R ext2fs_vops +ffffffff82839110 R ext2fs_specvops +ffffffff82839220 R ext2fs_fifovops +ffffffff8283a000 R uaddr_kernel_functions +ffffffff8283a030 R uaddr_rnd_functions +ffffffff8283a060 R uaddr_bestfit_functions +ffffffff8283a090 R uaddr_pivot_functions +ffffffff8283a0c0 R uaddr_stack_brk_functions +ffffffff8283a0f0 r uaddr_free_rbtree_RBT_INFO +ffffffff8283a108 R uaddr_free_rbtree_RBT_TYPE +ffffffff8283b000 R aobj_pager +ffffffff8283c000 R uvm_deviceops +ffffffff8283d000 R kv_any +ffffffff8283d018 R kv_intrsafe +ffffffff8283d030 R kv_page +ffffffff8283d048 R kp_dirty +ffffffff8283d070 R kp_dma +ffffffff8283d098 R kp_dma_contig +ffffffff8283d0c0 R kp_dma_zero +ffffffff8283d0e8 R kp_zero +ffffffff8283d110 R kp_pageable +ffffffff8283d138 R kp_none +ffffffff8283d160 R kd_waitok +ffffffff8283d178 R kd_nowait +ffffffff8283d190 R kd_trylock +ffffffff8283e000 R vmmapbsy +ffffffff8283e010 r page_flagbits +ffffffff8283e0a8 r uvm_map_addr_RBT_INFO +ffffffff8283e0c0 R uvm_map_addr_RBT_TYPE +ffffffff8283f000 R pmap_pager +ffffffff8283f048 R bufcache_pager +ffffffff82840000 r uvm_objtree_RBT_INFO +ffffffff82840018 R uvm_objtree_RBT_TYPE +ffffffff82841000 r uvm_pmr_addr_RBT_INFO +ffffffff82841018 R uvm_pmr_addr_RBT_TYPE +ffffffff82841020 r uvm_pmr_size_RBT_INFO +ffffffff82841038 R uvm_pmr_size_RBT_TYPE +ffffffff82841040 r uvm_pmemrange_addr_RBT_INFO +ffffffff82841058 R uvm_pmemrange_addr_RBT_TYPE +ffffffff82842000 R uvm_vnodeops +ffffffff82842048 r uvn_flush.interval +ffffffff82843000 R zeroin6_addr +ffffffff82844000 R in6addr_any +ffffffff82844010 R in6addr_loopback +ffffffff82844020 R in6addr_intfacelocal_allnodes +ffffffff82844030 R in6addr_linklocal_allnodes +ffffffff82844040 R in6addr_linklocal_allrouters +ffffffff82844050 R in6mask0 +ffffffff82844060 R in6mask32 +ffffffff82844070 R in6mask64 +ffffffff82844080 R in6mask96 +ffffffff82844090 R in6mask128 +ffffffff828440a0 R sa6_any +ffffffff82845000 R divert6ctl_vars +ffffffff82845030 R divert6_usrreqs +ffffffff82846000 R inet6domain +ffffffff82846050 R inet6sw +ffffffff82847000 R icmpv6ctl_vars +ffffffff82848000 R inet6ctlerrmap +ffffffff82848020 R ipv6ctl_vars +ffffffff82849000 R rip6_usrreqs +ffffffff8284a000 R pfkey_addr +ffffffff8284a010 R pfkeyv2_usrreqs +ffffffff8284a0b8 R pfkeydomain +ffffffff8284a100 R pfkeysw +ffffffff8284a160 r ealgs +ffffffff8284a190 r aalgs +ffffffff8284a1c0 r calgs +ffffffff8284b000 R sadb_exts_allowed_out +ffffffff8284b090 R sadb_exts_required_out +ffffffff8284d000 r opc82_byte_operation +ffffffff8284d040 r opc83_long_operation +ffffffff8284d080 r opc83_word_operation +ffffffff8284d0c0 r opcD0_byte_operation +ffffffff8284d100 r opcD1_long_operation +ffffffff8284d140 r opcD1_word_operation +ffffffff8284e000 r crc_table +ffffffff8284e400 r crc_braid_table +ffffffff82850400 r x2n_table +ffffffff82851000 r inflateBack.order ffffffff82851030 r fixedtables.lenfix ffffffff82851830 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nvme_msi_blacklist +ffffffff828ef000 R ami_pci_ca +ffffffff828ef030 r ami_pci_subsys +ffffffff828ef270 r ami_pci_vendors +ffffffff828f0000 R mfi_pci_ca +ffffffff828f0030 r mfi_pci_devices +ffffffff828f1000 R mfii_ca +ffffffff828f1028 R mfii_switch +ffffffff828f1050 R mfii_pd_switch +ffffffff828f1078 R mfii_iop_thunderbolt +ffffffff828f1088 R mfii_iop_25 +ffffffff828f1098 R mfii_iop_35 +ffffffff828f10b0 R mfii_devices +ffffffff828f1180 r mfi_bbu_indicators +ffffffff828f2000 R ips_ca +ffffffff828f2028 r ips_ids +ffffffff828f2040 r ips_chips +ffffffff828f2090 r ips_names +ffffffff828f2128 r ips_switch +ffffffff828f2150 r ips_pt_switch +ffffffff828f3000 R eap_ca +ffffffff828f3028 R eap1370_hw_if +ffffffff828f30e0 R eap1371_hw_if +ffffffff828f3198 R eap_midi_hw_if +ffffffff828f31d0 R eap_devices +ffffffff828f4000 R auacer_pci_devices +ffffffff828f4008 R auacer_ca +ffffffff828f4030 R auacer_hw_if +ffffffff828f5000 R auich_ca +ffffffff828f5028 R auich_hw_if +ffffffff828f50e0 r auich_devices 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+ffffffff8297b000 R aq_devices +ffffffff8297b060 R aq_products +ffffffff8297b1d0 R aq_fw1x_ops +ffffffff8297b1f8 R aq_fw2x_ops +ffffffff8297b220 R aq2_fw_ops +ffffffff8297b248 R aq_ca +ffffffff8297c000 R de_ca +ffffffff8297c030 r tulip_srom_conninfo +ffffffff8297c120 r tulip_mii_phy_attrlist +ffffffff8297c1e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff8297c208 r tulip_21040_10baset_only_boardsw +ffffffff8297c230 r tulip_21040_boardsw +ffffffff8297c258 r tulip_2114x_isv_boardsw +ffffffff8297c280 r tulip_21140_smc9332_boardsw +ffffffff8297c2a8 r tulip_21040_auibnc_only_boardsw +ffffffff8297c2d0 r tulip_21140_cogent_em100_boardsw +ffffffff8297c2f8 r tulip_21140_accton_boardsw +ffffffff8297c320 r tulip_21140_eb_boardsw +ffffffff8297c348 r tulip_21041_boardsw +ffffffff8297c370 r tulip_read_macaddr.testpat +ffffffff8297c380 r tulip_vendors +ffffffff8297c430 r tulip_media_to_ifmedia +ffffffff8297c490 r tulip_chipdescs +ffffffff8297d000 R ep_pci_ca +ffffffff8297d030 R ep_pci_devices +ffffffff8297e000 R pcn_ca +ffffffff8297e028 R pcn_devices +ffffffff8297e030 r pcn_79c970_rcvfw +ffffffff8297e050 r pcn_79c970_xmtsp +ffffffff8297e070 r pcn_79c970_xmtfw +ffffffff8297e090 r pcn_79c971_rcvfw +ffffffff8297e0b0 r pcn_79c971_xmtsp_sram +ffffffff8297e0d0 r pcn_79c971_xmtsp +ffffffff8297e0f0 r pcn_79c971_xmtfw +ffffffff8297e110 r pcn_variants +ffffffff8297f000 R siop_products +ffffffff82980000 R siop_pci_ca +ffffffff82981000 R rdcide_setup +ffffffff82981005 R rdcide_hold +ffffffff8298100a R rdcide_udmatim +ffffffff82981010 R rdcide_udmaclk +ffffffff82981028 R default_product_desc +ffffffff82981040 R pciide_intel_products +ffffffff82981630 R pciide_amd_products +ffffffff82981690 R pciide_cmd_products +ffffffff82981730 R pciide_via_products +ffffffff82981810 R pciide_cypress_products +ffffffff82981820 R pciide_sis_products +ffffffff82981870 R pciide_natsemi_products +ffffffff82981890 R pciide_acer_products +ffffffff829818a0 R pciide_triones_products +ffffffff829818f0 R pciide_promise_products +ffffffff82981ac0 R pciide_acard_products +ffffffff82981b10 R pciide_serverworks_products +ffffffff82981bb0 R pciide_nvidia_products +ffffffff82981e80 R pciide_ite_products +ffffffff82981ea0 R pciide_ati_products +ffffffff82981f20 R pciide_jmicron_products +ffffffff82981f70 R pciide_phison_products +ffffffff82981f80 R pciide_rdc_products +ffffffff82981f90 R pciide_vendors +ffffffff82982140 R pciide_pci_ca +ffffffff82982168 R pciide_jmb_ca +ffffffff82982190 r piix_isp_dma +ffffffff82982193 r piix_rtc_dma +ffffffff82982196 r apollo_pio_set +ffffffff8298219b r cmd0643_9_data_tim_pio +ffffffff829821a0 r cmd0643_9_data_tim_dma +ffffffff829821a3 r cmd680_channel_map.init_val +ffffffff829821b1 r cmd680_setup_channel.udma2_tbl +ffffffff829821b8 r cmd680_setup_channel.dma_tbl +ffffffff829821be r cmd680_setup_channel.pio_tbl +ffffffff829821d0 r satalink_ba5_regmap +ffffffff82982690 r sii3114_chansetup.channel_names +ffffffff829826b0 r cy_pio_pulse +ffffffff829826c0 r sis_udma133new_tim +ffffffff829826e0 r sis_pio133new_tim +ffffffff829826f4 r sis_dma133new_tim +ffffffff82982700 r sis_udma66_tim +ffffffff82982706 r sis_udma100new_tim +ffffffff8298270c r sis_udma133old_tim +ffffffff82982713 r sis_pio_act +ffffffff82982718 r sis_pio_rec +ffffffff8298271d r natsemi_pio_pulse +ffffffff82982722 r natsemi_pio_recover +ffffffff82982727 r natsemi_dma_pulse +ffffffff8298272a r natsemi_dma_recover +ffffffff82982730 r scx200_udma33 +ffffffff8298273c r scx200_dma33 +ffffffff82982750 r scx200_pio33 +ffffffff82982778 r acer_udma +ffffffff8298277e r acer_pio +ffffffff82982790 r hpt370_pio +ffffffff829827a4 r hpt370_dma +ffffffff829827b0 r hpt370_udma +ffffffff829827d0 r hpt372_pio +ffffffff829827e4 r hpt372_dma +ffffffff829827f0 r hpt372_udma +ffffffff8298280c r hpt366_dma +ffffffff82982820 r hpt366_udma +ffffffff82982840 r hpt374_pio +ffffffff82982854 r hpt374_dma +ffffffff82982860 r hpt374_udma +ffffffff8298287c r pdc2xx_pa +ffffffff82982881 r pdc2xx_pb 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tuners +ffffffff8298c170 r freqTable +ffffffff8298c260 r nabcst +ffffffff8298c2a0 r irccable +ffffffff8298c310 r hrccable +ffffffff8298c380 r weurope +ffffffff8298c420 r jpnbcst +ffffffff8298c460 r jpncable +ffffffff8298c4c0 r xussr +ffffffff8298c530 r australia +ffffffff8298c590 r france +ffffffff8298d000 R xl_pci_ca +ffffffff8298d030 R xl_pci_devices +ffffffff8298e000 R fxp_pci_ca +ffffffff8298e030 R fxp_pci_devices +ffffffff8298f000 R em_devices +ffffffff8298f308 R em_ca +ffffffff8298f330 r em_counters +ffffffff82990000 r em_igp_cable_length_table +ffffffff82990100 r em_igp_2_cable_length_table +ffffffff82991000 R ixgb_devices +ffffffff82991010 R ixgb_ca +ffffffff82992000 R ixgbe_devices +ffffffff829920b8 R ix_ca +ffffffff829920e0 r ix_counters +ffffffff829923e0 r ix_rxq_kstats_tpl +ffffffff82992458 r ix_txq_kstats_tpl +ffffffff82993000 r ixgbe_mvals_base +ffffffff82993060 r ixgbe_mvals_X540 +ffffffff829930c0 r ixgbe_mvals_X550 +ffffffff82993120 r ixgbe_mvals_X550EM_x +ffffffff82993180 r ixgbe_mvals_X550EM_a +ffffffff82996000 R ixl_ca +ffffffff82996030 R ixl_port_counters +ffffffff829962c0 R ixl_vsi_counters +ffffffff82996380 r ixl_devices +ffffffff829964c0 r ixl_710 +ffffffff829964e8 r ixl_722 +ffffffff82996510 r ixl_pf_aq_regs +ffffffff82996578 r ixl_710_decrepit +ffffffff829965a0 r ixl_phy_type_map +ffffffff82996770 r ixl_speed_type_map +ffffffff829967b0 r ixl_hmc_pack_rxq +ffffffff82996830 r ixl_hmc_pack_txq +ffffffff829968a0 r ixl_sfp_ops +ffffffff829968b8 r ixl_qsfp_ops +ffffffff82997000 r dwqe_pci_devices +ffffffff82997018 R dwqe_pci_ca +ffffffff82998000 R xge_ca +ffffffff82998028 R xge_devices +ffffffff82998030 r xge_fix_mac +ffffffff82998110 r xge_xena_dtx_cfg +ffffffff82998170 r xge_herc_dtx_cfg +ffffffff82999000 R thtc_ca +ffffffff82999028 R tht_ca +ffffffff82999050 r thtc_devices +ffffffff82999068 r tht_link_state.interval +ffffffff8299a000 R myx_ca +ffffffff8299a028 R myx_devices +ffffffff8299b000 R oce_ca +ffffffff8299b030 R oce_devices +ffffffff8299c000 R dc_pci_ca +ffffffff8299d000 R epic_pci_ca +ffffffff8299d028 R epic_pci_devices +ffffffff8299e000 R ti_pci_ca +ffffffff8299e030 R ti_devices +ffffffff8299f000 R ne_pci_ca +ffffffff8299f030 R ne_pci_prod +ffffffff829a0000 R gem_pci_ca +ffffffff829a0030 R gem_pci_devices +ffffffff829a0050 r gem_promhdr +ffffffff829a0052 r gem_promdat +ffffffff829a005a r gem_promdat2 +ffffffff829a1000 R cas_ca +ffffffff829a1028 R cas_pci_devices +ffffffff829a1030 r cas_promhdr +ffffffff829a1032 r cas_promdat_sun +ffffffff829a103a r cas_promdat_ns +ffffffff829a1042 r cas_promdat2 +ffffffff829a2000 R sf_pci_ca +ffffffff829a2028 R sf_pci_products +ffffffff829a3000 R sis_ca +ffffffff829a3028 R sis_devices +ffffffff829a4000 R se_devices +ffffffff829a4008 R se_ca +ffffffff829a5000 R mbg_ca +ffffffff829a5030 R mbg_devices +ffffffff829a6000 R uhci_pci_ca +ffffffff829a7000 R ohci_pci_ca +ffffffff829a8000 R ehci_pci_ca +ffffffff829a9000 R xhci_pci_ca +ffffffff829aa000 R cbb_pci_ca +ffffffff829aa028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff829ab000 R skc_devices +ffffffff829ab030 R skc_ca +ffffffff829ab058 R sk_ca +ffffffff829ac000 R mskc_devices +ffffffff829ac0a8 R mskc_ca +ffffffff829ac0d0 R msk_ca +ffffffff829ac100 r msk_mib +ffffffff829ad000 R puc_pci_ca +ffffffff829ae000 R puc_devs +ffffffff829b3000 R com_puc_ca +ffffffff829b3030 r puc_port_types +ffffffff829b4000 R lpt_puc_ca +ffffffff829b5000 R wi_pci_ca +ffffffff829b5030 r wi_pci_products +ffffffff829b6000 R an_pci_ca +ffffffff829b6030 R an_pci_devices +ffffffff829b7000 R iwi_devices +ffffffff829b7010 R iwi_ca +ffffffff829b8000 R wpi_ca +ffffffff829b8028 r wpi_devices +ffffffff829b8030 r wpi_rates +ffffffff829b8050 r wpi_rf_gain_5ghz +ffffffff829b80a0 r wpi_dsp_gain_5ghz +ffffffff829b80f0 r wpi_rf_gain_2ghz +ffffffff829b8140 r wpi_dsp_gain_2ghz +ffffffff829b8190 r wpi_pmgt +ffffffff829b8310 r wpi_bands +ffffffff829b9000 R iwn_mcs2ridx +ffffffff829b9020 R iwn_ca +ffffffff829b9050 r iwn_devices +ffffffff829b90e8 r iwn4965_sensitivity_limits +ffffffff829b9124 r iwn5000_sensitivity_limits +ffffffff829b9160 r iwn5150_sensitivity_limits +ffffffff829b919c r iwn1000_sensitivity_limits +ffffffff829b91d8 r iwn6000_sensitivity_limits +ffffffff829b9214 r iwn2000_sensitivity_limits +ffffffff829b9250 r iwn_fw_errmsg +ffffffff829b9340 r iwn4965_set_txpower.tdiv +ffffffff829b9360 r iwn4965_rf_gain_5ghz +ffffffff829b93d0 r iwn4965_dsp_gain_5ghz +ffffffff829b9440 r iwn4965_dsp_gain_2ghz +ffffffff829b94b0 r iwn_pmgt +ffffffff829b96f0 r iwn4965_post_alive.qid2fifo +ffffffff829b9700 r iwn_bands +ffffffff829b9770 r iwn_rates +ffffffff829b9820 r iwn4965_rf_gain_2ghz +ffffffff829ba000 R iwm_nvm_channels +ffffffff829ba030 R iwm_nvm_channels_8000 +ffffffff829ba070 R iwm_rates +ffffffff829ba0d0 R iwm_ht_mcs2ridx +ffffffff829ba110 R iwm_tid_to_ac +ffffffff829ba118 R iwm_ac_to_tx_fifo +ffffffff829ba120 R iwm_nvm_to_read +ffffffff829ba144 r iwm_set_hw_address_8000.reserved_mac +ffffffff829ba180 r iwm_sf_full_timeout +ffffffff829ba1b0 r iwm_sf_full_timeout_def +ffffffff829ba1e0 r advanced_lookup +ffffffff829ba320 r iwm_devices +ffffffff829ba360 R iwm_ca +ffffffff829bb000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff829bb020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff829bb040 R iwx_qu_b0_hr1_b0 +ffffffff829bb060 R iwx_qu_b0_hr_b0 +ffffffff829bb080 R iwx_ax201_cfg_qu_hr +ffffffff829bb0a0 R iwx_qu_c0_hr1_b0 +ffffffff829bb0c0 R iwx_qu_c0_hr_b0 +ffffffff829bb0e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff829bb100 R iwx_quz_a0_hr1_b0 +ffffffff829bb120 R iwx_ax201_cfg_quz_hr +ffffffff829bb140 R iwx_cfg_so_a0_hr_b0 +ffffffff829bb160 R iwx_cfg_quz_a0_hr_b0 +ffffffff829bb180 R iwx_2ax_cfg_so_gf_a0 +ffffffff829bb1a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff829bb1c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff829bb1e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff829bb200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff829bb220 R iwx_2ax_cfg_so_jf_b0 +ffffffff829bb240 R iwx_nvm_channels_8000 +ffffffff829bb280 R iwx_rates +ffffffff829bb2e0 R iwx_mcs2ridx +ffffffff829bb320 R iwx_tid_to_ac +ffffffff829bb328 R iwx_ac_to_tx_fifo +ffffffff829bb330 r iwx_nvm_channels_uhb +ffffffff829bb39e r iwx_is_valid_mac_addr.reserved_mac +ffffffff829bb3b0 r iwx_sf_full_timeout +ffffffff829bb3e0 r iwx_sf_full_timeout_def +ffffffff829bb410 r advanced_lookup +ffffffff829bb550 r iwx_devices +ffffffff829bb590 r iwx_dev_info_table +ffffffff829bbe18 R iwx_ca +ffffffff829bc000 R cmpci_ca +ffffffff829bc028 R cmpci_hw_if +ffffffff829bc0e0 r cmpci_rate_table +ffffffff829bc120 R cmpci_devices +ffffffff829bc130 r cmpci_query_devinfo.mixer_port_names +ffffffff829bc160 r cmpci_query_devinfo.mixer_classes +ffffffff829bd000 R iha_pci_ca +ffffffff829bd028 R iha_switch +ffffffff829be000 R pcscp_ca +ffffffff829bf000 R bge_ca +ffffffff829bf030 R bge_devices +ffffffff829bf1b0 r bge_revisions +ffffffff829bf610 r bge_majorrevs +ffffffff829bf790 r bge_kstat_tpl +ffffffff829c0000 R bnx_devices +ffffffff829c0020 R bnx_ca +ffffffff829c1000 R vge_ca +ffffffff829c1028 R vge_devices +ffffffff829c2000 R stge_ca +ffffffff829c2028 R stge_mii_bitbang_ops +ffffffff829c2050 R stge_devices +ffffffff829c3000 R nfe_ca +ffffffff829c3030 R nfe_devices +ffffffff829c4000 R et_devices +ffffffff829c4008 R et_ca +ffffffff829c5000 R jme_devices +ffffffff829c5008 R jme_ca +ffffffff829c6000 R age_devices +ffffffff829c6008 R age_ca +ffffffff829c7000 R alc_devices +ffffffff829c7038 R alc_ca +ffffffff829c8000 R ale_devices +ffffffff829c8008 R ale_ca +ffffffff829c9000 R amdpm_ca +ffffffff829c9030 R amdpm_ids +ffffffff829ca000 R bce_ca +ffffffff829ca028 R bce_devices +ffffffff829cb000 R ath_pci_ca +ffffffff829cc000 R athn_pci_ca +ffffffff829cc030 r athn_pci_devices +ffffffff829cd000 R atw_pci_ca +ffffffff829cd028 R atw_pci_devices +ffffffff829ce000 R rtw_pci_ca +ffffffff829ce030 R rtw_pci_products +ffffffff829cf000 R rtwn_pci_ca +ffffffff829cf030 r rtwn_pci_devices +ffffffff829cf040 r rtl8188eu_mac +ffffffff829cf1b0 r rtl8192cu_mac +ffffffff829cf310 r rtl8192ce_mac +ffffffff829cf458 r rtl8188eu_bb_prog +ffffffff829cf480 r rtl8723a_bb_prog +ffffffff829cf4a8 r rtl8192ce_bb_prog_1t +ffffffff829cf4d0 r rtl8192ce_bb_prog_2t +ffffffff829cf500 r rtl8188eu_bb_regs +ffffffff829cf680 r rtl8188eu_bb_vals +ffffffff829cf980 r rtl8188eu_agc_vals +ffffffff829cfb80 r rtl8723a_bb_regs +ffffffff829cfd00 r rtl8723a_bb_vals +ffffffff829cfff0 r rtl8192ce_agc_vals +ffffffff829d0270 r rtl8192ce_bb_regs +ffffffff829d03f0 r rtl8192ce_bb_vals_1t +ffffffff829d06e0 r rtl8192ce_bb_vals_2t +ffffffff829d1000 R ral_pci_ca +ffffffff829d1030 R ral_pci_devices +ffffffff829d2000 R acx_pci_ca +ffffffff829d2028 R acx_pci_devices +ffffffff829d3000 R pgt_pci_ca +ffffffff829d3028 R pgt_pci_devices +ffffffff829d4000 R malo_pci_ca +ffffffff829d4028 R malo_pci_devices +ffffffff829d5000 R bwi_pci_ca +ffffffff829d5030 R bwi_pci_devices +ffffffff829d6000 R piixpm_ca +ffffffff829d6030 R piixpm_ids +ffffffff829d7000 R vic_ca +ffffffff829d7028 R vic_devices +ffffffff829d8000 R vmx_devices +ffffffff829d8008 R vmx_ca +ffffffff829d8030 r vmx_tx_kstat_tpl +ffffffff829d80d0 r vmx_kstat_rate +ffffffff829d80e0 r vmx_rx_kstat_tpl +ffffffff829d9000 R vmwpvs_ca +ffffffff829d9028 R vmwpvs_switch +ffffffff829da000 R lii_ca +ffffffff829da028 R lii_devices +ffffffff829db000 R ichiic_ca +ffffffff829db030 R ichiic_ids +ffffffff829dc000 R viapm_ca +ffffffff829dc030 R viapm_ids +ffffffff829dc070 r val_to_temp +ffffffff829dc870 r val_to_uV.mult +ffffffff829dd000 R amdiic_ca +ffffffff829dd028 R amdiic_ids +ffffffff829de000 R nviic_ca +ffffffff829de030 R nviic_ids +ffffffff829df000 R sdhc_pci_ca +ffffffff829e0000 R kate_ca +ffffffff829e0030 r kate_proc +ffffffff829e1000 R km_ca +ffffffff829e1030 r km_devices +ffffffff829e2000 R ksmn_ca +ffffffff829e2030 r ksmn_devices +ffffffff829e3000 R iosf_pci_ca +ffffffff829e4000 R itherm_devices +ffffffff829e4008 R itherm_ca +ffffffff829e5000 R pchtemp_ca +ffffffff829e5030 R pchtemp_devices +ffffffff829e6000 R rtsx_pci_ca +ffffffff829e7000 R xspd_ca +ffffffff829e7028 R xspd_devices +ffffffff829e8000 R virtio_pci_ca +ffffffff829e9000 R dwiic_pci_ca +ffffffff829e9030 R dwiic_pci_ids +ffffffff829ea000 R bwfm_pci_ca +ffffffff829ea030 r bwfm_pci_devices +ffffffff829eb000 R ccp_pci_ca +ffffffff829eb030 r ccp_pci_devices +ffffffff829ec000 R bnxt_devices +ffffffff829ec040 R bnxt_ca +ffffffff829ed000 R mcx_ca +ffffffff829ed030 r mcx_devices +ffffffff829ed060 r mcx_rss_config +ffffffff829ed0d0 r mcx_eth_cap_map +ffffffff829ed2d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff829ed2e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff829ed300 r mcx_kstat_ppcnt_rfc2819 +ffffffff829ed318 r mcx_kstat_ppcnt_rfc3635 +ffffffff829ed330 r mcx_ppcnt_ieee8023_tpl +ffffffff829ed4b0 r mcx_ppcnt_rfc2863_tpl +ffffffff829ed5c0 r mcx_ppcnt_rfc2819_tpl +ffffffff829ed770 r mcx_ppcnt_rfc3635_tpl +ffffffff829ed8b0 r mcx_kstat_mtmp_tpl +ffffffff829ed950 r mcx_kstat_mtmp_rate +ffffffff829ed960 r mcx_queue_kstat_tpl +ffffffff829ee000 R iavf_ca +ffffffff829ee030 r iavf_devices +ffffffff829ee040 r iavf_aq_regs +ffffffff829ee0b0 r iavf_link_speeds +ffffffff829ef000 R rge_ca +ffffffff829ef028 R rge_devices +ffffffff829ef030 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff829ef050 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff829ef0b0 r rtl8125_mac_cfg3_mcu +ffffffff829ef950 r rtl8125_mac_cfg5_mcu +ffffffff829f0970 r rtl8125_mac_bps +ffffffff829f0d70 r rtl8125b_mac_bps +ffffffff829f0f98 r rge_kstats_tpl +ffffffff829f2000 R igc_devices +ffffffff829f2040 R igc_ca +ffffffff829f3000 R ngbe_devices +ffffffff829f3008 R ngbe_ca +ffffffff829f4000 R com_pci_ca +ffffffff829f4030 R com_pci_ids +ffffffff829f5000 r agp_attach.agp_max +ffffffff829f5048 R agp_ca +ffffffff829f6000 R intagp_ca +ffffffff829f7000 r drm_plane_create_rotation_property.props +ffffffff829f8000 r drm_bridge_priv_state_funcs +ffffffff829fa000 r color_encoding_name +ffffffff829fa020 r color_range_name +ffffffff829fb000 r drm_subpixel_enum_list +ffffffff829fb060 r drm_dpms_enum_list +ffffffff829fb0a0 r drm_dvi_i_select_enum_list +ffffffff829fb0d0 r drm_dvi_i_subconnector_enum_list +ffffffff829fb100 r drm_tv_mode_enum_list +ffffffff829fb170 r drm_tv_select_enum_list +ffffffff829fb1c0 r drm_tv_subconnector_enum_list +ffffffff829fb210 r drm_dp_subconnector_enum_list +ffffffff829fb280 r colorspace_names +ffffffff829fb300 r drm_link_status_enum_list +ffffffff829fb320 r drm_scaling_mode_enum_list +ffffffff829fb360 r drm_aspect_ratio_enum_list +ffffffff829fb390 r drm_content_type_enum_list +ffffffff829fb3e0 r drm_panel_orientation_enum_list +ffffffff829fb420 r privacy_screen_enum +ffffffff829fc000 r drm_crtc_fence_ops +ffffffff829fd000 r drm_dmt_modes +ffffffff829ff940 r edid_cea_modes_1 +ffffffff82a034d0 r edid_cea_modes_193 +ffffffff82a04180 r edid_quirk_list +ffffffff82a04360 r drm_mode_do_interlace_quirk.cea_interlaced +ffffffff82a043a0 r edid_4k_modes +ffffffff82a04600 r edid_est_modes +ffffffff82a04e00 r est3_modes +ffffffff82a04f60 r stereo_mandatory_modes +ffffffff82a04fe0 r extra_modes +ffffffff82a06000 r drm_encoder_enum_list +ffffffff82a08000 r drm_fbdev_dma_helper_funcs +ffffffff82a08010 r drm_fbdev_dma_client_funcs +ffffffff82a08030 r drm_fbdev_dma_fb_ops +ffffffff82a09000 r drm_fbdev_generic_helper_funcs +ffffffff82a09010 r drm_fbdev_generic_client_funcs +ffffffff82a09030 r drm_fbdev_generic_fb_ops +ffffffff82a0b000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82a0b004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82a0b008 r drm_fb_xrgb8888_to_xrgb1555.dst_pixsize +ffffffff82a0b00c r drm_fb_xrgb8888_to_argb1555.dst_pixsize +ffffffff82a0b010 r drm_fb_xrgb8888_to_rgba5551.dst_pixsize +ffffffff82a0b014 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff82a0b018 r drm_fb_xrgb8888_to_argb8888.dst_pixsize +ffffffff82a0b01c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82a0b020 r drm_fb_xrgb8888_to_argb2101010.dst_pixsize +ffffffff82a0b024 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82a0b028 r drm_fb_xrgb8888_to_xbgr8888.dst_pixsize +ffffffff82a0b02c r drm_fb_xrgb8888_to_abgr8888.dst_pixsize +ffffffff82a0c000 r __drm_format_info.formats +ffffffff82a0d000 R drm_pgops +ffffffff82a0e000 r drm_gem_dma_default_funcs +ffffffff82a0f000 R drm_gem_fb_funcs +ffffffff82a10000 r drm_ioctls +ffffffff82a12000 r dma_fence_stub_ops +ffffffff82a12040 R dma_fence_array_ops +ffffffff82a12080 R dma_fence_chain_ops +ffffffff82a120c0 R dmabufops +ffffffff82a120f8 R syncfileops +ffffffff82a13000 r drm_plane_type_enum_list +ffffffff82a14000 r tv_modes_parameters +ffffffff82a140c0 r drm_mode_status_names +ffffffff82a14200 r drm_named_modes +ffffffff82a15000 r primary_plane_funcs +ffffffff82a15068 r safe_modeset_formats +ffffffff82a16000 r orientation_data +ffffffff82a19718 r lcd800x1280_rightside_up +ffffffff82a19730 r lcd720x1280_rightside_up +ffffffff82a19748 r lcd800x1280_leftside_up +ffffffff82a19760 r lcd1080x1920_leftside_up +ffffffff82a19778 r lcd1200x1920_rightside_up +ffffffff82a19790 r gpd_micropc +ffffffff82a197a8 r gpd_pocket +ffffffff82a197c0 r gpd_pocket2 +ffffffff82a197d8 r gpd_win +ffffffff82a197f0 r gpd_win2 +ffffffff82a19808 r itworks_tw891 +ffffffff82a19820 r lcd1600x2560_rightside_up +ffffffff82a19838 r onegx1_pro +ffffffff82a19850 r lcd1600x2560_leftside_up +ffffffff82a19868 r lcd1280x1920_rightside_up +ffffffff82a19880 r gpd_onemix2s +ffffffff82a19898 r .compoundliteral +ffffffff82a198a8 r .compoundliteral.5 +ffffffff82a198d0 r .compoundliteral.9 +ffffffff82a198f0 r .compoundliteral.17 +ffffffff82a19930 r .compoundliteral.21 +ffffffff82a19950 r .compoundliteral.23 +ffffffff82a19960 r .compoundliteral.25 +ffffffff82a19970 r .compoundliteral.29 +ffffffff82a1a000 r drm_gem_prime_dmabuf_ops +ffffffff82a1c000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82a1d000 r drm_dp_phy_name.phy_names +ffffffff82a1d048 r drm_dp_i2c_algo +ffffffff82a1d058 r drm_dp_i2c_lock_ops +ffffffff82a1d070 r dp_aux_bl_ops +ffffffff82a1d090 r dpcd_quirk_list +ffffffff82a1d320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82a1e000 R drm_dp_mst_topology_state_funcs +ffffffff82a1e020 r drm_dp_mst_req_type_str.req_type_str +ffffffff82a1e1f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82a1e220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82a1e278 r drm_dp_mst_i2c_algo +ffffffff82a1f000 r rc_parameters_1_2_444 +ffffffff82a1f5f0 r rc_parameters_pre_scr +ffffffff82a1f920 r rc_parameters_1_2_422 +ffffffff82a1fdf0 r rc_parameters_1_2_420 +ffffffff82a21000 r hdmi_colorimetry_val +ffffffff82a22018 R ttm_bo_vm_ops +ffffffff82a23000 r ttm_range_manager_func +ffffffff82a24018 r ttm_kmap_iter_io_ops +ffffffff82a24030 r ttm_kmap_iter_linear_io_ops +ffffffff82a25000 r ttm_sys_manager_func +ffffffff82a26000 r ttm_kmap_iter_tt_ops +ffffffff82a27000 r drm_sched_fence_ops_scheduled +ffffffff82a27040 r drm_sched_fence_ops_finished +ffffffff82a28000 R ch7017_ops +ffffffff82a29000 R ch7xxx_ops +ffffffff82a29060 r ch7xxx_ids +ffffffff82a2a000 R ivch_ops +ffffffff82a2a060 r backup_addresses +ffffffff82a2b000 R ns2501_ops +ffffffff82a2b060 r mode_agnostic_values +ffffffff82a2b0e0 r ns2501_modes +ffffffff82a2c000 R sil164_ops +ffffffff82a2d000 R tfp410_ops +ffffffff82a2e000 r chv_dpll +ffffffff82a2e050 r vlv_dpll +ffffffff82a2e0a0 r g4x_dpll +ffffffff82a2e0f0 r pch_dpll +ffffffff82a2e138 r intel_dp_enc_funcs +ffffffff82a2f000 r intel_hdmi_enc_funcs +ffffffff82a30000 r vlv_primary_formats +ffffffff82a30030 r ivb_primary_formats +ffffffff82a30050 r i965_primary_formats +ffffffff82a30070 r i8xx_primary_formats +ffffffff82a30080 r i965_plane_funcs +ffffffff82a300e8 r i8xx_plane_funcs +ffffffff82a31000 r ilk_wm_funcs +ffffffff82a31040 r vlv_wm_funcs +ffffffff82a31080 r g4x_wm_funcs +ffffffff82a310c0 r nop_funcs +ffffffff82a31100 r pnv_wm_funcs +ffffffff82a31140 r i965_wm_funcs +ffffffff82a31180 r i9xx_wm_funcs +ffffffff82a311c0 r i845_wm_funcs +ffffffff82a31200 r cxsr_latency_table +ffffffff82a32000 r gen11_dsi_encoder_funcs +ffffffff82a32020 r gen11_dsi_connector_funcs +ffffffff82a32098 r gen11_dsi_connector_helper_funcs +ffffffff82a320f8 r gen11_dsi_host_ops +ffffffff82a33000 r intel_plane_helper_funcs +ffffffff82a34000 r g4x_audio_funcs +ffffffff82a34018 r ibx_audio_funcs +ffffffff82a34030 r hsw_audio_funcs +ffffffff82a34050 r hdmi_audio_clock +ffffffff82a340c0 r dp_aud_n_m +ffffffff82a34270 r hdmi_aud_ncts_36bpp +ffffffff82a34350 r hdmi_aud_ncts_30bpp +ffffffff82a34430 r hdmi_aud_ncts_24bpp +ffffffff82a35000 r intel_backlight_device_ops +ffffffff82a35018 r bxt_pwm_funcs +ffffffff82a35048 r cnp_pwm_funcs +ffffffff82a35078 r lpt_pwm_funcs +ffffffff82a350a8 r spt_pwm_funcs +ffffffff82a350d8 r pch_pwm_funcs +ffffffff82a35108 r ext_pwm_funcs +ffffffff82a35138 r vlv_pwm_funcs +ffffffff82a35168 r i965_pwm_funcs +ffffffff82a35198 r i9xx_pwm_funcs +ffffffff82a351c8 r pwm_bl_funcs +ffffffff82a36000 r bdb_blocks +ffffffff82a36160 r adlp_aux_ch_map +ffffffff82a36169 r adls_aux_ch_map +ffffffff82a36170 r rkl_aux_ch_map +ffffffff82a36175 r direct_aux_ch_map +ffffffff82a3617e r translate_iboost.mapping +ffffffff82a36181 r adlp_ddc_pin_map +ffffffff82a3618e r adls_ddc_pin_map +ffffffff82a3619b r rkl_pch_tgp_ddc_pin_map +ffffffff82a361a6 r gen9bc_tgp_ddc_pin_map +ffffffff82a361b1 r icp_ddc_pin_map +ffffffff82a361c0 r cnp_ddc_pin_map +ffffffff82a37000 r mtl_sa_info +ffffffff82a37006 r adlp_sa_info +ffffffff82a3700c r adls_sa_info +ffffffff82a37012 r rkl_sa_info +ffffffff82a37018 r tgl_sa_info +ffffffff82a37020 r intel_bw_funcs +ffffffff82a38000 r intel_cdclk_funcs +ffffffff82a38010 r mtl_cdclk_funcs +ffffffff82a38030 r mtl_cdclk_table +ffffffff82a38088 r tgl_cdclk_funcs +ffffffff82a380b0 r dg2_cdclk_table +ffffffff82a38160 r adlp_a_step_cdclk_table +ffffffff82a381e0 r rplu_cdclk_table +ffffffff82a382c8 r rplu_cdclk_funcs +ffffffff82a382f0 r adlp_cdclk_table +ffffffff82a383b0 r rkl_cdclk_table +ffffffff82a384a0 r icl_cdclk_table +ffffffff82a38588 r ehl_cdclk_funcs +ffffffff82a385a8 r icl_cdclk_funcs +ffffffff82a385c8 r bxt_cdclk_funcs +ffffffff82a385f0 r glk_cdclk_table +ffffffff82a38620 r bxt_cdclk_table +ffffffff82a38668 r skl_cdclk_funcs +ffffffff82a38688 r bdw_cdclk_funcs +ffffffff82a386a8 r hsw_cdclk_funcs +ffffffff82a386c8 r chv_cdclk_funcs +ffffffff82a386e8 r vlv_cdclk_funcs +ffffffff82a38708 r fixed_400mhz_cdclk_funcs +ffffffff82a38728 r ilk_cdclk_funcs +ffffffff82a38748 r gm45_cdclk_funcs +ffffffff82a38768 r g33_cdclk_funcs +ffffffff82a38788 r i965gm_cdclk_funcs +ffffffff82a387a8 r pnv_cdclk_funcs +ffffffff82a387c8 r i945gm_cdclk_funcs +ffffffff82a387e8 r i915gm_cdclk_funcs +ffffffff82a38808 r i915g_cdclk_funcs +ffffffff82a38828 r i865g_cdclk_funcs +ffffffff82a38848 r i85x_cdclk_funcs +ffffffff82a38868 r i845g_cdclk_funcs +ffffffff82a38888 r i830_cdclk_funcs +ffffffff82a388a8 r g33_get_cdclk.div_3200 +ffffffff82a388ae r g33_get_cdclk.div_4000 +ffffffff82a388b4 r g33_get_cdclk.div_4800 +ffffffff82a388ba r g33_get_cdclk.div_5333 +ffffffff82a388c0 r i965gm_get_cdclk.div_3200 +ffffffff82a388c3 r i965gm_get_cdclk.div_4000 +ffffffff82a388c6 r i965gm_get_cdclk.div_5333 +ffffffff82a39000 r chv_color_funcs +ffffffff82a39040 r vlv_color_funcs +ffffffff82a39080 r i965_color_funcs +ffffffff82a390c0 r i9xx_color_funcs +ffffffff82a39100 r tgl_color_funcs +ffffffff82a39140 r icl_color_funcs +ffffffff82a39180 r glk_color_funcs +ffffffff82a391c0 r skl_color_funcs +ffffffff82a39200 r bdw_color_funcs +ffffffff82a39240 r hsw_color_funcs +ffffffff82a39280 r ivb_color_funcs +ffffffff82a392c0 r ilk_color_funcs +ffffffff82a39300 r chv_cgm_csc_matrix_identity +ffffffff82a3931e r ilk_csc_matrix_rgb_to_ycbcr +ffffffff82a3933c r ilk_csc_matrix_limited_range +ffffffff82a3935a r ilk_csc_matrix_identity +ffffffff82a3a000 r icl_procmon_values +ffffffff82a3b000 r force_audio_names +ffffffff82a3b040 r broadcast_rgb_names +ffffffff82a3c000 r intel_crt_connector_funcs +ffffffff82a3c078 r intel_crt_enc_funcs +ffffffff82a3c0a0 r intel_spurious_crt_detect +ffffffff82a3c4a8 r intel_crt_connector_helper_funcs +ffffffff82a3d000 r g4x_crtc_funcs +ffffffff82a3d0c0 r i965_crtc_funcs +ffffffff82a3d180 r i915gm_crtc_funcs +ffffffff82a3d240 r i915_crtc_funcs +ffffffff82a3d300 r i8xx_crtc_funcs +ffffffff82a3d3c0 r bdw_crtc_funcs +ffffffff82a3d480 r ilk_crtc_funcs +ffffffff82a3e000 r output_format_str +ffffffff82a3e020 r output_type_str +ffffffff82a3f000 r intel_cursor_plane_funcs +ffffffff82a3f068 r intel_cursor_formats +ffffffff82a40000 r mtl_c10_hdmi_tables +ffffffff82a40170 r mtl_c10_hdmi_25_2 +ffffffff82a4018c r mtl_c10_hdmi_27_0 +ffffffff82a401a8 r mtl_c10_hdmi_27027 +ffffffff82a401c4 r mtl_c10_hdmi_28320 +ffffffff82a401e0 r mtl_c10_hdmi_30240 +ffffffff82a401fc r mtl_c10_hdmi_31500 +ffffffff82a40218 r mtl_c10_hdmi_36000 +ffffffff82a40234 r mtl_c10_hdmi_40000 +ffffffff82a40250 r mtl_c10_hdmi_49500 +ffffffff82a4026c r mtl_c10_hdmi_50000 +ffffffff82a40288 r mtl_c10_hdmi_57284 +ffffffff82a402a4 r mtl_c10_hdmi_58000 +ffffffff82a402c0 r mtl_c10_hdmi_65000 +ffffffff82a402dc r mtl_c10_hdmi_71000 +ffffffff82a402f8 r mtl_c10_hdmi_74176 +ffffffff82a40314 r mtl_c10_hdmi_74_25 +ffffffff82a40330 r mtl_c10_hdmi_75000 +ffffffff82a4034c r mtl_c10_hdmi_78750 +ffffffff82a40368 r mtl_c10_hdmi_85500 +ffffffff82a40384 r mtl_c10_hdmi_88750 +ffffffff82a403a0 r mtl_c10_hdmi_106500 +ffffffff82a403bc r mtl_c10_hdmi_108000 +ffffffff82a403d8 r mtl_c10_hdmi_115500 +ffffffff82a403f4 r mtl_c10_hdmi_119000 +ffffffff82a40410 r mtl_c10_hdmi_135000 +ffffffff82a4042c r mtl_c10_hdmi_138500 +ffffffff82a40448 r mtl_c10_hdmi_147160 +ffffffff82a40464 r mtl_c10_hdmi_148352 +ffffffff82a40480 r mtl_c10_hdmi_148_5 +ffffffff82a4049c r mtl_c10_hdmi_154000 +ffffffff82a404b8 r mtl_c10_hdmi_162000 +ffffffff82a404d4 r mtl_c10_hdmi_167000 +ffffffff82a404f0 r mtl_c10_hdmi_197802 +ffffffff82a4050c r mtl_c10_hdmi_198000 +ffffffff82a40528 r mtl_c10_hdmi_209800 +ffffffff82a40544 r mtl_c10_hdmi_241500 +ffffffff82a40560 r mtl_c10_hdmi_262750 +ffffffff82a4057c r mtl_c10_hdmi_268500 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dg2_hdmi_148_5 +ffffffff82a703f0 r dg2_hdmi_297 +ffffffff82a70414 r dg2_hdmi_594 +ffffffff82a70438 r dg2_hdmi_25200 +ffffffff82a7045c r dg2_hdmi_27027 +ffffffff82a70480 r dg2_hdmi_28320 +ffffffff82a704a4 r dg2_hdmi_30240 +ffffffff82a704c8 r dg2_hdmi_31500 +ffffffff82a704ec r dg2_hdmi_36000 +ffffffff82a70510 r dg2_hdmi_40000 +ffffffff82a70534 r dg2_hdmi_49500 +ffffffff82a70558 r dg2_hdmi_50000 +ffffffff82a7057c r dg2_hdmi_57284 +ffffffff82a705a0 r dg2_hdmi_58000 +ffffffff82a705c4 r dg2_hdmi_65000 +ffffffff82a705e8 r dg2_hdmi_71000 +ffffffff82a7060c r dg2_hdmi_74176 +ffffffff82a70630 r dg2_hdmi_75000 +ffffffff82a70654 r dg2_hdmi_78750 +ffffffff82a70678 r dg2_hdmi_85500 +ffffffff82a7069c r dg2_hdmi_88750 +ffffffff82a706c0 r dg2_hdmi_106500 +ffffffff82a706e4 r dg2_hdmi_108000 +ffffffff82a70708 r dg2_hdmi_115500 +ffffffff82a7072c r dg2_hdmi_119000 +ffffffff82a70750 r dg2_hdmi_135000 +ffffffff82a70774 r dg2_hdmi_138500 +ffffffff82a70798 r dg2_hdmi_147160 +ffffffff82a707bc r dg2_hdmi_148352 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r600_encode_pci_lane_width.encoded_lanes +ffffffff82ae5000 r r100_gfx_ring +ffffffff82ae5070 r r300_gfx_ring +ffffffff82ae50e0 r rv515_gfx_ring +ffffffff82ae5150 r r600_gfx_ring +ffffffff82ae51c0 r r600_dma_ring +ffffffff82ae5230 r rv6xx_uvd_ring +ffffffff82ae52a0 r rv770_uvd_ring +ffffffff82ae5310 r evergreen_gfx_ring +ffffffff82ae5380 r evergreen_dma_ring +ffffffff82ae53f0 r cayman_gfx_ring +ffffffff82ae5460 r cayman_dma_ring +ffffffff82ae54d0 r cayman_uvd_ring +ffffffff82ae5540 r trinity_vce_ring +ffffffff82ae55b0 r si_gfx_ring +ffffffff82ae5620 r si_dma_ring +ffffffff82ae5690 r ci_gfx_ring +ffffffff82ae5700 r ci_cp_ring +ffffffff82ae5770 r ci_dma_ring +ffffffff82ae57e0 r ci_vce_ring +ffffffff82ae6000 r object_connector_convert +ffffffff82ae6060 r supported_devices_connector_convert +ffffffff82ae60a0 r supported_devices_connector_object_id_convert +ffffffff82ae60c0 r thermal_controller_names +ffffffff82ae6100 r pp_lib_thermal_controller_names +ffffffff82ae7000 r pin_offsets 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si_SECT_CONTEXT_def_5 +ffffffff82b0aea8 r si_SECT_CONTEXT_def_6 +ffffffff82b0aeb0 r si_SECT_CONTEXT_def_2 +ffffffff82b0b2f0 r si_SECT_CONTEXT_def_7 +ffffffff82b0b6a0 r mc_cg_registers +ffffffff82b0b6d0 r si_default_state +ffffffff82b0c000 r cac_weights_tahiti +ffffffff82b0c4d0 r lcac_tahiti +ffffffff82b0cba0 r cac_override_tahiti +ffffffff82b0cbb4 r powertune_data_tahiti +ffffffff82b0cbf0 r dte_data_tahiti +ffffffff82b0ccc0 r dte_data_new_zealand +ffffffff82b0cd90 r dte_data_malta +ffffffff82b0ce60 r lcac_pitcairn +ffffffff82b0d530 r cac_override_pitcairn +ffffffff82b0d544 r powertune_data_pitcairn +ffffffff82b0d580 r lcac_cape_verde +ffffffff82b0d9d0 r cac_override_cape_verde +ffffffff82b0d9e4 r powertune_data_cape_verde +ffffffff82b0da20 r cac_weights_cape_verde_pro +ffffffff82b0def0 r cac_weights_heathrow +ffffffff82b0e3c0 r cac_weights_chelsea_xt +ffffffff82b0e890 r cac_weights_chelsea_pro +ffffffff82b0ed60 r cac_weights_cape_verde +ffffffff82b0f230 r cac_weights_mars_pro +ffffffff82b0f700 r lcac_mars_pro +ffffffff82b0fa60 r cac_override_oland +ffffffff82b0fa74 r powertune_data_mars_pro +ffffffff82b0fab0 r cac_weights_mars_xt +ffffffff82b0ff80 r cac_weights_oland_pro +ffffffff82b10450 r cac_weights_oland_xt +ffffffff82b10920 r lcac_oland +ffffffff82b10c7c r powertune_data_oland +ffffffff82b10cc0 r cac_weights_hainan +ffffffff82b11184 r powertune_data_hainan +ffffffff82b111c0 r dte_data_aruba_pro +ffffffff82b11290 r dte_data_tahiti_pro +ffffffff82b11360 r dte_data_curacao_pro +ffffffff82b11430 r dte_data_neptune_xt +ffffffff82b11500 r dte_data_sun_xt +ffffffff82b115d0 r dte_data_venus_xtx +ffffffff82b116a0 r dte_data_venus_xt +ffffffff82b11770 r dte_data_venus_pro +ffffffff82b11840 r dte_data_mars_pro +ffffffff82b12000 r si_program_jump_on_start.data +ffffffff82b13000 r sumo_dtc +ffffffff82b14000 r trinity_mgcg_shls_default +ffffffff82b14380 r trinity_sysls_enable +ffffffff82b14450 r trinity_sysls_disable +ffffffff82b16000 r GC_BASE +ffffffff82b160a8 r HDP_BASE +ffffffff82b16150 r MMHUB_BASE +ffffffff82b161f8 r ATHUB_BASE +ffffffff82b162a0 r NBIO_BASE +ffffffff82b16348 r MP0_BASE +ffffffff82b163f0 r MP1_BASE +ffffffff82b16498 r DF_BASE +ffffffff82b16540 r OSSSYS_BASE +ffffffff82b165e8 r SDMA0_BASE +ffffffff82b16690 r SDMA1_BASE +ffffffff82b16738 r SDMA2_BASE +ffffffff82b167e0 r SDMA3_BASE +ffffffff82b16888 r SDMA4_BASE +ffffffff82b16930 r SMUIO_BASE +ffffffff82b169d8 r THM_BASE +ffffffff82b16a80 r UMC_BASE +ffffffff82b16b28 r VCN_BASE +ffffffff82b17000 r amdgpu_afmt_predefined_acr +ffffffff82b18000 r atom_op_names +ffffffff82b183e0 r opcode_table +ffffffff82b18bd0 r atom_dst_to_src +ffffffff82b18c50 r atom_io_names +ffffffff82b18c80 r atom_table_names +ffffffff82b18ed0 r atom_iio_len +ffffffff82b19000 r object_connector_convert +ffffffff82b19058 R amdgpu_vbios_version_attr_group +ffffffff82b1a000 r voltage_names +ffffffff82b1a020 r pre_emph_names +ffffffff82b1b000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82b1d000 r amdgpu_benchmark.common_modes +ffffffff82b1e000 r amdgpu_cgs_ops +ffffffff82b1f000 r amdgpu_connector_dp_funcs +ffffffff82b1f078 r amdgpu_connector_dp_helper_funcs +ffffffff82b1f0d8 r amdgpu_connector_edp_funcs +ffffffff82b1f150 r amdgpu_connector_vga_funcs +ffffffff82b1f1c8 r amdgpu_connector_vga_helper_funcs +ffffffff82b1f228 r amdgpu_connector_dvi_funcs +ffffffff82b1f2a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82b1f300 r amdgpu_connector_lvds_funcs +ffffffff82b1f378 r amdgpu_connector_lvds_helper_funcs +ffffffff82b1f3e0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82b21000 R amdgpu_ctx_num_entities +ffffffff82b22000 r amdgpu_kms_driver +ffffffff82b220f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82b23000 r hw_id_map +ffffffff82b23090 r hw_id_names +ffffffff82b24000 r hpd_names +ffffffff82b24030 r encoder_names +ffffffff82b24180 r dcc_retile_formats +ffffffff82b24270 r dcc_formats +ffffffff82b24360 R amdgpu_mode_funcs +ffffffff82b243b0 r amdgpu_underscan_enum_list +ffffffff82b243e0 r amdgpu_audio_enum_list +ffffffff82b24410 r amdgpu_dither_enum_list +ffffffff82b24430 r amdgpu_fb_funcs_atomic +ffffffff82b24448 r amdgpu_fb_funcs +ffffffff82b25000 R amdgpu_dmabuf_ops +ffffffff82b26000 R amdgpu_ioctls_kms +ffffffff82b26210 R amdgpu_partition_driver +ffffffff82b262f8 R amdgpu_ca +ffffffff82b26320 r pciidlist +ffffffff82b271f0 r amdgpu_unsupported_pciidlist +ffffffff82b27770 r amdgpu_kms_driver +ffffffff82b28000 r amdgpu_job_fence_ops +ffffffff82b28040 r amdgpu_fence_ops +ffffffff82b29000 r amdgpu_gem_object_funcs +ffffffff82b29070 r amdgpu_gem_vm_ops +ffffffff82b2a000 R amdgpu_gtt_mgr_attr_group +ffffffff82b2a018 r amdgpu_gtt_mgr_func +ffffffff82b2b000 r amdgpu_atombios_i2c_algo +ffffffff82b2c000 R node_id_to_phys_map +ffffffff82b2d000 R amdgpu_sched_ops +ffffffff82b2f000 r amdgpu_vram_names +ffffffff82b30000 r amdgpu_preempt_mgr_func +ffffffff82b31000 R psp_ip_funcs +ffffffff82b310a0 R psp_v3_1_ip_block +ffffffff82b310b8 R psp_v10_0_ip_block +ffffffff82b310d0 R psp_v11_0_ip_block +ffffffff82b310e8 R psp_v11_0_8_ip_block +ffffffff82b31100 R psp_v12_0_ip_block +ffffffff82b31118 R psp_v13_0_ip_block +ffffffff82b31130 R psp_v13_0_4_ip_block +ffffffff82b33000 r sw_ring_info +ffffffff82b34000 r amdgpu_evict_flags.placements +ffffffff82b38000 R amdgpu_vkms_ip_block +ffffffff82b39000 R amdgpu_vm_cpu_funcs +ffffffff82b3b000 R amdgpu_vm_sdma_funcs +ffffffff82b3c000 R amdgpu_vram_mgr_attr_group +ffffffff82b3c018 r amdgpu_vram_mgr_func +ffffffff82b3c040 r amdgpu_dummy_vram_mgr_func +ffffffff82b3d000 r xgmi_pcs_err_status_reg_arct +ffffffff82b3d020 r xgmi3x16_pcs_ras_fields +ffffffff82b3d1f0 r xgmi_pcs_ras_fields +ffffffff82b3d310 r wafl_pcs_ras_fields +ffffffff82b3e000 r GC_BASE +ffffffff82b3e0c0 r HDP_BASE +ffffffff82b3e180 r MMHUB_BASE +ffffffff82b3e240 r ATHUB_BASE +ffffffff82b3e300 r NBIF0_BASE +ffffffff82b3e3c0 r MP0_BASE +ffffffff82b3e480 r MP1_BASE +ffffffff82b3e540 r UVD_BASE +ffffffff82b3e600 r DF_BASE +ffffffff82b3e6c0 r OSSSYS_BASE +ffffffff82b3e780 r SDMA0_BASE +ffffffff82b3e840 r SDMA1_BASE +ffffffff82b3e900 r SDMA2_BASE +ffffffff82b3e9c0 r SDMA3_BASE +ffffffff82b3ea80 r SDMA4_BASE +ffffffff82b3eb40 r SDMA5_BASE +ffffffff82b3ec00 r SDMA6_BASE +ffffffff82b3ecc0 r SDMA7_BASE +ffffffff82b3ed80 r SMUIO_BASE +ffffffff82b3ee40 r THM_BASE +ffffffff82b3ef00 r UMC_BASE +ffffffff82b3efc0 r RSMU_BASE +ffffffff82b40000 r cz_ih_ip_funcs +ffffffff82b400a0 R cz_ih_ip_block +ffffffff82b400b8 r cz_ih_funcs ffffffff82b41000 r crtc_offsets -ffffffff82b41020 r dce_v11_0_ip_funcs -ffffffff82b410c0 R dce_v11_0_ip_block -ffffffff82b410d8 R dce_v11_2_ip_block -ffffffff82b410f0 r dce_v11_0_display_funcs +ffffffff82b41020 r dce_v10_0_ip_funcs +ffffffff82b410c0 R dce_v10_0_ip_block +ffffffff82b410d8 R dce_v10_1_ip_block +ffffffff82b410f0 r dce_v10_0_display_funcs ffffffff82b41150 r hpd_offsets -ffffffff82b41168 r dce_v11_0_encoder_funcs -ffffffff82b41188 r dce_v11_0_dac_helper_funcs -ffffffff82b411f0 r dce_v11_0_dig_helper_funcs -ffffffff82b41258 r dce_v11_0_ext_helper_funcs -ffffffff82b412c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82b412f0 r dce_v11_0_crtc_irq_funcs -ffffffff82b41300 r dce_v11_0_pageflip_irq_funcs -ffffffff82b41310 r dce_v11_0_hpd_irq_funcs +ffffffff82b41168 r dce_v10_0_encoder_funcs +ffffffff82b41188 r dce_v10_0_dac_helper_funcs +ffffffff82b411f0 r dce_v10_0_dig_helper_funcs +ffffffff82b41258 r dce_v10_0_ext_helper_funcs +ffffffff82b412c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82b412f0 r dce_v10_0_crtc_irq_funcs +ffffffff82b41300 r dce_v10_0_pageflip_irq_funcs +ffffffff82b41310 r dce_v10_0_hpd_irq_funcs ffffffff82b41320 r interrupt_status_offsets -ffffffff82b41380 r dce_v11_0_crtc_funcs -ffffffff82b41440 r dce_v11_0_crtc_helper_funcs +ffffffff82b41380 r dce_v10_0_crtc_funcs +ffffffff82b41440 r dce_v10_0_crtc_helper_funcs ffffffff82b414c0 r vga_control_regs ffffffff82b414e0 r dig_offsets -ffffffff82b41510 r cz_mgcg_cgcg_init -ffffffff82b41530 r cz_golden_settings_a11 -ffffffff82b41550 r stoney_golden_settings_a11 -ffffffff82b41570 r polaris11_golden_settings_a11 -ffffffff82b415b0 r polaris10_golden_settings_a11 -ffffffff82b42000 R df_v1_7_funcs -ffffffff82b42070 r df_v1_7_channel_number -ffffffff82b43000 R df_v3_6_funcs -ffffffff82b43070 r df_v3_6_channel_number -ffffffff82b44000 R df_v4_3_funcs -ffffffff82b45000 r GC_BASE -ffffffff82b450a8 r HDP_BASE -ffffffff82b45150 r MMHUB_BASE -ffffffff82b451f8 r ATHUB_BASE -ffffffff82b452a0 r NBIO_BASE -ffffffff82b45348 r MP0_BASE -ffffffff82b453f0 r MP1_BASE -ffffffff82b45498 r VCN0_BASE -ffffffff82b45540 r DF_BASE -ffffffff82b455e8 r DCN_BASE -ffffffff82b45690 r OSSSYS_BASE -ffffffff82b45738 r SMUIO_BASE -ffffffff82b457e0 r THM_BASE -ffffffff82b46000 r gfx_v10_0_ip_funcs -ffffffff82b460a0 R gfx_v10_0_ip_block -ffffffff82b460b8 r gfx_v10_0_gfx_funcs -ffffffff82b46120 r golden_settings_gc_rlc_spm_10_0_nv10 -ffffffff82b4c3c0 r golden_settings_gc_rlc_spm_10_1_nv14 -ffffffff82b4fde0 r golden_settings_gc_rlc_spm_10_1_2_nv12 -ffffffff82b56080 r gfx_v10_0_kiq_pm4_funcs -ffffffff82b560c0 r gfx_v10_0_ring_funcs_kiq -ffffffff82b56200 r gfx_v10_0_ring_funcs_gfx -ffffffff82b56340 r gfx_v10_0_ring_funcs_compute -ffffffff82b56480 r gfx_v10_0_eop_irq_funcs -ffffffff82b56490 r gfx_v10_0_kiq_irq_funcs -ffffffff82b564a0 r gfx_v10_0_priv_reg_irq_funcs -ffffffff82b564b0 r gfx_v10_0_priv_inst_irq_funcs -ffffffff82b564c0 r gfx_v10_0_rlc_funcs -ffffffff82b56528 r gfx_v10_0_rlc_funcs_sriov -ffffffff82b56590 r gfx10_cs_data -ffffffff82b565b0 r gfx10_SECT_CONTEXT_defs -ffffffff82b56640 r gfx10_SECT_CONTEXT_def_1 -ffffffff82b569a0 r gfx10_SECT_CONTEXT_def_3 -ffffffff82b569b0 r gfx10_SECT_CONTEXT_def_4 -ffffffff82b56c28 r gfx10_SECT_CONTEXT_def_5 -ffffffff82b56c30 r gfx10_SECT_CONTEXT_def_6 -ffffffff82b56c40 r gfx10_SECT_CONTEXT_def_2 -ffffffff82b57080 r gfx10_SECT_CONTEXT_def_7 -ffffffff82b57190 r gfx10_SECT_CONTEXT_def_8 -ffffffff82b574c0 r golden_settings_gc_10_1 -ffffffff82b57880 r golden_settings_gc_10_0_nv10 -ffffffff82b57880 r golden_settings_gc_10_1_1 -ffffffff82b57c10 r golden_settings_gc_10_1_2 -ffffffff82b57c10 r golden_settings_gc_10_1_nv14 -ffffffff82b58000 r golden_settings_gc_10_1_2_nv12 -ffffffff82b58000 r golden_settings_gc_10_3 -ffffffff82b58408 r golden_settings_gc_10_3_sienna_cichlid -ffffffff82b58410 r golden_settings_gc_10_3_2 -ffffffff82b58800 r golden_settings_gc_10_3_vangogh -ffffffff82b58a60 r golden_settings_gc_10_3_3 -ffffffff82b58c40 r golden_settings_gc_10_3_4 -ffffffff82b58fa0 r golden_settings_gc_10_3_5 -ffffffff82b592a0 r golden_settings_gc_10_0_cyan_skillfish -ffffffff82b595d0 r golden_settings_gc_10_3_6 -ffffffff82b597e0 r golden_settings_gc_10_3_7 -ffffffff82b5a000 r gfx_v11_0_ip_funcs -ffffffff82b5a0a0 R gfx_v11_0_ip_block -ffffffff82b5a0b8 r gfx_v11_0_gfx_funcs -ffffffff82b5a118 r gfx_v11_0_kiq_pm4_funcs -ffffffff82b5a158 r gfx_v11_0_ring_funcs_kiq -ffffffff82b5a298 r gfx_v11_0_ring_funcs_gfx -ffffffff82b5a3d8 r gfx_v11_0_ring_funcs_compute -ffffffff82b5a518 r gfx_v11_0_eop_irq_funcs -ffffffff82b5a528 r gfx_v11_0_priv_reg_irq_funcs -ffffffff82b5a538 r gfx_v11_0_priv_inst_irq_funcs -ffffffff82b5a548 r gfx_v11_0_rlc_gc_fed_irq_funcs -ffffffff82b5a558 r gfx_v11_0_rlc_funcs -ffffffff82b5a5c0 r gfx11_cs_data -ffffffff82b5a5e0 r gfx11_SECT_CONTEXT_defs -ffffffff82b5a660 r gfx11_SECT_CONTEXT_def_1 -ffffffff82b5a9c0 r gfx11_SECT_CONTEXT_def_3 -ffffffff82b5a9d0 r gfx11_SECT_CONTEXT_def_5 -ffffffff82b5a9d8 r gfx11_SECT_CONTEXT_def_6 -ffffffff82b5a9e0 r gfx11_SECT_CONTEXT_def_2 -ffffffff82b5ae20 r gfx11_SECT_CONTEXT_def_4 -ffffffff82b5b0a0 r gfx11_SECT_CONTEXT_def_7 -ffffffff82b5b510 r golden_settings_gc_11_0_1 -ffffffff82b5b5f0 r golden_settings_gc_11_0 -ffffffff82b5c000 r gfx_v8_0_ip_funcs -ffffffff82b5c0a0 R gfx_v8_0_ip_block -ffffffff82b5c0b8 R gfx_v8_1_ip_block -ffffffff82b5c0d0 r gfx_v8_0_gfx_funcs -ffffffff82b5c130 r gfx_v8_0_ring_funcs_kiq -ffffffff82b5c270 r gfx_v8_0_ring_funcs_gfx -ffffffff82b5c3b0 r gfx_v8_0_ring_funcs_compute -ffffffff82b5c4f0 r amdgpu_gds_reg_offset -ffffffff82b5c5f0 r gfx_v8_0_eop_irq_funcs -ffffffff82b5c600 r gfx_v8_0_priv_reg_irq_funcs -ffffffff82b5c610 r gfx_v8_0_priv_inst_irq_funcs -ffffffff82b5c620 r gfx_v8_0_cp_ecc_error_irq_funcs -ffffffff82b5c630 r gfx_v8_0_sq_irq_funcs -ffffffff82b5c640 r sq_edc_source_names -ffffffff82b5c678 r iceland_rlc_funcs -ffffffff82b5c6e0 r vi_cs_data -ffffffff82b5c700 r vi_SECT_CONTEXT_defs -ffffffff82b5c780 r vi_SECT_CONTEXT_def_1 -ffffffff82b5cad0 r vi_SECT_CONTEXT_def_3 -ffffffff82b5caf0 r vi_SECT_CONTEXT_def_4 -ffffffff82b5cd64 r vi_SECT_CONTEXT_def_5 -ffffffff82b5cd6c r vi_SECT_CONTEXT_def_6 -ffffffff82b5cd70 r vi_SECT_CONTEXT_def_2 -ffffffff82b5d1c0 r vi_SECT_CONTEXT_def_7 -ffffffff82b5d570 r vgpr_init_compute_shader -ffffffff82b5d680 r vgpr_init_regs -ffffffff82b5d710 r sgpr1_init_regs -ffffffff82b5d7a0 r sgpr2_init_regs -ffffffff82b5d830 r sec_ded_counter_registers -ffffffff82b5d8a0 r iceland_mgcg_cgcg_init -ffffffff82b5dba0 r golden_settings_iceland_a11 -ffffffff82b5dc60 r iceland_golden_common_all -ffffffff82b5dcc0 r fiji_mgcg_cgcg_init -ffffffff82b5de70 r golden_settings_fiji_a10 -ffffffff82b5df00 r fiji_golden_common_all -ffffffff82b5df80 r tonga_mgcg_cgcg_init -ffffffff82b5e310 r golden_settings_tonga_a11 -ffffffff82b5e3d0 r tonga_golden_common_all -ffffffff82b5e430 r golden_settings_vegam_a11 -ffffffff82b5e500 r vegam_golden_common_all -ffffffff82b5e550 r golden_settings_polaris11_a11 -ffffffff82b5e620 r polaris11_golden_common_all -ffffffff82b5e670 r golden_settings_polaris10_a11 -ffffffff82b5e740 r polaris10_golden_common_all -ffffffff82b5e7a0 r cz_mgcg_cgcg_init -ffffffff82b5eb30 r cz_golden_settings_a11 -ffffffff82b5ebc0 r cz_golden_common_all -ffffffff82b5ec20 r stoney_mgcg_cgcg_init -ffffffff82b5ec60 r stoney_golden_settings_a11 -ffffffff82b5ece0 r stoney_golden_common_all -ffffffff82b5f000 R gfx_v9_0_ras_ops -ffffffff82b5f040 r gfx_v9_0_ip_funcs -ffffffff82b5f0e0 R gfx_v9_0_ip_block -ffffffff82b5f100 r ras_gfx_subblocks -ffffffff82b5fb80 r gfx_v9_0_edc_counter_regs -ffffffff82b5ff20 r gfx_v9_0_ras_fields -ffffffff82b61000 r gfx_v9_0_gfx_funcs -ffffffff82b61060 r gfx_v9_0_kiq_pm4_funcs -ffffffff82b610a0 r gfx_v9_0_ring_funcs_kiq -ffffffff82b611e0 r gfx_v9_0_ring_funcs_gfx -ffffffff82b61320 r gfx_v9_0_sw_ring_funcs_gfx -ffffffff82b61460 r gfx_v9_0_ring_funcs_compute -ffffffff82b615a0 r gfx_v9_0_eop_irq_funcs -ffffffff82b615b0 r gfx_v9_0_priv_reg_irq_funcs -ffffffff82b615c0 r gfx_v9_0_priv_inst_irq_funcs -ffffffff82b615d0 r gfx_v9_0_cp_ecc_error_irq_funcs -ffffffff82b615e0 r gfx_v9_0_rlc_funcs -ffffffff82b61650 r gfx9_cs_data -ffffffff82b61670 r gfx9_SECT_CONTEXT_defs -ffffffff82b61700 r gfx9_SECT_CONTEXT_def_1 -ffffffff82b61a50 r gfx9_SECT_CONTEXT_def_3 -ffffffff82b61a60 r gfx9_SECT_CONTEXT_def_4 -ffffffff82b61cd4 r gfx9_SECT_CONTEXT_def_5 -ffffffff82b61cdc r gfx9_SECT_CONTEXT_def_6 -ffffffff82b61ce0 r gfx9_SECT_CONTEXT_def_7 -ffffffff82b61df0 r gfx9_SECT_CONTEXT_def_2 -ffffffff82b62260 r gfx9_SECT_CONTEXT_def_8 -ffffffff82b624d0 r vgpr_init_compute_shader_arcturus -ffffffff82b62d60 r vgpr_init_regs_arcturus -ffffffff82b62ef0 r vgpr_init_regs -ffffffff82b63080 r sgpr1_init_regs -ffffffff82b63210 r sgpr2_init_regs -ffffffff82b633a0 r golden_settings_gc_9_0 -ffffffff82b63580 r golden_settings_gc_9_0_vg10 -ffffffff82b63730 r golden_settings_gc_9_2_1 -ffffffff82b638b0 r golden_settings_gc_9_2_1_vg12 -ffffffff82b639f0 r golden_settings_gc_9_0_vg20 -ffffffff82b63b00 r golden_settings_gc_9_4_1_arct -ffffffff82b63c10 r golden_settings_gc_9_1 -ffffffff82b63e50 r golden_settings_gc_9_1_rv2 -ffffffff82b64020 r golden_settings_gc_9_1_rv1 -ffffffff82b640d0 r golden_settings_gc_9_1_rn -ffffffff82b641f0 r golden_settings_gc_9_x_common -ffffffff82b65000 R gfx_v9_4_ras_ops -ffffffff82b65040 r gfx_v9_4_edc_counter_regs -ffffffff82b65420 r gfx_v9_4_ras_fields -ffffffff82b67000 R vgpr_init_regs_aldebaran -ffffffff82b671b0 R sgpr112_init_regs_aldebaran -ffffffff82b67360 R sgpr96_init_regs_aldebaran -ffffffff82b67510 R sgpr64_init_regs_aldebaran -ffffffff82b676c0 r golden_settings_gc_9_4_2_alde -ffffffff82b67720 r golden_settings_gc_9_4_2_alde_die_0 -ffffffff82b677b0 r golden_settings_gc_9_4_2_alde_die_1 -ffffffff82b67840 r sgpr112_init_compute_shader_aldebaran -ffffffff82b67a60 r sgpr96_init_compute_shader_aldebaran -ffffffff82b67c50 r sgpr64_init_compute_shader_aldebaran -ffffffff82b67dc0 r vgpr_init_compute_shader_aldebaran -ffffffff82b686a0 r gfx_v9_4_2_edc_counter_regs -ffffffff82b68a20 r gfx_v9_4_2_ras_fields -ffffffff82b6a3c0 r gfx_v9_4_2_utc_blocks -ffffffff82b6b000 r gfx_v9_4_3_ip_funcs -ffffffff82b6b0a0 R gfx_v9_4_3_ip_block -ffffffff82b6b0b8 r gfx_v9_4_3_kiq_pm4_funcs -ffffffff82b6b0f8 r gfx_v9_4_3_ring_funcs_kiq -ffffffff82b6b238 r gfx_v9_4_3_ring_funcs_compute -ffffffff82b6b378 r gfx_v9_4_3_eop_irq_funcs -ffffffff82b6b388 r gfx_v9_4_3_priv_reg_irq_funcs -ffffffff82b6b398 r gfx_v9_4_3_priv_inst_irq_funcs -ffffffff82b6b3a8 r gfx_v9_4_3_rlc_funcs -ffffffff82b6b410 r gfx_v9_4_3_gfx_funcs -ffffffff82b6b470 r gfx_v9_4_3_ce_reg_list -ffffffff82b6b800 r gfx_v9_4_3_ras_mem_list_array -ffffffff82b6b960 r gfx_v9_4_3_ue_reg_list -ffffffff82b6bd20 r gfx_v9_4_3_ras_cp_mem_list -ffffffff82b6bd70 r gfx_v9_4_3_ras_gcea_mem_list -ffffffff82b6beb0 r gfx_v9_4_3_ras_gc_cane_mem_list -ffffffff82b6bec0 r gfx_v9_4_3_ras_gcutcl2_mem_list -ffffffff82b6bed0 r gfx_v9_4_3_ras_gds_mem_list -ffffffff82b6bee0 r gfx_v9_4_3_ras_lds_mem_list -ffffffff82b6c100 r gfx_v9_4_3_ras_rlc_mem_list -ffffffff82b6c180 r gfx_v9_4_3_ras_sp_mem_list -ffffffff82b6c190 r gfx_v9_4_3_ras_spi_mem_list -ffffffff82b6c1d0 r gfx_v9_4_3_ras_sqc_mem_list -ffffffff82b6c340 r gfx_v9_4_3_ras_sq_mem_list -ffffffff82b6c380 r gfx_v9_4_3_ras_ta_mem_list -ffffffff82b6c3d0 r gfx_v9_4_3_ras_tcc_mem_list -ffffffff82b6c3e0 r gfx_v9_4_3_ras_tca_mem_list -ffffffff82b6c3f0 r gfx_v9_4_3_ras_tci_mem_list -ffffffff82b6c400 r gfx_v9_4_3_ras_tcp_mem_list -ffffffff82b6c590 r gfx_v9_4_3_ras_td_mem_list -ffffffff82b6c5c0 r gfx_v9_4_3_ras_tcx_mem_list -ffffffff82b6cb40 r gfx_v9_4_3_ras_atc_l2_mem_list -ffffffff82b6cb50 r gfx_v9_4_3_ras_utcl2_mem_list -ffffffff82b6cb60 r gfx_v9_4_3_ras_vml2_mem_list -ffffffff82b6cb70 r gfx_v9_4_3_ras_vml2_walker_mem_list -ffffffff82b6d000 R gfxhub_v1_0_funcs -ffffffff82b6e000 R gfxhub_v1_2_funcs -ffffffff82b6f000 R gfxhub_v2_0_funcs -ffffffff82b6f060 r gfxhub_v2_0_vmhub_funcs -ffffffff82b6f070 r gfxhub_client_ids -ffffffff82b70000 R gfxhub_v2_1_funcs -ffffffff82b70060 r gfxhub_v2_1_vmhub_funcs +ffffffff82b41500 r pin_offsets +ffffffff82b41520 r fiji_mgcg_cgcg_init +ffffffff82b41540 r golden_settings_fiji_a10 +ffffffff82b41570 r tonga_mgcg_cgcg_init +ffffffff82b41590 r golden_settings_tonga_a11 +ffffffff82b42000 r crtc_offsets +ffffffff82b42020 r dce_v11_0_ip_funcs +ffffffff82b420c0 R dce_v11_0_ip_block +ffffffff82b420d8 R dce_v11_2_ip_block +ffffffff82b420f0 r dce_v11_0_display_funcs +ffffffff82b42150 r hpd_offsets +ffffffff82b42168 r dce_v11_0_encoder_funcs +ffffffff82b42188 r dce_v11_0_dac_helper_funcs +ffffffff82b421f0 r dce_v11_0_dig_helper_funcs +ffffffff82b42258 r dce_v11_0_ext_helper_funcs +ffffffff82b422c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82b422f0 r dce_v11_0_crtc_irq_funcs +ffffffff82b42300 r dce_v11_0_pageflip_irq_funcs +ffffffff82b42310 r dce_v11_0_hpd_irq_funcs +ffffffff82b42320 r interrupt_status_offsets +ffffffff82b42380 r dce_v11_0_crtc_funcs +ffffffff82b42440 r dce_v11_0_crtc_helper_funcs +ffffffff82b424c0 r vga_control_regs +ffffffff82b424e0 r dig_offsets +ffffffff82b42510 r cz_mgcg_cgcg_init +ffffffff82b42530 r cz_golden_settings_a11 +ffffffff82b42550 r stoney_golden_settings_a11 +ffffffff82b42570 r polaris11_golden_settings_a11 +ffffffff82b425b0 r polaris10_golden_settings_a11 +ffffffff82b43000 R df_v1_7_funcs +ffffffff82b43070 r df_v1_7_channel_number +ffffffff82b44000 R df_v3_6_funcs +ffffffff82b44070 r df_v3_6_channel_number +ffffffff82b45000 R df_v4_3_funcs +ffffffff82b46000 r GC_BASE +ffffffff82b460a8 r HDP_BASE +ffffffff82b46150 r MMHUB_BASE +ffffffff82b461f8 r ATHUB_BASE +ffffffff82b462a0 r NBIO_BASE +ffffffff82b46348 r MP0_BASE +ffffffff82b463f0 r MP1_BASE +ffffffff82b46498 r VCN0_BASE +ffffffff82b46540 r DF_BASE +ffffffff82b465e8 r DCN_BASE +ffffffff82b46690 r OSSSYS_BASE +ffffffff82b46738 r SMUIO_BASE +ffffffff82b467e0 r THM_BASE +ffffffff82b47000 r gfx_v10_0_ip_funcs +ffffffff82b470a0 R gfx_v10_0_ip_block +ffffffff82b470b8 r gfx_v10_0_gfx_funcs +ffffffff82b47120 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82b4d3c0 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82b50de0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82b57080 r gfx_v10_0_kiq_pm4_funcs +ffffffff82b570c0 r gfx_v10_0_ring_funcs_kiq +ffffffff82b57200 r gfx_v10_0_ring_funcs_gfx +ffffffff82b57340 r gfx_v10_0_ring_funcs_compute +ffffffff82b57480 r gfx_v10_0_eop_irq_funcs +ffffffff82b57490 r gfx_v10_0_kiq_irq_funcs +ffffffff82b574a0 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82b574b0 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82b574c0 r gfx_v10_0_rlc_funcs +ffffffff82b57528 r gfx_v10_0_rlc_funcs_sriov +ffffffff82b57590 r gfx10_cs_data +ffffffff82b575b0 r gfx10_SECT_CONTEXT_defs +ffffffff82b57640 r gfx10_SECT_CONTEXT_def_1 +ffffffff82b579a0 r gfx10_SECT_CONTEXT_def_3 +ffffffff82b579b0 r gfx10_SECT_CONTEXT_def_4 +ffffffff82b57c28 r gfx10_SECT_CONTEXT_def_5 +ffffffff82b57c30 r gfx10_SECT_CONTEXT_def_6 +ffffffff82b57c40 r gfx10_SECT_CONTEXT_def_2 +ffffffff82b58080 r gfx10_SECT_CONTEXT_def_7 +ffffffff82b58190 r gfx10_SECT_CONTEXT_def_8 +ffffffff82b584c0 r golden_settings_gc_10_1 +ffffffff82b58880 r golden_settings_gc_10_0_nv10 +ffffffff82b58880 r golden_settings_gc_10_1_1 +ffffffff82b58c10 r golden_settings_gc_10_1_2 +ffffffff82b58c10 r golden_settings_gc_10_1_nv14 +ffffffff82b59000 r golden_settings_gc_10_1_2_nv12 +ffffffff82b59000 r golden_settings_gc_10_3 +ffffffff82b59408 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82b59410 r golden_settings_gc_10_3_2 +ffffffff82b59800 r golden_settings_gc_10_3_vangogh +ffffffff82b59a60 r golden_settings_gc_10_3_3 +ffffffff82b59c40 r golden_settings_gc_10_3_4 +ffffffff82b59fa0 r golden_settings_gc_10_3_5 +ffffffff82b5a2a0 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82b5a5d0 r golden_settings_gc_10_3_6 +ffffffff82b5a7e0 r golden_settings_gc_10_3_7 +ffffffff82b5b000 r gfx_v11_0_ip_funcs +ffffffff82b5b0a0 R gfx_v11_0_ip_block +ffffffff82b5b0b8 r gfx_v11_0_gfx_funcs +ffffffff82b5b118 r gfx_v11_0_kiq_pm4_funcs +ffffffff82b5b158 r gfx_v11_0_ring_funcs_kiq +ffffffff82b5b298 r gfx_v11_0_ring_funcs_gfx +ffffffff82b5b3d8 r gfx_v11_0_ring_funcs_compute +ffffffff82b5b518 r gfx_v11_0_eop_irq_funcs +ffffffff82b5b528 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82b5b538 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82b5b548 r gfx_v11_0_rlc_gc_fed_irq_funcs +ffffffff82b5b558 r gfx_v11_0_rlc_funcs +ffffffff82b5b5c0 r gfx11_cs_data +ffffffff82b5b5e0 r gfx11_SECT_CONTEXT_defs +ffffffff82b5b660 r gfx11_SECT_CONTEXT_def_1 +ffffffff82b5b9c0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82b5b9d0 r gfx11_SECT_CONTEXT_def_5 +ffffffff82b5b9d8 r gfx11_SECT_CONTEXT_def_6 +ffffffff82b5b9e0 r gfx11_SECT_CONTEXT_def_2 +ffffffff82b5be20 r gfx11_SECT_CONTEXT_def_4 +ffffffff82b5c0a0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82b5c510 r golden_settings_gc_11_0_1 +ffffffff82b5c5f0 r golden_settings_gc_11_0 +ffffffff82b5d000 r gfx_v8_0_ip_funcs +ffffffff82b5d0a0 R gfx_v8_0_ip_block +ffffffff82b5d0b8 R gfx_v8_1_ip_block +ffffffff82b5d0d0 r gfx_v8_0_gfx_funcs +ffffffff82b5d130 r gfx_v8_0_ring_funcs_kiq +ffffffff82b5d270 r gfx_v8_0_ring_funcs_gfx +ffffffff82b5d3b0 r gfx_v8_0_ring_funcs_compute +ffffffff82b5d4f0 r amdgpu_gds_reg_offset +ffffffff82b5d5f0 r gfx_v8_0_eop_irq_funcs +ffffffff82b5d600 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82b5d610 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82b5d620 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82b5d630 r gfx_v8_0_sq_irq_funcs +ffffffff82b5d640 r sq_edc_source_names +ffffffff82b5d678 r iceland_rlc_funcs +ffffffff82b5d6e0 r vi_cs_data +ffffffff82b5d700 r vi_SECT_CONTEXT_defs +ffffffff82b5d780 r vi_SECT_CONTEXT_def_1 +ffffffff82b5dad0 r vi_SECT_CONTEXT_def_3 +ffffffff82b5daf0 r vi_SECT_CONTEXT_def_4 +ffffffff82b5dd64 r vi_SECT_CONTEXT_def_5 +ffffffff82b5dd6c r vi_SECT_CONTEXT_def_6 +ffffffff82b5dd70 r vi_SECT_CONTEXT_def_2 +ffffffff82b5e1c0 r vi_SECT_CONTEXT_def_7 +ffffffff82b5e570 r vgpr_init_compute_shader +ffffffff82b5e680 r vgpr_init_regs +ffffffff82b5e710 r sgpr1_init_regs +ffffffff82b5e7a0 r sgpr2_init_regs +ffffffff82b5e830 r sec_ded_counter_registers +ffffffff82b5e8a0 r iceland_mgcg_cgcg_init +ffffffff82b5eba0 r golden_settings_iceland_a11 +ffffffff82b5ec60 r iceland_golden_common_all +ffffffff82b5ecc0 r fiji_mgcg_cgcg_init +ffffffff82b5ee70 r golden_settings_fiji_a10 +ffffffff82b5ef00 r fiji_golden_common_all +ffffffff82b5ef80 r tonga_mgcg_cgcg_init +ffffffff82b5f310 r golden_settings_tonga_a11 +ffffffff82b5f3d0 r tonga_golden_common_all +ffffffff82b5f430 r golden_settings_vegam_a11 +ffffffff82b5f500 r vegam_golden_common_all +ffffffff82b5f550 r golden_settings_polaris11_a11 +ffffffff82b5f620 r polaris11_golden_common_all +ffffffff82b5f670 r golden_settings_polaris10_a11 +ffffffff82b5f740 r polaris10_golden_common_all +ffffffff82b5f7a0 r cz_mgcg_cgcg_init +ffffffff82b5fb30 r cz_golden_settings_a11 +ffffffff82b5fbc0 r cz_golden_common_all +ffffffff82b5fc20 r stoney_mgcg_cgcg_init +ffffffff82b5fc60 r stoney_golden_settings_a11 +ffffffff82b5fce0 r stoney_golden_common_all +ffffffff82b60000 R gfx_v9_0_ras_ops +ffffffff82b60040 r gfx_v9_0_ip_funcs +ffffffff82b600e0 R gfx_v9_0_ip_block +ffffffff82b60100 r ras_gfx_subblocks +ffffffff82b60b80 r gfx_v9_0_edc_counter_regs +ffffffff82b60f20 r gfx_v9_0_ras_fields +ffffffff82b62000 r gfx_v9_0_gfx_funcs +ffffffff82b62060 r gfx_v9_0_kiq_pm4_funcs +ffffffff82b620a0 r gfx_v9_0_ring_funcs_kiq +ffffffff82b621e0 r gfx_v9_0_ring_funcs_gfx +ffffffff82b62320 r gfx_v9_0_sw_ring_funcs_gfx +ffffffff82b62460 r gfx_v9_0_ring_funcs_compute +ffffffff82b625a0 r gfx_v9_0_eop_irq_funcs +ffffffff82b625b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82b625c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82b625d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82b625e0 r gfx_v9_0_rlc_funcs +ffffffff82b62650 r gfx9_cs_data +ffffffff82b62670 r gfx9_SECT_CONTEXT_defs +ffffffff82b62700 r gfx9_SECT_CONTEXT_def_1 +ffffffff82b62a50 r gfx9_SECT_CONTEXT_def_3 +ffffffff82b62a60 r gfx9_SECT_CONTEXT_def_4 +ffffffff82b62cd4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82b62cdc r gfx9_SECT_CONTEXT_def_6 +ffffffff82b62ce0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82b62df0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82b63260 r gfx9_SECT_CONTEXT_def_8 +ffffffff82b634d0 r vgpr_init_compute_shader_arcturus +ffffffff82b63d60 r vgpr_init_regs_arcturus +ffffffff82b63ef0 r vgpr_init_regs +ffffffff82b64080 r sgpr1_init_regs +ffffffff82b64210 r sgpr2_init_regs +ffffffff82b643a0 r golden_settings_gc_9_0 +ffffffff82b64580 r golden_settings_gc_9_0_vg10 +ffffffff82b64730 r golden_settings_gc_9_2_1 +ffffffff82b648b0 r golden_settings_gc_9_2_1_vg12 +ffffffff82b649f0 r golden_settings_gc_9_0_vg20 +ffffffff82b64b00 r golden_settings_gc_9_4_1_arct +ffffffff82b64c10 r golden_settings_gc_9_1 +ffffffff82b64e50 r golden_settings_gc_9_1_rv2 +ffffffff82b65020 r golden_settings_gc_9_1_rv1 +ffffffff82b650d0 r golden_settings_gc_9_1_rn +ffffffff82b651f0 r golden_settings_gc_9_x_common +ffffffff82b66000 R gfx_v9_4_ras_ops +ffffffff82b66040 r gfx_v9_4_edc_counter_regs +ffffffff82b66420 r gfx_v9_4_ras_fields +ffffffff82b68000 R vgpr_init_regs_aldebaran +ffffffff82b681b0 R sgpr112_init_regs_aldebaran +ffffffff82b68360 R sgpr96_init_regs_aldebaran +ffffffff82b68510 R sgpr64_init_regs_aldebaran +ffffffff82b686c0 r golden_settings_gc_9_4_2_alde +ffffffff82b68720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82b687b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82b68840 r sgpr112_init_compute_shader_aldebaran +ffffffff82b68a60 r sgpr96_init_compute_shader_aldebaran +ffffffff82b68c50 r sgpr64_init_compute_shader_aldebaran +ffffffff82b68dc0 r vgpr_init_compute_shader_aldebaran +ffffffff82b696a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82b69a20 r gfx_v9_4_2_ras_fields +ffffffff82b6b3c0 r gfx_v9_4_2_utc_blocks +ffffffff82b6c000 r gfx_v9_4_3_ip_funcs +ffffffff82b6c0a0 R gfx_v9_4_3_ip_block +ffffffff82b6c0b8 r gfx_v9_4_3_kiq_pm4_funcs +ffffffff82b6c0f8 r gfx_v9_4_3_ring_funcs_kiq +ffffffff82b6c238 r gfx_v9_4_3_ring_funcs_compute +ffffffff82b6c378 r gfx_v9_4_3_eop_irq_funcs +ffffffff82b6c388 r gfx_v9_4_3_priv_reg_irq_funcs +ffffffff82b6c398 r gfx_v9_4_3_priv_inst_irq_funcs +ffffffff82b6c3a8 r gfx_v9_4_3_rlc_funcs +ffffffff82b6c410 r gfx_v9_4_3_gfx_funcs +ffffffff82b6c470 r gfx_v9_4_3_ce_reg_list +ffffffff82b6c800 r gfx_v9_4_3_ras_mem_list_array +ffffffff82b6c960 r gfx_v9_4_3_ue_reg_list +ffffffff82b6cd20 r gfx_v9_4_3_ras_cp_mem_list +ffffffff82b6cd70 r gfx_v9_4_3_ras_gcea_mem_list +ffffffff82b6ceb0 r gfx_v9_4_3_ras_gc_cane_mem_list +ffffffff82b6cec0 r gfx_v9_4_3_ras_gcutcl2_mem_list +ffffffff82b6ced0 r gfx_v9_4_3_ras_gds_mem_list +ffffffff82b6cee0 r gfx_v9_4_3_ras_lds_mem_list +ffffffff82b6d100 r gfx_v9_4_3_ras_rlc_mem_list +ffffffff82b6d180 r gfx_v9_4_3_ras_sp_mem_list +ffffffff82b6d190 r gfx_v9_4_3_ras_spi_mem_list +ffffffff82b6d1d0 r gfx_v9_4_3_ras_sqc_mem_list +ffffffff82b6d340 r gfx_v9_4_3_ras_sq_mem_list +ffffffff82b6d380 r gfx_v9_4_3_ras_ta_mem_list +ffffffff82b6d3d0 r gfx_v9_4_3_ras_tcc_mem_list +ffffffff82b6d3e0 r gfx_v9_4_3_ras_tca_mem_list +ffffffff82b6d3f0 r gfx_v9_4_3_ras_tci_mem_list +ffffffff82b6d400 r gfx_v9_4_3_ras_tcp_mem_list +ffffffff82b6d590 r gfx_v9_4_3_ras_td_mem_list +ffffffff82b6d5c0 r gfx_v9_4_3_ras_tcx_mem_list +ffffffff82b6db40 r gfx_v9_4_3_ras_atc_l2_mem_list +ffffffff82b6db50 r gfx_v9_4_3_ras_utcl2_mem_list +ffffffff82b6db60 r gfx_v9_4_3_ras_vml2_mem_list +ffffffff82b6db70 r gfx_v9_4_3_ras_vml2_walker_mem_list +ffffffff82b6e000 R gfxhub_v1_0_funcs +ffffffff82b6f000 R gfxhub_v1_2_funcs +ffffffff82b70000 R gfxhub_v2_0_funcs +ffffffff82b70060 r gfxhub_v2_0_vmhub_funcs ffffffff82b70070 r gfxhub_client_ids -ffffffff82b71000 R gfxhub_v3_0_funcs -ffffffff82b71060 r gfxhub_v3_0_vmhub_funcs +ffffffff82b71000 R gfxhub_v2_1_funcs +ffffffff82b71060 r gfxhub_v2_1_vmhub_funcs ffffffff82b71070 r gfxhub_client_ids -ffffffff82b72000 R gfxhub_v3_0_3_funcs -ffffffff82b72060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82b72000 R gfxhub_v3_0_funcs +ffffffff82b72060 r gfxhub_v3_0_vmhub_funcs ffffffff82b72070 r gfxhub_client_ids -ffffffff82b73000 R gmc_v10_0_ip_funcs -ffffffff82b730a0 R gmc_v10_0_ip_block -ffffffff82b730b8 r gmc_v10_0_gmc_funcs -ffffffff82b73110 r gmc_v10_0_irq_funcs -ffffffff82b73120 r gmc_v10_0_ecc_funcs -ffffffff82b74000 R gmc_v11_0_ip_funcs -ffffffff82b740a0 R gmc_v11_0_ip_block -ffffffff82b740b8 r gmc_v11_0_gmc_funcs -ffffffff82b74110 r gmc_v11_0_irq_funcs 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stoney_mgcg_cgcg_init -ffffffff82b762a0 r golden_settings_stoney_common -ffffffff82b77000 R gmc_v9_0_ip_funcs -ffffffff82b770a0 R gmc_v9_0_ip_block -ffffffff82b770b8 r gmc_v9_0_gmc_funcs -ffffffff82b77110 r gmc_v9_0_irq_funcs -ffffffff82b77120 r gmc_v9_0_ecc_funcs -ffffffff82b77130 r gfxhub_client_ids -ffffffff82b771a0 r mmhub_client_ids_vega10 -ffffffff82b77490 r mmhub_client_ids_vega12 -ffffffff82b77790 r mmhub_client_ids_vega20 -ffffffff82b77a80 r mmhub_client_ids_arcturus -ffffffff82b79290 r mmhub_client_ids_raven -ffffffff82b79450 r mmhub_client_ids_renoir -ffffffff82b79640 r mmhub_client_ids_aldebaran -ffffffff82b7ae50 r ecc_umc_mcumc_ctrl_addrs -ffffffff82b7aed0 r ecc_umc_mcumc_ctrl_mask_addrs -ffffffff82b7af50 r golden_settings_mmhub_1_0_0 -ffffffff82b7af80 r golden_settings_athub_1_0_0 -ffffffff82b7b000 R hdp_v4_0_funcs -ffffffff82b7c000 R hdp_v5_0_funcs -ffffffff82b7d000 R hdp_v5_2_funcs -ffffffff82b7e000 R hdp_v6_0_funcs -ffffffff82b7f000 r iceland_ih_ip_funcs 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vce_v4_0_irq_funcs -ffffffff82bcb000 r vcn_v1_0_ip_funcs -ffffffff82bcb0a0 R vcn_v1_0_ip_block -ffffffff82bcb0b8 r vcn_v1_0_dec_ring_vm_funcs -ffffffff82bcb1f8 r vcn_v1_0_enc_ring_vm_funcs -ffffffff82bcb338 r vcn_v1_0_irq_funcs -ffffffff82bcc000 r vcn_v2_0_ip_funcs -ffffffff82bcc0a0 R vcn_v2_0_ip_block -ffffffff82bcc0b8 r vcn_v2_0_dec_ring_vm_funcs -ffffffff82bcc1f8 r vcn_v2_0_enc_ring_vm_funcs -ffffffff82bcc338 r vcn_v2_0_irq_funcs -ffffffff82bcd000 r vcn_v2_5_ip_funcs -ffffffff82bcd0a0 R vcn_v2_5_ip_block -ffffffff82bcd0b8 r vcn_v2_6_ip_funcs -ffffffff82bcd158 R vcn_v2_6_ip_block -ffffffff82bcd170 R vcn_v2_6_ras_hw_ops -ffffffff82bcd1b0 r vcn_v2_5_dec_ring_vm_funcs -ffffffff82bcd2f0 r vcn_v2_5_enc_ring_vm_funcs -ffffffff82bcd430 r vcn_v2_5_irq_funcs -ffffffff82bcd440 r vcn_v2_6_ras_irq_funcs -ffffffff82bce000 r vcn_v3_0_ip_funcs -ffffffff82bce0a0 R vcn_v3_0_ip_block -ffffffff82bce0b8 r vcn_v3_0_dec_ring_vm_funcs -ffffffff82bce1f8 r vcn_v3_0_enc_ring_vm_funcs -ffffffff82bce338 r vcn_v3_0_irq_funcs -ffffffff82bcf000 r vcn_v4_0_ip_funcs -ffffffff82bcf0a0 R vcn_v4_0_ip_block -ffffffff82bcf0b8 R vcn_v4_0_ras_hw_ops -ffffffff82bcf0f8 r vcn_v4_0_irq_funcs -ffffffff82bcf108 r vcn_v4_0_ras_irq_funcs -ffffffff82bd0000 r vcn_v4_0_3_ip_funcs -ffffffff82bd00a0 R vcn_v4_0_3_ip_block -ffffffff82bd00b8 r vcn_v4_0_3_unified_ring_vm_funcs -ffffffff82bd01f8 r vcn_v4_0_3_irq_funcs -ffffffff82bd0208 r vcn_v4_0_3_ras_hw_ops -ffffffff82bd0250 r vcn_v4_0_3_ue_reg_list -ffffffff82bd1000 R vega10_ih_ip_funcs -ffffffff82bd10a0 R vega10_ih_ip_block -ffffffff82bd10b8 r vega10_ih_funcs -ffffffff82bd10d8 r vega10_ih_self_irq_funcs -ffffffff82bd2000 r GC_BASE -ffffffff82bd2064 r HDP_BASE -ffffffff82bd20c8 r MMHUB_BASE -ffffffff82bd212c r ATHUB_BASE -ffffffff82bd2190 r NBIO_BASE -ffffffff82bd21f4 r MP0_BASE -ffffffff82bd2258 r MP1_BASE -ffffffff82bd22bc r VCE_BASE -ffffffff82bd2320 r VCN_BASE -ffffffff82bd2384 r DF_BASE -ffffffff82bd23e8 r DCE_BASE -ffffffff82bd244c r OSSSYS_BASE -ffffffff82bd24b0 r SDMA0_BASE -ffffffff82bd2514 r SDMA1_BASE -ffffffff82bd2578 r SMUIO_BASE -ffffffff82bd25dc r PWR_BASE -ffffffff82bd2640 r NBIF_BASE -ffffffff82bd26a4 r THM_BASE -ffffffff82bd2708 r CLK_BASE -ffffffff82bd3000 R vega20_ih_ip_funcs -ffffffff82bd30a0 R vega20_ih_ip_block -ffffffff82bd30b8 r vega20_ih_funcs -ffffffff82bd30d8 r vega20_ih_self_irq_funcs -ffffffff82bd4000 r GC_BASE -ffffffff82bd4090 r HDP_BASE -ffffffff82bd4120 r MMHUB_BASE -ffffffff82bd41b0 r ATHUB_BASE -ffffffff82bd4240 r NBIO_BASE -ffffffff82bd42d0 r MP0_BASE -ffffffff82bd4360 r MP1_BASE -ffffffff82bd43f0 r UVD_BASE -ffffffff82bd4480 r VCE_BASE -ffffffff82bd4510 r DF_BASE -ffffffff82bd45a0 r DCE_BASE -ffffffff82bd4630 r OSSSYS_BASE -ffffffff82bd46c0 r SDMA0_BASE -ffffffff82bd4750 r SDMA1_BASE -ffffffff82bd47e0 r SMUIO_BASE -ffffffff82bd4870 r THM_BASE -ffffffff82bd4900 r CLK_BASE -ffffffff82bd4990 r UMC_BASE -ffffffff82bd4a20 r RSMU_BASE -ffffffff82bd5000 r vi_common_ip_block -ffffffff82bd5018 r vi_common_ip_funcs -ffffffff82bd50b8 r vi_asic_funcs -ffffffff82bd5180 r vi_allowed_read_registers -ffffffff82bd53e0 r topaz_video_codecs_encode -ffffffff82bd53f0 r topaz_video_codecs_decode -ffffffff82bd5400 r tonga_video_codecs_encode -ffffffff82bd5410 r tonga_video_codecs_decode -ffffffff82bd5420 r polaris_video_codecs_encode -ffffffff82bd5430 r cz_video_codecs_decode -ffffffff82bd5440 r tonga_video_codecs_encode_array -ffffffff82bd5460 r tonga_video_codecs_decode_array -ffffffff82bd54b0 r polaris_video_codecs_encode_array -ffffffff82bd54e0 r cz_video_codecs_decode_array -ffffffff82bd5560 r iceland_mgcg_cgcg_init -ffffffff82bd55a0 r fiji_mgcg_cgcg_init -ffffffff82bd5600 r tonga_mgcg_cgcg_init -ffffffff82bd5660 r cz_mgcg_cgcg_init -ffffffff82bd56a0 r stoney_mgcg_cgcg_init -ffffffff82bd6000 r amdgpu_dm_funcs -ffffffff82bd60a0 R dm_ip_block -ffffffff82bd60b8 R amdgpu_dm_encoder_helper_funcs -ffffffff82bd6120 r dm_display_funcs -ffffffff82bd6180 r hpd_disconnect_quirk_table -ffffffff82bd6ef0 r amdgpu_dm_mode_funcs -ffffffff82bd6f38 r amdgpu_dm_audio_component_bind_ops -ffffffff82bd6f48 r amdgpu_dm_audio_component_ops -ffffffff82bd6f80 r amdgpu_dm_encoder_funcs -ffffffff82bd6fa0 r amdgpu_dm_connector_funcs -ffffffff82bd7018 r amdgpu_dm_connector_helper_funcs -ffffffff82bd7078 r amdgpu_dm_i2c_algo -ffffffff82bd7088 r amdgpu_dm_backlight_ops -ffffffff82bd7260 r add_fs_modes.common_rates -ffffffff82bd8000 r amdgpu_dm_crtc_funcs -ffffffff82bd80c0 r amdgpu_dm_crtc_helper_funcs -ffffffff82bd9000 r dm_dtn_log_begin.msg -ffffffff82bd900d r dm_dtn_log_end.msg -ffffffff82bd9018 r SYNAPTICS_DEVICE_ID -ffffffff82bda000 r dm_crtc_irq_funcs -ffffffff82bda010 r dm_vline0_irq_funcs -ffffffff82bda020 r dm_dmub_outbox_irq_funcs -ffffffff82bda030 r dm_vupdate_irq_funcs -ffffffff82bda040 r dm_dmub_trace_irq_funcs -ffffffff82bda050 r dm_pageflip_irq_funcs -ffffffff82bda060 r dm_hpd_irq_funcs -ffffffff82bdb000 r amdgpu_dm_encoder_funcs -ffffffff82bdb020 r dm_mst_cbs -ffffffff82bdb030 r dm_dp_mst_connector_funcs -ffffffff82bdb0a8 r dm_dp_mst_connector_helper_funcs -ffffffff82bdc000 r dm_plane_funcs -ffffffff82bdc068 r dm_plane_helper_funcs -ffffffff82bde000 r vbios_funcs +ffffffff82b73000 R gfxhub_v3_0_3_funcs +ffffffff82b73060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82b73070 r gfxhub_client_ids +ffffffff82b74000 R gmc_v10_0_ip_funcs +ffffffff82b740a0 R gmc_v10_0_ip_block +ffffffff82b740b8 r gmc_v10_0_gmc_funcs +ffffffff82b74110 r gmc_v10_0_irq_funcs +ffffffff82b74120 r gmc_v10_0_ecc_funcs +ffffffff82b75000 R gmc_v11_0_ip_funcs +ffffffff82b750a0 R gmc_v11_0_ip_block +ffffffff82b750b8 r gmc_v11_0_gmc_funcs +ffffffff82b75110 r gmc_v11_0_irq_funcs +ffffffff82b75120 r gmc_v11_0_ecc_funcs +ffffffff82b76000 r gmc_v7_0_ip_funcs +ffffffff82b760a0 R gmc_v7_0_ip_block +ffffffff82b760b8 R gmc_v7_4_ip_block +ffffffff82b760d0 r gmc_v7_0_gmc_funcs +ffffffff82b76128 r gmc_v7_0_irq_funcs +ffffffff82b76138 r iceland_mgcg_cgcg_init +ffffffff82b76150 r golden_settings_iceland_a11 +ffffffff82b76180 r mc_cg_registers +ffffffff82b761b0 r mc_cg_en +ffffffff82b761e0 r mc_cg_ls_en +ffffffff82b77000 r gmc_v8_0_ip_funcs +ffffffff82b770a0 R gmc_v8_0_ip_block +ffffffff82b770b8 R gmc_v8_1_ip_block +ffffffff82b770d0 R gmc_v8_5_ip_block +ffffffff82b770e8 r gmc_v8_0_gmc_funcs +ffffffff82b77140 r gmc_v8_0_irq_funcs +ffffffff82b77150 r fiji_mgcg_cgcg_init +ffffffff82b77160 r golden_settings_fiji_a10 +ffffffff82b77190 r tonga_mgcg_cgcg_init +ffffffff82b771a0 r golden_settings_tonga_a11 +ffffffff82b77200 r golden_settings_polaris11_a11 +ffffffff82b77230 r golden_settings_polaris10_a11 +ffffffff82b7726c r cz_mgcg_cgcg_init +ffffffff82b77280 r stoney_mgcg_cgcg_init +ffffffff82b772a0 r golden_settings_stoney_common +ffffffff82b78000 R gmc_v9_0_ip_funcs +ffffffff82b780a0 R gmc_v9_0_ip_block +ffffffff82b780b8 r gmc_v9_0_gmc_funcs +ffffffff82b78110 r gmc_v9_0_irq_funcs +ffffffff82b78120 r gmc_v9_0_ecc_funcs +ffffffff82b78130 r gfxhub_client_ids +ffffffff82b781a0 r mmhub_client_ids_vega10 +ffffffff82b78490 r mmhub_client_ids_vega12 +ffffffff82b78790 r mmhub_client_ids_vega20 +ffffffff82b78a80 r mmhub_client_ids_arcturus +ffffffff82b7a290 r mmhub_client_ids_raven +ffffffff82b7a450 r mmhub_client_ids_renoir +ffffffff82b7a640 r mmhub_client_ids_aldebaran +ffffffff82b7be50 r ecc_umc_mcumc_ctrl_addrs +ffffffff82b7bed0 r ecc_umc_mcumc_ctrl_mask_addrs +ffffffff82b7bf50 r golden_settings_mmhub_1_0_0 +ffffffff82b7bf80 r golden_settings_athub_1_0_0 +ffffffff82b7c000 R hdp_v4_0_funcs +ffffffff82b7d000 R hdp_v5_0_funcs +ffffffff82b7e000 R hdp_v5_2_funcs +ffffffff82b7f000 R hdp_v6_0_funcs +ffffffff82b80000 r iceland_ih_ip_funcs +ffffffff82b800a0 R iceland_ih_ip_block +ffffffff82b800b8 r iceland_ih_funcs +ffffffff82b81000 r ih_v6_0_ip_funcs +ffffffff82b810a0 R ih_v6_0_ip_block +ffffffff82b810b8 r ih_v6_0_funcs +ffffffff82b810d8 r ih_v6_0_self_irq_funcs +ffffffff82b82000 r ih_v6_1_ip_funcs +ffffffff82b820a0 R ih_v6_1_ip_block +ffffffff82b820b8 r ih_v6_1_funcs +ffffffff82b820d8 r ih_v6_1_self_irq_funcs +ffffffff82b83000 R gfx_v11_0_imu_funcs +ffffffff82b83030 r imu_rlc_ram_golden_11 +ffffffff82b83680 r imu_rlc_ram_golden_11_0_2 +ffffffff82b84000 r imu_rlc_ram_golden_11_0_3 +ffffffff82b85000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82b85140 r jpeg_v1_0_irq_funcs +ffffffff82b86000 r jpeg_v2_0_ip_funcs +ffffffff82b860a0 R jpeg_v2_0_ip_block +ffffffff82b860b8 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82b861f8 r jpeg_v2_0_irq_funcs +ffffffff82b87000 r jpeg_v2_5_ip_funcs +ffffffff82b870a0 R jpeg_v2_5_ip_block +ffffffff82b870b8 r jpeg_v2_6_ip_funcs +ffffffff82b87158 R jpeg_v2_6_ip_block +ffffffff82b87170 R jpeg_v2_6_ras_hw_ops +ffffffff82b871b0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82b872f0 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82b87430 r jpeg_v2_5_irq_funcs +ffffffff82b87440 r jpeg_v2_6_ras_irq_funcs +ffffffff82b88000 r jpeg_v3_0_ip_funcs +ffffffff82b880a0 R jpeg_v3_0_ip_block +ffffffff82b880b8 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82b881f8 r jpeg_v3_0_irq_funcs +ffffffff82b89000 r jpeg_v4_0_ip_funcs +ffffffff82b890a0 R jpeg_v4_0_ip_block +ffffffff82b890b8 R jpeg_v4_0_ras_hw_ops +ffffffff82b890f8 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82b89238 r jpeg_v4_0_irq_funcs +ffffffff82b89248 r jpeg_v4_0_ras_irq_funcs +ffffffff82b8a000 r jpeg_v4_0_3_ip_funcs +ffffffff82b8a0a0 R jpeg_v4_0_3_ip_block +ffffffff82b8a0b8 r jpeg_v4_0_3_dec_ring_vm_funcs +ffffffff82b8a1f8 r jpeg_v4_0_3_irq_funcs +ffffffff82b8a208 r jpeg_v4_0_3_ras_hw_ops +ffffffff82b8a250 r jpeg_v4_0_3_ue_reg_list +ffffffff82b8b000 R lsdma_v6_0_funcs +ffffffff82b8c000 r mca_v3_0_mp0_hw_ops +ffffffff82b8c040 r mca_v3_0_mp1_hw_ops +ffffffff82b8c080 r mca_v3_0_mpio_hw_ops +ffffffff82b8d000 r mes_v10_1_ip_funcs +ffffffff82b8d0a0 R mes_v10_1_ip_block +ffffffff82b8d0b8 r mes_v10_1_funcs +ffffffff82b8d0e8 r mes_v10_1_ring_funcs +ffffffff82b8e000 r mes_v11_0_ip_funcs +ffffffff82b8e0a0 R mes_v11_0_ip_block +ffffffff82b8e0b8 r mes_v11_0_funcs +ffffffff82b8e0e8 r mes_v11_0_ring_funcs +ffffffff82b8f000 R mmhub_v1_0_funcs +ffffffff82b8f050 r mmhub_v1_0_edc_cnt_regs +ffffffff82b8f0c0 r mmhub_v1_0_ras_fields +ffffffff82b90000 R mmhub_v1_7_funcs +ffffffff82b90050 r mmhub_v1_7_edc_cnt_regs +ffffffff82b90250 r mmhub_v1_7_ras_fields +ffffffff82b919c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82b92000 R mmhub_v1_8_funcs +ffffffff82b92050 r mmhub_v1_8_ras_hw_ops +ffffffff82b92090 r mmhub_v1_8_ce_reg_list +ffffffff82b92180 r mmhub_v1_8_ras_memory_list +ffffffff82b922b0 r mmhub_v1_8_ue_reg_list +ffffffff82b93000 R mmhub_v2_0_funcs +ffffffff82b93050 r mmhub_v2_0_vmhub_funcs +ffffffff82b93060 r mmhub_client_ids_navi1x +ffffffff82b93190 r mmhub_client_ids_sienna_cichlid +ffffffff82b93450 r mmhub_client_ids_beige_goby +ffffffff82b94000 R mmhub_v2_3_funcs +ffffffff82b94050 r mmhub_v2_3_vmhub_funcs +ffffffff82b94060 r mmhub_client_ids_vangogh +ffffffff82b95000 R mmhub_v3_0_funcs +ffffffff82b95050 r mmhub_v3_0_vmhub_funcs +ffffffff82b95060 r mmhub_client_ids_v3_0_0 +ffffffff82b96000 R mmhub_v3_0_1_funcs +ffffffff82b96050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82b96060 r mmhub_client_ids_v3_0_1 +ffffffff82b97000 R mmhub_v3_0_2_funcs +ffffffff82b97050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82b97060 r mmhub_client_ids_v3_0_2 +ffffffff82b98000 R mmhub_v9_4_ras_hw_ops +ffffffff82b98040 R mmhub_v9_4_funcs +ffffffff82b98090 r mmhub_v9_4_edc_cnt_regs +ffffffff82b98330 r mmhub_v9_4_ras_fields +ffffffff82b9a3b0 r mmhub_v9_4_err_status_regs +ffffffff82b9b000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82b9b010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82b9b020 R xgpu_ai_virt_ops +ffffffff82b9c000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82b9c010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82b9c020 R xgpu_nv_virt_ops +ffffffff82b9d000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82b9d240 r xgpu_fiji_golden_settings_a10 +ffffffff82b9d370 r xgpu_fiji_golden_common_all +ffffffff82b9d3f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82b9d810 r xgpu_tonga_golden_settings_a11 +ffffffff82b9d9d0 r xgpu_tonga_golden_common_all +ffffffff82b9da28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82b9da38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82b9da48 R xgpu_vi_virt_ops +ffffffff82b9e000 r navi10_ih_ip_funcs +ffffffff82b9e0a0 R navi10_ih_ip_block +ffffffff82b9e0b8 r navi10_ih_funcs +ffffffff82b9e0d8 r navi10_ih_self_irq_funcs +ffffffff82b9f000 R nbio_v2_3_hdp_flush_reg +ffffffff82b9f048 R nbio_v2_3_funcs +ffffffff82ba0000 R nbio_v4_3_hdp_flush_reg +ffffffff82ba0048 R nbio_v4_3_funcs +ffffffff82ba0158 R nbio_v4_3_sriov_funcs +ffffffff82ba0268 r nbio_v4_3_ras_err_event_athub_irq_funcs +ffffffff82ba1000 R nbio_v6_1_hdp_flush_reg +ffffffff82ba1048 R nbio_v6_1_funcs +ffffffff82ba2000 R nbio_v7_0_hdp_flush_reg +ffffffff82ba2048 R nbio_v7_0_funcs +ffffffff82ba3000 R nbio_v7_2_hdp_flush_reg +ffffffff82ba3048 R nbio_v7_2_funcs +ffffffff82ba4000 R nbio_v7_4_hdp_flush_reg +ffffffff82ba4048 R nbio_v7_4_ras_hw_ops +ffffffff82ba4088 R nbio_v7_4_funcs +ffffffff82ba4198 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82ba41a8 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82ba5000 R nbio_v7_7_hdp_flush_reg +ffffffff82ba5048 R nbio_v7_7_funcs +ffffffff82ba6000 R nbio_v7_9_hdp_flush_reg +ffffffff82ba6048 R nbio_v7_9_funcs +ffffffff82ba6158 R nbio_v7_9_ras_hw_ops +ffffffff82ba6198 r nbio_v7_9_ras_controller_irq_funcs +ffffffff82ba61a8 r nbio_v7_9_ras_err_event_athub_irq_funcs +ffffffff82ba7000 r nv_common_ip_funcs +ffffffff82ba70a0 R nv_common_ip_block +ffffffff82ba70b8 r nv_asic_funcs +ffffffff82ba7180 r nv_allowed_read_registers +ffffffff82ba7300 r sc_video_codecs_encode +ffffffff82ba7310 r sc_video_codecs_decode_vcn1 +ffffffff82ba7320 r sc_video_codecs_decode_vcn0 +ffffffff82ba7330 r yc_video_codecs_decode +ffffffff82ba7340 r bg_video_codecs_encode +ffffffff82ba7350 r bg_video_codecs_decode +ffffffff82ba7360 r nv_video_codecs_encode +ffffffff82ba7370 r nv_video_codecs_decode +ffffffff82ba7380 r sc_video_codecs_encode_array +ffffffff82ba73b0 r sc_video_codecs_decode_array_vcn1 +ffffffff82ba7440 r sc_video_codecs_decode_array_vcn0 +ffffffff82ba74e0 r yc_video_codecs_decode_array +ffffffff82ba7550 r bg_video_codecs_decode_array +ffffffff82ba7590 r nv_video_codecs_encode_array +ffffffff82ba75c0 r nv_video_codecs_decode_array +ffffffff82ba8000 r psp_v10_0_funcs +ffffffff82ba9000 r psp_v11_0_funcs +ffffffff82baa000 r psp_v11_0_8_funcs +ffffffff82bab000 r psp_v12_0_funcs +ffffffff82bac000 r psp_v13_0_funcs +ffffffff82bad000 r psp_v13_0_4_funcs +ffffffff82bae000 r psp_v3_1_funcs +ffffffff82baf000 r sdma_v2_4_ip_funcs +ffffffff82baf0a0 R sdma_v2_4_ip_block +ffffffff82baf0b8 r sdma_v2_4_ring_funcs +ffffffff82baf1f8 r sdma_v2_4_buffer_funcs +ffffffff82baf218 r sdma_v2_4_vm_pte_funcs +ffffffff82baf238 r sdma_v2_4_trap_irq_funcs +ffffffff82baf248 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82baf260 r iceland_mgcg_cgcg_init +ffffffff82baf280 r golden_settings_iceland_a11 +ffffffff82bb0000 r sdma_v3_0_ip_funcs +ffffffff82bb00a0 R sdma_v3_0_ip_block +ffffffff82bb00b8 R sdma_v3_1_ip_block +ffffffff82bb00d0 r sdma_v3_0_ring_funcs +ffffffff82bb0210 r sdma_v3_0_buffer_funcs +ffffffff82bb0230 r sdma_v3_0_vm_pte_funcs +ffffffff82bb0250 r sdma_v3_0_trap_irq_funcs +ffffffff82bb0260 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82bb0270 r fiji_mgcg_cgcg_init +ffffffff82bb0290 r golden_settings_fiji_a10 +ffffffff82bb02f0 r tonga_mgcg_cgcg_init +ffffffff82bb0310 r golden_settings_tonga_a11 +ffffffff82bb0390 r golden_settings_polaris11_a11 +ffffffff82bb0410 r golden_settings_polaris10_a11 +ffffffff82bb0490 r cz_mgcg_cgcg_init +ffffffff82bb04b0 r cz_golden_settings_a11 +ffffffff82bb0540 r stoney_mgcg_cgcg_init +ffffffff82bb0550 r stoney_golden_settings_a11 +ffffffff82bb1000 R sdma_v4_0_ip_funcs +ffffffff82bb10a0 R sdma_v4_0_ras_hw_ops +ffffffff82bb10e0 R sdma_v4_0_ip_block +ffffffff82bb10f8 r sdma_v4_0_ring_funcs +ffffffff82bb1238 r sdma_v4_0_page_ring_funcs +ffffffff82bb1378 r sdma_v4_0_buffer_funcs +ffffffff82bb1398 r sdma_v4_0_vm_pte_funcs +ffffffff82bb13b8 r sdma_v4_0_trap_irq_funcs +ffffffff82bb13c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82bb13d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82bb13e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82bb13f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82bb1408 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82bb1418 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82bb1430 r golden_settings_sdma_4 +ffffffff82bb1690 r golden_settings_sdma_vg10 +ffffffff82bb1740 r golden_settings_sdma_vg12 +ffffffff82bb17f0 r golden_settings_sdma0_4_2_init +ffffffff82bb1810 r golden_settings_sdma0_4_2 +ffffffff82bb1aa0 r golden_settings_sdma1_4_2 +ffffffff82bb1d30 r golden_settings_sdma_arct +ffffffff82bb2030 r golden_settings_sdma_aldebaran +ffffffff82bb21a0 r golden_settings_sdma_4_1 +ffffffff82bb22b0 r golden_settings_sdma_rv2 +ffffffff82bb22e0 r golden_settings_sdma_rv1 +ffffffff82bb2310 r golden_settings_sdma_4_3 +ffffffff82bb2400 r sdma_v4_0_ras_fields +ffffffff82bb3000 R sdma_v4_4_ras_hw_ops +ffffffff82bb3040 r sdma_v4_4_ras_fields +ffffffff82bb4000 R sdma_v4_4_2_ip_funcs +ffffffff82bb40a0 R sdma_v4_4_2_ip_block +ffffffff82bb40b8 r sdma_v4_4_2_ring_funcs +ffffffff82bb41f8 r sdma_v4_4_2_page_ring_funcs +ffffffff82bb4338 r sdma_v4_4_2_buffer_funcs +ffffffff82bb4358 r sdma_v4_4_2_vm_pte_funcs +ffffffff82bb4378 r sdma_v4_4_2_trap_irq_funcs +ffffffff82bb4388 r sdma_v4_4_2_illegal_inst_irq_funcs +ffffffff82bb4398 r sdma_v4_4_2_ecc_irq_funcs +ffffffff82bb43a8 r sdma_v4_4_2_vm_hole_irq_funcs +ffffffff82bb43b8 r sdma_v4_4_2_doorbell_invalid_irq_funcs +ffffffff82bb43c8 r sdma_v4_4_2_pool_timeout_irq_funcs +ffffffff82bb43d8 r sdma_v4_4_2_srbm_write_irq_funcs +ffffffff82bb43e8 r sdma_v4_4_2_ras_hw_ops +ffffffff82bb4430 r sdma_v4_2_2_ue_reg_list +ffffffff82bb4460 r sdma_v4_4_2_ras_memory_list +ffffffff82bb5000 R sdma_v5_0_ip_funcs +ffffffff82bb50a0 R sdma_v5_0_ip_block +ffffffff82bb50b8 r sdma_v5_0_ring_funcs +ffffffff82bb51f8 r sdma_v5_0_buffer_funcs +ffffffff82bb5218 r sdma_v5_0_vm_pte_funcs +ffffffff82bb5238 r sdma_v5_0_trap_irq_funcs +ffffffff82bb5248 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82bb5260 r golden_settings_sdma_5 +ffffffff82bb54a0 r golden_settings_sdma_nv10 +ffffffff82bb54d0 r golden_settings_sdma_nv14 +ffffffff82bb5500 r golden_settings_sdma_5_sriov +ffffffff82bb56e0 r golden_settings_sdma_nv12 +ffffffff82bb5770 r golden_settings_sdma_cyan_skillfish +ffffffff82bb6000 R sdma_v5_2_ip_funcs +ffffffff82bb60a0 R sdma_v5_2_ip_block +ffffffff82bb60b8 r sdma_v5_2_ring_funcs +ffffffff82bb61f8 r sdma_v5_2_buffer_funcs +ffffffff82bb6218 r sdma_v5_2_vm_pte_funcs +ffffffff82bb6238 r sdma_v5_2_trap_irq_funcs +ffffffff82bb6248 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82bb7000 R sdma_v6_0_ip_funcs +ffffffff82bb70a0 R sdma_v6_0_ip_block +ffffffff82bb70b8 r sdma_v6_0_ring_funcs +ffffffff82bb71f8 r sdma_v6_0_buffer_funcs +ffffffff82bb7218 r sdma_v6_0_vm_pte_funcs +ffffffff82bb7238 r sdma_v6_0_trap_irq_funcs +ffffffff82bb7248 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82bb8000 r smu_v11_0_i2c_algo +ffffffff82bb8010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82bb8028 r smu_v11_0_i2c_control_quirks +ffffffff82bb9000 R smuio_v11_0_funcs +ffffffff82bba000 R smuio_v11_0_6_funcs +ffffffff82bbb000 R smuio_v13_0_funcs +ffffffff82bbc000 R smuio_v13_0_3_funcs +ffffffff82bbd000 R smuio_v13_0_6_funcs +ffffffff82bbe000 R smuio_v9_0_funcs +ffffffff82bbf000 r soc15_common_ip_funcs +ffffffff82bbf0a0 R vega10_common_ip_block +ffffffff82bbf0b8 r soc15_asic_funcs +ffffffff82bbf178 r vega20_asic_funcs +ffffffff82bbf238 r aqua_vanjaram_asic_funcs +ffffffff82bbf300 r soc15_allowed_read_registers +ffffffff82bbf490 r vega_video_codecs_encode +ffffffff82bbf4a0 r vega_video_codecs_decode +ffffffff82bbf4b0 r rv_video_codecs_decode +ffffffff82bbf4c0 r rn_video_codecs_decode +ffffffff82bbf4d0 r vcn_4_0_3_video_codecs_encode +ffffffff82bbf4e0 r vcn_4_0_3_video_codecs_decode +ffffffff82bbf4f0 r vega_video_codecs_encode_array +ffffffff82bbf520 r vega_video_codecs_decode_array +ffffffff82bbf5a0 r rv_video_codecs_decode_array +ffffffff82bbf630 r rn_video_codecs_decode_array +ffffffff82bbf6c0 r vcn_4_0_3_video_codecs_decode_array +ffffffff82bc0000 r soc21_common_ip_funcs +ffffffff82bc00a0 R soc21_common_ip_block +ffffffff82bc00b8 r soc21_asic_funcs +ffffffff82bc0180 r soc21_allowed_read_registers +ffffffff82bc0300 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82bc0310 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82bc0320 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82bc0330 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82bc0340 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82bc0370 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82bc03c0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82bc0400 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82bc1000 r tonga_ih_ip_funcs +ffffffff82bc10a0 R tonga_ih_ip_block +ffffffff82bc10b8 r tonga_ih_funcs +ffffffff82bc2000 R umc_v6_0_funcs +ffffffff82bc3000 R umc_v6_1_channel_idx_tbl +ffffffff82bc3080 R umc_v6_1_ras_hw_ops +ffffffff82bc4000 R umc_v6_7_channel_idx_tbl_second +ffffffff82bc4080 R umc_v6_7_channel_idx_tbl_first +ffffffff82bc4100 R umc_v6_7_ras_hw_ops +ffffffff82bc5000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82bc5040 R umc_v8_10_channel_idx_tbl_ext0 +ffffffff82bc5080 R umc_v8_10_channel_idx_tbl +ffffffff82bc50e0 R umc_v8_10_ras_hw_ops +ffffffff82bc6000 R umc_v8_7_channel_idx_tbl +ffffffff82bc6040 R umc_v8_7_ras_hw_ops +ffffffff82bc7000 r uvd_v5_0_ip_funcs +ffffffff82bc70a0 R uvd_v5_0_ip_block +ffffffff82bc70b8 r uvd_v5_0_ring_funcs +ffffffff82bc71f8 r uvd_v5_0_irq_funcs +ffffffff82bc8000 r uvd_v6_0_ip_funcs +ffffffff82bc80a0 R uvd_v6_0_ip_block +ffffffff82bc80b8 R uvd_v6_2_ip_block +ffffffff82bc80d0 R uvd_v6_3_ip_block +ffffffff82bc80e8 r uvd_v6_0_ring_vm_funcs +ffffffff82bc8228 r uvd_v6_0_ring_phys_funcs +ffffffff82bc8368 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82bc84a8 r uvd_v6_0_irq_funcs +ffffffff82bc9000 R uvd_v7_0_ip_funcs +ffffffff82bc90a0 R uvd_v7_0_ip_block +ffffffff82bc90b8 r uvd_v7_0_ring_vm_funcs +ffffffff82bc91f8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82bc9338 r uvd_v7_0_irq_funcs +ffffffff82bca000 r vce_v3_0_ip_funcs +ffffffff82bca0a0 R vce_v3_0_ip_block +ffffffff82bca0b8 R vce_v3_1_ip_block +ffffffff82bca0d0 R vce_v3_4_ip_block +ffffffff82bca0e8 r vce_v3_0_ring_vm_funcs +ffffffff82bca228 r vce_v3_0_ring_phys_funcs +ffffffff82bca368 r vce_v3_0_irq_funcs +ffffffff82bcb000 R vce_v4_0_ip_funcs +ffffffff82bcb0a0 R vce_v4_0_ip_block +ffffffff82bcb0b8 r vce_v4_0_ring_vm_funcs +ffffffff82bcb1f8 r vce_v4_0_irq_funcs +ffffffff82bcc000 r vcn_v1_0_ip_funcs +ffffffff82bcc0a0 R vcn_v1_0_ip_block +ffffffff82bcc0b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82bcc1f8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82bcc338 r vcn_v1_0_irq_funcs +ffffffff82bcd000 r vcn_v2_0_ip_funcs +ffffffff82bcd0a0 R vcn_v2_0_ip_block +ffffffff82bcd0b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82bcd1f8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82bcd338 r vcn_v2_0_irq_funcs +ffffffff82bce000 r vcn_v2_5_ip_funcs +ffffffff82bce0a0 R vcn_v2_5_ip_block +ffffffff82bce0b8 r vcn_v2_6_ip_funcs +ffffffff82bce158 R vcn_v2_6_ip_block +ffffffff82bce170 R vcn_v2_6_ras_hw_ops +ffffffff82bce1b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82bce2f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82bce430 r vcn_v2_5_irq_funcs +ffffffff82bce440 r vcn_v2_6_ras_irq_funcs +ffffffff82bcf000 r vcn_v3_0_ip_funcs +ffffffff82bcf0a0 R vcn_v3_0_ip_block +ffffffff82bcf0b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82bcf1f8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82bcf338 r vcn_v3_0_irq_funcs +ffffffff82bd0000 r vcn_v4_0_ip_funcs +ffffffff82bd00a0 R vcn_v4_0_ip_block +ffffffff82bd00b8 R vcn_v4_0_ras_hw_ops +ffffffff82bd00f8 r vcn_v4_0_irq_funcs +ffffffff82bd0108 r vcn_v4_0_ras_irq_funcs +ffffffff82bd1000 r vcn_v4_0_3_ip_funcs +ffffffff82bd10a0 R vcn_v4_0_3_ip_block +ffffffff82bd10b8 r vcn_v4_0_3_unified_ring_vm_funcs +ffffffff82bd11f8 r vcn_v4_0_3_irq_funcs +ffffffff82bd1208 r vcn_v4_0_3_ras_hw_ops +ffffffff82bd1250 r vcn_v4_0_3_ue_reg_list +ffffffff82bd2000 R vega10_ih_ip_funcs +ffffffff82bd20a0 R vega10_ih_ip_block +ffffffff82bd20b8 r vega10_ih_funcs +ffffffff82bd20d8 r vega10_ih_self_irq_funcs +ffffffff82bd3000 r GC_BASE +ffffffff82bd3064 r HDP_BASE +ffffffff82bd30c8 r MMHUB_BASE +ffffffff82bd312c r ATHUB_BASE +ffffffff82bd3190 r NBIO_BASE +ffffffff82bd31f4 r MP0_BASE +ffffffff82bd3258 r MP1_BASE +ffffffff82bd32bc r VCE_BASE +ffffffff82bd3320 r VCN_BASE +ffffffff82bd3384 r DF_BASE +ffffffff82bd33e8 r DCE_BASE +ffffffff82bd344c r OSSSYS_BASE +ffffffff82bd34b0 r SDMA0_BASE +ffffffff82bd3514 r SDMA1_BASE +ffffffff82bd3578 r SMUIO_BASE +ffffffff82bd35dc r PWR_BASE +ffffffff82bd3640 r NBIF_BASE +ffffffff82bd36a4 r THM_BASE +ffffffff82bd3708 r CLK_BASE +ffffffff82bd4000 R vega20_ih_ip_funcs +ffffffff82bd40a0 R vega20_ih_ip_block +ffffffff82bd40b8 r vega20_ih_funcs +ffffffff82bd40d8 r vega20_ih_self_irq_funcs +ffffffff82bd5000 r GC_BASE +ffffffff82bd5090 r HDP_BASE +ffffffff82bd5120 r MMHUB_BASE +ffffffff82bd51b0 r ATHUB_BASE +ffffffff82bd5240 r NBIO_BASE +ffffffff82bd52d0 r MP0_BASE +ffffffff82bd5360 r MP1_BASE +ffffffff82bd53f0 r UVD_BASE +ffffffff82bd5480 r VCE_BASE +ffffffff82bd5510 r DF_BASE +ffffffff82bd55a0 r DCE_BASE +ffffffff82bd5630 r OSSSYS_BASE +ffffffff82bd56c0 r SDMA0_BASE +ffffffff82bd5750 r SDMA1_BASE +ffffffff82bd57e0 r SMUIO_BASE +ffffffff82bd5870 r THM_BASE +ffffffff82bd5900 r CLK_BASE +ffffffff82bd5990 r UMC_BASE +ffffffff82bd5a20 r RSMU_BASE +ffffffff82bd6000 r vi_common_ip_block +ffffffff82bd6018 r vi_common_ip_funcs +ffffffff82bd60b8 r vi_asic_funcs +ffffffff82bd6180 r vi_allowed_read_registers +ffffffff82bd63e0 r topaz_video_codecs_encode +ffffffff82bd63f0 r topaz_video_codecs_decode +ffffffff82bd6400 r tonga_video_codecs_encode +ffffffff82bd6410 r tonga_video_codecs_decode +ffffffff82bd6420 r polaris_video_codecs_encode +ffffffff82bd6430 r cz_video_codecs_decode +ffffffff82bd6440 r tonga_video_codecs_encode_array +ffffffff82bd6460 r tonga_video_codecs_decode_array +ffffffff82bd64b0 r polaris_video_codecs_encode_array +ffffffff82bd64e0 r cz_video_codecs_decode_array +ffffffff82bd6560 r iceland_mgcg_cgcg_init +ffffffff82bd65a0 r fiji_mgcg_cgcg_init +ffffffff82bd6600 r tonga_mgcg_cgcg_init +ffffffff82bd6660 r cz_mgcg_cgcg_init +ffffffff82bd66a0 r stoney_mgcg_cgcg_init +ffffffff82bd7000 r amdgpu_dm_funcs +ffffffff82bd70a0 R dm_ip_block +ffffffff82bd70b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82bd7120 r dm_display_funcs +ffffffff82bd7180 r hpd_disconnect_quirk_table +ffffffff82bd7ef0 r amdgpu_dm_mode_funcs +ffffffff82bd7f38 r amdgpu_dm_audio_component_bind_ops +ffffffff82bd7f48 r amdgpu_dm_audio_component_ops +ffffffff82bd7f80 r amdgpu_dm_encoder_funcs +ffffffff82bd7fa0 r amdgpu_dm_connector_funcs +ffffffff82bd8018 r amdgpu_dm_connector_helper_funcs +ffffffff82bd8078 r amdgpu_dm_i2c_algo +ffffffff82bd8088 r amdgpu_dm_backlight_ops +ffffffff82bd8260 r add_fs_modes.common_rates +ffffffff82bd9000 r amdgpu_dm_crtc_funcs +ffffffff82bd90c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82bda000 r dm_dtn_log_begin.msg +ffffffff82bda00d r dm_dtn_log_end.msg +ffffffff82bda018 r SYNAPTICS_DEVICE_ID +ffffffff82bdb000 r dm_crtc_irq_funcs +ffffffff82bdb010 r dm_vline0_irq_funcs +ffffffff82bdb020 r dm_dmub_outbox_irq_funcs +ffffffff82bdb030 r dm_vupdate_irq_funcs +ffffffff82bdb040 r dm_dmub_trace_irq_funcs +ffffffff82bdb050 r dm_pageflip_irq_funcs +ffffffff82bdb060 r dm_hpd_irq_funcs +ffffffff82bdc000 r amdgpu_dm_encoder_funcs +ffffffff82bdc020 r dm_mst_cbs +ffffffff82bdc030 r dm_dp_mst_connector_funcs +ffffffff82bdc0a8 r dm_dp_mst_connector_helper_funcs +ffffffff82bdd000 r dm_plane_funcs +ffffffff82bdd068 r dm_plane_helper_funcs ffffffff82bdf000 r vbios_funcs -ffffffff82be4000 r command_table_helper_funcs +ffffffff82be0000 r vbios_funcs ffffffff82be5000 r command_table_helper_funcs ffffffff82be6000 r command_table_helper_funcs ffffffff82be7000 r command_table_helper_funcs -ffffffff82be8000 r dce80_max_clks_by_state -ffffffff82be8028 r disp_clk_regs -ffffffff82be807c r disp_clk_shift -ffffffff82be8088 r disp_clk_mask -ffffffff82be9000 r dce110_max_clks_by_state +ffffffff82be8000 r command_table_helper_funcs +ffffffff82be9000 r dce80_max_clks_by_state ffffffff82be9028 r disp_clk_regs ffffffff82be907c r disp_clk_shift ffffffff82be9088 r disp_clk_mask -ffffffff82bea000 r dce112_max_clks_by_state +ffffffff82bea000 r dce110_max_clks_by_state ffffffff82bea028 r disp_clk_regs ffffffff82bea07c r disp_clk_shift ffffffff82bea088 r disp_clk_mask -ffffffff82beb000 r dce120_max_clks_by_state -ffffffff82bec000 r clk_mgr_regs -ffffffff82bec054 r clk_mgr_shift -ffffffff82bec060 r clk_mgr_mask +ffffffff82beb000 r dce112_max_clks_by_state +ffffffff82beb028 r disp_clk_regs +ffffffff82beb07c r disp_clk_shift +ffffffff82beb088 r disp_clk_mask +ffffffff82bec000 r dce120_max_clks_by_state ffffffff82bed000 r clk_mgr_regs ffffffff82bed054 r clk_mgr_shift ffffffff82bed060 r clk_mgr_mask ffffffff82bee000 r clk_mgr_regs ffffffff82bee054 r clk_mgr_shift ffffffff82bee060 r clk_mgr_mask -ffffffff82bef000 r lpddr5_wm_table -ffffffff82bef0c0 r ddr5_wm_table +ffffffff82bef000 r clk_mgr_regs +ffffffff82bef054 r clk_mgr_shift +ffffffff82bef060 r clk_mgr_mask ffffffff82bf0000 r lpddr5_wm_table ffffffff82bf00c0 r ddr5_wm_table -ffffffff82bf1000 r ddr5_wm_table -ffffffff82bf2000 r lpddr5_wm_table -ffffffff82bf20c0 r ddr4_wm_table -ffffffff82bf3000 r clk_mgr_regs_dcn321 -ffffffff82bf3054 r clk_mgr_shift_dcn321 -ffffffff82bf3060 r clk_mgr_mask_dcn321 -ffffffff82bf3084 r clk_mgr_regs_dcn32 -ffffffff82bf30d8 r clk_mgr_shift_dcn32 -ffffffff82bf30e4 r clk_mgr_mask_dcn32 -ffffffff82bf4000 r DC_BUILD_ID -ffffffff82bf6000 r output_csc_matrix -ffffffff82bf60e0 r black_color_format -ffffffff82bf9000 r dce_funcs -ffffffff82bfa000 r funcs -ffffffff82bfb000 R video_optimized_pixel_rates -ffffffff82bfb1c0 r dce110_clk_src_funcs -ffffffff82bfb1e8 r dce112_clk_src_funcs -ffffffff82bfb210 r dcn20_clk_src_funcs -ffffffff82bfb238 r dcn3_clk_src_funcs -ffffffff82bfb260 r dcn31_clk_src_funcs -ffffffff82bfc000 r dce_funcs -ffffffff82bfc068 r dcn10_funcs -ffffffff82bfc0d0 r dcn20_funcs -ffffffff82bfc138 r dcn21_funcs -ffffffff82bfd000 r dce_ipp_funcs -ffffffff82bfe000 r dce110_lnk_enc_funcs -ffffffff82bff000 r dce_mi_funcs -ffffffff82bff090 r dce112_mi_funcs -ffffffff82bff120 r dce120_mi_funcs -ffffffff82bff1b0 r pte_settings -ffffffff82c00000 r funcs -ffffffff82c01000 r dce_link_panel_cntl_funcs -ffffffff82c02000 r filter_3tap_16p_upscale -ffffffff82c02040 r filter_3tap_16p_116 -ffffffff82c02080 r filter_3tap_16p_149 -ffffffff82c020c0 r filter_3tap_16p_183 -ffffffff82c02100 r filter_3tap_64p_upscale -ffffffff82c021d0 r filter_3tap_64p_116 -ffffffff82c022a0 r filter_3tap_64p_149 -ffffffff82c02370 r filter_3tap_64p_183 -ffffffff82c02440 r filter_4tap_16p_upscale -ffffffff82c02490 r filter_4tap_16p_116 -ffffffff82c024e0 r filter_4tap_16p_149 -ffffffff82c02530 r filter_4tap_16p_183 -ffffffff82c02580 r filter_4tap_64p_upscale -ffffffff82c02690 r filter_4tap_64p_116 -ffffffff82c027a0 r filter_4tap_64p_149 -ffffffff82c028b0 r filter_4tap_64p_183 -ffffffff82c029c0 r filter_5tap_64p_upscale -ffffffff82c02b10 r filter_5tap_64p_116 -ffffffff82c02c60 r filter_5tap_64p_149 -ffffffff82c02db0 r filter_5tap_64p_183 -ffffffff82c02f00 r filter_6tap_64p_upscale -ffffffff82c03090 r filter_6tap_64p_116 -ffffffff82c03220 r filter_6tap_64p_149 -ffffffff82c033b0 r filter_6tap_64p_183 -ffffffff82c03540 r filter_7tap_64p_upscale -ffffffff82c03710 r filter_7tap_64p_116 -ffffffff82c038e0 r filter_7tap_64p_149 -ffffffff82c03ab0 r filter_7tap_64p_183 -ffffffff82c03c80 r filter_8tap_64p_upscale -ffffffff82c03e90 r filter_8tap_64p_116 -ffffffff82c040a0 r filter_8tap_64p_149 -ffffffff82c042b0 r filter_8tap_64p_183 -ffffffff82c044c0 r filter_2tap_16p -ffffffff82c044f0 r filter_2tap_64p -ffffffff82c05000 r dce110_str_enc_funcs -ffffffff82c05120 r audio_clock_info_table_48bpc -ffffffff82c052b0 r audio_clock_info_table_36bpc -ffffffff82c05440 r audio_clock_info_table -ffffffff82c06000 r global_color_matrix -ffffffff82c060a8 r dce_transform_funcs -ffffffff82c07000 r abm_funcs -ffffffff82c08000 r psr_funcs -ffffffff82c08040 r DP_SINK_DEVICE_STR_ID_1 -ffffffff82c08045 r DP_SINK_DEVICE_STR_ID_2 -ffffffff82c09000 r replay_funcs -ffffffff82c0a000 r reg_offsets -ffffffff82c0b000 r bios_regs -ffffffff82c0b008 r res_cap -ffffffff82c0b048 r dce100_res_pool_funcs -ffffffff82c0b140 r clk_src_regs -ffffffff82c0b23c r dmcu_regs -ffffffff82c0b298 r dmcu_shift -ffffffff82c0b2ac r dmcu_mask -ffffffff82c0b2f8 r abm_regs -ffffffff82c0b360 r abm_shift -ffffffff82c0b384 r abm_mask -ffffffff82c0b410 r debug_defaults -ffffffff82c0b5c0 r dce100_tg_offsets -ffffffff82c0b608 r plane_cap -ffffffff82c0b638 r res_create_funcs -ffffffff82c0b670 r panel_cntl_regs -ffffffff82c0b690 r panel_cntl_shift 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-ffffffff82c0dcb0 r hwseq_shift -ffffffff82c0dd30 r hwseq_mask -ffffffff82c0e000 r reg_offsets -ffffffff82c0e018 r dce110_compressor_funcs -ffffffff82c0f000 r dce110_funcs -ffffffff82c0f2e8 r dce110_private_funcs -ffffffff82c10000 r dce110_mem_input_v_funcs -ffffffff82c10090 r dvmm_Hw_Setting_1DTiling -ffffffff82c10120 r dvmm_Hw_Setting_2DTiling -ffffffff82c101b0 r dvmm_Hw_Setting_Linear -ffffffff82c11000 r global_color_matrix -ffffffff82c110b0 r input_csc_matrix -ffffffff82c12000 r funcs -ffffffff82c13000 r bios_regs -ffffffff82c13008 r dce110_res_pool_funcs -ffffffff82c13100 r debug_defaults -ffffffff82c132b0 r clk_src_regs -ffffffff82c133ac r dmcu_regs -ffffffff82c13408 r dmcu_shift -ffffffff82c1341c r dmcu_mask -ffffffff82c13468 r abm_regs -ffffffff82c134d0 r abm_shift -ffffffff82c134f4 r abm_mask -ffffffff82c13580 r dce110_tg_offsets -ffffffff82c135c8 r res_create_funcs -ffffffff82c135f8 r plane_cap -ffffffff82c13624 r underlay_plane_cap -ffffffff82c13650 r stoney_resource_cap -ffffffff82c1368c r carrizo_resource_cap -ffffffff82c136d0 r panel_cntl_regs -ffffffff82c136f0 r panel_cntl_shift -ffffffff82c13700 r panel_cntl_mask -ffffffff82c13740 r link_enc_regs -ffffffff82c13b00 r link_enc_aux_regs -ffffffff82c13b50 r link_enc_hpd_regs -ffffffff82c13b68 r link_enc_feature -ffffffff82c13b78 r cs_shift -ffffffff82c13b84 r cs_mask -ffffffff82c13bb0 r mi_regs -ffffffff82c13d3c r mi_shifts -ffffffff82c13d84 r mi_masks -ffffffff82c13ea0 r ipp_regs -ffffffff82c13f9c r ipp_shift -ffffffff82c13fc4 r ipp_mask -ffffffff82c14060 r xfm_regs -ffffffff82c14330 r xfm_shift -ffffffff82c14390 r xfm_mask -ffffffff82c14510 r opp_regs -ffffffff82c14660 r opp_shift -ffffffff82c1468c r opp_mask -ffffffff82c14740 r aux_engine_regs -ffffffff82c14830 r aux_mask -ffffffff82c14890 r aux_shift -ffffffff82c148b0 r i2c_hw_regs -ffffffff82c14a00 r i2c_shifts -ffffffff82c14a2c r i2c_masks -ffffffff82c14ad0 r audio_regs -ffffffff82c14c04 r audio_shift -ffffffff82c14c1c r audio_mask -ffffffff82c14c60 r stream_enc_regs -ffffffff82c14f3c r se_shift -ffffffff82c14fc0 r se_mask -ffffffff82c151c4 r hwseq_stoney_reg -ffffffff82c153e0 r hwseq_cz_reg -ffffffff82c155fc r hwseq_shift -ffffffff82c1567c r hwseq_mask -ffffffff82c16000 r dce110_tg_funcs -ffffffff82c17000 r dce110_tg_v_funcs -ffffffff82c18000 r dce110_xfmv_funcs -ffffffff82c19000 r reg_offsets +ffffffff82bf1000 r lpddr5_wm_table +ffffffff82bf10c0 r ddr5_wm_table +ffffffff82bf2000 r ddr5_wm_table +ffffffff82bf3000 r lpddr5_wm_table +ffffffff82bf30c0 r ddr4_wm_table +ffffffff82bf4000 r clk_mgr_regs_dcn321 +ffffffff82bf4054 r clk_mgr_shift_dcn321 +ffffffff82bf4060 r clk_mgr_mask_dcn321 +ffffffff82bf4084 r clk_mgr_regs_dcn32 +ffffffff82bf40d8 r clk_mgr_shift_dcn32 +ffffffff82bf40e4 r clk_mgr_mask_dcn32 +ffffffff82bf5000 r DC_BUILD_ID +ffffffff82bf7000 r output_csc_matrix +ffffffff82bf70e0 r black_color_format +ffffffff82bfa000 r dce_funcs +ffffffff82bfb000 r funcs +ffffffff82bfc000 R video_optimized_pixel_rates +ffffffff82bfc1c0 r dce110_clk_src_funcs +ffffffff82bfc1e8 r dce112_clk_src_funcs +ffffffff82bfc210 r dcn20_clk_src_funcs +ffffffff82bfc238 r dcn3_clk_src_funcs +ffffffff82bfc260 r dcn31_clk_src_funcs +ffffffff82bfd000 r dce_funcs +ffffffff82bfd068 r dcn10_funcs +ffffffff82bfd0d0 r dcn20_funcs +ffffffff82bfd138 r dcn21_funcs +ffffffff82bfe000 r dce_ipp_funcs +ffffffff82bff000 r dce110_lnk_enc_funcs +ffffffff82c00000 r dce_mi_funcs +ffffffff82c00090 r dce112_mi_funcs +ffffffff82c00120 r dce120_mi_funcs +ffffffff82c001b0 r pte_settings +ffffffff82c01000 r funcs +ffffffff82c02000 r dce_link_panel_cntl_funcs +ffffffff82c03000 r filter_3tap_16p_upscale +ffffffff82c03040 r filter_3tap_16p_116 +ffffffff82c03080 r filter_3tap_16p_149 +ffffffff82c030c0 r filter_3tap_16p_183 +ffffffff82c03100 r filter_3tap_64p_upscale +ffffffff82c031d0 r filter_3tap_64p_116 +ffffffff82c032a0 r filter_3tap_64p_149 +ffffffff82c03370 r filter_3tap_64p_183 +ffffffff82c03440 r filter_4tap_16p_upscale +ffffffff82c03490 r filter_4tap_16p_116 +ffffffff82c034e0 r filter_4tap_16p_149 +ffffffff82c03530 r filter_4tap_16p_183 +ffffffff82c03580 r filter_4tap_64p_upscale +ffffffff82c03690 r filter_4tap_64p_116 +ffffffff82c037a0 r filter_4tap_64p_149 +ffffffff82c038b0 r filter_4tap_64p_183 +ffffffff82c039c0 r filter_5tap_64p_upscale +ffffffff82c03b10 r filter_5tap_64p_116 +ffffffff82c03c60 r filter_5tap_64p_149 +ffffffff82c03db0 r filter_5tap_64p_183 +ffffffff82c03f00 r filter_6tap_64p_upscale +ffffffff82c04090 r filter_6tap_64p_116 +ffffffff82c04220 r filter_6tap_64p_149 +ffffffff82c043b0 r filter_6tap_64p_183 +ffffffff82c04540 r filter_7tap_64p_upscale +ffffffff82c04710 r filter_7tap_64p_116 +ffffffff82c048e0 r filter_7tap_64p_149 +ffffffff82c04ab0 r filter_7tap_64p_183 +ffffffff82c04c80 r filter_8tap_64p_upscale +ffffffff82c04e90 r filter_8tap_64p_116 +ffffffff82c050a0 r filter_8tap_64p_149 +ffffffff82c052b0 r filter_8tap_64p_183 +ffffffff82c054c0 r filter_2tap_16p +ffffffff82c054f0 r filter_2tap_64p +ffffffff82c06000 r dce110_str_enc_funcs +ffffffff82c06120 r audio_clock_info_table_48bpc +ffffffff82c062b0 r audio_clock_info_table_36bpc +ffffffff82c06440 r audio_clock_info_table +ffffffff82c07000 r global_color_matrix +ffffffff82c070a8 r dce_transform_funcs +ffffffff82c08000 r abm_funcs +ffffffff82c09000 r psr_funcs +ffffffff82c09040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82c09045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82c0a000 r replay_funcs +ffffffff82c0b000 r reg_offsets +ffffffff82c0c000 r bios_regs +ffffffff82c0c008 r res_cap +ffffffff82c0c048 r dce100_res_pool_funcs +ffffffff82c0c140 r clk_src_regs +ffffffff82c0c23c r dmcu_regs +ffffffff82c0c298 r dmcu_shift +ffffffff82c0c2ac r dmcu_mask +ffffffff82c0c2f8 r abm_regs +ffffffff82c0c360 r abm_shift +ffffffff82c0c384 r abm_mask +ffffffff82c0c410 r debug_defaults +ffffffff82c0c5c0 r dce100_tg_offsets +ffffffff82c0c608 r plane_cap +ffffffff82c0c638 r res_create_funcs +ffffffff82c0c670 r panel_cntl_regs +ffffffff82c0c690 r panel_cntl_shift +ffffffff82c0c6a0 r panel_cntl_mask +ffffffff82c0c6e0 r link_enc_regs +ffffffff82c0caa0 r link_enc_aux_regs +ffffffff82c0caf0 r link_enc_hpd_regs +ffffffff82c0cb08 r link_enc_feature +ffffffff82c0cb18 r cs_shift +ffffffff82c0cb24 r cs_mask +ffffffff82c0cb50 r mi_regs +ffffffff82c0ce68 r mi_shifts +ffffffff82c0ceb0 r mi_masks +ffffffff82c0cfd0 r ipp_regs +ffffffff82c0d1c8 r ipp_shift +ffffffff82c0d1f0 r ipp_mask +ffffffff82c0d290 r xfm_regs +ffffffff82c0d830 r xfm_shift +ffffffff82c0d890 r xfm_mask +ffffffff82c0da10 r opp_regs +ffffffff82c0db60 r opp_shift +ffffffff82c0db8c r opp_mask +ffffffff82c0dc40 r aux_engine_regs +ffffffff82c0dd30 r aux_mask +ffffffff82c0dd90 r aux_shift +ffffffff82c0ddb0 r i2c_hw_regs +ffffffff82c0df00 r i2c_shifts +ffffffff82c0df2c r i2c_masks +ffffffff82c0dfd0 r audio_regs +ffffffff82c0e104 r audio_shift +ffffffff82c0e11c r audio_mask +ffffffff82c0e160 r stream_enc_regs +ffffffff82c0e80c r se_shift +ffffffff82c0e890 r se_mask +ffffffff82c0ea94 r hwseq_reg +ffffffff82c0ecb0 r hwseq_shift +ffffffff82c0ed30 r hwseq_mask +ffffffff82c0f000 r reg_offsets +ffffffff82c0f018 r dce110_compressor_funcs +ffffffff82c10000 r dce110_funcs +ffffffff82c102e8 r dce110_private_funcs +ffffffff82c11000 r dce110_mem_input_v_funcs +ffffffff82c11090 r dvmm_Hw_Setting_1DTiling +ffffffff82c11120 r dvmm_Hw_Setting_2DTiling +ffffffff82c111b0 r dvmm_Hw_Setting_Linear +ffffffff82c12000 r global_color_matrix +ffffffff82c120b0 r input_csc_matrix +ffffffff82c13000 r funcs +ffffffff82c14000 r bios_regs +ffffffff82c14008 r dce110_res_pool_funcs +ffffffff82c14100 r debug_defaults +ffffffff82c142b0 r clk_src_regs +ffffffff82c143ac r dmcu_regs +ffffffff82c14408 r dmcu_shift +ffffffff82c1441c r dmcu_mask +ffffffff82c14468 r abm_regs +ffffffff82c144d0 r abm_shift +ffffffff82c144f4 r abm_mask +ffffffff82c14580 r dce110_tg_offsets +ffffffff82c145c8 r res_create_funcs +ffffffff82c145f8 r plane_cap +ffffffff82c14624 r underlay_plane_cap +ffffffff82c14650 r stoney_resource_cap +ffffffff82c1468c r carrizo_resource_cap +ffffffff82c146d0 r panel_cntl_regs +ffffffff82c146f0 r panel_cntl_shift +ffffffff82c14700 r panel_cntl_mask +ffffffff82c14740 r link_enc_regs +ffffffff82c14b00 r link_enc_aux_regs +ffffffff82c14b50 r link_enc_hpd_regs +ffffffff82c14b68 r link_enc_feature +ffffffff82c14b78 r cs_shift +ffffffff82c14b84 r cs_mask +ffffffff82c14bb0 r mi_regs +ffffffff82c14d3c r mi_shifts +ffffffff82c14d84 r mi_masks +ffffffff82c14ea0 r ipp_regs +ffffffff82c14f9c r ipp_shift +ffffffff82c14fc4 r ipp_mask +ffffffff82c15060 r xfm_regs +ffffffff82c15330 r xfm_shift +ffffffff82c15390 r xfm_mask +ffffffff82c15510 r opp_regs +ffffffff82c15660 r opp_shift +ffffffff82c1568c r opp_mask +ffffffff82c15740 r aux_engine_regs +ffffffff82c15830 r aux_mask +ffffffff82c15890 r aux_shift +ffffffff82c158b0 r i2c_hw_regs +ffffffff82c15a00 r i2c_shifts +ffffffff82c15a2c r i2c_masks +ffffffff82c15ad0 r audio_regs +ffffffff82c15c04 r audio_shift +ffffffff82c15c1c r audio_mask +ffffffff82c15c60 r stream_enc_regs +ffffffff82c15f3c r se_shift +ffffffff82c15fc0 r se_mask +ffffffff82c161c4 r hwseq_stoney_reg +ffffffff82c163e0 r hwseq_cz_reg +ffffffff82c165fc r hwseq_shift +ffffffff82c1667c r hwseq_mask +ffffffff82c17000 r dce110_tg_funcs +ffffffff82c18000 r dce110_tg_v_funcs +ffffffff82c19000 r dce110_xfmv_funcs ffffffff82c1a000 r reg_offsets -ffffffff82c1b000 r bios_regs -ffffffff82c1b008 r dce112_res_pool_funcs -ffffffff82c1b100 r debug_defaults -ffffffff82c1b2b0 r clk_src_regs -ffffffff82c1b4a8 r dmcu_regs -ffffffff82c1b504 r dmcu_shift -ffffffff82c1b518 r dmcu_mask -ffffffff82c1b564 r abm_regs -ffffffff82c1b5cc r abm_shift -ffffffff82c1b5f0 r abm_mask -ffffffff82c1b680 r dce112_tg_offsets -ffffffff82c1b6c8 r res_create_funcs -ffffffff82c1b6f8 r plane_cap -ffffffff82c1b724 r polaris_11_resource_cap -ffffffff82c1b760 r polaris_10_resource_cap -ffffffff82c1b7a0 r panel_cntl_regs -ffffffff82c1b7c0 r panel_cntl_shift -ffffffff82c1b7d0 r panel_cntl_mask -ffffffff82c1b810 r link_enc_regs -ffffffff82c1bbd0 r link_enc_aux_regs -ffffffff82c1bc20 r link_enc_hpd_regs -ffffffff82c1bc38 r link_enc_feature -ffffffff82c1bc48 r cs_shift -ffffffff82c1bc54 r cs_mask -ffffffff82c1bc80 r mi_regs -ffffffff82c1bf98 r mi_shifts -ffffffff82c1bfe0 r mi_masks -ffffffff82c1c100 r ipp_regs -ffffffff82c1c2f8 r ipp_shift -ffffffff82c1c320 r ipp_mask -ffffffff82c1c3c0 r xfm_regs -ffffffff82c1c960 r xfm_shift -ffffffff82c1c9c0 r xfm_mask -ffffffff82c1cb40 r opp_regs -ffffffff82c1cc90 r opp_shift -ffffffff82c1ccbc r opp_mask -ffffffff82c1cd70 r aux_engine_regs -ffffffff82c1ce60 r aux_mask -ffffffff82c1cec0 r aux_shift -ffffffff82c1cee0 r i2c_hw_regs -ffffffff82c1d030 r i2c_shifts -ffffffff82c1d05c r i2c_masks -ffffffff82c1d100 r audio_regs -ffffffff82c1d208 r audio_shift -ffffffff82c1d220 r audio_mask -ffffffff82c1d260 r stream_enc_regs -ffffffff82c1d818 r se_shift -ffffffff82c1d89c r se_mask -ffffffff82c1daa0 r hwseq_reg -ffffffff82c1dcbc r hwseq_shift -ffffffff82c1dd3c r hwseq_mask -ffffffff82c1e000 r bios_regs -ffffffff82c1e008 r res_cap -ffffffff82c1e048 r dce120_res_pool_funcs -ffffffff82c1e140 r debug_defaults -ffffffff82c1e2f0 r clk_src_regs -ffffffff82c1e4e8 r dmcu_regs -ffffffff82c1e544 r dmcu_shift -ffffffff82c1e558 r dmcu_mask -ffffffff82c1e5a4 r abm_regs -ffffffff82c1e60c r abm_shift -ffffffff82c1e630 r abm_mask -ffffffff82c1e6c0 r dce120_tg_offsets -ffffffff82c1e708 r dce121_res_create_funcs -ffffffff82c1e738 r res_create_funcs -ffffffff82c1e768 r plane_cap -ffffffff82c1e7a0 r panel_cntl_regs -ffffffff82c1e7c0 r panel_cntl_shift -ffffffff82c1e7d0 r panel_cntl_mask -ffffffff82c1e810 r link_enc_regs -ffffffff82c1ebd0 r link_enc_aux_regs -ffffffff82c1ec20 r link_enc_hpd_regs -ffffffff82c1ec38 r link_enc_feature -ffffffff82c1ec48 r cs_shift -ffffffff82c1ec54 r cs_mask -ffffffff82c1ec80 r mi_regs -ffffffff82c1ef98 r mi_shifts -ffffffff82c1efe0 r mi_masks -ffffffff82c1f100 r ipp_regs -ffffffff82c1f2f8 r ipp_shift -ffffffff82c1f320 r ipp_mask -ffffffff82c1f3c0 r xfm_regs -ffffffff82c1f960 r xfm_shift -ffffffff82c1f9c0 r xfm_mask -ffffffff82c1fb40 r opp_regs -ffffffff82c1fc90 r opp_shift -ffffffff82c1fcbc r opp_mask -ffffffff82c1fd70 r aux_engine_regs -ffffffff82c1fe60 r aux_mask -ffffffff82c1fec0 r aux_shift -ffffffff82c1fee0 r i2c_hw_regs -ffffffff82c20030 r i2c_shifts -ffffffff82c2005c r i2c_masks -ffffffff82c20100 r audio_regs -ffffffff82c20234 r audio_shift -ffffffff82c2024c r audio_mask -ffffffff82c20290 r stream_enc_regs -ffffffff82c20848 r se_shift -ffffffff82c208cc r se_mask -ffffffff82c20ad0 r dce121_hwseq_reg -ffffffff82c20cec r dce121_hwseq_shift -ffffffff82c20d6c r dce121_hwseq_mask -ffffffff82c20f60 r hwseq_reg -ffffffff82c2117c r hwseq_shift -ffffffff82c211fc r hwseq_mask -ffffffff82c22000 r dce120_tg_funcs -ffffffff82c23000 r bios_regs -ffffffff82c23008 r res_cap -ffffffff82c23048 r dce80_res_pool_funcs -ffffffff82c23140 r debug_defaults -ffffffff82c232f0 r clk_src_regs -ffffffff82c233ec r dmcu_regs -ffffffff82c23448 r dmcu_shift -ffffffff82c2345c r dmcu_mask -ffffffff82c234a8 r abm_regs -ffffffff82c23510 r abm_shift -ffffffff82c23534 r abm_mask -ffffffff82c235c0 r dce80_tg_offsets -ffffffff82c23608 r plane_cap -ffffffff82c23638 r res_create_funcs -ffffffff82c23670 r panel_cntl_regs -ffffffff82c23690 r panel_cntl_shift -ffffffff82c236a0 r panel_cntl_mask -ffffffff82c236e0 r link_enc_regs -ffffffff82c23aa0 r link_enc_aux_regs -ffffffff82c23af0 r link_enc_hpd_regs -ffffffff82c23b08 r link_enc_feature -ffffffff82c23b18 r cs_shift -ffffffff82c23b24 r cs_mask -ffffffff82c23b50 r mi_regs -ffffffff82c23e68 r mi_shifts -ffffffff82c23eb0 r mi_masks -ffffffff82c23fd0 r ipp_regs -ffffffff82c241c8 r ipp_shift -ffffffff82c241f0 r ipp_mask -ffffffff82c24290 r xfm_regs -ffffffff82c24830 r xfm_shift -ffffffff82c24890 r xfm_mask -ffffffff82c24a10 r opp_regs -ffffffff82c24b60 r opp_shift -ffffffff82c24b8c r opp_mask -ffffffff82c24c40 r aux_engine_regs -ffffffff82c24d30 r aux_mask -ffffffff82c24d90 r aux_shift -ffffffff82c24db0 r i2c_hw_regs -ffffffff82c24f00 r i2c_shifts -ffffffff82c24f2c r i2c_masks -ffffffff82c24fd0 r audio_regs -ffffffff82c25104 r audio_shift -ffffffff82c2511c r audio_mask -ffffffff82c25160 r stream_enc_regs -ffffffff82c2580c r se_shift -ffffffff82c25890 r se_mask -ffffffff82c25a94 r hwseq_reg -ffffffff82c25cb0 r hwseq_shift -ffffffff82c25d30 r hwseq_mask -ffffffff82c25f24 r res_cap_81 -ffffffff82c25f60 r res_cap_83 -ffffffff82c26000 r reg_offsets -ffffffff82c26048 r dce80_tg_funcs -ffffffff82c27000 r dcn10_dpp_funcs -ffffffff82c28000 r dpp_input_csc_matrix -ffffffff82c2a000 R dcn10_dwbc_funcs -ffffffff82c2b000 r hubbub1_funcs -ffffffff82c2c000 r dcn10_hubp_funcs -ffffffff82c2d000 r reduceSizeAndFraction.prime_numbers -ffffffff82c2f000 r dcn10_funcs -ffffffff82c2f2e8 r dcn10_private_funcs -ffffffff82c30000 r dcn10_ipp_funcs -ffffffff82c30048 r dcn20_ipp_funcs -ffffffff82c31000 r dcn10_lnk_enc_funcs -ffffffff82c32000 r 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opp_shift +ffffffff82c1dcbc r opp_mask +ffffffff82c1dd70 r aux_engine_regs +ffffffff82c1de60 r aux_mask +ffffffff82c1dec0 r aux_shift +ffffffff82c1dee0 r i2c_hw_regs +ffffffff82c1e030 r i2c_shifts +ffffffff82c1e05c r i2c_masks +ffffffff82c1e100 r audio_regs +ffffffff82c1e208 r audio_shift +ffffffff82c1e220 r audio_mask +ffffffff82c1e260 r stream_enc_regs +ffffffff82c1e818 r se_shift +ffffffff82c1e89c r se_mask +ffffffff82c1eaa0 r hwseq_reg +ffffffff82c1ecbc r hwseq_shift +ffffffff82c1ed3c r hwseq_mask +ffffffff82c1f000 r bios_regs +ffffffff82c1f008 r res_cap +ffffffff82c1f048 r dce120_res_pool_funcs +ffffffff82c1f140 r debug_defaults +ffffffff82c1f2f0 r clk_src_regs +ffffffff82c1f4e8 r dmcu_regs +ffffffff82c1f544 r dmcu_shift +ffffffff82c1f558 r dmcu_mask +ffffffff82c1f5a4 r abm_regs +ffffffff82c1f60c r abm_shift +ffffffff82c1f630 r abm_mask +ffffffff82c1f6c0 r dce120_tg_offsets +ffffffff82c1f708 r dce121_res_create_funcs +ffffffff82c1f738 r res_create_funcs +ffffffff82c1f768 r plane_cap +ffffffff82c1f7a0 r panel_cntl_regs +ffffffff82c1f7c0 r panel_cntl_shift +ffffffff82c1f7d0 r panel_cntl_mask +ffffffff82c1f810 r link_enc_regs +ffffffff82c1fbd0 r link_enc_aux_regs +ffffffff82c1fc20 r link_enc_hpd_regs +ffffffff82c1fc38 r link_enc_feature +ffffffff82c1fc48 r cs_shift +ffffffff82c1fc54 r cs_mask +ffffffff82c1fc80 r mi_regs +ffffffff82c1ff98 r mi_shifts +ffffffff82c1ffe0 r mi_masks +ffffffff82c20100 r ipp_regs +ffffffff82c202f8 r ipp_shift +ffffffff82c20320 r ipp_mask +ffffffff82c203c0 r xfm_regs +ffffffff82c20960 r xfm_shift +ffffffff82c209c0 r xfm_mask +ffffffff82c20b40 r opp_regs +ffffffff82c20c90 r opp_shift +ffffffff82c20cbc r opp_mask +ffffffff82c20d70 r aux_engine_regs +ffffffff82c20e60 r aux_mask +ffffffff82c20ec0 r aux_shift +ffffffff82c20ee0 r i2c_hw_regs +ffffffff82c21030 r i2c_shifts +ffffffff82c2105c r i2c_masks +ffffffff82c21100 r audio_regs +ffffffff82c21234 r audio_shift +ffffffff82c2124c r audio_mask +ffffffff82c21290 r stream_enc_regs +ffffffff82c21848 r se_shift +ffffffff82c218cc r se_mask +ffffffff82c21ad0 r dce121_hwseq_reg +ffffffff82c21cec r dce121_hwseq_shift +ffffffff82c21d6c r dce121_hwseq_mask +ffffffff82c21f60 r hwseq_reg +ffffffff82c2217c r hwseq_shift +ffffffff82c221fc r hwseq_mask +ffffffff82c23000 r dce120_tg_funcs +ffffffff82c24000 r bios_regs +ffffffff82c24008 r res_cap +ffffffff82c24048 r dce80_res_pool_funcs +ffffffff82c24140 r debug_defaults +ffffffff82c242f0 r clk_src_regs +ffffffff82c243ec r dmcu_regs +ffffffff82c24448 r dmcu_shift +ffffffff82c2445c r dmcu_mask +ffffffff82c244a8 r abm_regs +ffffffff82c24510 r abm_shift +ffffffff82c24534 r abm_mask +ffffffff82c245c0 r dce80_tg_offsets +ffffffff82c24608 r plane_cap +ffffffff82c24638 r res_create_funcs +ffffffff82c24670 r panel_cntl_regs +ffffffff82c24690 r panel_cntl_shift +ffffffff82c246a0 r panel_cntl_mask +ffffffff82c246e0 r link_enc_regs +ffffffff82c24aa0 r link_enc_aux_regs +ffffffff82c24af0 r link_enc_hpd_regs +ffffffff82c24b08 r link_enc_feature +ffffffff82c24b18 r cs_shift +ffffffff82c24b24 r cs_mask +ffffffff82c24b50 r mi_regs +ffffffff82c24e68 r mi_shifts +ffffffff82c24eb0 r mi_masks +ffffffff82c24fd0 r ipp_regs +ffffffff82c251c8 r ipp_shift +ffffffff82c251f0 r ipp_mask +ffffffff82c25290 r xfm_regs +ffffffff82c25830 r xfm_shift +ffffffff82c25890 r xfm_mask +ffffffff82c25a10 r opp_regs +ffffffff82c25b60 r opp_shift +ffffffff82c25b8c r opp_mask +ffffffff82c25c40 r aux_engine_regs +ffffffff82c25d30 r aux_mask +ffffffff82c25d90 r aux_shift +ffffffff82c25db0 r i2c_hw_regs +ffffffff82c25f00 r i2c_shifts +ffffffff82c25f2c r i2c_masks +ffffffff82c25fd0 r audio_regs +ffffffff82c26104 r audio_shift +ffffffff82c2611c r audio_mask +ffffffff82c26160 r stream_enc_regs +ffffffff82c2680c r se_shift +ffffffff82c26890 r se_mask +ffffffff82c26a94 r hwseq_reg +ffffffff82c26cb0 r hwseq_shift +ffffffff82c26d30 r hwseq_mask +ffffffff82c26f24 r res_cap_81 +ffffffff82c26f60 r res_cap_83 +ffffffff82c27000 r reg_offsets +ffffffff82c27048 r dce80_tg_funcs +ffffffff82c28000 r dcn10_dpp_funcs +ffffffff82c29000 r dpp_input_csc_matrix +ffffffff82c2b000 R dcn10_dwbc_funcs +ffffffff82c2c000 r hubbub1_funcs +ffffffff82c2d000 r dcn10_hubp_funcs +ffffffff82c2e000 r reduceSizeAndFraction.prime_numbers +ffffffff82c30000 r dcn10_funcs +ffffffff82c302e8 r dcn10_private_funcs +ffffffff82c31000 r dcn10_ipp_funcs +ffffffff82c31048 r dcn20_ipp_funcs +ffffffff82c32000 r dcn10_lnk_enc_funcs +ffffffff82c33000 r dcn10_mpc_funcs +ffffffff82c34000 r dcn10_opp_funcs +ffffffff82c35000 r dcn10_tg_funcs +ffffffff82c36000 r bios_regs +ffffffff82c36008 r rv2_res_cap +ffffffff82c36044 r res_cap +ffffffff82c36080 r dcn10_res_pool_funcs +ffffffff82c36178 r debug_defaults_drv +ffffffff82c36320 r debug_defaults_diags +ffffffff82c364d0 r clk_src_regs +ffffffff82c36620 r dmcu_regs +ffffffff82c3667c r dmcu_shift +ffffffff82c36690 r dmcu_mask +ffffffff82c366dc r abm_regs +ffffffff82c36744 r abm_shift +ffffffff82c36768 r abm_mask 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+ffffffff82c3a870 r i2c_shifts +ffffffff82c3a89c r i2c_masks +ffffffff82c3a940 r mpc_regs +ffffffff82c3aa60 r mpc_shift +ffffffff82c3aa78 r mpc_mask +ffffffff82c3aad4 r hubbub_reg +ffffffff82c3ac5c r hubbub_shift +ffffffff82c3acec r hubbub_mask +ffffffff82c3af30 r audio_regs +ffffffff82c3afe0 r audio_shift +ffffffff82c3aff8 r audio_mask +ffffffff82c3b040 r stream_enc_regs +ffffffff82c3b590 r se_shift +ffffffff82c3b66c r se_mask +ffffffff82c3b9d8 r hwseq_reg +ffffffff82c3bbf4 r hwseq_shift +ffffffff82c3bc74 r hwseq_mask +ffffffff82c3c000 r audio_clock_info_table_48bpc +ffffffff82c3c190 r audio_clock_info_table_36bpc +ffffffff82c3c320 r audio_clock_info_table +ffffffff82c3c4e0 r dcn10_str_enc_funcs +ffffffff82c3d000 r dccg2_funcs +ffffffff82c3f000 r dpp_input_csc_matrix +ffffffff82c40000 r dcn20_dsc_funcs +ffffffff82c41000 r dcn20_dwbc_funcs +ffffffff82c42000 r filter_12tap_16p_upscale +ffffffff82c420e0 r filter_12tap_16p_117 +ffffffff82c421c0 r filter_12tap_16p_150 +ffffffff82c422a0 r filter_12tap_16p_183 +ffffffff82c42380 r filter_11tap_16p_upscale +ffffffff82c42450 r filter_11tap_16p_117 +ffffffff82c42520 r filter_11tap_16p_150 +ffffffff82c425f0 r filter_11tap_16p_183 +ffffffff82c426c0 r filter_10tap_16p_upscale +ffffffff82c42780 r filter_10tap_16p_117 +ffffffff82c42840 r filter_10tap_16p_150 +ffffffff82c42900 r filter_10tap_16p_183 +ffffffff82c429c0 r filter_9tap_16p_upscale +ffffffff82c42a70 r filter_9tap_16p_117 +ffffffff82c42b20 r filter_9tap_16p_150 +ffffffff82c42bd0 r filter_9tap_16p_183 +ffffffff82c42c80 r filter_8tap_16p_upscale +ffffffff82c42d10 r filter_8tap_16p_117 +ffffffff82c42da0 r filter_8tap_16p_150 +ffffffff82c42e30 r filter_8tap_16p_183 +ffffffff82c42ec0 r filter_7tap_16p_upscale +ffffffff82c42f40 r filter_7tap_16p_117 +ffffffff82c42fc0 r filter_7tap_16p_150 +ffffffff82c43040 r filter_7tap_16p_183 +ffffffff82c430c0 r filter_6tap_16p_upscale +ffffffff82c43130 r filter_6tap_16p_117 +ffffffff82c431a0 r filter_6tap_16p_150 +ffffffff82c43210 r filter_6tap_16p_183 +ffffffff82c43280 r filter_5tap_16p_upscale +ffffffff82c432e0 r filter_5tap_16p_117 +ffffffff82c43340 r filter_5tap_16p_150 +ffffffff82c433a0 r filter_5tap_16p_183 +ffffffff82c43400 r filter_4tap_16p_upscale +ffffffff82c43450 r filter_4tap_16p_117 +ffffffff82c434a0 r filter_4tap_16p_150 +ffffffff82c434f0 r filter_4tap_16p_183 +ffffffff82c43540 r filter_3tap_16p_upscale +ffffffff82c43580 r filter_3tap_16p_117 +ffffffff82c435c0 r filter_3tap_16p_150 +ffffffff82c43600 r filter_3tap_16p_183 +ffffffff82c44000 r hubbub2_funcs +ffffffff82c45000 r dcn20_funcs +ffffffff82c452e8 r dcn20_private_funcs +ffffffff82c46000 r dcn20_link_enc_funcs +ffffffff82c460e0 r dcn2_mpll_cfg +ffffffff82c47000 r dcn20_mmhubbub_funcs +ffffffff82c48000 r dcn20_mpc_funcs +ffffffff82c49000 r tf_regs +ffffffff82c4a938 r tf_shift +ffffffff82c4abc0 r tf_mask +ffffffff82c4b5e0 r ipp_regs +ffffffff82c4b730 r ipp_shift +ffffffff82c4b74c r ipp_mask +ffffffff82c4b7c0 r opp_regs +ffffffff82c4b9d0 r opp_shift +ffffffff82c4ba08 r opp_mask +ffffffff82c4bae0 r aux_engine_regs +ffffffff82c4bbd0 r aux_mask +ffffffff82c4bc30 r aux_shift +ffffffff82c4bc50 r i2c_hw_regs +ffffffff82c4bda0 r i2c_shifts +ffffffff82c4bdcc r i2c_masks +ffffffff82c4be70 r mpc_regs +ffffffff82c4c3b8 r mpc_shift +ffffffff82c4c400 r mpc_mask +ffffffff82c4c514 r hubbub_reg +ffffffff82c4c69c r hubbub_shift +ffffffff82c4c72c r hubbub_mask +ffffffff82c4c964 r res_cap_nv10 +ffffffff82c4c9a0 r vmid_regs +ffffffff82c4cb60 r vmid_shifts +ffffffff82c4cb68 r vmid_masks +ffffffff82c4cb90 r tg_regs +ffffffff82c4d400 r tg_shift +ffffffff82c4d4d4 r tg_mask +ffffffff82c4d820 r link_enc_regs +ffffffff82c4dfc0 r link_enc_aux_regs +ffffffff82c4e020 r link_enc_hpd_regs +ffffffff82c4e038 r le_shift +ffffffff82c4e128 r le_mask +ffffffff82c4e4e0 r stream_enc_regs +ffffffff82c4ecd8 r se_shift +ffffffff82c4edb4 r se_mask +ffffffff82c4f120 r hwseq_reg +ffffffff82c4f33c r hwseq_shift +ffffffff82c4f3bc r hwseq_mask +ffffffff82c4f5b0 r dsc_regs +ffffffff82c4fa48 r dsc_shift +ffffffff82c4fb00 r dsc_mask +ffffffff82c4fde0 r hubp_regs +ffffffff82c50a28 r hubp_shift +ffffffff82c50b24 r hubp_mask +ffffffff82c50f20 r dwbc20_regs +ffffffff82c50fd8 r dwbc20_shift +ffffffff82c51058 r dwbc20_mask +ffffffff82c51250 r mcif_wb20_regs +ffffffff82c51330 r mcif_wb20_shift +ffffffff82c513d0 r mcif_wb20_mask +ffffffff82c51650 r link_enc_feature +ffffffff82c51660 r bios_regs +ffffffff82c51668 r dcn20_res_pool_funcs +ffffffff82c51760 r res_cap_nv14 +ffffffff82c517a0 r debug_defaults_drv +ffffffff82c51950 r clk_src_regs +ffffffff82c51b48 r dccg_regs +ffffffff82c51c38 r dccg_shift +ffffffff82c51cd8 r dccg_mask +ffffffff82c51f4c r dmcu_regs +ffffffff82c51fa8 r dmcu_shift +ffffffff82c51fbc r dmcu_mask +ffffffff82c52008 r abm_regs +ffffffff82c52070 r abm_shift +ffffffff82c52094 r abm_mask +ffffffff82c52120 r res_create_funcs +ffffffff82c52150 r plane_cap +ffffffff82c52180 r panel_cntl_regs +ffffffff82c521a0 r panel_cntl_shift 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cs_mask +ffffffff82c59eb0 r hubp_regs +ffffffff82c5a640 r hubp_shift +ffffffff82c5a718 r hubp_mask +ffffffff82c5aa80 r ipp_regs +ffffffff82c5ab60 r ipp_shift +ffffffff82c5ab7c r ipp_mask +ffffffff82c5abf0 r tf_regs +ffffffff82c5bc40 r tf_shift +ffffffff82c5bec8 r tf_mask +ffffffff82c5c8e0 r opp_regs +ffffffff82c5c990 r opp_shift +ffffffff82c5c9c8 r opp_mask +ffffffff82c5caa0 r aux_engine_regs +ffffffff82c5caf0 r aux_mask +ffffffff82c5cb50 r aux_shift +ffffffff82c5cb70 r i2c_hw_regs +ffffffff82c5cbe0 r i2c_shifts +ffffffff82c5cc0c r i2c_masks +ffffffff82c5ccb0 r tg_regs +ffffffff82c5cf80 r tg_shift +ffffffff82c5d054 r tg_mask +ffffffff82c5d39c r mpc_regs +ffffffff82c5d8e4 r mpc_shift +ffffffff82c5d930 r mpc_mask +ffffffff82c5da58 r hubbub_reg +ffffffff82c5dbe0 r hubbub_shift +ffffffff82c5dc70 r hubbub_mask +ffffffff82c5deb0 r audio_regs +ffffffff82c5df08 r audio_shift +ffffffff82c5df20 r audio_mask +ffffffff82c5df60 r stream_enc_regs +ffffffff82c5e208 r se_shift +ffffffff82c5e2e4 r se_mask +ffffffff82c5e650 r hwseq_reg +ffffffff82c5e86c r hwseq_shift +ffffffff82c5e8ec r hwseq_mask +ffffffff82c5f000 r dccg21_funcs +ffffffff82c60000 r hubbub21_funcs +ffffffff82c61000 r dcn21_funcs +ffffffff82c612e8 r dcn21_private_funcs +ffffffff82c62000 r dcn21_link_enc_funcs +ffffffff82c620e0 r dcn21_mpll_cfg_ref +ffffffff82c63000 r bios_regs +ffffffff82c63008 r res_cap_rn +ffffffff82c63048 r dcn21_res_pool_funcs +ffffffff82c63140 r debug_defaults_drv +ffffffff82c632f0 r clk_src_regs +ffffffff82c63494 r dccg_regs +ffffffff82c63584 r dccg_shift +ffffffff82c63624 r dccg_mask +ffffffff82c63898 r dmcu_regs +ffffffff82c638f4 r dmcu_shift +ffffffff82c63908 r dmcu_mask +ffffffff82c63954 r abm_regs +ffffffff82c639bc r abm_shift +ffffffff82c639e0 r abm_mask +ffffffff82c63a70 r res_create_funcs +ffffffff82c63aa0 r plane_cap +ffffffff82c63ad0 r panel_cntl_regs +ffffffff82c63af0 r panel_cntl_shift +ffffffff82c63b00 r panel_cntl_mask +ffffffff82c63b40 r link_enc_regs +ffffffff82c641a0 r link_enc_aux_regs +ffffffff82c641f0 r link_enc_hpd_regs +ffffffff82c64204 r le_shift +ffffffff82c642f4 r le_mask +ffffffff82c646ac r link_enc_feature +ffffffff82c646bc r panel_config_defaults +ffffffff82c64710 r cs_shift +ffffffff82c6471c r cs_mask +ffffffff82c64750 r hubp_regs +ffffffff82c64f80 r hubp_shift +ffffffff82c6507c r hubp_mask +ffffffff82c65470 r ipp_regs +ffffffff82c65550 r ipp_shift +ffffffff82c6556c r ipp_mask +ffffffff82c655e0 r tf_regs +ffffffff82c666b0 r tf_shift +ffffffff82c66938 r tf_mask +ffffffff82c67350 r opp_regs +ffffffff82c67560 r opp_shift +ffffffff82c67598 r opp_mask +ffffffff82c67670 r tg_regs +ffffffff82c67c10 r tg_shift +ffffffff82c67ce4 r tg_mask +ffffffff82c68030 r aux_engine_regs +ffffffff82c680f8 r aux_mask +ffffffff82c68158 r aux_shift +ffffffff82c68170 r i2c_hw_regs +ffffffff82c68288 r i2c_shifts +ffffffff82c682b4 r i2c_masks +ffffffff82c68358 r mpc_regs +ffffffff82c688a0 r mpc_shift +ffffffff82c688e8 r mpc_mask +ffffffff82c689fc r hubbub_reg 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r dwbc30_regs +ffffffff82c8cb4c r dwbc30_shift +ffffffff82c8cc80 r dwbc30_mask +ffffffff82c8d150 r mcif_wb30_regs +ffffffff82c8d24c r mcif_wb30_shift +ffffffff82c8d2f8 r mcif_wb30_mask +ffffffff82c8d5b0 r aux_engine_regs +ffffffff82c8d650 r aux_mask +ffffffff82c8d6b0 r aux_shift +ffffffff82c8d6d0 r i2c_hw_regs +ffffffff82c8d7b0 r i2c_shifts +ffffffff82c8d7dc r i2c_masks +ffffffff82c8d880 r audio_regs +ffffffff82c8d9b4 r audio_shift +ffffffff82c8d9cc r audio_mask +ffffffff82c8da10 r stream_enc_regs +ffffffff82c8df60 r se_shift +ffffffff82c8e03c r se_mask +ffffffff82c8e3b0 r vpg_regs +ffffffff82c8e400 r vpg_shift +ffffffff82c8e428 r vpg_mask +ffffffff82c8e4c0 r afmt_regs +ffffffff82c8e550 r afmt_shift +ffffffff82c8e564 r afmt_mask +ffffffff82c8e5a8 r hwseq_reg +ffffffff82c8e7c4 r hwseq_shift +ffffffff82c8e844 r hwseq_mask +ffffffff82c8f000 r bios_regs +ffffffff82c8f008 r res_cap_dcn302 +ffffffff82c8f048 r debug_defaults_drv +ffffffff82c8f1f0 r clk_src_regs +ffffffff82c8f394 r dccg_regs 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hubbub_mask +ffffffff82c9b4f0 r vmid_regs +ffffffff82c9b6b0 r vmid_shifts +ffffffff82c9b6b8 r vmid_masks +ffffffff82c9b6e0 r hubp_regs +ffffffff82c9baf8 r hubp_shift +ffffffff82c9bbf4 r hubp_mask +ffffffff82c9bff0 r dpp_regs +ffffffff82c9ca78 r tf_shift +ffffffff82c9cd4c r tf_mask +ffffffff82c9d890 r opp_regs +ffffffff82c9d940 r opp_shift +ffffffff82c9d978 r opp_mask +ffffffff82c9da50 r optc_regs +ffffffff82c9dd20 r optc_shift +ffffffff82c9ddf4 r optc_mask +ffffffff82c9e13c r mpc_regs +ffffffff82c9f928 r mpc_shift +ffffffff82c9fa04 r mpc_mask +ffffffff82c9fd70 r dsc_regs +ffffffff82c9fef8 r dsc_shift +ffffffff82c9ffb0 r dsc_mask +ffffffff82ca0290 r dwbc30_regs +ffffffff82ca046c r dwbc30_shift +ffffffff82ca05a0 r dwbc30_mask +ffffffff82ca0a70 r mcif_wb30_regs +ffffffff82ca0b6c r mcif_wb30_shift +ffffffff82ca0c18 r mcif_wb30_mask +ffffffff82ca0ed0 r aux_engine_regs +ffffffff82ca0f20 r aux_mask +ffffffff82ca0f80 r aux_shift +ffffffff82ca0fa0 r i2c_hw_regs +ffffffff82ca1010 r i2c_shifts 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r abm_regs +ffffffff82ca8950 r abm_shift +ffffffff82ca8974 r abm_mask +ffffffff82ca8a00 r res_create_funcs +ffffffff82ca8a30 r plane_cap +ffffffff82ca8a60 r link_enc_regs +ffffffff82ca90c0 r link_enc_aux_regs +ffffffff82ca9110 r link_enc_hpd_regs +ffffffff82ca9124 r le_shift +ffffffff82ca9214 r le_mask +ffffffff82ca95cc r link_enc_feature +ffffffff82ca95dc r panel_config_defaults +ffffffff82ca9630 r debug_defaults_drv +ffffffff82ca97d8 r cs_shift +ffffffff82ca97e4 r cs_mask +ffffffff82ca980c r hubbub_reg +ffffffff82ca9994 r hubbub_shift +ffffffff82ca9a24 r hubbub_mask +ffffffff82ca9c60 r vmid_regs +ffffffff82ca9e20 r vmid_shifts +ffffffff82ca9e28 r vmid_masks +ffffffff82ca9e50 r hubp_regs +ffffffff82caa680 r hubp_shift +ffffffff82caa77c r hubp_mask +ffffffff82caab70 r dpp_regs +ffffffff82cac080 r tf_shift +ffffffff82cac354 r tf_mask +ffffffff82cacea0 r opp_regs +ffffffff82cad000 r opp_shift +ffffffff82cad038 r opp_mask +ffffffff82cad110 r optc_regs +ffffffff82cad6b0 r optc_shift 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hpo_dp_stream_enc_regs +ffffffff82cb2df0 r hpo_dp_se_shift +ffffffff82cb2e18 r hpo_dp_se_mask +ffffffff82cb2ec0 r apg_regs +ffffffff82cb2f00 r apg_shift +ffffffff82cb2f08 r apg_mask +ffffffff82cb2f20 r hpo_dp_link_enc_regs +ffffffff82cb3030 r hpo_dp_le_shift +ffffffff82cb304c r hpo_dp_le_mask +ffffffff82cb30b0 r hwseq_reg +ffffffff82cb32cc r hwseq_shift +ffffffff82cb334c r hwseq_mask +ffffffff82cb4000 r dccg314_funcs +ffffffff82cb5000 r dcn314_str_enc_funcs +ffffffff82cb6000 r dcn314_funcs +ffffffff82cb62e8 r dcn314_private_funcs +ffffffff82cb7000 r bios_regs +ffffffff82cb7008 r res_cap_dcn314 +ffffffff82cb7048 r debug_defaults_diags +ffffffff82cb71f0 r clk_src_regs +ffffffff82cb7394 r dccg_regs +ffffffff82cb7484 r dccg_shift +ffffffff82cb7524 r dccg_mask +ffffffff82cb77a0 r abm_regs +ffffffff82cb7940 r abm_shift +ffffffff82cb7964 r abm_mask +ffffffff82cb79f0 r res_create_funcs +ffffffff82cb7a20 r plane_cap +ffffffff82cb7a50 r link_enc_regs +ffffffff82cb80b0 r link_enc_aux_regs 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vmid_shifts +ffffffff82cc3c78 r vmid_masks +ffffffff82cc3ca0 r hubp_regs +ffffffff82cc44d0 r hubp_shift +ffffffff82cc45cc r hubp_mask +ffffffff82cc49c0 r dpp_regs +ffffffff82cc5ed0 r tf_shift +ffffffff82cc61a4 r tf_mask +ffffffff82cc6cf0 r opp_regs +ffffffff82cc6e50 r opp_shift +ffffffff82cc6e88 r opp_mask +ffffffff82cc6f60 r optc_regs +ffffffff82cc7500 r optc_shift +ffffffff82cc75d4 r optc_mask +ffffffff82cc791c r mpc_regs +ffffffff82cc9108 r mpc_shift +ffffffff82cc91e4 r mpc_mask +ffffffff82cc9550 r dsc_regs +ffffffff82cc979c r dsc_shift +ffffffff82cc9854 r dsc_mask +ffffffff82cc9b30 r dwbc30_regs +ffffffff82cc9d0c r dwbc30_shift +ffffffff82cc9e40 r dwbc30_mask +ffffffff82cca310 r mcif_wb30_regs +ffffffff82cca40c r mcif_wb30_shift +ffffffff82cca4b8 r mcif_wb30_mask +ffffffff82cca770 r aux_engine_regs +ffffffff82cca838 r aux_mask +ffffffff82cca898 r aux_shift +ffffffff82cca8b0 r i2c_hw_regs +ffffffff82cca9c8 r i2c_shifts +ffffffff82cca9f4 r i2c_masks +ffffffff82ccaaa0 r audio_regs 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r mpc_regs +ffffffff82cd4108 r mpc_shift +ffffffff82cd41e4 r mpc_mask +ffffffff82cd4550 r dsc_regs +ffffffff82cd479c r dsc_shift +ffffffff82cd4854 r dsc_mask +ffffffff82cd4b30 r dwbc30_regs +ffffffff82cd4d0c r dwbc30_shift +ffffffff82cd4e40 r dwbc30_mask +ffffffff82cd5310 r mcif_wb30_regs +ffffffff82cd540c r mcif_wb30_shift +ffffffff82cd54b8 r mcif_wb30_mask +ffffffff82cd5770 r aux_engine_regs +ffffffff82cd5838 r aux_mask +ffffffff82cd5898 r aux_shift +ffffffff82cd58b0 r i2c_hw_regs +ffffffff82cd59c8 r i2c_shifts +ffffffff82cd59f4 r i2c_masks +ffffffff82cd5aa0 r audio_regs +ffffffff82cd5bd4 r audio_shift +ffffffff82cd5bec r audio_mask +ffffffff82cd5c30 r stream_enc_regs +ffffffff82cd62d4 r se_shift +ffffffff82cd63b0 r se_mask +ffffffff82cd6720 r vpg_regs +ffffffff82cd6810 r vpg_shift +ffffffff82cd6838 r vpg_mask +ffffffff82cd68e0 r afmt_regs +ffffffff82cd69b8 r afmt_shift +ffffffff82cd69cc r afmt_mask +ffffffff82cd6a20 r hpo_dp_stream_enc_regs +ffffffff82cd6c50 r hpo_dp_se_shift +ffffffff82cd6c78 r hpo_dp_se_mask +ffffffff82cd6d20 r apg_regs +ffffffff82cd6d60 r apg_shift +ffffffff82cd6d68 r apg_mask +ffffffff82cd6d80 r hpo_dp_link_enc_regs +ffffffff82cd6e90 r hpo_dp_le_shift +ffffffff82cd6eac r hpo_dp_le_mask +ffffffff82cd6f10 r hwseq_reg +ffffffff82cd712c r hwseq_shift +ffffffff82cd71ac r hwseq_mask +ffffffff82cd8000 r dccg32_funcs +ffffffff82cd9000 r dcn32_link_enc_funcs +ffffffff82cda000 r dcn32_str_enc_funcs +ffffffff82cdb000 r hubbub32_funcs +ffffffff82cdc000 r dcn32_funcs +ffffffff82cdc2e8 r dcn32_private_funcs +ffffffff82cdd000 r dcn32_mmhubbub_funcs +ffffffff82cde000 r dcn32_mpc_funcs +ffffffff82cdf000 r res_cap_dcn32 +ffffffff82cdf03c r dccg_shift +ffffffff82cdf0dc r dccg_mask +ffffffff82cdf350 r abm_shift +ffffffff82cdf374 r abm_mask +ffffffff82cdf400 r res_create_funcs +ffffffff82cdf430 r plane_cap +ffffffff82cdf45c r le_shift +ffffffff82cdf54c r le_mask +ffffffff82cdf904 r link_enc_feature +ffffffff82cdf918 r debug_defaults_drv +ffffffff82cdfac0 r cs_shift +ffffffff82cdfacc r cs_mask +ffffffff82cdfaf4 r hubbub_shift +ffffffff82cdfb84 r hubbub_mask +ffffffff82cdfdbc r vmid_shifts +ffffffff82cdfdc4 r vmid_masks +ffffffff82cdfde4 r hubp_shift +ffffffff82cdfee0 r hubp_mask +ffffffff82ce02d0 r tf_shift +ffffffff82ce05a4 r tf_mask +ffffffff82ce10e8 r opp_shift +ffffffff82ce1120 r opp_mask +ffffffff82ce11f4 r optc_shift +ffffffff82ce12c8 r optc_mask +ffffffff82ce1610 r mpc_shift +ffffffff82ce16ec r mpc_mask +ffffffff82ce1a58 r dsc_shift +ffffffff82ce1b10 r dsc_mask +ffffffff82ce1de8 r dwbc30_shift +ffffffff82ce1f1c r dwbc30_mask +ffffffff82ce23e4 r mcif_wb30_shift +ffffffff82ce2490 r mcif_wb30_mask +ffffffff82ce273c r aux_mask +ffffffff82ce279c r aux_shift +ffffffff82ce27b4 r i2c_shifts +ffffffff82ce27e0 r i2c_masks +ffffffff82ce2884 r audio_shift +ffffffff82ce289c r audio_mask +ffffffff82ce28d8 r se_shift +ffffffff82ce29b4 r se_mask +ffffffff82ce2d20 r vpg_shift +ffffffff82ce2d48 r vpg_mask +ffffffff82ce2ddc r afmt_shift +ffffffff82ce2df0 r afmt_mask +ffffffff82ce2e34 r hpo_dp_se_shift +ffffffff82ce2e5c r hpo_dp_se_mask +ffffffff82ce2efc r apg_shift +ffffffff82ce2f04 r apg_mask +ffffffff82ce2f1c r hpo_dp_le_shift +ffffffff82ce2f38 r hpo_dp_le_mask +ffffffff82ce2f9c r hwseq_shift +ffffffff82ce301c r hwseq_mask +ffffffff82ce4000 r dcn321_link_enc_funcs +ffffffff82ce5000 r res_cap_dcn321 +ffffffff82ce503c r dccg_shift +ffffffff82ce50dc r dccg_mask +ffffffff82ce5350 r abm_shift +ffffffff82ce5374 r abm_mask +ffffffff82ce5400 r res_create_funcs +ffffffff82ce5430 r plane_cap +ffffffff82ce545c r le_shift +ffffffff82ce554c r le_mask +ffffffff82ce5904 r link_enc_feature +ffffffff82ce5918 r debug_defaults_drv +ffffffff82ce5ac0 r cs_shift +ffffffff82ce5acc r cs_mask +ffffffff82ce5af4 r hubbub_shift +ffffffff82ce5b84 r hubbub_mask +ffffffff82ce5dbc r vmid_shifts +ffffffff82ce5dc4 r vmid_masks +ffffffff82ce5de4 r hubp_shift +ffffffff82ce5ee0 r hubp_mask +ffffffff82ce62d0 r tf_shift +ffffffff82ce65a4 r tf_mask +ffffffff82ce70e8 r opp_shift +ffffffff82ce7120 r opp_mask +ffffffff82ce71f4 r optc_shift +ffffffff82ce72c8 r optc_mask +ffffffff82ce7610 r mpc_shift +ffffffff82ce76ec r mpc_mask +ffffffff82ce7a58 r dsc_shift +ffffffff82ce7b10 r dsc_mask +ffffffff82ce7de8 r dwbc30_shift +ffffffff82ce7f1c r dwbc30_mask +ffffffff82ce83e4 r mcif_wb30_shift +ffffffff82ce8490 r mcif_wb30_mask +ffffffff82ce873c r aux_mask +ffffffff82ce879c r aux_shift +ffffffff82ce87b4 r i2c_shifts +ffffffff82ce87e0 r i2c_masks +ffffffff82ce8884 r audio_shift +ffffffff82ce889c r audio_mask +ffffffff82ce88d8 r se_shift +ffffffff82ce89b4 r se_mask +ffffffff82ce8d20 r vpg_shift +ffffffff82ce8d48 r vpg_mask +ffffffff82ce8ddc r afmt_shift +ffffffff82ce8df0 r afmt_mask +ffffffff82ce8e34 r hpo_dp_se_shift +ffffffff82ce8e5c r hpo_dp_se_mask +ffffffff82ce8efc r apg_shift +ffffffff82ce8f04 r apg_mask +ffffffff82ce8f1c r hpo_dp_le_shift +ffffffff82ce8f38 r hpo_dp_le_mask +ffffffff82ce8f9c r hwseq_shift +ffffffff82ce901c r hwseq_mask +ffffffff82ceb000 R dcn10_soc_defaults +ffffffff82ceb08c R dcn10_ip_defaults +ffffffff82cf7000 r dml20_funcs +ffffffff82cf7030 r dml20v2_funcs +ffffffff82cf7060 r dml21_funcs +ffffffff82cf7090 r dml30_funcs +ffffffff82cf70c0 r dml31_funcs +ffffffff82cf70f0 r dml314_funcs +ffffffff82cf7120 r dml32_funcs +ffffffff82cfa000 r qp_table_444_8bpc_max +ffffffff82cfa940 r qp_table_444_8bpc_min +ffffffff82cfb280 r qp_table_444_10bpc_max +ffffffff82cfbec0 r qp_table_444_10bpc_min +ffffffff82cfcb00 r qp_table_444_12bpc_max +ffffffff82cfda40 r qp_table_444_12bpc_min +ffffffff82cfe980 r qp_table_422_8bpc_max +ffffffff82cfeec0 r qp_table_422_8bpc_min +ffffffff82cff400 r qp_table_422_10bpc_max +ffffffff82cffb40 r qp_table_422_10bpc_min +ffffffff82d00280 r qp_table_422_12bpc_max +ffffffff82d00bc0 r qp_table_422_12bpc_min +ffffffff82d01500 r qp_table_420_8bpc_max +ffffffff82d01940 r qp_table_420_8bpc_min +ffffffff82d01d80 r qp_table_420_10bpc_max +ffffffff82d02340 r qp_table_420_10bpc_min +ffffffff82d02900 r qp_table_420_12bpc_max +ffffffff82d03040 r qp_table_420_12bpc_min ffffffff82d05000 r funcs +ffffffff82d05050 r hpd_regs +ffffffff82d051a0 r hpd_shift +ffffffff82d051b0 r hpd_mask +ffffffff82d051c0 r ddc_data_regs +ffffffff82d053a0 r ddc_clk_regs +ffffffff82d05580 r ddc_shift +ffffffff82d055a8 r ddc_mask ffffffff82d06000 r funcs -ffffffff82d06050 r hpd_regs -ffffffff82d061a0 r hpd_shift -ffffffff82d061b0 r hpd_mask -ffffffff82d061c0 r ddc_data_regs -ffffffff82d063a0 r ddc_clk_regs -ffffffff82d06580 r ddc_shift -ffffffff82d065a8 r ddc_mask ffffffff82d07000 r funcs +ffffffff82d07050 r hpd_regs +ffffffff82d071a0 r hpd_shift +ffffffff82d071b0 r hpd_mask +ffffffff82d071c0 r ddc_data_regs +ffffffff82d073a0 r ddc_clk_regs +ffffffff82d07580 r ddc_shift +ffffffff82d075a8 r ddc_mask ffffffff82d08000 r funcs -ffffffff82d08050 r hpd_regs -ffffffff82d081a0 r hpd_shift -ffffffff82d081b0 r hpd_mask -ffffffff82d081c0 r ddc_data_regs -ffffffff82d083a0 r ddc_clk_regs -ffffffff82d08580 r ddc_shift -ffffffff82d085a8 r ddc_mask ffffffff82d09000 r funcs +ffffffff82d09050 r hpd_regs +ffffffff82d091a0 r hpd_shift +ffffffff82d091b0 r hpd_mask +ffffffff82d091c0 r ddc_data_regs +ffffffff82d093a0 r ddc_clk_regs +ffffffff82d09580 r ddc_shift +ffffffff82d095a8 r ddc_mask ffffffff82d0a000 r funcs -ffffffff82d0a050 r hpd_regs -ffffffff82d0a1a0 r hpd_shift -ffffffff82d0a1b0 r hpd_mask -ffffffff82d0a1c0 r ddc_data_regs -ffffffff82d0a3a0 r ddc_clk_regs -ffffffff82d0a580 r ddc_shift -ffffffff82d0a5a8 r ddc_mask -ffffffff82d0a5d0 r generic_regs -ffffffff82d0a640 r generic_shift -ffffffff82d0a650 r generic_mask ffffffff82d0b000 r funcs +ffffffff82d0b050 r hpd_regs +ffffffff82d0b1a0 r hpd_shift +ffffffff82d0b1b0 r hpd_mask +ffffffff82d0b1c0 r ddc_data_regs +ffffffff82d0b3a0 r ddc_clk_regs +ffffffff82d0b580 r ddc_shift +ffffffff82d0b5a8 r ddc_mask +ffffffff82d0b5d0 r generic_regs +ffffffff82d0b640 r generic_shift +ffffffff82d0b650 r generic_mask ffffffff82d0c000 r funcs -ffffffff82d0c050 r hpd_regs -ffffffff82d0c1a0 r hpd_shift -ffffffff82d0c1b0 r hpd_mask -ffffffff82d0c1c0 r ddc_data_regs_dcn -ffffffff82d0c370 r ddc_clk_regs_dcn -ffffffff82d0c520 r ddc_shift -ffffffff82d0c640 r ddc_mask -ffffffff82d0c760 r generic_regs -ffffffff82d0c7d0 r generic_shift -ffffffff82d0c7e0 r generic_mask ffffffff82d0d000 r funcs +ffffffff82d0d050 r hpd_regs +ffffffff82d0d1a0 r hpd_shift +ffffffff82d0d1b0 r hpd_mask +ffffffff82d0d1c0 r ddc_data_regs_dcn +ffffffff82d0d370 r ddc_clk_regs_dcn +ffffffff82d0d520 r ddc_shift +ffffffff82d0d640 r ddc_mask +ffffffff82d0d760 r generic_regs +ffffffff82d0d7d0 r generic_shift +ffffffff82d0d7e0 r generic_mask ffffffff82d0e000 r funcs -ffffffff82d0e050 r hpd_regs -ffffffff82d0e168 r hpd_shift -ffffffff82d0e178 r hpd_mask -ffffffff82d0e190 r ddc_data_regs_dcn -ffffffff82d0e2c0 r ddc_clk_regs_dcn -ffffffff82d0e3f0 r ddc_shift -ffffffff82d0e4e0 r ddc_mask -ffffffff82d0e5d0 r generic_regs -ffffffff82d0e604 r generic_shift -ffffffff82d0e60c r generic_mask ffffffff82d0f000 r funcs +ffffffff82d0f050 r hpd_regs +ffffffff82d0f168 r hpd_shift +ffffffff82d0f178 r hpd_mask +ffffffff82d0f190 r ddc_data_regs_dcn +ffffffff82d0f2c0 r ddc_clk_regs_dcn +ffffffff82d0f3f0 r ddc_shift +ffffffff82d0f4e0 r ddc_mask +ffffffff82d0f5d0 r generic_regs +ffffffff82d0f604 r generic_shift +ffffffff82d0f60c r generic_mask ffffffff82d10000 r funcs -ffffffff82d10050 r hpd_regs -ffffffff82d101a0 r hpd_shift -ffffffff82d101b0 r hpd_mask -ffffffff82d101c0 r ddc_data_regs_dcn -ffffffff82d10370 r ddc_clk_regs_dcn -ffffffff82d10520 r ddc_shift -ffffffff82d10640 r ddc_mask -ffffffff82d10760 r generic_regs -ffffffff82d107d0 r generic_shift -ffffffff82d107e0 r generic_mask ffffffff82d11000 r funcs +ffffffff82d11050 r hpd_regs +ffffffff82d111a0 r hpd_shift +ffffffff82d111b0 r hpd_mask +ffffffff82d111c0 r ddc_data_regs_dcn +ffffffff82d11370 r ddc_clk_regs_dcn +ffffffff82d11520 r ddc_shift +ffffffff82d11640 r ddc_mask +ffffffff82d11760 r generic_regs +ffffffff82d117d0 r generic_shift +ffffffff82d117e0 r generic_mask ffffffff82d12000 r funcs -ffffffff82d12050 r hpd_regs -ffffffff82d12168 r hpd_shift -ffffffff82d12178 r hpd_mask -ffffffff82d12190 r ddc_data_regs_dcn -ffffffff82d12300 r ddc_clk_regs_dcn -ffffffff82d12470 r ddc_shift -ffffffff82d12560 r ddc_mask -ffffffff82d12650 r generic_regs -ffffffff82d126c0 r generic_shift -ffffffff82d126d0 r generic_mask ffffffff82d13000 r funcs +ffffffff82d13050 r hpd_regs +ffffffff82d13168 r hpd_shift +ffffffff82d13178 r hpd_mask +ffffffff82d13190 r ddc_data_regs_dcn +ffffffff82d13300 r ddc_clk_regs_dcn +ffffffff82d13470 r ddc_shift +ffffffff82d13560 r ddc_mask +ffffffff82d13650 r generic_regs +ffffffff82d136c0 r generic_shift +ffffffff82d136d0 r generic_mask ffffffff82d14000 r funcs -ffffffff82d14050 r hpd_regs -ffffffff82d14168 r hpd_shift -ffffffff82d14178 r hpd_mask -ffffffff82d14190 r ddc_data_regs_dcn -ffffffff82d14340 r ddc_clk_regs_dcn -ffffffff82d144f0 r ddc_shift -ffffffff82d14610 r ddc_mask -ffffffff82d14730 r generic_regs -ffffffff82d147a0 r generic_shift -ffffffff82d147b0 r generic_mask ffffffff82d15000 r funcs +ffffffff82d15050 r hpd_regs +ffffffff82d15168 r hpd_shift +ffffffff82d15178 r hpd_mask +ffffffff82d15190 r ddc_data_regs_dcn +ffffffff82d15340 r ddc_clk_regs_dcn +ffffffff82d154f0 r ddc_shift +ffffffff82d15610 r ddc_mask +ffffffff82d15730 r generic_regs +ffffffff82d157a0 r generic_shift +ffffffff82d157b0 r generic_mask ffffffff82d16000 r funcs ffffffff82d17000 r funcs ffffffff82d18000 r funcs -ffffffff82d19000 r hdmi_14_protection -ffffffff82d19010 r dp_11_protection -ffffffff82d19020 r hdcp_i2c_offsets -ffffffff82d19050 r hdcp_dpcd_addrs -ffffffff82d1a000 r irq_service_funcs_dce110 -ffffffff82d1a008 r dummy_irq_info_funcs -ffffffff82d1a018 r hpd_irq_info_funcs -ffffffff82d1a028 r hpd_rx_irq_info_funcs -ffffffff82d1a038 r pflip_irq_info_funcs -ffffffff82d1a048 r vupdate_irq_info_funcs -ffffffff82d1a058 r vblank_irq_info_funcs -ffffffff82d1a070 r irq_source_info_dce110 -ffffffff82d1c000 r irq_service_funcs_dce120 -ffffffff82d1c008 r dummy_irq_info_funcs -ffffffff82d1c018 r hpd_irq_info_funcs -ffffffff82d1c028 r hpd_rx_irq_info_funcs -ffffffff82d1c038 r pflip_irq_info_funcs -ffffffff82d1c048 r vupdate_irq_info_funcs -ffffffff82d1c058 r vblank_irq_info_funcs -ffffffff82d1c070 r irq_source_info_dce120 -ffffffff82d1e000 r irq_service_funcs_dce80 -ffffffff82d1e008 r dummy_irq_info_funcs -ffffffff82d1e018 r hpd_irq_info_funcs -ffffffff82d1e028 r hpd_rx_irq_info_funcs -ffffffff82d1e038 r pflip_irq_info_funcs -ffffffff82d1e048 r vupdate_irq_info_funcs -ffffffff82d1e058 r vblank_irq_info_funcs -ffffffff82d1e070 r irq_source_info_dce80 -ffffffff82d20000 r irq_service_funcs_dcn10 -ffffffff82d20008 r dummy_irq_info_funcs -ffffffff82d20018 r hpd_irq_info_funcs -ffffffff82d20028 r hpd_rx_irq_info_funcs -ffffffff82d20038 r pflip_irq_info_funcs -ffffffff82d20048 r vupdate_no_lock_irq_info_funcs -ffffffff82d20058 r vblank_irq_info_funcs -ffffffff82d20068 r vline0_irq_info_funcs -ffffffff82d20080 r irq_source_info_dcn10 -ffffffff82d22000 r irq_service_funcs_dcn20 -ffffffff82d22008 r dummy_irq_info_funcs -ffffffff82d22018 r hpd_irq_info_funcs -ffffffff82d22028 r hpd_rx_irq_info_funcs -ffffffff82d22038 r pflip_irq_info_funcs -ffffffff82d22048 r vupdate_no_lock_irq_info_funcs -ffffffff82d22058 r vblank_irq_info_funcs -ffffffff82d22068 r vline0_irq_info_funcs -ffffffff82d22080 r irq_source_info_dcn20 -ffffffff82d24000 r irq_service_funcs_dcn201 -ffffffff82d24008 r dummy_irq_info_funcs -ffffffff82d24018 r hpd_irq_info_funcs -ffffffff82d24028 r hpd_rx_irq_info_funcs -ffffffff82d24038 r pflip_irq_info_funcs -ffffffff82d24048 r vupdate_no_lock_irq_info_funcs -ffffffff82d24058 r vblank_irq_info_funcs -ffffffff82d24068 r vline0_irq_info_funcs -ffffffff82d24080 r irq_source_info_dcn201 -ffffffff82d26000 r irq_source_info_dcn21 -ffffffff82d27290 r irq_service_funcs_dcn21 -ffffffff82d27298 r dummy_irq_info_funcs -ffffffff82d272a8 r hpd_irq_info_funcs -ffffffff82d272b8 r hpd_rx_irq_info_funcs -ffffffff82d272c8 r pflip_irq_info_funcs -ffffffff82d272d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d272e8 r vblank_irq_info_funcs -ffffffff82d272f8 r vline0_irq_info_funcs -ffffffff82d27308 r dmub_outbox_irq_info_funcs -ffffffff82d28000 r irq_source_info_dcn30 -ffffffff82d29290 r irq_service_funcs_dcn30 -ffffffff82d29298 r dummy_irq_info_funcs -ffffffff82d292a8 r hpd_irq_info_funcs -ffffffff82d292b8 r hpd_rx_irq_info_funcs -ffffffff82d292c8 r pflip_irq_info_funcs -ffffffff82d292d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d292e8 r vblank_irq_info_funcs -ffffffff82d292f8 r vline0_irq_info_funcs -ffffffff82d29308 r dmub_trace_irq_info_funcs -ffffffff82d2a000 r irq_source_info_dcn302 -ffffffff82d2b290 r irq_service_funcs_dcn302 -ffffffff82d2b298 r dummy_irq_info_funcs -ffffffff82d2b2a8 r hpd_irq_info_funcs -ffffffff82d2b2b8 r hpd_rx_irq_info_funcs -ffffffff82d2b2c8 r pflip_irq_info_funcs -ffffffff82d2b2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d2b2e8 r vblank_irq_info_funcs -ffffffff82d2b2f8 r vline0_irq_info_funcs -ffffffff82d2b308 r dmub_trace_irq_info_funcs -ffffffff82d2c000 r irq_service_funcs_dcn303 -ffffffff82d2c008 r dummy_irq_info_funcs -ffffffff82d2c018 r hpd_irq_info_funcs -ffffffff82d2c028 r hpd_rx_irq_info_funcs -ffffffff82d2c038 r pflip_irq_info_funcs -ffffffff82d2c048 r vupdate_no_lock_irq_info_funcs -ffffffff82d2c058 r vblank_irq_info_funcs -ffffffff82d2c068 r vline0_irq_info_funcs -ffffffff82d2c080 r irq_source_info_dcn303 -ffffffff82d2e000 r irq_source_info_dcn31 -ffffffff82d2f290 r irq_service_funcs_dcn31 -ffffffff82d2f298 r dummy_irq_info_funcs -ffffffff82d2f2a8 r hpd_irq_info_funcs -ffffffff82d2f2b8 r hpd_rx_irq_info_funcs -ffffffff82d2f2c8 r pflip_irq_info_funcs -ffffffff82d2f2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d2f2e8 r vblank_irq_info_funcs -ffffffff82d2f2f8 r vline0_irq_info_funcs -ffffffff82d2f308 r outbox_irq_info_funcs -ffffffff82d30000 r irq_source_info_dcn314 -ffffffff82d31290 r irq_service_funcs_dcn314 -ffffffff82d31298 r dummy_irq_info_funcs -ffffffff82d312a8 r hpd_irq_info_funcs -ffffffff82d312b8 r hpd_rx_irq_info_funcs -ffffffff82d312c8 r pflip_irq_info_funcs -ffffffff82d312d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d312e8 r vblank_irq_info_funcs -ffffffff82d312f8 r vline0_irq_info_funcs -ffffffff82d31308 r outbox_irq_info_funcs -ffffffff82d32000 r irq_source_info_dcn315 -ffffffff82d33290 r irq_service_funcs_dcn315 -ffffffff82d33298 r dummy_irq_info_funcs -ffffffff82d332a8 r hpd_irq_info_funcs -ffffffff82d332b8 r hpd_rx_irq_info_funcs -ffffffff82d332c8 r pflip_irq_info_funcs -ffffffff82d332d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d332e8 r vblank_irq_info_funcs -ffffffff82d332f8 r vline0_irq_info_funcs -ffffffff82d33308 r outbox_irq_info_funcs -ffffffff82d34000 r irq_source_info_dcn32 -ffffffff82d35290 r irq_service_funcs_dcn32 -ffffffff82d35298 r dummy_irq_info_funcs -ffffffff82d352a8 r hpd_irq_info_funcs -ffffffff82d352b8 r hpd_rx_irq_info_funcs -ffffffff82d352c8 r pflip_irq_info_funcs -ffffffff82d352d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d352e8 r vblank_irq_info_funcs -ffffffff82d352f8 r vline0_irq_info_funcs -ffffffff82d35308 r outbox_irq_info_funcs -ffffffff82d37000 r dio_link_hwss -ffffffff82d38000 r dio_fixed_vs_pe_retimer_link_hwss -ffffffff82d39000 r dpia_link_hwss -ffffffff82d3a000 r hpo_dp_link_hwss -ffffffff82d3b000 r hpo_fixed_vs_pe_retimer_dp_link_hwss -ffffffff82d3c000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82d3d000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82d3d006 r DP_DVI_CONVERTER_ID_4 -ffffffff82d3d00d r DP_DVI_CONVERTER_ID_5 -ffffffff82d3e000 r dp_lt_fallbacks -ffffffff82d42000 r mandatory_dpcd_partitions -ffffffff82d43000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82d43007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82d44000 r virtual_lnk_enc_funcs -ffffffff82d45000 r virtual_link_hwss -ffffffff82d46000 r virtual_str_enc_funcs -ffffffff82d47000 R dmub_srv_dcn20_regs -ffffffff82d48000 R dmub_srv_dcn21_regs -ffffffff82d49000 R dmub_srv_dcn30_regs -ffffffff82d4a000 R dmub_srv_dcn301_regs -ffffffff82d4b000 R dmub_srv_dcn302_regs -ffffffff82d4c000 R dmub_srv_dcn303_regs -ffffffff82d4d000 R dmub_srv_dcn31_regs -ffffffff82d4e000 R dmub_srv_dcn314_regs -ffffffff82d4f000 R dmub_srv_dcn315_regs -ffffffff82d50000 R dmub_srv_dcn316_regs -ffffffff82d51000 R dmub_srv_dcn32_regs -ffffffff82d52000 r numerator01 -ffffffff82d52020 r numerator02 -ffffffff82d52040 r numerator04 -ffffffff82d52060 r numerator05 -ffffffff82d56000 r abm_settings -ffffffff82d56020 r abm_settings_config0 -ffffffff82d56060 r abm_settings_config1 -ffffffff82d560a0 r abm_settings_config2 -ffffffff82d560d8 r min_reduction_table_v_2_2 -ffffffff82d560e5 r max_reduction_table_v_2_2 -ffffffff82d560f2 r min_reduction_table -ffffffff82d560ff r max_reduction_table -ffffffff82d56110 r custom_backlight_curve0 -ffffffff82d57000 R amdgpu_pp_profile_name -ffffffff82d58000 r pp_lib_thermal_controller_names -ffffffff82d59000 r pp_ip_funcs -ffffffff82d590a0 R pp_smu_ip_block -ffffffff82d590b8 r pp_dpm_funcs -ffffffff82d5a000 r gpio_tbl -ffffffff82d5a0f0 r enable_fb_req_rej_tbl -ffffffff82d5a140 r use_bclk_tbl -ffffffff82d5a310 r turn_off_plls_tbl -ffffffff82d5a640 r enter_baco_tbl -ffffffff82d5a730 r exit_baco_tbl -ffffffff82d5a850 r clean_baco_tbl +ffffffff82d19000 r funcs +ffffffff82d1a000 r hdmi_14_protection +ffffffff82d1a010 r dp_11_protection +ffffffff82d1a020 r hdcp_i2c_offsets +ffffffff82d1a050 r hdcp_dpcd_addrs +ffffffff82d1b000 r irq_service_funcs_dce110 +ffffffff82d1b008 r dummy_irq_info_funcs +ffffffff82d1b018 r hpd_irq_info_funcs +ffffffff82d1b028 r hpd_rx_irq_info_funcs +ffffffff82d1b038 r pflip_irq_info_funcs +ffffffff82d1b048 r vupdate_irq_info_funcs +ffffffff82d1b058 r vblank_irq_info_funcs +ffffffff82d1b070 r irq_source_info_dce110 +ffffffff82d1d000 r irq_service_funcs_dce120 +ffffffff82d1d008 r dummy_irq_info_funcs +ffffffff82d1d018 r hpd_irq_info_funcs +ffffffff82d1d028 r hpd_rx_irq_info_funcs +ffffffff82d1d038 r pflip_irq_info_funcs +ffffffff82d1d048 r vupdate_irq_info_funcs +ffffffff82d1d058 r vblank_irq_info_funcs +ffffffff82d1d070 r irq_source_info_dce120 +ffffffff82d1f000 r irq_service_funcs_dce80 +ffffffff82d1f008 r dummy_irq_info_funcs +ffffffff82d1f018 r hpd_irq_info_funcs +ffffffff82d1f028 r hpd_rx_irq_info_funcs +ffffffff82d1f038 r pflip_irq_info_funcs +ffffffff82d1f048 r vupdate_irq_info_funcs +ffffffff82d1f058 r vblank_irq_info_funcs +ffffffff82d1f070 r irq_source_info_dce80 +ffffffff82d21000 r irq_service_funcs_dcn10 +ffffffff82d21008 r dummy_irq_info_funcs +ffffffff82d21018 r hpd_irq_info_funcs +ffffffff82d21028 r hpd_rx_irq_info_funcs +ffffffff82d21038 r pflip_irq_info_funcs +ffffffff82d21048 r vupdate_no_lock_irq_info_funcs +ffffffff82d21058 r vblank_irq_info_funcs +ffffffff82d21068 r vline0_irq_info_funcs +ffffffff82d21080 r irq_source_info_dcn10 +ffffffff82d23000 r irq_service_funcs_dcn20 +ffffffff82d23008 r dummy_irq_info_funcs +ffffffff82d23018 r hpd_irq_info_funcs +ffffffff82d23028 r hpd_rx_irq_info_funcs +ffffffff82d23038 r pflip_irq_info_funcs +ffffffff82d23048 r vupdate_no_lock_irq_info_funcs +ffffffff82d23058 r vblank_irq_info_funcs +ffffffff82d23068 r vline0_irq_info_funcs +ffffffff82d23080 r irq_source_info_dcn20 +ffffffff82d25000 r irq_service_funcs_dcn201 +ffffffff82d25008 r dummy_irq_info_funcs +ffffffff82d25018 r hpd_irq_info_funcs +ffffffff82d25028 r hpd_rx_irq_info_funcs +ffffffff82d25038 r pflip_irq_info_funcs +ffffffff82d25048 r vupdate_no_lock_irq_info_funcs +ffffffff82d25058 r vblank_irq_info_funcs +ffffffff82d25068 r vline0_irq_info_funcs +ffffffff82d25080 r irq_source_info_dcn201 +ffffffff82d27000 r irq_source_info_dcn21 +ffffffff82d28290 r irq_service_funcs_dcn21 +ffffffff82d28298 r dummy_irq_info_funcs +ffffffff82d282a8 r hpd_irq_info_funcs +ffffffff82d282b8 r hpd_rx_irq_info_funcs +ffffffff82d282c8 r pflip_irq_info_funcs +ffffffff82d282d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d282e8 r vblank_irq_info_funcs +ffffffff82d282f8 r vline0_irq_info_funcs +ffffffff82d28308 r dmub_outbox_irq_info_funcs +ffffffff82d29000 r irq_source_info_dcn30 +ffffffff82d2a290 r irq_service_funcs_dcn30 +ffffffff82d2a298 r dummy_irq_info_funcs +ffffffff82d2a2a8 r hpd_irq_info_funcs +ffffffff82d2a2b8 r hpd_rx_irq_info_funcs +ffffffff82d2a2c8 r pflip_irq_info_funcs +ffffffff82d2a2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d2a2e8 r vblank_irq_info_funcs +ffffffff82d2a2f8 r vline0_irq_info_funcs +ffffffff82d2a308 r dmub_trace_irq_info_funcs +ffffffff82d2b000 r irq_source_info_dcn302 +ffffffff82d2c290 r irq_service_funcs_dcn302 +ffffffff82d2c298 r dummy_irq_info_funcs +ffffffff82d2c2a8 r hpd_irq_info_funcs +ffffffff82d2c2b8 r hpd_rx_irq_info_funcs +ffffffff82d2c2c8 r pflip_irq_info_funcs +ffffffff82d2c2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d2c2e8 r vblank_irq_info_funcs +ffffffff82d2c2f8 r vline0_irq_info_funcs +ffffffff82d2c308 r dmub_trace_irq_info_funcs +ffffffff82d2d000 r irq_service_funcs_dcn303 +ffffffff82d2d008 r dummy_irq_info_funcs +ffffffff82d2d018 r hpd_irq_info_funcs +ffffffff82d2d028 r hpd_rx_irq_info_funcs +ffffffff82d2d038 r pflip_irq_info_funcs +ffffffff82d2d048 r vupdate_no_lock_irq_info_funcs +ffffffff82d2d058 r vblank_irq_info_funcs +ffffffff82d2d068 r vline0_irq_info_funcs +ffffffff82d2d080 r irq_source_info_dcn303 +ffffffff82d2f000 r irq_source_info_dcn31 +ffffffff82d30290 r irq_service_funcs_dcn31 +ffffffff82d30298 r dummy_irq_info_funcs +ffffffff82d302a8 r hpd_irq_info_funcs +ffffffff82d302b8 r hpd_rx_irq_info_funcs +ffffffff82d302c8 r pflip_irq_info_funcs +ffffffff82d302d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d302e8 r vblank_irq_info_funcs +ffffffff82d302f8 r vline0_irq_info_funcs +ffffffff82d30308 r outbox_irq_info_funcs +ffffffff82d31000 r irq_source_info_dcn314 +ffffffff82d32290 r irq_service_funcs_dcn314 +ffffffff82d32298 r dummy_irq_info_funcs +ffffffff82d322a8 r hpd_irq_info_funcs +ffffffff82d322b8 r hpd_rx_irq_info_funcs +ffffffff82d322c8 r pflip_irq_info_funcs +ffffffff82d322d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d322e8 r vblank_irq_info_funcs +ffffffff82d322f8 r vline0_irq_info_funcs +ffffffff82d32308 r outbox_irq_info_funcs +ffffffff82d33000 r irq_source_info_dcn315 +ffffffff82d34290 r irq_service_funcs_dcn315 +ffffffff82d34298 r dummy_irq_info_funcs +ffffffff82d342a8 r hpd_irq_info_funcs +ffffffff82d342b8 r hpd_rx_irq_info_funcs +ffffffff82d342c8 r pflip_irq_info_funcs +ffffffff82d342d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d342e8 r vblank_irq_info_funcs +ffffffff82d342f8 r vline0_irq_info_funcs +ffffffff82d34308 r outbox_irq_info_funcs +ffffffff82d35000 r irq_source_info_dcn32 +ffffffff82d36290 r irq_service_funcs_dcn32 +ffffffff82d36298 r dummy_irq_info_funcs +ffffffff82d362a8 r hpd_irq_info_funcs +ffffffff82d362b8 r hpd_rx_irq_info_funcs +ffffffff82d362c8 r pflip_irq_info_funcs +ffffffff82d362d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d362e8 r vblank_irq_info_funcs +ffffffff82d362f8 r vline0_irq_info_funcs +ffffffff82d36308 r outbox_irq_info_funcs +ffffffff82d38000 r dio_link_hwss +ffffffff82d39000 r dio_fixed_vs_pe_retimer_link_hwss +ffffffff82d3a000 r dpia_link_hwss +ffffffff82d3b000 r hpo_dp_link_hwss +ffffffff82d3c000 r hpo_fixed_vs_pe_retimer_dp_link_hwss +ffffffff82d3d000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82d3e000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82d3e006 r DP_DVI_CONVERTER_ID_4 +ffffffff82d3e00d r DP_DVI_CONVERTER_ID_5 +ffffffff82d3f000 r dp_lt_fallbacks +ffffffff82d43000 r mandatory_dpcd_partitions +ffffffff82d44000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82d44007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82d45000 r virtual_lnk_enc_funcs +ffffffff82d46000 r virtual_link_hwss +ffffffff82d47000 r virtual_str_enc_funcs +ffffffff82d48000 R dmub_srv_dcn20_regs +ffffffff82d49000 R dmub_srv_dcn21_regs +ffffffff82d4a000 R dmub_srv_dcn30_regs +ffffffff82d4b000 R dmub_srv_dcn301_regs +ffffffff82d4c000 R dmub_srv_dcn302_regs +ffffffff82d4d000 R dmub_srv_dcn303_regs +ffffffff82d4e000 R dmub_srv_dcn31_regs +ffffffff82d4f000 R dmub_srv_dcn314_regs +ffffffff82d50000 R dmub_srv_dcn315_regs +ffffffff82d51000 R dmub_srv_dcn316_regs +ffffffff82d52000 R dmub_srv_dcn32_regs +ffffffff82d53000 r numerator01 +ffffffff82d53020 r numerator02 +ffffffff82d53040 r numerator04 +ffffffff82d53060 r numerator05 +ffffffff82d57000 r abm_settings +ffffffff82d57020 r abm_settings_config0 +ffffffff82d57060 r abm_settings_config1 +ffffffff82d570a0 r abm_settings_config2 +ffffffff82d570d8 r min_reduction_table_v_2_2 +ffffffff82d570e5 r max_reduction_table_v_2_2 +ffffffff82d570f2 r min_reduction_table +ffffffff82d570ff r max_reduction_table +ffffffff82d57110 r custom_backlight_curve0 +ffffffff82d58000 R amdgpu_pp_profile_name +ffffffff82d59000 r pp_lib_thermal_controller_names +ffffffff82d5a000 r pp_ip_funcs +ffffffff82d5a0a0 R pp_smu_ip_block +ffffffff82d5a0b8 r pp_dpm_funcs ffffffff82d5b000 r gpio_tbl ffffffff82d5b0f0 r enable_fb_req_rej_tbl ffffffff82d5b140 r use_bclk_tbl -ffffffff82d5b2e0 r turn_off_plls_tbl -ffffffff82d5b370 r clk_req_b_tbl -ffffffff82d5b490 r enter_baco_tbl -ffffffff82d5b5b0 r exit_baco_tbl -ffffffff82d5b6d0 r clean_baco_tbl +ffffffff82d5b310 r turn_off_plls_tbl +ffffffff82d5b640 r enter_baco_tbl +ffffffff82d5b730 r exit_baco_tbl +ffffffff82d5b850 r clean_baco_tbl ffffffff82d5c000 r gpio_tbl ffffffff82d5c0f0 r enable_fb_req_rej_tbl -ffffffff82d5c140 r use_bclk_tbl_vg -ffffffff82d5c200 r turn_off_plls_tbl_vg -ffffffff82d5c350 r use_bclk_tbl -ffffffff82d5c440 r turn_off_plls_tbl -ffffffff82d5c5f0 r clk_req_b_tbl -ffffffff82d5c710 r enter_baco_tbl -ffffffff82d5c830 r exit_baco_tbl -ffffffff82d5c950 r clean_baco_tbl -ffffffff82d5d000 r vega10_fuses_default -ffffffff82d6c000 r pp_r600_encode_lanes -ffffffff82d6d000 R pptable_v1_0_funcs -ffffffff82d6e000 R pptable_funcs -ffffffff82d6e020 r soft_dummy_pp_table -ffffffff82d6f000 r smu10_hwmgr_funcs -ffffffff82d70000 r smu7_hwmgr_funcs -ffffffff82d702f8 r smu7_irq_funcs -ffffffff82d70310 r SMU7ThermalPolicy -ffffffff82d71000 r GCCACConfig_Polaris10 -ffffffff82d711b0 r DIDTConfig_Polaris10 -ffffffff82d71a50 r GCCACConfig_Polaris11 -ffffffff82d71c00 r DIDTConfig_Polaris11_Kicker -ffffffff82d724a0 r DIDTConfig_Polaris11 -ffffffff82d72d40 r DIDTConfig_Polaris12 -ffffffff82d735e0 r GCCACConfig_VegaM -ffffffff82d73790 r DIDTConfig_VegaM -ffffffff82d75000 r smu8_hwmgr_funcs -ffffffff82d752f0 r SMU7ThermalPolicy -ffffffff82d76000 r smu9_irq_funcs -ffffffff82d77000 r gpio_tbl_iceland -ffffffff82d77060 r gpio_tbl -ffffffff82d77150 r enable_fb_req_rej_tbl -ffffffff82d771a0 r use_bclk_tbl -ffffffff82d77370 r turn_off_plls_tbl -ffffffff82d77610 r enter_baco_tbl -ffffffff82d77730 r exit_baco_tbl_iceland -ffffffff82d77870 r clean_baco_tbl_iceland -ffffffff82d77890 r exit_baco_tbl -ffffffff82d779b0 r clean_baco_tbl -ffffffff82d78000 r pre_baco_tbl -ffffffff82d78090 r enter_baco_tbl -ffffffff82d782b0 r exit_baco_tbl -ffffffff82d78520 r clean_baco_tbl -ffffffff82d79000 r vega10_hwmgr_funcs -ffffffff82d792f0 r channel_number -ffffffff82d79320 r SMU7ThermalWithDelayPolicy -ffffffff82d7a000 r SEDiDtStallCtrlConfig_vega10 -ffffffff82d7a110 r SEDiDtStallPatternConfig_vega10 -ffffffff82d7a2e0 r SEDiDtWeightConfig_Vega10 -ffffffff82d7a3b0 r SEDiDtCtrl1Config_Vega10 -ffffffff82d7a440 r SEDiDtCtrl2Config_Vega10 -ffffffff82d7a510 r SEDiDtCtrl3Config_vega10 -ffffffff82d7a820 r SEDiDtTuningCtrlConfig_Vega10 -ffffffff82d7a8b0 r SELCacConfig_Vega10 -ffffffff82d7aa40 r SEDiDtCtrl0Config_Vega10 -ffffffff82d7ad10 r AvfsPSMInitConfig_vega10 -ffffffff82d7ad90 r SEEDCStallPatternConfig_Vega10 -ffffffff82d7aea0 r SEEDCStallDelayConfig_Vega10 -ffffffff82d7af80 r SEEDCCtrlConfig_Vega10 -ffffffff82d7b040 r PSMSEEDCStallPatternConfig_Vega10 -ffffffff82d7b0c0 r PSMSEEDCStallDelayConfig_Vega10 -ffffffff82d7b1d0 r PSMSEEDCCtrlResetConfig_Vega10 -ffffffff82d7b290 r PSMSEEDCCtrlConfig_Vega10 -ffffffff82d7b350 r SEEDCForceStallPatternConfig_Vega10 -ffffffff82d7b3e0 r SEEDCCtrlForceStallConfig_Vega10 -ffffffff82d7c000 R vega10_pptable_funcs -ffffffff82d7d000 r pre_baco_tbl -ffffffff82d7d090 r enter_baco_tbl -ffffffff82d7d2b0 r exit_baco_tbl -ffffffff82d7d520 r clean_baco_tbl -ffffffff82d7e000 r vega12_hwmgr_funcs -ffffffff82d7e2f0 r SMU7ThermalWithDelayPolicy -ffffffff82d7e340 r link_width -ffffffff82d7f000 R vega12_pptable_funcs -ffffffff82d80000 r clean_baco_tbl -ffffffff82d81000 r vega20_hwmgr_funcs -ffffffff82d812f0 r SMU7ThermalWithDelayPolicy -ffffffff82d81340 r link_width -ffffffff82d82000 R vega20_pptable_funcs -ffffffff82d83000 R ci_smu_funcs -ffffffff82d830e0 r defaults_hawaii_pro -ffffffff82d8312c r defaults_hawaii_xt -ffffffff82d83178 r defaults_saturn_xt -ffffffff82d831c4 r defaults_bonaire_xt -ffffffff82d83210 r ci_program_jump_on_start.data -ffffffff82d84000 R fiji_smu_funcs -ffffffff82d840e0 r avfs_graphics_level -ffffffff82d84240 r fiji_power_tune_data_set_array -ffffffff82d84246 r fiji_clock_stretch_amount_conversion -ffffffff82d84260 r fiji_clock_stretcher_ddt_table -ffffffff82d85000 R iceland_smu_funcs -ffffffff82d850e0 r defaults_icelandxt -ffffffff82d8512c r defaults_icelandpro -ffffffff82d85178 r defaults_iceland -ffffffff82d86000 R polaris10_smu_funcs -ffffffff82d860e0 r avfs_graphics_level_polaris10 -ffffffff82d862a0 r avfs_memory_level_polaris10 -ffffffff82d862c0 r polaris10_power_tune_data_set_array -ffffffff82d86310 r Range_Table -ffffffff82d87000 R smu10_smu_funcs -ffffffff82d88000 r smu7_program_jump_on_start.data -ffffffff82d88010 r pwr_virus_table_pre -ffffffff82d88680 r pwr_virus_table_post -ffffffff82d88f80 r pwr_virus_section1 -ffffffff82d89610 r pwr_virus_section2 -ffffffff82d89660 r pwr_virus_section3 -ffffffff82d90ab0 r pwr_virus_section4 -ffffffff82d90e80 r pwr_virus_section5 -ffffffff82d91490 r pwr_virus_section6 -ffffffff82d93000 R smu8_smu_funcs -ffffffff82d94000 R tonga_smu_funcs -ffffffff82d940e0 r tonga_power_tune_data_set_array -ffffffff82d9412c r tonga_clock_stretch_amount_conversion -ffffffff82d94140 r tonga_clock_stretcher_ddt_table -ffffffff82d95000 R vega10_smu_funcs -ffffffff82d96000 R vega12_smu_funcs -ffffffff82d97000 R vega20_smu_funcs -ffffffff82d98000 R vegam_smu_funcs -ffffffff82d980e0 r vegam_power_tune_data_set_array -ffffffff82d98130 r Range_Table -ffffffff82d99000 R smu_ip_funcs -ffffffff82d990a0 R smu_v11_0_ip_block -ffffffff82d990b8 R smu_v12_0_ip_block -ffffffff82d990d0 R smu_v13_0_ip_block -ffffffff82d990e8 r swsmu_pm_funcs -ffffffff82d9a000 r arcturus_ppt_funcs -ffffffff82d9a3f0 r arcturus_table_map -ffffffff82d9a470 r arcturus_pwr_src_map -ffffffff82d9a480 r arcturus_workload_map -ffffffff82d9a4d0 r smu11_thermal_policy -ffffffff82d9a528 r arcturus_i2c_algo -ffffffff82d9a538 r arcturus_i2c_control_quirks -ffffffff82d9a550 r arcturus_throttler_map -ffffffff82d9a570 r arcturus_message_map -ffffffff82d9aff0 r arcturus_clk_map -ffffffff82d9b0b0 r arcturus_feature_mask_map -ffffffff82d9c000 r cyan_skillfish_ppt_funcs -ffffffff82d9d000 r navi10_ppt_funcs -ffffffff82d9d3f0 r smu11_thermal_policy -ffffffff82d9d448 r navi10_i2c_algo -ffffffff82d9d458 r navi10_i2c_control_quirks -ffffffff82d9d470 r navi1x_throttler_map -ffffffff82d9d490 r NoDbiPrbs7 -ffffffff82d9e490 r DbiPrbs7 -ffffffff82da0000 r sienna_cichlid_ppt_funcs -ffffffff82da03f0 r smu11_thermal_policy -ffffffff82da0448 r sienna_cichlid_i2c_algo -ffffffff82da0458 r sienna_cichlid_i2c_control_quirks -ffffffff82da0470 r sienna_cichlid_throttler_map -ffffffff82da1000 r smu_v11_0_irq_funcs -ffffffff82da1010 r link_width -ffffffff82da2000 r vangogh_ppt_funcs -ffffffff82da23e8 r vangogh_throttler_map -ffffffff82da3000 r renoir_ppt_funcs -ffffffff82da33e8 r renoir_throttler_map -ffffffff82da4000 r aldebaran_ppt_funcs -ffffffff82da43f0 r aldebaran_clk_map -ffffffff82da44b0 r aldebaran_table_map -ffffffff82da4530 r smu13_thermal_policy -ffffffff82da4588 r aldebaran_i2c_algo -ffffffff82da4598 r aldebaran_i2c_control_quirks -ffffffff82da45b0 r aldebaran_throttler_map -ffffffff82da45d0 r aldebaran_message_map -ffffffff82da5050 r aldebaran_feature_mask_map -ffffffff82da6000 R pmfw_decoded_link_speed -ffffffff82da6020 R pmfw_decoded_link_width -ffffffff82da6040 r smu_v13_0_irq_funcs -ffffffff82da7000 r smu_v13_0_0_ppt_funcs -ffffffff82da73f0 r smu13_thermal_policy -ffffffff82da7448 r smu_v13_0_0_i2c_algo -ffffffff82da7458 r smu_v13_0_0_i2c_control_quirks -ffffffff82da7470 r smu_v13_0_0_throttler_map -ffffffff82da8000 r smu_v13_0_4_ppt_funcs -ffffffff82da9000 r smu_v13_0_5_ppt_funcs -ffffffff82daa000 r smu_v13_0_6_ppt_funcs -ffffffff82daa3f0 r smu_v13_0_6_message_map -ffffffff82daae70 r smu_v13_0_6_clk_map -ffffffff82daaf30 r smu_v13_0_6_table_map -ffffffff82daafb0 r smu_v13_0_6_i2c_algo -ffffffff82daafc0 r smu_v13_0_6_i2c_control_quirks -ffffffff82daafd0 r smu_v13_0_6_irq_funcs -ffffffff82daafe0 r smu_v13_0_6_throttler_map -ffffffff82daaff0 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startuphook_list -ffffffff83214000 D sysctl_lock -ffffffff83214010 D sysctl_disklock -ffffffff83214020 d openbsd -ffffffff83214024 d arg_max -ffffffff83214028 d posix_version -ffffffff8321402c d ngroups_max -ffffffff83214030 d int_one -ffffffff83214034 d maxpartitions -ffffffff83214038 d raw_part -ffffffff8321403c D allowpowerdown -ffffffff83214040 D hw_power -ffffffff83214044 d byte_order -ffffffff83214048 d page_size -ffffffff83215000 d thrsleep_queue -ffffffff83215010 d thrsleep_lock -ffffffff83216000 D tc_lock -ffffffff83216010 D windup_mtx -ffffffff83216020 d dummy_timecounter -ffffffff83216070 D timecounter -ffffffff83216078 D time_second -ffffffff83216080 d timehands -ffffffff83216088 d th0 -ffffffff83216120 d th1 -ffffffff83217000 D itimer_mtx -ffffffff83217010 D ratecheck_mtx -ffffffff83217020 D ppsratecheck_mtx -ffffffff83217030 D resettodr_to -ffffffff83217078 D resettodr_task -ffffffff83218000 D timeout_mutex -ffffffff83219000 D wdog_auto -ffffffff8321a000 D taskq_sys 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userconf_base -ffffffff83221004 D userconf_maxdev -ffffffff83221008 D userconf_totdev -ffffffff8322100c D userconf_maxlocnames -ffffffff83221010 D userconf_cnt -ffffffff83221014 D userconf_lines -ffffffff83221018 D userconf_histsz -ffffffff83221020 D userconf_cmds -ffffffff83222000 D ftlock -ffffffff83223000 d ppollcollect.poll_errintvl -ffffffff83224000 D ttydefchars -ffffffff83224014 D ttclos -ffffffff8322401b D ttopen -ffffffff83224022 D ttybg -ffffffff83224028 D ttyin -ffffffff8322402e D ttyout -ffffffff83224038 D ttylist_lock -ffffffff83225000 D linesw -ffffffff83225280 D nlinesw -ffffffff83226000 D pt_softc_lock -ffffffff83227000 d mbstat_boot_boot_cpumem -ffffffff83227080 D mbstat -ffffffff83227090 D mclsizes -ffffffff832270b0 D m_extref_mtx -ffffffff832270c0 D m_pool_allocator -ffffffff83228000 D somaxconn -ffffffff83228004 D sominconn -ffffffff83228008 D sosplice_lock -ffffffff83229000 D sb_max -ffffffff8322a000 D unp_df_lock -ffffffff8322a010 D unp_gc_lock -ffffffff8322a020 D unp_rights_mtx -ffffffff8322a030 D unp_ino_mtx -ffffffff8322a040 D unp_gc_task -ffffffff8322a070 D unpst_sendspace -ffffffff8322a074 D unpst_recvspace -ffffffff8322a078 D unpsq_sendspace -ffffffff8322a07c D unpsq_recvspace -ffffffff8322a080 D unpdg_sendspace -ffffffff8322a084 D unpdg_recvspace -ffffffff8322b000 D doingcache -ffffffff8322c000 D maxvfsconf -ffffffff8322c010 d vfsconflist -ffffffff8322d000 D lockf_lock -ffffffff8322d010 D maxlocksperuid -ffffffff8322e000 D iftovt_tab -ffffffff8322e040 D vttoif_tab -ffffffff8322e064 D suid_clear -ffffffff8322e068 D vnode_mtx -ffffffff8322e078 D vfs_stall_lock -ffffffff8322e090 D vtypes -ffffffff8322e0e0 D vtags -ffffffff8322f000 D syncer_maxdelay -ffffffff8322f004 D syncdelay -ffffffff83230000 D dosdirtemplate -ffffffff83231000 D ntfs_hashlock -ffffffff83232000 D ntfs_toupper_lock -ffffffff83233000 D art_table_gc_mtx -ffffffff83233010 D art_table_gc_task -ffffffff83233040 D art_node_gc_mtx -ffffffff83233050 D art_node_gc_task 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D bridge_cloner -ffffffff83241000 d veb_cloner -ffffffff83241030 d vport_cloner -ffffffff83242000 D vlan_tagh_lk -ffffffff83242010 D vlan_cloner -ffffffff83242040 D svlan_cloner -ffffffff83243000 D pipex_list_mtx -ffffffff83243010 D pipex_prune -ffffffff83243018 D pipexoutq -ffffffff83243050 d SHAPad2 -ffffffff83244000 D rtmap_gc -ffffffff83244018 D rt_rc -ffffffff83245000 D rt_labels -ffffffff83245010 D rtlabel_mtx -ffffffff83246000 D enc_cloner -ffffffff83247000 D gre_cloner -ffffffff83247030 D gre_list -ffffffff83247040 D mgre_cloner -ffffffff83247070 D egre_cloner -ffffffff832470a0 D nvgre_cloner -ffffffff832470d0 D eoip_cloner -ffffffff83248000 D trunk_cloner -ffffffff83249000 d aggr_cloner -ffffffff8324a000 d tpmr_cloner -ffffffff8324b000 D mpe_cloner -ffffffff8324c000 D mpw_cloner -ffffffff8324d000 D mpip_cloner -ffffffff8324e000 d bpe_cloner -ffffffff8324e030 d bpe_lock -ffffffff8324f000 D vether_cloner -ffffffff83250000 D pair_cloner -ffffffff83251000 d vxlan_cloner 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ipsend_task -ffffffff83259090 d ipsendraw_task -ffffffff8325a000 D ip_mrtproto -ffffffff8325a004 d sin -ffffffff8325b000 D rip_sendspace -ffffffff8325b008 D rip_recvspace -ffffffff8325c000 D tcprexmtthresh -ffffffff8325c004 D tcptv_keep_init -ffffffff8325c008 D tcp_rst_ppslim -ffffffff8325c00c D tcp_ackdrop_ppslim -ffffffff8325c010 D tcp_syn_hash_size -ffffffff8325c014 D tcp_syn_cache_limit -ffffffff8325c018 D tcp_syn_bucket_limit -ffffffff8325c01c D tcp_syn_use_limit -ffffffff8325c020 D syn_cache_mtx -ffffffff8325d000 D tcp_outflags -ffffffff8325e000 D tcp_timer_mtx -ffffffff8325e010 D tcp_mssdflt -ffffffff8325e014 D tcp_rttdflt -ffffffff8325e018 D tcp_do_rfc1323 -ffffffff8325e01c D tcp_do_sack -ffffffff8325e020 D tcp_do_rfc3390 -ffffffff8325e024 D tcp_do_tso -ffffffff8325e028 D tcp_reass_limit -ffffffff8325e02c D tcp_sackhole_limit -ffffffff8325f000 D tcp_backoff -ffffffff8325f034 D tcp_totbackoff -ffffffff83260000 D tcp_sendspace -ffffffff83260004 D tcp_recvspace -ffffffff83260008 D tcp_autorcvbuf_inc -ffffffff83261000 D udpcksum -ffffffff83261004 D udp_sendspace -ffffffff83261008 D udp_recvspace -ffffffff83262000 D ipsec_flows_mtx -ffffffff83262010 D ipsec_ids_idle -ffffffff83262014 D ipsec_ids_next_flow -ffffffff83262018 D ipsec_policy_head -ffffffff83262028 D ipsp_ids_gc_timeout -ffffffff83262070 D tdb_sadb_mtx -ffffffff83262080 d tdb_hashmask -ffffffff83263000 D ipo_tdb_mtx -ffffffff83263010 D ipsec_acquire_mtx -ffffffff83263020 D ipsec_acquire_head -ffffffff83264000 D ipsec_keep_invalid -ffffffff83264004 D ipsec_require_pfs -ffffffff83264008 D ipsec_soft_timeout -ffffffff8326400c D ipsec_exp_timeout -ffffffff83264010 D ipsec_soft_first_use -ffffffff83264014 D ipsec_exp_first_use -ffffffff83264018 D ipsec_expire_acquire -ffffffff8326401c D esp_enable -ffffffff83264020 D ah_enable -ffffffff83265000 D udpencap_enable -ffffffff83265004 D udpencap_port -ffffffff83266000 D carp_vh_rc -ffffffff83266020 D carp_sc_rc -ffffffff83266040 D carp_opts -ffffffff83266058 D carp_cloner -ffffffff83266088 d carp_send_na.mcast -ffffffff83267000 d PADDING +ffffffff82d5c140 r use_bclk_tbl +ffffffff82d5c2e0 r turn_off_plls_tbl +ffffffff82d5c370 r clk_req_b_tbl +ffffffff82d5c490 r enter_baco_tbl +ffffffff82d5c5b0 r exit_baco_tbl +ffffffff82d5c6d0 r clean_baco_tbl +ffffffff82d5d000 r gpio_tbl +ffffffff82d5d0f0 r enable_fb_req_rej_tbl +ffffffff82d5d140 r use_bclk_tbl_vg +ffffffff82d5d200 r turn_off_plls_tbl_vg +ffffffff82d5d350 r use_bclk_tbl +ffffffff82d5d440 r turn_off_plls_tbl +ffffffff82d5d5f0 r clk_req_b_tbl +ffffffff82d5d710 r enter_baco_tbl +ffffffff82d5d830 r exit_baco_tbl +ffffffff82d5d950 r clean_baco_tbl +ffffffff82d5e000 r vega10_fuses_default +ffffffff82d6d000 r pp_r600_encode_lanes +ffffffff82d6e000 R pptable_v1_0_funcs +ffffffff82d6f000 R pptable_funcs +ffffffff82d6f020 r soft_dummy_pp_table +ffffffff82d70000 r smu10_hwmgr_funcs +ffffffff82d71000 r smu7_hwmgr_funcs +ffffffff82d712f8 r smu7_irq_funcs +ffffffff82d71310 r SMU7ThermalPolicy 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fiji_clock_stretcher_ddt_table +ffffffff82d86000 R iceland_smu_funcs +ffffffff82d860e0 r defaults_icelandxt +ffffffff82d8612c r defaults_icelandpro +ffffffff82d86178 r defaults_iceland +ffffffff82d87000 R polaris10_smu_funcs +ffffffff82d870e0 r avfs_graphics_level_polaris10 +ffffffff82d872a0 r avfs_memory_level_polaris10 +ffffffff82d872c0 r polaris10_power_tune_data_set_array +ffffffff82d87310 r Range_Table +ffffffff82d88000 R smu10_smu_funcs +ffffffff82d89000 r smu7_program_jump_on_start.data +ffffffff82d89010 r pwr_virus_table_pre +ffffffff82d89680 r pwr_virus_table_post +ffffffff82d89f80 r pwr_virus_section1 +ffffffff82d8a610 r pwr_virus_section2 +ffffffff82d8a660 r pwr_virus_section3 +ffffffff82d91ab0 r pwr_virus_section4 +ffffffff82d91e80 r pwr_virus_section5 +ffffffff82d92490 r pwr_virus_section6 +ffffffff82d94000 R smu8_smu_funcs +ffffffff82d95000 R tonga_smu_funcs +ffffffff82d950e0 r tonga_power_tune_data_set_array +ffffffff82d9512c r tonga_clock_stretch_amount_conversion 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navi10_ppt_funcs +ffffffff82d9e3f0 r smu11_thermal_policy +ffffffff82d9e448 r navi10_i2c_algo +ffffffff82d9e458 r navi10_i2c_control_quirks +ffffffff82d9e470 r navi1x_throttler_map +ffffffff82d9e490 r NoDbiPrbs7 +ffffffff82d9f490 r DbiPrbs7 +ffffffff82da1000 r sienna_cichlid_ppt_funcs +ffffffff82da13f0 r smu11_thermal_policy +ffffffff82da1448 r sienna_cichlid_i2c_algo +ffffffff82da1458 r sienna_cichlid_i2c_control_quirks +ffffffff82da1470 r sienna_cichlid_throttler_map +ffffffff82da2000 r smu_v11_0_irq_funcs +ffffffff82da2010 r link_width +ffffffff82da3000 r vangogh_ppt_funcs +ffffffff82da33e8 r vangogh_throttler_map +ffffffff82da4000 r renoir_ppt_funcs +ffffffff82da43e8 r renoir_throttler_map +ffffffff82da5000 r aldebaran_ppt_funcs +ffffffff82da53f0 r aldebaran_clk_map +ffffffff82da54b0 r aldebaran_table_map +ffffffff82da5530 r smu13_thermal_policy +ffffffff82da5588 r aldebaran_i2c_algo +ffffffff82da5598 r aldebaran_i2c_control_quirks +ffffffff82da55b0 r aldebaran_throttler_map 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smu13_thermal_policy +ffffffff82dad450 r smu_v13_0_7_throttler_map +ffffffff82dae000 r yellow_carp_ppt_funcs +ffffffff82daf000 R link_speed +ffffffff82daf020 r __smu_message_names +ffffffff82db0000 R pchb_ca +ffffffff82db1000 R amas_ca +ffffffff82db1028 R amas_devices +ffffffff82db1040 r amas_feature +ffffffff82db2000 R cardslot_ca +ffffffff82db3000 R cardbus_ca +ffffffff82db4000 R com_cardbus_ca +ffffffff82db5000 R xl_cardbus_ca +ffffffff82db5030 R xl_cardbus_products +ffffffff82db6000 R dc_cardbus_ca +ffffffff82db6030 R dc_cardbus_devices +ffffffff82db7000 R fxp_cardbus_ca +ffffffff82db7028 R fxp_cardbus_devices +ffffffff82db8000 R rl_cardbus_devices +ffffffff82db8028 R rl_cardbus_ca +ffffffff82db9000 R re_cardbus_ca +ffffffff82db9028 R re_cardbus_devices +ffffffff82dba000 R ath_cardbus_ca +ffffffff82dbb000 R athn_cardbus_ca +ffffffff82dbb030 r athn_cardbus_devices +ffffffff82dbc000 R atw_cardbus_ca +ffffffff82dbc028 R atw_cardbus_devices +ffffffff82dbd000 R rtw_cardbus_ca +ffffffff82dbd028 R rtw_cardbus_devices +ffffffff82dbe000 R ral_cardbus_ca +ffffffff82dbe030 r ral_cardbus_devices +ffffffff82dbf000 R acx_cardbus_ca +ffffffff82dbf028 r acx_cardbus_devices +ffffffff82dc0000 R pgt_cardbus_ca +ffffffff82dc0028 R pgt_cardbus_devices +ffffffff82dc1000 R ehci_cardbus_ca +ffffffff82dc2000 R ohci_cardbus_ca +ffffffff82dc3000 R uhci_cardbus_ca +ffffffff82dc4000 R malo_cardbus_ca +ffffffff82dc4028 r malo_cardbus_devices +ffffffff82dc5000 R bwi_cardbus_ca +ffffffff82dc5030 r bwi_cardbus_devices +ffffffff82dc6000 R pcmcia_ca +ffffffff82dc7000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82dc8000 r pcmcia_cis_quirks +ffffffff82dc9000 R ep_pcmcia_ca +ffffffff82dca000 R ne_pcmcia_ca +ffffffff82dca030 R ne2000devs +ffffffff82dcc000 R aic_pcmcia_ca +ffffffff82dcd000 R com_pcmcia_ca +ffffffff82dce000 R wdc_pcmcia_ca +ffffffff82dcf000 R sm_pcmcia_ca +ffffffff82dd0000 R xe_pcmcia_ca +ffffffff82dd1000 R wi_pcmcia_ca +ffffffff82dd1030 r wi_pcmcia_products +ffffffff82dd2000 R malo_pcmcia_ca +ffffffff82dd3000 R an_pcmcia_ca +ffffffff82dd4000 R pcib_ca +ffffffff82dd5000 R amdpcib_ca +ffffffff82dd5028 R amdpcib_devices +ffffffff82dd6000 R tcpcib_ca +ffffffff82dd6028 R tcpcib_devices +ffffffff82dd7000 R aapic_ca +ffffffff82dd8000 R hme_pci_ca +ffffffff82dd8028 r hme_promhdr +ffffffff82dd802a r hme_promdat +ffffffff82dd9000 R isa_ca +ffffffff82dda000 R isadma_ca +ffffffff82ddb000 R fdc_ca +ffffffff82ddc000 R fd_ca +ffffffff82ddd000 R com_isa_ca +ffffffff82dde000 R pckbc_isa_ca +ffffffff82ddf000 R vga_isa_ca +ffffffff82de0000 R wdc_isa_ca +ffffffff82de1000 R mpu_midi_hw_if +ffffffff82de2000 R mpu_isa_ca +ffffffff82de3000 R pcppi_ca +ffffffff82de4000 R spkr_ca +ffffffff82de4030 r pitchtab +ffffffff82de5000 R lpt_isa_ca +ffffffff82de6000 R wbsio_ca +ffffffff82de7000 R schsio_ca +ffffffff82de8000 R lm_isa_ca +ffffffff82de8028 R lm_wbsio_ca +ffffffff82de9000 R it_sensors +ffffffff82de9110 R it_vrfact +ffffffff82de9140 R it_fan_regs +ffffffff82de9160 R it_fan_ext_regs +ffffffff82de9178 R it_ca +ffffffff82dea000 R abitkv_sensors +ffffffff82dea200 R abitaa_sensors +ffffffff82dea480 R abitav_sensors +ffffffff82dea700 R abitas_sensors +ffffffff82dea980 R abitax_sensors +ffffffff82deabc0 R abitm4_sensors +ffffffff82deae80 R abitan_sensors +ffffffff82deb120 R abital_sensors +ffffffff82deb3a0 R abitaw_sensors +ffffffff82deb700 R abitni_sensors +ffffffff82deb9a0 R abitat_sensors +ffffffff82debcc0 R abitan2_sensors +ffffffff82debf60 R abitab_sensors +ffffffff82dec220 R abitan3_sensors +ffffffff82dec500 R abitaw2_sensors +ffffffff82dec860 R abitat2_sensors +ffffffff82decb60 R abitab2_sensors +ffffffff82decea0 R abitin_sensors +ffffffff82ded1e0 R uguru_ca +ffffffff82dee000 R aps_ca +ffffffff82def000 R wsdisplay_emul_ca +ffffffff82def030 r charClass +ffffffff82df0000 r usl_syncops +ffffffff82df1000 R wsevent_filtops +ffffffff82df2000 R wskbd_ca +ffffffff82df3000 r latin1_to_upper +ffffffff82df4000 R wsmouse_ca +ffffffff82df5000 R cyrillic_to_koi8 +ffffffff82df5060 R unicode_to_latin2 +ffffffff82df50e0 R unicode_to_latin7 +ffffffff82df6000 R wsemul_vt100_ops +ffffffff82df7000 r decspcgr2uni +ffffffff82df7100 r dectech2uni +ffffffff82df7200 r nrctable +ffffffff82df8000 r vt100_fkeys +ffffffff82df80c0 r vt100_pfkeys +ffffffff82df80e0 r vt100_numpad +ffffffff82df9000 R pckbd_ca +ffffffff82df9028 R pckbd_accessops +ffffffff82df9040 R pckbd_consops +ffffffff82df9060 R pckbd_keymapdata +ffffffff82df9070 R pckbd_xtbl2 +ffffffff82df9100 R pckbd_xtbl2_ext +ffffffff82dfa000 r pckbd_keydesc_us +ffffffff82dfa250 r pckbd_keydesc_de +ffffffff82dfa2f0 r pckbd_keydesc_de_nodead +ffffffff82dfa310 r pckbd_keydesc_fr +ffffffff82dfa3d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82dfa510 r pckbd_keydesc_dk +ffffffff82dfa5a0 r pckbd_keydesc_dk_nodead +ffffffff82dfa5b0 r pckbd_keydesc_it +ffffffff82dfa640 r pckbd_keydesc_uk +ffffffff82dfa6e0 r pckbd_keydesc_jp +ffffffff82dfa750 r pckbd_keydesc_sv +ffffffff82dfa780 r pckbd_keydesc_sv_nodead +ffffffff82dfa790 r pckbd_keydesc_no +ffffffff82dfa7c0 r pckbd_keydesc_no_nodead +ffffffff82dfa7d0 r pckbd_keydesc_us_declk +ffffffff82dfa860 r pckbd_keydesc_us_dvorak +ffffffff82dfa900 r pckbd_keydesc_us_colemak +ffffffff82dfa948 r pckbd_keydesc_swapctrlcaps +ffffffff82dfa960 r pckbd_keydesc_iopener +ffffffff82dfa9b0 r pckbd_keydesc_es +ffffffff82dfaa50 r pckbd_keydesc_be +ffffffff82dfab10 r pckbd_keydesc_ru +ffffffff82dfac80 r pckbd_keydesc_ua +ffffffff82dfae10 r pckbd_keydesc_sg +ffffffff82dfaec0 r pckbd_keydesc_sg_nodead +ffffffff82dfaee0 r pckbd_keydesc_sf +ffffffff82dfaf00 r pckbd_keydesc_pt +ffffffff82dfaf90 r pckbd_keydesc_lt +ffffffff82dfb070 r pckbd_keydesc_la +ffffffff82dfb100 r pckbd_keydesc_br +ffffffff82dfb180 r pckbd_keydesc_tr +ffffffff82dfb230 r pckbd_keydesc_tr_nodead +ffffffff82dfb250 r pckbd_keydesc_pl +ffffffff82dfb2b0 r pckbd_keydesc_hu +ffffffff82dfb3c0 r pckbd_keydesc_si +ffffffff82dfb4d0 r pckbd_keydesc_cf +ffffffff82dfb5a0 r pckbd_keydesc_cf_nodead +ffffffff82dfb5c0 r pckbd_keydesc_lv +ffffffff82dfb640 r pckbd_keydesc_nl +ffffffff82dfb720 r pckbd_keydesc_nl_nodead +ffffffff82dfb740 r pckbd_keydesc_is +ffffffff82dfb7cc r pckbd_keydesc_is_nodead +ffffffff82dfb7e0 r pckbd_keydesc_ee +ffffffff82dfb890 r pckbd_keydesc_ee_nodead +ffffffff82dfb8b0 R pckbd_keydesctab +ffffffff82dfc000 R pms_ca +ffffffff82dfc028 R pms_accessops +ffffffff82dfc040 R pms_sec_accessops +ffffffff82dfc060 R pms_protocols +ffffffff82dfc1e0 r alps_models +ffffffff82dfd000 R skgpio_led_offset +ffffffff82dfd008 R skgpio_ca +ffffffff82dfe000 R hidkbd_trtab +ffffffff82dfe100 r apple_fn_trans +ffffffff82dfe120 r apple_tb_trans +ffffffff82dfe140 r apple_mba_trans +ffffffff82dff000 r hidcc_attach_wskbd.accessops +ffffffff82dff020 r hidcc_keysyms +ffffffff82e00000 R usb_ca +ffffffff82e01000 R usb_known_products +ffffffff82e0cf90 R usb_known_vendors +ffffffff82e0f7b0 R usbd_error_strs +ffffffff82e10000 R usb_quirks +ffffffff82e10390 R usb_dev_quirks +ffffffff82e10398 R usbd_no_quirk +ffffffff82e11000 R uhub_ca +ffffffff82e11028 R uhub_uhub_ca +ffffffff82e12000 R uaudio_ca +ffffffff82e12028 R uaudio_hw_if +ffffffff82e120e0 R uaudio_rates +ffffffff82e12120 r uaudio_clkname.names +ffffffff82e12140 r uaudio_feature_addent.features +ffffffff82e13000 R uvideo_ca +ffffffff82e13028 R uvideo_hw_if +ffffffff82e13100 R uvideo_devs +ffffffff82e14000 r utvfu_select_norm.pal +ffffffff82e14040 r utvfu_select_norm.ntsc +ffffffff82e14080 r utvfu_setup_capture.setup +ffffffff82e14180 r utvfu_audio_start_chip.setup +ffffffff82e141c8 r utvfu_audio_stop_chip.setup +ffffffff82e141d8 R utvfu_ca +ffffffff82e14200 R utvfu_vid_hw_if +ffffffff82e142d0 R utvfu_au_hw_if +ffffffff82e15000 R udl_ca +ffffffff82e15030 r udl_devs +ffffffff82e150b0 r udl_modes +ffffffff82e16000 R umidi_hw_if +ffffffff82e16030 R umidi_ca +ffffffff82e16060 r umidi_evlen +ffffffff82e16080 r packet_length +ffffffff82e17000 r quirk_name +ffffffff82e18000 R ucom_ca +ffffffff82e19000 R ugen_ca +ffffffff82e19028 R ugenread_intr_filtops +ffffffff82e19058 R ugenread_isoc_filtops +ffffffff82e1a000 R uhidev_ca +ffffffff82e1a030 r uhid_graphire_report_descr +ffffffff82e1a0b0 r uhid_graphire3_4x5_report_descr +ffffffff82e1a160 r uhid_xb360gp_report_descr +ffffffff82e1a210 r uhid_xbonegp_report_descr +ffffffff82e1b000 R uhid_ca +ffffffff82e1b028 R uhidread_filtops +ffffffff82e1c000 R fido_ca +ffffffff82e1d000 R ujoy_ca +ffffffff82e1e000 r ukbd_keydesc_us +ffffffff82e1e2a0 r ukbd_keydesc_de +ffffffff82e1e350 r ukbd_keydesc_de_nodead +ffffffff82e1e370 r ukbd_keydesc_fr +ffffffff82e1e430 r ukbd_keydesc_fr_apple +ffffffff82e1e570 r ukbd_keydesc_fr_dvorak_bepo +ffffffff82e1e6b0 r ukbd_keydesc_dk +ffffffff82e1e750 r ukbd_keydesc_dk_nodead +ffffffff82e1e760 r ukbd_keydesc_it +ffffffff82e1e800 r ukbd_keydesc_uk +ffffffff82e1e8b0 r ukbd_keydesc_jp +ffffffff82e1e920 r ukbd_keydesc_sv +ffffffff82e1e950 r ukbd_keydesc_sv_nodead +ffffffff82e1e960 r ukbd_keydesc_no +ffffffff82e1e990 r ukbd_keydesc_no_nodead +ffffffff82e1e9a0 r ukbd_keydesc_us_dvorak +ffffffff82e1ea40 r ukbd_keydesc_us_colemak +ffffffff82e1ea88 r ukbd_keydesc_swapctrlcaps +ffffffff82e1eaa0 r ukbd_keydesc_iopener +ffffffff82e1eaf0 r ukbd_keydesc_es +ffffffff82e1eb90 r ukbd_keydesc_be +ffffffff82e1ec50 r ukbd_keydesc_ru +ffffffff82e1edc0 r ukbd_keydesc_ua +ffffffff82e1ef60 r ukbd_keydesc_sg +ffffffff82e1f020 r ukbd_keydesc_sg_nodead +ffffffff82e1f040 r ukbd_keydesc_sf +ffffffff82e1f060 r ukbd_keydesc_pt +ffffffff82e1f0f0 r ukbd_keydesc_pt_apple +ffffffff82e1f110 r ukbd_keydesc_lt +ffffffff82e1f1f0 r ukbd_keydesc_la +ffffffff82e1f290 r ukbd_keydesc_br +ffffffff82e1f320 r ukbd_keydesc_tr +ffffffff82e1f3e0 r ukbd_keydesc_tr_nodead +ffffffff82e1f400 r ukbd_keydesc_pl +ffffffff82e1f460 r ukbd_keydesc_hu +ffffffff82e1f570 r ukbd_keydesc_si +ffffffff82e1f690 r ukbd_keydesc_cf +ffffffff82e1f770 r ukbd_keydesc_cf_nodead +ffffffff82e1f790 r ukbd_keydesc_lv +ffffffff82e1f810 r ukbd_keydesc_nl +ffffffff82e1f8f0 r ukbd_keydesc_nl_nodead +ffffffff82e1f910 r ukbd_keydesc_is +ffffffff82e1f9a4 r ukbd_keydesc_is_nodead +ffffffff82e1f9b0 r ukbd_keydesc_ee +ffffffff82e1fa60 r ukbd_keydesc_ee_nodead +ffffffff82e1fa80 R ukbd_keydesctab +ffffffff82e20000 R ukbd_countrylayout +ffffffff82e20090 R ukbd_consops +ffffffff82e200b0 R ukbd_accessops +ffffffff82e200c8 R ukbd_ca +ffffffff82e200f0 R ukbd_never_console +ffffffff82e21000 R ums_accessops +ffffffff82e21018 R ums_ca +ffffffff82e22000 R umt_accessops +ffffffff82e22018 R umt_ca +ffffffff82e23000 R uts_devs +ffffffff82e23010 R uts_accessops +ffffffff82e23028 R uts_ca +ffffffff82e24000 R ubcmtp_accessops +ffffffff82e24018 R ubcmtp_ca +ffffffff82e24040 r ubcmtp_devices +ffffffff82e25000 R ucycom_methods +ffffffff82e25040 R ucycom_devs +ffffffff82e25050 R ucycom_ca +ffffffff82e26000 R uslhcom_methods +ffffffff82e26040 R uslhcom_ca +ffffffff82e26068 r uslhcom_devs +ffffffff82e27000 R ulpt_ca +ffffffff82e28000 R umass_ca +ffffffff82e28028 R umass_bbb_methods +ffffffff82e28040 R umass_cbi_methods +ffffffff82e29000 R umass_quirks +ffffffff82e2a000 R umass_scsi_switch +ffffffff82e2b000 R uthum_devs +ffffffff82e2b008 R uthum_ca +ffffffff82e2b030 r uthum_sensor_type_s +ffffffff82e2c000 R ugold_devs +ffffffff82e2c018 R ugold_ca +ffffffff82e2d000 R utrh_devs +ffffffff82e2d008 R utrh_ca +ffffffff82e2e000 R uoakrh_devs +ffffffff82e2e008 R uoakrh_ca +ffffffff82e2e030 R uoakrh_methods +ffffffff82e2f000 R uoaklux_devs +ffffffff82e2f008 R uoaklux_ca +ffffffff82e2f030 R uoaklux_methods +ffffffff82e30000 R uoakv_devs +ffffffff82e30008 R uoakv_ca +ffffffff82e30030 R uoakv_methods +ffffffff82e31000 R uonerng_ca +ffffffff82e32000 R urng_ca +ffffffff82e32030 r urng_devs +ffffffff82e33000 R udcf_ca +ffffffff82e33028 r udcf_devs +ffffffff82e34000 R umbg_ca +ffffffff82e35000 R uvisor_methods +ffffffff82e35040 R uvisor_ca +ffffffff82e35070 r uvisor_devs +ffffffff82e36000 R udsbr_hw_if +ffffffff82e36028 R udsbr_ca +ffffffff82e37000 R utwitch_devs +ffffffff82e37008 R utwitch_ca +ffffffff82e38000 R aue_devs +ffffffff82e381b0 R aue_ca +ffffffff82e39000 R axe_devs +ffffffff82e390d0 R axe_ca +ffffffff82e3a000 R axen_devs +ffffffff82e3a020 R axen_ca +ffffffff82e3b000 R smsc_ca +ffffffff82e3b030 r smsc_devs +ffffffff82e3c000 R cue_ca +ffffffff82e3d000 R kue_devs +ffffffff82e3d088 R kue_ca +ffffffff82e3e000 R cdce_devs +ffffffff82e3e048 R cdce_ca +ffffffff82e3f000 R urndis_ca +ffffffff82e3f030 R urndis_class +ffffffff82e40000 R mos_devs +ffffffff82e40018 R mos_ca +ffffffff82e41000 R mue_devs +ffffffff82e41020 R mue_ca +ffffffff82e42000 R udav_ca +ffffffff82e42030 r udav_devs +ffffffff82e43000 R upl_ca +ffffffff82e44000 R ugl_ca +ffffffff82e45000 R url_ca +ffffffff82e45030 r url_devs +ffffffff82e46000 R ure_devs +ffffffff82e460e8 R ure_ca +ffffffff82e47000 R uaq_devs +ffffffff82e47018 R uaq_ca +ffffffff82e48000 R umodem_methods +ffffffff82e48040 R umodem_ca +ffffffff82e49000 R uftdi_methods +ffffffff82e49040 R uftdi_ca +ffffffff82e49070 r uftdi_devs +ffffffff82e4a000 R uplcom_methods +ffffffff82e4a040 R uplcom_ca +ffffffff82e4a070 r uplcom_devs +ffffffff82e4b000 R umct_methods +ffffffff82e4b040 R umct_ca +ffffffff82e4b070 r umct_devs +ffffffff82e4c000 R uvscom_methods +ffffffff82e4c040 R uvscom_ca +ffffffff82e4c070 r uvscom_devs +ffffffff82e4d000 R ubsa_methods +ffffffff82e4d040 R ubsa_devs +ffffffff82e4d060 R ubsa_ca +ffffffff82e4e000 R ukspan_ca +ffffffff82e4e028 r ukspan_devs +ffffffff82e4e030 r ukspan_methods +ffffffff82e4f000 R uslcom_methods +ffffffff82e4f040 R uslcom_ca +ffffffff82e4f070 r uslcom_devs +ffffffff82e50000 R uark_methods +ffffffff82e50040 R uark_ca +ffffffff82e50068 r uark_devs +ffffffff82e51000 R moscom_methods +ffffffff82e51040 R moscom_ca +ffffffff82e51068 r moscom_devs +ffffffff82e52000 R umcs_methods +ffffffff82e52040 R umcs_devs +ffffffff82e52050 R umcs_ca +ffffffff82e53000 R uscom_methods +ffffffff82e53040 R uscom_ca +ffffffff82e53068 r uscom_devs +ffffffff82e54000 R ucrcom_methods +ffffffff82e54040 R ucrcom_ca +ffffffff82e55000 R uxrcom_methods +ffffffff82e55040 R uxrcom_ca +ffffffff82e55068 r uxrcom_devs +ffffffff82e56000 R uipaq_methods +ffffffff82e56040 R uipaq_ca +ffffffff82e56070 r uipaq_devs +ffffffff82e57000 R umsm_methods +ffffffff82e57040 R umsm_ca +ffffffff82e57070 r umsm_devs +ffffffff82e58000 R uchcom_methods +ffffffff82e58040 R uchcom_ca +ffffffff82e58068 r uchcom_devs +ffffffff82e58080 r dividers +ffffffff82e59000 R uticom_methods +ffffffff82e59040 R uticom_ca +ffffffff82e59070 r uticom_devs +ffffffff82e5a000 R wi_usb_devs +ffffffff82e5a0f0 R wi_usb_ca +ffffffff82e5b000 R atu_ca +ffffffff82e5c000 R ural_ca +ffffffff82e5c030 r ural_devs +ffffffff82e5c0a0 r ural_rf2522_r2 +ffffffff82e5c0e0 r ural_rf2524_r2 +ffffffff82e5c120 r ural_rf2525_hi_r2 +ffffffff82e5c160 r ural_rf2525_r2 +ffffffff82e5c1a0 r ural_rf2525e_r2 +ffffffff82e5c1e0 r ural_rf2526_hi_r2 +ffffffff82e5c220 r ural_rf2526_r2 +ffffffff82e5c260 r ural_def_bbp +ffffffff82e5c2a0 r ural_def_mac +ffffffff82e5d000 R rum_ca +ffffffff82e5d030 r rum_devs +ffffffff82e5d110 r rum_rf5225 +ffffffff82e5d460 r rum_rf5226 +ffffffff82e5d7b0 r rum_def_bbp +ffffffff82e5d7f0 r rum_def_mac +ffffffff82e5e000 R run_ca +ffffffff82e5e030 r run_devs +ffffffff82e5e430 r rt2860_rf2850 +ffffffff82e5e860 r rt2860_rates +ffffffff82e5e920 r rt5592_freqs_40mhz +ffffffff82e5ea60 r rt5592_freqs_20mhz +ffffffff82e5eba0 r rt5592_2ghz_def_rf +ffffffff82e5ebe0 r rt5592_chan_5ghz +ffffffff82e5ee30 r rt5592_def_bbp +ffffffff82e5ee70 r rt5592_bbp_r196 +ffffffff82e5eed0 r rt5390_def_bbp +ffffffff82e5ef00 r rt3572_def_rf +ffffffff82e5ef40 r rt3070_def_rf +ffffffff82e5ef70 r rt3593_def_rf +ffffffff82e5efb0 r rt5592_def_rf +ffffffff82e5efe0 r rt5392_def_rf +ffffffff82e5f060 r rt5390_def_rf +ffffffff82e5f0e0 r rt2870_def_mac +ffffffff82e60000 R mtw_ca +ffffffff82e60030 r mtw_devs +ffffffff82e60070 r rt2860_rates +ffffffff82e60130 r mt7601_rf_chan +ffffffff82e601a0 r mt7601_def_bbp +ffffffff82e602d0 r mt7601_rf_bank0 +ffffffff82e60330 r mt7601_rf_bank4 +ffffffff82e603b0 r mt7601_rf_bank5 +ffffffff82e60430 r mt7601_def_mac +ffffffff82e61000 R zyd_ca +ffffffff82e61030 r zyd_devs +ffffffff82e611b0 r zyd_rfmd_init.phyini +ffffffff82e612e0 r zyd_rfmd_init.rfini +ffffffff82e61330 r zyd_rfmd_set_channel.rfprog +ffffffff82e613a0 r zyd_al2230_init.phyini +ffffffff82e61480 r zyd_al2230_init.rfini +ffffffff82e614e0 r zyd_al2230_init_b.phyini +ffffffff82e615d0 r zyd_al2230_init_b.rfini +ffffffff82e61620 r zyd_al2230_set_channel.rfprog +ffffffff82e616d0 r zyd_al7230B_init.phyini_1 +ffffffff82e617b0 r zyd_al7230B_init.rfini_1 +ffffffff82e617f0 r zyd_al7230B_set_channel.rfprog +ffffffff82e61860 r zyd_al7230B_set_channel.rfsc +ffffffff82e61890 r zyd_al2210_init.phyini +ffffffff82e618f0 r zyd_al2210_init.rfini +ffffffff82e61920 r zyd_al2210_set_channel.rfprog +ffffffff82e61960 r zyd_gct_init.phyini +ffffffff82e619b0 r zyd_gct_init.rfini +ffffffff82e61a50 r zyd_gct_set_channel.rfprog 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dt_static_vmm_inout +ffffffff831f4b20 D dt_static_smr_call +ffffffff831f4b90 D dt_static_smr_called +ffffffff831f4c00 D dt_static_smr_barrier_enter +ffffffff831f4c70 D dt_static_smr_barrier_exit +ffffffff831f4ce0 D dt_static_smr_wakeup +ffffffff831f4d50 D dt_static_smr_thread +ffffffff831f4dc0 D dt_static_refcnt_none +ffffffff831f4e30 D dt_static_refcnt_ethmulti +ffffffff831f4ea0 D dt_static_refcnt_ifaddr +ffffffff831f4f10 D dt_static_refcnt_ifmaddr +ffffffff831f4f80 D dt_static_refcnt_inpcb +ffffffff831f4ff0 D dt_static_refcnt_rtentry +ffffffff831f5060 D dt_static_refcnt_syncache +ffffffff831f50d0 D dt_static_refcnt_tdb +ffffffff831f6000 D db_next_free_breakpoint +ffffffff831f6008 D db_breakpoints_inserted +ffffffff831f7000 D db_ed_style +ffffffff831f8000 D db_examine_format +ffffffff831f8078 D db_print_format +ffffffff831f9000 D db_history_size +ffffffff831f9008 D db_history_curr +ffffffff831f9010 D db_history_last +ffffffff831fa000 D db_tab_stop_width +ffffffff831fa004 D db_max_line +ffffffff831fa008 D db_max_width +ffffffff831fa00c D db_radix +ffffffff831fb000 D db_lastsym +ffffffff831fb008 D db_maxoff +ffffffff831fc000 D db_vars +ffffffff831fc090 D db_evars +ffffffff831fd000 D db_watchpoints_inserted +ffffffff831fd008 D db_next_free_watchpoint +ffffffff831fe000 D db_log +ffffffff831ff000 D audio_cd +ffffffff831ff020 D audio_lock +ffffffff83200000 D midi_cd +ffffffff83201000 D rnd_cold +ffffffff83201004 D rnd_slowextract +ffffffff83201008 D rnd_timeout +ffffffff83201050 D rndlock +ffffffff83201060 D rndreinit_timeout +ffffffff832010a8 D rnd_task +ffffffff83202000 D video_cd +ffffffff83203000 d rrip_table_analyze +ffffffff832030e0 d rrip_table_getname +ffffffff832031e0 d rrip_table_getsymname +ffffffff83203280 d rrip_table_extref +ffffffff83204000 D nexecs +ffffffff83205000 D elf_note_names +ffffffff83206000 D ncpus +ffffffff83206004 D ncpusfound +ffffffff83207000 D acct_lock +ffffffff83207010 D acctsuspend +ffffffff83207014 D acctresume +ffffffff83207018 D acctrate +ffffffff83208000 D ticks +ffffffff83209000 D fhdlk +ffffffff8320a000 D kqueue_klist_lock +ffffffff8320a010 D kq_timeoutmax +ffffffff8320b000 D stackgap_random +ffffffff8320c000 D nprocesses +ffffffff8320c004 D nthreads +ffffffff8320c008 D fork_tfmrate +ffffffff8320d000 D kthread_q +ffffffff8320e000 D nkmempages +ffffffff8320e008 D malloc_mtx +ffffffff8320e020 D memname +ffffffff8320e4b0 D sysctl_kmemlock +ffffffff8320e4c0 D malloc_errintvl +ffffffff8320f000 D maxdmap +ffffffff8320f008 D maxsmap +ffffffff8320f010 D rlimit_lock +ffffffff83210000 D sched_cost_load +ffffffff83210004 D sched_cost_priority +ffffffff83210008 D sched_cost_runnable +ffffffff8321000c D sched_cost_resident +ffffffff83211000 D intrmap_lock +ffffffff83212000 D nosuidcoredump +ffffffff83212008 D sigio_lock +ffffffff83213000 D smr_lock +ffffffff83213010 D smr_logintvl +ffffffff83214000 D startuphook_list +ffffffff83215000 D sysctl_lock +ffffffff83215010 D sysctl_disklock +ffffffff83215020 d openbsd +ffffffff83215024 d arg_max +ffffffff83215028 d posix_version +ffffffff8321502c d ngroups_max +ffffffff83215030 d int_one +ffffffff83215034 d maxpartitions +ffffffff83215038 d raw_part +ffffffff8321503c D allowpowerdown +ffffffff83215040 D hw_power +ffffffff83215044 d byte_order +ffffffff83215048 d page_size +ffffffff83216000 d thrsleep_queue +ffffffff83216010 d thrsleep_lock +ffffffff83217000 D tc_lock +ffffffff83217010 D windup_mtx +ffffffff83217020 d dummy_timecounter +ffffffff83217070 D timecounter +ffffffff83217078 D time_second +ffffffff83217080 d timehands +ffffffff83217088 d th0 +ffffffff83217120 d th1 +ffffffff83218000 D itimer_mtx +ffffffff83218010 D ratecheck_mtx +ffffffff83218020 D ppsratecheck_mtx +ffffffff83218030 D resettodr_to +ffffffff83218078 D resettodr_task +ffffffff83219000 D timeout_mutex +ffffffff8321a000 D wdog_auto +ffffffff8321b000 D taskq_sys +ffffffff8321b050 D taskq_sys_mp +ffffffff8321c000 d update_loadavg.to +ffffffff8321c048 D ccpu +ffffffff8321c050 d schedcpu.to +ffffffff8321c098 D perflevel +ffffffff8321c09c D perfpolicy +ffffffff8321c0a0 D setperf_to +ffffffff8321d000 D autoconf_attdet_mtx +ffffffff8321d010 D msgs +ffffffff8321e000 d evcount_list +ffffffff8321e010 d evcount_percpu_init_list +ffffffff8321f000 D syslogf_rwlock +ffffffff8321f010 D log_mtx +ffffffff8321f020 D logstash_in +ffffffff8321f028 D logstash_out +ffffffff8321f030 D logstash_rwlock +ffffffff83220000 D pool_head +ffffffff83220010 D pool_lock +ffffffff83220020 D pool_debug +ffffffff83220028 D pool_allocator_single +ffffffff83220040 D pool_allocator_multi +ffffffff83220058 D pool_allocator_multi_ni +ffffffff83220070 D pool_gc_tick +ffffffff832200b8 D pool_gc_task +ffffffff83221000 D kprintf_mutex +ffffffff83221010 D db_panic +ffffffff83221014 D splassert_ctl +ffffffff83221018 D v_putc +ffffffff83221020 D printf_flags +ffffffff83222000 D userconf_base +ffffffff83222004 D userconf_maxdev +ffffffff83222008 D userconf_totdev +ffffffff8322200c D userconf_maxlocnames +ffffffff83222010 D userconf_cnt +ffffffff83222014 D userconf_lines +ffffffff83222018 D userconf_histsz +ffffffff83222020 D userconf_cmds +ffffffff83223000 D ftlock +ffffffff83224000 d ppollcollect.poll_errintvl +ffffffff83225000 D ttydefchars +ffffffff83225014 D ttclos +ffffffff8322501b D ttopen +ffffffff83225022 D ttybg +ffffffff83225028 D ttyin +ffffffff8322502e D ttyout +ffffffff83225038 D ttylist_lock +ffffffff83226000 D linesw +ffffffff83226280 D nlinesw +ffffffff83227000 D pt_softc_lock +ffffffff83228000 d mbstat_boot_boot_cpumem +ffffffff83228080 D mbstat +ffffffff83228090 D mclsizes +ffffffff832280b0 D m_extref_mtx +ffffffff832280c0 D m_pool_allocator +ffffffff83229000 D somaxconn +ffffffff83229004 D sominconn +ffffffff83229008 D sosplice_lock +ffffffff8322a000 D sb_max +ffffffff8322b000 D unp_df_lock +ffffffff8322b010 D unp_gc_lock +ffffffff8322b020 D unp_rights_mtx +ffffffff8322b030 D unp_ino_mtx +ffffffff8322b040 D unp_gc_task +ffffffff8322b070 D unpst_sendspace +ffffffff8322b074 D unpst_recvspace +ffffffff8322b078 D unpsq_sendspace +ffffffff8322b07c D unpsq_recvspace +ffffffff8322b080 D unpdg_sendspace +ffffffff8322b084 D unpdg_recvspace +ffffffff8322c000 D doingcache +ffffffff8322d000 D maxvfsconf +ffffffff8322d010 d vfsconflist +ffffffff8322e000 D lockf_lock +ffffffff8322e010 D maxlocksperuid +ffffffff8322f000 D iftovt_tab +ffffffff8322f040 D vttoif_tab +ffffffff8322f064 D suid_clear +ffffffff8322f068 D vnode_mtx +ffffffff8322f078 D vfs_stall_lock +ffffffff8322f090 D vtypes +ffffffff8322f0e0 D vtags +ffffffff83230000 D syncer_maxdelay +ffffffff83230004 D syncdelay +ffffffff83231000 D dosdirtemplate +ffffffff83232000 D ntfs_hashlock +ffffffff83233000 D ntfs_toupper_lock +ffffffff83234000 D art_table_gc_mtx +ffffffff83234010 D art_table_gc_task +ffffffff83234040 D art_node_gc_mtx +ffffffff83234050 D art_node_gc_task +ffffffff83235000 D bpf_bufsize +ffffffff83235004 D bpf_maxbufsize +ffffffff83235008 D bpf_sysctl_lk +ffffffff83236000 D ifg_head +ffffffff83236010 D if_cloners_lock +ffffffff83236020 D if_input_task_locked +ffffffff83236050 D netlock +ffffffff83236060 D ifnetlist +ffffffff83237000 D ifiq_maxlen_drop +ffffffff83237004 D ifiq_maxlen_return +ffffffff83238000 D etherbroadcastaddr +ffffffff83238006 D ether_ipmulticast_min +ffffffff8323800c D ether_ipmulticast_max +ffffffff83238012 D ether_ip6multicast_min +ffffffff83238018 D ether_ip6multicast_max +ffffffff83239000 D etherip_cloner +ffffffff83239030 D etherip_list +ffffffff8323a000 D loop_cloner +ffffffff8323b000 D ifmedia_mtx +ffffffff8323c000 D ppp_compressors +ffffffff8323c020 D ppp_cloner +ffffffff8323d000 D ppp_pkt_init +ffffffff8323e000 D ppp_bsd_compress +ffffffff8323f000 D ppp_deflate +ffffffff8323f070 D ppp_deflate_draft +ffffffff83240000 D tun_cloner +ffffffff83240030 D tap_cloner +ffffffff83241000 D bridgeintrq +ffffffff83241038 D bridge_cloner +ffffffff83242000 d veb_cloner +ffffffff83242030 d vport_cloner +ffffffff83243000 D vlan_tagh_lk +ffffffff83243010 D vlan_cloner +ffffffff83243040 D svlan_cloner +ffffffff83244000 D pipex_list_mtx +ffffffff83244010 D pipex_prune +ffffffff83244018 D pipexoutq +ffffffff83244050 d SHAPad2 +ffffffff83245000 D rtmap_gc +ffffffff83245018 D rt_rc +ffffffff83246000 D rt_labels +ffffffff83246010 D rtlabel_mtx +ffffffff83247000 D enc_cloner +ffffffff83248000 D gre_cloner +ffffffff83248030 D gre_list +ffffffff83248040 D mgre_cloner +ffffffff83248070 D egre_cloner +ffffffff832480a0 D nvgre_cloner +ffffffff832480d0 D eoip_cloner +ffffffff83249000 D trunk_cloner +ffffffff8324a000 d aggr_cloner +ffffffff8324b000 d tpmr_cloner +ffffffff8324c000 D mpe_cloner +ffffffff8324d000 D mpw_cloner +ffffffff8324e000 D mpip_cloner +ffffffff8324f000 d bpe_cloner +ffffffff8324f030 d bpe_lock +ffffffff83250000 D vether_cloner +ffffffff83251000 D pair_cloner +ffffffff83252000 d vxlan_cloner +ffffffff83252030 d vxlan_lock +ffffffff83252040 d vxlan_teps +ffffffff83253000 D underload_interval +ffffffff83253010 D wg_cloner +ffffffff83254000 d stoeplitz_keyseed +ffffffff83255000 D ieee80211_cache_size +ffffffff83256000 D arpt_prune +ffffffff83256004 D arpt_keep +ffffffff83256008 D arpt_down +ffffffff83256010 D arpinq +ffffffff83256048 D arp_mtx +ffffffff83256058 D arp_maxtries +ffffffff83257000 D ipport_firstauto +ffffffff83257004 D ipport_lastauto +ffffffff83257008 D ipport_hifirstauto +ffffffff8325700c D ipport_hilastauto +ffffffff83258000 D divert_sendspace +ffffffff83258004 D divert_recvspace +ffffffff83258008 D divbhashsize +ffffffff83259000 D icmptstamprepl +ffffffff83259004 D icmperrppslim +ffffffff83259008 D icmp_redirtimeout +ffffffff8325a000 D ipsendredirects +ffffffff8325a004 D ip_defttl +ffffffff8325a008 D ip_mtudisc +ffffffff8325a00c D ip_mtudisc_timeout +ffffffff8325a010 D ipq_mutex +ffffffff8325a020 D ip_maxqueue +ffffffff8325a028 D ipintrq +ffffffff8325a060 d ipsend_task +ffffffff8325a090 d ipsendraw_task +ffffffff8325b000 D ip_mrtproto +ffffffff8325b004 d sin +ffffffff8325c000 D rip_sendspace +ffffffff8325c008 D rip_recvspace +ffffffff8325d000 D tcprexmtthresh +ffffffff8325d004 D tcptv_keep_init +ffffffff8325d008 D tcp_rst_ppslim +ffffffff8325d00c D tcp_ackdrop_ppslim +ffffffff8325d010 D tcp_syn_hash_size +ffffffff8325d014 D tcp_syn_cache_limit +ffffffff8325d018 D tcp_syn_bucket_limit +ffffffff8325d01c D tcp_syn_use_limit +ffffffff8325d020 D syn_cache_mtx +ffffffff8325e000 D tcp_outflags +ffffffff8325f000 D tcp_timer_mtx +ffffffff8325f010 D tcp_mssdflt +ffffffff8325f014 D tcp_rttdflt +ffffffff8325f018 D tcp_do_rfc1323 +ffffffff8325f01c D tcp_do_sack +ffffffff8325f020 D tcp_do_rfc3390 +ffffffff8325f024 D tcp_do_tso +ffffffff8325f028 D tcp_reass_limit +ffffffff8325f02c D tcp_sackhole_limit +ffffffff83260000 D tcp_backoff +ffffffff83260034 D tcp_totbackoff +ffffffff83261000 D tcp_sendspace +ffffffff83261004 D tcp_recvspace +ffffffff83261008 D tcp_autorcvbuf_inc +ffffffff83262000 D udpcksum +ffffffff83262004 D udp_sendspace +ffffffff83262008 D udp_recvspace +ffffffff83263000 D ipsec_flows_mtx +ffffffff83263010 D ipsec_ids_idle +ffffffff83263014 D ipsec_ids_next_flow +ffffffff83263018 D ipsec_policy_head +ffffffff83263028 D ipsp_ids_gc_timeout +ffffffff83263070 D tdb_sadb_mtx +ffffffff83263080 d tdb_hashmask +ffffffff83264000 D ipo_tdb_mtx +ffffffff83264010 D ipsec_acquire_mtx +ffffffff83264020 D ipsec_acquire_head +ffffffff83265000 D ipsec_keep_invalid +ffffffff83265004 D ipsec_require_pfs +ffffffff83265008 D ipsec_soft_timeout +ffffffff8326500c D ipsec_exp_timeout +ffffffff83265010 D ipsec_soft_first_use +ffffffff83265014 D ipsec_exp_first_use +ffffffff83265018 D ipsec_expire_acquire +ffffffff8326501c D esp_enable +ffffffff83265020 D ah_enable +ffffffff83266000 D udpencap_enable +ffffffff83266004 D udpencap_port +ffffffff83267000 D carp_vh_rc +ffffffff83267020 D carp_sc_rc +ffffffff83267040 D carp_opts +ffffffff83267058 D carp_cloner +ffffffff83267088 d carp_send_na.mcast ffffffff83268000 d PADDING -ffffffff83269000 d weak_keys -ffffffff8326a000 D swcr_id -ffffffff8326b000 D window_inflate -ffffffff8326b004 D window_deflate -ffffffff8326c000 D ghash_update -ffffffff8326d000 D mpls_defttl -ffffffff8326d004 D mpls_mapttl_ip -ffffffff8326e000 D nfskevq_lock -ffffffff8326f000 D nfs_backoff -ffffffff8326f020 D nfs_ptimers -ffffffff83270000 D desirednfsrvcache -ffffffff83270010 D nonidempotent -ffffffff83270070 D nfsv2_repstat -ffffffff83271000 D nfsv2_type -ffffffff83271030 D nfsv3_type -ffffffff83271060 D nv2tov_type -ffffffff83271080 D nv3tov_type -ffffffff832710a0 D nfsv3_procid -ffffffff83271100 D nfsv2_procid -ffffffff8327115c d nfsv3err_getattr -ffffffff83271170 d nfsv3err_setattr -ffffffff83271190 d nfsv3err_lookup -ffffffff832711a4 d nfsv3err_access -ffffffff832711b0 d nfsv3err_readlink -ffffffff832711d0 d nfsv3err_read -ffffffff832711f0 d nfsv3err_write -ffffffff83271210 d nfsv3err_create -ffffffff83271230 d nfsv3err_mkdir -ffffffff83271250 d nfsv3err_symlink -ffffffff83271270 d nfsv3err_mknod -ffffffff83271290 d nfsv3err_remove -ffffffff832712b0 d nfsv3err_rmdir -ffffffff832712d0 d nfsv3err_rename -ffffffff83271300 d nfsv3err_link -ffffffff83271330 d nfsv3err_readdir -ffffffff83271350 d nfsv3err_readdirplus -ffffffff83271366 d nfsv3err_fsstat -ffffffff83271372 d nfsv3err_fsinfo -ffffffff8327137c d nfsv3err_pathconf -ffffffff83271386 d nfsv3err_commit -ffffffff83272000 D nfsrv3_procs -ffffffff832720b8 D nfs_niothreads -ffffffff83273000 D fragtbl -ffffffff83274000 D ffs_vtbl -ffffffff83275000 D dirchk -ffffffff83276000 D desireddquot -ffffffff83277000 D amap_list_lock -ffffffff83278000 d uao_list_lock -ffffffff83279000 d uvmexp_countersboot_boot_cpumem -ffffffff832790c0 D uvmexp_counters -ffffffff832790c8 D vm_min_kernel_address -ffffffff8327a000 D no_constraint -ffffffff8327b000 d uvm_kmapent_warn_rate -ffffffff8327c000 D maxslp -ffffffff8327d000 D uvmpagerops -ffffffff8327e000 D uvm_swap_data_lock -ffffffff8327e010 D swap_syscall_lock -ffffffff8327e020 D oommtx -ffffffff8327f000 D uvm_doswapencrypt -ffffffff83280000 D gif_list -ffffffff83280010 D gif_cloner -ffffffff83281000 d sec_cloner -ffffffff83281030 d sec_tdb_gc_mtx -ffffffff83281040 d sec_tdb_gc_task -ffffffff83282000 D divert6_sendspace -ffffffff83282004 D divert6_recvspace -ffffffff83282008 D divb6hashsize -ffffffff83283000 d in6_get_hw_ifid.allone -ffffffff83284000 D ip6_sendredirects -ffffffff83284004 D ip6_defhlim -ffffffff83284008 D ip6_defmcasthlim -ffffffff8328400c D ip6_maxfragpackets -ffffffff83284010 D ip6_maxfrags -ffffffff83284014 D ip6_log_interval -ffffffff83284018 D ip6_hdrnestlimit -ffffffff8328401c D ip6_dad_count -ffffffff83284020 D ip6_auto_flowlabel -ffffffff83284024 D ip6_use_deprecated -ffffffff83284028 D ip6_neighborgcthresh -ffffffff8328402c D ip6_maxdynroutes -ffffffff83284030 D rip6_sendspace -ffffffff83284038 D rip6_recvspace -ffffffff83284040 D icmp6_redirtimeout -ffffffff83284044 D icmp6errppslim -ffffffff83284048 D ip6_mtudisc_timeout -ffffffff83285000 D frag6_mutex -ffffffff83286000 d icmp6_mtudisc_hiwat -ffffffff83286004 d icmp6_mtudisc_lowat -ffffffff83287000 d randomtab_20 -ffffffff83288000 D ip6intrq -ffffffff83288038 d ip6send_task -ffffffff83289000 D nd6_timer_next -ffffffff83289008 D nd6_expire_next -ffffffff83289010 D nd6_delay -ffffffff83289014 D nd6_umaxtries -ffffffff83289018 D nd6_mmaxtries -ffffffff8328901c D nd6_gctimer -ffffffff83289020 D nd6_maxndopt -ffffffff83289028 D nd6_mtx -ffffffff83289038 D nd6_list -ffffffff8328a000 d dadq -ffffffff8328b000 D pfkeyv2_mtx -ffffffff8328b010 d pfkeyv2_seq -ffffffff8328c000 D sadb_exts_allowed_in -ffffffff8328c090 D sadb_exts_required_in -ffffffff8328d000 D cold -ffffffff8328e000 D bdevsw -ffffffff8328e460 D nblkdev -ffffffff8328e470 D cdevsw -ffffffff83290400 D nchrdev -ffffffff83290404 D mem_no -ffffffff83290408 D swapdev -ffffffff83290410 D constab -ffffffff83291000 D machine -ffffffff83291008 D cpu_idle_cycle_fcn -ffffffff83291010 D lid_action -ffffffff83291014 D pwr_action -ffffffff83291018 D isa_constraint -ffffffff83291028 D dma_constraint -ffffffff83291040 D uvm_md_constraints -ffffffff83291058 D delay_func -ffffffff83291060 D initclock_func -ffffffff83291068 D startclock_func -ffffffff83291070 D bootinfo_size -ffffffff83291074 D waittime -ffffffff83291078 D dumpmag -ffffffff83292000 D tsc_rdtsc -ffffffff83292008 D tsc_timecounter -ffffffff83292058 D tsc_is_synchronized -ffffffff83293000 D local_apic -ffffffff83293020 D lapic_id -ffffffff83293080 D lapic_tpr -ffffffff832930a0 d lapic_ppr -ffffffff83293100 d lapic_isr -ffffffff83294000 D warn_once -ffffffff83295000 d errata -ffffffff83296000 D cpu_ucode_mtx -ffffffff83297000 D mem_owner_bios -ffffffff83297008 D mrops -ffffffff83297028 D mtrrmask -ffffffff83297030 D mtrrtomrt -ffffffff83298000 D pmap_pg_wc -ffffffff83298008 D pmaps_lock -ffffffff83298018 d pmap_maxkvaddr -ffffffff83299000 D kv_physwait -ffffffff8329a000 D fpu_save_len -ffffffff8329b000 D i8259_pic -ffffffff8329c000 D softintr_pic -ffffffff8329d000 D ipifunc -ffffffff8329e000 D setperf_mp_mutex -ffffffff8329f000 D db_Grp6 -ffffffff8329f040 D db_Grp7 -ffffffff8329f100 D db_Grp8 -ffffffff8329f140 D db_Grp9 -ffffffff8329f200 D db_GrpA -ffffffff8329f240 D db_GrpB -ffffffff8329f280 D db_GrpC -ffffffff8329f2c0 D db_inst_0f0x -ffffffff8329f440 D db_inst_0f2x -ffffffff8329f5c0 D db_inst_0f3x -ffffffff8329f740 D db_inst_0f8x -ffffffff8329f8c0 D db_inst_0f9x -ffffffff8329fa40 D db_inst_0fax -ffffffff8329fbc0 D db_inst_0fbx -ffffffff8329fd40 D db_inst_0fcx -ffffffff8329fec0 D db_inst_0f -ffffffff8329ff40 D db_Esc92 -ffffffff8329ff80 D db_Esc94 -ffffffff8329ffc0 D db_Esc95 -ffffffff832a0000 D db_Esc96 -ffffffff832a0040 D db_Esc97 -ffffffff832a0080 D db_Esca5 -ffffffff832a00c0 D db_Escb4 -ffffffff832a0100 D db_Esce3 -ffffffff832a0140 D db_Escf4 -ffffffff832a0180 D db_Esc8 -ffffffff832a0240 D db_Esc9 -ffffffff832a0300 D db_Esca -ffffffff832a03c0 D db_Escb -ffffffff832a0480 D db_Escc -ffffffff832a0540 D db_Escd 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-ffffffff83673000 B fpu_mxcsr_mask -ffffffff83673008 B xsave_mask -ffffffff83674000 B x86_soft_intrs -ffffffff83675000 B i8259_imen -ffffffff83676000 B intr_shared_edge -ffffffff83676008 B fake_softclock_intrhand -ffffffff83676078 B fake_softnet_intrhand -ffffffff836760e8 B fake_softtty_intrhand -ffffffff83676158 B fake_timer_intrhand -ffffffff836761c8 B fake_ipi_intrhand -ffffffff83676238 B fake_xen_intrhand -ffffffff836762a8 B fake_hyperv_intrhand -ffffffff83677000 B atdevbase -ffffffff83677010 b ioport_ex_storage -ffffffff836772e0 B ioport_ex -ffffffff836772f0 b iomem_ex_storage -ffffffff836775c0 B iomem_ex -ffffffff836775c8 b ioport_malloc_safe -ffffffff83678000 B mp_perflevel -ffffffff83678008 B ul_setperf -ffffffff83679000 B cn_tab -ffffffff8367a000 B ddb_mp_mutex -ffffffff8367a010 B ddb_state -ffffffff8367a018 B ddb_regs -ffffffff8367a0c8 B db_switch_cpu -ffffffff8367a0d0 B db_switch_to_cpu -ffffffff8367a0d8 B ddb_active_cpu -ffffffff8367b000 B rtclock_tval -ffffffff8367b008 B i8254_ticked -ffffffff8367b00c B i8254_offset -ffffffff8367b010 B i8254_lastcount -ffffffff8367b018 b rtcstart.rtcdrain_timeout -ffffffff8367b060 B rtc_update_century -ffffffff8367b068 B rtc_todr -ffffffff8367c000 B k8pnow_current_state -ffffffff8367d000 B bus_clock -ffffffff8367d008 b est_fqlist -ffffffff8367e000 B k1x_current_state -ffffffff8367f000 B rotatedfonts -ffffffff8367f008 B rasops_framebuffers -ffffffff83680000 b stamp_attr -ffffffff83680010 b stamp +ffffffff83269000 d PADDING +ffffffff8326a000 d weak_keys +ffffffff8326b000 D swcr_id +ffffffff8326c000 D window_inflate +ffffffff8326c004 D window_deflate +ffffffff8326d000 D ghash_update +ffffffff8326e000 D mpls_defttl +ffffffff8326e004 D mpls_mapttl_ip +ffffffff8326f000 D nfskevq_lock +ffffffff83270000 D nfs_backoff +ffffffff83270020 D nfs_ptimers +ffffffff83271000 D desirednfsrvcache +ffffffff83271010 D nonidempotent +ffffffff83271070 D nfsv2_repstat +ffffffff83272000 D nfsv2_type +ffffffff83272030 D nfsv3_type +ffffffff83272060 D nv2tov_type +ffffffff83272080 D nv3tov_type +ffffffff832720a0 D nfsv3_procid +ffffffff83272100 D nfsv2_procid +ffffffff8327215c d nfsv3err_getattr +ffffffff83272170 d nfsv3err_setattr +ffffffff83272190 d nfsv3err_lookup +ffffffff832721a4 d nfsv3err_access +ffffffff832721b0 d nfsv3err_readlink +ffffffff832721d0 d nfsv3err_read +ffffffff832721f0 d nfsv3err_write +ffffffff83272210 d nfsv3err_create +ffffffff83272230 d nfsv3err_mkdir +ffffffff83272250 d nfsv3err_symlink +ffffffff83272270 d nfsv3err_mknod +ffffffff83272290 d nfsv3err_remove +ffffffff832722b0 d nfsv3err_rmdir +ffffffff832722d0 d nfsv3err_rename +ffffffff83272300 d nfsv3err_link +ffffffff83272330 d nfsv3err_readdir +ffffffff83272350 d nfsv3err_readdirplus +ffffffff83272366 d nfsv3err_fsstat +ffffffff83272372 d nfsv3err_fsinfo +ffffffff8327237c d nfsv3err_pathconf +ffffffff83272386 d nfsv3err_commit +ffffffff83273000 D nfsrv3_procs +ffffffff832730b8 D nfs_niothreads +ffffffff83274000 D fragtbl +ffffffff83275000 D ffs_vtbl +ffffffff83276000 D dirchk +ffffffff83277000 D desireddquot +ffffffff83278000 D amap_list_lock +ffffffff83279000 d uao_list_lock +ffffffff8327a000 d uvmexp_countersboot_boot_cpumem +ffffffff8327a0c0 D uvmexp_counters +ffffffff8327a0c8 D vm_min_kernel_address +ffffffff8327b000 D no_constraint +ffffffff8327c000 d uvm_kmapent_warn_rate +ffffffff8327d000 D maxslp +ffffffff8327e000 D uvmpagerops +ffffffff8327f000 D uvm_swap_data_lock +ffffffff8327f010 D swap_syscall_lock +ffffffff8327f020 D oommtx +ffffffff83280000 D uvm_doswapencrypt +ffffffff83281000 D gif_list +ffffffff83281010 D gif_cloner +ffffffff83282000 d sec_cloner +ffffffff83282030 d sec_tdb_gc_mtx +ffffffff83282040 d sec_tdb_gc_task +ffffffff83283000 D divert6_sendspace +ffffffff83283004 D divert6_recvspace +ffffffff83283008 D divb6hashsize +ffffffff83284000 d in6_get_hw_ifid.allone +ffffffff83285000 D ip6_sendredirects +ffffffff83285004 D ip6_defhlim +ffffffff83285008 D ip6_defmcasthlim +ffffffff8328500c D ip6_maxfragpackets +ffffffff83285010 D ip6_maxfrags +ffffffff83285014 D ip6_log_interval +ffffffff83285018 D ip6_hdrnestlimit +ffffffff8328501c D ip6_dad_count +ffffffff83285020 D ip6_auto_flowlabel +ffffffff83285024 D ip6_use_deprecated +ffffffff83285028 D ip6_neighborgcthresh +ffffffff8328502c D ip6_maxdynroutes +ffffffff83285030 D rip6_sendspace +ffffffff83285038 D rip6_recvspace +ffffffff83285040 D icmp6_redirtimeout +ffffffff83285044 D icmp6errppslim +ffffffff83285048 D ip6_mtudisc_timeout +ffffffff83286000 D frag6_mutex +ffffffff83287000 d icmp6_mtudisc_hiwat +ffffffff83287004 d icmp6_mtudisc_lowat +ffffffff83288000 d randomtab_20 +ffffffff83289000 D ip6intrq +ffffffff83289038 d ip6send_task +ffffffff8328a000 D nd6_timer_next +ffffffff8328a008 D nd6_expire_next +ffffffff8328a010 D nd6_delay +ffffffff8328a014 D nd6_umaxtries +ffffffff8328a018 D nd6_mmaxtries +ffffffff8328a01c D nd6_gctimer +ffffffff8328a020 D nd6_maxndopt +ffffffff8328a028 D nd6_mtx +ffffffff8328a038 D nd6_list +ffffffff8328b000 d dadq +ffffffff8328c000 D pfkeyv2_mtx +ffffffff8328c010 d pfkeyv2_seq +ffffffff8328d000 D sadb_exts_allowed_in +ffffffff8328d090 D sadb_exts_required_in +ffffffff8328e000 D cold +ffffffff8328f000 D bdevsw +ffffffff8328f460 D nblkdev +ffffffff8328f470 D cdevsw +ffffffff83291400 D nchrdev +ffffffff83291404 D mem_no +ffffffff83291408 D swapdev +ffffffff83291410 D constab +ffffffff83292000 D machine +ffffffff83292008 D cpu_idle_cycle_fcn +ffffffff83292010 D lid_action +ffffffff83292014 D pwr_action +ffffffff83292018 D isa_constraint +ffffffff83292028 D dma_constraint +ffffffff83292040 D uvm_md_constraints +ffffffff83292058 D delay_func +ffffffff83292060 D initclock_func +ffffffff83292068 D startclock_func +ffffffff83292070 D bootinfo_size +ffffffff83292074 D waittime +ffffffff83292078 D dumpmag +ffffffff83293000 D tsc_rdtsc +ffffffff83293008 D tsc_timecounter +ffffffff83293058 D tsc_is_synchronized +ffffffff83294000 D local_apic +ffffffff83294020 D lapic_id +ffffffff83294080 D lapic_tpr +ffffffff832940a0 d lapic_ppr +ffffffff83294100 d lapic_isr +ffffffff83295000 D warn_once +ffffffff83296000 d errata +ffffffff83297000 D cpu_ucode_mtx +ffffffff83298000 D mem_owner_bios +ffffffff83298008 D mrops +ffffffff83298028 D mtrrmask +ffffffff83298030 D mtrrtomrt +ffffffff83299000 D pmap_pg_wc +ffffffff83299008 D pmaps_lock +ffffffff83299018 d pmap_maxkvaddr +ffffffff8329a000 D kv_physwait +ffffffff8329b000 D fpu_save_len +ffffffff8329c000 D i8259_pic +ffffffff8329d000 D softintr_pic +ffffffff8329e000 D ipifunc +ffffffff8329f000 D setperf_mp_mutex +ffffffff832a0000 D db_Grp6 +ffffffff832a0040 D db_Grp7 +ffffffff832a0100 D db_Grp8 +ffffffff832a0140 D db_Grp9 +ffffffff832a0200 D db_GrpA +ffffffff832a0240 D db_GrpB +ffffffff832a0280 D db_GrpC +ffffffff832a02c0 D db_inst_0f0x +ffffffff832a0440 D db_inst_0f2x +ffffffff832a05c0 D db_inst_0f3x +ffffffff832a0740 D db_inst_0f8x +ffffffff832a08c0 D db_inst_0f9x +ffffffff832a0a40 D db_inst_0fax +ffffffff832a0bc0 D db_inst_0fbx +ffffffff832a0d40 D db_inst_0fcx +ffffffff832a0ec0 D db_inst_0f +ffffffff832a0f40 D db_Esc92 +ffffffff832a0f80 D db_Esc94 +ffffffff832a0fc0 D db_Esc95 +ffffffff832a1000 D db_Esc96 +ffffffff832a1040 D db_Esc97 +ffffffff832a1080 D db_Esca5 +ffffffff832a10c0 D db_Escb4 +ffffffff832a1100 D db_Esce3 +ffffffff832a1140 D db_Escf4 +ffffffff832a1180 D db_Esc8 +ffffffff832a1240 D db_Esc9 +ffffffff832a1300 D db_Esca +ffffffff832a13c0 D db_Escb +ffffffff832a1480 D db_Escc +ffffffff832a1540 D db_Escd +ffffffff832a1600 D db_Esce +ffffffff832a16c0 D db_Escf +ffffffff832a1780 D db_Esc_inst +ffffffff832a17c0 D db_Grp1 +ffffffff832a1800 D db_Grp2 +ffffffff832a1840 D db_Grp3 +ffffffff832a1900 D db_Grp4 +ffffffff832a19c0 D db_Grp5 +ffffffff832a1a80 D db_inst_table +ffffffff832a3280 D db_bad_inst +ffffffff832a32a0 D db_index_reg_16 +ffffffff832a32e0 D db_reg +ffffffff832a34e0 D db_seg_reg +ffffffff832a3520 D db_lengths +ffffffff832a4000 D db_regs +ffffffff832a41e0 D db_eregs +ffffffff832a41f0 D db_reg_args +ffffffff832a5000 D timer_mutex +ffffffff832a5010 d i8254_timecounter +ffffffff832a6000 D spleen8x16 +ffffffff832a6058 D spleen12x24 +ffffffff832a60b0 D spleen16x32 +ffffffff832a6108 D spleen32x64 +ffffffff832a6160 d builtin_fonts +ffffffff832a61e0 d wsfont_add.cookiegen +ffffffff832a61f0 d spleen8x16_data +ffffffff832a6ff0 d spleen12x24_data +ffffffff832a99f0 d spleen16x32_data +ffffffff832ad1f0 d spleen32x64_data +ffffffff832bc000 D nsphy_cd +ffffffff832bd000 D nsphyter_cd +ffffffff832be000 D gentbi_cd +ffffffff832bf000 D qsphy_cd +ffffffff832c0000 D inphy_cd +ffffffff832c1000 D iophy_cd +ffffffff832c2000 D eephy_cd +ffffffff832c3000 D exphy_cd +ffffffff832c4000 D rlphy_cd +ffffffff832c5000 D lxtphy_cd +ffffffff832c6000 D luphy_cd +ffffffff832c7000 D mtdphy_cd +ffffffff832c8000 D icsphy_cd +ffffffff832c9000 D sqphy_cd +ffffffff832ca000 D tqphy_cd +ffffffff832cb000 D ukphy_cd +ffffffff832cc000 D dcphy_cd +ffffffff832cd000 D bmtphy_cd +ffffffff832ce000 D brgphy_cd +ffffffff832cf000 D xmphy_cd +ffffffff832d0000 D amphy_cd +ffffffff832d1000 D acphy_cd +ffffffff832d2000 D nsgphy_cd +ffffffff832d3000 D urlphy_cd +ffffffff832d4000 D rgephy_cd +ffffffff832d5000 D ciphy_cd +ffffffff832d6000 D ipgphy_cd +ffffffff832d7000 D etphy_cd +ffffffff832d8000 D jmphy_cd +ffffffff832d9000 D atphy_cd +ffffffff832da000 D scsi_autoconf +ffffffff832da008 D scsibus_cd +ffffffff832db000 D cd_cd +ffffffff832dc000 D ch_cd +ffffffff832dc020 D chquirks +ffffffff832dd000 D sd_cd +ffffffff832de000 D st_cd +ffffffff832df000 D uk_cd +ffffffff832e0000 D safte_cd +ffffffff832e1000 D ses_cd +ffffffff832e2000 D sym_cd +ffffffff832e2020 D sym_devices +ffffffff832e2070 D asym_devices +ffffffff832e3000 D rdac_cd +ffffffff832e3020 D rdac_devices +ffffffff832e4000 D emc_cd +ffffffff832e4020 D emc_devices +ffffffff832e5000 D hds_cd +ffffffff832e5020 D hds_devices +ffffffff832e6000 D atapiscsi_cd +ffffffff832e7000 D wd_cd +ffffffff832e7020 d wddumpmulti +ffffffff832e8000 D mainbus_cd +ffffffff832e8020 D mba_iba +ffffffff832e9000 D bios_cd +ffffffff832e9020 D smbios_uninfo +ffffffff832ea000 D mpbios_cd +ffffffff832ea020 d mp_conf +ffffffff832ea070 d extint_bus +ffffffff832ea0a0 d smi_bus +ffffffff832ea0d0 d nmi_bus +ffffffff832eb000 D need_retpoline +ffffffff832ec000 D cpu_info_full_primary +ffffffff832ef000 D cpu_info_list +ffffffff832ef008 D mp_cpu_funcs +ffffffff832ef020 D cpu_cd +ffffffff832ef040 D cpu_info +ffffffff832f0000 D local_pic +ffffffff832f0098 D lapic_readreg +ffffffff832f00a0 D lapic_writereg +ffffffff832f00a8 D x86_ipi +ffffffff832f1000 D ioapic_cold +ffffffff832f1008 D ioapic_cd +ffffffff832f2000 D efifb_std_descr +ffffffff832f2030 D efifb_descrs +ffffffff832f2038 D efifb_accessops +ffffffff832f2098 D efifb_cd +ffffffff832f3000 D pvbus_cd +ffffffff832f3020 D pvbus_types +ffffffff832f30e0 D pvbus_dma_tag +ffffffff832f4000 D pvclock_cd +ffffffff832f4020 D pvclock_timecounter +ffffffff832f5000 D vmt_tclo_rpc +ffffffff832f50d0 D vmt_cd +ffffffff832f6000 D xen_cd +ffffffff832f6020 D xen_bus_dma_tag +ffffffff832f7000 D xnf_cd +ffffffff832f8000 D xbf_cd +ffffffff832f9000 D hv_msg_dispatch +ffffffff832f9110 D hv_timecounter +ffffffff832f9160 D hyperv_cd +ffffffff832fa000 d hv_ic_devs +ffffffff832fb000 D hvn_cd +ffffffff832fc000 D hvs_cd +ffffffff832fd000 D virtio_cd +ffffffff832fe000 D vio_cd +ffffffff832ff000 D vioblk_cd +ffffffff83300000 D viomb_cd +ffffffff83301000 D viornd_cd +ffffffff83302000 D vioscsi_cd +ffffffff83303000 D vmmci_cd +ffffffff83304000 D pci_cd +ffffffff83305000 D arc_fw_hdr +ffffffff83305008 D arc_cd +ffffffff83306000 D jmb_cd +ffffffff83307000 D mfii_cd +ffffffff83308000 D ips_cd +ffffffff83309000 D eap_cd +ffffffff8330a000 D auacer_cd +ffffffff8330b000 D auich_cd +ffffffff8330c000 D azalia_cd +ffffffff8330d000 D envy_cd +ffffffff8330d020 D envy_matchids +ffffffff8330d030 D envy_rates +ffffffff8330d0b0 D ak4524_dac +ffffffff8330d0d8 D ak4524_adc +ffffffff8330d100 D ak4358_dac +ffffffff8330d128 D ak5365_adc +ffffffff8330d150 D unkenvy_codec +ffffffff8330d180 D envy_cards +ffffffff8330d3f0 D envy_cards_ht +ffffffff8330d600 d julia_eeprom +ffffffff8330e000 D emu_cd +ffffffff8330f000 D auixp_cd +ffffffff83310000 D clcs_cd +ffffffff83311000 D yds_cd +ffffffff83312000 D auvia_cd +ffffffff83313000 D qle_cd +ffffffff83314000 D mpii_cd +ffffffff83315000 D aq_cd +ffffffff83316000 D de_cd +ffffffff83317000 D pcn_cd +ffffffff83318000 D wdc_sii3114_vtbl +ffffffff83318038 D wdc_pdc203xx_vtbl +ffffffff83318070 D wdc_svwsata_vtbl +ffffffff833180a8 D pciide_cd +ffffffff833180d0 d sis_hostbr_type +ffffffff83319000 D ppb_cd +ffffffff8331a000 D vr_cd +ffffffff8331a020 D vr_devices +ffffffff8331b000 D txp_cd +ffffffff8331c000 D bt848_card_signature +ffffffff8331d000 D bktr_cd +ffffffff8331e000 D em_cd +ffffffff8331f000 D ixgb_cd +ffffffff83320000 D ix_cd +ffffffff83320020 D ixgbe_smart_speed +ffffffff83320024 D ixgbe_enable_msix +ffffffff83321000 D ixl_cd +ffffffff83321020 d ixl_sff_lock +ffffffff83322000 D xge_cd +ffffffff83323000 D thtc_cd +ffffffff83323020 D tht_cd +ffffffff83323040 D tht_txt_desc +ffffffff83323068 D tht_rxf_desc +ffffffff83323090 D tht_rxd_desc +ffffffff833230b8 D tht_txf_desc +ffffffff83324000 D myx_cd +ffffffff83325000 D oce_cd +ffffffff83326000 D dc_devs +ffffffff83327000 D cas_cd +ffffffff83328000 D sis_cd +ffffffff83329000 D se_cd +ffffffff8332a000 D mbg_cd +ffffffff8332b000 D cbb_cd +ffffffff8332b020 D yc_chipsets +ffffffff8332b1b0 d pccbb_funcs +ffffffff8332b1e0 d pccbb_pcmcia_funcs +ffffffff8332c000 D skc_cd +ffffffff8332c020 D sk_cd +ffffffff8332d000 D mskc_cd +ffffffff8332d020 D msk_cd +ffffffff8332e000 D puc_cd +ffffffff8332f000 D puc_ndevs +ffffffff83330000 D iwi_cd +ffffffff83331000 D wpi_cd +ffffffff83332000 D iwn_cd +ffffffff83333000 D iwm_cd +ffffffff83334000 D iwx_cd +ffffffff83335000 D cmpci_cd +ffffffff83336000 D iha_cd +ffffffff83337000 D pcscp_cd +ffffffff83337020 D pcscp_glue +ffffffff83338000 D bge_cd +ffffffff83339000 D bnx_firmwares +ffffffff83339160 D bnx_rv2ps +ffffffff833391c0 D bnx_cd +ffffffff833391e0 d flash_5709 +ffffffff83339210 d flash_table +ffffffff8333a000 D vge_cd +ffffffff8333b000 D stge_cd +ffffffff8333c000 D nfe_cd +ffffffff8333d000 D et_cd +ffffffff8333e000 D jme_cd +ffffffff8333f000 D age_cd +ffffffff83340000 D alc_dma_burst +ffffffff83340020 D alc_cd +ffffffff83341000 D ale_cd +ffffffff83342000 D amdpm_cd +ffffffff83342020 d amdpm_timecounter +ffffffff83343000 D bce_cd +ffffffff83344000 D rtwn_cd +ffffffff83345000 d ral_rt2560_opns +ffffffff83345028 d ral_rt2661_opns +ffffffff83345050 d ral_rt2860_opns +ffffffff83346000 D piixpm_cd +ffffffff83347000 D vic_cd +ffffffff83348000 D vmx_cd +ffffffff83349000 D vmwpvs_cd +ffffffff8334a000 D lii_cd +ffffffff8334b000 D ichiic_cd +ffffffff8334c000 D viapm_cd +ffffffff8334c020 d viapm_timecounter +ffffffff8334d000 D amdiic_cd +ffffffff8334e000 D nviic_cd +ffffffff8334f000 D kate_cd +ffffffff83350000 D km_cd +ffffffff83351000 D cpu_model_offsets +ffffffff83351070 D ksmn_cd +ffffffff83352000 D itherm_cd +ffffffff83353000 D pchtemp_cd +ffffffff83354000 D xspd_cd +ffffffff83355000 D virtio_pci_ops +ffffffff83356000 D bwfm_pci_buscore_ops +ffffffff83356030 D bwfm_pci_bus_ops +ffffffff83356058 D bwfm_pci_msgbuf_ops +ffffffff83357000 D bnxt_cd +ffffffff83358000 D mcx_cd +ffffffff83359000 D iavf_cd +ffffffff8335a000 D rge_cd +ffffffff8335b000 D igc_cd +ffffffff8335c000 D ngbe_cd +ffffffff8335d000 D agp_cd +ffffffff8335e000 D intagp_cd +ffffffff8335e020 D agp_i810_methods +ffffffff8335f000 D reservation_ww_class +ffffffff83360000 d bridge_lock +ffffffff83360010 d bridge_list +ffffffff83361000 d drm_connector_enum_list +ffffffff833611f8 d connector_list_lock +ffffffff83361208 d connector_list +ffffffff83362000 d kernel_fb_helper_list +ffffffff83362010 d kernel_fb_helper_lock +ffffffff83363000 D drm_global_mutex +ffffffff83364000 D i2c_bit_algo +ffffffff83364010 d drm_fence_context_count +ffffffff83364018 d dma_fence_stub_mtx +ffffffff83364028 D wait_bit_mtx +ffffffff83364038 D shrinkers +ffffffff83365000 d crtc_ww_class +ffffffff83366000 d panel_lock +ffffffff83366010 d panel_list +ffffffff83367000 d ttm_global_mutex +ffffffff83368000 D drm_sched_policy +ffffffff83369000 D intel_bbops +ffffffff8336a000 d i915_sys_placement +ffffffff8336a020 d i915_ttm_bo_driver +ffffffff8336b000 d mchdev_lock +ffffffff8336c000 D inteldrm_stdscreen +ffffffff8336c030 D inteldrm_scrlist +ffffffff8336c038 D inteldrm_screenlist +ffffffff8336c048 D inteldrm_accessops +ffffffff8336c0a8 D inteldrm_cd +ffffffff8336d000 d capture_mutex +ffffffff8336e000 d mitigations +ffffffff8336f000 D i915_modparams +ffffffff83370000 d schedule_lock +ffffffff83371000 d unbind_fence_ops +ffffffff83372000 D intel_graphics_stolen_res +ffffffff83373000 D btc_valid_sclk +ffffffff83374000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff83374020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff83375000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff83375008 d r600_cs_packet_parse_vline.vline_status +ffffffff83376000 d r100_asic +ffffffff833762e0 d r200_asic +ffffffff833765c0 d r300_asic_pcie +ffffffff833768a0 d r300_asic +ffffffff83376b80 d r420_asic +ffffffff83376e60 d rs400_asic +ffffffff83377140 d rs600_asic +ffffffff83377420 d rs690_asic +ffffffff83377700 d rv515_asic +ffffffff833779e0 d r520_asic +ffffffff83377cc0 d r600_asic +ffffffff83377fa0 d rv6xx_asic +ffffffff83378280 d rs780_asic +ffffffff83378560 d rv770_asic +ffffffff83378840 d evergreen_asic +ffffffff83378b20 d sumo_asic +ffffffff83378e00 d btc_asic +ffffffff833790e0 d cayman_asic +ffffffff833793c0 d trinity_asic +ffffffff833796a0 d si_asic +ffffffff83379980 d ci_asic +ffffffff83379c60 d kv_asic +ffffffff8337a000 d dce6_funcs +ffffffff8337a018 d dce6_hdmi_funcs +ffffffff8337a088 d dce6_dp_funcs +ffffffff8337a0f8 d dce4_funcs +ffffffff8337a110 d dce4_hdmi_funcs +ffffffff8337a180 d dce4_dp_funcs +ffffffff8337a1f0 d dce32_funcs +ffffffff8337a208 d dce32_hdmi_funcs +ffffffff8337a278 d dce32_dp_funcs +ffffffff8337a2e8 d r600_funcs +ffffffff8337a300 d r600_hdmi_funcs +ffffffff8337b000 D radeon_modeset +ffffffff8337b004 D radeon_dynclks +ffffffff8337b008 D radeon_agpmode +ffffffff8337b00c D radeon_gart_size +ffffffff8337b010 D radeon_tv +ffffffff8337b014 D radeon_audio +ffffffff8337b018 D radeon_pcie_gen2 +ffffffff8337b01c D radeon_msi +ffffffff8337b020 D radeon_lockup_timeout +ffffffff8337b024 D radeon_dpm +ffffffff8337b028 D radeon_aspm +ffffffff8337b02c D radeon_runtime_pm +ffffffff8337b030 D radeon_vm_size +ffffffff8337b034 D radeon_vm_block_size +ffffffff8337b038 D radeon_use_pflipirq +ffffffff8337b03c D radeon_bapm +ffffffff8337b040 D radeon_backlight +ffffffff8337b044 D radeon_auxch +ffffffff8337b048 D radeon_uvd +ffffffff8337b04c D radeon_vce +ffffffff8337b050 D radeon_si_support +ffffffff8337b054 D radeon_cik_support +ffffffff8337b058 D radeondrm_cd +ffffffff8337b078 D radeondrm_stdscreen +ffffffff8337b0a8 D radeondrm_scrlist +ffffffff8337b0b0 D radeondrm_screenlist +ffffffff8337b0c0 D radeondrm_accessops +ffffffff8337c000 D radeon_bbops +ffffffff8337d000 d radeon_bo_driver +ffffffff8337e000 d verde_pg_init +ffffffff8337f000 d cac_weights_pitcairn +ffffffff8337f4d0 d cac_weights_oland +ffffffff83380000 d aldebaran_mode2_handler +ffffffff83381000 d amdgpu_vbios_version_attrs +ffffffff83382000 D amdgpu_asic_name +ffffffff83383000 D amdgpu_vram_limit +ffffffff83383004 D amdgpu_gart_size +ffffffff83383008 D amdgpu_gtt_size +ffffffff8338300c D amdgpu_moverate +ffffffff83383010 D amdgpu_audio +ffffffff83383014 D amdgpu_pcie_gen2 +ffffffff83383018 D amdgpu_msi +ffffffff8338301c D amdgpu_dpm +ffffffff83383020 D amdgpu_fw_load_type +ffffffff83383024 D amdgpu_aspm +ffffffff83383028 D amdgpu_runtime_pm +ffffffff8338302c D amdgpu_ip_block_mask +ffffffff83383030 D amdgpu_bapm +ffffffff83383034 D amdgpu_vm_size +ffffffff83383038 D amdgpu_vm_fragment_size +ffffffff8338303c D amdgpu_vm_block_size +ffffffff83383040 D amdgpu_vm_update_mode +ffffffff83383044 D amdgpu_dc +ffffffff83383048 D amdgpu_sched_jobs +ffffffff8338304c D amdgpu_sched_hw_submission +ffffffff83383050 D amdgpu_cg_mask +ffffffff83383058 D amdgpu_pg_mask +ffffffff8338305c D amdgpu_sdma_phase_quantum +ffffffff83383060 D amdgpu_pp_feature_mask +ffffffff83383064 D amdgpu_lbpw +ffffffff83383068 D amdgpu_compute_multipipe +ffffffff8338306c D amdgpu_gpu_recovery +ffffffff83383070 D amdgpu_smu_pptable_id +ffffffff83383074 D amdgpu_dc_feature_mask +ffffffff83383078 D amdgpu_async_gfx_ring +ffffffff8338307c D amdgpu_mcbp +ffffffff83383080 D amdgpu_discovery +ffffffff83383084 D amdgpu_noretry +ffffffff83383088 D amdgpu_force_asic_type +ffffffff8338308c D amdgpu_tmz +ffffffff83383090 D amdgpu_reset_method +ffffffff83383094 D amdgpu_num_kcq +ffffffff83383098 D amdgpu_use_xgmi_p2p +ffffffff8338309c D amdgpu_sg_display +ffffffff833830a0 D amdgpu_user_partt_mode +ffffffff833830a8 D mgpu_info +ffffffff83383558 D amdgpu_ras_enable +ffffffff8338355c D amdgpu_ras_mask +ffffffff83383560 D amdgpu_bad_page_threshold +ffffffff83383564 D amdgpu_backlight +ffffffff83383568 D amdgpu_cd +ffffffff83383588 D amdgpu_stdscreen +ffffffff833835b8 D amdgpu_scrlist +ffffffff833835c0 D amdgpu_screenlist +ffffffff833835d0 D amdgpu_accessops +ffffffff83384000 d amdgpu_gtt_mgr_attributes +ffffffff83385000 D amdgpu_bbops +ffffffff83386000 D soc15_ih_clientid_name +ffffffff83387000 D ras_error_string +ffffffff83387030 D ras_block_string +ffffffff833870c0 D ras_mca_block_string +ffffffff83388000 d amdgpu_bo_driver +ffffffff83389000 d amdgpu_vram_mgr_attributes +ffffffff8338a000 d xgmi_mutex +ffffffff8338a010 D xgmi_ras_hw_ops +ffffffff8338a050 D xgmi_ras +ffffffff8338b000 D aqua_vanjaram_xcp_funcs +ffffffff8338c000 D gfx_v11_0_3_ras +ffffffff8338d000 d gfx_v9_0_ras +ffffffff8338e000 D gfx_v9_4_ras +ffffffff8338f000 D gfx_v9_4_2_ras_ops +ffffffff8338f040 D gfx_v9_4_2_ras +ffffffff83390000 D gfx_v9_4_3_xcp_funcs +ffffffff83390020 D gfx_v9_4_3_ras_ops +ffffffff83390060 D gfx_v9_4_3_ras +ffffffff83391000 D gfxhub_v1_2_xcp_funcs +ffffffff83392000 D hdp_v4_0_ras_hw_ops +ffffffff83392040 D hdp_v4_0_ras +ffffffff83393000 d jpeg_v2_6_ras +ffffffff83394000 d jpeg_v4_0_ras +ffffffff83395000 d jpeg_v4_0_3_ras +ffffffff83396000 D mca_v3_0_mp0_ras +ffffffff83396058 D mca_v3_0_mp1_ras +ffffffff833960b0 D mca_v3_0_mpio_ras +ffffffff83397000 D mmhub_v1_0_ras_hw_ops +ffffffff83397040 D mmhub_v1_0_ras +ffffffff83398000 D mmhub_v1_7_ras_hw_ops +ffffffff83398040 D mmhub_v1_7_ras +ffffffff83399000 D mmhub_v1_8_ras +ffffffff8339a000 D mmhub_v9_4_ras +ffffffff8339b000 D nbio_v4_3_ras +ffffffff8339c000 D nbio_v7_4_ras +ffffffff8339d000 D nbio_v7_9_ras +ffffffff8339e000 d sriov_sc_video_codecs_encode +ffffffff8339e010 d sriov_sc_video_codecs_decode_vcn1 +ffffffff8339e020 d sriov_sc_video_codecs_decode_vcn0 +ffffffff8339e030 d sriov_sc_video_codecs_encode_array +ffffffff8339e060 d sriov_sc_video_codecs_decode_array_vcn1 +ffffffff8339e0f0 d sriov_sc_video_codecs_decode_array_vcn0 +ffffffff8339f000 d sdma_v4_0_ras +ffffffff833a0000 D sdma_v4_4_ras +ffffffff833a1000 D sdma_v4_4_2_xcp_funcs +ffffffff833a1020 d sdma_v4_4_2_ras +ffffffff833a2000 d sdma_v6_0_3_ras +ffffffff833a3000 d sienna_cichlid_mode2_handler +ffffffff833a4000 d smu_v13_0_10_mode2_handler +ffffffff833a5000 d sriov_vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff833a5010 d sriov_vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff833a5020 d sriov_vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff833a5030 d sriov_vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff833a5040 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff833a5070 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff833a5100 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff833a5140 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff833a6000 D umc_v6_1_ras +ffffffff833a7000 D umc_v6_7_ras +ffffffff833a8000 D umc_v8_10_ras +ffffffff833a9000 D umc_v8_7_ras +ffffffff833aa000 d vcn_v2_6_ras +ffffffff833ab000 d vcn_v4_0_unified_ring_vm_funcs +ffffffff833ab140 d vcn_v4_0_ras +ffffffff833ac000 d vcn_v4_0_3_ras +ffffffff833ad000 d amdgpu_dm_mode_config_helperfuncs +ffffffff833ad010 d dm_atomic_state_funcs +ffffffff833ae000 d construct_integrated_info.result +ffffffff833ae004 d bios_parser_get_firmware_info.result +ffffffff833af000 d dce_funcs +ffffffff833b0000 d dce110_funcs +ffffffff833b1000 d dce112_funcs +ffffffff833b2000 d dce120_funcs +ffffffff833b3000 d rv1_clk_funcs +ffffffff833b3090 d rv1_clk_internal_funcs +ffffffff833b4000 d rv2_clk_internal_funcs +ffffffff833b5000 d dcn2_funcs +ffffffff833b6000 d dcn201_funcs +ffffffff833b7000 d dcn21_funcs +ffffffff833b7090 d rn_bw_params +ffffffff833b8000 D dcn3_fpga_funcs +ffffffff833b8090 d dcn3_funcs +ffffffff833b9000 d vg_funcs +ffffffff833b9090 d dummy_clocks +ffffffff833b91c0 d vg_bw_params +ffffffff833ba000 d dcn31_funcs +ffffffff833ba090 d dcn31_bw_params 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+ffffffff833d0000 d dcn30_tg_funcs +ffffffff833d1000 d res_cap_dcn301 +ffffffff833d1040 d dcn301_res_pool_funcs +ffffffff833d2000 d dcn302_res_pool_funcs +ffffffff833d3000 d dcn303_res_pool_funcs +ffffffff833d4000 d dcn31_afmt_funcs +ffffffff833d5000 d dcn31_apg_funcs +ffffffff833d6000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff833d7000 d dcn31_hubp_funcs +ffffffff833d8000 d dcn31_tg_funcs +ffffffff833d9000 d dcn31_res_pool_funcs +ffffffff833da000 d dcn31_vpg_funcs +ffffffff833db000 d dcn314_tg_funcs +ffffffff833dc000 d dcn314_res_pool_funcs +ffffffff833dd000 d dcn315_res_pool_funcs +ffffffff833de000 d dcn316_res_pool_funcs +ffffffff833df000 d dcn32_dpp_funcs +ffffffff833df110 d dcn32_dpp_cap +ffffffff833e0000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff833e1000 d dcn32_hubp_funcs +ffffffff833e2000 d dcn32_tg_funcs +ffffffff833e3000 d dcn32_res_pool_funcs +ffffffff833e4000 d dcn321_res_pool_funcs +ffffffff833e5000 D dcn1_0_ip +ffffffff833e51b8 D dcn1_0_soc +ffffffff833e7000 D dcn2_0_ip +ffffffff833e71b8 D dcn2_0_nv14_ip +ffffffff833e7370 D dcn2_0_soc +ffffffff833e86a8 D dcn2_0_nv14_soc +ffffffff833e99e0 D dcn2_0_nv12_soc +ffffffff833ead18 D dcn2_1_ip +ffffffff833eaed0 D dcn2_1_soc +ffffffff833ec208 D ddr4_wm_table_gs +ffffffff833ec2c8 D lpddr4_wm_table_gs +ffffffff833ec388 D lpddr4_wm_table_with_disabled_ppt +ffffffff833ec448 D ddr4_wm_table_rn +ffffffff833ec508 D ddr4_1R_wm_table_rn +ffffffff833ec5c8 D lpddr4_wm_table_rn +ffffffff833ed000 D dcn3_0_ip +ffffffff833ed1b8 D dcn3_0_soc +ffffffff833ef000 D dcn3_01_ip +ffffffff833ef1b8 D dcn3_01_soc +ffffffff833f04f0 D ddr4_wm_table +ffffffff833f05b0 D lpddr5_wm_table +ffffffff833f1000 D dcn3_02_ip +ffffffff833f11b8 D dcn3_02_soc +ffffffff833f3000 D dcn3_03_ip +ffffffff833f31b8 D dcn3_03_soc +ffffffff833f5000 D dcn3_1_ip +ffffffff833f51b8 D dcn3_15_ip +ffffffff833f5370 D dcn3_16_ip +ffffffff833f5528 d dcn3_15_soc +ffffffff833f6860 d dcn3_1_soc +ffffffff833f7b98 d dcn3_16_soc +ffffffff833f9000 D dcn3_14_ip +ffffffff833f91b8 d dcn3_14_soc +ffffffff833fb000 D dcn3_2_ip +ffffffff833fb1b8 D dcn3_2_soc +ffffffff833fd000 D dcn3_21_ip +ffffffff833fd1b8 D dcn3_21_soc +ffffffff833ff000 d dsc_policy_max_target_bpp_limit +ffffffff83400000 D DIDTEDCConfig_P12 +ffffffff83400070 d smu7_profiling +ffffffff83401000 d cyan_skillfish_table_map +ffffffff83401080 d cyan_skillfish_message_map +ffffffff83402000 d navi10_table_map +ffffffff83402080 d navi10_pwr_src_map +ffffffff83402090 d navi10_workload_map +ffffffff834020e0 d navi10_message_map +ffffffff83402b60 d navi10_clk_map +ffffffff83402c20 d navi10_feature_mask_map +ffffffff83403000 d sienna_cichlid_table_map +ffffffff83403080 d sienna_cichlid_pwr_src_map +ffffffff83403090 d sienna_cichlid_workload_map +ffffffff834030e0 d sienna_cichlid_message_map +ffffffff83403b60 d sienna_cichlid_clk_map +ffffffff83403c20 d sienna_cichlid_feature_mask_map +ffffffff83404000 d vangogh_message_map +ffffffff83404a80 d vangogh_table_map +ffffffff83404b00 d vangogh_workload_map +ffffffff83404b50 d vangogh_feature_mask_map +ffffffff83405000 d renoir_table_map +ffffffff83405080 d renoir_workload_map +ffffffff834050d0 d renoir_message_map +ffffffff83405b50 d renoir_clk_map +ffffffff83406000 d smu_v13_0_0_message_map +ffffffff83406a80 d smu_v13_0_0_feature_mask_map +ffffffff83406e50 d smu_v13_0_0_table_map +ffffffff83406ed0 d smu_v13_0_0_pwr_src_map +ffffffff83406ee0 d smu_v13_0_0_workload_map +ffffffff83406f30 d smu_v13_0_0_clk_map +ffffffff83407000 d smu_v13_0_4_table_map +ffffffff83407080 d smu_v13_0_4_message_map +ffffffff83407b00 d smu_v13_0_4_feature_mask_map +ffffffff83408000 d smu_v13_0_5_table_map +ffffffff83408080 d smu_v13_0_5_message_map +ffffffff83408b00 d smu_v13_0_5_feature_mask_map +ffffffff83409000 d smu_v13_0_7_message_map +ffffffff83409a80 d smu_v13_0_7_feature_mask_map +ffffffff83409e50 d smu_v13_0_7_table_map +ffffffff83409ed0 d smu_v13_0_7_pwr_src_map +ffffffff83409ee0 d smu_v13_0_7_workload_map +ffffffff83409f30 d smu_v13_0_7_clk_map +ffffffff8340a000 d yellow_carp_table_map +ffffffff8340a080 d yellow_carp_message_map +ffffffff8340ab00 d yellow_carp_feature_mask_map +ffffffff8340b000 D pci_conf_lock +ffffffff8340b010 D pci_bus_dma_tag +ffffffff8340b088 D msi_pic +ffffffff8340b120 D msix_pic +ffffffff8340c000 D pchb_cd +ffffffff8340d000 D amas_cd +ffffffff8340e000 D cardslot_cd +ffffffff8340f000 D cardbus_cd +ffffffff83410000 d csdevs +ffffffff83411000 d ral_rt2560_opns +ffffffff83411028 d ral_rt2661_opns +ffffffff83411050 d ral_rt2860_opns +ffffffff83412000 D pcmcia_cd +ffffffff83413000 D pcmcia_3cxem556_func0 +ffffffff834130b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff83413158 D pcmcia_megahertz_xjem1144_func0 +ffffffff83413210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff834132b0 d pcmcia_3cxem556_func1 +ffffffff83413368 d pcmcia_3cxem556_func1_cfe0 +ffffffff83413408 d pcmcia_megahertz_xjem1144_func1 +ffffffff834134c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff83413560 d pcmcia_sierra_a555_func1 +ffffffff83413618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff834136b8 d pcmcia_sveclancard_func0 +ffffffff83413770 d pcmcia_sveclancard_func0_cfe0 +ffffffff83414000 D ep_pcmcia_prod +ffffffff83415000 D aic_pcmcia_prod +ffffffff83416000 D com_pcmcia_prod +ffffffff83417000 D wdc_pcmcia_pr +ffffffff83418000 D sm_pcmcia_prod +ffffffff83419000 D xe_cd +ffffffff8341a000 D pcib_cd +ffffffff8341b000 D amdpcib_cd +ffffffff8341c000 D tcpcib_cd +ffffffff8341d000 D aapic_cd +ffffffff8341e000 D hme_cd +ffffffff8341f000 D isa_cd +ffffffff83420000 D isadma_cd +ffffffff83421000 D fdc_cd +ffffffff83422000 D fd_types +ffffffff834221f8 D fd_cd +ffffffff83423000 D mpu_cd +ffffffff83424000 D pcppi_cd +ffffffff83425000 D spkr_cd +ffffffff83426000 D wbsio_cd +ffffffff83427000 D schsio_cd +ffffffff83428000 D it_cd +ffffffff83429000 D uguru_cd +ffffffff8342a000 D aps_cd +ffffffff8342b000 D isa_bus_dma_tag +ffffffff8342c000 D wsdisplay_cd +ffffffff8342c020 D wsdisplay_cons +ffffffff8342c058 D wsdisplay_defaultscreens +ffffffff8342d000 D wskbd_cd +ffffffff8342d020 D wskbd_default_bell_data +ffffffff8342d030 D wskbd_default_keyrepeat_data +ffffffff8342d040 D wskbd_srcops +ffffffff8342e000 d compose_tab +ffffffff8342f000 D wsmouse_cd +ffffffff8342f020 D wsmouse_srcops +ffffffff83430000 D wsmux_srcops +ffffffff83430030 D wsmux_tree_lock +ffffffff83431000 D vt100_output +ffffffff83432000 D pckbd_cd +ffffffff83433000 D pms_cd +ffffffff83433020 d synaptics_params +ffffffff83433030 d alps_params +ffffffff83434000 D skgpio_cd +ffffffff83435000 D pctr_conf_lock +ffffffff83436000 D ukbd_keymapdata +ffffffff83437000 D usbrev_str +ffffffff83437030 D usb_cd +ffffffff83438000 d usbd_ratecheck.errinterval +ffffffff83439000 D uhub_cd +ffffffff8343a000 D uaudio_cd +ffffffff8343b000 D uvideo_ctrls +ffffffff8343b2d8 D uvideo_cd +ffffffff8343c000 D utvfu_norm_params +ffffffff8343c030 D utvfu_cd +ffffffff8343d000 D udl_reg_vals_640x480_60 +ffffffff8343d020 D udl_reg_vals_640x480_67 +ffffffff8343d040 D udl_reg_vals_640x480_72 +ffffffff8343d060 D udl_reg_vals_640x480_75 +ffffffff8343d080 D udl_reg_vals_800x480_61 +ffffffff8343d0a0 D udl_reg_vals_800x600_56 +ffffffff8343d0c0 D udl_reg_vals_800x600_60 +ffffffff8343d0e0 D udl_reg_vals_800x600_72 +ffffffff8343d100 D udl_reg_vals_800x600_74 +ffffffff8343d120 D udl_reg_vals_800x600_75 +ffffffff8343d140 D udl_reg_vals_1024x768_60 +ffffffff8343d160 D udl_reg_vals_1024x768_70 +ffffffff8343d180 D udl_reg_vals_1024x768_75 +ffffffff8343d1a0 D udl_reg_vals_1280x800_60 +ffffffff8343d1c0 D udl_reg_vals_1280x960_60 +ffffffff8343d1e0 D udl_reg_vals_1280x1024_60 +ffffffff8343d200 D udl_reg_vals_1280x1024_75 +ffffffff8343d220 D udl_reg_vals_1366x768_60 +ffffffff8343d240 D udl_reg_vals_1440x900_60 +ffffffff8343d260 D udl_reg_vals_1440x900_59 +ffffffff8343d280 D udl_reg_vals_1440x900_75 +ffffffff8343d2a0 D udl_reg_vals_1680x1050_60 +ffffffff8343d2c0 D udl_reg_vals_1600x1200_60 +ffffffff8343d2e0 D udl_reg_vals_1920x1080_60 +ffffffff8343d300 D udl_null_key_1 +ffffffff8343d310 D udl_decomp_table +ffffffff8343e510 D udl_cd +ffffffff8343e530 D udl_stdscreen +ffffffff8343e560 D udl_scrlist +ffffffff8343e568 D udl_screenlist +ffffffff8343e578 D udl_accessops +ffffffff8343f000 D umidi_cd +ffffffff83440000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff83440020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff83440040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff83440060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff83440080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff834400a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff834400c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff834400e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff83440100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff83440120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff83440140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff83440160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff83440180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff834401a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff834401c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff834401e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff83440200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff83440220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff83440240 D umidi_quirklist +ffffffff834404a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff834404c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff834404d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff834404f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff83440500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff83440520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff83440530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff83440550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff83440560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff83440580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff83440590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff834405b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff834405c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff834405e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff834405f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff83440610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff83440620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff83440640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff83440650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff83440670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff83440680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff834406a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff834406b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff834406d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff834406e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff83440700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff83440710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff83440730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff83440740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff83440760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff83440770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff83440790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff834407a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff834407c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff834407d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff834407f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff83441000 D ucom_cd +ffffffff83441020 D sysctl_ucomlock +ffffffff83442000 D ugen_cd +ffffffff83443000 D uhidev_cd +ffffffff83443020 d uhidev_use_rdesc.reportbuf +ffffffff83444000 D uhid_cd +ffffffff83445000 D fido_cd +ffffffff83446000 D ujoy_cd +ffffffff83447000 D ukbd_cd +ffffffff83448000 D ums_cd +ffffffff83448020 d ums_fix_elecom_descriptor.match +ffffffff83449000 D umt_cd +ffffffff8344a000 D def_scale +ffffffff8344a020 D uts_cd +ffffffff8344b000 D ubcmtp_cd +ffffffff8344b020 d ubcmtp_wsmousecfg +ffffffff8344c000 D ucycom_cd +ffffffff8344d000 D uslhcom_cd +ffffffff8344e000 D ulpt_fwdevs +ffffffff8344e060 D ulpt_cd +ffffffff8344e080 D ulptusein +ffffffff8344f000 D umass_cd +ffffffff8344f020 d umass_bbb_transfer.dCBWtag +ffffffff83450000 D uthum_cd +ffffffff83451000 D ugold_cd +ffffffff83451020 d cmd_init +ffffffff83451028 d cmd_type +ffffffff83451030 d cmd_data +ffffffff83452000 D utrh_cd +ffffffff83453000 D uoakrh_cd +ffffffff83454000 D uoaklux_cd +ffffffff83455000 D uoakv_cd +ffffffff83456000 D uonerng_cd +ffffffff83457000 D urng_cd +ffffffff83458000 D udcf_cd +ffffffff83459000 D umbg_cd +ffffffff8345a000 D uvisor_cd +ffffffff8345b000 D udsbr_cd +ffffffff8345c000 D utwitch_cd +ffffffff8345d000 D aue_cd +ffffffff8345e000 D axe_cd +ffffffff8345f000 D axen_cd +ffffffff83460000 D smsc_cd +ffffffff83461000 D cue_devs +ffffffff83461010 D cue_cd +ffffffff83462000 D kue_cd +ffffffff83463000 D cdce_cd +ffffffff83464000 D urndis_cd +ffffffff83465000 D mos_cd +ffffffff83466000 D mue_cd +ffffffff83467000 D udav_cd +ffffffff83468000 D upl_devs +ffffffff83468008 D upl_cd +ffffffff83469000 D ugl_devs +ffffffff83469008 D ugl_cd +ffffffff8346a000 D url_cd +ffffffff8346b000 D ure_cd +ffffffff8346c000 D uaq_cd +ffffffff8346d000 D umodem_cd +ffffffff8346e000 D uftdi_cd +ffffffff8346f000 D uplcom_cd +ffffffff83470000 D umct_cd +ffffffff83471000 D uvscom_cd +ffffffff83472000 D ubsa_cd +ffffffff83473000 D ukspan_cd +ffffffff83474000 D uslcom_cd +ffffffff83475000 D uark_cd +ffffffff83476000 D moscom_cd +ffffffff83477000 D umcs_cd +ffffffff83478000 D uscom_cd +ffffffff83479000 D ucrcom_cd +ffffffff8347a000 D uxrcom_cd +ffffffff8347b000 D uipaq_cd +ffffffff8347c000 D umsm_cd +ffffffff8347d000 D uchcom_cd +ffffffff8347e000 D uticom_cd +ffffffff8347f000 D wi_func_usb +ffffffff8347f060 D wi_usb_cd +ffffffff83480000 D atu_cd +ffffffff83480020 D atu_devs +ffffffff83480270 D atu_radfirm +ffffffff83481000 D ural_cd +ffffffff83482000 D rum_cd +ffffffff83483000 D run_cd +ffffffff83483020 D rt3070_freqs +ffffffff83484000 D mtw_cd +ffffffff83485000 D zyd_cd +ffffffff83486000 D upgt_cd +ffffffff83487000 D urtw_cd +ffffffff83488000 D urtwn_cd +ffffffff83489000 D rsu_cd +ffffffff8348a000 D otus_cd +ffffffff8348a020 d AR_PLCP_HDR_INTR +ffffffff8348b000 D umb_xfer_tout +ffffffff8348b010 D umb_uuid_basic_connect +ffffffff8348b020 D umb_uuid_context_internet +ffffffff8348b030 D umb_uuid_qmi_mbim +ffffffff8348b040 D umb_cd +ffffffff8348b060 D umb_delay +ffffffff8348b070 D umb_qmi_alloc_cid +ffffffff8348b080 D umb_qmi_fcc_auth +ffffffff8348c000 D uath_cd +ffffffff8348d000 D uow_cd +ffffffff8348e000 D uberry_cd +ffffffff8348f000 D upd_cd +ffffffff8348f020 d upd_usage_roots +ffffffff8348f0a0 d upd_usage_batdep +ffffffff83490000 D uwacom_cd +ffffffff83490020 d uwacom_attach.wacom_report_buf +ffffffff83491000 D bwfm_usb_bus_ops +ffffffff83492000 D umstc_cd +ffffffff83493000 D uhidpp_cd +ffffffff83494000 D ucc_cd +ffffffff83495000 D iic_cd +ffffffff83496000 D probe_addrs_sensor +ffffffff83496008 D probe_addrs_eeprom +ffffffff83497000 D lmtemp_cd +ffffffff83498000 D lmn_worklist +ffffffff83498240 D lmn_cd +ffffffff83499000 D lmenv_cd +ffffffff8349a000 D maxtmp_cd +ffffffff8349b000 D adc_cd +ffffffff8349c000 D admtemp_cd +ffffffff8349d000 D admlc_cd +ffffffff8349e000 D admtm_cd +ffffffff8349f000 D admtmp_cd +ffffffff834a0000 D admtt_cd +ffffffff834a1000 D maxds_cd +ffffffff834a2000 D adt_chips +ffffffff834a2160 D worklist +ffffffff834a21a0 D adt_cd +ffffffff834a3000 D admcts_cd +ffffffff834a4000 D wbng_cd +ffffffff834a5000 D nvt_cd +ffffffff834a6000 D adl_worklist +ffffffff834a6138 D adl_cd +ffffffff834a7000 D andl_cd +ffffffff834a8000 D sdtemp_cd +ffffffff834a9000 D lisa_cd +ffffffff834aa000 D ihidev_cd +ffffffff834ab000 D ikbd_cd +ffffffff834ac000 D ims_cd +ffffffff834ad000 D imt_cd +ffffffff834ae000 D iatp_cd +ffffffff834af000 D ietp_cd +ffffffff834b0000 D bgw_cd +ffffffff834b1000 D icc_cd +ffffffff834b2000 D gpio_cd +ffffffff834b3000 D acpi_cd +ffffffff834b3020 D acpi_pcidevs +ffffffff834b3030 D acpi_pcirootdevs +ffffffff834b3040 D acpi_taskq +ffffffff834b3050 d acpi_indicator.save_led_state +ffffffff834b3060 d acpi_getprop.prop_guid +ffffffff834b3070 d acpi_getpropint.prop_guid +ffffffff834b3080 D acpi_skip_hids +ffffffff834b30f0 D acpi_isa_hids +ffffffff834b4000 D aml_intlen +ffffffff834b4010 D aml_table +ffffffff834b4af0 d osstring +ffffffff834b4b10 D aml_defobj +ffffffff834b4ca0 D aml_valid_osi +ffffffff834b4d78 D acpi_max_osi +ffffffff834b4d80 D aml_regionspace +ffffffff834b6000 D acpitimer_cd +ffffffff834b6020 d acpi_timecounter +ffffffff834b7000 D acpiac_cd +ffffffff834b7020 D acpiac_hids +ffffffff834b8000 D acpibat_cd +ffffffff834b8020 D acpibat_hids +ffffffff834b9000 D acpibtn_cd +ffffffff834b9020 D acpibtn_hids +ffffffff834ba000 D acpicmos_cd +ffffffff834ba020 D acpicmos_hids +ffffffff834bb000 D acpicpu_cd +ffffffff834bb020 D acpicpu_hids +ffffffff834bb030 d acpicpu_set_pdc.cpu_oscuuid +ffffffff834bc000 D acpihpet_cd +ffffffff834bc020 d hpet_timecounter +ffffffff834bd000 D acpiec_cd +ffffffff834bd020 D acpiec_hids +ffffffff834be000 D acpitz_cd +ffffffff834be020 D acpitz_perflevel +ffffffff834bf000 D acpimadt_cd +ffffffff834c0000 D acpimcfg_cd +ffffffff834c1000 D acpiprt_map_list +ffffffff834c1010 D acpiprt_cd +ffffffff834c1030 D acpiprt_pri +ffffffff834c2000 D acpidmar_force_cm +ffffffff834c2008 D acpidmar_cd +ffffffff834c2030 D vtd_faults +ffffffff834c3000 D acpidock_cd +ffffffff834c4000 D abl_cd +ffffffff834c4020 D abl_hids +ffffffff834c5000 D asmc_cd +ffffffff834c5020 D asmc_hids +ffffffff834c6000 D acpiasus_cd +ffffffff834c6020 D acpiasus_hids +ffffffff834c7000 D acpithinkpad_cd +ffffffff834c7020 D acpithinkpad_hids +ffffffff834c8000 D acpitoshiba_cd +ffffffff834c8020 D acpitoshiba_hids +ffffffff834c9000 D acpisony_cd +ffffffff834ca000 D acpivideo_cd +ffffffff834cb000 D acpivout_cd +ffffffff834cc000 D acpipwrres_cd +ffffffff834cd000 D aibs_cd +ffffffff834cd020 d aibs_hids +ffffffff834ce000 D aplgpio_cd +ffffffff834ce020 D aplgpio_hids +ffffffff834cf000 D bytgpio_cd +ffffffff834cf020 D bytgpio_hids +ffffffff834d0000 D chvgpio_cd +ffffffff834d0020 D chvgpio_hids +ffffffff834d1000 D glkgpio_cd +ffffffff834d1020 D glkgpio_hids +ffffffff834d2000 D pchgpio_cd +ffffffff834d2020 D pchgpio_hids +ffffffff834d2080 D pchgpio_devices +ffffffff834d3000 D tipmic_cd +ffffffff834d3020 D tipmic_thermal_regmap +ffffffff834d3030 D tipmic_power_regmap +ffffffff834d4000 D ccpmic_cd +ffffffff834d4020 D ccpmic_thermal_regmap +ffffffff834d4023 D ccpmic_power_regmap +ffffffff834d5000 D com_hids +ffffffff834d6000 D sdhc_hids +ffffffff834d7000 D dwiic_hids +ffffffff834d7050 D ihidev_hids +ffffffff834d7070 D ietp_hids +ffffffff834d7220 D iatp_hids +ffffffff834d7240 d dwiic_acpi_found_ihidev.i2c_hid_guid +ffffffff834d8000 D acpicbkbd_cd +ffffffff834d8020 D acpicbkbd_hids +ffffffff834d9000 D acpials_cd +ffffffff834d9020 D acpials_hids +ffffffff834da000 D tpm_cd +ffffffff834da020 D tpm_hids +ffffffff834db000 D acpihve_cd +ffffffff834dc000 D acpisbs_cd +ffffffff834dc020 D acpisbs_hids +ffffffff834dd000 D acpisurface_cd +ffffffff834dd020 D acpisurface_hids +ffffffff834de000 D ipmi_acpi_hids +ffffffff834df000 D amdgpio_cd +ffffffff834df020 D amdgpio_hids +ffffffff834e0000 D acpihid_cd +ffffffff834e0020 D acpihid_hids +ffffffff834e0030 d acpihid_guid +ffffffff834e1000 d iosf_hids +ffffffff834e2000 D acpipci_cd +ffffffff834e2020 D acpipci_hids +ffffffff834e2040 d acpipci_osc.uuid +ffffffff834e3000 D efi_cd +ffffffff834e4000 D vmm_cd +ffffffff834e5000 D vmm_hv_signature +ffffffff834e6000 D sdmmc_cd +ffffffff834e7000 D bwfm_sdio_bus_ops +ffffffff834e7028 D bwfm_sdio_buscore_ops +ffffffff834e8000 D onewire_cd +ffffffff834e9000 D owid_cd +ffffffff834ea000 D owsbm_cd +ffffffff834eb000 D owtemp_cd +ffffffff834ec000 D owctr_cd +ffffffff834ed000 D hz +ffffffff834ed004 D tick +ffffffff834ed008 D tick_nsec +ffffffff834ed00c D initialvnodes +ffffffff834ed010 D maxprocess +ffffffff834ed014 D maxthread +ffffffff834ed018 D maxfiles +ffffffff834ed020 D nmbclust +ffffffff834ed028 D bufcachepercent +ffffffff834ed02c D fscale +ffffffff834ed030 D shminfo +ffffffff834ed044 D seminfo +ffffffff834ee000 D extraloc +ffffffff834ee100 D rextraloc +ffffffff834ee110 D locnames +ffffffff834ee1f0 D locnamp +ffffffff834ee410 D pv_size +ffffffff834ee420 D pv +ffffffff834ee640 d loc +ffffffff834eead0 D cfdata +ffffffff834f5638 D cfroots +ffffffff834f5644 D cfroots_size +ffffffff834f5650 D pdevnames +ffffffff834f57b8 D pdevnames_size +ffffffff834f57c0 D pdevinit +ffffffff834f6000 D rootdev +ffffffff834f6004 D dumpdev +ffffffff834f6010 D swdevt +ffffffff834f7000 A __kudata_start +ffffffff834f7000 D tlb_shoot_first_pcid +ffffffff834f7008 D tlb_shoot_addr1 +ffffffff834f7010 D tlb_shoot_addr2 +ffffffff834f7018 D tlb_shoot_wait +ffffffff834f8000 A __kudata_end +ffffffff834f8000 C _edata +ffffffff834f8000 b drm_minors_idr +ffffffff834f8008 B drm_refcnt +ffffffff834f9000 B vga_console_screen +ffffffff834f9070 B vga_console_attached +ffffffff834f9078 B vga_console_vc +ffffffff834f9488 B vgaconsole +ffffffff834f948c B vga_console_type +ffffffff834fa000 b wdc_alloc_queue.inited +ffffffff834fa008 B wdc_xfer_pool +ffffffff834fa1b0 B wdc_xfer_iopool +ffffffff834fb000 B aic_debug +ffffffff834fc000 B gdt_cnt +ffffffff834fc004 B gdt_polling +ffffffff834fc005 B gdt_from_wait +ffffffff834fc008 b gdt_exec_ccb.__level +ffffffff834fc00c B gdt_wait_index +ffffffff834fc010 B gdt_wait_gdt +ffffffff834fd000 B sili_error_pmp_ports +ffffffff834fe000 B ncr53c9x_debug +ffffffff834fe008 b ecb_iopool +ffffffff834fe048 b ecb_pool_initialized +ffffffff834fe050 b ecb_pool +ffffffff834fe1f8 B sdebug +ffffffff834ff000 B epic_copy_small +ffffffff83500000 B comconsaddr +ffffffff83500008 B comconsiot +ffffffff83500010 B comconsioh +ffffffff83500018 B comconsfreq +ffffffff8350001c B comcons_reg_width +ffffffff83500020 B commajor +ffffffff83500024 B comconsunit +ffffffff83500028 B comcons_reg_shift +ffffffff8350002c B comconsattached +ffffffff83501000 B pckbc_console +ffffffff83501004 B pckbc_console_attached +ffffffff83501008 B pckbc_consdata +ffffffff835010e0 b pckbc_cons_slotdata +ffffffff83502000 b cy_poll.counter +ffffffff83503000 B atw_xindiv2 +ffffffff83504000 B rtw_rfprog_fallback +ffffffff83504004 B rtw_do_chip_reset +ffffffff83505000 b malo_cmd_string.cmd_buf +ffffffff83506000 b iosf_mbi +ffffffff83507000 B uhcixfer +ffffffff83508000 B ohcixfer +ffffffff83508008 b ohci_intr.ohci_intr_tv +ffffffff83509000 B ehcixfer +ffffffff8350a000 B xhcixfer +ffffffff8350b000 B ipmi_enabled +ffffffff8350b008 B ipmi_sensor_list +ffffffff8350c000 B mpath +ffffffff8350d000 B sr_bootuuid +ffffffff8350d010 B sr_bootkey +ffffffff8350d030 B softraid0 +ffffffff8350d038 B sr_hotplug_callbacks +ffffffff8350e000 B gf_pow +ffffffff8350e300 B gf_map +ffffffff8350eb00 B gf_log +ffffffff8350f000 b ksym_syms +ffffffff8350f008 b ksym_syms_size +ffffffff83510000 B kstat_version +ffffffff83510008 B kstat_id_tree +ffffffff83510010 B kstat_pv_tree +ffffffff83510018 B kstat_nm_tree +ffffffff83510020 b kstat_init.initialized +ffffffff83510028 B kstat_pool +ffffffff83511000 B stat_fbufs_in +ffffffff83511004 B stat_fbufs_wait +ffffffff83511008 B stat_opened_fusedev +ffffffff83511010 B fuse_d_list +ffffffff83512000 B fusefs_fbuf_pool +ffffffff83513000 B pf_state_pl +ffffffff835131a8 B pf_src_tree_pl +ffffffff83513350 B pf_pktdelay_pl +ffffffff835134f8 B pf_status +ffffffff835136e0 B tree_id +ffffffff835136e8 B tree_src_tracking +ffffffff835136f0 B pf_sn_item_pl +ffffffff83513898 B pf_statetbl +ffffffff835138a0 B pf_state_item_pl +ffffffff83513a48 B pf_state_key_pl +ffffffff83513bf0 B pf_purge_states_limit +ffffffff83513bf8 B pf_rule_item_pl +ffffffff83513da0 b pf_purge_expired_states.cur +ffffffff83513da8 B pf_tcp_secret_init +ffffffff83513db0 B pf_tcp_secret +ffffffff83513dc0 B pf_tcp_secret_ctx +ffffffff83513e90 B pf_tcp_iss_off +ffffffff83513ea0 B pf_queues +ffffffff83513ec0 B pf_queues_active +ffffffff83513ec8 B pf_queues_inactive +ffffffff83513ed0 B pf_rule_pl +ffffffff83514078 B pf_queue_pl +ffffffff83515000 B pf_frent_pl +ffffffff835151a8 B pf_frnode_pl +ffffffff83515350 B pf_frag_pl +ffffffff835154f8 B pf_state_scrub_pl +ffffffff835156a0 B pf_fragqueue +ffffffff835156b0 B pf_frag_mtx +ffffffff835156c0 B pf_nfrents +ffffffff835156c8 B pf_frnode_tree +ffffffff83516000 B pf_anchors +ffffffff83516008 B pf_main_anchor +ffffffff83516510 B pf_anchor_pl +ffffffff83517000 B pf_ioctl_trans +ffffffff83517008 B pf_default_rule +ffffffff83517548 B pf_tag_pl +ffffffff835176f0 B pf_default_rule_new +ffffffff83517c30 B pf_anchor_stack +ffffffff83517c38 B pf_trans_set +ffffffff83517c60 B pf_tcount +ffffffff83519000 B pfr_ktable_pl +ffffffff835191b0 B pfr_kentry_pl +ffffffff835196a8 B pfr_kcounters_pl +ffffffff83519850 B pfr_ffaddr +ffffffff83519860 B pfr_nulltable +ffffffff83519c88 B pfr_ktables +ffffffff83519c90 B pfr_ktable_cnt +ffffffff83519c94 B pfr_mask +ffffffff8351a000 B pf_osfp_list +ffffffff8351a008 B pf_osfp_entry_pl +ffffffff8351a1b0 B pf_osfp_pl +ffffffff8351b000 B pfi_all +ffffffff8351b008 B pfi_addr_pl +ffffffff8351b1b0 B pfi_buffer_max +ffffffff8351b1b8 B pfi_buffer +ffffffff8351b1c0 B pfi_ifs +ffffffff8351b1c8 B pfi_buffer_cnt +ffffffff8351c000 b pf_syncookie_status +ffffffff8351d000 B hfsc_class_pl +ffffffff8351d1a8 B hfsc_internal_sc_pl +ffffffff8351e000 B pflog_ifs +ffffffff8351f000 b pfsynccounters +ffffffff8351f008 b pfsyncif +ffffffff8351f010 b pfsync_deferrals_pool +ffffffff83520000 B pflowif_list +ffffffff83520008 B pflow_counters +ffffffff83521000 B bios +ffffffff83522000 b opened +ffffffff83522004 b evqueue_head +ffffffff83522008 b evqueue_tail +ffffffff8352200c b evqueue_count +ffffffff83522010 b hotplug_klist +ffffffff83522030 b evqueue +ffffffff83523000 B pppoe_softc_list +ffffffff83524000 B dt_tracing +ffffffff83524008 B dtdev_list +ffffffff83524010 B dt_probe_list +ffffffff83524020 B dt_nprobes +ffffffff83524024 B allowdt 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acpibtn_lids +ffffffff8383a000 B cst_stats +ffffffff8383b000 B acpihpet_attached +ffffffff8383c000 b acpiec_wait.acpiecnowait +ffffffff8383d000 B acpitz_cpu_setperf +ffffffff8383e000 B acpimadt_busses +ffffffff83841000 B acpimadt_isa_bus +ffffffff83841030 b lapic_map +ffffffff83842000 B acpidmar_ddb +ffffffff83842010 b dmar_bdf.bdf +ffffffff83842030 B acpidmar_sc +ffffffff83842038 B domain_map_page +ffffffff83842040 b dom_bdf.mmm +ffffffff83842070 b iommu_init.niommu +ffffffff83842078 b acpidmar_pci_attach.dom +ffffffff83842080 b sid_flag +ffffffff83882080 b ivhd_showpage.show +ffffffff83882084 b ivhd_iommu_init.niommu +ffffffff83882088 b acpidmar_intr.ofe.0 +ffffffff83882090 b acpidmar_intr.ofe.1 +ffffffff83883000 b dwiic_i2c_intr_string.irqstr +ffffffff83884000 B acpihve_attached +ffffffff83885000 B efi_jmpbuf +ffffffff83886000 B vm_pool +ffffffff838861a8 B vcpu_pool +ffffffff83886350 B vmm_softc +ffffffff83887000 B l1tf_flush_region +ffffffff83888000 B sdmmc_verbose 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