--- 7.4/2024-03-01T07:17:08Z/2024-02-03T00:00:00Z/nm-bsd-ot14.txt Fri Mar 1 19:43:04 2024 +++ 7.4/2024-03-01T07:17:08Z/2024-02-04T00:00:00Z/nm-bsd-ot14.txt Fri Mar 1 22:31:04 2024 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -025f8000 T __kernel_kutext_phys -025fc000 C __kernel_cptext_phys -025fd000 C __kernel_rodata_phys -02eef000 R __kernel_kutext_page_phys -02ef1000 C __kernel_randomdata_phys -031ae000 R __kernel_data_phys -03504000 D __kernel_kudata_phys -03505000 C __kernel_bss_phys +025ed000 T __kernel_kutext_phys +025f1000 C __kernel_cptext_phys +025f2000 C __kernel_rodata_phys +02ee2000 R __kernel_kutext_page_phys +02ee4000 C __kernel_randomdata_phys +031a0000 R __kernel_data_phys +034f6000 D __kernel_kudata_phys +034f7000 C __kernel_bss_phys 03a00000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -3975,97 +3975,97 @@ ffffffff811d9e60 T sr_error ffffffff811d9f00 T sr_meta_probe ffffffff811da140 T sr_meta_getdevname ffffffff811da200 T sr_rw -ffffffff811da4b0 T sr_meta_rw -ffffffff811da520 T sr_meta_clear -ffffffff811da6b0 T sr_meta_init -ffffffff811da8d0 T sr_uuid_generate -ffffffff811da930 T sr_checksum -ffffffff811da9b0 T sr_meta_init_complete -ffffffff811daa30 T sr_meta_opt_handler -ffffffff811daa80 T sr_meta_save_callback -ffffffff811daae0 T sr_meta_save -ffffffff811dade0 T sr_meta_read -ffffffff811dafe0 T sr_meta_validate -ffffffff811db200 T sr_meta_opt_load -ffffffff811db460 T sr_meta_native_bootprobe -ffffffff811db850 T sr_boot_assembly -ffffffff811dc360 T sr_ioctl_createraid -ffffffff811dce10 T sr_map_root -ffffffff811dd0c0 T sr_warn -ffffffff811dd160 T sr_hotplug_register -ffffffff811dd1f0 T sr_hotplug_unregister -ffffffff811dd290 T sr_disk_attach -ffffffff811dd320 T sr_bio_ioctl -ffffffff811dd340 T sr_shutdown -ffffffff811dd3c0 T sr_info -ffffffff811dd460 T sr_ccb_alloc -ffffffff811dd5c0 T sr_ccb_put -ffffffff811dd650 T sr_ccb_free -ffffffff811dd720 T sr_ccb_get -ffffffff811dd7e0 T sr_ccb_rw -ffffffff811dd9b0 T sr_ccb_done -ffffffff811ddae0 T sr_wu_alloc -ffffffff811ddc30 T sr_wu_done_callback -ffffffff811dde30 T sr_wu_put -ffffffff811ddff0 T sr_wu_free -ffffffff811de200 T sr_wu_get -ffffffff811de2c0 T sr_wu_release_ccbs -ffffffff811de400 T sr_wu_init -ffffffff811de4a0 T sr_wu_enqueue_ccb -ffffffff811de530 T sr_wu_done -ffffffff811de580 T sr_raid_recreate_wu -ffffffff811de700 T sr_raid_startwu -ffffffff811de860 T sr_scsi_wu_put -ffffffff811de8d0 T sr_scsi_done -ffffffff811de940 T sr_scsi_wu_get -ffffffff811de960 T sr_bio_handler -ffffffff811decc0 T sr_ioctl_inq -ffffffff811ded80 T sr_ioctl_vol -ffffffff811defc0 T sr_ioctl_disk -ffffffff811df150 T sr_ioctl_setstate -ffffffff811df2c0 T sr_ioctl_deleteraid -ffffffff811df3e0 T sr_ioctl_discipline -ffffffff811df4b0 T sr_ioctl_installboot -ffffffff811df980 T sr_rebuild_percent -ffffffff811dfa00 T sr_hotspare -ffffffff811dffb0 T sr_rebuild_init -ffffffff811e0480 T sr_chunk_in_use -ffffffff811e0540 T sr_hotspare_rebuild_callback -ffffffff811e0550 T sr_hotspare_rebuild -ffffffff811e0880 T sr_rebuild_start -ffffffff811e08f0 T sr_roam_chunks -ffffffff811e09e0 T sr_discipline_init -ffffffff811e0bc0 T sr_already_assembled -ffffffff811e0c60 T sr_uuid_format -ffffffff811e0d70 T sr_sensors_create -ffffffff811e0e40 T sr_discipline_shutdown -ffffffff811e1090 T sr_find_discipline -ffffffff811e1110 T sr_chunks_unwind -ffffffff811e11d0 T sr_discipline_free -ffffffff811e13b0 T sr_sensors_delete -ffffffff811e1400 T sr_alloc_resources -ffffffff811e1460 T sr_free_resources -ffffffff811e1540 T sr_rebuild -ffffffff811e1c40 T sr_raid_inquiry -ffffffff811e1da0 T sr_raid_read_cap -ffffffff811e1f30 T sr_raid_tur -ffffffff811e1fb0 T sr_raid_request_sense -ffffffff811e2020 T sr_raid_start_stop -ffffffff811e2050 T sr_raid_sync -ffffffff811e2120 T sr_raid_intr -ffffffff811e2190 T sr_set_chunk_state -ffffffff811e2270 T sr_set_vol_state -ffffffff811e2370 T sr_schedule_wu -ffffffff811e24b0 T sr_block_get -ffffffff811e24d0 T sr_block_put -ffffffff811e24f0 T sr_checksum_print -ffffffff811e2640 T sr_uuid_print -ffffffff811e2780 T sr_validate_stripsize -ffffffff811e27e0 T sr_quiesce -ffffffff811e2860 T sr_validate_io -ffffffff811e2a40 T sr_rebuild_thread -ffffffff811e2a80 T sr_sensors_refresh -ffffffff811e2af0 T sr_hibernate_io +ffffffff811da4a0 T sr_meta_rw +ffffffff811da510 T sr_meta_clear +ffffffff811da6a0 T sr_meta_init +ffffffff811da8c0 T sr_uuid_generate +ffffffff811da920 T sr_checksum +ffffffff811da9a0 T sr_meta_init_complete +ffffffff811daa20 T sr_meta_opt_handler +ffffffff811daa70 T sr_meta_save_callback +ffffffff811daad0 T sr_meta_save +ffffffff811dadd0 T sr_meta_read +ffffffff811dafd0 T sr_meta_validate +ffffffff811db1f0 T sr_meta_opt_load +ffffffff811db450 T sr_meta_native_bootprobe +ffffffff811db840 T sr_boot_assembly +ffffffff811dc350 T sr_ioctl_createraid +ffffffff811dce00 T sr_map_root +ffffffff811dd0b0 T sr_warn +ffffffff811dd150 T sr_hotplug_register +ffffffff811dd1e0 T sr_hotplug_unregister +ffffffff811dd280 T sr_disk_attach +ffffffff811dd310 T sr_bio_ioctl +ffffffff811dd330 T sr_shutdown +ffffffff811dd3b0 T sr_info +ffffffff811dd450 T sr_ccb_alloc +ffffffff811dd5b0 T sr_ccb_put +ffffffff811dd640 T sr_ccb_free +ffffffff811dd710 T sr_ccb_get +ffffffff811dd7d0 T sr_ccb_rw +ffffffff811dd990 T sr_ccb_done +ffffffff811ddac0 T sr_wu_alloc +ffffffff811ddc10 T sr_wu_done_callback +ffffffff811dde10 T sr_wu_put +ffffffff811ddfd0 T sr_wu_free +ffffffff811de1e0 T sr_wu_get +ffffffff811de2a0 T sr_wu_release_ccbs +ffffffff811de3e0 T sr_wu_init +ffffffff811de480 T sr_wu_enqueue_ccb +ffffffff811de510 T sr_wu_done +ffffffff811de560 T sr_raid_recreate_wu +ffffffff811de6e0 T sr_raid_startwu +ffffffff811de840 T sr_scsi_wu_put +ffffffff811de8b0 T sr_scsi_done +ffffffff811de920 T sr_scsi_wu_get +ffffffff811de940 T sr_bio_handler +ffffffff811deca0 T sr_ioctl_inq +ffffffff811ded60 T sr_ioctl_vol +ffffffff811defa0 T sr_ioctl_disk +ffffffff811df130 T sr_ioctl_setstate +ffffffff811df2a0 T sr_ioctl_deleteraid +ffffffff811df3c0 T sr_ioctl_discipline +ffffffff811df490 T sr_ioctl_installboot +ffffffff811df960 T sr_rebuild_percent +ffffffff811df9e0 T sr_hotspare +ffffffff811dff90 T sr_rebuild_init +ffffffff811e0460 T sr_chunk_in_use +ffffffff811e0520 T sr_hotspare_rebuild_callback +ffffffff811e0530 T sr_hotspare_rebuild +ffffffff811e0860 T sr_rebuild_start +ffffffff811e08d0 T sr_roam_chunks +ffffffff811e09c0 T sr_discipline_init +ffffffff811e0ba0 T sr_already_assembled +ffffffff811e0c40 T sr_uuid_format +ffffffff811e0d50 T sr_sensors_create +ffffffff811e0e20 T sr_discipline_shutdown +ffffffff811e1070 T sr_find_discipline +ffffffff811e10f0 T sr_chunks_unwind +ffffffff811e11b0 T sr_discipline_free +ffffffff811e1390 T sr_sensors_delete +ffffffff811e13e0 T sr_alloc_resources +ffffffff811e1440 T sr_free_resources +ffffffff811e1520 T sr_rebuild +ffffffff811e1c20 T sr_raid_inquiry +ffffffff811e1d80 T sr_raid_read_cap +ffffffff811e1f10 T sr_raid_tur +ffffffff811e1f90 T sr_raid_request_sense +ffffffff811e2000 T sr_raid_start_stop +ffffffff811e2030 T sr_raid_sync +ffffffff811e2100 T sr_raid_intr +ffffffff811e2170 T sr_set_chunk_state +ffffffff811e2250 T sr_set_vol_state +ffffffff811e2350 T sr_schedule_wu +ffffffff811e2490 T sr_block_get +ffffffff811e24b0 T sr_block_put +ffffffff811e24d0 T sr_checksum_print +ffffffff811e2620 T sr_uuid_print +ffffffff811e2760 T sr_validate_stripsize +ffffffff811e27c0 T sr_quiesce +ffffffff811e2840 T sr_validate_io +ffffffff811e2a20 T sr_rebuild_thread +ffffffff811e2a60 T sr_sensors_refresh +ffffffff811e2ad0 T sr_hibernate_io ffffffff811e4000 T sr_concat_discipline_init ffffffff811e4080 T sr_concat_assemble ffffffff811e40c0 T sr_concat_create @@ -5788,7 +5788,7 @@ ffffffff812afb10 T _rw_obj_alloc_flags ffffffff812afb80 T rw_obj_hold ffffffff812afc50 T rw_obj_free ffffffff812b0000 T physio -ffffffff812b0430 T minphys +ffffffff812b0420 T minphys ffffffff812b1000 T procinit ffffffff812b1260 T uid_find ffffffff812b1370 T uid_release @@ -6924,85 +6924,86 @@ ffffffff8132a7e0 T m_tag_init ffffffff8132a810 T m_tag_first ffffffff8132a840 T m_tag_next ffffffff8132b000 T filt_sordetach -ffffffff8132b020 T filt_solisten -ffffffff8132b100 T filt_somodify -ffffffff8132b190 T filt_soprocess -ffffffff8132b230 T filt_soread -ffffffff8132b310 T filt_sowdetach -ffffffff8132b330 T filt_sowrite -ffffffff8132b430 T filt_soexcept -ffffffff8132b4f0 T klist_soassertlk -ffffffff8132b500 T klist_solock -ffffffff8132b540 T klist_sounlock -ffffffff8132b550 T soinit -ffffffff8132b5e0 T soalloc -ffffffff8132b6c0 T socreate -ffffffff8132b8e0 T sofree -ffffffff8132bb40 T sobind -ffffffff8132bbc0 T solisten -ffffffff8132bcb0 T sounsplice -ffffffff8132be80 T sorflush -ffffffff8132bf80 T soreaper -ffffffff8132bfd0 T soclose -ffffffff8132c2b0 T sodisconnect -ffffffff8132c320 T soabort -ffffffff8132c350 T soaccept -ffffffff8132c400 T soconnect -ffffffff8132c4d0 T soconnect2 -ffffffff8132c580 T sosend -ffffffff8132cb60 T m_getuio -ffffffff8132cd30 T sbsync -ffffffff8132cd90 T soreceive -ffffffff8132dd40 T soshutdown -ffffffff8132ddd0 T sosplice -ffffffff8132e1f0 T soidle -ffffffff8132e240 T sotask -ffffffff8132e280 T somove -ffffffff8132ecf0 T sorwakeup -ffffffff8132edb0 T sowwakeup -ffffffff8132ee50 T soput -ffffffff8132ee90 T sosetopt -ffffffff8132f390 T sogetopt -ffffffff8132f830 T sohasoutofband -ffffffff8132f870 T soo_kqfilter -ffffffff8132f930 T sobuf_print -ffffffff8132fa70 T so_print +ffffffff8132b020 T filt_soread +ffffffff8132b1f0 T filt_sormodify +ffffffff8132b2d0 T filt_sorprocess +ffffffff8132b3e0 T filt_sowdetach +ffffffff8132b400 T filt_sowrite +ffffffff8132b560 T filt_sowmodify +ffffffff8132b640 T filt_sowprocess +ffffffff8132b750 T filt_soexcept +ffffffff8132b860 T soinit +ffffffff8132b8f0 T soalloc +ffffffff8132b9f0 T socreate +ffffffff8132bb90 T sofree +ffffffff8132bdf0 T sobind +ffffffff8132be70 T solisten +ffffffff8132bf60 T sounsplice +ffffffff8132c130 T sorflush +ffffffff8132c250 T soreaper +ffffffff8132c2a0 T soclose +ffffffff8132c580 T sodisconnect +ffffffff8132c5f0 T soabort +ffffffff8132c620 T soaccept +ffffffff8132c6d0 T soconnect +ffffffff8132c7a0 T soconnect2 +ffffffff8132c850 T sosend +ffffffff8132ce30 T m_getuio +ffffffff8132d000 T sbsync +ffffffff8132d060 T soreceive +ffffffff8132dff0 T soshutdown +ffffffff8132e080 T sosplice +ffffffff8132e4a0 T soidle +ffffffff8132e4f0 T sotask +ffffffff8132e530 T somove +ffffffff8132efa0 T sorwakeup +ffffffff8132f060 T sowwakeup +ffffffff8132f100 T soput +ffffffff8132f140 T sosetopt +ffffffff8132f640 T sogetopt +ffffffff8132fae0 T sohasoutofband +ffffffff8132fb20 T sofilt_lock +ffffffff8132fb70 T sofilt_unlock +ffffffff8132fbd0 T soo_kqfilter +ffffffff8132fc60 T sobuf_print +ffffffff8132fda0 T so_print ffffffff81331000 T soisconnecting -ffffffff813310a0 T soassertlocked -ffffffff81331130 T soisconnected -ffffffff813313a0 T solock_persocket -ffffffff813313e0 T sounlock -ffffffff81331420 T solock -ffffffff81331460 T soqremque -ffffffff813315d0 T soqinsque -ffffffff81331730 T soisdisconnecting +ffffffff81331050 T soassertlocked +ffffffff81331180 T soisconnected +ffffffff81331530 T solock_persocket +ffffffff81331570 T sounlock +ffffffff813315b0 T solock +ffffffff813315f0 T soqremque +ffffffff813316c0 T soqinsque +ffffffff81331780 T soisdisconnecting ffffffff813317e0 T soisdisconnected -ffffffff81331890 T sonewconn -ffffffff81331ca0 T soreserve -ffffffff81331e80 T socantsendmore -ffffffff81331f00 T socantrcvmore -ffffffff81331f80 T solock_shared -ffffffff81331fe0 T solock_pair -ffffffff81332120 T sounlock_shared -ffffffff81332180 T sosleep_nsec -ffffffff81332290 T sbwait -ffffffff81332340 T sblock -ffffffff81332450 T sbunlock -ffffffff81332510 T sowakeup -ffffffff813325d0 T sbreserve -ffffffff813326e0 T sbrelease -ffffffff81332730 T sbcheckreserve -ffffffff813327a0 T sbchecklowmem -ffffffff81332800 T sbflush -ffffffff813329a0 T sbappend -ffffffff81332ab0 T sbappendrecord -ffffffff81332c30 T sbcompress -ffffffff81332ea0 T sbappendstream -ffffffff81332fb0 T sbappendaddr -ffffffff81333260 T sbappendcontrol -ffffffff81333480 T sbdrop -ffffffff813336e0 T sbdroprecord -ffffffff813337a0 T sbcreatecontrol +ffffffff81331840 T sonewconn +ffffffff81331ce0 T soreserve +ffffffff81331e60 T socantsendmore +ffffffff81331e90 T socantrcvmore +ffffffff81331ec0 T solock_shared +ffffffff81331f20 T solock_pair +ffffffff81332060 T sounlock_shared +ffffffff813320c0 T soassertlocked_readonly +ffffffff81332150 T sosleep_nsec +ffffffff81332260 T sbwait +ffffffff813322d0 T sblock +ffffffff813323e0 T sbunlock +ffffffff81332470 T sowakeup +ffffffff81332540 T sbreserve +ffffffff81332600 T sbrelease +ffffffff81332650 T sbcheckreserve +ffffffff813326c0 T sbchecklowmem +ffffffff81332720 T sbflush +ffffffff813328c0 T sbappend +ffffffff81332970 T sbappendrecord +ffffffff81332a90 T sbcompress +ffffffff81332d00 T sbappendstream +ffffffff81332dc0 T sbappendaddr +ffffffff81333020 T sbappendcontrol +ffffffff81333240 T sbdrop +ffffffff81333450 T sbdroprecord +ffffffff81333510 T sbcreatecontrol ffffffff81334000 T sys_socket ffffffff813341c0 T sys_bind ffffffff81334320 T getsock @@ -7067,45 +7068,45 @@ ffffffff8133a980 T unp_scan ffffffff8133aa30 T unp_remove_gcrefs ffffffff8133ab10 T unp_restore_gcrefs ffffffff8133b000 T buf_put -ffffffff8133b160 T bufinit -ffffffff8133b4a0 T bufcache_init -ffffffff8133b560 T bufadjust -ffffffff8133b600 T bufcache_recover_dmapages -ffffffff8133b950 T bufcache_adjust -ffffffff8133baf0 T bufbackoff -ffffffff8133bcc0 T bufcache_gethighcleanbuf -ffffffff8133bd00 T bufcache_take -ffffffff8133bee0 T buf_flip_high -ffffffff8133c040 T buf_flip_dma -ffffffff8133c190 T bio_doread -ffffffff8133c280 T getblk -ffffffff8133c3d0 T brelse -ffffffff8133c5c0 T bread -ffffffff8133c680 T biowait -ffffffff8133c780 T breadn -ffffffff8133c930 T incore -ffffffff8133c9e0 T bread_cluster_callback -ffffffff8133cc50 T biodone -ffffffff8133cd80 T bread_cluster -ffffffff8133d180 T buf_get -ffffffff8133d4e0 T bwrite -ffffffff8133d670 T bdwrite -ffffffff8133d6f0 T bawrite -ffffffff8133d710 T buf_dirty -ffffffff8133d7a0 T buf_undirty -ffffffff8133d830 T bufcache_release -ffffffff8133db00 T geteblk -ffffffff8133db50 T buf_daemon -ffffffff8133dd90 T bufcache_getdirtybuf -ffffffff8133ddc0 T bcstats_print -ffffffff8133dea0 T buf_adjcnt -ffffffff8133df00 T chillbufs -ffffffff8133e040 T bufcache_getcleanbuf -ffffffff8133e390 T discard_buffer -ffffffff8133e400 T bufcache_getcleanbuf_range -ffffffff8133e490 T bufcache_getdmacleanbuf -ffffffff8133e510 T hibernate_suspend_bufcache -ffffffff8133e660 T hibernate_resume_bufcache +ffffffff8133b140 T bufinit +ffffffff8133b480 T bufcache_init +ffffffff8133b540 T bufadjust +ffffffff8133b5e0 T bufcache_recover_dmapages +ffffffff8133b930 T bufcache_adjust +ffffffff8133bad0 T bufbackoff +ffffffff8133bca0 T bufcache_gethighcleanbuf +ffffffff8133bce0 T bufcache_take +ffffffff8133bec0 T buf_flip_high +ffffffff8133c020 T buf_flip_dma +ffffffff8133c170 T bio_doread +ffffffff8133c260 T getblk +ffffffff8133c3b0 T brelse +ffffffff8133c570 T bread +ffffffff8133c630 T biowait +ffffffff8133c730 T breadn +ffffffff8133c8e0 T incore +ffffffff8133c990 T bread_cluster_callback +ffffffff8133cc00 T biodone +ffffffff8133cd10 T bread_cluster +ffffffff8133d110 T buf_get +ffffffff8133d460 T bwrite +ffffffff8133d5f0 T bdwrite +ffffffff8133d670 T bawrite +ffffffff8133d690 T buf_dirty +ffffffff8133d720 T buf_undirty +ffffffff8133d7b0 T bufcache_release +ffffffff8133da80 T geteblk +ffffffff8133dad0 T buf_daemon +ffffffff8133dcc0 T bufcache_getdirtybuf +ffffffff8133dcf0 T bcstats_print +ffffffff8133ddd0 T buf_adjcnt +ffffffff8133de30 T chillbufs +ffffffff8133df70 T bufcache_getcleanbuf +ffffffff8133e2c0 T discard_buffer +ffffffff8133e330 T bufcache_getcleanbuf_range +ffffffff8133e3c0 T bufcache_getdmacleanbuf +ffffffff8133e440 T hibernate_suspend_bufcache +ffffffff8133e590 T hibernate_resume_bufcache ffffffff8133f000 T buf_mem_init ffffffff8133f0d0 T buf_acquire ffffffff8133f140 T buf_map @@ -7219,18 +7220,17 @@ ffffffff8134a880 T buf_replacevnode ffffffff8134a9b0 T reassignbuf ffffffff8134ab40 T vn_isdisk ffffffff8134ab80 T vfs_buf_print -ffffffff8134aca0 T vfs_vnode_print -ffffffff8134ae20 T vfs_mount_print -ffffffff8134b110 T copy_statfs_info -ffffffff8134b250 t buf_rb_bufs_RBT_COMPARE +ffffffff8134ac50 T vfs_vnode_print +ffffffff8134af20 T vfs_mount_print +ffffffff8134b210 T copy_statfs_info +ffffffff8134b350 t buf_rb_bufs_RBT_COMPARE ffffffff8134c000 T vn_initialize_syncerd ffffffff8134c060 T vn_syncer_add_to_worklist ffffffff8134c140 T syncer_thread -ffffffff8134c4a0 T speedup_syncer -ffffffff8134c520 T sync_fsync -ffffffff8134c6a0 T sync_inactive -ffffffff8134c760 T sync_print -ffffffff8134c7a0 T vfs_allocate_syncvnode +ffffffff8134c480 T sync_fsync +ffffffff8134c600 T sync_inactive +ffffffff8134c6c0 T sync_print +ffffffff8134c700 T vfs_allocate_syncvnode ffffffff8134d000 T sys_mount ffffffff8134d540 T checkdirs ffffffff8134d670 T sys_unmount @@ -7307,20 +7307,20 @@ ffffffff81352020 T dotruncate ffffffff81352120 T sys_truncate ffffffff81352210 T sys_ftruncate ffffffff81352310 T sys_fsync -ffffffff81352430 T sys_rename -ffffffff81352460 T dorenameat -ffffffff813526d0 T sys_renameat -ffffffff81352700 T sys_mkdir -ffffffff81352720 T domkdirat -ffffffff81352870 T sys_mkdirat -ffffffff81352890 T sys_rmdir -ffffffff813528b0 T sys_getdents -ffffffff81352a80 T sys_umask -ffffffff81352b30 T sys_revoke -ffffffff81352c70 T sys_pread -ffffffff81352cf0 T sys_preadv -ffffffff81352dc0 T sys_pwrite -ffffffff81352e40 T sys_pwritev +ffffffff81352400 T sys_rename +ffffffff81352430 T dorenameat +ffffffff813526a0 T sys_renameat +ffffffff813526d0 T sys_mkdir +ffffffff813526f0 T domkdirat +ffffffff81352840 T sys_mkdirat +ffffffff81352860 T sys_rmdir +ffffffff81352880 T sys_getdents +ffffffff81352a50 T sys_umask +ffffffff81352b00 T sys_revoke +ffffffff81352c40 T sys_pread +ffffffff81352cc0 T sys_preadv +ffffffff81352d90 T sys_pwrite +ffffffff81352e10 T sys_pwritev ffffffff81353000 T VOP_ISLOCKED ffffffff81353050 T VOP_LOOKUP ffffffff813530b0 T VOP_CREATE @@ -7388,9 +7388,9 @@ ffffffff813588d0 T spec_print ffffffff81358940 T spec_read ffffffff81358c50 T spec_setattr ffffffff81358cf0 T spec_strategy -ffffffff81358d70 T spec_write -ffffffff81359050 T spec_kqfilter -ffffffff813590d0 T spec_open_clone +ffffffff81358d40 T spec_write +ffffffff81359020 T spec_kqfilter +ffffffff813590a0 T spec_open_clone ffffffff8135a000 T dead_lock ffffffff8135a0d0 T dead_ebadf ffffffff8135a100 T dead_bmap @@ -7417,12 +7417,14 @@ ffffffff8135b7b0 T fifo_write ffffffff8135b850 T fifo_kqfilter ffffffff8135b940 T filt_fifordetach ffffffff8135b960 T filt_fiforead -ffffffff8135ba20 T filt_fifomodify -ffffffff8135baa0 T filt_fifoprocess -ffffffff8135bb40 T filt_fifowdetach -ffffffff8135bb60 T filt_fifowrite -ffffffff8135bc10 T filt_fifoexcept -ffffffff8135bc80 T fifo_printinfo +ffffffff8135ba70 T filt_fiformodify +ffffffff8135bb10 T filt_fiforprocess +ffffffff8135bbd0 T filt_fifowdetach +ffffffff8135bbf0 T filt_fifowrite +ffffffff8135bd00 T filt_fifowmodify +ffffffff8135bda0 T filt_fifowprocess +ffffffff8135be60 T filt_fifoexcept +ffffffff8135bf30 T fifo_printinfo ffffffff8135c000 T unix2dostime ffffffff8135c3d0 T dos2unixtime ffffffff8135c610 T dos2unixfn @@ -9479,14 +9481,15 @@ ffffffff81431000 T divert_attach ffffffff81431090 T divert_detach ffffffff814310e0 T divert_lock ffffffff81431140 T divert_unlock -ffffffff814311a0 T divert_bind -ffffffff814311e0 T divert_shutdown -ffffffff81431220 T divert_send -ffffffff81431260 T divert_init -ffffffff814312b0 T divert_output -ffffffff81431550 T divert_packet -ffffffff814317d0 T divert_sysctl_divstat -ffffffff81431880 T divert_sysctl +ffffffff814311a0 T divert_locked +ffffffff81431210 T divert_bind +ffffffff81431250 T divert_shutdown +ffffffff81431290 T divert_send +ffffffff814312d0 T divert_init +ffffffff81431320 T divert_output +ffffffff814315c0 T divert_packet +ffffffff81431840 T divert_sysctl_divstat +ffffffff814318f0 T divert_sysctl ffffffff81432000 T icmp_init ffffffff81432080 T icmp_mtudisc_timeout ffffffff81432180 T icmp_do_error @@ -9583,16 +9586,17 @@ ffffffff8143f000 T rip_attach ffffffff8143f0f0 T rip_detach ffffffff8143f170 T rip_lock ffffffff8143f1d0 T rip_unlock -ffffffff8143f230 T rip_bind -ffffffff8143f310 T rip_connect -ffffffff8143f3a0 T rip_disconnect -ffffffff8143f420 T rip_shutdown -ffffffff8143f460 T rip_send -ffffffff8143f540 T rip_init -ffffffff8143f560 T rip_input -ffffffff8143f900 T rip_output -ffffffff8143fae0 T rip_chkhdr -ffffffff8143fbe0 T rip_ctloutput +ffffffff8143f230 T rip_locked +ffffffff8143f2a0 T rip_bind +ffffffff8143f380 T rip_connect +ffffffff8143f410 T rip_disconnect +ffffffff8143f490 T rip_shutdown +ffffffff8143f4d0 T rip_send +ffffffff8143f5b0 T rip_init +ffffffff8143f5d0 T rip_input +ffffffff8143f970 T rip_output +ffffffff8143fb50 T rip_chkhdr +ffffffff8143fc50 T rip_ctloutput ffffffff81440000 T tcp_trace ffffffff81441000 T tcp_reass ffffffff81441380 t tcpstat_pkt @@ -9604,26 +9608,27 @@ ffffffff81444fb0 T syn_cache_add ffffffff81445600 T tcp_del_sackholes ffffffff814456c0 T tcp_dooptions ffffffff81445bd0 T tcp_xmit_timer -ffffffff81445d20 T tcp_clean_sackreport -ffffffff81445da0 T tcp_mss -ffffffff81446020 T tcp_sack_partialack -ffffffff814460d0 T tcp_newreno_partialack -ffffffff814461c0 T tcp_seq_subtract -ffffffff814461f0 T tcp_pulloutofband -ffffffff814462b0 T tcp_update_sack_list -ffffffff81446770 T tcp_sack_option -ffffffff81446c90 T tcp_hdrsz -ffffffff81446d00 T tcp_mss_update -ffffffff81446e50 T tcp_mss_adv -ffffffff81446f10 T syn_cache_rm -ffffffff814470a0 T syn_cache_put -ffffffff81447110 T syn_cache_init -ffffffff81447220 T syn_cache_insert -ffffffff81447800 T syn_cache_timer -ffffffff81447a10 T syn_cache_respond -ffffffff81448030 T syn_cache_cleanup -ffffffff81448150 T syn_cache_lookup -ffffffff814483b0 T syn_cache_unreach +ffffffff81445d20 t sb_notify +ffffffff81445d90 T tcp_clean_sackreport +ffffffff81445e10 T tcp_mss +ffffffff81446090 T tcp_sack_partialack +ffffffff81446140 T tcp_newreno_partialack +ffffffff81446230 T tcp_seq_subtract +ffffffff81446260 T tcp_pulloutofband +ffffffff81446320 T tcp_update_sack_list +ffffffff814467e0 T tcp_sack_option +ffffffff81446d00 T tcp_hdrsz +ffffffff81446d70 T tcp_mss_update +ffffffff81446ec0 T tcp_mss_adv +ffffffff81446f80 T syn_cache_rm +ffffffff81447110 T syn_cache_put +ffffffff81447180 T syn_cache_init +ffffffff81447290 T syn_cache_insert +ffffffff81447870 T syn_cache_timer +ffffffff81447a80 T syn_cache_respond +ffffffff814480a0 T syn_cache_cleanup +ffffffff814481c0 T syn_cache_lookup +ffffffff81448420 T syn_cache_unreach ffffffff81449000 T tcp_sack_output ffffffff81449080 T tcp_sack_adjust ffffffff81449100 T tcp_output @@ -9691,20 +9696,21 @@ ffffffff81452000 T udp_attach ffffffff81452100 T udp_detach ffffffff81452150 T udp_lock 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+ffffffff814c3d00 T ffs_cgread +ffffffff814c3db0 T ffs_alloccgblk +ffffffff814c4140 T ffs_mapsearch +ffffffff814c4400 T ffs_clusteracct +ffffffff814c4630 T ffs_freefile ffffffff814c5000 T ffs1_balloc -ffffffff814c5e30 T ffs2_balloc -ffffffff814c6e90 T ffs_balloc +ffffffff814c5c30 T ffs2_balloc +ffffffff814c6a30 T ffs_balloc ffffffff814c7000 T ffs_update -ffffffff814c71e0 T ffs_truncate -ffffffff814c80e0 T ffs_indirtrunc +ffffffff814c71f0 T ffs_truncate +ffffffff814c7fc0 T ffs_indirtrunc ffffffff814c9000 T ffs_bufatoff ffffffff814c9100 T ffs_fragacct ffffffff814c91f0 T ffs_checkoverlap @@ -10312,47164 +10318,47029 @@ ffffffff814c9440 T ffs_setblock ffffffff814c94c0 T ffs_isfreeblock ffffffff814c9550 T ffs_vinit ffffffff814ca000 T ffs_mount -ffffffff814ca7c0 T ffs_unmount -ffffffff814ca970 T ffs_statfs -ffffffff814caa90 T ffs_sync -ffffffff814cad10 T ffs_vget -ffffffff814cb110 T ffs_fhtovp -ffffffff814cb190 T ffs_vptofh -ffffffff814cb1f0 T ffs_init -ffffffff814cb2e0 T ffs_sysctl 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ffs_oldfscompat +ffffffff814cc950 T ffs1_compat_write +ffffffff814cc9c0 T ffs_sync_vnode ffffffff814cd000 T ffs_fsync -ffffffff814cd2b0 T ffs_read -ffffffff814cd540 T ffs_reclaim -ffffffff814cd5e0 T ffs_write -ffffffff814cdb00 T ffsfifo_reclaim -ffffffff814ce000 T sema_init -ffffffff814ce040 T sema_get -ffffffff814ce100 T sema_release -ffffffff814ce190 T add_to_worklist -ffffffff814ce240 T softdep_process_worklist -ffffffff814ce490 t softdep_freequeue_process -ffffffff814ce5a0 T clear_inodedeps -ffffffff814ce8a0 T clear_remove -ffffffff814ceaa0 T process_worklist_item -ffffffff814ced20 T handle_workitem_remove -ffffffff814cf020 T handle_workitem_freeblocks -ffffffff814cf320 T handle_workitem_freefrag -ffffffff814cf3f0 T handle_workitem_freefile -ffffffff814cf4e0 T softdep_move_dependencies -ffffffff814cf5d0 T softdep_flushworklist -ffffffff814cf700 T softdep_flushfiles -ffffffff814cf7c0 T pagedep_lookup -ffffffff814cfaf0 T inodedep_lookup -ffffffff814cfe40 T request_cleanup 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uaddr_stack_brk_select -ffffffff814fbfc0 T uaddr_stack_brk_create -ffffffff814fc020 t uaddr_free_rbtree_RBT_COMPARE -ffffffff814fd000 T amap_chunk_get -ffffffff814fd180 T amap_chunk_free -ffffffff814fd240 T amap_init -ffffffff814fd360 T amap_alloc -ffffffff814fd440 t amap_alloc1 -ffffffff814fd710 T amap_free -ffffffff814fd860 T amap_wipeout -ffffffff814fda60 T amap_copy -ffffffff814fe000 T amap_pp_adjref -ffffffff814fe370 T amap_cow_now -ffffffff814fe5e0 T amap_splitref -ffffffff814fe740 T amap_pp_establish -ffffffff814fe7f0 T amap_wiperange -ffffffff814feb30 T amap_wiperange_chunk -ffffffff814fec50 T amap_swap_off -ffffffff814fee40 T amap_lookup -ffffffff814fef60 T amap_lookups -ffffffff814ff120 T amap_populate -ffffffff814ff1f0 T amap_add -ffffffff814ff360 T amap_unadd -ffffffff814ff5b0 T amap_ref -ffffffff814ff610 t amap_adjref_anons -ffffffff814ff740 T amap_unref -ffffffff81500000 T uvm_anon_init -ffffffff81500060 T uvm_analloc -ffffffff815000c0 T uvm_anfree_list -ffffffff815002d0 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drm_property_create_blob -ffffffff81980bf0 t drm_property_free_blob -ffffffff81980c70 T drm_property_blob_put -ffffffff81980cb0 T drm_property_destroy_user_blobs -ffffffff81980d30 T drm_property_blob_get -ffffffff81980d70 T drm_property_lookup_blob -ffffffff81980d90 T drm_property_replace_global_blob -ffffffff81980ee0 T drm_property_replace_blob -ffffffff81980f50 T drm_mode_getblob_ioctl -ffffffff81981010 T drm_mode_createblob_ioctl -ffffffff81981110 T drm_mode_destroyblob_ioctl -ffffffff81981210 T drm_property_change_valid_get -ffffffff81981470 T drm_property_change_valid_put -ffffffff81982000 T drm_rect_intersect -ffffffff81982080 T drm_rect_clip_scaled -ffffffff819822f0 T drm_rect_calc_hscale -ffffffff819823c0 T drm_rect_calc_vscale -ffffffff81982490 T drm_rect_debug_print -ffffffff819825b0 T drm_rect_rotate -ffffffff81982670 T drm_rect_rotate_inv -ffffffff81983000 T drm_self_refresh_helper_update_avg_times -ffffffff81983150 T drm_self_refresh_helper_alter_state -ffffffff819832e0 T drm_self_refresh_helper_init -ffffffff81983470 t drm_self_refresh_helper_entry_work -ffffffff819835d0 T drm_self_refresh_helper_cleanup -ffffffff81983650 t __delayed_work_tick -ffffffff81984000 T drm_suballoc_manager_init -ffffffff81984180 T drm_suballoc_manager_fini -ffffffff81984290 t drm_suballoc_try_free -ffffffff81984380 T drm_suballoc_new -ffffffff81984da0 t drm_suballoc_event -ffffffff81984ee0 T drm_suballoc_free -ffffffff81986000 T drm_syncobj_find -ffffffff81986080 T drm_syncobj_add_point -ffffffff81986190 t syncobj_wait_syncobj_func -ffffffff81986240 t syncobj_eventfd_entry_func -ffffffff81986320 T drm_syncobj_replace_fence -ffffffff819863d0 T drm_syncobj_find_fence -ffffffff81986720 t drm_syncobj_fence_add_wait -ffffffff819867f0 T drm_syncobj_free -ffffffff81986870 T drm_syncobj_create -ffffffff81986a40 T drm_syncobj_get_handle -ffffffff81986b60 T drm_syncobj_get_fd -ffffffff81986bb0 T drm_syncobj_open -ffffffff81986be0 T drm_syncobj_release -ffffffff81986c20 t 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drm_update_vblank_count -ffffffff819895e0 T drm_vblank_disable_and_save -ffffffff81989730 T drm_vblank_init -ffffffff819898b0 t vblank_disable_fn -ffffffff81989930 t drm_vblank_init_release -ffffffff819899c0 T drm_dev_has_vblank -ffffffff819899f0 T drm_crtc_vblank_waitqueue -ffffffff81989a40 T drm_calc_timestamping_constants -ffffffff81989c60 T drm_crtc_vblank_helper_get_vblank_timestamp_internal -ffffffff8198a1b0 T drm_crtc_vblank_helper_get_vblank_timestamp -ffffffff8198a1d0 T drm_crtc_vblank_count -ffffffff8198a260 T drm_crtc_vblank_count_and_time -ffffffff8198a320 t drm_vblank_count_and_time -ffffffff8198a3d0 T drm_crtc_next_vblank_start -ffffffff8198a520 T drm_crtc_arm_vblank_event -ffffffff8198a600 T drm_crtc_send_vblank_event -ffffffff8198a7b0 t send_vblank_event -ffffffff8198a860 T drm_vblank_get -ffffffff8198a960 t drm_vblank_enable -ffffffff8198ab60 T drm_crtc_vblank_get -ffffffff8198ac60 T drm_vblank_put -ffffffff8198ad90 T drm_crtc_vblank_put -ffffffff8198adb0 T drm_wait_one_vblank -ffffffff8198b2a0 T drm_crtc_wait_one_vblank -ffffffff8198b2c0 T drm_crtc_vblank_off -ffffffff8198b6b0 T drm_crtc_vblank_reset -ffffffff8198b7e0 T drm_crtc_set_max_vblank_count -ffffffff8198b8c0 T drm_crtc_vblank_on -ffffffff8198ba10 t drm_reset_vblank_timestamp -ffffffff8198bbf0 T drm_crtc_vblank_restore -ffffffff8198bfd0 T drm_legacy_modeset_ctl_ioctl -ffffffff8198c1f0 T drm_wait_vblank_ioctl -ffffffff8198c740 t drm_wait_vblank_reply -ffffffff8198c850 t drm_queue_vblank_event -ffffffff8198cb90 T drm_handle_vblank -ffffffff8198ce80 t drm_handle_vblank_events -ffffffff8198d110 T drm_crtc_handle_vblank -ffffffff8198d130 T drm_crtc_get_sequence_ioctl -ffffffff8198d300 T drm_crtc_queue_sequence_ioctl -ffffffff8198d5c0 t __get_vblank_counter -ffffffff8198e000 T drm_handle_vblank_works -ffffffff8198e1a0 T drm_vblank_cancel_pending_works -ffffffff8198e2e0 T drm_vblank_work_schedule -ffffffff8198e550 T drm_vblank_work_cancel_sync -ffffffff8198e6a0 T drm_vblank_work_flush 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hdmi_audio_infoframe_pack_only -ffffffff819908d0 T hdmi_audio_infoframe_pack -ffffffff81990920 T hdmi_audio_infoframe_pack_for_dp -ffffffff81990a10 T hdmi_vendor_infoframe_init -ffffffff81990a70 T hdmi_vendor_infoframe_check -ffffffff81990b10 T hdmi_vendor_infoframe_pack_only -ffffffff81990cd0 T hdmi_vendor_infoframe_pack -ffffffff81990d70 T hdmi_drm_infoframe_init -ffffffff81990dd0 T hdmi_drm_infoframe_check -ffffffff81990e20 T hdmi_drm_infoframe_pack_only -ffffffff81991010 T hdmi_drm_infoframe_pack -ffffffff81991060 T hdmi_infoframe_check -ffffffff819911b0 T hdmi_infoframe_pack_only -ffffffff819913d0 T hdmi_infoframe_pack -ffffffff81991540 T hdmi_infoframe_log -ffffffff81992430 T hdmi_drm_infoframe_unpack_only -ffffffff81992510 T hdmi_infoframe_unpack -ffffffff81993000 T list_sort -ffffffff81994000 T radix_tree_lookup -ffffffff819940b0 T radix_tree_iter_find -ffffffff81994180 T radix_tree_delete -ffffffff81994310 T radix_tree_iter_delete -ffffffff81994330 T radix_tree_insert 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drm_dp_128b132b_link_training_failed -ffffffff81998340 T drm_dp_read_clock_recovery_delay -ffffffff81998450 T drm_dp_read_channel_eq_delay -ffffffff81998550 T drm_dp_128b132b_read_aux_rd_interval -ffffffff81998600 T drm_dp_link_train_clock_recovery_delay -ffffffff81998690 t __8b10b_clock_recovery_delay_us -ffffffff81998710 T drm_dp_link_train_channel_eq_delay -ffffffff81998780 T drm_dp_phy_name -ffffffff819987c0 T drm_dp_lttpr_link_train_clock_recovery_delay -ffffffff819987e0 T drm_dp_lttpr_link_train_channel_eq_delay -ffffffff81998850 T drm_dp_link_rate_to_bw_code -ffffffff819988c0 T drm_dp_bw_code_to_link_rate -ffffffff81998920 T drm_dp_dpcd_probe -ffffffff81998a60 t drm_dp_dpcd_access -ffffffff81998b90 T drm_dp_dpcd_read -ffffffff81998cc0 T drm_dp_dpcd_write -ffffffff81998dd0 T drm_dp_dpcd_read_link_status -ffffffff81998df0 T drm_dp_dpcd_read_phy_link_status -ffffffff81998ef0 T drm_dp_downstream_is_type -ffffffff81998f40 T drm_dp_downstream_is_tmds -ffffffff81998fb0 T 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aq1_mac_soft_reset_rbl +ffffffff8170ca00 T aq1_global_software_reset +ffffffff8170cb20 T aq1_mac_soft_reset_flb +ffffffff8170ced0 T aq2_interface_buffer_read +ffffffff8170d010 T aq1_fw_downld_dwords +ffffffff8170d330 T aq_hw_l3_filter_set +ffffffff8170d540 T aq_hw_init_tx_path +ffffffff8170d7b0 T aq_hw_init_rx_path +ffffffff8170dfc0 T aq_set_mac_addr +ffffffff8170e1d0 T aq_hw_qos_set +ffffffff8170e8c0 T aq2_filter_art_set +ffffffff8170ea70 T aq_get_linkmode +ffffffff8170eae0 T aq_txring_reset +ffffffff8170ee90 T aq_rxring_reset +ffffffff8170f390 T aq_rx_fill +ffffffff8170f5a0 T aq_rxeof +ffffffff8170f920 T aq_txeof +ffffffff8170fb00 T aq_update_link_status +ffffffff8170fba0 T aq_free_slots +ffffffff8170fc40 T aq_queue_up +ffffffff81710020 T aq_dmamem_alloc +ffffffff81710170 T aq_dmamem_free +ffffffff817101e0 T aq_queue_down +ffffffff81710490 T aq_invalidate_rx_desc_cache +ffffffff81710510 T aq_up +ffffffff81710930 T aq_down +ffffffff81710a90 T aq_rxrinfo +ffffffff81710b80 T aq_iff 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tulip_21040_auibnc_only_media_select +ffffffff81714320 T tulip_21041_mediainfo_init +ffffffff817143e0 T tulip_21041_media_probe +ffffffff817144c0 T tulip_21041_media_poll +ffffffff817147f0 T tulip_mii_get_phyaddr +ffffffff817148b0 T tulip_2114x_media_preset +ffffffff81714ad0 T tulip_null_media_poll +ffffffff81714b00 T tulip_21140_mediainit +ffffffff81714b50 T tulip_21140_evalboard_media_probe +ffffffff81714d30 T tulip_21140_accton_media_probe +ffffffff81714f50 T tulip_21140_smc9332_media_probe +ffffffff81715170 T tulip_21140_cogent_em100_media_probe +ffffffff817152e0 T tulip_21140_znyx_zx34x_media_probe +ffffffff81715530 T tulip_2114x_media_probe +ffffffff81715560 T tulip_delay_300ns +ffffffff81715670 T tulip_srom_idle +ffffffff81716010 T tulip_srom_read +ffffffff81716db0 T tulip_mii_writebits +ffffffff81717340 T tulip_mii_turnaround +ffffffff81717b10 T tulip_mii_readbits +ffffffff81717ef0 T tulip_identify_dec_nic +ffffffff81717fa0 T tulip_identify_znyx_nic +ffffffff817182a0 T tulip_identify_smc_nic +ffffffff81718470 T tulip_identify_cogent_nic +ffffffff81718560 T tulip_identify_accton_nic +ffffffff81718690 T tulip_identify_asante_nic +ffffffff81718960 T tulip_identify_compex_nic +ffffffff81718ab0 T tulip_srom_decode +ffffffff817196e0 T tulip_read_macaddr +ffffffff8171a050 T tulip_ifmedia_add +ffffffff8171a140 T tulip_ifmedia_change +ffffffff8171a320 T tulip_ifmedia_status +ffffffff8171a390 T tulip_alloc_rxmap +ffffffff8171a3d0 T tulip_free_rxmap +ffffffff8171a410 T tulip_alloc_txmap +ffffffff8171a450 T tulip_free_txmap +ffffffff8171a490 T tulip_addr_filter +ffffffff8171a7e0 T tulip_rx_intr +ffffffff8171ae00 T tulip_txput_setup +ffffffff8171b0b0 T tulip_tx_intr +ffffffff8171b4b0 T tulip_print_abnormal_interrupt +ffffffff8171b4e0 T tulip_intr_handler +ffffffff8171b870 T tulip_ifstart +ffffffff8171b940 T tulip_intr_shared +ffffffff8171b9b0 T tulip_intr_normal +ffffffff8171ba00 T tulip_ifioctl +ffffffff8171bb00 T tulip_ifwatchdog +ffffffff8171bc00 T tulip_busdma_allocmem +ffffffff8171bd90 T tulip_busdma_init +ffffffff8171bfb0 T tulip_initcsrs +ffffffff8171c0b0 T tulip_initring +ffffffff8171d000 T ep_pci_match +ffffffff8171d030 T ep_pci_attach +ffffffff8171e000 T pcn_match +ffffffff8171e070 T pcn_attach +ffffffff8171e7c0 T pcn_tick +ffffffff8171e810 T pcn_reset +ffffffff8171e880 T pcn_intr +ffffffff8171eaf0 T pcn_ioctl +ffffffff8171ec50 T pcn_start +ffffffff8171f0a0 T pcn_watchdog +ffffffff8171f110 T pcn_txintr +ffffffff8171f5a0 T pcn_init +ffffffff8171fe40 T pcn_stop +ffffffff8171ffc0 T pcn_rxintr +ffffffff817204d0 T pcn_spnd +ffffffff817205d0 T pcn_add_rxbuf +ffffffff817207c0 T pcn_rxdrain +ffffffff81720860 T pcn_set_filter +ffffffff817209c0 T pcn_79c970_mediainit +ffffffff81720ad0 T pcn_79c970_mediachange +ffffffff81720c60 T pcn_79c970_mediastatus +ffffffff81720ca0 T pcn_79c971_mediainit +ffffffff81720d70 T pcn_mii_readreg +ffffffff81720e30 T pcn_mii_writereg +ffffffff81720ed0 T pcn_mii_statchg +ffffffff81720f30 T pcn_79c971_mediachange +ffffffff81720f80 T pcn_79c971_mediastatus +ffffffff81721000 T siop_lookup_product +ffffffff817210a0 T siop_pci_attach_common +ffffffff81721520 T siop_pci_reset +ffffffff81722000 T siop_pci_match +ffffffff81722050 T siop_pci_attach +ffffffff81723000 T sii3114_read_reg +ffffffff81723060 T sii3114_write_reg +ffffffff817230d0 T pdc203xx_read_reg +ffffffff81723130 T pdc203xx_write_reg +ffffffff817231a0 T svwsata_read_reg +ffffffff81723210 T svwsata_write_reg +ffffffff81723260 T svwsata_lba48_write_reg +ffffffff817232b0 T pciide_pci_read +ffffffff81723300 T pciide_pci_write +ffffffff81723370 T default_chip_map +ffffffff817239d0 T artisea_chip_map +ffffffff81723c70 T piix_chip_map +ffffffff817242b0 T piixsata_chip_map +ffffffff817247f0 T sch_chip_map +ffffffff81724b50 T amd756_chip_map +ffffffff81724fb0 T ixp_chip_map +ffffffff81725360 T cmd_chip_map +ffffffff817254c0 T cmd0643_9_chip_map +ffffffff817257b0 T cmd680_chip_map +ffffffff81725990 T sii3112_chip_map +ffffffff81725d20 T sii3114_chip_map +ffffffff81726260 T apollo_chip_map +ffffffff81726900 T sata_chip_map +ffffffff81726b20 T cy693_chip_map +ffffffff81726ef0 T sis_chip_map +ffffffff81727690 T natsemi_chip_map +ffffffff81727b30 T ns_scx200_chip_map +ffffffff81727f00 T acer_chip_map +ffffffff817285c0 T hpt_chip_map +ffffffff81728ae0 T pdc202xx_chip_map +ffffffff817294e0 T pdcsata_chip_map +ffffffff81729ca0 T acard_chip_map +ffffffff81729f30 T serverworks_chip_map +ffffffff8172a280 T svwsata_chip_map +ffffffff8172a650 T nforce_chip_map +ffffffff8172aac0 T ite_chip_map +ffffffff8172ad80 T jmicron_chip_map +ffffffff8172b190 T phison_chip_map +ffffffff8172b4f0 T rdc_chip_map +ffffffff8172b980 T pciide_match +ffffffff8172ba20 T pciide_attach +ffffffff8172bb00 T pciide_detach +ffffffff8172bb60 T pciide_activate +ffffffff8172c290 T pciide_lookup_product +ffffffff8172c540 T pciide_dmacmd_read +ffffffff8172c570 T pciide_dmacmd_write +ffffffff8172c5a0 T pciide_dmactl_read +ffffffff8172c5d0 T pciide_dmactl_write +ffffffff8172c600 T pciide_dmatbl_write +ffffffff8172c630 T pciide_mapregs_compat +ffffffff8172c7b0 T pciide_unmapregs_compat +ffffffff8172c840 T pciide_mapregs_native +ffffffff8172cb30 T pciide_unmapregs_native +ffffffff8172cbc0 T pciide_mapreg_dma +ffffffff8172cd50 T pciide_dma_init +ffffffff8172cff0 T pciide_dma_start +ffffffff8172d070 T pciide_dma_finish +ffffffff8172d240 T pciide_unmapreg_dma +ffffffff8172d270 T pciide_intr_flag +ffffffff8172d480 T pciide_compat_intr +ffffffff8172d500 T pciide_pci_intr +ffffffff8172d5c0 T pciide_channel_dma_setup +ffffffff8172d690 T pciide_dma_table_setup +ffffffff8172d8e0 T pciide_irqack +ffffffff8172d930 T pciide_chansetup +ffffffff8172da10 T pciide_chanfree +ffffffff8172da60 T pciide_mapchan +ffffffff8172daf0 T pciide_unmap_chan +ffffffff8172dbc0 T pciide_chan_candisable +ffffffff8172dc30 T pciide_map_compat_intr +ffffffff8172dce0 T pciide_unmap_compat_intr +ffffffff8172dd40 T pciide_print_channels +ffffffff8172de10 T pciide_print_modes +ffffffff8172de20 T default_chip_unmap +ffffffff8172df00 T sata_setup_channel +ffffffff8172e020 T piix_timing_debug +ffffffff8172e050 T piix_setup_channel +ffffffff8172e540 T piix3_4_setup_channel +ffffffff8172ed40 T piix_setup_idetim_timings +ffffffff8172edb0 T piix_setup_idetim_drvs +ffffffff8172eec0 T piix_setup_sidetim_timings +ffffffff8172ef30 T amd756_setup_channel +ffffffff8172f2e0 T apollo_setup_channel +ffffffff8172f630 T cmd_channel_map +ffffffff8172f970 T cmd_pci_intr +ffffffff8172fa80 T cmd646_9_irqack +ffffffff8172fb80 T cmd0643_9_setup_channel +ffffffff8172ffb0 T cmd680_setup_channel +ffffffff817304a0 T cmd680_channel_map +ffffffff817307a0 T sii_fixup_cacheline +ffffffff81730a70 T sii3112_setup_channel +ffffffff81730c30 T sii3112_drv_probe +ffffffff81730f80 T sii3114_mapreg_dma +ffffffff81731240 T sii3114_chansetup +ffffffff81731300 T sii3114_mapchan +ffffffff817315f0 T sii3114_dmacmd_read +ffffffff81731630 T sii3114_dmacmd_write +ffffffff81731670 T sii3114_dmactl_read +ffffffff817316b0 T sii3114_dmactl_write +ffffffff817316f0 T sii3114_dmatbl_write +ffffffff81731730 T cy693_setup_channel +ffffffff81731950 T sis_hostbr_match +ffffffff81731a20 T sis_south_match +ffffffff81731a60 T sis_setup_channel +ffffffff81731db0 T sis96x_setup_channel +ffffffff81732060 T natsemi_irqack +ffffffff817320f0 T natsemi_setup_channel +ffffffff817324e0 T natsemi_pci_intr +ffffffff817325d0 T ns_scx200_setup_channel +ffffffff817328b0 T acer_dma_init +ffffffff817328f0 T acer_setup_channel +ffffffff81732d00 T acer_pci_intr +ffffffff81732de0 T hpt_setup_channel +ffffffff81733130 T hpt_pci_intr +ffffffff81733240 T pdc268_config_read +ffffffff817332b0 T pdc20268_setup_channel +ffffffff81733480 T pdc202xx_setup_channel +ffffffff817338d0 T pdc20262_dma_start +ffffffff81733a30 T pdc20262_dma_finish +ffffffff81733b00 T pdc20265_pci_intr +ffffffff81733cb0 T pdc202xx_pci_intr +ffffffff81733dc0 T pdc203xx_pci_intr +ffffffff81733eb0 T pdc205xx_pci_intr +ffffffff81733fe0 T pdc203xx_irqack +ffffffff81734070 T pdc203xx_setup_channel +ffffffff81734170 T pdc205xx_do_reset +ffffffff81734210 T pdc205xx_drv_probe +ffffffff81734490 T pdc203xx_dma_start +ffffffff81734550 T pdc203xx_dma_finish +ffffffff81734640 T serverworks_setup_channel +ffffffff81734a50 T serverworks_pci_intr +ffffffff81734b60 T svwsata_mapreg_dma +ffffffff81734c10 T svwsata_drv_probe +ffffffff81734ee0 T svwsata_mapchan +ffffffff81734fd0 T svwsata_dmacmd_read +ffffffff81735000 T svwsata_dmacmd_write +ffffffff81735030 T svwsata_dmactl_read +ffffffff81735060 T svwsata_dmactl_write +ffffffff81735090 T svwsata_dmatbl_write +ffffffff817350c0 T acard_setup_channel +ffffffff817354f0 T nforce_setup_channel +ffffffff81735830 T nforce_pci_intr +ffffffff81735920 T ite_setup_channel +ffffffff81735c80 T ixp_setup_channel +ffffffff81736030 T jmicron_setup_channel +ffffffff81736290 T phison_setup_channel +ffffffff817364a0 T sch_setup_channel +ffffffff817366a0 T rdc_setup_channel +ffffffff81736ac0 t ba5_read_4_ind +ffffffff81736b50 t ba5_write_4_ind +ffffffff81737000 T ppbmatch +ffffffff81737050 T ppbattach +ffffffff817377d0 T ppbdetach +ffffffff817378f0 T ppbactivate +ffffffff81737d60 T ppb_alloc_busrange +ffffffff81737f10 T ppb_hotplug_insert +ffffffff81737f70 T ppb_hotplug_rescan +ffffffff81737fb0 T ppb_hotplug_remove +ffffffff81738110 T ppb_hotplug_insert_finish +ffffffff81738140 T ppb_intr +ffffffff81738200 T ppb_alloc_resources +ffffffff817388f0 T ppbprint +ffffffff81739000 T cy_pci_match +ffffffff81739030 T cy_pci_attach +ffffffff8173a000 T rl_pci_match +ffffffff8173a060 T rl_pci_attach +ffffffff8173a220 T rl_pci_detach +ffffffff8173b000 T re_pci_probe +ffffffff8173b0a0 T re_pci_attach +ffffffff8173b3d0 T re_pci_detach +ffffffff8173b440 T re_pci_activate +ffffffff8173c000 T vr_probe +ffffffff8173c0d0 T vr_attach +ffffffff8173c6a0 T vr_activate +ffffffff8173c720 T vr_mii_readreg +ffffffff8173c880 T vr_mii_writereg +ffffffff8173c9d0 T vr_miibus_readreg +ffffffff8173ca40 T vr_miibus_writereg +ffffffff8173cab0 T vr_miibus_statchg +ffffffff8173cad0 T vr_setcfg +ffffffff8173ccf0 T vr_iff +ffffffff8173ce70 T vr_reset +ffffffff8173cf80 T vr_quirks +ffffffff8173d080 T vr_dmamem_alloc +ffffffff8173d1e0 T vr_dmamem_free +ffffffff8173d250 T vr_intr +ffffffff8173d480 T vr_chipinit +ffffffff8173d560 T vr_ioctl +ffffffff8173d700 T vr_start +ffffffff8173d8d0 T vr_watchdog +ffffffff8173d960 T vr_wol +ffffffff8173db10 T vr_ifmedia_upd +ffffffff8173db60 T vr_ifmedia_sts +ffffffff8173dbc0 T vr_tick +ffffffff8173dc40 T vr_rxtick +ffffffff8173dd20 T vr_stop +ffffffff8173dfb0 T vr_init +ffffffff8173e560 T vr_list_tx_init +ffffffff8173e660 T vr_list_rx_init +ffffffff8173e820 T vr_fill_rx_ring +ffffffff8173e8e0 T vr_alloc_mbuf +ffffffff8173ea50 T vr_rxeof +ffffffff8173ece0 T vr_rxeoc +ffffffff8173ee70 T vr_txeof +ffffffff8173f030 T vr_encap +ffffffff81740000 T txp_probe +ffffffff81740030 T txp_attach +ffffffff817401a0 T txp_attachhook +ffffffff817404d0 T txp_chip_init +ffffffff81740690 T txp_download_fw +ffffffff81740b10 T txp_alloc_rings +ffffffff81741680 T txp_command +ffffffff81741750 T txp_ifmedia_upd +ffffffff81741860 T txp_ifmedia_sts +ffffffff81741b20 T txp_ioctl +ffffffff81741c40 T txp_start +ffffffff81742000 T txp_watchdog +ffffffff81742030 T txp_capabilities +ffffffff817421e0 T txp_tick +ffffffff81742330 T txp_intr +ffffffff817425a0 T txp_reset_adapter +ffffffff817426a0 T txp_download_fw_wait +ffffffff81742790 T txp_download_fw_section +ffffffff81742b00 T txp_dma_malloc +ffffffff81742ca0 T txp_dma_free +ffffffff81742d20 T txp_rx_reclaim +ffffffff81742ff0 T txp_rxbuf_reclaim +ffffffff81743270 T txp_tx_reclaim +ffffffff81743410 T txp_init +ffffffff81743550 T txp_stop +ffffffff81743650 T txp_set_filter +ffffffff817437e0 T txp_command2 +ffffffff81743ae0 T txp_cmd_desc_numfree +ffffffff81743b40 T txp_response +ffffffff81743e10 T txp_rsp_fixup +ffffffff81743ef0 T txp_show_descriptor +ffffffff81745000 T init_audio_devices +ffffffff81745120 T init_BTSC +ffffffff817451e0 T set_audio +ffffffff81745570 T set_bctv_audio +ffffffff817458b0 T msp_autodetect +ffffffff81745ce0 T temp_mute +ffffffff81745d80 T set_BTSC +ffffffff81745da0 T bctv_gpio_write +ffffffff81745f10 T msp_read_id +ffffffff81745fd0 T dpl_read_id +ffffffff81746090 T dpl_autodetect +ffffffff81747000 T writeEEProm +ffffffff81747030 T readEEProm +ffffffff81747100 T signCard +ffffffff817471b0 T probeCard +ffffffff81749000 T bktr_name +ffffffff81749030 T common_bktr_attach +ffffffff81749330 t oformat_meteor_to_bt +ffffffff81749440 T common_bktr_intr +ffffffff81749a60 T video_open +ffffffff81749f10 t set_fps +ffffffff8174a050 T vbi_open +ffffffff8174a0f0 T tuner_open +ffffffff8174a140 T video_close +ffffffff8174a230 T tuner_close +ffffffff8174a260 T vbi_close +ffffffff8174a290 T video_read +ffffffff8174a450 t start_capture +ffffffff8174d1f0 T vbi_read +ffffffff8174d310 T video_ioctl +ffffffff8174e710 T bktr_common_ioctl +ffffffff8174eee0 T tuner_ioctl +ffffffff8174fc00 t remote_read +ffffffff8174fda0 T i2cWrite +ffffffff8174fec0 T i2cRead +ffffffff8174ffe0 T msp_dpl_read +ffffffff817502a0 T msp_dpl_write +ffffffff81750460 T msp_dpl_reset +ffffffff81750760 t i2c_write_byte +ffffffff81750940 t i2c_read_byte +ffffffff81750b60 t split +ffffffff81750d90 t getline +ffffffff81751000 t bktr_probe +ffffffff81751060 t bktr_attach +ffffffff817512e0 T bktr_get_info +ffffffff817513c0 T bktr_set_info +ffffffff81751520 T get_bktr_mem +ffffffff81751750 T free_bktr_mem +ffffffff817517b0 T bktropen +ffffffff81751870 T bktrclose +ffffffff817518f0 T bktrread +ffffffff81751980 T bktrwrite +ffffffff817519b0 T bktrioctl +ffffffff81751a50 T bktrmmap +ffffffff81751af0 t bktr_intr +ffffffff81752000 T select_tuner +ffffffff81752050 T tv_freq +ffffffff817522a0 T do_afc +ffffffff817523d0 T get_tuner_status +ffffffff817523f0 T tv_channel +ffffffff817524b0 T tuner_getchnlset +ffffffff81753000 T xl_pci_match +ffffffff81753030 T xl_pci_attach +ffffffff81753380 T xl_pci_detach +ffffffff81753410 T xl_pci_wol_power +ffffffff81753460 T xl_pci_intr_ack +ffffffff81754000 T fxp_pci_match +ffffffff81754030 T fxp_pci_attach +ffffffff81754350 T fxp_pci_detach +ffffffff81755000 T em_probe +ffffffff81755030 T em_attach +ffffffff81755530 T em_detach +ffffffff817555c0 T em_activate +ffffffff81755640 T em_defer_attach +ffffffff817556e0 T em_stop +ffffffff817557d0 T em_free_pci_resources +ffffffff81755a90 T em_setup_interface +ffffffff81755c80 T em_update_link_status +ffffffff81755e70 T em_local_timer +ffffffff81755f20 T em_82547_move_tail +ffffffff81755f60 T em_identify_hardware +ffffffff81756070 T em_allocate_pci_resources +ffffffff81756470 T em_allocate_desc_rings +ffffffff81756580 T em_hardware_init +ffffffff81756830 T em_kstat_attach +ffffffff81756980 T em_start +ffffffff81756c70 T em_encap +ffffffff817570d0 T em_82547_move_tail_locked +ffffffff81757300 T em_82547_update_fifo_head +ffffffff81757350 T em_ioctl +ffffffff81757620 T em_init +ffffffff81757990 T em_get_sffpage +ffffffff81757a50 T em_disable_intr +ffffffff81757b50 T em_iff +ffffffff81757e60 T em_initialize_receive_unit +ffffffff817585e0 T em_enable_intr +ffffffff81758740 T em_watchdog +ffffffff817588f0 T em_enable_hw_vlans +ffffffff81758990 T em_setup_transmit_structures +ffffffff81758b90 T em_initialize_transmit_unit +ffffffff817591f0 T em_setup_receive_structures +ffffffff81759330 T em_setup_queues_msix +ffffffff817599a0 T em_intr +ffffffff81759aa0 T em_txeof +ffffffff81759c70 T em_rxeof +ffffffff8175a100 T em_rxrefill_locked +ffffffff8175a210 T em_media_status +ffffffff8175a430 T em_flowstatus +ffffffff8175a530 T em_media_change +ffffffff8175a690 T em_tx_ctx_setup +ffffffff8175a810 T em_transmit_checksum_setup +ffffffff8175a8f0 T em_fill_descriptors +ffffffff8175a970 T em_82547_fifo_workaround +ffffffff8175a9e0 T em_82547_tx_fifo_reset +ffffffff8175ae40 T em_pci_clear_mwi +ffffffff8175ae70 T em_pci_set_mwi +ffffffff8175aea0 T em_smartspeed +ffffffff8175b090 T em_kstat_read +ffffffff8175b4d0 T em_flush_desc_rings +ffffffff8175b600 T em_free_transmit_structures +ffffffff8175b7d0 T em_free_receive_structures +ffffffff8175b9d0 T em_legacy_irq_quirk_spt +ffffffff8175bab0 T em_rxrefill +ffffffff8175baf0 T em_allocate_msix +ffffffff8175bd00 T em_allocate_legacy +ffffffff8175be20 T em_dma_free +ffffffff8175be90 T em_disable_aspm +ffffffff8175bf60 T em_dma_malloc +ffffffff8175c0f0 T em_allocate_transmit_structures +ffffffff8175c1e0 T em_get_buf +ffffffff8175c340 T em_allocate_receive_structures +ffffffff8175c510 T em_rxfill +ffffffff8175c640 T em_tbi_adjust_stats +ffffffff8175c810 T em_receive_checksum +ffffffff8175c880 T em_write_pci_cfg +ffffffff8175c8f0 T em_read_pci_cfg +ffffffff8175c960 T em_read_pcie_cap_reg +ffffffff8175c990 T em_flush_tx_ring +ffffffff8175cb00 T em_flush_rx_ring +ffffffff8175ccc0 T em_queue_intr_msix +ffffffff8175cd70 T em_link_intr_msix +ffffffff8175cea0 T em_enable_queue_intr_msix +ffffffff8175d000 T em_set_mac_type +ffffffff8175da20 T em_set_sfp_media_type_82575 +ffffffff8175dd70 T em_translate_82542_register +ffffffff8175dfa0 T em_read_sfp_data_byte +ffffffff8175e090 T em_set_media_type +ffffffff8175e300 T em_reset_hw +ffffffff8175eeb0 T em_disable_pciex_master +ffffffff8175ef80 T em_check_phy_reset_block +ffffffff8175f040 T em_gate_hw_phy_config_ich8lan +ffffffff8175f0e0 t em_get_software_flag +ffffffff8175f260 T em_hv_phy_workarounds_ich8lan +ffffffff8175f5f0 T em_lv_phy_workarounds_ich8lan +ffffffff8175f6f0 t em_phy_init_script +ffffffff8175f950 T em_read_eeprom +ffffffff8175ffc0 T em_set_eee_i350 +ffffffff817600e0 T em_init_hw +ffffffff81761b20 T em_phy_reset +ffffffff81761d10 T em_clear_vfta_i350 +ffffffff81761ef0 T em_read_phy_reg +ffffffff817620a0 T em_setup_link +ffffffff81764340 T em_enable_tx_pkt_filtering +ffffffff81764700 T em_clear_hw_cntrs +ffffffff81764ff0 T em_write_phy_reg +ffffffff81765170 T em_power_up_serdes_link_82575 +ffffffff81765260 T em_copper_link_autoneg +ffffffff81765390 T em_phy_setup_autoneg +ffffffff817654f0 T em_copper_link_postconfig +ffffffff817655c0 T em_config_collision_dist +ffffffff81765650 t em_config_mac_to_phy +ffffffff817657c0 t em_config_fc_after_link_up +ffffffff81765a10 t em_config_dsp_after_link_change +ffffffff817663b0 T em_force_mac_fc +ffffffff81766480 T em_check_for_link +ffffffff81766b00 T em_get_pcs_speed_and_duplex_82575 +ffffffff81766bc0 T em_k1_gig_workaround_hv +ffffffff81766cf0 T em_link_stall_workaround_hv +ffffffff81766dd0 T em_k1_workaround_lv +ffffffff81766e90 T em_k1_workaround_lpt_lp +ffffffff81767150 t em_check_downshift +ffffffff81767200 T em_set_eee_pchlan +ffffffff817672a0 t em_polarity_reversal_workaround +ffffffff817674e0 T em_get_speed_and_duplex +ffffffff81767990 T em_access_phy_wakeup_reg_bm +ffffffff81767af0 t em_write_phy_reg_ex +ffffffff81767d60 t em_read_phy_reg_ex +ffffffff81768210 T em_access_phy_debug_regs_hv +ffffffff817682e0 T em_access_phy_reg_hv +ffffffff81768450 t em_swfw_sync_acquire +ffffffff81768600 t em_swfw_sync_release +ffffffff81768770 T em_sgmii_uses_mdio_82575 +ffffffff817687d0 T em_read_phy_reg_i2c +ffffffff817688b0 T em_write_phy_reg_i2c +ffffffff81768980 T em_phy_hw_reset +ffffffff81768f90 T em_oem_bits_config_pchlan +ffffffff81769100 T em_initialize_M88E1512_phy +ffffffff817692c0 T em_init_eeprom_params +ffffffff817697d0 T em_get_flash_presence_i210 +ffffffff81769830 t em_acquire_eeprom +ffffffff81769a20 t em_read_eeprom_ich8 +ffffffff81769bf0 t em_release_eeprom +ffffffff81769d60 t em_standby_eeprom +ffffffff81769f50 t em_shift_out_ee_bits +ffffffff8176a0f0 t em_shift_in_ee_bits +ffffffff8176a230 T em_validate_eeprom_checksum +ffffffff8176a3d0 T em_write_eeprom +ffffffff8176a6f0 T em_update_eeprom_checksum +ffffffff8176a810 t em_commit_shadow_ram +ffffffff8176ad70 t em_write_eeprom_microwire +ffffffff8176aef0 t em_write_eeprom_spi +ffffffff8176b0b0 T em_read_part_num +ffffffff8176b150 T em_read_mac_addr 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ixgb_enable_hw_vlans +ffffffff81771530 T ixgb_setup_transmit_structures +ffffffff817716a0 T ixgb_initialize_transmit_unit +ffffffff81771810 T ixgb_setup_receive_structures +ffffffff81771890 T ixgb_initialize_receive_unit +ffffffff81771b20 T ixgb_intr +ffffffff81771d20 T ixgb_rxeof +ffffffff81772160 T ixgb_txeof +ffffffff81772340 T ixgb_media_status +ffffffff81772430 T ixgb_media_change +ffffffff81772480 T ixgb_free_transmit_structures +ffffffff817725b0 T ixgb_free_receive_structures +ffffffff817726e0 T ixgb_allocate_transmit_structures +ffffffff81772760 T ixgb_transmit_checksum_setup +ffffffff81772860 T ixgb_get_buf +ffffffff81772a10 T ixgb_allocate_receive_structures +ffffffff81772b90 T ixgb_receive_checksum +ffffffff81772bf0 T ixgb_write_pci_cfg +ffffffff81773000 T ixgb_validate_eeprom_checksum +ffffffff81773080 T ixgb_read_eeprom +ffffffff817732f0 T ixgb_update_eeprom_checksum +ffffffff81773350 T ixgb_write_eeprom +ffffffff81773830 t ixgb_shift_out_bits +ffffffff81773970 T ixgb_get_eeprom_data +ffffffff81773a10 T ixgb_get_eeprom_word +ffffffff81773ae0 T ixgb_get_ee_mac_addr +ffffffff81773be0 T ixgb_get_ee_pba_number +ffffffff81773ca0 T ixgb_get_ee_device_id +ffffffff81774000 T ixgb_mac_reset +ffffffff817741e0 T ixgb_adapter_stop +ffffffff81774320 T ixgb_init_hw +ffffffff81774620 T ixgb_init_rx_addrs +ffffffff81774750 T mac_addr_valid +ffffffff817747b0 T ixgb_clear_vfta +ffffffff81774830 T ixgb_clear_hw_cntrs +ffffffff81774f10 T ixgb_setup_fc +ffffffff817750a0 T ixgb_check_for_link +ffffffff817752b0 T ixgb_rar_set +ffffffff81775320 T ixgb_mc_addr_list_update +ffffffff817755a0 T ixgb_write_vfta +ffffffff817755d0 T ixgb_read_phy_reg +ffffffff81775ad0 T ixgb_write_phy_reg +ffffffff81775fc0 T ixgb_check_for_bad_link +ffffffff81776080 T ixgb_led_on +ffffffff817760d0 T ixgb_led_off +ffffffff81777000 T ixgbe_probe +ffffffff81777030 T ixgbe_attach +ffffffff81777580 T ixgbe_detach +ffffffff81777790 T ixgbe_activate +ffffffff817778a0 T ixgbe_identify_hardware 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ixgbe_config_gpie +ffffffff8177b4d0 T ixgbe_setup_vlan_hw_support +ffffffff8177b640 T ixgbe_configure_ivars +ffffffff8177b7f0 T ixgbe_set_ivar +ffffffff8177b9a0 T ixgbe_config_link +ffffffff8177bb40 T ixgbe_config_delay_values +ffffffff8177bc60 t ix_kstats_tick +ffffffff8177bd20 T ixgbe_enable_queue +ffffffff8177bdf0 T ixgbe_disable_queue +ffffffff8177bec0 T ixgbe_link_intr +ffffffff8177bed0 T ixgbe_intr +ffffffff8177c3a0 T ixgbe_queue_intr +ffffffff8177c4f0 T ixgbe_rxeof +ffffffff8177ca40 T ixgbe_txeof +ffffffff8177cbd0 T ixgbe_rxrefill +ffffffff8177cc90 T ixgbe_legacy_intr +ffffffff8177ce40 T ixgbe_update_link_status +ffffffff8177cf80 T ixgbe_handle_mod +ffffffff8177d0a0 T ixgbe_handle_msf +ffffffff8177d170 T ixgbe_handle_phy +ffffffff8177d200 T ixgbe_media_status +ffffffff8177d410 T ixgbe_media_change +ffffffff8177d4c0 T ixgbe_mc_array_itr +ffffffff8177d500 T ixgbe_setup_msix +ffffffff8177d590 T ixgbe_add_media_types +ffffffff8177d830 T ixgbe_dma_malloc +ffffffff8177da30 T ixgbe_dma_free +ffffffff8177dae0 T ixgbe_allocate_transmit_buffers +ffffffff8177dc00 T ixgbe_setup_transmit_ring +ffffffff8177dd50 T ixgbe_free_transmit_buffers +ffffffff8177de80 T ixgbe_get_buf +ffffffff8177dfd0 T ixgbe_allocate_receive_buffers +ffffffff8177e110 T ixgbe_setup_receive_ring +ffffffff8177e1f0 T ixgbe_rxfill +ffffffff8177e330 T ixgbe_initialize_rss_mapping +ffffffff8177e5a0 T ixgbe_map_queue_statistics +ffffffff8177e6c0 T ixgbe_free_receive_buffers +ffffffff8177e7e0 T ixgbe_rx_checksum +ffffffff8177e830 T ixgbe_read_pci_cfg +ffffffff8177e890 T ixgbe_write_pci_cfg +ffffffff8177e910 t ix_kstats_read +ffffffff8177ead0 t ix_rxq_kstats_read +ffffffff8177ec30 t ix_txq_kstats_read +ffffffff8177f000 T ixgbe_init_ops_generic +ffffffff8177f270 T ixgbe_init_eeprom_params_generic +ffffffff8177f320 T ixgbe_read_eerd_generic +ffffffff8177f420 T ixgbe_read_eeprom_bit_bang_generic +ffffffff8177f6c0 T ixgbe_write_eeprom_generic +ffffffff8177fb10 T ixgbe_validate_eeprom_checksum_generic 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ixgbe_update_mc_addr_list_generic +ffffffff81781ae0 T ixgbe_enable_mc_generic +ffffffff81781b50 T ixgbe_disable_mc_generic +ffffffff81781bb0 T ixgbe_enable_rx_generic +ffffffff81781c70 T ixgbe_disable_rx_generic +ffffffff81781d50 T ixgbe_fc_enable_generic +ffffffff81782180 T ixgbe_setup_fc_generic +ffffffff81782450 T ixgbe_fc_autoneg +ffffffff81782730 T ixgbe_device_supports_autoneg_fc +ffffffff81782820 T ixgbe_start_hw_gen2 +ffffffff81782a00 T ixgbe_identify_phy +ffffffff81782a60 T ixgbe_set_pci_config_data_generic +ffffffff81782ad0 T ixgbe_disable_rx +ffffffff81782b10 T ixgbe_disable_pcie_master +ffffffff81782c60 T ixgbe_read_eerd_buffer_generic +ffffffff81782da0 T ixgbe_poll_eerd_eewr_done +ffffffff81782e40 T ixgbe_write_eewr_buffer_generic +ffffffff81782fc0 T ixgbe_write_eewr_generic +ffffffff81783010 T ixgbe_acquire_eeprom +ffffffff81783190 T ixgbe_get_eeprom_semaphore +ffffffff817833a0 T ixgbe_release_eeprom_semaphore +ffffffff81783410 T ixgbe_ready_eeprom +ffffffff81783580 T ixgbe_shift_out_eeprom_bits +ffffffff81783740 T ixgbe_shift_in_eeprom_bits +ffffffff817838a0 T ixgbe_standby_eeprom +ffffffff81783980 T ixgbe_raise_eeprom_clk +ffffffff817839f0 T ixgbe_lower_eeprom_clk +ffffffff81783a60 T ixgbe_release_eeprom +ffffffff81783b40 T ixgbe_validate_mac_addr +ffffffff81783ba0 T ixgbe_init_uta_tables +ffffffff81783be0 T ixgbe_add_uc_addr +ffffffff81783c50 T ixgbe_mta_vector +ffffffff81783d00 T ixgbe_set_mta +ffffffff81783dc0 T ixgbe_negotiate_fc +ffffffff81783e70 T ixgbe_fc_autoneg_fiber +ffffffff81783f90 T ixgbe_fc_autoneg_backplane +ffffffff81784100 T ixgbe_fc_autoneg_copper +ffffffff81784220 T ixgbe_disable_sec_rx_path_generic +ffffffff817842e0 T ixgbe_enable_sec_rx_path_generic +ffffffff81784370 T ixgbe_enable_rx +ffffffff817843b0 T ixgbe_get_pcie_msix_count_generic +ffffffff81784430 T ixgbe_insert_mac_addr_generic +ffffffff81784640 T ixgbe_set_vmdq +ffffffff81784680 T ixgbe_set_rar +ffffffff817846d0 T ixgbe_clear_vmdq +ffffffff81784710 T ixgbe_clear_vmdq_generic +ffffffff817848c0 T ixgbe_set_vmdq_generic +ffffffff81784970 T ixgbe_init_uta_tables_generic +ffffffff817849f0 T ixgbe_find_vlvf_slot +ffffffff81784aa0 T ixgbe_set_vfta_generic +ffffffff81784bb0 T ixgbe_set_vlvf_generic +ffffffff81784e40 T ixgbe_clear_vfta_generic +ffffffff81784f40 T ixgbe_need_crosstalk_fix +ffffffff81784f90 T ixgbe_check_mac_link_generic +ffffffff81785180 T ixgbe_get_device_caps_generic +ffffffff817851d0 T ixgbe_calculate_checksum +ffffffff81785290 T ixgbe_hic_unlocked +ffffffff81785450 T ixgbe_host_interface_command +ffffffff81785620 T ixgbe_clear_tx_pending +ffffffff817857e0 T ixgbe_mng_present +ffffffff81785850 T ixgbe_mng_enabled +ffffffff81785910 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff81785cb0 T ixgbe_flap_tx_laser +ffffffff81785cf0 T ixgbe_check_link +ffffffff81785d40 T ixgbe_set_soft_rate_select_speed +ffffffff81785e30 T ixgbe_init_shared_code +ffffffff81785ee0 T ixgbe_set_mac_type +ffffffff81786080 T ixgbe_init_hw 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ixgbe_start_hw_82598 +ffffffff81787480 T ixgbe_reset_hw_82598 +ffffffff817877b0 T ixgbe_get_media_type_82598 +ffffffff81787870 T ixgbe_get_supported_physical_layer_82598 +ffffffff81787a40 T ixgbe_read_analog_reg8_82598 +ffffffff81787b00 T ixgbe_write_analog_reg8_82598 +ffffffff81787b80 T ixgbe_set_lan_id_multi_port_pcie_82598 +ffffffff81787c20 T ixgbe_enable_rx_dma_82598 +ffffffff81787c70 T ixgbe_set_vmdq_82598 +ffffffff81787d20 T ixgbe_clear_vmdq_82598 +ffffffff81787dd0 T ixgbe_set_vfta_82598 +ffffffff81787f00 T ixgbe_clear_vfta_82598 +ffffffff817880b0 T ixgbe_fc_enable_82598 +ffffffff81788510 T ixgbe_read_i2c_eeprom_82598 +ffffffff81788530 T ixgbe_check_mac_link_82598 +ffffffff817887d0 T ixgbe_setup_mac_link_82598 +ffffffff81788990 T ixgbe_get_link_capabilities_82598 +ffffffff81788a60 T ixgbe_setup_copper_link_82598 +ffffffff81788b70 T ixgbe_start_mac_link_82598 +ffffffff81788c90 T ixgbe_validate_link_ready +ffffffff81788d40 T ixgbe_read_i2c_phy_82598 +ffffffff81789000 T ixgbe_init_mac_link_ops_82599 +ffffffff81789190 T ixgbe_disable_tx_laser_multispeed_fiber +ffffffff81789260 T ixgbe_enable_tx_laser_multispeed_fiber +ffffffff817892e0 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff81789420 T ixgbe_setup_mac_link_82599 +ffffffff817896a0 T ixgbe_set_hard_rate_select_speed +ffffffff81789760 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff81789830 T ixgbe_setup_mac_link_smartspeed +ffffffff81789bc0 T ixgbe_init_phy_ops_82599 +ffffffff81789d10 T ixgbe_read_i2c_byte_82599 +ffffffff81789e90 T ixgbe_write_i2c_byte_82599 +ffffffff8178a010 T ixgbe_setup_copper_link_82599 +ffffffff8178a070 T ixgbe_setup_sfp_modules_82599 +ffffffff8178a230 T prot_autoc_read_82599 +ffffffff8178a360 T prot_autoc_write_82599 +ffffffff8178a4d0 T ixgbe_reset_pipeline_82599 +ffffffff8178a810 T ixgbe_init_ops_82599 +ffffffff8178a9f0 T ixgbe_identify_phy_82599 +ffffffff8178aa80 T ixgbe_reset_hw_82599 +ffffffff8178ae10 T ixgbe_get_media_type_82599 +ffffffff8178af40 T ixgbe_get_supported_physical_layer_82599 +ffffffff8178b110 T ixgbe_enable_rx_dma_82599 +ffffffff8178b180 T ixgbe_read_analog_reg8_82599 +ffffffff8178b240 T ixgbe_write_analog_reg8_82599 +ffffffff8178b2c0 T ixgbe_start_hw_82599 +ffffffff8178b3c0 T ixgbe_get_link_capabilities_82599 +ffffffff8178b500 T ixgbe_stop_mac_link_on_d3_82599 +ffffffff8178b5c0 T ixgbe_read_eeprom_82599 +ffffffff8178b5f0 T ixgbe_start_mac_link_82599 +ffffffff8178b7f0 T ixgbe_verify_fw_version_82599 +ffffffff8178c000 T ixgbe_init_ops_X540 +ffffffff8178c220 T ixgbe_init_eeprom_params_X540 +ffffffff8178c2b0 T ixgbe_read_eerd_X540 +ffffffff8178c340 T ixgbe_write_eewr_X540 +ffffffff8178c3d0 T ixgbe_update_eeprom_checksum_X540 +ffffffff8178c4a0 T ixgbe_validate_eeprom_checksum_X540 +ffffffff8178c590 T ixgbe_calc_eeprom_checksum_X540 +ffffffff8178c730 T ixgbe_reset_hw_X540 +ffffffff8178c920 T ixgbe_get_media_type_X540 +ffffffff8178c950 T ixgbe_get_supported_physical_layer_X540 +ffffffff8178c9d0 T ixgbe_start_hw_X540 +ffffffff8178ca20 T ixgbe_acquire_swfw_sync_X540 +ffffffff8178ce70 T ixgbe_release_swfw_sync_X540 +ffffffff8178cfa0 T ixgbe_init_swfw_sync_X540 +ffffffff8178d080 T ixgbe_setup_mac_link_X540 +ffffffff8178d0a0 T ixgbe_blink_led_start_X540 +ffffffff8178d1c0 T ixgbe_blink_led_stop_X540 +ffffffff8178d2c0 T ixgbe_get_link_capabilities_X540 +ffffffff8178d300 T ixgbe_update_flash_X540 +ffffffff8178d4e0 T ixgbe_poll_flash_update_done_X540 +ffffffff8178d570 T ixgbe_get_swfw_sync_semaphore +ffffffff8178d700 T ixgbe_release_swfw_sync_semaphore +ffffffff8178e000 T ixgbe_init_ops_X550 +ffffffff8178e110 T ixgbe_dmac_config_X550 +ffffffff8178e1f0 T ixgbe_dmac_config_tcs_X550 +ffffffff8178e340 T ixgbe_dmac_update_tcs_X550 +ffffffff8178e400 T ixgbe_set_source_address_pruning_X550 +ffffffff8178e4f0 T ixgbe_init_eeprom_params_X550 +ffffffff8178e570 T ixgbe_calc_eeprom_checksum_X550 +ffffffff8178e590 T ixgbe_read_ee_hostif_X550 +ffffffff8178e660 T ixgbe_write_ee_hostif_X550 +ffffffff8178e720 T ixgbe_update_eeprom_checksum_X550 +ffffffff8178e8c0 T ixgbe_validate_eeprom_checksum_X550 +ffffffff8178ea10 T ixgbe_disable_rx_x550 +ffffffff8178eb30 T ixgbe_led_on_t_X550em +ffffffff8178ebf0 T ixgbe_led_off_t_X550em +ffffffff8178ecb0 T ixgbe_read_cs4227 +ffffffff8178ece0 T ixgbe_write_cs4227 +ffffffff8178ed10 T ixgbe_read_pe +ffffffff8178ed60 T ixgbe_write_pe +ffffffff8178edc0 T ixgbe_reset_cs4227 +ffffffff8178f050 T ixgbe_check_cs4227 +ffffffff8178f200 T ixgbe_setup_mux_ctl +ffffffff8178f290 T ixgbe_identify_phy_x550em +ffffffff8178f4a0 T ixgbe_read_mng_if_sel_x550em +ffffffff8178f520 T ixgbe_fw_phy_activity +ffffffff8178f640 T ixgbe_get_phy_id_fw +ffffffff8178f750 T ixgbe_identify_phy_fw +ffffffff8178f870 T ixgbe_shutdown_fw_phy +ffffffff8178f8d0 T ixgbe_read_phy_reg_x550em +ffffffff8178f900 T ixgbe_write_phy_reg_x550em +ffffffff8178f930 T ixgbe_init_ops_X550EM +ffffffff8178fbd0 T ixgbe_get_bus_info_X550em +ffffffff8178fc20 T ixgbe_get_media_type_X550em +ffffffff8178fcf0 T ixgbe_setup_sfp_modules_X550em +ffffffff8178fe80 T ixgbe_get_link_capabilities_X550em +ffffffff8178ff50 T ixgbe_reset_hw_X550em +ffffffff817903d0 T ixgbe_get_supported_physical_layer_X550em +ffffffff81790550 T ixgbe_setup_fc_X550em +ffffffff817906b0 T ixgbe_init_phy_ops_X550em +ffffffff81790b80 T ixgbe_setup_fw_link +ffffffff81790ca0 T ixgbe_fc_autoneg_fw +ffffffff81790cd0 T ixgbe_setup_eee_fw +ffffffff81790d30 T ixgbe_init_ops_X550EM_a +ffffffff81790e60 T ixgbe_read_iosf_sb_reg_x550 +ffffffff81790fd0 T ixgbe_write_iosf_sb_reg_x550 +ffffffff81791140 T ixgbe_read_iosf_sb_reg_x550a +ffffffff817911d0 T ixgbe_write_iosf_sb_reg_x550a +ffffffff81791260 T ixgbe_acquire_swfw_sync_X550a +ffffffff817913a0 T ixgbe_release_swfw_sync_X550a +ffffffff81791440 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff81791480 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff817915e0 T ixgbe_setup_fc_backplane_x550em_a +ffffffff817917d0 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff817918c0 T ixgbe_init_ops_X550EM_x +ffffffff81791980 T ixgbe_acquire_swfw_sync_X550em +ffffffff81791a40 T ixgbe_release_swfw_sync_X550em +ffffffff81791ad0 T ixgbe_iosf_wait +ffffffff81791b80 T ixgbe_get_phy_token +ffffffff81791c00 T ixgbe_put_phy_token +ffffffff81791c80 T ixgbe_supported_sfp_modules_X550em +ffffffff81791d00 T ixgbe_identify_sfp_module_X550em +ffffffff81791d80 T ixgbe_init_mac_link_ops_X550em +ffffffff81791ec0 T ixgbe_restart_an_internal_phy_x550em +ffffffff81791fd0 T ixgbe_setup_sgmii +ffffffff817921a0 T ixgbe_setup_sgmii_fw +ffffffff817923a0 T ixgbe_setup_mac_link_sfp_x550a +ffffffff81792590 T ixgbe_setup_mac_link_sfp_x550em +ffffffff81792650 T ixgbe_setup_mac_link_t_X550em +ffffffff81792700 T ixgbe_check_link_t_X550em +ffffffff817927e0 T ixgbe_get_lasi_ext_t_x550em +ffffffff81792960 T ixgbe_enable_lasi_ext_t_x550em +ffffffff81792af0 T ixgbe_setup_kr_speed_x550em +ffffffff81792d00 T ixgbe_reset_phy_fw +ffffffff81792dd0 T ixgbe_check_overtemp_fw +ffffffff81792e60 T ixgbe_read_phy_reg_x550a +ffffffff81792f00 T ixgbe_write_phy_reg_x550a +ffffffff81792fb0 T ixgbe_setup_kr_x550em +ffffffff81793020 T ixgbe_setup_internal_phy_t_x550em +ffffffff81793180 T ixgbe_enter_lplu_t_x550em +ffffffff817933d0 T ixgbe_handle_lasi_ext_t_x550em +ffffffff81793450 T ixgbe_reset_phy_t_X550em +ffffffff817934a0 T ixgbe_set_mdio_speed +ffffffff81793570 T ixgbe_init_ext_t_x550em +ffffffff81793620 T ixgbe_setup_sfi_x550a +ffffffff817937d0 T ixgbe_setup_ixfi_x550em_x +ffffffff817939b0 T ixgbe_setup_ixfi_x550em +ffffffff81793b90 T ixgbe_ext_phy_t_x550em_get_link +ffffffff81793c20 T ixgbe_setup_phy_loopback_x550em +ffffffff81793e10 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff81793fb0 T ixgbe_write_ee_hostif_data_X550 +ffffffff81794020 T ixgbe_checksum_ptr_x550 +ffffffff817941b0 T ixgbe_calc_checksum_X550 +ffffffff81794340 T ixgbe_update_flash_X550 +ffffffff81794390 T ixgbe_get_lcd_t_x550em +ffffffff81794450 T ixgbe_set_mux +ffffffff81795000 T ixgbe_read_i2c_combined_generic_int +ffffffff81795260 T ixgbe_i2c_start +ffffffff817953b0 t ixgbe_out_i2c_byte_ack +ffffffff81795400 T ixgbe_clock_in_i2c_byte +ffffffff81795500 T ixgbe_clock_out_i2c_bit +ffffffff81795610 T ixgbe_i2c_stop +ffffffff81795790 T ixgbe_i2c_bus_clear +ffffffff817958a0 T ixgbe_read_i2c_combined_generic +ffffffff817958c0 T ixgbe_read_i2c_combined_generic_unlocked +ffffffff817958e0 T ixgbe_write_i2c_combined_generic_int +ffffffff81795aa0 T ixgbe_write_i2c_combined_generic +ffffffff81795ac0 T ixgbe_write_i2c_combined_generic_unlocked +ffffffff81795ae0 T ixgbe_init_phy_ops_generic +ffffffff81795c10 T ixgbe_identify_phy_generic +ffffffff81795ce0 T ixgbe_reset_phy_generic +ffffffff81795ef0 T ixgbe_read_phy_reg_generic +ffffffff81795f90 T ixgbe_write_phy_reg_generic +ffffffff81796030 T ixgbe_read_phy_reg_mdi +ffffffff81796190 T ixgbe_write_phy_reg_mdi +ffffffff817962f0 T ixgbe_setup_phy_link_generic +ffffffff817965a0 T ixgbe_setup_phy_link_speed_generic +ffffffff817965f0 T ixgbe_get_phy_firmware_version_generic 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ixgbe_is_sfp +ffffffff81797850 T ixgbe_identify_sfp_module_generic +ffffffff81797c40 T ixgbe_identify_qsfp_module_generic +ffffffff81797f30 T ixgbe_get_supported_phy_sfp_layer_generic +ffffffff817980d0 T ixgbe_is_sfp_probe +ffffffff81798120 T ixgbe_read_i2c_byte_generic_int +ffffffff81798320 T ixgbe_clock_out_i2c_byte +ffffffff81798480 T ixgbe_get_i2c_ack +ffffffff81798680 T ixgbe_write_i2c_byte_generic_int +ffffffff817987b0 T ixgbe_set_i2c_data +ffffffff81798960 T ixgbe_raise_i2c_clk +ffffffff81798a80 T ixgbe_lower_i2c_clk +ffffffff81798b10 T ixgbe_clock_in_i2c_bit +ffffffff81798cd0 T ixgbe_get_i2c_data +ffffffff81798d80 T ixgbe_set_copper_phy_power +ffffffff81799000 t ixl_match +ffffffff817990a0 t ixl_attach +ffffffff8179a5f0 t ixl_710_rd_ctl +ffffffff8179a6b0 t ixl_710_wr_ctl +ffffffff8179a780 t ixl_710_set_rss_key +ffffffff8179a900 t ixl_710_set_rss_lut +ffffffff8179a980 t ixl_atq_exec +ffffffff8179aaf0 t ixl_wakeup +ffffffff8179ab10 t ixl_722_rd_ctl +ffffffff8179ab40 t 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wi_pci_common_attach +ffffffff817e48f0 T wi_pci_plx_attach +ffffffff817e4be0 T wi_pci_plx_print_cis +ffffffff817e4de0 T wi_pci_tmd_attach +ffffffff817e4f40 T wi_pci_native_attach +ffffffff817e6000 T an_pci_match +ffffffff817e6030 T an_pci_attach +ffffffff817e7000 T iwi_match +ffffffff817e7030 T iwi_attach +ffffffff817e78c0 T iwi_activate +ffffffff817e7920 T iwi_intr +ffffffff817e7ba0 T iwi_reset +ffffffff817e7d80 T iwi_alloc_cmd_ring +ffffffff817e7f70 T iwi_alloc_tx_ring +ffffffff817e8170 T iwi_alloc_rx_ring +ffffffff817e8350 T iwi_read_prom_word +ffffffff817e89d0 T iwi_ioctl +ffffffff817e8b50 T iwi_start +ffffffff817e8cb0 T iwi_watchdog +ffffffff817e8d40 T iwi_newstate +ffffffff817e8fa0 T iwi_send_mgmt +ffffffff817e8fd0 T iwi_media_change +ffffffff817e9030 T iwi_media_status +ffffffff817e91a0 T iwi_init_task +ffffffff817e9210 T iwi_free_tx_ring +ffffffff817e9310 T iwi_free_cmd_ring +ffffffff817e93c0 T iwi_stop +ffffffff817e9650 T iwi_wakeup +ffffffff817e96f0 T iwi_init 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wpi_reset_tx_ring +ffffffff817f0af0 T wpi_read_eeprom_channels +ffffffff817f0c50 T wpi_read_eeprom_group +ffffffff817f0d60 T wpi_set_led +ffffffff817f0ec0 T wpi_scan +ffffffff817f1190 T wpi_auth +ffffffff817f15c0 T wpi_run +ffffffff817f1cb0 T wpi_iter_func +ffffffff817f1cd0 T wpi_power_calibration +ffffffff817f1d60 T wpi_ccmp_decap +ffffffff817f1e60 T wpi_rx_done +ffffffff817f2340 T wpi_tx_done +ffffffff817f24c0 T wpi_cmd_done +ffffffff817f25b0 T wpi_notif_intr +ffffffff817f29c0 T wpi_tx +ffffffff817f3120 T wpi_set_pslevel +ffffffff817f3290 T wpi_cmd +ffffffff817f35c0 T wpi_mrr_setup +ffffffff817f39a0 T wpi_set_timing +ffffffff817f3b40 T wpi_set_txpower +ffffffff817f3ce0 T wpi_get_power_index +ffffffff817f3e70 T wpi_config +ffffffff817f4670 T wpi_post_alive +ffffffff817f4870 T wpi_load_bootcode +ffffffff817f4c10 T wpi_load_firmware +ffffffff817f51e0 T wpi_read_firmware +ffffffff817f53a0 T wpi_clock_wait +ffffffff817f5470 T wpi_apm_stop_master +ffffffff817f5580 T wpi_nic_config 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iwn_ampdu_rx_start +ffffffff817fa080 T iwn_ampdu_rx_stop +ffffffff817fa150 T iwn_ampdu_tx_start +ffffffff817fa360 T iwn_ampdu_tx_stop +ffffffff817fa5e0 T iwn_newstate +ffffffff817fa8a0 T iwn_media_change +ffffffff817faa00 T iwn_radiotap_attach +ffffffff817faa90 T iwn_calib_timeout +ffffffff817facb0 T iwn_init_task +ffffffff817fad20 T iwn_free_tx_ring +ffffffff817faf10 T iwn_free_sched +ffffffff817fb000 T iwn_free_ict +ffffffff817fb0f0 T iwn_free_kw +ffffffff817fb1e0 T iwn_free_fwmem +ffffffff817fb2d0 T iwn4965_load_firmware +ffffffff817fb920 T iwn4965_read_eeprom +ffffffff817fba70 T iwn4965_post_alive +ffffffff817fbf40 T iwn4965_nic_config +ffffffff817fc020 T iwn4965_reset_sched +ffffffff817fc050 T iwn4965_update_sched +ffffffff817fc130 T iwn4965_update_rxon +ffffffff817fc2f0 T iwn4965_get_temperature +ffffffff817fc370 T iwn4965_get_rssi +ffffffff817fc3e0 T iwn4965_set_txpower +ffffffff817fc8d0 T iwn4965_init_gains +ffffffff817fca70 T iwn4965_set_gains +ffffffff817fcda0 T iwn4965_add_node +ffffffff817fce30 T iwn4965_tx_done +ffffffff817fcf90 T iwn4965_ampdu_tx_start +ffffffff817fd3a0 T iwn4965_ampdu_tx_stop +ffffffff817fd5a0 T iwn5000_load_firmware +ffffffff817fd6b0 T iwn5000_read_eeprom +ffffffff817fd900 T iwn5000_post_alive +ffffffff817fe120 T iwn5000_nic_config +ffffffff817fe500 T iwn5000_reset_sched +ffffffff817fe5f0 T iwn5000_update_sched +ffffffff817fe6e0 T iwn5000_update_rxon +ffffffff817fe8d0 T iwn5000_get_temperature +ffffffff817fe930 T iwn5000_get_rssi +ffffffff817fe980 T iwn5000_set_txpower +ffffffff817fe9d0 T iwn5000_init_gains +ffffffff817feb70 T iwn5000_set_gains +ffffffff817fee20 T iwn5000_add_node +ffffffff817fee50 T iwn5000_tx_done +ffffffff817ff060 T iwn5000_ampdu_tx_start +ffffffff817ff4a0 T iwn5000_ampdu_tx_stop +ffffffff817ff720 T iwn_free_rx_ring +ffffffff817ff910 T iwn_stop +ffffffff817ff990 T iwn_wakeup +ffffffff817ffa40 T iwn_init +ffffffff817ffd40 T iwn_nic_lock +ffffffff817ffe00 T iwn_eeprom_lock +ffffffff817ffed0 T iwn_init_otprom +ffffffff81800330 T iwn_clock_wait +ffffffff81800400 T iwn_read_prom_data +ffffffff818007e0 T iwn_dma_contig_alloc +ffffffff818009d0 T iwn_dma_contig_free +ffffffff81800a90 T iwn_reset_rx_ring +ffffffff81800c20 T iwn_reset_tx_ring +ffffffff81800d20 T iwn5000_ict_reset +ffffffff81800e00 T iwn_apm_init +ffffffff81801240 T iwn_apm_stop +ffffffff81801380 T iwn_read_eeprom_channels +ffffffff81801510 T iwn_read_eeprom_enhinfo +ffffffff81801690 T iwn_scan_abort +ffffffff81801820 T iwn_set_led +ffffffff818019e0 T iwn_cmd +ffffffff81801d20 T iwn_scan +ffffffff81802210 T iwn_auth +ffffffff818024c0 T iwn_run +ffffffff81802960 T iwn_iter_func +ffffffff818029f0 T iwn_set_link_quality +ffffffff81802e70 T iwn_ccmp_decap +ffffffff81802f70 T iwn_rx_phy +ffffffff81803050 T iwn_rx_done +ffffffff81803660 T iwn_ra_choose +ffffffff818036e0 T iwn_ampdu_rate_control +ffffffff81803820 T iwn_ht_single_rate_control +ffffffff81803a00 T iwn_rx_compressed_ba +ffffffff81803b90 T iwn_ampdu_txq_advance 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+ffffffff81807ed0 T iwn_config +ffffffff818083b0 T iwn6000_temp_offset_calib +ffffffff81808560 T iwn2000_temp_offset_calib +ffffffff81808740 T iwn_get_active_dwell_time +ffffffff81808780 T iwn_limit_dwell +ffffffff818087f0 T iwn_get_passive_dwell_time +ffffffff81808870 T iwn_rxon_configure_ht40 +ffffffff81808910 T iwn_update_rxon_restore_power +ffffffff81808bd0 T iwn5000_query_calibration +ffffffff81808e20 T iwn5000_send_calibration +ffffffff81808f70 T iwn5000_send_wimax_coex +ffffffff81809140 T iwn5000_crystal_calib +ffffffff818092f0 T iwn_hw_stop +ffffffff818096e0 T iwn_hw_init +ffffffff81809d80 T iwn4965_load_bootcode +ffffffff8180a120 T iwn5000_load_firmware_section +ffffffff8180a360 T iwn_read_firmware_leg +ffffffff8180a470 T iwn_read_firmware_tlv +ffffffff8180a6f0 T iwn_read_firmware +ffffffff8180a920 T iwn_apm_stop_master +ffffffff8180b000 T iwm_lookup_cmd_ver +ffffffff8180b070 T iwm_is_mimo_ht_plcp +ffffffff8180b0b0 T iwm_is_mimo_ht_mcs +ffffffff8180b100 T iwm_store_cscheme +ffffffff8180b150 T iwm_firmware_store_section +ffffffff8180b1f0 T iwm_set_default_calib +ffffffff8180b240 T iwm_fw_info_free +ffffffff8180b290 T iwm_fw_version_str +ffffffff8180b2d0 T iwm_read_firmware +ffffffff8180bb50 T iwm_read_prph_unlocked +ffffffff8180bbb0 T iwm_read_prph +ffffffff8180bc30 T iwm_nic_assert_locked +ffffffff8180bc90 T iwm_write_prph_unlocked +ffffffff8180bd00 T iwm_write_prph +ffffffff8180bd90 T iwm_write_prph64 +ffffffff8180be90 T iwm_read_mem +ffffffff8180bfc0 T iwm_nic_lock +ffffffff8180c110 T iwm_nic_unlock +ffffffff8180c1c0 T iwm_write_mem +ffffffff8180c300 T iwm_write_mem32 +ffffffff8180c410 T iwm_poll_bit +ffffffff8180c4e0 T iwm_set_bits_mask_prph +ffffffff8180c680 T iwm_set_bits_prph +ffffffff8180c6a0 T iwm_clear_bits_prph +ffffffff8180c6c0 T iwm_dma_contig_alloc +ffffffff8180c8b0 T iwm_dma_contig_free +ffffffff8180c970 T iwm_alloc_rx_ring +ffffffff8180cb50 T iwm_rx_addbuf +ffffffff8180cd40 T iwm_free_rx_ring +ffffffff8180cff0 T iwm_disable_rx_dma +ffffffff8180d210 T iwm_reset_rx_ring +ffffffff8180d290 T iwm_alloc_tx_ring +ffffffff8180d470 T iwm_free_tx_ring +ffffffff8180d670 T iwm_reset_tx_ring +ffffffff8180d830 T iwm_enable_rfkill_int +ffffffff8180d950 T iwm_check_rfkill +ffffffff8180d9d0 T iwm_enable_interrupts +ffffffff8180da80 T iwm_enable_fwload_interrupt +ffffffff8180db50 T iwm_restore_interrupts +ffffffff8180db80 T iwm_disable_interrupts +ffffffff8180dc40 T iwm_ict_reset +ffffffff8180de00 T iwm_set_hw_ready +ffffffff8180dfe0 T iwm_prepare_card_hw +ffffffff8180e120 T iwm_apm_config +ffffffff8180e200 T iwm_apm_init +ffffffff8180e8f0 T iwm_apm_stop +ffffffff8180ecb0 T iwm_init_msix_hw +ffffffff8180ed50 T iwm_conf_msix_hw +ffffffff8180f2a0 T iwm_clear_persistence_bit +ffffffff8180f3f0 T iwm_start_hw +ffffffff8180f610 T iwm_stop_device +ffffffff8180fc30 T iwm_nic_config +ffffffff8180fd10 T iwm_nic_rx_init +ffffffff8180fd30 T iwm_nic_rx_mq_init +ffffffff81810130 T iwm_nic_rx_legacy_init +ffffffff81810370 T iwm_nic_tx_init +ffffffff81810560 T iwm_nic_init +ffffffff818106c0 T iwm_enable_ac_txq +ffffffff81810b40 T iwm_enable_txq +ffffffff81810d20 T iwm_send_cmd_pdu +ffffffff81810da0 T iwm_disable_txq +ffffffff81810e80 T iwm_post_alive +ffffffff81811400 T iwm_phy_db_get_section +ffffffff818114a0 T iwm_phy_db_set_section +ffffffff818115e0 T iwm_is_valid_channel +ffffffff81811650 T iwm_ch_id_to_ch_index +ffffffff818116d0 T iwm_channel_id_to_papd +ffffffff81811770 T iwm_channel_id_to_txp +ffffffff81811900 T iwm_phy_db_get_section_data +ffffffff81811a90 T iwm_send_phy_db_cmd +ffffffff81811b30 T iwm_send_cmd +ffffffff81812210 T iwm_phy_db_send_all_channel_groups +ffffffff818123f0 T iwm_send_phy_db_data +ffffffff81812630 T iwm_send_time_event_cmd +ffffffff81812740 T iwm_free_resp +ffffffff818127c0 T iwm_protect_session +ffffffff81812870 T iwm_unprotect_session +ffffffff81812920 T iwm_nvm_read_chunk +ffffffff81812a80 T iwm_nvm_read_section +ffffffff81812b40 T iwm_fw_valid_tx_ant +ffffffff81812b80 T iwm_fw_valid_rx_ant +ffffffff81812bd0 T iwm_valid_siso_ant_rate_mask +ffffffff81812c30 T iwm_init_channel_map +ffffffff81812d90 T iwm_mimo_enabled +ffffffff81812dd0 T iwm_setup_ht_rates +ffffffff81812e80 T iwm_setup_vht_rates +ffffffff81812f10 T iwm_init_reorder_buffer +ffffffff81812f70 T iwm_clear_reorder_buffer +ffffffff81813030 T iwm_rx_ba_session_expired +ffffffff81813130 T iwm_reorder_timer_expired +ffffffff81813300 T iwm_release_frames +ffffffff818134f0 T iwm_sta_rx_agg +ffffffff818139e0 T iwm_send_cmd_pdu_status +ffffffff81813a70 T iwm_mac_ctxt_task +ffffffff81813bd0 T iwm_mac_ctxt_cmd +ffffffff81813dd0 T iwm_updateprot +ffffffff81813e90 T iwm_add_task +ffffffff81813f00 T iwm_updateslot +ffffffff81813fc0 T iwm_updateedca +ffffffff81814080 T iwm_phy_ctxt_task +ffffffff81814240 T iwm_phy_ctxt_update +ffffffff818143c0 T iwm_setrates +ffffffff81814550 T iwm_updatechan +ffffffff81814610 T iwm_updatedtim +ffffffff818146d0 T iwm_sta_tx_agg +ffffffff81814bb0 T iwm_flush_sta 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+ffffffff81817270 T iwm_run_init_mvm_ucode +ffffffff818175b0 T iwm_send_bt_init_conf +ffffffff81817650 T iwm_sf_config +ffffffff81817860 T iwm_config_ltr +ffffffff81817920 T iwm_get_signal_strength +ffffffff81817980 T iwm_rxmq_get_signal_strength +ffffffff818179d0 T iwm_rx_rx_phy_cmd +ffffffff81817a30 T iwm_get_noise +ffffffff81817aa0 T iwm_ccmp_decap +ffffffff81817ba0 T iwm_rx_hwdecrypt +ffffffff81817c70 T iwm_rx_frame +ffffffff81817fa0 T iwm_rx_mpdu +ffffffff818181b0 T iwm_flip_address +ffffffff81818210 T iwm_detect_duplicate +ffffffff81818330 T iwm_is_sn_less +ffffffff81818390 T iwm_oldsn_workaround +ffffffff81818450 T iwm_rx_reorder +ffffffff818189c0 T iwm_rx_mpdu_mq +ffffffff81818dc0 T iwm_ra_choose +ffffffff81818e80 T iwm_ht_single_rate_control +ffffffff818190a0 T iwm_vht_single_rate_control +ffffffff818192f0 T iwm_rx_tx_cmd_single +ffffffff818194c0 T iwm_txd_done +ffffffff81819590 T iwm_reset_sched +ffffffff81819640 T iwm_ampdu_tx_done +ffffffff818199b0 T iwm_rx_tx_cmd +ffffffff81819b90 T iwm_ampdu_rate_control +ffffffff81819d30 T iwm_rx_compressed_ba +ffffffff81819ec0 T iwm_rx_bmiss +ffffffff81819fb0 T iwm_binding_cmd +ffffffff8181a130 T iwm_phy_ctxt_cmd_hdr +ffffffff8181a1a0 T iwm_phy_ctxt_cmd_data +ffffffff8181a310 T iwm_get_vht_ctrl_pos +ffffffff8181a380 T iwm_phy_ctxt_cmd_uhb +ffffffff8181a5b0 T iwm_phy_ctxt_cmd +ffffffff8181a700 T iwm_update_sched +ffffffff8181a7d0 T iwm_send_cmd_status +ffffffff8181a8f0 T iwm_cmd_done +ffffffff8181aa90 T iwm_tx_fill_cmd +ffffffff8181aeb0 T iwm_rval2ridx +ffffffff8181af40 T iwm_tx +ffffffff8181b9e0 T iwm_flush_tx_path +ffffffff8181bab0 T iwm_wait_tx_queues_empty +ffffffff8181bb70 T iwm_led_enable +ffffffff8181bba0 T iwm_led_disable +ffffffff8181bbd0 T iwm_led_is_enabled +ffffffff8181bc30 T iwm_led_blink_timeout +ffffffff8181bcb0 T iwm_led_blink_start +ffffffff8181bd00 T iwm_led_blink_stop +ffffffff8181bd50 T iwm_beacon_filter_send_cmd +ffffffff8181bde0 T iwm_beacon_filter_set_cqm_params +ffffffff8181be20 T iwm_update_beacon_abort +ffffffff8181bf10 T iwm_power_build_cmd +ffffffff8181bfa0 T iwm_power_mac_update_mode +ffffffff8181c1b0 T iwm_power_update_device +ffffffff8181c250 T iwm_enable_beacon_filter +ffffffff8181c340 T iwm_disable_beacon_filter +ffffffff8181c420 T iwm_add_sta_cmd +ffffffff8181c810 T iwm_add_aux_sta +ffffffff8181c9b0 T iwm_drain_sta +ffffffff8181cb60 T iwm_rm_sta_cmd +ffffffff8181cc20 T iwm_scan_rx_chain +ffffffff8181cc90 T iwm_scan_rate_n_flags +ffffffff8181cd90 T iwm_lmac_scan_fill_channels +ffffffff8181ce70 T iwm_umac_scan_fill_channels +ffffffff8181cf40 T iwm_fill_probe_req_v1 +ffffffff8181cfe0 T iwm_fill_probe_req +ffffffff8181d210 T iwm_lmac_scan +ffffffff8181d720 T iwm_config_umac_scan +ffffffff8181d930 T iwm_umac_scan_size +ffffffff8181d9a0 T iwm_get_scan_req_umac_chan_param +ffffffff8181d9f0 T iwm_get_scan_req_umac_data +ffffffff8181da40 T iwm_umac_scan +ffffffff8181dea0 T iwm_mcc_update +ffffffff8181df30 T iwm_ridx2rate +ffffffff8181dfa0 T iwm_ack_rates +ffffffff8181e260 T iwm_mac_ctxt_cmd_common +ffffffff8181e570 T iwm_mac_ctxt_cmd_fill_sta +ffffffff8181e630 T iwm_update_quotas +ffffffff8181e9f0 T iwm_del_task +ffffffff8181ea50 T iwm_scan +ffffffff8181ecc0 T iwm_scan_abort +ffffffff8181ede0 T iwm_bgscan +ffffffff8181ee80 T iwm_bgscan_done +ffffffff8181ef20 T iwm_bgscan_done_task +ffffffff8181f170 T iwm_umac_scan_abort +ffffffff8181f200 T iwm_lmac_scan_abort +ffffffff8181f2a0 T iwm_auth +ffffffff8181f610 T iwm_deauth +ffffffff8181f970 T iwm_run +ffffffff8181fea0 T iwm_allow_mcast +ffffffff8181ffa0 T iwm_run_stop +ffffffff818205c0 T iwm_node_alloc +ffffffff818205e0 T iwm_set_key_v1 +ffffffff81820720 T iwm_set_key +ffffffff81820980 T iwm_delete_key_v1 +ffffffff81820ab0 T iwm_delete_key +ffffffff81820d20 T iwm_calib_timeout +ffffffff81820de0 T iwm_set_rate_table_vht +ffffffff81821100 T iwm_set_rate_table +ffffffff818214c0 T iwm_media_change +ffffffff818216c0 T iwm_stop +ffffffff81821b40 T iwm_init +ffffffff81821e10 T iwm_newstate_task +ffffffff81821f90 T iwm_newstate +ffffffff818220f0 T iwm_endscan +ffffffff81822140 T iwm_fill_sf_command +ffffffff81822210 T iwm_send_soc_conf +ffffffff81822350 T iwm_send_update_mcc_cmd +ffffffff81822510 T iwm_send_temp_report_ths_cmd +ffffffff818225e0 T iwm_tt_tx_backoff +ffffffff81822670 T iwm_fill_paging_mem +ffffffff818229e0 T iwm_alloc_fw_paging_mem +ffffffff81822d80 T iwm_init_hw +ffffffff81823400 T iwm_preinit +ffffffff818235a0 T iwm_start +ffffffff81823770 T iwm_watchdog +ffffffff81823910 T iwm_nic_error +ffffffff81823df0 T iwm_dump_driver_status +ffffffff81823e90 T iwm_ioctl +ffffffff81823ff0 T iwm_nic_umac_error +ffffffff81824460 T iwm_desc_lookup +ffffffff818245f0 T iwm_rx_pkt_valid +ffffffff81824640 T iwm_rx_pkt +ffffffff81825400 T iwm_notif_intr +ffffffff81825560 T iwm_intr +ffffffff81825990 T iwm_intr_msix +ffffffff81825c20 T iwm_match +ffffffff81825c50 T iwm_attach_hook +ffffffff81825c90 T iwm_attach +ffffffff818269d0 T iwm_radiotap_attach +ffffffff81826a60 T iwm_init_task +ffffffff81826b20 T iwm_resume +ffffffff81826c60 T iwm_wakeup +ffffffff81826d10 T iwm_activate +ffffffff81827000 T iwx_lookup_cmd_ver +ffffffff81827070 T iwx_lookup_notif_ver +ffffffff818270e0 T iwx_is_mimo_ht_plcp +ffffffff81827120 T iwx_store_cscheme +ffffffff81827170 T iwx_ctxt_info_alloc_dma +ffffffff81827210 T iwx_dma_contig_alloc +ffffffff818273f0 T iwx_ctxt_info_free_paging +ffffffff81827550 T iwx_dma_contig_free +ffffffff81827610 T iwx_get_num_sections +ffffffff81827690 T iwx_init_fw_sec +ffffffff81827ae0 T iwx_fw_version_str +ffffffff81827b20 T iwx_alloc_fw_monitor_block +ffffffff81827bd0 T iwx_alloc_fw_monitor +ffffffff81827c90 T iwx_apply_debug_destination +ffffffff818281e0 T iwx_nic_lock +ffffffff81828330 T iwx_write_prph +ffffffff818283d0 T iwx_set_bits_prph +ffffffff818283f0 T iwx_clear_bits_prph +ffffffff81828410 T iwx_read_prph +ffffffff818284b0 T iwx_nic_unlock +ffffffff81828560 T iwx_set_ltr +ffffffff818286b0 T iwx_ctxt_info_init +ffffffff81828970 T iwx_ctxt_info_free_fw_img +ffffffff81828af0 T iwx_ctxt_info_gen3_init +ffffffff818290e0 T iwx_write_umac_prph +ffffffff81829190 T iwx_firmware_store_section +ffffffff81829230 T iwx_set_default_calib +ffffffff81829280 T iwx_fw_info_free +ffffffff81829310 T iwx_read_firmware +ffffffff81829da0 T iwx_prph_addr_mask +ffffffff81829de0 T iwx_read_prph_unlocked +ffffffff81829e60 T iwx_nic_assert_locked +ffffffff81829ec0 T iwx_write_prph_unlocked +ffffffff81829f40 T iwx_write_prph64 +ffffffff8182a070 T iwx_read_umac_prph_unlocked +ffffffff8182a0f0 T iwx_read_umac_prph +ffffffff8182a190 T iwx_write_umac_prph_unlocked +ffffffff8182a210 T iwx_read_mem +ffffffff8182a340 T iwx_write_mem +ffffffff8182a480 T iwx_write_mem32 +ffffffff8182a590 T iwx_poll_bit +ffffffff8182a660 T iwx_set_bits_mask_prph +ffffffff8182a850 T iwx_alloc_rx_ring +ffffffff8182aa30 T iwx_rx_addbuf +ffffffff8182ac50 T iwx_free_rx_ring +ffffffff8182af00 T iwx_disable_rx_dma +ffffffff8182b160 T iwx_reset_rx_ring +ffffffff8182b200 T iwx_alloc_tx_ring +ffffffff8182b410 T iwx_free_tx_ring +ffffffff8182b6a0 T iwx_reset_tx_ring +ffffffff8182b900 T iwx_enable_rfkill_int +ffffffff8182b9e0 T iwx_check_rfkill +ffffffff8182ba60 T iwx_enable_interrupts +ffffffff8182bb10 T iwx_enable_fwload_interrupt +ffffffff8182bbf0 T iwx_restore_interrupts +ffffffff8182bc20 T iwx_disable_interrupts +ffffffff8182bce0 T iwx_ict_reset +ffffffff8182bea0 T iwx_set_hw_ready +ffffffff8182c080 T iwx_prepare_card_hw +ffffffff8182c1c0 T iwx_force_power_gating +ffffffff8182c270 T iwx_apm_config +ffffffff8182c340 T iwx_apm_init +ffffffff8182c5a0 T iwx_apm_stop +ffffffff8182c960 T iwx_init_msix_hw +ffffffff8182ca00 T iwx_conf_msix_hw +ffffffff8182cfa0 T iwx_clear_persistence_bit +ffffffff8182d120 T iwx_start_hw +ffffffff8182d520 T iwx_stop_device +ffffffff8182da90 T iwx_nic_config +ffffffff8182db20 T iwx_nic_rx_init +ffffffff8182db80 T iwx_nic_init +ffffffff8182dca0 T iwx_enable_txq +ffffffff8182df70 T iwx_send_cmd +ffffffff8182e530 T iwx_free_resp +ffffffff8182e5b0 T iwx_disable_txq +ffffffff8182e810 T iwx_post_alive +ffffffff8182e8a0 T iwx_schedule_session_protection +ffffffff8182e970 T iwx_send_cmd_pdu +ffffffff8182e9f0 T iwx_unprotect_session +ffffffff8182eac0 T iwx_fw_valid_tx_ant +ffffffff8182eb00 T iwx_fw_valid_rx_ant +ffffffff8182eb50 T iwx_init_channel_map +ffffffff8182ed50 T iwx_mimo_enabled +ffffffff8182ed90 T iwx_setup_ht_rates +ffffffff8182ee40 T iwx_setup_vht_rates +ffffffff8182eed0 T iwx_init_reorder_buffer +ffffffff8182ef30 T iwx_clear_reorder_buffer +ffffffff8182eff0 T iwx_rx_ba_session_expired +ffffffff8182f0f0 T iwx_rx_bar_frame_release +ffffffff8182f1a0 T iwx_release_frames +ffffffff8182f390 T iwx_reorder_timer_expired +ffffffff8182f560 T iwx_find_rxba_data +ffffffff8182f5f0 T iwx_sta_rx_agg_baid_cfg_cmd +ffffffff8182f840 T iwx_send_cmd_pdu_status +ffffffff8182f8d0 T iwx_sta_rx_agg_sta_cmd +ffffffff8182fb20 T iwx_sta_rx_agg +ffffffff8182fdf0 T iwx_mac_ctxt_task +ffffffff8182ff80 T iwx_mac_ctxt_cmd +ffffffff81830180 T iwx_phy_ctxt_task +ffffffff81830330 T iwx_phy_ctxt_update +ffffffff81830780 T iwx_updatechan +ffffffff81830840 T iwx_add_task +ffffffff818308b0 T iwx_updateprot +ffffffff81830970 T iwx_updateslot +ffffffff81830a30 T iwx_updateedca +ffffffff81830af0 T iwx_updatedtim +ffffffff81830bb0 T iwx_sta_tx_agg_start +ffffffff81830da0 T iwx_ba_task +ffffffff81830ef0 T iwx_ampdu_rx_start +ffffffff81830fd0 T iwx_ampdu_rx_stop +ffffffff818310b0 T iwx_ampdu_tx_start +ffffffff81831160 T iwx_set_mac_addr_from_csr +ffffffff81831380 T iwx_flip_hw_address +ffffffff818313d0 T iwx_is_valid_mac_addr +ffffffff81831470 T iwx_nvm_get +ffffffff81831750 T iwx_load_firmware +ffffffff81831930 T iwx_start_fw +ffffffff81831b10 T iwx_pnvm_handle_section +ffffffff81831e10 T iwx_ctxt_info_gen3_set_pnvm +ffffffff81831e60 T iwx_pnvm_parse +ffffffff81831f50 T iwx_load_pnvm +ffffffff818322f0 T iwx_send_tx_ant_cfg +ffffffff81832380 T iwx_send_phy_cfg_cmd +ffffffff81832430 T iwx_send_dqa_cmd +ffffffff818324c0 T iwx_load_ucode_wait_alive +ffffffff81832580 T iwx_run_init_mvm_ucode +ffffffff818327e0 T iwx_config_ltr +ffffffff818328a0 T iwx_update_rx_desc +ffffffff81832940 T iwx_rxmq_get_signal_strength +ffffffff81832990 T iwx_rx_rx_phy_cmd +ffffffff818329f0 T iwx_get_noise +ffffffff81832a60 T iwx_ccmp_decap +ffffffff81832ba0 T iwx_rx_hwdecrypt +ffffffff81832ca0 T iwx_rx_frame +ffffffff81832f40 T iwx_detect_duplicate +ffffffff81833060 T iwx_is_sn_less +ffffffff818330c0 T iwx_oldsn_workaround +ffffffff81833180 T iwx_rx_reorder +ffffffff818336f0 T iwx_rx_mpdu_mq +ffffffff81833a30 T iwx_clear_tx_desc +ffffffff81833bd0 T iwx_txd_done +ffffffff81833c90 T iwx_txq_advance +ffffffff81833fb0 T iwx_tx_update_byte_tbl +ffffffff81834050 T iwx_rx_tx_cmd +ffffffff818341c0 T iwx_clear_oactive +ffffffff81834240 T iwx_rx_compressed_ba +ffffffff818343c0 T iwx_rx_bmiss +ffffffff818344b0 T iwx_binding_cmd +ffffffff81834620 T iwx_get_vht_ctrl_pos +ffffffff81834690 T iwx_phy_ctxt_cmd_uhb_v3_v4 +ffffffff818348e0 T iwx_phy_ctxt_cmd_v3_v4 +ffffffff81834b30 T iwx_phy_ctxt_cmd +ffffffff81834c30 T iwx_send_cmd_status +ffffffff81834d50 T iwx_cmd_done +ffffffff81834e30 T iwx_fw_rateidx_ofdm +ffffffff81834e90 T iwx_fw_rateidx_cck +ffffffff81834ef0 T iwx_tx_fill_cmd +ffffffff81835190 T iwx_rval2ridx +ffffffff81835220 T iwx_tx +ffffffff81835960 T iwx_flush_sta_tids +ffffffff81835b10 T iwx_drain_sta +ffffffff81835ca0 T iwx_flush_sta +ffffffff81835f60 T iwx_beacon_filter_send_cmd +ffffffff81835ff0 T iwx_update_beacon_abort +ffffffff81836100 T iwx_power_build_cmd +ffffffff81836190 T iwx_power_mac_update_mode +ffffffff818363b0 T iwx_power_update_device +ffffffff81836450 T iwx_enable_beacon_filter +ffffffff81836560 T iwx_disable_beacon_filter +ffffffff81836650 T iwx_add_sta_cmd +ffffffff81836950 T iwx_rm_sta_cmd +ffffffff81836a10 T iwx_rm_sta +ffffffff81836e70 T iwx_disable_mgmt_queue +ffffffff81836f50 T iwx_umac_scan_fill_channels +ffffffff81837060 T iwx_fill_probe_req +ffffffff81837290 T iwx_config_umac_scan_reduced +ffffffff818373f0 T iwx_scan_umac_flags_v2 +ffffffff81837430 T iwx_scan_umac_dwell_v10 +ffffffff818374a0 T iwx_scan_umac_fill_general_p_v10 +ffffffff81837530 T iwx_scan_umac_fill_ch_p_v6 +ffffffff81837650 T iwx_umac_scan_v14 +ffffffff81837940 T iwx_mcc_update +ffffffff818379d0 T iwx_ridx2rate +ffffffff81837a40 T iwx_ack_rates +ffffffff81837d00 T iwx_mac_ctxt_cmd_common +ffffffff81838020 T iwx_mac_ctxt_cmd_fill_sta +ffffffff818380b0 T iwx_clear_statistics +ffffffff81838190 T iwx_del_task +ffffffff818381f0 T iwx_scan +ffffffff81838390 T iwx_scan_abort +ffffffff81838440 T iwx_bgscan +ffffffff818384c0 T iwx_bgscan_done +ffffffff81838560 T iwx_bgscan_done_task +ffffffff81838860 T iwx_umac_scan_abort +ffffffff818388f0 T iwx_enable_mgmt_queue +ffffffff81838980 T iwx_rs_rval2idx +ffffffff818389f0 T iwx_rs_ht_rates +ffffffff81838ac0 T iwx_rs_vht_rates +ffffffff81838b80 T iwx_rs_init_v3 +ffffffff81838f80 T iwx_rs_init_v4 +ffffffff818393a0 T iwx_rs_init +ffffffff81839400 T iwx_rs_update +ffffffff818396a0 T iwx_phy_send_rlc +ffffffff81839790 T iwx_auth +ffffffff81839ae0 T iwx_deauth +ffffffff81839d80 T iwx_run +ffffffff8183a210 T iwx_sf_config +ffffffff8183a420 T iwx_allow_mcast +ffffffff8183a520 T iwx_run_stop +ffffffff8183a810 T iwx_node_alloc +ffffffff8183a830 T iwx_set_key +ffffffff8183a960 T iwx_add_sta_key +ffffffff8183abd0 T iwx_setkey_task +ffffffff8183acc0 T iwx_delete_key +ffffffff8183ae50 T iwx_media_change +ffffffff8183aec0 T iwx_stop +ffffffff8183b360 T iwx_init +ffffffff8183b630 T iwx_newstate_task +ffffffff8183b770 T iwx_newstate +ffffffff8183b940 T iwx_endscan +ffffffff8183b990 T iwx_fill_sf_command +ffffffff8183ba60 T iwx_send_bt_init_conf +ffffffff8183baf0 T iwx_send_soc_conf +ffffffff8183bc30 T iwx_send_update_mcc_cmd +ffffffff8183bdd0 T iwx_send_temp_report_ths_cmd +ffffffff8183bea0 T iwx_init_hw +ffffffff8183c480 T iwx_preinit +ffffffff8183c650 T iwx_start +ffffffff8183c820 T iwx_watchdog +ffffffff8183ca30 T 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+ffffffff8188eab0 T rtwn_23a_power_on +ffffffff8188ef20 T rtwn_tx_report +ffffffff8188f000 T ral_pci_match +ffffffff8188f030 T ral_pci_attach +ffffffff8188f210 T ral_pci_detach +ffffffff8188f2b0 T ral_pci_activate +ffffffff8188f340 T ral_pci_wakeup +ffffffff81890000 T acx_pci_match +ffffffff81890030 T acx_pci_attach +ffffffff81890260 T acx_pci_detach +ffffffff81891000 T pgt_pci_match +ffffffff81891030 T pgt_pci_attach +ffffffff81891200 T pgt_pci_detach +ffffffff81892000 T malo_pci_match +ffffffff81892030 T malo_pci_attach +ffffffff818921e0 T malo_pci_detach +ffffffff81892230 T malo_pci_activate +ffffffff81892290 T malo_pci_wakeup +ffffffff81893000 T bwi_pci_match +ffffffff81893070 T bwi_pci_attach +ffffffff81893290 T bwi_pci_detach +ffffffff818932e0 T bwi_pci_activate +ffffffff81893350 T bwi_reset_bcm4331 +ffffffff81893470 T bwi_pci_conf_write +ffffffff818934a0 T bwi_pci_conf_read +ffffffff818934d0 T bwi_pci_wakeup +ffffffff81894000 T piixpm_match +ffffffff81894030 T piixpm_attach +ffffffff818944c0 T piixpm_intr +ffffffff818945d0 T piixpm_i2c_acquire_bus +ffffffff818946b0 T piixpm_i2c_release_bus +ffffffff81894790 T piixpm_i2c_exec +ffffffff81895000 T vic_match +ffffffff818950a0 T vic_attach +ffffffff81895430 T vic_intr +ffffffff818954b0 T vic_query +ffffffff81895710 T vic_alloc_data +ffffffff81895a10 T vic_tick +ffffffff81895a80 T vic_ioctl +ffffffff81895cb0 T vic_start +ffffffff81896010 T vic_watchdog +ffffffff81896040 T vic_media_change +ffffffff81896070 T vic_media_status +ffffffff81896130 T vic_read +ffffffff81896150 T vic_read_cmd +ffffffff818961a0 T vic_getlladdr +ffffffff81896250 T vic_alloc_dmamem +ffffffff818963c0 T vic_rx_fill +ffffffff818965b0 T vic_alloc_mbuf +ffffffff81896670 T vic_init_data +ffffffff81896a20 T vic_uninit_data +ffffffff81896bf0 T vic_link_state +ffffffff81896c70 T vic_write +ffffffff81896cc0 T vic_rx_proc +ffffffff81896f20 T vic_tx_proc +ffffffff818970a0 T vic_iff +ffffffff818971e0 T vic_setlladdr +ffffffff81897240 T vic_load_txb +ffffffff818972f0 T vic_init +ffffffff81897490 T vic_stop +ffffffff818975d0 T vic_rxrinfo +ffffffff818976a0 T vic_free_dmamem +ffffffff81898000 T vmxnet3_match +ffffffff81898030 T vmxnet3_attach +ffffffff81898890 T vmxnet3_intr +ffffffff81898930 T vmxnet3_intr_event +ffffffff818989b0 T vmxnet3_intr_intx +ffffffff81898a20 T vmxnet3_intr_queue +ffffffff81898ab0 T vmxnet3_dma_init +ffffffff81898ea0 T vmxnet3_ioctl +ffffffff81899130 T vmxnet3_start +ffffffff818994b0 T vmxnet3_watchdog +ffffffff81899500 T vmxnet3_media_change +ffffffff81899530 T vmxnet3_media_status +ffffffff81899640 T vmxnet3_link_state +ffffffff81899700 T vmxnet3_dma_allocmem +ffffffff81899850 T vmxnet3_alloc_txring +ffffffff81899a00 T vmxnet3_alloc_rxring +ffffffff81899d50 t vmx_dmamem_alloc +ffffffff81899eb0 T vmxnet3_rxfill_tick +ffffffff81899f20 T vmxnet3_txinit +ffffffff8189a010 T vmxnet3_rxfill +ffffffff8189a300 T vmxnet3_rxinit +ffffffff8189a440 T vmxnet3_txstop +ffffffff8189a540 T vmxnet3_rxstop +ffffffff8189a6a0 T vmxnet3_enable_all_intrs +ffffffff8189a770 T vmxnet3_disable_all_intrs +ffffffff8189a840 T vmxnet3_evintr +ffffffff8189aa10 T vmxnet3_rxintr +ffffffff8189ad80 T vmxnet3_txintr +ffffffff8189af60 T vmxnet3_init +ffffffff8189b2f0 T vmxnet3_rx_csum +ffffffff8189b350 T vmxnet3_iff +ffffffff8189b490 T vmxnet3_stop +ffffffff8189b740 T vmxnet3_reset +ffffffff8189b780 t vmx_kstat_create +ffffffff8189b960 t vmx_kstat_read +ffffffff8189c000 T vmwpvs_match +ffffffff8189c040 T vmwpvs_attach +ffffffff8189c980 T vmwpvs_scsi_cmd +ffffffff8189cdf0 T vmwpvs_intx +ffffffff8189ce70 T vmwpvs_msg_task +ffffffff8189d0e0 T vmwpvs_intr +ffffffff8189d2d0 T vmwpvs_get_config +ffffffff8189d4d0 T vmwpvs_dmamem_zalloc +ffffffff8189d530 T vmwpvs_dmamem_alloc +ffffffff8189d6b0 T vmwpvs_ccb_put +ffffffff8189d710 T vmwpvs_setup_rings +ffffffff8189d820 T vmwpvs_setup_msg_ring +ffffffff8189d8f0 T vmwpvs_ccb_get +ffffffff8189d970 T vmwpvs_dmamem_free +ffffffff8189d9f0 T vmwpvs_cmd +ffffffff8189da90 T vmwpvs_scsi_cmd_done +ffffffff8189dc70 T vmwpvs_scsi_cmd_poll +ffffffff8189e000 T lii_match +ffffffff8189e030 T lii_attach +ffffffff8189e420 T lii_activate +ffffffff8189e520 T lii_reset +ffffffff8189e7f0 T lii_spi_configure +ffffffff8189e8e0 T lii_eeprom_present +ffffffff8189e970 T lii_eeprom_read +ffffffff8189e9a0 T lii_spi_read +ffffffff8189ec60 T lii_read_macaddr +ffffffff8189edc0 T lii_intr +ffffffff8189eed0 T lii_alloc_rings +ffffffff8189f0e0 T lii_tick +ffffffff8189f130 T lii_mii_readreg +ffffffff8189f3d0 T lii_mii_writereg +ffffffff8189f670 T lii_mii_statchg +ffffffff8189f6e0 T lii_media_change +ffffffff8189f730 T lii_media_status +ffffffff8189f790 T lii_ioctl +ffffffff8189f920 T lii_start +ffffffff8189fad0 T lii_watchdog +ffffffff8189fb10 T lii_stop +ffffffff8189fb80 T lii_init +ffffffff818a0070 T lii_iff +ffffffff818a01b0 T lii_tx_put +ffffffff818a02c0 T lii_free_tx_space +ffffffff818a0300 T lii_rxintr +ffffffff818a04b0 T lii_txintr +ffffffff818a1000 T ichiic_match +ffffffff818a1030 T ichiic_attach +ffffffff818a1220 T ichiic_intr +ffffffff818a1340 T ichiic_i2c_acquire_bus +ffffffff818a13a0 T ichiic_i2c_release_bus +ffffffff818a13f0 T ichiic_i2c_exec +ffffffff818a2000 T viapm_match +ffffffff818a2030 T viapm_attach +ffffffff818a2680 T viapm_intr +ffffffff818a2790 T viapm_i2c_acquire_bus +ffffffff818a27f0 T viapm_i2c_release_bus +ffffffff818a2840 T viapm_i2c_exec +ffffffff818a2b50 T viapm_refresh_sensor_data +ffffffff818a2e50 T viapm_refresh +ffffffff818a2e80 T val_to_uK +ffffffff818a2f20 T val_to_rpm +ffffffff818a2f60 T val_to_uV +ffffffff818a3000 T viapm_get_timecount +ffffffff818a4000 T amdiic_match +ffffffff818a4030 T amdiic_attach +ffffffff818a4200 T amdiic_intr +ffffffff818a42d0 T amdiic_i2c_acquire_bus +ffffffff818a4330 T amdiic_i2c_release_bus +ffffffff818a4380 T amdiic_i2c_exec +ffffffff818a45e0 T amdiic_read +ffffffff818a4750 T amdiic_wait +ffffffff818a47f0 T amdiic_write +ffffffff818a5000 T nviic_match +ffffffff818a5030 T nviic_attach +ffffffff818a5270 T nviic_i2c_acquire_bus +ffffffff818a52c0 T nviic_i2c_release_bus +ffffffff818a5310 T nviic_i2c_exec +ffffffff818a55a0 T nviic_write +ffffffff818a55f0 T nviic_read +ffffffff818a6000 T sdhc_pci_match +ffffffff818a6060 T sdhc_pci_attach +ffffffff818a63a0 T sdhc_pci_activate +ffffffff818a6400 T sdhc_takecontroller +ffffffff818a64a0 T sdhc_ricohfix +ffffffff818a6610 T sdhc_pci_conf_write +ffffffff818a7000 T kate_match +ffffffff818a7170 T kate_attach +ffffffff818a74b0 T kate_refresh +ffffffff818a8000 T km_match +ffffffff818a8050 T km_attach +ffffffff818a80f0 T km_refresh +ffffffff818a9000 T ksmn_match +ffffffff818a9050 T ksmn_attach +ffffffff818a9240 T ksmn_ccd_attach +ffffffff818a9390 T ksmn_refresh +ffffffff818a94e0 T ksmn_read_reg +ffffffff818aa000 t iosf_pci_match +ffffffff818aa060 t iosf_pci_attach +ffffffff818aa100 t iosf_pci_mbi_mdr_rd +ffffffff818aa160 t iosf_pci_mbi_mdr_wr +ffffffff818ab000 T itherm_probe +ffffffff818ab030 T itherm_attach +ffffffff818ab3e0 T itherm_activate +ffffffff818ab460 T itherm_enable +ffffffff818ab4c0 T itherm_refresh +ffffffff818ab4d0 T itherm_refresh_sensor_data +ffffffff818ab8c0 T itherm_bias_temperature_sensor +ffffffff818ac000 T pchtemp_match +ffffffff818ac030 T pchtemp_attach +ffffffff818ac1a0 T pchtemp_refresh +ffffffff818ad000 T rtsx_pci_match +ffffffff818ad080 T rtsx_pci_attach +ffffffff818ae000 T xspd_match +ffffffff818ae030 T xspd_attach +ffffffff818ae1f0 T xspd_intr +ffffffff818af000 T virtio_pci_match +ffffffff818af080 T virtio_pci_attach +ffffffff818af420 T virtio_pci_detach +ffffffff818af500 T virtio_pci_kick +ffffffff818af560 T virtio_pci_read_device_config_1 +ffffffff818af590 T virtio_pci_read_device_config_2 +ffffffff818af5c0 T virtio_pci_read_device_config_4 +ffffffff818af5f0 T virtio_pci_read_device_config_8 +ffffffff818af670 T virtio_pci_write_device_config_1 +ffffffff818af6a0 T virtio_pci_write_device_config_2 +ffffffff818af6d0 T virtio_pci_write_device_config_4 +ffffffff818af700 T virtio_pci_write_device_config_8 +ffffffff818af770 T virtio_pci_read_queue_size +ffffffff818af7e0 T virtio_pci_setup_queue +ffffffff818afac0 T virtio_pci_set_status +ffffffff818afbf0 T virtio_pci_negotiate_features +ffffffff818afd30 T virtio_pci_poll_intr +ffffffff818afda0 T virtio_pci_find_cap +ffffffff818aff40 T virtio_pci_attach_10 +ffffffff818b03a0 T virtio_pci_attach_09 +ffffffff818b04e0 T virtio_pci_adjust_config_region +ffffffff818b0580 T virtio_pci_setup_msix +ffffffff818b0910 T virtio_pci_legacy_intr +ffffffff818b09b0 T virtio_pci_legacy_intr_mpsafe +ffffffff818b0a40 T virtio_pci_free_irqs +ffffffff818b0c80 T virtio_pci_negotiate_features_10 +ffffffff818b0eb0 T virtio_pci_msix_establish +ffffffff818b0f80 T virtio_pci_set_msix_queue_vector +ffffffff818b1000 T virtio_pci_set_msix_config_vector +ffffffff818b1040 T virtio_pci_config_intr +ffffffff818b1080 T virtio_pci_shared_queue_intr +ffffffff818b1090 T virtio_pci_queue_intr +ffffffff818b2000 T dwiic_pci_match +ffffffff818b2030 T dwiic_pci_attach +ffffffff818b2350 T dwiic_pci_activate +ffffffff818b23c0 T dwiic_pci_bus_scan +ffffffff818b3000 T bwfm_pci_buscore_read +ffffffff818b3060 T bwfm_pci_buscore_write +ffffffff818b30d0 T bwfm_pci_buscore_prepare +ffffffff818b3100 T bwfm_pci_buscore_reset +ffffffff818b32f0 T bwfm_pci_buscore_activate +ffffffff818b3320 T bwfm_pci_preinit +ffffffff818b4130 T bwfm_pci_stop +ffffffff818b41c0 T bwfm_pci_txcheck +ffffffff818b4280 T bwfm_pci_txdata +ffffffff818b45d0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818b4a00 T bwfm_pci_msgbuf_set_dcmd +ffffffff818b4a50 T bwfm_pci_match +ffffffff818b4a80 T bwfm_pci_attach +ffffffff818b4cf0 T bwfm_pci_detach +ffffffff818b4d30 T bwfm_pci_activate +ffffffff818b4ee0 T bwfm_pci_intr +ffffffff818b5140 T bwfm_pci_select_core +ffffffff818b5220 T bwfm_pci_load_microcode +ffffffff818b56b0 T bwfm_pci_dmamem_alloc +ffffffff818b5850 T bwfm_pci_setup_ring +ffffffff818b5a50 T bwfm_pci_intr_enable +ffffffff818b5aa0 T bwfm_pci_hostready +ffffffff818b5b10 T bwfm_pci_fill_rx_rings +ffffffff818b5b60 T bwfm_pci_dmamem_free +ffffffff818b5bd0 T bwfm_pci_cleanup +ffffffff818b6240 T bwfm_pci_send_mb_data +ffffffff818b6360 T bwfm_pci_intmask +ffffffff818b63a0 T bwfm_pci_pktid_avail +ffffffff818b6420 T bwfm_pci_pktid_new +ffffffff818b6570 T bwfm_pci_pktid_free +ffffffff818b6620 T bwfm_pci_fill_rx_buf_ring +ffffffff818b6960 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818b6cc0 T bwfm_pci_ring_write_reserve +ffffffff818b6db0 T bwfm_pci_ring_write_cancel +ffffffff818b6df0 T bwfm_pci_ring_write_commit +ffffffff818b6ed0 T bwfm_pci_ring_write_rptr +ffffffff818b6f50 T bwfm_pci_ring_write_wptr +ffffffff818b6fd0 T bwfm_pci_setup_flowring +ffffffff818b7120 T bwfm_pci_ring_bell +ffffffff818b7160 T bwfm_pci_ring_update_rptr +ffffffff818b7210 T bwfm_pci_ring_update_wptr +ffffffff818b72c0 T bwfm_pci_ring_write_reserve_multi +ffffffff818b73e0 T bwfm_pci_ring_read_avail +ffffffff818b74e0 T bwfm_pci_ring_read_commit +ffffffff818b7570 T bwfm_pci_ring_rx +ffffffff818b7770 T bwfm_pci_msg_rx +ffffffff818b7d50 T bwfm_pci_flowring_delete_cb +ffffffff818b7e00 T bwfm_pci_msgbuf_rxioctl +ffffffff818b7ef0 T bwfm_pci_intr_status +ffffffff818b7f30 T bwfm_pci_intr_ack +ffffffff818b7f70 T bwfm_pci_flowring_lookup +ffffffff818b80e0 T bwfm_pci_flowring_create +ffffffff818b8210 T bwfm_pci_flowring_create_cb +ffffffff818b8550 T bwfm_pci_flowring_delete +ffffffff818b8820 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818b8a30 T bwfm_pci_handle_mb_data +ffffffff818b8b00 T bwfm_pci_intr_disable +ffffffff818b9000 T ccp_pci_match +ffffffff818b9030 T ccp_pci_attach +ffffffff818ba000 T bnxt_match +ffffffff818ba030 T bnxt_attach +ffffffff818babe0 T bnxt_dmamem_alloc +ffffffff818bad70 T bnxt_dmamem_free +ffffffff818bae00 T bnxt_hwrm_ver_get +ffffffff818baf50 T bnxt_hwrm_nvm_get_dev_info +ffffffff818bb0a0 T bnxt_hwrm_func_drv_rgtr +ffffffff818bb1c0 T bnxt_hwrm_func_rgtr_async_events +ffffffff818bb2e0 T bnxt_hwrm_func_qcaps +ffffffff818bb3c0 T bnxt_admin_intr +ffffffff818bb5b0 T bnxt_intr +ffffffff818bba60 T bnxt_hwrm_func_qcfg +ffffffff818bbb10 T bnxt_hwrm_queue_qportcfg +ffffffff818bbbe0 T bnxt_hwrm_func_reset +ffffffff818bbc90 T bnxt_mark_cpr_invalid +ffffffff818bbcf0 T bnxt_hwrm_ring_alloc +ffffffff818bbea0 T bnxt_cfg_async_cr +ffffffff818bbfa0 T bnxt_write_cp_doorbell +ffffffff818bbfe0 T bnxt_set_cp_ring_aggint +ffffffff818bc0c0 T bnxt_ioctl +ffffffff818bc250 T bnxt_start +ffffffff818bc7d0 T bnxt_watchdog +ffffffff818bc800 T bnxt_media_change +ffffffff818bc950 T bnxt_media_status +ffffffff818bc970 T bnxt_refill +ffffffff818bc9d0 T bnxt_media_autonegotiate +ffffffff818bcac0 T bnxt_hwrm_port_phy_qcfg +ffffffff818bcf40 T bnxt_free_slots +ffffffff818bcfe0 T bnxt_hwrm_cmd_hdr_init +ffffffff818bd030 T hwrm_send_message +ffffffff818bd0b0 T bnxt_queue_up +ffffffff818bdc30 T bnxt_hwrm_stat_ctx_alloc +ffffffff818bdd30 T bnxt_write_tx_doorbell +ffffffff818bdda0 T bnxt_write_rx_doorbell +ffffffff818bde20 T bnxt_hwrm_ring_grp_alloc +ffffffff818bdf20 T bnxt_rx_fill +ffffffff818be030 T bnxt_hwrm_ring_grp_free +ffffffff818be110 T bnxt_hwrm_ring_free +ffffffff818be200 T bnxt_hwrm_stat_ctx_free +ffffffff818be2f0 T bnxt_queue_down +ffffffff818bea10 T bnxt_up +ffffffff818befa0 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818bf080 T bnxt_hwrm_vnic_alloc +ffffffff818bf180 T bnxt_hwrm_vnic_cfg +ffffffff818bf2c0 T bnxt_hwrm_vnic_cfg_placement +ffffffff818bf390 T bnxt_hwrm_set_filter +ffffffff818bf520 T bnxt_hwrm_vnic_rss_cfg +ffffffff818bf600 T bnxt_iff +ffffffff818bf770 T bnxt_hwrm_vnic_free +ffffffff818bf860 T bnxt_hwrm_vnic_ctx_free +ffffffff818bf950 T bnxt_down +ffffffff818bfd20 T bnxt_hwrm_free_filter +ffffffff818bfe00 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff818bfee0 T bnxt_rxrinfo +ffffffff818c0030 T bnxt_get_sffpage +ffffffff818c0340 T bnxt_load_mbuf +ffffffff818c03f0 T bnxt_handle_async_event +ffffffff818c0440 T bnxt_cpr_next_cmpl +ffffffff818c04b0 T bnxt_cpr_commit +ffffffff818c04e0 T bnxt_cpr_rollback +ffffffff818c0510 T bnxt_write_cp_doorbell_index +ffffffff818c0590 T bnxt_rx +ffffffff818c0830 T bnxt_txeof +ffffffff818c0960 T bnxt_get_media_type +ffffffff818c0ec0 T bnxt_add_media_type +ffffffff818c1080 T _hwrm_send_message +ffffffff818c3da0 T bnxt_rx_fill_slots +ffffffff818c3f80 T bnxt_hwrm_err_map +ffffffff818c3fc0 T _bnxt_hwrm_set_async_event_bit +ffffffff818c5000 t mcx_match +ffffffff818c5030 t mcx_attach +ffffffff818c5c40 T mcx_rx_fill +ffffffff818c5e90 T mcx_load_mbuf +ffffffff818c5f40 t mcx_dmamem_alloc +ffffffff818c60a0 t mcx_init_wait +ffffffff818c6130 t mcx_enable_hca +ffffffff818c6310 t mcx_issi +ffffffff818c6680 t mcx_pages +ffffffff818c6f60 t mcx_hca_max_caps +ffffffff818c74e0 t mcx_hca_set_caps +ffffffff818c79c0 t mcx_init_hca +ffffffff818c7b90 t mcx_set_driver_version +ffffffff818c7ef0 t mcx_iff +ffffffff818c8330 t mcx_alloc_uar +ffffffff818c8520 t mcx_alloc_pd +ffffffff818c8700 t mcx_alloc_tdomain +ffffffff818c88e0 t mcx_admin_intr +ffffffff818c8a90 t mcx_create_eq +ffffffff818c9030 t mcx_query_nic_vport_context +ffffffff818c93e0 t mcx_query_special_contexts +ffffffff818c95c0 t mcx_set_port_mtu +ffffffff818c96d0 t mcx_ioctl +ffffffff818cb9a0 t mcx_start +ffffffff818cbea0 t mcx_watchdog +ffffffff818cbed0 t mcx_media_change +ffffffff818cc190 t mcx_media_status +ffffffff818cc2e0 t mcx_media_add_types +ffffffff818cc400 t mcx_refill +ffffffff818cc470 t mcx_cq_intr +ffffffff818cca50 t mcx_calibrate +ffffffff818ccbf0 t mcx_port_change +ffffffff818ccd40 t mcx_kstat_attach +ffffffff818cd110 t mcx_teardown_hca +ffffffff818cd300 t mcx_dmamem_free +ffffffff818cd370 t mcx_set_issi +ffffffff818cd520 t mcx_set_flow_table_entry_mac +ffffffff818cd9f0 t mcx_delete_flow_table_entry +ffffffff818cde70 t mcx_access_hca_reg +ffffffff818ce280 t mcx_cmdq_exec +ffffffff818ce500 t mcx_down +ffffffff818cf4c0 t mcx_create_flow_table +ffffffff818cf870 t mcx_create_flow_group +ffffffff818cfd40 t mcx_set_flow_table_root +ffffffff818d00c0 t mcx_create_rqt +ffffffff818d04c0 t mcx_create_tir_direct +ffffffff818d07e0 t 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igc_validate_nvm_checksum_i225 +ffffffff818ed630 T igc_update_nvm_checksum_i225 +ffffffff818ed7c0 T igc_init_mac_params_i225 +ffffffff818ed880 T igc_reset_hw_i225 +ffffffff818ed9a0 T igc_init_hw_i225 +ffffffff818ed9b0 T igc_check_for_link_i225 +ffffffff818eda70 T igc_acquire_swfw_sync_i225 +ffffffff818edb50 T igc_release_swfw_sync_i225 +ffffffff818edbd0 T igc_setup_copper_link_i225 +ffffffff818edc60 T igc_init_phy_params_i225 +ffffffff818edd40 T igc_get_hw_semaphore_i225 +ffffffff818edef0 T __igc_write_nvm_srwr +ffffffff818ee020 T igc_update_flash_i225 +ffffffff818ee3f0 T igc_set_flsw_flash_burst_counter_i225 +ffffffff818ee450 T igc_write_erase_flash_command_i225 +ffffffff818ee550 T igc_pool_flash_update_done_i225 +ffffffff818ee5e0 T igc_set_ltr_i225 +ffffffff818ee850 T igc_init_function_pointers_i225 +ffffffff818ee8c0 T igc_set_eee_i225 +ffffffff818ef000 T igc_init_mac_ops_generic +ffffffff818ef050 T igc_null_ops_generic +ffffffff818ef080 T igc_config_collision_dist_generic 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igc_write_xmdio_reg +ffffffff818f3100 T igc_read_phy_reg_gpy +ffffffff818f3300 T igc_read_xmdio_reg +ffffffff818f33f0 T __igc_access_xmdio_reg +ffffffff818f4000 T ngbe_match +ffffffff818f4030 T ngbe_attach +ffffffff818f4540 T ngbe_detach +ffffffff818f4790 T ngbe_allocate_pci_resources +ffffffff818f4890 T ngbe_allocate_queues +ffffffff818f4d90 T ngbe_allocate_isb +ffffffff818f4e20 T ngbe_init_shared_code +ffffffff818f50f0 T ngbe_check_flash_load +ffffffff818f5390 T ngbe_allocate_msix +ffffffff818f55b0 T ngbe_setup_interface +ffffffff818f57c0 T ngbe_free_isb +ffffffff818f58a0 T ngbe_free_transmit_structures +ffffffff818f5920 T ngbe_free_receive_structures +ffffffff818f59d0 T ngbe_free_pci_resources +ffffffff818f5a60 T ngbe_stop +ffffffff818f5fd0 T ngbe_release_hw_control +ffffffff818f6050 T ngbe_init +ffffffff818f6560 T ngbe_setup_isb +ffffffff818f65d0 T ngbe_configure_pb +ffffffff818f66b0 T ngbe_iff +ffffffff818f68a0 T ngbe_setup_vlan_hw_support +ffffffff818f6960 T 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drm_aperture_remove_conflicting_framebuffers +ffffffff81905080 T drm_aperture_remove_conflicting_pci_framebuffers +ffffffff81906000 T __drm_crtc_commit_free +ffffffff81906020 T drm_crtc_commit_wait +ffffffff819061c0 T drm_atomic_state_default_release +ffffffff81906220 T drm_atomic_state_init +ffffffff81906340 T drm_atomic_state_alloc +ffffffff819063e0 T drm_atomic_state_default_clear +ffffffff819066e0 T drm_atomic_state_clear +ffffffff81906710 T __drm_atomic_state_free +ffffffff819067e0 T drm_atomic_get_crtc_state +ffffffff81906930 T drm_atomic_get_plane_state +ffffffff81906b20 T drm_atomic_private_obj_init +ffffffff81906c10 T drm_atomic_private_obj_fini +ffffffff81906ca0 T drm_atomic_get_private_obj_state +ffffffff81906e50 T drm_atomic_get_old_private_obj_state +ffffffff81906eb0 T drm_atomic_get_new_private_obj_state +ffffffff81906f10 T drm_atomic_get_old_connector_for_encoder +ffffffff81906f80 T drm_atomic_get_new_connector_for_encoder +ffffffff81906ff0 T drm_atomic_get_old_crtc_for_encoder +ffffffff81907090 T drm_atomic_get_new_crtc_for_encoder +ffffffff81907130 T drm_atomic_get_connector_state +ffffffff81907340 T drm_atomic_get_bridge_state +ffffffff81907350 T drm_atomic_get_old_bridge_state +ffffffff819073b0 T drm_atomic_get_new_bridge_state +ffffffff81907410 T drm_atomic_add_encoder_bridges +ffffffff819074d0 T drm_atomic_add_affected_connectors +ffffffff819075f0 T drm_atomic_add_affected_planes +ffffffff81907710 T drm_atomic_check_only +ffffffff819081d0 T drm_atomic_commit +ffffffff819082a0 T drm_atomic_print_new_state +ffffffff81908490 T drm_atomic_nonblocking_commit +ffffffff81908530 T __drm_atomic_helper_disable_plane +ffffffff819085b0 T __drm_atomic_helper_set_config +ffffffff81908920 t drm_atomic_plane_print_state +ffffffff81908b40 t drm_atomic_crtc_print_state +ffffffff81908da0 t drm_atomic_connector_print_state +ffffffff81908ed0 T drm_state_dump +ffffffff8190a000 T drm_atomic_helper_check_modeset +ffffffff8190acd0 t handle_conflicting_encoders +ffffffff8190afd0 t mode_fixup +ffffffff8190b310 T drm_atomic_helper_check_wb_encoder_state +ffffffff8190b370 T drm_atomic_helper_check_plane_state +ffffffff8190b730 T drm_atomic_helper_check_crtc_primary_plane +ffffffff8190b7e0 T drm_atomic_helper_check_planes +ffffffff8190ba90 T drm_atomic_helper_check +ffffffff8190bb40 T drm_atomic_helper_async_check +ffffffff8190be10 T drm_atomic_helper_update_legacy_modeset_state +ffffffff8190c080 T drm_atomic_helper_calc_timestamping_constants +ffffffff8190c120 T drm_atomic_helper_commit_modeset_disables +ffffffff8190c780 T drm_atomic_helper_commit_modeset_enables +ffffffff8190ca50 T drm_atomic_helper_wait_for_fences +ffffffff8190cc30 T drm_atomic_helper_wait_for_vblanks +ffffffff8190cf70 T drm_atomic_helper_wait_for_flip_done +ffffffff8190d130 T drm_atomic_helper_commit_tail +ffffffff8190d2a0 T drm_atomic_helper_commit_planes +ffffffff8190d610 T drm_atomic_helper_fake_vblank +ffffffff8190d6f0 T drm_atomic_helper_commit_hw_done +ffffffff8190d8c0 T drm_atomic_helper_cleanup_planes +ffffffff8190d960 T drm_atomic_helper_commit_tail_rpm +ffffffff8190dad0 t try_wait_for_completion +ffffffff8190db30 T drm_atomic_helper_async_commit +ffffffff8190ddc0 T drm_atomic_helper_commit +ffffffff8190e040 T drm_atomic_helper_prepare_planes +ffffffff8190e2e0 T drm_atomic_helper_unprepare_planes +ffffffff8190e3d0 T drm_atomic_helper_setup_commit +ffffffff8190eab0 t commit_work +ffffffff8190ead0 T drm_atomic_helper_swap_state +ffffffff8190f120 t commit_tail +ffffffff8190f340 t release_crtc_commit +ffffffff8190f380 t crtc_or_fake_commit +ffffffff8190f480 T drm_atomic_helper_wait_for_dependencies +ffffffff8190f680 T drm_atomic_helper_commit_cleanup_done +ffffffff8190f8e0 T drm_atomic_helper_commit_planes_on_crtc +ffffffff8190fb60 T drm_atomic_helper_disable_planes_on_crtc +ffffffff8190fcc0 T drm_atomic_helper_update_plane +ffffffff8190fdf0 T drm_atomic_helper_disable_plane +ffffffff8190feb0 T drm_atomic_helper_set_config +ffffffff8190ff60 T drm_atomic_helper_disable_all +ffffffff81910110 T drm_atomic_helper_shutdown +ffffffff81910260 T drm_atomic_helper_duplicate_state +ffffffff819103b0 T drm_atomic_helper_suspend +ffffffff81910500 T drm_atomic_helper_commit_duplicated_state +ffffffff81910640 T drm_atomic_helper_resume +ffffffff81910770 T drm_atomic_helper_page_flip +ffffffff81910830 t page_flip_common +ffffffff81910930 T drm_atomic_helper_page_flip_target +ffffffff81910a50 T drm_atomic_helper_bridge_propagate_bus_fmt +ffffffff81910ac0 t set_best_encoder +ffffffff81911000 T __drm_atomic_helper_crtc_state_reset +ffffffff81911030 T __drm_atomic_helper_crtc_reset +ffffffff81911090 T drm_atomic_helper_crtc_reset +ffffffff81911130 T __drm_atomic_helper_crtc_duplicate_state +ffffffff81911200 T drm_atomic_helper_crtc_duplicate_state +ffffffff819112a0 T __drm_atomic_helper_crtc_destroy_state +ffffffff81911360 T drm_atomic_helper_crtc_destroy_state +ffffffff81911390 T __drm_atomic_helper_plane_state_reset +ffffffff81911460 T __drm_atomic_helper_plane_reset +ffffffff819114c0 T drm_atomic_helper_plane_reset +ffffffff819115a0 T __drm_atomic_helper_plane_destroy_state +ffffffff81911610 T __drm_atomic_helper_plane_duplicate_state +ffffffff81911690 T drm_atomic_helper_plane_duplicate_state +ffffffff81911770 T drm_atomic_helper_plane_destroy_state +ffffffff819117f0 T __drm_atomic_helper_connector_state_reset +ffffffff81911820 T __drm_atomic_helper_connector_reset +ffffffff81911860 T drm_atomic_helper_connector_reset +ffffffff81911930 T __drm_atomic_helper_connector_destroy_state +ffffffff81911990 T drm_atomic_helper_connector_tv_margins_reset +ffffffff819119f0 T drm_atomic_helper_connector_tv_reset +ffffffff81911bf0 T drm_atomic_helper_connector_tv_check +ffffffff81911cd0 T __drm_atomic_helper_connector_duplicate_state +ffffffff81911d60 T drm_atomic_helper_connector_duplicate_state +ffffffff81911e40 T drm_atomic_helper_connector_destroy_state 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drm_bridge_atomic_destroy_priv_state +ffffffff81919330 t select_bus_fmt_recursive +ffffffff8191a000 T drm_buddy_init +ffffffff8191a470 T drm_buddy_fini +ffffffff8191a560 T drm_get_buddy +ffffffff8191a5a0 T drm_buddy_free_block +ffffffff8191a5f0 t __drm_buddy_free +ffffffff8191a740 T drm_buddy_free_list +ffffffff8191a800 T drm_buddy_block_trim +ffffffff8191aa60 t __alloc_range +ffffffff8191ad40 T drm_buddy_alloc_blocks +ffffffff8191b350 t __drm_buddy_alloc_range +ffffffff8191b3e0 T drm_buddy_block_print +ffffffff8191b420 T drm_buddy_print +ffffffff8191b590 T drm_buddy_module_exit +ffffffff8191b5b0 T drm_buddy_module_init +ffffffff8191b610 t split_block +ffffffff8191c000 T drm_clflush_pages +ffffffff8191c120 T drm_clflush_sg +ffffffff8191c270 T drm_clflush_virt_range +ffffffff8191c340 T drm_need_swiotlb +ffffffff8191c370 T drm_memcpy_from_wc +ffffffff8191c810 T drm_memcpy_init_early +ffffffff8191d000 T drm_client_init +ffffffff8191d110 T drm_client_register +ffffffff8191d1c0 T drm_client_release +ffffffff8191d260 T drm_client_dev_unregister +ffffffff8191d350 T drm_client_dev_hotplug +ffffffff8191d480 T drm_client_dev_restore +ffffffff8191d560 T drm_client_buffer_vmap +ffffffff8191d5d0 T drm_client_buffer_vunmap +ffffffff8191d5f0 T drm_client_framebuffer_create +ffffffff8191d890 T drm_client_framebuffer_delete +ffffffff8191d970 T drm_client_framebuffer_flush +ffffffff8191e000 T drm_client_modeset_create +ffffffff8191e140 T drm_client_modeset_free +ffffffff8191e240 T drm_client_modeset_probe +ffffffff8191f9a0 t drm_client_pick_crtcs +ffffffff8191fc80 T drm_client_rotation +ffffffff8191fe20 T drm_client_modeset_check +ffffffff8191fec0 t drm_client_modeset_commit_atomic +ffffffff819200c0 T drm_client_modeset_commit_locked +ffffffff81920260 T drm_client_modeset_commit +ffffffff819202d0 T drm_client_modeset_dpms +ffffffff81920520 t drm_connector_pick_cmdline_mode +ffffffff81921000 T drm_color_ctm_s31_32_to_qm_n +ffffffff819210d0 T drm_crtc_enable_color_mgmt +ffffffff819211b0 T drm_mode_crtc_set_gamma_size +ffffffff819212d0 T drm_mode_gamma_set_ioctl +ffffffff819217b0 T drm_mode_gamma_get_ioctl +ffffffff819218f0 T drm_get_color_encoding_name +ffffffff81921960 T drm_get_color_range_name +ffffffff819219d0 T drm_plane_create_color_properties +ffffffff81921c30 T drm_color_lut_check +ffffffff81922000 T drm_connector_ida_init +ffffffff81922110 T drm_connector_ida_destroy +ffffffff81922220 T drm_get_connector_type_name +ffffffff81922260 T drm_connector_free_work_fn +ffffffff81922320 T drm_connector_init +ffffffff819223a0 t __drm_connector_init +ffffffff81922710 T drm_connector_init_with_ddc +ffffffff819227a0 T drmm_connector_init +ffffffff81922860 t drm_connector_cleanup_action +ffffffff81922880 T drm_connector_attach_edid_property +ffffffff819228a0 T drm_connector_attach_encoder +ffffffff81922920 T drm_connector_has_possible_encoder +ffffffff81922960 T drm_connector_cleanup +ffffffff81922ca0 T drm_connector_unregister +ffffffff81922d40 T drm_mode_put_tile_group +ffffffff81922dd0 T drm_connector_register +ffffffff81922ec0 T drm_connector_unregister_all +ffffffff81923060 T drm_connector_list_iter_begin +ffffffff819230a0 T drm_connector_list_iter_next +ffffffff819231b0 T drm_connector_list_iter_end +ffffffff81923280 T drm_connector_register_all +ffffffff81923410 T drm_get_connector_status_name +ffffffff81923460 T drm_get_connector_force_name +ffffffff819234a0 T drm_get_subpixel_order_name +ffffffff819234e0 T drm_get_dpms_name +ffffffff81923520 T drm_display_info_set_bus_formats +ffffffff819235f0 T drm_get_dvi_i_select_name +ffffffff81923650 T drm_get_dvi_i_subconnector_name +ffffffff819236b0 T drm_get_tv_mode_name +ffffffff819236f0 T drm_get_tv_mode_from_name +ffffffff81923890 T drm_get_tv_select_name +ffffffff819238f0 T drm_get_tv_subconnector_name +ffffffff81923950 T drm_get_dp_subconnector_name +ffffffff819239e0 T drm_get_colorspace_name +ffffffff81923a20 T drm_connector_create_standard_properties +ffffffff81923ba0 T drm_mode_create_dvi_i_properties +ffffffff81923c40 T drm_connector_attach_dp_subconnector_property +ffffffff81923cb0 T drm_connector_attach_content_type_property +ffffffff81923d50 T drm_mode_create_content_type_property +ffffffff81923dd0 T drm_connector_attach_tv_margin_properties +ffffffff81923e40 T drm_mode_create_tv_margin_properties +ffffffff81923f60 T drm_mode_create_tv_properties_legacy +ffffffff819241b0 T drm_mode_create_tv_properties +ffffffff81924390 T drm_mode_create_scaling_mode_property +ffffffff81924400 T drm_connector_attach_vrr_capable_property +ffffffff81924490 T drm_connector_attach_scaling_mode_property +ffffffff81924660 T drm_mode_create_aspect_ratio_property +ffffffff819246e0 T drm_mode_create_hdmi_colorspace_property +ffffffff81924700 t drm_mode_create_colorspace_property +ffffffff81924830 T drm_mode_create_dp_colorspace_property +ffffffff81924860 T drm_mode_create_suggested_offset_properties +ffffffff81924930 T drm_connector_set_path_property +ffffffff81924990 T drm_connector_set_tile_property +ffffffff81924ae0 T drm_connector_set_link_status_property +ffffffff81924b30 T drm_connector_attach_max_bpc_property +ffffffff81924bf0 T drm_connector_attach_hdr_output_metadata_property +ffffffff81924c40 T drm_connector_attach_colorspace_property +ffffffff81924c90 T drm_connector_atomic_hdr_metadata_equal +ffffffff81924d00 T drm_connector_set_vrr_capable_property +ffffffff81924d50 T drm_connector_set_panel_orientation +ffffffff81924e20 T drm_connector_set_panel_orientation_with_quirk +ffffffff81924f00 T drm_connector_set_orientation_from_panel +ffffffff81924ff0 T drm_connector_create_privacy_screen_properties +ffffffff81925090 T drm_connector_attach_privacy_screen_properties +ffffffff81925100 T drm_connector_attach_privacy_screen_provider +ffffffff81925210 t drm_connector_privacy_screen_notifier +ffffffff819252b0 T drm_connector_update_privacy_screen +ffffffff81925320 T drm_connector_set_obj_prop +ffffffff81925400 T drm_connector_property_set_ioctl +ffffffff81925460 T drm_mode_getconnector +ffffffff81925960 T drm_connector_find_by_fwnode +ffffffff81925a10 T drm_connector_oob_hotplug_event +ffffffff81925b00 T drm_mode_get_tile_group +ffffffff81925bd0 T drm_mode_create_tile_group +ffffffff81925ca0 t drm_connector_free +ffffffff81925ce0 t kasprintf +ffffffff81926000 T drm_crtc_from_index +ffffffff81926060 T drm_crtc_force_disable +ffffffff819261a0 T drm_mode_set_config_internal +ffffffff81926220 T drm_crtc_register_all +ffffffff819262a0 T drm_crtc_unregister_all +ffffffff81926310 T drm_crtc_create_fence +ffffffff819263a0 T drm_crtc_init_with_planes +ffffffff81926470 t __drm_crtc_init_with_planes +ffffffff81926870 T drmm_crtc_init_with_planes +ffffffff81926970 T __drmm_crtc_alloc_with_planes +ffffffff81926ae0 T drm_crtc_cleanup +ffffffff81926c00 T drm_mode_getcrtc +ffffffff81926da0 t __drm_mode_set_config_internal +ffffffff81926f50 T drm_crtc_check_viewport +ffffffff81927000 T drm_mode_setcrtc +ffffffff81927780 T drm_mode_crtc_set_obj_prop +ffffffff81927800 T drm_crtc_create_scaling_filter_property +ffffffff81927870 t drm_crtc_fence_get_driver_name +ffffffff819278f0 t drm_crtc_fence_get_timeline_name +ffffffff81927960 t kasprintf +ffffffff81927a30 t drmm_crtc_init_with_planes_cleanup +ffffffff81928000 T drm_helper_encoder_in_use +ffffffff81928180 T drm_helper_crtc_in_use +ffffffff819282b0 T drm_helper_disable_unused_functions +ffffffff81928330 t __drm_helper_disable_unused_functions +ffffffff81928450 T drm_crtc_helper_set_mode +ffffffff819288f0 T drm_crtc_helper_atomic_check +ffffffff81928940 T drm_connector_get_single_encoder +ffffffff81928a20 T drm_crtc_helper_set_config +ffffffff81929660 T drm_helper_connector_dpms +ffffffff81929930 T drm_helper_resume_force_mode +ffffffff81929c30 T drm_helper_force_disable_all +ffffffff8192a000 T drm_atomic_helper_check_plane_damage +ffffffff8192a0a0 T drm_atomic_helper_dirtyfb +ffffffff8192a350 T drm_atomic_helper_damage_iter_init +ffffffff8192a4a0 T drm_atomic_helper_damage_iter_next +ffffffff8192a540 T drm_atomic_helper_damage_merged +ffffffff8192b000 T displayid_iter_edid_begin +ffffffff8192b050 T __displayid_iter_next +ffffffff8192b300 T displayid_iter_end +ffffffff8192b350 T displayid_version +ffffffff8192b380 T displayid_primary_use +ffffffff8192c000 T drm_mode_create_dumb +ffffffff8192c0e0 T drm_mode_create_dumb_ioctl +ffffffff8192c1c0 T drm_mode_mmap_dumb_ioctl +ffffffff8192c230 T drm_mode_destroy_dumb +ffffffff8192c280 T drm_mode_destroy_dumb_ioctl +ffffffff8192d000 T drm_edid_header_is_valid +ffffffff8192d080 T drm_edid_are_equal +ffffffff8192d0f0 T drm_edid_block_valid +ffffffff8192d300 t edid_block_check +ffffffff8192d430 t edid_block_status_print +ffffffff8192d520 T drm_edid_is_valid +ffffffff8192d5a0 T drm_edid_valid +ffffffff8192d6d0 t drm_edid_block_count +ffffffff8192d810 T drm_edid_override_show +ffffffff8192d860 T drm_edid_override_set +ffffffff8192da00 T drm_edid_alloc +ffffffff8192dac0 T drm_edid_free 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drm_i2c_encoder_commit +ffffffff819390a0 T drm_i2c_encoder_mode_set +ffffffff819390c0 T drm_i2c_encoder_detect +ffffffff819390e0 T drm_i2c_encoder_save +ffffffff81939100 T drm_i2c_encoder_restore +ffffffff8193a000 T drm_exec_init +ffffffff8193a080 T drm_exec_fini +ffffffff8193a100 t drm_exec_unlock_all +ffffffff8193a270 T drm_exec_cleanup +ffffffff8193a300 T drm_exec_lock_obj +ffffffff8193a590 t drm_exec_obj_locked +ffffffff8193a660 t dma_resv_unlock +ffffffff8193a700 T drm_exec_unlock_obj +ffffffff8193a890 T drm_exec_prepare_obj +ffffffff8193a910 T drm_exec_prepare_array +ffffffff8193a9c0 t dma_resv_lock_slow_interruptible +ffffffff8193aaf0 t dma_resv_lock_slow +ffffffff8193abd0 t __ww_mutex_lock +ffffffff8193b000 T drm_fb_helper_debug_enter +ffffffff8193b100 T drm_fb_helper_debug_leave +ffffffff8193b270 T drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff8193b310 t __drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff8193b3c0 T drm_fb_helper_blank +ffffffff8193b4b0 T drm_fb_helper_prepare +ffffffff8193b5a0 t drm_fb_helper_resume_worker +ffffffff8193b5d0 t drm_fb_helper_damage_work +ffffffff8193b730 T drm_fb_helper_unprepare +ffffffff8193b760 T drm_fb_helper_init +ffffffff8193b7d0 T drm_fb_helper_alloc_info +ffffffff8193b830 T drm_fb_helper_release_info +ffffffff8193b880 T drm_fb_helper_unregister_info +ffffffff8193b8b0 T drm_fb_helper_fini +ffffffff8193b9b0 T drm_fb_helper_set_suspend +ffffffff8193b9e0 T drm_fb_helper_set_suspend_unlocked +ffffffff8193ba10 T drm_fb_helper_set_par +ffffffff8193bac0 T drm_fb_helper_pan_display +ffffffff8193bb90 T drm_fb_helper_fill_info +ffffffff8193bc50 T drm_fb_helper_initial_config +ffffffff8193bc80 t __drm_fb_helper_initial_config_and_unlock +ffffffff8193c2c0 T drm_fb_helper_hotplug_event +ffffffff8193c3f0 t drm_setup_crtcs_fb +ffffffff8193c530 T drm_fb_helper_lastclose +ffffffff8193c5e0 T drm_fb_helper_output_poll_changed +ffffffff8193d000 T drm_fb_dma_get_gem_obj +ffffffff8193e000 T drm_fbdev_dma_setup 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drm_fb_xrgb8888_to_rgb565_line +ffffffff81942b20 T drm_fb_xrgb8888_to_xrgb1555 +ffffffff81942b80 t drm_fb_xrgb8888_to_xrgb1555_line +ffffffff81942c90 T drm_fb_xrgb8888_to_argb1555 +ffffffff81942cf0 t drm_fb_xrgb8888_to_argb1555_line +ffffffff81942e10 T drm_fb_xrgb8888_to_rgba5551 +ffffffff81942e70 t drm_fb_xrgb8888_to_rgba5551_line +ffffffff81942f80 T drm_fb_xrgb8888_to_rgb888 +ffffffff81942fe0 t drm_fb_xrgb8888_to_rgb888_line +ffffffff81943070 T drm_fb_xrgb8888_to_argb8888 +ffffffff819430d0 t drm_fb_xrgb8888_to_argb8888_line +ffffffff819431a0 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff81943200 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff81943280 T drm_fb_xrgb8888_to_argb2101010 +ffffffff819432e0 t drm_fb_xrgb8888_to_argb2101010_line +ffffffff81943370 T drm_fb_xrgb8888_to_gray8 +ffffffff819433d0 t drm_fb_xrgb8888_to_gray8_line +ffffffff81943440 T drm_fb_blit +ffffffff81943ac0 T drm_fb_xrgb8888_to_mono +ffffffff81943e50 T drm_fb_build_fourcc_list +ffffffff81944120 t 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drm_mode_dirtyfb_ioctl +ffffffff819474e0 T drm_fb_release +ffffffff819475f0 T drm_framebuffer_free +ffffffff81947630 T drm_framebuffer_init +ffffffff81947790 T drm_framebuffer_unregister_private +ffffffff819477d0 T drm_framebuffer_cleanup +ffffffff81947830 T drm_framebuffer_remove +ffffffff81947cc0 T drm_framebuffer_plane_width +ffffffff81947d10 T drm_framebuffer_plane_height +ffffffff81947d60 T drm_framebuffer_print_info +ffffffff81949000 T drm_ref +ffffffff81949030 T drm_unref +ffffffff819490b0 T drm_fault +ffffffff81949280 T drm_flush +ffffffff819492b0 T udv_attach_drm +ffffffff819494a0 T drm_gem_init +ffffffff81949550 t drm_gem_init_release +ffffffff81949570 T drm_gem_object_init +ffffffff819496f0 T drm_gem_private_object_init +ffffffff81949810 T drm_gem_private_object_fini +ffffffff81949870 T drm_gem_handle_delete +ffffffff81949960 t drm_gem_object_release_handle +ffffffff819499f0 T drm_gem_dumb_map_offset +ffffffff81949b20 T drm_gem_object_lookup +ffffffff81949b90 T drm_gem_create_mmap_offset +ffffffff81949bc0 T drm_gem_handle_create_tail +ffffffff81949d30 t drm_gem_object_handle_put_unlocked +ffffffff81949e80 T drm_gem_handle_create +ffffffff81949ed0 T drm_gem_free_mmap_offset +ffffffff81949f00 T drm_gem_create_mmap_offset_size +ffffffff81949f30 T drm_gem_get_pages +ffffffff81949f80 T drm_gem_put_pages +ffffffff81949fb0 T drm_gem_objects_lookup +ffffffff8194a110 T drm_gem_dma_resv_wait +ffffffff8194a240 T drm_gem_close_ioctl +ffffffff8194a290 T drm_gem_flink_ioctl +ffffffff8194a400 T drm_gem_open_ioctl +ffffffff8194a530 T drm_gem_open +ffffffff8194a560 T drm_gem_release +ffffffff8194a5a0 T drm_gem_object_release +ffffffff8194a6f0 T drm_gem_lru_remove +ffffffff8194a7d0 T drm_gem_object_free +ffffffff8194a820 T drm_gem_mmap_obj +ffffffff8194a920 T drm_gem_mmap +ffffffff8194ab90 T drm_gem_print_info +ffffffff8194acb0 T drm_gem_pin +ffffffff8194acf0 T drm_gem_unpin +ffffffff8194ad30 T drm_gem_vmap +ffffffff8194ad90 T drm_gem_vunmap +ffffffff8194ae00 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drm_ht_verbose_list +ffffffff8194f140 T drm_ht_insert_item +ffffffff8194f190 T drm_ht_just_insert_please +ffffffff8194f260 T drm_ht_find_item +ffffffff8194f2b0 T drm_ht_remove_key +ffffffff8194f300 T drm_ht_remove_item +ffffffff8194f350 T drm_ht_remove +ffffffff81950000 T drm_getunique +ffffffff819500a0 T drm_getclient +ffffffff81950110 T drm_noop +ffffffff81950170 T drm_invalid_op +ffffffff819501a0 T drm_version +ffffffff819503b0 T pledge_ioctl_drm +ffffffff81950480 T drm_ioctl_kernel +ffffffff819504d0 T drm_ioctl +ffffffff81950520 T drm_ioctl_flags +ffffffff81950570 T drm_do_ioctl +ffffffff819508a0 T drmioctl +ffffffff819509f0 t drm_getstats +ffffffff81950a40 t drm_setversion +ffffffff81950ba0 t drm_getcap +ffffffff81950d60 t drm_setclientcap +ffffffff81951000 T tasklet_unlock_wait +ffffffff81951080 T tasklet_unlock_spin_wait +ffffffff81951100 T tasklet_run +ffffffff81951160 T set_current_state +ffffffff81951200 T __set_current_state +ffffffff81951290 T schedule +ffffffff819512d0 T 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backlight_schedule_update_status +ffffffff819557a0 T backlight_enable +ffffffff819557e0 T backlight_disable +ffffffff81955820 T backlight_device_get_by_name +ffffffff81955890 T dev_set_drvdata +ffffffff81955930 T dev_get_drvdata +ffffffff81955990 T drm_sysfs_hotplug_event +ffffffff819559b0 T drm_sysfs_connector_hotplug_event +ffffffff819559d0 T drm_sysfs_connector_status_event +ffffffff819559f0 T drm_sysfs_connector_property_event +ffffffff81955a10 T dma_fence_get +ffffffff81955a50 T dma_fence_get_rcu +ffffffff81955a90 T dma_fence_get_rcu_safe +ffffffff81955ad0 T dma_fence_release +ffffffff81955b00 T dma_fence_put +ffffffff81955b70 T dma_fence_signal_timestamp_locked +ffffffff81955c20 T dma_fence_signal +ffffffff81955d50 T dma_fence_signal_locked +ffffffff81955e60 T dma_fence_signal_timestamp +ffffffff81955f40 T dma_fence_is_signaled +ffffffff81955fb0 T dma_fence_is_signaled_locked +ffffffff819560f0 T dma_fence_timestamp +ffffffff81956190 T dma_fence_wait_timeout +ffffffff819561f0 T dma_fence_default_wait +ffffffff819563d0 T dma_fence_wait +ffffffff81956430 T dma_fence_enable_sw_signaling +ffffffff81956580 T dma_fence_init +ffffffff819565e0 T dma_fence_add_callback +ffffffff81956710 T dma_fence_remove_callback +ffffffff81956790 T dma_fence_context_alloc +ffffffff819567d0 t dma_fence_default_wait_cb +ffffffff81956820 T dma_fence_wait_any_timeout +ffffffff81956b30 T dma_fence_set_deadline +ffffffff81956bd0 T dma_fence_get_stub +ffffffff81956d60 T dma_fence_allocate_private_stub +ffffffff81956e80 T dma_fence_array_create +ffffffff81956f90 t irq_dma_fence_array_work +ffffffff81957020 T dma_fence_array_first +ffffffff81957070 T dma_fence_array_next +ffffffff819570c0 t dma_fence_array_get_driver_name +ffffffff819570f0 t dma_fence_array_get_timeline_name +ffffffff81957120 t dma_fence_array_enable_signaling +ffffffff81957220 t dma_fence_array_signaled +ffffffff81957270 t dma_fence_array_release +ffffffff81957330 T dma_fence_chain_find_seqno +ffffffff81957450 T dma_fence_chain_walk +ffffffff81957680 T dma_fence_chain_init +ffffffff81957790 t dma_fence_chain_get_driver_name +ffffffff819577c0 t dma_fence_chain_get_timeline_name +ffffffff819577f0 t dma_fence_chain_enable_signaling +ffffffff819579a0 t dma_fence_chain_signaled +ffffffff81957a90 t dma_fence_chain_release +ffffffff81957bd0 T dma_fence_is_container +ffffffff81957c20 T dmabuf_read +ffffffff81957c50 T dmabuf_write +ffffffff81957c80 T dmabuf_ioctl +ffffffff81957cb0 T dmabuf_kqfilter +ffffffff81957ce0 T dmabuf_stat +ffffffff81957da0 T dmabuf_close +ffffffff81957e10 T dmabuf_seek +ffffffff81957ea0 T dma_buf_export +ffffffff81957f50 T dma_buf_get +ffffffff81957fe0 T dma_buf_put +ffffffff81958090 T dma_buf_fd +ffffffff819581a0 T get_dma_buf +ffffffff819581e0 T pcie_get_speed_cap +ffffffff81958390 T printk +ffffffff81958430 T pcie_get_width_cap +ffffffff81958520 T pcie_aspm_enabled +ffffffff819585b0 T wait_on_bit +ffffffff81958680 T wait_on_bit_timeout +ffffffff81958750 T wake_up_bit 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mipi_dsi_dcs_set_display_off +ffffffff8195bf20 T mipi_dsi_dcs_set_display_on +ffffffff8195bfd0 T mipi_dsi_dcs_set_column_address +ffffffff8195c090 T mipi_dsi_dcs_set_page_address +ffffffff8195c150 T mipi_dsi_dcs_set_tear_off +ffffffff8195c200 T mipi_dsi_dcs_set_tear_on +ffffffff8195c2b0 T mipi_dsi_dcs_set_pixel_format +ffffffff8195d000 T __drm_mm_interval_first +ffffffff8195d0c0 T drm_mm_reserve_node +ffffffff8195d340 t add_hole +ffffffff8195d4a0 T drm_mm_insert_node_in_range +ffffffff8195da90 T drm_mm_remove_node +ffffffff8195dbc0 T drm_mm_replace_node +ffffffff8195dda0 T drm_mm_scan_init_with_range +ffffffff8195de30 T drm_mm_scan_add_block +ffffffff8195dfa0 T drm_mm_scan_remove_block +ffffffff8195e020 T drm_mm_scan_color_evict +ffffffff8195e100 T drm_mm_init +ffffffff8195e1b0 T drm_mm_takedown +ffffffff8195e1f0 T drm_mm_print +ffffffff8195f000 T drm_modeset_register_all +ffffffff8195f0a0 T drm_modeset_unregister_all +ffffffff8195f0e0 T drm_mode_getresources +ffffffff8195f390 T drm_mode_config_reset +ffffffff8195f4f0 T drmm_mode_config_init +ffffffff8195fb70 T drm_mode_config_cleanup +ffffffff8195fe90 t drm_mode_config_init_release +ffffffff8195fea0 T drm_mode_config_validate +ffffffff81961000 T __drm_mode_object_add +ffffffff81961100 T drm_mode_object_add +ffffffff819611e0 T drm_mode_object_register +ffffffff81961230 T drm_mode_object_unregister +ffffffff819612d0 T drm_mode_object_lease_required +ffffffff81961320 T __drm_mode_object_find +ffffffff819613d0 T drm_mode_object_find +ffffffff81961480 T drm_mode_object_put +ffffffff81961500 T drm_mode_object_get +ffffffff81961560 T drm_object_attach_property +ffffffff81961670 T drm_object_property_set_value +ffffffff81961750 T drm_object_property_get_value +ffffffff819617e0 t __drm_object_property_get_value +ffffffff819618c0 T drm_object_property_get_default_value +ffffffff81961990 T drm_mode_object_get_properties +ffffffff81961ad0 T drm_mode_obj_get_properties_ioctl +ffffffff81961d20 T drm_mode_obj_find_prop_id +ffffffff81961d80 T drm_mode_obj_set_property_ioctl +ffffffff81963000 T drm_mode_debug_printmodeline +ffffffff81963140 T drm_mode_vrefresh +ffffffff819631e0 T drm_mode_create +ffffffff81963200 T drm_mode_destroy +ffffffff81963240 T drm_mode_probed_add +ffffffff819632e0 T drm_analog_tv_mode +ffffffff81963b80 T drm_cvt_mode +ffffffff81964000 T drm_mode_set_name +ffffffff81964050 T drm_gtf_mode_complex +ffffffff81964350 T drm_gtf_mode +ffffffff819643a0 T drm_mode_get_hv_timing +ffffffff819643f0 T drm_mode_init +ffffffff819644c0 T drm_mode_set_crtcinfo +ffffffff81964680 T drm_mode_copy +ffffffff819646e0 T drm_mode_duplicate +ffffffff81964760 T drm_mode_match +ffffffff81964900 T drm_mode_equal +ffffffff81964920 T drm_mode_equal_no_clocks +ffffffff81964940 T drm_mode_equal_no_clocks_no_stereo +ffffffff81964a00 T drm_mode_validate_driver +ffffffff81964af0 T drm_mode_validate_size +ffffffff81964b40 T drm_mode_validate_ycbcr420 +ffffffff81964bb0 T drm_mode_is_420_only +ffffffff81964c00 T drm_get_mode_status_name +ffffffff81964c80 T drm_mode_prune_invalid +ffffffff81964f10 T drm_mode_sort +ffffffff81964f40 t drm_mode_compare +ffffffff819650e0 T drm_connector_list_update +ffffffff819652b0 T drm_mode_parse_command_line_for_connector +ffffffff819652e0 T drm_mode_create_from_cmdline_mode +ffffffff819654a0 T drm_mode_convert_to_umode +ffffffff81965640 T drm_mode_convert_umode +ffffffff81965860 T drm_mode_is_420_also +ffffffff819658b0 T drm_mode_is_420 +ffffffff81966000 T drm_helper_move_panel_connectors_to_head +ffffffff819660f0 T drm_helper_mode_fill_fb_struct +ffffffff819661b0 T drm_crtc_init +ffffffff81966280 T drm_mode_config_helper_suspend +ffffffff81966310 T drm_mode_config_helper_resume +ffffffff81967000 T drm_modeset_lock_all +ffffffff81967290 T drm_modeset_acquire_init +ffffffff81967320 T drm_modeset_lock_all_ctx +ffffffff81967410 T drm_modeset_backoff +ffffffff819674e0 T drm_modeset_acquire_fini +ffffffff81967510 T drm_warn_on_modeset_not_all_locked +ffffffff81967660 T drm_modeset_unlock_all +ffffffff81967750 T drm_modeset_drop_locks +ffffffff819677e0 T drm_modeset_unlock +ffffffff819678b0 t modeset_lock +ffffffff81967bf0 T drm_modeset_lock_init +ffffffff81967c50 T drm_modeset_lock +ffffffff81967d70 T drm_modeset_lock_single_interruptible +ffffffff81967e90 t __ww_mutex_lock +ffffffff81969000 T drm_mtrr_add +ffffffff81969070 T drm_mtrr_del +ffffffff8196a000 T drm_panel_init +ffffffff8196a090 T drm_panel_add +ffffffff8196a0e0 T drm_panel_remove +ffffffff8196a140 T drm_panel_prepare +ffffffff8196a250 T drm_panel_unprepare +ffffffff8196a360 T drm_panel_enable +ffffffff8196a450 T drm_panel_disable +ffffffff8196a530 T drm_panel_get_modes +ffffffff8196a580 T drm_is_panel_follower +ffffffff8196a5d0 T drm_panel_add_follower +ffffffff8196a620 T drm_panel_remove_follower +ffffffff8196a640 T devm_drm_panel_add_follower +ffffffff8196a690 T drm_panel_of_backlight +ffffffff8196b000 T drm_get_panel_orientation_quirk +ffffffff8196c000 T drm_pci_set_busid +ffffffff8196c090 t kasprintf +ffffffff8196d000 T drm_universal_plane_init +ffffffff8196d0e0 t __drm_universal_plane_init +ffffffff8196d5c0 T __drmm_universal_plane_alloc +ffffffff8196d700 t drmm_universal_plane_alloc_release +ffffffff8196d750 T __drm_universal_plane_alloc +ffffffff8196d890 T drm_plane_register_all +ffffffff8196d980 T drm_plane_unregister_all +ffffffff8196d9f0 T drm_plane_cleanup +ffffffff8196db40 T drm_plane_from_index +ffffffff8196dba0 T drm_plane_force_disable +ffffffff8196dcb0 T drm_mode_plane_set_obj_prop +ffffffff8196dd30 T drm_mode_getplane_res +ffffffff8196de60 T drm_mode_getplane +ffffffff8196dfb0 T drm_plane_check_pixel_format +ffffffff8196e070 T drm_any_plane_has_format +ffffffff8196e1a0 T drm_mode_setplane +ffffffff8196e490 T drm_mode_cursor_ioctl +ffffffff8196e500 t drm_mode_cursor_common +ffffffff8196ea40 T drm_mode_cursor2_ioctl +ffffffff8196ea60 T drm_mode_page_flip_ioctl +ffffffff8196efe0 T drm_plane_enable_fb_damage_clips +ffffffff8196f000 T drm_plane_get_damage_clips_count +ffffffff8196f040 T __drm_plane_get_damage_clips +ffffffff8196f080 T drm_plane_get_damage_clips +ffffffff8196f120 T drm_create_scaling_filter_prop +ffffffff8196f270 T drm_plane_create_scaling_filter_property +ffffffff8196f2e0 t kvasprintf +ffffffff8196f380 t kasprintf +ffffffff8196f450 t create_in_format_blob +ffffffff8196f640 t __setplane_atomic +ffffffff8196f7e0 t __setplane_internal +ffffffff8196f9f0 t __setplane_check +ffffffff81970000 T drm_plane_helper_update_primary +ffffffff819704c0 t get_connectors_for_crtc +ffffffff819705d0 T drm_plane_helper_disable_primary +ffffffff81970680 T drm_plane_helper_destroy +ffffffff819706b0 T drm_plane_helper_atomic_check +ffffffff81971000 T drm_prime_remove_buf_handle +ffffffff819710a0 T drm_prime_init_file_private +ffffffff81971100 T drm_prime_destroy_file_private +ffffffff81971160 T drm_gem_dmabuf_export +ffffffff819711c0 T drm_gem_dmabuf_release +ffffffff81971200 T drm_gem_prime_fd_to_handle +ffffffff81971420 T drm_gem_prime_import +ffffffff81971480 t drm_prime_add_buf_handle +ffffffff819715c0 T drm_prime_fd_to_handle_ioctl +ffffffff819715f0 T drm_gem_prime_handle_to_fd +ffffffff81971820 T drm_prime_handle_to_fd_ioctl +ffffffff81971890 T drm_gem_map_attach +ffffffff819718e0 T drm_gem_map_detach +ffffffff81971900 T drm_gem_dmabuf_vmap +ffffffff81971920 T drm_gem_dmabuf_vunmap +ffffffff81971940 T drm_gem_prime_mmap +ffffffff81971990 T drm_prime_pages_to_sg +ffffffff819719e0 T drm_prime_get_contiguous_size +ffffffff81971a30 T drm_gem_prime_export +ffffffff81971ac0 T drm_gem_prime_import_dev +ffffffff81971b20 T drm_prime_sg_to_page_array +ffffffff81971b70 T drm_prime_sg_to_dma_addr_array +ffffffff81971bc0 T drm_prime_gem_destroy +ffffffff81972000 T __drm_puts_coredump +ffffffff819720e0 T __drm_printfn_coredump +ffffffff819722b0 T __drm_puts_seq_file +ffffffff819722e0 T __drm_printfn_seq_file +ffffffff81972310 T __drm_printfn_info +ffffffff81972340 T __drm_printfn_debug +ffffffff81972370 T __drm_printfn_err +ffffffff819723b0 T drm_puts +ffffffff819723e0 T drm_printf +ffffffff81972460 T drm_print_bits +ffffffff81972690 T drm_dev_printk +ffffffff81972730 T __drm_dev_dbg +ffffffff819727c0 T ___drm_dbg +ffffffff81972850 T __drm_err +ffffffff819728e0 T drm_print_regset32 +ffffffff81973000 T drm_crtc_mode_valid +ffffffff81973050 T drm_encoder_mode_valid +ffffffff81973090 T drm_connector_mode_valid +ffffffff81973110 T drm_kms_helper_poll_enable +ffffffff81973250 T drm_kms_helper_poll_reschedule +ffffffff819732b0 T drm_helper_probe_detect +ffffffff819734a0 T drm_helper_probe_single_connector_modes +ffffffff81973a20 t __drm_helper_update_and_validate +ffffffff81973dd0 T drm_kms_helper_hotplug_event +ffffffff81973e10 T drm_kms_helper_connector_hotplug_event +ffffffff81973e50 T drm_kms_helper_is_poll_worker +ffffffff81973e80 T drm_kms_helper_poll_disable +ffffffff81973f50 T drm_kms_helper_poll_init +ffffffff81973fb0 t output_poll_execute +ffffffff81974200 T drm_kms_helper_poll_fini +ffffffff81974250 T drm_connector_helper_hpd_irq_event +ffffffff81974310 t check_connector_changed +ffffffff819744e0 T drm_helper_hpd_irq_event +ffffffff81974630 T drm_crtc_helper_mode_valid_fixed +ffffffff81974680 T drm_connector_helper_get_modes_from_ddc +ffffffff81974710 T drm_connector_helper_get_modes_fixed +ffffffff81974880 T drm_connector_helper_get_modes +ffffffff819748f0 T drm_connector_helper_tv_get_modes +ffffffff81974b30 t __delayed_work_tick +ffffffff81975000 T drm_property_create +ffffffff819751f0 T drm_property_create_enum +ffffffff819752a0 T drm_property_add_enum +ffffffff819754a0 T drm_property_destroy +ffffffff81975550 T drm_property_create_bitmask +ffffffff81975680 T drm_property_create_range +ffffffff819756f0 T drm_property_create_signed_range +ffffffff81975760 T drm_property_create_object +ffffffff81975800 T drm_property_create_bool +ffffffff81975860 T drm_mode_getproperty_ioctl +ffffffff81975ab0 T drm_property_create_blob +ffffffff81975bf0 t drm_property_free_blob +ffffffff81975c70 T drm_property_blob_put +ffffffff81975cb0 T drm_property_destroy_user_blobs +ffffffff81975d30 T drm_property_blob_get +ffffffff81975d70 T drm_property_lookup_blob +ffffffff81975d90 T drm_property_replace_global_blob +ffffffff81975ee0 T drm_property_replace_blob +ffffffff81975f50 T drm_mode_getblob_ioctl +ffffffff81976010 T drm_mode_createblob_ioctl +ffffffff81976110 T drm_mode_destroyblob_ioctl +ffffffff81976210 T drm_property_change_valid_get +ffffffff81976470 T drm_property_change_valid_put +ffffffff81977000 T drm_rect_intersect +ffffffff81977080 T drm_rect_clip_scaled +ffffffff819772f0 T drm_rect_calc_hscale +ffffffff819773c0 T drm_rect_calc_vscale +ffffffff81977490 T drm_rect_debug_print +ffffffff819775b0 T drm_rect_rotate +ffffffff81977670 T drm_rect_rotate_inv +ffffffff81978000 T drm_self_refresh_helper_update_avg_times +ffffffff81978150 T drm_self_refresh_helper_alter_state +ffffffff819782e0 T drm_self_refresh_helper_init +ffffffff81978470 t drm_self_refresh_helper_entry_work +ffffffff819785d0 T drm_self_refresh_helper_cleanup +ffffffff81978650 t __delayed_work_tick +ffffffff81979000 T drm_suballoc_manager_init +ffffffff81979180 T drm_suballoc_manager_fini +ffffffff81979290 t drm_suballoc_try_free +ffffffff81979380 T drm_suballoc_new +ffffffff81979da0 t drm_suballoc_event +ffffffff81979ee0 T drm_suballoc_free +ffffffff8197b000 T drm_syncobj_find +ffffffff8197b080 T drm_syncobj_add_point +ffffffff8197b190 t syncobj_wait_syncobj_func +ffffffff8197b240 t syncobj_eventfd_entry_func +ffffffff8197b320 T drm_syncobj_replace_fence +ffffffff8197b3d0 T drm_syncobj_find_fence +ffffffff8197b720 t drm_syncobj_fence_add_wait +ffffffff8197b7f0 T drm_syncobj_free +ffffffff8197b870 T drm_syncobj_create +ffffffff8197ba40 T drm_syncobj_get_handle +ffffffff8197bb60 T drm_syncobj_get_fd +ffffffff8197bbb0 T drm_syncobj_open +ffffffff8197bbe0 T drm_syncobj_release +ffffffff8197bc20 t drm_syncobj_release_handle +ffffffff8197bce0 T drm_syncobj_create_ioctl +ffffffff8197be10 T drm_syncobj_destroy_ioctl +ffffffff8197bf50 T drm_syncobj_handle_to_fd_ioctl +ffffffff8197c140 T drm_syncobj_fd_to_handle_ioctl +ffffffff8197c2f0 T drm_syncobj_transfer_ioctl +ffffffff8197c6d0 T drm_timeout_abs_to_jiffies +ffffffff8197c7a0 T drm_syncobj_wait_ioctl +ffffffff8197c920 t drm_syncobj_array_find +ffffffff8197cb40 t drm_syncobj_array_free +ffffffff8197cc30 T drm_syncobj_timeline_wait_ioctl +ffffffff8197cdb0 T drm_syncobj_eventfd_ioctl +ffffffff8197cde0 T drm_syncobj_reset_ioctl +ffffffff8197cec0 T drm_syncobj_signal_ioctl +ffffffff8197d020 T drm_syncobj_timeline_signal_ioctl +ffffffff8197d260 T drm_syncobj_query_ioctl +ffffffff8197d470 t drm_syncobj_array_wait_timeout +ffffffff8197d8d0 t syncobj_wait_fence_func +ffffffff8197d8f0 t syncobj_eventfd_entry_fence_func +ffffffff8197e000 T drm_vblank_count +ffffffff8197e090 T drm_crtc_accurate_vblank_count +ffffffff8197e1a0 t drm_update_vblank_count +ffffffff8197e5e0 T drm_vblank_disable_and_save +ffffffff8197e730 T drm_vblank_init +ffffffff8197e8b0 t vblank_disable_fn +ffffffff8197e930 t drm_vblank_init_release +ffffffff8197e9c0 T drm_dev_has_vblank +ffffffff8197e9f0 T drm_crtc_vblank_waitqueue +ffffffff8197ea40 T drm_calc_timestamping_constants +ffffffff8197ec60 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff8197f1b0 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff8197f1d0 T drm_crtc_vblank_count +ffffffff8197f260 T drm_crtc_vblank_count_and_time +ffffffff8197f320 t drm_vblank_count_and_time +ffffffff8197f3d0 T drm_crtc_next_vblank_start +ffffffff8197f520 T drm_crtc_arm_vblank_event +ffffffff8197f600 T drm_crtc_send_vblank_event +ffffffff8197f7b0 t send_vblank_event +ffffffff8197f860 T drm_vblank_get +ffffffff8197f960 t drm_vblank_enable +ffffffff8197fb60 T drm_crtc_vblank_get +ffffffff8197fc60 T drm_vblank_put +ffffffff8197fd90 T drm_crtc_vblank_put +ffffffff8197fdb0 T drm_wait_one_vblank +ffffffff819802a0 T drm_crtc_wait_one_vblank +ffffffff819802c0 T drm_crtc_vblank_off +ffffffff819806b0 T drm_crtc_vblank_reset +ffffffff819807e0 T drm_crtc_set_max_vblank_count +ffffffff819808c0 T drm_crtc_vblank_on +ffffffff81980a10 t drm_reset_vblank_timestamp +ffffffff81980bf0 T drm_crtc_vblank_restore +ffffffff81980fd0 T drm_legacy_modeset_ctl_ioctl +ffffffff819811f0 T drm_wait_vblank_ioctl +ffffffff81981740 t drm_wait_vblank_reply +ffffffff81981850 t drm_queue_vblank_event +ffffffff81981b90 T drm_handle_vblank +ffffffff81981e80 t drm_handle_vblank_events +ffffffff81982110 T drm_crtc_handle_vblank +ffffffff81982130 T drm_crtc_get_sequence_ioctl +ffffffff81982300 T drm_crtc_queue_sequence_ioctl +ffffffff819825c0 t __get_vblank_counter +ffffffff81983000 T drm_handle_vblank_works +ffffffff819831a0 T drm_vblank_cancel_pending_works +ffffffff819832e0 T drm_vblank_work_schedule +ffffffff81983550 T drm_vblank_work_cancel_sync +ffffffff819836a0 T drm_vblank_work_flush +ffffffff819837d0 T drm_vblank_work_init +ffffffff81983840 T drm_vblank_worker_init +ffffffff81984000 T drm_vma_offset_manager_init +ffffffff81984040 T drm_vma_offset_manager_destroy +ffffffff81984060 T drm_vma_offset_lookup_locked +ffffffff819840f0 T drm_vma_offset_add +ffffffff81984180 T drm_vma_offset_remove +ffffffff819841d0 T drm_vma_node_allow +ffffffff819841f0 t vma_node_allow +ffffffff81984310 T drm_vma_node_allow_once +ffffffff81984330 T drm_vma_node_revoke +ffffffff819843b0 T drm_vma_node_is_allowed +ffffffff81985000 T hdmi_avi_infoframe_init +ffffffff81985070 T hdmi_avi_infoframe_check +ffffffff819850c0 T hdmi_avi_infoframe_pack_only +ffffffff819852c0 T hdmi_avi_infoframe_pack +ffffffff81985320 T hdmi_spd_infoframe_init +ffffffff819853e0 T hdmi_spd_infoframe_check +ffffffff81985430 T hdmi_spd_infoframe_pack_only +ffffffff81985570 T hdmi_spd_infoframe_pack +ffffffff819856d0 T hdmi_audio_infoframe_init +ffffffff81985720 T hdmi_audio_infoframe_check +ffffffff81985770 T hdmi_audio_infoframe_pack_only +ffffffff819858d0 T hdmi_audio_infoframe_pack +ffffffff81985920 T hdmi_audio_infoframe_pack_for_dp +ffffffff81985a10 T hdmi_vendor_infoframe_init +ffffffff81985a70 T hdmi_vendor_infoframe_check +ffffffff81985b10 T hdmi_vendor_infoframe_pack_only +ffffffff81985cd0 T hdmi_vendor_infoframe_pack +ffffffff81985d70 T hdmi_drm_infoframe_init +ffffffff81985dd0 T hdmi_drm_infoframe_check +ffffffff81985e20 T hdmi_drm_infoframe_pack_only +ffffffff81986010 T hdmi_drm_infoframe_pack +ffffffff81986060 T hdmi_infoframe_check +ffffffff819861b0 T hdmi_infoframe_pack_only +ffffffff819863d0 T hdmi_infoframe_pack +ffffffff81986540 T hdmi_infoframe_log +ffffffff81987430 T hdmi_drm_infoframe_unpack_only +ffffffff81987510 T hdmi_infoframe_unpack +ffffffff81988000 T list_sort +ffffffff81989000 T radix_tree_lookup +ffffffff819890b0 T radix_tree_iter_find +ffffffff81989180 T radix_tree_delete +ffffffff81989310 T radix_tree_iter_delete +ffffffff81989330 T radix_tree_insert +ffffffff8198a000 T sort +ffffffff8198a040 t qsort +ffffffff8198c000 T drm_dp_dual_mode_read +ffffffff8198c110 T drm_dp_dual_mode_write +ffffffff8198c1f0 T drm_dp_dual_mode_detect +ffffffff8198c490 T drm_dp_dual_mode_max_tmds_clock +ffffffff8198c5b0 T drm_dp_dual_mode_get_tmds_output +ffffffff8198c6d0 T drm_dp_dual_mode_set_tmds_output +ffffffff8198c950 T drm_dp_get_dual_mode_type_name +ffffffff8198c9c0 T drm_lspcon_get_mode +ffffffff8198cbe0 T drm_lspcon_set_mode +ffffffff8198d000 T drm_dp_channel_eq_ok +ffffffff8198d080 T drm_dp_clock_recovery_ok +ffffffff8198d0f0 T drm_dp_get_adjust_request_voltage +ffffffff8198d130 T drm_dp_get_adjust_request_pre_emphasis +ffffffff8198d180 T drm_dp_get_adjust_tx_ffe_preset +ffffffff8198d1c0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff8198d240 T drm_dp_128b132b_lane_symbol_locked +ffffffff8198d2b0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff8198d2e0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff8198d310 T drm_dp_128b132b_link_training_failed +ffffffff8198d340 T drm_dp_read_clock_recovery_delay +ffffffff8198d450 T drm_dp_read_channel_eq_delay +ffffffff8198d550 T drm_dp_128b132b_read_aux_rd_interval +ffffffff8198d600 T drm_dp_link_train_clock_recovery_delay +ffffffff8198d690 t __8b10b_clock_recovery_delay_us +ffffffff8198d710 T drm_dp_link_train_channel_eq_delay +ffffffff8198d780 T drm_dp_phy_name +ffffffff8198d7c0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff8198d7e0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff8198d850 T drm_dp_link_rate_to_bw_code +ffffffff8198d8c0 T drm_dp_bw_code_to_link_rate +ffffffff8198d920 T drm_dp_dpcd_probe +ffffffff8198da60 t drm_dp_dpcd_access +ffffffff8198db90 T drm_dp_dpcd_read +ffffffff8198dcc0 T drm_dp_dpcd_write +ffffffff8198ddd0 T drm_dp_dpcd_read_link_status +ffffffff8198ddf0 T drm_dp_dpcd_read_phy_link_status +ffffffff8198def0 T drm_dp_downstream_is_type +ffffffff8198df40 T drm_dp_downstream_is_tmds +ffffffff8198dfb0 T drm_dp_send_real_edid_checksum +ffffffff8198e200 T drm_dp_read_dpcd_caps +ffffffff8198e390 T drm_dp_read_downstream_info +ffffffff8198e490 T drm_dp_downstream_max_dotclock +ffffffff8198e4e0 T drm_dp_downstream_max_tmds_clock +ffffffff8198e580 T drm_dp_downstream_min_tmds_clock +ffffffff8198e600 T drm_dp_downstream_max_bpc +ffffffff8198e6a0 T drm_dp_downstream_420_passthrough +ffffffff8198e700 T drm_dp_downstream_444_to_420_conversion +ffffffff8198e760 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff8198e7c0 T drm_dp_downstream_mode +ffffffff8198e850 T drm_dp_downstream_id +ffffffff8198e870 T drm_dp_downstream_debug +ffffffff8198e910 T drm_dp_subconnector_type +ffffffff8198e980 T drm_dp_set_subconnector_property +ffffffff8198e9f0 T drm_dp_read_sink_count_cap +ffffffff8198ea40 T drm_dp_read_sink_count +ffffffff8198eaa0 T drm_dp_remote_aux_init +ffffffff8198ead0 t drm_dp_aux_crc_work +ffffffff8198ec40 T drm_dp_aux_init +ffffffff8198ecf0 T drm_dp_aux_register +ffffffff8198ee10 T drm_dp_aux_unregister +ffffffff8198ee40 T drm_dp_psr_setup_time +ffffffff8198ee90 T drm_dp_start_crc +ffffffff8198ef40 T drm_dp_stop_crc +ffffffff8198efd0 T drm_dp_read_desc +ffffffff8198f190 T drm_dp_dsc_sink_max_slice_count +ffffffff8198f220 T drm_dp_dsc_sink_line_buf_depth +ffffffff8198f260 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff8198f2d0 T drm_dp_read_lttpr_common_caps +ffffffff8198f390 T drm_dp_read_lttpr_phy_caps +ffffffff8198f450 T drm_dp_lttpr_count +ffffffff8198f4e0 T drm_dp_lttpr_max_link_rate +ffffffff8198f540 T drm_dp_lttpr_max_lane_count +ffffffff8198f570 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff8198f5a0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff8198f5d0 T drm_dp_get_phy_test_pattern +ffffffff8198f6f0 T drm_dp_set_phy_test_pattern +ffffffff8198f7b0 T drm_dp_vsc_sdp_log +ffffffff8198fad0 T drm_dp_get_pcon_max_frl_bw +ffffffff8198fb20 T drm_dp_pcon_frl_prepare +ffffffff8198fb70 T drm_dp_pcon_is_frl_ready +ffffffff8198fbd0 T drm_dp_pcon_frl_configure_1 +ffffffff8198fcd0 T drm_dp_pcon_frl_configure_2 +ffffffff8198fd30 T drm_dp_pcon_reset_frl_config +ffffffff8198fd80 T drm_dp_pcon_frl_enable +ffffffff8198fe40 T drm_dp_pcon_hdmi_link_active +ffffffff8198fe90 T drm_dp_pcon_hdmi_link_mode +ffffffff8198ff00 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff8198fff0 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff81990020 T drm_dp_pcon_dsc_max_slices +ffffffff819900b0 T drm_dp_pcon_dsc_max_slice_width +ffffffff819900e0 T drm_dp_pcon_dsc_bpp_incr +ffffffff81990120 T drm_dp_pcon_pps_default +ffffffff819901a0 T drm_dp_pcon_pps_override_buf +ffffffff81990240 T drm_dp_pcon_pps_override_param +ffffffff81990310 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff819903b0 T drm_edp_backlight_set_level +ffffffff81990480 T drm_edp_backlight_enable +ffffffff81990690 t drm_edp_backlight_set_enable +ffffffff819907c0 T drm_edp_backlight_disable +ffffffff81990800 T drm_edp_backlight_init +ffffffff81990d60 T drm_panel_dp_aux_backlight +ffffffff81990ef0 t __128b132b_channel_eq_delay_us +ffffffff81990f70 t __8b10b_channel_eq_delay_us +ffffffff81990ff0 t drm_dp_aux_get_crc +ffffffff819910d0 t drm_dp_i2c_xfer +ffffffff81991340 t drm_dp_i2c_functionality +ffffffff81991370 t drm_dp_i2c_do_msg +ffffffff81991740 t lock_bus +ffffffff81991760 t trylock_bus +ffffffff819917b0 t unlock_bus +ffffffff819917d0 t dp_aux_backlight_update_status +ffffffff81992000 T drm_dp_encode_sideband_req +ffffffff81992440 T drm_dp_decode_sideband_req +ffffffff81992970 T drm_dp_dump_sideband_msg_req_body +ffffffff81992d40 T drm_dp_mst_get_port_malloc +ffffffff81992d90 T drm_dp_mst_put_port_malloc +ffffffff81992e80 t kref_put +ffffffff81992ec0 T drm_atomic_get_mst_payload_state +ffffffff81992f10 T drm_dp_mst_dpcd_read +ffffffff819931d0 T drm_dp_mst_dpcd_write +ffffffff81993220 t drm_dp_send_dpcd_write +ffffffff81993460 T drm_dp_mst_connector_late_register +ffffffff819934e0 T drm_dp_mst_connector_early_unregister +ffffffff81993520 T drm_dp_send_power_updown_phy +ffffffff81993760 t drm_dp_mst_topology_put_port +ffffffff81993880 t drm_dp_mst_wait_tx_reply +ffffffff81993c20 T drm_dp_send_query_stream_enc_status +ffffffff81993ee0 T drm_dp_add_payload_part1 +ffffffff81994090 T drm_dp_remove_payload +ffffffff81994230 T drm_dp_add_payload_part2 +ffffffff819943e0 T drm_dp_get_vc_payload_bw +ffffffff81994480 T drm_dp_read_mst_cap +ffffffff819944e0 T drm_dp_mst_topology_mgr_set_mst +ffffffff81994790 t drm_dp_dpcd_write_payload +ffffffff81994930 t drm_dp_mst_topology_put_mstb +ffffffff81994a30 T drm_dp_mst_topology_mgr_suspend +ffffffff81994af0 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff81994b60 T drm_dp_mst_topology_mgr_resume +ffffffff81994da0 T drm_dp_mst_hpd_irq_handle_event +ffffffff81995d10 T drm_dp_mst_hpd_irq_send_new_request +ffffffff81995d90 T drm_dp_mst_detect_port +ffffffff81995ef0 T drm_dp_mst_edid_read +ffffffff81995ff0 T drm_dp_mst_get_edid +ffffffff81996050 T drm_dp_atomic_find_time_slots +ffffffff81996300 T drm_atomic_get_mst_topology_state +ffffffff81996310 T drm_dp_atomic_release_time_slots +ffffffff81996520 T drm_dp_mst_atomic_setup_commit +ffffffff819966b0 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff81996820 T drm_dp_mst_root_conn_atomic_check +ffffffff81996940 T drm_dp_mst_update_slots +ffffffff819969a0 T drm_dp_check_act_status +ffffffff81996b30 T drm_dp_calc_pbn_mode +ffffffff81996b90 T drm_dp_mst_dump_topology +ffffffff81996e10 t drm_dp_mst_dump_mstb +ffffffff81996e80 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff81996fb0 T drm_dp_mst_dsc_aux_for_port +ffffffff819971e0 T drm_dp_mst_atomic_enable_dsc +ffffffff81997360 T drm_dp_mst_atomic_check +ffffffff81997650 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff819978d0 t drm_dp_mst_duplicate_state +ffffffff81997aa0 t drm_dp_mst_destroy_state +ffffffff81997b60 T drm_atomic_get_old_mst_topology_state +ffffffff81997b70 T drm_atomic_get_new_mst_topology_state +ffffffff81997b80 T drm_dp_mst_topology_mgr_init +ffffffff81997df0 t drm_dp_mst_link_probe_work +ffffffff81998080 t drm_dp_tx_work +ffffffff819980d0 t drm_dp_delayed_destroy_work +ffffffff81998580 t drm_dp_mst_up_req_work +ffffffff81998aa0 T drm_dp_mst_topology_mgr_destroy +ffffffff81998b30 t drm_dp_mst_is_virtual_dpcd +ffffffff81998c10 t drm_dp_free_mst_branch_device +ffffffff81998c50 t drm_dp_mst_topology_get_port_validated_locked +ffffffff81998cd0 t drm_dp_mst_dump_sideband_msg_tx +ffffffff81998ee0 t process_single_down_tx_qlock +ffffffff81999050 t process_single_tx_qlock +ffffffff81999520 t drm_dp_msg_data_crc4 +ffffffff81999650 t drm_dp_payload_send_msg +ffffffff81999ab0 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff81999b30 t drm_dp_get_one_sb_msg +ffffffff8199a270 t drm_dp_get_mst_branch_device +ffffffff8199a3d0 t drm_dp_check_and_send_link_address +ffffffff8199a4a0 t drm_dp_send_link_address +ffffffff8199b160 t drm_dp_send_enum_path_resources +ffffffff8199b3c0 t drm_dp_port_set_pdt +ffffffff8199b690 t drm_dp_mst_port_add_connector +ffffffff8199b870 t drm_dp_mst_i2c_xfer +ffffffff8199bf90 t drm_dp_mst_i2c_functionality +ffffffff8199bfc0 t get_mst_branch_device_by_guid_helper +ffffffff8199d000 T drm_dsc_dp_pps_header_init +ffffffff8199d030 T drm_dsc_dp_rc_buffer_size +ffffffff8199d090 T drm_dsc_pps_payload_pack +ffffffff8199d340 T drm_dsc_set_const_params +ffffffff8199d390 T drm_dsc_set_rc_buf_thresh +ffffffff8199d400 T drm_dsc_setup_rc_params +ffffffff8199d5c0 T drm_dsc_compute_rc_parameters +ffffffff8199d8c0 T drm_dsc_get_bpp_int +ffffffff8199d940 T drm_dsc_initial_scale_value +ffffffff8199d980 T drm_dsc_flatness_det_thresh +ffffffff8199e000 T drm_connector_attach_content_protection_property +ffffffff8199e030 T drm_hdcp_check_ksvs_revoked +ffffffff8199e080 T drm_hdcp_update_content_protection +ffffffff8199f000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff8199f120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff8199f180 T drm_hdmi_avi_infoframe_bars +ffffffff8199f1d0 T drm_hdmi_avi_infoframe_content_type +ffffffff819a0000 T drm_scdc_read +ffffffff819a0090 T drm_scdc_write +ffffffff819a0170 T drm_scdc_get_scrambling_status +ffffffff819a0250 T drm_scdc_set_scrambling +ffffffff819a03e0 T drm_scdc_set_high_tmds_clock_ratio +ffffffff819a1000 T drm_gem_ttm_mmap +ffffffff819a1070 T drm_gem_ttm_vmap +ffffffff819a1080 T drm_gem_ttm_vunmap +ffffffff819a2000 T ttm_agp_bind +ffffffff819a2050 T ttm_agp_unbind +ffffffff819a2070 T ttm_agp_is_bound +ffffffff819a20c0 T ttm_agp_destroy +ffffffff819a20e0 T ttm_agp_tt_create +ffffffff819a3000 T ttm_bo_move_to_lru_tail +ffffffff819a3040 T ttm_bo_set_bulk_move +ffffffff819a3100 T ttm_bo_put +ffffffff819a3610 T ttm_bo_eviction_valuable +ffffffff819a3660 T ttm_mem_evict_first +ffffffff819a3d60 t ttm_bo_evict_swapout_allowable +ffffffff819a3f60 t dma_resv_unlock +ffffffff819a4000 t ttm_bo_cleanup_refs +ffffffff819a4350 t ttm_bo_unreserve +ffffffff819a4430 T ttm_bo_pin +ffffffff819a44d0 T ttm_bo_unpin +ffffffff819a45e0 T ttm_bo_mem_space +ffffffff819a4820 t ttm_bo_add_move_fence +ffffffff819a48e0 T ttm_bo_validate +ffffffff819a4a70 T ttm_bo_init_reserved +ffffffff819a4c60 T ttm_bo_init_validate +ffffffff819a4d00 T ttm_bo_unmap_virtual +ffffffff819a4e30 T ttm_bo_wait_ctx +ffffffff819a4ec0 T ttm_bo_swapout +ffffffff819a5180 t ttm_bo_handle_move_mem +ffffffff819a5300 T ttm_bo_tt_destroy +ffffffff819a5370 t ttm_bo_delayed_delete +ffffffff819a6000 T ttm_mem_io_reserve +ffffffff819a6060 T ttm_mem_io_free +ffffffff819a60d0 T ttm_move_memcpy +ffffffff819a6290 T ttm_bo_move_memcpy +ffffffff819a64f0 T ttm_bo_move_sync_cleanup +ffffffff819a6600 T ttm_io_prot +ffffffff819a6640 T ttm_bo_kmap +ffffffff819a6900 T ttm_bo_kunmap +ffffffff819a6a40 T ttm_bo_vmap +ffffffff819a6c30 T ttm_bo_vunmap +ffffffff819a6d20 T ttm_bo_move_accel_cleanup +ffffffff819a7000 T ttm_bo_pipeline_gutting +ffffffff819a7200 t ttm_buffer_object_transfer +ffffffff819a7430 t ttm_transfered_destroy +ffffffff819a8000 T ttm_bo_vm_reserve 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ttm_pool_mgr_init +ffffffff819ad940 t ttm_pool_shrinker_count +ffffffff819ad990 t ttm_pool_shrinker_scan +ffffffff819ad9e0 T ttm_pool_mgr_fini +ffffffff819ae000 T ttm_range_man_init_nocheck +ffffffff819ae180 T ttm_range_man_fini_nocheck +ffffffff819ae310 t ttm_range_man_alloc +ffffffff819ae460 t ttm_range_man_free +ffffffff819ae4c0 t ttm_range_man_intersects +ffffffff819ae520 t ttm_range_man_compatible +ffffffff819ae580 t ttm_range_man_debug +ffffffff819af000 T ttm_lru_bulk_move_init +ffffffff819af020 T ttm_lru_bulk_move_tail +ffffffff819af1e0 T ttm_resource_add_bulk_move +ffffffff819af2b0 T ttm_resource_del_bulk_move +ffffffff819af3f0 T ttm_resource_move_to_lru_tail +ffffffff819af560 T ttm_resource_init +ffffffff819af650 T ttm_resource_fini +ffffffff819af6c0 T ttm_resource_alloc +ffffffff819af810 T ttm_resource_free +ffffffff819af9d0 T ttm_resource_intersects +ffffffff819afa30 T ttm_resource_compatible +ffffffff819afa90 T ttm_resource_compat +ffffffff819afc20 T ttm_resource_set_bo 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drm_sched_entity_wakeup +ffffffff819b4000 T drm_sched_fence_slab_init +ffffffff819b4060 T drm_sched_fence_slab_fini +ffffffff819b4080 T drm_sched_fence_scheduled +ffffffff819b40e0 T drm_sched_fence_finished +ffffffff819b4100 T drm_sched_fence_free +ffffffff819b41a0 T to_drm_sched_fence +ffffffff819b4200 T drm_sched_fence_alloc +ffffffff819b4280 T drm_sched_fence_init +ffffffff819b4300 t drm_sched_fence_get_driver_name +ffffffff819b4330 t drm_sched_fence_get_timeline_name +ffffffff819b4390 t drm_sched_fence_release_scheduled +ffffffff819b4480 t drm_sched_fence_release_finished +ffffffff819b44c0 t drm_sched_fence_set_deadline_finished +ffffffff819b5000 T drm_sched_rq_update_fifo +ffffffff819b50e0 T drm_sched_rq_add_entity +ffffffff819b5170 T drm_sched_rq_remove_entity +ffffffff819b5250 T drm_sched_fault +ffffffff819b52a0 T drm_sched_suspend_timeout +ffffffff819b5320 T drm_sched_resume_timeout +ffffffff819b53c0 T drm_sched_stop +ffffffff819b5590 T drm_sched_start +ffffffff819b56c0 t drm_sched_job_done_cb +ffffffff819b56e0 t drm_sched_job_done +ffffffff819b57b0 T drm_sched_resubmit_jobs +ffffffff819b5900 T drm_sched_job_init +ffffffff819b5990 T drm_sched_job_arm +ffffffff819b5a20 T drm_sched_job_add_dependency +ffffffff819b5b90 T drm_sched_job_add_syncobj_dependency +ffffffff819b5bf0 T drm_sched_job_add_resv_dependencies +ffffffff819b5ca0 T drm_sched_job_add_implicit_dependencies +ffffffff819b5d60 T drm_sched_job_cleanup +ffffffff819b5e10 T drm_sched_wakeup_if_can_queue +ffffffff819b5ed0 T drm_sched_pick_best +ffffffff819b5f80 T drm_sched_init +ffffffff819b6230 t drm_sched_job_timedout +ffffffff819b6380 t drm_sched_main +ffffffff819b67b0 T drm_sched_fini +ffffffff819b6990 T drm_sched_increase_karma +ffffffff819b6ab0 t __delayed_work_tick +ffffffff819b6ad0 t drm_sched_get_cleanup_job +ffffffff819b6c10 t drm_sched_select_entity +ffffffff819b7000 t ch7017_init +ffffffff819b7140 t ch7017_dpms +ffffffff819b7380 t ch7017_mode_valid +ffffffff819b73c0 t ch7017_mode_set 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sil164_init +ffffffff819bd200 t sil164_dpms +ffffffff819bd330 t sil164_mode_valid +ffffffff819bd360 t sil164_mode_set +ffffffff819bd4f0 t sil164_detect +ffffffff819bd5d0 t sil164_get_hw_state +ffffffff819bd6a0 t sil164_destroy +ffffffff819bd6f0 t sil164_dump_regs +ffffffff819be000 t tfp410_init +ffffffff819be100 t tfp410_dpms +ffffffff819be230 t tfp410_mode_valid +ffffffff819be260 t tfp410_mode_set +ffffffff819be290 t tfp410_detect +ffffffff819be370 t tfp410_get_hw_state +ffffffff819be440 t tfp410_destroy +ffffffff819be490 t tfp410_dump_regs +ffffffff819beee0 t tfp410_getid +ffffffff819c0000 T vlv_get_dpll +ffffffff819c0040 T g4x_dp_set_clock +ffffffff819c0110 T g4x_dp_port_enabled +ffffffff819c0310 T vlv_active_pipe +ffffffff819c0370 T g4x_dp_init +ffffffff819c0810 t intel_dp_hotplug +ffffffff819c0960 t intel_dp_get_hw_state +ffffffff819c0a10 t intel_dp_get_config +ffffffff819c0cb0 t chv_dp_pre_pll_enable +ffffffff819c0cf0 t chv_pre_enable_dp +ffffffff819c0d30 t vlv_enable_dp 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ibx_digital_port_connected +ffffffff819c1cc0 t intel_dp_encoder_reset +ffffffff819c1dc0 t intel_dp_encoder_destroy +ffffffff819c1e20 t intel_dp_prepare +ffffffff819c20b0 t intel_enable_dp +ffffffff819c22f0 t intel_dp_link_down +ffffffff819c2630 t assert_dp_port +ffffffff819c3000 T g4x_hdmi_connector_atomic_check +ffffffff819c3150 T g4x_hdmi_init +ffffffff819c34e0 t intel_hdmi_hotplug +ffffffff819c3530 t g4x_hdmi_compute_config +ffffffff819c3660 t pch_disable_hdmi +ffffffff819c3680 t pch_post_disable_hdmi +ffffffff819c36a0 t g4x_disable_hdmi +ffffffff819c36f0 t intel_hdmi_get_hw_state +ffffffff819c37a0 t intel_hdmi_get_config +ffffffff819c3940 t chv_hdmi_pre_pll_enable +ffffffff819c3980 t chv_hdmi_pre_enable +ffffffff819c3ad0 t vlv_enable_hdmi +ffffffff819c3b50 t chv_hdmi_post_disable +ffffffff819c3bb0 t chv_hdmi_post_pll_disable +ffffffff819c3bd0 t vlv_hdmi_pre_pll_enable +ffffffff819c3c10 t vlv_hdmi_pre_enable +ffffffff819c3d50 t vlv_hdmi_post_disable +ffffffff819c3d70 t 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intel_atomic_state_clear +ffffffff819d76e0 T intel_atomic_get_crtc_state +ffffffff819d8000 T intel_plane_alloc +ffffffff819d80c0 T intel_plane_free +ffffffff819d8100 T intel_plane_destroy_state +ffffffff819d81d0 T intel_plane_duplicate_state +ffffffff819d8280 T intel_adjusted_rate +ffffffff819d8300 T intel_plane_pixel_rate +ffffffff819d8390 T intel_plane_data_rate +ffffffff819d8450 T intel_plane_calc_min_cdclk +ffffffff819d85b0 T intel_plane_copy_uapi_to_hw_state +ffffffff819d8720 T intel_plane_copy_hw_state +ffffffff819d8810 T intel_plane_set_invisible +ffffffff819d8910 T intel_plane_atomic_check_with_state +ffffffff819d9580 T intel_plane_atomic_check +ffffffff819d96e0 T intel_plane_update_noarm +ffffffff819d9720 T intel_plane_update_arm +ffffffff819d9760 T intel_plane_disable_arm +ffffffff819d9780 T intel_crtc_planes_update_noarm +ffffffff819d98a0 T intel_crtc_planes_update_arm +ffffffff819d9c90 T intel_atomic_plane_check_clipping +ffffffff819d9ef0 T intel_plane_check_src_coordinates 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intel_bios_encoder_supports_dvi +ffffffff819e2360 T intel_bios_encoder_supports_hdmi +ffffffff819e23a0 T intel_bios_encoder_supports_dp +ffffffff819e23d0 T intel_bios_encoder_supports_edp +ffffffff819e2410 T intel_bios_encoder_supports_dsi +ffffffff819e2440 T intel_bios_encoder_is_lspcon +ffffffff819e2490 T intel_bios_hdmi_level_shift +ffffffff819e24f0 T intel_bios_hdmi_max_tmds_clock +ffffffff819e2580 T intel_bios_is_valid_vbt +ffffffff819e2670 T intel_bios_init +ffffffff819e4500 T intel_bios_init_panel_early +ffffffff819e4520 t intel_bios_init_panel +ffffffff819e65a0 T intel_bios_init_panel_late +ffffffff819e65c0 T intel_bios_driver_remove +ffffffff819e66b0 T intel_bios_fini_panel +ffffffff819e6790 T intel_bios_is_tv_present +ffffffff819e6810 T intel_bios_is_lvds_present +ffffffff819e68c0 T intel_bios_is_port_present +ffffffff819e6990 T intel_bios_encoder_supports_dp_dual_mode +ffffffff819e6a00 T intel_bios_is_dsi_present +ffffffff819e6ad0 T intel_bios_get_dsc_params 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intel_cdclk_init +ffffffff819ec7f0 T intel_modeset_calc_cdclk +ffffffff819ece20 t intel_cdclk_can_crawl +ffffffff819eceb0 T intel_update_max_cdclk +ffffffff819ed210 T intel_update_cdclk +ffffffff819ed2b0 T intel_read_rawclk +ffffffff819ed430 t i9xx_hrawclk +ffffffff819ed4e0 T intel_cdclk_debugfs_register +ffffffff819ed510 T intel_init_cdclk_hooks +ffffffff819ed930 t bxt_set_cdclk +ffffffff819edfa0 t _bxt_set_cdclk +ffffffff819ee750 t skl_set_cdclk +ffffffff819eed50 t intel_cdclk_duplicate_state +ffffffff819eedd0 t intel_cdclk_destroy_state +ffffffff819eedf0 t bxt_get_cdclk +ffffffff819ef020 t bxt_modeset_calc_cdclk +ffffffff819ef470 t tgl_calc_voltage_level +ffffffff819ef4c0 t intel_compute_min_cdclk +ffffffff819ef6c0 t rplu_calc_voltage_level +ffffffff819ef710 t ehl_calc_voltage_level +ffffffff819ef760 t icl_calc_voltage_level +ffffffff819ef7b0 t bxt_calc_voltage_level +ffffffff819ef800 t skl_get_cdclk +ffffffff819efa10 t skl_modeset_calc_cdclk +ffffffff819efc20 t bdw_get_cdclk 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intel_color_post_update +ffffffff819f2100 T intel_color_prepare_commit +ffffffff819f2130 T intel_color_cleanup_commit +ffffffff819f2180 T intel_color_check +ffffffff819f21a0 T intel_color_get_config +ffffffff819f2220 T intel_color_lut_equal +ffffffff819f2280 T intel_color_assert_luts +ffffffff819f2570 T intel_color_crtc_init +ffffffff819f25e0 T intel_color_init +ffffffff819f2710 T intel_color_init_hooks +ffffffff819f2840 t chv_color_check +ffffffff819f2d50 t i9xx_color_commit_arm +ffffffff819f2d60 t chv_load_luts +ffffffff819f3160 t chv_read_luts +ffffffff819f33e0 t chv_lut_equal +ffffffff819f3710 t chv_read_csc +ffffffff819f3830 t intel_color_add_affected_planes +ffffffff819f39a0 t _check_luts +ffffffff819f3b00 t i965_load_luts +ffffffff819f3e70 t i965_read_luts +ffffffff819f4240 t vlv_color_check +ffffffff819f46e0 t vlv_load_luts +ffffffff819f4890 t i965_lut_equal +ffffffff819f4a70 t vlv_read_csc +ffffffff819f4c50 t i9xx_color_check +ffffffff819f4ed0 t i9xx_load_luts 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ilk_csc_limited_range +ffffffff819f9290 t ilk_assign_csc +ffffffff819f9590 t ivb_color_check +ffffffff819f9be0 t bdw_load_luts +ffffffff819f9dc0 t bdw_read_luts +ffffffff819f9fb0 t ivb_lut_equal +ffffffff819fa370 t ilk_assign_luts +ffffffff819fa590 t ilk_color_commit_noarm +ffffffff819fa5e0 t hsw_color_commit_arm +ffffffff819fa690 t ilk_read_csc +ffffffff819fa6e0 t ivb_load_luts +ffffffff819fa8c0 t ivb_read_luts +ffffffff819fad70 t ivb_load_lut_10 +ffffffff819faf70 t ilk_color_commit_arm +ffffffff819faff0 t ilk_color_check +ffffffff819fb250 t ilk_load_luts +ffffffff819fb4e0 t ilk_read_luts +ffffffff819fb740 t ilk_lut_equal +ffffffff819fc000 T intel_combo_phy_power_up_lanes +ffffffff819fc120 T intel_combo_phy_init +ffffffff819fc5c0 T intel_combo_phy_uninit +ffffffff819fc790 t icl_combo_phy_verify_state +ffffffff819fd000 T intel_connector_init +ffffffff819fd070 T intel_connector_alloc +ffffffff819fd100 T intel_connector_free +ffffffff819fd140 T intel_connector_destroy +ffffffff819fd1a0 T intel_connector_register +ffffffff819fd1b0 T intel_connector_unregister +ffffffff819fd1c0 T intel_connector_attach_encoder +ffffffff819fd1e0 T intel_connector_get_hw_state +ffffffff819fd230 T intel_connector_get_pipe +ffffffff819fd2f0 T intel_connector_update_modes +ffffffff819fd320 T intel_ddc_get_modes +ffffffff819fd390 T intel_attach_force_audio_property +ffffffff819fd430 T intel_attach_broadcast_rgb_property +ffffffff819fd4d0 T intel_attach_aspect_ratio_property +ffffffff819fd530 T intel_attach_hdmi_colorspace_property +ffffffff819fd580 T intel_attach_dp_colorspace_property +ffffffff819fd5d0 T intel_attach_scaling_mode_property +ffffffff819fe000 T intel_crt_port_enabled +ffffffff819fe080 T intel_crt_reset +ffffffff819fe160 T intel_crt_init +ffffffff819fe590 t hsw_crt_get_config +ffffffff819fe640 t hsw_crt_compute_config +ffffffff819fe730 t hsw_pre_pll_enable_crt +ffffffff819fe7a0 t hsw_pre_enable_crt +ffffffff819fe840 t hsw_enable_crt +ffffffff819fe9e0 t hsw_disable_crt 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i9xx_cursor_update_arm +ffffffff81a05b20 t i9xx_cursor_disable_arm +ffffffff81a05b40 t i9xx_cursor_get_hw_state +ffffffff81a05c30 t i9xx_check_cursor +ffffffff81a05eb0 t intel_check_cursor +ffffffff81a060c0 t intel_legacy_cursor_update +ffffffff81a06480 t intel_cursor_format_mod_supported +ffffffff81a07000 T intel_is_c10phy +ffffffff81a07040 T intel_cx0_phy_set_signal_levels +ffffffff81a07630 t intel_cx0_rmw +ffffffff81a07720 T intel_c10pll_readout_hw_state +ffffffff81a078b0 T intel_c10pll_dump_hw_state +ffffffff81a07b30 T intel_cx0_phy_check_hdmi_link_rate +ffffffff81a07ca0 T intel_cx0pll_calc_state +ffffffff81a080b0 T intel_c20pll_readout_hw_state +ffffffff81a085d0 t intel_c20_sram_read +ffffffff81a086e0 T intel_c20pll_dump_hw_state +ffffffff81a08a90 T intel_c10pll_calc_port_clock +ffffffff81a08b70 T intel_c20pll_calc_port_clock +ffffffff81a08c70 T intel_mtl_tbt_calc_port_clock +ffffffff81a08dd0 T intel_mtl_pll_enable +ffffffff81a0a5d0 T intel_mtl_pll_disable +ffffffff81a0aa40 T intel_mtl_port_pll_type +ffffffff81a0aad0 T intel_c10pll_state_verify +ffffffff81a0adc0 t __intel_cx0_read +ffffffff81a0b150 t __intel_cx0_write +ffffffff81a0b4a0 t intel_cx0_bus_reset +ffffffff81a0b5d0 t intel_cx0_wait_for_ack +ffffffff81a0b750 t intel_cx0_powerdown_change_sequence +ffffffff81a0b9b0 t intel_c20_sram_write +ffffffff81a0c000 T hsw_prepare_dp_ddi_buffers +ffffffff81a0c1a0 T intel_wait_ddi_buf_idle +ffffffff81a0c3a0 T intel_ddi_set_dp_msa +ffffffff81a0c570 T intel_ddi_enable_transcoder_func +ffffffff81a0c650 t intel_ddi_transcoder_func_reg_val_get +ffffffff81a0c900 T intel_ddi_disable_transcoder_func +ffffffff81a0caf0 T intel_ddi_toggle_hdcp_bits +ffffffff81a0cc10 T intel_ddi_connector_get_hw_state +ffffffff81a0cd60 T intel_ddi_get_hw_state +ffffffff81a0cdd0 t intel_ddi_get_encoder_pipes +ffffffff81a0d220 T intel_ddi_enable_transcoder_clock +ffffffff81a0d2e0 T intel_ddi_disable_transcoder_clock +ffffffff81a0d350 T intel_ddi_level +ffffffff81a0d530 T icl_ddi_combo_get_pll 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intel_ddi_tc_encoder_suspend_complete +ffffffff81a15920 t intel_ddi_tc_encoder_shutdown_complete +ffffffff81a15960 t lpt_digital_port_connected +ffffffff81a159d0 t bdw_digital_port_connected +ffffffff81a15a40 t hsw_digital_port_connected +ffffffff81a15ab0 t intel_ddi_init_dp_connector +ffffffff81a15b90 t intel_ddi_init_hdmi_connector +ffffffff81a15c00 t intel_ddi_encoder_reset +ffffffff81a15ce0 t intel_ddi_encoder_destroy +ffffffff81a15d90 t intel_ddi_encoder_late_register +ffffffff81a15df0 t mtl_ddi_enable_d2d +ffffffff81a15fb0 t intel_wait_ddi_buf_active +ffffffff81a162c0 t intel_ddi_main_link_aux_domain +ffffffff81a163b0 t icl_program_mg_dp_mode +ffffffff81a16680 t intel_ddi_init_dp_buf_reg +ffffffff81a16880 t intel_disable_ddi_buf +ffffffff81a16a30 t mtl_disable_ddi_buf +ffffffff81a16e50 t intel_ddi_disable_fec_state +ffffffff81a16fa0 t mtl_ddi_prepare_link_retrain +ffffffff81a172e0 t intel_ddi_prepare_link_retrain +ffffffff81a177e0 t intel_ddi_set_link_train +ffffffff81a17930 t intel_ddi_set_idle_link_train +ffffffff81a17b00 t intel_ddi_dp_voltage_max +ffffffff81a17bc0 t intel_ddi_dp_preemph_max +ffffffff81a18000 T is_hobl_buf_trans +ffffffff81a18040 T intel_ddi_buf_trans_init +ffffffff81a18300 t mtl_get_cx0_buf_trans +ffffffff81a183e0 t dg2_get_snps_buf_trans +ffffffff81a18450 t adlp_get_combo_buf_trans +ffffffff81a18570 t adlp_get_dkl_buf_trans +ffffffff81a185d0 t adls_get_combo_buf_trans +ffffffff81a186f0 t rkl_get_combo_buf_trans +ffffffff81a18810 t dg1_get_combo_buf_trans +ffffffff81a18930 t tgl_get_combo_buf_trans +ffffffff81a18a70 t tgl_get_dkl_buf_trans +ffffffff81a18ad0 t jsl_get_combo_buf_trans +ffffffff81a18b70 t ehl_get_combo_buf_trans +ffffffff81a18c10 t icl_get_combo_buf_trans +ffffffff81a18cc0 t icl_get_mg_buf_trans +ffffffff81a18d20 t bxt_get_buf_trans +ffffffff81a18da0 t kbl_y_get_buf_trans +ffffffff81a18e40 t kbl_u_get_buf_trans +ffffffff81a18ee0 t kbl_get_buf_trans +ffffffff81a18f80 t skl_y_get_buf_trans +ffffffff81a19020 t skl_u_get_buf_trans +ffffffff81a190c0 t skl_get_buf_trans +ffffffff81a19160 t bdw_get_buf_trans +ffffffff81a191f0 t hsw_get_buf_trans +ffffffff81a1a000 T vlv_get_hpll_vco +ffffffff81a1a050 T vlv_get_cck_clock +ffffffff81a1a100 T vlv_get_cck_clock_hpll +ffffffff81a1a200 T intel_update_czclk +ffffffff81a1a280 T is_trans_port_sync_master +ffffffff81a1a2b0 T is_trans_port_sync_mode +ffffffff81a1a2f0 T intel_crtc_bigjoiner_slave_pipes +ffffffff81a1a350 T intel_crtc_is_bigjoiner_slave +ffffffff81a1a3b0 T intel_crtc_is_bigjoiner_master +ffffffff81a1a410 T intel_master_crtc +ffffffff81a1a4a0 T assert_transcoder +ffffffff81a1a660 t transcoder_name +ffffffff81a1a6a0 T vlv_wait_port_ready +ffffffff81a1a7f0 T intel_enable_transcoder +ffffffff81a1aa50 t assert_planes_disabled +ffffffff81a1ab80 T intel_disable_transcoder +ffffffff81a1ada0 T intel_rotation_info_size +ffffffff81a1adf0 T intel_remapped_info_size +ffffffff81a1af20 T intel_plane_uses_fence +ffffffff81a1af70 T intel_fb_xy_to_linear +ffffffff81a1afc0 T intel_add_fb_offsets +ffffffff81a1b010 T intel_plane_fb_max_stride +ffffffff81a1b090 T intel_set_plane_visible +ffffffff81a1b0e0 T intel_plane_fixup_bitmasks +ffffffff81a1b190 T intel_plane_disable_noatomic +ffffffff81a1b380 T intel_plane_fence_y_offset +ffffffff81a1b3e0 T intel_has_pending_fb_unpin +ffffffff81a1b4d0 T intel_get_crtc_new_encoder +ffffffff81a1b660 T ilk_pfit_disable +ffffffff81a1b720 T intel_phy_is_combo +ffffffff81a1b790 T intel_phy_is_tc +ffffffff81a1b800 T intel_phy_is_snps +ffffffff81a1b850 T intel_port_to_phy +ffffffff81a1b900 T intel_port_to_tc +ffffffff81a1ba10 T intel_aux_power_domain +ffffffff81a1ba50 T intel_modeset_get_crtc_power_domains +ffffffff81a1bc80 T intel_modeset_put_crtc_power_domains +ffffffff81a1bcb0 T intel_encoder_destroy +ffffffff81a1bce0 T intel_encoder_get_config +ffffffff81a1bd10 t intel_crtc_readout_derived_state +ffffffff81a1c150 T intel_link_compute_m_n +ffffffff81a1c280 T intel_panel_sanitize_ssc +ffffffff81a1c360 T intel_zero_m_n +ffffffff81a1c3a0 T intel_set_m_n +ffffffff81a1c460 T intel_cpu_transcoder_has_m2_n2 +ffffffff81a1c4c0 T intel_cpu_transcoder_set_m1_n1 +ffffffff81a1c670 T intel_cpu_transcoder_set_m2_n2 +ffffffff81a1c7d0 T i9xx_set_pipeconf +ffffffff81a1c980 T ilk_set_pipeconf +ffffffff81a1cb50 T bdw_get_pipe_misc_bpp +ffffffff81a1cc20 T ilk_get_lanes_required +ffffffff81a1cc80 T intel_get_m_n +ffffffff81a1cd90 T intel_cpu_transcoder_get_m1_n1 +ffffffff81a1cf20 T intel_cpu_transcoder_get_m2_n2 +ffffffff81a1d080 T intel_crtc_get_pipe_config +ffffffff81a1d0f0 T i9xx_crtc_clock_get +ffffffff81a1d380 T intel_dotclock_calculate +ffffffff81a1d3e0 T intel_crtc_dotclock +ffffffff81a1d4b0 T intel_encoder_current_mode +ffffffff81a1d660 T intel_fuzzy_clock_check +ffffffff81a1d6b0 T intel_pipe_config_compare +ffffffff81a20a00 t pipe_config_mismatch +ffffffff81a20af0 t pipe_config_infoframe_mismatch +ffffffff81a20c90 T intel_modeset_all_pipes +ffffffff81a20ea0 T intel_atomic_add_affected_planes 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i9xx_get_pipe_config +ffffffff81a2c2c0 t valleyview_crtc_enable +ffffffff81a2c720 t i9xx_crtc_disable +ffffffff81a2cac0 t i9xx_pfit_enable +ffffffff81a2cc30 t i9xx_crtc_enable +ffffffff81a2d000 T intel_display_device_probe +ffffffff81a2d0f0 T intel_display_device_info_runtime_init +ffffffff81a2d750 T intel_display_device_info_print +ffffffff81a2e000 T intel_display_driver_probe_defer +ffffffff81a2e030 T intel_display_driver_init_hw +ffffffff81a2e0f0 T intel_display_driver_early_probe +ffffffff81a2e170 T intel_display_driver_probe_noirq +ffffffff81a2e450 T intel_display_driver_probe_nogem +ffffffff81a2e760 T intel_display_driver_probe +ffffffff81a2e800 T intel_display_driver_register +ffffffff81a2e860 T intel_display_driver_remove +ffffffff81a2e910 T intel_display_driver_remove_noirq +ffffffff81a2e9c0 T intel_display_driver_remove_nogem +ffffffff81a2ea00 T intel_display_driver_unregister +ffffffff81a2ea80 T intel_display_driver_suspend +ffffffff81a2eb30 T __intel_display_driver_resume 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gen8_irq_power_well_pre_disable +ffffffff81a33600 T valleyview_enable_display_irqs +ffffffff81a33720 T valleyview_disable_display_irqs +ffffffff81a33830 T ilk_de_irq_postinstall +ffffffff81a33940 T gen8_de_irq_postinstall +ffffffff81a33db0 T gen11_de_irq_postinstall +ffffffff81a33e20 T dg1_de_irq_postinstall +ffffffff81a33e90 T intel_display_irq_init +ffffffff81a34000 T intel_display_power_domain_str +ffffffff81a34060 T __intel_display_power_is_enabled +ffffffff81a34120 T intel_display_power_is_enabled +ffffffff81a34240 T intel_display_power_set_target_dc_state +ffffffff81a34360 T intel_display_power_get +ffffffff81a343e0 t __intel_display_power_get_domain +ffffffff81a345d0 T intel_display_power_get_if_enabled +ffffffff81a34700 T __intel_display_power_put_async +ffffffff81a348f0 t __intel_display_power_put_domain +ffffffff81a34a60 T intel_display_power_flush_work +ffffffff81a34b80 t release_async_put_domains +ffffffff81a34c70 T intel_display_power_put_unchecked +ffffffff81a34cd0 T intel_display_power_get_in_set +ffffffff81a34db0 T intel_display_power_get_in_set_if_enabled +ffffffff81a34e60 T intel_display_power_put_mask_in_set +ffffffff81a34f30 T intel_power_domains_init +ffffffff81a35180 t intel_display_power_put_async_work +ffffffff81a353f0 T intel_power_domains_cleanup +ffffffff81a35410 T gen9_dbuf_slices_update +ffffffff81a35620 T intel_power_domains_init_hw +ffffffff81a35b20 t icl_display_core_init +ffffffff81a36320 t bxt_display_core_init +ffffffff81a36470 t vlv_cmnlane_wa +ffffffff81a36540 t assert_ved_power_gated +ffffffff81a365f0 t hsw_assert_cdclk +ffffffff81a36700 t intel_pch_reset_handshake +ffffffff81a367b0 T intel_power_domains_driver_remove +ffffffff81a368a0 T intel_power_domains_sanitize_state +ffffffff81a36990 T intel_power_domains_enable +ffffffff81a369f0 T intel_power_domains_disable +ffffffff81a36aa0 T intel_power_domains_suspend +ffffffff81a36c50 t icl_display_core_uninit +ffffffff81a36d60 t bxt_display_core_uninit +ffffffff81a36e20 T intel_power_domains_resume +ffffffff81a36ef0 T intel_display_power_suspend_late +ffffffff81a36fd0 t hsw_enable_pc8 +ffffffff81a37c80 T intel_display_power_resume_early +ffffffff81a37d70 t hsw_disable_pc8 +ffffffff81a38190 T intel_display_power_suspend +ffffffff81a38210 T intel_display_power_resume +ffffffff81a382f0 T intel_display_power_debug +ffffffff81a383b0 T intel_display_power_ddi_io_domain +ffffffff81a384a0 T intel_display_power_ddi_lanes_domain +ffffffff81a38590 T intel_display_power_aux_io_domain +ffffffff81a386a0 T intel_display_power_legacy_aux_domain +ffffffff81a387b0 T intel_display_power_tbt_aux_domain +ffffffff81a388c0 t __delayed_work_tick +ffffffff81a39000 T intel_display_power_map_init +ffffffff81a39180 t __set_power_wells +ffffffff81a39560 T intel_display_power_map_cleanup +ffffffff81a3a000 T lookup_power_well +ffffffff81a3a0c0 T intel_power_well_enable +ffffffff81a3a150 T intel_power_well_name +ffffffff81a3a190 T intel_power_well_disable +ffffffff81a3a200 T intel_power_well_sync_hw +ffffffff81a3a270 T intel_power_well_get +ffffffff81a3a310 T intel_power_well_put +ffffffff81a3a410 T intel_power_well_is_enabled +ffffffff81a3a430 T intel_power_well_is_enabled_cached +ffffffff81a3a460 T intel_display_power_well_is_enabled +ffffffff81a3a510 T intel_power_well_is_always_on +ffffffff81a3a550 T intel_power_well_domains +ffffffff81a3a580 T intel_power_well_refcount +ffffffff81a3a5b0 T gen9_sanitize_dc_state +ffffffff81a3a680 T gen9_set_dc_state +ffffffff81a3a9e0 T gen9_enable_dc5 +ffffffff81a3ac40 T skl_enable_dc6 +ffffffff81a3ada0 T bxt_enable_dc9 +ffffffff81a3af50 T bxt_disable_dc9 +ffffffff81a3b040 T gen9_disable_dc_states +ffffffff81a3b410 T chv_phy_powergate_ch +ffffffff81a3b520 t assert_chv_phy_status +ffffffff81a3b8d0 T chv_phy_powergate_lanes +ffffffff81a3bb30 t i9xx_power_well_sync_hw_noop +ffffffff81a3bb60 t i9xx_always_on_power_well_noop +ffffffff81a3bb90 t i9xx_always_on_power_well_enabled +ffffffff81a3bbc0 t chv_pipe_power_well_sync_hw +ffffffff81a3bbf0 t chv_pipe_power_well_enable +ffffffff81a3bc20 t chv_pipe_power_well_disable +ffffffff81a3bc80 t chv_pipe_power_well_enabled +ffffffff81a3bd80 t chv_dpio_cmn_power_well_enable +ffffffff81a3bf90 t chv_dpio_cmn_power_well_disable +ffffffff81a3c0c0 t vlv_power_well_enabled +ffffffff81a3c1e0 t i830_pipes_power_well_sync_hw +ffffffff81a3c2d0 t i830_pipes_power_well_enable +ffffffff81a3c390 t i830_pipes_power_well_disable +ffffffff81a3c3c0 t i830_pipes_power_well_enabled +ffffffff81a3c460 t hsw_power_well_sync_hw +ffffffff81a3c550 t hsw_power_well_enable +ffffffff81a3c7d0 t hsw_power_well_disable +ffffffff81a3c890 t hsw_power_well_enabled +ffffffff81a3c970 t gen9_dc_off_power_well_enable +ffffffff81a3c980 t gen9_dc_off_power_well_disable +ffffffff81a3ca20 t gen9_dc_off_power_well_enabled +ffffffff81a3cab0 t bxt_dpio_cmn_power_well_enable +ffffffff81a3cae0 t bxt_dpio_cmn_power_well_disable +ffffffff81a3cb10 t bxt_dpio_cmn_power_well_enabled +ffffffff81a3cb40 t vlv_display_power_well_enable +ffffffff81a3cb70 t vlv_display_power_well_disable +ffffffff81a3cbe0 t vlv_dpio_cmn_power_well_enable +ffffffff81a3cc60 t vlv_dpio_cmn_power_well_disable +ffffffff81a3cd60 t vlv_power_well_enable +ffffffff81a3cd80 t vlv_power_well_disable +ffffffff81a3cda0 t icl_aux_power_well_enable +ffffffff81a3d430 t icl_aux_power_well_disable +ffffffff81a3d6c0 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81a3d6e0 t tgl_tc_cold_off_power_well_enable +ffffffff81a3d700 t tgl_tc_cold_off_power_well_disable +ffffffff81a3d720 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81a3d750 t xelpdp_aux_power_well_enable +ffffffff81a3d820 t xelpdp_aux_power_well_disable +ffffffff81a3d8f0 t xelpdp_aux_power_well_enabled +ffffffff81a3d9a0 t chv_set_pipe_power_well +ffffffff81a3dba0 t vlv_display_power_well_init +ffffffff81a3df00 t vlv_set_power_well +ffffffff81a3e120 t hsw_wait_for_power_well_enable +ffffffff81a3e270 t hsw_wait_for_power_well_disable +ffffffff81a3e540 t tgl_tc_cold_request +ffffffff81a3f000 T intel_display_reset_prepare +ffffffff81a3f1e0 T intel_display_reset_finish +ffffffff81a40000 T intel_display_rps_boost_after_vblank +ffffffff81a40110 t do_rps_boost +ffffffff81a401c0 T intel_display_rps_mark_interactive +ffffffff81a41000 T intel_dkl_phy_init +ffffffff81a41020 T intel_dkl_phy_read +ffffffff81a41150 T intel_dkl_phy_write +ffffffff81a41260 T intel_dkl_phy_rmw +ffffffff81a41390 T intel_dkl_phy_posting_read +ffffffff81a42000 T intel_dmc_has_payload +ffffffff81a42050 T intel_dmc_enable_pipe +ffffffff81a42160 T intel_dmc_disable_pipe +ffffffff81a42270 T intel_dmc_load_program +ffffffff81a42aa0 t pipedmc_clock_gating_wa +ffffffff81a42c90 T intel_dmc_disable_program +ffffffff81a42ec0 T assert_dmc_loaded +ffffffff81a43040 T intel_dmc_init +ffffffff81a43300 t dmc_load_work_fn +ffffffff81a43c10 T intel_dmc_suspend +ffffffff81a43ca0 T intel_dmc_resume +ffffffff81a43d40 T intel_dmc_fini +ffffffff81a43e90 T intel_dmc_print_error_state +ffffffff81a43f90 T intel_dmc_debugfs_register +ffffffff81a44000 T intel_dp_is_edp +ffffffff81a44030 T intel_dp_is_uhbr +ffffffff81a44070 T intel_dp_max_lane_count +ffffffff81a440e0 T intel_dp_link_required +ffffffff81a44120 T intel_dp_max_data_rate +ffffffff81a44180 T intel_dp_can_bigjoiner +ffffffff81a441d0 T intel_dp_get_link_train_fallback_values +ffffffff81a44580 T intel_dp_mode_to_fec_clock +ffffffff81a445d0 T intel_dp_dsc_nearest_valid_bpp +ffffffff81a446d0 T intel_dp_dsc_get_output_bpp +ffffffff81a447f0 T intel_dp_dsc_get_slice_count +ffffffff81a44980 T intel_dp_min_bpp +ffffffff81a449c0 T intel_dp_need_bigjoiner +ffffffff81a44a20 T intel_dp_source_supports_tps3 +ffffffff81a44a70 T intel_dp_source_supports_tps4 +ffffffff81a44ab0 T intel_dp_max_link_rate +ffffffff81a44b60 T intel_dp_rate_select +ffffffff81a44c00 T intel_dp_compute_rate +ffffffff81a44cd0 T intel_dp_has_hdmi_sink +ffffffff81a44d10 T intel_dp_adjust_compliance_config +ffffffff81a44e50 T intel_dp_dsc_compute_bpp +ffffffff81a44f00 T intel_dp_dsc_compute_config +ffffffff81a455d0 T intel_dp_limited_color_range +ffffffff81a45640 T intel_dp_compute_psr_vsc_sdp +ffffffff81a456c0 T intel_dp_needs_vsc_sdp +ffffffff81a45710 t intel_dp_compute_vsc_colorimetry +ffffffff81a45890 T intel_dp_compute_config +ffffffff81a45ce0 t intel_dp_compute_output_format +ffffffff81a45f10 t intel_dp_audio_compute_config +ffffffff81a45ff0 t intel_dp_drrs_compute_config +ffffffff81a46190 t intel_dp_compute_vsc_sdp +ffffffff81a46230 t intel_dp_compute_hdr_metadata_infoframe_sdp +ffffffff81a462c0 T intel_dp_set_link_params +ffffffff81a46300 T intel_edp_backlight_on +ffffffff81a463a0 T intel_edp_backlight_off +ffffffff81a46430 T intel_dp_sink_set_decompression_state +ffffffff81a464d0 T intel_dp_wait_source_oui +ffffffff81a465c0 T intel_dp_set_power +ffffffff81a467e0 T intel_dp_sync_state +ffffffff81a46860 t intel_dp_get_dpcd +ffffffff81a469c0 t intel_dp_reset_max_link_params +ffffffff81a46ac0 T intel_dp_initial_fastset_check +ffffffff81a46bf0 T intel_dp_check_frl_training +ffffffff81a471a0 T intel_dp_pcon_dsc_configure +ffffffff81a47390 T intel_dp_configure_protocol_converter +ffffffff81a47570 T intel_dp_get_colorimetry_status +ffffffff81a475d0 T intel_edp_fixup_vbt_bpp +ffffffff81a47660 T intel_write_dp_vsc_sdp +ffffffff81a47800 T intel_dp_set_infoframes +ffffffff81a47920 t intel_write_dp_sdp +ffffffff81a47c00 T intel_read_dp_sdp +ffffffff81a47f20 T intel_dp_get_active_pipes +ffffffff81a48140 T intel_dp_retrain_link +ffffffff81a483f0 t intel_dp_needs_link_retrain +ffffffff81a48570 T intel_dp_phy_test +ffffffff81a48c20 T intel_digital_port_connected +ffffffff81a48cd0 T intel_dp_encoder_flush_work +ffffffff81a48d30 T intel_dp_encoder_suspend +ffffffff81a48d70 T intel_dp_encoder_shutdown +ffffffff81a48db0 T intel_dp_hpd_pulse +ffffffff81a49420 T intel_dp_is_port_edp +ffffffff81a494b0 T intel_dp_init_connector +ffffffff81a4a610 t intel_dp_modeset_retry_work_fn +ffffffff81a4a6b0 t intel_dp_set_common_rates +ffffffff81a4a830 T intel_dp_mst_suspend +ffffffff81a4a8d0 T intel_dp_mst_resume +ffffffff81a4a980 t intel_dp_output_format +ffffffff81a4aac0 t intel_dp_compute_link_config +ffffffff81a4b280 t intel_dp_tmds_clock_valid +ffffffff81a4b320 t intel_dp_set_sink_rates +ffffffff81a4b550 t intel_dp_check_device_service_irq +ffffffff81a4bb20 t intel_dp_force +ffffffff81a4bc50 t intel_dp_connector_register +ffffffff81a4bd20 t intel_dp_connector_unregister +ffffffff81a4bd80 t intel_dp_oob_hotplug_event +ffffffff81a4be00 t intel_dp_set_edid +ffffffff81a4c200 t intel_dp_get_modes +ffffffff81a4c2f0 t intel_dp_detect +ffffffff81a4cbb0 t intel_dp_mode_valid +ffffffff81a4cf30 t intel_dp_connector_atomic_check +ffffffff81a4d2a0 t intel_dp_get_dsc_sink_cap +ffffffff81a4d410 t intel_dp_mode_min_output_bpp +ffffffff81a4d470 t intel_dp_mode_valid_downstream +ffffffff81a4d630 t icl_max_source_rate +ffffffff81a4e000 T intel_dp_aux_pack +ffffffff81a4e070 T intel_dp_aux_fini +ffffffff81a4e090 T intel_dp_aux_init +ffffffff81a4e2a0 t xelpdp_aux_ctl_reg +ffffffff81a4e370 t xelpdp_aux_data_reg +ffffffff81a4e440 t tgl_aux_ctl_reg +ffffffff81a4e4c0 t tgl_aux_data_reg +ffffffff81a4e550 t skl_aux_ctl_reg +ffffffff81a4e5d0 t skl_aux_data_reg +ffffffff81a4e660 t ilk_aux_ctl_reg +ffffffff81a4e6e0 t ilk_aux_data_reg +ffffffff81a4e770 t g4x_aux_ctl_reg +ffffffff81a4e7f0 t g4x_aux_data_reg +ffffffff81a4e890 t skl_get_aux_clock_divider +ffffffff81a4e8c0 t hsw_get_aux_clock_divider +ffffffff81a4e950 t ilk_get_aux_clock_divider +ffffffff81a4e9b0 t g4x_get_aux_clock_divider +ffffffff81a4ea00 t skl_get_aux_send_ctl +ffffffff81a4ea80 t g4x_get_aux_send_ctl +ffffffff81a4eae0 t kasprintf +ffffffff81a4ebb0 t intel_dp_aux_transfer +ffffffff81a4ee40 T intel_dp_aux_ch +ffffffff81a4efa0 T intel_dp_aux_irq_handler +ffffffff81a4f040 t intel_dp_aux_xfer +ffffffff81a50000 T intel_dp_aux_init_backlight_funcs +ffffffff81a50260 t intel_dp_aux_hdr_setup_backlight +ffffffff81a503e0 t intel_dp_aux_hdr_get_backlight +ffffffff81a50560 t intel_dp_aux_hdr_set_backlight +ffffffff81a50660 t intel_dp_aux_hdr_disable_backlight +ffffffff81a506e0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a50910 t intel_dp_aux_vesa_setup_backlight +ffffffff81a50b70 t intel_dp_aux_vesa_get_backlight +ffffffff81a50ba0 t intel_dp_aux_vesa_set_backlight +ffffffff81a50c40 t intel_dp_aux_vesa_disable_backlight +ffffffff81a50cf0 t intel_dp_aux_vesa_enable_backlight +ffffffff81a51000 T intel_dp_hdcp_init +ffffffff81a510b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a511a0 t intel_dp_hdcp_read_bksv +ffffffff81a51230 t intel_dp_hdcp_read_bstatus +ffffffff81a512c0 t intel_dp_hdcp_repeater_present +ffffffff81a51370 t intel_dp_hdcp_read_ri_prime +ffffffff81a51400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a514a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a51590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a51630 t intel_dp_hdcp_toggle_signalling +ffffffff81a51660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a51850 t intel_dp_hdcp_check_link +ffffffff81a518e0 t intel_dp_hdcp_capable +ffffffff81a51990 t intel_dp_hdcp2_capable +ffffffff81a51a10 t intel_dp_hdcp2_write_msg +ffffffff81a51bc0 t intel_dp_hdcp2_read_msg +ffffffff81a52290 t intel_dp_hdcp2_config_stream_type +ffffffff81a522f0 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a52550 t intel_dp_mst_hdcp2_check_link +ffffffff81a52610 t intel_dp_hdcp2_check_link +ffffffff81a53000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a530d0 t intel_dp_init_lttpr +ffffffff81a533b0 T intel_dp_get_adjust_train +ffffffff81a53ab0 T intel_dp_program_link_training_pattern +ffffffff81a53bd0 T intel_dp_set_signal_levels +ffffffff81a53f70 T intel_dp_dump_link_status +ffffffff81a54060 T intel_dp_stop_link_train +ffffffff81a54310 T intel_dp_start_link_train +ffffffff81a560a0 T intel_dp_128b132b_sdp_crc16 +ffffffff81a56170 t intel_dp_link_train_phy +ffffffff81a58000 T intel_dp_mst_encoder_active_links +ffffffff81a58030 T intel_dp_mst_encoder_init +ffffffff81a58270 T intel_dp_mst_source_support +ffffffff81a582b0 T intel_dp_mst_encoder_cleanup +ffffffff81a58310 T intel_dp_mst_is_master_trans +ffffffff81a58350 T intel_dp_mst_is_slave_trans +ffffffff81a58390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a58450 t intel_dp_add_mst_connector +ffffffff81a58680 t intel_dp_mst_poll_hpd_irq +ffffffff81a586a0 t intel_dp_mst_get_hw_state +ffffffff81a58700 t intel_dp_mst_connector_late_register +ffffffff81a58770 t intel_dp_mst_connector_early_unregister +ffffffff81a587a0 t intel_dp_mst_get_modes +ffffffff81a58840 t intel_dp_mst_detect +ffffffff81a58940 t intel_dp_mst_mode_valid_ctx +ffffffff81a58b60 t intel_mst_atomic_best_encoder +ffffffff81a58bc0 t intel_dp_mst_atomic_check +ffffffff81a58d30 t intel_dp_mst_compute_config +ffffffff81a59280 t intel_dp_mst_compute_config_late +ffffffff81a59380 t intel_mst_disable_dp +ffffffff81a59460 t intel_mst_post_disable_dp +ffffffff81a59710 t intel_mst_post_pll_disable_dp +ffffffff81a59770 t intel_mst_pre_pll_enable_dp +ffffffff81a597b0 t intel_mst_pre_enable_dp +ffffffff81a599d0 t intel_mst_enable_dp +ffffffff81a59d70 t intel_dp_mst_enc_get_hw_state +ffffffff81a59db0 t intel_dp_mst_enc_get_config +ffffffff81a59dd0 t intel_dp_mst_initial_fastset_check +ffffffff81a59df0 t intel_dp_mst_encoder_destroy +ffffffff81a59e20 t intel_dp_mst_find_vcpi_slots_for_bpp +ffffffff81a5b000 T bxt_port_to_phy_channel +ffffffff81a5b110 T bxt_ddi_phy_set_signal_levels +ffffffff81a5b4e0 T bxt_ddi_phy_is_enabled +ffffffff81a5b610 T bxt_ddi_phy_uninit +ffffffff81a5b6f0 T bxt_ddi_phy_init +ffffffff81a5b910 t _bxt_ddi_phy_init +ffffffff81a5be50 T bxt_ddi_phy_verify_state +ffffffff81a5c130 t __phy_reg_verify_state +ffffffff81a5c230 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a5c2a0 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a5c500 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a5c6e0 T vlv_dig_port_to_channel +ffffffff81a5c750 T vlv_dig_port_to_phy +ffffffff81a5c7c0 T vlv_pipe_to_channel +ffffffff81a5c820 T chv_set_phy_signal_level +ffffffff81a5cb70 T chv_data_lane_soft_reset +ffffffff81a5cd40 T chv_phy_pre_pll_enable +ffffffff81a5cfe0 T chv_phy_pre_encoder_enable +ffffffff81a5d240 T chv_phy_release_cl2_override +ffffffff81a5d2d0 T chv_phy_post_pll_disable +ffffffff81a5d380 T vlv_set_phy_signal_level +ffffffff81a5d4f0 T vlv_phy_pre_pll_enable +ffffffff81a5d5f0 T vlv_phy_pre_encoder_enable +ffffffff81a5d6f0 T vlv_phy_reset_lanes +ffffffff81a5e000 T pnv_calc_dpll_params +ffffffff81a5e0c0 T i9xx_calc_dpll_params +ffffffff81a5e190 T vlv_calc_dpll_params +ffffffff81a5e250 T chv_calc_dpll_params +ffffffff81a5e320 T bxt_find_best_dpll +ffffffff81a5e340 t chv_find_best_dpll +ffffffff81a5e680 T i9xx_dpll_compute_fp +ffffffff81a5e6c0 T vlv_compute_dpll +ffffffff81a5e740 T chv_compute_dpll +ffffffff81a5e7c0 T intel_dpll_crtc_compute_clock +ffffffff81a5e8c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a5ea10 T intel_dpll_init_clock_hook +ffffffff81a5eb20 T i9xx_enable_pll +ffffffff81a5eef0 T vlv_enable_pll +ffffffff81a5f410 T chv_enable_pll +ffffffff81a5f9e0 T vlv_force_pll_on +ffffffff81a5fb30 T vlv_disable_pll +ffffffff81a5fc00 T chv_disable_pll +ffffffff81a5fd30 T i9xx_disable_pll +ffffffff81a5fe50 T vlv_force_pll_off +ffffffff81a5ff50 T assert_pll_enabled +ffffffff81a60050 T assert_pll_disabled +ffffffff81a60150 t intel_pll_is_valid +ffffffff81a60210 t mtl_crtc_compute_clock +ffffffff81a602d0 t dg2_crtc_compute_clock +ffffffff81a60350 t hsw_crtc_compute_clock +ffffffff81a60410 t hsw_crtc_get_shared_dpll +ffffffff81a604b0 t ilk_crtc_compute_clock +ffffffff81a607b0 t ilk_crtc_get_shared_dpll +ffffffff81a60800 t g4x_find_best_dpll +ffffffff81a60b40 t chv_crtc_compute_clock +ffffffff81a60c50 t vlv_crtc_compute_clock +ffffffff81a610f0 t g4x_crtc_compute_clock +ffffffff81a61250 t i9xx_compute_dpll +ffffffff81a614d0 t pnv_crtc_compute_clock +ffffffff81a618b0 t i9xx_crtc_compute_clock +ffffffff81a619d0 t i9xx_find_best_dpll +ffffffff81a61d10 t i8xx_crtc_compute_clock +ffffffff81a62000 T intel_get_shared_dpll_by_id +ffffffff81a62040 T assert_shared_dpll +ffffffff81a621f0 T intel_dpll_get_hw_state +ffffffff81a62220 T icl_tc_port_to_pll_id +ffffffff81a62250 T intel_enable_shared_dpll +ffffffff81a625b0 T intel_disable_shared_dpll +ffffffff81a62840 T intel_unreference_shared_dpll_crtc +ffffffff81a62940 T intel_shared_dpll_swap_state +ffffffff81a62a20 T icl_set_active_port_dpll +ffffffff81a62a60 T intel_shared_dpll_init +ffffffff81a62c60 T intel_compute_shared_dplls +ffffffff81a62cf0 T intel_reserve_shared_dplls +ffffffff81a62d80 T intel_release_shared_dplls +ffffffff81a62dc0 T intel_update_active_dpll +ffffffff81a62e20 T intel_dpll_get_freq +ffffffff81a62eb0 T intel_dpll_update_ref_clks +ffffffff81a62f00 T intel_dpll_readout_hw_state +ffffffff81a63130 T intel_dpll_sanitize_state +ffffffff81a63210 T intel_dpll_dump_hw_state +ffffffff81a63290 T intel_shared_dpll_state_verify +ffffffff81a63470 t verify_single_dpll_state +ffffffff81a639e0 T intel_shared_dpll_verify_disabled +ffffffff81a63a60 t icl_compute_dplls +ffffffff81a646a0 t icl_get_dplls +ffffffff81a64970 t icl_put_dplls +ffffffff81a64a30 t icl_update_active_dpll +ffffffff81a64ae0 t icl_update_dpll_ref_clks +ffffffff81a64b20 t icl_dump_hw_state +ffffffff81a64be0 t combo_pll_enable +ffffffff81a64df0 t combo_pll_disable +ffffffff81a64ec0 t combo_pll_get_hw_state +ffffffff81a64f40 t icl_ddi_combo_pll_get_freq +ffffffff81a65110 t icl_dpll_write +ffffffff81a65350 t adlp_cmtg_clock_gating_wa +ffffffff81a654b0 t icl_pll_disable +ffffffff81a65650 t icl_pll_get_hw_state +ffffffff81a65930 t tbt_pll_enable +ffffffff81a65ae0 t tbt_pll_disable +ffffffff81a65b00 t tbt_pll_get_hw_state +ffffffff81a65b20 t icl_ddi_tbt_pll_get_freq +ffffffff81a65b90 t mg_pll_enable +ffffffff81a661a0 t mg_pll_disable +ffffffff81a661e0 t dkl_pll_get_hw_state +ffffffff81a663f0 t icl_ddi_mg_pll_get_freq +ffffffff81a664d0 t icl_calc_dpll_state +ffffffff81a66610 t intel_find_shared_dpll +ffffffff81a66930 t intel_reference_shared_dpll +ffffffff81a66b50 t intel_unreference_shared_dpll +ffffffff81a66d50 t mg_pll_get_hw_state +ffffffff81a66fa0 t bxt_compute_dpll +ffffffff81a672a0 t bxt_get_dpll +ffffffff81a67370 t intel_put_dpll +ffffffff81a673d0 t bxt_update_dpll_ref_clks +ffffffff81a67410 t bxt_dump_hw_state +ffffffff81a674c0 t bxt_ddi_pll_enable +ffffffff81a67e90 t bxt_ddi_pll_disable +ffffffff81a680a0 t bxt_ddi_pll_get_hw_state +ffffffff81a684d0 t bxt_ddi_pll_get_freq +ffffffff81a68560 t bxt_ddi_set_dpll_hw_state +ffffffff81a68750 t skl_compute_dpll +ffffffff81a68eb0 t skl_get_dpll +ffffffff81a68f60 t skl_update_dpll_ref_clks +ffffffff81a68fa0 t skl_dump_hw_state +ffffffff81a69000 t skl_ddi_dpll0_enable +ffffffff81a690c0 t skl_ddi_dpll0_disable +ffffffff81a690f0 t skl_ddi_dpll0_get_hw_state +ffffffff81a691f0 t skl_ddi_pll_get_freq +ffffffff81a69280 t skl_ddi_wrpll_get_freq +ffffffff81a693e0 t skl_ddi_pll_enable +ffffffff81a69600 t skl_ddi_pll_disable +ffffffff81a69690 t skl_ddi_pll_get_hw_state +ffffffff81a697b0 t hsw_compute_dpll +ffffffff81a69fd0 t hsw_get_dpll +ffffffff81a6a120 t hsw_update_dpll_ref_clks +ffffffff81a6a190 t hsw_dump_hw_state +ffffffff81a6a1c0 t hsw_ddi_wrpll_enable +ffffffff81a6a240 t hsw_ddi_wrpll_disable +ffffffff81a6a320 t hsw_ddi_wrpll_get_hw_state +ffffffff81a6a3c0 t hsw_ddi_wrpll_get_freq +ffffffff81a6a4b0 t hsw_ddi_spll_enable +ffffffff81a6a510 t hsw_ddi_spll_disable +ffffffff81a6a5e0 t hsw_ddi_spll_get_hw_state +ffffffff81a6a670 t hsw_ddi_spll_get_freq +ffffffff81a6a710 t hsw_ddi_lcpll_enable +ffffffff81a6a740 t hsw_ddi_lcpll_disable +ffffffff81a6a770 t hsw_ddi_lcpll_get_hw_state +ffffffff81a6a7a0 t hsw_ddi_lcpll_get_freq +ffffffff81a6a820 t ibx_compute_dpll +ffffffff81a6a850 t ibx_get_dpll +ffffffff81a6a950 t ibx_dump_hw_state +ffffffff81a6a9b0 t ibx_pch_dpll_enable +ffffffff81a6ab50 t ibx_pch_dpll_disable +ffffffff81a6abd0 t ibx_pch_dpll_get_hw_state +ffffffff81a6b000 T intel_dpt_pin +ffffffff81a6b1e0 T intel_dpt_unpin +ffffffff81a6b250 T intel_dpt_resume +ffffffff81a6b320 T intel_dpt_suspend +ffffffff81a6b3f0 T intel_dpt_create +ffffffff81a6b7e0 t dpt_insert_page +ffffffff81a6b850 t dpt_clear_range +ffffffff81a6b880 t dpt_insert_entries +ffffffff81a6b970 t dpt_cleanup +ffffffff81a6b9c0 t dpt_bind_vma +ffffffff81a6ba50 t dpt_unbind_vma +ffffffff81a6ba80 T intel_dpt_destroy +ffffffff81a6bad0 T intel_dpt_configure +ffffffff81a6bc70 t __ww_mutex_lock +ffffffff81a6c000 T intel_drrs_type_str +ffffffff81a6c040 T intel_drrs_is_active +ffffffff81a6c070 T intel_drrs_activate +ffffffff81a6c260 T intel_drrs_deactivate +ffffffff81a6c420 T intel_drrs_invalidate +ffffffff81a6c440 t intel_drrs_frontbuffer_update +ffffffff81a6c690 T intel_drrs_flush +ffffffff81a6c6b0 T intel_drrs_crtc_init +ffffffff81a6c750 t intel_drrs_downclock_work +ffffffff81a6c870 T intel_drrs_crtc_debugfs_add +ffffffff81a6c8a0 T intel_drrs_connector_debugfs_add +ffffffff81a6c8b0 t __delayed_work_tick +ffffffff81a6d000 T intel_dsb_reg_write +ffffffff81a6d140 T intel_dsb_finish +ffffffff81a6d1c0 T intel_dsb_commit +ffffffff81a6d370 T intel_dsb_wait +ffffffff81a6d560 T intel_dsb_prepare +ffffffff81a6d6e0 T intel_dsb_cleanup +ffffffff81a6e000 T intel_dsi_wait_panel_power_cycle +ffffffff81a6e0f0 T intel_dsi_shutdown +ffffffff81a6e1e0 T intel_dsi_bitrate +ffffffff81a6e270 T intel_dsi_tlpx_ns +ffffffff81a6e2c0 T intel_dsi_get_modes +ffffffff81a6e2d0 T intel_dsi_mode_valid +ffffffff81a6e390 T intel_dsi_host_init +ffffffff81a6e440 T intel_dsi_get_panel_orientation +ffffffff81a6f000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a6f0a0 t dcs_setup_backlight +ffffffff81a6f120 t dcs_get_backlight +ffffffff81a6f210 t dcs_set_backlight +ffffffff81a6f300 t dcs_disable_backlight +ffffffff81a6f660 t dcs_enable_backlight +ffffffff81a70000 T intel_dsi_vbt_exec_sequence +ffffffff81a70020 T intel_dsi_log_params +ffffffff81a703a0 T intel_dsi_vbt_init +ffffffff81a70840 T intel_dsi_vbt_gpio_init +ffffffff81a70860 T intel_dsi_vbt_gpio_cleanup +ffffffff81a71000 T intel_dvo_init +ffffffff81a71650 t intel_disable_dvo +ffffffff81a716f0 t intel_enable_dvo +ffffffff81a717c0 t intel_dvo_get_hw_state +ffffffff81a71830 t intel_dvo_get_config +ffffffff81a718d0 t intel_dvo_compute_config +ffffffff81a71960 t intel_dvo_pre_enable +ffffffff81a71a60 t intel_dvo_connector_get_hw_state +ffffffff81a71af0 t intel_dvo_enc_destroy +ffffffff81a71b30 t intel_dvo_detect +ffffffff81a71c30 t intel_dvo_get_modes +ffffffff81a71ca0 t intel_dvo_mode_valid +ffffffff81a72000 T intel_fb_get_format_info +ffffffff81a722b0 T intel_fb_is_tiled_modifier +ffffffff81a722f0 t lookup_modifier +ffffffff81a72530 T intel_fb_is_ccs_modifier +ffffffff81a72570 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a725b0 T intel_fb_is_mc_ccs_modifier +ffffffff81a725f0 T intel_fb_plane_get_modifiers +ffffffff81a727d0 T intel_fb_plane_supports_modifier +ffffffff81a72850 T intel_format_info_is_yuv_semiplanar +ffffffff81a728d0 T intel_fb_is_ccs_aux_plane +ffffffff81a72980 T intel_fb_rc_ccs_cc_plane +ffffffff81a72a50 T is_surface_linear +ffffffff81a72bb0 T main_to_ccs_plane +ffffffff81a72c60 T skl_ccs_to_main_plane +ffffffff81a72da0 T skl_main_to_aux_plane +ffffffff81a72ec0 T intel_tile_size +ffffffff81a72f00 T intel_tile_width_bytes +ffffffff81a73320 T intel_tile_height +ffffffff81a73380 T intel_tile_row_size +ffffffff81a73400 T intel_fb_align_height +ffffffff81a73480 T intel_fb_modifier_uses_dpt +ffffffff81a734c0 T intel_fb_uses_dpt +ffffffff81a73520 T intel_cursor_alignment +ffffffff81a73580 T intel_surf_alignment +ffffffff81a73810 T intel_fb_plane_get_subsampling +ffffffff81a73960 T intel_plane_adjust_aligned_offset +ffffffff81a739d0 t intel_adjust_aligned_offset +ffffffff81a73b80 T intel_plane_compute_aligned_offset +ffffffff81a73c80 t intel_compute_aligned_offset +ffffffff81a73e40 T intel_fb_needs_pot_stride_remap +ffffffff81a73eb0 T intel_fb_supports_90_270_rotation +ffffffff81a73f10 T intel_fill_fb_info +ffffffff81a74a10 t calc_plane_remap_info +ffffffff81a753c0 T intel_fb_fill_view +ffffffff81a75430 T intel_plane_compute_gtt +ffffffff81a75910 t intel_plane_check_stride +ffffffff81a75a70 T intel_framebuffer_init +ffffffff81a762d0 t gen12_ccs_aux_stride +ffffffff81a76330 T intel_user_framebuffer_create +ffffffff81a76490 T intel_framebuffer_create +ffffffff81a76520 t intel_adjust_tile_offset +ffffffff81a76660 t intel_user_framebuffer_destroy +ffffffff81a766d0 t intel_user_framebuffer_create_handle +ffffffff81a76700 t intel_user_framebuffer_dirty +ffffffff81a77000 T intel_pin_and_fence_fb_obj +ffffffff81a77330 t i915_gem_object_lock +ffffffff81a77540 T intel_unpin_fb_vma +ffffffff81a775b0 T intel_plane_pin_fb +ffffffff81a778e0 T intel_plane_unpin_fb +ffffffff81a78000 T intel_fbc_cleanup +ffffffff81a781c0 T intel_fbc_pre_update +ffffffff81a78850 T intel_fbc_post_update +ffffffff81a78a00 T intel_fbc_invalidate +ffffffff81a78b80 T intel_fbc_flush +ffffffff81a78e20 T intel_fbc_atomic_check +ffffffff81a793e0 T intel_fbc_disable +ffffffff81a794a0 t __intel_fbc_disable +ffffffff81a795e0 T intel_fbc_update +ffffffff81a79ca0 T intel_fbc_reset_underrun +ffffffff81a79e00 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a79ec0 T intel_fbc_add_plane +ffffffff81a79ef0 T intel_fbc_init +ffffffff81a7a170 T intel_fbc_sanitize +ffffffff81a7a240 T intel_fbc_crtc_debugfs_add +ffffffff81a7a270 T intel_fbc_debugfs_register +ffffffff81a7a2a0 t intel_fbc_is_ok +ffffffff81a7a410 t intel_fbc_update_state +ffffffff81a7a790 t intel_fbc_underrun_work_fn +ffffffff81a7a860 t ivb_fbc_activate +ffffffff81a7aab0 t ilk_fbc_deactivate +ffffffff81a7ab60 t ilk_fbc_is_active +ffffffff81a7abc0 t ivb_fbc_is_compressing +ffffffff81a7ac30 t snb_fbc_nuke +ffffffff81a7acb0 t ilk_fbc_program_cfb +ffffffff81a7ad10 t ivb_fbc_set_false_color +ffffffff81a7ad90 t snb_fbc_activate +ffffffff81a7ae20 t ilk_fbc_is_compressing +ffffffff81a7ae90 t ilk_fbc_activate +ffffffff81a7afc0 t i965_fbc_nuke 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intel_set_pch_fifo_underrun_reporting +ffffffff81a815f0 T intel_cpu_fifo_underrun_irq_handler +ffffffff81a817e0 T intel_pch_fifo_underrun_irq_handler +ffffffff81a81860 T intel_check_cpu_fifo_underruns +ffffffff81a81a70 T intel_check_pch_fifo_underruns +ffffffff81a81ba0 T intel_init_fifo_underrun_reporting +ffffffff81a82000 T intel_frontbuffer_flip_prepare +ffffffff81a82050 T intel_frontbuffer_flip_complete +ffffffff81a82130 T intel_frontbuffer_flip +ffffffff81a82200 T __intel_fb_invalidate +ffffffff81a82290 T __intel_fb_flush +ffffffff81a82380 T intel_frontbuffer_get +ffffffff81a824c0 t frontbuffer_active +ffffffff81a824f0 t frontbuffer_retire +ffffffff81a82530 T intel_frontbuffer_put +ffffffff81a82660 T intel_frontbuffer_track +ffffffff81a83000 T intel_atomic_global_obj_init +ffffffff81a83070 T intel_atomic_global_obj_cleanup +ffffffff81a83160 T intel_atomic_get_global_obj_state +ffffffff81a833b0 T intel_atomic_get_old_global_obj_state +ffffffff81a83410 T intel_atomic_get_new_global_obj_state +ffffffff81a83470 T intel_atomic_swap_global_state +ffffffff81a835b0 T intel_atomic_clear_global_state +ffffffff81a836d0 T intel_atomic_lock_global_state +ffffffff81a83760 T intel_atomic_serialize_global_state +ffffffff81a837f0 T intel_atomic_global_state_is_serialized +ffffffff81a84000 T intel_gmbus_is_valid_pin +ffffffff81a84100 T intel_gmbus_reset +ffffffff81a84160 T intel_bb_set_bits +ffffffff81a842a0 T intel_bb_set_dir +ffffffff81a842d0 T intel_bb_read_bits +ffffffff81a84460 T intel_acquire_bus +ffffffff81a84660 T intel_release_bus +ffffffff81a84800 T intel_send_start +ffffffff81a84820 T intel_send_stop +ffffffff81a84840 T intel_initiate_xfer +ffffffff81a84860 T intel_read_byte +ffffffff81a84880 T intel_write_byte +ffffffff81a848a0 T intel_gmbus_output_aksv +ffffffff81a84970 t do_gmbus_xfer +ffffffff81a84f70 T intel_gmbus_setup +ffffffff81a852f0 T intel_gmbus_teardown +ffffffff81a85370 T intel_gmbus_get_adapter +ffffffff81a853f0 T intel_gmbus_force_bit +ffffffff81a85490 T intel_gmbus_is_forced_bit +ffffffff81a854c0 T intel_gmbus_irq_handler +ffffffff81a85560 t gmbus_xfer_read +ffffffff81a85850 t gmbus_xfer_write +ffffffff81a85a90 t gmbus_wait +ffffffff81a85e70 t gmbus_wait_idle +ffffffff81a86000 t gmbus_xfer +ffffffff81a860e0 t gmbus_func +ffffffff81a86120 t gmbus_lock_bus +ffffffff81a86140 t gmbus_trylock_bus +ffffffff81a861a0 t gmbus_unlock_bus +ffffffff81a87000 T intel_hdcp_capable +ffffffff81a870a0 t intel_hdcp_read_valid_bksv +ffffffff81a87330 T intel_hdcp2_capable +ffffffff81a87450 T is_hdcp_supported +ffffffff81a874a0 T intel_hdcp_component_init +ffffffff81a87500 T intel_hdcp_init +ffffffff81a87680 t intel_hdcp_check_work +ffffffff81a89fc0 t intel_hdcp_prop_work +ffffffff81a8a040 T intel_hdcp_enable +ffffffff81a8a090 T intel_hdcp_disable +ffffffff81a8a1c0 t intel_hdcp_update_value +ffffffff81a8a380 t _intel_hdcp2_disable +ffffffff81a8a770 t _intel_hdcp_disable +ffffffff81a8aa60 T intel_hdcp_update_pipe +ffffffff81a8abd0 T intel_hdcp_component_fini +ffffffff81a8ac70 T intel_hdcp_cleanup +ffffffff81a8adb0 T intel_hdcp_atomic_check +ffffffff81a8ae40 T intel_hdcp_handle_cp_irq +ffffffff81a8af40 t __delayed_work_tick +ffffffff81a8af60 t hdcp2_authenticate_repeater_topology +ffffffff81a8b220 t transcoder_name +ffffffff81a8b260 t intel_hdcp_get_repeater_ctl +ffffffff81a8b330 t ktime_get_raw +ffffffff81a8b3b0 t wait_remaining_ms_from_jiffies +ffffffff81a8b440 t intel_hdcp_auth_downstream +ffffffff81a8c610 t intel_write_sha_text +ffffffff81a8d000 T intel_hdcp_gsc_cs_required +ffffffff81a8d040 T intel_hdcp_gsc_init +ffffffff81a8d4b0 T intel_hdcp_gsc_fini +ffffffff81a8d510 T intel_hdcp_gsc_msg_send +ffffffff81a8d840 t gsc_hdcp_initiate_session +ffffffff81a8d890 t gsc_hdcp_verify_receiver_cert_prepare_km +ffffffff81a8d8e0 t gsc_hdcp_verify_hprime +ffffffff81a8d930 t gsc_hdcp_store_pairing_info +ffffffff81a8d980 t gsc_hdcp_initiate_locality_check +ffffffff81a8d9d0 t gsc_hdcp_verify_lprime +ffffffff81a8da20 t gsc_hdcp_get_session_key +ffffffff81a8da70 t gsc_hdcp_repeater_check_flow_prepare_ack +ffffffff81a8dac0 t gsc_hdcp_verify_mprime +ffffffff81a8db10 t gsc_hdcp_enable_authentication +ffffffff81a8db60 t gsc_hdcp_close_session +ffffffff81a8e000 T intel_hdmi_to_i915 +ffffffff81a8e040 T hsw_write_infoframe +ffffffff81a8e450 t hsw_dip_data_reg +ffffffff81a8e600 T hsw_read_infoframe +ffffffff81a8e6c0 T intel_hdmi_infoframe_enable +ffffffff81a8e760 T intel_hdmi_infoframes_enabled +ffffffff81a8e880 T intel_read_infoframe +ffffffff81a8ea20 T intel_hdmi_read_gcp_infoframe +ffffffff81a8eb00 T intel_dp_dual_mode_set_tmds_output +ffffffff81a8ebc0 T intel_hdmi_tmds_clock +ffffffff81a8ec10 T intel_hdmi_bpc_possible +ffffffff81a8ed30 T intel_hdmi_limited_color_range +ffffffff81a8eda0 T intel_hdmi_compute_has_hdmi_sink +ffffffff81a8ee10 T intel_hdmi_compute_config +ffffffff81a8f3c0 t intel_hdmi_compute_output_format +ffffffff81a8f520 t intel_hdmi_compute_hdmi_infoframe +ffffffff81a8f5e0 t intel_hdmi_compute_drm_infoframe +ffffffff81a8f6d0 T intel_hdmi_encoder_shutdown +ffffffff81a8f7a0 T intel_hdmi_handle_sink_scrambling +ffffffff81a8f890 T intel_infoframe_init +ffffffff81a8fa30 t vlv_write_infoframe +ffffffff81a8fd60 t vlv_read_infoframe +ffffffff81a8fee0 t vlv_set_infoframes +ffffffff81a90220 t vlv_infoframes_enabled +ffffffff81a902b0 t g4x_write_infoframe +ffffffff81a90550 t g4x_read_infoframe +ffffffff81a90680 t g4x_set_infoframes +ffffffff81a90910 t g4x_infoframes_enabled +ffffffff81a90990 t hsw_set_infoframes +ffffffff81a90c20 t hsw_infoframes_enabled +ffffffff81a90cb0 t ibx_write_infoframe +ffffffff81a90fc0 t ibx_read_infoframe +ffffffff81a91130 t ibx_set_infoframes +ffffffff81a91460 t ibx_infoframes_enabled +ffffffff81a914f0 t cpt_write_infoframe +ffffffff81a917f0 t cpt_read_infoframe +ffffffff81a91960 t cpt_set_infoframes +ffffffff81a91c40 t cpt_infoframes_enabled +ffffffff81a91cb0 T intel_hdmi_init_connector +ffffffff81a92430 T intel_hdmi_dsc_get_slice_height +ffffffff81a92490 T intel_hdmi_dsc_get_num_slices +ffffffff81a92610 T intel_hdmi_dsc_get_bpp +ffffffff81a926f0 t intel_hdmi_compute_clock +ffffffff81a92950 t hdmi_port_clock_valid +ffffffff81a92b70 t intel_write_infoframe +ffffffff81a92d40 t intel_hdmi_detect +ffffffff81a92ee0 t intel_hdmi_force +ffffffff81a92f80 t intel_hdmi_connector_register +ffffffff81a92f90 t intel_hdmi_connector_unregister +ffffffff81a92fa0 t intel_hdmi_set_edid +ffffffff81a93230 t intel_hdmi_get_modes +ffffffff81a93240 t intel_hdmi_mode_valid +ffffffff81a933f0 t intel_hdmi_connector_atomic_check +ffffffff81a93420 t intel_hdmi_mode_clock_valid +ffffffff81a935c0 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a93700 t intel_hdmi_hdcp_read_bksv +ffffffff81a937d0 t intel_hdmi_hdcp_read_bstatus +ffffffff81a938a0 t intel_hdmi_hdcp_repeater_present +ffffffff81a93980 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a93a50 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a93b30 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a93c00 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a93cf0 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a93f60 t intel_hdmi_hdcp_check_link +ffffffff81a94280 t intel_hdmi_hdcp2_capable +ffffffff81a94340 t intel_hdmi_hdcp2_write_msg +ffffffff81a94430 t intel_hdmi_hdcp2_read_msg +ffffffff81a94830 t intel_hdmi_hdcp2_check_link +ffffffff81a95000 T intel_hpd_pin_default +ffffffff81a95030 T intel_encoder_hotplug +ffffffff81a95160 T intel_hpd_trigger_irq +ffffffff81a951d0 T intel_hpd_irq_handler +ffffffff81a955f0 T intel_hpd_init +ffffffff81a95700 T intel_hpd_poll_enable +ffffffff81a95780 T intel_hpd_poll_disable +ffffffff81a957e0 T intel_hpd_init_early +ffffffff81a958f0 t i915_hotplug_work_func +ffffffff81a95cd0 t i915_digport_work_func +ffffffff81a95e50 t i915_hpd_poll_init_work +ffffffff81a95f50 t intel_hpd_irq_storm_reenable_work +ffffffff81a96270 T intel_hpd_cancel_work +ffffffff81a96390 T intel_hpd_disable +ffffffff81a96420 T intel_hpd_enable +ffffffff81a96490 T intel_hpd_debugfs_register +ffffffff81a964c0 t __delayed_work_tick +ffffffff81a97000 T i915_hotplug_interrupt_update_locked +ffffffff81a970c0 T i915_hotplug_interrupt_update +ffffffff81a97190 T i9xx_hpd_irq_ack +ffffffff81a972d0 T i9xx_hpd_irq_handler +ffffffff81a97480 T ibx_hpd_irq_handler +ffffffff81a97620 T xelpdp_pica_irq_handler +ffffffff81a978e0 T icp_irq_handler +ffffffff81a97b70 T spt_irq_handler +ffffffff81a97e10 T ilk_hpd_irq_handler +ffffffff81a97f30 T bxt_hpd_irq_handler +ffffffff81a98090 T gen11_hpd_irq_handler +ffffffff81a98300 T intel_hpd_enable_detection +ffffffff81a98340 T intel_hpd_irq_setup +ffffffff81a98390 T intel_hotplug_irq_init +ffffffff81a98610 t i915_hpd_irq_setup +ffffffff81a98720 t i915_hpd_enable_detection +ffffffff81a987c0 t icp_hpd_irq_setup +ffffffff81a989b0 t icp_hpd_enable_detection +ffffffff81a98ab0 t dg1_hpd_irq_setup +ffffffff81a98b10 t dg1_hpd_enable_detection +ffffffff81a98c50 t xelpdp_hpd_irq_setup +ffffffff81a99050 t xelpdp_hpd_enable_detection +ffffffff81a991f0 t gen11_hpd_irq_setup +ffffffff81a99440 t gen11_hpd_enable_detection +ffffffff81a99640 t bxt_hpd_irq_setup +ffffffff81a997c0 t bxt_hpd_enable_detection +ffffffff81a998a0 t spt_hpd_irq_setup +ffffffff81a99ac0 t spt_hpd_enable_detection +ffffffff81a99be0 t ilk_hpd_irq_setup +ffffffff81a99e50 t ilk_hpd_enable_detection +ffffffff81a9a000 T intel_hti_init +ffffffff81a9a070 T intel_hti_uses_phy +ffffffff81a9a110 T intel_hti_dpll_mask +ffffffff81a9b000 T intel_load_detect_get_pipe +ffffffff81a9b370 t intel_modeset_disable_planes +ffffffff81a9b430 T intel_load_detect_release_pipe +ffffffff81a9c000 T intel_lpe_audio_irq_handler +ffffffff81a9c020 T intel_lpe_audio_init +ffffffff81a9c050 T intel_lpe_audio_teardown +ffffffff81a9c070 T intel_lpe_audio_notify +ffffffff81a9d000 T lspcon_detect_hdr_capability +ffffffff81a9d0b0 T lspcon_write_infoframe +ffffffff81a9d7f0 T lspcon_read_infoframe +ffffffff81a9d830 T lspcon_set_infoframes +ffffffff81a9da90 T lspcon_infoframes_enabled +ffffffff81a9dc60 T lspcon_wait_pcon_mode +ffffffff81a9dc80 t lspcon_wait_mode +ffffffff81a9df40 T lspcon_init +ffffffff81a9e340 T intel_lspcon_infoframes_enabled +ffffffff81a9e370 T lspcon_resume +ffffffff81a9e610 t lspcon_change_mode +ffffffff81a9f000 T intel_lvds_port_enabled +ffffffff81a9f080 T intel_get_lvds_encoder +ffffffff81a9f0e0 T intel_is_dual_link_lvds +ffffffff81a9f140 T intel_lvds_init +ffffffff81a9f7e0 t intel_enable_lvds +ffffffff81a9f920 t intel_pre_enable_lvds +ffffffff81a9fc00 t intel_lvds_compute_config +ffffffff81a9fd60 t pch_disable_lvds +ffffffff81a9fd80 t pch_post_disable_lvds +ffffffff81a9fda0 t gmch_disable_lvds +ffffffff81a9fdd0 t intel_lvds_get_hw_state +ffffffff81a9fe90 t intel_lvds_get_config +ffffffff81a9ffa0 t intel_lvds_shutdown +ffffffff81aa0040 t compute_is_dual_link_lvds +ffffffff81aa0110 t intel_no_lvds_dmi_callback +ffffffff81aa0160 t intel_disable_lvds +ffffffff81aa0280 t intel_lvds_get_modes +ffffffff81aa02d0 t intel_lvds_mode_valid +ffffffff81aa0370 t intel_dual_link_lvds_callback +ffffffff81aa1000 T _intel_modeset_lock_begin +ffffffff81aa1060 T _intel_modeset_lock_loop +ffffffff81aa10a0 T _intel_modeset_lock_end +ffffffff81aa2000 T intel_modeset_setup_hw_state +ffffffff81aa32d0 t intel_crtc_disable_noatomic +ffffffff81aa38b0 t intel_crtc_disable_noatomic_begin +ffffffff81aa4000 T intel_modeset_verify_crtc +ffffffff81aa4540 t verify_connector_state +ffffffff81aa49d0 T intel_modeset_verify_disabled +ffffffff81aa5000 T intel_opregion_notify_encoder +ffffffff81aa5180 t swsci +ffffffff81aa54b0 T intel_opregion_notify_adapter +ffffffff81aa5510 T intel_opregion_asle_intr +ffffffff81aa5560 T intel_opregion_setup +ffffffff81aa5d70 t asle_work +ffffffff81aa61e0 T intel_opregion_get_panel_type +ffffffff81aa62d0 T intel_opregion_get_edid +ffffffff81aa6390 T intel_opregion_headless_sku +ffffffff81aa63e0 T intel_opregion_register +ffffffff81aa6480 T intel_opregion_resume +ffffffff81aa6520 T intel_opregion_suspend +ffffffff81aa65d0 T intel_opregion_unregister +ffffffff81aa66a0 T intel_opregion_cleanup +ffffffff81aa6790 t intel_no_opregion_vbt_callback +ffffffff81aa67f0 t intel_use_opregion_panel_type_callback +ffffffff81aa7000 T intel_overlay_reset +ffffffff81aa7050 T intel_overlay_switch_off +ffffffff81aa7250 t intel_overlay_release_old_vid +ffffffff81aa73f0 T intel_overlay_put_image_ioctl +ffffffff81aa7700 t update_pfit_vscale_ratio +ffffffff81aa77d0 t check_overlay_dst +ffffffff81aa78a0 t check_overlay_src +ffffffff81aa7af0 t intel_overlay_do_put_image +ffffffff81aa8660 T intel_overlay_attrs_ioctl +ffffffff81aa8980 t check_gamma +ffffffff81aa8b70 T intel_overlay_setup +ffffffff81aa8de0 t intel_overlay_last_flip_retire +ffffffff81aa8e20 T intel_overlay_cleanup +ffffffff81aa8ee0 T intel_overlay_capture_error_state +ffffffff81aa8fd0 T intel_overlay_print_error_state +ffffffff81aa93a0 t intel_overlay_release_old_vid_tail +ffffffff81aa9470 t intel_overlay_off_tail +ffffffff81aa9620 t intel_overlay_flip_prepare +ffffffff81aaa000 T intel_panel_use_ssc +ffffffff81aaa060 T intel_panel_preferred_fixed_mode +ffffffff81aaa0b0 T intel_panel_fixed_mode +ffffffff81aaa210 T intel_panel_downclock_mode +ffffffff81aaa300 T intel_panel_highest_mode +ffffffff81aaa360 T intel_panel_get_modes +ffffffff81aaa3f0 T intel_panel_drrs_type +ffffffff81aaa420 T intel_panel_compute_config +ffffffff81aaa590 T intel_panel_add_edid_fixed_modes +ffffffff81aaaac0 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81aaab20 t intel_panel_add_fixed_mode +ffffffff81aaaca0 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81aaad10 T intel_panel_add_encoder_fixed_mode +ffffffff81aaad50 T intel_panel_fitting +ffffffff81aab3b0 T intel_panel_detect +ffffffff81aab440 T intel_panel_mode_valid +ffffffff81aab4d0 T intel_panel_init_alloc +ffffffff81aab520 T intel_panel_init +ffffffff81aab640 T intel_panel_fini +ffffffff81aac000 T intel_has_pch_trancoder +ffffffff81aac060 T intel_crtc_pch_transcoder +ffffffff81aac0a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81aac0f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81aac140 T ilk_pch_pre_enable +ffffffff81aac170 T ilk_pch_enable +ffffffff81aac750 t ilk_pch_transcoder_set_timings +ffffffff81aac9b0 T ilk_pch_disable +ffffffff81aac9d0 T ilk_pch_post_disable +ffffffff81aacda0 T ilk_pch_get_config +ffffffff81aacf60 T lpt_pch_enable +ffffffff81aad1d0 T lpt_pch_disable +ffffffff81aad2e0 T lpt_pch_get_config +ffffffff81aad3b0 T intel_pch_sanitize +ffffffff81aad690 t assert_pch_dp_disabled +ffffffff81aad810 t assert_pch_hdmi_disabled +ffffffff81aae000 T lpt_disable_iclkip +ffffffff81aae070 T lpt_iclkip +ffffffff81aae100 T lpt_program_iclkip +ffffffff81aae390 T lpt_get_iclkip +ffffffff81aae4a0 T lpt_disable_clkout_dp +ffffffff81aae580 T intel_init_pch_refclk +ffffffff81ab0000 T intel_crtc_initial_plane_config +ffffffff81ab1000 T intel_pmdemand_init +ffffffff81ab1120 T intel_pmdemand_init_early +ffffffff81ab11a0 T intel_pmdemand_update_phys_mask +ffffffff81ab1240 T intel_pmdemand_update_port_clock +ffffffff81ab1280 T intel_pmdemand_atomic_check +ffffffff81ab1620 t intel_pmdemand_update_max_ddiclk +ffffffff81ab16f0 t intel_pmdemand_update_active_non_tc_phys +ffffffff81ab18f0 T intel_pmdemand_init_pmdemand_params +ffffffff81ab1ac0 T intel_pmdemand_program_dbuf +ffffffff81ab1c50 t intel_pmdemand_wait +ffffffff81ab1e40 T intel_pmdemand_pre_plane_update +ffffffff81ab1f30 t intel_pmdemand_program_params +ffffffff81ab2370 T intel_pmdemand_post_plane_update +ffffffff81ab2450 t intel_pmdemand_duplicate_state +ffffffff81ab24e0 t intel_pmdemand_destroy_state +ffffffff81ab3000 T intel_pps_lock +ffffffff81ab3060 T intel_pps_unlock +ffffffff81ab30c0 T intel_pps_reset_all +ffffffff81ab3210 T intel_pps_check_power_unlocked +ffffffff81ab34f0 t pps_name +ffffffff81ab3590 T intel_pps_wait_power_cycle +ffffffff81ab3630 t wait_panel_power_cycle +ffffffff81ab3810 T intel_pps_vdd_on_unlocked +ffffffff81ab3d80 T intel_pps_vdd_on +ffffffff81ab3f10 T intel_pps_vdd_off_sync +ffffffff81ab3fe0 t intel_pps_vdd_off_sync_unlocked +ffffffff81ab4400 T intel_pps_vdd_off_unlocked +ffffffff81ab45b0 T intel_pps_on_unlocked +ffffffff81ab4a40 T intel_pps_on +ffffffff81ab4ae0 T intel_pps_off_unlocked +ffffffff81ab4ec0 T intel_pps_off +ffffffff81ab4f60 T intel_pps_backlight_on +ffffffff81ab5150 T intel_pps_backlight_off +ffffffff81ab5340 T intel_pps_backlight_power +ffffffff81ab5530 T vlv_pps_init +ffffffff81ab5710 t vlv_detach_power_sequencer +ffffffff81ab58e0 t vlv_steal_power_sequencer +ffffffff81ab5a10 t pps_init_delays +ffffffff81ab5eb0 t pps_init_registers +ffffffff81ab6240 T intel_pps_have_panel_power_or_vdd +ffffffff81ab6390 T intel_pps_encoder_reset +ffffffff81ab6530 t vlv_initial_power_sequencer_setup +ffffffff81ab6840 t pps_vdd_init +ffffffff81ab69f0 T intel_pps_init +ffffffff81ab6e60 t edp_panel_vdd_work +ffffffff81ab6f10 T intel_pps_init_late +ffffffff81ab7150 T intel_pps_unlock_regs_wa +ffffffff81ab7260 T intel_pps_setup +ffffffff81ab72d0 T assert_pps_unlocked +ffffffff81ab7560 t intel_pps_get_registers +ffffffff81ab7d70 t wait_panel_status +ffffffff81ab8180 t intel_pps_readout_hw_state +ffffffff81ab8330 t __delayed_work_tick +ffffffff81ab9000 T intel_psr_irq_handler +ffffffff81ab9640 t transcoder_name +ffffffff81ab9680 T intel_psr_init_dpcd +ffffffff81ab9920 T intel_psr_compute_config +ffffffff81ab9b00 t intel_psr2_config_valid +ffffffff81ab9f70 T intel_psr_get_config +ffffffff81aba110 T intel_psr_disable +ffffffff81aba220 t intel_psr_disable_locked +ffffffff81aba5a0 T intel_psr_pause +ffffffff81aba790 t intel_psr_exit +ffffffff81abaa40 T intel_psr_resume +ffffffff81abaad0 t intel_psr_activate +ffffffff81abb200 T intel_psr2_disable_plane_sel_fetch_arm +ffffffff81abb270 T intel_psr2_program_plane_sel_fetch_arm +ffffffff81abb310 T intel_psr2_program_plane_sel_fetch_noarm +ffffffff81abb480 T intel_psr2_program_trans_man_trk_ctl +ffffffff81abb570 T intel_psr2_sel_fetch_update +ffffffff81abbcf0 T intel_psr_pre_plane_update +ffffffff81abbec0 t wm_optimization_wa +ffffffff81abc050 T intel_psr_post_plane_update +ffffffff81abcc80 T intel_psr_wait_for_idle_locked +ffffffff81abce50 T intel_psr_debug_set +ffffffff81abd170 T intel_psr_invalidate +ffffffff81abd3b0 T intel_psr_flush +ffffffff81abd7e0 T intel_psr_init +ffffffff81abd910 t intel_psr_work +ffffffff81abdab0 t tgl_dc3co_disable_work +ffffffff81abdb00 T intel_psr_short_pulse +ffffffff81abdec0 T intel_psr_enabled +ffffffff81abdf40 T intel_psr_lock +ffffffff81abe000 T intel_psr_unlock +ffffffff81abe0c0 T intel_psr_debugfs_register +ffffffff81abe0f0 T intel_psr_connector_debugfs_add +ffffffff81abe120 t _compute_psr2_sdp_prior_scanline_indication +ffffffff81abe1e0 t _compute_psr2_wake_times +ffffffff81abe2d0 t intel_psr2_sel_fetch_config_valid +ffffffff81abe360 t psr2_granularity_check +ffffffff81abe450 t tgl_psr2_disable_dc3co +ffffffff81abe560 t __delayed_work_tick +ffffffff81abf000 T intel_lookup_range_min_qp +ffffffff81abf110 T intel_lookup_range_max_qp +ffffffff81ac0000 T intel_init_quirks +ffffffff81ac00f0 T intel_has_quirk +ffffffff81ac0130 t quirk_ssc_force_disable +ffffffff81ac0160 t quirk_invert_brightness +ffffffff81ac0190 t quirk_backlight_present +ffffffff81ac01c0 t quirk_increase_t12_delay +ffffffff81ac01f0 t quirk_increase_ddi_disabled_time +ffffffff81ac0220 t intel_dmi_reverse_brightness +ffffffff81ac0270 t intel_dmi_no_pps_backlight +ffffffff81ac1000 T intel_sdvo_port_enabled +ffffffff81ac10a0 T intel_sdvo_init +ffffffff81ac2030 t intel_sdvo_compute_config +ffffffff81ac23f0 t pch_disable_sdvo +ffffffff81ac2420 t pch_post_disable_sdvo +ffffffff81ac2430 t intel_disable_sdvo +ffffffff81ac25a0 t intel_sdvo_pre_enable +ffffffff81ac2f20 t intel_enable_sdvo +ffffffff81ac30f0 t intel_sdvo_get_hw_state +ffffffff81ac31e0 t intel_sdvo_get_config +ffffffff81ac3600 t intel_sdvo_set_target_input +ffffffff81ac3670 t intel_sdvo_get_input_pixel_clock_range +ffffffff81ac3710 t intel_sdvo_ddc_proxy_xfer +ffffffff81ac37c0 t intel_sdvo_ddc_proxy_func +ffffffff81ac37f0 t __intel_sdvo_write_cmd +ffffffff81ac3ca0 t proxy_lock_bus +ffffffff81ac3cd0 t proxy_trylock_bus +ffffffff81ac3d00 t proxy_unlock_bus +ffffffff81ac3d30 t intel_sdvo_enc_destroy +ffffffff81ac3d40 t intel_sdvo_set_output_timings_from_mode +ffffffff81ac3e40 t intel_sdvo_get_preferred_input_mode +ffffffff81ac41d0 t intel_sdvo_get_dtd_from_mode +ffffffff81ac4350 t intel_sdvo_read_response +ffffffff81ac47f0 t intel_sdvo_get_value +ffffffff81ac4860 t intel_sdvo_write_sdvox +ffffffff81ac4a50 t intel_sdvo_write_infoframe +ffffffff81ac4c10 t intel_sdvo_read_infoframe +ffffffff81ac4e30 t intel_sdvo_hotplug +ffffffff81ac4e70 t intel_sdvo_connector_get_hw_state +ffffffff81ac4f00 t intel_sdvo_detect +ffffffff81ac51f0 t intel_sdvo_connector_register +ffffffff81ac5200 t intel_sdvo_connector_unregister +ffffffff81ac5210 t intel_sdvo_connector_duplicate_state +ffffffff81ac5290 t intel_sdvo_connector_atomic_set_property +ffffffff81ac5460 t intel_sdvo_connector_atomic_get_property +ffffffff81ac5680 t intel_sdvo_get_analog_edid +ffffffff81ac56b0 t intel_sdvo_connector_matches_edid +ffffffff81ac5740 t intel_sdvo_get_modes +ffffffff81ac59e0 t intel_sdvo_mode_valid +ffffffff81ac5af0 t intel_sdvo_atomic_check +ffffffff81ac5ba0 t intel_sdvo_create_enhance_property +ffffffff81ac7000 T intel_snps_phy_wait_for_calibration +ffffffff81ac70d0 T intel_snps_phy_update_psr_power_state +ffffffff81ac7190 T intel_snps_phy_set_signal_levels +ffffffff81ac73e0 T intel_mpllb_calc_state +ffffffff81ac7570 T intel_snps_phy_check_hdmi_link_rate +ffffffff81ac7610 T intel_mpllb_enable +ffffffff81ac7850 T intel_mpllb_disable +ffffffff81ac79c0 T intel_mpllb_calc_port_clock +ffffffff81ac7a90 T intel_mpllb_readout_hw_state +ffffffff81ac7c00 T intel_mpllb_state_verify +ffffffff81ac9000 T vlv_plane_min_cdclk +ffffffff81ac90f0 T ivb_plane_min_cdclk +ffffffff81ac91b0 T hsw_plane_min_cdclk +ffffffff81ac9250 T chv_plane_check_rotation +ffffffff81ac92c0 T intel_sprite_plane_create +ffffffff81ac9610 t vlv_sprite_update_noarm +ffffffff81ac9710 t vlv_sprite_update_arm +ffffffff81ac9db0 t vlv_sprite_disable_arm +ffffffff81ac9e40 t vlv_sprite_get_hw_state +ffffffff81ac9f10 t vlv_sprite_check +ffffffff81ac9fe0 t ivb_sprite_update_noarm +ffffffff81aca150 t ivb_sprite_update_arm +ffffffff81aca520 t ivb_sprite_disable_arm +ffffffff81aca5d0 t ivb_sprite_get_hw_state +ffffffff81aca690 t g4x_sprite_check +ffffffff81aca930 t hsw_sprite_max_stride +ffffffff81aca980 t g4x_sprite_max_stride +ffffffff81aca9f0 t ivb_sprite_min_cdclk +ffffffff81acab30 t g4x_sprite_update_noarm +ffffffff81acac90 t g4x_sprite_update_arm +ffffffff81acb0d0 t g4x_sprite_disable_arm +ffffffff81acb180 t g4x_sprite_get_hw_state +ffffffff81acb240 t g4x_sprite_min_cdclk +ffffffff81acb310 t vlv_sprite_ctl +ffffffff81acb500 t vlv_sprite_format_mod_supported +ffffffff81acb630 t ivb_sprite_ctl +ffffffff81acb860 t g4x_sprite_ctl +ffffffff81acba20 t snb_sprite_format_mod_supported +ffffffff81acbb10 t g4x_sprite_format_mod_supported +ffffffff81acc000 T intel_sprite_set_colorkey_ioctl +ffffffff81acd000 T intel_tc_port_in_tbt_alt_mode +ffffffff81acd070 T intel_tc_port_in_dp_alt_mode +ffffffff81acd0e0 T intel_tc_port_in_legacy_mode +ffffffff81acd150 T intel_tc_cold_requires_aux_pw +ffffffff81acd1c0 T intel_tc_port_get_lane_mask +ffffffff81acd2f0 T intel_tc_port_get_pin_assignment_mask +ffffffff81acd420 T intel_tc_port_fia_max_lane_count +ffffffff81acd600 T intel_tc_port_set_fia_lane_count +ffffffff81acd7d0 T intel_tc_port_init_mode +ffffffff81acda00 t intel_tc_port_update_mode +ffffffff81acddb0 T intel_tc_port_sanitize_mode +ffffffff81ace0e0 T intel_tc_port_connected_locked +ffffffff81ace240 T intel_tc_port_ref_held +ffffffff81ace2a0 T intel_tc_port_connected +ffffffff81ace310 T intel_tc_port_link_needs_reset +ffffffff81ace3c0 T intel_tc_port_link_reset +ffffffff81ace4c0 T intel_tc_port_link_cancel_reset_work +ffffffff81ace570 T intel_tc_port_lock +ffffffff81ace590 t __intel_tc_port_lock +ffffffff81ace6d0 T intel_tc_port_suspend +ffffffff81ace730 T intel_tc_port_unlock +ffffffff81ace7b0 T intel_tc_port_get_link +ffffffff81ace840 T intel_tc_port_put_link +ffffffff81ace8f0 T intel_tc_port_init +ffffffff81aceb30 t kasprintf +ffffffff81acec00 t intel_tc_port_disconnect_phy_work +ffffffff81acec50 t intel_tc_port_link_reset_work +ffffffff81acef50 T intel_tc_port_cleanup +ffffffff81acf010 t intel_tc_port_needs_reset +ffffffff81acf110 t tgl_tc_phy_cold_off_domain +ffffffff81acf140 t xelpdp_tc_phy_hpd_live_status +ffffffff81acf250 t adlp_tc_phy_is_ready +ffffffff81acf350 t xelpdp_tc_phy_is_owned +ffffffff81acf420 t xelpdp_tc_phy_get_hw_state +ffffffff81acf5a0 t xelpdp_tc_phy_connect +ffffffff81acf7f0 t xelpdp_tc_phy_disconnect +ffffffff81acf930 t adlp_tc_phy_init +ffffffff81acf9a0 t tc_phy_get_current_mode +ffffffff81acfcc0 t tc_phy_wait_for_ready +ffffffff81acfe30 t xelpdp_tc_phy_enable_tcss_power +ffffffff81ad0080 t tc_phy_verify_legacy_or_dp_alt_mode +ffffffff81ad0260 t xelpdp_tc_phy_wait_for_tcss_power +ffffffff81ad0470 t adlp_tc_phy_cold_off_domain +ffffffff81ad04d0 t adlp_tc_phy_hpd_live_status +ffffffff81ad05d0 t adlp_tc_phy_is_owned +ffffffff81ad0690 t adlp_tc_phy_get_hw_state +ffffffff81ad0720 t adlp_tc_phy_connect +ffffffff81ad0a10 t adlp_tc_phy_disconnect +ffffffff81ad0b70 t icl_tc_phy_hpd_live_status +ffffffff81ad0cd0 t icl_tc_phy_is_ready +ffffffff81ad0de0 t icl_tc_phy_is_owned +ffffffff81ad0ef0 t icl_tc_phy_get_hw_state +ffffffff81ad0f80 t icl_tc_phy_connect +ffffffff81ad10f0 t icl_tc_phy_disconnect +ffffffff81ad1170 t tgl_tc_phy_init +ffffffff81ad12a0 t icl_tc_phy_take_ownership +ffffffff81ad1410 t icl_tc_phy_cold_off_domain +ffffffff81ad1470 t icl_tc_phy_init +ffffffff81ad14d0 t __delayed_work_tick +ffffffff81ad2000 T intel_tv_init +ffffffff81ad23f0 t intel_tv_compute_config +ffffffff81ad28a0 t intel_tv_get_config +ffffffff81ad2d60 t intel_tv_pre_enable +ffffffff81ad3680 t intel_enable_tv +ffffffff81ad36e0 t intel_disable_tv +ffffffff81ad3740 t intel_tv_get_hw_state +ffffffff81ad37a0 t intel_tv_connector_duplicate_state +ffffffff81ad3820 t intel_tv_mode_to_mode +ffffffff81ad3970 t intel_tv_get_modes +ffffffff81ad3cb0 t intel_tv_detect +ffffffff81ad4140 t intel_tv_mode_valid +ffffffff81ad41f0 t intel_tv_atomic_check +ffffffff81ad5000 T i915_get_vblank_counter +ffffffff81ad51e0 T g4x_get_vblank_counter +ffffffff81ad5270 T intel_crtc_get_vblank_timestamp +ffffffff81ad5290 t i915_get_crtc_scanoutpos +ffffffff81ad5690 T intel_get_crtc_scanline +ffffffff81ad5700 t __intel_get_crtc_scanline +ffffffff81ad5950 T intel_wait_for_pipe_scanline_stopped +ffffffff81ad5960 t wait_for_pipe_scanline_moving +ffffffff81ad5bc0 T intel_wait_for_pipe_scanline_moving +ffffffff81ad5be0 T intel_crtc_update_active_timings +ffffffff81ad6000 T intel_dsc_source_support +ffffffff81ad6050 T intel_dsc_compute_params +ffffffff81ad6650 T intel_dsc_power_domain +ffffffff81ad6700 T intel_dsc_get_num_vdsc_instances +ffffffff81ad6750 T intel_dsc_dsi_pps_write +ffffffff81ad69f0 T intel_dsc_dp_pps_write +ffffffff81ad6ae0 T intel_uncompressed_joiner_enable +ffffffff81ad6c00 T intel_dsc_enable +ffffffff81ad8600 T intel_dsc_disable +ffffffff81ad8780 T intel_dsc_get_config +ffffffff81ad9000 T intel_vga_disable +ffffffff81ad9120 T intel_vga_redisable_power_on +ffffffff81ad91c0 T intel_vga_redisable +ffffffff81ad9280 T intel_vga_reset_io_mem +ffffffff81ad92e0 T intel_vga_register +ffffffff81ad9310 T intel_vga_unregister +ffffffff81ada000 T intel_vrr_is_capable +ffffffff81ada080 T intel_vrr_check_modeset +ffffffff81ada110 T intel_vrr_vmin_vblank_start +ffffffff81ada170 T intel_vrr_vmax_vblank_start +ffffffff81ada1d0 T intel_vrr_compute_config +ffffffff81ada350 T intel_vrr_set_transcoder_timings +ffffffff81ada530 T intel_vrr_send_push +ffffffff81ada5b0 T intel_vrr_is_push_sent +ffffffff81ada640 T intel_vrr_enable +ffffffff81ada760 T intel_vrr_disable +ffffffff81ada8a0 T intel_vrr_get_config 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i915_gem_driver_register +ffffffff81bb3550 T i915_gem_driver_unregister +ffffffff81bb3560 T i915_gem_driver_remove +ffffffff81bb35c0 T i915_gem_driver_release +ffffffff81bb36b0 T i915_gem_init_early +ffffffff81bb3730 T i915_gem_cleanup_early +ffffffff81bb37b0 T i915_gem_open +ffffffff81bb38c0 t i915_gem_gtt_prepare +ffffffff81bb4000 T i915_gem_evict_something +ffffffff81bb4440 t ungrab_vma +ffffffff81bb4570 t grab_vma +ffffffff81bb4690 T i915_gem_evict_for_node +ffffffff81bb48d0 T i915_gem_evict_vm +ffffffff81bb5000 T i915_gem_gtt_prepare_pages +ffffffff81bb5030 T i915_gem_gtt_finish_pages +ffffffff81bb5090 T i915_gem_gtt_reserve +ffffffff81bb5140 T i915_gem_gtt_insert +ffffffff81bb6000 T i915_gem_ww_ctx_init +ffffffff81bb6060 T i915_gem_ww_unlock_single +ffffffff81bb61a0 T i915_gem_ww_ctx_fini +ffffffff81bb6210 t i915_gem_ww_ctx_unlock_all +ffffffff81bb6370 T i915_gem_ww_ctx_backoff +ffffffff81bb7000 T i915_getparam_ioctl +ffffffff81bb8000 T intel_gpu_error_find_batch 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i915_memcpy_init_early +ffffffff81bbf000 T i915_mitigate_clear_residuals +ffffffff81bc0000 T i915_init +ffffffff81bc0220 t i915_check_nomodeset +ffffffff81bc0280 t i915_mock_selftests +ffffffff81bc02b0 t i915_pmu_init +ffffffff81bc02e0 t i915_pmu_exit +ffffffff81bc1000 T i915_params_dump +ffffffff81bc1670 T i915_params_copy +ffffffff81bc1870 T i915_params_free +ffffffff81bc2000 T i915_pci_register_driver +ffffffff81bc2030 T i915_pci_unregister_driver +ffffffff81bc3000 T i915_oa_config_release +ffffffff81bc3060 T i915_perf_get_oa_config +ffffffff81bc30c0 T i915_perf_oa_timestamp_frequency +ffffffff81bc3170 T i915_oa_init_reg_state +ffffffff81bc3260 T i915_perf_open_ioctl +ffffffff81bc3a80 T i915_perf_register +ffffffff81bc3ab0 T i915_perf_unregister +ffffffff81bc3b20 T i915_perf_add_config_ioctl +ffffffff81bc3b70 T i915_perf_remove_config_ioctl +ffffffff81bc3be0 T i915_perf_init +ffffffff81bc42c0 t gen7_is_valid_b_counter_addr +ffffffff81bc4310 t hsw_is_valid_mux_addr +ffffffff81bc4390 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gen12_oa_hw_tail_read +ffffffff81bc6080 T i915_perf_sysctl_register +ffffffff81bc60b0 T i915_perf_sysctl_unregister +ffffffff81bc60e0 T i915_perf_fini +ffffffff81bc6200 t destroy_config +ffffffff81bc6290 T i915_perf_ioctl_version +ffffffff81bc6390 t get_sseu_config +ffffffff81bc63e0 t emit_oa_config +ffffffff81bc6ab0 t i915_gem_object_lock +ffffffff81bc6cc0 t append_oa_status +ffffffff81bc6d40 t append_oa_sample +ffffffff81bc6ea0 t lrc_configure_all_contexts +ffffffff81bc7050 t oa_configure_all_contexts +ffffffff81bc7370 t gen8_modify_self +ffffffff81bc7540 t gen8_modify_context +ffffffff81bc76f0 t gen12_configure_oar_context +ffffffff81bc8000 T i915_query_ioctl +ffffffff81bc8100 t query_topology_info +ffffffff81bc8150 t query_engine_info +ffffffff81bc8390 t query_perf_config +ffffffff81bc8690 t query_memregion_info +ffffffff81bc8920 t query_hwconfig_blob +ffffffff81bc89a0 t query_geometry_subslices +ffffffff81bc8a30 t fill_topology_info +ffffffff81bc8bd0 t query_perf_config_data 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T add_taint_for_CI +ffffffff81bd7110 T cancel_timer +ffffffff81bd7160 T set_timer_ms +ffffffff81bd7210 T i915_vtd_active +ffffffff81bd8000 T intel_vgpu_detect +ffffffff81bd8030 T intel_vgpu_register +ffffffff81bd8090 T intel_vgpu_active +ffffffff81bd80c0 T intel_vgpu_has_full_ppgtt +ffffffff81bd8100 T intel_vgpu_has_hwsp_emulation +ffffffff81bd8140 T intel_vgpu_has_huge_gtt +ffffffff81bd8180 T intel_vgt_deballoon +ffffffff81bd83c0 T intel_vgt_balloon +ffffffff81bd9000 T i915_vma_instance +ffffffff81bd9110 t vma_create +ffffffff81bd95a0 T i915_vma_work +ffffffff81bd9610 T i915_vma_wait_for_bind +ffffffff81bd9690 T i915_vma_bind +ffffffff81bd99f0 T i915_vma_pin_iomap +ffffffff81bd9be0 T i915_vma_flush_writes +ffffffff81bd9c30 T i915_vma_unpin_iomap +ffffffff81bd9ca0 T i915_vma_unpin_and_release +ffffffff81bd9d10 T i915_vma_misplaced +ffffffff81bd9e00 T __i915_vma_set_map_and_fenceable +ffffffff81bd9e90 T i915_gem_valid_gtt_space +ffffffff81bd9f20 T vma_invalidate_tlb +ffffffff81bd9f90 T i915_vma_pin_ww +ffffffff81bda660 t i915_vma_insert +ffffffff81bdaa00 T i915_ggtt_pin +ffffffff81bdaae0 t __i915_ggtt_pin +ffffffff81bdac60 t i915_gem_object_lock +ffffffff81bdae70 T i915_ggtt_clear_scanout +ffffffff81bdaef0 T i915_vma_close +ffffffff81bdafc0 T i915_vma_reopen +ffffffff81bdb040 T i915_vma_destroy_locked +ffffffff81bdb130 t release_references +ffffffff81bdb270 T i915_vma_destroy +ffffffff81bdb3b0 T i915_vma_parked +ffffffff81bdb680 T i915_vma_revoke_mmap +ffffffff81bdb780 T _i915_vma_move_to_active +ffffffff81bdb9d0 T __i915_vma_evict +ffffffff81bdbd50 T __i915_vma_unbind +ffffffff81bdbdf0 T i915_vma_unbind +ffffffff81bdbf40 T i915_vma_unbind_async +ffffffff81bdc0b0 t __i915_vma_unbind_async +ffffffff81bdc170 T i915_vma_unbind_unlocked +ffffffff81bdc280 T i915_vma_make_unshrinkable +ffffffff81bdc2c0 T i915_vma_make_shrinkable +ffffffff81bdc2e0 T i915_vma_make_purgeable +ffffffff81bdc300 T i915_vma_module_exit +ffffffff81bdc320 T i915_vma_module_init +ffffffff81bdc380 t __i915_vma_active +ffffffff81bdc3d0 t __i915_vma_retire +ffffffff81bdc420 t __vma_bind +ffffffff81bdc4c0 t __vma_release +ffffffff81bdc540 t intel_rotate_pages +ffffffff81bdc8a0 t intel_remap_pages +ffffffff81bdccf0 t intel_partial_pages +ffffffff81bdd000 T i915_vma_resource_alloc +ffffffff81bdd050 T i915_vma_resource_free +ffffffff81bdd090 T i915_vma_resource_unhold +ffffffff81bdd0a0 t __i915_vma_resource_unhold +ffffffff81bdd190 T i915_vma_resource_hold +ffffffff81bdd1e0 T i915_vma_resource_unbind +ffffffff81bdd300 T __i915_vma_resource_init +ffffffff81bdd360 t i915_vma_resource_fence_notify +ffffffff81bdd420 T i915_vma_resource_bind_dep_sync +ffffffff81bdd5c0 T i915_vma_resource_bind_dep_sync_all +ffffffff81bdd660 T i915_vma_resource_bind_dep_await +ffffffff81bdd840 T i915_vma_resource_module_exit +ffffffff81bdd860 T i915_vma_resource_module_init +ffffffff81bdd8c0 t get_driver_name +ffffffff81bdd8f0 t get_timeline_name +ffffffff81bdd920 t unbind_fence_release +ffffffff81bdd960 t i915_vma_resource_unbind_work +ffffffff81bde000 T intel_clock_gating_init +ffffffff81bde020 T intel_clock_gating_hooks_init +ffffffff81bde280 t nop_init_clock_gating +ffffffff81bde2b0 t pvc_init_clock_gating +ffffffff81bde430 t dg2_init_clock_gating +ffffffff81bde560 t xehpsdv_init_clock_gating +ffffffff81bde640 t adlp_init_clock_gating +ffffffff81bde740 t gen12lp_init_clock_gating +ffffffff81bde800 t icl_init_clock_gating +ffffffff81bde880 t cfl_init_clock_gating +ffffffff81bde9a0 t gen9_init_clock_gating +ffffffff81bdeab0 t skl_init_clock_gating +ffffffff81bdebf0 t kbl_init_clock_gating +ffffffff81bdee00 t bxt_init_clock_gating +ffffffff81bdef60 t glk_init_clock_gating +ffffffff81bdefc0 t bdw_init_clock_gating +ffffffff81bdf3f0 t chv_init_clock_gating +ffffffff81bdf580 t hsw_init_clock_gating +ffffffff81bdf840 t ivb_init_clock_gating +ffffffff81bdfa50 t g4x_disable_trickle_feed +ffffffff81bdfba0 t cpt_init_clock_gating +ffffffff81bdfee0 t vlv_init_clock_gating +ffffffff81bdfff0 t gen6_init_clock_gating +ffffffff81be01f0 t ilk_init_clock_gating +ffffffff81be03d0 t g4x_init_clock_gating +ffffffff81be0490 t i965gm_init_clock_gating +ffffffff81be0560 t i965g_init_clock_gating +ffffffff81be05e0 t gen3_init_clock_gating +ffffffff81be06e0 t i85x_init_clock_gating +ffffffff81be0780 t i830_init_clock_gating +ffffffff81be1000 T intel_platform_name +ffffffff81be1090 T intel_device_info_print +ffffffff81be1a20 T intel_device_info_runtime_init_early +ffffffff81be1ef0 T intel_device_info_runtime_init +ffffffff81be1fb0 T intel_device_info_driver_create +ffffffff81be20c0 T intel_driver_caps_print +ffffffff81be3000 T intel_memory_region_lookup +ffffffff81be30e0 T intel_memory_region_by_type +ffffffff81be31a0 T intel_memory_region_reserve +ffffffff81be31c0 T intel_memory_region_debug +ffffffff81be3220 T intel_memory_region_create +ffffffff81be3390 T intel_memory_region_set_name +ffffffff81be3410 T intel_memory_region_avail +ffffffff81be3490 T intel_memory_region_destroy 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fwtable_read8 +ffffffff81bee5d0 t fwtable_read16 +ffffffff81bee890 t fwtable_read32 +ffffffff81beeb40 t fwtable_read64 +ffffffff81beedf0 t fwtable_reg_read_fw_domains +ffffffff81beeee0 t fwtable_write8 +ffffffff81bef210 t fwtable_write16 +ffffffff81bef540 t fwtable_write32 +ffffffff81bef870 t fwtable_reg_write_fw_domains +ffffffff81befa10 t gen6_write8 +ffffffff81befbd0 t gen6_write16 +ffffffff81befd90 t gen6_write32 +ffffffff81beff50 t gen6_reg_write_fw_domains +ffffffff81beff80 t i915_pmic_bus_access_notifier +ffffffff81bf0000 t __fw_domain_init +ffffffff81bf0190 t fw_domains_get_with_thread_status +ffffffff81bf0380 t fw_domains_get_with_fallback +ffffffff81bf0600 t fw_domain_wait_ack_with_fallback +ffffffff81bf0890 t fw_domain_wait_ack_clear +ffffffff81bf0a70 t fw_domain_wait_ack_set +ffffffff81bf0c00 t fw_domains_get_normal +ffffffff81bf0cf0 t ___force_wake_auto +ffffffff81bf0d80 t __gen6_gt_wait_for_fifo +ffffffff81bf1000 T __intel_wakeref_get_first +ffffffff81bf10b0 T __intel_wakeref_put_last +ffffffff81bf1110 t ____intel_wakeref_put_last +ffffffff81bf11e0 T __intel_wakeref_init +ffffffff81bf1260 t __intel_wakeref_put_work +ffffffff81bf12d0 T intel_wakeref_wait_for_idle +ffffffff81bf1400 T intel_wakeref_auto_init +ffffffff81bf1480 t wakeref_auto_timeout +ffffffff81bf1530 T intel_wakeref_auto +ffffffff81bf1740 T intel_wakeref_auto_fini +ffffffff81bf1800 t __delayed_work_tick +ffffffff81bf2000 T intel_pxp_is_supported +ffffffff81bf2030 T intel_pxp_is_enabled +ffffffff81bf2060 T intel_pxp_is_active +ffffffff81bf2090 T intel_pxp_init +ffffffff81bf20c0 T intel_pxp_fini +ffffffff81bf2160 T intel_pxp_mark_termination_in_progress +ffffffff81bf21a0 T intel_pxp_get_backend_timeout_ms +ffffffff81bf21e0 T intel_pxp_end +ffffffff81bf2210 T intel_pxp_fini_hw +ffffffff81bf2250 T intel_pxp_get_readiness_status +ffffffff81bf2280 T intel_pxp_start +ffffffff81bf22b0 T intel_pxp_init_hw +ffffffff81bf22f0 T intel_pxp_key_check +ffffffff81bf2320 T intel_pxp_invalidate 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atom_execute_table_scratch_unlocked +ffffffff81bfb0a0 t atom_execute_table_locked +ffffffff81bfb3b0 T atom_execute_table +ffffffff81bfb460 T atom_parse +ffffffff81bfb610 T atom_destroy +ffffffff81bfb650 T atom_asic_init +ffffffff81bfb860 t get_u32 +ffffffff81bfb8c0 T atom_parse_data_header +ffffffff81bfb960 T atom_parse_cmd_header +ffffffff81bfb9e0 T atom_allocate_fb_scratch +ffffffff81bfbab0 t atom_op_move +ffffffff81bfbc80 t atom_op_and +ffffffff81bfbe60 t atom_op_or +ffffffff81bfc040 t atom_op_shift_left +ffffffff81bfc220 t atom_op_shift_right +ffffffff81bfc400 t atom_op_mul +ffffffff81bfc550 t atom_op_div +ffffffff81bfc6c0 t atom_op_add +ffffffff81bfc8a0 t atom_op_sub +ffffffff81bfca80 t atom_op_setport +ffffffff81bfcc00 t atom_op_setregblock +ffffffff81bfccc0 t atom_op_setfbbase +ffffffff81bfcd80 t atom_op_compare +ffffffff81bfcf60 t atom_op_switch +ffffffff81bfd190 t atom_op_jump +ffffffff81bfd400 t atom_op_test +ffffffff81bfd5c0 t atom_op_delay +ffffffff81bfd6a0 t atom_op_calltable +ffffffff81bfd7f0 t atom_op_repeat +ffffffff81bfd820 t atom_op_clear +ffffffff81bfd930 t atom_op_nop +ffffffff81bfd960 t atom_op_eot +ffffffff81bfd990 t atom_op_mask +ffffffff81bfdc40 t atom_op_postcard +ffffffff81bfdcf0 t atom_op_beep +ffffffff81bfdd10 t atom_op_savereg +ffffffff81bfdd40 t atom_op_restorereg +ffffffff81bfdd70 t atom_op_setdatablock +ffffffff81bfdeb0 t atom_op_xor +ffffffff81bfe090 t atom_op_shl +ffffffff81bfe2b0 t atom_op_shr +ffffffff81bfe4d0 t atom_op_debug +ffffffff81bfe500 t atom_put_dst +ffffffff81bfea10 t atom_get_src_int +ffffffff81bff090 t atom_iio_execute +ffffffff81c00000 T atombios_crtc_dpms +ffffffff81c00300 T atombios_crtc_set_base +ffffffff81c00350 t dce4_crtc_do_set_base +ffffffff81c00e90 t avivo_crtc_do_set_base +ffffffff81c01730 T atombios_crtc_set_base_atomic +ffffffff81c01780 T radeon_atom_disp_eng_pll_init +ffffffff81c01860 t atombios_crtc_set_disp_eng_pll +ffffffff81c01970 t atombios_crtc_program_ss +ffffffff81c01c00 T atombios_crtc_mode_set +ffffffff81c02690 T radeon_atombios_init_crtc +ffffffff81c02780 t radeon_bo_reserve +ffffffff81c028f0 t radeon_bo_unreserve +ffffffff81c029d0 t atombios_disable_ss +ffffffff81c02ab0 t atombios_crtc_program_pll +ffffffff81c02d60 t atombios_crtc_prepare +ffffffff81c02e20 t atombios_crtc_commit +ffffffff81c02ea0 t atombios_crtc_mode_fixup +ffffffff81c03bb0 t atombios_crtc_disable +ffffffff81c03e10 t radeon_get_shared_dp_ppll +ffffffff81c03f00 t radeon_get_shared_nondp_ppll +ffffffff81c05000 T radeon_atom_copy_swap +ffffffff81c05020 T radeon_dp_aux_init +ffffffff81c05110 t radeon_dp_aux_transfer_atom +ffffffff81c052e0 T radeon_dp_getsinktype +ffffffff81c05350 T radeon_dp_getdpcd +ffffffff81c054c0 T radeon_dp_get_panel_mode +ffffffff81c055d0 T radeon_dp_set_link_config +ffffffff81c05650 t radeon_dp_get_dp_link_config +ffffffff81c057e0 T radeon_dp_mode_valid_helper +ffffffff81c05890 T radeon_dp_needs_link_train +ffffffff81c05900 T radeon_dp_set_rx_power_state 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radeon_process_i2c_ch +ffffffff81c0c310 T radeon_atom_hw_i2c_func +ffffffff81c0d000 T btc_get_max_clock_from_voltage_dependency_table +ffffffff81c0d0d0 T btc_apply_voltage_dependency_rules +ffffffff81c0d140 T btc_skip_blacklist_clocks +ffffffff81c0d230 T btc_adjust_clock_combinations +ffffffff81c0d360 T btc_apply_voltage_delta_rules +ffffffff81c0d480 T btc_program_mgcg_hw_sequence +ffffffff81c0d580 T btc_dpm_enabled +ffffffff81c0d590 T btc_notify_uvd_to_smc +ffffffff81c0d600 T btc_reset_to_default +ffffffff81c0d650 T btc_read_arb_registers +ffffffff81c0d6e0 T btc_dpm_vblank_too_short +ffffffff81c0d750 T btc_dpm_pre_set_power_state +ffffffff81c0e970 T btc_dpm_set_power_state +ffffffff81c0eca0 t btc_set_power_state_conditionally_enable_ulv +ffffffff81c0edd0 T btc_dpm_post_set_power_state +ffffffff81c0eef0 t btc_update_current_ps +ffffffff81c0eff0 T btc_dpm_enable +ffffffff81c0fed0 t btc_cg_clock_gating_enable +ffffffff81c10000 t btc_mg_clock_gating_enable +ffffffff81c10120 t btc_ls_clock_gating_enable +ffffffff81c10250 t btc_init_stutter_mode +ffffffff81c102d0 T btc_dpm_disable +ffffffff81c105b0 T btc_dpm_setup_asic +ffffffff81c10690 T btc_dpm_init +ffffffff81c10a80 T btc_dpm_fini +ffffffff81c10b30 T btc_dpm_debugfs_print_current_performance_level +ffffffff81c10b80 T btc_dpm_get_current_sclk +ffffffff81c10c00 T btc_dpm_get_current_mclk +ffffffff81c10c80 T btc_dpm_get_sclk +ffffffff81c10cd0 T btc_dpm_get_mclk +ffffffff81c11000 T ci_dpm_powergate_uvd +ffffffff81c11380 T ci_dpm_vblank_too_short +ffffffff81c11410 T ci_fan_ctrl_get_fan_speed_percent +ffffffff81c114b0 T ci_fan_ctrl_set_fan_speed_percent +ffffffff81c11580 T ci_fan_ctrl_set_mode +ffffffff81c11720 t ci_fan_ctrl_set_static_mode +ffffffff81c117e0 t ci_thermal_start_smc_fan_control +ffffffff81c11a20 T ci_fan_ctrl_get_mode +ffffffff81c11a80 T ci_dpm_force_performance_level +ffffffff81c12310 t ci_upload_dpm_level_enable_mask +ffffffff81c12640 T ci_dpm_pre_set_power_state +ffffffff81c12930 T ci_dpm_post_set_power_state +ffffffff81c12a00 T ci_dpm_setup_asic +ffffffff81c12c00 T ci_dpm_enable +ffffffff81c144d0 t ci_init_smc_table +ffffffff81c153c0 t ci_init_arb_table_index +ffffffff81c15450 t ci_populate_initial_mc_reg_table +ffffffff81c15690 t ci_populate_pm_base +ffffffff81c15a00 t ci_dpm_start_smc +ffffffff81c15a80 t ci_enable_vr_hot_gpio_interrupt +ffffffff81c15b20 t ci_notify_smc_display_change +ffffffff81c15bf0 t ci_enable_sclk_control +ffffffff81c15c20 t ci_enable_ulv +ffffffff81c15d70 t ci_enable_ds_master_switch +ffffffff81c15f60 t ci_start_dpm +ffffffff81c16150 t ci_enable_didt +ffffffff81c16400 t ci_enable_smc_cac +ffffffff81c16590 t ci_enable_power_containment +ffffffff81c16a10 t ci_power_control_set_level +ffffffff81c16b20 t ci_enable_auto_throttle_source +ffffffff81c16c00 t ci_enable_thermal_based_sclk_dpm +ffffffff81c16d50 t ci_thermal_start_thermal_controller +ffffffff81c17050 T ci_dpm_late_enable +ffffffff81c170f0 T ci_dpm_disable +ffffffff81c177e0 T ci_dpm_set_power_state +ffffffff81c18450 t ci_update_sclk_t +ffffffff81c184c0 t ci_update_and_upload_mc_reg_table +ffffffff81c18670 t ci_unfreeze_sclk_mclk_dpm +ffffffff81c18820 t ci_notify_link_speed_change_after_state_change +ffffffff81c18950 T ci_dpm_display_configuration_changed +ffffffff81c18ae0 T ci_dpm_fini +ffffffff81c18b90 T ci_dpm_init +ffffffff81c199f0 t ci_initialize_powertune_defaults +ffffffff81c19ae0 t ci_get_leakage_voltages +ffffffff81c19c90 t ci_patch_dependency_tables_with_leakage +ffffffff81c1a300 t ci_set_private_data_variables_based_on_pptable +ffffffff81c1a410 T ci_dpm_debugfs_print_current_performance_level +ffffffff81c1a550 T ci_dpm_print_power_state +ffffffff81c1a610 T ci_dpm_get_current_sclk +ffffffff81c1a6e0 T ci_dpm_get_current_mclk +ffffffff81c1a7b0 T ci_dpm_get_sclk +ffffffff81c1a800 T ci_dpm_get_mclk +ffffffff81c1a850 t ci_set_valid_flag +ffffffff81c1a8f0 t ci_populate_all_graphic_levels +ffffffff81c1ae80 t ci_populate_all_memory_levels +ffffffff81c1b780 t ci_populate_smc_vce_level +ffffffff81c1b8a0 t ci_populate_smc_acp_level +ffffffff81c1b9a0 t ci_populate_smc_samu_level +ffffffff81c1baa0 t ci_do_program_memory_timing_parameters +ffffffff81c1bcc0 t ci_populate_smc_uvd_level +ffffffff81c1be10 t ci_populate_smc_initial_state +ffffffff81c1beb0 t ci_populate_bapm_parameters_in_dpm_table +ffffffff81c1c040 t ci_populate_smc_voltage_table +ffffffff81c1c160 t ci_min_max_v_gnbl_pm_lid_from_bapm_vddc +ffffffff81c1c3c0 t ci_enable_sclk_mclk_dpm +ffffffff81c1c730 t ci_thermal_enable_alert +ffffffff81c1c8e0 t ci_enable_vce_dpm +ffffffff81c1d000 T ci_copy_bytes_to_smc +ffffffff81c1d240 T ci_start_smc +ffffffff81c1d280 T ci_reset_smc +ffffffff81c1d2c0 T ci_program_jump_on_start +ffffffff81c1d2f0 T ci_stop_smc_clock +ffffffff81c1d330 T ci_start_smc_clock +ffffffff81c1d370 T ci_is_smc_running +ffffffff81c1d3e0 T ci_load_smc_ucode +ffffffff81c1d570 T ci_read_smc_sram_dword +ffffffff81c1d640 T ci_write_smc_sram_dword +ffffffff81c1e000 T cik_get_allowed_info_register +ffffffff81c1e0a0 T cik_didt_rreg +ffffffff81c1e140 T cik_didt_wreg +ffffffff81c1e1c0 T ci_get_temp +ffffffff81c1e210 T kv_get_temp +ffffffff81c1e260 T cik_pciep_rreg +ffffffff81c1e2e0 T cik_pciep_wreg +ffffffff81c1e350 T cik_get_xclk +ffffffff81c1e3c0 T cik_mm_rdoorbell +ffffffff81c1e420 T cik_mm_wdoorbell +ffffffff81c1e470 T ci_mc_load_microcode +ffffffff81c1e7b0 T cik_ring_test +ffffffff81c1ea50 T cik_fence_gfx_ring_emit +ffffffff81c1ee40 T cik_fence_compute_ring_emit +ffffffff81c1f0c0 T cik_semaphore_ring_emit +ffffffff81c1f280 T cik_copy_cpdma +ffffffff81c1f6d0 T cik_ring_ib_execute +ffffffff81c1fc70 T cik_ib_test +ffffffff81c1ff50 T cik_gfx_get_rptr +ffffffff81c1ffb0 T cik_gfx_get_wptr +ffffffff81c1fff0 T cik_gfx_set_wptr +ffffffff81c20030 T cik_compute_get_rptr +ffffffff81c20110 T cik_compute_get_wptr +ffffffff81c201f0 T cik_compute_set_wptr +ffffffff81c20270 T cik_gpu_check_soft_reset +ffffffff81c203e0 T cik_asic_reset +ffffffff81c207f0 t cik_gpu_pci_config_reset +ffffffff81c21000 T cik_gfx_is_lockup +ffffffff81c21070 T cik_pcie_gart_tlb_flush +ffffffff81c210c0 T cik_ib_parse +ffffffff81c210f0 T cik_vm_init +ffffffff81c21150 T cik_vm_fini +ffffffff81c21180 T cik_vm_flush +ffffffff81c21df0 T cik_enter_rlc_safe_mode +ffffffff81c21ee0 T cik_exit_rlc_safe_mode +ffffffff81c21f20 T cik_update_cg +ffffffff81c22420 t cik_enable_mgcg +ffffffff81c22940 t cik_enable_cgcg +ffffffff81c22cb0 T cik_init_cp_pg_table +ffffffff81c22f20 T cik_get_csb_size +ffffffff81c22fb0 T cik_get_csb_buffer +ffffffff81c23140 T cik_irq_set +ffffffff81c23ec0 t cik_disable_interrupt_state +ffffffff81c24380 T cik_irq_process +ffffffff81c25b50 t cik_irq_ack +ffffffff81c264d0 T cik_resume +ffffffff81c26560 t cik_init_golden_registers +ffffffff81c26720 t cik_startup +ffffffff81c294f0 T cik_suspend +ffffffff81c298e0 T cik_init +ffffffff81c29e00 t cik_init_microcode +ffffffff81c2ab50 t cik_uvd_init +ffffffff81c2ac00 t cik_vce_init +ffffffff81c2acd0 t cik_cp_fini +ffffffff81c2ad50 t cik_irq_fini +ffffffff81c2ae60 t cik_mec_fini +ffffffff81c2af10 t cik_pcie_gart_fini +ffffffff81c2b010 T cik_fini +ffffffff81c2b330 T dce8_program_fmt +ffffffff81c2b460 T dce8_bandwidth_update +ffffffff81c2c070 T cik_get_gpu_clock_counter +ffffffff81c2c130 T cik_set_uvd_clocks +ffffffff81c2c1b0 t cik_set_uvd_clock +ffffffff81c2c320 T cik_set_vce_clocks +ffffffff81c2c560 t cik_wait_for_rlc_serdes +ffffffff81c2c720 t cik_mec_init +ffffffff81c2c900 t cik_uvd_start +ffffffff81c2c9e0 t cik_vce_start +ffffffff81c2caf0 t cik_irq_init +ffffffff81c2d670 t cik_cp_resume +ffffffff81c2ee10 t cik_uvd_resume +ffffffff81c2eee0 t cik_vce_resume +ffffffff81c2efd0 t pcie_capability_set_word +ffffffff81c2f0e0 t pcie_capability_read_word +ffffffff81c2f180 t pcie_capability_clear_and_set_word +ffffffff81c2f2a0 t pcie_capability_write_word +ffffffff81c2f360 t cik_get_cu_active_bitmap +ffffffff81c2f4e0 t radeon_bo_reserve +ffffffff81c2f650 t radeon_bo_unreserve +ffffffff81c2f730 t cik_update_gfx_pg +ffffffff81c2f8d0 t cik_compute_stop +ffffffff81c2fa40 t cik_cp_compute_fini +ffffffff81c2fbe0 t request_firmware +ffffffff81c2fc70 t release_firmware +ffffffff81c2fcb0 t dce8_latency_watermark +ffffffff81c30000 T cik_sdma_get_rptr +ffffffff81c30070 T cik_sdma_get_wptr +ffffffff81c300c0 T cik_sdma_set_wptr +ffffffff81c30110 T cik_sdma_ring_ib_execute +ffffffff81c30510 T cik_sdma_fence_ring_emit +ffffffff81c306e0 t cik_sdma_hdp_flush_ring_emit +ffffffff81c30910 T cik_sdma_semaphore_ring_emit +ffffffff81c30a30 T cik_sdma_enable +ffffffff81c30c10 T cik_sdma_resume +ffffffff81c310f0 T cik_sdma_fini +ffffffff81c31130 T cik_copy_dma +ffffffff81c31530 T cik_sdma_ring_test +ffffffff81c317e0 T cik_sdma_ib_test +ffffffff81c31a40 T cik_sdma_is_lockup +ffffffff81c31ac0 T cik_sdma_vm_copy_pages +ffffffff81c31bd0 T cik_sdma_vm_write_pages +ffffffff81c31d40 T cik_sdma_vm_set_pages +ffffffff81c31ec0 T cik_sdma_vm_pad_ib +ffffffff81c31f10 T cik_dma_vm_flush +ffffffff81c33000 T cypress_enable_spread_spectrum +ffffffff81c33140 T cypress_start_dpm +ffffffff81c33190 T cypress_enable_sclk_control +ffffffff81c331f0 T cypress_enable_mclk_control +ffffffff81c33250 T cypress_notify_smc_display_change +ffffffff81c332a0 T cypress_program_response_times +ffffffff81c33360 T cypress_advertise_gen2_capability +ffffffff81c33430 T cypress_notify_link_speed_change_after_state_change +ffffffff81c334f0 T cypress_notify_link_speed_change_before_state_change +ffffffff81c335b0 T cypress_get_strobe_mode_settings +ffffffff81c336b0 T cypress_get_mclk_frequency_ratio +ffffffff81c33760 T cypress_map_clkf_to_ibias +ffffffff81c33820 T cypress_convert_power_level_to_smc +ffffffff81c33bf0 t cypress_populate_mclk_value +ffffffff81c34000 T cypress_upload_sw_state +ffffffff81c34180 T cypress_upload_mc_reg_table +ffffffff81c34240 t cypress_convert_mc_reg_table_to_smc +ffffffff81c344d0 T cypress_calculate_burst_time +ffffffff81c34560 T cypress_program_memory_timing_parameters +ffffffff81c34700 T cypress_populate_smc_initial_state +ffffffff81c34ab0 T cypress_populate_smc_acpi_state +ffffffff81c34e30 T cypress_construct_voltage_tables +ffffffff81c34fc0 T cypress_populate_smc_voltage_tables +ffffffff81c350f0 T cypress_get_mvdd_configuration +ffffffff81c351c0 T cypress_populate_mc_reg_table +ffffffff81c35410 T cypress_get_table_locations +ffffffff81c354f0 T cypress_enable_display_gap +ffffffff81c35550 T cypress_dpm_setup_asic +ffffffff81c35640 T cypress_dpm_enable +ffffffff81c36110 t cypress_force_mc_use_s1 +ffffffff81c36390 t cypress_gfx_clock_gating_enable +ffffffff81c366a0 t cypress_mg_clock_gating_enable +ffffffff81c36920 T cypress_dpm_disable +ffffffff81c36b50 T cypress_dpm_set_power_state +ffffffff81c36d90 T cypress_dpm_display_configuration_changed +ffffffff81c36e70 T cypress_dpm_init +ffffffff81c370e0 T cypress_dpm_fini +ffffffff81c37170 T cypress_dpm_vblank_too_short +ffffffff81c371e0 t cypress_wait_for_mc_sequencer +ffffffff81c38000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81c38070 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81c380e0 T dce3_2_afmt_write_sad_regs +ffffffff81c381e0 T dce3_2_audio_set_dto +ffffffff81c38320 T dce3_2_hdmi_update_acr +ffffffff81c38680 T dce3_2_set_audio_packet +ffffffff81c38810 T dce3_2_set_mute +ffffffff81c39000 T dce6_endpoint_rreg +ffffffff81c390e0 T dce6_endpoint_wreg +ffffffff81c391d0 T dce6_audio_get_pin +ffffffff81c39360 T dce6_afmt_select_pin +ffffffff81c393f0 T dce6_afmt_write_latency_fields +ffffffff81c394b0 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81c39580 T dce6_afmt_dp_write_speaker_allocation +ffffffff81c39650 T dce6_afmt_write_sad_regs +ffffffff81c39790 T dce6_audio_enable +ffffffff81c397e0 T dce6_hdmi_audio_set_dto +ffffffff81c39850 T dce6_dp_audio_set_dto +ffffffff81c3a000 T eg_cg_rreg +ffffffff81c3a080 T eg_cg_wreg +ffffffff81c3a0f0 T eg_pif_phy0_rreg +ffffffff81c3a170 T eg_pif_phy0_wreg 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evergreen_get_number_of_dram_channels +ffffffff81c3be10 T evergreen_bandwidth_update +ffffffff81c3bfd0 t evergreen_line_buffer_adjust +ffffffff81c3c1c0 t evergreen_program_watermarks +ffffffff81c3cc20 T evergreen_mc_wait_for_idle +ffffffff81c3ccc0 T evergreen_pcie_gart_tlb_flush +ffffffff81c3cd90 T evergreen_mc_stop +ffffffff81c3d890 T evergreen_mc_resume +ffffffff81c3dfa0 T evergreen_mc_program +ffffffff81c3e3a0 T evergreen_ring_ib_execute +ffffffff81c3e830 T evergreen_mc_init +ffffffff81c3e970 T evergreen_print_gpu_status_regs +ffffffff81c3e9a0 T evergreen_is_display_hung +ffffffff81c3eba0 T evergreen_gpu_check_soft_reset +ffffffff81c3ed00 T evergreen_gpu_pci_config_reset +ffffffff81c3ee80 T evergreen_asic_reset +ffffffff81c3f1a0 T evergreen_gfx_is_lockup +ffffffff81c3f210 T sumo_rlc_fini +ffffffff81c3f3c0 t radeon_bo_reserve +ffffffff81c3f530 t radeon_bo_unreserve +ffffffff81c3f610 T sumo_rlc_init +ffffffff81c3fde0 T evergreen_rlc_resume +ffffffff81c40150 T evergreen_get_vblank_counter +ffffffff81c401c0 T evergreen_disable_interrupt_state +ffffffff81c40490 T evergreen_irq_set +ffffffff81c40a50 T evergreen_irq_suspend +ffffffff81c40aa0 T evergreen_irq_process +ffffffff81c415f0 t evergreen_irq_ack +ffffffff81c41cb0 T evergreen_resume +ffffffff81c41d90 t evergreen_init_golden_registers +ffffffff81c41fa0 t evergreen_startup +ffffffff81c43830 T evergreen_suspend +ffffffff81c439d0 T evergreen_init +ffffffff81c43dd0 t evergreen_pcie_gart_fini +ffffffff81c43ef0 T evergreen_fini +ffffffff81c440e0 T evergreen_pcie_gen2_enable +ffffffff81c44310 T evergreen_program_aspm +ffffffff81c449a0 t evergreen_latency_watermark +ffffffff81c44ba0 t evergreen_uvd_start +ffffffff81c44c50 t evergreen_cp_load_microcode +ffffffff81c44db0 t evergreen_cp_resume +ffffffff81c45a20 t evergreen_uvd_resume +ffffffff81c46000 T evergreen_cs_parse +ffffffff81c48760 T evergreen_dma_cs_parse +ffffffff81c498d0 T evergreen_ib_parse +ffffffff81c49d30 T evergreen_dma_ib_parse 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+ffffffff81c4fa20 T dce4_set_audio_packet +ffffffff81c4fc30 T dce4_set_mute +ffffffff81c4fd40 T evergreen_hdmi_enable +ffffffff81c50070 T evergreen_dp_enable +ffffffff81c51000 T kv_dpm_enable_bapm +ffffffff81c51070 T kv_dpm_enable +ffffffff81c51f70 t kv_populate_vce_table +ffffffff81c521f0 t kv_populate_samu_table +ffffffff81c52450 t kv_populate_acp_table +ffffffff81c525e0 t kv_start_am +ffffffff81c52620 t kv_enable_auto_thermal_throttling +ffffffff81c52660 t kv_enable_dpm_voltage_scaling +ffffffff81c526a0 t kv_set_dpm_interval +ffffffff81c526e0 t kv_start_dpm +ffffffff81c52720 t kv_enable_didt +ffffffff81c529d0 T kv_dpm_late_enable +ffffffff81c52bd0 T kv_dpm_powergate_uvd +ffffffff81c52d50 T kv_dpm_disable +ffffffff81c530c0 T kv_dpm_force_performance_level +ffffffff81c53240 t kv_force_dpm_lowest +ffffffff81c53310 T kv_dpm_pre_set_power_state +ffffffff81c53890 T kv_dpm_set_power_state +ffffffff81c54060 t kv_set_valid_clock_range +ffffffff81c54200 t kv_calculate_ds_divider +ffffffff81c54370 t kv_calculate_nbps_level_settings +ffffffff81c544f0 t kv_update_vce_dpm +ffffffff81c546d0 T kv_dpm_post_set_power_state +ffffffff81c54770 T kv_dpm_setup_asic +ffffffff81c547d0 T kv_dpm_init +ffffffff81c55080 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c550f0 T kv_dpm_get_current_sclk +ffffffff81c55160 T kv_dpm_get_current_mclk +ffffffff81c55190 T kv_dpm_print_power_state +ffffffff81c55230 T kv_dpm_fini +ffffffff81c552d0 T kv_dpm_display_configuration_changed +ffffffff81c55300 T kv_dpm_get_sclk +ffffffff81c55350 T kv_dpm_get_mclk +ffffffff81c56000 T kv_notify_message_to_smu +ffffffff81c560c0 T kv_dpm_get_enable_mask +ffffffff81c56190 T kv_send_msg_to_smc_with_parameter +ffffffff81c56260 T kv_read_smc_sram_dword +ffffffff81c562f0 T kv_smc_dpm_enable +ffffffff81c56420 T kv_smc_bapm_enable +ffffffff81c56550 T kv_copy_bytes_to_smc +ffffffff81c57000 T tn_smc_rreg +ffffffff81c57080 T tn_smc_wreg +ffffffff81c570f0 T ni_mc_load_microcode +ffffffff81c572e0 T ni_init_microcode +ffffffff81c577b0 t request_firmware +ffffffff81c57840 t release_firmware +ffffffff81c57880 T cayman_get_allowed_info_register +ffffffff81c57910 T tn_get_temp +ffffffff81c579a0 T cayman_pcie_gart_tlb_flush +ffffffff81c579f0 T cayman_cp_int_cntl_setup +ffffffff81c57a40 T cayman_fence_ring_emit +ffffffff81c57dd0 T cayman_ring_ib_execute +ffffffff81c58230 T cayman_gfx_get_rptr +ffffffff81c582c0 T cayman_gfx_get_wptr +ffffffff81c58330 T cayman_gfx_set_wptr +ffffffff81c583b0 T cayman_gpu_check_soft_reset +ffffffff81c58540 T cayman_asic_reset +ffffffff81c58840 T cayman_gfx_is_lockup +ffffffff81c588b0 T cayman_resume +ffffffff81c58940 t ni_init_golden_registers +ffffffff81c58a20 t cayman_startup +ffffffff81c59e60 T cayman_suspend +ffffffff81c5a050 T cayman_init +ffffffff81c5a3c0 t cayman_uvd_init +ffffffff81c5a470 t cayman_vce_init +ffffffff81c5a540 t cayman_cp_fini +ffffffff81c5a5c0 t cayman_pcie_gart_fini +ffffffff81c5a700 T cayman_fini +ffffffff81c5a980 T cayman_vm_init +ffffffff81c5a9e0 T cayman_vm_fini +ffffffff81c5aa10 T cayman_vm_decode_fault +ffffffff81c5aaa0 T cayman_vm_flush +ffffffff81c5af00 T tn_set_vce_clocks +ffffffff81c5b160 t cayman_uvd_start +ffffffff81c5b210 t cayman_vce_start +ffffffff81c5b320 t cayman_cp_load_microcode +ffffffff81c5b4b0 t cayman_cp_resume +ffffffff81c5c370 t cayman_uvd_resume +ffffffff81c5c440 t cayman_vce_resume +ffffffff81c5d000 T cayman_dma_get_rptr +ffffffff81c5d070 T cayman_dma_get_wptr +ffffffff81c5d0c0 T cayman_dma_set_wptr +ffffffff81c5d110 T cayman_dma_ring_ib_execute +ffffffff81c5d4a0 T cayman_dma_stop +ffffffff81c5d550 T cayman_dma_resume +ffffffff81c5d7b0 T cayman_dma_fini +ffffffff81c5d870 T cayman_dma_is_lockup +ffffffff81c5d8f0 T cayman_dma_vm_copy_pages +ffffffff81c5d9f0 T cayman_dma_vm_write_pages +ffffffff81c5db50 T cayman_dma_vm_set_pages +ffffffff81c5dcc0 T cayman_dma_vm_pad_ib +ffffffff81c5dd10 T cayman_dma_vm_flush +ffffffff81c5f000 T ni_get_pi +ffffffff81c5f030 T ni_get_ps +ffffffff81c5f060 T ni_dpm_vblank_too_short +ffffffff81c5f0d0 T ni_dpm_force_performance_level +ffffffff81c5f220 T ni_copy_and_switch_arb_sets +ffffffff81c5f4f0 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c5f570 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c5f5f0 T ni_dpm_setup_asic +ffffffff81c5f800 T ni_update_current_ps +ffffffff81c5f8c0 T ni_update_requested_ps +ffffffff81c5f980 T ni_dpm_enable +ffffffff81c607e0 t ni_init_smc_table +ffffffff81c61190 t ni_init_smc_spll_table +ffffffff81c61300 t ni_init_arb_table_index +ffffffff81c613a0 t ni_populate_mc_reg_table +ffffffff81c616e0 t ni_initialize_smc_cac_tables +ffffffff81c62960 t ni_initialize_hardware_cac_manager +ffffffff81c62e90 t ni_populate_smc_tdp_limits +ffffffff81c63040 t ni_program_response_times +ffffffff81c63150 T ni_dpm_disable +ffffffff81c63510 t ni_enable_power_containment +ffffffff81c635d0 t ni_enable_smc_cac +ffffffff81c636f0 T ni_dpm_pre_set_power_state +ffffffff81c63cd0 T ni_dpm_set_power_state +ffffffff81c63fc0 t ni_upload_sw_state +ffffffff81c64bb0 t ni_upload_mc_reg_table +ffffffff81c64d60 t ni_power_control_set_level +ffffffff81c64e30 T ni_dpm_post_set_power_state +ffffffff81c64f00 T ni_dpm_init +ffffffff81c658a0 T ni_dpm_fini +ffffffff81c65950 T ni_dpm_print_power_state +ffffffff81c65a20 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c65a60 T ni_dpm_get_current_sclk +ffffffff81c65ad0 T ni_dpm_get_current_mclk +ffffffff81c65b40 T ni_dpm_get_sclk +ffffffff81c65ba0 T ni_dpm_get_mclk +ffffffff81c65c00 t ni_do_program_memory_timing_parameters +ffffffff81c65d40 t ni_calculate_sclk_params +ffffffff81c65f70 t ni_calculate_power_boost_limit +ffffffff81c66130 t ni_populate_mclk_value +ffffffff81c67000 T r100_wait_for_vblank +ffffffff81c67190 T r100_page_flip +ffffffff81c67450 T r100_page_flip_pending +ffffffff81c67500 T r100_pm_get_dynpm_state +ffffffff81c67720 T r100_pm_init_profile +ffffffff81c67800 T r100_pm_misc +ffffffff81c67c40 T r100_pm_prepare +ffffffff81c67cf0 T r100_pm_finish +ffffffff81c67da0 T r100_gui_idle +ffffffff81c67de0 T r100_hpd_sense +ffffffff81c67e40 T r100_hpd_set_polarity +ffffffff81c67f00 T r100_hpd_init +ffffffff81c67fa0 T r100_hpd_fini +ffffffff81c68010 T r100_pci_gart_tlb_flush +ffffffff81c68040 T r100_pci_gart_init +ffffffff81c68110 T r100_pci_gart_get_page_entry +ffffffff81c68140 T r100_pci_gart_set_page +ffffffff81c68180 T r100_pci_gart_enable +ffffffff81c68270 T r100_pci_gart_disable +ffffffff81c682f0 T r100_pci_gart_fini +ffffffff81c68370 T r100_irq_set +ffffffff81c68450 T r100_irq_disable +ffffffff81c684c0 T r100_irq_process +ffffffff81c687c0 T r100_get_vblank_counter +ffffffff81c68810 T r100_fence_ring_emit +ffffffff81c68c70 T r100_semaphore_ring_emit +ffffffff81c68ca0 T r100_copy_blit +ffffffff81c69330 T r100_ring_start +ffffffff81c69420 T r100_gfx_get_rptr +ffffffff81c69480 T r100_gfx_get_wptr +ffffffff81c694c0 T r100_gfx_set_wptr +ffffffff81c69500 T r100_cp_init +ffffffff81c69a30 T r100_debugfs_cp_init +ffffffff81c69a60 T r100_cp_fini +ffffffff81c69b00 T r100_cp_disable +ffffffff81c69c40 T r100_gui_wait_for_idle +ffffffff81c69d30 T r100_reloc_pitch_offset +ffffffff81c69e70 T r100_packet3_load_vbpntr +ffffffff81c6a110 T r100_cs_parse_packet0 +ffffffff81c6a220 T r100_cs_packet_parse_vline +ffffffff81c6a430 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c6a4b0 T r100_cs_parse +ffffffff81c6b6a0 T r100_cs_track_clear +ffffffff81c6ba30 T r100_cs_track_check +ffffffff81c6c240 T r100_mc_wait_for_idle +ffffffff81c6c2e0 T r100_gpu_is_lockup +ffffffff81c6c340 T r100_enable_bm +ffffffff81c6c390 T r100_bm_disable +ffffffff81c6c440 T r100_asic_reset +ffffffff81c6c770 T r100_mc_stop +ffffffff81c6c930 T r100_mc_resume +ffffffff81c6c9f0 T r100_set_common_regs +ffffffff81c6cb90 T r100_vram_init_sizes +ffffffff81c6cd80 T r100_vga_set_state +ffffffff81c6cde0 T r100_pll_errata_after_index +ffffffff81c6ce20 T r100_pll_rreg +ffffffff81c6cf50 T r100_pll_wreg +ffffffff81c6d060 T r100_debugfs_rbbm_init +ffffffff81c6d090 T r100_debugfs_mc_info_init +ffffffff81c6d0c0 T r100_set_surface_reg +ffffffff81c6d2d0 T r100_clear_surface_reg +ffffffff81c6d380 T r100_bandwidth_update +ffffffff81c6ddd0 T r100_ring_test +ffffffff81c6e080 T r100_ring_ib_execute +ffffffff81c6e2e0 T r100_ib_test +ffffffff81c6e620 T r100_vga_render_disable +ffffffff81c6e680 T r100_resume +ffffffff81c6e870 t r100_startup +ffffffff81c6edb0 T r100_suspend +ffffffff81c6ee90 T r100_fini +ffffffff81c6efa0 T r100_restore_sanity +ffffffff81c6f040 T r100_init +ffffffff81c6f490 t r100_set_safe_registers +ffffffff81c6f510 T r100_mm_rreg_slow +ffffffff81c6f590 T r100_mm_wreg_slow +ffffffff81c6f5f0 T r100_io_rreg +ffffffff81c6f690 T r100_io_wreg +ffffffff81c6f700 t r100_get_vtx_size +ffffffff81c6f7f0 t r100_cs_track_texture_print +ffffffff81c70000 T r200_copy_dma +ffffffff81c70470 T r200_packet0_check +ffffffff81c71240 t r200_get_vtx_size_0 +ffffffff81c71400 t r200_get_vtx_size_1 +ffffffff81c71490 T r200_set_safe_registers +ffffffff81c72000 T rv370_pcie_rreg +ffffffff81c72080 T rv370_pcie_wreg +ffffffff81c720f0 T rv370_pcie_gart_tlb_flush +ffffffff81c722f0 T rv370_pcie_gart_get_page_entry +ffffffff81c72350 T rv370_pcie_gart_set_page +ffffffff81c72390 T rv370_pcie_gart_init +ffffffff81c72460 T rv370_pcie_gart_enable +ffffffff81c727c0 T rv370_pcie_gart_disable +ffffffff81c72940 T rv370_pcie_gart_fini +ffffffff81c72970 T r300_fence_ring_emit +ffffffff81c72ee0 T r300_ring_start +ffffffff81c73850 T r300_mc_wait_for_idle +ffffffff81c738f0 T r300_asic_reset +ffffffff81c73b10 T r300_mc_init +ffffffff81c73bc0 T rv370_set_pcie_lanes +ffffffff81c73d80 T rv370_get_pcie_lanes +ffffffff81c73e30 T r300_cs_parse +ffffffff81c741a0 t r300_packet0_check +ffffffff81c75060 T r300_set_reg_safe +ffffffff81c750a0 T r300_mc_program +ffffffff81c75230 T r300_clock_startup +ffffffff81c752c0 T r300_resume +ffffffff81c75490 t r300_startup +ffffffff81c757f0 T r300_suspend +ffffffff81c75870 T r300_fini +ffffffff81c75950 T r300_init +ffffffff81c76000 T r420_pm_init_profile +ffffffff81c760f0 T r420_pipes_init +ffffffff81c762d0 T r420_mc_rreg +ffffffff81c76350 T r420_mc_wreg +ffffffff81c763c0 T r420_resume +ffffffff81c76590 t r420_startup +ffffffff81c76790 T r420_suspend +ffffffff81c76930 T r420_fini +ffffffff81c76a10 T r420_init +ffffffff81c76c90 T r420_debugfs_pipes_info_init +ffffffff81c76cc0 t r420_cp_errata_init +ffffffff81c77000 T r520_mc_wait_for_idle +ffffffff81c770a0 T r520_resume +ffffffff81c77190 t r520_startup +ffffffff81c77580 T r520_init +ffffffff81c78000 T r600_rcu_rreg +ffffffff81c78080 T r600_rcu_wreg +ffffffff81c780f0 T r600_uvd_ctx_rreg +ffffffff81c78170 T r600_uvd_ctx_wreg +ffffffff81c781e0 T r600_get_allowed_info_register +ffffffff81c78260 T r600_get_xclk +ffffffff81c78290 T r600_set_uvd_clocks +ffffffff81c787f0 T dce3_program_fmt +ffffffff81c78910 T rv6xx_get_temp +ffffffff81c78960 T r600_pm_get_dynpm_state +ffffffff81c78d70 T rs780_pm_init_profile +ffffffff81c78e80 T r600_pm_init_profile +ffffffff81c79120 T r600_pm_misc +ffffffff81c79200 T r600_gui_idle +ffffffff81c79240 T r600_hpd_sense +ffffffff81c79360 T r600_hpd_set_polarity +ffffffff81c795e0 T r600_hpd_init +ffffffff81c797c0 T r600_hpd_fini +ffffffff81c79970 T r600_pcie_gart_tlb_flush +ffffffff81c79aa0 T r600_pcie_gart_init +ffffffff81c79b40 T r600_mc_wait_for_idle +ffffffff81c79be0 T rs780_mc_rreg +ffffffff81c79c80 T rs780_mc_wreg +ffffffff81c79d10 T r600_vram_scratch_init +ffffffff81c79e10 t radeon_bo_reserve +ffffffff81c79f80 t radeon_bo_unreserve +ffffffff81c7a060 T r600_vram_scratch_fini +ffffffff81c7a0e0 T r600_set_bios_scratch_engine_hung +ffffffff81c7a130 T r600_gpu_check_soft_reset +ffffffff81c7a4d0 T r600_asic_reset +ffffffff81c7a860 t r600_gpu_pci_config_reset +ffffffff81c7aa70 T r600_gfx_is_lockup +ffffffff81c7aae0 T r6xx_remap_render_backend +ffffffff81c7aca0 T r600_count_pipe_bits +ffffffff81c7ad10 T r600_pciep_rreg +ffffffff81c7ad90 T r600_pciep_wreg +ffffffff81c7ae00 T r600_cp_stop +ffffffff81c7ae80 T r600_init_microcode +ffffffff81c7b340 t request_firmware +ffffffff81c7b3d0 t release_firmware +ffffffff81c7b410 T r600_gfx_get_rptr +ffffffff81c7b470 T r600_gfx_get_wptr +ffffffff81c7b4b0 T r600_gfx_set_wptr +ffffffff81c7b4f0 T r600_cp_start +ffffffff81c7b860 T r600_cp_resume +ffffffff81c7bbc0 T r600_ring_init +ffffffff81c7bc60 T r600_cp_fini +ffffffff81c7bcf0 T r600_scratch_init +ffffffff81c7bd60 T r600_ring_test +ffffffff81c7c000 T r600_fence_ring_emit +ffffffff81c7c8a0 T r600_semaphore_ring_emit +ffffffff81c7ca80 T r600_copy_cpdma +ffffffff81c7d030 T r600_set_surface_reg +ffffffff81c7d060 T r600_clear_surface_reg +ffffffff81c7d090 T r600_vga_set_state +ffffffff81c7d0f0 T r600_resume +ffffffff81c7d180 t r600_startup +ffffffff81c7ee60 T r600_suspend +ffffffff81c7efd0 T r600_irq_suspend +ffffffff81c7f090 t r600_pcie_gart_disable +ffffffff81c7f290 T r600_init +ffffffff81c7f9f0 T r600_ih_ring_init +ffffffff81c7fa60 T r600_irq_fini +ffffffff81c7fba0 t r600_pcie_gart_fini +ffffffff81c7fbd0 T r600_fini +ffffffff81c7fd60 T r600_ring_ib_execute +ffffffff81c801f0 T r600_ib_test +ffffffff81c804a0 T r600_ih_ring_alloc +ffffffff81c805c0 T r600_ih_ring_fini +ffffffff81c80650 T r600_rlc_stop +ffffffff81c807e0 T r600_disable_interrupts +ffffffff81c80890 T r600_irq_init +ffffffff81c80cf0 t r600_disable_interrupt_state +ffffffff81c80ff0 T r600_irq_disable +ffffffff81c810b0 T r600_irq_set +ffffffff81c81830 t r600_irq_ack +ffffffff81c81d60 T r600_irq_process +ffffffff81c82960 T r600_mmio_hdp_flush +ffffffff81c829e0 T r600_set_pcie_lanes +ffffffff81c82b10 T r600_get_pcie_lanes +ffffffff81c82be0 T r600_get_gpu_clock_counter +ffffffff81c82c70 t r600_cp_load_microcode +ffffffff81c82f40 t r600_uvd_resume +ffffffff81c84000 T r600_fmt_is_valid_color +ffffffff81c84040 T r600_fmt_is_valid_texture +ffffffff81c84090 T r600_fmt_get_blocksize +ffffffff81c840d0 T r600_fmt_get_nblocksx +ffffffff81c84120 T r600_fmt_get_nblocksy +ffffffff81c84180 T r600_cs_common_vline_parse +ffffffff81c84440 T r600_mip_minify +ffffffff81c844a0 T r600_cs_parse +ffffffff81c86360 T r600_dma_cs_next_reloc +ffffffff81c863e0 T r600_dma_cs_parse +ffffffff81c86a80 t r600_cs_track_check +ffffffff81c87bc0 t r600_cs_check_reg +ffffffff81c88ae0 t r600_is_safe_reg +ffffffff81c88b80 t r600_texture_size +ffffffff81c89000 T r600_dma_get_rptr +ffffffff81c89060 T r600_dma_get_wptr +ffffffff81c890a0 T r600_dma_set_wptr +ffffffff81c890e0 T r600_dma_stop +ffffffff81c89170 T r600_dma_resume +ffffffff81c89370 T r600_dma_fini +ffffffff81c893f0 T r600_dma_is_lockup +ffffffff81c89460 T r600_dma_ring_test +ffffffff81c896d0 T r600_dma_fence_ring_emit +ffffffff81c898b0 T r600_dma_semaphore_ring_emit +ffffffff81c899d0 T r600_dma_ib_test +ffffffff81c89bf0 T r600_dma_ring_ib_execute +ffffffff81c89f40 T r600_copy_dma +ffffffff81c8b000 T r600_dpm_print_class_info +ffffffff81c8b2b0 T r600_dpm_print_cap_info +ffffffff81c8b340 T r600_dpm_print_ps_status +ffffffff81c8b3d0 T r600_dpm_get_vblank_time +ffffffff81c8b490 T r600_dpm_get_vrefresh +ffffffff81c8b520 T r600_calculate_u_and_p +ffffffff81c8b5a0 T r600_calculate_at +ffffffff81c8b650 T r600_gfx_clockgating_enable +ffffffff81c8b750 T r600_dynamicpm_enable +ffffffff81c8b7a0 T r600_enable_thermal_protection +ffffffff81c8b800 T r600_enable_acpi_pm +ffffffff81c8b850 T r600_enable_dynamic_pcie_gen2 +ffffffff81c8b8a0 T r600_dynamicpm_enabled +ffffffff81c8b8e0 T r600_enable_sclk_control +ffffffff81c8b940 T r600_enable_mclk_control +ffffffff81c8b9a0 T r600_enable_spll_bypass +ffffffff81c8b9f0 T r600_wait_for_spll_change +ffffffff81c8ba70 T r600_set_bsp +ffffffff81c8bab0 T r600_set_at +ffffffff81c8bb10 T r600_set_tc +ffffffff81c8bb70 T r600_select_td +ffffffff81c8bc20 T r600_set_vrc +ffffffff81c8bc60 T r600_set_tpu +ffffffff81c8bcc0 T r600_set_tpc +ffffffff81c8bd20 T r600_set_sstu +ffffffff81c8bd80 T r600_set_sst +ffffffff81c8bdd0 T r600_set_git +ffffffff81c8be20 T r600_set_fctu +ffffffff81c8be80 T r600_set_fct +ffffffff81c8bed0 T r600_set_ctxcgtt3d_rphc +ffffffff81c8bf30 T r600_set_ctxcgtt3d_rsdc +ffffffff81c8bf90 T r600_set_vddc3d_oorsu +ffffffff81c8bff0 T r600_set_vddc3d_oorphc +ffffffff81c8c050 T r600_set_vddc3d_oorsdc +ffffffff81c8c0b0 T r600_set_mpll_lock_time +ffffffff81c8c100 T r600_set_mpll_reset_time +ffffffff81c8c150 T r600_engine_clock_entry_enable +ffffffff81c8c250 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c8c350 T r600_engine_clock_entry_enable_post_divider +ffffffff81c8c450 T r600_engine_clock_entry_set_post_divider +ffffffff81c8c510 T r600_engine_clock_entry_set_reference_divider +ffffffff81c8c5d0 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c8c690 T r600_engine_clock_entry_set_step_time +ffffffff81c8c750 T r600_vid_rt_set_ssu +ffffffff81c8c7b0 T r600_vid_rt_set_vru +ffffffff81c8c810 T r600_vid_rt_set_vrt +ffffffff81c8c870 T r600_voltage_control_enable_pins +ffffffff81c8c8c0 T r600_voltage_control_program_voltages +ffffffff81c8c950 T r600_voltage_control_deactivate_static_control +ffffffff81c8c9e0 T r600_power_level_enable +ffffffff81c8ca50 T r600_power_level_set_voltage_index +ffffffff81c8cac0 T r600_power_level_set_mem_clock_index +ffffffff81c8cb20 T r600_power_level_set_eng_clock_index +ffffffff81c8cb90 T r600_power_level_set_watermark_id +ffffffff81c8cc00 T r600_power_level_set_pcie_gen2 +ffffffff81c8cc60 T r600_power_level_get_current_index +ffffffff81c8cca0 T r600_power_level_get_target_index +ffffffff81c8cce0 T r600_power_level_set_enter_index +ffffffff81c8cd40 T r600_wait_for_power_level_unequal +ffffffff81c8ce30 T r600_wait_for_power_level +ffffffff81c8cf20 T r600_start_dpm +ffffffff81c8d200 T r600_stop_dpm +ffffffff81c8d250 T r600_dpm_pre_set_power_state +ffffffff81c8d280 T r600_dpm_post_set_power_state +ffffffff81c8d2b0 T r600_is_uvd_state +ffffffff81c8d2f0 T r600_is_internal_thermal_sensor +ffffffff81c8d330 T r600_dpm_late_enable +ffffffff81c8d440 T r600_get_platform_caps +ffffffff81c8d4e0 T r600_parse_extended_power_table +ffffffff81c8e2a0 T r600_free_extended_power_table +ffffffff81c8e3a0 T r600_get_pcie_gen_support +ffffffff81c8e3f0 T r600_get_pcie_lane_support +ffffffff81c8e450 T r600_encode_pci_lane_width +ffffffff81c8f000 T r600_audio_update_hdmi +ffffffff81c8f170 t r600_audio_status +ffffffff81c8f290 T r600_hdmi_buffer_status_changed +ffffffff81c8f330 T r600_hdmi_update_audio_settings +ffffffff81c8f700 T r600_audio_enable +ffffffff81c8f780 T r600_audio_get_pin +ffffffff81c8f7b0 T r600_hdmi_update_acr +ffffffff81c8fb50 T r600_set_avi_packet +ffffffff81c8fd50 T r600_hdmi_audio_workaround +ffffffff81c8fe20 T r600_hdmi_audio_set_dto +ffffffff81c8fee0 T r600_set_vbi_packet +ffffffff81c8ffa0 T r600_set_audio_packet +ffffffff81c90270 T r600_set_mute +ffffffff81c90380 T r600_hdmi_enable +ffffffff81c91000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c91040 T radeon_acpi_pcie_notify_device_ready +ffffffff81c91160 T radeon_acpi_pcie_performance_request +ffffffff81c914f0 T radeon_acpi_init +ffffffff81c91c60 t radeon_acpi_event +ffffffff81c91f60 T radeon_acpi_fini +ffffffff81c92000 T radeon_agp_head_init +ffffffff81c92050 T radeon_agp_init +ffffffff81c920a0 T radeon_agp_resume +ffffffff81c92130 T radeon_agp_fini +ffffffff81c92180 T radeon_agp_suspend +ffffffff81c93000 T radeon_agp_disable +ffffffff81c93120 T radeon_asic_init +ffffffff81c938f0 t radeon_invalid_rreg +ffffffff81c93930 t radeon_invalid_wreg +ffffffff81c93970 t radeon_invalid_get_allowed_info_register +ffffffff81c94000 T radeon_atombios_i2c_init +ffffffff81c943a0 T radeon_atombios_lookup_gpio +ffffffff81c944a0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c94de0 t radeon_lookup_i2c_gpio +ffffffff81c950d0 t radeon_atom_apply_quirks +ffffffff81c954f0 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81c959f0 T radeon_atom_get_clock_info +ffffffff81c95dd0 T radeon_atombios_sideport_present +ffffffff81c95e80 T radeon_atombios_get_tmds_info +ffffffff81c95fc0 T radeon_atombios_get_ppll_ss_info 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radeon_atom_set_voltage +ffffffff81c985d0 T radeon_atom_get_max_vddc +ffffffff81c986b0 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81c98780 T radeon_atom_get_leakage_id_from_vbios +ffffffff81c98840 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81c98a60 T radeon_atom_get_voltage_evv +ffffffff81c98b20 T radeon_atom_get_voltage_gpio_settings +ffffffff81c98c20 T radeon_atom_is_voltage_gpio +ffffffff81c98db0 T radeon_atom_get_svi2_info +ffffffff81c98ea0 T radeon_atom_get_max_voltage +ffffffff81c99030 T radeon_atom_get_min_voltage +ffffffff81c99170 T radeon_atom_get_voltage_step +ffffffff81c99270 T radeon_atom_round_to_true_voltage +ffffffff81c993d0 T radeon_atom_get_voltage_table +ffffffff81c99640 T radeon_atom_get_memory_info +ffffffff81c997f0 T radeon_atom_get_mclk_range_table +ffffffff81c99a30 T radeon_atom_init_mc_reg_table +ffffffff81c99ca0 T radeon_atom_initialize_bios_scratch_regs +ffffffff81c99d70 T radeon_save_bios_scratch_regs +ffffffff81c99e50 T radeon_restore_bios_scratch_regs +ffffffff81c99f30 T radeon_atom_output_lock +ffffffff81c99fc0 T radeon_atombios_connected_scratch_regs +ffffffff81c9a730 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81c9a880 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81c9aab0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81c9ac90 t radeon_atombios_add_pplib_thermal_controller +ffffffff81c9b090 t radeon_atombios_parse_pplib_clock_info +ffffffff81c9b440 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81c9c000 T radeon_audio_init +ffffffff81c9c1f0 t radeon_audio_enable +ffffffff81c9c350 T radeon_audio_endpoint_rreg +ffffffff81c9c390 T radeon_audio_endpoint_wreg +ffffffff81c9c3d0 T radeon_audio_get_pin +ffffffff81c9c420 T radeon_audio_detect +ffffffff81c9c580 T radeon_audio_fini +ffffffff81c9c610 T radeon_audio_mode_set +ffffffff81c9c660 T radeon_audio_dpms +ffffffff81c9c6b0 T radeon_audio_decode_dfs_div +ffffffff81c9c710 T radeon_audio_component_init +ffffffff81c9c780 T radeon_audio_component_fini +ffffffff81c9c7d0 t radeon_audio_hdmi_mode_set +ffffffff81c9ceb0 t radeon_audio_write_speaker_allocation +ffffffff81c9cf60 t radeon_audio_write_sad_regs +ffffffff81c9d030 t radeon_audio_set_avi_packet +ffffffff81c9d170 t radeon_audio_dp_mode_set +ffffffff81c9d2f0 t radeon_audio_rreg +ffffffff81c9d340 t radeon_audio_wreg +ffffffff81c9e000 T radeon_benchmark +ffffffff81c9e940 t radeon_benchmark_move +ffffffff81c9ec20 t radeon_bo_reserve +ffffffff81c9ed90 t radeon_bo_unreserve +ffffffff81c9ee70 t radeon_benchmark_do_move +ffffffff81c9f000 T radeon_get_bios +ffffffff81c9ffc0 t igp_read_bios_from_vram +ffffffff81ca00d0 t radeon_read_bios +ffffffff81ca1000 T radeon_legacy_get_engine_clock +ffffffff81ca10d0 T radeon_legacy_get_memory_clock +ffffffff81ca11a0 T radeon_get_clock_info +ffffffff81ca1730 T radeon_legacy_set_engine_clock +ffffffff81ca1a80 T radeon_legacy_set_clock_gating +ffffffff81ca3000 T radeon_combios_check_hardcoded_edid +ffffffff81ca3100 t combios_get_table_offset +ffffffff81ca3690 T radeon_bios_get_hardcoded_edid +ffffffff81ca3710 T radeon_combios_i2c_init +ffffffff81ca3db0 t combios_setup_i2c_bus +ffffffff81ca40a0 t radeon_combios_get_i2c_info_from_table +ffffffff81ca42f0 T radeon_combios_get_clock_info +ffffffff81ca44e0 T radeon_combios_sideport_present +ffffffff81ca4560 T radeon_combios_get_primary_dac_info +ffffffff81ca46b0 T radeon_combios_get_tv_info +ffffffff81ca47b0 T radeon_combios_get_tv_dac_info +ffffffff81ca4a40 T radeon_combios_get_lvds_info +ffffffff81ca50b0 T radeon_legacy_get_tmds_info_from_table +ffffffff81ca5180 T radeon_legacy_get_tmds_info_from_combios +ffffffff81ca5390 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81ca55c0 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81ca5900 T radeon_get_legacy_connector_info_from_table +ffffffff81ca7a70 T radeon_get_legacy_connector_info_from_bios +ffffffff81ca8660 T radeon_combios_get_power_modes +ffffffff81ca8d30 T radeon_external_tmds_setup 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+ffffffff81cb0490 T radeon_cs_ioctl +ffffffff81cb0c70 t radeon_cs_parser_fini +ffffffff81cb0df0 t radeon_cs_ib_vm_chunk +ffffffff81cb1130 T radeon_cs_packet_parse +ffffffff81cb12e0 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81cb1340 T radeon_cs_dump_packet +ffffffff81cb13c0 T radeon_cs_packet_next_reloc +ffffffff81cb15a0 t cmp_size_smaller_first +ffffffff81cb2000 T radeon_crtc_cursor_move +ffffffff81cb2070 t radeon_lock_cursor +ffffffff81cb2230 t radeon_cursor_move_locked +ffffffff81cb2770 T radeon_crtc_cursor_set2 +ffffffff81cb2a00 t radeon_hide_cursor +ffffffff81cb2ac0 t radeon_bo_reserve +ffffffff81cb2c30 t radeon_bo_unreserve +ffffffff81cb2d10 t radeon_show_cursor +ffffffff81cb2f60 T radeon_cursor_reset +ffffffff81cb3000 T radeon_is_px +ffffffff81cb3040 T radeon_program_register_sequence +ffffffff81cb3170 T radeon_pci_config_reset +ffffffff81cb31a0 T radeon_surface_init +ffffffff81cb3360 T radeon_scratch_init +ffffffff81cb33e0 T radeon_scratch_get +ffffffff81cb3460 T radeon_scratch_free +ffffffff81cb34c0 T radeon_doorbell_get +ffffffff81cb3570 T radeon_doorbell_free +ffffffff81cb35c0 T radeon_wb_disable +ffffffff81cb35f0 T radeon_wb_fini +ffffffff81cb3690 t radeon_bo_reserve +ffffffff81cb3800 t radeon_bo_unreserve +ffffffff81cb38e0 T radeon_wb_init +ffffffff81cb3bc0 T radeon_vram_location +ffffffff81cb3ce0 T radeon_gtt_location +ffffffff81cb3e10 T radeon_device_is_virtual +ffffffff81cb3e40 T radeon_card_posted +ffffffff81cb4050 T radeon_update_bandwidth_info +ffffffff81cb40d0 T radeon_boot_test_post_card +ffffffff81cb4190 T radeon_dummy_page_init +ffffffff81cb4250 T radeon_dummy_page_fini +ffffffff81cb42b0 T radeon_atombios_init +ffffffff81cb4440 t cail_reg_read +ffffffff81cb44a0 t cail_reg_write +ffffffff81cb4500 t cail_ioreg_read +ffffffff81cb4520 t cail_ioreg_write +ffffffff81cb4540 t cail_mc_read +ffffffff81cb4570 t cail_mc_write +ffffffff81cb45a0 t cail_pll_read +ffffffff81cb45d0 t cail_pll_write +ffffffff81cb4600 T radeon_atombios_fini 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radeon_encoder_set_active_device +ffffffff81cbe440 T radeon_get_connector_for_encoder +ffffffff81cbe4b0 T radeon_get_connector_for_encoder_init +ffffffff81cbe520 T radeon_get_external_encoder +ffffffff81cbe5b0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81cbe650 T radeon_panel_mode_fixup +ffffffff81cbe820 T radeon_dig_monitor_is_duallink +ffffffff81cbe940 T radeon_encoder_is_digital +ffffffff81cbf000 T radeon_fbdev_setup +ffffffff81cbf150 T radeon_fbdev_set_suspend +ffffffff81cbf1a0 T radeon_fbdev_robj_is_fb +ffffffff81cbf210 T radeondrm_burner +ffffffff81cbf290 T radeondrm_burner_cb +ffffffff81cbf2c0 t radeon_fbdev_fb_helper_fb_probe +ffffffff81cbf800 t radeon_bo_reserve +ffffffff81cbf970 t radeon_bo_unreserve +ffffffff81cbfa50 t radeon_fbdev_client_unregister +ffffffff81cbfab0 t radeon_fbdev_client_restore +ffffffff81cbfaf0 t radeon_fbdev_client_hotplug +ffffffff81cc0000 T radeon_fence_emit +ffffffff81cc0120 T radeon_fence_process +ffffffff81cc01e0 t radeon_fence_activity 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T radeon_ib_get +ffffffff81cc9100 T radeon_ib_free +ffffffff81cc9140 T radeon_ib_schedule +ffffffff81cc93d0 T radeon_ib_pool_init +ffffffff81cc9470 T radeon_ib_pool_fini +ffffffff81cc94e0 T radeon_ib_ring_tests +ffffffff81cca000 T radeon_driver_irq_handler_kms +ffffffff81cca050 T radeon_msi_ok +ffffffff81cca150 T radeon_irq_kms_init +ffffffff81cca3e0 t radeon_hotplug_work_func +ffffffff81cca490 t radeon_dp_work_func +ffffffff81cca500 T radeon_irq_kms_fini +ffffffff81cca6a0 T radeon_irq_kms_sw_irq_get +ffffffff81cca740 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81cca780 T radeon_irq_kms_sw_irq_put +ffffffff81cca810 T radeon_irq_kms_pflip_irq_get +ffffffff81cca8c0 T radeon_irq_kms_pflip_irq_put +ffffffff81cca960 T radeon_irq_kms_enable_afmt +ffffffff81cca9f0 T radeon_irq_kms_disable_afmt +ffffffff81ccaa80 T radeon_irq_kms_enable_hpd +ffffffff81ccab70 T radeon_irq_kms_disable_hpd +ffffffff81ccac50 T radeon_irq_kms_set_irq_n_enabled +ffffffff81ccadc0 t __delayed_work_tick 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radeon_legacy_primary_dac_detect +ffffffff81cd1900 t radeon_legacy_tv_dac_dpms +ffffffff81cd1b10 t radeon_legacy_tv_dac_prepare +ffffffff81cd1b70 t radeon_legacy_tv_dac_commit +ffffffff81cd1bc0 t radeon_legacy_tv_dac_mode_set +ffffffff81cd1f60 t radeon_legacy_tv_dac_detect +ffffffff81cd2b60 t radeon_ext_tmds_enc_destroy +ffffffff81cd2bb0 t radeon_legacy_tmds_ext_dpms +ffffffff81cd2c80 t radeon_legacy_tmds_ext_prepare +ffffffff81cd2d50 t radeon_legacy_tmds_ext_commit +ffffffff81cd2e20 t radeon_legacy_tmds_ext_mode_set +ffffffff81cd3000 T radeon_legacy_tv_mode_set +ffffffff81cd40f0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81cd4200 T radeon_legacy_tv_adjust_pll1 +ffffffff81cd4300 T radeon_legacy_tv_adjust_pll2 +ffffffff81cd5000 T radeon_ttm_bo_is_radeon_bo +ffffffff81cd5040 t radeon_ttm_bo_destroy +ffffffff81cd5170 T radeon_ttm_placement_from_domain +ffffffff81cd52d0 T radeon_bo_create +ffffffff81cd54a0 T radeon_bo_kmap +ffffffff81cd5590 T radeon_bo_check_tiling +ffffffff81cd5670 T radeon_bo_kunmap +ffffffff81cd5700 T radeon_bo_ref +ffffffff81cd5740 T radeon_bo_unref +ffffffff81cd5790 T radeon_bo_pin_restricted +ffffffff81cd5ab0 T radeon_bo_pin +ffffffff81cd5ad0 T radeon_bo_unpin +ffffffff81cd5b40 T radeon_bo_evict_vram +ffffffff81cd5ba0 T radeon_bo_force_delete +ffffffff81cd5d00 T radeon_bo_init +ffffffff81cd5de0 T radeon_bo_fini +ffffffff81cd5e20 T radeon_bo_list_validate +ffffffff81cd6130 T radeon_bo_get_surface_reg +ffffffff81cd63b0 T radeon_bo_set_tiling_flags +ffffffff81cd66b0 T radeon_bo_get_tiling_flags +ffffffff81cd6700 T radeon_bo_move_notify +ffffffff81cd67d0 T radeon_bo_fault_reserve_notify +ffffffff81cd6a60 t ttm_bo_move_to_lru_tail_unlocked +ffffffff81cd6aa0 T radeon_bo_fence +ffffffff81cd7000 T radeon_pm_get_type_index +ffffffff81cd7080 T radeon_pm_acpi_event_handler +ffffffff81cd7160 t radeon_pm_update_profile +ffffffff81cd7280 t radeon_pm_set_clocks +ffffffff81cd7c40 T radeon_dpm_enable_uvd +ffffffff81cd7d00 T radeon_pm_compute_clocks +ffffffff81cd8710 T radeon_dpm_enable_vce +ffffffff81cd8780 T radeon_pm_suspend +ffffffff81cd8880 T radeon_pm_resume +ffffffff81cd8b70 T radeon_pm_init +ffffffff81cd9280 T radeon_pm_late_init +ffffffff81cd9340 T radeon_pm_fini +ffffffff81cd9460 t radeon_dpm_thermal_work_handler +ffffffff81cd9540 t radeon_dynpm_idle_work_handler +ffffffff81cd97c0 t __delayed_work_tick +ffffffff81cda000 T radeon_gem_prime_get_sg_table +ffffffff81cda030 T radeon_gem_prime_pin +ffffffff81cda0c0 t radeon_bo_reserve +ffffffff81cda230 t radeon_bo_unreserve +ffffffff81cda310 T radeon_gem_prime_unpin +ffffffff81cda390 T radeon_gem_prime_export +ffffffff81cdb000 T radeon_ring_supports_scratch_reg +ffffffff81cdb030 T radeon_ring_free_size +ffffffff81cdb0e0 T radeon_ring_lockup_update +ffffffff81cdb140 T radeon_ring_alloc +ffffffff81cdb2c0 T radeon_ring_lock +ffffffff81cdb340 T radeon_ring_commit +ffffffff81cdb440 T radeon_ring_unlock_commit +ffffffff81cdb470 T radeon_ring_undo +ffffffff81cdb4a0 T radeon_ring_unlock_undo +ffffffff81cdb4c0 T radeon_ring_test_lockup +ffffffff81cdb5e0 T radeon_ring_backup +ffffffff81cdb780 T radeon_ring_restore +ffffffff81cdb930 T radeon_ring_init +ffffffff81cdbb20 t radeon_bo_reserve +ffffffff81cdbc90 t radeon_bo_unreserve +ffffffff81cdbd70 T radeon_ring_fini +ffffffff81cdc000 T radeon_sa_bo_manager_init +ffffffff81cdc0d0 T radeon_sa_bo_manager_fini +ffffffff81cdc100 T radeon_sa_bo_manager_start +ffffffff81cdc240 t radeon_bo_reserve +ffffffff81cdc3b0 t radeon_bo_unreserve +ffffffff81cdc490 T radeon_sa_bo_manager_suspend +ffffffff81cdc540 T radeon_sa_bo_new +ffffffff81cdc5b0 T radeon_sa_bo_free +ffffffff81cdd000 T radeon_semaphore_create +ffffffff81cdd0e0 T radeon_semaphore_emit_signal +ffffffff81cdd170 T radeon_semaphore_emit_wait +ffffffff81cdd200 T radeon_semaphore_free +ffffffff81cde000 T radeon_sync_create +ffffffff81cde090 T radeon_sync_fence +ffffffff81cde140 T radeon_sync_resv +ffffffff81cde280 T radeon_sync_rings +ffffffff81cde440 T radeon_sync_free +ffffffff81cdf000 T radeon_test_moves +ffffffff81cdf070 t radeon_do_test_moves +ffffffff81cdf680 T radeon_test_ring_sync +ffffffff81cdf950 t radeon_test_create_and_emit_fence +ffffffff81cdfac0 T radeon_test_syncing +ffffffff81cdfd90 t radeon_test_ring_sync2 +ffffffff81ce0100 t radeon_bo_reserve +ffffffff81ce0270 t radeon_bo_unreserve +ffffffff81ce1000 T radeon_get_rdev +ffffffff81ce1030 T radeon_ttm_tt_set_userptr +ffffffff81ce1080 T radeon_ttm_tt_is_bound +ffffffff81ce10d0 T radeon_ttm_tt_has_userptr +ffffffff81ce1120 T radeon_ttm_tt_is_readonly +ffffffff81ce1170 T radeon_ttm_init +ffffffff81ce1390 T radeon_ttm_set_active_vram_size +ffffffff81ce13d0 t radeon_bo_reserve +ffffffff81ce1540 t radeon_bo_unreserve +ffffffff81ce1620 T radeon_ttm_fini +ffffffff81ce16f0 t radeon_ttm_tt_create +ffffffff81ce17d0 t radeon_ttm_tt_populate +ffffffff81ce1880 t radeon_ttm_tt_unpopulate +ffffffff81ce1970 t radeon_ttm_tt_destroy +ffffffff81ce19c0 t radeon_evict_flags +ffffffff81ce1b20 t radeon_bo_move +ffffffff81ce1f20 t radeon_ttm_io_mem_reserve +ffffffff81ce2000 T radeon_ucode_print_mc_hdr +ffffffff81ce20b0 t radeon_ucode_print_common_hdr +ffffffff81ce21e0 T radeon_ucode_print_smc_hdr +ffffffff81ce2270 T radeon_ucode_print_gfx_hdr +ffffffff81ce2340 T radeon_ucode_print_rlc_hdr +ffffffff81ce2440 T radeon_ucode_print_sdma_hdr +ffffffff81ce2520 T radeon_ucode_validate +ffffffff81ce3000 T radeon_uvd_init +ffffffff81ce34f0 t radeon_uvd_idle_work_handler +ffffffff81ce3660 t radeon_bo_reserve +ffffffff81ce3860 t radeon_bo_unreserve +ffffffff81ce3940 T radeon_uvd_fini +ffffffff81ce3a10 T radeon_uvd_suspend +ffffffff81ce3bd0 T radeon_uvd_note_usage +ffffffff81ce3e10 T radeon_uvd_get_destroy_msg +ffffffff81ce3f20 T radeon_uvd_resume +ffffffff81ce3fb0 T radeon_uvd_force_into_uvd_segment +ffffffff81ce4050 T radeon_uvd_free_handles +ffffffff81ce4210 T radeon_uvd_cs_parse +ffffffff81ce4930 T radeon_uvd_get_create_msg +ffffffff81ce4ab0 t radeon_uvd_send_msg +ffffffff81ce4c50 T radeon_uvd_calc_upll_dividers +ffffffff81ce4e20 T radeon_uvd_send_upll_ctlreq +ffffffff81ce5160 t __delayed_work_tick +ffffffff81ce6000 T radeon_vce_init +ffffffff81ce6620 t radeon_vce_idle_work_handler +ffffffff81ce66e0 t radeon_bo_reserve +ffffffff81ce6850 t radeon_bo_unreserve +ffffffff81ce6930 T radeon_vce_fini +ffffffff81ce69b0 T radeon_vce_suspend +ffffffff81ce6a90 T radeon_vce_resume +ffffffff81ce6be0 T radeon_vce_note_usage +ffffffff81ce6d00 T radeon_vce_free_handles +ffffffff81ce6dc0 T radeon_vce_get_destroy_msg +ffffffff81ce6ff0 T radeon_vce_get_create_msg +ffffffff81ce7340 T radeon_vce_cs_reloc +ffffffff81ce7440 T radeon_vce_cs_parse +ffffffff81ce7bb0 T radeon_vce_semaphore_emit +ffffffff81ce7d70 T radeon_vce_ib_execute +ffffffff81ce7f00 T radeon_vce_fence_emit +ffffffff81ce8130 T radeon_vce_ring_test +ffffffff81ce8280 T radeon_vce_ib_test +ffffffff81ce83a0 t __delayed_work_tick +ffffffff81ce9000 T radeon_vm_manager_init +ffffffff81ce9060 T radeon_vm_manager_fini +ffffffff81ce9180 T radeon_vm_get_bos +ffffffff81ce92d0 T radeon_vm_grab_id +ffffffff81ce9460 T radeon_vm_flush +ffffffff81ce95f0 T radeon_vm_fence +ffffffff81ce96a0 T radeon_vm_bo_find +ffffffff81ce96f0 T radeon_vm_bo_add +ffffffff81ce97e0 T radeon_vm_bo_set_addr +ffffffff81ce9c30 t radeon_bo_unreserve +ffffffff81ce9d10 t radeon_vm_clear_bo +ffffffff81ce9f00 T radeon_vm_map_gart +ffffffff81ce9f40 T radeon_vm_update_page_directory +ffffffff81cea2c0 T radeon_vm_bo_update +ffffffff81cea900 t radeon_vm_fence_pts +ffffffff81cea990 T radeon_vm_clear_freed +ffffffff81ceaa70 T radeon_vm_clear_invalids +ffffffff81ceab10 T radeon_vm_bo_rmv +ffffffff81ceac00 T radeon_vm_bo_invalidate +ffffffff81ceacb0 T radeon_vm_init +ffffffff81ceaf50 T radeon_vm_fini +ffffffff81ceb230 t radeon_bo_reserve +ffffffff81ceb3a0 t radeon_vm_frag_ptes +ffffffff81cec000 T rs400_gart_adjust_size +ffffffff81cec0c0 T rs400_gart_tlb_flush +ffffffff81cec140 T rs400_gart_init +ffffffff81cec240 T rs400_gart_enable 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rs600_gart_get_page_entry +ffffffff81cef260 T rs600_gart_set_page +ffffffff81cef2a0 T rs600_irq_set +ffffffff81cef480 T rs600_irq_disable +ffffffff81cef500 t rs600_irq_ack +ffffffff81cef6b0 T rs600_irq_process +ffffffff81cefa10 T rs600_get_vblank_counter +ffffffff81cefa60 T rs600_mc_wait_for_idle +ffffffff81cefb00 T rs600_bandwidth_update +ffffffff81cefbf0 T rs600_mc_rreg +ffffffff81cefc70 T rs600_mc_wreg +ffffffff81cefce0 T rs600_set_safe_registers +ffffffff81cefd20 T rs600_resume +ffffffff81cefe50 t rs600_startup +ffffffff81cf0670 T rs600_suspend +ffffffff81cf0770 T rs600_fini +ffffffff81cf0870 t rs600_gart_fini +ffffffff81cf08e0 T rs600_init +ffffffff81cf1000 T rs690_mc_wait_for_idle +ffffffff81cf10a0 T rs690_pm_info +ffffffff81cf1310 T rs690_line_buffer_adjust +ffffffff81cf1430 T rs690_bandwidth_update +ffffffff81cf1780 t rs690_crtc_bandwidth_compute +ffffffff81cf1b70 t rs690_compute_mode_priority +ffffffff81cf1ff0 T rs690_mc_rreg +ffffffff81cf2080 T rs690_mc_wreg +ffffffff81cf2100 T rs690_resume +ffffffff81cf21f0 t rs690_startup +ffffffff81cf24d0 T rs690_suspend +ffffffff81cf2530 T rs690_fini +ffffffff81cf25e0 T rs690_init +ffffffff81cf3000 T rs780_dpm_enable +ffffffff81cf3bf0 T rs780_dpm_disable +ffffffff81cf3cd0 T rs780_dpm_set_power_state +ffffffff81cf40b0 t rs780_force_voltage +ffffffff81cf41f0 t rs780_enable_voltage_scaling +ffffffff81cf43b0 T rs780_dpm_setup_asic +ffffffff81cf43e0 T rs780_dpm_display_configuration_changed +ffffffff81cf4530 T rs780_dpm_init +ffffffff81cf4aa0 T rs780_dpm_print_power_state +ffffffff81cf4b30 T rs780_dpm_fini +ffffffff81cf4bc0 T rs780_dpm_get_sclk +ffffffff81cf4c00 T rs780_dpm_get_mclk +ffffffff81cf4c30 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81cf4c60 T rs780_dpm_get_current_sclk +ffffffff81cf4cf0 T rs780_dpm_get_current_mclk +ffffffff81cf4d20 T rs780_dpm_force_performance_level +ffffffff81cf4f10 t rs780_force_fbdiv +ffffffff81cf6000 T rv515_ring_start +ffffffff81cf6af0 T rv515_mc_wait_for_idle +ffffffff81cf6b90 T rv515_vga_render_disable +ffffffff81cf6be0 T rv515_mc_rreg +ffffffff81cf6c70 T rv515_mc_wreg +ffffffff81cf6cf0 T rv515_debugfs +ffffffff81cf6d00 T rv515_mc_stop +ffffffff81cf7270 T rv515_mc_resume +ffffffff81cf7850 T rv515_clock_startup +ffffffff81cf7910 T rv515_resume +ffffffff81cf7b50 t rv515_startup +ffffffff81cf8020 T rv515_suspend +ffffffff81cf8090 T rv515_set_safe_registers +ffffffff81cf80d0 T rv515_fini +ffffffff81cf8180 T rv515_init +ffffffff81cf8460 T atom_rv515_force_tv_scaler +ffffffff81cfbb00 T rv515_bandwidth_avivo_update +ffffffff81cfbca0 t rv515_crtc_bandwidth_compute +ffffffff81cfbfb0 t rv515_compute_mode_priority +ffffffff81cfc480 T rv515_bandwidth_update +ffffffff81cfd000 T rv6xx_dpm_enable +ffffffff81cfd800 t rv6xx_calculate_stepping_parameters +ffffffff81cfd9e0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81cfdfb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81cfe080 t rv6xx_enable_dynamic_pcie_gen2 +ffffffff81cfe240 T rv6xx_dpm_disable +ffffffff81cfe4b0 T rv6xx_dpm_set_power_state +ffffffff81cfeea0 T rv6xx_setup_asic +ffffffff81cfefe0 T rv6xx_dpm_display_configuration_changed +ffffffff81cff060 T rv6xx_dpm_init +ffffffff81cff5a0 T rv6xx_dpm_print_power_state +ffffffff81cff660 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81cff690 T rv6xx_dpm_get_current_sclk +ffffffff81cff700 T rv6xx_dpm_get_current_mclk +ffffffff81cff770 T rv6xx_dpm_fini +ffffffff81cff800 T rv6xx_dpm_get_sclk +ffffffff81cff840 T rv6xx_dpm_get_mclk +ffffffff81cff880 T rv6xx_dpm_force_performance_level +ffffffff81cffa10 t rv6xx_generate_steps +ffffffff81cffd10 t rv6xx_output_stepping +ffffffff81cffe20 t rv6xx_program_mclk_stepping_entry +ffffffff81d00090 t rv6xx_program_engine_spread_spectrum +ffffffff81d00380 t rv6xx_step_sw_voltage +ffffffff81d01000 T rv730_populate_sclk_value +ffffffff81d01230 T rv730_populate_mclk_value +ffffffff81d01470 T rv730_read_clock_registers +ffffffff81d01590 T rv730_populate_smc_acpi_state +ffffffff81d01740 T rv730_populate_smc_initial_state +ffffffff81d01900 T rv730_program_memory_timing_parameters +ffffffff81d01ae0 T rv730_start_dpm +ffffffff81d01b70 T rv730_stop_dpm +ffffffff81d01c30 T rv730_program_dcodt +ffffffff81d01d00 T rv730_get_odt_values +ffffffff81d02000 T rv740_get_decoded_reference_divider +ffffffff81d020a0 T rv740_get_dll_speed +ffffffff81d022b0 T rv740_populate_sclk_value +ffffffff81d024b0 T rv740_populate_mclk_value +ffffffff81d02860 T rv740_read_clock_registers +ffffffff81d02990 T rv740_populate_smc_acpi_state +ffffffff81d02bc0 T rv740_enable_mclk_spread_spectrum +ffffffff81d02c10 T rv740_get_mclk_frequency_ratio +ffffffff81d03000 T rv770_set_uvd_clocks +ffffffff81d03570 T rv770_get_xclk +ffffffff81d035d0 T rv770_page_flip +ffffffff81d038d0 T rv770_page_flip_pending +ffffffff81d03940 T rv770_get_temp +ffffffff81d039a0 T rv770_pm_misc +ffffffff81d03a80 T r700_cp_stop +ffffffff81d03b00 T r700_cp_fini +ffffffff81d03b90 T rv770_set_clk_bypass_mode +ffffffff81d03cb0 T r700_vram_gtt_location +ffffffff81d03e40 T rv770_resume +ffffffff81d03ed0 t rv770_init_golden_registers +ffffffff81d04060 t rv770_startup +ffffffff81d05c00 T rv770_suspend +ffffffff81d05e20 T rv770_init +ffffffff81d06210 t rv770_pcie_gart_fini +ffffffff81d06390 T rv770_fini +ffffffff81d06630 t rv770_uvd_start +ffffffff81d066e0 t rv770_cp_load_microcode +ffffffff81d069b0 t rv770_uvd_resume +ffffffff81d07000 T rv770_copy_dma +ffffffff81d08000 T rv770_get_ps +ffffffff81d08030 T rv770_get_pi +ffffffff81d08060 T evergreen_get_pi +ffffffff81d08090 T rv770_restore_cgcg +ffffffff81d08110 T rv770_stop_dpm +ffffffff81d081d0 T rv770_dpm_enabled +ffffffff81d08210 T rv770_enable_thermal_protection +ffffffff81d08270 T rv770_enable_acpi_pm +ffffffff81d082c0 T rv770_get_seq_value +ffffffff81d08300 T rv770_write_smc_soft_register +ffffffff81d08330 T rv770_populate_smc_t +ffffffff81d084e0 T rv770_populate_smc_sp +ffffffff81d08540 T rv770_map_clkf_to_ibias +ffffffff81d085a0 T rv770_populate_vddc_value +ffffffff81d08650 T rv770_populate_mvdd_value +ffffffff81d086a0 T rv770_calculate_memory_refresh_rate +ffffffff81d08720 T rv770_enable_backbias +ffffffff81d08780 T rv770_setup_bsp +ffffffff81d08870 T rv770_program_git +ffffffff81d088c0 T rv770_program_tp +ffffffff81d08940 T rv770_program_tpp +ffffffff81d08980 T rv770_program_sstp +ffffffff81d089c0 T rv770_program_engine_speed_parameters +ffffffff81d08a10 T rv770_program_vc +ffffffff81d08a60 T rv770_clear_vc +ffffffff81d08aa0 T rv770_upload_firmware +ffffffff81d08ae0 T rv770_populate_initial_mvdd_value +ffffffff81d08b30 T rv770_get_memory_module_index +ffffffff81d08b70 T rv770_enable_voltage_control +ffffffff81d08bc0 T rv770_halt_smc +ffffffff81d08c20 T rv770_resume_smc +ffffffff81d08c70 T rv770_set_sw_state +ffffffff81d08cd0 T rv770_set_boot_state +ffffffff81d08d20 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81d08d90 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81d08e00 T rv770_restrict_performance_levels_before_switch +ffffffff81d08e60 T rv770_dpm_force_performance_level +ffffffff81d08f20 T r7xx_start_smc +ffffffff81d08f50 T r7xx_stop_smc +ffffffff81d08f80 T rv770_read_voltage_smio_registers +ffffffff81d08fc0 T rv770_reset_smio_status +ffffffff81d09080 T rv770_get_memory_type +ffffffff81d090d0 T rv770_get_pcie_gen2_status +ffffffff81d09140 T rv770_get_max_vddc +ffffffff81d091a0 T rv770_program_response_times +ffffffff81d092f0 T rv770_enable_auto_throttle_source +ffffffff81d09470 T rv770_dpm_enable +ffffffff81d0a4f0 T rv770_dpm_late_enable +ffffffff81d0a620 T rv770_dpm_disable +ffffffff81d0a990 T rv770_dpm_set_power_state +ffffffff81d0b080 t rv770_program_dcodt_after_state_switch +ffffffff81d0b100 T rv770_dpm_setup_asic +ffffffff81d0b470 T rv770_dpm_display_configuration_changed +ffffffff81d0b4f0 T rv7xx_parse_power_table +ffffffff81d0ba70 T rv770_get_engine_memory_ss +ffffffff81d0bb00 T rv770_dpm_init +ffffffff81d0bd40 T rv770_dpm_print_power_state +ffffffff81d0be60 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81d0be90 T rv770_dpm_get_current_sclk +ffffffff81d0bf00 T rv770_dpm_get_current_mclk +ffffffff81d0bf70 T rv770_dpm_fini +ffffffff81d0c000 T rv770_dpm_get_sclk +ffffffff81d0c050 T rv770_dpm_get_mclk +ffffffff81d0c0a0 T rv770_dpm_vblank_too_short +ffffffff81d0c110 t rv770_convert_power_level_to_smc +ffffffff81d0d000 T rv770_copy_bytes_to_smc +ffffffff81d0d210 T rv770_start_smc +ffffffff81d0d260 T rv770_reset_smc +ffffffff81d0d2b0 T rv770_stop_smc_clock +ffffffff81d0d300 T rv770_start_smc_clock +ffffffff81d0d350 T rv770_is_smc_running +ffffffff81d0d390 T rv770_send_msg_to_smc +ffffffff81d0d470 T rv770_wait_for_smc_inactive +ffffffff81d0d510 T rv770_load_smc_ucode +ffffffff81d0d6a0 T rv770_read_smc_sram_dword +ffffffff81d0d760 T rv770_write_smc_sram_dword +ffffffff81d0e000 T si_get_allowed_info_register +ffffffff81d0e090 T si_get_xclk +ffffffff81d0e100 T si_get_temp +ffffffff81d0e150 T si_mc_load_microcode +ffffffff81d0e410 T dce6_bandwidth_update +ffffffff81d0e5d0 t dce6_line_buffer_adjust +ffffffff81d0e780 t dce6_program_watermarks +ffffffff81d0f230 T si_fence_ring_emit +ffffffff81d0f690 T si_ring_ib_execute +ffffffff81d0fe00 T si_gpu_check_soft_reset +ffffffff81d0ffa0 T si_asic_reset +ffffffff81d10320 t si_gpu_pci_config_reset +ffffffff81d10640 T si_gfx_is_lockup +ffffffff81d106b0 T si_vram_gtt_location +ffffffff81d10750 T si_pcie_gart_tlb_flush +ffffffff81d107a0 T si_ib_parse +ffffffff81d10e40 T si_vm_init +ffffffff81d10e80 T si_vm_fini +ffffffff81d10eb0 T si_vm_flush +ffffffff81d11550 T si_init_uvd_internal_cg +ffffffff81d115a0 T si_get_csb_size +ffffffff81d11630 T si_get_csb_buffer +ffffffff81d117b0 T si_rlc_reset +ffffffff81d11830 T si_irq_set +ffffffff81d11d20 t si_disable_interrupt_state +ffffffff81d11fa0 T si_irq_process +ffffffff81d132a0 t si_irq_ack +ffffffff81d13890 T si_resume +ffffffff81d13920 t si_init_golden_registers +ffffffff81d13ae0 t si_startup +ffffffff81d15f00 T si_suspend +ffffffff81d161f0 t si_fini_cg +ffffffff81d16290 T si_init +ffffffff81d175f0 t si_cp_fini +ffffffff81d176e0 t si_irq_fini +ffffffff81d177b0 t si_pcie_gart_fini +ffffffff81d178b0 T si_fini +ffffffff81d17ad0 T si_get_gpu_clock_counter +ffffffff81d17b90 T si_set_uvd_clocks +ffffffff81d180f0 T si_set_vce_clocks +ffffffff81d18630 t si_vce_send_vcepll_ctlreq +ffffffff81d18870 t dce6_latency_watermark +ffffffff81d18ab0 t si_rlc_stop +ffffffff81d18c60 t si_vm_reg_valid +ffffffff81d18dc0 t si_vm_packet3_cp_dma_check +ffffffff81d18f30 t si_uvd_start +ffffffff81d18fe0 t si_vce_start +ffffffff81d190f0 t si_irq_init +ffffffff81d19bd0 t si_cp_load_microcode +ffffffff81d19fb0 t si_cp_resume +ffffffff81d1ae70 t si_uvd_resume +ffffffff81d1af40 t si_vce_resume +ffffffff81d1b030 t pcie_capability_set_word +ffffffff81d1b140 t pcie_capability_read_word +ffffffff81d1b1e0 t pcie_capability_clear_and_set_word +ffffffff81d1b300 t pcie_capability_write_word +ffffffff81d1b3c0 t si_update_cg +ffffffff81d1b930 t si_enable_mgcg +ffffffff81d1bd50 t si_enable_cgcg +ffffffff81d1c0e0 t request_firmware +ffffffff81d1c170 t release_firmware +ffffffff81d1d000 T si_dma_is_lockup +ffffffff81d1d080 T si_dma_vm_copy_pages +ffffffff81d1d170 T si_dma_vm_write_pages +ffffffff81d1d2d0 T si_dma_vm_set_pages +ffffffff81d1d440 T si_dma_vm_flush +ffffffff81d1d8b0 T si_copy_dma +ffffffff81d1e000 T si_dpm_force_performance_level +ffffffff81d1e160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81d1e1c0 T si_get_mclk_frequency_ratio +ffffffff81d1e240 T si_trim_voltage_table_to_fit_state_table +ffffffff81d1e350 T si_dpm_setup_asic +ffffffff81d1e520 T si_fan_ctrl_get_fan_speed_percent +ffffffff81d1e5b0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81d1e670 T si_fan_ctrl_set_mode +ffffffff81d1e8c0 T si_fan_ctrl_get_mode +ffffffff81d1e910 T si_dpm_enable +ffffffff81d1fc90 t si_init_smc_table +ffffffff81d20ea0 t si_init_smc_spll_table +ffffffff81d21020 t si_init_arb_table_index +ffffffff81d210b0 t si_populate_mc_reg_table +ffffffff81d21500 t si_initialize_smc_cac_tables +ffffffff81d23150 t si_initialize_hardware_cac_manager +ffffffff81d23200 t si_initialize_smc_dte_tables +ffffffff81d23400 t si_populate_smc_tdp_limits +ffffffff81d23600 t si_populate_smc_tdp_limits_2 +ffffffff81d236d0 t si_program_response_times +ffffffff81d237f0 t si_program_ds_registers +ffffffff81d23880 t si_dpm_start_smc +ffffffff81d238b0 t si_enable_auto_throttle_source +ffffffff81d23a40 t si_thermal_start_thermal_controller +ffffffff81d23f00 T si_dpm_late_enable +ffffffff81d24050 T si_dpm_disable +ffffffff81d243d0 t si_enable_power_containment +ffffffff81d244a0 t si_enable_smc_cac +ffffffff81d24600 T si_dpm_pre_set_power_state +ffffffff81d25170 T si_dpm_set_power_state +ffffffff81d256d0 t si_halt_smc +ffffffff81d25730 t si_upload_sw_state +ffffffff81d26130 t si_upload_smc_data +ffffffff81d26270 t si_upload_ulv_state +ffffffff81d263b0 t si_upload_mc_reg_table +ffffffff81d26550 t si_set_pcie_lane_width_in_smc +ffffffff81d265f0 t si_resume_smc +ffffffff81d26650 t si_set_vce_clock +ffffffff81d266f0 t si_notify_link_speed_change_after_state_change +ffffffff81d26820 t si_set_power_state_conditionally_enable_ulv +ffffffff81d26900 t si_power_control_set_level +ffffffff81d26a90 T si_dpm_post_set_power_state +ffffffff81d26ac0 T si_dpm_display_configuration_changed +ffffffff81d26ba0 T si_dpm_init +ffffffff81d285e0 T si_dpm_fini +ffffffff81d28690 T si_dpm_debugfs_print_current_performance_level +ffffffff81d286e0 T si_dpm_get_current_sclk +ffffffff81d28750 T si_dpm_get_current_mclk +ffffffff81d287c0 t si_do_program_memory_timing_parameters +ffffffff81d28950 t si_populate_mvdd_value +ffffffff81d289d0 t si_convert_power_level_to_smc +ffffffff81d29280 t si_calculate_sclk_params +ffffffff81d294b0 t si_program_cac_config_registers +ffffffff81d2a000 T si_copy_bytes_to_smc +ffffffff81d2a240 T si_start_smc +ffffffff81d2a280 T si_reset_smc +ffffffff81d2a2c0 T si_program_jump_on_start +ffffffff81d2a2f0 T si_stop_smc_clock +ffffffff81d2a330 T si_start_smc_clock +ffffffff81d2a370 T si_is_smc_running +ffffffff81d2a3d0 T si_send_msg_to_smc +ffffffff81d2a4a0 T si_wait_for_smc_inactive +ffffffff81d2a540 T si_load_smc_ucode +ffffffff81d2a6e0 T si_read_smc_sram_dword +ffffffff81d2a7b0 T si_write_smc_sram_dword +ffffffff81d2b000 T sumo_get_pi +ffffffff81d2b030 T sumo_gfx_clockgating_initialize +ffffffff81d2b110 T sumo_program_vc +ffffffff81d2b150 T sumo_clear_vc +ffffffff81d2b190 T sumo_program_sstp +ffffffff81d2b210 T sumo_take_smu_control +ffffffff81d2b240 T sumo_get_sleep_divider_from_id +ffffffff81d2b270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d2b320 T sumo_dpm_enable +ffffffff81d2b9b0 T sumo_dpm_late_enable +ffffffff81d2bf70 T sumo_dpm_disable +ffffffff81d2c2c0 T sumo_dpm_pre_set_power_state +ffffffff81d2c7b0 T sumo_dpm_set_power_state +ffffffff81d2d260 T sumo_dpm_post_set_power_state +ffffffff81d2d300 T sumo_dpm_setup_asic +ffffffff81d2d400 T sumo_dpm_display_configuration_changed +ffffffff81d2d430 T sumo_convert_vid2_to_vid7 +ffffffff81d2d480 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d2d540 T sumo_construct_vid_mapping_table +ffffffff81d2d6b0 T sumo_dpm_init +ffffffff81d2df80 T sumo_dpm_print_power_state +ffffffff81d2e0a0 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d2e0d0 T sumo_dpm_get_current_sclk +ffffffff81d2e140 T sumo_dpm_get_current_mclk +ffffffff81d2e170 T sumo_dpm_get_current_vddc +ffffffff81d2e240 T sumo_dpm_fini +ffffffff81d2e2d0 T sumo_dpm_get_sclk +ffffffff81d2e320 T sumo_dpm_get_mclk +ffffffff81d2e350 T sumo_dpm_force_performance_level +ffffffff81d2e740 t sumo_power_level_enable +ffffffff81d2e970 t sumo_program_power_level +ffffffff81d2f000 T sumo_initialize_m3_arb +ffffffff81d2f2c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d2f360 t sumo_send_msg_to_smu +ffffffff81d2f4f0 T sumo_smu_pg_init +ffffffff81d2f510 T sumo_enable_boost_timer +ffffffff81d2f640 T sumo_set_tdp_limit +ffffffff81d2f6c0 T sumo_boost_state_enable +ffffffff81d2f710 T sumo_get_running_fw_version +ffffffff81d30000 T trinity_dpm_enable_bapm +ffffffff81d30080 T trinity_dpm_enable +ffffffff81d30520 T trinity_dpm_late_enable +ffffffff81d30a60 T trinity_dpm_disable +ffffffff81d30e50 T trinity_dpm_force_performance_level +ffffffff81d30f00 T trinity_dpm_pre_set_power_state +ffffffff81d314c0 T trinity_dpm_set_power_state +ffffffff81d31a30 T trinity_dpm_post_set_power_state +ffffffff81d31ad0 T trinity_dpm_setup_asic +ffffffff81d31b30 T trinity_dpm_display_configuration_changed +ffffffff81d31bc0 T trinity_dpm_init +ffffffff81d324b0 T trinity_dpm_print_power_state +ffffffff81d325c0 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d32650 T trinity_dpm_get_current_sclk +ffffffff81d326b0 T trinity_dpm_get_current_mclk +ffffffff81d326e0 T trinity_dpm_fini +ffffffff81d32780 T trinity_dpm_get_sclk +ffffffff81d327d0 T trinity_dpm_get_mclk +ffffffff81d32800 t trinity_program_power_level +ffffffff81d33000 T trinity_dpm_bapm_enable +ffffffff81d33150 T trinity_dpm_config +ffffffff81d33230 T trinity_dpm_force_state +ffffffff81d33310 T trinity_dpm_n_levels_disabled +ffffffff81d333f0 T trinity_uvd_dpm_config +ffffffff81d334c0 T trinity_dpm_no_forced_level +ffffffff81d33590 T trinity_dce_enable_voltage_adjustment +ffffffff81d336e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d337b0 T trinity_acquire_mutex +ffffffff81d33840 T trinity_release_mutex +ffffffff81d34000 T uvd_v1_0_get_rptr +ffffffff81d34040 T uvd_v1_0_get_wptr +ffffffff81d34080 T uvd_v1_0_set_wptr +ffffffff81d340c0 T uvd_v1_0_fence_emit +ffffffff81d344b0 T uvd_v1_0_resume +ffffffff81d34610 T uvd_v1_0_init +ffffffff81d34b90 T uvd_v1_0_start +ffffffff81d35310 T uvd_v1_0_fini +ffffffff81d35480 T uvd_v1_0_stop +ffffffff81d355f0 T uvd_v1_0_ring_test +ffffffff81d357c0 T uvd_v1_0_semaphore_emit +ffffffff81d357f0 T uvd_v1_0_ib_execute +ffffffff81d35980 T uvd_v1_0_ib_test +ffffffff81d36000 T uvd_v2_2_fence_emit +ffffffff81d36450 T uvd_v2_2_semaphore_emit +ffffffff81d36650 T uvd_v2_2_resume +ffffffff81d37000 T uvd_v3_1_semaphore_emit +ffffffff81d38000 T uvd_v4_2_resume +ffffffff81d39000 T vce_v1_0_get_rptr +ffffffff81d39090 T vce_v1_0_get_wptr +ffffffff81d39120 T vce_v1_0_set_wptr +ffffffff81d391b0 T vce_v1_0_enable_mgcg +ffffffff81d39470 T vce_v1_0_load_fw +ffffffff81d39640 T vce_v1_0_bo_size +ffffffff81d396b0 T vce_v1_0_resume +ffffffff81d3a020 T vce_v1_0_start +ffffffff81d3a7e0 T vce_v1_0_init +ffffffff81d3b000 T vce_v2_0_enable_mgcg +ffffffff81d3b070 t vce_v2_0_set_dyn_cg +ffffffff81d3b260 T vce_v2_0_bo_size +ffffffff81d3b2d0 T vce_v2_0_resume +ffffffff81d3c000 T aldebaran_reset_init +ffffffff81d3c0c0 t aldebaran_async_reset +ffffffff81d3c120 t aldebaran_get_reset_handler +ffffffff81d3c1c0 T aldebaran_reset_fini +ffffffff81d3c220 t aldebaran_mode2_prepare_hwcontext +ffffffff81d3c340 t aldebaran_mode2_perform_reset +ffffffff81d3c500 t aldebaran_mode2_restore_hwcontext +ffffffff81d3c9e0 t aldebaran_mode2_reset +ffffffff81d3d000 T aldebaran_reg_base_init +ffffffff81d3e000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d3e040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d3e070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d3e180 T amdgpu_acpi_pcie_performance_request +ffffffff81d3e500 T amdgpu_acpi_power_shift_control +ffffffff81d3e640 T amdgpu_acpi_smart_shift_update +ffffffff81d3e6e0 T amdgpu_acpi_get_tmr_info +ffffffff81d3e770 T amdgpu_acpi_get_mem_info +ffffffff81d3e830 T amdgpu_acpi_init +ffffffff81d3e8e0 t amdgpu_acpi_event +ffffffff81d3ebf0 T amdgpu_acpi_get_backlight_caps +ffffffff81d3ec40 T amdgpu_acpi_fini +ffffffff81d3ec60 T amdgpu_acpi_should_gpu_reset +ffffffff81d3ecb0 T amdgpu_acpi_detect +ffffffff81d3f5f0 T amdgpu_acpi_release +ffffffff81d40000 T amdgpu_afmt_acr +ffffffff81d41000 T amdgpu_amdkfd_init +ffffffff81d41040 T amdgpu_amdkfd_fini +ffffffff81d41070 T amdgpu_amdkfd_device_probe +ffffffff81d410a0 T amdgpu_amdkfd_device_init +ffffffff81d41260 t amdgpu_amdkfd_reset_work +ffffffff81d412e0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d41330 T amdgpu_amdkfd_interrupt +ffffffff81d41360 T amdgpu_amdkfd_suspend +ffffffff81d41390 T amdgpu_amdkfd_resume +ffffffff81d413c0 T amdgpu_amdkfd_pre_reset +ffffffff81d413f0 T amdgpu_amdkfd_post_reset +ffffffff81d41420 T amdgpu_amdkfd_gpu_reset +ffffffff81d41480 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d41730 t amdgpu_bo_reserve +ffffffff81d41890 t amdgpu_bo_unreserve +ffffffff81d41970 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d419e0 T amdgpu_amdkfd_alloc_gws +ffffffff81d41ac0 T amdgpu_amdkfd_free_gws +ffffffff81d41b00 T amdgpu_amdkfd_get_fw_version +ffffffff81d41bb0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d41d50 T amdgpu_amdkfd_xcp_memory_size +ffffffff81d41df0 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d41e30 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d41e90 T amdgpu_amdkfd_get_cu_info +ffffffff81d41fa0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d420f0 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d42160 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d421f0 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d42350 T amdgpu_amdkfd_submit_ib +ffffffff81d424b0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d42500 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d42540 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d42670 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d426b0 T amdgpu_amdkfd_have_atomics_support +ffffffff81d426e0 T amdgpu_amdkfd_debug_mem_fence +ffffffff81d42700 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d42710 T amdgpu_amdkfd_send_close_event_drain_irq +ffffffff81d42730 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d42780 T amdgpu_amdkfd_check_and_lock_kfd +ffffffff81d427b0 T amdgpu_amdkfd_unlock_kfd +ffffffff81d427e0 T amdgpu_amdkfd_unmap_hiq +ffffffff81d43000 T amdgpu_atom_execute_table +ffffffff81d430a0 t amdgpu_atom_execute_table_locked +ffffffff81d433c0 T amdgpu_atom_parse +ffffffff81d43910 T amdgpu_atom_destroy +ffffffff81d43950 T amdgpu_atom_asic_init +ffffffff81d43a70 t get_u32 +ffffffff81d43ad0 T amdgpu_atom_parse_data_header +ffffffff81d43b70 T amdgpu_atom_parse_cmd_header +ffffffff81d43bf0 t atom_op_move +ffffffff81d43dc0 t atom_op_and +ffffffff81d43fa0 t atom_op_or +ffffffff81d44180 t atom_op_shift_left +ffffffff81d44360 t atom_op_shift_right +ffffffff81d44540 t atom_op_mul +ffffffff81d44690 t atom_op_div +ffffffff81d44800 t atom_op_add +ffffffff81d449e0 t atom_op_sub +ffffffff81d44bc0 t atom_op_setport +ffffffff81d44d40 t atom_op_setregblock +ffffffff81d44e00 t atom_op_setfbbase +ffffffff81d44ec0 t atom_op_compare +ffffffff81d450a0 t atom_op_switch +ffffffff81d452d0 t atom_op_jump +ffffffff81d45540 t atom_op_test +ffffffff81d45700 t atom_op_delay +ffffffff81d457e0 t atom_op_calltable +ffffffff81d45930 t atom_op_repeat +ffffffff81d45960 t atom_op_clear +ffffffff81d45a70 t atom_op_nop +ffffffff81d45aa0 t atom_op_eot +ffffffff81d45ad0 t atom_op_mask +ffffffff81d45d80 t atom_op_postcard +ffffffff81d45e30 t atom_op_beep +ffffffff81d45e50 t atom_op_savereg +ffffffff81d45e80 t atom_op_restorereg +ffffffff81d45eb0 t atom_op_setdatablock +ffffffff81d45ff0 t atom_op_xor +ffffffff81d461d0 t atom_op_shl +ffffffff81d463f0 t atom_op_shr +ffffffff81d46610 t atom_op_debug +ffffffff81d466c0 t atom_op_processds +ffffffff81d46780 t atom_op_mul32 +ffffffff81d468e0 t atom_op_div32 +ffffffff81d46a70 t atom_put_dst +ffffffff81d46f80 t atom_get_src_int +ffffffff81d47600 t atom_iio_execute +ffffffff81d48000 T amdgpu_atombios_lookup_i2c_gpio +ffffffff81d48260 T amdgpu_atombios_i2c_init +ffffffff81d48520 T amdgpu_atombios_lookup_gpio +ffffffff81d48620 T amdgpu_atombios_has_dce_engine_info +ffffffff81d486a0 T amdgpu_atombios_get_connector_info_from_object_table +ffffffff81d48f00 T amdgpu_atombios_get_clock_info +ffffffff81d49240 T amdgpu_atombios_get_gfx_info +ffffffff81d49300 T amdgpu_atombios_get_vram_width +ffffffff81d49390 T amdgpu_atombios_get_asic_ss_info +ffffffff81d49670 t amdgpu_atombios_get_igp_ss_overrides +ffffffff81d49790 T amdgpu_atombios_get_clock_dividers +ffffffff81d499b0 T amdgpu_atombios_has_gpu_virtualization_table +ffffffff81d49a00 T amdgpu_atombios_scratch_regs_lock +ffffffff81d49a60 T amdgpu_atombios_scratch_regs_engine_hung +ffffffff81d49ab0 T amdgpu_atombios_scratch_regs_set_backlight_level +ffffffff81d49b10 T amdgpu_atombios_scratch_need_asic_init +ffffffff81d49b60 T amdgpu_atombios_copy_swap +ffffffff81d49b80 T amdgpu_atombios_sysfs_init +ffffffff81d49bb0 T amdgpu_atombios_fini +ffffffff81d49c60 T amdgpu_atombios_init +ffffffff81d49f00 t cail_reg_read +ffffffff81d49f20 t cail_reg_write +ffffffff81d49f40 t cail_mc_read +ffffffff81d49f70 t cail_mc_write +ffffffff81d49fa0 t cail_pll_read +ffffffff81d49fd0 t cail_pll_write +ffffffff81d4a000 T amdgpu_atombios_get_data_table +ffffffff81d4b000 T amdgpu_atombios_crtc_overscan_setup +ffffffff81d4b150 T amdgpu_atombios_crtc_scaler_setup +ffffffff81d4b1d0 T amdgpu_atombios_crtc_lock +ffffffff81d4b230 T amdgpu_atombios_crtc_enable +ffffffff81d4b290 T amdgpu_atombios_crtc_blank +ffffffff81d4b2f0 T amdgpu_atombios_crtc_powergate +ffffffff81d4b360 T amdgpu_atombios_crtc_powergate_init +ffffffff81d4b3d0 T amdgpu_atombios_crtc_set_dtd_timing +ffffffff81d4b500 T amdgpu_atombios_crtc_set_disp_eng_pll +ffffffff81d4b5f0 T amdgpu_atombios_crtc_set_dce_clock +ffffffff81d4b6e0 T amdgpu_atombios_crtc_program_pll +ffffffff81d4ba00 T amdgpu_atombios_crtc_prepare_pll +ffffffff81d4bf00 T amdgpu_atombios_crtc_set_pll +ffffffff81d4d000 T amdgpu_atombios_dp_aux_init +ffffffff81d4d090 t amdgpu_atombios_dp_aux_transfer +ffffffff81d4d200 T amdgpu_atombios_dp_get_sinktype +ffffffff81d4d270 T amdgpu_atombios_dp_get_dpcd +ffffffff81d4d420 T amdgpu_atombios_dp_get_panel_mode +ffffffff81d4d510 T amdgpu_atombios_dp_set_link_config +ffffffff81d4d590 t amdgpu_atombios_dp_get_dp_link_config +ffffffff81d4d720 T amdgpu_atombios_dp_mode_valid_helper +ffffffff81d4d7a0 T amdgpu_atombios_dp_needs_link_train +ffffffff81d4d810 T amdgpu_atombios_dp_set_rx_power_state +ffffffff81d4d890 T amdgpu_atombios_dp_link_train +ffffffff81d4ddf0 t amdgpu_atombios_dp_process_aux_ch +ffffffff81d4df50 t amdgpu_atombios_dp_get_adjust_train +ffffffff81d4f000 T amdgpu_atombios_encoder_get_backlight_level_from_reg +ffffffff81d4f050 T amdgpu_atombios_encoder_set_backlight_level_to_reg +ffffffff81d4f0a0 T amdgpu_atombios_encoder_get_backlight_level +ffffffff81d4f100 T amdgpu_atombios_encoder_set_backlight_level +ffffffff81d4f210 T amdgpu_atombios_encoder_setup_dig_transmitter +ffffffff81d4fc30 T amdgpu_atombios_encoder_init_backlight +ffffffff81d4fdd0 t amdgpu_atombios_encoder_get_backlight_brightness +ffffffff81d4fe30 T amdgpu_atombios_encoder_fini_backlight +ffffffff81d4fec0 T amdgpu_atombios_encoder_is_digital +ffffffff81d4ff10 T amdgpu_atombios_encoder_mode_fixup +ffffffff81d4fff0 T amdgpu_atombios_encoder_get_encoder_mode +ffffffff81d50190 T amdgpu_atombios_encoder_setup_dig_encoder +ffffffff81d50670 t amdgpu_atombios_encoder_get_bpc +ffffffff81d506c0 T amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81d507c0 T amdgpu_atombios_encoder_dpms +ffffffff81d50930 t amdgpu_atombios_encoder_setup_dig +ffffffff81d50ce0 t amdgpu_atombios_encoder_setup_dvo +ffffffff81d50e90 T amdgpu_atombios_encoder_set_crtc_source +ffffffff81d51270 T amdgpu_atombios_encoder_init_dig +ffffffff81d51340 t amdgpu_atombios_encoder_setup_external_encoder +ffffffff81d515b0 T amdgpu_atombios_encoder_dac_detect +ffffffff81d51770 T amdgpu_atombios_encoder_dig_detect +ffffffff81d51870 T amdgpu_atombios_encoder_setup_ext_encoder_ddc +ffffffff81d518c0 T amdgpu_atombios_encoder_set_bios_scratch_regs +ffffffff81d51e10 T amdgpu_atombios_encoder_get_lcd_info +ffffffff81d52170 T amdgpu_atombios_encoder_get_dig_info +ffffffff81d521e0 t amdgpu_atombios_encoder_update_backlight_status +ffffffff81d53000 T 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amd_sriov_msg_checksum +ffffffff81dd0700 T amdgpu_virt_release_ras_err_handler_data +ffffffff81dd07e0 T amdgpu_virt_fini_data_exchange +ffffffff81dd0860 T amdgpu_virt_init_data_exchange +ffffffff81dd09b0 T amdgpu_virt_exchange_data +ffffffff81dd0cd0 t amdgpu_virt_update_vf2pf_work_item +ffffffff81dd0d30 t amdgpu_virt_read_pf2vf_data +ffffffff81dd1140 t amdgpu_virt_write_vf2pf_data +ffffffff81dd14d0 T amdgpu_detect_virtualization +ffffffff81dd1680 T amdgpu_virt_enable_access_debugfs +ffffffff81dd1710 T amdgpu_virt_disable_access_debugfs +ffffffff81dd1750 T amdgpu_virt_get_sriov_vf_mode +ffffffff81dd17a0 T amdgpu_virt_post_reset +ffffffff81dd17e0 T amdgpu_virt_fw_load_skip_check +ffffffff81dd1880 T amdgpu_virt_update_sriov_video_codec +ffffffff81dd1980 T amdgpu_sriov_wreg +ffffffff81dd1a10 t amdgpu_virt_rlcg_reg_rw +ffffffff81dd1d20 T amdgpu_sriov_rreg +ffffffff81dd1d80 t __delayed_work_tick +ffffffff81dd2000 T amdgpu_vm_set_pasid +ffffffff81dd2130 T amdgpu_vm_bo_base_init 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amdgpu_xcp_switch_partition_mode +ffffffff81dde6e0 T amdgpu_xcp_query_partition_mode +ffffffff81dde7e0 T amdgpu_xcp_mgr_init +ffffffff81ddea00 T amdgpu_xcp_get_partition +ffffffff81ddeaa0 T amdgpu_xcp_get_inst_details +ffffffff81ddeaf0 T amdgpu_xcp_dev_register +ffffffff81ddec40 T amdgpu_xcp_dev_unplug +ffffffff81dded30 T amdgpu_xcp_open_device +ffffffff81ddef10 T amdgpu_xcp_release_sched +ffffffff81ddf000 T amdgpu_get_xgmi_hive +ffffffff81ddf050 T amdgpu_put_xgmi_hive +ffffffff81ddf0a0 T amdgpu_xgmi_set_pstate +ffffffff81ddf0f0 T amdgpu_xgmi_update_topology +ffffffff81ddf1a0 T amdgpu_xgmi_get_hops_count +ffffffff81ddf210 T amdgpu_xgmi_get_num_links +ffffffff81ddf280 T amdgpu_xgmi_add_device +ffffffff81ddf4a0 T amdgpu_xgmi_remove_device +ffffffff81ddf5f0 T amdgpu_xgmi_get_relative_phy_addr +ffffffff81ddf630 t amdgpu_ras_error_inject_xgmi +ffffffff81ddf7a0 t amdgpu_xgmi_query_ras_error_count +ffffffff81ddfe40 t amdgpu_xgmi_reset_ras_error_count +ffffffff81de0160 t amdgpu_xgmi_ras_late_init +ffffffff81de01e0 T amdgpu_xgmi_ras_sw_init +ffffffff81de1000 T aqua_vanjaram_doorbell_index_init +ffffffff81de1120 T aqua_vanjaram_ip_map_init +ffffffff81de12a0 t aqua_vanjaram_logical_to_dev_inst +ffffffff81de1300 t aqua_vanjaram_logical_to_dev_mask +ffffffff81de13b0 T aqua_vanjaram_encode_ext_smn_addressing +ffffffff81de13f0 t aqua_vanjaram_switch_partition_mode +ffffffff81de17f0 t aqua_vanjaram_query_partition_mode +ffffffff81de1840 t aqua_vanjaram_get_xcp_ip_details +ffffffff81de19f0 t aqua_vanjaram_get_xcp_mem_id +ffffffff81de1b00 t aqua_vanjaram_select_scheds +ffffffff81de1c90 t aqua_vanjaram_update_partition_sched_list +ffffffff81de2180 T aqua_vanjaram_init_soc_config +ffffffff81de3000 T arct_reg_base_init +ffffffff81de4000 T athub_v1_0_set_clockgating +ffffffff81de4220 T athub_v1_0_get_clockgating +ffffffff81de5000 T athub_v2_0_set_clockgating +ffffffff81de51f0 T athub_v2_0_get_clockgating +ffffffff81de6000 T athub_v2_1_set_clockgating +ffffffff81de6200 T athub_v2_1_get_clockgating +ffffffff81de7000 T athub_v3_0_set_clockgating +ffffffff81de70d0 T athub_v3_0_get_clockgating +ffffffff81de7120 t athub_v3_0_get_cg_cntl +ffffffff81de71c0 t athub_v3_0_set_cg_cntl +ffffffff81de8000 t cz_ih_early_init +ffffffff81de8050 t cz_ih_sw_init +ffffffff81de80b0 t cz_ih_sw_fini +ffffffff81de80f0 t cz_ih_hw_init +ffffffff81de8310 t cz_ih_hw_fini +ffffffff81de83e0 t cz_ih_suspend +ffffffff81de84b0 t cz_ih_resume +ffffffff81de84f0 t cz_ih_is_idle +ffffffff81de8540 t cz_ih_wait_for_idle +ffffffff81de85e0 t cz_ih_soft_reset +ffffffff81de86c0 t cz_ih_set_clockgating_state +ffffffff81de86f0 t cz_ih_set_powergating_state +ffffffff81de8720 t cz_ih_get_wptr +ffffffff81de8810 t cz_ih_decode_iv +ffffffff81de8890 t cz_ih_set_rptr +ffffffff81de9000 T dce_v10_0_disable_dce +ffffffff81de9150 t dce_v10_0_early_init +ffffffff81de9210 t dce_v10_0_sw_init +ffffffff81de9520 t dce_v10_0_sw_fini +ffffffff81de9640 t dce_v10_0_hw_init +ffffffff81de99a0 t dce_v10_0_hw_fini +ffffffff81de9b30 t dce_v10_0_suspend +ffffffff81de9b90 t dce_v10_0_resume +ffffffff81de9c00 t dce_v10_0_is_idle +ffffffff81de9c30 t dce_v10_0_wait_for_idle +ffffffff81de9c60 t dce_v10_0_check_soft_reset +ffffffff81de9c70 t dce_v10_0_soft_reset +ffffffff81de9d40 t dce_v10_0_set_clockgating_state +ffffffff81de9d70 t dce_v10_0_set_powergating_state +ffffffff81de9da0 t dce_v10_0_audio_endpt_rreg +ffffffff81de9e30 t dce_v10_0_audio_endpt_wreg +ffffffff81de9eb0 t dce_v10_0_bandwidth_update +ffffffff81dea920 t dce_v10_0_vblank_get_counter +ffffffff81dea970 t dce_v10_0_hpd_sense +ffffffff81dea9d0 t dce_v10_0_hpd_set_polarity +ffffffff81deaaa0 t dce_v10_0_hpd_get_gpio_reg +ffffffff81deaad0 t dce_v10_0_page_flip +ffffffff81deabd0 t dce_v10_0_crtc_get_scanoutpos +ffffffff81deac70 t dce_v10_0_encoder_add +ffffffff81deaec0 t dce_v10_0_latency_watermark +ffffffff81deb0f0 t dce_v10_0_encoder_destroy +ffffffff81deb150 t dce_v10_0_encoder_prepare +ffffffff81deb350 t dce_v10_0_encoder_commit +ffffffff81deb380 t dce_v10_0_encoder_mode_set +ffffffff81dec2f0 t dce_v10_0_encoder_disable +ffffffff81dec400 t dce_v10_0_ext_dpms +ffffffff81dec430 t dce_v10_0_ext_prepare +ffffffff81dec460 t dce_v10_0_ext_commit +ffffffff81dec490 t dce_v10_0_ext_mode_set +ffffffff81dec4c0 t dce_v10_0_ext_disable +ffffffff81dec4f0 t dce_v10_0_set_crtc_irq_state +ffffffff81dec5d0 t dce_v10_0_crtc_irq +ffffffff81dec810 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81dec8e0 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81dec9b0 t dce_v10_0_set_pageflip_irq_state +ffffffff81deca60 t dce_v10_0_pageflip_irq +ffffffff81decbc0 t dce_v10_0_set_hpd_irq_state +ffffffff81decc90 t dce_v10_0_hpd_irq +ffffffff81decdc0 t dce_v10_0_afmt_init +ffffffff81deced0 t dce_v10_0_audio_init +ffffffff81decfa0 t INIT_DELAYED_WORK +ffffffff81decfe0 t dce_v10_0_crtc_cursor_set2 +ffffffff81ded2a0 t dce_v10_0_crtc_cursor_move +ffffffff81ded370 t dce_v10_0_crtc_gamma_set +ffffffff81ded3b0 t dce_v10_0_crtc_destroy +ffffffff81ded3e0 t amdgpu_bo_reserve +ffffffff81ded5e0 t amdgpu_bo_unreserve +ffffffff81ded6c0 t dce_v10_0_lock_cursor +ffffffff81ded720 t dce_v10_0_cursor_move_locked +ffffffff81ded880 t dce_v10_0_show_cursor +ffffffff81ded920 t dce_v10_0_crtc_load_lut +ffffffff81dedcb0 t dce_v10_0_crtc_dpms +ffffffff81dede90 t dce_v10_0_crtc_prepare +ffffffff81deded0 t dce_v10_0_crtc_commit +ffffffff81dedf00 t dce_v10_0_crtc_mode_fixup +ffffffff81dee0b0 t dce_v10_0_crtc_mode_set +ffffffff81dee290 t dce_v10_0_crtc_set_base +ffffffff81dee2b0 t dce_v10_0_crtc_set_base_atomic +ffffffff81dee2d0 t dce_v10_0_crtc_disable +ffffffff81dee460 t dce_v10_0_crtc_do_set_base +ffffffff81deeb60 t __delayed_work_tick +ffffffff81deeb80 t dce_v10_0_is_display_hung +ffffffff81def000 T dce_v11_0_disable_dce +ffffffff81def160 t dce_v11_0_early_init +ffffffff81def290 t dce_v11_0_sw_init +ffffffff81def5b0 t dce_v11_0_sw_fini +ffffffff81def6d0 t dce_v11_0_hw_init +ffffffff81defa90 t dce_v11_0_hw_fini +ffffffff81defc20 t dce_v11_0_suspend +ffffffff81defc80 t dce_v11_0_resume +ffffffff81defcf0 t dce_v11_0_is_idle +ffffffff81defd20 t dce_v11_0_wait_for_idle +ffffffff81defd50 t dce_v11_0_soft_reset +ffffffff81deff60 t dce_v11_0_set_clockgating_state +ffffffff81deff90 t dce_v11_0_set_powergating_state +ffffffff81deffc0 t dce_v11_0_audio_endpt_rreg +ffffffff81df0050 t dce_v11_0_audio_endpt_wreg +ffffffff81df00d0 t dce_v11_0_bandwidth_update +ffffffff81df0b40 t dce_v11_0_vblank_get_counter +ffffffff81df0b90 t dce_v11_0_hpd_sense +ffffffff81df0bf0 t dce_v11_0_hpd_set_polarity +ffffffff81df0cc0 t dce_v11_0_hpd_get_gpio_reg +ffffffff81df0cf0 t dce_v11_0_page_flip +ffffffff81df0df0 t dce_v11_0_crtc_get_scanoutpos +ffffffff81df0e90 t dce_v11_0_encoder_add +ffffffff81df10e0 t dce_v11_0_latency_watermark +ffffffff81df1310 t dce_v11_0_encoder_destroy +ffffffff81df1370 t dce_v11_0_encoder_prepare +ffffffff81df1570 t dce_v11_0_encoder_commit +ffffffff81df15a0 t dce_v11_0_encoder_mode_set +ffffffff81df2510 t dce_v11_0_encoder_disable +ffffffff81df2620 t dce_v11_0_ext_dpms +ffffffff81df2650 t dce_v11_0_ext_prepare +ffffffff81df2680 t dce_v11_0_ext_commit +ffffffff81df26b0 t dce_v11_0_ext_mode_set +ffffffff81df26e0 t dce_v11_0_ext_disable +ffffffff81df2710 t dce_v11_0_set_crtc_irq_state +ffffffff81df27f0 t dce_v11_0_crtc_irq +ffffffff81df2a10 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81df2ae0 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81df2bb0 t dce_v11_0_set_pageflip_irq_state +ffffffff81df2c60 t dce_v11_0_pageflip_irq +ffffffff81df2dc0 t dce_v11_0_set_hpd_irq_state +ffffffff81df2e90 t dce_v11_0_hpd_irq +ffffffff81df2fc0 t dce_v11_0_afmt_init +ffffffff81df30d0 t dce_v11_0_audio_init +ffffffff81df31d0 t INIT_DELAYED_WORK +ffffffff81df3210 t dce_v11_0_crtc_cursor_set2 +ffffffff81df34d0 t dce_v11_0_crtc_cursor_move +ffffffff81df35a0 t dce_v11_0_crtc_gamma_set +ffffffff81df35e0 t dce_v11_0_crtc_destroy +ffffffff81df3610 t amdgpu_bo_reserve +ffffffff81df3810 t amdgpu_bo_unreserve +ffffffff81df38f0 t dce_v11_0_lock_cursor +ffffffff81df3950 t dce_v11_0_cursor_move_locked +ffffffff81df3ab0 t dce_v11_0_show_cursor +ffffffff81df3b50 t dce_v11_0_crtc_load_lut +ffffffff81df3eb0 t dce_v11_0_crtc_dpms +ffffffff81df4090 t dce_v11_0_crtc_prepare +ffffffff81df40d0 t dce_v11_0_crtc_commit +ffffffff81df4100 t dce_v11_0_crtc_mode_fixup +ffffffff81df4370 t dce_v11_0_crtc_mode_set +ffffffff81df45d0 t dce_v11_0_crtc_set_base +ffffffff81df45f0 t dce_v11_0_crtc_set_base_atomic +ffffffff81df4610 t dce_v11_0_crtc_disable +ffffffff81df47b0 t dce_v11_0_crtc_do_set_base +ffffffff81df4eb0 t __delayed_work_tick +ffffffff81df5000 t df_v1_7_sw_init +ffffffff81df5040 t df_v1_7_sw_fini +ffffffff81df5070 t df_v1_7_enable_broadcast_mode +ffffffff81df51a0 t df_v1_7_get_fb_channel_number +ffffffff81df5230 t df_v1_7_get_hbm_channel_number +ffffffff81df5280 t df_v1_7_update_medium_grain_clock_gating +ffffffff81df5400 t df_v1_7_get_clockgating_state +ffffffff81df5490 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81df6000 t df_v3_6_sw_init +ffffffff81df6150 t df_v3_6_sw_fini +ffffffff81df6180 t df_v3_6_enable_broadcast_mode +ffffffff81df62b0 t df_v3_6_get_fb_channel_number +ffffffff81df6390 t df_v3_6_get_hbm_channel_number +ffffffff81df63e0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81df6580 t df_v3_6_get_clockgating_state +ffffffff81df6610 t df_v3_6_pmc_start +ffffffff81df6910 t df_v3_6_pmc_stop +ffffffff81df6bb0 t df_v3_6_pmc_get_count +ffffffff81df6d40 t df_v3_6_get_fica +ffffffff81df6e30 t df_v3_6_set_fica +ffffffff81df6f10 t df_v3_6_query_ras_poison_mode +ffffffff81df8000 t df_v4_3_query_ras_poison_mode +ffffffff81df9000 T dimgrey_cavefish_reg_base_init +ffffffff81dfa000 T emu_soc_asic_init +ffffffff81dfb000 t gfx_v10_0_early_init +ffffffff81dfb820 t gfx_v10_0_late_init +ffffffff81dfb890 t gfx_v10_0_sw_init +ffffffff81dfbda0 t gfx_v10_0_sw_fini +ffffffff81dfbfc0 t gfx_v10_0_hw_init +ffffffff81dfed20 t gfx_v10_0_hw_fini +ffffffff81dfee00 t gfx_v10_0_suspend +ffffffff81dfee40 t gfx_v10_0_resume +ffffffff81dfee50 t gfx_v10_0_is_idle +ffffffff81dfeee0 t gfx_v10_0_wait_for_idle +ffffffff81dfefe0 t gfx_v10_0_soft_reset +ffffffff81dff340 t gfx_v10_0_set_clockgating_state +ffffffff81dff5f0 t gfx_v10_0_set_powergating_state +ffffffff81dff6b0 t gfx_v10_0_get_clockgating_state +ffffffff81dff7c0 t gfx_v10_0_get_gpu_clock_counter +ffffffff81dffcd0 t gfx_v10_0_select_se_sh +ffffffff81dffd70 t gfx_v10_0_read_wave_data +ffffffff81dfffd0 t gfx_v10_0_read_wave_vgprs +ffffffff81e00000 t gfx_v10_0_read_wave_sgprs +ffffffff81e00080 t gfx_v10_0_select_me_pipe_q +ffffffff81e000a0 t gfx_v10_0_init_spm_golden_registers +ffffffff81e00110 t gfx_v10_0_update_perfmon_mgcg +ffffffff81e00240 t wave_read_ind +ffffffff81e00330 t wave_read_regs +ffffffff81e00490 t gfx10_kiq_set_resources +ffffffff81e007b0 t gfx10_kiq_map_queues +ffffffff81e00b40 t gfx10_kiq_unmap_queues +ffffffff81e00f40 t gfx10_kiq_query_status +ffffffff81e01230 t gfx10_kiq_invalidate_tlbs +ffffffff81e01350 t gfx_v10_0_ring_get_rptr_compute +ffffffff81e01380 t gfx_v10_0_ring_get_wptr_compute +ffffffff81e013f0 t gfx_v10_0_ring_set_wptr_compute +ffffffff81e01530 t gfx_v10_0_ring_emit_ib_compute +ffffffff81e01870 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81e01ca0 t gfx_v10_0_ring_test_ring +ffffffff81e01f00 t gfx_v10_0_ring_test_ib +ffffffff81e02190 t gfx_v10_0_ring_emit_rreg +ffffffff81e02420 t gfx_v10_0_ring_emit_wreg +ffffffff81e02650 t gfx_v10_0_ring_emit_reg_wait +ffffffff81e026a0 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81e02730 t gfx_v10_0_wait_reg_mem +ffffffff81e02a60 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81e02a90 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81e02ba0 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81e02db0 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81e03430 t gfx_v10_0_ring_emit_fence +ffffffff81e03810 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81e03870 t gfx_v10_0_ring_emit_vm_flush +ffffffff81e03a40 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81e03b10 t gfx_v10_0_ring_emit_gds_switch +ffffffff81e03bf0 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81e03e20 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81e03ee0 t gfx_v10_0_ring_emit_sb +ffffffff81e03fd0 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81e044c0 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81e045d0 t gfx_v10_0_ring_soft_recovery +ffffffff81e04640 t gfx_v10_0_ring_preempt_ib +ffffffff81e047b0 t gfx_v10_0_emit_mem_sync +ffffffff81e04ae0 t gfx_v10_0_write_data_to_reg +ffffffff81e04cf0 t gfx_v10_0_set_eop_interrupt_state +ffffffff81e04dd0 t gfx_v10_0_eop_irq +ffffffff81e04f80 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81e05120 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81e052e0 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81e055d0 t gfx_v10_0_kiq_irq +ffffffff81e05650 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81e05790 t gfx_v10_0_priv_reg_irq +ffffffff81e057f0 t gfx_v10_0_handle_priv_fault +ffffffff81e05950 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81e05a90 t gfx_v10_0_priv_inst_irq +ffffffff81e05af0 t gfx_v10_0_is_rlc_enabled +ffffffff81e05b80 t gfx_v10_0_set_safe_mode +ffffffff81e05e30 t gfx_v10_0_unset_safe_mode +ffffffff81e05ee0 t gfx_v10_0_rlc_init +ffffffff81e05f00 t gfx_v10_0_get_csb_size +ffffffff81e05f30 t gfx_v10_0_get_csb_buffer +ffffffff81e060a0 t gfx_v10_0_rlc_resume +ffffffff81e06b10 t gfx_v10_0_rlc_stop +ffffffff81e06bf0 t gfx_v10_0_rlc_reset +ffffffff81e06da0 t gfx_v10_0_rlc_start +ffffffff81e06f50 t gfx_v10_0_update_spm_vmid +ffffffff81e06f90 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81e078b0 t gfx_v10_0_init_csb +ffffffff81e07b90 t gfx_v10_0_update_spm_vmid_internal +ffffffff81e07cb0 t gfx_v10_0_rlc_backdoor_autoload_config_mec_cache +ffffffff81e07f80 t gfx_v10_0_is_rlcg_access_range +ffffffff81e07fb0 t gfx_v10_0_gfx_mqd_init +ffffffff81e083a0 t gfx_v10_0_compute_mqd_init +ffffffff81e08850 t gfx_v10_0_mec_init +ffffffff81e08a60 t gfx_v10_0_compute_ring_init +ffffffff81e08ba0 t gfx_v10_0_rlc_backdoor_autoload_buffer_init +ffffffff81e08e00 t gfx_v10_0_gpu_early_init +ffffffff81e09060 t amdgpu_bo_unreserve +ffffffff81e09140 t gfx_v10_0_cp_resume +ffffffff81e0bb20 t gfx_v10_3_get_disabled_sa +ffffffff81e0bc40 t gfx_v10_0_get_rb_active_bitmap +ffffffff81e0bd70 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81e0be80 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81e0bf90 t gfx_v10_0_cp_gfx_enable +ffffffff81e0c200 t gfx_v10_0_cp_compute_enable +ffffffff81e0c3a0 t amdgpu_bo_reserve +ffffffff81e0c510 t gfx_v10_0_kiq_init_register +ffffffff81e0d3b0 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81e0d4b0 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81e0d790 t gfx_v10_0_cp_gfx_start +ffffffff81e0e180 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81e0e4d0 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81e0ec10 t gfx_v10_0_update_3d_clock_gating +ffffffff81e0f000 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81e0f3e0 t gfx_v10_cntl_pg +ffffffff81e10000 t gfx_v11_0_early_init +ffffffff81e10750 t gfx_v11_0_late_init +ffffffff81e107c0 t gfx_v11_0_sw_init +ffffffff81e10d00 t gfx_v11_0_sw_fini +ffffffff81e10f10 t gfx_v11_0_hw_init +ffffffff81e15310 t gfx_v11_0_hw_fini +ffffffff81e15410 t gfx_v11_0_suspend +ffffffff81e15450 t gfx_v11_0_resume +ffffffff81e15460 t gfx_v11_0_is_idle +ffffffff81e154f0 t gfx_v11_0_wait_for_idle +ffffffff81e155f0 t gfx_v11_0_check_soft_reset +ffffffff81e15720 t gfx_v11_0_soft_reset +ffffffff81e16460 t gfx_v11_0_post_soft_reset +ffffffff81e16470 t gfx_v11_0_set_clockgating_state +ffffffff81e170b0 t gfx_v11_0_set_powergating_state +ffffffff81e17150 t gfx_v11_0_get_clockgating_state +ffffffff81e17320 t gfx_v11_0_get_gpu_clock_counter +ffffffff81e176a0 t gfx_v11_0_select_se_sh +ffffffff81e17740 t gfx_v11_0_read_wave_data +ffffffff81e17980 t gfx_v11_0_read_wave_vgprs +ffffffff81e179b0 t gfx_v11_0_read_wave_sgprs +ffffffff81e17a30 t gfx_v11_0_select_me_pipe_q +ffffffff81e17a50 t gfx_v11_0_update_perf_clk +ffffffff81e17b80 t gfx_v11_0_get_gfx_shadow_info +ffffffff81e17bf0 t wave_read_ind +ffffffff81e17ce0 t wave_read_regs +ffffffff81e17e40 t gfx11_kiq_set_resources +ffffffff81e18160 t gfx11_kiq_map_queues +ffffffff81e184f0 t gfx11_kiq_unmap_queues +ffffffff81e188f0 t gfx11_kiq_query_status +ffffffff81e18be0 t gfx11_kiq_invalidate_tlbs +ffffffff81e18d00 t gfx_v11_0_ring_get_rptr_compute +ffffffff81e18d30 t gfx_v11_0_ring_get_wptr_compute +ffffffff81e18da0 t gfx_v11_0_ring_set_wptr_compute +ffffffff81e18ee0 t gfx_v11_0_ring_emit_ib_compute +ffffffff81e19220 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81e19650 t gfx_v11_0_ring_test_ring +ffffffff81e198d0 t gfx_v11_0_ring_test_ib +ffffffff81e19b70 t gfx_v11_0_ring_emit_rreg +ffffffff81e19e00 t gfx_v11_0_ring_emit_wreg +ffffffff81e1a030 t gfx_v11_0_ring_emit_reg_wait +ffffffff81e1a080 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81e1a0f0 t gfx_v11_0_wait_reg_mem +ffffffff81e1a420 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81e1a450 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81e1a560 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81e1a780 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81e1ae10 t gfx_v11_0_ring_emit_fence +ffffffff81e1b1e0 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81e1b240 t gfx_v11_0_ring_emit_vm_flush +ffffffff81e1b410 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81e1b4e0 t gfx_v11_0_ring_emit_gds_switch +ffffffff81e1b5c0 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81e1b7f0 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81e1b8b0 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81e1ba10 t gfx_v11_0_ring_emit_gfx_shadow +ffffffff81e1bdd0 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81e1bee0 t gfx_v11_0_ring_soft_recovery +ffffffff81e1bf50 t gfx_v11_0_ring_preempt_ib +ffffffff81e1c0c0 t gfx_v11_0_emit_mem_sync +ffffffff81e1c3f0 t gfx_v11_0_write_data_to_reg +ffffffff81e1c600 t gfx_v11_0_set_eop_interrupt_state +ffffffff81e1c690 t gfx_v11_0_eop_irq +ffffffff81e1c840 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81e1c9e0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81e1cb70 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81e1ccb0 t gfx_v11_0_priv_reg_irq +ffffffff81e1cd10 t gfx_v11_0_handle_priv_fault +ffffffff81e1ce70 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81e1cfb0 t gfx_v11_0_priv_inst_irq +ffffffff81e1d010 t gfx_v11_0_rlc_gc_fed_irq +ffffffff81e1d060 t gfx_v11_0_is_rlc_enabled +ffffffff81e1d0f0 t gfx_v11_0_set_safe_mode +ffffffff81e1d250 t gfx_v11_0_unset_safe_mode +ffffffff81e1d2c0 t gfx_v11_0_rlc_init +ffffffff81e1d340 t gfx_v11_0_get_csb_size +ffffffff81e1d370 t gfx_v11_0_get_csb_buffer +ffffffff81e1d4e0 t gfx_v11_0_rlc_resume +ffffffff81e1e240 t gfx_v11_0_rlc_stop +ffffffff81e1e320 t gfx_v11_0_rlc_reset +ffffffff81e1e4d0 t gfx_v11_0_rlc_start +ffffffff81e1e680 t gfx_v11_0_update_spm_vmid +ffffffff81e1e780 t gfx_v11_0_init_csb +ffffffff81e1e910 t gfx_v11_0_gfx_mqd_init +ffffffff81e1ecf0 t gfx_v11_0_compute_mqd_init +ffffffff81e1f220 t gfx_v11_0_mec_init +ffffffff81e1f360 t gfx_v11_0_compute_ring_init +ffffffff81e1f4a0 t gfx_v11_0_rlc_autoload_buffer_init +ffffffff81e1f690 t gfx_v11_0_gpu_early_init +ffffffff81e1f760 t amdgpu_bo_unreserve +ffffffff81e1f840 t gfx_v11_0_disable_gpa_mode +ffffffff81e1f9e0 t gfx_v11_0_cp_resume +ffffffff81e237e0 t gfx_v11_0_config_me_cache +ffffffff81e23ba0 t gfx_v11_0_config_pfp_cache +ffffffff81e23f60 t gfx_v11_0_config_mec_cache +ffffffff81e24320 t gfx_v11_0_get_sa_active_bitmap +ffffffff81e24440 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81e24550 t gfx_v11_0_cp_compute_enable +ffffffff81e24730 t gfx_v11_0_cp_gfx_enable +ffffffff81e24940 t amdgpu_bo_reserve +ffffffff81e24ab0 t gfx_v11_0_kiq_init_register +ffffffff81e25950 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81e25a30 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81e25c10 t gfx_v11_0_cp_gfx_start +ffffffff81e26490 t gfx_v11_cntl_pg +ffffffff81e27000 t gfx_v11_0_3_rlc_gc_fed_irq +ffffffff81e27200 t gfx_v11_0_3_poison_consumption_handler +ffffffff81e28000 t gfx_v8_0_early_init +ffffffff81e282f0 t gfx_v8_0_late_init +ffffffff81e28a10 t gfx_v8_0_sw_init +ffffffff81e28dd0 t gfx_v8_0_sw_fini +ffffffff81e28f70 t gfx_v8_0_hw_init +ffffffff81e2b110 t gfx_v8_0_hw_fini +ffffffff81e2b5c0 t gfx_v8_0_suspend +ffffffff81e2b600 t gfx_v8_0_resume +ffffffff81e2b610 t gfx_v8_0_is_idle +ffffffff81e2b680 t gfx_v8_0_wait_for_idle +ffffffff81e2b730 t gfx_v8_0_check_soft_reset +ffffffff81e2b810 t gfx_v8_0_pre_soft_reset +ffffffff81e2b970 t gfx_v8_0_soft_reset +ffffffff81e2bb30 t gfx_v8_0_post_soft_reset +ffffffff81e2bcb0 t gfx_v8_0_set_clockgating_state +ffffffff81e2bf30 t gfx_v8_0_set_powergating_state +ffffffff81e2c2e0 t gfx_v8_0_get_clockgating_state +ffffffff81e2c3c0 t gfx_v8_0_get_gpu_clock_counter +ffffffff81e2c460 t gfx_v8_0_select_se_sh +ffffffff81e2c4c0 t gfx_v8_0_read_wave_data +ffffffff81e2c960 t gfx_v8_0_read_wave_sgprs +ffffffff81e2ca10 t gfx_v8_0_select_me_pipe_q +ffffffff81e2ca30 t gfx_v8_0_ring_get_rptr +ffffffff81e2ca60 t gfx_v8_0_ring_get_wptr_compute +ffffffff81e2ca90 t gfx_v8_0_ring_set_wptr_compute +ffffffff81e2cad0 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81e2cef0 t gfx_v8_0_ring_test_ring +ffffffff81e2d0f0 t gfx_v8_0_ring_emit_rreg +ffffffff81e2d380 t gfx_v8_0_ring_emit_wreg +ffffffff81e2d5b0 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81e2d610 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81e2d680 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81e2dbe0 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81e2e0d0 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81e2e3c0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81e2e770 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81e2ea90 t gfx_v8_0_ring_emit_gds_switch +ffffffff81e2f240 t gfx_v8_0_ring_test_ib +ffffffff81e2f3f0 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81e2f620 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81e2f6d0 t gfx_v8_ring_emit_sb +ffffffff81e2f7c0 t gfx_v8_ring_emit_cntxcntl +ffffffff81e2fd60 t gfx_v8_0_ring_soft_recovery +ffffffff81e2fd90 t gfx_v8_0_emit_mem_sync +ffffffff81e2ff90 t gfx_v8_0_ring_emit_ib_compute +ffffffff81e30290 t gfx_v8_0_ring_emit_fence_compute +ffffffff81e30590 t gfx_v8_0_emit_mem_sync_compute +ffffffff81e30850 t gfx_v8_0_emit_wave_limit +ffffffff81e30a00 t gfx_v8_0_set_eop_interrupt_state +ffffffff81e30c10 t gfx_v8_0_eop_irq +ffffffff81e30d20 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81e30da0 t gfx_v8_0_priv_reg_irq +ffffffff81e30ea0 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81e30f20 t gfx_v8_0_priv_inst_irq +ffffffff81e31020 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81e31280 t gfx_v8_0_cp_ecc_error_irq +ffffffff81e312d0 t gfx_v8_0_set_sq_int_state +ffffffff81e31360 t gfx_v8_0_sq_irq +ffffffff81e313d0 t gfx_v8_0_parse_sq_irq +ffffffff81e31620 t gfx_v8_0_is_rlc_enabled +ffffffff81e31660 t gfx_v8_0_set_safe_mode +ffffffff81e31760 t gfx_v8_0_unset_safe_mode +ffffffff81e31800 t gfx_v8_0_rlc_init +ffffffff81e318b0 t gfx_v8_0_get_csb_size +ffffffff81e318e0 t gfx_v8_0_get_csb_buffer +ffffffff81e31a50 t gfx_v8_0_cp_jump_table_num +ffffffff81e31a90 t gfx_v8_0_rlc_resume +ffffffff81e31e10 t gfx_v8_0_rlc_stop +ffffffff81e31e80 t gfx_v8_0_rlc_reset +ffffffff81e31f00 t gfx_v8_0_rlc_start +ffffffff81e31f80 t gfx_v8_0_update_spm_vmid +ffffffff81e31ff0 t gfx_v8_0_init_save_restore_list +ffffffff81e32400 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81e32620 t gfx_v8_0_sq_irq_work_func +ffffffff81e32640 t gfx_v8_0_init_microcode +ffffffff81e32eb0 t gfx_v8_0_mec_init +ffffffff81e32fb0 t gfx_v8_0_compute_ring_init +ffffffff81e330e0 t gfx_v8_0_gpu_early_init +ffffffff81e33580 t amdgpu_bo_unreserve +ffffffff81e33660 t gfx_v8_0_kiq_resume +ffffffff81e33910 t gfx_v8_0_cp_gfx_resume +ffffffff81e343d0 t gfx_v8_0_kcq_resume +ffffffff81e34d90 t amdgpu_bo_reserve +ffffffff81e34f00 t gfx_v8_0_mqd_commit +ffffffff81e350e0 t gfx_v8_0_mqd_init +ffffffff81e35500 t gfx_v8_0_deactivate_hqd +ffffffff81e355c0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e35900 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e36000 t gfx_v9_0_ras_error_inject +ffffffff81e361b0 t gfx_v9_0_query_ras_error_count +ffffffff81e36d80 t gfx_v9_0_reset_ras_error_count +ffffffff81e377b0 T gfx_v9_0_select_se_sh +ffffffff81e37850 t gfx_v9_0_early_init +ffffffff81e38380 t gfx_v9_0_late_init +ffffffff81e39270 t gfx_v9_0_sw_init +ffffffff81e39920 t gfx_v9_0_sw_fini +ffffffff81e39ae0 t gfx_v9_0_hw_init +ffffffff81e3ca90 t gfx_v9_0_hw_fini +ffffffff81e3d240 t gfx_v9_0_suspend +ffffffff81e3d280 t gfx_v9_0_resume +ffffffff81e3d290 t gfx_v9_0_is_idle +ffffffff81e3d310 t gfx_v9_0_wait_for_idle +ffffffff81e3d400 t gfx_v9_0_soft_reset +ffffffff81e3d7a0 t gfx_v9_0_set_clockgating_state +ffffffff81e3d870 t gfx_v9_0_set_powergating_state +ffffffff81e3dc60 t gfx_v9_0_get_clockgating_state +ffffffff81e3dd70 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e3e500 t gfx_v9_0_read_wave_data +ffffffff81e3e740 t gfx_v9_0_read_wave_vgprs +ffffffff81e3e7a0 t gfx_v9_0_read_wave_sgprs +ffffffff81e3e7d0 t gfx_v9_0_select_me_pipe_q +ffffffff81e3e7f0 t wave_read_ind +ffffffff81e3e8e0 t wave_read_regs +ffffffff81e3ea30 t gfx_v9_0_kiq_set_resources +ffffffff81e3ed50 t gfx_v9_0_kiq_map_queues +ffffffff81e3f090 t gfx_v9_0_kiq_unmap_queues +ffffffff81e3f3c0 t gfx_v9_0_kiq_query_status +ffffffff81e3f6b0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e3f7d0 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e3f800 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e3f870 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e3f8d0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e3fd00 t gfx_v9_0_ring_test_ring +ffffffff81e3ff30 t gfx_v9_0_ring_emit_rreg +ffffffff81e401c0 t gfx_v9_0_ring_emit_wreg +ffffffff81e403f0 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e40440 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e404e0 t gfx_v9_0_wait_reg_mem +ffffffff81e40810 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e40840 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e40950 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e40a80 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e41100 t gfx_v9_0_ring_emit_fence +ffffffff81e414c0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e41520 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e41630 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e41700 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e417e0 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e41a10 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e41ad0 t gfx_v9_ring_emit_sb +ffffffff81e41bc0 t gfx_v9_ring_emit_cntxcntl +ffffffff81e420a0 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e421b0 t gfx_v9_0_ring_soft_recovery +ffffffff81e42220 t gfx_v9_0_ring_preempt_ib +ffffffff81e423e0 t gfx_v9_0_emit_mem_sync +ffffffff81e426a0 t gfx_v9_0_write_data_to_reg +ffffffff81e428b0 t gfx_v9_0_ring_test_ib +ffffffff81e42a60 t gfx_v9_0_ring_patch_cntl +ffffffff81e42aa0 t gfx_v9_0_ring_patch_ce_meta +ffffffff81e42ba0 t gfx_v9_0_ring_patch_de_meta +ffffffff81e42c70 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e42fa0 t gfx_v9_0_emit_wave_limit +ffffffff81e43180 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e43360 t gfx_v9_0_eop_irq +ffffffff81e434a0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e43660 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e437a0 t gfx_v9_0_priv_reg_irq +ffffffff81e438a0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e439e0 t gfx_v9_0_priv_inst_irq +ffffffff81e43ae0 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e44370 t gfx_v9_0_is_rlc_enabled +ffffffff81e44400 t gfx_v9_0_set_safe_mode +ffffffff81e44560 t gfx_v9_0_unset_safe_mode +ffffffff81e445d0 t gfx_v9_0_rlc_init +ffffffff81e44640 t gfx_v9_0_get_csb_size +ffffffff81e44670 t gfx_v9_0_get_csb_buffer +ffffffff81e447b0 t gfx_v9_0_cp_jump_table_num +ffffffff81e44800 t gfx_v9_0_rlc_resume +ffffffff81e45f10 t gfx_v9_0_rlc_stop +ffffffff81e462b0 t gfx_v9_0_rlc_reset +ffffffff81e46450 t gfx_v9_0_rlc_start +ffffffff81e465a0 t gfx_v9_0_update_spm_vmid +ffffffff81e465e0 t gfx_v9_0_is_rlcg_access_range +ffffffff81e46630 t gfx_v9_0_init_csb +ffffffff81e467c0 t gfx_v9_0_enable_lbpw +ffffffff81e468b0 t gfx_v9_0_update_spm_vmid_internal +ffffffff81e469d0 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e46c60 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e46d60 t gfx_v9_0_mec_init +ffffffff81e46f40 t gfx_v9_0_compute_ring_init +ffffffff81e47080 t gfx_v9_0_gpu_early_init +ffffffff81e474c0 t amdgpu_bo_unreserve +ffffffff81e475a0 t gfx_v9_0_cp_gfx_enable +ffffffff81e47690 t amdgpu_bo_reserve +ffffffff81e47800 t gfx_v9_0_kiq_init_register +ffffffff81e484e0 t gfx_v9_0_mqd_init +ffffffff81e48a30 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e48f60 t gfx_v9_0_update_3d_clock_gating +ffffffff81e49350 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e4a000 t gfx_v9_4_query_ras_error_count +ffffffff81e4ae00 t gfx_v9_4_query_ras_error_status +ffffffff81e4afd0 t gfx_v9_4_reset_ras_error_count +ffffffff81e4c000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e4c720 T gfx_v9_4_2_init_golden_registers +ffffffff81e4c7b0 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e4c890 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e4ca70 t gfx_v9_4_2_query_ras_error_count +ffffffff81e4cb20 t gfx_v9_4_2_query_ras_error_status +ffffffff81e4d380 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e4d3e0 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e4d8b0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e4dad0 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e4db50 t gfx_v9_4_2_run_shader +ffffffff81e4df50 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e4e5a0 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e4e8e0 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e4eac0 t wave_read_ind +ffffffff81e4f000 t gfx_v9_4_3_xcp_suspend +ffffffff81e4f0a0 t gfx_v9_4_3_xcp_resume +ffffffff81e4f1e0 t gfx_v9_4_3_query_ras_error_count +ffffffff81e4f200 t gfx_v9_4_3_query_ras_error_status +ffffffff81e4f220 t gfx_v9_4_3_reset_ras_error_count +ffffffff81e4f240 t gfx_v9_4_3_reset_ras_error_status +ffffffff81e4f260 t gfx_v9_4_3_enable_watchdog_timer +ffffffff81e4f280 t gfx_v9_4_3_early_init +ffffffff81e4f940 t gfx_v9_4_3_late_init +ffffffff81e4f9c0 t gfx_v9_4_3_sw_init +ffffffff81e4fe20 t gfx_v9_4_3_sw_fini +ffffffff81e4ffd0 t gfx_v9_4_3_hw_init +ffffffff81e50a70 t gfx_v9_4_3_hw_fini +ffffffff81e50b30 t gfx_v9_4_3_suspend +ffffffff81e50bf0 t gfx_v9_4_3_resume +ffffffff81e50c00 t gfx_v9_4_3_is_idle +ffffffff81e50db0 t gfx_v9_4_3_wait_for_idle +ffffffff81e50e40 t gfx_v9_4_3_soft_reset +ffffffff81e51550 t gfx_v9_4_3_set_clockgating_state +ffffffff81e516b0 t gfx_v9_4_3_set_powergating_state +ffffffff81e516e0 t gfx_v9_4_3_get_clockgating_state +ffffffff81e51850 t gfx_v9_4_3_kiq_set_resources +ffffffff81e51b70 t gfx_v9_4_3_kiq_map_queues +ffffffff81e51ed0 t gfx_v9_4_3_kiq_unmap_queues +ffffffff81e52250 t gfx_v9_4_3_kiq_query_status +ffffffff81e52540 t gfx_v9_4_3_kiq_invalidate_tlbs +ffffffff81e52660 t gfx_v9_4_3_ring_get_rptr_compute +ffffffff81e526a0 t gfx_v9_4_3_ring_get_wptr_compute +ffffffff81e52710 t gfx_v9_4_3_ring_set_wptr_compute +ffffffff81e52770 t gfx_v9_4_3_ring_emit_fence_kiq +ffffffff81e52bc0 t gfx_v9_4_3_ring_test_ring +ffffffff81e52e20 t gfx_v9_4_3_ring_emit_rreg +ffffffff81e530b0 t gfx_v9_4_3_ring_emit_wreg +ffffffff81e532e0 t gfx_v9_4_3_ring_emit_reg_wait +ffffffff81e53330 t gfx_v9_4_3_ring_emit_reg_write_reg_wait +ffffffff81e53350 t gfx_v9_4_3_wait_reg_mem +ffffffff81e53680 t gfx_v9_4_3_ring_emit_ib_compute +ffffffff81e539b0 t gfx_v9_4_3_ring_emit_fence +ffffffff81e53d60 t gfx_v9_4_3_ring_emit_pipeline_sync +ffffffff81e53dc0 t gfx_v9_4_3_ring_emit_vm_flush +ffffffff81e53de0 t gfx_v9_4_3_ring_emit_hdp_flush +ffffffff81e53eb0 t gfx_v9_4_3_ring_emit_gds_switch +ffffffff81e54050 t gfx_v9_4_3_ring_test_ib +ffffffff81e54200 t gfx_v9_4_3_emit_mem_sync +ffffffff81e544c0 t gfx_v9_4_3_emit_wave_limit +ffffffff81e546b0 t gfx_v9_4_3_write_data_to_reg +ffffffff81e548c0 t gfx_v9_4_3_set_eop_interrupt_state +ffffffff81e54a30 t gfx_v9_4_3_eop_irq +ffffffff81e54bd0 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state +ffffffff81e54d30 t gfx_v9_4_3_ih_to_xcc_inst +ffffffff81e54e00 t gfx_v9_4_3_set_priv_reg_fault_state +ffffffff81e551e0 t gfx_v9_4_3_priv_reg_irq +ffffffff81e55240 t gfx_v9_4_3_fault +ffffffff81e553c0 t gfx_v9_4_3_set_priv_inst_fault_state +ffffffff81e557a0 t gfx_v9_4_3_priv_inst_irq +ffffffff81e55800 t gfx_v9_4_3_is_rlc_enabled +ffffffff81e55920 t gfx_v9_4_3_xcc_set_safe_mode +ffffffff81e55bc0 t gfx_v9_4_3_xcc_unset_safe_mode +ffffffff81e55ce0 t gfx_v9_4_3_rlc_init +ffffffff81e55d30 t gfx_v9_4_3_rlc_resume +ffffffff81e55df0 t gfx_v9_4_3_rlc_stop +ffffffff81e55e90 t gfx_v9_4_3_rlc_reset +ffffffff81e56520 t gfx_v9_4_3_rlc_start +ffffffff81e565c0 t gfx_v9_4_3_update_spm_vmid +ffffffff81e567d0 t gfx_v9_4_3_is_rlcg_access_range +ffffffff81e56880 t gfx_v9_4_3_xcc_rlc_resume +ffffffff81e570d0 t gfx_v9_4_3_xcc_rlc_stop +ffffffff81e577f0 t gfx_v9_4_3_xcc_rlc_start +ffffffff81e57b80 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt +ffffffff81e57da0 t gfx_v9_4_3_xcc_select_se_sh +ffffffff81e57fa0 t gfx_v9_4_3_mec_init +ffffffff81e58290 t gfx_v9_4_3_gpu_early_init +ffffffff81e584c0 t amdgpu_bo_unreserve +ffffffff81e585a0 t gfx_v9_4_3_get_gpu_clock_counter +ffffffff81e588e0 t gfx_v9_4_3_read_wave_data +ffffffff81e58bb0 t gfx_v9_4_3_read_wave_vgprs +ffffffff81e58bd0 t gfx_v9_4_3_read_wave_sgprs +ffffffff81e58c20 t gfx_v9_4_3_select_me_pipe_q +ffffffff81e58c90 t gfx_v9_4_3_switch_compute_partition +ffffffff81e58ff0 t wave_read_ind +ffffffff81e591f0 t wave_read_regs +ffffffff81e59480 t gfx_v9_4_3_xcc_constants_init +ffffffff81e5a500 t gfx_v9_4_3_xcc_cp_resume +ffffffff81e5b4b0 t gfx_v9_4_3_xcc_cp_compute_enable +ffffffff81e5b650 t amdgpu_bo_reserve +ffffffff81e5b7c0 t gfx_v9_4_3_xcc_kiq_init_register +ffffffff81e5d400 t gfx_v9_4_3_xcc_mqd_init +ffffffff81e5de40 t gfx_v9_4_3_xcc_fini +ffffffff81e5e3e0 t gfx_v9_4_3_xcc_q_fini_register +ffffffff81e5ed90 t gfx_v9_4_3_xcc_update_sram_fgcg +ffffffff81e5f000 t gfx_v9_4_3_xcc_update_repeater_fgcg +ffffffff81e5f270 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating +ffffffff81e5fdc0 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating +ffffffff81e60620 t gfx_v9_4_3_inst_query_ras_err_count +ffffffff81e60880 t gfx_v9_4_3_inst_query_ras_err_status +ffffffff81e61600 t gfx_v9_4_3_inst_reset_ras_err_count +ffffffff81e617c0 t gfx_v9_4_3_inst_reset_ras_err_status +ffffffff81e61f40 t gfx_v9_4_3_inst_enable_watchdog_timer +ffffffff81e63000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e63090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e631d0 t gfxhub_v1_0_gart_enable +ffffffff81e64700 t gfxhub_v1_0_gart_disable +ffffffff81e649a0 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e64aa0 t gfxhub_v1_0_init +ffffffff81e65000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e66000 t gfxhub_v1_2_get_mc_fb_offset +ffffffff81e66120 t gfxhub_v1_2_setup_vm_pt_regs +ffffffff81e66190 t gfxhub_v1_2_gart_enable +ffffffff81e66220 t gfxhub_v1_2_gart_disable +ffffffff81e66280 t gfxhub_v1_2_set_fault_enable_default +ffffffff81e662f0 t gfxhub_v1_2_init +ffffffff81e665f0 t gfxhub_v1_2_get_xgmi_info +ffffffff81e66860 t gfxhub_v1_2_xcp_suspend +ffffffff81e668a0 t gfxhub_v1_2_xcp_resume +ffffffff81e66910 t gfxhub_v1_2_xcc_setup_vm_pt_regs +ffffffff81e66c30 t gfxhub_v1_2_xcc_gart_enable +ffffffff81e6a070 t gfxhub_v1_2_xcc_gart_disable +ffffffff81e6a6e0 t gfxhub_v1_2_xcc_set_fault_enable_default +ffffffff81e6b000 t gfxhub_v2_0_get_fb_location +ffffffff81e6b090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e6b120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e6b260 t gfxhub_v2_0_gart_enable +ffffffff81e6c490 t gfxhub_v2_0_gart_disable +ffffffff81e6c6e0 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e6c7e0 t gfxhub_v2_0_init +ffffffff81e6c8b0 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e6ca80 t gfxhub_v2_0_get_invalidate_req +ffffffff81e6d000 t gfxhub_v2_1_get_fb_location +ffffffff81e6d090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e6d120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e6d260 t gfxhub_v2_1_gart_enable +ffffffff81e6e560 t gfxhub_v2_1_gart_disable +ffffffff81e6e7b0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e6e8d0 t gfxhub_v2_1_init +ffffffff81e6e9a0 t gfxhub_v2_1_get_xgmi_info +ffffffff81e6eae0 t gfxhub_v2_1_utcl2_harvest +ffffffff81e6ecc0 t gfxhub_v2_1_save_regs +ffffffff81e6f730 t gfxhub_v2_1_restore_regs +ffffffff81e70350 t gfxhub_v2_1_halt +ffffffff81e70720 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e708f0 t gfxhub_v2_1_get_invalidate_req +ffffffff81e71000 t gfxhub_v3_0_get_fb_location +ffffffff81e71090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e71120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e71260 t gfxhub_v3_0_gart_enable +ffffffff81e72560 t gfxhub_v3_0_gart_disable +ffffffff81e72800 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e729d0 t gfxhub_v3_0_init +ffffffff81e72aa0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e72c70 t gfxhub_v3_0_get_invalidate_req +ffffffff81e73000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e73090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e73120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e73260 t gfxhub_v3_0_3_gart_enable +ffffffff81e74450 t gfxhub_v3_0_3_gart_disable +ffffffff81e746f0 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e74810 t gfxhub_v3_0_3_init +ffffffff81e748e0 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e74ab0 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e75000 t gmc_v10_0_early_init +ffffffff81e75170 t gmc_v10_0_late_init +ffffffff81e751e0 t gmc_v10_0_sw_init +ffffffff81e755d0 t gmc_v10_0_sw_fini +ffffffff81e75620 t gmc_v10_0_hw_init +ffffffff81e75830 t gmc_v10_0_hw_fini +ffffffff81e758d0 t gmc_v10_0_suspend +ffffffff81e75970 t gmc_v10_0_resume +ffffffff81e759d0 t gmc_v10_0_is_idle +ffffffff81e75a00 t gmc_v10_0_wait_for_idle +ffffffff81e75a30 t gmc_v10_0_soft_reset +ffffffff81e75a60 t gmc_v10_0_set_clockgating_state +ffffffff81e75b10 t gmc_v10_0_set_powergating_state +ffffffff81e75b40 t gmc_v10_0_get_clockgating_state +ffffffff81e75be0 t gmc_v10_0_flush_gpu_tlb +ffffffff81e75e70 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e76120 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e762d0 t gmc_v10_0_emit_pasid_mapping +ffffffff81e76350 t gmc_v10_0_map_mtype +ffffffff81e763a0 t gmc_v10_0_get_vm_pde +ffffffff81e76490 t gmc_v10_0_get_vm_pte +ffffffff81e76570 t gmc_v10_0_get_vbios_fb_size +ffffffff81e766e0 t gmc_v10_0_flush_vm_hub +ffffffff81e76b10 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e76bb0 t gmc_v10_0_process_interrupt +ffffffff81e76e90 t gmc_v10_0_ecc_interrupt_state +ffffffff81e76ec0 t gmc_v10_0_gart_init +ffffffff81e77000 t gmc_v11_0_early_init +ffffffff81e771f0 t gmc_v11_0_late_init +ffffffff81e77260 t gmc_v11_0_sw_init +ffffffff81e77570 t gmc_v11_0_sw_fini +ffffffff81e775c0 t gmc_v11_0_hw_init +ffffffff81e77720 t gmc_v11_0_hw_fini +ffffffff81e777a0 t gmc_v11_0_suspend +ffffffff81e77820 t gmc_v11_0_resume +ffffffff81e77880 t gmc_v11_0_is_idle +ffffffff81e778b0 t gmc_v11_0_wait_for_idle +ffffffff81e778e0 t gmc_v11_0_soft_reset +ffffffff81e77910 t gmc_v11_0_set_clockgating_state +ffffffff81e77990 t gmc_v11_0_set_powergating_state +ffffffff81e779c0 t gmc_v11_0_get_clockgating_state +ffffffff81e77a00 t gmc_v11_0_flush_gpu_tlb +ffffffff81e77eb0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e78120 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e782d0 t gmc_v11_0_emit_pasid_mapping +ffffffff81e78350 t gmc_v11_0_map_mtype +ffffffff81e783a0 t gmc_v11_0_get_vm_pde +ffffffff81e784a0 t gmc_v11_0_get_vm_pte +ffffffff81e78580 t gmc_v11_0_get_vbios_fb_size +ffffffff81e786f0 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e78790 t gmc_v11_0_process_interrupt +ffffffff81e789c0 t gmc_v11_0_ecc_interrupt_state +ffffffff81e789f0 t gmc_v11_0_gart_init +ffffffff81e79000 t gmc_v7_0_early_init +ffffffff81e790a0 t gmc_v7_0_late_init +ffffffff81e790f0 t gmc_v7_0_sw_init +ffffffff81e79520 t gmc_v7_0_sw_fini +ffffffff81e795a0 t gmc_v7_0_hw_init +ffffffff81e79f10 t gmc_v7_0_hw_fini +ffffffff81e79fd0 t gmc_v7_0_suspend +ffffffff81e7a010 t gmc_v7_0_resume +ffffffff81e7a070 t gmc_v7_0_is_idle +ffffffff81e7a0c0 t gmc_v7_0_wait_for_idle +ffffffff81e7a160 t gmc_v7_0_soft_reset +ffffffff81e7a3c0 t gmc_v7_0_set_clockgating_state +ffffffff81e7a620 t gmc_v7_0_set_powergating_state +ffffffff81e7a650 t gmc_v7_0_flush_gpu_tlb +ffffffff81e7a680 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e7a740 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e7a7e0 t gmc_v7_0_emit_pasid_mapping +ffffffff81e7a810 t gmc_v7_0_set_prt +ffffffff81e7a9d0 t gmc_v7_0_get_vm_pde +ffffffff81e7aa30 t gmc_v7_0_get_vm_pte +ffffffff81e7aa70 t gmc_v7_0_get_vbios_fb_size +ffffffff81e7aae0 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e7abb0 t gmc_v7_0_process_interrupt +ffffffff81e7ae50 t gmc_v7_0_gart_init +ffffffff81e7b000 t gmc_v8_0_early_init +ffffffff81e7b0a0 t gmc_v8_0_late_init +ffffffff81e7b0f0 t gmc_v8_0_sw_init +ffffffff81e7b6a0 t gmc_v8_0_sw_fini +ffffffff81e7b720 t gmc_v8_0_hw_init +ffffffff81e7c390 t gmc_v8_0_hw_fini +ffffffff81e7c450 t gmc_v8_0_suspend +ffffffff81e7c490 t gmc_v8_0_resume +ffffffff81e7c4f0 t gmc_v8_0_is_idle +ffffffff81e7c540 t gmc_v8_0_wait_for_idle +ffffffff81e7c5e0 t gmc_v8_0_check_soft_reset +ffffffff81e7c650 t gmc_v8_0_pre_soft_reset +ffffffff81e7c7c0 t gmc_v8_0_soft_reset +ffffffff81e7c890 t gmc_v8_0_post_soft_reset +ffffffff81e7c900 t gmc_v8_0_set_clockgating_state +ffffffff81e7cec0 t gmc_v8_0_set_powergating_state +ffffffff81e7cef0 t gmc_v8_0_get_clockgating_state +ffffffff81e7cf60 t gmc_v8_0_flush_gpu_tlb +ffffffff81e7cf90 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e7d050 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e7d0f0 t gmc_v8_0_emit_pasid_mapping +ffffffff81e7d120 t gmc_v8_0_set_prt +ffffffff81e7d2e0 t gmc_v8_0_get_vm_pde +ffffffff81e7d340 t gmc_v8_0_get_vm_pte +ffffffff81e7d390 t gmc_v8_0_get_vbios_fb_size +ffffffff81e7d400 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e7d4d0 t gmc_v8_0_process_interrupt +ffffffff81e7d860 t gmc_v8_0_gart_init +ffffffff81e7e000 T gmc_v9_0_restore_registers +ffffffff81e7e160 t gmc_v9_0_early_init +ffffffff81e7e510 t gmc_v9_0_late_init +ffffffff81e7e620 t gmc_v9_0_sw_init +ffffffff81e7ed80 t gmc_v9_0_sw_fini +ffffffff81e7ee40 t gmc_v9_0_hw_init +ffffffff81e7f2f0 t gmc_v9_0_hw_fini +ffffffff81e7f3b0 t gmc_v9_0_suspend +ffffffff81e7f470 t gmc_v9_0_resume +ffffffff81e7f4d0 t gmc_v9_0_is_idle +ffffffff81e7f500 t gmc_v9_0_wait_for_idle +ffffffff81e7f530 t gmc_v9_0_soft_reset +ffffffff81e7f560 t gmc_v9_0_set_clockgating_state +ffffffff81e7f5c0 t gmc_v9_0_set_powergating_state +ffffffff81e7f5f0 t gmc_v9_0_get_clockgating_state +ffffffff81e7f630 t gmc_v9_0_flush_gpu_tlb +ffffffff81e7fcd0 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e80080 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e80280 t gmc_v9_0_emit_pasid_mapping +ffffffff81e80300 t gmc_v9_0_map_mtype +ffffffff81e80340 t gmc_v9_0_get_vm_pde +ffffffff81e80440 t gmc_v9_0_get_vm_pte +ffffffff81e80770 t gmc_v9_0_override_vm_pte_flags +ffffffff81e80830 t gmc_v9_0_get_vbios_fb_size +ffffffff81e809d0 t gmc_v9_0_query_memory_partition +ffffffff81e80a30 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e80ed0 t gmc_v9_0_process_interrupt +ffffffff81e816d0 t gmc_v9_0_ecc_interrupt_state +ffffffff81e81830 t gmc_v9_0_init_mem_ranges +ffffffff81e81c50 t gmc_v9_0_gart_init +ffffffff81e81d80 t gmc_v9_0_save_registers +ffffffff81e82000 t hdp_v4_0_query_ras_error_count +ffffffff81e820c0 t hdp_v4_0_reset_ras_error_count +ffffffff81e821e0 t hdp_v4_0_flush_hdp +ffffffff81e82230 t hdp_v4_0_invalidate_hdp +ffffffff81e82310 t hdp_v4_0_update_clock_gating +ffffffff81e82410 t hdp_v4_0_get_clockgating_state +ffffffff81e82460 t hdp_v4_0_init_registers +ffffffff81e83000 t hdp_v5_0_flush_hdp +ffffffff81e83050 t hdp_v5_0_invalidate_hdp +ffffffff81e830f0 t hdp_v5_0_update_clock_gating +ffffffff81e834f0 t hdp_v5_0_get_clockgating_state +ffffffff81e83610 t hdp_v5_0_init_registers +ffffffff81e84000 t hdp_v5_2_flush_hdp +ffffffff81e84050 t hdp_v5_2_update_clock_gating +ffffffff81e84460 t hdp_v5_2_get_clockgating_state +ffffffff81e85000 t hdp_v6_0_flush_hdp +ffffffff81e85050 t hdp_v6_0_update_clock_gating +ffffffff81e85380 t hdp_v6_0_get_clockgating_state +ffffffff81e86000 t iceland_ih_early_init +ffffffff81e86050 t iceland_ih_sw_init +ffffffff81e860b0 t iceland_ih_sw_fini +ffffffff81e860f0 t iceland_ih_hw_init +ffffffff81e86310 t iceland_ih_hw_fini +ffffffff81e863e0 t iceland_ih_suspend +ffffffff81e864b0 t iceland_ih_resume +ffffffff81e864f0 t iceland_ih_is_idle +ffffffff81e86540 t iceland_ih_wait_for_idle +ffffffff81e865e0 t iceland_ih_soft_reset +ffffffff81e866c0 t iceland_ih_set_clockgating_state +ffffffff81e866f0 t iceland_ih_set_powergating_state +ffffffff81e86720 t iceland_ih_get_wptr +ffffffff81e86810 t iceland_ih_decode_iv +ffffffff81e86890 t iceland_ih_set_rptr +ffffffff81e87000 t ih_v6_0_early_init +ffffffff81e87050 t ih_v6_0_sw_init +ffffffff81e871b0 t ih_v6_0_sw_fini +ffffffff81e871f0 t ih_v6_0_hw_init +ffffffff81e877a0 t ih_v6_0_hw_fini +ffffffff81e87800 t ih_v6_0_suspend +ffffffff81e87860 t ih_v6_0_resume +ffffffff81e87870 t ih_v6_0_is_idle +ffffffff81e878a0 t ih_v6_0_wait_for_idle +ffffffff81e878d0 t ih_v6_0_soft_reset +ffffffff81e87900 t ih_v6_0_set_clockgating_state +ffffffff81e87a30 t ih_v6_0_set_powergating_state +ffffffff81e87bb0 t ih_v6_0_get_clockgating_state +ffffffff81e87c40 t ih_v6_0_get_wptr +ffffffff81e87d30 t ih_v6_0_set_rptr +ffffffff81e87e00 t ih_v6_0_self_irq +ffffffff81e87e70 t ih_v6_0_toggle_interrupts +ffffffff81e88050 t force_update_wptr_for_self_int +ffffffff81e89000 t ih_v6_1_early_init +ffffffff81e89050 t ih_v6_1_sw_init +ffffffff81e891b0 t ih_v6_1_sw_fini +ffffffff81e891f0 t ih_v6_1_hw_init +ffffffff81e897a0 t ih_v6_1_hw_fini +ffffffff81e89800 t ih_v6_1_suspend +ffffffff81e89860 t ih_v6_1_resume +ffffffff81e89870 t ih_v6_1_is_idle +ffffffff81e898a0 t ih_v6_1_wait_for_idle +ffffffff81e898d0 t ih_v6_1_soft_reset +ffffffff81e89900 t ih_v6_1_set_clockgating_state +ffffffff81e89a30 t ih_v6_1_set_powergating_state +ffffffff81e89bb0 t ih_v6_1_get_clockgating_state +ffffffff81e89c40 t ih_v6_1_get_wptr +ffffffff81e89d30 t ih_v6_1_set_rptr +ffffffff81e89e00 t ih_v6_1_self_irq +ffffffff81e89e70 t ih_v6_1_toggle_interrupts +ffffffff81e8a050 t force_update_wptr_for_self_int +ffffffff81e8b000 t imu_v11_0_init_microcode +ffffffff81e8b170 t imu_v11_0_load_microcode +ffffffff81e8b4f0 t imu_v11_0_setup +ffffffff81e8b780 t imu_v11_0_start +ffffffff81e8b880 t imu_v11_0_program_rlc_ram +ffffffff81e8ba40 t imu_v11_0_wait_for_reset_status +ffffffff81e8bb90 t program_imu_rlc_ram +ffffffff81e8c000 T imu_v11_0_3_program_rlc_ram +ffffffff81e8d000 T jpeg_v1_0_early_init +ffffffff81e8d080 T jpeg_v1_0_sw_init +ffffffff81e8d170 T jpeg_v1_0_sw_fini +ffffffff81e8d190 T jpeg_v1_0_start +ffffffff81e8dc40 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e8dcd0 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e8dd60 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e8ddd0 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e8e6f0 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e8f030 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e8f0a0 t jpeg_v1_0_decode_ring_nop +ffffffff81e8f200 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e8f3c0 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e8f580 t jpeg_v1_0_ring_begin_use +ffffffff81e8f680 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e8f8e0 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e8fd00 t jpeg_v1_0_set_interrupt_state +ffffffff81e8fd30 t jpeg_v1_0_process_interrupt +ffffffff81e90000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e901a0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e90340 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e90a20 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e911d0 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e91580 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e915f0 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e91830 T jpeg_v2_0_dec_ring_nop +ffffffff81e91990 t jpeg_v2_0_early_init +ffffffff81e91a20 t jpeg_v2_0_sw_init +ffffffff81e91b50 t jpeg_v2_0_sw_fini +ffffffff81e91ba0 t jpeg_v2_0_hw_init +ffffffff81e91c20 t jpeg_v2_0_hw_fini +ffffffff81e91d00 t jpeg_v2_0_suspend +ffffffff81e91d30 t jpeg_v2_0_resume +ffffffff81e91dc0 t jpeg_v2_0_is_idle +ffffffff81e91e50 t jpeg_v2_0_wait_for_idle +ffffffff81e91e90 t jpeg_v2_0_set_clockgating_state +ffffffff81e91f40 t jpeg_v2_0_set_powergating_state +ffffffff81e92660 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e926f0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e92790 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e92830 t jpeg_v2_0_set_interrupt_state +ffffffff81e92860 t jpeg_v2_0_process_interrupt +ffffffff81e928f0 t jpeg_v2_0_enable_clock_gating +ffffffff81e92aa0 t jpeg_v2_0_disable_clock_gating +ffffffff81e93000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e93150 t jpeg_v2_5_early_init +ffffffff81e93350 t jpeg_v2_5_sw_init +ffffffff81e935f0 t jpeg_v2_5_sw_fini +ffffffff81e93640 t jpeg_v2_5_hw_init +ffffffff81e93730 t jpeg_v2_5_hw_fini +ffffffff81e938b0 t jpeg_v2_5_suspend +ffffffff81e938e0 t jpeg_v2_5_resume +ffffffff81e939e0 t jpeg_v2_5_is_idle +ffffffff81e93ae0 t jpeg_v2_5_wait_for_idle +ffffffff81e93b90 t jpeg_v2_5_set_clockgating_state +ffffffff81e93c40 t jpeg_v2_5_set_powergating_state +ffffffff81e94370 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e94410 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e944c0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e94570 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e94730 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e948f0 t jpeg_v2_5_set_interrupt_state +ffffffff81e94920 t jpeg_v2_5_process_interrupt +ffffffff81e949e0 t jpeg_v2_6_set_ras_interrupt_state +ffffffff81e94a10 t jpeg_v2_5_enable_clock_gating +ffffffff81e94af0 t jpeg_v2_5_disable_clock_gating +ffffffff81e95000 t jpeg_v3_0_early_init +ffffffff81e95110 t jpeg_v3_0_sw_init +ffffffff81e95240 t jpeg_v3_0_sw_fini +ffffffff81e95290 t jpeg_v3_0_hw_init +ffffffff81e95310 t jpeg_v3_0_hw_fini +ffffffff81e953f0 t jpeg_v3_0_suspend +ffffffff81e95420 t jpeg_v3_0_resume +ffffffff81e954b0 t jpeg_v3_0_is_idle +ffffffff81e95540 t jpeg_v3_0_wait_for_idle +ffffffff81e95580 t jpeg_v3_0_set_clockgating_state +ffffffff81e95630 t jpeg_v3_0_set_powergating_state +ffffffff81e95e10 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e95ea0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e95f40 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e95fe0 t jpeg_v3_0_set_interrupt_state +ffffffff81e96010 t jpeg_v3_0_process_interrupt +ffffffff81e960a0 t jpeg_v3_0_enable_clock_gating +ffffffff81e96170 t jpeg_v3_0_disable_clock_gating +ffffffff81e97000 t jpeg_v4_0_query_ras_poison_status +ffffffff81e97150 t jpeg_v4_0_early_init +ffffffff81e97220 t jpeg_v4_0_sw_init +ffffffff81e973c0 t jpeg_v4_0_sw_fini +ffffffff81e97410 t jpeg_v4_0_hw_init +ffffffff81e97a40 t jpeg_v4_0_hw_fini +ffffffff81e97b10 t jpeg_v4_0_suspend +ffffffff81e97b40 t jpeg_v4_0_resume +ffffffff81e97b90 t jpeg_v4_0_is_idle +ffffffff81e97c20 t jpeg_v4_0_wait_for_idle +ffffffff81e97c60 t jpeg_v4_0_set_clockgating_state +ffffffff81e97d10 t jpeg_v4_0_set_powergating_state +ffffffff81e98470 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81e98500 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81e985a0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81e98640 t jpeg_v4_0_set_interrupt_state +ffffffff81e98670 t jpeg_v4_0_process_interrupt +ffffffff81e98710 t jpeg_v4_0_set_ras_interrupt_state +ffffffff81e98740 t jpeg_v4_0_enable_clock_gating +ffffffff81e98900 t jpeg_v4_0_disable_clock_gating +ffffffff81e99000 t jpeg_v4_0_3_early_init +ffffffff81e99170 t jpeg_v4_0_3_sw_init +ffffffff81e994a0 t jpeg_v4_0_3_sw_fini +ffffffff81e994f0 t jpeg_v4_0_3_hw_init +ffffffff81e99f50 t jpeg_v4_0_3_hw_fini +ffffffff81e99fe0 t jpeg_v4_0_3_suspend +ffffffff81e9a060 t jpeg_v4_0_3_resume +ffffffff81e9a0b0 t jpeg_v4_0_3_is_idle +ffffffff81e9a290 t jpeg_v4_0_3_wait_for_idle +ffffffff81e9a3e0 t jpeg_v4_0_3_set_clockgating_state +ffffffff81e9a470 t jpeg_v4_0_3_set_powergating_state +ffffffff81e9b0d0 t jpeg_v4_0_3_dec_ring_get_rptr +ffffffff81e9b240 t jpeg_v4_0_3_dec_ring_get_wptr +ffffffff81e9b3d0 t jpeg_v4_0_3_dec_ring_set_wptr +ffffffff81e9b570 t jpeg_v4_0_3_dec_ring_emit_ib +ffffffff81e9bdd0 t jpeg_v4_0_3_dec_ring_emit_fence +ffffffff81e9c560 t jpeg_v4_0_3_dec_ring_emit_vm_flush +ffffffff81e9c5d0 t jpeg_v4_0_3_dec_ring_nop +ffffffff81e9c730 t jpeg_v4_0_3_dec_ring_insert_start +ffffffff81e9c8d0 t jpeg_v4_0_3_dec_ring_insert_end +ffffffff81e9ca70 t jpeg_v4_0_3_dec_ring_emit_wreg +ffffffff81e9ccb0 t jpeg_v4_0_3_dec_ring_emit_reg_wait +ffffffff81e9d060 t jpeg_v4_0_3_set_interrupt_state +ffffffff81e9d090 t jpeg_v4_0_3_process_interrupt +ffffffff81e9d2d0 t jpeg_v4_0_3_query_ras_error_count +ffffffff81e9d3c0 t jpeg_v4_0_3_reset_ras_error_count +ffffffff81e9d4b0 t jpeg_v4_0_3_disable_clock_gating +ffffffff81e9e000 t lsdma_v6_0_copy_mem +ffffffff81e9e370 t lsdma_v6_0_fill_mem +ffffffff81e9e660 t lsdma_v6_0_update_memory_power_gating +ffffffff81e9f000 t mca_v3_0_ras_block_match +ffffffff81e9f050 t mca_v3_0_mp0_query_ras_error_count +ffffffff81e9f070 t mca_v3_0_mp1_query_ras_error_count +ffffffff81e9f090 t mca_v3_0_mpio_query_ras_error_count +ffffffff81ea0000 t mes_v10_0_early_init +ffffffff81ea0060 t mes_v10_0_late_init +ffffffff81ea00b0 t mes_v10_1_sw_init +ffffffff81ea0550 t mes_v10_1_sw_fini +ffffffff81ea0670 t mes_v10_1_hw_init +ffffffff81ea0f60 t mes_v10_1_hw_fini +ffffffff81ea1050 t mes_v10_1_suspend +ffffffff81ea1160 t mes_v10_1_resume +ffffffff81ea11b0 t mes_v10_1_kiq_hw_init +ffffffff81ea15c0 t mes_v10_1_add_hw_queue +ffffffff81ea1740 t mes_v10_1_remove_hw_queue +ffffffff81ea17d0 t mes_v10_1_unmap_legacy_queue +ffffffff81ea18c0 t mes_v10_1_suspend_gang +ffffffff81ea18f0 t mes_v10_1_resume_gang +ffffffff81ea1920 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81ea1b20 t mes_v10_1_load_microcode +ffffffff81ea2340 t mes_v10_1_enable +ffffffff81ea27c0 t mes_v10_1_queue_init +ffffffff81ea2a60 t amdgpu_bo_unreserve +ffffffff81ea2b40 t mes_v10_1_ring_get_rptr +ffffffff81ea2b70 t mes_v10_1_ring_get_wptr +ffffffff81ea2be0 t mes_v10_1_ring_set_wptr +ffffffff81ea3000 t mes_v11_0_early_init +ffffffff81ea3060 t mes_v11_0_late_init +ffffffff81ea30d0 t mes_v11_0_sw_init +ffffffff81ea3570 t mes_v11_0_sw_fini +ffffffff81ea3730 t mes_v11_0_hw_init +ffffffff81ea3f60 t mes_v11_0_hw_fini +ffffffff81ea3f90 t mes_v11_0_suspend +ffffffff81ea3fa0 t mes_v11_0_resume +ffffffff81ea3ff0 t mes_v11_0_kiq_hw_init +ffffffff81ea4200 t mes_v11_0_kiq_hw_fini +ffffffff81ea4340 t mes_v11_0_add_hw_queue +ffffffff81ea4540 t mes_v11_0_remove_hw_queue +ffffffff81ea45d0 t mes_v11_0_unmap_legacy_queue +ffffffff81ea46d0 t mes_v11_0_suspend_gang +ffffffff81ea4700 t mes_v11_0_resume_gang +ffffffff81ea4730 t mes_v11_0_misc_op +ffffffff81ea48f0 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff81ea4b10 t mes_v11_0_load_microcode +ffffffff81ea52a0 t mes_v11_0_enable +ffffffff81ea57b0 t mes_v11_0_queue_init +ffffffff81ea6250 t amdgpu_bo_unreserve +ffffffff81ea6330 t mes_v11_0_mqd_init +ffffffff81ea6520 t mes_v11_0_kiq_dequeue +ffffffff81ea6960 t mes_v11_0_ring_get_rptr +ffffffff81ea6990 t mes_v11_0_ring_get_wptr +ffffffff81ea6a00 t mes_v11_0_ring_set_wptr +ffffffff81ea7000 t mmhub_v1_0_query_ras_error_count +ffffffff81ea7150 t mmhub_v1_0_reset_ras_error_count +ffffffff81ea7200 t mmhub_v1_0_get_fb_location +ffffffff81ea7320 t mmhub_v1_0_init +ffffffff81ea73d0 t mmhub_v1_0_gart_enable +ffffffff81ea8720 t mmhub_v1_0_set_fault_enable_default +ffffffff81ea8840 t mmhub_v1_0_gart_disable +ffffffff81ea8ae0 t mmhub_v1_0_set_clockgating +ffffffff81ea8f70 t mmhub_v1_0_get_clockgating +ffffffff81ea9090 t mmhub_v1_0_setup_vm_pt_regs +ffffffff81ea91d0 t mmhub_v1_0_update_power_gating +ffffffff81eaa000 t mmhub_v1_7_query_ras_error_count +ffffffff81eaa150 t mmhub_v1_7_query_ras_error_status +ffffffff81eaa230 t mmhub_v1_7_reset_ras_error_count +ffffffff81eaa2d0 t mmhub_v1_7_reset_ras_error_status +ffffffff81eaa3d0 t mmhub_v1_7_get_fb_location +ffffffff81eaa4f0 t mmhub_v1_7_init +ffffffff81eaa590 t mmhub_v1_7_gart_enable +ffffffff81eabaa0 t mmhub_v1_7_set_fault_enable_default +ffffffff81eabbc0 t mmhub_v1_7_gart_disable +ffffffff81eabe60 t mmhub_v1_7_set_clockgating +ffffffff81eac200 t mmhub_v1_7_get_clockgating +ffffffff81eac320 t mmhub_v1_7_setup_vm_pt_regs +ffffffff81ead000 t mmhub_v1_8_get_fb_location +ffffffff81ead120 t mmhub_v1_8_init +ffffffff81ead280 t mmhub_v1_8_gart_enable +ffffffff81eaee90 t mmhub_v1_8_set_fault_enable_default +ffffffff81eaf060 t mmhub_v1_8_gart_disable +ffffffff81eaf3a0 t mmhub_v1_8_set_clockgating +ffffffff81eaf3d0 t mmhub_v1_8_get_clockgating +ffffffff81eaf400 t mmhub_v1_8_setup_vm_pt_regs +ffffffff81eaf610 t mmhub_v1_8_query_ras_error_count +ffffffff81eaf770 t mmhub_v1_8_query_ras_error_status +ffffffff81eafa20 t mmhub_v1_8_reset_ras_error_count +ffffffff81eafb30 t mmhub_v1_8_reset_ras_error_status +ffffffff81eb1000 t mmhub_v2_0_init +ffffffff81eb10d0 t mmhub_v2_0_gart_enable +ffffffff81eb2290 t mmhub_v2_0_set_fault_enable_default +ffffffff81eb23b0 t mmhub_v2_0_gart_disable +ffffffff81eb2640 t mmhub_v2_0_set_clockgating +ffffffff81eb2990 t mmhub_v2_0_get_clockgating +ffffffff81eb2b20 t mmhub_v2_0_setup_vm_pt_regs +ffffffff81eb2c60 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff81eb2eb0 t mmhub_v2_0_get_invalidate_req +ffffffff81eb3000 t mmhub_v2_3_init +ffffffff81eb30e0 t mmhub_v2_3_gart_enable +ffffffff81eb44b0 t mmhub_v2_3_set_fault_enable_default +ffffffff81eb45b0 t mmhub_v2_3_gart_disable +ffffffff81eb4850 t mmhub_v2_3_set_clockgating +ffffffff81eb4cf0 t mmhub_v2_3_get_clockgating +ffffffff81eb4ee0 t mmhub_v2_3_setup_vm_pt_regs +ffffffff81eb5020 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff81eb5230 t mmhub_v2_3_get_invalidate_req +ffffffff81eb6000 t mmhub_v3_0_get_fb_location +ffffffff81eb6090 t mmhub_v3_0_get_mc_fb_offset +ffffffff81eb6120 t mmhub_v3_0_init +ffffffff81eb6200 t mmhub_v3_0_gart_enable +ffffffff81eb7420 t mmhub_v3_0_set_fault_enable_default +ffffffff81eb7540 t mmhub_v3_0_gart_disable +ffffffff81eb77d0 t mmhub_v3_0_set_clockgating +ffffffff81eb79a0 t mmhub_v3_0_get_clockgating +ffffffff81eb7a50 t mmhub_v3_0_setup_vm_pt_regs +ffffffff81eb7b90 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff81eb7d90 t mmhub_v3_0_get_invalidate_req +ffffffff81eb8000 t mmhub_v3_0_1_get_fb_location +ffffffff81eb8090 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff81eb8120 t mmhub_v3_0_1_init +ffffffff81eb81f0 t mmhub_v3_0_1_gart_enable +ffffffff81eb94f0 t mmhub_v3_0_1_set_fault_enable_default +ffffffff81eb95f0 t mmhub_v3_0_1_gart_disable +ffffffff81eb9890 t mmhub_v3_0_1_set_clockgating +ffffffff81eb9a50 t mmhub_v3_0_1_get_clockgating +ffffffff81eb9b00 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff81eb9c40 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff81eb9e40 t mmhub_v3_0_1_get_invalidate_req +ffffffff81eba000 t mmhub_v3_0_2_get_fb_location +ffffffff81eba090 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff81eba120 t mmhub_v3_0_2_init +ffffffff81eba1f0 t mmhub_v3_0_2_gart_enable +ffffffff81ebb3e0 t mmhub_v3_0_2_set_fault_enable_default +ffffffff81ebb500 t mmhub_v3_0_2_gart_disable +ffffffff81ebb790 t mmhub_v3_0_2_set_clockgating +ffffffff81ebb7c0 t mmhub_v3_0_2_get_clockgating +ffffffff81ebb7f0 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff81ebb930 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff81ebbb10 t mmhub_v3_0_2_get_invalidate_req +ffffffff81ebc000 t mmhub_v9_4_query_ras_error_count +ffffffff81ebc150 t mmhub_v9_4_query_ras_error_status +ffffffff81ebc230 t mmhub_v9_4_reset_ras_error_count +ffffffff81ebc300 t mmhub_v9_4_get_fb_location +ffffffff81ebc420 t mmhub_v9_4_init +ffffffff81ebc570 t mmhub_v9_4_gart_enable +ffffffff81ebda00 t mmhub_v9_4_set_fault_enable_default +ffffffff81ebdbf0 t mmhub_v9_4_gart_disable +ffffffff81ebdf60 t mmhub_v9_4_set_clockgating +ffffffff81ebe440 t mmhub_v9_4_get_clockgating +ffffffff81ebe570 t mmhub_v9_4_setup_vm_pt_regs +ffffffff81ebe5c0 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff81ebf000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff81ebf050 T xgpu_ai_mailbox_add_irq_id +ffffffff81ebf0e0 T xgpu_ai_mailbox_get_irq +ffffffff81ebf190 t xgpu_ai_mailbox_flr_work +ffffffff81ebf390 T xgpu_ai_mailbox_put_irq +ffffffff81ebf3d0 t xgpu_ai_request_full_gpu_access +ffffffff81ebf3f0 t xgpu_ai_release_full_gpu_access +ffffffff81ebf410 t xgpu_ai_request_init_data +ffffffff81ebf470 t xgpu_ai_request_reset +ffffffff81ebf520 t xgpu_ai_mailbox_trans_msg +ffffffff81ebf740 t xgpu_ai_ras_poison_handler +ffffffff81ebf770 t xgpu_ai_set_mailbox_ack_irq +ffffffff81ebf800 t xgpu_ai_mailbox_ack_irq +ffffffff81ebf850 t xgpu_ai_set_mailbox_rcv_irq +ffffffff81ebf8e0 t xgpu_ai_mailbox_rcv_irq +ffffffff81ebf9c0 t xgpu_ai_send_access_requests +ffffffff81ebfab0 t xgpu_ai_poll_msg +ffffffff81ec0000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81ec0050 T xgpu_nv_mailbox_add_irq_id +ffffffff81ec00e0 T xgpu_nv_mailbox_get_irq +ffffffff81ec0190 t xgpu_nv_mailbox_flr_work +ffffffff81ec03b0 T xgpu_nv_mailbox_put_irq +ffffffff81ec03f0 t xgpu_nv_request_full_gpu_access +ffffffff81ec0410 t xgpu_nv_release_full_gpu_access +ffffffff81ec0430 t xgpu_nv_request_init_data +ffffffff81ec0450 t xgpu_nv_request_reset +ffffffff81ec0550 t xgpu_nv_mailbox_trans_msg +ffffffff81ec06f0 t xgpu_nv_ras_poison_handler +ffffffff81ec0710 t xgpu_nv_set_mailbox_ack_irq +ffffffff81ec0790 t xgpu_nv_mailbox_ack_irq +ffffffff81ec07e0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81ec0860 t xgpu_nv_mailbox_rcv_irq +ffffffff81ec0910 t xgpu_nv_send_access_requests +ffffffff81ec1000 T xgpu_vi_init_golden_registers +ffffffff81ec10c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81ec1110 T xgpu_vi_mailbox_add_irq_id +ffffffff81ec11a0 T xgpu_vi_mailbox_get_irq +ffffffff81ec1250 t xgpu_vi_mailbox_flr_work +ffffffff81ec13a0 T xgpu_vi_mailbox_put_irq +ffffffff81ec13e0 t xgpu_vi_request_full_gpu_access +ffffffff81ec1400 t xgpu_vi_release_full_gpu_access +ffffffff81ec1420 t xgpu_vi_request_reset +ffffffff81ec1440 t xgpu_vi_wait_reset_cmpl +ffffffff81ec1520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81ec15a0 t xgpu_vi_mailbox_ack_irq +ffffffff81ec15f0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81ec1670 t xgpu_vi_mailbox_rcv_irq +ffffffff81ec1720 t xgpu_vi_mailbox_rcv_msg +ffffffff81ec1840 t xgpu_vi_send_access_requests +ffffffff81ec2000 t navi10_ih_early_init +ffffffff81ec2060 t navi10_ih_sw_init +ffffffff81ec21d0 t navi10_ih_sw_fini +ffffffff81ec2210 t navi10_ih_hw_init +ffffffff81ec2630 t navi10_ih_hw_fini +ffffffff81ec2690 t navi10_ih_suspend +ffffffff81ec26f0 t navi10_ih_resume +ffffffff81ec2700 t navi10_ih_is_idle +ffffffff81ec2730 t navi10_ih_wait_for_idle +ffffffff81ec2760 t navi10_ih_soft_reset +ffffffff81ec2790 t navi10_ih_set_clockgating_state +ffffffff81ec28c0 t navi10_ih_set_powergating_state +ffffffff81ec28f0 t navi10_ih_get_clockgating_state +ffffffff81ec2980 t navi10_ih_get_wptr +ffffffff81ec2a90 t navi10_ih_set_rptr +ffffffff81ec2b60 t navi10_ih_self_irq +ffffffff81ec2be0 t navi10_ih_toggle_interrupts +ffffffff81ec2d50 t force_update_wptr_for_self_int +ffffffff81ec4000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff81ec4040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff81ec4080 t nbio_v2_3_get_pcie_index_offset +ffffffff81ec40c0 t nbio_v2_3_get_pcie_data_offset +ffffffff81ec4100 t nbio_v2_3_get_rev_id +ffffffff81ec4160 t nbio_v2_3_mc_access_enable +ffffffff81ec4210 t nbio_v2_3_get_memsize +ffffffff81ec4280 t nbio_v2_3_sdma_doorbell_range +ffffffff81ec4320 t nbio_v2_3_vcn_doorbell_range +ffffffff81ec43a0 t nbio_v2_3_enable_doorbell_aperture +ffffffff81ec44a0 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff81ec4610 t nbio_v2_3_ih_doorbell_range +ffffffff81ec4730 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff81ec47d0 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff81ec4870 t nbio_v2_3_get_clockgating_state +ffffffff81ec48f0 t nbio_v2_3_ih_control +ffffffff81ec4a40 t nbio_v2_3_init_registers +ffffffff81ec4ad0 t nbio_v2_3_remap_hdp_registers +ffffffff81ec4be0 t nbio_v2_3_enable_aspm +ffffffff81ec4c80 t nbio_v2_3_program_aspm +ffffffff81ec5330 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff81ec53c0 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff81ec5430 t nbio_v2_3_clear_doorbell_interrupt +ffffffff81ec6000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff81ec6040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff81ec6080 t nbio_v4_3_get_pcie_index_offset +ffffffff81ec60b0 t nbio_v4_3_get_pcie_data_offset +ffffffff81ec60f0 t nbio_v4_3_get_rev_id +ffffffff81ec6180 t nbio_v4_3_mc_access_enable +ffffffff81ec6230 t nbio_v4_3_get_memsize +ffffffff81ec62a0 t nbio_v4_3_sdma_doorbell_range +ffffffff81ec6410 t nbio_v4_3_vcn_doorbell_range +ffffffff81ec65c0 t nbio_v4_3_gc_doorbell_init +ffffffff81ec66b0 t nbio_v4_3_enable_doorbell_aperture +ffffffff81ec67b0 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81ec6920 t nbio_v4_3_ih_doorbell_range +ffffffff81ec6a40 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81ec6b80 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81ec6cb0 t nbio_v4_3_get_clockgating_state +ffffffff81ec6dc0 t nbio_v4_3_ih_control +ffffffff81ec6f10 t nbio_v4_3_init_registers +ffffffff81ec7040 t nbio_v4_3_remap_hdp_registers +ffffffff81ec7150 t nbio_v4_3_program_aspm +ffffffff81ec7e50 t nbio_v4_3_get_rom_offset +ffffffff81ec7ee0 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81ec7f10 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81ec7f40 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81ec7f70 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81ec7fa0 t nbio_v4_3_handle_ras_err_event_athub_intr_no_bifring +ffffffff81ec80b0 t nbio_v4_3_init_ras_err_event_athub_interrupt +ffffffff81ec80f0 t nbio_v4_3_set_ras_err_event_athub_irq_state +ffffffff81ec8200 t nbio_v4_3_process_err_event_athub_irq +ffffffff81ec9000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81ec9040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81ec9080 t nbio_v6_1_get_pcie_index_offset +ffffffff81ec90c0 t nbio_v6_1_get_pcie_data_offset +ffffffff81ec9100 t nbio_v6_1_get_rev_id +ffffffff81ec9190 t nbio_v6_1_mc_access_enable +ffffffff81ec9240 t nbio_v6_1_get_memsize +ffffffff81ec92b0 t nbio_v6_1_sdma_doorbell_range +ffffffff81ec9340 t nbio_v6_1_enable_doorbell_aperture +ffffffff81ec9440 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff81ec95b0 t nbio_v6_1_ih_doorbell_range +ffffffff81ec96d0 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff81ec9770 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff81ec9810 t nbio_v6_1_get_clockgating_state +ffffffff81ec9890 t nbio_v6_1_ih_control +ffffffff81ec99e0 t nbio_v6_1_init_registers +ffffffff81ec9ab0 t nbio_v6_1_remap_hdp_registers +ffffffff81ec9bc0 t nbio_v6_1_program_aspm +ffffffff81eca000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff81eca040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff81eca080 t nbio_v7_0_get_pcie_index_offset +ffffffff81eca0c0 t nbio_v7_0_get_pcie_data_offset +ffffffff81eca100 t nbio_v7_0_get_rev_id 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nbio_v7_2_get_pcie_port_index_offset +ffffffff81ecb130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff81ecb170 t nbio_v7_2_get_rev_id +ffffffff81ecb250 t nbio_v7_2_mc_access_enable +ffffffff81ecb390 t nbio_v7_2_get_memsize +ffffffff81ecb400 t nbio_v7_2_sdma_doorbell_range +ffffffff81ecb4a0 t nbio_v7_2_vcn_doorbell_range +ffffffff81ecb520 t nbio_v7_2_enable_doorbell_aperture +ffffffff81ecb600 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff81ecb770 t nbio_v7_2_ih_doorbell_range +ffffffff81ecb800 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff81ecb8c0 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff81ecba50 t nbio_v7_2_get_clockgating_state +ffffffff81ecbae0 t nbio_v7_2_ih_control +ffffffff81ecbc30 t nbio_v7_2_init_registers +ffffffff81ecbdf0 t nbio_v7_2_remap_hdp_registers +ffffffff81ecc000 t nbio_v7_4_query_ras_error_count +ffffffff81ecc1a0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff81ecc3e0 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff81ecc590 t nbio_v7_4_init_ras_controller_interrupt +ffffffff81ecc5d0 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff81ecc610 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff81ecc650 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff81ecc690 t nbio_v7_4_get_pcie_index_offset +ffffffff81ecc6d0 t nbio_v7_4_get_pcie_data_offset +ffffffff81ecc710 t nbio_v7_4_get_rev_id +ffffffff81ecc7e0 t nbio_v7_4_mc_access_enable +ffffffff81ecc890 t nbio_v7_4_get_memsize +ffffffff81ecc900 t nbio_v7_4_sdma_doorbell_range +ffffffff81ecc9d0 t nbio_v7_4_vcn_doorbell_range +ffffffff81ecca70 t nbio_v7_4_enable_doorbell_aperture +ffffffff81eccb70 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff81eccce0 t nbio_v7_4_ih_doorbell_range +ffffffff81ecce00 t nbio_v7_4_enable_doorbell_interrupt +ffffffff81eccf50 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff81eccf80 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff81ecd020 t nbio_v7_4_get_clockgating_state +ffffffff81ecd0a0 t nbio_v7_4_ih_control +ffffffff81ecd1f0 t nbio_v7_4_init_registers +ffffffff81ecd2e0 t nbio_v7_4_remap_hdp_registers +ffffffff81ecd3f0 t nbio_v7_4_program_aspm +ffffffff81ecd800 t nbio_v7_4_set_ras_controller_irq_state +ffffffff81ecd990 t nbio_v7_4_process_ras_controller_irq +ffffffff81ecd9c0 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff81ecdb50 t nbio_v7_4_process_err_event_athub_irq +ffffffff81ece000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff81ece040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff81ece080 t nbio_v7_7_get_pcie_index_offset +ffffffff81ece0c0 t nbio_v7_7_get_pcie_data_offset +ffffffff81ece100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff81ece130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81ece170 t nbio_v7_7_get_rev_id +ffffffff81ece200 t nbio_v7_7_mc_access_enable +ffffffff81ece2b0 t nbio_v7_7_get_memsize +ffffffff81ece320 t nbio_v7_7_sdma_doorbell_range +ffffffff81ece3b0 t nbio_v7_7_vcn_doorbell_range +ffffffff81ece430 t nbio_v7_7_enable_doorbell_aperture +ffffffff81ece510 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81ece680 t nbio_v7_7_ih_doorbell_range +ffffffff81ece7a0 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81ece8e0 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81eceaf0 t nbio_v7_7_get_clockgating_state +ffffffff81ecec00 t nbio_v7_7_ih_control +ffffffff81eced50 t nbio_v7_7_init_registers +ffffffff81ecee70 t nbio_v7_7_remap_hdp_registers +ffffffff81ecf000 t nbio_v7_9_get_hdp_flush_req_offset +ffffffff81ecf040 t nbio_v7_9_get_hdp_flush_done_offset +ffffffff81ecf080 t nbio_v7_9_get_pcie_index_offset +ffffffff81ecf0c0 t nbio_v7_9_get_pcie_data_offset +ffffffff81ecf100 t nbio_v7_9_get_pcie_index_hi_offset +ffffffff81ecf140 t nbio_v7_9_get_rev_id +ffffffff81ecf1d0 t nbio_v7_9_mc_access_enable +ffffffff81ecf280 t nbio_v7_9_get_memsize +ffffffff81ecf2f0 t nbio_v7_9_sdma_doorbell_range +ffffffff81ecf630 t nbio_v7_9_vcn_doorbell_range +ffffffff81ecf7c0 t nbio_v7_9_enable_doorbell_aperture +ffffffff81ecf930 t nbio_v7_9_enable_doorbell_selfring_aperture +ffffffff81ecfaa0 t nbio_v7_9_ih_doorbell_range +ffffffff81ecfba0 t nbio_v7_9_enable_doorbell_interrupt +ffffffff81ecfcb0 t nbio_v7_9_update_medium_grain_clock_gating +ffffffff81ecfce0 t nbio_v7_9_update_medium_grain_light_sleep +ffffffff81ecfd10 t nbio_v7_9_get_clockgating_state +ffffffff81ecfd40 t nbio_v7_9_ih_control +ffffffff81ecfe90 t nbio_v7_9_init_registers +ffffffff81ed01a0 t nbio_v7_9_remap_hdp_registers +ffffffff81ed02b0 t nbio_v7_9_get_compute_partition_mode +ffffffff81ed0340 t nbio_v7_9_get_memory_partition_mode +ffffffff81ed0430 t nbio_v7_9_get_pcie_replay_count +ffffffff81ed0490 t nbio_v7_9_get_pcie_usage +ffffffff81ed05f0 t nbio_v7_9_query_ras_error_count +ffffffff81ed0620 t nbio_v7_9_handle_ras_controller_intr_no_bifring +ffffffff81ed0740 t nbio_v7_9_handle_ras_err_event_athub_intr_no_bifring +ffffffff81ed0850 t nbio_v7_9_init_ras_controller_interrupt +ffffffff81ed0890 t nbio_v7_9_init_ras_err_event_athub_interrupt +ffffffff81ed08d0 t nbio_v7_9_set_ras_controller_irq_state +ffffffff81ed0900 t nbio_v7_9_process_ras_controller_irq +ffffffff81ed0930 t nbio_v7_9_set_ras_err_event_athub_irq_state +ffffffff81ed0960 t nbio_v7_9_process_err_event_athub_irq +ffffffff81ed1000 T nv_grbm_select +ffffffff81ed10a0 T nv_set_virt_ops +ffffffff81ed10e0 t nv_common_early_init +ffffffff81ed14d0 t nv_common_late_init +ffffffff81ed1580 t nv_common_sw_init +ffffffff81ed15c0 t nv_common_sw_fini +ffffffff81ed15f0 t nv_common_hw_init +ffffffff81ed16f0 t nv_common_hw_fini +ffffffff81ed1750 t nv_common_suspend +ffffffff81ed17b0 t nv_common_resume +ffffffff81ed17f0 t nv_common_is_idle +ffffffff81ed1820 t nv_common_wait_for_idle +ffffffff81ed1850 t nv_common_soft_reset +ffffffff81ed1880 t nv_common_set_clockgating_state +ffffffff81ed1950 t nv_common_set_powergating_state +ffffffff81ed1980 t nv_common_get_clockgating_state +ffffffff81ed19f0 t nv_didt_rreg +ffffffff81ed1a90 t nv_didt_wreg +ffffffff81ed1b10 t nv_read_disabled_bios +ffffffff81ed1b40 t nv_read_register +ffffffff81ed1c30 t nv_asic_reset +ffffffff81ed1d70 t nv_asic_reset_method +ffffffff81ed1e60 t nv_get_xclk +ffffffff81ed1e90 t nv_set_uvd_clocks +ffffffff81ed1ec0 t nv_set_vce_clocks +ffffffff81ed1ef0 t nv_get_config_memsize +ffffffff81ed1f10 t nv_need_full_reset +ffffffff81ed1f40 t nv_init_doorbell_index +ffffffff81ed2070 t nv_need_reset_on_init +ffffffff81ed2110 t nv_pre_asic_init +ffffffff81ed2140 t nv_update_umd_stable_pstate +ffffffff81ed2200 t nv_query_video_codecs +ffffffff81ed3000 T psp_v10_0_set_psp_funcs +ffffffff81ed3030 t psp_v10_0_init_microcode +ffffffff81ed30f0 t psp_v10_0_ring_create +ffffffff81ed3400 t psp_v10_0_ring_stop +ffffffff81ed35f0 t psp_v10_0_ring_destroy +ffffffff81ed3670 t psp_v10_0_mode1_reset +ffffffff81ed36c0 t psp_v10_0_ring_get_wptr +ffffffff81ed3720 t psp_v10_0_ring_set_wptr +ffffffff81ed4000 T psp_v11_0_set_psp_funcs +ffffffff81ed4030 t psp_v11_0_init_microcode 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psp_v11_0_8_ring_set_wptr +ffffffff81ed7000 T psp_v12_0_set_psp_funcs +ffffffff81ed7030 t psp_v12_0_init_microcode +ffffffff81ed70e0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81ed7410 t psp_v12_0_bootloader_load_sos +ffffffff81ed7790 t psp_v12_0_ring_create +ffffffff81ed8190 t psp_v12_0_ring_stop +ffffffff81ed83b0 t psp_v12_0_ring_destroy +ffffffff81ed8430 t psp_v12_0_mode1_reset +ffffffff81ed8530 t psp_v12_0_ring_get_wptr +ffffffff81ed85a0 t psp_v12_0_ring_set_wptr +ffffffff81ed9000 T psp_v13_0_set_psp_funcs +ffffffff81ed9030 t psp_v13_0_init_microcode +ffffffff81ed9130 t psp_v13_0_wait_for_bootloader_steady_state +ffffffff81ed9240 t psp_v13_0_bootloader_load_kdb +ffffffff81ed9260 t psp_v13_0_bootloader_load_spl +ffffffff81ed9280 t psp_v13_0_bootloader_load_sysdrv +ffffffff81ed92a0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81ed92c0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81ed92e0 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81ed9300 t psp_v13_0_bootloader_load_ras_drv +ffffffff81ed9320 t psp_v13_0_bootloader_load_sos +ffffffff81ed96f0 t psp_v13_0_ring_create +ffffffff81ed9d90 t psp_v13_0_ring_stop +ffffffff81eda120 t psp_v13_0_ring_destroy +ffffffff81eda1a0 t psp_v13_0_memory_training +ffffffff81eda5d0 t psp_v13_0_ring_get_wptr +ffffffff81eda640 t psp_v13_0_ring_set_wptr +ffffffff81eda740 t psp_v13_0_load_usbc_pd_fw +ffffffff81eda930 t psp_v13_0_read_usbc_pd_fw +ffffffff81edaa50 t psp_v13_0_update_spirom +ffffffff81edac30 t psp_v13_0_vbflash_status +ffffffff81edac90 t psp_v13_0_fatal_error_recovery_quirk +ffffffff81edadc0 t psp_v13_0_bootloader_load_component +ffffffff81edb030 t psp_v13_0_memory_training_send_msg +ffffffff81edb1a0 t psp_v13_0_exec_spi_cmd +ffffffff81edc000 T psp_v13_0_4_set_psp_funcs +ffffffff81edc030 t psp_v13_0_4_init_microcode +ffffffff81edc0d0 t psp_v13_0_4_bootloader_load_kdb +ffffffff81edc0f0 t psp_v13_0_4_bootloader_load_spl +ffffffff81edc110 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81edc130 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81edc150 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81edc170 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81edc190 t psp_v13_0_4_bootloader_load_sos +ffffffff81edc500 t psp_v13_0_4_ring_create +ffffffff81edcbb0 t psp_v13_0_4_ring_stop +ffffffff81edcf40 t psp_v13_0_4_ring_destroy +ffffffff81edcfc0 t psp_v13_0_4_ring_get_wptr +ffffffff81edd030 t psp_v13_0_4_ring_set_wptr +ffffffff81edd130 t psp_v13_0_4_bootloader_load_component +ffffffff81edd300 t psp_v13_0_4_wait_for_bootloader +ffffffff81ede000 T psp_v3_1_set_psp_funcs +ffffffff81ede030 t psp_v3_1_init_microcode +ffffffff81ede0c0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81ede3f0 t psp_v3_1_bootloader_load_sos +ffffffff81ede770 t psp_v3_1_ring_create +ffffffff81edf290 t psp_v3_1_ring_stop +ffffffff81edf4b0 t psp_v3_1_ring_destroy +ffffffff81edf530 t psp_v3_1_smu_reload_quirk +ffffffff81edf580 t psp_v3_1_mode1_reset +ffffffff81edf680 t psp_v3_1_ring_get_wptr +ffffffff81edf6d0 t psp_v3_1_ring_set_wptr +ffffffff81ee0000 t sdma_v2_4_early_init +ffffffff81ee00f0 t sdma_v2_4_sw_init +ffffffff81ee04a0 t sdma_v2_4_sw_fini +ffffffff81ee0550 t sdma_v2_4_hw_init +ffffffff81ee08f0 t sdma_v2_4_hw_fini +ffffffff81ee0930 t sdma_v2_4_suspend +ffffffff81ee0970 t sdma_v2_4_resume +ffffffff81ee0980 t sdma_v2_4_is_idle +ffffffff81ee09c0 t sdma_v2_4_wait_for_idle +ffffffff81ee0a60 t sdma_v2_4_soft_reset +ffffffff81ee0ba0 t sdma_v2_4_set_clockgating_state +ffffffff81ee0bd0 t sdma_v2_4_set_powergating_state +ffffffff81ee0c00 t sdma_v2_4_ring_get_rptr +ffffffff81ee0c40 t sdma_v2_4_ring_get_wptr +ffffffff81ee0ca0 t sdma_v2_4_ring_set_wptr +ffffffff81ee0ce0 t sdma_v2_4_ring_emit_ib +ffffffff81ee0f90 t sdma_v2_4_ring_emit_fence +ffffffff81ee1390 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81ee1610 t sdma_v2_4_ring_emit_vm_flush +ffffffff81ee1880 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81ee1b00 t sdma_v2_4_ring_test_ring +ffffffff81ee1de0 t sdma_v2_4_ring_test_ib +ffffffff81ee1fb0 t sdma_v2_4_ring_insert_nop +ffffffff81ee20e0 t sdma_v2_4_ring_pad_ib +ffffffff81ee2210 t sdma_v2_4_ring_emit_wreg +ffffffff81ee2360 t sdma_v2_4_emit_copy_buffer +ffffffff81ee2420 t sdma_v2_4_emit_fill_buffer +ffffffff81ee24b0 t sdma_v2_4_vm_copy_pte +ffffffff81ee2570 t sdma_v2_4_vm_write_pte +ffffffff81ee2640 t sdma_v2_4_vm_set_pte_pde +ffffffff81ee2740 t sdma_v2_4_set_trap_irq_state +ffffffff81ee2800 t sdma_v2_4_process_trap_irq +ffffffff81ee28a0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81ee2920 t sdma_v2_4_enable +ffffffff81ee3000 t sdma_v3_0_early_init +ffffffff81ee3100 t sdma_v3_0_sw_init +ffffffff81ee34c0 t sdma_v3_0_sw_fini +ffffffff81ee3570 t sdma_v3_0_hw_init +ffffffff81ee36a0 t sdma_v3_0_hw_fini +ffffffff81ee36f0 t sdma_v3_0_suspend +ffffffff81ee3740 t sdma_v3_0_resume +ffffffff81ee3750 t sdma_v3_0_is_idle +ffffffff81ee3790 t sdma_v3_0_wait_for_idle +ffffffff81ee3830 t sdma_v3_0_check_soft_reset +ffffffff81ee3890 t sdma_v3_0_pre_soft_reset +ffffffff81ee38e0 t sdma_v3_0_soft_reset +ffffffff81ee39b0 t sdma_v3_0_post_soft_reset +ffffffff81ee3a00 t sdma_v3_0_set_clockgating_state +ffffffff81ee3c60 t sdma_v3_0_set_powergating_state +ffffffff81ee3c90 t sdma_v3_0_get_clockgating_state +ffffffff81ee3d10 t sdma_v3_0_ring_get_rptr +ffffffff81ee3d50 t sdma_v3_0_ring_get_wptr +ffffffff81ee3dd0 t sdma_v3_0_ring_set_wptr +ffffffff81ee3e80 t sdma_v3_0_ring_emit_ib +ffffffff81ee4130 t sdma_v3_0_ring_emit_fence +ffffffff81ee4530 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81ee47b0 t sdma_v3_0_ring_emit_vm_flush +ffffffff81ee4a20 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81ee4ca0 t sdma_v3_0_ring_test_ring +ffffffff81ee4f80 t sdma_v3_0_ring_test_ib +ffffffff81ee5150 t sdma_v3_0_ring_insert_nop +ffffffff81ee5280 t sdma_v3_0_ring_pad_ib +ffffffff81ee53b0 t sdma_v3_0_ring_emit_wreg +ffffffff81ee5500 t sdma_v3_0_emit_copy_buffer +ffffffff81ee55c0 t sdma_v3_0_emit_fill_buffer +ffffffff81ee5650 t sdma_v3_0_vm_copy_pte +ffffffff81ee5710 t sdma_v3_0_vm_write_pte +ffffffff81ee57e0 t sdma_v3_0_vm_set_pte_pde +ffffffff81ee58e0 t sdma_v3_0_set_trap_irq_state +ffffffff81ee59a0 t sdma_v3_0_process_trap_irq +ffffffff81ee5a40 t sdma_v3_0_process_illegal_inst_irq +ffffffff81ee5ac0 t sdma_v3_0_ctx_switch_enable +ffffffff81ee5c60 t sdma_v3_0_enable +ffffffff81ee5dd0 t sdma_v3_0_gfx_resume +ffffffff81ee7000 t sdma_v4_0_early_init +ffffffff81ee72d0 t sdma_v4_0_late_init +ffffffff81ee7570 t sdma_v4_0_sw_init +ffffffff81ee79b0 t sdma_v4_0_sw_fini +ffffffff81ee7a70 t sdma_v4_0_hw_init +ffffffff81eea9d0 t sdma_v4_0_hw_fini +ffffffff81eeaa90 t sdma_v4_0_suspend +ffffffff81eeaae0 t sdma_v4_0_resume +ffffffff81eeab60 t sdma_v4_0_is_idle +ffffffff81eeac90 t sdma_v4_0_wait_for_idle +ffffffff81eeae30 t sdma_v4_0_soft_reset +ffffffff81eeae60 t sdma_v4_0_set_clockgating_state +ffffffff81eeb360 t sdma_v4_0_set_powergating_state +ffffffff81eeb420 t sdma_v4_0_get_clockgating_state +ffffffff81eeb4c0 t sdma_v4_0_query_ras_error_count +ffffffff81eeb690 t sdma_v4_0_reset_ras_error_count +ffffffff81eeb7e0 t sdma_v4_0_ring_get_rptr +ffffffff81eeb840 t sdma_v4_0_ring_get_wptr +ffffffff81eeba30 t sdma_v4_0_ring_set_wptr +ffffffff81eebcb0 t sdma_v4_0_ring_emit_ib +ffffffff81eebf60 t sdma_v4_0_ring_emit_fence +ffffffff81eec380 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81eec3e0 t sdma_v4_0_ring_emit_vm_flush +ffffffff81eec400 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81eec4b0 t sdma_v4_0_ring_test_ring +ffffffff81eec790 t sdma_v4_0_ring_test_ib +ffffffff81eec960 t sdma_v4_0_ring_insert_nop +ffffffff81eeca90 t sdma_v4_0_ring_pad_ib +ffffffff81eecbc0 t sdma_v4_0_ring_emit_wreg +ffffffff81eecd10 t sdma_v4_0_ring_emit_reg_wait +ffffffff81eecd60 t sdma_v4_0_wait_reg_mem +ffffffff81eed070 t sdma_v4_0_page_ring_get_wptr +ffffffff81eed220 t sdma_v4_0_page_ring_set_wptr +ffffffff81eed3e0 t sdma_v4_0_emit_copy_buffer +ffffffff81eed4a0 t sdma_v4_0_emit_fill_buffer +ffffffff81eed530 t sdma_v4_0_vm_copy_pte +ffffffff81eed5f0 t sdma_v4_0_vm_write_pte +ffffffff81eed6c0 t sdma_v4_0_vm_set_pte_pde +ffffffff81eed7c0 t sdma_v4_0_set_trap_irq_state +ffffffff81eed960 t sdma_v4_0_process_trap_irq +ffffffff81eeda90 t sdma_v4_0_process_illegal_inst_irq +ffffffff81eedbb0 t sdma_v4_0_set_ecc_irq_state +ffffffff81eedd50 t sdma_v4_0_process_vm_hole_irq +ffffffff81eedd90 t sdma_v4_0_print_iv_entry +ffffffff81eeded0 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81eedf10 t sdma_v4_0_process_pool_timeout_irq +ffffffff81eedf50 t sdma_v4_0_process_srbm_write_irq +ffffffff81eedf90 t sdma_v4_0_process_ras_data_cb +ffffffff81eee010 t sdma_v4_0_ctx_switch_enable +ffffffff81eee6e0 t sdma_v4_0_enable +ffffffff81eeeca0 t sdma_v4_0_gfx_enable +ffffffff81ef0000 t sdma_v4_4_query_ras_error_count +ffffffff81ef0290 t sdma_v4_4_reset_ras_error_count +ffffffff81ef1000 t sdma_v4_4_2_early_init +ffffffff81ef1280 t sdma_v4_4_2_late_init +ffffffff81ef12f0 t sdma_v4_4_2_sw_init +ffffffff81ef1810 t sdma_v4_4_2_sw_fini +ffffffff81ef18c0 t sdma_v4_4_2_hw_init +ffffffff81ef1910 t sdma_v4_4_2_hw_fini +ffffffff81ef19d0 t sdma_v4_4_2_suspend +ffffffff81ef1ab0 t sdma_v4_4_2_resume +ffffffff81ef1b00 t sdma_v4_4_2_is_idle +ffffffff81ef1ba0 t sdma_v4_4_2_wait_for_idle +ffffffff81ef1cc0 t sdma_v4_4_2_soft_reset +ffffffff81ef1cf0 t sdma_v4_4_2_set_clockgating_state +ffffffff81ef20f0 t sdma_v4_4_2_set_powergating_state +ffffffff81ef2120 t sdma_v4_4_2_get_clockgating_state +ffffffff81ef2200 t sdma_v4_4_2_xcp_suspend +ffffffff81ef22c0 t sdma_v4_4_2_xcp_resume +ffffffff81ef2300 t sdma_v4_4_2_ring_get_rptr +ffffffff81ef2370 t sdma_v4_4_2_ring_get_wptr +ffffffff81ef24b0 t sdma_v4_4_2_ring_set_wptr +ffffffff81ef2670 t sdma_v4_4_2_ring_emit_ib +ffffffff81ef2920 t sdma_v4_4_2_ring_emit_fence +ffffffff81ef2d40 t sdma_v4_4_2_ring_emit_pipeline_sync +ffffffff81ef2da0 t sdma_v4_4_2_ring_emit_vm_flush +ffffffff81ef2dc0 t sdma_v4_4_2_ring_emit_hdp_flush +ffffffff81ef2e70 t sdma_v4_4_2_ring_test_ring +ffffffff81ef3150 t sdma_v4_4_2_ring_test_ib +ffffffff81ef3320 t sdma_v4_4_2_ring_insert_nop +ffffffff81ef3450 t sdma_v4_4_2_ring_pad_ib +ffffffff81ef3580 t sdma_v4_4_2_ring_emit_wreg +ffffffff81ef36d0 t sdma_v4_4_2_ring_emit_reg_wait +ffffffff81ef3720 t sdma_v4_4_2_wait_reg_mem +ffffffff81ef3a30 t sdma_v4_4_2_page_ring_get_wptr +ffffffff81ef3b30 t sdma_v4_4_2_page_ring_set_wptr +ffffffff81ef3c40 t sdma_v4_4_2_emit_copy_buffer +ffffffff81ef3d00 t sdma_v4_4_2_emit_fill_buffer +ffffffff81ef3d90 t sdma_v4_4_2_vm_copy_pte +ffffffff81ef3e50 t sdma_v4_4_2_vm_write_pte +ffffffff81ef3f20 t sdma_v4_4_2_vm_set_pte_pde +ffffffff81ef4020 t sdma_v4_4_2_set_trap_irq_state +ffffffff81ef4100 t sdma_v4_4_2_process_trap_irq +ffffffff81ef4220 t sdma_v4_4_2_process_illegal_inst_irq +ffffffff81ef42b0 t sdma_v4_4_2_set_ecc_irq_state +ffffffff81ef4390 t sdma_v4_4_2_process_vm_hole_irq +ffffffff81ef4470 t sdma_v4_4_2_process_doorbell_invalid_irq +ffffffff81ef4550 t sdma_v4_4_2_process_pool_timeout_irq +ffffffff81ef4630 t sdma_v4_4_2_process_srbm_write_irq +ffffffff81ef4710 t sdma_v4_4_2_query_ras_error_count +ffffffff81ef4860 t sdma_v4_4_2_reset_ras_error_count +ffffffff81ef4990 t sdma_v4_4_2_inst_init_golden_registers +ffffffff81ef4b10 t sdma_v4_4_2_inst_start +ffffffff81ef5eb0 t sdma_v4_4_2_inst_ctx_switch_enable +ffffffff81ef6180 t sdma_v4_4_2_inst_enable +ffffffff81ef7000 t sdma_v5_0_early_init +ffffffff81ef7130 t sdma_v5_0_sw_init +ffffffff81ef7310 t sdma_v5_0_sw_fini +ffffffff81ef73a0 t sdma_v5_0_hw_init +ffffffff81ef8600 t sdma_v5_0_hw_fini +ffffffff81ef8660 t sdma_v5_0_suspend +ffffffff81ef86c0 t sdma_v5_0_resume +ffffffff81ef86d0 t sdma_v5_0_is_idle +ffffffff81ef8760 t sdma_v5_0_wait_for_idle +ffffffff81ef8820 t sdma_v5_0_soft_reset +ffffffff81ef8850 t sdma_v5_0_set_clockgating_state +ffffffff81ef8a50 t sdma_v5_0_set_powergating_state +ffffffff81ef8a80 t sdma_v5_0_get_clockgating_state +ffffffff81ef8b20 t sdma_v5_0_ring_get_rptr +ffffffff81ef8b80 t sdma_v5_0_ring_get_wptr +ffffffff81ef8d20 t sdma_v5_0_ring_set_wptr +ffffffff81ef9070 t sdma_v5_0_ring_emit_ib +ffffffff81ef9330 t sdma_v5_0_ring_emit_fence +ffffffff81ef9790 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81ef9a10 t sdma_v5_0_ring_emit_vm_flush +ffffffff81ef9a30 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81ef9cd0 t sdma_v5_0_ring_test_ring +ffffffff81efa090 t sdma_v5_0_ring_test_ib +ffffffff81efa3c0 t sdma_v5_0_ring_insert_nop +ffffffff81efa4f0 t sdma_v5_0_ring_pad_ib +ffffffff81efa620 t sdma_v5_0_ring_init_cond_exec +ffffffff81efa850 t sdma_v5_0_ring_patch_cond_exec +ffffffff81efa910 t sdma_v5_0_ring_emit_wreg +ffffffff81efaa60 t sdma_v5_0_ring_emit_reg_wait +ffffffff81eface0 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81efad60 t sdma_v5_0_ring_preempt_ib +ffffffff81efaea0 t sdma_v5_0_ring_emit_mem_sync +ffffffff81efb0b0 t sdma_v5_0_emit_copy_buffer +ffffffff81efb170 t sdma_v5_0_emit_fill_buffer +ffffffff81efb200 t sdma_v5_0_vm_copy_pte +ffffffff81efb2c0 t sdma_v5_0_vm_write_pte +ffffffff81efb390 t sdma_v5_0_vm_set_pte_pde +ffffffff81efb490 t sdma_v5_0_set_trap_irq_state +ffffffff81efb520 t sdma_v5_0_process_trap_irq +ffffffff81efb630 t sdma_v5_0_process_illegal_inst_irq +ffffffff81efb660 t sdma_v5_0_mqd_init +ffffffff81efb740 t sdma_v5_0_ctx_switch_enable +ffffffff81efba80 t sdma_v5_0_enable +ffffffff81efc000 t sdma_v5_2_early_init +ffffffff81efc130 t sdma_v5_2_sw_init +ffffffff81efc390 t sdma_v5_2_sw_fini +ffffffff81efc420 t sdma_v5_2_hw_init +ffffffff81efdfc0 t sdma_v5_2_hw_fini +ffffffff81efe020 t sdma_v5_2_suspend +ffffffff81efe080 t sdma_v5_2_resume +ffffffff81efe090 t sdma_v5_2_is_idle +ffffffff81efe140 t sdma_v5_2_wait_for_idle +ffffffff81efe240 t sdma_v5_2_soft_reset +ffffffff81efe500 t sdma_v5_2_set_clockgating_state +ffffffff81efe860 t sdma_v5_2_set_powergating_state +ffffffff81efe890 t sdma_v5_2_get_clockgating_state +ffffffff81efe920 t sdma_v5_2_ring_get_rptr +ffffffff81efe980 t sdma_v5_2_ring_get_wptr +ffffffff81efeac0 t sdma_v5_2_ring_set_wptr +ffffffff81efec70 t sdma_v5_2_ring_emit_ib +ffffffff81efef30 t sdma_v5_2_ring_emit_fence +ffffffff81eff390 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81eff610 t sdma_v5_2_ring_emit_vm_flush +ffffffff81eff630 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81eff8d0 t sdma_v5_2_ring_test_ring +ffffffff81effc90 t sdma_v5_2_ring_test_ib +ffffffff81efffc0 t sdma_v5_2_ring_insert_nop +ffffffff81f000f0 t sdma_v5_2_ring_pad_ib +ffffffff81f00220 t sdma_v5_2_ring_init_cond_exec +ffffffff81f00450 t sdma_v5_2_ring_patch_cond_exec +ffffffff81f00510 t sdma_v5_2_ring_begin_use +ffffffff81f00530 t sdma_v5_2_ring_end_use +ffffffff81f00550 t sdma_v5_2_ring_emit_wreg +ffffffff81f006a0 t sdma_v5_2_ring_emit_reg_wait +ffffffff81f00920 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81f009a0 t sdma_v5_2_ring_preempt_ib +ffffffff81f00b10 t sdma_v5_2_ring_emit_mem_sync +ffffffff81f00d20 t sdma_v5_2_emit_copy_buffer +ffffffff81f00de0 t sdma_v5_2_emit_fill_buffer +ffffffff81f00e70 t sdma_v5_2_vm_copy_pte +ffffffff81f00f30 t sdma_v5_2_vm_write_pte +ffffffff81f01000 t sdma_v5_2_vm_set_pte_pde +ffffffff81f01100 t sdma_v5_2_set_trap_irq_state +ffffffff81f011c0 t sdma_v5_2_process_trap_irq +ffffffff81f01300 t sdma_v5_2_process_illegal_inst_irq +ffffffff81f01330 t sdma_v5_2_mqd_init +ffffffff81f01410 t sdma_v5_2_ctx_switch_enable +ffffffff81f01820 t sdma_v5_2_enable +ffffffff81f02000 t sdma_v6_0_early_init +ffffffff81f02120 t sdma_v6_0_sw_init +ffffffff81f022e0 t sdma_v6_0_sw_fini +ffffffff81f02370 t sdma_v6_0_hw_init +ffffffff81f02380 t sdma_v6_0_hw_fini +ffffffff81f02450 t sdma_v6_0_suspend +ffffffff81f02490 t sdma_v6_0_resume +ffffffff81f024a0 t sdma_v6_0_is_idle +ffffffff81f02530 t sdma_v6_0_wait_for_idle +ffffffff81f025f0 t sdma_v6_0_check_soft_reset +ffffffff81f026b0 t sdma_v6_0_soft_reset +ffffffff81f02b70 t sdma_v6_0_set_clockgating_state +ffffffff81f02ba0 t sdma_v6_0_set_powergating_state +ffffffff81f02bd0 t sdma_v6_0_get_clockgating_state +ffffffff81f02c00 t sdma_v6_0_ring_get_rptr +ffffffff81f02c60 t sdma_v6_0_ring_get_wptr +ffffffff81f02cd0 t sdma_v6_0_ring_set_wptr +ffffffff81f03020 t sdma_v6_0_ring_emit_ib +ffffffff81f032e0 t sdma_v6_0_ring_emit_fence +ffffffff81f03740 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81f039c0 t sdma_v6_0_ring_emit_vm_flush +ffffffff81f03c30 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81f03ed0 t sdma_v6_0_ring_test_ring +ffffffff81f04290 t sdma_v6_0_ring_test_ib +ffffffff81f045c0 t sdma_v6_0_ring_insert_nop +ffffffff81f046f0 t sdma_v6_0_ring_pad_ib +ffffffff81f04820 t sdma_v6_0_ring_init_cond_exec +ffffffff81f04a50 t sdma_v6_0_ring_patch_cond_exec +ffffffff81f04b10 t sdma_v6_0_ring_emit_wreg +ffffffff81f04c60 t sdma_v6_0_ring_emit_reg_wait +ffffffff81f04ee0 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81f04f60 t sdma_v6_0_ring_preempt_ib +ffffffff81f050b0 t sdma_v6_0_ring_emit_mem_sync +ffffffff81f052c0 t sdma_v6_0_emit_copy_buffer +ffffffff81f05380 t sdma_v6_0_emit_fill_buffer +ffffffff81f05410 t sdma_v6_0_vm_copy_pte +ffffffff81f054d0 t sdma_v6_0_vm_write_pte +ffffffff81f055a0 t sdma_v6_0_vm_set_pte_pde +ffffffff81f056a0 t sdma_v6_0_set_trap_irq_state +ffffffff81f05730 t sdma_v6_0_process_trap_irq +ffffffff81f05860 t sdma_v6_0_process_illegal_inst_irq +ffffffff81f05890 t sdma_v6_0_mqd_init +ffffffff81f059b0 t sdma_v6_0_start +ffffffff81f05c90 t sdma_v6_0_enable +ffffffff81f05e20 t sdma_v6_0_gfx_resume +ffffffff81f06eb0 t sdma_v6_0_gfx_stop +ffffffff81f08000 T sienna_cichlid_reset_init +ffffffff81f080c0 t sienna_cichlid_async_reset +ffffffff81f08120 t sienna_cichlid_get_reset_handler +ffffffff81f081b0 T sienna_cichlid_reset_fini +ffffffff81f08210 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81f08360 t sienna_cichlid_mode2_perform_reset +ffffffff81f083e0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81f086d0 t sienna_cichlid_mode2_reset +ffffffff81f09000 T smu_v11_0_i2c_control_init +ffffffff81f090d0 T smu_v11_0_i2c_control_fini +ffffffff81f09110 t smu_v11_0_i2c_xfer +ffffffff81f0a2c0 t smu_v11_0_i2c_func +ffffffff81f0a2f0 t smu_v11_0_i2c_enable +ffffffff81f0a440 t smu_v11_0_i2c_abort +ffffffff81f0a550 t lock_bus +ffffffff81f0a5f0 t trylock_bus +ffffffff81f0a640 t unlock_bus +ffffffff81f0b000 T smu_v13_0_10_reset_init +ffffffff81f0b0c0 t smu_v13_0_10_async_reset +ffffffff81f0b120 t smu_v13_0_10_get_reset_handler +ffffffff81f0b1d0 T smu_v13_0_10_reset_fini +ffffffff81f0b230 t smu_v13_0_10_mode2_prepare_hwcontext +ffffffff81f0b360 t smu_v13_0_10_mode2_perform_reset +ffffffff81f0b3e0 t smu_v13_0_10_mode2_restore_hwcontext +ffffffff81f0b740 t smu_v13_0_10_mode2_reset +ffffffff81f0c000 t smuio_v11_0_get_rom_index_offset +ffffffff81f0c040 t smuio_v11_0_get_rom_data_offset +ffffffff81f0c080 t smuio_v11_0_update_rom_clock_gating +ffffffff81f0c1d0 t smuio_v11_0_get_clock_gating_state +ffffffff81f0d000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81f0d040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81f0d080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81f0d1d0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81f0e000 t smuio_v13_0_get_rom_index_offset +ffffffff81f0e040 t smuio_v13_0_get_rom_data_offset +ffffffff81f0e080 t smuio_v13_0_update_rom_clock_gating +ffffffff81f0e1d0 t smuio_v13_0_get_clock_gating_state +ffffffff81f0e270 t smuio_v13_0_get_die_id +ffffffff81f0e2f0 t smuio_v13_0_get_socket_id +ffffffff81f0e380 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81f0f000 t smuio_v13_0_3_get_die_id +ffffffff81f0f080 t smuio_v13_0_3_get_socket_id +ffffffff81f0f110 t smuio_v13_0_3_get_pkg_type +ffffffff81f10000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81f10040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81f11000 t smuio_v9_0_get_rom_index_offset +ffffffff81f11040 t smuio_v9_0_get_rom_data_offset +ffffffff81f11080 t smuio_v9_0_update_rom_clock_gating +ffffffff81f111c0 t smuio_v9_0_get_clock_gating_state +ffffffff81f12000 T soc15_grbm_select +ffffffff81f12090 T soc15_program_register_sequence +ffffffff81f12290 T soc15_set_virt_ops +ffffffff81f12300 t soc15_common_early_init +ffffffff81f12720 t soc15_common_late_init +ffffffff81f12780 t soc15_common_sw_init +ffffffff81f127e0 t soc15_common_sw_fini +ffffffff81f12830 t soc15_common_hw_init +ffffffff81f12950 t soc15_common_hw_fini +ffffffff81f12a20 t soc15_common_suspend +ffffffff81f12a60 t soc15_common_resume +ffffffff81f12aa0 t soc15_common_is_idle +ffffffff81f12ad0 t soc15_common_wait_for_idle +ffffffff81f12b00 t soc15_common_soft_reset +ffffffff81f12b30 t soc15_common_set_clockgating_state +ffffffff81f12e70 t soc15_common_set_powergating_state +ffffffff81f12ea0 t soc15_common_get_clockgating_state +ffffffff81f12fd0 t soc15_uvd_ctx_rreg +ffffffff81f13070 t soc15_uvd_ctx_wreg +ffffffff81f13100 t soc15_didt_rreg +ffffffff81f131a0 t soc15_didt_wreg +ffffffff81f13220 t soc15_gc_cac_rreg +ffffffff81f13340 t soc15_gc_cac_wreg +ffffffff81f13450 t soc15_se_cac_rreg +ffffffff81f13570 t soc15_se_cac_wreg +ffffffff81f13680 t soc15_read_disabled_bios +ffffffff81f136b0 t soc15_read_register +ffffffff81f137b0 t soc15_asic_reset +ffffffff81f138b0 t soc15_asic_reset_method +ffffffff81f13a60 t soc15_get_xclk +ffffffff81f13ac0 t soc15_set_uvd_clocks +ffffffff81f13af0 t soc15_set_vce_clocks +ffffffff81f13b20 t soc15_get_config_memsize +ffffffff81f13b40 t soc15_need_full_reset +ffffffff81f13b70 t soc15_get_pcie_usage +ffffffff81f13ca0 t soc15_need_reset_on_init +ffffffff81f13d50 t soc15_get_pcie_replay_count +ffffffff81f13dc0 t soc15_supports_baco +ffffffff81f13e20 t soc15_pre_asic_init +ffffffff81f13e30 t soc15_query_video_codecs +ffffffff81f13f20 t vega20_get_pcie_usage +ffffffff81f15000 T soc21_grbm_select +ffffffff81f15090 t soc21_common_early_init +ffffffff81f15200 t soc21_common_late_init +ffffffff81f152e0 t soc21_common_sw_init +ffffffff81f15320 t soc21_common_sw_fini +ffffffff81f15350 t soc21_common_hw_init +ffffffff81f15410 t soc21_common_hw_fini +ffffffff81f154b0 t soc21_common_suspend +ffffffff81f15550 t soc21_common_resume +ffffffff81f15610 t soc21_common_is_idle +ffffffff81f15640 t soc21_common_wait_for_idle +ffffffff81f15670 t soc21_common_soft_reset +ffffffff81f156a0 t soc21_common_set_clockgating_state +ffffffff81f15750 t soc21_common_set_powergating_state +ffffffff81f157b0 t soc21_common_get_clockgating_state +ffffffff81f15800 t soc21_didt_rreg +ffffffff81f158a0 t soc21_didt_wreg +ffffffff81f15920 t soc21_read_disabled_bios +ffffffff81f15950 t soc21_read_register +ffffffff81f15a40 t soc21_asic_reset +ffffffff81f15b20 t soc21_asic_reset_method +ffffffff81f15be0 t soc21_get_xclk +ffffffff81f15c10 t soc21_set_uvd_clocks +ffffffff81f15c40 t soc21_set_vce_clocks +ffffffff81f15c70 t soc21_get_config_memsize +ffffffff81f15c90 t soc21_need_full_reset +ffffffff81f15cf0 t soc21_init_doorbell_index +ffffffff81f15e10 t soc21_need_reset_on_init +ffffffff81f15eb0 t soc21_pre_asic_init +ffffffff81f15ee0 t soc21_update_umd_stable_pstate +ffffffff81f15f60 t soc21_query_video_codecs +ffffffff81f17000 t tonga_ih_early_init +ffffffff81f17050 t tonga_ih_sw_init +ffffffff81f170d0 t tonga_ih_sw_fini +ffffffff81f17110 t tonga_ih_hw_init +ffffffff81f172f0 t tonga_ih_hw_fini +ffffffff81f17390 t tonga_ih_suspend +ffffffff81f17430 t tonga_ih_resume +ffffffff81f17470 t tonga_ih_is_idle +ffffffff81f174c0 t tonga_ih_wait_for_idle +ffffffff81f17560 t tonga_ih_check_soft_reset +ffffffff81f175c0 t tonga_ih_pre_soft_reset +ffffffff81f17670 t tonga_ih_soft_reset +ffffffff81f17740 t tonga_ih_post_soft_reset +ffffffff81f17780 t tonga_ih_set_clockgating_state +ffffffff81f177b0 t tonga_ih_set_powergating_state +ffffffff81f177e0 t tonga_ih_get_wptr +ffffffff81f178d0 t tonga_ih_decode_iv +ffffffff81f17950 t tonga_ih_set_rptr +ffffffff81f18000 t umc_v6_0_init_registers +ffffffff81f19000 t umc_v6_1_query_ras_error_count +ffffffff81f194e0 t umc_v6_1_query_ras_error_address +ffffffff81f197c0 t umc_v6_1_err_cnt_init +ffffffff81f1a000 T umc_v6_7_convert_error_address +ffffffff81f1a320 t umc_v6_7_query_ras_error_count +ffffffff81f1a360 t umc_v6_7_query_ras_error_address +ffffffff81f1a380 t umc_v6_7_query_ras_poison_mode +ffffffff81f1a3e0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81f1a400 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81f1a420 t umc_v6_7_query_ecc_error_count +ffffffff81f1a690 t umc_v6_7_reset_error_count_per_channel +ffffffff81f1a790 t umc_v6_7_query_error_address +ffffffff81f1a8b0 t umc_v6_7_ecc_info_querry_ecc_error_count +ffffffff81f1aa80 t umc_v6_7_ecc_info_query_error_address +ffffffff81f1b000 t umc_v8_10_query_ras_error_count +ffffffff81f1b040 t umc_v8_10_query_ras_error_address +ffffffff81f1b060 t umc_v8_10_err_cnt_init +ffffffff81f1b080 t umc_v8_10_query_ras_poison_mode +ffffffff81f1b0b0 t umc_v8_10_ecc_info_query_ras_error_count +ffffffff81f1b0d0 t umc_v8_10_ecc_info_query_ras_error_address +ffffffff81f1b0f0 t umc_v8_10_set_eeprom_table_version +ffffffff81f1b120 t umc_v8_10_query_ecc_error_count +ffffffff81f1b1f0 t umc_v8_10_clear_error_count_per_channel +ffffffff81f1b260 t umc_v8_10_query_error_address +ffffffff81f1b390 t umc_v8_10_convert_error_address +ffffffff81f1b5b0 t umc_v8_10_err_cnt_init_per_channel +ffffffff81f1b660 t umc_v8_10_ecc_info_query_ecc_error_count +ffffffff81f1b740 t umc_v8_10_ecc_info_query_error_address +ffffffff81f1c000 t umc_v8_7_query_ras_error_count +ffffffff81f1c310 t umc_v8_7_query_ras_error_address +ffffffff81f1c4d0 t umc_v8_7_err_cnt_init +ffffffff81f1c630 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81f1c750 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81f1d000 t uvd_v5_0_early_init +ffffffff81f1d050 t uvd_v5_0_sw_init +ffffffff81f1d140 t uvd_v5_0_sw_fini +ffffffff81f1d190 t uvd_v5_0_hw_init +ffffffff81f1d690 t uvd_v5_0_hw_fini +ffffffff81f1d710 t uvd_v5_0_suspend +ffffffff81f1d810 t uvd_v5_0_resume +ffffffff81f1d860 t uvd_v5_0_is_idle +ffffffff81f1d8b0 t uvd_v5_0_wait_for_idle +ffffffff81f1d940 t uvd_v5_0_soft_reset +ffffffff81f1d9e0 t uvd_v5_0_set_clockgating_state +ffffffff81f1db80 t uvd_v5_0_set_powergating_state +ffffffff81f1dbc0 t uvd_v5_0_get_clockgating_state +ffffffff81f1dc40 t uvd_v5_0_ring_get_rptr +ffffffff81f1dc80 t uvd_v5_0_ring_get_wptr +ffffffff81f1dcc0 t uvd_v5_0_ring_set_wptr +ffffffff81f1dcf0 t uvd_v5_0_ring_emit_ib +ffffffff81f1df60 t uvd_v5_0_ring_emit_fence +ffffffff81f1e510 t uvd_v5_0_ring_test_ring +ffffffff81f1e6b0 t uvd_v5_0_ring_insert_nop +ffffffff81f1e810 t uvd_v5_0_set_interrupt_state +ffffffff81f1e840 t uvd_v5_0_process_interrupt +ffffffff81f1e8a0 t uvd_v5_0_stop +ffffffff81f1e9b0 t uvd_v5_0_start +ffffffff81f20000 t uvd_v6_0_early_init +ffffffff81f20160 t uvd_v6_0_sw_init +ffffffff81f203c0 t uvd_v6_0_sw_fini +ffffffff81f20480 t uvd_v6_0_hw_init +ffffffff81f20a30 t uvd_v6_0_hw_fini +ffffffff81f20ab0 t uvd_v6_0_suspend +ffffffff81f20bb0 t uvd_v6_0_resume +ffffffff81f20c00 t uvd_v6_0_is_idle +ffffffff81f20c50 t uvd_v6_0_wait_for_idle +ffffffff81f20ce0 t uvd_v6_0_check_soft_reset +ffffffff81f20d60 t uvd_v6_0_pre_soft_reset +ffffffff81f20da0 t uvd_v6_0_soft_reset +ffffffff81f20e70 t uvd_v6_0_post_soft_reset +ffffffff81f20f10 t uvd_v6_0_set_clockgating_state +ffffffff81f210a0 t uvd_v6_0_set_powergating_state +ffffffff81f21110 t uvd_v6_0_get_clockgating_state +ffffffff81f211a0 t uvd_v6_0_ring_get_rptr +ffffffff81f211e0 t uvd_v6_0_ring_get_wptr +ffffffff81f21220 t uvd_v6_0_ring_set_wptr +ffffffff81f21250 t uvd_v6_0_ring_emit_ib +ffffffff81f215b0 t uvd_v6_0_ring_emit_fence +ffffffff81f21b60 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81f21f50 t uvd_v6_0_ring_emit_vm_flush +ffffffff81f222b0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81f222e0 t uvd_v6_0_ring_test_ring +ffffffff81f22480 t uvd_v6_0_ring_insert_nop +ffffffff81f225e0 t uvd_v6_0_ring_emit_wreg +ffffffff81f22860 t uvd_v6_0_enc_ring_get_rptr +ffffffff81f228c0 t uvd_v6_0_enc_ring_get_wptr +ffffffff81f22920 t uvd_v6_0_enc_ring_set_wptr +ffffffff81f22960 t uvd_v6_0_enc_ring_emit_ib +ffffffff81f22ba0 t uvd_v6_0_enc_ring_emit_fence +ffffffff81f22de0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81f22f90 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81f231a0 t uvd_v6_0_enc_ring_test_ring +ffffffff81f232f0 t uvd_v6_0_enc_ring_test_ib +ffffffff81f237d0 t uvd_v6_0_enc_ring_insert_end +ffffffff81f23860 t uvd_v6_0_set_interrupt_state +ffffffff81f23890 t uvd_v6_0_process_interrupt +ffffffff81f23990 t uvd_v6_0_stop +ffffffff81f23aa0 t uvd_v6_0_start +ffffffff81f25000 t uvd_v7_0_early_init +ffffffff81f25270 t uvd_v7_0_sw_init +ffffffff81f25690 t uvd_v7_0_sw_fini +ffffffff81f25780 t uvd_v7_0_hw_init +ffffffff81f28540 t uvd_v7_0_hw_fini +ffffffff81f28850 t uvd_v7_0_suspend +ffffffff81f28900 t uvd_v7_0_resume +ffffffff81f28950 t uvd_v7_0_set_clockgating_state +ffffffff81f28980 t uvd_v7_0_ring_get_rptr +ffffffff81f28a20 t uvd_v7_0_ring_get_wptr +ffffffff81f28ac0 t uvd_v7_0_ring_set_wptr +ffffffff81f28b40 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81f28bb0 t uvd_v7_0_ring_emit_ib +ffffffff81f28f50 t uvd_v7_0_ring_emit_fence +ffffffff81f295a0 t uvd_v7_0_ring_emit_vm_flush +ffffffff81f29610 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81f29640 t uvd_v7_0_ring_test_ring +ffffffff81f298d0 t uvd_v7_0_ring_insert_nop +ffffffff81f29a70 t uvd_v7_0_ring_emit_wreg +ffffffff81f29d40 t uvd_v7_0_ring_emit_reg_wait +ffffffff81f2a0f0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81f2a1e0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81f2a2e0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81f2a3e0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81f2a620 t uvd_v7_0_enc_ring_emit_fence +ffffffff81f2a860 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81f2a8d0 t uvd_v7_0_enc_ring_test_ring +ffffffff81f2aa30 t uvd_v7_0_enc_ring_test_ib +ffffffff81f2af10 t uvd_v7_0_enc_ring_insert_end +ffffffff81f2afa0 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81f2b0f0 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81f2b2b0 t uvd_v7_0_set_interrupt_state +ffffffff81f2b2e0 t uvd_v7_0_process_interrupt +ffffffff81f2c000 t vce_v3_0_early_init +ffffffff81f2c180 t vce_v3_0_sw_init +ffffffff81f2c2e0 t vce_v3_0_sw_fini +ffffffff81f2c330 t vce_v3_0_hw_init +ffffffff81f2c400 t vce_v3_0_hw_fini +ffffffff81f2c4f0 t vce_v3_0_suspend +ffffffff81f2c5c0 t vce_v3_0_resume +ffffffff81f2c6a0 t vce_v3_0_is_idle +ffffffff81f2c710 t vce_v3_0_wait_for_idle +ffffffff81f2c7c0 t vce_v3_0_check_soft_reset +ffffffff81f2c8c0 t vce_v3_0_pre_soft_reset +ffffffff81f2c960 t vce_v3_0_soft_reset +ffffffff81f2ca30 t vce_v3_0_post_soft_reset +ffffffff81f2cad0 t vce_v3_0_set_clockgating_state +ffffffff81f2cdc0 t vce_v3_0_set_powergating_state +ffffffff81f2d5e0 t vce_v3_0_get_clockgating_state +ffffffff81f2d6a0 t vce_v3_0_ring_get_rptr +ffffffff81f2d770 t vce_v3_0_ring_get_wptr +ffffffff81f2d840 t vce_v3_0_ring_set_wptr +ffffffff81f2d900 t vce_v3_0_ring_emit_ib +ffffffff81f2db40 t vce_v3_0_emit_pipeline_sync +ffffffff81f2dcf0 t vce_v3_0_emit_vm_flush +ffffffff81f2df60 t vce_v3_0_set_interrupt_state +ffffffff81f2dfd0 t vce_v3_0_process_interrupt +ffffffff81f2e090 t vce_v3_0_stop +ffffffff81f2f000 t vce_v4_0_early_init +ffffffff81f2f0b0 t vce_v4_0_sw_init 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+ffffffff81f326d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81f32740 T vcn_dec_sw_ring_emit_wreg +ffffffff81f33000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81f33140 T vcn_v1_0_ring_end_use +ffffffff81f331b0 t vcn_v1_0_early_init +ffffffff81f33310 t vcn_v1_0_sw_init +ffffffff81f335b0 t vcn_v1_0_sw_fini +ffffffff81f33610 t vcn_v1_0_hw_init +ffffffff81f336e0 t vcn_v1_0_hw_fini +ffffffff81f337e0 t vcn_v1_0_suspend +ffffffff81f33850 t vcn_v1_0_resume +ffffffff81f33930 t vcn_v1_0_is_idle +ffffffff81f339c0 t vcn_v1_0_wait_for_idle +ffffffff81f33a00 t vcn_v1_0_set_clockgating_state +ffffffff81f33ab0 t vcn_v1_0_set_powergating_state +ffffffff81f34010 t vcn_v1_0_dec_ring_get_rptr +ffffffff81f340a0 t vcn_v1_0_dec_ring_get_wptr +ffffffff81f34130 t vcn_v1_0_dec_ring_set_wptr +ffffffff81f34240 t vcn_v1_0_ring_patch_cs_in_place +ffffffff81f34400 t vcn_v1_0_dec_ring_emit_ib +ffffffff81f34780 t vcn_v1_0_dec_ring_emit_fence +ffffffff81f34d90 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff81f34e00 t vcn_v1_0_dec_ring_insert_nop +ffffffff81f34f90 t vcn_v1_0_dec_ring_insert_start +ffffffff81f35160 t vcn_v1_0_dec_ring_insert_end +ffffffff81f35270 t vcn_v1_0_ring_begin_use +ffffffff81f35310 t vcn_v1_0_dec_ring_emit_wreg +ffffffff81f355c0 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff81f35940 t vcn_v1_0_enc_ring_get_rptr +ffffffff81f35a20 t vcn_v1_0_enc_ring_get_wptr +ffffffff81f35b00 t vcn_v1_0_enc_ring_set_wptr +ffffffff81f35bc0 t vcn_v1_0_enc_ring_emit_ib +ffffffff81f35e00 t vcn_v1_0_enc_ring_emit_fence +ffffffff81f36040 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81f360b0 t vcn_v1_0_enc_ring_insert_end +ffffffff81f36140 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81f36290 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81f36450 t vcn_v1_0_set_interrupt_state +ffffffff81f36480 t vcn_v1_0_process_interrupt +ffffffff81f36530 t vcn_v1_0_idle_work_handler +ffffffff81f366a0 t vcn_v1_0_pause_dpg_mode +ffffffff81f37540 t vcn_v1_0_enable_clock_gating +ffffffff81f37970 t vcn_v1_0_disable_clock_gating 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vcn_v2_0_sw_init +ffffffff81f41350 t vcn_v2_0_sw_fini +ffffffff81f413d0 t vcn_v2_0_hw_init +ffffffff81f41d50 t vcn_v2_0_hw_fini +ffffffff81f41e50 t vcn_v2_0_suspend +ffffffff81f41e80 t vcn_v2_0_resume +ffffffff81f41ed0 t vcn_v2_0_is_idle +ffffffff81f41f60 t vcn_v2_0_wait_for_idle +ffffffff81f41fa0 t vcn_v2_0_set_clockgating_state +ffffffff81f42030 t vcn_v2_0_set_powergating_state +ffffffff81f425f0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81f42680 t vcn_v2_0_dec_ring_get_wptr +ffffffff81f42720 t vcn_v2_0_dec_ring_set_wptr +ffffffff81f42860 t vcn_v2_0_enc_ring_get_rptr +ffffffff81f42940 t vcn_v2_0_enc_ring_get_wptr +ffffffff81f42a30 t vcn_v2_0_enc_ring_set_wptr +ffffffff81f42b20 t vcn_v2_0_set_interrupt_state +ffffffff81f42b50 t vcn_v2_0_process_interrupt +ffffffff81f42c00 t vcn_v2_0_pause_dpg_mode +ffffffff81f433f0 t vcn_v2_0_enable_clock_gating +ffffffff81f43680 t vcn_v2_0_disable_clock_gating +ffffffff81f43aa0 t vcn_v2_0_start +ffffffff81f48050 t vcn_v2_0_enable_static_power_gating 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vcn_v2_6_set_ras_interrupt_state +ffffffff81f52040 t vcn_v2_5_pause_dpg_mode +ffffffff81f527c0 t vcn_v2_5_enable_clock_gating +ffffffff81f52ad0 t vcn_v2_5_disable_clock_gating +ffffffff81f52fc0 t vcn_v2_5_start_dpg_mode +ffffffff81f56990 t vcn_v2_5_clock_gating_dpg_mode +ffffffff81f57740 t vcn_v2_5_mc_resume_dpg_mode +ffffffff81f5c000 t vcn_v3_0_early_init +ffffffff81f5c220 t vcn_v3_0_sw_init +ffffffff81f5c6e0 t vcn_v3_0_sw_fini +ffffffff81f5c7c0 t vcn_v3_0_hw_init +ffffffff81f5d310 t vcn_v3_0_hw_fini +ffffffff81f5d410 t vcn_v3_0_suspend +ffffffff81f5d440 t vcn_v3_0_resume +ffffffff81f5d490 t vcn_v3_0_is_idle +ffffffff81f5d580 t vcn_v3_0_wait_for_idle +ffffffff81f5d620 t vcn_v3_0_set_clockgating_state +ffffffff81f5d730 t vcn_v3_0_set_powergating_state +ffffffff81f5fcc0 t vcn_v3_0_dec_ring_get_rptr +ffffffff81f5fd60 t vcn_v3_0_dec_ring_get_wptr +ffffffff81f5fe10 t vcn_v3_0_dec_ring_set_wptr +ffffffff81f5ff80 t vcn_v3_0_ring_patch_cs_in_place +ffffffff81f602a0 t vcn_v3_0_enc_ring_get_rptr +ffffffff81f60390 t vcn_v3_0_enc_ring_get_wptr +ffffffff81f604a0 t vcn_v3_0_enc_ring_set_wptr +ffffffff81f605b0 t vcn_v3_0_set_interrupt_state +ffffffff81f605e0 t vcn_v3_0_process_interrupt +ffffffff81f606d0 t vcn_v3_0_pause_dpg_mode +ffffffff81f60f00 t vcn_v3_0_enable_clock_gating +ffffffff81f61190 t vcn_v3_0_disable_clock_gating +ffffffff81f616c0 t vcn_v3_0_start_dpg_mode +ffffffff81f649b0 t vcn_v3_0_clock_gating_dpg_mode +ffffffff81f65790 t vcn_v3_0_mc_resume_dpg_mode +ffffffff81f6a000 t vcn_v4_0_query_ras_poison_status +ffffffff81f6a0e0 t vcn_v4_0_early_init +ffffffff81f6a2a0 t vcn_v4_0_sw_init +ffffffff81f6a560 t vcn_v4_0_sw_fini +ffffffff81f6a640 t vcn_v4_0_hw_init +ffffffff81f6b070 t vcn_v4_0_hw_fini +ffffffff81f6b1c0 t vcn_v4_0_suspend +ffffffff81f6b1f0 t vcn_v4_0_resume +ffffffff81f6b240 t vcn_v4_0_is_idle +ffffffff81f6b340 t vcn_v4_0_wait_for_idle +ffffffff81f6b3f0 t vcn_v4_0_set_clockgating_state +ffffffff81f6b500 t vcn_v4_0_set_powergating_state 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+ffffffff81fce1d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81fce220 t signal_type_to_atom_dig_mode +ffffffff81fce280 t hpd_sel_to_atom +ffffffff81fce2c0 t dig_encoder_sel_to_atom +ffffffff81fce310 t phy_id_to_atom +ffffffff81fce350 t disp_power_gating_action_to_atom +ffffffff81fcf000 T clk_mgr_helper_get_active_display_cnt +ffffffff81fcf0e0 T clk_mgr_helper_get_active_plane_cnt +ffffffff81fcf190 T clk_mgr_exit_optimized_pwr_state +ffffffff81fcf2a0 T clk_mgr_optimize_pwr_state +ffffffff81fcf390 T dc_clk_mgr_create +ffffffff81fcfa50 T dc_destroy_clk_mgr +ffffffff81fd0000 T dentist_get_divider_from_did +ffffffff81fd0070 T dce_adjust_dp_ref_freq_for_ss +ffffffff81fd0170 T dce_get_dp_ref_freq_khz +ffffffff81fd02a0 T dce12_get_dp_ref_freq_khz +ffffffff81fd02c0 T dce_get_max_pixel_clock_for_all_paths +ffffffff81fd04d0 T dce_get_required_clocks_state +ffffffff81fd0580 T dce_set_clock +ffffffff81fd06e0 T dce_clock_read_ss_info +ffffffff81fd0800 T dce_clk_mgr_construct +ffffffff81fd09f0 t dce_update_clocks +ffffffff81fd1000 T dce110_get_min_vblank_time_us +ffffffff81fd1090 T dce110_fill_display_configs +ffffffff81fd1300 T dce11_pplib_apply_display_requirements +ffffffff81fd15f0 T dce110_clk_mgr_construct +ffffffff81fd16a0 t dce11_update_clocks +ffffffff81fd2000 T dce112_set_clock +ffffffff81fd2180 T dce112_set_dispclk +ffffffff81fd22a0 T dce112_set_dprefclk +ffffffff81fd2310 T dce112_clk_mgr_construct +ffffffff81fd23c0 t dce112_update_clocks +ffffffff81fd3000 T dce120_clk_mgr_construct +ffffffff81fd3090 T dce121_clk_mgr_construct +ffffffff81fd31c0 t dce12_update_clocks +ffffffff81fd4000 T rv1_clk_mgr_construct +ffffffff81fd40c0 t rv1_update_clocks +ffffffff81fd45a0 t rv1_init_clocks +ffffffff81fd4630 t rv1_enable_pme_wa +ffffffff81fd5000 T rv1_vbios_smu_set_dispclk +ffffffff81fd50e0 t rv1_vbios_smu_send_msg_with_param +ffffffff81fd51f0 T rv1_vbios_smu_set_dprefclk +ffffffff81fd6000 T rv2_clk_mgr_construct +ffffffff81fd7000 T dentist_get_did_from_divider +ffffffff81fd7080 T dcn20_update_clocks_update_dpp_dto +ffffffff81fd7150 T dcn20_update_clocks_update_dentist +ffffffff81fd7640 T dcn2_update_clocks +ffffffff81fd7bc0 T dcn2_read_clocks_from_hw_dentist +ffffffff81fd7c90 T dcn2_update_clocks_fpga +ffffffff81fd7dc0 T dcn2_init_clocks +ffffffff81fd7e60 T dcn2_get_clock +ffffffff81fd7ed0 T dcn20_clk_mgr_construct +ffffffff81fd8000 t dcn2_enable_pme_wa +ffffffff81fd8050 t dcn2_are_clock_states_equal +ffffffff81fd80c0 t dcn2_notify_link_rate_change +ffffffff81fd9000 T dcn201_clk_mgr_construct +ffffffff81fd9120 t dcn201_update_clocks +ffffffff81fd9340 t dcn201_init_clocks +ffffffff81fda000 T rn_clk_mgr_construct +ffffffff81fda8a0 t rn_update_clocks +ffffffff81fdae60 t rn_set_low_power_state +ffffffff81fdb040 t rn_init_clocks +ffffffff81fdb0e0 t rn_enable_pme_wa +ffffffff81fdb0f0 t rn_are_clock_states_equal +ffffffff81fdb140 t rn_notify_wm_ranges +ffffffff81fdb4d0 t rn_notify_link_rate_change +ffffffff81fdc000 T rn_vbios_smu_get_smu_version +ffffffff81fdc020 t rn_vbios_smu_send_msg_with_param +ffffffff81fdc1b0 T rn_vbios_smu_set_dispclk +ffffffff81fdc2d0 T rn_vbios_smu_set_dprefclk +ffffffff81fdc340 T rn_vbios_smu_set_hard_min_dcfclk +ffffffff81fdc3c0 T rn_vbios_smu_set_min_deep_sleep_dcfclk +ffffffff81fdc440 T rn_vbios_smu_set_phyclk +ffffffff81fdc480 T rn_vbios_smu_set_dppclk +ffffffff81fdc530 T rn_vbios_smu_set_dcn_low_power_state +ffffffff81fdc550 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff81fdc570 T rn_vbios_smu_enable_pme_wa +ffffffff81fdc590 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff81fdd000 T dcn3_init_clocks +ffffffff81fdd3b0 t dcn3_init_clocks_fpga +ffffffff81fdd3c0 T dcn3_clk_mgr_construct +ffffffff81fdd510 T dcn3_clk_mgr_destroy +ffffffff81fdd570 t dcn3_update_clocks +ffffffff81fdd990 t dcn3_enable_pme_wa +ffffffff81fdd9d0 t dcn3_are_clock_states_equal +ffffffff81fdda30 t dcn3_notify_wm_ranges +ffffffff81fddcc0 t dcn30_notify_link_rate_change +ffffffff81fddde0 t dcn3_set_hard_min_memclk +ffffffff81fdde80 t dcn3_set_hard_max_memclk +ffffffff81fddee0 t dcn3_set_max_memclk +ffffffff81fddf20 t dcn3_set_min_memclk +ffffffff81fddf60 t dcn3_get_memclk_states_from_smu +ffffffff81fde0a0 t dcn3_is_smu_present +ffffffff81fdf000 T dcn30_smu_test_message +ffffffff81fdf070 t dcn30_smu_send_msg_with_param +ffffffff81fdf1d0 T dcn30_smu_get_smu_version +ffffffff81fdf1f0 T dcn30_smu_check_driver_if_version +ffffffff81fdf240 T dcn30_smu_check_msg_header_version +ffffffff81fdf290 T dcn30_smu_set_dram_addr_high +ffffffff81fdf2b0 T dcn30_smu_set_dram_addr_low +ffffffff81fdf2d0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff81fdf2f0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff81fdf310 T dcn30_smu_set_hard_min_by_freq +ffffffff81fdf360 T dcn30_smu_set_hard_max_by_freq +ffffffff81fdf3b0 T dcn30_smu_get_dpm_freq_by_index +ffffffff81fdf400 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff81fdf450 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff81fdf470 T dcn30_smu_set_num_of_displays +ffffffff81fdf490 T dcn30_smu_set_display_refresh_from_mall +ffffffff81fdf4c0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff81fdf4e0 T dcn30_smu_set_pme_workaround +ffffffff81fe0000 T dcn301_smu_get_smu_version +ffffffff81fe0070 t dcn301_smu_send_msg_with_param +ffffffff81fe01f0 T dcn301_smu_set_dispclk +ffffffff81fe0290 T dcn301_smu_set_dprefclk +ffffffff81fe0340 T dcn301_smu_set_hard_min_dcfclk +ffffffff81fe03e0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff81fe0480 T dcn301_smu_set_dppclk +ffffffff81fe0520 T dcn301_smu_set_display_idle_optimization +ffffffff81fe0570 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff81fe05c0 T dcn301_smu_enable_pme_wa +ffffffff81fe05e0 T dcn301_smu_set_dram_addr_high +ffffffff81fe0630 T dcn301_smu_set_dram_addr_low +ffffffff81fe0680 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff81fe06a0 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff81fe1000 T vg_clk_mgr_construct +ffffffff81fe1840 T vg_clk_mgr_destroy +ffffffff81fe1890 t vg_update_clocks +ffffffff81fe1bd0 t vg_init_clocks +ffffffff81fe1c70 t vg_enable_pme_wa +ffffffff81fe1c80 t vg_are_clock_states_equal +ffffffff81fe1cd0 t vg_notify_wm_ranges +ffffffff81fe3000 T dcn31_update_clocks +ffffffff81fe3610 T dcn31_init_clocks +ffffffff81fe36c0 T dcn31_are_clock_states_equal +ffffffff81fe3720 T dcn31_get_dtb_ref_freq_khz +ffffffff81fe3750 T dcn31_clk_mgr_construct +ffffffff81fe3e20 T dcn31_clk_mgr_destroy +ffffffff81fe3e70 t dcn31_set_low_power_state +ffffffff81fe4080 t dcn31_enable_pme_wa +ffffffff81fe4090 t dcn31_notify_wm_ranges +ffffffff81fe4410 t find_clk_for_voltage +ffffffff81fe5000 T dcn31_smu_get_smu_version +ffffffff81fe5020 t dcn31_smu_send_msg_with_param +ffffffff81fe5230 T dcn31_smu_set_dispclk +ffffffff81fe52a0 T dcn31_smu_set_dprefclk +ffffffff81fe5310 T dcn31_smu_set_hard_min_dcfclk +ffffffff81fe5390 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff81fe5410 T dcn31_smu_set_dppclk +ffffffff81fe5480 T dcn31_smu_set_display_idle_optimization +ffffffff81fe54d0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff81fe5520 T dcn31_smu_enable_pme_wa +ffffffff81fe5560 T dcn31_smu_set_dram_addr_high +ffffffff81fe55a0 T dcn31_smu_set_dram_addr_low +ffffffff81fe55e0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff81fe5620 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff81fe5660 T dcn31_smu_set_zstate_support +ffffffff81fe56d0 T dcn31_smu_set_dtbclk +ffffffff81fe6000 T dcn314_update_clocks +ffffffff81fe6650 T dcn314_are_clock_states_equal +ffffffff81fe66b0 T dcn314_clk_mgr_construct +ffffffff81fe73c0 T dcn314_clk_mgr_destroy +ffffffff81fe7410 t dcn314_enable_pme_wa +ffffffff81fe7420 t dcn314_notify_wm_ranges +ffffffff81fe8000 T dcn314_smu_get_smu_version +ffffffff81fe8020 t dcn314_smu_send_msg_with_param +ffffffff81fe8250 T dcn314_smu_set_dispclk +ffffffff81fe82c0 T dcn314_smu_set_dprefclk +ffffffff81fe8330 T dcn314_smu_set_hard_min_dcfclk +ffffffff81fe83b0 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81fe8430 T dcn314_smu_set_dppclk +ffffffff81fe84a0 T dcn314_smu_set_display_idle_optimization +ffffffff81fe84f0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81fe8540 T dcn314_smu_enable_pme_wa +ffffffff81fe8580 T dcn314_smu_set_dram_addr_high +ffffffff81fe85c0 T dcn314_smu_set_dram_addr_low +ffffffff81fe8600 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81fe8640 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81fe8680 T dcn314_smu_set_zstate_support +ffffffff81fe86d0 T dcn314_smu_set_dtbclk +ffffffff81fe9000 T dcn315_clk_mgr_construct +ffffffff81fe9810 T dcn315_clk_mgr_destroy +ffffffff81fe9860 t dcn315_update_clocks +ffffffff81fe9da0 t dcn315_enable_pme_wa +ffffffff81fe9db0 t dcn315_notify_wm_ranges +ffffffff81fea130 t dcn315_disable_otg_wa +ffffffff81feb000 T dcn315_smu_get_smu_version +ffffffff81feb020 t dcn315_smu_send_msg_with_param +ffffffff81feb310 T dcn315_smu_set_dispclk +ffffffff81feb380 T dcn315_smu_set_hard_min_dcfclk +ffffffff81feb400 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81feb480 T dcn315_smu_set_dppclk +ffffffff81feb4f0 T dcn315_smu_set_display_idle_optimization +ffffffff81feb540 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81feb590 T dcn315_smu_enable_pme_wa +ffffffff81feb5d0 T dcn315_smu_set_dram_addr_high +ffffffff81feb610 T dcn315_smu_set_dram_addr_low +ffffffff81feb650 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81feb690 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81feb6d0 T dcn315_smu_get_dpref_clk +ffffffff81feb730 T dcn315_smu_get_dtbclk +ffffffff81feb790 T dcn315_smu_set_dtbclk +ffffffff81fec000 T dcn316_clk_mgr_construct +ffffffff81fec650 T dcn316_clk_mgr_destroy +ffffffff81fec6a0 t dcn316_update_clocks +ffffffff81fecc90 t dcn316_enable_pme_wa +ffffffff81fecca0 t dcn316_notify_wm_ranges +ffffffff81fed020 t find_clk_for_voltage +ffffffff81fee000 T dcn316_smu_get_smu_version +ffffffff81fee020 t dcn316_smu_send_msg_with_param +ffffffff81fee1b0 T dcn316_smu_set_dispclk +ffffffff81fee220 T dcn316_smu_set_hard_min_dcfclk +ffffffff81fee2a0 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff81fee320 T dcn316_smu_set_dppclk +ffffffff81fee390 T dcn316_smu_set_display_idle_optimization +ffffffff81fee3e0 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff81fee430 T dcn316_smu_set_dram_addr_high +ffffffff81fee470 T dcn316_smu_set_dram_addr_low +ffffffff81fee4b0 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff81fee4f0 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff81fee530 T dcn316_smu_enable_pme_wa +ffffffff81fee570 T dcn316_smu_set_dtbclk +ffffffff81fee5b0 T dcn316_smu_get_dpref_clk +ffffffff81fee610 T dcn316_smu_get_smu_fclk +ffffffff81fef000 T dcn32_init_clocks +ffffffff81fef560 T dcn32_update_clocks_update_dpp_dto +ffffffff81fef6a0 T dcn32_clk_mgr_construct +ffffffff81fef940 t dcn32_dump_clk_registers +ffffffff81fefb60 T dcn32_clk_mgr_destroy +ffffffff81fefbc0 t dcn32_update_clocks +ffffffff81ff0420 t dcn32_enable_pme_wa +ffffffff81ff0460 t dcn32_are_clock_states_equal +ffffffff81ff04d0 t dcn32_notify_wm_ranges +ffffffff81ff0650 t dcn32_set_hard_min_memclk +ffffffff81ff06e0 t dcn32_set_hard_max_memclk +ffffffff81ff0730 t dcn32_set_max_memclk +ffffffff81ff0770 t dcn32_set_min_memclk +ffffffff81ff07b0 t dcn32_get_memclk_states_from_smu +ffffffff81ff0a00 t dcn32_is_smu_present +ffffffff81ff0a30 t dcn32_get_dispclk_from_dentist +ffffffff81ff0ac0 t dcn32_update_clocks_update_dentist +ffffffff81ff1000 T dcn32_smu_send_fclk_pstate_message +ffffffff81ff1020 t dcn32_smu_send_msg_with_param +ffffffff81ff1160 T dcn32_smu_send_cab_for_uclk_message +ffffffff81ff1190 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff81ff11b0 T dcn32_smu_set_pme_workaround +ffffffff81ff11d0 T dcn32_smu_set_hard_min_by_freq +ffffffff81ff1220 T dcn32_smu_wait_for_dmub_ack_mclk +ffffffff81ff2000 T dc_stream_adjust_vmin_vmax +ffffffff81ff2170 T dc_stream_get_last_used_drr_vtotal +ffffffff81ff22d0 T dc_stream_get_crtc_position +ffffffff81ff2500 T dc_stream_configure_crc +ffffffff81ff2670 T dc_stream_get_crc +ffffffff81ff2750 T dc_stream_set_dyn_expansion +ffffffff81ff29c0 T dc_stream_set_dither_option +ffffffff81ff2b60 T dc_stream_set_gamut_remap +ffffffff81ff2ce0 T dc_stream_program_csc_matrix +ffffffff81ff2f00 T dc_stream_set_static_screen_params +ffffffff81ff3080 T dc_create +ffffffff81ff3600 t dc_construct_ctx +ffffffff81ff3770 t dc_destruct +ffffffff81ff3a40 T dc_hardware_init +ffffffff81ff3b10 T dc_init_callbacks +ffffffff81ff3b60 T dc_deinit_callbacks +ffffffff81ff3bb0 T dc_destroy +ffffffff81ff3c00 T dc_validate_boot_timing +ffffffff81ff3fa0 T dc_enable_stereo +ffffffff81ff40a0 T dc_trigger_sync +ffffffff81ff46d0 T dc_z10_restore +ffffffff81ff4710 T dc_z10_save_init +ffffffff81ff4750 T dc_commit_streams +ffffffff81ff4c30 t commit_minimal_transition_state +ffffffff81ff5060 T dc_create_state +ffffffff81ff50f0 t dc_commit_state_no_check +ffffffff81ff6770 T dc_release_state +ffffffff81ff67d0 T dc_acquire_release_mpc_3dlut +ffffffff81ff68a0 T dc_post_update_surfaces_to_stream +ffffffff81ff6cb0 T dc_copy_state +ffffffff81ff6e80 T dc_retain_state +ffffffff81ff6eb0 T dc_set_generic_gpio_for_stereo +ffffffff81ff6fc0 T dc_check_update_surfaces_for_stream +ffffffff81ff79a0 T dc_dmub_update_dirty_rect +ffffffff81ff7bb0 T dc_update_planes_and_stream +ffffffff81ff8730 t fast_update_only +ffffffff81ff8a90 t commit_planes_for_stream_fast +ffffffff81ff8eb0 t commit_planes_for_stream +ffffffff81ffa430 T dc_commit_updates_for_stream +ffffffff81ffaa50 t copy_surface_update_to_plane +ffffffff81ffae60 t copy_stream_update_to_stream +ffffffff81ffb500 T dc_get_current_stream_count +ffffffff81ffb540 T dc_get_stream_at_index +ffffffff81ffb590 T dc_interrupt_to_irq_source +ffffffff81ffb5b0 T dc_interrupt_set +ffffffff81ffb600 T dc_interrupt_ack +ffffffff81ffb620 T dc_power_down_on_boot +ffffffff81ffb670 T dc_set_power_state +ffffffff81ffb850 T dc_resume +ffffffff81ffb8d0 T dc_is_dmcu_initialized +ffffffff81ffb920 T get_clock_requirements_for_state +ffffffff81ffb9a0 T dc_set_clock +ffffffff81ffb9e0 T dc_get_clock +ffffffff81ffba20 T dc_set_psr_allow_active +ffffffff81ffbb20 T dc_allow_idle_optimizations +ffffffff81ffbbc0 T dc_unlock_memory_clock_frequency +ffffffff81ffbc30 T dc_lock_memory_clock_frequency +ffffffff81ffbcc0 T dc_enable_dcmode_clk_limit +ffffffff81ffbe80 t blank_and_force_memclk +ffffffff81ffc060 T dc_is_plane_eligible_for_idle_optimizations +ffffffff81ffc0b0 T dc_hardware_release +ffffffff81ffc100 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff81ffc140 T dc_is_dmub_outbox_supported +ffffffff81ffc1b0 T dc_enable_dmub_notifications +ffffffff81ffc220 T dc_enable_dmub_outbox +ffffffff81ffc260 T dc_process_dmub_aux_transfer_async +ffffffff81ffc3e0 T get_link_index_from_dpia_port_index +ffffffff81ffc490 T dc_process_dmub_set_config_async +ffffffff81ffc570 T dc_process_dmub_set_mst_slots +ffffffff81ffc660 T dc_process_dmub_dpia_hpd_int_enable +ffffffff81ffc720 T dc_print_dmub_diagnostic_data +ffffffff81ffc740 T dc_disable_accelerated_mode +ffffffff81ffc760 T dc_notify_vsync_int_state +ffffffff81ffc980 T dc_abm_save_restore +ffffffff81ffcb50 T dc_query_current_properties +ffffffff81ffcbc0 T dc_set_edp_power +ffffffff81ffcc30 t create_links +ffffffff81ffd090 t create_link_encoders +ffffffff81ffd170 t dc_update_viusal_confirm_color +ffffffff81ffe000 T pre_surface_trace +ffffffff81ffe030 T update_surface_trace +ffffffff81ffe060 T post_surface_trace +ffffffff81ffe090 T context_timing_trace +ffffffff81ffe240 T context_clock_trace +ffffffff81ffe270 T dc_status_to_str +ffffffff81fff000 T find_color_matrix +ffffffff81fff0b0 T color_space_to_black_color +ffffffff81fff120 T hwss_wait_for_blank_complete +ffffffff81fff1c0 T get_mpctree_visual_confirm_color +ffffffff81fff220 T get_surface_visual_confirm_color +ffffffff81fff2d0 T get_hdr_visual_confirm_color +ffffffff81fff390 T get_subvp_visual_confirm_color +ffffffff81fff490 T hwss_build_fast_sequence +ffffffff81fffb50 T hwss_execute_sequence +ffffffff81ffff40 T hwss_setup_dpp +ffffffff81ffffe0 T hwss_program_bias_and_scale +ffffffff82000060 T hwss_program_manual_trigger +ffffffff820000b0 T hwss_power_on_mpc_mem_pwr +ffffffff82000100 T hwss_set_output_csc +ffffffff82000150 T hwss_set_ocsc_default +ffffffff820001a0 T hwss_send_dmcub_cmd +ffffffff820001c0 T get_mclk_switch_visual_confirm_color +ffffffff82000320 T get_surface_tile_visual_confirm_color +ffffffff82001000 T link_enc_cfg_init +ffffffff820011b0 T link_enc_cfg_copy +ffffffff820011e0 T link_enc_cfg_link_encs_assign +ffffffff820025a0 T link_enc_cfg_validate +ffffffff82002d40 T link_enc_cfg_link_enc_unassign +ffffffff82002ed0 T link_enc_cfg_is_transmitter_mappable +ffffffff82002ff0 T link_enc_cfg_get_stream_using_link_enc +ffffffff820030f0 T link_enc_cfg_get_link_using_link_enc +ffffffff82003200 T link_enc_cfg_get_link_enc_used_by_link +ffffffff82003380 T link_enc_cfg_get_next_avail_link_enc +ffffffff820034f0 T link_enc_cfg_get_link_enc_used_by_stream +ffffffff82003510 T link_enc_cfg_get_link_enc +ffffffff820035a0 T link_enc_cfg_get_link_enc_used_by_stream_current +ffffffff82003720 T link_enc_cfg_is_link_enc_avail +ffffffff82003920 T link_enc_cfg_set_transient_mode +ffffffff82004000 T dc_get_link_at_index +ffffffff82004030 T dc_get_edp_links +ffffffff820040b0 T dc_get_edp_link_panel_inst +ffffffff82004170 T dc_link_detect +ffffffff820041a0 T dc_link_detect_connection_type +ffffffff820041d0 T dc_link_get_status +ffffffff82004200 T dc_link_is_hdcp14 +ffffffff82004230 T dc_link_is_hdcp22 +ffffffff82004260 T dc_link_clear_dprx_states +ffffffff82004290 T dc_link_reset_cur_dp_mst_topology +ffffffff820042c0 T dc_link_bandwidth_kbps +ffffffff820042f0 T dc_get_cur_link_res_map +ffffffff82004310 T dc_restore_link_res_map +ffffffff82004330 T dc_link_update_dsc_config +ffffffff82004360 T dc_is_oem_i2c_device_present +ffffffff820043b0 T dc_submit_i2c +ffffffff820043e0 T dc_submit_i2c_oem +ffffffff82004430 T dc_link_dp_handle_automated_test +ffffffff82004460 T dc_link_dp_set_test_pattern +ffffffff82004490 T dc_link_set_drive_settings +ffffffff82004520 T dc_link_set_preferred_link_settings +ffffffff82004540 T dc_link_set_preferred_training_settings +ffffffff82004570 T dc_dp_trace_is_initialized +ffffffff820045a0 T dc_dp_trace_set_is_logged_flag +ffffffff820045d0 T dc_dp_trace_is_logged +ffffffff82004600 T dc_dp_trace_get_lt_end_timestamp +ffffffff82004630 T dc_dp_trace_get_lt_counts +ffffffff82004660 T dc_dp_trace_get_link_loss_count +ffffffff82004690 T dc_link_add_remote_sink +ffffffff820046c0 T dc_link_remove_remote_sink +ffffffff820046f0 T dc_link_aux_transfer_raw +ffffffff82004720 T dc_link_bw_kbps_from_raw_frl_link_rate_data +ffffffff82004740 T dc_link_decide_edp_link_settings +ffffffff82004770 T dc_link_dp_get_max_link_enc_cap +ffffffff820047a0 T dc_link_dp_mst_decide_link_encoding_format +ffffffff820047d0 T dc_link_get_link_cap +ffffffff82004800 T dc_link_get_highest_encoding_format +ffffffff820048c0 T dc_link_is_dp_sink_present +ffffffff820048f0 T dc_link_is_fec_supported +ffffffff82004920 T dc_link_overwrite_extended_receiver_cap +ffffffff82004950 T dc_link_should_enable_fec +ffffffff82004980 T dc_link_dp_dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff820049b0 T dc_link_handle_usb4_bw_alloc_response +ffffffff820049e0 T dc_link_check_link_loss_status +ffffffff82004a10 T dc_link_dp_allow_hpd_rx_irq +ffffffff82004a40 T dc_link_dp_handle_link_loss +ffffffff82004a70 T dc_link_dp_read_hpd_rx_irq_data +ffffffff82004aa0 T dc_link_handle_hpd_rx_irq +ffffffff82004ad0 T dc_link_dp_receiver_power_ctrl +ffffffff82004b00 T dc_link_decide_lttpr_mode +ffffffff82004b30 T dc_link_edp_panel_backlight_power_on +ffffffff82004b60 T dc_link_get_backlight_level +ffffffff82004b90 T dc_link_get_backlight_level_nits +ffffffff82004bc0 T dc_link_set_backlight_level +ffffffff82004bf0 T dc_link_set_backlight_level_nits +ffffffff82004c20 T dc_link_get_target_backlight_pwm +ffffffff82004c50 T dc_link_get_psr_state +ffffffff82004c80 T dc_link_set_psr_allow_active +ffffffff82004cb0 T dc_link_setup_psr +ffffffff82004ce0 T dc_link_get_replay_state +ffffffff82004d10 T dc_link_wait_for_t12 +ffffffff82004d40 T dc_link_get_hpd_state +ffffffff82004d70 T dc_link_enable_hpd +ffffffff82004da0 T dc_link_disable_hpd +ffffffff82004dd0 T dc_link_enable_hpd_filter +ffffffff82004e00 T dc_link_validate +ffffffff82005000 T resource_parse_asic_id +ffffffff82005250 T dc_create_resource_pool +ffffffff82005550 T dc_destroy_resource_pool +ffffffff820055c0 T resource_construct +ffffffff82005aa0 T resource_unreference_clock_source +ffffffff82005b20 T resource_reference_clock_source +ffffffff82005ba0 T resource_get_clock_source_reference +ffffffff82005c20 T resource_are_vblanks_synchronizable +ffffffff82005e40 T resource_are_streams_timing_synchronizable +ffffffff82005f30 T resource_find_used_clk_src_for_sharing +ffffffff82006060 T resource_get_num_mpc_splits +ffffffff820060f0 T resource_get_num_odm_splits +ffffffff820061b0 T resource_get_otg_master +ffffffff82006250 T resource_build_scaling_params +ffffffff82006fe0 t calculate_odm_slice_in_timing_active +ffffffff82007160 T resource_build_scaling_params_for_context +ffffffff820072b0 T resource_find_free_secondary_pipe_legacy +ffffffff82007350 T resource_find_free_pipe_used_in_cur_mpc_blending_tree +ffffffff820073c0 T resource_is_pipe_type +ffffffff82007440 T recource_find_free_pipe_not_used_in_cur_res_ctx +ffffffff820074c0 T resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine +ffffffff820075e0 T resource_is_for_mpcc_combine +ffffffff82007670 T resource_find_any_free_pipe +ffffffff820076e0 T resource_get_otg_master_for_stream +ffffffff82007810 T resource_get_opp_head +ffffffff820078a0 T dc_add_plane_to_context +ffffffff82007b60 T dc_remove_plane_from_context +ffffffff82007d40 T dc_rem_all_planes_for_stream +ffffffff82007f00 T dc_add_all_planes_for_stream +ffffffff82008080 T dc_is_timing_changed +ffffffff820080e0 T dc_is_stream_unchanged +ffffffff820081c0 T dc_is_stream_scaling_unchanged +ffffffff82008260 T update_audio_usage +ffffffff820082d0 T dc_add_stream_to_ctx +ffffffff820083a0 T dc_remove_stream_from_ctx +ffffffff820087b0 T resource_map_pool_resources +ffffffff82009210 t acquire_first_split_pipe +ffffffff82009380 t add_hpo_dp_link_enc_to_ctx +ffffffff82009450 t find_first_free_audio +ffffffff82009500 T dc_resource_state_copy_construct_current +ffffffff82009520 T dc_resource_state_copy_construct +ffffffff820096c0 T dc_resource_state_construct +ffffffff820096e0 T dc_resource_is_dsc_encoding_supported +ffffffff82009730 T dc_validate_with_context +ffffffff8200a360 t planes_changed_for_existing_stream +ffffffff8200a4e0 T dc_validate_global_state +ffffffff8200a860 T dc_resource_state_destruct +ffffffff8200a940 T dc_resource_find_first_free_pll +ffffffff8200a9b0 T resource_build_info_frame +ffffffff8200b0e0 T resource_map_clock_resources +ffffffff8200b270 T pipe_need_reprogram +ffffffff8200b3e0 T resource_build_bit_depth_reduction_params +ffffffff8200b610 T dc_validate_stream +ffffffff8200b7e0 T dc_validate_plane +ffffffff8200b870 T resource_pixel_format_to_bpp +ffffffff8200b8f0 T get_audio_check +ffffffff8200ba10 T get_temp_dp_link_res +ffffffff8200bb20 T reset_syncd_pipes_from_disabled_pipes +ffffffff8200bc70 T check_syncd_pipes_for_disabled_master_pipe +ffffffff8200bdb0 T reset_sync_context_for_pipe +ffffffff8200be60 T resource_transmitter_to_phy_idx +ffffffff8200bec0 T get_link_hwss +ffffffff8200bf50 T is_h_timing_divisible_by_2 +ffffffff8200bfb0 T dc_resource_acquire_secondary_pipe_for_mpc_odm +ffffffff8200c1c0 T update_dp_encoder_resources_for_test_harness +ffffffff8200c480 t calculate_plane_rec_in_timing_active +ffffffff8200c750 t calculate_init_and_vp +ffffffff8200d000 T dc_sink_retain +ffffffff8200d030 T dc_sink_release +ffffffff8200d0a0 T dc_sink_create +ffffffff8200e000 T dc_stat_get_dmub_notification +ffffffff8200e0b0 T dc_stat_get_dmub_dataout +ffffffff8200f000 T update_stream_signal +ffffffff8200f080 T dc_stream_retain +ffffffff8200f0b0 T dc_stream_release +ffffffff8200f130 T dc_create_stream_for_sink +ffffffff8200f470 T dc_copy_stream +ffffffff8200f540 T dc_stream_get_status_from_state +ffffffff8200f5a0 T dc_stream_get_status +ffffffff8200f610 T dc_optimize_timing_for_fsft +ffffffff8200f660 T dc_stream_set_cursor_attributes +ffffffff8200f860 t program_cursor_attributes +ffffffff8200f9c0 T dc_stream_set_cursor_position +ffffffff8200fae0 t program_cursor_position +ffffffff8200fc20 T dc_stream_add_writeback +ffffffff8200fe30 T dc_stream_remove_writeback +ffffffff8200ff60 T dc_stream_warmup_writeback +ffffffff8200ffa0 T dc_stream_get_vblank_counter +ffffffff82010070 T dc_stream_send_dp_sdp +ffffffff82010300 T dc_stream_get_scanoutpos +ffffffff820103e0 T dc_stream_dmdata_status_done +ffffffff820104a0 T dc_stream_set_dynamic_metadata +ffffffff82010600 T dc_stream_add_dsc_to_resource +ffffffff82010650 T dc_stream_get_pipe_ctx +ffffffff82010700 T dc_stream_log +ffffffff82011000 T enable_surface_flip_reporting +ffffffff82011030 T dc_create_plane_state +ffffffff820111d0 T dc_plane_get_status +ffffffff82011350 T dc_plane_state_retain +ffffffff82011380 T dc_plane_state_release +ffffffff820114d0 T dc_gamma_retain +ffffffff82011500 T dc_gamma_release +ffffffff82011560 T dc_create_gamma +ffffffff820115b0 T dc_transfer_func_retain +ffffffff820115e0 T dc_transfer_func_release +ffffffff82011630 T dc_create_transfer_func +ffffffff82011680 T dc_create_3dlut_func +ffffffff820116e0 T dc_3dlut_func_release +ffffffff82011730 T dc_3dlut_func_retain +ffffffff82012000 T vm_helper_mark_vmid_used +ffffffff82012030 T dc_setup_system_context +ffffffff820120c0 T dc_setup_vm_context +ffffffff820120f0 T dc_get_vmid_use_vector +ffffffff82012150 T vm_helper_init +ffffffff82013000 T dc_dmub_srv_create +ffffffff820130a0 T dc_dmub_srv_destroy +ffffffff820130f0 T dc_dmub_srv_wait_idle +ffffffff82013150 T dc_dmub_srv_log_diagnostic_data +ffffffff82013690 T dc_dmub_srv_clear_inbox0_ack +ffffffff820136f0 T dc_dmub_srv_wait_for_inbox0_ack +ffffffff82013750 T dc_dmub_srv_send_inbox0_cmd +ffffffff820137b0 T dc_dmub_srv_cmd_run +ffffffff820137d0 T dc_dmub_srv_cmd_run_list +ffffffff82013980 T dc_dmub_srv_optimized_init_done +ffffffff82013a00 T dc_dmub_srv_notify_stream_mask +ffffffff82013a60 T dc_dmub_srv_is_restore_required +ffffffff82013ae0 T dc_dmub_srv_get_dmub_outbox0_msg +ffffffff82013b10 T dc_dmub_trace_event_control +ffffffff82013b30 T dc_dmub_srv_drr_update_cmd +ffffffff82013bc0 T dc_dmub_srv_set_drr_manual_trigger_cmd +ffffffff82013c50 T dc_dmub_srv_p_state_delegate +ffffffff82014000 T dc_dmub_srv_query_caps_cmd +ffffffff820140c0 T dc_dmub_srv_get_visual_confirm_color_cmd +ffffffff820141a0 T dc_dmub_setup_subvp_dmub_command +ffffffff82014bb0 T dc_dmub_srv_get_diagnostic_data +ffffffff82014bf0 T dc_send_update_cursor_info_to_dmu +ffffffff82014f60 T dc_dmub_check_min_version +ffffffff82014fa0 T dc_dmub_srv_enable_dpia_trace +ffffffff82016000 T dc_edid_parser_send_cea +ffffffff820160b0 T dc_edid_parser_recv_cea_ack +ffffffff82016140 T dc_edid_parser_recv_amd_vsdb +ffffffff82017000 T generic_reg_update_ex +ffffffff82017330 t set_reg_field_values +ffffffff820174e0 T generic_reg_set_ex +ffffffff820176d0 T generic_reg_get +ffffffff82017740 T generic_reg_get2 +ffffffff820177d0 T generic_reg_get3 +ffffffff82017870 T generic_reg_get4 +ffffffff82017920 T generic_reg_get5 +ffffffff820179e0 T generic_reg_get6 +ffffffff82017ac0 T generic_reg_get7 +ffffffff82017bb0 T generic_reg_get8 +ffffffff82017cc0 T generic_reg_wait +ffffffff82017f10 T generic_write_indirect_reg +ffffffff82017f60 T generic_read_indirect_reg +ffffffff82018000 T generic_indirect_reg_get +ffffffff820181b0 T generic_indirect_reg_update_ex +ffffffff820183c0 T generic_indirect_reg_update_ex_sync +ffffffff820185b0 T generic_indirect_reg_get_sync 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dcn10_send_edid_cea +ffffffff82022d10 t dcn10_recv_amd_vsdb +ffffffff82022dc0 t dcn10_recv_edid_cea_ack +ffffffff82022e40 t dcn10_get_scp_results +ffffffff82022f60 t dcn20_lock_phy +ffffffff82023090 t dcn20_unlock_phy +ffffffff820231c0 t dcn21_dmcu_init +ffffffff82024000 T dce_enable_fe_clock +ffffffff82024040 T dce_pipe_control_lock +ffffffff82024240 T dce_set_blender_mode +ffffffff82024350 T dce_clock_gating_power_up +ffffffff820243f0 T dce_crtc_switch_to_clk_src +ffffffff820245b0 T dce_use_lut +ffffffff82025000 T dce_i2c_oem_device_present +ffffffff82025080 T dce_i2c_submit_command +ffffffff82026000 T acquire_i2c_hw_engine +ffffffff820263a0 T dce_i2c_submit_command_hw +ffffffff82026ce0 t set_speed +ffffffff82026e30 T dce_i2c_hw_construct +ffffffff82026ea0 T dce100_i2c_hw_construct +ffffffff82026f10 T dce112_i2c_hw_construct +ffffffff82026f80 T dcn1_i2c_hw_construct +ffffffff82026ff0 T dcn2_i2c_hw_construct +ffffffff82027080 t is_hw_busy +ffffffff82028000 T dce_i2c_sw_construct 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dce120_mem_input_construct +ffffffff8202d120 t dce_mi_program_display_marks +ffffffff8202d3f0 t dce_mi_allocate_dmif +ffffffff8202d630 t dce_mi_free_dmif +ffffffff8202d790 t dce_mi_program_surface_flip_and_addr +ffffffff8202dab0 t dce_mi_program_pte_vm +ffffffff8202dc70 t dce_mi_program_surface_config +ffffffff8202e4f0 t dce_mi_is_flip_pending +ffffffff8202e580 t program_nbp_watermark +ffffffff8202e780 t dce112_mi_program_display_marks +ffffffff8202ec90 t dce120_mi_program_display_marks +ffffffff8202f150 t dce120_program_stutter_watermark +ffffffff82030000 T dce110_opp_set_clamping +ffffffff820302b0 T dce110_opp_program_bit_depth_reduction +ffffffff82030a80 T dce110_opp_program_clamping_and_pixel_encoding +ffffffff82030c20 T dce110_opp_set_dyn_expansion +ffffffff82030d70 T dce110_opp_program_fmt +ffffffff82030ef0 T dce110_opp_construct +ffffffff82030f50 T dce110_opp_destroy +ffffffff82031000 T dce_panel_cntl_construct +ffffffff82031060 t dce_panel_cntl_destroy +ffffffff820310b0 t dce_panel_cntl_hw_init +ffffffff820312f0 t dce_is_panel_backlight_on +ffffffff820313a0 t dce_is_panel_powered_on +ffffffff82031450 t dce_store_backlight_level +ffffffff820314f0 t dce_driver_set_backlight +ffffffff82031670 t dce_get_16_bit_backlight_from_pwm +ffffffff82032000 T get_filter_3tap_16p +ffffffff82032090 T get_filter_3tap_64p +ffffffff82032120 T get_filter_4tap_16p +ffffffff820321b0 T get_filter_4tap_64p +ffffffff82032240 T get_filter_5tap_64p +ffffffff820322d0 T get_filter_6tap_64p +ffffffff82032360 T get_filter_7tap_64p +ffffffff820323f0 T get_filter_8tap_64p +ffffffff82032480 T get_filter_2tap_16p +ffffffff820324b0 T get_filter_2tap_64p +ffffffff82033000 T dce110_se_audio_mute_control +ffffffff82033050 T dce110_se_dp_audio_setup +ffffffff82033060 t dce110_se_audio_setup +ffffffff820331c0 T dce110_se_dp_audio_enable +ffffffff82033400 T dce110_se_dp_audio_disable +ffffffff82033560 T dce110_se_hdmi_audio_setup +ffffffff82033a60 T dce110_se_hdmi_audio_disable +ffffffff82033ac0 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dmub_psr_set_level +ffffffff8203eb30 t dmub_psr_force_static +ffffffff8203ebd0 t dmub_psr_get_residency +ffffffff8203ec20 t dmub_psr_set_sink_vtotal_in_psr_active +ffffffff8203ecc0 t dmub_psr_set_power_opt +ffffffff8203f000 T dmub_replay_create +ffffffff8203f090 T dmub_replay_destroy +ffffffff8203f0e0 t dmub_replay_get_state +ffffffff8203f1d0 t dmub_replay_enable +ffffffff8203f3f0 t dmub_replay_copy_settings +ffffffff8203f6b0 t dmub_replay_set_power_opt +ffffffff8203f750 t dmub_replay_set_coasting_vtotal +ffffffff8203f7e0 t dmub_replay_residency +ffffffff82040000 T dce100_enable_display_power_gating +ffffffff820400a0 T dce100_prepare_bandwidth +ffffffff820400f0 T dce100_optimize_bandwidth +ffffffff82040140 T dce100_hw_sequencer_construct +ffffffff82041000 T dce100_add_stream_to_ctx +ffffffff820410a0 T dce100_validate_plane +ffffffff820410e0 T dce100_find_first_free_match_stream_enc_for_link +ffffffff82041190 T dce100_create_resource_pool +ffffffff82041f60 t dce100_resource_destruct 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dce110_enable_lvds_link_output +ffffffff82046cf0 T dce110_enable_tmds_link_output +ffffffff82046d60 T dce110_enable_dp_link_output +ffffffff82046f90 T dce110_disable_link_output +ffffffff82047080 T dce110_hw_sequencer_construct +ffffffff820470d0 t enable_display_pipe_clock_gating +ffffffff82047100 t build_audio_output +ffffffff82047260 t init_hw +ffffffff82047500 t dce110_power_down_fe +ffffffff820475d0 t dce110_apply_ctx_for_surface +ffffffff82047d10 t dce110_post_unlock_program_front_end +ffffffff82047d40 t update_plane_addr +ffffffff82047db0 t dce110_wait_for_mpcc_disconnect +ffffffff82047de0 t dce110_update_pending_status +ffffffff82047ec0 t get_position +ffffffff82047f50 t dce110_enable_per_frame_crtc_position_reset +ffffffff820481f0 t dce110_enable_timing_synchronization +ffffffff820484e0 t set_drr +ffffffff820485c0 t set_static_screen_control +ffffffff82048690 t dce110_set_cursor_position +ffffffff820487e0 t dce110_set_cursor_attribute +ffffffff820488a0 t program_gamut_remap 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dce110_timing_generator_is_counter_moving +ffffffff82050fa0 T dce110_timing_generator_wait_for_vactive +ffffffff82051080 T dce110_timing_generator_setup_global_swap_lock +ffffffff820511e0 T dce110_timing_generator_tear_down_global_swap_lock +ffffffff82051260 T dce110_timing_generator_enable_advanced_request +ffffffff82051300 T dce110_timing_generator_set_lock_master +ffffffff82051360 T dce110_timing_generator_enable_reset_trigger +ffffffff82051450 T dce110_timing_generator_enable_crtc_reset +ffffffff82051640 T dce110_timing_generator_disable_reset_trigger +ffffffff82051730 T dce110_timing_generator_did_triggered_reset_occur +ffffffff820517c0 T dce110_timing_generator_disable_vga +ffffffff82051820 T dce110_timing_generator_set_overscan_color_black +ffffffff820518c0 T dce110_tg_program_blank_color +ffffffff82051980 T dce110_tg_set_overscan_color +ffffffff820519e0 T dce110_tg_program_timing +ffffffff82051a10 T dce110_tg_is_blanked +ffffffff82051a70 T dce110_tg_set_blank +ffffffff82051ad0 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dce110_timing_generator_v_program_blank_color +ffffffff820538b0 t dce110_timing_generator_v_set_colors +ffffffff820539e0 t dce110_timing_generator_v_disable_vga +ffffffff82053a10 t dce110_timing_generator_v_did_triggered_reset_occur +ffffffff82053a50 t dce110_timing_generator_v_setup_global_swap_lock +ffffffff82053a70 t dce110_timing_generator_v_enable_reset_trigger +ffffffff82053a90 t dce110_timing_generator_v_disable_reset_trigger +ffffffff82053ab0 t dce110_timing_generator_v_tear_down_global_swap_lock +ffffffff82053ad0 t dce110_timing_generator_v_enable_advanced_request +ffffffff82054000 T dce110_transform_v_construct +ffffffff82054060 t dce110_xfmv_reset +ffffffff820540c0 t dce110_xfmv_set_scaler +ffffffff82054800 t dce110_xfmv_set_pixel_storage_depth +ffffffff820548e0 t dce110_xfmv_set_gamut_remap +ffffffff82054910 t program_multi_taps_filter +ffffffff82054d00 t program_viewport +ffffffff82055000 T dce112_compressor_power_up_fbc +ffffffff82055130 T dce112_compressor_enable_fbc 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dce112_resource_destruct +ffffffff820598e0 t dce112_destroy_resource_pool +ffffffff82059940 t dce112_panel_cntl_create +ffffffff820599d0 t dce112_link_encoder_create +ffffffff82059ad0 t dce112_validate_global +ffffffff82059b70 t read_dce_straps +ffffffff82059be0 t create_audio +ffffffff82059c10 t dce112_stream_encoder_create +ffffffff82059cb0 t dce112_hwseq_create +ffffffff8205a000 T dce121_xgmi_enabled +ffffffff8205a060 T dce120_hw_sequencer_construct +ffffffff8205a0c0 t dce120_enable_display_power_gating +ffffffff8205a0f0 t dce120_update_dchub +ffffffff8205b000 T dce120_create_resource_pool +ffffffff8205c320 t dce120_resource_destruct +ffffffff8205c600 t dce120_destroy_resource_pool +ffffffff8205c660 t dce120_panel_cntl_create +ffffffff8205c6f0 t dce120_link_encoder_create +ffffffff8205c7f0 t read_dce_straps +ffffffff8205c880 t create_audio +ffffffff8205c8b0 t dce120_stream_encoder_create +ffffffff8205c950 t dce121_hwseq_create +ffffffff8205c9c0 t dce120_hwseq_create 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dpp1_dppclk_control +ffffffff82067dc0 T dpp1_construct +ffffffff82067e40 t dpp1_cm_set_regamma_pwl +ffffffff82068000 T dpp1_cm_set_gamut_remap +ffffffff820681a0 T dpp1_cm_set_output_csc_default +ffffffff82068220 t dpp1_cm_program_color_matrix +ffffffff820683e0 T dpp1_cm_set_output_csc_adjustment +ffffffff820683f0 T dpp1_cm_power_on_regamma_lut +ffffffff82068470 T dpp1_cm_program_regamma_lut +ffffffff82068680 T dpp1_cm_configure_regamma_lut +ffffffff82068780 T dpp1_cm_program_regamma_luta_settings +ffffffff82068920 T dpp1_cm_program_regamma_lutb_settings +ffffffff82068ac0 T dpp1_program_input_csc +ffffffff82068d10 T dpp1_program_bias_and_scale +ffffffff82068e80 T dpp1_program_degamma_lutb_settings +ffffffff82069030 T dpp1_program_degamma_luta_settings +ffffffff820691e0 T dpp1_power_on_degamma_lut +ffffffff82069260 T dpp1_set_degamma +ffffffff82069450 T dpp1_degamma_ram_select +ffffffff820694b0 T dpp1_program_degamma_lut +ffffffff820697d0 T dpp1_set_degamma_pwl +ffffffff820699a0 T dpp1_full_bypass +ffffffff82069b40 T dpp1_program_input_lut +ffffffff8206a1e0 T dpp1_set_hdr_multiplier +ffffffff8206b000 T dpp1_dscl_calc_lb_num_partitions +ffffffff8206b1e0 T dpp1_dscl_is_lb_conf_valid +ffffffff8206b220 T dpp1_dscl_set_scaler_manual_scale +ffffffff8206c640 t dpp1_dscl_get_filter_coeffs_64p +ffffffff8206c710 t dpp1_dscl_set_scaler_filter +ffffffff8206d000 t dwb1_get_caps +ffffffff8206d0a0 t dwb1_enable +ffffffff8206d1a0 t dwb1_disable +ffffffff8206d300 T dcn10_dwbc_construct +ffffffff8206e000 T hubbub1_wm_read_state +ffffffff8206e320 T hubbub1_allow_self_refresh_control +ffffffff8206e3a0 T hubbub1_is_allow_self_refresh_enabled +ffffffff8206e410 T hubbub1_verify_allow_pstate_change_high +ffffffff8206e5d0 T hubbub1_wm_change_req_wa +ffffffff8206e670 T hubbub1_program_urgent_watermarks +ffffffff8206ea50 T hubbub1_program_stutter_watermarks +ffffffff8206eeb0 T hubbub1_program_pstate_watermarks +ffffffff8206f100 T hubbub1_program_watermarks +ffffffff8206f230 T hubbub1_update_dchub +ffffffff8206f460 T hubbub1_toggle_watermark_change_req +ffffffff8206f500 T hubbub1_soft_reset +ffffffff8206f540 T hubbub1_construct +ffffffff8206f5a0 t hubbub1_get_dcc_compression_cap +ffffffff8206f7c0 t hubbub1_dcc_support_swizzle +ffffffff8206f850 t hubbub1_dcc_support_pixel_format +ffffffff82070000 T hubp1_set_blank +ffffffff82070110 T hubp1_clear_underflow +ffffffff82070160 T hubp1_vready_workaround +ffffffff820701f0 T hubp1_program_tiling +ffffffff82070450 T hubp1_program_size +ffffffff820705d0 T hubp1_program_rotation +ffffffff82070740 T hubp1_program_pixel_format +ffffffff82070d10 T hubp1_program_surface_flip_and_addr +ffffffff82071590 T hubp1_dcc_control +ffffffff82071650 T hubp1_program_surface_config +ffffffff82071760 T hubp1_program_requestor +ffffffff82071b30 T hubp1_program_deadline +ffffffff82072240 T hubp1_is_flip_pending +ffffffff82072350 T min_set_viewport +ffffffff82072650 T hubp1_read_state_common +ffffffff82073340 T hubp1_read_state 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dcn10_disable_vga +ffffffff82077040 T dcn10_dpp_pg_control +ffffffff82077290 T dcn10_hubp_pg_control +ffffffff820774e0 T dcn10_bios_golden_init +ffffffff82077640 T dcn10_enable_stream_timing +ffffffff82077a40 T dcn10_verify_allow_pstate_change_high +ffffffff82077d90 T dcn10_plane_atomic_disconnect +ffffffff82077ec0 T dcn10_plane_atomic_power_down +ffffffff82078020 T dcn10_plane_atomic_disable +ffffffff82078160 T dcn10_disable_plane +ffffffff82078300 T dcn10_init_pipes +ffffffff820789c0 T dcn10_init_hw +ffffffff82078eb0 T dcn10_power_down_on_boot +ffffffff82079000 T dcn10_reset_hw_ctx_wrap +ffffffff82079340 T dcn10_update_plane_addr +ffffffff82079460 T dcn10_set_input_transfer_func +ffffffff820795d0 T dcn10_set_output_transfer_func +ffffffff820796a0 T dcn10_pipe_control_lock +ffffffff82079770 T dcn10_cursor_lock +ffffffff82079930 T dcn10_enable_vblanks_synchronization +ffffffff8207a110 T dcn10_enable_timing_synchronization +ffffffff8207a510 T dcn10_enable_per_frame_crtc_position_reset +ffffffff8207a6e0 T dcn10_program_gamut_remap +ffffffff8207a8e0 T dcn10_program_output_csc +ffffffff8207aa10 T dcn10_update_visual_confirm_color +ffffffff8207aa90 T dcn10_update_mpcc +ffffffff8207ad40 T dcn10_blank_pixel_data +ffffffff8207ae80 T dcn10_set_hdr_multiplier +ffffffff8207af10 T dcn10_program_pipe +ffffffff8207bab0 T dcn10_wait_for_pending_cleared +ffffffff8207bbb0 T dcn10_post_unlock_program_front_end +ffffffff8207be50 T dcn10_prepare_bandwidth +ffffffff8207bff0 T dcn10_optimize_bandwidth +ffffffff8207c190 T dcn10_set_drr +ffffffff8207c290 T dcn10_get_position +ffffffff8207c320 T dcn10_set_static_screen_control +ffffffff8207c3c0 T dcn10_setup_stereo +ffffffff8207c510 T dcn10_wait_for_mpcc_disconnect +ffffffff8207c6c0 T dcn10_dummy_display_power_gating +ffffffff8207c6f0 T dcn10_update_pending_status +ffffffff8207c830 T dcn10_update_dchub +ffffffff8207c860 T dcn10_set_cursor_position +ffffffff8207cda0 T dcn10_set_cursor_attribute +ffffffff8207cdf0 T dcn10_set_cursor_sdr_white_level +ffffffff8207ceb0 T dcn10_get_vupdate_offset_from_vsync +ffffffff8207cf40 T dcn10_calc_vupdate_position +ffffffff8207cfd0 T dcn10_setup_periodic_interrupt +ffffffff8207d0e0 T dcn10_setup_vupdate_interrupt +ffffffff8207d1a0 T dcn10_unblank_stream +ffffffff8207d2b0 T dcn10_send_immediate_sdp_message +ffffffff8207d310 T dcn10_set_clock +ffffffff8207d420 T dcn10_get_clock +ffffffff8207d480 T dcn10_get_dcc_en_bits +ffffffff8207e000 T snprintf_count +ffffffff8207e090 T dcn10_clear_status_bits +ffffffff8207e240 T dcn10_get_hw_state +ffffffff82080000 T dcn10_hw_sequencer_construct +ffffffff82081000 T dcn10_ipp_construct +ffffffff82081050 T dcn20_ipp_construct +ffffffff820810a0 t dcn10_ipp_destroy +ffffffff82082000 T dcn10_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff820820b0 T dcn10_get_dig_frontend +ffffffff82082170 T enc1_configure_encoder +ffffffff820821f0 T dcn10_psr_program_dp_dphy_fast_training +ffffffff82082270 T dcn10_psr_program_secondary_packet +ffffffff820822f0 T dcn10_is_dig_enabled +ffffffff82082350 T dcn10_link_encoder_validate_dvi_output +ffffffff82082400 T dcn10_link_encoder_validate_dp_output +ffffffff82082440 T dcn10_link_encoder_construct +ffffffff82082620 T dcn10_link_encoder_validate_output_with_stream +ffffffff82082820 T dcn10_link_encoder_hw_init +ffffffff82082a20 T dcn10_aux_initialize +ffffffff82082ab0 T dcn10_link_encoder_destroy +ffffffff82082b00 T dcn10_link_encoder_setup +ffffffff82082c50 T dcn10_link_encoder_enable_tmds_output +ffffffff82082d40 T dcn10_link_encoder_enable_tmds_output_with_clk_pattern_wa +ffffffff82082e60 T dcn10_link_encoder_enable_dp_output +ffffffff82082fc0 T dcn10_link_encoder_enable_dp_mst_output +ffffffff82083120 T dcn10_link_encoder_disable_output +ffffffff820832f0 T dcn10_link_encoder_dp_set_lane_settings +ffffffff82083490 T dcn10_link_encoder_dp_set_phy_pattern +ffffffff82083bb0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff82083db0 T dcn10_link_encoder_update_mst_stream_allocation_table +ffffffff82084080 T dcn10_link_encoder_connect_dig_be_to_fe +ffffffff820841c0 T dcn10_link_encoder_enable_hpd +ffffffff82084200 T dcn10_link_encoder_disable_hpd +ffffffff82084240 T dcn10_get_dig_mode +ffffffff820842b0 T dcn10_link_encoder_get_max_link_cap +ffffffff82084330 t program_pattern_symbols +ffffffff82085000 T mpc1_set_bg_color +ffffffff820851e0 T mpc1_get_mpcc +ffffffff82085270 T mpc1_update_stereo_mix +ffffffff82085390 T mpc1_assert_idle_mpcc +ffffffff82085460 T mpc1_get_mpcc_for_dpp +ffffffff82085510 T mpc1_is_mpcc_idle +ffffffff82085600 T mpc1_assert_mpcc_idle_before_connect +ffffffff82085740 T mpc1_insert_plane +ffffffff82085ce0 T mpc1_remove_mpcc +ffffffff820860a0 T mpc1_mpc_init +ffffffff820863c0 T mpc1_mpc_init_single_inst +ffffffff820865b0 T mpc1_init_mpcc_list_from_hw +ffffffff82086880 T mpc1_read_mpcc_state +ffffffff82086a10 T mpc1_cursor_lock +ffffffff82086a90 T mpc1_get_mpc_out_mux +ffffffff82086b10 T dcn10_mpc_construct +ffffffff82086c90 t mpc1_update_blending +ffffffff82087000 T opp1_program_bit_depth_reduction +ffffffff82087400 T opp1_set_dyn_expansion +ffffffff82087570 T opp1_program_fmt +ffffffff82087870 T opp1_program_stereo +ffffffff82087960 T opp1_pipe_clock_control +ffffffff820879a0 T opp1_destroy +ffffffff820879f0 T dcn10_opp_construct +ffffffff82088000 T optc1_program_global_sync +ffffffff82088150 T optc1_setup_vertical_interrupt0 +ffffffff820881e0 T optc1_setup_vertical_interrupt1 +ffffffff82088250 T optc1_setup_vertical_interrupt2 +ffffffff820882c0 T optc1_program_timing +ffffffff820889a0 T optc1_is_two_pixels_per_containter +ffffffff820889f0 T optc1_set_vtg_params +ffffffff82088b20 T optc1_set_blank_data_double_buffer +ffffffff82088b60 T optc1_set_timing_double_buffer +ffffffff82088ba0 T optc1_set_blank +ffffffff82088c70 T optc1_is_blanked +ffffffff82088cf0 T optc1_enable_optc_clock +ffffffff82088f10 T optc1_disable_crtc +ffffffff82089000 T optc1_program_blank_color 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optc1_is_tg_enabled +ffffffff8208a650 T optc1_is_optc_underflow_occurred +ffffffff8208a6c0 T optc1_configure_crc +ffffffff8208a930 T optc1_get_crc +ffffffff8208aa30 T dcn10_timing_generator_init +ffffffff8208aaa0 t optc1_enable_crtc +ffffffff8208aba0 t optc1_set_test_pattern +ffffffff8208b290 t optc1_program_manual_trigger +ffffffff8208b340 t optc1_setup_manual_trigger +ffffffff8208c000 T dcn10_find_first_free_match_stream_enc_for_link +ffffffff8208c0b0 T dcn10_create_resource_pool +ffffffff8208d230 t dcn10_resource_destruct +ffffffff8208d540 t dcn10_destroy_resource_pool +ffffffff8208d5a0 t dcn10_panel_cntl_create +ffffffff8208d630 t dcn10_link_encoder_create +ffffffff8208d730 t dcn10_validate_bandwidth +ffffffff8208d7b0 t dcn10_validate_global +ffffffff8208d990 t dcn10_acquire_free_pipe_for_layer +ffffffff8208dac0 t dcn10_validate_plane +ffffffff8208db10 t dcn10_add_stream_to_ctx +ffffffff8208dce0 t dcn10_patch_unknown_plane_state +ffffffff8208dd40 t read_dce_straps +ffffffff8208dd70 t create_audio +ffffffff8208dda0 t dcn10_stream_encoder_create +ffffffff8208de40 t dcn10_hwseq_create +ffffffff8208def0 t dcn10_get_dcc_compression_cap +ffffffff8208e000 T enc1_update_generic_info_packet +ffffffff8208e430 T enc1_stream_encoder_dp_set_stream_attribute +ffffffff8208e910 T enc1_stream_encoder_set_stream_attribute_helper +ffffffff8208e990 T enc1_stream_encoder_hdmi_set_stream_attribute +ffffffff8208ef80 T enc1_stream_encoder_dvi_set_stream_attribute +ffffffff8208f110 T enc1_stream_encoder_set_throttled_vcp_size +ffffffff8208f330 T enc1_stream_encoder_update_dp_info_packets +ffffffff8208f530 T enc1_stream_encoder_send_immediate_sdp_message +ffffffff8208f940 T enc1_stream_encoder_stop_dp_info_packets +ffffffff8208fb10 T enc1_stream_encoder_dp_blank +ffffffff8208fcb0 T enc1_stream_encoder_dp_unblank +ffffffff8208fee0 T enc1_stream_encoder_set_avmute +ffffffff8208ff20 T enc1_reset_hdmi_stream_attribute +ffffffff8208fff0 T get_audio_clock_info +ffffffff820900e0 T enc1_se_enable_audio_clock +ffffffff82090140 T enc1_se_enable_dp_audio +ffffffff82090210 T enc1_se_audio_mute_control +ffffffff82090260 T enc1_se_dp_audio_setup +ffffffff82090270 t enc1_se_audio_setup +ffffffff820903d0 T enc1_se_dp_audio_enable +ffffffff82090620 T enc1_se_dp_audio_disable +ffffffff82090790 T enc1_se_hdmi_audio_setup +ffffffff82090c50 T enc1_se_hdmi_audio_disable +ffffffff82090ce0 T enc1_setup_stereo_sync +ffffffff82090d60 T enc1_dig_connect_to_otg +ffffffff82090da0 T enc1_dig_source_otg +ffffffff82090e10 T enc1_stream_encoder_dp_get_pixel_format +ffffffff82090f00 T dcn10_stream_encoder_construct +ffffffff82090f60 t enc1_stream_encoder_update_hdmi_info_packets +ffffffff82091310 t enc1_stream_encoder_stop_hdmi_info_packets +ffffffff82092000 T dccg2_update_dpp_dto +ffffffff82092160 T dccg2_get_dccg_ref_freq +ffffffff82092220 T dccg2_set_fifo_errdet_ovr_en +ffffffff82092260 T dccg2_otg_add_pixel +ffffffff82092300 T dccg2_otg_drop_pixel +ffffffff820923a0 T dccg2_init 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dsc_prepare_config +ffffffff82099860 T dsc_log_pps +ffffffff82099fe0 T dsc_override_rc_params +ffffffff8209a130 T dsc_init_reg_values +ffffffff8209a220 T dsc_dc_pixel_encoding_to_dsc_pixel_format +ffffffff8209a2d0 T dsc_dc_color_depth_to_dsc_bits_per_comp +ffffffff8209a310 T dsc_update_from_dsc_parameters +ffffffff8209a3c0 t dsc2_read_state +ffffffff8209a570 t dsc2_validate_stream +ffffffff8209a5d0 t dsc2_set_config +ffffffff8209b940 t dsc2_enable +ffffffff8209baf0 t dsc2_disable +ffffffff8209bc70 t dsc2_disconnect +ffffffff8209c000 T dwb2_config_dwb_cnv +ffffffff8209c200 T dwb2_disable +ffffffff8209c310 T dwb2_is_enabled +ffffffff8209c3b0 T dwb2_set_stereo +ffffffff8209c490 T dwb2_set_new_content +ffffffff8209c500 T dwb2_set_scaler +ffffffff8209c880 T dcn20_dwbc_construct +ffffffff8209c8d0 t dwb2_get_caps +ffffffff8209c9b0 t dwb2_enable +ffffffff8209cb10 t dwb2_update +ffffffff8209cc70 t dwb2_set_warmup +ffffffff8209d000 T dwb_program_horz_scalar +ffffffff8209d4c0 t wbscl_get_filter_coeffs_16p +ffffffff8209d990 t wbscl_set_scaler_filter +ffffffff8209dba0 T dwb_program_vert_scalar +ffffffff8209f000 T hubbub2_dcc_support_swizzle +ffffffff8209f0c0 T hubbub2_dcc_support_pixel_format +ffffffff8209f110 T hubbub2_get_dcc_compression_cap +ffffffff8209f350 T hubbub2_init_vm_ctx +ffffffff8209f4a0 T hubbub2_init_dchub_sys_ctx +ffffffff8209f6e0 T hubbub2_update_dchub +ffffffff8209f8d0 T hubbub2_wm_read_state +ffffffff8209fc00 T hubbub2_get_dchub_ref_freq +ffffffff8209fce0 T hubbub2_read_state +ffffffff8209feb0 T hubbub2_construct +ffffffff8209ff10 t hubbub2_program_watermarks +ffffffff820a1000 T hubp2_set_vm_system_aperture_settings +ffffffff820a11e0 T hubp2_program_deadline +ffffffff820a1980 T hubp2_vready_at_or_After_vsync +ffffffff820a1a20 T hubp2_setup_interdependent +ffffffff820a1e90 T hubp2_program_size +ffffffff820a2010 T hubp2_program_rotation +ffffffff820a2180 T hubp2_dcc_control +ffffffff820a2240 T hubp2_program_pixel_format +ffffffff820a2810 T hubp2_program_surface_config +ffffffff820a2a50 T hubp2_get_lines_per_chunk +ffffffff820a2b10 T hubp2_cursor_set_attributes +ffffffff820a2ed0 T hubp2_dmdata_set_attributes +ffffffff820a32b0 T hubp2_dmdata_load +ffffffff820a3340 T hubp2_dmdata_status_done +ffffffff820a33b0 T hubp2_program_surface_flip_and_addr +ffffffff820a3ca0 T hubp2_enable_triplebuffer +ffffffff820a3d70 T hubp2_is_triplebuffer_enabled +ffffffff820a3df0 T hubp2_set_flip_control_surface_gsl +ffffffff820a3e40 T hubp2_is_flip_pending +ffffffff820a3f50 T hubp2_set_blank +ffffffff820a3fb0 T hubp2_set_blank_regs +ffffffff820a40b0 T hubp2_cursor_set_position +ffffffff820a4520 T hubp2_clk_cntl +ffffffff820a4570 T hubp2_vtg_sel +ffffffff820a45b0 T hubp2_clear_underflow +ffffffff820a4600 T hubp2_read_state_common +ffffffff820a5250 T hubp2_read_state +ffffffff820a5520 T hubp2_construct +ffffffff820a5590 t hubp2_setup +ffffffff820a5a30 t hubp2_validate_dml_output +ffffffff820a7000 T dcn20_set_flip_control_gsl +ffffffff820a7050 T dcn20_enable_power_gating_plane +ffffffff820a74b0 T dcn20_dccg_init +ffffffff820a7530 T dcn20_disable_vga +ffffffff820a75f0 T dcn20_program_triple_buffer +ffffffff820a7640 T dcn20_init_blank +ffffffff820a7850 T dcn20_dsc_pg_control +ffffffff820a7c60 T dcn20_dpp_pg_control +ffffffff820a7f10 T dcn20_hubp_pg_control +ffffffff820a81c0 T dcn20_plane_atomic_disable +ffffffff820a8310 t dcn20_setup_gsl_group_as_lock +ffffffff820a8570 T dcn20_disable_plane +ffffffff820a8650 T dcn20_disable_pixel_data +ffffffff820a8670 T dcn20_blank_pixel_data +ffffffff820a8890 T dcn20_enable_stream_timing +ffffffff820a8e50 T dcn20_program_output_csc +ffffffff820a8f40 T dcn20_set_output_transfer_func +ffffffff820a90c0 T dcn20_set_blend_lut +ffffffff820a9130 T dcn20_set_shaper_3dlut +ffffffff820a91f0 T dcn20_set_input_transfer_func +ffffffff820a93b0 T dcn20_update_odm +ffffffff820a94a0 T dcn20_pipe_control_lock +ffffffff820a97c0 T dcn20_program_front_end_for_ctx +ffffffff820aa470 t dcn20_program_pipe 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mpc2_set_ocsc_default +ffffffff820b1830 T mpc20_power_on_ogam_lut +ffffffff820b18b0 T mpc2_set_output_gamma +ffffffff820b20b0 T mpc2_assert_idle_mpcc +ffffffff820b21c0 T mpc2_assert_mpcc_idle_before_connect +ffffffff820b2410 T dcn20_mpc_construct +ffffffff820b24d0 t mpc2_get_mpcc_for_dpp +ffffffff820b3000 T opp2_set_disp_pattern_generator +ffffffff820b3810 T opp2_dpg_set_blank_color +ffffffff820b3990 T opp2_program_dpg_dimensions +ffffffff820b3a20 T opp2_dpg_is_blanked +ffffffff820b3ae0 T opp2_program_left_edge_extra_pixel +ffffffff820b3b30 T dcn20_opp_construct +ffffffff820b4000 T optc2_enable_crtc +ffffffff820b4100 T optc2_set_gsl +ffffffff820b41f0 T optc2_set_gsl_source_select +ffffffff820b42b0 T optc2_set_dsc_config +ffffffff820b4380 T optc2_get_dsc_status +ffffffff820b43c0 T optc2_is_two_pixels_per_containter +ffffffff820b43d0 T optc2_set_odm_bypass +ffffffff820b4510 T optc2_set_odm_combine +ffffffff820b4700 T optc2_get_optc_source +ffffffff820b47d0 T optc2_triplebuffer_lock +ffffffff820b48f0 T optc2_triplebuffer_unlock +ffffffff820b49a0 T optc2_lock_doublebuffer_enable +ffffffff820b4b80 T optc2_lock_doublebuffer_disable +ffffffff820b4c60 T optc2_setup_manual_trigger +ffffffff820b4df0 T optc2_program_manual_trigger +ffffffff820b4e60 T optc2_configure_crc +ffffffff820b4ef0 T optc2_get_last_used_drr_vtotal +ffffffff820b4f30 T dcn20_timing_generator_init +ffffffff820b4fa0 t optc2_set_dwb_source +ffffffff820b5040 t optc2_align_vblanks +ffffffff820b6000 T dcn20_dpp_destroy +ffffffff820b6050 T dcn20_dpp_create +ffffffff820b6120 T dcn20_ipp_create +ffffffff820b61d0 T dcn20_opp_create +ffffffff820b6280 T dcn20_aux_engine_create +ffffffff820b6320 T dcn20_i2c_hw_create +ffffffff820b63b0 T dcn20_mpc_create +ffffffff820b6440 T dcn20_hubbub_create +ffffffff820b6510 T dcn20_timing_generator_create +ffffffff820b65a0 T dcn20_link_encoder_create +ffffffff820b66a0 T dcn20_stream_encoder_create +ffffffff820b6760 T dcn20_hwseq_create +ffffffff820b67d0 T dcn20_clock_source_destroy +ffffffff820b6820 T dcn20_dsc_create +ffffffff820b68e0 T dcn20_dsc_destroy +ffffffff820b6930 T dcn20_hubp_create +ffffffff820b6a00 T dcn20_build_mapped_resource +ffffffff820b6c20 T dcn20_acquire_dsc +ffffffff820b6d60 T dcn20_release_dsc +ffffffff820b6dd0 T dcn20_add_dsc_to_stream_resource +ffffffff820b6f40 T dcn20_add_stream_to_ctx +ffffffff820b6fd0 T dcn20_remove_stream_from_ctx +ffffffff820b70c0 T dcn20_split_stream_for_odm +ffffffff820b7570 T dcn20_split_stream_for_mpc +ffffffff820b76f0 T dcn20_calc_max_scaled_time +ffffffff820b7760 T dcn20_set_mcif_arb_params +ffffffff820b78d0 T dcn20_validate_dsc +ffffffff820b7a80 T dcn20_find_secondary_pipe +ffffffff820b7c60 T dcn20_merge_pipes_for_validate +ffffffff820b7ed0 T dcn20_validate_apply_pipe_split_flags +ffffffff820b8760 T dcn20_fast_validate_bw +ffffffff820b8cb0 T dcn20_validate_bandwidth +ffffffff820b8d30 T dcn20_acquire_free_pipe_for_layer +ffffffff820b8e50 T dcn20_get_dcc_compression_cap +ffffffff820b8e80 T dcn20_patch_unknown_plane_state +ffffffff820b8ee0 T dcn20_dwbc_create +ffffffff820b8ff0 T dcn20_mmhubbub_create +ffffffff820b9150 T dcn20_create_resource_pool +ffffffff820ba8f0 t dcn20_resource_destruct +ffffffff820bada0 t dcn20_destroy_resource_pool +ffffffff820bae00 t dcn20_panel_cntl_create +ffffffff820bae90 t read_dce_straps +ffffffff820baec0 t dcn20_create_audio +ffffffff820bb000 T enc2_set_dynamic_metadata +ffffffff820bb260 T enc2_stream_encoder_dp_unblank +ffffffff820bb5a0 T enc2_stream_encoder_dp_set_stream_attribute +ffffffff820bb600 T enc2_get_fifo_cal_average_level +ffffffff820bb660 T dcn20_stream_encoder_construct +ffffffff820bb6c0 t enc2_stream_encoder_update_hdmi_info_packets +ffffffff820bb790 t enc2_stream_encoder_stop_hdmi_info_packets +ffffffff820bbaa0 t enc2_stream_encoder_update_dp_info_packets_sdp_line_num +ffffffff820bbb60 t enc2_stream_encoder_update_dp_info_packets +ffffffff820bbc10 t enc2_read_state +ffffffff820bbd90 t enc2_dp_set_dsc_config +ffffffff820bbe60 t enc2_dp_set_dsc_pps_info_packet +ffffffff820bc330 t enc2_dp_set_odm_combine +ffffffff820bc370 t enc2_update_hdmi_info_packet +ffffffff820bd000 T dcn20_vmid_setup +ffffffff820be000 T dccg201_create +ffffffff820be0b0 t dccg201_update_dpp_dto +ffffffff820bf000 T dpp201_construct +ffffffff820bf080 t dpp201_get_optimal_number_of_taps +ffffffff820bf440 t dpp201_cnv_setup +ffffffff820c0000 T hubbub201_construct +ffffffff820c0060 t hubbub201_program_watermarks +ffffffff820c1000 T dcn201_hubp_construct +ffffffff820c1070 t hubp201_setup +ffffffff820c1350 t hubp201_program_surface_config +ffffffff820c2000 T dcn201_update_plane_addr +ffffffff820c22a0 T dcn201_init_blank +ffffffff820c23e0 T dcn201_init_hw +ffffffff820c2bb0 T dcn201_plane_atomic_disconnect +ffffffff820c2d20 T dcn201_update_mpcc +ffffffff820c2fb0 T dcn201_pipe_control_lock +ffffffff820c30b0 T dcn201_set_cursor_attribute +ffffffff820c3140 T dcn201_set_dmdata_attributes +ffffffff820c3250 T dcn201_unblank_stream +ffffffff820c4000 T dcn201_hw_sequencer_construct +ffffffff820c5000 T dcn201_link_encoder_construct +ffffffff820c5190 t dcn201_link_encoder_is_in_alt_mode +ffffffff820c5200 t dcn201_link_encoder_get_max_link_cap +ffffffff820c6000 T dcn201_mpc_construct +ffffffff820c60c0 t mpc201_set_out_rate_control +ffffffff820c7000 T dcn201_opp_construct +ffffffff820c8000 T optc201_is_two_pixels_per_containter +ffffffff820c8010 T dcn201_timing_generator_init +ffffffff820c8080 t optc201_validate_timing +ffffffff820c8180 t optc201_triplebuffer_unlock +ffffffff820c8230 t optc201_triplebuffer_lock +ffffffff820c8350 t optc201_get_optc_source +ffffffff820c9000 T dcn201_create_resource_pool +ffffffff820c9a30 t dcn201_resource_destruct +ffffffff820c9d30 t dcn201_destroy_resource_pool +ffffffff820c9d90 t dcn201_link_init +ffffffff820c9de0 t dcn201_link_encoder_create +ffffffff820c9e90 t dcn201_acquire_free_pipe_for_layer +ffffffff820c9fa0 t dcn201_populate_dml_writeback_from_context +ffffffff820ca000 t read_dce_straps +ffffffff820ca030 t dcn201_create_audio +ffffffff820ca060 t dcn201_stream_encoder_create +ffffffff820ca100 t dcn201_hwseq_create +ffffffff820ca170 t dcn201_get_dcc_compression_cap +ffffffff820cb000 T dccg21_create +ffffffff820cb0b0 t dccg21_update_dpp_dto +ffffffff820cc000 T dcn21_dchvm_init +ffffffff820cc200 T hubbub21_init_dchub +ffffffff820cc3d0 T hubbub21_program_urgent_watermarks +ffffffff820ccbf0 T hubbub21_program_stutter_watermarks +ffffffff820cd0e0 T hubbub21_program_pstate_watermarks +ffffffff820cd380 T hubbub21_program_watermarks +ffffffff820cd4e0 T hubbub21_wm_read_state +ffffffff820cd780 T hubbub21_construct +ffffffff820cd7e0 t hubbub21_apply_DEDCN21_147_wa +ffffffff820ce000 T apply_DEDCN21_142_wa_for_hostvm_deadline +ffffffff820ce2e0 T hubp21_program_deadline +ffffffff820ce310 T hubp21_program_requestor +ffffffff820ce6b0 T hubp21_construct +ffffffff820ce720 t hubp21_setup +ffffffff820ce780 t hubp21_set_viewport +ffffffff820cea80 t hubp21_program_surface_flip_and_addr +ffffffff820cf370 t hubp21_set_vm_system_aperture_settings +ffffffff820cf4a0 t hubp21_init +ffffffff820cf4d0 t hubp21_validate_dml_output +ffffffff820d1000 T dcn21_init_sys_ctx +ffffffff820d1110 T dcn21_s0i3_golden_init_wa +ffffffff820d1170 T dcn21_exit_optimized_pwr_state +ffffffff820d1190 T dcn21_optimize_pwr_state +ffffffff820d11c0 T dcn21_PLAT_58856_wa +ffffffff820d1260 T dcn21_set_abm_immediate_disable +ffffffff820d13a0 T dcn21_set_pipe +ffffffff820d14d0 T dcn21_set_backlight_level +ffffffff820d16d0 T dcn21_is_abm_supported +ffffffff820d2000 T dcn21_hw_sequencer_construct +ffffffff820d3000 T dcn21_link_encoder_enable_dp_output +ffffffff820d3140 t dcn21_link_encoder_acquire_phy +ffffffff820d3320 T dcn21_link_encoder_construct +ffffffff820d3500 t dcn21_link_encoder_enable_dp_mst_output +ffffffff820d3570 t dcn21_link_encoder_disable_output +ffffffff820d4000 T dcn21_fast_validate_bw +ffffffff820d46a0 T dcn21_create_resource_pool +ffffffff820d59d0 t dcn21_resource_destruct +ffffffff820d5e70 t dcn21_destroy_resource_pool +ffffffff820d5ed0 t dcn21_panel_cntl_create +ffffffff820d5f60 t dcn21_link_encoder_create +ffffffff820d6060 t dcn21_validate_bandwidth +ffffffff820d60e0 t dcn21_patch_unknown_plane_state +ffffffff820d6130 t dcn21_get_panel_config_defaults +ffffffff820d6170 t read_dce_straps +ffffffff820d61a0 t dcn21_create_audio +ffffffff820d61d0 t dcn21_stream_encoder_create +ffffffff820d6270 t dcn21_hwseq_create +ffffffff820d7000 T afmt3_setup_hdmi_audio +ffffffff820d71d0 T afmt3_se_audio_setup +ffffffff820d7370 T afmt3_audio_mute_control +ffffffff820d73e0 T afmt3_audio_info_immediate_update +ffffffff820d7420 T afmt3_setup_dp_audio +ffffffff820d7510 T afmt3_construct +ffffffff820d8000 T cm_helper_program_gamcor_xfer_func +ffffffff820d83c0 T cm3_helper_translate_curve_to_hw_format +ffffffff820d8fd0 T cm3_helper_convert_to_custom_float +ffffffff820d9420 T cm3_helper_translate_curve_to_degamma_hw_format +ffffffff820d9c40 T is_rgb_equal +ffffffff820da000 T dccg3_create +ffffffff820da0b0 T dccg30_create +ffffffff820db000 T dcn30_link_encoder_validate_output_with_stream +ffffffff820db010 T dcn30_link_encoder_construct +ffffffff820db1f0 T enc3_hw_init +ffffffff820dc000 T enc3_stream_encoder_update_hdmi_info_packets +ffffffff820dc100 t enc3_update_hdmi_info_packet +ffffffff820dc4f0 T enc3_stream_encoder_stop_hdmi_info_packets +ffffffff820dcad0 T enc3_dp_set_dsc_pps_info_packet +ffffffff820dcdf0 T enc3_stream_encoder_update_dp_info_packets_sdp_line_num +ffffffff820dceb0 T enc3_stream_encoder_update_dp_info_packets +ffffffff820dd170 T enc3_audio_mute_control +ffffffff820dd1e0 T enc3_se_dp_audio_setup +ffffffff820dd260 T enc3_se_dp_audio_enable +ffffffff820dd350 T enc3_se_hdmi_audio_setup +ffffffff820dd660 T dcn30_dio_stream_encoder_construct +ffffffff820dd6d0 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff820ddcd0 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff820dded0 t enc3_read_state +ffffffff820de060 t enc3_dp_set_dsc_config +ffffffff820de130 t enc3_dp_set_odm_combine +ffffffff820df000 T dpp30_read_state +ffffffff820df050 T dpp3_program_post_csc +ffffffff820df240 T dpp3_set_pre_degam +ffffffff820df2f0 T dpp3_cnv_setup +ffffffff820dfbc0 T dpp3_set_cursor_attributes +ffffffff820dfd30 T dpp3_get_optimal_number_of_taps +ffffffff820e0750 T dpp3_construct +ffffffff820e07b0 t dpp3_deferred_update +ffffffff820e0b90 t dpp3_program_blnd_lut +ffffffff820e15e0 t dpp3_program_shaper +ffffffff820e3660 t dpp3_program_3dlut +ffffffff820e3e10 t dpp3_set3dlut_ram12 +ffffffff820e4000 T dpp3_program_cm_dealpha +ffffffff820e40a0 T dpp3_program_cm_bias +ffffffff820e4190 T dpp3_program_gamcor_lut +ffffffff820e4bb0 t dpp3_power_on_gamcor_lut +ffffffff820e4ce0 T dpp3_set_hdr_multiplier +ffffffff820e4d30 T dpp3_cm_set_gamut_remap +ffffffff820e5000 T dwb3_config_fc +ffffffff820e51b0 T dwb3_set_stereo +ffffffff820e5270 T dwb3_enable +ffffffff820e53a0 T dwb3_set_denorm +ffffffff820e54c0 T dwb3_disable +ffffffff820e5570 T dwb3_update +ffffffff820e56a0 T dwb3_is_enabled +ffffffff820e5740 T dwb3_set_new_content +ffffffff820e5780 T dcn30_dwbc_construct +ffffffff820e57d0 T dwb3_set_host_read_rate_control +ffffffff820e5840 t dwb3_get_caps +ffffffff820e6000 T dwb3_ogam_set_input_transfer_func +ffffffff820e69f0 T dwb3_set_gamut_remap +ffffffff820e6ca0 T dwb3_program_hdr_mult +ffffffff820e7000 T hubbub3_init_dchub_sys_ctx +ffffffff820e71c0 T hubbub3_program_watermarks +ffffffff820e72c0 T hubbub3_dcc_support_swizzle +ffffffff820e7380 T hubbub3_get_dcc_compression_cap +ffffffff820e7560 T hubbub3_force_wm_propagate_to_pipes +ffffffff820e7610 T hubbub3_force_pstate_change_control +ffffffff820e7690 T hubbub3_init_watermarks +ffffffff820e79d0 T hubbub3_construct +ffffffff820e8000 T hubp3_set_vm_system_aperture_settings +ffffffff820e8130 T hubp3_program_surface_flip_and_addr +ffffffff820e8b20 T hubp3_dcc_control +ffffffff820e8be0 T hubp3_dcc_control_sienna_cichlid +ffffffff820e8d00 T hubp3_dmdata_set_attributes +ffffffff820e8f00 T hubp3_program_surface_config +ffffffff820e91f0 T hubp3_read_state +ffffffff820e94c0 T hubp3_setup +ffffffff820e9550 T hubp3_init +ffffffff820e9580 T hubp3_construct +ffffffff820ea000 T dcn30_set_blend_lut +ffffffff820ea070 T dcn30_set_input_transfer_func +ffffffff820ea1d0 T dcn30_set_output_transfer_func +ffffffff820ea500 T dcn30_update_writeback +ffffffff820ea590 t dcn30_set_writeback +ffffffff820ea740 T dcn30_mmhubbub_warmup +ffffffff820ea990 T dcn30_enable_writeback +ffffffff820eaa40 T dcn30_disable_writeback +ffffffff820eab20 T dcn30_program_all_writeback_pipes_in_tree +ffffffff820eae20 T dcn30_init_hw +ffffffff820eb550 T dcn30_set_avmute +ffffffff820eb5b0 T dcn30_update_info_frame +ffffffff820eb6a0 T dcn30_program_dmdata_engine +ffffffff820eb740 T dcn30_apply_idle_power_optimizations +ffffffff820ebc60 T dcn30_does_plane_fit_in_mall +ffffffff820ebd10 T dcn30_hardware_release +ffffffff820ebe00 T dcn30_set_disp_pattern_generator +ffffffff820ebe70 T dcn30_prepare_bandwidth +ffffffff820ebf60 T dcn30_set_static_screen_control +ffffffff820ec000 T dcn30_hw_sequencer_construct +ffffffff820ed000 T dcn30_mmhubbub_construct +ffffffff820ed050 t mmhubbub3_warmup_mcif +ffffffff820ed260 t mmhubbub3_config_mcif_buf +ffffffff820ed710 t mmhubbub3_config_mcif_arb +ffffffff820ee000 T mpc3_is_dwb_idle +ffffffff820ee070 T mpc3_set_dwb_mux +ffffffff820ee0f0 T mpc3_disable_dwb_mux +ffffffff820ee170 T mpc3_set_out_rate_control +ffffffff820ee280 T mpc3_get_ogam_current +ffffffff820ee320 T mpc3_power_on_ogam_lut +ffffffff820ee3f0 T mpc3_set_output_gamma +ffffffff820ef030 T mpc3_set_denorm +ffffffff820ef0a0 T mpc3_set_denorm_clamp +ffffffff820ef1f0 T mpc3_program_shaper +ffffffff820f13b0 t mpc3_power_on_shaper_3dlut +ffffffff820f1730 T mpc3_init_mpcc +ffffffff820f17b0 T mpc3_set_gamut_remap +ffffffff820f1a20 T mpc3_program_3dlut +ffffffff820f2190 t mpc3_set3dlut_ram12 +ffffffff820f2370 T mpc3_set_output_csc +ffffffff820f24e0 T mpc3_set_ocsc_default +ffffffff820f2650 T mpc3_set_rmu_mux +ffffffff820f26f0 T mpc3_get_rmu_mux_status +ffffffff820f27a0 T mpcc3_acquire_rmu +ffffffff820f2900 T dcn30_mpc_construct +ffffffff820f29d0 t mpcc3_release_rmu +ffffffff820f2b40 t mpc3_set_mpc_mem_lp_mode +ffffffff820f3000 T optc3_triplebuffer_lock +ffffffff820f3120 T optc3_lock_doublebuffer_enable +ffffffff820f33b0 T optc3_lock_doublebuffer_disable +ffffffff820f34d0 T optc3_lock +ffffffff820f35a0 T optc3_set_out_mux +ffffffff820f35e0 T optc3_program_blank_color +ffffffff820f3710 T optc3_set_drr_trigger_window +ffffffff820f37a0 T optc3_set_vtotal_change_limit +ffffffff820f3810 T optc3_set_dsc_config +ffffffff820f3860 T optc3_set_odm_bypass +ffffffff820f39e0 T optc3_set_odm_combine +ffffffff820f3d30 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff820f3db0 T optc3_set_vtotal_min_max +ffffffff820f3df0 T optc3_tg_init +ffffffff820f3e50 T dcn30_timing_generator_init +ffffffff820f4000 T dcn30_add_stream_to_ctx +ffffffff820f4020 T dcn30_populate_dml_pipes_from_context +ffffffff820f4100 T dcn30_populate_dml_writeback_from_context +ffffffff820f4160 T dcn30_calc_max_scaled_time +ffffffff820f41c0 T dcn30_set_mcif_arb_params +ffffffff820f4330 T dcn30_acquire_post_bldn_3dlut +ffffffff820f44c0 T dcn30_release_post_bldn_3dlut +ffffffff820f4570 T dcn30_internal_validate_bw +ffffffff820f52e0 t dcn30_split_stream_for_mpc_or_odm +ffffffff820f5600 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff820f56e0 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff820f5780 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff820f5820 T dcn30_update_soc_for_wm_a +ffffffff820f5870 T dcn30_calculate_wm_and_dlg +ffffffff820f58e0 T dcn30_validate_bandwidth +ffffffff820f5d10 T dcn30_update_bw_bounding_box +ffffffff820f6370 T dcn30_create_resource_pool +ffffffff820f7920 t dcn30_resource_destruct +ffffffff820f7ea0 t dcn30_destroy_resource_pool +ffffffff820f7f00 t dcn30_panel_cntl_create +ffffffff820f7f90 t dcn30_link_encoder_create +ffffffff820f8040 t dcn30_get_panel_config_defaults +ffffffff820f80c0 t read_dce_straps +ffffffff820f80f0 t dcn30_create_audio +ffffffff820f8120 t dcn30_stream_encoder_create +ffffffff820f82a0 t dcn30_hwseq_create +ffffffff820f9000 T vpg3_update_generic_info_packet +ffffffff820f99a0 T vpg3_construct +ffffffff820fa000 T dccg301_create +ffffffff820fb000 T dcn301_link_encoder_construct +ffffffff820fc000 T hubbub301_construct +ffffffff820fd000 T dcn301_hw_sequencer_construct +ffffffff820fe000 T optc301_set_drr +ffffffff820fe230 T optc301_setup_manual_trigger +ffffffff820fe350 T dcn301_timing_generator_init +ffffffff820ff000 T dcn301_panel_cntl_construct +ffffffff820ff050 t dcn301_panel_cntl_destroy +ffffffff820ff0a0 t dcn301_panel_cntl_hw_init +ffffffff820ff2b0 t dcn301_is_panel_backlight_on +ffffffff820ff310 t dcn301_is_panel_powered_on +ffffffff820ff3c0 t dcn301_store_backlight_level +ffffffff820ff460 t dcn301_get_16_bit_backlight_from_pwm +ffffffff82100000 T dcn301_create_resource_pool +ffffffff82101590 t dcn301_destruct +ffffffff82101ad0 t dcn301_destroy_resource_pool +ffffffff82101b30 t dcn301_panel_cntl_create +ffffffff82101bc0 t dcn301_link_encoder_create +ffffffff82101c70 t dcn301_calculate_wm_and_dlg +ffffffff82101ce0 t read_dce_straps +ffffffff82101d10 t dcn301_create_audio +ffffffff82101d40 t dcn301_stream_encoder_create +ffffffff82101ec0 t dcn301_hwseq_create +ffffffff82102000 T dcn302_dpp_pg_control +ffffffff821022a0 T dcn302_hubp_pg_control +ffffffff82102550 T dcn302_dsc_pg_control +ffffffff82103000 T dcn302_hw_sequencer_construct +ffffffff82104000 T dcn302_update_bw_bounding_box +ffffffff82104050 T dcn302_create_resource_pool +ffffffff821054a0 t dcn302_resource_destruct +ffffffff821059e0 t dcn302_destroy_resource_pool +ffffffff82105a30 t dcn302_panel_cntl_create +ffffffff82105ac0 t dcn302_link_encoder_create +ffffffff82105b70 t dcn302_get_panel_config_defaults +ffffffff82105bf0 t read_dce_straps +ffffffff82105c20 t dcn302_create_audio +ffffffff82105c50 t dcn302_stream_encoder_create +ffffffff82105dd0 t dcn302_hwseq_create +ffffffff82106000 T dcn303_dpp_pg_control +ffffffff82106030 T dcn303_hubp_pg_control +ffffffff82106060 T dcn303_dsc_pg_control +ffffffff82106090 T dcn303_enable_power_gating_plane +ffffffff82107000 T dcn303_hw_sequencer_construct +ffffffff82108000 T dcn303_update_bw_bounding_box +ffffffff82108050 T dcn303_create_resource_pool +ffffffff821092a0 t dcn303_resource_destruct +ffffffff821097e0 t dcn303_destroy_resource_pool +ffffffff82109830 t dcn303_panel_cntl_create +ffffffff821098c0 t dcn303_link_encoder_create +ffffffff82109970 t dcn303_get_panel_config_defaults +ffffffff821099f0 t read_dce_straps +ffffffff82109a20 t dcn303_create_audio +ffffffff82109a50 t dcn303_stream_encoder_create +ffffffff82109bd0 t dcn303_hwseq_create +ffffffff8210a000 T afmt31_powerdown +ffffffff8210a090 T afmt31_poweron +ffffffff8210a120 T afmt31_construct +ffffffff8210b000 T apg31_construct +ffffffff8210b050 t apg31_se_audio_setup +ffffffff8210b160 t apg31_enable +ffffffff8210b270 t apg31_disable +ffffffff8210c000 T dccg31_update_dpp_dto +ffffffff8210c160 T dccg31_set_dpstreamclk +ffffffff8210c2f0 t dccg31_disable_dpstreamclk +ffffffff8210c440 T dccg31_enable_symclk32_se +ffffffff8210c740 T dccg31_disable_symclk32_se +ffffffff8210ca10 T dccg31_enable_symclk32_le +ffffffff8210cb20 T dccg31_disable_symclk32_le +ffffffff8210cc10 T dccg31_set_symclk32_le_root_clock_gating +ffffffff8210cd20 T dccg31_disable_dscclk +ffffffff8210cf70 T dccg31_enable_dscclk +ffffffff8210d1e0 T dccg31_set_physymclk +ffffffff8210d6f0 T dccg31_set_dtbclk_dto +ffffffff8210d9a0 T dccg31_set_audio_dtbclk_dto +ffffffff8210dab0 T dccg31_get_dccg_ref_freq +ffffffff8210dae0 T dccg31_set_dispclk_change_mode +ffffffff8210db30 T dccg31_init +ffffffff8210e110 T dccg31_otg_add_pixel +ffffffff8210e150 T dccg31_otg_drop_pixel +ffffffff8210e190 T dccg31_create +ffffffff8210f000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff8210f390 T dcn31_link_encoder_construct +ffffffff8210f560 T dcn31_link_encoder_construct_minimal +ffffffff8210f5e0 T dcn31_link_encoder_enable_dp_output +ffffffff8210f820 T dcn31_link_encoder_enable_dp_mst_output +ffffffff8210fa60 T dcn31_link_encoder_disable_output +ffffffff8210fcd0 T dcn31_link_encoder_is_in_alt_mode +ffffffff8210fe20 T dcn31_link_encoder_get_max_link_cap +ffffffff8210ffa0 t enc31_hw_init +ffffffff82110000 T dcn31_hpo_dp_link_enc_enable +ffffffff82110160 T dcn31_hpo_dp_link_enc_disable +ffffffff821101d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff82110b30 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff82110db0 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff82111050 T dcn31_hpo_dp_link_enc_read_state +ffffffff821112f0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff821113f0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff82111530 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff82111620 T hpo_dp_link_encoder31_construct +ffffffff82111680 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff82112000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff82112070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff821121b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff82112460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff82112560 t dcn31_hpo_dp_stream_enc_disable +ffffffff821125d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff82112e80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num +ffffffff82112f40 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff82113160 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff821132f0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff82113590 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff82113690 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff82113740 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff82113810 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff821139c0 t dcn31_hpo_dp_stream_enc_read_state +ffffffff82113b50 t dcn31_set_hblank_min_symbol_width +ffffffff82114000 T hubbub31_init_dchub_sys_ctx +ffffffff821141e0 T hubbub31_init +ffffffff82114280 T hubbub31_construct +ffffffff82114320 t hubbub31_get_dcc_compression_cap +ffffffff82114500 t hubbub31_get_dchub_ref_freq +ffffffff821145e0 t hubbub31_program_watermarks +ffffffff82115f00 t hubbub31_verify_allow_pstate_change_high +ffffffff821160c0 t dcn31_program_det_size +ffffffff821162a0 t dcn31_program_compbuf_size +ffffffff82116520 t dcn31_init_crb +ffffffff82117000 T hubp31_set_unbounded_requesting +ffffffff82117090 T hubp31_soft_reset +ffffffff821170e0 T hubp31_construct +ffffffff82117150 t hubp31_program_extended_blank +ffffffff82118000 T dcn31_init_hw +ffffffff82118850 T dcn31_dsc_pg_control +ffffffff82118ba0 T dcn31_enable_power_gating_plane +ffffffff82118e00 T dcn31_update_info_frame +ffffffff82118f30 T dcn31_z10_save_init +ffffffff82118fc0 T dcn31_z10_restore +ffffffff82119070 T dcn31_hubp_pg_control +ffffffff82119390 T dcn31_init_sys_ctx +ffffffff82119440 T dcn31_reset_hw_ctx_wrap +ffffffff82119790 T dcn31_setup_hpo_hw_control +ffffffff8211a000 T dcn31_hw_sequencer_construct +ffffffff8211b000 T optc31_immediate_disable_crtc +ffffffff8211b100 T optc31_set_drr +ffffffff8211b310 T optc3_init_odm +ffffffff8211b480 T dcn31_timing_generator_init +ffffffff8211b4f0 t optc31_enable_crtc +ffffffff8211b5f0 t optc31_disable_crtc +ffffffff8211b6d0 t optc31_set_odm_combine +ffffffff8211c000 T dcn31_panel_cntl_construct +ffffffff8211c040 t dcn31_panel_cntl_destroy +ffffffff8211c090 t dcn31_panel_cntl_hw_init +ffffffff8211c190 t dcn31_is_panel_backlight_on +ffffffff8211c230 t dcn31_is_panel_powered_on +ffffffff8211c2e0 t dcn31_store_backlight_level +ffffffff8211c3b0 t dcn31_get_16_bit_backlight_from_pwm +ffffffff8211d000 T dcn31x_populate_dml_pipes_from_context +ffffffff8211d180 T dcn31_populate_dml_pipes_from_context +ffffffff8211d5c0 T dcn31_calculate_wm_and_dlg +ffffffff8211d630 T dcn31_populate_dml_writeback_from_context +ffffffff8211d690 T dcn31_set_mcif_arb_params +ffffffff8211d6f0 T dcn31_validate_bandwidth +ffffffff8211dae0 T dcn31_create_resource_pool +ffffffff8211ee80 t dcn31_resource_destruct +ffffffff8211f4f0 t dcn31_destroy_resource_pool +ffffffff8211f550 t dcn31_panel_cntl_create +ffffffff8211f5c0 t dcn31_link_encoder_create +ffffffff8211f670 t dcn31_link_enc_create_minimal +ffffffff8211f710 t dcn31_get_panel_config_defaults +ffffffff8211f750 t read_dce_straps +ffffffff8211f780 t dcn31_create_audio +ffffffff8211f7b0 t dcn31_stream_encoder_create +ffffffff8211f930 t dcn31_hpo_dp_stream_encoder_create +ffffffff8211faf0 t dcn31_hpo_dp_link_encoder_create +ffffffff8211fb80 t dcn31_hwseq_create +ffffffff82120000 T vpg31_powerdown +ffffffff82120090 T vpg31_poweron +ffffffff82120120 T vpg31_construct +ffffffff82121000 T dccg314_create +ffffffff821210b0 t dccg314_init +ffffffff82121210 t dccg314_set_dpstreamclk +ffffffff821215d0 t dccg314_set_dtbclk_dto +ffffffff821217c0 t dccg314_set_pixel_rate_div +ffffffff82121b30 t dccg314_set_valid_pixel_rate +ffffffff82121ba0 t dccg314_trigger_dio_fifo_resync +ffffffff82121c40 t dccg314_dpp_root_clock_control +ffffffff82122000 T dcn314_dio_stream_encoder_construct +ffffffff82122070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff82122670 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff82122880 t enc314_stream_encoder_dp_blank +ffffffff82122900 t enc314_stream_encoder_dp_unblank +ffffffff82122c80 t enc314_read_state +ffffffff82122de0 t enc314_dp_set_dsc_config +ffffffff82122e30 t enc314_dp_set_odm_combine +ffffffff82122e70 t enc314_set_dig_input_mode +ffffffff82122ec0 t enc314_enable_fifo +ffffffff82122f60 t enc314_disable_fifo +ffffffff82122fb0 t enc314_reset_fifo +ffffffff82124000 T dcn314_update_odm +ffffffff82124600 T dcn314_dsc_pg_control +ffffffff821249d0 T dcn314_enable_power_gating_plane +ffffffff82124c60 T dcn314_calculate_dccg_k1_k2_values +ffffffff82124e10 T dcn314_set_pixels_per_cycle +ffffffff82124f00 T dcn314_resync_fifo_dccg_dio +ffffffff821250a0 T dcn314_dpp_root_clock_control +ffffffff82125100 T dcn314_disable_link_output +ffffffff82126000 T dcn314_hw_sequencer_construct +ffffffff82127000 T dcn314_timing_generator_init +ffffffff82127070 t optc314_enable_crtc +ffffffff82127170 t optc314_disable_crtc +ffffffff82127250 t optc314_phantom_crtc_post_enable +ffffffff82127310 t optc314_set_odm_bypass +ffffffff82127480 t optc314_set_odm_combine +ffffffff82127770 t optc314_set_h_timing_div_manual_mode +ffffffff82128000 T dcn314_validate_bandwidth +ffffffff82128490 T dcn314_create_resource_pool +ffffffff821297b0 t dcn314_resource_destruct +ffffffff82129e20 t dcn314_get_preferred_eng_id_dpia +ffffffff82129e50 t dcn314_destroy_resource_pool +ffffffff82129eb0 t dcn31_panel_cntl_create +ffffffff82129f20 t dcn31_link_encoder_create +ffffffff82129fd0 t dcn31_link_enc_create_minimal +ffffffff8212a070 t dcn314_populate_dml_pipes_from_context +ffffffff8212a100 t dcn314_update_bw_bounding_box +ffffffff8212a150 t dcn314_get_panel_config_defaults +ffffffff8212a190 t read_dce_straps +ffffffff8212a1c0 t dcn31_create_audio +ffffffff8212a1f0 t dcn314_stream_encoder_create +ffffffff8212a370 t dcn31_hpo_dp_stream_encoder_create +ffffffff8212a530 t dcn31_hpo_dp_link_encoder_create +ffffffff8212a5c0 t dcn314_hwseq_create +ffffffff8212b000 T dcn315_create_resource_pool +ffffffff8212c280 t dcn315_resource_destruct +ffffffff8212c8e0 t dcn315_destroy_resource_pool +ffffffff8212c940 t dcn31_panel_cntl_create +ffffffff8212c9b0 t dcn31_link_encoder_create +ffffffff8212ca60 t dcn31_link_enc_create_minimal +ffffffff8212cb00 t dcn315_populate_dml_pipes_from_context +ffffffff8212d200 t dcn315_get_panel_config_defaults +ffffffff8212d240 t read_dce_straps +ffffffff8212d270 t dcn31_create_audio +ffffffff8212d2a0 t dcn315_stream_encoder_create +ffffffff8212d420 t dcn31_hpo_dp_stream_encoder_create +ffffffff8212d5e0 t dcn31_hpo_dp_link_encoder_create +ffffffff8212d670 t dcn31_hwseq_create +ffffffff8212e000 T dcn316_create_resource_pool +ffffffff8212f290 t dcn316_resource_destruct +ffffffff8212f8f0 t dcn316_destroy_resource_pool +ffffffff8212f950 t dcn31_panel_cntl_create +ffffffff8212f9c0 t dcn31_link_encoder_create +ffffffff8212fa70 t dcn31_link_enc_create_minimal +ffffffff8212fb10 t dcn316_populate_dml_pipes_from_context +ffffffff8212fe40 t dcn316_get_panel_config_defaults +ffffffff8212fe80 t read_dce_straps +ffffffff8212feb0 t dcn31_create_audio +ffffffff8212fee0 t dcn316_stream_encoder_create +ffffffff82130060 t dcn31_hpo_dp_stream_encoder_create +ffffffff82130220 t dcn31_hpo_dp_link_encoder_create +ffffffff821302b0 t dcn31_hwseq_create +ffffffff82131000 T dccg32_create +ffffffff821310b0 t dccg32_get_dccg_ref_freq +ffffffff821310e0 t dccg32_otg_add_pixel +ffffffff82131120 t dccg32_otg_drop_pixel +ffffffff82131160 t dccg32_set_dpstreamclk +ffffffff821314a0 t dccg32_set_dtbclk_dto +ffffffff821316a0 t dccg32_set_pixel_rate_div +ffffffff82131a10 t dccg32_set_valid_pixel_rate +ffffffff82131a80 t dccg32_trigger_dio_fifo_resync +ffffffff82132000 T enc32_hw_init +ffffffff82132090 T dcn32_link_encoder_enable_dp_output +ffffffff821320e0 T dcn32_link_encoder_construct +ffffffff821322d0 t dcn32_link_encoder_is_in_alt_mode +ffffffff82132350 t dcn32_link_encoder_get_max_link_cap +ffffffff82133000 T enc32_stream_encoder_dp_unblank +ffffffff82133500 T enc32_enable_fifo +ffffffff821335a0 t enc32_reset_fifo +ffffffff821336a0 T dcn32_dio_stream_encoder_construct +ffffffff82133710 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff82133c90 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff82133e10 t enc32_read_state +ffffffff82133f70 t enc32_dp_set_dsc_config +ffffffff82133fc0 t enc32_dp_set_odm_combine +ffffffff82134000 t enc32_set_dig_input_mode +ffffffff82135000 T dpp32_construct +ffffffff82135060 t dscl32_calc_lb_num_partitions +ffffffff82136000 T hpo_dp_link_encoder32_construct +ffffffff82136060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff82137000 T hubbub32_set_request_limit +ffffffff82137130 T dcn32_program_det_size +ffffffff821372d0 T hubbub32_program_urgent_watermarks +ffffffff82137a40 T hubbub32_program_stutter_watermarks +ffffffff82137e90 T hubbub32_program_pstate_watermarks +ffffffff82138320 T hubbub32_program_usr_watermarks +ffffffff82138580 T hubbub32_force_usr_retraining_allow +ffffffff82138600 T hubbub32_force_wm_propagate_to_pipes +ffffffff821386a0 T hubbub32_init +ffffffff821387e0 T hubbub32_construct +ffffffff82138860 t hubbub32_wm_read_state +ffffffff82138c80 t hubbub32_program_watermarks +ffffffff82138d90 t hubbub32_init_watermarks +ffffffff821391d0 t dcn32_program_compbuf_size +ffffffff82139460 t dcn32_init_crb +ffffffff8213a000 T hubp32_update_force_pstate_disallow +ffffffff8213a090 T hubp32_update_force_cursor_pstate_disallow +ffffffff8213a120 T hubp32_update_mall_sel +ffffffff8213a1b0 T hubp32_prepare_subvp_buffering +ffffffff8213a250 T hubp32_phantom_hubp_post_enable +ffffffff8213a360 T hubp32_cursor_set_attributes +ffffffff8213a620 T hubp32_init +ffffffff8213a650 T hubp32_construct +ffffffff8213b000 T dcn32_dsc_pg_control +ffffffff8213b320 T dcn32_enable_power_gating_plane +ffffffff8213b590 T dcn32_hubp_pg_control +ffffffff8213b800 T dcn32_apply_idle_power_optimizations +ffffffff8213baf0 T dcn32_commit_subvp_config +ffffffff8213bba0 T dcn32_subvp_pipe_control_lock +ffffffff8213bd70 T dcn32_subvp_pipe_control_lock_fast +ffffffff8213bdf0 T dcn32_set_mpc_shaper_3dlut +ffffffff8213bf10 T dcn32_set_mcm_luts +ffffffff8213c0a0 T dcn32_set_input_transfer_func +ffffffff8213c1e0 T dcn32_set_output_transfer_func +ffffffff8213c420 T dcn32_update_force_pstate +ffffffff8213c640 T dcn32_update_mall_sel +ffffffff8213c830 T dcn32_program_mall_pipe_config +ffffffff8213c920 T dcn32_init_hw +ffffffff8213d1e0 T dcn32_update_odm +ffffffff8213d7e0 T dcn32_calculate_dccg_k1_k2_values +ffffffff8213da10 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff8213dab0 T dcn32_set_pixels_per_cycle +ffffffff8213dbf0 T dcn32_resync_fifo_dccg_dio +ffffffff8213dd90 T dcn32_unblank_stream +ffffffff8213dfa0 T dcn32_disable_link_output +ffffffff8213e310 T dcn32_update_phantom_vp_position +ffffffff8213e420 T dcn32_apply_update_flags_for_phantom +ffffffff8213e4a0 T dcn32_dsc_pg_status +ffffffff8213e580 T dcn32_update_dsc_pg +ffffffff8213e680 T dcn32_enable_phantom_streams +ffffffff8213e7c0 T dcn32_init_blank +ffffffff8213ea00 T dcn32_blank_phantom +ffffffff8213eb80 T dcn32_is_pipe_topology_transition_seamless +ffffffff8213f000 T dcn32_hw_sequencer_init_functions +ffffffff82140000 T dcn32_mmhubbub_construct +ffffffff82140050 t mmhubbub32_warmup_mcif +ffffffff82140260 t mmhubbub32_config_mcif_buf +ffffffff82140710 t mmhubbub32_config_mcif_arb +ffffffff82141000 T mpc32_mpc_init +ffffffff821411e0 T mpc32_power_on_blnd_lut +ffffffff82141350 T mpc32_configure_post1dlut +ffffffff82141450 T mpc32_program_post1dluta_settings +ffffffff82141660 T mpc32_program_post1dlutb_settings +ffffffff82141870 T mpc32_program_post1dlut_pwl +ffffffff82141ca0 T mpc32_program_post1dlut +ffffffff82141fb0 T mpc32_configure_shaper_lut +ffffffff821420d0 T mpc32_program_shaper_luta_settings +ffffffff82142f60 T mpc32_program_shaper_lutb_settings +ffffffff82143df0 T mpc32_program_shaper_lut +ffffffff82143f90 T mpc32_power_on_shaper_3dlut +ffffffff821441c0 T mpc32_program_shaper +ffffffff821444e0 T mpc32_select_3dlut_ram +ffffffff82144590 T mpc32_select_3dlut_ram_mask +ffffffff82144660 T mpc32_set3dlut_ram12 +ffffffff82144860 T mpc32_set3dlut_ram10 +ffffffff82144930 T mpc32_program_3dlut +ffffffff82145300 T dcn32_mpc_construct +ffffffff82146000 T optc32_set_h_timing_div_manual_mode +ffffffff82146040 T dcn32_timing_generator_init +ffffffff821460b0 t optc32_enable_crtc +ffffffff821461b0 t optc32_disable_crtc +ffffffff82146290 t optc32_phantom_crtc_post_enable +ffffffff82146350 t optc32_disable_phantom_otg +ffffffff82146390 t optc32_set_drr +ffffffff82146550 t optc32_set_odm_bypass +ffffffff821466c0 t optc32_set_odm_combine +ffffffff82147000 T dcn32_panel_cntl_create +ffffffff82147070 T dcn32_acquire_post_bldn_3dlut +ffffffff82147160 T dcn32_release_post_bldn_3dlut +ffffffff82147210 T dcn32_retain_phantom_pipes +ffffffff821472f0 T dcn32_remove_phantom_pipes +ffffffff82147460 T dcn32_add_phantom_pipes +ffffffff82147890 T dcn32_validate_bandwidth +ffffffff82147d70 T dcn32_populate_dml_pipes_from_context +ffffffff821481a0 T dcn32_calculate_wm_and_dlg +ffffffff82148210 T dcn32_create_resource_pool +ffffffff821482c0 t dcn32_resource_construct +ffffffff82153800 T dcn32_acquire_free_pipe_as_secondary_dpp_pipe +ffffffff82153b00 T dcn32_calc_num_avail_chans_for_mall +ffffffff82153b70 t dcn32_mpc_create +ffffffff821581d0 t dcn32_dwbc_create +ffffffff82158bd0 t dcn32_mmhubbub_create +ffffffff82159080 t dcn32_resource_destruct +ffffffff82159710 t dcn32_destroy_resource_pool +ffffffff82159770 t dcn32_link_encoder_create +ffffffff8215a840 t dcn32_update_bw_bounding_box +ffffffff8215a890 t read_dce_straps +ffffffff8215a8c0 t dcn32_create_audio +ffffffff8215ac40 t dcn32_stream_encoder_create +ffffffff8215ca80 t dcn32_hpo_dp_stream_encoder_create +ffffffff8215d860 t dcn32_hpo_dp_link_encoder_create +ffffffff8215dcb0 t dcn32_hwseq_create +ffffffff8215e1a0 t dcn32_vpg_create +ffffffff8215f000 T dcn32_helper_mall_bytes_to_ways +ffffffff8215f060 T dcn32_helper_calculate_mall_bytes_for_cursor +ffffffff8215f100 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff8215f180 T dcn32_merge_pipes_for_subvp +ffffffff8215f340 T dcn32_all_pipes_have_stream_and_plane +ffffffff8215f3d0 T dcn32_subvp_in_use +ffffffff8215f460 T dcn32_mpo_in_use +ffffffff8215f4d0 T dcn32_any_surfaces_rotated +ffffffff8215f560 T dcn32_is_center_timing +ffffffff8215f5d0 T dcn32_is_psr_capable +ffffffff8215f620 T dcn32_determine_det_override +ffffffff8215f960 T dcn32_set_det_allocations +ffffffff8215faf0 T dcn32_save_mall_state +ffffffff8215fba0 T dcn32_restore_mall_state +ffffffff8215fc50 T dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8215fe00 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8215feb0 T dcn32_check_native_scaling_for_res +ffffffff8215ff10 T dcn32_subvp_drr_admissable +ffffffff821600d0 T dcn32_subvp_vblank_admissable +ffffffff82161000 T dcn321_link_encoder_construct +ffffffff82162000 T dcn321_create_resource_pool +ffffffff821620b0 t dcn321_resource_construct +ffffffff8216d550 t dcn321_mpc_create +ffffffff82171bb0 t dcn321_dwbc_create +ffffffff821725b0 t dcn321_mmhubbub_create +ffffffff82172a60 t dcn321_resource_destruct +ffffffff821730f0 t dcn321_destroy_resource_pool +ffffffff82173150 t dcn321_link_encoder_create +ffffffff82174220 t dcn321_update_bw_bounding_box +ffffffff82174270 t read_dce_straps +ffffffff821742a0 t dcn321_create_audio +ffffffff82174620 t dcn321_stream_encoder_create +ffffffff82176460 t dcn321_hpo_dp_stream_encoder_create +ffffffff82177240 t dcn321_hpo_dp_link_encoder_create +ffffffff82177690 t dcn321_hwseq_create +ffffffff82177b80 t dcn321_vpg_create +ffffffff82178000 T bw_int_to_fixed_nonconst +ffffffff82178090 T bw_frc_to_fixed +ffffffff82178260 T bw_floor2 +ffffffff82178310 T bw_ceil2 +ffffffff82178390 T bw_mul +ffffffff82179000 T convert_to_custom_float_format +ffffffff8217a000 T bw_calcs_init +ffffffff8217ae60 T bw_calcs +ffffffff8217c800 t calculate_bandwidth +ffffffff82184000 T scaler_settings_calculation +ffffffff82184350 T mode_support_and_system_configuration +ffffffff8218a180 T display_pipe_configuration +ffffffff8218aab0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff82190000 T dcn_bw_mod +ffffffff82190060 T dcn_bw_min2 +ffffffff821900a0 T dcn_bw_max +ffffffff821900d0 T dcn_bw_max2 +ffffffff82190110 T dcn_bw_floor2 +ffffffff821901b0 T dcn_bw_floor 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+ffffffff821984f0 T dcn20_cap_soc_clocks +ffffffff82198850 T dcn20_patch_bounding_box +ffffffff82198a40 T dcn20_validate_bandwidth_fp +ffffffff82198be0 t dcn20_validate_bandwidth_internal +ffffffff82198fe0 T dcn20_fpu_set_wm_ranges +ffffffff82199080 T dcn20_fpu_adjust_dppclk +ffffffff82199120 T dcn21_populate_dml_pipes_from_context +ffffffff82199230 T dcn21_validate_bandwidth_fp +ffffffff82199cc0 T dcn21_update_bw_bounding_box +ffffffff8219a0d0 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff8219a130 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff8219a430 t calculate_wm_set_for_vlevel +ffffffff8219b000 T dml20_recalculate +ffffffff8219b740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821a0be0 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff821a8040 t TruncToValidBPP +ffffffff821a8220 t CalculateVMAndRowBytes +ffffffff821a88e0 t CalculatePrefetchSourceLines +ffffffff821a8ab0 t CalculateWriteBackDelay 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calculate_ttu_cursor +ffffffff821d9000 T optc3_fpu_set_vrr_m_const +ffffffff821d94a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff821d97b0 T dcn30_fpu_set_mcif_arb_params +ffffffff821d9920 T dcn30_fpu_update_soc_for_wm_a +ffffffff821d99f0 T dcn30_fpu_calculate_wm_and_dlg +ffffffff821da480 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821da670 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff821da6d0 T dcn30_fpu_update_max_clk +ffffffff821da780 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff821da880 T dcn30_fpu_update_bw_bounding_box +ffffffff821daa60 T dcn3_fpu_build_wm_range_table +ffffffff821dad40 T patch_dcn30_soc_bounding_box +ffffffff821db000 T dml30_recalculate +ffffffff821db5f0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821e20b0 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff821e2320 T dml30_CalculateWriteBackDISPCLK +ffffffff821e2490 t dml_max3 +ffffffff821e24f0 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff821ea040 t CalculateSwathAndDETConfiguration +ffffffff821ea740 t TruncToValidBPP +ffffffff821ea9a0 t CalculateVMAndRowBytes +ffffffff821eb010 t CalculatePrefetchSourceLines +ffffffff821eb1e0 t CalculateUrgentBurstFactor +ffffffff821eb470 t CalculateDCFCLKDeepSleep +ffffffff821eb790 t UseMinimumDCFCLK +ffffffff821ecab0 t CalculatePrefetchSchedule +ffffffff821edf50 t CalculateFlipSchedule +ffffffff821ee450 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821ef190 t CalculateSwathWidth +ffffffff821f0000 T dml30_rq_dlg_get_rq_reg +ffffffff821f04b0 t dml_rq_dlg_get_rq_params +ffffffff821f0740 T dml30_rq_dlg_get_dlg_reg +ffffffff821f2e10 t get_surf_rq_param +ffffffff821f37a0 t calculate_ttu_cursor +ffffffff821f4000 T dcn301_update_bw_bounding_box +ffffffff821f42e0 T dcn301_fpu_set_wm_ranges +ffffffff821f4380 T dcn301_fpu_init_soc_bounding_box +ffffffff821f4420 T dcn301_calculate_wm_and_dlg_fp +ffffffff821f4750 t calculate_wm_set_for_vlevel +ffffffff821f5000 T dcn302_fpu_update_bw_bounding_box +ffffffff821f5940 T dcn302_fpu_init_soc_bounding_box +ffffffff821f6000 T dcn303_fpu_update_bw_bounding_box +ffffffff821f69a0 T dcn303_fpu_init_soc_bounding_box +ffffffff821f7000 T dcn31_zero_pipe_dcc_fraction +ffffffff821f7060 T dcn31_update_soc_for_wm_a +ffffffff821f7110 T dcn315_update_soc_for_wm_a +ffffffff821f71e0 T dcn31_calculate_wm_and_dlg_fp +ffffffff821f7840 T dcn31_update_bw_bounding_box +ffffffff821f7be0 T dcn315_update_bw_bounding_box +ffffffff821f7ed0 T dcn316_update_bw_bounding_box +ffffffff821f8280 T dcn_get_max_non_odm_pix_rate_100hz +ffffffff821f82e0 T dcn_get_approx_det_segs_required_for_pstate +ffffffff821f9000 T dml31_recalculate +ffffffff821f92d0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82200190 T dml31_CalculateWriteBackDISPCLK +ffffffff82200300 t dml_max3 +ffffffff82200360 T dml31_ModeSupportAndSystemConfigurationFull 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DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8221a050 T dml314_CalculateWriteBackDISPCLK +ffffffff8221a1c0 t dml_max3 +ffffffff8221a220 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff822225a0 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff82222810 t CalculateSwathAndDETConfiguration +ffffffff82222e50 t TruncToValidBPP +ffffffff822230a0 t CalculateDCFCLKDeepSleep +ffffffff822233c0 t CalculateVMAndRowBytes +ffffffff82223a00 t CalculatePrefetchSourceLines +ffffffff82223bd0 t CalculateUrgentBurstFactor +ffffffff82223e60 t CalculateMaxVStartup +ffffffff82223fa0 t UseMinimumDCFCLK +ffffffff82224f30 t CalculatePrefetchSchedulePerPlane +ffffffff82225690 t CalculateFlipSchedule +ffffffff82225c20 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82226840 t CalculateSwathWidth +ffffffff82226d50 t CalculatePrefetchSchedule +ffffffff82228130 t CalculateVupdateAndDynamicMetadataParameters +ffffffff82229000 T dml314_rq_dlg_get_rq_reg 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dcn32_set_clock_limits +ffffffff82234480 T dcn32_override_min_req_memclk +ffffffff82234540 t subvp_drr_schedulable +ffffffff822347d0 t get_optimal_ntuple +ffffffff82235000 T dml32_recalculate +ffffffff82239320 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff82241000 T dml32_dscceComputeDelay +ffffffff82241140 T dml32_dscComputeDelay +ffffffff82241180 T IsVertical +ffffffff822411b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff822414d0 t dml_max3 +ffffffff82241530 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff82241860 T dml32_CalculateSwathAndDETConfiguration +ffffffff82242090 T dml32_CalculateSwathWidth +ffffffff82242950 T dml32_UnboundedRequest +ffffffff822429c0 T dml32_CalculateDETBufferSize +ffffffff82243000 T dml32_CalculateODMMode +ffffffff82243780 T dml32_CalculateRequiredDispclk +ffffffff82243940 T dml32_RoundToDFSGranularity +ffffffff822439d0 T dml32_CalculateOutputLink +ffffffff82244440 T dml32_TruncToValidBPP +ffffffff82244770 T dml32_CalculateDPPCLK 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dml32_rq_dlg_get_dlg_reg +ffffffff82253000 T dcn321_update_bw_bounding_box_fpu +ffffffff82255760 t get_optimal_ntuple +ffffffff82256000 T dml_init_instance +ffffffff82256310 T dml_get_status_message +ffffffff82256350 T dml_log_pipe_params +ffffffff82256380 T dml_log_mode_support_params +ffffffff82257000 T dml_get_voltage_level +ffffffff82257240 t fetch_socbb_params +ffffffff82257730 t fetch_ip_params +ffffffff82257bd0 t fetch_pipe_params +ffffffff82258c50 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff82258cd0 T get_clk_dcf_deepsleep +ffffffff82258de0 T get_wm_urgent +ffffffff82258ef0 T get_wm_memory_trip +ffffffff82259000 T get_wm_writeback_urgent +ffffffff82259110 T get_wm_stutter_exit +ffffffff82259220 T get_wm_stutter_enter_exit +ffffffff82259330 T get_wm_z8_stutter_exit +ffffffff82259440 T get_wm_z8_stutter_enter_exit +ffffffff82259550 T get_stutter_efficiency_z8 +ffffffff82259660 T get_stutter_num_bursts_z8 +ffffffff82259770 T get_wm_dram_clock_change +ffffffff82259880 T get_wm_writeback_dram_clock_change +ffffffff82259990 T get_stutter_efficiency +ffffffff82259aa0 T get_stutter_efficiency_no_vblank +ffffffff82259bb0 T get_stutter_period +ffffffff82259cc0 T get_urgent_latency +ffffffff82259dd0 T get_urgent_extra_latency +ffffffff82259ee0 T get_nonurgent_latency +ffffffff82259ff0 T get_dram_clock_change_latency +ffffffff8225a100 T get_dispclk_calculated +ffffffff8225a210 T get_total_data_read_bw +ffffffff8225a320 T get_return_bw +ffffffff8225a430 T get_tcalc +ffffffff8225a540 T get_fraction_of_urgent_bandwidth +ffffffff8225a650 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff8225a760 T get_cstate_max_cap_mode +ffffffff8225a880 T get_comp_buffer_size_kbytes +ffffffff8225a990 T get_pixel_chunk_size_in_kbyte +ffffffff8225aab0 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff8225abd0 T get_meta_chunk_size_in_kbyte +ffffffff8225acf0 T get_min_pixel_chunk_size_in_byte +ffffffff8225ae00 T get_min_meta_chunk_size_in_byte +ffffffff8225af20 T get_fclk_watermark +ffffffff8225b030 T get_usr_retraining_watermark +ffffffff8225b140 T get_comp_buffer_reserved_space_kbytes +ffffffff8225b260 T get_comp_buffer_reserved_space_64bytes +ffffffff8225b380 T get_comp_buffer_reserved_space_zs +ffffffff8225b4a0 T get_unbounded_request_enabled +ffffffff8225b5c0 T get_dsc_delay +ffffffff8225b6f0 T get_dppclk_calculated +ffffffff8225b810 T get_dscclk_calculated +ffffffff8225b930 T get_min_ttu_vblank +ffffffff8225ba50 T get_min_ttu_vblank_in_us +ffffffff8225bb70 T get_vratio_prefetch_l +ffffffff8225bc90 T get_vratio_prefetch_c +ffffffff8225bdb0 T get_dst_x_after_scaler +ffffffff8225bed0 T get_dst_y_after_scaler +ffffffff8225bff0 T get_dst_y_per_vm_vblank +ffffffff8225c110 T get_dst_y_per_row_vblank +ffffffff8225c230 T get_dst_y_prefetch +ffffffff8225c350 T get_dst_y_per_vm_flip +ffffffff8225c470 T get_dst_y_per_row_flip +ffffffff8225c590 T get_refcyc_per_vm_group_vblank +ffffffff8225c6b0 T get_refcyc_per_vm_group_flip +ffffffff8225c7d0 T get_refcyc_per_vm_req_vblank +ffffffff8225c8f0 T get_refcyc_per_vm_req_flip +ffffffff8225ca10 T get_refcyc_per_vm_group_vblank_in_us +ffffffff8225cb30 T get_refcyc_per_vm_group_flip_in_us +ffffffff8225cc50 T get_refcyc_per_vm_req_vblank_in_us +ffffffff8225cd70 T get_refcyc_per_vm_req_flip_in_us +ffffffff8225ce90 T get_refcyc_per_vm_dmdata_in_us +ffffffff8225cfb0 T get_dmdata_dl_delta_in_us +ffffffff8225d0d0 T get_refcyc_per_line_delivery_l_in_us +ffffffff8225d1f0 T get_refcyc_per_line_delivery_c_in_us +ffffffff8225d310 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff8225d430 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff8225d550 T get_refcyc_per_req_delivery_l_in_us +ffffffff8225d670 T get_refcyc_per_req_delivery_c_in_us +ffffffff8225d790 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff8225d8b0 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff8225d9d0 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff8225daf0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff8225dc10 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff8225dd30 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff8225de50 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff8225df70 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff8225e090 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff8225e1b0 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff8225e2d0 T get_vstartup +ffffffff8225e400 T get_vupdate_offset +ffffffff8225e530 T get_vupdate_width +ffffffff8225e650 T get_vready_offset +ffffffff8225e770 T get_vready_at_or_after_vsync +ffffffff8225e8a0 T get_min_dst_y_next_start +ffffffff8225e9d0 T get_dst_y_per_pte_row_nom_l +ffffffff8225eaf0 T get_dst_y_per_pte_row_nom_c +ffffffff8225ec10 T get_dst_y_per_meta_row_nom_l +ffffffff8225ed30 T get_dst_y_per_meta_row_nom_c +ffffffff8225ee50 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff8225ef70 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff8225f090 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff8225f1b0 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff8225f2d0 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff8225f3f0 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff8225f510 T get_vstartup_calculated +ffffffff8225f640 T get_dpte_row_height_linear_c +ffffffff8225f770 T get_swath_height_l +ffffffff8225f8a0 T get_swath_height_c +ffffffff8225f9d0 T get_det_stored_buffer_size_l_bytes +ffffffff8225fb00 T get_det_stored_buffer_size_c_bytes +ffffffff8225fc30 T get_dpte_group_size_in_bytes +ffffffff8225fd60 T get_vm_group_size_in_bytes +ffffffff8225fe90 T get_dpte_row_height_linear_l +ffffffff8225ffc0 T get_pte_buffer_mode +ffffffff822600f0 T get_subviewport_lines_needed_in_mall +ffffffff82260220 T get_surface_size_in_mall +ffffffff82260350 T get_total_immediate_flip_bytes +ffffffff82260470 T get_total_immediate_flip_bw +ffffffff82260650 T get_total_prefetch_bw +ffffffff82260830 T get_total_surface_size_in_mall_bytes +ffffffff822609d0 T get_det_buffer_size_kbytes +ffffffff82260b00 T get_is_phantom_pipe +ffffffff82260c30 T Calculate256BBlockSizes +ffffffff82260d20 T CalculateMinAndMaxPrefetchMode +ffffffff82260da0 T ModeSupportAndSystemConfiguration +ffffffff822610b0 T CalculateWriteBackDISPCLK +ffffffff82262000 T print__rq_params_st +ffffffff82262030 T print__data_rq_sizing_params_st +ffffffff82262060 T print__data_rq_dlg_params_st +ffffffff82262090 T print__data_rq_misc_params_st +ffffffff822620c0 T print__rq_dlg_params_st +ffffffff822620f0 T print__dlg_sys_params_st +ffffffff82262120 T print__data_rq_regs_st +ffffffff82262150 T print__rq_regs_st +ffffffff82262180 T print__dlg_regs_st +ffffffff822621b0 T print__ttu_regs_st +ffffffff82263000 T dml1_extract_rq_regs +ffffffff82263330 T dml1_rq_dlg_get_rq_params +ffffffff82263510 t get_surf_rq_param +ffffffff822640c0 T dml1_rq_dlg_get_dlg_params +ffffffff82267000 T _do_calc_rc_params +ffffffff82267fc0 t get_qp_set +ffffffff82269000 T dc_bandwidth_in_kbps_from_timing +ffffffff82269290 T dc_dsc_stream_bandwidth_in_kbps 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smu_v13_0_4_fini_smc_tables -ffffffff823a8670 t smu_v13_0_4_system_features_control -ffffffff823a86c0 t smu_v13_0_4_mode2_reset -ffffffff823a86e0 t smu_v13_0_4_get_dpm_ultimate_freq -ffffffff823a8b00 t smu_v13_0_4_get_gpu_metrics -ffffffff823a8cd0 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters -ffffffff823a8d30 t smu_v13_0_4_get_current_clk_freq -ffffffff823a9000 T smu_v13_0_5_set_ppt_funcs -ffffffff823a90a0 t smu_v13_0_5_set_default_dpm_tables -ffffffff823a90d0 t smu_v13_0_5_print_clk_levels -ffffffff823a9160 t smu_v13_0_5_force_clk_levels -ffffffff823a92d0 t smu_v13_0_5_od_edit_dpm_table -ffffffff823a9580 t smu_v13_0_5_dpm_set_vcn_enable -ffffffff823a95a0 t smu_v13_0_5_dpm_set_jpeg_enable -ffffffff823a95c0 t smu_v13_0_5_read_sensor -ffffffff823a97e0 t smu_v13_0_5_is_dpm_running -ffffffff823a9830 t smu_v13_0_5_set_watermarks_table -ffffffff823a99b0 t smu_v13_0_5_set_performance_level -ffffffff823a9f50 t smu_v13_0_5_init_smc_tables -ffffffff823aa0c0 t smu_v13_0_5_fini_smc_tables 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smu_v13_0_6_smu_send_hbm_bad_page_num -ffffffff823adbf0 t smu_v13_0_6_get_smu_metrics_data -ffffffff823ade80 t smu_v13_0_6_upload_dpm_level -ffffffff823adf80 t smu_v13_0_6_i2c_xfer -ffffffff823ae280 t smu_v13_0_6_i2c_func -ffffffff823ae2b0 t smu_v13_0_6_set_irq_state -ffffffff823ae540 t smu_v13_0_6_irq_process -ffffffff823af000 T smu_v13_0_7_set_ppt_funcs -ffffffff823af060 t smu_v13_0_7_get_allowed_feature_mask -ffffffff823af1d0 t smu_v13_0_7_set_default_dpm_table -ffffffff823af5f0 t smu_v13_0_7_populate_umd_state_clk -ffffffff823af730 t smu_v13_0_7_print_clk_levels -ffffffff823af840 t smu_v13_0_7_force_clk_levels -ffffffff823af9c0 t smu_v13_0_7_od_edit_dpm_table -ffffffff823afe90 t smu_v13_0_7_restore_user_od_settings -ffffffff823aff50 t smu_v13_0_7_get_power_profile_mode -ffffffff823b0090 t smu_v13_0_7_set_power_profile_mode -ffffffff823b02d0 t smu_v13_0_7_read_sensor -ffffffff823b04e0 t smu_v13_0_7_is_dpm_running -ffffffff823b0530 t smu_v13_0_7_get_fan_speed_pwm -ffffffff823b0610 t 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sdmmc_io_read_multi_1 -ffffffff825e69b0 T sdmmc_io_write_multi_1 -ffffffff825e6aa0 T sdmmc_io_read_region_1 -ffffffff825e6b90 T sdmmc_io_write_region_1 -ffffffff825e6c80 T sdmmc_io_xchg -ffffffff825e6e10 T sdmmc_intr_enable -ffffffff825e7080 T sdmmc_intr_disable -ffffffff825e72f0 T sdmmc_intr_establish -ffffffff825e73f0 T sdmmc_intr_disestablish -ffffffff825e74e0 T sdmmc_card_intr -ffffffff825e7530 T sdmmc_intr_task -ffffffff825e75c0 T sdmmc_io_set_blocklen -ffffffff825e8000 T sdmmc_mem_enable -ffffffff825e8450 T sdmmc_mem_send_op_cond -ffffffff825e8600 T sdmmc_mem_signal_voltage -ffffffff825e86c0 T sdmmc_mem_scan -ffffffff825e89d0 T sdmmc_decode_csd -ffffffff825e8e00 T sdmmc_decode_cid -ffffffff825e92a0 T sdmmc_mem_send_scr -ffffffff825e93e0 T sdmmc_mem_decode_scr -ffffffff825e9440 T sdmmc_mem_send_cxd_data -ffffffff825e95b0 T sdmmc_mem_set_bus_width -ffffffff825e96c0 T sdmmc_mem_sd_switch -ffffffff825e9970 T sdmmc_be512_to_bitfield512 -ffffffff825e9a20 T sdmmc_mem_mmc_switch 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bwfm_sdio_dev_read -ffffffff825ee950 T bwfm_sdio_rx_frames -ffffffff825eed00 T bwfm_sdio_tx_frames -ffffffff825eee00 T bwfm_sdio_backplane -ffffffff825eeeb0 T bwfm_sdio_buf_read -ffffffff825eef90 T bwfm_sdio_buf_write -ffffffff825ef040 T bwfm_sdio_frame_read_write -ffffffff825ef1c0 T bwfm_sdio_newbuf -ffffffff825ef240 T bwfm_sdio_tx_ok -ffffffff825ef2a0 T bwfm_sdio_tx_ctrlframe -ffffffff825ef3a0 T bwfm_sdio_tx_dataframe -ffffffff825ef4f0 T bwfm_sdio_rx_glom -ffffffff825f0000 T onewire_match -ffffffff825f0050 T onewire_attach -ffffffff825f00f0 T onewire_detach -ffffffff825f0160 T onewire_activate -ffffffff825f0180 T onewire_scan -ffffffff825f03a0 T onewire_createthread -ffffffff825f0410 T onewire_print -ffffffff825f04e0 T onewirebus_print -ffffffff825f0530 T onewire_lock -ffffffff825f0550 T onewire_unlock -ffffffff825f0570 T onewire_reset -ffffffff825f0590 T onewire_bit -ffffffff825f05b0 T onewire_read_byte -ffffffff825f06f0 T onewire_write_byte -ffffffff825f07d0 T onewire_read_block -ffffffff825f0870 T onewire_write_block -ffffffff825f0910 T onewire_triplet -ffffffff825f09f0 T onewire_matchrom -ffffffff825f0b40 T onewire_search -ffffffff825f0ee0 T onewire_thread -ffffffff825f1000 T onewire_crc -ffffffff825f10b0 T onewire_crc16 -ffffffff825f1170 T onewire_famname -ffffffff825f11b0 T onewire_matchbyfam -ffffffff825f2000 T owid_match -ffffffff825f2030 T owid_attach -ffffffff825f2100 T owid_detach -ffffffff825f2140 T owid_activate -ffffffff825f3000 T owsbm_match -ffffffff825f3030 T owsbm_attach -ffffffff825f31d0 T owsbm_detach -ffffffff825f3240 T owsbm_activate -ffffffff825f3270 T owsbm_update -ffffffff825f4000 T owtemp_match -ffffffff825f4030 T owtemp_attach -ffffffff825f4130 T owtemp_detach -ffffffff825f41a0 T owtemp_activate -ffffffff825f41d0 T owtemp_update -ffffffff825f5000 T owctr_match -ffffffff825f5030 T owctr_attach -ffffffff825f5180 T owctr_detach -ffffffff825f51f0 T owctr_activate -ffffffff825f5220 T owctr_update -ffffffff825f5250 T owctr_update_counter -ffffffff825f6000 A __text_page_start -ffffffff825f6000 T Xsyscall_meltdown -ffffffff825f600c T Xsyscall -ffffffff825f626e t Xsyscall_trampback -ffffffff825f6280 T intr_user_exit -ffffffff825f62c2 t intr_user_exit_post_ast -ffffffff825f63ee t Xiretq_trampback -ffffffff825f63fa T doreti_iret -ffffffff825f7000 T alltraps -ffffffff825f7138 T recall_trap -ffffffff825f7150 T alltraps_kern -ffffffff825f7153 T alltraps_kern_meltdown -ffffffff825f8000 ? Xsyscall32 -ffffffff825f8000 A __kutext_start -ffffffff825f8000 A __text_page_end -ffffffff825f9000 ? Xtrap00 -ffffffff825f9010 ? Xtrap01 -ffffffff825f9020 ? Xtrap02 -ffffffff825f9028 c calltrap_specstk -ffffffff825f90f0 ? calltrap_specstk_tramp -ffffffff825f9110 ? Xtrap03 -ffffffff825f9120 ? Xtrap04 -ffffffff825f9130 ? Xtrap05 -ffffffff825f9140 ? Xtrap06 -ffffffff825f9150 ? Xtrap07 -ffffffff825f9160 ? Xtrap08 -ffffffff825f9170 ? Xtrap09 -ffffffff825f9180 ? Xtrap0a -ffffffff825f9190 ? Xtrap0b -ffffffff825f91a0 ? Xtrap0c -ffffffff825f91b0 ? Xtrap0d -ffffffff825f9240 ? Xtrap0e -ffffffff825f9250 ? Xintrspurious -ffffffff825f9250 ? Xtrap0f -ffffffff825f9260 ? Xtrap10 -ffffffff825f9270 ? Xtrap11 -ffffffff825f9280 ? Xtrap12 -ffffffff825f9290 ? Xtrap13 -ffffffff825f92a0 ? Xtrap14 -ffffffff825f92b0 ? Xtrap15 -ffffffff825f92c0 ? Xtrap16 -ffffffff825f92c0 ? Xtrap17 -ffffffff825f92c0 ? Xtrap18 -ffffffff825f92c0 ? Xtrap19 -ffffffff825f92c0 ? Xtrap1a -ffffffff825f92c0 ? Xtrap1b -ffffffff825f92c0 ? Xtrap1c -ffffffff825f92c0 ? Xtrap1d -ffffffff825f92c0 ? Xtrap1e -ffffffff825f92c0 ? Xtrap1f -ffffffff825f92d0 ? x2apic_eoi -ffffffff825f92f0 ? Xintr_lapic_ipi -ffffffff825f9330 ? Xipi_invltlb -ffffffff825f9360 ? Xipi_invlpg -ffffffff825f9390 ? Xipi_invlrange -ffffffff825f93d0 ? Xipi_invltlb_pcid -ffffffff825f9410 ? Xipi_invlpg_pcid -ffffffff825f9460 ? Xipi_invlrange_pcid -ffffffff825f94d0 ? Xintr_lapic_ltimer -ffffffff825f9510 ? Xintr_xen_upcall -ffffffff825f9550 ? Xintr_hyperv_upcall -ffffffff825f9590 ? Xintr_legacy0 -ffffffff825f95d0 ? Xintr_legacy1 -ffffffff825f9610 ? Xintr_legacy2 -ffffffff825f9650 ? Xintr_legacy3 -ffffffff825f9690 ? Xintr_legacy4 -ffffffff825f96d0 ? Xintr_legacy5 -ffffffff825f9710 ? Xintr_legacy6 -ffffffff825f9750 ? Xintr_legacy7 -ffffffff825f9790 ? Xintr_legacy8 -ffffffff825f97d0 ? Xintr_legacy9 -ffffffff825f9810 ? Xintr_legacy10 -ffffffff825f9850 ? Xintr_legacy11 -ffffffff825f9890 ? Xintr_legacy12 -ffffffff825f98d0 ? Xintr_legacy13 -ffffffff825f9910 ? Xintr_legacy14 -ffffffff825f9950 ? Xintr_legacy15 -ffffffff825f9990 ? Xintr_ioapic_edge0 -ffffffff825f99d0 ? Xintr_ioapic_edge1 -ffffffff825f9a10 ? Xintr_ioapic_edge2 -ffffffff825f9a50 ? Xintr_ioapic_edge3 -ffffffff825f9a90 ? Xintr_ioapic_edge4 -ffffffff825f9ad0 ? Xintr_ioapic_edge5 -ffffffff825f9b10 ? Xintr_ioapic_edge6 -ffffffff825f9b50 ? Xintr_ioapic_edge7 -ffffffff825f9b90 ? Xintr_ioapic_edge8 -ffffffff825f9bd0 ? Xintr_ioapic_edge9 -ffffffff825f9c10 ? Xintr_ioapic_edge10 -ffffffff825f9c50 ? Xintr_ioapic_edge11 -ffffffff825f9c90 ? Xintr_ioapic_edge12 -ffffffff825f9cd0 ? Xintr_ioapic_edge13 -ffffffff825f9d10 ? Xintr_ioapic_edge14 -ffffffff825f9d50 ? Xintr_ioapic_edge15 -ffffffff825f9d90 ? Xintr_ioapic_edge16 -ffffffff825f9dd0 ? Xintr_ioapic_edge17 -ffffffff825f9e10 ? Xintr_ioapic_edge18 -ffffffff825f9e50 ? Xintr_ioapic_edge19 -ffffffff825f9e90 ? Xintr_ioapic_edge20 -ffffffff825f9ed0 ? Xintr_ioapic_edge21 -ffffffff825f9f10 ? Xintr_ioapic_edge22 -ffffffff825f9f50 ? Xintr_ioapic_edge23 -ffffffff825f9f90 ? Xintr_ioapic_edge24 -ffffffff825f9fd0 ? Xintr_ioapic_edge25 -ffffffff825fa010 ? Xintr_ioapic_edge26 -ffffffff825fa050 ? Xintr_ioapic_edge27 -ffffffff825fa090 ? Xintr_ioapic_edge28 -ffffffff825fa0d0 ? Xintr_ioapic_edge29 -ffffffff825fa110 ? Xintr_ioapic_edge30 -ffffffff825fa150 ? Xintr_ioapic_edge31 -ffffffff825fa190 ? Xintr_ioapic_edge32 -ffffffff825fa1d0 ? Xintr_ioapic_edge33 -ffffffff825fa210 ? Xintr_ioapic_edge34 -ffffffff825fa250 ? Xintr_ioapic_edge35 -ffffffff825fa290 ? Xintr_ioapic_edge36 -ffffffff825fa2d0 ? Xintr_ioapic_edge37 -ffffffff825fa310 ? Xintr_ioapic_edge38 -ffffffff825fa350 ? Xintr_ioapic_edge39 -ffffffff825fa390 ? Xintr_ioapic_edge40 -ffffffff825fa3d0 ? Xintr_ioapic_edge41 -ffffffff825fa410 ? Xintr_ioapic_edge42 -ffffffff825fa450 ? Xintr_ioapic_edge43 -ffffffff825fa490 ? Xintr_ioapic_edge44 -ffffffff825fa4d0 ? Xintr_ioapic_edge45 -ffffffff825fa510 ? Xintr_ioapic_edge46 -ffffffff825fa550 ? Xintr_ioapic_edge47 -ffffffff825fa590 ? Xintr_ioapic_edge48 -ffffffff825fa5d0 ? Xintr_ioapic_edge49 -ffffffff825fa610 ? Xintr_ioapic_edge50 -ffffffff825fa650 ? Xintr_ioapic_edge51 -ffffffff825fa690 ? Xintr_ioapic_edge52 -ffffffff825fa6d0 ? Xintr_ioapic_edge53 -ffffffff825fa710 ? Xintr_ioapic_edge54 -ffffffff825fa750 ? Xintr_ioapic_edge55 -ffffffff825fa790 ? Xintr_ioapic_edge56 -ffffffff825fa7d0 ? Xintr_ioapic_edge57 -ffffffff825fa810 ? Xintr_ioapic_edge58 -ffffffff825fa850 ? Xintr_ioapic_edge59 -ffffffff825fa890 ? Xintr_ioapic_edge60 -ffffffff825fa8d0 ? Xintr_ioapic_edge61 -ffffffff825fa910 ? Xintr_ioapic_edge62 -ffffffff825fa950 ? Xintr_ioapic_edge63 -ffffffff825fa990 ? Xintr_ioapic_level0 -ffffffff825fa9d0 ? Xintr_ioapic_level1 -ffffffff825faa10 ? Xintr_ioapic_level2 -ffffffff825faa50 ? Xintr_ioapic_level3 -ffffffff825faa90 ? Xintr_ioapic_level4 -ffffffff825faad0 ? Xintr_ioapic_level5 -ffffffff825fab10 ? Xintr_ioapic_level6 -ffffffff825fab50 ? Xintr_ioapic_level7 -ffffffff825fab90 ? Xintr_ioapic_level8 -ffffffff825fabd0 ? Xintr_ioapic_level9 -ffffffff825fac10 ? Xintr_ioapic_level10 -ffffffff825fac50 ? Xintr_ioapic_level11 -ffffffff825fac90 ? Xintr_ioapic_level12 -ffffffff825facd0 ? Xintr_ioapic_level13 -ffffffff825fad10 ? Xintr_ioapic_level14 -ffffffff825fad50 ? Xintr_ioapic_level15 -ffffffff825fad90 ? Xintr_ioapic_level16 -ffffffff825fadd0 ? Xintr_ioapic_level17 -ffffffff825fae10 ? Xintr_ioapic_level18 -ffffffff825fae50 ? Xintr_ioapic_level19 -ffffffff825fae90 ? Xintr_ioapic_level20 -ffffffff825faed0 ? Xintr_ioapic_level21 -ffffffff825faf10 ? Xintr_ioapic_level22 -ffffffff825faf50 ? Xintr_ioapic_level23 -ffffffff825faf90 ? Xintr_ioapic_level24 -ffffffff825fafd0 ? Xintr_ioapic_level25 -ffffffff825fb010 ? Xintr_ioapic_level26 -ffffffff825fb050 ? Xintr_ioapic_level27 -ffffffff825fb090 ? Xintr_ioapic_level28 -ffffffff825fb0d0 ? Xintr_ioapic_level29 -ffffffff825fb110 ? Xintr_ioapic_level30 -ffffffff825fb150 ? Xintr_ioapic_level31 -ffffffff825fb190 ? Xintr_ioapic_level32 -ffffffff825fb1d0 ? Xintr_ioapic_level33 -ffffffff825fb210 ? Xintr_ioapic_level34 -ffffffff825fb250 ? Xintr_ioapic_level35 -ffffffff825fb290 ? Xintr_ioapic_level36 -ffffffff825fb2d0 ? Xintr_ioapic_level37 -ffffffff825fb310 ? Xintr_ioapic_level38 -ffffffff825fb350 ? Xintr_ioapic_level39 -ffffffff825fb390 ? Xintr_ioapic_level40 -ffffffff825fb3d0 ? Xintr_ioapic_level41 -ffffffff825fb410 ? Xintr_ioapic_level42 -ffffffff825fb450 ? Xintr_ioapic_level43 -ffffffff825fb490 ? Xintr_ioapic_level44 -ffffffff825fb4d0 ? Xintr_ioapic_level45 -ffffffff825fb510 ? Xintr_ioapic_level46 -ffffffff825fb550 ? Xintr_ioapic_level47 -ffffffff825fb590 ? Xintr_ioapic_level48 -ffffffff825fb5d0 ? Xintr_ioapic_level49 -ffffffff825fb610 ? Xintr_ioapic_level50 -ffffffff825fb650 ? Xintr_ioapic_level51 -ffffffff825fb690 ? Xintr_ioapic_level52 -ffffffff825fb6d0 ? Xintr_ioapic_level53 -ffffffff825fb710 ? Xintr_ioapic_level54 -ffffffff825fb750 ? Xintr_ioapic_level55 -ffffffff825fb790 ? Xintr_ioapic_level56 -ffffffff825fb7d0 ? Xintr_ioapic_level57 -ffffffff825fb810 ? Xintr_ioapic_level58 -ffffffff825fb850 ? Xintr_ioapic_level59 -ffffffff825fb890 ? Xintr_ioapic_level60 -ffffffff825fb8d0 ? Xintr_ioapic_level61 -ffffffff825fb910 ? Xintr_ioapic_level62 -ffffffff825fb950 ? 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vga_50lscreen_bf -ffffffff8270c1f8 R vga_screenlist -ffffffff8270c208 R vga_screenlist_mono -ffffffff8270c218 R vga_accessops -ffffffff8270c278 r i945_wm_info -ffffffff8270c2b8 r bgansitopc -ffffffff8270c2c0 r pctoansi -ffffffff8270c300 r sdma_offsets -ffffffff8270c300 r sdma_offsets -ffffffff8270c338 r iha_rate_tbl -ffffffff8270c370 r i830_a_wm_info -ffffffff8270c3a8 r gen9_edram_size_mb.ways -ffffffff8270c408 r aggr_periodic_times -ffffffff8270c500 r michael_final.pad -ffffffff8270c528 r rt_copysa.maskarray -ffffffff8270c530 r i915_wm_info -ffffffff8270c538 r amdgpu_ih_clientid_jpeg -ffffffff8270c538 r amdgpu_ih_clientid_uvds -ffffffff8270c538 r amdgpu_ih_clientid_vcns -ffffffff8270c538 r amdgpu_ih_clientid_vcns -ffffffff8270c538 r amdgpu_ih_clientid_vcns -ffffffff8270c568 r jsl_ehl_revids -ffffffff8270c578 r vga_setfontset.cmaptabb -ffffffff8270c5e8 r i830_bc_wm_info -ffffffff8270c650 r hsw_activate_psr2.map -ffffffff8270c658 r tgl_revids -ffffffff8270c690 r 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gfx_v10_0_ip_block -ffffffff82b530b8 r gfx_v10_0_gfx_funcs -ffffffff82b53120 r golden_settings_gc_rlc_spm_10_0_nv10 -ffffffff82b593c0 r golden_settings_gc_rlc_spm_10_1_nv14 -ffffffff82b5cde0 r golden_settings_gc_rlc_spm_10_1_2_nv12 -ffffffff82b63080 r gfx_v10_0_kiq_pm4_funcs -ffffffff82b630c0 r gfx_v10_0_ring_funcs_kiq -ffffffff82b63200 r gfx_v10_0_ring_funcs_gfx -ffffffff82b63340 r gfx_v10_0_ring_funcs_compute -ffffffff82b63480 r gfx_v10_0_eop_irq_funcs -ffffffff82b63490 r gfx_v10_0_kiq_irq_funcs -ffffffff82b634a0 r gfx_v10_0_priv_reg_irq_funcs -ffffffff82b634b0 r gfx_v10_0_priv_inst_irq_funcs -ffffffff82b634c0 r gfx_v10_0_rlc_funcs -ffffffff82b63528 r gfx_v10_0_rlc_funcs_sriov -ffffffff82b63590 r gfx10_cs_data -ffffffff82b635b0 r gfx10_SECT_CONTEXT_defs -ffffffff82b63640 r gfx10_SECT_CONTEXT_def_1 -ffffffff82b639a0 r gfx10_SECT_CONTEXT_def_3 -ffffffff82b639b0 r gfx10_SECT_CONTEXT_def_4 -ffffffff82b63c28 r gfx10_SECT_CONTEXT_def_5 -ffffffff82b63c30 r gfx10_SECT_CONTEXT_def_6 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gfx_v8_0_ip_block -ffffffff82b690b8 R gfx_v8_1_ip_block -ffffffff82b690d0 r gfx_v8_0_gfx_funcs -ffffffff82b69130 r gfx_v8_0_ring_funcs_kiq -ffffffff82b69270 r gfx_v8_0_ring_funcs_gfx -ffffffff82b693b0 r gfx_v8_0_ring_funcs_compute -ffffffff82b694f0 r amdgpu_gds_reg_offset -ffffffff82b695f0 r gfx_v8_0_eop_irq_funcs -ffffffff82b69600 r gfx_v8_0_priv_reg_irq_funcs -ffffffff82b69610 r gfx_v8_0_priv_inst_irq_funcs -ffffffff82b69620 r gfx_v8_0_cp_ecc_error_irq_funcs -ffffffff82b69630 r gfx_v8_0_sq_irq_funcs -ffffffff82b69640 r sq_edc_source_names -ffffffff82b69678 r iceland_rlc_funcs -ffffffff82b696e0 r vi_cs_data -ffffffff82b69700 r vi_SECT_CONTEXT_defs -ffffffff82b69780 r vi_SECT_CONTEXT_def_1 -ffffffff82b69ad0 r vi_SECT_CONTEXT_def_3 -ffffffff82b69af0 r vi_SECT_CONTEXT_def_4 -ffffffff82b69d64 r vi_SECT_CONTEXT_def_5 -ffffffff82b69d6c r vi_SECT_CONTEXT_def_6 -ffffffff82b69d70 r vi_SECT_CONTEXT_def_2 -ffffffff82b6a1c0 r vi_SECT_CONTEXT_def_7 -ffffffff82b6a570 r vgpr_init_compute_shader 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gfx_v9_4_3_ring_funcs_kiq -ffffffff82b78238 r gfx_v9_4_3_ring_funcs_compute -ffffffff82b78378 r gfx_v9_4_3_eop_irq_funcs -ffffffff82b78388 r gfx_v9_4_3_priv_reg_irq_funcs -ffffffff82b78398 r gfx_v9_4_3_priv_inst_irq_funcs -ffffffff82b783a8 r gfx_v9_4_3_rlc_funcs -ffffffff82b78410 r gfx_v9_4_3_gfx_funcs -ffffffff82b78470 r gfx_v9_4_3_ce_reg_list -ffffffff82b78800 r gfx_v9_4_3_ras_mem_list_array -ffffffff82b78960 r gfx_v9_4_3_ue_reg_list -ffffffff82b78d20 r gfx_v9_4_3_ras_cp_mem_list -ffffffff82b78d70 r gfx_v9_4_3_ras_gcea_mem_list -ffffffff82b78eb0 r gfx_v9_4_3_ras_gc_cane_mem_list -ffffffff82b78ec0 r gfx_v9_4_3_ras_gcutcl2_mem_list -ffffffff82b78ed0 r gfx_v9_4_3_ras_gds_mem_list -ffffffff82b78ee0 r gfx_v9_4_3_ras_lds_mem_list -ffffffff82b79100 r gfx_v9_4_3_ras_rlc_mem_list -ffffffff82b79180 r gfx_v9_4_3_ras_sp_mem_list -ffffffff82b79190 r gfx_v9_4_3_ras_spi_mem_list -ffffffff82b791d0 r gfx_v9_4_3_ras_sqc_mem_list -ffffffff82b79340 r gfx_v9_4_3_ras_sq_mem_list -ffffffff82b79380 r gfx_v9_4_3_ras_ta_mem_list -ffffffff82b793d0 r gfx_v9_4_3_ras_tcc_mem_list -ffffffff82b793e0 r gfx_v9_4_3_ras_tca_mem_list -ffffffff82b793f0 r gfx_v9_4_3_ras_tci_mem_list -ffffffff82b79400 r gfx_v9_4_3_ras_tcp_mem_list -ffffffff82b79590 r gfx_v9_4_3_ras_td_mem_list -ffffffff82b795c0 r gfx_v9_4_3_ras_tcx_mem_list -ffffffff82b79b40 r gfx_v9_4_3_ras_atc_l2_mem_list -ffffffff82b79b50 r gfx_v9_4_3_ras_utcl2_mem_list -ffffffff82b79b60 r gfx_v9_4_3_ras_vml2_mem_list -ffffffff82b79b70 r gfx_v9_4_3_ras_vml2_walker_mem_list -ffffffff82b7a000 R gfxhub_v1_0_funcs -ffffffff82b7b000 R gfxhub_v1_2_funcs -ffffffff82b7c000 R gfxhub_v2_0_funcs -ffffffff82b7c060 r gfxhub_v2_0_vmhub_funcs -ffffffff82b7c070 r gfxhub_client_ids -ffffffff82b7d000 R gfxhub_v2_1_funcs -ffffffff82b7d060 r gfxhub_v2_1_vmhub_funcs -ffffffff82b7d070 r gfxhub_client_ids -ffffffff82b7e000 R gfxhub_v3_0_funcs -ffffffff82b7e060 r gfxhub_v3_0_vmhub_funcs -ffffffff82b7e070 r gfxhub_client_ids -ffffffff82b7f000 R gfxhub_v3_0_3_funcs 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gmc_v8_5_ip_block -ffffffff82b830e8 r gmc_v8_0_gmc_funcs -ffffffff82b83140 r gmc_v8_0_irq_funcs -ffffffff82b83150 r fiji_mgcg_cgcg_init -ffffffff82b83160 r golden_settings_fiji_a10 -ffffffff82b83190 r tonga_mgcg_cgcg_init -ffffffff82b831a0 r golden_settings_tonga_a11 -ffffffff82b83200 r golden_settings_polaris11_a11 -ffffffff82b83230 r golden_settings_polaris10_a11 -ffffffff82b8326c r cz_mgcg_cgcg_init -ffffffff82b83280 r stoney_mgcg_cgcg_init -ffffffff82b832a0 r golden_settings_stoney_common -ffffffff82b84000 R gmc_v9_0_ip_funcs -ffffffff82b840a0 R gmc_v9_0_ip_block -ffffffff82b840b8 r gmc_v9_0_gmc_funcs -ffffffff82b84110 r gmc_v9_0_irq_funcs -ffffffff82b84120 r gmc_v9_0_ecc_funcs -ffffffff82b84130 r gfxhub_client_ids -ffffffff82b841a0 r mmhub_client_ids_vega10 -ffffffff82b84490 r mmhub_client_ids_vega12 -ffffffff82b84790 r mmhub_client_ids_vega20 -ffffffff82b84a80 r mmhub_client_ids_arcturus -ffffffff82b86290 r mmhub_client_ids_raven -ffffffff82b86450 r mmhub_client_ids_renoir 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umc_v8_10_channelnum_map_colbit_table -ffffffff82bd1040 R umc_v8_10_channel_idx_tbl_ext0 -ffffffff82bd1080 R umc_v8_10_channel_idx_tbl -ffffffff82bd10e0 R umc_v8_10_ras_hw_ops -ffffffff82bd2000 R umc_v8_7_channel_idx_tbl -ffffffff82bd2040 R umc_v8_7_ras_hw_ops -ffffffff82bd3000 r uvd_v5_0_ip_funcs -ffffffff82bd30a0 R uvd_v5_0_ip_block -ffffffff82bd30b8 r uvd_v5_0_ring_funcs -ffffffff82bd31f8 r uvd_v5_0_irq_funcs -ffffffff82bd4000 r uvd_v6_0_ip_funcs -ffffffff82bd40a0 R uvd_v6_0_ip_block -ffffffff82bd40b8 R uvd_v6_2_ip_block -ffffffff82bd40d0 R uvd_v6_3_ip_block -ffffffff82bd40e8 r uvd_v6_0_ring_vm_funcs -ffffffff82bd4228 r uvd_v6_0_ring_phys_funcs -ffffffff82bd4368 r uvd_v6_0_enc_ring_vm_funcs -ffffffff82bd44a8 r uvd_v6_0_irq_funcs -ffffffff82bd5000 R uvd_v7_0_ip_funcs -ffffffff82bd50a0 R uvd_v7_0_ip_block -ffffffff82bd50b8 r uvd_v7_0_ring_vm_funcs -ffffffff82bd51f8 r uvd_v7_0_enc_ring_vm_funcs -ffffffff82bd5338 r uvd_v7_0_irq_funcs -ffffffff82bd6000 r vce_v3_0_ip_funcs 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vcn_v2_6_ras_hw_ops -ffffffff82bda1b0 r vcn_v2_5_dec_ring_vm_funcs -ffffffff82bda2f0 r vcn_v2_5_enc_ring_vm_funcs -ffffffff82bda430 r vcn_v2_5_irq_funcs -ffffffff82bda440 r vcn_v2_6_ras_irq_funcs -ffffffff82bdb000 r vcn_v3_0_ip_funcs -ffffffff82bdb0a0 R vcn_v3_0_ip_block -ffffffff82bdb0b8 r vcn_v3_0_dec_ring_vm_funcs -ffffffff82bdb1f8 r vcn_v3_0_enc_ring_vm_funcs -ffffffff82bdb338 r vcn_v3_0_irq_funcs -ffffffff82bdc000 r vcn_v4_0_ip_funcs -ffffffff82bdc0a0 R vcn_v4_0_ip_block -ffffffff82bdc0b8 R vcn_v4_0_ras_hw_ops -ffffffff82bdc0f8 r vcn_v4_0_irq_funcs -ffffffff82bdc108 r vcn_v4_0_ras_irq_funcs -ffffffff82bdd000 r vcn_v4_0_3_ip_funcs -ffffffff82bdd0a0 R vcn_v4_0_3_ip_block -ffffffff82bdd0b8 r vcn_v4_0_3_unified_ring_vm_funcs -ffffffff82bdd1f8 r vcn_v4_0_3_irq_funcs -ffffffff82bdd208 r vcn_v4_0_3_ras_hw_ops -ffffffff82bdd250 r vcn_v4_0_3_ue_reg_list -ffffffff82bde000 R vega10_ih_ip_funcs -ffffffff82bde0a0 R vega10_ih_ip_block -ffffffff82bde0b8 r vega10_ih_funcs -ffffffff82bde0d8 r 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mod_hdcp_hdcp2_prepare_eks +ffffffff822e9bf0 T mod_hdcp_hdcp2_enable_encryption +ffffffff822e9d60 T mod_hdcp_hdcp2_validate_rx_id_list +ffffffff822e9ee0 T mod_hdcp_hdcp2_enable_dp_stream_encryption +ffffffff822ea050 T mod_hdcp_hdcp2_prepare_stream_management +ffffffff822ea160 T mod_hdcp_hdcp2_validate_stream_ready +ffffffff822eb000 T mod_build_vsc_infopacket +ffffffff822eb270 T mod_build_hf_vsif_infopacket +ffffffff822eb3e0 T mod_build_adaptive_sync_infopacket +ffffffff822eb4a0 T mod_build_adaptive_sync_infopacket_v2 +ffffffff822eb510 T mod_build_adaptive_sync_infopacket_v1 +ffffffff822ec000 T dmub_init_abm_config +ffffffff822ec550 t fill_iram_v_2_3 +ffffffff822ec9e0 T dmcu_load_iram +ffffffff822ed1d0 T is_psr_su_specific_panel +ffffffff822ed270 T mod_power_calc_psr_configs +ffffffff822ed360 T init_replay_config +ffffffff822ed3b0 T mod_power_only_edp +ffffffff822ed400 T psr_su_set_dsc_slice_height +ffffffff822ed4e0 T fill_custom_backlight_caps +ffffffff822ee000 T mod_vmid_get_for_ptb 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amdgpu_dpm_set_clockgating_by_smu +ffffffff822efbe0 T amdgpu_dpm_smu_i2c_bus_access +ffffffff822efc80 T amdgpu_pm_acpi_event_handler +ffffffff822efd40 T amdgpu_dpm_read_sensor +ffffffff822efe00 T amdgpu_dpm_get_apu_thermal_limit +ffffffff822efea0 T amdgpu_dpm_set_apu_thermal_limit +ffffffff822eff40 T amdgpu_dpm_compute_clocks +ffffffff822f0040 T amdgpu_dpm_enable_uvd +ffffffff822f0230 T amdgpu_dpm_enable_vce +ffffffff822f0420 T amdgpu_dpm_enable_jpeg +ffffffff822f0520 T amdgpu_pm_load_smu_firmware +ffffffff822f05d0 T amdgpu_dpm_handle_passthrough_sbr +ffffffff822f0650 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff822f06d0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff822f0750 T amdgpu_dpm_get_dpm_freq_range +ffffffff822f07f0 T amdgpu_dpm_set_soft_freq_range +ffffffff822f0890 T amdgpu_dpm_write_watermarks_table +ffffffff822f0910 T amdgpu_dpm_wait_for_event +ffffffff822f09a0 T amdgpu_dpm_set_residency_gfxoff +ffffffff822f0a20 T amdgpu_dpm_get_residency_gfxoff +ffffffff822f0aa0 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff822f0b20 T amdgpu_dpm_get_status_gfxoff +ffffffff822f0ba0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff822f0bf0 T amdgpu_dpm_gfx_state_change +ffffffff822f0c60 T amdgpu_dpm_get_ecc_info +ffffffff822f0ce0 T amdgpu_dpm_get_vce_clock_state +ffffffff822f0d70 T amdgpu_dpm_get_current_power_state +ffffffff822f0de0 T amdgpu_dpm_set_power_state +ffffffff822f0f40 T amdgpu_dpm_dispatch_task +ffffffff822f0fe0 T amdgpu_dpm_get_performance_level +ffffffff822f1070 T amdgpu_dpm_force_performance_level +ffffffff822f1250 T amdgpu_dpm_get_pp_num_states +ffffffff822f12e0 T amdgpu_dpm_get_pp_table +ffffffff822f1370 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff822f1410 T amdgpu_dpm_odn_edit_dpm_table +ffffffff822f14b0 T amdgpu_dpm_print_clock_levels +ffffffff822f1540 T amdgpu_dpm_emit_clock_levels +ffffffff822f15e0 T amdgpu_dpm_set_ppfeature_status +ffffffff822f1670 T amdgpu_dpm_get_ppfeature_status +ffffffff822f1700 T amdgpu_dpm_force_clock_level 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pp_early_init +ffffffff822f7100 t pp_late_init +ffffffff822f7220 t pp_sw_init +ffffffff822f72b0 t pp_sw_fini +ffffffff822f7300 t pp_hw_init +ffffffff822f7360 t pp_hw_fini +ffffffff822f73d0 t pp_late_fini +ffffffff822f7430 t pp_suspend +ffffffff822f7480 t pp_resume +ffffffff822f74a0 t pp_is_idle +ffffffff822f74d0 t pp_wait_for_idle +ffffffff822f7500 t pp_sw_reset +ffffffff822f7530 t pp_set_clockgating_state +ffffffff822f7560 t pp_set_powergating_state +ffffffff822f7590 t pp_dpm_set_fan_control_mode +ffffffff822f7600 t pp_dpm_get_fan_control_mode +ffffffff822f7670 t pp_dpm_set_fan_speed_pwm +ffffffff822f76d0 t pp_dpm_get_fan_speed_pwm +ffffffff822f7730 t pp_dpm_force_clock_level +ffffffff822f7790 t pp_dpm_print_clock_levels +ffffffff822f77f0 t pp_dpm_emit_clock_levels +ffffffff822f7850 t pp_dpm_force_performance_level +ffffffff822f78f0 t pp_dpm_get_sclk_od +ffffffff822f7950 t pp_dpm_set_sclk_od +ffffffff822f79b0 t pp_dpm_get_mclk_od +ffffffff822f7a10 t pp_dpm_set_mclk_od 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pp_smu_i2c_bus_access +ffffffff822f8770 t pp_gfx_state_change_set +ffffffff822f87d0 t pp_dpm_get_sclk +ffffffff822f8820 t pp_dpm_get_mclk +ffffffff822f8870 t pp_display_configuration_change +ffffffff822f88c0 t pp_get_display_power_level +ffffffff822f8900 t pp_get_current_clocks +ffffffff822f8a20 t pp_get_clock_by_type +ffffffff822f8a70 t pp_get_clock_by_type_with_latency +ffffffff822f8ac0 t pp_get_clock_by_type_with_voltage +ffffffff822f8b10 t pp_set_watermarks_for_clocks_ranges +ffffffff822f8b50 t pp_display_clock_voltage_request +ffffffff822f8b90 t pp_get_display_mode_validation_clocks +ffffffff822f8bf0 t pp_notify_smu_enable_pwe +ffffffff822f8c50 t pp_enable_mgpu_fan_boost +ffffffff822f8cb0 t pp_set_active_display_count +ffffffff822f8cf0 t pp_set_hard_min_dcefclk_by_freq +ffffffff822f8d50 t pp_set_hard_min_fclk_by_freq +ffffffff822f8db0 t pp_set_min_deep_sleep_dcefclk +ffffffff822f8e10 t pp_get_asic_baco_capability +ffffffff822f8e80 t pp_get_asic_baco_state +ffffffff822f8ee0 t pp_set_asic_baco_state +ffffffff822f8f50 t pp_get_ppfeature_status +ffffffff822f8fb0 t pp_set_ppfeature_status +ffffffff822f9000 t pp_asic_reset_mode_2 +ffffffff822f9060 t pp_set_df_cstate +ffffffff822f90c0 t pp_set_xgmi_pstate +ffffffff822f9120 t pp_get_gpu_metrics +ffffffff822f9180 t pp_get_prv_buffer_details +ffffffff822f9200 t pp_pm_compute_clocks +ffffffff822f92c0 t pp_swctf_delayed_work_handler +ffffffff822f9400 t __delayed_work_tick +ffffffff822fa000 T ci_baco_set_state +ffffffff822fb000 T baco_program_registers +ffffffff822fb0d0 t baco_cmd_handler +ffffffff822fb250 T soc15_baco_program_registers +ffffffff822fc000 T fiji_baco_set_state +ffffffff822fd000 T phm_setup_asic +ffffffff822fd050 T phm_power_down_asic +ffffffff822fd0a0 T phm_set_power_state +ffffffff822fd110 T phm_enable_dynamic_state_management +ffffffff822fd1c0 T phm_disable_dynamic_state_management +ffffffff822fd260 T phm_force_dpm_levels +ffffffff822fd2b0 T phm_apply_state_adjust_rules +ffffffff822fd300 T phm_apply_clock_adjust_rules +ffffffff822fd350 T phm_powerdown_uvd +ffffffff822fd3a0 T phm_disable_clock_power_gatings +ffffffff822fd3f0 T phm_pre_display_configuration_changed +ffffffff822fd450 T phm_display_configuration_changed +ffffffff822fd4b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff822fd510 T phm_stop_thermal_controller +ffffffff822fd570 T phm_register_irq_handlers +ffffffff822fd5c0 T phm_start_thermal_controller +ffffffff822fd710 T phm_check_smc_update_required_for_display_configuration +ffffffff822fd770 T phm_check_states_equal +ffffffff822fd7c0 T phm_store_dal_configuration_data +ffffffff822fd910 T phm_get_dal_power_level +ffffffff822fd970 T phm_set_cpu_power_state +ffffffff822fd9c0 T phm_get_performance_level +ffffffff822fda20 T phm_get_clock_info +ffffffff822fdb90 T phm_get_current_shallow_sleep_clocks +ffffffff822fdbe0 T phm_get_clock_by_type +ffffffff822fdc30 T phm_get_clock_by_type_with_latency +ffffffff822fdc80 T phm_get_clock_by_type_with_voltage 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atomctrl_initialize_mc_reg_table +ffffffff82302210 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff82302420 T atomctrl_set_engine_dram_timings_rv770 +ffffffff82302490 T atomctrl_get_memory_pll_dividers_si +ffffffff82302570 T atomctrl_get_memory_pll_dividers_vi +ffffffff823025f0 T atomctrl_get_memory_pll_dividers_ai +ffffffff823026a0 T atomctrl_get_engine_pll_dividers_kong +ffffffff82302720 T atomctrl_get_engine_pll_dividers_vi +ffffffff823027f0 T atomctrl_get_engine_pll_dividers_ai +ffffffff823028d0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff82302990 T atomctrl_get_reference_clock +ffffffff823029f0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff82302ab0 T atomctrl_get_voltage_table_v3 +ffffffff82302c10 T atomctrl_get_pp_assign_pin +ffffffff82302cf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff823030c0 t GetScaledFraction +ffffffff82303150 t fDecodeLeakageID +ffffffff823031b0 t fSqrt +ffffffff82303230 T atomctrl_get_voltage_evv_on_sclk +ffffffff823032b0 T atomctrl_get_voltage_evv +ffffffff82303360 T atomctrl_get_mpll_reference_clock +ffffffff823033d0 T atomctrl_is_asic_internal_ss_supported +ffffffff82303420 T atomctrl_get_memory_clock_spread_spectrum +ffffffff82303520 T atomctrl_get_engine_clock_spread_spectrum +ffffffff82303620 T atomctrl_read_efuse +ffffffff823036d0 T atomctrl_set_ac_timing_ai +ffffffff82303730 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff823037b0 T atomctrl_get_smc_sclk_range_table +ffffffff82303860 T atomctrl_get_vddc_shared_railinfo +ffffffff823038d0 T atomctrl_get_avfs_information +ffffffff82303a60 T atomctrl_get_svi2_info +ffffffff82303b40 T atomctrl_get_leakage_id_from_efuse +ffffffff82303ba0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff82303d40 T atomctrl_get_voltage_range +ffffffff82303e00 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff82303e80 T atomctrl_get_edc_leakage_table +ffffffff82304000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff823040c0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff82304280 T pp_atomfwctrl_get_pp_assign_pin +ffffffff82304360 T pp_atomfwctrl_enter_self_refresh +ffffffff82304390 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff82304440 T pp_atomfwctrl_get_avfs_information +ffffffff82304780 T pp_atomfwctrl_get_gpio_information +ffffffff82304820 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff823048b0 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff82304c30 T pp_atomfwctrl_get_smc_dpm_information +ffffffff82305000 T encode_pcie_lane_width +ffffffff82305030 T decode_pcie_lane_width +ffffffff82306000 t pp_tables_v1_0_initialize +ffffffff82307450 t pp_tables_v1_0_uninitialize +ffffffff82307600 T get_number_of_powerplay_table_entries_v1_0 +ffffffff823076b0 T get_powerplay_table_entry_v1_0 +ffffffff82308000 T pp_tables_get_response_times +ffffffff823080d0 T pp_tables_get_num_of_entries +ffffffff82308190 T pp_tables_get_entry +ffffffff823084a0 t init_non_clock_fields +ffffffff823085e0 t pp_tables_initialize +ffffffff82309760 t pp_tables_uninitialize +ffffffff82309960 t get_number_of_vce_state_table_entries +ffffffff82309a50 t get_vce_state_table_entry +ffffffff8230a000 T smu10_init_function_pointers +ffffffff8230a040 t smu10_hwmgr_backend_init +ffffffff8230a6e0 t smu10_hwmgr_backend_fini +ffffffff8230a820 t smu10_setup_asic_task +ffffffff8230a890 t smu10_get_power_state_size +ffffffff8230a8c0 t smu10_apply_state_adjust_rules +ffffffff8230a8f0 t smu10_dpm_force_dpm_level +ffffffff8230ae70 t smu10_enable_dpm_tasks +ffffffff8230af30 t smu10_disable_dpm_tasks +ffffffff8230af60 t smu10_dpm_patch_boot_state +ffffffff8230af90 t smu10_dpm_get_pp_table_entry +ffffffff8230aff0 t smu10_dpm_get_num_of_pp_table_entries +ffffffff8230b040 t smu10_powergate_vcn +ffffffff8230b0e0 t smu10_dpm_get_mclk +ffffffff8230b140 t smu10_dpm_get_sclk +ffffffff8230b190 t smu10_set_power_state_tasks +ffffffff8230b200 t smu10_set_cpu_power_state +ffffffff8230b230 t smu10_store_cc6_data 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smu7_odn_initial_default_setting +ffffffff82318680 t smu7_set_dpm_event_sources +ffffffff823187a0 t smu7_get_pp_table_entry_callback_func_v0 +ffffffff82318c60 t smu7_get_pp_table_entry_callback_func_v1 +ffffffff8231a000 T smu7_enable_didt_config +ffffffff8231a3c0 t smu7_program_pt_config_registers +ffffffff8231a590 t smu7_enable_didt +ffffffff8231a780 T smu7_disable_didt_config +ffffffff8231a850 T smu7_enable_smc_cac +ffffffff8231a8e0 T smu7_disable_smc_cac +ffffffff8231a970 T smu7_set_power_limit +ffffffff8231a9d0 T smu7_enable_power_containment +ffffffff8231ab60 T smu7_disable_power_containment +ffffffff8231ac80 T smu7_power_control_set_level +ffffffff8231b000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff8231b080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff8231b150 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff8231b200 T smu7_fan_ctrl_set_static_mode +ffffffff8231b330 T smu7_fan_ctrl_set_default_mode +ffffffff8231b410 T smu7_fan_ctrl_start_smc_fan_control +ffffffff8231b540 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff8231b560 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff8231b740 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff8231b930 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff8231bb10 T smu7_thermal_get_temperature +ffffffff8231bb70 T smu7_thermal_disable_alert +ffffffff8231bc10 T smu7_thermal_stop_thermal_controller +ffffffff8231bd90 T smu7_start_thermal_controller +ffffffff8231c120 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff8231d000 T smu8_init_function_pointers +ffffffff8231d040 t smu8_hwmgr_backend_init +ffffffff8231d520 t smu8_hwmgr_backend_fini +ffffffff8231d5a0 t smu8_setup_asic_task +ffffffff8231dac0 t smu8_get_power_state_size +ffffffff8231daf0 t smu8_apply_state_adjust_rules +ffffffff8231dc40 t smu8_dpm_force_dpm_level +ffffffff8231df20 t smu8_enable_dpm_tasks +ffffffff8231e0b0 t smu8_disable_dpm_tasks +ffffffff8231e190 t smu8_dpm_patch_boot_state +ffffffff8231e1f0 t smu8_dpm_get_pp_table_entry +ffffffff8231e250 t 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smu9_baco_get_capability +ffffffff823200e0 T smu9_baco_get_state +ffffffff82321000 T convert_to_vid +ffffffff82321050 T convert_to_vddc +ffffffff82321090 T phm_copy_clock_limits_array +ffffffff82321170 T phm_copy_overdrive_settings_limits_array +ffffffff82321250 T phm_set_field_to_u32 +ffffffff823212b0 T phm_wait_on_register +ffffffff823213a0 T phm_wait_on_indirect_register +ffffffff823214b0 T phm_wait_for_register_unequal +ffffffff82321580 T phm_wait_for_indirect_register_unequal +ffffffff82321680 T phm_cf_want_uvd_power_gating +ffffffff823216c0 T phm_cf_want_vce_power_gating +ffffffff82321700 T phm_trim_voltage_table +ffffffff82321820 T phm_get_svi2_mvdd_voltage_table +ffffffff823219a0 T phm_get_svi2_vddci_voltage_table +ffffffff82321b20 T phm_get_svi2_vdd_voltage_table +ffffffff82321bc0 T phm_trim_voltage_table_to_fit_state_table +ffffffff82321cb0 T phm_reset_single_dpm_table +ffffffff82321d10 T phm_setup_pcie_table_entry +ffffffff82321d50 T phm_get_dpm_level_enable_mask_value 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vega10_thermal_stop_thermal_controller +ffffffff82333ff0 T vega10_enable_mgpu_fan_boost +ffffffff82334100 T vega10_start_thermal_controller +ffffffff823346c0 T vega10_thermal_ctrl_uninitialize_thermal_controller +ffffffff82335000 T vega12_baco_set_state +ffffffff82336000 T vega12_enable_disable_vce_dpm +ffffffff82336090 T vega12_hwmgr_init +ffffffff823360d0 t vega12_hwmgr_backend_init +ffffffff82336900 t vega12_hwmgr_backend_fini +ffffffff82336960 t vega12_setup_asic_task +ffffffff823369a0 t vega12_apply_clocks_adjust_rules +ffffffff82336d60 t vega12_dpm_force_dpm_level +ffffffff823371a0 t vega12_enable_dpm_tasks +ffffffff82337c70 t vega12_disable_dpm_tasks +ffffffff82337d70 t vega12_patch_boot_state +ffffffff82337da0 t vega12_power_gate_vce +ffffffff82337e50 t vega12_power_gate_uvd +ffffffff82337f00 t vega12_dpm_get_mclk +ffffffff82337f50 t vega12_dpm_get_sclk +ffffffff82337fa0 t vega12_notify_smc_display_config_after_ps_adjustment +ffffffff82338100 t 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navi10_get_uclk_dpm_states +ffffffff8237c450 t navi10_set_default_od_settings +ffffffff8237c6b0 t navi10_display_disable_memory_clock_switch +ffffffff8237c730 t navi10_get_power_limit +ffffffff8237c850 t navi10_update_pcie_parameters +ffffffff8237c9c0 t navi10_i2c_control_init +ffffffff8237caf0 t navi10_i2c_control_fini +ffffffff8237cb30 t navi10_init_smc_tables +ffffffff8237cd80 t navi10_setup_pptable +ffffffff8237cfa0 t navi10_baco_enter +ffffffff8237cff0 t navi10_baco_exit +ffffffff8237d0f0 t navi1x_get_gpu_metrics +ffffffff8237da90 t navi10_enable_mgpu_fan_boost +ffffffff8237db10 t navi10_get_fan_parameters +ffffffff8237db50 t navi10_post_smu_init +ffffffff8237ddd0 t navi10_get_default_config_table_settings +ffffffff8237de20 t navi10_set_config_table +ffffffff8237ded0 t navi1x_get_smu_metrics_data +ffffffff8237e560 t navi10_od_setting_check_range +ffffffff8237e610 t navi10_i2c_xfer +ffffffff8237e8b0 t navi10_i2c_func +ffffffff8237e8e0 t navi10_umc_hybrid_cdr_workaround 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+ffffffff823813d0 t sienna_cichlid_get_fan_speed_rpm +ffffffff823814e0 t sienna_cichlid_set_watermarks_table +ffffffff82381670 t sienna_cichlid_get_thermal_temperature_range +ffffffff82381750 t sienna_cichlid_get_uclk_dpm_states +ffffffff82381860 t sienna_cichlid_set_default_od_settings +ffffffff82381a10 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff82381a90 t sienna_cichlid_dump_pptable +ffffffff82381ac0 t sienna_cichlid_get_power_limit +ffffffff82381b90 t sienna_cichlid_update_pcie_parameters +ffffffff82381cc0 t sienna_cichlid_i2c_control_init +ffffffff82381df0 t sienna_cichlid_i2c_control_fini +ffffffff82381e30 t sienna_cichlid_get_unique_id +ffffffff82381f80 t sienna_cichlid_init_smc_tables +ffffffff823822a0 t sienna_cichlid_set_mp1_state +ffffffff823822e0 t sienna_cichlid_setup_pptable +ffffffff82382720 t sienna_cichlid_system_features_control +ffffffff823827b0 t sienna_cichlid_baco_enter +ffffffff82382800 t sienna_cichlid_baco_exit +ffffffff82382900 t sienna_cichlid_is_mode1_reset_supported +ffffffff82382980 t sienna_cichlid_is_mode2_reset_supported +ffffffff823829b0 t sienna_cichlid_mode2_reset +ffffffff82382af0 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff82382b10 t sienna_cichlid_get_gpu_metrics +ffffffff82383090 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff823830e0 t sienna_cichlid_get_fan_parameters +ffffffff82383120 t sienna_cichlid_gpo_control +ffffffff823831d0 t sienna_cichlid_get_ecc_info +ffffffff823832c0 t sienna_cichlid_stb_get_data_direct +ffffffff82383360 t sienna_cichlid_get_default_config_table_settings +ffffffff823833d0 t sienna_cichlid_set_config_table +ffffffff823834a0 t sienna_cichlid_get_throttler_status_locked +ffffffff82383600 t sienna_cichlid_get_smartshift_power_percentage +ffffffff82383730 t sienna_cichlid_i2c_xfer +ffffffff823839d0 t sienna_cichlid_i2c_func +ffffffff82384000 T smu_v11_0_init_microcode +ffffffff82384140 T smu_v11_0_fini_microcode +ffffffff82384190 T smu_v11_0_load_microcode +ffffffff823842d0 T smu_v11_0_check_fw_status +ffffffff82384320 T smu_v11_0_check_fw_version +ffffffff82384490 T smu_v11_0_setup_pptable +ffffffff823845b0 T smu_v11_0_init_smc_tables +ffffffff82384710 T smu_v11_0_fini_smc_tables +ffffffff82384940 T smu_v11_0_init_power +ffffffff823849d0 T smu_v11_0_fini_power +ffffffff82384a30 T smu_v11_0_get_vbios_bootup_values +ffffffff82384d90 T smu_v11_0_notify_memory_pool_location +ffffffff82384e80 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff82384f00 T smu_v11_0_set_driver_table_location +ffffffff82384f70 T smu_v11_0_set_tool_table_location +ffffffff82384fe0 T smu_v11_0_init_display_count +ffffffff82385040 T smu_v11_0_set_allowed_mask +ffffffff82385110 T smu_v11_0_system_features_control +ffffffff82385130 T smu_v11_0_notify_display_change +ffffffff823851a0 T smu_v11_0_init_max_sustainable_clocks +ffffffff82385400 t smu_v11_0_get_max_sustainable_clock +ffffffff82385520 T smu_v11_0_get_current_power_limit +ffffffff823855f0 T smu_v11_0_set_power_limit +ffffffff82385730 T smu_v11_0_interrupt_work +ffffffff823857b0 T smu_v11_0_enable_thermal_alert +ffffffff82385850 T smu_v11_0_disable_thermal_alert +ffffffff82385870 T smu_v11_0_get_gfx_vdd +ffffffff82385930 T smu_v11_0_display_clock_voltage_request +ffffffff82385a80 T smu_v11_0_set_hard_freq_limited_range +ffffffff82385b60 T smu_v11_0_gfx_off_control +ffffffff82385bd0 T smu_v11_0_get_fan_control_mode +ffffffff82385c20 T smu_v11_0_set_fan_speed_pwm +ffffffff82385dd0 t smu_v11_0_set_fan_static_mode +ffffffff82385f90 T smu_v11_0_set_fan_speed_rpm +ffffffff823860d0 T smu_v11_0_get_fan_speed_pwm +ffffffff82386210 T smu_v11_0_get_fan_speed_rpm +ffffffff82386310 T smu_v11_0_set_fan_control_mode +ffffffff823864b0 T smu_v11_0_set_xgmi_pstate +ffffffff823864d0 T smu_v11_0_register_irq_handler +ffffffff82386590 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff82386620 T smu_v11_0_set_azalia_d3_pme +ffffffff82386640 T smu_v11_0_baco_set_armd3_sequence +ffffffff82386660 T smu_v11_0_baco_is_support +ffffffff823866f0 T smu_v11_0_baco_get_state +ffffffff82386720 T smu_v11_0_baco_set_state +ffffffff823869d0 T smu_v11_0_baco_enter +ffffffff82386ac0 T smu_v11_0_baco_exit +ffffffff82386bf0 T smu_v11_0_mode1_reset +ffffffff82386c70 T smu_v11_0_handle_passthrough_sbr +ffffffff82386c90 T smu_v11_0_get_dpm_ultimate_freq +ffffffff82386dd0 T smu_v11_0_set_soft_freq_limited_range +ffffffff82386ea0 T smu_v11_0_set_performance_level +ffffffff823871f0 T smu_v11_0_set_power_source +ffffffff82387250 T smu_v11_0_get_dpm_freq_by_index +ffffffff82387300 T smu_v11_0_get_dpm_level_count +ffffffff823873a0 T smu_v11_0_set_single_dpm_table +ffffffff82387600 T smu_v11_0_get_dpm_level_range +ffffffff82387760 T smu_v11_0_get_current_pcie_link_width_level +ffffffff823877b0 T smu_v11_0_get_current_pcie_link_width +ffffffff82387810 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff82387860 T smu_v11_0_get_current_pcie_link_speed +ffffffff823878c0 T smu_v11_0_gfx_ulv_control +ffffffff82387930 T smu_v11_0_deep_sleep_control +ffffffff82387ae0 T smu_v11_0_restore_user_od_settings +ffffffff82387b70 T smu_v11_0_set_smu_mailbox_registers +ffffffff82387be0 t smu_v11_0_set_irq_state +ffffffff82388190 t smu_v11_0_irq_process +ffffffff82389000 T vangogh_set_ppt_funcs +ffffffff82389040 t vangogh_set_default_dpm_tables +ffffffff82389070 t vangogh_common_print_clk_levels +ffffffff823894e0 t vangogh_force_clk_levels +ffffffff82389710 t vangogh_od_edit_dpm_table +ffffffff82389c40 t vangogh_get_power_profile_mode +ffffffff82389d40 t vangogh_set_power_profile_mode +ffffffff82389e60 t vangogh_dpm_set_vcn_enable +ffffffff82389eb0 t vangogh_dpm_set_jpeg_enable +ffffffff82389f00 t vangogh_read_sensor +ffffffff8238a530 t vangogh_get_apu_thermal_limit +ffffffff8238a550 t vangogh_set_apu_thermal_limit +ffffffff8238a570 t vangogh_is_dpm_running +ffffffff8238a5d0 t vangogh_set_watermarks_table +ffffffff8238a750 t vangogh_set_performance_level +ffffffff8238af60 t vangogh_get_power_limit +ffffffff8238b0c0 t vangogh_get_ppt_limit +ffffffff8238b130 t vangogh_get_dpm_clock_table +ffffffff8238b2a0 t vangogh_init_smc_tables +ffffffff8238b4e0 t vangogh_system_features_control +ffffffff8238b530 t vangogh_set_power_limit +ffffffff8238b680 t vangogh_get_gfxoff_status +ffffffff8238b710 t vangogh_get_gfxoff_entrycount +ffffffff8238b780 t vangogh_set_gfxoff_residency +ffffffff8238b7f0 t vangogh_get_gfxoff_residency +ffffffff8238b830 t vangogh_mode2_reset +ffffffff8238b970 t vangogh_common_get_gpu_metrics +ffffffff8238c0f0 t vangogh_post_smu_init +ffffffff8238c280 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff8238c2f0 t vangogh_force_dpm_limit_value +ffffffff8238c420 t vangogh_get_dpm_ultimate_freq +ffffffff8238c7e0 t vangogh_set_soft_freq_limited_range +ffffffff8238c960 t vangogh_get_gpu_metrics_v2_3 +ffffffff8238d000 T renoir_set_ppt_funcs +ffffffff8238d0a0 t renoir_get_current_power_state +ffffffff8238d120 t renoir_print_clk_levels +ffffffff8238d530 t renoir_force_clk_levels +ffffffff8238d750 t renoir_od_edit_dpm_table +ffffffff8238da30 t renoir_get_power_profile_mode +ffffffff8238db00 t renoir_set_power_profile_mode +ffffffff8238dc20 t renoir_dpm_set_vcn_enable +ffffffff8238dca0 t renoir_dpm_set_jpeg_enable +ffffffff8238dd20 t renoir_read_sensor +ffffffff8238e0d0 t renoir_is_dpm_running +ffffffff8238e110 t renoir_set_watermarks_table +ffffffff8238e2b0 t renoir_set_performance_level +ffffffff8238e7d0 t renoir_get_dpm_clock_table +ffffffff8238eb20 t renoir_init_smc_tables +ffffffff8238ec90 t renoir_get_enabled_mask +ffffffff8238ecd0 t renoir_get_dpm_ultimate_freq +ffffffff8238ef70 t renoir_get_gpu_metrics +ffffffff8238f190 t renoir_gfx_state_change_set +ffffffff8238f1c0 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff8238f260 t renoir_force_dpm_limit_value +ffffffff82390000 T smu_v12_0_check_fw_status +ffffffff82390050 T smu_v12_0_check_fw_version +ffffffff823900c0 T smu_v12_0_powergate_sdma +ffffffff82390110 T smu_v12_0_set_gfx_cgpg +ffffffff82390170 T smu_v12_0_get_gfxoff_status +ffffffff82390200 T smu_v12_0_gfx_off_control +ffffffff82390320 T smu_v12_0_fini_smc_tables +ffffffff823903d0 T smu_v12_0_set_default_dpm_tables +ffffffff82390400 T smu_v12_0_mode2_reset +ffffffff82390420 T smu_v12_0_set_soft_freq_limited_range +ffffffff82390560 T smu_v12_0_set_driver_table_location +ffffffff823905d0 T smu_v12_0_get_vbios_bootup_values +ffffffff82391000 T aldebaran_set_ppt_funcs +ffffffff82391050 t aldebaran_get_allowed_feature_mask +ffffffff823910a0 t aldebaran_set_default_dpm_table +ffffffff823912a0 t aldebaran_populate_umd_state_clk +ffffffff823913a0 t aldebaran_print_clk_levels +ffffffff82391560 t aldebaran_force_clk_levels +ffffffff82391720 t aldebaran_usr_edit_dpm_table +ffffffff82391940 t aldebaran_read_sensor +ffffffff82391b60 t aldebaran_is_dpm_running +ffffffff82391bb0 t aldebaran_get_thermal_temperature_range +ffffffff82391c80 t aldebaran_set_performance_level +ffffffff82391d30 t aldebaran_get_power_limit +ffffffff82391ec0 t aldebaran_set_df_cstate +ffffffff82391f40 t aldebaran_allow_xgmi_power_down +ffffffff82391fe0 t aldebaran_i2c_control_init +ffffffff823920a0 t aldebaran_i2c_control_fini +ffffffff823920e0 t aldebaran_get_unique_id +ffffffff823921c0 t aldebaran_init_smc_tables +ffffffff82392380 t aldebaran_set_mp1_state +ffffffff823923c0 t aldebaran_setup_pptable +ffffffff82392490 t aldebaran_system_features_control +ffffffff823925f0 t aldebaran_set_power_limit +ffffffff82392680 t aldebaran_is_baco_supported +ffffffff823926b0 t aldebaran_is_mode1_reset_supported +ffffffff823926e0 t aldebaran_is_mode2_reset_supported +ffffffff82392710 t aldebaran_mode1_reset +ffffffff823927f0 t aldebaran_mode2_reset +ffffffff82392b10 t aldebaran_set_soft_freq_limited_range +ffffffff82392d10 t aldebaran_log_thermal_throttling_event +ffffffff82393020 t aldebaran_get_gpu_metrics +ffffffff823932a0 t aldebaran_smu_handle_passthrough_sbr +ffffffff823932c0 t aldebaran_smu_send_hbm_bad_page_num +ffffffff82393340 t aldebaran_get_ecc_info +ffffffff823934a0 t aldebaran_send_hbm_bad_channel_flag +ffffffff82393570 t aldebaran_get_current_clk_freq_by_table +ffffffff823936b0 t aldebaran_get_smu_metrics_data +ffffffff82393920 t aldebaran_upload_dpm_level +ffffffff82393a10 t aldebaran_i2c_xfer +ffffffff82393cb0 t aldebaran_i2c_func +ffffffff82394000 T smu_v13_0_init_microcode +ffffffff82394120 T smu_v13_0_fini_microcode +ffffffff82394170 T smu_v13_0_load_microcode +ffffffff823941a0 T smu_v13_0_init_pptable_microcode +ffffffff82394350 T smu_v13_0_get_pptable_from_firmware +ffffffff82394470 T smu_v13_0_check_fw_status +ffffffff823944e0 T smu_v13_0_check_fw_version +ffffffff82394560 T smu_v13_0_setup_pptable +ffffffff823946f0 T smu_v13_0_init_smc_tables +ffffffff82394870 T smu_v13_0_fini_smc_tables +ffffffff82394a80 T smu_v13_0_init_power +ffffffff82394b00 T smu_v13_0_fini_power +ffffffff82394b80 T smu_v13_0_get_vbios_bootup_values +ffffffff82394e20 T smu_v13_0_notify_memory_pool_location +ffffffff82394ee0 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff82394f60 T smu_v13_0_set_driver_table_location +ffffffff82394fd0 T smu_v13_0_set_tool_table_location +ffffffff82395040 T smu_v13_0_init_display_count +ffffffff82395080 T smu_v13_0_set_allowed_mask +ffffffff82395150 T smu_v13_0_gfx_off_control +ffffffff823951d0 T smu_v13_0_system_features_control +ffffffff823951f0 T smu_v13_0_notify_display_change +ffffffff82395250 T smu_v13_0_init_max_sustainable_clocks +ffffffff823954b0 t smu_v13_0_get_max_sustainable_clock +ffffffff823955d0 T smu_v13_0_get_current_power_limit +ffffffff823956a0 T smu_v13_0_set_power_limit +ffffffff823957b0 T smu_v13_0_enable_thermal_alert +ffffffff82395840 T smu_v13_0_disable_thermal_alert +ffffffff82395880 T smu_v13_0_get_gfx_vdd +ffffffff82395940 T smu_v13_0_display_clock_voltage_request +ffffffff82395a90 T smu_v13_0_set_hard_freq_limited_range +ffffffff82395b70 T smu_v13_0_get_fan_control_mode +ffffffff82395bc0 T smu_v13_0_set_fan_speed_pwm +ffffffff82395de0 t smu_v13_0_set_fan_static_mode +ffffffff82395fb0 T smu_v13_0_set_fan_control_mode +ffffffff82396110 T smu_v13_0_set_fan_speed_rpm +ffffffff823962c0 T smu_v13_0_set_xgmi_pstate +ffffffff823962e0 T smu_v13_0_register_irq_handler +ffffffff823963b0 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff82396440 T smu_v13_0_set_azalia_d3_pme +ffffffff82396460 T smu_v13_0_wait_for_event +ffffffff823964b0 T smu_v13_0_get_dpm_ultimate_freq +ffffffff82396610 T smu_v13_0_set_soft_freq_limited_range +ffffffff823966e0 T smu_v13_0_set_performance_level +ffffffff82396e40 T smu_v13_0_set_power_source +ffffffff82396ea0 T smu_v13_0_get_dpm_freq_by_index +ffffffff82396f50 T smu_v13_0_set_single_dpm_table +ffffffff82397240 T smu_v13_0_get_current_pcie_link_width_level +ffffffff82397290 T smu_v13_0_get_current_pcie_link_width +ffffffff823972f0 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff82397340 T smu_v13_0_get_current_pcie_link_speed +ffffffff82397390 T smu_v13_0_set_vcn_enable +ffffffff82397450 T smu_v13_0_set_jpeg_enable +ffffffff82397470 T smu_v13_0_run_btc +ffffffff823974f0 T smu_v13_0_gpo_control +ffffffff82397580 T smu_v13_0_deep_sleep_control +ffffffff823977e0 T smu_v13_0_gfx_ulv_control +ffffffff82397850 T smu_v13_0_baco_set_armd3_sequence +ffffffff823978c0 T smu_v13_0_baco_is_support +ffffffff82397950 T smu_v13_0_baco_get_state +ffffffff82397980 T smu_v13_0_baco_set_state +ffffffff82397a50 T smu_v13_0_baco_enter +ffffffff82397b70 T smu_v13_0_baco_exit +ffffffff82397c10 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff82397c50 T smu_v13_0_od_edit_dpm_table +ffffffff82397f00 T smu_v13_0_set_default_dpm_tables +ffffffff82397f30 T smu_v13_0_set_smu_mailbox_registers +ffffffff82397fa0 T smu_v13_0_mode1_reset +ffffffff82398020 T smu_v13_0_update_pcie_parameters +ffffffff82398290 t smu_v13_0_set_irq_state +ffffffff82398840 t smu_v13_0_irq_process +ffffffff82399000 T smu_v13_0_0_set_ppt_funcs +ffffffff823990f0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff82399230 t smu_v13_0_0_set_default_dpm_table +ffffffff82399650 t smu_v13_0_0_populate_umd_state_clk +ffffffff82399790 t smu_v13_0_0_print_clk_levels +ffffffff823998a0 t smu_v13_0_0_force_clk_levels +ffffffff82399a20 t smu_v13_0_0_od_edit_dpm_table +ffffffff82399ef0 t smu_v13_0_0_restore_user_od_settings +ffffffff82399fb0 t smu_v13_0_0_get_power_profile_mode +ffffffff8239a0b0 t smu_v13_0_0_set_power_profile_mode +ffffffff8239a300 t smu_v13_0_0_read_sensor +ffffffff8239a520 t smu_v13_0_0_is_dpm_running +ffffffff8239a570 t smu_v13_0_0_get_fan_speed_pwm +ffffffff8239a650 t smu_v13_0_0_get_fan_speed_rpm +ffffffff8239a6c0 t smu_v13_0_0_get_thermal_temperature_range +ffffffff8239a7c0 t smu_v13_0_0_set_default_od_settings +ffffffff8239a8f0 t smu_v13_0_0_dump_pptable +ffffffff8239a920 t smu_v13_0_0_get_power_limit +ffffffff8239aa00 t smu_v13_0_0_set_df_cstate +ffffffff8239aa20 t smu_v13_0_0_i2c_control_init +ffffffff8239ab50 t smu_v13_0_0_i2c_control_fini +ffffffff8239ab90 t smu_v13_0_0_get_unique_id +ffffffff8239ac30 t smu_v13_0_0_init_smc_tables +ffffffff8239ae80 t smu_v13_0_0_set_mp1_state +ffffffff8239aec0 t smu_v13_0_0_setup_pptable +ffffffff8239b020 t smu_v13_0_0_system_features_control +ffffffff8239b030 t smu_v13_0_0_baco_enter +ffffffff8239b090 t smu_v13_0_0_baco_exit +ffffffff8239b0f0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff8239b150 t smu_v13_0_0_mode1_reset +ffffffff8239b270 t smu_v13_0_0_mode2_reset +ffffffff8239b2c0 t smu_v13_0_0_enable_gfx_features +ffffffff8239b310 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff8239b430 t smu_v13_0_0_get_gpu_metrics +ffffffff8239b870 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff8239b8c0 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff8239b940 t smu_v13_0_0_get_ecc_info +ffffffff8239ba40 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff8239bac0 t smu_v13_0_0_i2c_xfer +ffffffff8239bd60 t smu_v13_0_0_i2c_func +ffffffff8239c000 T smu_v13_0_4_set_ppt_funcs +ffffffff8239c0c0 t smu_v13_0_4_print_clk_levels +ffffffff8239c130 t smu_v13_0_4_force_clk_levels +ffffffff8239c3f0 t smu_v13_0_4_read_sensor +ffffffff8239c6d0 t smu_v13_0_4_is_dpm_running +ffffffff8239c720 t smu_v13_0_4_set_watermarks_table +ffffffff8239c8a0 t smu_v13_0_4_set_performance_level +ffffffff8239d450 t smu_v13_0_4_init_smc_tables +ffffffff8239d5c0 t smu_v13_0_4_fini_smc_tables +ffffffff8239d670 t smu_v13_0_4_system_features_control +ffffffff8239d6c0 t smu_v13_0_4_mode2_reset +ffffffff8239d6e0 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff8239db00 t smu_v13_0_4_get_gpu_metrics +ffffffff8239dcd0 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff8239dd30 t smu_v13_0_4_get_current_clk_freq +ffffffff8239e000 T smu_v13_0_5_set_ppt_funcs +ffffffff8239e0a0 t smu_v13_0_5_set_default_dpm_tables +ffffffff8239e0d0 t smu_v13_0_5_print_clk_levels +ffffffff8239e160 t smu_v13_0_5_force_clk_levels +ffffffff8239e2d0 t smu_v13_0_5_od_edit_dpm_table +ffffffff8239e580 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff8239e5a0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff8239e5c0 t smu_v13_0_5_read_sensor +ffffffff8239e7e0 t smu_v13_0_5_is_dpm_running +ffffffff8239e830 t smu_v13_0_5_set_watermarks_table +ffffffff8239e9b0 t smu_v13_0_5_set_performance_level +ffffffff8239ef50 t smu_v13_0_5_init_smc_tables +ffffffff8239f0c0 t smu_v13_0_5_fini_smc_tables +ffffffff8239f170 t smu_v13_0_5_system_features_control +ffffffff8239f1c0 t smu_v13_0_5_mode2_reset +ffffffff8239f240 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff8239f680 t smu_v13_0_5_get_gpu_metrics +ffffffff8239f7d0 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff823a0000 T smu_v13_0_6_set_ppt_funcs +ffffffff823a0050 t smu_v13_0_6_get_allowed_feature_mask +ffffffff823a00a0 t smu_v13_0_6_set_default_dpm_table +ffffffff823a05a0 t smu_v13_0_6_populate_umd_state_clk +ffffffff823a06a0 t smu_v13_0_6_print_clk_levels +ffffffff823a0a10 t smu_v13_0_6_force_clk_levels +ffffffff823a0bd0 t smu_v13_0_6_usr_edit_dpm_table +ffffffff823a0df0 t smu_v13_0_6_read_sensor +ffffffff823a1380 t smu_v13_0_6_is_dpm_running +ffffffff823a1400 t smu_v13_0_6_get_thermal_temperature_range +ffffffff823a1550 t smu_v13_0_6_set_performance_level +ffffffff823a1660 t smu_v13_0_6_get_power_limit +ffffffff823a1730 t smu_v13_0_6_set_df_cstate +ffffffff823a1750 t smu_v13_0_6_allow_xgmi_power_down +ffffffff823a1770 t smu_v13_0_6_i2c_control_init +ffffffff823a18a0 t smu_v13_0_6_i2c_control_fini +ffffffff823a18e0 t smu_v13_0_6_get_unique_id +ffffffff823a1960 t smu_v13_0_6_init_smc_tables +ffffffff823a1af0 t smu_v13_0_6_check_fw_status +ffffffff823a1b40 t smu_v13_0_6_setup_pptable +ffffffff823a1b70 t smu_v13_0_6_system_features_control +ffffffff823a1c10 t smu_v13_0_6_get_enabled_mask +ffffffff823a1c80 t smu_v13_0_6_set_power_limit +ffffffff823a1ca0 t smu_v13_0_6_register_irq_handler +ffffffff823a1d00 t smu_v13_0_6_is_baco_supported +ffffffff823a1d30 t smu_v13_0_6_is_mode1_reset_supported +ffffffff823a1d60 t smu_v13_0_6_is_mode2_reset_supported +ffffffff823a1d90 t smu_v13_0_6_mode1_reset +ffffffff823a1e40 t smu_v13_0_6_mode2_reset +ffffffff823a20f0 t smu_v13_0_6_get_dpm_ultimate_freq +ffffffff823a2300 t smu_v13_0_6_set_soft_freq_limited_range +ffffffff823a2530 t smu_v13_0_6_log_thermal_throttling_event +ffffffff823a2820 t smu_v13_0_6_get_gpu_metrics +ffffffff823a2b70 t smu_v13_0_6_smu_send_hbm_bad_page_num +ffffffff823a2bf0 t smu_v13_0_6_get_smu_metrics_data +ffffffff823a2e80 t smu_v13_0_6_upload_dpm_level +ffffffff823a2f80 t smu_v13_0_6_i2c_xfer +ffffffff823a3280 t smu_v13_0_6_i2c_func +ffffffff823a32b0 t smu_v13_0_6_set_irq_state +ffffffff823a3540 t smu_v13_0_6_irq_process +ffffffff823a4000 T smu_v13_0_7_set_ppt_funcs +ffffffff823a4060 t smu_v13_0_7_get_allowed_feature_mask +ffffffff823a41d0 t smu_v13_0_7_set_default_dpm_table +ffffffff823a45f0 t smu_v13_0_7_populate_umd_state_clk +ffffffff823a4730 t smu_v13_0_7_print_clk_levels +ffffffff823a4840 t smu_v13_0_7_force_clk_levels +ffffffff823a49c0 t smu_v13_0_7_od_edit_dpm_table +ffffffff823a4e90 t smu_v13_0_7_restore_user_od_settings +ffffffff823a4f50 t smu_v13_0_7_get_power_profile_mode +ffffffff823a5090 t smu_v13_0_7_set_power_profile_mode +ffffffff823a52d0 t smu_v13_0_7_read_sensor +ffffffff823a54e0 t smu_v13_0_7_is_dpm_running +ffffffff823a5530 t smu_v13_0_7_get_fan_speed_pwm +ffffffff823a5610 t smu_v13_0_7_get_fan_speed_rpm +ffffffff823a5680 t smu_v13_0_7_get_thermal_temperature_range +ffffffff823a5780 t smu_v13_0_7_set_default_od_settings +ffffffff823a58b0 t smu_v13_0_7_dump_pptable +ffffffff823a58e0 t smu_v13_0_7_get_power_limit +ffffffff823a59c0 t smu_v13_0_7_set_df_cstate +ffffffff823a59e0 t smu_v13_0_7_init_smc_tables +ffffffff823a5bd0 t smu_v13_0_7_check_fw_status +ffffffff823a5c20 t smu_v13_0_7_set_mp1_state +ffffffff823a5c60 t smu_v13_0_7_setup_pptable +ffffffff823a5dc0 t smu_v13_0_7_baco_enter +ffffffff823a5e20 t smu_v13_0_7_baco_exit +ffffffff823a5e80 t smu_v13_0_7_is_mode1_reset_supported +ffffffff823a5ec0 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff823a5fe0 t smu_v13_0_7_get_gpu_metrics +ffffffff823a6410 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff823a7000 T yellow_carp_set_ppt_funcs +ffffffff823a7050 t yellow_carp_set_default_dpm_tables +ffffffff823a7080 t yellow_carp_print_clk_levels +ffffffff823a7100 t yellow_carp_force_clk_levels +ffffffff823a73c0 t yellow_carp_od_edit_dpm_table +ffffffff823a7670 t yellow_carp_dpm_set_vcn_enable +ffffffff823a7690 t yellow_carp_dpm_set_jpeg_enable +ffffffff823a76b0 t yellow_carp_read_sensor +ffffffff823a7a20 t yellow_carp_is_dpm_running +ffffffff823a7a70 t yellow_carp_set_watermarks_table +ffffffff823a7bf0 t yellow_carp_set_performance_level +ffffffff823a8680 t yellow_carp_init_smc_tables +ffffffff823a87f0 t yellow_carp_fini_smc_tables +ffffffff823a88a0 t yellow_carp_system_features_control +ffffffff823a88f0 t yellow_carp_get_gfxoff_status +ffffffff823a8980 t yellow_carp_mode2_reset +ffffffff823a8a00 t yellow_carp_get_dpm_ultimate_freq +ffffffff823a8e40 t yellow_carp_get_gpu_metrics +ffffffff823a8ff0 t yellow_carp_post_smu_init +ffffffff823a9070 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff823a90d0 t yellow_carp_get_current_clk_freq +ffffffff823a91d0 t yellow_carp_get_dpm_profile_freq +ffffffff823aa000 T smu_cmn_send_msg_without_waiting +ffffffff823aa170 T smu_cmn_wait_for_response +ffffffff823aa2a0 T smu_cmn_send_smc_msg_with_param +ffffffff823aa5b0 T smu_cmn_to_asic_specific_index +ffffffff823aa6e0 t __smu_cmn_reg_print_error +ffffffff823aa920 T smu_cmn_send_smc_msg +ffffffff823aa940 T smu_cmn_send_debug_smc_msg +ffffffff823aa9c0 T smu_cmn_send_debug_smc_msg_with_param +ffffffff823aaa40 T smu_cmn_feature_is_supported +ffffffff823aaaf0 T smu_cmn_feature_is_enabled +ffffffff823aabe0 T smu_cmn_clk_dpm_is_enabled +ffffffff823aace0 T smu_cmn_get_enabled_mask +ffffffff823aadd0 T smu_cmn_get_indep_throttler_status +ffffffff823aae80 T smu_cmn_feature_update_enable_state +ffffffff823aaf20 T smu_cmn_feature_set_enabled +ffffffff823aaff0 T smu_cmn_get_pp_feature_mask +ffffffff823ab1a0 T smu_cmn_set_pp_feature_mask +ffffffff823ab2a0 T smu_cmn_disable_all_features_with_exception +ffffffff823ab350 T smu_cmn_get_smc_version +ffffffff823ab420 T smu_cmn_update_table +ffffffff823ab580 T smu_cmn_write_watermarks_table +ffffffff823ab650 T smu_cmn_write_pptable +ffffffff823ab710 T smu_cmn_get_metrics_table +ffffffff823ab870 T smu_cmn_get_combo_pptable +ffffffff823ab940 T smu_cmn_init_soft_gpu_metrics +ffffffff823aba30 T smu_cmn_set_mp1_state +ffffffff823abad0 T smu_cmn_is_audio_func_enabled +ffffffff823ac000 T pci_mcfg_init +ffffffff823ac050 T pci_lookup_segment +ffffffff823ac0b0 T pci_attach_hook +ffffffff823ac0e0 T pci_bus_maxdevs +ffffffff823ac110 T pci_make_tag +ffffffff823ac180 T pci_decompose_tag +ffffffff823ac1e0 T pci_conf_size +ffffffff823ac240 T pci_mcfg_map_bus +ffffffff823ac2c0 T pci_conf_read +ffffffff823ac410 T pci_conf_write +ffffffff823ac550 T pci_msix_table_map +ffffffff823ac680 T pci_msix_table_unmap +ffffffff823ac720 T msi_hwmask +ffffffff823ac750 T msi_hwunmask +ffffffff823ac780 T msi_addroute +ffffffff823ac890 T msi_delroute +ffffffff823ac910 T msi_allocidtvec +ffffffff823aca60 T pci_intr_enable_msivec +ffffffff823acb40 T pci_intr_map_msi +ffffffff823acbf0 T pci_intr_map_msivec +ffffffff823acca0 T msix_hwmask +ffffffff823accd0 T msix_hwunmask +ffffffff823acd00 T msix_addroute +ffffffff823acef0 T msix_delroute +ffffffff823ad050 T pci_intr_map_msix +ffffffff823ad120 T pci_intr_map +ffffffff823ad350 T pci_intr_string +ffffffff823ad430 T pci_intr_establish +ffffffff823ad480 T pci_intr_establish_cpu +ffffffff823ad5d0 T pci_intr_disestablish +ffffffff823ad5f0 T pci_init_extents +ffffffff823ad7d0 T pci_probe_device_hook +ffffffff823ad810 T pci_dev_postattach +ffffffff823ad820 T pci_min_powerstate +ffffffff823ad830 T pci_set_powerstate_md +ffffffff823ae000 T pciide_machdep_compat_intr_establish +ffffffff823ae060 T pciide_machdep_compat_intr_disestablish +ffffffff823af000 T vga_post_init +ffffffff823af310 t vm86_emu_inb +ffffffff823af360 t vm86_emu_inw +ffffffff823af3a0 t vm86_emu_inl +ffffffff823af3e0 t vm86_emu_outb +ffffffff823af430 t vm86_emu_outw +ffffffff823af470 t vm86_emu_outl +ffffffff823af4b0 T vga_post_call +ffffffff823af520 T vga_post_free +ffffffff823af590 T ddb_vgapost +ffffffff823b0000 T pchbmatch +ffffffff823b0040 T pchbattach +ffffffff823b04a0 T pchbactivate +ffffffff823b0510 T pchb_amd64ht_attach +ffffffff823b0660 T pchb_rnd +ffffffff823b06e0 T pchb_print +ffffffff823b1000 T amas_match +ffffffff823b1050 T amas_attach +ffffffff823b10b0 T amas_intl_nodes +ffffffff823b1140 T amas_get_pagerange +ffffffff823b2000 T agp_flush_cache +ffffffff823b2030 T agp_flush_cache_range +ffffffff823b2040 T agp_init_map +ffffffff823b2110 T agp_destroy_map +ffffffff823b2150 T agp_map_subregion +ffffffff823b2180 T agp_unmap_subregion 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+ffffffff823b54e0 T decode_tuple +ffffffff823b6000 T cardbus_mapreg_map +ffffffff823b61a0 T cardbus_mapreg_unmap +ffffffff823b7000 T cardbus_read_exrom +ffffffff823b8000 T rbus_space_alloc +ffffffff823b8060 T rbus_space_alloc_subregion +ffffffff823b8230 T rbus_space_free +ffffffff823b82c0 T rbus_new_body +ffffffff823b8350 T rbus_new_root_delegate +ffffffff823b8420 T rbus_new_root_share +ffffffff823b9000 T com_cardbus_match +ffffffff823b9070 T com_cardbus_attach +ffffffff823b9220 T com_cardbus_detach +ffffffff823b92c0 T com_cardbus_find_csdev +ffffffff823b9440 T com_cardbus_gofigure +ffffffff823b9900 T com_cardbus_enable +ffffffff823b99d0 T com_cardbus_disable +ffffffff823b9a20 T com_cardbus_setup +ffffffff823ba000 T xl_cardbus_match +ffffffff823ba080 T xl_cardbus_attach +ffffffff823ba3f0 T xl_cardbus_detach +ffffffff823ba4b0 T xl_cardbus_lookup +ffffffff823ba560 T xl_cardbus_intr_ack +ffffffff823bb000 T dc_cardbus_match +ffffffff823bb030 T dc_cardbus_attach +ffffffff823bb3e0 T dc_cardbus_detach +ffffffff823bb480 T dc_cardbus_setup +ffffffff823bc000 T fxp_cardbus_match +ffffffff823bc030 T fxp_cardbus_attach +ffffffff823bc240 T fxp_cardbus_detach +ffffffff823bc2d0 T fxp_cardbus_setup +ffffffff823bd000 t rl_cardbus_match +ffffffff823bd030 t rl_cardbus_attach +ffffffff823bd1d0 t rl_cardbus_detach +ffffffff823bd290 T rl_cardbus_setup +ffffffff823be000 T re_cardbus_probe +ffffffff823be030 T re_cardbus_attach +ffffffff823be230 T re_cardbus_detach +ffffffff823be2b0 T re_cardbus_setup +ffffffff823bf000 T ath_cardbus_match +ffffffff823bf050 T ath_cardbus_attach +ffffffff823bf180 T ath_cardbus_detach +ffffffff823bf250 T ath_cardbus_enable +ffffffff823bf320 T ath_cardbus_disable +ffffffff823bf370 T ath_cardbus_power +ffffffff823bf3b0 T ath_cardbus_setup +ffffffff823c0000 T athn_cardbus_match +ffffffff823c0030 T athn_cardbus_attach +ffffffff823c0170 T athn_cardbus_detach +ffffffff823c0210 T athn_cardbus_enable +ffffffff823c02e0 T athn_cardbus_disable +ffffffff823c0330 T athn_cardbus_power +ffffffff823c0370 T athn_cardbus_read +ffffffff823c03a0 T athn_cardbus_write +ffffffff823c03d0 T athn_cardbus_write_barrier +ffffffff823c0400 T athn_cardbus_setup +ffffffff823c1000 T atw_cardbus_match +ffffffff823c1030 T atw_cardbus_attach +ffffffff823c1220 T atw_cardbus_detach +ffffffff823c12e0 T atw_cardbus_enable +ffffffff823c13b0 T atw_cardbus_disable +ffffffff823c1400 T atw_cardbus_power +ffffffff823c1440 T atw_cardbus_setup +ffffffff823c2000 T rtw_cardbus_match +ffffffff823c2030 T rtw_cardbus_attach +ffffffff823c2270 T rtw_cardbus_detach +ffffffff823c2390 T rtw_cardbus_intr_ack +ffffffff823c23b0 T rtw_cardbus_funcregen +ffffffff823c2410 T rtw_cardbus_enable +ffffffff823c2570 T rtw_cardbus_disable +ffffffff823c2650 T rtw_cardbus_power +ffffffff823c2690 T rtw_cardbus_setup +ffffffff823c3000 T ral_cardbus_match +ffffffff823c3030 T ral_cardbus_attach +ffffffff823c3230 T ral_cardbus_detach +ffffffff823c32e0 T ral_cardbus_activate +ffffffff823c3370 T ral_cardbus_enable +ffffffff823c34d0 T ral_cardbus_disable +ffffffff823c3520 T ral_cardbus_setup +ffffffff823c35c0 T ral_cardbus_wakeup +ffffffff823c4000 T acx_cardbus_match +ffffffff823c4030 T acx_cardbus_attach +ffffffff823c4260 T acx_cardbus_detach +ffffffff823c4380 T acx_cardbus_enable +ffffffff823c4450 T acx_cardbus_disable +ffffffff823c44a0 T acx_cardbus_power +ffffffff823c44e0 T acx_cardbus_setup +ffffffff823c5000 T pgt_cardbus_match +ffffffff823c5030 T pgt_cardbus_attach +ffffffff823c5230 T pgt_cardbus_detach +ffffffff823c52e0 T pgt_cardbus_enable +ffffffff823c5440 T pgt_cardbus_disable +ffffffff823c5490 T pgt_cardbus_power +ffffffff823c54f0 T pgt_cardbus_setup +ffffffff823c6000 T ehci_cardbus_match +ffffffff823c6040 T ehci_cardbus_attach +ffffffff823c62e0 T ehci_cardbus_detach +ffffffff823c7000 T ohci_cardbus_match +ffffffff823c7040 T ohci_cardbus_attach +ffffffff823c72e0 T ohci_cardbus_detach +ffffffff823c8000 T uhci_cardbus_match +ffffffff823c8040 T uhci_cardbus_attach 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pcmcia_submatch +ffffffff823cc6e0 T pcmcia_card_detach +ffffffff823cc790 T pcmcia_card_deactivate +ffffffff823cc800 T pcmcia_card_gettype +ffffffff823cc860 T pcmcia_function_init +ffffffff823cc8b0 T pcmcia_function_enable +ffffffff823ccce0 T pcmcia_function_disable +ffffffff823cce00 T pcmcia_io_map +ffffffff823cd040 T pcmcia_intr_establish +ffffffff823cd2b0 T pcmcia_card_intr +ffffffff823cd3d0 T pcmcia_intr_disestablish +ffffffff823cd5f0 T pcmcia_intr_string +ffffffff823ce000 T pcmcia_cis_read_1 +ffffffff823ce0f0 T pcmcia_read_cis +ffffffff823ce1e0 T pcmcia_scan_cis +ffffffff823cfcd0 T pcmcia_parse_cis_tuple +ffffffff823d0e60 T pcmcia_print_cis +ffffffff823d2000 T pcmcia_check_cis_quirks +ffffffff823d3000 T ep_pcmcia_match +ffffffff823d3110 T ep_pcmcia_attach +ffffffff823d3520 T ep_pcmcia_detach +ffffffff823d35c0 T ep_pcmcia_activate +ffffffff823d36a0 T ep_pcmcia_lookup +ffffffff823d37b0 T ep_pcmcia_enable1 +ffffffff823d3860 T ep_pcmcia_get_enaddr +ffffffff823d4000 T ne_pcmcia_match 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sm_pcmcia_match +ffffffff823d8100 T sm_pcmcia_attach +ffffffff823d8320 T sm_pcmcia_detach +ffffffff823d83c0 T sm_pcmcia_activate +ffffffff823d8450 T sm_pcmcia_funce_enaddr +ffffffff823d8470 T sm_pcmcia_ascii_enaddr +ffffffff823d8570 T sm_pcmcia_lannid_ciscallback +ffffffff823d8680 T sm_pcmcia_enable +ffffffff823d8720 T sm_pcmcia_disable +ffffffff823d9000 T xe_pcmcia_match +ffffffff823d9050 T xe_pcmcia_attach +ffffffff823d95e0 T xe_pcmcia_detach +ffffffff823d96a0 T xe_pcmcia_activate +ffffffff823d9990 T xe_pcmcia_interpret_manfid +ffffffff823d9a30 T xe_pcmcia_funce_enaddr +ffffffff823d9a50 T xe_ioctl +ffffffff823d9da0 T xe_start +ffffffff823da030 T xe_watchdog +ffffffff823da070 T xe_intr +ffffffff823da430 T xe_full_reset +ffffffff823daa00 T xe_mdi_read +ffffffff823db390 T xe_mdi_write +ffffffff823dbc90 T xe_statchg +ffffffff823dbcc0 T xe_mediachange +ffffffff823dbd50 T xe_mediastatus +ffffffff823dbdb0 T xe_init +ffffffff823dbe10 T xe_stop +ffffffff823dbf40 T xe_reset +ffffffff823dc0b0 T xe_pcmcia_lan_nid_ciscallback +ffffffff823dc200 T xe_pcmcia_manfid_ciscallback +ffffffff823dc320 T xe_get +ffffffff823dc5c0 T xe_set_address +ffffffff823dc870 T xe_cycle_power +ffffffff823dd000 T wi_pcmcia_match +ffffffff823dd130 T wi_pcmcia_attach +ffffffff823dd3e0 T wi_pcmcia_detach +ffffffff823dd4a0 T wi_pcmcia_activate +ffffffff823dd590 T wi_pcmcia_wakeup +ffffffff823de000 T malo_pcmcia_match +ffffffff823de050 T malo_pcmcia_attach +ffffffff823de220 T malo_pcmcia_detach +ffffffff823de2b0 T malo_pcmcia_activate +ffffffff823de520 T cmalo_intr +ffffffff823de780 T cmalo_attach +ffffffff823dec80 T cmalo_detach +ffffffff823ded60 T cmalo_stop +ffffffff823deea0 T malo_pcmcia_wakeup +ffffffff823def40 T cmalo_init +ffffffff823df250 T cmalo_intr_mask +ffffffff823df2e0 T cmalo_fw_alloc +ffffffff823df3b0 T cmalo_fw_load_helper +ffffffff823df620 T cmalo_fw_load_main +ffffffff823dfa80 T cmalo_cmd_get_hwspec +ffffffff823dfbd0 T cmalo_ioctl +ffffffff823dfff0 T cmalo_start +ffffffff823e0090 T cmalo_watchdog +ffffffff823e00c0 T cmalo_newstate +ffffffff823e03b0 T cmalo_media_change +ffffffff823e0410 T cmalo_cmd_set_scan +ffffffff823e05e0 T cmalo_fw_free +ffffffff823e0660 T cmalo_cmd_set_macctrl +ffffffff823e07c0 T cmalo_cmd_set_txpower +ffffffff823e0920 T cmalo_cmd_set_antenna +ffffffff823e0a80 T cmalo_cmd_set_radio +ffffffff823e0be0 T cmalo_cmd_set_channel +ffffffff823e0d40 T cmalo_cmd_set_rate +ffffffff823e0f60 T cmalo_cmd_set_snmp +ffffffff823e10e0 T cmalo_cmd_set_macaddr +ffffffff823e1240 T cmalo_wep +ffffffff823e12f0 T cmalo_cmd_set_reset +ffffffff823e13f0 T cmalo_select_network +ffffffff823e1530 T cmalo_cmd_set_auth +ffffffff823e15f0 T cmalo_cmd_set_assoc +ffffffff823e1950 T cmalo_reflect_network +ffffffff823e1a40 T cmalo_tx_done +ffffffff823e1b00 T cmalo_rx +ffffffff823e1d00 T cmalo_cmd_response +ffffffff823e1f30 T cmalo_event +ffffffff823e1fa0 T cmalo_tx +ffffffff823e2180 T cmalo_cmd_set_wep +ffffffff823e23d0 T cmalo_rate2bitmap +ffffffff823e2410 T cmalo_hexdump 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tcpcib_wdt_cb +ffffffff823e7000 T aapic_match +ffffffff823e7040 T aapic_attach +ffffffff823e8000 T hme_config +ffffffff823e84c0 T hme_stop +ffffffff823e86d0 T hme_start +ffffffff823e89f0 T hme_ioctl +ffffffff823e8ba0 T hme_watchdog +ffffffff823e8c00 t hme_mii_readreg +ffffffff823e8d80 t hme_mii_writereg +ffffffff823e8f00 t hme_mii_statchg +ffffffff823e8fa0 T hme_mediachange +ffffffff823e9090 T hme_mediastatus +ffffffff823e9100 T hme_mifinit +ffffffff823e91c0 T hme_tick +ffffffff823e92f0 T hme_unconfig +ffffffff823e93e0 T hme_fill_rx_ring +ffffffff823e9580 T hme_reset +ffffffff823e95c0 T hme_init +ffffffff823e9ad0 T hme_meminit +ffffffff823e9c30 T hme_iff +ffffffff823e9de0 T hme_tint +ffffffff823e9f30 T hme_rint +ffffffff823ea0f0 T hme_eint +ffffffff823ea190 T hme_intr +ffffffff823ea290 T hme_newbuf +ffffffff823eb000 T hmematch_pci +ffffffff823eb040 T hmeattach_pci +ffffffff823eb300 T hmedetach_pci +ffffffff823eb380 T hme_pci_enaddr +ffffffff823ec000 T isamatch +ffffffff823ec050 T isaattach +ffffffff823ec180 T isascan +ffffffff823ec5a0 T isaprint +ffffffff823ec760 T isa_intr_typename +ffffffff823ed000 T isadmamatch +ffffffff823ed040 T isadmaattach +ffffffff823ed230 T isa_dmacascade +ffffffff823ed320 T isa_dmamap_create +ffffffff823ed400 T isa_dmamap_destroy +ffffffff823ed470 T isa_dmastart +ffffffff823ed8a0 T isa_dmaabort +ffffffff823ed9a0 T isa_dmacount +ffffffff823edb60 T isa_dmafinished +ffffffff823edc20 T isa_dmadone +ffffffff823eddb0 T isa_dmamem_alloc +ffffffff823ede80 T isa_dmamem_free +ffffffff823edf00 T isa_dmamem_map +ffffffff823edf80 T isa_dmamem_unmap +ffffffff823edfc0 T isa_dmamem_mmap +ffffffff823ee060 T isa_drq_isfree +ffffffff823ee0d0 T isa_malloc +ffffffff823ee280 T isa_free +ffffffff823ee3b0 T isa_mappage +ffffffff823ef000 T fdcprobe +ffffffff823ef270 T fdcattach +ffffffff823ef3b0 T out_fdc +ffffffff823ef480 T fdcintr +ffffffff823ef490 T fdc_create_kthread +ffffffff823ef500 T fdcattach_deferred +ffffffff823ef5c0 T fdcpseudointr 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vga_isa_attach +ffffffff823f5130 T vga_isa_cnattach +ffffffff823f6000 T wdc_isa_probe +ffffffff823f6130 T wdc_isa_attach +ffffffff823f6350 t wdc_isa_dma_init +ffffffff823f63c0 t wdc_isa_dma_start +ffffffff823f63f0 t wdc_isa_dma_finish +ffffffff823f7000 T mpu_open +ffffffff823f7150 T mpu_close +ffffffff823f7260 T mpu_output +ffffffff823f7370 T mpu_getinfo +ffffffff823f73b0 T mpu_find +ffffffff823f7500 T mpu_reset +ffffffff823f7610 T mpu_readinput +ffffffff823f76a0 T mpu_intr +ffffffff823f8000 T mpu_isa_match +ffffffff823f8060 T mpu_isa_attach +ffffffff823f80f0 T mpu_test +ffffffff823f9000 T pcppi_match +ffffffff823f91d0 T pcppi_attach +ffffffff823f92e0 t pcppi_bell_stop +ffffffff823f9370 T pcppi_kbd_bell +ffffffff823f93a0 T pcppi_bell +ffffffff823fa000 T spkrprobe +ffffffff823fa040 T spkrattach +ffffffff823fa0a0 T spkropen +ffffffff823fa160 T spkrwrite +ffffffff823fa900 T spkrclose +ffffffff823fa980 T spkrioctl +ffffffff823fab40 t rest +ffffffff823faba0 t playtone +ffffffff823fb000 T lpt_isa_probe +ffffffff823fb430 T lpt_isa_attach +ffffffff823fc000 T wbsio_probe +ffffffff823fc160 T wbsio_attach +ffffffff823fc540 T wbsio_print +ffffffff823fd000 T schsio_probe +ffffffff823fd120 T schsio_attach +ffffffff823fd300 T schsio_activate +ffffffff823fd340 T schsio_config_read +ffffffff823fd380 T schsio_config_write +ffffffff823fd3d0 T schsio_wdt_init +ffffffff823fd4e0 T schsio_hwm_init +ffffffff823fd800 T schsio_hwm_update +ffffffff823fdd70 T schsio_hwm_read +ffffffff823fddc0 T schsio_wdt_cb +ffffffff823fe000 T lm_isa_match +ffffffff823fe1b0 T lm_isa_attach +ffffffff823fe380 T lm_wbsio_match +ffffffff823fe540 T lm_isa_writereg +ffffffff823fe5a0 T lm_isa_readreg +ffffffff823fe600 T lm_isa_remove_alias +ffffffff823ff000 T it_match +ffffffff823ff2e0 T it_enter +ffffffff823ff370 T it_readreg +ffffffff823ff3b0 T it_writereg +ffffffff823ff400 T it_exit +ffffffff823ff450 T it_attach +ffffffff823ffa90 T it_wdog_cb +ffffffff823ffd10 T it_ec_refresh +ffffffff82400340 T it_ec_writereg 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allocate_copybuffer +ffffffff82405a60 T wsdisplay_getscreen +ffffffff82405b10 T wsdisplay_closescreen +ffffffff82405c70 T wsdisplayopen +ffffffff82405e40 T wsdisplay_delscreen +ffffffff82405f90 T wsdisplay_update_rawkbd +ffffffff82406080 T wsdisplay_common_attach +ffffffff82406410 T wsdisplay_common_detach +ffffffff82406640 T wsdisplay_switchtoconsole +ffffffff824066b0 T wsemuldisplaydevprint +ffffffff82406700 T wsemuldisplaydevsubmatch +ffffffff82406750 T wsdisplay_burner +ffffffff82406820 T wsdisplay_burn +ffffffff824068a0 T wsdisplay_cnattach +ffffffff824069f0 T wsdisplaystart +ffffffff82406c10 T wsdisplayparam +ffffffff82406c60 T wsdisplayclose +ffffffff82406de0 T wsdisplay_kbdholdscr +ffffffff82406e40 T wsdisplay_internal_ioctl +ffffffff824074f0 T wsdisplayread +ffffffff82407570 T wsdisplaywrite +ffffffff824075f0 T wsdisplaytty +ffffffff82407660 T wsdisplayioctl +ffffffff82407800 T wsdisplay_cfg_ioctl +ffffffff82407b90 T wsdisplay_param +ffffffff82407c10 T wsdisplay_driver_ioctl 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wsevent_read +ffffffff8240d360 T wsevent_kqfilter +ffffffff8240e000 T wskbd_match +ffffffff8240e050 T wskbd_attach +ffffffff8240e410 T wskbd_detach +ffffffff8240e660 T wskbd_activate +ffffffff8240e6a0 T wskbd_mux_open +ffffffff8240e770 T wskbd_mux_close +ffffffff8240e800 T wskbd_do_ioctl +ffffffff8240e870 T wskbd_displayioctl +ffffffff8240e890 T wskbd_set_display +ffffffff8240e9d0 T wskbd_update_layout +ffffffff8240ea10 T wskbddevprint +ffffffff8240ea60 T wskbd_kbd_backlight_task +ffffffff8240eb30 T wskbd_repeat +ffffffff8240ebd0 T wskbd_brightness_task +ffffffff8240ec40 T wskbd_set_keymap +ffffffff8240ecc0 T wskbd_cnattach +ffffffff8240edb0 T wskbd_cngetc +ffffffff8240eec0 T wskbd_cnpollc +ffffffff8240ef20 T wskbd_cnbell +ffffffff8240ef70 T wskbd_cndetach +ffffffff8240f010 T wskbd_deliver_event +ffffffff8240f130 T wskbdopen +ffffffff8240f210 T wskbd_input +ffffffff8240f370 T wskbd_translate +ffffffff8240fab0 T wskbd_rawinput +ffffffff8240faf0 T wskbd_enable +ffffffff8240fb90 T wskbd_do_open +ffffffff8240fc50 T wskbdclose +ffffffff8240fd60 T wskbdread +ffffffff8240fe20 T wskbdioctl +ffffffff8240fea0 T wskbd_do_ioctl_sc +ffffffff8240ff80 T wskbd_displayioctl_sc +ffffffff824107b0 T wskbdkqfilter +ffffffff82410810 T wskbd_pickfree +ffffffff82410880 T wskbd_set_console_display +ffffffff824108d0 T wskbd_add_mux +ffffffff82410950 T update_leds +ffffffff82410a00 T update_modifier +ffffffff82410af0 T change_displayparam +ffffffff82410bb0 T internal_command +ffffffff82410f90 T wskbd_debugger +ffffffff82411000 T wskbd_compose_value +ffffffff824111a0 T ksym_upcase +ffffffff82411220 T fillmapentry +ffffffff824113b0 T wskbd_get_mapentry +ffffffff824115d0 T wskbd_init_keymap +ffffffff82411670 T wskbd_load_keymap +ffffffff82412000 T wsmouse_match +ffffffff82412030 T wsmouse_attach +ffffffff824120d0 T wsmouse_detach +ffffffff824122b0 T wsmouse_activate +ffffffff824122f0 T wsmouse_mux_open +ffffffff824124a0 T wsmouse_mux_close +ffffffff82412500 T wsmousedoioctl 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wstpad_tap +ffffffff824174a0 T wstpad_tap_sync +ffffffff82417500 T wstpad_tap_timeout +ffffffff82417730 T wstpad_click +ffffffff824177d0 T wstpad_cmds +ffffffff82417a40 T wstpad_mt_inputs +ffffffff82417db0 T wstpad_mt_masks +ffffffff82418130 T wstpad_touch_inputs +ffffffff82418340 T wstpad_process_input +ffffffff82418650 T wstpad_track_interval +ffffffff824187b0 T wstpad_init_deceleration +ffffffff82418880 T wstpad_decelerate +ffffffff824189f0 T wstpad_filter +ffffffff82418cd0 T wstpad_compat_convert +ffffffff82418d70 T wstpad_init +ffffffff82418ed0 T wstpad_configure +ffffffff824194c0 t isqrt +ffffffff824196b0 T wstpad_reset +ffffffff82419730 T wstpad_cleanup +ffffffff824197c0 T wstpad_set_param +ffffffff82419ae0 T wstpad_get_param +ffffffff8241a000 T wsmux_mux_open +ffffffff8241a120 T wsmux_mux_close +ffffffff8241a1e0 T wsmux_do_ioctl +ffffffff8241a760 T wsmux_do_displayioctl +ffffffff8241a880 T wsmux_evsrc_set_display +ffffffff8241a8d0 T wsmuxattach +ffffffff8241a900 T wsmux_getmux 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T alps_get_hwinfo +ffffffff8242be20 T elantech_set_absolute_mode_v1 +ffffffff8242c0e0 T elantech_set_absolute_mode_v2 +ffffffff8242c600 T elantech_ps2_cmd +ffffffff8242c690 T elantech_set_absolute_mode_v3 +ffffffff8242cb00 T elantech_set_absolute_mode_v4 +ffffffff8242cd30 T elantech_get_hwinfo_v1 +ffffffff8242cf30 T elantech_get_hwinfo_v2 +ffffffff8242d240 T elantech_get_hwinfo_v3 +ffffffff8242d450 T elantech_get_hwinfo_v4 +ffffffff8242d6c0 T elantech_knock +ffffffff8242e000 T wscnprobe +ffffffff8242e0a0 T wscninit +ffffffff8242e150 T wscn_video_init +ffffffff8242e1c0 T wscn_input_init +ffffffff8242e230 T wscnputc +ffffffff8242e240 T wscngetc +ffffffff8242e250 T wscnpollc +ffffffff8242f000 T skgpio_match +ffffffff8242f100 T skgpio_attach +ffffffff8242f350 T skgpio_gpio_read +ffffffff8242f3a0 T skgpio_gpio_write +ffffffff8242f410 T skgpio_gpio_ctl +ffffffff8242f4a0 T skgpio_led_read +ffffffff8242f4f0 T skgpio_led_write +ffffffff8242f520 T skgpio_led_ctl +ffffffff82430000 T pctrattach +ffffffff82430080 T pctropen +ffffffff824300d0 T pctrclose +ffffffff82430100 T pctrioctl +ffffffff824303d0 T pctr_reload +ffffffff82430510 T pctr_resume +ffffffff82431000 T nvramattach +ffffffff824310a0 T nvram_csum_valid +ffffffff82431130 T nvramopen +ffffffff82431180 T nvramclose +ffffffff824311b0 T nvramread +ffffffff824312d0 T nvram_get_byte +ffffffff82432000 T hid_start_parse +ffffffff82432070 T hid_end_parse +ffffffff824320b0 T hid_get_item +ffffffff82432c60 T hid_report_size +ffffffff82432db0 T hid_locate +ffffffff82432f20 T hid_get_data_sub +ffffffff82433040 T hid_get_data +ffffffff82433150 T hid_get_udata +ffffffff82433260 T hid_is_collection +ffffffff82433370 T hid_get_collection_data +ffffffff82433440 T hid_get_id_of_collection +ffffffff82434000 T hidkbd_attach +ffffffff824340f0 T hidkbd_parse_desc +ffffffff82434430 T hidkbd_delayed_decode +ffffffff82434450 T hidkbd_attach_wskbd +ffffffff824344e0 T hidkbd_detach +ffffffff82434580 T hidkbd_translate +ffffffff824345d0 T hidkbd_apple_translate +ffffffff82434680 T hidkbd_apple_munge +ffffffff82434870 T hidkbd_apple_tb_munge +ffffffff82434940 T hidkbd_apple_iso_munge +ffffffff82434a30 T hidkbd_apple_mba_munge +ffffffff82434b90 T hidkbd_apple_iso_mba_munge +ffffffff82434dd0 T hidkbd_input +ffffffff82434ef0 T hidkbd_decode +ffffffff82435280 T hidkbd_enable +ffffffff824352c0 T hidkbd_set_leds +ffffffff824353a0 T hidkbd_ioctl +ffffffff82435440 T hidkbd_bell +ffffffff82435490 T hidkbd_cngetc +ffffffff82435520 T hidkbd_hookup_bell +ffffffff82436000 T hidms_stylus_hid_parse +ffffffff82436320 T hidms_pad_buttons_hid_parse +ffffffff82436400 T hidms_wacom_setup +ffffffff82436710 T hidms_setup +ffffffff82436cb0 T hidms_attach +ffffffff82436e00 T hidms_detach +ffffffff82436e40 T hidms_input +ffffffff824370f0 T hidms_enable +ffffffff82437140 T hidms_ioctl +ffffffff82437310 T hidms_disable +ffffffff82438000 T hidmt_get_resolution +ffffffff82438110 T hidmt_setup +ffffffff824387b0 T hidmt_set_input_mode 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usb_match +ffffffff8243c030 T usb_attach +ffffffff8243c330 T usb_detach +ffffffff8243c3e0 T usb_activate +ffffffff8243c4f0 T usb_create_task_threads +ffffffff8243c590 T usb_explore +ffffffff8243c730 T usb_attach_roothub +ffffffff8243c7d0 T usb_needs_explore +ffffffff8243c820 T usb_detach_roothub +ffffffff8243c910 T usb_wait_task +ffffffff8243c9b0 T usb_abort_task_thread +ffffffff8243caa0 T usb_task_thread +ffffffff8243cbc0 T usb_add_task +ffffffff8243cc80 T usb_rem_task +ffffffff8243cd40 T usb_rem_wait_task +ffffffff8243ce50 T usbctlprint +ffffffff8243cea0 T usbopen +ffffffff8243cf10 T usbclose +ffffffff8243cf40 T usb_fill_udc_task +ffffffff8243cfe0 T usb_fill_udf_task +ffffffff8243d050 T usbioctl +ffffffff8243d6b0 T usb_needs_reattach +ffffffff8243d700 T usb_schedsoftintr +ffffffff8243d7d0 T usb_tap +ffffffff8243e000 T usbd_is_dying +ffffffff8243e040 T usbd_deactivate +ffffffff8243e070 T usbd_ref_incr +ffffffff8243e0a0 T usbd_ref_decr +ffffffff8243e0e0 T usbd_ref_wait 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usbd_clear_endpoint_toggle +ffffffff8243f380 T usbd_do_request +ffffffff8243f3a0 T usbd_clear_endpoint_stall_async +ffffffff8243f460 T usbd_request_async +ffffffff8243f570 T usbd_device2interface_handle +ffffffff8243f600 T usbd_set_interface +ffffffff8243f6e0 T usbd_get_no_alts +ffffffff8243f750 T usbd_get_interface_altindex +ffffffff8243f780 T usbd_start_next +ffffffff8243f850 T usb_insert_transfer +ffffffff8243f900 T usbd_do_request_flags +ffffffff8243fb80 T usbd_request_async_cb +ffffffff8243fc00 T usbd_get_quirks +ffffffff8243fc50 T usbd_set_polling +ffffffff8243fcb0 T usbd_get_endpoint_descriptor +ffffffff8243fd10 T usbd_ratecheck +ffffffff8243fd30 T usbd_match_device +ffffffff8243fda0 T usbd_desc_iter_init +ffffffff8243fe00 T usbd_desc_iter_next +ffffffff8243fe80 T usbd_str +ffffffff82440000 T usbd_get_desc +ffffffff82440070 T usbd_get_device_status +ffffffff824400c0 T usbd_get_hub_descriptor +ffffffff82440130 T usbd_get_hub_ss_descriptor +ffffffff824401a0 T usbd_get_port_status +ffffffff824401f0 T usbd_set_hub_depth +ffffffff82440240 T usbd_clear_port_feature +ffffffff82440290 T usbd_clear_endpoint_feature +ffffffff824402e0 T usbd_set_port_feature +ffffffff82440330 T usbd_set_idle +ffffffff82440390 T usbd_get_report_descriptor +ffffffff824403e0 T usbd_get_hid_descriptor +ffffffff82440460 T usbd_get_config +ffffffff824404b0 T usb_detach_wait +ffffffff82440530 T usb_detach_wakeup +ffffffff82441000 T usb_block_allocmem +ffffffff82441250 T usb_block_freemem +ffffffff824412b0 T usb_allocmem +ffffffff82441500 T usb_freemem +ffffffff824415c0 T usb_syncmem +ffffffff82442000 T usbd_errstr +ffffffff82442070 T usbd_get_string_desc +ffffffff82442130 T usbd_get_string +ffffffff82442330 T usbd_cache_devinfo +ffffffff82442670 T usbd_printBCD +ffffffff824426f0 T usbd_devinfo +ffffffff82442880 T usb_delay_ms +ffffffff824428e0 T usbd_delay_ms +ffffffff824429a0 T usbd_port_disown_to_1_1 +ffffffff82442ac0 T usbd_reset_port +ffffffff82442c80 T usbd_find_idesc +ffffffff82442d30 T usbd_find_edesc +ffffffff82442e50 T usbd_fill_iface_data +ffffffff824430c0 T usbd_parse_idesc +ffffffff824431f0 T usbd_free_iface_data +ffffffff82443260 T usbd_set_config +ffffffff824432b0 T usbd_set_config_no +ffffffff82443360 T usbd_set_config_index +ffffffff82443840 T usbd_setup_pipe +ffffffff82443930 T usbd_set_address +ffffffff824439f0 T usbd_getnewaddr +ffffffff82443a70 T usbd_probe_and_attach +ffffffff82443fd0 T usbd_print +ffffffff824440e0 T usbd_new_device +ffffffff824448b0 T usbd_reload_device_desc +ffffffff82444920 T usb_free_device +ffffffff82444a70 T usbd_fill_deviceinfo +ffffffff82444e10 T usbd_get_routestring +ffffffff82444ea0 T usbd_get_location +ffffffff82444fb0 T usbd_get_cdesc +ffffffff824450e0 T usbd_detach +ffffffff82446000 T usbd_find_quirk +ffffffff82447000 T uhub_match +ffffffff82447060 T uhub_attach +ffffffff82447510 T uhub_detach +ffffffff82447640 T uhub_explore +ffffffff824478e0 T uhub_intr +ffffffff82447a40 T uhub_port_connect +ffffffff82448000 T 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athn_usb_free_tx_cmd +ffffffff8252fa10 T athn_usb_free_tx_list +ffffffff8252fb40 T athn_usb_free_rx_list +ffffffff8252fb90 T athn_usb_load_firmware +ffffffff8252fd80 T athn_usb_htc_setup +ffffffff82530030 T athn_usb_ioctl +ffffffff825301e0 T athn_usb_start +ffffffff82530360 T athn_usb_watchdog +ffffffff825303f0 T athn_usb_node_alloc +ffffffff82530410 T athn_usb_newauth +ffffffff825305c0 T athn_usb_newassoc +ffffffff825306f0 T athn_usb_node_free +ffffffff825307f0 T athn_usb_updateslot +ffffffff82530820 T athn_usb_updateedca +ffffffff825308e0 T athn_usb_set_key +ffffffff82530a20 T athn_usb_delete_key +ffffffff82530b70 T athn_usb_newstate +ffffffff82530c70 T athn_usb_media_change +ffffffff82530d00 T athn_usb_next_scan +ffffffff82530da0 T athn_usb_rx_enable +ffffffff82530e10 T athn_usb_intr +ffffffff82530fa0 T athn_usb_alloc_rx_list +ffffffff82531050 T athn_usb_alloc_tx_list +ffffffff82531150 T athn_usb_do_async +ffffffff82531270 T athn_usb_htc_msg +ffffffff82531300 T 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abl_attach +ffffffff8259c220 T abl_get_brightness +ffffffff8259c2a0 T abl_get_param +ffffffff8259c300 T abl_set_param +ffffffff8259c3c0 T abl_set_brightness +ffffffff8259d000 T asmc_match +ffffffff8259d050 T asmc_attach +ffffffff8259d5d0 T asmc_activate +ffffffff8259d660 T asmc_try +ffffffff8259da20 T asmc_get_backlight +ffffffff8259daa0 T asmc_set_backlight +ffffffff8259db30 T asmc_backlight +ffffffff8259dbc0 T asmc_init +ffffffff8259ddc0 T asmc_update +ffffffff8259df60 T asmc_detach +ffffffff8259e110 t asmc_temp +ffffffff8259e2a0 t asmc_fan +ffffffff8259e460 t asmc_light +ffffffff8259f000 T acpiasus_match +ffffffff8259f030 T acpiasus_attach +ffffffff8259f150 T acpiasus_activate +ffffffff8259f2e0 T acpiasus_init +ffffffff8259f3c0 T acpiasus_notify +ffffffff825a0000 T thinkpad_match +ffffffff825a00b0 T thinkpad_attach +ffffffff825a04c0 T thinkpad_activate +ffffffff825a0640 T thinkpad_sensor_attach +ffffffff825a07b0 T thinkpad_get_temp +ffffffff825a0840 T thinkpad_sensor_refresh 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acpisony_notify_setup +ffffffff825a5310 T acpisony_notify +ffffffff825a56b0 T acpisony_find_offset +ffffffff825a57c0 T acpisony_set_hotkey +ffffffff825a59b0 T acpisony_brightness_down +ffffffff825a5ac0 T acpisony_get_brightness +ffffffff825a5b40 T acpisony_set_brightness +ffffffff825a6000 T acpivideo_match +ffffffff825a6070 T acpivideo_attach +ffffffff825a61d0 T acpivideo_getpcibus +ffffffff825a6210 T acpivideo_notify +ffffffff825a6270 T acpivideo_set_policy +ffffffff825a6340 T acpi_foundvout +ffffffff825a6410 T acpivideo_print +ffffffff825a7000 T acpivout_match +ffffffff825a7070 T acpivout_attach +ffffffff825a71c0 T acpivout_notify +ffffffff825a7270 T acpivout_get_bcl +ffffffff825a7390 T acpivout_get_brightness +ffffffff825a7430 T acpivout_get_param +ffffffff825a74d0 T acpivout_set_param +ffffffff825a7630 T acpivout_select_brightness +ffffffff825a7700 T acpivout_find_brightness +ffffffff825a7790 T acpivout_set_brightness +ffffffff825a8000 T acpipwrres_match +ffffffff825a8070 T acpipwrres_attach +ffffffff825a82b0 T acpipwrres_foundcons +ffffffff825a8440 T acpipwrres_ref_incr +ffffffff825a84d0 T acpipwrres_hascons +ffffffff825a8520 T acpipwrres_ref_decr +ffffffff825a85b0 T acpipwrres_addcons +ffffffff825a9000 T aibs_match +ffffffff825a9030 T aibs_attach +ffffffff825a9140 T aibs_probe +ffffffff825a92a0 T aibs_attach_new +ffffffff825a93c0 T aibs_attach_sif +ffffffff825a9590 T aibs_notify +ffffffff825a9600 T aibs_add_sensor +ffffffff825a9850 T aibs_getpack +ffffffff825a98d0 T aibs_refresh +ffffffff825a9930 T aibs_refresh_r +ffffffff825a9a70 T aibs_getvalue +ffffffff825a9bc0 T aibs_find_cb +ffffffff825aa000 T aplgpio_match +ffffffff825aa060 T aplgpio_attach +ffffffff825aa310 T aplgpio_intr +ffffffff825aa460 T aplgpio_read_pin +ffffffff825aa4b0 T aplgpio_write_pin +ffffffff825aa520 T aplgpio_intr_establish +ffffffff825aa640 T aplgpio_intr_enable +ffffffff825aa6d0 T aplgpio_intr_disable +ffffffff825ab000 T bytgpio_match +ffffffff825ab060 T bytgpio_attach +ffffffff825ab320 T bytgpio_intr +ffffffff825ab450 T bytgpio_read_pin +ffffffff825ab4b0 T bytgpio_write_pin +ffffffff825ab530 T bytgpio_intr_establish +ffffffff825ab5a0 T bytgpio_intr_enable +ffffffff825ab690 T bytgpio_intr_disable +ffffffff825ac000 T chvgpio_match +ffffffff825ac060 T chvgpio_attach +ffffffff825ac300 T chvgpio_intr +ffffffff825ac3d0 T chvgpio_read_pin +ffffffff825ac480 T chvgpio_write_pin +ffffffff825ac540 T chvgpio_intr_establish +ffffffff825ac710 T chvgpio_intr_enable +ffffffff825ac7e0 T chvgpio_intr_disable +ffffffff825ac8b0 T chvgpio_opreg_handler +ffffffff825ac930 T chvgpio_check_pin +ffffffff825ad000 T glkgpio_match +ffffffff825ad060 T glkgpio_attach +ffffffff825ad310 T glkgpio_intr +ffffffff825ad460 T glkgpio_read_pin +ffffffff825ad4c0 T glkgpio_write_pin +ffffffff825ad530 T glkgpio_intr_establish +ffffffff825ad650 T glkgpio_intr_enable +ffffffff825ad6e0 T glkgpio_intr_disable +ffffffff825ae000 T pchgpio_match +ffffffff825ae060 T pchgpio_attach +ffffffff825ae530 T pchgpio_activate +ffffffff825ae5e0 T pchgpio_intr +ffffffff825ae800 T pchgpio_read_pin +ffffffff825ae8f0 T pchgpio_write_pin +ffffffff825aea00 T pchgpio_intr_establish +ffffffff825aec20 T pchgpio_intr_enable +ffffffff825aed50 T pchgpio_intr_disable +ffffffff825aee80 T pchgpio_save +ffffffff825aeef0 T pchgpio_restore +ffffffff825aef60 T pchgpio_find_group +ffffffff825aefe0 T pchgpio_intr_handle +ffffffff825af0c0 T pchgpio_save_pin +ffffffff825af280 T pchgpio_restore_pin +ffffffff825b0000 T tipmic_match +ffffffff825b0050 T tipmic_attach +ffffffff825b0250 T tipmic_write_1 +ffffffff825b0310 T tipmic_intr +ffffffff825b0470 T tipmic_get_lpat +ffffffff825b0580 T tipmic_read_pin +ffffffff825b05b0 T tipmic_write_pin +ffffffff825b05e0 T tipmic_thermal_opreg_handler +ffffffff825b0e60 T tipmic_power_opreg_handler +ffffffff825b1100 T tipmic_read_1 +ffffffff825b11d0 T tipmic_raw_to_temp +ffffffff825b2000 T ccpmic_match +ffffffff825b2050 T ccpmic_attach +ffffffff825b2130 T ccpmic_get_lpat +ffffffff825b2240 T ccpmic_read_pin +ffffffff825b23c0 T ccpmic_write_pin +ffffffff825b2520 T ccpmic_thermal_opreg_handler +ffffffff825b2770 T ccpmic_power_opreg_handler +ffffffff825b2960 T ccpmic_read_1 +ffffffff825b2a30 T ccpmic_write_1 +ffffffff825b2af0 T ccpmic_raw_to_temp +ffffffff825b3000 T com_acpi_match +ffffffff825b3120 T com_acpi_attach +ffffffff825b33a0 T com_acpi_is_designware +ffffffff825b3400 T com_acpi_intr_designware +ffffffff825b3430 T com_acpi_is_console +ffffffff825b4000 T sdhc_acpi_match +ffffffff825b4060 T sdhc_acpi_attach +ffffffff825b4370 T sdhc_acpi_parse_resources +ffffffff825b4420 T sdhc_acpi_card_detect_gpio +ffffffff825b4480 T sdhc_acpi_card_detect_intr +ffffffff825b44c0 T sdhc_acpi_power_on +ffffffff825b4540 T sdhc_acpi_explore +ffffffff825b4570 T sdhc_acpi_card_detect_nonremovable +ffffffff825b45a0 T sdhc_acpi_do_explore +ffffffff825b5000 T dwiic_acpi_match +ffffffff825b5050 T dwiic_acpi_attach +ffffffff825b5410 T dwiic_acpi_parse_crs +ffffffff825b5560 T dwiic_acpi_power +ffffffff825b5670 T dwiic_acpi_get_params +ffffffff825b57b0 T dwiic_i2c_intr_establish +ffffffff825b5830 T dwiic_i2c_intr_disestablish +ffffffff825b5850 T dwiic_i2c_intr_string +ffffffff825b58e0 T dwiic_acpi_acquire_bus +ffffffff825b5930 T dwiic_acpi_release_bus +ffffffff825b5960 T dwiic_acpi_bus_scan +ffffffff825b59a0 T dwiic_acpi_found_hid +ffffffff825b5d00 T dwiic_matchhids +ffffffff825b5d90 T dwiic_acpi_found_ihidev +ffffffff825b6000 T dwiic_acpi_found_iatp +ffffffff825b6160 T dwiic_acpi_found_ietp +ffffffff825b7000 T acpicbkbd_match +ffffffff825b7030 T acpicbkbd_attach +ffffffff825b70d0 T acpicbkbd_activate +ffffffff825b7120 T acpicbkbd_get_backlight +ffffffff825b71a0 T acpicbkbd_set_backlight +ffffffff825b7240 T acpicbkbd_write_backlight +ffffffff825b8000 T acpials_match +ffffffff825b8090 T acpials_attach +ffffffff825b8230 T acpials_read +ffffffff825b82b0 T acpials_addtask +ffffffff825b82f0 T acpials_notify +ffffffff825b8380 T acpials_update +ffffffff825b9000 T tpm_match +ffffffff825b9050 T tpm_attach +ffffffff825b9320 T tpm_activate +ffffffff825b9430 T tpm2_start_method +ffffffff825b94b0 T tpm_probe +ffffffff825b9560 T tpm_init_tis +ffffffff825b97d0 T tpm_init_crb +ffffffff825b9b10 T tpm_suspend +ffffffff825b9c00 T tpm_resume +ffffffff825b9c30 T tpm_write_tis +ffffffff825b9fc0 T tpm_read_tis +ffffffff825ba190 T tpm_write_crb +ffffffff825ba570 T tpm_read_crb +ffffffff825ba870 T tpm_request_locality_tis +ffffffff825ba960 T tpm_request_locality_crb +ffffffff825baa60 T tpm_release_locality_crb +ffffffff825baab0 T tpm_release_locality_tis +ffffffff825bab20 T tpm_getburst +ffffffff825babd0 T tpm_status +ffffffff825babf0 T tpm_waitfor +ffffffff825bacd0 T tpm_waitfor_status +ffffffff825bb000 T acpihve_match +ffffffff825bb0b0 T acpihve_attach +ffffffff825bc000 T acpisbs_match +ffffffff825bc030 T acpisbs_attach +ffffffff825bc2b0 T acpisbs_activate +ffffffff825bc390 T acpisbs_read +ffffffff825bc450 T acpisbs_setup_sensors +ffffffff825bc550 T acpisbs_refresh_sensors +ffffffff825bc6a0 T acpisbs_notify +ffffffff825bc7e0 T acpi_smbus_read +ffffffff825bd000 T surface_match +ffffffff825bd060 T surface_attach +ffffffff825bd0c0 T surface_hotkey +ffffffff825be000 T ipmi_acpi_match +ffffffff825be030 T ipmi_acpi_attach +ffffffff825be260 T ipmi_acpi_parse_crs +ffffffff825bf000 T amdgpio_match +ffffffff825bf060 T amdgpio_attach +ffffffff825bf2a0 T amdgpio_activate +ffffffff825bf390 T amdgpio_intr +ffffffff825bf530 T amdgpio_read_pin +ffffffff825bf580 T amdgpio_write_pin +ffffffff825bf5f0 T amdgpio_intr_establish +ffffffff825bf6e0 T amdgpio_intr_enable +ffffffff825bf760 T amdgpio_intr_disable +ffffffff825bf7e0 T amdgpio_save +ffffffff825bf860 T amdgpio_restore +ffffffff825bf8f0 T amdgpio_save_pin +ffffffff825bf960 T amdgpio_restore_pin +ffffffff825bf9d0 T amdgpio_pin_intr +ffffffff825c0000 T acpihid_match +ffffffff825c0030 T acpihid_attach +ffffffff825c0210 T acpihid_init_dsm +ffffffff825c0370 T acpihid_eval +ffffffff825c0590 T acpihid_notify +ffffffff825c05f0 T acpihid_button_array_enable +ffffffff825c1000 t iosf_acpi_match +ffffffff825c1050 t iosf_acpi_attach +ffffffff825c1150 t iosf_acpi_mbi_mdr_rd +ffffffff825c11c0 t iosf_acpi_mbi_mdr_wr +ffffffff825c2000 T acpi_match +ffffffff825c2060 T acpi_attach +ffffffff825c20a0 T acpi_probe +ffffffff825c2240 T acpi_map +ffffffff825c2330 T acpi_unmap +ffffffff825c2380 T acpi_bus_space_map +ffffffff825c23a0 T acpi_bus_space_unmap +ffffffff825c23c0 T acpi_intr_establish +ffffffff825c2500 T acpi_intr_disestablish +ffffffff825c2510 T acpi_scan +ffffffff825c26b0 T acpi_acquire_glk +ffffffff825c2710 T acpi_release_glk +ffffffff825c2760 T acpi_attach_machdep +ffffffff825c28f0 T acpi_sleep_cpu +ffffffff825c2a90 T acpi_resume_cpu +ffffffff825c2b90 T sleep_mp +ffffffff825c2c80 T resume_mp +ffffffff825c2d70 T acpi_iommu_device_map +ffffffff825c3000 T hibernate_resume_machdep +ffffffff825c3050 T hibernate_drop_to_real_mode +ffffffff825c3060 T hibernate_activate_resume_pt_machdep +ffffffff825c30a0 T hibernate_switch_stack_machdep +ffffffff825c30e0 T hibernate_flush +ffffffff825c3110 T acpi_savecpu +ffffffff825c4000 T sleep_showstate +ffffffff825c40f0 T sleep_setstate +ffffffff825c4150 T gosleep +ffffffff825c4210 T sleep_abort +ffffffff825c4240 T sleep_resume +ffffffff825c42b0 T suspend_finish +ffffffff825c5000 T acpiopen +ffffffff825c50d0 T acpiclose +ffffffff825c5160 T acpiioctl +ffffffff825c52b0 T request_sleep +ffffffff825c5330 T acpi_filtdetach +ffffffff825c5380 T acpi_filtread +ffffffff825c53c0 T acpikqfilter +ffffffff825c6000 T acpipci_match +ffffffff825c6030 T acpipci_attach +ffffffff825c62f0 T acpipci_osc +ffffffff825c6430 T acpipci_parse_resources +ffffffff825c6560 T acpipci_attach_bus +ffffffff825c6730 T acpipci_print +ffffffff825c67a0 T acpipci_attach_busses +ffffffff825c7000 T efiopen +ffffffff825c7040 T eficlose +ffffffff825c7070 T efiioctl +ffffffff825c7110 T efiioc_get_table +ffffffff825c7280 T efiioc_var_get +ffffffff825c7500 T efiioc_var_next +ffffffff825c7720 T efiioc_var_set +ffffffff825c78a0 T efi_adapt_error +ffffffff825c8000 T efi_match +ffffffff825c8060 T efi_attach +ffffffff825c8330 T efi_map_runtime +ffffffff825c84b0 T efi_enter +ffffffff825c8550 T efi_leave +ffffffff825c85d0 T efi_fault +ffffffff825c9000 T vmm_probe +ffffffff825c9050 T vmm_attach +ffffffff825c9170 T vmm_activate +ffffffff825c92b0 T vmmopen +ffffffff825c9300 T vmmclose +ffffffff825c9330 T vm_find +ffffffff825c9450 T vmmioctl +ffffffff825c96d0 T vm_create +ffffffff825c99a0 T vm_get_info +ffffffff825c9bf0 T vm_terminate +ffffffff825c9d60 T vm_resetcpu +ffffffff825c9e80 T vm_share_mem +ffffffff825c9fd0 T pledge_ioctl_vmm +ffffffff825ca0c0 T vm_find_vcpu +ffffffff825ca120 T vm_create_check_mem_ranges +ffffffff825ca2e0 T vm_teardown +ffffffff825ca420 T vcpu_must_stop +ffffffff825cb000 T vmm_enabled +ffffffff825cb080 T vmm_attach_machdep +ffffffff825cb230 T vmm_quiesce_vmx +ffffffff825cb400 T vmm_activate_machdep +ffffffff825cb520 T vmm_stop +ffffffff825cb650 T vmm_start +ffffffff825cb730 T vmmioctl_machdep +ffffffff825cb800 T vm_intr_pending +ffffffff825cb8a0 T vm_mprotect_ept +ffffffff825cbb20 T pledge_ioctl_vmm_machdep +ffffffff825cbb70 T vm_rwvmparams +ffffffff825cbd00 T vmm_init_pvclock +ffffffff825cbdd0 T vm_rwregs +ffffffff825cbee0 T vcpu_readregs_vmx +ffffffff825cc310 T vcpu_writeregs_vmx +ffffffff825cc780 T vcpu_readregs_svm +ffffffff825ccc30 T vcpu_writeregs_svm +ffffffff825cd100 T vmm_get_guest_memtype +ffffffff825cd180 T vmx_mprotect_ept +ffffffff825cd3e0 T vmx_pmap_find_pte_ept +ffffffff825cd4b0 T start_vmm_on_cpu +ffffffff825cd5d0 T stop_vmm_on_cpu +ffffffff825cd670 T vmclear_on_cpu +ffffffff825cd6f0 T vm_impl_init_vmx +ffffffff825cd800 T vm_impl_init_svm +ffffffff825cd910 T vm_impl_init +ffffffff825cd9b0 T vm_impl_deinit +ffffffff825cd9e0 T vcpu_reload_vmcs_vmx +ffffffff825cdb20 T vcpu_reset_regs_svm +ffffffff825cdeb0 T svm_setmsrbrw +ffffffff825cdfc0 T svm_setmsrbr +ffffffff825ce090 T vmm_alloc_vpid +ffffffff825ce1a0 T svm_setmsrbw +ffffffff825ce280 T vmx_setmsrbr +ffffffff825ce330 T vmx_setmsrbw +ffffffff825ce3e0 T vmx_setmsrbrw +ffffffff825ce4f0 T svm_set_clean +ffffffff825ce540 T svm_set_dirty +ffffffff825ce590 T vcpu_reset_regs_vmx +ffffffff825cefd0 T vcpu_vmx_check_cap +ffffffff825cf0d0 T vcpu_vmx_compute_ctrl +ffffffff825cf2b0 T vcpu_init_vmx +ffffffff825cf650 T vcpu_deinit_vmx +ffffffff825cf7d0 T vcpu_reset_regs +ffffffff825cf810 T vcpu_init_svm +ffffffff825cf9a0 T vcpu_deinit_svm +ffffffff825cfae0 T vcpu_init +ffffffff825cfba0 T vmm_free_vpid +ffffffff825cfc10 T vcpu_deinit +ffffffff825cfc50 T vm_run +ffffffff825cfe10 T vcpu_run_vmx +ffffffff825d0600 T vcpu_run_svm +ffffffff825d0bf0 T vmm_fpurestore +ffffffff825d0cb0 T vmm_fpusave +ffffffff825d0d30 T vmm_translate_gva +ffffffff825d1040 T vmm_update_pvclock +ffffffff825d1140 T vmx_get_exit_info +ffffffff825d11a0 T vmx_handle_exit +ffffffff825d15d0 T vmx_instruction_error_decode +ffffffff825d17a0 T vmm_get_guest_cpu_cpl +ffffffff825d1890 T vmx_handle_intr +ffffffff825d1920 T svm_handle_hlt +ffffffff825d1970 T vmx_handle_hlt +ffffffff825d1a20 T svm_handle_exit +ffffffff825d1d40 T svm_handle_np_fault +ffffffff825d1ee0 T vmm_handle_cpuid +ffffffff825d2580 T svm_handle_msr +ffffffff825d2850 T svm_handle_xsetbv +ffffffff825d28f0 T svm_handle_inout +ffffffff825d29f0 T vmm_inject_ud +ffffffff825d2a20 T vmm_inject_db +ffffffff825d2a50 T vmx_handle_np_fault +ffffffff825d2bb0 T vmx_handle_inout +ffffffff825d2d30 T vmx_handle_cr +ffffffff825d2f30 T vmx_handle_rdmsr +ffffffff825d3000 T vmx_handle_wrmsr +ffffffff825d3270 T vmx_handle_xsetbv +ffffffff825d3340 T vmm_inject_gp +ffffffff825d3370 T vmx_get_exit_qualification +ffffffff825d33d0 T vmx_get_guest_faulttype +ffffffff825d3470 T svm_get_guest_faulttype +ffffffff825d34a0 T svm_fault_page +ffffffff825d3530 T vmx_fault_page +ffffffff825d3680 T vmm_get_guest_cpu_mode +ffffffff825d3780 T vmx_load_pdptes +ffffffff825d3a00 T vmx_handle_cr0_write +ffffffff825d3c10 T vmx_handle_cr4_write +ffffffff825d3cb0 T vmm_handle_xsetbv +ffffffff825d3d40 T vmx_handle_misc_enable_msr +ffffffff825d3da0 T vmm_pat_is_valid +ffffffff825d3e80 T vmm_gpa_is_valid +ffffffff825d3ef0 T vmx_exit_reason_decode +ffffffff825d3f30 T svm_exit_reason_decode +ffffffff825d4d40 T vcpu_state_decode +ffffffff825d5000 T vmm_dispatch_intr +ffffffff825d5020 T vmxon +ffffffff825d5050 T vmxoff +ffffffff825d5080 T vmclear +ffffffff825d50b0 T vmptrld +ffffffff825d50e0 T vmptrst +ffffffff825d5110 T vmwrite +ffffffff825d5140 T vmread +ffffffff825d5170 T invvpid +ffffffff825d518b t invvpid_fail +ffffffff825d5192 t invvpid_ret +ffffffff825d51b0 T invept +ffffffff825d51cb t invept_fail +ffffffff825d51d2 t invept_ret +ffffffff825d51f0 T vmx_enter_guest +ffffffff825d521b t skip_init +ffffffff825d52e8 t no_l1df_msr +ffffffff825d52eb t l1df_tlb_loop +ffffffff825d5304 t l1df_tlb_done +ffffffff825d530c t l1df_load_cache +ffffffff825d5323 t done_flush +ffffffff825d53b6 t do_resume +ffffffff825d543b t fail_launch_or_resume +ffffffff825d547d t fail_launch_unknown +ffffffff825d548a t fail_launch_invalid_vmcs +ffffffff825d5497 t fail_launch_valid_vmcs +ffffffff825d54b4 t vmx_exit_handler_asm +ffffffff825d5579 t restore_host +ffffffff825d5610 T svm_enter_guest +ffffffff825d57a0 t restore_host_svm +ffffffff825d6000 T sdmmc_match +ffffffff825d6050 T sdmmc_attach +ffffffff825d6390 T sdmmc_detach +ffffffff825d6440 T sdmmc_activate +ffffffff825d6510 T sdmmc_discover_task +ffffffff825d65d0 T sdmmc_create_thread +ffffffff825d6640 T sdmmc_holds_root_device +ffffffff825d66a0 T sdmmc_task_thread +ffffffff825d6890 T sdmmc_needs_discover +ffffffff825d6940 T sdmmc_del_task +ffffffff825d69f0 T sdmmc_card_detach +ffffffff825d6ad0 T sdmmc_add_task +ffffffff825d6b50 T sdmmc_card_attach +ffffffff825d6c60 T sdmmc_enable +ffffffff825d6db0 T sdmmc_scan +ffffffff825d6e40 T sdmmc_init +ffffffff825d6f40 T sdmmc_disable +ffffffff825d70a0 T sdmmc_function_free +ffffffff825d70c0 T sdmmc_delay +ffffffff825d7110 T sdmmc_select_card +ffffffff825d7330 T sdmmc_set_bus_power +ffffffff825d74e0 T sdmmc_function_alloc +ffffffff825d7570 T sdmmc_app_command +ffffffff825d7700 T sdmmc_mmc_command +ffffffff825d7780 T sdmmc_go_idle_state +ffffffff825d7890 T sdmmc_send_if_cond +ffffffff825d79e0 T sdmmc_set_relative_addr +ffffffff825d8000 T sdmmc_cisptr +ffffffff825d80a0 T sdmmc_read_cis +ffffffff825d83e0 T sdmmc_print_cis +ffffffff825d8550 T sdmmc_check_cis_quirks +ffffffff825d9000 T sdmmc_io_enable +ffffffff825d92a0 T sdmmc_io_reset +ffffffff825d93d0 T sdmmc_io_send_op_cond +ffffffff825d9540 T sdmmc_io_scan +ffffffff825d9690 T sdmmc_io_init +ffffffff825d97c0 T sdmmc_io_set_highspeed +ffffffff825d9a60 T sdmmc_io_set_bus_width +ffffffff825d9cf0 T sdmmc_io_function_ready +ffffffff825d9e70 T sdmmc_io_read_1 +ffffffff825d9fc0 T sdmmc_io_function_enable +ffffffff825da390 T sdmmc_io_write_1 +ffffffff825da510 T sdmmc_io_function_disable +ffffffff825da790 T sdmmc_io_attach +ffffffff825da880 T sdmmc_print +ffffffff825daad0 T sdmmc_submatch +ffffffff825dab50 T sdmmc_io_detach +ffffffff825dac00 T sdmmc_io_rw_direct +ffffffff825dada0 T sdmmc_io_rw_extended_subr +ffffffff825daf40 T sdmmc_io_rw_extended +ffffffff825db340 T sdmmc_io_read_2 +ffffffff825db4a0 T sdmmc_io_write_2 +ffffffff825db600 T sdmmc_io_read_4 +ffffffff825db760 T sdmmc_io_write_4 +ffffffff825db8c0 T sdmmc_io_read_multi_1 +ffffffff825db9b0 T sdmmc_io_write_multi_1 +ffffffff825dbaa0 T sdmmc_io_read_region_1 +ffffffff825dbb90 T sdmmc_io_write_region_1 +ffffffff825dbc80 T sdmmc_io_xchg +ffffffff825dbe10 T sdmmc_intr_enable +ffffffff825dc080 T sdmmc_intr_disable +ffffffff825dc2f0 T sdmmc_intr_establish +ffffffff825dc3f0 T sdmmc_intr_disestablish +ffffffff825dc4e0 T sdmmc_card_intr +ffffffff825dc530 T sdmmc_intr_task +ffffffff825dc5c0 T sdmmc_io_set_blocklen +ffffffff825dd000 T sdmmc_mem_enable +ffffffff825dd450 T sdmmc_mem_send_op_cond +ffffffff825dd600 T sdmmc_mem_signal_voltage +ffffffff825dd6c0 T sdmmc_mem_scan +ffffffff825dd9d0 T sdmmc_decode_csd +ffffffff825dde00 T sdmmc_decode_cid +ffffffff825de2a0 T sdmmc_mem_send_scr +ffffffff825de3e0 T sdmmc_mem_decode_scr +ffffffff825de440 T sdmmc_mem_send_cxd_data +ffffffff825de5b0 T sdmmc_mem_set_bus_width +ffffffff825de6c0 T sdmmc_mem_sd_switch +ffffffff825de970 T sdmmc_be512_to_bitfield512 +ffffffff825dea20 T sdmmc_mem_mmc_switch +ffffffff825deb10 T sdmmc_mem_init +ffffffff825dec60 T sdmmc_mem_set_blocklen +ffffffff825ded60 T sdmmc_mem_sd_init +ffffffff825df140 T sdmmc_mem_mmc_init +ffffffff825df800 T sdmmc_mem_select_transfer_mode +ffffffff825df880 T sdmmc_mem_execute_tuning +ffffffff825df910 T sdmmc_mem_read_block_subr +ffffffff825dfc70 T sdmmc_mem_single_read_block +ffffffff825dfd40 T sdmmc_mem_read_block +ffffffff825dfef0 T sdmmc_mem_write_block_subr +ffffffff825e0240 T sdmmc_mem_single_write_block +ffffffff825e0310 T sdmmc_mem_write_block +ffffffff825e04c0 T sdmmc_mem_hibernate_write +ffffffff825e1000 T sdmmc_scsi_cmd +ffffffff825e11f0 T sdmmc_minphys +ffffffff825e1270 T sdmmc_scsi_attach +ffffffff825e1460 T sdmmc_alloc_ccbs +ffffffff825e15a0 T sdmmc_free_ccbs +ffffffff825e1600 T sdmmc_scsi_detach +ffffffff825e1760 T sdmmc_stimeout +ffffffff825e17e0 T sdmmc_ccb_alloc +ffffffff825e1890 T sdmmc_ccb_free +ffffffff825e1970 T sdmmc_inquiry +ffffffff825e1be0 T sdmmc_start_xs +ffffffff825e1cd0 T sdmmc_complete_xs +ffffffff825e1da0 T sdmmc_done_xs +ffffffff825e1df0 T sdmmc_scsi_hibernate_io +ffffffff825e2000 T bwfm_sdio_preinit +ffffffff825e24a0 T bwfm_sdio_txcheck +ffffffff825e24e0 T bwfm_sdio_txdata +ffffffff825e2550 T bwfm_sdio_txctl +ffffffff825e26a0 T bwfm_sdio_buscore_read +ffffffff825e26b0 T bwfm_sdio_buscore_write +ffffffff825e26d0 T bwfm_sdio_buscore_prepare +ffffffff825e2810 T bwfm_sdio_buscore_activate +ffffffff825e2890 T bwfm_sdio_match +ffffffff825e2940 T bwfm_sdio_attach +ffffffff825e2c00 T bwfm_sdio_detach +ffffffff825e2c60 T bwfm_sdio_task +ffffffff825e2dc0 T bwfm_sdio_write_1 +ffffffff825e2df0 T bwfm_sdio_read_1 +ffffffff825e2e20 T bwfm_sdio_write_4 +ffffffff825e2ed0 T bwfm_sdio_read_4 +ffffffff825e2f80 T bwfm_sdio_load_microcode +ffffffff825e31e0 T bwfm_sdio_clkctl +ffffffff825e3310 T bwfm_sdio_dev_write +ffffffff825e3360 T bwfm_sdio_intr +ffffffff825e33a0 T bwfm_sdio_ram_read_write +ffffffff825e35d0 T bwfm_sdio_htclk +ffffffff825e3840 T bwfm_sdio_readshared +ffffffff825e3910 T bwfm_sdio_dev_read +ffffffff825e3950 T bwfm_sdio_rx_frames +ffffffff825e3d00 T bwfm_sdio_tx_frames +ffffffff825e3e00 T bwfm_sdio_backplane +ffffffff825e3eb0 T bwfm_sdio_buf_read +ffffffff825e3f90 T bwfm_sdio_buf_write +ffffffff825e4040 T bwfm_sdio_frame_read_write +ffffffff825e41c0 T bwfm_sdio_newbuf +ffffffff825e4240 T bwfm_sdio_tx_ok +ffffffff825e42a0 T bwfm_sdio_tx_ctrlframe +ffffffff825e43a0 T bwfm_sdio_tx_dataframe +ffffffff825e44f0 T bwfm_sdio_rx_glom +ffffffff825e5000 T onewire_match +ffffffff825e5050 T onewire_attach +ffffffff825e50f0 T onewire_detach +ffffffff825e5160 T onewire_activate +ffffffff825e5180 T onewire_scan +ffffffff825e53a0 T onewire_createthread +ffffffff825e5410 T onewire_print +ffffffff825e54e0 T onewirebus_print +ffffffff825e5530 T onewire_lock +ffffffff825e5550 T onewire_unlock +ffffffff825e5570 T onewire_reset +ffffffff825e5590 T onewire_bit +ffffffff825e55b0 T onewire_read_byte +ffffffff825e56f0 T onewire_write_byte +ffffffff825e57d0 T onewire_read_block +ffffffff825e5870 T onewire_write_block +ffffffff825e5910 T onewire_triplet +ffffffff825e59f0 T onewire_matchrom +ffffffff825e5b40 T onewire_search +ffffffff825e5ee0 T onewire_thread +ffffffff825e6000 T onewire_crc +ffffffff825e60b0 T onewire_crc16 +ffffffff825e6170 T onewire_famname +ffffffff825e61b0 T onewire_matchbyfam +ffffffff825e7000 T owid_match +ffffffff825e7030 T owid_attach +ffffffff825e7100 T owid_detach +ffffffff825e7140 T owid_activate +ffffffff825e8000 T owsbm_match +ffffffff825e8030 T owsbm_attach +ffffffff825e81d0 T owsbm_detach +ffffffff825e8240 T owsbm_activate +ffffffff825e8270 T owsbm_update +ffffffff825e9000 T owtemp_match +ffffffff825e9030 T owtemp_attach +ffffffff825e9130 T owtemp_detach +ffffffff825e91a0 T owtemp_activate +ffffffff825e91d0 T owtemp_update +ffffffff825ea000 T owctr_match +ffffffff825ea030 T owctr_attach +ffffffff825ea180 T owctr_detach +ffffffff825ea1f0 T owctr_activate +ffffffff825ea220 T owctr_update +ffffffff825ea250 T owctr_update_counter +ffffffff825eb000 A __text_page_start +ffffffff825eb000 T Xsyscall_meltdown +ffffffff825eb00c T Xsyscall +ffffffff825eb26e t Xsyscall_trampback +ffffffff825eb280 T intr_user_exit +ffffffff825eb2c2 t intr_user_exit_post_ast +ffffffff825eb3ee t Xiretq_trampback +ffffffff825eb3fa T doreti_iret +ffffffff825ec000 T alltraps +ffffffff825ec138 T recall_trap +ffffffff825ec150 T alltraps_kern +ffffffff825ec153 T alltraps_kern_meltdown +ffffffff825ed000 ? Xsyscall32 +ffffffff825ed000 A __kutext_start +ffffffff825ed000 A __text_page_end +ffffffff825ee000 ? Xtrap00 +ffffffff825ee010 ? Xtrap01 +ffffffff825ee020 ? Xtrap02 +ffffffff825ee028 c calltrap_specstk +ffffffff825ee0f0 ? calltrap_specstk_tramp +ffffffff825ee110 ? Xtrap03 +ffffffff825ee120 ? Xtrap04 +ffffffff825ee130 ? Xtrap05 +ffffffff825ee140 ? Xtrap06 +ffffffff825ee150 ? Xtrap07 +ffffffff825ee160 ? Xtrap08 +ffffffff825ee170 ? Xtrap09 +ffffffff825ee180 ? Xtrap0a +ffffffff825ee190 ? Xtrap0b +ffffffff825ee1a0 ? Xtrap0c +ffffffff825ee1b0 ? Xtrap0d +ffffffff825ee240 ? Xtrap0e +ffffffff825ee250 ? Xintrspurious +ffffffff825ee250 ? Xtrap0f +ffffffff825ee260 ? Xtrap10 +ffffffff825ee270 ? Xtrap11 +ffffffff825ee280 ? Xtrap12 +ffffffff825ee290 ? Xtrap13 +ffffffff825ee2a0 ? Xtrap14 +ffffffff825ee2b0 ? Xtrap15 +ffffffff825ee2c0 ? Xtrap16 +ffffffff825ee2c0 ? Xtrap17 +ffffffff825ee2c0 ? Xtrap18 +ffffffff825ee2c0 ? Xtrap19 +ffffffff825ee2c0 ? Xtrap1a +ffffffff825ee2c0 ? Xtrap1b +ffffffff825ee2c0 ? Xtrap1c +ffffffff825ee2c0 ? Xtrap1d +ffffffff825ee2c0 ? Xtrap1e +ffffffff825ee2c0 ? Xtrap1f +ffffffff825ee2d0 ? x2apic_eoi +ffffffff825ee2f0 ? Xintr_lapic_ipi +ffffffff825ee330 ? Xipi_invltlb +ffffffff825ee360 ? Xipi_invlpg +ffffffff825ee390 ? Xipi_invlrange +ffffffff825ee3d0 ? Xipi_invltlb_pcid +ffffffff825ee410 ? Xipi_invlpg_pcid +ffffffff825ee460 ? Xipi_invlrange_pcid +ffffffff825ee4d0 ? Xintr_lapic_ltimer +ffffffff825ee510 ? Xintr_xen_upcall +ffffffff825ee550 ? Xintr_hyperv_upcall +ffffffff825ee590 ? Xintr_legacy0 +ffffffff825ee5d0 ? Xintr_legacy1 +ffffffff825ee610 ? Xintr_legacy2 +ffffffff825ee650 ? Xintr_legacy3 +ffffffff825ee690 ? Xintr_legacy4 +ffffffff825ee6d0 ? Xintr_legacy5 +ffffffff825ee710 ? Xintr_legacy6 +ffffffff825ee750 ? Xintr_legacy7 +ffffffff825ee790 ? Xintr_legacy8 +ffffffff825ee7d0 ? Xintr_legacy9 +ffffffff825ee810 ? Xintr_legacy10 +ffffffff825ee850 ? Xintr_legacy11 +ffffffff825ee890 ? Xintr_legacy12 +ffffffff825ee8d0 ? Xintr_legacy13 +ffffffff825ee910 ? Xintr_legacy14 +ffffffff825ee950 ? Xintr_legacy15 +ffffffff825ee990 ? Xintr_ioapic_edge0 +ffffffff825ee9d0 ? Xintr_ioapic_edge1 +ffffffff825eea10 ? Xintr_ioapic_edge2 +ffffffff825eea50 ? Xintr_ioapic_edge3 +ffffffff825eea90 ? Xintr_ioapic_edge4 +ffffffff825eead0 ? Xintr_ioapic_edge5 +ffffffff825eeb10 ? Xintr_ioapic_edge6 +ffffffff825eeb50 ? Xintr_ioapic_edge7 +ffffffff825eeb90 ? Xintr_ioapic_edge8 +ffffffff825eebd0 ? Xintr_ioapic_edge9 +ffffffff825eec10 ? Xintr_ioapic_edge10 +ffffffff825eec50 ? Xintr_ioapic_edge11 +ffffffff825eec90 ? Xintr_ioapic_edge12 +ffffffff825eecd0 ? Xintr_ioapic_edge13 +ffffffff825eed10 ? Xintr_ioapic_edge14 +ffffffff825eed50 ? Xintr_ioapic_edge15 +ffffffff825eed90 ? Xintr_ioapic_edge16 +ffffffff825eedd0 ? Xintr_ioapic_edge17 +ffffffff825eee10 ? Xintr_ioapic_edge18 +ffffffff825eee50 ? Xintr_ioapic_edge19 +ffffffff825eee90 ? Xintr_ioapic_edge20 +ffffffff825eeed0 ? Xintr_ioapic_edge21 +ffffffff825eef10 ? Xintr_ioapic_edge22 +ffffffff825eef50 ? Xintr_ioapic_edge23 +ffffffff825eef90 ? Xintr_ioapic_edge24 +ffffffff825eefd0 ? Xintr_ioapic_edge25 +ffffffff825ef010 ? Xintr_ioapic_edge26 +ffffffff825ef050 ? Xintr_ioapic_edge27 +ffffffff825ef090 ? Xintr_ioapic_edge28 +ffffffff825ef0d0 ? Xintr_ioapic_edge29 +ffffffff825ef110 ? Xintr_ioapic_edge30 +ffffffff825ef150 ? Xintr_ioapic_edge31 +ffffffff825ef190 ? Xintr_ioapic_edge32 +ffffffff825ef1d0 ? Xintr_ioapic_edge33 +ffffffff825ef210 ? Xintr_ioapic_edge34 +ffffffff825ef250 ? Xintr_ioapic_edge35 +ffffffff825ef290 ? Xintr_ioapic_edge36 +ffffffff825ef2d0 ? Xintr_ioapic_edge37 +ffffffff825ef310 ? Xintr_ioapic_edge38 +ffffffff825ef350 ? Xintr_ioapic_edge39 +ffffffff825ef390 ? Xintr_ioapic_edge40 +ffffffff825ef3d0 ? Xintr_ioapic_edge41 +ffffffff825ef410 ? Xintr_ioapic_edge42 +ffffffff825ef450 ? Xintr_ioapic_edge43 +ffffffff825ef490 ? Xintr_ioapic_edge44 +ffffffff825ef4d0 ? Xintr_ioapic_edge45 +ffffffff825ef510 ? Xintr_ioapic_edge46 +ffffffff825ef550 ? Xintr_ioapic_edge47 +ffffffff825ef590 ? Xintr_ioapic_edge48 +ffffffff825ef5d0 ? Xintr_ioapic_edge49 +ffffffff825ef610 ? Xintr_ioapic_edge50 +ffffffff825ef650 ? Xintr_ioapic_edge51 +ffffffff825ef690 ? Xintr_ioapic_edge52 +ffffffff825ef6d0 ? Xintr_ioapic_edge53 +ffffffff825ef710 ? Xintr_ioapic_edge54 +ffffffff825ef750 ? Xintr_ioapic_edge55 +ffffffff825ef790 ? Xintr_ioapic_edge56 +ffffffff825ef7d0 ? Xintr_ioapic_edge57 +ffffffff825ef810 ? Xintr_ioapic_edge58 +ffffffff825ef850 ? Xintr_ioapic_edge59 +ffffffff825ef890 ? Xintr_ioapic_edge60 +ffffffff825ef8d0 ? Xintr_ioapic_edge61 +ffffffff825ef910 ? Xintr_ioapic_edge62 +ffffffff825ef950 ? Xintr_ioapic_edge63 +ffffffff825ef990 ? Xintr_ioapic_level0 +ffffffff825ef9d0 ? Xintr_ioapic_level1 +ffffffff825efa10 ? Xintr_ioapic_level2 +ffffffff825efa50 ? Xintr_ioapic_level3 +ffffffff825efa90 ? Xintr_ioapic_level4 +ffffffff825efad0 ? Xintr_ioapic_level5 +ffffffff825efb10 ? Xintr_ioapic_level6 +ffffffff825efb50 ? Xintr_ioapic_level7 +ffffffff825efb90 ? Xintr_ioapic_level8 +ffffffff825efbd0 ? Xintr_ioapic_level9 +ffffffff825efc10 ? Xintr_ioapic_level10 +ffffffff825efc50 ? Xintr_ioapic_level11 +ffffffff825efc90 ? Xintr_ioapic_level12 +ffffffff825efcd0 ? Xintr_ioapic_level13 +ffffffff825efd10 ? Xintr_ioapic_level14 +ffffffff825efd50 ? Xintr_ioapic_level15 +ffffffff825efd90 ? Xintr_ioapic_level16 +ffffffff825efdd0 ? Xintr_ioapic_level17 +ffffffff825efe10 ? Xintr_ioapic_level18 +ffffffff825efe50 ? Xintr_ioapic_level19 +ffffffff825efe90 ? Xintr_ioapic_level20 +ffffffff825efed0 ? Xintr_ioapic_level21 +ffffffff825eff10 ? Xintr_ioapic_level22 +ffffffff825eff50 ? Xintr_ioapic_level23 +ffffffff825eff90 ? Xintr_ioapic_level24 +ffffffff825effd0 ? Xintr_ioapic_level25 +ffffffff825f0010 ? Xintr_ioapic_level26 +ffffffff825f0050 ? Xintr_ioapic_level27 +ffffffff825f0090 ? Xintr_ioapic_level28 +ffffffff825f00d0 ? Xintr_ioapic_level29 +ffffffff825f0110 ? Xintr_ioapic_level30 +ffffffff825f0150 ? Xintr_ioapic_level31 +ffffffff825f0190 ? Xintr_ioapic_level32 +ffffffff825f01d0 ? Xintr_ioapic_level33 +ffffffff825f0210 ? Xintr_ioapic_level34 +ffffffff825f0250 ? Xintr_ioapic_level35 +ffffffff825f0290 ? Xintr_ioapic_level36 +ffffffff825f02d0 ? Xintr_ioapic_level37 +ffffffff825f0310 ? Xintr_ioapic_level38 +ffffffff825f0350 ? Xintr_ioapic_level39 +ffffffff825f0390 ? Xintr_ioapic_level40 +ffffffff825f03d0 ? Xintr_ioapic_level41 +ffffffff825f0410 ? Xintr_ioapic_level42 +ffffffff825f0450 ? Xintr_ioapic_level43 +ffffffff825f0490 ? Xintr_ioapic_level44 +ffffffff825f04d0 ? Xintr_ioapic_level45 +ffffffff825f0510 ? Xintr_ioapic_level46 +ffffffff825f0550 ? Xintr_ioapic_level47 +ffffffff825f0590 ? Xintr_ioapic_level48 +ffffffff825f05d0 ? Xintr_ioapic_level49 +ffffffff825f0610 ? Xintr_ioapic_level50 +ffffffff825f0650 ? Xintr_ioapic_level51 +ffffffff825f0690 ? Xintr_ioapic_level52 +ffffffff825f06d0 ? Xintr_ioapic_level53 +ffffffff825f0710 ? Xintr_ioapic_level54 +ffffffff825f0750 ? Xintr_ioapic_level55 +ffffffff825f0790 ? Xintr_ioapic_level56 +ffffffff825f07d0 ? Xintr_ioapic_level57 +ffffffff825f0810 ? Xintr_ioapic_level58 +ffffffff825f0850 ? Xintr_ioapic_level59 +ffffffff825f0890 ? Xintr_ioapic_level60 +ffffffff825f08d0 ? Xintr_ioapic_level61 +ffffffff825f0910 ? Xintr_ioapic_level62 +ffffffff825f0950 ? Xintr_ioapic_level63 +ffffffff825f1000 ? codepatch_fill_nop +ffffffff825f1000 A __cptext_start +ffffffff825f1000 A __kutext_end +ffffffff825f10b0 ? codepatch_maprw +ffffffff825f1190 ? codepatch_unmaprw +ffffffff825f1200 ? codepatch_nop +ffffffff825f1360 ? codepatch_replace +ffffffff825f1510 ? codepatch_call +ffffffff825f1530 ? codepatch_jmp +ffffffff825f2000 A __cptext_end +ffffffff825f2000 A __rodata_start +ffffffff825f2000 C _etext +ffffffff825f2000 C etext +ffffffff825f3000 r seeprom_read +ffffffff825f3004 r icl_mg_pll_find_divisors.div1_vals +ffffffff825f3034 r athn_ac2qid +ffffffff825f3034 r athn_ac2qid +ffffffff825f3034 r athn_ac2qid +ffffffff825f3040 r rtwn_get_rssi.cckoff +ffffffff825f3068 r rsu_ac2qid +ffffffff825f3078 r pckbc_portcmd +ffffffff825f307c r tht_fifo_write_pad.pad +ffffffff825f3084 r rsu_get_rssi.cckoff +ffffffff825f30a4 r adlp_n_revids +ffffffff825f30e8 r apple_iso_trans +ffffffff825f30f0 r wihap_check_tx.txratetable +ffffffff825f30f4 r dmamode +ffffffff825f3118 r gen9_edram_size_mb.sets +ffffffff825f312c r dg2_g12_revid_step_tbl +ffffffff825f4000 r isomappings +ffffffff825f4080 r unimappings +ffffffff825f4230 r replacements +ffffffff825f78b4 r apollo_pio_rec +ffffffff82643914 r apollo_udma33_tim +ffffffff826589cb r pp_r600_decoded_lanes +ffffffff8268e560 r cmd680_setup_channel.udma_tbl +ffffffff82696918 r apollo_udma100_tim +ffffffff8269691e r cmd0646_9_tim_udma +ffffffff826a4cff r substchar +ffffffff826fa1ce r apollo_udma133_tim +ffffffff826fa1d5 r apollo_udma66_tim +ffffffff826fa1ff r cy_pio_rec +ffffffff826ff8d8 R drm_ca +ffffffff826ff900 R drm_filtops +ffffffff826ff930 R drmread_filtops +ffffffff82700000 r vga_emulops +ffffffff82700048 R vga_stdscreen +ffffffff82700078 R vga_stdscreen_mono +ffffffff827000a8 R vga_stdscreen_bf +ffffffff827000d8 R vga_40lscreen +ffffffff82700108 R vga_40lscreen_mono +ffffffff82700138 R vga_40lscreen_bf +ffffffff82700168 R vga_50lscreen +ffffffff82700198 R vga_50lscreen_mono +ffffffff827001c8 R vga_50lscreen_bf +ffffffff827001f8 R vga_screenlist +ffffffff82700208 R vga_screenlist_mono +ffffffff82700218 R vga_accessops +ffffffff82700278 r i945_wm_info +ffffffff827002b8 r bgansitopc +ffffffff827002c0 r pctoansi +ffffffff82700300 r sdma_offsets +ffffffff82700300 r sdma_offsets +ffffffff82700338 r iha_rate_tbl +ffffffff82700370 r i830_a_wm_info +ffffffff827003a8 r gen9_edram_size_mb.ways +ffffffff82700408 r aggr_periodic_times +ffffffff82700500 r michael_final.pad +ffffffff82700528 r rt_copysa.maskarray +ffffffff82700530 r i915_wm_info +ffffffff82700538 r amdgpu_ih_clientid_jpeg +ffffffff82700538 r amdgpu_ih_clientid_uvds +ffffffff82700538 r amdgpu_ih_clientid_vcns +ffffffff82700538 r amdgpu_ih_clientid_vcns +ffffffff82700538 r amdgpu_ih_clientid_vcns +ffffffff82700568 r jsl_ehl_revids +ffffffff82700578 r vga_setfontset.cmaptabb +ffffffff827005e8 r i830_bc_wm_info +ffffffff82700650 r hsw_activate_psr2.map +ffffffff82700658 r tgl_revids +ffffffff82700690 r __drm_universal_plane_init.default_modifiers +ffffffff827006a0 r iwn_tid2fifo +ffffffff827006b8 r vga_setfontset.cmaptaba +ffffffff827006c0 r crtc_offsets +ffffffff827006c0 r crtc_offsets +ffffffff827006c0 r crtc_offsets +ffffffff82700768 r rtwn_r88e_get_rssi.cckoff +ffffffff82701000 R edid_vendors +ffffffff827012c0 R edid_nvendors +ffffffff827012d0 R edid_products +ffffffff82701330 R edid_nproducts +ffffffff82701340 r _edid_modes +ffffffff82702000 R videomode_list +ffffffff82703080 R videomode_count +ffffffff82704000 r ahc_hard_errors +ffffffff82704080 r critical_sections +ffffffff827040b0 r patches +ffffffff82704d50 r seqprog +ffffffff82706000 r ahc_switch +ffffffff82707000 r termstat_strings +ffffffff82707020 r critical_sections +ffffffff82707060 r seqprog +ffffffff82707d50 r patches +ffffffff82709000 r ahd_switch +ffffffff8270a000 R aic_switch +ffffffff8270b000 R adw_switch +ffffffff8270c000 R gdt_switch +ffffffff8270d000 R twe_switch +ffffffff8270e000 R ciss_switch +ffffffff8270e030 R ciss_level +ffffffff8270e050 R ciss_stat +ffffffff8270f000 R ami_switch +ffffffff8270f028 R ami_raw_switch +ffffffff82710000 R mfi_switch +ffffffff82710028 R mfi_pd_switch +ffffffff82710050 r mfi_iop_xscale +ffffffff82710080 r mfi_iop_ppc +ffffffff827100b0 r mfi_iop_gen2 +ffffffff827100e0 r mfi_iop_skinny +ffffffff82710110 r mfi_bbu_indicators +ffffffff82711000 R qlw_switch +ffffffff82712000 R isp_2100_risc_code +ffffffff82724bf0 R isp_2200_risc_code +ffffffff82737990 R isp_2300_risc_code +ffffffff82751408 R qla_switch +ffffffff82751430 r qla_regs_2100 +ffffffff82751460 r qla_regs_2200 +ffffffff82751490 r qla_regs_23XX +ffffffff82752000 R ahci_atascsi_methods +ffffffff82753000 R nvme_switch +ffffffff82753028 r nvme_ops +ffffffff82754000 R mpi_switch +ffffffff82754060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff82754090 r chv_oa_mux_regs +ffffffff827540b0 r fiji_clock_stretcher_lookup_table +ffffffff827540b0 r tonga_clock_stretcher_lookup_table +ffffffff827540d0 r iosf_pci_devices +ffffffff827540f0 r link_speed +ffffffff827540f0 r link_speed +ffffffff82754130 r drm_fb_xfrm.default_dst_pitch +ffffffff82754130 r non_supported_protection +ffffffff82754140 r tgl_uy_revids +ffffffff827542a0 r bwi_phy_noise_11g_rev1 +ffffffff82754310 r cardslot_process_event.antonym_ev +ffffffff827543a0 r gen11_oa_mux_regs +ffffffff82754440 r dpia_to_preferred_enc_id_table +ffffffff827544b0 r ddr2_cycle_tenths +ffffffff82754520 r rtw_intr_rx.ratetbl +ffffffff827545a0 r abm_config +ffffffff82754620 r getbootinfo.ports +ffffffff82754670 r reg_offsets +ffffffff82754680 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff82754690 r glk_revids +ffffffff827546a0 r init_non_clock_fields.look_up +ffffffff827546b0 r uftdi_8u232am_getrate.roundoff +ffffffff82754710 r zyd_rx_data.rates +ffffffff82754730 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff82754760 r intel_engine_init_tlb_invalidation.gen8_regs +ffffffff82754790 r bwi_phy_noise_11g +ffffffff827547a0 r hpt366_pio +ffffffff82754800 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff82754820 r ether_crc32_be_update.rev +ffffffff82754820 r rtw_grf5101_mac_crypt.caesar +ffffffff82754870 r snb_b_fdi_train_param +ffffffff82754940 r intel_hpll_vco.elk_vco +ffffffff82754960 r icl_revids +ffffffff827549c0 r pin_offsets +ffffffff827549e0 r amdgpu_ih_srcid_jpeg +ffffffff82754a20 r firmware_list +ffffffff82754a80 r atom_arg_shift +ffffffff82754a80 r atom_arg_shift +ffffffff82754ac0 r pf_syncookie_wstab +ffffffff82754ae0 r ieee80211_media_init.mopts +ffffffff82754b40 r add_entropy_words.twist_table +ffffffff82754be0 r urtw_8225v2_txpwr_cck +ffffffff82754c00 r bwfm_pci_prio2fifo +ffffffff82754c00 r ieee80211_up_to_ac.up_to_ac +ffffffff82754cc0 r paritytab +ffffffff82754cc0 r x86emu_parity_tab +ffffffff82754ce0 r legacy_connector_convert +ffffffff82754d20 r gen7_oa_mux_regs +ffffffff82754d40 r hsw_oa_mux_regs +ffffffff82754d60 r notetab +ffffffff82754d80 r urtw_8225v2_txpwr_cck_ch14 +ffffffff82754da0 r bwi_rf_calibval.rf_calibvals +ffffffff82754e40 r pf_syncookie_msstab +ffffffff82754ea0 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff82754f00 r uath_wme_init.uath_wme_11g +ffffffff82754f40 r gen7_oa_b_counters +ffffffff82755140 r rtwn_iq_calib_run.reg_adda +ffffffff82755180 r atom_def_dst +ffffffff82755180 r atom_def_dst +ffffffff827551c0 r sha256_initial_hash_value +ffffffff82755220 r otus_edca_def +ffffffff82755240 r intel_hpll_vco.blb_vco +ffffffff82755320 r epic_pci_subsys_info +ffffffff82755340 r kbl_revids +ffffffff82755360 r atom_arg_mask +ffffffff82755360 r atom_arg_mask +ffffffff827553c0 r butmap +ffffffff82755400 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff82755440 r comsoft.lsrmap +ffffffff82755480 r xgmi3x16_pcs_err_noncorrectable_mask_reg_aldebaran +ffffffff827554a0 r tulip_mii_phy_readspecific.table +ffffffff82755540 r intel_hpll_vco.pnv_vco +ffffffff827555a0 r dmapageport +ffffffff82755660 r intel_hpll_vco.ctg_vco +ffffffff82755720 r drm_calculate_luminance_range.pre_computed_values +ffffffff82756000 R sili_atascsi_methods +ffffffff82757000 R ncr53c9x_switch +ffffffff82758000 r scf_period +ffffffff82759000 R siop_script +ffffffff827595a0 R lun_switch +ffffffff827595d0 R tag_switch +ffffffff82759660 R load_dsa +ffffffff827596c4 R siop_led_on +ffffffff827596cc R siop_led_off +ffffffff827596d8 R siop_switch +ffffffff8275a000 R ep_vortex_media +ffffffff8275a100 R ep_default_to_media +ffffffff8275b000 R wi_card_ident +ffffffff8275d000 R ucode_table +ffffffff8275e000 r re_revisions +ffffffff8275e290 r re_kstats_tpl +ffffffff82760000 R smc91cxx_media +ffffffff82760010 R smc91cxx_mii_bitbang_ops +ffffffff82761000 R dl10019_mii_bitbang_ops +ffffffff82761028 R dl10022_mii_bitbang_ops +ffffffff82762000 R ax88190_mii_bitbang_ops +ffffffff82764000 R ac97_audio_default +ffffffff82764020 R ac97_on_off +ffffffff82764324 R ac97_mic_select +ffffffff82764628 R ac97_mono_select +ffffffff8276492c R ac97_source +ffffffff82764c30 R ac97_volume_stereo +ffffffff82764c4c R ac97_volume_mono +ffffffff82764c70 R source_info +ffffffff82765470 R ac97_ad +ffffffff82765580 R ac97_ak +ffffffff82765610 R ac97_av +ffffffff82765750 R ac97_rl +ffffffff827657a0 R ac97_cm +ffffffff82765820 R ac97_cr +ffffffff82765840 R ac97_cs +ffffffff82765920 R ac97_cx +ffffffff82765980 R ac97_dt +ffffffff827659a0 R ac97_em +ffffffff827659d0 R ac97_es +ffffffff827659f0 R ac97_is +ffffffff82765a10 R ac97_ic +ffffffff82765a90 R ac97_it +ffffffff82765ac0 R ac97_ns +ffffffff82765b80 R ac97_ps +ffffffff82765bb0 R ac97_sl +ffffffff82765bd0 R ac97_st +ffffffff82765d20 R ac97_vi +ffffffff82765d50 R ac97_tt +ffffffff82765dd0 R ac97_ti +ffffffff82765df0 R ac97_wb +ffffffff82765e10 R ac97_wo +ffffffff82765ea0 R ac97_ym +ffffffff82765ef0 R ac97_vendors +ffffffff827661f0 R ac97enhancement +ffffffff827662f0 R ac97feature +ffffffff82767000 R lm_chips +ffffffff82767020 R lm78_sensors +ffffffff827671a0 R w83627hf_sensors +ffffffff827673a0 R w83627ehf_sensors +ffffffff827675c0 R w83627dhg_sensors +ffffffff827677c0 R nct6776f_sensors +ffffffff82767a00 R nct6779d_sensors +ffffffff82767d60 R w83637hf_sensors +ffffffff82767f20 R w83697hf_sensors +ffffffff827680c0 R w83781d_sensors +ffffffff82768280 R w83782d_sensors +ffffffff82768480 R w83783s_sensors +ffffffff82768600 R w83791d_sensors +ffffffff82768860 R w83792d_sensors +ffffffff82768ae0 R as99127f_sensors +ffffffff82769000 r ar5k_known_products +ffffffff82769110 r ar5111_gain_opt +ffffffff827691e0 r ar5112_gain_opt +ffffffff827692b0 r ar5k_5ghz_channels +ffffffff82769a00 r ar5k_2ghz_channels +ffffffff82769f10 r ar5111_rf +ffffffff8276a350 r ar5112a_rf +ffffffff8276a890 r ar5112_rf +ffffffff8276ada0 r ar5413_rf +ffffffff8276b1b0 r ar2413_rf +ffffffff8276b4d0 r ar2425_rf +ffffffff8276b830 r ar5111_rfg +ffffffff8276bb30 r ar5112_rfg +ffffffff8276be30 r ar5413_rfg +ffffffff8276c130 r ar2413_rfg +ffffffff8276c430 r ar5k_rt_11a +ffffffff8276c552 r ar5k_rt_11b +ffffffff8276c674 r ar5k_rt_11g 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ehci_confd +ffffffff82794175 R ehci_ifcd +ffffffff8279417e R ehci_endpd +ffffffff82794185 R ehci_hubd +ffffffff82795000 R xhci_bus_methods +ffffffff82795030 R xhci_root_ctrl_methods +ffffffff82795060 R xhci_root_intr_methods +ffffffff82795090 R xhci_device_ctrl_methods +ffffffff827950c0 R xhci_device_intr_methods +ffffffff827950f0 R xhci_device_bulk_methods +ffffffff82795120 R xhci_device_isoc_methods +ffffffff82795150 R xhci_devd +ffffffff82795162 R xhci_confd +ffffffff8279516b R xhci_ifcd +ffffffff82795174 R xhci_endpd +ffffffff8279517b R xhci_endpcd +ffffffff82795181 R xhci_hubd +ffffffff82798000 R radio_ca +ffffffff82799000 R ipmi_ca +ffffffff8279a000 R vscsi_ca +ffffffff8279a028 R vscsi_switch +ffffffff8279a050 R vscsi_filtops +ffffffff8279b000 R mpath_ca +ffffffff8279b028 R mpath_switch +ffffffff8279c000 R softraid_ca +ffffffff8279c028 R sr_switch +ffffffff8279d000 r spdmem_basic_types +ffffffff8279d0a0 r spdmem_parity_types +ffffffff8279d0e0 r spdmem_ddr4_decode.ddr4_chipsize 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lintomulaw +ffffffff827ae000 R randomread_filtops +ffffffff827ae030 R randomwrite_filtops +ffffffff827af000 R video_ca +ffffffff827af028 R video_filtops +ffffffff827b0000 R cd9660_vfsops +ffffffff827b1000 R cd9660_vops +ffffffff827b1110 R cd9660_specvops +ffffffff827b1220 R cd9660_fifovops +ffffffff827b1330 R cd9660read_filtops +ffffffff827b1360 R cd9660write_filtops +ffffffff827b1390 R cd9660vnode_filtops +ffffffff827b2000 R udf_vfsops +ffffffff827b3000 R udf_vops +ffffffff827b3110 r mon_lens +ffffffff827b4000 r month_days +ffffffff827b5000 R execsw +ffffffff827b6000 r shstrtab +ffffffff827b7000 R copyright +ffffffff827b70c0 r initpaths +ffffffff827b8000 R sysent +ffffffff827ba000 R bufq_impls +ffffffff827bb000 R kqueueops +ffffffff827bb038 R kqread_filtops +ffffffff827bb068 R proc_filtops +ffffffff827bb098 R file_filtops +ffffffff827bb0c8 R timer_filtops +ffffffff827bb100 R sysfilt_ops +ffffffff827bb148 R seltrue_filtops +ffffffff827bb178 R dead_filtops +ffffffff827bb1a8 R badfd_filtops +ffffffff827bb1d8 r mutex_klistops +ffffffff827bb1f0 r rwlock_klistops +ffffffff827bc000 R kv_exec +ffffffff827bd000 R addrmask +ffffffff827be000 r rw_ops +ffffffff827bf000 r proc_printit.pstat +ffffffff827c0000 R pledge_syscalls +ffffffff827c0a60 r pledgenames +ffffffff827c0cb0 r pledgereq +ffffffff827c1000 r unvname_rbt_RBT_INFO +ffffffff827c1018 R unvname_rbt_RBT_TYPE +ffffffff827c2000 R sig_filtops +ffffffff827c2030 R sigprop +ffffffff827c3000 R kern_vars +ffffffff827c32f0 R hw_vars +ffffffff827c4000 R tc_vars +ffffffff827c5000 r sys_gettimeofday.zerotz +ffffffff827c6000 r taskq_sys_name +ffffffff827c6006 r taskq_sys_mp_name +ffffffff827c6010 R systq +ffffffff827c6018 R systqmp +ffffffff827c8000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff827c8010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff827c8020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff827c8030 r gpt_get_fstype.gpt_uuid_linux +ffffffff827c8040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff827c8050 r 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eb_tree_RBT_TYPE +ffffffff827f1000 r veb_etherbridge_ops +ffffffff827f1028 r veb_pf_ipv4 +ffffffff827f1040 r veb_pf_ipv6 +ffffffff827f2000 r pipex_pppoe_padding +ffffffff827f3000 r rn_addmask.normal_chars +ffffffff827f4000 R route_src +ffffffff827f4010 R route_usrreqs +ffffffff827f40b8 R routedomain +ffffffff827f4100 R routesw +ffffffff827f5000 R gre_vars +ffffffff827f5030 r mgre_tree_RBT_INFO +ffffffff827f5048 R mgre_tree_RBT_TYPE +ffffffff827f5050 r egre_tree_RBT_INFO +ffffffff827f5068 R egre_tree_RBT_TYPE +ffffffff827f5070 r nvgre_ucast_tree_RBT_INFO +ffffffff827f5088 R nvgre_ucast_tree_RBT_TYPE +ffffffff827f5090 r nvgre_mcast_tree_RBT_INFO +ffffffff827f50a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff827f50b0 r eoip_tree_RBT_INFO +ffffffff827f50c8 R eoip_tree_RBT_TYPE +ffffffff827f50d0 r nvgre_etherbridge_ops +ffffffff827f6000 r trunk_protos +ffffffff827f7000 R ethermulticastaddr_slowprotocols +ffffffff827f7006 R lacp_info_tlv_template +ffffffff827f700e R marker_info_tlv_template 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ufsvnode_filtops +ffffffff82837000 R ext2fs_vfsops +ffffffff82837070 r incompat +ffffffff82838000 R ext2fs_vops +ffffffff82838110 R ext2fs_specvops +ffffffff82838220 R ext2fs_fifovops +ffffffff82839000 R uaddr_kernel_functions +ffffffff82839030 R uaddr_rnd_functions +ffffffff82839060 R uaddr_bestfit_functions +ffffffff82839090 R uaddr_pivot_functions +ffffffff828390c0 R uaddr_stack_brk_functions +ffffffff828390f0 r uaddr_free_rbtree_RBT_INFO +ffffffff82839108 R uaddr_free_rbtree_RBT_TYPE +ffffffff8283a000 R aobj_pager +ffffffff8283b000 R uvm_deviceops +ffffffff8283c000 R kv_any +ffffffff8283c018 R kv_intrsafe +ffffffff8283c030 R kv_page +ffffffff8283c048 R kp_dirty +ffffffff8283c070 R kp_dma +ffffffff8283c098 R kp_dma_contig +ffffffff8283c0c0 R kp_dma_zero +ffffffff8283c0e8 R kp_zero +ffffffff8283c110 R kp_pageable +ffffffff8283c138 R kp_none +ffffffff8283c160 R kd_waitok +ffffffff8283c178 R kd_nowait +ffffffff8283c190 R kd_trylock +ffffffff8283d000 R vmmapbsy +ffffffff8283d010 r page_flagbits +ffffffff8283d0a8 r uvm_map_addr_RBT_INFO +ffffffff8283d0c0 R uvm_map_addr_RBT_TYPE +ffffffff8283e000 R pmap_pager +ffffffff8283e048 R bufcache_pager +ffffffff8283f000 r uvm_objtree_RBT_INFO +ffffffff8283f018 R uvm_objtree_RBT_TYPE +ffffffff82840000 r uvm_pmr_addr_RBT_INFO +ffffffff82840018 R uvm_pmr_addr_RBT_TYPE +ffffffff82840020 r uvm_pmr_size_RBT_INFO +ffffffff82840038 R uvm_pmr_size_RBT_TYPE +ffffffff82840040 r uvm_pmemrange_addr_RBT_INFO +ffffffff82840058 R uvm_pmemrange_addr_RBT_TYPE +ffffffff82841000 R uvm_vnodeops +ffffffff82841048 r uvn_flush.interval +ffffffff82842000 R zeroin6_addr +ffffffff82843000 R in6addr_any +ffffffff82843010 R in6addr_loopback +ffffffff82843020 R in6addr_intfacelocal_allnodes +ffffffff82843030 R in6addr_linklocal_allnodes +ffffffff82843040 R in6addr_linklocal_allrouters +ffffffff82843050 R in6mask0 +ffffffff82843060 R in6mask32 +ffffffff82843070 R in6mask64 +ffffffff82843080 R in6mask96 +ffffffff82843090 R in6mask128 +ffffffff828430a0 R sa6_any +ffffffff82844000 R divert6ctl_vars +ffffffff82844030 R divert6_usrreqs +ffffffff82845000 R inet6domain +ffffffff82845050 R inet6sw +ffffffff82846000 R icmpv6ctl_vars +ffffffff82847000 R inet6ctlerrmap +ffffffff82847020 R ipv6ctl_vars +ffffffff82848000 R rip6_usrreqs +ffffffff82849000 R pfkey_addr +ffffffff82849010 R pfkeyv2_usrreqs +ffffffff828490b8 R pfkeydomain +ffffffff82849100 R pfkeysw +ffffffff82849160 r ealgs +ffffffff82849190 r aalgs +ffffffff828491c0 r calgs +ffffffff8284a000 R sadb_exts_allowed_out +ffffffff8284a090 R sadb_exts_required_out +ffffffff8284c000 r opc82_byte_operation +ffffffff8284c040 r opc83_long_operation +ffffffff8284c080 r opc83_word_operation +ffffffff8284c0c0 r opcD0_byte_operation +ffffffff8284c100 r opcD1_long_operation +ffffffff8284c140 r opcD1_word_operation +ffffffff8284d000 r crc_table +ffffffff8284d400 r crc_braid_table +ffffffff8284f400 r x2n_table +ffffffff82850000 r inflateBack.order +ffffffff82850030 r fixedtables.lenfix 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cpu_ecpuid_features +ffffffff8285a260 R cpu_cpuid_ecxfeatures +ffffffff8285a450 R cpu_ecpuid_ecxfeatures +ffffffff8285a5d0 R cpu_seff0_ebxfeatures +ffffffff8285a7a0 R cpu_seff0_ecxfeatures +ffffffff8285a800 R cpu_seff0_edxfeatures +ffffffff8285a8a0 R cpu_tpm_eaxfeatures +ffffffff8285a8c0 R cpu_cpuid_perf_eax +ffffffff8285a8d0 R cpu_cpuid_apmi_edx +ffffffff8285a8f0 R cpu_amdspec_ebxfeatures +ffffffff8285a9a0 R cpu_xsave_extfeatures +ffffffff8285a9f0 R cpu_arch_cap_features +ffffffff8285b000 R sigcode +ffffffff8285b014 R sigcodecall +ffffffff8285b016 R sigcoderet +ffffffff8285b038 R esigcode +ffffffff8285b038 R sigfill +ffffffff8285b039 R sigfillsiz +ffffffff8285b039 r esigfill +ffffffff8285b03d r bogus_proc_pmap +ffffffff8285b070 r spl_lowered +ffffffff8285b0a6 r intr_spl_lowered +ffffffff8285b113 R _xrstor +ffffffff8285b117 R _xrstors +ffffffff8285b11b R _xsave +ffffffff8285b11f R _xsaves +ffffffff8285b123 R _xsaveopt +ffffffff8285b127 R _pcid_set_reuse +ffffffff8285b133 R _jmprax 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scsi_quirk_patterns +ffffffff82890000 R cd_ca +ffffffff82890030 R cd_patterns +ffffffff82891000 R ch_ca +ffffffff82891030 R ch_patterns +ffffffff82892000 R sd_ca +ffffffff82892030 R sd_patterns +ffffffff82893000 R st_quirk_patterns +ffffffff82893210 R st_ca +ffffffff82893240 R st_patterns +ffffffff82894000 R uk_ca +ffffffff82895000 R safte_ca +ffffffff82896000 R ses_ca +ffffffff82897000 R sym_ca +ffffffff82897028 R sym_mpath_sym_ops +ffffffff82897048 R sym_mpath_asym_ops +ffffffff82898000 R rdac_ca +ffffffff82898028 R rdac_mpath_ops +ffffffff82899000 R emc_ca +ffffffff82899028 R emc_mpath_ops +ffffffff8289a000 R hds_ca +ffffffff8289a028 R hds_mpath_ops +ffffffff8289b000 R atapiscsi_ca +ffffffff8289b028 r atapiscsi_switch +ffffffff8289c000 R wd_ca +ffffffff8289d000 R atascsi_switch +ffffffff8289e000 R mainbus_ca +ffffffff8289f000 R bios_ca +ffffffff828a0000 R mpbios_ca +ffffffff828a0030 r loc_where +ffffffff828a1000 R mpbios_icu_table +ffffffff828a2000 R cpu_ca +ffffffff828a3000 R lapic_timer_intrclock +ffffffff828a4000 R ioapic_ca +ffffffff828a5000 R efifb_ca +ffffffff828a5028 R efifb_screen_list +ffffffff828a6000 R pvbus_ca +ffffffff828a7000 R pvclock_ca +ffffffff828a8000 R vmt_ca +ffffffff828a9000 R xen_ca +ffffffff828aa000 R xs_errors +ffffffff828ab000 R xnf_ca +ffffffff828ac000 R xbf_ca +ffffffff828ac028 R xbf_switch +ffffffff828ad000 R hyperv_ca +ffffffff828ad028 R hv_guid_network +ffffffff828ad038 R hv_guid_ide +ffffffff828ad048 R hv_guid_scsi +ffffffff828ad058 R hv_guid_shutdown +ffffffff828ad068 R hv_guid_timesync +ffffffff828ad078 R hv_guid_heartbeat +ffffffff828ad088 R hv_guid_kvp +ffffffff828ae000 r kvp_pools +ffffffff828af000 R hvn_ca +ffffffff828b0000 R hvs_ca +ffffffff828b0028 R hvs_switch +ffffffff828b1000 r virtio_device_name +ffffffff828b2000 R vio_ca +ffffffff828b2030 r virtio_net_feature_names +ffffffff828b3000 R vioblk_ca +ffffffff828b3028 R vioblk_switch +ffffffff828b4000 R viomb_ca +ffffffff828b4030 r viomb_feature_names +ffffffff828b5000 R viornd_ca +ffffffff828b6000 R vioscsi_ca +ffffffff828b6028 R vioscsi_switch +ffffffff828b6050 R vioscsi_vq_names +ffffffff828b7000 R vmmci_ca +ffffffff828b8000 R pci_ca +ffffffff828b9000 r pci_quirks +ffffffff828ba000 R pci_subclass_prehistoric +ffffffff828ba050 R pci_subclass_mass_storage +ffffffff828ba160 R pci_subclass_network +ffffffff828ba250 R pci_subclass_display +ffffffff828ba2d0 R pci_subclass_multimedia +ffffffff828ba360 R pci_subclass_memory +ffffffff828ba3c0 R pci_subclass_bridge +ffffffff828ba510 R pci_subclass_communications +ffffffff828ba5d0 R pci_subclass_system +ffffffff828ba6c0 R pci_subclass_input +ffffffff828ba770 R pci_subclass_dock +ffffffff828ba7c0 R pci_subclass_processor +ffffffff828ba880 R pci_subclass_serialbus +ffffffff828ba990 R pci_subclass_wireless +ffffffff828baa70 R pci_subclass_i2o +ffffffff828baaa0 R pci_subclass_satcom +ffffffff828bab20 R pci_subclass_crypto +ffffffff828bab80 R pci_subclass_dasp +ffffffff828bac10 R pci_class +ffffffff828bae20 r pci_known_vendors +ffffffff828bc3e0 r pci_known_products +ffffffff828df000 R vga_pci_ca +ffffffff828df030 r vga_devs +ffffffff828e0000 R ahc_pci_ident_table +ffffffff828e05d0 R ahc_pci_ca +ffffffff828e1000 R ahd_pci_ident_table +ffffffff828e1198 R ahd_num_pci_devs +ffffffff828e11a0 R ahd_pci_ca +ffffffff828e11d0 r pci_bus_modes +ffffffff828e1210 r pci_status_strings +ffffffff828e1250 r pci_status_source +ffffffff828e1290 r split_status_strings +ffffffff828e2000 R adw_pci_ca +ffffffff828e2028 R adw_pci_devices +ffffffff828e3000 r adw_3550_Default_EEPROM +ffffffff828e3080 r adw_38C0800_Default_EEPROM +ffffffff828e3100 r adw_38C1600_Default_EEPROM +ffffffff828e4000 R adw_asc3550_mcode +ffffffff828e53a0 R adw_asc3550_mcode_data +ffffffff828e53b0 R adw_asc38C0800_mcode +ffffffff828e6888 R adw_asc38C0800_mcode_data +ffffffff828e68a0 R adw_asc38C1600_mcode +ffffffff828e8160 R adw_asc38C1600_mcode_data +ffffffff828e9000 R twe_pci_ca +ffffffff828e9028 R twe_pci_devices +ffffffff828ea000 R arc_ca +ffffffff828ea028 R arc_switch +ffffffff828ea050 r arc_devices +ffffffff828ea190 r arc_intel +ffffffff828ea198 r arc_marvell +ffffffff828ea1a0 r arc_lsi +ffffffff828ea1a8 r arc_marvell2 +ffffffff828eb000 R jmb_ca +ffffffff828eb030 r jmb_devices +ffffffff828ec000 R ahci_pci_ca +ffffffff828ec028 R ahci_jmb_ca +ffffffff828ec050 r ahci_devices +ffffffff828ed000 R nvme_pci_ca +ffffffff828ed028 r nvme_msi_blacklist +ffffffff828ee000 R ami_pci_ca +ffffffff828ee030 r ami_pci_subsys +ffffffff828ee270 r ami_pci_vendors +ffffffff828ef000 R mfi_pci_ca +ffffffff828ef030 r mfi_pci_devices +ffffffff828f0000 R mfii_ca +ffffffff828f0028 R mfii_switch +ffffffff828f0050 R mfii_pd_switch +ffffffff828f0078 R mfii_iop_thunderbolt +ffffffff828f0088 R mfii_iop_25 +ffffffff828f0098 R mfii_iop_35 +ffffffff828f00b0 R mfii_devices +ffffffff828f0140 r mfi_bbu_indicators +ffffffff828f1000 R ips_ca +ffffffff828f1028 r ips_ids +ffffffff828f1040 r ips_chips +ffffffff828f1090 r ips_names +ffffffff828f1128 r ips_switch +ffffffff828f1150 r ips_pt_switch +ffffffff828f2000 R eap_ca +ffffffff828f2028 R eap1370_hw_if +ffffffff828f20e0 R eap1371_hw_if +ffffffff828f2198 R eap_midi_hw_if +ffffffff828f21d0 R eap_devices +ffffffff828f3000 R auacer_pci_devices +ffffffff828f3008 R auacer_ca +ffffffff828f3030 R auacer_hw_if +ffffffff828f4000 R auich_ca +ffffffff828f4028 R auich_hw_if +ffffffff828f40e0 r auich_devices +ffffffff828f5000 R azalia_ca +ffffffff828f5028 R azalia_hw_if +ffffffff828f50e0 R azalia_pci_devices +ffffffff828f5120 r pin_devices +ffffffff828f51a0 r line_colors +ffffffff828f5220 r wtypes +ffffffff828f6000 r azalia_codec_init_dolby_atmos.atmos_init +ffffffff828f6050 r azalia_codec_init_dolby_atmos.atmos_v23_v25 +ffffffff828f7000 R envy_ca +ffffffff828f7028 R envy_hw_if +ffffffff828f70e0 R envy_midi_hw_if +ffffffff828f8000 R emuxki_devices +ffffffff828f8010 R emu_ca +ffffffff828f8038 R emuxki_hw_if +ffffffff828f80f0 r emuxki_recbuf_sz +ffffffff828f8170 r emuxki_recsrc_szreg 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tulip_21040_auibnc_only_boardsw +ffffffff8297b2d0 r tulip_21140_cogent_em100_boardsw +ffffffff8297b2f8 r tulip_21140_accton_boardsw +ffffffff8297b320 r tulip_21140_eb_boardsw +ffffffff8297b348 r tulip_21041_boardsw +ffffffff8297b370 r tulip_read_macaddr.testpat +ffffffff8297b380 r tulip_vendors +ffffffff8297b430 r tulip_media_to_ifmedia +ffffffff8297b490 r tulip_chipdescs +ffffffff8297c000 R ep_pci_ca +ffffffff8297c030 R ep_pci_devices +ffffffff8297d000 R pcn_ca +ffffffff8297d028 R pcn_devices +ffffffff8297d030 r pcn_79c970_rcvfw +ffffffff8297d050 r pcn_79c970_xmtsp +ffffffff8297d070 r pcn_79c970_xmtfw +ffffffff8297d090 r pcn_79c971_rcvfw +ffffffff8297d0b0 r pcn_79c971_xmtsp_sram +ffffffff8297d0d0 r pcn_79c971_xmtsp +ffffffff8297d0f0 r pcn_79c971_xmtfw +ffffffff8297d110 r pcn_variants +ffffffff8297e000 R siop_products +ffffffff8297f000 R siop_pci_ca +ffffffff82980000 R rdcide_setup +ffffffff82980005 R rdcide_hold +ffffffff8298000a R rdcide_udmatim +ffffffff82980010 R rdcide_udmaclk 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apollo_pio_set +ffffffff8298119b r cmd0643_9_data_tim_pio +ffffffff829811a0 r cmd0643_9_data_tim_dma +ffffffff829811a3 r cmd680_channel_map.init_val +ffffffff829811b1 r cmd680_setup_channel.udma2_tbl +ffffffff829811b8 r cmd680_setup_channel.dma_tbl +ffffffff829811be r cmd680_setup_channel.pio_tbl +ffffffff829811d0 r satalink_ba5_regmap +ffffffff82981690 r sii3114_chansetup.channel_names +ffffffff829816b0 r cy_pio_pulse +ffffffff829816c0 r sis_udma133new_tim +ffffffff829816e0 r sis_pio133new_tim +ffffffff829816f4 r sis_dma133new_tim +ffffffff82981700 r sis_udma66_tim +ffffffff82981706 r sis_udma100new_tim +ffffffff8298170c r sis_udma133old_tim +ffffffff82981713 r sis_pio_act +ffffffff82981718 r sis_pio_rec +ffffffff8298171d r natsemi_pio_pulse +ffffffff82981722 r natsemi_pio_recover +ffffffff82981727 r natsemi_dma_pulse +ffffffff8298172a r natsemi_dma_recover +ffffffff82981730 r scx200_udma33 +ffffffff8298173c r scx200_dma33 +ffffffff82981750 r scx200_pio33 +ffffffff82981778 r acer_udma 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cy_pci_devices +ffffffff82984000 R rl_pci_ca +ffffffff82984030 R rl_pci_devices +ffffffff82985000 R re_pci_devices +ffffffff82985030 R re_pci_ca +ffffffff82986000 R vr_ca +ffffffff82987000 R txp_ca +ffffffff82987030 R txp_devices +ffffffff82988000 r cards +ffffffff82989000 r format_params +ffffffff829891a0 r pixfmt_table +ffffffff82989320 r meteor_pixfmt_table +ffffffff8298a000 R bktr_ca +ffffffff8298a028 R bktr_hw_if +ffffffff8298b000 r tuners +ffffffff8298b170 r freqTable +ffffffff8298b260 r nabcst +ffffffff8298b2a0 r irccable +ffffffff8298b310 r hrccable +ffffffff8298b380 r weurope +ffffffff8298b420 r jpnbcst +ffffffff8298b460 r jpncable +ffffffff8298b4c0 r xussr +ffffffff8298b530 r australia +ffffffff8298b590 r france +ffffffff8298c000 R xl_pci_ca +ffffffff8298c030 R xl_pci_devices +ffffffff8298d000 R fxp_pci_ca +ffffffff8298d030 R fxp_pci_devices +ffffffff8298e000 R em_devices +ffffffff8298e308 R em_ca +ffffffff8298e330 r em_counters +ffffffff8298f000 r em_igp_cable_length_table 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+ffffffff82996018 R dwqe_pci_ca +ffffffff82997000 R xge_ca +ffffffff82997028 R xge_devices +ffffffff82997030 r xge_fix_mac +ffffffff82997110 r xge_xena_dtx_cfg +ffffffff82997170 r xge_herc_dtx_cfg +ffffffff82998000 R thtc_ca +ffffffff82998028 R tht_ca +ffffffff82998050 r thtc_devices +ffffffff82998068 r tht_link_state.interval +ffffffff82999000 R myx_ca +ffffffff82999028 R myx_devices +ffffffff8299a000 R oce_ca +ffffffff8299a030 R oce_devices +ffffffff8299b000 R dc_pci_ca +ffffffff8299c000 R epic_pci_ca +ffffffff8299c028 R epic_pci_devices +ffffffff8299d000 R ti_pci_ca +ffffffff8299d030 R ti_devices +ffffffff8299e000 R ne_pci_ca +ffffffff8299e030 R ne_pci_prod +ffffffff8299f000 R gem_pci_ca +ffffffff8299f030 R gem_pci_devices +ffffffff8299f050 r gem_promhdr +ffffffff8299f052 r gem_promdat +ffffffff8299f05a r gem_promdat2 +ffffffff829a0000 R cas_ca +ffffffff829a0028 R cas_pci_devices +ffffffff829a0030 r cas_promhdr +ffffffff829a0032 r cas_promdat_sun +ffffffff829a003a r cas_promdat_ns +ffffffff829a0042 r cas_promdat2 +ffffffff829a1000 R sf_pci_ca +ffffffff829a1028 R sf_pci_products +ffffffff829a2000 R sis_ca +ffffffff829a2028 R sis_devices +ffffffff829a3000 R se_devices +ffffffff829a3008 R se_ca +ffffffff829a4000 R mbg_ca +ffffffff829a4030 R mbg_devices +ffffffff829a5000 R uhci_pci_ca +ffffffff829a6000 R ohci_pci_ca +ffffffff829a7000 R ehci_pci_ca +ffffffff829a8000 R xhci_pci_ca +ffffffff829a9000 R cbb_pci_ca +ffffffff829a9028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff829aa000 R skc_devices +ffffffff829aa030 R skc_ca +ffffffff829aa058 R sk_ca +ffffffff829ab000 R mskc_devices +ffffffff829ab0a8 R mskc_ca +ffffffff829ab0d0 R msk_ca +ffffffff829ab100 r msk_mib +ffffffff829ac000 R puc_pci_ca +ffffffff829ad000 R puc_devs +ffffffff829b2000 R com_puc_ca +ffffffff829b2030 r puc_port_types +ffffffff829b3000 R lpt_puc_ca +ffffffff829b4000 R wi_pci_ca +ffffffff829b4030 r wi_pci_products +ffffffff829b5000 R an_pci_ca +ffffffff829b5030 R an_pci_devices +ffffffff829b6000 R iwi_devices +ffffffff829b6010 R iwi_ca +ffffffff829b7000 R wpi_ca +ffffffff829b7028 r wpi_devices +ffffffff829b7030 r wpi_rates +ffffffff829b7050 r wpi_rf_gain_5ghz +ffffffff829b70a0 r wpi_dsp_gain_5ghz +ffffffff829b70f0 r wpi_rf_gain_2ghz +ffffffff829b7140 r wpi_dsp_gain_2ghz +ffffffff829b7190 r wpi_pmgt +ffffffff829b7310 r wpi_bands +ffffffff829b8000 R iwn_mcs2ridx +ffffffff829b8020 R iwn_ca +ffffffff829b8050 r iwn_devices +ffffffff829b80e8 r iwn4965_sensitivity_limits +ffffffff829b8124 r iwn5000_sensitivity_limits +ffffffff829b8160 r iwn5150_sensitivity_limits +ffffffff829b819c r iwn1000_sensitivity_limits +ffffffff829b81d8 r iwn6000_sensitivity_limits +ffffffff829b8214 r iwn2000_sensitivity_limits +ffffffff829b8250 r iwn_fw_errmsg +ffffffff829b8340 r iwn4965_set_txpower.tdiv +ffffffff829b8360 r iwn4965_rf_gain_5ghz +ffffffff829b83d0 r iwn4965_dsp_gain_5ghz +ffffffff829b8440 r iwn4965_dsp_gain_2ghz +ffffffff829b84b0 r iwn_pmgt +ffffffff829b86f0 r iwn4965_post_alive.qid2fifo +ffffffff829b8700 r iwn_bands +ffffffff829b8770 r iwn_rates +ffffffff829b8820 r iwn4965_rf_gain_2ghz +ffffffff829b9000 R iwm_nvm_channels +ffffffff829b9030 R iwm_nvm_channels_8000 +ffffffff829b9070 R iwm_rates +ffffffff829b90d0 R iwm_ht_mcs2ridx +ffffffff829b9110 R iwm_tid_to_ac +ffffffff829b9118 R iwm_ac_to_tx_fifo +ffffffff829b9120 R iwm_nvm_to_read +ffffffff829b9144 r iwm_set_hw_address_8000.reserved_mac +ffffffff829b9180 r iwm_sf_full_timeout +ffffffff829b91b0 r iwm_sf_full_timeout_def +ffffffff829b91e0 r advanced_lookup +ffffffff829b9320 r iwm_devices +ffffffff829b9360 R iwm_ca +ffffffff829ba000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff829ba020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff829ba040 R iwx_qu_b0_hr1_b0 +ffffffff829ba060 R iwx_qu_b0_hr_b0 +ffffffff829ba080 R iwx_ax201_cfg_qu_hr +ffffffff829ba0a0 R iwx_qu_c0_hr1_b0 +ffffffff829ba0c0 R iwx_qu_c0_hr_b0 +ffffffff829ba0e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff829ba100 R iwx_quz_a0_hr1_b0 +ffffffff829ba120 R iwx_ax201_cfg_quz_hr +ffffffff829ba140 R iwx_cfg_so_a0_hr_b0 +ffffffff829ba160 R iwx_cfg_quz_a0_hr_b0 +ffffffff829ba180 R iwx_2ax_cfg_so_gf_a0 +ffffffff829ba1a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff829ba1c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff829ba1e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff829ba200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff829ba220 R iwx_2ax_cfg_so_jf_b0 +ffffffff829ba240 R iwx_nvm_channels_8000 +ffffffff829ba280 R iwx_rates +ffffffff829ba2e0 R iwx_mcs2ridx +ffffffff829ba320 R iwx_tid_to_ac +ffffffff829ba328 R iwx_ac_to_tx_fifo +ffffffff829ba330 r iwx_nvm_channels_uhb +ffffffff829ba39e r iwx_is_valid_mac_addr.reserved_mac +ffffffff829ba3b0 r iwx_sf_full_timeout +ffffffff829ba3e0 r iwx_sf_full_timeout_def +ffffffff829ba410 r advanced_lookup +ffffffff829ba550 r iwx_devices +ffffffff829ba590 r iwx_dev_info_table +ffffffff829bae18 R iwx_ca +ffffffff829bb000 R cmpci_ca +ffffffff829bb028 R cmpci_hw_if +ffffffff829bb0e0 r cmpci_rate_table +ffffffff829bb120 R cmpci_devices +ffffffff829bb130 r cmpci_query_devinfo.mixer_port_names +ffffffff829bb160 r cmpci_query_devinfo.mixer_classes +ffffffff829bc000 R iha_pci_ca +ffffffff829bc028 R iha_switch +ffffffff829bd000 R pcscp_ca +ffffffff829be000 R bge_ca +ffffffff829be030 R bge_devices +ffffffff829be1b0 r bge_revisions +ffffffff829be610 r bge_majorrevs +ffffffff829be790 r bge_kstat_tpl +ffffffff829bf000 R bnx_devices +ffffffff829bf020 R bnx_ca +ffffffff829c0000 R vge_ca +ffffffff829c0028 R vge_devices +ffffffff829c1000 R stge_ca +ffffffff829c1028 R stge_mii_bitbang_ops +ffffffff829c1050 R stge_devices +ffffffff829c2000 R nfe_ca +ffffffff829c2030 R nfe_devices +ffffffff829c3000 R et_devices +ffffffff829c3008 R et_ca +ffffffff829c4000 R jme_devices +ffffffff829c4008 R jme_ca +ffffffff829c5000 R age_devices +ffffffff829c5008 R age_ca +ffffffff829c6000 R alc_devices +ffffffff829c6038 R alc_ca +ffffffff829c7000 R ale_devices +ffffffff829c7008 R ale_ca +ffffffff829c8000 R amdpm_ca +ffffffff829c8030 R amdpm_ids +ffffffff829c9000 R bce_ca +ffffffff829c9028 R bce_devices +ffffffff829ca000 R ath_pci_ca +ffffffff829cb000 R athn_pci_ca +ffffffff829cb030 r athn_pci_devices +ffffffff829cc000 R atw_pci_ca +ffffffff829cc028 R atw_pci_devices +ffffffff829cd000 R rtw_pci_ca +ffffffff829cd030 R rtw_pci_products +ffffffff829ce000 R rtwn_pci_ca +ffffffff829ce030 r rtwn_pci_devices +ffffffff829ce040 r rtl8188eu_mac +ffffffff829ce1b0 r rtl8192cu_mac +ffffffff829ce310 r rtl8192ce_mac +ffffffff829ce458 r rtl8188eu_bb_prog +ffffffff829ce480 r rtl8723a_bb_prog +ffffffff829ce4a8 r rtl8192ce_bb_prog_1t +ffffffff829ce4d0 r rtl8192ce_bb_prog_2t +ffffffff829ce500 r rtl8188eu_bb_regs +ffffffff829ce680 r rtl8188eu_bb_vals +ffffffff829ce980 r rtl8188eu_agc_vals +ffffffff829ceb80 r rtl8723a_bb_regs +ffffffff829ced00 r rtl8723a_bb_vals +ffffffff829ceff0 r rtl8192ce_agc_vals +ffffffff829cf270 r rtl8192ce_bb_regs +ffffffff829cf3f0 r rtl8192ce_bb_vals_1t +ffffffff829cf6e0 r rtl8192ce_bb_vals_2t +ffffffff829d0000 R ral_pci_ca +ffffffff829d0030 R ral_pci_devices +ffffffff829d1000 R acx_pci_ca +ffffffff829d1028 R acx_pci_devices +ffffffff829d2000 R pgt_pci_ca +ffffffff829d2028 R pgt_pci_devices +ffffffff829d3000 R malo_pci_ca +ffffffff829d3028 R malo_pci_devices +ffffffff829d4000 R bwi_pci_ca +ffffffff829d4030 R bwi_pci_devices +ffffffff829d5000 R piixpm_ca +ffffffff829d5030 R piixpm_ids +ffffffff829d6000 R vic_ca +ffffffff829d6028 R vic_devices +ffffffff829d7000 R vmx_devices +ffffffff829d7008 R vmx_ca +ffffffff829d7030 r vmx_tx_kstat_tpl +ffffffff829d70d0 r vmx_kstat_rate +ffffffff829d70e0 r vmx_rx_kstat_tpl +ffffffff829d8000 R vmwpvs_ca +ffffffff829d8028 R vmwpvs_switch +ffffffff829d9000 R lii_ca +ffffffff829d9028 R lii_devices +ffffffff829da000 R ichiic_ca +ffffffff829da030 R ichiic_ids +ffffffff829db000 R viapm_ca +ffffffff829db030 R viapm_ids +ffffffff829db070 r val_to_temp +ffffffff829db870 r val_to_uV.mult +ffffffff829dc000 R amdiic_ca +ffffffff829dc028 R amdiic_ids +ffffffff829dd000 R nviic_ca +ffffffff829dd030 R nviic_ids +ffffffff829de000 R sdhc_pci_ca +ffffffff829df000 R kate_ca +ffffffff829df030 r kate_proc +ffffffff829e0000 R km_ca +ffffffff829e0030 r km_devices +ffffffff829e1000 R ksmn_ca +ffffffff829e1030 r ksmn_devices +ffffffff829e2000 R iosf_pci_ca +ffffffff829e3000 R itherm_devices +ffffffff829e3008 R itherm_ca +ffffffff829e4000 R pchtemp_ca +ffffffff829e4030 R pchtemp_devices +ffffffff829e5000 R rtsx_pci_ca +ffffffff829e6000 R xspd_ca +ffffffff829e6028 R xspd_devices +ffffffff829e7000 R virtio_pci_ca +ffffffff829e8000 R dwiic_pci_ca +ffffffff829e8030 R dwiic_pci_ids +ffffffff829e9000 R bwfm_pci_ca +ffffffff829e9030 r bwfm_pci_devices +ffffffff829ea000 R ccp_pci_ca +ffffffff829ea030 r ccp_pci_devices +ffffffff829eb000 R bnxt_devices +ffffffff829eb040 R bnxt_ca +ffffffff829ec000 R mcx_ca +ffffffff829ec030 r mcx_devices +ffffffff829ec060 r mcx_rss_config +ffffffff829ec0d0 r mcx_eth_cap_map +ffffffff829ec2d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff829ec2e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff829ec300 r mcx_kstat_ppcnt_rfc2819 +ffffffff829ec318 r mcx_kstat_ppcnt_rfc3635 +ffffffff829ec330 r mcx_ppcnt_ieee8023_tpl +ffffffff829ec4b0 r mcx_ppcnt_rfc2863_tpl +ffffffff829ec5c0 r mcx_ppcnt_rfc2819_tpl +ffffffff829ec770 r mcx_ppcnt_rfc3635_tpl +ffffffff829ec8b0 r mcx_kstat_mtmp_tpl +ffffffff829ec950 r mcx_kstat_mtmp_rate +ffffffff829ec960 r mcx_queue_kstat_tpl +ffffffff829ed000 R iavf_ca +ffffffff829ed030 r iavf_devices +ffffffff829ed040 r iavf_aq_regs +ffffffff829ed0b0 r iavf_link_speeds +ffffffff829ee000 R rge_ca +ffffffff829ee028 R rge_devices +ffffffff829ee030 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff829ee050 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff829ee0b0 r rtl8125_mac_cfg3_mcu +ffffffff829ee950 r rtl8125_mac_cfg5_mcu +ffffffff829ef970 r rtl8125_mac_bps +ffffffff829efd70 r rtl8125b_mac_bps +ffffffff829eff98 r rge_kstats_tpl +ffffffff829f1000 R igc_devices +ffffffff829f1040 R igc_ca +ffffffff829f2000 R ngbe_devices +ffffffff829f2008 R ngbe_ca +ffffffff829f3000 R com_pci_ca +ffffffff829f3030 R com_pci_ids +ffffffff829f4000 r agp_attach.agp_max +ffffffff829f4048 R agp_ca +ffffffff829f5000 R intagp_ca +ffffffff829f6000 r drm_plane_create_rotation_property.props +ffffffff829f7000 r drm_bridge_priv_state_funcs +ffffffff829f9000 r color_encoding_name +ffffffff829f9020 r color_range_name +ffffffff829fa000 r drm_subpixel_enum_list +ffffffff829fa060 r drm_dpms_enum_list +ffffffff829fa0a0 r drm_dvi_i_select_enum_list +ffffffff829fa0d0 r drm_dvi_i_subconnector_enum_list +ffffffff829fa100 r drm_tv_mode_enum_list +ffffffff829fa170 r drm_tv_select_enum_list +ffffffff829fa1c0 r drm_tv_subconnector_enum_list +ffffffff829fa210 r drm_dp_subconnector_enum_list +ffffffff829fa280 r colorspace_names +ffffffff829fa300 r drm_link_status_enum_list +ffffffff829fa320 r drm_scaling_mode_enum_list +ffffffff829fa360 r drm_aspect_ratio_enum_list +ffffffff829fa390 r drm_content_type_enum_list +ffffffff829fa3e0 r drm_panel_orientation_enum_list +ffffffff829fa420 r privacy_screen_enum +ffffffff829fb000 r drm_crtc_fence_ops +ffffffff829fc000 r drm_dmt_modes +ffffffff829fe940 r edid_cea_modes_1 +ffffffff82a024d0 r edid_cea_modes_193 +ffffffff82a03180 r edid_quirk_list +ffffffff82a03360 r drm_mode_do_interlace_quirk.cea_interlaced +ffffffff82a033a0 r edid_4k_modes +ffffffff82a03600 r edid_est_modes +ffffffff82a03e00 r est3_modes +ffffffff82a03f60 r stereo_mandatory_modes +ffffffff82a03fe0 r extra_modes +ffffffff82a05000 r drm_encoder_enum_list +ffffffff82a07000 r drm_fbdev_dma_helper_funcs +ffffffff82a07010 r drm_fbdev_dma_client_funcs +ffffffff82a07030 r drm_fbdev_dma_fb_ops +ffffffff82a08000 r drm_fbdev_generic_helper_funcs +ffffffff82a08010 r drm_fbdev_generic_client_funcs +ffffffff82a08030 r drm_fbdev_generic_fb_ops +ffffffff82a0a000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82a0a004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82a0a008 r drm_fb_xrgb8888_to_xrgb1555.dst_pixsize +ffffffff82a0a00c r drm_fb_xrgb8888_to_argb1555.dst_pixsize +ffffffff82a0a010 r drm_fb_xrgb8888_to_rgba5551.dst_pixsize +ffffffff82a0a014 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff82a0a018 r drm_fb_xrgb8888_to_argb8888.dst_pixsize +ffffffff82a0a01c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82a0a020 r drm_fb_xrgb8888_to_argb2101010.dst_pixsize +ffffffff82a0a024 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82a0a028 r drm_fb_xrgb8888_to_xbgr8888.dst_pixsize +ffffffff82a0a02c r drm_fb_xrgb8888_to_abgr8888.dst_pixsize +ffffffff82a0b000 r __drm_format_info.formats +ffffffff82a0c000 R drm_pgops +ffffffff82a0d000 r drm_gem_dma_default_funcs +ffffffff82a0e000 R drm_gem_fb_funcs +ffffffff82a0f000 r drm_ioctls +ffffffff82a11000 r dma_fence_stub_ops +ffffffff82a11040 R dma_fence_array_ops +ffffffff82a11080 R dma_fence_chain_ops +ffffffff82a110c0 R dmabufops +ffffffff82a110f8 R syncfileops +ffffffff82a12000 r drm_plane_type_enum_list +ffffffff82a13000 r tv_modes_parameters +ffffffff82a130c0 r drm_mode_status_names +ffffffff82a13200 r drm_named_modes +ffffffff82a14000 r primary_plane_funcs +ffffffff82a14068 r safe_modeset_formats +ffffffff82a15000 r orientation_data +ffffffff82a18718 r lcd800x1280_rightside_up +ffffffff82a18730 r lcd720x1280_rightside_up +ffffffff82a18748 r lcd800x1280_leftside_up +ffffffff82a18760 r lcd1080x1920_leftside_up +ffffffff82a18778 r lcd1200x1920_rightside_up +ffffffff82a18790 r gpd_micropc +ffffffff82a187a8 r gpd_pocket +ffffffff82a187c0 r gpd_pocket2 +ffffffff82a187d8 r gpd_win +ffffffff82a187f0 r gpd_win2 +ffffffff82a18808 r itworks_tw891 +ffffffff82a18820 r lcd1600x2560_rightside_up +ffffffff82a18838 r onegx1_pro +ffffffff82a18850 r lcd1600x2560_leftside_up +ffffffff82a18868 r lcd1280x1920_rightside_up +ffffffff82a18880 r gpd_onemix2s +ffffffff82a18898 r .compoundliteral +ffffffff82a188a8 r .compoundliteral.5 +ffffffff82a188d0 r .compoundliteral.9 +ffffffff82a188f0 r .compoundliteral.17 +ffffffff82a18930 r .compoundliteral.21 +ffffffff82a18950 r .compoundliteral.23 +ffffffff82a18960 r .compoundliteral.25 +ffffffff82a18970 r .compoundliteral.29 +ffffffff82a19000 r drm_gem_prime_dmabuf_ops +ffffffff82a1b000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82a1c000 r drm_dp_phy_name.phy_names +ffffffff82a1c048 r drm_dp_i2c_algo +ffffffff82a1c058 r drm_dp_i2c_lock_ops +ffffffff82a1c070 r dp_aux_bl_ops +ffffffff82a1c090 r dpcd_quirk_list +ffffffff82a1c320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82a1d000 R drm_dp_mst_topology_state_funcs +ffffffff82a1d020 r drm_dp_mst_req_type_str.req_type_str +ffffffff82a1d1f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82a1d220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82a1d278 r drm_dp_mst_i2c_algo +ffffffff82a1e000 r rc_parameters_1_2_444 +ffffffff82a1e5f0 r rc_parameters_pre_scr +ffffffff82a1e920 r rc_parameters_1_2_422 +ffffffff82a1edf0 r rc_parameters_1_2_420 +ffffffff82a20000 r hdmi_colorimetry_val +ffffffff82a21018 R ttm_bo_vm_ops +ffffffff82a22000 r ttm_range_manager_func +ffffffff82a23018 r ttm_kmap_iter_io_ops +ffffffff82a23030 r ttm_kmap_iter_linear_io_ops +ffffffff82a24000 r ttm_sys_manager_func +ffffffff82a25000 r ttm_kmap_iter_tt_ops +ffffffff82a26000 r drm_sched_fence_ops_scheduled +ffffffff82a26040 r drm_sched_fence_ops_finished +ffffffff82a27000 R ch7017_ops +ffffffff82a28000 R ch7xxx_ops +ffffffff82a28060 r ch7xxx_ids +ffffffff82a29000 R ivch_ops +ffffffff82a29060 r backup_addresses +ffffffff82a2a000 R ns2501_ops +ffffffff82a2a060 r mode_agnostic_values +ffffffff82a2a0e0 r ns2501_modes +ffffffff82a2b000 R sil164_ops +ffffffff82a2c000 R tfp410_ops +ffffffff82a2d000 r chv_dpll +ffffffff82a2d050 r vlv_dpll +ffffffff82a2d0a0 r g4x_dpll +ffffffff82a2d0f0 r pch_dpll +ffffffff82a2d138 r intel_dp_enc_funcs +ffffffff82a2e000 r intel_hdmi_enc_funcs +ffffffff82a2f000 r vlv_primary_formats +ffffffff82a2f030 r ivb_primary_formats +ffffffff82a2f050 r i965_primary_formats +ffffffff82a2f070 r i8xx_primary_formats +ffffffff82a2f080 r i965_plane_funcs +ffffffff82a2f0e8 r i8xx_plane_funcs +ffffffff82a30000 r ilk_wm_funcs +ffffffff82a30040 r vlv_wm_funcs +ffffffff82a30080 r g4x_wm_funcs +ffffffff82a300c0 r nop_funcs +ffffffff82a30100 r pnv_wm_funcs +ffffffff82a30140 r i965_wm_funcs +ffffffff82a30180 r i9xx_wm_funcs +ffffffff82a301c0 r i845_wm_funcs +ffffffff82a30200 r cxsr_latency_table +ffffffff82a31000 r gen11_dsi_encoder_funcs +ffffffff82a31020 r gen11_dsi_connector_funcs +ffffffff82a31098 r gen11_dsi_connector_helper_funcs +ffffffff82a310f8 r gen11_dsi_host_ops +ffffffff82a32000 r intel_plane_helper_funcs +ffffffff82a33000 r g4x_audio_funcs +ffffffff82a33018 r ibx_audio_funcs +ffffffff82a33030 r hsw_audio_funcs +ffffffff82a33050 r hdmi_audio_clock +ffffffff82a330c0 r dp_aud_n_m +ffffffff82a33270 r hdmi_aud_ncts_36bpp +ffffffff82a33350 r hdmi_aud_ncts_30bpp +ffffffff82a33430 r hdmi_aud_ncts_24bpp +ffffffff82a34000 r intel_backlight_device_ops +ffffffff82a34018 r bxt_pwm_funcs +ffffffff82a34048 r cnp_pwm_funcs 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intel_region_map +ffffffff82ab5000 r dg2_g10_revid_step_tbl +ffffffff82ab5030 r dg2_g11_revid_step_tbl +ffffffff82ab5050 r xehpsdv_revids +ffffffff82ab5080 r adlp_rplp_revids +ffffffff82ab50a0 r adlp_revids +ffffffff82ab50e0 r adls_rpls_revids +ffffffff82ab5120 r adls_revids +ffffffff82ab5160 r rkl_revids +ffffffff82ab5180 r bxt_revids +ffffffff82ab51c0 r skl_revids +ffffffff82ab51f0 r pvc_bd_subids +ffffffff82ab5210 r pvc_ct_subids +ffffffff82ab7000 r forcewake_domain_names +ffffffff82ab7080 r __mtl_fw_ranges +ffffffff82ab71f0 r mtl_shadowed_regs +ffffffff82ab7270 r __pvc_fw_ranges +ffffffff82ab7420 r pvc_shadowed_regs +ffffffff82ab7540 r __dg2_fw_ranges +ffffffff82ab7810 r dg2_shadowed_regs +ffffffff82ab7930 r __xehp_fw_ranges +ffffffff82ab7c00 r gen12_shadowed_regs +ffffffff82ab7d20 r __gen12_fw_ranges +ffffffff82ab7f30 r __gen11_fw_ranges +ffffffff82ab80e0 r gen11_shadowed_regs +ffffffff82ab81a0 r __gen9_fw_ranges +ffffffff82ab8320 r gen8_shadowed_regs +ffffffff82ab8350 r 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+ffffffff82ad51e0 r caicos_io_mc_regs +ffffffff82ad52d0 r cayman_io_mc_regs +ffffffff82ad53c0 r cayman_golden_registers +ffffffff82ad5580 r cayman_golden_registers2 +ffffffff82ad55d0 r dvst_golden_registers +ffffffff82ad5860 r dvst_golden_registers2 +ffffffff82ad5890 r scrapper_golden_registers +ffffffff82ad5d70 r tn_rlc_save_restore_register_list +ffffffff82ad5f60 r cayman_cs_data +ffffffff82ad5fa0 r SECT_CONTEXT_defs +ffffffff82ad6020 r SECT_CLEAR_defs +ffffffff82ad6040 r SECT_CTRLCONST_defs +ffffffff82ad6060 r SECT_CONTEXT_def_2 +ffffffff82ad6080 r SECT_CONTEXT_def_4 +ffffffff82ad6210 r SECT_CONTEXT_def_5 +ffffffff82ad6230 r SECT_CONTEXT_def_1 +ffffffff82ad69d0 r SECT_CONTEXT_def_3 +ffffffff82ad6ab0 r SECT_CONTEXT_def_6 +ffffffff82ad6b90 r SECT_CONTEXT_def_7 +ffffffff82ad7018 r SECT_CLEAR_def_1 +ffffffff82ad7024 r SECT_CTRLCONST_def_1 +ffffffff82ad7030 r cayman_default_state +ffffffff82ad8000 r cac_weights_cayman_xt +ffffffff82ad8128 r cac_weights_cayman_pro +ffffffff82ad8250 r cac_weights_cayman_le +ffffffff82ad8380 r cayman_cgcg_cgls_default +ffffffff82ad85c0 r cayman_mgcg_default +ffffffff82ad8f20 r cayman_sysls_default +ffffffff82ad8ff0 r cayman_cgcg_cgls_enable +ffffffff82ad9240 r cayman_cgcg_cgls_disable +ffffffff82ad94a0 r cayman_mgcg_enable +ffffffff82ad9520 r cayman_mgcg_disable +ffffffff82ad95a0 r cayman_sysls_enable +ffffffff82ad9670 r cayman_sysls_disable +ffffffff82ada000 r rn50_reg_safe_bm +ffffffff82ada1a0 r r100_reg_safe_bm +ffffffff82adb000 r r200_reg_safe_bm +ffffffff82adc000 r r300_reg_safe_bm +ffffffff82add000 r r420_reg_safe_bm +ffffffff82adf000 r color_formats_table +ffffffff82adf480 r r600_reg_safe_bm +ffffffff82ae2000 R r600_utc +ffffffff82ae2040 R r600_dtc +ffffffff82ae2080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82ae4000 r r100_gfx_ring +ffffffff82ae4070 r r300_gfx_ring +ffffffff82ae40e0 r rv515_gfx_ring +ffffffff82ae4150 r r600_gfx_ring +ffffffff82ae41c0 r r600_dma_ring +ffffffff82ae4230 r rv6xx_uvd_ring +ffffffff82ae42a0 r rv770_uvd_ring +ffffffff82ae4310 r evergreen_gfx_ring +ffffffff82ae4380 r evergreen_dma_ring +ffffffff82ae43f0 r cayman_gfx_ring +ffffffff82ae4460 r cayman_dma_ring +ffffffff82ae44d0 r cayman_uvd_ring +ffffffff82ae4540 r trinity_vce_ring +ffffffff82ae45b0 r si_gfx_ring +ffffffff82ae4620 r si_dma_ring +ffffffff82ae4690 r ci_gfx_ring +ffffffff82ae4700 r ci_cp_ring +ffffffff82ae4770 r ci_dma_ring +ffffffff82ae47e0 r ci_vce_ring +ffffffff82ae5000 r object_connector_convert +ffffffff82ae5060 r supported_devices_connector_convert +ffffffff82ae50a0 r supported_devices_connector_object_id_convert +ffffffff82ae50c0 r thermal_controller_names +ffffffff82ae5100 r pp_lib_thermal_controller_names +ffffffff82ae6000 r pin_offsets +ffffffff82ae6020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff82ae8000 r thermal_controller_names +ffffffff82ae8020 r default_primarydac_adj +ffffffff82ae8120 r default_tvdac_adj +ffffffff82ae8220 r default_tmds_pll +ffffffff82ae9000 r radeon_dp_connector_funcs +ffffffff82ae9078 r radeon_dp_connector_helper_funcs +ffffffff82ae90d8 r radeon_lvds_bridge_connector_funcs +ffffffff82ae9150 r radeon_vga_connector_funcs +ffffffff82ae91c8 r radeon_vga_connector_helper_funcs +ffffffff82ae9228 r radeon_dvi_connector_funcs +ffffffff82ae92a0 r radeon_dvi_connector_helper_funcs +ffffffff82ae9300 r radeon_edp_connector_funcs +ffffffff82ae9378 r radeon_tv_connector_funcs +ffffffff82ae93f0 r radeon_tv_connector_helper_funcs +ffffffff82ae9450 r radeon_lvds_connector_funcs +ffffffff82ae94c8 r radeon_lvds_connector_helper_funcs +ffffffff82aea000 r radeon_family_name +ffffffff82aea3f0 r radeon_px_quirk_list +ffffffff82aeb000 r radeon_fb_funcs +ffffffff82aeb018 r radeon_mode_funcs +ffffffff82aeb060 r radeon_tmds_pll_enum_list +ffffffff82aeb080 r radeon_tv_std_enum_list +ffffffff82aeb100 r radeon_underscan_enum_list +ffffffff82aeb130 r radeon_audio_enum_list +ffffffff82aeb160 r radeon_dither_enum_list +ffffffff82aeb180 r radeon_output_csc_enum_list +ffffffff82aeb1c0 r radeon_crtc_funcs +ffffffff82aeb280 r hpd_names +ffffffff82aeb2b0 r encoder_names +ffffffff82aeb3e0 r radeon_afmt_init.eg_offsets +ffffffff82aec000 r aux_offset +ffffffff82aed000 R radeondrm_ca +ffffffff82aed030 r pciidlist +ffffffff82af11d0 r kms_driver +ffffffff82af12c0 r radeon_ioctls_kms +ffffffff82af2000 r radeon_fbdev_fb_helper_funcs +ffffffff82af2010 r radeon_fbdev_client_funcs +ffffffff82af2030 r radeon_fbdev_fb_ops +ffffffff82af3000 R radeon_fence_ops +ffffffff82af5000 R radeon_gem_object_funcs +ffffffff82af5070 r radeon_gem_vm_ops +ffffffff82af6000 r radeon_i2c_algo +ffffffff82af6010 r radeon_atom_i2c_algo +ffffffff82af7000 r legacy_helper_funcs +ffffffff82af8000 r radeon_backlight_ops +ffffffff82af8018 r radeon_legacy_lvds_enc_funcs +ffffffff82af8038 r radeon_legacy_lvds_helper_funcs +ffffffff82af80a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82af80c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82af8128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82af8148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82af81b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82af81d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82af8238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82af8258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82af9000 r SLOPE_value +ffffffff82af9030 r YCOEF_EN_value +ffffffff82af9060 r YCOEF_value +ffffffff82af9090 r available_tv_modes +ffffffff82af9110 r hor_timing_NTSC +ffffffff82af9150 r vert_timing_NTSC +ffffffff82af9190 r hor_timing_PAL +ffffffff82af91d0 r vert_timing_PAL +ffffffff82afb000 r radeon_pm_state_type_name +ffffffff82afc000 r radeon_evict_flags.placements +ffffffff82aff000 r rs600_reg_safe_bm +ffffffff82b01000 r rv515_reg_safe_bm +ffffffff82b02000 r dll_speed_table +ffffffff82b03000 r r7xx_golden_registers +ffffffff82b03090 r r7xx_golden_dyn_gpr_registers +ffffffff82b03100 r rv770ce_golden_registers +ffffffff82b03160 r rv770_golden_registers +ffffffff82b031b0 r rv770_mgcg_init +ffffffff82b038f0 r rv730_golden_registers +ffffffff82b03950 r rv730_mgcg_init +ffffffff82b03ee0 r rv710_golden_registers +ffffffff82b03f30 r rv710_mgcg_init +ffffffff82b041d0 r rv740_golden_registers +ffffffff82b04360 r rv740_mgcg_init +ffffffff82b06000 r rv730_smc_int_vectors +ffffffff82b06040 r rv710_smc_int_vectors +ffffffff82b06080 r rv740_smc_int_vectors +ffffffff82b060c0 r cypress_smc_int_vectors +ffffffff82b06100 r caicos_smc_int_vectors +ffffffff82b06140 r cayman_smc_int_vectors +ffffffff82b07000 r tahiti_io_mc_regs +ffffffff82b07120 r pitcairn_io_mc_regs +ffffffff82b07240 r verde_io_mc_regs +ffffffff82b07360 r oland_io_mc_regs +ffffffff82b07480 r hainan_io_mc_regs +ffffffff82b075a0 r crtc_offsets +ffffffff82b075c0 r si_disp_int_status +ffffffff82b075e0 r tahiti_golden_registers +ffffffff82b07760 r tahiti_golden_rlc_registers +ffffffff82b077b0 r tahiti_mgcg_cgcg_init +ffffffff82b07d98 r tahiti_golden_registers2 +ffffffff82b07db0 r pitcairn_golden_registers +ffffffff82b07f00 r pitcairn_golden_rlc_registers +ffffffff82b07f40 r pitcairn_mgcg_cgcg_init +ffffffff82b083b0 r verde_golden_registers +ffffffff82b08620 r verde_golden_rlc_registers +ffffffff82b08660 r verde_mgcg_cgcg_init +ffffffff82b08ae0 r oland_golden_registers +ffffffff82b08c30 r oland_golden_rlc_registers +ffffffff82b08c70 r oland_mgcg_cgcg_init +ffffffff82b09000 r hainan_golden_registers +ffffffff82b0912c r hainan_golden_registers2 +ffffffff82b09140 r hainan_mgcg_cgcg_init +ffffffff82b094b0 r verde_rlc_save_restore_register_list +ffffffff82b09820 r si_cs_data +ffffffff82b09840 r si_SECT_CONTEXT_defs +ffffffff82b098c0 r si_SECT_CONTEXT_def_1 +ffffffff82b09c10 r si_SECT_CONTEXT_def_3 +ffffffff82b09c30 r si_SECT_CONTEXT_def_4 +ffffffff82b09ea4 r si_SECT_CONTEXT_def_5 +ffffffff82b09ea8 r si_SECT_CONTEXT_def_6 +ffffffff82b09eb0 r si_SECT_CONTEXT_def_2 +ffffffff82b0a2f0 r si_SECT_CONTEXT_def_7 +ffffffff82b0a6a0 r mc_cg_registers +ffffffff82b0a6d0 r si_default_state +ffffffff82b0b000 r cac_weights_tahiti +ffffffff82b0b4d0 r lcac_tahiti +ffffffff82b0bba0 r cac_override_tahiti +ffffffff82b0bbb4 r powertune_data_tahiti +ffffffff82b0bbf0 r dte_data_tahiti +ffffffff82b0bcc0 r dte_data_new_zealand +ffffffff82b0bd90 r dte_data_malta +ffffffff82b0be60 r lcac_pitcairn +ffffffff82b0c530 r cac_override_pitcairn +ffffffff82b0c544 r powertune_data_pitcairn +ffffffff82b0c580 r lcac_cape_verde +ffffffff82b0c9d0 r cac_override_cape_verde +ffffffff82b0c9e4 r powertune_data_cape_verde +ffffffff82b0ca20 r cac_weights_cape_verde_pro +ffffffff82b0cef0 r cac_weights_heathrow +ffffffff82b0d3c0 r cac_weights_chelsea_xt +ffffffff82b0d890 r cac_weights_chelsea_pro +ffffffff82b0dd60 r cac_weights_cape_verde +ffffffff82b0e230 r cac_weights_mars_pro +ffffffff82b0e700 r lcac_mars_pro +ffffffff82b0ea60 r cac_override_oland +ffffffff82b0ea74 r powertune_data_mars_pro +ffffffff82b0eab0 r cac_weights_mars_xt +ffffffff82b0ef80 r cac_weights_oland_pro +ffffffff82b0f450 r cac_weights_oland_xt +ffffffff82b0f920 r lcac_oland +ffffffff82b0fc7c r powertune_data_oland +ffffffff82b0fcc0 r cac_weights_hainan +ffffffff82b10184 r powertune_data_hainan +ffffffff82b101c0 r dte_data_aruba_pro +ffffffff82b10290 r dte_data_tahiti_pro +ffffffff82b10360 r dte_data_curacao_pro +ffffffff82b10430 r dte_data_neptune_xt +ffffffff82b10500 r dte_data_sun_xt +ffffffff82b105d0 r dte_data_venus_xtx +ffffffff82b106a0 r dte_data_venus_xt +ffffffff82b10770 r dte_data_venus_pro +ffffffff82b10840 r dte_data_mars_pro +ffffffff82b11000 r si_program_jump_on_start.data +ffffffff82b12000 r sumo_dtc +ffffffff82b13000 r trinity_mgcg_shls_default +ffffffff82b13380 r trinity_sysls_enable +ffffffff82b13450 r trinity_sysls_disable +ffffffff82b15000 r GC_BASE +ffffffff82b150a8 r HDP_BASE +ffffffff82b15150 r MMHUB_BASE +ffffffff82b151f8 r ATHUB_BASE +ffffffff82b152a0 r NBIO_BASE +ffffffff82b15348 r MP0_BASE +ffffffff82b153f0 r MP1_BASE +ffffffff82b15498 r DF_BASE +ffffffff82b15540 r OSSSYS_BASE +ffffffff82b155e8 r SDMA0_BASE +ffffffff82b15690 r SDMA1_BASE +ffffffff82b15738 r SDMA2_BASE +ffffffff82b157e0 r SDMA3_BASE +ffffffff82b15888 r SDMA4_BASE +ffffffff82b15930 r SMUIO_BASE +ffffffff82b159d8 r THM_BASE +ffffffff82b15a80 r UMC_BASE +ffffffff82b15b28 r VCN_BASE +ffffffff82b16000 r amdgpu_afmt_predefined_acr +ffffffff82b17000 r atom_op_names +ffffffff82b173e0 r opcode_table +ffffffff82b17bd0 r atom_dst_to_src +ffffffff82b17c50 r atom_io_names +ffffffff82b17c80 r atom_table_names +ffffffff82b17ed0 r atom_iio_len +ffffffff82b18000 r object_connector_convert +ffffffff82b18058 R amdgpu_vbios_version_attr_group +ffffffff82b19000 r voltage_names +ffffffff82b19020 r pre_emph_names +ffffffff82b1a000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82b1c000 r amdgpu_benchmark.common_modes +ffffffff82b1d000 r amdgpu_cgs_ops +ffffffff82b1e000 r amdgpu_connector_dp_funcs +ffffffff82b1e078 r amdgpu_connector_dp_helper_funcs +ffffffff82b1e0d8 r amdgpu_connector_edp_funcs +ffffffff82b1e150 r amdgpu_connector_vga_funcs +ffffffff82b1e1c8 r amdgpu_connector_vga_helper_funcs +ffffffff82b1e228 r amdgpu_connector_dvi_funcs +ffffffff82b1e2a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82b1e300 r amdgpu_connector_lvds_funcs +ffffffff82b1e378 r amdgpu_connector_lvds_helper_funcs +ffffffff82b1e3e0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82b20000 R amdgpu_ctx_num_entities +ffffffff82b21000 r amdgpu_kms_driver +ffffffff82b210f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82b22000 r hw_id_map +ffffffff82b22090 r hw_id_names +ffffffff82b23000 r hpd_names +ffffffff82b23030 r encoder_names +ffffffff82b23180 r dcc_retile_formats +ffffffff82b23270 r dcc_formats +ffffffff82b23360 R amdgpu_mode_funcs +ffffffff82b233b0 r amdgpu_underscan_enum_list +ffffffff82b233e0 r amdgpu_audio_enum_list +ffffffff82b23410 r amdgpu_dither_enum_list +ffffffff82b23430 r amdgpu_fb_funcs_atomic +ffffffff82b23448 r amdgpu_fb_funcs +ffffffff82b24000 R amdgpu_dmabuf_ops +ffffffff82b25000 R amdgpu_ioctls_kms +ffffffff82b25210 R amdgpu_partition_driver +ffffffff82b252f8 R amdgpu_ca +ffffffff82b25320 r pciidlist +ffffffff82b261f0 r amdgpu_unsupported_pciidlist +ffffffff82b26770 r amdgpu_kms_driver +ffffffff82b27000 r amdgpu_job_fence_ops +ffffffff82b27040 r amdgpu_fence_ops +ffffffff82b28000 r amdgpu_gem_object_funcs +ffffffff82b28070 r amdgpu_gem_vm_ops +ffffffff82b29000 R amdgpu_gtt_mgr_attr_group +ffffffff82b29018 r amdgpu_gtt_mgr_func +ffffffff82b2a000 r amdgpu_atombios_i2c_algo +ffffffff82b2b000 R node_id_to_phys_map +ffffffff82b2c000 R amdgpu_sched_ops +ffffffff82b2e000 r amdgpu_vram_names +ffffffff82b2f000 r amdgpu_preempt_mgr_func +ffffffff82b30000 R psp_ip_funcs +ffffffff82b300a0 R psp_v3_1_ip_block +ffffffff82b300b8 R psp_v10_0_ip_block +ffffffff82b300d0 R psp_v11_0_ip_block +ffffffff82b300e8 R psp_v11_0_8_ip_block +ffffffff82b30100 R psp_v12_0_ip_block +ffffffff82b30118 R psp_v13_0_ip_block +ffffffff82b30130 R psp_v13_0_4_ip_block +ffffffff82b32000 r sw_ring_info +ffffffff82b33000 r amdgpu_evict_flags.placements +ffffffff82b37000 R amdgpu_vkms_ip_block +ffffffff82b38000 R amdgpu_vm_cpu_funcs +ffffffff82b3a000 R amdgpu_vm_sdma_funcs +ffffffff82b3b000 R amdgpu_vram_mgr_attr_group +ffffffff82b3b018 r amdgpu_vram_mgr_func +ffffffff82b3b040 r amdgpu_dummy_vram_mgr_func +ffffffff82b3c000 r xgmi_pcs_err_status_reg_arct +ffffffff82b3c020 r xgmi3x16_pcs_ras_fields +ffffffff82b3c1f0 r xgmi_pcs_ras_fields +ffffffff82b3c310 r wafl_pcs_ras_fields +ffffffff82b3d000 r GC_BASE +ffffffff82b3d0c0 r HDP_BASE +ffffffff82b3d180 r MMHUB_BASE +ffffffff82b3d240 r ATHUB_BASE +ffffffff82b3d300 r NBIF0_BASE +ffffffff82b3d3c0 r MP0_BASE +ffffffff82b3d480 r MP1_BASE +ffffffff82b3d540 r UVD_BASE +ffffffff82b3d600 r DF_BASE +ffffffff82b3d6c0 r OSSSYS_BASE +ffffffff82b3d780 r SDMA0_BASE +ffffffff82b3d840 r SDMA1_BASE +ffffffff82b3d900 r SDMA2_BASE +ffffffff82b3d9c0 r SDMA3_BASE +ffffffff82b3da80 r SDMA4_BASE +ffffffff82b3db40 r SDMA5_BASE +ffffffff82b3dc00 r SDMA6_BASE +ffffffff82b3dcc0 r SDMA7_BASE +ffffffff82b3dd80 r SMUIO_BASE +ffffffff82b3de40 r THM_BASE +ffffffff82b3df00 r UMC_BASE +ffffffff82b3dfc0 r RSMU_BASE +ffffffff82b3f000 r cz_ih_ip_funcs +ffffffff82b3f0a0 R cz_ih_ip_block +ffffffff82b3f0b8 r cz_ih_funcs +ffffffff82b40000 r crtc_offsets +ffffffff82b40020 r dce_v10_0_ip_funcs +ffffffff82b400c0 R dce_v10_0_ip_block +ffffffff82b400d8 R dce_v10_1_ip_block +ffffffff82b400f0 r dce_v10_0_display_funcs +ffffffff82b40150 r hpd_offsets +ffffffff82b40168 r dce_v10_0_encoder_funcs +ffffffff82b40188 r dce_v10_0_dac_helper_funcs +ffffffff82b401f0 r dce_v10_0_dig_helper_funcs +ffffffff82b40258 r dce_v10_0_ext_helper_funcs +ffffffff82b402c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82b402f0 r dce_v10_0_crtc_irq_funcs +ffffffff82b40300 r dce_v10_0_pageflip_irq_funcs +ffffffff82b40310 r dce_v10_0_hpd_irq_funcs +ffffffff82b40320 r interrupt_status_offsets +ffffffff82b40380 r dce_v10_0_crtc_funcs +ffffffff82b40440 r dce_v10_0_crtc_helper_funcs +ffffffff82b404c0 r vga_control_regs +ffffffff82b404e0 r dig_offsets +ffffffff82b40500 r pin_offsets +ffffffff82b40520 r fiji_mgcg_cgcg_init +ffffffff82b40540 r golden_settings_fiji_a10 +ffffffff82b40570 r tonga_mgcg_cgcg_init +ffffffff82b40590 r golden_settings_tonga_a11 +ffffffff82b41000 r crtc_offsets +ffffffff82b41020 r dce_v11_0_ip_funcs +ffffffff82b410c0 R dce_v11_0_ip_block +ffffffff82b410d8 R dce_v11_2_ip_block +ffffffff82b410f0 r dce_v11_0_display_funcs +ffffffff82b41150 r hpd_offsets +ffffffff82b41168 r dce_v11_0_encoder_funcs +ffffffff82b41188 r dce_v11_0_dac_helper_funcs +ffffffff82b411f0 r dce_v11_0_dig_helper_funcs +ffffffff82b41258 r dce_v11_0_ext_helper_funcs +ffffffff82b412c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82b412f0 r dce_v11_0_crtc_irq_funcs +ffffffff82b41300 r dce_v11_0_pageflip_irq_funcs +ffffffff82b41310 r dce_v11_0_hpd_irq_funcs +ffffffff82b41320 r interrupt_status_offsets +ffffffff82b41380 r dce_v11_0_crtc_funcs +ffffffff82b41440 r dce_v11_0_crtc_helper_funcs +ffffffff82b414c0 r vga_control_regs +ffffffff82b414e0 r dig_offsets +ffffffff82b41510 r cz_mgcg_cgcg_init +ffffffff82b41530 r cz_golden_settings_a11 +ffffffff82b41550 r stoney_golden_settings_a11 +ffffffff82b41570 r polaris11_golden_settings_a11 +ffffffff82b415b0 r polaris10_golden_settings_a11 +ffffffff82b42000 R df_v1_7_funcs +ffffffff82b42070 r df_v1_7_channel_number +ffffffff82b43000 R df_v3_6_funcs +ffffffff82b43070 r df_v3_6_channel_number +ffffffff82b44000 R df_v4_3_funcs +ffffffff82b45000 r GC_BASE +ffffffff82b450a8 r HDP_BASE +ffffffff82b45150 r MMHUB_BASE +ffffffff82b451f8 r ATHUB_BASE +ffffffff82b452a0 r NBIO_BASE +ffffffff82b45348 r MP0_BASE +ffffffff82b453f0 r MP1_BASE +ffffffff82b45498 r VCN0_BASE +ffffffff82b45540 r DF_BASE +ffffffff82b455e8 r DCN_BASE +ffffffff82b45690 r OSSSYS_BASE +ffffffff82b45738 r SMUIO_BASE +ffffffff82b457e0 r THM_BASE +ffffffff82b46000 r gfx_v10_0_ip_funcs +ffffffff82b460a0 R gfx_v10_0_ip_block +ffffffff82b460b8 r gfx_v10_0_gfx_funcs +ffffffff82b46120 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82b4c3c0 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82b4fde0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82b56080 r gfx_v10_0_kiq_pm4_funcs +ffffffff82b560c0 r gfx_v10_0_ring_funcs_kiq +ffffffff82b56200 r gfx_v10_0_ring_funcs_gfx +ffffffff82b56340 r gfx_v10_0_ring_funcs_compute +ffffffff82b56480 r gfx_v10_0_eop_irq_funcs +ffffffff82b56490 r gfx_v10_0_kiq_irq_funcs +ffffffff82b564a0 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82b564b0 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82b564c0 r gfx_v10_0_rlc_funcs +ffffffff82b56528 r gfx_v10_0_rlc_funcs_sriov +ffffffff82b56590 r gfx10_cs_data +ffffffff82b565b0 r gfx10_SECT_CONTEXT_defs +ffffffff82b56640 r gfx10_SECT_CONTEXT_def_1 +ffffffff82b569a0 r gfx10_SECT_CONTEXT_def_3 +ffffffff82b569b0 r gfx10_SECT_CONTEXT_def_4 +ffffffff82b56c28 r gfx10_SECT_CONTEXT_def_5 +ffffffff82b56c30 r gfx10_SECT_CONTEXT_def_6 +ffffffff82b56c40 r gfx10_SECT_CONTEXT_def_2 +ffffffff82b57080 r gfx10_SECT_CONTEXT_def_7 +ffffffff82b57190 r gfx10_SECT_CONTEXT_def_8 +ffffffff82b574c0 r golden_settings_gc_10_1 +ffffffff82b57880 r golden_settings_gc_10_0_nv10 +ffffffff82b57880 r golden_settings_gc_10_1_1 +ffffffff82b57c10 r golden_settings_gc_10_1_2 +ffffffff82b57c10 r golden_settings_gc_10_1_nv14 +ffffffff82b58000 r golden_settings_gc_10_1_2_nv12 +ffffffff82b58000 r golden_settings_gc_10_3 +ffffffff82b58408 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82b58410 r golden_settings_gc_10_3_2 +ffffffff82b58800 r golden_settings_gc_10_3_vangogh +ffffffff82b58a60 r golden_settings_gc_10_3_3 +ffffffff82b58c40 r golden_settings_gc_10_3_4 +ffffffff82b58fa0 r golden_settings_gc_10_3_5 +ffffffff82b592a0 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82b595d0 r golden_settings_gc_10_3_6 +ffffffff82b597e0 r golden_settings_gc_10_3_7 +ffffffff82b5a000 r gfx_v11_0_ip_funcs +ffffffff82b5a0a0 R gfx_v11_0_ip_block +ffffffff82b5a0b8 r gfx_v11_0_gfx_funcs +ffffffff82b5a118 r gfx_v11_0_kiq_pm4_funcs +ffffffff82b5a158 r gfx_v11_0_ring_funcs_kiq +ffffffff82b5a298 r gfx_v11_0_ring_funcs_gfx +ffffffff82b5a3d8 r gfx_v11_0_ring_funcs_compute +ffffffff82b5a518 r gfx_v11_0_eop_irq_funcs +ffffffff82b5a528 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82b5a538 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82b5a548 r gfx_v11_0_rlc_gc_fed_irq_funcs +ffffffff82b5a558 r gfx_v11_0_rlc_funcs +ffffffff82b5a5c0 r gfx11_cs_data +ffffffff82b5a5e0 r gfx11_SECT_CONTEXT_defs +ffffffff82b5a660 r gfx11_SECT_CONTEXT_def_1 +ffffffff82b5a9c0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82b5a9d0 r gfx11_SECT_CONTEXT_def_5 +ffffffff82b5a9d8 r gfx11_SECT_CONTEXT_def_6 +ffffffff82b5a9e0 r gfx11_SECT_CONTEXT_def_2 +ffffffff82b5ae20 r gfx11_SECT_CONTEXT_def_4 +ffffffff82b5b0a0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82b5b510 r golden_settings_gc_11_0_1 +ffffffff82b5b5f0 r golden_settings_gc_11_0 +ffffffff82b5c000 r gfx_v8_0_ip_funcs +ffffffff82b5c0a0 R gfx_v8_0_ip_block +ffffffff82b5c0b8 R gfx_v8_1_ip_block +ffffffff82b5c0d0 r gfx_v8_0_gfx_funcs +ffffffff82b5c130 r gfx_v8_0_ring_funcs_kiq +ffffffff82b5c270 r gfx_v8_0_ring_funcs_gfx +ffffffff82b5c3b0 r gfx_v8_0_ring_funcs_compute +ffffffff82b5c4f0 r amdgpu_gds_reg_offset +ffffffff82b5c5f0 r gfx_v8_0_eop_irq_funcs +ffffffff82b5c600 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82b5c610 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82b5c620 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82b5c630 r gfx_v8_0_sq_irq_funcs +ffffffff82b5c640 r sq_edc_source_names +ffffffff82b5c678 r iceland_rlc_funcs +ffffffff82b5c6e0 r vi_cs_data +ffffffff82b5c700 r vi_SECT_CONTEXT_defs +ffffffff82b5c780 r vi_SECT_CONTEXT_def_1 +ffffffff82b5cad0 r vi_SECT_CONTEXT_def_3 +ffffffff82b5caf0 r vi_SECT_CONTEXT_def_4 +ffffffff82b5cd64 r vi_SECT_CONTEXT_def_5 +ffffffff82b5cd6c r vi_SECT_CONTEXT_def_6 +ffffffff82b5cd70 r vi_SECT_CONTEXT_def_2 +ffffffff82b5d1c0 r vi_SECT_CONTEXT_def_7 +ffffffff82b5d570 r vgpr_init_compute_shader +ffffffff82b5d680 r vgpr_init_regs +ffffffff82b5d710 r sgpr1_init_regs +ffffffff82b5d7a0 r sgpr2_init_regs +ffffffff82b5d830 r sec_ded_counter_registers +ffffffff82b5d8a0 r iceland_mgcg_cgcg_init +ffffffff82b5dba0 r golden_settings_iceland_a11 +ffffffff82b5dc60 r iceland_golden_common_all +ffffffff82b5dcc0 r fiji_mgcg_cgcg_init +ffffffff82b5de70 r golden_settings_fiji_a10 +ffffffff82b5df00 r fiji_golden_common_all +ffffffff82b5df80 r tonga_mgcg_cgcg_init +ffffffff82b5e310 r golden_settings_tonga_a11 +ffffffff82b5e3d0 r tonga_golden_common_all +ffffffff82b5e430 r golden_settings_vegam_a11 +ffffffff82b5e500 r vegam_golden_common_all +ffffffff82b5e550 r golden_settings_polaris11_a11 +ffffffff82b5e620 r polaris11_golden_common_all +ffffffff82b5e670 r golden_settings_polaris10_a11 +ffffffff82b5e740 r polaris10_golden_common_all +ffffffff82b5e7a0 r cz_mgcg_cgcg_init +ffffffff82b5eb30 r cz_golden_settings_a11 +ffffffff82b5ebc0 r cz_golden_common_all +ffffffff82b5ec20 r stoney_mgcg_cgcg_init +ffffffff82b5ec60 r stoney_golden_settings_a11 +ffffffff82b5ece0 r stoney_golden_common_all +ffffffff82b5f000 R gfx_v9_0_ras_ops +ffffffff82b5f040 r gfx_v9_0_ip_funcs +ffffffff82b5f0e0 R gfx_v9_0_ip_block +ffffffff82b5f100 r ras_gfx_subblocks +ffffffff82b5fb80 r gfx_v9_0_edc_counter_regs +ffffffff82b5ff20 r gfx_v9_0_ras_fields +ffffffff82b61000 r gfx_v9_0_gfx_funcs +ffffffff82b61060 r gfx_v9_0_kiq_pm4_funcs +ffffffff82b610a0 r gfx_v9_0_ring_funcs_kiq +ffffffff82b611e0 r gfx_v9_0_ring_funcs_gfx +ffffffff82b61320 r gfx_v9_0_sw_ring_funcs_gfx +ffffffff82b61460 r gfx_v9_0_ring_funcs_compute +ffffffff82b615a0 r gfx_v9_0_eop_irq_funcs +ffffffff82b615b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82b615c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82b615d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82b615e0 r gfx_v9_0_rlc_funcs +ffffffff82b61650 r gfx9_cs_data +ffffffff82b61670 r gfx9_SECT_CONTEXT_defs +ffffffff82b61700 r gfx9_SECT_CONTEXT_def_1 +ffffffff82b61a50 r gfx9_SECT_CONTEXT_def_3 +ffffffff82b61a60 r gfx9_SECT_CONTEXT_def_4 +ffffffff82b61cd4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82b61cdc r gfx9_SECT_CONTEXT_def_6 +ffffffff82b61ce0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82b61df0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82b62260 r gfx9_SECT_CONTEXT_def_8 +ffffffff82b624d0 r vgpr_init_compute_shader_arcturus +ffffffff82b62d60 r vgpr_init_regs_arcturus +ffffffff82b62ef0 r vgpr_init_regs +ffffffff82b63080 r sgpr1_init_regs +ffffffff82b63210 r sgpr2_init_regs +ffffffff82b633a0 r golden_settings_gc_9_0 +ffffffff82b63580 r golden_settings_gc_9_0_vg10 +ffffffff82b63730 r golden_settings_gc_9_2_1 +ffffffff82b638b0 r golden_settings_gc_9_2_1_vg12 +ffffffff82b639f0 r golden_settings_gc_9_0_vg20 +ffffffff82b63b00 r golden_settings_gc_9_4_1_arct +ffffffff82b63c10 r golden_settings_gc_9_1 +ffffffff82b63e50 r golden_settings_gc_9_1_rv2 +ffffffff82b64020 r golden_settings_gc_9_1_rv1 +ffffffff82b640d0 r golden_settings_gc_9_1_rn +ffffffff82b641f0 r golden_settings_gc_9_x_common +ffffffff82b65000 R gfx_v9_4_ras_ops +ffffffff82b65040 r gfx_v9_4_edc_counter_regs +ffffffff82b65420 r gfx_v9_4_ras_fields +ffffffff82b67000 R vgpr_init_regs_aldebaran +ffffffff82b671b0 R sgpr112_init_regs_aldebaran +ffffffff82b67360 R sgpr96_init_regs_aldebaran +ffffffff82b67510 R sgpr64_init_regs_aldebaran +ffffffff82b676c0 r golden_settings_gc_9_4_2_alde +ffffffff82b67720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82b677b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82b67840 r sgpr112_init_compute_shader_aldebaran +ffffffff82b67a60 r sgpr96_init_compute_shader_aldebaran +ffffffff82b67c50 r sgpr64_init_compute_shader_aldebaran +ffffffff82b67dc0 r vgpr_init_compute_shader_aldebaran +ffffffff82b686a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82b68a20 r gfx_v9_4_2_ras_fields +ffffffff82b6a3c0 r gfx_v9_4_2_utc_blocks +ffffffff82b6b000 r gfx_v9_4_3_ip_funcs +ffffffff82b6b0a0 R gfx_v9_4_3_ip_block +ffffffff82b6b0b8 r gfx_v9_4_3_kiq_pm4_funcs +ffffffff82b6b0f8 r gfx_v9_4_3_ring_funcs_kiq +ffffffff82b6b238 r gfx_v9_4_3_ring_funcs_compute +ffffffff82b6b378 r gfx_v9_4_3_eop_irq_funcs +ffffffff82b6b388 r gfx_v9_4_3_priv_reg_irq_funcs +ffffffff82b6b398 r gfx_v9_4_3_priv_inst_irq_funcs +ffffffff82b6b3a8 r gfx_v9_4_3_rlc_funcs +ffffffff82b6b410 r gfx_v9_4_3_gfx_funcs +ffffffff82b6b470 r gfx_v9_4_3_ce_reg_list +ffffffff82b6b800 r gfx_v9_4_3_ras_mem_list_array +ffffffff82b6b960 r gfx_v9_4_3_ue_reg_list +ffffffff82b6bd20 r gfx_v9_4_3_ras_cp_mem_list +ffffffff82b6bd70 r gfx_v9_4_3_ras_gcea_mem_list +ffffffff82b6beb0 r gfx_v9_4_3_ras_gc_cane_mem_list +ffffffff82b6bec0 r gfx_v9_4_3_ras_gcutcl2_mem_list +ffffffff82b6bed0 r gfx_v9_4_3_ras_gds_mem_list +ffffffff82b6bee0 r gfx_v9_4_3_ras_lds_mem_list +ffffffff82b6c100 r gfx_v9_4_3_ras_rlc_mem_list +ffffffff82b6c180 r gfx_v9_4_3_ras_sp_mem_list +ffffffff82b6c190 r gfx_v9_4_3_ras_spi_mem_list +ffffffff82b6c1d0 r gfx_v9_4_3_ras_sqc_mem_list +ffffffff82b6c340 r gfx_v9_4_3_ras_sq_mem_list +ffffffff82b6c380 r gfx_v9_4_3_ras_ta_mem_list +ffffffff82b6c3d0 r gfx_v9_4_3_ras_tcc_mem_list +ffffffff82b6c3e0 r gfx_v9_4_3_ras_tca_mem_list +ffffffff82b6c3f0 r gfx_v9_4_3_ras_tci_mem_list +ffffffff82b6c400 r gfx_v9_4_3_ras_tcp_mem_list +ffffffff82b6c590 r gfx_v9_4_3_ras_td_mem_list +ffffffff82b6c5c0 r gfx_v9_4_3_ras_tcx_mem_list +ffffffff82b6cb40 r gfx_v9_4_3_ras_atc_l2_mem_list +ffffffff82b6cb50 r gfx_v9_4_3_ras_utcl2_mem_list +ffffffff82b6cb60 r gfx_v9_4_3_ras_vml2_mem_list +ffffffff82b6cb70 r gfx_v9_4_3_ras_vml2_walker_mem_list +ffffffff82b6d000 R gfxhub_v1_0_funcs +ffffffff82b6e000 R gfxhub_v1_2_funcs +ffffffff82b6f000 R gfxhub_v2_0_funcs +ffffffff82b6f060 r gfxhub_v2_0_vmhub_funcs +ffffffff82b6f070 r gfxhub_client_ids +ffffffff82b70000 R gfxhub_v2_1_funcs +ffffffff82b70060 r gfxhub_v2_1_vmhub_funcs +ffffffff82b70070 r gfxhub_client_ids +ffffffff82b71000 R gfxhub_v3_0_funcs +ffffffff82b71060 r gfxhub_v3_0_vmhub_funcs +ffffffff82b71070 r gfxhub_client_ids +ffffffff82b72000 R gfxhub_v3_0_3_funcs +ffffffff82b72060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82b72070 r gfxhub_client_ids +ffffffff82b73000 R gmc_v10_0_ip_funcs +ffffffff82b730a0 R gmc_v10_0_ip_block +ffffffff82b730b8 r gmc_v10_0_gmc_funcs +ffffffff82b73110 r gmc_v10_0_irq_funcs +ffffffff82b73120 r gmc_v10_0_ecc_funcs +ffffffff82b74000 R gmc_v11_0_ip_funcs +ffffffff82b740a0 R gmc_v11_0_ip_block +ffffffff82b740b8 r gmc_v11_0_gmc_funcs +ffffffff82b74110 r gmc_v11_0_irq_funcs +ffffffff82b74120 r gmc_v11_0_ecc_funcs +ffffffff82b75000 r gmc_v7_0_ip_funcs +ffffffff82b750a0 R gmc_v7_0_ip_block +ffffffff82b750b8 R gmc_v7_4_ip_block +ffffffff82b750d0 r gmc_v7_0_gmc_funcs +ffffffff82b75128 r gmc_v7_0_irq_funcs +ffffffff82b75138 r iceland_mgcg_cgcg_init +ffffffff82b75150 r golden_settings_iceland_a11 +ffffffff82b75180 r mc_cg_registers +ffffffff82b751b0 r mc_cg_en +ffffffff82b751e0 r mc_cg_ls_en +ffffffff82b76000 r gmc_v8_0_ip_funcs +ffffffff82b760a0 R gmc_v8_0_ip_block +ffffffff82b760b8 R gmc_v8_1_ip_block +ffffffff82b760d0 R gmc_v8_5_ip_block +ffffffff82b760e8 r gmc_v8_0_gmc_funcs +ffffffff82b76140 r gmc_v8_0_irq_funcs +ffffffff82b76150 r fiji_mgcg_cgcg_init +ffffffff82b76160 r golden_settings_fiji_a10 +ffffffff82b76190 r tonga_mgcg_cgcg_init +ffffffff82b761a0 r golden_settings_tonga_a11 +ffffffff82b76200 r golden_settings_polaris11_a11 +ffffffff82b76230 r golden_settings_polaris10_a11 +ffffffff82b7626c r cz_mgcg_cgcg_init +ffffffff82b76280 r stoney_mgcg_cgcg_init +ffffffff82b762a0 r golden_settings_stoney_common +ffffffff82b77000 R gmc_v9_0_ip_funcs +ffffffff82b770a0 R gmc_v9_0_ip_block +ffffffff82b770b8 r gmc_v9_0_gmc_funcs +ffffffff82b77110 r gmc_v9_0_irq_funcs +ffffffff82b77120 r gmc_v9_0_ecc_funcs +ffffffff82b77130 r gfxhub_client_ids +ffffffff82b771a0 r mmhub_client_ids_vega10 +ffffffff82b77490 r mmhub_client_ids_vega12 +ffffffff82b77790 r mmhub_client_ids_vega20 +ffffffff82b77a80 r mmhub_client_ids_arcturus +ffffffff82b79290 r mmhub_client_ids_raven +ffffffff82b79450 r mmhub_client_ids_renoir +ffffffff82b79640 r mmhub_client_ids_aldebaran +ffffffff82b7ae50 r ecc_umc_mcumc_ctrl_addrs +ffffffff82b7aed0 r ecc_umc_mcumc_ctrl_mask_addrs +ffffffff82b7af50 r golden_settings_mmhub_1_0_0 +ffffffff82b7af80 r golden_settings_athub_1_0_0 +ffffffff82b7b000 R hdp_v4_0_funcs +ffffffff82b7c000 R hdp_v5_0_funcs +ffffffff82b7d000 R hdp_v5_2_funcs +ffffffff82b7e000 R hdp_v6_0_funcs +ffffffff82b7f000 r iceland_ih_ip_funcs +ffffffff82b7f0a0 R iceland_ih_ip_block +ffffffff82b7f0b8 r iceland_ih_funcs +ffffffff82b80000 r ih_v6_0_ip_funcs +ffffffff82b800a0 R ih_v6_0_ip_block +ffffffff82b800b8 r ih_v6_0_funcs +ffffffff82b800d8 r ih_v6_0_self_irq_funcs +ffffffff82b81000 r ih_v6_1_ip_funcs +ffffffff82b810a0 R ih_v6_1_ip_block +ffffffff82b810b8 r ih_v6_1_funcs +ffffffff82b810d8 r ih_v6_1_self_irq_funcs +ffffffff82b82000 R gfx_v11_0_imu_funcs +ffffffff82b82030 r imu_rlc_ram_golden_11 +ffffffff82b82680 r imu_rlc_ram_golden_11_0_2 +ffffffff82b83000 r imu_rlc_ram_golden_11_0_3 +ffffffff82b84000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82b84140 r jpeg_v1_0_irq_funcs +ffffffff82b85000 r jpeg_v2_0_ip_funcs +ffffffff82b850a0 R jpeg_v2_0_ip_block +ffffffff82b850b8 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82b851f8 r jpeg_v2_0_irq_funcs +ffffffff82b86000 r jpeg_v2_5_ip_funcs +ffffffff82b860a0 R jpeg_v2_5_ip_block +ffffffff82b860b8 r jpeg_v2_6_ip_funcs +ffffffff82b86158 R jpeg_v2_6_ip_block +ffffffff82b86170 R jpeg_v2_6_ras_hw_ops +ffffffff82b861b0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82b862f0 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82b86430 r jpeg_v2_5_irq_funcs +ffffffff82b86440 r jpeg_v2_6_ras_irq_funcs +ffffffff82b87000 r jpeg_v3_0_ip_funcs +ffffffff82b870a0 R jpeg_v3_0_ip_block +ffffffff82b870b8 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82b871f8 r jpeg_v3_0_irq_funcs +ffffffff82b88000 r jpeg_v4_0_ip_funcs +ffffffff82b880a0 R jpeg_v4_0_ip_block +ffffffff82b880b8 R jpeg_v4_0_ras_hw_ops +ffffffff82b880f8 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82b88238 r jpeg_v4_0_irq_funcs +ffffffff82b88248 r jpeg_v4_0_ras_irq_funcs +ffffffff82b89000 r jpeg_v4_0_3_ip_funcs +ffffffff82b890a0 R jpeg_v4_0_3_ip_block +ffffffff82b890b8 r jpeg_v4_0_3_dec_ring_vm_funcs +ffffffff82b891f8 r jpeg_v4_0_3_irq_funcs +ffffffff82b89208 r jpeg_v4_0_3_ras_hw_ops +ffffffff82b89250 r jpeg_v4_0_3_ue_reg_list +ffffffff82b8a000 R lsdma_v6_0_funcs +ffffffff82b8b000 r mca_v3_0_mp0_hw_ops +ffffffff82b8b040 r mca_v3_0_mp1_hw_ops +ffffffff82b8b080 r mca_v3_0_mpio_hw_ops +ffffffff82b8c000 r mes_v10_1_ip_funcs +ffffffff82b8c0a0 R mes_v10_1_ip_block +ffffffff82b8c0b8 r mes_v10_1_funcs +ffffffff82b8c0e8 r mes_v10_1_ring_funcs +ffffffff82b8d000 r mes_v11_0_ip_funcs +ffffffff82b8d0a0 R mes_v11_0_ip_block +ffffffff82b8d0b8 r mes_v11_0_funcs +ffffffff82b8d0e8 r mes_v11_0_ring_funcs +ffffffff82b8e000 R mmhub_v1_0_funcs +ffffffff82b8e050 r mmhub_v1_0_edc_cnt_regs +ffffffff82b8e0c0 r mmhub_v1_0_ras_fields +ffffffff82b8f000 R mmhub_v1_7_funcs +ffffffff82b8f050 r mmhub_v1_7_edc_cnt_regs +ffffffff82b8f250 r mmhub_v1_7_ras_fields +ffffffff82b909c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82b91000 R mmhub_v1_8_funcs +ffffffff82b91050 r mmhub_v1_8_ras_hw_ops +ffffffff82b91090 r mmhub_v1_8_ce_reg_list +ffffffff82b91180 r mmhub_v1_8_ras_memory_list +ffffffff82b912b0 r mmhub_v1_8_ue_reg_list +ffffffff82b92000 R mmhub_v2_0_funcs +ffffffff82b92050 r mmhub_v2_0_vmhub_funcs +ffffffff82b92060 r mmhub_client_ids_navi1x +ffffffff82b92190 r mmhub_client_ids_sienna_cichlid +ffffffff82b92450 r mmhub_client_ids_beige_goby +ffffffff82b93000 R mmhub_v2_3_funcs +ffffffff82b93050 r mmhub_v2_3_vmhub_funcs +ffffffff82b93060 r mmhub_client_ids_vangogh +ffffffff82b94000 R mmhub_v3_0_funcs +ffffffff82b94050 r mmhub_v3_0_vmhub_funcs +ffffffff82b94060 r mmhub_client_ids_v3_0_0 +ffffffff82b95000 R mmhub_v3_0_1_funcs +ffffffff82b95050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82b95060 r mmhub_client_ids_v3_0_1 +ffffffff82b96000 R mmhub_v3_0_2_funcs +ffffffff82b96050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82b96060 r mmhub_client_ids_v3_0_2 +ffffffff82b97000 R mmhub_v9_4_ras_hw_ops +ffffffff82b97040 R mmhub_v9_4_funcs +ffffffff82b97090 r mmhub_v9_4_edc_cnt_regs +ffffffff82b97330 r mmhub_v9_4_ras_fields +ffffffff82b993b0 r mmhub_v9_4_err_status_regs +ffffffff82b9a000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82b9a010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82b9a020 R xgpu_ai_virt_ops +ffffffff82b9b000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82b9b010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82b9b020 R xgpu_nv_virt_ops +ffffffff82b9c000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82b9c240 r xgpu_fiji_golden_settings_a10 +ffffffff82b9c370 r xgpu_fiji_golden_common_all +ffffffff82b9c3f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82b9c810 r xgpu_tonga_golden_settings_a11 +ffffffff82b9c9d0 r xgpu_tonga_golden_common_all +ffffffff82b9ca28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82b9ca38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82b9ca48 R xgpu_vi_virt_ops +ffffffff82b9d000 r navi10_ih_ip_funcs +ffffffff82b9d0a0 R navi10_ih_ip_block +ffffffff82b9d0b8 r navi10_ih_funcs +ffffffff82b9d0d8 r navi10_ih_self_irq_funcs +ffffffff82b9e000 R nbio_v2_3_hdp_flush_reg +ffffffff82b9e048 R nbio_v2_3_funcs +ffffffff82b9f000 R nbio_v4_3_hdp_flush_reg +ffffffff82b9f048 R nbio_v4_3_funcs +ffffffff82b9f158 R nbio_v4_3_sriov_funcs +ffffffff82b9f268 r nbio_v4_3_ras_err_event_athub_irq_funcs +ffffffff82ba0000 R nbio_v6_1_hdp_flush_reg +ffffffff82ba0048 R nbio_v6_1_funcs +ffffffff82ba1000 R nbio_v7_0_hdp_flush_reg +ffffffff82ba1048 R nbio_v7_0_funcs +ffffffff82ba2000 R nbio_v7_2_hdp_flush_reg +ffffffff82ba2048 R nbio_v7_2_funcs +ffffffff82ba3000 R nbio_v7_4_hdp_flush_reg +ffffffff82ba3048 R nbio_v7_4_ras_hw_ops +ffffffff82ba3088 R nbio_v7_4_funcs +ffffffff82ba3198 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82ba31a8 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82ba4000 R nbio_v7_7_hdp_flush_reg +ffffffff82ba4048 R nbio_v7_7_funcs +ffffffff82ba5000 R nbio_v7_9_hdp_flush_reg +ffffffff82ba5048 R nbio_v7_9_funcs +ffffffff82ba5158 R nbio_v7_9_ras_hw_ops +ffffffff82ba5198 r nbio_v7_9_ras_controller_irq_funcs +ffffffff82ba51a8 r nbio_v7_9_ras_err_event_athub_irq_funcs +ffffffff82ba6000 r nv_common_ip_funcs +ffffffff82ba60a0 R nv_common_ip_block +ffffffff82ba60b8 r nv_asic_funcs +ffffffff82ba6180 r nv_allowed_read_registers +ffffffff82ba6300 r sc_video_codecs_encode +ffffffff82ba6310 r sc_video_codecs_decode_vcn1 +ffffffff82ba6320 r sc_video_codecs_decode_vcn0 +ffffffff82ba6330 r yc_video_codecs_decode +ffffffff82ba6340 r bg_video_codecs_encode +ffffffff82ba6350 r bg_video_codecs_decode +ffffffff82ba6360 r nv_video_codecs_encode +ffffffff82ba6370 r nv_video_codecs_decode +ffffffff82ba6380 r sc_video_codecs_encode_array +ffffffff82ba63b0 r sc_video_codecs_decode_array_vcn1 +ffffffff82ba6440 r sc_video_codecs_decode_array_vcn0 +ffffffff82ba64e0 r yc_video_codecs_decode_array +ffffffff82ba6550 r bg_video_codecs_decode_array +ffffffff82ba6590 r nv_video_codecs_encode_array +ffffffff82ba65c0 r nv_video_codecs_decode_array +ffffffff82ba7000 r psp_v10_0_funcs +ffffffff82ba8000 r psp_v11_0_funcs +ffffffff82ba9000 r psp_v11_0_8_funcs +ffffffff82baa000 r psp_v12_0_funcs +ffffffff82bab000 r psp_v13_0_funcs +ffffffff82bac000 r psp_v13_0_4_funcs +ffffffff82bad000 r psp_v3_1_funcs +ffffffff82bae000 r sdma_v2_4_ip_funcs +ffffffff82bae0a0 R sdma_v2_4_ip_block +ffffffff82bae0b8 r sdma_v2_4_ring_funcs +ffffffff82bae1f8 r sdma_v2_4_buffer_funcs +ffffffff82bae218 r sdma_v2_4_vm_pte_funcs +ffffffff82bae238 r sdma_v2_4_trap_irq_funcs +ffffffff82bae248 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82bae260 r iceland_mgcg_cgcg_init +ffffffff82bae280 r golden_settings_iceland_a11 +ffffffff82baf000 r sdma_v3_0_ip_funcs +ffffffff82baf0a0 R sdma_v3_0_ip_block +ffffffff82baf0b8 R sdma_v3_1_ip_block +ffffffff82baf0d0 r sdma_v3_0_ring_funcs +ffffffff82baf210 r sdma_v3_0_buffer_funcs +ffffffff82baf230 r sdma_v3_0_vm_pte_funcs +ffffffff82baf250 r sdma_v3_0_trap_irq_funcs +ffffffff82baf260 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82baf270 r fiji_mgcg_cgcg_init +ffffffff82baf290 r golden_settings_fiji_a10 +ffffffff82baf2f0 r tonga_mgcg_cgcg_init +ffffffff82baf310 r golden_settings_tonga_a11 +ffffffff82baf390 r golden_settings_polaris11_a11 +ffffffff82baf410 r golden_settings_polaris10_a11 +ffffffff82baf490 r cz_mgcg_cgcg_init +ffffffff82baf4b0 r cz_golden_settings_a11 +ffffffff82baf540 r stoney_mgcg_cgcg_init +ffffffff82baf550 r stoney_golden_settings_a11 +ffffffff82bb0000 R sdma_v4_0_ip_funcs +ffffffff82bb00a0 R sdma_v4_0_ras_hw_ops +ffffffff82bb00e0 R sdma_v4_0_ip_block +ffffffff82bb00f8 r sdma_v4_0_ring_funcs +ffffffff82bb0238 r sdma_v4_0_page_ring_funcs +ffffffff82bb0378 r sdma_v4_0_buffer_funcs +ffffffff82bb0398 r sdma_v4_0_vm_pte_funcs +ffffffff82bb03b8 r sdma_v4_0_trap_irq_funcs +ffffffff82bb03c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82bb03d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82bb03e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82bb03f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82bb0408 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82bb0418 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82bb0430 r golden_settings_sdma_4 +ffffffff82bb0690 r golden_settings_sdma_vg10 +ffffffff82bb0740 r golden_settings_sdma_vg12 +ffffffff82bb07f0 r golden_settings_sdma0_4_2_init +ffffffff82bb0810 r golden_settings_sdma0_4_2 +ffffffff82bb0aa0 r golden_settings_sdma1_4_2 +ffffffff82bb0d30 r golden_settings_sdma_arct +ffffffff82bb1030 r golden_settings_sdma_aldebaran +ffffffff82bb11a0 r golden_settings_sdma_4_1 +ffffffff82bb12b0 r golden_settings_sdma_rv2 +ffffffff82bb12e0 r golden_settings_sdma_rv1 +ffffffff82bb1310 r golden_settings_sdma_4_3 +ffffffff82bb1400 r sdma_v4_0_ras_fields +ffffffff82bb2000 R sdma_v4_4_ras_hw_ops +ffffffff82bb2040 r sdma_v4_4_ras_fields +ffffffff82bb3000 R sdma_v4_4_2_ip_funcs +ffffffff82bb30a0 R sdma_v4_4_2_ip_block +ffffffff82bb30b8 r sdma_v4_4_2_ring_funcs +ffffffff82bb31f8 r sdma_v4_4_2_page_ring_funcs +ffffffff82bb3338 r sdma_v4_4_2_buffer_funcs +ffffffff82bb3358 r sdma_v4_4_2_vm_pte_funcs +ffffffff82bb3378 r sdma_v4_4_2_trap_irq_funcs +ffffffff82bb3388 r sdma_v4_4_2_illegal_inst_irq_funcs +ffffffff82bb3398 r sdma_v4_4_2_ecc_irq_funcs +ffffffff82bb33a8 r sdma_v4_4_2_vm_hole_irq_funcs +ffffffff82bb33b8 r sdma_v4_4_2_doorbell_invalid_irq_funcs +ffffffff82bb33c8 r sdma_v4_4_2_pool_timeout_irq_funcs +ffffffff82bb33d8 r sdma_v4_4_2_srbm_write_irq_funcs +ffffffff82bb33e8 r sdma_v4_4_2_ras_hw_ops +ffffffff82bb3430 r sdma_v4_2_2_ue_reg_list +ffffffff82bb3460 r sdma_v4_4_2_ras_memory_list +ffffffff82bb4000 R sdma_v5_0_ip_funcs +ffffffff82bb40a0 R sdma_v5_0_ip_block +ffffffff82bb40b8 r sdma_v5_0_ring_funcs +ffffffff82bb41f8 r sdma_v5_0_buffer_funcs +ffffffff82bb4218 r sdma_v5_0_vm_pte_funcs +ffffffff82bb4238 r sdma_v5_0_trap_irq_funcs +ffffffff82bb4248 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82bb4260 r golden_settings_sdma_5 +ffffffff82bb44a0 r golden_settings_sdma_nv10 +ffffffff82bb44d0 r golden_settings_sdma_nv14 +ffffffff82bb4500 r golden_settings_sdma_5_sriov +ffffffff82bb46e0 r golden_settings_sdma_nv12 +ffffffff82bb4770 r golden_settings_sdma_cyan_skillfish +ffffffff82bb5000 R sdma_v5_2_ip_funcs +ffffffff82bb50a0 R sdma_v5_2_ip_block +ffffffff82bb50b8 r sdma_v5_2_ring_funcs +ffffffff82bb51f8 r sdma_v5_2_buffer_funcs +ffffffff82bb5218 r sdma_v5_2_vm_pte_funcs +ffffffff82bb5238 r sdma_v5_2_trap_irq_funcs +ffffffff82bb5248 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82bb6000 R sdma_v6_0_ip_funcs +ffffffff82bb60a0 R sdma_v6_0_ip_block +ffffffff82bb60b8 r sdma_v6_0_ring_funcs +ffffffff82bb61f8 r sdma_v6_0_buffer_funcs +ffffffff82bb6218 r sdma_v6_0_vm_pte_funcs +ffffffff82bb6238 r sdma_v6_0_trap_irq_funcs +ffffffff82bb6248 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82bb7000 r smu_v11_0_i2c_algo +ffffffff82bb7010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82bb7028 r smu_v11_0_i2c_control_quirks +ffffffff82bb8000 R smuio_v11_0_funcs +ffffffff82bb9000 R smuio_v11_0_6_funcs +ffffffff82bba000 R smuio_v13_0_funcs +ffffffff82bbb000 R smuio_v13_0_3_funcs +ffffffff82bbc000 R smuio_v13_0_6_funcs +ffffffff82bbd000 R smuio_v9_0_funcs +ffffffff82bbe000 r soc15_common_ip_funcs +ffffffff82bbe0a0 R vega10_common_ip_block +ffffffff82bbe0b8 r soc15_asic_funcs +ffffffff82bbe178 r vega20_asic_funcs +ffffffff82bbe238 r aqua_vanjaram_asic_funcs +ffffffff82bbe300 r soc15_allowed_read_registers +ffffffff82bbe490 r vega_video_codecs_encode +ffffffff82bbe4a0 r vega_video_codecs_decode +ffffffff82bbe4b0 r rv_video_codecs_decode +ffffffff82bbe4c0 r rn_video_codecs_decode +ffffffff82bbe4d0 r vcn_4_0_3_video_codecs_encode +ffffffff82bbe4e0 r vcn_4_0_3_video_codecs_decode +ffffffff82bbe4f0 r vega_video_codecs_encode_array +ffffffff82bbe520 r vega_video_codecs_decode_array +ffffffff82bbe5a0 r rv_video_codecs_decode_array +ffffffff82bbe630 r rn_video_codecs_decode_array +ffffffff82bbe6c0 r vcn_4_0_3_video_codecs_decode_array +ffffffff82bbf000 r soc21_common_ip_funcs +ffffffff82bbf0a0 R soc21_common_ip_block +ffffffff82bbf0b8 r soc21_asic_funcs +ffffffff82bbf180 r soc21_allowed_read_registers +ffffffff82bbf300 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82bbf310 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82bbf320 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82bbf330 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82bbf340 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82bbf370 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82bbf3c0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82bbf400 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82bc0000 r tonga_ih_ip_funcs +ffffffff82bc00a0 R tonga_ih_ip_block +ffffffff82bc00b8 r tonga_ih_funcs +ffffffff82bc1000 R umc_v6_0_funcs +ffffffff82bc2000 R umc_v6_1_channel_idx_tbl +ffffffff82bc2080 R umc_v6_1_ras_hw_ops +ffffffff82bc3000 R umc_v6_7_channel_idx_tbl_second +ffffffff82bc3080 R umc_v6_7_channel_idx_tbl_first +ffffffff82bc3100 R umc_v6_7_ras_hw_ops +ffffffff82bc4000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82bc4040 R umc_v8_10_channel_idx_tbl_ext0 +ffffffff82bc4080 R umc_v8_10_channel_idx_tbl +ffffffff82bc40e0 R umc_v8_10_ras_hw_ops +ffffffff82bc5000 R umc_v8_7_channel_idx_tbl +ffffffff82bc5040 R umc_v8_7_ras_hw_ops +ffffffff82bc6000 r uvd_v5_0_ip_funcs +ffffffff82bc60a0 R uvd_v5_0_ip_block +ffffffff82bc60b8 r uvd_v5_0_ring_funcs +ffffffff82bc61f8 r uvd_v5_0_irq_funcs +ffffffff82bc7000 r uvd_v6_0_ip_funcs +ffffffff82bc70a0 R uvd_v6_0_ip_block +ffffffff82bc70b8 R uvd_v6_2_ip_block +ffffffff82bc70d0 R uvd_v6_3_ip_block +ffffffff82bc70e8 r uvd_v6_0_ring_vm_funcs +ffffffff82bc7228 r uvd_v6_0_ring_phys_funcs +ffffffff82bc7368 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82bc74a8 r uvd_v6_0_irq_funcs +ffffffff82bc8000 R uvd_v7_0_ip_funcs +ffffffff82bc80a0 R uvd_v7_0_ip_block +ffffffff82bc80b8 r uvd_v7_0_ring_vm_funcs +ffffffff82bc81f8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82bc8338 r uvd_v7_0_irq_funcs +ffffffff82bc9000 r vce_v3_0_ip_funcs +ffffffff82bc90a0 R vce_v3_0_ip_block +ffffffff82bc90b8 R vce_v3_1_ip_block +ffffffff82bc90d0 R vce_v3_4_ip_block +ffffffff82bc90e8 r vce_v3_0_ring_vm_funcs +ffffffff82bc9228 r vce_v3_0_ring_phys_funcs +ffffffff82bc9368 r vce_v3_0_irq_funcs +ffffffff82bca000 R vce_v4_0_ip_funcs +ffffffff82bca0a0 R vce_v4_0_ip_block +ffffffff82bca0b8 r vce_v4_0_ring_vm_funcs +ffffffff82bca1f8 r vce_v4_0_irq_funcs +ffffffff82bcb000 r vcn_v1_0_ip_funcs +ffffffff82bcb0a0 R vcn_v1_0_ip_block +ffffffff82bcb0b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82bcb1f8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82bcb338 r vcn_v1_0_irq_funcs +ffffffff82bcc000 r vcn_v2_0_ip_funcs +ffffffff82bcc0a0 R vcn_v2_0_ip_block +ffffffff82bcc0b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82bcc1f8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82bcc338 r vcn_v2_0_irq_funcs +ffffffff82bcd000 r vcn_v2_5_ip_funcs +ffffffff82bcd0a0 R vcn_v2_5_ip_block +ffffffff82bcd0b8 r vcn_v2_6_ip_funcs +ffffffff82bcd158 R vcn_v2_6_ip_block +ffffffff82bcd170 R vcn_v2_6_ras_hw_ops +ffffffff82bcd1b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82bcd2f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82bcd430 r vcn_v2_5_irq_funcs +ffffffff82bcd440 r vcn_v2_6_ras_irq_funcs +ffffffff82bce000 r vcn_v3_0_ip_funcs +ffffffff82bce0a0 R vcn_v3_0_ip_block +ffffffff82bce0b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82bce1f8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82bce338 r vcn_v3_0_irq_funcs +ffffffff82bcf000 r vcn_v4_0_ip_funcs +ffffffff82bcf0a0 R vcn_v4_0_ip_block +ffffffff82bcf0b8 R vcn_v4_0_ras_hw_ops +ffffffff82bcf0f8 r vcn_v4_0_irq_funcs +ffffffff82bcf108 r vcn_v4_0_ras_irq_funcs +ffffffff82bd0000 r vcn_v4_0_3_ip_funcs +ffffffff82bd00a0 R vcn_v4_0_3_ip_block +ffffffff82bd00b8 r vcn_v4_0_3_unified_ring_vm_funcs +ffffffff82bd01f8 r vcn_v4_0_3_irq_funcs +ffffffff82bd0208 r vcn_v4_0_3_ras_hw_ops +ffffffff82bd0250 r vcn_v4_0_3_ue_reg_list +ffffffff82bd1000 R vega10_ih_ip_funcs +ffffffff82bd10a0 R vega10_ih_ip_block +ffffffff82bd10b8 r vega10_ih_funcs +ffffffff82bd10d8 r vega10_ih_self_irq_funcs +ffffffff82bd2000 r GC_BASE +ffffffff82bd2064 r HDP_BASE +ffffffff82bd20c8 r MMHUB_BASE +ffffffff82bd212c r ATHUB_BASE +ffffffff82bd2190 r NBIO_BASE +ffffffff82bd21f4 r MP0_BASE +ffffffff82bd2258 r MP1_BASE +ffffffff82bd22bc r VCE_BASE +ffffffff82bd2320 r VCN_BASE +ffffffff82bd2384 r DF_BASE +ffffffff82bd23e8 r DCE_BASE +ffffffff82bd244c r OSSSYS_BASE +ffffffff82bd24b0 r SDMA0_BASE +ffffffff82bd2514 r SDMA1_BASE +ffffffff82bd2578 r SMUIO_BASE +ffffffff82bd25dc r PWR_BASE +ffffffff82bd2640 r NBIF_BASE +ffffffff82bd26a4 r THM_BASE +ffffffff82bd2708 r CLK_BASE +ffffffff82bd3000 R vega20_ih_ip_funcs +ffffffff82bd30a0 R vega20_ih_ip_block +ffffffff82bd30b8 r vega20_ih_funcs +ffffffff82bd30d8 r vega20_ih_self_irq_funcs +ffffffff82bd4000 r GC_BASE +ffffffff82bd4090 r HDP_BASE +ffffffff82bd4120 r MMHUB_BASE +ffffffff82bd41b0 r ATHUB_BASE +ffffffff82bd4240 r NBIO_BASE +ffffffff82bd42d0 r MP0_BASE +ffffffff82bd4360 r MP1_BASE +ffffffff82bd43f0 r UVD_BASE +ffffffff82bd4480 r VCE_BASE +ffffffff82bd4510 r DF_BASE +ffffffff82bd45a0 r DCE_BASE +ffffffff82bd4630 r OSSSYS_BASE +ffffffff82bd46c0 r SDMA0_BASE +ffffffff82bd4750 r SDMA1_BASE +ffffffff82bd47e0 r SMUIO_BASE +ffffffff82bd4870 r THM_BASE +ffffffff82bd4900 r CLK_BASE +ffffffff82bd4990 r UMC_BASE +ffffffff82bd4a20 r RSMU_BASE +ffffffff82bd5000 r vi_common_ip_block +ffffffff82bd5018 r vi_common_ip_funcs +ffffffff82bd50b8 r vi_asic_funcs +ffffffff82bd5180 r vi_allowed_read_registers +ffffffff82bd53e0 r topaz_video_codecs_encode +ffffffff82bd53f0 r topaz_video_codecs_decode +ffffffff82bd5400 r tonga_video_codecs_encode +ffffffff82bd5410 r tonga_video_codecs_decode +ffffffff82bd5420 r polaris_video_codecs_encode +ffffffff82bd5430 r cz_video_codecs_decode +ffffffff82bd5440 r tonga_video_codecs_encode_array +ffffffff82bd5460 r tonga_video_codecs_decode_array +ffffffff82bd54b0 r polaris_video_codecs_encode_array +ffffffff82bd54e0 r cz_video_codecs_decode_array +ffffffff82bd5560 r iceland_mgcg_cgcg_init +ffffffff82bd55a0 r fiji_mgcg_cgcg_init +ffffffff82bd5600 r tonga_mgcg_cgcg_init +ffffffff82bd5660 r cz_mgcg_cgcg_init +ffffffff82bd56a0 r stoney_mgcg_cgcg_init +ffffffff82bd6000 r amdgpu_dm_funcs +ffffffff82bd60a0 R dm_ip_block +ffffffff82bd60b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82bd6120 r dm_display_funcs +ffffffff82bd6180 r hpd_disconnect_quirk_table +ffffffff82bd6ef0 r amdgpu_dm_mode_funcs +ffffffff82bd6f38 r amdgpu_dm_audio_component_bind_ops +ffffffff82bd6f48 r amdgpu_dm_audio_component_ops +ffffffff82bd6f80 r amdgpu_dm_encoder_funcs +ffffffff82bd6fa0 r amdgpu_dm_connector_funcs +ffffffff82bd7018 r amdgpu_dm_connector_helper_funcs +ffffffff82bd7078 r amdgpu_dm_i2c_algo +ffffffff82bd7088 r amdgpu_dm_backlight_ops +ffffffff82bd7260 r add_fs_modes.common_rates +ffffffff82bd8000 r amdgpu_dm_crtc_funcs +ffffffff82bd80c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82bd9000 r dm_dtn_log_begin.msg +ffffffff82bd900d r dm_dtn_log_end.msg +ffffffff82bd9018 r SYNAPTICS_DEVICE_ID +ffffffff82bda000 r dm_crtc_irq_funcs +ffffffff82bda010 r dm_vline0_irq_funcs +ffffffff82bda020 r dm_dmub_outbox_irq_funcs +ffffffff82bda030 r dm_vupdate_irq_funcs +ffffffff82bda040 r dm_dmub_trace_irq_funcs +ffffffff82bda050 r dm_pageflip_irq_funcs +ffffffff82bda060 r dm_hpd_irq_funcs +ffffffff82bdb000 r amdgpu_dm_encoder_funcs +ffffffff82bdb020 r dm_mst_cbs +ffffffff82bdb030 r dm_dp_mst_connector_funcs +ffffffff82bdb0a8 r dm_dp_mst_connector_helper_funcs +ffffffff82bdc000 r dm_plane_funcs +ffffffff82bdc068 r dm_plane_helper_funcs +ffffffff82bde000 r vbios_funcs +ffffffff82bdf000 r vbios_funcs +ffffffff82be4000 r command_table_helper_funcs +ffffffff82be5000 r command_table_helper_funcs +ffffffff82be6000 r command_table_helper_funcs +ffffffff82be7000 r command_table_helper_funcs +ffffffff82be8000 r dce80_max_clks_by_state +ffffffff82be8028 r disp_clk_regs +ffffffff82be807c r disp_clk_shift +ffffffff82be8088 r disp_clk_mask +ffffffff82be9000 r dce110_max_clks_by_state +ffffffff82be9028 r disp_clk_regs +ffffffff82be907c r disp_clk_shift +ffffffff82be9088 r disp_clk_mask +ffffffff82bea000 r dce112_max_clks_by_state +ffffffff82bea028 r disp_clk_regs +ffffffff82bea07c r disp_clk_shift +ffffffff82bea088 r disp_clk_mask +ffffffff82beb000 r dce120_max_clks_by_state +ffffffff82bec000 r clk_mgr_regs +ffffffff82bec054 r clk_mgr_shift +ffffffff82bec060 r clk_mgr_mask +ffffffff82bed000 r clk_mgr_regs +ffffffff82bed054 r clk_mgr_shift +ffffffff82bed060 r clk_mgr_mask +ffffffff82bee000 r clk_mgr_regs +ffffffff82bee054 r clk_mgr_shift +ffffffff82bee060 r clk_mgr_mask +ffffffff82bef000 r lpddr5_wm_table +ffffffff82bef0c0 r ddr5_wm_table +ffffffff82bf0000 r lpddr5_wm_table +ffffffff82bf00c0 r ddr5_wm_table +ffffffff82bf1000 r ddr5_wm_table +ffffffff82bf2000 r lpddr5_wm_table +ffffffff82bf20c0 r ddr4_wm_table +ffffffff82bf3000 r clk_mgr_regs_dcn321 +ffffffff82bf3054 r clk_mgr_shift_dcn321 +ffffffff82bf3060 r clk_mgr_mask_dcn321 +ffffffff82bf3084 r clk_mgr_regs_dcn32 +ffffffff82bf30d8 r clk_mgr_shift_dcn32 +ffffffff82bf30e4 r clk_mgr_mask_dcn32 +ffffffff82bf4000 r DC_BUILD_ID +ffffffff82bf6000 r output_csc_matrix +ffffffff82bf60e0 r black_color_format +ffffffff82bf9000 r dce_funcs +ffffffff82bfa000 r funcs +ffffffff82bfb000 R video_optimized_pixel_rates +ffffffff82bfb1c0 r dce110_clk_src_funcs +ffffffff82bfb1e8 r dce112_clk_src_funcs +ffffffff82bfb210 r dcn20_clk_src_funcs +ffffffff82bfb238 r dcn3_clk_src_funcs +ffffffff82bfb260 r dcn31_clk_src_funcs +ffffffff82bfc000 r dce_funcs +ffffffff82bfc068 r dcn10_funcs +ffffffff82bfc0d0 r dcn20_funcs +ffffffff82bfc138 r dcn21_funcs +ffffffff82bfd000 r dce_ipp_funcs +ffffffff82bfe000 r dce110_lnk_enc_funcs +ffffffff82bff000 r dce_mi_funcs +ffffffff82bff090 r dce112_mi_funcs +ffffffff82bff120 r dce120_mi_funcs +ffffffff82bff1b0 r pte_settings +ffffffff82c00000 r funcs +ffffffff82c01000 r dce_link_panel_cntl_funcs +ffffffff82c02000 r filter_3tap_16p_upscale +ffffffff82c02040 r filter_3tap_16p_116 +ffffffff82c02080 r filter_3tap_16p_149 +ffffffff82c020c0 r filter_3tap_16p_183 +ffffffff82c02100 r filter_3tap_64p_upscale +ffffffff82c021d0 r filter_3tap_64p_116 +ffffffff82c022a0 r filter_3tap_64p_149 +ffffffff82c02370 r filter_3tap_64p_183 +ffffffff82c02440 r filter_4tap_16p_upscale +ffffffff82c02490 r filter_4tap_16p_116 +ffffffff82c024e0 r filter_4tap_16p_149 +ffffffff82c02530 r filter_4tap_16p_183 +ffffffff82c02580 r filter_4tap_64p_upscale +ffffffff82c02690 r filter_4tap_64p_116 +ffffffff82c027a0 r filter_4tap_64p_149 +ffffffff82c028b0 r filter_4tap_64p_183 +ffffffff82c029c0 r filter_5tap_64p_upscale +ffffffff82c02b10 r filter_5tap_64p_116 +ffffffff82c02c60 r filter_5tap_64p_149 +ffffffff82c02db0 r filter_5tap_64p_183 +ffffffff82c02f00 r filter_6tap_64p_upscale +ffffffff82c03090 r filter_6tap_64p_116 +ffffffff82c03220 r filter_6tap_64p_149 +ffffffff82c033b0 r filter_6tap_64p_183 +ffffffff82c03540 r filter_7tap_64p_upscale +ffffffff82c03710 r filter_7tap_64p_116 +ffffffff82c038e0 r filter_7tap_64p_149 +ffffffff82c03ab0 r filter_7tap_64p_183 +ffffffff82c03c80 r filter_8tap_64p_upscale +ffffffff82c03e90 r filter_8tap_64p_116 +ffffffff82c040a0 r filter_8tap_64p_149 +ffffffff82c042b0 r filter_8tap_64p_183 +ffffffff82c044c0 r filter_2tap_16p +ffffffff82c044f0 r filter_2tap_64p +ffffffff82c05000 r dce110_str_enc_funcs +ffffffff82c05120 r audio_clock_info_table_48bpc +ffffffff82c052b0 r audio_clock_info_table_36bpc +ffffffff82c05440 r audio_clock_info_table +ffffffff82c06000 r global_color_matrix +ffffffff82c060a8 r dce_transform_funcs +ffffffff82c07000 r abm_funcs +ffffffff82c08000 r psr_funcs +ffffffff82c08040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82c08045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82c09000 r replay_funcs +ffffffff82c0a000 r reg_offsets +ffffffff82c0b000 r bios_regs +ffffffff82c0b008 r res_cap +ffffffff82c0b048 r dce100_res_pool_funcs +ffffffff82c0b140 r clk_src_regs +ffffffff82c0b23c r dmcu_regs +ffffffff82c0b298 r dmcu_shift +ffffffff82c0b2ac r dmcu_mask +ffffffff82c0b2f8 r abm_regs +ffffffff82c0b360 r abm_shift +ffffffff82c0b384 r abm_mask +ffffffff82c0b410 r debug_defaults +ffffffff82c0b5c0 r dce100_tg_offsets +ffffffff82c0b608 r plane_cap +ffffffff82c0b638 r res_create_funcs +ffffffff82c0b670 r panel_cntl_regs +ffffffff82c0b690 r panel_cntl_shift +ffffffff82c0b6a0 r panel_cntl_mask +ffffffff82c0b6e0 r link_enc_regs +ffffffff82c0baa0 r link_enc_aux_regs +ffffffff82c0baf0 r link_enc_hpd_regs +ffffffff82c0bb08 r link_enc_feature +ffffffff82c0bb18 r cs_shift +ffffffff82c0bb24 r cs_mask +ffffffff82c0bb50 r mi_regs +ffffffff82c0be68 r mi_shifts +ffffffff82c0beb0 r mi_masks +ffffffff82c0bfd0 r ipp_regs +ffffffff82c0c1c8 r ipp_shift +ffffffff82c0c1f0 r ipp_mask +ffffffff82c0c290 r xfm_regs +ffffffff82c0c830 r xfm_shift +ffffffff82c0c890 r xfm_mask +ffffffff82c0ca10 r opp_regs +ffffffff82c0cb60 r opp_shift +ffffffff82c0cb8c r opp_mask +ffffffff82c0cc40 r aux_engine_regs +ffffffff82c0cd30 r aux_mask +ffffffff82c0cd90 r aux_shift +ffffffff82c0cdb0 r i2c_hw_regs +ffffffff82c0cf00 r i2c_shifts +ffffffff82c0cf2c r i2c_masks +ffffffff82c0cfd0 r audio_regs +ffffffff82c0d104 r audio_shift +ffffffff82c0d11c r audio_mask +ffffffff82c0d160 r stream_enc_regs +ffffffff82c0d80c r se_shift +ffffffff82c0d890 r se_mask +ffffffff82c0da94 r hwseq_reg +ffffffff82c0dcb0 r hwseq_shift +ffffffff82c0dd30 r hwseq_mask +ffffffff82c0e000 r reg_offsets +ffffffff82c0e018 r dce110_compressor_funcs +ffffffff82c0f000 r dce110_funcs +ffffffff82c0f2e8 r dce110_private_funcs +ffffffff82c10000 r dce110_mem_input_v_funcs +ffffffff82c10090 r dvmm_Hw_Setting_1DTiling +ffffffff82c10120 r dvmm_Hw_Setting_2DTiling +ffffffff82c101b0 r dvmm_Hw_Setting_Linear +ffffffff82c11000 r global_color_matrix +ffffffff82c110b0 r input_csc_matrix +ffffffff82c12000 r funcs +ffffffff82c13000 r bios_regs +ffffffff82c13008 r dce110_res_pool_funcs +ffffffff82c13100 r debug_defaults +ffffffff82c132b0 r clk_src_regs +ffffffff82c133ac r dmcu_regs +ffffffff82c13408 r dmcu_shift +ffffffff82c1341c r dmcu_mask +ffffffff82c13468 r abm_regs +ffffffff82c134d0 r abm_shift +ffffffff82c134f4 r abm_mask +ffffffff82c13580 r dce110_tg_offsets +ffffffff82c135c8 r res_create_funcs +ffffffff82c135f8 r plane_cap +ffffffff82c13624 r underlay_plane_cap +ffffffff82c13650 r stoney_resource_cap +ffffffff82c1368c r carrizo_resource_cap +ffffffff82c136d0 r panel_cntl_regs +ffffffff82c136f0 r panel_cntl_shift +ffffffff82c13700 r panel_cntl_mask +ffffffff82c13740 r link_enc_regs +ffffffff82c13b00 r link_enc_aux_regs +ffffffff82c13b50 r link_enc_hpd_regs +ffffffff82c13b68 r link_enc_feature +ffffffff82c13b78 r cs_shift +ffffffff82c13b84 r cs_mask +ffffffff82c13bb0 r mi_regs +ffffffff82c13d3c r mi_shifts +ffffffff82c13d84 r mi_masks +ffffffff82c13ea0 r ipp_regs +ffffffff82c13f9c r ipp_shift +ffffffff82c13fc4 r ipp_mask +ffffffff82c14060 r xfm_regs +ffffffff82c14330 r xfm_shift +ffffffff82c14390 r xfm_mask +ffffffff82c14510 r opp_regs +ffffffff82c14660 r opp_shift +ffffffff82c1468c r opp_mask +ffffffff82c14740 r aux_engine_regs +ffffffff82c14830 r aux_mask +ffffffff82c14890 r aux_shift +ffffffff82c148b0 r i2c_hw_regs +ffffffff82c14a00 r i2c_shifts +ffffffff82c14a2c r i2c_masks +ffffffff82c14ad0 r audio_regs +ffffffff82c14c04 r audio_shift +ffffffff82c14c1c r audio_mask +ffffffff82c14c60 r stream_enc_regs +ffffffff82c14f3c r se_shift +ffffffff82c14fc0 r se_mask +ffffffff82c151c4 r hwseq_stoney_reg +ffffffff82c153e0 r hwseq_cz_reg +ffffffff82c155fc r hwseq_shift +ffffffff82c1567c r hwseq_mask +ffffffff82c16000 r dce110_tg_funcs +ffffffff82c17000 r dce110_tg_v_funcs +ffffffff82c18000 r dce110_xfmv_funcs +ffffffff82c19000 r reg_offsets +ffffffff82c1a000 r reg_offsets +ffffffff82c1b000 r bios_regs +ffffffff82c1b008 r dce112_res_pool_funcs +ffffffff82c1b100 r debug_defaults +ffffffff82c1b2b0 r clk_src_regs +ffffffff82c1b4a8 r dmcu_regs +ffffffff82c1b504 r dmcu_shift +ffffffff82c1b518 r dmcu_mask +ffffffff82c1b564 r abm_regs +ffffffff82c1b5cc r abm_shift +ffffffff82c1b5f0 r abm_mask +ffffffff82c1b680 r dce112_tg_offsets +ffffffff82c1b6c8 r res_create_funcs +ffffffff82c1b6f8 r plane_cap +ffffffff82c1b724 r polaris_11_resource_cap +ffffffff82c1b760 r polaris_10_resource_cap +ffffffff82c1b7a0 r panel_cntl_regs +ffffffff82c1b7c0 r panel_cntl_shift +ffffffff82c1b7d0 r panel_cntl_mask +ffffffff82c1b810 r link_enc_regs +ffffffff82c1bbd0 r link_enc_aux_regs +ffffffff82c1bc20 r link_enc_hpd_regs +ffffffff82c1bc38 r link_enc_feature +ffffffff82c1bc48 r cs_shift +ffffffff82c1bc54 r cs_mask +ffffffff82c1bc80 r mi_regs +ffffffff82c1bf98 r mi_shifts +ffffffff82c1bfe0 r mi_masks +ffffffff82c1c100 r ipp_regs +ffffffff82c1c2f8 r ipp_shift +ffffffff82c1c320 r ipp_mask +ffffffff82c1c3c0 r xfm_regs +ffffffff82c1c960 r xfm_shift +ffffffff82c1c9c0 r xfm_mask +ffffffff82c1cb40 r opp_regs +ffffffff82c1cc90 r opp_shift +ffffffff82c1ccbc r opp_mask +ffffffff82c1cd70 r aux_engine_regs +ffffffff82c1ce60 r aux_mask +ffffffff82c1cec0 r aux_shift +ffffffff82c1cee0 r i2c_hw_regs +ffffffff82c1d030 r i2c_shifts +ffffffff82c1d05c r i2c_masks +ffffffff82c1d100 r audio_regs +ffffffff82c1d208 r audio_shift +ffffffff82c1d220 r audio_mask +ffffffff82c1d260 r stream_enc_regs +ffffffff82c1d818 r se_shift +ffffffff82c1d89c r se_mask +ffffffff82c1daa0 r hwseq_reg +ffffffff82c1dcbc r hwseq_shift +ffffffff82c1dd3c r hwseq_mask +ffffffff82c1e000 r bios_regs +ffffffff82c1e008 r res_cap +ffffffff82c1e048 r dce120_res_pool_funcs +ffffffff82c1e140 r debug_defaults +ffffffff82c1e2f0 r clk_src_regs +ffffffff82c1e4e8 r dmcu_regs +ffffffff82c1e544 r dmcu_shift +ffffffff82c1e558 r dmcu_mask +ffffffff82c1e5a4 r abm_regs +ffffffff82c1e60c r abm_shift +ffffffff82c1e630 r abm_mask +ffffffff82c1e6c0 r dce120_tg_offsets +ffffffff82c1e708 r dce121_res_create_funcs +ffffffff82c1e738 r res_create_funcs +ffffffff82c1e768 r plane_cap +ffffffff82c1e7a0 r panel_cntl_regs +ffffffff82c1e7c0 r panel_cntl_shift +ffffffff82c1e7d0 r panel_cntl_mask +ffffffff82c1e810 r link_enc_regs +ffffffff82c1ebd0 r link_enc_aux_regs +ffffffff82c1ec20 r link_enc_hpd_regs +ffffffff82c1ec38 r link_enc_feature +ffffffff82c1ec48 r cs_shift +ffffffff82c1ec54 r cs_mask +ffffffff82c1ec80 r mi_regs +ffffffff82c1ef98 r mi_shifts +ffffffff82c1efe0 r mi_masks +ffffffff82c1f100 r ipp_regs +ffffffff82c1f2f8 r ipp_shift +ffffffff82c1f320 r ipp_mask +ffffffff82c1f3c0 r xfm_regs +ffffffff82c1f960 r xfm_shift +ffffffff82c1f9c0 r xfm_mask +ffffffff82c1fb40 r opp_regs +ffffffff82c1fc90 r opp_shift +ffffffff82c1fcbc r opp_mask +ffffffff82c1fd70 r aux_engine_regs +ffffffff82c1fe60 r aux_mask +ffffffff82c1fec0 r aux_shift +ffffffff82c1fee0 r i2c_hw_regs +ffffffff82c20030 r i2c_shifts +ffffffff82c2005c r i2c_masks +ffffffff82c20100 r audio_regs +ffffffff82c20234 r audio_shift +ffffffff82c2024c r audio_mask +ffffffff82c20290 r stream_enc_regs +ffffffff82c20848 r se_shift +ffffffff82c208cc r se_mask +ffffffff82c20ad0 r dce121_hwseq_reg +ffffffff82c20cec r dce121_hwseq_shift +ffffffff82c20d6c r dce121_hwseq_mask +ffffffff82c20f60 r hwseq_reg +ffffffff82c2117c r hwseq_shift +ffffffff82c211fc r hwseq_mask +ffffffff82c22000 r dce120_tg_funcs +ffffffff82c23000 r bios_regs +ffffffff82c23008 r res_cap +ffffffff82c23048 r dce80_res_pool_funcs +ffffffff82c23140 r debug_defaults +ffffffff82c232f0 r clk_src_regs +ffffffff82c233ec r dmcu_regs +ffffffff82c23448 r dmcu_shift +ffffffff82c2345c r dmcu_mask +ffffffff82c234a8 r abm_regs +ffffffff82c23510 r abm_shift +ffffffff82c23534 r abm_mask +ffffffff82c235c0 r dce80_tg_offsets +ffffffff82c23608 r plane_cap +ffffffff82c23638 r res_create_funcs +ffffffff82c23670 r panel_cntl_regs +ffffffff82c23690 r panel_cntl_shift +ffffffff82c236a0 r panel_cntl_mask +ffffffff82c236e0 r link_enc_regs +ffffffff82c23aa0 r link_enc_aux_regs +ffffffff82c23af0 r link_enc_hpd_regs +ffffffff82c23b08 r link_enc_feature +ffffffff82c23b18 r cs_shift +ffffffff82c23b24 r cs_mask +ffffffff82c23b50 r mi_regs +ffffffff82c23e68 r mi_shifts +ffffffff82c23eb0 r mi_masks +ffffffff82c23fd0 r ipp_regs +ffffffff82c241c8 r ipp_shift +ffffffff82c241f0 r ipp_mask +ffffffff82c24290 r xfm_regs +ffffffff82c24830 r xfm_shift +ffffffff82c24890 r xfm_mask +ffffffff82c24a10 r opp_regs +ffffffff82c24b60 r opp_shift +ffffffff82c24b8c r opp_mask +ffffffff82c24c40 r aux_engine_regs +ffffffff82c24d30 r aux_mask +ffffffff82c24d90 r aux_shift +ffffffff82c24db0 r i2c_hw_regs +ffffffff82c24f00 r i2c_shifts +ffffffff82c24f2c r i2c_masks +ffffffff82c24fd0 r audio_regs +ffffffff82c25104 r audio_shift +ffffffff82c2511c r audio_mask +ffffffff82c25160 r stream_enc_regs +ffffffff82c2580c r se_shift +ffffffff82c25890 r se_mask +ffffffff82c25a94 r hwseq_reg +ffffffff82c25cb0 r hwseq_shift +ffffffff82c25d30 r hwseq_mask +ffffffff82c25f24 r res_cap_81 +ffffffff82c25f60 r res_cap_83 ffffffff82c26000 r reg_offsets -ffffffff82c27000 r reg_offsets -ffffffff82c28000 r bios_regs -ffffffff82c28008 r dce112_res_pool_funcs -ffffffff82c28100 r debug_defaults -ffffffff82c282b0 r clk_src_regs -ffffffff82c284a8 r dmcu_regs -ffffffff82c28504 r dmcu_shift -ffffffff82c28518 r dmcu_mask -ffffffff82c28564 r abm_regs -ffffffff82c285cc r abm_shift -ffffffff82c285f0 r abm_mask -ffffffff82c28680 r dce112_tg_offsets -ffffffff82c286c8 r res_create_funcs -ffffffff82c286f8 r plane_cap -ffffffff82c28724 r polaris_11_resource_cap -ffffffff82c28760 r polaris_10_resource_cap -ffffffff82c287a0 r panel_cntl_regs -ffffffff82c287c0 r panel_cntl_shift -ffffffff82c287d0 r panel_cntl_mask -ffffffff82c28810 r link_enc_regs -ffffffff82c28bd0 r link_enc_aux_regs -ffffffff82c28c20 r link_enc_hpd_regs -ffffffff82c28c38 r link_enc_feature -ffffffff82c28c48 r cs_shift -ffffffff82c28c54 r cs_mask -ffffffff82c28c80 r mi_regs -ffffffff82c28f98 r mi_shifts -ffffffff82c28fe0 r mi_masks -ffffffff82c29100 r ipp_regs -ffffffff82c292f8 r ipp_shift -ffffffff82c29320 r ipp_mask -ffffffff82c293c0 r xfm_regs -ffffffff82c29960 r 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-ffffffff82ceed48 r vpg_mask -ffffffff82ceeddc r afmt_shift -ffffffff82ceedf0 r afmt_mask -ffffffff82ceee34 r hpo_dp_se_shift -ffffffff82ceee5c r hpo_dp_se_mask -ffffffff82ceeefc r apg_shift -ffffffff82ceef04 r apg_mask -ffffffff82ceef1c r hpo_dp_le_shift -ffffffff82ceef38 r hpo_dp_le_mask -ffffffff82ceef9c r hwseq_shift -ffffffff82cef01c r hwseq_mask -ffffffff82cf0000 r dcn321_link_enc_funcs -ffffffff82cf1000 r res_cap_dcn321 -ffffffff82cf103c r dccg_shift -ffffffff82cf10dc r dccg_mask -ffffffff82cf1350 r abm_shift -ffffffff82cf1374 r abm_mask -ffffffff82cf1400 r res_create_funcs -ffffffff82cf1430 r plane_cap -ffffffff82cf145c r le_shift -ffffffff82cf154c r le_mask -ffffffff82cf1904 r link_enc_feature -ffffffff82cf1918 r debug_defaults_drv -ffffffff82cf1ac0 r cs_shift -ffffffff82cf1acc r cs_mask -ffffffff82cf1af4 r hubbub_shift -ffffffff82cf1b84 r hubbub_mask -ffffffff82cf1dbc r vmid_shifts -ffffffff82cf1dc4 r vmid_masks -ffffffff82cf1de4 r hubp_shift -ffffffff82cf1ee0 r hubp_mask -ffffffff82cf22d0 r tf_shift -ffffffff82cf25a4 r tf_mask -ffffffff82cf30e8 r opp_shift -ffffffff82cf3120 r opp_mask -ffffffff82cf31f4 r optc_shift -ffffffff82cf32c8 r optc_mask -ffffffff82cf3610 r mpc_shift -ffffffff82cf36ec r mpc_mask -ffffffff82cf3a58 r dsc_shift -ffffffff82cf3b10 r dsc_mask -ffffffff82cf3de8 r dwbc30_shift -ffffffff82cf3f1c r dwbc30_mask -ffffffff82cf43e4 r mcif_wb30_shift -ffffffff82cf4490 r mcif_wb30_mask -ffffffff82cf473c r aux_mask -ffffffff82cf479c r aux_shift -ffffffff82cf47b4 r i2c_shifts -ffffffff82cf47e0 r i2c_masks -ffffffff82cf4884 r audio_shift -ffffffff82cf489c r audio_mask -ffffffff82cf48d8 r se_shift -ffffffff82cf49b4 r se_mask -ffffffff82cf4d20 r vpg_shift -ffffffff82cf4d48 r vpg_mask -ffffffff82cf4ddc r afmt_shift -ffffffff82cf4df0 r afmt_mask -ffffffff82cf4e34 r hpo_dp_se_shift -ffffffff82cf4e5c r hpo_dp_se_mask -ffffffff82cf4efc r apg_shift -ffffffff82cf4f04 r apg_mask -ffffffff82cf4f1c r hpo_dp_le_shift -ffffffff82cf4f38 r hpo_dp_le_mask -ffffffff82cf4f9c r hwseq_shift -ffffffff82cf501c r hwseq_mask -ffffffff82cf7000 R dcn10_soc_defaults -ffffffff82cf708c R dcn10_ip_defaults -ffffffff82d03000 r dml20_funcs -ffffffff82d03030 r dml20v2_funcs -ffffffff82d03060 r dml21_funcs -ffffffff82d03090 r dml30_funcs -ffffffff82d030c0 r dml31_funcs -ffffffff82d030f0 r dml314_funcs -ffffffff82d03120 r dml32_funcs -ffffffff82d06000 r qp_table_444_8bpc_max -ffffffff82d06940 r qp_table_444_8bpc_min -ffffffff82d07280 r qp_table_444_10bpc_max -ffffffff82d07ec0 r qp_table_444_10bpc_min -ffffffff82d08b00 r qp_table_444_12bpc_max -ffffffff82d09a40 r qp_table_444_12bpc_min -ffffffff82d0a980 r qp_table_422_8bpc_max -ffffffff82d0aec0 r qp_table_422_8bpc_min -ffffffff82d0b400 r qp_table_422_10bpc_max -ffffffff82d0bb40 r qp_table_422_10bpc_min -ffffffff82d0c280 r qp_table_422_12bpc_max -ffffffff82d0cbc0 r qp_table_422_12bpc_min -ffffffff82d0d500 r qp_table_420_8bpc_max -ffffffff82d0d940 r qp_table_420_8bpc_min -ffffffff82d0dd80 r qp_table_420_10bpc_max -ffffffff82d0e340 r qp_table_420_10bpc_min -ffffffff82d0e900 r qp_table_420_12bpc_max -ffffffff82d0f040 r qp_table_420_12bpc_min +ffffffff82c26048 r dce80_tg_funcs +ffffffff82c27000 r dcn10_dpp_funcs +ffffffff82c28000 r dpp_input_csc_matrix +ffffffff82c2a000 R dcn10_dwbc_funcs +ffffffff82c2b000 r hubbub1_funcs +ffffffff82c2c000 r dcn10_hubp_funcs +ffffffff82c2d000 r reduceSizeAndFraction.prime_numbers +ffffffff82c2f000 r dcn10_funcs +ffffffff82c2f2e8 r dcn10_private_funcs +ffffffff82c30000 r dcn10_ipp_funcs +ffffffff82c30048 r dcn20_ipp_funcs +ffffffff82c31000 r dcn10_lnk_enc_funcs +ffffffff82c32000 r dcn10_mpc_funcs +ffffffff82c33000 r dcn10_opp_funcs +ffffffff82c34000 r dcn10_tg_funcs +ffffffff82c35000 r bios_regs +ffffffff82c35008 r rv2_res_cap +ffffffff82c35044 r res_cap +ffffffff82c35080 r dcn10_res_pool_funcs +ffffffff82c35178 r debug_defaults_drv +ffffffff82c35320 r debug_defaults_diags +ffffffff82c354d0 r clk_src_regs +ffffffff82c35620 r dmcu_regs +ffffffff82c3567c r dmcu_shift +ffffffff82c35690 r dmcu_mask +ffffffff82c356dc r abm_regs +ffffffff82c35744 r abm_shift +ffffffff82c35768 r abm_mask +ffffffff82c357f8 r res_create_funcs +ffffffff82c35828 r plane_cap +ffffffff82c35860 r panel_cntl_regs +ffffffff82c35880 r panel_cntl_shift +ffffffff82c35890 r panel_cntl_mask +ffffffff82c358d0 r link_enc_regs +ffffffff82c35de0 r link_enc_aux_regs +ffffffff82c35e20 r link_enc_hpd_regs +ffffffff82c35e30 r le_shift +ffffffff82c35f20 r le_mask +ffffffff82c362d8 r link_enc_feature +ffffffff82c362e8 r cs_shift +ffffffff82c362f4 r cs_mask +ffffffff82c36320 r hubp_regs +ffffffff82c369d0 r hubp_shift +ffffffff82c36a94 r hubp_mask +ffffffff82c36da0 r ipp_regs +ffffffff82c36e80 r ipp_shift +ffffffff82c36e9c r ipp_mask +ffffffff82c36f10 r tf_regs +ffffffff82c37e80 r tf_shift +ffffffff82c380e8 r tf_mask +ffffffff82c38a80 r opp_regs +ffffffff82c38b50 r opp_shift +ffffffff82c38b70 r opp_mask +ffffffff82c38bf0 r tg_regs +ffffffff82c39190 r tg_shift +ffffffff82c39264 r tg_mask +ffffffff82c395b0 r aux_engine_regs +ffffffff82c396a0 r aux_mask +ffffffff82c39700 r aux_shift +ffffffff82c39720 r i2c_hw_regs +ffffffff82c39870 r i2c_shifts +ffffffff82c3989c r i2c_masks +ffffffff82c39940 r mpc_regs +ffffffff82c39a60 r mpc_shift +ffffffff82c39a78 r mpc_mask +ffffffff82c39ad4 r hubbub_reg +ffffffff82c39c5c r hubbub_shift +ffffffff82c39cec r hubbub_mask +ffffffff82c39f30 r audio_regs +ffffffff82c39fe0 r audio_shift +ffffffff82c39ff8 r audio_mask +ffffffff82c3a040 r stream_enc_regs +ffffffff82c3a590 r se_shift +ffffffff82c3a66c r se_mask +ffffffff82c3a9d8 r hwseq_reg +ffffffff82c3abf4 r hwseq_shift +ffffffff82c3ac74 r hwseq_mask +ffffffff82c3b000 r audio_clock_info_table_48bpc +ffffffff82c3b190 r audio_clock_info_table_36bpc +ffffffff82c3b320 r audio_clock_info_table +ffffffff82c3b4e0 r dcn10_str_enc_funcs +ffffffff82c3c000 r dccg2_funcs +ffffffff82c3e000 r dpp_input_csc_matrix +ffffffff82c3f000 r dcn20_dsc_funcs +ffffffff82c40000 r dcn20_dwbc_funcs +ffffffff82c41000 r filter_12tap_16p_upscale +ffffffff82c410e0 r filter_12tap_16p_117 +ffffffff82c411c0 r filter_12tap_16p_150 +ffffffff82c412a0 r filter_12tap_16p_183 +ffffffff82c41380 r filter_11tap_16p_upscale +ffffffff82c41450 r filter_11tap_16p_117 +ffffffff82c41520 r filter_11tap_16p_150 +ffffffff82c415f0 r filter_11tap_16p_183 +ffffffff82c416c0 r filter_10tap_16p_upscale +ffffffff82c41780 r filter_10tap_16p_117 +ffffffff82c41840 r filter_10tap_16p_150 +ffffffff82c41900 r filter_10tap_16p_183 +ffffffff82c419c0 r filter_9tap_16p_upscale +ffffffff82c41a70 r filter_9tap_16p_117 +ffffffff82c41b20 r filter_9tap_16p_150 +ffffffff82c41bd0 r filter_9tap_16p_183 +ffffffff82c41c80 r filter_8tap_16p_upscale +ffffffff82c41d10 r filter_8tap_16p_117 +ffffffff82c41da0 r filter_8tap_16p_150 +ffffffff82c41e30 r filter_8tap_16p_183 +ffffffff82c41ec0 r filter_7tap_16p_upscale +ffffffff82c41f40 r filter_7tap_16p_117 +ffffffff82c41fc0 r filter_7tap_16p_150 +ffffffff82c42040 r filter_7tap_16p_183 +ffffffff82c420c0 r filter_6tap_16p_upscale +ffffffff82c42130 r filter_6tap_16p_117 +ffffffff82c421a0 r filter_6tap_16p_150 +ffffffff82c42210 r filter_6tap_16p_183 +ffffffff82c42280 r filter_5tap_16p_upscale +ffffffff82c422e0 r filter_5tap_16p_117 +ffffffff82c42340 r filter_5tap_16p_150 +ffffffff82c423a0 r filter_5tap_16p_183 +ffffffff82c42400 r filter_4tap_16p_upscale +ffffffff82c42450 r filter_4tap_16p_117 +ffffffff82c424a0 r filter_4tap_16p_150 +ffffffff82c424f0 r filter_4tap_16p_183 +ffffffff82c42540 r filter_3tap_16p_upscale +ffffffff82c42580 r filter_3tap_16p_117 +ffffffff82c425c0 r filter_3tap_16p_150 +ffffffff82c42600 r filter_3tap_16p_183 +ffffffff82c43000 r hubbub2_funcs +ffffffff82c44000 r dcn20_funcs +ffffffff82c442e8 r dcn20_private_funcs +ffffffff82c45000 r dcn20_link_enc_funcs +ffffffff82c450e0 r dcn2_mpll_cfg +ffffffff82c46000 r dcn20_mmhubbub_funcs +ffffffff82c47000 r dcn20_mpc_funcs +ffffffff82c48000 r tf_regs +ffffffff82c49938 r tf_shift +ffffffff82c49bc0 r tf_mask +ffffffff82c4a5e0 r ipp_regs +ffffffff82c4a730 r ipp_shift +ffffffff82c4a74c r ipp_mask +ffffffff82c4a7c0 r opp_regs +ffffffff82c4a9d0 r opp_shift +ffffffff82c4aa08 r opp_mask +ffffffff82c4aae0 r aux_engine_regs +ffffffff82c4abd0 r aux_mask +ffffffff82c4ac30 r aux_shift +ffffffff82c4ac50 r i2c_hw_regs +ffffffff82c4ada0 r i2c_shifts +ffffffff82c4adcc r i2c_masks +ffffffff82c4ae70 r mpc_regs +ffffffff82c4b3b8 r mpc_shift +ffffffff82c4b400 r mpc_mask +ffffffff82c4b514 r hubbub_reg +ffffffff82c4b69c r hubbub_shift +ffffffff82c4b72c r hubbub_mask +ffffffff82c4b964 r res_cap_nv10 +ffffffff82c4b9a0 r vmid_regs +ffffffff82c4bb60 r vmid_shifts +ffffffff82c4bb68 r vmid_masks +ffffffff82c4bb90 r tg_regs +ffffffff82c4c400 r tg_shift +ffffffff82c4c4d4 r tg_mask +ffffffff82c4c820 r link_enc_regs +ffffffff82c4cfc0 r link_enc_aux_regs +ffffffff82c4d020 r link_enc_hpd_regs +ffffffff82c4d038 r le_shift +ffffffff82c4d128 r le_mask +ffffffff82c4d4e0 r stream_enc_regs +ffffffff82c4dcd8 r se_shift +ffffffff82c4ddb4 r se_mask +ffffffff82c4e120 r hwseq_reg +ffffffff82c4e33c r hwseq_shift +ffffffff82c4e3bc r hwseq_mask +ffffffff82c4e5b0 r dsc_regs +ffffffff82c4ea48 r dsc_shift +ffffffff82c4eb00 r dsc_mask +ffffffff82c4ede0 r hubp_regs +ffffffff82c4fa28 r hubp_shift +ffffffff82c4fb24 r hubp_mask +ffffffff82c4ff20 r dwbc20_regs +ffffffff82c4ffd8 r dwbc20_shift +ffffffff82c50058 r dwbc20_mask +ffffffff82c50250 r mcif_wb20_regs +ffffffff82c50330 r mcif_wb20_shift +ffffffff82c503d0 r mcif_wb20_mask +ffffffff82c50650 r link_enc_feature +ffffffff82c50660 r bios_regs +ffffffff82c50668 r dcn20_res_pool_funcs +ffffffff82c50760 r res_cap_nv14 +ffffffff82c507a0 r debug_defaults_drv +ffffffff82c50950 r clk_src_regs +ffffffff82c50b48 r dccg_regs +ffffffff82c50c38 r dccg_shift +ffffffff82c50cd8 r dccg_mask +ffffffff82c50f4c r dmcu_regs +ffffffff82c50fa8 r dmcu_shift +ffffffff82c50fbc r dmcu_mask +ffffffff82c51008 r abm_regs +ffffffff82c51070 r abm_shift +ffffffff82c51094 r abm_mask +ffffffff82c51120 r res_create_funcs +ffffffff82c51150 r plane_cap +ffffffff82c51180 r panel_cntl_regs +ffffffff82c511a0 r panel_cntl_shift +ffffffff82c511b0 r panel_cntl_mask +ffffffff82c511ec r cs_shift +ffffffff82c511f8 r cs_mask +ffffffff82c51220 r audio_regs +ffffffff82c51354 r audio_shift +ffffffff82c5136c r audio_mask +ffffffff82c52000 r dcn20_str_enc_funcs +ffffffff82c53000 r dccg201_funcs +ffffffff82c54000 r hubbub201_funcs +ffffffff82c55000 r dcn201_funcs +ffffffff82c552e8 r dcn201_private_funcs +ffffffff82c56000 r dcn201_link_enc_funcs +ffffffff82c57000 r dcn201_mpc_funcs +ffffffff82c58000 r bios_regs +ffffffff82c58008 r res_cap_dnc201 +ffffffff82c58048 r debug_defaults_drv +ffffffff82c581f0 r clk_src_regs +ffffffff82c58298 r dccg_regs +ffffffff82c58388 r dccg_shift +ffffffff82c58428 r dccg_mask +ffffffff82c586a0 r res_create_funcs +ffffffff82c586d0 r plane_cap +ffffffff82c58700 r link_enc_regs +ffffffff82c58990 r link_enc_aux_regs +ffffffff82c589b0 r link_enc_hpd_regs +ffffffff82c589b8 r le_shift +ffffffff82c58aa8 r le_mask +ffffffff82c58e60 r link_enc_feature +ffffffff82c58e70 r cs_shift +ffffffff82c58e7c r cs_mask +ffffffff82c58eb0 r hubp_regs +ffffffff82c59640 r hubp_shift +ffffffff82c59718 r hubp_mask +ffffffff82c59a80 r ipp_regs +ffffffff82c59b60 r ipp_shift +ffffffff82c59b7c r ipp_mask +ffffffff82c59bf0 r tf_regs +ffffffff82c5ac40 r tf_shift +ffffffff82c5aec8 r tf_mask +ffffffff82c5b8e0 r opp_regs +ffffffff82c5b990 r opp_shift +ffffffff82c5b9c8 r opp_mask +ffffffff82c5baa0 r aux_engine_regs +ffffffff82c5baf0 r aux_mask +ffffffff82c5bb50 r aux_shift +ffffffff82c5bb70 r i2c_hw_regs +ffffffff82c5bbe0 r i2c_shifts +ffffffff82c5bc0c r i2c_masks +ffffffff82c5bcb0 r tg_regs +ffffffff82c5bf80 r tg_shift +ffffffff82c5c054 r tg_mask +ffffffff82c5c39c r mpc_regs +ffffffff82c5c8e4 r mpc_shift +ffffffff82c5c930 r mpc_mask +ffffffff82c5ca58 r hubbub_reg +ffffffff82c5cbe0 r hubbub_shift +ffffffff82c5cc70 r hubbub_mask +ffffffff82c5ceb0 r audio_regs +ffffffff82c5cf08 r audio_shift +ffffffff82c5cf20 r audio_mask +ffffffff82c5cf60 r stream_enc_regs +ffffffff82c5d208 r se_shift +ffffffff82c5d2e4 r se_mask +ffffffff82c5d650 r hwseq_reg +ffffffff82c5d86c r hwseq_shift +ffffffff82c5d8ec r hwseq_mask +ffffffff82c5e000 r dccg21_funcs +ffffffff82c5f000 r hubbub21_funcs +ffffffff82c60000 r dcn21_funcs +ffffffff82c602e8 r dcn21_private_funcs +ffffffff82c61000 r dcn21_link_enc_funcs +ffffffff82c610e0 r dcn21_mpll_cfg_ref +ffffffff82c62000 r bios_regs +ffffffff82c62008 r res_cap_rn +ffffffff82c62048 r dcn21_res_pool_funcs +ffffffff82c62140 r debug_defaults_drv +ffffffff82c622f0 r clk_src_regs +ffffffff82c62494 r dccg_regs +ffffffff82c62584 r dccg_shift +ffffffff82c62624 r dccg_mask +ffffffff82c62898 r dmcu_regs +ffffffff82c628f4 r dmcu_shift +ffffffff82c62908 r dmcu_mask +ffffffff82c62954 r abm_regs +ffffffff82c629bc r abm_shift +ffffffff82c629e0 r abm_mask +ffffffff82c62a70 r res_create_funcs +ffffffff82c62aa0 r plane_cap +ffffffff82c62ad0 r panel_cntl_regs +ffffffff82c62af0 r panel_cntl_shift +ffffffff82c62b00 r panel_cntl_mask +ffffffff82c62b40 r link_enc_regs +ffffffff82c631a0 r link_enc_aux_regs +ffffffff82c631f0 r link_enc_hpd_regs +ffffffff82c63204 r le_shift +ffffffff82c632f4 r le_mask +ffffffff82c636ac r link_enc_feature +ffffffff82c636bc r panel_config_defaults +ffffffff82c63710 r cs_shift +ffffffff82c6371c r cs_mask +ffffffff82c63750 r hubp_regs +ffffffff82c63f80 r hubp_shift +ffffffff82c6407c r hubp_mask +ffffffff82c64470 r ipp_regs +ffffffff82c64550 r ipp_shift +ffffffff82c6456c r ipp_mask +ffffffff82c645e0 r tf_regs +ffffffff82c656b0 r tf_shift +ffffffff82c65938 r tf_mask +ffffffff82c66350 r opp_regs +ffffffff82c66560 r opp_shift +ffffffff82c66598 r opp_mask +ffffffff82c66670 r tg_regs +ffffffff82c66c10 r tg_shift +ffffffff82c66ce4 r tg_mask +ffffffff82c67030 r aux_engine_regs +ffffffff82c670f8 r aux_mask +ffffffff82c67158 r aux_shift +ffffffff82c67170 r i2c_hw_regs +ffffffff82c67288 r i2c_shifts +ffffffff82c672b4 r i2c_masks +ffffffff82c67358 r mpc_regs +ffffffff82c678a0 r mpc_shift +ffffffff82c678e8 r mpc_mask +ffffffff82c679fc r hubbub_reg +ffffffff82c67b84 r hubbub_shift +ffffffff82c67c14 r hubbub_mask +ffffffff82c67e50 r vmid_regs +ffffffff82c68010 r vmid_shifts +ffffffff82c68018 r vmid_masks +ffffffff82c68040 r dsc_regs +ffffffff82c684d8 r dsc_shift +ffffffff82c68590 r dsc_mask +ffffffff82c68870 r audio_regs +ffffffff82c68978 r audio_shift +ffffffff82c68990 r audio_mask +ffffffff82c689d0 r stream_enc_regs +ffffffff82c69074 r se_shift +ffffffff82c69150 r se_mask +ffffffff82c694bc r hwseq_reg +ffffffff82c696d8 r hwseq_shift +ffffffff82c69758 r hwseq_mask +ffffffff82c6a000 r dccg3_funcs +ffffffff82c6b000 r dcn30_link_enc_funcs +ffffffff82c6c000 r dcn30_str_enc_funcs +ffffffff82c6d000 r dpp_input_csc_matrix +ffffffff82c6e000 r dcn30_dwbc_funcs +ffffffff82c6f000 r hubbub30_funcs +ffffffff82c70000 r dcn30_funcs +ffffffff82c702e8 r dcn30_private_funcs +ffffffff82c71000 r dcn30_mmhubbub_funcs +ffffffff82c72000 r dcn30_mpc_funcs +ffffffff82c73000 r bios_regs +ffffffff82c73008 r res_cap_dcn3 +ffffffff82c73048 r dcn30_res_pool_funcs +ffffffff82c73140 r debug_defaults_drv +ffffffff82c732f0 r clk_src_regs +ffffffff82c734e8 r dccg_regs +ffffffff82c735d8 r dccg_shift +ffffffff82c73678 r dccg_mask +ffffffff82c738f0 r abm_regs +ffffffff82c73b60 r abm_shift +ffffffff82c73b84 r abm_mask +ffffffff82c73c10 r res_create_funcs +ffffffff82c73c40 r plane_cap +ffffffff82c73c70 r panel_cntl_regs +ffffffff82c73c90 r panel_cntl_shift +ffffffff82c73ca0 r panel_cntl_mask +ffffffff82c73ce0 r link_enc_regs +ffffffff82c74480 r link_enc_aux_regs +ffffffff82c744e0 r link_enc_hpd_regs +ffffffff82c744f8 r le_shift +ffffffff82c745e8 r le_mask +ffffffff82c749a0 r link_enc_feature +ffffffff82c749b0 r cs_shift +ffffffff82c749bc r cs_mask +ffffffff82c749e4 r hubbub_reg +ffffffff82c74b6c r hubbub_shift +ffffffff82c74bfc r hubbub_mask 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abm_mask +ffffffff82c84960 r res_create_funcs +ffffffff82c84990 r plane_cap +ffffffff82c849c0 r panel_cntl_regs +ffffffff82c84a00 r panel_cntl_shift +ffffffff82c84a10 r panel_cntl_mask +ffffffff82c84a50 r link_enc_regs +ffffffff82c84f60 r link_enc_aux_regs +ffffffff82c84fa0 r link_enc_hpd_regs +ffffffff82c84fb0 r le_shift +ffffffff82c850a0 r le_mask +ffffffff82c85458 r link_enc_feature +ffffffff82c85468 r cs_shift +ffffffff82c85474 r cs_mask +ffffffff82c8549c r hubbub_reg +ffffffff82c85624 r hubbub_shift +ffffffff82c856b4 r hubbub_mask +ffffffff82c858f0 r vmid_regs +ffffffff82c85ab0 r vmid_shifts +ffffffff82c85ab8 r vmid_masks +ffffffff82c85ae0 r hubp_regs +ffffffff82c86310 r hubp_shift +ffffffff82c8640c r hubp_mask +ffffffff82c86800 r dpp_regs +ffffffff82c87d10 r tf_shift +ffffffff82c87fe4 r tf_mask +ffffffff82c88b30 r opp_regs +ffffffff82c88c90 r opp_shift +ffffffff82c88cc8 r opp_mask +ffffffff82c88da0 r optc_regs +ffffffff82c89340 r optc_shift +ffffffff82c89414 r optc_mask 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hubp_regs +ffffffff82c9075c r hubp_shift +ffffffff82c90858 r hubp_mask +ffffffff82c90c50 r dpp_regs +ffffffff82c926a4 r tf_shift +ffffffff82c92978 r tf_mask +ffffffff82c934c0 r opp_regs +ffffffff82c93678 r opp_shift +ffffffff82c936b0 r opp_mask +ffffffff82c93790 r optc_regs +ffffffff82c93e98 r optc_shift +ffffffff82c93f6c r optc_mask +ffffffff82c942b4 r mpc_regs +ffffffff82c95aa0 r mpc_shift +ffffffff82c95b7c r mpc_mask +ffffffff82c95ef0 r dsc_regs +ffffffff82c962c4 r dsc_shift +ffffffff82c9637c r dsc_mask +ffffffff82c96660 r dwbc30_regs +ffffffff82c9683c r dwbc30_shift +ffffffff82c96970 r dwbc30_mask +ffffffff82c96e40 r mcif_wb30_regs +ffffffff82c96f3c r mcif_wb30_shift +ffffffff82c96fe8 r mcif_wb30_mask +ffffffff82c972a0 r aux_engine_regs +ffffffff82c97368 r aux_mask +ffffffff82c973c8 r aux_shift +ffffffff82c973e0 r i2c_hw_regs +ffffffff82c974f8 r i2c_shifts +ffffffff82c97524 r i2c_masks +ffffffff82c975d0 r audio_regs +ffffffff82c97704 r audio_shift +ffffffff82c9771c r audio_mask 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mcif_wb30_shift +ffffffff82c9fc18 r mcif_wb30_mask +ffffffff82c9fed0 r aux_engine_regs +ffffffff82c9ff20 r aux_mask +ffffffff82c9ff80 r aux_shift +ffffffff82c9ffa0 r i2c_hw_regs +ffffffff82ca0010 r i2c_shifts +ffffffff82ca003c r i2c_masks +ffffffff82ca00e0 r audio_regs +ffffffff82ca0214 r audio_shift +ffffffff82ca022c r audio_mask +ffffffff82ca0270 r stream_enc_regs +ffffffff82ca0518 r se_shift +ffffffff82ca05f4 r se_mask +ffffffff82ca0960 r vpg_regs +ffffffff82ca099c r vpg_shift +ffffffff82ca09c4 r vpg_mask +ffffffff82ca0a60 r afmt_regs +ffffffff82ca0acc r afmt_shift +ffffffff82ca0ae0 r afmt_mask +ffffffff82ca0b24 r hwseq_reg +ffffffff82ca0d40 r hwseq_shift +ffffffff82ca0dc0 r hwseq_mask +ffffffff82ca1000 r dccg31_funcs +ffffffff82ca2000 r dcn31_link_enc_funcs +ffffffff82ca3000 r dcn30_str_enc_funcs +ffffffff82ca4000 r hubbub31_funcs +ffffffff82ca5000 r dcn31_funcs +ffffffff82ca52e8 r dcn31_private_funcs +ffffffff82ca6000 r dcn31_link_panel_cntl_funcs +ffffffff82ca7000 r bios_regs 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r vpg_shift +ffffffff82cb0338 r vpg_mask +ffffffff82cb03e0 r afmt_regs +ffffffff82cb04b8 r afmt_shift +ffffffff82cb04cc r afmt_mask +ffffffff82cb0520 r stream_enc_regs +ffffffff82cb1bc0 r hpo_dp_stream_enc_regs +ffffffff82cb1df0 r hpo_dp_se_shift +ffffffff82cb1e18 r hpo_dp_se_mask +ffffffff82cb1ec0 r apg_regs +ffffffff82cb1f00 r apg_shift +ffffffff82cb1f08 r apg_mask +ffffffff82cb1f20 r hpo_dp_link_enc_regs +ffffffff82cb2030 r hpo_dp_le_shift +ffffffff82cb204c r hpo_dp_le_mask +ffffffff82cb20b0 r hwseq_reg +ffffffff82cb22cc r hwseq_shift +ffffffff82cb234c r hwseq_mask +ffffffff82cb3000 r dccg314_funcs +ffffffff82cb4000 r dcn314_str_enc_funcs +ffffffff82cb5000 r dcn314_funcs +ffffffff82cb52e8 r dcn314_private_funcs +ffffffff82cb6000 r bios_regs +ffffffff82cb6008 r res_cap_dcn314 +ffffffff82cb6048 r debug_defaults_diags +ffffffff82cb61f0 r clk_src_regs +ffffffff82cb6394 r dccg_regs +ffffffff82cb6484 r dccg_shift +ffffffff82cb6524 r dccg_mask +ffffffff82cb67a0 r abm_regs +ffffffff82cb6940 r abm_shift +ffffffff82cb6964 r abm_mask +ffffffff82cb69f0 r res_create_funcs +ffffffff82cb6a20 r plane_cap +ffffffff82cb6a50 r link_enc_regs +ffffffff82cb70b0 r link_enc_aux_regs +ffffffff82cb7100 r link_enc_hpd_regs +ffffffff82cb7114 r le_shift +ffffffff82cb7204 r le_mask +ffffffff82cb75bc r link_enc_feature +ffffffff82cb75cc r panel_config_defaults +ffffffff82cb7620 r debug_defaults_drv +ffffffff82cb77c8 r cs_shift +ffffffff82cb77d4 r cs_mask +ffffffff82cb77fc r hubbub_reg +ffffffff82cb7984 r hubbub_shift +ffffffff82cb7a14 r hubbub_mask +ffffffff82cb7c50 r vmid_regs +ffffffff82cb7e10 r vmid_shifts +ffffffff82cb7e18 r vmid_masks +ffffffff82cb7e40 r hubp_regs +ffffffff82cb8670 r hubp_shift +ffffffff82cb876c r hubp_mask +ffffffff82cb8b60 r dpp_regs +ffffffff82cba070 r tf_shift +ffffffff82cba344 r tf_mask +ffffffff82cbae90 r opp_regs +ffffffff82cbaff0 r opp_shift +ffffffff82cbb028 r opp_mask +ffffffff82cbb100 r optc_regs +ffffffff82cbb6a0 r optc_shift +ffffffff82cbb774 r optc_mask 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hpo_dp_se_shift +ffffffff82cbfed8 r hpo_dp_se_mask +ffffffff82cbff80 r apg_regs +ffffffff82cbffc0 r apg_shift +ffffffff82cbffc8 r apg_mask +ffffffff82cbffe0 r hpo_dp_link_enc_regs +ffffffff82cc00f0 r hpo_dp_le_shift +ffffffff82cc010c r hpo_dp_le_mask +ffffffff82cc0170 r hwseq_reg +ffffffff82cc038c r hwseq_shift +ffffffff82cc040c r hwseq_mask +ffffffff82cc1000 r bios_regs +ffffffff82cc1008 r res_cap_dcn31 +ffffffff82cc1050 r clk_src_regs +ffffffff82cc11f4 r dccg_regs +ffffffff82cc12e4 r dccg_shift +ffffffff82cc1384 r dccg_mask +ffffffff82cc1600 r abm_regs +ffffffff82cc17a0 r abm_shift +ffffffff82cc17c4 r abm_mask +ffffffff82cc1850 r res_create_funcs +ffffffff82cc1880 r plane_cap +ffffffff82cc18b0 r link_enc_regs +ffffffff82cc1f10 r link_enc_aux_regs +ffffffff82cc1f60 r link_enc_hpd_regs +ffffffff82cc1f74 r le_shift +ffffffff82cc2064 r le_mask +ffffffff82cc241c r link_enc_feature +ffffffff82cc242c r panel_config_defaults +ffffffff82cc2480 r debug_defaults_drv +ffffffff82cc2628 r cs_shift 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+ffffffff82cd5838 r vpg_mask +ffffffff82cd58e0 r afmt_regs +ffffffff82cd59b8 r afmt_shift +ffffffff82cd59cc r afmt_mask +ffffffff82cd5a20 r hpo_dp_stream_enc_regs +ffffffff82cd5c50 r hpo_dp_se_shift +ffffffff82cd5c78 r hpo_dp_se_mask +ffffffff82cd5d20 r apg_regs +ffffffff82cd5d60 r apg_shift +ffffffff82cd5d68 r apg_mask +ffffffff82cd5d80 r hpo_dp_link_enc_regs +ffffffff82cd5e90 r hpo_dp_le_shift +ffffffff82cd5eac r hpo_dp_le_mask +ffffffff82cd5f10 r hwseq_reg +ffffffff82cd612c r hwseq_shift +ffffffff82cd61ac r hwseq_mask +ffffffff82cd7000 r dccg32_funcs +ffffffff82cd8000 r dcn32_link_enc_funcs +ffffffff82cd9000 r dcn32_str_enc_funcs +ffffffff82cda000 r hubbub32_funcs +ffffffff82cdb000 r dcn32_funcs +ffffffff82cdb2e8 r dcn32_private_funcs +ffffffff82cdc000 r dcn32_mmhubbub_funcs +ffffffff82cdd000 r dcn32_mpc_funcs +ffffffff82cde000 r res_cap_dcn32 +ffffffff82cde03c r dccg_shift +ffffffff82cde0dc r dccg_mask +ffffffff82cde350 r abm_shift +ffffffff82cde374 r abm_mask +ffffffff82cde400 r res_create_funcs +ffffffff82cde430 r plane_cap +ffffffff82cde45c r le_shift +ffffffff82cde54c r le_mask +ffffffff82cde904 r link_enc_feature +ffffffff82cde918 r debug_defaults_drv +ffffffff82cdeac0 r cs_shift +ffffffff82cdeacc r cs_mask +ffffffff82cdeaf4 r hubbub_shift +ffffffff82cdeb84 r hubbub_mask +ffffffff82cdedbc r vmid_shifts +ffffffff82cdedc4 r vmid_masks +ffffffff82cdede4 r hubp_shift +ffffffff82cdeee0 r hubp_mask +ffffffff82cdf2d0 r tf_shift +ffffffff82cdf5a4 r tf_mask +ffffffff82ce00e8 r opp_shift +ffffffff82ce0120 r opp_mask +ffffffff82ce01f4 r optc_shift +ffffffff82ce02c8 r optc_mask +ffffffff82ce0610 r mpc_shift +ffffffff82ce06ec r mpc_mask +ffffffff82ce0a58 r dsc_shift +ffffffff82ce0b10 r dsc_mask +ffffffff82ce0de8 r dwbc30_shift +ffffffff82ce0f1c r dwbc30_mask +ffffffff82ce13e4 r mcif_wb30_shift +ffffffff82ce1490 r mcif_wb30_mask +ffffffff82ce173c r aux_mask +ffffffff82ce179c r aux_shift +ffffffff82ce17b4 r i2c_shifts +ffffffff82ce17e0 r i2c_masks +ffffffff82ce1884 r audio_shift +ffffffff82ce189c r audio_mask +ffffffff82ce18d8 r se_shift +ffffffff82ce19b4 r se_mask +ffffffff82ce1d20 r vpg_shift +ffffffff82ce1d48 r vpg_mask +ffffffff82ce1ddc r afmt_shift +ffffffff82ce1df0 r afmt_mask +ffffffff82ce1e34 r hpo_dp_se_shift +ffffffff82ce1e5c r hpo_dp_se_mask +ffffffff82ce1efc r apg_shift +ffffffff82ce1f04 r apg_mask +ffffffff82ce1f1c r hpo_dp_le_shift +ffffffff82ce1f38 r hpo_dp_le_mask +ffffffff82ce1f9c r hwseq_shift +ffffffff82ce201c r hwseq_mask +ffffffff82ce3000 r dcn321_link_enc_funcs +ffffffff82ce4000 r res_cap_dcn321 +ffffffff82ce403c r dccg_shift +ffffffff82ce40dc r dccg_mask +ffffffff82ce4350 r abm_shift +ffffffff82ce4374 r abm_mask +ffffffff82ce4400 r res_create_funcs +ffffffff82ce4430 r plane_cap +ffffffff82ce445c r le_shift +ffffffff82ce454c r le_mask +ffffffff82ce4904 r link_enc_feature +ffffffff82ce4918 r debug_defaults_drv +ffffffff82ce4ac0 r cs_shift +ffffffff82ce4acc r cs_mask +ffffffff82ce4af4 r hubbub_shift +ffffffff82ce4b84 r hubbub_mask +ffffffff82ce4dbc r vmid_shifts +ffffffff82ce4dc4 r vmid_masks +ffffffff82ce4de4 r hubp_shift +ffffffff82ce4ee0 r hubp_mask +ffffffff82ce52d0 r tf_shift +ffffffff82ce55a4 r tf_mask +ffffffff82ce60e8 r opp_shift +ffffffff82ce6120 r opp_mask +ffffffff82ce61f4 r optc_shift +ffffffff82ce62c8 r optc_mask +ffffffff82ce6610 r mpc_shift +ffffffff82ce66ec r mpc_mask +ffffffff82ce6a58 r dsc_shift +ffffffff82ce6b10 r dsc_mask +ffffffff82ce6de8 r dwbc30_shift +ffffffff82ce6f1c r dwbc30_mask +ffffffff82ce73e4 r mcif_wb30_shift +ffffffff82ce7490 r mcif_wb30_mask +ffffffff82ce773c r aux_mask +ffffffff82ce779c r aux_shift +ffffffff82ce77b4 r i2c_shifts +ffffffff82ce77e0 r i2c_masks +ffffffff82ce7884 r audio_shift +ffffffff82ce789c r audio_mask +ffffffff82ce78d8 r se_shift +ffffffff82ce79b4 r se_mask +ffffffff82ce7d20 r vpg_shift +ffffffff82ce7d48 r vpg_mask +ffffffff82ce7ddc r afmt_shift +ffffffff82ce7df0 r afmt_mask +ffffffff82ce7e34 r hpo_dp_se_shift +ffffffff82ce7e5c r hpo_dp_se_mask +ffffffff82ce7efc r apg_shift +ffffffff82ce7f04 r apg_mask +ffffffff82ce7f1c r hpo_dp_le_shift +ffffffff82ce7f38 r hpo_dp_le_mask +ffffffff82ce7f9c r hwseq_shift +ffffffff82ce801c r hwseq_mask +ffffffff82cea000 R dcn10_soc_defaults +ffffffff82cea08c R dcn10_ip_defaults +ffffffff82cf6000 r dml20_funcs +ffffffff82cf6030 r dml20v2_funcs +ffffffff82cf6060 r dml21_funcs +ffffffff82cf6090 r dml30_funcs +ffffffff82cf60c0 r dml31_funcs +ffffffff82cf60f0 r dml314_funcs +ffffffff82cf6120 r dml32_funcs +ffffffff82cf9000 r qp_table_444_8bpc_max +ffffffff82cf9940 r qp_table_444_8bpc_min +ffffffff82cfa280 r qp_table_444_10bpc_max +ffffffff82cfaec0 r qp_table_444_10bpc_min +ffffffff82cfbb00 r qp_table_444_12bpc_max +ffffffff82cfca40 r qp_table_444_12bpc_min +ffffffff82cfd980 r qp_table_422_8bpc_max +ffffffff82cfdec0 r qp_table_422_8bpc_min +ffffffff82cfe400 r qp_table_422_10bpc_max +ffffffff82cfeb40 r qp_table_422_10bpc_min +ffffffff82cff280 r qp_table_422_12bpc_max +ffffffff82cffbc0 r qp_table_422_12bpc_min +ffffffff82d00500 r qp_table_420_8bpc_max +ffffffff82d00940 r qp_table_420_8bpc_min +ffffffff82d00d80 r qp_table_420_10bpc_max +ffffffff82d01340 r qp_table_420_10bpc_min +ffffffff82d01900 r qp_table_420_12bpc_max +ffffffff82d02040 r qp_table_420_12bpc_min +ffffffff82d04000 r funcs +ffffffff82d04050 r hpd_regs +ffffffff82d041a0 r hpd_shift +ffffffff82d041b0 r hpd_mask +ffffffff82d041c0 r ddc_data_regs +ffffffff82d043a0 r ddc_clk_regs +ffffffff82d04580 r ddc_shift +ffffffff82d045a8 r ddc_mask +ffffffff82d05000 r funcs +ffffffff82d06000 r funcs +ffffffff82d06050 r hpd_regs +ffffffff82d061a0 r hpd_shift +ffffffff82d061b0 r hpd_mask +ffffffff82d061c0 r ddc_data_regs +ffffffff82d063a0 r ddc_clk_regs +ffffffff82d06580 r ddc_shift +ffffffff82d065a8 r ddc_mask +ffffffff82d07000 r funcs +ffffffff82d08000 r funcs +ffffffff82d08050 r hpd_regs +ffffffff82d081a0 r hpd_shift +ffffffff82d081b0 r hpd_mask +ffffffff82d081c0 r ddc_data_regs +ffffffff82d083a0 r ddc_clk_regs +ffffffff82d08580 r ddc_shift +ffffffff82d085a8 r ddc_mask +ffffffff82d09000 r funcs +ffffffff82d0a000 r funcs +ffffffff82d0a050 r hpd_regs +ffffffff82d0a1a0 r hpd_shift +ffffffff82d0a1b0 r hpd_mask +ffffffff82d0a1c0 r ddc_data_regs +ffffffff82d0a3a0 r ddc_clk_regs +ffffffff82d0a580 r ddc_shift +ffffffff82d0a5a8 r ddc_mask +ffffffff82d0a5d0 r generic_regs +ffffffff82d0a640 r generic_shift +ffffffff82d0a650 r generic_mask +ffffffff82d0b000 r funcs +ffffffff82d0c000 r funcs +ffffffff82d0c050 r hpd_regs +ffffffff82d0c1a0 r hpd_shift +ffffffff82d0c1b0 r hpd_mask +ffffffff82d0c1c0 r ddc_data_regs_dcn +ffffffff82d0c370 r ddc_clk_regs_dcn +ffffffff82d0c520 r ddc_shift +ffffffff82d0c640 r ddc_mask +ffffffff82d0c760 r generic_regs +ffffffff82d0c7d0 r generic_shift +ffffffff82d0c7e0 r generic_mask +ffffffff82d0d000 r funcs +ffffffff82d0e000 r funcs +ffffffff82d0e050 r hpd_regs +ffffffff82d0e168 r hpd_shift +ffffffff82d0e178 r hpd_mask +ffffffff82d0e190 r ddc_data_regs_dcn +ffffffff82d0e2c0 r ddc_clk_regs_dcn +ffffffff82d0e3f0 r ddc_shift +ffffffff82d0e4e0 r ddc_mask +ffffffff82d0e5d0 r generic_regs +ffffffff82d0e604 r generic_shift +ffffffff82d0e60c r generic_mask +ffffffff82d0f000 r funcs +ffffffff82d10000 r funcs +ffffffff82d10050 r hpd_regs +ffffffff82d101a0 r hpd_shift +ffffffff82d101b0 r hpd_mask +ffffffff82d101c0 r ddc_data_regs_dcn +ffffffff82d10370 r ddc_clk_regs_dcn +ffffffff82d10520 r ddc_shift +ffffffff82d10640 r ddc_mask +ffffffff82d10760 r generic_regs +ffffffff82d107d0 r generic_shift +ffffffff82d107e0 r generic_mask ffffffff82d11000 r funcs -ffffffff82d11050 r hpd_regs -ffffffff82d111a0 r hpd_shift -ffffffff82d111b0 r hpd_mask -ffffffff82d111c0 r ddc_data_regs -ffffffff82d113a0 r ddc_clk_regs -ffffffff82d11580 r ddc_shift -ffffffff82d115a8 r ddc_mask ffffffff82d12000 r funcs +ffffffff82d12050 r hpd_regs +ffffffff82d12168 r hpd_shift +ffffffff82d12178 r hpd_mask +ffffffff82d12190 r ddc_data_regs_dcn +ffffffff82d12300 r ddc_clk_regs_dcn +ffffffff82d12470 r ddc_shift +ffffffff82d12560 r ddc_mask +ffffffff82d12650 r generic_regs +ffffffff82d126c0 r generic_shift +ffffffff82d126d0 r generic_mask ffffffff82d13000 r funcs -ffffffff82d13050 r hpd_regs -ffffffff82d131a0 r hpd_shift -ffffffff82d131b0 r hpd_mask -ffffffff82d131c0 r ddc_data_regs -ffffffff82d133a0 r ddc_clk_regs -ffffffff82d13580 r ddc_shift -ffffffff82d135a8 r ddc_mask ffffffff82d14000 r funcs +ffffffff82d14050 r hpd_regs +ffffffff82d14168 r hpd_shift +ffffffff82d14178 r hpd_mask +ffffffff82d14190 r ddc_data_regs_dcn +ffffffff82d14340 r ddc_clk_regs_dcn +ffffffff82d144f0 r ddc_shift +ffffffff82d14610 r ddc_mask +ffffffff82d14730 r generic_regs +ffffffff82d147a0 r generic_shift +ffffffff82d147b0 r generic_mask ffffffff82d15000 r funcs -ffffffff82d15050 r hpd_regs -ffffffff82d151a0 r hpd_shift -ffffffff82d151b0 r hpd_mask -ffffffff82d151c0 r ddc_data_regs -ffffffff82d153a0 r ddc_clk_regs -ffffffff82d15580 r ddc_shift -ffffffff82d155a8 r ddc_mask ffffffff82d16000 r funcs ffffffff82d17000 r funcs -ffffffff82d17050 r hpd_regs -ffffffff82d171a0 r hpd_shift -ffffffff82d171b0 r hpd_mask -ffffffff82d171c0 r ddc_data_regs -ffffffff82d173a0 r ddc_clk_regs -ffffffff82d17580 r ddc_shift -ffffffff82d175a8 r ddc_mask -ffffffff82d175d0 r generic_regs -ffffffff82d17640 r generic_shift -ffffffff82d17650 r generic_mask ffffffff82d18000 r funcs -ffffffff82d19000 r funcs -ffffffff82d19050 r hpd_regs -ffffffff82d191a0 r hpd_shift -ffffffff82d191b0 r hpd_mask -ffffffff82d191c0 r ddc_data_regs_dcn -ffffffff82d19370 r ddc_clk_regs_dcn -ffffffff82d19520 r ddc_shift -ffffffff82d19640 r ddc_mask -ffffffff82d19760 r generic_regs -ffffffff82d197d0 r generic_shift -ffffffff82d197e0 r generic_mask -ffffffff82d1a000 r funcs -ffffffff82d1b000 r funcs -ffffffff82d1b050 r hpd_regs -ffffffff82d1b168 r hpd_shift -ffffffff82d1b178 r hpd_mask -ffffffff82d1b190 r ddc_data_regs_dcn -ffffffff82d1b2c0 r ddc_clk_regs_dcn -ffffffff82d1b3f0 r ddc_shift -ffffffff82d1b4e0 r ddc_mask -ffffffff82d1b5d0 r generic_regs -ffffffff82d1b604 r generic_shift -ffffffff82d1b60c r generic_mask -ffffffff82d1c000 r funcs -ffffffff82d1d000 r funcs -ffffffff82d1d050 r hpd_regs -ffffffff82d1d1a0 r hpd_shift -ffffffff82d1d1b0 r hpd_mask -ffffffff82d1d1c0 r ddc_data_regs_dcn -ffffffff82d1d370 r ddc_clk_regs_dcn -ffffffff82d1d520 r ddc_shift -ffffffff82d1d640 r ddc_mask -ffffffff82d1d760 r generic_regs -ffffffff82d1d7d0 r generic_shift -ffffffff82d1d7e0 r generic_mask -ffffffff82d1e000 r funcs -ffffffff82d1f000 r funcs -ffffffff82d1f050 r hpd_regs -ffffffff82d1f168 r hpd_shift -ffffffff82d1f178 r hpd_mask -ffffffff82d1f190 r ddc_data_regs_dcn -ffffffff82d1f300 r ddc_clk_regs_dcn -ffffffff82d1f470 r ddc_shift -ffffffff82d1f560 r ddc_mask -ffffffff82d1f650 r generic_regs -ffffffff82d1f6c0 r generic_shift -ffffffff82d1f6d0 r generic_mask -ffffffff82d20000 r funcs -ffffffff82d21000 r funcs -ffffffff82d21050 r hpd_regs -ffffffff82d21168 r hpd_shift -ffffffff82d21178 r hpd_mask -ffffffff82d21190 r ddc_data_regs_dcn -ffffffff82d21340 r ddc_clk_regs_dcn -ffffffff82d214f0 r ddc_shift -ffffffff82d21610 r ddc_mask -ffffffff82d21730 r generic_regs -ffffffff82d217a0 r generic_shift -ffffffff82d217b0 r generic_mask -ffffffff82d22000 r funcs -ffffffff82d23000 r funcs -ffffffff82d24000 r funcs -ffffffff82d25000 r funcs -ffffffff82d26000 r hdmi_14_protection -ffffffff82d26010 r dp_11_protection -ffffffff82d26020 r hdcp_i2c_offsets -ffffffff82d26050 r hdcp_dpcd_addrs -ffffffff82d27000 r irq_service_funcs_dce110 -ffffffff82d27008 r dummy_irq_info_funcs -ffffffff82d27018 r hpd_irq_info_funcs -ffffffff82d27028 r hpd_rx_irq_info_funcs -ffffffff82d27038 r pflip_irq_info_funcs -ffffffff82d27048 r vupdate_irq_info_funcs -ffffffff82d27058 r vblank_irq_info_funcs -ffffffff82d27070 r irq_source_info_dce110 -ffffffff82d29000 r irq_service_funcs_dce120 -ffffffff82d29008 r dummy_irq_info_funcs -ffffffff82d29018 r hpd_irq_info_funcs -ffffffff82d29028 r hpd_rx_irq_info_funcs -ffffffff82d29038 r pflip_irq_info_funcs -ffffffff82d29048 r vupdate_irq_info_funcs -ffffffff82d29058 r vblank_irq_info_funcs -ffffffff82d29070 r irq_source_info_dce120 -ffffffff82d2b000 r irq_service_funcs_dce80 -ffffffff82d2b008 r dummy_irq_info_funcs -ffffffff82d2b018 r hpd_irq_info_funcs -ffffffff82d2b028 r hpd_rx_irq_info_funcs -ffffffff82d2b038 r pflip_irq_info_funcs -ffffffff82d2b048 r vupdate_irq_info_funcs -ffffffff82d2b058 r vblank_irq_info_funcs -ffffffff82d2b070 r irq_source_info_dce80 -ffffffff82d2d000 r irq_service_funcs_dcn10 -ffffffff82d2d008 r dummy_irq_info_funcs -ffffffff82d2d018 r hpd_irq_info_funcs -ffffffff82d2d028 r hpd_rx_irq_info_funcs -ffffffff82d2d038 r pflip_irq_info_funcs -ffffffff82d2d048 r vupdate_no_lock_irq_info_funcs -ffffffff82d2d058 r vblank_irq_info_funcs -ffffffff82d2d068 r vline0_irq_info_funcs -ffffffff82d2d080 r irq_source_info_dcn10 -ffffffff82d2f000 r irq_service_funcs_dcn20 -ffffffff82d2f008 r dummy_irq_info_funcs -ffffffff82d2f018 r hpd_irq_info_funcs -ffffffff82d2f028 r hpd_rx_irq_info_funcs -ffffffff82d2f038 r pflip_irq_info_funcs -ffffffff82d2f048 r vupdate_no_lock_irq_info_funcs -ffffffff82d2f058 r vblank_irq_info_funcs -ffffffff82d2f068 r vline0_irq_info_funcs -ffffffff82d2f080 r irq_source_info_dcn20 -ffffffff82d31000 r irq_service_funcs_dcn201 -ffffffff82d31008 r dummy_irq_info_funcs -ffffffff82d31018 r hpd_irq_info_funcs -ffffffff82d31028 r hpd_rx_irq_info_funcs -ffffffff82d31038 r pflip_irq_info_funcs -ffffffff82d31048 r vupdate_no_lock_irq_info_funcs -ffffffff82d31058 r vblank_irq_info_funcs -ffffffff82d31068 r vline0_irq_info_funcs -ffffffff82d31080 r irq_source_info_dcn201 -ffffffff82d33000 r irq_source_info_dcn21 -ffffffff82d34290 r irq_service_funcs_dcn21 -ffffffff82d34298 r dummy_irq_info_funcs -ffffffff82d342a8 r hpd_irq_info_funcs -ffffffff82d342b8 r hpd_rx_irq_info_funcs -ffffffff82d342c8 r pflip_irq_info_funcs -ffffffff82d342d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d342e8 r vblank_irq_info_funcs -ffffffff82d342f8 r vline0_irq_info_funcs -ffffffff82d34308 r dmub_outbox_irq_info_funcs -ffffffff82d35000 r irq_source_info_dcn30 -ffffffff82d36290 r irq_service_funcs_dcn30 -ffffffff82d36298 r dummy_irq_info_funcs -ffffffff82d362a8 r hpd_irq_info_funcs -ffffffff82d362b8 r hpd_rx_irq_info_funcs -ffffffff82d362c8 r pflip_irq_info_funcs -ffffffff82d362d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d362e8 r vblank_irq_info_funcs -ffffffff82d362f8 r vline0_irq_info_funcs -ffffffff82d36308 r dmub_trace_irq_info_funcs -ffffffff82d37000 r irq_source_info_dcn302 -ffffffff82d38290 r irq_service_funcs_dcn302 -ffffffff82d38298 r dummy_irq_info_funcs -ffffffff82d382a8 r hpd_irq_info_funcs -ffffffff82d382b8 r hpd_rx_irq_info_funcs -ffffffff82d382c8 r pflip_irq_info_funcs -ffffffff82d382d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d382e8 r vblank_irq_info_funcs -ffffffff82d382f8 r vline0_irq_info_funcs -ffffffff82d38308 r dmub_trace_irq_info_funcs -ffffffff82d39000 r irq_service_funcs_dcn303 -ffffffff82d39008 r dummy_irq_info_funcs -ffffffff82d39018 r hpd_irq_info_funcs -ffffffff82d39028 r hpd_rx_irq_info_funcs -ffffffff82d39038 r pflip_irq_info_funcs -ffffffff82d39048 r vupdate_no_lock_irq_info_funcs -ffffffff82d39058 r vblank_irq_info_funcs -ffffffff82d39068 r vline0_irq_info_funcs -ffffffff82d39080 r irq_source_info_dcn303 -ffffffff82d3b000 r irq_source_info_dcn31 -ffffffff82d3c290 r irq_service_funcs_dcn31 -ffffffff82d3c298 r dummy_irq_info_funcs -ffffffff82d3c2a8 r hpd_irq_info_funcs -ffffffff82d3c2b8 r hpd_rx_irq_info_funcs -ffffffff82d3c2c8 r pflip_irq_info_funcs -ffffffff82d3c2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d3c2e8 r vblank_irq_info_funcs -ffffffff82d3c2f8 r vline0_irq_info_funcs -ffffffff82d3c308 r outbox_irq_info_funcs -ffffffff82d3d000 r irq_source_info_dcn314 -ffffffff82d3e290 r irq_service_funcs_dcn314 -ffffffff82d3e298 r dummy_irq_info_funcs -ffffffff82d3e2a8 r hpd_irq_info_funcs -ffffffff82d3e2b8 r hpd_rx_irq_info_funcs -ffffffff82d3e2c8 r pflip_irq_info_funcs -ffffffff82d3e2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d3e2e8 r vblank_irq_info_funcs -ffffffff82d3e2f8 r vline0_irq_info_funcs -ffffffff82d3e308 r outbox_irq_info_funcs -ffffffff82d3f000 r irq_source_info_dcn315 -ffffffff82d40290 r irq_service_funcs_dcn315 -ffffffff82d40298 r dummy_irq_info_funcs -ffffffff82d402a8 r hpd_irq_info_funcs -ffffffff82d402b8 r hpd_rx_irq_info_funcs -ffffffff82d402c8 r pflip_irq_info_funcs -ffffffff82d402d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d402e8 r vblank_irq_info_funcs -ffffffff82d402f8 r vline0_irq_info_funcs -ffffffff82d40308 r outbox_irq_info_funcs -ffffffff82d41000 r irq_source_info_dcn32 -ffffffff82d42290 r irq_service_funcs_dcn32 -ffffffff82d42298 r dummy_irq_info_funcs -ffffffff82d422a8 r hpd_irq_info_funcs -ffffffff82d422b8 r hpd_rx_irq_info_funcs -ffffffff82d422c8 r pflip_irq_info_funcs -ffffffff82d422d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d422e8 r vblank_irq_info_funcs -ffffffff82d422f8 r vline0_irq_info_funcs -ffffffff82d42308 r outbox_irq_info_funcs -ffffffff82d44000 r dio_link_hwss -ffffffff82d45000 r dio_fixed_vs_pe_retimer_link_hwss -ffffffff82d46000 r dpia_link_hwss -ffffffff82d47000 r hpo_dp_link_hwss -ffffffff82d48000 r hpo_fixed_vs_pe_retimer_dp_link_hwss -ffffffff82d49000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82d4a000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82d4a006 r DP_DVI_CONVERTER_ID_4 -ffffffff82d4a00d r DP_DVI_CONVERTER_ID_5 -ffffffff82d4b000 r dp_lt_fallbacks -ffffffff82d4f000 r mandatory_dpcd_partitions -ffffffff82d50000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82d50007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82d51000 r virtual_lnk_enc_funcs -ffffffff82d52000 r virtual_link_hwss -ffffffff82d53000 r virtual_str_enc_funcs -ffffffff82d54000 R dmub_srv_dcn20_regs -ffffffff82d55000 R dmub_srv_dcn21_regs -ffffffff82d56000 R dmub_srv_dcn30_regs -ffffffff82d57000 R dmub_srv_dcn301_regs -ffffffff82d58000 R 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ah_enable -ffffffff83273000 D udpencap_enable -ffffffff83273004 D udpencap_port -ffffffff83274000 D carp_vh_rc -ffffffff83274020 D carp_sc_rc -ffffffff83274040 D carp_opts -ffffffff83274058 D carp_cloner -ffffffff83274088 d carp_send_na.mcast -ffffffff83275000 d PADDING -ffffffff83276000 d PADDING -ffffffff83277000 d weak_keys -ffffffff83278000 D swcr_id -ffffffff83279000 D window_inflate -ffffffff83279004 D window_deflate -ffffffff8327a000 D ghash_update -ffffffff8327b000 D mpls_defttl -ffffffff8327b004 D mpls_mapttl_ip -ffffffff8327c000 D nfskevq_lock -ffffffff8327d000 D nfs_backoff -ffffffff8327d020 D nfs_ptimers -ffffffff8327e000 D desirednfsrvcache -ffffffff8327e010 D nonidempotent -ffffffff8327e070 D nfsv2_repstat -ffffffff8327f000 D nfsv2_type -ffffffff8327f030 D nfsv3_type -ffffffff8327f060 D nv2tov_type -ffffffff8327f080 D nv3tov_type -ffffffff8327f0a0 D nfsv3_procid -ffffffff8327f100 D nfsv2_procid -ffffffff8327f15c d nfsv3err_getattr -ffffffff8327f170 d nfsv3err_setattr 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sadb_exts_allowed_in -ffffffff8329b090 D sadb_exts_required_in -ffffffff8329c000 D cold -ffffffff8329d000 D bdevsw -ffffffff8329d460 D nblkdev -ffffffff8329d470 D cdevsw -ffffffff8329f400 D nchrdev -ffffffff8329f404 D mem_no -ffffffff8329f408 D swapdev -ffffffff8329f410 D constab -ffffffff832a0000 D machine -ffffffff832a0008 D cpu_idle_cycle_fcn -ffffffff832a0010 D lid_action -ffffffff832a0014 D pwr_action -ffffffff832a0018 D isa_constraint -ffffffff832a0028 D dma_constraint -ffffffff832a0040 D uvm_md_constraints -ffffffff832a0058 D delay_func -ffffffff832a0060 D initclock_func -ffffffff832a0068 D startclock_func -ffffffff832a0070 D bootinfo_size -ffffffff832a0074 D waittime -ffffffff832a0078 D dumpmag -ffffffff832a1000 D tsc_rdtsc -ffffffff832a1008 D tsc_timecounter -ffffffff832a1058 D tsc_is_synchronized -ffffffff832a2000 D local_apic -ffffffff832a2020 D lapic_id -ffffffff832a2080 D lapic_tpr -ffffffff832a20a0 d lapic_ppr -ffffffff832a2100 d lapic_isr -ffffffff832a3000 D warn_once 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nsgphy_cd -ffffffff832e1000 D urlphy_cd -ffffffff832e2000 D rgephy_cd -ffffffff832e3000 D ciphy_cd -ffffffff832e4000 D ipgphy_cd -ffffffff832e5000 D etphy_cd -ffffffff832e6000 D jmphy_cd -ffffffff832e7000 D atphy_cd -ffffffff832e8000 D scsi_autoconf -ffffffff832e8008 D scsibus_cd -ffffffff832e9000 D cd_cd -ffffffff832ea000 D ch_cd -ffffffff832ea020 D chquirks -ffffffff832eb000 D sd_cd -ffffffff832ec000 D st_cd -ffffffff832ed000 D uk_cd -ffffffff832ee000 D safte_cd -ffffffff832ef000 D ses_cd -ffffffff832f0000 D sym_cd -ffffffff832f0020 D sym_devices -ffffffff832f0070 D asym_devices -ffffffff832f1000 D rdac_cd -ffffffff832f1020 D rdac_devices -ffffffff832f2000 D emc_cd -ffffffff832f2020 D emc_devices -ffffffff832f3000 D hds_cd -ffffffff832f3020 D hds_devices -ffffffff832f4000 D atapiscsi_cd -ffffffff832f5000 D wd_cd -ffffffff832f5020 d wddumpmulti -ffffffff832f6000 D mainbus_cd -ffffffff832f6020 D mba_iba -ffffffff832f7000 D bios_cd -ffffffff832f7020 D smbios_uninfo -ffffffff832f8000 D mpbios_cd -ffffffff832f8020 d mp_conf -ffffffff832f8070 d extint_bus -ffffffff832f80a0 d smi_bus -ffffffff832f80d0 d nmi_bus -ffffffff832f9000 D cpu_info_full_primary -ffffffff832fc000 D cpu_info_list -ffffffff832fc008 D mp_cpu_funcs -ffffffff832fc020 D cpu_cd -ffffffff832fc040 D cpu_info -ffffffff832fd000 D local_pic -ffffffff832fd098 D lapic_readreg -ffffffff832fd0a0 D lapic_writereg -ffffffff832fd0a8 D x86_ipi -ffffffff832fe000 D ioapic_cold -ffffffff832fe008 D ioapic_cd -ffffffff832ff000 D efifb_std_descr -ffffffff832ff030 D efifb_descrs -ffffffff832ff038 D efifb_accessops -ffffffff832ff098 D efifb_cd -ffffffff83300000 D pvbus_cd -ffffffff83300020 D pvbus_types -ffffffff833000e0 D pvbus_dma_tag -ffffffff83301000 D pvclock_cd -ffffffff83301020 D pvclock_timecounter -ffffffff83302000 D vmt_tclo_rpc -ffffffff833020d0 D vmt_cd -ffffffff83303000 D xen_cd -ffffffff83303020 D xen_bus_dma_tag -ffffffff83304000 D xnf_cd -ffffffff83305000 D xbf_cd -ffffffff83306000 D hv_msg_dispatch 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virtio_pci_ops -ffffffff83363000 D bwfm_pci_buscore_ops -ffffffff83363030 D bwfm_pci_bus_ops -ffffffff83363058 D bwfm_pci_msgbuf_ops -ffffffff83364000 D bnxt_cd -ffffffff83365000 D mcx_cd -ffffffff83366000 D iavf_cd -ffffffff83367000 D rge_cd -ffffffff83368000 D igc_cd -ffffffff83369000 D ngbe_cd -ffffffff8336a000 D agp_cd -ffffffff8336b000 D intagp_cd -ffffffff8336b020 D agp_i810_methods -ffffffff8336c000 D reservation_ww_class -ffffffff8336d000 d bridge_lock -ffffffff8336d010 d bridge_list -ffffffff8336e000 d drm_connector_enum_list -ffffffff8336e1f8 d connector_list_lock -ffffffff8336e208 d connector_list -ffffffff8336f000 d kernel_fb_helper_list -ffffffff8336f010 d kernel_fb_helper_lock -ffffffff83370000 D drm_global_mutex -ffffffff83371000 D i2c_bit_algo -ffffffff83371010 d drm_fence_context_count -ffffffff83371018 d dma_fence_stub_mtx -ffffffff83371028 D wait_bit_mtx -ffffffff83371038 D shrinkers -ffffffff83372000 d crtc_ww_class -ffffffff83373000 d panel_lock -ffffffff83373010 d panel_list -ffffffff83374000 d ttm_global_mutex -ffffffff83375000 D drm_sched_policy -ffffffff83376000 D intel_bbops -ffffffff83377000 d i915_sys_placement -ffffffff83377020 d i915_ttm_bo_driver -ffffffff83378000 d mchdev_lock -ffffffff83379000 D inteldrm_stdscreen -ffffffff83379030 D inteldrm_scrlist -ffffffff83379038 D inteldrm_screenlist -ffffffff83379048 D inteldrm_accessops -ffffffff833790a8 D inteldrm_cd -ffffffff8337a000 d capture_mutex -ffffffff8337b000 d mitigations -ffffffff8337c000 D i915_modparams -ffffffff8337d000 d schedule_lock -ffffffff8337e000 d unbind_fence_ops -ffffffff8337f000 D intel_graphics_stolen_res -ffffffff83380000 D btc_valid_sclk -ffffffff83381000 d evergreen_cs_packet_parse_vline.vline_start_end -ffffffff83381020 d evergreen_cs_packet_parse_vline.vline_status -ffffffff83382000 d r600_cs_packet_parse_vline.vline_start_end -ffffffff83382008 d r600_cs_packet_parse_vline.vline_status -ffffffff83383000 d r100_asic -ffffffff833832e0 d r200_asic -ffffffff833835c0 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pptable_v1_0_funcs +ffffffff82d6e000 R pptable_funcs +ffffffff82d6e020 r soft_dummy_pp_table +ffffffff82d6f000 r smu10_hwmgr_funcs +ffffffff82d70000 r smu7_hwmgr_funcs +ffffffff82d702f8 r smu7_irq_funcs +ffffffff82d70310 r SMU7ThermalPolicy +ffffffff82d71000 r GCCACConfig_Polaris10 +ffffffff82d711b0 r DIDTConfig_Polaris10 +ffffffff82d71a50 r GCCACConfig_Polaris11 +ffffffff82d71c00 r DIDTConfig_Polaris11_Kicker +ffffffff82d724a0 r DIDTConfig_Polaris11 +ffffffff82d72d40 r DIDTConfig_Polaris12 +ffffffff82d735e0 r GCCACConfig_VegaM +ffffffff82d73790 r DIDTConfig_VegaM +ffffffff82d75000 r smu8_hwmgr_funcs +ffffffff82d752f0 r SMU7ThermalPolicy +ffffffff82d76000 r smu9_irq_funcs +ffffffff82d77000 r gpio_tbl_iceland +ffffffff82d77060 r gpio_tbl +ffffffff82d77150 r enable_fb_req_rej_tbl +ffffffff82d771a0 r use_bclk_tbl +ffffffff82d77370 r turn_off_plls_tbl +ffffffff82d77610 r enter_baco_tbl +ffffffff82d77730 r exit_baco_tbl_iceland +ffffffff82d77870 r clean_baco_tbl_iceland +ffffffff82d77890 r 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PSMSEEDCStallDelayConfig_Vega10 +ffffffff82d7b1d0 r PSMSEEDCCtrlResetConfig_Vega10 +ffffffff82d7b290 r PSMSEEDCCtrlConfig_Vega10 +ffffffff82d7b350 r SEEDCForceStallPatternConfig_Vega10 +ffffffff82d7b3e0 r SEEDCCtrlForceStallConfig_Vega10 +ffffffff82d7c000 R vega10_pptable_funcs +ffffffff82d7d000 r pre_baco_tbl +ffffffff82d7d090 r enter_baco_tbl +ffffffff82d7d2b0 r exit_baco_tbl +ffffffff82d7d520 r clean_baco_tbl +ffffffff82d7e000 r vega12_hwmgr_funcs +ffffffff82d7e2f0 r SMU7ThermalWithDelayPolicy +ffffffff82d7e340 r link_width +ffffffff82d7f000 R vega12_pptable_funcs +ffffffff82d80000 r clean_baco_tbl +ffffffff82d81000 r vega20_hwmgr_funcs +ffffffff82d812f0 r SMU7ThermalWithDelayPolicy +ffffffff82d81340 r link_width +ffffffff82d82000 R vega20_pptable_funcs +ffffffff82d83000 R ci_smu_funcs +ffffffff82d830e0 r defaults_hawaii_pro +ffffffff82d8312c r defaults_hawaii_xt +ffffffff82d83178 r defaults_saturn_xt +ffffffff82d831c4 r defaults_bonaire_xt +ffffffff82d83210 r ci_program_jump_on_start.data +ffffffff82d84000 R fiji_smu_funcs +ffffffff82d840e0 r avfs_graphics_level +ffffffff82d84240 r fiji_power_tune_data_set_array +ffffffff82d84246 r fiji_clock_stretch_amount_conversion +ffffffff82d84260 r fiji_clock_stretcher_ddt_table +ffffffff82d85000 R iceland_smu_funcs +ffffffff82d850e0 r defaults_icelandxt +ffffffff82d8512c r defaults_icelandpro +ffffffff82d85178 r defaults_iceland +ffffffff82d86000 R polaris10_smu_funcs +ffffffff82d860e0 r avfs_graphics_level_polaris10 +ffffffff82d862a0 r avfs_memory_level_polaris10 +ffffffff82d862c0 r polaris10_power_tune_data_set_array +ffffffff82d86310 r Range_Table +ffffffff82d87000 R smu10_smu_funcs +ffffffff82d88000 r smu7_program_jump_on_start.data +ffffffff82d88010 r pwr_virus_table_pre +ffffffff82d88680 r pwr_virus_table_post +ffffffff82d88f80 r pwr_virus_section1 +ffffffff82d89610 r pwr_virus_section2 +ffffffff82d89660 r pwr_virus_section3 +ffffffff82d90ab0 r pwr_virus_section4 +ffffffff82d90e80 r pwr_virus_section5 +ffffffff82d91490 r pwr_virus_section6 +ffffffff82d93000 R smu8_smu_funcs +ffffffff82d94000 R tonga_smu_funcs +ffffffff82d940e0 r tonga_power_tune_data_set_array +ffffffff82d9412c r tonga_clock_stretch_amount_conversion +ffffffff82d94140 r tonga_clock_stretcher_ddt_table +ffffffff82d95000 R vega10_smu_funcs +ffffffff82d96000 R vega12_smu_funcs +ffffffff82d97000 R vega20_smu_funcs +ffffffff82d98000 R vegam_smu_funcs +ffffffff82d980e0 r vegam_power_tune_data_set_array +ffffffff82d98130 r Range_Table +ffffffff82d99000 R smu_ip_funcs +ffffffff82d990a0 R smu_v11_0_ip_block +ffffffff82d990b8 R smu_v12_0_ip_block +ffffffff82d990d0 R smu_v13_0_ip_block +ffffffff82d990e8 r swsmu_pm_funcs +ffffffff82d9a000 r arcturus_ppt_funcs +ffffffff82d9a3f0 r arcturus_table_map +ffffffff82d9a470 r arcturus_pwr_src_map +ffffffff82d9a480 r arcturus_workload_map +ffffffff82d9a4d0 r smu11_thermal_policy +ffffffff82d9a528 r arcturus_i2c_algo +ffffffff82d9a538 r arcturus_i2c_control_quirks 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aldebaran_clk_map +ffffffff82da44b0 r aldebaran_table_map +ffffffff82da4530 r smu13_thermal_policy +ffffffff82da4588 r aldebaran_i2c_algo +ffffffff82da4598 r aldebaran_i2c_control_quirks +ffffffff82da45b0 r aldebaran_throttler_map +ffffffff82da45d0 r aldebaran_message_map +ffffffff82da5050 r aldebaran_feature_mask_map +ffffffff82da6000 R pmfw_decoded_link_speed +ffffffff82da6020 R pmfw_decoded_link_width +ffffffff82da6040 r smu_v13_0_irq_funcs +ffffffff82da7000 r smu_v13_0_0_ppt_funcs +ffffffff82da73f0 r smu13_thermal_policy +ffffffff82da7448 r smu_v13_0_0_i2c_algo +ffffffff82da7458 r smu_v13_0_0_i2c_control_quirks +ffffffff82da7470 r smu_v13_0_0_throttler_map +ffffffff82da8000 r smu_v13_0_4_ppt_funcs +ffffffff82da9000 r smu_v13_0_5_ppt_funcs +ffffffff82daa000 r smu_v13_0_6_ppt_funcs +ffffffff82daa3f0 r smu_v13_0_6_message_map +ffffffff82daae70 r smu_v13_0_6_clk_map +ffffffff82daaf30 r smu_v13_0_6_table_map +ffffffff82daafb0 r smu_v13_0_6_i2c_algo +ffffffff82daafc0 r smu_v13_0_6_i2c_control_quirks +ffffffff82daafd0 r smu_v13_0_6_irq_funcs +ffffffff82daafe0 r smu_v13_0_6_throttler_map +ffffffff82daaff0 r smu_v13_0_6_feature_mask_map +ffffffff82dac000 r smu_v13_0_7_ppt_funcs +ffffffff82dac3f0 r smu13_thermal_policy +ffffffff82dac450 r smu_v13_0_7_throttler_map +ffffffff82dad000 r yellow_carp_ppt_funcs +ffffffff82dae000 R link_speed +ffffffff82dae020 r __smu_message_names +ffffffff82daf000 R pchb_ca +ffffffff82db0000 R amas_ca +ffffffff82db0028 R amas_devices +ffffffff82db0040 r amas_feature +ffffffff82db1000 R cardslot_ca +ffffffff82db2000 R cardbus_ca +ffffffff82db3000 R com_cardbus_ca +ffffffff82db4000 R xl_cardbus_ca +ffffffff82db4030 R xl_cardbus_products +ffffffff82db5000 R dc_cardbus_ca +ffffffff82db5030 R dc_cardbus_devices +ffffffff82db6000 R fxp_cardbus_ca +ffffffff82db6028 R fxp_cardbus_devices +ffffffff82db7000 R rl_cardbus_devices +ffffffff82db7028 R rl_cardbus_ca +ffffffff82db8000 R re_cardbus_ca +ffffffff82db8028 R re_cardbus_devices +ffffffff82db9000 R ath_cardbus_ca +ffffffff82dba000 R athn_cardbus_ca +ffffffff82dba030 r athn_cardbus_devices +ffffffff82dbb000 R atw_cardbus_ca +ffffffff82dbb028 R atw_cardbus_devices +ffffffff82dbc000 R rtw_cardbus_ca +ffffffff82dbc028 R rtw_cardbus_devices +ffffffff82dbd000 R ral_cardbus_ca +ffffffff82dbd030 r ral_cardbus_devices +ffffffff82dbe000 R acx_cardbus_ca +ffffffff82dbe028 r acx_cardbus_devices +ffffffff82dbf000 R pgt_cardbus_ca +ffffffff82dbf028 R pgt_cardbus_devices +ffffffff82dc0000 R ehci_cardbus_ca +ffffffff82dc1000 R ohci_cardbus_ca +ffffffff82dc2000 R uhci_cardbus_ca +ffffffff82dc3000 R malo_cardbus_ca +ffffffff82dc3028 r malo_cardbus_devices +ffffffff82dc4000 R bwi_cardbus_ca +ffffffff82dc4030 r bwi_cardbus_devices +ffffffff82dc5000 R pcmcia_ca +ffffffff82dc6000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82dc7000 r pcmcia_cis_quirks +ffffffff82dc8000 R ep_pcmcia_ca +ffffffff82dc9000 R ne_pcmcia_ca +ffffffff82dc9030 R ne2000devs +ffffffff82dcb000 R aic_pcmcia_ca +ffffffff82dcc000 R com_pcmcia_ca +ffffffff82dcd000 R wdc_pcmcia_ca +ffffffff82dce000 R sm_pcmcia_ca +ffffffff82dcf000 R xe_pcmcia_ca +ffffffff82dd0000 R wi_pcmcia_ca +ffffffff82dd0030 r wi_pcmcia_products +ffffffff82dd1000 R malo_pcmcia_ca +ffffffff82dd2000 R an_pcmcia_ca +ffffffff82dd3000 R pcib_ca +ffffffff82dd4000 R amdpcib_ca +ffffffff82dd4028 R amdpcib_devices +ffffffff82dd5000 R tcpcib_ca +ffffffff82dd5028 R tcpcib_devices +ffffffff82dd6000 R aapic_ca +ffffffff82dd7000 R hme_pci_ca +ffffffff82dd7028 r hme_promhdr +ffffffff82dd702a r hme_promdat +ffffffff82dd8000 R isa_ca +ffffffff82dd9000 R isadma_ca +ffffffff82dda000 R fdc_ca +ffffffff82ddb000 R fd_ca +ffffffff82ddc000 R com_isa_ca +ffffffff82ddd000 R pckbc_isa_ca +ffffffff82dde000 R vga_isa_ca +ffffffff82ddf000 R wdc_isa_ca +ffffffff82de0000 R mpu_midi_hw_if +ffffffff82de1000 R mpu_isa_ca +ffffffff82de2000 R pcppi_ca +ffffffff82de3000 R spkr_ca +ffffffff82de3030 r pitchtab +ffffffff82de4000 R lpt_isa_ca +ffffffff82de5000 R wbsio_ca +ffffffff82de6000 R schsio_ca +ffffffff82de7000 R lm_isa_ca +ffffffff82de7028 R lm_wbsio_ca +ffffffff82de8000 R it_sensors +ffffffff82de8110 R it_vrfact +ffffffff82de8140 R it_fan_regs +ffffffff82de8160 R it_fan_ext_regs +ffffffff82de8178 R it_ca +ffffffff82de9000 R abitkv_sensors +ffffffff82de9200 R abitaa_sensors +ffffffff82de9480 R abitav_sensors +ffffffff82de9700 R abitas_sensors +ffffffff82de9980 R abitax_sensors +ffffffff82de9bc0 R abitm4_sensors +ffffffff82de9e80 R abitan_sensors +ffffffff82dea120 R abital_sensors +ffffffff82dea3a0 R abitaw_sensors +ffffffff82dea700 R abitni_sensors +ffffffff82dea9a0 R abitat_sensors +ffffffff82deacc0 R abitan2_sensors +ffffffff82deaf60 R abitab_sensors +ffffffff82deb220 R abitan3_sensors +ffffffff82deb500 R abitaw2_sensors +ffffffff82deb860 R abitat2_sensors +ffffffff82debb60 R abitab2_sensors +ffffffff82debea0 R abitin_sensors +ffffffff82dec1e0 R uguru_ca +ffffffff82ded000 R aps_ca +ffffffff82dee000 R wsdisplay_emul_ca +ffffffff82dee030 r charClass +ffffffff82def000 r usl_syncops +ffffffff82df0000 R wsevent_filtops +ffffffff82df1000 R wskbd_ca +ffffffff82df2000 r latin1_to_upper +ffffffff82df3000 R wsmouse_ca +ffffffff82df4000 R cyrillic_to_koi8 +ffffffff82df4060 R unicode_to_latin2 +ffffffff82df40e0 R unicode_to_latin7 +ffffffff82df5000 R wsemul_vt100_ops +ffffffff82df6000 r decspcgr2uni +ffffffff82df6100 r dectech2uni +ffffffff82df6200 r nrctable +ffffffff82df7000 r vt100_fkeys +ffffffff82df70c0 r vt100_pfkeys +ffffffff82df70e0 r vt100_numpad +ffffffff82df8000 R pckbd_ca +ffffffff82df8028 R pckbd_accessops +ffffffff82df8040 R pckbd_consops +ffffffff82df8060 R pckbd_keymapdata +ffffffff82df8070 R pckbd_xtbl2 +ffffffff82df8100 R pckbd_xtbl2_ext +ffffffff82df9000 r pckbd_keydesc_us +ffffffff82df9250 r pckbd_keydesc_de +ffffffff82df92f0 r pckbd_keydesc_de_nodead +ffffffff82df9310 r pckbd_keydesc_fr +ffffffff82df93d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82df9510 r pckbd_keydesc_dk +ffffffff82df95a0 r pckbd_keydesc_dk_nodead +ffffffff82df95b0 r pckbd_keydesc_it +ffffffff82df9640 r pckbd_keydesc_uk +ffffffff82df96e0 r pckbd_keydesc_jp +ffffffff82df9750 r pckbd_keydesc_sv +ffffffff82df9780 r pckbd_keydesc_sv_nodead +ffffffff82df9790 r pckbd_keydesc_no +ffffffff82df97c0 r pckbd_keydesc_no_nodead +ffffffff82df97d0 r pckbd_keydesc_us_declk +ffffffff82df9860 r pckbd_keydesc_us_dvorak +ffffffff82df9900 r pckbd_keydesc_us_colemak +ffffffff82df9948 r pckbd_keydesc_swapctrlcaps +ffffffff82df9960 r pckbd_keydesc_iopener +ffffffff82df99b0 r pckbd_keydesc_es +ffffffff82df9a50 r pckbd_keydesc_be +ffffffff82df9b10 r pckbd_keydesc_ru +ffffffff82df9c80 r pckbd_keydesc_ua +ffffffff82df9e10 r pckbd_keydesc_sg +ffffffff82df9ec0 r pckbd_keydesc_sg_nodead +ffffffff82df9ee0 r pckbd_keydesc_sf +ffffffff82df9f00 r pckbd_keydesc_pt +ffffffff82df9f90 r pckbd_keydesc_lt +ffffffff82dfa070 r pckbd_keydesc_la +ffffffff82dfa100 r pckbd_keydesc_br +ffffffff82dfa180 r pckbd_keydesc_tr +ffffffff82dfa230 r pckbd_keydesc_tr_nodead +ffffffff82dfa250 r pckbd_keydesc_pl +ffffffff82dfa2b0 r pckbd_keydesc_hu +ffffffff82dfa3c0 r pckbd_keydesc_si +ffffffff82dfa4d0 r pckbd_keydesc_cf +ffffffff82dfa5a0 r pckbd_keydesc_cf_nodead +ffffffff82dfa5c0 r pckbd_keydesc_lv +ffffffff82dfa640 r pckbd_keydesc_nl +ffffffff82dfa720 r pckbd_keydesc_nl_nodead +ffffffff82dfa740 r pckbd_keydesc_is +ffffffff82dfa7cc r pckbd_keydesc_is_nodead +ffffffff82dfa7e0 r pckbd_keydesc_ee +ffffffff82dfa890 r pckbd_keydesc_ee_nodead +ffffffff82dfa8b0 R pckbd_keydesctab +ffffffff82dfb000 R pms_ca +ffffffff82dfb028 R pms_accessops +ffffffff82dfb040 R pms_sec_accessops +ffffffff82dfb060 R pms_protocols +ffffffff82dfb1e0 r alps_models +ffffffff82dfc000 R skgpio_led_offset +ffffffff82dfc008 R skgpio_ca +ffffffff82dfd000 R hidkbd_trtab +ffffffff82dfd100 r apple_fn_trans +ffffffff82dfd120 r apple_tb_trans +ffffffff82dfd140 r apple_mba_trans +ffffffff82dfe000 r hidcc_attach_wskbd.accessops +ffffffff82dfe020 r hidcc_keysyms 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+ffffffff82e15000 R umidi_hw_if +ffffffff82e15030 R umidi_ca +ffffffff82e15060 r umidi_evlen +ffffffff82e15080 r packet_length +ffffffff82e16000 r quirk_name +ffffffff82e17000 R ucom_ca +ffffffff82e18000 R ugen_ca +ffffffff82e18028 R ugenread_intr_filtops +ffffffff82e18058 R ugenread_isoc_filtops +ffffffff82e19000 R uhidev_ca +ffffffff82e19030 r uhid_graphire_report_descr +ffffffff82e190b0 r uhid_graphire3_4x5_report_descr +ffffffff82e19160 r uhid_xb360gp_report_descr +ffffffff82e19210 r uhid_xbonegp_report_descr +ffffffff82e1a000 R uhid_ca +ffffffff82e1a028 R uhidread_filtops +ffffffff82e1b000 R fido_ca +ffffffff82e1c000 R ujoy_ca +ffffffff82e1d000 r ukbd_keydesc_us +ffffffff82e1d2a0 r ukbd_keydesc_de +ffffffff82e1d350 r ukbd_keydesc_de_nodead +ffffffff82e1d370 r ukbd_keydesc_fr +ffffffff82e1d430 r ukbd_keydesc_fr_apple +ffffffff82e1d570 r ukbd_keydesc_fr_dvorak_bepo +ffffffff82e1d6b0 r ukbd_keydesc_dk +ffffffff82e1d750 r ukbd_keydesc_dk_nodead +ffffffff82e1d760 r ukbd_keydesc_it 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+ffffffff831b70dc D E_abs_msgin_Used +ffffffff831b70e8 D E_abs_lunsw_return_Used +ffffffff831b70f0 D E_abs_tag0_Used +ffffffff831b7130 D E_ldsa_abs_reselected_Used +ffffffff831b7134 D E_ldsa_abs_reselect_Used +ffffffff831b7138 D E_ldsa_abs_selected_Used +ffffffff831b713c D E_ldsa_abs_data_Used +ffffffff831b7140 D E_ldsa_abs_slot_Used +ffffffff831b7148 D siop_cd +ffffffff831b8000 D ep_isa_media +ffffffff831b8060 D ep_cd +ffffffff831b9000 D wi_cd +ffffffff831b9020 D wi_func_io +ffffffff831ba000 D an_cd +ffffffff831bb000 D xl_cd +ffffffff831bc000 D fxp_int_delay +ffffffff831bc004 D fxp_bundle_max +ffffffff831bc008 D fxp_min_size_mask +ffffffff831bc010 D fxp_cd +ffffffff831bc030 d tx_threshold +ffffffff831bc040 d fxp_cb_config_template +ffffffff831bd000 D rl_cd +ffffffff831be000 D re_cd +ffffffff831bf000 D dc_cd +ffffffff831c0000 D smc91cxx_idstrs +ffffffff831c0080 D sm_cd +ffffffff831c1000 D epic_cd +ffffffff831c2000 D ne_cd +ffffffff831c2020 d ne2000_detect.test_pattern +ffffffff831c3000 D gem_cd +ffffffff831c4000 D ti_cd +ffffffff831c5000 D com_cd +ffffffff831c5020 D comdefaultrate +ffffffff831c5024 D comconsrate +ffffffff831c5028 D comconscflag +ffffffff831c5030 d comcnattach.comcons +ffffffff831c6000 D pckbc_slot_names +ffffffff831c6010 D pckbc_cd +ffffffff831c7000 D ac97civ +ffffffff831c8000 D cy_cd +ffffffff831c9000 D lpt_cd +ffffffff831ca000 D lm_cd +ffffffff831cb000 D ath_dwelltime +ffffffff831cb004 D ath_calinterval +ffffffff831cb008 D ath_outdoor +ffffffff831cb00c D ath_xchanmode +ffffffff831cb010 D ath_softcrypto +ffffffff831cb018 D ath_cd +ffffffff831cc000 D athn_cd +ffffffff831cd000 D bwfm_2ghz_channels +ffffffff831cd010 D bwfm_5ghz_channels +ffffffff831cd030 D bwfm_proto_bcdc_ops +ffffffff831cd050 D bwfm_cd +ffffffff831ce000 D atw_bbp_io_enable_delay +ffffffff831ce004 D atw_bbp_io_disable_delay +ffffffff831ce008 D atw_writewep_delay +ffffffff831ce00c D atw_beacon_len_adjust +ffffffff831ce010 D atw_dwelltime +ffffffff831ce018 D atw_cd +ffffffff831cf000 D rtw_dwelltime +ffffffff831cf004 D rtw_macbangbits_timeout +ffffffff831cf008 D rtw_cd +ffffffff831d0000 D ral_cd +ffffffff831d1000 D rt3090_freqs +ffffffff831d2000 D acx_beacon_intvl +ffffffff831d2008 D acx_cd +ffffffff831d3000 D pgt_cd +ffffffff831d4000 D sf_cd +ffffffff831d5000 D malo_cd +ffffffff831d6000 D bwi_cd +ffffffff831d6020 D bwi_constraint +ffffffff831d6030 D bwi_pa_mode +ffffffff831d7000 D iosf_cd +ffffffff831d7020 d iosf_lock +ffffffff831d7030 d iosf_mbi_mtx +ffffffff831d8000 D uhci_cd +ffffffff831d9000 D ohci_cd +ffffffff831da000 D ehci_cd +ffffffff831db000 D xhci_cd +ffffffff831dc000 D ccp_cd +ffffffff831dd000 D sdhc_functions +ffffffff831dd068 D sdhc_cd +ffffffff831de000 D rtsx_functions +ffffffff831de068 D rtsx_cd +ffffffff831df000 D radio_cd +ffffffff831e0000 D kcs_if +ffffffff831e0040 D smic_if +ffffffff831e0080 D bt_if +ffffffff831e00c0 D ipmi_cd +ffffffff831e00e0 D maxsdrlen +ffffffff831e1000 D vscsi_cd +ffffffff831e2000 D mpath_cd +ffffffff831e3000 D softraid_cd +ffffffff831e3020 D smd +ffffffff831e4000 D spdmem_cd +ffffffff831e5000 D dwiic_cd +ffffffff831e6000 D dwqe_cd +ffffffff831e7000 D kstat_lock +ffffffff831e7010 D kstat_next_id +ffffffff831e7018 D kstat_default_lock +ffffffff831e8000 D pf_inp_mtx +ffffffff831e8010 D pf_hdr_limit +ffffffff831e8020 D pf_pool_limits +ffffffff831e8090 D pf_state_list +ffffffff831e80c0 D pf_purge_states_task +ffffffff831e80f0 D pf_purge_states_to +ffffffff831e8138 D pf_purge_states_collect +ffffffff831e8140 D pf_purge_to +ffffffff831e8188 D pf_purge_task +ffffffff831e9000 D pf_tags +ffffffff831e9010 D pf_qids +ffffffff831e9020 D pf_lock +ffffffff831e9030 D pf_state_lock +ffffffff831e9040 D pfioctl_rw +ffffffff831e9050 d pf_open_trans.ticket +ffffffff831ea000 D pfi_update +ffffffff831eb000 D pflog_cloner +ffffffff831ec000 D pfsync_cloner +ffffffff831ed000 D pflow_cloner +ffffffff831ee000 d hotplug_mtx +ffffffff831ef000 D pppoe_cloner +ffffffff831ef030 D pppoediscinq +ffffffff831ef060 D pppoeinq +ffffffff831f0000 D dt_lock +ffffffff831f1000 D dt_prov_profile +ffffffff831f1030 D dt_prov_interval +ffffffff831f2000 D dtps_nsysent +ffffffff831f2008 D dt_prov_syscall +ffffffff831f3000 D dt_prov_static +ffffffff831f3030 D dt_static_sched_dequeue +ffffffff831f30a0 D dt_static_sched_enqueue +ffffffff831f3110 D dt_static_sched_fork +ffffffff831f3180 D dt_static_sched_off__cpu +ffffffff831f31f0 D dt_static_sched_on__cpu +ffffffff831f3260 D dt_static_sched_remain__cpu +ffffffff831f32d0 D dt_static_sched_sleep +ffffffff831f3340 D dt_static_sched_steal +ffffffff831f33b0 D dt_static_sched_unsleep +ffffffff831f3420 D dt_static_sched_wakeup +ffffffff831f3490 D dt_static_raw_syscalls_sys_enter +ffffffff831f3500 D dt_static_raw_syscalls_sys_exit +ffffffff831f3570 D dt_static_uvm_fault +ffffffff831f35e0 D dt_static_uvm_map_insert +ffffffff831f3650 D dt_static_uvm_map_remove +ffffffff831f36c0 D dt_static_uvm_malloc +ffffffff831f3730 D dt_static_uvm_free +ffffffff831f37a0 D dt_static_uvm_pool_get +ffffffff831f3810 D dt_static_uvm_pool_put +ffffffff831f3880 D dt_static_vfs_bufcache_rel +ffffffff831f38f0 D dt_static_vfs_bufcache_take +ffffffff831f3960 D dt_static_vfs_cleaner +ffffffff831f39d0 D dt_static_vmm_guest_enter +ffffffff831f3a40 D dt_static_vmm_guest_exit +ffffffff831f3ab0 D dt_static_vmm_inout +ffffffff831f3b20 D dt_static_smr_call +ffffffff831f3b90 D dt_static_smr_called +ffffffff831f3c00 D dt_static_smr_barrier_enter +ffffffff831f3c70 D dt_static_smr_barrier_exit +ffffffff831f3ce0 D dt_static_smr_wakeup +ffffffff831f3d50 D dt_static_smr_thread +ffffffff831f3dc0 D dt_static_refcnt_none +ffffffff831f3e30 D dt_static_refcnt_ethmulti +ffffffff831f3ea0 D dt_static_refcnt_ifaddr +ffffffff831f3f10 D dt_static_refcnt_ifmaddr +ffffffff831f3f80 D dt_static_refcnt_inpcb +ffffffff831f3ff0 D dt_static_refcnt_rtentry +ffffffff831f4060 D dt_static_refcnt_syncache +ffffffff831f40d0 D dt_static_refcnt_tdb +ffffffff831f5000 D db_next_free_breakpoint +ffffffff831f5008 D db_breakpoints_inserted +ffffffff831f6000 D db_ed_style +ffffffff831f7000 D db_examine_format +ffffffff831f7078 D db_print_format +ffffffff831f8000 D db_history_size +ffffffff831f8008 D db_history_curr +ffffffff831f8010 D db_history_last +ffffffff831f9000 D db_tab_stop_width +ffffffff831f9004 D db_max_line +ffffffff831f9008 D db_max_width +ffffffff831f900c D db_radix +ffffffff831fa000 D db_lastsym +ffffffff831fa008 D db_maxoff +ffffffff831fb000 D db_vars +ffffffff831fb090 D db_evars +ffffffff831fc000 D db_watchpoints_inserted +ffffffff831fc008 D db_next_free_watchpoint +ffffffff831fd000 D db_log +ffffffff831fe000 D audio_cd +ffffffff831fe020 D audio_lock +ffffffff831ff000 D midi_cd +ffffffff83200000 D rnd_cold +ffffffff83200004 D rnd_slowextract +ffffffff83200008 D rnd_timeout +ffffffff83200050 D rndlock +ffffffff83200060 D rndreinit_timeout +ffffffff832000a8 D rnd_task +ffffffff83201000 D video_cd +ffffffff83202000 d rrip_table_analyze +ffffffff832020e0 d rrip_table_getname +ffffffff832021e0 d rrip_table_getsymname +ffffffff83202280 d rrip_table_extref +ffffffff83203000 D nexecs +ffffffff83204000 D elf_note_names +ffffffff83205000 D ncpus +ffffffff83205004 D ncpusfound +ffffffff83206000 D acct_lock +ffffffff83206010 D acctsuspend +ffffffff83206014 D acctresume +ffffffff83206018 D acctrate +ffffffff83207000 D ticks +ffffffff83208000 D fhdlk +ffffffff83209000 D kqueue_klist_lock +ffffffff83209010 D kq_timeoutmax +ffffffff8320a000 D stackgap_random +ffffffff8320b000 D nprocesses +ffffffff8320b004 D nthreads +ffffffff8320b008 D fork_tfmrate +ffffffff8320c000 D kthread_q +ffffffff8320d000 D nkmempages +ffffffff8320d008 D malloc_mtx +ffffffff8320d020 D memname +ffffffff8320d4b0 D sysctl_kmemlock +ffffffff8320d4c0 D malloc_errintvl +ffffffff8320e000 D maxdmap +ffffffff8320e008 D maxsmap +ffffffff8320e010 D rlimit_lock +ffffffff8320f000 D sched_cost_load +ffffffff8320f004 D sched_cost_priority +ffffffff8320f008 D sched_cost_runnable +ffffffff8320f00c D sched_cost_resident +ffffffff83210000 D intrmap_lock +ffffffff83211000 D nosuidcoredump +ffffffff83211008 D sigio_lock +ffffffff83212000 D smr_lock +ffffffff83212010 D smr_logintvl +ffffffff83213000 D startuphook_list +ffffffff83214000 D sysctl_lock +ffffffff83214010 D sysctl_disklock +ffffffff83214020 d openbsd +ffffffff83214024 d arg_max +ffffffff83214028 d posix_version +ffffffff8321402c d ngroups_max +ffffffff83214030 d int_one +ffffffff83214034 d maxpartitions +ffffffff83214038 d raw_part +ffffffff8321403c D allowpowerdown +ffffffff83214040 D hw_power +ffffffff83214044 d byte_order +ffffffff83214048 d page_size +ffffffff83215000 d thrsleep_queue +ffffffff83215010 d thrsleep_lock +ffffffff83216000 D tc_lock +ffffffff83216010 D windup_mtx +ffffffff83216020 d dummy_timecounter +ffffffff83216070 D timecounter +ffffffff83216078 D time_second +ffffffff83216080 d timehands +ffffffff83216088 d th0 +ffffffff83216120 d th1 +ffffffff83217000 D itimer_mtx +ffffffff83217010 D ratecheck_mtx +ffffffff83217020 D ppsratecheck_mtx +ffffffff83217030 D resettodr_to +ffffffff83217078 D resettodr_task +ffffffff83218000 D timeout_mutex +ffffffff83219000 D wdog_auto +ffffffff8321a000 D taskq_sys +ffffffff8321a050 D taskq_sys_mp +ffffffff8321b000 d update_loadavg.to +ffffffff8321b048 D ccpu +ffffffff8321b050 d schedcpu.to +ffffffff8321b098 D perflevel +ffffffff8321b09c D perfpolicy +ffffffff8321b0a0 D setperf_to +ffffffff8321c000 D autoconf_attdet_mtx +ffffffff8321c010 D msgs +ffffffff8321d000 d evcount_list +ffffffff8321d010 d evcount_percpu_init_list +ffffffff8321e000 D syslogf_rwlock +ffffffff8321e010 D log_mtx +ffffffff8321e020 D logstash_in +ffffffff8321e028 D logstash_out +ffffffff8321e030 D logstash_rwlock +ffffffff8321f000 D pool_head +ffffffff8321f010 D pool_lock +ffffffff8321f020 D pool_debug +ffffffff8321f028 D pool_allocator_single +ffffffff8321f040 D pool_allocator_multi +ffffffff8321f058 D pool_allocator_multi_ni +ffffffff8321f070 D pool_gc_tick +ffffffff8321f0b8 D pool_gc_task +ffffffff83220000 D kprintf_mutex +ffffffff83220010 D db_panic +ffffffff83220014 D splassert_ctl +ffffffff83220018 D v_putc +ffffffff83220020 D printf_flags +ffffffff83221000 D userconf_base +ffffffff83221004 D userconf_maxdev +ffffffff83221008 D userconf_totdev +ffffffff8322100c D userconf_maxlocnames +ffffffff83221010 D userconf_cnt +ffffffff83221014 D userconf_lines +ffffffff83221018 D userconf_histsz +ffffffff83221020 D userconf_cmds +ffffffff83222000 D ftlock +ffffffff83223000 d ppollcollect.poll_errintvl +ffffffff83224000 D ttydefchars +ffffffff83224014 D ttclos +ffffffff8322401b D ttopen +ffffffff83224022 D ttybg +ffffffff83224028 D ttyin +ffffffff8322402e D ttyout +ffffffff83224038 D ttylist_lock +ffffffff83225000 D linesw +ffffffff83225280 D nlinesw +ffffffff83226000 D pt_softc_lock +ffffffff83227000 d mbstat_boot_boot_cpumem +ffffffff83227080 D mbstat +ffffffff83227090 D mclsizes +ffffffff832270b0 D m_extref_mtx +ffffffff832270c0 D m_pool_allocator +ffffffff83228000 D somaxconn +ffffffff83228004 D sominconn +ffffffff83228008 D sosplice_lock +ffffffff83229000 D sb_max +ffffffff8322a000 D unp_df_lock +ffffffff8322a010 D unp_gc_lock +ffffffff8322a020 D unp_rights_mtx +ffffffff8322a030 D unp_ino_mtx +ffffffff8322a040 D unp_gc_task +ffffffff8322a070 D unpst_sendspace +ffffffff8322a074 D unpst_recvspace +ffffffff8322a078 D unpsq_sendspace +ffffffff8322a07c D unpsq_recvspace +ffffffff8322a080 D unpdg_sendspace +ffffffff8322a084 D unpdg_recvspace +ffffffff8322b000 D doingcache +ffffffff8322c000 D maxvfsconf +ffffffff8322c010 d vfsconflist +ffffffff8322d000 D lockf_lock +ffffffff8322d010 D maxlocksperuid +ffffffff8322e000 D iftovt_tab +ffffffff8322e040 D vttoif_tab +ffffffff8322e064 D suid_clear +ffffffff8322e068 D vnode_mtx +ffffffff8322e078 D vfs_stall_lock +ffffffff8322e090 D vtypes +ffffffff8322e0e0 D vtags +ffffffff8322f000 D syncer_maxdelay +ffffffff8322f004 D syncdelay +ffffffff83230000 D dosdirtemplate +ffffffff83231000 D ntfs_hashlock +ffffffff83232000 D ntfs_toupper_lock +ffffffff83233000 D art_table_gc_mtx +ffffffff83233010 D art_table_gc_task +ffffffff83233040 D art_node_gc_mtx +ffffffff83233050 D art_node_gc_task +ffffffff83234000 D bpf_bufsize +ffffffff83234004 D bpf_maxbufsize +ffffffff83234008 D bpf_sysctl_lk +ffffffff83235000 D ifg_head +ffffffff83235010 D if_cloners_lock +ffffffff83235020 D if_input_task_locked +ffffffff83235050 D netlock +ffffffff83235060 D ifnetlist +ffffffff83236000 D ifiq_maxlen_drop +ffffffff83236004 D ifiq_maxlen_return +ffffffff83237000 D etherbroadcastaddr +ffffffff83237006 D ether_ipmulticast_min +ffffffff8323700c D ether_ipmulticast_max +ffffffff83237012 D ether_ip6multicast_min +ffffffff83237018 D ether_ip6multicast_max +ffffffff83238000 D etherip_cloner +ffffffff83238030 D etherip_list +ffffffff83239000 D loop_cloner +ffffffff8323a000 D ifmedia_mtx +ffffffff8323b000 D ppp_compressors +ffffffff8323b020 D ppp_cloner +ffffffff8323c000 D ppp_pkt_init +ffffffff8323d000 D ppp_bsd_compress +ffffffff8323e000 D ppp_deflate +ffffffff8323e070 D ppp_deflate_draft +ffffffff8323f000 D tun_cloner +ffffffff8323f030 D tap_cloner +ffffffff83240000 D bridgeintrq +ffffffff83240038 D bridge_cloner +ffffffff83241000 d veb_cloner +ffffffff83241030 d vport_cloner +ffffffff83242000 D vlan_tagh_lk +ffffffff83242010 D vlan_cloner +ffffffff83242040 D svlan_cloner +ffffffff83243000 D pipex_list_mtx +ffffffff83243010 D pipex_prune +ffffffff83243018 D pipexoutq +ffffffff83243050 d SHAPad2 +ffffffff83244000 D rtmap_gc +ffffffff83244018 D rt_rc +ffffffff83245000 D rt_labels +ffffffff83245010 D rtlabel_mtx +ffffffff83246000 D enc_cloner +ffffffff83247000 D gre_cloner +ffffffff83247030 D gre_list +ffffffff83247040 D mgre_cloner +ffffffff83247070 D egre_cloner +ffffffff832470a0 D nvgre_cloner +ffffffff832470d0 D eoip_cloner +ffffffff83248000 D trunk_cloner +ffffffff83249000 d aggr_cloner +ffffffff8324a000 d tpmr_cloner +ffffffff8324b000 D mpe_cloner +ffffffff8324c000 D mpw_cloner +ffffffff8324d000 D mpip_cloner +ffffffff8324e000 d bpe_cloner +ffffffff8324e030 d bpe_lock +ffffffff8324f000 D vether_cloner +ffffffff83250000 D pair_cloner +ffffffff83251000 d vxlan_cloner +ffffffff83251030 d vxlan_lock +ffffffff83251040 d vxlan_teps +ffffffff83252000 D underload_interval +ffffffff83252010 D wg_cloner +ffffffff83253000 d stoeplitz_keyseed +ffffffff83254000 D ieee80211_cache_size +ffffffff83255000 D arpt_prune +ffffffff83255004 D arpt_keep +ffffffff83255008 D arpt_down +ffffffff83255010 D arpinq +ffffffff83255048 D arp_mtx +ffffffff83255058 D arp_maxtries +ffffffff83256000 D ipport_firstauto +ffffffff83256004 D ipport_lastauto +ffffffff83256008 D ipport_hifirstauto +ffffffff8325600c D ipport_hilastauto +ffffffff83257000 D divert_sendspace +ffffffff83257004 D divert_recvspace +ffffffff83257008 D divbhashsize +ffffffff83258000 D icmptstamprepl +ffffffff83258004 D icmperrppslim +ffffffff83258008 D icmp_redirtimeout +ffffffff83259000 D ipsendredirects +ffffffff83259004 D ip_defttl +ffffffff83259008 D ip_mtudisc +ffffffff8325900c D ip_mtudisc_timeout +ffffffff83259010 D ipq_mutex +ffffffff83259020 D ip_maxqueue +ffffffff83259028 D ipintrq +ffffffff83259060 d ipsend_task +ffffffff83259090 d ipsendraw_task +ffffffff8325a000 D ip_mrtproto +ffffffff8325a004 d sin +ffffffff8325b000 D rip_sendspace +ffffffff8325b008 D rip_recvspace +ffffffff8325c000 D tcprexmtthresh +ffffffff8325c004 D tcptv_keep_init +ffffffff8325c008 D tcp_rst_ppslim +ffffffff8325c00c D tcp_ackdrop_ppslim +ffffffff8325c010 D tcp_syn_hash_size +ffffffff8325c014 D tcp_syn_cache_limit +ffffffff8325c018 D tcp_syn_bucket_limit +ffffffff8325c01c D tcp_syn_use_limit +ffffffff8325c020 D syn_cache_mtx +ffffffff8325d000 D tcp_outflags +ffffffff8325e000 D tcp_timer_mtx +ffffffff8325e010 D tcp_mssdflt +ffffffff8325e014 D tcp_rttdflt +ffffffff8325e018 D tcp_do_rfc1323 +ffffffff8325e01c D tcp_do_sack +ffffffff8325e020 D tcp_do_rfc3390 +ffffffff8325e024 D tcp_do_tso +ffffffff8325e028 D tcp_reass_limit +ffffffff8325e02c D tcp_sackhole_limit +ffffffff8325f000 D tcp_backoff +ffffffff8325f034 D tcp_totbackoff +ffffffff83260000 D tcp_sendspace +ffffffff83260004 D tcp_recvspace +ffffffff83260008 D tcp_autorcvbuf_inc +ffffffff83261000 D udpcksum +ffffffff83261004 D udp_sendspace +ffffffff83261008 D udp_recvspace +ffffffff83262000 D ipsec_flows_mtx +ffffffff83262010 D ipsec_ids_idle +ffffffff83262014 D ipsec_ids_next_flow +ffffffff83262018 D ipsec_policy_head +ffffffff83262028 D ipsp_ids_gc_timeout +ffffffff83262070 D tdb_sadb_mtx +ffffffff83262080 d tdb_hashmask +ffffffff83263000 D ipo_tdb_mtx +ffffffff83263010 D ipsec_acquire_mtx +ffffffff83263020 D ipsec_acquire_head +ffffffff83264000 D ipsec_keep_invalid +ffffffff83264004 D ipsec_require_pfs +ffffffff83264008 D ipsec_soft_timeout +ffffffff8326400c D ipsec_exp_timeout +ffffffff83264010 D ipsec_soft_first_use +ffffffff83264014 D ipsec_exp_first_use +ffffffff83264018 D ipsec_expire_acquire +ffffffff8326401c D esp_enable +ffffffff83264020 D ah_enable +ffffffff83265000 D udpencap_enable +ffffffff83265004 D udpencap_port +ffffffff83266000 D carp_vh_rc +ffffffff83266020 D carp_sc_rc +ffffffff83266040 D carp_opts +ffffffff83266058 D carp_cloner +ffffffff83266088 d carp_send_na.mcast +ffffffff83267000 d PADDING +ffffffff83268000 d PADDING +ffffffff83269000 d weak_keys +ffffffff8326a000 D swcr_id +ffffffff8326b000 D window_inflate +ffffffff8326b004 D window_deflate +ffffffff8326c000 D ghash_update +ffffffff8326d000 D mpls_defttl +ffffffff8326d004 D mpls_mapttl_ip +ffffffff8326e000 D nfskevq_lock +ffffffff8326f000 D nfs_backoff +ffffffff8326f020 D nfs_ptimers +ffffffff83270000 D desirednfsrvcache +ffffffff83270010 D nonidempotent +ffffffff83270070 D nfsv2_repstat +ffffffff83271000 D nfsv2_type +ffffffff83271030 D nfsv3_type +ffffffff83271060 D nv2tov_type +ffffffff83271080 D nv3tov_type +ffffffff832710a0 D nfsv3_procid +ffffffff83271100 D nfsv2_procid +ffffffff8327115c d nfsv3err_getattr +ffffffff83271170 d nfsv3err_setattr +ffffffff83271190 d nfsv3err_lookup +ffffffff832711a4 d nfsv3err_access +ffffffff832711b0 d nfsv3err_readlink +ffffffff832711d0 d nfsv3err_read +ffffffff832711f0 d nfsv3err_write +ffffffff83271210 d nfsv3err_create +ffffffff83271230 d nfsv3err_mkdir +ffffffff83271250 d nfsv3err_symlink +ffffffff83271270 d nfsv3err_mknod +ffffffff83271290 d nfsv3err_remove +ffffffff832712b0 d nfsv3err_rmdir +ffffffff832712d0 d nfsv3err_rename +ffffffff83271300 d nfsv3err_link +ffffffff83271330 d nfsv3err_readdir +ffffffff83271350 d nfsv3err_readdirplus +ffffffff83271366 d nfsv3err_fsstat +ffffffff83271372 d nfsv3err_fsinfo +ffffffff8327137c d nfsv3err_pathconf +ffffffff83271386 d nfsv3err_commit +ffffffff83272000 D nfsrv3_procs +ffffffff832720b8 D nfs_niothreads +ffffffff83273000 D fragtbl +ffffffff83274000 D ffs_vtbl +ffffffff83275000 D dirchk +ffffffff83276000 D desireddquot +ffffffff83277000 D amap_list_lock +ffffffff83278000 d uao_list_lock +ffffffff83279000 d uvmexp_countersboot_boot_cpumem +ffffffff832790c0 D uvmexp_counters +ffffffff832790c8 D vm_min_kernel_address +ffffffff8327a000 D no_constraint +ffffffff8327b000 d uvm_kmapent_warn_rate +ffffffff8327c000 D maxslp +ffffffff8327d000 D uvmpagerops +ffffffff8327e000 D uvm_swap_data_lock +ffffffff8327e010 D swap_syscall_lock +ffffffff8327e020 D oommtx +ffffffff8327f000 D uvm_doswapencrypt +ffffffff83280000 D gif_list +ffffffff83280010 D gif_cloner +ffffffff83281000 d sec_cloner +ffffffff83281030 d sec_tdb_gc_mtx +ffffffff83281040 d sec_tdb_gc_task +ffffffff83282000 D divert6_sendspace +ffffffff83282004 D divert6_recvspace +ffffffff83282008 D divb6hashsize +ffffffff83283000 d in6_get_hw_ifid.allone +ffffffff83284000 D ip6_sendredirects +ffffffff83284004 D ip6_defhlim +ffffffff83284008 D ip6_defmcasthlim +ffffffff8328400c D ip6_maxfragpackets +ffffffff83284010 D ip6_maxfrags +ffffffff83284014 D ip6_log_interval +ffffffff83284018 D ip6_hdrnestlimit +ffffffff8328401c D ip6_dad_count +ffffffff83284020 D ip6_auto_flowlabel +ffffffff83284024 D ip6_use_deprecated +ffffffff83284028 D ip6_neighborgcthresh +ffffffff8328402c D ip6_maxdynroutes +ffffffff83284030 D rip6_sendspace +ffffffff83284038 D rip6_recvspace +ffffffff83284040 D icmp6_redirtimeout +ffffffff83284044 D icmp6errppslim +ffffffff83284048 D ip6_mtudisc_timeout +ffffffff83285000 D frag6_mutex +ffffffff83286000 d icmp6_mtudisc_hiwat +ffffffff83286004 d icmp6_mtudisc_lowat +ffffffff83287000 d randomtab_20 +ffffffff83288000 D ip6intrq +ffffffff83288038 d ip6send_task +ffffffff83289000 D nd6_timer_next +ffffffff83289008 D nd6_expire_next +ffffffff83289010 D nd6_delay +ffffffff83289014 D nd6_umaxtries +ffffffff83289018 D nd6_mmaxtries +ffffffff8328901c D nd6_gctimer +ffffffff83289020 D nd6_maxndopt +ffffffff83289028 D nd6_mtx +ffffffff83289038 D nd6_list +ffffffff8328a000 d dadq +ffffffff8328b000 D pfkeyv2_mtx +ffffffff8328b010 d pfkeyv2_seq +ffffffff8328c000 D sadb_exts_allowed_in +ffffffff8328c090 D sadb_exts_required_in +ffffffff8328d000 D cold +ffffffff8328e000 D bdevsw +ffffffff8328e460 D nblkdev +ffffffff8328e470 D cdevsw +ffffffff83290400 D nchrdev +ffffffff83290404 D mem_no +ffffffff83290408 D swapdev +ffffffff83290410 D constab +ffffffff83291000 D machine +ffffffff83291008 D cpu_idle_cycle_fcn +ffffffff83291010 D lid_action +ffffffff83291014 D pwr_action +ffffffff83291018 D isa_constraint +ffffffff83291028 D dma_constraint +ffffffff83291040 D uvm_md_constraints +ffffffff83291058 D delay_func +ffffffff83291060 D initclock_func +ffffffff83291068 D startclock_func +ffffffff83291070 D bootinfo_size +ffffffff83291074 D waittime +ffffffff83291078 D dumpmag +ffffffff83292000 D tsc_rdtsc +ffffffff83292008 D tsc_timecounter +ffffffff83292058 D tsc_is_synchronized +ffffffff83293000 D local_apic +ffffffff83293020 D lapic_id +ffffffff83293080 D lapic_tpr +ffffffff832930a0 d lapic_ppr +ffffffff83293100 d lapic_isr +ffffffff83294000 D warn_once +ffffffff83295000 d errata +ffffffff83296000 D cpu_ucode_mtx +ffffffff83297000 D mem_owner_bios +ffffffff83297008 D mrops +ffffffff83297028 D mtrrmask +ffffffff83297030 D mtrrtomrt +ffffffff83298000 D pmap_pg_wc +ffffffff83298008 D pmaps_lock +ffffffff83298018 d pmap_maxkvaddr +ffffffff83299000 D kv_physwait +ffffffff8329a000 D fpu_save_len +ffffffff8329b000 D i8259_pic +ffffffff8329c000 D softintr_pic +ffffffff8329d000 D ipifunc +ffffffff8329e000 D setperf_mp_mutex +ffffffff8329f000 D db_Grp6 +ffffffff8329f040 D db_Grp7 +ffffffff8329f100 D db_Grp8 +ffffffff8329f140 D db_Grp9 +ffffffff8329f200 D db_GrpA +ffffffff8329f240 D db_GrpB +ffffffff8329f280 D db_GrpC +ffffffff8329f2c0 D db_inst_0f0x +ffffffff8329f440 D db_inst_0f2x +ffffffff8329f5c0 D db_inst_0f3x +ffffffff8329f740 D db_inst_0f8x +ffffffff8329f8c0 D db_inst_0f9x +ffffffff8329fa40 D db_inst_0fax +ffffffff8329fbc0 D db_inst_0fbx +ffffffff8329fd40 D db_inst_0fcx +ffffffff8329fec0 D db_inst_0f +ffffffff8329ff40 D db_Esc92 +ffffffff8329ff80 D db_Esc94 +ffffffff8329ffc0 D db_Esc95 +ffffffff832a0000 D db_Esc96 +ffffffff832a0040 D db_Esc97 +ffffffff832a0080 D db_Esca5 +ffffffff832a00c0 D db_Escb4 +ffffffff832a0100 D db_Esce3 +ffffffff832a0140 D db_Escf4 +ffffffff832a0180 D db_Esc8 +ffffffff832a0240 D db_Esc9 +ffffffff832a0300 D db_Esca +ffffffff832a03c0 D db_Escb +ffffffff832a0480 D db_Escc +ffffffff832a0540 D db_Escd +ffffffff832a0600 D db_Esce +ffffffff832a06c0 D db_Escf +ffffffff832a0780 D db_Esc_inst +ffffffff832a07c0 D db_Grp1 +ffffffff832a0800 D db_Grp2 +ffffffff832a0840 D db_Grp3 +ffffffff832a0900 D db_Grp4 +ffffffff832a09c0 D db_Grp5 +ffffffff832a0a80 D db_inst_table +ffffffff832a2280 D db_bad_inst +ffffffff832a22a0 D db_index_reg_16 +ffffffff832a22e0 D db_reg +ffffffff832a24e0 D db_seg_reg +ffffffff832a2520 D db_lengths +ffffffff832a3000 D db_regs +ffffffff832a31e0 D db_eregs +ffffffff832a31f0 D db_reg_args +ffffffff832a4000 D timer_mutex +ffffffff832a4010 d i8254_timecounter +ffffffff832a5000 D spleen8x16 +ffffffff832a5058 D spleen12x24 +ffffffff832a50b0 D spleen16x32 +ffffffff832a5108 D spleen32x64 +ffffffff832a5160 d builtin_fonts +ffffffff832a51e0 d wsfont_add.cookiegen +ffffffff832a51f0 d spleen8x16_data +ffffffff832a5ff0 d spleen12x24_data +ffffffff832a89f0 d spleen16x32_data +ffffffff832ac1f0 d spleen32x64_data +ffffffff832bb000 D nsphy_cd +ffffffff832bc000 D nsphyter_cd +ffffffff832bd000 D gentbi_cd +ffffffff832be000 D qsphy_cd +ffffffff832bf000 D inphy_cd +ffffffff832c0000 D iophy_cd +ffffffff832c1000 D eephy_cd +ffffffff832c2000 D exphy_cd +ffffffff832c3000 D rlphy_cd +ffffffff832c4000 D lxtphy_cd +ffffffff832c5000 D luphy_cd +ffffffff832c6000 D mtdphy_cd +ffffffff832c7000 D icsphy_cd +ffffffff832c8000 D sqphy_cd +ffffffff832c9000 D tqphy_cd +ffffffff832ca000 D ukphy_cd +ffffffff832cb000 D dcphy_cd +ffffffff832cc000 D bmtphy_cd +ffffffff832cd000 D brgphy_cd +ffffffff832ce000 D xmphy_cd +ffffffff832cf000 D amphy_cd +ffffffff832d0000 D acphy_cd +ffffffff832d1000 D nsgphy_cd +ffffffff832d2000 D urlphy_cd +ffffffff832d3000 D rgephy_cd +ffffffff832d4000 D ciphy_cd +ffffffff832d5000 D ipgphy_cd +ffffffff832d6000 D etphy_cd +ffffffff832d7000 D jmphy_cd +ffffffff832d8000 D atphy_cd +ffffffff832d9000 D scsi_autoconf +ffffffff832d9008 D scsibus_cd +ffffffff832da000 D cd_cd +ffffffff832db000 D ch_cd +ffffffff832db020 D chquirks +ffffffff832dc000 D sd_cd +ffffffff832dd000 D st_cd +ffffffff832de000 D uk_cd +ffffffff832df000 D safte_cd +ffffffff832e0000 D ses_cd +ffffffff832e1000 D sym_cd +ffffffff832e1020 D sym_devices +ffffffff832e1070 D asym_devices +ffffffff832e2000 D rdac_cd +ffffffff832e2020 D rdac_devices +ffffffff832e3000 D emc_cd +ffffffff832e3020 D emc_devices +ffffffff832e4000 D hds_cd +ffffffff832e4020 D hds_devices +ffffffff832e5000 D atapiscsi_cd +ffffffff832e6000 D wd_cd +ffffffff832e6020 d wddumpmulti +ffffffff832e7000 D mainbus_cd +ffffffff832e7020 D mba_iba +ffffffff832e8000 D bios_cd +ffffffff832e8020 D smbios_uninfo +ffffffff832e9000 D mpbios_cd +ffffffff832e9020 d mp_conf +ffffffff832e9070 d extint_bus +ffffffff832e90a0 d smi_bus +ffffffff832e90d0 d nmi_bus +ffffffff832ea000 D need_retpoline +ffffffff832eb000 D cpu_info_full_primary +ffffffff832ee000 D cpu_info_list +ffffffff832ee008 D mp_cpu_funcs +ffffffff832ee020 D cpu_cd +ffffffff832ee040 D cpu_info +ffffffff832ef000 D local_pic +ffffffff832ef098 D lapic_readreg +ffffffff832ef0a0 D lapic_writereg +ffffffff832ef0a8 D x86_ipi +ffffffff832f0000 D ioapic_cold +ffffffff832f0008 D ioapic_cd +ffffffff832f1000 D efifb_std_descr +ffffffff832f1030 D efifb_descrs +ffffffff832f1038 D efifb_accessops +ffffffff832f1098 D efifb_cd +ffffffff832f2000 D pvbus_cd +ffffffff832f2020 D pvbus_types +ffffffff832f20e0 D pvbus_dma_tag +ffffffff832f3000 D pvclock_cd +ffffffff832f3020 D pvclock_timecounter +ffffffff832f4000 D vmt_tclo_rpc +ffffffff832f40d0 D vmt_cd +ffffffff832f5000 D xen_cd +ffffffff832f5020 D xen_bus_dma_tag +ffffffff832f6000 D xnf_cd +ffffffff832f7000 D xbf_cd +ffffffff832f8000 D hv_msg_dispatch +ffffffff832f8110 D hv_timecounter +ffffffff832f8160 D hyperv_cd +ffffffff832f9000 d hv_ic_devs +ffffffff832fa000 D hvn_cd +ffffffff832fb000 D hvs_cd +ffffffff832fc000 D virtio_cd +ffffffff832fd000 D vio_cd +ffffffff832fe000 D vioblk_cd +ffffffff832ff000 D viomb_cd +ffffffff83300000 D viornd_cd +ffffffff83301000 D vioscsi_cd +ffffffff83302000 D vmmci_cd +ffffffff83303000 D pci_cd +ffffffff83304000 D arc_fw_hdr +ffffffff83304008 D arc_cd +ffffffff83305000 D jmb_cd +ffffffff83306000 D mfii_cd +ffffffff83307000 D ips_cd +ffffffff83308000 D eap_cd +ffffffff83309000 D auacer_cd +ffffffff8330a000 D auich_cd +ffffffff8330b000 D azalia_cd +ffffffff8330c000 D envy_cd +ffffffff8330c020 D envy_matchids +ffffffff8330c030 D envy_rates +ffffffff8330c0b0 D ak4524_dac +ffffffff8330c0d8 D ak4524_adc +ffffffff8330c100 D ak4358_dac +ffffffff8330c128 D ak5365_adc +ffffffff8330c150 D unkenvy_codec +ffffffff8330c180 D envy_cards +ffffffff8330c3f0 D envy_cards_ht +ffffffff8330c600 d julia_eeprom +ffffffff8330d000 D emu_cd +ffffffff8330e000 D auixp_cd +ffffffff8330f000 D clcs_cd +ffffffff83310000 D yds_cd +ffffffff83311000 D auvia_cd +ffffffff83312000 D qle_cd +ffffffff83313000 D mpii_cd +ffffffff83314000 D aq_cd +ffffffff83315000 D de_cd +ffffffff83316000 D pcn_cd +ffffffff83317000 D wdc_sii3114_vtbl +ffffffff83317038 D wdc_pdc203xx_vtbl +ffffffff83317070 D wdc_svwsata_vtbl +ffffffff833170a8 D pciide_cd +ffffffff833170d0 d sis_hostbr_type +ffffffff83318000 D ppb_cd +ffffffff83319000 D vr_cd +ffffffff83319020 D vr_devices +ffffffff8331a000 D txp_cd +ffffffff8331b000 D bt848_card_signature +ffffffff8331c000 D bktr_cd +ffffffff8331d000 D em_cd +ffffffff8331e000 D ixgb_cd +ffffffff8331f000 D ix_cd +ffffffff8331f020 D ixgbe_smart_speed +ffffffff8331f024 D ixgbe_enable_msix +ffffffff83320000 D ixl_cd +ffffffff83320020 d ixl_sff_lock +ffffffff83321000 D xge_cd +ffffffff83322000 D thtc_cd +ffffffff83322020 D tht_cd +ffffffff83322040 D tht_txt_desc +ffffffff83322068 D tht_rxf_desc +ffffffff83322090 D tht_rxd_desc +ffffffff833220b8 D tht_txf_desc +ffffffff83323000 D myx_cd +ffffffff83324000 D oce_cd +ffffffff83325000 D dc_devs +ffffffff83326000 D cas_cd +ffffffff83327000 D sis_cd +ffffffff83328000 D se_cd +ffffffff83329000 D mbg_cd +ffffffff8332a000 D cbb_cd +ffffffff8332a020 D yc_chipsets +ffffffff8332a1b0 d pccbb_funcs +ffffffff8332a1e0 d pccbb_pcmcia_funcs +ffffffff8332b000 D skc_cd +ffffffff8332b020 D sk_cd +ffffffff8332c000 D mskc_cd +ffffffff8332c020 D msk_cd +ffffffff8332d000 D puc_cd +ffffffff8332e000 D puc_ndevs +ffffffff8332f000 D iwi_cd +ffffffff83330000 D wpi_cd +ffffffff83331000 D iwn_cd +ffffffff83332000 D iwm_cd +ffffffff83333000 D iwx_cd +ffffffff83334000 D cmpci_cd +ffffffff83335000 D iha_cd +ffffffff83336000 D pcscp_cd +ffffffff83336020 D pcscp_glue +ffffffff83337000 D bge_cd +ffffffff83338000 D bnx_firmwares +ffffffff83338160 D bnx_rv2ps +ffffffff833381c0 D bnx_cd +ffffffff833381e0 d flash_5709 +ffffffff83338210 d flash_table +ffffffff83339000 D vge_cd +ffffffff8333a000 D stge_cd +ffffffff8333b000 D nfe_cd +ffffffff8333c000 D et_cd +ffffffff8333d000 D jme_cd +ffffffff8333e000 D age_cd +ffffffff8333f000 D alc_dma_burst +ffffffff8333f020 D alc_cd +ffffffff83340000 D ale_cd +ffffffff83341000 D amdpm_cd +ffffffff83341020 d amdpm_timecounter +ffffffff83342000 D bce_cd +ffffffff83343000 D rtwn_cd +ffffffff83344000 d ral_rt2560_opns +ffffffff83344028 d ral_rt2661_opns +ffffffff83344050 d ral_rt2860_opns +ffffffff83345000 D piixpm_cd +ffffffff83346000 D vic_cd +ffffffff83347000 D vmx_cd +ffffffff83348000 D vmwpvs_cd +ffffffff83349000 D lii_cd +ffffffff8334a000 D ichiic_cd +ffffffff8334b000 D viapm_cd +ffffffff8334b020 d viapm_timecounter +ffffffff8334c000 D amdiic_cd +ffffffff8334d000 D nviic_cd +ffffffff8334e000 D kate_cd +ffffffff8334f000 D km_cd +ffffffff83350000 D cpu_model_offsets +ffffffff83350070 D ksmn_cd +ffffffff83351000 D itherm_cd +ffffffff83352000 D pchtemp_cd +ffffffff83353000 D xspd_cd +ffffffff83354000 D virtio_pci_ops +ffffffff83355000 D bwfm_pci_buscore_ops +ffffffff83355030 D bwfm_pci_bus_ops +ffffffff83355058 D bwfm_pci_msgbuf_ops +ffffffff83356000 D bnxt_cd +ffffffff83357000 D mcx_cd +ffffffff83358000 D iavf_cd +ffffffff83359000 D rge_cd +ffffffff8335a000 D igc_cd +ffffffff8335b000 D ngbe_cd +ffffffff8335c000 D agp_cd +ffffffff8335d000 D intagp_cd +ffffffff8335d020 D agp_i810_methods +ffffffff8335e000 D reservation_ww_class +ffffffff8335f000 d bridge_lock +ffffffff8335f010 d bridge_list +ffffffff83360000 d drm_connector_enum_list +ffffffff833601f8 d connector_list_lock +ffffffff83360208 d connector_list +ffffffff83361000 d kernel_fb_helper_list +ffffffff83361010 d kernel_fb_helper_lock +ffffffff83362000 D drm_global_mutex +ffffffff83363000 D i2c_bit_algo +ffffffff83363010 d drm_fence_context_count +ffffffff83363018 d dma_fence_stub_mtx +ffffffff83363028 D wait_bit_mtx +ffffffff83363038 D shrinkers +ffffffff83364000 d crtc_ww_class +ffffffff83365000 d panel_lock +ffffffff83365010 d panel_list +ffffffff83366000 d ttm_global_mutex +ffffffff83367000 D drm_sched_policy +ffffffff83368000 D intel_bbops +ffffffff83369000 d i915_sys_placement +ffffffff83369020 d i915_ttm_bo_driver +ffffffff8336a000 d mchdev_lock +ffffffff8336b000 D inteldrm_stdscreen +ffffffff8336b030 D inteldrm_scrlist +ffffffff8336b038 D inteldrm_screenlist +ffffffff8336b048 D inteldrm_accessops +ffffffff8336b0a8 D inteldrm_cd +ffffffff8336c000 d capture_mutex +ffffffff8336d000 d mitigations +ffffffff8336e000 D i915_modparams +ffffffff8336f000 d schedule_lock +ffffffff83370000 d unbind_fence_ops +ffffffff83371000 D intel_graphics_stolen_res +ffffffff83372000 D btc_valid_sclk +ffffffff83373000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff83373020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff83374000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff83374008 d r600_cs_packet_parse_vline.vline_status +ffffffff83375000 d r100_asic +ffffffff833752e0 d r200_asic +ffffffff833755c0 d r300_asic_pcie +ffffffff833758a0 d r300_asic +ffffffff83375b80 d r420_asic +ffffffff83375e60 d rs400_asic +ffffffff83376140 d rs600_asic +ffffffff83376420 d rs690_asic +ffffffff83376700 d rv515_asic +ffffffff833769e0 d r520_asic +ffffffff83376cc0 d r600_asic +ffffffff83376fa0 d rv6xx_asic +ffffffff83377280 d rs780_asic +ffffffff83377560 d rv770_asic +ffffffff83377840 d evergreen_asic +ffffffff83377b20 d sumo_asic +ffffffff83377e00 d btc_asic +ffffffff833780e0 d cayman_asic +ffffffff833783c0 d trinity_asic +ffffffff833786a0 d si_asic +ffffffff83378980 d ci_asic +ffffffff83378c60 d kv_asic +ffffffff83379000 d dce6_funcs +ffffffff83379018 d dce6_hdmi_funcs +ffffffff83379088 d dce6_dp_funcs +ffffffff833790f8 d dce4_funcs +ffffffff83379110 d dce4_hdmi_funcs +ffffffff83379180 d dce4_dp_funcs +ffffffff833791f0 d dce32_funcs +ffffffff83379208 d dce32_hdmi_funcs +ffffffff83379278 d dce32_dp_funcs +ffffffff833792e8 d r600_funcs +ffffffff83379300 d r600_hdmi_funcs +ffffffff8337a000 D radeon_modeset +ffffffff8337a004 D radeon_dynclks +ffffffff8337a008 D radeon_agpmode +ffffffff8337a00c D radeon_gart_size +ffffffff8337a010 D radeon_tv +ffffffff8337a014 D radeon_audio +ffffffff8337a018 D radeon_pcie_gen2 +ffffffff8337a01c D radeon_msi +ffffffff8337a020 D radeon_lockup_timeout +ffffffff8337a024 D radeon_dpm +ffffffff8337a028 D radeon_aspm +ffffffff8337a02c D radeon_runtime_pm +ffffffff8337a030 D radeon_vm_size +ffffffff8337a034 D radeon_vm_block_size +ffffffff8337a038 D radeon_use_pflipirq +ffffffff8337a03c D radeon_bapm +ffffffff8337a040 D radeon_backlight +ffffffff8337a044 D radeon_auxch +ffffffff8337a048 D radeon_uvd +ffffffff8337a04c D radeon_vce +ffffffff8337a050 D radeon_si_support +ffffffff8337a054 D radeon_cik_support +ffffffff8337a058 D radeondrm_cd +ffffffff8337a078 D radeondrm_stdscreen +ffffffff8337a0a8 D radeondrm_scrlist +ffffffff8337a0b0 D radeondrm_screenlist +ffffffff8337a0c0 D radeondrm_accessops +ffffffff8337b000 D radeon_bbops +ffffffff8337c000 d radeon_bo_driver +ffffffff8337d000 d verde_pg_init +ffffffff8337e000 d cac_weights_pitcairn +ffffffff8337e4d0 d cac_weights_oland +ffffffff8337f000 d aldebaran_mode2_handler +ffffffff83380000 d amdgpu_vbios_version_attrs +ffffffff83381000 D amdgpu_asic_name +ffffffff83382000 D amdgpu_vram_limit +ffffffff83382004 D amdgpu_gart_size +ffffffff83382008 D amdgpu_gtt_size +ffffffff8338200c D amdgpu_moverate +ffffffff83382010 D amdgpu_audio +ffffffff83382014 D amdgpu_pcie_gen2 +ffffffff83382018 D amdgpu_msi +ffffffff8338201c D amdgpu_dpm +ffffffff83382020 D amdgpu_fw_load_type +ffffffff83382024 D amdgpu_aspm +ffffffff83382028 D amdgpu_runtime_pm +ffffffff8338202c D amdgpu_ip_block_mask +ffffffff83382030 D amdgpu_bapm +ffffffff83382034 D amdgpu_vm_size +ffffffff83382038 D amdgpu_vm_fragment_size +ffffffff8338203c D amdgpu_vm_block_size +ffffffff83382040 D amdgpu_vm_update_mode +ffffffff83382044 D amdgpu_dc +ffffffff83382048 D amdgpu_sched_jobs +ffffffff8338204c D amdgpu_sched_hw_submission +ffffffff83382050 D amdgpu_cg_mask +ffffffff83382058 D amdgpu_pg_mask +ffffffff8338205c D amdgpu_sdma_phase_quantum +ffffffff83382060 D amdgpu_pp_feature_mask +ffffffff83382064 D amdgpu_lbpw +ffffffff83382068 D amdgpu_compute_multipipe +ffffffff8338206c D amdgpu_gpu_recovery +ffffffff83382070 D amdgpu_smu_pptable_id +ffffffff83382074 D amdgpu_dc_feature_mask +ffffffff83382078 D amdgpu_async_gfx_ring +ffffffff8338207c D amdgpu_mcbp +ffffffff83382080 D amdgpu_discovery +ffffffff83382084 D amdgpu_noretry +ffffffff83382088 D amdgpu_force_asic_type +ffffffff8338208c D amdgpu_tmz +ffffffff83382090 D amdgpu_reset_method +ffffffff83382094 D amdgpu_num_kcq +ffffffff83382098 D amdgpu_use_xgmi_p2p +ffffffff8338209c D amdgpu_sg_display +ffffffff833820a0 D amdgpu_user_partt_mode +ffffffff833820a8 D mgpu_info +ffffffff83382558 D amdgpu_ras_enable +ffffffff8338255c D amdgpu_ras_mask +ffffffff83382560 D amdgpu_bad_page_threshold +ffffffff83382564 D amdgpu_backlight +ffffffff83382568 D amdgpu_cd +ffffffff83382588 D amdgpu_stdscreen +ffffffff833825b8 D amdgpu_scrlist +ffffffff833825c0 D amdgpu_screenlist +ffffffff833825d0 D amdgpu_accessops +ffffffff83383000 d amdgpu_gtt_mgr_attributes +ffffffff83384000 D amdgpu_bbops +ffffffff83385000 D soc15_ih_clientid_name +ffffffff83386000 D ras_error_string +ffffffff83386030 D ras_block_string +ffffffff833860c0 D ras_mca_block_string +ffffffff83387000 d amdgpu_bo_driver +ffffffff83388000 d amdgpu_vram_mgr_attributes +ffffffff83389000 d xgmi_mutex +ffffffff83389010 D xgmi_ras_hw_ops +ffffffff83389050 D xgmi_ras +ffffffff8338a000 D aqua_vanjaram_xcp_funcs +ffffffff8338b000 D gfx_v11_0_3_ras +ffffffff8338c000 d gfx_v9_0_ras +ffffffff8338d000 D gfx_v9_4_ras +ffffffff8338e000 D gfx_v9_4_2_ras_ops +ffffffff8338e040 D gfx_v9_4_2_ras +ffffffff8338f000 D gfx_v9_4_3_xcp_funcs +ffffffff8338f020 D gfx_v9_4_3_ras_ops +ffffffff8338f060 D gfx_v9_4_3_ras +ffffffff83390000 D gfxhub_v1_2_xcp_funcs +ffffffff83391000 D hdp_v4_0_ras_hw_ops +ffffffff83391040 D hdp_v4_0_ras +ffffffff83392000 d jpeg_v2_6_ras +ffffffff83393000 d jpeg_v4_0_ras +ffffffff83394000 d jpeg_v4_0_3_ras +ffffffff83395000 D mca_v3_0_mp0_ras +ffffffff83395058 D mca_v3_0_mp1_ras +ffffffff833950b0 D mca_v3_0_mpio_ras +ffffffff83396000 D mmhub_v1_0_ras_hw_ops +ffffffff83396040 D mmhub_v1_0_ras +ffffffff83397000 D mmhub_v1_7_ras_hw_ops +ffffffff83397040 D mmhub_v1_7_ras +ffffffff83398000 D mmhub_v1_8_ras +ffffffff83399000 D mmhub_v9_4_ras +ffffffff8339a000 D nbio_v4_3_ras +ffffffff8339b000 D nbio_v7_4_ras +ffffffff8339c000 D nbio_v7_9_ras +ffffffff8339d000 d sriov_sc_video_codecs_encode +ffffffff8339d010 d sriov_sc_video_codecs_decode_vcn1 +ffffffff8339d020 d sriov_sc_video_codecs_decode_vcn0 +ffffffff8339d030 d sriov_sc_video_codecs_encode_array +ffffffff8339d060 d sriov_sc_video_codecs_decode_array_vcn1 +ffffffff8339d0f0 d sriov_sc_video_codecs_decode_array_vcn0 +ffffffff8339e000 d sdma_v4_0_ras +ffffffff8339f000 D sdma_v4_4_ras +ffffffff833a0000 D sdma_v4_4_2_xcp_funcs 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amdgpu_dm_mode_config_helperfuncs +ffffffff833ac010 d dm_atomic_state_funcs +ffffffff833ad000 d construct_integrated_info.result +ffffffff833ad004 d bios_parser_get_firmware_info.result +ffffffff833ae000 d dce_funcs +ffffffff833af000 d dce110_funcs +ffffffff833b0000 d dce112_funcs +ffffffff833b1000 d dce120_funcs +ffffffff833b2000 d rv1_clk_funcs +ffffffff833b2090 d rv1_clk_internal_funcs +ffffffff833b3000 d rv2_clk_internal_funcs +ffffffff833b4000 d dcn2_funcs +ffffffff833b5000 d dcn201_funcs +ffffffff833b6000 d dcn21_funcs +ffffffff833b6090 d rn_bw_params +ffffffff833b7000 D dcn3_fpga_funcs +ffffffff833b7090 d dcn3_funcs +ffffffff833b8000 d vg_funcs +ffffffff833b8090 d dummy_clocks +ffffffff833b81c0 d vg_bw_params +ffffffff833b9000 d dcn31_funcs +ffffffff833b9090 d dcn31_bw_params +ffffffff833ba000 d dcn314_funcs +ffffffff833ba090 d dcn314_bw_params +ffffffff833bb000 d dcn315_funcs +ffffffff833bb090 d dcn315_bw_params +ffffffff833bc000 d dcn316_funcs +ffffffff833bc090 d dcn316_bw_params +ffffffff833bd000 d dcn32_funcs +ffffffff833be000 d dcn10_dpp_cap +ffffffff833bf000 d dcn20_dpp_funcs +ffffffff833bf110 d dcn20_dpp_cap +ffffffff833c0000 d dcn20_hubp_funcs +ffffffff833c1000 d dcn20_opp_funcs +ffffffff833c2000 d dcn20_tg_funcs +ffffffff833c3000 d dcn201_dpp_funcs +ffffffff833c3110 d dcn201_dpp_cap +ffffffff833c4000 d dcn201_hubp_funcs +ffffffff833c5000 d dcn201_opp_funcs +ffffffff833c6000 d dcn201_tg_funcs +ffffffff833c7000 d dcn201_res_pool_funcs +ffffffff833c70f8 d dcn201_ip +ffffffff833c72b0 d dcn201_soc +ffffffff833c9000 d dcn21_hubp_funcs +ffffffff833ca000 d dcn30_afmt_funcs +ffffffff833cb000 d dcn30_dpp_funcs +ffffffff833cb110 d dcn30_dpp_cap +ffffffff833cc000 d dcn30_hubp_funcs +ffffffff833cd000 d dcn30_tg_funcs +ffffffff833ce000 d dcn30_vpg_funcs +ffffffff833cf000 d dcn30_tg_funcs +ffffffff833d0000 d res_cap_dcn301 +ffffffff833d0040 d dcn301_res_pool_funcs +ffffffff833d1000 d dcn302_res_pool_funcs +ffffffff833d2000 d dcn303_res_pool_funcs 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dcn2_1_soc +ffffffff833eb208 D ddr4_wm_table_gs +ffffffff833eb2c8 D lpddr4_wm_table_gs +ffffffff833eb388 D lpddr4_wm_table_with_disabled_ppt +ffffffff833eb448 D ddr4_wm_table_rn +ffffffff833eb508 D ddr4_1R_wm_table_rn +ffffffff833eb5c8 D lpddr4_wm_table_rn +ffffffff833ec000 D dcn3_0_ip +ffffffff833ec1b8 D dcn3_0_soc +ffffffff833ee000 D dcn3_01_ip +ffffffff833ee1b8 D dcn3_01_soc +ffffffff833ef4f0 D ddr4_wm_table +ffffffff833ef5b0 D lpddr5_wm_table +ffffffff833f0000 D dcn3_02_ip +ffffffff833f01b8 D dcn3_02_soc +ffffffff833f2000 D dcn3_03_ip +ffffffff833f21b8 D dcn3_03_soc +ffffffff833f4000 D dcn3_1_ip +ffffffff833f41b8 D dcn3_15_ip +ffffffff833f4370 D dcn3_16_ip +ffffffff833f4528 d dcn3_15_soc +ffffffff833f5860 d dcn3_1_soc +ffffffff833f6b98 d dcn3_16_soc +ffffffff833f8000 D dcn3_14_ip +ffffffff833f81b8 d dcn3_14_soc +ffffffff833fa000 D dcn3_2_ip +ffffffff833fa1b8 D dcn3_2_soc +ffffffff833fc000 D dcn3_21_ip +ffffffff833fc1b8 D dcn3_21_soc +ffffffff833fe000 d dsc_policy_max_target_bpp_limit +ffffffff833ff000 D DIDTEDCConfig_P12 +ffffffff833ff070 d smu7_profiling +ffffffff83400000 d cyan_skillfish_table_map +ffffffff83400080 d cyan_skillfish_message_map +ffffffff83401000 d navi10_table_map +ffffffff83401080 d navi10_pwr_src_map +ffffffff83401090 d navi10_workload_map +ffffffff834010e0 d navi10_message_map +ffffffff83401b60 d navi10_clk_map +ffffffff83401c20 d navi10_feature_mask_map +ffffffff83402000 d sienna_cichlid_table_map +ffffffff83402080 d sienna_cichlid_pwr_src_map +ffffffff83402090 d sienna_cichlid_workload_map +ffffffff834020e0 d sienna_cichlid_message_map +ffffffff83402b60 d sienna_cichlid_clk_map +ffffffff83402c20 d sienna_cichlid_feature_mask_map +ffffffff83403000 d vangogh_message_map +ffffffff83403a80 d vangogh_table_map +ffffffff83403b00 d vangogh_workload_map +ffffffff83403b50 d vangogh_feature_mask_map +ffffffff83404000 d renoir_table_map +ffffffff83404080 d renoir_workload_map +ffffffff834040d0 d renoir_message_map +ffffffff83404b50 d renoir_clk_map +ffffffff83405000 d smu_v13_0_0_message_map +ffffffff83405a80 d smu_v13_0_0_feature_mask_map +ffffffff83405e50 d smu_v13_0_0_table_map +ffffffff83405ed0 d smu_v13_0_0_pwr_src_map +ffffffff83405ee0 d smu_v13_0_0_workload_map +ffffffff83405f30 d smu_v13_0_0_clk_map +ffffffff83406000 d smu_v13_0_4_table_map +ffffffff83406080 d smu_v13_0_4_message_map +ffffffff83406b00 d smu_v13_0_4_feature_mask_map +ffffffff83407000 d smu_v13_0_5_table_map +ffffffff83407080 d smu_v13_0_5_message_map +ffffffff83407b00 d smu_v13_0_5_feature_mask_map +ffffffff83408000 d smu_v13_0_7_message_map +ffffffff83408a80 d smu_v13_0_7_feature_mask_map +ffffffff83408e50 d smu_v13_0_7_table_map +ffffffff83408ed0 d smu_v13_0_7_pwr_src_map +ffffffff83408ee0 d smu_v13_0_7_workload_map +ffffffff83408f30 d smu_v13_0_7_clk_map +ffffffff83409000 d yellow_carp_table_map +ffffffff83409080 d yellow_carp_message_map +ffffffff83409b00 d yellow_carp_feature_mask_map +ffffffff8340a000 D pci_conf_lock +ffffffff8340a010 D pci_bus_dma_tag +ffffffff8340a088 D msi_pic +ffffffff8340a120 D msix_pic +ffffffff8340b000 D pchb_cd +ffffffff8340c000 D amas_cd +ffffffff8340d000 D cardslot_cd +ffffffff8340e000 D cardbus_cd +ffffffff8340f000 d csdevs +ffffffff83410000 d ral_rt2560_opns +ffffffff83410028 d ral_rt2661_opns +ffffffff83410050 d ral_rt2860_opns +ffffffff83411000 D pcmcia_cd +ffffffff83412000 D pcmcia_3cxem556_func0 +ffffffff834120b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff83412158 D pcmcia_megahertz_xjem1144_func0 +ffffffff83412210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff834122b0 d pcmcia_3cxem556_func1 +ffffffff83412368 d pcmcia_3cxem556_func1_cfe0 +ffffffff83412408 d pcmcia_megahertz_xjem1144_func1 +ffffffff834124c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff83412560 d pcmcia_sierra_a555_func1 +ffffffff83412618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff834126b8 d pcmcia_sveclancard_func0 +ffffffff83412770 d pcmcia_sveclancard_func0_cfe0 +ffffffff83413000 D ep_pcmcia_prod +ffffffff83414000 D aic_pcmcia_prod +ffffffff83415000 D com_pcmcia_prod +ffffffff83416000 D wdc_pcmcia_pr +ffffffff83417000 D sm_pcmcia_prod +ffffffff83418000 D xe_cd +ffffffff83419000 D pcib_cd +ffffffff8341a000 D amdpcib_cd +ffffffff8341b000 D tcpcib_cd +ffffffff8341c000 D aapic_cd +ffffffff8341d000 D hme_cd +ffffffff8341e000 D isa_cd +ffffffff8341f000 D isadma_cd +ffffffff83420000 D fdc_cd +ffffffff83421000 D fd_types +ffffffff834211f8 D fd_cd +ffffffff83422000 D mpu_cd +ffffffff83423000 D pcppi_cd +ffffffff83424000 D spkr_cd +ffffffff83425000 D wbsio_cd +ffffffff83426000 D schsio_cd +ffffffff83427000 D it_cd +ffffffff83428000 D uguru_cd +ffffffff83429000 D aps_cd +ffffffff8342a000 D isa_bus_dma_tag +ffffffff8342b000 D wsdisplay_cd +ffffffff8342b020 D wsdisplay_cons +ffffffff8342b058 D wsdisplay_defaultscreens +ffffffff8342c000 D wskbd_cd +ffffffff8342c020 D wskbd_default_bell_data +ffffffff8342c030 D wskbd_default_keyrepeat_data +ffffffff8342c040 D wskbd_srcops +ffffffff8342d000 d compose_tab +ffffffff8342e000 D wsmouse_cd +ffffffff8342e020 D wsmouse_srcops +ffffffff8342f000 D wsmux_srcops +ffffffff8342f030 D wsmux_tree_lock +ffffffff83430000 D vt100_output +ffffffff83431000 D pckbd_cd +ffffffff83432000 D pms_cd +ffffffff83432020 d synaptics_params +ffffffff83432030 d alps_params +ffffffff83433000 D skgpio_cd +ffffffff83434000 D pctr_conf_lock +ffffffff83435000 D ukbd_keymapdata +ffffffff83436000 D usbrev_str +ffffffff83436030 D usb_cd +ffffffff83437000 d usbd_ratecheck.errinterval +ffffffff83438000 D uhub_cd +ffffffff83439000 D uaudio_cd +ffffffff8343a000 D uvideo_ctrls +ffffffff8343a2d8 D uvideo_cd +ffffffff8343b000 D utvfu_norm_params +ffffffff8343b030 D utvfu_cd +ffffffff8343c000 D udl_reg_vals_640x480_60 +ffffffff8343c020 D udl_reg_vals_640x480_67 +ffffffff8343c040 D udl_reg_vals_640x480_72 +ffffffff8343c060 D udl_reg_vals_640x480_75 +ffffffff8343c080 D udl_reg_vals_800x480_61 +ffffffff8343c0a0 D udl_reg_vals_800x600_56 +ffffffff8343c0c0 D udl_reg_vals_800x600_60 +ffffffff8343c0e0 D udl_reg_vals_800x600_72 +ffffffff8343c100 D udl_reg_vals_800x600_74 +ffffffff8343c120 D udl_reg_vals_800x600_75 +ffffffff8343c140 D udl_reg_vals_1024x768_60 +ffffffff8343c160 D udl_reg_vals_1024x768_70 +ffffffff8343c180 D udl_reg_vals_1024x768_75 +ffffffff8343c1a0 D udl_reg_vals_1280x800_60 +ffffffff8343c1c0 D udl_reg_vals_1280x960_60 +ffffffff8343c1e0 D udl_reg_vals_1280x1024_60 +ffffffff8343c200 D udl_reg_vals_1280x1024_75 +ffffffff8343c220 D udl_reg_vals_1366x768_60 +ffffffff8343c240 D udl_reg_vals_1440x900_60 +ffffffff8343c260 D udl_reg_vals_1440x900_59 +ffffffff8343c280 D udl_reg_vals_1440x900_75 +ffffffff8343c2a0 D udl_reg_vals_1680x1050_60 +ffffffff8343c2c0 D udl_reg_vals_1600x1200_60 +ffffffff8343c2e0 D udl_reg_vals_1920x1080_60 +ffffffff8343c300 D udl_null_key_1 +ffffffff8343c310 D udl_decomp_table +ffffffff8343d510 D udl_cd +ffffffff8343d530 D udl_stdscreen +ffffffff8343d560 D udl_scrlist +ffffffff8343d568 D udl_screenlist +ffffffff8343d578 D udl_accessops +ffffffff8343e000 D umidi_cd +ffffffff8343f000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff8343f020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff8343f040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff8343f060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff8343f080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff8343f0a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff8343f0c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff8343f0e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff8343f100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff8343f120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff8343f140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff8343f160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff8343f180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff8343f1a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff8343f1c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff8343f1e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff8343f200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff8343f220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff8343f240 D umidi_quirklist +ffffffff8343f4a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff8343f4c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff8343f4d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff8343f4f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff8343f500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff8343f520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff8343f530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff8343f550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff8343f560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff8343f580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff8343f590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff8343f5b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff8343f5c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff8343f5e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff8343f5f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff8343f610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff8343f620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff8343f640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff8343f650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff8343f670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff8343f680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff8343f6a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff8343f6b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff8343f6d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff8343f6e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff8343f700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff8343f710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff8343f730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff8343f740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff8343f760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff8343f770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff8343f790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff8343f7a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff8343f7c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff8343f7d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff8343f7f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff83440000 D ucom_cd +ffffffff83440020 D sysctl_ucomlock +ffffffff83441000 D ugen_cd +ffffffff83442000 D uhidev_cd +ffffffff83442020 d uhidev_use_rdesc.reportbuf +ffffffff83443000 D uhid_cd +ffffffff83444000 D fido_cd +ffffffff83445000 D ujoy_cd +ffffffff83446000 D ukbd_cd +ffffffff83447000 D ums_cd +ffffffff83447020 d ums_fix_elecom_descriptor.match +ffffffff83448000 D umt_cd +ffffffff83449000 D def_scale +ffffffff83449020 D uts_cd +ffffffff8344a000 D ubcmtp_cd +ffffffff8344a020 d ubcmtp_wsmousecfg +ffffffff8344b000 D ucycom_cd +ffffffff8344c000 D uslhcom_cd +ffffffff8344d000 D ulpt_fwdevs +ffffffff8344d060 D ulpt_cd +ffffffff8344d080 D ulptusein +ffffffff8344e000 D umass_cd +ffffffff8344e020 d umass_bbb_transfer.dCBWtag +ffffffff8344f000 D uthum_cd +ffffffff83450000 D ugold_cd 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wdc_xfer_iopool +ffffffff834fa000 B aic_debug +ffffffff834fb000 B gdt_cnt +ffffffff834fb004 B gdt_polling +ffffffff834fb005 B gdt_from_wait +ffffffff834fb008 b gdt_exec_ccb.__level +ffffffff834fb00c B gdt_wait_index +ffffffff834fb010 B gdt_wait_gdt +ffffffff834fc000 B sili_error_pmp_ports +ffffffff834fd000 B ncr53c9x_debug +ffffffff834fd008 b ecb_iopool +ffffffff834fd048 b ecb_pool_initialized +ffffffff834fd050 b ecb_pool +ffffffff834fd1f8 B sdebug +ffffffff834fe000 B epic_copy_small +ffffffff834ff000 B comconsaddr +ffffffff834ff008 B comconsiot +ffffffff834ff010 B comconsioh +ffffffff834ff018 B comconsfreq +ffffffff834ff01c B comcons_reg_width +ffffffff834ff020 B commajor +ffffffff834ff024 B comconsunit +ffffffff834ff028 B comcons_reg_shift +ffffffff834ff02c B comconsattached +ffffffff83500000 B pckbc_console +ffffffff83500004 B pckbc_console_attached +ffffffff83500008 B pckbc_consdata +ffffffff835000e0 b pckbc_cons_slotdata +ffffffff83501000 b cy_poll.counter +ffffffff83502000 B atw_xindiv2 +ffffffff83503000 B rtw_rfprog_fallback +ffffffff83503004 B rtw_do_chip_reset +ffffffff83504000 b malo_cmd_string.cmd_buf +ffffffff83505000 b iosf_mbi +ffffffff83506000 B uhcixfer +ffffffff83507000 B ohcixfer +ffffffff83507008 b ohci_intr.ohci_intr_tv +ffffffff83508000 B ehcixfer +ffffffff83509000 B xhcixfer +ffffffff8350a000 B ipmi_enabled +ffffffff8350a008 B ipmi_sensor_list +ffffffff8350b000 B mpath +ffffffff8350c000 B sr_bootuuid +ffffffff8350c010 B sr_bootkey +ffffffff8350c030 B softraid0 +ffffffff8350c038 B sr_hotplug_callbacks +ffffffff8350d000 B gf_pow +ffffffff8350d300 B gf_map +ffffffff8350db00 B gf_log +ffffffff8350e000 b ksym_syms +ffffffff8350e008 b ksym_syms_size +ffffffff8350f000 B kstat_version +ffffffff8350f008 B kstat_id_tree +ffffffff8350f010 B kstat_pv_tree +ffffffff8350f018 B kstat_nm_tree +ffffffff8350f020 b kstat_init.initialized +ffffffff8350f028 B kstat_pool +ffffffff83510000 B stat_fbufs_in +ffffffff83510004 B stat_fbufs_wait +ffffffff83510008 B stat_opened_fusedev +ffffffff83510010 B fuse_d_list +ffffffff83511000 B fusefs_fbuf_pool +ffffffff83512000 B pf_state_pl +ffffffff835121a8 B pf_src_tree_pl +ffffffff83512350 B pf_pktdelay_pl +ffffffff835124f8 B pf_status +ffffffff835126e0 B tree_id +ffffffff835126e8 B tree_src_tracking +ffffffff835126f0 B pf_sn_item_pl +ffffffff83512898 B pf_statetbl +ffffffff835128a0 B pf_state_item_pl +ffffffff83512a48 B pf_state_key_pl +ffffffff83512bf0 B pf_purge_states_limit +ffffffff83512bf8 B pf_rule_item_pl +ffffffff83512da0 b pf_purge_expired_states.cur +ffffffff83512da8 B pf_tcp_secret_init +ffffffff83512db0 B pf_tcp_secret +ffffffff83512dc0 B pf_tcp_secret_ctx +ffffffff83512e90 B pf_tcp_iss_off +ffffffff83512ea0 B pf_queues +ffffffff83512ec0 B pf_queues_active +ffffffff83512ec8 B pf_queues_inactive +ffffffff83512ed0 B pf_rule_pl +ffffffff83513078 B pf_queue_pl +ffffffff83514000 B pf_frent_pl +ffffffff835141a8 B pf_frnode_pl +ffffffff83514350 B pf_frag_pl +ffffffff835144f8 B pf_state_scrub_pl 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db_break_table +ffffffff83527c80 B db_free_breakpoints +ffffffff83527c88 B db_breakpoint_list +ffffffff83528000 B db_next +ffffffff83528008 B db_dot +ffffffff83528010 B db_last_addr +ffffffff83528018 B db_prev +ffffffff83528020 B db_last_command +ffffffff83528028 B db_cmd_loop_done +ffffffff83528030 B db_recover +ffffffff83529000 B db_ctf +ffffffff8352a000 B db_symtab +ffffffff8352a020 b db_elf_line_at_pc.path +ffffffff8352a420 b db_elf_sym_forall.suffix +ffffffff8352b000 B db_plays +ffffffff8352b008 B db_guesses +ffffffff8352c000 B db_history +ffffffff8352cfa0 B db_history_prev +ffffffff8352cfa8 B db_lc +ffffffff8352cfb0 B db_le +ffffffff8352cfb8 B db_lbuf_start +ffffffff8352cfc0 B db_lbuf_end +ffffffff8352d000 B db_line +ffffffff8352d078 B db_lp +ffffffff8352d080 B db_endlp +ffffffff8352d088 B db_look_char +ffffffff8352d08c B db_look_token +ffffffff8352d090 B db_tok_number +ffffffff8352d0a0 B db_tok_string +ffffffff8352e000 B db_output_position +ffffffff8352e004 B db_output_line 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B pcimem_ex +ffffffff8381a870 B pcibus_ex +ffffffff8381b000 b ddb_vgapostp +ffffffff8381c000 B cardsloteventpool +ffffffff8381d000 B rbus_null +ffffffff8381e000 B pcmcia_verbose +ffffffff8381f000 B isa_mem_head +ffffffff8381f008 B isa_dev +ffffffff8381f010 B isadma_dmam +ffffffff83820000 b spkr_attached +ffffffff83820008 b ppicookie +ffffffff83820010 b spkr_active +ffffffff83820018 b spkr_inbuf +ffffffff83820020 b octave +ffffffff83820024 b whole +ffffffff83820028 b fill +ffffffff8382002c b value +ffffffff83820030 b octtrack +ffffffff83820034 b octprefix +ffffffff83821000 B it_softc_list +ffffffff83822000 B aps_timeout +ffffffff83823000 B intrtype +ffffffff83823040 B intrhand +ffffffff838230c0 B isa_dma_stats_loads +ffffffff838230c8 B isa_dma_stats_bounces +ffffffff838230d0 B isa_dma_stats_nbouncebufs +ffffffff838230e0 B intrlevel +ffffffff83824000 B wsdisplay_console_conf +ffffffff83824028 B wsdisplay_console_initted +ffffffff83824030 B wsdisplay_console_device +ffffffff83824038 B wsdisplay_clearonclose +ffffffff8382403c B wsdisplay_cons_pollmode +ffffffff83824040 B wsdisplay_cons_kbd_pollc +ffffffff83824048 B ws_get_param +ffffffff83824050 B ws_set_param +ffffffff83825000 b wskbd_console_data +ffffffff83825040 b wskbd_console_initted +ffffffff83825048 b wskbd_console_device +ffffffff83825050 B wskbd_get_backlight +ffffffff83825058 B wskbd_set_backlight +ffffffff83825060 b wskbd_cngetc.num +ffffffff83825064 b wskbd_cngetc.pos +ffffffff83826000 b compose_tab_inorder +ffffffff83827000 B nwsmux +ffffffff83827008 B wsmuxdevs +ffffffff83828000 B wsemul_vt100_console_emuldata +ffffffff83829000 B pckbd_consdata +ffffffff83829038 B pckbd_bell_fn +ffffffff83829040 B pckbd_bell_fn_arg +ffffffff8382a000 b wscninit.initted +ffffffff8382b000 B pctr_isamd +ffffffff8382b004 B pctr_isintel +ffffffff8382b008 B pctr_intel_cap +ffffffff8382b010 B pctr_fn +ffffffff8382c000 b nvram_initialized +ffffffff8382d000 B hidkbd_is_console +ffffffff8382d008 B hidkbd_bell_fn +ffffffff8382d010 B hidkbd_bell_fn_arg +ffffffff8382e000 B usb_task_thread_proc +ffffffff8382e008 B usb_abort_task_thread_proc +ffffffff8382e010 b usb_nbuses +ffffffff8382e018 B usbpalock +ffffffff8382e028 B usb_abort_tasks +ffffffff8382e038 B usb_explore_tasks +ffffffff8382e048 B usb_generic_tasks +ffffffff8382e058 b usb_run_abort_tasks +ffffffff8382e05c b usb_run_tasks +ffffffff8382e060 B explore_pending +ffffffff8382f000 B usb_blk_freelist +ffffffff8382f008 B usb_blk_nfree +ffffffff8382f010 B usb_frag_freelist +ffffffff83830000 b usbd_errstr.buffer +ffffffff83830008 b usb_delay_ms.usb_delay_wchan +ffffffff83830010 b usbd_probe_and_attach.cookie +ffffffff83831000 b ucom_change +ffffffff83831008 b sysctl_ucominit.ucoms +ffffffff83831010 b sysctl_ucominit.ucomslen +ffffffff83832000 b t_wait +ffffffff83832004 b t_trust +ffffffff83833000 B umb_session_id +ffffffff83833010 b umb_val2descr.sval +ffffffff83834000 b probe_ic +ffffffff83834008 b probe_addr +ffffffff83834010 b probe_val +ffffffff83834110 B skip_fc +ffffffff83834118 B ignore_addrs +ffffffff83834120 b iic_dump.iicvalcnt +ffffffff83835000 B acpi_softc +ffffffff83835008 B acpiwqpool +ffffffff838351b0 B acpi_enabled +ffffffff838351b4 b acpi_maptable.tblid +ffffffff838351b8 b acpi_add_device.nacpicpus +ffffffff838351bc B acpi_force_bm +ffffffff838351c0 B mouse_has_softbtn +ffffffff838351c4 B acpi_evindex +ffffffff838351c8 B acpi_poll_enabled +ffffffff838351cc B acpi_hasprocfvs +ffffffff838351d0 B acpi_haspci +ffffffff83836000 B aml_root +ffffffff83836060 B aml_lastscope +ffffffff83836068 B aml_ophash +ffffffff83836070 b aml_mnem.mnemstr +ffffffff83836090 B aml_notify_list +ffffffff83836098 B acpi_nalloc +ffffffff838360a0 b acpi_sleep.acpinowait +ffffffff838360b0 b aml_nodename.namebuf +ffffffff83836130 b aml_getname.namebuf +ffffffff838361b0 b aml_getname.p +ffffffff838361b8 b global_lock_count +ffffffff838361c0 b aml_eisaid.id +ffffffff838361c8 B aml_global_lock +ffffffff838361d0 b aml_mapresource.map +ffffffff83836210 b aml_val_to_string.buffer +ffffffff83836310 B aml_error +ffffffff83836314 B odp +ffffffff83836318 B maxdp +ffffffff8383631c B aml_busy +ffffffff83837000 B scope +ffffffff83838000 B acpibtn_lids +ffffffff83839000 B cst_stats +ffffffff8383a000 B acpihpet_attached +ffffffff8383b000 b acpiec_wait.acpiecnowait +ffffffff8383c000 B acpitz_cpu_setperf +ffffffff8383d000 B acpimadt_busses +ffffffff83840000 B acpimadt_isa_bus +ffffffff83840030 b lapic_map +ffffffff83841000 B acpidmar_ddb +ffffffff83841010 b dmar_bdf.bdf +ffffffff83841030 B acpidmar_sc +ffffffff83841038 B domain_map_page +ffffffff83841040 b dom_bdf.mmm +ffffffff83841070 b iommu_init.niommu +ffffffff83841078 b acpidmar_pci_attach.dom +ffffffff83841080 b sid_flag +ffffffff83881080 b ivhd_showpage.show +ffffffff83881084 b ivhd_iommu_init.niommu +ffffffff83881088 b acpidmar_intr.ofe.0 +ffffffff83881090 b acpidmar_intr.ofe.1 +ffffffff83882000 b dwiic_i2c_intr_string.irqstr +ffffffff83883000 B acpihve_attached +ffffffff83884000 B efi_jmpbuf +ffffffff83885000 B vm_pool +ffffffff838851a8 B vcpu_pool +ffffffff83885350 B vmm_softc +ffffffff83886000 B l1tf_flush_region +ffffffff83887000 B sdmmc_verbose +ffffffff83888000 B utc_offset +ffffffff83888008 B bufpages +ffffffff83888010 B utsname +ffffffff83889000 B mountroot +ffffffff8388a000 B __kernel_bss_end ffffffff83a00000 B _end ffffffff83a00000 B end