--- 7.4/2024-02-01T07:17:04Z/2024-01-28T00:00:00Z/nm-bsd-ot14.txt Sun Feb 4 18:23:12 2024 +++ 7.4/2024-02-01T07:17:04Z/2024-01-29T00:00:00Z/nm-bsd-ot14.txt Sun Feb 4 21:08:37 2024 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -025f9000 T __kernel_kutext_phys -025fd000 C __kernel_cptext_phys -025fe000 C __kernel_rodata_phys -02ef0000 R __kernel_kutext_page_phys -02ef2000 C __kernel_randomdata_phys -031af000 R __kernel_data_phys -03505000 D __kernel_kudata_phys -03506000 C __kernel_bss_phys +025f8000 T __kernel_kutext_phys +025fc000 C __kernel_cptext_phys +025fd000 C __kernel_rodata_phys +02eef000 R __kernel_kutext_page_phys +02ef1000 C __kernel_randomdata_phys +031ae000 R __kernel_data_phys +03504000 D __kernel_kudata_phys +03505000 C __kernel_bss_phys 03a00000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -15174,15883 +15174,15894 @@ ffffffff817606e0 T em_stop ffffffff817607d0 T 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-ffffffff81fd2660 t enable_crtc_mem_req_v1 -ffffffff81fd2700 t program_clock_v5 -ffffffff81fd2810 t program_clock_v6 -ffffffff81fd2930 t external_encoder_control_v3 -ffffffff81fd2ae0 t enable_disp_power_gating_v2_1 -ffffffff81fd2bb0 t set_dce_clock_v2_1 -ffffffff81fd3000 T dal_firmware_parser_init_cmd_tbl -ffffffff81fd33d0 t encoder_control_digx_v1_5 -ffffffff81fd35a0 t encoder_control_fallback -ffffffff81fd3600 t transmitter_control_v1_6 -ffffffff81fd37a0 t transmitter_control_v1_7 -ffffffff81fd3990 t transmitter_control_fallback -ffffffff81fd39f0 t set_pixel_clock_v7 -ffffffff81fd3c40 t set_pixel_clock_fallback -ffffffff81fd3ca0 t set_crtc_using_dtd_timing_v3 -ffffffff81fd3df0 t enable_crtc_v1 -ffffffff81fd3e90 t external_encoder_control_v3 -ffffffff81fd3ec0 t enable_disp_power_gating_v2_1 -ffffffff81fd4010 t enable_disp_power_gating_fallback -ffffffff81fd4070 t set_dce_clock_v2_1 -ffffffff81fd41a0 t get_smu_clock_info_v3_1 -ffffffff81fd4210 t enable_lvtma_control -ffffffff81fd5000 T dal_bios_parser_init_cmd_tbl_helper -ffffffff81fd50a0 T dal_cmd_table_helper_controller_id_to_atom -ffffffff81fd51c0 T dal_cmd_table_helper_transmitter_bp_to_atom -ffffffff81fd5240 T dal_cmd_table_helper_encoder_mode_bp_to_atom -ffffffff81fd52d0 T dal_cmd_table_helper_assign_control_parameter -ffffffff81fd5390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src -ffffffff81fd5470 T dal_cmd_table_helper_encoder_id_to_atom -ffffffff81fd6000 T dal_bios_parser_init_cmd_tbl_helper2 -ffffffff81fd60b0 T dal_cmd_table_helper_controller_id_to_atom2 -ffffffff81fd61c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 -ffffffff81fd6240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 -ffffffff81fd62d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 -ffffffff81fd63b0 T dal_cmd_table_helper_encoder_id_to_atom2 -ffffffff81fd7000 T dal_cmd_tbl_helper_dce110_get_table +ffffffff81760e70 T em_local_timer +ffffffff81760f20 T em_82547_move_tail +ffffffff81760f60 T em_identify_hardware +ffffffff81761070 T em_allocate_pci_resources +ffffffff81761470 T em_allocate_desc_rings +ffffffff81761580 T em_hardware_init +ffffffff81761830 T em_kstat_attach +ffffffff81761980 T em_start +ffffffff81761c70 T em_encap +ffffffff817620d0 T em_82547_move_tail_locked +ffffffff81762300 T em_82547_update_fifo_head +ffffffff81762350 T em_ioctl +ffffffff81762620 T em_init +ffffffff81762990 T em_get_sffpage +ffffffff81762a50 T em_disable_intr +ffffffff81762b50 T em_iff +ffffffff81762e60 T em_initialize_receive_unit +ffffffff817635e0 T em_enable_intr +ffffffff81763740 T em_watchdog +ffffffff817638f0 T em_enable_hw_vlans +ffffffff81763990 T em_setup_transmit_structures +ffffffff81763b90 T em_initialize_transmit_unit +ffffffff817641f0 T em_setup_receive_structures +ffffffff81764330 T em_setup_queues_msix +ffffffff817649a0 T em_intr +ffffffff81764aa0 T em_txeof +ffffffff81764c70 T em_rxeof +ffffffff81765100 T em_rxrefill_locked +ffffffff81765210 T em_media_status +ffffffff81765430 T em_flowstatus +ffffffff81765530 T em_media_change +ffffffff81765690 T em_tx_ctx_setup +ffffffff81765810 T em_transmit_checksum_setup +ffffffff817658f0 T em_fill_descriptors +ffffffff81765970 T em_82547_fifo_workaround +ffffffff817659e0 T em_82547_tx_fifo_reset +ffffffff81765e40 T em_pci_clear_mwi +ffffffff81765e70 T em_pci_set_mwi +ffffffff81765ea0 T em_smartspeed +ffffffff81766090 T em_kstat_read +ffffffff817664d0 T em_flush_desc_rings +ffffffff81766600 T em_free_transmit_structures +ffffffff817667d0 T em_free_receive_structures +ffffffff817669d0 T em_legacy_irq_quirk_spt +ffffffff81766ab0 T em_rxrefill +ffffffff81766af0 T em_allocate_msix +ffffffff81766d00 T em_allocate_legacy +ffffffff81766e20 T em_dma_free +ffffffff81766e90 T em_disable_aspm +ffffffff81766f60 T em_dma_malloc +ffffffff817670f0 T em_allocate_transmit_structures +ffffffff817671e0 T em_get_buf +ffffffff81767340 T em_allocate_receive_structures +ffffffff81767510 T em_rxfill +ffffffff81767640 T em_tbi_adjust_stats +ffffffff81767810 T em_receive_checksum +ffffffff81767880 T em_write_pci_cfg +ffffffff817678f0 T em_read_pci_cfg +ffffffff81767960 T em_read_pcie_cap_reg +ffffffff81767990 T em_flush_tx_ring +ffffffff81767b00 T em_flush_rx_ring +ffffffff81767cc0 T em_queue_intr_msix +ffffffff81767d70 T em_link_intr_msix +ffffffff81767ea0 T em_enable_queue_intr_msix +ffffffff81768000 T em_set_mac_type +ffffffff81768a20 T em_set_sfp_media_type_82575 +ffffffff81768d70 T em_translate_82542_register +ffffffff81768fa0 T em_read_sfp_data_byte +ffffffff81769090 T em_set_media_type +ffffffff81769300 T em_reset_hw +ffffffff81769eb0 T em_disable_pciex_master +ffffffff81769f80 T em_check_phy_reset_block +ffffffff8176a040 T em_gate_hw_phy_config_ich8lan +ffffffff8176a0e0 t em_get_software_flag +ffffffff8176a260 T em_hv_phy_workarounds_ich8lan +ffffffff8176a5f0 T em_lv_phy_workarounds_ich8lan +ffffffff8176a6f0 t em_phy_init_script +ffffffff8176a950 T em_read_eeprom +ffffffff8176afc0 T em_set_eee_i350 +ffffffff8176b0e0 T em_init_hw +ffffffff8176cb20 T em_phy_reset +ffffffff8176cd10 T em_clear_vfta_i350 +ffffffff8176cef0 T em_read_phy_reg +ffffffff8176d0a0 T em_setup_link +ffffffff8176f340 T em_enable_tx_pkt_filtering +ffffffff8176f700 T em_clear_hw_cntrs +ffffffff8176fff0 T em_write_phy_reg +ffffffff81770170 T em_power_up_serdes_link_82575 +ffffffff81770260 T em_copper_link_autoneg +ffffffff81770390 T em_phy_setup_autoneg +ffffffff817704f0 T em_copper_link_postconfig +ffffffff817705c0 T em_config_collision_dist +ffffffff81770650 t em_config_mac_to_phy +ffffffff817707c0 t em_config_fc_after_link_up +ffffffff81770a10 t em_config_dsp_after_link_change +ffffffff817713b0 T em_force_mac_fc +ffffffff81771480 T em_check_for_link +ffffffff81771b00 T em_get_pcs_speed_and_duplex_82575 +ffffffff81771bc0 T em_k1_gig_workaround_hv +ffffffff81771cf0 T em_link_stall_workaround_hv +ffffffff81771dd0 T em_k1_workaround_lv +ffffffff81771e90 T em_k1_workaround_lpt_lp +ffffffff81772150 t em_check_downshift +ffffffff81772200 T em_set_eee_pchlan +ffffffff817722a0 t em_polarity_reversal_workaround +ffffffff817724e0 T em_get_speed_and_duplex +ffffffff81772990 T em_access_phy_wakeup_reg_bm +ffffffff81772af0 t em_write_phy_reg_ex +ffffffff81772d60 t em_read_phy_reg_ex +ffffffff81773210 T em_access_phy_debug_regs_hv +ffffffff817732e0 T em_access_phy_reg_hv +ffffffff81773450 t em_swfw_sync_acquire +ffffffff81773600 t em_swfw_sync_release +ffffffff81773770 T em_sgmii_uses_mdio_82575 +ffffffff817737d0 T em_read_phy_reg_i2c +ffffffff817738b0 T em_write_phy_reg_i2c +ffffffff81773980 T em_phy_hw_reset +ffffffff81773f90 T em_oem_bits_config_pchlan +ffffffff81774100 T em_initialize_M88E1512_phy +ffffffff817742c0 T em_init_eeprom_params +ffffffff817747d0 T em_get_flash_presence_i210 +ffffffff81774830 t em_acquire_eeprom +ffffffff81774a20 t em_read_eeprom_ich8 +ffffffff81774bf0 t em_release_eeprom +ffffffff81774d60 t em_standby_eeprom +ffffffff81774f50 t em_shift_out_ee_bits +ffffffff817750f0 t em_shift_in_ee_bits +ffffffff81775230 T em_validate_eeprom_checksum +ffffffff817753d0 T em_write_eeprom +ffffffff817756f0 T em_update_eeprom_checksum +ffffffff81775810 t em_commit_shadow_ram +ffffffff81775d70 t em_write_eeprom_microwire +ffffffff81775ef0 t em_write_eeprom_spi +ffffffff817760b0 T em_read_part_num +ffffffff81776150 T em_read_mac_addr +ffffffff817762d0 T em_mc_addr_list_update +ffffffff817763e0 T em_hash_mc_addr +ffffffff817764e0 T em_mta_set +ffffffff81776650 T em_rar_set +ffffffff81776780 T em_get_bus_info +ffffffff81776910 T em_check_mng_mode +ffffffff81776990 T em_valid_nvm_bank_detect_ich8lan +ffffffff81776b40 T em_read_eeprom_spt +ffffffff81776e00 t em_release_software_flag +ffffffff81776eb0 T em_read_ich8_data32 +ffffffff81777020 t em_ich8_cycle_init +ffffffff817771c0 t em_ich8_flash_cycle +ffffffff81777310 T em_configure_k1_ich8lan +ffffffff81777530 t em_toggle_lanphypc_pch_lpt +ffffffff81777690 t em_copper_link_ggp_setup +ffffffff81777940 t em_copper_link_82580_setup +ffffffff817779d0 t em_copper_link_rtl8211_setup +ffffffff81777c60 t em_phy_reset_dsp +ffffffff81777ce0 t em_get_hw_eeprom_semaphore +ffffffff81777e50 t em_shift_out_mdi_bits +ffffffff81777fe0 t em_erase_ich8_4k_segment +ffffffff81778220 t em_write_ich8_byte +ffffffff81778390 t em_read_ich8_data +ffffffff81779000 T em_lookup_gcu +ffffffff81779030 T em_attach_miibus +ffffffff81779060 T gcu_miibus_readreg +ffffffff817791d0 T gcu_miibus_writereg +ffffffff81779320 T gcu_miibus_statchg +ffffffff8177a000 T ixgb_probe +ffffffff8177a030 T ixgb_attach +ffffffff8177a470 T ixgb_local_timer +ffffffff8177a520 T ixgb_identify_hardware +ffffffff8177a620 T ixgb_allocate_pci_resources +ffffffff8177a7b0 T ixgb_dma_malloc +ffffffff8177a9b0 T ixgb_hardware_init +ffffffff8177aa70 T ixgb_setup_interface +ffffffff8177aba0 T ixgb_update_stats_counters +ffffffff8177b4a0 T ixgb_update_link_status +ffffffff8177b520 T ixgb_dma_free +ffffffff8177b5d0 T ixgb_free_pci_resources +ffffffff8177b660 T ixgb_start +ffffffff8177b890 T ixgb_encap +ffffffff8177ba80 T ixgb_ioctl +ffffffff8177bd20 T ixgb_init +ffffffff8177c1c0 T ixgb_set_promisc +ffffffff8177c240 T ixgb_stop +ffffffff8177c2c0 T ixgb_disable_intr +ffffffff8177c2f0 T ixgb_set_multi +ffffffff8177c400 T ixgb_enable_intr +ffffffff8177c450 T ixgb_watchdog +ffffffff8177c4e0 T ixgb_enable_hw_vlans +ffffffff8177c530 T ixgb_setup_transmit_structures +ffffffff8177c6a0 T ixgb_initialize_transmit_unit +ffffffff8177c810 T ixgb_setup_receive_structures +ffffffff8177c890 T ixgb_initialize_receive_unit +ffffffff8177cb20 T ixgb_intr +ffffffff8177cd20 T ixgb_rxeof +ffffffff8177d160 T ixgb_txeof +ffffffff8177d340 T ixgb_media_status +ffffffff8177d430 T ixgb_media_change +ffffffff8177d480 T ixgb_free_transmit_structures +ffffffff8177d5b0 T ixgb_free_receive_structures +ffffffff8177d6e0 T ixgb_allocate_transmit_structures +ffffffff8177d760 T ixgb_transmit_checksum_setup +ffffffff8177d860 T ixgb_get_buf +ffffffff8177da10 T ixgb_allocate_receive_structures +ffffffff8177db90 T ixgb_receive_checksum +ffffffff8177dbf0 T ixgb_write_pci_cfg +ffffffff8177e000 T ixgb_validate_eeprom_checksum +ffffffff8177e080 T ixgb_read_eeprom +ffffffff8177e2f0 T ixgb_update_eeprom_checksum +ffffffff8177e350 T ixgb_write_eeprom +ffffffff8177e830 t ixgb_shift_out_bits +ffffffff8177e970 T ixgb_get_eeprom_data +ffffffff8177ea10 T ixgb_get_eeprom_word +ffffffff8177eae0 T ixgb_get_ee_mac_addr +ffffffff8177ebe0 T ixgb_get_ee_pba_number +ffffffff8177eca0 T ixgb_get_ee_device_id +ffffffff8177f000 T ixgb_mac_reset +ffffffff8177f1e0 T ixgb_adapter_stop +ffffffff8177f320 T ixgb_init_hw +ffffffff8177f620 T ixgb_init_rx_addrs +ffffffff8177f750 T mac_addr_valid +ffffffff8177f7b0 T ixgb_clear_vfta +ffffffff8177f830 T ixgb_clear_hw_cntrs +ffffffff8177ff10 T ixgb_setup_fc +ffffffff817800a0 T ixgb_check_for_link +ffffffff817802b0 T ixgb_rar_set +ffffffff81780320 T ixgb_mc_addr_list_update +ffffffff817805a0 T ixgb_write_vfta +ffffffff817805d0 T ixgb_read_phy_reg +ffffffff81780ad0 T ixgb_write_phy_reg +ffffffff81780fc0 T ixgb_check_for_bad_link +ffffffff81781080 T ixgb_led_on +ffffffff817810d0 T ixgb_led_off +ffffffff81782000 T ixgbe_probe +ffffffff81782030 T ixgbe_attach +ffffffff81782580 T ixgbe_detach +ffffffff81782790 T ixgbe_activate +ffffffff817828a0 T ixgbe_identify_hardware +ffffffff81782960 T ixgbe_allocate_pci_resources +ffffffff81782ab0 T ixgbe_allocate_queues +ffffffff81782fb0 T ixgbe_allocate_msix +ffffffff817831e0 T ixgbe_allocate_legacy +ffffffff81783300 T ixgbe_setup_interface +ffffffff81783660 T ixgbe_free_transmit_structures +ffffffff817836e0 T ixgbe_free_receive_structures +ffffffff817837a0 T ixgbe_free_pci_resources +ffffffff81783880 T ixgbe_stop +ffffffff81783b80 T ixgbe_init +ffffffff81784760 T ixgbe_start +ffffffff81784940 T ixgbe_encap +ffffffff81784d90 T ixgbe_ioctl +ffffffff817850d0 T ixgbe_rxrinfo +ffffffff81785230 T ixgbe_get_sffpage +ffffffff817853e0 T ixgbe_disable_intr +ffffffff817854b0 T ixgbe_iff +ffffffff81785620 T ixgbe_enable_intr +ffffffff81785730 T ixgbe_enable_queues +ffffffff81785840 T ixgbe_watchdog +ffffffff81785a50 T ixgbe_setup_transmit_structures +ffffffff81785b20 T ixgbe_initialize_transmit_units +ffffffff81785df0 T ixgbe_setup_receive_structures +ffffffff81785f20 T ixgbe_initialize_receive_units +ffffffff81786400 T ixgbe_config_gpie +ffffffff817864d0 T ixgbe_setup_vlan_hw_support +ffffffff81786640 T ixgbe_configure_ivars +ffffffff817867f0 T ixgbe_set_ivar +ffffffff817869a0 T ixgbe_config_link +ffffffff81786b40 T ixgbe_config_delay_values +ffffffff81786c60 t ix_kstats_tick +ffffffff81786d20 T ixgbe_enable_queue +ffffffff81786df0 T ixgbe_disable_queue +ffffffff81786ec0 T ixgbe_link_intr +ffffffff81786ed0 T ixgbe_intr +ffffffff817873a0 T ixgbe_queue_intr +ffffffff817874f0 T ixgbe_rxeof +ffffffff81787a40 T ixgbe_txeof +ffffffff81787bd0 T ixgbe_rxrefill +ffffffff81787c90 T ixgbe_legacy_intr +ffffffff81787e40 T ixgbe_update_link_status +ffffffff81787f80 T ixgbe_handle_mod +ffffffff817880a0 T ixgbe_handle_msf +ffffffff81788170 T ixgbe_handle_phy +ffffffff81788200 T ixgbe_media_status +ffffffff81788410 T ixgbe_media_change +ffffffff817884c0 T ixgbe_mc_array_itr +ffffffff81788500 T ixgbe_setup_msix +ffffffff81788590 T ixgbe_add_media_types +ffffffff81788830 T ixgbe_dma_malloc +ffffffff81788a30 T ixgbe_dma_free +ffffffff81788ae0 T ixgbe_allocate_transmit_buffers +ffffffff81788c00 T ixgbe_setup_transmit_ring +ffffffff81788d50 T ixgbe_free_transmit_buffers +ffffffff81788e80 T ixgbe_get_buf +ffffffff81788fd0 T ixgbe_allocate_receive_buffers +ffffffff81789110 T ixgbe_setup_receive_ring +ffffffff817891f0 T ixgbe_rxfill +ffffffff81789330 T ixgbe_initialize_rss_mapping +ffffffff817895a0 T ixgbe_map_queue_statistics +ffffffff817896c0 T ixgbe_free_receive_buffers +ffffffff817897e0 T ixgbe_rx_checksum +ffffffff81789830 T ixgbe_read_pci_cfg +ffffffff81789890 T ixgbe_write_pci_cfg +ffffffff81789910 t ix_kstats_read +ffffffff81789ad0 t ix_rxq_kstats_read +ffffffff81789c30 t ix_txq_kstats_read +ffffffff8178a000 T ixgbe_init_ops_generic +ffffffff8178a270 T ixgbe_init_eeprom_params_generic +ffffffff8178a320 T ixgbe_read_eerd_generic +ffffffff8178a420 T ixgbe_read_eeprom_bit_bang_generic +ffffffff8178a6c0 T ixgbe_write_eeprom_generic +ffffffff8178ab10 T ixgbe_validate_eeprom_checksum_generic +ffffffff8178abc0 T ixgbe_update_eeprom_checksum_generic +ffffffff8178ac40 T ixgbe_calc_eeprom_checksum_generic +ffffffff8178ade0 T ixgbe_init_hw_generic +ffffffff8178ae40 T ixgbe_start_hw_generic +ffffffff8178af60 T ixgbe_clear_hw_cntrs_generic +ffffffff8178b940 T ixgbe_enable_rx_dma_generic +ffffffff8178b9a0 T ixgbe_get_mac_addr_generic +ffffffff8178ba30 T ixgbe_stop_adapter_generic +ffffffff8178bbb0 T ixgbe_get_bus_info_generic +ffffffff8178bc60 T ixgbe_set_lan_id_multi_port_pcie +ffffffff8178bd30 T ixgbe_acquire_swfw_sync +ffffffff8178bf60 T ixgbe_release_swfw_sync +ffffffff8178c010 T prot_autoc_read_generic +ffffffff8178c070 T prot_autoc_write_generic +ffffffff8178c0c0 T ixgbe_led_on_generic +ffffffff8178c180 T ixgbe_led_off_generic +ffffffff8178c230 T ixgbe_blink_led_start_generic +ffffffff8178c3a0 T ixgbe_blink_led_stop_generic +ffffffff8178c4c0 T ixgbe_set_rar_generic +ffffffff8178c5e0 T ixgbe_clear_rar_generic +ffffffff8178c6e0 T ixgbe_init_rx_addrs_generic +ffffffff8178c8e0 T ixgbe_update_mc_addr_list_generic +ffffffff8178cae0 T ixgbe_enable_mc_generic +ffffffff8178cb50 T ixgbe_disable_mc_generic +ffffffff8178cbb0 T ixgbe_enable_rx_generic +ffffffff8178cc70 T ixgbe_disable_rx_generic +ffffffff8178cd50 T ixgbe_fc_enable_generic +ffffffff8178d180 T ixgbe_setup_fc_generic +ffffffff8178d450 T ixgbe_fc_autoneg +ffffffff8178d730 T ixgbe_device_supports_autoneg_fc +ffffffff8178d820 T ixgbe_start_hw_gen2 +ffffffff8178da00 T ixgbe_identify_phy +ffffffff8178da60 T ixgbe_set_pci_config_data_generic +ffffffff8178dad0 T ixgbe_disable_rx +ffffffff8178db10 T ixgbe_disable_pcie_master +ffffffff8178dc60 T ixgbe_read_eerd_buffer_generic +ffffffff8178dda0 T ixgbe_poll_eerd_eewr_done +ffffffff8178de40 T ixgbe_write_eewr_buffer_generic +ffffffff8178dfc0 T ixgbe_write_eewr_generic +ffffffff8178e010 T ixgbe_acquire_eeprom +ffffffff8178e190 T ixgbe_get_eeprom_semaphore +ffffffff8178e3a0 T ixgbe_release_eeprom_semaphore +ffffffff8178e410 T ixgbe_ready_eeprom +ffffffff8178e580 T ixgbe_shift_out_eeprom_bits +ffffffff8178e740 T ixgbe_shift_in_eeprom_bits +ffffffff8178e8a0 T ixgbe_standby_eeprom +ffffffff8178e980 T ixgbe_raise_eeprom_clk +ffffffff8178e9f0 T ixgbe_lower_eeprom_clk +ffffffff8178ea60 T ixgbe_release_eeprom +ffffffff8178eb40 T ixgbe_validate_mac_addr +ffffffff8178eba0 T ixgbe_init_uta_tables +ffffffff8178ebe0 T ixgbe_add_uc_addr +ffffffff8178ec50 T ixgbe_mta_vector +ffffffff8178ed00 T ixgbe_set_mta +ffffffff8178edc0 T ixgbe_negotiate_fc +ffffffff8178ee70 T ixgbe_fc_autoneg_fiber +ffffffff8178ef90 T ixgbe_fc_autoneg_backplane +ffffffff8178f100 T ixgbe_fc_autoneg_copper +ffffffff8178f220 T ixgbe_disable_sec_rx_path_generic +ffffffff8178f2e0 T ixgbe_enable_sec_rx_path_generic +ffffffff8178f370 T ixgbe_enable_rx +ffffffff8178f3b0 T ixgbe_get_pcie_msix_count_generic +ffffffff8178f430 T ixgbe_insert_mac_addr_generic +ffffffff8178f640 T ixgbe_set_vmdq +ffffffff8178f680 T ixgbe_set_rar +ffffffff8178f6d0 T ixgbe_clear_vmdq +ffffffff8178f710 T ixgbe_clear_vmdq_generic +ffffffff8178f8c0 T ixgbe_set_vmdq_generic +ffffffff8178f970 T ixgbe_init_uta_tables_generic +ffffffff8178f9f0 T ixgbe_find_vlvf_slot +ffffffff8178faa0 T ixgbe_set_vfta_generic +ffffffff8178fbb0 T ixgbe_set_vlvf_generic +ffffffff8178fe40 T ixgbe_clear_vfta_generic +ffffffff8178ff40 T ixgbe_need_crosstalk_fix +ffffffff8178ff90 T ixgbe_check_mac_link_generic +ffffffff81790180 T ixgbe_get_device_caps_generic +ffffffff817901d0 T ixgbe_calculate_checksum +ffffffff81790290 T ixgbe_hic_unlocked +ffffffff81790450 T ixgbe_host_interface_command +ffffffff81790620 T ixgbe_clear_tx_pending +ffffffff817907e0 T ixgbe_mng_present +ffffffff81790850 T ixgbe_mng_enabled +ffffffff81790910 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff81790cb0 T ixgbe_flap_tx_laser +ffffffff81790cf0 T ixgbe_check_link +ffffffff81790d40 T ixgbe_set_soft_rate_select_speed +ffffffff81790e30 T ixgbe_init_shared_code +ffffffff81790ee0 T ixgbe_set_mac_type +ffffffff81791080 T ixgbe_init_hw +ffffffff817910c0 T ixgbe_get_media_type +ffffffff81791100 T ixgbe_read_mbx +ffffffff81791160 T ixgbe_write_mbx +ffffffff817911b0 T ixgbe_check_for_msg +ffffffff817911f0 T ixgbe_check_for_ack +ffffffff81791230 T ixgbe_check_for_rst +ffffffff81791270 T ixgbe_poll_for_msg +ffffffff81791330 T ixgbe_poll_for_ack +ffffffff817913f0 T ixgbe_read_posted_mbx +ffffffff817914d0 T ixgbe_write_posted_mbx +ffffffff817915a0 T ixgbe_init_mbx_ops_generic +ffffffff817915e0 T ixgbe_read_v2p_mailbox +ffffffff81791650 T ixgbe_check_for_bit_pf +ffffffff817916e0 T ixgbe_check_for_msg_pf +ffffffff81791790 T ixgbe_check_for_ack_pf +ffffffff81791830 T ixgbe_check_for_rst_pf +ffffffff81791920 T ixgbe_obtain_mbx_lock_pf +ffffffff817919b0 T ixgbe_write_mbx_pf +ffffffff81791b80 T ixgbe_read_mbx_pf +ffffffff81791c90 T ixgbe_init_mbx_params_pf +ffffffff81792000 T ixgbe_set_pcie_completion_timeout +ffffffff81792090 T ixgbe_init_ops_82598 +ffffffff817921e0 T ixgbe_init_phy_ops_82598 +ffffffff817922d0 T ixgbe_start_hw_82598 +ffffffff81792480 T ixgbe_reset_hw_82598 +ffffffff817927b0 T ixgbe_get_media_type_82598 +ffffffff81792870 T ixgbe_get_supported_physical_layer_82598 +ffffffff81792a40 T ixgbe_read_analog_reg8_82598 +ffffffff81792b00 T ixgbe_write_analog_reg8_82598 +ffffffff81792b80 T ixgbe_set_lan_id_multi_port_pcie_82598 +ffffffff81792c20 T ixgbe_enable_rx_dma_82598 +ffffffff81792c70 T ixgbe_set_vmdq_82598 +ffffffff81792d20 T ixgbe_clear_vmdq_82598 +ffffffff81792dd0 T ixgbe_set_vfta_82598 +ffffffff81792f00 T ixgbe_clear_vfta_82598 +ffffffff817930b0 T ixgbe_fc_enable_82598 +ffffffff81793510 T ixgbe_read_i2c_eeprom_82598 +ffffffff81793530 T ixgbe_check_mac_link_82598 +ffffffff817937d0 T ixgbe_setup_mac_link_82598 +ffffffff81793990 T ixgbe_get_link_capabilities_82598 +ffffffff81793a60 T ixgbe_setup_copper_link_82598 +ffffffff81793b70 T ixgbe_start_mac_link_82598 +ffffffff81793c90 T ixgbe_validate_link_ready +ffffffff81793d40 T ixgbe_read_i2c_phy_82598 +ffffffff81794000 T ixgbe_init_mac_link_ops_82599 +ffffffff81794190 T ixgbe_disable_tx_laser_multispeed_fiber +ffffffff81794260 T ixgbe_enable_tx_laser_multispeed_fiber +ffffffff817942e0 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff81794420 T ixgbe_setup_mac_link_82599 +ffffffff817946a0 T ixgbe_set_hard_rate_select_speed +ffffffff81794760 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff81794830 T ixgbe_setup_mac_link_smartspeed +ffffffff81794bc0 T ixgbe_init_phy_ops_82599 +ffffffff81794d10 T ixgbe_read_i2c_byte_82599 +ffffffff81794e90 T ixgbe_write_i2c_byte_82599 +ffffffff81795010 T ixgbe_setup_copper_link_82599 +ffffffff81795070 T ixgbe_setup_sfp_modules_82599 +ffffffff81795230 T prot_autoc_read_82599 +ffffffff81795360 T prot_autoc_write_82599 +ffffffff817954d0 T ixgbe_reset_pipeline_82599 +ffffffff81795810 T ixgbe_init_ops_82599 +ffffffff817959f0 T ixgbe_identify_phy_82599 +ffffffff81795a80 T ixgbe_reset_hw_82599 +ffffffff81795e10 T ixgbe_get_media_type_82599 +ffffffff81795f40 T ixgbe_get_supported_physical_layer_82599 +ffffffff81796110 T ixgbe_enable_rx_dma_82599 +ffffffff81796180 T ixgbe_read_analog_reg8_82599 +ffffffff81796240 T ixgbe_write_analog_reg8_82599 +ffffffff817962c0 T ixgbe_start_hw_82599 +ffffffff817963c0 T ixgbe_get_link_capabilities_82599 +ffffffff81796500 T ixgbe_stop_mac_link_on_d3_82599 +ffffffff817965c0 T ixgbe_read_eeprom_82599 +ffffffff817965f0 T ixgbe_start_mac_link_82599 +ffffffff817967f0 T ixgbe_verify_fw_version_82599 +ffffffff81797000 T ixgbe_init_ops_X540 +ffffffff81797220 T ixgbe_init_eeprom_params_X540 +ffffffff817972b0 T ixgbe_read_eerd_X540 +ffffffff81797340 T ixgbe_write_eewr_X540 +ffffffff817973d0 T ixgbe_update_eeprom_checksum_X540 +ffffffff817974a0 T ixgbe_validate_eeprom_checksum_X540 +ffffffff81797590 T ixgbe_calc_eeprom_checksum_X540 +ffffffff81797730 T ixgbe_reset_hw_X540 +ffffffff81797920 T ixgbe_get_media_type_X540 +ffffffff81797950 T ixgbe_get_supported_physical_layer_X540 +ffffffff817979d0 T ixgbe_start_hw_X540 +ffffffff81797a20 T ixgbe_acquire_swfw_sync_X540 +ffffffff81797e70 T ixgbe_release_swfw_sync_X540 +ffffffff81797fa0 T ixgbe_init_swfw_sync_X540 +ffffffff81798080 T ixgbe_setup_mac_link_X540 +ffffffff817980a0 T ixgbe_blink_led_start_X540 +ffffffff817981c0 T ixgbe_blink_led_stop_X540 +ffffffff817982c0 T ixgbe_get_link_capabilities_X540 +ffffffff81798300 T ixgbe_update_flash_X540 +ffffffff817984e0 T ixgbe_poll_flash_update_done_X540 +ffffffff81798570 T ixgbe_get_swfw_sync_semaphore +ffffffff81798700 T ixgbe_release_swfw_sync_semaphore +ffffffff81799000 T ixgbe_init_ops_X550 +ffffffff81799110 T ixgbe_dmac_config_X550 +ffffffff817991f0 T ixgbe_dmac_config_tcs_X550 +ffffffff81799340 T ixgbe_dmac_update_tcs_X550 +ffffffff81799400 T ixgbe_set_source_address_pruning_X550 +ffffffff817994f0 T ixgbe_init_eeprom_params_X550 +ffffffff81799570 T ixgbe_calc_eeprom_checksum_X550 +ffffffff81799590 T ixgbe_read_ee_hostif_X550 +ffffffff81799660 T ixgbe_write_ee_hostif_X550 +ffffffff81799720 T ixgbe_update_eeprom_checksum_X550 +ffffffff817998c0 T ixgbe_validate_eeprom_checksum_X550 +ffffffff81799a10 T ixgbe_disable_rx_x550 +ffffffff81799b30 T ixgbe_led_on_t_X550em +ffffffff81799bf0 T ixgbe_led_off_t_X550em +ffffffff81799cb0 T ixgbe_read_cs4227 +ffffffff81799ce0 T ixgbe_write_cs4227 +ffffffff81799d10 T ixgbe_read_pe +ffffffff81799d60 T ixgbe_write_pe +ffffffff81799dc0 T ixgbe_reset_cs4227 +ffffffff8179a050 T ixgbe_check_cs4227 +ffffffff8179a200 T ixgbe_setup_mux_ctl +ffffffff8179a290 T ixgbe_identify_phy_x550em +ffffffff8179a4a0 T ixgbe_read_mng_if_sel_x550em +ffffffff8179a520 T ixgbe_fw_phy_activity +ffffffff8179a640 T ixgbe_get_phy_id_fw +ffffffff8179a750 T ixgbe_identify_phy_fw +ffffffff8179a870 T ixgbe_shutdown_fw_phy +ffffffff8179a8d0 T ixgbe_read_phy_reg_x550em +ffffffff8179a900 T ixgbe_write_phy_reg_x550em +ffffffff8179a930 T ixgbe_init_ops_X550EM +ffffffff8179abd0 T ixgbe_get_bus_info_X550em +ffffffff8179ac20 T ixgbe_get_media_type_X550em +ffffffff8179acf0 T ixgbe_setup_sfp_modules_X550em +ffffffff8179ae80 T ixgbe_get_link_capabilities_X550em +ffffffff8179af50 T ixgbe_reset_hw_X550em +ffffffff8179b3d0 T ixgbe_get_supported_physical_layer_X550em +ffffffff8179b550 T ixgbe_setup_fc_X550em +ffffffff8179b6b0 T ixgbe_init_phy_ops_X550em +ffffffff8179bb80 T ixgbe_setup_fw_link +ffffffff8179bca0 T ixgbe_fc_autoneg_fw +ffffffff8179bcd0 T ixgbe_setup_eee_fw +ffffffff8179bd30 T ixgbe_init_ops_X550EM_a +ffffffff8179be60 T ixgbe_read_iosf_sb_reg_x550 +ffffffff8179bfd0 T ixgbe_write_iosf_sb_reg_x550 +ffffffff8179c140 T ixgbe_read_iosf_sb_reg_x550a +ffffffff8179c1d0 T ixgbe_write_iosf_sb_reg_x550a +ffffffff8179c260 T ixgbe_acquire_swfw_sync_X550a +ffffffff8179c3a0 T ixgbe_release_swfw_sync_X550a +ffffffff8179c440 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff8179c480 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff8179c5e0 T ixgbe_setup_fc_backplane_x550em_a +ffffffff8179c7d0 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff8179c8c0 T ixgbe_init_ops_X550EM_x +ffffffff8179c980 T ixgbe_acquire_swfw_sync_X550em +ffffffff8179ca40 T ixgbe_release_swfw_sync_X550em +ffffffff8179cad0 T ixgbe_iosf_wait +ffffffff8179cb80 T ixgbe_get_phy_token +ffffffff8179cc00 T ixgbe_put_phy_token +ffffffff8179cc80 T ixgbe_supported_sfp_modules_X550em +ffffffff8179cd00 T ixgbe_identify_sfp_module_X550em +ffffffff8179cd80 T ixgbe_init_mac_link_ops_X550em +ffffffff8179cec0 T ixgbe_restart_an_internal_phy_x550em +ffffffff8179cfd0 T ixgbe_setup_sgmii +ffffffff8179d1a0 T ixgbe_setup_sgmii_fw +ffffffff8179d3a0 T ixgbe_setup_mac_link_sfp_x550a +ffffffff8179d590 T ixgbe_setup_mac_link_sfp_x550em +ffffffff8179d650 T ixgbe_setup_mac_link_t_X550em +ffffffff8179d700 T ixgbe_check_link_t_X550em +ffffffff8179d7e0 T ixgbe_get_lasi_ext_t_x550em +ffffffff8179d960 T ixgbe_enable_lasi_ext_t_x550em +ffffffff8179daf0 T ixgbe_setup_kr_speed_x550em +ffffffff8179dd00 T ixgbe_reset_phy_fw +ffffffff8179ddd0 T ixgbe_check_overtemp_fw +ffffffff8179de60 T ixgbe_read_phy_reg_x550a +ffffffff8179df00 T ixgbe_write_phy_reg_x550a +ffffffff8179dfb0 T ixgbe_setup_kr_x550em +ffffffff8179e020 T ixgbe_setup_internal_phy_t_x550em +ffffffff8179e180 T ixgbe_enter_lplu_t_x550em +ffffffff8179e3d0 T ixgbe_handle_lasi_ext_t_x550em +ffffffff8179e450 T ixgbe_reset_phy_t_X550em +ffffffff8179e4a0 T ixgbe_set_mdio_speed +ffffffff8179e570 T ixgbe_init_ext_t_x550em +ffffffff8179e620 T ixgbe_setup_sfi_x550a +ffffffff8179e7d0 T ixgbe_setup_ixfi_x550em_x +ffffffff8179e9b0 T ixgbe_setup_ixfi_x550em +ffffffff8179eb90 T ixgbe_ext_phy_t_x550em_get_link +ffffffff8179ec20 T ixgbe_setup_phy_loopback_x550em +ffffffff8179ee10 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff8179efb0 T ixgbe_write_ee_hostif_data_X550 +ffffffff8179f020 T ixgbe_checksum_ptr_x550 +ffffffff8179f1b0 T ixgbe_calc_checksum_X550 +ffffffff8179f340 T ixgbe_update_flash_X550 +ffffffff8179f390 T ixgbe_get_lcd_t_x550em +ffffffff8179f450 T ixgbe_set_mux +ffffffff817a0000 T ixgbe_read_i2c_combined_generic_int +ffffffff817a0260 T ixgbe_i2c_start +ffffffff817a03b0 t ixgbe_out_i2c_byte_ack +ffffffff817a0400 T ixgbe_clock_in_i2c_byte +ffffffff817a0500 T ixgbe_clock_out_i2c_bit +ffffffff817a0610 T ixgbe_i2c_stop +ffffffff817a0790 T ixgbe_i2c_bus_clear +ffffffff817a08a0 T ixgbe_read_i2c_combined_generic +ffffffff817a08c0 T ixgbe_read_i2c_combined_generic_unlocked +ffffffff817a08e0 T ixgbe_write_i2c_combined_generic_int +ffffffff817a0aa0 T ixgbe_write_i2c_combined_generic +ffffffff817a0ac0 T ixgbe_write_i2c_combined_generic_unlocked +ffffffff817a0ae0 T ixgbe_init_phy_ops_generic +ffffffff817a0c10 T ixgbe_identify_phy_generic +ffffffff817a0ce0 T ixgbe_reset_phy_generic +ffffffff817a0ef0 T ixgbe_read_phy_reg_generic +ffffffff817a0f90 T ixgbe_write_phy_reg_generic +ffffffff817a1030 T ixgbe_read_phy_reg_mdi +ffffffff817a1190 T ixgbe_write_phy_reg_mdi +ffffffff817a12f0 T ixgbe_setup_phy_link_generic +ffffffff817a15a0 T ixgbe_setup_phy_link_speed_generic +ffffffff817a15f0 T ixgbe_get_phy_firmware_version_generic +ffffffff817a1620 T ixgbe_read_i2c_byte_generic +ffffffff817a1640 T ixgbe_write_i2c_byte_generic +ffffffff817a1660 T ixgbe_read_i2c_eeprom_generic +ffffffff817a1690 T ixgbe_write_i2c_eeprom_generic +ffffffff817a16b0 T ixgbe_identify_module_generic +ffffffff817a1720 T ixgbe_read_i2c_byte_generic_unlocked +ffffffff817a1740 T ixgbe_write_i2c_byte_generic_unlocked +ffffffff817a1760 T ixgbe_tn_check_overtemp +ffffffff817a17d0 t ixgbe_probe_phy +ffffffff817a19d0 T ixgbe_check_reset_blocked +ffffffff817a1a30 T ixgbe_validate_phy_addr +ffffffff817a1aa0 T ixgbe_get_phy_id +ffffffff817a1b50 T ixgbe_get_phy_type_from_id +ffffffff817a1c10 T ixgbe_get_copper_link_capabilities_generic +ffffffff817a1d00 T ixgbe_get_copper_speeds_supported +ffffffff817a1dc0 T ixgbe_check_phy_link_tnx +ffffffff817a2080 T ixgbe_setup_phy_link_tnx +ffffffff817a2330 T ixgbe_get_phy_firmware_version_tnx +ffffffff817a2360 T ixgbe_reset_phy_nl +ffffffff817a25f0 T ixgbe_get_sfp_init_sequence_offsets +ffffffff817a2800 T ixgbe_is_sfp +ffffffff817a2850 T ixgbe_identify_sfp_module_generic +ffffffff817a2c40 T ixgbe_identify_qsfp_module_generic +ffffffff817a2f30 T ixgbe_get_supported_phy_sfp_layer_generic +ffffffff817a30d0 T ixgbe_is_sfp_probe +ffffffff817a3120 T ixgbe_read_i2c_byte_generic_int +ffffffff817a3320 T ixgbe_clock_out_i2c_byte +ffffffff817a3480 T ixgbe_get_i2c_ack +ffffffff817a3680 T ixgbe_write_i2c_byte_generic_int +ffffffff817a37b0 T ixgbe_set_i2c_data +ffffffff817a3960 T ixgbe_raise_i2c_clk +ffffffff817a3a80 T ixgbe_lower_i2c_clk +ffffffff817a3b10 T ixgbe_clock_in_i2c_bit +ffffffff817a3cd0 T ixgbe_get_i2c_data +ffffffff817a3d80 T ixgbe_set_copper_phy_power +ffffffff817a4000 t ixl_match +ffffffff817a40a0 t ixl_attach +ffffffff817a55f0 t ixl_710_rd_ctl +ffffffff817a56b0 t ixl_710_wr_ctl +ffffffff817a5780 t ixl_710_set_rss_key +ffffffff817a5900 t ixl_710_set_rss_lut +ffffffff817a5980 t ixl_atq_exec +ffffffff817a5af0 t ixl_wakeup +ffffffff817a5b10 t ixl_722_rd_ctl +ffffffff817a5b40 t ixl_722_wr_ctl +ffffffff817a5b70 t ixl_722_set_rss_key +ffffffff817a5ba0 t ixl_722_set_rss_lut +ffffffff817a5bd0 t ixl_dmamem_alloc +ffffffff817a5d30 t ixl_arq +ffffffff817a5fd0 t ixl_arq_fill +ffffffff817a6240 t ixl_pxe_clear +ffffffff817a62f0 t ixl_get_mac +ffffffff817a64c0 t ixl_hmc +ffffffff817a6b50 t ixl_lldp_shut +ffffffff817a6be0 t ixl_phy_mask_ints +ffffffff817a6c90 t ixl_restart_an +ffffffff817a6d40 t ixl_get_switch_config +ffffffff817a6f30 t ixl_get_phy_types +ffffffff817a7120 t ixl_get_link_status +ffffffff817a71f0 t ixl_get_vsi +ffffffff817a7340 t ixl_set_vsi +ffffffff817a74b0 t ixl_intr0 +ffffffff817a76f0 t ixl_intr_vector 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iwn4965_reset_sched +ffffffff81807050 T iwn4965_update_sched +ffffffff81807130 T iwn4965_update_rxon +ffffffff818072f0 T iwn4965_get_temperature +ffffffff81807370 T iwn4965_get_rssi +ffffffff818073e0 T iwn4965_set_txpower +ffffffff818078d0 T iwn4965_init_gains +ffffffff81807a70 T iwn4965_set_gains +ffffffff81807da0 T iwn4965_add_node +ffffffff81807e30 T iwn4965_tx_done +ffffffff81807f90 T iwn4965_ampdu_tx_start +ffffffff818083a0 T iwn4965_ampdu_tx_stop +ffffffff818085a0 T iwn5000_load_firmware +ffffffff818086b0 T iwn5000_read_eeprom +ffffffff81808900 T iwn5000_post_alive +ffffffff81809120 T iwn5000_nic_config +ffffffff81809500 T iwn5000_reset_sched +ffffffff818095f0 T iwn5000_update_sched +ffffffff818096e0 T iwn5000_update_rxon +ffffffff818098d0 T iwn5000_get_temperature +ffffffff81809930 T iwn5000_get_rssi +ffffffff81809980 T iwn5000_set_txpower +ffffffff818099d0 T iwn5000_init_gains +ffffffff81809b70 T iwn5000_set_gains +ffffffff81809e20 T iwn5000_add_node +ffffffff81809e50 T iwn5000_tx_done +ffffffff8180a060 T iwn5000_ampdu_tx_start +ffffffff8180a4a0 T iwn5000_ampdu_tx_stop +ffffffff8180a720 T iwn_free_rx_ring +ffffffff8180a910 T iwn_stop +ffffffff8180a990 T iwn_wakeup +ffffffff8180aa40 T iwn_init +ffffffff8180ad40 T iwn_nic_lock +ffffffff8180ae00 T iwn_eeprom_lock +ffffffff8180aed0 T iwn_init_otprom +ffffffff8180b330 T iwn_clock_wait +ffffffff8180b400 T iwn_read_prom_data +ffffffff8180b7e0 T iwn_dma_contig_alloc +ffffffff8180b9d0 T iwn_dma_contig_free +ffffffff8180ba90 T iwn_reset_rx_ring +ffffffff8180bc20 T iwn_reset_tx_ring +ffffffff8180bd20 T iwn5000_ict_reset +ffffffff8180be00 T iwn_apm_init +ffffffff8180c240 T iwn_apm_stop +ffffffff8180c380 T iwn_read_eeprom_channels +ffffffff8180c510 T iwn_read_eeprom_enhinfo +ffffffff8180c690 T iwn_scan_abort +ffffffff8180c820 T iwn_set_led +ffffffff8180c9e0 T iwn_cmd +ffffffff8180cd20 T iwn_scan +ffffffff8180d210 T iwn_auth +ffffffff8180d4c0 T iwn_run +ffffffff8180d960 T iwn_iter_func +ffffffff8180d9f0 T iwn_set_link_quality +ffffffff8180de70 T iwn_ccmp_decap +ffffffff8180df70 T iwn_rx_phy +ffffffff8180e050 T iwn_rx_done +ffffffff8180e660 T iwn_ra_choose +ffffffff8180e6e0 T iwn_ampdu_rate_control +ffffffff8180e820 T iwn_ht_single_rate_control +ffffffff8180ea00 T iwn_rx_compressed_ba +ffffffff8180eb90 T iwn_ampdu_txq_advance +ffffffff8180ed20 T iwn_clear_oactive +ffffffff8180eda0 T iwn5000_rx_calib_results +ffffffff8180ef10 T iwn_rx_statistics +ffffffff8180f0b0 T iwn4965_power_calibration +ffffffff8180f100 T iwn_get_noise +ffffffff8180f170 T iwn_collect_noise +ffffffff8180f480 T iwn_tune_sensitivity +ffffffff8180fc30 T iwn_tx_done_free_txdata +ffffffff8180fce0 T iwn_ampdu_tx_done +ffffffff8180ff90 T iwn_tx_done +ffffffff818101e0 T iwn_cmd_done +ffffffff818102d0 T iwn_notif_intr +ffffffff81810940 T iwn_init_sensitivity +ffffffff81810bf0 T iwn_wakeup_intr +ffffffff81810cb0 T iwn_fatal_intr +ffffffff81810fa0 T iwn_rval2ridx +ffffffff81811020 T iwn_tx +ffffffff81811b00 T iwn_rxon_ht40_enabled +ffffffff81811b40 T iwn_set_pslevel +ffffffff81811d00 T iwn_add_broadcast_node +ffffffff81811f50 T iwn_set_critical_temp +ffffffff81812130 T iwn_set_timing +ffffffff81812300 T iwn_send_sensitivity +ffffffff81812400 T iwn_send_btcoex +ffffffff818125a0 T iwn_send_advanced_btcoex +ffffffff81812ce0 T iwn5000_runtime_calib +ffffffff81812ed0 T iwn_config +ffffffff818133b0 T iwn6000_temp_offset_calib +ffffffff81813560 T iwn2000_temp_offset_calib +ffffffff81813740 T iwn_get_active_dwell_time +ffffffff81813780 T iwn_limit_dwell +ffffffff818137f0 T iwn_get_passive_dwell_time +ffffffff81813870 T iwn_rxon_configure_ht40 +ffffffff81813910 T iwn_update_rxon_restore_power +ffffffff81813bd0 T iwn5000_query_calibration +ffffffff81813e20 T iwn5000_send_calibration +ffffffff81813f70 T iwn5000_send_wimax_coex +ffffffff81814140 T iwn5000_crystal_calib +ffffffff818142f0 T iwn_hw_stop +ffffffff818146e0 T iwn_hw_init +ffffffff81814d80 T iwn4965_load_bootcode +ffffffff81815120 T iwn5000_load_firmware_section +ffffffff81815360 T iwn_read_firmware_leg +ffffffff81815470 T iwn_read_firmware_tlv +ffffffff818156f0 T iwn_read_firmware +ffffffff81815920 T iwn_apm_stop_master +ffffffff81816000 T iwm_lookup_cmd_ver +ffffffff81816070 T iwm_is_mimo_ht_plcp +ffffffff818160b0 T iwm_is_mimo_ht_mcs +ffffffff81816100 T iwm_store_cscheme +ffffffff81816150 T iwm_firmware_store_section +ffffffff818161f0 T iwm_set_default_calib +ffffffff81816240 T iwm_fw_info_free +ffffffff81816290 T iwm_fw_version_str +ffffffff818162d0 T iwm_read_firmware +ffffffff81816b50 T iwm_read_prph_unlocked +ffffffff81816bb0 T iwm_read_prph +ffffffff81816c30 T iwm_nic_assert_locked +ffffffff81816c90 T iwm_write_prph_unlocked +ffffffff81816d00 T iwm_write_prph +ffffffff81816d90 T iwm_write_prph64 +ffffffff81816e90 T iwm_read_mem +ffffffff81816fc0 T iwm_nic_lock +ffffffff81817110 T iwm_nic_unlock +ffffffff818171c0 T iwm_write_mem +ffffffff81817300 T iwm_write_mem32 +ffffffff81817410 T iwm_poll_bit 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iwm_init_msix_hw +ffffffff81819d50 T iwm_conf_msix_hw +ffffffff8181a2a0 T iwm_clear_persistence_bit +ffffffff8181a3f0 T iwm_start_hw +ffffffff8181a610 T iwm_stop_device +ffffffff8181ac30 T iwm_nic_config +ffffffff8181ad10 T iwm_nic_rx_init +ffffffff8181ad30 T iwm_nic_rx_mq_init +ffffffff8181b130 T iwm_nic_rx_legacy_init +ffffffff8181b370 T iwm_nic_tx_init +ffffffff8181b560 T iwm_nic_init +ffffffff8181b6c0 T iwm_enable_ac_txq +ffffffff8181bb40 T iwm_enable_txq +ffffffff8181bd20 T iwm_send_cmd_pdu +ffffffff8181bda0 T iwm_disable_txq +ffffffff8181be80 T iwm_post_alive +ffffffff8181c400 T iwm_phy_db_get_section +ffffffff8181c4a0 T iwm_phy_db_set_section +ffffffff8181c5e0 T iwm_is_valid_channel +ffffffff8181c650 T iwm_ch_id_to_ch_index +ffffffff8181c6d0 T iwm_channel_id_to_papd +ffffffff8181c770 T iwm_channel_id_to_txp +ffffffff8181c900 T iwm_phy_db_get_section_data +ffffffff8181ca90 T iwm_send_phy_db_cmd +ffffffff8181cb30 T iwm_send_cmd +ffffffff8181d210 T iwm_phy_db_send_all_channel_groups +ffffffff8181d3f0 T iwm_send_phy_db_data +ffffffff8181d630 T iwm_send_time_event_cmd +ffffffff8181d740 T iwm_free_resp +ffffffff8181d7c0 T iwm_protect_session +ffffffff8181d870 T iwm_unprotect_session +ffffffff8181d920 T iwm_nvm_read_chunk +ffffffff8181da80 T iwm_nvm_read_section +ffffffff8181db40 T iwm_fw_valid_tx_ant +ffffffff8181db80 T iwm_fw_valid_rx_ant +ffffffff8181dbd0 T iwm_valid_siso_ant_rate_mask +ffffffff8181dc30 T iwm_init_channel_map +ffffffff8181dd90 T iwm_mimo_enabled +ffffffff8181ddd0 T iwm_setup_ht_rates +ffffffff8181de80 T iwm_setup_vht_rates +ffffffff8181df10 T iwm_init_reorder_buffer +ffffffff8181df70 T iwm_clear_reorder_buffer +ffffffff8181e030 T iwm_rx_ba_session_expired +ffffffff8181e130 T iwm_reorder_timer_expired +ffffffff8181e300 T iwm_release_frames +ffffffff8181e4f0 T iwm_sta_rx_agg +ffffffff8181e9e0 T iwm_send_cmd_pdu_status +ffffffff8181ea70 T iwm_mac_ctxt_task +ffffffff8181ebd0 T iwm_mac_ctxt_cmd +ffffffff8181edd0 T iwm_updateprot +ffffffff8181ee90 T iwm_add_task +ffffffff8181ef00 T iwm_updateslot +ffffffff8181efc0 T iwm_updateedca +ffffffff8181f080 T iwm_phy_ctxt_task +ffffffff8181f240 T iwm_phy_ctxt_update +ffffffff8181f3c0 T iwm_setrates +ffffffff8181f550 T iwm_updatechan +ffffffff8181f610 T iwm_updatedtim +ffffffff8181f6d0 T iwm_sta_tx_agg +ffffffff8181fbb0 T iwm_flush_sta +ffffffff8181fd50 T iwm_txq_advance +ffffffff8181ff30 T iwm_clear_oactive +ffffffff8181ffb0 T iwm_ba_task +ffffffff818201f0 T iwm_ampdu_rx_start +ffffffff818202d0 T iwm_ampdu_rx_stop +ffffffff818203b0 T iwm_ampdu_tx_start +ffffffff81820470 T iwm_ampdu_tx_stop +ffffffff81820550 T iwm_set_hw_address_8000 +ffffffff818207d0 T iwm_parse_nvm_data +ffffffff81820a40 T iwm_parse_nvm_sections +ffffffff81820b40 T iwm_nvm_init +ffffffff81820e00 T iwm_firmware_load_sect +ffffffff81820eb0 T iwm_firmware_load_chunk +ffffffff81821160 T iwm_load_firmware_7000 +ffffffff818213c0 T iwm_load_cpu_sections_8000 +ffffffff81821770 T iwm_load_firmware_8000 +ffffffff81821980 T iwm_load_firmware +ffffffff81821a60 T iwm_start_fw +ffffffff81821c30 T iwm_send_tx_ant_cfg +ffffffff81821cc0 T iwm_send_phy_cfg_cmd +ffffffff81821d70 T iwm_send_dqa_cmd +ffffffff81821e00 T iwm_load_ucode_wait_alive +ffffffff81821f40 T iwm_save_fw_paging +ffffffff81821fb0 T iwm_send_paging_cmd +ffffffff81822100 T iwm_free_fw_paging +ffffffff81822270 T iwm_run_init_mvm_ucode +ffffffff818225b0 T iwm_send_bt_init_conf +ffffffff81822650 T iwm_sf_config +ffffffff81822860 T iwm_config_ltr +ffffffff81822920 T iwm_get_signal_strength +ffffffff81822980 T iwm_rxmq_get_signal_strength +ffffffff818229d0 T iwm_rx_rx_phy_cmd +ffffffff81822a30 T iwm_get_noise +ffffffff81822aa0 T iwm_ccmp_decap +ffffffff81822ba0 T iwm_rx_hwdecrypt +ffffffff81822c70 T iwm_rx_frame +ffffffff81822fa0 T iwm_rx_mpdu +ffffffff818231b0 T iwm_flip_address +ffffffff81823210 T iwm_detect_duplicate +ffffffff81823330 T iwm_is_sn_less +ffffffff81823390 T iwm_oldsn_workaround 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iwm_wait_tx_queues_empty +ffffffff81826b70 T iwm_led_enable +ffffffff81826ba0 T iwm_led_disable +ffffffff81826bd0 T iwm_led_is_enabled +ffffffff81826c30 T iwm_led_blink_timeout +ffffffff81826cb0 T iwm_led_blink_start +ffffffff81826d00 T iwm_led_blink_stop +ffffffff81826d50 T iwm_beacon_filter_send_cmd +ffffffff81826de0 T iwm_beacon_filter_set_cqm_params +ffffffff81826e20 T iwm_update_beacon_abort +ffffffff81826f10 T iwm_power_build_cmd +ffffffff81826fa0 T iwm_power_mac_update_mode +ffffffff818271b0 T iwm_power_update_device +ffffffff81827250 T iwm_enable_beacon_filter +ffffffff81827340 T iwm_disable_beacon_filter +ffffffff81827420 T iwm_add_sta_cmd +ffffffff81827810 T iwm_add_aux_sta +ffffffff818279b0 T iwm_drain_sta +ffffffff81827b60 T iwm_rm_sta_cmd +ffffffff81827c20 T iwm_scan_rx_chain +ffffffff81827c90 T iwm_scan_rate_n_flags +ffffffff81827d90 T iwm_lmac_scan_fill_channels +ffffffff81827e70 T iwm_umac_scan_fill_channels +ffffffff81827f40 T iwm_fill_probe_req_v1 +ffffffff81827fe0 T iwm_fill_probe_req +ffffffff81828210 T iwm_lmac_scan +ffffffff81828720 T iwm_config_umac_scan +ffffffff81828930 T iwm_umac_scan_size +ffffffff818289a0 T iwm_get_scan_req_umac_chan_param +ffffffff818289f0 T iwm_get_scan_req_umac_data +ffffffff81828a40 T iwm_umac_scan +ffffffff81828ea0 T iwm_mcc_update +ffffffff81828f30 T iwm_ridx2rate +ffffffff81828fa0 T iwm_ack_rates +ffffffff81829260 T iwm_mac_ctxt_cmd_common +ffffffff81829570 T iwm_mac_ctxt_cmd_fill_sta +ffffffff81829630 T iwm_update_quotas +ffffffff818299f0 T iwm_del_task +ffffffff81829a50 T iwm_scan +ffffffff81829cc0 T iwm_scan_abort +ffffffff81829de0 T iwm_bgscan +ffffffff81829e80 T iwm_bgscan_done +ffffffff81829f20 T iwm_bgscan_done_task +ffffffff8182a170 T iwm_umac_scan_abort +ffffffff8182a200 T iwm_lmac_scan_abort +ffffffff8182a2a0 T iwm_auth +ffffffff8182a610 T iwm_deauth +ffffffff8182a970 T iwm_run +ffffffff8182aea0 T iwm_allow_mcast +ffffffff8182afa0 T iwm_run_stop +ffffffff8182b5c0 T iwm_node_alloc +ffffffff8182b5e0 T iwm_set_key_v1 +ffffffff8182b720 T iwm_set_key +ffffffff8182b980 T iwm_delete_key_v1 +ffffffff8182bab0 T iwm_delete_key +ffffffff8182bd20 T iwm_calib_timeout +ffffffff8182bde0 T iwm_set_rate_table_vht +ffffffff8182c100 T iwm_set_rate_table +ffffffff8182c4c0 T iwm_media_change +ffffffff8182c6c0 T iwm_stop +ffffffff8182cb40 T iwm_init +ffffffff8182ce10 T iwm_newstate_task +ffffffff8182cf90 T iwm_newstate +ffffffff8182d0f0 T iwm_endscan +ffffffff8182d140 T iwm_fill_sf_command +ffffffff8182d210 T iwm_send_soc_conf +ffffffff8182d350 T iwm_send_update_mcc_cmd +ffffffff8182d510 T iwm_send_temp_report_ths_cmd +ffffffff8182d5e0 T iwm_tt_tx_backoff +ffffffff8182d670 T iwm_fill_paging_mem +ffffffff8182d9e0 T iwm_alloc_fw_paging_mem +ffffffff8182dd80 T iwm_init_hw +ffffffff8182e400 T iwm_preinit +ffffffff8182e5a0 T iwm_start +ffffffff8182e770 T iwm_watchdog +ffffffff8182e910 T iwm_nic_error +ffffffff8182edf0 T iwm_dump_driver_status +ffffffff8182ee90 T iwm_ioctl +ffffffff8182eff0 T iwm_nic_umac_error +ffffffff8182f460 T iwm_desc_lookup +ffffffff8182f5f0 T iwm_rx_pkt_valid +ffffffff8182f640 T iwm_rx_pkt +ffffffff81830400 T iwm_notif_intr +ffffffff81830560 T iwm_intr +ffffffff81830990 T iwm_intr_msix +ffffffff81830c20 T iwm_match +ffffffff81830c50 T iwm_attach_hook +ffffffff81830c90 T iwm_attach +ffffffff818319d0 T iwm_radiotap_attach +ffffffff81831a60 T iwm_init_task +ffffffff81831b20 T iwm_resume +ffffffff81831c60 T iwm_wakeup +ffffffff81831d10 T iwm_activate +ffffffff81832000 T iwx_lookup_cmd_ver +ffffffff81832070 T iwx_lookup_notif_ver +ffffffff818320e0 T iwx_is_mimo_ht_plcp +ffffffff81832120 T iwx_store_cscheme +ffffffff81832170 T iwx_ctxt_info_alloc_dma +ffffffff81832210 T iwx_dma_contig_alloc +ffffffff818323f0 T iwx_ctxt_info_free_paging +ffffffff81832550 T iwx_dma_contig_free +ffffffff81832610 T iwx_get_num_sections +ffffffff81832690 T iwx_init_fw_sec +ffffffff81832ae0 T iwx_fw_version_str +ffffffff81832b20 T iwx_alloc_fw_monitor_block +ffffffff81832bd0 T iwx_alloc_fw_monitor +ffffffff81832c90 T iwx_apply_debug_destination +ffffffff818331e0 T iwx_nic_lock +ffffffff81833330 T iwx_write_prph +ffffffff818333d0 T iwx_set_bits_prph +ffffffff818333f0 T iwx_clear_bits_prph +ffffffff81833410 T iwx_read_prph +ffffffff818334b0 T iwx_nic_unlock +ffffffff81833560 T iwx_set_ltr +ffffffff818336b0 T iwx_ctxt_info_init +ffffffff81833970 T iwx_ctxt_info_free_fw_img +ffffffff81833af0 T iwx_ctxt_info_gen3_init +ffffffff818340e0 T iwx_write_umac_prph +ffffffff81834190 T iwx_firmware_store_section +ffffffff81834230 T iwx_set_default_calib +ffffffff81834280 T iwx_fw_info_free +ffffffff81834310 T iwx_read_firmware +ffffffff81834da0 T iwx_prph_addr_mask +ffffffff81834de0 T iwx_read_prph_unlocked +ffffffff81834e60 T iwx_nic_assert_locked +ffffffff81834ec0 T iwx_write_prph_unlocked +ffffffff81834f40 T iwx_write_prph64 +ffffffff81835070 T iwx_read_umac_prph_unlocked +ffffffff818350f0 T iwx_read_umac_prph +ffffffff81835190 T iwx_write_umac_prph_unlocked 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iwx_rx_bar_frame_release +ffffffff8183a1a0 T iwx_release_frames +ffffffff8183a390 T iwx_reorder_timer_expired +ffffffff8183a560 T iwx_find_rxba_data +ffffffff8183a5f0 T iwx_sta_rx_agg_baid_cfg_cmd +ffffffff8183a840 T iwx_send_cmd_pdu_status +ffffffff8183a8d0 T iwx_sta_rx_agg_sta_cmd +ffffffff8183ab20 T iwx_sta_rx_agg +ffffffff8183adf0 T iwx_mac_ctxt_task +ffffffff8183af80 T iwx_mac_ctxt_cmd +ffffffff8183b180 T iwx_phy_ctxt_task +ffffffff8183b330 T iwx_phy_ctxt_update +ffffffff8183b780 T iwx_updatechan +ffffffff8183b840 T iwx_add_task +ffffffff8183b8b0 T iwx_updateprot +ffffffff8183b970 T iwx_updateslot +ffffffff8183ba30 T iwx_updateedca +ffffffff8183baf0 T iwx_updatedtim +ffffffff8183bbb0 T iwx_sta_tx_agg_start +ffffffff8183bda0 T iwx_ba_task +ffffffff8183bef0 T iwx_ampdu_rx_start +ffffffff8183bfd0 T iwx_ampdu_rx_stop +ffffffff8183c0b0 T iwx_ampdu_tx_start +ffffffff8183c160 T iwx_set_mac_addr_from_csr +ffffffff8183c380 T iwx_flip_hw_address +ffffffff8183c3d0 T iwx_is_valid_mac_addr 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age_dma_free +ffffffff8187d4d0 T age_detach +ffffffff8187d590 T age_stop +ffffffff8187d8b0 T age_stop_rxmac +ffffffff8187d9e0 T age_stop_txmac +ffffffff8187db10 T age_mac_config +ffffffff8187dbb0 T age_rxintr +ffffffff8187dd80 T age_txintr +ffffffff8187df40 T age_init +ffffffff8187e900 T age_stats_update +ffffffff8187ec20 T age_encap +ffffffff8187ee80 T age_iff +ffffffff8187efe0 T age_rxeof +ffffffff8187f360 T age_newbuf +ffffffff8187f4f0 T age_init_rx_ring +ffffffff8187f5c0 T age_init_rr_ring +ffffffff8187f640 T age_init_tx_ring +ffffffff8187f700 T age_init_cmb_block +ffffffff8187f750 T age_init_smb_block +ffffffff8187f7a0 T age_rxvlan +ffffffff81880000 T alc_match +ffffffff81880030 T alc_attach +ffffffff81880880 T alc_detach +ffffffff81880950 T alc_activate +ffffffff818809d0 T alc_miibus_readreg +ffffffff81880b90 T alc_mii_readreg_816x +ffffffff81880c90 T alc_mii_readreg_813x +ffffffff81880da0 T alc_miibus_writereg +ffffffff81880f60 T alc_mii_writereg_816x +ffffffff81881070 T alc_mii_writereg_813x +ffffffff81881170 T alc_miibus_statchg +ffffffff81881520 T alc_stop_mac +ffffffff81881610 T alc_start_queue +ffffffff818816c0 T alc_mac_config +ffffffff818817a0 T alc_aspm +ffffffff81881870 T alc_dsp_fixup +ffffffff81881e50 T alc_miidbg_readreg +ffffffff81881e90 T alc_miidbg_writereg +ffffffff81881ee0 T alc_miiext_readreg +ffffffff81882010 T alc_miiext_writereg +ffffffff81882150 T alc_mediastatus +ffffffff818821c0 T alc_mediachange +ffffffff81882220 T alc_get_macaddr +ffffffff81882240 T alc_get_macaddr_816x +ffffffff818824c0 T alc_get_macaddr_813x +ffffffff81882960 T alc_get_macaddr_par +ffffffff81882a10 T alc_disable_l0s_l1 +ffffffff81882aa0 T alc_phy_reset +ffffffff81882ac0 T alc_phy_reset_816x +ffffffff81883350 T alc_phy_reset_813x +ffffffff81883730 T alc_phy_down +ffffffff81883850 T alc_aspm_816x +ffffffff81883900 T alc_aspm_813x +ffffffff81883ae0 T alc_init_pcie +ffffffff81883e60 T alc_config_msi +ffffffff81883f30 T alc_intr +ffffffff81884110 T alc_reset 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+ffffffff81888a50 T ale_stop_mac +ffffffff81888b40 T ale_mac_config +ffffffff81888be0 T ale_mediastatus +ffffffff81888c50 T ale_mediachange +ffffffff81888cb0 T ale_get_macaddr +ffffffff81888e70 T ale_phy_reset +ffffffff818894b0 T ale_intr +ffffffff81889600 T ale_reset +ffffffff81889770 T ale_dma_alloc +ffffffff81889ee0 T ale_ioctl +ffffffff8188a030 T ale_start +ffffffff8188a190 T ale_watchdog +ffffffff8188a200 T ale_tick +ffffffff8188a260 T ale_dma_free +ffffffff8188a520 T ale_detach +ffffffff8188a5e0 T ale_stop +ffffffff8188a8a0 T ale_init +ffffffff8188b2b0 T ale_encap +ffffffff8188b510 T ale_txeof +ffffffff8188b700 T ale_iff +ffffffff8188b860 T ale_stats_clear +ffffffff8188b930 T ale_stats_update +ffffffff8188bcb0 T ale_rxeof +ffffffff8188bf50 T ale_rx_update_page +ffffffff8188c090 T ale_rxcsum +ffffffff8188c140 T ale_init_rx_pages +ffffffff8188c270 T ale_init_tx_ring +ffffffff8188c360 T ale_rxvlan +ffffffff8188d000 T amdpm_match +ffffffff8188d030 T amdpm_attach +ffffffff8188d360 T amdpm_activate +ffffffff8188d3d0 T amdpm_rnd_callout +ffffffff8188d430 T amdpm_i2c_acquire_bus +ffffffff8188d490 T amdpm_i2c_release_bus +ffffffff8188d4e0 T amdpm_i2c_exec +ffffffff8188d850 T amdpm_get_timecount +ffffffff8188d880 T amdpm_intr +ffffffff8188e000 T bce_probe +ffffffff8188e030 T bce_attach +ffffffff8188e830 T bce_activate +ffffffff8188e8a0 T bce_intr +ffffffff8188eb90 T bce_reset +ffffffff8188f150 T bce_ioctl +ffffffff8188f2b0 T bce_start +ffffffff8188f4e0 T bce_watchdog +ffffffff8188f530 T bce_mii_read +ffffffff8188f670 T bce_mii_write +ffffffff8188f7a0 T bce_statchg +ffffffff8188fb30 T bce_mediachange +ffffffff8188fb80 T bce_mediastatus +ffffffff8188fbe0 T bce_tick +ffffffff8188fc30 T bce_stop +ffffffff8188fd50 T bce_init +ffffffff81890160 T bce_iff +ffffffff81890260 T bce_rxintr +ffffffff818903f0 T bce_txintr +ffffffff818904e0 T bce_add_rxbuf +ffffffff818905a0 T bce_add_mac +ffffffff81891000 T ath_pci_match +ffffffff81891060 T ath_pci_attach +ffffffff81891290 T ath_pci_detach +ffffffff81892000 T athn_pci_match +ffffffff81892030 T athn_pci_attach +ffffffff818922c0 T athn_pci_detach +ffffffff81892340 T athn_pci_activate +ffffffff818923f0 T athn_pci_read +ffffffff81892420 T athn_pci_write +ffffffff81892450 T athn_pci_write_barrier +ffffffff81892480 T athn_pci_disable_aspm +ffffffff818924f0 T athn_pci_wakeup +ffffffff81893000 T atw_pci_match +ffffffff81893030 T atw_pci_attach +ffffffff818932a0 T atw_pci_detach +ffffffff81893320 t atw_pci_enable +ffffffff818933c0 t atw_pci_disable +ffffffff81894000 T rtw_pci_match +ffffffff81894030 T rtw_pci_attach +ffffffff81894250 T rtw_pci_detach +ffffffff818942d0 T rtw_pci_enable +ffffffff81894370 T rtw_pci_disable +ffffffff81895000 T rtwn_pci_match +ffffffff81895030 T rtwn_pci_attach +ffffffff81895590 T rtwn_pci_detach +ffffffff818956a0 T rtwn_pci_activate +ffffffff818956c0 T rtwn_calib_to +ffffffff81895720 T rtwn_scan_to +ffffffff81895740 T rtwn_intr +ffffffff818959e0 T rtwn_alloc_rx_list +ffffffff81895d00 T rtwn_alloc_tx_list +ffffffff81895f40 T rtwn_free_rx_list +ffffffff81896090 T rtwn_pci_write_1 +ffffffff818960c0 T rtwn_pci_write_2 +ffffffff818960f0 T rtwn_pci_write_4 +ffffffff81896120 T rtwn_pci_read_1 +ffffffff81896150 T rtwn_pci_read_2 +ffffffff81896180 T rtwn_pci_read_4 +ffffffff818961b0 T rtwn_tx +ffffffff81896740 T rtwn_power_on +ffffffff81896770 T rtwn_dma_init +ffffffff81896b20 T rtwn_pci_load_firmware +ffffffff81896bd0 T rtwn_fw_loadpage +ffffffff81896d00 T rtwn_mac_init +ffffffff81896e40 T rtwn_bb_init +ffffffff818972f0 T rtwn_alloc_buffers +ffffffff81897320 T rtwn_pci_init +ffffffff818973f0 T rtwn_pci_stop +ffffffff81897540 T rtwn_is_oactive +ffffffff81897580 T rtwn_next_calib +ffffffff818975a0 T rtwn_cancel_calib +ffffffff818975e0 T rtwn_pci_next_scan +ffffffff81897600 T rtwn_cancel_scan +ffffffff81897640 T rtwn_wait_async +ffffffff81897670 T rtwn_free_tx_list +ffffffff818977e0 T rtwn_setup_rx_desc +ffffffff81897850 T rtwn_reset_rx_list +ffffffff818978f0 T rtwn_reset_tx_list +ffffffff81897a40 T rtwn_rx_frame +ffffffff81897ec0 T rtwn_tx_done +ffffffff81898050 T rtwn_poll_c2h_events +ffffffff81898220 T rtwn_pci_92c_stop +ffffffff81898400 T rtwn_pci_88e_stop +ffffffff818987e0 T rtwn_pci_23a_stop +ffffffff81898b80 T rtwn_88e_intr +ffffffff81898eb0 T rtwn_llt_write +ffffffff81898f70 T rtwn_llt_init +ffffffff81899230 T rtwn_92c_power_on +ffffffff818996b0 T rtwn_88e_power_on +ffffffff81899ab0 T rtwn_23a_power_on +ffffffff81899f20 T rtwn_tx_report +ffffffff8189a000 T ral_pci_match +ffffffff8189a030 T ral_pci_attach +ffffffff8189a210 T ral_pci_detach +ffffffff8189a2b0 T ral_pci_activate +ffffffff8189a340 T ral_pci_wakeup +ffffffff8189b000 T acx_pci_match +ffffffff8189b030 T acx_pci_attach +ffffffff8189b260 T acx_pci_detach +ffffffff8189c000 T pgt_pci_match +ffffffff8189c030 T pgt_pci_attach +ffffffff8189c200 T pgt_pci_detach +ffffffff8189d000 T malo_pci_match +ffffffff8189d030 T malo_pci_attach +ffffffff8189d1e0 T malo_pci_detach +ffffffff8189d230 T malo_pci_activate +ffffffff8189d290 T malo_pci_wakeup +ffffffff8189e000 T bwi_pci_match +ffffffff8189e070 T bwi_pci_attach +ffffffff8189e290 T bwi_pci_detach +ffffffff8189e2e0 T bwi_pci_activate +ffffffff8189e350 T bwi_reset_bcm4331 +ffffffff8189e470 T bwi_pci_conf_write +ffffffff8189e4a0 T bwi_pci_conf_read +ffffffff8189e4d0 T bwi_pci_wakeup +ffffffff8189f000 T piixpm_match +ffffffff8189f030 T piixpm_attach +ffffffff8189f4c0 T piixpm_intr +ffffffff8189f5d0 T piixpm_i2c_acquire_bus +ffffffff8189f6b0 T piixpm_i2c_release_bus +ffffffff8189f790 T piixpm_i2c_exec +ffffffff818a0000 T vic_match +ffffffff818a00a0 T vic_attach +ffffffff818a0430 T vic_intr +ffffffff818a04b0 T vic_query +ffffffff818a0710 T vic_alloc_data +ffffffff818a0a10 T vic_tick +ffffffff818a0a80 T vic_ioctl +ffffffff818a0cb0 T vic_start +ffffffff818a1010 T vic_watchdog +ffffffff818a1040 T vic_media_change +ffffffff818a1070 T vic_media_status +ffffffff818a1130 T vic_read +ffffffff818a1150 T vic_read_cmd +ffffffff818a11a0 T vic_getlladdr +ffffffff818a1250 T vic_alloc_dmamem +ffffffff818a13c0 T vic_rx_fill +ffffffff818a15b0 T vic_alloc_mbuf +ffffffff818a1670 T vic_init_data +ffffffff818a1a20 T vic_uninit_data +ffffffff818a1bf0 T vic_link_state +ffffffff818a1c70 T vic_write +ffffffff818a1cc0 T vic_rx_proc +ffffffff818a1f20 T vic_tx_proc +ffffffff818a20a0 T vic_iff +ffffffff818a21e0 T vic_setlladdr +ffffffff818a2240 T vic_load_txb +ffffffff818a22f0 T vic_init +ffffffff818a2490 T vic_stop +ffffffff818a25d0 T vic_rxrinfo +ffffffff818a26a0 T vic_free_dmamem +ffffffff818a3000 T vmxnet3_match +ffffffff818a3030 T vmxnet3_attach +ffffffff818a3890 T vmxnet3_intr +ffffffff818a3930 T vmxnet3_intr_event +ffffffff818a39b0 T vmxnet3_intr_intx +ffffffff818a3a20 T vmxnet3_intr_queue +ffffffff818a3ab0 T vmxnet3_dma_init +ffffffff818a3ea0 T vmxnet3_ioctl +ffffffff818a4130 T vmxnet3_start +ffffffff818a44b0 T vmxnet3_watchdog +ffffffff818a4500 T vmxnet3_media_change +ffffffff818a4530 T vmxnet3_media_status +ffffffff818a4640 T vmxnet3_link_state +ffffffff818a4700 T vmxnet3_dma_allocmem +ffffffff818a4850 T vmxnet3_alloc_txring +ffffffff818a4a00 T vmxnet3_alloc_rxring +ffffffff818a4d50 t vmx_dmamem_alloc +ffffffff818a4eb0 T vmxnet3_rxfill_tick +ffffffff818a4f20 T vmxnet3_txinit +ffffffff818a5010 T vmxnet3_rxfill +ffffffff818a5300 T vmxnet3_rxinit +ffffffff818a5440 T vmxnet3_txstop +ffffffff818a5540 T vmxnet3_rxstop +ffffffff818a56a0 T vmxnet3_enable_all_intrs +ffffffff818a5770 T vmxnet3_disable_all_intrs +ffffffff818a5840 T vmxnet3_evintr +ffffffff818a5a10 T vmxnet3_rxintr +ffffffff818a5d80 T vmxnet3_txintr +ffffffff818a5f60 T vmxnet3_init +ffffffff818a62f0 T vmxnet3_rx_csum +ffffffff818a6350 T vmxnet3_iff +ffffffff818a6490 T vmxnet3_stop +ffffffff818a6740 T vmxnet3_reset +ffffffff818a6780 t vmx_kstat_create +ffffffff818a6960 t vmx_kstat_read +ffffffff818a7000 T vmwpvs_match +ffffffff818a7040 T vmwpvs_attach +ffffffff818a7980 T vmwpvs_scsi_cmd +ffffffff818a7df0 T vmwpvs_intx +ffffffff818a7e70 T vmwpvs_msg_task +ffffffff818a80e0 T vmwpvs_intr +ffffffff818a82d0 T vmwpvs_get_config +ffffffff818a84d0 T vmwpvs_dmamem_zalloc +ffffffff818a8530 T vmwpvs_dmamem_alloc +ffffffff818a86b0 T vmwpvs_ccb_put +ffffffff818a8710 T vmwpvs_setup_rings +ffffffff818a8820 T vmwpvs_setup_msg_ring +ffffffff818a88f0 T vmwpvs_ccb_get +ffffffff818a8970 T vmwpvs_dmamem_free +ffffffff818a89f0 T vmwpvs_cmd +ffffffff818a8a90 T vmwpvs_scsi_cmd_done +ffffffff818a8c70 T vmwpvs_scsi_cmd_poll +ffffffff818a9000 T lii_match +ffffffff818a9030 T lii_attach +ffffffff818a9420 T lii_activate +ffffffff818a9520 T lii_reset +ffffffff818a97f0 T lii_spi_configure +ffffffff818a98e0 T lii_eeprom_present +ffffffff818a9970 T lii_eeprom_read +ffffffff818a99a0 T lii_spi_read +ffffffff818a9c60 T lii_read_macaddr +ffffffff818a9dc0 T lii_intr +ffffffff818a9ed0 T lii_alloc_rings +ffffffff818aa0e0 T lii_tick +ffffffff818aa130 T lii_mii_readreg +ffffffff818aa3d0 T lii_mii_writereg +ffffffff818aa670 T lii_mii_statchg +ffffffff818aa6e0 T lii_media_change +ffffffff818aa730 T lii_media_status +ffffffff818aa790 T lii_ioctl +ffffffff818aa920 T lii_start +ffffffff818aaad0 T lii_watchdog +ffffffff818aab10 T lii_stop +ffffffff818aab80 T lii_init +ffffffff818ab070 T lii_iff +ffffffff818ab1b0 T lii_tx_put +ffffffff818ab2c0 T lii_free_tx_space +ffffffff818ab300 T lii_rxintr +ffffffff818ab4b0 T lii_txintr +ffffffff818ac000 T ichiic_match +ffffffff818ac030 T ichiic_attach +ffffffff818ac220 T ichiic_intr +ffffffff818ac340 T ichiic_i2c_acquire_bus +ffffffff818ac3a0 T ichiic_i2c_release_bus +ffffffff818ac3f0 T ichiic_i2c_exec +ffffffff818ad000 T viapm_match +ffffffff818ad030 T viapm_attach +ffffffff818ad680 T viapm_intr +ffffffff818ad790 T viapm_i2c_acquire_bus +ffffffff818ad7f0 T viapm_i2c_release_bus +ffffffff818ad840 T viapm_i2c_exec +ffffffff818adb50 T viapm_refresh_sensor_data +ffffffff818ade50 T viapm_refresh +ffffffff818ade80 T val_to_uK +ffffffff818adf20 T val_to_rpm +ffffffff818adf60 T val_to_uV +ffffffff818ae000 T viapm_get_timecount +ffffffff818af000 T amdiic_match +ffffffff818af030 T amdiic_attach +ffffffff818af200 T amdiic_intr +ffffffff818af2d0 T amdiic_i2c_acquire_bus +ffffffff818af330 T amdiic_i2c_release_bus +ffffffff818af380 T amdiic_i2c_exec +ffffffff818af5e0 T amdiic_read +ffffffff818af750 T amdiic_wait +ffffffff818af7f0 T amdiic_write +ffffffff818b0000 T nviic_match +ffffffff818b0030 T nviic_attach +ffffffff818b0270 T nviic_i2c_acquire_bus +ffffffff818b02c0 T nviic_i2c_release_bus +ffffffff818b0310 T nviic_i2c_exec +ffffffff818b05a0 T nviic_write +ffffffff818b05f0 T nviic_read +ffffffff818b1000 T sdhc_pci_match +ffffffff818b1060 T sdhc_pci_attach +ffffffff818b13a0 T sdhc_pci_activate +ffffffff818b1400 T sdhc_takecontroller +ffffffff818b14a0 T sdhc_ricohfix +ffffffff818b1610 T sdhc_pci_conf_write +ffffffff818b2000 T kate_match +ffffffff818b2170 T kate_attach +ffffffff818b24b0 T kate_refresh +ffffffff818b3000 T km_match +ffffffff818b3050 T km_attach +ffffffff818b30f0 T km_refresh +ffffffff818b4000 T ksmn_match +ffffffff818b4050 T ksmn_attach +ffffffff818b4240 T ksmn_ccd_attach +ffffffff818b4390 T ksmn_refresh +ffffffff818b44e0 T ksmn_read_reg +ffffffff818b5000 t iosf_pci_match +ffffffff818b5060 t iosf_pci_attach +ffffffff818b5100 t iosf_pci_mbi_mdr_rd +ffffffff818b5160 t iosf_pci_mbi_mdr_wr +ffffffff818b6000 T itherm_probe +ffffffff818b6030 T itherm_attach +ffffffff818b63e0 T itherm_activate +ffffffff818b6460 T itherm_enable +ffffffff818b64c0 T itherm_refresh +ffffffff818b64d0 T itherm_refresh_sensor_data +ffffffff818b68c0 T itherm_bias_temperature_sensor +ffffffff818b7000 T pchtemp_match +ffffffff818b7030 T pchtemp_attach +ffffffff818b71a0 T pchtemp_refresh +ffffffff818b8000 T rtsx_pci_match +ffffffff818b8080 T rtsx_pci_attach +ffffffff818b9000 T xspd_match +ffffffff818b9030 T xspd_attach +ffffffff818b91f0 T xspd_intr +ffffffff818ba000 T virtio_pci_match +ffffffff818ba080 T virtio_pci_attach +ffffffff818ba420 T virtio_pci_detach +ffffffff818ba500 T virtio_pci_kick +ffffffff818ba560 T virtio_pci_read_device_config_1 +ffffffff818ba590 T virtio_pci_read_device_config_2 +ffffffff818ba5c0 T virtio_pci_read_device_config_4 +ffffffff818ba5f0 T virtio_pci_read_device_config_8 +ffffffff818ba670 T virtio_pci_write_device_config_1 +ffffffff818ba6a0 T virtio_pci_write_device_config_2 +ffffffff818ba6d0 T virtio_pci_write_device_config_4 +ffffffff818ba700 T virtio_pci_write_device_config_8 +ffffffff818ba770 T virtio_pci_read_queue_size +ffffffff818ba7e0 T virtio_pci_setup_queue +ffffffff818baac0 T virtio_pci_set_status +ffffffff818babf0 T virtio_pci_negotiate_features +ffffffff818bad30 T virtio_pci_poll_intr +ffffffff818bada0 T virtio_pci_find_cap +ffffffff818baf40 T virtio_pci_attach_10 +ffffffff818bb3a0 T virtio_pci_attach_09 +ffffffff818bb4e0 T virtio_pci_adjust_config_region +ffffffff818bb580 T virtio_pci_setup_msix +ffffffff818bb910 T virtio_pci_legacy_intr +ffffffff818bb9b0 T virtio_pci_legacy_intr_mpsafe +ffffffff818bba40 T virtio_pci_free_irqs +ffffffff818bbc80 T virtio_pci_negotiate_features_10 +ffffffff818bbeb0 T virtio_pci_msix_establish +ffffffff818bbf80 T virtio_pci_set_msix_queue_vector +ffffffff818bc000 T virtio_pci_set_msix_config_vector +ffffffff818bc040 T virtio_pci_config_intr +ffffffff818bc080 T virtio_pci_shared_queue_intr +ffffffff818bc090 T virtio_pci_queue_intr +ffffffff818bd000 T dwiic_pci_match +ffffffff818bd030 T dwiic_pci_attach +ffffffff818bd350 T dwiic_pci_activate +ffffffff818bd3c0 T dwiic_pci_bus_scan +ffffffff818be000 T bwfm_pci_buscore_read +ffffffff818be060 T bwfm_pci_buscore_write +ffffffff818be0d0 T bwfm_pci_buscore_prepare +ffffffff818be100 T bwfm_pci_buscore_reset +ffffffff818be2f0 T bwfm_pci_buscore_activate +ffffffff818be320 T bwfm_pci_preinit +ffffffff818bf130 T bwfm_pci_stop +ffffffff818bf1c0 T bwfm_pci_txcheck +ffffffff818bf280 T bwfm_pci_txdata +ffffffff818bf5d0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818bfa00 T bwfm_pci_msgbuf_set_dcmd +ffffffff818bfa50 T bwfm_pci_match +ffffffff818bfa80 T bwfm_pci_attach +ffffffff818bfcf0 T bwfm_pci_detach +ffffffff818bfd30 T bwfm_pci_activate +ffffffff818bfee0 T bwfm_pci_intr +ffffffff818c0140 T bwfm_pci_select_core +ffffffff818c0220 T bwfm_pci_load_microcode +ffffffff818c06b0 T bwfm_pci_dmamem_alloc +ffffffff818c0850 T bwfm_pci_setup_ring +ffffffff818c0a50 T bwfm_pci_intr_enable +ffffffff818c0aa0 T bwfm_pci_hostready +ffffffff818c0b10 T bwfm_pci_fill_rx_rings +ffffffff818c0b60 T bwfm_pci_dmamem_free +ffffffff818c0bd0 T bwfm_pci_cleanup +ffffffff818c1240 T bwfm_pci_send_mb_data +ffffffff818c1360 T bwfm_pci_intmask +ffffffff818c13a0 T bwfm_pci_pktid_avail +ffffffff818c1420 T bwfm_pci_pktid_new +ffffffff818c1570 T bwfm_pci_pktid_free +ffffffff818c1620 T bwfm_pci_fill_rx_buf_ring +ffffffff818c1960 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818c1cc0 T bwfm_pci_ring_write_reserve +ffffffff818c1db0 T bwfm_pci_ring_write_cancel +ffffffff818c1df0 T bwfm_pci_ring_write_commit +ffffffff818c1ed0 T bwfm_pci_ring_write_rptr +ffffffff818c1f50 T bwfm_pci_ring_write_wptr +ffffffff818c1fd0 T bwfm_pci_setup_flowring +ffffffff818c2120 T bwfm_pci_ring_bell +ffffffff818c2160 T bwfm_pci_ring_update_rptr +ffffffff818c2210 T bwfm_pci_ring_update_wptr +ffffffff818c22c0 T bwfm_pci_ring_write_reserve_multi +ffffffff818c23e0 T bwfm_pci_ring_read_avail +ffffffff818c24e0 T bwfm_pci_ring_read_commit +ffffffff818c2570 T bwfm_pci_ring_rx +ffffffff818c2770 T bwfm_pci_msg_rx +ffffffff818c2d50 T bwfm_pci_flowring_delete_cb +ffffffff818c2e00 T bwfm_pci_msgbuf_rxioctl +ffffffff818c2ef0 T bwfm_pci_intr_status +ffffffff818c2f30 T bwfm_pci_intr_ack +ffffffff818c2f70 T bwfm_pci_flowring_lookup +ffffffff818c30e0 T bwfm_pci_flowring_create +ffffffff818c3210 T bwfm_pci_flowring_create_cb +ffffffff818c3550 T bwfm_pci_flowring_delete +ffffffff818c3820 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818c3a30 T bwfm_pci_handle_mb_data +ffffffff818c3b00 T bwfm_pci_intr_disable +ffffffff818c4000 T ccp_pci_match +ffffffff818c4030 T ccp_pci_attach +ffffffff818c5000 T bnxt_match +ffffffff818c5030 T bnxt_attach +ffffffff818c5be0 T bnxt_dmamem_alloc +ffffffff818c5d70 T bnxt_dmamem_free +ffffffff818c5e00 T bnxt_hwrm_ver_get +ffffffff818c5f50 T bnxt_hwrm_nvm_get_dev_info +ffffffff818c60a0 T bnxt_hwrm_func_drv_rgtr +ffffffff818c61c0 T bnxt_hwrm_func_rgtr_async_events +ffffffff818c62e0 T bnxt_hwrm_func_qcaps +ffffffff818c63c0 T bnxt_admin_intr +ffffffff818c65b0 T bnxt_intr +ffffffff818c6a60 T bnxt_hwrm_func_qcfg +ffffffff818c6b10 T bnxt_hwrm_queue_qportcfg +ffffffff818c6be0 T bnxt_hwrm_func_reset +ffffffff818c6c90 T bnxt_mark_cpr_invalid +ffffffff818c6cf0 T bnxt_hwrm_ring_alloc +ffffffff818c6ea0 T bnxt_cfg_async_cr +ffffffff818c6fa0 T bnxt_write_cp_doorbell +ffffffff818c6fe0 T bnxt_set_cp_ring_aggint +ffffffff818c70c0 T bnxt_ioctl +ffffffff818c7250 T bnxt_start +ffffffff818c77d0 T bnxt_watchdog +ffffffff818c7800 T bnxt_media_change +ffffffff818c7950 T bnxt_media_status +ffffffff818c7970 T bnxt_refill +ffffffff818c79d0 T bnxt_media_autonegotiate +ffffffff818c7ac0 T bnxt_hwrm_port_phy_qcfg +ffffffff818c7f40 T bnxt_free_slots +ffffffff818c7fe0 T bnxt_hwrm_cmd_hdr_init +ffffffff818c8030 T hwrm_send_message +ffffffff818c80b0 T bnxt_queue_up +ffffffff818c8c30 T bnxt_hwrm_stat_ctx_alloc +ffffffff818c8d30 T bnxt_write_tx_doorbell +ffffffff818c8da0 T bnxt_write_rx_doorbell +ffffffff818c8e20 T bnxt_hwrm_ring_grp_alloc +ffffffff818c8f20 T bnxt_rx_fill +ffffffff818c9030 T bnxt_hwrm_ring_grp_free +ffffffff818c9110 T bnxt_hwrm_ring_free +ffffffff818c9200 T bnxt_hwrm_stat_ctx_free +ffffffff818c92f0 T bnxt_queue_down +ffffffff818c9a10 T bnxt_up +ffffffff818c9fa0 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818ca080 T bnxt_hwrm_vnic_alloc +ffffffff818ca180 T bnxt_hwrm_vnic_cfg +ffffffff818ca2c0 T bnxt_hwrm_vnic_cfg_placement +ffffffff818ca390 T bnxt_hwrm_set_filter +ffffffff818ca520 T bnxt_hwrm_vnic_rss_cfg +ffffffff818ca600 T bnxt_iff +ffffffff818ca770 T bnxt_hwrm_vnic_free +ffffffff818ca860 T bnxt_hwrm_vnic_ctx_free +ffffffff818ca950 T bnxt_down +ffffffff818cad20 T bnxt_hwrm_free_filter +ffffffff818cae00 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff818caee0 T bnxt_rxrinfo +ffffffff818cb030 T bnxt_get_sffpage +ffffffff818cb340 T bnxt_load_mbuf +ffffffff818cb3f0 T bnxt_handle_async_event +ffffffff818cb440 T bnxt_cpr_next_cmpl +ffffffff818cb4b0 T bnxt_cpr_commit +ffffffff818cb4e0 T bnxt_cpr_rollback +ffffffff818cb510 T bnxt_write_cp_doorbell_index +ffffffff818cb590 T bnxt_rx +ffffffff818cb830 T bnxt_txeof +ffffffff818cb960 T bnxt_get_media_type +ffffffff818cbec0 T bnxt_add_media_type +ffffffff818cc080 T _hwrm_send_message +ffffffff818ceda0 T bnxt_rx_fill_slots +ffffffff818cef80 T bnxt_hwrm_err_map +ffffffff818cefc0 T _bnxt_hwrm_set_async_event_bit +ffffffff818d0000 t mcx_match +ffffffff818d0030 t mcx_attach +ffffffff818d0c40 T mcx_rx_fill +ffffffff818d0e90 T mcx_load_mbuf +ffffffff818d0f40 t mcx_dmamem_alloc +ffffffff818d10a0 t mcx_init_wait +ffffffff818d1130 t mcx_enable_hca +ffffffff818d1310 t mcx_issi +ffffffff818d1680 t mcx_pages +ffffffff818d1f60 t mcx_hca_max_caps +ffffffff818d24e0 t mcx_hca_set_caps +ffffffff818d29c0 t mcx_init_hca +ffffffff818d2b90 t mcx_set_driver_version +ffffffff818d2ef0 t mcx_iff +ffffffff818d3330 t mcx_alloc_uar +ffffffff818d3520 t mcx_alloc_pd +ffffffff818d3700 t mcx_alloc_tdomain +ffffffff818d38e0 t mcx_admin_intr +ffffffff818d3a90 t mcx_create_eq +ffffffff818d4030 t mcx_query_nic_vport_context +ffffffff818d43e0 t mcx_query_special_contexts +ffffffff818d45c0 t mcx_set_port_mtu +ffffffff818d46d0 t mcx_ioctl +ffffffff818d69a0 t mcx_start +ffffffff818d6ea0 t mcx_watchdog +ffffffff818d6ed0 t mcx_media_change +ffffffff818d7190 t mcx_media_status +ffffffff818d72e0 t mcx_media_add_types +ffffffff818d7400 t mcx_refill +ffffffff818d7470 t mcx_cq_intr +ffffffff818d7a50 t mcx_calibrate +ffffffff818d7bf0 t mcx_port_change +ffffffff818d7d40 t mcx_kstat_attach +ffffffff818d8110 t mcx_teardown_hca +ffffffff818d8300 t mcx_dmamem_free +ffffffff818d8370 t mcx_set_issi +ffffffff818d8520 t mcx_set_flow_table_entry_mac +ffffffff818d89f0 t mcx_delete_flow_table_entry +ffffffff818d8e70 t mcx_access_hca_reg +ffffffff818d9280 t mcx_cmdq_exec +ffffffff818d9500 t mcx_down +ffffffff818da4c0 t mcx_create_flow_table +ffffffff818da870 t mcx_create_flow_group +ffffffff818dad40 t mcx_set_flow_table_root +ffffffff818db0c0 t mcx_create_rqt +ffffffff818db4c0 t mcx_create_tir_direct +ffffffff818db7e0 t mcx_create_tir_indirect +ffffffff818dbb20 t mcx_set_flow_table_entry_proto +ffffffff818dc000 t mcx_ready_sq +ffffffff818dc390 t mcx_ready_rq +ffffffff818dc720 t mcx_calibrate_first +ffffffff818dc810 t mcx_create_rq +ffffffff818dcd20 t mcx_destroy_sq +ffffffff818dcfd0 t mcx_destroy_cq +ffffffff818dd290 t mcx_destroy_flow_table +ffffffff818dd600 t mcx_kstat_attach_ppcnt +ffffffff818dd730 t mcx_kstat_ppcnt_read +ffffffff818dd850 t mcx_kstat_mtmp_read +ffffffff818dd9e0 t mcx_kstat_queue_read +ffffffff818de9a0 t mcx_timecounter_read +ffffffff818df000 t iavf_match +ffffffff818df030 t iavf_attach +ffffffff818df8a0 t iavf_reset +ffffffff818dfb60 t iavf_dmamem_alloc +ffffffff818dfcc0 t iavf_arq_fill +ffffffff818dff80 t iavf_arq_timeout +ffffffff818dffb0 t iavf_init_admin_queue +ffffffff818e0160 t iavf_get_version +ffffffff818e0360 t iavf_get_vf_resources +ffffffff818e0530 t iavf_config_irq_map +ffffffff818e0710 t iavf_intr +ffffffff818e0d90 t iavf_ioctl +ffffffff818e12f0 t iavf_start +ffffffff818e1650 t iavf_watchdog +ffffffff818e1680 t iavf_media_change +ffffffff818e16b0 t iavf_media_status +ffffffff818e1740 t iavf_dmamem_free +ffffffff818e17b0 t iavf_arq_unfill +ffffffff818e18b0 t iavf_down +ffffffff818e1c40 t iavf_up +ffffffff818e2610 t iavf_queue_select +ffffffff818e2800 t iavf_txr_free +ffffffff818e2900 t iavf_rxr_free +ffffffff818e2a10 t iavf_rxfill +ffffffff818e2d20 t iavf_rxrefill +ffffffff818e2d40 t iavf_process_arq +ffffffff818e31c0 t iavf_add_del_addr +ffffffff818e4000 T rge_match +ffffffff818e4030 T rge_attach +ffffffff818e44c0 T rge_activate +ffffffff818e4600 T rge_intr +ffffffff818e48f0 T rge_config_imtype +ffffffff818e4960 T rge_chipinit +ffffffff818e4a70 T rge_get_macaddr +ffffffff818e4c40 T rge_allocmem +ffffffff818e5040 T rge_ioctl +ffffffff818e51f0 T rge_start +ffffffff818e53d0 T rge_watchdog +ffffffff818e5410 T rge_wol +ffffffff818e5640 T rge_tick +ffffffff818e56c0 T rge_txstart +ffffffff818e56f0 T rge_ifmedia_upd +ffffffff818e5cc0 T rge_ifmedia_sts +ffffffff818e5db0 T rge_add_media_types +ffffffff818e5e60 T rge_kstat_attach +ffffffff818e6140 T rge_wol_power +ffffffff818e6220 T rge_rxeof +ffffffff818e6660 T rge_txeof +ffffffff818e6870 T rge_init +ffffffff818e7f20 T rge_setup_intr +ffffffff818e8090 T rge_encap +ffffffff818e8360 T rge_stop +ffffffff818e8640 T rge_iff +ffffffff818e87c0 T rge_set_macaddr +ffffffff818e8890 T rge_rx_list_init +ffffffff818e8950 T rge_tx_list_init +ffffffff818e8a20 T rge_phy_config +ffffffff818e96d0 T rge_disable_aspm_clkreq +ffffffff818e97d0 T rge_read_csi +ffffffff818e9880 T rge_write_csi +ffffffff818e9950 T rge_write_mac_ocp +ffffffff818e99a0 T rge_read_mac_ocp +ffffffff818e9a20 T rge_hw_reset +ffffffff818e9b20 T rge_write_phy_ocp +ffffffff818e9be0 T rge_read_phy_ocp +ffffffff818e9c90 T rge_read_phy +ffffffff818e9d60 T rge_write_phy +ffffffff818e9e40 T rge_get_link_status +ffffffff818e9ea0 T rge_newbuf +ffffffff818ea030 T rge_discard_rxbuf +ffffffff818ea0a0 T rge_fill_rx_ring +ffffffff818ea120 T rge_reset +ffffffff818ea390 T rge_exit_oob +ffffffff818eab90 T rge_set_phy_power +ffffffff818eadf0 T rge_hw_init +ffffffff818eb540 T rge_ephy_config +ffffffff818eb590 T rge_ephy_config_mac_cfg3 +ffffffff818eb7e0 T rge_ephy_config_mac_cfg5 +ffffffff818eb8c0 T rge_write_ephy +ffffffff818ebb20 T rge_read_ephy +ffffffff818ebda0 T rge_phy_config_mac_cfg3 +ffffffff818ed8d0 T rge_phy_config_mac_cfg5 +ffffffff818ee420 T rge_patch_phy_mcu +ffffffff818ee740 T rge_phy_config_mcu +ffffffff818eef40 T rge_switch_mcu_ram_page +ffffffff818eefd0 T rge_disable_phy_ocp_pwrsave +ffffffff818ef1a0 T rge_disable_hw_im +ffffffff818ef1d0 T rge_disable_sim_im +ffffffff818ef230 T rge_setup_sim_im +ffffffff818ef2b0 T rge_link_state +ffffffff818ef330 t rge_kstat_read +ffffffff818ef4d0 t rge_kstat_copy +ffffffff818f0000 T igc_match +ffffffff818f0030 T igc_attach +ffffffff818f0360 T igc_detach +ffffffff818f0550 T igc_identify_hardware +ffffffff818f05c0 T igc_allocate_pci_resources +ffffffff818f06e0 T igc_allocate_queues +ffffffff818f0bd0 T igc_is_valid_ether_addr +ffffffff818f0c30 T igc_allocate_msix +ffffffff818f0e70 T igc_setup_interface +ffffffff818f10b0 T igc_reset +ffffffff818f11f0 T igc_update_link_status +ffffffff818f1300 T igc_get_hw_control +ffffffff818f1360 T igc_release_hw_control +ffffffff818f13c0 T igc_free_pci_resources +ffffffff818f14a0 T igc_stop +ffffffff818f17a0 T igc_free_transmit_structures +ffffffff818f1820 T igc_free_receive_structures +ffffffff818f18d0 T igc_setup_msix +ffffffff818f1960 T igc_dma_malloc +ffffffff818f1ac0 T igc_rxrefill +ffffffff818f1b90 T igc_dma_free +ffffffff818f1c40 T igc_init_dmac +ffffffff818f1ee0 T igc_intr_queue +ffffffff818f1ff0 T igc_intr_link +ffffffff818f2170 T igc_ioctl +ffffffff818f2450 T igc_start +ffffffff818f2880 T igc_watchdog +ffffffff818f28b0 T igc_media_change +ffffffff818f29c0 T igc_media_status +ffffffff818f2b60 T igc_init +ffffffff818f3050 T igc_setup_transmit_structures +ffffffff818f3110 T igc_initialize_transmit_unit +ffffffff818f3330 T igc_setup_receive_structures +ffffffff818f3490 T igc_initialize_receive_unit +ffffffff818f3880 T igc_iff +ffffffff818f39d0 T igc_configure_queues +ffffffff818f3be0 T igc_rxfill +ffffffff818f3d20 T igc_enable_intr +ffffffff818f3df0 T igc_tx_ctx_setup +ffffffff818f3f00 T igc_txeof +ffffffff818f40c0 T igc_disable_intr +ffffffff818f4160 T igc_rxrinfo +ffffffff818f4290 T igc_get_buf +ffffffff818f43d0 T igc_rxeof +ffffffff818f4770 T igc_rx_checksum +ffffffff818f47c0 T igc_set_queues +ffffffff818f48a0 T igc_enable_queue +ffffffff818f48d0 T igc_allocate_transmit_buffers +ffffffff818f49f0 T igc_setup_transmit_ring +ffffffff818f4b30 T igc_free_transmit_buffers +ffffffff818f4c50 T igc_allocate_receive_buffers +ffffffff818f4d80 T igc_setup_receive_ring +ffffffff818f4e40 T igc_initialize_rss_mapping +ffffffff818f5060 T igc_free_receive_buffers +ffffffff818f6000 T igc_init_mac_params +ffffffff818f6040 T igc_init_nvm_params +ffffffff818f6080 T igc_init_phy_params +ffffffff818f60c0 T igc_set_mac_type +ffffffff818f6160 T igc_setup_init_funcs +ffffffff818f62c0 T igc_update_mc_addr_list +ffffffff818f6300 T igc_check_for_link +ffffffff818f6340 T igc_reset_hw +ffffffff818f6380 T igc_init_hw +ffffffff818f63c0 T igc_get_speed_and_duplex +ffffffff818f6400 T igc_rar_set +ffffffff818f6440 T igc_check_reset_block +ffffffff818f6480 T igc_get_phy_info +ffffffff818f64c0 T igc_phy_hw_reset +ffffffff818f6500 T igc_read_mac_addr +ffffffff818f6530 T igc_validate_nvm_checksum +ffffffff818f7000 T igc_acquire_phy_base +ffffffff818f7030 T igc_release_phy_base +ffffffff818f7060 T igc_init_hw_base +ffffffff818f7150 T igc_power_down_phy_copper_base +ffffffff818f8000 T igc_init_nvm_params_i225 +ffffffff818f8170 T igc_acquire_nvm_i225 +ffffffff818f8240 T igc_release_nvm_i225 +ffffffff818f82b0 T igc_get_flash_presence_i225 +ffffffff818f8300 T igc_read_nvm_srrd_i225 +ffffffff818f83e0 T igc_write_nvm_srwr_i225 +ffffffff818f85a0 T igc_validate_nvm_checksum_i225 +ffffffff818f8630 T igc_update_nvm_checksum_i225 +ffffffff818f87c0 T igc_init_mac_params_i225 +ffffffff818f8880 T igc_reset_hw_i225 +ffffffff818f89a0 T igc_init_hw_i225 +ffffffff818f89b0 T igc_check_for_link_i225 +ffffffff818f8a70 T igc_acquire_swfw_sync_i225 +ffffffff818f8b50 T igc_release_swfw_sync_i225 +ffffffff818f8bd0 T igc_setup_copper_link_i225 +ffffffff818f8c60 T igc_init_phy_params_i225 +ffffffff818f8d40 T igc_get_hw_semaphore_i225 +ffffffff818f8ef0 T __igc_write_nvm_srwr +ffffffff818f9020 T igc_update_flash_i225 +ffffffff818f93f0 T igc_set_flsw_flash_burst_counter_i225 +ffffffff818f9450 T igc_write_erase_flash_command_i225 +ffffffff818f9550 T igc_pool_flash_update_done_i225 +ffffffff818f95e0 T igc_set_ltr_i225 +ffffffff818f9850 T igc_init_function_pointers_i225 +ffffffff818f98c0 T igc_set_eee_i225 +ffffffff818fa000 T igc_init_mac_ops_generic +ffffffff818fa050 T igc_null_ops_generic +ffffffff818fa080 T igc_config_collision_dist_generic +ffffffff818fa0f0 T igc_rar_set_generic +ffffffff818fa1d0 T igc_write_vfta_generic +ffffffff818fa220 T igc_init_rx_addrs_generic +ffffffff818fa2c0 T igc_check_alt_mac_addr_generic +ffffffff818fa440 T igc_hash_mc_addr_generic +ffffffff818fa4e0 T igc_update_mc_addr_list_generic +ffffffff818fa630 T igc_clear_hw_cntrs_base_generic +ffffffff818faa20 T igc_setup_link_generic +ffffffff818fabb0 T igc_set_fc_watermarks_generic +ffffffff818fac60 T igc_force_mac_fc_generic +ffffffff818fad20 T igc_config_fc_after_link_up_generic +ffffffff818faeb0 T igc_get_speed_and_duplex_copper_generic +ffffffff818faf50 T igc_put_hw_semaphore_generic +ffffffff818fafa0 T igc_get_auto_rd_done_generic +ffffffff818fb1f0 T igc_disable_pcie_master_generic +ffffffff818fc000 T igc_init_nvm_ops_generic +ffffffff818fc080 T igc_null_read_nvm +ffffffff818fc0b0 T igc_null_nvm_generic +ffffffff818fc0e0 T igc_reload_nvm_generic +ffffffff818fc160 T igc_null_write_nvm +ffffffff818fc190 T igc_poll_eerd_eewr_done +ffffffff818fc230 T igc_read_nvm_eerd +ffffffff818fc360 T igc_read_mac_addr_generic +ffffffff818fc440 T igc_validate_nvm_checksum_generic +ffffffff818fd000 T igc_init_phy_ops_generic +ffffffff818fd0f0 T igc_null_set_page +ffffffff818fd120 T igc_null_read_reg +ffffffff818fd150 T igc_null_phy_generic +ffffffff818fd180 T igc_null_lplu_state +ffffffff818fd1b0 T igc_null_write_reg +ffffffff818fd1e0 T igc_check_reset_block_generic +ffffffff818fd240 T igc_get_phy_id +ffffffff818fd2f0 T igc_read_phy_reg_mdic +ffffffff818fd400 T igc_write_phy_reg_mdic +ffffffff818fd500 T igc_phy_setup_autoneg +ffffffff818fd700 T igc_copper_link_autoneg +ffffffff818fd830 T igc_wait_autoneg +ffffffff818fd8f0 T igc_setup_copper_link_generic +ffffffff818fda00 T igc_phy_has_link_generic +ffffffff818fdb10 T igc_check_downshift_generic +ffffffff818fdb40 T igc_phy_hw_reset_generic +ffffffff818fdce0 T igc_power_up_phy_copper +ffffffff818fdd70 T igc_power_down_phy_copper +ffffffff818fde00 T igc_write_phy_reg_gpy +ffffffff818fe000 T igc_write_xmdio_reg +ffffffff818fe100 T igc_read_phy_reg_gpy +ffffffff818fe300 T igc_read_xmdio_reg +ffffffff818fe3f0 T __igc_access_xmdio_reg +ffffffff818ff000 T ngbe_match +ffffffff818ff030 T ngbe_attach +ffffffff818ff540 T ngbe_detach +ffffffff818ff790 T ngbe_allocate_pci_resources +ffffffff818ff890 T ngbe_allocate_queues +ffffffff818ffd90 T ngbe_allocate_isb +ffffffff818ffe20 T ngbe_init_shared_code +ffffffff819000f0 T ngbe_check_flash_load +ffffffff81900390 T ngbe_allocate_msix +ffffffff819005b0 T ngbe_setup_interface +ffffffff819007c0 T ngbe_free_isb +ffffffff819008a0 T ngbe_free_transmit_structures +ffffffff81900920 T ngbe_free_receive_structures +ffffffff819009d0 T ngbe_free_pci_resources +ffffffff81900a60 T ngbe_stop +ffffffff81900fd0 T ngbe_release_hw_control +ffffffff81901050 T ngbe_init +ffffffff81901560 T ngbe_setup_isb +ffffffff819015d0 T ngbe_configure_pb +ffffffff819016b0 T ngbe_iff +ffffffff819018a0 T ngbe_setup_vlan_hw_support +ffffffff81901960 T ngbe_setup_transmit_structures +ffffffff81901a20 T ngbe_initialize_transmit_unit +ffffffff81901da0 T ngbe_setup_receive_structures +ffffffff81901ea0 T ngbe_initialize_receive_unit +ffffffff81902360 T ngbe_get_hw_control +ffffffff819023e0 T ngbe_setup_gpie +ffffffff81902410 T ngbe_configure_ivars +ffffffff81902630 T ngbe_non_sfp_link_config +ffffffff819026e0 T ngbe_enable_intr +ffffffff81902890 t NGBE_WRITE_REG_MASK +ffffffff81902930 T ngbe_ioctl +ffffffff81902b90 T ngbe_rxrinfo +ffffffff81902ce0 T ngbe_disable_intr +ffffffff81902da0 T ngbe_media_change +ffffffff81902e40 T ngbe_media_status +ffffffff81902f50 T ngbe_update_link_status +ffffffff81903180 T ngbe_rxfill +ffffffff819032c0 T ngbe_get_buf +ffffffff819033f0 T ngbe_start +ffffffff819035a0 T ngbe_encap +ffffffff819037c0 T ngbe_disable_pcie_master +ffffffff81903880 T ngbe_reset +ffffffff819038e0 T ngbe_set_rx_drop_en +ffffffff819039f0 T ngbe_watchdog +ffffffff81903ac0 T ngbe_setup_msix +ffffffff81903b50 T ngbe_intr_queue +ffffffff81903c50 T ngbe_intr_link +ffffffff81903d40 T ngbe_dma_malloc +ffffffff81903ea0 T ngbe_dma_free +ffffffff81903f50 T ngbe_rxrefill +ffffffff81904000 T ngbe_free_receive_buffers +ffffffff81904110 T ngbe_free_transmit_buffers +ffffffff81904230 T ngbe_allocate_receive_buffers +ffffffff81904360 T ngbe_allocate_transmit_buffers +ffffffff81904480 T ngbe_setup_receive_ring +ffffffff81904570 T ngbe_setup_transmit_ring +ffffffff819046b0 T ngbe_addr_list_itr +ffffffff819046f0 T ngbe_setup_psrtype +ffffffff81904720 T ngbe_initialize_rss_mapping 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dma_resv_wait_timeout +ffffffff8190e360 T dma_resv_test_signaled +ffffffff8190e4b0 T dma_resv_describe +ffffffff8190f000 T drm_legacy_agp_info +ffffffff8190f0b0 T drm_legacy_agp_acquire +ffffffff8190f120 T drm_legacy_agp_release +ffffffff8190f180 T drm_legacy_agp_enable +ffffffff8190f1f0 T drm_legacy_agp_takedown +ffffffff8190f260 T drm_legacy_agp_init +ffffffff81910000 T devm_aperture_acquire_from_firmware +ffffffff81910050 T drm_aperture_remove_conflicting_framebuffers +ffffffff81910080 T drm_aperture_remove_conflicting_pci_framebuffers +ffffffff81911000 T __drm_crtc_commit_free +ffffffff81911020 T drm_crtc_commit_wait +ffffffff819111c0 T drm_atomic_state_default_release +ffffffff81911220 T drm_atomic_state_init +ffffffff81911340 T drm_atomic_state_alloc +ffffffff819113e0 T drm_atomic_state_default_clear +ffffffff819116e0 T drm_atomic_state_clear +ffffffff81911710 T __drm_atomic_state_free +ffffffff819117e0 T drm_atomic_get_crtc_state +ffffffff81911930 T drm_atomic_get_plane_state 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drm_atomic_set_crtc_for_connector +ffffffff8191e860 T drm_atomic_get_property +ffffffff8191efc0 T drm_atomic_connector_commit_dpms +ffffffff8191f100 T drm_atomic_set_property +ffffffff8191fc00 T drm_mode_atomic_ioctl +ffffffff819200a0 t prepare_signaling +ffffffff81920530 t complete_signaling +ffffffff81920700 t drm_atomic_replace_property_blob_from_id +ffffffff81920870 t drm_atomic_set_writeback_fb_for_connector +ffffffff819208e0 t set_out_fence_for_connector +ffffffff81921000 T drm_is_current_master +ffffffff81921060 T drm_getmagic +ffffffff81921130 T drm_authmagic +ffffffff819211f0 T drm_master_create +ffffffff81921290 T drm_setmaster_ioctl +ffffffff81921350 t drm_new_set_master +ffffffff819214e0 T drm_dropmaster_ioctl +ffffffff819215c0 t drm_drop_master +ffffffff81921670 T drm_master_open +ffffffff81921720 T drm_master_get +ffffffff81921750 T drm_master_release +ffffffff81921830 T drm_master_put +ffffffff819218c0 T drm_file_get_master +ffffffff81921920 T drm_master_internal_acquire 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drm_atomic_bridge_chain_enable +ffffffff81923c70 T drm_atomic_bridge_chain_check +ffffffff81924000 T drm_bridge_detect +ffffffff81924060 T drm_bridge_get_modes +ffffffff819240c0 T drm_bridge_get_edid +ffffffff81924120 T drm_bridge_hpd_enable +ffffffff819241f0 T drm_bridge_hpd_disable +ffffffff81924290 T drm_bridge_hpd_notify +ffffffff819242f0 t drm_bridge_atomic_duplicate_priv_state +ffffffff81924310 t drm_bridge_atomic_destroy_priv_state +ffffffff81924330 t select_bus_fmt_recursive +ffffffff81925000 T drm_buddy_init +ffffffff81925470 T drm_buddy_fini +ffffffff81925560 T drm_get_buddy +ffffffff819255a0 T drm_buddy_free_block +ffffffff819255f0 t __drm_buddy_free +ffffffff81925740 T drm_buddy_free_list +ffffffff81925800 T drm_buddy_block_trim +ffffffff81925a60 t __alloc_range +ffffffff81925d40 T drm_buddy_alloc_blocks +ffffffff81926350 t __drm_buddy_alloc_range +ffffffff819263e0 T drm_buddy_block_print +ffffffff81926420 T drm_buddy_print +ffffffff81926590 T drm_buddy_module_exit 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drm_client_rotation +ffffffff8192ae20 T drm_client_modeset_check +ffffffff8192aec0 t drm_client_modeset_commit_atomic +ffffffff8192b0c0 T drm_client_modeset_commit_locked +ffffffff8192b260 T drm_client_modeset_commit +ffffffff8192b2d0 T drm_client_modeset_dpms +ffffffff8192b520 t drm_connector_pick_cmdline_mode +ffffffff8192c000 T drm_color_ctm_s31_32_to_qm_n +ffffffff8192c0d0 T drm_crtc_enable_color_mgmt +ffffffff8192c1b0 T drm_mode_crtc_set_gamma_size +ffffffff8192c2d0 T drm_mode_gamma_set_ioctl +ffffffff8192c7b0 T drm_mode_gamma_get_ioctl +ffffffff8192c8f0 T drm_get_color_encoding_name +ffffffff8192c960 T drm_get_color_range_name +ffffffff8192c9d0 T drm_plane_create_color_properties +ffffffff8192cc30 T drm_color_lut_check +ffffffff8192d000 T drm_connector_ida_init +ffffffff8192d110 T drm_connector_ida_destroy +ffffffff8192d220 T drm_get_connector_type_name +ffffffff8192d260 T drm_connector_free_work_fn +ffffffff8192d320 T drm_connector_init +ffffffff8192d3a0 t __drm_connector_init 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drm_connector_attach_scaling_mode_property +ffffffff8192f660 T drm_mode_create_aspect_ratio_property +ffffffff8192f6e0 T drm_mode_create_hdmi_colorspace_property +ffffffff8192f700 t drm_mode_create_colorspace_property +ffffffff8192f830 T drm_mode_create_dp_colorspace_property +ffffffff8192f860 T drm_mode_create_suggested_offset_properties +ffffffff8192f930 T drm_connector_set_path_property +ffffffff8192f990 T drm_connector_set_tile_property +ffffffff8192fae0 T drm_connector_set_link_status_property +ffffffff8192fb30 T drm_connector_attach_max_bpc_property +ffffffff8192fbf0 T drm_connector_attach_hdr_output_metadata_property +ffffffff8192fc40 T drm_connector_attach_colorspace_property +ffffffff8192fc90 T drm_connector_atomic_hdr_metadata_equal +ffffffff8192fd00 T drm_connector_set_vrr_capable_property +ffffffff8192fd50 T drm_connector_set_panel_orientation +ffffffff8192fe20 T drm_connector_set_panel_orientation_with_quirk +ffffffff8192ff00 T drm_connector_set_orientation_from_panel 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drm_crtc_init_with_planes +ffffffff81931470 t __drm_crtc_init_with_planes +ffffffff81931870 T drmm_crtc_init_with_planes +ffffffff81931970 T __drmm_crtc_alloc_with_planes +ffffffff81931ae0 T drm_crtc_cleanup +ffffffff81931c00 T drm_mode_getcrtc +ffffffff81931da0 t __drm_mode_set_config_internal +ffffffff81931f50 T drm_crtc_check_viewport +ffffffff81932000 T drm_mode_setcrtc +ffffffff81932780 T drm_mode_crtc_set_obj_prop +ffffffff81932800 T drm_crtc_create_scaling_filter_property +ffffffff81932870 t drm_crtc_fence_get_driver_name +ffffffff819328f0 t drm_crtc_fence_get_timeline_name +ffffffff81932960 t kasprintf +ffffffff81932a30 t drmm_crtc_init_with_planes_cleanup +ffffffff81933000 T drm_helper_encoder_in_use +ffffffff81933180 T drm_helper_crtc_in_use +ffffffff819332b0 T drm_helper_disable_unused_functions +ffffffff81933330 t __drm_helper_disable_unused_functions +ffffffff81933450 T drm_crtc_helper_set_mode +ffffffff819338f0 T drm_crtc_helper_atomic_check +ffffffff81933940 T drm_connector_get_single_encoder +ffffffff81933a20 T drm_crtc_helper_set_config +ffffffff81934660 T drm_helper_connector_dpms +ffffffff81934930 T drm_helper_resume_force_mode +ffffffff81934c30 T drm_helper_force_disable_all +ffffffff81935000 T drm_atomic_helper_check_plane_damage +ffffffff819350a0 T drm_atomic_helper_dirtyfb +ffffffff81935350 T drm_atomic_helper_damage_iter_init +ffffffff819354a0 T drm_atomic_helper_damage_iter_next +ffffffff81935540 T drm_atomic_helper_damage_merged +ffffffff81936000 T displayid_iter_edid_begin +ffffffff81936050 T __displayid_iter_next +ffffffff81936300 T displayid_iter_end +ffffffff81936350 T displayid_version +ffffffff81936380 T displayid_primary_use +ffffffff81937000 T drm_mode_create_dumb +ffffffff819370e0 T drm_mode_create_dumb_ioctl +ffffffff819371c0 T drm_mode_mmap_dumb_ioctl +ffffffff81937230 T drm_mode_destroy_dumb +ffffffff81937280 T drm_mode_destroy_dumb_ioctl +ffffffff81938000 T drm_edid_header_is_valid +ffffffff81938080 T drm_edid_are_equal +ffffffff819380f0 T drm_edid_block_valid +ffffffff81938300 t edid_block_check +ffffffff81938430 t edid_block_status_print +ffffffff81938520 T drm_edid_is_valid +ffffffff819385a0 T drm_edid_valid +ffffffff819386d0 t drm_edid_block_count +ffffffff81938810 T drm_edid_override_show +ffffffff81938860 T drm_edid_override_set +ffffffff81938a00 T drm_edid_alloc +ffffffff81938ac0 T drm_edid_free +ffffffff81938b20 T drm_edid_override_reset +ffffffff81938be0 T drm_edid_override_connector_update +ffffffff81938cb0 t drm_edid_override_get +ffffffff81938da0 T drm_edid_connector_update +ffffffff819391f0 T drm_edid_connector_add_modes +ffffffff81939310 T drm_do_get_edid +ffffffff81939330 t _drm_do_get_edid +ffffffff81939750 T drm_edid_raw +ffffffff819397e0 T drm_edid_dup +ffffffff819398b0 T drm_probe_ddc +ffffffff819399b0 t drm_do_probe_ddc_edid +ffffffff81939b00 T drm_get_edid +ffffffff81939c70 T drm_connector_update_edid_property +ffffffff81939cd0 T drm_edid_read_custom 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drm_add_modes_noedid +ffffffff8193e510 T drm_set_preferred_mode +ffffffff8193e570 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff8193e830 T drm_hdmi_avi_infoframe_quant_range +ffffffff8193e8d0 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff8193e990 t connector_bad_edid +ffffffff8193eb50 t edid_filter_invalid_blocks +ffffffff8193ecf0 t drm_for_each_detailed_block +ffffffff8193ee90 t __cea_db_iter_next +ffffffff8193f0a0 t get_monitor_range +ffffffff8193f140 t do_detailed_mode +ffffffff8193fb50 t do_cvt_mode +ffffffff8193fd90 t drm_mode_std +ffffffff81940770 t do_standard_modes +ffffffff819408b0 t drm_monitor_supports_rb +ffffffff81940cc0 t drm_gtf2_mode +ffffffff81941a70 t drm_gtf2_hbreak +ffffffff81941de0 t do_established_modes +ffffffff81941fe0 t drm_match_hdmi_mode +ffffffff81942160 t do_inferred_modes +ffffffff81942820 t mode_in_range +ffffffff81943000 T drm_encoder_register_all +ffffffff81943080 T drm_encoder_unregister_all +ffffffff819430f0 T drm_encoder_init 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drm_exec_prepare_array +ffffffff819459c0 t dma_resv_lock_slow_interruptible +ffffffff81945af0 t dma_resv_lock_slow +ffffffff81945bd0 t __ww_mutex_lock +ffffffff81946000 T drm_fb_helper_debug_enter +ffffffff81946100 T drm_fb_helper_debug_leave +ffffffff81946270 T drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81946310 t __drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff819463c0 T drm_fb_helper_blank +ffffffff819464b0 T drm_fb_helper_prepare +ffffffff819465a0 t drm_fb_helper_resume_worker +ffffffff819465d0 t drm_fb_helper_damage_work +ffffffff81946730 T drm_fb_helper_unprepare +ffffffff81946760 T drm_fb_helper_init +ffffffff819467d0 T drm_fb_helper_alloc_info +ffffffff81946830 T drm_fb_helper_release_info +ffffffff81946880 T drm_fb_helper_unregister_info +ffffffff819468b0 T drm_fb_helper_fini +ffffffff819469b0 T drm_fb_helper_set_suspend +ffffffff819469e0 T drm_fb_helper_set_suspend_unlocked +ffffffff81946a10 T drm_fb_helper_set_par +ffffffff81946ac0 T drm_fb_helper_pan_display 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drm_fb_xrgb8888_to_xrgb2101010 +ffffffff8194e200 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff8194e280 T drm_fb_xrgb8888_to_argb2101010 +ffffffff8194e2e0 t drm_fb_xrgb8888_to_argb2101010_line +ffffffff8194e370 T drm_fb_xrgb8888_to_gray8 +ffffffff8194e3d0 t drm_fb_xrgb8888_to_gray8_line +ffffffff8194e440 T drm_fb_blit +ffffffff8194eac0 T drm_fb_xrgb8888_to_mono +ffffffff8194ee50 T drm_fb_build_fourcc_list +ffffffff8194f120 t drm_fb_xrgb8888_to_xbgr8888_line +ffffffff8194f200 t drm_fb_xrgb8888_to_abgr8888_line +ffffffff81950000 T drm_mode_legacy_fb_format +ffffffff819500f0 T drm_driver_legacy_fb_format +ffffffff819501f0 T __drm_format_info +ffffffff81950270 T drm_format_info +ffffffff81950320 T drm_get_format_info +ffffffff819503f0 T drm_format_info_block_width +ffffffff81950440 T drm_format_info_block_height +ffffffff81950490 T drm_format_info_bpp +ffffffff81950510 T drm_format_info_min_pitch +ffffffff81951000 T drm_framebuffer_check_src_coords +ffffffff81951120 T drm_mode_addfb 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drm_gem_open +ffffffff81955560 T drm_gem_release +ffffffff819555a0 T drm_gem_object_release +ffffffff819556f0 T drm_gem_lru_remove +ffffffff819557d0 T drm_gem_object_free +ffffffff81955820 T drm_gem_mmap_obj +ffffffff81955920 T drm_gem_mmap +ffffffff81955b90 T drm_gem_print_info +ffffffff81955cb0 T drm_gem_pin +ffffffff81955cf0 T drm_gem_unpin +ffffffff81955d30 T drm_gem_vmap +ffffffff81955d90 T drm_gem_vunmap +ffffffff81955e00 T drm_gem_vmap_unlocked +ffffffff81955ff0 T drm_gem_vunmap_unlocked +ffffffff819561b0 T drm_gem_lock_reservations +ffffffff819565a0 T drm_gem_unlock_reservations +ffffffff81956690 T drm_gem_lru_init +ffffffff819566d0 T drm_gem_lru_move_tail_locked +ffffffff819567d0 T drm_gem_lru_move_tail +ffffffff819568c0 T drm_gem_lru_scan +ffffffff81956ca0 T drm_gem_evict +ffffffff81957000 T drm_gem_plane_helper_prepare_fb +ffffffff81958000 T drm_gem_dma_create +ffffffff81958220 T drm_gem_dma_free_object +ffffffff819582c0 T drm_gem_dma_dumb_create_internal +ffffffff81958400 T drm_gem_dma_dumb_create +ffffffff81958440 T drm_gem_dma_fault +ffffffff819585e0 T drm_gem_dma_get_sg_table +ffffffff81958610 T drm_gem_dma_prime_import_sg_table +ffffffff81958640 T drm_gem_dma_vmap +ffffffff81959000 T drm_gem_fb_destroy +ffffffff819590c0 T drm_gem_fb_create_handle +ffffffff819590e0 T drm_gem_fb_create +ffffffff81959220 T drm_gem_fb_get_obj +ffffffff8195a000 T drm_ht_create +ffffffff8195a080 T drm_ht_verbose_list +ffffffff8195a140 T drm_ht_insert_item +ffffffff8195a190 T drm_ht_just_insert_please +ffffffff8195a260 T drm_ht_find_item +ffffffff8195a2b0 T drm_ht_remove_key +ffffffff8195a300 T drm_ht_remove_item +ffffffff8195a350 T drm_ht_remove +ffffffff8195b000 T drm_getunique +ffffffff8195b0a0 T drm_getclient +ffffffff8195b110 T drm_noop +ffffffff8195b170 T drm_invalid_op +ffffffff8195b1a0 T drm_version +ffffffff8195b3b0 T pledge_ioctl_drm +ffffffff8195b480 T drm_ioctl_kernel +ffffffff8195b4d0 T drm_ioctl +ffffffff8195b520 T drm_ioctl_flags +ffffffff8195b570 T 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kthread_cancel_work_sync +ffffffff8195caa0 T kthread_flush_work +ffffffff8195cae0 T kthread_flush_worker +ffffffff8195cb20 T kthread_lookup +ffffffff8195cba0 T kthread_should_park +ffffffff8195cc20 T kthread_parkme +ffffffff8195cce0 T kthread_park +ffffffff8195cde0 T kthread_unpark +ffffffff8195ce40 T kthread_should_stop +ffffffff8195cec0 T kthread_stop +ffffffff8195d020 T dmi_match +ffffffff8195d0d0 T dmi_first_match +ffffffff8195d1c0 T dmi_get_system_info +ffffffff8195d230 T dmi_check_system +ffffffff8195d330 T alloc_pages +ffffffff8195d400 T __free_pages +ffffffff8195d570 T __pagevec_release +ffffffff8195d610 T kmap +ffffffff8195d650 T kunmap_va +ffffffff8195d670 T kmap_atomic_prot +ffffffff8195d700 T kunmap_atomic +ffffffff8195d780 T vmap +ffffffff8195d860 T vunmap +ffffffff8195d8b0 T is_vmalloc_addr +ffffffff8195d8f0 T print_hex_dump +ffffffff8195d9c0 T memchr_inv +ffffffff8195da30 T panic_cmp +ffffffff8195da50 T linux_root_RB_INSERT_COLOR +ffffffff8195dc50 T linux_root_RB_REMOVE_COLOR +ffffffff8195df80 T linux_root_RB_REMOVE +ffffffff8195e0c0 T linux_root_RB_INSERT +ffffffff8195e130 T linux_root_RB_FIND +ffffffff8195e180 T linux_root_RB_NFIND +ffffffff8195e1d0 T linux_root_RB_NEXT +ffffffff8195e240 T linux_root_RB_PREV +ffffffff8195e2b0 T linux_root_RB_MINMAX +ffffffff8195e300 T idr_init +ffffffff8195e330 T idr_destroy +ffffffff8195e470 T idr_tree_SPLAY_REMOVE +ffffffff8195e4f0 T idr_preload +ffffffff8195e580 T idr_alloc +ffffffff8195e710 T idr_tree_SPLAY_INSERT +ffffffff8195e7b0 T idr_replace +ffffffff8195e830 T idr_remove +ffffffff8195e8f0 T idr_find +ffffffff8195e960 T idr_get_next +ffffffff8195ea90 T idr_for_each +ffffffff8195eba0 T idr_cmp +ffffffff8195ebe0 T idr_tree_SPLAY +ffffffff8195ed10 T idr_tree_SPLAY_MINMAX +ffffffff8195ee00 T ida_init +ffffffff8195ee30 T ida_destroy +ffffffff8195ee40 T ida_simple_get +ffffffff8195ee60 T ida_simple_remove +ffffffff8195ee80 T ida_alloc_min +ffffffff8195eea0 T ida_alloc_max +ffffffff8195eec0 T ida_free +ffffffff8195eee0 T xarray_cmp +ffffffff8195ef20 T xarray_tree_SPLAY_INSERT +ffffffff8195efc0 T xarray_tree_SPLAY +ffffffff8195f0f0 T xarray_tree_SPLAY_REMOVE +ffffffff8195f170 T xarray_tree_SPLAY_MINMAX +ffffffff8195f260 T xa_init_flags +ffffffff8195f2e0 T xa_destroy +ffffffff8195f420 T __xa_alloc +ffffffff8195f5a0 T __xa_alloc_cyclic +ffffffff8195f600 T __xa_erase +ffffffff8195f6c0 T __xa_load +ffffffff8195f730 T __xa_store +ffffffff8195f8b0 T xa_get_next +ffffffff8195f9e0 T sg_alloc_table +ffffffff8195fa60 T sg_free_table +ffffffff8195fac0 T sg_copy_from_buffer +ffffffff8195faf0 T i2c_master_xfer +ffffffff8195fc20 T __i2c_transfer +ffffffff8195fcd0 T i2c_transfer +ffffffff8195fda0 T i2c_bb_master_xfer +ffffffff8195fe80 T i2c_bb_functionality +ffffffff8195feb0 T i2c_bit_add_bus +ffffffff8195fef0 T vga_disable_bridge +ffffffff8195ffa0 T vga_get_uninterruptible +ffffffff8195fff0 T vga_put +ffffffff81960070 T acpi_get_table +ffffffff81960130 T acpi_put_table +ffffffff81960160 T acpi_get_handle +ffffffff819601b0 T acpi_get_name +ffffffff81960250 T acpi_evaluate_object +ffffffff819604b0 T drm_linux_acpi_notify +ffffffff81960530 T register_acpi_notifier +ffffffff81960570 T unregister_acpi_notifier +ffffffff81960600 T acpi_format_exception +ffffffff81960650 T backlight_do_update_status +ffffffff81960670 T backlight_device_register +ffffffff81960720 T backlight_device_unregister +ffffffff81960780 T backlight_schedule_update_status +ffffffff819607a0 T backlight_enable +ffffffff819607e0 T backlight_disable +ffffffff81960820 T backlight_device_get_by_name +ffffffff81960890 T dev_set_drvdata +ffffffff81960930 T dev_get_drvdata +ffffffff81960990 T drm_sysfs_hotplug_event +ffffffff819609b0 T drm_sysfs_connector_hotplug_event +ffffffff819609d0 T drm_sysfs_connector_status_event +ffffffff819609f0 T drm_sysfs_connector_property_event +ffffffff81960a10 T dma_fence_get +ffffffff81960a50 T dma_fence_get_rcu +ffffffff81960a90 T dma_fence_get_rcu_safe +ffffffff81960ad0 T dma_fence_release +ffffffff81960b00 T dma_fence_put +ffffffff81960b70 T dma_fence_signal_timestamp_locked +ffffffff81960c20 T dma_fence_signal +ffffffff81960d50 T dma_fence_signal_locked +ffffffff81960e60 T dma_fence_signal_timestamp +ffffffff81960f40 T dma_fence_is_signaled +ffffffff81960fb0 T dma_fence_is_signaled_locked +ffffffff819610f0 T dma_fence_timestamp +ffffffff81961190 T dma_fence_wait_timeout +ffffffff819611f0 T dma_fence_default_wait +ffffffff819613d0 T dma_fence_wait +ffffffff81961430 T dma_fence_enable_sw_signaling +ffffffff81961580 T dma_fence_init +ffffffff819615e0 T dma_fence_add_callback +ffffffff81961710 T dma_fence_remove_callback +ffffffff81961790 T dma_fence_context_alloc +ffffffff819617d0 t dma_fence_default_wait_cb +ffffffff81961820 T dma_fence_wait_any_timeout +ffffffff81961b30 T dma_fence_set_deadline +ffffffff81961bd0 T dma_fence_get_stub +ffffffff81961d60 T dma_fence_allocate_private_stub +ffffffff81961e80 T dma_fence_array_create +ffffffff81961f90 t irq_dma_fence_array_work +ffffffff81962020 T dma_fence_array_first +ffffffff81962070 T dma_fence_array_next +ffffffff819620c0 t dma_fence_array_get_driver_name +ffffffff819620f0 t dma_fence_array_get_timeline_name +ffffffff81962120 t dma_fence_array_enable_signaling +ffffffff81962220 t dma_fence_array_signaled +ffffffff81962270 t dma_fence_array_release +ffffffff81962330 T dma_fence_chain_find_seqno +ffffffff81962450 T dma_fence_chain_walk +ffffffff81962680 T dma_fence_chain_init +ffffffff81962790 t dma_fence_chain_get_driver_name +ffffffff819627c0 t dma_fence_chain_get_timeline_name +ffffffff819627f0 t dma_fence_chain_enable_signaling +ffffffff819629a0 t dma_fence_chain_signaled +ffffffff81962a90 t dma_fence_chain_release +ffffffff81962bd0 T dma_fence_is_container +ffffffff81962c20 T dmabuf_read +ffffffff81962c50 T dmabuf_write +ffffffff81962c80 T dmabuf_ioctl +ffffffff81962cb0 T dmabuf_kqfilter +ffffffff81962ce0 T dmabuf_stat +ffffffff81962da0 T dmabuf_close +ffffffff81962e10 T dmabuf_seek +ffffffff81962ea0 T dma_buf_export +ffffffff81962f50 T dma_buf_get +ffffffff81962fe0 T dma_buf_put +ffffffff81963090 T dma_buf_fd +ffffffff819631a0 T get_dma_buf +ffffffff819631e0 T pcie_get_speed_cap +ffffffff81963390 T printk +ffffffff81963430 T pcie_get_width_cap +ffffffff81963520 T pcie_aspm_enabled +ffffffff819635b0 T wait_on_bit +ffffffff81963680 T wait_on_bit_timeout +ffffffff81963750 T wake_up_bit +ffffffff81963790 T clear_and_wake_up_bit +ffffffff819637e0 T bit_waitqueue +ffffffff81963810 T __var_waitqueue +ffffffff81963840 T drm_linux_init +ffffffff819639b0 T drm_linux_exit +ffffffff81963a10 T pci_resize_resource +ffffffff81963b60 T register_shrinker +ffffffff81963bb0 T unregister_shrinker +ffffffff81963c10 T drmbackoff +ffffffff81963ca0 T bitmap_zalloc +ffffffff81963cd0 T bitmap_free +ffffffff81963cf0 T atomic_dec_and_mutex_lock +ffffffff81963d70 T interval_tree_iter_first +ffffffff81963e20 T interval_tree_remove +ffffffff81963e40 T interval_tree_insert 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mipi_dsi_dcs_write_buffer +ffffffff81966840 T mipi_dsi_dcs_write +ffffffff81966990 T mipi_dsi_dcs_read +ffffffff81966a30 T mipi_dsi_dcs_nop +ffffffff81966ae0 T mipi_dsi_dcs_soft_reset +ffffffff81966b90 T mipi_dsi_dcs_get_power_mode +ffffffff81966c50 T mipi_dsi_dcs_get_pixel_format +ffffffff81966d10 T mipi_dsi_dcs_enter_sleep_mode +ffffffff81966dc0 T mipi_dsi_dcs_exit_sleep_mode +ffffffff81966e70 T mipi_dsi_dcs_set_display_off +ffffffff81966f20 T mipi_dsi_dcs_set_display_on +ffffffff81966fd0 T mipi_dsi_dcs_set_column_address +ffffffff81967090 T mipi_dsi_dcs_set_page_address +ffffffff81967150 T mipi_dsi_dcs_set_tear_off +ffffffff81967200 T mipi_dsi_dcs_set_tear_on +ffffffff819672b0 T mipi_dsi_dcs_set_pixel_format +ffffffff81968000 T __drm_mm_interval_first +ffffffff819680c0 T drm_mm_reserve_node +ffffffff81968340 t add_hole +ffffffff819684a0 T drm_mm_insert_node_in_range +ffffffff81968a90 T drm_mm_remove_node +ffffffff81968bc0 T drm_mm_replace_node +ffffffff81968da0 T drm_mm_scan_init_with_range +ffffffff81968e30 T drm_mm_scan_add_block +ffffffff81968fa0 T drm_mm_scan_remove_block +ffffffff81969020 T drm_mm_scan_color_evict +ffffffff81969100 T drm_mm_init +ffffffff819691b0 T drm_mm_takedown +ffffffff819691f0 T drm_mm_print +ffffffff8196a000 T drm_modeset_register_all +ffffffff8196a0a0 T drm_modeset_unregister_all +ffffffff8196a0e0 T drm_mode_getresources +ffffffff8196a390 T drm_mode_config_reset +ffffffff8196a4f0 T drmm_mode_config_init +ffffffff8196ab70 T drm_mode_config_cleanup +ffffffff8196ae90 t drm_mode_config_init_release +ffffffff8196aea0 T drm_mode_config_validate +ffffffff8196c000 T __drm_mode_object_add +ffffffff8196c100 T drm_mode_object_add +ffffffff8196c1e0 T drm_mode_object_register +ffffffff8196c230 T drm_mode_object_unregister +ffffffff8196c2d0 T drm_mode_object_lease_required +ffffffff8196c320 T __drm_mode_object_find +ffffffff8196c3d0 T drm_mode_object_find +ffffffff8196c480 T drm_mode_object_put +ffffffff8196c500 T drm_mode_object_get +ffffffff8196c560 T drm_object_attach_property +ffffffff8196c670 T drm_object_property_set_value +ffffffff8196c750 T drm_object_property_get_value +ffffffff8196c7e0 t __drm_object_property_get_value +ffffffff8196c8c0 T drm_object_property_get_default_value +ffffffff8196c990 T drm_mode_object_get_properties +ffffffff8196cad0 T drm_mode_obj_get_properties_ioctl +ffffffff8196cd20 T drm_mode_obj_find_prop_id +ffffffff8196cd80 T drm_mode_obj_set_property_ioctl +ffffffff8196e000 T drm_mode_debug_printmodeline +ffffffff8196e140 T drm_mode_vrefresh +ffffffff8196e1e0 T drm_mode_create +ffffffff8196e200 T drm_mode_destroy +ffffffff8196e240 T drm_mode_probed_add +ffffffff8196e2e0 T drm_analog_tv_mode +ffffffff8196eb80 T drm_cvt_mode +ffffffff8196f000 T drm_mode_set_name +ffffffff8196f050 T drm_gtf_mode_complex +ffffffff8196f350 T drm_gtf_mode +ffffffff8196f3a0 T drm_mode_get_hv_timing +ffffffff8196f3f0 T drm_mode_init +ffffffff8196f4c0 T drm_mode_set_crtcinfo +ffffffff8196f680 T drm_mode_copy +ffffffff8196f6e0 T drm_mode_duplicate +ffffffff8196f760 T drm_mode_match +ffffffff8196f900 T drm_mode_equal +ffffffff8196f920 T drm_mode_equal_no_clocks +ffffffff8196f940 T drm_mode_equal_no_clocks_no_stereo +ffffffff8196fa00 T drm_mode_validate_driver +ffffffff8196faf0 T drm_mode_validate_size +ffffffff8196fb40 T drm_mode_validate_ycbcr420 +ffffffff8196fbb0 T drm_mode_is_420_only +ffffffff8196fc00 T drm_get_mode_status_name +ffffffff8196fc80 T drm_mode_prune_invalid +ffffffff8196ff10 T drm_mode_sort +ffffffff8196ff40 t drm_mode_compare +ffffffff819700e0 T drm_connector_list_update +ffffffff819702b0 T drm_mode_parse_command_line_for_connector +ffffffff819702e0 T drm_mode_create_from_cmdline_mode +ffffffff819704a0 T drm_mode_convert_to_umode +ffffffff81970640 T drm_mode_convert_umode +ffffffff81970860 T drm_mode_is_420_also +ffffffff819708b0 T drm_mode_is_420 +ffffffff81971000 T drm_helper_move_panel_connectors_to_head +ffffffff819710f0 T drm_helper_mode_fill_fb_struct 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drm_mode_getplane_res +ffffffff81978e30 T drm_mode_getplane +ffffffff81978f80 T drm_plane_check_pixel_format +ffffffff81979040 T drm_any_plane_has_format +ffffffff81979170 T drm_mode_setplane +ffffffff81979460 T drm_mode_cursor_ioctl +ffffffff819794d0 t drm_mode_cursor_common +ffffffff81979a10 T drm_mode_cursor2_ioctl +ffffffff81979a30 T drm_mode_page_flip_ioctl +ffffffff81979f90 T drm_plane_enable_fb_damage_clips +ffffffff81979fb0 T drm_plane_get_damage_clips_count +ffffffff81979ff0 T __drm_plane_get_damage_clips +ffffffff8197a030 T drm_plane_get_damage_clips +ffffffff8197a0d0 T drm_create_scaling_filter_prop +ffffffff8197a220 T drm_plane_create_scaling_filter_property +ffffffff8197a290 t kvasprintf +ffffffff8197a330 t kasprintf +ffffffff8197a400 t create_in_format_blob +ffffffff8197a5f0 t __setplane_atomic +ffffffff8197a790 t __setplane_internal +ffffffff8197a9a0 t __setplane_check +ffffffff8197b000 T drm_plane_helper_update_primary +ffffffff8197b4b0 t get_connectors_for_crtc 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drm_helper_probe_detect +ffffffff8197e4a0 T drm_helper_probe_single_connector_modes +ffffffff8197ea20 t __drm_helper_update_and_validate +ffffffff8197edd0 T drm_kms_helper_hotplug_event +ffffffff8197ee10 T drm_kms_helper_connector_hotplug_event +ffffffff8197ee50 T drm_kms_helper_is_poll_worker +ffffffff8197ee80 T drm_kms_helper_poll_disable +ffffffff8197ef50 T drm_kms_helper_poll_init +ffffffff8197efb0 t output_poll_execute +ffffffff8197f200 T drm_kms_helper_poll_fini +ffffffff8197f250 T drm_connector_helper_hpd_irq_event +ffffffff8197f310 t check_connector_changed +ffffffff8197f4e0 T drm_helper_hpd_irq_event +ffffffff8197f630 T drm_crtc_helper_mode_valid_fixed +ffffffff8197f680 T drm_connector_helper_get_modes_from_ddc +ffffffff8197f710 T drm_connector_helper_get_modes_fixed +ffffffff8197f880 T drm_connector_helper_get_modes +ffffffff8197f8f0 T drm_connector_helper_tv_get_modes +ffffffff8197fb30 t __delayed_work_tick +ffffffff81980000 T drm_property_create +ffffffff819801f0 T drm_property_create_enum +ffffffff819802a0 T drm_property_add_enum +ffffffff819804a0 T drm_property_destroy +ffffffff81980550 T drm_property_create_bitmask +ffffffff81980680 T drm_property_create_range +ffffffff819806f0 T drm_property_create_signed_range +ffffffff81980760 T drm_property_create_object +ffffffff81980800 T drm_property_create_bool +ffffffff81980860 T drm_mode_getproperty_ioctl +ffffffff81980ab0 T drm_property_create_blob +ffffffff81980bf0 t drm_property_free_blob +ffffffff81980c70 T drm_property_blob_put +ffffffff81980cb0 T drm_property_destroy_user_blobs +ffffffff81980d30 T drm_property_blob_get +ffffffff81980d70 T drm_property_lookup_blob +ffffffff81980d90 T drm_property_replace_global_blob +ffffffff81980ee0 T drm_property_replace_blob +ffffffff81980f50 T drm_mode_getblob_ioctl +ffffffff81981010 T drm_mode_createblob_ioctl +ffffffff81981110 T drm_mode_destroyblob_ioctl +ffffffff81981210 T drm_property_change_valid_get +ffffffff81981470 T drm_property_change_valid_put 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syncobj_eventfd_entry_func +ffffffff81986310 T drm_syncobj_replace_fence +ffffffff819863c0 T drm_syncobj_find_fence +ffffffff81986710 t drm_syncobj_fence_add_wait +ffffffff819867e0 T drm_syncobj_free +ffffffff81986860 T drm_syncobj_create +ffffffff81986a30 T drm_syncobj_get_handle +ffffffff81986b40 T drm_syncobj_get_fd +ffffffff81986b90 T drm_syncobj_open +ffffffff81986bc0 T drm_syncobj_release +ffffffff81986c00 t drm_syncobj_release_handle +ffffffff81986cc0 T drm_syncobj_create_ioctl +ffffffff81986df0 T drm_syncobj_destroy_ioctl +ffffffff81986f30 T drm_syncobj_handle_to_fd_ioctl +ffffffff81987120 T drm_syncobj_fd_to_handle_ioctl +ffffffff819872d0 T drm_syncobj_transfer_ioctl +ffffffff819876b0 T drm_timeout_abs_to_jiffies +ffffffff81987780 T drm_syncobj_wait_ioctl +ffffffff81987900 t drm_syncobj_array_find +ffffffff81987b20 t drm_syncobj_array_free +ffffffff81987c10 T drm_syncobj_timeline_wait_ioctl +ffffffff81987d90 T drm_syncobj_eventfd_ioctl +ffffffff81987dc0 T drm_syncobj_reset_ioctl +ffffffff81987ea0 T drm_syncobj_signal_ioctl +ffffffff81988000 T drm_syncobj_timeline_signal_ioctl +ffffffff81988240 T drm_syncobj_query_ioctl +ffffffff81988450 t drm_syncobj_array_wait_timeout +ffffffff819888b0 t syncobj_wait_fence_func +ffffffff819888d0 t syncobj_eventfd_entry_fence_func +ffffffff81989000 T drm_vblank_count +ffffffff81989090 T drm_crtc_accurate_vblank_count +ffffffff819891a0 t drm_update_vblank_count +ffffffff819895e0 T drm_vblank_disable_and_save +ffffffff81989730 T drm_vblank_init +ffffffff819898b0 t vblank_disable_fn +ffffffff81989930 t drm_vblank_init_release +ffffffff819899c0 T drm_dev_has_vblank +ffffffff819899f0 T drm_crtc_vblank_waitqueue +ffffffff81989a40 T drm_calc_timestamping_constants +ffffffff81989c60 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff8198a1b0 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff8198a1d0 T drm_crtc_vblank_count +ffffffff8198a260 T drm_crtc_vblank_count_and_time +ffffffff8198a320 t drm_vblank_count_and_time +ffffffff8198a3d0 T drm_crtc_next_vblank_start +ffffffff8198a520 T drm_crtc_arm_vblank_event +ffffffff8198a600 T drm_crtc_send_vblank_event +ffffffff8198a7b0 t send_vblank_event +ffffffff8198a860 T drm_vblank_get +ffffffff8198a960 t drm_vblank_enable +ffffffff8198ab60 T drm_crtc_vblank_get +ffffffff8198ac60 T drm_vblank_put +ffffffff8198ad90 T drm_crtc_vblank_put +ffffffff8198adb0 T drm_wait_one_vblank +ffffffff8198b2a0 T drm_crtc_wait_one_vblank +ffffffff8198b2c0 T drm_crtc_vblank_off +ffffffff8198b6b0 T drm_crtc_vblank_reset +ffffffff8198b7e0 T drm_crtc_set_max_vblank_count +ffffffff8198b8c0 T drm_crtc_vblank_on +ffffffff8198ba10 t drm_reset_vblank_timestamp +ffffffff8198bbf0 T drm_crtc_vblank_restore +ffffffff8198bfd0 T drm_legacy_modeset_ctl_ioctl +ffffffff8198c1f0 T drm_wait_vblank_ioctl +ffffffff8198c740 t drm_wait_vblank_reply +ffffffff8198c850 t drm_queue_vblank_event +ffffffff8198cb90 T drm_handle_vblank +ffffffff8198ce80 t drm_handle_vblank_events +ffffffff8198d110 T drm_crtc_handle_vblank +ffffffff8198d130 T drm_crtc_get_sequence_ioctl +ffffffff8198d300 T drm_crtc_queue_sequence_ioctl +ffffffff8198d5c0 t __get_vblank_counter +ffffffff8198e000 T drm_handle_vblank_works +ffffffff8198e1a0 T drm_vblank_cancel_pending_works +ffffffff8198e2e0 T drm_vblank_work_schedule +ffffffff8198e550 T drm_vblank_work_cancel_sync +ffffffff8198e6a0 T drm_vblank_work_flush +ffffffff8198e7d0 T drm_vblank_work_init +ffffffff8198e840 T drm_vblank_worker_init +ffffffff8198f000 T drm_vma_offset_manager_init +ffffffff8198f040 T drm_vma_offset_manager_destroy +ffffffff8198f060 T drm_vma_offset_lookup_locked +ffffffff8198f0f0 T drm_vma_offset_add +ffffffff8198f180 T drm_vma_offset_remove +ffffffff8198f1d0 T drm_vma_node_allow +ffffffff8198f1f0 t vma_node_allow +ffffffff8198f310 T drm_vma_node_allow_once +ffffffff8198f330 T drm_vma_node_revoke +ffffffff8198f3b0 T drm_vma_node_is_allowed +ffffffff81990000 T hdmi_avi_infoframe_init +ffffffff81990070 T hdmi_avi_infoframe_check +ffffffff819900c0 T hdmi_avi_infoframe_pack_only +ffffffff819902c0 T hdmi_avi_infoframe_pack +ffffffff81990320 T hdmi_spd_infoframe_init +ffffffff819903e0 T hdmi_spd_infoframe_check +ffffffff81990430 T hdmi_spd_infoframe_pack_only +ffffffff81990570 T hdmi_spd_infoframe_pack +ffffffff819906d0 T hdmi_audio_infoframe_init +ffffffff81990720 T hdmi_audio_infoframe_check +ffffffff81990770 T hdmi_audio_infoframe_pack_only +ffffffff819908d0 T hdmi_audio_infoframe_pack +ffffffff81990920 T hdmi_audio_infoframe_pack_for_dp +ffffffff81990a10 T hdmi_vendor_infoframe_init +ffffffff81990a70 T hdmi_vendor_infoframe_check +ffffffff81990b10 T hdmi_vendor_infoframe_pack_only +ffffffff81990cd0 T hdmi_vendor_infoframe_pack +ffffffff81990d70 T hdmi_drm_infoframe_init +ffffffff81990dd0 T hdmi_drm_infoframe_check +ffffffff81990e20 T hdmi_drm_infoframe_pack_only +ffffffff81991010 T hdmi_drm_infoframe_pack +ffffffff81991060 T hdmi_infoframe_check +ffffffff819911b0 T hdmi_infoframe_pack_only +ffffffff819913d0 T hdmi_infoframe_pack +ffffffff81991540 T hdmi_infoframe_log +ffffffff81992430 T hdmi_drm_infoframe_unpack_only +ffffffff81992510 T hdmi_infoframe_unpack +ffffffff81993000 T list_sort +ffffffff81994000 T radix_tree_lookup +ffffffff819940b0 T radix_tree_iter_find +ffffffff81994180 T radix_tree_delete +ffffffff81994310 T radix_tree_iter_delete +ffffffff81994330 T radix_tree_insert +ffffffff81995000 T sort +ffffffff81995040 t qsort +ffffffff81997000 T drm_dp_dual_mode_read +ffffffff81997110 T drm_dp_dual_mode_write +ffffffff819971f0 T drm_dp_dual_mode_detect +ffffffff81997490 T drm_dp_dual_mode_max_tmds_clock +ffffffff819975b0 T drm_dp_dual_mode_get_tmds_output +ffffffff819976d0 T drm_dp_dual_mode_set_tmds_output +ffffffff81997950 T drm_dp_get_dual_mode_type_name +ffffffff819979c0 T drm_lspcon_get_mode +ffffffff81997be0 T drm_lspcon_set_mode +ffffffff81998000 T drm_dp_channel_eq_ok +ffffffff81998080 T drm_dp_clock_recovery_ok +ffffffff819980f0 T drm_dp_get_adjust_request_voltage +ffffffff81998130 T drm_dp_get_adjust_request_pre_emphasis +ffffffff81998180 T drm_dp_get_adjust_tx_ffe_preset +ffffffff819981c0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff81998240 T drm_dp_128b132b_lane_symbol_locked +ffffffff819982b0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff819982e0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff81998310 T drm_dp_128b132b_link_training_failed +ffffffff81998340 T drm_dp_read_clock_recovery_delay +ffffffff81998450 T drm_dp_read_channel_eq_delay +ffffffff81998550 T drm_dp_128b132b_read_aux_rd_interval +ffffffff81998600 T drm_dp_link_train_clock_recovery_delay +ffffffff81998690 t __8b10b_clock_recovery_delay_us +ffffffff81998710 T drm_dp_link_train_channel_eq_delay +ffffffff81998780 T drm_dp_phy_name +ffffffff819987c0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff819987e0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff81998850 T drm_dp_link_rate_to_bw_code +ffffffff819988c0 T drm_dp_bw_code_to_link_rate +ffffffff81998920 T drm_dp_dpcd_probe +ffffffff81998a60 t drm_dp_dpcd_access +ffffffff81998b90 T drm_dp_dpcd_read +ffffffff81998cc0 T drm_dp_dpcd_write +ffffffff81998dd0 T drm_dp_dpcd_read_link_status +ffffffff81998df0 T drm_dp_dpcd_read_phy_link_status +ffffffff81998ef0 T drm_dp_downstream_is_type +ffffffff81998f40 T drm_dp_downstream_is_tmds +ffffffff81998fb0 T drm_dp_send_real_edid_checksum +ffffffff81999200 T drm_dp_read_dpcd_caps +ffffffff81999390 T drm_dp_read_downstream_info +ffffffff81999490 T drm_dp_downstream_max_dotclock +ffffffff819994e0 T drm_dp_downstream_max_tmds_clock +ffffffff81999580 T drm_dp_downstream_min_tmds_clock +ffffffff81999600 T drm_dp_downstream_max_bpc +ffffffff819996a0 T drm_dp_downstream_420_passthrough +ffffffff81999700 T drm_dp_downstream_444_to_420_conversion +ffffffff81999760 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff819997c0 T drm_dp_downstream_mode +ffffffff81999850 T drm_dp_downstream_id +ffffffff81999870 T drm_dp_downstream_debug +ffffffff81999910 T drm_dp_subconnector_type +ffffffff81999980 T drm_dp_set_subconnector_property +ffffffff819999f0 T drm_dp_read_sink_count_cap +ffffffff81999a40 T drm_dp_read_sink_count +ffffffff81999aa0 T drm_dp_remote_aux_init +ffffffff81999ad0 t drm_dp_aux_crc_work +ffffffff81999c40 T drm_dp_aux_init +ffffffff81999cf0 T drm_dp_aux_register +ffffffff81999e10 T drm_dp_aux_unregister +ffffffff81999e40 T drm_dp_psr_setup_time +ffffffff81999e90 T drm_dp_start_crc +ffffffff81999f40 T drm_dp_stop_crc +ffffffff81999fd0 T drm_dp_read_desc +ffffffff8199a190 T drm_dp_dsc_sink_max_slice_count +ffffffff8199a220 T drm_dp_dsc_sink_line_buf_depth +ffffffff8199a260 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff8199a2d0 T drm_dp_read_lttpr_common_caps +ffffffff8199a390 T drm_dp_read_lttpr_phy_caps +ffffffff8199a450 T drm_dp_lttpr_count +ffffffff8199a4e0 T drm_dp_lttpr_max_link_rate +ffffffff8199a540 T drm_dp_lttpr_max_lane_count +ffffffff8199a570 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff8199a5a0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff8199a5d0 T drm_dp_get_phy_test_pattern +ffffffff8199a6f0 T drm_dp_set_phy_test_pattern +ffffffff8199a7b0 T drm_dp_vsc_sdp_log +ffffffff8199aad0 T drm_dp_get_pcon_max_frl_bw +ffffffff8199ab20 T drm_dp_pcon_frl_prepare +ffffffff8199ab70 T drm_dp_pcon_is_frl_ready +ffffffff8199abd0 T drm_dp_pcon_frl_configure_1 +ffffffff8199acd0 T drm_dp_pcon_frl_configure_2 +ffffffff8199ad30 T drm_dp_pcon_reset_frl_config +ffffffff8199ad80 T drm_dp_pcon_frl_enable +ffffffff8199ae40 T drm_dp_pcon_hdmi_link_active +ffffffff8199ae90 T drm_dp_pcon_hdmi_link_mode +ffffffff8199af00 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff8199aff0 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff8199b020 T drm_dp_pcon_dsc_max_slices +ffffffff8199b0b0 T drm_dp_pcon_dsc_max_slice_width +ffffffff8199b0e0 T drm_dp_pcon_dsc_bpp_incr +ffffffff8199b120 T drm_dp_pcon_pps_default +ffffffff8199b1a0 T drm_dp_pcon_pps_override_buf +ffffffff8199b240 T drm_dp_pcon_pps_override_param +ffffffff8199b310 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff8199b3b0 T drm_edp_backlight_set_level +ffffffff8199b480 T drm_edp_backlight_enable +ffffffff8199b690 t drm_edp_backlight_set_enable +ffffffff8199b7c0 T drm_edp_backlight_disable +ffffffff8199b800 T drm_edp_backlight_init +ffffffff8199bd60 T drm_panel_dp_aux_backlight +ffffffff8199bef0 t __128b132b_channel_eq_delay_us +ffffffff8199bf70 t __8b10b_channel_eq_delay_us +ffffffff8199bff0 t drm_dp_aux_get_crc +ffffffff8199c0d0 t drm_dp_i2c_xfer +ffffffff8199c340 t drm_dp_i2c_functionality +ffffffff8199c370 t drm_dp_i2c_do_msg +ffffffff8199c740 t lock_bus +ffffffff8199c760 t trylock_bus +ffffffff8199c7b0 t unlock_bus +ffffffff8199c7d0 t dp_aux_backlight_update_status +ffffffff8199d000 T drm_dp_encode_sideband_req +ffffffff8199d440 T drm_dp_decode_sideband_req +ffffffff8199d970 T drm_dp_dump_sideband_msg_req_body +ffffffff8199dd40 T drm_dp_mst_get_port_malloc +ffffffff8199dd90 T drm_dp_mst_put_port_malloc +ffffffff8199de80 t kref_put +ffffffff8199dec0 T drm_atomic_get_mst_payload_state +ffffffff8199df10 T drm_dp_mst_dpcd_read +ffffffff8199e1d0 T drm_dp_mst_dpcd_write +ffffffff8199e220 t drm_dp_send_dpcd_write +ffffffff8199e460 T drm_dp_mst_connector_late_register +ffffffff8199e4e0 T drm_dp_mst_connector_early_unregister +ffffffff8199e520 T drm_dp_send_power_updown_phy +ffffffff8199e760 t drm_dp_mst_topology_put_port +ffffffff8199e880 t drm_dp_mst_wait_tx_reply +ffffffff8199ec20 T drm_dp_send_query_stream_enc_status +ffffffff8199eee0 T drm_dp_add_payload_part1 +ffffffff8199f090 T drm_dp_remove_payload +ffffffff8199f230 T drm_dp_add_payload_part2 +ffffffff8199f3e0 T drm_dp_get_vc_payload_bw +ffffffff8199f480 T drm_dp_read_mst_cap +ffffffff8199f4e0 T drm_dp_mst_topology_mgr_set_mst +ffffffff8199f790 t drm_dp_dpcd_write_payload +ffffffff8199f930 t drm_dp_mst_topology_put_mstb +ffffffff8199fa30 T drm_dp_mst_topology_mgr_suspend +ffffffff8199faf0 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff8199fb60 T drm_dp_mst_topology_mgr_resume +ffffffff8199fda0 T drm_dp_mst_hpd_irq_handle_event +ffffffff819a0d10 T drm_dp_mst_hpd_irq_send_new_request +ffffffff819a0d90 T drm_dp_mst_detect_port +ffffffff819a0ef0 T drm_dp_mst_edid_read +ffffffff819a0ff0 T drm_dp_mst_get_edid +ffffffff819a1050 T drm_dp_atomic_find_time_slots +ffffffff819a1300 T drm_atomic_get_mst_topology_state +ffffffff819a1310 T drm_dp_atomic_release_time_slots +ffffffff819a1520 T drm_dp_mst_atomic_setup_commit +ffffffff819a16b0 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff819a1820 T drm_dp_mst_root_conn_atomic_check +ffffffff819a1940 T drm_dp_mst_update_slots +ffffffff819a19a0 T drm_dp_check_act_status +ffffffff819a1b30 T drm_dp_calc_pbn_mode +ffffffff819a1ba0 T drm_dp_mst_dump_topology +ffffffff819a1e20 t drm_dp_mst_dump_mstb +ffffffff819a1e90 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff819a1fc0 T drm_dp_mst_dsc_aux_for_port +ffffffff819a21f0 T drm_dp_mst_atomic_enable_dsc +ffffffff819a2370 T drm_dp_mst_atomic_check +ffffffff819a2660 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff819a28e0 t drm_dp_mst_duplicate_state +ffffffff819a2ab0 t drm_dp_mst_destroy_state +ffffffff819a2b70 T drm_atomic_get_old_mst_topology_state +ffffffff819a2b80 T drm_atomic_get_new_mst_topology_state +ffffffff819a2b90 T drm_dp_mst_topology_mgr_init +ffffffff819a2e00 t drm_dp_mst_link_probe_work +ffffffff819a3090 t drm_dp_tx_work +ffffffff819a30e0 t drm_dp_delayed_destroy_work +ffffffff819a3590 t drm_dp_mst_up_req_work +ffffffff819a3ab0 T drm_dp_mst_topology_mgr_destroy +ffffffff819a3b40 t drm_dp_mst_is_virtual_dpcd +ffffffff819a3c20 t drm_dp_free_mst_branch_device +ffffffff819a3c60 t drm_dp_mst_topology_get_port_validated_locked +ffffffff819a3ce0 t drm_dp_mst_dump_sideband_msg_tx +ffffffff819a3ef0 t process_single_down_tx_qlock +ffffffff819a4060 t process_single_tx_qlock +ffffffff819a4530 t drm_dp_msg_data_crc4 +ffffffff819a4660 t drm_dp_payload_send_msg +ffffffff819a4ac0 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff819a4b40 t drm_dp_get_one_sb_msg +ffffffff819a5280 t drm_dp_get_mst_branch_device +ffffffff819a53e0 t drm_dp_check_and_send_link_address +ffffffff819a54b0 t drm_dp_send_link_address +ffffffff819a6170 t drm_dp_send_enum_path_resources +ffffffff819a63d0 t drm_dp_port_set_pdt +ffffffff819a66a0 t drm_dp_mst_port_add_connector +ffffffff819a6880 t drm_dp_mst_i2c_xfer +ffffffff819a6fa0 t drm_dp_mst_i2c_functionality +ffffffff819a6fd0 t get_mst_branch_device_by_guid_helper +ffffffff819a8000 T drm_dsc_dp_pps_header_init +ffffffff819a8030 T drm_dsc_dp_rc_buffer_size +ffffffff819a8090 T drm_dsc_pps_payload_pack +ffffffff819a8340 T drm_dsc_set_const_params +ffffffff819a8390 T drm_dsc_set_rc_buf_thresh +ffffffff819a8400 T drm_dsc_setup_rc_params +ffffffff819a85c0 T drm_dsc_compute_rc_parameters +ffffffff819a88c0 T drm_dsc_get_bpp_int +ffffffff819a8940 T drm_dsc_initial_scale_value +ffffffff819a8980 T drm_dsc_flatness_det_thresh +ffffffff819a9000 T drm_connector_attach_content_protection_property +ffffffff819a9030 T drm_hdcp_check_ksvs_revoked +ffffffff819a9080 T drm_hdcp_update_content_protection +ffffffff819aa000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff819aa120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff819aa180 T drm_hdmi_avi_infoframe_bars +ffffffff819aa1d0 T drm_hdmi_avi_infoframe_content_type +ffffffff819ab000 T drm_scdc_read +ffffffff819ab090 T drm_scdc_write +ffffffff819ab170 T drm_scdc_get_scrambling_status +ffffffff819ab250 T drm_scdc_set_scrambling +ffffffff819ab3e0 T drm_scdc_set_high_tmds_clock_ratio +ffffffff819ac000 T drm_gem_ttm_mmap +ffffffff819ac070 T drm_gem_ttm_vmap +ffffffff819ac080 T drm_gem_ttm_vunmap +ffffffff819ad000 T ttm_agp_bind +ffffffff819ad050 T ttm_agp_unbind +ffffffff819ad070 T ttm_agp_is_bound +ffffffff819ad0c0 T ttm_agp_destroy +ffffffff819ad0e0 T ttm_agp_tt_create +ffffffff819ae000 T ttm_bo_move_to_lru_tail +ffffffff819ae040 T ttm_bo_set_bulk_move +ffffffff819ae100 T ttm_bo_put +ffffffff819ae610 T ttm_bo_eviction_valuable +ffffffff819ae660 T ttm_mem_evict_first +ffffffff819aed60 t ttm_bo_evict_swapout_allowable +ffffffff819aef60 t dma_resv_unlock +ffffffff819af000 t ttm_bo_cleanup_refs +ffffffff819af350 t ttm_bo_unreserve +ffffffff819af430 T ttm_bo_pin +ffffffff819af4d0 T ttm_bo_unpin +ffffffff819af5e0 T ttm_bo_mem_space +ffffffff819af820 t ttm_bo_add_move_fence +ffffffff819af8e0 T ttm_bo_validate +ffffffff819afa70 T ttm_bo_init_reserved +ffffffff819afc60 T ttm_bo_init_validate +ffffffff819afd00 T ttm_bo_unmap_virtual +ffffffff819afe30 T ttm_bo_wait_ctx +ffffffff819afec0 T ttm_bo_swapout +ffffffff819b0180 t ttm_bo_handle_move_mem +ffffffff819b0300 T ttm_bo_tt_destroy +ffffffff819b0370 t ttm_bo_delayed_delete +ffffffff819b1000 T ttm_mem_io_reserve +ffffffff819b1060 T ttm_mem_io_free +ffffffff819b10d0 T ttm_move_memcpy +ffffffff819b1290 T ttm_bo_move_memcpy +ffffffff819b14f0 T ttm_bo_move_sync_cleanup +ffffffff819b1600 T ttm_io_prot +ffffffff819b1640 T ttm_bo_kmap +ffffffff819b1900 T ttm_bo_kunmap +ffffffff819b1a40 T ttm_bo_vmap +ffffffff819b1c30 T ttm_bo_vunmap +ffffffff819b1d20 T ttm_bo_move_accel_cleanup +ffffffff819b2000 T ttm_bo_pipeline_gutting +ffffffff819b2200 t ttm_buffer_object_transfer +ffffffff819b2430 t ttm_transfered_destroy +ffffffff819b3000 T ttm_bo_vm_reserve +ffffffff819b3180 t dma_resv_lock_interruptible +ffffffff819b32a0 T ttm_bo_vm_fault_reserved +ffffffff819b35e0 T ttm_bo_vm_fault +ffffffff819b3740 T ttm_bo_vm_reference +ffffffff819b3770 T ttm_bo_vm_detach +ffffffff819b3780 T ttm_bo_mmap_obj +ffffffff819b4000 T ttm_global_swapout +ffffffff819b40e0 T ttm_device_swapout +ffffffff819b4200 T ttm_device_init +ffffffff819b4490 T ttm_device_fini +ffffffff819b4650 T ttm_device_clear_dma_mappings +ffffffff819b4700 t ttm_device_clear_lru_dma_mappings +ffffffff819b5000 T ttm_eu_backoff_reservation +ffffffff819b5130 T ttm_eu_reserve_buffers +ffffffff819b55b0 T ttm_eu_fence_buffer_objects +ffffffff819b5700 t __ww_mutex_lock +ffffffff819b6000 T ttm_prot_from_caching +ffffffff819b7000 T ttm_pool_alloc +ffffffff819b7a40 t ttm_pool_free_range +ffffffff819b7d20 T ttm_pool_free +ffffffff819b7d80 t ttm_pool_shrink +ffffffff819b7f60 T ttm_pool_init +ffffffff819b8220 T ttm_pool_fini +ffffffff819b8420 t ttm_pool_type_fini +ffffffff819b8660 T ttm_pool_mgr_init +ffffffff819b8940 t ttm_pool_shrinker_count +ffffffff819b8990 t ttm_pool_shrinker_scan +ffffffff819b89e0 T ttm_pool_mgr_fini +ffffffff819b9000 T ttm_range_man_init_nocheck +ffffffff819b9180 T ttm_range_man_fini_nocheck +ffffffff819b9310 t ttm_range_man_alloc +ffffffff819b9460 t ttm_range_man_free +ffffffff819b94c0 t ttm_range_man_intersects +ffffffff819b9520 t ttm_range_man_compatible +ffffffff819b9580 t ttm_range_man_debug +ffffffff819ba000 T ttm_lru_bulk_move_init +ffffffff819ba020 T ttm_lru_bulk_move_tail +ffffffff819ba1e0 T ttm_resource_add_bulk_move +ffffffff819ba2b0 T ttm_resource_del_bulk_move +ffffffff819ba3f0 T ttm_resource_move_to_lru_tail +ffffffff819ba560 T ttm_resource_init +ffffffff819ba650 T ttm_resource_fini +ffffffff819ba6c0 T ttm_resource_alloc +ffffffff819ba810 T ttm_resource_free +ffffffff819ba9d0 T ttm_resource_intersects +ffffffff819baa30 T ttm_resource_compatible +ffffffff819baa90 T ttm_resource_compat +ffffffff819bac20 T ttm_resource_set_bo +ffffffff819bac70 T ttm_resource_manager_init +ffffffff819bad20 T ttm_resource_manager_evict_all +ffffffff819baef0 T ttm_resource_manager_usage +ffffffff819baf50 T ttm_resource_manager_debug +ffffffff819bb040 T ttm_resource_manager_first +ffffffff819bb0d0 T ttm_resource_manager_next +ffffffff819bb1f0 T ttm_kmap_iter_iomap_init +ffffffff819bb250 T ttm_kmap_iter_linear_io_init +ffffffff819bb430 T ttm_kmap_iter_linear_io_fini +ffffffff819bb480 T ttm_resource_manager_create_debugfs +ffffffff819bb4b0 t ttm_kmap_iter_iomap_map_local +ffffffff819bb5e0 t ttm_kmap_iter_iomap_unmap_local +ffffffff819bb600 t ttm_kmap_iter_linear_io_map_local +ffffffff819bc000 T ttm_sys_man_init +ffffffff819bc130 t ttm_sys_man_alloc +ffffffff819bc1b0 t ttm_sys_man_free +ffffffff819bd000 T ttm_tt_create +ffffffff819bd100 T ttm_tt_destroy +ffffffff819bd120 T ttm_tt_init +ffffffff819bd1f0 T ttm_tt_fini +ffffffff819bd2d0 T ttm_sg_tt_init +ffffffff819bd4f0 T ttm_tt_swapin +ffffffff819bd610 T ttm_tt_swapout +ffffffff819bd660 T ttm_tt_populate +ffffffff819bd7d0 T ttm_tt_unpopulate +ffffffff819bd880 T ttm_tt_mgr_init +ffffffff819bd8e0 T ttm_kmap_iter_tt_init +ffffffff819bd940 T ttm_tt_pages_limit +ffffffff819bd970 t ttm_kmap_iter_tt_map_local +ffffffff819bd9d0 t ttm_kmap_iter_tt_unmap_local +ffffffff819be000 T drm_sched_entity_init +ffffffff819be170 T drm_sched_entity_modify_sched +ffffffff819be1f0 T drm_sched_entity_is_ready +ffffffff819be230 T drm_sched_entity_error +ffffffff819be270 T drm_sched_entity_flush +ffffffff819be5a0 t drm_sched_entity_kill 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intel_digital_connector_duplicate_state +ffffffff819e2290 T intel_connector_needs_modeset +ffffffff819e2300 T intel_any_crtc_needs_modeset +ffffffff819e2390 T intel_atomic_get_digital_connector_state +ffffffff819e23a0 T intel_crtc_duplicate_state +ffffffff819e24c0 T intel_crtc_free_hw_state +ffffffff819e2520 T intel_crtc_destroy_state +ffffffff819e25d0 T intel_atomic_state_alloc +ffffffff819e2650 T intel_atomic_state_free +ffffffff819e2690 T intel_atomic_state_clear +ffffffff819e26e0 T intel_atomic_get_crtc_state +ffffffff819e3000 T intel_plane_alloc +ffffffff819e30c0 T intel_plane_free +ffffffff819e3100 T intel_plane_destroy_state +ffffffff819e31d0 T intel_plane_duplicate_state +ffffffff819e3280 T intel_adjusted_rate +ffffffff819e3300 T intel_plane_pixel_rate +ffffffff819e3390 T intel_plane_data_rate +ffffffff819e3450 T intel_plane_calc_min_cdclk +ffffffff819e35b0 T intel_plane_copy_uapi_to_hw_state +ffffffff819e3720 T intel_plane_copy_hw_state +ffffffff819e3810 T intel_plane_set_invisible +ffffffff819e3910 T intel_plane_atomic_check_with_state +ffffffff819e4560 T intel_plane_atomic_check +ffffffff819e46c0 T intel_plane_update_noarm +ffffffff819e4700 T intel_plane_update_arm +ffffffff819e4740 T intel_plane_disable_arm +ffffffff819e4760 T intel_crtc_planes_update_noarm +ffffffff819e4880 T intel_crtc_planes_update_arm +ffffffff819e4c70 T intel_atomic_plane_check_clipping +ffffffff819e4ed0 T intel_plane_check_src_coordinates +ffffffff819e5090 T intel_plane_helper_add +ffffffff819e50d0 t intel_prepare_plane_fb +ffffffff819e5330 t intel_cleanup_plane_fb +ffffffff819e6000 T intel_audio_sdp_split_update +ffffffff819e60d0 T intel_audio_compute_config +ffffffff819e6180 T intel_audio_codec_enable +ffffffff819e6370 T intel_audio_codec_disable +ffffffff819e65c0 T intel_audio_codec_get_config +ffffffff819e6610 T intel_audio_hooks_init +ffffffff819e6690 T intel_audio_cdclk_change_pre +ffffffff819e6720 T intel_audio_cdclk_change_post +ffffffff819e6800 T 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intel_bios_init_panel +ffffffff819f15a0 T intel_bios_init_panel_late +ffffffff819f15c0 T intel_bios_driver_remove +ffffffff819f16b0 T intel_bios_fini_panel +ffffffff819f1790 T intel_bios_is_tv_present +ffffffff819f1810 T intel_bios_is_lvds_present +ffffffff819f18c0 T intel_bios_is_port_present +ffffffff819f1990 T intel_bios_encoder_supports_dp_dual_mode +ffffffff819f1a00 T intel_bios_is_dsi_present +ffffffff819f1ad0 T intel_bios_get_dsc_params +ffffffff819f1cf0 T intel_bios_dp_aux_ch +ffffffff819f1df0 T intel_bios_dp_has_shared_aux_ch +ffffffff819f1e80 T intel_bios_dp_boost_level +ffffffff819f1f10 T intel_bios_hdmi_boost_level +ffffffff819f1fa0 T intel_bios_hdmi_ddc_pin +ffffffff819f2100 T intel_bios_encoder_supports_typec_usb +ffffffff819f2150 T intel_bios_encoder_supports_tbt +ffffffff819f21a0 T intel_bios_encoder_lane_reversal +ffffffff819f21e0 T intel_bios_encoder_hpd_invert +ffffffff819f2220 T intel_bios_encoder_data_lookup +ffffffff819f22e0 T intel_bios_for_each_encoder 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intel_cdclk_init_hw +ffffffff819f67d0 T intel_cdclk_uninit_hw +ffffffff819f68e0 T intel_cdclk_needs_modeset +ffffffff819f6920 T intel_cdclk_dump_config +ffffffff819f69a0 T intel_set_cdclk_pre_plane_update +ffffffff819f6c80 t intel_set_cdclk +ffffffff819f7050 T intel_set_cdclk_post_plane_update +ffffffff819f72d0 T intel_crtc_compute_min_cdclk +ffffffff819f7660 T intel_atomic_get_cdclk_state +ffffffff819f7680 T intel_cdclk_atomic_check +ffffffff819f7780 T intel_cdclk_init +ffffffff819f77f0 T intel_modeset_calc_cdclk +ffffffff819f7e20 t intel_cdclk_can_crawl +ffffffff819f7eb0 T intel_update_max_cdclk +ffffffff819f8210 T intel_update_cdclk +ffffffff819f82b0 T intel_read_rawclk +ffffffff819f8430 t i9xx_hrawclk +ffffffff819f84e0 T intel_cdclk_debugfs_register +ffffffff819f8510 T intel_init_cdclk_hooks +ffffffff819f8930 t bxt_set_cdclk +ffffffff819f8fa0 t _bxt_set_cdclk +ffffffff819f9750 t skl_set_cdclk +ffffffff819f9d50 t intel_cdclk_duplicate_state +ffffffff819f9dd0 t intel_cdclk_destroy_state +ffffffff819f9df0 t bxt_get_cdclk +ffffffff819fa020 t bxt_modeset_calc_cdclk +ffffffff819fa470 t tgl_calc_voltage_level +ffffffff819fa4c0 t intel_compute_min_cdclk +ffffffff819fa6c0 t rplu_calc_voltage_level +ffffffff819fa710 t ehl_calc_voltage_level +ffffffff819fa760 t icl_calc_voltage_level +ffffffff819fa7b0 t bxt_calc_voltage_level +ffffffff819fa800 t skl_get_cdclk +ffffffff819faa10 t skl_modeset_calc_cdclk +ffffffff819fac20 t bdw_get_cdclk +ffffffff819fad10 t bdw_set_cdclk +ffffffff819fb2a0 t bdw_modeset_calc_cdclk +ffffffff819fb3a0 t hsw_get_cdclk +ffffffff819fb470 t fixed_modeset_calc_cdclk +ffffffff819fb4b0 t vlv_get_cdclk +ffffffff819fb570 t chv_set_cdclk +ffffffff819fb8e0 t vlv_modeset_calc_cdclk +ffffffff819fbab0 t vlv_set_cdclk +ffffffff819fbff0 t fixed_400mhz_get_cdclk +ffffffff819fc020 t fixed_450mhz_get_cdclk +ffffffff819fc050 t gm45_get_cdclk +ffffffff819fc150 t intel_hpll_vco +ffffffff819fc280 t g33_get_cdclk +ffffffff819fc390 t i965gm_get_cdclk +ffffffff819fc490 t pnv_get_cdclk +ffffffff819fc540 t i945gm_get_cdclk +ffffffff819fc5b0 t i915gm_get_cdclk +ffffffff819fc620 t fixed_333mhz_get_cdclk +ffffffff819fc650 t fixed_266mhz_get_cdclk +ffffffff819fc680 t i85x_get_cdclk +ffffffff819fc700 t fixed_200mhz_get_cdclk +ffffffff819fc730 t fixed_133mhz_get_cdclk +ffffffff819fd000 T intel_color_load_luts +ffffffff819fd030 T intel_color_commit_noarm +ffffffff819fd080 T intel_color_commit_arm +ffffffff819fd0b0 T intel_color_post_update +ffffffff819fd100 T intel_color_prepare_commit +ffffffff819fd130 T intel_color_cleanup_commit +ffffffff819fd180 T intel_color_check +ffffffff819fd1a0 T intel_color_get_config +ffffffff819fd220 T intel_color_lut_equal +ffffffff819fd280 T intel_color_assert_luts +ffffffff819fd570 T intel_color_crtc_init +ffffffff819fd5e0 T intel_color_init +ffffffff819fd710 T intel_color_init_hooks +ffffffff819fd840 t chv_color_check +ffffffff819fdd50 t i9xx_color_commit_arm +ffffffff819fdd60 t chv_load_luts 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+ffffffff81a08580 T intel_attach_dp_colorspace_property +ffffffff81a085d0 T intel_attach_scaling_mode_property +ffffffff81a09000 T intel_crt_port_enabled +ffffffff81a09080 T intel_crt_reset +ffffffff81a09160 T intel_crt_init +ffffffff81a09590 t hsw_crt_get_config +ffffffff81a09640 t hsw_crt_compute_config +ffffffff81a09730 t hsw_pre_pll_enable_crt +ffffffff81a097a0 t hsw_pre_enable_crt +ffffffff81a09840 t hsw_enable_crt +ffffffff81a099e0 t hsw_disable_crt +ffffffff81a09a50 t hsw_post_disable_crt +ffffffff81a09bf0 t pch_crt_compute_config +ffffffff81a09c40 t pch_disable_crt +ffffffff81a09c70 t pch_post_disable_crt +ffffffff81a09d60 t intel_crt_compute_config +ffffffff81a09db0 t intel_disable_crt +ffffffff81a09ea0 t intel_crt_get_config +ffffffff81a09f40 t intel_crt_get_hw_state +ffffffff81a0a000 t intel_enable_crt +ffffffff81a0a0f0 t intel_spurious_crt_detect_dmi_callback +ffffffff81a0a150 t intel_crt_get_modes +ffffffff81a0a250 t intel_crt_detect +ffffffff81a0a4c0 t intel_crt_mode_valid +ffffffff81a0a5d0 t intel_crt_get_edid +ffffffff81a0a670 t intel_crt_detect_hotplug +ffffffff81a0aac0 t intel_crt_detect_ddc +ffffffff81a0ab90 t intel_crt_load_detect +ffffffff81a0c000 T intel_first_crtc +ffffffff81a0c020 T intel_crtc_for_pipe +ffffffff81a0c080 T intel_crtc_wait_for_next_vblank +ffffffff81a0c090 T intel_wait_for_vblank_if_active +ffffffff81a0c100 T intel_crtc_get_vblank_counter +ffffffff81a0c180 T intel_crtc_max_vblank_count +ffffffff81a0c210 T intel_crtc_vblank_on +ffffffff81a0c2a0 t assert_vblank_disabled +ffffffff81a0c380 T intel_crtc_vblank_off +ffffffff81a0c3b0 T intel_crtc_state_alloc +ffffffff81a0c450 T intel_crtc_state_reset +ffffffff81a0c4d0 T intel_crtc_init +ffffffff81a0c850 T intel_wait_for_vblank_workers +ffffffff81a0c910 T intel_usecs_to_scanlines +ffffffff81a0c960 T intel_pipe_update_start +ffffffff81a0cd50 T intel_pipe_update_end +ffffffff81a0d060 t intel_crtc_destroy +ffffffff81a0d090 t intel_crtc_late_register +ffffffff81a0d0c0 t intel_crtc_vblank_work +ffffffff81a0e000 T intel_output_format_name +ffffffff81a0e040 T intel_crtc_state_dump +ffffffff81a0f430 t ilk_dump_csc +ffffffff81a10000 T intel_cursor_plane_create +ffffffff81a10200 t i845_cursor_max_stride +ffffffff81a10230 t i845_cursor_update_arm +ffffffff81a104b0 t i845_cursor_disable_arm +ffffffff81a104d0 t i845_cursor_get_hw_state +ffffffff81a10580 t i845_check_cursor +ffffffff81a10710 t i9xx_cursor_max_stride +ffffffff81a10750 t i9xx_cursor_update_arm +ffffffff81a10b10 t i9xx_cursor_disable_arm +ffffffff81a10b30 t i9xx_cursor_get_hw_state +ffffffff81a10c20 t i9xx_check_cursor +ffffffff81a10ea0 t intel_check_cursor +ffffffff81a110b0 t intel_legacy_cursor_update +ffffffff81a11470 t intel_cursor_format_mod_supported +ffffffff81a12000 T intel_is_c10phy +ffffffff81a12040 T intel_cx0_phy_set_signal_levels +ffffffff81a12630 t intel_cx0_rmw +ffffffff81a12720 T intel_c10pll_readout_hw_state +ffffffff81a128b0 T intel_c10pll_dump_hw_state +ffffffff81a12b30 T intel_cx0_phy_check_hdmi_link_rate +ffffffff81a12ca0 T intel_cx0pll_calc_state +ffffffff81a130b0 T intel_c20pll_readout_hw_state +ffffffff81a135d0 t intel_c20_sram_read +ffffffff81a136e0 T intel_c20pll_dump_hw_state +ffffffff81a13a90 T intel_c10pll_calc_port_clock +ffffffff81a13b70 T intel_c20pll_calc_port_clock +ffffffff81a13c70 T intel_mtl_tbt_calc_port_clock +ffffffff81a13dd0 T intel_mtl_pll_enable +ffffffff81a155d0 T intel_mtl_pll_disable +ffffffff81a15a40 T intel_mtl_port_pll_type +ffffffff81a15ad0 T intel_c10pll_state_verify +ffffffff81a15dc0 t __intel_cx0_read +ffffffff81a16150 t __intel_cx0_write +ffffffff81a164a0 t intel_cx0_bus_reset +ffffffff81a165d0 t intel_cx0_wait_for_ack +ffffffff81a16750 t intel_cx0_powerdown_change_sequence +ffffffff81a169b0 t intel_c20_sram_write +ffffffff81a17000 T hsw_prepare_dp_ddi_buffers +ffffffff81a171a0 T intel_wait_ddi_buf_idle +ffffffff81a173a0 T intel_ddi_set_dp_msa +ffffffff81a17570 T intel_ddi_enable_transcoder_func +ffffffff81a17650 t intel_ddi_transcoder_func_reg_val_get +ffffffff81a17900 T intel_ddi_disable_transcoder_func +ffffffff81a17af0 T intel_ddi_toggle_hdcp_bits +ffffffff81a17c10 T intel_ddi_connector_get_hw_state +ffffffff81a17d60 T intel_ddi_get_hw_state +ffffffff81a17dd0 t intel_ddi_get_encoder_pipes +ffffffff81a18220 T intel_ddi_enable_transcoder_clock +ffffffff81a182e0 T intel_ddi_disable_transcoder_clock +ffffffff81a18350 T intel_ddi_level +ffffffff81a18530 T icl_ddi_combo_get_pll +ffffffff81a185b0 T hsw_ddi_enable_clock +ffffffff81a18670 T hsw_ddi_disable_clock +ffffffff81a186b0 T hsw_ddi_is_clock_enabled +ffffffff81a18710 T intel_ddi_enable_clock +ffffffff81a18750 T intel_ddi_disable_clock +ffffffff81a18790 T intel_ddi_sanitize_encoder_pll_mapping +ffffffff81a18970 T dp_tp_ctl_reg +ffffffff81a189f0 T dp_tp_status_reg +ffffffff81a18a70 T intel_ddi_update_pipe +ffffffff81a18b00 T intel_ddi_update_active_dpll +ffffffff81a18bf0 T intel_ddi_compute_min_voltage_level +ffffffff81a18c70 T intel_ddi_get_clock +ffffffff81a18d80 T intel_ddi_port_pll_type +ffffffff81a18dc0 T hsw_ddi_get_config +ffffffff81a18eb0 t intel_ddi_get_config +ffffffff81a19800 T intel_ddi_init +ffffffff81a1a580 t intel_ddi_hotplug +ffffffff81a1a990 t intel_ddi_compute_output_type +ffffffff81a1aa10 t intel_ddi_compute_config +ffffffff81a1ab80 t intel_ddi_compute_config_late +ffffffff81a1ae40 t intel_enable_ddi +ffffffff81a1b790 t intel_ddi_pre_pll_enable +ffffffff81a1b980 t intel_ddi_pre_enable +ffffffff81a1c980 t intel_disable_ddi +ffffffff81a1cb30 t intel_ddi_post_pll_disable +ffffffff81a1cc10 t intel_ddi_post_disable +ffffffff81a1d0a0 t intel_ddi_sync_state +ffffffff81a1d160 t intel_ddi_initial_fastset_check +ffffffff81a1d220 t intel_ddi_encoder_suspend +ffffffff81a1d230 t intel_ddi_encoder_shutdown +ffffffff81a1d260 t intel_ddi_get_power_domains +ffffffff81a1d3e0 t mtl_ddi_get_config +ffffffff81a1d4c0 t dg2_ddi_get_config +ffffffff81a1d510 t adls_ddi_enable_clock +ffffffff81a1d680 t adls_ddi_disable_clock +ffffffff81a1d730 t adls_ddi_is_clock_enabled +ffffffff81a1d7d0 t adls_ddi_get_config +ffffffff81a1d890 t rkl_ddi_enable_clock +ffffffff81a1da10 t rkl_ddi_disable_clock +ffffffff81a1daa0 t rkl_ddi_is_clock_enabled +ffffffff81a1db20 t rkl_ddi_get_config +ffffffff81a1dbf0 t dg1_ddi_enable_clock +ffffffff81a1dda0 t dg1_ddi_disable_clock +ffffffff81a1de60 t dg1_ddi_is_clock_enabled +ffffffff81a1df00 t dg1_ddi_get_config +ffffffff81a1dfd0 t jsl_ddi_tc_enable_clock +ffffffff81a1e060 t jsl_ddi_tc_disable_clock +ffffffff81a1e120 t jsl_ddi_tc_is_clock_enabled +ffffffff81a1e1d0 t icl_ddi_tc_port_pll_type +ffffffff81a1e260 t icl_ddi_combo_get_config +ffffffff81a1e300 t icl_ddi_combo_enable_clock +ffffffff81a1e440 t icl_ddi_combo_disable_clock +ffffffff81a1e4e0 t icl_ddi_combo_is_clock_enabled +ffffffff81a1e560 t icl_ddi_tc_enable_clock +ffffffff81a1e730 t icl_ddi_tc_disable_clock +ffffffff81a1e800 t icl_ddi_tc_is_clock_enabled +ffffffff81a1e8b0 t icl_ddi_tc_get_config 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mtl_ddi_enable_d2d +ffffffff81a20fb0 t intel_wait_ddi_buf_active +ffffffff81a212c0 t intel_ddi_main_link_aux_domain +ffffffff81a213b0 t icl_program_mg_dp_mode +ffffffff81a21680 t intel_ddi_init_dp_buf_reg +ffffffff81a21880 t intel_disable_ddi_buf +ffffffff81a21a30 t mtl_disable_ddi_buf +ffffffff81a21e50 t intel_ddi_disable_fec_state +ffffffff81a21fa0 t mtl_ddi_prepare_link_retrain +ffffffff81a222e0 t intel_ddi_prepare_link_retrain +ffffffff81a227e0 t intel_ddi_set_link_train +ffffffff81a22930 t intel_ddi_set_idle_link_train +ffffffff81a22b00 t intel_ddi_dp_voltage_max +ffffffff81a22bc0 t intel_ddi_dp_preemph_max +ffffffff81a23000 T is_hobl_buf_trans +ffffffff81a23040 T intel_ddi_buf_trans_init +ffffffff81a23300 t mtl_get_cx0_buf_trans +ffffffff81a233e0 t dg2_get_snps_buf_trans +ffffffff81a23450 t adlp_get_combo_buf_trans +ffffffff81a23570 t adlp_get_dkl_buf_trans +ffffffff81a235d0 t adls_get_combo_buf_trans +ffffffff81a236f0 t rkl_get_combo_buf_trans +ffffffff81a23810 t dg1_get_combo_buf_trans +ffffffff81a23930 t tgl_get_combo_buf_trans +ffffffff81a23a70 t tgl_get_dkl_buf_trans +ffffffff81a23ad0 t jsl_get_combo_buf_trans +ffffffff81a23b70 t ehl_get_combo_buf_trans +ffffffff81a23c10 t icl_get_combo_buf_trans +ffffffff81a23cc0 t icl_get_mg_buf_trans +ffffffff81a23d20 t bxt_get_buf_trans +ffffffff81a23da0 t kbl_y_get_buf_trans +ffffffff81a23e40 t kbl_u_get_buf_trans +ffffffff81a23ee0 t kbl_get_buf_trans +ffffffff81a23f80 t skl_y_get_buf_trans +ffffffff81a24020 t skl_u_get_buf_trans +ffffffff81a240c0 t skl_get_buf_trans +ffffffff81a24160 t bdw_get_buf_trans +ffffffff81a241f0 t hsw_get_buf_trans +ffffffff81a25000 T vlv_get_hpll_vco +ffffffff81a25050 T vlv_get_cck_clock +ffffffff81a25100 T vlv_get_cck_clock_hpll +ffffffff81a25200 T intel_update_czclk +ffffffff81a25280 T is_trans_port_sync_master +ffffffff81a252b0 T is_trans_port_sync_mode +ffffffff81a252f0 T intel_crtc_bigjoiner_slave_pipes +ffffffff81a25350 T intel_crtc_is_bigjoiner_slave +ffffffff81a253b0 T intel_crtc_is_bigjoiner_master +ffffffff81a25410 T intel_master_crtc +ffffffff81a254a0 T assert_transcoder +ffffffff81a25660 t transcoder_name +ffffffff81a256a0 T vlv_wait_port_ready +ffffffff81a257f0 T intel_enable_transcoder +ffffffff81a25a50 t assert_planes_disabled +ffffffff81a25b80 T intel_disable_transcoder +ffffffff81a25da0 T intel_rotation_info_size +ffffffff81a25df0 T intel_remapped_info_size +ffffffff81a25f20 T intel_plane_uses_fence +ffffffff81a25f70 T intel_fb_xy_to_linear +ffffffff81a25fc0 T intel_add_fb_offsets +ffffffff81a26010 T intel_plane_fb_max_stride +ffffffff81a26090 T intel_set_plane_visible +ffffffff81a260e0 T intel_plane_fixup_bitmasks +ffffffff81a26190 T intel_plane_disable_noatomic +ffffffff81a26380 T intel_plane_fence_y_offset +ffffffff81a263e0 T intel_has_pending_fb_unpin +ffffffff81a264d0 T intel_get_crtc_new_encoder +ffffffff81a26660 T ilk_pfit_disable +ffffffff81a26720 T intel_phy_is_combo +ffffffff81a26790 T intel_phy_is_tc +ffffffff81a26800 T intel_phy_is_snps +ffffffff81a26850 T intel_port_to_phy +ffffffff81a26900 T intel_port_to_tc +ffffffff81a26a10 T intel_aux_power_domain +ffffffff81a26a50 T intel_modeset_get_crtc_power_domains +ffffffff81a26c80 T intel_modeset_put_crtc_power_domains +ffffffff81a26cb0 T intel_encoder_destroy +ffffffff81a26ce0 T intel_encoder_get_config +ffffffff81a26d10 t intel_crtc_readout_derived_state +ffffffff81a27150 T intel_link_compute_m_n +ffffffff81a27280 T intel_panel_sanitize_ssc +ffffffff81a27360 T intel_zero_m_n +ffffffff81a273a0 T intel_set_m_n +ffffffff81a27460 T intel_cpu_transcoder_has_m2_n2 +ffffffff81a274c0 T intel_cpu_transcoder_set_m1_n1 +ffffffff81a27670 T intel_cpu_transcoder_set_m2_n2 +ffffffff81a277d0 T i9xx_set_pipeconf +ffffffff81a27980 T ilk_set_pipeconf +ffffffff81a27b50 T bdw_get_pipe_misc_bpp +ffffffff81a27c20 T ilk_get_lanes_required +ffffffff81a27c80 T intel_get_m_n +ffffffff81a27d90 T intel_cpu_transcoder_get_m1_n1 +ffffffff81a27f20 T intel_cpu_transcoder_get_m2_n2 +ffffffff81a28080 T intel_crtc_get_pipe_config +ffffffff81a280f0 T i9xx_crtc_clock_get +ffffffff81a28380 T intel_dotclock_calculate +ffffffff81a283e0 T intel_crtc_dotclock +ffffffff81a284b0 T intel_encoder_current_mode +ffffffff81a28660 T intel_fuzzy_clock_check +ffffffff81a286b0 T intel_pipe_config_compare +ffffffff81a2ba00 t pipe_config_mismatch +ffffffff81a2baf0 t pipe_config_infoframe_mismatch +ffffffff81a2bc90 T intel_modeset_all_pipes +ffffffff81a2bea0 T intel_atomic_add_affected_planes +ffffffff81a2bf70 T intel_calc_active_pipes +ffffffff81a2c000 T intel_atomic_check +ffffffff81a2e010 t copy_bigjoiner_crtc_state_nomodeset +ffffffff81a2e120 t intel_atomic_check_planes +ffffffff81a2eb90 t intel_modeset_checks +ffffffff81a2ed20 t intel_atomic_check_crtcs +ffffffff81a2f140 t intel_async_flip_check_hw +ffffffff81a2f610 T intel_crtc_arm_fifo_underrun +ffffffff81a2f6b0 T intel_atomic_helper_free_state_worker +ffffffff81a2f730 T intel_atomic_commit +ffffffff81a2fa90 t intel_atomic_commit_ready +ffffffff81a2fb20 t intel_atomic_commit_work +ffffffff81a2fb40 t intel_atomic_commit_tail +ffffffff81a30cc0 T intel_plane_destroy +ffffffff81a30cf0 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81a30d60 T assert_port_valid +ffffffff81a30de0 T intel_setup_outputs +ffffffff81a31670 T intel_mode_valid +ffffffff81a317f0 T intel_cpu_transcoder_mode_valid +ffffffff81a318b0 T intel_mode_valid_max_plane_size +ffffffff81a31930 T intel_init_display_hooks +ffffffff81a319b0 T intel_initial_commit +ffffffff81a31b50 T i830_enable_pipe +ffffffff81a32190 T i830_disable_pipe +ffffffff81a324c0 T intel_hpd_poll_fini +ffffffff81a325c0 T intel_scanout_needs_vtd_wa +ffffffff81a32600 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81a32760 t intel_atomic_cleanup_work +ffffffff81a32860 t intel_pre_plane_update +ffffffff81a32dc0 t hsw_get_pipe_config +ffffffff81a339f0 t hsw_crtc_enable +ffffffff81a34450 t hsw_crtc_disable +ffffffff81a34750 t skl_commit_modeset_enables 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intel_display_driver_early_probe +ffffffff81a39170 T intel_display_driver_probe_noirq +ffffffff81a39450 T intel_display_driver_probe_nogem +ffffffff81a39760 T intel_display_driver_probe +ffffffff81a39800 T intel_display_driver_register +ffffffff81a39860 T intel_display_driver_remove +ffffffff81a39910 T intel_display_driver_remove_noirq +ffffffff81a399c0 T intel_display_driver_remove_nogem +ffffffff81a39a00 T intel_display_driver_unregister +ffffffff81a39a80 T intel_display_driver_suspend +ffffffff81a39b30 T __intel_display_driver_resume +ffffffff81a39c40 T intel_display_driver_resume +ffffffff81a3a000 T ilk_update_display_irq +ffffffff81a3a140 T ilk_enable_display_irq +ffffffff81a3a160 T ilk_disable_display_irq +ffffffff81a3a240 T bdw_update_port_irq +ffffffff81a3a390 T bdw_enable_pipe_irq +ffffffff81a3a3b0 t bdw_update_pipe_irq +ffffffff81a3a510 T bdw_disable_pipe_irq +ffffffff81a3a620 T ibx_display_interrupt_update +ffffffff81a3a740 T ibx_enable_display_interrupt +ffffffff81a3a760 T ibx_disable_display_interrupt +ffffffff81a3a820 T i915_pipestat_enable_mask +ffffffff81a3a9b0 T i915_enable_pipestat +ffffffff81a3ab30 T i915_disable_pipestat +ffffffff81a3aca0 T i915_enable_asle_pipestat +ffffffff81a3ad50 T i9xx_pipestat_irq_reset +ffffffff81a3aee0 T i9xx_pipestat_irq_ack +ffffffff81a3b060 T i8xx_pipestat_irq_handler +ffffffff81a3b250 t i9xx_pipe_crc_irq_handler +ffffffff81a3b390 T i915_pipestat_irq_handler +ffffffff81a3b5c0 T i965_pipestat_irq_handler +ffffffff81a3b800 T valleyview_pipestat_irq_handler +ffffffff81a3b9a0 T ilk_display_irq_handler +ffffffff81a3bed0 t cpt_irq_handler +ffffffff81a3c240 T ivb_display_irq_handler +ffffffff81a3c7e0 T gen8_de_pipe_underrun_mask +ffffffff81a3c820 T gen8_de_irq_handler +ffffffff81a3d3d0 T gen11_gu_misc_irq_ack +ffffffff81a3d420 T gen11_gu_misc_irq_handler +ffffffff81a3d460 T gen11_display_irq_handler +ffffffff81a3d4f0 T i8xx_enable_vblank +ffffffff81a3d560 T i915gm_enable_vblank +ffffffff81a3d610 T i965_enable_vblank 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T intel_display_power_is_enabled +ffffffff81a3f240 T intel_display_power_set_target_dc_state +ffffffff81a3f360 T intel_display_power_get +ffffffff81a3f3e0 t __intel_display_power_get_domain +ffffffff81a3f5d0 T intel_display_power_get_if_enabled +ffffffff81a3f700 T __intel_display_power_put_async +ffffffff81a3f8f0 t __intel_display_power_put_domain +ffffffff81a3fa60 T intel_display_power_flush_work +ffffffff81a3fb80 t release_async_put_domains +ffffffff81a3fc70 T intel_display_power_put_unchecked +ffffffff81a3fcd0 T intel_display_power_get_in_set +ffffffff81a3fdb0 T intel_display_power_get_in_set_if_enabled +ffffffff81a3fe60 T intel_display_power_put_mask_in_set +ffffffff81a3ff30 T intel_power_domains_init +ffffffff81a40180 t intel_display_power_put_async_work +ffffffff81a403f0 T intel_power_domains_cleanup +ffffffff81a40410 T gen9_dbuf_slices_update +ffffffff81a40620 T intel_power_domains_init_hw +ffffffff81a40b20 t icl_display_core_init +ffffffff81a41320 t bxt_display_core_init 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intel_display_power_aux_io_domain +ffffffff81a436a0 T intel_display_power_legacy_aux_domain +ffffffff81a437b0 T intel_display_power_tbt_aux_domain +ffffffff81a438c0 t __delayed_work_tick +ffffffff81a44000 T intel_display_power_map_init +ffffffff81a44180 t __set_power_wells +ffffffff81a44560 T intel_display_power_map_cleanup +ffffffff81a45000 T lookup_power_well +ffffffff81a450c0 T intel_power_well_enable +ffffffff81a45150 T intel_power_well_name +ffffffff81a45190 T intel_power_well_disable +ffffffff81a45200 T intel_power_well_sync_hw +ffffffff81a45270 T intel_power_well_get +ffffffff81a45310 T intel_power_well_put +ffffffff81a45410 T intel_power_well_is_enabled +ffffffff81a45430 T intel_power_well_is_enabled_cached +ffffffff81a45460 T intel_display_power_well_is_enabled +ffffffff81a45510 T intel_power_well_is_always_on +ffffffff81a45550 T intel_power_well_domains +ffffffff81a45580 T intel_power_well_refcount +ffffffff81a455b0 T gen9_sanitize_dc_state +ffffffff81a45680 T gen9_set_dc_state +ffffffff81a459e0 T gen9_enable_dc5 +ffffffff81a45c40 T skl_enable_dc6 +ffffffff81a45da0 T bxt_enable_dc9 +ffffffff81a45f50 T bxt_disable_dc9 +ffffffff81a46040 T gen9_disable_dc_states +ffffffff81a46410 T chv_phy_powergate_ch +ffffffff81a46520 t assert_chv_phy_status +ffffffff81a468d0 T chv_phy_powergate_lanes +ffffffff81a46b30 t i9xx_power_well_sync_hw_noop +ffffffff81a46b60 t i9xx_always_on_power_well_noop +ffffffff81a46b90 t i9xx_always_on_power_well_enabled +ffffffff81a46bc0 t chv_pipe_power_well_sync_hw +ffffffff81a46bf0 t chv_pipe_power_well_enable +ffffffff81a46c20 t chv_pipe_power_well_disable +ffffffff81a46c80 t chv_pipe_power_well_enabled +ffffffff81a46d80 t chv_dpio_cmn_power_well_enable +ffffffff81a46f90 t chv_dpio_cmn_power_well_disable +ffffffff81a470c0 t vlv_power_well_enabled +ffffffff81a471e0 t i830_pipes_power_well_sync_hw +ffffffff81a472d0 t i830_pipes_power_well_enable +ffffffff81a47390 t i830_pipes_power_well_disable +ffffffff81a473c0 t i830_pipes_power_well_enabled +ffffffff81a47460 t hsw_power_well_sync_hw +ffffffff81a47550 t hsw_power_well_enable +ffffffff81a477d0 t hsw_power_well_disable +ffffffff81a47890 t hsw_power_well_enabled +ffffffff81a47970 t gen9_dc_off_power_well_enable +ffffffff81a47980 t gen9_dc_off_power_well_disable +ffffffff81a47a20 t gen9_dc_off_power_well_enabled +ffffffff81a47ab0 t bxt_dpio_cmn_power_well_enable +ffffffff81a47ae0 t bxt_dpio_cmn_power_well_disable +ffffffff81a47b10 t bxt_dpio_cmn_power_well_enabled +ffffffff81a47b40 t vlv_display_power_well_enable +ffffffff81a47b70 t vlv_display_power_well_disable +ffffffff81a47be0 t vlv_dpio_cmn_power_well_enable +ffffffff81a47c60 t vlv_dpio_cmn_power_well_disable +ffffffff81a47d60 t vlv_power_well_enable +ffffffff81a47d80 t vlv_power_well_disable +ffffffff81a47da0 t icl_aux_power_well_enable +ffffffff81a48430 t icl_aux_power_well_disable +ffffffff81a486c0 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81a486e0 t tgl_tc_cold_off_power_well_enable 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intel_dmc_has_payload +ffffffff81a4d050 T intel_dmc_enable_pipe +ffffffff81a4d160 T intel_dmc_disable_pipe +ffffffff81a4d270 T intel_dmc_load_program +ffffffff81a4daa0 t pipedmc_clock_gating_wa +ffffffff81a4dc90 T intel_dmc_disable_program +ffffffff81a4dec0 T assert_dmc_loaded +ffffffff81a4e040 T intel_dmc_init +ffffffff81a4e300 t dmc_load_work_fn +ffffffff81a4ec10 T intel_dmc_suspend +ffffffff81a4eca0 T intel_dmc_resume +ffffffff81a4ed40 T intel_dmc_fini +ffffffff81a4ee90 T intel_dmc_print_error_state +ffffffff81a4ef90 T intel_dmc_debugfs_register +ffffffff81a4f000 T intel_dp_is_edp +ffffffff81a4f030 T intel_dp_is_uhbr +ffffffff81a4f070 T intel_dp_max_lane_count +ffffffff81a4f0e0 T intel_dp_link_required +ffffffff81a4f120 T intel_dp_max_data_rate +ffffffff81a4f180 T intel_dp_can_bigjoiner +ffffffff81a4f1d0 T intel_dp_get_link_train_fallback_values +ffffffff81a4f580 T intel_dp_mode_to_fec_clock +ffffffff81a4f5d0 T intel_dp_dsc_nearest_valid_bpp +ffffffff81a4f6d0 T intel_dp_dsc_get_output_bpp +ffffffff81a4f7f0 T intel_dp_dsc_get_slice_count +ffffffff81a4f980 T intel_dp_min_bpp +ffffffff81a4f9c0 T intel_dp_need_bigjoiner +ffffffff81a4fa20 T intel_dp_source_supports_tps3 +ffffffff81a4fa70 T intel_dp_source_supports_tps4 +ffffffff81a4fab0 T intel_dp_max_link_rate +ffffffff81a4fb60 T intel_dp_rate_select +ffffffff81a4fc00 T intel_dp_compute_rate +ffffffff81a4fcd0 T intel_dp_has_hdmi_sink +ffffffff81a4fd10 T intel_dp_adjust_compliance_config +ffffffff81a4fe50 T intel_dp_dsc_compute_bpp +ffffffff81a4ff00 T intel_dp_dsc_compute_config +ffffffff81a505d0 T intel_dp_limited_color_range +ffffffff81a50640 T intel_dp_compute_psr_vsc_sdp +ffffffff81a506c0 T intel_dp_needs_vsc_sdp +ffffffff81a50710 t intel_dp_compute_vsc_colorimetry +ffffffff81a50890 T intel_dp_compute_config +ffffffff81a50ce0 t intel_dp_compute_output_format +ffffffff81a50f10 t intel_dp_audio_compute_config +ffffffff81a50ff0 t intel_dp_drrs_compute_config +ffffffff81a51190 t intel_dp_compute_vsc_sdp +ffffffff81a51230 t intel_dp_compute_hdr_metadata_infoframe_sdp +ffffffff81a512c0 T intel_dp_set_link_params +ffffffff81a51300 T intel_edp_backlight_on +ffffffff81a513a0 T intel_edp_backlight_off +ffffffff81a51430 T intel_dp_sink_set_decompression_state +ffffffff81a514d0 T intel_dp_wait_source_oui +ffffffff81a515c0 T intel_dp_set_power +ffffffff81a517e0 T intel_dp_sync_state +ffffffff81a51860 t intel_dp_get_dpcd +ffffffff81a519c0 t intel_dp_reset_max_link_params +ffffffff81a51ac0 T intel_dp_initial_fastset_check +ffffffff81a51bf0 T intel_dp_check_frl_training +ffffffff81a521a0 T intel_dp_pcon_dsc_configure +ffffffff81a52390 T intel_dp_configure_protocol_converter +ffffffff81a52570 T intel_dp_get_colorimetry_status +ffffffff81a525d0 T intel_edp_fixup_vbt_bpp +ffffffff81a52660 T intel_write_dp_vsc_sdp +ffffffff81a52800 T intel_dp_set_infoframes +ffffffff81a52920 t intel_write_dp_sdp +ffffffff81a52c00 T intel_read_dp_sdp +ffffffff81a52f20 T intel_dp_get_active_pipes +ffffffff81a53140 T intel_dp_retrain_link +ffffffff81a533f0 t intel_dp_needs_link_retrain +ffffffff81a53570 T intel_dp_phy_test +ffffffff81a53c20 T intel_digital_port_connected +ffffffff81a53cd0 T intel_dp_encoder_flush_work +ffffffff81a53d30 T intel_dp_encoder_suspend +ffffffff81a53d70 T intel_dp_encoder_shutdown +ffffffff81a53db0 T intel_dp_hpd_pulse +ffffffff81a54420 T intel_dp_is_port_edp +ffffffff81a544b0 T intel_dp_init_connector +ffffffff81a55610 t intel_dp_modeset_retry_work_fn +ffffffff81a556b0 t intel_dp_set_common_rates +ffffffff81a55830 T intel_dp_mst_suspend +ffffffff81a558d0 T intel_dp_mst_resume +ffffffff81a55980 t intel_dp_output_format +ffffffff81a55ac0 t intel_dp_compute_link_config +ffffffff81a56280 t intel_dp_tmds_clock_valid +ffffffff81a56320 t intel_dp_set_sink_rates +ffffffff81a56550 t intel_dp_check_device_service_irq +ffffffff81a56b20 t intel_dp_force +ffffffff81a56c50 t intel_dp_connector_register +ffffffff81a56d20 t intel_dp_connector_unregister +ffffffff81a56d80 t intel_dp_oob_hotplug_event +ffffffff81a56e00 t intel_dp_set_edid +ffffffff81a57200 t intel_dp_get_modes +ffffffff81a572f0 t intel_dp_detect +ffffffff81a57bb0 t intel_dp_mode_valid +ffffffff81a57f30 t intel_dp_connector_atomic_check +ffffffff81a582a0 t intel_dp_get_dsc_sink_cap +ffffffff81a58410 t intel_dp_mode_min_output_bpp +ffffffff81a58470 t intel_dp_mode_valid_downstream +ffffffff81a58630 t icl_max_source_rate +ffffffff81a59000 T intel_dp_aux_pack +ffffffff81a59070 T intel_dp_aux_fini +ffffffff81a59090 T intel_dp_aux_init +ffffffff81a592a0 t xelpdp_aux_ctl_reg +ffffffff81a59370 t xelpdp_aux_data_reg +ffffffff81a59440 t tgl_aux_ctl_reg +ffffffff81a594c0 t tgl_aux_data_reg +ffffffff81a59550 t skl_aux_ctl_reg +ffffffff81a595d0 t skl_aux_data_reg +ffffffff81a59660 t ilk_aux_ctl_reg +ffffffff81a596e0 t ilk_aux_data_reg +ffffffff81a59770 t g4x_aux_ctl_reg +ffffffff81a597f0 t g4x_aux_data_reg +ffffffff81a59890 t skl_get_aux_clock_divider +ffffffff81a598c0 t hsw_get_aux_clock_divider +ffffffff81a59950 t ilk_get_aux_clock_divider +ffffffff81a599b0 t g4x_get_aux_clock_divider +ffffffff81a59a00 t skl_get_aux_send_ctl +ffffffff81a59a80 t g4x_get_aux_send_ctl +ffffffff81a59ae0 t kasprintf +ffffffff81a59bb0 t intel_dp_aux_transfer +ffffffff81a59e40 T intel_dp_aux_ch +ffffffff81a59fa0 T intel_dp_aux_irq_handler +ffffffff81a5a040 t intel_dp_aux_xfer +ffffffff81a5b000 T intel_dp_aux_init_backlight_funcs +ffffffff81a5b260 t intel_dp_aux_hdr_setup_backlight +ffffffff81a5b3e0 t intel_dp_aux_hdr_get_backlight +ffffffff81a5b560 t intel_dp_aux_hdr_set_backlight +ffffffff81a5b660 t intel_dp_aux_hdr_disable_backlight +ffffffff81a5b6e0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a5b910 t intel_dp_aux_vesa_setup_backlight +ffffffff81a5bb70 t intel_dp_aux_vesa_get_backlight +ffffffff81a5bba0 t intel_dp_aux_vesa_set_backlight +ffffffff81a5bc40 t intel_dp_aux_vesa_disable_backlight +ffffffff81a5bcf0 t intel_dp_aux_vesa_enable_backlight +ffffffff81a5c000 T intel_dp_hdcp_init +ffffffff81a5c0b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a5c1a0 t intel_dp_hdcp_read_bksv +ffffffff81a5c230 t intel_dp_hdcp_read_bstatus +ffffffff81a5c2c0 t intel_dp_hdcp_repeater_present +ffffffff81a5c370 t intel_dp_hdcp_read_ri_prime +ffffffff81a5c400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a5c4a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a5c590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a5c630 t intel_dp_hdcp_toggle_signalling +ffffffff81a5c660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a5c850 t intel_dp_hdcp_check_link +ffffffff81a5c8e0 t intel_dp_hdcp_capable +ffffffff81a5c990 t intel_dp_hdcp2_capable +ffffffff81a5ca10 t intel_dp_hdcp2_write_msg +ffffffff81a5cbc0 t intel_dp_hdcp2_read_msg +ffffffff81a5d290 t intel_dp_hdcp2_config_stream_type +ffffffff81a5d2f0 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a5d550 t intel_dp_mst_hdcp2_check_link +ffffffff81a5d610 t intel_dp_hdcp2_check_link +ffffffff81a5e000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a5e0d0 t intel_dp_init_lttpr +ffffffff81a5e3b0 T intel_dp_get_adjust_train +ffffffff81a5eab0 T intel_dp_program_link_training_pattern +ffffffff81a5ebd0 T intel_dp_set_signal_levels +ffffffff81a5ef70 T intel_dp_dump_link_status +ffffffff81a5f060 T intel_dp_stop_link_train +ffffffff81a5f310 T intel_dp_start_link_train +ffffffff81a610a0 T intel_dp_128b132b_sdp_crc16 +ffffffff81a61170 t intel_dp_link_train_phy +ffffffff81a63000 T intel_dp_mst_encoder_active_links +ffffffff81a63030 T intel_dp_mst_encoder_init +ffffffff81a63270 T intel_dp_mst_source_support +ffffffff81a632b0 T intel_dp_mst_encoder_cleanup +ffffffff81a63310 T intel_dp_mst_is_master_trans +ffffffff81a63350 T intel_dp_mst_is_slave_trans +ffffffff81a63390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a63450 t intel_dp_add_mst_connector +ffffffff81a63680 t intel_dp_mst_poll_hpd_irq +ffffffff81a636a0 t intel_dp_mst_get_hw_state +ffffffff81a63700 t intel_dp_mst_connector_late_register +ffffffff81a63770 t intel_dp_mst_connector_early_unregister +ffffffff81a637a0 t intel_dp_mst_get_modes +ffffffff81a63840 t intel_dp_mst_detect +ffffffff81a63940 t intel_dp_mst_mode_valid_ctx +ffffffff81a63b60 t intel_mst_atomic_best_encoder +ffffffff81a63bc0 t intel_dp_mst_atomic_check +ffffffff81a63d30 t intel_dp_mst_compute_config +ffffffff81a64280 t intel_dp_mst_compute_config_late +ffffffff81a64380 t intel_mst_disable_dp +ffffffff81a64460 t intel_mst_post_disable_dp +ffffffff81a64710 t intel_mst_post_pll_disable_dp +ffffffff81a64770 t intel_mst_pre_pll_enable_dp +ffffffff81a647b0 t intel_mst_pre_enable_dp +ffffffff81a649d0 t intel_mst_enable_dp +ffffffff81a64d70 t intel_dp_mst_enc_get_hw_state +ffffffff81a64db0 t intel_dp_mst_enc_get_config +ffffffff81a64dd0 t intel_dp_mst_initial_fastset_check +ffffffff81a64df0 t intel_dp_mst_encoder_destroy +ffffffff81a64e20 t intel_dp_mst_find_vcpi_slots_for_bpp +ffffffff81a66000 T bxt_port_to_phy_channel +ffffffff81a66110 T bxt_ddi_phy_set_signal_levels +ffffffff81a664e0 T bxt_ddi_phy_is_enabled +ffffffff81a66610 T bxt_ddi_phy_uninit +ffffffff81a666f0 T bxt_ddi_phy_init +ffffffff81a66910 t _bxt_ddi_phy_init +ffffffff81a66e50 T bxt_ddi_phy_verify_state +ffffffff81a67130 t __phy_reg_verify_state +ffffffff81a67230 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a672a0 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a67500 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a676e0 T vlv_dig_port_to_channel +ffffffff81a67750 T vlv_dig_port_to_phy +ffffffff81a677c0 T vlv_pipe_to_channel +ffffffff81a67820 T chv_set_phy_signal_level +ffffffff81a67b70 T chv_data_lane_soft_reset +ffffffff81a67d40 T chv_phy_pre_pll_enable +ffffffff81a67fe0 T chv_phy_pre_encoder_enable +ffffffff81a68240 T chv_phy_release_cl2_override +ffffffff81a682d0 T chv_phy_post_pll_disable +ffffffff81a68380 T vlv_set_phy_signal_level +ffffffff81a684f0 T vlv_phy_pre_pll_enable +ffffffff81a685f0 T vlv_phy_pre_encoder_enable +ffffffff81a686f0 T vlv_phy_reset_lanes +ffffffff81a69000 T pnv_calc_dpll_params +ffffffff81a690c0 T i9xx_calc_dpll_params +ffffffff81a69190 T vlv_calc_dpll_params +ffffffff81a69250 T chv_calc_dpll_params +ffffffff81a69320 T bxt_find_best_dpll +ffffffff81a69340 t chv_find_best_dpll +ffffffff81a69680 T i9xx_dpll_compute_fp +ffffffff81a696c0 T vlv_compute_dpll +ffffffff81a69740 T chv_compute_dpll +ffffffff81a697c0 T intel_dpll_crtc_compute_clock +ffffffff81a698c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a69a10 T intel_dpll_init_clock_hook +ffffffff81a69b20 T i9xx_enable_pll +ffffffff81a69ef0 T vlv_enable_pll +ffffffff81a6a410 T chv_enable_pll +ffffffff81a6a9e0 T vlv_force_pll_on +ffffffff81a6ab30 T vlv_disable_pll +ffffffff81a6ac00 T chv_disable_pll +ffffffff81a6ad30 T i9xx_disable_pll +ffffffff81a6ae50 T vlv_force_pll_off +ffffffff81a6af50 T assert_pll_enabled +ffffffff81a6b050 T assert_pll_disabled +ffffffff81a6b150 t intel_pll_is_valid +ffffffff81a6b210 t mtl_crtc_compute_clock +ffffffff81a6b2d0 t dg2_crtc_compute_clock +ffffffff81a6b350 t hsw_crtc_compute_clock +ffffffff81a6b410 t hsw_crtc_get_shared_dpll +ffffffff81a6b4b0 t ilk_crtc_compute_clock +ffffffff81a6b7b0 t ilk_crtc_get_shared_dpll +ffffffff81a6b800 t g4x_find_best_dpll +ffffffff81a6bb40 t chv_crtc_compute_clock +ffffffff81a6bc50 t vlv_crtc_compute_clock +ffffffff81a6c0f0 t g4x_crtc_compute_clock +ffffffff81a6c250 t i9xx_compute_dpll +ffffffff81a6c4d0 t pnv_crtc_compute_clock +ffffffff81a6c8b0 t i9xx_crtc_compute_clock +ffffffff81a6c9d0 t i9xx_find_best_dpll +ffffffff81a6cd10 t i8xx_crtc_compute_clock +ffffffff81a6d000 T intel_get_shared_dpll_by_id +ffffffff81a6d040 T assert_shared_dpll +ffffffff81a6d1f0 T intel_dpll_get_hw_state +ffffffff81a6d220 T icl_tc_port_to_pll_id +ffffffff81a6d250 T intel_enable_shared_dpll +ffffffff81a6d5b0 T intel_disable_shared_dpll +ffffffff81a6d840 T intel_unreference_shared_dpll_crtc +ffffffff81a6d940 T intel_shared_dpll_swap_state +ffffffff81a6da20 T icl_set_active_port_dpll +ffffffff81a6da60 T intel_shared_dpll_init +ffffffff81a6dc60 T intel_compute_shared_dplls +ffffffff81a6dcf0 T intel_reserve_shared_dplls +ffffffff81a6dd80 T intel_release_shared_dplls +ffffffff81a6ddc0 T intel_update_active_dpll +ffffffff81a6de20 T intel_dpll_get_freq +ffffffff81a6deb0 T intel_dpll_update_ref_clks +ffffffff81a6df00 T intel_dpll_readout_hw_state +ffffffff81a6e130 T intel_dpll_sanitize_state +ffffffff81a6e210 T intel_dpll_dump_hw_state +ffffffff81a6e290 T intel_shared_dpll_state_verify +ffffffff81a6e470 t verify_single_dpll_state +ffffffff81a6e9e0 T intel_shared_dpll_verify_disabled +ffffffff81a6ea60 t icl_compute_dplls +ffffffff81a6f6a0 t icl_get_dplls +ffffffff81a6f970 t icl_put_dplls +ffffffff81a6fa30 t icl_update_active_dpll +ffffffff81a6fae0 t icl_update_dpll_ref_clks +ffffffff81a6fb20 t icl_dump_hw_state +ffffffff81a6fbe0 t combo_pll_enable +ffffffff81a6fdf0 t combo_pll_disable +ffffffff81a6fec0 t combo_pll_get_hw_state +ffffffff81a6ff40 t icl_ddi_combo_pll_get_freq +ffffffff81a70110 t icl_dpll_write +ffffffff81a70350 t adlp_cmtg_clock_gating_wa +ffffffff81a704b0 t icl_pll_disable +ffffffff81a70650 t icl_pll_get_hw_state +ffffffff81a70930 t tbt_pll_enable +ffffffff81a70ae0 t tbt_pll_disable +ffffffff81a70b00 t tbt_pll_get_hw_state +ffffffff81a70b20 t icl_ddi_tbt_pll_get_freq +ffffffff81a70b90 t mg_pll_enable +ffffffff81a711a0 t mg_pll_disable +ffffffff81a711e0 t dkl_pll_get_hw_state +ffffffff81a713f0 t icl_ddi_mg_pll_get_freq +ffffffff81a714d0 t icl_calc_dpll_state +ffffffff81a71610 t intel_find_shared_dpll +ffffffff81a71930 t intel_reference_shared_dpll +ffffffff81a71b50 t intel_unreference_shared_dpll +ffffffff81a71d50 t mg_pll_get_hw_state +ffffffff81a71fa0 t bxt_compute_dpll +ffffffff81a722a0 t bxt_get_dpll +ffffffff81a72370 t intel_put_dpll +ffffffff81a723d0 t bxt_update_dpll_ref_clks +ffffffff81a72410 t bxt_dump_hw_state +ffffffff81a724c0 t bxt_ddi_pll_enable +ffffffff81a72e90 t bxt_ddi_pll_disable +ffffffff81a730a0 t bxt_ddi_pll_get_hw_state +ffffffff81a734d0 t bxt_ddi_pll_get_freq +ffffffff81a73560 t bxt_ddi_set_dpll_hw_state +ffffffff81a73750 t skl_compute_dpll +ffffffff81a73eb0 t skl_get_dpll +ffffffff81a73f60 t skl_update_dpll_ref_clks +ffffffff81a73fa0 t skl_dump_hw_state +ffffffff81a74000 t skl_ddi_dpll0_enable +ffffffff81a740c0 t skl_ddi_dpll0_disable +ffffffff81a740f0 t skl_ddi_dpll0_get_hw_state +ffffffff81a741f0 t skl_ddi_pll_get_freq +ffffffff81a74280 t skl_ddi_wrpll_get_freq +ffffffff81a743e0 t skl_ddi_pll_enable +ffffffff81a74600 t skl_ddi_pll_disable +ffffffff81a74690 t skl_ddi_pll_get_hw_state +ffffffff81a747b0 t hsw_compute_dpll +ffffffff81a74fd0 t hsw_get_dpll +ffffffff81a75120 t hsw_update_dpll_ref_clks +ffffffff81a75190 t hsw_dump_hw_state +ffffffff81a751c0 t hsw_ddi_wrpll_enable +ffffffff81a75240 t hsw_ddi_wrpll_disable +ffffffff81a75320 t hsw_ddi_wrpll_get_hw_state +ffffffff81a753c0 t hsw_ddi_wrpll_get_freq +ffffffff81a754b0 t hsw_ddi_spll_enable +ffffffff81a75510 t hsw_ddi_spll_disable +ffffffff81a755e0 t hsw_ddi_spll_get_hw_state +ffffffff81a75670 t hsw_ddi_spll_get_freq +ffffffff81a75710 t hsw_ddi_lcpll_enable +ffffffff81a75740 t hsw_ddi_lcpll_disable +ffffffff81a75770 t hsw_ddi_lcpll_get_hw_state +ffffffff81a757a0 t hsw_ddi_lcpll_get_freq +ffffffff81a75820 t ibx_compute_dpll +ffffffff81a75850 t ibx_get_dpll +ffffffff81a75950 t ibx_dump_hw_state +ffffffff81a759b0 t ibx_pch_dpll_enable +ffffffff81a75b50 t ibx_pch_dpll_disable +ffffffff81a75bd0 t ibx_pch_dpll_get_hw_state +ffffffff81a76000 T intel_dpt_pin +ffffffff81a761e0 T intel_dpt_unpin +ffffffff81a76250 T intel_dpt_resume +ffffffff81a76320 T intel_dpt_suspend +ffffffff81a763f0 T intel_dpt_create +ffffffff81a767e0 t dpt_insert_page +ffffffff81a76850 t dpt_clear_range +ffffffff81a76880 t dpt_insert_entries +ffffffff81a76970 t dpt_cleanup +ffffffff81a769c0 t dpt_bind_vma +ffffffff81a76a50 t dpt_unbind_vma +ffffffff81a76a80 T intel_dpt_destroy +ffffffff81a76ad0 T intel_dpt_configure +ffffffff81a76c70 t __ww_mutex_lock +ffffffff81a77000 T intel_drrs_type_str +ffffffff81a77040 T intel_drrs_is_active +ffffffff81a77070 T intel_drrs_activate +ffffffff81a77260 T intel_drrs_deactivate +ffffffff81a77420 T intel_drrs_invalidate +ffffffff81a77440 t intel_drrs_frontbuffer_update +ffffffff81a77690 T intel_drrs_flush +ffffffff81a776b0 T intel_drrs_crtc_init +ffffffff81a77750 t intel_drrs_downclock_work +ffffffff81a77870 T intel_drrs_crtc_debugfs_add +ffffffff81a778a0 T intel_drrs_connector_debugfs_add +ffffffff81a778b0 t __delayed_work_tick +ffffffff81a78000 T intel_dsb_reg_write +ffffffff81a78140 T intel_dsb_finish +ffffffff81a781c0 T intel_dsb_commit +ffffffff81a78370 T intel_dsb_wait +ffffffff81a78560 T intel_dsb_prepare +ffffffff81a786e0 T intel_dsb_cleanup +ffffffff81a79000 T intel_dsi_wait_panel_power_cycle +ffffffff81a790f0 T intel_dsi_shutdown +ffffffff81a791e0 T intel_dsi_bitrate +ffffffff81a79270 T intel_dsi_tlpx_ns +ffffffff81a792c0 T intel_dsi_get_modes +ffffffff81a792d0 T intel_dsi_mode_valid +ffffffff81a79390 T intel_dsi_host_init +ffffffff81a79440 T intel_dsi_get_panel_orientation +ffffffff81a7a000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a7a0a0 t dcs_setup_backlight +ffffffff81a7a120 t dcs_get_backlight +ffffffff81a7a210 t dcs_set_backlight +ffffffff81a7a300 t dcs_disable_backlight +ffffffff81a7a660 t dcs_enable_backlight +ffffffff81a7b000 T intel_dsi_vbt_exec_sequence +ffffffff81a7b020 T intel_dsi_log_params +ffffffff81a7b3a0 T intel_dsi_vbt_init +ffffffff81a7b840 T intel_dsi_vbt_gpio_init +ffffffff81a7b860 T intel_dsi_vbt_gpio_cleanup +ffffffff81a7c000 T intel_dvo_init +ffffffff81a7c650 t intel_disable_dvo +ffffffff81a7c6f0 t intel_enable_dvo +ffffffff81a7c7c0 t intel_dvo_get_hw_state +ffffffff81a7c830 t intel_dvo_get_config +ffffffff81a7c8d0 t intel_dvo_compute_config +ffffffff81a7c960 t intel_dvo_pre_enable +ffffffff81a7ca60 t intel_dvo_connector_get_hw_state +ffffffff81a7caf0 t intel_dvo_enc_destroy +ffffffff81a7cb30 t intel_dvo_detect +ffffffff81a7cc30 t intel_dvo_get_modes +ffffffff81a7cca0 t intel_dvo_mode_valid +ffffffff81a7d000 T intel_fb_get_format_info +ffffffff81a7d2b0 T intel_fb_is_tiled_modifier +ffffffff81a7d2f0 t lookup_modifier +ffffffff81a7d530 T intel_fb_is_ccs_modifier +ffffffff81a7d570 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a7d5b0 T intel_fb_is_mc_ccs_modifier +ffffffff81a7d5f0 T intel_fb_plane_get_modifiers +ffffffff81a7d7d0 T intel_fb_plane_supports_modifier +ffffffff81a7d850 T intel_format_info_is_yuv_semiplanar +ffffffff81a7d8d0 T intel_fb_is_ccs_aux_plane +ffffffff81a7d980 T intel_fb_rc_ccs_cc_plane +ffffffff81a7da50 T is_surface_linear +ffffffff81a7dbb0 T main_to_ccs_plane +ffffffff81a7dc60 T skl_ccs_to_main_plane +ffffffff81a7dda0 T skl_main_to_aux_plane +ffffffff81a7dec0 T intel_tile_size +ffffffff81a7df00 T intel_tile_width_bytes +ffffffff81a7e320 T intel_tile_height +ffffffff81a7e380 T intel_tile_row_size +ffffffff81a7e400 T intel_fb_align_height +ffffffff81a7e480 T intel_fb_modifier_uses_dpt +ffffffff81a7e4c0 T intel_fb_uses_dpt +ffffffff81a7e520 T intel_cursor_alignment +ffffffff81a7e580 T intel_surf_alignment +ffffffff81a7e810 T intel_fb_plane_get_subsampling +ffffffff81a7e960 T intel_plane_adjust_aligned_offset +ffffffff81a7e9d0 t intel_adjust_aligned_offset +ffffffff81a7eb80 T intel_plane_compute_aligned_offset +ffffffff81a7ec80 t intel_compute_aligned_offset +ffffffff81a7ee40 T intel_fb_needs_pot_stride_remap +ffffffff81a7eeb0 T intel_fb_supports_90_270_rotation +ffffffff81a7ef10 T intel_fill_fb_info +ffffffff81a7fa10 t calc_plane_remap_info +ffffffff81a803c0 T intel_fb_fill_view +ffffffff81a80430 T intel_plane_compute_gtt +ffffffff81a80910 t intel_plane_check_stride +ffffffff81a80a70 T intel_framebuffer_init +ffffffff81a812d0 t gen12_ccs_aux_stride +ffffffff81a81330 T intel_user_framebuffer_create +ffffffff81a81490 T intel_framebuffer_create +ffffffff81a81520 t intel_adjust_tile_offset +ffffffff81a81660 t intel_user_framebuffer_destroy +ffffffff81a816d0 t intel_user_framebuffer_create_handle +ffffffff81a81700 t intel_user_framebuffer_dirty +ffffffff81a82000 T intel_pin_and_fence_fb_obj +ffffffff81a82330 t i915_gem_object_lock +ffffffff81a82540 T intel_unpin_fb_vma +ffffffff81a825b0 T intel_plane_pin_fb +ffffffff81a828e0 T intel_plane_unpin_fb +ffffffff81a83000 T intel_fbc_cleanup +ffffffff81a831c0 T intel_fbc_pre_update +ffffffff81a83850 T intel_fbc_post_update +ffffffff81a83a00 T intel_fbc_invalidate +ffffffff81a83b80 T intel_fbc_flush +ffffffff81a83e20 T intel_fbc_atomic_check +ffffffff81a843e0 T intel_fbc_disable +ffffffff81a844a0 t __intel_fbc_disable +ffffffff81a845e0 T intel_fbc_update +ffffffff81a84ca0 T intel_fbc_reset_underrun +ffffffff81a84e00 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a84ec0 T intel_fbc_add_plane +ffffffff81a84ef0 T intel_fbc_init +ffffffff81a85170 T intel_fbc_sanitize +ffffffff81a85240 T intel_fbc_crtc_debugfs_add +ffffffff81a85270 T intel_fbc_debugfs_register +ffffffff81a852a0 t intel_fbc_is_ok +ffffffff81a85410 t intel_fbc_update_state +ffffffff81a85790 t intel_fbc_underrun_work_fn +ffffffff81a85860 t ivb_fbc_activate +ffffffff81a85ab0 t ilk_fbc_deactivate +ffffffff81a85b60 t ilk_fbc_is_active +ffffffff81a85bc0 t ivb_fbc_is_compressing +ffffffff81a85c30 t snb_fbc_nuke +ffffffff81a85cb0 t ilk_fbc_program_cfb +ffffffff81a85d10 t ivb_fbc_set_false_color +ffffffff81a85d90 t snb_fbc_activate +ffffffff81a85e20 t ilk_fbc_is_compressing +ffffffff81a85e90 t ilk_fbc_activate +ffffffff81a85fc0 t i965_fbc_nuke +ffffffff81a86060 t g4x_fbc_activate +ffffffff81a86170 t g4x_fbc_deactivate +ffffffff81a86200 t g4x_fbc_is_active +ffffffff81a86260 t g4x_fbc_is_compressing +ffffffff81a862c0 t g4x_fbc_program_cfb +ffffffff81a86310 t i8xx_fbc_activate +ffffffff81a86480 t i8xx_fbc_deactivate +ffffffff81a86550 t i8xx_fbc_is_active +ffffffff81a865b0 t i8xx_fbc_is_compressing +ffffffff81a86610 t i8xx_fbc_program_cfb +ffffffff81a86690 t i8xx_fbc_nuke +ffffffff81a87000 T intel_fbdev_init +ffffffff81a874f0 t intel_fbdev_suspend_worker +ffffffff81a87520 T intel_fbdev_initial_config_async +ffffffff81a87590 T intel_fbdev_unregister +ffffffff81a875d0 T intel_fbdev_set_suspend +ffffffff81a87600 T intel_fbdev_fini +ffffffff81a876a0 T intel_fbdev_output_poll_changed +ffffffff81a87740 T intel_fbdev_restore_mode +ffffffff81a877c0 T intel_fbdev_framebuffer +ffffffff81a87800 t intelfb_create +ffffffff81a87e00 t intelfb_dirty +ffffffff81a87e70 t intel_fbdev_set_par +ffffffff81a88000 T assert_fdi_tx_enabled +ffffffff81a88020 t assert_fdi_tx +ffffffff81a88160 T assert_fdi_tx_disabled +ffffffff81a88180 T assert_fdi_rx_enabled +ffffffff81a88270 T assert_fdi_rx_disabled +ffffffff81a88360 T assert_fdi_tx_pll_enabled +ffffffff81a88440 T assert_fdi_rx_pll_enabled +ffffffff81a88530 T assert_fdi_rx_pll_disabled +ffffffff81a88620 T intel_fdi_link_train +ffffffff81a88640 T intel_fdi_pll_freq_update +ffffffff81a886f0 T intel_fdi_link_freq +ffffffff81a88740 T ilk_fdi_compute_config +ffffffff81a88a80 T intel_fdi_normal_train +ffffffff81a88c10 T hsw_fdi_link_train +ffffffff81a890f0 T hsw_fdi_disable +ffffffff81a89250 T ilk_fdi_pll_enable +ffffffff81a89440 T ilk_fdi_pll_disable +ffffffff81a89570 T ilk_fdi_disable +ffffffff81a897c0 T intel_fdi_init_hook +ffffffff81a89820 t ilk_fdi_link_train +ffffffff81a89e80 t gen6_fdi_link_train +ffffffff81a8a6c0 t ivb_manual_fdi_link_train +ffffffff81a8af40 t cpt_set_fdi_bc_bifurcation +ffffffff81a8c000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81a8c3c0 T intel_set_pch_fifo_underrun_reporting +ffffffff81a8c5f0 T intel_cpu_fifo_underrun_irq_handler +ffffffff81a8c7e0 T intel_pch_fifo_underrun_irq_handler +ffffffff81a8c860 T intel_check_cpu_fifo_underruns +ffffffff81a8ca70 T intel_check_pch_fifo_underruns +ffffffff81a8cba0 T intel_init_fifo_underrun_reporting +ffffffff81a8d000 T intel_frontbuffer_flip_prepare +ffffffff81a8d050 T intel_frontbuffer_flip_complete +ffffffff81a8d130 T intel_frontbuffer_flip +ffffffff81a8d200 T __intel_fb_invalidate +ffffffff81a8d290 T __intel_fb_flush +ffffffff81a8d380 T intel_frontbuffer_get +ffffffff81a8d4c0 t frontbuffer_active +ffffffff81a8d4f0 t frontbuffer_retire +ffffffff81a8d530 T intel_frontbuffer_put +ffffffff81a8d660 T intel_frontbuffer_track +ffffffff81a8e000 T intel_atomic_global_obj_init +ffffffff81a8e070 T intel_atomic_global_obj_cleanup +ffffffff81a8e160 T intel_atomic_get_global_obj_state +ffffffff81a8e3b0 T intel_atomic_get_old_global_obj_state +ffffffff81a8e410 T intel_atomic_get_new_global_obj_state +ffffffff81a8e470 T intel_atomic_swap_global_state +ffffffff81a8e5b0 T intel_atomic_clear_global_state +ffffffff81a8e6d0 T intel_atomic_lock_global_state +ffffffff81a8e760 T intel_atomic_serialize_global_state +ffffffff81a8e7f0 T intel_atomic_global_state_is_serialized +ffffffff81a8f000 T intel_gmbus_is_valid_pin +ffffffff81a8f100 T intel_gmbus_reset +ffffffff81a8f160 T intel_bb_set_bits +ffffffff81a8f2a0 T intel_bb_set_dir +ffffffff81a8f2d0 T intel_bb_read_bits +ffffffff81a8f460 T intel_acquire_bus +ffffffff81a8f660 T intel_release_bus +ffffffff81a8f800 T intel_send_start +ffffffff81a8f820 T intel_send_stop +ffffffff81a8f840 T intel_initiate_xfer +ffffffff81a8f860 T intel_read_byte +ffffffff81a8f880 T intel_write_byte +ffffffff81a8f8a0 T intel_gmbus_output_aksv +ffffffff81a8f970 t do_gmbus_xfer +ffffffff81a8ff70 T intel_gmbus_setup +ffffffff81a902f0 T intel_gmbus_teardown +ffffffff81a90370 T intel_gmbus_get_adapter +ffffffff81a903f0 T intel_gmbus_force_bit +ffffffff81a90490 T intel_gmbus_is_forced_bit +ffffffff81a904c0 T intel_gmbus_irq_handler +ffffffff81a90560 t gmbus_xfer_read +ffffffff81a90850 t gmbus_xfer_write +ffffffff81a90a90 t gmbus_wait +ffffffff81a90e70 t gmbus_wait_idle +ffffffff81a91000 t gmbus_xfer +ffffffff81a910e0 t gmbus_func +ffffffff81a91120 t gmbus_lock_bus +ffffffff81a91140 t gmbus_trylock_bus +ffffffff81a911a0 t gmbus_unlock_bus +ffffffff81a92000 T intel_hdcp_capable +ffffffff81a920a0 t intel_hdcp_read_valid_bksv +ffffffff81a92330 T intel_hdcp2_capable +ffffffff81a92450 T is_hdcp_supported +ffffffff81a924a0 T intel_hdcp_component_init +ffffffff81a92500 T intel_hdcp_init +ffffffff81a92680 t intel_hdcp_check_work +ffffffff81a94fc0 t intel_hdcp_prop_work +ffffffff81a95040 T intel_hdcp_enable +ffffffff81a95090 T intel_hdcp_disable +ffffffff81a951c0 t intel_hdcp_update_value +ffffffff81a95380 t _intel_hdcp2_disable +ffffffff81a95770 t _intel_hdcp_disable +ffffffff81a95a60 T intel_hdcp_update_pipe +ffffffff81a95bd0 T intel_hdcp_component_fini +ffffffff81a95c70 T intel_hdcp_cleanup +ffffffff81a95db0 T intel_hdcp_atomic_check +ffffffff81a95e40 T intel_hdcp_handle_cp_irq +ffffffff81a95f40 t __delayed_work_tick +ffffffff81a95f60 t hdcp2_authenticate_repeater_topology +ffffffff81a96220 t transcoder_name +ffffffff81a96260 t intel_hdcp_get_repeater_ctl +ffffffff81a96330 t ktime_get_raw +ffffffff81a963b0 t wait_remaining_ms_from_jiffies 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g4x_set_infoframes +ffffffff81a9b910 t g4x_infoframes_enabled +ffffffff81a9b990 t hsw_set_infoframes +ffffffff81a9bc20 t hsw_infoframes_enabled +ffffffff81a9bcb0 t ibx_write_infoframe +ffffffff81a9bfc0 t ibx_read_infoframe +ffffffff81a9c130 t ibx_set_infoframes +ffffffff81a9c460 t ibx_infoframes_enabled +ffffffff81a9c4f0 t cpt_write_infoframe +ffffffff81a9c7f0 t cpt_read_infoframe +ffffffff81a9c960 t cpt_set_infoframes +ffffffff81a9cc40 t cpt_infoframes_enabled +ffffffff81a9ccb0 T intel_hdmi_init_connector +ffffffff81a9d430 T intel_hdmi_dsc_get_slice_height +ffffffff81a9d490 T intel_hdmi_dsc_get_num_slices +ffffffff81a9d610 T intel_hdmi_dsc_get_bpp +ffffffff81a9d6f0 t intel_hdmi_compute_clock +ffffffff81a9d950 t hdmi_port_clock_valid +ffffffff81a9db70 t intel_write_infoframe +ffffffff81a9dd40 t intel_hdmi_detect +ffffffff81a9dee0 t intel_hdmi_force +ffffffff81a9df80 t intel_hdmi_connector_register +ffffffff81a9df90 t intel_hdmi_connector_unregister +ffffffff81a9dfa0 t intel_hdmi_set_edid +ffffffff81a9e230 t intel_hdmi_get_modes +ffffffff81a9e240 t intel_hdmi_mode_valid +ffffffff81a9e3f0 t intel_hdmi_connector_atomic_check +ffffffff81a9e420 t intel_hdmi_mode_clock_valid +ffffffff81a9e5c0 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a9e700 t intel_hdmi_hdcp_read_bksv +ffffffff81a9e7d0 t intel_hdmi_hdcp_read_bstatus +ffffffff81a9e8a0 t intel_hdmi_hdcp_repeater_present +ffffffff81a9e980 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a9ea50 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a9eb30 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a9ec00 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a9ecf0 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a9ef60 t intel_hdmi_hdcp_check_link +ffffffff81a9f280 t intel_hdmi_hdcp2_capable +ffffffff81a9f340 t intel_hdmi_hdcp2_write_msg +ffffffff81a9f430 t intel_hdmi_hdcp2_read_msg +ffffffff81a9f830 t intel_hdmi_hdcp2_check_link +ffffffff81aa0000 T intel_hpd_pin_default +ffffffff81aa0030 T intel_encoder_hotplug +ffffffff81aa0160 T intel_hpd_trigger_irq +ffffffff81aa01d0 T intel_hpd_irq_handler +ffffffff81aa05f0 T intel_hpd_init +ffffffff81aa0700 T intel_hpd_poll_enable +ffffffff81aa0780 T intel_hpd_poll_disable +ffffffff81aa07e0 T intel_hpd_init_early +ffffffff81aa08f0 t i915_hotplug_work_func +ffffffff81aa0cd0 t i915_digport_work_func +ffffffff81aa0e50 t i915_hpd_poll_init_work +ffffffff81aa0f50 t intel_hpd_irq_storm_reenable_work +ffffffff81aa1270 T intel_hpd_cancel_work +ffffffff81aa1390 T intel_hpd_disable +ffffffff81aa1420 T intel_hpd_enable +ffffffff81aa1490 T intel_hpd_debugfs_register +ffffffff81aa14c0 t __delayed_work_tick +ffffffff81aa2000 T i915_hotplug_interrupt_update_locked +ffffffff81aa20c0 T i915_hotplug_interrupt_update +ffffffff81aa2190 T i9xx_hpd_irq_ack +ffffffff81aa22d0 T i9xx_hpd_irq_handler +ffffffff81aa2480 T ibx_hpd_irq_handler +ffffffff81aa2620 T xelpdp_pica_irq_handler +ffffffff81aa28e0 T icp_irq_handler +ffffffff81aa2b70 T spt_irq_handler +ffffffff81aa2e10 T ilk_hpd_irq_handler +ffffffff81aa2f30 T bxt_hpd_irq_handler +ffffffff81aa3090 T gen11_hpd_irq_handler +ffffffff81aa3300 T intel_hpd_enable_detection +ffffffff81aa3340 T intel_hpd_irq_setup +ffffffff81aa3390 T intel_hotplug_irq_init +ffffffff81aa3610 t i915_hpd_irq_setup +ffffffff81aa3720 t i915_hpd_enable_detection +ffffffff81aa37c0 t icp_hpd_irq_setup +ffffffff81aa39b0 t icp_hpd_enable_detection +ffffffff81aa3ab0 t dg1_hpd_irq_setup +ffffffff81aa3b10 t dg1_hpd_enable_detection +ffffffff81aa3c50 t xelpdp_hpd_irq_setup +ffffffff81aa4050 t xelpdp_hpd_enable_detection +ffffffff81aa41f0 t gen11_hpd_irq_setup +ffffffff81aa4440 t gen11_hpd_enable_detection +ffffffff81aa4640 t bxt_hpd_irq_setup +ffffffff81aa47c0 t bxt_hpd_enable_detection +ffffffff81aa48a0 t spt_hpd_irq_setup +ffffffff81aa4ac0 t spt_hpd_enable_detection +ffffffff81aa4be0 t ilk_hpd_irq_setup +ffffffff81aa4e50 t ilk_hpd_enable_detection +ffffffff81aa5000 T intel_hti_init +ffffffff81aa5070 T intel_hti_uses_phy +ffffffff81aa5110 T intel_hti_dpll_mask +ffffffff81aa6000 T intel_load_detect_get_pipe +ffffffff81aa6370 t intel_modeset_disable_planes +ffffffff81aa6430 T intel_load_detect_release_pipe +ffffffff81aa7000 T intel_lpe_audio_irq_handler +ffffffff81aa7020 T intel_lpe_audio_init +ffffffff81aa7050 T intel_lpe_audio_teardown +ffffffff81aa7070 T intel_lpe_audio_notify +ffffffff81aa8000 T lspcon_detect_hdr_capability +ffffffff81aa80b0 T lspcon_write_infoframe +ffffffff81aa87f0 T lspcon_read_infoframe +ffffffff81aa8830 T lspcon_set_infoframes +ffffffff81aa8a90 T lspcon_infoframes_enabled +ffffffff81aa8c60 T lspcon_wait_pcon_mode +ffffffff81aa8c80 t lspcon_wait_mode +ffffffff81aa8f40 T lspcon_init +ffffffff81aa9340 T intel_lspcon_infoframes_enabled +ffffffff81aa9370 T lspcon_resume +ffffffff81aa9610 t lspcon_change_mode +ffffffff81aaa000 T intel_lvds_port_enabled +ffffffff81aaa080 T intel_get_lvds_encoder +ffffffff81aaa0e0 T intel_is_dual_link_lvds +ffffffff81aaa140 T intel_lvds_init +ffffffff81aaa7e0 t intel_enable_lvds +ffffffff81aaa920 t intel_pre_enable_lvds +ffffffff81aaac00 t intel_lvds_compute_config +ffffffff81aaad60 t pch_disable_lvds +ffffffff81aaad80 t pch_post_disable_lvds +ffffffff81aaada0 t gmch_disable_lvds +ffffffff81aaadd0 t intel_lvds_get_hw_state +ffffffff81aaae90 t intel_lvds_get_config +ffffffff81aaafa0 t intel_lvds_shutdown +ffffffff81aab040 t compute_is_dual_link_lvds +ffffffff81aab110 t intel_no_lvds_dmi_callback +ffffffff81aab160 t intel_disable_lvds +ffffffff81aab280 t intel_lvds_get_modes +ffffffff81aab2d0 t intel_lvds_mode_valid +ffffffff81aab370 t intel_dual_link_lvds_callback +ffffffff81aac000 T _intel_modeset_lock_begin +ffffffff81aac060 T _intel_modeset_lock_loop +ffffffff81aac0a0 T _intel_modeset_lock_end +ffffffff81aad000 T intel_modeset_setup_hw_state +ffffffff81aae2d0 t intel_crtc_disable_noatomic +ffffffff81aae8b0 t intel_crtc_disable_noatomic_begin +ffffffff81aaf000 T intel_modeset_verify_crtc +ffffffff81aaf540 t verify_connector_state +ffffffff81aaf9d0 T intel_modeset_verify_disabled +ffffffff81ab0000 T intel_opregion_notify_encoder +ffffffff81ab0180 t swsci +ffffffff81ab04b0 T intel_opregion_notify_adapter +ffffffff81ab0510 T intel_opregion_asle_intr +ffffffff81ab0560 T intel_opregion_setup +ffffffff81ab0d70 t asle_work +ffffffff81ab11e0 T intel_opregion_get_panel_type +ffffffff81ab12d0 T intel_opregion_get_edid +ffffffff81ab1390 T intel_opregion_headless_sku +ffffffff81ab13e0 T intel_opregion_register +ffffffff81ab1480 T intel_opregion_resume +ffffffff81ab1520 T intel_opregion_suspend +ffffffff81ab15d0 T intel_opregion_unregister +ffffffff81ab16a0 T intel_opregion_cleanup +ffffffff81ab1790 t intel_no_opregion_vbt_callback +ffffffff81ab17f0 t intel_use_opregion_panel_type_callback +ffffffff81ab2000 T intel_overlay_reset +ffffffff81ab2050 T intel_overlay_switch_off +ffffffff81ab2250 t intel_overlay_release_old_vid +ffffffff81ab23f0 T intel_overlay_put_image_ioctl +ffffffff81ab2700 t update_pfit_vscale_ratio +ffffffff81ab27d0 t check_overlay_dst +ffffffff81ab28a0 t check_overlay_src +ffffffff81ab2af0 t intel_overlay_do_put_image +ffffffff81ab3660 T intel_overlay_attrs_ioctl +ffffffff81ab3980 t check_gamma +ffffffff81ab3b70 T intel_overlay_setup +ffffffff81ab3de0 t intel_overlay_last_flip_retire +ffffffff81ab3e20 T intel_overlay_cleanup +ffffffff81ab3ee0 T intel_overlay_capture_error_state +ffffffff81ab3fd0 T intel_overlay_print_error_state +ffffffff81ab43a0 t intel_overlay_release_old_vid_tail +ffffffff81ab4470 t intel_overlay_off_tail +ffffffff81ab4620 t intel_overlay_flip_prepare +ffffffff81ab5000 T intel_panel_use_ssc +ffffffff81ab5060 T intel_panel_preferred_fixed_mode +ffffffff81ab50b0 T intel_panel_fixed_mode +ffffffff81ab5210 T intel_panel_downclock_mode +ffffffff81ab5300 T intel_panel_highest_mode +ffffffff81ab5360 T intel_panel_get_modes +ffffffff81ab53f0 T intel_panel_drrs_type +ffffffff81ab5420 T intel_panel_compute_config +ffffffff81ab5590 T intel_panel_add_edid_fixed_modes +ffffffff81ab5ac0 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81ab5b20 t intel_panel_add_fixed_mode +ffffffff81ab5ca0 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81ab5d10 T intel_panel_add_encoder_fixed_mode +ffffffff81ab5d50 T intel_panel_fitting +ffffffff81ab63b0 T intel_panel_detect +ffffffff81ab6440 T intel_panel_mode_valid +ffffffff81ab64d0 T intel_panel_init_alloc +ffffffff81ab6520 T intel_panel_init +ffffffff81ab6640 T intel_panel_fini +ffffffff81ab7000 T intel_has_pch_trancoder +ffffffff81ab7060 T intel_crtc_pch_transcoder +ffffffff81ab70a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81ab70f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81ab7140 T ilk_pch_pre_enable +ffffffff81ab7170 T ilk_pch_enable +ffffffff81ab7750 t ilk_pch_transcoder_set_timings +ffffffff81ab79b0 T ilk_pch_disable +ffffffff81ab79d0 T ilk_pch_post_disable +ffffffff81ab7da0 T ilk_pch_get_config +ffffffff81ab7f60 T lpt_pch_enable +ffffffff81ab81d0 T lpt_pch_disable +ffffffff81ab82e0 T lpt_pch_get_config +ffffffff81ab83b0 T intel_pch_sanitize +ffffffff81ab8690 t assert_pch_dp_disabled +ffffffff81ab8810 t assert_pch_hdmi_disabled +ffffffff81ab9000 T lpt_disable_iclkip +ffffffff81ab9070 T lpt_iclkip +ffffffff81ab9100 T lpt_program_iclkip +ffffffff81ab9390 T lpt_get_iclkip +ffffffff81ab94a0 T lpt_disable_clkout_dp +ffffffff81ab9580 T intel_init_pch_refclk +ffffffff81abb000 T intel_crtc_initial_plane_config +ffffffff81abc000 T intel_pmdemand_init +ffffffff81abc120 T intel_pmdemand_init_early +ffffffff81abc1a0 T intel_pmdemand_update_phys_mask +ffffffff81abc240 T intel_pmdemand_update_port_clock +ffffffff81abc280 T intel_pmdemand_atomic_check +ffffffff81abc620 t intel_pmdemand_update_max_ddiclk +ffffffff81abc6f0 t intel_pmdemand_update_active_non_tc_phys +ffffffff81abc8f0 T intel_pmdemand_init_pmdemand_params +ffffffff81abcac0 T intel_pmdemand_program_dbuf +ffffffff81abcc50 t intel_pmdemand_wait +ffffffff81abce40 T intel_pmdemand_pre_plane_update +ffffffff81abcf30 t intel_pmdemand_program_params +ffffffff81abd370 T intel_pmdemand_post_plane_update +ffffffff81abd450 t intel_pmdemand_duplicate_state +ffffffff81abd4e0 t intel_pmdemand_destroy_state +ffffffff81abe000 T intel_pps_lock +ffffffff81abe060 T intel_pps_unlock +ffffffff81abe0c0 T intel_pps_reset_all +ffffffff81abe210 T intel_pps_check_power_unlocked +ffffffff81abe4f0 t pps_name +ffffffff81abe590 T intel_pps_wait_power_cycle +ffffffff81abe630 t wait_panel_power_cycle +ffffffff81abe810 T intel_pps_vdd_on_unlocked +ffffffff81abed80 T intel_pps_vdd_on +ffffffff81abef10 T intel_pps_vdd_off_sync +ffffffff81abefe0 t intel_pps_vdd_off_sync_unlocked +ffffffff81abf400 T intel_pps_vdd_off_unlocked +ffffffff81abf5b0 T intel_pps_on_unlocked +ffffffff81abfa40 T intel_pps_on +ffffffff81abfae0 T intel_pps_off_unlocked +ffffffff81abfec0 T intel_pps_off +ffffffff81abff60 T intel_pps_backlight_on +ffffffff81ac0150 T intel_pps_backlight_off +ffffffff81ac0340 T intel_pps_backlight_power +ffffffff81ac0530 T vlv_pps_init +ffffffff81ac0710 t vlv_detach_power_sequencer +ffffffff81ac08e0 t vlv_steal_power_sequencer +ffffffff81ac0a10 t pps_init_delays +ffffffff81ac0eb0 t pps_init_registers +ffffffff81ac1240 T intel_pps_have_panel_power_or_vdd +ffffffff81ac1390 T intel_pps_encoder_reset +ffffffff81ac1530 t vlv_initial_power_sequencer_setup +ffffffff81ac1840 t pps_vdd_init +ffffffff81ac19f0 T intel_pps_init +ffffffff81ac1e60 t edp_panel_vdd_work +ffffffff81ac1f10 T intel_pps_init_late +ffffffff81ac2150 T intel_pps_unlock_regs_wa +ffffffff81ac2260 T intel_pps_setup +ffffffff81ac22d0 T assert_pps_unlocked +ffffffff81ac2560 t intel_pps_get_registers +ffffffff81ac2d70 t wait_panel_status +ffffffff81ac3180 t intel_pps_readout_hw_state +ffffffff81ac3330 t __delayed_work_tick +ffffffff81ac4000 T intel_psr_irq_handler +ffffffff81ac4640 t transcoder_name +ffffffff81ac4680 T intel_psr_init_dpcd +ffffffff81ac4920 T intel_psr_compute_config +ffffffff81ac4b00 t intel_psr2_config_valid +ffffffff81ac4f70 T intel_psr_get_config +ffffffff81ac5110 T intel_psr_disable +ffffffff81ac5220 t intel_psr_disable_locked +ffffffff81ac55a0 T intel_psr_pause +ffffffff81ac5790 t intel_psr_exit +ffffffff81ac5a40 T intel_psr_resume +ffffffff81ac5ad0 t intel_psr_activate +ffffffff81ac61e0 T intel_psr2_disable_plane_sel_fetch_arm +ffffffff81ac6250 T intel_psr2_program_plane_sel_fetch_arm +ffffffff81ac62f0 T intel_psr2_program_plane_sel_fetch_noarm +ffffffff81ac6460 T intel_psr2_program_trans_man_trk_ctl +ffffffff81ac6550 T intel_psr2_sel_fetch_update +ffffffff81ac6cc0 T intel_psr_pre_plane_update +ffffffff81ac6e90 t wm_optimization_wa +ffffffff81ac7020 T intel_psr_post_plane_update +ffffffff81ac7c20 T intel_psr_wait_for_idle_locked +ffffffff81ac7df0 T intel_psr_debug_set +ffffffff81ac8110 T intel_psr_invalidate +ffffffff81ac8350 T intel_psr_flush +ffffffff81ac8780 T intel_psr_init +ffffffff81ac88b0 t intel_psr_work +ffffffff81ac8a50 t tgl_dc3co_disable_work +ffffffff81ac8aa0 T intel_psr_short_pulse +ffffffff81ac8e60 T intel_psr_enabled +ffffffff81ac8ee0 T intel_psr_lock +ffffffff81ac8fa0 T intel_psr_unlock +ffffffff81ac9060 T intel_psr_debugfs_register +ffffffff81ac9090 T intel_psr_connector_debugfs_add +ffffffff81ac90c0 t _compute_psr2_sdp_prior_scanline_indication +ffffffff81ac9180 t _compute_psr2_wake_times +ffffffff81ac9270 t intel_psr2_sel_fetch_config_valid +ffffffff81ac9300 t psr2_granularity_check +ffffffff81ac93f0 t tgl_psr2_disable_dc3co +ffffffff81ac9500 t __delayed_work_tick +ffffffff81aca000 T intel_lookup_range_min_qp +ffffffff81aca110 T intel_lookup_range_max_qp +ffffffff81acb000 T intel_init_quirks +ffffffff81acb0f0 T intel_has_quirk +ffffffff81acb130 t quirk_ssc_force_disable +ffffffff81acb160 t quirk_invert_brightness +ffffffff81acb190 t quirk_backlight_present +ffffffff81acb1c0 t quirk_increase_t12_delay +ffffffff81acb1f0 t quirk_increase_ddi_disabled_time +ffffffff81acb220 t intel_dmi_reverse_brightness +ffffffff81acb270 t intel_dmi_no_pps_backlight +ffffffff81acc000 T intel_sdvo_port_enabled +ffffffff81acc0a0 T intel_sdvo_init +ffffffff81acd030 t intel_sdvo_compute_config +ffffffff81acd3f0 t pch_disable_sdvo +ffffffff81acd420 t pch_post_disable_sdvo +ffffffff81acd430 t intel_disable_sdvo +ffffffff81acd5a0 t intel_sdvo_pre_enable +ffffffff81acdf20 t intel_enable_sdvo +ffffffff81ace0f0 t intel_sdvo_get_hw_state +ffffffff81ace1e0 t intel_sdvo_get_config +ffffffff81ace600 t intel_sdvo_set_target_input +ffffffff81ace670 t intel_sdvo_get_input_pixel_clock_range +ffffffff81ace710 t intel_sdvo_ddc_proxy_xfer +ffffffff81ace7c0 t intel_sdvo_ddc_proxy_func +ffffffff81ace7f0 t __intel_sdvo_write_cmd +ffffffff81aceca0 t proxy_lock_bus +ffffffff81acecd0 t proxy_trylock_bus +ffffffff81aced00 t proxy_unlock_bus +ffffffff81aced30 t intel_sdvo_enc_destroy +ffffffff81aced40 t intel_sdvo_set_output_timings_from_mode +ffffffff81acee40 t intel_sdvo_get_preferred_input_mode +ffffffff81acf1d0 t intel_sdvo_get_dtd_from_mode +ffffffff81acf350 t intel_sdvo_read_response +ffffffff81acf7f0 t intel_sdvo_get_value +ffffffff81acf860 t intel_sdvo_write_sdvox +ffffffff81acfa50 t intel_sdvo_write_infoframe +ffffffff81acfc10 t intel_sdvo_read_infoframe +ffffffff81acfe30 t intel_sdvo_hotplug +ffffffff81acfe70 t intel_sdvo_connector_get_hw_state +ffffffff81acff00 t intel_sdvo_detect +ffffffff81ad01f0 t intel_sdvo_connector_register +ffffffff81ad0200 t intel_sdvo_connector_unregister +ffffffff81ad0210 t intel_sdvo_connector_duplicate_state +ffffffff81ad0290 t intel_sdvo_connector_atomic_set_property +ffffffff81ad0460 t intel_sdvo_connector_atomic_get_property +ffffffff81ad0680 t intel_sdvo_get_analog_edid +ffffffff81ad06b0 t intel_sdvo_connector_matches_edid +ffffffff81ad0740 t intel_sdvo_get_modes +ffffffff81ad09e0 t intel_sdvo_mode_valid +ffffffff81ad0af0 t intel_sdvo_atomic_check +ffffffff81ad0ba0 t intel_sdvo_create_enhance_property +ffffffff81ad2000 T intel_snps_phy_wait_for_calibration +ffffffff81ad20d0 T intel_snps_phy_update_psr_power_state +ffffffff81ad2190 T intel_snps_phy_set_signal_levels +ffffffff81ad23e0 T intel_mpllb_calc_state +ffffffff81ad2570 T intel_snps_phy_check_hdmi_link_rate +ffffffff81ad2610 T intel_mpllb_enable +ffffffff81ad2850 T intel_mpllb_disable +ffffffff81ad29c0 T intel_mpllb_calc_port_clock +ffffffff81ad2a90 T intel_mpllb_readout_hw_state +ffffffff81ad2c00 T intel_mpllb_state_verify +ffffffff81ad4000 T vlv_plane_min_cdclk +ffffffff81ad40f0 T ivb_plane_min_cdclk +ffffffff81ad41b0 T hsw_plane_min_cdclk +ffffffff81ad4250 T chv_plane_check_rotation +ffffffff81ad42c0 T intel_sprite_plane_create +ffffffff81ad4610 t vlv_sprite_update_noarm +ffffffff81ad4710 t vlv_sprite_update_arm +ffffffff81ad4db0 t vlv_sprite_disable_arm +ffffffff81ad4e40 t vlv_sprite_get_hw_state +ffffffff81ad4f10 t vlv_sprite_check +ffffffff81ad4fe0 t ivb_sprite_update_noarm +ffffffff81ad5140 t ivb_sprite_update_arm +ffffffff81ad5510 t ivb_sprite_disable_arm +ffffffff81ad55c0 t ivb_sprite_get_hw_state +ffffffff81ad5680 t g4x_sprite_check +ffffffff81ad5920 t hsw_sprite_max_stride +ffffffff81ad5970 t g4x_sprite_max_stride +ffffffff81ad59e0 t ivb_sprite_min_cdclk +ffffffff81ad5b20 t g4x_sprite_update_noarm +ffffffff81ad5c80 t g4x_sprite_update_arm +ffffffff81ad60c0 t g4x_sprite_disable_arm +ffffffff81ad6170 t g4x_sprite_get_hw_state +ffffffff81ad6230 t g4x_sprite_min_cdclk +ffffffff81ad6300 t vlv_sprite_ctl +ffffffff81ad64f0 t vlv_sprite_format_mod_supported +ffffffff81ad6620 t ivb_sprite_ctl +ffffffff81ad6850 t g4x_sprite_ctl +ffffffff81ad6a10 t snb_sprite_format_mod_supported +ffffffff81ad6b00 t g4x_sprite_format_mod_supported +ffffffff81ad7000 T intel_sprite_set_colorkey_ioctl +ffffffff81ad8000 T intel_tc_port_in_tbt_alt_mode +ffffffff81ad8070 T intel_tc_port_in_dp_alt_mode +ffffffff81ad80e0 T intel_tc_port_in_legacy_mode +ffffffff81ad8150 T intel_tc_cold_requires_aux_pw +ffffffff81ad81c0 T intel_tc_port_get_lane_mask +ffffffff81ad82f0 T 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g4x_get_vblank_counter +ffffffff81ae0270 T intel_crtc_get_vblank_timestamp +ffffffff81ae0290 t i915_get_crtc_scanoutpos +ffffffff81ae0690 T intel_get_crtc_scanline +ffffffff81ae0700 t __intel_get_crtc_scanline +ffffffff81ae0950 T intel_wait_for_pipe_scanline_stopped +ffffffff81ae0960 t wait_for_pipe_scanline_moving +ffffffff81ae0bc0 T intel_wait_for_pipe_scanline_moving +ffffffff81ae0be0 T intel_crtc_update_active_timings +ffffffff81ae1000 T intel_dsc_source_support +ffffffff81ae1050 T intel_dsc_compute_params +ffffffff81ae1650 T intel_dsc_power_domain +ffffffff81ae1700 T intel_dsc_get_num_vdsc_instances +ffffffff81ae1750 T intel_dsc_dsi_pps_write +ffffffff81ae19f0 T intel_dsc_dp_pps_write +ffffffff81ae1ae0 T intel_uncompressed_joiner_enable +ffffffff81ae1c00 T intel_dsc_enable +ffffffff81ae3600 T intel_dsc_disable +ffffffff81ae3780 T intel_dsc_get_config +ffffffff81ae4000 T intel_vga_disable +ffffffff81ae4120 T intel_vga_redisable_power_on +ffffffff81ae41c0 T intel_vga_redisable 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intel_wm_plane_visible +ffffffff81ae62e0 T intel_print_wm_latency +ffffffff81ae63f0 T intel_wm_init +ffffffff81ae6410 T intel_wm_debugfs_register +ffffffff81ae7000 T skl_update_scaler_crtc +ffffffff81ae70b0 t skl_update_scaler +ffffffff81ae73f0 T skl_update_scaler_plane +ffffffff81ae77f0 T intel_atomic_setup_scalers +ffffffff81ae7d50 T skl_pfit_enable +ffffffff81ae8240 T skl_program_plane_scaler +ffffffff81ae8930 T skl_detach_scalers +ffffffff81ae8a90 T skl_scaler_disable +ffffffff81ae8bc0 T skl_scaler_get_config +ffffffff81ae9000 T skl_format_to_fourcc +ffffffff81ae9180 T icl_is_nv12_y_plane +ffffffff81ae91f0 T icl_hdr_plane_mask +ffffffff81ae9220 T icl_is_hdr_plane +ffffffff81ae9260 T skl_calc_main_surface_offset +ffffffff81ae94a0 T skl_universal_plane_create +ffffffff81ae9ce0 t icl_plane_min_width +ffffffff81ae9e70 t icl_hdr_plane_max_width +ffffffff81ae9ec0 t icl_sdr_plane_max_width +ffffffff81ae9ef0 t icl_plane_max_height +ffffffff81ae9f20 t icl_plane_min_cdclk +ffffffff81ae9f60 t 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skl_check_main_ccs_coordinates +ffffffff81aed6e0 t gen12_plane_format_mod_supported +ffffffff81aed930 t skl_plane_format_mod_supported +ffffffff81aee000 T intel_enabled_dbuf_slices_mask +ffffffff81aee120 T intel_sagv_pre_plane_update +ffffffff81aee2b0 T intel_sagv_post_plane_update +ffffffff81aee520 T intel_can_enable_sagv +ffffffff81aee590 T skl_ddb_dbuf_slice_mask +ffffffff81aee640 T skl_write_plane_wm +ffffffff81aeeac0 T skl_write_cursor_wm +ffffffff81aeeea0 T skl_ddb_allocation_overlaps +ffffffff81aeef40 T intel_wm_state_verify +ffffffff81aef920 t skl_pipe_wm_get_hw_state +ffffffff81aefc70 T skl_watermark_ipc_enabled +ffffffff81aefca0 T skl_watermark_ipc_update +ffffffff81aefd50 T skl_watermark_ipc_init +ffffffff81aefe20 T skl_wm_init +ffffffff81af0650 T intel_atomic_get_dbuf_state +ffffffff81af0670 T intel_dbuf_init +ffffffff81af06e0 T intel_dbuf_pre_plane_update +ffffffff81af09b0 T intel_dbuf_post_plane_update +ffffffff81af0a80 T intel_mbus_dbox_update +ffffffff81af0cf0 T skl_watermark_debugfs_register +ffffffff81af0d20 t skl_sagv_disable +ffffffff81af0e40 t skl_compute_wm +ffffffff81af4130 t skl_wm_get_hw_state_and_sanitize +ffffffff81af4920 t skl_build_plane_wm_single +ffffffff81af4cb0 t skl_compute_wm_params +ffffffff81af5080 t skl_compute_plane_wm +ffffffff81af54b0 t skl_compute_dbuf_slices +ffffffff81af59b0 t skl_ddb_entry_for_slices +ffffffff81af5af0 t intel_dbuf_duplicate_state +ffffffff81af5b80 t intel_dbuf_destroy_state +ffffffff81af6000 T pixel_format_from_register_bits +ffffffff81af6060 T vlv_dsi_wait_for_fifo_empty +ffffffff81af6120 T vlv_dsi_init +ffffffff81af6930 t intel_dsi_compute_config +ffffffff81af6a80 t intel_dsi_pre_enable +ffffffff81af8530 t bxt_dsi_enable +ffffffff81af8550 t intel_dsi_disable +ffffffff81af8800 t intel_dsi_post_disable +ffffffff81af9480 t intel_dsi_get_hw_state +ffffffff81af9750 t intel_dsi_get_config +ffffffff81af9ef0 t intel_dsi_encoder_destroy +ffffffff81af9f20 t intel_dsi_prepare +ffffffff81afac00 t dpi_send_cmd +ffffffff81afad80 t intel_dsi_host_attach +ffffffff81afadb0 t intel_dsi_host_detach +ffffffff81afade0 t intel_dsi_host_transfer +ffffffff81afb240 t vlv_dsi_mode_valid +ffffffff81afc000 T vlv_dsi_pll_compute +ffffffff81afc3a0 t vlv_dsi_pclk +ffffffff81afc540 T vlv_dsi_pll_enable +ffffffff81afc770 T vlv_dsi_pll_disable +ffffffff81afc7f0 T bxt_dsi_pll_is_enabled +ffffffff81afc8c0 T bxt_dsi_pll_disable +ffffffff81afc9c0 T vlv_dsi_get_pclk +ffffffff81afca60 T bxt_dsi_get_pclk +ffffffff81afcb20 T vlv_dsi_reset_clocks +ffffffff81afcbb0 T bxt_dsi_pll_compute +ffffffff81afcd50 T bxt_dsi_pll_enable +ffffffff81afd0c0 T bxt_dsi_reset_clocks +ffffffff81afd1e0 T assert_dsi_pll_enabled +ffffffff81afd200 t assert_dsi_pll +ffffffff81afd310 T assert_dsi_pll_disabled +ffffffff81afe000 T i915_gem_busy_ioctl +ffffffff81aff000 T i915_gem_clflush_object +ffffffff81aff1f0 t clflush_work +ffffffff81aff250 t clflush_release +ffffffff81b00000 T i915_lut_handle_alloc +ffffffff81b00020 T i915_lut_handle_free +ffffffff81b00040 T i915_gem_context_release +ffffffff81b00070 T i915_gem_init__contexts +ffffffff81b000d0 T i915_gem_context_open +ffffffff81b00230 t i915_gem_create_context +ffffffff81b00a00 t proto_context_close +ffffffff81b00ab0 t gem_context_register +ffffffff81b00c50 T i915_gem_context_close +ffffffff81b00da0 t context_close +ffffffff81b01460 T i915_gem_vm_create_ioctl +ffffffff81b01570 t xa_alloc +ffffffff81b015f0 T i915_gem_vm_destroy_ioctl +ffffffff81b016a0 T i915_gem_user_to_context_sseu +ffffffff81b01900 T i915_gem_context_lookup +ffffffff81b01a30 T i915_gem_context_create_ioctl +ffffffff81b01c80 t proto_context_register +ffffffff81b01dd0 T i915_gem_context_destroy_ioctl +ffffffff81b01ef0 T i915_gem_context_getparam_ioctl +ffffffff81b02310 T i915_gem_context_setparam_ioctl +ffffffff81b027c0 t set_proto_ctx_param +ffffffff81b02ee0 T i915_gem_context_reset_stats_ioctl +ffffffff81b02fe0 T i915_gem_engines_iter_next +ffffffff81b03030 T i915_gem_context_module_exit +ffffffff81b03050 T i915_gem_context_module_init +ffffffff81b030b0 t i915_gem_context_release_work +ffffffff81b03180 t intel_context_set_gem +ffffffff81b032b0 t engines_notify +ffffffff81b03420 t intel_context_unpin +ffffffff81b034b0 t kill_engines +ffffffff81b03640 t create_setparam +ffffffff81b036b0 t invalid_ext +ffffffff81b036e0 t lookup_user_engine +ffffffff81b037a0 t set_proto_ctx_engines_balance +ffffffff81b03a80 t set_proto_ctx_engines_bond +ffffffff81b03e00 t set_proto_ctx_engines_parallel_submit +ffffffff81b05000 T __i915_gem_object_create_user +ffffffff81b05020 t __i915_gem_object_create_user_ext +ffffffff81b054b0 T i915_gem_dumb_create +ffffffff81b05620 T i915_gem_create_ioctl +ffffffff81b056f0 T i915_gem_create_ext_ioctl +ffffffff81b058f0 t ext_set_placements +ffffffff81b05d00 t ext_set_protected +ffffffff81b05d80 t ext_set_pat +ffffffff81b06000 T i915_gem_prime_export +ffffffff81b06090 T i915_gem_prime_import +ffffffff81b07000 T i915_gem_cpu_write_needs_clflush +ffffffff81b07070 T i915_gem_object_flush_if_display +ffffffff81b07280 t i915_gem_object_unlock +ffffffff81b07340 T i915_gem_object_flush_if_display_locked +ffffffff81b073c0 T i915_gem_object_set_to_wc_domain +ffffffff81b074c0 t flush_write_domain +ffffffff81b07610 T i915_gem_object_set_to_gtt_domain +ffffffff81b07760 T i915_gem_object_set_cache_level +ffffffff81b077f0 T i915_gem_get_caching_ioctl +ffffffff81b078d0 T i915_gem_set_caching_ioctl +ffffffff81b07b10 t i915_gem_object_lock_interruptible +ffffffff81b07c20 T i915_gem_object_pin_to_display_plane +ffffffff81b07e40 T i915_gem_object_set_to_cpu_domain +ffffffff81b07f30 T i915_gem_set_domain_ioctl +ffffffff81b08120 T i915_gem_object_prepare_read +ffffffff81b08270 T i915_gem_object_prepare_write +ffffffff81b09000 T i915_gem_execbuffer2_ioctl +ffffffff81b09ba0 t eb_select_context +ffffffff81b09c20 t eb_select_engine +ffffffff81b0a0a0 t eb_lookup_vmas +ffffffff81b0a7e0 t eb_release_vmas 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intel_gmch_remove +ffffffff81b28630 T intel_gmch_gtt_insert_sg_entries +ffffffff81b287d0 T intel_gmch_gtt_insert_page +ffffffff81b28900 T intel_gmch_gtt_clear_range +ffffffff81b29000 T gen2_emit_flush +ffffffff81b290f0 T gen4_emit_flush_rcs +ffffffff81b29240 T gen4_emit_flush_vcs +ffffffff81b29290 T gen3_emit_breadcrumb +ffffffff81b29450 T gen5_emit_breadcrumb +ffffffff81b29590 T i830_emit_bb_start +ffffffff81b296c0 T gen3_emit_bb_start +ffffffff81b29730 T gen4_emit_bb_start +ffffffff81b297a0 T gen2_irq_enable +ffffffff81b29810 T gen2_irq_disable +ffffffff81b29860 T gen3_irq_enable +ffffffff81b298d0 T gen3_irq_disable +ffffffff81b29910 T gen5_irq_enable +ffffffff81b29930 T gen5_irq_disable +ffffffff81b2a000 T gen6_emit_flush_rcs +ffffffff81b2a130 T gen6_emit_breadcrumb_rcs +ffffffff81b2a200 T gen6_emit_flush_xcs +ffffffff81b2a270 T gen6_emit_flush_vcs +ffffffff81b2a2e0 T gen6_emit_bb_start +ffffffff81b2a350 T hsw_emit_bb_start +ffffffff81b2a3c0 T gen7_emit_flush_rcs +ffffffff81b2a4a0 T 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gen12_emit_aux_table_inv +ffffffff81b2d3f0 T gen12_emit_flush_rcs +ffffffff81b2d6b0 t mtl_dummy_pipe_control +ffffffff81b2d800 T gen12_emit_flush_xcs +ffffffff81b2da00 T gen8_emit_init_breadcrumb +ffffffff81b2dac0 T xehp_emit_bb_start_noarb +ffffffff81b2db90 T xehp_emit_bb_start +ffffffff81b2dc60 T gen8_emit_bb_start_noarb +ffffffff81b2dce0 T gen8_emit_bb_start +ffffffff81b2ddb0 T gen8_emit_fini_breadcrumb_xcs +ffffffff81b2ded0 T gen8_emit_fini_breadcrumb_rcs +ffffffff81b2e020 T gen11_emit_fini_breadcrumb_rcs +ffffffff81b2e170 T gen12_emit_fini_breadcrumb_xcs +ffffffff81b2e330 T gen12_emit_fini_breadcrumb_rcs +ffffffff81b2f000 T gen8_ppgtt_create +ffffffff81b2f6c0 t gen12_pte_encode +ffffffff81b2f730 t gen8_pte_encode +ffffffff81b2f7a0 t gen8_ppgtt_insert +ffffffff81b304a0 t xehpsdv_ppgtt_insert_entry +ffffffff81b30640 t gen8_ppgtt_insert_entry +ffffffff81b30780 t gen8_ppgtt_alloc +ffffffff81b30820 t gen8_ppgtt_clear +ffffffff81b30890 t gen8_ppgtt_foreach +ffffffff81b30940 t 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intel_set_mocs_index +ffffffff81b62600 T intel_mocs_init +ffffffff81b63000 T alloc_pt +ffffffff81b630b0 T __alloc_pd +ffffffff81b63160 T alloc_pd +ffffffff81b63230 T free_px +ffffffff81b63290 T __set_pd_entry +ffffffff81b63300 T clear_pd_entry +ffffffff81b63380 T release_pd_entry +ffffffff81b63450 T i915_ppgtt_init_hw +ffffffff81b634c0 T i915_ppgtt_create +ffffffff81b634f0 T ppgtt_bind_vma +ffffffff81b63590 T ppgtt_unbind_vma +ffffffff81b63610 T i915_vm_alloc_pt_stash +ffffffff81b63800 T i915_vm_free_pt_stash +ffffffff81b638e0 T i915_vm_map_pt_stash +ffffffff81b63990 T ppgtt_init +ffffffff81b64000 T intel_check_bios_c6_setup +ffffffff81b64090 T intel_rc6_init +ffffffff81b64770 T intel_rc6_sanitize +ffffffff81b64870 T intel_rc6_enable +ffffffff81b64ec0 t gen9_rc6_enable +ffffffff81b65090 t gen8_rc6_enable +ffffffff81b65170 t gen6_rc6_enable +ffffffff81b65410 T intel_rc6_unpark +ffffffff81b65460 T intel_rc6_park +ffffffff81b65590 T intel_rc6_disable +ffffffff81b65670 T intel_rc6_fini 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intel_gt_reset_lock_interruptible +ffffffff81b698e0 T intel_gt_reset_unlock +ffffffff81b69910 T intel_gt_terminally_wedged +ffffffff81b69a60 T intel_gt_set_wedged_on_init +ffffffff81b69ae0 T intel_gt_set_wedged_on_fini +ffffffff81b69b60 T intel_gt_init_reset +ffffffff81b69bf0 T intel_gt_fini_reset +ffffffff81b69c20 T __intel_init_wedge +ffffffff81b69ca0 t intel_wedge_me +ffffffff81b69d70 T __intel_fini_wedge +ffffffff81b69de0 t gen8_reset_engines +ffffffff81b6a080 t gen6_reset_engines +ffffffff81b6a0f0 t ilk_do_reset +ffffffff81b6a1c0 t g4x_do_reset +ffffffff81b6a450 t g33_do_reset +ffffffff81b6a590 t i915_do_reset +ffffffff81b6a800 t __gen11_reset_engines +ffffffff81b6ac90 t __gen6_reset_engines +ffffffff81b6ade0 t nop_submit_request +ffffffff81b6ae50 t __delayed_work_tick +ffffffff81b6b000 T intel_ring_update_space +ffffffff81b6b040 T __intel_ring_pin +ffffffff81b6b070 T intel_ring_pin +ffffffff81b6b1c0 T intel_ring_reset +ffffffff81b6b200 T intel_ring_unpin +ffffffff81b6b2a0 T intel_engine_create_ring +ffffffff81b6b430 T intel_ring_free +ffffffff81b6b480 T intel_ring_begin +ffffffff81b6b600 t wait_for_space +ffffffff81b6b700 T intel_ring_cacheline_align +ffffffff81b6c000 T intel_ring_submission_setup +ffffffff81b6c6f0 t i915_gem_object_lock +ffffffff81b6c900 t ring_release +ffffffff81b6ca50 t xcs_resume +ffffffff81b6d030 t xcs_sanitize +ffffffff81b6d0a0 t reset_prepare +ffffffff81b6d1d0 t reset_rewind +ffffffff81b6d280 t reset_cancel +ffffffff81b6d310 t reset_finish +ffffffff81b6d340 t add_to_engine +ffffffff81b6d3c0 t remove_from_engine +ffffffff81b6d450 t ring_request_alloc +ffffffff81b6d7e0 t i9xx_set_default_submission +ffffffff81b6d820 t irq_handler +ffffffff81b6d840 t stop_ring +ffffffff81b6d940 t ring_context_alloc +ffffffff81b6da30 t ring_context_revoke +ffffffff81b6daf0 t ring_context_pre_pin +ffffffff81b6dbd0 t ring_context_pin +ffffffff81b6dc00 t ring_context_unpin +ffffffff81b6dc30 t ring_context_post_unpin +ffffffff81b6dc80 t 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gen5_rps_enable +ffffffff81b71510 T intel_rps_disable +ffffffff81b717b0 T intel_freq_opcode +ffffffff81b71870 T gen11_rps_irq_handler +ffffffff81b71900 T gen6_rps_irq_handler +ffffffff81b71a20 T gen5_rps_irq_handler +ffffffff81b71c50 T intel_rps_init_early +ffffffff81b71cf0 t rps_work +ffffffff81b72070 t rps_timer +ffffffff81b72290 T intel_rps_init +ffffffff81b72dd0 t gen5_rps_init +ffffffff81b72f30 T intel_rps_sanitize +ffffffff81b72f90 T intel_rps_read_rpstat +ffffffff81b72fd0 T intel_rps_read_actual_frequency +ffffffff81b73100 T intel_rps_read_actual_frequency_fw +ffffffff81b731e0 t __read_cagf +ffffffff81b73370 T intel_rps_read_punit_req_frequency +ffffffff81b73490 T intel_rps_get_requested_frequency +ffffffff81b73650 T intel_rps_get_max_frequency +ffffffff81b73730 T intel_rps_get_max_raw_freq +ffffffff81b737b0 T intel_rps_get_rp0_frequency +ffffffff81b73890 T intel_rps_get_rp1_frequency +ffffffff81b73970 T intel_rps_get_rpn_frequency +ffffffff81b73a50 T gen6_rps_frequency_dump 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intel_sseu_copy_eumask_to_user +ffffffff81b785c0 T intel_sseu_copy_ssmask_to_user +ffffffff81b78740 T intel_sseu_info_init +ffffffff81b796b0 t cherryview_sseu_info_init +ffffffff81b798d0 t hsw_sseu_info_init +ffffffff81b79ba0 T intel_sseu_make_rpcs +ffffffff81b79d70 T intel_sseu_dump +ffffffff81b79f70 T intel_sseu_print_topology +ffffffff81b7a230 T intel_sseu_print_ss_info +ffffffff81b7a290 T intel_slicemask_from_xehp_dssmask +ffffffff81b7a2e0 t gen11_compute_sseu_info +ffffffff81b7b000 T intel_sseu_status +ffffffff81b7b840 T intel_sseu_debugfs_register +ffffffff81b7c000 T intel_gt_init_timelines +ffffffff81b7c060 T __intel_timeline_create +ffffffff81b7c220 T intel_timeline_create_from_engine +ffffffff81b7c2e0 T __intel_timeline_pin +ffffffff81b7c310 T intel_timeline_pin +ffffffff81b7c440 T intel_timeline_reset_seqno +ffffffff81b7c470 T intel_timeline_enter +ffffffff81b7c550 T intel_timeline_exit +ffffffff81b7c620 T intel_timeline_get_seqno +ffffffff81b7c680 t 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intel_gsc_uc_fw_init_done +ffffffff81b88120 T intel_gsc_fw_get_binary_info +ffffffff81b88470 T intel_gsc_uc_fw_upload +ffffffff81b88800 t gsc_fw_query_compatibility_version +ffffffff81b89000 T intel_gsc_proxy_request_handler +ffffffff81b89820 T intel_gsc_proxy_irq_handler +ffffffff81b898c0 T intel_gsc_proxy_fini +ffffffff81b89930 T intel_gsc_proxy_init +ffffffff81b8a000 T intel_gsc_uc_init_early +ffffffff81b8a100 t gsc_work +ffffffff81b8a2c0 T intel_gsc_uc_init +ffffffff81b8a4d0 T intel_gsc_uc_fini +ffffffff81b8a5c0 T intel_gsc_uc_flush_work +ffffffff81b8a600 T intel_gsc_uc_resume +ffffffff81b8a6b0 T intel_gsc_uc_load_start +ffffffff81b8a740 T intel_gsc_uc_load_status +ffffffff81b8b000 T intel_gsc_uc_debugfs_register +ffffffff81b8c000 T intel_gsc_uc_heci_cmd_submit_packet +ffffffff81b8c1d0 T intel_gsc_uc_heci_cmd_emit_mtl_header +ffffffff81b8c230 T intel_gsc_uc_heci_cmd_submit_nonpriv +ffffffff81b8c5a0 t i915_gem_object_lock +ffffffff81b8d000 T intel_guc_notify +ffffffff81b8d040 T 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intel_guc_load_status +ffffffff81b8f0a0 T intel_guc_write_barrier +ffffffff81b90000 T intel_guc_ads_print_policy_info +ffffffff81b90020 T intel_guc_global_policies_update +ffffffff81b90070 T intel_guc_ads_create +ffffffff81b90560 T intel_guc_ads_init_late +ffffffff81b905b0 T intel_guc_ads_destroy +ffffffff81b90610 T intel_guc_ads_reset +ffffffff81b90680 T intel_guc_engine_usage_offset +ffffffff81b906c0 T intel_guc_engine_usage_record_map +ffffffff81b91000 T intel_guc_capture_getlistsize +ffffffff81b91020 t guc_capture_getlistsize +ffffffff81b91250 T intel_guc_capture_getlist +ffffffff81b92100 t guc_cap_list_num_regs +ffffffff81b92210 T intel_guc_capture_getnullheader +ffffffff81b922d0 T intel_guc_capture_print_engine_node +ffffffff81b927e0 T intel_guc_capture_free_node +ffffffff81b92860 T intel_guc_capture_is_matching_engine +ffffffff81b92910 T intel_guc_capture_get_matching_node +ffffffff81b92aa0 T intel_guc_capture_process +ffffffff81b93a80 T intel_guc_capture_destroy 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intel_guc_check_log_buf_overflow +ffffffff81b9b320 T intel_guc_get_log_buffer_size +ffffffff81b9b3b0 T intel_guc_get_log_buffer_offset +ffffffff81b9b4a0 T intel_guc_log_init_early +ffffffff81b9b510 t copy_debug_logs_work +ffffffff81b9b530 T intel_guc_log_create +ffffffff81b9b750 T intel_guc_log_destroy +ffffffff81b9b780 T intel_guc_log_set_level +ffffffff81b9b8c0 T intel_guc_log_relay_created +ffffffff81b9b8f0 T intel_guc_log_relay_open +ffffffff81b9b990 T intel_guc_log_relay_start +ffffffff81b9b9f0 T intel_guc_log_relay_flush +ffffffff81b9ba90 t guc_log_copy_debuglogs_for_relay +ffffffff81b9bbe0 T intel_guc_log_relay_close +ffffffff81b9bc70 T intel_guc_log_handle_flush_event +ffffffff81b9bcc0 T intel_guc_log_info +ffffffff81b9bdb0 T intel_guc_log_dump +ffffffff81b9c000 T intel_guc_log_debugfs_register +ffffffff81b9d000 T intel_guc_rc_init_early +ffffffff81b9d060 T intel_guc_rc_enable +ffffffff81b9d180 T intel_guc_rc_disable +ffffffff81b9e000 T intel_guc_slpc_init_early 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intel_guc_busyness_unpark +ffffffff81ba0390 t guc_update_pm_timestamp +ffffffff81ba0540 T intel_guc_submission_reset_prepare +ffffffff81ba0c50 t guc_flush_destroyed_contexts +ffffffff81ba0dc0 T intel_guc_submission_reset +ffffffff81ba0ed0 t __guc_reset_context +ffffffff81ba11d0 T intel_guc_submission_cancel_requests +ffffffff81ba1470 T intel_guc_submission_reset_finish +ffffffff81ba1550 T intel_guc_submission_init +ffffffff81ba16d0 T intel_guc_submission_fini +ffffffff81ba1770 T intel_guc_submission_setup +ffffffff81ba1bc0 t guc_sched_engine_disabled +ffffffff81ba1bf0 t guc_sched_engine_destroy +ffffffff81ba1c50 t guc_bump_inflight_request_prio +ffffffff81ba1d40 t guc_retire_inflight_request_prio +ffffffff81ba1dc0 t guc_submission_tasklet +ffffffff81ba2190 t guc_sanitize +ffffffff81ba2200 t guc_release +ffffffff81ba2230 T intel_guc_submission_enable +ffffffff81ba2710 T intel_guc_submission_disable +ffffffff81ba27b0 T intel_guc_sched_disable_gucid_threshold_max +ffffffff81ba27f0 T intel_guc_submission_init_early +ffffffff81ba2970 t destroyed_worker_func +ffffffff81ba2c50 t reset_fail_worker_func +ffffffff81ba2d40 t guc_timestamp_ping +ffffffff81ba2ed0 T intel_guc_deregister_done_process_msg +ffffffff81ba3240 t register_context +ffffffff81ba3c10 t __guc_context_destroy +ffffffff81ba3c90 T intel_guc_sched_done_process_msg +ffffffff81ba4050 T intel_guc_context_reset_process_msg +ffffffff81ba4400 T intel_guc_error_capture_process_msg +ffffffff81ba44c0 T intel_guc_lookup_engine +ffffffff81ba4510 T intel_guc_engine_failure_process_msg +ffffffff81ba46b0 T intel_guc_find_hung_context +ffffffff81ba4880 T intel_guc_dump_active_requests +ffffffff81ba4a10 T intel_guc_submission_print_info +ffffffff81ba4b80 T intel_guc_submission_print_context_info +ffffffff81ba4fb0 t emit_bb_start_parent_no_preempt_mid_batch +ffffffff81ba50f0 T intel_guc_virtual_engine_has_heartbeat +ffffffff81ba5180 t guc_virtual_get_sibling +ffffffff81ba5220 t update_context_prio +ffffffff81ba5410 t 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sw_fence_dummy_notify +ffffffff81baad90 t huc_delayed_load_timer_callback +ffffffff81bab000 T intel_huc_debugfs_register +ffffffff81bac000 T intel_huc_fw_auth_via_gsccs +ffffffff81bac420 T intel_huc_fw_get_binary_info +ffffffff81bac6e0 T intel_huc_fw_load_and_auth_via_gsc +ffffffff81bac780 T intel_huc_fw_upload +ffffffff81bad000 T intel_uc_init_early +ffffffff81bad170 T intel_uc_init_late +ffffffff81bad1a0 T intel_uc_driver_late_release +ffffffff81bad1d0 T intel_uc_init_mmio +ffffffff81bad1f0 T intel_uc_driver_remove +ffffffff81bad280 T intel_uc_reset_prepare +ffffffff81bad300 t __uc_sanitize +ffffffff81bad430 T intel_uc_reset +ffffffff81bad480 T intel_uc_reset_finish +ffffffff81bad4d0 T intel_uc_cancel_requests +ffffffff81bad520 T intel_uc_runtime_suspend +ffffffff81bad680 T intel_uc_suspend +ffffffff81bad740 T intel_uc_resume +ffffffff81bad7e0 T intel_uc_runtime_resume +ffffffff81bad8b0 t guc_enable_communication +ffffffff81bada00 t __uc_fini +ffffffff81bada40 t __uc_check_hw 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i915_active_noop +ffffffff81bb3650 T i915_active_get +ffffffff81bb3680 T i915_active_put +ffffffff81bb36f0 T i915_active_create +ffffffff81bb37e0 t auto_active +ffffffff81bb3810 t auto_retire +ffffffff81bb3880 T i915_active_module_exit +ffffffff81bb38a0 T i915_active_module_init +ffffffff81bb3900 t __active_retire +ffffffff81bb3af0 t barrier_wake +ffffffff81bb4000 T intel_engine_init_cmd_parser +ffffffff81bb46f0 t gen7_render_get_cmd_length_mask +ffffffff81bb4780 t gen7_bsd_get_cmd_length_mask +ffffffff81bb4820 t gen7_blt_get_cmd_length_mask +ffffffff81bb4890 t gen9_blt_get_cmd_length_mask +ffffffff81bb4900 T intel_engine_cleanup_cmd_parser +ffffffff81bb49d0 T intel_engine_cmd_parser +ffffffff81bb5580 T i915_cmd_parser_get_version +ffffffff81bb6000 T i915_fence_context_timeout +ffffffff81bb7000 T i915_deps_init +ffffffff81bb7060 T i915_deps_fini +ffffffff81bb70f0 T i915_deps_sync +ffffffff81bb71a0 T i915_deps_add_dependency +ffffffff81bb73f0 T i915_deps_add_resv +ffffffff81bb8000 T i915_print_iommu_status +ffffffff81bb8050 T i915_driver_probe +ffffffff81bb88d0 t i915_driver_register +ffffffff81bb89c0 T inteldrm_init_backlight +ffffffff81bb8a30 t i915_welcome_messages +ffffffff81bb8bb0 T i915_driver_remove +ffffffff81bb8c90 T i915_driver_shutdown +ffffffff81bb8e30 T i915_driver_resume_switcheroo +ffffffff81bb8e90 t i915_drm_resume_early +ffffffff81bb8f80 t i915_drm_resume +ffffffff81bb91c0 T intagpsubmatch +ffffffff81bb9210 T intagp_print +ffffffff81bb9260 T inteldrm_wsioctl +ffffffff81bb9440 T inteldrm_wsmmap +ffffffff81bb9470 T inteldrm_alloc_screen +ffffffff81bb94a0 T inteldrm_free_screen +ffffffff81bb94c0 T inteldrm_show_screen +ffffffff81bb9590 T inteldrm_load_font +ffffffff81bb95b0 T inteldrm_list_font +ffffffff81bb95d0 T inteldrm_scrollback +ffffffff81bb95f0 T inteldrm_getchar +ffffffff81bb9610 T inteldrm_burner +ffffffff81bb96a0 T inteldrm_enter_ddb +ffffffff81bb9700 T inteldrm_doswitch +ffffffff81bb9780 T inteldrm_burner_cb +ffffffff81bb97b0 T inteldrm_backlight_update_status +ffffffff81bb9810 T inteldrm_backlight_get_brightness +ffffffff81bb9860 T inteldrm_match +ffffffff81bb98f0 T inteldrm_attach +ffffffff81bb9cf0 T inteldrm_detach +ffffffff81bb9d20 T inteldrm_activate +ffffffff81bba030 T inteldrm_intr +ffffffff81bba070 T inteldrm_attachhook +ffffffff81bba2d0 T inteldrm_forcedetach +ffffffff81bba310 T inteldrm_native_backlight +ffffffff81bba440 T inteldrm_firmware_backlight +ffffffff81bba5c0 t i915_pcode_init +ffffffff81bba680 t i915_driver_open +ffffffff81bba6a0 t i915_driver_postclose +ffffffff81bba700 t i915_driver_lastclose +ffffffff81bba720 t i915_driver_release +ffffffff81bba830 t i915_gem_reject_pin_ioctl +ffffffff81bbb000 T i915_drm_client_alloc +ffffffff81bbb070 T __i915_drm_client_free +ffffffff81bbc000 T i915_gem_get_aperture_ioctl +ffffffff81bbc0d0 T i915_gem_object_unbind +ffffffff81bbc340 T i915_gem_pread_ioctl +ffffffff81bbc4d0 t i915_gem_shmem_pread +ffffffff81bbc8d0 t i915_gem_gtt_pread +ffffffff81bbcbf0 T i915_gem_pwrite_ioctl +ffffffff81bbcdc0 t i915_gem_gtt_pwrite_fast +ffffffff81bbd170 t i915_gem_shmem_pwrite +ffffffff81bbd600 T i915_gem_sw_finish_ioctl +ffffffff81bbd690 T i915_gem_runtime_suspend +ffffffff81bbd790 T i915_gem_object_ggtt_pin_ww +ffffffff81bbda30 T i915_gem_object_ggtt_pin +ffffffff81bbdb40 t i915_gem_object_lock +ffffffff81bbdd50 T i915_gem_madvise_ioctl +ffffffff81bbe150 T i915_gem_drain_freed_objects +ffffffff81bbe1c0 T i915_gem_drain_workqueue +ffffffff81bbe2a0 T i915_gem_init +ffffffff81bbe540 T i915_gem_driver_register +ffffffff81bbe550 T i915_gem_driver_unregister +ffffffff81bbe560 T i915_gem_driver_remove +ffffffff81bbe5c0 T i915_gem_driver_release +ffffffff81bbe6b0 T i915_gem_init_early +ffffffff81bbe730 T i915_gem_cleanup_early +ffffffff81bbe7b0 T i915_gem_open +ffffffff81bbe8c0 t i915_gem_gtt_prepare +ffffffff81bbf000 T i915_gem_evict_something +ffffffff81bbf440 t ungrab_vma +ffffffff81bbf570 t grab_vma +ffffffff81bbf690 T i915_gem_evict_for_node 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i915_oa_config_release +ffffffff81bce060 T i915_perf_get_oa_config +ffffffff81bce0c0 T i915_perf_oa_timestamp_frequency +ffffffff81bce170 T i915_oa_init_reg_state +ffffffff81bce260 T i915_perf_open_ioctl +ffffffff81bcea80 T i915_perf_register +ffffffff81bceab0 T i915_perf_unregister +ffffffff81bceb20 T i915_perf_add_config_ioctl +ffffffff81bceb70 T i915_perf_remove_config_ioctl +ffffffff81bcebe0 T i915_perf_init +ffffffff81bcf2c0 t gen7_is_valid_b_counter_addr +ffffffff81bcf310 t hsw_is_valid_mux_addr +ffffffff81bcf390 t hsw_enable_metric_set +ffffffff81bcf450 t hsw_disable_metric_set +ffffffff81bcf520 t gen7_oa_enable +ffffffff81bcf690 t gen7_oa_disable +ffffffff81bcf750 t gen7_oa_read +ffffffff81bcfbb0 t gen7_oa_hw_tail_read +ffffffff81bcfc00 t gen8_oa_read +ffffffff81bd0230 t gen8_is_valid_mux_addr +ffffffff81bd02b0 t gen8_is_valid_flex_addr +ffffffff81bd0330 t chv_is_valid_mux_addr +ffffffff81bd03b0 t gen8_oa_enable +ffffffff81bd04f0 t gen8_oa_disable +ffffffff81bd05b0 t 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i915_teardown_sysfs +ffffffff81be0000 T i915_ttm_buddy_man_init +ffffffff81be0210 T i915_ttm_buddy_man_fini +ffffffff81be0400 T i915_ttm_buddy_man_reserve +ffffffff81be04d0 T i915_ttm_buddy_man_visible_size +ffffffff81be0500 T i915_ttm_buddy_man_avail +ffffffff81be0560 t i915_ttm_buddy_man_alloc +ffffffff81be0880 t i915_ttm_buddy_man_free +ffffffff81be08f0 t i915_ttm_buddy_man_intersects +ffffffff81be09a0 t i915_ttm_buddy_man_compatible +ffffffff81be0a50 t i915_ttm_buddy_man_debug +ffffffff81be1000 T i915_user_extensions +ffffffff81be2000 T __i915_printk +ffffffff81be20e0 T add_taint_for_CI +ffffffff81be2110 T cancel_timer +ffffffff81be2160 T set_timer_ms +ffffffff81be2210 T i915_vtd_active +ffffffff81be3000 T intel_vgpu_detect +ffffffff81be3030 T intel_vgpu_register +ffffffff81be3090 T intel_vgpu_active +ffffffff81be30c0 T intel_vgpu_has_full_ppgtt +ffffffff81be3100 T intel_vgpu_has_hwsp_emulation +ffffffff81be3140 T intel_vgpu_has_huge_gtt +ffffffff81be3180 T intel_vgt_deballoon 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i915_vma_parked +ffffffff81be6680 T i915_vma_revoke_mmap +ffffffff81be6780 T _i915_vma_move_to_active +ffffffff81be69d0 T __i915_vma_evict +ffffffff81be6d50 T __i915_vma_unbind +ffffffff81be6df0 T i915_vma_unbind +ffffffff81be6f40 T i915_vma_unbind_async +ffffffff81be70b0 t __i915_vma_unbind_async +ffffffff81be7170 T i915_vma_unbind_unlocked +ffffffff81be7280 T i915_vma_make_unshrinkable +ffffffff81be72c0 T i915_vma_make_shrinkable +ffffffff81be72e0 T i915_vma_make_purgeable +ffffffff81be7300 T i915_vma_module_exit +ffffffff81be7320 T i915_vma_module_init +ffffffff81be7380 t __i915_vma_active +ffffffff81be73d0 t __i915_vma_retire +ffffffff81be7420 t __vma_bind +ffffffff81be74c0 t __vma_release +ffffffff81be7540 t intel_rotate_pages +ffffffff81be78a0 t intel_remap_pages +ffffffff81be7cf0 t intel_partial_pages +ffffffff81be8000 T i915_vma_resource_alloc +ffffffff81be8050 T i915_vma_resource_free +ffffffff81be8090 T i915_vma_resource_unhold +ffffffff81be80a0 t __i915_vma_resource_unhold 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icl_init_clock_gating +ffffffff81be9880 t cfl_init_clock_gating +ffffffff81be99a0 t gen9_init_clock_gating +ffffffff81be9ab0 t skl_init_clock_gating +ffffffff81be9bf0 t kbl_init_clock_gating +ffffffff81be9e00 t bxt_init_clock_gating +ffffffff81be9f60 t glk_init_clock_gating +ffffffff81be9fc0 t bdw_init_clock_gating +ffffffff81bea3f0 t chv_init_clock_gating +ffffffff81bea580 t hsw_init_clock_gating +ffffffff81bea840 t ivb_init_clock_gating +ffffffff81beaa50 t g4x_disable_trickle_feed +ffffffff81beaba0 t cpt_init_clock_gating +ffffffff81beaee0 t vlv_init_clock_gating +ffffffff81beaff0 t gen6_init_clock_gating +ffffffff81beb1f0 t ilk_init_clock_gating +ffffffff81beb3d0 t g4x_init_clock_gating +ffffffff81beb490 t i965gm_init_clock_gating +ffffffff81beb560 t i965g_init_clock_gating +ffffffff81beb5e0 t gen3_init_clock_gating +ffffffff81beb6e0 t i85x_init_clock_gating +ffffffff81beb780 t i830_init_clock_gating +ffffffff81bec000 T intel_platform_name +ffffffff81bec090 T intel_device_info_print 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intel_region_ttm_device_init +ffffffff81bf0070 T intel_region_ttm_device_fini +ffffffff81bf0090 T intel_region_to_ttm_type +ffffffff81bf00d0 T intel_region_ttm_init +ffffffff81bf0170 T intel_region_ttm_fini +ffffffff81bf03d0 T intel_region_ttm_resource_to_rsgt +ffffffff81bf0410 T intel_region_ttm_resource_free +ffffffff81bf1000 T intel_runtime_pm_get_raw +ffffffff81bf1090 T intel_runtime_pm_get +ffffffff81bf1140 T intel_runtime_pm_get_if_in_use +ffffffff81bf11f0 T intel_runtime_pm_get_if_active +ffffffff81bf12a0 T intel_runtime_pm_get_noresume +ffffffff81bf13d0 T intel_runtime_pm_put_raw +ffffffff81bf1460 T intel_runtime_pm_put_unchecked +ffffffff81bf1520 T intel_runtime_pm_enable +ffffffff81bf1550 T intel_runtime_pm_disable +ffffffff81bf1580 T intel_runtime_pm_driver_release +ffffffff81bf1610 T intel_runtime_pm_init_early +ffffffff81bf2000 T intel_sbi_read +ffffffff81bf2050 t intel_sbi_rw +ffffffff81bf2240 T intel_sbi_write +ffffffff81bf3000 T intel_step_init +ffffffff81bf34d0 T intel_step_name +ffffffff81bf3510 t pvc_step_lookup +ffffffff81bf4000 T gen3_stolen_base +ffffffff81bf4050 T gen11_stolen_base +ffffffff81bf40d0 T i830_stolen_size +ffffffff81bf4150 T gen3_stolen_size +ffffffff81bf41c0 T gen6_stolen_size +ffffffff81bf4210 T chv_stolen_size +ffffffff81bf4280 T gen8_stolen_size +ffffffff81bf42e0 T gen9_stolen_size +ffffffff81bf4360 T intel_init_stolen_res +ffffffff81bf5000 T intel_uncore_mmio_debug_init_early +ffffffff81bf5060 T intel_uncore_forcewake_domain_to_str +ffffffff81bf50d0 T intel_uncore_fw_release_timer +ffffffff81bf51f0 t fw_domains_put +ffffffff81bf5280 T intel_uncore_suspend +ffffffff81bf52d0 t intel_uncore_forcewake_reset +ffffffff81bf55a0 T intel_uncore_resume_early +ffffffff81bf56d0 T intel_uncore_unclaimed_mmio +ffffffff81bf5740 T intel_uncore_runtime_resume +ffffffff81bf5770 T intel_uncore_forcewake_get +ffffffff81bf58e0 T intel_uncore_forcewake_user_get +ffffffff81bf5a00 T intel_uncore_forcewake_get__locked +ffffffff81bf5ad0 T intel_uncore_forcewake_user_put +ffffffff81bf5c10 T intel_uncore_forcewake_put__locked +ffffffff81bf5d10 T intel_uncore_forcewake_put +ffffffff81bf5e30 T intel_uncore_forcewake_put_delayed +ffffffff81bf5f80 T intel_uncore_forcewake_flush +ffffffff81bf6030 T assert_forcewakes_inactive +ffffffff81bf60a0 T assert_forcewakes_active +ffffffff81bf60d0 T intel_uncore_setup_mmio +ffffffff81bf6100 t uncore_unmap_mmio +ffffffff81bf6130 T intel_uncore_init_early +ffffffff81bf61a0 T intel_uncore_init_mmio +ffffffff81bf75e0 T intel_uncore_prune_engine_fw_domains +ffffffff81bf77c0 t fw_domain_fini +ffffffff81bf78c0 T intel_uncore_fini_mmio +ffffffff81bf7ad0 T __intel_wait_for_register_fw +ffffffff81bf7d90 T __intel_wait_for_register +ffffffff81bf8130 T intel_uncore_forcewake_for_reg +ffffffff81bf8240 t check_for_unclaimed_mmio +ffffffff81bf83a0 T intel_uncore_arm_unclaimed_mmio_detection +ffffffff81bf84b0 t vgpu_write8 +ffffffff81bf84f0 t vgpu_write16 +ffffffff81bf8530 t vgpu_write32 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i915_pxp_tee_component_unbind +ffffffff81c00000 T intel_dram_detect +ffffffff81c00430 t gen11_get_dram_info +ffffffff81c00480 t bxt_get_dram_info +ffffffff81c00790 t skl_get_dram_info +ffffffff81c00970 T intel_dram_edram_detect +ffffffff81c00a00 t icl_pcode_read_mem_global_info +ffffffff81c00ae0 t skl_dram_get_channel_info +ffffffff81c00cb0 t skl_dram_get_dimm_info +ffffffff81c01000 T intel_gmch_bridge_setup +ffffffff81c010d0 t intel_gmch_bridge_release +ffffffff81c01100 T intel_gmch_bar_setup +ffffffff81c012f0 T intel_gmch_bar_teardown +ffffffff81c013e0 T intel_gmch_vga_set_state +ffffffff81c02000 T intel_detect_pch +ffffffff81c021b0 t intel_pch_match +ffffffff81c02200 t intel_pch_type +ffffffff81c029c0 t intel_virt_detect_pch +ffffffff81c03000 T vlv_iosf_sb_get +ffffffff81c03020 T vlv_iosf_sb_put +ffffffff81c03040 T vlv_punit_read +ffffffff81c03090 t vlv_sideband_rw +ffffffff81c03240 T vlv_punit_write +ffffffff81c03290 T vlv_bunit_read +ffffffff81c032e0 T vlv_bunit_write +ffffffff81c03330 T vlv_nc_read +ffffffff81c03380 T vlv_iosf_sb_read +ffffffff81c033d0 T vlv_iosf_sb_write +ffffffff81c03420 T vlv_cck_read +ffffffff81c03470 T vlv_cck_write +ffffffff81c034c0 T vlv_ccu_read +ffffffff81c03510 T vlv_ccu_write +ffffffff81c03560 T vlv_dpio_read +ffffffff81c03630 T vlv_dpio_write +ffffffff81c036a0 T vlv_flisdsi_read +ffffffff81c036f0 T vlv_flisdsi_write +ffffffff81c04000 T vlv_suspend_complete +ffffffff81c04a40 T vlv_resume_prepare +ffffffff81c054c0 T vlv_suspend_init +ffffffff81c05530 T vlv_suspend_cleanup +ffffffff81c05590 t vlv_wait_for_pw_status +ffffffff81c06000 T atom_execute_table_scratch_unlocked +ffffffff81c060a0 t atom_execute_table_locked +ffffffff81c063b0 T atom_execute_table +ffffffff81c06460 T atom_parse +ffffffff81c06610 T atom_destroy +ffffffff81c06650 T atom_asic_init +ffffffff81c06860 t get_u32 +ffffffff81c068c0 T atom_parse_data_header +ffffffff81c06960 T atom_parse_cmd_header +ffffffff81c069e0 T atom_allocate_fb_scratch +ffffffff81c06ab0 t atom_op_move +ffffffff81c06c80 t atom_op_and +ffffffff81c06e60 t atom_op_or +ffffffff81c07040 t atom_op_shift_left +ffffffff81c07220 t atom_op_shift_right +ffffffff81c07400 t atom_op_mul +ffffffff81c07550 t atom_op_div +ffffffff81c076c0 t atom_op_add +ffffffff81c078a0 t atom_op_sub +ffffffff81c07a80 t atom_op_setport +ffffffff81c07c00 t atom_op_setregblock +ffffffff81c07cc0 t atom_op_setfbbase +ffffffff81c07d80 t atom_op_compare +ffffffff81c07f60 t atom_op_switch +ffffffff81c08190 t atom_op_jump +ffffffff81c08400 t atom_op_test +ffffffff81c085c0 t atom_op_delay +ffffffff81c086a0 t atom_op_calltable +ffffffff81c087f0 t atom_op_repeat +ffffffff81c08820 t atom_op_clear +ffffffff81c08930 t atom_op_nop +ffffffff81c08960 t atom_op_eot +ffffffff81c08990 t atom_op_mask +ffffffff81c08c40 t atom_op_postcard +ffffffff81c08cf0 t atom_op_beep +ffffffff81c08d10 t atom_op_savereg +ffffffff81c08d40 t atom_op_restorereg +ffffffff81c08d70 t atom_op_setdatablock +ffffffff81c08eb0 t atom_op_xor +ffffffff81c09090 t atom_op_shl +ffffffff81c092b0 t atom_op_shr +ffffffff81c094d0 t atom_op_debug +ffffffff81c09500 t atom_put_dst +ffffffff81c09a10 t atom_get_src_int +ffffffff81c0a090 t atom_iio_execute +ffffffff81c0b000 T atombios_crtc_dpms +ffffffff81c0b300 T atombios_crtc_set_base +ffffffff81c0b350 t dce4_crtc_do_set_base +ffffffff81c0be90 t avivo_crtc_do_set_base +ffffffff81c0c730 T atombios_crtc_set_base_atomic +ffffffff81c0c780 T radeon_atom_disp_eng_pll_init +ffffffff81c0c860 t atombios_crtc_set_disp_eng_pll +ffffffff81c0c970 t atombios_crtc_program_ss +ffffffff81c0cc00 T atombios_crtc_mode_set +ffffffff81c0d690 T radeon_atombios_init_crtc +ffffffff81c0d780 t radeon_bo_reserve +ffffffff81c0d8f0 t radeon_bo_unreserve +ffffffff81c0d9d0 t atombios_disable_ss +ffffffff81c0dab0 t atombios_crtc_program_pll +ffffffff81c0dd60 t atombios_crtc_prepare +ffffffff81c0de20 t atombios_crtc_commit +ffffffff81c0dea0 t atombios_crtc_mode_fixup +ffffffff81c0ebb0 t atombios_crtc_disable +ffffffff81c0ee10 t radeon_get_shared_dp_ppll +ffffffff81c0ef00 t radeon_get_shared_nondp_ppll +ffffffff81c10000 T radeon_atom_copy_swap +ffffffff81c10020 T radeon_dp_aux_init +ffffffff81c10110 t radeon_dp_aux_transfer_atom +ffffffff81c102e0 T radeon_dp_getsinktype +ffffffff81c10350 T radeon_dp_getdpcd +ffffffff81c104c0 T radeon_dp_get_panel_mode +ffffffff81c105d0 T radeon_dp_set_link_config +ffffffff81c10650 t radeon_dp_get_dp_link_config +ffffffff81c107e0 T radeon_dp_mode_valid_helper +ffffffff81c10890 T radeon_dp_needs_link_train +ffffffff81c10900 T radeon_dp_set_rx_power_state +ffffffff81c10980 T radeon_dp_link_train +ffffffff81c11100 t radeon_process_aux_ch +ffffffff81c112b0 t dp_get_adjust_train +ffffffff81c12000 T atombios_get_backlight_level +ffffffff81c12070 T atombios_set_backlight_level +ffffffff81c12220 T atombios_dig_transmitter_setup +ffffffff81c12240 T radeon_atom_backlight_init +ffffffff81c12420 t radeon_atom_backlight_get_brightness +ffffffff81c12480 T atombios_dvo_setup +ffffffff81c12640 T atombios_digital_setup +ffffffff81c12900 T atombios_get_encoder_mode +ffffffff81c12b90 T atombios_dig_encoder_setup2 +ffffffff81c12fd0 T atombios_dig_encoder_setup +ffffffff81c12ff0 T atombios_dig_transmitter_setup2 +ffffffff81c139d0 T atombios_set_edp_panel_power +ffffffff81c13ae0 T radeon_atom_release_dig_encoder +ffffffff81c13b20 T radeon_atom_pick_dig_encoder +ffffffff81c13d40 T radeon_atom_encoder_init +ffffffff81c13e10 t atombios_external_encoder_setup +ffffffff81c14080 T radeon_atom_ext_encoder_setup_ddc +ffffffff81c140d0 T radeon_enc_destroy +ffffffff81c14180 T radeon_add_atom_encoder +ffffffff81c14590 t radeon_atombios_set_dig_info +ffffffff81c14600 t radeon_atombios_set_dac_info +ffffffff81c14670 t radeon_atom_backlight_update_status +ffffffff81c146d0 t radeon_atom_encoder_dpms +ffffffff81c14970 t radeon_atom_mode_fixup +ffffffff81c14ab0 t radeon_atom_encoder_prepare +ffffffff81c14f90 t radeon_atom_encoder_commit +ffffffff81c14fc0 t radeon_atom_encoder_mode_set +ffffffff81c15570 t radeon_atom_dig_detect +ffffffff81c15680 t radeon_atom_encoder_disable +ffffffff81c15910 t radeon_atom_encoder_dpms_avivo +ffffffff81c15b40 t radeon_atom_encoder_dpms_dig +ffffffff81c16080 t atombios_dac_setup +ffffffff81c16160 t radeon_atom_dac_detect +ffffffff81c16350 t radeon_atom_ext_dpms +ffffffff81c16380 t radeon_atom_ext_prepare +ffffffff81c163b0 t radeon_atom_ext_commit +ffffffff81c163e0 t radeon_atom_ext_mode_set +ffffffff81c16410 t radeon_atom_ext_disable +ffffffff81c17000 T radeon_atom_hw_i2c_xfer +ffffffff81c17140 t radeon_process_i2c_ch +ffffffff81c17310 T radeon_atom_hw_i2c_func +ffffffff81c18000 T btc_get_max_clock_from_voltage_dependency_table +ffffffff81c180d0 T btc_apply_voltage_dependency_rules +ffffffff81c18140 T btc_skip_blacklist_clocks +ffffffff81c18230 T btc_adjust_clock_combinations +ffffffff81c18360 T btc_apply_voltage_delta_rules +ffffffff81c18480 T btc_program_mgcg_hw_sequence +ffffffff81c18580 T btc_dpm_enabled +ffffffff81c18590 T btc_notify_uvd_to_smc +ffffffff81c18600 T btc_reset_to_default +ffffffff81c18650 T btc_read_arb_registers +ffffffff81c186e0 T btc_dpm_vblank_too_short +ffffffff81c18750 T btc_dpm_pre_set_power_state +ffffffff81c19970 T btc_dpm_set_power_state +ffffffff81c19ca0 t btc_set_power_state_conditionally_enable_ulv +ffffffff81c19dd0 T btc_dpm_post_set_power_state +ffffffff81c19ef0 t btc_update_current_ps +ffffffff81c19ff0 T btc_dpm_enable +ffffffff81c1aed0 t btc_cg_clock_gating_enable +ffffffff81c1b000 t btc_mg_clock_gating_enable +ffffffff81c1b120 t btc_ls_clock_gating_enable +ffffffff81c1b250 t btc_init_stutter_mode +ffffffff81c1b2d0 T btc_dpm_disable +ffffffff81c1b5b0 T btc_dpm_setup_asic +ffffffff81c1b690 T btc_dpm_init +ffffffff81c1ba80 T btc_dpm_fini +ffffffff81c1bb30 T btc_dpm_debugfs_print_current_performance_level +ffffffff81c1bb80 T btc_dpm_get_current_sclk +ffffffff81c1bc00 T btc_dpm_get_current_mclk +ffffffff81c1bc80 T btc_dpm_get_sclk +ffffffff81c1bcd0 T btc_dpm_get_mclk +ffffffff81c1c000 T ci_dpm_powergate_uvd +ffffffff81c1c380 T ci_dpm_vblank_too_short +ffffffff81c1c410 T ci_fan_ctrl_get_fan_speed_percent +ffffffff81c1c4b0 T ci_fan_ctrl_set_fan_speed_percent +ffffffff81c1c580 T ci_fan_ctrl_set_mode +ffffffff81c1c720 t ci_fan_ctrl_set_static_mode +ffffffff81c1c7e0 t ci_thermal_start_smc_fan_control +ffffffff81c1ca20 T ci_fan_ctrl_get_mode +ffffffff81c1ca80 T ci_dpm_force_performance_level +ffffffff81c1d310 t ci_upload_dpm_level_enable_mask +ffffffff81c1d640 T ci_dpm_pre_set_power_state +ffffffff81c1d930 T ci_dpm_post_set_power_state +ffffffff81c1da00 T ci_dpm_setup_asic +ffffffff81c1dc00 T ci_dpm_enable +ffffffff81c1f4d0 t ci_init_smc_table +ffffffff81c203c0 t ci_init_arb_table_index +ffffffff81c20450 t ci_populate_initial_mc_reg_table +ffffffff81c20690 t ci_populate_pm_base +ffffffff81c20a00 t ci_dpm_start_smc +ffffffff81c20a80 t ci_enable_vr_hot_gpio_interrupt +ffffffff81c20b20 t ci_notify_smc_display_change +ffffffff81c20bf0 t ci_enable_sclk_control +ffffffff81c20c20 t ci_enable_ulv +ffffffff81c20d70 t ci_enable_ds_master_switch +ffffffff81c20f60 t ci_start_dpm +ffffffff81c21150 t ci_enable_didt +ffffffff81c21400 t ci_enable_smc_cac +ffffffff81c21590 t ci_enable_power_containment +ffffffff81c21a10 t ci_power_control_set_level +ffffffff81c21b20 t ci_enable_auto_throttle_source +ffffffff81c21c00 t ci_enable_thermal_based_sclk_dpm +ffffffff81c21d50 t ci_thermal_start_thermal_controller +ffffffff81c22050 T ci_dpm_late_enable +ffffffff81c220f0 T ci_dpm_disable +ffffffff81c227e0 T ci_dpm_set_power_state +ffffffff81c23450 t ci_update_sclk_t +ffffffff81c234c0 t ci_update_and_upload_mc_reg_table +ffffffff81c23670 t ci_unfreeze_sclk_mclk_dpm +ffffffff81c23820 t ci_notify_link_speed_change_after_state_change +ffffffff81c23950 T ci_dpm_display_configuration_changed +ffffffff81c23ae0 T ci_dpm_fini +ffffffff81c23b90 T ci_dpm_init +ffffffff81c249f0 t ci_initialize_powertune_defaults +ffffffff81c24ae0 t ci_get_leakage_voltages +ffffffff81c24c90 t ci_patch_dependency_tables_with_leakage +ffffffff81c25300 t ci_set_private_data_variables_based_on_pptable +ffffffff81c25410 T ci_dpm_debugfs_print_current_performance_level +ffffffff81c25550 T ci_dpm_print_power_state +ffffffff81c25610 T ci_dpm_get_current_sclk +ffffffff81c256e0 T ci_dpm_get_current_mclk +ffffffff81c257b0 T ci_dpm_get_sclk +ffffffff81c25800 T ci_dpm_get_mclk +ffffffff81c25850 t ci_set_valid_flag +ffffffff81c258f0 t ci_populate_all_graphic_levels +ffffffff81c25e80 t ci_populate_all_memory_levels +ffffffff81c26780 t ci_populate_smc_vce_level +ffffffff81c268a0 t ci_populate_smc_acp_level +ffffffff81c269a0 t ci_populate_smc_samu_level +ffffffff81c26aa0 t ci_do_program_memory_timing_parameters +ffffffff81c26cc0 t ci_populate_smc_uvd_level +ffffffff81c26e10 t ci_populate_smc_initial_state +ffffffff81c26eb0 t ci_populate_bapm_parameters_in_dpm_table +ffffffff81c27040 t ci_populate_smc_voltage_table +ffffffff81c27160 t ci_min_max_v_gnbl_pm_lid_from_bapm_vddc +ffffffff81c273c0 t ci_enable_sclk_mclk_dpm +ffffffff81c27730 t ci_thermal_enable_alert +ffffffff81c278e0 t ci_enable_vce_dpm +ffffffff81c28000 T ci_copy_bytes_to_smc +ffffffff81c28240 T ci_start_smc +ffffffff81c28280 T ci_reset_smc +ffffffff81c282c0 T ci_program_jump_on_start +ffffffff81c282f0 T ci_stop_smc_clock +ffffffff81c28330 T ci_start_smc_clock +ffffffff81c28370 T ci_is_smc_running +ffffffff81c283e0 T ci_load_smc_ucode +ffffffff81c28570 T ci_read_smc_sram_dword +ffffffff81c28640 T ci_write_smc_sram_dword +ffffffff81c29000 T cik_get_allowed_info_register +ffffffff81c290a0 T cik_didt_rreg +ffffffff81c29140 T cik_didt_wreg +ffffffff81c291c0 T ci_get_temp +ffffffff81c29210 T kv_get_temp +ffffffff81c29260 T cik_pciep_rreg +ffffffff81c292e0 T cik_pciep_wreg +ffffffff81c29350 T cik_get_xclk +ffffffff81c293c0 T cik_mm_rdoorbell +ffffffff81c29420 T cik_mm_wdoorbell +ffffffff81c29470 T ci_mc_load_microcode +ffffffff81c297b0 T cik_ring_test +ffffffff81c29a50 T cik_fence_gfx_ring_emit +ffffffff81c29e40 T cik_fence_compute_ring_emit +ffffffff81c2a0c0 T cik_semaphore_ring_emit +ffffffff81c2a280 T cik_copy_cpdma +ffffffff81c2a6d0 T cik_ring_ib_execute +ffffffff81c2ac70 T cik_ib_test +ffffffff81c2af50 T cik_gfx_get_rptr +ffffffff81c2afb0 T cik_gfx_get_wptr +ffffffff81c2aff0 T cik_gfx_set_wptr +ffffffff81c2b030 T cik_compute_get_rptr +ffffffff81c2b110 T cik_compute_get_wptr +ffffffff81c2b1f0 T cik_compute_set_wptr +ffffffff81c2b270 T cik_gpu_check_soft_reset +ffffffff81c2b3e0 T cik_asic_reset +ffffffff81c2b7f0 t cik_gpu_pci_config_reset +ffffffff81c2c000 T cik_gfx_is_lockup +ffffffff81c2c070 T cik_pcie_gart_tlb_flush +ffffffff81c2c0c0 T cik_ib_parse +ffffffff81c2c0f0 T cik_vm_init +ffffffff81c2c150 T cik_vm_fini +ffffffff81c2c180 T cik_vm_flush +ffffffff81c2cdf0 T cik_enter_rlc_safe_mode +ffffffff81c2cee0 T cik_exit_rlc_safe_mode +ffffffff81c2cf20 T cik_update_cg +ffffffff81c2d420 t cik_enable_mgcg +ffffffff81c2d940 t cik_enable_cgcg +ffffffff81c2dcb0 T cik_init_cp_pg_table +ffffffff81c2df20 T cik_get_csb_size +ffffffff81c2dfb0 T cik_get_csb_buffer +ffffffff81c2e140 T cik_irq_set +ffffffff81c2eec0 t cik_disable_interrupt_state +ffffffff81c2f380 T cik_irq_process +ffffffff81c30b50 t cik_irq_ack +ffffffff81c314d0 T cik_resume +ffffffff81c31560 t cik_init_golden_registers +ffffffff81c31720 t cik_startup +ffffffff81c344f0 T cik_suspend +ffffffff81c348e0 T cik_init +ffffffff81c34e00 t cik_init_microcode +ffffffff81c35b50 t cik_uvd_init +ffffffff81c35c00 t cik_vce_init +ffffffff81c35cd0 t cik_cp_fini +ffffffff81c35d50 t cik_irq_fini +ffffffff81c35e60 t cik_mec_fini +ffffffff81c35f10 t cik_pcie_gart_fini +ffffffff81c36010 T cik_fini +ffffffff81c36330 T dce8_program_fmt +ffffffff81c36460 T dce8_bandwidth_update +ffffffff81c37070 T cik_get_gpu_clock_counter +ffffffff81c37130 T cik_set_uvd_clocks +ffffffff81c371b0 t cik_set_uvd_clock +ffffffff81c37320 T cik_set_vce_clocks +ffffffff81c37560 t cik_wait_for_rlc_serdes +ffffffff81c37720 t cik_mec_init +ffffffff81c37900 t cik_uvd_start +ffffffff81c379e0 t cik_vce_start +ffffffff81c37af0 t cik_irq_init +ffffffff81c38670 t cik_cp_resume +ffffffff81c39e10 t cik_uvd_resume +ffffffff81c39ee0 t cik_vce_resume +ffffffff81c39fd0 t pcie_capability_set_word +ffffffff81c3a0e0 t pcie_capability_read_word +ffffffff81c3a180 t pcie_capability_clear_and_set_word +ffffffff81c3a2a0 t pcie_capability_write_word +ffffffff81c3a360 t cik_get_cu_active_bitmap +ffffffff81c3a4e0 t radeon_bo_reserve +ffffffff81c3a650 t radeon_bo_unreserve +ffffffff81c3a730 t cik_update_gfx_pg +ffffffff81c3a8d0 t cik_compute_stop +ffffffff81c3aa40 t cik_cp_compute_fini +ffffffff81c3abe0 t request_firmware +ffffffff81c3ac70 t release_firmware +ffffffff81c3acb0 t dce8_latency_watermark +ffffffff81c3b000 T cik_sdma_get_rptr +ffffffff81c3b070 T cik_sdma_get_wptr +ffffffff81c3b0c0 T cik_sdma_set_wptr +ffffffff81c3b110 T cik_sdma_ring_ib_execute +ffffffff81c3b510 T cik_sdma_fence_ring_emit +ffffffff81c3b6e0 t cik_sdma_hdp_flush_ring_emit +ffffffff81c3b910 T cik_sdma_semaphore_ring_emit +ffffffff81c3ba30 T cik_sdma_enable +ffffffff81c3bc10 T cik_sdma_resume +ffffffff81c3c0f0 T cik_sdma_fini +ffffffff81c3c130 T cik_copy_dma +ffffffff81c3c530 T cik_sdma_ring_test +ffffffff81c3c7e0 T cik_sdma_ib_test +ffffffff81c3ca40 T cik_sdma_is_lockup +ffffffff81c3cac0 T cik_sdma_vm_copy_pages +ffffffff81c3cbd0 T cik_sdma_vm_write_pages +ffffffff81c3cd40 T cik_sdma_vm_set_pages +ffffffff81c3cec0 T cik_sdma_vm_pad_ib +ffffffff81c3cf10 T cik_dma_vm_flush +ffffffff81c3e000 T cypress_enable_spread_spectrum +ffffffff81c3e140 T cypress_start_dpm +ffffffff81c3e190 T cypress_enable_sclk_control +ffffffff81c3e1f0 T cypress_enable_mclk_control +ffffffff81c3e250 T cypress_notify_smc_display_change +ffffffff81c3e2a0 T cypress_program_response_times +ffffffff81c3e360 T cypress_advertise_gen2_capability +ffffffff81c3e430 T cypress_notify_link_speed_change_after_state_change +ffffffff81c3e4f0 T cypress_notify_link_speed_change_before_state_change +ffffffff81c3e5b0 T cypress_get_strobe_mode_settings +ffffffff81c3e6b0 T cypress_get_mclk_frequency_ratio +ffffffff81c3e760 T cypress_map_clkf_to_ibias +ffffffff81c3e820 T cypress_convert_power_level_to_smc +ffffffff81c3ebf0 t cypress_populate_mclk_value +ffffffff81c3f000 T cypress_upload_sw_state +ffffffff81c3f180 T cypress_upload_mc_reg_table +ffffffff81c3f240 t cypress_convert_mc_reg_table_to_smc +ffffffff81c3f4d0 T cypress_calculate_burst_time +ffffffff81c3f560 T cypress_program_memory_timing_parameters +ffffffff81c3f700 T cypress_populate_smc_initial_state +ffffffff81c3fab0 T cypress_populate_smc_acpi_state +ffffffff81c3fe30 T cypress_construct_voltage_tables +ffffffff81c3ffc0 T cypress_populate_smc_voltage_tables +ffffffff81c400f0 T cypress_get_mvdd_configuration +ffffffff81c401c0 T cypress_populate_mc_reg_table +ffffffff81c40410 T cypress_get_table_locations +ffffffff81c404f0 T cypress_enable_display_gap +ffffffff81c40550 T cypress_dpm_setup_asic +ffffffff81c40640 T cypress_dpm_enable +ffffffff81c41110 t cypress_force_mc_use_s1 +ffffffff81c41390 t cypress_gfx_clock_gating_enable +ffffffff81c416a0 t cypress_mg_clock_gating_enable +ffffffff81c41920 T cypress_dpm_disable +ffffffff81c41b50 T cypress_dpm_set_power_state +ffffffff81c41d90 T cypress_dpm_display_configuration_changed +ffffffff81c41e70 T cypress_dpm_init +ffffffff81c420e0 T cypress_dpm_fini +ffffffff81c42170 T cypress_dpm_vblank_too_short +ffffffff81c421e0 t cypress_wait_for_mc_sequencer +ffffffff81c43000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81c43070 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81c430e0 T dce3_2_afmt_write_sad_regs +ffffffff81c431e0 T dce3_2_audio_set_dto +ffffffff81c43320 T dce3_2_hdmi_update_acr +ffffffff81c43680 T dce3_2_set_audio_packet +ffffffff81c43810 T dce3_2_set_mute +ffffffff81c44000 T dce6_endpoint_rreg +ffffffff81c440e0 T dce6_endpoint_wreg +ffffffff81c441d0 T dce6_audio_get_pin +ffffffff81c44360 T dce6_afmt_select_pin +ffffffff81c443f0 T dce6_afmt_write_latency_fields +ffffffff81c444b0 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81c44580 T dce6_afmt_dp_write_speaker_allocation +ffffffff81c44650 T dce6_afmt_write_sad_regs +ffffffff81c44790 T dce6_audio_enable +ffffffff81c447e0 T dce6_hdmi_audio_set_dto +ffffffff81c44850 T dce6_dp_audio_set_dto +ffffffff81c45000 T eg_cg_rreg +ffffffff81c45080 T eg_cg_wreg +ffffffff81c450f0 T eg_pif_phy0_rreg +ffffffff81c45170 T eg_pif_phy0_wreg +ffffffff81c451d0 T eg_pif_phy1_rreg +ffffffff81c45250 T eg_pif_phy1_wreg +ffffffff81c452b0 T evergreen_get_allowed_info_register +ffffffff81c45340 T evergreen_tiling_fields +ffffffff81c453e0 T sumo_set_uvd_clocks +ffffffff81c454c0 t sumo_set_uvd_clock +ffffffff81c456b0 T evergreen_set_uvd_clocks +ffffffff81c45c30 T evergreen_fix_pci_max_read_req_size +ffffffff81c45df0 T dce4_program_fmt +ffffffff81c45f10 T dce4_wait_for_vblank +ffffffff81c46190 T evergreen_page_flip +ffffffff81c46320 T evergreen_page_flip_pending +ffffffff81c46390 T evergreen_get_temp +ffffffff81c46460 T sumo_get_temp +ffffffff81c464b0 T sumo_pm_init_profile +ffffffff81c465f0 T btc_pm_init_profile +ffffffff81c46700 T evergreen_pm_misc +ffffffff81c468a0 T evergreen_pm_prepare +ffffffff81c469a0 T evergreen_pm_finish +ffffffff81c46aa0 T evergreen_hpd_sense +ffffffff81c46b10 T evergreen_hpd_set_polarity +ffffffff81c46c50 T evergreen_hpd_init +ffffffff81c46d20 T evergreen_hpd_fini +ffffffff81c46dc0 T evergreen_get_number_of_dram_channels +ffffffff81c46e10 T evergreen_bandwidth_update +ffffffff81c46fd0 t evergreen_line_buffer_adjust +ffffffff81c471c0 t evergreen_program_watermarks +ffffffff81c47c20 T evergreen_mc_wait_for_idle +ffffffff81c47cc0 T evergreen_pcie_gart_tlb_flush +ffffffff81c47d90 T evergreen_mc_stop +ffffffff81c48890 T evergreen_mc_resume +ffffffff81c48fa0 T evergreen_mc_program +ffffffff81c493a0 T evergreen_ring_ib_execute +ffffffff81c49830 T evergreen_mc_init +ffffffff81c49970 T evergreen_print_gpu_status_regs +ffffffff81c499a0 T evergreen_is_display_hung +ffffffff81c49ba0 T evergreen_gpu_check_soft_reset +ffffffff81c49d00 T evergreen_gpu_pci_config_reset +ffffffff81c49e80 T evergreen_asic_reset +ffffffff81c4a1a0 T evergreen_gfx_is_lockup +ffffffff81c4a210 T sumo_rlc_fini +ffffffff81c4a3c0 t radeon_bo_reserve +ffffffff81c4a530 t radeon_bo_unreserve +ffffffff81c4a610 T sumo_rlc_init +ffffffff81c4ade0 T evergreen_rlc_resume +ffffffff81c4b150 T evergreen_get_vblank_counter +ffffffff81c4b1c0 T evergreen_disable_interrupt_state +ffffffff81c4b490 T evergreen_irq_set +ffffffff81c4ba50 T evergreen_irq_suspend +ffffffff81c4baa0 T evergreen_irq_process +ffffffff81c4c5f0 t evergreen_irq_ack +ffffffff81c4ccb0 T evergreen_resume +ffffffff81c4cd90 t evergreen_init_golden_registers +ffffffff81c4cfa0 t evergreen_startup +ffffffff81c4e830 T evergreen_suspend +ffffffff81c4e9d0 T evergreen_init +ffffffff81c4edd0 t evergreen_pcie_gart_fini +ffffffff81c4eef0 T evergreen_fini +ffffffff81c4f0e0 T evergreen_pcie_gen2_enable +ffffffff81c4f310 T evergreen_program_aspm +ffffffff81c4f9a0 t evergreen_latency_watermark +ffffffff81c4fba0 t evergreen_uvd_start +ffffffff81c4fc50 t evergreen_cp_load_microcode +ffffffff81c4fdb0 t evergreen_cp_resume +ffffffff81c50a20 t evergreen_uvd_resume +ffffffff81c51000 T evergreen_cs_parse +ffffffff81c53760 T evergreen_dma_cs_parse +ffffffff81c548d0 T evergreen_ib_parse +ffffffff81c54d30 T evergreen_dma_ib_parse +ffffffff81c54f00 t evergreen_cs_track_check +ffffffff81c55f70 t evergreen_cs_handle_reg +ffffffff81c57dd0 t evergreen_surface_value_conv_check +ffffffff81c580a0 t evergreen_surface_check +ffffffff81c58510 t evergreen_cs_track_validate_htile +ffffffff81c587b0 t evergreen_vm_reg_valid +ffffffff81c59000 T evergreen_dma_fence_ring_emit +ffffffff81c592b0 T evergreen_dma_ring_ib_execute +ffffffff81c59600 T evergreen_copy_dma +ffffffff81c599a0 T evergreen_dma_is_lockup +ffffffff81c5a000 T dce4_audio_enable +ffffffff81c5a080 T evergreen_hdmi_update_acr +ffffffff81c5a2a0 T dce4_afmt_write_latency_fields +ffffffff81c5a310 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c5a380 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c5a3f0 T evergreen_hdmi_write_sad_regs +ffffffff81c5a4f0 T evergreen_set_avi_packet +ffffffff81c5a690 T dce4_hdmi_audio_set_dto +ffffffff81c5a770 T dce4_dp_audio_set_dto +ffffffff81c5a860 T dce4_set_vbi_packet +ffffffff81c5a8d0 T dce4_hdmi_set_color_depth +ffffffff81c5aa20 T dce4_set_audio_packet +ffffffff81c5ac30 T dce4_set_mute +ffffffff81c5ad40 T evergreen_hdmi_enable +ffffffff81c5b070 T evergreen_dp_enable +ffffffff81c5c000 T kv_dpm_enable_bapm +ffffffff81c5c070 T kv_dpm_enable +ffffffff81c5cf70 t kv_populate_vce_table +ffffffff81c5d1f0 t kv_populate_samu_table +ffffffff81c5d450 t kv_populate_acp_table +ffffffff81c5d5e0 t kv_start_am +ffffffff81c5d620 t kv_enable_auto_thermal_throttling +ffffffff81c5d660 t kv_enable_dpm_voltage_scaling +ffffffff81c5d6a0 t kv_set_dpm_interval +ffffffff81c5d6e0 t kv_start_dpm +ffffffff81c5d720 t kv_enable_didt +ffffffff81c5d9d0 T kv_dpm_late_enable +ffffffff81c5dbd0 T kv_dpm_powergate_uvd +ffffffff81c5dd50 T kv_dpm_disable +ffffffff81c5e0c0 T kv_dpm_force_performance_level +ffffffff81c5e240 t kv_force_dpm_lowest +ffffffff81c5e310 T kv_dpm_pre_set_power_state +ffffffff81c5e890 T kv_dpm_set_power_state +ffffffff81c5f060 t kv_set_valid_clock_range +ffffffff81c5f200 t kv_calculate_ds_divider +ffffffff81c5f370 t kv_calculate_nbps_level_settings +ffffffff81c5f4f0 t kv_update_vce_dpm +ffffffff81c5f6d0 T kv_dpm_post_set_power_state +ffffffff81c5f770 T kv_dpm_setup_asic +ffffffff81c5f7d0 T kv_dpm_init +ffffffff81c60080 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c600f0 T kv_dpm_get_current_sclk +ffffffff81c60160 T kv_dpm_get_current_mclk +ffffffff81c60190 T kv_dpm_print_power_state +ffffffff81c60230 T kv_dpm_fini +ffffffff81c602d0 T kv_dpm_display_configuration_changed +ffffffff81c60300 T kv_dpm_get_sclk +ffffffff81c60350 T kv_dpm_get_mclk +ffffffff81c61000 T kv_notify_message_to_smu +ffffffff81c610c0 T kv_dpm_get_enable_mask +ffffffff81c61190 T kv_send_msg_to_smc_with_parameter +ffffffff81c61260 T kv_read_smc_sram_dword +ffffffff81c612f0 T kv_smc_dpm_enable +ffffffff81c61420 T kv_smc_bapm_enable +ffffffff81c61550 T kv_copy_bytes_to_smc +ffffffff81c62000 T tn_smc_rreg +ffffffff81c62080 T tn_smc_wreg +ffffffff81c620f0 T ni_mc_load_microcode +ffffffff81c622e0 T ni_init_microcode +ffffffff81c627b0 t request_firmware +ffffffff81c62840 t release_firmware +ffffffff81c62880 T cayman_get_allowed_info_register +ffffffff81c62910 T tn_get_temp +ffffffff81c629a0 T cayman_pcie_gart_tlb_flush +ffffffff81c629f0 T cayman_cp_int_cntl_setup +ffffffff81c62a40 T cayman_fence_ring_emit +ffffffff81c62dd0 T cayman_ring_ib_execute +ffffffff81c63230 T cayman_gfx_get_rptr +ffffffff81c632c0 T cayman_gfx_get_wptr +ffffffff81c63330 T cayman_gfx_set_wptr +ffffffff81c633b0 T cayman_gpu_check_soft_reset +ffffffff81c63540 T cayman_asic_reset +ffffffff81c63840 T cayman_gfx_is_lockup +ffffffff81c638b0 T cayman_resume +ffffffff81c63940 t ni_init_golden_registers +ffffffff81c63a20 t cayman_startup +ffffffff81c64e60 T cayman_suspend +ffffffff81c65050 T cayman_init +ffffffff81c653c0 t cayman_uvd_init +ffffffff81c65470 t cayman_vce_init +ffffffff81c65540 t cayman_cp_fini +ffffffff81c655c0 t cayman_pcie_gart_fini +ffffffff81c65700 T cayman_fini +ffffffff81c65980 T cayman_vm_init +ffffffff81c659e0 T cayman_vm_fini +ffffffff81c65a10 T cayman_vm_decode_fault +ffffffff81c65aa0 T cayman_vm_flush +ffffffff81c65f00 T tn_set_vce_clocks +ffffffff81c66160 t cayman_uvd_start +ffffffff81c66210 t cayman_vce_start +ffffffff81c66320 t cayman_cp_load_microcode +ffffffff81c664b0 t cayman_cp_resume +ffffffff81c67370 t cayman_uvd_resume +ffffffff81c67440 t cayman_vce_resume +ffffffff81c68000 T cayman_dma_get_rptr +ffffffff81c68070 T cayman_dma_get_wptr +ffffffff81c680c0 T cayman_dma_set_wptr +ffffffff81c68110 T cayman_dma_ring_ib_execute +ffffffff81c684a0 T cayman_dma_stop +ffffffff81c68550 T cayman_dma_resume +ffffffff81c687b0 T cayman_dma_fini +ffffffff81c68870 T cayman_dma_is_lockup +ffffffff81c688f0 T cayman_dma_vm_copy_pages +ffffffff81c689f0 T cayman_dma_vm_write_pages +ffffffff81c68b50 T cayman_dma_vm_set_pages +ffffffff81c68cc0 T cayman_dma_vm_pad_ib +ffffffff81c68d10 T cayman_dma_vm_flush +ffffffff81c6a000 T ni_get_pi +ffffffff81c6a030 T ni_get_ps +ffffffff81c6a060 T ni_dpm_vblank_too_short +ffffffff81c6a0d0 T ni_dpm_force_performance_level +ffffffff81c6a220 T ni_copy_and_switch_arb_sets +ffffffff81c6a4f0 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c6a570 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c6a5f0 T ni_dpm_setup_asic +ffffffff81c6a800 T ni_update_current_ps +ffffffff81c6a8c0 T ni_update_requested_ps +ffffffff81c6a980 T ni_dpm_enable +ffffffff81c6b7e0 t ni_init_smc_table +ffffffff81c6c190 t ni_init_smc_spll_table +ffffffff81c6c300 t ni_init_arb_table_index +ffffffff81c6c3a0 t ni_populate_mc_reg_table +ffffffff81c6c6e0 t ni_initialize_smc_cac_tables +ffffffff81c6d960 t ni_initialize_hardware_cac_manager +ffffffff81c6de90 t ni_populate_smc_tdp_limits +ffffffff81c6e040 t ni_program_response_times +ffffffff81c6e150 T ni_dpm_disable +ffffffff81c6e510 t ni_enable_power_containment +ffffffff81c6e5d0 t ni_enable_smc_cac +ffffffff81c6e6f0 T ni_dpm_pre_set_power_state +ffffffff81c6ecd0 T ni_dpm_set_power_state +ffffffff81c6efc0 t ni_upload_sw_state +ffffffff81c6fbb0 t ni_upload_mc_reg_table +ffffffff81c6fd60 t ni_power_control_set_level +ffffffff81c6fe30 T ni_dpm_post_set_power_state +ffffffff81c6ff00 T ni_dpm_init +ffffffff81c708a0 T ni_dpm_fini +ffffffff81c70950 T ni_dpm_print_power_state +ffffffff81c70a20 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c70a60 T ni_dpm_get_current_sclk +ffffffff81c70ad0 T ni_dpm_get_current_mclk +ffffffff81c70b40 T ni_dpm_get_sclk +ffffffff81c70ba0 T ni_dpm_get_mclk +ffffffff81c70c00 t ni_do_program_memory_timing_parameters +ffffffff81c70d40 t ni_calculate_sclk_params +ffffffff81c70f70 t ni_calculate_power_boost_limit +ffffffff81c71130 t ni_populate_mclk_value +ffffffff81c72000 T r100_wait_for_vblank +ffffffff81c72190 T r100_page_flip +ffffffff81c72450 T r100_page_flip_pending +ffffffff81c72500 T r100_pm_get_dynpm_state +ffffffff81c72720 T r100_pm_init_profile +ffffffff81c72800 T r100_pm_misc +ffffffff81c72c40 T r100_pm_prepare +ffffffff81c72cf0 T r100_pm_finish +ffffffff81c72da0 T r100_gui_idle +ffffffff81c72de0 T r100_hpd_sense +ffffffff81c72e40 T r100_hpd_set_polarity +ffffffff81c72f00 T r100_hpd_init +ffffffff81c72fa0 T r100_hpd_fini +ffffffff81c73010 T r100_pci_gart_tlb_flush +ffffffff81c73040 T r100_pci_gart_init +ffffffff81c73110 T r100_pci_gart_get_page_entry +ffffffff81c73140 T r100_pci_gart_set_page +ffffffff81c73180 T r100_pci_gart_enable +ffffffff81c73270 T r100_pci_gart_disable +ffffffff81c732f0 T r100_pci_gart_fini +ffffffff81c73370 T r100_irq_set +ffffffff81c73450 T r100_irq_disable +ffffffff81c734c0 T r100_irq_process +ffffffff81c737c0 T r100_get_vblank_counter +ffffffff81c73810 T r100_fence_ring_emit +ffffffff81c73c70 T r100_semaphore_ring_emit +ffffffff81c73ca0 T r100_copy_blit +ffffffff81c74330 T r100_ring_start +ffffffff81c74420 T r100_gfx_get_rptr +ffffffff81c74480 T r100_gfx_get_wptr +ffffffff81c744c0 T r100_gfx_set_wptr +ffffffff81c74500 T r100_cp_init +ffffffff81c74a30 T r100_debugfs_cp_init +ffffffff81c74a60 T r100_cp_fini +ffffffff81c74b00 T r100_cp_disable +ffffffff81c74c40 T r100_gui_wait_for_idle +ffffffff81c74d30 T r100_reloc_pitch_offset +ffffffff81c74e70 T r100_packet3_load_vbpntr +ffffffff81c75110 T r100_cs_parse_packet0 +ffffffff81c75220 T r100_cs_packet_parse_vline +ffffffff81c75430 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c754b0 T r100_cs_parse +ffffffff81c766a0 T r100_cs_track_clear +ffffffff81c76a30 T r100_cs_track_check +ffffffff81c77240 T r100_mc_wait_for_idle +ffffffff81c772e0 T r100_gpu_is_lockup +ffffffff81c77340 T r100_enable_bm +ffffffff81c77390 T r100_bm_disable +ffffffff81c77440 T r100_asic_reset +ffffffff81c77770 T r100_mc_stop +ffffffff81c77930 T r100_mc_resume +ffffffff81c779f0 T r100_set_common_regs +ffffffff81c77b90 T r100_vram_init_sizes +ffffffff81c77d80 T r100_vga_set_state +ffffffff81c77de0 T r100_pll_errata_after_index +ffffffff81c77e20 T r100_pll_rreg +ffffffff81c77f50 T r100_pll_wreg +ffffffff81c78060 T r100_debugfs_rbbm_init +ffffffff81c78090 T r100_debugfs_mc_info_init +ffffffff81c780c0 T r100_set_surface_reg +ffffffff81c782d0 T r100_clear_surface_reg +ffffffff81c78380 T r100_bandwidth_update +ffffffff81c78dd0 T r100_ring_test +ffffffff81c79080 T r100_ring_ib_execute +ffffffff81c792e0 T r100_ib_test +ffffffff81c79620 T r100_vga_render_disable +ffffffff81c79680 T r100_resume +ffffffff81c79870 t r100_startup +ffffffff81c79db0 T r100_suspend +ffffffff81c79e90 T r100_fini +ffffffff81c79fa0 T r100_restore_sanity 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+ffffffff81c7e8f0 T r300_asic_reset +ffffffff81c7eb10 T r300_mc_init +ffffffff81c7ebc0 T rv370_set_pcie_lanes +ffffffff81c7ed80 T rv370_get_pcie_lanes +ffffffff81c7ee30 T r300_cs_parse +ffffffff81c7f1a0 t r300_packet0_check +ffffffff81c80060 T r300_set_reg_safe +ffffffff81c800a0 T r300_mc_program +ffffffff81c80230 T r300_clock_startup +ffffffff81c802c0 T r300_resume +ffffffff81c80490 t r300_startup +ffffffff81c807f0 T r300_suspend +ffffffff81c80870 T r300_fini +ffffffff81c80950 T r300_init +ffffffff81c81000 T r420_pm_init_profile +ffffffff81c810f0 T r420_pipes_init +ffffffff81c812d0 T r420_mc_rreg +ffffffff81c81350 T r420_mc_wreg +ffffffff81c813c0 T r420_resume +ffffffff81c81590 t r420_startup +ffffffff81c81790 T r420_suspend +ffffffff81c81930 T r420_fini +ffffffff81c81a10 T r420_init +ffffffff81c81c90 T r420_debugfs_pipes_info_init +ffffffff81c81cc0 t r420_cp_errata_init +ffffffff81c82000 T r520_mc_wait_for_idle +ffffffff81c820a0 T r520_resume +ffffffff81c82190 t r520_startup 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r600_semaphore_ring_emit +ffffffff81c87a80 T r600_copy_cpdma +ffffffff81c88030 T r600_set_surface_reg +ffffffff81c88060 T r600_clear_surface_reg +ffffffff81c88090 T r600_vga_set_state +ffffffff81c880f0 T r600_resume +ffffffff81c88180 t r600_startup +ffffffff81c89e60 T r600_suspend +ffffffff81c89fd0 T r600_irq_suspend +ffffffff81c8a090 t r600_pcie_gart_disable +ffffffff81c8a290 T r600_init +ffffffff81c8a9f0 T r600_ih_ring_init +ffffffff81c8aa60 T r600_irq_fini +ffffffff81c8aba0 t r600_pcie_gart_fini +ffffffff81c8abd0 T r600_fini +ffffffff81c8ad60 T r600_ring_ib_execute +ffffffff81c8b1f0 T r600_ib_test +ffffffff81c8b4a0 T r600_ih_ring_alloc +ffffffff81c8b5c0 T r600_ih_ring_fini +ffffffff81c8b650 T r600_rlc_stop +ffffffff81c8b7e0 T r600_disable_interrupts +ffffffff81c8b890 T r600_irq_init +ffffffff81c8bcf0 t r600_disable_interrupt_state +ffffffff81c8bff0 T r600_irq_disable +ffffffff81c8c0b0 T r600_irq_set +ffffffff81c8c830 t r600_irq_ack +ffffffff81c8cd60 T r600_irq_process +ffffffff81c8d960 T r600_mmio_hdp_flush +ffffffff81c8d9e0 T r600_set_pcie_lanes +ffffffff81c8db10 T r600_get_pcie_lanes +ffffffff81c8dbe0 T r600_get_gpu_clock_counter +ffffffff81c8dc70 t r600_cp_load_microcode +ffffffff81c8df40 t r600_uvd_resume +ffffffff81c8f000 T r600_fmt_is_valid_color +ffffffff81c8f040 T r600_fmt_is_valid_texture +ffffffff81c8f090 T r600_fmt_get_blocksize +ffffffff81c8f0d0 T r600_fmt_get_nblocksx +ffffffff81c8f120 T r600_fmt_get_nblocksy +ffffffff81c8f180 T r600_cs_common_vline_parse +ffffffff81c8f440 T r600_mip_minify +ffffffff81c8f4a0 T r600_cs_parse +ffffffff81c91360 T r600_dma_cs_next_reloc +ffffffff81c913e0 T r600_dma_cs_parse +ffffffff81c91a80 t r600_cs_track_check +ffffffff81c92bc0 t r600_cs_check_reg +ffffffff81c93ae0 t r600_is_safe_reg +ffffffff81c93b80 t r600_texture_size +ffffffff81c94000 T r600_dma_get_rptr +ffffffff81c94060 T r600_dma_get_wptr +ffffffff81c940a0 T r600_dma_set_wptr +ffffffff81c940e0 T r600_dma_stop +ffffffff81c94170 T r600_dma_resume +ffffffff81c94370 T r600_dma_fini +ffffffff81c943f0 T r600_dma_is_lockup +ffffffff81c94460 T r600_dma_ring_test +ffffffff81c946d0 T r600_dma_fence_ring_emit +ffffffff81c948b0 T r600_dma_semaphore_ring_emit +ffffffff81c949d0 T r600_dma_ib_test +ffffffff81c94bf0 T r600_dma_ring_ib_execute +ffffffff81c94f40 T r600_copy_dma +ffffffff81c96000 T r600_dpm_print_class_info +ffffffff81c962b0 T r600_dpm_print_cap_info +ffffffff81c96340 T r600_dpm_print_ps_status +ffffffff81c963d0 T r600_dpm_get_vblank_time +ffffffff81c96490 T r600_dpm_get_vrefresh +ffffffff81c96520 T r600_calculate_u_and_p +ffffffff81c965a0 T r600_calculate_at +ffffffff81c96650 T r600_gfx_clockgating_enable +ffffffff81c96750 T r600_dynamicpm_enable +ffffffff81c967a0 T r600_enable_thermal_protection +ffffffff81c96800 T r600_enable_acpi_pm +ffffffff81c96850 T r600_enable_dynamic_pcie_gen2 +ffffffff81c968a0 T r600_dynamicpm_enabled +ffffffff81c968e0 T r600_enable_sclk_control +ffffffff81c96940 T r600_enable_mclk_control +ffffffff81c969a0 T r600_enable_spll_bypass +ffffffff81c969f0 T r600_wait_for_spll_change +ffffffff81c96a70 T r600_set_bsp +ffffffff81c96ab0 T r600_set_at +ffffffff81c96b10 T r600_set_tc +ffffffff81c96b70 T r600_select_td +ffffffff81c96c20 T r600_set_vrc +ffffffff81c96c60 T r600_set_tpu +ffffffff81c96cc0 T r600_set_tpc +ffffffff81c96d20 T r600_set_sstu +ffffffff81c96d80 T r600_set_sst +ffffffff81c96dd0 T r600_set_git +ffffffff81c96e20 T r600_set_fctu +ffffffff81c96e80 T r600_set_fct +ffffffff81c96ed0 T r600_set_ctxcgtt3d_rphc +ffffffff81c96f30 T r600_set_ctxcgtt3d_rsdc +ffffffff81c96f90 T r600_set_vddc3d_oorsu +ffffffff81c96ff0 T r600_set_vddc3d_oorphc +ffffffff81c97050 T r600_set_vddc3d_oorsdc +ffffffff81c970b0 T r600_set_mpll_lock_time +ffffffff81c97100 T r600_set_mpll_reset_time +ffffffff81c97150 T r600_engine_clock_entry_enable +ffffffff81c97250 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c97350 T r600_engine_clock_entry_enable_post_divider +ffffffff81c97450 T r600_engine_clock_entry_set_post_divider +ffffffff81c97510 T r600_engine_clock_entry_set_reference_divider +ffffffff81c975d0 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c97690 T r600_engine_clock_entry_set_step_time +ffffffff81c97750 T r600_vid_rt_set_ssu +ffffffff81c977b0 T r600_vid_rt_set_vru +ffffffff81c97810 T r600_vid_rt_set_vrt +ffffffff81c97870 T r600_voltage_control_enable_pins +ffffffff81c978c0 T r600_voltage_control_program_voltages +ffffffff81c97950 T r600_voltage_control_deactivate_static_control +ffffffff81c979e0 T r600_power_level_enable +ffffffff81c97a50 T r600_power_level_set_voltage_index +ffffffff81c97ac0 T r600_power_level_set_mem_clock_index +ffffffff81c97b20 T r600_power_level_set_eng_clock_index +ffffffff81c97b90 T r600_power_level_set_watermark_id +ffffffff81c97c00 T r600_power_level_set_pcie_gen2 +ffffffff81c97c60 T r600_power_level_get_current_index +ffffffff81c97ca0 T r600_power_level_get_target_index +ffffffff81c97ce0 T r600_power_level_set_enter_index +ffffffff81c97d40 T r600_wait_for_power_level_unequal +ffffffff81c97e30 T r600_wait_for_power_level +ffffffff81c97f20 T r600_start_dpm +ffffffff81c98200 T r600_stop_dpm +ffffffff81c98250 T r600_dpm_pre_set_power_state +ffffffff81c98280 T r600_dpm_post_set_power_state +ffffffff81c982b0 T r600_is_uvd_state +ffffffff81c982f0 T r600_is_internal_thermal_sensor +ffffffff81c98330 T r600_dpm_late_enable +ffffffff81c98440 T r600_get_platform_caps +ffffffff81c984e0 T r600_parse_extended_power_table +ffffffff81c992a0 T r600_free_extended_power_table +ffffffff81c993a0 T r600_get_pcie_gen_support +ffffffff81c993f0 T r600_get_pcie_lane_support +ffffffff81c99450 T r600_encode_pci_lane_width +ffffffff81c9a000 T r600_audio_update_hdmi +ffffffff81c9a170 t r600_audio_status +ffffffff81c9a290 T r600_hdmi_buffer_status_changed +ffffffff81c9a330 T r600_hdmi_update_audio_settings +ffffffff81c9a700 T r600_audio_enable +ffffffff81c9a780 T r600_audio_get_pin +ffffffff81c9a7b0 T r600_hdmi_update_acr +ffffffff81c9ab50 T r600_set_avi_packet +ffffffff81c9ad50 T r600_hdmi_audio_workaround +ffffffff81c9ae20 T r600_hdmi_audio_set_dto +ffffffff81c9aee0 T r600_set_vbi_packet +ffffffff81c9afa0 T r600_set_audio_packet +ffffffff81c9b270 T r600_set_mute +ffffffff81c9b380 T r600_hdmi_enable +ffffffff81c9c000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c9c040 T radeon_acpi_pcie_notify_device_ready +ffffffff81c9c160 T radeon_acpi_pcie_performance_request +ffffffff81c9c4f0 T radeon_acpi_init +ffffffff81c9cc60 t radeon_acpi_event +ffffffff81c9cf60 T radeon_acpi_fini +ffffffff81c9d000 T radeon_agp_head_init +ffffffff81c9d050 T radeon_agp_init +ffffffff81c9d0a0 T radeon_agp_resume +ffffffff81c9d130 T radeon_agp_fini +ffffffff81c9d180 T radeon_agp_suspend +ffffffff81c9e000 T radeon_agp_disable +ffffffff81c9e120 T radeon_asic_init +ffffffff81c9e8f0 t radeon_invalid_rreg +ffffffff81c9e930 t radeon_invalid_wreg +ffffffff81c9e970 t radeon_invalid_get_allowed_info_register +ffffffff81c9f000 T radeon_atombios_i2c_init +ffffffff81c9f3a0 T radeon_atombios_lookup_gpio +ffffffff81c9f4a0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c9fde0 t radeon_lookup_i2c_gpio +ffffffff81ca00d0 t radeon_atom_apply_quirks +ffffffff81ca04f0 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81ca09f0 T radeon_atom_get_clock_info +ffffffff81ca0dd0 T radeon_atombios_sideport_present +ffffffff81ca0e80 T radeon_atombios_get_tmds_info +ffffffff81ca0fc0 T radeon_atombios_get_ppll_ss_info +ffffffff81ca10e0 T radeon_atombios_get_asic_ss_info +ffffffff81ca13c0 t radeon_atombios_get_igp_ss_overrides +ffffffff81ca14d0 T radeon_atombios_get_lvds_info +ffffffff81ca1830 T radeon_atombios_get_primary_dac_info +ffffffff81ca18f0 T radeon_atom_get_tv_timings +ffffffff81ca1b30 T radeon_atombios_get_tv_info +ffffffff81ca1bf0 T radeon_atombios_get_tv_dac_info +ffffffff81ca1cf0 T radeon_atombios_get_default_voltages +ffffffff81ca1db0 T radeon_atombios_get_power_modes +ffffffff81ca2e20 T radeon_atom_get_clock_dividers +ffffffff81ca3110 T radeon_atom_get_memory_pll_dividers +ffffffff81ca3250 T radeon_atom_set_clock_gating +ffffffff81ca32a0 T radeon_atom_get_engine_clock +ffffffff81ca32f0 T radeon_atom_get_memory_clock +ffffffff81ca3340 T radeon_atom_set_engine_clock +ffffffff81ca3390 T radeon_atom_set_memory_clock +ffffffff81ca33f0 T radeon_atom_set_engine_dram_timings +ffffffff81ca3460 T radeon_atom_update_memory_dll +ffffffff81ca34b0 T radeon_atom_set_ac_timing +ffffffff81ca3500 T radeon_atom_set_voltage +ffffffff81ca35d0 T radeon_atom_get_max_vddc +ffffffff81ca36b0 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81ca3780 T radeon_atom_get_leakage_id_from_vbios +ffffffff81ca3840 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81ca3a60 T radeon_atom_get_voltage_evv +ffffffff81ca3b20 T radeon_atom_get_voltage_gpio_settings +ffffffff81ca3c20 T radeon_atom_is_voltage_gpio +ffffffff81ca3db0 T radeon_atom_get_svi2_info +ffffffff81ca3ea0 T radeon_atom_get_max_voltage +ffffffff81ca4030 T radeon_atom_get_min_voltage +ffffffff81ca4170 T radeon_atom_get_voltage_step +ffffffff81ca4270 T radeon_atom_round_to_true_voltage +ffffffff81ca43d0 T radeon_atom_get_voltage_table +ffffffff81ca4640 T radeon_atom_get_memory_info +ffffffff81ca47f0 T radeon_atom_get_mclk_range_table +ffffffff81ca4a30 T radeon_atom_init_mc_reg_table +ffffffff81ca4ca0 T radeon_atom_initialize_bios_scratch_regs +ffffffff81ca4d70 T radeon_save_bios_scratch_regs +ffffffff81ca4e50 T radeon_restore_bios_scratch_regs +ffffffff81ca4f30 T radeon_atom_output_lock +ffffffff81ca4fc0 T radeon_atombios_connected_scratch_regs +ffffffff81ca5730 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81ca5880 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81ca5ab0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81ca5c90 t radeon_atombios_add_pplib_thermal_controller +ffffffff81ca6090 t radeon_atombios_parse_pplib_clock_info +ffffffff81ca6440 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81ca7000 T radeon_audio_init +ffffffff81ca71f0 t radeon_audio_enable +ffffffff81ca7350 T radeon_audio_endpoint_rreg +ffffffff81ca7390 T radeon_audio_endpoint_wreg +ffffffff81ca73d0 T radeon_audio_get_pin +ffffffff81ca7420 T radeon_audio_detect +ffffffff81ca7580 T radeon_audio_fini +ffffffff81ca7610 T radeon_audio_mode_set +ffffffff81ca7660 T radeon_audio_dpms +ffffffff81ca76b0 T radeon_audio_decode_dfs_div +ffffffff81ca7710 T radeon_audio_component_init +ffffffff81ca7780 T radeon_audio_component_fini +ffffffff81ca77d0 t radeon_audio_hdmi_mode_set +ffffffff81ca7eb0 t radeon_audio_write_speaker_allocation +ffffffff81ca7f60 t radeon_audio_write_sad_regs +ffffffff81ca8030 t radeon_audio_set_avi_packet +ffffffff81ca8170 t radeon_audio_dp_mode_set +ffffffff81ca82f0 t radeon_audio_rreg +ffffffff81ca8340 t radeon_audio_wreg +ffffffff81ca9000 T radeon_benchmark +ffffffff81ca9940 t radeon_benchmark_move +ffffffff81ca9c20 t radeon_bo_reserve +ffffffff81ca9d90 t radeon_bo_unreserve +ffffffff81ca9e70 t radeon_benchmark_do_move +ffffffff81caa000 T radeon_get_bios +ffffffff81caafc0 t igp_read_bios_from_vram +ffffffff81cab0d0 t radeon_read_bios +ffffffff81cac000 T radeon_legacy_get_engine_clock +ffffffff81cac0d0 T radeon_legacy_get_memory_clock +ffffffff81cac1a0 T radeon_get_clock_info +ffffffff81cac730 T radeon_legacy_set_engine_clock +ffffffff81caca80 T radeon_legacy_set_clock_gating +ffffffff81cae000 T radeon_combios_check_hardcoded_edid +ffffffff81cae100 t combios_get_table_offset +ffffffff81cae690 T radeon_bios_get_hardcoded_edid +ffffffff81cae710 T radeon_combios_i2c_init +ffffffff81caedb0 t combios_setup_i2c_bus +ffffffff81caf0a0 t radeon_combios_get_i2c_info_from_table +ffffffff81caf2f0 T radeon_combios_get_clock_info +ffffffff81caf4e0 T radeon_combios_sideport_present +ffffffff81caf560 T radeon_combios_get_primary_dac_info +ffffffff81caf6b0 T radeon_combios_get_tv_info +ffffffff81caf7b0 T radeon_combios_get_tv_dac_info +ffffffff81cafa40 T radeon_combios_get_lvds_info +ffffffff81cb00b0 T radeon_legacy_get_tmds_info_from_table +ffffffff81cb0180 T radeon_legacy_get_tmds_info_from_combios +ffffffff81cb0390 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81cb05c0 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81cb0900 T radeon_get_legacy_connector_info_from_table +ffffffff81cb2a70 T radeon_get_legacy_connector_info_from_bios +ffffffff81cb3660 T radeon_combios_get_power_modes +ffffffff81cb3d30 T radeon_external_tmds_setup +ffffffff81cb3e00 T radeon_combios_external_tmds_setup +ffffffff81cb4380 T radeon_combios_asic_init +ffffffff81cb48d0 t combios_parse_mmio_table +ffffffff81cb4af0 t combios_parse_pll_table +ffffffff81cb4dc0 T radeon_combios_initialize_bios_scratch_regs +ffffffff81cb4e50 T radeon_combios_output_lock +ffffffff81cb4eb0 T radeon_combios_connected_scratch_regs +ffffffff81cb5210 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81cb52f0 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81cb6000 T radeon_connector_hotplug +ffffffff81cb6100 T radeon_get_monitor_bpc +ffffffff81cb6550 T radeon_connector_edid +ffffffff81cb6600 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81cb6680 T radeon_connector_is_dp12_capable +ffffffff81cb6720 T radeon_add_atom_connector +ffffffff81cb75d0 T radeon_add_legacy_connector +ffffffff81cb7ac0 t radeon_dp_detect +ffffffff81cb7e60 t radeon_dvi_force +ffffffff81cb7eb0 t radeon_connector_set_property +ffffffff81cb86f0 t radeon_connector_unregister +ffffffff81cb8750 t radeon_connector_destroy +ffffffff81cb87c0 t radeon_best_single_encoder +ffffffff81cb8830 t radeon_connector_get_edid +ffffffff81cb8990 t radeon_dp_get_modes +ffffffff81cb8c90 t radeon_dp_mode_valid +ffffffff81cb8e60 t radeon_dvi_encoder +ffffffff81cb8f20 t radeon_fixup_lvds_native_mode +ffffffff81cb9060 t radeon_add_common_modes +ffffffff81cb9150 t radeon_fp_native_mode +ffffffff81cb9230 t radeon_lvds_set_property +ffffffff81cb9320 t radeon_vga_detect +ffffffff81cb95c0 t radeon_connector_analog_encoder_conflict_solve +ffffffff81cb97e0 t radeon_vga_get_modes +ffffffff81cb98c0 t radeon_vga_mode_valid +ffffffff81cb9920 t radeon_dvi_detect +ffffffff81cb9f80 t radeon_dvi_mode_valid +ffffffff81cba100 t radeon_tv_detect +ffffffff81cba340 t radeon_tv_get_modes +ffffffff81cba420 t radeon_tv_mode_valid +ffffffff81cba470 t radeon_lvds_detect +ffffffff81cba610 t radeon_lvds_get_modes +ffffffff81cba750 t radeon_lvds_mode_valid +ffffffff81cbb000 T radeon_cs_parser_init +ffffffff81cbb490 T radeon_cs_ioctl +ffffffff81cbbc70 t radeon_cs_parser_fini +ffffffff81cbbdf0 t radeon_cs_ib_vm_chunk +ffffffff81cbc130 T radeon_cs_packet_parse +ffffffff81cbc2e0 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81cbc340 T radeon_cs_dump_packet +ffffffff81cbc3c0 T radeon_cs_packet_next_reloc +ffffffff81cbc5a0 t cmp_size_smaller_first +ffffffff81cbd000 T radeon_crtc_cursor_move +ffffffff81cbd070 t radeon_lock_cursor +ffffffff81cbd230 t radeon_cursor_move_locked +ffffffff81cbd770 T radeon_crtc_cursor_set2 +ffffffff81cbda00 t radeon_hide_cursor +ffffffff81cbdac0 t radeon_bo_reserve +ffffffff81cbdc30 t radeon_bo_unreserve +ffffffff81cbdd10 t radeon_show_cursor +ffffffff81cbdf60 T radeon_cursor_reset +ffffffff81cbe000 T radeon_is_px +ffffffff81cbe040 T radeon_program_register_sequence +ffffffff81cbe170 T radeon_pci_config_reset +ffffffff81cbe1a0 T radeon_surface_init +ffffffff81cbe360 T radeon_scratch_init +ffffffff81cbe3e0 T radeon_scratch_get +ffffffff81cbe460 T radeon_scratch_free +ffffffff81cbe4c0 T radeon_doorbell_get +ffffffff81cbe570 T radeon_doorbell_free +ffffffff81cbe5c0 T radeon_wb_disable +ffffffff81cbe5f0 T radeon_wb_fini +ffffffff81cbe690 t radeon_bo_reserve +ffffffff81cbe800 t radeon_bo_unreserve +ffffffff81cbe8e0 T radeon_wb_init +ffffffff81cbebc0 T radeon_vram_location +ffffffff81cbece0 T radeon_gtt_location +ffffffff81cbee10 T radeon_device_is_virtual +ffffffff81cbee40 T radeon_card_posted +ffffffff81cbf050 T radeon_update_bandwidth_info +ffffffff81cbf0d0 T radeon_boot_test_post_card +ffffffff81cbf190 T radeon_dummy_page_init +ffffffff81cbf250 T radeon_dummy_page_fini +ffffffff81cbf2b0 T radeon_atombios_init +ffffffff81cbf440 t cail_reg_read +ffffffff81cbf4a0 t cail_reg_write +ffffffff81cbf500 t cail_ioreg_read +ffffffff81cbf520 t cail_ioreg_write +ffffffff81cbf540 t cail_mc_read +ffffffff81cbf570 t cail_mc_write +ffffffff81cbf5a0 t cail_pll_read +ffffffff81cbf5d0 t cail_pll_write +ffffffff81cbf600 T radeon_atombios_fini +ffffffff81cbf6b0 T radeon_combios_init +ffffffff81cbf6f0 T radeon_combios_fini +ffffffff81cbf720 T radeon_device_init +ffffffff81cc0200 T radeon_device_fini +ffffffff81cc0310 T radeon_suspend_kms +ffffffff81cc0680 T radeon_resume_kms +ffffffff81cc08c0 T radeon_gpu_reset +ffffffff81cc1000 T radeon_crtc_load_lut +ffffffff81cc1e60 T radeon_crtc_handle_vblank +ffffffff81cc1fd0 T radeon_get_crtc_scanoutpos +ffffffff81cc25a0 T radeon_crtc_handle_flip +ffffffff81cc26d0 T radeon_compute_pll_avivo +ffffffff81cc2c30 T radeon_compute_pll_legacy +ffffffff81cc3300 T radeon_framebuffer_init +ffffffff81cc3380 T radeon_update_display_priority +ffffffff81cc33e0 T radeon_modeset_init +ffffffff81cc3e90 T radeon_modeset_fini +ffffffff81cc3fe0 T radeon_crtc_scaling_mode_fixup +ffffffff81cc4360 T radeon_get_crtc_scanout_position +ffffffff81cc43d0 t radeon_user_framebuffer_create +ffffffff81cc4570 t radeon_crtc_gamma_set +ffffffff81cc45b0 t radeon_crtc_destroy +ffffffff81cc45f0 t radeon_crtc_set_config +ffffffff81cc46c0 t radeon_crtc_page_flip_target +ffffffff81cc4b60 t radeon_flip_work_func +ffffffff81cc4d80 t radeon_unpin_work_func +ffffffff81cc4e00 t radeon_bo_reserve +ffffffff81cc4f70 t radeon_bo_unreserve +ffffffff81cc6000 T radeon_dp_aux_transfer_native +ffffffff81cc7000 T radeondrm_probe +ffffffff81cc7060 T radeondrm_attach_kms +ffffffff81cc77a0 T radeondrm_detach_kms +ffffffff81cc7830 T radeondrm_activate_kms +ffffffff81cc78f0 T radeondrm_wsioctl +ffffffff81cc79b0 T radeondrm_wsmmap +ffffffff81cc79e0 T radeondrm_alloc_screen +ffffffff81cc7a10 T radeondrm_free_screen +ffffffff81cc7a20 T radeondrm_show_screen +ffffffff81cc7b10 T radeondrm_enter_ddb +ffffffff81cc7b70 T radeondrm_doswitch +ffffffff81cc7c10 T radeondrm_setpal +ffffffff81cc7e30 T radeondrm_attachhook +ffffffff81cc8160 T radeondrm_forcedetach +ffffffff81cc9000 T radeon_setup_encoder_clones +ffffffff81cc90b0 T radeon_get_encoder_enum +ffffffff81cc9230 T radeon_link_encoder_connector +ffffffff81cc9380 T radeon_encoder_set_active_device +ffffffff81cc9440 T radeon_get_connector_for_encoder +ffffffff81cc94b0 T radeon_get_connector_for_encoder_init +ffffffff81cc9520 T radeon_get_external_encoder +ffffffff81cc95b0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81cc9650 T radeon_panel_mode_fixup +ffffffff81cc9820 T radeon_dig_monitor_is_duallink +ffffffff81cc9940 T radeon_encoder_is_digital +ffffffff81cca000 T radeon_fbdev_setup +ffffffff81cca150 T radeon_fbdev_set_suspend +ffffffff81cca1a0 T radeon_fbdev_robj_is_fb +ffffffff81cca210 T radeondrm_burner +ffffffff81cca290 T radeondrm_burner_cb +ffffffff81cca2c0 t radeon_fbdev_fb_helper_fb_probe +ffffffff81cca800 t radeon_bo_reserve +ffffffff81cca970 t radeon_bo_unreserve +ffffffff81ccaa50 t radeon_fbdev_client_unregister +ffffffff81ccaab0 t radeon_fbdev_client_restore +ffffffff81ccaaf0 t radeon_fbdev_client_hotplug +ffffffff81ccb000 T radeon_fence_emit +ffffffff81ccb120 T radeon_fence_process +ffffffff81ccb1e0 t radeon_fence_activity +ffffffff81ccb450 T radeon_fence_signaled +ffffffff81ccb4c0 t radeon_fence_seq_signaled +ffffffff81ccb5b0 T radeon_fence_wait_timeout +ffffffff81ccb6e0 t radeon_fence_wait_seq_timeout +ffffffff81ccbb50 T radeon_fence_wait +ffffffff81ccbc80 T radeon_fence_wait_any +ffffffff81ccbdc0 T radeon_fence_wait_next +ffffffff81ccbe80 T radeon_fence_wait_empty +ffffffff81ccbf90 T radeon_fence_ref +ffffffff81ccbfd0 T radeon_fence_unref +ffffffff81ccc010 T radeon_fence_count_emitted +ffffffff81ccc110 T radeon_fence_need_sync +ffffffff81ccc170 T radeon_fence_note_sync +ffffffff81ccc340 T radeon_fence_driver_start_ring +ffffffff81ccc520 T radeon_fence_driver_init +ffffffff81ccc660 T radeon_debugfs_fence_init +ffffffff81ccc690 T radeon_fence_driver_fini +ffffffff81ccc8b0 T radeon_fence_driver_force_completion +ffffffff81ccc9a0 t radeon_fence_get_driver_name +ffffffff81ccc9d0 t radeon_fence_get_timeline_name +ffffffff81ccca70 t radeon_fence_enable_signaling +ffffffff81cccc80 t radeon_fence_is_signaled +ffffffff81cccdc0 t radeon_fence_default_wait +ffffffff81cccf20 t radeon_fence_any_seq_signaled +ffffffff81ccd060 t radeon_fence_check_lockup +ffffffff81ccd2b0 t __delayed_work_tick +ffffffff81ccd2d0 t radeon_fence_check_signaled +ffffffff81ccd370 t radeon_fence_wait_cb +ffffffff81cce000 T radeon_gart_table_ram_alloc +ffffffff81cce0c0 T radeon_gart_table_ram_free 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radeon_gem_set_domain_ioctl +ffffffff81ccf990 T radeon_mode_dumb_mmap +ffffffff81ccfa40 T radeon_gem_mmap_ioctl +ffffffff81ccfb00 T radeon_gem_busy_ioctl +ffffffff81ccfbb0 T radeon_gem_wait_idle_ioctl +ffffffff81ccfcc0 T radeon_gem_set_tiling_ioctl +ffffffff81ccfd70 T radeon_gem_get_tiling_ioctl +ffffffff81ccfe40 t radeon_bo_reserve +ffffffff81cd0040 t radeon_bo_unreserve +ffffffff81cd0120 T radeon_gem_va_ioctl +ffffffff81cd03d0 t radeon_gem_va_update_vm +ffffffff81cd0520 T radeon_gem_op_ioctl +ffffffff81cd0620 T radeon_align_pitch +ffffffff81cd06b0 T radeon_mode_dumb_create +ffffffff81cd0800 T radeon_gem_debugfs_init +ffffffff81cd1000 T radeon_ddc_probe +ffffffff81cd10c0 T radeon_router_select_ddc_port +ffffffff81cd1320 T radeon_bb_set_bits +ffffffff81cd1490 T radeon_bb_set_dir +ffffffff81cd14c0 T radeon_bb_read_bits +ffffffff81cd15a0 T radeon_acquire_bus +ffffffff81cd19f0 T radeon_release_bus +ffffffff81cd1b60 T radeon_send_start +ffffffff81cd1b80 T radeon_send_stop +ffffffff81cd1ba0 T radeon_initiate_xfer +ffffffff81cd1bc0 T radeon_read_byte +ffffffff81cd1be0 T radeon_write_byte +ffffffff81cd1c00 T radeon_i2c_create +ffffffff81cd1e10 T radeon_i2c_destroy +ffffffff81cd1e90 T radeon_i2c_init +ffffffff81cd1ee0 T radeon_i2c_fini +ffffffff81cd1f90 T radeon_i2c_add +ffffffff81cd2140 T radeon_i2c_lookup +ffffffff81cd2310 T radeon_i2c_get_byte +ffffffff81cd23e0 T radeon_i2c_put_byte +ffffffff81cd2470 T radeon_router_select_cd_port +ffffffff81cd26d0 t radeon_hw_i2c_xfer +ffffffff81cd3270 t radeon_hw_i2c_func +ffffffff81cd32a0 t r100_hw_i2c_xfer +ffffffff81cd3960 t radeon_get_i2c_prescale +ffffffff81cd4000 T radeon_ib_get +ffffffff81cd4100 T radeon_ib_free +ffffffff81cd4140 T radeon_ib_schedule +ffffffff81cd43d0 T radeon_ib_pool_init +ffffffff81cd4470 T radeon_ib_pool_fini +ffffffff81cd44e0 T radeon_ib_ring_tests +ffffffff81cd5000 T radeon_driver_irq_handler_kms +ffffffff81cd5050 T radeon_msi_ok +ffffffff81cd5150 T radeon_irq_kms_init +ffffffff81cd53e0 t radeon_hotplug_work_func +ffffffff81cd5490 t radeon_dp_work_func +ffffffff81cd5500 T radeon_irq_kms_fini +ffffffff81cd56a0 T radeon_irq_kms_sw_irq_get +ffffffff81cd5740 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81cd5780 T radeon_irq_kms_sw_irq_put +ffffffff81cd5810 T radeon_irq_kms_pflip_irq_get +ffffffff81cd58c0 T radeon_irq_kms_pflip_irq_put +ffffffff81cd5960 T radeon_irq_kms_enable_afmt +ffffffff81cd59f0 T radeon_irq_kms_disable_afmt +ffffffff81cd5a80 T radeon_irq_kms_enable_hpd +ffffffff81cd5b70 T radeon_irq_kms_disable_hpd +ffffffff81cd5c50 T radeon_irq_kms_set_irq_n_enabled +ffffffff81cd5dc0 t __delayed_work_tick +ffffffff81cd6000 T radeon_info_ioctl +ffffffff81cd6af0 t radeon_set_filp_rights +ffffffff81cd6b80 T radeon_driver_open_kms +ffffffff81cd6cb0 t radeon_bo_reserve +ffffffff81cd6e20 T radeon_driver_postclose_kms +ffffffff81cd7040 T radeon_get_vblank_counter_kms +ffffffff81cd71f0 T radeon_enable_vblank_kms +ffffffff81cd72a0 T radeon_disable_vblank_kms +ffffffff81cd8000 T radeon_crtc_set_base +ffffffff81cd8020 T radeon_crtc_do_set_base +ffffffff81cd8590 T radeon_crtc_set_base_atomic +ffffffff81cd85b0 t radeon_bo_reserve +ffffffff81cd8720 t radeon_bo_unreserve +ffffffff81cd8800 T radeon_legacy_init_crtc +ffffffff81cd8850 t radeon_crtc_dpms +ffffffff81cd8a40 t radeon_crtc_prepare +ffffffff81cd8ac0 t radeon_crtc_commit +ffffffff81cd8b30 t radeon_crtc_mode_fixup +ffffffff81cd8b50 t radeon_crtc_mode_set +ffffffff81cd9fc0 t radeon_crtc_disable +ffffffff81cdb000 T radeon_legacy_get_backlight_level +ffffffff81cdb050 T radeon_legacy_set_backlight_level +ffffffff81cdb0a0 t radeon_legacy_lvds_update +ffffffff81cdb3e0 T radeon_legacy_backlight_init +ffffffff81cdb5b0 t radeon_legacy_backlight_get_brightness +ffffffff81cdb610 T radeon_add_legacy_encoder +ffffffff81cdb970 t radeon_legacy_backlight_update_status +ffffffff81cdba10 t radeon_lvds_enc_destroy +ffffffff81cdbaa0 t radeon_legacy_lvds_dpms +ffffffff81cdbaf0 t radeon_legacy_mode_fixup +ffffffff81cdbb60 t radeon_legacy_lvds_prepare +ffffffff81cdbbf0 t radeon_legacy_lvds_commit +ffffffff81cdbc70 t radeon_legacy_lvds_mode_set +ffffffff81cdbe80 t radeon_legacy_encoder_disable +ffffffff81cdbed0 t radeon_legacy_tmds_int_dpms +ffffffff81cdbf90 t radeon_legacy_tmds_int_prepare +ffffffff81cdc060 t radeon_legacy_tmds_int_commit +ffffffff81cdc130 t radeon_legacy_tmds_int_mode_set +ffffffff81cdc390 t radeon_legacy_primary_dac_dpms +ffffffff81cdc4d0 t radeon_legacy_primary_dac_prepare +ffffffff81cdc530 t radeon_legacy_primary_dac_commit +ffffffff81cdc580 t radeon_legacy_primary_dac_mode_set +ffffffff81cdc710 t radeon_legacy_primary_dac_detect +ffffffff81cdc900 t radeon_legacy_tv_dac_dpms +ffffffff81cdcb10 t radeon_legacy_tv_dac_prepare +ffffffff81cdcb70 t radeon_legacy_tv_dac_commit +ffffffff81cdcbc0 t radeon_legacy_tv_dac_mode_set +ffffffff81cdcf60 t radeon_legacy_tv_dac_detect +ffffffff81cddb60 t radeon_ext_tmds_enc_destroy +ffffffff81cddbb0 t radeon_legacy_tmds_ext_dpms +ffffffff81cddc80 t radeon_legacy_tmds_ext_prepare +ffffffff81cddd50 t radeon_legacy_tmds_ext_commit +ffffffff81cdde20 t radeon_legacy_tmds_ext_mode_set +ffffffff81cde000 T radeon_legacy_tv_mode_set +ffffffff81cdf0f0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81cdf200 T radeon_legacy_tv_adjust_pll1 +ffffffff81cdf300 T radeon_legacy_tv_adjust_pll2 +ffffffff81ce0000 T radeon_ttm_bo_is_radeon_bo +ffffffff81ce0040 t radeon_ttm_bo_destroy +ffffffff81ce0170 T radeon_ttm_placement_from_domain +ffffffff81ce02d0 T radeon_bo_create +ffffffff81ce04a0 T radeon_bo_kmap +ffffffff81ce0590 T radeon_bo_check_tiling +ffffffff81ce0670 T radeon_bo_kunmap +ffffffff81ce0700 T radeon_bo_ref +ffffffff81ce0740 T radeon_bo_unref +ffffffff81ce0790 T radeon_bo_pin_restricted +ffffffff81ce0ab0 T radeon_bo_pin +ffffffff81ce0ad0 T radeon_bo_unpin +ffffffff81ce0b40 T radeon_bo_evict_vram +ffffffff81ce0ba0 T radeon_bo_force_delete +ffffffff81ce0d00 T radeon_bo_init +ffffffff81ce0de0 T radeon_bo_fini +ffffffff81ce0e20 T radeon_bo_list_validate +ffffffff81ce1130 T radeon_bo_get_surface_reg +ffffffff81ce13b0 T radeon_bo_set_tiling_flags +ffffffff81ce16b0 T radeon_bo_get_tiling_flags +ffffffff81ce1700 T radeon_bo_move_notify +ffffffff81ce17d0 T radeon_bo_fault_reserve_notify +ffffffff81ce1a60 t ttm_bo_move_to_lru_tail_unlocked +ffffffff81ce1aa0 T radeon_bo_fence +ffffffff81ce2000 T radeon_pm_get_type_index +ffffffff81ce2080 T radeon_pm_acpi_event_handler +ffffffff81ce2160 t radeon_pm_update_profile +ffffffff81ce2280 t radeon_pm_set_clocks +ffffffff81ce2c40 T radeon_dpm_enable_uvd +ffffffff81ce2d00 T radeon_pm_compute_clocks +ffffffff81ce3710 T radeon_dpm_enable_vce +ffffffff81ce3780 T radeon_pm_suspend +ffffffff81ce3880 T radeon_pm_resume +ffffffff81ce3b70 T radeon_pm_init +ffffffff81ce4280 T radeon_pm_late_init +ffffffff81ce4340 T radeon_pm_fini +ffffffff81ce4460 t radeon_dpm_thermal_work_handler +ffffffff81ce4540 t radeon_dynpm_idle_work_handler +ffffffff81ce47c0 t __delayed_work_tick +ffffffff81ce5000 T radeon_gem_prime_get_sg_table +ffffffff81ce5030 T radeon_gem_prime_pin +ffffffff81ce50c0 t radeon_bo_reserve +ffffffff81ce5230 t radeon_bo_unreserve +ffffffff81ce5310 T radeon_gem_prime_unpin +ffffffff81ce5390 T radeon_gem_prime_export +ffffffff81ce6000 T radeon_ring_supports_scratch_reg +ffffffff81ce6030 T radeon_ring_free_size +ffffffff81ce60e0 T radeon_ring_lockup_update +ffffffff81ce6140 T radeon_ring_alloc +ffffffff81ce62c0 T radeon_ring_lock +ffffffff81ce6340 T radeon_ring_commit +ffffffff81ce6440 T radeon_ring_unlock_commit +ffffffff81ce6470 T radeon_ring_undo +ffffffff81ce64a0 T radeon_ring_unlock_undo +ffffffff81ce64c0 T radeon_ring_test_lockup +ffffffff81ce65e0 T radeon_ring_backup +ffffffff81ce6780 T radeon_ring_restore +ffffffff81ce6930 T radeon_ring_init +ffffffff81ce6b20 t radeon_bo_reserve +ffffffff81ce6c90 t radeon_bo_unreserve +ffffffff81ce6d70 T radeon_ring_fini +ffffffff81ce7000 T radeon_sa_bo_manager_init +ffffffff81ce70d0 T radeon_sa_bo_manager_fini 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radeon_vce_resume +ffffffff81cf1be0 T radeon_vce_note_usage +ffffffff81cf1d00 T radeon_vce_free_handles +ffffffff81cf1dc0 T radeon_vce_get_destroy_msg +ffffffff81cf1ff0 T radeon_vce_get_create_msg +ffffffff81cf2340 T radeon_vce_cs_reloc +ffffffff81cf2440 T radeon_vce_cs_parse +ffffffff81cf2bb0 T radeon_vce_semaphore_emit +ffffffff81cf2d70 T radeon_vce_ib_execute +ffffffff81cf2f00 T radeon_vce_fence_emit +ffffffff81cf3130 T radeon_vce_ring_test +ffffffff81cf3280 T radeon_vce_ib_test +ffffffff81cf33a0 t __delayed_work_tick +ffffffff81cf4000 T radeon_vm_manager_init +ffffffff81cf4060 T radeon_vm_manager_fini +ffffffff81cf4180 T radeon_vm_get_bos +ffffffff81cf42d0 T radeon_vm_grab_id +ffffffff81cf4460 T radeon_vm_flush +ffffffff81cf45f0 T radeon_vm_fence +ffffffff81cf46a0 T radeon_vm_bo_find +ffffffff81cf46f0 T radeon_vm_bo_add +ffffffff81cf47e0 T radeon_vm_bo_set_addr +ffffffff81cf4c30 t radeon_bo_unreserve +ffffffff81cf4d10 t radeon_vm_clear_bo +ffffffff81cf4f00 T radeon_vm_map_gart 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T rs400_suspend +ffffffff81cf7d70 T rs400_fini +ffffffff81cf7e60 T rs400_init +ffffffff81cf9000 T avivo_wait_for_vblank +ffffffff81cf9280 T rs600_page_flip +ffffffff81cf9550 T rs600_page_flip_pending +ffffffff81cf95c0 T avivo_program_fmt +ffffffff81cf96e0 T rs600_pm_misc +ffffffff81cf9a20 T rs600_pm_prepare +ffffffff81cf9b20 T rs600_pm_finish +ffffffff81cf9c20 T rs600_hpd_sense +ffffffff81cf9c80 T rs600_hpd_set_polarity +ffffffff81cf9d40 T rs600_hpd_init +ffffffff81cf9e20 T rs600_hpd_fini +ffffffff81cf9ed0 T rs600_asic_reset +ffffffff81cfa140 T rs600_gart_tlb_flush +ffffffff81cfa200 T rs600_gart_get_page_entry +ffffffff81cfa260 T rs600_gart_set_page +ffffffff81cfa2a0 T rs600_irq_set +ffffffff81cfa480 T rs600_irq_disable +ffffffff81cfa500 t rs600_irq_ack +ffffffff81cfa6b0 T rs600_irq_process +ffffffff81cfaa10 T rs600_get_vblank_counter +ffffffff81cfaa60 T rs600_mc_wait_for_idle +ffffffff81cfab00 T rs600_bandwidth_update +ffffffff81cfabf0 T rs600_mc_rreg +ffffffff81cfac70 T rs600_mc_wreg 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rv6xx_dpm_get_current_mclk +ffffffff81d0a770 T rv6xx_dpm_fini +ffffffff81d0a800 T rv6xx_dpm_get_sclk +ffffffff81d0a840 T rv6xx_dpm_get_mclk +ffffffff81d0a880 T rv6xx_dpm_force_performance_level +ffffffff81d0aa10 t rv6xx_generate_steps +ffffffff81d0ad10 t rv6xx_output_stepping +ffffffff81d0ae20 t rv6xx_program_mclk_stepping_entry +ffffffff81d0b090 t rv6xx_program_engine_spread_spectrum +ffffffff81d0b380 t rv6xx_step_sw_voltage +ffffffff81d0c000 T rv730_populate_sclk_value +ffffffff81d0c230 T rv730_populate_mclk_value +ffffffff81d0c470 T rv730_read_clock_registers +ffffffff81d0c590 T rv730_populate_smc_acpi_state +ffffffff81d0c740 T rv730_populate_smc_initial_state +ffffffff81d0c900 T rv730_program_memory_timing_parameters +ffffffff81d0cae0 T rv730_start_dpm +ffffffff81d0cb70 T rv730_stop_dpm +ffffffff81d0cc30 T rv730_program_dcodt +ffffffff81d0cd00 T rv730_get_odt_values +ffffffff81d0d000 T rv740_get_decoded_reference_divider +ffffffff81d0d0a0 T rv740_get_dll_speed +ffffffff81d0d2b0 T rv740_populate_sclk_value +ffffffff81d0d4b0 T rv740_populate_mclk_value +ffffffff81d0d860 T rv740_read_clock_registers +ffffffff81d0d990 T rv740_populate_smc_acpi_state +ffffffff81d0dbc0 T rv740_enable_mclk_spread_spectrum +ffffffff81d0dc10 T rv740_get_mclk_frequency_ratio +ffffffff81d0e000 T rv770_set_uvd_clocks +ffffffff81d0e570 T rv770_get_xclk +ffffffff81d0e5d0 T rv770_page_flip +ffffffff81d0e8d0 T rv770_page_flip_pending +ffffffff81d0e940 T rv770_get_temp +ffffffff81d0e9a0 T rv770_pm_misc +ffffffff81d0ea80 T r700_cp_stop +ffffffff81d0eb00 T r700_cp_fini +ffffffff81d0eb90 T rv770_set_clk_bypass_mode +ffffffff81d0ecb0 T r700_vram_gtt_location +ffffffff81d0ee40 T rv770_resume +ffffffff81d0eed0 t rv770_init_golden_registers +ffffffff81d0f060 t rv770_startup +ffffffff81d10c00 T rv770_suspend +ffffffff81d10e20 T rv770_init +ffffffff81d11210 t rv770_pcie_gart_fini +ffffffff81d11390 T rv770_fini +ffffffff81d11630 t rv770_uvd_start +ffffffff81d116e0 t rv770_cp_load_microcode +ffffffff81d119b0 t rv770_uvd_resume +ffffffff81d12000 T rv770_copy_dma +ffffffff81d13000 T rv770_get_ps +ffffffff81d13030 T rv770_get_pi +ffffffff81d13060 T evergreen_get_pi +ffffffff81d13090 T rv770_restore_cgcg +ffffffff81d13110 T rv770_stop_dpm +ffffffff81d131d0 T rv770_dpm_enabled +ffffffff81d13210 T rv770_enable_thermal_protection +ffffffff81d13270 T rv770_enable_acpi_pm +ffffffff81d132c0 T rv770_get_seq_value +ffffffff81d13300 T rv770_write_smc_soft_register +ffffffff81d13330 T rv770_populate_smc_t +ffffffff81d134e0 T rv770_populate_smc_sp +ffffffff81d13540 T rv770_map_clkf_to_ibias +ffffffff81d135a0 T rv770_populate_vddc_value +ffffffff81d13650 T rv770_populate_mvdd_value +ffffffff81d136a0 T rv770_calculate_memory_refresh_rate +ffffffff81d13720 T rv770_enable_backbias +ffffffff81d13780 T rv770_setup_bsp +ffffffff81d13870 T rv770_program_git +ffffffff81d138c0 T rv770_program_tp +ffffffff81d13940 T rv770_program_tpp +ffffffff81d13980 T rv770_program_sstp +ffffffff81d139c0 T rv770_program_engine_speed_parameters +ffffffff81d13a10 T rv770_program_vc +ffffffff81d13a60 T rv770_clear_vc +ffffffff81d13aa0 T rv770_upload_firmware +ffffffff81d13ae0 T rv770_populate_initial_mvdd_value +ffffffff81d13b30 T rv770_get_memory_module_index +ffffffff81d13b70 T rv770_enable_voltage_control +ffffffff81d13bc0 T rv770_halt_smc +ffffffff81d13c20 T rv770_resume_smc +ffffffff81d13c70 T rv770_set_sw_state +ffffffff81d13cd0 T rv770_set_boot_state +ffffffff81d13d20 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81d13d90 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81d13e00 T rv770_restrict_performance_levels_before_switch +ffffffff81d13e60 T rv770_dpm_force_performance_level +ffffffff81d13f20 T r7xx_start_smc +ffffffff81d13f50 T r7xx_stop_smc +ffffffff81d13f80 T rv770_read_voltage_smio_registers +ffffffff81d13fc0 T rv770_reset_smio_status +ffffffff81d14080 T rv770_get_memory_type +ffffffff81d140d0 T rv770_get_pcie_gen2_status +ffffffff81d14140 T rv770_get_max_vddc +ffffffff81d141a0 T rv770_program_response_times +ffffffff81d142f0 T rv770_enable_auto_throttle_source +ffffffff81d14470 T rv770_dpm_enable +ffffffff81d154f0 T rv770_dpm_late_enable +ffffffff81d15620 T rv770_dpm_disable +ffffffff81d15990 T rv770_dpm_set_power_state +ffffffff81d16080 t rv770_program_dcodt_after_state_switch +ffffffff81d16100 T rv770_dpm_setup_asic +ffffffff81d16470 T rv770_dpm_display_configuration_changed +ffffffff81d164f0 T rv7xx_parse_power_table +ffffffff81d16a70 T rv770_get_engine_memory_ss +ffffffff81d16b00 T rv770_dpm_init +ffffffff81d16d40 T rv770_dpm_print_power_state +ffffffff81d16e60 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81d16e90 T rv770_dpm_get_current_sclk +ffffffff81d16f00 T rv770_dpm_get_current_mclk +ffffffff81d16f70 T rv770_dpm_fini +ffffffff81d17000 T rv770_dpm_get_sclk +ffffffff81d17050 T rv770_dpm_get_mclk +ffffffff81d170a0 T rv770_dpm_vblank_too_short +ffffffff81d17110 t rv770_convert_power_level_to_smc +ffffffff81d18000 T rv770_copy_bytes_to_smc +ffffffff81d18210 T rv770_start_smc +ffffffff81d18260 T rv770_reset_smc +ffffffff81d182b0 T rv770_stop_smc_clock +ffffffff81d18300 T rv770_start_smc_clock +ffffffff81d18350 T rv770_is_smc_running +ffffffff81d18390 T rv770_send_msg_to_smc +ffffffff81d18470 T rv770_wait_for_smc_inactive +ffffffff81d18510 T rv770_load_smc_ucode +ffffffff81d186a0 T rv770_read_smc_sram_dword +ffffffff81d18760 T rv770_write_smc_sram_dword +ffffffff81d19000 T si_get_allowed_info_register +ffffffff81d19090 T si_get_xclk +ffffffff81d19100 T si_get_temp +ffffffff81d19150 T si_mc_load_microcode +ffffffff81d19410 T dce6_bandwidth_update +ffffffff81d195d0 t dce6_line_buffer_adjust +ffffffff81d19780 t dce6_program_watermarks +ffffffff81d1a230 T si_fence_ring_emit +ffffffff81d1a690 T si_ring_ib_execute +ffffffff81d1ae00 T si_gpu_check_soft_reset +ffffffff81d1afa0 T si_asic_reset +ffffffff81d1b320 t si_gpu_pci_config_reset +ffffffff81d1b640 T si_gfx_is_lockup +ffffffff81d1b6b0 T si_vram_gtt_location +ffffffff81d1b750 T si_pcie_gart_tlb_flush +ffffffff81d1b7a0 T si_ib_parse +ffffffff81d1be40 T si_vm_init +ffffffff81d1be80 T si_vm_fini +ffffffff81d1beb0 T si_vm_flush +ffffffff81d1c550 T si_init_uvd_internal_cg +ffffffff81d1c5a0 T si_get_csb_size +ffffffff81d1c630 T si_get_csb_buffer +ffffffff81d1c7b0 T si_rlc_reset +ffffffff81d1c830 T si_irq_set +ffffffff81d1cd20 t si_disable_interrupt_state +ffffffff81d1cfa0 T si_irq_process +ffffffff81d1e2a0 t si_irq_ack +ffffffff81d1e890 T si_resume +ffffffff81d1e920 t si_init_golden_registers +ffffffff81d1eae0 t si_startup +ffffffff81d20f00 T si_suspend +ffffffff81d211f0 t si_fini_cg +ffffffff81d21290 T si_init +ffffffff81d225f0 t si_cp_fini +ffffffff81d226e0 t si_irq_fini +ffffffff81d227b0 t si_pcie_gart_fini +ffffffff81d228b0 T si_fini +ffffffff81d22ad0 T si_get_gpu_clock_counter +ffffffff81d22b90 T si_set_uvd_clocks +ffffffff81d230f0 T si_set_vce_clocks +ffffffff81d23630 t si_vce_send_vcepll_ctlreq +ffffffff81d23870 t dce6_latency_watermark +ffffffff81d23ab0 t si_rlc_stop +ffffffff81d23c60 t si_vm_reg_valid +ffffffff81d23dc0 t si_vm_packet3_cp_dma_check +ffffffff81d23f30 t si_uvd_start +ffffffff81d23fe0 t si_vce_start +ffffffff81d240f0 t si_irq_init +ffffffff81d24bd0 t si_cp_load_microcode +ffffffff81d24fb0 t si_cp_resume +ffffffff81d25e70 t si_uvd_resume +ffffffff81d25f40 t si_vce_resume +ffffffff81d26030 t pcie_capability_set_word +ffffffff81d26140 t pcie_capability_read_word +ffffffff81d261e0 t pcie_capability_clear_and_set_word +ffffffff81d26300 t pcie_capability_write_word +ffffffff81d263c0 t si_update_cg +ffffffff81d26930 t si_enable_mgcg +ffffffff81d26d50 t si_enable_cgcg +ffffffff81d270e0 t request_firmware +ffffffff81d27170 t release_firmware +ffffffff81d28000 T si_dma_is_lockup +ffffffff81d28080 T si_dma_vm_copy_pages +ffffffff81d28170 T si_dma_vm_write_pages +ffffffff81d282d0 T si_dma_vm_set_pages +ffffffff81d28440 T si_dma_vm_flush +ffffffff81d288b0 T si_copy_dma +ffffffff81d29000 T si_dpm_force_performance_level +ffffffff81d29160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81d291c0 T si_get_mclk_frequency_ratio +ffffffff81d29240 T si_trim_voltage_table_to_fit_state_table +ffffffff81d29350 T si_dpm_setup_asic +ffffffff81d29520 T si_fan_ctrl_get_fan_speed_percent +ffffffff81d295b0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81d29670 T si_fan_ctrl_set_mode +ffffffff81d298c0 T si_fan_ctrl_get_mode +ffffffff81d29910 T si_dpm_enable +ffffffff81d2ac90 t si_init_smc_table +ffffffff81d2bea0 t si_init_smc_spll_table +ffffffff81d2c020 t si_init_arb_table_index +ffffffff81d2c0b0 t si_populate_mc_reg_table +ffffffff81d2c500 t si_initialize_smc_cac_tables +ffffffff81d2e150 t si_initialize_hardware_cac_manager +ffffffff81d2e200 t si_initialize_smc_dte_tables +ffffffff81d2e400 t si_populate_smc_tdp_limits +ffffffff81d2e600 t si_populate_smc_tdp_limits_2 +ffffffff81d2e6d0 t si_program_response_times +ffffffff81d2e7f0 t si_program_ds_registers +ffffffff81d2e880 t si_dpm_start_smc +ffffffff81d2e8b0 t si_enable_auto_throttle_source +ffffffff81d2ea40 t si_thermal_start_thermal_controller +ffffffff81d2ef00 T si_dpm_late_enable +ffffffff81d2f050 T si_dpm_disable +ffffffff81d2f3d0 t si_enable_power_containment +ffffffff81d2f4a0 t si_enable_smc_cac +ffffffff81d2f600 T si_dpm_pre_set_power_state +ffffffff81d30170 T si_dpm_set_power_state +ffffffff81d306d0 t si_halt_smc +ffffffff81d30730 t si_upload_sw_state +ffffffff81d31130 t si_upload_smc_data +ffffffff81d31270 t si_upload_ulv_state +ffffffff81d313b0 t si_upload_mc_reg_table +ffffffff81d31550 t si_set_pcie_lane_width_in_smc +ffffffff81d315f0 t si_resume_smc +ffffffff81d31650 t si_set_vce_clock +ffffffff81d316f0 t si_notify_link_speed_change_after_state_change +ffffffff81d31820 t si_set_power_state_conditionally_enable_ulv +ffffffff81d31900 t si_power_control_set_level +ffffffff81d31a90 T si_dpm_post_set_power_state +ffffffff81d31ac0 T si_dpm_display_configuration_changed +ffffffff81d31ba0 T si_dpm_init +ffffffff81d335e0 T si_dpm_fini +ffffffff81d33690 T si_dpm_debugfs_print_current_performance_level +ffffffff81d336e0 T si_dpm_get_current_sclk +ffffffff81d33750 T si_dpm_get_current_mclk +ffffffff81d337c0 t si_do_program_memory_timing_parameters +ffffffff81d33950 t si_populate_mvdd_value +ffffffff81d339d0 t si_convert_power_level_to_smc +ffffffff81d34280 t si_calculate_sclk_params +ffffffff81d344b0 t si_program_cac_config_registers +ffffffff81d35000 T si_copy_bytes_to_smc +ffffffff81d35240 T si_start_smc +ffffffff81d35280 T si_reset_smc +ffffffff81d352c0 T si_program_jump_on_start +ffffffff81d352f0 T si_stop_smc_clock +ffffffff81d35330 T si_start_smc_clock +ffffffff81d35370 T si_is_smc_running +ffffffff81d353d0 T si_send_msg_to_smc +ffffffff81d354a0 T si_wait_for_smc_inactive +ffffffff81d35540 T si_load_smc_ucode +ffffffff81d356e0 T si_read_smc_sram_dword +ffffffff81d357b0 T si_write_smc_sram_dword +ffffffff81d36000 T sumo_get_pi +ffffffff81d36030 T sumo_gfx_clockgating_initialize +ffffffff81d36110 T sumo_program_vc +ffffffff81d36150 T sumo_clear_vc +ffffffff81d36190 T sumo_program_sstp +ffffffff81d36210 T sumo_take_smu_control +ffffffff81d36240 T sumo_get_sleep_divider_from_id +ffffffff81d36270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d36320 T sumo_dpm_enable +ffffffff81d369b0 T sumo_dpm_late_enable +ffffffff81d36f70 T sumo_dpm_disable +ffffffff81d372c0 T sumo_dpm_pre_set_power_state +ffffffff81d377b0 T sumo_dpm_set_power_state +ffffffff81d38260 T sumo_dpm_post_set_power_state +ffffffff81d38300 T sumo_dpm_setup_asic +ffffffff81d38400 T sumo_dpm_display_configuration_changed +ffffffff81d38430 T sumo_convert_vid2_to_vid7 +ffffffff81d38480 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d38540 T sumo_construct_vid_mapping_table +ffffffff81d386b0 T sumo_dpm_init +ffffffff81d38f60 T sumo_dpm_print_power_state +ffffffff81d39080 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d390b0 T sumo_dpm_get_current_sclk +ffffffff81d39120 T sumo_dpm_get_current_mclk +ffffffff81d39150 T sumo_dpm_get_current_vddc +ffffffff81d39220 T sumo_dpm_fini +ffffffff81d392b0 T sumo_dpm_get_sclk +ffffffff81d39300 T sumo_dpm_get_mclk +ffffffff81d39330 T sumo_dpm_force_performance_level +ffffffff81d39720 t sumo_power_level_enable +ffffffff81d39950 t sumo_program_power_level +ffffffff81d3a000 T sumo_initialize_m3_arb +ffffffff81d3a2c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d3a360 t sumo_send_msg_to_smu +ffffffff81d3a4f0 T sumo_smu_pg_init +ffffffff81d3a510 T sumo_enable_boost_timer +ffffffff81d3a640 T sumo_set_tdp_limit +ffffffff81d3a6c0 T sumo_boost_state_enable +ffffffff81d3a710 T sumo_get_running_fw_version +ffffffff81d3b000 T trinity_dpm_enable_bapm +ffffffff81d3b080 T trinity_dpm_enable +ffffffff81d3b520 T trinity_dpm_late_enable +ffffffff81d3ba60 T trinity_dpm_disable +ffffffff81d3be50 T trinity_dpm_force_performance_level +ffffffff81d3bf00 T trinity_dpm_pre_set_power_state +ffffffff81d3c4c0 T trinity_dpm_set_power_state +ffffffff81d3ca30 T trinity_dpm_post_set_power_state +ffffffff81d3cad0 T trinity_dpm_setup_asic +ffffffff81d3cb30 T trinity_dpm_display_configuration_changed +ffffffff81d3cbc0 T trinity_dpm_init +ffffffff81d3d4a0 T trinity_dpm_print_power_state +ffffffff81d3d5b0 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d3d640 T trinity_dpm_get_current_sclk +ffffffff81d3d6a0 T trinity_dpm_get_current_mclk +ffffffff81d3d6d0 T trinity_dpm_fini +ffffffff81d3d770 T trinity_dpm_get_sclk +ffffffff81d3d7c0 T trinity_dpm_get_mclk +ffffffff81d3d7f0 t trinity_program_power_level +ffffffff81d3e000 T trinity_dpm_bapm_enable +ffffffff81d3e150 T trinity_dpm_config +ffffffff81d3e230 T trinity_dpm_force_state +ffffffff81d3e310 T trinity_dpm_n_levels_disabled +ffffffff81d3e3f0 T trinity_uvd_dpm_config +ffffffff81d3e4c0 T trinity_dpm_no_forced_level +ffffffff81d3e590 T trinity_dce_enable_voltage_adjustment +ffffffff81d3e6e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d3e7b0 T trinity_acquire_mutex +ffffffff81d3e840 T trinity_release_mutex +ffffffff81d3f000 T uvd_v1_0_get_rptr +ffffffff81d3f040 T uvd_v1_0_get_wptr +ffffffff81d3f080 T uvd_v1_0_set_wptr +ffffffff81d3f0c0 T uvd_v1_0_fence_emit +ffffffff81d3f4b0 T uvd_v1_0_resume +ffffffff81d3f610 T uvd_v1_0_init +ffffffff81d3fb90 T uvd_v1_0_start +ffffffff81d40310 T uvd_v1_0_fini +ffffffff81d40480 T uvd_v1_0_stop +ffffffff81d405f0 T uvd_v1_0_ring_test +ffffffff81d407c0 T uvd_v1_0_semaphore_emit +ffffffff81d407f0 T uvd_v1_0_ib_execute +ffffffff81d40980 T uvd_v1_0_ib_test +ffffffff81d41000 T uvd_v2_2_fence_emit +ffffffff81d41450 T uvd_v2_2_semaphore_emit +ffffffff81d41650 T uvd_v2_2_resume +ffffffff81d42000 T uvd_v3_1_semaphore_emit +ffffffff81d43000 T uvd_v4_2_resume +ffffffff81d44000 T vce_v1_0_get_rptr +ffffffff81d44090 T vce_v1_0_get_wptr +ffffffff81d44120 T vce_v1_0_set_wptr +ffffffff81d441b0 T vce_v1_0_enable_mgcg +ffffffff81d44470 T vce_v1_0_load_fw +ffffffff81d44640 T vce_v1_0_bo_size +ffffffff81d446b0 T vce_v1_0_resume +ffffffff81d45020 T vce_v1_0_start +ffffffff81d457e0 T vce_v1_0_init +ffffffff81d46000 T vce_v2_0_enable_mgcg +ffffffff81d46070 t vce_v2_0_set_dyn_cg +ffffffff81d46260 T vce_v2_0_bo_size +ffffffff81d462d0 T vce_v2_0_resume +ffffffff81d47000 T aldebaran_reset_init +ffffffff81d470c0 t aldebaran_async_reset +ffffffff81d47120 t aldebaran_get_reset_handler +ffffffff81d471c0 T aldebaran_reset_fini +ffffffff81d47220 t aldebaran_mode2_prepare_hwcontext +ffffffff81d47340 t aldebaran_mode2_perform_reset +ffffffff81d47500 t aldebaran_mode2_restore_hwcontext +ffffffff81d479e0 t aldebaran_mode2_reset +ffffffff81d48000 T aldebaran_reg_base_init +ffffffff81d49000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d49040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d49070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d49180 T amdgpu_acpi_pcie_performance_request +ffffffff81d49500 T amdgpu_acpi_power_shift_control +ffffffff81d49640 T amdgpu_acpi_smart_shift_update +ffffffff81d496e0 T amdgpu_acpi_get_tmr_info +ffffffff81d49770 T amdgpu_acpi_get_mem_info +ffffffff81d49830 T amdgpu_acpi_init +ffffffff81d498e0 t amdgpu_acpi_event +ffffffff81d49bf0 T amdgpu_acpi_get_backlight_caps +ffffffff81d49c40 T amdgpu_acpi_fini +ffffffff81d49c60 T amdgpu_acpi_should_gpu_reset +ffffffff81d49cb0 T amdgpu_acpi_detect +ffffffff81d4a5f0 T amdgpu_acpi_release +ffffffff81d4b000 T amdgpu_afmt_acr +ffffffff81d4c000 T amdgpu_amdkfd_init +ffffffff81d4c040 T amdgpu_amdkfd_fini +ffffffff81d4c070 T amdgpu_amdkfd_device_probe +ffffffff81d4c0a0 T amdgpu_amdkfd_device_init +ffffffff81d4c260 t amdgpu_amdkfd_reset_work +ffffffff81d4c2e0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d4c330 T amdgpu_amdkfd_interrupt +ffffffff81d4c360 T amdgpu_amdkfd_suspend +ffffffff81d4c390 T amdgpu_amdkfd_resume +ffffffff81d4c3c0 T amdgpu_amdkfd_pre_reset +ffffffff81d4c3f0 T amdgpu_amdkfd_post_reset +ffffffff81d4c420 T amdgpu_amdkfd_gpu_reset +ffffffff81d4c480 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d4c730 t amdgpu_bo_reserve +ffffffff81d4c890 t amdgpu_bo_unreserve +ffffffff81d4c970 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d4c9e0 T amdgpu_amdkfd_alloc_gws +ffffffff81d4cac0 T amdgpu_amdkfd_free_gws +ffffffff81d4cb00 T amdgpu_amdkfd_get_fw_version +ffffffff81d4cbb0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d4cd50 T amdgpu_amdkfd_xcp_memory_size +ffffffff81d4cdf0 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d4ce30 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d4ce90 T amdgpu_amdkfd_get_cu_info +ffffffff81d4cfa0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d4d0f0 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d4d160 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d4d1f0 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d4d350 T amdgpu_amdkfd_submit_ib +ffffffff81d4d4b0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d4d500 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d4d540 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d4d670 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d4d6b0 T amdgpu_amdkfd_have_atomics_support +ffffffff81d4d6e0 T amdgpu_amdkfd_debug_mem_fence +ffffffff81d4d700 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d4d710 T amdgpu_amdkfd_send_close_event_drain_irq +ffffffff81d4d730 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d4d780 T amdgpu_amdkfd_check_and_lock_kfd +ffffffff81d4d7b0 T amdgpu_amdkfd_unlock_kfd +ffffffff81d4d7e0 T amdgpu_amdkfd_unmap_hiq +ffffffff81d4e000 T amdgpu_atom_execute_table +ffffffff81d4e0a0 t amdgpu_atom_execute_table_locked +ffffffff81d4e3c0 T amdgpu_atom_parse +ffffffff81d4e910 T amdgpu_atom_destroy +ffffffff81d4e950 T amdgpu_atom_asic_init +ffffffff81d4ea70 t get_u32 +ffffffff81d4ead0 T amdgpu_atom_parse_data_header +ffffffff81d4eb70 T amdgpu_atom_parse_cmd_header +ffffffff81d4ebf0 t atom_op_move +ffffffff81d4edc0 t atom_op_and +ffffffff81d4efa0 t atom_op_or +ffffffff81d4f180 t atom_op_shift_left +ffffffff81d4f360 t atom_op_shift_right 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psp_xgmi_get_node_id +ffffffff81daef30 T psp_xgmi_get_topology_info +ffffffff81daf340 T psp_xgmi_set_topology_info +ffffffff81daf480 T psp_ras_invoke +ffffffff81daf710 T psp_ras_enable_features +ffffffff81daf7c0 T psp_ras_terminate +ffffffff81daf890 T psp_ras_initialize +ffffffff81dafcc0 T psp_ras_trigger_error +ffffffff81dafe00 T psp_hdcp_invoke +ffffffff81dafec0 T psp_dtm_invoke +ffffffff81daff80 T psp_rap_invoke +ffffffff81db0110 T psp_securedisplay_invoke +ffffffff81db01e0 T amdgpu_psp_wait_for_bootloader +ffffffff81db0240 T psp_execute_ip_fw_load +ffffffff81db0330 T psp_load_fw_list +ffffffff81db03c0 t psp_print_fw_hdr +ffffffff81db0490 T psp_gpu_reset +ffffffff81db0520 T psp_rlc_autoload_start +ffffffff81db05b0 T psp_ring_cmd_submit +ffffffff81db0740 T psp_init_asd_microcode +ffffffff81db0810 T psp_init_toc_microcode +ffffffff81db08e0 T psp_init_sos_microcode +ffffffff81db0ef0 T psp_init_ta_microcode +ffffffff81db12f0 T psp_init_cap_microcode +ffffffff81db1490 T is_psp_fw_valid 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amdgpu_ras_find_obj +ffffffff81db72e0 T amdgpu_ras_feature_enable +ffffffff81db7520 T amdgpu_ras_is_poison_mode_supported +ffffffff81db7570 t __amdgpu_ras_feature_enable +ffffffff81db7780 T amdgpu_ras_feature_enable_on_boot +ffffffff81db7870 T amdgpu_ras_query_error_status +ffffffff81db7b00 T amdgpu_ras_reset_error_status +ffffffff81db7c40 T amdgpu_ras_is_supported +ffffffff81db7d90 T amdgpu_ras_error_inject +ffffffff81db8060 T amdgpu_ras_query_error_count +ffffffff81db82c0 T amdgpu_ras_sysfs_create +ffffffff81db8330 T amdgpu_ras_sysfs_remove +ffffffff81db83f0 T amdgpu_ras_interrupt_fatal_error_handler +ffffffff81db8470 T amdgpu_ras_interrupt_dispatch +ffffffff81db8540 T amdgpu_ras_interrupt_remove_handler +ffffffff81db86c0 T amdgpu_ras_interrupt_add_handler +ffffffff81db8970 t amdgpu_ras_interrupt_process_handler +ffffffff81db8c30 T amdgpu_ras_add_bad_pages +ffffffff81db8ea0 T amdgpu_ras_save_bad_pages +ffffffff81db8fe0 T amdgpu_ras_recovery_init +ffffffff81db9230 t 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amdgpu_ring_mux_ib_mark_offset +ffffffff81dc12d0 T amdgpu_mcbp_handle_trailing_fence_irq +ffffffff81dc2000 T amdgpu_gfx_rlc_enter_safe_mode +ffffffff81dc2090 T amdgpu_gfx_rlc_exit_safe_mode +ffffffff81dc2120 T amdgpu_gfx_rlc_init_sr +ffffffff81dc2280 T amdgpu_gfx_rlc_fini +ffffffff81dc2300 t amdgpu_bo_unreserve +ffffffff81dc23e0 T amdgpu_gfx_rlc_init_csb +ffffffff81dc2510 T amdgpu_gfx_rlc_init_cpt +ffffffff81dc27d0 T amdgpu_gfx_rlc_setup_cp_table +ffffffff81dc29c0 T amdgpu_gfx_rlc_init_microcode +ffffffff81dc4000 T amdgpu_sa_bo_manager_init +ffffffff81dc40e0 T amdgpu_sa_bo_manager_fini +ffffffff81dc4160 T amdgpu_sa_bo_new +ffffffff81dc41d0 T amdgpu_sa_bo_free +ffffffff81dc5000 T amdgpu_sched_ioctl +ffffffff81dc6000 T amdgpu_sdma_get_instance_from_ring +ffffffff81dc6080 T amdgpu_sdma_get_index_from_ring +ffffffff81dc6100 T amdgpu_sdma_get_csa_mc_addr +ffffffff81dc6200 T amdgpu_sdma_ras_late_init +ffffffff81dc62d0 T amdgpu_sdma_process_ras_data_cb +ffffffff81dc6320 T amdgpu_sdma_process_ecc_irq +ffffffff81dc63b0 T amdgpu_sdma_destroy_inst_ctx +ffffffff81dc6430 T amdgpu_sdma_init_microcode +ffffffff81dc67c0 T amdgpu_sdma_unset_buffer_funcs_helper +ffffffff81dc6860 T amdgpu_sdma_ras_sw_init +ffffffff81dc7000 T psp_securedisplay_parse_resp_status +ffffffff81dc71c0 T psp_prep_securedisplay_cmd_buf +ffffffff81dc7230 T amdgpu_securedisplay_debugfs_init +ffffffff81dc8000 T amdgpu_sync_create +ffffffff81dc80b0 T amdgpu_sync_fence +ffffffff81dc81e0 T amdgpu_sync_resv +ffffffff81dc83d0 T amdgpu_sync_peek_fence +ffffffff81dc8500 T amdgpu_sync_get_fence +ffffffff81dc85e0 T amdgpu_sync_clone +ffffffff81dc86e0 T amdgpu_sync_push_to_job +ffffffff81dc8800 T amdgpu_sync_wait +ffffffff81dc88d0 T amdgpu_sync_free +ffffffff81dc89b0 T amdgpu_sync_init +ffffffff81dc8a10 T amdgpu_sync_fini +ffffffff81dc9000 T amdgpu_ttm_copy_mem_to_mem +ffffffff81dc9520 t amdgpu_res_first +ffffffff81dc9700 t amdgpu_ttm_map_buffer +ffffffff81dc9af0 T amdgpu_copy_buffer +ffffffff81dc9d80 T amdgpu_ttm_domain_start +ffffffff81dc9dd0 T amdgpu_ttm_tt_set_user_pages +ffffffff81dc9e30 T amdgpu_ttm_alloc_gart +ffffffff81dca070 T amdgpu_ttm_tt_pte_flags +ffffffff81dca120 t amdgpu_ttm_gart_bind +ffffffff81dca270 T amdgpu_ttm_recover_gart +ffffffff81dca350 T amdgpu_ttm_tt_get_userptr +ffffffff81dca3a0 T amdgpu_ttm_tt_set_userptr +ffffffff81dca4d0 t amdgpu_ttm_tt_create +ffffffff81dca5c0 T amdgpu_ttm_tt_get_usermm +ffffffff81dca620 T amdgpu_ttm_tt_affect_userptr +ffffffff81dca680 T amdgpu_ttm_tt_is_userptr +ffffffff81dca6c0 T amdgpu_ttm_tt_is_readonly +ffffffff81dca700 T amdgpu_ttm_tt_pde_flags +ffffffff81dca780 T amdgpu_ttm_init +ffffffff81dcacf0 T amdgpu_ttm_set_buffer_funcs_status +ffffffff81dcae50 t amdgpu_ttm_drv_reserve_vram_init +ffffffff81dcaec0 t amdgpu_ttm_reserve_tmr +ffffffff81dcb130 T amdgpu_ttm_fini +ffffffff81dcb360 T amdgpu_fill_buffer +ffffffff81dcb840 T amdgpu_ttm_evict_resources +ffffffff81dcb8b0 T amdgpu_ttm_debugfs_init +ffffffff81dcb8e0 t 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amdgpu_ucode_hdr_version +ffffffff81dce3f0 T amdgpu_ucode_get_load_type +ffffffff81dce460 T amdgpu_ucode_name +ffffffff81dce4a0 T amdgpu_ucode_sysfs_init +ffffffff81dce4d0 T amdgpu_ucode_sysfs_fini +ffffffff81dce500 T amdgpu_ucode_create_bo +ffffffff81dce5f0 T amdgpu_ucode_free_bo +ffffffff81dce620 T amdgpu_ucode_init_bo +ffffffff81dcebe0 T amdgpu_ucode_ip_version_decode +ffffffff81dcf5a0 T amdgpu_ucode_request +ffffffff81dcf640 T amdgpu_ucode_release +ffffffff81dd0000 T amdgpu_umc_page_retirement_mca +ffffffff81dd0170 T amdgpu_umc_poison_handler +ffffffff81dd02e0 t amdgpu_umc_do_page_retirement +ffffffff81dd0530 T amdgpu_umc_process_ras_data_cb +ffffffff81dd0570 T amdgpu_umc_ras_sw_init +ffffffff81dd0670 T amdgpu_umc_ras_late_init +ffffffff81dd0720 T amdgpu_umc_process_ecc_irq +ffffffff81dd07b0 T amdgpu_umc_fill_error_record +ffffffff81dd0850 T amdgpu_umc_loop_channels +ffffffff81dd1000 T amdgpu_uvd_sw_init +ffffffff81dd13c0 t amdgpu_uvd_idle_work_handler +ffffffff81dd1560 t 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amdgpu_vce_suspend +ffffffff81dd46f0 T amdgpu_vce_resume +ffffffff81dd4970 t amdgpu_bo_unreserve +ffffffff81dd4a50 T amdgpu_vce_ring_begin_use +ffffffff81dd4b60 T amdgpu_vce_ring_end_use +ffffffff81dd4be0 T amdgpu_vce_free_handles +ffffffff81dd4ca0 t amdgpu_vce_get_destroy_msg +ffffffff81dd4f20 T amdgpu_vce_ring_parse_cs +ffffffff81dd5730 t amdgpu_vce_validate_bo +ffffffff81dd58b0 t amdgpu_vce_validate_handle +ffffffff81dd5bd0 t amdgpu_vce_cs_reloc +ffffffff81dd5d20 T amdgpu_vce_ring_parse_cs_vm +ffffffff81dd6110 T amdgpu_vce_ring_emit_ib +ffffffff81dd62c0 T amdgpu_vce_ring_emit_fence +ffffffff81dd6560 T amdgpu_vce_ring_test_ring +ffffffff81dd6690 T amdgpu_vce_ring_test_ib +ffffffff81dd6b10 T amdgpu_vce_get_ring_prio +ffffffff81dd6b50 t __delayed_work_tick +ffffffff81dd7000 T amdgpu_vcn_early_init +ffffffff81dd70b0 T amdgpu_vcn_sw_init +ffffffff81dd7590 t amdgpu_vcn_idle_work_handler +ffffffff81dd77c0 T amdgpu_vcn_sw_fini +ffffffff81dd7920 T amdgpu_vcn_is_disabled_vcn +ffffffff81dd7980 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gfx_v10_0_read_wave_data +ffffffff81e0af90 t gfx_v10_0_read_wave_vgprs +ffffffff81e0afc0 t gfx_v10_0_read_wave_sgprs +ffffffff81e0b040 t gfx_v10_0_select_me_pipe_q +ffffffff81e0b060 t gfx_v10_0_init_spm_golden_registers +ffffffff81e0b0d0 t gfx_v10_0_update_perfmon_mgcg +ffffffff81e0b200 t wave_read_ind +ffffffff81e0b2f0 t wave_read_regs +ffffffff81e0b450 t gfx10_kiq_set_resources +ffffffff81e0b770 t gfx10_kiq_map_queues +ffffffff81e0bb00 t gfx10_kiq_unmap_queues +ffffffff81e0bf00 t gfx10_kiq_query_status +ffffffff81e0c1f0 t gfx10_kiq_invalidate_tlbs +ffffffff81e0c310 t gfx_v10_0_ring_get_rptr_compute +ffffffff81e0c340 t gfx_v10_0_ring_get_wptr_compute +ffffffff81e0c3b0 t gfx_v10_0_ring_set_wptr_compute +ffffffff81e0c4f0 t gfx_v10_0_ring_emit_ib_compute +ffffffff81e0c830 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81e0cc60 t gfx_v10_0_ring_test_ring +ffffffff81e0cec0 t gfx_v10_0_ring_test_ib +ffffffff81e0d150 t gfx_v10_0_ring_emit_rreg +ffffffff81e0d3e0 t gfx_v10_0_ring_emit_wreg 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+ffffffff81e0fa90 t gfx_v10_0_write_data_to_reg +ffffffff81e0fca0 t gfx_v10_0_set_eop_interrupt_state +ffffffff81e0fd80 t gfx_v10_0_eop_irq +ffffffff81e0ff30 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81e100d0 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81e10290 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81e10580 t gfx_v10_0_kiq_irq +ffffffff81e10600 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81e10740 t gfx_v10_0_priv_reg_irq +ffffffff81e107a0 t gfx_v10_0_handle_priv_fault +ffffffff81e10900 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81e10a40 t gfx_v10_0_priv_inst_irq +ffffffff81e10aa0 t gfx_v10_0_is_rlc_enabled +ffffffff81e10b30 t gfx_v10_0_set_safe_mode +ffffffff81e10de0 t gfx_v10_0_unset_safe_mode +ffffffff81e10e90 t gfx_v10_0_rlc_init +ffffffff81e10eb0 t gfx_v10_0_get_csb_size +ffffffff81e10ee0 t gfx_v10_0_get_csb_buffer +ffffffff81e11050 t gfx_v10_0_rlc_resume +ffffffff81e11ac0 t gfx_v10_0_rlc_stop +ffffffff81e11ba0 t gfx_v10_0_rlc_reset +ffffffff81e11d50 t gfx_v10_0_rlc_start +ffffffff81e11f00 t gfx_v10_0_update_spm_vmid +ffffffff81e11f40 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81e12860 t gfx_v10_0_init_csb +ffffffff81e12b40 t gfx_v10_0_update_spm_vmid_internal +ffffffff81e12c60 t gfx_v10_0_rlc_backdoor_autoload_config_mec_cache +ffffffff81e12f30 t gfx_v10_0_is_rlcg_access_range +ffffffff81e12f60 t gfx_v10_0_gfx_mqd_init +ffffffff81e13350 t gfx_v10_0_compute_mqd_init +ffffffff81e13800 t gfx_v10_0_mec_init +ffffffff81e13a10 t gfx_v10_0_compute_ring_init +ffffffff81e13b50 t gfx_v10_0_rlc_backdoor_autoload_buffer_init +ffffffff81e13db0 t gfx_v10_0_gpu_early_init +ffffffff81e14010 t amdgpu_bo_unreserve +ffffffff81e140f0 t gfx_v10_0_cp_resume +ffffffff81e16ad0 t gfx_v10_3_get_disabled_sa +ffffffff81e16bf0 t gfx_v10_0_get_rb_active_bitmap +ffffffff81e16d20 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81e16e30 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81e16f40 t gfx_v10_0_cp_gfx_enable +ffffffff81e171b0 t gfx_v10_0_cp_compute_enable +ffffffff81e17350 t amdgpu_bo_reserve +ffffffff81e174c0 t gfx_v10_0_kiq_init_register +ffffffff81e18360 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81e18460 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81e18740 t gfx_v10_0_cp_gfx_start +ffffffff81e19130 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81e19480 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81e19bc0 t gfx_v10_0_update_3d_clock_gating +ffffffff81e19fb0 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81e1a390 t gfx_v10_cntl_pg +ffffffff81e1b000 t gfx_v11_0_early_init +ffffffff81e1b750 t gfx_v11_0_late_init +ffffffff81e1b7c0 t gfx_v11_0_sw_init +ffffffff81e1bd00 t gfx_v11_0_sw_fini +ffffffff81e1bf10 t gfx_v11_0_hw_init +ffffffff81e20390 t gfx_v11_0_hw_fini +ffffffff81e20490 t gfx_v11_0_suspend +ffffffff81e204d0 t gfx_v11_0_resume +ffffffff81e204e0 t gfx_v11_0_is_idle +ffffffff81e20570 t gfx_v11_0_wait_for_idle +ffffffff81e20670 t gfx_v11_0_check_soft_reset +ffffffff81e207a0 t gfx_v11_0_soft_reset +ffffffff81e214e0 t gfx_v11_0_post_soft_reset +ffffffff81e214f0 t gfx_v11_0_set_clockgating_state +ffffffff81e22130 t gfx_v11_0_set_powergating_state +ffffffff81e221d0 t gfx_v11_0_get_clockgating_state +ffffffff81e223a0 t gfx_v11_0_get_gpu_clock_counter +ffffffff81e22720 t gfx_v11_0_select_se_sh +ffffffff81e227c0 t gfx_v11_0_read_wave_data +ffffffff81e22a00 t gfx_v11_0_read_wave_vgprs +ffffffff81e22a30 t gfx_v11_0_read_wave_sgprs +ffffffff81e22ab0 t gfx_v11_0_select_me_pipe_q +ffffffff81e22ad0 t gfx_v11_0_update_perf_clk +ffffffff81e22c00 t gfx_v11_0_get_gfx_shadow_info +ffffffff81e22c70 t wave_read_ind +ffffffff81e22d60 t wave_read_regs +ffffffff81e22ec0 t gfx11_kiq_set_resources +ffffffff81e231e0 t gfx11_kiq_map_queues +ffffffff81e23570 t gfx11_kiq_unmap_queues +ffffffff81e23970 t gfx11_kiq_query_status +ffffffff81e23c60 t gfx11_kiq_invalidate_tlbs +ffffffff81e23d80 t gfx_v11_0_ring_get_rptr_compute +ffffffff81e23db0 t gfx_v11_0_ring_get_wptr_compute +ffffffff81e23e20 t gfx_v11_0_ring_set_wptr_compute +ffffffff81e23f60 t gfx_v11_0_ring_emit_ib_compute +ffffffff81e242a0 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81e246d0 t gfx_v11_0_ring_test_ring +ffffffff81e24950 t gfx_v11_0_ring_test_ib +ffffffff81e24bf0 t gfx_v11_0_ring_emit_rreg +ffffffff81e24e80 t gfx_v11_0_ring_emit_wreg +ffffffff81e250b0 t gfx_v11_0_ring_emit_reg_wait +ffffffff81e25100 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81e25170 t gfx_v11_0_wait_reg_mem +ffffffff81e254a0 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81e254d0 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81e255e0 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81e25800 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81e25e90 t gfx_v11_0_ring_emit_fence +ffffffff81e26260 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81e262c0 t gfx_v11_0_ring_emit_vm_flush +ffffffff81e26490 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81e26560 t gfx_v11_0_ring_emit_gds_switch +ffffffff81e26640 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81e26870 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81e26930 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81e26a90 t gfx_v11_0_ring_emit_gfx_shadow +ffffffff81e26e50 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81e26f60 t gfx_v11_0_ring_soft_recovery +ffffffff81e26fd0 t gfx_v11_0_ring_preempt_ib +ffffffff81e27140 t gfx_v11_0_emit_mem_sync +ffffffff81e27470 t gfx_v11_0_write_data_to_reg +ffffffff81e27680 t gfx_v11_0_set_eop_interrupt_state +ffffffff81e27710 t gfx_v11_0_eop_irq +ffffffff81e278c0 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81e27a60 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81e27bf0 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81e27d30 t gfx_v11_0_priv_reg_irq +ffffffff81e27d90 t gfx_v11_0_handle_priv_fault +ffffffff81e27ef0 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81e28030 t gfx_v11_0_priv_inst_irq +ffffffff81e28090 t gfx_v11_0_rlc_gc_fed_irq +ffffffff81e280e0 t gfx_v11_0_is_rlc_enabled +ffffffff81e28170 t gfx_v11_0_set_safe_mode +ffffffff81e282d0 t gfx_v11_0_unset_safe_mode +ffffffff81e28340 t gfx_v11_0_rlc_init +ffffffff81e283c0 t gfx_v11_0_get_csb_size +ffffffff81e283f0 t gfx_v11_0_get_csb_buffer +ffffffff81e28560 t gfx_v11_0_rlc_resume +ffffffff81e292c0 t gfx_v11_0_rlc_stop +ffffffff81e293a0 t gfx_v11_0_rlc_reset +ffffffff81e29550 t gfx_v11_0_rlc_start +ffffffff81e29700 t gfx_v11_0_update_spm_vmid +ffffffff81e29800 t gfx_v11_0_init_csb +ffffffff81e29990 t gfx_v11_0_gfx_mqd_init +ffffffff81e29d70 t gfx_v11_0_compute_mqd_init +ffffffff81e2a2a0 t gfx_v11_0_mec_init +ffffffff81e2a3e0 t gfx_v11_0_compute_ring_init +ffffffff81e2a520 t gfx_v11_0_rlc_autoload_buffer_init +ffffffff81e2a710 t gfx_v11_0_gpu_early_init +ffffffff81e2a7e0 t amdgpu_bo_unreserve +ffffffff81e2a8c0 t gfx_v11_0_disable_gpa_mode +ffffffff81e2aa60 t gfx_v11_0_cp_resume +ffffffff81e2e860 t gfx_v11_0_config_me_cache +ffffffff81e2ec20 t gfx_v11_0_config_pfp_cache +ffffffff81e2efe0 t gfx_v11_0_config_mec_cache +ffffffff81e2f3a0 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81e2f4b0 t gfx_v11_0_cp_compute_enable +ffffffff81e2f690 t gfx_v11_0_cp_gfx_enable +ffffffff81e2f8a0 t amdgpu_bo_reserve +ffffffff81e2fa10 t gfx_v11_0_kiq_init_register +ffffffff81e308b0 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81e30990 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81e30b70 t gfx_v11_0_cp_gfx_start +ffffffff81e313f0 t gfx_v11_cntl_pg +ffffffff81e32000 t gfx_v11_0_3_rlc_gc_fed_irq +ffffffff81e32200 t gfx_v11_0_3_poison_consumption_handler +ffffffff81e33000 t gfx_v8_0_early_init +ffffffff81e332f0 t gfx_v8_0_late_init +ffffffff81e33a10 t gfx_v8_0_sw_init +ffffffff81e33dd0 t gfx_v8_0_sw_fini +ffffffff81e33f70 t gfx_v8_0_hw_init +ffffffff81e36110 t gfx_v8_0_hw_fini +ffffffff81e365c0 t gfx_v8_0_suspend +ffffffff81e36600 t gfx_v8_0_resume +ffffffff81e36610 t gfx_v8_0_is_idle +ffffffff81e36680 t gfx_v8_0_wait_for_idle +ffffffff81e36730 t gfx_v8_0_check_soft_reset +ffffffff81e36810 t gfx_v8_0_pre_soft_reset +ffffffff81e36970 t gfx_v8_0_soft_reset +ffffffff81e36b30 t gfx_v8_0_post_soft_reset +ffffffff81e36cb0 t gfx_v8_0_set_clockgating_state +ffffffff81e36f30 t gfx_v8_0_set_powergating_state +ffffffff81e372e0 t gfx_v8_0_get_clockgating_state +ffffffff81e373c0 t gfx_v8_0_get_gpu_clock_counter +ffffffff81e37460 t gfx_v8_0_select_se_sh +ffffffff81e374c0 t gfx_v8_0_read_wave_data +ffffffff81e37960 t gfx_v8_0_read_wave_sgprs +ffffffff81e37a10 t gfx_v8_0_select_me_pipe_q +ffffffff81e37a30 t gfx_v8_0_ring_get_rptr +ffffffff81e37a60 t gfx_v8_0_ring_get_wptr_compute +ffffffff81e37a90 t gfx_v8_0_ring_set_wptr_compute +ffffffff81e37ad0 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81e37ef0 t gfx_v8_0_ring_test_ring +ffffffff81e380f0 t gfx_v8_0_ring_emit_rreg +ffffffff81e38380 t gfx_v8_0_ring_emit_wreg +ffffffff81e385b0 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81e38610 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81e38680 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81e38be0 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81e390d0 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81e393c0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81e39770 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81e39a90 t gfx_v8_0_ring_emit_gds_switch +ffffffff81e3a240 t gfx_v8_0_ring_test_ib +ffffffff81e3a3f0 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81e3a620 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81e3a6d0 t gfx_v8_ring_emit_sb +ffffffff81e3a7c0 t gfx_v8_ring_emit_cntxcntl +ffffffff81e3ad60 t gfx_v8_0_ring_soft_recovery +ffffffff81e3ad90 t gfx_v8_0_emit_mem_sync +ffffffff81e3af90 t gfx_v8_0_ring_emit_ib_compute +ffffffff81e3b290 t gfx_v8_0_ring_emit_fence_compute +ffffffff81e3b590 t gfx_v8_0_emit_mem_sync_compute +ffffffff81e3b850 t gfx_v8_0_emit_wave_limit +ffffffff81e3ba00 t gfx_v8_0_set_eop_interrupt_state +ffffffff81e3bc10 t gfx_v8_0_eop_irq +ffffffff81e3bd20 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81e3bda0 t gfx_v8_0_priv_reg_irq +ffffffff81e3bea0 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81e3bf20 t gfx_v8_0_priv_inst_irq +ffffffff81e3c020 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81e3c280 t gfx_v8_0_cp_ecc_error_irq +ffffffff81e3c2d0 t gfx_v8_0_set_sq_int_state +ffffffff81e3c360 t gfx_v8_0_sq_irq +ffffffff81e3c3d0 t gfx_v8_0_parse_sq_irq +ffffffff81e3c620 t gfx_v8_0_is_rlc_enabled +ffffffff81e3c660 t gfx_v8_0_set_safe_mode +ffffffff81e3c760 t gfx_v8_0_unset_safe_mode +ffffffff81e3c800 t gfx_v8_0_rlc_init +ffffffff81e3c8b0 t gfx_v8_0_get_csb_size +ffffffff81e3c8e0 t gfx_v8_0_get_csb_buffer +ffffffff81e3ca50 t gfx_v8_0_cp_jump_table_num +ffffffff81e3ca90 t gfx_v8_0_rlc_resume +ffffffff81e3ce10 t gfx_v8_0_rlc_stop +ffffffff81e3ce80 t gfx_v8_0_rlc_reset +ffffffff81e3cf00 t gfx_v8_0_rlc_start +ffffffff81e3cf80 t gfx_v8_0_update_spm_vmid +ffffffff81e3cff0 t gfx_v8_0_init_save_restore_list +ffffffff81e3d400 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81e3d620 t gfx_v8_0_sq_irq_work_func +ffffffff81e3d640 t gfx_v8_0_init_microcode +ffffffff81e3deb0 t gfx_v8_0_mec_init +ffffffff81e3dfb0 t gfx_v8_0_compute_ring_init +ffffffff81e3e0e0 t gfx_v8_0_gpu_early_init +ffffffff81e3e580 t amdgpu_bo_unreserve +ffffffff81e3e660 t gfx_v8_0_kiq_resume +ffffffff81e3e910 t gfx_v8_0_cp_gfx_resume +ffffffff81e3f3d0 t gfx_v8_0_kcq_resume +ffffffff81e3fd90 t amdgpu_bo_reserve +ffffffff81e3ff00 t gfx_v8_0_mqd_commit +ffffffff81e400e0 t gfx_v8_0_mqd_init +ffffffff81e40500 t gfx_v8_0_deactivate_hqd +ffffffff81e405c0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e40900 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e41000 t gfx_v9_0_ras_error_inject +ffffffff81e411b0 t gfx_v9_0_query_ras_error_count +ffffffff81e41d80 t gfx_v9_0_reset_ras_error_count +ffffffff81e427b0 T gfx_v9_0_select_se_sh +ffffffff81e42850 t gfx_v9_0_early_init +ffffffff81e43380 t gfx_v9_0_late_init +ffffffff81e44270 t gfx_v9_0_sw_init +ffffffff81e44920 t gfx_v9_0_sw_fini +ffffffff81e44ae0 t gfx_v9_0_hw_init +ffffffff81e47a90 t gfx_v9_0_hw_fini +ffffffff81e48240 t gfx_v9_0_suspend +ffffffff81e48280 t gfx_v9_0_resume +ffffffff81e48290 t gfx_v9_0_is_idle +ffffffff81e48310 t gfx_v9_0_wait_for_idle +ffffffff81e48400 t gfx_v9_0_soft_reset +ffffffff81e487a0 t gfx_v9_0_set_clockgating_state +ffffffff81e48870 t gfx_v9_0_set_powergating_state +ffffffff81e48c60 t gfx_v9_0_get_clockgating_state +ffffffff81e48d70 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e49500 t gfx_v9_0_read_wave_data +ffffffff81e49740 t gfx_v9_0_read_wave_vgprs +ffffffff81e497a0 t gfx_v9_0_read_wave_sgprs +ffffffff81e497d0 t gfx_v9_0_select_me_pipe_q +ffffffff81e497f0 t wave_read_ind +ffffffff81e498e0 t wave_read_regs +ffffffff81e49a30 t gfx_v9_0_kiq_set_resources +ffffffff81e49d50 t gfx_v9_0_kiq_map_queues +ffffffff81e4a090 t gfx_v9_0_kiq_unmap_queues +ffffffff81e4a3c0 t gfx_v9_0_kiq_query_status +ffffffff81e4a6b0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e4a7d0 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e4a800 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e4a870 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e4a8d0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e4ad00 t gfx_v9_0_ring_test_ring +ffffffff81e4af30 t gfx_v9_0_ring_emit_rreg +ffffffff81e4b1c0 t gfx_v9_0_ring_emit_wreg +ffffffff81e4b3f0 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e4b440 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e4b4e0 t gfx_v9_0_wait_reg_mem +ffffffff81e4b810 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e4b840 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e4b950 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e4ba80 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e4c100 t gfx_v9_0_ring_emit_fence +ffffffff81e4c4c0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e4c520 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e4c630 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e4c700 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e4c7e0 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e4ca10 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e4cad0 t gfx_v9_ring_emit_sb +ffffffff81e4cbc0 t gfx_v9_ring_emit_cntxcntl +ffffffff81e4d0a0 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e4d1b0 t gfx_v9_0_ring_soft_recovery +ffffffff81e4d220 t gfx_v9_0_ring_preempt_ib +ffffffff81e4d3e0 t gfx_v9_0_emit_mem_sync +ffffffff81e4d6a0 t gfx_v9_0_write_data_to_reg +ffffffff81e4d8b0 t gfx_v9_0_ring_test_ib +ffffffff81e4da60 t gfx_v9_0_ring_patch_cntl +ffffffff81e4daa0 t gfx_v9_0_ring_patch_ce_meta +ffffffff81e4dba0 t gfx_v9_0_ring_patch_de_meta +ffffffff81e4dc70 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e4dfa0 t gfx_v9_0_emit_wave_limit +ffffffff81e4e180 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e4e360 t gfx_v9_0_eop_irq +ffffffff81e4e4a0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e4e660 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e4e7a0 t gfx_v9_0_priv_reg_irq +ffffffff81e4e8a0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e4e9e0 t gfx_v9_0_priv_inst_irq +ffffffff81e4eae0 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e4f370 t gfx_v9_0_is_rlc_enabled +ffffffff81e4f400 t gfx_v9_0_set_safe_mode +ffffffff81e4f560 t gfx_v9_0_unset_safe_mode +ffffffff81e4f5d0 t gfx_v9_0_rlc_init +ffffffff81e4f640 t gfx_v9_0_get_csb_size +ffffffff81e4f670 t gfx_v9_0_get_csb_buffer +ffffffff81e4f7b0 t gfx_v9_0_cp_jump_table_num +ffffffff81e4f800 t gfx_v9_0_rlc_resume +ffffffff81e50f10 t gfx_v9_0_rlc_stop +ffffffff81e512b0 t gfx_v9_0_rlc_reset +ffffffff81e51450 t gfx_v9_0_rlc_start +ffffffff81e515a0 t gfx_v9_0_update_spm_vmid +ffffffff81e515e0 t gfx_v9_0_is_rlcg_access_range +ffffffff81e51630 t gfx_v9_0_init_csb +ffffffff81e517c0 t gfx_v9_0_enable_lbpw +ffffffff81e518b0 t gfx_v9_0_update_spm_vmid_internal +ffffffff81e519d0 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e51c60 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e51d60 t gfx_v9_0_mec_init +ffffffff81e51f40 t gfx_v9_0_compute_ring_init +ffffffff81e52080 t gfx_v9_0_gpu_early_init +ffffffff81e524c0 t amdgpu_bo_unreserve +ffffffff81e525a0 t gfx_v9_0_cp_gfx_enable +ffffffff81e52690 t amdgpu_bo_reserve +ffffffff81e52800 t gfx_v9_0_kiq_init_register +ffffffff81e534e0 t gfx_v9_0_mqd_init +ffffffff81e53a30 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e53f60 t gfx_v9_0_update_3d_clock_gating +ffffffff81e54350 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e55000 t gfx_v9_4_query_ras_error_count +ffffffff81e55e00 t gfx_v9_4_query_ras_error_status +ffffffff81e55fd0 t gfx_v9_4_reset_ras_error_count +ffffffff81e57000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e57720 T gfx_v9_4_2_init_golden_registers +ffffffff81e577b0 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e57890 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e57a70 t gfx_v9_4_2_query_ras_error_count +ffffffff81e57b20 t gfx_v9_4_2_query_ras_error_status +ffffffff81e58380 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e583e0 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e588b0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e58ad0 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e58b50 t gfx_v9_4_2_run_shader +ffffffff81e58f50 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e595a0 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e598e0 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e59ac0 t wave_read_ind +ffffffff81e5a000 t gfx_v9_4_3_xcp_suspend +ffffffff81e5a0a0 t gfx_v9_4_3_xcp_resume +ffffffff81e5a1e0 t gfx_v9_4_3_query_ras_error_count +ffffffff81e5a200 t gfx_v9_4_3_query_ras_error_status +ffffffff81e5a220 t gfx_v9_4_3_reset_ras_error_count +ffffffff81e5a240 t gfx_v9_4_3_reset_ras_error_status +ffffffff81e5a260 t gfx_v9_4_3_enable_watchdog_timer +ffffffff81e5a280 t gfx_v9_4_3_early_init +ffffffff81e5a940 t gfx_v9_4_3_late_init +ffffffff81e5a9c0 t gfx_v9_4_3_sw_init +ffffffff81e5ae20 t gfx_v9_4_3_sw_fini +ffffffff81e5afd0 t gfx_v9_4_3_hw_init +ffffffff81e5ba70 t gfx_v9_4_3_hw_fini +ffffffff81e5bb30 t gfx_v9_4_3_suspend +ffffffff81e5bbf0 t gfx_v9_4_3_resume +ffffffff81e5bc00 t gfx_v9_4_3_is_idle +ffffffff81e5bdb0 t gfx_v9_4_3_wait_for_idle +ffffffff81e5be40 t gfx_v9_4_3_soft_reset +ffffffff81e5c550 t gfx_v9_4_3_set_clockgating_state +ffffffff81e5c6b0 t gfx_v9_4_3_set_powergating_state +ffffffff81e5c6e0 t gfx_v9_4_3_get_clockgating_state +ffffffff81e5c850 t gfx_v9_4_3_kiq_set_resources +ffffffff81e5cb70 t gfx_v9_4_3_kiq_map_queues +ffffffff81e5ced0 t gfx_v9_4_3_kiq_unmap_queues +ffffffff81e5d250 t gfx_v9_4_3_kiq_query_status +ffffffff81e5d540 t gfx_v9_4_3_kiq_invalidate_tlbs +ffffffff81e5d660 t gfx_v9_4_3_ring_get_rptr_compute +ffffffff81e5d6a0 t gfx_v9_4_3_ring_get_wptr_compute +ffffffff81e5d710 t gfx_v9_4_3_ring_set_wptr_compute +ffffffff81e5d770 t gfx_v9_4_3_ring_emit_fence_kiq +ffffffff81e5dbc0 t gfx_v9_4_3_ring_test_ring +ffffffff81e5de20 t gfx_v9_4_3_ring_emit_rreg +ffffffff81e5e0b0 t gfx_v9_4_3_ring_emit_wreg +ffffffff81e5e2e0 t gfx_v9_4_3_ring_emit_reg_wait +ffffffff81e5e330 t gfx_v9_4_3_ring_emit_reg_write_reg_wait +ffffffff81e5e350 t gfx_v9_4_3_wait_reg_mem +ffffffff81e5e680 t gfx_v9_4_3_ring_emit_ib_compute +ffffffff81e5e9b0 t gfx_v9_4_3_ring_emit_fence +ffffffff81e5ed60 t gfx_v9_4_3_ring_emit_pipeline_sync +ffffffff81e5edc0 t gfx_v9_4_3_ring_emit_vm_flush +ffffffff81e5ede0 t gfx_v9_4_3_ring_emit_hdp_flush +ffffffff81e5eeb0 t gfx_v9_4_3_ring_emit_gds_switch +ffffffff81e5f050 t gfx_v9_4_3_ring_test_ib +ffffffff81e5f200 t gfx_v9_4_3_emit_mem_sync +ffffffff81e5f4c0 t gfx_v9_4_3_emit_wave_limit +ffffffff81e5f6b0 t gfx_v9_4_3_write_data_to_reg +ffffffff81e5f8c0 t gfx_v9_4_3_set_eop_interrupt_state +ffffffff81e5fa30 t gfx_v9_4_3_eop_irq +ffffffff81e5fbd0 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state +ffffffff81e5fd30 t gfx_v9_4_3_ih_to_xcc_inst +ffffffff81e5fe00 t gfx_v9_4_3_set_priv_reg_fault_state +ffffffff81e601e0 t gfx_v9_4_3_priv_reg_irq +ffffffff81e60240 t gfx_v9_4_3_fault +ffffffff81e603c0 t gfx_v9_4_3_set_priv_inst_fault_state +ffffffff81e607a0 t gfx_v9_4_3_priv_inst_irq +ffffffff81e60800 t gfx_v9_4_3_is_rlc_enabled +ffffffff81e60920 t gfx_v9_4_3_xcc_set_safe_mode +ffffffff81e60bc0 t gfx_v9_4_3_xcc_unset_safe_mode +ffffffff81e60ce0 t gfx_v9_4_3_rlc_init +ffffffff81e60d30 t gfx_v9_4_3_rlc_resume +ffffffff81e60df0 t gfx_v9_4_3_rlc_stop +ffffffff81e60e90 t gfx_v9_4_3_rlc_reset +ffffffff81e61520 t gfx_v9_4_3_rlc_start +ffffffff81e615c0 t gfx_v9_4_3_update_spm_vmid +ffffffff81e617d0 t gfx_v9_4_3_is_rlcg_access_range +ffffffff81e61880 t gfx_v9_4_3_xcc_rlc_resume +ffffffff81e620d0 t gfx_v9_4_3_xcc_rlc_stop +ffffffff81e627f0 t gfx_v9_4_3_xcc_rlc_start +ffffffff81e62b80 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt +ffffffff81e62da0 t gfx_v9_4_3_xcc_select_se_sh +ffffffff81e62fa0 t gfx_v9_4_3_mec_init +ffffffff81e63290 t gfx_v9_4_3_gpu_early_init +ffffffff81e634c0 t amdgpu_bo_unreserve +ffffffff81e635a0 t gfx_v9_4_3_get_gpu_clock_counter +ffffffff81e638e0 t gfx_v9_4_3_read_wave_data +ffffffff81e63bb0 t gfx_v9_4_3_read_wave_vgprs +ffffffff81e63bd0 t gfx_v9_4_3_read_wave_sgprs +ffffffff81e63c20 t gfx_v9_4_3_select_me_pipe_q +ffffffff81e63c90 t gfx_v9_4_3_switch_compute_partition +ffffffff81e63ff0 t wave_read_ind +ffffffff81e641f0 t wave_read_regs +ffffffff81e64480 t gfx_v9_4_3_xcc_constants_init +ffffffff81e65500 t gfx_v9_4_3_xcc_cp_resume +ffffffff81e664b0 t gfx_v9_4_3_xcc_cp_compute_enable +ffffffff81e66650 t amdgpu_bo_reserve +ffffffff81e667c0 t gfx_v9_4_3_xcc_kiq_init_register +ffffffff81e68400 t gfx_v9_4_3_xcc_mqd_init +ffffffff81e68e40 t gfx_v9_4_3_xcc_fini +ffffffff81e693e0 t gfx_v9_4_3_xcc_q_fini_register +ffffffff81e69d90 t gfx_v9_4_3_xcc_update_sram_fgcg +ffffffff81e6a000 t gfx_v9_4_3_xcc_update_repeater_fgcg +ffffffff81e6a270 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating +ffffffff81e6adc0 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating +ffffffff81e6b620 t gfx_v9_4_3_inst_query_ras_err_count +ffffffff81e6b880 t gfx_v9_4_3_inst_query_ras_err_status +ffffffff81e6c600 t gfx_v9_4_3_inst_reset_ras_err_count +ffffffff81e6c7c0 t gfx_v9_4_3_inst_reset_ras_err_status +ffffffff81e6cf40 t gfx_v9_4_3_inst_enable_watchdog_timer +ffffffff81e6e000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e6e090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e6e1d0 t gfxhub_v1_0_gart_enable +ffffffff81e6f700 t gfxhub_v1_0_gart_disable +ffffffff81e6f9a0 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e6faa0 t gfxhub_v1_0_init +ffffffff81e70000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e71000 t gfxhub_v1_2_get_mc_fb_offset +ffffffff81e71120 t gfxhub_v1_2_setup_vm_pt_regs +ffffffff81e71190 t gfxhub_v1_2_gart_enable +ffffffff81e71220 t gfxhub_v1_2_gart_disable +ffffffff81e71280 t gfxhub_v1_2_set_fault_enable_default +ffffffff81e712f0 t gfxhub_v1_2_init +ffffffff81e715f0 t gfxhub_v1_2_get_xgmi_info +ffffffff81e71860 t gfxhub_v1_2_xcp_suspend +ffffffff81e718a0 t gfxhub_v1_2_xcp_resume +ffffffff81e71910 t gfxhub_v1_2_xcc_setup_vm_pt_regs +ffffffff81e71c30 t gfxhub_v1_2_xcc_gart_enable +ffffffff81e75070 t gfxhub_v1_2_xcc_gart_disable +ffffffff81e756e0 t gfxhub_v1_2_xcc_set_fault_enable_default +ffffffff81e76000 t gfxhub_v2_0_get_fb_location +ffffffff81e76090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e76120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e76260 t gfxhub_v2_0_gart_enable +ffffffff81e77490 t gfxhub_v2_0_gart_disable +ffffffff81e776e0 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e777e0 t gfxhub_v2_0_init +ffffffff81e778b0 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e77a80 t gfxhub_v2_0_get_invalidate_req +ffffffff81e78000 t gfxhub_v2_1_get_fb_location +ffffffff81e78090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e78120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e78260 t gfxhub_v2_1_gart_enable +ffffffff81e79560 t gfxhub_v2_1_gart_disable +ffffffff81e797b0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e798d0 t gfxhub_v2_1_init +ffffffff81e799a0 t gfxhub_v2_1_get_xgmi_info +ffffffff81e79ae0 t gfxhub_v2_1_utcl2_harvest +ffffffff81e79cc0 t gfxhub_v2_1_save_regs +ffffffff81e7a730 t gfxhub_v2_1_restore_regs +ffffffff81e7b350 t gfxhub_v2_1_halt +ffffffff81e7b720 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e7b8f0 t gfxhub_v2_1_get_invalidate_req +ffffffff81e7c000 t gfxhub_v3_0_get_fb_location +ffffffff81e7c090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e7c120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e7c260 t gfxhub_v3_0_gart_enable +ffffffff81e7d560 t gfxhub_v3_0_gart_disable +ffffffff81e7d800 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e7d9d0 t gfxhub_v3_0_init +ffffffff81e7daa0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e7dc70 t gfxhub_v3_0_get_invalidate_req +ffffffff81e7e000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e7e090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e7e120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e7e260 t gfxhub_v3_0_3_gart_enable +ffffffff81e7f450 t gfxhub_v3_0_3_gart_disable +ffffffff81e7f6f0 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e7f810 t gfxhub_v3_0_3_init +ffffffff81e7f8e0 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e7fab0 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e80000 t gmc_v10_0_early_init +ffffffff81e80170 t gmc_v10_0_late_init +ffffffff81e801e0 t gmc_v10_0_sw_init +ffffffff81e805d0 t gmc_v10_0_sw_fini +ffffffff81e80620 t gmc_v10_0_hw_init +ffffffff81e80830 t gmc_v10_0_hw_fini +ffffffff81e808d0 t gmc_v10_0_suspend +ffffffff81e80970 t gmc_v10_0_resume +ffffffff81e809d0 t gmc_v10_0_is_idle +ffffffff81e80a00 t gmc_v10_0_wait_for_idle +ffffffff81e80a30 t gmc_v10_0_soft_reset +ffffffff81e80a60 t gmc_v10_0_set_clockgating_state +ffffffff81e80b10 t gmc_v10_0_set_powergating_state +ffffffff81e80b40 t gmc_v10_0_get_clockgating_state +ffffffff81e80be0 t gmc_v10_0_flush_gpu_tlb +ffffffff81e80e70 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e81120 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e812d0 t gmc_v10_0_emit_pasid_mapping +ffffffff81e81350 t gmc_v10_0_map_mtype +ffffffff81e813a0 t gmc_v10_0_get_vm_pde +ffffffff81e81490 t gmc_v10_0_get_vm_pte +ffffffff81e81570 t gmc_v10_0_get_vbios_fb_size +ffffffff81e816e0 t gmc_v10_0_flush_vm_hub +ffffffff81e81b10 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e81bb0 t gmc_v10_0_process_interrupt +ffffffff81e81e90 t gmc_v10_0_ecc_interrupt_state +ffffffff81e81ec0 t gmc_v10_0_gart_init +ffffffff81e82000 t gmc_v11_0_early_init +ffffffff81e821f0 t gmc_v11_0_late_init +ffffffff81e82260 t gmc_v11_0_sw_init +ffffffff81e82570 t gmc_v11_0_sw_fini +ffffffff81e825c0 t gmc_v11_0_hw_init +ffffffff81e82720 t gmc_v11_0_hw_fini +ffffffff81e827a0 t gmc_v11_0_suspend +ffffffff81e82820 t gmc_v11_0_resume +ffffffff81e82880 t gmc_v11_0_is_idle +ffffffff81e828b0 t gmc_v11_0_wait_for_idle +ffffffff81e828e0 t gmc_v11_0_soft_reset +ffffffff81e82910 t gmc_v11_0_set_clockgating_state +ffffffff81e82990 t gmc_v11_0_set_powergating_state +ffffffff81e829c0 t gmc_v11_0_get_clockgating_state +ffffffff81e82a00 t gmc_v11_0_flush_gpu_tlb +ffffffff81e82eb0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e83120 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e832d0 t gmc_v11_0_emit_pasid_mapping +ffffffff81e83350 t gmc_v11_0_map_mtype +ffffffff81e833a0 t gmc_v11_0_get_vm_pde +ffffffff81e834a0 t gmc_v11_0_get_vm_pte +ffffffff81e83580 t gmc_v11_0_get_vbios_fb_size +ffffffff81e836f0 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e83790 t gmc_v11_0_process_interrupt +ffffffff81e839c0 t gmc_v11_0_ecc_interrupt_state +ffffffff81e839f0 t gmc_v11_0_gart_init +ffffffff81e84000 t gmc_v7_0_early_init +ffffffff81e840a0 t gmc_v7_0_late_init +ffffffff81e840f0 t gmc_v7_0_sw_init +ffffffff81e84520 t gmc_v7_0_sw_fini +ffffffff81e845a0 t gmc_v7_0_hw_init +ffffffff81e84f10 t gmc_v7_0_hw_fini +ffffffff81e84fd0 t gmc_v7_0_suspend +ffffffff81e85010 t gmc_v7_0_resume +ffffffff81e85070 t gmc_v7_0_is_idle +ffffffff81e850c0 t gmc_v7_0_wait_for_idle +ffffffff81e85160 t gmc_v7_0_soft_reset +ffffffff81e853c0 t gmc_v7_0_set_clockgating_state +ffffffff81e85620 t gmc_v7_0_set_powergating_state +ffffffff81e85650 t gmc_v7_0_flush_gpu_tlb +ffffffff81e85680 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e85740 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e857e0 t gmc_v7_0_emit_pasid_mapping +ffffffff81e85810 t gmc_v7_0_set_prt +ffffffff81e859d0 t gmc_v7_0_get_vm_pde +ffffffff81e85a30 t gmc_v7_0_get_vm_pte +ffffffff81e85a70 t gmc_v7_0_get_vbios_fb_size +ffffffff81e85ae0 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e85bb0 t gmc_v7_0_process_interrupt +ffffffff81e85e50 t gmc_v7_0_gart_init +ffffffff81e86000 t gmc_v8_0_early_init +ffffffff81e860a0 t gmc_v8_0_late_init +ffffffff81e860f0 t gmc_v8_0_sw_init +ffffffff81e866a0 t gmc_v8_0_sw_fini +ffffffff81e86720 t gmc_v8_0_hw_init +ffffffff81e87390 t gmc_v8_0_hw_fini +ffffffff81e87450 t gmc_v8_0_suspend +ffffffff81e87490 t gmc_v8_0_resume +ffffffff81e874f0 t gmc_v8_0_is_idle +ffffffff81e87540 t gmc_v8_0_wait_for_idle +ffffffff81e875e0 t gmc_v8_0_check_soft_reset +ffffffff81e87650 t gmc_v8_0_pre_soft_reset +ffffffff81e877c0 t gmc_v8_0_soft_reset +ffffffff81e87890 t gmc_v8_0_post_soft_reset +ffffffff81e87900 t gmc_v8_0_set_clockgating_state +ffffffff81e87ec0 t gmc_v8_0_set_powergating_state +ffffffff81e87ef0 t gmc_v8_0_get_clockgating_state +ffffffff81e87f60 t gmc_v8_0_flush_gpu_tlb +ffffffff81e87f90 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e88050 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e880f0 t gmc_v8_0_emit_pasid_mapping +ffffffff81e88120 t gmc_v8_0_set_prt +ffffffff81e882e0 t gmc_v8_0_get_vm_pde +ffffffff81e88340 t gmc_v8_0_get_vm_pte +ffffffff81e88390 t gmc_v8_0_get_vbios_fb_size +ffffffff81e88400 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e884d0 t gmc_v8_0_process_interrupt +ffffffff81e88860 t gmc_v8_0_gart_init +ffffffff81e89000 T gmc_v9_0_restore_registers +ffffffff81e89160 t gmc_v9_0_early_init +ffffffff81e89510 t gmc_v9_0_late_init +ffffffff81e89620 t gmc_v9_0_sw_init +ffffffff81e89d80 t gmc_v9_0_sw_fini +ffffffff81e89e40 t gmc_v9_0_hw_init +ffffffff81e8a2f0 t gmc_v9_0_hw_fini +ffffffff81e8a3b0 t gmc_v9_0_suspend +ffffffff81e8a470 t gmc_v9_0_resume +ffffffff81e8a4d0 t gmc_v9_0_is_idle +ffffffff81e8a500 t gmc_v9_0_wait_for_idle +ffffffff81e8a530 t gmc_v9_0_soft_reset +ffffffff81e8a560 t gmc_v9_0_set_clockgating_state +ffffffff81e8a5c0 t gmc_v9_0_set_powergating_state +ffffffff81e8a5f0 t gmc_v9_0_get_clockgating_state +ffffffff81e8a630 t gmc_v9_0_flush_gpu_tlb +ffffffff81e8acd0 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e8b080 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e8b280 t gmc_v9_0_emit_pasid_mapping +ffffffff81e8b300 t gmc_v9_0_map_mtype +ffffffff81e8b340 t gmc_v9_0_get_vm_pde +ffffffff81e8b440 t gmc_v9_0_get_vm_pte +ffffffff81e8b770 t gmc_v9_0_override_vm_pte_flags +ffffffff81e8b830 t gmc_v9_0_get_vbios_fb_size +ffffffff81e8b9d0 t gmc_v9_0_query_memory_partition +ffffffff81e8ba30 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e8bed0 t gmc_v9_0_process_interrupt +ffffffff81e8c6d0 t gmc_v9_0_ecc_interrupt_state +ffffffff81e8c830 t gmc_v9_0_init_mem_ranges +ffffffff81e8cc50 t gmc_v9_0_gart_init +ffffffff81e8cd80 t gmc_v9_0_save_registers +ffffffff81e8d000 t hdp_v4_0_query_ras_error_count +ffffffff81e8d0c0 t hdp_v4_0_reset_ras_error_count +ffffffff81e8d1e0 t hdp_v4_0_flush_hdp +ffffffff81e8d230 t hdp_v4_0_invalidate_hdp +ffffffff81e8d310 t hdp_v4_0_update_clock_gating +ffffffff81e8d410 t hdp_v4_0_get_clockgating_state +ffffffff81e8d460 t hdp_v4_0_init_registers +ffffffff81e8e000 t hdp_v5_0_flush_hdp +ffffffff81e8e050 t hdp_v5_0_invalidate_hdp +ffffffff81e8e0f0 t hdp_v5_0_update_clock_gating +ffffffff81e8e4f0 t hdp_v5_0_get_clockgating_state +ffffffff81e8e610 t hdp_v5_0_init_registers +ffffffff81e8f000 t hdp_v5_2_flush_hdp +ffffffff81e8f050 t hdp_v5_2_update_clock_gating +ffffffff81e8f460 t hdp_v5_2_get_clockgating_state +ffffffff81e90000 t hdp_v6_0_flush_hdp +ffffffff81e90050 t hdp_v6_0_update_clock_gating +ffffffff81e90380 t hdp_v6_0_get_clockgating_state +ffffffff81e91000 t iceland_ih_early_init +ffffffff81e91050 t iceland_ih_sw_init +ffffffff81e910b0 t iceland_ih_sw_fini +ffffffff81e910f0 t iceland_ih_hw_init +ffffffff81e91310 t iceland_ih_hw_fini +ffffffff81e913e0 t iceland_ih_suspend +ffffffff81e914b0 t iceland_ih_resume +ffffffff81e914f0 t iceland_ih_is_idle +ffffffff81e91540 t iceland_ih_wait_for_idle +ffffffff81e915e0 t iceland_ih_soft_reset +ffffffff81e916c0 t iceland_ih_set_clockgating_state +ffffffff81e916f0 t iceland_ih_set_powergating_state +ffffffff81e91720 t iceland_ih_get_wptr +ffffffff81e91810 t iceland_ih_decode_iv +ffffffff81e91890 t iceland_ih_set_rptr +ffffffff81e92000 t ih_v6_0_early_init +ffffffff81e92050 t ih_v6_0_sw_init +ffffffff81e921b0 t ih_v6_0_sw_fini +ffffffff81e921f0 t ih_v6_0_hw_init +ffffffff81e927a0 t ih_v6_0_hw_fini +ffffffff81e92800 t ih_v6_0_suspend +ffffffff81e92860 t ih_v6_0_resume +ffffffff81e92870 t ih_v6_0_is_idle +ffffffff81e928a0 t ih_v6_0_wait_for_idle +ffffffff81e928d0 t ih_v6_0_soft_reset +ffffffff81e92900 t ih_v6_0_set_clockgating_state +ffffffff81e92a30 t ih_v6_0_set_powergating_state +ffffffff81e92bb0 t ih_v6_0_get_clockgating_state +ffffffff81e92c40 t ih_v6_0_get_wptr +ffffffff81e92d30 t ih_v6_0_set_rptr +ffffffff81e92e00 t ih_v6_0_self_irq +ffffffff81e92e70 t ih_v6_0_toggle_interrupts +ffffffff81e93050 t force_update_wptr_for_self_int +ffffffff81e94000 t ih_v6_1_early_init +ffffffff81e94050 t ih_v6_1_sw_init +ffffffff81e941b0 t ih_v6_1_sw_fini +ffffffff81e941f0 t ih_v6_1_hw_init +ffffffff81e947a0 t ih_v6_1_hw_fini +ffffffff81e94800 t ih_v6_1_suspend +ffffffff81e94860 t ih_v6_1_resume +ffffffff81e94870 t ih_v6_1_is_idle +ffffffff81e948a0 t ih_v6_1_wait_for_idle +ffffffff81e948d0 t ih_v6_1_soft_reset +ffffffff81e94900 t ih_v6_1_set_clockgating_state +ffffffff81e94a30 t ih_v6_1_set_powergating_state +ffffffff81e94bb0 t ih_v6_1_get_clockgating_state +ffffffff81e94c40 t ih_v6_1_get_wptr +ffffffff81e94d30 t ih_v6_1_set_rptr +ffffffff81e94e00 t ih_v6_1_self_irq +ffffffff81e94e70 t ih_v6_1_toggle_interrupts +ffffffff81e95050 t force_update_wptr_for_self_int +ffffffff81e96000 t imu_v11_0_init_microcode +ffffffff81e96170 t imu_v11_0_load_microcode +ffffffff81e964f0 t imu_v11_0_setup +ffffffff81e96780 t imu_v11_0_start +ffffffff81e96880 t imu_v11_0_program_rlc_ram +ffffffff81e96a40 t imu_v11_0_wait_for_reset_status +ffffffff81e96b90 t program_imu_rlc_ram +ffffffff81e97000 T imu_v11_0_3_program_rlc_ram +ffffffff81e98000 T jpeg_v1_0_early_init +ffffffff81e98080 T jpeg_v1_0_sw_init +ffffffff81e98170 T jpeg_v1_0_sw_fini +ffffffff81e98190 T jpeg_v1_0_start +ffffffff81e98c40 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e98cd0 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e98d60 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e98dd0 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e996f0 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e9a030 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e9a0a0 t jpeg_v1_0_decode_ring_nop +ffffffff81e9a200 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e9a3c0 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e9a580 t jpeg_v1_0_ring_begin_use +ffffffff81e9a680 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e9a8e0 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e9ad00 t jpeg_v1_0_set_interrupt_state +ffffffff81e9ad30 t jpeg_v1_0_process_interrupt +ffffffff81e9b000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e9b1a0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e9b340 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e9ba20 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e9c1d0 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e9c580 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e9c5f0 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e9c830 T jpeg_v2_0_dec_ring_nop +ffffffff81e9c990 t jpeg_v2_0_early_init +ffffffff81e9ca20 t jpeg_v2_0_sw_init +ffffffff81e9cb50 t jpeg_v2_0_sw_fini +ffffffff81e9cba0 t jpeg_v2_0_hw_init +ffffffff81e9cc20 t jpeg_v2_0_hw_fini +ffffffff81e9cd00 t jpeg_v2_0_suspend +ffffffff81e9cd30 t jpeg_v2_0_resume +ffffffff81e9cdc0 t jpeg_v2_0_is_idle +ffffffff81e9ce50 t jpeg_v2_0_wait_for_idle +ffffffff81e9ce90 t jpeg_v2_0_set_clockgating_state +ffffffff81e9cf40 t jpeg_v2_0_set_powergating_state +ffffffff81e9d660 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e9d6f0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e9d790 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e9d830 t jpeg_v2_0_set_interrupt_state +ffffffff81e9d860 t jpeg_v2_0_process_interrupt +ffffffff81e9d8f0 t jpeg_v2_0_enable_clock_gating +ffffffff81e9daa0 t jpeg_v2_0_disable_clock_gating +ffffffff81e9e000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e9e150 t jpeg_v2_5_early_init +ffffffff81e9e350 t jpeg_v2_5_sw_init +ffffffff81e9e5f0 t jpeg_v2_5_sw_fini +ffffffff81e9e640 t jpeg_v2_5_hw_init +ffffffff81e9e730 t jpeg_v2_5_hw_fini +ffffffff81e9e8b0 t jpeg_v2_5_suspend +ffffffff81e9e8e0 t jpeg_v2_5_resume +ffffffff81e9e9e0 t jpeg_v2_5_is_idle +ffffffff81e9eae0 t jpeg_v2_5_wait_for_idle +ffffffff81e9eb90 t jpeg_v2_5_set_clockgating_state +ffffffff81e9ec40 t jpeg_v2_5_set_powergating_state +ffffffff81e9f370 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e9f410 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e9f4c0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e9f570 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e9f730 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e9f8f0 t jpeg_v2_5_set_interrupt_state +ffffffff81e9f920 t jpeg_v2_5_process_interrupt +ffffffff81e9f9e0 t jpeg_v2_6_set_ras_interrupt_state +ffffffff81e9fa10 t jpeg_v2_5_enable_clock_gating +ffffffff81e9faf0 t jpeg_v2_5_disable_clock_gating +ffffffff81ea0000 t jpeg_v3_0_early_init +ffffffff81ea0110 t jpeg_v3_0_sw_init +ffffffff81ea0240 t jpeg_v3_0_sw_fini +ffffffff81ea0290 t jpeg_v3_0_hw_init +ffffffff81ea0310 t jpeg_v3_0_hw_fini +ffffffff81ea03f0 t jpeg_v3_0_suspend +ffffffff81ea0420 t jpeg_v3_0_resume +ffffffff81ea04b0 t jpeg_v3_0_is_idle +ffffffff81ea0540 t jpeg_v3_0_wait_for_idle +ffffffff81ea0580 t jpeg_v3_0_set_clockgating_state +ffffffff81ea0630 t jpeg_v3_0_set_powergating_state +ffffffff81ea0e10 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81ea0ea0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81ea0f40 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81ea0fe0 t jpeg_v3_0_set_interrupt_state +ffffffff81ea1010 t jpeg_v3_0_process_interrupt +ffffffff81ea10a0 t jpeg_v3_0_enable_clock_gating +ffffffff81ea1170 t jpeg_v3_0_disable_clock_gating +ffffffff81ea2000 t jpeg_v4_0_query_ras_poison_status +ffffffff81ea2150 t jpeg_v4_0_early_init +ffffffff81ea2220 t jpeg_v4_0_sw_init +ffffffff81ea23c0 t jpeg_v4_0_sw_fini +ffffffff81ea2410 t jpeg_v4_0_hw_init +ffffffff81ea2a40 t jpeg_v4_0_hw_fini +ffffffff81ea2b10 t jpeg_v4_0_suspend +ffffffff81ea2b40 t jpeg_v4_0_resume +ffffffff81ea2b90 t jpeg_v4_0_is_idle +ffffffff81ea2c20 t jpeg_v4_0_wait_for_idle +ffffffff81ea2c60 t jpeg_v4_0_set_clockgating_state +ffffffff81ea2d10 t jpeg_v4_0_set_powergating_state +ffffffff81ea3470 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81ea3500 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81ea35a0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81ea3640 t jpeg_v4_0_set_interrupt_state +ffffffff81ea3670 t jpeg_v4_0_process_interrupt +ffffffff81ea3710 t jpeg_v4_0_set_ras_interrupt_state +ffffffff81ea3740 t jpeg_v4_0_enable_clock_gating +ffffffff81ea3900 t jpeg_v4_0_disable_clock_gating +ffffffff81ea4000 t jpeg_v4_0_3_early_init +ffffffff81ea4170 t jpeg_v4_0_3_sw_init +ffffffff81ea44a0 t jpeg_v4_0_3_sw_fini +ffffffff81ea44f0 t jpeg_v4_0_3_hw_init +ffffffff81ea4f50 t jpeg_v4_0_3_hw_fini +ffffffff81ea4fe0 t jpeg_v4_0_3_suspend +ffffffff81ea5060 t jpeg_v4_0_3_resume +ffffffff81ea50b0 t jpeg_v4_0_3_is_idle +ffffffff81ea5290 t jpeg_v4_0_3_wait_for_idle +ffffffff81ea53e0 t jpeg_v4_0_3_set_clockgating_state +ffffffff81ea5470 t jpeg_v4_0_3_set_powergating_state +ffffffff81ea60d0 t jpeg_v4_0_3_dec_ring_get_rptr +ffffffff81ea6240 t jpeg_v4_0_3_dec_ring_get_wptr +ffffffff81ea63d0 t jpeg_v4_0_3_dec_ring_set_wptr +ffffffff81ea6570 t jpeg_v4_0_3_dec_ring_emit_ib +ffffffff81ea6dd0 t jpeg_v4_0_3_dec_ring_emit_fence +ffffffff81ea7560 t jpeg_v4_0_3_dec_ring_emit_vm_flush +ffffffff81ea75d0 t jpeg_v4_0_3_dec_ring_nop +ffffffff81ea7730 t jpeg_v4_0_3_dec_ring_insert_start +ffffffff81ea78d0 t jpeg_v4_0_3_dec_ring_insert_end +ffffffff81ea7a70 t jpeg_v4_0_3_dec_ring_emit_wreg +ffffffff81ea7cb0 t jpeg_v4_0_3_dec_ring_emit_reg_wait +ffffffff81ea8060 t jpeg_v4_0_3_set_interrupt_state +ffffffff81ea8090 t jpeg_v4_0_3_process_interrupt +ffffffff81ea82d0 t jpeg_v4_0_3_query_ras_error_count +ffffffff81ea83c0 t jpeg_v4_0_3_reset_ras_error_count +ffffffff81ea84b0 t jpeg_v4_0_3_disable_clock_gating +ffffffff81ea9000 t lsdma_v6_0_copy_mem +ffffffff81ea9370 t lsdma_v6_0_fill_mem +ffffffff81ea9660 t lsdma_v6_0_update_memory_power_gating +ffffffff81eaa000 t mca_v3_0_ras_block_match +ffffffff81eaa050 t mca_v3_0_mp0_query_ras_error_count +ffffffff81eaa070 t mca_v3_0_mp1_query_ras_error_count +ffffffff81eaa090 t mca_v3_0_mpio_query_ras_error_count +ffffffff81eab000 t mes_v10_0_early_init +ffffffff81eab060 t mes_v10_0_late_init +ffffffff81eab0b0 t mes_v10_1_sw_init +ffffffff81eab550 t mes_v10_1_sw_fini +ffffffff81eab670 t mes_v10_1_hw_init +ffffffff81eabf60 t mes_v10_1_hw_fini +ffffffff81eac050 t mes_v10_1_suspend +ffffffff81eac160 t mes_v10_1_resume +ffffffff81eac1b0 t mes_v10_1_kiq_hw_init +ffffffff81eac5c0 t mes_v10_1_add_hw_queue +ffffffff81eac740 t mes_v10_1_remove_hw_queue +ffffffff81eac7d0 t mes_v10_1_unmap_legacy_queue +ffffffff81eac8c0 t mes_v10_1_suspend_gang +ffffffff81eac8f0 t mes_v10_1_resume_gang +ffffffff81eac920 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81eacb20 t mes_v10_1_load_microcode +ffffffff81ead340 t mes_v10_1_enable +ffffffff81ead7c0 t mes_v10_1_queue_init +ffffffff81eada60 t amdgpu_bo_unreserve +ffffffff81eadb40 t mes_v10_1_ring_get_rptr +ffffffff81eadb70 t mes_v10_1_ring_get_wptr +ffffffff81eadbe0 t mes_v10_1_ring_set_wptr +ffffffff81eae000 t mes_v11_0_early_init +ffffffff81eae060 t mes_v11_0_late_init +ffffffff81eae0d0 t mes_v11_0_sw_init +ffffffff81eae570 t mes_v11_0_sw_fini +ffffffff81eae730 t mes_v11_0_hw_init +ffffffff81eaef60 t mes_v11_0_hw_fini +ffffffff81eaef90 t mes_v11_0_suspend +ffffffff81eaefa0 t mes_v11_0_resume +ffffffff81eaeff0 t mes_v11_0_kiq_hw_init +ffffffff81eaf200 t mes_v11_0_kiq_hw_fini +ffffffff81eaf340 t mes_v11_0_add_hw_queue +ffffffff81eaf540 t mes_v11_0_remove_hw_queue +ffffffff81eaf5d0 t mes_v11_0_unmap_legacy_queue +ffffffff81eaf6d0 t mes_v11_0_suspend_gang +ffffffff81eaf700 t mes_v11_0_resume_gang +ffffffff81eaf730 t mes_v11_0_misc_op +ffffffff81eaf8f0 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff81eafb10 t mes_v11_0_load_microcode +ffffffff81eb02a0 t mes_v11_0_enable +ffffffff81eb07b0 t mes_v11_0_queue_init +ffffffff81eb1250 t amdgpu_bo_unreserve +ffffffff81eb1330 t mes_v11_0_mqd_init +ffffffff81eb1520 t mes_v11_0_kiq_dequeue +ffffffff81eb1960 t mes_v11_0_ring_get_rptr +ffffffff81eb1990 t mes_v11_0_ring_get_wptr +ffffffff81eb1a00 t mes_v11_0_ring_set_wptr +ffffffff81eb2000 t mmhub_v1_0_query_ras_error_count +ffffffff81eb2150 t mmhub_v1_0_reset_ras_error_count +ffffffff81eb2200 t mmhub_v1_0_get_fb_location +ffffffff81eb2320 t mmhub_v1_0_init +ffffffff81eb23d0 t mmhub_v1_0_gart_enable +ffffffff81eb3720 t mmhub_v1_0_set_fault_enable_default +ffffffff81eb3840 t mmhub_v1_0_gart_disable +ffffffff81eb3ae0 t mmhub_v1_0_set_clockgating +ffffffff81eb3f70 t mmhub_v1_0_get_clockgating +ffffffff81eb4090 t mmhub_v1_0_setup_vm_pt_regs +ffffffff81eb41d0 t mmhub_v1_0_update_power_gating +ffffffff81eb5000 t mmhub_v1_7_query_ras_error_count +ffffffff81eb5150 t mmhub_v1_7_query_ras_error_status +ffffffff81eb5230 t mmhub_v1_7_reset_ras_error_count +ffffffff81eb52d0 t mmhub_v1_7_reset_ras_error_status +ffffffff81eb53d0 t mmhub_v1_7_get_fb_location +ffffffff81eb54f0 t mmhub_v1_7_init +ffffffff81eb5590 t mmhub_v1_7_gart_enable +ffffffff81eb6aa0 t mmhub_v1_7_set_fault_enable_default +ffffffff81eb6bc0 t mmhub_v1_7_gart_disable +ffffffff81eb6e60 t mmhub_v1_7_set_clockgating +ffffffff81eb7200 t mmhub_v1_7_get_clockgating +ffffffff81eb7320 t mmhub_v1_7_setup_vm_pt_regs +ffffffff81eb8000 t mmhub_v1_8_get_fb_location +ffffffff81eb8120 t mmhub_v1_8_init +ffffffff81eb8280 t mmhub_v1_8_gart_enable +ffffffff81eb9e90 t mmhub_v1_8_set_fault_enable_default +ffffffff81eba060 t mmhub_v1_8_gart_disable +ffffffff81eba3a0 t mmhub_v1_8_set_clockgating +ffffffff81eba3d0 t mmhub_v1_8_get_clockgating +ffffffff81eba400 t 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xgpu_vi_mailbox_add_irq_id +ffffffff81ecc1a0 T xgpu_vi_mailbox_get_irq +ffffffff81ecc250 t xgpu_vi_mailbox_flr_work +ffffffff81ecc3a0 T xgpu_vi_mailbox_put_irq +ffffffff81ecc3e0 t xgpu_vi_request_full_gpu_access +ffffffff81ecc400 t xgpu_vi_release_full_gpu_access +ffffffff81ecc420 t xgpu_vi_request_reset +ffffffff81ecc440 t xgpu_vi_wait_reset_cmpl +ffffffff81ecc520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81ecc5a0 t xgpu_vi_mailbox_ack_irq +ffffffff81ecc5f0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81ecc670 t xgpu_vi_mailbox_rcv_irq +ffffffff81ecc720 t xgpu_vi_mailbox_rcv_msg +ffffffff81ecc840 t xgpu_vi_send_access_requests +ffffffff81ecd000 t navi10_ih_early_init +ffffffff81ecd060 t navi10_ih_sw_init +ffffffff81ecd1d0 t navi10_ih_sw_fini +ffffffff81ecd210 t navi10_ih_hw_init +ffffffff81ecd630 t navi10_ih_hw_fini +ffffffff81ecd690 t navi10_ih_suspend +ffffffff81ecd6f0 t navi10_ih_resume +ffffffff81ecd700 t navi10_ih_is_idle +ffffffff81ecd730 t navi10_ih_wait_for_idle +ffffffff81ecd760 t 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nbio_v7_7_get_pcie_port_index_offset +ffffffff81ed9130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81ed9170 t nbio_v7_7_get_rev_id +ffffffff81ed9200 t nbio_v7_7_mc_access_enable +ffffffff81ed92b0 t nbio_v7_7_get_memsize +ffffffff81ed9320 t nbio_v7_7_sdma_doorbell_range +ffffffff81ed93b0 t nbio_v7_7_vcn_doorbell_range +ffffffff81ed9430 t nbio_v7_7_enable_doorbell_aperture +ffffffff81ed9510 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81ed9680 t nbio_v7_7_ih_doorbell_range +ffffffff81ed97a0 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81ed98e0 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81ed9af0 t nbio_v7_7_get_clockgating_state +ffffffff81ed9c00 t nbio_v7_7_ih_control +ffffffff81ed9d50 t nbio_v7_7_init_registers +ffffffff81ed9e70 t nbio_v7_7_remap_hdp_registers +ffffffff81eda000 t nbio_v7_9_get_hdp_flush_req_offset +ffffffff81eda040 t nbio_v7_9_get_hdp_flush_done_offset +ffffffff81eda080 t nbio_v7_9_get_pcie_index_offset +ffffffff81eda0c0 t nbio_v7_9_get_pcie_data_offset +ffffffff81eda100 t nbio_v7_9_get_pcie_index_hi_offset +ffffffff81eda140 t nbio_v7_9_get_rev_id +ffffffff81eda1d0 t nbio_v7_9_mc_access_enable +ffffffff81eda280 t nbio_v7_9_get_memsize +ffffffff81eda2f0 t nbio_v7_9_sdma_doorbell_range +ffffffff81eda630 t nbio_v7_9_vcn_doorbell_range +ffffffff81eda7c0 t nbio_v7_9_enable_doorbell_aperture +ffffffff81eda930 t nbio_v7_9_enable_doorbell_selfring_aperture +ffffffff81edaaa0 t nbio_v7_9_ih_doorbell_range +ffffffff81edaba0 t nbio_v7_9_enable_doorbell_interrupt +ffffffff81edacb0 t nbio_v7_9_update_medium_grain_clock_gating +ffffffff81edace0 t nbio_v7_9_update_medium_grain_light_sleep +ffffffff81edad10 t nbio_v7_9_get_clockgating_state +ffffffff81edad40 t nbio_v7_9_ih_control +ffffffff81edae90 t nbio_v7_9_init_registers +ffffffff81edb1a0 t nbio_v7_9_remap_hdp_registers +ffffffff81edb2b0 t nbio_v7_9_get_compute_partition_mode +ffffffff81edb340 t nbio_v7_9_get_memory_partition_mode +ffffffff81edb430 t nbio_v7_9_get_pcie_replay_count +ffffffff81edb490 t nbio_v7_9_get_pcie_usage +ffffffff81edb5f0 t nbio_v7_9_query_ras_error_count +ffffffff81edb620 t nbio_v7_9_handle_ras_controller_intr_no_bifring +ffffffff81edb740 t nbio_v7_9_handle_ras_err_event_athub_intr_no_bifring +ffffffff81edb850 t nbio_v7_9_init_ras_controller_interrupt +ffffffff81edb890 t nbio_v7_9_init_ras_err_event_athub_interrupt +ffffffff81edb8d0 t nbio_v7_9_set_ras_controller_irq_state +ffffffff81edb900 t nbio_v7_9_process_ras_controller_irq +ffffffff81edb930 t nbio_v7_9_set_ras_err_event_athub_irq_state +ffffffff81edb960 t nbio_v7_9_process_err_event_athub_irq +ffffffff81edc000 T nv_grbm_select +ffffffff81edc0a0 T nv_set_virt_ops +ffffffff81edc0e0 t nv_common_early_init +ffffffff81edc4d0 t nv_common_late_init +ffffffff81edc580 t nv_common_sw_init +ffffffff81edc5c0 t nv_common_sw_fini +ffffffff81edc5f0 t nv_common_hw_init +ffffffff81edc6f0 t nv_common_hw_fini +ffffffff81edc750 t nv_common_suspend +ffffffff81edc7b0 t nv_common_resume +ffffffff81edc7f0 t nv_common_is_idle +ffffffff81edc820 t nv_common_wait_for_idle +ffffffff81edc850 t nv_common_soft_reset +ffffffff81edc880 t nv_common_set_clockgating_state +ffffffff81edc950 t nv_common_set_powergating_state +ffffffff81edc980 t nv_common_get_clockgating_state +ffffffff81edc9f0 t nv_didt_rreg +ffffffff81edca90 t nv_didt_wreg +ffffffff81edcb10 t nv_read_disabled_bios +ffffffff81edcb40 t nv_read_register +ffffffff81edcc30 t nv_asic_reset +ffffffff81edcd70 t nv_asic_reset_method +ffffffff81edce60 t nv_get_xclk +ffffffff81edce90 t nv_set_uvd_clocks +ffffffff81edcec0 t nv_set_vce_clocks +ffffffff81edcef0 t nv_get_config_memsize +ffffffff81edcf10 t nv_need_full_reset +ffffffff81edcf40 t nv_init_doorbell_index +ffffffff81edd070 t nv_need_reset_on_init +ffffffff81edd110 t nv_pre_asic_init +ffffffff81edd140 t nv_update_umd_stable_pstate +ffffffff81edd200 t nv_query_video_codecs +ffffffff81ede000 T psp_v10_0_set_psp_funcs +ffffffff81ede030 t psp_v10_0_init_microcode +ffffffff81ede0f0 t psp_v10_0_ring_create +ffffffff81ede400 t psp_v10_0_ring_stop +ffffffff81ede5f0 t psp_v10_0_ring_destroy +ffffffff81ede670 t psp_v10_0_mode1_reset +ffffffff81ede6c0 t psp_v10_0_ring_get_wptr +ffffffff81ede720 t psp_v10_0_ring_set_wptr +ffffffff81edf000 T psp_v11_0_set_psp_funcs +ffffffff81edf030 t psp_v11_0_init_microcode +ffffffff81edf180 t psp_v11_0_bootloader_load_kdb +ffffffff81edf1a0 t psp_v11_0_bootloader_load_spl +ffffffff81edf1c0 t psp_v11_0_bootloader_load_sysdrv +ffffffff81edf1e0 t psp_v11_0_bootloader_load_sos +ffffffff81edf540 t psp_v11_0_ring_create +ffffffff81edfbe0 t psp_v11_0_ring_stop +ffffffff81edfe00 t psp_v11_0_ring_destroy +ffffffff81edfe80 t psp_v11_0_mode1_reset +ffffffff81edff80 t psp_v11_0_memory_training +ffffffff81ee0400 t psp_v11_0_ring_get_wptr +ffffffff81ee0450 t psp_v11_0_ring_set_wptr +ffffffff81ee0590 t psp_v11_0_load_usbc_pd_fw +ffffffff81ee0780 t psp_v11_0_read_usbc_pd_fw +ffffffff81ee08a0 t psp_v11_0_bootloader_load_component +ffffffff81ee0a60 t psp_v11_0_wait_for_bootloader +ffffffff81ee0c30 t psp_v11_0_memory_training_send_msg +ffffffff81ee1000 T psp_v11_0_8_set_psp_funcs +ffffffff81ee1030 t psp_v11_0_8_ring_create +ffffffff81ee16d0 t psp_v11_0_8_ring_stop +ffffffff81ee1a60 t psp_v11_0_8_ring_destroy +ffffffff81ee1ae0 t psp_v11_0_8_ring_get_wptr +ffffffff81ee1b50 t psp_v11_0_8_ring_set_wptr +ffffffff81ee2000 T psp_v12_0_set_psp_funcs +ffffffff81ee2030 t psp_v12_0_init_microcode +ffffffff81ee20e0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81ee2410 t psp_v12_0_bootloader_load_sos +ffffffff81ee2790 t psp_v12_0_ring_create +ffffffff81ee3190 t psp_v12_0_ring_stop +ffffffff81ee33b0 t psp_v12_0_ring_destroy +ffffffff81ee3430 t psp_v12_0_mode1_reset +ffffffff81ee3530 t psp_v12_0_ring_get_wptr +ffffffff81ee35a0 t psp_v12_0_ring_set_wptr +ffffffff81ee4000 T psp_v13_0_set_psp_funcs +ffffffff81ee4030 t psp_v13_0_init_microcode +ffffffff81ee4130 t psp_v13_0_wait_for_bootloader_steady_state +ffffffff81ee4240 t psp_v13_0_bootloader_load_kdb +ffffffff81ee4260 t psp_v13_0_bootloader_load_spl +ffffffff81ee4280 t psp_v13_0_bootloader_load_sysdrv +ffffffff81ee42a0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81ee42c0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81ee42e0 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81ee4300 t psp_v13_0_bootloader_load_ras_drv +ffffffff81ee4320 t psp_v13_0_bootloader_load_sos +ffffffff81ee46f0 t psp_v13_0_ring_create +ffffffff81ee4d90 t psp_v13_0_ring_stop +ffffffff81ee5120 t psp_v13_0_ring_destroy +ffffffff81ee51a0 t psp_v13_0_memory_training +ffffffff81ee55d0 t psp_v13_0_ring_get_wptr +ffffffff81ee5640 t psp_v13_0_ring_set_wptr +ffffffff81ee5740 t psp_v13_0_load_usbc_pd_fw +ffffffff81ee5930 t psp_v13_0_read_usbc_pd_fw +ffffffff81ee5a50 t psp_v13_0_update_spirom +ffffffff81ee5c30 t psp_v13_0_vbflash_status +ffffffff81ee5c90 t psp_v13_0_fatal_error_recovery_quirk +ffffffff81ee5dc0 t psp_v13_0_bootloader_load_component +ffffffff81ee6030 t psp_v13_0_memory_training_send_msg +ffffffff81ee61a0 t psp_v13_0_exec_spi_cmd +ffffffff81ee7000 T psp_v13_0_4_set_psp_funcs +ffffffff81ee7030 t psp_v13_0_4_init_microcode +ffffffff81ee70d0 t psp_v13_0_4_bootloader_load_kdb +ffffffff81ee70f0 t psp_v13_0_4_bootloader_load_spl +ffffffff81ee7110 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81ee7130 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81ee7150 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81ee7170 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81ee7190 t psp_v13_0_4_bootloader_load_sos +ffffffff81ee7500 t psp_v13_0_4_ring_create +ffffffff81ee7bb0 t psp_v13_0_4_ring_stop +ffffffff81ee7f40 t psp_v13_0_4_ring_destroy +ffffffff81ee7fc0 t psp_v13_0_4_ring_get_wptr +ffffffff81ee8030 t psp_v13_0_4_ring_set_wptr +ffffffff81ee8130 t psp_v13_0_4_bootloader_load_component +ffffffff81ee8300 t psp_v13_0_4_wait_for_bootloader +ffffffff81ee9000 T psp_v3_1_set_psp_funcs +ffffffff81ee9030 t psp_v3_1_init_microcode +ffffffff81ee90c0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81ee93f0 t psp_v3_1_bootloader_load_sos +ffffffff81ee9770 t psp_v3_1_ring_create +ffffffff81eea290 t psp_v3_1_ring_stop +ffffffff81eea4b0 t psp_v3_1_ring_destroy +ffffffff81eea530 t psp_v3_1_smu_reload_quirk +ffffffff81eea580 t psp_v3_1_mode1_reset +ffffffff81eea680 t psp_v3_1_ring_get_wptr +ffffffff81eea6d0 t psp_v3_1_ring_set_wptr +ffffffff81eeb000 t sdma_v2_4_early_init +ffffffff81eeb0f0 t sdma_v2_4_sw_init +ffffffff81eeb4a0 t sdma_v2_4_sw_fini +ffffffff81eeb550 t sdma_v2_4_hw_init +ffffffff81eeb8f0 t sdma_v2_4_hw_fini +ffffffff81eeb930 t sdma_v2_4_suspend +ffffffff81eeb970 t sdma_v2_4_resume +ffffffff81eeb980 t sdma_v2_4_is_idle +ffffffff81eeb9c0 t sdma_v2_4_wait_for_idle +ffffffff81eeba60 t sdma_v2_4_soft_reset +ffffffff81eebba0 t sdma_v2_4_set_clockgating_state +ffffffff81eebbd0 t sdma_v2_4_set_powergating_state +ffffffff81eebc00 t sdma_v2_4_ring_get_rptr +ffffffff81eebc40 t sdma_v2_4_ring_get_wptr +ffffffff81eebca0 t sdma_v2_4_ring_set_wptr +ffffffff81eebce0 t sdma_v2_4_ring_emit_ib +ffffffff81eebf90 t sdma_v2_4_ring_emit_fence +ffffffff81eec390 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81eec610 t sdma_v2_4_ring_emit_vm_flush +ffffffff81eec880 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81eecb00 t sdma_v2_4_ring_test_ring +ffffffff81eecde0 t sdma_v2_4_ring_test_ib +ffffffff81eecfb0 t sdma_v2_4_ring_insert_nop +ffffffff81eed0e0 t sdma_v2_4_ring_pad_ib +ffffffff81eed210 t sdma_v2_4_ring_emit_wreg +ffffffff81eed360 t sdma_v2_4_emit_copy_buffer +ffffffff81eed420 t sdma_v2_4_emit_fill_buffer +ffffffff81eed4b0 t sdma_v2_4_vm_copy_pte +ffffffff81eed570 t sdma_v2_4_vm_write_pte +ffffffff81eed640 t sdma_v2_4_vm_set_pte_pde +ffffffff81eed740 t sdma_v2_4_set_trap_irq_state +ffffffff81eed800 t sdma_v2_4_process_trap_irq +ffffffff81eed8a0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81eed920 t sdma_v2_4_enable +ffffffff81eee000 t sdma_v3_0_early_init +ffffffff81eee100 t sdma_v3_0_sw_init +ffffffff81eee4c0 t sdma_v3_0_sw_fini +ffffffff81eee570 t sdma_v3_0_hw_init +ffffffff81eee6a0 t sdma_v3_0_hw_fini +ffffffff81eee6f0 t sdma_v3_0_suspend +ffffffff81eee740 t sdma_v3_0_resume +ffffffff81eee750 t sdma_v3_0_is_idle +ffffffff81eee790 t sdma_v3_0_wait_for_idle +ffffffff81eee830 t sdma_v3_0_check_soft_reset +ffffffff81eee890 t sdma_v3_0_pre_soft_reset +ffffffff81eee8e0 t sdma_v3_0_soft_reset +ffffffff81eee9b0 t sdma_v3_0_post_soft_reset +ffffffff81eeea00 t sdma_v3_0_set_clockgating_state +ffffffff81eeec60 t sdma_v3_0_set_powergating_state +ffffffff81eeec90 t sdma_v3_0_get_clockgating_state +ffffffff81eeed10 t sdma_v3_0_ring_get_rptr +ffffffff81eeed50 t sdma_v3_0_ring_get_wptr +ffffffff81eeedd0 t sdma_v3_0_ring_set_wptr +ffffffff81eeee80 t sdma_v3_0_ring_emit_ib +ffffffff81eef130 t sdma_v3_0_ring_emit_fence +ffffffff81eef530 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81eef7b0 t sdma_v3_0_ring_emit_vm_flush +ffffffff81eefa20 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81eefca0 t sdma_v3_0_ring_test_ring +ffffffff81eeff80 t sdma_v3_0_ring_test_ib +ffffffff81ef0150 t sdma_v3_0_ring_insert_nop +ffffffff81ef0280 t sdma_v3_0_ring_pad_ib +ffffffff81ef03b0 t sdma_v3_0_ring_emit_wreg +ffffffff81ef0500 t sdma_v3_0_emit_copy_buffer +ffffffff81ef05c0 t sdma_v3_0_emit_fill_buffer +ffffffff81ef0650 t sdma_v3_0_vm_copy_pte +ffffffff81ef0710 t sdma_v3_0_vm_write_pte +ffffffff81ef07e0 t sdma_v3_0_vm_set_pte_pde +ffffffff81ef08e0 t sdma_v3_0_set_trap_irq_state +ffffffff81ef09a0 t sdma_v3_0_process_trap_irq +ffffffff81ef0a40 t sdma_v3_0_process_illegal_inst_irq +ffffffff81ef0ac0 t sdma_v3_0_ctx_switch_enable +ffffffff81ef0c60 t sdma_v3_0_enable +ffffffff81ef0dd0 t sdma_v3_0_gfx_resume +ffffffff81ef2000 t sdma_v4_0_early_init +ffffffff81ef22d0 t sdma_v4_0_late_init +ffffffff81ef2570 t sdma_v4_0_sw_init +ffffffff81ef29b0 t sdma_v4_0_sw_fini +ffffffff81ef2a70 t sdma_v4_0_hw_init +ffffffff81ef59d0 t sdma_v4_0_hw_fini +ffffffff81ef5a90 t sdma_v4_0_suspend +ffffffff81ef5ae0 t sdma_v4_0_resume +ffffffff81ef5b60 t sdma_v4_0_is_idle +ffffffff81ef5c90 t sdma_v4_0_wait_for_idle +ffffffff81ef5e30 t sdma_v4_0_soft_reset +ffffffff81ef5e60 t sdma_v4_0_set_clockgating_state +ffffffff81ef6360 t sdma_v4_0_set_powergating_state +ffffffff81ef6420 t sdma_v4_0_get_clockgating_state +ffffffff81ef64c0 t sdma_v4_0_query_ras_error_count +ffffffff81ef6690 t sdma_v4_0_reset_ras_error_count +ffffffff81ef67e0 t sdma_v4_0_ring_get_rptr +ffffffff81ef6840 t sdma_v4_0_ring_get_wptr +ffffffff81ef6a30 t sdma_v4_0_ring_set_wptr +ffffffff81ef6cb0 t sdma_v4_0_ring_emit_ib +ffffffff81ef6f60 t sdma_v4_0_ring_emit_fence +ffffffff81ef7380 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81ef73e0 t sdma_v4_0_ring_emit_vm_flush +ffffffff81ef7400 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81ef74b0 t sdma_v4_0_ring_test_ring +ffffffff81ef7790 t sdma_v4_0_ring_test_ib +ffffffff81ef7960 t sdma_v4_0_ring_insert_nop +ffffffff81ef7a90 t sdma_v4_0_ring_pad_ib +ffffffff81ef7bc0 t sdma_v4_0_ring_emit_wreg +ffffffff81ef7d10 t sdma_v4_0_ring_emit_reg_wait +ffffffff81ef7d60 t sdma_v4_0_wait_reg_mem +ffffffff81ef8070 t sdma_v4_0_page_ring_get_wptr +ffffffff81ef8220 t sdma_v4_0_page_ring_set_wptr +ffffffff81ef83e0 t sdma_v4_0_emit_copy_buffer +ffffffff81ef84a0 t sdma_v4_0_emit_fill_buffer +ffffffff81ef8530 t sdma_v4_0_vm_copy_pte +ffffffff81ef85f0 t sdma_v4_0_vm_write_pte +ffffffff81ef86c0 t sdma_v4_0_vm_set_pte_pde +ffffffff81ef87c0 t sdma_v4_0_set_trap_irq_state +ffffffff81ef8960 t sdma_v4_0_process_trap_irq +ffffffff81ef8a90 t sdma_v4_0_process_illegal_inst_irq +ffffffff81ef8bb0 t sdma_v4_0_set_ecc_irq_state +ffffffff81ef8d50 t sdma_v4_0_process_vm_hole_irq +ffffffff81ef8d90 t sdma_v4_0_print_iv_entry +ffffffff81ef8ed0 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81ef8f10 t sdma_v4_0_process_pool_timeout_irq +ffffffff81ef8f50 t sdma_v4_0_process_srbm_write_irq +ffffffff81ef8f90 t sdma_v4_0_process_ras_data_cb +ffffffff81ef9010 t sdma_v4_0_ctx_switch_enable +ffffffff81ef96e0 t sdma_v4_0_enable +ffffffff81ef9ca0 t sdma_v4_0_gfx_enable +ffffffff81efb000 t sdma_v4_4_query_ras_error_count +ffffffff81efb290 t sdma_v4_4_reset_ras_error_count +ffffffff81efc000 t sdma_v4_4_2_early_init +ffffffff81efc280 t sdma_v4_4_2_late_init +ffffffff81efc2f0 t sdma_v4_4_2_sw_init +ffffffff81efc810 t sdma_v4_4_2_sw_fini +ffffffff81efc8c0 t sdma_v4_4_2_hw_init +ffffffff81efc910 t sdma_v4_4_2_hw_fini +ffffffff81efc9d0 t sdma_v4_4_2_suspend +ffffffff81efcab0 t sdma_v4_4_2_resume +ffffffff81efcb00 t sdma_v4_4_2_is_idle +ffffffff81efcba0 t sdma_v4_4_2_wait_for_idle +ffffffff81efccc0 t sdma_v4_4_2_soft_reset +ffffffff81efccf0 t sdma_v4_4_2_set_clockgating_state +ffffffff81efd0f0 t sdma_v4_4_2_set_powergating_state +ffffffff81efd120 t sdma_v4_4_2_get_clockgating_state +ffffffff81efd200 t sdma_v4_4_2_xcp_suspend +ffffffff81efd2c0 t sdma_v4_4_2_xcp_resume +ffffffff81efd300 t sdma_v4_4_2_ring_get_rptr +ffffffff81efd370 t sdma_v4_4_2_ring_get_wptr +ffffffff81efd4b0 t sdma_v4_4_2_ring_set_wptr +ffffffff81efd670 t sdma_v4_4_2_ring_emit_ib +ffffffff81efd920 t sdma_v4_4_2_ring_emit_fence +ffffffff81efdd40 t sdma_v4_4_2_ring_emit_pipeline_sync +ffffffff81efdda0 t sdma_v4_4_2_ring_emit_vm_flush +ffffffff81efddc0 t sdma_v4_4_2_ring_emit_hdp_flush +ffffffff81efde70 t sdma_v4_4_2_ring_test_ring +ffffffff81efe150 t sdma_v4_4_2_ring_test_ib +ffffffff81efe320 t sdma_v4_4_2_ring_insert_nop +ffffffff81efe450 t sdma_v4_4_2_ring_pad_ib +ffffffff81efe580 t sdma_v4_4_2_ring_emit_wreg +ffffffff81efe6d0 t sdma_v4_4_2_ring_emit_reg_wait +ffffffff81efe720 t sdma_v4_4_2_wait_reg_mem +ffffffff81efea30 t sdma_v4_4_2_page_ring_get_wptr +ffffffff81efeb30 t sdma_v4_4_2_page_ring_set_wptr +ffffffff81efec40 t sdma_v4_4_2_emit_copy_buffer +ffffffff81efed00 t sdma_v4_4_2_emit_fill_buffer +ffffffff81efed90 t sdma_v4_4_2_vm_copy_pte +ffffffff81efee50 t sdma_v4_4_2_vm_write_pte +ffffffff81efef20 t sdma_v4_4_2_vm_set_pte_pde +ffffffff81eff020 t sdma_v4_4_2_set_trap_irq_state +ffffffff81eff100 t sdma_v4_4_2_process_trap_irq +ffffffff81eff220 t sdma_v4_4_2_process_illegal_inst_irq +ffffffff81eff2b0 t sdma_v4_4_2_set_ecc_irq_state +ffffffff81eff390 t sdma_v4_4_2_process_vm_hole_irq +ffffffff81eff470 t sdma_v4_4_2_process_doorbell_invalid_irq +ffffffff81eff550 t sdma_v4_4_2_process_pool_timeout_irq +ffffffff81eff630 t sdma_v4_4_2_process_srbm_write_irq +ffffffff81eff710 t sdma_v4_4_2_query_ras_error_count +ffffffff81eff860 t sdma_v4_4_2_reset_ras_error_count +ffffffff81eff990 t sdma_v4_4_2_inst_init_golden_registers +ffffffff81effb10 t sdma_v4_4_2_inst_start +ffffffff81f00eb0 t sdma_v4_4_2_inst_ctx_switch_enable +ffffffff81f01180 t sdma_v4_4_2_inst_enable +ffffffff81f02000 t sdma_v5_0_early_init +ffffffff81f02130 t sdma_v5_0_sw_init +ffffffff81f02310 t sdma_v5_0_sw_fini +ffffffff81f023a0 t sdma_v5_0_hw_init +ffffffff81f03600 t sdma_v5_0_hw_fini +ffffffff81f03660 t sdma_v5_0_suspend +ffffffff81f036c0 t sdma_v5_0_resume +ffffffff81f036d0 t sdma_v5_0_is_idle +ffffffff81f03760 t sdma_v5_0_wait_for_idle +ffffffff81f03820 t sdma_v5_0_soft_reset +ffffffff81f03850 t sdma_v5_0_set_clockgating_state +ffffffff81f03a50 t sdma_v5_0_set_powergating_state +ffffffff81f03a80 t sdma_v5_0_get_clockgating_state +ffffffff81f03b20 t sdma_v5_0_ring_get_rptr +ffffffff81f03b80 t sdma_v5_0_ring_get_wptr +ffffffff81f03d20 t sdma_v5_0_ring_set_wptr +ffffffff81f04070 t sdma_v5_0_ring_emit_ib +ffffffff81f04330 t sdma_v5_0_ring_emit_fence +ffffffff81f04790 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81f04a10 t sdma_v5_0_ring_emit_vm_flush +ffffffff81f04a30 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81f04cd0 t sdma_v5_0_ring_test_ring +ffffffff81f05090 t sdma_v5_0_ring_test_ib +ffffffff81f053c0 t sdma_v5_0_ring_insert_nop +ffffffff81f054f0 t sdma_v5_0_ring_pad_ib +ffffffff81f05620 t sdma_v5_0_ring_init_cond_exec +ffffffff81f05850 t sdma_v5_0_ring_patch_cond_exec +ffffffff81f05910 t sdma_v5_0_ring_emit_wreg +ffffffff81f05a60 t sdma_v5_0_ring_emit_reg_wait +ffffffff81f05ce0 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81f05d60 t sdma_v5_0_ring_preempt_ib +ffffffff81f05ea0 t sdma_v5_0_ring_emit_mem_sync +ffffffff81f060b0 t sdma_v5_0_emit_copy_buffer +ffffffff81f06170 t sdma_v5_0_emit_fill_buffer +ffffffff81f06200 t sdma_v5_0_vm_copy_pte +ffffffff81f062c0 t sdma_v5_0_vm_write_pte +ffffffff81f06390 t sdma_v5_0_vm_set_pte_pde +ffffffff81f06490 t sdma_v5_0_set_trap_irq_state +ffffffff81f06520 t sdma_v5_0_process_trap_irq +ffffffff81f06630 t sdma_v5_0_process_illegal_inst_irq +ffffffff81f06660 t sdma_v5_0_mqd_init +ffffffff81f06740 t sdma_v5_0_ctx_switch_enable +ffffffff81f06a80 t sdma_v5_0_enable +ffffffff81f07000 t sdma_v5_2_early_init +ffffffff81f07130 t sdma_v5_2_sw_init +ffffffff81f07390 t sdma_v5_2_sw_fini +ffffffff81f07420 t sdma_v5_2_hw_init +ffffffff81f08fc0 t sdma_v5_2_hw_fini +ffffffff81f09020 t sdma_v5_2_suspend +ffffffff81f09080 t sdma_v5_2_resume +ffffffff81f09090 t sdma_v5_2_is_idle +ffffffff81f09140 t sdma_v5_2_wait_for_idle +ffffffff81f09240 t sdma_v5_2_soft_reset +ffffffff81f09500 t sdma_v5_2_set_clockgating_state +ffffffff81f09860 t sdma_v5_2_set_powergating_state +ffffffff81f09890 t sdma_v5_2_get_clockgating_state +ffffffff81f09920 t sdma_v5_2_ring_get_rptr +ffffffff81f09980 t sdma_v5_2_ring_get_wptr +ffffffff81f09ac0 t sdma_v5_2_ring_set_wptr +ffffffff81f09c70 t sdma_v5_2_ring_emit_ib +ffffffff81f09f30 t sdma_v5_2_ring_emit_fence +ffffffff81f0a390 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81f0a610 t sdma_v5_2_ring_emit_vm_flush +ffffffff81f0a630 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81f0a8d0 t sdma_v5_2_ring_test_ring +ffffffff81f0ac90 t sdma_v5_2_ring_test_ib +ffffffff81f0afc0 t sdma_v5_2_ring_insert_nop +ffffffff81f0b0f0 t sdma_v5_2_ring_pad_ib +ffffffff81f0b220 t sdma_v5_2_ring_init_cond_exec +ffffffff81f0b450 t sdma_v5_2_ring_patch_cond_exec +ffffffff81f0b510 t sdma_v5_2_ring_begin_use +ffffffff81f0b530 t sdma_v5_2_ring_end_use +ffffffff81f0b550 t sdma_v5_2_ring_emit_wreg +ffffffff81f0b6a0 t sdma_v5_2_ring_emit_reg_wait +ffffffff81f0b920 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81f0b9a0 t sdma_v5_2_ring_preempt_ib +ffffffff81f0bb10 t sdma_v5_2_ring_emit_mem_sync +ffffffff81f0bd20 t sdma_v5_2_emit_copy_buffer +ffffffff81f0bde0 t sdma_v5_2_emit_fill_buffer +ffffffff81f0be70 t sdma_v5_2_vm_copy_pte +ffffffff81f0bf30 t sdma_v5_2_vm_write_pte +ffffffff81f0c000 t sdma_v5_2_vm_set_pte_pde +ffffffff81f0c100 t sdma_v5_2_set_trap_irq_state +ffffffff81f0c1c0 t sdma_v5_2_process_trap_irq +ffffffff81f0c300 t sdma_v5_2_process_illegal_inst_irq +ffffffff81f0c330 t sdma_v5_2_mqd_init +ffffffff81f0c410 t sdma_v5_2_ctx_switch_enable +ffffffff81f0c820 t sdma_v5_2_enable +ffffffff81f0d000 t sdma_v6_0_early_init +ffffffff81f0d120 t sdma_v6_0_sw_init +ffffffff81f0d2e0 t sdma_v6_0_sw_fini +ffffffff81f0d370 t sdma_v6_0_hw_init +ffffffff81f0d380 t sdma_v6_0_hw_fini +ffffffff81f0d450 t sdma_v6_0_suspend +ffffffff81f0d490 t sdma_v6_0_resume +ffffffff81f0d4a0 t sdma_v6_0_is_idle +ffffffff81f0d530 t sdma_v6_0_wait_for_idle +ffffffff81f0d5f0 t sdma_v6_0_check_soft_reset +ffffffff81f0d6b0 t sdma_v6_0_soft_reset +ffffffff81f0db70 t sdma_v6_0_set_clockgating_state +ffffffff81f0dba0 t sdma_v6_0_set_powergating_state +ffffffff81f0dbd0 t sdma_v6_0_get_clockgating_state +ffffffff81f0dc00 t sdma_v6_0_ring_get_rptr +ffffffff81f0dc60 t sdma_v6_0_ring_get_wptr +ffffffff81f0dcd0 t sdma_v6_0_ring_set_wptr +ffffffff81f0e020 t sdma_v6_0_ring_emit_ib +ffffffff81f0e2e0 t sdma_v6_0_ring_emit_fence +ffffffff81f0e740 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81f0e9c0 t sdma_v6_0_ring_emit_vm_flush +ffffffff81f0ec30 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81f0eed0 t sdma_v6_0_ring_test_ring +ffffffff81f0f290 t sdma_v6_0_ring_test_ib +ffffffff81f0f5c0 t sdma_v6_0_ring_insert_nop +ffffffff81f0f6f0 t sdma_v6_0_ring_pad_ib +ffffffff81f0f820 t sdma_v6_0_ring_init_cond_exec +ffffffff81f0fa50 t sdma_v6_0_ring_patch_cond_exec +ffffffff81f0fb10 t sdma_v6_0_ring_emit_wreg +ffffffff81f0fc60 t sdma_v6_0_ring_emit_reg_wait +ffffffff81f0fee0 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81f0ff60 t sdma_v6_0_ring_preempt_ib +ffffffff81f100b0 t sdma_v6_0_ring_emit_mem_sync +ffffffff81f102c0 t sdma_v6_0_emit_copy_buffer +ffffffff81f10380 t sdma_v6_0_emit_fill_buffer +ffffffff81f10410 t sdma_v6_0_vm_copy_pte +ffffffff81f104d0 t sdma_v6_0_vm_write_pte +ffffffff81f105a0 t sdma_v6_0_vm_set_pte_pde +ffffffff81f106a0 t sdma_v6_0_set_trap_irq_state +ffffffff81f10730 t sdma_v6_0_process_trap_irq +ffffffff81f10860 t sdma_v6_0_process_illegal_inst_irq +ffffffff81f10890 t sdma_v6_0_mqd_init +ffffffff81f109b0 t sdma_v6_0_start +ffffffff81f10c90 t sdma_v6_0_enable +ffffffff81f10e20 t sdma_v6_0_gfx_resume +ffffffff81f11eb0 t sdma_v6_0_gfx_stop +ffffffff81f13000 T sienna_cichlid_reset_init +ffffffff81f130c0 t sienna_cichlid_async_reset +ffffffff81f13120 t sienna_cichlid_get_reset_handler +ffffffff81f131b0 T sienna_cichlid_reset_fini +ffffffff81f13210 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81f13360 t sienna_cichlid_mode2_perform_reset +ffffffff81f133e0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81f136d0 t sienna_cichlid_mode2_reset +ffffffff81f14000 T smu_v11_0_i2c_control_init +ffffffff81f140d0 T smu_v11_0_i2c_control_fini +ffffffff81f14110 t smu_v11_0_i2c_xfer +ffffffff81f152c0 t smu_v11_0_i2c_func +ffffffff81f152f0 t smu_v11_0_i2c_enable +ffffffff81f15440 t smu_v11_0_i2c_abort +ffffffff81f15550 t lock_bus +ffffffff81f155f0 t trylock_bus +ffffffff81f15640 t unlock_bus +ffffffff81f16000 T smu_v13_0_10_reset_init +ffffffff81f160c0 t smu_v13_0_10_async_reset +ffffffff81f16120 t smu_v13_0_10_get_reset_handler +ffffffff81f161d0 T smu_v13_0_10_reset_fini +ffffffff81f16230 t smu_v13_0_10_mode2_prepare_hwcontext +ffffffff81f16360 t smu_v13_0_10_mode2_perform_reset +ffffffff81f163e0 t smu_v13_0_10_mode2_restore_hwcontext +ffffffff81f16740 t smu_v13_0_10_mode2_reset +ffffffff81f17000 t smuio_v11_0_get_rom_index_offset +ffffffff81f17040 t smuio_v11_0_get_rom_data_offset +ffffffff81f17080 t smuio_v11_0_update_rom_clock_gating +ffffffff81f171d0 t smuio_v11_0_get_clock_gating_state +ffffffff81f18000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81f18040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81f18080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81f181d0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81f19000 t smuio_v13_0_get_rom_index_offset +ffffffff81f19040 t smuio_v13_0_get_rom_data_offset +ffffffff81f19080 t smuio_v13_0_update_rom_clock_gating +ffffffff81f191d0 t smuio_v13_0_get_clock_gating_state +ffffffff81f19270 t smuio_v13_0_get_die_id +ffffffff81f192f0 t smuio_v13_0_get_socket_id +ffffffff81f19380 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81f1a000 t smuio_v13_0_3_get_die_id +ffffffff81f1a080 t smuio_v13_0_3_get_socket_id +ffffffff81f1a110 t smuio_v13_0_3_get_pkg_type +ffffffff81f1b000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81f1b040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81f1c000 t smuio_v9_0_get_rom_index_offset +ffffffff81f1c040 t smuio_v9_0_get_rom_data_offset +ffffffff81f1c080 t smuio_v9_0_update_rom_clock_gating +ffffffff81f1c1c0 t smuio_v9_0_get_clock_gating_state +ffffffff81f1d000 T soc15_grbm_select +ffffffff81f1d090 T soc15_program_register_sequence +ffffffff81f1d290 T soc15_set_virt_ops +ffffffff81f1d300 t soc15_common_early_init +ffffffff81f1d720 t soc15_common_late_init +ffffffff81f1d780 t soc15_common_sw_init +ffffffff81f1d7e0 t soc15_common_sw_fini +ffffffff81f1d830 t soc15_common_hw_init +ffffffff81f1d950 t soc15_common_hw_fini +ffffffff81f1da20 t soc15_common_suspend +ffffffff81f1da60 t soc15_common_resume +ffffffff81f1daa0 t soc15_common_is_idle +ffffffff81f1dad0 t soc15_common_wait_for_idle +ffffffff81f1db00 t soc15_common_soft_reset +ffffffff81f1db30 t soc15_common_set_clockgating_state +ffffffff81f1de70 t soc15_common_set_powergating_state +ffffffff81f1dea0 t soc15_common_get_clockgating_state +ffffffff81f1dfd0 t soc15_uvd_ctx_rreg +ffffffff81f1e070 t soc15_uvd_ctx_wreg +ffffffff81f1e100 t soc15_didt_rreg +ffffffff81f1e1a0 t soc15_didt_wreg +ffffffff81f1e220 t soc15_gc_cac_rreg +ffffffff81f1e340 t soc15_gc_cac_wreg +ffffffff81f1e450 t soc15_se_cac_rreg +ffffffff81f1e570 t soc15_se_cac_wreg +ffffffff81f1e680 t soc15_read_disabled_bios +ffffffff81f1e6b0 t soc15_read_register +ffffffff81f1e7b0 t soc15_asic_reset +ffffffff81f1e8b0 t soc15_asic_reset_method +ffffffff81f1ea60 t soc15_get_xclk +ffffffff81f1eac0 t soc15_set_uvd_clocks +ffffffff81f1eaf0 t soc15_set_vce_clocks +ffffffff81f1eb20 t soc15_get_config_memsize +ffffffff81f1eb40 t soc15_need_full_reset +ffffffff81f1eb70 t soc15_get_pcie_usage +ffffffff81f1eca0 t soc15_need_reset_on_init +ffffffff81f1ed50 t soc15_get_pcie_replay_count +ffffffff81f1edc0 t soc15_supports_baco +ffffffff81f1ee20 t soc15_pre_asic_init +ffffffff81f1ee30 t soc15_query_video_codecs +ffffffff81f1ef20 t vega20_get_pcie_usage +ffffffff81f20000 T soc21_grbm_select +ffffffff81f20090 t soc21_common_early_init +ffffffff81f20200 t soc21_common_late_init +ffffffff81f202e0 t soc21_common_sw_init +ffffffff81f20320 t soc21_common_sw_fini +ffffffff81f20350 t soc21_common_hw_init +ffffffff81f20410 t soc21_common_hw_fini +ffffffff81f204b0 t soc21_common_suspend +ffffffff81f20550 t soc21_common_resume +ffffffff81f20610 t soc21_common_is_idle +ffffffff81f20640 t soc21_common_wait_for_idle +ffffffff81f20670 t soc21_common_soft_reset +ffffffff81f206a0 t soc21_common_set_clockgating_state +ffffffff81f20750 t soc21_common_set_powergating_state +ffffffff81f207b0 t soc21_common_get_clockgating_state +ffffffff81f20800 t soc21_didt_rreg +ffffffff81f208a0 t soc21_didt_wreg +ffffffff81f20920 t soc21_read_disabled_bios +ffffffff81f20950 t soc21_read_register +ffffffff81f20a40 t soc21_asic_reset +ffffffff81f20b20 t soc21_asic_reset_method +ffffffff81f20be0 t soc21_get_xclk +ffffffff81f20c10 t soc21_set_uvd_clocks +ffffffff81f20c40 t soc21_set_vce_clocks +ffffffff81f20c70 t soc21_get_config_memsize +ffffffff81f20c90 t soc21_need_full_reset +ffffffff81f20cf0 t soc21_init_doorbell_index +ffffffff81f20e10 t soc21_need_reset_on_init +ffffffff81f20eb0 t soc21_pre_asic_init +ffffffff81f20ee0 t soc21_update_umd_stable_pstate +ffffffff81f20f60 t soc21_query_video_codecs +ffffffff81f22000 t tonga_ih_early_init +ffffffff81f22050 t tonga_ih_sw_init +ffffffff81f220d0 t tonga_ih_sw_fini +ffffffff81f22110 t tonga_ih_hw_init +ffffffff81f222f0 t tonga_ih_hw_fini +ffffffff81f22390 t tonga_ih_suspend +ffffffff81f22430 t tonga_ih_resume +ffffffff81f22470 t tonga_ih_is_idle +ffffffff81f224c0 t tonga_ih_wait_for_idle +ffffffff81f22560 t tonga_ih_check_soft_reset +ffffffff81f225c0 t tonga_ih_pre_soft_reset +ffffffff81f22670 t tonga_ih_soft_reset +ffffffff81f22740 t tonga_ih_post_soft_reset +ffffffff81f22780 t tonga_ih_set_clockgating_state +ffffffff81f227b0 t tonga_ih_set_powergating_state +ffffffff81f227e0 t tonga_ih_get_wptr +ffffffff81f228d0 t tonga_ih_decode_iv +ffffffff81f22950 t tonga_ih_set_rptr +ffffffff81f23000 t umc_v6_0_init_registers +ffffffff81f24000 t umc_v6_1_query_ras_error_count +ffffffff81f244e0 t umc_v6_1_query_ras_error_address +ffffffff81f247c0 t umc_v6_1_err_cnt_init +ffffffff81f25000 T umc_v6_7_convert_error_address +ffffffff81f25320 t umc_v6_7_query_ras_error_count +ffffffff81f25360 t umc_v6_7_query_ras_error_address +ffffffff81f25380 t umc_v6_7_query_ras_poison_mode +ffffffff81f253e0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81f25400 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81f25420 t umc_v6_7_query_ecc_error_count +ffffffff81f25690 t umc_v6_7_reset_error_count_per_channel +ffffffff81f25790 t umc_v6_7_query_error_address +ffffffff81f258b0 t umc_v6_7_ecc_info_querry_ecc_error_count +ffffffff81f25a80 t umc_v6_7_ecc_info_query_error_address +ffffffff81f26000 t umc_v8_10_query_ras_error_count +ffffffff81f26040 t umc_v8_10_query_ras_error_address +ffffffff81f26060 t umc_v8_10_err_cnt_init +ffffffff81f26080 t umc_v8_10_query_ras_poison_mode +ffffffff81f260b0 t umc_v8_10_ecc_info_query_ras_error_count +ffffffff81f260d0 t umc_v8_10_ecc_info_query_ras_error_address +ffffffff81f260f0 t umc_v8_10_set_eeprom_table_version +ffffffff81f26120 t umc_v8_10_query_ecc_error_count +ffffffff81f261f0 t umc_v8_10_clear_error_count_per_channel +ffffffff81f26260 t umc_v8_10_query_error_address +ffffffff81f26390 t umc_v8_10_convert_error_address +ffffffff81f265b0 t umc_v8_10_err_cnt_init_per_channel +ffffffff81f26660 t umc_v8_10_ecc_info_query_ecc_error_count +ffffffff81f26740 t umc_v8_10_ecc_info_query_error_address +ffffffff81f27000 t umc_v8_7_query_ras_error_count +ffffffff81f27310 t umc_v8_7_query_ras_error_address +ffffffff81f274d0 t umc_v8_7_err_cnt_init +ffffffff81f27630 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81f27750 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81f28000 t uvd_v5_0_early_init +ffffffff81f28050 t uvd_v5_0_sw_init +ffffffff81f28140 t uvd_v5_0_sw_fini +ffffffff81f28190 t uvd_v5_0_hw_init +ffffffff81f28690 t uvd_v5_0_hw_fini +ffffffff81f28710 t uvd_v5_0_suspend +ffffffff81f28810 t uvd_v5_0_resume +ffffffff81f28860 t uvd_v5_0_is_idle +ffffffff81f288b0 t uvd_v5_0_wait_for_idle +ffffffff81f28940 t uvd_v5_0_soft_reset +ffffffff81f289e0 t uvd_v5_0_set_clockgating_state +ffffffff81f28b80 t uvd_v5_0_set_powergating_state +ffffffff81f28bc0 t uvd_v5_0_get_clockgating_state +ffffffff81f28c40 t uvd_v5_0_ring_get_rptr +ffffffff81f28c80 t uvd_v5_0_ring_get_wptr +ffffffff81f28cc0 t uvd_v5_0_ring_set_wptr +ffffffff81f28cf0 t uvd_v5_0_ring_emit_ib +ffffffff81f28f60 t uvd_v5_0_ring_emit_fence +ffffffff81f29510 t uvd_v5_0_ring_test_ring +ffffffff81f296b0 t uvd_v5_0_ring_insert_nop +ffffffff81f29810 t uvd_v5_0_set_interrupt_state +ffffffff81f29840 t uvd_v5_0_process_interrupt +ffffffff81f298a0 t uvd_v5_0_stop +ffffffff81f299b0 t uvd_v5_0_start +ffffffff81f2b000 t uvd_v6_0_early_init +ffffffff81f2b160 t uvd_v6_0_sw_init +ffffffff81f2b3c0 t uvd_v6_0_sw_fini +ffffffff81f2b480 t uvd_v6_0_hw_init +ffffffff81f2ba30 t uvd_v6_0_hw_fini +ffffffff81f2bab0 t uvd_v6_0_suspend +ffffffff81f2bbb0 t uvd_v6_0_resume +ffffffff81f2bc00 t uvd_v6_0_is_idle +ffffffff81f2bc50 t uvd_v6_0_wait_for_idle +ffffffff81f2bce0 t uvd_v6_0_check_soft_reset +ffffffff81f2bd60 t uvd_v6_0_pre_soft_reset +ffffffff81f2bda0 t uvd_v6_0_soft_reset +ffffffff81f2be70 t uvd_v6_0_post_soft_reset +ffffffff81f2bf10 t uvd_v6_0_set_clockgating_state +ffffffff81f2c0a0 t uvd_v6_0_set_powergating_state +ffffffff81f2c110 t uvd_v6_0_get_clockgating_state +ffffffff81f2c1a0 t uvd_v6_0_ring_get_rptr +ffffffff81f2c1e0 t uvd_v6_0_ring_get_wptr +ffffffff81f2c220 t uvd_v6_0_ring_set_wptr +ffffffff81f2c250 t uvd_v6_0_ring_emit_ib +ffffffff81f2c5b0 t uvd_v6_0_ring_emit_fence +ffffffff81f2cb60 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81f2cf50 t uvd_v6_0_ring_emit_vm_flush +ffffffff81f2d2b0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81f2d2e0 t uvd_v6_0_ring_test_ring +ffffffff81f2d480 t uvd_v6_0_ring_insert_nop +ffffffff81f2d5e0 t uvd_v6_0_ring_emit_wreg +ffffffff81f2d860 t uvd_v6_0_enc_ring_get_rptr +ffffffff81f2d8c0 t uvd_v6_0_enc_ring_get_wptr +ffffffff81f2d920 t uvd_v6_0_enc_ring_set_wptr +ffffffff81f2d960 t uvd_v6_0_enc_ring_emit_ib +ffffffff81f2dba0 t uvd_v6_0_enc_ring_emit_fence +ffffffff81f2dde0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81f2df90 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81f2e1a0 t uvd_v6_0_enc_ring_test_ring +ffffffff81f2e2f0 t uvd_v6_0_enc_ring_test_ib +ffffffff81f2e7d0 t uvd_v6_0_enc_ring_insert_end +ffffffff81f2e860 t uvd_v6_0_set_interrupt_state +ffffffff81f2e890 t uvd_v6_0_process_interrupt +ffffffff81f2e990 t uvd_v6_0_stop +ffffffff81f2eaa0 t uvd_v6_0_start +ffffffff81f30000 t uvd_v7_0_early_init +ffffffff81f30270 t uvd_v7_0_sw_init +ffffffff81f30690 t uvd_v7_0_sw_fini +ffffffff81f30780 t uvd_v7_0_hw_init +ffffffff81f33540 t uvd_v7_0_hw_fini +ffffffff81f33850 t uvd_v7_0_suspend +ffffffff81f33900 t uvd_v7_0_resume +ffffffff81f33950 t uvd_v7_0_set_clockgating_state +ffffffff81f33980 t uvd_v7_0_ring_get_rptr +ffffffff81f33a20 t uvd_v7_0_ring_get_wptr +ffffffff81f33ac0 t uvd_v7_0_ring_set_wptr +ffffffff81f33b40 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81f33bb0 t uvd_v7_0_ring_emit_ib +ffffffff81f33f50 t uvd_v7_0_ring_emit_fence +ffffffff81f345a0 t uvd_v7_0_ring_emit_vm_flush +ffffffff81f34610 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81f34640 t uvd_v7_0_ring_test_ring +ffffffff81f348d0 t uvd_v7_0_ring_insert_nop +ffffffff81f34a70 t uvd_v7_0_ring_emit_wreg +ffffffff81f34d40 t uvd_v7_0_ring_emit_reg_wait +ffffffff81f350f0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81f351e0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81f352e0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81f353e0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81f35620 t uvd_v7_0_enc_ring_emit_fence +ffffffff81f35860 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81f358d0 t uvd_v7_0_enc_ring_test_ring +ffffffff81f35a30 t uvd_v7_0_enc_ring_test_ib +ffffffff81f35f10 t uvd_v7_0_enc_ring_insert_end +ffffffff81f35fa0 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81f360f0 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81f362b0 t uvd_v7_0_set_interrupt_state +ffffffff81f362e0 t uvd_v7_0_process_interrupt +ffffffff81f37000 t vce_v3_0_early_init +ffffffff81f37180 t vce_v3_0_sw_init +ffffffff81f372e0 t vce_v3_0_sw_fini +ffffffff81f37330 t vce_v3_0_hw_init +ffffffff81f37400 t vce_v3_0_hw_fini +ffffffff81f374f0 t vce_v3_0_suspend +ffffffff81f375c0 t vce_v3_0_resume +ffffffff81f376a0 t vce_v3_0_is_idle +ffffffff81f37710 t vce_v3_0_wait_for_idle +ffffffff81f377c0 t vce_v3_0_check_soft_reset +ffffffff81f378c0 t vce_v3_0_pre_soft_reset +ffffffff81f37960 t vce_v3_0_soft_reset +ffffffff81f37a30 t vce_v3_0_post_soft_reset +ffffffff81f37ad0 t vce_v3_0_set_clockgating_state +ffffffff81f37dc0 t vce_v3_0_set_powergating_state +ffffffff81f385e0 t vce_v3_0_get_clockgating_state +ffffffff81f386a0 t vce_v3_0_ring_get_rptr +ffffffff81f38770 t vce_v3_0_ring_get_wptr +ffffffff81f38840 t vce_v3_0_ring_set_wptr +ffffffff81f38900 t vce_v3_0_ring_emit_ib +ffffffff81f38b40 t vce_v3_0_emit_pipeline_sync +ffffffff81f38cf0 t vce_v3_0_emit_vm_flush +ffffffff81f38f60 t vce_v3_0_set_interrupt_state +ffffffff81f38fd0 t vce_v3_0_process_interrupt +ffffffff81f39090 t vce_v3_0_stop +ffffffff81f3a000 t vce_v4_0_early_init +ffffffff81f3a0b0 t vce_v4_0_sw_init +ffffffff81f3a350 t vce_v4_0_sw_fini +ffffffff81f3a3d0 t vce_v4_0_hw_init +ffffffff81f3ab90 t vce_v4_0_hw_fini +ffffffff81f3acc0 t vce_v4_0_suspend +ffffffff81f3ade0 t vce_v4_0_resume +ffffffff81f3ae90 t vce_v4_0_set_clockgating_state +ffffffff81f3aec0 t vce_v4_0_set_powergating_state +ffffffff81f3afa0 t vce_v4_0_ring_get_rptr +ffffffff81f3b010 t vce_v4_0_ring_get_wptr +ffffffff81f3b0a0 t vce_v4_0_ring_set_wptr +ffffffff81f3b130 t vce_v4_0_ring_emit_ib +ffffffff81f3b370 t vce_v4_0_ring_emit_fence +ffffffff81f3b5b0 t vce_v4_0_emit_vm_flush +ffffffff81f3b620 t vce_v4_0_ring_insert_end +ffffffff81f3b6b0 t vce_v4_0_emit_wreg +ffffffff81f3b800 t vce_v4_0_emit_reg_wait +ffffffff81f3b9c0 t vce_v4_0_set_interrupt_state +ffffffff81f3ba50 t vce_v4_0_process_interrupt +ffffffff81f3baf0 t vce_v4_0_start +ffffffff81f3d000 T vcn_dec_sw_ring_emit_fence +ffffffff81f3d240 T vcn_dec_sw_ring_insert_end +ffffffff81f3d2d0 T vcn_dec_sw_ring_emit_ib +ffffffff81f3d510 T vcn_dec_sw_ring_emit_reg_wait +ffffffff81f3d6d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81f3d740 T vcn_dec_sw_ring_emit_wreg +ffffffff81f3e000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81f3e140 T vcn_v1_0_ring_end_use +ffffffff81f3e1b0 t vcn_v1_0_early_init +ffffffff81f3e310 t vcn_v1_0_sw_init +ffffffff81f3e5b0 t vcn_v1_0_sw_fini +ffffffff81f3e610 t vcn_v1_0_hw_init +ffffffff81f3e6e0 t vcn_v1_0_hw_fini +ffffffff81f3e7e0 t vcn_v1_0_suspend +ffffffff81f3e850 t vcn_v1_0_resume +ffffffff81f3e930 t vcn_v1_0_is_idle +ffffffff81f3e9c0 t vcn_v1_0_wait_for_idle +ffffffff81f3ea00 t vcn_v1_0_set_clockgating_state +ffffffff81f3eab0 t vcn_v1_0_set_powergating_state +ffffffff81f3f010 t vcn_v1_0_dec_ring_get_rptr +ffffffff81f3f0a0 t vcn_v1_0_dec_ring_get_wptr +ffffffff81f3f130 t vcn_v1_0_dec_ring_set_wptr +ffffffff81f3f240 t vcn_v1_0_ring_patch_cs_in_place +ffffffff81f3f400 t vcn_v1_0_dec_ring_emit_ib +ffffffff81f3f780 t vcn_v1_0_dec_ring_emit_fence +ffffffff81f3fd90 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff81f3fe00 t vcn_v1_0_dec_ring_insert_nop +ffffffff81f3ff90 t vcn_v1_0_dec_ring_insert_start +ffffffff81f40160 t vcn_v1_0_dec_ring_insert_end +ffffffff81f40270 t vcn_v1_0_ring_begin_use +ffffffff81f40310 t vcn_v1_0_dec_ring_emit_wreg +ffffffff81f405c0 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff81f40940 t vcn_v1_0_enc_ring_get_rptr +ffffffff81f40a20 t vcn_v1_0_enc_ring_get_wptr +ffffffff81f40b00 t vcn_v1_0_enc_ring_set_wptr +ffffffff81f40bc0 t vcn_v1_0_enc_ring_emit_ib +ffffffff81f40e00 t vcn_v1_0_enc_ring_emit_fence +ffffffff81f41040 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81f410b0 t vcn_v1_0_enc_ring_insert_end +ffffffff81f41140 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81f41290 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81f41450 t vcn_v1_0_set_interrupt_state +ffffffff81f41480 t vcn_v1_0_process_interrupt +ffffffff81f41530 t vcn_v1_0_idle_work_handler +ffffffff81f416a0 t vcn_v1_0_pause_dpg_mode +ffffffff81f42540 t vcn_v1_0_enable_clock_gating +ffffffff81f42970 t vcn_v1_0_disable_clock_gating +ffffffff81f42f30 t vcn_1_0_enable_static_power_gating +ffffffff81f430e0 t vcn_v1_0_start_dpg_mode +ffffffff81f46ea0 t vcn_v1_0_start_spg_mode +ffffffff81f490a0 t vcn_v1_0_clock_gating_dpg_mode +ffffffff81f4a000 T vcn_v2_0_dec_ring_insert_start +ffffffff81f4a1c0 T vcn_v2_0_dec_ring_insert_end +ffffffff81f4a2c0 T vcn_v2_0_dec_ring_insert_nop +ffffffff81f4a430 T vcn_v2_0_dec_ring_emit_fence +ffffffff81f4a9f0 T vcn_v2_0_dec_ring_emit_ib +ffffffff81f4ad50 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff81f4b0a0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff81f4b110 T vcn_v2_0_dec_ring_emit_wreg +ffffffff81f4b390 T vcn_v2_0_enc_ring_emit_fence +ffffffff81f4b5d0 T vcn_v2_0_enc_ring_insert_end +ffffffff81f4b660 T vcn_v2_0_enc_ring_emit_ib +ffffffff81f4b8a0 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff81f4ba60 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff81f4bad0 T vcn_v2_0_enc_ring_emit_wreg +ffffffff81f4bc20 T vcn_v2_0_dec_ring_test_ring +ffffffff81f4bec0 t vcn_v2_0_early_init +ffffffff81f4c020 t vcn_v2_0_sw_init +ffffffff81f4c350 t vcn_v2_0_sw_fini +ffffffff81f4c3d0 t vcn_v2_0_hw_init +ffffffff81f4cd50 t vcn_v2_0_hw_fini +ffffffff81f4ce50 t vcn_v2_0_suspend +ffffffff81f4ce80 t vcn_v2_0_resume +ffffffff81f4ced0 t vcn_v2_0_is_idle +ffffffff81f4cf60 t vcn_v2_0_wait_for_idle +ffffffff81f4cfa0 t vcn_v2_0_set_clockgating_state +ffffffff81f4d030 t vcn_v2_0_set_powergating_state +ffffffff81f4d5f0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81f4d680 t vcn_v2_0_dec_ring_get_wptr +ffffffff81f4d720 t vcn_v2_0_dec_ring_set_wptr +ffffffff81f4d860 t vcn_v2_0_enc_ring_get_rptr +ffffffff81f4d940 t vcn_v2_0_enc_ring_get_wptr +ffffffff81f4da30 t vcn_v2_0_enc_ring_set_wptr +ffffffff81f4db20 t vcn_v2_0_set_interrupt_state +ffffffff81f4db50 t vcn_v2_0_process_interrupt +ffffffff81f4dc00 t vcn_v2_0_pause_dpg_mode +ffffffff81f4e3f0 t vcn_v2_0_enable_clock_gating +ffffffff81f4e680 t vcn_v2_0_disable_clock_gating +ffffffff81f4eaa0 t vcn_v2_0_start +ffffffff81f53050 t vcn_v2_0_enable_static_power_gating +ffffffff81f531b0 t vcn_v2_0_clock_gating_dpg_mode +ffffffff81f53f30 t vcn_v2_0_mc_resume_dpg_mode +ffffffff81f59000 t vcn_v2_6_query_poison_status +ffffffff81f590e0 t vcn_v2_5_early_init +ffffffff81f593b0 t vcn_v2_5_sw_init +ffffffff81f59880 t vcn_v2_5_sw_fini +ffffffff81f59950 t vcn_v2_5_hw_init +ffffffff81f5a390 t vcn_v2_5_hw_fini +ffffffff81f5a500 t vcn_v2_5_suspend +ffffffff81f5a530 t vcn_v2_5_resume +ffffffff81f5a580 t vcn_v2_5_is_idle +ffffffff81f5a670 t vcn_v2_5_wait_for_idle +ffffffff81f5a710 t vcn_v2_5_set_clockgating_state +ffffffff81f5a790 t vcn_v2_5_set_powergating_state +ffffffff81f5c9e0 t vcn_v2_5_dec_ring_get_rptr +ffffffff81f5ca80 t vcn_v2_5_dec_ring_get_wptr +ffffffff81f5cb30 t vcn_v2_5_dec_ring_set_wptr +ffffffff81f5cbe0 t vcn_v2_5_enc_ring_get_rptr +ffffffff81f5ccd0 t vcn_v2_5_enc_ring_get_wptr +ffffffff81f5cde0 t vcn_v2_5_enc_ring_set_wptr +ffffffff81f5cef0 t vcn_v2_5_set_interrupt_state +ffffffff81f5cf20 t vcn_v2_5_process_interrupt +ffffffff81f5d010 t vcn_v2_6_set_ras_interrupt_state +ffffffff81f5d040 t vcn_v2_5_pause_dpg_mode +ffffffff81f5d7c0 t vcn_v2_5_enable_clock_gating +ffffffff81f5dad0 t vcn_v2_5_disable_clock_gating +ffffffff81f5dfc0 t vcn_v2_5_start_dpg_mode +ffffffff81f61990 t vcn_v2_5_clock_gating_dpg_mode +ffffffff81f62740 t vcn_v2_5_mc_resume_dpg_mode +ffffffff81f67000 t vcn_v3_0_early_init +ffffffff81f67220 t vcn_v3_0_sw_init +ffffffff81f676e0 t vcn_v3_0_sw_fini +ffffffff81f677c0 t vcn_v3_0_hw_init +ffffffff81f68310 t vcn_v3_0_hw_fini +ffffffff81f68410 t vcn_v3_0_suspend +ffffffff81f68440 t vcn_v3_0_resume +ffffffff81f68490 t vcn_v3_0_is_idle +ffffffff81f68580 t vcn_v3_0_wait_for_idle +ffffffff81f68620 t vcn_v3_0_set_clockgating_state +ffffffff81f68730 t vcn_v3_0_set_powergating_state +ffffffff81f6acc0 t vcn_v3_0_dec_ring_get_rptr +ffffffff81f6ad60 t vcn_v3_0_dec_ring_get_wptr +ffffffff81f6ae10 t vcn_v3_0_dec_ring_set_wptr +ffffffff81f6af80 t vcn_v3_0_ring_patch_cs_in_place +ffffffff81f6b2a0 t vcn_v3_0_enc_ring_get_rptr +ffffffff81f6b390 t vcn_v3_0_enc_ring_get_wptr +ffffffff81f6b4a0 t vcn_v3_0_enc_ring_set_wptr +ffffffff81f6b5b0 t vcn_v3_0_set_interrupt_state +ffffffff81f6b5e0 t vcn_v3_0_process_interrupt +ffffffff81f6b6d0 t vcn_v3_0_pause_dpg_mode +ffffffff81f6bf00 t vcn_v3_0_enable_clock_gating +ffffffff81f6c190 t vcn_v3_0_disable_clock_gating +ffffffff81f6c6c0 t vcn_v3_0_start_dpg_mode +ffffffff81f6f9b0 t vcn_v3_0_clock_gating_dpg_mode +ffffffff81f70790 t vcn_v3_0_mc_resume_dpg_mode +ffffffff81f75000 t vcn_v4_0_query_ras_poison_status +ffffffff81f750e0 t vcn_v4_0_early_init +ffffffff81f752a0 t vcn_v4_0_sw_init +ffffffff81f75560 t vcn_v4_0_sw_fini +ffffffff81f75640 t vcn_v4_0_hw_init +ffffffff81f76070 t vcn_v4_0_hw_fini +ffffffff81f761c0 t vcn_v4_0_suspend +ffffffff81f761f0 t vcn_v4_0_resume +ffffffff81f76240 t vcn_v4_0_is_idle +ffffffff81f76340 t vcn_v4_0_wait_for_idle +ffffffff81f763f0 t vcn_v4_0_set_clockgating_state +ffffffff81f76500 t vcn_v4_0_set_powergating_state +ffffffff81f76d40 t vcn_v4_0_unified_ring_get_rptr +ffffffff81f76e20 t vcn_v4_0_unified_ring_get_wptr +ffffffff81f76f10 t vcn_v4_0_unified_ring_set_wptr +ffffffff81f77010 t vcn_v4_0_ring_patch_cs_in_place +ffffffff81f773a0 t vcn_v4_0_limit_sched +ffffffff81f77400 t vcn_v4_0_set_interrupt_state +ffffffff81f77430 t vcn_v4_0_process_interrupt +ffffffff81f774f0 t vcn_v4_0_set_ras_interrupt_state +ffffffff81f77520 t vcn_v4_0_pause_dpg_mode +ffffffff81f777a0 t vcn_v4_0_enable_clock_gating +ffffffff81f77aa0 t vcn_v4_0_disable_clock_gating +ffffffff81f77f60 t vcn_v4_0_start +ffffffff81f7ca50 t vcn_v4_0_disable_clock_gating_dpg_mode +ffffffff81f7d830 t vcn_v4_0_mc_resume_dpg_mode +ffffffff81f82000 t vcn_v4_0_3_early_init +ffffffff81f82100 t vcn_v4_0_3_sw_init +ffffffff81f82380 t vcn_v4_0_3_sw_fini +ffffffff81f82440 t vcn_v4_0_3_hw_init +ffffffff81f83140 t vcn_v4_0_3_hw_fini +ffffffff81f831d0 t vcn_v4_0_3_suspend +ffffffff81f83240 t vcn_v4_0_3_resume +ffffffff81f83290 t vcn_v4_0_3_is_idle +ffffffff81f83400 t vcn_v4_0_3_wait_for_idle +ffffffff81f83500 t vcn_v4_0_3_set_clockgating_state +ffffffff81f83690 t vcn_v4_0_3_set_powergating_state +ffffffff81f83d80 t vcn_v4_0_3_unified_ring_get_rptr +ffffffff81f83ef0 t vcn_v4_0_3_unified_ring_get_wptr +ffffffff81f84080 t vcn_v4_0_3_unified_ring_set_wptr +ffffffff81f84230 t vcn_v4_0_3_set_interrupt_state +ffffffff81f84260 t vcn_v4_0_3_process_interrupt +ffffffff81f84370 t vcn_v4_0_3_query_ras_error_count +ffffffff81f84460 t vcn_v4_0_3_reset_ras_error_count +ffffffff81f84550 t vcn_v4_0_3_pause_dpg_mode +ffffffff81f84580 t vcn_v4_0_3_enable_clock_gating +ffffffff81f848a0 t vcn_v4_0_3_disable_clock_gating +ffffffff81f84d80 t vcn_v4_0_3_start +ffffffff81f894a0 t vcn_v4_0_3_disable_clock_gating_dpg_mode +ffffffff81f8a240 t vcn_v4_0_3_mc_resume_dpg_mode +ffffffff81f8f000 t vega10_ih_early_init +ffffffff81f8f050 t vega10_ih_sw_init +ffffffff81f8f300 t vega10_ih_sw_fini +ffffffff81f8f340 t vega10_ih_hw_init +ffffffff81f8f6c0 t vega10_ih_hw_fini +ffffffff81f8f710 t vega10_ih_suspend +ffffffff81f8f760 t vega10_ih_resume +ffffffff81f8f770 t vega10_ih_is_idle +ffffffff81f8f7a0 t vega10_ih_wait_for_idle +ffffffff81f8f7d0 t vega10_ih_soft_reset +ffffffff81f8f800 t vega10_ih_set_clockgating_state +ffffffff81f8f950 t vega10_ih_set_powergating_state +ffffffff81f8f980 t vega10_ih_get_wptr +ffffffff81f8fa90 t vega10_ih_set_rptr +ffffffff81f8fb60 t vega10_ih_self_irq +ffffffff81f8fbe0 t vega10_ih_toggle_interrupts +ffffffff81f90000 T vega10_reg_base_init +ffffffff81f90150 T vega10_doorbell_index_init +ffffffff81f91000 t vega20_ih_early_init +ffffffff81f91050 t vega20_ih_sw_init +ffffffff81f91330 t vega20_ih_sw_fini +ffffffff81f91370 t vega20_ih_hw_init +ffffffff81f91990 t vega20_ih_hw_fini +ffffffff81f919e0 t vega20_ih_suspend +ffffffff81f91a30 t vega20_ih_resume +ffffffff81f91a40 t vega20_ih_is_idle +ffffffff81f91a70 t vega20_ih_wait_for_idle +ffffffff81f91aa0 t vega20_ih_soft_reset +ffffffff81f91ad0 t vega20_ih_set_clockgating_state +ffffffff81f91c00 t vega20_ih_set_powergating_state +ffffffff81f91c30 t vega20_ih_get_wptr +ffffffff81f91d40 t vega20_ih_set_rptr +ffffffff81f91e10 t vega20_ih_self_irq +ffffffff81f91e90 t vega20_ih_toggle_interrupts +ffffffff81f93000 T vega20_reg_base_init +ffffffff81f93160 T vega20_doorbell_index_init +ffffffff81f94000 T vi_srbm_select +ffffffff81f94050 T vi_set_virt_ops +ffffffff81f94090 T vi_set_ip_blocks +ffffffff81f944c0 T legacy_doorbell_index_init +ffffffff81f94570 t vi_common_early_init +ffffffff81f94860 t vi_common_late_init +ffffffff81f948a0 t vi_common_sw_init +ffffffff81f948e0 t vi_common_sw_fini +ffffffff81f94910 t vi_common_hw_init +ffffffff81f94fd0 t vi_common_hw_fini +ffffffff81f95050 t vi_common_suspend +ffffffff81f950d0 t vi_common_resume +ffffffff81f95110 t vi_common_is_idle +ffffffff81f95140 t vi_common_wait_for_idle +ffffffff81f95170 t vi_common_soft_reset +ffffffff81f951a0 t vi_common_set_clockgating_state +ffffffff81f95710 t vi_common_set_powergating_state +ffffffff81f95740 t vi_common_get_clockgating_state +ffffffff81f95800 t cz_smc_rreg +ffffffff81f95880 t cz_smc_wreg +ffffffff81f958f0 t vi_smc_rreg +ffffffff81f95970 t vi_smc_wreg +ffffffff81f959e0 t vi_pcie_rreg +ffffffff81f95a80 t vi_pcie_wreg +ffffffff81f95b10 t vi_uvd_ctx_rreg +ffffffff81f95ba0 t vi_uvd_ctx_wreg +ffffffff81f95c10 t vi_didt_rreg +ffffffff81f95c90 t vi_didt_wreg +ffffffff81f95d00 t vi_gc_cac_rreg +ffffffff81f95d80 t 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bios_parser_get_spread_spectrum_info +ffffffff81fc9e40 t bios_parser_get_ss_entry_number +ffffffff81fc9e70 t bios_parser_get_embedded_panel_info +ffffffff81fca070 t bios_parser_get_gpio_pin_info +ffffffff81fca190 t bios_parser_get_encoder_cap_info +ffffffff81fca300 t bios_parser_is_accelerated_mode +ffffffff81fca310 t bios_parser_set_scratch_critical_state +ffffffff81fca320 t bios_parser_is_device_id_supported +ffffffff81fca390 t bios_parser_encoder_control +ffffffff81fca3d0 t bios_parser_transmitter_control +ffffffff81fca410 t bios_parser_enable_crtc +ffffffff81fca460 t bios_parser_set_pixel_clock +ffffffff81fca4a0 t bios_parser_set_dce_clock +ffffffff81fca4e0 t bios_parser_program_crtc_timing +ffffffff81fca520 t bios_parser_enable_disp_power_gating +ffffffff81fca560 t firmware_parser_destroy +ffffffff81fca620 t bios_get_board_layout_info +ffffffff81fcaac0 t bios_parser_pack_data_tables +ffffffff81fcaaf0 t bios_get_atom_dc_golden_table +ffffffff81fcac30 t bios_parser_enable_lvtma_control +ffffffff81fcac80 t bios_parser_get_soc_bb_info +ffffffff81fcad90 t bios_parser_get_disp_connector_caps_info +ffffffff81fcaef0 t bios_parser_get_lttpr_caps +ffffffff81fcb040 t bios_parser_get_lttpr_interop +ffffffff81fcb180 t bios_parser_get_connector_speed_cap_info +ffffffff81fcb2d0 t get_bios_object +ffffffff81fcb430 t get_bios_object_from_path_v3 +ffffffff81fcc000 T object_id_from_bios_object_id +ffffffff81fcd000 T bios_get_image +ffffffff81fcd050 T bios_is_accelerated_mode +ffffffff81fcd0b0 T bios_set_scratch_acc_mode_change +ffffffff81fcd0f0 T bios_set_scratch_critical_state +ffffffff81fcd130 T bios_get_vga_enabled_displays +ffffffff81fce000 T dal_bios_parser_create +ffffffff81fce070 T dal_bios_parser_destroy +ffffffff81fcf000 T dal_bios_parser_init_cmd_tbl +ffffffff81fcf810 t encoder_control_digx_v3 +ffffffff81fcf910 t encoder_control_digx_v4 +ffffffff81fcfa10 t encoder_control_digx_v5 +ffffffff81fcfb60 t encoder_control_dig1_v1 +ffffffff81fcfbe0 t encoder_control_dig2_v1 +ffffffff81fcfc60 t encoder_control_dig_v1 +ffffffff81fcfcc0 t transmitter_control_v2 +ffffffff81fcfe60 t transmitter_control_v3 +ffffffff81fd0010 t transmitter_control_v4 +ffffffff81fd01c0 t transmitter_control_v1_5 +ffffffff81fd0330 t transmitter_control_v1_6 +ffffffff81fd0490 t set_pixel_clock_v3 +ffffffff81fd0600 t set_pixel_clock_v5 +ffffffff81fd07a0 t set_pixel_clock_v6 +ffffffff81fd0940 t set_pixel_clock_v7 +ffffffff81fd0b10 t enable_spread_spectrum_on_ppll_v1 +ffffffff81fd0c30 t enable_spread_spectrum_on_ppll_v2 +ffffffff81fd0d60 t enable_spread_spectrum_on_ppll_v3 +ffffffff81fd0e70 t adjust_display_pll_v2 +ffffffff81fd0fc0 t adjust_display_pll_v3 +ffffffff81fd1130 t dac1_encoder_control_v1 +ffffffff81fd11b0 t dac2_encoder_control_v1 +ffffffff81fd1230 t dac1_output_control_v1 +ffffffff81fd1290 t dac2_output_control_v1 +ffffffff81fd12f0 t set_crtc_using_dtd_timing_v3 +ffffffff81fd1440 t set_crtc_timing_v1 +ffffffff81fd15c0 t enable_crtc_v1 +ffffffff81fd1660 t enable_crtc_mem_req_v1 +ffffffff81fd1700 t program_clock_v5 +ffffffff81fd1810 t program_clock_v6 +ffffffff81fd1930 t external_encoder_control_v3 +ffffffff81fd1ae0 t enable_disp_power_gating_v2_1 +ffffffff81fd1bb0 t set_dce_clock_v2_1 +ffffffff81fd2000 T dal_firmware_parser_init_cmd_tbl +ffffffff81fd23d0 t encoder_control_digx_v1_5 +ffffffff81fd25a0 t encoder_control_fallback +ffffffff81fd2600 t transmitter_control_v1_6 +ffffffff81fd27a0 t transmitter_control_v1_7 +ffffffff81fd2990 t transmitter_control_fallback +ffffffff81fd29f0 t set_pixel_clock_v7 +ffffffff81fd2c40 t set_pixel_clock_fallback +ffffffff81fd2ca0 t set_crtc_using_dtd_timing_v3 +ffffffff81fd2df0 t enable_crtc_v1 +ffffffff81fd2e90 t external_encoder_control_v3 +ffffffff81fd2ec0 t enable_disp_power_gating_v2_1 +ffffffff81fd3010 t enable_disp_power_gating_fallback +ffffffff81fd3070 t set_dce_clock_v2_1 +ffffffff81fd31a0 t get_smu_clock_info_v3_1 +ffffffff81fd3210 t enable_lvtma_control +ffffffff81fd4000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81fd40a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81fd41c0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81fd4240 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81fd42d0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81fd4390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81fd4470 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff81fd5000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff81fd50b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff81fd51c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81fd5240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81fd52d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81fd53b0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81fd6000 T dal_cmd_tbl_helper_dce110_get_table +ffffffff81fd6030 t encoder_action_to_atom +ffffffff81fd60b0 t engine_bp_to_atom +ffffffff81fd6100 t clock_source_id_to_atom +ffffffff81fd61a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81fd61f0 t signal_type_to_atom_dig_mode +ffffffff81fd6250 t hpd_sel_to_atom +ffffffff81fd6290 t dig_encoder_sel_to_atom +ffffffff81fd62c0 t phy_id_to_atom +ffffffff81fd6300 t disp_power_gating_action_to_atom +ffffffff81fd7000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff81fd7030 t encoder_action_to_atom ffffffff81fd70b0 t engine_bp_to_atom ffffffff81fd7100 t clock_source_id_to_atom -ffffffff81fd71a0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81fd71f0 t signal_type_to_atom_dig_mode -ffffffff81fd7250 t hpd_sel_to_atom -ffffffff81fd7290 t dig_encoder_sel_to_atom -ffffffff81fd72c0 t phy_id_to_atom -ffffffff81fd7300 t disp_power_gating_action_to_atom -ffffffff81fd8000 T dal_cmd_tbl_helper_dce112_get_table2 +ffffffff81fd71d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81fd7220 t signal_type_to_atom_dig_mode +ffffffff81fd7280 t hpd_sel_to_atom +ffffffff81fd72c0 t dig_encoder_sel_to_atom +ffffffff81fd72f0 t phy_id_to_atom +ffffffff81fd7330 t disp_power_gating_action_to_atom +ffffffff81fd73a0 t dc_clock_type_to_atom +ffffffff81fd7420 t transmitter_color_depth_to_atom +ffffffff81fd8000 T dal_cmd_tbl_helper_dce112_get_table ffffffff81fd8030 t encoder_action_to_atom ffffffff81fd80b0 t engine_bp_to_atom ffffffff81fd8100 t clock_source_id_to_atom @@ -31062,7 +31073,7 @@ ffffffff81fd82f0 t phy_id_to_atom ffffffff81fd8330 t disp_power_gating_action_to_atom ffffffff81fd83a0 t dc_clock_type_to_atom ffffffff81fd8420 t transmitter_color_depth_to_atom -ffffffff81fd9000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff81fd9000 T dal_cmd_tbl_helper_dce80_get_table ffffffff81fd9030 t encoder_action_to_atom ffffffff81fd90b0 t engine_bp_to_atom ffffffff81fd9100 t clock_source_id_to_atom @@ -31070,26404 +31081,26392 @@ ffffffff81fd91d0 t clock_source_id_to_atom_phy_clk_src ffffffff81fd9220 t signal_type_to_atom_dig_mode ffffffff81fd9280 t hpd_sel_to_atom ffffffff81fd92c0 t dig_encoder_sel_to_atom -ffffffff81fd92f0 t phy_id_to_atom -ffffffff81fd9330 t disp_power_gating_action_to_atom -ffffffff81fd93a0 t dc_clock_type_to_atom -ffffffff81fd9420 t transmitter_color_depth_to_atom -ffffffff81fda000 T dal_cmd_tbl_helper_dce80_get_table -ffffffff81fda030 t encoder_action_to_atom -ffffffff81fda0b0 t engine_bp_to_atom -ffffffff81fda100 t clock_source_id_to_atom -ffffffff81fda1d0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81fda220 t signal_type_to_atom_dig_mode -ffffffff81fda280 t hpd_sel_to_atom -ffffffff81fda2c0 t dig_encoder_sel_to_atom -ffffffff81fda310 t phy_id_to_atom -ffffffff81fda350 t disp_power_gating_action_to_atom -ffffffff81fdb000 T clk_mgr_helper_get_active_display_cnt -ffffffff81fdb0e0 T clk_mgr_helper_get_active_plane_cnt -ffffffff81fdb190 T clk_mgr_exit_optimized_pwr_state -ffffffff81fdb2a0 T clk_mgr_optimize_pwr_state -ffffffff81fdb390 T dc_clk_mgr_create -ffffffff81fdba50 T dc_destroy_clk_mgr -ffffffff81fdc000 T dentist_get_divider_from_did -ffffffff81fdc070 T dce_adjust_dp_ref_freq_for_ss -ffffffff81fdc170 T dce_get_dp_ref_freq_khz -ffffffff81fdc2a0 T dce12_get_dp_ref_freq_khz -ffffffff81fdc2c0 T dce_get_max_pixel_clock_for_all_paths -ffffffff81fdc4d0 T dce_get_required_clocks_state -ffffffff81fdc580 T dce_set_clock -ffffffff81fdc6e0 T dce_clock_read_ss_info -ffffffff81fdc800 T dce_clk_mgr_construct -ffffffff81fdc9f0 t dce_update_clocks -ffffffff81fdd000 T dce110_get_min_vblank_time_us -ffffffff81fdd090 T dce110_fill_display_configs -ffffffff81fdd300 T dce11_pplib_apply_display_requirements -ffffffff81fdd5f0 T dce110_clk_mgr_construct -ffffffff81fdd6a0 t dce11_update_clocks -ffffffff81fde000 T dce112_set_clock -ffffffff81fde180 T dce112_set_dispclk -ffffffff81fde2a0 T dce112_set_dprefclk -ffffffff81fde310 T dce112_clk_mgr_construct -ffffffff81fde3c0 t dce112_update_clocks -ffffffff81fdf000 T dce120_clk_mgr_construct -ffffffff81fdf090 T dce121_clk_mgr_construct -ffffffff81fdf1c0 t dce12_update_clocks -ffffffff81fe0000 T rv1_clk_mgr_construct -ffffffff81fe00c0 t rv1_update_clocks -ffffffff81fe05a0 t rv1_init_clocks -ffffffff81fe0630 t rv1_enable_pme_wa -ffffffff81fe1000 T rv1_vbios_smu_set_dispclk -ffffffff81fe10e0 t rv1_vbios_smu_send_msg_with_param -ffffffff81fe11f0 T rv1_vbios_smu_set_dprefclk -ffffffff81fe2000 T rv2_clk_mgr_construct -ffffffff81fe3000 T dentist_get_did_from_divider -ffffffff81fe3080 T dcn20_update_clocks_update_dpp_dto -ffffffff81fe3150 T dcn20_update_clocks_update_dentist -ffffffff81fe3640 T dcn2_update_clocks -ffffffff81fe3bc0 T dcn2_read_clocks_from_hw_dentist -ffffffff81fe3c90 T dcn2_update_clocks_fpga -ffffffff81fe3dc0 T dcn2_init_clocks -ffffffff81fe3e60 T dcn2_get_clock -ffffffff81fe3ed0 T dcn20_clk_mgr_construct -ffffffff81fe4000 t dcn2_enable_pme_wa -ffffffff81fe4050 t dcn2_are_clock_states_equal -ffffffff81fe40c0 t dcn2_notify_link_rate_change -ffffffff81fe5000 T dcn201_clk_mgr_construct -ffffffff81fe5120 t dcn201_update_clocks -ffffffff81fe5340 t dcn201_init_clocks -ffffffff81fe6000 T rn_clk_mgr_construct -ffffffff81fe68a0 t rn_update_clocks -ffffffff81fe6e60 t rn_set_low_power_state -ffffffff81fe7040 t rn_init_clocks -ffffffff81fe70e0 t rn_enable_pme_wa -ffffffff81fe70f0 t rn_are_clock_states_equal -ffffffff81fe7140 t rn_notify_wm_ranges -ffffffff81fe74d0 t rn_notify_link_rate_change -ffffffff81fe8000 T rn_vbios_smu_get_smu_version -ffffffff81fe8020 t rn_vbios_smu_send_msg_with_param -ffffffff81fe81b0 T rn_vbios_smu_set_dispclk -ffffffff81fe82d0 T rn_vbios_smu_set_dprefclk -ffffffff81fe8340 T rn_vbios_smu_set_hard_min_dcfclk -ffffffff81fe83c0 T rn_vbios_smu_set_min_deep_sleep_dcfclk -ffffffff81fe8440 T rn_vbios_smu_set_phyclk -ffffffff81fe8480 T rn_vbios_smu_set_dppclk -ffffffff81fe8530 T rn_vbios_smu_set_dcn_low_power_state -ffffffff81fe8550 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn -ffffffff81fe8570 T rn_vbios_smu_enable_pme_wa -ffffffff81fe8590 T rn_vbios_smu_is_periodic_retraining_disabled -ffffffff81fe9000 T dcn3_init_clocks -ffffffff81fe93b0 t dcn3_init_clocks_fpga -ffffffff81fe93c0 T dcn3_clk_mgr_construct -ffffffff81fe9510 T dcn3_clk_mgr_destroy -ffffffff81fe9570 t dcn3_update_clocks -ffffffff81fe9990 t dcn3_enable_pme_wa -ffffffff81fe99d0 t dcn3_are_clock_states_equal -ffffffff81fe9a30 t dcn3_notify_wm_ranges -ffffffff81fe9cc0 t dcn30_notify_link_rate_change -ffffffff81fe9de0 t dcn3_set_hard_min_memclk -ffffffff81fe9e80 t dcn3_set_hard_max_memclk -ffffffff81fe9ee0 t dcn3_set_max_memclk -ffffffff81fe9f20 t dcn3_set_min_memclk -ffffffff81fe9f60 t dcn3_get_memclk_states_from_smu -ffffffff81fea0a0 t dcn3_is_smu_present -ffffffff81feb000 T dcn30_smu_test_message -ffffffff81feb070 t dcn30_smu_send_msg_with_param -ffffffff81feb1d0 T dcn30_smu_get_smu_version -ffffffff81feb1f0 T dcn30_smu_check_driver_if_version -ffffffff81feb240 T dcn30_smu_check_msg_header_version -ffffffff81feb290 T dcn30_smu_set_dram_addr_high -ffffffff81feb2b0 T dcn30_smu_set_dram_addr_low -ffffffff81feb2d0 T dcn30_smu_transfer_wm_table_smu_2_dram -ffffffff81feb2f0 T dcn30_smu_transfer_wm_table_dram_2_smu -ffffffff81feb310 T dcn30_smu_set_hard_min_by_freq -ffffffff81feb360 T dcn30_smu_set_hard_max_by_freq -ffffffff81feb3b0 T dcn30_smu_get_dpm_freq_by_index -ffffffff81feb400 T dcn30_smu_get_dc_mode_max_dpm_freq -ffffffff81feb450 T dcn30_smu_set_min_deep_sleep_dcef_clk -ffffffff81feb470 T dcn30_smu_set_num_of_displays -ffffffff81feb490 T dcn30_smu_set_display_refresh_from_mall -ffffffff81feb4c0 T dcn30_smu_set_external_client_df_cstate_allow -ffffffff81feb4e0 T dcn30_smu_set_pme_workaround -ffffffff81fec000 T dcn301_smu_get_smu_version -ffffffff81fec070 t dcn301_smu_send_msg_with_param -ffffffff81fec1f0 T dcn301_smu_set_dispclk -ffffffff81fec290 T dcn301_smu_set_dprefclk -ffffffff81fec340 T dcn301_smu_set_hard_min_dcfclk -ffffffff81fec3e0 T dcn301_smu_set_min_deep_sleep_dcfclk -ffffffff81fec480 T dcn301_smu_set_dppclk -ffffffff81fec520 T dcn301_smu_set_display_idle_optimization -ffffffff81fec570 T dcn301_smu_enable_phy_refclk_pwrdwn -ffffffff81fec5c0 T dcn301_smu_enable_pme_wa -ffffffff81fec5e0 T dcn301_smu_set_dram_addr_high -ffffffff81fec630 T dcn301_smu_set_dram_addr_low -ffffffff81fec680 T dcn301_smu_transfer_dpm_table_smu_2_dram -ffffffff81fec6a0 T dcn301_smu_transfer_wm_table_dram_2_smu -ffffffff81fed000 T vg_clk_mgr_construct -ffffffff81fed840 T vg_clk_mgr_destroy -ffffffff81fed890 t vg_update_clocks -ffffffff81fedbd0 t vg_init_clocks -ffffffff81fedc70 t vg_enable_pme_wa -ffffffff81fedc80 t vg_are_clock_states_equal -ffffffff81fedcd0 t vg_notify_wm_ranges -ffffffff81fef000 T dcn31_update_clocks -ffffffff81fef610 T dcn31_init_clocks -ffffffff81fef6c0 T dcn31_are_clock_states_equal -ffffffff81fef720 T dcn31_get_dtb_ref_freq_khz -ffffffff81fef750 T dcn31_clk_mgr_construct -ffffffff81fefe20 T dcn31_clk_mgr_destroy -ffffffff81fefe70 t dcn31_set_low_power_state -ffffffff81ff0080 t dcn31_enable_pme_wa -ffffffff81ff0090 t dcn31_notify_wm_ranges -ffffffff81ff0410 t find_clk_for_voltage -ffffffff81ff1000 T dcn31_smu_get_smu_version -ffffffff81ff1020 t dcn31_smu_send_msg_with_param -ffffffff81ff1230 T dcn31_smu_set_dispclk -ffffffff81ff12a0 T dcn31_smu_set_dprefclk -ffffffff81ff1310 T dcn31_smu_set_hard_min_dcfclk -ffffffff81ff1390 T dcn31_smu_set_min_deep_sleep_dcfclk -ffffffff81ff1410 T dcn31_smu_set_dppclk -ffffffff81ff1480 T dcn31_smu_set_display_idle_optimization -ffffffff81ff14d0 T dcn31_smu_enable_phy_refclk_pwrdwn -ffffffff81ff1520 T dcn31_smu_enable_pme_wa -ffffffff81ff1560 T dcn31_smu_set_dram_addr_high -ffffffff81ff15a0 T dcn31_smu_set_dram_addr_low -ffffffff81ff15e0 T dcn31_smu_transfer_dpm_table_smu_2_dram -ffffffff81ff1620 T dcn31_smu_transfer_wm_table_dram_2_smu -ffffffff81ff1660 T dcn31_smu_set_zstate_support -ffffffff81ff16d0 T dcn31_smu_set_dtbclk -ffffffff81ff2000 T dcn314_update_clocks -ffffffff81ff25d0 t dcn314_disable_otg_wa -ffffffff81ff2760 T dcn314_are_clock_states_equal -ffffffff81ff27c0 T dcn314_clk_mgr_construct -ffffffff81ff34d0 T dcn314_clk_mgr_destroy -ffffffff81ff3520 t dcn314_enable_pme_wa -ffffffff81ff3530 t dcn314_notify_wm_ranges -ffffffff81ff4000 T dcn314_smu_get_smu_version -ffffffff81ff4020 t dcn314_smu_send_msg_with_param -ffffffff81ff4250 T dcn314_smu_set_dispclk -ffffffff81ff42c0 T dcn314_smu_set_dprefclk -ffffffff81ff4330 T dcn314_smu_set_hard_min_dcfclk -ffffffff81ff43b0 T dcn314_smu_set_min_deep_sleep_dcfclk -ffffffff81ff4430 T dcn314_smu_set_dppclk -ffffffff81ff44a0 T dcn314_smu_set_display_idle_optimization -ffffffff81ff44f0 T dcn314_smu_enable_phy_refclk_pwrdwn -ffffffff81ff4540 T dcn314_smu_enable_pme_wa -ffffffff81ff4580 T dcn314_smu_set_dram_addr_high -ffffffff81ff45c0 T dcn314_smu_set_dram_addr_low -ffffffff81ff4600 T dcn314_smu_transfer_dpm_table_smu_2_dram -ffffffff81ff4640 T dcn314_smu_transfer_wm_table_dram_2_smu -ffffffff81ff4680 T dcn314_smu_set_zstate_support -ffffffff81ff46d0 T dcn314_smu_set_dtbclk -ffffffff81ff5000 T dcn315_clk_mgr_construct -ffffffff81ff5810 T dcn315_clk_mgr_destroy -ffffffff81ff5860 t dcn315_update_clocks -ffffffff81ff5da0 t dcn315_enable_pme_wa -ffffffff81ff5db0 t dcn315_notify_wm_ranges -ffffffff81ff6130 t dcn315_disable_otg_wa -ffffffff81ff7000 T dcn315_smu_get_smu_version -ffffffff81ff7020 t dcn315_smu_send_msg_with_param -ffffffff81ff7310 T dcn315_smu_set_dispclk -ffffffff81ff7380 T dcn315_smu_set_hard_min_dcfclk -ffffffff81ff7400 T dcn315_smu_set_min_deep_sleep_dcfclk -ffffffff81ff7480 T dcn315_smu_set_dppclk -ffffffff81ff74f0 T dcn315_smu_set_display_idle_optimization -ffffffff81ff7540 T dcn315_smu_enable_phy_refclk_pwrdwn -ffffffff81ff7590 T dcn315_smu_enable_pme_wa -ffffffff81ff75d0 T dcn315_smu_set_dram_addr_high -ffffffff81ff7610 T dcn315_smu_set_dram_addr_low -ffffffff81ff7650 T dcn315_smu_transfer_dpm_table_smu_2_dram -ffffffff81ff7690 T dcn315_smu_transfer_wm_table_dram_2_smu -ffffffff81ff76d0 T dcn315_smu_get_dpref_clk -ffffffff81ff7730 T dcn315_smu_get_dtbclk -ffffffff81ff7790 T dcn315_smu_set_dtbclk -ffffffff81ff8000 T dcn316_clk_mgr_construct -ffffffff81ff8650 T dcn316_clk_mgr_destroy -ffffffff81ff86a0 t dcn316_update_clocks -ffffffff81ff8c90 t dcn316_enable_pme_wa -ffffffff81ff8ca0 t dcn316_notify_wm_ranges -ffffffff81ff9020 t find_clk_for_voltage -ffffffff81ffa000 T dcn316_smu_get_smu_version -ffffffff81ffa020 t dcn316_smu_send_msg_with_param -ffffffff81ffa1b0 T dcn316_smu_set_dispclk -ffffffff81ffa220 T dcn316_smu_set_hard_min_dcfclk -ffffffff81ffa2a0 T dcn316_smu_set_min_deep_sleep_dcfclk -ffffffff81ffa320 T dcn316_smu_set_dppclk -ffffffff81ffa390 T dcn316_smu_set_display_idle_optimization -ffffffff81ffa3e0 T dcn316_smu_enable_phy_refclk_pwrdwn -ffffffff81ffa430 T dcn316_smu_set_dram_addr_high -ffffffff81ffa470 T dcn316_smu_set_dram_addr_low -ffffffff81ffa4b0 T dcn316_smu_transfer_dpm_table_smu_2_dram -ffffffff81ffa4f0 T dcn316_smu_transfer_wm_table_dram_2_smu -ffffffff81ffa530 T dcn316_smu_enable_pme_wa -ffffffff81ffa570 T dcn316_smu_set_dtbclk -ffffffff81ffa5b0 T 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dcn31_update_clocks +ffffffff81fee610 T dcn31_init_clocks +ffffffff81fee6c0 T dcn31_are_clock_states_equal +ffffffff81fee720 T dcn31_get_dtb_ref_freq_khz +ffffffff81fee750 T dcn31_clk_mgr_construct +ffffffff81feee20 T dcn31_clk_mgr_destroy +ffffffff81feee70 t dcn31_set_low_power_state +ffffffff81fef080 t dcn31_enable_pme_wa +ffffffff81fef090 t dcn31_notify_wm_ranges +ffffffff81fef410 t find_clk_for_voltage +ffffffff81ff0000 T dcn31_smu_get_smu_version +ffffffff81ff0020 t dcn31_smu_send_msg_with_param +ffffffff81ff0230 T dcn31_smu_set_dispclk +ffffffff81ff02a0 T dcn31_smu_set_dprefclk +ffffffff81ff0310 T dcn31_smu_set_hard_min_dcfclk +ffffffff81ff0390 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff81ff0410 T dcn31_smu_set_dppclk +ffffffff81ff0480 T dcn31_smu_set_display_idle_optimization +ffffffff81ff04d0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff81ff0520 T dcn31_smu_enable_pme_wa +ffffffff81ff0560 T dcn31_smu_set_dram_addr_high +ffffffff81ff05a0 T dcn31_smu_set_dram_addr_low +ffffffff81ff05e0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff81ff0620 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff81ff0660 T dcn31_smu_set_zstate_support +ffffffff81ff06d0 T dcn31_smu_set_dtbclk +ffffffff81ff1000 T dcn314_update_clocks +ffffffff81ff15d0 t dcn314_disable_otg_wa +ffffffff81ff1760 T dcn314_are_clock_states_equal +ffffffff81ff17c0 T dcn314_clk_mgr_construct +ffffffff81ff24d0 T dcn314_clk_mgr_destroy +ffffffff81ff2520 t dcn314_enable_pme_wa +ffffffff81ff2530 t dcn314_notify_wm_ranges +ffffffff81ff3000 T dcn314_smu_get_smu_version +ffffffff81ff3020 t dcn314_smu_send_msg_with_param +ffffffff81ff3250 T dcn314_smu_set_dispclk +ffffffff81ff32c0 T dcn314_smu_set_dprefclk +ffffffff81ff3330 T dcn314_smu_set_hard_min_dcfclk +ffffffff81ff33b0 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81ff3430 T dcn314_smu_set_dppclk +ffffffff81ff34a0 T dcn314_smu_set_display_idle_optimization +ffffffff81ff34f0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81ff3540 T dcn314_smu_enable_pme_wa +ffffffff81ff3580 T dcn314_smu_set_dram_addr_high +ffffffff81ff35c0 T dcn314_smu_set_dram_addr_low +ffffffff81ff3600 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81ff3640 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81ff3680 T dcn314_smu_set_zstate_support +ffffffff81ff36d0 T dcn314_smu_set_dtbclk +ffffffff81ff4000 T dcn315_clk_mgr_construct +ffffffff81ff4810 T dcn315_clk_mgr_destroy +ffffffff81ff4860 t dcn315_update_clocks +ffffffff81ff4da0 t dcn315_enable_pme_wa +ffffffff81ff4db0 t dcn315_notify_wm_ranges +ffffffff81ff5130 t dcn315_disable_otg_wa +ffffffff81ff6000 T dcn315_smu_get_smu_version +ffffffff81ff6020 t dcn315_smu_send_msg_with_param +ffffffff81ff6310 T dcn315_smu_set_dispclk +ffffffff81ff6380 T dcn315_smu_set_hard_min_dcfclk +ffffffff81ff6400 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81ff6480 T dcn315_smu_set_dppclk +ffffffff81ff64f0 T dcn315_smu_set_display_idle_optimization +ffffffff81ff6540 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81ff6590 T dcn315_smu_enable_pme_wa +ffffffff81ff65d0 T dcn315_smu_set_dram_addr_high +ffffffff81ff6610 T dcn315_smu_set_dram_addr_low +ffffffff81ff6650 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81ff6690 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81ff66d0 T dcn315_smu_get_dpref_clk +ffffffff81ff6730 T dcn315_smu_get_dtbclk +ffffffff81ff6790 T dcn315_smu_set_dtbclk +ffffffff81ff7000 T dcn316_clk_mgr_construct +ffffffff81ff7650 T dcn316_clk_mgr_destroy +ffffffff81ff76a0 t dcn316_update_clocks +ffffffff81ff7c90 t dcn316_enable_pme_wa +ffffffff81ff7ca0 t dcn316_notify_wm_ranges +ffffffff81ff8020 t find_clk_for_voltage +ffffffff81ff9000 T dcn316_smu_get_smu_version +ffffffff81ff9020 t dcn316_smu_send_msg_with_param +ffffffff81ff91b0 T dcn316_smu_set_dispclk +ffffffff81ff9220 T dcn316_smu_set_hard_min_dcfclk +ffffffff81ff92a0 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff81ff9320 T dcn316_smu_set_dppclk +ffffffff81ff9390 T dcn316_smu_set_display_idle_optimization +ffffffff81ff93e0 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff81ff9430 T dcn316_smu_set_dram_addr_high +ffffffff81ff9470 T dcn316_smu_set_dram_addr_low +ffffffff81ff94b0 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff81ff94f0 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff81ff9530 T dcn316_smu_enable_pme_wa +ffffffff81ff9570 T dcn316_smu_set_dtbclk +ffffffff81ff95b0 T dcn316_smu_get_dpref_clk +ffffffff81ff9610 T dcn316_smu_get_smu_fclk +ffffffff81ffa000 T dcn32_init_clocks +ffffffff81ffa560 T dcn32_update_clocks_update_dpp_dto +ffffffff81ffa6a0 T dcn32_clk_mgr_construct +ffffffff81ffa940 t dcn32_dump_clk_registers +ffffffff81ffab60 T dcn32_clk_mgr_destroy +ffffffff81ffabc0 t dcn32_update_clocks +ffffffff81ffb420 t dcn32_enable_pme_wa +ffffffff81ffb460 t dcn32_are_clock_states_equal +ffffffff81ffb4d0 t dcn32_notify_wm_ranges +ffffffff81ffb650 t dcn32_set_hard_min_memclk +ffffffff81ffb6e0 t dcn32_set_hard_max_memclk +ffffffff81ffb730 t dcn32_set_max_memclk +ffffffff81ffb770 t dcn32_set_min_memclk +ffffffff81ffb7b0 t dcn32_get_memclk_states_from_smu +ffffffff81ffba00 t dcn32_is_smu_present +ffffffff81ffba30 t dcn32_get_dispclk_from_dentist +ffffffff81ffbac0 t dcn32_update_clocks_update_dentist +ffffffff81ffc000 T dcn32_smu_send_fclk_pstate_message +ffffffff81ffc020 t dcn32_smu_send_msg_with_param +ffffffff81ffc160 T dcn32_smu_send_cab_for_uclk_message +ffffffff81ffc190 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff81ffc1b0 T dcn32_smu_set_pme_workaround +ffffffff81ffc1d0 T dcn32_smu_set_hard_min_by_freq +ffffffff81ffc220 T dcn32_smu_wait_for_dmub_ack_mclk +ffffffff81ffd000 T dc_stream_adjust_vmin_vmax +ffffffff81ffd170 T dc_stream_get_last_used_drr_vtotal +ffffffff81ffd2d0 T dc_stream_get_crtc_position +ffffffff81ffd500 T dc_stream_configure_crc +ffffffff81ffd670 T dc_stream_get_crc +ffffffff81ffd750 T dc_stream_set_dyn_expansion +ffffffff81ffd9c0 T dc_stream_set_dither_option +ffffffff81ffdb60 T dc_stream_set_gamut_remap +ffffffff81ffdce0 T dc_stream_program_csc_matrix +ffffffff81ffdf00 T dc_stream_set_static_screen_params +ffffffff81ffe080 T dc_create +ffffffff81ffe600 t dc_construct_ctx +ffffffff81ffe770 t dc_destruct +ffffffff81ffea40 T dc_hardware_init +ffffffff81ffeb10 T dc_init_callbacks +ffffffff81ffeb60 T dc_deinit_callbacks +ffffffff81ffebb0 T dc_destroy +ffffffff81ffec00 T dc_validate_boot_timing +ffffffff81ffefa0 T dc_enable_stereo +ffffffff81fff0a0 T dc_trigger_sync +ffffffff81fff6d0 T dc_z10_restore +ffffffff81fff710 T dc_z10_save_init +ffffffff81fff750 T dc_commit_streams +ffffffff81fffc30 t commit_minimal_transition_state +ffffffff82000060 T dc_create_state +ffffffff820000f0 t dc_commit_state_no_check +ffffffff82001770 T dc_release_state +ffffffff820017d0 T dc_acquire_release_mpc_3dlut +ffffffff820018a0 T dc_post_update_surfaces_to_stream +ffffffff82001cb0 T dc_copy_state +ffffffff82001e80 T dc_retain_state +ffffffff82001eb0 T dc_set_generic_gpio_for_stereo +ffffffff82001fc0 T dc_check_update_surfaces_for_stream +ffffffff820029a0 T dc_dmub_update_dirty_rect +ffffffff82002bb0 T dc_update_planes_and_stream +ffffffff82003730 t fast_update_only +ffffffff82003a90 t commit_planes_for_stream_fast +ffffffff82003eb0 t commit_planes_for_stream +ffffffff82005430 T dc_commit_updates_for_stream +ffffffff82005a50 t copy_surface_update_to_plane +ffffffff82005e60 t copy_stream_update_to_stream +ffffffff82006500 T dc_get_current_stream_count +ffffffff82006540 T dc_get_stream_at_index +ffffffff82006590 T dc_interrupt_to_irq_source +ffffffff820065b0 T dc_interrupt_set +ffffffff82006600 T dc_interrupt_ack +ffffffff82006620 T dc_power_down_on_boot +ffffffff82006670 T dc_set_power_state +ffffffff82006850 T dc_resume +ffffffff820068d0 T dc_is_dmcu_initialized +ffffffff82006920 T get_clock_requirements_for_state +ffffffff820069a0 T dc_set_clock +ffffffff820069e0 T dc_get_clock +ffffffff82006a20 T dc_set_psr_allow_active +ffffffff82006b20 T dc_allow_idle_optimizations +ffffffff82006bc0 T dc_unlock_memory_clock_frequency +ffffffff82006c30 T dc_lock_memory_clock_frequency +ffffffff82006cc0 T dc_enable_dcmode_clk_limit +ffffffff82006e80 t blank_and_force_memclk +ffffffff82007060 T dc_is_plane_eligible_for_idle_optimizations +ffffffff820070b0 T dc_hardware_release +ffffffff82007100 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff82007140 T dc_is_dmub_outbox_supported +ffffffff820071b0 T dc_enable_dmub_notifications +ffffffff82007220 T dc_enable_dmub_outbox +ffffffff82007260 T dc_process_dmub_aux_transfer_async +ffffffff820073e0 T get_link_index_from_dpia_port_index +ffffffff82007490 T dc_process_dmub_set_config_async +ffffffff82007570 T dc_process_dmub_set_mst_slots +ffffffff82007660 T dc_process_dmub_dpia_hpd_int_enable +ffffffff82007720 T dc_print_dmub_diagnostic_data +ffffffff82007740 T dc_disable_accelerated_mode +ffffffff82007760 T dc_notify_vsync_int_state +ffffffff82007980 T dc_abm_save_restore +ffffffff82007b50 T dc_query_current_properties +ffffffff82007bc0 T dc_set_edp_power +ffffffff82007c30 t create_links +ffffffff82008090 t create_link_encoders +ffffffff82008170 t dc_update_viusal_confirm_color +ffffffff82009000 T pre_surface_trace +ffffffff82009030 T update_surface_trace +ffffffff82009060 T post_surface_trace +ffffffff82009090 T context_timing_trace +ffffffff82009240 T context_clock_trace +ffffffff82009270 T dc_status_to_str +ffffffff8200a000 T find_color_matrix +ffffffff8200a0b0 T color_space_to_black_color +ffffffff8200a120 T hwss_wait_for_blank_complete +ffffffff8200a1c0 T get_mpctree_visual_confirm_color +ffffffff8200a220 T get_surface_visual_confirm_color +ffffffff8200a2d0 T get_hdr_visual_confirm_color +ffffffff8200a390 T get_subvp_visual_confirm_color +ffffffff8200a490 T hwss_build_fast_sequence +ffffffff8200ab50 T hwss_execute_sequence +ffffffff8200af40 T hwss_setup_dpp +ffffffff8200afe0 T hwss_program_bias_and_scale +ffffffff8200b060 T hwss_program_manual_trigger +ffffffff8200b0b0 T hwss_power_on_mpc_mem_pwr +ffffffff8200b100 T hwss_set_output_csc +ffffffff8200b150 T hwss_set_ocsc_default +ffffffff8200b1a0 T hwss_send_dmcub_cmd +ffffffff8200b1c0 T get_mclk_switch_visual_confirm_color +ffffffff8200b320 T get_surface_tile_visual_confirm_color +ffffffff8200c000 T link_enc_cfg_init +ffffffff8200c1b0 T link_enc_cfg_copy +ffffffff8200c1e0 T link_enc_cfg_link_encs_assign +ffffffff8200d5a0 T link_enc_cfg_validate +ffffffff8200dd40 T link_enc_cfg_link_enc_unassign +ffffffff8200ded0 T link_enc_cfg_is_transmitter_mappable +ffffffff8200dff0 T link_enc_cfg_get_stream_using_link_enc +ffffffff8200e0f0 T link_enc_cfg_get_link_using_link_enc +ffffffff8200e200 T link_enc_cfg_get_link_enc_used_by_link +ffffffff8200e380 T link_enc_cfg_get_next_avail_link_enc +ffffffff8200e4f0 T link_enc_cfg_get_link_enc_used_by_stream +ffffffff8200e510 T link_enc_cfg_get_link_enc +ffffffff8200e5a0 T link_enc_cfg_get_link_enc_used_by_stream_current +ffffffff8200e720 T link_enc_cfg_is_link_enc_avail +ffffffff8200e920 T link_enc_cfg_set_transient_mode +ffffffff8200f000 T dc_get_link_at_index +ffffffff8200f030 T dc_get_edp_links +ffffffff8200f0b0 T dc_get_edp_link_panel_inst +ffffffff8200f170 T dc_link_detect +ffffffff8200f1a0 T dc_link_detect_connection_type +ffffffff8200f1d0 T dc_link_get_status +ffffffff8200f200 T dc_link_is_hdcp14 +ffffffff8200f230 T dc_link_is_hdcp22 +ffffffff8200f260 T dc_link_clear_dprx_states +ffffffff8200f290 T dc_link_reset_cur_dp_mst_topology +ffffffff8200f2c0 T dc_link_bandwidth_kbps +ffffffff8200f2f0 T dc_get_cur_link_res_map +ffffffff8200f310 T dc_restore_link_res_map +ffffffff8200f330 T dc_link_update_dsc_config +ffffffff8200f360 T dc_is_oem_i2c_device_present +ffffffff8200f3b0 T dc_submit_i2c +ffffffff8200f3e0 T dc_submit_i2c_oem +ffffffff8200f430 T dc_link_dp_handle_automated_test +ffffffff8200f460 T dc_link_dp_set_test_pattern +ffffffff8200f490 T dc_link_set_drive_settings +ffffffff8200f520 T dc_link_set_preferred_link_settings +ffffffff8200f540 T dc_link_set_preferred_training_settings +ffffffff8200f570 T dc_dp_trace_is_initialized +ffffffff8200f5a0 T dc_dp_trace_set_is_logged_flag +ffffffff8200f5d0 T dc_dp_trace_is_logged +ffffffff8200f600 T dc_dp_trace_get_lt_end_timestamp +ffffffff8200f630 T dc_dp_trace_get_lt_counts +ffffffff8200f660 T dc_dp_trace_get_link_loss_count +ffffffff8200f690 T dc_link_add_remote_sink +ffffffff8200f6c0 T dc_link_remove_remote_sink +ffffffff8200f6f0 T dc_link_aux_transfer_raw +ffffffff8200f720 T dc_link_bw_kbps_from_raw_frl_link_rate_data +ffffffff8200f740 T dc_link_decide_edp_link_settings +ffffffff8200f770 T dc_link_dp_get_max_link_enc_cap +ffffffff8200f7a0 T dc_link_dp_mst_decide_link_encoding_format +ffffffff8200f7d0 T dc_link_get_link_cap +ffffffff8200f800 T dc_link_get_highest_encoding_format +ffffffff8200f8c0 T dc_link_is_dp_sink_present +ffffffff8200f8f0 T dc_link_is_fec_supported +ffffffff8200f920 T dc_link_overwrite_extended_receiver_cap +ffffffff8200f950 T dc_link_should_enable_fec +ffffffff8200f980 T dc_link_dp_dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff8200f9b0 T dc_link_handle_usb4_bw_alloc_response +ffffffff8200f9e0 T dc_link_check_link_loss_status +ffffffff8200fa10 T dc_link_dp_allow_hpd_rx_irq +ffffffff8200fa40 T dc_link_dp_handle_link_loss +ffffffff8200fa70 T dc_link_dp_read_hpd_rx_irq_data +ffffffff8200faa0 T dc_link_handle_hpd_rx_irq +ffffffff8200fad0 T dc_link_dp_receiver_power_ctrl +ffffffff8200fb00 T dc_link_decide_lttpr_mode +ffffffff8200fb30 T dc_link_edp_panel_backlight_power_on +ffffffff8200fb60 T dc_link_get_backlight_level +ffffffff8200fb90 T dc_link_get_backlight_level_nits +ffffffff8200fbc0 T dc_link_set_backlight_level +ffffffff8200fbf0 T dc_link_set_backlight_level_nits +ffffffff8200fc20 T dc_link_get_target_backlight_pwm +ffffffff8200fc50 T dc_link_get_psr_state +ffffffff8200fc80 T dc_link_set_psr_allow_active +ffffffff8200fcb0 T dc_link_setup_psr +ffffffff8200fce0 T dc_link_get_replay_state +ffffffff8200fd10 T dc_link_wait_for_t12 +ffffffff8200fd40 T dc_link_get_hpd_state +ffffffff8200fd70 T dc_link_enable_hpd +ffffffff8200fda0 T dc_link_disable_hpd +ffffffff8200fdd0 T dc_link_enable_hpd_filter +ffffffff8200fe00 T dc_link_validate +ffffffff82010000 T resource_parse_asic_id +ffffffff82010250 T dc_create_resource_pool +ffffffff82010550 T dc_destroy_resource_pool +ffffffff820105c0 T resource_construct +ffffffff82010aa0 T resource_unreference_clock_source +ffffffff82010b20 T resource_reference_clock_source +ffffffff82010ba0 T resource_get_clock_source_reference +ffffffff82010c20 T resource_are_vblanks_synchronizable +ffffffff82010e40 T resource_are_streams_timing_synchronizable +ffffffff82010f30 T resource_find_used_clk_src_for_sharing +ffffffff82011060 T resource_get_num_mpc_splits +ffffffff820110f0 T resource_get_num_odm_splits +ffffffff820111b0 T resource_get_otg_master +ffffffff82011250 T resource_build_scaling_params +ffffffff82011fe0 t calculate_odm_slice_in_timing_active +ffffffff82012160 T resource_build_scaling_params_for_context +ffffffff820122b0 T resource_find_free_secondary_pipe_legacy +ffffffff82012350 T resource_find_free_pipe_used_in_cur_mpc_blending_tree +ffffffff820123c0 T resource_is_pipe_type +ffffffff82012440 T recource_find_free_pipe_not_used_in_cur_res_ctx +ffffffff820124c0 T resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine +ffffffff820125e0 T resource_is_for_mpcc_combine +ffffffff82012670 T resource_find_any_free_pipe +ffffffff820126e0 T resource_get_otg_master_for_stream +ffffffff82012810 T resource_get_opp_head +ffffffff820128a0 T dc_add_plane_to_context +ffffffff82012b60 T dc_remove_plane_from_context +ffffffff82012d40 T dc_rem_all_planes_for_stream +ffffffff82012f00 T dc_add_all_planes_for_stream +ffffffff82013080 T dc_is_timing_changed +ffffffff820130e0 T dc_is_stream_unchanged +ffffffff820131c0 T dc_is_stream_scaling_unchanged +ffffffff82013260 T update_audio_usage +ffffffff820132d0 T dc_add_stream_to_ctx +ffffffff820133a0 T dc_remove_stream_from_ctx +ffffffff820137b0 T resource_map_pool_resources +ffffffff82014210 t acquire_first_split_pipe +ffffffff82014380 t add_hpo_dp_link_enc_to_ctx +ffffffff82014450 t find_first_free_audio +ffffffff82014500 T dc_resource_state_copy_construct_current +ffffffff82014520 T dc_resource_state_copy_construct +ffffffff820146c0 T dc_resource_state_construct +ffffffff820146e0 T dc_resource_is_dsc_encoding_supported +ffffffff82014730 T dc_validate_with_context +ffffffff82015360 t planes_changed_for_existing_stream +ffffffff820154e0 T dc_validate_global_state +ffffffff82015860 T dc_resource_state_destruct +ffffffff82015940 T dc_resource_find_first_free_pll +ffffffff820159b0 T resource_build_info_frame +ffffffff820160e0 T resource_map_clock_resources +ffffffff82016270 T pipe_need_reprogram +ffffffff820163e0 T resource_build_bit_depth_reduction_params +ffffffff82016610 T dc_validate_stream +ffffffff820167e0 T dc_validate_plane +ffffffff82016870 T resource_pixel_format_to_bpp +ffffffff820168f0 T get_audio_check +ffffffff82016a10 T get_temp_dp_link_res +ffffffff82016b20 T reset_syncd_pipes_from_disabled_pipes +ffffffff82016c70 T check_syncd_pipes_for_disabled_master_pipe +ffffffff82016db0 T reset_sync_context_for_pipe +ffffffff82016e60 T resource_transmitter_to_phy_idx +ffffffff82016ec0 T get_link_hwss +ffffffff82016f50 T is_h_timing_divisible_by_2 +ffffffff82016fb0 T dc_resource_acquire_secondary_pipe_for_mpc_odm +ffffffff820171c0 T update_dp_encoder_resources_for_test_harness +ffffffff82017480 t calculate_plane_rec_in_timing_active +ffffffff82017750 t calculate_init_and_vp +ffffffff82018000 T dc_sink_retain +ffffffff82018030 T dc_sink_release +ffffffff820180a0 T dc_sink_create +ffffffff82019000 T dc_stat_get_dmub_notification +ffffffff820190b0 T dc_stat_get_dmub_dataout +ffffffff8201a000 T update_stream_signal +ffffffff8201a080 T dc_stream_retain +ffffffff8201a0b0 T dc_stream_release +ffffffff8201a130 T dc_create_stream_for_sink +ffffffff8201a470 T dc_copy_stream +ffffffff8201a540 T dc_stream_get_status_from_state +ffffffff8201a5a0 T dc_stream_get_status +ffffffff8201a610 T dc_optimize_timing_for_fsft +ffffffff8201a660 T dc_stream_set_cursor_attributes +ffffffff8201a860 t program_cursor_attributes +ffffffff8201a9c0 T dc_stream_set_cursor_position +ffffffff8201aae0 t program_cursor_position +ffffffff8201ac20 T dc_stream_add_writeback +ffffffff8201ae30 T dc_stream_remove_writeback +ffffffff8201af60 T dc_stream_warmup_writeback +ffffffff8201afa0 T dc_stream_get_vblank_counter +ffffffff8201b070 T dc_stream_send_dp_sdp +ffffffff8201b300 T dc_stream_get_scanoutpos +ffffffff8201b3e0 T dc_stream_dmdata_status_done +ffffffff8201b4a0 T dc_stream_set_dynamic_metadata +ffffffff8201b600 T dc_stream_add_dsc_to_resource +ffffffff8201b650 T dc_stream_get_pipe_ctx +ffffffff8201b700 T dc_stream_log +ffffffff8201c000 T enable_surface_flip_reporting +ffffffff8201c030 T dc_create_plane_state +ffffffff8201c1d0 T dc_plane_get_status +ffffffff8201c350 T dc_plane_state_retain +ffffffff8201c380 T dc_plane_state_release +ffffffff8201c4d0 T dc_gamma_retain +ffffffff8201c500 T dc_gamma_release +ffffffff8201c560 T dc_create_gamma +ffffffff8201c5b0 T dc_transfer_func_retain +ffffffff8201c5e0 T dc_transfer_func_release +ffffffff8201c630 T dc_create_transfer_func +ffffffff8201c680 T dc_create_3dlut_func +ffffffff8201c6e0 T dc_3dlut_func_release +ffffffff8201c730 T dc_3dlut_func_retain +ffffffff8201d000 T vm_helper_mark_vmid_used +ffffffff8201d030 T dc_setup_system_context +ffffffff8201d0c0 T dc_setup_vm_context +ffffffff8201d0f0 T dc_get_vmid_use_vector +ffffffff8201d150 T vm_helper_init +ffffffff8201e000 T dc_dmub_srv_create +ffffffff8201e0a0 T dc_dmub_srv_destroy +ffffffff8201e0f0 T dc_dmub_srv_wait_idle +ffffffff8201e150 T dc_dmub_srv_log_diagnostic_data +ffffffff8201e690 T dc_dmub_srv_clear_inbox0_ack +ffffffff8201e6f0 T dc_dmub_srv_wait_for_inbox0_ack +ffffffff8201e750 T dc_dmub_srv_send_inbox0_cmd +ffffffff8201e7b0 T dc_dmub_srv_cmd_run +ffffffff8201e7d0 T dc_dmub_srv_cmd_run_list +ffffffff8201e980 T dc_dmub_srv_optimized_init_done +ffffffff8201ea00 T dc_dmub_srv_notify_stream_mask +ffffffff8201ea60 T dc_dmub_srv_is_restore_required +ffffffff8201eae0 T dc_dmub_srv_get_dmub_outbox0_msg +ffffffff8201eb10 T dc_dmub_trace_event_control +ffffffff8201eb30 T dc_dmub_srv_drr_update_cmd +ffffffff8201ebc0 T dc_dmub_srv_set_drr_manual_trigger_cmd +ffffffff8201ec50 T dc_dmub_srv_p_state_delegate +ffffffff8201f000 T dc_dmub_srv_query_caps_cmd +ffffffff8201f0c0 T dc_dmub_srv_get_visual_confirm_color_cmd +ffffffff8201f1a0 T dc_dmub_setup_subvp_dmub_command +ffffffff8201fbb0 T dc_dmub_srv_get_diagnostic_data +ffffffff8201fbf0 T dc_send_update_cursor_info_to_dmu +ffffffff8201ff60 T dc_dmub_check_min_version +ffffffff8201ffa0 T dc_dmub_srv_enable_dpia_trace +ffffffff82021000 T dc_edid_parser_send_cea +ffffffff820210b0 T dc_edid_parser_recv_cea_ack +ffffffff82021140 T dc_edid_parser_recv_amd_vsdb +ffffffff82022000 T generic_reg_update_ex +ffffffff82022330 t set_reg_field_values +ffffffff820224e0 T generic_reg_set_ex +ffffffff820226d0 T generic_reg_get +ffffffff82022740 T generic_reg_get2 +ffffffff820227d0 T generic_reg_get3 +ffffffff82022870 T generic_reg_get4 +ffffffff82022920 T generic_reg_get5 +ffffffff820229e0 T generic_reg_get6 +ffffffff82022ac0 T generic_reg_get7 +ffffffff82022bb0 T generic_reg_get8 +ffffffff82022cc0 T generic_reg_wait +ffffffff82022f10 T generic_write_indirect_reg +ffffffff82022f60 T generic_read_indirect_reg +ffffffff82023000 T generic_indirect_reg_get +ffffffff820231b0 T generic_indirect_reg_update_ex +ffffffff820233c0 T generic_indirect_reg_update_ex_sync +ffffffff820235b0 T generic_indirect_reg_get_sync +ffffffff820236e0 T reg_sequence_start_gather +ffffffff82023770 T reg_sequence_start_execute +ffffffff82023910 T reg_sequence_wait_done +ffffffff82023970 T dce_version_to_string +ffffffff82024000 T dce_abm_create +ffffffff820240b0 T dce_abm_destroy +ffffffff82024100 t dce_abm_init +ffffffff82024380 t dce_abm_set_level +ffffffff82024480 t dce_abm_immediate_disable +ffffffff820244d0 t dce_abm_set_pipe +ffffffff82024620 t dce_abm_set_backlight_level_pwm +ffffffff82024810 t dce_abm_get_current_backlight +ffffffff82024840 t dce_abm_get_target_backlight +ffffffff82025000 T dce_aud_az_enable +ffffffff82025150 T dce_aud_az_disable +ffffffff82025340 T dce_aud_az_configure +ffffffff82025fc0 t check_audio_bandwidth +ffffffff82026150 T dce_aud_wall_dto_setup +ffffffff820262d0 T dce_aud_hw_init +ffffffff820264a0 T dce_aud_destroy +ffffffff820264f0 T dce_audio_create +ffffffff820265b0 t dce_aud_endpoint_valid +ffffffff82027000 T dce110_engine_destroy +ffffffff82027050 T dce110_aux_engine_construct +ffffffff820270d0 t dce_aux_configure_timeout +ffffffff820272b0 T dce_aux_transfer_raw +ffffffff82027ae0 t acquire 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dcn31_program_pix_clk +ffffffff8202c000 T dce_dmcu_create +ffffffff8202c0c0 T dcn10_dmcu_create +ffffffff8202c180 T dcn20_dmcu_create +ffffffff8202c240 T dcn21_dmcu_create +ffffffff8202c330 T dce_dmcu_destroy +ffffffff8202c380 t dce_dmcu_init +ffffffff8202c3b0 t dce_dmcu_load_iram +ffffffff8202c510 t dce_dmcu_set_psr_enable +ffffffff8202c640 t dce_dmcu_setup_psr +ffffffff8202c970 t dce_get_dmcu_psr_state +ffffffff8202ca50 t dce_psr_wait_loop +ffffffff8202cb80 t dce_get_psr_wait_loop +ffffffff8202cbb0 t dce_is_dmcu_initialized +ffffffff8202cc10 t dcn10_dmcu_init +ffffffff8202d150 t dcn10_dmcu_load_iram +ffffffff8202d390 t dcn10_dmcu_set_psr_enable +ffffffff8202d520 t dcn10_dmcu_setup_psr +ffffffff8202d8e0 t dcn10_get_dmcu_psr_state +ffffffff8202da00 t dcn10_psr_wait_loop +ffffffff8202db10 t dcn10_get_psr_wait_loop +ffffffff8202db40 t dcn10_is_dmcu_initialized +ffffffff8202db70 t dcn10_send_edid_cea +ffffffff8202dd10 t dcn10_recv_amd_vsdb +ffffffff8202ddc0 t dcn10_recv_edid_cea_ack +ffffffff8202de40 t dcn10_get_scp_results +ffffffff8202df60 t dcn20_lock_phy +ffffffff8202e090 t dcn20_unlock_phy +ffffffff8202e1c0 t dcn21_dmcu_init +ffffffff8202f000 T dce_enable_fe_clock +ffffffff8202f040 T dce_pipe_control_lock +ffffffff8202f240 T dce_set_blender_mode +ffffffff8202f350 T dce_clock_gating_power_up +ffffffff8202f3f0 T dce_crtc_switch_to_clk_src +ffffffff8202f5b0 T dce_use_lut +ffffffff82030000 T dce_i2c_oem_device_present +ffffffff82030080 T dce_i2c_submit_command +ffffffff82031000 T acquire_i2c_hw_engine +ffffffff820313a0 T dce_i2c_submit_command_hw +ffffffff82031ce0 t set_speed +ffffffff82031e30 T dce_i2c_hw_construct +ffffffff82031ea0 T dce100_i2c_hw_construct +ffffffff82031f10 T dce112_i2c_hw_construct +ffffffff82031f80 T dcn1_i2c_hw_construct +ffffffff82031ff0 T dcn2_i2c_hw_construct +ffffffff82032080 t is_hw_busy +ffffffff82033000 T dce_i2c_sw_construct +ffffffff82033030 T dce_i2c_engine_acquire_sw +ffffffff820330d0 T dce_i2c_submit_command_sw +ffffffff820338a0 t write_byte_sw +ffffffff82034000 T dce_ipp_construct +ffffffff82034050 T dce_ipp_destroy +ffffffff820340a0 t dce_ipp_cursor_set_position +ffffffff820341d0 t dce_ipp_cursor_set_attributes +ffffffff82034460 t dce_ipp_program_prescale +ffffffff82034620 t dce_ipp_program_input_lut +ffffffff82034a90 t dce_ipp_set_degamma +ffffffff82035000 T dce110_get_dig_frontend +ffffffff820350c0 T dce110_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff82035160 T dce110_psr_program_dp_dphy_fast_training +ffffffff820351d0 T dce110_psr_program_secondary_packet +ffffffff82035240 T dce110_is_dig_enabled +ffffffff820352a0 T dce110_link_encoder_validate_dvi_output +ffffffff82035350 T dce110_link_encoder_validate_dp_output +ffffffff82035380 T dce110_link_encoder_construct +ffffffff82035550 T dce110_link_encoder_validate_output_with_stream +ffffffff82035700 T dce110_link_encoder_hw_init +ffffffff82035920 T dce110_link_encoder_destroy +ffffffff82035970 T dce110_link_encoder_setup +ffffffff82035aa0 T dce110_link_encoder_enable_tmds_output +ffffffff82035b90 T dce110_link_encoder_enable_lvds_output +ffffffff82035c80 T dce110_link_encoder_enable_dp_output +ffffffff82035de0 T dce110_link_encoder_enable_dp_mst_output +ffffffff82035f40 T dce110_link_encoder_disable_output +ffffffff82036150 T dce110_link_encoder_dp_set_lane_settings +ffffffff820362f0 T dce110_link_encoder_dp_set_phy_pattern +ffffffff82036af0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff82036d10 T dce110_link_encoder_update_mst_stream_allocation_table +ffffffff82036f80 T dce110_link_encoder_connect_dig_be_to_fe +ffffffff820370b0 T dce110_link_encoder_enable_hpd +ffffffff820370e0 T dce110_link_encoder_disable_hpd +ffffffff82037110 T dce110_link_encoder_get_max_link_cap +ffffffff82038000 T dce_mem_input_construct +ffffffff82038060 T dce112_mem_input_construct +ffffffff820380c0 T dce120_mem_input_construct +ffffffff82038120 t dce_mi_program_display_marks +ffffffff820383f0 t dce_mi_allocate_dmif +ffffffff82038630 t dce_mi_free_dmif +ffffffff82038790 t dce_mi_program_surface_flip_and_addr +ffffffff82038ab0 t dce_mi_program_pte_vm +ffffffff82038c70 t dce_mi_program_surface_config +ffffffff820394f0 t dce_mi_is_flip_pending +ffffffff82039580 t program_nbp_watermark +ffffffff82039780 t dce112_mi_program_display_marks +ffffffff82039c90 t dce120_mi_program_display_marks +ffffffff8203a150 t dce120_program_stutter_watermark +ffffffff8203b000 T dce110_opp_set_clamping +ffffffff8203b2b0 T dce110_opp_program_bit_depth_reduction +ffffffff8203ba80 T dce110_opp_program_clamping_and_pixel_encoding +ffffffff8203bc20 T dce110_opp_set_dyn_expansion +ffffffff8203bd70 T dce110_opp_program_fmt +ffffffff8203bef0 T dce110_opp_construct +ffffffff8203bf50 T dce110_opp_destroy +ffffffff8203c000 T dce_panel_cntl_construct +ffffffff8203c060 t dce_panel_cntl_destroy +ffffffff8203c0b0 t dce_panel_cntl_hw_init +ffffffff8203c2f0 t dce_is_panel_backlight_on +ffffffff8203c3a0 t dce_is_panel_powered_on +ffffffff8203c450 t dce_store_backlight_level +ffffffff8203c4f0 t dce_driver_set_backlight +ffffffff8203c670 t dce_get_16_bit_backlight_from_pwm +ffffffff8203d000 T get_filter_3tap_16p +ffffffff8203d090 T get_filter_3tap_64p +ffffffff8203d120 T get_filter_4tap_16p +ffffffff8203d1b0 T get_filter_4tap_64p +ffffffff8203d240 T get_filter_5tap_64p +ffffffff8203d2d0 T get_filter_6tap_64p +ffffffff8203d360 T get_filter_7tap_64p +ffffffff8203d3f0 T get_filter_8tap_64p +ffffffff8203d480 T get_filter_2tap_16p +ffffffff8203d4b0 T get_filter_2tap_64p +ffffffff8203e000 T dce110_se_audio_mute_control +ffffffff8203e050 T dce110_se_dp_audio_setup +ffffffff8203e060 t dce110_se_audio_setup +ffffffff8203e1c0 T dce110_se_dp_audio_enable +ffffffff8203e400 T dce110_se_dp_audio_disable +ffffffff8203e560 T dce110_se_hdmi_audio_setup +ffffffff8203ea60 T dce110_se_hdmi_audio_disable +ffffffff8203eac0 T dce110_stream_encoder_construct +ffffffff8203eb10 t dce110_stream_encoder_dp_set_stream_attribute +ffffffff8203f160 t dce110_stream_encoder_hdmi_set_stream_attribute +ffffffff8203f690 t dce110_stream_encoder_dvi_set_stream_attribute +ffffffff8203f7c0 t dce110_stream_encoder_lvds_set_stream_attribute +ffffffff8203f8a0 t dce110_stream_encoder_set_throttled_vcp_size +ffffffff8203faa0 t dce110_stream_encoder_update_hdmi_info_packets +ffffffff82040190 t dce110_stream_encoder_stop_hdmi_info_packets +ffffffff82040430 t dce110_stream_encoder_update_dp_info_packets +ffffffff820405c0 t dce110_stream_encoder_stop_dp_info_packets +ffffffff82040730 t dce110_stream_encoder_dp_blank +ffffffff82040870 t dce110_stream_encoder_dp_unblank +ffffffff82040a30 t setup_stereo_sync +ffffffff82040ab0 t dce110_stream_encoder_set_avmute +ffffffff82040af0 t dig_connect_to_otg +ffffffff82040b30 t dce110_reset_hdmi_stream_attribute +ffffffff82040c30 t dig_source_otg +ffffffff82040ca0 t dce110_stream_encoder_set_stream_attribute_helper +ffffffff82040d90 t dce110_update_generic_info_packet +ffffffff82042000 T dce_transform_get_optimal_number_of_taps +ffffffff82042300 T dce110_opp_set_csc_adjustment +ffffffff820423c0 t program_color_matrix +ffffffff820425f0 T dce110_opp_set_csc_default +ffffffff82042730 T dce110_opp_program_regamma_pwl +ffffffff82042fe0 T dce110_opp_power_on_regamma_lut +ffffffff820430a0 T dce110_opp_set_regamma_mode +ffffffff82043110 T dce_transform_construct +ffffffff82043190 t dce_transform_reset +ffffffff820431d0 t dce_transform_set_scaler +ffffffff82043c70 t dce_transform_set_pixel_storage_depth +ffffffff82044120 t dce_transform_set_gamut_remap +ffffffff82044460 t program_multi_taps_filter +ffffffff82045000 T dmub_abm_create +ffffffff820450d0 T dmub_abm_destroy +ffffffff82045120 t dmub_abm_init_ex +ffffffff82045130 t dmub_abm_set_level_ex +ffffffff820451e0 t dmub_abm_set_backlight_level_pwm_ex +ffffffff82045280 t dmub_abm_get_current_backlight_ex +ffffffff82045290 t dmub_abm_get_target_backlight_ex +ffffffff820452a0 t dmub_abm_init_config_ex +ffffffff82045330 t dmub_abm_set_pause_ex +ffffffff820453d0 t dmub_abm_save_restore_ex +ffffffff82045460 t dmub_abm_set_pipe_ex +ffffffff82046000 T dmub_abm_init +ffffffff820463c0 T dmub_abm_get_current_backlight +ffffffff820463f0 T dmub_abm_get_target_backlight +ffffffff82046420 T dmub_abm_set_level +ffffffff820464b0 T dmub_abm_init_config +ffffffff820465b0 T dmub_abm_set_pause +ffffffff82046650 T dmub_abm_save_restore +ffffffff82046770 T dmub_abm_set_pipe +ffffffff82046810 T dmub_abm_set_backlight_level +ffffffff82047000 T dmub_hw_lock_mgr_cmd +ffffffff820470a0 T dmub_hw_lock_mgr_inbox0_cmd +ffffffff820470e0 T should_use_dmub_lock +ffffffff82048000 T dmub_enable_outbox_notification +ffffffff82049000 T dmub_psr_create +ffffffff82049090 T dmub_psr_destroy +ffffffff820490e0 t dmub_psr_copy_settings +ffffffff820495d0 t dmub_psr_enable +ffffffff82049750 t dmub_psr_get_state +ffffffff82049a60 t dmub_psr_set_level +ffffffff82049b30 t dmub_psr_force_static +ffffffff82049bd0 t dmub_psr_get_residency +ffffffff82049c20 t dmub_psr_set_sink_vtotal_in_psr_active +ffffffff82049cc0 t dmub_psr_set_power_opt +ffffffff8204a000 T dmub_replay_create +ffffffff8204a090 T dmub_replay_destroy +ffffffff8204a0e0 t dmub_replay_get_state +ffffffff8204a1d0 t dmub_replay_enable +ffffffff8204a3f0 t dmub_replay_copy_settings +ffffffff8204a6b0 t dmub_replay_set_power_opt +ffffffff8204a750 t dmub_replay_set_coasting_vtotal +ffffffff8204a7e0 t dmub_replay_residency +ffffffff8204b000 T dce100_enable_display_power_gating +ffffffff8204b0a0 T dce100_prepare_bandwidth +ffffffff8204b0f0 T dce100_optimize_bandwidth +ffffffff8204b140 T dce100_hw_sequencer_construct +ffffffff8204c000 T dce100_add_stream_to_ctx +ffffffff8204c0a0 T dce100_validate_plane +ffffffff8204c0e0 T dce100_find_first_free_match_stream_enc_for_link +ffffffff8204c190 T dce100_create_resource_pool +ffffffff8204cf60 t dce100_resource_destruct +ffffffff8204d220 t dce100_destroy_resource_pool +ffffffff8204d280 t dce100_panel_cntl_create +ffffffff8204d310 t dce100_link_encoder_create +ffffffff8204d410 t dce100_validate_bandwidth +ffffffff8204d550 t dce100_validate_global +ffffffff8204d5f0 t read_dce_straps +ffffffff8204d660 t create_audio +ffffffff8204d690 t dce100_stream_encoder_create +ffffffff8204d730 t dce100_hwseq_create +ffffffff8204e000 T dce110_compressor_power_up_fbc +ffffffff8204e130 T dce110_compressor_enable_fbc +ffffffff8204e340 T dce110_compressor_is_fbc_enabled_in_hw +ffffffff8204e3f0 T dce110_compressor_disable_fbc +ffffffff8204e6c0 T dce110_compressor_program_compressed_surface_address_and_pitch +ffffffff8204e7e0 T dce110_compressor_set_fbc_invalidation_triggers +ffffffff8204e860 T dce110_compressor_create +ffffffff8204e900 T dce110_compressor_construct +ffffffff8204e980 T dce110_compressor_destroy +ffffffff8204e9d0 T get_max_support_fbc_buffersize +ffffffff8204f000 T dce110_update_info_frame +ffffffff8204f0f0 T dce110_enable_stream +ffffffff8204f190 T dce110_edp_wait_for_hpd_ready +ffffffff8204f3f0 T dce110_edp_power_control +ffffffff8204f950 T dce110_edp_wait_for_T12 +ffffffff8204fb00 T dce110_edp_backlight_control +ffffffff8204fe60 T dce110_enable_audio_stream +ffffffff8204ff20 T dce110_disable_audio_stream +ffffffff8204ffe0 T dce110_disable_stream +ffffffff82050230 T dce110_unblank_stream +ffffffff82050330 T dce110_blank_stream +ffffffff820504a0 T dce110_set_avmute +ffffffff820504f0 T dce110_enable_accelerated_mode +ffffffff820508a0 t power_down_all_hw_blocks +ffffffff82050a70 T dce110_set_safe_displaymarks +ffffffff82050b90 T dce110_apply_ctx_to_hw +ffffffff82051490 t enable_fbc +ffffffff82051650 T dce110_power_down +ffffffff82051740 T dce110_prepare_bandwidth +ffffffff82051890 T dce110_optimize_bandwidth +ffffffff82051a90 T dce110_set_backlight_level +ffffffff82051ba0 T dce110_set_abm_immediate_disable +ffffffff82051c20 T dce110_set_pipe +ffffffff82051c90 T dce110_enable_lvds_link_output +ffffffff82051cf0 T dce110_enable_tmds_link_output +ffffffff82051d60 T dce110_enable_dp_link_output +ffffffff82051f90 T dce110_disable_link_output +ffffffff82052080 T dce110_hw_sequencer_construct +ffffffff820520d0 t enable_display_pipe_clock_gating +ffffffff82052100 t build_audio_output +ffffffff82052260 t init_hw +ffffffff82052500 t dce110_power_down_fe +ffffffff820525d0 t dce110_apply_ctx_for_surface +ffffffff82052d10 t dce110_post_unlock_program_front_end +ffffffff82052d40 t update_plane_addr +ffffffff82052db0 t dce110_wait_for_mpcc_disconnect +ffffffff82052de0 t dce110_update_pending_status +ffffffff82052ec0 t get_position +ffffffff82052f50 t dce110_enable_per_frame_crtc_position_reset +ffffffff820531f0 t dce110_enable_timing_synchronization +ffffffff820534e0 t set_drr +ffffffff820535c0 t set_static_screen_control +ffffffff82053690 t dce110_set_cursor_position +ffffffff820537e0 t dce110_set_cursor_attribute +ffffffff820538a0 t program_gamut_remap +ffffffff820539f0 t program_output_csc +ffffffff82053af0 t init_pipes +ffffffff82053b20 t dce110_reset_hw_ctx_wrap +ffffffff82053d70 t dce110_set_input_transfer_func +ffffffff82053f00 t dce110_set_output_transfer_func +ffffffff82054810 t dce110_enable_display_power_gating +ffffffff82054970 t dce110_enable_stream_timing +ffffffff82055000 T dce110_mem_input_v_construct +ffffffff82055040 t dce_mem_input_v_program_display_marks +ffffffff820550c0 t dce_mem_input_program_chroma_display_marks +ffffffff82055140 t dce110_allocate_mem_input_v +ffffffff82055250 t dce110_free_mem_input_v +ffffffff82055280 t dce_mem_input_v_program_surface_flip_and_addr +ffffffff820553d0 t dce_mem_input_v_program_pte_vm +ffffffff820556a0 t dce_mem_input_v_program_surface_config +ffffffff82055a70 t dce_mem_input_v_is_surface_pending +ffffffff82055ae0 t program_urgency_watermark +ffffffff82055bf0 t program_nbp_watermark +ffffffff82055d60 t program_stutter_watermark +ffffffff82056000 T dce110_opp_v_set_csc_default +ffffffff82056300 t program_color_matrix_v +ffffffff82056470 t configure_graphics_mode_v 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t dce110_hwseq_create +ffffffff8205b000 T dce110_timing_generator_set_early_control +ffffffff8205b070 T dce110_timing_generator_enable_crtc +ffffffff8205b100 T dce110_timing_generator_program_blank_color +ffffffff8205b190 T dce110_timing_generator_disable_crtc +ffffffff8205b1e0 T dce110_timing_generator_program_timing_generator +ffffffff8205b3d0 T dce110_timing_generator_set_drr +ffffffff8205b510 T dce110_timing_generator_set_static_screen_control +ffffffff8205b5a0 T dce110_timing_generator_get_vblank_counter +ffffffff8205b600 T dce110_timing_generator_get_position +ffffffff8205b6a0 T dce110_timing_generator_get_crtc_scanoutpos +ffffffff8205b790 T dce110_timing_generator_program_blanking +ffffffff8205ba00 T dce110_timing_generator_set_test_pattern +ffffffff8205bcf0 T dce110_timing_generator_validate_timing +ffffffff8205bdb0 T dce110_timing_generator_wait_for_vblank +ffffffff8205bf20 T dce110_timing_generator_is_counter_moving +ffffffff8205bfa0 T dce110_timing_generator_wait_for_vactive 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dcn10_get_dcc_compression_cap +ffffffff82099000 T enc1_update_generic_info_packet +ffffffff82099430 T enc1_stream_encoder_dp_set_stream_attribute +ffffffff82099910 T enc1_stream_encoder_set_stream_attribute_helper +ffffffff82099990 T enc1_stream_encoder_hdmi_set_stream_attribute +ffffffff82099f80 T enc1_stream_encoder_dvi_set_stream_attribute +ffffffff8209a110 T enc1_stream_encoder_set_throttled_vcp_size +ffffffff8209a330 T enc1_stream_encoder_update_dp_info_packets +ffffffff8209a530 T enc1_stream_encoder_send_immediate_sdp_message +ffffffff8209a940 T enc1_stream_encoder_stop_dp_info_packets +ffffffff8209ab10 T enc1_stream_encoder_dp_blank +ffffffff8209acb0 T enc1_stream_encoder_dp_unblank +ffffffff8209aee0 T enc1_stream_encoder_set_avmute +ffffffff8209af20 T enc1_reset_hdmi_stream_attribute +ffffffff8209aff0 T get_audio_clock_info +ffffffff8209b0e0 T enc1_se_enable_audio_clock +ffffffff8209b140 T enc1_se_enable_dp_audio +ffffffff8209b210 T enc1_se_audio_mute_control +ffffffff8209b260 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dpp2_power_on_obuf +ffffffff8209e2a0 T dpp2_dummy_program_input_lut +ffffffff8209e2d0 T dscl2_calc_lb_num_partitions +ffffffff8209e400 T dpp2_cnv_set_alpha_keyer +ffffffff8209e680 T dpp2_set_cursor_attributes +ffffffff8209e7e0 T oppn20_dummy_program_regamma_pwl +ffffffff8209e810 T dpp2_construct +ffffffff8209e890 t dpp2_cnv_setup +ffffffff820a0000 T dpp2_set_degamma_pwl +ffffffff820a03b0 T dpp2_set_degamma +ffffffff820a0560 T dpp2_cm_set_gamut_remap +ffffffff820a0790 T dpp2_program_input_csc +ffffffff820a09c0 T dpp20_program_blnd_lut +ffffffff820a1120 T dpp20_program_shaper +ffffffff820a30d0 T dpp20_program_3dlut +ffffffff820a37a0 t dpp20_set3dlut_ram12 +ffffffff820a3970 T dpp2_set_hdr_multiplier +ffffffff820a4000 T dsc2_construct +ffffffff820a4050 T dsc2_get_enc_caps +ffffffff820a40d0 T dsc_config_log +ffffffff820a4180 T dsc2_get_packed_pps +ffffffff820a4320 T dsc_prepare_config +ffffffff820a4860 T dsc_log_pps +ffffffff820a4fe0 T dsc_override_rc_params +ffffffff820a5130 T dsc_init_reg_values +ffffffff820a5220 T dsc_dc_pixel_encoding_to_dsc_pixel_format +ffffffff820a52d0 T dsc_dc_color_depth_to_dsc_bits_per_comp +ffffffff820a5310 T dsc_update_from_dsc_parameters +ffffffff820a53c0 t dsc2_read_state +ffffffff820a5570 t dsc2_validate_stream +ffffffff820a55d0 t dsc2_set_config +ffffffff820a6940 t dsc2_enable +ffffffff820a6af0 t dsc2_disable +ffffffff820a6c70 t dsc2_disconnect +ffffffff820a7000 T dwb2_config_dwb_cnv +ffffffff820a7200 T dwb2_disable +ffffffff820a7310 T dwb2_is_enabled +ffffffff820a73b0 T dwb2_set_stereo +ffffffff820a7490 T dwb2_set_new_content +ffffffff820a7500 T dwb2_set_scaler +ffffffff820a7880 T dcn20_dwbc_construct +ffffffff820a78d0 t dwb2_get_caps +ffffffff820a79b0 t dwb2_enable +ffffffff820a7b10 t dwb2_update +ffffffff820a7c70 t dwb2_set_warmup +ffffffff820a8000 T dwb_program_horz_scalar +ffffffff820a84c0 t wbscl_get_filter_coeffs_16p +ffffffff820a8990 t wbscl_set_scaler_filter +ffffffff820a8ba0 T dwb_program_vert_scalar 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hubp2_cursor_set_attributes +ffffffff820aded0 T hubp2_dmdata_set_attributes +ffffffff820ae2b0 T hubp2_dmdata_load +ffffffff820ae340 T hubp2_dmdata_status_done +ffffffff820ae3b0 T hubp2_program_surface_flip_and_addr +ffffffff820aeca0 T hubp2_enable_triplebuffer +ffffffff820aed70 T hubp2_is_triplebuffer_enabled +ffffffff820aedf0 T hubp2_set_flip_control_surface_gsl +ffffffff820aee40 T hubp2_is_flip_pending +ffffffff820aef50 T hubp2_set_blank +ffffffff820aefb0 T hubp2_set_blank_regs +ffffffff820af0b0 T hubp2_cursor_set_position +ffffffff820af520 T hubp2_clk_cntl +ffffffff820af570 T hubp2_vtg_sel +ffffffff820af5b0 T hubp2_clear_underflow +ffffffff820af600 T hubp2_read_state_common +ffffffff820b0250 T hubp2_read_state +ffffffff820b0520 T hubp2_construct +ffffffff820b0590 t hubp2_setup +ffffffff820b0a30 t hubp2_validate_dml_output +ffffffff820b2000 T dcn20_set_flip_control_gsl +ffffffff820b2050 T dcn20_enable_power_gating_plane +ffffffff820b24b0 T dcn20_dccg_init +ffffffff820b2530 T dcn20_disable_vga +ffffffff820b25f0 T dcn20_program_triple_buffer +ffffffff820b2640 T dcn20_init_blank +ffffffff820b2850 T dcn20_dsc_pg_control +ffffffff820b2c60 T dcn20_dpp_pg_control +ffffffff820b2f10 T dcn20_hubp_pg_control +ffffffff820b31c0 T dcn20_plane_atomic_disable +ffffffff820b3310 t dcn20_setup_gsl_group_as_lock +ffffffff820b3570 T dcn20_disable_plane +ffffffff820b3650 T dcn20_disable_pixel_data +ffffffff820b3670 T dcn20_blank_pixel_data +ffffffff820b3890 T dcn20_enable_stream_timing +ffffffff820b3e50 T dcn20_program_output_csc +ffffffff820b3f40 T dcn20_set_output_transfer_func +ffffffff820b40c0 T dcn20_set_blend_lut +ffffffff820b4130 T dcn20_set_shaper_3dlut +ffffffff820b41f0 T dcn20_set_input_transfer_func +ffffffff820b43b0 T dcn20_update_odm +ffffffff820b44a0 T dcn20_pipe_control_lock +ffffffff820b47c0 T dcn20_program_front_end_for_ctx +ffffffff820b5470 t dcn20_program_pipe +ffffffff820b5f10 T dcn20_post_unlock_program_front_end +ffffffff820b61e0 T dcn20_prepare_bandwidth +ffffffff820b6350 T dcn20_optimize_bandwidth +ffffffff820b6560 T dcn20_update_bandwidth +ffffffff820b6820 T dcn20_enable_writeback +ffffffff820b6970 T dcn20_disable_writeback +ffffffff820b6a00 T dcn20_wait_for_blank_complete +ffffffff820b6a90 T dcn20_dmdata_status_done +ffffffff820b6ae0 T dcn20_disable_stream_gating +ffffffff820b6b90 T dcn20_enable_stream_gating +ffffffff820b6c30 T dcn20_set_dmdata_attributes +ffffffff820b6cf0 T dcn20_init_vm_ctx +ffffffff820b6db0 T dcn20_init_sys_ctx +ffffffff820b6e60 T dcn20_update_plane_addr +ffffffff820b6fa0 T dcn20_unblank_stream +ffffffff820b7150 T dcn20_setup_vupdate_interrupt +ffffffff820b71c0 T dcn20_reset_hw_ctx_wrap +ffffffff820b7560 T dcn20_update_mpcc +ffffffff820b77c0 T dcn20_enable_stream +ffffffff820b7b20 T dcn20_program_dmdata_engine +ffffffff820b7bc0 T dcn20_fpga_init_hw +ffffffff820b81a0 T dcn20_optimize_timing_for_fsft +ffffffff820b81e0 T dcn20_set_disp_pattern_generator +ffffffff820b9000 T dcn20_hw_sequencer_construct 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+ffffffff820bfb80 T optc2_lock_doublebuffer_disable +ffffffff820bfc60 T optc2_setup_manual_trigger +ffffffff820bfdf0 T optc2_program_manual_trigger +ffffffff820bfe60 T optc2_configure_crc +ffffffff820bfef0 T optc2_get_last_used_drr_vtotal +ffffffff820bff30 T dcn20_timing_generator_init +ffffffff820bffa0 t optc2_set_dwb_source +ffffffff820c0040 t optc2_align_vblanks +ffffffff820c1000 T dcn20_dpp_destroy +ffffffff820c1050 T dcn20_dpp_create +ffffffff820c1120 T dcn20_ipp_create +ffffffff820c11d0 T dcn20_opp_create +ffffffff820c1280 T dcn20_aux_engine_create +ffffffff820c1320 T dcn20_i2c_hw_create +ffffffff820c13b0 T dcn20_mpc_create +ffffffff820c1440 T dcn20_hubbub_create +ffffffff820c1510 T dcn20_timing_generator_create +ffffffff820c15a0 T dcn20_link_encoder_create +ffffffff820c16a0 T dcn20_stream_encoder_create +ffffffff820c1760 T dcn20_hwseq_create +ffffffff820c17d0 T dcn20_clock_source_destroy +ffffffff820c1820 T dcn20_dsc_create +ffffffff820c18e0 T dcn20_dsc_destroy +ffffffff820c1930 T dcn20_hubp_create +ffffffff820c1a00 T dcn20_build_mapped_resource +ffffffff820c1c20 T dcn20_acquire_dsc +ffffffff820c1d60 T dcn20_release_dsc +ffffffff820c1dd0 T dcn20_add_dsc_to_stream_resource +ffffffff820c1f40 T dcn20_add_stream_to_ctx +ffffffff820c1fd0 T dcn20_remove_stream_from_ctx +ffffffff820c20c0 T dcn20_split_stream_for_odm +ffffffff820c2570 T dcn20_split_stream_for_mpc +ffffffff820c26f0 T dcn20_calc_max_scaled_time +ffffffff820c2760 T dcn20_set_mcif_arb_params +ffffffff820c28d0 T dcn20_validate_dsc +ffffffff820c2a80 T dcn20_find_secondary_pipe +ffffffff820c2c60 T dcn20_merge_pipes_for_validate +ffffffff820c2ed0 T dcn20_validate_apply_pipe_split_flags +ffffffff820c3760 T dcn20_fast_validate_bw +ffffffff820c3cb0 T dcn20_validate_bandwidth +ffffffff820c3d30 T dcn20_acquire_free_pipe_for_layer +ffffffff820c3e50 T dcn20_get_dcc_compression_cap +ffffffff820c3e80 T dcn20_patch_unknown_plane_state +ffffffff820c3ee0 T dcn20_dwbc_create +ffffffff820c3ff0 T dcn20_mmhubbub_create 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hubp21_validate_dml_output +ffffffff820dc000 T dcn21_init_sys_ctx +ffffffff820dc110 T dcn21_s0i3_golden_init_wa +ffffffff820dc170 T dcn21_exit_optimized_pwr_state +ffffffff820dc190 T dcn21_optimize_pwr_state +ffffffff820dc1c0 T dcn21_PLAT_58856_wa +ffffffff820dc260 T dcn21_set_abm_immediate_disable +ffffffff820dc3a0 T dcn21_set_pipe +ffffffff820dc4d0 T dcn21_set_backlight_level +ffffffff820dc6d0 T dcn21_is_abm_supported +ffffffff820dd000 T dcn21_hw_sequencer_construct +ffffffff820de000 T dcn21_link_encoder_enable_dp_output +ffffffff820de140 t dcn21_link_encoder_acquire_phy +ffffffff820de320 T dcn21_link_encoder_construct +ffffffff820de500 t dcn21_link_encoder_enable_dp_mst_output +ffffffff820de570 t dcn21_link_encoder_disable_output +ffffffff820df000 T dcn21_fast_validate_bw +ffffffff820df6a0 T dcn21_create_resource_pool +ffffffff820e09d0 t dcn21_resource_destruct +ffffffff820e0e70 t dcn21_destroy_resource_pool +ffffffff820e0ed0 t dcn21_panel_cntl_create +ffffffff820e0f60 t dcn21_link_encoder_create +ffffffff820e1060 t dcn21_validate_bandwidth +ffffffff820e10e0 t dcn21_patch_unknown_plane_state +ffffffff820e1130 t dcn21_get_panel_config_defaults +ffffffff820e1170 t read_dce_straps +ffffffff820e11a0 t dcn21_create_audio +ffffffff820e11d0 t dcn21_stream_encoder_create +ffffffff820e1270 t dcn21_hwseq_create +ffffffff820e2000 T afmt3_setup_hdmi_audio +ffffffff820e21d0 T afmt3_se_audio_setup +ffffffff820e2370 T afmt3_audio_mute_control +ffffffff820e23e0 T afmt3_audio_info_immediate_update +ffffffff820e2420 T afmt3_setup_dp_audio +ffffffff820e2510 T afmt3_construct +ffffffff820e3000 T cm_helper_program_gamcor_xfer_func +ffffffff820e33c0 T cm3_helper_translate_curve_to_hw_format +ffffffff820e3fd0 T cm3_helper_convert_to_custom_float +ffffffff820e4420 T cm3_helper_translate_curve_to_degamma_hw_format +ffffffff820e4c40 T is_rgb_equal +ffffffff820e5000 T dccg3_create +ffffffff820e50b0 T dccg30_create +ffffffff820e6000 T dcn30_link_encoder_validate_output_with_stream +ffffffff820e6010 T dcn30_link_encoder_construct +ffffffff820e61f0 T enc3_hw_init +ffffffff820e7000 T enc3_stream_encoder_update_hdmi_info_packets +ffffffff820e7100 t enc3_update_hdmi_info_packet +ffffffff820e74f0 T enc3_stream_encoder_stop_hdmi_info_packets +ffffffff820e7ad0 T enc3_dp_set_dsc_pps_info_packet +ffffffff820e7df0 T enc3_stream_encoder_update_dp_info_packets_sdp_line_num +ffffffff820e7eb0 T enc3_stream_encoder_update_dp_info_packets +ffffffff820e8170 T enc3_audio_mute_control +ffffffff820e81e0 T enc3_se_dp_audio_setup +ffffffff820e8260 T enc3_se_dp_audio_enable +ffffffff820e8350 T enc3_se_hdmi_audio_setup +ffffffff820e8660 T dcn30_dio_stream_encoder_construct +ffffffff820e86d0 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff820e8cd0 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff820e8ed0 t enc3_read_state +ffffffff820e9060 t enc3_dp_set_dsc_config +ffffffff820e9130 t enc3_dp_set_odm_combine +ffffffff820ea000 T dpp30_read_state +ffffffff820ea050 T dpp3_program_post_csc +ffffffff820ea240 T dpp3_set_pre_degam +ffffffff820ea2f0 T dpp3_cnv_setup +ffffffff820eabc0 T dpp3_set_cursor_attributes +ffffffff820ead30 T dpp3_get_optimal_number_of_taps +ffffffff820eb750 T dpp3_construct +ffffffff820eb7b0 t dpp3_deferred_update +ffffffff820ebb90 t dpp3_program_blnd_lut +ffffffff820ec5e0 t dpp3_program_shaper +ffffffff820ee660 t dpp3_program_3dlut +ffffffff820eee10 t dpp3_set3dlut_ram12 +ffffffff820ef000 T dpp3_program_cm_dealpha +ffffffff820ef0a0 T dpp3_program_cm_bias +ffffffff820ef190 T dpp3_program_gamcor_lut +ffffffff820efbb0 t dpp3_power_on_gamcor_lut +ffffffff820efce0 T dpp3_set_hdr_multiplier +ffffffff820efd30 T dpp3_cm_set_gamut_remap +ffffffff820f0000 T dwb3_config_fc +ffffffff820f01b0 T dwb3_set_stereo +ffffffff820f0270 T dwb3_enable +ffffffff820f03a0 T dwb3_set_denorm +ffffffff820f04c0 T dwb3_disable +ffffffff820f0570 T dwb3_update +ffffffff820f06a0 T dwb3_is_enabled +ffffffff820f0740 T dwb3_set_new_content +ffffffff820f0780 T dcn30_dwbc_construct +ffffffff820f07d0 T dwb3_set_host_read_rate_control +ffffffff820f0840 t dwb3_get_caps +ffffffff820f1000 T dwb3_ogam_set_input_transfer_func +ffffffff820f19f0 T dwb3_set_gamut_remap +ffffffff820f1ca0 T dwb3_program_hdr_mult +ffffffff820f2000 T hubbub3_init_dchub_sys_ctx +ffffffff820f21c0 T hubbub3_program_watermarks +ffffffff820f22c0 T hubbub3_dcc_support_swizzle +ffffffff820f2380 T hubbub3_get_dcc_compression_cap +ffffffff820f2560 T hubbub3_force_wm_propagate_to_pipes +ffffffff820f2610 T hubbub3_force_pstate_change_control +ffffffff820f2690 T hubbub3_init_watermarks +ffffffff820f29d0 T hubbub3_construct +ffffffff820f3000 T hubp3_set_vm_system_aperture_settings +ffffffff820f3130 T hubp3_program_surface_flip_and_addr +ffffffff820f3b20 T hubp3_dcc_control +ffffffff820f3be0 T hubp3_dcc_control_sienna_cichlid +ffffffff820f3d00 T hubp3_dmdata_set_attributes +ffffffff820f3f00 T hubp3_program_surface_config +ffffffff820f41f0 T hubp3_read_state +ffffffff820f44c0 T hubp3_setup +ffffffff820f4550 T hubp3_init +ffffffff820f4580 T hubp3_construct +ffffffff820f5000 T dcn30_set_blend_lut +ffffffff820f5070 T dcn30_set_input_transfer_func +ffffffff820f51d0 T dcn30_set_output_transfer_func +ffffffff820f5500 T dcn30_update_writeback +ffffffff820f5590 t dcn30_set_writeback +ffffffff820f5740 T dcn30_mmhubbub_warmup +ffffffff820f5990 T dcn30_enable_writeback +ffffffff820f5a40 T dcn30_disable_writeback +ffffffff820f5b20 T dcn30_program_all_writeback_pipes_in_tree +ffffffff820f5e20 T dcn30_init_hw +ffffffff820f6550 T dcn30_set_avmute +ffffffff820f65b0 T dcn30_update_info_frame +ffffffff820f66a0 T dcn30_program_dmdata_engine +ffffffff820f6740 T dcn30_apply_idle_power_optimizations +ffffffff820f6c60 T dcn30_does_plane_fit_in_mall +ffffffff820f6d10 T dcn30_hardware_release +ffffffff820f6e00 T dcn30_set_disp_pattern_generator +ffffffff820f6e70 T dcn30_prepare_bandwidth +ffffffff820f6f60 T dcn30_set_static_screen_control +ffffffff820f7000 T dcn30_hw_sequencer_construct +ffffffff820f8000 T dcn30_mmhubbub_construct +ffffffff820f8050 t mmhubbub3_warmup_mcif +ffffffff820f8260 t mmhubbub3_config_mcif_buf +ffffffff820f8710 t mmhubbub3_config_mcif_arb +ffffffff820f9000 T mpc3_is_dwb_idle +ffffffff820f9070 T mpc3_set_dwb_mux +ffffffff820f90f0 T mpc3_disable_dwb_mux +ffffffff820f9170 T mpc3_set_out_rate_control +ffffffff820f9280 T mpc3_get_ogam_current +ffffffff820f9320 T mpc3_power_on_ogam_lut +ffffffff820f93f0 T mpc3_set_output_gamma +ffffffff820fa030 T mpc3_set_denorm +ffffffff820fa0a0 T mpc3_set_denorm_clamp +ffffffff820fa1f0 T mpc3_program_shaper +ffffffff820fc3b0 t mpc3_power_on_shaper_3dlut +ffffffff820fc730 T mpc3_init_mpcc +ffffffff820fc7b0 T mpc3_set_gamut_remap +ffffffff820fca20 T mpc3_program_3dlut +ffffffff820fd190 t mpc3_set3dlut_ram12 +ffffffff820fd370 T mpc3_set_output_csc +ffffffff820fd4e0 T mpc3_set_ocsc_default +ffffffff820fd650 T mpc3_set_rmu_mux +ffffffff820fd6f0 T mpc3_get_rmu_mux_status +ffffffff820fd7a0 T mpcc3_acquire_rmu +ffffffff820fd900 T dcn30_mpc_construct +ffffffff820fd9d0 t mpcc3_release_rmu +ffffffff820fdb40 t mpc3_set_mpc_mem_lp_mode +ffffffff820fe000 T optc3_triplebuffer_lock +ffffffff820fe120 T optc3_lock_doublebuffer_enable +ffffffff820fe3b0 T optc3_lock_doublebuffer_disable +ffffffff820fe4d0 T optc3_lock +ffffffff820fe5a0 T optc3_set_out_mux +ffffffff820fe5e0 T optc3_program_blank_color +ffffffff820fe710 T optc3_set_drr_trigger_window +ffffffff820fe7a0 T optc3_set_vtotal_change_limit +ffffffff820fe810 T optc3_set_dsc_config +ffffffff820fe860 T optc3_set_odm_bypass +ffffffff820fe9e0 T optc3_set_odm_combine +ffffffff820fed30 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff820fedb0 T optc3_set_vtotal_min_max +ffffffff820fedf0 T optc3_tg_init +ffffffff820fee50 T dcn30_timing_generator_init +ffffffff820ff000 T dcn30_add_stream_to_ctx +ffffffff820ff020 T dcn30_populate_dml_pipes_from_context +ffffffff820ff100 T dcn30_populate_dml_writeback_from_context +ffffffff820ff160 T dcn30_calc_max_scaled_time +ffffffff820ff1c0 T dcn30_set_mcif_arb_params +ffffffff820ff330 T dcn30_acquire_post_bldn_3dlut +ffffffff820ff4c0 T dcn30_release_post_bldn_3dlut +ffffffff820ff570 T dcn30_internal_validate_bw +ffffffff821002e0 t dcn30_split_stream_for_mpc_or_odm +ffffffff82100600 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff821006e0 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82100780 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff82100820 T dcn30_update_soc_for_wm_a +ffffffff82100870 T dcn30_calculate_wm_and_dlg +ffffffff821008e0 T dcn30_validate_bandwidth +ffffffff82100d10 T dcn30_update_bw_bounding_box +ffffffff82101370 T dcn30_create_resource_pool +ffffffff82102920 t dcn30_resource_destruct +ffffffff82102ea0 t dcn30_destroy_resource_pool +ffffffff82102f00 t dcn30_panel_cntl_create +ffffffff82102f90 t dcn30_link_encoder_create +ffffffff82103040 t dcn30_get_panel_config_defaults +ffffffff821030c0 t read_dce_straps +ffffffff821030f0 t dcn30_create_audio +ffffffff82103120 t dcn30_stream_encoder_create +ffffffff821032a0 t dcn30_hwseq_create +ffffffff82104000 T vpg3_update_generic_info_packet +ffffffff821049a0 T vpg3_construct +ffffffff82105000 T dccg301_create +ffffffff82106000 T dcn301_link_encoder_construct +ffffffff82107000 T hubbub301_construct +ffffffff82108000 T dcn301_hw_sequencer_construct +ffffffff82109000 T optc301_set_drr +ffffffff82109230 T optc301_setup_manual_trigger +ffffffff82109350 T dcn301_timing_generator_init +ffffffff8210a000 T dcn301_panel_cntl_construct +ffffffff8210a050 t dcn301_panel_cntl_destroy +ffffffff8210a0a0 t dcn301_panel_cntl_hw_init +ffffffff8210a2b0 t dcn301_is_panel_backlight_on +ffffffff8210a310 t dcn301_is_panel_powered_on +ffffffff8210a3c0 t dcn301_store_backlight_level +ffffffff8210a460 t dcn301_get_16_bit_backlight_from_pwm +ffffffff8210b000 T dcn301_create_resource_pool +ffffffff8210c590 t dcn301_destruct +ffffffff8210cad0 t dcn301_destroy_resource_pool +ffffffff8210cb30 t dcn301_panel_cntl_create +ffffffff8210cbc0 t dcn301_link_encoder_create +ffffffff8210cc70 t dcn301_calculate_wm_and_dlg +ffffffff8210cce0 t read_dce_straps +ffffffff8210cd10 t dcn301_create_audio +ffffffff8210cd40 t dcn301_stream_encoder_create +ffffffff8210cec0 t dcn301_hwseq_create +ffffffff8210d000 T dcn302_dpp_pg_control +ffffffff8210d2a0 T dcn302_hubp_pg_control +ffffffff8210d550 T dcn302_dsc_pg_control +ffffffff8210e000 T dcn302_hw_sequencer_construct +ffffffff8210f000 T dcn302_update_bw_bounding_box +ffffffff8210f050 T dcn302_create_resource_pool +ffffffff821104a0 t dcn302_resource_destruct +ffffffff821109e0 t dcn302_destroy_resource_pool +ffffffff82110a30 t dcn302_panel_cntl_create +ffffffff82110ac0 t dcn302_link_encoder_create +ffffffff82110b70 t dcn302_get_panel_config_defaults +ffffffff82110bf0 t read_dce_straps +ffffffff82110c20 t dcn302_create_audio +ffffffff82110c50 t dcn302_stream_encoder_create +ffffffff82110dd0 t dcn302_hwseq_create +ffffffff82111000 T dcn303_dpp_pg_control +ffffffff82111030 T dcn303_hubp_pg_control +ffffffff82111060 T dcn303_dsc_pg_control +ffffffff82111090 T dcn303_enable_power_gating_plane +ffffffff82112000 T dcn303_hw_sequencer_construct +ffffffff82113000 T dcn303_update_bw_bounding_box +ffffffff82113050 T dcn303_create_resource_pool +ffffffff821142a0 t dcn303_resource_destruct +ffffffff821147e0 t dcn303_destroy_resource_pool +ffffffff82114830 t dcn303_panel_cntl_create +ffffffff821148c0 t dcn303_link_encoder_create +ffffffff82114970 t dcn303_get_panel_config_defaults +ffffffff821149f0 t read_dce_straps +ffffffff82114a20 t dcn303_create_audio +ffffffff82114a50 t dcn303_stream_encoder_create +ffffffff82114bd0 t dcn303_hwseq_create +ffffffff82115000 T afmt31_powerdown +ffffffff82115090 T afmt31_poweron +ffffffff82115120 T afmt31_construct +ffffffff82116000 T apg31_construct +ffffffff82116050 t apg31_se_audio_setup +ffffffff82116160 t apg31_enable +ffffffff82116270 t apg31_disable +ffffffff82117000 T dccg31_update_dpp_dto +ffffffff82117160 T dccg31_set_dpstreamclk +ffffffff821172f0 t dccg31_disable_dpstreamclk +ffffffff82117440 T dccg31_enable_symclk32_se +ffffffff82117740 T dccg31_disable_symclk32_se +ffffffff82117a10 T dccg31_enable_symclk32_le +ffffffff82117b20 T dccg31_disable_symclk32_le +ffffffff82117c10 T dccg31_set_symclk32_le_root_clock_gating +ffffffff82117d20 T dccg31_disable_dscclk +ffffffff82117f70 T dccg31_enable_dscclk +ffffffff821181e0 T dccg31_set_physymclk +ffffffff821186f0 T dccg31_set_dtbclk_dto +ffffffff821189a0 T dccg31_set_audio_dtbclk_dto +ffffffff82118ab0 T dccg31_get_dccg_ref_freq +ffffffff82118ae0 T dccg31_set_dispclk_change_mode +ffffffff82118b30 T dccg31_init +ffffffff82119110 T dccg31_otg_add_pixel +ffffffff82119150 T dccg31_otg_drop_pixel +ffffffff82119190 T dccg31_create +ffffffff8211a000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff8211a390 T dcn31_link_encoder_construct +ffffffff8211a560 T dcn31_link_encoder_construct_minimal +ffffffff8211a5e0 T dcn31_link_encoder_enable_dp_output +ffffffff8211a820 T dcn31_link_encoder_enable_dp_mst_output +ffffffff8211aa60 T dcn31_link_encoder_disable_output +ffffffff8211acd0 T dcn31_link_encoder_is_in_alt_mode +ffffffff8211ae20 T dcn31_link_encoder_get_max_link_cap +ffffffff8211afa0 t enc31_hw_init +ffffffff8211b000 T dcn31_hpo_dp_link_enc_enable +ffffffff8211b160 T dcn31_hpo_dp_link_enc_disable +ffffffff8211b1d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff8211bb30 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff8211bdb0 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff8211c050 T dcn31_hpo_dp_link_enc_read_state +ffffffff8211c2f0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff8211c3f0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff8211c530 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff8211c620 T hpo_dp_link_encoder31_construct +ffffffff8211c680 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff8211d000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff8211d070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff8211d1b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff8211d460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff8211d560 t dcn31_hpo_dp_stream_enc_disable +ffffffff8211d5d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff8211de80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num +ffffffff8211df40 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff8211e160 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff8211e2f0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff8211e590 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff8211e690 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff8211e740 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff8211e810 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff8211e9c0 t dcn31_hpo_dp_stream_enc_read_state +ffffffff8211eb50 t dcn31_set_hblank_min_symbol_width +ffffffff8211f000 T hubbub31_init_dchub_sys_ctx +ffffffff8211f1e0 T hubbub31_init +ffffffff8211f280 T hubbub31_construct +ffffffff8211f320 t hubbub31_get_dcc_compression_cap +ffffffff8211f500 t hubbub31_get_dchub_ref_freq +ffffffff8211f5e0 t hubbub31_program_watermarks +ffffffff82120f00 t hubbub31_verify_allow_pstate_change_high +ffffffff821210c0 t dcn31_program_det_size +ffffffff821212a0 t dcn31_program_compbuf_size +ffffffff82121520 t dcn31_init_crb +ffffffff82122000 T hubp31_set_unbounded_requesting +ffffffff82122090 T hubp31_soft_reset +ffffffff821220e0 T hubp31_construct +ffffffff82122150 t hubp31_program_extended_blank +ffffffff82123000 T dcn31_init_hw +ffffffff82123850 T dcn31_dsc_pg_control +ffffffff82123ba0 T dcn31_enable_power_gating_plane +ffffffff82123e00 T dcn31_update_info_frame +ffffffff82123f30 T dcn31_z10_save_init +ffffffff82123fc0 T dcn31_z10_restore +ffffffff82124070 T dcn31_hubp_pg_control +ffffffff82124390 T dcn31_init_sys_ctx +ffffffff82124440 T dcn31_reset_hw_ctx_wrap +ffffffff82124790 T dcn31_setup_hpo_hw_control +ffffffff82125000 T dcn31_hw_sequencer_construct +ffffffff82126000 T optc31_immediate_disable_crtc +ffffffff82126100 T optc31_set_drr +ffffffff82126310 T optc3_init_odm +ffffffff82126480 T dcn31_timing_generator_init +ffffffff821264f0 t optc31_enable_crtc +ffffffff821265f0 t optc31_disable_crtc +ffffffff821266d0 t optc31_set_odm_combine +ffffffff82127000 T dcn31_panel_cntl_construct +ffffffff82127040 t dcn31_panel_cntl_destroy +ffffffff82127090 t dcn31_panel_cntl_hw_init +ffffffff82127190 t dcn31_is_panel_backlight_on +ffffffff82127230 t dcn31_is_panel_powered_on +ffffffff821272e0 t dcn31_store_backlight_level +ffffffff821273b0 t dcn31_get_16_bit_backlight_from_pwm +ffffffff82128000 T dcn31x_populate_dml_pipes_from_context +ffffffff82128180 T dcn31_populate_dml_pipes_from_context +ffffffff821285c0 T dcn31_calculate_wm_and_dlg +ffffffff82128630 T dcn31_populate_dml_writeback_from_context +ffffffff82128690 T dcn31_set_mcif_arb_params +ffffffff821286f0 T dcn31_validate_bandwidth +ffffffff82128ae0 T dcn31_create_resource_pool +ffffffff82129e80 t dcn31_resource_destruct +ffffffff8212a4f0 t dcn31_destroy_resource_pool +ffffffff8212a550 t dcn31_panel_cntl_create +ffffffff8212a5c0 t dcn31_link_encoder_create +ffffffff8212a670 t dcn31_link_enc_create_minimal +ffffffff8212a710 t dcn31_get_panel_config_defaults +ffffffff8212a750 t read_dce_straps +ffffffff8212a780 t dcn31_create_audio +ffffffff8212a7b0 t dcn31_stream_encoder_create +ffffffff8212a930 t dcn31_hpo_dp_stream_encoder_create +ffffffff8212aaf0 t dcn31_hpo_dp_link_encoder_create +ffffffff8212ab80 t dcn31_hwseq_create +ffffffff8212b000 T vpg31_powerdown +ffffffff8212b090 T vpg31_poweron +ffffffff8212b120 T vpg31_construct +ffffffff8212c000 T dccg314_create +ffffffff8212c0b0 t dccg314_init +ffffffff8212c210 t dccg314_set_dpstreamclk +ffffffff8212c5d0 t dccg314_set_dtbclk_dto +ffffffff8212c7c0 t dccg314_set_pixel_rate_div +ffffffff8212cb30 t dccg314_set_valid_pixel_rate +ffffffff8212cba0 t dccg314_trigger_dio_fifo_resync +ffffffff8212cc40 t dccg314_dpp_root_clock_control +ffffffff8212d000 T dcn314_dio_stream_encoder_construct +ffffffff8212d070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff8212d670 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff8212d880 t enc314_stream_encoder_dp_blank +ffffffff8212d900 t enc314_stream_encoder_dp_unblank +ffffffff8212dc80 t enc314_read_state +ffffffff8212dde0 t enc314_dp_set_dsc_config +ffffffff8212de30 t enc314_dp_set_odm_combine +ffffffff8212de70 t enc314_set_dig_input_mode +ffffffff8212dec0 t enc314_enable_fifo +ffffffff8212df60 t enc314_disable_fifo +ffffffff8212dfb0 t enc314_reset_fifo +ffffffff8212f000 T dcn314_update_odm +ffffffff8212f600 T dcn314_dsc_pg_control +ffffffff8212f9d0 T dcn314_enable_power_gating_plane +ffffffff8212fc60 T dcn314_calculate_dccg_k1_k2_values +ffffffff8212fe10 T dcn314_set_pixels_per_cycle +ffffffff8212ff00 T dcn314_resync_fifo_dccg_dio +ffffffff821300a0 T dcn314_dpp_root_clock_control +ffffffff82130100 T dcn314_disable_link_output +ffffffff82131000 T dcn314_hw_sequencer_construct +ffffffff82132000 T dcn314_timing_generator_init +ffffffff82132070 t optc314_enable_crtc +ffffffff82132170 t optc314_disable_crtc +ffffffff82132250 t optc314_phantom_crtc_post_enable +ffffffff82132310 t optc314_set_odm_bypass +ffffffff82132480 t optc314_set_odm_combine +ffffffff82132770 t optc314_set_h_timing_div_manual_mode +ffffffff82133000 T dcn314_validate_bandwidth +ffffffff82133490 T dcn314_create_resource_pool +ffffffff821347b0 t dcn314_resource_destruct +ffffffff82134e20 t dcn314_get_preferred_eng_id_dpia +ffffffff82134e50 t dcn314_destroy_resource_pool +ffffffff82134eb0 t dcn31_panel_cntl_create +ffffffff82134f20 t dcn31_link_encoder_create +ffffffff82134fd0 t dcn31_link_enc_create_minimal +ffffffff82135070 t dcn314_populate_dml_pipes_from_context +ffffffff82135100 t dcn314_update_bw_bounding_box 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hubp32_phantom_hubp_post_enable +ffffffff82145360 T hubp32_cursor_set_attributes +ffffffff82145620 T hubp32_init +ffffffff82145650 T hubp32_construct +ffffffff82146000 T dcn32_dsc_pg_control +ffffffff82146320 T dcn32_enable_power_gating_plane +ffffffff82146590 T dcn32_hubp_pg_control +ffffffff82146800 T dcn32_apply_idle_power_optimizations +ffffffff82146af0 T dcn32_commit_subvp_config +ffffffff82146ba0 T dcn32_subvp_pipe_control_lock +ffffffff82146d70 T dcn32_subvp_pipe_control_lock_fast +ffffffff82146df0 T dcn32_set_mpc_shaper_3dlut +ffffffff82146f10 T dcn32_set_mcm_luts +ffffffff821470a0 T dcn32_set_input_transfer_func +ffffffff821471e0 T dcn32_set_output_transfer_func +ffffffff82147420 T dcn32_update_force_pstate +ffffffff82147640 T dcn32_update_mall_sel +ffffffff82147830 T dcn32_program_mall_pipe_config +ffffffff82147920 T dcn32_init_hw +ffffffff821481e0 T dcn32_update_odm +ffffffff821487e0 T dcn32_calculate_dccg_k1_k2_values +ffffffff82148a10 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff82148ab0 T dcn32_set_pixels_per_cycle +ffffffff82148bf0 T dcn32_resync_fifo_dccg_dio +ffffffff82148d90 T dcn32_unblank_stream +ffffffff82148fa0 T dcn32_disable_link_output +ffffffff82149310 T dcn32_update_phantom_vp_position +ffffffff82149420 T dcn32_apply_update_flags_for_phantom +ffffffff821494a0 T dcn32_dsc_pg_status +ffffffff82149580 T dcn32_update_dsc_pg +ffffffff82149680 T dcn32_enable_phantom_streams +ffffffff821497c0 T dcn32_init_blank +ffffffff82149a00 T dcn32_blank_phantom +ffffffff82149b80 T dcn32_is_pipe_topology_transition_seamless +ffffffff8214a000 T dcn32_hw_sequencer_init_functions +ffffffff8214b000 T dcn32_mmhubbub_construct +ffffffff8214b050 t mmhubbub32_warmup_mcif +ffffffff8214b260 t mmhubbub32_config_mcif_buf +ffffffff8214b710 t mmhubbub32_config_mcif_arb +ffffffff8214c000 T mpc32_mpc_init +ffffffff8214c1e0 T mpc32_power_on_blnd_lut +ffffffff8214c350 T mpc32_configure_post1dlut +ffffffff8214c450 T mpc32_program_post1dluta_settings +ffffffff8214c660 T mpc32_program_post1dlutb_settings +ffffffff8214c870 T mpc32_program_post1dlut_pwl +ffffffff8214cca0 T mpc32_program_post1dlut +ffffffff8214cfb0 T mpc32_configure_shaper_lut +ffffffff8214d0d0 T mpc32_program_shaper_luta_settings +ffffffff8214df60 T mpc32_program_shaper_lutb_settings +ffffffff8214edf0 T mpc32_program_shaper_lut +ffffffff8214ef90 T mpc32_power_on_shaper_3dlut +ffffffff8214f1c0 T mpc32_program_shaper +ffffffff8214f4e0 T mpc32_select_3dlut_ram +ffffffff8214f590 T mpc32_select_3dlut_ram_mask +ffffffff8214f660 T mpc32_set3dlut_ram12 +ffffffff8214f860 T mpc32_set3dlut_ram10 +ffffffff8214f930 T mpc32_program_3dlut +ffffffff82150300 T dcn32_mpc_construct +ffffffff82151000 T optc32_set_h_timing_div_manual_mode +ffffffff82151040 T dcn32_timing_generator_init +ffffffff821510b0 t optc32_enable_crtc +ffffffff821511b0 t optc32_disable_crtc +ffffffff82151290 t optc32_phantom_crtc_post_enable +ffffffff82151350 t optc32_disable_phantom_otg +ffffffff82151390 t optc32_set_drr +ffffffff82151550 t optc32_set_odm_bypass +ffffffff821516c0 t optc32_set_odm_combine +ffffffff82152000 T dcn32_panel_cntl_create +ffffffff82152070 T dcn32_acquire_post_bldn_3dlut +ffffffff82152160 T dcn32_release_post_bldn_3dlut +ffffffff82152210 T dcn32_retain_phantom_pipes +ffffffff821522f0 T dcn32_remove_phantom_pipes +ffffffff82152460 T dcn32_add_phantom_pipes +ffffffff82152890 T dcn32_validate_bandwidth +ffffffff82152d70 T dcn32_populate_dml_pipes_from_context +ffffffff821531a0 T dcn32_calculate_wm_and_dlg +ffffffff82153210 T dcn32_create_resource_pool +ffffffff821532c0 t dcn32_resource_construct +ffffffff8215e800 T dcn32_acquire_free_pipe_as_secondary_dpp_pipe +ffffffff8215eb00 T dcn32_calc_num_avail_chans_for_mall +ffffffff8215eb70 t dcn32_mpc_create +ffffffff821631d0 t dcn32_dwbc_create +ffffffff82163bd0 t dcn32_mmhubbub_create +ffffffff82164080 t dcn32_resource_destruct +ffffffff82164710 t dcn32_destroy_resource_pool +ffffffff82164770 t dcn32_link_encoder_create +ffffffff82165840 t dcn32_update_bw_bounding_box +ffffffff82165890 t read_dce_straps +ffffffff821658c0 t dcn32_create_audio +ffffffff82165c40 t dcn32_stream_encoder_create +ffffffff82167a80 t dcn32_hpo_dp_stream_encoder_create +ffffffff82168860 t dcn32_hpo_dp_link_encoder_create +ffffffff82168cb0 t dcn32_hwseq_create +ffffffff821691a0 t dcn32_vpg_create +ffffffff8216a000 T dcn32_helper_mall_bytes_to_ways +ffffffff8216a060 T dcn32_helper_calculate_mall_bytes_for_cursor +ffffffff8216a100 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff8216a180 T dcn32_merge_pipes_for_subvp +ffffffff8216a340 T dcn32_all_pipes_have_stream_and_plane +ffffffff8216a3d0 T dcn32_subvp_in_use +ffffffff8216a460 T dcn32_mpo_in_use +ffffffff8216a4d0 T dcn32_any_surfaces_rotated +ffffffff8216a560 T dcn32_is_center_timing +ffffffff8216a5d0 T dcn32_is_psr_capable +ffffffff8216a620 T dcn32_determine_det_override +ffffffff8216a960 T dcn32_set_det_allocations +ffffffff8216aaf0 T dcn32_save_mall_state +ffffffff8216aba0 T dcn32_restore_mall_state +ffffffff8216ac50 T dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8216ae00 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8216aeb0 T dcn32_check_native_scaling_for_res +ffffffff8216af10 T dcn32_subvp_drr_admissable +ffffffff8216b0d0 T dcn32_subvp_vblank_admissable +ffffffff8216c000 T dcn321_link_encoder_construct +ffffffff8216d000 T dcn321_create_resource_pool +ffffffff8216d0b0 t dcn321_resource_construct +ffffffff82178550 t dcn321_mpc_create +ffffffff8217cbb0 t dcn321_dwbc_create +ffffffff8217d5b0 t dcn321_mmhubbub_create +ffffffff8217da60 t dcn321_resource_destruct +ffffffff8217e0f0 t dcn321_destroy_resource_pool +ffffffff8217e150 t dcn321_link_encoder_create +ffffffff8217f220 t dcn321_update_bw_bounding_box +ffffffff8217f270 t read_dce_straps +ffffffff8217f2a0 t dcn321_create_audio +ffffffff8217f620 t dcn321_stream_encoder_create +ffffffff82181460 t dcn321_hpo_dp_stream_encoder_create +ffffffff82182240 t dcn321_hpo_dp_link_encoder_create +ffffffff82182690 t dcn321_hwseq_create +ffffffff82182b80 t dcn321_vpg_create +ffffffff82183000 T bw_int_to_fixed_nonconst +ffffffff82183090 T bw_frc_to_fixed +ffffffff82183260 T bw_floor2 +ffffffff82183310 T bw_ceil2 +ffffffff82183390 T bw_mul +ffffffff82184000 T convert_to_custom_float_format +ffffffff82185000 T bw_calcs_init +ffffffff82185e60 T bw_calcs +ffffffff82187800 t calculate_bandwidth +ffffffff8218f000 T scaler_settings_calculation +ffffffff8218f350 T mode_support_and_system_configuration +ffffffff82195180 T display_pipe_configuration +ffffffff82195ab0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff8219b000 T dcn_bw_mod +ffffffff8219b060 T dcn_bw_min2 +ffffffff8219b0a0 T dcn_bw_max +ffffffff8219b0d0 T dcn_bw_max2 +ffffffff8219b110 T dcn_bw_floor2 +ffffffff8219b1b0 T dcn_bw_floor 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calculate_ttu_cursor +ffffffff821e4000 T optc3_fpu_set_vrr_m_const +ffffffff821e44a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff821e47b0 T dcn30_fpu_set_mcif_arb_params +ffffffff821e4920 T dcn30_fpu_update_soc_for_wm_a +ffffffff821e49f0 T dcn30_fpu_calculate_wm_and_dlg +ffffffff821e5480 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821e5670 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff821e56d0 T dcn30_fpu_update_max_clk +ffffffff821e5780 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff821e5880 T dcn30_fpu_update_bw_bounding_box +ffffffff821e5a60 T dcn3_fpu_build_wm_range_table +ffffffff821e5d40 T patch_dcn30_soc_bounding_box +ffffffff821e6000 T dml30_recalculate +ffffffff821e65f0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821ed0b0 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff821ed320 T dml30_CalculateWriteBackDISPCLK +ffffffff821ed490 t dml_max3 +ffffffff821ed4f0 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff821f5040 t CalculateSwathAndDETConfiguration +ffffffff821f5740 t TruncToValidBPP +ffffffff821f59a0 t CalculateVMAndRowBytes +ffffffff821f6010 t CalculatePrefetchSourceLines +ffffffff821f61e0 t CalculateUrgentBurstFactor +ffffffff821f6470 t CalculateDCFCLKDeepSleep +ffffffff821f6790 t UseMinimumDCFCLK +ffffffff821f7ab0 t CalculatePrefetchSchedule +ffffffff821f8f50 t CalculateFlipSchedule +ffffffff821f9450 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821fa190 t CalculateSwathWidth +ffffffff821fb000 T dml30_rq_dlg_get_rq_reg +ffffffff821fb4b0 t dml_rq_dlg_get_rq_params +ffffffff821fb740 T dml30_rq_dlg_get_dlg_reg +ffffffff821fde10 t get_surf_rq_param +ffffffff821fe7a0 t calculate_ttu_cursor +ffffffff821ff000 T dcn301_update_bw_bounding_box +ffffffff821ff2e0 T dcn301_fpu_set_wm_ranges +ffffffff821ff380 T dcn301_fpu_init_soc_bounding_box +ffffffff821ff420 T dcn301_calculate_wm_and_dlg_fp +ffffffff821ff750 t calculate_wm_set_for_vlevel +ffffffff82200000 T dcn302_fpu_update_bw_bounding_box +ffffffff82200940 T dcn302_fpu_init_soc_bounding_box +ffffffff82201000 T dcn303_fpu_update_bw_bounding_box +ffffffff822019a0 T dcn303_fpu_init_soc_bounding_box +ffffffff82202000 T dcn31_zero_pipe_dcc_fraction +ffffffff82202060 T dcn31_update_soc_for_wm_a +ffffffff82202110 T dcn315_update_soc_for_wm_a +ffffffff822021e0 T dcn31_calculate_wm_and_dlg_fp +ffffffff82202840 T dcn31_update_bw_bounding_box +ffffffff82202be0 T dcn315_update_bw_bounding_box +ffffffff82202ed0 T dcn316_update_bw_bounding_box +ffffffff82203280 T dcn_get_max_non_odm_pix_rate_100hz +ffffffff822032e0 T dcn_get_approx_det_segs_required_for_pstate +ffffffff82204000 T dml31_recalculate +ffffffff822042d0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8220b190 T dml31_CalculateWriteBackDISPCLK +ffffffff8220b300 t dml_max3 +ffffffff8220b360 T dml31_ModeSupportAndSystemConfigurationFull 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dcn32_set_clock_limits +ffffffff8223f480 T dcn32_override_min_req_memclk +ffffffff8223f540 t subvp_drr_schedulable +ffffffff8223f7d0 t get_optimal_ntuple +ffffffff82240000 T dml32_recalculate +ffffffff82244320 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff8224c000 T dml32_dscceComputeDelay +ffffffff8224c140 T dml32_dscComputeDelay +ffffffff8224c180 T IsVertical +ffffffff8224c1b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff8224c4d0 t dml_max3 +ffffffff8224c530 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff8224c860 T dml32_CalculateSwathAndDETConfiguration +ffffffff8224d090 T dml32_CalculateSwathWidth +ffffffff8224d950 T dml32_UnboundedRequest +ffffffff8224d9c0 T dml32_CalculateDETBufferSize +ffffffff8224e000 T dml32_CalculateODMMode +ffffffff8224e780 T dml32_CalculateRequiredDispclk +ffffffff8224e940 T dml32_RoundToDFSGranularity +ffffffff8224e9d0 T dml32_CalculateOutputLink +ffffffff8224f440 T dml32_TruncToValidBPP +ffffffff8224f770 T dml32_CalculateDPPCLK +ffffffff8224f910 T dml32_RequiredDTBCLK +ffffffff8224fb60 t dml_max4 +ffffffff8224fbe0 T dml32_DSCDelayRequirement +ffffffff822500a0 T dml32_CalculateSurfaceSizeInMall +ffffffff82250bf0 T dml32_CalculateVMRowAndSwath +ffffffff82251a00 T dml32_CalculateVMAndRowBytes +ffffffff82252650 T dml32_CalculatePrefetchSourceLines +ffffffff822528a0 T dml32_CalculateMALLUseForStaticScreen +ffffffff822529e0 T dml32_CalculateRowBandwidth +ffffffff82252b40 T dml32_CalculateUrgentLatency +ffffffff82252bf0 T dml32_CalculateUrgentBurstFactor +ffffffff82252ea0 T dml32_CalculateDCFCLKDeepSleep +ffffffff822531f0 T dml32_CalculateWriteBackDelay +ffffffff82253350 T dml32_UseMinimumDCFCLK +ffffffff822543c0 T dml32_CalculateExtraLatencyBytes +ffffffff82254580 T dml32_CalculateTWait +ffffffff82254670 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff822548d0 T dml32_get_return_bw_mbps +ffffffff82254a90 T dml32_get_return_bw_mbps_vm_only +ffffffff82254b70 T dml32_CalculateExtraLatency +ffffffff82254d90 T dml32_CalculatePrefetchSchedule +ffffffff822563a0 T dml32_CalculateFlipSchedule +ffffffff82256900 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff82257a10 T dml32_CalculateWriteBackDISPCLK +ffffffff82257be0 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff82257c30 T dml32_CalculatePixelDeliveryTimes +ffffffff822580b0 T dml32_CalculateMetaAndPTETimes +ffffffff82258810 T dml32_CalculateVMGroupAndRequestTimes +ffffffff82258d50 T dml32_CalculateDCCConfiguration +ffffffff82259360 T dml32_CalculateStutterEfficiency +ffffffff8225a280 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff8225a370 T dml32_CalculateVActiveBandwithSupport +ffffffff8225a4e0 T dml32_CalculatePrefetchBandwithSupport +ffffffff8225a800 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff8225a950 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff8225abd0 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff8225b000 T dml32_rq_dlg_get_rq_reg +ffffffff8225b6a0 T dml32_rq_dlg_get_dlg_reg +ffffffff8225e000 T dcn321_update_bw_bounding_box_fpu +ffffffff82260760 t get_optimal_ntuple +ffffffff82261000 T dml_init_instance +ffffffff82261310 T dml_get_status_message +ffffffff82261350 T dml_log_pipe_params +ffffffff82261380 T dml_log_mode_support_params +ffffffff82262000 T dml_get_voltage_level +ffffffff82262240 t fetch_socbb_params +ffffffff82262730 t fetch_ip_params +ffffffff82262bd0 t fetch_pipe_params +ffffffff82263c50 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff82263cd0 T get_clk_dcf_deepsleep +ffffffff82263de0 T get_wm_urgent +ffffffff82263ef0 T get_wm_memory_trip +ffffffff82264000 T get_wm_writeback_urgent +ffffffff82264110 T get_wm_stutter_exit +ffffffff82264220 T get_wm_stutter_enter_exit +ffffffff82264330 T get_wm_z8_stutter_exit +ffffffff82264440 T get_wm_z8_stutter_enter_exit +ffffffff82264550 T get_stutter_efficiency_z8 +ffffffff82264660 T get_stutter_num_bursts_z8 +ffffffff82264770 T get_wm_dram_clock_change +ffffffff82264880 T get_wm_writeback_dram_clock_change +ffffffff82264990 T get_stutter_efficiency +ffffffff82264aa0 T get_stutter_efficiency_no_vblank +ffffffff82264bb0 T get_stutter_period +ffffffff82264cc0 T get_urgent_latency +ffffffff82264dd0 T get_urgent_extra_latency +ffffffff82264ee0 T get_nonurgent_latency +ffffffff82264ff0 T get_dram_clock_change_latency +ffffffff82265100 T get_dispclk_calculated +ffffffff82265210 T get_total_data_read_bw +ffffffff82265320 T get_return_bw +ffffffff82265430 T get_tcalc +ffffffff82265540 T get_fraction_of_urgent_bandwidth +ffffffff82265650 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff82265760 T get_cstate_max_cap_mode +ffffffff82265880 T get_comp_buffer_size_kbytes +ffffffff82265990 T get_pixel_chunk_size_in_kbyte +ffffffff82265ab0 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff82265bd0 T get_meta_chunk_size_in_kbyte +ffffffff82265cf0 T get_min_pixel_chunk_size_in_byte +ffffffff82265e00 T get_min_meta_chunk_size_in_byte +ffffffff82265f20 T get_fclk_watermark +ffffffff82266030 T get_usr_retraining_watermark +ffffffff82266140 T get_comp_buffer_reserved_space_kbytes +ffffffff82266260 T get_comp_buffer_reserved_space_64bytes +ffffffff82266380 T get_comp_buffer_reserved_space_zs +ffffffff822664a0 T get_unbounded_request_enabled +ffffffff822665c0 T get_dsc_delay +ffffffff822666f0 T get_dppclk_calculated +ffffffff82266810 T get_dscclk_calculated +ffffffff82266930 T get_min_ttu_vblank +ffffffff82266a50 T get_min_ttu_vblank_in_us +ffffffff82266b70 T get_vratio_prefetch_l +ffffffff82266c90 T get_vratio_prefetch_c +ffffffff82266db0 T get_dst_x_after_scaler +ffffffff82266ed0 T get_dst_y_after_scaler +ffffffff82266ff0 T get_dst_y_per_vm_vblank +ffffffff82267110 T get_dst_y_per_row_vblank +ffffffff82267230 T get_dst_y_prefetch +ffffffff82267350 T get_dst_y_per_vm_flip +ffffffff82267470 T get_dst_y_per_row_flip +ffffffff82267590 T get_refcyc_per_vm_group_vblank +ffffffff822676b0 T get_refcyc_per_vm_group_flip +ffffffff822677d0 T get_refcyc_per_vm_req_vblank +ffffffff822678f0 T get_refcyc_per_vm_req_flip +ffffffff82267a10 T get_refcyc_per_vm_group_vblank_in_us +ffffffff82267b30 T get_refcyc_per_vm_group_flip_in_us +ffffffff82267c50 T get_refcyc_per_vm_req_vblank_in_us +ffffffff82267d70 T get_refcyc_per_vm_req_flip_in_us +ffffffff82267e90 T get_refcyc_per_vm_dmdata_in_us +ffffffff82267fb0 T get_dmdata_dl_delta_in_us +ffffffff822680d0 T get_refcyc_per_line_delivery_l_in_us +ffffffff822681f0 T get_refcyc_per_line_delivery_c_in_us +ffffffff82268310 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff82268430 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff82268550 T get_refcyc_per_req_delivery_l_in_us +ffffffff82268670 T get_refcyc_per_req_delivery_c_in_us +ffffffff82268790 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff822688b0 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff822689d0 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff82268af0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff82268c10 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff82268d30 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff82268e50 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff82268f70 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff82269090 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff822691b0 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff822692d0 T get_vstartup +ffffffff82269400 T get_vupdate_offset +ffffffff82269530 T get_vupdate_width +ffffffff82269650 T get_vready_offset +ffffffff82269770 T get_vready_at_or_after_vsync +ffffffff822698a0 T get_min_dst_y_next_start +ffffffff822699d0 T get_dst_y_per_pte_row_nom_l +ffffffff82269af0 T get_dst_y_per_pte_row_nom_c +ffffffff82269c10 T get_dst_y_per_meta_row_nom_l +ffffffff82269d30 T get_dst_y_per_meta_row_nom_c +ffffffff82269e50 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff82269f70 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff8226a090 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff8226a1b0 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff8226a2d0 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff8226a3f0 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff8226a510 T get_vstartup_calculated +ffffffff8226a640 T get_dpte_row_height_linear_c +ffffffff8226a770 T get_swath_height_l +ffffffff8226a8a0 T get_swath_height_c +ffffffff8226a9d0 T get_det_stored_buffer_size_l_bytes +ffffffff8226ab00 T get_det_stored_buffer_size_c_bytes +ffffffff8226ac30 T get_dpte_group_size_in_bytes +ffffffff8226ad60 T get_vm_group_size_in_bytes +ffffffff8226ae90 T get_dpte_row_height_linear_l +ffffffff8226afc0 T get_pte_buffer_mode +ffffffff8226b0f0 T get_subviewport_lines_needed_in_mall +ffffffff8226b220 T get_surface_size_in_mall +ffffffff8226b350 T get_total_immediate_flip_bytes +ffffffff8226b470 T get_total_immediate_flip_bw +ffffffff8226b650 T get_total_prefetch_bw +ffffffff8226b830 T get_total_surface_size_in_mall_bytes +ffffffff8226b9d0 T get_det_buffer_size_kbytes +ffffffff8226bb00 T get_is_phantom_pipe +ffffffff8226bc30 T Calculate256BBlockSizes +ffffffff8226bd20 T CalculateMinAndMaxPrefetchMode +ffffffff8226bda0 T ModeSupportAndSystemConfiguration +ffffffff8226c0b0 T CalculateWriteBackDISPCLK +ffffffff8226d000 T print__rq_params_st +ffffffff8226d030 T print__data_rq_sizing_params_st +ffffffff8226d060 T print__data_rq_dlg_params_st +ffffffff8226d090 T print__data_rq_misc_params_st +ffffffff8226d0c0 T print__rq_dlg_params_st +ffffffff8226d0f0 T print__dlg_sys_params_st +ffffffff8226d120 T print__data_rq_regs_st +ffffffff8226d150 T print__rq_regs_st +ffffffff8226d180 T print__dlg_regs_st +ffffffff8226d1b0 T print__ttu_regs_st +ffffffff8226e000 T dml1_extract_rq_regs +ffffffff8226e330 T dml1_rq_dlg_get_rq_params +ffffffff8226e510 t get_surf_rq_param +ffffffff8226f0c0 T dml1_rq_dlg_get_dlg_params +ffffffff82272000 T _do_calc_rc_params +ffffffff82272fc0 t get_qp_set +ffffffff82274000 T dc_bandwidth_in_kbps_from_timing +ffffffff82274290 T dc_dsc_stream_bandwidth_in_kbps +ffffffff822743e0 T dc_dsc_parse_dsc_dpcd +ffffffff82274680 t dsc_throughput_from_dpcd +ffffffff82274840 T dc_dsc_compute_bandwidth_range +ffffffff82274a30 t intersect_dsc_caps +ffffffff82274c00 t setup_dsc_config +ffffffff822753d0 T dc_dsc_compute_config +ffffffff822754c0 T dc_dsc_stream_bandwidth_overhead_in_kbps +ffffffff82275600 T dc_dsc_get_policy_for_timing +ffffffff822756a0 T dc_dsc_policy_set_max_target_bpp_limit +ffffffff822756d0 T dc_dsc_policy_set_enable_dsc_when_not_needed +ffffffff82275700 T dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff82275730 T dc_set_disable_128b_132b_stream_overhead +ffffffff82275760 T dc_dsc_get_default_config_option +ffffffff822757b0 t fit_num_slices_up +ffffffff82275860 t decide_dsc_target_bpp_x16 +ffffffff82276000 T calc_rc_params +ffffffff82277000 T dscc_compute_dsc_parameters +ffffffff82278000 T dal_hw_factory_dce110_init +ffffffff82278060 t define_hpd_registers +ffffffff822780b0 t define_ddc_registers +ffffffff82279000 T dal_hw_translate_dce110_init +ffffffff82279030 t offset_to_id +ffffffff82279390 t id_to_offset +ffffffff8227a000 T dal_hw_factory_dce120_init +ffffffff8227a060 t define_hpd_registers +ffffffff8227a0b0 t define_ddc_registers +ffffffff8227b000 T dal_hw_translate_dce120_init +ffffffff8227b030 t offset_to_id +ffffffff8227b3a0 t id_to_offset +ffffffff8227c000 T dal_hw_factory_dce80_init +ffffffff8227c060 t define_hpd_registers +ffffffff8227c0b0 t define_ddc_registers +ffffffff8227d000 T dal_hw_translate_dce80_init +ffffffff8227d030 t offset_to_id +ffffffff8227d7b0 t id_to_offset +ffffffff8227e000 T dal_hw_factory_dcn10_init +ffffffff8227e060 t define_hpd_registers +ffffffff8227e0b0 t define_ddc_registers +ffffffff8227e150 t define_generic_registers +ffffffff8227f000 T dal_hw_translate_dcn10_init +ffffffff8227f030 t offset_to_id +ffffffff8227f390 t id_to_offset +ffffffff82280000 T dal_hw_factory_dcn20_init +ffffffff82280060 t define_hpd_registers +ffffffff822800b0 t define_ddc_registers +ffffffff82280160 t define_generic_registers +ffffffff82281000 T dal_hw_translate_dcn20_init +ffffffff82281030 t offset_to_id +ffffffff822812b0 t id_to_offset +ffffffff82282000 T dal_hw_factory_dcn21_init +ffffffff82282060 t define_hpd_registers +ffffffff822820b0 t define_ddc_registers +ffffffff82282160 t define_generic_registers +ffffffff82283000 T dal_hw_translate_dcn21_init +ffffffff82283030 t offset_to_id +ffffffff822832b0 t id_to_offset +ffffffff82284000 T dal_hw_factory_dcn30_init +ffffffff82284060 t define_hpd_registers +ffffffff822840b0 t define_ddc_registers +ffffffff82284160 t define_generic_registers +ffffffff82285000 T dal_hw_translate_dcn30_init +ffffffff82285030 t offset_to_id +ffffffff822852c0 t id_to_offset +ffffffff82286000 T dal_hw_factory_dcn315_init +ffffffff82286060 t define_hpd_registers +ffffffff822860b0 t define_ddc_registers +ffffffff82286160 t define_generic_registers +ffffffff82287000 T dal_hw_translate_dcn315_init +ffffffff82287030 t offset_to_id +ffffffff822872b0 t id_to_offset +ffffffff82288000 T dal_hw_factory_dcn32_init +ffffffff82288060 t define_hpd_registers +ffffffff822880b0 t define_ddc_registers +ffffffff82288160 t define_generic_registers +ffffffff82289000 T dal_hw_translate_dcn32_init +ffffffff82289030 t offset_to_id +ffffffff82289290 t id_to_offset +ffffffff8228a000 T dal_gpio_open +ffffffff8228a0c0 T dal_gpio_open_ex +ffffffff8228a180 T dal_gpio_get_value +ffffffff8228a200 T dal_gpio_set_value +ffffffff8228a280 T dal_gpio_get_mode +ffffffff8228a2b0 T dal_gpio_lock_pin +ffffffff8228a2d0 T dal_gpio_unlock_pin +ffffffff8228a2f0 T dal_gpio_change_mode +ffffffff8228a370 T dal_gpio_get_id +ffffffff8228a3a0 T dal_gpio_get_enum +ffffffff8228a3d0 T dal_gpio_set_config +ffffffff8228a450 T dal_gpio_get_pin_info +ffffffff8228a4b0 T dal_gpio_get_sync_source +ffffffff8228a540 T dal_gpio_get_output_state +ffffffff8228a570 T dal_gpio_get_ddc +ffffffff8228a5a0 T dal_gpio_get_hpd +ffffffff8228a5d0 T dal_gpio_get_generic +ffffffff8228a600 T dal_gpio_close +ffffffff8228a650 T dal_gpio_create +ffffffff8228a7e0 T dal_gpio_destroy +ffffffff8228b000 T dal_gpio_service_create +ffffffff8228b240 T dal_gpio_service_create_irq +ffffffff8228b300 T dal_gpio_create_irq +ffffffff8228b380 T dal_gpio_service_create_generic_mux +ffffffff8228b420 T dal_gpio_destroy_generic_mux +ffffffff8228b4b0 T dal_gpio_get_generic_pin_info +ffffffff8228b510 T dal_gpio_service_destroy +ffffffff8228b640 T dal_mux_setup_config +ffffffff8228b6a0 T dal_gpio_service_lock +ffffffff8228b720 T dal_gpio_service_unlock +ffffffff8228b7a0 T dal_gpio_service_open +ffffffff8228b9e0 T dal_gpio_service_close +ffffffff8228ba80 T dal_irq_get_source +ffffffff8228baf0 T dal_irq_get_rx_source +ffffffff8228bb40 T dal_irq_setup_hpd_filter +ffffffff8228bba0 T dal_gpio_destroy_irq +ffffffff8228bc30 T dal_gpio_create_ddc +ffffffff8228bda0 T dal_gpio_destroy_ddc +ffffffff8228be70 T dal_ddc_close +ffffffff8228bec0 T dal_ddc_open +ffffffff8228c020 T dal_ddc_change_mode +ffffffff8228c0c0 T dal_ddc_get_line +ffffffff8228c0e0 T dal_ddc_set_config +ffffffff8228d000 T dal_hw_ddc_init +ffffffff8228d100 T dal_hw_ddc_get_pin +ffffffff8228d110 t dal_hw_ddc_destroy +ffffffff8228d170 t set_config +ffffffff8228e000 T dal_hw_factory_init +ffffffff8228f000 T dal_hw_generic_init +ffffffff8228f100 T dal_hw_generic_get_pin +ffffffff8228f110 t dal_hw_generic_destroy +ffffffff8228f170 t set_config +ffffffff82290000 T dal_hw_gpio_open +ffffffff822900b0 T dal_hw_gpio_config_mode +ffffffff822901a0 T dal_hw_gpio_get_value +ffffffff82290200 T dal_hw_gpio_set_value +ffffffff82290290 T dal_hw_gpio_change_mode +ffffffff822902a0 T dal_hw_gpio_close +ffffffff82290350 T dal_hw_gpio_construct +ffffffff822903b0 T dal_hw_gpio_destruct +ffffffff82291000 T dal_hw_hpd_init +ffffffff82291100 T dal_hw_hpd_get_pin +ffffffff82291110 t dal_hw_hpd_destroy +ffffffff82291170 t get_value +ffffffff82291210 t set_config +ffffffff82292000 T dal_hw_translate_init +ffffffff82293000 T dc_process_hdcp_msg +ffffffff82293180 t hdmi_14_process_transaction +ffffffff822932d0 t dp_11_process_transaction +ffffffff82294000 T dal_irq_service_dummy_set +ffffffff82294050 T dal_irq_service_dummy_ack +ffffffff822940a0 T dce110_vblank_set +ffffffff82294170 T to_dal_irq_source_dce110 +ffffffff822942f0 T dal_irq_service_dce110_create +ffffffff82294370 t hpd_ack +ffffffff82295000 T dal_irq_service_dce120_create +ffffffff82295080 t hpd_ack +ffffffff82296000 T dal_irq_service_dce80_create ffffffff82296080 t hpd_ack -ffffffff82297000 T dal_irq_service_dce80_create +ffffffff82297000 T dal_irq_service_dcn10_create ffffffff82297080 t hpd_ack -ffffffff82298000 T dal_irq_service_dcn10_create +ffffffff82297130 t to_dal_irq_source_dcn10 +ffffffff82298000 T dal_irq_service_dcn20_create ffffffff82298080 t hpd_ack -ffffffff82298130 t to_dal_irq_source_dcn10 -ffffffff82299000 T dal_irq_service_dcn20_create +ffffffff82298130 t to_dal_irq_source_dcn20 +ffffffff82299000 T dal_irq_service_dcn201_create ffffffff82299080 t hpd_ack -ffffffff82299130 t to_dal_irq_source_dcn20 -ffffffff8229a000 T dal_irq_service_dcn201_create +ffffffff82299130 t to_dal_irq_source_dcn201 +ffffffff8229a000 T dal_irq_service_dcn21_create ffffffff8229a080 t hpd_ack -ffffffff8229a130 t to_dal_irq_source_dcn201 -ffffffff8229b000 T dal_irq_service_dcn21_create +ffffffff8229a130 t to_dal_irq_source_dcn21 +ffffffff8229b000 T dal_irq_service_dcn30_create ffffffff8229b080 t hpd_ack -ffffffff8229b130 t to_dal_irq_source_dcn21 -ffffffff8229c000 T dal_irq_service_dcn30_create +ffffffff8229b130 t to_dal_irq_source_dcn30 +ffffffff8229c000 T dal_irq_service_dcn302_create ffffffff8229c080 t hpd_ack -ffffffff8229c130 t to_dal_irq_source_dcn30 -ffffffff8229d000 T dal_irq_service_dcn302_create +ffffffff8229c130 t to_dal_irq_source_dcn302 +ffffffff8229d000 T dal_irq_service_dcn303_create ffffffff8229d080 t hpd_ack -ffffffff8229d130 t to_dal_irq_source_dcn302 -ffffffff8229e000 T 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-ffffffff825da1a0 T svm_setmsrbw -ffffffff825da280 T vmx_setmsrbr -ffffffff825da330 T vmx_setmsrbw -ffffffff825da3e0 T vmx_setmsrbrw -ffffffff825da4f0 T svm_set_clean -ffffffff825da540 T svm_set_dirty -ffffffff825da590 T vcpu_reset_regs_vmx -ffffffff825dafd0 T vcpu_vmx_check_cap -ffffffff825db0d0 T vcpu_vmx_compute_ctrl -ffffffff825db2b0 T vcpu_init_vmx -ffffffff825db650 T vcpu_deinit_vmx -ffffffff825db7d0 T vcpu_reset_regs -ffffffff825db810 T vcpu_init_svm -ffffffff825db9a0 T vcpu_deinit_svm -ffffffff825dbae0 T vcpu_init -ffffffff825dbba0 T vmm_free_vpid -ffffffff825dbc10 T vcpu_deinit -ffffffff825dbc50 T vm_run -ffffffff825dbe10 T vcpu_run_vmx -ffffffff825dc600 T vcpu_run_svm -ffffffff825dcbf0 T vmm_fpurestore -ffffffff825dccb0 T vmm_fpusave -ffffffff825dcd30 T vmm_translate_gva -ffffffff825dd040 T vmm_update_pvclock -ffffffff825dd140 T vmx_get_exit_info -ffffffff825dd1a0 T vmx_handle_exit -ffffffff825dd5d0 T vmx_instruction_error_decode -ffffffff825dd7a0 T vmm_get_guest_cpu_cpl -ffffffff825dd890 T vmx_handle_intr -ffffffff825dd920 T svm_handle_hlt -ffffffff825dd970 T vmx_handle_hlt -ffffffff825dda20 T svm_handle_exit -ffffffff825ddd40 T svm_handle_np_fault -ffffffff825ddee0 T vmm_handle_cpuid -ffffffff825de580 T svm_handle_msr -ffffffff825de850 T svm_handle_xsetbv -ffffffff825de8f0 T svm_handle_inout -ffffffff825de9f0 T vmm_inject_ud -ffffffff825dea20 T vmm_inject_db -ffffffff825dea50 T vmx_handle_np_fault -ffffffff825debb0 T vmx_handle_inout -ffffffff825ded30 T vmx_handle_cr -ffffffff825def30 T vmx_handle_rdmsr -ffffffff825df000 T vmx_handle_wrmsr -ffffffff825df270 T vmx_handle_xsetbv -ffffffff825df340 T vmm_inject_gp -ffffffff825df370 T vmx_get_exit_qualification -ffffffff825df3d0 T vmx_get_guest_faulttype -ffffffff825df470 T svm_get_guest_faulttype -ffffffff825df4a0 T svm_fault_page -ffffffff825df530 T vmx_fault_page -ffffffff825df680 T vmm_get_guest_cpu_mode -ffffffff825df780 T vmx_load_pdptes -ffffffff825dfa00 T vmx_handle_cr0_write -ffffffff825dfc10 T vmx_handle_cr4_write -ffffffff825dfcb0 T vmm_handle_xsetbv -ffffffff825dfd40 T vmx_handle_misc_enable_msr -ffffffff825dfda0 T vmm_pat_is_valid -ffffffff825dfe80 T vmm_gpa_is_valid -ffffffff825dfef0 T vmx_exit_reason_decode -ffffffff825dff30 T svm_exit_reason_decode -ffffffff825e0d40 T vcpu_state_decode -ffffffff825e1000 T vmm_dispatch_intr -ffffffff825e1020 T vmxon -ffffffff825e1050 T vmxoff -ffffffff825e1080 T vmclear -ffffffff825e10b0 T vmptrld -ffffffff825e10e0 T vmptrst -ffffffff825e1110 T vmwrite -ffffffff825e1140 T vmread -ffffffff825e1170 T invvpid -ffffffff825e118b t invvpid_fail -ffffffff825e1192 t invvpid_ret -ffffffff825e11b0 T invept -ffffffff825e11cb t invept_fail -ffffffff825e11d2 t invept_ret -ffffffff825e11f0 T vmx_enter_guest -ffffffff825e121b t skip_init -ffffffff825e12e8 t no_l1df_msr -ffffffff825e12eb t l1df_tlb_loop -ffffffff825e1304 t l1df_tlb_done -ffffffff825e130c t l1df_load_cache -ffffffff825e1323 t done_flush -ffffffff825e13b6 t do_resume -ffffffff825e143b t fail_launch_or_resume -ffffffff825e147d t fail_launch_unknown -ffffffff825e148a t fail_launch_invalid_vmcs -ffffffff825e1497 t fail_launch_valid_vmcs -ffffffff825e14b4 t vmx_exit_handler_asm -ffffffff825e1579 t restore_host -ffffffff825e1610 T svm_enter_guest -ffffffff825e17a0 t restore_host_svm -ffffffff825e2000 T sdmmc_match -ffffffff825e2050 T sdmmc_attach -ffffffff825e2390 T sdmmc_detach -ffffffff825e2440 T sdmmc_activate -ffffffff825e2510 T sdmmc_discover_task -ffffffff825e25d0 T sdmmc_create_thread -ffffffff825e2640 T sdmmc_holds_root_device -ffffffff825e26a0 T sdmmc_task_thread -ffffffff825e2890 T sdmmc_needs_discover -ffffffff825e2940 T sdmmc_del_task -ffffffff825e29f0 T sdmmc_card_detach -ffffffff825e2ad0 T sdmmc_add_task -ffffffff825e2b50 T sdmmc_card_attach -ffffffff825e2c60 T sdmmc_enable -ffffffff825e2db0 T sdmmc_scan -ffffffff825e2e40 T sdmmc_init -ffffffff825e2f40 T sdmmc_disable -ffffffff825e30a0 T sdmmc_function_free -ffffffff825e30c0 T sdmmc_delay -ffffffff825e3110 T sdmmc_select_card -ffffffff825e3330 T sdmmc_set_bus_power -ffffffff825e34e0 T sdmmc_function_alloc -ffffffff825e3570 T sdmmc_app_command -ffffffff825e3700 T sdmmc_mmc_command -ffffffff825e3780 T sdmmc_go_idle_state -ffffffff825e3890 T sdmmc_send_if_cond -ffffffff825e39e0 T sdmmc_set_relative_addr -ffffffff825e4000 T sdmmc_cisptr -ffffffff825e40a0 T sdmmc_read_cis -ffffffff825e43e0 T sdmmc_print_cis -ffffffff825e4550 T sdmmc_check_cis_quirks -ffffffff825e5000 T sdmmc_io_enable -ffffffff825e52a0 T sdmmc_io_reset -ffffffff825e53d0 T sdmmc_io_send_op_cond -ffffffff825e5540 T sdmmc_io_scan -ffffffff825e5690 T sdmmc_io_init -ffffffff825e57c0 T sdmmc_io_set_highspeed -ffffffff825e5a60 T sdmmc_io_set_bus_width -ffffffff825e5cf0 T sdmmc_io_function_ready -ffffffff825e5e70 T sdmmc_io_read_1 -ffffffff825e5fc0 T sdmmc_io_function_enable -ffffffff825e6390 T sdmmc_io_write_1 -ffffffff825e6510 T sdmmc_io_function_disable -ffffffff825e6790 T sdmmc_io_attach -ffffffff825e6880 T sdmmc_print -ffffffff825e6ad0 T sdmmc_submatch -ffffffff825e6b50 T sdmmc_io_detach -ffffffff825e6c00 T sdmmc_io_rw_direct -ffffffff825e6da0 T sdmmc_io_rw_extended_subr -ffffffff825e6f40 T sdmmc_io_rw_extended -ffffffff825e7340 T sdmmc_io_read_2 -ffffffff825e74a0 T sdmmc_io_write_2 -ffffffff825e7600 T sdmmc_io_read_4 -ffffffff825e7760 T sdmmc_io_write_4 -ffffffff825e78c0 T sdmmc_io_read_multi_1 -ffffffff825e79b0 T sdmmc_io_write_multi_1 -ffffffff825e7aa0 T sdmmc_io_read_region_1 -ffffffff825e7b90 T sdmmc_io_write_region_1 -ffffffff825e7c80 T sdmmc_io_xchg -ffffffff825e7e10 T sdmmc_intr_enable -ffffffff825e8080 T sdmmc_intr_disable -ffffffff825e82f0 T sdmmc_intr_establish -ffffffff825e83f0 T sdmmc_intr_disestablish -ffffffff825e84e0 T sdmmc_card_intr -ffffffff825e8530 T sdmmc_intr_task -ffffffff825e85c0 T sdmmc_io_set_blocklen -ffffffff825e9000 T sdmmc_mem_enable -ffffffff825e9450 T sdmmc_mem_send_op_cond -ffffffff825e9600 T sdmmc_mem_signal_voltage -ffffffff825e96c0 T sdmmc_mem_scan -ffffffff825e99d0 T sdmmc_decode_csd -ffffffff825e9e00 T sdmmc_decode_cid -ffffffff825ea2a0 T sdmmc_mem_send_scr -ffffffff825ea3e0 T sdmmc_mem_decode_scr -ffffffff825ea440 T sdmmc_mem_send_cxd_data -ffffffff825ea5b0 T sdmmc_mem_set_bus_width -ffffffff825ea6c0 T sdmmc_mem_sd_switch -ffffffff825ea970 T sdmmc_be512_to_bitfield512 -ffffffff825eaa20 T sdmmc_mem_mmc_switch -ffffffff825eab10 T sdmmc_mem_init -ffffffff825eac60 T sdmmc_mem_set_blocklen -ffffffff825ead60 T sdmmc_mem_sd_init -ffffffff825eb140 T sdmmc_mem_mmc_init -ffffffff825eb800 T sdmmc_mem_select_transfer_mode -ffffffff825eb880 T sdmmc_mem_execute_tuning -ffffffff825eb910 T sdmmc_mem_read_block_subr -ffffffff825ebc70 T sdmmc_mem_single_read_block -ffffffff825ebd40 T sdmmc_mem_read_block -ffffffff825ebef0 T sdmmc_mem_write_block_subr -ffffffff825ec240 T sdmmc_mem_single_write_block -ffffffff825ec310 T sdmmc_mem_write_block -ffffffff825ec4c0 T sdmmc_mem_hibernate_write -ffffffff825ed000 T sdmmc_scsi_cmd -ffffffff825ed1f0 T sdmmc_minphys -ffffffff825ed270 T sdmmc_scsi_attach -ffffffff825ed460 T sdmmc_alloc_ccbs -ffffffff825ed5a0 T sdmmc_free_ccbs -ffffffff825ed600 T sdmmc_scsi_detach -ffffffff825ed760 T sdmmc_stimeout -ffffffff825ed7e0 T sdmmc_ccb_alloc -ffffffff825ed890 T sdmmc_ccb_free -ffffffff825ed970 T sdmmc_inquiry -ffffffff825edbe0 T sdmmc_start_xs -ffffffff825edcd0 T sdmmc_complete_xs -ffffffff825edda0 T sdmmc_done_xs -ffffffff825eddf0 T sdmmc_scsi_hibernate_io -ffffffff825ee000 T bwfm_sdio_preinit -ffffffff825ee4a0 T bwfm_sdio_txcheck -ffffffff825ee4e0 T bwfm_sdio_txdata -ffffffff825ee550 T bwfm_sdio_txctl -ffffffff825ee6a0 T bwfm_sdio_buscore_read -ffffffff825ee6b0 T bwfm_sdio_buscore_write -ffffffff825ee6d0 T bwfm_sdio_buscore_prepare -ffffffff825ee810 T bwfm_sdio_buscore_activate -ffffffff825ee890 T bwfm_sdio_match -ffffffff825ee940 T bwfm_sdio_attach -ffffffff825eec00 T bwfm_sdio_detach -ffffffff825eec60 T bwfm_sdio_task -ffffffff825eedc0 T bwfm_sdio_write_1 -ffffffff825eedf0 T bwfm_sdio_read_1 -ffffffff825eee20 T bwfm_sdio_write_4 -ffffffff825eeed0 T bwfm_sdio_read_4 -ffffffff825eef80 T bwfm_sdio_load_microcode -ffffffff825ef1e0 T bwfm_sdio_clkctl -ffffffff825ef310 T bwfm_sdio_dev_write -ffffffff825ef360 T bwfm_sdio_intr -ffffffff825ef3a0 T bwfm_sdio_ram_read_write -ffffffff825ef5d0 T bwfm_sdio_htclk -ffffffff825ef840 T bwfm_sdio_readshared -ffffffff825ef910 T bwfm_sdio_dev_read -ffffffff825ef950 T bwfm_sdio_rx_frames -ffffffff825efd00 T bwfm_sdio_tx_frames -ffffffff825efe00 T bwfm_sdio_backplane -ffffffff825efeb0 T bwfm_sdio_buf_read -ffffffff825eff90 T bwfm_sdio_buf_write -ffffffff825f0040 T bwfm_sdio_frame_read_write -ffffffff825f01c0 T bwfm_sdio_newbuf -ffffffff825f0240 T bwfm_sdio_tx_ok -ffffffff825f02a0 T bwfm_sdio_tx_ctrlframe -ffffffff825f03a0 T bwfm_sdio_tx_dataframe -ffffffff825f04f0 T bwfm_sdio_rx_glom -ffffffff825f1000 T onewire_match -ffffffff825f1050 T onewire_attach -ffffffff825f10f0 T onewire_detach -ffffffff825f1160 T onewire_activate -ffffffff825f1180 T onewire_scan -ffffffff825f13a0 T onewire_createthread -ffffffff825f1410 T onewire_print -ffffffff825f14e0 T onewirebus_print -ffffffff825f1530 T onewire_lock -ffffffff825f1550 T onewire_unlock -ffffffff825f1570 T onewire_reset -ffffffff825f1590 T onewire_bit -ffffffff825f15b0 T onewire_read_byte -ffffffff825f16f0 T onewire_write_byte -ffffffff825f17d0 T onewire_read_block -ffffffff825f1870 T onewire_write_block -ffffffff825f1910 T onewire_triplet -ffffffff825f19f0 T onewire_matchrom -ffffffff825f1b40 T onewire_search -ffffffff825f1ee0 T onewire_thread -ffffffff825f2000 T onewire_crc -ffffffff825f20b0 T onewire_crc16 -ffffffff825f2170 T onewire_famname -ffffffff825f21b0 T onewire_matchbyfam -ffffffff825f3000 T owid_match -ffffffff825f3030 T owid_attach -ffffffff825f3100 T owid_detach -ffffffff825f3140 T owid_activate -ffffffff825f4000 T owsbm_match -ffffffff825f4030 T owsbm_attach -ffffffff825f41d0 T owsbm_detach -ffffffff825f4240 T owsbm_activate -ffffffff825f4270 T owsbm_update -ffffffff825f5000 T owtemp_match -ffffffff825f5030 T owtemp_attach -ffffffff825f5130 T owtemp_detach -ffffffff825f51a0 T owtemp_activate -ffffffff825f51d0 T owtemp_update -ffffffff825f6000 T owctr_match -ffffffff825f6030 T owctr_attach -ffffffff825f6180 T owctr_detach -ffffffff825f61f0 T owctr_activate -ffffffff825f6220 T owctr_update -ffffffff825f6250 T owctr_update_counter -ffffffff825f7000 A __text_page_start -ffffffff825f7000 T Xsyscall_meltdown -ffffffff825f700c T Xsyscall -ffffffff825f726e t Xsyscall_trampback -ffffffff825f7280 T intr_user_exit -ffffffff825f72c2 t intr_user_exit_post_ast -ffffffff825f73ee t Xiretq_trampback -ffffffff825f73fa T doreti_iret -ffffffff825f8000 T alltraps -ffffffff825f8138 T recall_trap -ffffffff825f8150 T alltraps_kern -ffffffff825f8153 T alltraps_kern_meltdown -ffffffff825f9000 ? Xsyscall32 -ffffffff825f9000 A __kutext_start -ffffffff825f9000 A __text_page_end -ffffffff825fa000 ? Xtrap00 -ffffffff825fa010 ? Xtrap01 -ffffffff825fa020 ? Xtrap02 -ffffffff825fa028 c calltrap_specstk -ffffffff825fa0f0 ? calltrap_specstk_tramp -ffffffff825fa110 ? Xtrap03 -ffffffff825fa120 ? Xtrap04 -ffffffff825fa130 ? Xtrap05 -ffffffff825fa140 ? Xtrap06 -ffffffff825fa150 ? Xtrap07 -ffffffff825fa160 ? Xtrap08 -ffffffff825fa170 ? Xtrap09 -ffffffff825fa180 ? Xtrap0a -ffffffff825fa190 ? Xtrap0b -ffffffff825fa1a0 ? Xtrap0c -ffffffff825fa1b0 ? Xtrap0d -ffffffff825fa240 ? Xtrap0e -ffffffff825fa250 ? Xintrspurious -ffffffff825fa250 ? Xtrap0f -ffffffff825fa260 ? Xtrap10 -ffffffff825fa270 ? Xtrap11 -ffffffff825fa280 ? Xtrap12 -ffffffff825fa290 ? Xtrap13 -ffffffff825fa2a0 ? Xtrap14 -ffffffff825fa2b0 ? Xtrap15 -ffffffff825fa2c0 ? Xtrap16 -ffffffff825fa2c0 ? Xtrap17 -ffffffff825fa2c0 ? Xtrap18 -ffffffff825fa2c0 ? Xtrap19 -ffffffff825fa2c0 ? Xtrap1a -ffffffff825fa2c0 ? Xtrap1b -ffffffff825fa2c0 ? Xtrap1c -ffffffff825fa2c0 ? Xtrap1d -ffffffff825fa2c0 ? Xtrap1e -ffffffff825fa2c0 ? Xtrap1f -ffffffff825fa2d0 ? x2apic_eoi -ffffffff825fa2f0 ? Xintr_lapic_ipi -ffffffff825fa330 ? Xipi_invltlb -ffffffff825fa360 ? Xipi_invlpg -ffffffff825fa390 ? Xipi_invlrange -ffffffff825fa3d0 ? Xipi_invltlb_pcid -ffffffff825fa410 ? Xipi_invlpg_pcid -ffffffff825fa460 ? Xipi_invlrange_pcid -ffffffff825fa4d0 ? Xintr_lapic_ltimer -ffffffff825fa510 ? Xintr_xen_upcall -ffffffff825fa550 ? Xintr_hyperv_upcall -ffffffff825fa590 ? Xintr_legacy0 -ffffffff825fa5d0 ? Xintr_legacy1 -ffffffff825fa610 ? Xintr_legacy2 -ffffffff825fa650 ? Xintr_legacy3 -ffffffff825fa690 ? Xintr_legacy4 -ffffffff825fa6d0 ? Xintr_legacy5 -ffffffff825fa710 ? Xintr_legacy6 -ffffffff825fa750 ? Xintr_legacy7 -ffffffff825fa790 ? Xintr_legacy8 -ffffffff825fa7d0 ? Xintr_legacy9 -ffffffff825fa810 ? Xintr_legacy10 -ffffffff825fa850 ? Xintr_legacy11 -ffffffff825fa890 ? Xintr_legacy12 -ffffffff825fa8d0 ? Xintr_legacy13 -ffffffff825fa910 ? Xintr_legacy14 -ffffffff825fa950 ? Xintr_legacy15 -ffffffff825fa990 ? Xintr_ioapic_edge0 -ffffffff825fa9d0 ? Xintr_ioapic_edge1 -ffffffff825faa10 ? Xintr_ioapic_edge2 -ffffffff825faa50 ? Xintr_ioapic_edge3 -ffffffff825faa90 ? Xintr_ioapic_edge4 -ffffffff825faad0 ? Xintr_ioapic_edge5 -ffffffff825fab10 ? Xintr_ioapic_edge6 -ffffffff825fab50 ? Xintr_ioapic_edge7 -ffffffff825fab90 ? Xintr_ioapic_edge8 -ffffffff825fabd0 ? Xintr_ioapic_edge9 -ffffffff825fac10 ? Xintr_ioapic_edge10 -ffffffff825fac50 ? Xintr_ioapic_edge11 -ffffffff825fac90 ? Xintr_ioapic_edge12 -ffffffff825facd0 ? Xintr_ioapic_edge13 -ffffffff825fad10 ? Xintr_ioapic_edge14 -ffffffff825fad50 ? Xintr_ioapic_edge15 -ffffffff825fad90 ? Xintr_ioapic_edge16 -ffffffff825fadd0 ? Xintr_ioapic_edge17 -ffffffff825fae10 ? Xintr_ioapic_edge18 -ffffffff825fae50 ? Xintr_ioapic_edge19 -ffffffff825fae90 ? Xintr_ioapic_edge20 -ffffffff825faed0 ? Xintr_ioapic_edge21 -ffffffff825faf10 ? Xintr_ioapic_edge22 -ffffffff825faf50 ? Xintr_ioapic_edge23 -ffffffff825faf90 ? Xintr_ioapic_edge24 -ffffffff825fafd0 ? Xintr_ioapic_edge25 -ffffffff825fb010 ? Xintr_ioapic_edge26 -ffffffff825fb050 ? Xintr_ioapic_edge27 -ffffffff825fb090 ? Xintr_ioapic_edge28 -ffffffff825fb0d0 ? Xintr_ioapic_edge29 -ffffffff825fb110 ? Xintr_ioapic_edge30 -ffffffff825fb150 ? Xintr_ioapic_edge31 -ffffffff825fb190 ? Xintr_ioapic_edge32 -ffffffff825fb1d0 ? Xintr_ioapic_edge33 -ffffffff825fb210 ? Xintr_ioapic_edge34 -ffffffff825fb250 ? Xintr_ioapic_edge35 -ffffffff825fb290 ? Xintr_ioapic_edge36 -ffffffff825fb2d0 ? Xintr_ioapic_edge37 -ffffffff825fb310 ? Xintr_ioapic_edge38 -ffffffff825fb350 ? Xintr_ioapic_edge39 -ffffffff825fb390 ? Xintr_ioapic_edge40 -ffffffff825fb3d0 ? Xintr_ioapic_edge41 -ffffffff825fb410 ? Xintr_ioapic_edge42 -ffffffff825fb450 ? Xintr_ioapic_edge43 -ffffffff825fb490 ? Xintr_ioapic_edge44 -ffffffff825fb4d0 ? Xintr_ioapic_edge45 -ffffffff825fb510 ? Xintr_ioapic_edge46 -ffffffff825fb550 ? Xintr_ioapic_edge47 -ffffffff825fb590 ? Xintr_ioapic_edge48 -ffffffff825fb5d0 ? Xintr_ioapic_edge49 -ffffffff825fb610 ? Xintr_ioapic_edge50 -ffffffff825fb650 ? Xintr_ioapic_edge51 -ffffffff825fb690 ? Xintr_ioapic_edge52 -ffffffff825fb6d0 ? Xintr_ioapic_edge53 -ffffffff825fb710 ? Xintr_ioapic_edge54 -ffffffff825fb750 ? Xintr_ioapic_edge55 -ffffffff825fb790 ? Xintr_ioapic_edge56 -ffffffff825fb7d0 ? Xintr_ioapic_edge57 -ffffffff825fb810 ? Xintr_ioapic_edge58 -ffffffff825fb850 ? Xintr_ioapic_edge59 -ffffffff825fb890 ? Xintr_ioapic_edge60 -ffffffff825fb8d0 ? Xintr_ioapic_edge61 -ffffffff825fb910 ? Xintr_ioapic_edge62 -ffffffff825fb950 ? Xintr_ioapic_edge63 -ffffffff825fb990 ? Xintr_ioapic_level0 -ffffffff825fb9d0 ? Xintr_ioapic_level1 -ffffffff825fba10 ? Xintr_ioapic_level2 -ffffffff825fba50 ? Xintr_ioapic_level3 -ffffffff825fba90 ? Xintr_ioapic_level4 -ffffffff825fbad0 ? Xintr_ioapic_level5 -ffffffff825fbb10 ? Xintr_ioapic_level6 -ffffffff825fbb50 ? Xintr_ioapic_level7 -ffffffff825fbb90 ? Xintr_ioapic_level8 -ffffffff825fbbd0 ? Xintr_ioapic_level9 -ffffffff825fbc10 ? Xintr_ioapic_level10 -ffffffff825fbc50 ? Xintr_ioapic_level11 -ffffffff825fbc90 ? Xintr_ioapic_level12 -ffffffff825fbcd0 ? Xintr_ioapic_level13 -ffffffff825fbd10 ? Xintr_ioapic_level14 -ffffffff825fbd50 ? Xintr_ioapic_level15 -ffffffff825fbd90 ? Xintr_ioapic_level16 -ffffffff825fbdd0 ? Xintr_ioapic_level17 -ffffffff825fbe10 ? Xintr_ioapic_level18 -ffffffff825fbe50 ? Xintr_ioapic_level19 -ffffffff825fbe90 ? Xintr_ioapic_level20 -ffffffff825fbed0 ? Xintr_ioapic_level21 -ffffffff825fbf10 ? Xintr_ioapic_level22 -ffffffff825fbf50 ? Xintr_ioapic_level23 -ffffffff825fbf90 ? Xintr_ioapic_level24 -ffffffff825fbfd0 ? Xintr_ioapic_level25 -ffffffff825fc010 ? Xintr_ioapic_level26 -ffffffff825fc050 ? Xintr_ioapic_level27 -ffffffff825fc090 ? Xintr_ioapic_level28 -ffffffff825fc0d0 ? Xintr_ioapic_level29 -ffffffff825fc110 ? Xintr_ioapic_level30 -ffffffff825fc150 ? Xintr_ioapic_level31 -ffffffff825fc190 ? Xintr_ioapic_level32 -ffffffff825fc1d0 ? Xintr_ioapic_level33 -ffffffff825fc210 ? Xintr_ioapic_level34 -ffffffff825fc250 ? Xintr_ioapic_level35 -ffffffff825fc290 ? Xintr_ioapic_level36 -ffffffff825fc2d0 ? Xintr_ioapic_level37 -ffffffff825fc310 ? Xintr_ioapic_level38 -ffffffff825fc350 ? Xintr_ioapic_level39 -ffffffff825fc390 ? Xintr_ioapic_level40 -ffffffff825fc3d0 ? Xintr_ioapic_level41 -ffffffff825fc410 ? Xintr_ioapic_level42 -ffffffff825fc450 ? Xintr_ioapic_level43 -ffffffff825fc490 ? Xintr_ioapic_level44 -ffffffff825fc4d0 ? Xintr_ioapic_level45 -ffffffff825fc510 ? Xintr_ioapic_level46 -ffffffff825fc550 ? Xintr_ioapic_level47 -ffffffff825fc590 ? Xintr_ioapic_level48 -ffffffff825fc5d0 ? Xintr_ioapic_level49 -ffffffff825fc610 ? Xintr_ioapic_level50 -ffffffff825fc650 ? Xintr_ioapic_level51 -ffffffff825fc690 ? Xintr_ioapic_level52 -ffffffff825fc6d0 ? Xintr_ioapic_level53 -ffffffff825fc710 ? Xintr_ioapic_level54 -ffffffff825fc750 ? Xintr_ioapic_level55 -ffffffff825fc790 ? Xintr_ioapic_level56 -ffffffff825fc7d0 ? Xintr_ioapic_level57 -ffffffff825fc810 ? Xintr_ioapic_level58 -ffffffff825fc850 ? Xintr_ioapic_level59 -ffffffff825fc890 ? Xintr_ioapic_level60 -ffffffff825fc8d0 ? Xintr_ioapic_level61 -ffffffff825fc910 ? Xintr_ioapic_level62 -ffffffff825fc950 ? Xintr_ioapic_level63 -ffffffff825fd000 ? codepatch_fill_nop -ffffffff825fd000 A __cptext_start -ffffffff825fd000 A __kutext_end -ffffffff825fd0b0 ? codepatch_maprw -ffffffff825fd190 ? codepatch_unmaprw -ffffffff825fd200 ? codepatch_nop -ffffffff825fd360 ? codepatch_replace -ffffffff825fd510 ? codepatch_call -ffffffff825fd530 ? codepatch_jmp -ffffffff825fe000 A __cptext_end -ffffffff825fe000 A __rodata_start -ffffffff825fe000 C _etext -ffffffff825fe000 C etext -ffffffff825ff000 r seeprom_read -ffffffff825ff004 r icl_mg_pll_find_divisors.div1_vals -ffffffff825ff034 r athn_ac2qid -ffffffff825ff034 r athn_ac2qid -ffffffff825ff034 r athn_ac2qid -ffffffff825ff040 r rtwn_get_rssi.cckoff -ffffffff825ff068 r rsu_ac2qid -ffffffff825ff078 r pckbc_portcmd -ffffffff825ff07c r tht_fifo_write_pad.pad -ffffffff825ff084 r rsu_get_rssi.cckoff -ffffffff825ff0a4 r adlp_n_revids -ffffffff825ff0e8 r apple_iso_trans -ffffffff825ff0f0 r wihap_check_tx.txratetable -ffffffff825ff0f4 r dmamode -ffffffff825ff118 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dmub_srv_cmd_with_reply_data +ffffffff822dca70 T dmub_srv_get_outbox0_msg +ffffffff822dcb10 T dmub_srv_get_diagnostic_data +ffffffff822dcb60 T dmub_srv_should_detect +ffffffff822dcbb0 T dmub_srv_clear_inbox0_ack +ffffffff822dcc00 T dmub_srv_wait_for_inbox0_ack +ffffffff822dccb0 T dmub_srv_send_inbox0_cmd +ffffffff822dd000 T dmub_srv_stat_get_notification +ffffffff822de000 T setup_x_points_distribution +ffffffff822de170 T log_x_points_distribution +ffffffff822de1a0 T precompute_pq +ffffffff822de370 t compute_pq +ffffffff822de570 T precompute_de_pq +ffffffff822de6d0 t compute_de_pq +ffffffff822de990 T calculate_user_regamma_coeff +ffffffff822ded70 t apply_lut_1d +ffffffff822df0a0 T calculate_user_regamma_ramp +ffffffff822df980 T mod_color_calculate_degamma_params +ffffffff822e04d0 t build_evenly_distributed_points +ffffffff822e0650 t scale_gamma +ffffffff822e0800 t map_regamma_hw_to_x_user +ffffffff822e0f20 T mod_color_calculate_regamma_params +ffffffff822e2840 t scale_gamma_dx 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mod_hdcp_hdcp2_prepare_ake_init +ffffffff822f4550 T mod_hdcp_hdcp2_validate_ake_cert +ffffffff822f4700 T mod_hdcp_hdcp2_validate_h_prime +ffffffff822f4880 T mod_hdcp_hdcp2_prepare_lc_init +ffffffff822f4980 T mod_hdcp_hdcp2_validate_l_prime +ffffffff822f4aa0 T mod_hdcp_hdcp2_prepare_eks +ffffffff822f4bf0 T mod_hdcp_hdcp2_enable_encryption +ffffffff822f4d60 T mod_hdcp_hdcp2_validate_rx_id_list +ffffffff822f4ee0 T mod_hdcp_hdcp2_enable_dp_stream_encryption +ffffffff822f5050 T mod_hdcp_hdcp2_prepare_stream_management +ffffffff822f5160 T mod_hdcp_hdcp2_validate_stream_ready +ffffffff822f6000 T mod_build_vsc_infopacket +ffffffff822f6270 T mod_build_hf_vsif_infopacket +ffffffff822f63e0 T mod_build_adaptive_sync_infopacket +ffffffff822f64a0 T mod_build_adaptive_sync_infopacket_v2 +ffffffff822f6510 T mod_build_adaptive_sync_infopacket_v1 +ffffffff822f7000 T dmub_init_abm_config +ffffffff822f7550 t fill_iram_v_2_3 +ffffffff822f79e0 T dmcu_load_iram +ffffffff822f81d0 T is_psr_su_specific_panel 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amdgpu_dpm_switch_power_profile +ffffffff822fa8f0 T amdgpu_dpm_set_xgmi_pstate +ffffffff822fa990 T amdgpu_dpm_set_df_cstate +ffffffff822faa30 T amdgpu_dpm_allow_xgmi_power_down +ffffffff822faab0 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff822fab40 T amdgpu_dpm_set_clockgating_by_smu +ffffffff822fabe0 T amdgpu_dpm_smu_i2c_bus_access +ffffffff822fac80 T amdgpu_pm_acpi_event_handler +ffffffff822fad40 T amdgpu_dpm_read_sensor +ffffffff822fae00 T amdgpu_dpm_get_apu_thermal_limit +ffffffff822faea0 T amdgpu_dpm_set_apu_thermal_limit +ffffffff822faf40 T amdgpu_dpm_compute_clocks +ffffffff822fb040 T amdgpu_dpm_enable_uvd +ffffffff822fb230 T amdgpu_dpm_enable_vce +ffffffff822fb420 T amdgpu_dpm_enable_jpeg +ffffffff822fb520 T amdgpu_pm_load_smu_firmware +ffffffff822fb5d0 T amdgpu_dpm_handle_passthrough_sbr +ffffffff822fb650 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff822fb6d0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff822fb750 T amdgpu_dpm_get_dpm_freq_range +ffffffff822fb7f0 T amdgpu_dpm_set_soft_freq_range +ffffffff822fb890 T amdgpu_dpm_write_watermarks_table +ffffffff822fb910 T amdgpu_dpm_wait_for_event +ffffffff822fb9a0 T amdgpu_dpm_set_residency_gfxoff +ffffffff822fba20 T amdgpu_dpm_get_residency_gfxoff +ffffffff822fbaa0 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff822fbb20 T amdgpu_dpm_get_status_gfxoff +ffffffff822fbba0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff822fbbf0 T amdgpu_dpm_gfx_state_change +ffffffff822fbc60 T amdgpu_dpm_get_ecc_info +ffffffff822fbce0 T amdgpu_dpm_get_vce_clock_state +ffffffff822fbd70 T amdgpu_dpm_get_current_power_state +ffffffff822fbde0 T amdgpu_dpm_set_power_state +ffffffff822fbf40 T amdgpu_dpm_dispatch_task +ffffffff822fbfe0 T amdgpu_dpm_get_performance_level +ffffffff822fc070 T amdgpu_dpm_force_performance_level +ffffffff822fc250 T amdgpu_dpm_get_pp_num_states +ffffffff822fc2e0 T amdgpu_dpm_get_pp_table +ffffffff822fc370 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff822fc410 T amdgpu_dpm_odn_edit_dpm_table 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amdgpu_dpm_is_cclk_dpm_supported +ffffffff822fd260 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff822fd2f0 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff822fd390 T amdgpu_dpm_is_overdrive_supported +ffffffff822fd400 T amdgpu_dpm_set_pp_table +ffffffff822fd4a0 T amdgpu_dpm_get_num_cpu_cores +ffffffff822fd4f0 T amdgpu_dpm_stb_debug_fs_init +ffffffff822fd540 T amdgpu_dpm_display_configuration_change +ffffffff822fd5d0 T amdgpu_dpm_get_clock_by_type +ffffffff822fd670 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff822fd700 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff822fd7a0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff822fd840 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff822fd8d0 T amdgpu_dpm_display_clock_voltage_request +ffffffff822fd960 T amdgpu_dpm_get_current_clocks +ffffffff822fd9f0 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff822fda70 T amdgpu_dpm_set_active_display_count +ffffffff822fdb00 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff822fdb90 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff822fdc30 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff822fdcd0 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff822fdd60 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff822fddf0 T amdgpu_dpm_get_uclk_dpm_states +ffffffff822fde90 T amdgpu_dpm_get_dpm_clock_table +ffffffff822fe000 T amdgpu_dpm_get_active_displays +ffffffff822fe0a0 T amdgpu_dpm_get_vblank_time +ffffffff822fe150 T amdgpu_dpm_get_vrefresh +ffffffff822ff000 T amdgpu_pm_sysfs_init +ffffffff822ff030 T amdgpu_pm_sysfs_fini +ffffffff822ff060 T amdgpu_debugfs_pm_init +ffffffff82300000 T amdgpu_dpm_print_class_info +ffffffff823002b0 T amdgpu_dpm_print_cap_info +ffffffff82300340 T amdgpu_dpm_print_ps_status +ffffffff823003d0 T amdgpu_pm_print_power_states +ffffffff82300460 T amdgpu_get_platform_caps +ffffffff82300500 T amdgpu_parse_extended_power_table +ffffffff823012d0 t amdgpu_parse_clk_voltage_dep_table +ffffffff82301380 T amdgpu_free_extended_power_table +ffffffff82301490 T amdgpu_add_thermal_controller +ffffffff823018e0 T amdgpu_get_vce_clock_state +ffffffff82301920 T amdgpu_legacy_dpm_compute_clocks +ffffffff82301db0 T amdgpu_dpm_thermal_work_handler +ffffffff82302000 t pp_early_init +ffffffff82302100 t pp_late_init +ffffffff82302220 t pp_sw_init +ffffffff823022b0 t pp_sw_fini +ffffffff82302300 t pp_hw_init +ffffffff82302360 t pp_hw_fini +ffffffff823023d0 t pp_late_fini +ffffffff82302430 t pp_suspend +ffffffff82302480 t pp_resume +ffffffff823024a0 t pp_is_idle +ffffffff823024d0 t pp_wait_for_idle +ffffffff82302500 t pp_sw_reset +ffffffff82302530 t pp_set_clockgating_state +ffffffff82302560 t pp_set_powergating_state +ffffffff82302590 t pp_dpm_set_fan_control_mode +ffffffff82302600 t pp_dpm_get_fan_control_mode +ffffffff82302670 t pp_dpm_set_fan_speed_pwm +ffffffff823026d0 t pp_dpm_get_fan_speed_pwm +ffffffff82302730 t pp_dpm_force_clock_level +ffffffff82302790 t pp_dpm_print_clock_levels +ffffffff823027f0 t pp_dpm_emit_clock_levels +ffffffff82302850 t pp_dpm_force_performance_level +ffffffff823028f0 t pp_dpm_get_sclk_od +ffffffff82302950 t pp_dpm_set_sclk_od +ffffffff823029b0 t pp_dpm_get_mclk_od +ffffffff82302a10 t pp_dpm_set_mclk_od +ffffffff82302a70 t pp_dpm_read_sensor +ffffffff82302b30 t pp_dpm_get_performance_level +ffffffff82302b70 t pp_dpm_get_current_power_state +ffffffff82302bf0 t pp_dpm_get_fan_speed_rpm +ffffffff82302c50 t pp_dpm_set_fan_speed_rpm +ffffffff82302cb0 t pp_dpm_get_pp_num_states +ffffffff82302df0 t pp_dpm_get_pp_table +ffffffff82302e40 t pp_dpm_set_pp_table +ffffffff82302f70 t pp_dpm_switch_power_profile +ffffffff823030b0 t pp_dpm_get_vce_clock_state +ffffffff82303100 t pp_dpm_dispatch_tasks +ffffffff82303140 t pp_dpm_load_fw +ffffffff823031b0 t pp_dpm_fw_loading_complete +ffffffff823031e0 t pp_set_powergating_by_smu +ffffffff82303360 t pp_set_clockgating_by_smu +ffffffff823033d0 t pp_set_power_limit +ffffffff82303490 t pp_get_power_limit +ffffffff82303530 t pp_get_power_profile_mode +ffffffff82303590 t pp_set_power_profile_mode +ffffffff823035f0 t pp_set_fine_grain_clk_vol +ffffffff82303650 t pp_odn_edit_dpm_table +ffffffff823036b0 t pp_dpm_set_mp1_state +ffffffff82303710 t pp_smu_i2c_bus_access +ffffffff82303770 t pp_gfx_state_change_set +ffffffff823037d0 t pp_dpm_get_sclk +ffffffff82303820 t pp_dpm_get_mclk +ffffffff82303870 t pp_display_configuration_change +ffffffff823038c0 t pp_get_display_power_level +ffffffff82303900 t pp_get_current_clocks +ffffffff82303a20 t pp_get_clock_by_type +ffffffff82303a70 t pp_get_clock_by_type_with_latency +ffffffff82303ac0 t pp_get_clock_by_type_with_voltage +ffffffff82303b10 t pp_set_watermarks_for_clocks_ranges +ffffffff82303b50 t pp_display_clock_voltage_request +ffffffff82303b90 t pp_get_display_mode_validation_clocks +ffffffff82303bf0 t pp_notify_smu_enable_pwe +ffffffff82303c50 t pp_enable_mgpu_fan_boost +ffffffff82303cb0 t pp_set_active_display_count +ffffffff82303cf0 t pp_set_hard_min_dcefclk_by_freq +ffffffff82303d50 t pp_set_hard_min_fclk_by_freq +ffffffff82303db0 t pp_set_min_deep_sleep_dcefclk +ffffffff82303e10 t pp_get_asic_baco_capability +ffffffff82303e80 t pp_get_asic_baco_state +ffffffff82303ee0 t pp_set_asic_baco_state +ffffffff82303f50 t pp_get_ppfeature_status +ffffffff82303fb0 t pp_set_ppfeature_status +ffffffff82304000 t pp_asic_reset_mode_2 +ffffffff82304060 t pp_set_df_cstate +ffffffff823040c0 t pp_set_xgmi_pstate +ffffffff82304120 t pp_get_gpu_metrics +ffffffff82304180 t pp_get_prv_buffer_details +ffffffff82304200 t pp_pm_compute_clocks +ffffffff823042c0 t pp_swctf_delayed_work_handler +ffffffff82304400 t __delayed_work_tick +ffffffff82305000 T ci_baco_set_state +ffffffff82306000 T baco_program_registers +ffffffff823060d0 t baco_cmd_handler +ffffffff82306250 T soc15_baco_program_registers +ffffffff82307000 T fiji_baco_set_state +ffffffff82308000 T phm_setup_asic +ffffffff82308050 T phm_power_down_asic +ffffffff823080a0 T phm_set_power_state +ffffffff82308110 T phm_enable_dynamic_state_management +ffffffff823081c0 T phm_disable_dynamic_state_management +ffffffff82308260 T phm_force_dpm_levels +ffffffff823082b0 T phm_apply_state_adjust_rules +ffffffff82308300 T phm_apply_clock_adjust_rules +ffffffff82308350 T phm_powerdown_uvd +ffffffff823083a0 T phm_disable_clock_power_gatings +ffffffff823083f0 T phm_pre_display_configuration_changed +ffffffff82308450 T phm_display_configuration_changed +ffffffff823084b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff82308510 T phm_stop_thermal_controller +ffffffff82308570 T phm_register_irq_handlers +ffffffff823085c0 T phm_start_thermal_controller +ffffffff82308710 T phm_check_smc_update_required_for_display_configuration +ffffffff82308770 T phm_check_states_equal +ffffffff823087c0 T phm_store_dal_configuration_data +ffffffff82308910 T phm_get_dal_power_level +ffffffff82308970 T phm_set_cpu_power_state +ffffffff823089c0 T phm_get_performance_level +ffffffff82308a20 T phm_get_clock_info +ffffffff82308b90 T phm_get_current_shallow_sleep_clocks +ffffffff82308be0 T phm_get_clock_by_type +ffffffff82308c30 T phm_get_clock_by_type_with_latency +ffffffff82308c80 T phm_get_clock_by_type_with_voltage +ffffffff82308cd0 T phm_set_watermarks_for_clocks_ranges +ffffffff82308d20 T phm_display_clock_voltage_request +ffffffff82308d70 T phm_get_max_high_clocks +ffffffff82308dc0 T phm_disable_smc_firmware_ctf +ffffffff82308e20 T phm_set_active_display_count +ffffffff82309000 T hwmgr_early_init +ffffffff82309460 t polaris_set_asic_special_caps +ffffffff823094e0 T hwmgr_sw_init +ffffffff82309550 T hwmgr_sw_fini +ffffffff823095a0 T hwmgr_hw_init +ffffffff82309760 T hwmgr_hw_fini +ffffffff82309820 T hwmgr_suspend +ffffffff823098a0 T hwmgr_resume +ffffffff82309940 T hwmgr_handle_task +ffffffff8230a000 T polaris_baco_set_state +ffffffff8230b000 T pp_override_get_default_fuse_value +ffffffff8230c000 T psm_init_power_state_table +ffffffff8230c2a0 T psm_fini_power_state_table +ffffffff8230c360 T psm_set_boot_states +ffffffff8230c410 T psm_set_performance_states +ffffffff8230c4c0 T psm_set_user_performance_state +ffffffff8230c550 T psm_adjust_power_state_dynamic +ffffffff8230d000 T atomctrl_initialize_mc_reg_table +ffffffff8230d210 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff8230d420 T atomctrl_set_engine_dram_timings_rv770 +ffffffff8230d490 T atomctrl_get_memory_pll_dividers_si +ffffffff8230d570 T atomctrl_get_memory_pll_dividers_vi +ffffffff8230d5f0 T atomctrl_get_memory_pll_dividers_ai +ffffffff8230d6a0 T atomctrl_get_engine_pll_dividers_kong +ffffffff8230d720 T atomctrl_get_engine_pll_dividers_vi +ffffffff8230d7f0 T atomctrl_get_engine_pll_dividers_ai +ffffffff8230d8d0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff8230d990 T atomctrl_get_reference_clock +ffffffff8230d9f0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff8230dab0 T atomctrl_get_voltage_table_v3 +ffffffff8230dc10 T atomctrl_get_pp_assign_pin +ffffffff8230dcf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff8230e0c0 t GetScaledFraction +ffffffff8230e150 t fDecodeLeakageID +ffffffff8230e1b0 t fSqrt +ffffffff8230e230 T atomctrl_get_voltage_evv_on_sclk +ffffffff8230e2b0 T atomctrl_get_voltage_evv +ffffffff8230e360 T atomctrl_get_mpll_reference_clock +ffffffff8230e3d0 T atomctrl_is_asic_internal_ss_supported +ffffffff8230e420 T atomctrl_get_memory_clock_spread_spectrum +ffffffff8230e520 T atomctrl_get_engine_clock_spread_spectrum +ffffffff8230e620 T atomctrl_read_efuse +ffffffff8230e6d0 T atomctrl_set_ac_timing_ai +ffffffff8230e730 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff8230e7b0 T atomctrl_get_smc_sclk_range_table +ffffffff8230e860 T atomctrl_get_vddc_shared_railinfo +ffffffff8230e8d0 T atomctrl_get_avfs_information +ffffffff8230ea60 T atomctrl_get_svi2_info +ffffffff8230eb40 T atomctrl_get_leakage_id_from_efuse +ffffffff8230eba0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff8230ed40 T atomctrl_get_voltage_range +ffffffff8230ee00 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff8230ee80 T atomctrl_get_edc_leakage_table +ffffffff8230f000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff8230f0c0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff8230f280 T pp_atomfwctrl_get_pp_assign_pin +ffffffff8230f360 T pp_atomfwctrl_enter_self_refresh +ffffffff8230f390 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff8230f440 T pp_atomfwctrl_get_avfs_information +ffffffff8230f780 T pp_atomfwctrl_get_gpio_information +ffffffff8230f820 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff8230f8b0 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff8230fc30 T pp_atomfwctrl_get_smc_dpm_information +ffffffff82310000 T encode_pcie_lane_width +ffffffff82310030 T decode_pcie_lane_width +ffffffff82311000 t pp_tables_v1_0_initialize +ffffffff82312450 t pp_tables_v1_0_uninitialize +ffffffff82312600 T get_number_of_powerplay_table_entries_v1_0 +ffffffff823126b0 T get_powerplay_table_entry_v1_0 +ffffffff82313000 T pp_tables_get_response_times +ffffffff823130d0 T pp_tables_get_num_of_entries +ffffffff82313190 T pp_tables_get_entry +ffffffff823134a0 t init_non_clock_fields +ffffffff823135e0 t pp_tables_initialize +ffffffff82314760 t pp_tables_uninitialize +ffffffff82314960 t get_number_of_vce_state_table_entries +ffffffff82314a50 t get_vce_state_table_entry +ffffffff82315000 T smu10_init_function_pointers +ffffffff82315040 t smu10_hwmgr_backend_init +ffffffff823156e0 t smu10_hwmgr_backend_fini +ffffffff82315820 t smu10_setup_asic_task +ffffffff82315890 t smu10_get_power_state_size +ffffffff823158c0 t smu10_apply_state_adjust_rules +ffffffff823158f0 t smu10_dpm_force_dpm_level +ffffffff82315e70 t smu10_enable_dpm_tasks +ffffffff82315f30 t smu10_disable_dpm_tasks +ffffffff82315f60 t smu10_dpm_patch_boot_state +ffffffff82315f90 t smu10_dpm_get_pp_table_entry +ffffffff82315ff0 t smu10_dpm_get_num_of_pp_table_entries +ffffffff82316040 t smu10_powergate_vcn +ffffffff823160e0 t smu10_dpm_get_mclk +ffffffff82316140 t smu10_dpm_get_sclk +ffffffff82316190 t smu10_set_power_state_tasks +ffffffff82316200 t smu10_set_cpu_power_state +ffffffff82316230 t smu10_store_cc6_data +ffffffff823162a0 t smu10_get_dal_power_level +ffffffff823162d0 t smu10_get_performance_level +ffffffff82316370 t smu10_get_current_shallow_sleep_clocks +ffffffff823163d0 t smu10_get_clock_by_type_with_latency +ffffffff82316520 t smu10_get_clock_by_type_with_voltage +ffffffff82316630 t smu10_set_watermarks_for_clocks_ranges +ffffffff82316700 t smu10_display_clock_voltage_request +ffffffff823167a0 t smu10_get_max_high_clocks +ffffffff823167d0 t smu10_power_off_asic +ffffffff82316820 t smu10_force_clock_level +ffffffff823169e0 t smu10_print_clock_levels +ffffffff82316dd0 t smu10_gfx_off_control +ffffffff82316ee0 t smu10_read_sensor +ffffffff82317070 t smu10_set_active_display_count +ffffffff823170d0 t smu10_set_min_deep_sleep_dcefclk +ffffffff82317130 t smu10_get_power_profile_mode +ffffffff82317170 t smu10_set_power_profile_mode +ffffffff823172a0 t smu10_set_fine_grain_clk_vol +ffffffff823174b0 t smu10_powergate_mmhub +ffffffff823174d0 t smu10_smus_notify_pwe +ffffffff823174f0 t smu10_powergate_sdma +ffffffff82317510 t smu10_set_hard_min_dcefclk_by_freq +ffffffff82317570 t smu10_set_hard_min_fclk_by_freq +ffffffff823175d0 t smu10_set_hard_min_gfxclk_by_freq +ffffffff82317630 t smu10_set_soft_max_gfxclk_by_freq +ffffffff82317690 t smu10_asic_reset +ffffffff823176b0 t smu10_gfx_state_change +ffffffff823176f0 t smu10_dpm_get_pp_table_entry_callback +ffffffff82318000 T smu7_baco_get_capability +ffffffff82318060 T smu7_baco_get_state +ffffffff823180b0 T smu7_baco_set_state +ffffffff82319000 T smu7_powerdown_uvd +ffffffff82319050 T smu7_disable_clock_power_gating +ffffffff823190e0 T smu7_powergate_uvd +ffffffff823191d0 T smu7_powergate_vce +ffffffff823192c0 T smu7_update_clock_gatings +ffffffff82319670 T smu7_powergate_gfx +ffffffff8231a000 T smu7_get_sleep_divider_id_from_clock +ffffffff8231a0a0 T smu7_init_function_pointers +ffffffff8231a100 t smu7_hwmgr_backend_init +ffffffff8231bed0 t smu7_hwmgr_backend_fini +ffffffff8231bf40 t smu7_setup_asic_task +ffffffff8231c2b0 t smu7_get_power_state_size +ffffffff8231c2e0 t smu7_apply_state_adjust_rules +ffffffff8231c780 t smu7_force_dpm_level +ffffffff8231cc90 t smu7_enable_dpm_tasks +ffffffff8231f520 t smu7_disable_dpm_tasks +ffffffff8231fb60 t smu7_dpm_patch_boot_state +ffffffff8231fca0 t smu7_get_pp_table_entry +ffffffff823200a0 t smu7_get_number_of_powerplay_table_entries +ffffffff82320110 t smu7_dpm_get_mclk +ffffffff823201b0 t smu7_dpm_get_sclk +ffffffff82320250 t smu7_set_power_state_tasks +ffffffff82320f70 t smu7_notify_smc_display_config_after_ps_adjustment +ffffffff82320fa0 t smu7_display_configuration_changed_task +ffffffff82321160 t smu7_set_max_fan_rpm_output +ffffffff82321190 t smu7_set_max_fan_pwm_output +ffffffff823211b0 t smu7_set_fan_control_mode +ffffffff82321240 t smu7_get_fan_control_mode +ffffffff82321280 t smu7_register_irq_handlers +ffffffff82321330 t smu7_check_smc_update_required_for_display_configuration +ffffffff823213e0 t smu7_check_states_equal +ffffffff82321580 t smu7_get_performance_level +ffffffff82321610 t smu7_get_clock_by_type +ffffffff823217d0 t smu7_get_clock_by_type_with_latency +ffffffff823219a0 t smu7_set_watermarks_for_clocks_ranges +ffffffff82321bc0 t smu7_get_max_high_clocks +ffffffff82321c40 t smu7_power_off_asic +ffffffff82321ca0 t smu7_force_clock_level +ffffffff82321db0 t smu7_print_clock_levels +ffffffff823223a0 t smu7_get_sclk_od +ffffffff82322400 t smu7_set_sclk_od +ffffffff823224c0 t smu7_get_mclk_od +ffffffff82322520 t smu7_set_mclk_od +ffffffff823225e0 t smu7_read_sensor +ffffffff823228a0 t smu7_avfs_control +ffffffff82322970 t smu7_notify_cac_buffer_info +ffffffff82322b10 t smu7_get_thermal_temperature_range +ffffffff82322bb0 t smu7_get_power_profile_mode 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smu7_fan_ctrl_get_fan_speed_pwm +ffffffff82326150 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff82326200 T smu7_fan_ctrl_set_static_mode +ffffffff82326330 T smu7_fan_ctrl_set_default_mode +ffffffff82326410 T smu7_fan_ctrl_start_smc_fan_control +ffffffff82326540 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff82326560 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff82326740 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff82326930 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff82326b10 T smu7_thermal_get_temperature +ffffffff82326b70 T smu7_thermal_disable_alert +ffffffff82326c10 T smu7_thermal_stop_thermal_controller +ffffffff82326d90 T smu7_start_thermal_controller +ffffffff82327120 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff82328000 T smu8_init_function_pointers +ffffffff82328040 t smu8_hwmgr_backend_init +ffffffff82328520 t smu8_hwmgr_backend_fini +ffffffff823285a0 t smu8_setup_asic_task +ffffffff82328ac0 t smu8_get_power_state_size +ffffffff82328af0 t smu8_apply_state_adjust_rules +ffffffff82328c40 t smu8_dpm_force_dpm_level +ffffffff82328f20 t smu8_enable_dpm_tasks +ffffffff823290b0 t smu8_disable_dpm_tasks +ffffffff82329190 t smu8_dpm_patch_boot_state +ffffffff823291f0 t smu8_dpm_get_pp_table_entry +ffffffff82329250 t smu8_dpm_get_num_of_pp_table_entries +ffffffff823292a0 t smu8_dpm_powerdown_uvd +ffffffff823292f0 t smu8_dpm_powergate_vce +ffffffff823294c0 t smu8_dpm_powergate_uvd +ffffffff823296d0 t smu8_dpm_powergate_acp +ffffffff82329730 t smu8_dpm_get_mclk +ffffffff82329760 t smu8_dpm_get_sclk +ffffffff823297d0 t smu8_set_power_state_tasks +ffffffff82329ad0 t smu8_set_cpu_power_state +ffffffff82329b50 t smu8_store_cc6_data +ffffffff82329bd0 t smu8_get_dal_power_level +ffffffff82329c50 t smu8_get_performance_level +ffffffff82329d50 t smu8_get_current_shallow_sleep_clocks +ffffffff82329db0 t smu8_get_clock_by_type +ffffffff82329ef0 t smu8_get_max_high_clocks +ffffffff82329fb0 t smu8_power_off_asic +ffffffff8232a030 t smu8_force_clock_level +ffffffff8232a0a0 t smu8_print_clock_levels +ffffffff8232a280 t smu8_read_sensor +ffffffff8232a590 t smu8_notify_cac_buffer_info +ffffffff8232a640 t smu8_get_thermal_temperature_range +ffffffff8232a6c0 t smu8_dpm_get_pp_table_entry_callback +ffffffff8232b000 T smu9_baco_get_capability +ffffffff8232b0e0 T smu9_baco_get_state +ffffffff8232c000 T convert_to_vid +ffffffff8232c050 T convert_to_vddc +ffffffff8232c090 T phm_copy_clock_limits_array +ffffffff8232c170 T phm_copy_overdrive_settings_limits_array +ffffffff8232c250 T phm_set_field_to_u32 +ffffffff8232c2b0 T phm_wait_on_register +ffffffff8232c3a0 T phm_wait_on_indirect_register +ffffffff8232c4b0 T phm_wait_for_register_unequal +ffffffff8232c580 T phm_wait_for_indirect_register_unequal +ffffffff8232c680 T phm_cf_want_uvd_power_gating +ffffffff8232c6c0 T phm_cf_want_vce_power_gating +ffffffff8232c700 T phm_trim_voltage_table +ffffffff8232c820 T phm_get_svi2_mvdd_voltage_table +ffffffff8232c9a0 T phm_get_svi2_vddci_voltage_table +ffffffff8232cb20 T phm_get_svi2_vdd_voltage_table +ffffffff8232cbc0 T phm_trim_voltage_table_to_fit_state_table +ffffffff8232ccb0 T phm_reset_single_dpm_table +ffffffff8232cd10 T phm_setup_pcie_table_entry +ffffffff8232cd50 T phm_get_dpm_level_enable_mask_value +ffffffff8232ce30 T phm_get_voltage_index +ffffffff8232ceb0 T phm_get_voltage_id +ffffffff8232cf30 T phm_find_closest_vddci +ffffffff8232cfa0 T phm_find_boot_level +ffffffff8232d010 T phm_get_sclk_for_voltage_evv +ffffffff8232d0d0 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff8232d1e0 T phm_get_lowest_enabled_level +ffffffff8232d220 T phm_apply_dal_min_voltage_request +ffffffff8232d2f0 T phm_get_voltage_evv_on_sclk +ffffffff8232d3a0 T phm_irq_process +ffffffff8232d540 T smu9_register_irq_handlers +ffffffff8232d5f0 T smu_atom_get_data_table +ffffffff8232d660 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff8232d760 T smu_set_watermarks_for_clocks_ranges +ffffffff8232e000 T tonga_baco_set_state +ffffffff8232f000 T vega10_baco_set_state +ffffffff82330000 T vega10_enable_disable_vce_dpm +ffffffff82330090 T vega10_hwmgr_init +ffffffff823300f0 t vega10_hwmgr_backend_init +ffffffff82330ef0 t vega10_hwmgr_backend_fini +ffffffff82330f60 t vega10_setup_asic_task +ffffffff82331090 t vega10_get_power_state_size +ffffffff823310c0 t vega10_apply_state_adjust_rules +ffffffff82331420 t vega10_dpm_force_dpm_level +ffffffff82331880 t vega10_enable_dpm_tasks +ffffffff82334650 t vega10_disable_dpm_tasks +ffffffff82334c30 t vega10_patch_boot_state +ffffffff82334c60 t vega10_get_pp_table_entry +ffffffff82334cd0 t vega10_power_gate_vce +ffffffff82334d70 t vega10_power_gate_uvd +ffffffff82334e10 t vega10_dpm_get_mclk +ffffffff82334eb0 t vega10_dpm_get_sclk +ffffffff82334f50 t vega10_set_power_state_tasks +ffffffff823358b0 t vega10_notify_smc_display_config_after_ps_adjustment +ffffffff82335a60 t vega10_display_configuration_changed_task +ffffffff82335b30 t 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vega12_thermal_get_temperature +ffffffff823471e0 T vega12_thermal_disable_alert +ffffffff82347270 T vega12_thermal_stop_thermal_controller +ffffffff82347300 T vega12_start_thermal_controller +ffffffff82348000 T vega20_baco_get_capability +ffffffff823480c0 T vega20_baco_get_state +ffffffff82348160 T vega20_baco_set_state +ffffffff82348360 T vega20_baco_apply_vdci_flush_workaround +ffffffff82349000 T vega20_hwmgr_init +ffffffff82349040 t vega20_hwmgr_backend_init +ffffffff82349940 t vega20_hwmgr_backend_fini +ffffffff823499a0 t vega20_setup_asic_task +ffffffff82349a90 t vega20_apply_clocks_adjust_rules +ffffffff82349f40 t vega20_dpm_force_dpm_level +ffffffff8234a6c0 t vega20_enable_dpm_tasks +ffffffff8234ab00 t vega20_disable_dpm_tasks +ffffffff8234aca0 t vega20_power_gate_vce +ffffffff8234add0 t vega20_power_gate_uvd +ffffffff8234ae80 t vega20_dpm_get_mclk +ffffffff8234af80 t vega20_dpm_get_sclk +ffffffff8234b080 t vega20_notify_smc_display_config_after_ps_adjustment +ffffffff8234b1c0 t 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sienna_cichlid_pre_display_config_changed +ffffffff8238c1a0 t sienna_cichlid_display_config_changed +ffffffff8238c200 t sienna_cichlid_notify_smc_display_config +ffffffff8238c380 t sienna_cichlid_is_dpm_running +ffffffff8238c3d0 t sienna_cichlid_get_fan_speed_rpm +ffffffff8238c4e0 t sienna_cichlid_set_watermarks_table +ffffffff8238c670 t sienna_cichlid_get_thermal_temperature_range +ffffffff8238c750 t sienna_cichlid_get_uclk_dpm_states +ffffffff8238c860 t sienna_cichlid_set_default_od_settings +ffffffff8238ca10 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff8238ca90 t sienna_cichlid_dump_pptable +ffffffff8238cac0 t sienna_cichlid_get_power_limit +ffffffff8238cb90 t sienna_cichlid_update_pcie_parameters +ffffffff8238ccc0 t sienna_cichlid_i2c_control_init +ffffffff8238cdf0 t sienna_cichlid_i2c_control_fini +ffffffff8238ce30 t sienna_cichlid_get_unique_id +ffffffff8238cf80 t sienna_cichlid_init_smc_tables +ffffffff8238d2a0 t sienna_cichlid_set_mp1_state +ffffffff8238d2e0 t sienna_cichlid_setup_pptable +ffffffff8238d720 t sienna_cichlid_system_features_control +ffffffff8238d7b0 t sienna_cichlid_baco_enter +ffffffff8238d800 t sienna_cichlid_baco_exit +ffffffff8238d900 t sienna_cichlid_is_mode1_reset_supported +ffffffff8238d980 t sienna_cichlid_is_mode2_reset_supported +ffffffff8238d9b0 t sienna_cichlid_mode2_reset +ffffffff8238daf0 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff8238db10 t sienna_cichlid_get_gpu_metrics +ffffffff8238e090 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff8238e0e0 t sienna_cichlid_get_fan_parameters +ffffffff8238e120 t sienna_cichlid_gpo_control +ffffffff8238e1d0 t sienna_cichlid_get_ecc_info +ffffffff8238e2c0 t sienna_cichlid_stb_get_data_direct +ffffffff8238e360 t sienna_cichlid_get_default_config_table_settings +ffffffff8238e3d0 t sienna_cichlid_set_config_table +ffffffff8238e4a0 t sienna_cichlid_get_throttler_status_locked +ffffffff8238e600 t sienna_cichlid_get_smartshift_power_percentage +ffffffff8238e730 t sienna_cichlid_i2c_xfer +ffffffff8238e9d0 t sienna_cichlid_i2c_func +ffffffff8238f000 T smu_v11_0_init_microcode +ffffffff8238f140 T smu_v11_0_fini_microcode +ffffffff8238f190 T smu_v11_0_load_microcode +ffffffff8238f2d0 T smu_v11_0_check_fw_status +ffffffff8238f320 T smu_v11_0_check_fw_version +ffffffff8238f490 T smu_v11_0_setup_pptable +ffffffff8238f5b0 T smu_v11_0_init_smc_tables +ffffffff8238f710 T smu_v11_0_fini_smc_tables +ffffffff8238f940 T smu_v11_0_init_power +ffffffff8238f9d0 T smu_v11_0_fini_power +ffffffff8238fa30 T smu_v11_0_get_vbios_bootup_values +ffffffff8238fd90 T smu_v11_0_notify_memory_pool_location +ffffffff8238fe80 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff8238ff00 T smu_v11_0_set_driver_table_location +ffffffff8238ff70 T smu_v11_0_set_tool_table_location +ffffffff8238ffe0 T smu_v11_0_init_display_count +ffffffff82390040 T smu_v11_0_set_allowed_mask +ffffffff82390110 T smu_v11_0_system_features_control +ffffffff82390130 T smu_v11_0_notify_display_change +ffffffff823901a0 T smu_v11_0_init_max_sustainable_clocks +ffffffff82390400 t smu_v11_0_get_max_sustainable_clock +ffffffff82390520 T smu_v11_0_get_current_power_limit +ffffffff823905f0 T smu_v11_0_set_power_limit +ffffffff82390730 T smu_v11_0_interrupt_work +ffffffff823907b0 T smu_v11_0_enable_thermal_alert +ffffffff82390850 T smu_v11_0_disable_thermal_alert +ffffffff82390870 T smu_v11_0_get_gfx_vdd +ffffffff82390930 T smu_v11_0_display_clock_voltage_request +ffffffff82390a80 T smu_v11_0_set_hard_freq_limited_range +ffffffff82390b60 T smu_v11_0_gfx_off_control +ffffffff82390bd0 T smu_v11_0_get_fan_control_mode +ffffffff82390c20 T smu_v11_0_set_fan_speed_pwm +ffffffff82390dd0 t smu_v11_0_set_fan_static_mode +ffffffff82390f90 T smu_v11_0_set_fan_speed_rpm +ffffffff823910d0 T smu_v11_0_get_fan_speed_pwm +ffffffff82391210 T smu_v11_0_get_fan_speed_rpm +ffffffff82391310 T smu_v11_0_set_fan_control_mode +ffffffff823914b0 T smu_v11_0_set_xgmi_pstate +ffffffff823914d0 T smu_v11_0_register_irq_handler +ffffffff82391590 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff82391620 T smu_v11_0_set_azalia_d3_pme +ffffffff82391640 T smu_v11_0_baco_set_armd3_sequence +ffffffff82391660 T smu_v11_0_baco_is_support +ffffffff823916f0 T smu_v11_0_baco_get_state +ffffffff82391720 T smu_v11_0_baco_set_state +ffffffff823919d0 T smu_v11_0_baco_enter +ffffffff82391ac0 T smu_v11_0_baco_exit +ffffffff82391bf0 T smu_v11_0_mode1_reset +ffffffff82391c70 T smu_v11_0_handle_passthrough_sbr +ffffffff82391c90 T smu_v11_0_get_dpm_ultimate_freq +ffffffff82391dd0 T smu_v11_0_set_soft_freq_limited_range +ffffffff82391ea0 T smu_v11_0_set_performance_level +ffffffff823921f0 T smu_v11_0_set_power_source +ffffffff82392250 T smu_v11_0_get_dpm_freq_by_index +ffffffff82392300 T smu_v11_0_get_dpm_level_count +ffffffff823923a0 T smu_v11_0_set_single_dpm_table +ffffffff82392600 T smu_v11_0_get_dpm_level_range +ffffffff82392760 T smu_v11_0_get_current_pcie_link_width_level +ffffffff823927b0 T smu_v11_0_get_current_pcie_link_width +ffffffff82392810 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff82392860 T smu_v11_0_get_current_pcie_link_speed +ffffffff823928c0 T smu_v11_0_gfx_ulv_control +ffffffff82392930 T smu_v11_0_deep_sleep_control +ffffffff82392ae0 T smu_v11_0_restore_user_od_settings +ffffffff82392b70 T smu_v11_0_set_smu_mailbox_registers +ffffffff82392be0 t smu_v11_0_set_irq_state +ffffffff82393190 t smu_v11_0_irq_process +ffffffff82394000 T vangogh_set_ppt_funcs +ffffffff82394040 t vangogh_set_default_dpm_tables +ffffffff82394070 t vangogh_common_print_clk_levels +ffffffff823944e0 t vangogh_force_clk_levels +ffffffff82394710 t vangogh_od_edit_dpm_table +ffffffff82394c40 t vangogh_get_power_profile_mode +ffffffff82394d40 t vangogh_set_power_profile_mode +ffffffff82394e60 t vangogh_dpm_set_vcn_enable +ffffffff82394eb0 t vangogh_dpm_set_jpeg_enable +ffffffff82394f00 t vangogh_read_sensor +ffffffff82395530 t vangogh_get_apu_thermal_limit +ffffffff82395550 t vangogh_set_apu_thermal_limit +ffffffff82395570 t vangogh_is_dpm_running +ffffffff823955d0 t vangogh_set_watermarks_table +ffffffff82395750 t vangogh_set_performance_level +ffffffff82395f60 t vangogh_get_power_limit +ffffffff823960c0 t vangogh_get_ppt_limit +ffffffff82396130 t vangogh_get_dpm_clock_table +ffffffff823962a0 t vangogh_init_smc_tables +ffffffff823964e0 t vangogh_system_features_control +ffffffff82396530 t vangogh_set_power_limit +ffffffff82396680 t vangogh_get_gfxoff_status +ffffffff82396710 t vangogh_get_gfxoff_entrycount +ffffffff82396780 t vangogh_set_gfxoff_residency +ffffffff823967f0 t vangogh_get_gfxoff_residency +ffffffff82396830 t vangogh_mode2_reset +ffffffff82396970 t vangogh_common_get_gpu_metrics +ffffffff823970f0 t vangogh_post_smu_init +ffffffff82397280 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff823972f0 t vangogh_force_dpm_limit_value +ffffffff82397420 t vangogh_get_dpm_ultimate_freq +ffffffff823977e0 t vangogh_set_soft_freq_limited_range +ffffffff82397960 t vangogh_get_gpu_metrics_v2_3 +ffffffff82398000 T renoir_set_ppt_funcs +ffffffff823980a0 t renoir_get_current_power_state +ffffffff82398120 t renoir_print_clk_levels +ffffffff82398530 t renoir_force_clk_levels +ffffffff82398750 t renoir_od_edit_dpm_table +ffffffff82398a30 t renoir_get_power_profile_mode +ffffffff82398b00 t renoir_set_power_profile_mode +ffffffff82398c20 t renoir_dpm_set_vcn_enable +ffffffff82398ca0 t renoir_dpm_set_jpeg_enable +ffffffff82398d20 t renoir_read_sensor +ffffffff823990d0 t renoir_is_dpm_running +ffffffff82399110 t renoir_set_watermarks_table +ffffffff823992b0 t renoir_set_performance_level +ffffffff823997d0 t renoir_get_dpm_clock_table +ffffffff82399b20 t renoir_init_smc_tables +ffffffff82399c90 t renoir_get_enabled_mask +ffffffff82399cd0 t renoir_get_dpm_ultimate_freq +ffffffff82399f70 t renoir_get_gpu_metrics +ffffffff8239a190 t renoir_gfx_state_change_set +ffffffff8239a1c0 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff8239a260 t renoir_force_dpm_limit_value +ffffffff8239b000 T smu_v12_0_check_fw_status +ffffffff8239b050 T smu_v12_0_check_fw_version +ffffffff8239b0c0 T smu_v12_0_powergate_sdma +ffffffff8239b110 T smu_v12_0_set_gfx_cgpg +ffffffff8239b170 T smu_v12_0_get_gfxoff_status +ffffffff8239b200 T smu_v12_0_gfx_off_control +ffffffff8239b320 T smu_v12_0_fini_smc_tables +ffffffff8239b3d0 T smu_v12_0_set_default_dpm_tables +ffffffff8239b400 T smu_v12_0_mode2_reset +ffffffff8239b420 T smu_v12_0_set_soft_freq_limited_range +ffffffff8239b560 T smu_v12_0_set_driver_table_location +ffffffff8239b5d0 T smu_v12_0_get_vbios_bootup_values +ffffffff8239c000 T aldebaran_set_ppt_funcs +ffffffff8239c050 t aldebaran_get_allowed_feature_mask +ffffffff8239c0a0 t aldebaran_set_default_dpm_table +ffffffff8239c2a0 t aldebaran_populate_umd_state_clk +ffffffff8239c3a0 t aldebaran_print_clk_levels +ffffffff8239c560 t aldebaran_force_clk_levels +ffffffff8239c720 t aldebaran_usr_edit_dpm_table +ffffffff8239c940 t aldebaran_read_sensor +ffffffff8239cb60 t aldebaran_is_dpm_running +ffffffff8239cbb0 t aldebaran_get_thermal_temperature_range +ffffffff8239cc80 t aldebaran_set_performance_level +ffffffff8239cd30 t aldebaran_get_power_limit +ffffffff8239cec0 t aldebaran_set_df_cstate +ffffffff8239cf40 t aldebaran_allow_xgmi_power_down +ffffffff8239cfe0 t aldebaran_i2c_control_init +ffffffff8239d0a0 t aldebaran_i2c_control_fini +ffffffff8239d0e0 t aldebaran_get_unique_id +ffffffff8239d1c0 t aldebaran_init_smc_tables +ffffffff8239d380 t aldebaran_set_mp1_state +ffffffff8239d3c0 t aldebaran_setup_pptable +ffffffff8239d490 t aldebaran_system_features_control +ffffffff8239d5f0 t aldebaran_set_power_limit +ffffffff8239d680 t aldebaran_is_baco_supported +ffffffff8239d6b0 t aldebaran_is_mode1_reset_supported +ffffffff8239d6e0 t aldebaran_is_mode2_reset_supported +ffffffff8239d710 t aldebaran_mode1_reset +ffffffff8239d7f0 t aldebaran_mode2_reset +ffffffff8239db10 t aldebaran_set_soft_freq_limited_range +ffffffff8239dd10 t aldebaran_log_thermal_throttling_event +ffffffff8239e020 t aldebaran_get_gpu_metrics +ffffffff8239e2a0 t aldebaran_smu_handle_passthrough_sbr +ffffffff8239e2c0 t aldebaran_smu_send_hbm_bad_page_num +ffffffff8239e340 t aldebaran_get_ecc_info +ffffffff8239e4a0 t aldebaran_send_hbm_bad_channel_flag +ffffffff8239e570 t aldebaran_get_current_clk_freq_by_table +ffffffff8239e6b0 t aldebaran_get_smu_metrics_data +ffffffff8239e920 t aldebaran_upload_dpm_level +ffffffff8239ea10 t aldebaran_i2c_xfer +ffffffff8239ecb0 t aldebaran_i2c_func +ffffffff8239f000 T smu_v13_0_init_microcode +ffffffff8239f120 T smu_v13_0_fini_microcode +ffffffff8239f170 T smu_v13_0_load_microcode +ffffffff8239f1a0 T smu_v13_0_init_pptable_microcode +ffffffff8239f350 T smu_v13_0_get_pptable_from_firmware +ffffffff8239f470 T smu_v13_0_check_fw_status +ffffffff8239f4e0 T smu_v13_0_check_fw_version +ffffffff8239f560 T smu_v13_0_setup_pptable +ffffffff8239f6f0 T smu_v13_0_init_smc_tables +ffffffff8239f870 T smu_v13_0_fini_smc_tables +ffffffff8239fa80 T smu_v13_0_init_power +ffffffff8239fb00 T smu_v13_0_fini_power +ffffffff8239fb80 T smu_v13_0_get_vbios_bootup_values +ffffffff8239fe20 T smu_v13_0_notify_memory_pool_location +ffffffff8239fee0 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff8239ff60 T smu_v13_0_set_driver_table_location +ffffffff8239ffd0 T smu_v13_0_set_tool_table_location +ffffffff823a0040 T smu_v13_0_init_display_count +ffffffff823a0080 T smu_v13_0_set_allowed_mask +ffffffff823a0150 T smu_v13_0_gfx_off_control +ffffffff823a01d0 T smu_v13_0_system_features_control +ffffffff823a01f0 T smu_v13_0_notify_display_change +ffffffff823a0250 T smu_v13_0_init_max_sustainable_clocks +ffffffff823a04b0 t smu_v13_0_get_max_sustainable_clock +ffffffff823a05d0 T smu_v13_0_get_current_power_limit +ffffffff823a06a0 T smu_v13_0_set_power_limit +ffffffff823a07b0 T smu_v13_0_enable_thermal_alert +ffffffff823a0840 T smu_v13_0_disable_thermal_alert +ffffffff823a0880 T smu_v13_0_get_gfx_vdd +ffffffff823a0940 T smu_v13_0_display_clock_voltage_request +ffffffff823a0a90 T smu_v13_0_set_hard_freq_limited_range +ffffffff823a0b70 T smu_v13_0_get_fan_control_mode +ffffffff823a0bc0 T smu_v13_0_set_fan_speed_pwm +ffffffff823a0de0 t smu_v13_0_set_fan_static_mode +ffffffff823a0fb0 T smu_v13_0_set_fan_control_mode +ffffffff823a1110 T smu_v13_0_set_fan_speed_rpm +ffffffff823a12c0 T smu_v13_0_set_xgmi_pstate +ffffffff823a12e0 T smu_v13_0_register_irq_handler +ffffffff823a13b0 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff823a1440 T smu_v13_0_set_azalia_d3_pme +ffffffff823a1460 T smu_v13_0_wait_for_event +ffffffff823a14b0 T smu_v13_0_get_dpm_ultimate_freq +ffffffff823a1610 T smu_v13_0_set_soft_freq_limited_range +ffffffff823a16e0 T smu_v13_0_set_performance_level +ffffffff823a1e40 T smu_v13_0_set_power_source +ffffffff823a1ea0 T smu_v13_0_get_dpm_freq_by_index +ffffffff823a1f50 T smu_v13_0_set_single_dpm_table +ffffffff823a2240 T smu_v13_0_get_current_pcie_link_width_level +ffffffff823a2290 T smu_v13_0_get_current_pcie_link_width +ffffffff823a22f0 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff823a2340 T smu_v13_0_get_current_pcie_link_speed +ffffffff823a2390 T smu_v13_0_set_vcn_enable +ffffffff823a2450 T smu_v13_0_set_jpeg_enable +ffffffff823a2470 T smu_v13_0_run_btc +ffffffff823a24f0 T smu_v13_0_gpo_control +ffffffff823a2580 T smu_v13_0_deep_sleep_control +ffffffff823a27e0 T smu_v13_0_gfx_ulv_control +ffffffff823a2850 T smu_v13_0_baco_set_armd3_sequence +ffffffff823a28c0 T smu_v13_0_baco_is_support +ffffffff823a2950 T smu_v13_0_baco_get_state +ffffffff823a2980 T smu_v13_0_baco_set_state +ffffffff823a2a50 T smu_v13_0_baco_enter +ffffffff823a2b70 T smu_v13_0_baco_exit +ffffffff823a2c10 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff823a2c50 T smu_v13_0_od_edit_dpm_table +ffffffff823a2f00 T smu_v13_0_set_default_dpm_tables +ffffffff823a2f30 T smu_v13_0_set_smu_mailbox_registers +ffffffff823a2fa0 T smu_v13_0_mode1_reset +ffffffff823a3020 T smu_v13_0_update_pcie_parameters +ffffffff823a3290 t smu_v13_0_set_irq_state +ffffffff823a3840 t smu_v13_0_irq_process +ffffffff823a4000 T smu_v13_0_0_set_ppt_funcs +ffffffff823a40f0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff823a4230 t smu_v13_0_0_set_default_dpm_table +ffffffff823a4650 t smu_v13_0_0_populate_umd_state_clk +ffffffff823a4790 t smu_v13_0_0_print_clk_levels +ffffffff823a48a0 t smu_v13_0_0_force_clk_levels +ffffffff823a4a20 t smu_v13_0_0_od_edit_dpm_table +ffffffff823a4ef0 t smu_v13_0_0_restore_user_od_settings +ffffffff823a4fb0 t smu_v13_0_0_get_power_profile_mode +ffffffff823a50b0 t smu_v13_0_0_set_power_profile_mode +ffffffff823a5300 t smu_v13_0_0_read_sensor +ffffffff823a5520 t smu_v13_0_0_is_dpm_running +ffffffff823a5570 t smu_v13_0_0_get_fan_speed_pwm +ffffffff823a5650 t smu_v13_0_0_get_fan_speed_rpm +ffffffff823a56c0 t smu_v13_0_0_get_thermal_temperature_range +ffffffff823a57c0 t smu_v13_0_0_set_default_od_settings +ffffffff823a58f0 t smu_v13_0_0_dump_pptable +ffffffff823a5920 t smu_v13_0_0_get_power_limit +ffffffff823a5a00 t smu_v13_0_0_set_df_cstate +ffffffff823a5a20 t smu_v13_0_0_i2c_control_init +ffffffff823a5b50 t smu_v13_0_0_i2c_control_fini +ffffffff823a5b90 t smu_v13_0_0_get_unique_id +ffffffff823a5c30 t smu_v13_0_0_init_smc_tables +ffffffff823a5e80 t smu_v13_0_0_set_mp1_state +ffffffff823a5ec0 t smu_v13_0_0_setup_pptable +ffffffff823a6020 t smu_v13_0_0_system_features_control +ffffffff823a6030 t smu_v13_0_0_baco_enter +ffffffff823a6090 t smu_v13_0_0_baco_exit +ffffffff823a60f0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff823a6150 t smu_v13_0_0_mode1_reset +ffffffff823a6270 t smu_v13_0_0_mode2_reset +ffffffff823a62c0 t smu_v13_0_0_enable_gfx_features +ffffffff823a6310 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff823a6430 t smu_v13_0_0_get_gpu_metrics +ffffffff823a6870 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff823a68c0 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff823a6940 t smu_v13_0_0_get_ecc_info +ffffffff823a6a40 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff823a6ac0 t smu_v13_0_0_i2c_xfer +ffffffff823a6d60 t smu_v13_0_0_i2c_func +ffffffff823a7000 T smu_v13_0_4_set_ppt_funcs +ffffffff823a70c0 t smu_v13_0_4_print_clk_levels +ffffffff823a7130 t smu_v13_0_4_force_clk_levels +ffffffff823a73f0 t smu_v13_0_4_read_sensor +ffffffff823a76d0 t smu_v13_0_4_is_dpm_running +ffffffff823a7720 t smu_v13_0_4_set_watermarks_table +ffffffff823a78a0 t smu_v13_0_4_set_performance_level +ffffffff823a8450 t smu_v13_0_4_init_smc_tables +ffffffff823a85c0 t smu_v13_0_4_fini_smc_tables +ffffffff823a8670 t smu_v13_0_4_system_features_control +ffffffff823a86c0 t smu_v13_0_4_mode2_reset +ffffffff823a86e0 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff823a8b00 t smu_v13_0_4_get_gpu_metrics +ffffffff823a8cd0 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff823a8d30 t smu_v13_0_4_get_current_clk_freq +ffffffff823a9000 T smu_v13_0_5_set_ppt_funcs +ffffffff823a90a0 t smu_v13_0_5_set_default_dpm_tables +ffffffff823a90d0 t smu_v13_0_5_print_clk_levels +ffffffff823a9160 t smu_v13_0_5_force_clk_levels +ffffffff823a92d0 t smu_v13_0_5_od_edit_dpm_table +ffffffff823a9580 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff823a95a0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff823a95c0 t smu_v13_0_5_read_sensor +ffffffff823a97e0 t smu_v13_0_5_is_dpm_running +ffffffff823a9830 t smu_v13_0_5_set_watermarks_table +ffffffff823a99b0 t smu_v13_0_5_set_performance_level +ffffffff823a9f50 t smu_v13_0_5_init_smc_tables +ffffffff823aa0c0 t smu_v13_0_5_fini_smc_tables +ffffffff823aa170 t smu_v13_0_5_system_features_control +ffffffff823aa1c0 t smu_v13_0_5_mode2_reset +ffffffff823aa240 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff823aa680 t smu_v13_0_5_get_gpu_metrics +ffffffff823aa7d0 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff823ab000 T smu_v13_0_6_set_ppt_funcs +ffffffff823ab050 t smu_v13_0_6_get_allowed_feature_mask +ffffffff823ab0a0 t smu_v13_0_6_set_default_dpm_table +ffffffff823ab5a0 t smu_v13_0_6_populate_umd_state_clk +ffffffff823ab6a0 t smu_v13_0_6_print_clk_levels +ffffffff823aba10 t smu_v13_0_6_force_clk_levels +ffffffff823abbd0 t smu_v13_0_6_usr_edit_dpm_table +ffffffff823abdf0 t smu_v13_0_6_read_sensor +ffffffff823ac380 t smu_v13_0_6_is_dpm_running +ffffffff823ac400 t smu_v13_0_6_get_thermal_temperature_range +ffffffff823ac550 t smu_v13_0_6_set_performance_level +ffffffff823ac660 t smu_v13_0_6_get_power_limit +ffffffff823ac730 t smu_v13_0_6_set_df_cstate +ffffffff823ac750 t smu_v13_0_6_allow_xgmi_power_down +ffffffff823ac770 t smu_v13_0_6_i2c_control_init +ffffffff823ac8a0 t smu_v13_0_6_i2c_control_fini +ffffffff823ac8e0 t smu_v13_0_6_get_unique_id +ffffffff823ac960 t smu_v13_0_6_init_smc_tables +ffffffff823acaf0 t smu_v13_0_6_check_fw_status +ffffffff823acb40 t smu_v13_0_6_setup_pptable +ffffffff823acb70 t smu_v13_0_6_system_features_control +ffffffff823acc10 t smu_v13_0_6_get_enabled_mask +ffffffff823acc80 t smu_v13_0_6_set_power_limit +ffffffff823acca0 t smu_v13_0_6_register_irq_handler +ffffffff823acd00 t smu_v13_0_6_is_baco_supported +ffffffff823acd30 t smu_v13_0_6_is_mode1_reset_supported +ffffffff823acd60 t smu_v13_0_6_is_mode2_reset_supported +ffffffff823acd90 t smu_v13_0_6_mode1_reset +ffffffff823ace40 t smu_v13_0_6_mode2_reset +ffffffff823ad0f0 t smu_v13_0_6_get_dpm_ultimate_freq +ffffffff823ad300 t smu_v13_0_6_set_soft_freq_limited_range +ffffffff823ad530 t smu_v13_0_6_log_thermal_throttling_event +ffffffff823ad820 t smu_v13_0_6_get_gpu_metrics +ffffffff823adb70 t smu_v13_0_6_smu_send_hbm_bad_page_num +ffffffff823adbf0 t smu_v13_0_6_get_smu_metrics_data +ffffffff823ade80 t smu_v13_0_6_upload_dpm_level +ffffffff823adf80 t smu_v13_0_6_i2c_xfer +ffffffff823ae280 t smu_v13_0_6_i2c_func +ffffffff823ae2b0 t smu_v13_0_6_set_irq_state +ffffffff823ae540 t smu_v13_0_6_irq_process +ffffffff823af000 T smu_v13_0_7_set_ppt_funcs +ffffffff823af060 t smu_v13_0_7_get_allowed_feature_mask +ffffffff823af1d0 t smu_v13_0_7_set_default_dpm_table +ffffffff823af5f0 t smu_v13_0_7_populate_umd_state_clk +ffffffff823af730 t smu_v13_0_7_print_clk_levels +ffffffff823af840 t smu_v13_0_7_force_clk_levels +ffffffff823af9c0 t smu_v13_0_7_od_edit_dpm_table +ffffffff823afe90 t smu_v13_0_7_restore_user_od_settings +ffffffff823aff50 t smu_v13_0_7_get_power_profile_mode +ffffffff823b0090 t smu_v13_0_7_set_power_profile_mode +ffffffff823b02d0 t smu_v13_0_7_read_sensor +ffffffff823b04e0 t smu_v13_0_7_is_dpm_running +ffffffff823b0530 t smu_v13_0_7_get_fan_speed_pwm +ffffffff823b0610 t smu_v13_0_7_get_fan_speed_rpm +ffffffff823b0680 t smu_v13_0_7_get_thermal_temperature_range +ffffffff823b0780 t smu_v13_0_7_set_default_od_settings +ffffffff823b08b0 t smu_v13_0_7_dump_pptable +ffffffff823b08e0 t smu_v13_0_7_get_power_limit +ffffffff823b09c0 t smu_v13_0_7_set_df_cstate +ffffffff823b09e0 t smu_v13_0_7_init_smc_tables +ffffffff823b0bd0 t smu_v13_0_7_check_fw_status +ffffffff823b0c20 t smu_v13_0_7_set_mp1_state +ffffffff823b0c60 t smu_v13_0_7_setup_pptable +ffffffff823b0dc0 t smu_v13_0_7_baco_enter +ffffffff823b0e20 t smu_v13_0_7_baco_exit +ffffffff823b0e80 t smu_v13_0_7_is_mode1_reset_supported +ffffffff823b0ec0 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff823b0fe0 t smu_v13_0_7_get_gpu_metrics +ffffffff823b1410 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff823b2000 T yellow_carp_set_ppt_funcs +ffffffff823b2050 t yellow_carp_set_default_dpm_tables +ffffffff823b2080 t yellow_carp_print_clk_levels +ffffffff823b2100 t yellow_carp_force_clk_levels +ffffffff823b23c0 t yellow_carp_od_edit_dpm_table +ffffffff823b2670 t yellow_carp_dpm_set_vcn_enable +ffffffff823b2690 t yellow_carp_dpm_set_jpeg_enable +ffffffff823b26b0 t yellow_carp_read_sensor +ffffffff823b2a20 t yellow_carp_is_dpm_running +ffffffff823b2a70 t yellow_carp_set_watermarks_table +ffffffff823b2bf0 t yellow_carp_set_performance_level +ffffffff823b3680 t yellow_carp_init_smc_tables +ffffffff823b37f0 t yellow_carp_fini_smc_tables +ffffffff823b38a0 t yellow_carp_system_features_control +ffffffff823b38f0 t yellow_carp_get_gfxoff_status +ffffffff823b3980 t yellow_carp_mode2_reset +ffffffff823b3a00 t yellow_carp_get_dpm_ultimate_freq +ffffffff823b3e40 t yellow_carp_get_gpu_metrics +ffffffff823b3ff0 t yellow_carp_post_smu_init +ffffffff823b4070 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff823b40d0 t yellow_carp_get_current_clk_freq +ffffffff823b41d0 t yellow_carp_get_dpm_profile_freq +ffffffff823b5000 T smu_cmn_send_msg_without_waiting +ffffffff823b5170 T smu_cmn_wait_for_response +ffffffff823b52a0 T smu_cmn_send_smc_msg_with_param +ffffffff823b55b0 T smu_cmn_to_asic_specific_index +ffffffff823b56e0 t __smu_cmn_reg_print_error +ffffffff823b5920 T smu_cmn_send_smc_msg +ffffffff823b5940 T smu_cmn_send_debug_smc_msg +ffffffff823b59c0 T smu_cmn_send_debug_smc_msg_with_param +ffffffff823b5a40 T smu_cmn_feature_is_supported +ffffffff823b5af0 T smu_cmn_feature_is_enabled +ffffffff823b5be0 T smu_cmn_clk_dpm_is_enabled +ffffffff823b5ce0 T smu_cmn_get_enabled_mask +ffffffff823b5dd0 T smu_cmn_get_indep_throttler_status +ffffffff823b5e80 T smu_cmn_feature_update_enable_state +ffffffff823b5f20 T smu_cmn_feature_set_enabled +ffffffff823b5ff0 T smu_cmn_get_pp_feature_mask +ffffffff823b61a0 T smu_cmn_set_pp_feature_mask +ffffffff823b62a0 T smu_cmn_disable_all_features_with_exception +ffffffff823b6350 T smu_cmn_get_smc_version +ffffffff823b6420 T smu_cmn_update_table +ffffffff823b6580 T smu_cmn_write_watermarks_table +ffffffff823b6650 T smu_cmn_write_pptable +ffffffff823b6710 T smu_cmn_get_metrics_table +ffffffff823b6870 T smu_cmn_get_combo_pptable +ffffffff823b6940 T smu_cmn_init_soft_gpu_metrics +ffffffff823b6a30 T smu_cmn_set_mp1_state +ffffffff823b6ad0 T smu_cmn_is_audio_func_enabled +ffffffff823b7000 T pci_mcfg_init +ffffffff823b7050 T pci_lookup_segment +ffffffff823b70b0 T pci_attach_hook +ffffffff823b70e0 T pci_bus_maxdevs +ffffffff823b7110 T pci_make_tag +ffffffff823b7180 T pci_decompose_tag +ffffffff823b71e0 T pci_conf_size +ffffffff823b7240 T pci_mcfg_map_bus +ffffffff823b72c0 T pci_conf_read +ffffffff823b7410 T pci_conf_write +ffffffff823b7550 T pci_msix_table_map +ffffffff823b7680 T pci_msix_table_unmap +ffffffff823b7720 T msi_hwmask +ffffffff823b7750 T msi_hwunmask +ffffffff823b7780 T msi_addroute +ffffffff823b7890 T msi_delroute +ffffffff823b7910 T msi_allocidtvec +ffffffff823b7a60 T pci_intr_enable_msivec +ffffffff823b7b40 T pci_intr_map_msi +ffffffff823b7bf0 T pci_intr_map_msivec +ffffffff823b7ca0 T msix_hwmask +ffffffff823b7cd0 T msix_hwunmask +ffffffff823b7d00 T msix_addroute +ffffffff823b7ef0 T msix_delroute +ffffffff823b8050 T pci_intr_map_msix +ffffffff823b8120 T pci_intr_map +ffffffff823b8350 T pci_intr_string +ffffffff823b8430 T pci_intr_establish +ffffffff823b8480 T pci_intr_establish_cpu +ffffffff823b85d0 T pci_intr_disestablish +ffffffff823b85f0 T pci_init_extents +ffffffff823b87d0 T pci_probe_device_hook +ffffffff823b8810 T pci_dev_postattach +ffffffff823b8820 T pci_min_powerstate +ffffffff823b8830 T pci_set_powerstate_md +ffffffff823b9000 T pciide_machdep_compat_intr_establish +ffffffff823b9060 T pciide_machdep_compat_intr_disestablish +ffffffff823ba000 T vga_post_init +ffffffff823ba310 t vm86_emu_inb +ffffffff823ba360 t vm86_emu_inw +ffffffff823ba3a0 t vm86_emu_inl +ffffffff823ba3e0 t vm86_emu_outb +ffffffff823ba430 t vm86_emu_outw +ffffffff823ba470 t vm86_emu_outl +ffffffff823ba4b0 T vga_post_call +ffffffff823ba520 T vga_post_free +ffffffff823ba590 T ddb_vgapost +ffffffff823bb000 T pchbmatch +ffffffff823bb040 T pchbattach +ffffffff823bb4a0 T pchbactivate +ffffffff823bb510 T pchb_amd64ht_attach +ffffffff823bb660 T pchb_rnd +ffffffff823bb6e0 T pchb_print +ffffffff823bc000 T amas_match +ffffffff823bc050 T amas_attach +ffffffff823bc0b0 T amas_intl_nodes +ffffffff823bc140 T amas_get_pagerange +ffffffff823bd000 T agp_flush_cache +ffffffff823bd030 T agp_flush_cache_range +ffffffff823bd040 T agp_init_map +ffffffff823bd110 T agp_destroy_map +ffffffff823bd150 T agp_map_subregion +ffffffff823bd180 T agp_unmap_subregion +ffffffff823bd1b0 T agp_map_atomic +ffffffff823bd1e0 T agp_unmap_atomic +ffffffff823be000 T cardslotmatch +ffffffff823be050 T cardslotattach +ffffffff823be2a0 T cardslot_event +ffffffff823be300 T cardslot_cb_print +ffffffff823be350 T cardslot_16_print +ffffffff823be3a0 T cardslot_16_submatch +ffffffff823be3f0 T cardslot_event_throw +ffffffff823be490 T cardslot_process_event +ffffffff823bf000 T cardbusmatch +ffffffff823bf050 T cardbusattach +ffffffff823bf130 T cardbus_read_tuples +ffffffff823bf4e0 T parse_tuple +ffffffff823bf750 T cardbus_attach_card +ffffffff823bfed0 T enable_function +ffffffff823bff70 T decode_tuples +ffffffff823c0050 T cardbusprint +ffffffff823c0140 T cardbussubmatch +ffffffff823c01a0 T disable_function +ffffffff823c0200 T cardbus_detach_card +ffffffff823c02e0 T cardbus_intr_establish +ffffffff823c0310 T cardbus_intr_disestablish +ffffffff823c0330 T cardbus_function_enable +ffffffff823c0410 T cardbus_function_disable +ffffffff823c0470 T cardbus_matchbyid +ffffffff823c04e0 T decode_tuple +ffffffff823c1000 T cardbus_mapreg_map +ffffffff823c11a0 T cardbus_mapreg_unmap +ffffffff823c2000 T cardbus_read_exrom +ffffffff823c3000 T rbus_space_alloc +ffffffff823c3060 T rbus_space_alloc_subregion +ffffffff823c3230 T rbus_space_free +ffffffff823c32c0 T rbus_new_body +ffffffff823c3350 T rbus_new_root_delegate +ffffffff823c3420 T rbus_new_root_share +ffffffff823c4000 T com_cardbus_match +ffffffff823c4070 T com_cardbus_attach +ffffffff823c4220 T com_cardbus_detach +ffffffff823c42c0 T com_cardbus_find_csdev +ffffffff823c4440 T com_cardbus_gofigure +ffffffff823c4900 T com_cardbus_enable +ffffffff823c49d0 T com_cardbus_disable +ffffffff823c4a20 T com_cardbus_setup +ffffffff823c5000 T xl_cardbus_match +ffffffff823c5080 T xl_cardbus_attach +ffffffff823c53f0 T xl_cardbus_detach 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ohci_cardbus_match +ffffffff823d2040 T ohci_cardbus_attach +ffffffff823d22e0 T ohci_cardbus_detach +ffffffff823d3000 T uhci_cardbus_match +ffffffff823d3040 T uhci_cardbus_attach +ffffffff823d3340 T uhci_cardbus_detach +ffffffff823d4000 T malo_cardbus_match +ffffffff823d4030 T malo_cardbus_attach +ffffffff823d4270 T malo_cardbus_detach +ffffffff823d4340 T malo_cardbus_enable +ffffffff823d44b0 T malo_cardbus_disable +ffffffff823d4500 T malo_cardbus_setup +ffffffff823d5000 T bwi_cardbus_match +ffffffff823d5030 T bwi_cardbus_attach +ffffffff823d52a0 T bwi_cardbus_detach +ffffffff823d5350 T bwi_cardbus_enable +ffffffff823d54b0 T bwi_cardbus_disable +ffffffff823d5500 T bwi_cardbus_setup +ffffffff823d55a0 T bwi_cardbus_conf_read +ffffffff823d55d0 T bwi_cardbus_conf_write +ffffffff823d6000 T rbus_pccbb_parent_mem +ffffffff823d6060 T rbus_pccbb_parent_io +ffffffff823d60d0 T pccbb_attach_hook +ffffffff823d7000 T pcmcia_match +ffffffff823d7050 T pcmcia_attach +ffffffff823d70d0 T pcmcia_activate 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ep_pcmcia_activate +ffffffff823de6a0 T ep_pcmcia_lookup +ffffffff823de7b0 T ep_pcmcia_enable1 +ffffffff823de860 T ep_pcmcia_get_enaddr +ffffffff823df000 T ne_pcmcia_match +ffffffff823df140 T ne_pcmcia_attach +ffffffff823df760 T ne_pcmcia_detach +ffffffff823df820 T ne_pcmcia_activate +ffffffff823df910 T ne_pcmcia_get_enaddr +ffffffff823dfaf0 T ne_pcmcia_dl10019_get_enaddr +ffffffff823dfd30 T ne_pcmcia_ax88190_set_iobase +ffffffff823e0000 T aic_pcmcia_match +ffffffff823e00b0 T aic_pcmcia_attach +ffffffff823e02b0 T aic_pcmcia_detach +ffffffff823e1000 T com_pcmcia_match +ffffffff823e1220 T com_pcmcia_attach +ffffffff823e1500 T com_pcmcia_detach +ffffffff823e15a0 T com_pcmcia_activate +ffffffff823e1660 T com_pcmcia_enable1 +ffffffff823e1710 T com_pcmcia_enable +ffffffff823e1800 T com_pcmcia_disable +ffffffff823e1840 T com_pcmcia_disable1 +ffffffff823e2000 t wdc_pcmcia_match +ffffffff823e20d0 t wdc_pcmcia_attach +ffffffff823e2540 T wdc_pcmcia_detach +ffffffff823e2640 T wdc_pcmcia_activate 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wsemul_vt100_cnattach +ffffffff82429200 T wsemul_vt100_attach +ffffffff824294d0 T wsemul_vt100_output +ffffffff824297e0 T wsemul_vt100_detach +ffffffff82429910 T wsemul_vt100_resetop +ffffffff82429ac0 T wsemul_vt100_output_esc +ffffffff8242a140 T wsemul_vt100_output_csi +ffffffff8242a280 T wsemul_vt100_output_scs94 +ffffffff8242a340 T wsemul_vt100_output_scs94_percent +ffffffff8242a390 T wsemul_vt100_output_scs96 +ffffffff8242a4e0 T wsemul_vt100_output_scs96_percent +ffffffff8242a530 T wsemul_vt100_output_esc_hash +ffffffff8242a860 T wsemul_vt100_output_esc_spc +ffffffff8242a890 T wsemul_vt100_output_string +ffffffff8242a900 T wsemul_vt100_output_string_esc +ffffffff8242a950 T wsemul_vt100_output_dcs +ffffffff8242aa00 T wsemul_vt100_output_dcs_dollar +ffffffff8242aa60 T wsemul_vt100_output_esc_percent +ffffffff8242aac0 T wsemul_vt100_init +ffffffff8242ab20 T wsemul_vt100_reset +ffffffff8242ac40 T wsemul_vt100_nextline +ffffffff8242acd0 T wsemul_vt100_output_normal +ffffffff8242af10 T wsemul_vt100_output_c0c1 +ffffffff8242b190 T wsemul_vt100_jump_scroll +ffffffff8242c000 T wsemul_vt100_scrollup +ffffffff8242c150 T wsemul_vt100_scrolldown +ffffffff8242c290 T wsemul_vt100_ed +ffffffff8242c4f0 T wsemul_vt100_el +ffffffff8242c5e0 T wsemul_vt100_handle_csi +ffffffff8242d570 T vt100_ansimode +ffffffff8242d5f0 T vt100_decmode +ffffffff8242d720 T vt100_selectattribute +ffffffff8242d860 T wsemul_vt100_handle_dcs +ffffffff8242e000 T vt100_initchartables +ffffffff8242e120 T vt100_setnrc +ffffffff8242f000 T wsemul_vt100_translate +ffffffff82430000 T pckbdprobe +ffffffff82430140 T pckbdattach +ffffffff82430320 T pckbdactivate +ffffffff824303b0 T pckbd_enable +ffffffff82430500 T pckbd_set_leds +ffffffff82430590 T pckbd_ioctl +ffffffff824306e0 T pckbd_cngetc +ffffffff824308c0 T pckbd_cnpollc +ffffffff82430960 T pckbd_cnbell +ffffffff824309b0 T pckbd_set_xtscancode +ffffffff82430b30 T pckbd_init +ffffffff82430b90 T pckbd_input +ffffffff82430e00 T pckbd_scancode_translate +ffffffff82430ee0 T pckbd_bell +ffffffff82430f30 T pckbd_hookup_bell +ffffffff82430f70 T pckbd_cnattach +ffffffff82432000 T pmsprobe +ffffffff824320b0 T pmsattach +ffffffff82432290 T pmsactivate +ffffffff824322f0 T pms_enable +ffffffff82432360 T pms_ioctl +ffffffff824323b0 T pms_disable +ffffffff824323f0 T pms_sec_enable +ffffffff82432460 T pms_sec_ioctl +ffffffff824324b0 T pms_sec_disable +ffffffff824324f0 T pms_ioctl_mouse +ffffffff82432610 T pms_sync_mouse +ffffffff82432670 T pms_proc_mouse +ffffffff82432710 T pms_enable_synaptics +ffffffff82432b40 T pms_ioctl_synaptics +ffffffff82432c10 T pms_sync_synaptics +ffffffff82432c70 T pms_proc_synaptics +ffffffff82432ff0 T pms_disable_synaptics +ffffffff824330d0 T pms_enable_alps +ffffffff824335f0 T pms_ioctl_alps +ffffffff824336a0 T pms_sync_alps +ffffffff82433750 T pms_proc_alps +ffffffff824339a0 T pms_enable_elantech_v1 +ffffffff82433bb0 T pms_ioctl_elantech +ffffffff82433c70 T pms_sync_elantech_v1 +ffffffff82433d50 T pms_proc_elantech_v1 +ffffffff82433ec0 T pms_enable_elantech_v2 +ffffffff82434060 T pms_sync_elantech_v2 +ffffffff82434150 T pms_proc_elantech_v2 +ffffffff824342c0 T pms_enable_elantech_v3 +ffffffff82434460 T pms_sync_elantech_v3 +ffffffff824344f0 T pms_proc_elantech_v3 +ffffffff824346e0 T pms_enable_elantech_v4 +ffffffff824348e0 T pms_sync_elantech_v4 +ffffffff824349b0 T pms_proc_elantech_v4 +ffffffff82434d00 T pms_enable_intelli +ffffffff82434ef0 T pms_cmd +ffffffff82434f60 T pms_spec_cmd +ffffffff824351f0 T pms_set_scaling +ffffffff82435280 T pms_set_resolution +ffffffff82435310 T pms_get_devid +ffffffff824353a0 T pms_get_status +ffffffff82435430 T pms_set_rate +ffffffff824354c0 T pms_reset +ffffffff82435550 T pms_dev_enable +ffffffff82435610 T pms_dev_disable +ffffffff824356d0 T pms_protocol_lookup +ffffffff824357d0 T pms_reset_detect +ffffffff82435850 T pms_reset_timo +ffffffff824358a0 T pms_reset_task +ffffffff82435960 T pms_change_state +ffffffff82435cf0 T pmsinput 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usbd_str +ffffffff8244b000 T usbd_get_desc +ffffffff8244b070 T usbd_get_device_status +ffffffff8244b0c0 T usbd_get_hub_descriptor +ffffffff8244b130 T usbd_get_hub_ss_descriptor +ffffffff8244b1a0 T usbd_get_port_status +ffffffff8244b1f0 T usbd_set_hub_depth +ffffffff8244b240 T usbd_clear_port_feature +ffffffff8244b290 T usbd_clear_endpoint_feature +ffffffff8244b2e0 T usbd_set_port_feature +ffffffff8244b330 T usbd_set_idle +ffffffff8244b390 T usbd_get_report_descriptor +ffffffff8244b3e0 T usbd_get_hid_descriptor +ffffffff8244b460 T usbd_get_config +ffffffff8244b4b0 T usb_detach_wait +ffffffff8244b530 T usb_detach_wakeup +ffffffff8244c000 T usb_block_allocmem +ffffffff8244c250 T usb_block_freemem +ffffffff8244c2b0 T usb_allocmem +ffffffff8244c500 T usb_freemem +ffffffff8244c5c0 T usb_syncmem +ffffffff8244d000 T usbd_errstr +ffffffff8244d070 T usbd_get_string_desc +ffffffff8244d130 T usbd_get_string +ffffffff8244d330 T usbd_cache_devinfo +ffffffff8244d670 T usbd_printBCD +ffffffff8244d6f0 T usbd_devinfo +ffffffff8244d880 T usb_delay_ms +ffffffff8244d8e0 T usbd_delay_ms +ffffffff8244d9a0 T usbd_port_disown_to_1_1 +ffffffff8244dac0 T usbd_reset_port +ffffffff8244dc80 T usbd_find_idesc +ffffffff8244dd30 T usbd_find_edesc +ffffffff8244de50 T usbd_fill_iface_data +ffffffff8244e0c0 T usbd_parse_idesc +ffffffff8244e1f0 T usbd_free_iface_data +ffffffff8244e260 T usbd_set_config +ffffffff8244e2b0 T usbd_set_config_no +ffffffff8244e360 T usbd_set_config_index +ffffffff8244e840 T usbd_setup_pipe +ffffffff8244e930 T usbd_set_address +ffffffff8244e9f0 T usbd_getnewaddr +ffffffff8244ea70 T usbd_probe_and_attach +ffffffff8244efd0 T usbd_print +ffffffff8244f0e0 T usbd_new_device +ffffffff8244f8b0 T usbd_reload_device_desc +ffffffff8244f920 T usb_free_device +ffffffff8244fa70 T usbd_fill_deviceinfo +ffffffff8244fe10 T usbd_get_routestring +ffffffff8244fea0 T usbd_get_location +ffffffff8244ffb0 T usbd_get_cdesc +ffffffff824500e0 T usbd_detach +ffffffff82451000 T usbd_find_quirk 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aml_pushscope +ffffffff82584e00 T aml_popscope +ffffffff82584f20 T aml_matchtest +ffffffff82584fa0 T aml_match +ffffffff825851e0 T aml_convert +ffffffff82585810 T aml_compare +ffffffff825858f0 T aml_concat +ffffffff82585c20 T aml_ccrlen +ffffffff82585c70 T aml_concatres +ffffffff82586010 T aml_mid +ffffffff825860e0 T aml_evalhid +ffffffff82586270 T aml_evalname +ffffffff825862c0 T aml_opreg_sysmem_handler +ffffffff82586310 T aml_opreg_sysio_handler +ffffffff82586370 T aml_opreg_pcicfg_handler +ffffffff825863d0 T aml_opreg_ec_handler +ffffffff82586430 T aml_register_regionspace +ffffffff82586520 T aml_evalnode +ffffffff82586680 T aml_rdpciaddr +ffffffff825867f0 T aml_evalinteger +ffffffff82586890 T acpi_genio +ffffffff82586a70 T aml_rwgen +ffffffff82587220 T aml_rwgpio +ffffffff825873d0 T aml_rwgsb +ffffffff825876f0 T aml_rwindexfield +ffffffff82587b70 T aml_rwfield +ffffffff82587ff0 T aml_createfield +ffffffff825880d0 T aml_parsefieldlist +ffffffff82588490 T aml_parse +ffffffff8258b390 T acpi_mutex_acquire +ffffffff8258b430 T acpi_mutex_release +ffffffff8258b4d0 T acpi_event_wait +ffffffff8258b5c0 T acpi_event_signal +ffffffff8258b610 T acpi_event_reset +ffffffff8258b640 T aml_store +ffffffff8258bb20 T aml_gettgt +ffffffff8258bb70 T __aml_searchname +ffffffff8258bcc0 T aml_disprintf +ffffffff8258bd30 T aml_disasm +ffffffff8258ce90 T aml_parsesimple +ffffffff8258d200 T aml_eval +ffffffff8258d670 T aml_seterror +ffffffff8258d7b0 T aml_loadtable +ffffffff8258d9b0 T acpi_parse_aml +ffffffff8258db10 T aml_load +ffffffff8258dc70 T aml_node_setval +ffffffff8258dd10 T aml_searchrel +ffffffff8258dd80 T acpi_getdevlist +ffffffff8258e190 T acpi_freedevlist +ffffffff8258f000 T db_opregion +ffffffff8258f040 T db_aml_dump +ffffffff8258f0c0 T db_aml_showvalue +ffffffff8258f4c0 T db_aml_objtype +ffffffff8258f680 T db_aml_walktree +ffffffff8258f6e0 T db_parse_name +ffffffff8258f830 T db_acpi_showval +ffffffff8258f8c0 T db_disprint +ffffffff8258f930 T db_acpi_disasm +ffffffff8258fa80 T db_acpi_tree +ffffffff8258faa0 T db_acpi_trace +ffffffff82590000 T acpitimermatch +ffffffff82590070 T acpitimerattach +ffffffff82590170 T acpitimer_delay +ffffffff825902d0 T acpitimer_read +ffffffff82590370 T acpi_get_timecount +ffffffff82591000 T acpiac_match +ffffffff82591030 T acpiac_attach +ffffffff82591180 T acpiac_activate +ffffffff82591210 T acpiac_getpsr +ffffffff82591280 T acpiac_notify +ffffffff82591330 T acpiac_refresh +ffffffff82592000 T acpibat_match +ffffffff82592060 T acpibat_attach +ffffffff825921f0 T acpibat_activate +ffffffff82592280 T acpibat_getbix +ffffffff825925a0 T acpibat_getbst +ffffffff825926a0 T acpibat_monitor +ffffffff825929a0 T acpibat_refresh +ffffffff82592e80 T acpibat_notify +ffffffff82593000 T acpibtn_match +ffffffff82593030 T acpibtn_attach +ffffffff82593300 T acpibtn_activate +ffffffff82593380 T acpibtn_numopenlids +ffffffff82593430 T acpibtn_setpsw +ffffffff825934e0 T acpibtn_disable_psw +ffffffff825935d0 T acpibtn_enable_psw +ffffffff825936d0 T acpibtn_notify +ffffffff82594000 T acpicmos_match +ffffffff82594030 T acpicmos_attach +ffffffff82594080 T acpicmos_opreg_handler +ffffffff82595000 T acpicpu_match +ffffffff825950c0 T acpicpu_attach +ffffffff82595590 T acpicpu_set_pdc +ffffffff82595840 T acpicpu_add_cstate +ffffffff82595900 T acpicpu_add_cstatepkg +ffffffff82595c30 t check_mwait_hints +ffffffff82595cc0 T acpicpu_add_cdeppkg +ffffffff82595d80 T acpicpu_getcst +ffffffff82595f50 T acpicpu_getcst_from_fadt +ffffffff82596080 T acpicpu_print_one_cst +ffffffff825961a0 T acpicpu_print_cst +ffffffff82596240 T acpicpu_idle +ffffffff82596520 T acpicpu_getpss +ffffffff82596770 T acpicpu_getppc +ffffffff82596810 T acpicpu_getpct +ffffffff82596970 T acpicpu_notify +ffffffff82596ae0 T acpicpu_setperf +ffffffff82596cc0 T acpicpu_set_notify +ffffffff82596d00 T acpicpu_setperf_ppc_change +ffffffff82596d50 T acpicpu_fetch_pss +ffffffff82597000 T acpihpet_match +ffffffff82597060 T acpihpet_attach +ffffffff82597270 T acpihpet_activate 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domain_map_pthru +ffffffff8259f750 T domain_map_page_intel +ffffffff8259f8d0 T iommu_flush_cache +ffffffff8259f920 T iommu_alloc_page +ffffffff8259f9c0 T pte_lvl +ffffffff8259fae0 T domain_map_page_amd +ffffffff8259fbb0 T domain_unload_map +ffffffff8259fdc0 T dom_bdf +ffffffff8259fe90 T domain_load_map +ffffffff825a00c0 T iommu_enable_translation +ffffffff825a0340 T iommu_flush_tlb +ffffffff825a04c0 T iommu_flush_write_buffer +ffffffff825a0630 T iommu_set_rtaddr +ffffffff825a0760 T iommu_write_8 +ffffffff825a0790 T iommu_write_4 +ffffffff825a07c0 T iommu_read_4 +ffffffff825a07e0 T iommu_alloc_hwdte +ffffffff825a0930 T iommu_issue_qi +ffffffff825a0960 T iommu_flush_tlb_qi +ffffffff825a0990 T iommu_flush_ctx_qi +ffffffff825a09c0 T ivhd_invalidate_domain +ffffffff825a0a20 T iommu_read_8 +ffffffff825a0a40 T iommu_flush_ctx +ffffffff825a0b60 T iommu_enable_qi +ffffffff825a0c80 T iommu_showcfg +ffffffff825a0ea0 T iommu_init +ffffffff825a11e0 T acpidmar_intr_establish +ffffffff825a12f0 T acpidmar_intr +ffffffff825a1480 T acpidmar_match_devscope +ffffffff825a15c0 T domain_create +ffffffff825a1800 t dmar_dmamap_create +ffffffff825a1820 t dmar_dmamap_destroy +ffffffff825a1830 t dmar_dmamap_load +ffffffff825a18a0 t dmar_dmamap_load_mbuf +ffffffff825a1900 t dmar_dmamap_load_uio +ffffffff825a1960 t dmar_dmamap_load_raw +ffffffff825a19d0 t dmar_dmamap_unload +ffffffff825a1a00 t dmar_dmamap_sync +ffffffff825a1a20 t dmar_dmamem_alloc +ffffffff825a1a40 t dmar_dmamem_free +ffffffff825a1a60 t dmar_dmamem_map +ffffffff825a1a80 t dmar_dmamem_unmap +ffffffff825a1aa0 t dmar_dmamem_mmap +ffffffff825a1ac0 T domain_add_device +ffffffff825a1b40 T domain_remove_device +ffffffff825a1bf0 T domain_lookup +ffffffff825a1db0 T _iommu_map +ffffffff825a1e70 T _iommu_domain +ffffffff825a1ed0 T domain_map_device +ffffffff825a21d0 T ivhd_flush_devtab +ffffffff825a2230 T acpidmar_pci_hook +ffffffff825a23f0 T acpidmar_parse_devscope +ffffffff825a2510 T acpidmar_drhd +ffffffff825a26e0 T acpidmar_rmrr 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thinkpad_volume_down +ffffffff825ad310 T thinkpad_volume_up +ffffffff825ad3c0 T thinkpad_get_thinklight +ffffffff825ad410 T thinkpad_adaptive_change +ffffffff825ad530 T thinkpad_get_brightness +ffffffff825ad570 T thinkpad_toggle_wan +ffffffff825ad690 T thinkpad_cmos +ffffffff825ad740 T thinkpad_set_brightness +ffffffff825ad830 T thinkpad_set_thinklight +ffffffff825ad8f0 T thinkpad_battery_inhibit_charge +ffffffff825ada20 T thinkpad_battery_force_discharge +ffffffff825ae000 T toshiba_match +ffffffff825ae0a0 T toshiba_attach +ffffffff825ae180 T get_param_brightness +ffffffff825ae1e0 T acpitoshiba_get_param +ffffffff825ae240 T set_param_brightness +ffffffff825ae2d0 T toshiba_update_brightness +ffffffff825ae3d0 T acpitoshiba_set_param +ffffffff825ae470 T toshiba_set_brightness +ffffffff825ae590 T toshiba_enable_events +ffffffff825ae620 T toshiba_read_events +ffffffff825ae780 T toshiba_hotkey +ffffffff825ae9b0 T toshiba_get_brightness +ffffffff825aeb20 T toshiba_fn_key_brightness_up +ffffffff825aec70 T toshiba_fn_key_brightness_down +ffffffff825aedc0 T toshiba_fn_key_video_output +ffffffff825aef10 T toshiba_get_video_output +ffffffff825af080 T toshiba_set_video_output +ffffffff825b0000 T acpisony_match +ffffffff825b0070 T acpisony_attach +ffffffff825b00e0 T acpisony_activate +ffffffff825b0120 T acpisony_notify_setup +ffffffff825b0310 T acpisony_notify +ffffffff825b06b0 T acpisony_find_offset +ffffffff825b07c0 T acpisony_set_hotkey +ffffffff825b09b0 T acpisony_brightness_down +ffffffff825b0ac0 T acpisony_get_brightness +ffffffff825b0b40 T acpisony_set_brightness +ffffffff825b1000 T acpivideo_match +ffffffff825b1070 T acpivideo_attach +ffffffff825b11d0 T acpivideo_getpcibus +ffffffff825b1210 T acpivideo_notify +ffffffff825b1270 T acpivideo_set_policy +ffffffff825b1340 T acpi_foundvout +ffffffff825b1410 T acpivideo_print +ffffffff825b2000 T acpivout_match +ffffffff825b2070 T acpivout_attach +ffffffff825b21c0 T acpivout_notify +ffffffff825b2270 T acpivout_get_bcl +ffffffff825b2390 T acpivout_get_brightness +ffffffff825b2430 T acpivout_get_param +ffffffff825b24d0 T acpivout_set_param +ffffffff825b2630 T acpivout_select_brightness +ffffffff825b2700 T acpivout_find_brightness +ffffffff825b2790 T acpivout_set_brightness +ffffffff825b3000 T acpipwrres_match +ffffffff825b3070 T acpipwrres_attach +ffffffff825b32b0 T acpipwrres_foundcons +ffffffff825b3440 T acpipwrres_ref_incr +ffffffff825b34d0 T acpipwrres_hascons +ffffffff825b3520 T acpipwrres_ref_decr +ffffffff825b35b0 T acpipwrres_addcons +ffffffff825b4000 T aibs_match +ffffffff825b4030 T aibs_attach +ffffffff825b4140 T aibs_probe +ffffffff825b42a0 T aibs_attach_new +ffffffff825b43c0 T aibs_attach_sif +ffffffff825b4590 T aibs_notify +ffffffff825b4600 T aibs_add_sensor +ffffffff825b4850 T aibs_getpack +ffffffff825b48d0 T aibs_refresh +ffffffff825b4930 T aibs_refresh_r +ffffffff825b4a70 T aibs_getvalue +ffffffff825b4bc0 T aibs_find_cb +ffffffff825b5000 T aplgpio_match +ffffffff825b5060 T aplgpio_attach +ffffffff825b5310 T aplgpio_intr +ffffffff825b5460 T aplgpio_read_pin +ffffffff825b54b0 T aplgpio_write_pin +ffffffff825b5520 T aplgpio_intr_establish +ffffffff825b5640 T aplgpio_intr_enable +ffffffff825b56d0 T aplgpio_intr_disable +ffffffff825b6000 T bytgpio_match +ffffffff825b6060 T bytgpio_attach +ffffffff825b6320 T bytgpio_intr +ffffffff825b6450 T bytgpio_read_pin +ffffffff825b64b0 T bytgpio_write_pin +ffffffff825b6530 T bytgpio_intr_establish +ffffffff825b65a0 T bytgpio_intr_enable +ffffffff825b6690 T bytgpio_intr_disable +ffffffff825b7000 T chvgpio_match +ffffffff825b7060 T chvgpio_attach +ffffffff825b7300 T chvgpio_intr +ffffffff825b73d0 T chvgpio_read_pin +ffffffff825b7480 T chvgpio_write_pin +ffffffff825b7540 T chvgpio_intr_establish +ffffffff825b7710 T chvgpio_intr_enable +ffffffff825b77e0 T chvgpio_intr_disable +ffffffff825b78b0 T chvgpio_opreg_handler +ffffffff825b7930 T chvgpio_check_pin +ffffffff825b8000 T glkgpio_match +ffffffff825b8060 T glkgpio_attach +ffffffff825b8310 T glkgpio_intr +ffffffff825b8460 T glkgpio_read_pin +ffffffff825b84c0 T glkgpio_write_pin +ffffffff825b8530 T glkgpio_intr_establish +ffffffff825b8650 T glkgpio_intr_enable +ffffffff825b86e0 T glkgpio_intr_disable +ffffffff825b9000 T pchgpio_match +ffffffff825b9060 T pchgpio_attach +ffffffff825b9530 T pchgpio_activate +ffffffff825b95e0 T pchgpio_intr +ffffffff825b9800 T pchgpio_read_pin +ffffffff825b98f0 T pchgpio_write_pin +ffffffff825b9a00 T pchgpio_intr_establish +ffffffff825b9c20 T pchgpio_intr_enable +ffffffff825b9d50 T pchgpio_intr_disable +ffffffff825b9e80 T pchgpio_save +ffffffff825b9ef0 T pchgpio_restore +ffffffff825b9f60 T pchgpio_find_group +ffffffff825b9fe0 T pchgpio_intr_handle +ffffffff825ba0c0 T pchgpio_save_pin +ffffffff825ba280 T pchgpio_restore_pin +ffffffff825bb000 T tipmic_match +ffffffff825bb050 T tipmic_attach +ffffffff825bb250 T tipmic_write_1 +ffffffff825bb310 T tipmic_intr +ffffffff825bb470 T tipmic_get_lpat +ffffffff825bb580 T tipmic_read_pin +ffffffff825bb5b0 T tipmic_write_pin +ffffffff825bb5e0 T tipmic_thermal_opreg_handler +ffffffff825bbe60 T tipmic_power_opreg_handler +ffffffff825bc100 T tipmic_read_1 +ffffffff825bc1d0 T tipmic_raw_to_temp +ffffffff825bd000 T ccpmic_match +ffffffff825bd050 T ccpmic_attach +ffffffff825bd130 T ccpmic_get_lpat +ffffffff825bd240 T ccpmic_read_pin +ffffffff825bd3c0 T ccpmic_write_pin +ffffffff825bd520 T ccpmic_thermal_opreg_handler +ffffffff825bd770 T ccpmic_power_opreg_handler +ffffffff825bd960 T ccpmic_read_1 +ffffffff825bda30 T ccpmic_write_1 +ffffffff825bdaf0 T ccpmic_raw_to_temp +ffffffff825be000 T com_acpi_match +ffffffff825be120 T com_acpi_attach +ffffffff825be3a0 T com_acpi_is_designware +ffffffff825be400 T com_acpi_intr_designware +ffffffff825be430 T com_acpi_is_console +ffffffff825bf000 T sdhc_acpi_match +ffffffff825bf060 T sdhc_acpi_attach +ffffffff825bf370 T sdhc_acpi_parse_resources +ffffffff825bf420 T sdhc_acpi_card_detect_gpio +ffffffff825bf480 T sdhc_acpi_card_detect_intr +ffffffff825bf4c0 T sdhc_acpi_power_on +ffffffff825bf540 T sdhc_acpi_explore +ffffffff825bf570 T sdhc_acpi_card_detect_nonremovable +ffffffff825bf5a0 T sdhc_acpi_do_explore +ffffffff825c0000 T dwiic_acpi_match +ffffffff825c0050 T dwiic_acpi_attach +ffffffff825c0410 T dwiic_acpi_parse_crs +ffffffff825c0560 T dwiic_acpi_power +ffffffff825c0670 T dwiic_acpi_get_params +ffffffff825c07b0 T dwiic_i2c_intr_establish +ffffffff825c0830 T dwiic_i2c_intr_disestablish +ffffffff825c0850 T dwiic_i2c_intr_string +ffffffff825c08e0 T dwiic_acpi_acquire_bus +ffffffff825c0930 T dwiic_acpi_release_bus +ffffffff825c0960 T dwiic_acpi_bus_scan +ffffffff825c09a0 T dwiic_acpi_found_hid +ffffffff825c0d00 T dwiic_matchhids +ffffffff825c0d90 T dwiic_acpi_found_ihidev +ffffffff825c1000 T dwiic_acpi_found_iatp +ffffffff825c1160 T dwiic_acpi_found_ietp +ffffffff825c2000 T acpicbkbd_match +ffffffff825c2030 T acpicbkbd_attach +ffffffff825c20d0 T acpicbkbd_activate +ffffffff825c2120 T acpicbkbd_get_backlight +ffffffff825c21a0 T acpicbkbd_set_backlight +ffffffff825c2240 T acpicbkbd_write_backlight +ffffffff825c3000 T acpials_match +ffffffff825c3090 T acpials_attach +ffffffff825c3230 T acpials_read +ffffffff825c32b0 T acpials_addtask +ffffffff825c32f0 T acpials_notify +ffffffff825c3380 T acpials_update +ffffffff825c4000 T tpm_match +ffffffff825c4050 T tpm_attach +ffffffff825c4320 T tpm_activate +ffffffff825c4430 T tpm2_start_method +ffffffff825c44b0 T tpm_probe +ffffffff825c4560 T tpm_init_tis +ffffffff825c47d0 T tpm_init_crb +ffffffff825c4b10 T tpm_suspend +ffffffff825c4c00 T tpm_resume +ffffffff825c4c30 T tpm_write_tis +ffffffff825c4fc0 T tpm_read_tis +ffffffff825c5190 T tpm_write_crb +ffffffff825c5570 T tpm_read_crb +ffffffff825c5870 T tpm_request_locality_tis +ffffffff825c5960 T tpm_request_locality_crb +ffffffff825c5a60 T tpm_release_locality_crb +ffffffff825c5ab0 T tpm_release_locality_tis +ffffffff825c5b20 T tpm_getburst +ffffffff825c5bd0 T tpm_status +ffffffff825c5bf0 T tpm_waitfor +ffffffff825c5cd0 T tpm_waitfor_status +ffffffff825c6000 T acpihve_match +ffffffff825c60b0 T acpihve_attach +ffffffff825c7000 T acpisbs_match +ffffffff825c7030 T acpisbs_attach +ffffffff825c72b0 T acpisbs_activate +ffffffff825c7390 T acpisbs_read +ffffffff825c7450 T acpisbs_setup_sensors +ffffffff825c7550 T acpisbs_refresh_sensors +ffffffff825c76a0 T acpisbs_notify +ffffffff825c77e0 T acpi_smbus_read +ffffffff825c8000 T surface_match +ffffffff825c8060 T surface_attach +ffffffff825c80c0 T surface_hotkey +ffffffff825c9000 T ipmi_acpi_match +ffffffff825c9030 T ipmi_acpi_attach +ffffffff825c9260 T ipmi_acpi_parse_crs +ffffffff825ca000 T amdgpio_match +ffffffff825ca060 T amdgpio_attach +ffffffff825ca2a0 T amdgpio_activate +ffffffff825ca390 T amdgpio_intr +ffffffff825ca530 T amdgpio_read_pin +ffffffff825ca580 T amdgpio_write_pin +ffffffff825ca5f0 T amdgpio_intr_establish +ffffffff825ca6e0 T amdgpio_intr_enable +ffffffff825ca760 T amdgpio_intr_disable +ffffffff825ca7e0 T amdgpio_save +ffffffff825ca860 T amdgpio_restore +ffffffff825ca8f0 T amdgpio_save_pin +ffffffff825ca960 T amdgpio_restore_pin +ffffffff825ca9d0 T amdgpio_pin_intr +ffffffff825cb000 T acpihid_match +ffffffff825cb030 T acpihid_attach +ffffffff825cb210 T acpihid_init_dsm +ffffffff825cb370 T acpihid_eval +ffffffff825cb590 T acpihid_notify +ffffffff825cb5f0 T acpihid_button_array_enable +ffffffff825cc000 t iosf_acpi_match +ffffffff825cc050 t iosf_acpi_attach +ffffffff825cc150 t iosf_acpi_mbi_mdr_rd +ffffffff825cc1c0 t iosf_acpi_mbi_mdr_wr +ffffffff825cd000 T acpi_match +ffffffff825cd060 T acpi_attach +ffffffff825cd0a0 T acpi_probe +ffffffff825cd240 T acpi_map +ffffffff825cd330 T acpi_unmap +ffffffff825cd380 T acpi_bus_space_map +ffffffff825cd3a0 T acpi_bus_space_unmap +ffffffff825cd3c0 T acpi_intr_establish +ffffffff825cd500 T acpi_intr_disestablish +ffffffff825cd510 T acpi_scan +ffffffff825cd6b0 T acpi_acquire_glk +ffffffff825cd710 T acpi_release_glk +ffffffff825cd760 T acpi_attach_machdep +ffffffff825cd8f0 T acpi_sleep_cpu +ffffffff825cda90 T acpi_resume_cpu +ffffffff825cdb90 T sleep_mp +ffffffff825cdc80 T resume_mp +ffffffff825cdd70 T acpi_iommu_device_map +ffffffff825ce000 T hibernate_resume_machdep +ffffffff825ce050 T hibernate_drop_to_real_mode +ffffffff825ce060 T hibernate_activate_resume_pt_machdep +ffffffff825ce0a0 T hibernate_switch_stack_machdep +ffffffff825ce0e0 T hibernate_flush +ffffffff825ce110 T acpi_savecpu +ffffffff825cf000 T sleep_showstate +ffffffff825cf0f0 T sleep_setstate +ffffffff825cf150 T gosleep +ffffffff825cf210 T sleep_abort +ffffffff825cf240 T sleep_resume +ffffffff825cf2b0 T suspend_finish +ffffffff825d0000 T acpiopen +ffffffff825d00d0 T acpiclose +ffffffff825d0160 T acpiioctl +ffffffff825d02b0 T request_sleep +ffffffff825d0330 T acpi_filtdetach +ffffffff825d0380 T acpi_filtread +ffffffff825d03c0 T acpikqfilter +ffffffff825d1000 T acpipci_match +ffffffff825d1030 T acpipci_attach +ffffffff825d12f0 T acpipci_osc +ffffffff825d1430 T acpipci_parse_resources +ffffffff825d1560 T acpipci_attach_bus +ffffffff825d1730 T acpipci_print +ffffffff825d17a0 T acpipci_attach_busses +ffffffff825d2000 T efiopen +ffffffff825d2040 T eficlose +ffffffff825d2070 T efiioctl +ffffffff825d2110 T efiioc_get_table +ffffffff825d2280 T efiioc_var_get +ffffffff825d2500 T efiioc_var_next +ffffffff825d2720 T efiioc_var_set +ffffffff825d28a0 T efi_adapt_error +ffffffff825d3000 T efi_match +ffffffff825d3060 T efi_attach +ffffffff825d3330 T efi_map_runtime +ffffffff825d34b0 T efi_enter +ffffffff825d3550 T efi_leave +ffffffff825d35d0 T efi_fault +ffffffff825d4000 T vmm_probe +ffffffff825d4050 T vmm_attach +ffffffff825d4170 T vmm_activate +ffffffff825d42b0 T vmmopen +ffffffff825d4300 T vmmclose +ffffffff825d4330 T vm_find +ffffffff825d4450 T vmmioctl +ffffffff825d46d0 T vm_create +ffffffff825d49a0 T vm_get_info +ffffffff825d4bf0 T vm_terminate +ffffffff825d4d60 T vm_resetcpu +ffffffff825d4e80 T vm_share_mem +ffffffff825d4fd0 T pledge_ioctl_vmm +ffffffff825d50c0 T vm_find_vcpu +ffffffff825d5120 T vm_create_check_mem_ranges +ffffffff825d52e0 T vm_teardown +ffffffff825d5420 T vcpu_must_stop +ffffffff825d6000 T vmm_enabled +ffffffff825d6080 T vmm_attach_machdep +ffffffff825d6230 T vmm_quiesce_vmx +ffffffff825d6400 T vmm_activate_machdep +ffffffff825d6520 T vmm_stop +ffffffff825d6650 T vmm_start +ffffffff825d6730 T vmmioctl_machdep +ffffffff825d6800 T vm_intr_pending +ffffffff825d68a0 T vm_mprotect_ept +ffffffff825d6b20 T pledge_ioctl_vmm_machdep +ffffffff825d6b70 T vm_rwvmparams +ffffffff825d6d00 T vmm_init_pvclock +ffffffff825d6dd0 T vm_rwregs +ffffffff825d6ee0 T vcpu_readregs_vmx +ffffffff825d7310 T vcpu_writeregs_vmx +ffffffff825d7780 T vcpu_readregs_svm +ffffffff825d7c30 T vcpu_writeregs_svm +ffffffff825d8100 T vmm_get_guest_memtype +ffffffff825d8180 T vmx_mprotect_ept +ffffffff825d83e0 T vmx_pmap_find_pte_ept +ffffffff825d84b0 T start_vmm_on_cpu +ffffffff825d85d0 T stop_vmm_on_cpu +ffffffff825d8670 T vmclear_on_cpu +ffffffff825d86f0 T vm_impl_init_vmx +ffffffff825d8800 T vm_impl_init_svm +ffffffff825d8910 T vm_impl_init +ffffffff825d89b0 T vm_impl_deinit +ffffffff825d89e0 T vcpu_reload_vmcs_vmx +ffffffff825d8b20 T vcpu_reset_regs_svm +ffffffff825d8eb0 T svm_setmsrbrw +ffffffff825d8fc0 T svm_setmsrbr +ffffffff825d9090 T vmm_alloc_vpid +ffffffff825d91a0 T svm_setmsrbw +ffffffff825d9280 T vmx_setmsrbr +ffffffff825d9330 T vmx_setmsrbw +ffffffff825d93e0 T vmx_setmsrbrw +ffffffff825d94f0 T svm_set_clean +ffffffff825d9540 T svm_set_dirty +ffffffff825d9590 T vcpu_reset_regs_vmx +ffffffff825d9fd0 T vcpu_vmx_check_cap +ffffffff825da0d0 T vcpu_vmx_compute_ctrl +ffffffff825da2b0 T vcpu_init_vmx +ffffffff825da650 T vcpu_deinit_vmx +ffffffff825da7d0 T vcpu_reset_regs +ffffffff825da810 T vcpu_init_svm +ffffffff825da9a0 T vcpu_deinit_svm +ffffffff825daae0 T vcpu_init +ffffffff825daba0 T vmm_free_vpid +ffffffff825dac10 T vcpu_deinit +ffffffff825dac50 T vm_run +ffffffff825dae10 T vcpu_run_vmx +ffffffff825db600 T vcpu_run_svm +ffffffff825dbbf0 T vmm_fpurestore +ffffffff825dbcb0 T vmm_fpusave +ffffffff825dbd30 T vmm_translate_gva +ffffffff825dc040 T vmm_update_pvclock +ffffffff825dc140 T vmx_get_exit_info +ffffffff825dc1a0 T vmx_handle_exit +ffffffff825dc5d0 T vmx_instruction_error_decode +ffffffff825dc7a0 T vmm_get_guest_cpu_cpl +ffffffff825dc890 T vmx_handle_intr +ffffffff825dc920 T svm_handle_hlt +ffffffff825dc970 T vmx_handle_hlt +ffffffff825dca20 T svm_handle_exit +ffffffff825dcd40 T svm_handle_np_fault +ffffffff825dcee0 T vmm_handle_cpuid +ffffffff825dd580 T svm_handle_msr +ffffffff825dd850 T svm_handle_xsetbv +ffffffff825dd8f0 T svm_handle_inout +ffffffff825dd9f0 T vmm_inject_ud +ffffffff825dda20 T vmm_inject_db +ffffffff825dda50 T vmx_handle_np_fault +ffffffff825ddbb0 T vmx_handle_inout +ffffffff825ddd30 T vmx_handle_cr +ffffffff825ddf30 T vmx_handle_rdmsr +ffffffff825de000 T vmx_handle_wrmsr +ffffffff825de270 T vmx_handle_xsetbv +ffffffff825de340 T vmm_inject_gp +ffffffff825de370 T vmx_get_exit_qualification +ffffffff825de3d0 T vmx_get_guest_faulttype +ffffffff825de470 T svm_get_guest_faulttype +ffffffff825de4a0 T svm_fault_page +ffffffff825de530 T vmx_fault_page +ffffffff825de680 T vmm_get_guest_cpu_mode +ffffffff825de780 T vmx_load_pdptes +ffffffff825dea00 T vmx_handle_cr0_write +ffffffff825dec10 T vmx_handle_cr4_write +ffffffff825decb0 T vmm_handle_xsetbv +ffffffff825ded40 T vmx_handle_misc_enable_msr +ffffffff825deda0 T vmm_pat_is_valid +ffffffff825dee80 T vmm_gpa_is_valid +ffffffff825deef0 T vmx_exit_reason_decode +ffffffff825def30 T svm_exit_reason_decode +ffffffff825dfd40 T vcpu_state_decode +ffffffff825e0000 T vmm_dispatch_intr +ffffffff825e0020 T vmxon +ffffffff825e0050 T vmxoff +ffffffff825e0080 T vmclear +ffffffff825e00b0 T vmptrld +ffffffff825e00e0 T vmptrst +ffffffff825e0110 T vmwrite +ffffffff825e0140 T vmread +ffffffff825e0170 T invvpid +ffffffff825e018b t invvpid_fail +ffffffff825e0192 t invvpid_ret +ffffffff825e01b0 T invept +ffffffff825e01cb t invept_fail +ffffffff825e01d2 t invept_ret +ffffffff825e01f0 T vmx_enter_guest +ffffffff825e021b t skip_init +ffffffff825e02e8 t no_l1df_msr +ffffffff825e02eb t l1df_tlb_loop +ffffffff825e0304 t l1df_tlb_done +ffffffff825e030c t l1df_load_cache +ffffffff825e0323 t done_flush +ffffffff825e03b6 t do_resume +ffffffff825e043b t fail_launch_or_resume +ffffffff825e047d t fail_launch_unknown +ffffffff825e048a t fail_launch_invalid_vmcs +ffffffff825e0497 t fail_launch_valid_vmcs +ffffffff825e04b4 t vmx_exit_handler_asm +ffffffff825e0579 t restore_host +ffffffff825e0610 T svm_enter_guest +ffffffff825e07a0 t restore_host_svm +ffffffff825e1000 T sdmmc_match +ffffffff825e1050 T sdmmc_attach +ffffffff825e1390 T sdmmc_detach +ffffffff825e1440 T sdmmc_activate +ffffffff825e1510 T sdmmc_discover_task +ffffffff825e15d0 T sdmmc_create_thread +ffffffff825e1640 T sdmmc_holds_root_device +ffffffff825e16a0 T sdmmc_task_thread +ffffffff825e1890 T sdmmc_needs_discover +ffffffff825e1940 T sdmmc_del_task +ffffffff825e19f0 T sdmmc_card_detach +ffffffff825e1ad0 T sdmmc_add_task +ffffffff825e1b50 T sdmmc_card_attach +ffffffff825e1c60 T sdmmc_enable +ffffffff825e1db0 T sdmmc_scan +ffffffff825e1e40 T sdmmc_init +ffffffff825e1f40 T sdmmc_disable +ffffffff825e20a0 T sdmmc_function_free +ffffffff825e20c0 T sdmmc_delay +ffffffff825e2110 T sdmmc_select_card +ffffffff825e2330 T sdmmc_set_bus_power +ffffffff825e24e0 T sdmmc_function_alloc +ffffffff825e2570 T sdmmc_app_command +ffffffff825e2700 T sdmmc_mmc_command +ffffffff825e2780 T sdmmc_go_idle_state +ffffffff825e2890 T sdmmc_send_if_cond +ffffffff825e29e0 T sdmmc_set_relative_addr +ffffffff825e3000 T sdmmc_cisptr +ffffffff825e30a0 T sdmmc_read_cis +ffffffff825e33e0 T sdmmc_print_cis +ffffffff825e3550 T sdmmc_check_cis_quirks +ffffffff825e4000 T sdmmc_io_enable +ffffffff825e42a0 T sdmmc_io_reset +ffffffff825e43d0 T sdmmc_io_send_op_cond +ffffffff825e4540 T sdmmc_io_scan +ffffffff825e4690 T sdmmc_io_init +ffffffff825e47c0 T sdmmc_io_set_highspeed +ffffffff825e4a60 T sdmmc_io_set_bus_width +ffffffff825e4cf0 T sdmmc_io_function_ready +ffffffff825e4e70 T sdmmc_io_read_1 +ffffffff825e4fc0 T sdmmc_io_function_enable +ffffffff825e5390 T sdmmc_io_write_1 +ffffffff825e5510 T sdmmc_io_function_disable +ffffffff825e5790 T sdmmc_io_attach +ffffffff825e5880 T sdmmc_print +ffffffff825e5ad0 T sdmmc_submatch +ffffffff825e5b50 T sdmmc_io_detach +ffffffff825e5c00 T sdmmc_io_rw_direct +ffffffff825e5da0 T sdmmc_io_rw_extended_subr +ffffffff825e5f40 T sdmmc_io_rw_extended +ffffffff825e6340 T sdmmc_io_read_2 +ffffffff825e64a0 T sdmmc_io_write_2 +ffffffff825e6600 T sdmmc_io_read_4 +ffffffff825e6760 T sdmmc_io_write_4 +ffffffff825e68c0 T sdmmc_io_read_multi_1 +ffffffff825e69b0 T sdmmc_io_write_multi_1 +ffffffff825e6aa0 T sdmmc_io_read_region_1 +ffffffff825e6b90 T sdmmc_io_write_region_1 +ffffffff825e6c80 T sdmmc_io_xchg +ffffffff825e6e10 T sdmmc_intr_enable +ffffffff825e7080 T sdmmc_intr_disable +ffffffff825e72f0 T sdmmc_intr_establish +ffffffff825e73f0 T sdmmc_intr_disestablish +ffffffff825e74e0 T sdmmc_card_intr +ffffffff825e7530 T sdmmc_intr_task +ffffffff825e75c0 T sdmmc_io_set_blocklen +ffffffff825e8000 T sdmmc_mem_enable +ffffffff825e8450 T sdmmc_mem_send_op_cond +ffffffff825e8600 T sdmmc_mem_signal_voltage +ffffffff825e86c0 T sdmmc_mem_scan +ffffffff825e89d0 T sdmmc_decode_csd +ffffffff825e8e00 T sdmmc_decode_cid +ffffffff825e92a0 T sdmmc_mem_send_scr +ffffffff825e93e0 T sdmmc_mem_decode_scr +ffffffff825e9440 T sdmmc_mem_send_cxd_data +ffffffff825e95b0 T sdmmc_mem_set_bus_width +ffffffff825e96c0 T sdmmc_mem_sd_switch +ffffffff825e9970 T sdmmc_be512_to_bitfield512 +ffffffff825e9a20 T sdmmc_mem_mmc_switch +ffffffff825e9b10 T sdmmc_mem_init +ffffffff825e9c60 T sdmmc_mem_set_blocklen +ffffffff825e9d60 T sdmmc_mem_sd_init +ffffffff825ea140 T sdmmc_mem_mmc_init +ffffffff825ea800 T sdmmc_mem_select_transfer_mode +ffffffff825ea880 T sdmmc_mem_execute_tuning +ffffffff825ea910 T sdmmc_mem_read_block_subr +ffffffff825eac70 T sdmmc_mem_single_read_block +ffffffff825ead40 T sdmmc_mem_read_block +ffffffff825eaef0 T sdmmc_mem_write_block_subr +ffffffff825eb240 T sdmmc_mem_single_write_block +ffffffff825eb310 T sdmmc_mem_write_block +ffffffff825eb4c0 T sdmmc_mem_hibernate_write +ffffffff825ec000 T sdmmc_scsi_cmd +ffffffff825ec1f0 T sdmmc_minphys +ffffffff825ec270 T sdmmc_scsi_attach +ffffffff825ec460 T sdmmc_alloc_ccbs +ffffffff825ec5a0 T sdmmc_free_ccbs +ffffffff825ec600 T sdmmc_scsi_detach +ffffffff825ec760 T sdmmc_stimeout +ffffffff825ec7e0 T sdmmc_ccb_alloc +ffffffff825ec890 T sdmmc_ccb_free +ffffffff825ec970 T sdmmc_inquiry +ffffffff825ecbe0 T sdmmc_start_xs +ffffffff825eccd0 T sdmmc_complete_xs +ffffffff825ecda0 T sdmmc_done_xs +ffffffff825ecdf0 T sdmmc_scsi_hibernate_io +ffffffff825ed000 T bwfm_sdio_preinit +ffffffff825ed4a0 T bwfm_sdio_txcheck +ffffffff825ed4e0 T bwfm_sdio_txdata +ffffffff825ed550 T bwfm_sdio_txctl +ffffffff825ed6a0 T bwfm_sdio_buscore_read +ffffffff825ed6b0 T bwfm_sdio_buscore_write +ffffffff825ed6d0 T bwfm_sdio_buscore_prepare +ffffffff825ed810 T bwfm_sdio_buscore_activate +ffffffff825ed890 T bwfm_sdio_match +ffffffff825ed940 T bwfm_sdio_attach +ffffffff825edc00 T bwfm_sdio_detach +ffffffff825edc60 T bwfm_sdio_task +ffffffff825eddc0 T bwfm_sdio_write_1 +ffffffff825eddf0 T bwfm_sdio_read_1 +ffffffff825ede20 T bwfm_sdio_write_4 +ffffffff825eded0 T bwfm_sdio_read_4 +ffffffff825edf80 T bwfm_sdio_load_microcode +ffffffff825ee1e0 T bwfm_sdio_clkctl +ffffffff825ee310 T bwfm_sdio_dev_write +ffffffff825ee360 T bwfm_sdio_intr +ffffffff825ee3a0 T bwfm_sdio_ram_read_write +ffffffff825ee5d0 T bwfm_sdio_htclk +ffffffff825ee840 T bwfm_sdio_readshared +ffffffff825ee910 T bwfm_sdio_dev_read +ffffffff825ee950 T bwfm_sdio_rx_frames +ffffffff825eed00 T bwfm_sdio_tx_frames +ffffffff825eee00 T bwfm_sdio_backplane +ffffffff825eeeb0 T bwfm_sdio_buf_read +ffffffff825eef90 T bwfm_sdio_buf_write +ffffffff825ef040 T bwfm_sdio_frame_read_write +ffffffff825ef1c0 T bwfm_sdio_newbuf +ffffffff825ef240 T bwfm_sdio_tx_ok +ffffffff825ef2a0 T bwfm_sdio_tx_ctrlframe +ffffffff825ef3a0 T bwfm_sdio_tx_dataframe +ffffffff825ef4f0 T bwfm_sdio_rx_glom +ffffffff825f0000 T onewire_match +ffffffff825f0050 T onewire_attach +ffffffff825f00f0 T onewire_detach +ffffffff825f0160 T onewire_activate +ffffffff825f0180 T onewire_scan +ffffffff825f03a0 T onewire_createthread +ffffffff825f0410 T onewire_print +ffffffff825f04e0 T onewirebus_print +ffffffff825f0530 T onewire_lock +ffffffff825f0550 T onewire_unlock +ffffffff825f0570 T onewire_reset +ffffffff825f0590 T onewire_bit +ffffffff825f05b0 T onewire_read_byte +ffffffff825f06f0 T onewire_write_byte +ffffffff825f07d0 T onewire_read_block +ffffffff825f0870 T onewire_write_block +ffffffff825f0910 T onewire_triplet +ffffffff825f09f0 T onewire_matchrom +ffffffff825f0b40 T onewire_search +ffffffff825f0ee0 T onewire_thread +ffffffff825f1000 T onewire_crc +ffffffff825f10b0 T onewire_crc16 +ffffffff825f1170 T onewire_famname +ffffffff825f11b0 T onewire_matchbyfam +ffffffff825f2000 T owid_match +ffffffff825f2030 T owid_attach +ffffffff825f2100 T owid_detach +ffffffff825f2140 T owid_activate +ffffffff825f3000 T owsbm_match +ffffffff825f3030 T owsbm_attach +ffffffff825f31d0 T owsbm_detach +ffffffff825f3240 T owsbm_activate +ffffffff825f3270 T owsbm_update +ffffffff825f4000 T owtemp_match +ffffffff825f4030 T owtemp_attach +ffffffff825f4130 T owtemp_detach +ffffffff825f41a0 T owtemp_activate +ffffffff825f41d0 T owtemp_update +ffffffff825f5000 T owctr_match +ffffffff825f5030 T owctr_attach +ffffffff825f5180 T owctr_detach +ffffffff825f51f0 T owctr_activate +ffffffff825f5220 T owctr_update +ffffffff825f5250 T owctr_update_counter +ffffffff825f6000 A __text_page_start +ffffffff825f6000 T Xsyscall_meltdown +ffffffff825f600c T Xsyscall +ffffffff825f626e t Xsyscall_trampback +ffffffff825f6280 T intr_user_exit +ffffffff825f62c2 t intr_user_exit_post_ast +ffffffff825f63ee t Xiretq_trampback +ffffffff825f63fa T doreti_iret +ffffffff825f7000 T alltraps +ffffffff825f7138 T recall_trap +ffffffff825f7150 T alltraps_kern +ffffffff825f7153 T alltraps_kern_meltdown +ffffffff825f8000 ? Xsyscall32 +ffffffff825f8000 A __kutext_start +ffffffff825f8000 A __text_page_end +ffffffff825f9000 ? Xtrap00 +ffffffff825f9010 ? Xtrap01 +ffffffff825f9020 ? Xtrap02 +ffffffff825f9028 c calltrap_specstk +ffffffff825f90f0 ? calltrap_specstk_tramp +ffffffff825f9110 ? Xtrap03 +ffffffff825f9120 ? Xtrap04 +ffffffff825f9130 ? Xtrap05 +ffffffff825f9140 ? Xtrap06 +ffffffff825f9150 ? Xtrap07 +ffffffff825f9160 ? Xtrap08 +ffffffff825f9170 ? Xtrap09 +ffffffff825f9180 ? Xtrap0a +ffffffff825f9190 ? Xtrap0b +ffffffff825f91a0 ? Xtrap0c +ffffffff825f91b0 ? Xtrap0d +ffffffff825f9240 ? Xtrap0e +ffffffff825f9250 ? Xintrspurious +ffffffff825f9250 ? Xtrap0f +ffffffff825f9260 ? Xtrap10 +ffffffff825f9270 ? Xtrap11 +ffffffff825f9280 ? Xtrap12 +ffffffff825f9290 ? Xtrap13 +ffffffff825f92a0 ? Xtrap14 +ffffffff825f92b0 ? Xtrap15 +ffffffff825f92c0 ? Xtrap16 +ffffffff825f92c0 ? Xtrap17 +ffffffff825f92c0 ? Xtrap18 +ffffffff825f92c0 ? Xtrap19 +ffffffff825f92c0 ? Xtrap1a +ffffffff825f92c0 ? Xtrap1b +ffffffff825f92c0 ? Xtrap1c +ffffffff825f92c0 ? Xtrap1d +ffffffff825f92c0 ? Xtrap1e +ffffffff825f92c0 ? Xtrap1f +ffffffff825f92d0 ? x2apic_eoi +ffffffff825f92f0 ? Xintr_lapic_ipi +ffffffff825f9330 ? Xipi_invltlb +ffffffff825f9360 ? Xipi_invlpg +ffffffff825f9390 ? Xipi_invlrange +ffffffff825f93d0 ? Xipi_invltlb_pcid +ffffffff825f9410 ? Xipi_invlpg_pcid +ffffffff825f9460 ? Xipi_invlrange_pcid +ffffffff825f94d0 ? Xintr_lapic_ltimer +ffffffff825f9510 ? Xintr_xen_upcall +ffffffff825f9550 ? Xintr_hyperv_upcall +ffffffff825f9590 ? Xintr_legacy0 +ffffffff825f95d0 ? Xintr_legacy1 +ffffffff825f9610 ? Xintr_legacy2 +ffffffff825f9650 ? Xintr_legacy3 +ffffffff825f9690 ? Xintr_legacy4 +ffffffff825f96d0 ? Xintr_legacy5 +ffffffff825f9710 ? Xintr_legacy6 +ffffffff825f9750 ? Xintr_legacy7 +ffffffff825f9790 ? Xintr_legacy8 +ffffffff825f97d0 ? Xintr_legacy9 +ffffffff825f9810 ? Xintr_legacy10 +ffffffff825f9850 ? Xintr_legacy11 +ffffffff825f9890 ? Xintr_legacy12 +ffffffff825f98d0 ? Xintr_legacy13 +ffffffff825f9910 ? Xintr_legacy14 +ffffffff825f9950 ? Xintr_legacy15 +ffffffff825f9990 ? Xintr_ioapic_edge0 +ffffffff825f99d0 ? Xintr_ioapic_edge1 +ffffffff825f9a10 ? Xintr_ioapic_edge2 +ffffffff825f9a50 ? Xintr_ioapic_edge3 +ffffffff825f9a90 ? Xintr_ioapic_edge4 +ffffffff825f9ad0 ? Xintr_ioapic_edge5 +ffffffff825f9b10 ? Xintr_ioapic_edge6 +ffffffff825f9b50 ? Xintr_ioapic_edge7 +ffffffff825f9b90 ? Xintr_ioapic_edge8 +ffffffff825f9bd0 ? Xintr_ioapic_edge9 +ffffffff825f9c10 ? Xintr_ioapic_edge10 +ffffffff825f9c50 ? Xintr_ioapic_edge11 +ffffffff825f9c90 ? Xintr_ioapic_edge12 +ffffffff825f9cd0 ? Xintr_ioapic_edge13 +ffffffff825f9d10 ? Xintr_ioapic_edge14 +ffffffff825f9d50 ? Xintr_ioapic_edge15 +ffffffff825f9d90 ? Xintr_ioapic_edge16 +ffffffff825f9dd0 ? Xintr_ioapic_edge17 +ffffffff825f9e10 ? Xintr_ioapic_edge18 +ffffffff825f9e50 ? Xintr_ioapic_edge19 +ffffffff825f9e90 ? Xintr_ioapic_edge20 +ffffffff825f9ed0 ? Xintr_ioapic_edge21 +ffffffff825f9f10 ? Xintr_ioapic_edge22 +ffffffff825f9f50 ? Xintr_ioapic_edge23 +ffffffff825f9f90 ? Xintr_ioapic_edge24 +ffffffff825f9fd0 ? Xintr_ioapic_edge25 +ffffffff825fa010 ? Xintr_ioapic_edge26 +ffffffff825fa050 ? Xintr_ioapic_edge27 +ffffffff825fa090 ? Xintr_ioapic_edge28 +ffffffff825fa0d0 ? Xintr_ioapic_edge29 +ffffffff825fa110 ? Xintr_ioapic_edge30 +ffffffff825fa150 ? Xintr_ioapic_edge31 +ffffffff825fa190 ? Xintr_ioapic_edge32 +ffffffff825fa1d0 ? Xintr_ioapic_edge33 +ffffffff825fa210 ? Xintr_ioapic_edge34 +ffffffff825fa250 ? Xintr_ioapic_edge35 +ffffffff825fa290 ? Xintr_ioapic_edge36 +ffffffff825fa2d0 ? Xintr_ioapic_edge37 +ffffffff825fa310 ? Xintr_ioapic_edge38 +ffffffff825fa350 ? Xintr_ioapic_edge39 +ffffffff825fa390 ? Xintr_ioapic_edge40 +ffffffff825fa3d0 ? Xintr_ioapic_edge41 +ffffffff825fa410 ? Xintr_ioapic_edge42 +ffffffff825fa450 ? Xintr_ioapic_edge43 +ffffffff825fa490 ? Xintr_ioapic_edge44 +ffffffff825fa4d0 ? Xintr_ioapic_edge45 +ffffffff825fa510 ? Xintr_ioapic_edge46 +ffffffff825fa550 ? Xintr_ioapic_edge47 +ffffffff825fa590 ? Xintr_ioapic_edge48 +ffffffff825fa5d0 ? Xintr_ioapic_edge49 +ffffffff825fa610 ? Xintr_ioapic_edge50 +ffffffff825fa650 ? Xintr_ioapic_edge51 +ffffffff825fa690 ? Xintr_ioapic_edge52 +ffffffff825fa6d0 ? Xintr_ioapic_edge53 +ffffffff825fa710 ? Xintr_ioapic_edge54 +ffffffff825fa750 ? Xintr_ioapic_edge55 +ffffffff825fa790 ? Xintr_ioapic_edge56 +ffffffff825fa7d0 ? Xintr_ioapic_edge57 +ffffffff825fa810 ? Xintr_ioapic_edge58 +ffffffff825fa850 ? Xintr_ioapic_edge59 +ffffffff825fa890 ? Xintr_ioapic_edge60 +ffffffff825fa8d0 ? Xintr_ioapic_edge61 +ffffffff825fa910 ? Xintr_ioapic_edge62 +ffffffff825fa950 ? Xintr_ioapic_edge63 +ffffffff825fa990 ? Xintr_ioapic_level0 +ffffffff825fa9d0 ? Xintr_ioapic_level1 +ffffffff825faa10 ? Xintr_ioapic_level2 +ffffffff825faa50 ? Xintr_ioapic_level3 +ffffffff825faa90 ? Xintr_ioapic_level4 +ffffffff825faad0 ? Xintr_ioapic_level5 +ffffffff825fab10 ? Xintr_ioapic_level6 +ffffffff825fab50 ? Xintr_ioapic_level7 +ffffffff825fab90 ? Xintr_ioapic_level8 +ffffffff825fabd0 ? Xintr_ioapic_level9 +ffffffff825fac10 ? Xintr_ioapic_level10 +ffffffff825fac50 ? Xintr_ioapic_level11 +ffffffff825fac90 ? Xintr_ioapic_level12 +ffffffff825facd0 ? Xintr_ioapic_level13 +ffffffff825fad10 ? Xintr_ioapic_level14 +ffffffff825fad50 ? Xintr_ioapic_level15 +ffffffff825fad90 ? Xintr_ioapic_level16 +ffffffff825fadd0 ? Xintr_ioapic_level17 +ffffffff825fae10 ? Xintr_ioapic_level18 +ffffffff825fae50 ? Xintr_ioapic_level19 +ffffffff825fae90 ? Xintr_ioapic_level20 +ffffffff825faed0 ? Xintr_ioapic_level21 +ffffffff825faf10 ? Xintr_ioapic_level22 +ffffffff825faf50 ? Xintr_ioapic_level23 +ffffffff825faf90 ? Xintr_ioapic_level24 +ffffffff825fafd0 ? Xintr_ioapic_level25 +ffffffff825fb010 ? Xintr_ioapic_level26 +ffffffff825fb050 ? Xintr_ioapic_level27 +ffffffff825fb090 ? Xintr_ioapic_level28 +ffffffff825fb0d0 ? Xintr_ioapic_level29 +ffffffff825fb110 ? Xintr_ioapic_level30 +ffffffff825fb150 ? Xintr_ioapic_level31 +ffffffff825fb190 ? Xintr_ioapic_level32 +ffffffff825fb1d0 ? Xintr_ioapic_level33 +ffffffff825fb210 ? Xintr_ioapic_level34 +ffffffff825fb250 ? Xintr_ioapic_level35 +ffffffff825fb290 ? Xintr_ioapic_level36 +ffffffff825fb2d0 ? Xintr_ioapic_level37 +ffffffff825fb310 ? Xintr_ioapic_level38 +ffffffff825fb350 ? Xintr_ioapic_level39 +ffffffff825fb390 ? Xintr_ioapic_level40 +ffffffff825fb3d0 ? Xintr_ioapic_level41 +ffffffff825fb410 ? Xintr_ioapic_level42 +ffffffff825fb450 ? Xintr_ioapic_level43 +ffffffff825fb490 ? Xintr_ioapic_level44 +ffffffff825fb4d0 ? Xintr_ioapic_level45 +ffffffff825fb510 ? Xintr_ioapic_level46 +ffffffff825fb550 ? Xintr_ioapic_level47 +ffffffff825fb590 ? Xintr_ioapic_level48 +ffffffff825fb5d0 ? Xintr_ioapic_level49 +ffffffff825fb610 ? Xintr_ioapic_level50 +ffffffff825fb650 ? Xintr_ioapic_level51 +ffffffff825fb690 ? Xintr_ioapic_level52 +ffffffff825fb6d0 ? Xintr_ioapic_level53 +ffffffff825fb710 ? Xintr_ioapic_level54 +ffffffff825fb750 ? Xintr_ioapic_level55 +ffffffff825fb790 ? Xintr_ioapic_level56 +ffffffff825fb7d0 ? Xintr_ioapic_level57 +ffffffff825fb810 ? Xintr_ioapic_level58 +ffffffff825fb850 ? Xintr_ioapic_level59 +ffffffff825fb890 ? Xintr_ioapic_level60 +ffffffff825fb8d0 ? Xintr_ioapic_level61 +ffffffff825fb910 ? Xintr_ioapic_level62 +ffffffff825fb950 ? Xintr_ioapic_level63 +ffffffff825fc000 ? codepatch_fill_nop +ffffffff825fc000 A __cptext_start +ffffffff825fc000 A __kutext_end +ffffffff825fc0b0 ? codepatch_maprw +ffffffff825fc190 ? codepatch_unmaprw +ffffffff825fc200 ? codepatch_nop +ffffffff825fc360 ? codepatch_replace +ffffffff825fc510 ? codepatch_call +ffffffff825fc530 ? codepatch_jmp +ffffffff825fd000 A __cptext_end +ffffffff825fd000 A __rodata_start +ffffffff825fd000 C _etext +ffffffff825fd000 C etext +ffffffff825fe000 r seeprom_read +ffffffff825fe004 r icl_mg_pll_find_divisors.div1_vals +ffffffff825fe034 r athn_ac2qid +ffffffff825fe034 r athn_ac2qid +ffffffff825fe034 r athn_ac2qid +ffffffff825fe040 r rtwn_get_rssi.cckoff +ffffffff825fe068 r rsu_ac2qid +ffffffff825fe078 r pckbc_portcmd +ffffffff825fe07c r tht_fifo_write_pad.pad +ffffffff825fe084 r rsu_get_rssi.cckoff +ffffffff825fe0a4 r adlp_n_revids +ffffffff825fe0e8 r apple_iso_trans +ffffffff825fe0f0 r wihap_check_tx.txratetable +ffffffff825fe0f4 r dmamode +ffffffff825fe118 r gen9_edram_size_mb.sets +ffffffff825fe12c r dg2_g12_revid_step_tbl +ffffffff825ff000 r isomappings +ffffffff825ff080 r unimappings +ffffffff825ff230 r replacements +ffffffff8260293f r apollo_pio_rec +ffffffff8264eea7 r apollo_udma33_tim +ffffffff82663fee r pp_r600_decoded_lanes +ffffffff8269a159 r cmd680_setup_channel.udma_tbl +ffffffff826a260b r apollo_udma100_tim +ffffffff826a2611 r cmd0646_9_tim_udma +ffffffff826b0a92 r substchar +ffffffff827065d1 r apollo_udma133_tim +ffffffff827065d8 r apollo_udma66_tim +ffffffff82706602 r cy_pio_rec +ffffffff8270bce0 R drm_ca +ffffffff8270bd08 R drm_filtops +ffffffff8270bd38 R drmread_filtops +ffffffff8270c000 r vga_emulops +ffffffff8270c048 R vga_stdscreen +ffffffff8270c078 R vga_stdscreen_mono +ffffffff8270c0a8 R vga_stdscreen_bf +ffffffff8270c0d8 R vga_40lscreen +ffffffff8270c108 R vga_40lscreen_mono +ffffffff8270c138 R vga_40lscreen_bf +ffffffff8270c168 R vga_50lscreen +ffffffff8270c198 R vga_50lscreen_mono +ffffffff8270c1c8 R vga_50lscreen_bf +ffffffff8270c1f8 R vga_screenlist +ffffffff8270c208 R vga_screenlist_mono +ffffffff8270c218 R vga_accessops +ffffffff8270c278 r i945_wm_info +ffffffff8270c2b8 r bgansitopc +ffffffff8270c2c0 r pctoansi +ffffffff8270c300 r sdma_offsets +ffffffff8270c300 r sdma_offsets +ffffffff8270c338 r iha_rate_tbl +ffffffff8270c370 r i830_a_wm_info +ffffffff8270c3a8 r gen9_edram_size_mb.ways +ffffffff8270c408 r aggr_periodic_times +ffffffff8270c500 r michael_final.pad +ffffffff8270c528 r rt_copysa.maskarray +ffffffff8270c530 r i915_wm_info +ffffffff8270c538 r amdgpu_ih_clientid_jpeg +ffffffff8270c538 r amdgpu_ih_clientid_uvds +ffffffff8270c538 r amdgpu_ih_clientid_vcns +ffffffff8270c538 r amdgpu_ih_clientid_vcns +ffffffff8270c538 r amdgpu_ih_clientid_vcns +ffffffff8270c568 r jsl_ehl_revids +ffffffff8270c578 r vga_setfontset.cmaptabb +ffffffff8270c5e8 r i830_bc_wm_info +ffffffff8270c650 r hsw_activate_psr2.map +ffffffff8270c658 r tgl_revids +ffffffff8270c690 r __drm_universal_plane_init.default_modifiers +ffffffff8270c6a0 r iwn_tid2fifo +ffffffff8270c6b8 r vga_setfontset.cmaptaba +ffffffff8270c6c0 r crtc_offsets +ffffffff8270c6c0 r crtc_offsets +ffffffff8270c6c0 r crtc_offsets +ffffffff8270c768 r rtwn_r88e_get_rssi.cckoff +ffffffff8270d000 R edid_vendors +ffffffff8270d2c0 R edid_nvendors +ffffffff8270d2d0 R edid_products +ffffffff8270d330 R edid_nproducts +ffffffff8270d340 r _edid_modes +ffffffff8270e000 R videomode_list +ffffffff8270f080 R videomode_count +ffffffff82710000 r ahc_hard_errors +ffffffff82710080 r critical_sections +ffffffff827100b0 r patches +ffffffff82710d50 r seqprog +ffffffff82712000 r ahc_switch +ffffffff82713000 r termstat_strings +ffffffff82713020 r critical_sections +ffffffff82713060 r seqprog +ffffffff82713d50 r patches +ffffffff82715000 r ahd_switch +ffffffff82716000 R aic_switch +ffffffff82717000 R adw_switch +ffffffff82718000 R gdt_switch +ffffffff82719000 R twe_switch +ffffffff8271a000 R ciss_switch +ffffffff8271a030 R ciss_level +ffffffff8271a050 R ciss_stat +ffffffff8271b000 R ami_switch +ffffffff8271b028 R ami_raw_switch +ffffffff8271c000 R mfi_switch +ffffffff8271c028 R mfi_pd_switch +ffffffff8271c050 r mfi_iop_xscale +ffffffff8271c080 r mfi_iop_ppc +ffffffff8271c0b0 r mfi_iop_gen2 +ffffffff8271c0e0 r mfi_iop_skinny +ffffffff8271c110 r mfi_bbu_indicators +ffffffff8271d000 R qlw_switch +ffffffff8271e000 R isp_2100_risc_code +ffffffff82730bf0 R isp_2200_risc_code +ffffffff82743990 R isp_2300_risc_code +ffffffff8275d408 R qla_switch +ffffffff8275d430 r qla_regs_2100 +ffffffff8275d460 r qla_regs_2200 +ffffffff8275d490 r qla_regs_23XX +ffffffff8275e000 R ahci_atascsi_methods +ffffffff8275f000 R nvme_switch +ffffffff8275f028 r nvme_ops +ffffffff82760000 R mpi_switch +ffffffff82760060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff82760090 r chv_oa_mux_regs +ffffffff827600b0 r fiji_clock_stretcher_lookup_table +ffffffff827600b0 r tonga_clock_stretcher_lookup_table +ffffffff827600d0 r iosf_pci_devices +ffffffff827600f0 r link_speed +ffffffff827600f0 r link_speed +ffffffff82760130 r drm_fb_xfrm.default_dst_pitch +ffffffff82760130 r non_supported_protection +ffffffff82760140 r tgl_uy_revids +ffffffff827602a0 r bwi_phy_noise_11g_rev1 +ffffffff82760310 r cardslot_process_event.antonym_ev +ffffffff827603a0 r gen11_oa_mux_regs +ffffffff82760440 r dpia_to_preferred_enc_id_table +ffffffff827604b0 r ddr2_cycle_tenths +ffffffff82760520 r rtw_intr_rx.ratetbl +ffffffff827605a0 r abm_config +ffffffff82760620 r getbootinfo.ports +ffffffff82760670 r reg_offsets +ffffffff82760680 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff82760690 r glk_revids +ffffffff827606a0 r init_non_clock_fields.look_up +ffffffff827606b0 r uftdi_8u232am_getrate.roundoff +ffffffff82760710 r zyd_rx_data.rates +ffffffff82760730 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff82760760 r intel_engine_init_tlb_invalidation.gen8_regs +ffffffff82760790 r bwi_phy_noise_11g +ffffffff827607a0 r hpt366_pio +ffffffff82760800 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff82760820 r ether_crc32_be_update.rev +ffffffff82760820 r rtw_grf5101_mac_crypt.caesar +ffffffff82760870 r snb_b_fdi_train_param +ffffffff82760940 r intel_hpll_vco.elk_vco +ffffffff82760960 r icl_revids +ffffffff827609c0 r pin_offsets +ffffffff827609e0 r amdgpu_ih_srcid_jpeg +ffffffff82760a20 r firmware_list +ffffffff82760a80 r atom_arg_shift +ffffffff82760a80 r atom_arg_shift +ffffffff82760ac0 r pf_syncookie_wstab +ffffffff82760ae0 r ieee80211_media_init.mopts +ffffffff82760b40 r add_entropy_words.twist_table +ffffffff82760be0 r urtw_8225v2_txpwr_cck +ffffffff82760c00 r bwfm_pci_prio2fifo +ffffffff82760c00 r ieee80211_up_to_ac.up_to_ac +ffffffff82760cc0 r paritytab +ffffffff82760cc0 r x86emu_parity_tab +ffffffff82760ce0 r legacy_connector_convert +ffffffff82760d20 r gen7_oa_mux_regs +ffffffff82760d40 r hsw_oa_mux_regs +ffffffff82760d60 r notetab +ffffffff82760d80 r urtw_8225v2_txpwr_cck_ch14 +ffffffff82760da0 r bwi_rf_calibval.rf_calibvals +ffffffff82760e40 r pf_syncookie_msstab +ffffffff82760ea0 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff82760f00 r uath_wme_init.uath_wme_11g +ffffffff82760f40 r gen7_oa_b_counters +ffffffff82761140 r rtwn_iq_calib_run.reg_adda +ffffffff82761180 r atom_def_dst +ffffffff82761180 r atom_def_dst +ffffffff827611c0 r sha256_initial_hash_value +ffffffff82761220 r otus_edca_def +ffffffff82761240 r intel_hpll_vco.blb_vco +ffffffff82761320 r epic_pci_subsys_info +ffffffff82761340 r kbl_revids +ffffffff82761360 r atom_arg_mask +ffffffff82761360 r atom_arg_mask +ffffffff827613c0 r butmap +ffffffff82761400 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff82761440 r comsoft.lsrmap +ffffffff82761480 r xgmi3x16_pcs_err_noncorrectable_mask_reg_aldebaran +ffffffff827614a0 r tulip_mii_phy_readspecific.table +ffffffff82761540 r intel_hpll_vco.pnv_vco +ffffffff827615a0 r dmapageport +ffffffff82761660 r intel_hpll_vco.ctg_vco +ffffffff82761720 r drm_calculate_luminance_range.pre_computed_values +ffffffff82762000 R sili_atascsi_methods +ffffffff82763000 R ncr53c9x_switch +ffffffff82764000 r scf_period +ffffffff82765000 R siop_script +ffffffff827655a0 R lun_switch +ffffffff827655d0 R tag_switch +ffffffff82765660 R load_dsa +ffffffff827656c4 R siop_led_on +ffffffff827656cc R siop_led_off +ffffffff827656d8 R siop_switch +ffffffff82766000 R ep_vortex_media +ffffffff82766100 R ep_default_to_media +ffffffff82767000 R wi_card_ident +ffffffff82769000 R ucode_table +ffffffff8276a000 r re_revisions +ffffffff8276a290 r re_kstats_tpl +ffffffff8276c000 R smc91cxx_media +ffffffff8276c010 R smc91cxx_mii_bitbang_ops +ffffffff8276d000 R dl10019_mii_bitbang_ops +ffffffff8276d028 R dl10022_mii_bitbang_ops +ffffffff8276e000 R ax88190_mii_bitbang_ops +ffffffff82770000 R ac97_audio_default +ffffffff82770020 R ac97_on_off +ffffffff82770324 R ac97_mic_select +ffffffff82770628 R ac97_mono_select +ffffffff8277092c R ac97_source +ffffffff82770c30 R ac97_volume_stereo +ffffffff82770c4c R ac97_volume_mono +ffffffff82770c70 R source_info +ffffffff82771470 R ac97_ad +ffffffff82771580 R ac97_ak +ffffffff82771610 R ac97_av +ffffffff82771750 R ac97_rl +ffffffff827717a0 R ac97_cm +ffffffff82771820 R ac97_cr +ffffffff82771840 R ac97_cs +ffffffff82771920 R ac97_cx +ffffffff82771980 R ac97_dt +ffffffff827719a0 R ac97_em +ffffffff827719d0 R ac97_es +ffffffff827719f0 R ac97_is +ffffffff82771a10 R ac97_ic +ffffffff82771a90 R ac97_it +ffffffff82771ac0 R ac97_ns +ffffffff82771b80 R ac97_ps +ffffffff82771bb0 R ac97_sl +ffffffff82771bd0 R ac97_st +ffffffff82771d20 R ac97_vi +ffffffff82771d50 R ac97_tt +ffffffff82771dd0 R ac97_ti +ffffffff82771df0 R ac97_wb +ffffffff82771e10 R ac97_wo +ffffffff82771ea0 R ac97_ym +ffffffff82771ef0 R ac97_vendors +ffffffff827721f0 R ac97enhancement +ffffffff827722f0 R ac97feature +ffffffff82773000 R lm_chips +ffffffff82773020 R lm78_sensors +ffffffff827731a0 R w83627hf_sensors +ffffffff827733a0 R w83627ehf_sensors +ffffffff827735c0 R w83627dhg_sensors +ffffffff827737c0 R nct6776f_sensors +ffffffff82773a00 R nct6779d_sensors +ffffffff82773d60 R w83637hf_sensors +ffffffff82773f20 R w83697hf_sensors +ffffffff827740c0 R w83781d_sensors +ffffffff82774280 R w83782d_sensors +ffffffff82774480 R w83783s_sensors +ffffffff82774600 R w83791d_sensors +ffffffff82774860 R w83792d_sensors +ffffffff82774ae0 R as99127f_sensors +ffffffff82775000 r ar5k_known_products +ffffffff82775110 r ar5111_gain_opt +ffffffff827751e0 r ar5112_gain_opt +ffffffff827752b0 r ar5k_5ghz_channels +ffffffff82775a00 r ar5k_2ghz_channels +ffffffff82775f10 r ar5111_rf +ffffffff82776350 r ar5112a_rf +ffffffff82776890 r ar5112_rf +ffffffff82776da0 r ar5413_rf +ffffffff827771b0 r ar2413_rf +ffffffff827774d0 r ar2425_rf +ffffffff82777830 r ar5111_rfg +ffffffff82777b30 r ar5112_rfg +ffffffff82777e30 r ar5413_rfg +ffffffff82778130 r ar2413_rfg +ffffffff82778430 r ar5k_rt_11a +ffffffff82778552 r ar5k_rt_11b +ffffffff82778674 r ar5k_rt_11g +ffffffff82778796 r ar5k_rt_xr +ffffffff82779000 r ar5210_ini +ffffffff8277a000 r ar5211_mode +ffffffff8277a2c0 r ar5211_ini +ffffffff8277aad0 r ar5211_rf +ffffffff8277b000 r ar5212_pcie +ffffffff8277b080 r ar5212_mode +ffffffff8277b310 r ar5212_ini +ffffffff8277bc80 r ar5212_ar5111_mode +ffffffff8277bf20 r ar5212_ar5112_mode +ffffffff8277c1b0 r ar5413_mode +ffffffff8277cb10 r ar2413_mode +ffffffff8277d430 r ar2425_mode +ffffffff8277dd90 r ar5111_bbgain +ffffffff8277e090 r ar5112_bbgain +ffffffff8277f000 r athn_5ghz_chans +ffffffff8277f020 r athn_rates +ffffffff82780000 r athn_rates +ffffffff82781000 r ar9160_ini +ffffffff82781068 r ar5416_ini +ffffffff827810d0 r ar5416_serdes +ffffffff827810e8 r ar9160_1_1_addac +ffffffff827810f8 r ar9160_1_0_addac +ffffffff82781108 r ar5416_2_2_addac +ffffffff82781118 r ar5416_2_1_addac +ffffffff82781128 r ar5416_set_power_calib.chainoffset +ffffffff82781140 r ar9160_bank6tpc_vals +ffffffff827811c0 r ar5416_bank6tpc_vals +ffffffff82781240 r ar5416_bb_rfgain_vals_2g +ffffffff82781340 r ar5416_bb_rfgain_vals_5g +ffffffff82781440 r ar5416_bank6_vals +ffffffff827814c0 r ar9160_regs +ffffffff82781540 r ar9160_vals_5g20 +ffffffff82781640 r ar9160_vals_5g40 +ffffffff82781740 r ar9160_vals_2g40 +ffffffff82781840 r ar9160_vals_2g20 +ffffffff82781940 r ar9160_cm_regs +ffffffff82781c30 r ar9160_cm_vals +ffffffff82782210 r ar5416_regs +ffffffff82782290 r ar5416_vals_5g20 +ffffffff82782390 r ar5416_vals_5g40 +ffffffff82782490 r ar5416_vals_2g40 +ffffffff82782590 r ar5416_vals_2g20 +ffffffff82782690 r ar5416_cm_regs +ffffffff82782980 r ar5416_cm_vals +ffffffff82782f60 r ar5416_serdes_regs +ffffffff82782f90 r ar5416_serdes_vals +ffffffff82782fc0 r ar9160_1_1_addac_vals +ffffffff82783040 r ar9160_1_0_addac_vals +ffffffff827830c0 r ar5416_2_2_addac_vals +ffffffff82783150 r ar5416_2_1_addac_vals +ffffffff82784000 r ar9280_2_0_ini +ffffffff82784068 r ar9280_2_0_serdes +ffffffff82784080 r ar9280_2_0_rx_gain_23db_backoff +ffffffff827840a0 r ar9280_2_0_rx_gain_13db_backoff +ffffffff827840c0 r ar9280_2_0_rx_gain +ffffffff827840e0 r ar9280_2_0_tx_gain_high_power +ffffffff82784100 r ar9280_2_0_tx_gain +ffffffff82784120 r ar9280_init_from_rom.chainoffset +ffffffff82784130 r ar9280_2_0_regs +ffffffff82784190 r ar9280_2_0_vals_5g20 +ffffffff82784250 r ar9280_2_0_vals_5g40 +ffffffff82784310 r ar9280_2_0_vals_2g40 +ffffffff827843d0 r ar9280_2_0_vals_2g20 +ffffffff82784490 r ar9280_2_0_cm_regs +ffffffff82784740 r ar9280_2_0_cm_vals +ffffffff82784c90 r ar9280_2_0_fast_clock_regs +ffffffff82784cb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff82784cf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff82784d30 r ar9280_2_0_serdes_regs +ffffffff82784d60 r ar9280_2_0_serdes_vals +ffffffff82784d90 r ar9280_2_0_rx_gain_regs +ffffffff82784ea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff827850b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff827852c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff827854d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g +ffffffff827856e0 r ar9280_2_0_rx_gain_vals_5g +ffffffff827858f0 r ar9280_2_0_rx_gain_vals_2g +ffffffff82785b00 r ar9280_2_0_tx_gain_regs +ffffffff82785b40 r ar9280_2_0_tx_gain_high_power_vals_5g +ffffffff82785bc0 r ar9280_2_0_tx_gain_high_power_vals_2g +ffffffff82785c40 r ar9280_2_0_tx_gain_vals_5g +ffffffff82785cc0 r ar9280_2_0_tx_gain_vals_2g +ffffffff82786000 r ar9271_ini +ffffffff82786068 r ar9285_1_2_ini +ffffffff827860d0 r ar9280_2_0_serdes +ffffffff827860e8 r ar9271_tx_gain_high_power +ffffffff82786108 r ar9271_tx_gain +ffffffff82786128 r ar9285_2_0_tx_gain_high_power +ffffffff82786148 r ar9285_2_0_tx_gain +ffffffff82786168 r ar9285_1_2_tx_gain_high_power +ffffffff82786188 r ar9285_1_2_tx_gain +ffffffff827861b0 r ar9271_regs +ffffffff82786410 r ar9271_vals_2g40 +ffffffff827868d0 r ar9271_vals_2g20 +ffffffff82786d90 r ar9271_cm_regs +ffffffff82787020 r ar9271_cm_vals +ffffffff82787540 r ar9285_1_2_regs +ffffffff827877a0 r ar9285_1_2_vals_2g40 +ffffffff82787c60 r ar9285_1_2_vals_2g20 +ffffffff82788120 r ar9285_1_2_cm_regs +ffffffff827883a0 r ar9285_1_2_cm_vals +ffffffff82788890 r ar9280_2_0_serdes_regs +ffffffff827888c0 r ar9280_2_0_serdes_vals +ffffffff827888f0 r ar9271_tx_gain_regs +ffffffff82788940 r ar9271_tx_gain_high_power_vals_2g +ffffffff827889d0 r ar9271_tx_gain_vals_2g +ffffffff82788a60 r ar9285_1_2_tx_gain_regs +ffffffff82788ab0 r ar9285_2_0_tx_gain_high_power_vals_2g +ffffffff82788b50 r ar9285_2_0_tx_gain_vals_2g +ffffffff82788bf0 r ar9285_1_2_tx_gain_high_power_vals_2g +ffffffff82788c90 r ar9285_1_2_tx_gain_vals_2g +ffffffff82789000 r ar9287_1_1_ini +ffffffff82789068 r ar9280_2_0_serdes +ffffffff82789080 r ar9287_1_1_rx_gain +ffffffff827890a0 r ar9287_1_1_tx_gain +ffffffff827890c0 r ar9287_1_1_regs +ffffffff82789120 r ar9287_1_1_vals_2g40 +ffffffff827891d0 r ar9287_1_1_vals_2g20 +ffffffff82789280 r ar9287_1_1_cm_regs +ffffffff82789560 r ar9287_1_1_cm_vals +ffffffff82789b20 r ar9280_2_0_serdes_regs +ffffffff82789b50 r ar9280_2_0_serdes_vals +ffffffff82789b80 r ar9287_1_1_rx_gain_regs +ffffffff82789d90 r ar9287_1_1_rx_gain_vals_2g +ffffffff8278a1a0 r ar9287_1_1_tx_gain_regs +ffffffff8278a200 r ar9287_1_1_tx_gain_vals_2g +ffffffff8278b000 r athn_rates +ffffffff8278c000 r ar9485_1_1_ini +ffffffff8278c068 r ar9485_1_1_serdes +ffffffff8278c080 r ar9380_2_2_ini +ffffffff8278c0e8 r ar9380_2_2_serdes +ffffffff8278c100 r ar9380_2_2_rx_gain_wo_xlna +ffffffff8278c120 r ar9380_2_2_rx_gain +ffffffff8278c140 r ar9485_1_1_rx_gain +ffffffff8278c160 r ar9380_2_2_tx_gain_high_ob_db +ffffffff8278c180 r ar9380_2_2_tx_gain_low_ob_db +ffffffff8278c1a0 r ar9380_2_2_tx_gain_high_power +ffffffff8278c1c0 r ar9380_2_2_tx_gain +ffffffff8278c1e0 r ar9485_1_1_tx_gain +ffffffff8278c200 r ar9485_1_1_regs +ffffffff8278c270 r ar9485_1_1_vals_2g40 +ffffffff8278c350 r ar9485_1_1_vals_2g20 +ffffffff8278c430 r ar9485_1_1_cm_regs +ffffffff8278c720 r ar9485_1_1_cm_vals +ffffffff8278cd00 r ar9485_1_1_serdes_regs +ffffffff8278cd0c r ar9485_1_1_serdes_vals +ffffffff8278cd20 r ar9380_2_2_regs +ffffffff8278cdb0 r ar9380_2_2_vals_5g20 +ffffffff8278ced0 r ar9380_2_2_vals_5g40 +ffffffff8278cff0 r ar9380_2_2_vals_2g40 +ffffffff8278d110 r ar9380_2_2_vals_2g20 +ffffffff8278d230 r ar9380_2_2_cm_regs +ffffffff8278d5d0 r ar9380_2_2_cm_vals +ffffffff8278dd00 r ar9380_2_2_fast_clock_regs +ffffffff8278dd20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff8278dd50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff8278dd74 r ar9380_2_2_serdes_regs +ffffffff8278dd80 r ar9380_2_2_serdes_vals +ffffffff8278dd90 r ar9380_2_2_rx_gain_regs +ffffffff8278df90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff8278e390 r ar9380_2_2_rx_gain_vals +ffffffff8278e790 r ar9485_1_1_rx_gain_regs +ffffffff8278e890 r ar9485_1_1_rx_gain_vals +ffffffff8278ea90 r ar9380_2_2_tx_gain_regs +ffffffff8278eb60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff8278ed00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff8278eea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff8278f040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff8278f1e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff8278f380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff8278f520 r ar9380_2_2_tx_gain_vals_5g +ffffffff8278f6c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff8278f860 r ar9485_1_1_tx_gain_regs +ffffffff8278f8f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff8278fa10 r ar9380_def_rom +ffffffff8278fe50 r ar9380_def_rom_h112 +ffffffff82790290 r ar9380_def_rom_h116 +ffffffff827906d0 r ar9380_def_rom_x112 +ffffffff82790b10 r ar9380_def_rom_x113 +ffffffff82791000 R atw_txthresh_tab_lo +ffffffff82791050 R atw_txthresh_tab_hi +ffffffff827910a0 r atw_attach.empty_macaddr +ffffffff827910b0 r atw_attach.type_strings +ffffffff827910d0 r atw_rfmd2958_ifn +ffffffff82791110 r atw_rfmd2958_rf1r +ffffffff82791150 r atw_rxintr.rate_tbl +ffffffff82792000 r rtw_identify_sta.empty_macaddr +ffffffff82793000 r rtwn_set_key.etherzeroaddr +ffffffff82793010 r rtl8188eu_rf_prog +ffffffff82793030 r rtl8188ftv_rf_prog +ffffffff82793050 r rtl8192e_rf_prog +ffffffff82793080 r rtl8188ce_rf_prog +ffffffff827930a0 r rtl8188ru_rf_prog +ffffffff827930c0 r rtl8188cu_rf_prog +ffffffff827930e0 r rtl8192ce_rf_prog +ffffffff82793110 r rtl8188ru_txagc +ffffffff82793170 r rtl8188eu_rf_regs +ffffffff82793230 r rtl8188eu_rf_vals +ffffffff827933b0 r rtl8188ftv_rf_regs +ffffffff82793490 r rtl8188ftv_rf_vals +ffffffff82793640 r rtl8192e_rf_regs +ffffffff82793710 r rtl8192e_rf_vals +ffffffff827938b0 r rtl8192e_rf2_regs +ffffffff82793950 r rtl8192e_rf2_vals +ffffffff82793a90 r rtl8192ce_rf1_regs +ffffffff82793bb0 r rtl8188ce_rf_vals +ffffffff82793df0 r rtl8188ru_rf_vals +ffffffff82794030 r rtl8188cu_rf_vals +ffffffff82794270 r rtl8192ce_rf1_vals +ffffffff827944b0 r rtl8192ce_rf2_regs +ffffffff82794500 r rtl8192ce_rf2_vals +ffffffff827945a0 r rtl8192cu_txagc +ffffffff82795000 r rt2560_rf2522_r2 +ffffffff82795040 r rt2560_rf2524_r2 +ffffffff82795080 r rt2560_rf2525_hi_r2 +ffffffff827950c0 r rt2560_rf2525_r2 +ffffffff82795100 r rt2560_rf2525e_r2 +ffffffff82795140 r rt2560_rf2526_hi_r2 +ffffffff82795180 r rt2560_rf2526_r2 +ffffffff827951c0 r rt2560_def_bbp +ffffffff82795200 r rt2560_def_mac +ffffffff82796000 r rt2661_rf5225_1 +ffffffff82796300 r rt2661_rf5225_2 +ffffffff82796600 r rt2661_def_bbp +ffffffff82796640 r rt2661_def_mac +ffffffff82797000 r rt2860_rf2850 +ffffffff82797430 r rt2860_rates +ffffffff827974f0 r rt3572_def_rf +ffffffff82797530 r rt3090_def_rf +ffffffff82797560 r rt5392_def_rf +ffffffff827975e0 r rt3290_def_rf +ffffffff82797640 r rt5390_def_rf +ffffffff827976c0 r rt5390_def_bbp +ffffffff827976f0 r rt2860_def_mac +ffffffff82799000 r acx111_reg +ffffffff82799040 r acx111_rate_map +ffffffff8279a000 r acx100_reg +ffffffff8279a040 r acx100_txpower_rfmd +ffffffff8279a060 r gen8_rcs_offsets +ffffffff8279a090 r acx100_txpower_maxim +ffffffff8279a0b0 r mtl_rcs_offsets +ffffffff8279a0f0 r digits +ffffffff8279a0f0 r pppdumpb.digits +ffffffff8279a0f0 r pppdumpm.digits +ffffffff8279a140 r hangpic +ffffffff8279a180 r gen11_rcs_offsets +ffffffff8279a1b0 r xehp_rcs_offsets +ffffffff8279a1e0 r dg2_rcs_offsets +ffffffff8279a220 r dg2_xcs_offsets +ffffffff8279a250 r gen12_xcs_offsets +ffffffff8279b000 r trinity_override_mgpg_sequences +ffffffff8279b3c0 r voltage_swing_to_pre_emphasis +ffffffff8279b3d0 r sgpr_init_compute_shader +ffffffff8279b4a0 r intel_hpll_vco.cl_vco +ffffffff8279b4c0 r vgpr_init_compute_shader +ffffffff8279c000 r malo_cmd_string.cmds +ffffffff8279c0b0 r malo_cmd_string_result.results +ffffffff8279d000 R bwi_vendor_led_act +ffffffff8279d00c R bwi_default_led_act +ffffffff8279d010 R bwi_led_duration +ffffffff8279d380 r bwi_sup_bphy +ffffffff8279d3c0 r bwi_phy_freq_11g_rev1 +ffffffff8279d5c0 r bwi_phy_rotor_11g_rev1 +ffffffff8279d6a0 r bwi_phy_noise_scale_11g_rev2 +ffffffff8279d6e0 r bwi_phy_noise_scale_11g_rev7 +ffffffff8279d720 r bwi_phy_noise_scale_11g +ffffffff8279d760 r bwi_phy_sigma_sq_11g_rev2 +ffffffff8279d7d0 r bwi_phy_sigma_sq_11g_rev7 +ffffffff8279d840 r bwi_phy_delay_11g_rev1 +ffffffff8279d920 r bwi_rf_get_gains.save_phy_regs +ffffffff8279d940 r bwi_rf_lo_find.map +ffffffff8279d960 r bwi_txpower_map_11b +ffffffff8279d9a0 r bwi_txpower_map_11g +ffffffff8279d9e0 r _bwi_rf_lo_update_11g.rf_atten_list +ffffffff8279da20 r _bwi_rf_lo_update_11g.rf_atten_init_list +ffffffff8279da60 r _bwi_rf_lo_update_11g.rf_lo_measure_order +ffffffff8279daa0 r bwi_rf_set_nrssi_ofs_11g.save_phy_comm_regs +ffffffff8279dac0 r bwi_bbpid_map +ffffffff8279daf0 r bwi_regwin_count +ffffffff8279db40 r bwi_clkfreq +ffffffff8279db58 r bwi_zero_addr +ffffffff8279e000 R uhci_bus_methods +ffffffff8279e030 R uhci_root_ctrl_methods +ffffffff8279e060 R uhci_root_intr_methods +ffffffff8279e090 R uhci_device_ctrl_methods +ffffffff8279e0c0 R uhci_device_intr_methods +ffffffff8279e0f0 R uhci_device_bulk_methods +ffffffff8279e120 R uhci_device_isoc_methods +ffffffff8279e150 R uhci_devd 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ehci_confd +ffffffff827a0175 R ehci_ifcd +ffffffff827a017e R ehci_endpd +ffffffff827a0185 R ehci_hubd +ffffffff827a1000 R xhci_bus_methods +ffffffff827a1030 R xhci_root_ctrl_methods +ffffffff827a1060 R xhci_root_intr_methods +ffffffff827a1090 R xhci_device_ctrl_methods +ffffffff827a10c0 R xhci_device_intr_methods +ffffffff827a10f0 R xhci_device_bulk_methods +ffffffff827a1120 R xhci_device_isoc_methods +ffffffff827a1150 R xhci_devd +ffffffff827a1162 R xhci_confd +ffffffff827a116b R xhci_ifcd +ffffffff827a1174 R xhci_endpd +ffffffff827a117b R xhci_endpcd +ffffffff827a1181 R xhci_hubd +ffffffff827a4000 R radio_ca +ffffffff827a5000 R ipmi_ca +ffffffff827a6000 R vscsi_ca +ffffffff827a6028 R vscsi_switch +ffffffff827a6050 R vscsi_filtops +ffffffff827a7000 R mpath_ca +ffffffff827a7028 R mpath_switch +ffffffff827a8000 R softraid_ca +ffffffff827a8028 R sr_switch +ffffffff827a9000 r spdmem_basic_types +ffffffff827a90a0 r spdmem_parity_types +ffffffff827a90e0 r spdmem_ddr4_decode.ddr4_chipsize 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lintomulaw +ffffffff827ba000 R randomread_filtops +ffffffff827ba030 R randomwrite_filtops +ffffffff827bb000 R video_ca +ffffffff827bb028 R video_filtops +ffffffff827bc000 R cd9660_vfsops +ffffffff827bd000 R cd9660_vops +ffffffff827bd110 R cd9660_specvops +ffffffff827bd220 R cd9660_fifovops +ffffffff827bd330 R cd9660read_filtops +ffffffff827bd360 R cd9660write_filtops +ffffffff827bd390 R cd9660vnode_filtops +ffffffff827be000 R udf_vfsops +ffffffff827bf000 R udf_vops +ffffffff827bf110 r mon_lens +ffffffff827c0000 r month_days +ffffffff827c1000 R execsw +ffffffff827c2000 r shstrtab +ffffffff827c3000 R copyright +ffffffff827c30c0 r initpaths +ffffffff827c4000 R sysent +ffffffff827c6000 R bufq_impls +ffffffff827c7000 R kqueueops +ffffffff827c7038 R kqread_filtops +ffffffff827c7068 R proc_filtops +ffffffff827c7098 R file_filtops +ffffffff827c70c8 R timer_filtops +ffffffff827c7100 R sysfilt_ops +ffffffff827c7148 R seltrue_filtops +ffffffff827c7178 R dead_filtops +ffffffff827c71a8 R badfd_filtops +ffffffff827c71d8 r mutex_klistops +ffffffff827c71f0 r rwlock_klistops +ffffffff827c8000 R kv_exec +ffffffff827c9000 R addrmask +ffffffff827ca000 r rw_ops +ffffffff827cb000 r proc_printit.pstat +ffffffff827cc000 R pledge_syscalls +ffffffff827cca60 r pledgenames +ffffffff827cccb0 r pledgereq +ffffffff827cd000 r unvname_rbt_RBT_INFO +ffffffff827cd018 R unvname_rbt_RBT_TYPE +ffffffff827ce000 R sig_filtops +ffffffff827ce030 R sigprop +ffffffff827cf000 R kern_vars +ffffffff827cf2f0 R hw_vars +ffffffff827d0000 R tc_vars +ffffffff827d1000 r sys_gettimeofday.zerotz +ffffffff827d2000 r taskq_sys_name +ffffffff827d2006 r taskq_sys_mp_name +ffffffff827d2010 R systq +ffffffff827d2018 R systqmp +ffffffff827d4000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff827d4010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff827d4020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff827d4030 r gpt_get_fstype.gpt_uuid_linux +ffffffff827d4040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff827d4050 r gpt_get_fstype.gpt_uuid_unused +ffffffff827d4060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff827d4070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff827d5000 r hiballoc_addr_RBT_INFO +ffffffff827d5018 R hiballoc_addr_RBT_TYPE +ffffffff827d6000 R logread_filtops +ffffffff827d7000 r phtree_RBT_INFO +ffffffff827d7018 R phtree_RBT_TYPE +ffffffff827d7020 r pool_lock_ops_rw +ffffffff827d7058 r pool_lock_ops_mtx +ffffffff827d8000 r pselregister.evf +ffffffff827d800c r pselregister.evff +ffffffff827d9000 R pipe_rfiltops +ffffffff827d9030 R pipe_wfiltops +ffffffff827d9060 R pipe_efiltops +ffffffff827d9090 r pipeops +ffffffff827da000 R socketops +ffffffff827db000 R sysvsem_vars +ffffffff827dc000 R char_type +ffffffff827dc100 R ttyread_filtops +ffffffff827dc130 R ttywrite_filtops +ffffffff827dc160 R ttyexcept_filtops +ffffffff827dd000 R ptcread_filtops +ffffffff827dd030 R ptcwrite_filtops +ffffffff827dd060 R ptcexcept_filtops +ffffffff827df000 R domains +ffffffff827e0000 R unixdomain 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icl_program_input_csc.input_csc_matrix -ffffffff82a83110 r icl_hdr_plane_formats -ffffffff82a83190 r icl_sdr_y_plane_formats -ffffffff82a831f0 r icl_sdr_uv_plane_formats -ffffffff82a83260 r glk_planar_formats -ffffffff82a832b0 r skl_plane_formats -ffffffff82a832f0 r skl_planar_formats -ffffffff82a84000 r skl_wm_funcs -ffffffff82a84040 r intel_dbuf_funcs -ffffffff82a84050 r adlp_allowed_dbufs -ffffffff82a840c0 r dg2_allowed_dbufs -ffffffff82a84120 r tgl_allowed_dbufs -ffffffff82a84180 r icl_allowed_dbufs -ffffffff82a85000 r intel_dsi_funcs -ffffffff82a85020 r intel_dsi_host_ops -ffffffff82a85038 r intel_dsi_connector_funcs -ffffffff82a850b0 r intel_dsi_connector_helper_funcs -ffffffff82a86000 r lfsr_converts -ffffffff82a87000 r clflush_ops +ffffffff8285f000 r inflate_table.lbase +ffffffff8285f040 r inflate_table.lext +ffffffff8285f080 r inflate_table.dbase +ffffffff8285f0c0 r inflate_table.dext +ffffffff82860000 r configuration_table +ffffffff82861000 R z_errmsg +ffffffff82862000 R _dist_code +ffffffff82862200 R _length_code +ffffffff82862300 r static_l_desc +ffffffff82862320 r static_d_desc +ffffffff82862340 r static_bl_desc +ffffffff82862360 r static_ltree +ffffffff828627e0 r static_dtree +ffffffff82862860 r extra_lbits +ffffffff828628e0 r extra_dbits +ffffffff82862960 r extra_blbits +ffffffff828629b0 r bl_order +ffffffff828629d0 r base_length +ffffffff82862a50 r base_dist +ffffffff82863000 R nam2blk +ffffffff82864000 R chrtoblktbl +ffffffff828640c0 R nchrtoblktbl +ffffffff82865000 R cpuctl_vars +ffffffff82867000 R cpu_cpuid_features +ffffffff828671d0 R cpu_ecpuid_features +ffffffff82867260 R cpu_cpuid_ecxfeatures +ffffffff82867450 R cpu_ecpuid_ecxfeatures +ffffffff828675d0 R cpu_seff0_ebxfeatures +ffffffff828677a0 R cpu_seff0_ecxfeatures +ffffffff82867800 R cpu_seff0_edxfeatures +ffffffff828678a0 R cpu_tpm_eaxfeatures +ffffffff828678c0 R cpu_cpuid_perf_eax +ffffffff828678d0 R cpu_cpuid_apmi_edx +ffffffff828678f0 R cpu_amdspec_ebxfeatures +ffffffff828679a0 R cpu_xsave_extfeatures +ffffffff828679f0 R cpu_arch_cap_features +ffffffff82868000 R sigcode +ffffffff82868014 R sigcodecall +ffffffff82868016 R sigcoderet +ffffffff82868038 R esigcode +ffffffff82868038 R sigfill +ffffffff82868039 R sigfillsiz +ffffffff82868039 r esigfill +ffffffff8286803d r bogus_proc_pmap +ffffffff82868070 r spl_lowered +ffffffff828680a6 r intr_spl_lowered +ffffffff82868113 R _xrstor +ffffffff82868117 R _xrstors +ffffffff8286811b R _xsave +ffffffff8286811f R _xsaves +ffffffff82868123 R _xsaveopt +ffffffff82868127 R _pcid_set_reuse +ffffffff82868133 R _jmprax +ffffffff82868136 R _jmprax_len +ffffffff82868138 R _jmpr11 +ffffffff8286813c R _jmpr11_len +ffffffff8286813e R _jmpr13 +ffffffff82868142 R _jmpr13_len +ffffffff8286a000 r cpurevs +ffffffff8286a16c r amd64_errata_set5 +ffffffff8286a16e r amd64_errata_set1 +ffffffff8286a180 r amd64_errata_set8 +ffffffff8286a19f r amd64_errata_set6 +ffffffff8286a1a4 r amd64_errata_set7 +ffffffff8286a1ac r amd64_errata_set3 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rasops_cmap +ffffffff82878000 r reverse +ffffffff82878100 r ibm437_level1 +ffffffff82878230 r ibm437_level2_0 +ffffffff82878248 r ibm437_level2_1 +ffffffff82878260 r ibm437_level2_3 +ffffffff82878278 r ibm437_level2_32 +ffffffff82878290 r ibm437_level2_34 +ffffffff828782a8 r ibm437_level2_35 +ffffffff828782c0 r ibm437_level2_37 +ffffffff828782e0 r ibm437_chars_0 +ffffffff828783e0 r ibm437_chars_1 +ffffffff828783f0 r ibm437_chars_3 +ffffffff82878430 r ibm437_chars_32 +ffffffff82878460 r ibm437_chars_34 +ffffffff828784d0 r ibm437_chars_35 +ffffffff828784f0 r ibm437_chars_37 +ffffffff82879000 R mii_media_table +ffffffff8287a000 R nsphy_ca +ffffffff8287a028 R nsphy_funcs +ffffffff8287a040 r nsphys +ffffffff8287b000 R nsphyter_ca +ffffffff8287b028 R nsphyter_funcs +ffffffff8287b040 r nsphyterphys +ffffffff8287c000 R gentbi_ca +ffffffff8287c028 R gentbi_funcs +ffffffff8287d000 R qsphy_ca +ffffffff8287d028 R qsphy_funcs +ffffffff8287d040 r qsphys +ffffffff8287e000 R inphy_ca +ffffffff8287e028 R inphy_funcs +ffffffff8287e040 r inphys +ffffffff8287f000 R iophy_ca +ffffffff8287f028 R iophy_funcs +ffffffff8287f040 r iophys +ffffffff82880000 R eephy_ca +ffffffff82880028 R eephy_funcs +ffffffff82880040 r eephys +ffffffff82881000 R exphy_ca +ffffffff82881028 R exphy_funcs +ffffffff82882000 R rlphy_ca +ffffffff82882028 R rlphy_funcs +ffffffff82882040 r rlphys +ffffffff82883000 R lxtphy_ca +ffffffff82883028 R lxtphy_funcs +ffffffff82883040 R lxtphy971_funcs +ffffffff82883060 r lxtphys +ffffffff82884000 R luphy_ca +ffffffff82884028 R luphy_funcs +ffffffff82884040 r luphys +ffffffff82885000 R mtdphy_ca +ffffffff82885028 R mtdphy_funcs +ffffffff82885040 r mtdphys +ffffffff82886000 R icsphy_ca +ffffffff82886028 R icsphy_funcs +ffffffff82886040 r icsphys +ffffffff82887000 R sqphy_ca +ffffffff82887028 R sqphy_funcs +ffffffff82887040 r sqphys +ffffffff82888000 R tqphy_ca +ffffffff82888028 R tqphy_funcs +ffffffff82888040 r tqphys +ffffffff82889000 R ukphy_ca +ffffffff82889028 R ukphy_funcs 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hv_guid_ide +ffffffff828ba048 R hv_guid_scsi +ffffffff828ba058 R hv_guid_shutdown +ffffffff828ba068 R hv_guid_timesync +ffffffff828ba078 R hv_guid_heartbeat +ffffffff828ba088 R hv_guid_kvp +ffffffff828bb000 r kvp_pools +ffffffff828bc000 R hvn_ca +ffffffff828bd000 R hvs_ca +ffffffff828bd028 R hvs_switch +ffffffff828be000 r virtio_device_name +ffffffff828bf000 R vio_ca +ffffffff828bf030 r virtio_net_feature_names +ffffffff828c0000 R vioblk_ca +ffffffff828c0028 R vioblk_switch +ffffffff828c1000 R viomb_ca +ffffffff828c1030 r viomb_feature_names +ffffffff828c2000 R viornd_ca +ffffffff828c3000 R vioscsi_ca +ffffffff828c3028 R vioscsi_switch +ffffffff828c3050 R vioscsi_vq_names +ffffffff828c4000 R vmmci_ca +ffffffff828c5000 R pci_ca +ffffffff828c6000 r pci_quirks +ffffffff828c7000 R pci_subclass_prehistoric +ffffffff828c7050 R pci_subclass_mass_storage +ffffffff828c7160 R pci_subclass_network +ffffffff828c7250 R pci_subclass_display +ffffffff828c72d0 R pci_subclass_multimedia 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nvme_msi_blacklist +ffffffff828fb000 R ami_pci_ca +ffffffff828fb030 r ami_pci_subsys +ffffffff828fb270 r ami_pci_vendors +ffffffff828fc000 R mfi_pci_ca +ffffffff828fc030 r mfi_pci_devices +ffffffff828fd000 R mfii_ca +ffffffff828fd028 R mfii_switch +ffffffff828fd050 R mfii_pd_switch +ffffffff828fd078 R mfii_iop_thunderbolt +ffffffff828fd088 R mfii_iop_25 +ffffffff828fd098 R mfii_iop_35 +ffffffff828fd0b0 R mfii_devices +ffffffff828fd140 r mfi_bbu_indicators +ffffffff828fe000 R ips_ca +ffffffff828fe028 r ips_ids +ffffffff828fe040 r ips_chips +ffffffff828fe090 r ips_names +ffffffff828fe128 r ips_switch +ffffffff828fe150 r ips_pt_switch +ffffffff828ff000 R eap_ca +ffffffff828ff028 R eap1370_hw_if +ffffffff828ff0e0 R eap1371_hw_if +ffffffff828ff198 R eap_midi_hw_if +ffffffff828ff1d0 R eap_devices +ffffffff82900000 R auacer_pci_devices +ffffffff82900008 R auacer_ca +ffffffff82900030 R auacer_hw_if +ffffffff82901000 R auich_ca +ffffffff82901028 R auich_hw_if +ffffffff829010e0 r auich_devices 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pciide_promise_products +ffffffff8298dac0 R pciide_acard_products +ffffffff8298db10 R pciide_serverworks_products +ffffffff8298dbb0 R pciide_nvidia_products +ffffffff8298de80 R pciide_ite_products +ffffffff8298dea0 R pciide_ati_products +ffffffff8298df20 R pciide_jmicron_products +ffffffff8298df70 R pciide_phison_products +ffffffff8298df80 R pciide_rdc_products +ffffffff8298df90 R pciide_vendors +ffffffff8298e140 R pciide_pci_ca +ffffffff8298e168 R pciide_jmb_ca +ffffffff8298e190 r piix_isp_dma +ffffffff8298e193 r piix_rtc_dma +ffffffff8298e196 r apollo_pio_set +ffffffff8298e19b r cmd0643_9_data_tim_pio +ffffffff8298e1a0 r cmd0643_9_data_tim_dma +ffffffff8298e1a3 r cmd680_channel_map.init_val +ffffffff8298e1b1 r cmd680_setup_channel.udma2_tbl +ffffffff8298e1b8 r cmd680_setup_channel.dma_tbl +ffffffff8298e1be r cmd680_setup_channel.pio_tbl +ffffffff8298e1d0 r satalink_ba5_regmap +ffffffff8298e690 r sii3114_chansetup.channel_names +ffffffff8298e6b0 r cy_pio_pulse +ffffffff8298e6c0 r sis_udma133new_tim +ffffffff8298e6e0 r sis_pio133new_tim +ffffffff8298e6f4 r sis_dma133new_tim +ffffffff8298e700 r sis_udma66_tim +ffffffff8298e706 r sis_udma100new_tim +ffffffff8298e70c r sis_udma133old_tim +ffffffff8298e713 r sis_pio_act +ffffffff8298e718 r sis_pio_rec +ffffffff8298e71d r natsemi_pio_pulse +ffffffff8298e722 r natsemi_pio_recover +ffffffff8298e727 r natsemi_dma_pulse +ffffffff8298e72a r natsemi_dma_recover +ffffffff8298e730 r scx200_udma33 +ffffffff8298e73c r scx200_dma33 +ffffffff8298e750 r scx200_pio33 +ffffffff8298e778 r acer_udma +ffffffff8298e77e r acer_pio +ffffffff8298e790 r hpt370_pio +ffffffff8298e7a4 r hpt370_dma +ffffffff8298e7b0 r hpt370_udma +ffffffff8298e7d0 r hpt372_pio +ffffffff8298e7e4 r hpt372_dma +ffffffff8298e7f0 r hpt372_udma +ffffffff8298e80c r hpt366_dma +ffffffff8298e820 r hpt366_udma +ffffffff8298e840 r hpt374_pio +ffffffff8298e854 r hpt374_dma +ffffffff8298e860 r hpt374_udma +ffffffff8298e87c r pdc2xx_pa +ffffffff8298e881 r pdc2xx_pb +ffffffff8298e886 r pdc2xx_dma_mb +ffffffff8298e889 r pdc2xx_dma_mc +ffffffff8298e88c r pdc2xx_udma_mc +ffffffff8298e892 r acard_act_udma +ffffffff8298e899 r acard_rec_udma +ffffffff8298e8a0 r acard_udma_conf +ffffffff8298e8a7 r acard_act_dma +ffffffff8298e8aa r acard_rec_dma +ffffffff8298e8ad r acard_act_pio +ffffffff8298e8b2 r acard_rec_pio +ffffffff8298e8b7 r nforce_udma +ffffffff8298e8be r nforce_pio +ffffffff8298e8c3 r ixp_mdma_timings +ffffffff8298e8c6 r ixp_pio_timings +ffffffff8298f000 R ppb_ca +ffffffff82990000 R cy_pci_ca +ffffffff82990030 R cy_pci_devices +ffffffff82991000 R rl_pci_ca +ffffffff82991030 R rl_pci_devices +ffffffff82992000 R re_pci_devices +ffffffff82992030 R re_pci_ca +ffffffff82993000 R vr_ca +ffffffff82994000 R txp_ca +ffffffff82994030 R txp_devices +ffffffff82995000 r cards +ffffffff82996000 r format_params +ffffffff829961a0 r pixfmt_table +ffffffff82996320 r meteor_pixfmt_table +ffffffff82997000 R bktr_ca +ffffffff82997028 R bktr_hw_if +ffffffff82998000 r tuners +ffffffff82998170 r freqTable +ffffffff82998260 r nabcst +ffffffff829982a0 r irccable +ffffffff82998310 r hrccable +ffffffff82998380 r weurope +ffffffff82998420 r jpnbcst +ffffffff82998460 r jpncable +ffffffff829984c0 r xussr +ffffffff82998530 r australia +ffffffff82998590 r france +ffffffff82999000 R xl_pci_ca +ffffffff82999030 R xl_pci_devices +ffffffff8299a000 R fxp_pci_ca +ffffffff8299a030 R fxp_pci_devices +ffffffff8299b000 R em_devices +ffffffff8299b308 R em_ca +ffffffff8299b330 r em_counters +ffffffff8299c000 r em_igp_cable_length_table +ffffffff8299c100 r em_igp_2_cable_length_table +ffffffff8299d000 R ixgb_devices +ffffffff8299d010 R ixgb_ca +ffffffff8299e000 R ixgbe_devices +ffffffff8299e0b8 R ix_ca +ffffffff8299e0e0 r ix_counters +ffffffff8299e3e0 r ix_rxq_kstats_tpl +ffffffff8299e458 r ix_txq_kstats_tpl +ffffffff8299f000 r ixgbe_mvals_base +ffffffff8299f060 r ixgbe_mvals_X540 +ffffffff8299f0c0 r ixgbe_mvals_X550 +ffffffff8299f120 r ixgbe_mvals_X550EM_x +ffffffff8299f180 r ixgbe_mvals_X550EM_a +ffffffff829a2000 R ixl_ca +ffffffff829a2030 R ixl_port_counters +ffffffff829a22c0 R ixl_vsi_counters +ffffffff829a2380 r ixl_devices +ffffffff829a24c0 r ixl_710 +ffffffff829a24e8 r ixl_722 +ffffffff829a2510 r ixl_pf_aq_regs +ffffffff829a2578 r ixl_710_decrepit +ffffffff829a25a0 r ixl_phy_type_map +ffffffff829a2770 r ixl_speed_type_map +ffffffff829a27b0 r ixl_hmc_pack_rxq +ffffffff829a2830 r ixl_hmc_pack_txq +ffffffff829a28a0 r ixl_sfp_ops +ffffffff829a28b8 r ixl_qsfp_ops +ffffffff829a3000 r dwqe_pci_devices +ffffffff829a3018 R dwqe_pci_ca +ffffffff829a4000 R xge_ca +ffffffff829a4028 R xge_devices +ffffffff829a4030 r xge_fix_mac +ffffffff829a4110 r xge_xena_dtx_cfg +ffffffff829a4170 r xge_herc_dtx_cfg +ffffffff829a5000 R thtc_ca +ffffffff829a5028 R tht_ca +ffffffff829a5050 r thtc_devices +ffffffff829a5068 r tht_link_state.interval +ffffffff829a6000 R myx_ca +ffffffff829a6028 R myx_devices +ffffffff829a7000 R oce_ca +ffffffff829a7030 R oce_devices +ffffffff829a8000 R dc_pci_ca +ffffffff829a9000 R epic_pci_ca +ffffffff829a9028 R epic_pci_devices +ffffffff829aa000 R ti_pci_ca +ffffffff829aa030 R ti_devices +ffffffff829ab000 R ne_pci_ca +ffffffff829ab030 R ne_pci_prod +ffffffff829ac000 R gem_pci_ca +ffffffff829ac030 R gem_pci_devices +ffffffff829ac050 r gem_promhdr +ffffffff829ac052 r gem_promdat +ffffffff829ac05a r gem_promdat2 +ffffffff829ad000 R cas_ca +ffffffff829ad028 R cas_pci_devices +ffffffff829ad030 r cas_promhdr +ffffffff829ad032 r cas_promdat_sun +ffffffff829ad03a r cas_promdat_ns +ffffffff829ad042 r cas_promdat2 +ffffffff829ae000 R sf_pci_ca +ffffffff829ae028 R sf_pci_products +ffffffff829af000 R sis_ca +ffffffff829af028 R sis_devices +ffffffff829b0000 R se_devices +ffffffff829b0008 R se_ca +ffffffff829b1000 R mbg_ca +ffffffff829b1030 R mbg_devices +ffffffff829b2000 R uhci_pci_ca +ffffffff829b3000 R ohci_pci_ca +ffffffff829b4000 R ehci_pci_ca +ffffffff829b5000 R xhci_pci_ca +ffffffff829b6000 R cbb_pci_ca +ffffffff829b6028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff829b7000 R skc_devices +ffffffff829b7030 R skc_ca +ffffffff829b7058 R sk_ca +ffffffff829b8000 R mskc_devices +ffffffff829b80a8 R mskc_ca +ffffffff829b80d0 R msk_ca +ffffffff829b8100 r msk_mib +ffffffff829b9000 R puc_pci_ca +ffffffff829ba000 R puc_devs +ffffffff829bf000 R com_puc_ca +ffffffff829bf030 r puc_port_types +ffffffff829c0000 R lpt_puc_ca +ffffffff829c1000 R wi_pci_ca +ffffffff829c1030 r wi_pci_products +ffffffff829c2000 R an_pci_ca +ffffffff829c2030 R an_pci_devices +ffffffff829c3000 R iwi_devices +ffffffff829c3010 R iwi_ca +ffffffff829c4000 R wpi_ca +ffffffff829c4028 r wpi_devices +ffffffff829c4030 r wpi_rates +ffffffff829c4050 r wpi_rf_gain_5ghz +ffffffff829c40a0 r wpi_dsp_gain_5ghz +ffffffff829c40f0 r wpi_rf_gain_2ghz +ffffffff829c4140 r wpi_dsp_gain_2ghz +ffffffff829c4190 r wpi_pmgt +ffffffff829c4310 r wpi_bands +ffffffff829c5000 R iwn_mcs2ridx +ffffffff829c5020 R iwn_ca +ffffffff829c5050 r iwn_devices +ffffffff829c50e8 r iwn4965_sensitivity_limits +ffffffff829c5124 r iwn5000_sensitivity_limits +ffffffff829c5160 r iwn5150_sensitivity_limits +ffffffff829c519c r iwn1000_sensitivity_limits +ffffffff829c51d8 r iwn6000_sensitivity_limits +ffffffff829c5214 r iwn2000_sensitivity_limits +ffffffff829c5250 r iwn_fw_errmsg +ffffffff829c5340 r iwn4965_set_txpower.tdiv +ffffffff829c5360 r iwn4965_rf_gain_5ghz +ffffffff829c53d0 r iwn4965_dsp_gain_5ghz +ffffffff829c5440 r iwn4965_dsp_gain_2ghz +ffffffff829c54b0 r iwn_pmgt +ffffffff829c56f0 r iwn4965_post_alive.qid2fifo +ffffffff829c5700 r iwn_bands +ffffffff829c5770 r iwn_rates +ffffffff829c5820 r iwn4965_rf_gain_2ghz +ffffffff829c6000 R iwm_nvm_channels +ffffffff829c6030 R iwm_nvm_channels_8000 +ffffffff829c6070 R iwm_rates +ffffffff829c60d0 R iwm_ht_mcs2ridx +ffffffff829c6110 R iwm_tid_to_ac +ffffffff829c6118 R iwm_ac_to_tx_fifo +ffffffff829c6120 R iwm_nvm_to_read +ffffffff829c6144 r iwm_set_hw_address_8000.reserved_mac +ffffffff829c6180 r iwm_sf_full_timeout +ffffffff829c61b0 r iwm_sf_full_timeout_def +ffffffff829c61e0 r advanced_lookup +ffffffff829c6320 r iwm_devices +ffffffff829c6360 R iwm_ca +ffffffff829c7000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff829c7020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff829c7040 R iwx_qu_b0_hr1_b0 +ffffffff829c7060 R iwx_qu_b0_hr_b0 +ffffffff829c7080 R iwx_ax201_cfg_qu_hr +ffffffff829c70a0 R iwx_qu_c0_hr1_b0 +ffffffff829c70c0 R iwx_qu_c0_hr_b0 +ffffffff829c70e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff829c7100 R iwx_quz_a0_hr1_b0 +ffffffff829c7120 R iwx_ax201_cfg_quz_hr +ffffffff829c7140 R iwx_cfg_so_a0_hr_b0 +ffffffff829c7160 R iwx_cfg_quz_a0_hr_b0 +ffffffff829c7180 R iwx_2ax_cfg_so_gf_a0 +ffffffff829c71a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff829c71c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff829c71e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff829c7200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff829c7220 R iwx_2ax_cfg_so_jf_b0 +ffffffff829c7240 R iwx_nvm_channels_8000 +ffffffff829c7280 R iwx_rates +ffffffff829c72e0 R iwx_mcs2ridx +ffffffff829c7320 R iwx_tid_to_ac +ffffffff829c7328 R iwx_ac_to_tx_fifo +ffffffff829c7330 r iwx_nvm_channels_uhb +ffffffff829c739e r iwx_is_valid_mac_addr.reserved_mac +ffffffff829c73b0 r iwx_sf_full_timeout +ffffffff829c73e0 r iwx_sf_full_timeout_def +ffffffff829c7410 r advanced_lookup +ffffffff829c7550 r iwx_devices +ffffffff829c7590 r iwx_dev_info_table +ffffffff829c7e18 R iwx_ca +ffffffff829c8000 R cmpci_ca +ffffffff829c8028 R cmpci_hw_if +ffffffff829c80e0 r cmpci_rate_table +ffffffff829c8120 R cmpci_devices +ffffffff829c8130 r cmpci_query_devinfo.mixer_port_names +ffffffff829c8160 r cmpci_query_devinfo.mixer_classes +ffffffff829c9000 R iha_pci_ca +ffffffff829c9028 R iha_switch +ffffffff829ca000 R pcscp_ca +ffffffff829cb000 R bge_ca +ffffffff829cb030 R bge_devices +ffffffff829cb1b0 r bge_revisions +ffffffff829cb610 r bge_majorrevs +ffffffff829cb790 r bge_kstat_tpl +ffffffff829cc000 R bnx_devices +ffffffff829cc020 R bnx_ca +ffffffff829cd000 R vge_ca +ffffffff829cd028 R vge_devices +ffffffff829ce000 R stge_ca +ffffffff829ce028 R stge_mii_bitbang_ops +ffffffff829ce050 R stge_devices +ffffffff829cf000 R nfe_ca +ffffffff829cf030 R nfe_devices +ffffffff829d0000 R et_devices +ffffffff829d0008 R et_ca +ffffffff829d1000 R jme_devices +ffffffff829d1008 R jme_ca +ffffffff829d2000 R age_devices +ffffffff829d2008 R age_ca +ffffffff829d3000 R alc_devices +ffffffff829d3038 R alc_ca +ffffffff829d4000 R ale_devices +ffffffff829d4008 R ale_ca +ffffffff829d5000 R amdpm_ca +ffffffff829d5030 R amdpm_ids +ffffffff829d6000 R bce_ca +ffffffff829d6028 R bce_devices +ffffffff829d7000 R ath_pci_ca +ffffffff829d8000 R athn_pci_ca +ffffffff829d8030 r athn_pci_devices +ffffffff829d9000 R atw_pci_ca +ffffffff829d9028 R atw_pci_devices +ffffffff829da000 R rtw_pci_ca +ffffffff829da030 R rtw_pci_products +ffffffff829db000 R rtwn_pci_ca +ffffffff829db030 r rtwn_pci_devices +ffffffff829db040 r rtl8188eu_mac +ffffffff829db1b0 r rtl8192cu_mac +ffffffff829db310 r rtl8192ce_mac +ffffffff829db458 r rtl8188eu_bb_prog +ffffffff829db480 r rtl8723a_bb_prog +ffffffff829db4a8 r rtl8192ce_bb_prog_1t +ffffffff829db4d0 r rtl8192ce_bb_prog_2t +ffffffff829db500 r rtl8188eu_bb_regs +ffffffff829db680 r rtl8188eu_bb_vals +ffffffff829db980 r rtl8188eu_agc_vals +ffffffff829dbb80 r rtl8723a_bb_regs +ffffffff829dbd00 r rtl8723a_bb_vals +ffffffff829dbff0 r rtl8192ce_agc_vals +ffffffff829dc270 r rtl8192ce_bb_regs +ffffffff829dc3f0 r rtl8192ce_bb_vals_1t +ffffffff829dc6e0 r rtl8192ce_bb_vals_2t +ffffffff829dd000 R ral_pci_ca +ffffffff829dd030 R ral_pci_devices +ffffffff829de000 R acx_pci_ca +ffffffff829de028 R acx_pci_devices +ffffffff829df000 R pgt_pci_ca +ffffffff829df028 R pgt_pci_devices +ffffffff829e0000 R malo_pci_ca +ffffffff829e0028 R malo_pci_devices +ffffffff829e1000 R bwi_pci_ca +ffffffff829e1030 R bwi_pci_devices +ffffffff829e2000 R piixpm_ca +ffffffff829e2030 R piixpm_ids +ffffffff829e3000 R vic_ca +ffffffff829e3028 R vic_devices +ffffffff829e4000 R vmx_devices +ffffffff829e4008 R vmx_ca +ffffffff829e4030 r vmx_tx_kstat_tpl +ffffffff829e40d0 r vmx_kstat_rate +ffffffff829e40e0 r vmx_rx_kstat_tpl +ffffffff829e5000 R vmwpvs_ca +ffffffff829e5028 R vmwpvs_switch +ffffffff829e6000 R lii_ca +ffffffff829e6028 R lii_devices +ffffffff829e7000 R ichiic_ca +ffffffff829e7030 R ichiic_ids +ffffffff829e8000 R viapm_ca +ffffffff829e8030 R viapm_ids +ffffffff829e8070 r val_to_temp +ffffffff829e8870 r val_to_uV.mult +ffffffff829e9000 R amdiic_ca +ffffffff829e9028 R amdiic_ids +ffffffff829ea000 R nviic_ca +ffffffff829ea030 R nviic_ids +ffffffff829eb000 R sdhc_pci_ca +ffffffff829ec000 R kate_ca +ffffffff829ec030 r kate_proc +ffffffff829ed000 R km_ca +ffffffff829ed030 r km_devices +ffffffff829ee000 R ksmn_ca +ffffffff829ee030 r ksmn_devices +ffffffff829ef000 R iosf_pci_ca +ffffffff829f0000 R itherm_devices +ffffffff829f0008 R itherm_ca +ffffffff829f1000 R pchtemp_ca +ffffffff829f1030 R pchtemp_devices +ffffffff829f2000 R rtsx_pci_ca +ffffffff829f3000 R xspd_ca +ffffffff829f3028 R xspd_devices +ffffffff829f4000 R virtio_pci_ca +ffffffff829f5000 R dwiic_pci_ca +ffffffff829f5030 R dwiic_pci_ids +ffffffff829f6000 R bwfm_pci_ca +ffffffff829f6030 r bwfm_pci_devices +ffffffff829f7000 R ccp_pci_ca +ffffffff829f7030 r ccp_pci_devices +ffffffff829f8000 R bnxt_devices +ffffffff829f8040 R bnxt_ca +ffffffff829f9000 R mcx_ca +ffffffff829f9030 r mcx_devices +ffffffff829f9060 r mcx_rss_config +ffffffff829f90d0 r mcx_eth_cap_map +ffffffff829f92d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff829f92e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff829f9300 r mcx_kstat_ppcnt_rfc2819 +ffffffff829f9318 r mcx_kstat_ppcnt_rfc3635 +ffffffff829f9330 r mcx_ppcnt_ieee8023_tpl +ffffffff829f94b0 r mcx_ppcnt_rfc2863_tpl +ffffffff829f95c0 r mcx_ppcnt_rfc2819_tpl +ffffffff829f9770 r mcx_ppcnt_rfc3635_tpl +ffffffff829f98b0 r mcx_kstat_mtmp_tpl +ffffffff829f9950 r mcx_kstat_mtmp_rate +ffffffff829f9960 r mcx_queue_kstat_tpl +ffffffff829fa000 R iavf_ca +ffffffff829fa030 r iavf_devices +ffffffff829fa040 r iavf_aq_regs +ffffffff829fa0b0 r iavf_link_speeds +ffffffff829fb000 R rge_ca +ffffffff829fb028 R rge_devices +ffffffff829fb030 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff829fb050 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff829fb0b0 r rtl8125_mac_cfg3_mcu +ffffffff829fb950 r rtl8125_mac_cfg5_mcu +ffffffff829fc970 r rtl8125_mac_bps +ffffffff829fcd70 r rtl8125b_mac_bps +ffffffff829fcf98 r rge_kstats_tpl +ffffffff829fe000 R igc_devices +ffffffff829fe040 R igc_ca +ffffffff829ff000 R ngbe_devices +ffffffff829ff008 R ngbe_ca +ffffffff82a00000 R com_pci_ca +ffffffff82a00030 R com_pci_ids +ffffffff82a01000 r agp_attach.agp_max +ffffffff82a01048 R agp_ca +ffffffff82a02000 R intagp_ca +ffffffff82a03000 r drm_plane_create_rotation_property.props +ffffffff82a04000 r drm_bridge_priv_state_funcs +ffffffff82a06000 r color_encoding_name +ffffffff82a06020 r color_range_name +ffffffff82a07000 r drm_subpixel_enum_list +ffffffff82a07060 r drm_dpms_enum_list +ffffffff82a070a0 r drm_dvi_i_select_enum_list +ffffffff82a070d0 r drm_dvi_i_subconnector_enum_list +ffffffff82a07100 r drm_tv_mode_enum_list +ffffffff82a07170 r drm_tv_select_enum_list +ffffffff82a071c0 r drm_tv_subconnector_enum_list +ffffffff82a07210 r drm_dp_subconnector_enum_list +ffffffff82a07280 r colorspace_names +ffffffff82a07300 r drm_link_status_enum_list +ffffffff82a07320 r drm_scaling_mode_enum_list +ffffffff82a07360 r drm_aspect_ratio_enum_list +ffffffff82a07390 r drm_content_type_enum_list +ffffffff82a073e0 r drm_panel_orientation_enum_list +ffffffff82a07420 r privacy_screen_enum +ffffffff82a08000 r drm_crtc_fence_ops +ffffffff82a09000 r drm_dmt_modes +ffffffff82a0b940 r edid_cea_modes_1 +ffffffff82a0f4d0 r edid_cea_modes_193 +ffffffff82a10180 r edid_quirk_list +ffffffff82a10360 r drm_mode_do_interlace_quirk.cea_interlaced +ffffffff82a103a0 r edid_4k_modes +ffffffff82a10600 r edid_est_modes +ffffffff82a10e00 r est3_modes +ffffffff82a10f60 r stereo_mandatory_modes +ffffffff82a10fe0 r extra_modes +ffffffff82a12000 r drm_encoder_enum_list +ffffffff82a14000 r drm_fbdev_dma_helper_funcs +ffffffff82a14010 r drm_fbdev_dma_client_funcs +ffffffff82a14030 r drm_fbdev_dma_fb_ops +ffffffff82a15000 r drm_fbdev_generic_helper_funcs +ffffffff82a15010 r drm_fbdev_generic_client_funcs +ffffffff82a15030 r drm_fbdev_generic_fb_ops +ffffffff82a17000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82a17004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82a17008 r drm_fb_xrgb8888_to_xrgb1555.dst_pixsize +ffffffff82a1700c r drm_fb_xrgb8888_to_argb1555.dst_pixsize +ffffffff82a17010 r drm_fb_xrgb8888_to_rgba5551.dst_pixsize +ffffffff82a17014 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff82a17018 r drm_fb_xrgb8888_to_argb8888.dst_pixsize +ffffffff82a1701c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82a17020 r drm_fb_xrgb8888_to_argb2101010.dst_pixsize +ffffffff82a17024 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82a17028 r drm_fb_xrgb8888_to_xbgr8888.dst_pixsize +ffffffff82a1702c r drm_fb_xrgb8888_to_abgr8888.dst_pixsize +ffffffff82a18000 r __drm_format_info.formats +ffffffff82a19000 R drm_pgops +ffffffff82a1a000 r drm_gem_dma_default_funcs +ffffffff82a1b000 R drm_gem_fb_funcs +ffffffff82a1c000 r drm_ioctls +ffffffff82a1e000 r dma_fence_stub_ops +ffffffff82a1e040 R dma_fence_array_ops +ffffffff82a1e080 R dma_fence_chain_ops +ffffffff82a1e0c0 R dmabufops +ffffffff82a1e0f8 R syncfileops +ffffffff82a1f000 r drm_plane_type_enum_list +ffffffff82a20000 r tv_modes_parameters +ffffffff82a200c0 r drm_mode_status_names +ffffffff82a20200 r drm_named_modes +ffffffff82a21000 r primary_plane_funcs +ffffffff82a21068 r safe_modeset_formats +ffffffff82a22000 r orientation_data +ffffffff82a25718 r lcd800x1280_rightside_up +ffffffff82a25730 r lcd720x1280_rightside_up +ffffffff82a25748 r lcd800x1280_leftside_up +ffffffff82a25760 r lcd1080x1920_leftside_up +ffffffff82a25778 r lcd1200x1920_rightside_up +ffffffff82a25790 r gpd_micropc +ffffffff82a257a8 r gpd_pocket +ffffffff82a257c0 r gpd_pocket2 +ffffffff82a257d8 r gpd_win +ffffffff82a257f0 r gpd_win2 +ffffffff82a25808 r itworks_tw891 +ffffffff82a25820 r lcd1600x2560_rightside_up +ffffffff82a25838 r onegx1_pro +ffffffff82a25850 r lcd1600x2560_leftside_up +ffffffff82a25868 r lcd1280x1920_rightside_up +ffffffff82a25880 r gpd_onemix2s +ffffffff82a25898 r .compoundliteral +ffffffff82a258a8 r .compoundliteral.5 +ffffffff82a258d0 r .compoundliteral.9 +ffffffff82a258f0 r .compoundliteral.17 +ffffffff82a25930 r .compoundliteral.21 +ffffffff82a25950 r .compoundliteral.23 +ffffffff82a25960 r .compoundliteral.25 +ffffffff82a25970 r .compoundliteral.29 +ffffffff82a26000 r drm_gem_prime_dmabuf_ops +ffffffff82a28000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82a29000 r drm_dp_phy_name.phy_names +ffffffff82a29048 r drm_dp_i2c_algo +ffffffff82a29058 r drm_dp_i2c_lock_ops +ffffffff82a29070 r dp_aux_bl_ops +ffffffff82a29090 r dpcd_quirk_list +ffffffff82a29320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82a2a000 R drm_dp_mst_topology_state_funcs +ffffffff82a2a020 r drm_dp_mst_req_type_str.req_type_str +ffffffff82a2a1f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82a2a220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82a2a278 r drm_dp_mst_i2c_algo +ffffffff82a2b000 r rc_parameters_1_2_444 +ffffffff82a2b5f0 r rc_parameters_pre_scr +ffffffff82a2b920 r rc_parameters_1_2_422 +ffffffff82a2bdf0 r rc_parameters_1_2_420 +ffffffff82a2d000 r hdmi_colorimetry_val +ffffffff82a2e018 R ttm_bo_vm_ops +ffffffff82a2f000 r ttm_range_manager_func +ffffffff82a30018 r ttm_kmap_iter_io_ops +ffffffff82a30030 r ttm_kmap_iter_linear_io_ops +ffffffff82a31000 r ttm_sys_manager_func +ffffffff82a32000 r ttm_kmap_iter_tt_ops +ffffffff82a33000 r drm_sched_fence_ops_scheduled +ffffffff82a33040 r drm_sched_fence_ops_finished +ffffffff82a34000 R ch7017_ops +ffffffff82a35000 R ch7xxx_ops +ffffffff82a35060 r ch7xxx_ids +ffffffff82a36000 R ivch_ops +ffffffff82a36060 r backup_addresses +ffffffff82a37000 R ns2501_ops +ffffffff82a37060 r mode_agnostic_values +ffffffff82a370e0 r ns2501_modes +ffffffff82a38000 R sil164_ops +ffffffff82a39000 R tfp410_ops +ffffffff82a3a000 r chv_dpll +ffffffff82a3a050 r vlv_dpll +ffffffff82a3a0a0 r g4x_dpll +ffffffff82a3a0f0 r pch_dpll +ffffffff82a3a138 r intel_dp_enc_funcs +ffffffff82a3b000 r intel_hdmi_enc_funcs +ffffffff82a3c000 r vlv_primary_formats +ffffffff82a3c030 r ivb_primary_formats +ffffffff82a3c050 r i965_primary_formats +ffffffff82a3c070 r i8xx_primary_formats +ffffffff82a3c080 r i965_plane_funcs +ffffffff82a3c0e8 r i8xx_plane_funcs +ffffffff82a3d000 r ilk_wm_funcs +ffffffff82a3d040 r vlv_wm_funcs +ffffffff82a3d080 r g4x_wm_funcs +ffffffff82a3d0c0 r nop_funcs +ffffffff82a3d100 r pnv_wm_funcs +ffffffff82a3d140 r i965_wm_funcs +ffffffff82a3d180 r i9xx_wm_funcs +ffffffff82a3d1c0 r i845_wm_funcs +ffffffff82a3d200 r cxsr_latency_table +ffffffff82a3e000 r gen11_dsi_encoder_funcs +ffffffff82a3e020 r gen11_dsi_connector_funcs +ffffffff82a3e098 r gen11_dsi_connector_helper_funcs +ffffffff82a3e0f8 r gen11_dsi_host_ops +ffffffff82a3f000 r intel_plane_helper_funcs +ffffffff82a40000 r g4x_audio_funcs +ffffffff82a40018 r ibx_audio_funcs +ffffffff82a40030 r hsw_audio_funcs +ffffffff82a40050 r hdmi_audio_clock +ffffffff82a400c0 r dp_aud_n_m +ffffffff82a40270 r hdmi_aud_ncts_36bpp +ffffffff82a40350 r hdmi_aud_ncts_30bpp +ffffffff82a40430 r hdmi_aud_ncts_24bpp +ffffffff82a41000 r intel_backlight_device_ops +ffffffff82a41018 r bxt_pwm_funcs +ffffffff82a41048 r cnp_pwm_funcs +ffffffff82a41078 r lpt_pwm_funcs +ffffffff82a410a8 r spt_pwm_funcs +ffffffff82a410d8 r pch_pwm_funcs +ffffffff82a41108 r ext_pwm_funcs +ffffffff82a41138 r vlv_pwm_funcs +ffffffff82a41168 r i965_pwm_funcs +ffffffff82a41198 r i9xx_pwm_funcs +ffffffff82a411c8 r pwm_bl_funcs +ffffffff82a42000 r bdb_blocks +ffffffff82a42160 r adlp_aux_ch_map +ffffffff82a42169 r adls_aux_ch_map +ffffffff82a42170 r rkl_aux_ch_map +ffffffff82a42175 r direct_aux_ch_map +ffffffff82a4217e r translate_iboost.mapping +ffffffff82a42181 r adlp_ddc_pin_map +ffffffff82a4218e r adls_ddc_pin_map +ffffffff82a4219b r rkl_pch_tgp_ddc_pin_map +ffffffff82a421a6 r gen9bc_tgp_ddc_pin_map +ffffffff82a421b1 r icp_ddc_pin_map +ffffffff82a421c0 r cnp_ddc_pin_map +ffffffff82a43000 r mtl_sa_info +ffffffff82a43006 r adlp_sa_info +ffffffff82a4300c r adls_sa_info +ffffffff82a43012 r rkl_sa_info +ffffffff82a43018 r tgl_sa_info +ffffffff82a43020 r intel_bw_funcs +ffffffff82a44000 r intel_cdclk_funcs +ffffffff82a44010 r mtl_cdclk_funcs +ffffffff82a44030 r mtl_cdclk_table +ffffffff82a44088 r tgl_cdclk_funcs +ffffffff82a440b0 r dg2_cdclk_table +ffffffff82a44160 r adlp_a_step_cdclk_table +ffffffff82a441e0 r rplu_cdclk_table +ffffffff82a442c8 r rplu_cdclk_funcs +ffffffff82a442f0 r adlp_cdclk_table +ffffffff82a443b0 r rkl_cdclk_table +ffffffff82a444a0 r icl_cdclk_table +ffffffff82a44588 r ehl_cdclk_funcs +ffffffff82a445a8 r icl_cdclk_funcs +ffffffff82a445c8 r bxt_cdclk_funcs +ffffffff82a445f0 r glk_cdclk_table +ffffffff82a44620 r bxt_cdclk_table +ffffffff82a44668 r skl_cdclk_funcs +ffffffff82a44688 r bdw_cdclk_funcs +ffffffff82a446a8 r hsw_cdclk_funcs +ffffffff82a446c8 r chv_cdclk_funcs +ffffffff82a446e8 r vlv_cdclk_funcs +ffffffff82a44708 r fixed_400mhz_cdclk_funcs +ffffffff82a44728 r ilk_cdclk_funcs +ffffffff82a44748 r gm45_cdclk_funcs +ffffffff82a44768 r g33_cdclk_funcs +ffffffff82a44788 r i965gm_cdclk_funcs +ffffffff82a447a8 r pnv_cdclk_funcs +ffffffff82a447c8 r i945gm_cdclk_funcs +ffffffff82a447e8 r i915gm_cdclk_funcs +ffffffff82a44808 r i915g_cdclk_funcs +ffffffff82a44828 r i865g_cdclk_funcs +ffffffff82a44848 r i85x_cdclk_funcs +ffffffff82a44868 r i845g_cdclk_funcs +ffffffff82a44888 r i830_cdclk_funcs +ffffffff82a448a8 r g33_get_cdclk.div_3200 +ffffffff82a448ae r g33_get_cdclk.div_4000 +ffffffff82a448b4 r g33_get_cdclk.div_4800 +ffffffff82a448ba r g33_get_cdclk.div_5333 +ffffffff82a448c0 r i965gm_get_cdclk.div_3200 +ffffffff82a448c3 r i965gm_get_cdclk.div_4000 +ffffffff82a448c6 r i965gm_get_cdclk.div_5333 +ffffffff82a45000 r chv_color_funcs +ffffffff82a45040 r vlv_color_funcs +ffffffff82a45080 r i965_color_funcs +ffffffff82a450c0 r i9xx_color_funcs +ffffffff82a45100 r tgl_color_funcs +ffffffff82a45140 r icl_color_funcs +ffffffff82a45180 r glk_color_funcs +ffffffff82a451c0 r skl_color_funcs +ffffffff82a45200 r bdw_color_funcs +ffffffff82a45240 r hsw_color_funcs +ffffffff82a45280 r ivb_color_funcs +ffffffff82a452c0 r ilk_color_funcs +ffffffff82a45300 r chv_cgm_csc_matrix_identity +ffffffff82a4531e r ilk_csc_matrix_rgb_to_ycbcr +ffffffff82a4533c r ilk_csc_matrix_limited_range +ffffffff82a4535a r ilk_csc_matrix_identity +ffffffff82a46000 r icl_procmon_values +ffffffff82a47000 r force_audio_names +ffffffff82a47040 r broadcast_rgb_names +ffffffff82a48000 r intel_crt_connector_funcs +ffffffff82a48078 r intel_crt_enc_funcs +ffffffff82a480a0 r intel_spurious_crt_detect +ffffffff82a484a8 r intel_crt_connector_helper_funcs +ffffffff82a49000 r g4x_crtc_funcs +ffffffff82a490c0 r i965_crtc_funcs +ffffffff82a49180 r i915gm_crtc_funcs +ffffffff82a49240 r i915_crtc_funcs +ffffffff82a49300 r i8xx_crtc_funcs +ffffffff82a493c0 r bdw_crtc_funcs +ffffffff82a49480 r ilk_crtc_funcs +ffffffff82a4a000 r output_format_str +ffffffff82a4a020 r output_type_str +ffffffff82a4b000 r intel_cursor_plane_funcs +ffffffff82a4b068 r intel_cursor_formats +ffffffff82a4c000 r mtl_c10_hdmi_tables +ffffffff82a4c170 r mtl_c10_hdmi_25_2 +ffffffff82a4c18c r mtl_c10_hdmi_27_0 +ffffffff82a4c1a8 r mtl_c10_hdmi_27027 +ffffffff82a4c1c4 r mtl_c10_hdmi_28320 +ffffffff82a4c1e0 r mtl_c10_hdmi_30240 +ffffffff82a4c1fc r mtl_c10_hdmi_31500 +ffffffff82a4c218 r mtl_c10_hdmi_36000 +ffffffff82a4c234 r mtl_c10_hdmi_40000 +ffffffff82a4c250 r mtl_c10_hdmi_49500 +ffffffff82a4c26c r mtl_c10_hdmi_50000 +ffffffff82a4c288 r mtl_c10_hdmi_57284 +ffffffff82a4c2a4 r mtl_c10_hdmi_58000 +ffffffff82a4c2c0 r mtl_c10_hdmi_65000 +ffffffff82a4c2dc r mtl_c10_hdmi_71000 +ffffffff82a4c2f8 r mtl_c10_hdmi_74176 +ffffffff82a4c314 r mtl_c10_hdmi_74_25 +ffffffff82a4c330 r mtl_c10_hdmi_75000 +ffffffff82a4c34c r mtl_c10_hdmi_78750 +ffffffff82a4c368 r mtl_c10_hdmi_85500 +ffffffff82a4c384 r mtl_c10_hdmi_88750 +ffffffff82a4c3a0 r mtl_c10_hdmi_106500 +ffffffff82a4c3bc r mtl_c10_hdmi_108000 +ffffffff82a4c3d8 r mtl_c10_hdmi_115500 +ffffffff82a4c3f4 r mtl_c10_hdmi_119000 +ffffffff82a4c410 r mtl_c10_hdmi_135000 +ffffffff82a4c42c r mtl_c10_hdmi_138500 +ffffffff82a4c448 r mtl_c10_hdmi_147160 +ffffffff82a4c464 r mtl_c10_hdmi_148352 +ffffffff82a4c480 r mtl_c10_hdmi_148_5 +ffffffff82a4c49c r mtl_c10_hdmi_154000 +ffffffff82a4c4b8 r mtl_c10_hdmi_162000 +ffffffff82a4c4d4 r mtl_c10_hdmi_167000 +ffffffff82a4c4f0 r mtl_c10_hdmi_197802 +ffffffff82a4c50c r mtl_c10_hdmi_198000 +ffffffff82a4c528 r mtl_c10_hdmi_209800 +ffffffff82a4c544 r mtl_c10_hdmi_241500 +ffffffff82a4c560 r mtl_c10_hdmi_262750 +ffffffff82a4c57c r mtl_c10_hdmi_268500 +ffffffff82a4c598 r mtl_c10_hdmi_296703 +ffffffff82a4c5b4 r mtl_c10_hdmi_297000 +ffffffff82a4c5d0 r mtl_c10_hdmi_319750 +ffffffff82a4c5ec r mtl_c10_hdmi_497750 +ffffffff82a4c608 r mtl_c10_hdmi_592000 +ffffffff82a4c624 r mtl_c10_hdmi_593407 +ffffffff82a4c640 r mtl_c10_hdmi_594 +ffffffff82a4c660 r mtl_c20_hdmi_tables +ffffffff82a4c6b8 r mtl_c20_hdmi_25_175 +ffffffff82a4c6e4 r mtl_c20_hdmi_27_0 +ffffffff82a4c710 r mtl_c20_hdmi_74_25 +ffffffff82a4c73c r mtl_c20_hdmi_148_5 +ffffffff82a4c768 r mtl_c20_hdmi_594 +ffffffff82a4c794 r mtl_c20_hdmi_300 +ffffffff82a4c7c0 r mtl_c20_hdmi_600 +ffffffff82a4c7ec r mtl_c20_hdmi_800 +ffffffff82a4c818 r mtl_c20_hdmi_1000 +ffffffff82a4c844 r mtl_c20_hdmi_1200 +ffffffff82a4c870 r mtl_c10_edp_tables +ffffffff82a4c8c0 r mtl_c10_dp_tables +ffffffff82a4c8e8 r mtl_c10_dp_rbr +ffffffff82a4c904 r mtl_c10_edp_r216 +ffffffff82a4c920 r mtl_c10_edp_r243 +ffffffff82a4c93c r mtl_c10_dp_hbr1 +ffffffff82a4c958 r mtl_c10_edp_r324 +ffffffff82a4c974 r mtl_c10_edp_r432 +ffffffff82a4c990 r mtl_c10_dp_hbr2 +ffffffff82a4c9ac r mtl_c10_edp_r675 +ffffffff82a4c9c8 r mtl_c10_dp_hbr3 +ffffffff82a4c9f0 r mtl_c20_dp_tables +ffffffff82a4ca30 r mtl_c20_dp_rbr +ffffffff82a4ca5c r mtl_c20_dp_hbr1 +ffffffff82a4ca88 r mtl_c20_dp_hbr2 +ffffffff82a4cab4 r mtl_c20_dp_hbr3 +ffffffff82a4cae0 r mtl_c20_dp_uhbr13_5 +ffffffff82a4cb0c r mtl_c20_dp_uhbr10 +ffffffff82a4cb38 r mtl_c20_dp_uhbr20 +ffffffff82a4d000 r intel_ddi_funcs +ffffffff82a4d020 r index_to_dp_signal_levels +ffffffff82a4d030 r gen9_chicken_trans_reg_by_port.trans +ffffffff82a4e000 r tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff82a4e010 r _tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff82a4e080 r mtl_c20_trans_uhbr +ffffffff82a4e090 r mtl_c20_trans_hdmi +ffffffff82a4e0a0 r mtl_c20_trans_dp14 +ffffffff82a4e0b0 r mtl_c10_trans_dp14 +ffffffff82a4e0c0 r _mtl_c20_trans_uhbr +ffffffff82a4e180 r _mtl_c20_trans_hdmi +ffffffff82a4e1c0 r _mtl_c20_trans_dp14 +ffffffff82a4e240 r _mtl_c10_trans_dp14 +ffffffff82a4e2b8 r dg2_snps_trans_uhbr +ffffffff82a4e2c8 r dg2_snps_trans +ffffffff82a4e2e0 r _dg2_snps_trans_uhbr +ffffffff82a4e3a0 r _dg2_snps_trans +ffffffff82a4e418 r icl_combo_phy_trans_hdmi +ffffffff82a4e430 r _icl_combo_phy_trans_hdmi +ffffffff82a4e488 r adlp_combo_phy_trans_edp_hbr3 +ffffffff82a4e498 r adlp_combo_phy_trans_edp_up_to_hbr2 +ffffffff82a4e4b0 r _adlp_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff82a4e530 r _adlp_combo_phy_trans_edp_hbr2 +ffffffff82a4e5a8 r adlp_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82a4e5b8 r adlp_combo_phy_trans_dp_hbr +ffffffff82a4e5d0 r _adlp_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82a4e650 r _adlp_combo_phy_trans_dp_hbr +ffffffff82a4e6c8 r tgl_dkl_phy_trans_hdmi +ffffffff82a4e6e0 r _tgl_dkl_phy_trans_hdmi +ffffffff82a4e758 r adlp_dkl_phy_trans_dp_hbr2_hbr3 +ffffffff82a4e768 r adlp_dkl_phy_trans_dp_hbr +ffffffff82a4e780 r _adlp_dkl_phy_trans_dp_hbr2_hbr3 +ffffffff82a4e800 r _adlp_dkl_phy_trans_dp_hbr +ffffffff82a4e878 r adls_combo_phy_trans_edp_hbr3 +ffffffff82a4e888 r adls_combo_phy_trans_edp_hbr2 +ffffffff82a4e8a0 r _adls_combo_phy_trans_edp_hbr3 +ffffffff82a4e920 r _adls_combo_phy_trans_edp_hbr2 +ffffffff82a4e998 r adls_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82a4e9a8 r tgl_combo_phy_trans_dp_hbr +ffffffff82a4e9c0 r _adls_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82a4ea40 r _tgl_combo_phy_trans_dp_hbr +ffffffff82a4eab8 r icl_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff82a4eac8 r icl_combo_phy_trans_edp_hbr2 +ffffffff82a4eae0 r _icl_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff82a4eb60 r _icl_combo_phy_trans_edp_hbr2 +ffffffff82a4ebd8 r rkl_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82a4ebe8 r rkl_combo_phy_trans_dp_hbr +ffffffff82a4ec00 r _rkl_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82a4ec80 r _rkl_combo_phy_trans_dp_hbr +ffffffff82a4ecf8 r dg1_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82a4ed08 r dg1_combo_phy_trans_dp_rbr_hbr +ffffffff82a4ed20 r _dg1_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82a4eda0 r _dg1_combo_phy_trans_dp_rbr_hbr +ffffffff82a4ee18 r tgl_uy_combo_phy_trans_dp_hbr2 +ffffffff82a4ee28 r tgl_combo_phy_trans_dp_hbr2 +ffffffff82a4ee40 r _tgl_uy_combo_phy_trans_dp_hbr2 +ffffffff82a4eec0 r _tgl_combo_phy_trans_dp_hbr2 +ffffffff82a4ef38 r tgl_dkl_phy_trans_dp_hbr2 +ffffffff82a4ef48 r tgl_dkl_phy_trans_dp_hbr +ffffffff82a4ef60 r _tgl_dkl_phy_trans_dp_hbr2 +ffffffff82a4efe0 r _tgl_dkl_phy_trans_dp_hbr +ffffffff82a4f058 r jsl_combo_phy_trans_edp_hbr2 +ffffffff82a4f068 r jsl_combo_phy_trans_edp_hbr +ffffffff82a4f080 r _jsl_combo_phy_trans_edp_hbr2 +ffffffff82a4f100 r _jsl_combo_phy_trans_edp_hbr +ffffffff82a4f178 r ehl_combo_phy_trans_dp +ffffffff82a4f188 r ehl_combo_phy_trans_edp_hbr2 +ffffffff82a4f1a0 r _ehl_combo_phy_trans_edp_hbr2 +ffffffff82a4f220 r _ehl_combo_phy_trans_dp +ffffffff82a4f298 r icl_mg_phy_trans_hdmi +ffffffff82a4f2b0 r _icl_mg_phy_trans_hdmi +ffffffff82a4f328 r icl_mg_phy_trans_hbr2_hbr3 +ffffffff82a4f338 r icl_mg_phy_trans_rbr_hbr +ffffffff82a4f350 r _icl_mg_phy_trans_hbr2_hbr3 +ffffffff82a4f3d0 r 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hsw_clear_kernel +ffffffff82a94340 r ivb_clear_kernel +ffffffff82a95000 r gen7_null_state_relocs +ffffffff82a95018 R gen7_null_state +ffffffff82a95030 r gen7_null_state_batch +ffffffff82a96000 r gen8_null_state_relocs +ffffffff82a96018 R gen8_null_state +ffffffff82a96030 r gen8_null_state_batch +ffffffff82a97000 r gen9_null_state_relocs +ffffffff82a97018 R gen9_null_state +ffffffff82a97030 r gen9_null_state_batch +ffffffff82a98000 r intel_engines +ffffffff82a981b0 r get_reset_domain.engine_reset_domains +ffffffff82a98220 r get_reset_domain.engine_reset_domains.40 +ffffffff82a9826c r engine_class_guc_class_map +ffffffff82a98280 r intel_engine_init_tlb_invalidation.gen12_regs +ffffffff82a982a0 r intel_engine_init_tlb_invalidation.xehp_regs +ffffffff82a982c0 r intel_engine_init_tlb_invalidation.xelpmp_regs +ffffffff82a982e0 r __cs_pending_mi_force_wakes._reg +ffffffff82a99000 r wf_ops +ffffffff82a9a000 r intel_engine_class_repr.uabi_names +ffffffff82a9a030 r uabi_classes +ffffffff82a9a03c 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defaults_bonaire_xt +ffffffff82ace600 r defaults_saturn_xt +ffffffff82ace64c r defaults_hawaii_xt +ffffffff82ace698 r defaults_hawaii_pro +ffffffff82acf000 r ci_program_jump_on_start.data +ffffffff82ad0000 r bonaire_io_mc_regs +ffffffff82ad0120 r hawaii_io_mc_regs +ffffffff82ad01d0 r mc_cg_registers +ffffffff82ad0200 r bonaire_mgcg_cgcg_init +ffffffff82ad05e0 r bonaire_golden_registers +ffffffff82ad07d0 r bonaire_golden_common_registers +ffffffff82ad0800 r bonaire_golden_spm_registers +ffffffff82ad0810 r kalindi_mgcg_cgcg_init +ffffffff82ad0ab0 r kalindi_golden_registers +ffffffff82ad0c20 r kalindi_golden_common_registers +ffffffff82ad0c50 r kalindi_golden_spm_registers +ffffffff82ad0c60 r godavari_golden_registers +ffffffff82ad0de0 r spectre_mgcg_cgcg_init +ffffffff82ad1200 r spectre_golden_registers +ffffffff82ad1330 r spectre_golden_common_registers +ffffffff82ad1360 r spectre_golden_spm_registers +ffffffff82ad1370 r hawaii_mgcg_cgcg_init +ffffffff82ad1880 r hawaii_golden_registers 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+ffffffff82ad7a10 r juniper_mgcg_init +ffffffff82ad7e80 r redwood_mgcg_init +ffffffff82ad81b0 r cedar_golden_registers +ffffffff82ad8390 r cedar_mgcg_init +ffffffff82ad85f0 r wrestler_golden_registers +ffffffff82ad8840 r supersumo_golden_registers +ffffffff82ad8ba0 r sumo_golden_registers +ffffffff82ad8be0 r barts_golden_registers +ffffffff82ad8e00 r turks_golden_registers +ffffffff82ad9040 r caicos_golden_registers +ffffffff82ad9280 r sumo_rlc_save_restore_register_list +ffffffff82ad93d0 r evergreen_cs_data +ffffffff82ad9410 r SECT_CONTEXT_defs +ffffffff82ad9490 r SECT_CLEAR_defs +ffffffff82ad94b0 r SECT_CTRLCONST_defs +ffffffff82ad94d0 r SECT_CONTEXT_def_2 +ffffffff82ad94f0 r SECT_CONTEXT_def_4 +ffffffff82ad9680 r SECT_CONTEXT_def_5 +ffffffff82ad96a0 r SECT_CONTEXT_def_6 +ffffffff82ad9780 r SECT_CONTEXT_def_1 +ffffffff82ad9f20 r SECT_CONTEXT_def_3 +ffffffff82ada000 r SECT_CONTEXT_def_7 +ffffffff82ada488 r SECT_CLEAR_def_1 +ffffffff82ada494 r SECT_CTRLCONST_def_1 +ffffffff82ada4a0 r evergreen_default_state +ffffffff82adb000 r cayman_reg_safe_bm +ffffffff82add000 r evergreen_reg_safe_bm +ffffffff82ae0000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff82ae1000 r didt_config_kv +ffffffff82ae2000 r barts_io_mc_regs +ffffffff82ae20f0 r turks_io_mc_regs +ffffffff82ae21e0 r caicos_io_mc_regs +ffffffff82ae22d0 r cayman_io_mc_regs +ffffffff82ae23c0 r cayman_golden_registers +ffffffff82ae2580 r cayman_golden_registers2 +ffffffff82ae25d0 r dvst_golden_registers +ffffffff82ae2860 r dvst_golden_registers2 +ffffffff82ae2890 r scrapper_golden_registers +ffffffff82ae2d70 r tn_rlc_save_restore_register_list +ffffffff82ae2f60 r cayman_cs_data +ffffffff82ae2fa0 r SECT_CONTEXT_defs +ffffffff82ae3020 r SECT_CLEAR_defs +ffffffff82ae3040 r SECT_CTRLCONST_defs +ffffffff82ae3060 r SECT_CONTEXT_def_2 +ffffffff82ae3080 r SECT_CONTEXT_def_4 +ffffffff82ae3210 r SECT_CONTEXT_def_5 +ffffffff82ae3230 r SECT_CONTEXT_def_1 +ffffffff82ae39d0 r SECT_CONTEXT_def_3 +ffffffff82ae3ab0 r SECT_CONTEXT_def_6 +ffffffff82ae3b90 r SECT_CONTEXT_def_7 +ffffffff82ae4018 r SECT_CLEAR_def_1 +ffffffff82ae4024 r SECT_CTRLCONST_def_1 +ffffffff82ae4030 r cayman_default_state +ffffffff82ae5000 r cac_weights_cayman_xt +ffffffff82ae5128 r cac_weights_cayman_pro +ffffffff82ae5250 r cac_weights_cayman_le +ffffffff82ae5380 r cayman_cgcg_cgls_default +ffffffff82ae55c0 r cayman_mgcg_default +ffffffff82ae5f20 r cayman_sysls_default +ffffffff82ae5ff0 r cayman_cgcg_cgls_enable +ffffffff82ae6240 r cayman_cgcg_cgls_disable +ffffffff82ae64a0 r cayman_mgcg_enable +ffffffff82ae6520 r cayman_mgcg_disable +ffffffff82ae65a0 r cayman_sysls_enable +ffffffff82ae6670 r cayman_sysls_disable +ffffffff82ae7000 r rn50_reg_safe_bm +ffffffff82ae71a0 r r100_reg_safe_bm +ffffffff82ae8000 r r200_reg_safe_bm +ffffffff82ae9000 r r300_reg_safe_bm +ffffffff82aea000 r r420_reg_safe_bm +ffffffff82aec000 r color_formats_table +ffffffff82aec480 r r600_reg_safe_bm +ffffffff82aef000 R r600_utc +ffffffff82aef040 R r600_dtc +ffffffff82aef080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82af1000 r r100_gfx_ring +ffffffff82af1070 r r300_gfx_ring +ffffffff82af10e0 r rv515_gfx_ring +ffffffff82af1150 r r600_gfx_ring +ffffffff82af11c0 r r600_dma_ring +ffffffff82af1230 r rv6xx_uvd_ring +ffffffff82af12a0 r rv770_uvd_ring +ffffffff82af1310 r evergreen_gfx_ring +ffffffff82af1380 r evergreen_dma_ring +ffffffff82af13f0 r cayman_gfx_ring +ffffffff82af1460 r cayman_dma_ring +ffffffff82af14d0 r cayman_uvd_ring +ffffffff82af1540 r trinity_vce_ring +ffffffff82af15b0 r si_gfx_ring +ffffffff82af1620 r si_dma_ring +ffffffff82af1690 r ci_gfx_ring +ffffffff82af1700 r ci_cp_ring +ffffffff82af1770 r ci_dma_ring +ffffffff82af17e0 r ci_vce_ring +ffffffff82af2000 r object_connector_convert +ffffffff82af2060 r supported_devices_connector_convert +ffffffff82af20a0 r supported_devices_connector_object_id_convert +ffffffff82af20c0 r thermal_controller_names +ffffffff82af2100 r pp_lib_thermal_controller_names +ffffffff82af3000 r pin_offsets +ffffffff82af3020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff82af5000 r thermal_controller_names +ffffffff82af5020 r default_primarydac_adj +ffffffff82af5120 r default_tvdac_adj +ffffffff82af5220 r default_tmds_pll +ffffffff82af6000 r radeon_dp_connector_funcs +ffffffff82af6078 r radeon_dp_connector_helper_funcs +ffffffff82af60d8 r radeon_lvds_bridge_connector_funcs +ffffffff82af6150 r radeon_vga_connector_funcs +ffffffff82af61c8 r radeon_vga_connector_helper_funcs +ffffffff82af6228 r radeon_dvi_connector_funcs +ffffffff82af62a0 r radeon_dvi_connector_helper_funcs +ffffffff82af6300 r radeon_edp_connector_funcs +ffffffff82af6378 r radeon_tv_connector_funcs +ffffffff82af63f0 r radeon_tv_connector_helper_funcs +ffffffff82af6450 r radeon_lvds_connector_funcs +ffffffff82af64c8 r radeon_lvds_connector_helper_funcs +ffffffff82af7000 r radeon_family_name +ffffffff82af73f0 r radeon_px_quirk_list +ffffffff82af8000 r radeon_fb_funcs +ffffffff82af8018 r radeon_mode_funcs +ffffffff82af8060 r radeon_tmds_pll_enum_list +ffffffff82af8080 r radeon_tv_std_enum_list +ffffffff82af8100 r radeon_underscan_enum_list +ffffffff82af8130 r radeon_audio_enum_list +ffffffff82af8160 r radeon_dither_enum_list +ffffffff82af8180 r radeon_output_csc_enum_list +ffffffff82af81c0 r radeon_crtc_funcs +ffffffff82af8280 r hpd_names +ffffffff82af82b0 r encoder_names +ffffffff82af83e0 r radeon_afmt_init.eg_offsets +ffffffff82af9000 r aux_offset +ffffffff82afa000 R radeondrm_ca +ffffffff82afa030 r pciidlist +ffffffff82afe1d0 r kms_driver +ffffffff82afe2c0 r radeon_ioctls_kms +ffffffff82aff000 r radeon_fbdev_fb_helper_funcs +ffffffff82aff010 r radeon_fbdev_client_funcs +ffffffff82aff030 r radeon_fbdev_fb_ops +ffffffff82b00000 R radeon_fence_ops +ffffffff82b02000 R radeon_gem_object_funcs +ffffffff82b02070 r radeon_gem_vm_ops +ffffffff82b03000 r radeon_i2c_algo +ffffffff82b03010 r radeon_atom_i2c_algo +ffffffff82b04000 r legacy_helper_funcs +ffffffff82b05000 r radeon_backlight_ops +ffffffff82b05018 r radeon_legacy_lvds_enc_funcs +ffffffff82b05038 r radeon_legacy_lvds_helper_funcs +ffffffff82b050a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82b050c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82b05128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82b05148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82b051b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82b051d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82b05238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82b05258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82b06000 r SLOPE_value +ffffffff82b06030 r YCOEF_EN_value +ffffffff82b06060 r YCOEF_value +ffffffff82b06090 r available_tv_modes +ffffffff82b06110 r hor_timing_NTSC +ffffffff82b06150 r vert_timing_NTSC +ffffffff82b06190 r hor_timing_PAL +ffffffff82b061d0 r vert_timing_PAL +ffffffff82b08000 r radeon_pm_state_type_name +ffffffff82b09000 r radeon_evict_flags.placements +ffffffff82b0c000 r rs600_reg_safe_bm +ffffffff82b0e000 r rv515_reg_safe_bm +ffffffff82b0f000 r dll_speed_table +ffffffff82b10000 r r7xx_golden_registers +ffffffff82b10090 r r7xx_golden_dyn_gpr_registers +ffffffff82b10100 r rv770ce_golden_registers +ffffffff82b10160 r rv770_golden_registers +ffffffff82b101b0 r rv770_mgcg_init +ffffffff82b108f0 r rv730_golden_registers +ffffffff82b10950 r rv730_mgcg_init +ffffffff82b10ee0 r rv710_golden_registers +ffffffff82b10f30 r rv710_mgcg_init +ffffffff82b111d0 r rv740_golden_registers +ffffffff82b11360 r rv740_mgcg_init +ffffffff82b13000 r rv730_smc_int_vectors +ffffffff82b13040 r rv710_smc_int_vectors +ffffffff82b13080 r rv740_smc_int_vectors +ffffffff82b130c0 r cypress_smc_int_vectors +ffffffff82b13100 r caicos_smc_int_vectors +ffffffff82b13140 r cayman_smc_int_vectors +ffffffff82b14000 r tahiti_io_mc_regs +ffffffff82b14120 r pitcairn_io_mc_regs +ffffffff82b14240 r verde_io_mc_regs +ffffffff82b14360 r oland_io_mc_regs +ffffffff82b14480 r hainan_io_mc_regs +ffffffff82b145a0 r crtc_offsets +ffffffff82b145c0 r si_disp_int_status +ffffffff82b145e0 r tahiti_golden_registers +ffffffff82b14760 r tahiti_golden_rlc_registers +ffffffff82b147b0 r tahiti_mgcg_cgcg_init +ffffffff82b14d98 r tahiti_golden_registers2 +ffffffff82b14db0 r pitcairn_golden_registers +ffffffff82b14f00 r pitcairn_golden_rlc_registers +ffffffff82b14f40 r pitcairn_mgcg_cgcg_init +ffffffff82b153b0 r verde_golden_registers +ffffffff82b15620 r verde_golden_rlc_registers +ffffffff82b15660 r verde_mgcg_cgcg_init +ffffffff82b15ae0 r oland_golden_registers +ffffffff82b15c30 r oland_golden_rlc_registers +ffffffff82b15c70 r oland_mgcg_cgcg_init +ffffffff82b16000 r hainan_golden_registers +ffffffff82b1612c r hainan_golden_registers2 +ffffffff82b16140 r hainan_mgcg_cgcg_init +ffffffff82b164b0 r verde_rlc_save_restore_register_list +ffffffff82b16820 r si_cs_data +ffffffff82b16840 r si_SECT_CONTEXT_defs +ffffffff82b168c0 r si_SECT_CONTEXT_def_1 +ffffffff82b16c10 r si_SECT_CONTEXT_def_3 +ffffffff82b16c30 r si_SECT_CONTEXT_def_4 +ffffffff82b16ea4 r si_SECT_CONTEXT_def_5 +ffffffff82b16ea8 r si_SECT_CONTEXT_def_6 +ffffffff82b16eb0 r si_SECT_CONTEXT_def_2 +ffffffff82b172f0 r si_SECT_CONTEXT_def_7 +ffffffff82b176a0 r mc_cg_registers +ffffffff82b176d0 r si_default_state +ffffffff82b18000 r cac_weights_tahiti +ffffffff82b184d0 r lcac_tahiti +ffffffff82b18ba0 r cac_override_tahiti +ffffffff82b18bb4 r powertune_data_tahiti +ffffffff82b18bf0 r dte_data_tahiti +ffffffff82b18cc0 r dte_data_new_zealand +ffffffff82b18d90 r dte_data_malta +ffffffff82b18e60 r lcac_pitcairn +ffffffff82b19530 r cac_override_pitcairn +ffffffff82b19544 r powertune_data_pitcairn +ffffffff82b19580 r lcac_cape_verde +ffffffff82b199d0 r cac_override_cape_verde +ffffffff82b199e4 r powertune_data_cape_verde +ffffffff82b19a20 r cac_weights_cape_verde_pro +ffffffff82b19ef0 r cac_weights_heathrow +ffffffff82b1a3c0 r cac_weights_chelsea_xt +ffffffff82b1a890 r cac_weights_chelsea_pro +ffffffff82b1ad60 r cac_weights_cape_verde +ffffffff82b1b230 r cac_weights_mars_pro +ffffffff82b1b700 r lcac_mars_pro +ffffffff82b1ba60 r cac_override_oland +ffffffff82b1ba74 r powertune_data_mars_pro +ffffffff82b1bab0 r cac_weights_mars_xt +ffffffff82b1bf80 r cac_weights_oland_pro +ffffffff82b1c450 r cac_weights_oland_xt +ffffffff82b1c920 r lcac_oland +ffffffff82b1cc7c r powertune_data_oland +ffffffff82b1ccc0 r cac_weights_hainan +ffffffff82b1d184 r powertune_data_hainan +ffffffff82b1d1c0 r dte_data_aruba_pro +ffffffff82b1d290 r dte_data_tahiti_pro +ffffffff82b1d360 r dte_data_curacao_pro +ffffffff82b1d430 r dte_data_neptune_xt +ffffffff82b1d500 r dte_data_sun_xt +ffffffff82b1d5d0 r dte_data_venus_xtx +ffffffff82b1d6a0 r dte_data_venus_xt +ffffffff82b1d770 r dte_data_venus_pro +ffffffff82b1d840 r dte_data_mars_pro +ffffffff82b1e000 r si_program_jump_on_start.data +ffffffff82b1f000 r sumo_dtc +ffffffff82b20000 r trinity_mgcg_shls_default +ffffffff82b20380 r trinity_sysls_enable +ffffffff82b20450 r trinity_sysls_disable +ffffffff82b22000 r GC_BASE +ffffffff82b220a8 r HDP_BASE +ffffffff82b22150 r MMHUB_BASE +ffffffff82b221f8 r ATHUB_BASE +ffffffff82b222a0 r NBIO_BASE +ffffffff82b22348 r MP0_BASE +ffffffff82b223f0 r MP1_BASE +ffffffff82b22498 r DF_BASE +ffffffff82b22540 r OSSSYS_BASE +ffffffff82b225e8 r SDMA0_BASE +ffffffff82b22690 r SDMA1_BASE +ffffffff82b22738 r SDMA2_BASE +ffffffff82b227e0 r SDMA3_BASE +ffffffff82b22888 r SDMA4_BASE +ffffffff82b22930 r SMUIO_BASE +ffffffff82b229d8 r THM_BASE +ffffffff82b22a80 r UMC_BASE +ffffffff82b22b28 r VCN_BASE +ffffffff82b23000 r amdgpu_afmt_predefined_acr +ffffffff82b24000 r atom_op_names +ffffffff82b243e0 r opcode_table +ffffffff82b24bd0 r atom_dst_to_src +ffffffff82b24c50 r atom_io_names +ffffffff82b24c80 r atom_table_names +ffffffff82b24ed0 r atom_iio_len +ffffffff82b25000 r object_connector_convert +ffffffff82b25058 R amdgpu_vbios_version_attr_group +ffffffff82b26000 r voltage_names +ffffffff82b26020 r pre_emph_names +ffffffff82b27000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82b29000 r amdgpu_benchmark.common_modes +ffffffff82b2a000 r amdgpu_cgs_ops +ffffffff82b2b000 r amdgpu_connector_dp_funcs +ffffffff82b2b078 r amdgpu_connector_dp_helper_funcs +ffffffff82b2b0d8 r amdgpu_connector_edp_funcs +ffffffff82b2b150 r amdgpu_connector_vga_funcs +ffffffff82b2b1c8 r amdgpu_connector_vga_helper_funcs +ffffffff82b2b228 r amdgpu_connector_dvi_funcs +ffffffff82b2b2a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82b2b300 r amdgpu_connector_lvds_funcs +ffffffff82b2b378 r amdgpu_connector_lvds_helper_funcs +ffffffff82b2b3e0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82b2d000 R amdgpu_ctx_num_entities +ffffffff82b2e000 r amdgpu_kms_driver +ffffffff82b2e0f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82b2f000 r hw_id_map +ffffffff82b2f090 r hw_id_names +ffffffff82b30000 r hpd_names +ffffffff82b30030 r encoder_names +ffffffff82b30180 r dcc_retile_formats +ffffffff82b30270 r dcc_formats +ffffffff82b30360 R amdgpu_mode_funcs +ffffffff82b303b0 r amdgpu_underscan_enum_list +ffffffff82b303e0 r amdgpu_audio_enum_list +ffffffff82b30410 r amdgpu_dither_enum_list +ffffffff82b30430 r amdgpu_fb_funcs_atomic +ffffffff82b30448 r amdgpu_fb_funcs +ffffffff82b31000 R amdgpu_dmabuf_ops +ffffffff82b32000 R amdgpu_ioctls_kms +ffffffff82b32210 R amdgpu_partition_driver +ffffffff82b322f8 R amdgpu_ca +ffffffff82b32320 r pciidlist +ffffffff82b331f0 r amdgpu_unsupported_pciidlist +ffffffff82b33770 r amdgpu_kms_driver +ffffffff82b34000 r amdgpu_job_fence_ops +ffffffff82b34040 r amdgpu_fence_ops +ffffffff82b35000 r amdgpu_gem_object_funcs +ffffffff82b35070 r amdgpu_gem_vm_ops +ffffffff82b36000 R amdgpu_gtt_mgr_attr_group +ffffffff82b36018 r amdgpu_gtt_mgr_func +ffffffff82b37000 r amdgpu_atombios_i2c_algo +ffffffff82b38000 R node_id_to_phys_map +ffffffff82b39000 R amdgpu_sched_ops +ffffffff82b3b000 r amdgpu_vram_names +ffffffff82b3c000 r amdgpu_preempt_mgr_func +ffffffff82b3d000 R psp_ip_funcs +ffffffff82b3d0a0 R psp_v3_1_ip_block +ffffffff82b3d0b8 R psp_v10_0_ip_block +ffffffff82b3d0d0 R psp_v11_0_ip_block +ffffffff82b3d0e8 R psp_v11_0_8_ip_block +ffffffff82b3d100 R psp_v12_0_ip_block +ffffffff82b3d118 R psp_v13_0_ip_block +ffffffff82b3d130 R psp_v13_0_4_ip_block +ffffffff82b3f000 r sw_ring_info +ffffffff82b40000 r amdgpu_evict_flags.placements +ffffffff82b44000 R amdgpu_vkms_ip_block +ffffffff82b45000 R amdgpu_vm_cpu_funcs +ffffffff82b47000 R amdgpu_vm_sdma_funcs +ffffffff82b48000 R amdgpu_vram_mgr_attr_group +ffffffff82b48018 r amdgpu_vram_mgr_func +ffffffff82b48040 r amdgpu_dummy_vram_mgr_func +ffffffff82b49000 r xgmi_pcs_err_status_reg_arct +ffffffff82b49020 r xgmi3x16_pcs_ras_fields +ffffffff82b491f0 r xgmi_pcs_ras_fields +ffffffff82b49310 r wafl_pcs_ras_fields +ffffffff82b4a000 r GC_BASE +ffffffff82b4a0c0 r HDP_BASE +ffffffff82b4a180 r MMHUB_BASE +ffffffff82b4a240 r ATHUB_BASE +ffffffff82b4a300 r NBIF0_BASE +ffffffff82b4a3c0 r MP0_BASE +ffffffff82b4a480 r MP1_BASE +ffffffff82b4a540 r UVD_BASE +ffffffff82b4a600 r DF_BASE +ffffffff82b4a6c0 r OSSSYS_BASE +ffffffff82b4a780 r SDMA0_BASE +ffffffff82b4a840 r SDMA1_BASE +ffffffff82b4a900 r SDMA2_BASE +ffffffff82b4a9c0 r SDMA3_BASE +ffffffff82b4aa80 r SDMA4_BASE +ffffffff82b4ab40 r SDMA5_BASE +ffffffff82b4ac00 r SDMA6_BASE +ffffffff82b4acc0 r SDMA7_BASE +ffffffff82b4ad80 r SMUIO_BASE +ffffffff82b4ae40 r THM_BASE +ffffffff82b4af00 r UMC_BASE +ffffffff82b4afc0 r RSMU_BASE +ffffffff82b4c000 r cz_ih_ip_funcs +ffffffff82b4c0a0 R cz_ih_ip_block +ffffffff82b4c0b8 r cz_ih_funcs +ffffffff82b4d000 r crtc_offsets +ffffffff82b4d020 r dce_v10_0_ip_funcs +ffffffff82b4d0c0 R dce_v10_0_ip_block +ffffffff82b4d0d8 R dce_v10_1_ip_block +ffffffff82b4d0f0 r dce_v10_0_display_funcs +ffffffff82b4d150 r hpd_offsets +ffffffff82b4d168 r dce_v10_0_encoder_funcs +ffffffff82b4d188 r dce_v10_0_dac_helper_funcs +ffffffff82b4d1f0 r dce_v10_0_dig_helper_funcs +ffffffff82b4d258 r dce_v10_0_ext_helper_funcs +ffffffff82b4d2c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82b4d2f0 r dce_v10_0_crtc_irq_funcs +ffffffff82b4d300 r dce_v10_0_pageflip_irq_funcs +ffffffff82b4d310 r dce_v10_0_hpd_irq_funcs +ffffffff82b4d320 r interrupt_status_offsets +ffffffff82b4d380 r dce_v10_0_crtc_funcs +ffffffff82b4d440 r dce_v10_0_crtc_helper_funcs +ffffffff82b4d4c0 r vga_control_regs +ffffffff82b4d4e0 r dig_offsets +ffffffff82b4d500 r pin_offsets +ffffffff82b4d520 r fiji_mgcg_cgcg_init +ffffffff82b4d540 r golden_settings_fiji_a10 +ffffffff82b4d570 r tonga_mgcg_cgcg_init +ffffffff82b4d590 r golden_settings_tonga_a11 ffffffff82b4e000 r crtc_offsets -ffffffff82b4e020 r dce_v10_0_ip_funcs -ffffffff82b4e0c0 R dce_v10_0_ip_block -ffffffff82b4e0d8 R dce_v10_1_ip_block -ffffffff82b4e0f0 r dce_v10_0_display_funcs +ffffffff82b4e020 r dce_v11_0_ip_funcs +ffffffff82b4e0c0 R dce_v11_0_ip_block +ffffffff82b4e0d8 R dce_v11_2_ip_block +ffffffff82b4e0f0 r dce_v11_0_display_funcs ffffffff82b4e150 r hpd_offsets -ffffffff82b4e168 r dce_v10_0_encoder_funcs -ffffffff82b4e188 r dce_v10_0_dac_helper_funcs -ffffffff82b4e1f0 r dce_v10_0_dig_helper_funcs -ffffffff82b4e258 r dce_v10_0_ext_helper_funcs -ffffffff82b4e2c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82b4e2f0 r dce_v10_0_crtc_irq_funcs -ffffffff82b4e300 r dce_v10_0_pageflip_irq_funcs -ffffffff82b4e310 r dce_v10_0_hpd_irq_funcs +ffffffff82b4e168 r dce_v11_0_encoder_funcs +ffffffff82b4e188 r dce_v11_0_dac_helper_funcs +ffffffff82b4e1f0 r dce_v11_0_dig_helper_funcs +ffffffff82b4e258 r dce_v11_0_ext_helper_funcs +ffffffff82b4e2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82b4e2f0 r dce_v11_0_crtc_irq_funcs +ffffffff82b4e300 r dce_v11_0_pageflip_irq_funcs +ffffffff82b4e310 r dce_v11_0_hpd_irq_funcs ffffffff82b4e320 r interrupt_status_offsets -ffffffff82b4e380 r dce_v10_0_crtc_funcs -ffffffff82b4e440 r dce_v10_0_crtc_helper_funcs +ffffffff82b4e380 r dce_v11_0_crtc_funcs +ffffffff82b4e440 r dce_v11_0_crtc_helper_funcs ffffffff82b4e4c0 r vga_control_regs ffffffff82b4e4e0 r dig_offsets -ffffffff82b4e500 r pin_offsets -ffffffff82b4e520 r fiji_mgcg_cgcg_init -ffffffff82b4e540 r golden_settings_fiji_a10 -ffffffff82b4e570 r tonga_mgcg_cgcg_init -ffffffff82b4e590 r golden_settings_tonga_a11 -ffffffff82b4f000 r crtc_offsets -ffffffff82b4f020 r dce_v11_0_ip_funcs -ffffffff82b4f0c0 R dce_v11_0_ip_block -ffffffff82b4f0d8 R dce_v11_2_ip_block -ffffffff82b4f0f0 r dce_v11_0_display_funcs -ffffffff82b4f150 r hpd_offsets -ffffffff82b4f168 r dce_v11_0_encoder_funcs -ffffffff82b4f188 r dce_v11_0_dac_helper_funcs -ffffffff82b4f1f0 r dce_v11_0_dig_helper_funcs -ffffffff82b4f258 r dce_v11_0_ext_helper_funcs -ffffffff82b4f2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82b4f2f0 r dce_v11_0_crtc_irq_funcs -ffffffff82b4f300 r dce_v11_0_pageflip_irq_funcs -ffffffff82b4f310 r dce_v11_0_hpd_irq_funcs -ffffffff82b4f320 r interrupt_status_offsets -ffffffff82b4f380 r dce_v11_0_crtc_funcs -ffffffff82b4f440 r dce_v11_0_crtc_helper_funcs -ffffffff82b4f4c0 r vga_control_regs -ffffffff82b4f4e0 r dig_offsets -ffffffff82b4f510 r cz_mgcg_cgcg_init -ffffffff82b4f530 r cz_golden_settings_a11 -ffffffff82b4f550 r stoney_golden_settings_a11 -ffffffff82b4f570 r polaris11_golden_settings_a11 -ffffffff82b4f5b0 r polaris10_golden_settings_a11 -ffffffff82b50000 R df_v1_7_funcs -ffffffff82b50070 r df_v1_7_channel_number -ffffffff82b51000 R df_v3_6_funcs -ffffffff82b51070 r df_v3_6_channel_number -ffffffff82b52000 R df_v4_3_funcs -ffffffff82b53000 r GC_BASE -ffffffff82b530a8 r HDP_BASE -ffffffff82b53150 r MMHUB_BASE -ffffffff82b531f8 r ATHUB_BASE -ffffffff82b532a0 r NBIO_BASE -ffffffff82b53348 r MP0_BASE -ffffffff82b533f0 r MP1_BASE -ffffffff82b53498 r VCN0_BASE -ffffffff82b53540 r DF_BASE -ffffffff82b535e8 r DCN_BASE -ffffffff82b53690 r OSSSYS_BASE -ffffffff82b53738 r SMUIO_BASE -ffffffff82b537e0 r THM_BASE -ffffffff82b54000 r gfx_v10_0_ip_funcs -ffffffff82b540a0 R gfx_v10_0_ip_block -ffffffff82b540b8 r gfx_v10_0_gfx_funcs -ffffffff82b54120 r golden_settings_gc_rlc_spm_10_0_nv10 -ffffffff82b5a3c0 r golden_settings_gc_rlc_spm_10_1_nv14 -ffffffff82b5dde0 r golden_settings_gc_rlc_spm_10_1_2_nv12 -ffffffff82b64080 r gfx_v10_0_kiq_pm4_funcs -ffffffff82b640c0 r gfx_v10_0_ring_funcs_kiq -ffffffff82b64200 r gfx_v10_0_ring_funcs_gfx -ffffffff82b64340 r gfx_v10_0_ring_funcs_compute -ffffffff82b64480 r gfx_v10_0_eop_irq_funcs -ffffffff82b64490 r gfx_v10_0_kiq_irq_funcs -ffffffff82b644a0 r gfx_v10_0_priv_reg_irq_funcs -ffffffff82b644b0 r gfx_v10_0_priv_inst_irq_funcs -ffffffff82b644c0 r gfx_v10_0_rlc_funcs -ffffffff82b64528 r gfx_v10_0_rlc_funcs_sriov -ffffffff82b64590 r gfx10_cs_data -ffffffff82b645b0 r gfx10_SECT_CONTEXT_defs -ffffffff82b64640 r gfx10_SECT_CONTEXT_def_1 -ffffffff82b649a0 r gfx10_SECT_CONTEXT_def_3 -ffffffff82b649b0 r gfx10_SECT_CONTEXT_def_4 -ffffffff82b64c28 r gfx10_SECT_CONTEXT_def_5 -ffffffff82b64c30 r gfx10_SECT_CONTEXT_def_6 -ffffffff82b64c40 r gfx10_SECT_CONTEXT_def_2 -ffffffff82b65080 r gfx10_SECT_CONTEXT_def_7 -ffffffff82b65190 r gfx10_SECT_CONTEXT_def_8 -ffffffff82b654c0 r golden_settings_gc_10_1 -ffffffff82b65880 r golden_settings_gc_10_0_nv10 -ffffffff82b65880 r golden_settings_gc_10_1_1 -ffffffff82b65c10 r golden_settings_gc_10_1_2 -ffffffff82b65c10 r golden_settings_gc_10_1_nv14 -ffffffff82b66000 r golden_settings_gc_10_1_2_nv12 -ffffffff82b66000 r golden_settings_gc_10_3 -ffffffff82b66408 r golden_settings_gc_10_3_sienna_cichlid -ffffffff82b66410 r golden_settings_gc_10_3_2 -ffffffff82b66800 r golden_settings_gc_10_3_vangogh -ffffffff82b66a60 r golden_settings_gc_10_3_3 -ffffffff82b66c40 r golden_settings_gc_10_3_4 -ffffffff82b66fa0 r golden_settings_gc_10_3_5 -ffffffff82b672a0 r golden_settings_gc_10_0_cyan_skillfish -ffffffff82b675d0 r golden_settings_gc_10_3_6 -ffffffff82b677e0 r golden_settings_gc_10_3_7 -ffffffff82b68000 r gfx_v11_0_ip_funcs -ffffffff82b680a0 R gfx_v11_0_ip_block -ffffffff82b680b8 r gfx_v11_0_gfx_funcs -ffffffff82b68118 r gfx_v11_0_kiq_pm4_funcs -ffffffff82b68158 r gfx_v11_0_ring_funcs_kiq -ffffffff82b68298 r gfx_v11_0_ring_funcs_gfx -ffffffff82b683d8 r gfx_v11_0_ring_funcs_compute -ffffffff82b68518 r gfx_v11_0_eop_irq_funcs -ffffffff82b68528 r gfx_v11_0_priv_reg_irq_funcs -ffffffff82b68538 r gfx_v11_0_priv_inst_irq_funcs -ffffffff82b68548 r gfx_v11_0_rlc_gc_fed_irq_funcs -ffffffff82b68558 r gfx_v11_0_rlc_funcs -ffffffff82b685c0 r gfx11_cs_data -ffffffff82b685e0 r gfx11_SECT_CONTEXT_defs -ffffffff82b68660 r gfx11_SECT_CONTEXT_def_1 -ffffffff82b689c0 r gfx11_SECT_CONTEXT_def_3 -ffffffff82b689d0 r gfx11_SECT_CONTEXT_def_5 -ffffffff82b689d8 r gfx11_SECT_CONTEXT_def_6 -ffffffff82b689e0 r gfx11_SECT_CONTEXT_def_2 -ffffffff82b68e20 r gfx11_SECT_CONTEXT_def_4 -ffffffff82b690a0 r gfx11_SECT_CONTEXT_def_7 -ffffffff82b69510 r golden_settings_gc_11_0_1 -ffffffff82b695f0 r golden_settings_gc_11_0 -ffffffff82b6a000 r gfx_v8_0_ip_funcs -ffffffff82b6a0a0 R gfx_v8_0_ip_block -ffffffff82b6a0b8 R gfx_v8_1_ip_block -ffffffff82b6a0d0 r gfx_v8_0_gfx_funcs -ffffffff82b6a130 r gfx_v8_0_ring_funcs_kiq -ffffffff82b6a270 r gfx_v8_0_ring_funcs_gfx -ffffffff82b6a3b0 r gfx_v8_0_ring_funcs_compute -ffffffff82b6a4f0 r amdgpu_gds_reg_offset -ffffffff82b6a5f0 r gfx_v8_0_eop_irq_funcs -ffffffff82b6a600 r gfx_v8_0_priv_reg_irq_funcs -ffffffff82b6a610 r gfx_v8_0_priv_inst_irq_funcs -ffffffff82b6a620 r gfx_v8_0_cp_ecc_error_irq_funcs -ffffffff82b6a630 r gfx_v8_0_sq_irq_funcs -ffffffff82b6a640 r sq_edc_source_names -ffffffff82b6a678 r iceland_rlc_funcs -ffffffff82b6a6e0 r vi_cs_data -ffffffff82b6a700 r vi_SECT_CONTEXT_defs -ffffffff82b6a780 r vi_SECT_CONTEXT_def_1 -ffffffff82b6aad0 r vi_SECT_CONTEXT_def_3 -ffffffff82b6aaf0 r vi_SECT_CONTEXT_def_4 -ffffffff82b6ad64 r vi_SECT_CONTEXT_def_5 -ffffffff82b6ad6c r vi_SECT_CONTEXT_def_6 -ffffffff82b6ad70 r vi_SECT_CONTEXT_def_2 -ffffffff82b6b1c0 r vi_SECT_CONTEXT_def_7 -ffffffff82b6b570 r vgpr_init_compute_shader -ffffffff82b6b680 r vgpr_init_regs -ffffffff82b6b710 r sgpr1_init_regs -ffffffff82b6b7a0 r sgpr2_init_regs -ffffffff82b6b830 r sec_ded_counter_registers -ffffffff82b6b8a0 r iceland_mgcg_cgcg_init -ffffffff82b6bba0 r golden_settings_iceland_a11 -ffffffff82b6bc60 r iceland_golden_common_all -ffffffff82b6bcc0 r fiji_mgcg_cgcg_init -ffffffff82b6be70 r golden_settings_fiji_a10 -ffffffff82b6bf00 r fiji_golden_common_all -ffffffff82b6bf80 r tonga_mgcg_cgcg_init -ffffffff82b6c310 r golden_settings_tonga_a11 -ffffffff82b6c3d0 r tonga_golden_common_all -ffffffff82b6c430 r golden_settings_vegam_a11 -ffffffff82b6c500 r vegam_golden_common_all -ffffffff82b6c550 r golden_settings_polaris11_a11 -ffffffff82b6c620 r polaris11_golden_common_all -ffffffff82b6c670 r golden_settings_polaris10_a11 -ffffffff82b6c740 r polaris10_golden_common_all -ffffffff82b6c7a0 r cz_mgcg_cgcg_init -ffffffff82b6cb30 r cz_golden_settings_a11 -ffffffff82b6cbc0 r cz_golden_common_all -ffffffff82b6cc20 r stoney_mgcg_cgcg_init -ffffffff82b6cc60 r stoney_golden_settings_a11 -ffffffff82b6cce0 r stoney_golden_common_all -ffffffff82b6d000 R gfx_v9_0_ras_ops -ffffffff82b6d040 r gfx_v9_0_ip_funcs -ffffffff82b6d0e0 R gfx_v9_0_ip_block -ffffffff82b6d100 r ras_gfx_subblocks -ffffffff82b6db80 r gfx_v9_0_edc_counter_regs -ffffffff82b6df20 r gfx_v9_0_ras_fields -ffffffff82b6f000 r gfx_v9_0_gfx_funcs -ffffffff82b6f060 r gfx_v9_0_kiq_pm4_funcs -ffffffff82b6f0a0 r gfx_v9_0_ring_funcs_kiq -ffffffff82b6f1e0 r gfx_v9_0_ring_funcs_gfx -ffffffff82b6f320 r gfx_v9_0_sw_ring_funcs_gfx -ffffffff82b6f460 r gfx_v9_0_ring_funcs_compute -ffffffff82b6f5a0 r gfx_v9_0_eop_irq_funcs -ffffffff82b6f5b0 r gfx_v9_0_priv_reg_irq_funcs -ffffffff82b6f5c0 r gfx_v9_0_priv_inst_irq_funcs -ffffffff82b6f5d0 r gfx_v9_0_cp_ecc_error_irq_funcs -ffffffff82b6f5e0 r gfx_v9_0_rlc_funcs -ffffffff82b6f650 r gfx9_cs_data -ffffffff82b6f670 r gfx9_SECT_CONTEXT_defs -ffffffff82b6f700 r gfx9_SECT_CONTEXT_def_1 -ffffffff82b6fa50 r gfx9_SECT_CONTEXT_def_3 -ffffffff82b6fa60 r gfx9_SECT_CONTEXT_def_4 -ffffffff82b6fcd4 r gfx9_SECT_CONTEXT_def_5 -ffffffff82b6fcdc r gfx9_SECT_CONTEXT_def_6 -ffffffff82b6fce0 r gfx9_SECT_CONTEXT_def_7 -ffffffff82b6fdf0 r gfx9_SECT_CONTEXT_def_2 -ffffffff82b70260 r gfx9_SECT_CONTEXT_def_8 -ffffffff82b704d0 r vgpr_init_compute_shader_arcturus -ffffffff82b70d60 r vgpr_init_regs_arcturus -ffffffff82b70ef0 r vgpr_init_regs -ffffffff82b71080 r sgpr1_init_regs -ffffffff82b71210 r sgpr2_init_regs -ffffffff82b713a0 r golden_settings_gc_9_0 -ffffffff82b71580 r golden_settings_gc_9_0_vg10 -ffffffff82b71730 r golden_settings_gc_9_2_1 -ffffffff82b718b0 r golden_settings_gc_9_2_1_vg12 -ffffffff82b719f0 r golden_settings_gc_9_0_vg20 -ffffffff82b71b00 r golden_settings_gc_9_4_1_arct -ffffffff82b71c10 r golden_settings_gc_9_1 -ffffffff82b71e50 r golden_settings_gc_9_1_rv2 -ffffffff82b72020 r golden_settings_gc_9_1_rv1 -ffffffff82b720d0 r golden_settings_gc_9_1_rn -ffffffff82b721f0 r golden_settings_gc_9_x_common -ffffffff82b73000 R gfx_v9_4_ras_ops -ffffffff82b73040 r gfx_v9_4_edc_counter_regs -ffffffff82b73420 r gfx_v9_4_ras_fields -ffffffff82b75000 R vgpr_init_regs_aldebaran -ffffffff82b751b0 R sgpr112_init_regs_aldebaran -ffffffff82b75360 R sgpr96_init_regs_aldebaran -ffffffff82b75510 R sgpr64_init_regs_aldebaran -ffffffff82b756c0 r golden_settings_gc_9_4_2_alde -ffffffff82b75720 r golden_settings_gc_9_4_2_alde_die_0 -ffffffff82b757b0 r golden_settings_gc_9_4_2_alde_die_1 -ffffffff82b75840 r sgpr112_init_compute_shader_aldebaran -ffffffff82b75a60 r sgpr96_init_compute_shader_aldebaran -ffffffff82b75c50 r sgpr64_init_compute_shader_aldebaran -ffffffff82b75dc0 r vgpr_init_compute_shader_aldebaran -ffffffff82b766a0 r gfx_v9_4_2_edc_counter_regs -ffffffff82b76a20 r gfx_v9_4_2_ras_fields -ffffffff82b783c0 r gfx_v9_4_2_utc_blocks -ffffffff82b79000 r gfx_v9_4_3_ip_funcs -ffffffff82b790a0 R gfx_v9_4_3_ip_block -ffffffff82b790b8 r gfx_v9_4_3_kiq_pm4_funcs -ffffffff82b790f8 r gfx_v9_4_3_ring_funcs_kiq -ffffffff82b79238 r gfx_v9_4_3_ring_funcs_compute -ffffffff82b79378 r gfx_v9_4_3_eop_irq_funcs -ffffffff82b79388 r gfx_v9_4_3_priv_reg_irq_funcs -ffffffff82b79398 r gfx_v9_4_3_priv_inst_irq_funcs -ffffffff82b793a8 r gfx_v9_4_3_rlc_funcs -ffffffff82b79410 r gfx_v9_4_3_gfx_funcs -ffffffff82b79470 r gfx_v9_4_3_ce_reg_list -ffffffff82b79800 r gfx_v9_4_3_ras_mem_list_array -ffffffff82b79960 r gfx_v9_4_3_ue_reg_list -ffffffff82b79d20 r gfx_v9_4_3_ras_cp_mem_list -ffffffff82b79d70 r gfx_v9_4_3_ras_gcea_mem_list -ffffffff82b79eb0 r gfx_v9_4_3_ras_gc_cane_mem_list -ffffffff82b79ec0 r gfx_v9_4_3_ras_gcutcl2_mem_list -ffffffff82b79ed0 r gfx_v9_4_3_ras_gds_mem_list -ffffffff82b79ee0 r gfx_v9_4_3_ras_lds_mem_list -ffffffff82b7a100 r gfx_v9_4_3_ras_rlc_mem_list -ffffffff82b7a180 r gfx_v9_4_3_ras_sp_mem_list -ffffffff82b7a190 r gfx_v9_4_3_ras_spi_mem_list -ffffffff82b7a1d0 r gfx_v9_4_3_ras_sqc_mem_list -ffffffff82b7a340 r gfx_v9_4_3_ras_sq_mem_list -ffffffff82b7a380 r gfx_v9_4_3_ras_ta_mem_list -ffffffff82b7a3d0 r gfx_v9_4_3_ras_tcc_mem_list -ffffffff82b7a3e0 r gfx_v9_4_3_ras_tca_mem_list -ffffffff82b7a3f0 r gfx_v9_4_3_ras_tci_mem_list -ffffffff82b7a400 r gfx_v9_4_3_ras_tcp_mem_list -ffffffff82b7a590 r gfx_v9_4_3_ras_td_mem_list -ffffffff82b7a5c0 r gfx_v9_4_3_ras_tcx_mem_list -ffffffff82b7ab40 r gfx_v9_4_3_ras_atc_l2_mem_list -ffffffff82b7ab50 r gfx_v9_4_3_ras_utcl2_mem_list -ffffffff82b7ab60 r gfx_v9_4_3_ras_vml2_mem_list -ffffffff82b7ab70 r gfx_v9_4_3_ras_vml2_walker_mem_list -ffffffff82b7b000 R gfxhub_v1_0_funcs -ffffffff82b7c000 R gfxhub_v1_2_funcs -ffffffff82b7d000 R gfxhub_v2_0_funcs -ffffffff82b7d060 r gfxhub_v2_0_vmhub_funcs +ffffffff82b4e510 r cz_mgcg_cgcg_init +ffffffff82b4e530 r cz_golden_settings_a11 +ffffffff82b4e550 r stoney_golden_settings_a11 +ffffffff82b4e570 r polaris11_golden_settings_a11 +ffffffff82b4e5b0 r polaris10_golden_settings_a11 +ffffffff82b4f000 R df_v1_7_funcs +ffffffff82b4f070 r df_v1_7_channel_number +ffffffff82b50000 R df_v3_6_funcs +ffffffff82b50070 r df_v3_6_channel_number +ffffffff82b51000 R df_v4_3_funcs +ffffffff82b52000 r GC_BASE +ffffffff82b520a8 r HDP_BASE +ffffffff82b52150 r MMHUB_BASE +ffffffff82b521f8 r ATHUB_BASE +ffffffff82b522a0 r NBIO_BASE +ffffffff82b52348 r MP0_BASE +ffffffff82b523f0 r MP1_BASE +ffffffff82b52498 r VCN0_BASE +ffffffff82b52540 r DF_BASE +ffffffff82b525e8 r DCN_BASE +ffffffff82b52690 r OSSSYS_BASE +ffffffff82b52738 r SMUIO_BASE +ffffffff82b527e0 r THM_BASE +ffffffff82b53000 r gfx_v10_0_ip_funcs +ffffffff82b530a0 R gfx_v10_0_ip_block +ffffffff82b530b8 r gfx_v10_0_gfx_funcs +ffffffff82b53120 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82b593c0 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82b5cde0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82b63080 r gfx_v10_0_kiq_pm4_funcs +ffffffff82b630c0 r gfx_v10_0_ring_funcs_kiq +ffffffff82b63200 r gfx_v10_0_ring_funcs_gfx +ffffffff82b63340 r gfx_v10_0_ring_funcs_compute +ffffffff82b63480 r gfx_v10_0_eop_irq_funcs +ffffffff82b63490 r gfx_v10_0_kiq_irq_funcs +ffffffff82b634a0 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82b634b0 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82b634c0 r gfx_v10_0_rlc_funcs +ffffffff82b63528 r gfx_v10_0_rlc_funcs_sriov +ffffffff82b63590 r gfx10_cs_data +ffffffff82b635b0 r gfx10_SECT_CONTEXT_defs +ffffffff82b63640 r gfx10_SECT_CONTEXT_def_1 +ffffffff82b639a0 r gfx10_SECT_CONTEXT_def_3 +ffffffff82b639b0 r gfx10_SECT_CONTEXT_def_4 +ffffffff82b63c28 r gfx10_SECT_CONTEXT_def_5 +ffffffff82b63c30 r gfx10_SECT_CONTEXT_def_6 +ffffffff82b63c40 r gfx10_SECT_CONTEXT_def_2 +ffffffff82b64080 r gfx10_SECT_CONTEXT_def_7 +ffffffff82b64190 r gfx10_SECT_CONTEXT_def_8 +ffffffff82b644c0 r golden_settings_gc_10_1 +ffffffff82b64880 r golden_settings_gc_10_0_nv10 +ffffffff82b64880 r golden_settings_gc_10_1_1 +ffffffff82b64c10 r golden_settings_gc_10_1_2 +ffffffff82b64c10 r golden_settings_gc_10_1_nv14 +ffffffff82b65000 r golden_settings_gc_10_1_2_nv12 +ffffffff82b65000 r golden_settings_gc_10_3 +ffffffff82b65408 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82b65410 r golden_settings_gc_10_3_2 +ffffffff82b65800 r golden_settings_gc_10_3_vangogh +ffffffff82b65a60 r golden_settings_gc_10_3_3 +ffffffff82b65c40 r golden_settings_gc_10_3_4 +ffffffff82b65fa0 r golden_settings_gc_10_3_5 +ffffffff82b662a0 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82b665d0 r golden_settings_gc_10_3_6 +ffffffff82b667e0 r golden_settings_gc_10_3_7 +ffffffff82b67000 r gfx_v11_0_ip_funcs +ffffffff82b670a0 R gfx_v11_0_ip_block +ffffffff82b670b8 r gfx_v11_0_gfx_funcs +ffffffff82b67118 r gfx_v11_0_kiq_pm4_funcs +ffffffff82b67158 r gfx_v11_0_ring_funcs_kiq +ffffffff82b67298 r gfx_v11_0_ring_funcs_gfx +ffffffff82b673d8 r gfx_v11_0_ring_funcs_compute +ffffffff82b67518 r gfx_v11_0_eop_irq_funcs +ffffffff82b67528 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82b67538 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82b67548 r gfx_v11_0_rlc_gc_fed_irq_funcs +ffffffff82b67558 r gfx_v11_0_rlc_funcs +ffffffff82b675c0 r gfx11_cs_data +ffffffff82b675e0 r gfx11_SECT_CONTEXT_defs +ffffffff82b67660 r gfx11_SECT_CONTEXT_def_1 +ffffffff82b679c0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82b679d0 r gfx11_SECT_CONTEXT_def_5 +ffffffff82b679d8 r gfx11_SECT_CONTEXT_def_6 +ffffffff82b679e0 r gfx11_SECT_CONTEXT_def_2 +ffffffff82b67e20 r gfx11_SECT_CONTEXT_def_4 +ffffffff82b680a0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82b68510 r golden_settings_gc_11_0_1 +ffffffff82b685f0 r golden_settings_gc_11_0 +ffffffff82b69000 r gfx_v8_0_ip_funcs +ffffffff82b690a0 R gfx_v8_0_ip_block +ffffffff82b690b8 R gfx_v8_1_ip_block +ffffffff82b690d0 r gfx_v8_0_gfx_funcs +ffffffff82b69130 r gfx_v8_0_ring_funcs_kiq +ffffffff82b69270 r gfx_v8_0_ring_funcs_gfx +ffffffff82b693b0 r gfx_v8_0_ring_funcs_compute +ffffffff82b694f0 r amdgpu_gds_reg_offset +ffffffff82b695f0 r gfx_v8_0_eop_irq_funcs +ffffffff82b69600 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82b69610 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82b69620 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82b69630 r gfx_v8_0_sq_irq_funcs +ffffffff82b69640 r sq_edc_source_names +ffffffff82b69678 r iceland_rlc_funcs +ffffffff82b696e0 r vi_cs_data +ffffffff82b69700 r vi_SECT_CONTEXT_defs +ffffffff82b69780 r vi_SECT_CONTEXT_def_1 +ffffffff82b69ad0 r vi_SECT_CONTEXT_def_3 +ffffffff82b69af0 r vi_SECT_CONTEXT_def_4 +ffffffff82b69d64 r vi_SECT_CONTEXT_def_5 +ffffffff82b69d6c r vi_SECT_CONTEXT_def_6 +ffffffff82b69d70 r vi_SECT_CONTEXT_def_2 +ffffffff82b6a1c0 r vi_SECT_CONTEXT_def_7 +ffffffff82b6a570 r vgpr_init_compute_shader +ffffffff82b6a680 r vgpr_init_regs +ffffffff82b6a710 r sgpr1_init_regs +ffffffff82b6a7a0 r sgpr2_init_regs +ffffffff82b6a830 r sec_ded_counter_registers +ffffffff82b6a8a0 r iceland_mgcg_cgcg_init +ffffffff82b6aba0 r golden_settings_iceland_a11 +ffffffff82b6ac60 r iceland_golden_common_all +ffffffff82b6acc0 r fiji_mgcg_cgcg_init +ffffffff82b6ae70 r golden_settings_fiji_a10 +ffffffff82b6af00 r fiji_golden_common_all +ffffffff82b6af80 r tonga_mgcg_cgcg_init +ffffffff82b6b310 r golden_settings_tonga_a11 +ffffffff82b6b3d0 r tonga_golden_common_all +ffffffff82b6b430 r golden_settings_vegam_a11 +ffffffff82b6b500 r vegam_golden_common_all +ffffffff82b6b550 r golden_settings_polaris11_a11 +ffffffff82b6b620 r polaris11_golden_common_all +ffffffff82b6b670 r golden_settings_polaris10_a11 +ffffffff82b6b740 r polaris10_golden_common_all +ffffffff82b6b7a0 r cz_mgcg_cgcg_init +ffffffff82b6bb30 r cz_golden_settings_a11 +ffffffff82b6bbc0 r cz_golden_common_all +ffffffff82b6bc20 r stoney_mgcg_cgcg_init +ffffffff82b6bc60 r stoney_golden_settings_a11 +ffffffff82b6bce0 r stoney_golden_common_all +ffffffff82b6c000 R gfx_v9_0_ras_ops +ffffffff82b6c040 r gfx_v9_0_ip_funcs +ffffffff82b6c0e0 R gfx_v9_0_ip_block +ffffffff82b6c100 r ras_gfx_subblocks +ffffffff82b6cb80 r gfx_v9_0_edc_counter_regs +ffffffff82b6cf20 r gfx_v9_0_ras_fields +ffffffff82b6e000 r gfx_v9_0_gfx_funcs +ffffffff82b6e060 r gfx_v9_0_kiq_pm4_funcs +ffffffff82b6e0a0 r gfx_v9_0_ring_funcs_kiq +ffffffff82b6e1e0 r gfx_v9_0_ring_funcs_gfx +ffffffff82b6e320 r gfx_v9_0_sw_ring_funcs_gfx +ffffffff82b6e460 r gfx_v9_0_ring_funcs_compute +ffffffff82b6e5a0 r gfx_v9_0_eop_irq_funcs +ffffffff82b6e5b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82b6e5c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82b6e5d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82b6e5e0 r gfx_v9_0_rlc_funcs +ffffffff82b6e650 r gfx9_cs_data +ffffffff82b6e670 r gfx9_SECT_CONTEXT_defs +ffffffff82b6e700 r gfx9_SECT_CONTEXT_def_1 +ffffffff82b6ea50 r gfx9_SECT_CONTEXT_def_3 +ffffffff82b6ea60 r gfx9_SECT_CONTEXT_def_4 +ffffffff82b6ecd4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82b6ecdc r gfx9_SECT_CONTEXT_def_6 +ffffffff82b6ece0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82b6edf0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82b6f260 r gfx9_SECT_CONTEXT_def_8 +ffffffff82b6f4d0 r vgpr_init_compute_shader_arcturus +ffffffff82b6fd60 r vgpr_init_regs_arcturus +ffffffff82b6fef0 r vgpr_init_regs +ffffffff82b70080 r sgpr1_init_regs +ffffffff82b70210 r sgpr2_init_regs +ffffffff82b703a0 r golden_settings_gc_9_0 +ffffffff82b70580 r golden_settings_gc_9_0_vg10 +ffffffff82b70730 r golden_settings_gc_9_2_1 +ffffffff82b708b0 r golden_settings_gc_9_2_1_vg12 +ffffffff82b709f0 r golden_settings_gc_9_0_vg20 +ffffffff82b70b00 r golden_settings_gc_9_4_1_arct +ffffffff82b70c10 r golden_settings_gc_9_1 +ffffffff82b70e50 r golden_settings_gc_9_1_rv2 +ffffffff82b71020 r golden_settings_gc_9_1_rv1 +ffffffff82b710d0 r golden_settings_gc_9_1_rn +ffffffff82b711f0 r golden_settings_gc_9_x_common +ffffffff82b72000 R gfx_v9_4_ras_ops +ffffffff82b72040 r gfx_v9_4_edc_counter_regs +ffffffff82b72420 r gfx_v9_4_ras_fields +ffffffff82b74000 R vgpr_init_regs_aldebaran +ffffffff82b741b0 R sgpr112_init_regs_aldebaran +ffffffff82b74360 R sgpr96_init_regs_aldebaran +ffffffff82b74510 R sgpr64_init_regs_aldebaran +ffffffff82b746c0 r golden_settings_gc_9_4_2_alde +ffffffff82b74720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82b747b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82b74840 r sgpr112_init_compute_shader_aldebaran +ffffffff82b74a60 r sgpr96_init_compute_shader_aldebaran +ffffffff82b74c50 r sgpr64_init_compute_shader_aldebaran +ffffffff82b74dc0 r vgpr_init_compute_shader_aldebaran +ffffffff82b756a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82b75a20 r gfx_v9_4_2_ras_fields +ffffffff82b773c0 r gfx_v9_4_2_utc_blocks +ffffffff82b78000 r gfx_v9_4_3_ip_funcs +ffffffff82b780a0 R gfx_v9_4_3_ip_block +ffffffff82b780b8 r gfx_v9_4_3_kiq_pm4_funcs +ffffffff82b780f8 r gfx_v9_4_3_ring_funcs_kiq +ffffffff82b78238 r gfx_v9_4_3_ring_funcs_compute +ffffffff82b78378 r gfx_v9_4_3_eop_irq_funcs +ffffffff82b78388 r gfx_v9_4_3_priv_reg_irq_funcs +ffffffff82b78398 r gfx_v9_4_3_priv_inst_irq_funcs +ffffffff82b783a8 r gfx_v9_4_3_rlc_funcs +ffffffff82b78410 r gfx_v9_4_3_gfx_funcs +ffffffff82b78470 r gfx_v9_4_3_ce_reg_list +ffffffff82b78800 r gfx_v9_4_3_ras_mem_list_array +ffffffff82b78960 r gfx_v9_4_3_ue_reg_list +ffffffff82b78d20 r gfx_v9_4_3_ras_cp_mem_list +ffffffff82b78d70 r gfx_v9_4_3_ras_gcea_mem_list +ffffffff82b78eb0 r gfx_v9_4_3_ras_gc_cane_mem_list +ffffffff82b78ec0 r gfx_v9_4_3_ras_gcutcl2_mem_list +ffffffff82b78ed0 r gfx_v9_4_3_ras_gds_mem_list +ffffffff82b78ee0 r gfx_v9_4_3_ras_lds_mem_list +ffffffff82b79100 r gfx_v9_4_3_ras_rlc_mem_list +ffffffff82b79180 r gfx_v9_4_3_ras_sp_mem_list +ffffffff82b79190 r gfx_v9_4_3_ras_spi_mem_list +ffffffff82b791d0 r gfx_v9_4_3_ras_sqc_mem_list +ffffffff82b79340 r gfx_v9_4_3_ras_sq_mem_list +ffffffff82b79380 r gfx_v9_4_3_ras_ta_mem_list +ffffffff82b793d0 r gfx_v9_4_3_ras_tcc_mem_list +ffffffff82b793e0 r gfx_v9_4_3_ras_tca_mem_list +ffffffff82b793f0 r gfx_v9_4_3_ras_tci_mem_list +ffffffff82b79400 r gfx_v9_4_3_ras_tcp_mem_list +ffffffff82b79590 r gfx_v9_4_3_ras_td_mem_list +ffffffff82b795c0 r gfx_v9_4_3_ras_tcx_mem_list +ffffffff82b79b40 r gfx_v9_4_3_ras_atc_l2_mem_list +ffffffff82b79b50 r gfx_v9_4_3_ras_utcl2_mem_list +ffffffff82b79b60 r gfx_v9_4_3_ras_vml2_mem_list +ffffffff82b79b70 r gfx_v9_4_3_ras_vml2_walker_mem_list +ffffffff82b7a000 R gfxhub_v1_0_funcs +ffffffff82b7b000 R gfxhub_v1_2_funcs +ffffffff82b7c000 R gfxhub_v2_0_funcs +ffffffff82b7c060 r gfxhub_v2_0_vmhub_funcs +ffffffff82b7c070 r gfxhub_client_ids +ffffffff82b7d000 R gfxhub_v2_1_funcs +ffffffff82b7d060 r gfxhub_v2_1_vmhub_funcs ffffffff82b7d070 r gfxhub_client_ids -ffffffff82b7e000 R gfxhub_v2_1_funcs -ffffffff82b7e060 r gfxhub_v2_1_vmhub_funcs +ffffffff82b7e000 R gfxhub_v3_0_funcs +ffffffff82b7e060 r gfxhub_v3_0_vmhub_funcs ffffffff82b7e070 r gfxhub_client_ids -ffffffff82b7f000 R gfxhub_v3_0_funcs -ffffffff82b7f060 r gfxhub_v3_0_vmhub_funcs +ffffffff82b7f000 R gfxhub_v3_0_3_funcs +ffffffff82b7f060 r gfxhub_v3_0_3_vmhub_funcs ffffffff82b7f070 r gfxhub_client_ids -ffffffff82b80000 R gfxhub_v3_0_3_funcs -ffffffff82b80060 r gfxhub_v3_0_3_vmhub_funcs -ffffffff82b80070 r gfxhub_client_ids -ffffffff82b81000 R gmc_v10_0_ip_funcs -ffffffff82b810a0 R gmc_v10_0_ip_block -ffffffff82b810b8 r gmc_v10_0_gmc_funcs -ffffffff82b81110 r gmc_v10_0_irq_funcs -ffffffff82b81120 r gmc_v10_0_ecc_funcs -ffffffff82b82000 R gmc_v11_0_ip_funcs -ffffffff82b820a0 R gmc_v11_0_ip_block -ffffffff82b820b8 r gmc_v11_0_gmc_funcs -ffffffff82b82110 r gmc_v11_0_irq_funcs -ffffffff82b82120 r gmc_v11_0_ecc_funcs -ffffffff82b83000 r gmc_v7_0_ip_funcs -ffffffff82b830a0 R gmc_v7_0_ip_block -ffffffff82b830b8 R gmc_v7_4_ip_block -ffffffff82b830d0 r gmc_v7_0_gmc_funcs -ffffffff82b83128 r gmc_v7_0_irq_funcs -ffffffff82b83138 r iceland_mgcg_cgcg_init -ffffffff82b83150 r golden_settings_iceland_a11 -ffffffff82b83180 r mc_cg_registers -ffffffff82b831b0 r mc_cg_en -ffffffff82b831e0 r mc_cg_ls_en -ffffffff82b84000 r gmc_v8_0_ip_funcs -ffffffff82b840a0 R gmc_v8_0_ip_block -ffffffff82b840b8 R gmc_v8_1_ip_block -ffffffff82b840d0 R gmc_v8_5_ip_block -ffffffff82b840e8 r gmc_v8_0_gmc_funcs -ffffffff82b84140 r gmc_v8_0_irq_funcs -ffffffff82b84150 r fiji_mgcg_cgcg_init -ffffffff82b84160 r golden_settings_fiji_a10 -ffffffff82b84190 r tonga_mgcg_cgcg_init -ffffffff82b841a0 r golden_settings_tonga_a11 -ffffffff82b84200 r golden_settings_polaris11_a11 -ffffffff82b84230 r golden_settings_polaris10_a11 -ffffffff82b8426c r cz_mgcg_cgcg_init -ffffffff82b84280 r stoney_mgcg_cgcg_init -ffffffff82b842a0 r golden_settings_stoney_common -ffffffff82b85000 R gmc_v9_0_ip_funcs -ffffffff82b850a0 R gmc_v9_0_ip_block -ffffffff82b850b8 r gmc_v9_0_gmc_funcs -ffffffff82b85110 r gmc_v9_0_irq_funcs -ffffffff82b85120 r gmc_v9_0_ecc_funcs -ffffffff82b85130 r gfxhub_client_ids -ffffffff82b851a0 r mmhub_client_ids_vega10 -ffffffff82b85490 r mmhub_client_ids_vega12 -ffffffff82b85790 r mmhub_client_ids_vega20 -ffffffff82b85a80 r mmhub_client_ids_arcturus -ffffffff82b87290 r mmhub_client_ids_raven -ffffffff82b87450 r mmhub_client_ids_renoir -ffffffff82b87640 r mmhub_client_ids_aldebaran -ffffffff82b88e50 r ecc_umc_mcumc_ctrl_addrs -ffffffff82b88ed0 r ecc_umc_mcumc_ctrl_mask_addrs -ffffffff82b88f50 r golden_settings_mmhub_1_0_0 -ffffffff82b88f80 r golden_settings_athub_1_0_0 -ffffffff82b89000 R hdp_v4_0_funcs -ffffffff82b8a000 R hdp_v5_0_funcs -ffffffff82b8b000 R hdp_v5_2_funcs -ffffffff82b8c000 R hdp_v6_0_funcs -ffffffff82b8d000 r iceland_ih_ip_funcs -ffffffff82b8d0a0 R iceland_ih_ip_block -ffffffff82b8d0b8 r iceland_ih_funcs -ffffffff82b8e000 r ih_v6_0_ip_funcs -ffffffff82b8e0a0 R ih_v6_0_ip_block -ffffffff82b8e0b8 r ih_v6_0_funcs -ffffffff82b8e0d8 r ih_v6_0_self_irq_funcs -ffffffff82b8f000 r ih_v6_1_ip_funcs -ffffffff82b8f0a0 R ih_v6_1_ip_block -ffffffff82b8f0b8 r ih_v6_1_funcs -ffffffff82b8f0d8 r ih_v6_1_self_irq_funcs -ffffffff82b90000 R gfx_v11_0_imu_funcs -ffffffff82b90030 r imu_rlc_ram_golden_11 -ffffffff82b90680 r imu_rlc_ram_golden_11_0_2 -ffffffff82b91000 r imu_rlc_ram_golden_11_0_3 -ffffffff82b92000 r jpeg_v1_0_decode_ring_vm_funcs -ffffffff82b92140 r jpeg_v1_0_irq_funcs -ffffffff82b93000 r jpeg_v2_0_ip_funcs -ffffffff82b930a0 R jpeg_v2_0_ip_block -ffffffff82b930b8 r jpeg_v2_0_dec_ring_vm_funcs -ffffffff82b931f8 r jpeg_v2_0_irq_funcs -ffffffff82b94000 r jpeg_v2_5_ip_funcs -ffffffff82b940a0 R jpeg_v2_5_ip_block -ffffffff82b940b8 r jpeg_v2_6_ip_funcs -ffffffff82b94158 R jpeg_v2_6_ip_block -ffffffff82b94170 R jpeg_v2_6_ras_hw_ops -ffffffff82b941b0 r jpeg_v2_5_dec_ring_vm_funcs -ffffffff82b942f0 r jpeg_v2_6_dec_ring_vm_funcs -ffffffff82b94430 r jpeg_v2_5_irq_funcs -ffffffff82b94440 r jpeg_v2_6_ras_irq_funcs -ffffffff82b95000 r jpeg_v3_0_ip_funcs -ffffffff82b950a0 R jpeg_v3_0_ip_block -ffffffff82b950b8 r jpeg_v3_0_dec_ring_vm_funcs -ffffffff82b951f8 r jpeg_v3_0_irq_funcs -ffffffff82b96000 r jpeg_v4_0_ip_funcs -ffffffff82b960a0 R jpeg_v4_0_ip_block -ffffffff82b960b8 R jpeg_v4_0_ras_hw_ops -ffffffff82b960f8 r jpeg_v4_0_dec_ring_vm_funcs -ffffffff82b96238 r jpeg_v4_0_irq_funcs -ffffffff82b96248 r jpeg_v4_0_ras_irq_funcs -ffffffff82b97000 r jpeg_v4_0_3_ip_funcs -ffffffff82b970a0 R jpeg_v4_0_3_ip_block -ffffffff82b970b8 r jpeg_v4_0_3_dec_ring_vm_funcs -ffffffff82b971f8 r jpeg_v4_0_3_irq_funcs -ffffffff82b97208 r jpeg_v4_0_3_ras_hw_ops -ffffffff82b97250 r jpeg_v4_0_3_ue_reg_list -ffffffff82b98000 R lsdma_v6_0_funcs -ffffffff82b99000 r mca_v3_0_mp0_hw_ops -ffffffff82b99040 r mca_v3_0_mp1_hw_ops -ffffffff82b99080 r mca_v3_0_mpio_hw_ops -ffffffff82b9a000 r mes_v10_1_ip_funcs -ffffffff82b9a0a0 R mes_v10_1_ip_block -ffffffff82b9a0b8 r mes_v10_1_funcs -ffffffff82b9a0e8 r mes_v10_1_ring_funcs -ffffffff82b9b000 r mes_v11_0_ip_funcs -ffffffff82b9b0a0 R mes_v11_0_ip_block -ffffffff82b9b0b8 r mes_v11_0_funcs -ffffffff82b9b0e8 r mes_v11_0_ring_funcs -ffffffff82b9c000 R mmhub_v1_0_funcs -ffffffff82b9c050 r mmhub_v1_0_edc_cnt_regs -ffffffff82b9c0c0 r mmhub_v1_0_ras_fields -ffffffff82b9d000 R mmhub_v1_7_funcs -ffffffff82b9d050 r mmhub_v1_7_edc_cnt_regs -ffffffff82b9d250 r mmhub_v1_7_ras_fields -ffffffff82b9e9c0 r mmhub_v1_7_ea_err_status_regs -ffffffff82b9f000 R mmhub_v1_8_funcs -ffffffff82b9f050 r mmhub_v1_8_ras_hw_ops -ffffffff82b9f090 r mmhub_v1_8_ce_reg_list -ffffffff82b9f180 r mmhub_v1_8_ras_memory_list -ffffffff82b9f2b0 r mmhub_v1_8_ue_reg_list -ffffffff82ba0000 R mmhub_v2_0_funcs -ffffffff82ba0050 r mmhub_v2_0_vmhub_funcs -ffffffff82ba0060 r mmhub_client_ids_navi1x -ffffffff82ba0190 r mmhub_client_ids_sienna_cichlid -ffffffff82ba0450 r mmhub_client_ids_beige_goby -ffffffff82ba1000 R mmhub_v2_3_funcs -ffffffff82ba1050 r mmhub_v2_3_vmhub_funcs -ffffffff82ba1060 r mmhub_client_ids_vangogh -ffffffff82ba2000 R mmhub_v3_0_funcs -ffffffff82ba2050 r mmhub_v3_0_vmhub_funcs -ffffffff82ba2060 r mmhub_client_ids_v3_0_0 -ffffffff82ba3000 R mmhub_v3_0_1_funcs -ffffffff82ba3050 r mmhub_v3_0_1_vmhub_funcs -ffffffff82ba3060 r mmhub_client_ids_v3_0_1 -ffffffff82ba4000 R mmhub_v3_0_2_funcs -ffffffff82ba4050 r mmhub_v3_0_2_vmhub_funcs -ffffffff82ba4060 r mmhub_client_ids_v3_0_2 -ffffffff82ba5000 R mmhub_v9_4_ras_hw_ops -ffffffff82ba5040 R mmhub_v9_4_funcs -ffffffff82ba5090 r mmhub_v9_4_edc_cnt_regs -ffffffff82ba5330 r mmhub_v9_4_ras_fields -ffffffff82ba73b0 r mmhub_v9_4_err_status_regs -ffffffff82ba8000 r xgpu_ai_mailbox_ack_irq_funcs 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sdma_v5_2_ring_funcs -ffffffff82bc31f8 r sdma_v5_2_buffer_funcs -ffffffff82bc3218 r sdma_v5_2_vm_pte_funcs -ffffffff82bc3238 r sdma_v5_2_trap_irq_funcs -ffffffff82bc3248 r sdma_v5_2_illegal_inst_irq_funcs -ffffffff82bc4000 R sdma_v6_0_ip_funcs -ffffffff82bc40a0 R sdma_v6_0_ip_block -ffffffff82bc40b8 r sdma_v6_0_ring_funcs -ffffffff82bc41f8 r sdma_v6_0_buffer_funcs -ffffffff82bc4218 r sdma_v6_0_vm_pte_funcs -ffffffff82bc4238 r sdma_v6_0_trap_irq_funcs -ffffffff82bc4248 r sdma_v6_0_illegal_inst_irq_funcs -ffffffff82bc5000 r smu_v11_0_i2c_algo -ffffffff82bc5010 r smu_v11_0_i2c_i2c_lock_ops -ffffffff82bc5028 r smu_v11_0_i2c_control_quirks -ffffffff82bc6000 R smuio_v11_0_funcs -ffffffff82bc7000 R smuio_v11_0_6_funcs -ffffffff82bc8000 R smuio_v13_0_funcs -ffffffff82bc9000 R smuio_v13_0_3_funcs -ffffffff82bca000 R smuio_v13_0_6_funcs -ffffffff82bcb000 R smuio_v9_0_funcs -ffffffff82bcc000 r soc15_common_ip_funcs -ffffffff82bcc0a0 R vega10_common_ip_block -ffffffff82bcc0b8 r soc15_asic_funcs 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-ffffffff82be9000 r amdgpu_dm_encoder_funcs -ffffffff82be9020 r dm_mst_cbs -ffffffff82be9030 r dm_dp_mst_connector_funcs -ffffffff82be90a8 r dm_dp_mst_connector_helper_funcs -ffffffff82bea000 r dm_plane_funcs -ffffffff82bea068 r dm_plane_helper_funcs +ffffffff82b80000 R gmc_v10_0_ip_funcs +ffffffff82b800a0 R gmc_v10_0_ip_block +ffffffff82b800b8 r gmc_v10_0_gmc_funcs +ffffffff82b80110 r gmc_v10_0_irq_funcs +ffffffff82b80120 r gmc_v10_0_ecc_funcs +ffffffff82b81000 R gmc_v11_0_ip_funcs +ffffffff82b810a0 R gmc_v11_0_ip_block +ffffffff82b810b8 r gmc_v11_0_gmc_funcs +ffffffff82b81110 r gmc_v11_0_irq_funcs +ffffffff82b81120 r gmc_v11_0_ecc_funcs +ffffffff82b82000 r gmc_v7_0_ip_funcs +ffffffff82b820a0 R gmc_v7_0_ip_block +ffffffff82b820b8 R gmc_v7_4_ip_block +ffffffff82b820d0 r gmc_v7_0_gmc_funcs +ffffffff82b82128 r gmc_v7_0_irq_funcs +ffffffff82b82138 r iceland_mgcg_cgcg_init +ffffffff82b82150 r golden_settings_iceland_a11 +ffffffff82b82180 r mc_cg_registers +ffffffff82b821b0 r mc_cg_en +ffffffff82b821e0 r mc_cg_ls_en +ffffffff82b83000 r gmc_v8_0_ip_funcs +ffffffff82b830a0 R gmc_v8_0_ip_block +ffffffff82b830b8 R gmc_v8_1_ip_block +ffffffff82b830d0 R gmc_v8_5_ip_block +ffffffff82b830e8 r gmc_v8_0_gmc_funcs +ffffffff82b83140 r gmc_v8_0_irq_funcs +ffffffff82b83150 r fiji_mgcg_cgcg_init +ffffffff82b83160 r golden_settings_fiji_a10 +ffffffff82b83190 r tonga_mgcg_cgcg_init +ffffffff82b831a0 r golden_settings_tonga_a11 +ffffffff82b83200 r golden_settings_polaris11_a11 +ffffffff82b83230 r golden_settings_polaris10_a11 +ffffffff82b8326c r cz_mgcg_cgcg_init +ffffffff82b83280 r stoney_mgcg_cgcg_init +ffffffff82b832a0 r golden_settings_stoney_common +ffffffff82b84000 R gmc_v9_0_ip_funcs +ffffffff82b840a0 R gmc_v9_0_ip_block +ffffffff82b840b8 r gmc_v9_0_gmc_funcs +ffffffff82b84110 r gmc_v9_0_irq_funcs +ffffffff82b84120 r gmc_v9_0_ecc_funcs +ffffffff82b84130 r gfxhub_client_ids +ffffffff82b841a0 r mmhub_client_ids_vega10 +ffffffff82b84490 r mmhub_client_ids_vega12 +ffffffff82b84790 r mmhub_client_ids_vega20 +ffffffff82b84a80 r mmhub_client_ids_arcturus +ffffffff82b86290 r mmhub_client_ids_raven +ffffffff82b86450 r mmhub_client_ids_renoir +ffffffff82b86640 r mmhub_client_ids_aldebaran +ffffffff82b87e50 r ecc_umc_mcumc_ctrl_addrs +ffffffff82b87ed0 r ecc_umc_mcumc_ctrl_mask_addrs +ffffffff82b87f50 r golden_settings_mmhub_1_0_0 +ffffffff82b87f80 r golden_settings_athub_1_0_0 +ffffffff82b88000 R hdp_v4_0_funcs +ffffffff82b89000 R hdp_v5_0_funcs +ffffffff82b8a000 R hdp_v5_2_funcs +ffffffff82b8b000 R hdp_v6_0_funcs +ffffffff82b8c000 r iceland_ih_ip_funcs +ffffffff82b8c0a0 R iceland_ih_ip_block +ffffffff82b8c0b8 r iceland_ih_funcs +ffffffff82b8d000 r ih_v6_0_ip_funcs +ffffffff82b8d0a0 R ih_v6_0_ip_block +ffffffff82b8d0b8 r ih_v6_0_funcs +ffffffff82b8d0d8 r ih_v6_0_self_irq_funcs +ffffffff82b8e000 r ih_v6_1_ip_funcs +ffffffff82b8e0a0 R ih_v6_1_ip_block +ffffffff82b8e0b8 r ih_v6_1_funcs +ffffffff82b8e0d8 r ih_v6_1_self_irq_funcs +ffffffff82b8f000 R gfx_v11_0_imu_funcs +ffffffff82b8f030 r imu_rlc_ram_golden_11 +ffffffff82b8f680 r imu_rlc_ram_golden_11_0_2 +ffffffff82b90000 r imu_rlc_ram_golden_11_0_3 +ffffffff82b91000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82b91140 r jpeg_v1_0_irq_funcs +ffffffff82b92000 r jpeg_v2_0_ip_funcs +ffffffff82b920a0 R jpeg_v2_0_ip_block +ffffffff82b920b8 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82b921f8 r jpeg_v2_0_irq_funcs +ffffffff82b93000 r jpeg_v2_5_ip_funcs +ffffffff82b930a0 R jpeg_v2_5_ip_block +ffffffff82b930b8 r jpeg_v2_6_ip_funcs +ffffffff82b93158 R jpeg_v2_6_ip_block +ffffffff82b93170 R jpeg_v2_6_ras_hw_ops +ffffffff82b931b0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82b932f0 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82b93430 r jpeg_v2_5_irq_funcs +ffffffff82b93440 r jpeg_v2_6_ras_irq_funcs +ffffffff82b94000 r jpeg_v3_0_ip_funcs +ffffffff82b940a0 R jpeg_v3_0_ip_block +ffffffff82b940b8 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82b941f8 r jpeg_v3_0_irq_funcs +ffffffff82b95000 r jpeg_v4_0_ip_funcs +ffffffff82b950a0 R jpeg_v4_0_ip_block +ffffffff82b950b8 R jpeg_v4_0_ras_hw_ops +ffffffff82b950f8 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82b95238 r jpeg_v4_0_irq_funcs +ffffffff82b95248 r jpeg_v4_0_ras_irq_funcs +ffffffff82b96000 r jpeg_v4_0_3_ip_funcs +ffffffff82b960a0 R jpeg_v4_0_3_ip_block +ffffffff82b960b8 r jpeg_v4_0_3_dec_ring_vm_funcs +ffffffff82b961f8 r jpeg_v4_0_3_irq_funcs +ffffffff82b96208 r jpeg_v4_0_3_ras_hw_ops +ffffffff82b96250 r jpeg_v4_0_3_ue_reg_list +ffffffff82b97000 R lsdma_v6_0_funcs +ffffffff82b98000 r mca_v3_0_mp0_hw_ops +ffffffff82b98040 r mca_v3_0_mp1_hw_ops +ffffffff82b98080 r mca_v3_0_mpio_hw_ops +ffffffff82b99000 r mes_v10_1_ip_funcs +ffffffff82b990a0 R mes_v10_1_ip_block +ffffffff82b990b8 r mes_v10_1_funcs +ffffffff82b990e8 r mes_v10_1_ring_funcs +ffffffff82b9a000 r mes_v11_0_ip_funcs +ffffffff82b9a0a0 R mes_v11_0_ip_block +ffffffff82b9a0b8 r mes_v11_0_funcs +ffffffff82b9a0e8 r mes_v11_0_ring_funcs +ffffffff82b9b000 R mmhub_v1_0_funcs +ffffffff82b9b050 r mmhub_v1_0_edc_cnt_regs +ffffffff82b9b0c0 r mmhub_v1_0_ras_fields +ffffffff82b9c000 R mmhub_v1_7_funcs +ffffffff82b9c050 r mmhub_v1_7_edc_cnt_regs +ffffffff82b9c250 r mmhub_v1_7_ras_fields +ffffffff82b9d9c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82b9e000 R mmhub_v1_8_funcs +ffffffff82b9e050 r mmhub_v1_8_ras_hw_ops +ffffffff82b9e090 r mmhub_v1_8_ce_reg_list +ffffffff82b9e180 r mmhub_v1_8_ras_memory_list +ffffffff82b9e2b0 r mmhub_v1_8_ue_reg_list +ffffffff82b9f000 R mmhub_v2_0_funcs +ffffffff82b9f050 r mmhub_v2_0_vmhub_funcs +ffffffff82b9f060 r mmhub_client_ids_navi1x +ffffffff82b9f190 r mmhub_client_ids_sienna_cichlid +ffffffff82b9f450 r mmhub_client_ids_beige_goby +ffffffff82ba0000 R mmhub_v2_3_funcs +ffffffff82ba0050 r mmhub_v2_3_vmhub_funcs +ffffffff82ba0060 r mmhub_client_ids_vangogh +ffffffff82ba1000 R mmhub_v3_0_funcs +ffffffff82ba1050 r mmhub_v3_0_vmhub_funcs +ffffffff82ba1060 r mmhub_client_ids_v3_0_0 +ffffffff82ba2000 R mmhub_v3_0_1_funcs +ffffffff82ba2050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82ba2060 r mmhub_client_ids_v3_0_1 +ffffffff82ba3000 R mmhub_v3_0_2_funcs +ffffffff82ba3050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82ba3060 r mmhub_client_ids_v3_0_2 +ffffffff82ba4000 R mmhub_v9_4_ras_hw_ops +ffffffff82ba4040 R mmhub_v9_4_funcs +ffffffff82ba4090 r mmhub_v9_4_edc_cnt_regs +ffffffff82ba4330 r mmhub_v9_4_ras_fields +ffffffff82ba63b0 r mmhub_v9_4_err_status_regs +ffffffff82ba7000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82ba7010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82ba7020 R xgpu_ai_virt_ops +ffffffff82ba8000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82ba8010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82ba8020 R xgpu_nv_virt_ops +ffffffff82ba9000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82ba9240 r xgpu_fiji_golden_settings_a10 +ffffffff82ba9370 r xgpu_fiji_golden_common_all +ffffffff82ba93f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82ba9810 r xgpu_tonga_golden_settings_a11 +ffffffff82ba99d0 r xgpu_tonga_golden_common_all +ffffffff82ba9a28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82ba9a38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82ba9a48 R xgpu_vi_virt_ops +ffffffff82baa000 r navi10_ih_ip_funcs +ffffffff82baa0a0 R navi10_ih_ip_block +ffffffff82baa0b8 r navi10_ih_funcs +ffffffff82baa0d8 r navi10_ih_self_irq_funcs +ffffffff82bab000 R nbio_v2_3_hdp_flush_reg +ffffffff82bab048 R nbio_v2_3_funcs +ffffffff82bac000 R nbio_v4_3_hdp_flush_reg +ffffffff82bac048 R nbio_v4_3_funcs +ffffffff82bac158 R nbio_v4_3_sriov_funcs +ffffffff82bac268 r nbio_v4_3_ras_err_event_athub_irq_funcs +ffffffff82bad000 R nbio_v6_1_hdp_flush_reg +ffffffff82bad048 R nbio_v6_1_funcs +ffffffff82bae000 R nbio_v7_0_hdp_flush_reg +ffffffff82bae048 R nbio_v7_0_funcs +ffffffff82baf000 R nbio_v7_2_hdp_flush_reg +ffffffff82baf048 R nbio_v7_2_funcs +ffffffff82bb0000 R nbio_v7_4_hdp_flush_reg +ffffffff82bb0048 R nbio_v7_4_ras_hw_ops +ffffffff82bb0088 R nbio_v7_4_funcs +ffffffff82bb0198 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82bb01a8 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82bb1000 R nbio_v7_7_hdp_flush_reg +ffffffff82bb1048 R nbio_v7_7_funcs +ffffffff82bb2000 R nbio_v7_9_hdp_flush_reg +ffffffff82bb2048 R nbio_v7_9_funcs +ffffffff82bb2158 R nbio_v7_9_ras_hw_ops +ffffffff82bb2198 r nbio_v7_9_ras_controller_irq_funcs +ffffffff82bb21a8 r nbio_v7_9_ras_err_event_athub_irq_funcs +ffffffff82bb3000 r nv_common_ip_funcs +ffffffff82bb30a0 R nv_common_ip_block +ffffffff82bb30b8 r nv_asic_funcs +ffffffff82bb3180 r nv_allowed_read_registers +ffffffff82bb3300 r sc_video_codecs_encode +ffffffff82bb3310 r sc_video_codecs_decode_vcn1 +ffffffff82bb3320 r sc_video_codecs_decode_vcn0 +ffffffff82bb3330 r yc_video_codecs_decode +ffffffff82bb3340 r bg_video_codecs_encode +ffffffff82bb3350 r bg_video_codecs_decode +ffffffff82bb3360 r nv_video_codecs_encode +ffffffff82bb3370 r nv_video_codecs_decode +ffffffff82bb3380 r sc_video_codecs_encode_array +ffffffff82bb33b0 r sc_video_codecs_decode_array_vcn1 +ffffffff82bb3440 r sc_video_codecs_decode_array_vcn0 +ffffffff82bb34e0 r yc_video_codecs_decode_array +ffffffff82bb3550 r bg_video_codecs_decode_array +ffffffff82bb3590 r nv_video_codecs_encode_array +ffffffff82bb35c0 r nv_video_codecs_decode_array +ffffffff82bb4000 r psp_v10_0_funcs +ffffffff82bb5000 r psp_v11_0_funcs +ffffffff82bb6000 r psp_v11_0_8_funcs +ffffffff82bb7000 r psp_v12_0_funcs +ffffffff82bb8000 r psp_v13_0_funcs +ffffffff82bb9000 r psp_v13_0_4_funcs +ffffffff82bba000 r psp_v3_1_funcs +ffffffff82bbb000 r sdma_v2_4_ip_funcs +ffffffff82bbb0a0 R sdma_v2_4_ip_block +ffffffff82bbb0b8 r sdma_v2_4_ring_funcs +ffffffff82bbb1f8 r sdma_v2_4_buffer_funcs +ffffffff82bbb218 r sdma_v2_4_vm_pte_funcs +ffffffff82bbb238 r sdma_v2_4_trap_irq_funcs +ffffffff82bbb248 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82bbb260 r iceland_mgcg_cgcg_init +ffffffff82bbb280 r golden_settings_iceland_a11 +ffffffff82bbc000 r sdma_v3_0_ip_funcs +ffffffff82bbc0a0 R sdma_v3_0_ip_block +ffffffff82bbc0b8 R sdma_v3_1_ip_block +ffffffff82bbc0d0 r sdma_v3_0_ring_funcs +ffffffff82bbc210 r sdma_v3_0_buffer_funcs +ffffffff82bbc230 r sdma_v3_0_vm_pte_funcs +ffffffff82bbc250 r sdma_v3_0_trap_irq_funcs +ffffffff82bbc260 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82bbc270 r fiji_mgcg_cgcg_init +ffffffff82bbc290 r golden_settings_fiji_a10 +ffffffff82bbc2f0 r tonga_mgcg_cgcg_init +ffffffff82bbc310 r golden_settings_tonga_a11 +ffffffff82bbc390 r golden_settings_polaris11_a11 +ffffffff82bbc410 r golden_settings_polaris10_a11 +ffffffff82bbc490 r cz_mgcg_cgcg_init +ffffffff82bbc4b0 r cz_golden_settings_a11 +ffffffff82bbc540 r stoney_mgcg_cgcg_init +ffffffff82bbc550 r stoney_golden_settings_a11 +ffffffff82bbd000 R sdma_v4_0_ip_funcs +ffffffff82bbd0a0 R sdma_v4_0_ras_hw_ops +ffffffff82bbd0e0 R sdma_v4_0_ip_block +ffffffff82bbd0f8 r sdma_v4_0_ring_funcs +ffffffff82bbd238 r sdma_v4_0_page_ring_funcs +ffffffff82bbd378 r sdma_v4_0_buffer_funcs +ffffffff82bbd398 r sdma_v4_0_vm_pte_funcs +ffffffff82bbd3b8 r sdma_v4_0_trap_irq_funcs +ffffffff82bbd3c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82bbd3d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82bbd3e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82bbd3f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82bbd408 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82bbd418 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82bbd430 r golden_settings_sdma_4 +ffffffff82bbd690 r golden_settings_sdma_vg10 +ffffffff82bbd740 r golden_settings_sdma_vg12 +ffffffff82bbd7f0 r golden_settings_sdma0_4_2_init +ffffffff82bbd810 r golden_settings_sdma0_4_2 +ffffffff82bbdaa0 r golden_settings_sdma1_4_2 +ffffffff82bbdd30 r golden_settings_sdma_arct +ffffffff82bbe030 r golden_settings_sdma_aldebaran +ffffffff82bbe1a0 r golden_settings_sdma_4_1 +ffffffff82bbe2b0 r golden_settings_sdma_rv2 +ffffffff82bbe2e0 r golden_settings_sdma_rv1 +ffffffff82bbe310 r golden_settings_sdma_4_3 +ffffffff82bbe400 r sdma_v4_0_ras_fields +ffffffff82bbf000 R sdma_v4_4_ras_hw_ops +ffffffff82bbf040 r sdma_v4_4_ras_fields +ffffffff82bc0000 R sdma_v4_4_2_ip_funcs +ffffffff82bc00a0 R sdma_v4_4_2_ip_block +ffffffff82bc00b8 r sdma_v4_4_2_ring_funcs +ffffffff82bc01f8 r sdma_v4_4_2_page_ring_funcs +ffffffff82bc0338 r sdma_v4_4_2_buffer_funcs +ffffffff82bc0358 r sdma_v4_4_2_vm_pte_funcs +ffffffff82bc0378 r sdma_v4_4_2_trap_irq_funcs +ffffffff82bc0388 r sdma_v4_4_2_illegal_inst_irq_funcs +ffffffff82bc0398 r sdma_v4_4_2_ecc_irq_funcs +ffffffff82bc03a8 r sdma_v4_4_2_vm_hole_irq_funcs +ffffffff82bc03b8 r sdma_v4_4_2_doorbell_invalid_irq_funcs +ffffffff82bc03c8 r sdma_v4_4_2_pool_timeout_irq_funcs +ffffffff82bc03d8 r sdma_v4_4_2_srbm_write_irq_funcs +ffffffff82bc03e8 r sdma_v4_4_2_ras_hw_ops +ffffffff82bc0430 r sdma_v4_2_2_ue_reg_list +ffffffff82bc0460 r sdma_v4_4_2_ras_memory_list +ffffffff82bc1000 R sdma_v5_0_ip_funcs +ffffffff82bc10a0 R sdma_v5_0_ip_block +ffffffff82bc10b8 r sdma_v5_0_ring_funcs +ffffffff82bc11f8 r sdma_v5_0_buffer_funcs +ffffffff82bc1218 r sdma_v5_0_vm_pte_funcs +ffffffff82bc1238 r sdma_v5_0_trap_irq_funcs +ffffffff82bc1248 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82bc1260 r golden_settings_sdma_5 +ffffffff82bc14a0 r golden_settings_sdma_nv10 +ffffffff82bc14d0 r golden_settings_sdma_nv14 +ffffffff82bc1500 r golden_settings_sdma_5_sriov +ffffffff82bc16e0 r golden_settings_sdma_nv12 +ffffffff82bc1770 r golden_settings_sdma_cyan_skillfish +ffffffff82bc2000 R sdma_v5_2_ip_funcs +ffffffff82bc20a0 R sdma_v5_2_ip_block +ffffffff82bc20b8 r sdma_v5_2_ring_funcs +ffffffff82bc21f8 r sdma_v5_2_buffer_funcs +ffffffff82bc2218 r sdma_v5_2_vm_pte_funcs +ffffffff82bc2238 r sdma_v5_2_trap_irq_funcs +ffffffff82bc2248 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82bc3000 R sdma_v6_0_ip_funcs +ffffffff82bc30a0 R sdma_v6_0_ip_block +ffffffff82bc30b8 r sdma_v6_0_ring_funcs +ffffffff82bc31f8 r sdma_v6_0_buffer_funcs +ffffffff82bc3218 r sdma_v6_0_vm_pte_funcs +ffffffff82bc3238 r sdma_v6_0_trap_irq_funcs +ffffffff82bc3248 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82bc4000 r smu_v11_0_i2c_algo +ffffffff82bc4010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82bc4028 r smu_v11_0_i2c_control_quirks +ffffffff82bc5000 R smuio_v11_0_funcs +ffffffff82bc6000 R smuio_v11_0_6_funcs +ffffffff82bc7000 R smuio_v13_0_funcs +ffffffff82bc8000 R smuio_v13_0_3_funcs +ffffffff82bc9000 R smuio_v13_0_6_funcs +ffffffff82bca000 R smuio_v9_0_funcs +ffffffff82bcb000 r soc15_common_ip_funcs +ffffffff82bcb0a0 R vega10_common_ip_block +ffffffff82bcb0b8 r soc15_asic_funcs +ffffffff82bcb178 r vega20_asic_funcs +ffffffff82bcb238 r aqua_vanjaram_asic_funcs +ffffffff82bcb300 r soc15_allowed_read_registers +ffffffff82bcb490 r vega_video_codecs_encode +ffffffff82bcb4a0 r vega_video_codecs_decode +ffffffff82bcb4b0 r rv_video_codecs_decode +ffffffff82bcb4c0 r rn_video_codecs_decode +ffffffff82bcb4d0 r vcn_4_0_3_video_codecs_encode +ffffffff82bcb4e0 r vcn_4_0_3_video_codecs_decode +ffffffff82bcb4f0 r vega_video_codecs_encode_array +ffffffff82bcb520 r vega_video_codecs_decode_array +ffffffff82bcb5a0 r rv_video_codecs_decode_array +ffffffff82bcb630 r rn_video_codecs_decode_array +ffffffff82bcb6c0 r vcn_4_0_3_video_codecs_decode_array +ffffffff82bcc000 r soc21_common_ip_funcs +ffffffff82bcc0a0 R soc21_common_ip_block +ffffffff82bcc0b8 r soc21_asic_funcs +ffffffff82bcc180 r soc21_allowed_read_registers +ffffffff82bcc300 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82bcc310 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82bcc320 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82bcc330 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82bcc340 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82bcc370 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82bcc3c0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82bcc400 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82bcd000 r tonga_ih_ip_funcs +ffffffff82bcd0a0 R tonga_ih_ip_block +ffffffff82bcd0b8 r tonga_ih_funcs +ffffffff82bce000 R umc_v6_0_funcs +ffffffff82bcf000 R umc_v6_1_channel_idx_tbl +ffffffff82bcf080 R umc_v6_1_ras_hw_ops +ffffffff82bd0000 R umc_v6_7_channel_idx_tbl_second +ffffffff82bd0080 R umc_v6_7_channel_idx_tbl_first +ffffffff82bd0100 R umc_v6_7_ras_hw_ops +ffffffff82bd1000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82bd1040 R umc_v8_10_channel_idx_tbl_ext0 +ffffffff82bd1080 R umc_v8_10_channel_idx_tbl +ffffffff82bd10e0 R umc_v8_10_ras_hw_ops +ffffffff82bd2000 R umc_v8_7_channel_idx_tbl +ffffffff82bd2040 R umc_v8_7_ras_hw_ops +ffffffff82bd3000 r uvd_v5_0_ip_funcs +ffffffff82bd30a0 R uvd_v5_0_ip_block +ffffffff82bd30b8 r uvd_v5_0_ring_funcs +ffffffff82bd31f8 r uvd_v5_0_irq_funcs +ffffffff82bd4000 r uvd_v6_0_ip_funcs +ffffffff82bd40a0 R uvd_v6_0_ip_block +ffffffff82bd40b8 R uvd_v6_2_ip_block +ffffffff82bd40d0 R uvd_v6_3_ip_block +ffffffff82bd40e8 r uvd_v6_0_ring_vm_funcs +ffffffff82bd4228 r uvd_v6_0_ring_phys_funcs +ffffffff82bd4368 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82bd44a8 r uvd_v6_0_irq_funcs +ffffffff82bd5000 R uvd_v7_0_ip_funcs +ffffffff82bd50a0 R uvd_v7_0_ip_block +ffffffff82bd50b8 r uvd_v7_0_ring_vm_funcs +ffffffff82bd51f8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82bd5338 r uvd_v7_0_irq_funcs +ffffffff82bd6000 r vce_v3_0_ip_funcs +ffffffff82bd60a0 R vce_v3_0_ip_block +ffffffff82bd60b8 R vce_v3_1_ip_block +ffffffff82bd60d0 R vce_v3_4_ip_block +ffffffff82bd60e8 r vce_v3_0_ring_vm_funcs +ffffffff82bd6228 r vce_v3_0_ring_phys_funcs +ffffffff82bd6368 r vce_v3_0_irq_funcs +ffffffff82bd7000 R vce_v4_0_ip_funcs +ffffffff82bd70a0 R vce_v4_0_ip_block +ffffffff82bd70b8 r vce_v4_0_ring_vm_funcs +ffffffff82bd71f8 r vce_v4_0_irq_funcs +ffffffff82bd8000 r vcn_v1_0_ip_funcs +ffffffff82bd80a0 R vcn_v1_0_ip_block +ffffffff82bd80b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82bd81f8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82bd8338 r vcn_v1_0_irq_funcs +ffffffff82bd9000 r vcn_v2_0_ip_funcs +ffffffff82bd90a0 R vcn_v2_0_ip_block +ffffffff82bd90b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82bd91f8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82bd9338 r vcn_v2_0_irq_funcs +ffffffff82bda000 r vcn_v2_5_ip_funcs +ffffffff82bda0a0 R vcn_v2_5_ip_block +ffffffff82bda0b8 r vcn_v2_6_ip_funcs +ffffffff82bda158 R vcn_v2_6_ip_block +ffffffff82bda170 R vcn_v2_6_ras_hw_ops +ffffffff82bda1b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82bda2f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82bda430 r vcn_v2_5_irq_funcs +ffffffff82bda440 r vcn_v2_6_ras_irq_funcs +ffffffff82bdb000 r vcn_v3_0_ip_funcs +ffffffff82bdb0a0 R vcn_v3_0_ip_block +ffffffff82bdb0b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82bdb1f8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82bdb338 r vcn_v3_0_irq_funcs +ffffffff82bdc000 r vcn_v4_0_ip_funcs +ffffffff82bdc0a0 R vcn_v4_0_ip_block +ffffffff82bdc0b8 R vcn_v4_0_ras_hw_ops +ffffffff82bdc0f8 r vcn_v4_0_irq_funcs +ffffffff82bdc108 r vcn_v4_0_ras_irq_funcs +ffffffff82bdd000 r vcn_v4_0_3_ip_funcs +ffffffff82bdd0a0 R vcn_v4_0_3_ip_block +ffffffff82bdd0b8 r vcn_v4_0_3_unified_ring_vm_funcs +ffffffff82bdd1f8 r vcn_v4_0_3_irq_funcs +ffffffff82bdd208 r vcn_v4_0_3_ras_hw_ops +ffffffff82bdd250 r vcn_v4_0_3_ue_reg_list +ffffffff82bde000 R vega10_ih_ip_funcs +ffffffff82bde0a0 R vega10_ih_ip_block +ffffffff82bde0b8 r vega10_ih_funcs +ffffffff82bde0d8 r vega10_ih_self_irq_funcs +ffffffff82bdf000 r GC_BASE +ffffffff82bdf064 r HDP_BASE +ffffffff82bdf0c8 r MMHUB_BASE +ffffffff82bdf12c r ATHUB_BASE +ffffffff82bdf190 r NBIO_BASE +ffffffff82bdf1f4 r MP0_BASE +ffffffff82bdf258 r MP1_BASE +ffffffff82bdf2bc r VCE_BASE +ffffffff82bdf320 r VCN_BASE +ffffffff82bdf384 r DF_BASE +ffffffff82bdf3e8 r DCE_BASE +ffffffff82bdf44c r OSSSYS_BASE +ffffffff82bdf4b0 r SDMA0_BASE +ffffffff82bdf514 r SDMA1_BASE +ffffffff82bdf578 r SMUIO_BASE +ffffffff82bdf5dc r PWR_BASE +ffffffff82bdf640 r NBIF_BASE +ffffffff82bdf6a4 r THM_BASE +ffffffff82bdf708 r CLK_BASE +ffffffff82be0000 R vega20_ih_ip_funcs +ffffffff82be00a0 R vega20_ih_ip_block +ffffffff82be00b8 r vega20_ih_funcs +ffffffff82be00d8 r vega20_ih_self_irq_funcs +ffffffff82be1000 r GC_BASE +ffffffff82be1090 r HDP_BASE +ffffffff82be1120 r MMHUB_BASE +ffffffff82be11b0 r ATHUB_BASE +ffffffff82be1240 r NBIO_BASE +ffffffff82be12d0 r MP0_BASE +ffffffff82be1360 r MP1_BASE +ffffffff82be13f0 r UVD_BASE +ffffffff82be1480 r VCE_BASE +ffffffff82be1510 r DF_BASE +ffffffff82be15a0 r DCE_BASE +ffffffff82be1630 r OSSSYS_BASE +ffffffff82be16c0 r SDMA0_BASE +ffffffff82be1750 r SDMA1_BASE +ffffffff82be17e0 r SMUIO_BASE +ffffffff82be1870 r THM_BASE +ffffffff82be1900 r CLK_BASE +ffffffff82be1990 r UMC_BASE +ffffffff82be1a20 r RSMU_BASE +ffffffff82be2000 r vi_common_ip_block +ffffffff82be2018 r vi_common_ip_funcs +ffffffff82be20b8 r vi_asic_funcs +ffffffff82be2180 r vi_allowed_read_registers +ffffffff82be23e0 r topaz_video_codecs_encode +ffffffff82be23f0 r topaz_video_codecs_decode +ffffffff82be2400 r tonga_video_codecs_encode +ffffffff82be2410 r tonga_video_codecs_decode +ffffffff82be2420 r polaris_video_codecs_encode +ffffffff82be2430 r cz_video_codecs_decode +ffffffff82be2440 r tonga_video_codecs_encode_array +ffffffff82be2460 r tonga_video_codecs_decode_array +ffffffff82be24b0 r polaris_video_codecs_encode_array +ffffffff82be24e0 r cz_video_codecs_decode_array +ffffffff82be2560 r iceland_mgcg_cgcg_init +ffffffff82be25a0 r fiji_mgcg_cgcg_init +ffffffff82be2600 r tonga_mgcg_cgcg_init +ffffffff82be2660 r cz_mgcg_cgcg_init +ffffffff82be26a0 r stoney_mgcg_cgcg_init +ffffffff82be3000 r amdgpu_dm_funcs +ffffffff82be30a0 R dm_ip_block +ffffffff82be30b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82be3120 r dm_display_funcs +ffffffff82be3180 r hpd_disconnect_quirk_table +ffffffff82be3ef0 r amdgpu_dm_mode_funcs +ffffffff82be3f38 r amdgpu_dm_audio_component_bind_ops +ffffffff82be3f48 r amdgpu_dm_audio_component_ops +ffffffff82be3f80 r amdgpu_dm_encoder_funcs +ffffffff82be3fa0 r amdgpu_dm_connector_funcs +ffffffff82be4018 r amdgpu_dm_connector_helper_funcs +ffffffff82be4078 r amdgpu_dm_i2c_algo +ffffffff82be4088 r amdgpu_dm_backlight_ops +ffffffff82be4260 r add_fs_modes.common_rates +ffffffff82be5000 r amdgpu_dm_crtc_funcs +ffffffff82be50c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82be6000 r dm_dtn_log_begin.msg +ffffffff82be600d r dm_dtn_log_end.msg +ffffffff82be6018 r SYNAPTICS_DEVICE_ID +ffffffff82be7000 r dm_crtc_irq_funcs +ffffffff82be7010 r dm_vline0_irq_funcs +ffffffff82be7020 r dm_dmub_outbox_irq_funcs +ffffffff82be7030 r dm_vupdate_irq_funcs +ffffffff82be7040 r dm_dmub_trace_irq_funcs +ffffffff82be7050 r dm_pageflip_irq_funcs +ffffffff82be7060 r dm_hpd_irq_funcs +ffffffff82be8000 r amdgpu_dm_encoder_funcs +ffffffff82be8020 r dm_mst_cbs +ffffffff82be8030 r dm_dp_mst_connector_funcs +ffffffff82be80a8 r dm_dp_mst_connector_helper_funcs +ffffffff82be9000 r dm_plane_funcs +ffffffff82be9068 r dm_plane_helper_funcs +ffffffff82beb000 r vbios_funcs ffffffff82bec000 r vbios_funcs -ffffffff82bed000 r vbios_funcs +ffffffff82bf1000 r command_table_helper_funcs ffffffff82bf2000 r command_table_helper_funcs ffffffff82bf3000 r command_table_helper_funcs ffffffff82bf4000 r command_table_helper_funcs -ffffffff82bf5000 r command_table_helper_funcs -ffffffff82bf6000 r dce80_max_clks_by_state +ffffffff82bf5000 r dce80_max_clks_by_state +ffffffff82bf5028 r disp_clk_regs +ffffffff82bf507c r disp_clk_shift +ffffffff82bf5088 r disp_clk_mask +ffffffff82bf6000 r dce110_max_clks_by_state ffffffff82bf6028 r disp_clk_regs ffffffff82bf607c r disp_clk_shift ffffffff82bf6088 r disp_clk_mask -ffffffff82bf7000 r dce110_max_clks_by_state +ffffffff82bf7000 r dce112_max_clks_by_state ffffffff82bf7028 r disp_clk_regs ffffffff82bf707c r disp_clk_shift ffffffff82bf7088 r disp_clk_mask -ffffffff82bf8000 r dce112_max_clks_by_state -ffffffff82bf8028 r disp_clk_regs -ffffffff82bf807c r disp_clk_shift -ffffffff82bf8088 r disp_clk_mask -ffffffff82bf9000 r dce120_max_clks_by_state +ffffffff82bf8000 r dce120_max_clks_by_state +ffffffff82bf9000 r clk_mgr_regs +ffffffff82bf9054 r clk_mgr_shift +ffffffff82bf9060 r clk_mgr_mask ffffffff82bfa000 r clk_mgr_regs ffffffff82bfa054 r clk_mgr_shift ffffffff82bfa060 r clk_mgr_mask ffffffff82bfb000 r clk_mgr_regs ffffffff82bfb054 r clk_mgr_shift ffffffff82bfb060 r clk_mgr_mask -ffffffff82bfc000 r clk_mgr_regs -ffffffff82bfc054 r clk_mgr_shift -ffffffff82bfc060 r clk_mgr_mask +ffffffff82bfc000 r lpddr5_wm_table +ffffffff82bfc0c0 r ddr5_wm_table ffffffff82bfd000 r lpddr5_wm_table ffffffff82bfd0c0 r ddr5_wm_table -ffffffff82bfe000 r lpddr5_wm_table -ffffffff82bfe0c0 r ddr5_wm_table -ffffffff82bff000 r ddr5_wm_table -ffffffff82c00000 r lpddr5_wm_table -ffffffff82c000c0 r ddr4_wm_table -ffffffff82c01000 r clk_mgr_regs_dcn321 -ffffffff82c01054 r clk_mgr_shift_dcn321 -ffffffff82c01060 r clk_mgr_mask_dcn321 -ffffffff82c01084 r clk_mgr_regs_dcn32 -ffffffff82c010d8 r clk_mgr_shift_dcn32 -ffffffff82c010e4 r clk_mgr_mask_dcn32 -ffffffff82c02000 r DC_BUILD_ID -ffffffff82c04000 r output_csc_matrix -ffffffff82c040e0 r black_color_format -ffffffff82c07000 r dce_funcs -ffffffff82c08000 r funcs -ffffffff82c09000 R video_optimized_pixel_rates -ffffffff82c091c0 r dce110_clk_src_funcs -ffffffff82c091e8 r dce112_clk_src_funcs -ffffffff82c09210 r dcn20_clk_src_funcs -ffffffff82c09238 r dcn3_clk_src_funcs -ffffffff82c09260 r dcn31_clk_src_funcs -ffffffff82c0a000 r dce_funcs -ffffffff82c0a068 r dcn10_funcs -ffffffff82c0a0d0 r dcn20_funcs -ffffffff82c0a138 r dcn21_funcs -ffffffff82c0b000 r dce_ipp_funcs -ffffffff82c0c000 r dce110_lnk_enc_funcs -ffffffff82c0d000 r dce_mi_funcs -ffffffff82c0d090 r dce112_mi_funcs -ffffffff82c0d120 r dce120_mi_funcs -ffffffff82c0d1b0 r pte_settings -ffffffff82c0e000 r funcs -ffffffff82c0f000 r dce_link_panel_cntl_funcs -ffffffff82c10000 r filter_3tap_16p_upscale -ffffffff82c10040 r filter_3tap_16p_116 -ffffffff82c10080 r filter_3tap_16p_149 -ffffffff82c100c0 r filter_3tap_16p_183 -ffffffff82c10100 r filter_3tap_64p_upscale -ffffffff82c101d0 r filter_3tap_64p_116 -ffffffff82c102a0 r filter_3tap_64p_149 -ffffffff82c10370 r filter_3tap_64p_183 -ffffffff82c10440 r filter_4tap_16p_upscale -ffffffff82c10490 r filter_4tap_16p_116 -ffffffff82c104e0 r filter_4tap_16p_149 -ffffffff82c10530 r filter_4tap_16p_183 -ffffffff82c10580 r filter_4tap_64p_upscale -ffffffff82c10690 r filter_4tap_64p_116 -ffffffff82c107a0 r filter_4tap_64p_149 -ffffffff82c108b0 r filter_4tap_64p_183 -ffffffff82c109c0 r filter_5tap_64p_upscale -ffffffff82c10b10 r filter_5tap_64p_116 -ffffffff82c10c60 r filter_5tap_64p_149 -ffffffff82c10db0 r filter_5tap_64p_183 -ffffffff82c10f00 r filter_6tap_64p_upscale -ffffffff82c11090 r filter_6tap_64p_116 -ffffffff82c11220 r filter_6tap_64p_149 -ffffffff82c113b0 r filter_6tap_64p_183 -ffffffff82c11540 r filter_7tap_64p_upscale -ffffffff82c11710 r filter_7tap_64p_116 -ffffffff82c118e0 r filter_7tap_64p_149 -ffffffff82c11ab0 r filter_7tap_64p_183 -ffffffff82c11c80 r filter_8tap_64p_upscale -ffffffff82c11e90 r filter_8tap_64p_116 -ffffffff82c120a0 r filter_8tap_64p_149 -ffffffff82c122b0 r filter_8tap_64p_183 -ffffffff82c124c0 r filter_2tap_16p -ffffffff82c124f0 r filter_2tap_64p -ffffffff82c13000 r dce110_str_enc_funcs -ffffffff82c13120 r audio_clock_info_table_48bpc -ffffffff82c132b0 r audio_clock_info_table_36bpc -ffffffff82c13440 r audio_clock_info_table -ffffffff82c14000 r global_color_matrix -ffffffff82c140a8 r dce_transform_funcs -ffffffff82c15000 r abm_funcs -ffffffff82c16000 r psr_funcs -ffffffff82c16040 r DP_SINK_DEVICE_STR_ID_1 -ffffffff82c16045 r DP_SINK_DEVICE_STR_ID_2 -ffffffff82c17000 r replay_funcs -ffffffff82c18000 r reg_offsets -ffffffff82c19000 r bios_regs -ffffffff82c19008 r res_cap -ffffffff82c19048 r dce100_res_pool_funcs -ffffffff82c19140 r clk_src_regs -ffffffff82c1923c r dmcu_regs -ffffffff82c19298 r dmcu_shift -ffffffff82c192ac r dmcu_mask -ffffffff82c192f8 r abm_regs -ffffffff82c19360 r abm_shift -ffffffff82c19384 r abm_mask -ffffffff82c19410 r debug_defaults -ffffffff82c195c0 r dce100_tg_offsets -ffffffff82c19608 r plane_cap -ffffffff82c19638 r res_create_funcs -ffffffff82c19670 r panel_cntl_regs -ffffffff82c19690 r panel_cntl_shift -ffffffff82c196a0 r panel_cntl_mask -ffffffff82c196e0 r link_enc_regs -ffffffff82c19aa0 r link_enc_aux_regs -ffffffff82c19af0 r link_enc_hpd_regs -ffffffff82c19b08 r link_enc_feature -ffffffff82c19b18 r cs_shift -ffffffff82c19b24 r cs_mask -ffffffff82c19b50 r mi_regs -ffffffff82c19e68 r mi_shifts -ffffffff82c19eb0 r mi_masks -ffffffff82c19fd0 r ipp_regs -ffffffff82c1a1c8 r ipp_shift -ffffffff82c1a1f0 r ipp_mask -ffffffff82c1a290 r xfm_regs -ffffffff82c1a830 r xfm_shift -ffffffff82c1a890 r xfm_mask -ffffffff82c1aa10 r opp_regs -ffffffff82c1ab60 r opp_shift -ffffffff82c1ab8c r opp_mask -ffffffff82c1ac40 r aux_engine_regs -ffffffff82c1ad30 r aux_mask -ffffffff82c1ad90 r aux_shift -ffffffff82c1adb0 r i2c_hw_regs -ffffffff82c1af00 r i2c_shifts -ffffffff82c1af2c r i2c_masks -ffffffff82c1afd0 r audio_regs -ffffffff82c1b104 r audio_shift -ffffffff82c1b11c r audio_mask -ffffffff82c1b160 r stream_enc_regs -ffffffff82c1b80c r se_shift -ffffffff82c1b890 r se_mask -ffffffff82c1ba94 r hwseq_reg -ffffffff82c1bcb0 r hwseq_shift -ffffffff82c1bd30 r hwseq_mask -ffffffff82c1c000 r reg_offsets -ffffffff82c1c018 r dce110_compressor_funcs -ffffffff82c1d000 r dce110_funcs -ffffffff82c1d2e8 r dce110_private_funcs -ffffffff82c1e000 r dce110_mem_input_v_funcs -ffffffff82c1e090 r dvmm_Hw_Setting_1DTiling -ffffffff82c1e120 r dvmm_Hw_Setting_2DTiling -ffffffff82c1e1b0 r dvmm_Hw_Setting_Linear -ffffffff82c1f000 r global_color_matrix -ffffffff82c1f0b0 r input_csc_matrix -ffffffff82c20000 r funcs -ffffffff82c21000 r bios_regs -ffffffff82c21008 r dce110_res_pool_funcs -ffffffff82c21100 r debug_defaults -ffffffff82c212b0 r clk_src_regs -ffffffff82c213ac r dmcu_regs -ffffffff82c21408 r dmcu_shift -ffffffff82c2141c r dmcu_mask -ffffffff82c21468 r abm_regs -ffffffff82c214d0 r abm_shift -ffffffff82c214f4 r abm_mask -ffffffff82c21580 r dce110_tg_offsets -ffffffff82c215c8 r res_create_funcs -ffffffff82c215f8 r plane_cap -ffffffff82c21624 r underlay_plane_cap -ffffffff82c21650 r stoney_resource_cap -ffffffff82c2168c r carrizo_resource_cap -ffffffff82c216d0 r panel_cntl_regs -ffffffff82c216f0 r panel_cntl_shift -ffffffff82c21700 r panel_cntl_mask -ffffffff82c21740 r link_enc_regs -ffffffff82c21b00 r link_enc_aux_regs -ffffffff82c21b50 r link_enc_hpd_regs -ffffffff82c21b68 r link_enc_feature -ffffffff82c21b78 r cs_shift -ffffffff82c21b84 r cs_mask -ffffffff82c21bb0 r mi_regs -ffffffff82c21d3c r mi_shifts -ffffffff82c21d84 r mi_masks -ffffffff82c21ea0 r ipp_regs -ffffffff82c21f9c r ipp_shift -ffffffff82c21fc4 r ipp_mask -ffffffff82c22060 r xfm_regs -ffffffff82c22330 r xfm_shift -ffffffff82c22390 r xfm_mask -ffffffff82c22510 r opp_regs -ffffffff82c22660 r opp_shift -ffffffff82c2268c r opp_mask -ffffffff82c22740 r aux_engine_regs -ffffffff82c22830 r aux_mask -ffffffff82c22890 r aux_shift -ffffffff82c228b0 r i2c_hw_regs -ffffffff82c22a00 r i2c_shifts -ffffffff82c22a2c r i2c_masks -ffffffff82c22ad0 r audio_regs -ffffffff82c22c04 r audio_shift -ffffffff82c22c1c r audio_mask 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dcn20_clk_src_funcs +ffffffff82c08238 r dcn3_clk_src_funcs +ffffffff82c08260 r dcn31_clk_src_funcs +ffffffff82c09000 r dce_funcs +ffffffff82c09068 r dcn10_funcs +ffffffff82c090d0 r dcn20_funcs +ffffffff82c09138 r dcn21_funcs +ffffffff82c0a000 r dce_ipp_funcs +ffffffff82c0b000 r dce110_lnk_enc_funcs +ffffffff82c0c000 r dce_mi_funcs +ffffffff82c0c090 r dce112_mi_funcs +ffffffff82c0c120 r dce120_mi_funcs +ffffffff82c0c1b0 r pte_settings +ffffffff82c0d000 r funcs +ffffffff82c0e000 r dce_link_panel_cntl_funcs +ffffffff82c0f000 r filter_3tap_16p_upscale +ffffffff82c0f040 r filter_3tap_16p_116 +ffffffff82c0f080 r filter_3tap_16p_149 +ffffffff82c0f0c0 r filter_3tap_16p_183 +ffffffff82c0f100 r filter_3tap_64p_upscale +ffffffff82c0f1d0 r filter_3tap_64p_116 +ffffffff82c0f2a0 r filter_3tap_64p_149 +ffffffff82c0f370 r filter_3tap_64p_183 +ffffffff82c0f440 r filter_4tap_16p_upscale +ffffffff82c0f490 r filter_4tap_16p_116 +ffffffff82c0f4e0 r filter_4tap_16p_149 +ffffffff82c0f530 r filter_4tap_16p_183 +ffffffff82c0f580 r filter_4tap_64p_upscale +ffffffff82c0f690 r filter_4tap_64p_116 +ffffffff82c0f7a0 r filter_4tap_64p_149 +ffffffff82c0f8b0 r filter_4tap_64p_183 +ffffffff82c0f9c0 r filter_5tap_64p_upscale +ffffffff82c0fb10 r filter_5tap_64p_116 +ffffffff82c0fc60 r filter_5tap_64p_149 +ffffffff82c0fdb0 r filter_5tap_64p_183 +ffffffff82c0ff00 r filter_6tap_64p_upscale +ffffffff82c10090 r filter_6tap_64p_116 +ffffffff82c10220 r filter_6tap_64p_149 +ffffffff82c103b0 r filter_6tap_64p_183 +ffffffff82c10540 r filter_7tap_64p_upscale +ffffffff82c10710 r filter_7tap_64p_116 +ffffffff82c108e0 r filter_7tap_64p_149 +ffffffff82c10ab0 r filter_7tap_64p_183 +ffffffff82c10c80 r filter_8tap_64p_upscale +ffffffff82c10e90 r filter_8tap_64p_116 +ffffffff82c110a0 r filter_8tap_64p_149 +ffffffff82c112b0 r filter_8tap_64p_183 +ffffffff82c114c0 r filter_2tap_16p +ffffffff82c114f0 r filter_2tap_64p +ffffffff82c12000 r dce110_str_enc_funcs +ffffffff82c12120 r audio_clock_info_table_48bpc +ffffffff82c122b0 r audio_clock_info_table_36bpc +ffffffff82c12440 r audio_clock_info_table +ffffffff82c13000 r global_color_matrix +ffffffff82c130a8 r dce_transform_funcs +ffffffff82c14000 r abm_funcs +ffffffff82c15000 r psr_funcs +ffffffff82c15040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82c15045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82c16000 r replay_funcs +ffffffff82c17000 r reg_offsets +ffffffff82c18000 r bios_regs +ffffffff82c18008 r res_cap +ffffffff82c18048 r dce100_res_pool_funcs +ffffffff82c18140 r clk_src_regs +ffffffff82c1823c r dmcu_regs +ffffffff82c18298 r dmcu_shift +ffffffff82c182ac r dmcu_mask +ffffffff82c182f8 r abm_regs +ffffffff82c18360 r abm_shift +ffffffff82c18384 r abm_mask +ffffffff82c18410 r debug_defaults +ffffffff82c185c0 r dce100_tg_offsets +ffffffff82c18608 r plane_cap +ffffffff82c18638 r res_create_funcs +ffffffff82c18670 r panel_cntl_regs +ffffffff82c18690 r panel_cntl_shift +ffffffff82c186a0 r panel_cntl_mask +ffffffff82c186e0 r link_enc_regs +ffffffff82c18aa0 r link_enc_aux_regs +ffffffff82c18af0 r link_enc_hpd_regs +ffffffff82c18b08 r link_enc_feature +ffffffff82c18b18 r cs_shift +ffffffff82c18b24 r cs_mask +ffffffff82c18b50 r mi_regs +ffffffff82c18e68 r mi_shifts +ffffffff82c18eb0 r mi_masks +ffffffff82c18fd0 r ipp_regs +ffffffff82c191c8 r ipp_shift +ffffffff82c191f0 r ipp_mask +ffffffff82c19290 r xfm_regs +ffffffff82c19830 r xfm_shift +ffffffff82c19890 r xfm_mask +ffffffff82c19a10 r opp_regs +ffffffff82c19b60 r opp_shift +ffffffff82c19b8c r opp_mask +ffffffff82c19c40 r aux_engine_regs +ffffffff82c19d30 r aux_mask +ffffffff82c19d90 r aux_shift +ffffffff82c19db0 r i2c_hw_regs +ffffffff82c19f00 r i2c_shifts +ffffffff82c19f2c r i2c_masks +ffffffff82c19fd0 r audio_regs +ffffffff82c1a104 r audio_shift +ffffffff82c1a11c r audio_mask +ffffffff82c1a160 r stream_enc_regs +ffffffff82c1a80c r se_shift +ffffffff82c1a890 r se_mask +ffffffff82c1aa94 r hwseq_reg +ffffffff82c1acb0 r hwseq_shift +ffffffff82c1ad30 r hwseq_mask +ffffffff82c1b000 r reg_offsets +ffffffff82c1b018 r dce110_compressor_funcs +ffffffff82c1c000 r dce110_funcs +ffffffff82c1c2e8 r dce110_private_funcs +ffffffff82c1d000 r dce110_mem_input_v_funcs +ffffffff82c1d090 r dvmm_Hw_Setting_1DTiling +ffffffff82c1d120 r dvmm_Hw_Setting_2DTiling +ffffffff82c1d1b0 r dvmm_Hw_Setting_Linear +ffffffff82c1e000 r global_color_matrix +ffffffff82c1e0b0 r input_csc_matrix +ffffffff82c1f000 r funcs +ffffffff82c20000 r bios_regs +ffffffff82c20008 r dce110_res_pool_funcs +ffffffff82c20100 r debug_defaults +ffffffff82c202b0 r clk_src_regs +ffffffff82c203ac r dmcu_regs +ffffffff82c20408 r dmcu_shift +ffffffff82c2041c r dmcu_mask +ffffffff82c20468 r abm_regs +ffffffff82c204d0 r abm_shift +ffffffff82c204f4 r abm_mask +ffffffff82c20580 r dce110_tg_offsets +ffffffff82c205c8 r res_create_funcs +ffffffff82c205f8 r plane_cap +ffffffff82c20624 r underlay_plane_cap +ffffffff82c20650 r stoney_resource_cap +ffffffff82c2068c r carrizo_resource_cap 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r se_shift +ffffffff82c21fc0 r se_mask +ffffffff82c221c4 r hwseq_stoney_reg +ffffffff82c223e0 r hwseq_cz_reg +ffffffff82c225fc r hwseq_shift +ffffffff82c2267c r hwseq_mask +ffffffff82c23000 r dce110_tg_funcs +ffffffff82c24000 r dce110_tg_v_funcs +ffffffff82c25000 r dce110_xfmv_funcs +ffffffff82c26000 r reg_offsets ffffffff82c27000 r reg_offsets -ffffffff82c28000 r reg_offsets -ffffffff82c29000 r bios_regs -ffffffff82c29008 r dce112_res_pool_funcs -ffffffff82c29100 r debug_defaults -ffffffff82c292b0 r clk_src_regs -ffffffff82c294a8 r dmcu_regs -ffffffff82c29504 r dmcu_shift -ffffffff82c29518 r dmcu_mask -ffffffff82c29564 r abm_regs -ffffffff82c295cc r abm_shift -ffffffff82c295f0 r abm_mask -ffffffff82c29680 r dce112_tg_offsets -ffffffff82c296c8 r res_create_funcs -ffffffff82c296f8 r plane_cap -ffffffff82c29724 r polaris_11_resource_cap -ffffffff82c29760 r polaris_10_resource_cap -ffffffff82c297a0 r panel_cntl_regs -ffffffff82c297c0 r panel_cntl_shift -ffffffff82c297d0 r panel_cntl_mask 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r aux_mask -ffffffff82c32d90 r aux_shift -ffffffff82c32db0 r i2c_hw_regs -ffffffff82c32f00 r i2c_shifts -ffffffff82c32f2c r i2c_masks -ffffffff82c32fd0 r audio_regs -ffffffff82c33104 r audio_shift -ffffffff82c3311c r audio_mask -ffffffff82c33160 r stream_enc_regs -ffffffff82c3380c r se_shift -ffffffff82c33890 r se_mask -ffffffff82c33a94 r hwseq_reg -ffffffff82c33cb0 r hwseq_shift -ffffffff82c33d30 r hwseq_mask -ffffffff82c33f24 r res_cap_81 -ffffffff82c33f60 r res_cap_83 -ffffffff82c34000 r reg_offsets -ffffffff82c34048 r dce80_tg_funcs -ffffffff82c35000 r dcn10_dpp_funcs -ffffffff82c36000 r dpp_input_csc_matrix -ffffffff82c38000 R dcn10_dwbc_funcs -ffffffff82c39000 r hubbub1_funcs -ffffffff82c3a000 r dcn10_hubp_funcs -ffffffff82c3b000 r reduceSizeAndFraction.prime_numbers -ffffffff82c3d000 r dcn10_funcs -ffffffff82c3d2e8 r dcn10_private_funcs -ffffffff82c3e000 r dcn10_ipp_funcs -ffffffff82c3e048 r dcn20_ipp_funcs -ffffffff82c3f000 r dcn10_lnk_enc_funcs -ffffffff82c40000 r dcn10_mpc_funcs -ffffffff82c41000 r dcn10_opp_funcs -ffffffff82c42000 r dcn10_tg_funcs -ffffffff82c43000 r bios_regs -ffffffff82c43008 r rv2_res_cap -ffffffff82c43044 r res_cap -ffffffff82c43080 r dcn10_res_pool_funcs -ffffffff82c43178 r debug_defaults_drv -ffffffff82c43320 r debug_defaults_diags -ffffffff82c434d0 r clk_src_regs -ffffffff82c43620 r dmcu_regs -ffffffff82c4367c r dmcu_shift -ffffffff82c43690 r dmcu_mask -ffffffff82c436dc r abm_regs -ffffffff82c43744 r abm_shift -ffffffff82c43768 r abm_mask -ffffffff82c437f8 r res_create_funcs -ffffffff82c43828 r plane_cap -ffffffff82c43860 r panel_cntl_regs -ffffffff82c43880 r panel_cntl_shift -ffffffff82c43890 r panel_cntl_mask -ffffffff82c438d0 r link_enc_regs -ffffffff82c43de0 r link_enc_aux_regs -ffffffff82c43e20 r link_enc_hpd_regs -ffffffff82c43e30 r le_shift -ffffffff82c43f20 r le_mask -ffffffff82c442d8 r link_enc_feature -ffffffff82c442e8 r cs_shift -ffffffff82c442f4 r cs_mask -ffffffff82c44320 r hubp_regs -ffffffff82c449d0 r hubp_shift -ffffffff82c44a94 r hubp_mask -ffffffff82c44da0 r ipp_regs -ffffffff82c44e80 r ipp_shift -ffffffff82c44e9c r ipp_mask -ffffffff82c44f10 r tf_regs -ffffffff82c45e80 r tf_shift -ffffffff82c460e8 r tf_mask -ffffffff82c46a80 r opp_regs -ffffffff82c46b50 r opp_shift -ffffffff82c46b70 r opp_mask -ffffffff82c46bf0 r tg_regs -ffffffff82c47190 r tg_shift -ffffffff82c47264 r tg_mask -ffffffff82c475b0 r aux_engine_regs -ffffffff82c476a0 r aux_mask -ffffffff82c47700 r aux_shift -ffffffff82c47720 r i2c_hw_regs -ffffffff82c47870 r i2c_shifts -ffffffff82c4789c r i2c_masks -ffffffff82c47940 r mpc_regs -ffffffff82c47a60 r mpc_shift -ffffffff82c47a78 r mpc_mask -ffffffff82c47ad4 r hubbub_reg -ffffffff82c47c5c r hubbub_shift -ffffffff82c47cec r hubbub_mask -ffffffff82c47f30 r audio_regs -ffffffff82c47fe0 r audio_shift -ffffffff82c47ff8 r audio_mask -ffffffff82c48040 r stream_enc_regs -ffffffff82c48590 r se_shift -ffffffff82c4866c r se_mask -ffffffff82c489d8 r hwseq_reg -ffffffff82c48bf4 r hwseq_shift -ffffffff82c48c74 r hwseq_mask -ffffffff82c49000 r audio_clock_info_table_48bpc -ffffffff82c49190 r audio_clock_info_table_36bpc -ffffffff82c49320 r audio_clock_info_table -ffffffff82c494e0 r dcn10_str_enc_funcs -ffffffff82c4a000 r dccg2_funcs -ffffffff82c4c000 r dpp_input_csc_matrix -ffffffff82c4d000 r dcn20_dsc_funcs -ffffffff82c4e000 r dcn20_dwbc_funcs -ffffffff82c4f000 r filter_12tap_16p_upscale -ffffffff82c4f0e0 r filter_12tap_16p_117 -ffffffff82c4f1c0 r filter_12tap_16p_150 -ffffffff82c4f2a0 r filter_12tap_16p_183 -ffffffff82c4f380 r filter_11tap_16p_upscale -ffffffff82c4f450 r filter_11tap_16p_117 -ffffffff82c4f520 r filter_11tap_16p_150 -ffffffff82c4f5f0 r filter_11tap_16p_183 -ffffffff82c4f6c0 r filter_10tap_16p_upscale -ffffffff82c4f780 r filter_10tap_16p_117 -ffffffff82c4f840 r filter_10tap_16p_150 -ffffffff82c4f900 r filter_10tap_16p_183 -ffffffff82c4f9c0 r filter_9tap_16p_upscale -ffffffff82c4fa70 r filter_9tap_16p_117 -ffffffff82c4fb20 r filter_9tap_16p_150 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mpc_mask -ffffffff82cd6550 r dsc_regs -ffffffff82cd679c r dsc_shift -ffffffff82cd6854 r dsc_mask -ffffffff82cd6b30 r dwbc30_regs -ffffffff82cd6d0c r dwbc30_shift -ffffffff82cd6e40 r dwbc30_mask -ffffffff82cd7310 r mcif_wb30_regs -ffffffff82cd740c r mcif_wb30_shift -ffffffff82cd74b8 r mcif_wb30_mask -ffffffff82cd7770 r aux_engine_regs -ffffffff82cd7838 r aux_mask -ffffffff82cd7898 r aux_shift -ffffffff82cd78b0 r i2c_hw_regs -ffffffff82cd79c8 r i2c_shifts -ffffffff82cd79f4 r i2c_masks -ffffffff82cd7aa0 r audio_regs -ffffffff82cd7bd4 r audio_shift -ffffffff82cd7bec r audio_mask -ffffffff82cd7c30 r stream_enc_regs -ffffffff82cd82d4 r se_shift -ffffffff82cd83b0 r se_mask -ffffffff82cd8720 r vpg_regs -ffffffff82cd8810 r vpg_shift -ffffffff82cd8838 r vpg_mask -ffffffff82cd88e0 r afmt_regs -ffffffff82cd89b8 r afmt_shift -ffffffff82cd89cc r afmt_mask -ffffffff82cd8a20 r hpo_dp_stream_enc_regs -ffffffff82cd8c50 r hpo_dp_se_shift -ffffffff82cd8c78 r hpo_dp_se_mask -ffffffff82cd8d20 r apg_regs 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hubbub_shift -ffffffff82cdb874 r hubbub_mask -ffffffff82cdbab0 r vmid_regs -ffffffff82cdbc70 r vmid_shifts -ffffffff82cdbc78 r vmid_masks -ffffffff82cdbca0 r hubp_regs -ffffffff82cdc4d0 r hubp_shift -ffffffff82cdc5cc r hubp_mask -ffffffff82cdc9c0 r dpp_regs -ffffffff82cdded0 r tf_shift -ffffffff82cde1a4 r tf_mask -ffffffff82cdecf0 r opp_regs -ffffffff82cdee50 r opp_shift -ffffffff82cdee88 r opp_mask -ffffffff82cdef60 r optc_regs -ffffffff82cdf500 r optc_shift -ffffffff82cdf5d4 r optc_mask -ffffffff82cdf91c r mpc_regs -ffffffff82ce1108 r mpc_shift -ffffffff82ce11e4 r mpc_mask -ffffffff82ce1550 r dsc_regs -ffffffff82ce179c r dsc_shift -ffffffff82ce1854 r dsc_mask -ffffffff82ce1b30 r dwbc30_regs -ffffffff82ce1d0c r dwbc30_shift -ffffffff82ce1e40 r dwbc30_mask -ffffffff82ce2310 r mcif_wb30_regs -ffffffff82ce240c r mcif_wb30_shift -ffffffff82ce24b8 r mcif_wb30_mask -ffffffff82ce2770 r aux_engine_regs -ffffffff82ce2838 r aux_mask -ffffffff82ce2898 r aux_shift -ffffffff82ce28b0 r i2c_hw_regs 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r dcn32_funcs -ffffffff82ce92e8 r dcn32_private_funcs -ffffffff82cea000 r dcn32_mmhubbub_funcs -ffffffff82ceb000 r dcn32_mpc_funcs -ffffffff82cec000 r res_cap_dcn32 -ffffffff82cec03c r dccg_shift -ffffffff82cec0dc r dccg_mask -ffffffff82cec350 r abm_shift -ffffffff82cec374 r abm_mask -ffffffff82cec400 r res_create_funcs -ffffffff82cec430 r plane_cap -ffffffff82cec45c r le_shift -ffffffff82cec54c r le_mask -ffffffff82cec904 r link_enc_feature -ffffffff82cec918 r debug_defaults_drv -ffffffff82cecac0 r cs_shift -ffffffff82cecacc r cs_mask -ffffffff82cecaf4 r hubbub_shift -ffffffff82cecb84 r hubbub_mask -ffffffff82cecdbc r vmid_shifts -ffffffff82cecdc4 r vmid_masks -ffffffff82cecde4 r hubp_shift -ffffffff82cecee0 r hubp_mask -ffffffff82ced2d0 r tf_shift -ffffffff82ced5a4 r tf_mask -ffffffff82cee0e8 r opp_shift -ffffffff82cee120 r opp_mask -ffffffff82cee1f4 r optc_shift -ffffffff82cee2c8 r optc_mask -ffffffff82cee610 r mpc_shift -ffffffff82cee6ec r mpc_mask -ffffffff82ceea58 r dsc_shift -ffffffff82ceeb10 r dsc_mask -ffffffff82ceede8 r dwbc30_shift -ffffffff82ceef1c r dwbc30_mask -ffffffff82cef3e4 r mcif_wb30_shift -ffffffff82cef490 r mcif_wb30_mask -ffffffff82cef73c r aux_mask -ffffffff82cef79c r aux_shift -ffffffff82cef7b4 r i2c_shifts -ffffffff82cef7e0 r i2c_masks -ffffffff82cef884 r audio_shift -ffffffff82cef89c r audio_mask -ffffffff82cef8d8 r se_shift -ffffffff82cef9b4 r se_mask -ffffffff82cefd20 r vpg_shift -ffffffff82cefd48 r vpg_mask -ffffffff82cefddc r afmt_shift -ffffffff82cefdf0 r afmt_mask -ffffffff82cefe34 r hpo_dp_se_shift -ffffffff82cefe5c r hpo_dp_se_mask -ffffffff82cefefc r apg_shift -ffffffff82ceff04 r apg_mask -ffffffff82ceff1c r hpo_dp_le_shift -ffffffff82ceff38 r hpo_dp_le_mask -ffffffff82ceff9c r hwseq_shift -ffffffff82cf001c r hwseq_mask -ffffffff82cf1000 r dcn321_link_enc_funcs -ffffffff82cf2000 r res_cap_dcn321 -ffffffff82cf203c r dccg_shift -ffffffff82cf20dc r dccg_mask -ffffffff82cf2350 r abm_shift -ffffffff82cf2374 r abm_mask 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-ffffffff82cf5884 r audio_shift -ffffffff82cf589c r audio_mask -ffffffff82cf58d8 r se_shift -ffffffff82cf59b4 r se_mask -ffffffff82cf5d20 r vpg_shift -ffffffff82cf5d48 r vpg_mask -ffffffff82cf5ddc r afmt_shift -ffffffff82cf5df0 r afmt_mask -ffffffff82cf5e34 r hpo_dp_se_shift -ffffffff82cf5e5c r hpo_dp_se_mask -ffffffff82cf5efc r apg_shift -ffffffff82cf5f04 r apg_mask -ffffffff82cf5f1c r hpo_dp_le_shift -ffffffff82cf5f38 r hpo_dp_le_mask -ffffffff82cf5f9c r hwseq_shift -ffffffff82cf601c r hwseq_mask -ffffffff82cf8000 R dcn10_soc_defaults -ffffffff82cf808c R dcn10_ip_defaults -ffffffff82d04000 r dml20_funcs -ffffffff82d04030 r dml20v2_funcs -ffffffff82d04060 r dml21_funcs -ffffffff82d04090 r dml30_funcs -ffffffff82d040c0 r dml31_funcs -ffffffff82d040f0 r dml314_funcs -ffffffff82d04120 r dml32_funcs -ffffffff82d07000 r qp_table_444_8bpc_max -ffffffff82d07940 r qp_table_444_8bpc_min -ffffffff82d08280 r qp_table_444_10bpc_max -ffffffff82d08ec0 r qp_table_444_10bpc_min -ffffffff82d09b00 r qp_table_444_12bpc_max -ffffffff82d0aa40 r qp_table_444_12bpc_min -ffffffff82d0b980 r qp_table_422_8bpc_max -ffffffff82d0bec0 r qp_table_422_8bpc_min -ffffffff82d0c400 r qp_table_422_10bpc_max -ffffffff82d0cb40 r qp_table_422_10bpc_min -ffffffff82d0d280 r qp_table_422_12bpc_max -ffffffff82d0dbc0 r qp_table_422_12bpc_min -ffffffff82d0e500 r qp_table_420_8bpc_max -ffffffff82d0e940 r qp_table_420_8bpc_min -ffffffff82d0ed80 r qp_table_420_10bpc_max -ffffffff82d0f340 r qp_table_420_10bpc_min -ffffffff82d0f900 r qp_table_420_12bpc_max -ffffffff82d10040 r qp_table_420_12bpc_min +ffffffff82c28000 r bios_regs +ffffffff82c28008 r dce112_res_pool_funcs +ffffffff82c28100 r debug_defaults +ffffffff82c282b0 r clk_src_regs +ffffffff82c284a8 r dmcu_regs +ffffffff82c28504 r dmcu_shift +ffffffff82c28518 r dmcu_mask +ffffffff82c28564 r abm_regs +ffffffff82c285cc r abm_shift +ffffffff82c285f0 r abm_mask +ffffffff82c28680 r dce112_tg_offsets +ffffffff82c286c8 r res_create_funcs +ffffffff82c286f8 r plane_cap +ffffffff82c28724 r polaris_11_resource_cap +ffffffff82c28760 r polaris_10_resource_cap +ffffffff82c287a0 r panel_cntl_regs +ffffffff82c287c0 r panel_cntl_shift +ffffffff82c287d0 r panel_cntl_mask +ffffffff82c28810 r link_enc_regs +ffffffff82c28bd0 r link_enc_aux_regs +ffffffff82c28c20 r link_enc_hpd_regs +ffffffff82c28c38 r link_enc_feature +ffffffff82c28c48 r cs_shift +ffffffff82c28c54 r cs_mask +ffffffff82c28c80 r mi_regs +ffffffff82c28f98 r mi_shifts +ffffffff82c28fe0 r mi_masks +ffffffff82c29100 r ipp_regs +ffffffff82c292f8 r ipp_shift +ffffffff82c29320 r ipp_mask +ffffffff82c293c0 r xfm_regs +ffffffff82c29960 r xfm_shift +ffffffff82c299c0 r xfm_mask +ffffffff82c29b40 r opp_regs +ffffffff82c29c90 r opp_shift +ffffffff82c29cbc r opp_mask +ffffffff82c29d70 r aux_engine_regs +ffffffff82c29e60 r aux_mask +ffffffff82c29ec0 r aux_shift +ffffffff82c29ee0 r i2c_hw_regs +ffffffff82c2a030 r i2c_shifts +ffffffff82c2a05c r i2c_masks +ffffffff82c2a100 r audio_regs +ffffffff82c2a208 r audio_shift +ffffffff82c2a220 r audio_mask +ffffffff82c2a260 r stream_enc_regs +ffffffff82c2a818 r se_shift +ffffffff82c2a89c r se_mask +ffffffff82c2aaa0 r hwseq_reg +ffffffff82c2acbc r hwseq_shift +ffffffff82c2ad3c r hwseq_mask +ffffffff82c2b000 r bios_regs +ffffffff82c2b008 r res_cap +ffffffff82c2b048 r dce120_res_pool_funcs +ffffffff82c2b140 r debug_defaults +ffffffff82c2b2f0 r clk_src_regs +ffffffff82c2b4e8 r dmcu_regs +ffffffff82c2b544 r dmcu_shift +ffffffff82c2b558 r dmcu_mask +ffffffff82c2b5a4 r abm_regs +ffffffff82c2b60c r abm_shift +ffffffff82c2b630 r abm_mask +ffffffff82c2b6c0 r dce120_tg_offsets +ffffffff82c2b708 r dce121_res_create_funcs +ffffffff82c2b738 r res_create_funcs +ffffffff82c2b768 r plane_cap +ffffffff82c2b7a0 r panel_cntl_regs +ffffffff82c2b7c0 r panel_cntl_shift +ffffffff82c2b7d0 r panel_cntl_mask +ffffffff82c2b810 r link_enc_regs +ffffffff82c2bbd0 r link_enc_aux_regs +ffffffff82c2bc20 r link_enc_hpd_regs +ffffffff82c2bc38 r link_enc_feature +ffffffff82c2bc48 r cs_shift +ffffffff82c2bc54 r cs_mask +ffffffff82c2bc80 r mi_regs +ffffffff82c2bf98 r mi_shifts +ffffffff82c2bfe0 r mi_masks +ffffffff82c2c100 r ipp_regs +ffffffff82c2c2f8 r ipp_shift +ffffffff82c2c320 r ipp_mask +ffffffff82c2c3c0 r xfm_regs +ffffffff82c2c960 r xfm_shift +ffffffff82c2c9c0 r xfm_mask +ffffffff82c2cb40 r opp_regs +ffffffff82c2cc90 r opp_shift +ffffffff82c2ccbc r opp_mask +ffffffff82c2cd70 r aux_engine_regs +ffffffff82c2ce60 r aux_mask +ffffffff82c2cec0 r aux_shift +ffffffff82c2cee0 r i2c_hw_regs +ffffffff82c2d030 r i2c_shifts +ffffffff82c2d05c r i2c_masks +ffffffff82c2d100 r audio_regs +ffffffff82c2d234 r audio_shift +ffffffff82c2d24c r audio_mask +ffffffff82c2d290 r stream_enc_regs +ffffffff82c2d848 r se_shift +ffffffff82c2d8cc r se_mask +ffffffff82c2dad0 r dce121_hwseq_reg +ffffffff82c2dcec r dce121_hwseq_shift +ffffffff82c2dd6c r dce121_hwseq_mask +ffffffff82c2df60 r hwseq_reg +ffffffff82c2e17c r hwseq_shift +ffffffff82c2e1fc r hwseq_mask +ffffffff82c2f000 r dce120_tg_funcs +ffffffff82c30000 r bios_regs +ffffffff82c30008 r res_cap +ffffffff82c30048 r dce80_res_pool_funcs +ffffffff82c30140 r debug_defaults +ffffffff82c302f0 r clk_src_regs +ffffffff82c303ec r dmcu_regs +ffffffff82c30448 r dmcu_shift +ffffffff82c3045c r dmcu_mask +ffffffff82c304a8 r abm_regs +ffffffff82c30510 r abm_shift +ffffffff82c30534 r abm_mask +ffffffff82c305c0 r dce80_tg_offsets +ffffffff82c30608 r plane_cap +ffffffff82c30638 r res_create_funcs +ffffffff82c30670 r panel_cntl_regs +ffffffff82c30690 r panel_cntl_shift +ffffffff82c306a0 r panel_cntl_mask +ffffffff82c306e0 r link_enc_regs +ffffffff82c30aa0 r link_enc_aux_regs +ffffffff82c30af0 r link_enc_hpd_regs +ffffffff82c30b08 r link_enc_feature +ffffffff82c30b18 r cs_shift +ffffffff82c30b24 r cs_mask +ffffffff82c30b50 r mi_regs +ffffffff82c30e68 r mi_shifts +ffffffff82c30eb0 r mi_masks +ffffffff82c30fd0 r ipp_regs +ffffffff82c311c8 r ipp_shift +ffffffff82c311f0 r ipp_mask +ffffffff82c31290 r xfm_regs +ffffffff82c31830 r xfm_shift +ffffffff82c31890 r xfm_mask +ffffffff82c31a10 r opp_regs +ffffffff82c31b60 r opp_shift +ffffffff82c31b8c r opp_mask +ffffffff82c31c40 r aux_engine_regs +ffffffff82c31d30 r aux_mask +ffffffff82c31d90 r aux_shift +ffffffff82c31db0 r i2c_hw_regs +ffffffff82c31f00 r i2c_shifts +ffffffff82c31f2c r i2c_masks +ffffffff82c31fd0 r audio_regs +ffffffff82c32104 r audio_shift +ffffffff82c3211c r audio_mask +ffffffff82c32160 r stream_enc_regs +ffffffff82c3280c r se_shift +ffffffff82c32890 r se_mask +ffffffff82c32a94 r hwseq_reg +ffffffff82c32cb0 r hwseq_shift +ffffffff82c32d30 r hwseq_mask +ffffffff82c32f24 r res_cap_81 +ffffffff82c32f60 r res_cap_83 +ffffffff82c33000 r reg_offsets +ffffffff82c33048 r dce80_tg_funcs +ffffffff82c34000 r dcn10_dpp_funcs +ffffffff82c35000 r dpp_input_csc_matrix +ffffffff82c37000 R dcn10_dwbc_funcs +ffffffff82c38000 r hubbub1_funcs +ffffffff82c39000 r dcn10_hubp_funcs +ffffffff82c3a000 r reduceSizeAndFraction.prime_numbers +ffffffff82c3c000 r dcn10_funcs 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res_create_funcs +ffffffff82c80c40 r plane_cap +ffffffff82c80c70 r panel_cntl_regs +ffffffff82c80c90 r panel_cntl_shift +ffffffff82c80ca0 r panel_cntl_mask +ffffffff82c80ce0 r link_enc_regs +ffffffff82c81480 r link_enc_aux_regs +ffffffff82c814e0 r link_enc_hpd_regs +ffffffff82c814f8 r le_shift +ffffffff82c815e8 r le_mask +ffffffff82c819a0 r link_enc_feature +ffffffff82c819b0 r cs_shift +ffffffff82c819bc r cs_mask +ffffffff82c819e4 r hubbub_reg +ffffffff82c81b6c r hubbub_shift +ffffffff82c81bfc r hubbub_mask +ffffffff82c81e40 r vmid_regs +ffffffff82c82000 r vmid_shifts +ffffffff82c82008 r vmid_masks +ffffffff82c82030 r hubp_regs +ffffffff82c82c78 r hubp_shift +ffffffff82c82d74 r hubp_mask +ffffffff82c83170 r dpp_regs +ffffffff82c85108 r tf_shift +ffffffff82c853dc r tf_mask +ffffffff82c85f20 r opp_regs +ffffffff82c86130 r opp_shift +ffffffff82c86168 r opp_mask +ffffffff82c86240 r optc_regs +ffffffff82c86ab0 r optc_shift +ffffffff82c86b84 r optc_mask +ffffffff82c86ecc r mpc_regs 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panel_cntl_shift +ffffffff82c9baf0 r panel_cntl_mask +ffffffff82c9bb30 r link_enc_regs +ffffffff82c9c190 r link_enc_aux_regs +ffffffff82c9c1e0 r link_enc_hpd_regs +ffffffff82c9c1f4 r le_shift +ffffffff82c9c2e4 r le_mask +ffffffff82c9c69c r link_enc_feature +ffffffff82c9c6ac r cs_shift +ffffffff82c9c6b8 r cs_mask +ffffffff82c9c6e0 r hubbub_reg +ffffffff82c9c868 r hubbub_shift +ffffffff82c9c8f8 r hubbub_mask +ffffffff82c9cb30 r vmid_regs +ffffffff82c9ccf0 r vmid_shifts +ffffffff82c9ccf8 r vmid_masks +ffffffff82c9cd20 r hubp_regs +ffffffff82c9d75c r hubp_shift +ffffffff82c9d858 r hubp_mask +ffffffff82c9dc50 r dpp_regs +ffffffff82c9f6a4 r tf_shift +ffffffff82c9f978 r tf_mask +ffffffff82ca04c0 r opp_regs +ffffffff82ca0678 r opp_shift +ffffffff82ca06b0 r opp_mask +ffffffff82ca0790 r optc_regs +ffffffff82ca0e98 r optc_shift +ffffffff82ca0f6c r optc_mask +ffffffff82ca12b4 r mpc_regs +ffffffff82ca2aa0 r mpc_shift +ffffffff82ca2b7c r mpc_mask +ffffffff82ca2ef0 r dsc_regs +ffffffff82ca32c4 r dsc_shift +ffffffff82ca337c r dsc_mask +ffffffff82ca3660 r dwbc30_regs +ffffffff82ca383c r dwbc30_shift +ffffffff82ca3970 r dwbc30_mask +ffffffff82ca3e40 r mcif_wb30_regs +ffffffff82ca3f3c r mcif_wb30_shift +ffffffff82ca3fe8 r mcif_wb30_mask +ffffffff82ca42a0 r aux_engine_regs +ffffffff82ca4368 r aux_mask +ffffffff82ca43c8 r aux_shift +ffffffff82ca43e0 r i2c_hw_regs +ffffffff82ca44f8 r i2c_shifts +ffffffff82ca4524 r i2c_masks +ffffffff82ca45d0 r audio_regs +ffffffff82ca4704 r audio_shift +ffffffff82ca471c r audio_mask +ffffffff82ca4760 r stream_enc_regs +ffffffff82ca4e04 r se_shift +ffffffff82ca4ee0 r se_mask +ffffffff82ca5250 r vpg_regs +ffffffff82ca52c8 r vpg_shift +ffffffff82ca52f0 r vpg_mask +ffffffff82ca5390 r afmt_regs +ffffffff82ca5468 r afmt_shift +ffffffff82ca547c r afmt_mask +ffffffff82ca54c0 r hwseq_reg +ffffffff82ca56dc r hwseq_shift +ffffffff82ca575c r hwseq_mask +ffffffff82ca6000 r bios_regs +ffffffff82ca6008 r res_cap_dcn303 +ffffffff82ca6048 r debug_defaults_drv +ffffffff82ca61f0 r clk_src_regs +ffffffff82ca6298 r dccg_regs +ffffffff82ca6388 r dccg_shift +ffffffff82ca6428 r dccg_mask +ffffffff82ca66a0 r abm_regs +ffffffff82ca6770 r abm_shift +ffffffff82ca6794 r abm_mask +ffffffff82ca6820 r res_create_funcs +ffffffff82ca6850 r plane_cap +ffffffff82ca6880 r panel_cntl_regs +ffffffff82ca68a0 r panel_cntl_shift +ffffffff82ca68b0 r panel_cntl_mask +ffffffff82ca68f0 r link_enc_regs +ffffffff82ca6b80 r link_enc_aux_regs +ffffffff82ca6ba0 r link_enc_hpd_regs +ffffffff82ca6ba8 r le_shift +ffffffff82ca6c98 r le_mask +ffffffff82ca7050 r link_enc_feature +ffffffff82ca7060 r cs_shift +ffffffff82ca706c r cs_mask +ffffffff82ca7094 r hubbub_reg +ffffffff82ca721c r hubbub_shift +ffffffff82ca72ac r hubbub_mask +ffffffff82ca74f0 r vmid_regs +ffffffff82ca76b0 r vmid_shifts +ffffffff82ca76b8 r vmid_masks +ffffffff82ca76e0 r hubp_regs +ffffffff82ca7af8 r hubp_shift +ffffffff82ca7bf4 r hubp_mask +ffffffff82ca7ff0 r dpp_regs +ffffffff82ca8a78 r tf_shift +ffffffff82ca8d4c r tf_mask +ffffffff82ca9890 r opp_regs +ffffffff82ca9940 r opp_shift +ffffffff82ca9978 r opp_mask +ffffffff82ca9a50 r optc_regs +ffffffff82ca9d20 r optc_shift +ffffffff82ca9df4 r optc_mask +ffffffff82caa13c r mpc_regs +ffffffff82cab928 r mpc_shift +ffffffff82caba04 r mpc_mask +ffffffff82cabd70 r dsc_regs +ffffffff82cabef8 r dsc_shift +ffffffff82cabfb0 r dsc_mask +ffffffff82cac290 r dwbc30_regs +ffffffff82cac46c r dwbc30_shift +ffffffff82cac5a0 r dwbc30_mask +ffffffff82caca70 r mcif_wb30_regs +ffffffff82cacb6c r mcif_wb30_shift +ffffffff82cacc18 r mcif_wb30_mask +ffffffff82caced0 r aux_engine_regs +ffffffff82cacf20 r aux_mask +ffffffff82cacf80 r aux_shift +ffffffff82cacfa0 r i2c_hw_regs +ffffffff82cad010 r i2c_shifts +ffffffff82cad03c r i2c_masks +ffffffff82cad0e0 r audio_regs +ffffffff82cad214 r audio_shift +ffffffff82cad22c r audio_mask +ffffffff82cad270 r stream_enc_regs +ffffffff82cad518 r se_shift +ffffffff82cad5f4 r se_mask +ffffffff82cad960 r vpg_regs +ffffffff82cad99c r vpg_shift +ffffffff82cad9c4 r vpg_mask +ffffffff82cada60 r afmt_regs +ffffffff82cadacc r afmt_shift +ffffffff82cadae0 r afmt_mask +ffffffff82cadb24 r hwseq_reg +ffffffff82cadd40 r hwseq_shift +ffffffff82caddc0 r hwseq_mask +ffffffff82cae000 r dccg31_funcs +ffffffff82caf000 r dcn31_link_enc_funcs +ffffffff82cb0000 r dcn30_str_enc_funcs +ffffffff82cb1000 r hubbub31_funcs +ffffffff82cb2000 r dcn31_funcs +ffffffff82cb22e8 r dcn31_private_funcs +ffffffff82cb3000 r dcn31_link_panel_cntl_funcs +ffffffff82cb4000 r bios_regs +ffffffff82cb4008 r res_cap_dcn31 +ffffffff82cb4050 r clk_src_regs +ffffffff82cb4200 r clk_src_regs_b0 +ffffffff82cb43a4 r dccg_regs +ffffffff82cb4494 r dccg_shift +ffffffff82cb4534 r dccg_mask +ffffffff82cb47b0 r abm_regs +ffffffff82cb4950 r abm_shift +ffffffff82cb4974 r abm_mask +ffffffff82cb4a00 r res_create_funcs +ffffffff82cb4a30 r plane_cap +ffffffff82cb4a60 r link_enc_regs +ffffffff82cb50c0 r link_enc_aux_regs +ffffffff82cb5110 r link_enc_hpd_regs +ffffffff82cb5124 r le_shift +ffffffff82cb5214 r le_mask +ffffffff82cb55cc r link_enc_feature +ffffffff82cb55dc r panel_config_defaults +ffffffff82cb5630 r debug_defaults_drv +ffffffff82cb57d8 r cs_shift +ffffffff82cb57e4 r cs_mask +ffffffff82cb580c r hubbub_reg +ffffffff82cb5994 r hubbub_shift +ffffffff82cb5a24 r hubbub_mask +ffffffff82cb5c60 r vmid_regs +ffffffff82cb5e20 r vmid_shifts +ffffffff82cb5e28 r vmid_masks +ffffffff82cb5e50 r hubp_regs +ffffffff82cb6680 r hubp_shift +ffffffff82cb677c r hubp_mask +ffffffff82cb6b70 r dpp_regs +ffffffff82cb8080 r tf_shift +ffffffff82cb8354 r tf_mask +ffffffff82cb8ea0 r opp_regs +ffffffff82cb9000 r opp_shift +ffffffff82cb9038 r opp_mask +ffffffff82cb9110 r optc_regs +ffffffff82cb96b0 r optc_shift +ffffffff82cb9784 r optc_mask +ffffffff82cb9acc r mpc_regs +ffffffff82cbb2b8 r mpc_shift +ffffffff82cbb394 r mpc_mask +ffffffff82cbb700 r dsc_regs +ffffffff82cbb94c r dsc_shift +ffffffff82cbba04 r dsc_mask +ffffffff82cbbce0 r dwbc30_regs +ffffffff82cbbebc r dwbc30_shift +ffffffff82cbbff0 r dwbc30_mask +ffffffff82cbc4c0 r mcif_wb30_regs +ffffffff82cbc5bc r mcif_wb30_shift +ffffffff82cbc668 r mcif_wb30_mask +ffffffff82cbc920 r aux_engine_regs +ffffffff82cbc9e8 r aux_mask +ffffffff82cbca48 r aux_shift +ffffffff82cbca60 r i2c_hw_regs +ffffffff82cbcb78 r i2c_shifts +ffffffff82cbcba4 r i2c_masks +ffffffff82cbcc50 r audio_regs +ffffffff82cbcd84 r audio_shift +ffffffff82cbcd9c r audio_mask +ffffffff82cbcdd8 r se_shift +ffffffff82cbceb4 r se_mask +ffffffff82cbd220 r vpg_regs +ffffffff82cbd310 r vpg_shift +ffffffff82cbd338 r vpg_mask +ffffffff82cbd3e0 r afmt_regs +ffffffff82cbd4b8 r afmt_shift +ffffffff82cbd4cc r afmt_mask +ffffffff82cbd520 r stream_enc_regs +ffffffff82cbebc0 r hpo_dp_stream_enc_regs +ffffffff82cbedf0 r hpo_dp_se_shift +ffffffff82cbee18 r hpo_dp_se_mask +ffffffff82cbeec0 r apg_regs +ffffffff82cbef00 r apg_shift +ffffffff82cbef08 r apg_mask +ffffffff82cbef20 r hpo_dp_link_enc_regs +ffffffff82cbf030 r hpo_dp_le_shift +ffffffff82cbf04c r hpo_dp_le_mask +ffffffff82cbf0b0 r hwseq_reg +ffffffff82cbf2cc r hwseq_shift +ffffffff82cbf34c r hwseq_mask +ffffffff82cc0000 r dccg314_funcs +ffffffff82cc1000 r dcn314_str_enc_funcs +ffffffff82cc2000 r dcn314_funcs +ffffffff82cc22e8 r dcn314_private_funcs +ffffffff82cc3000 r bios_regs +ffffffff82cc3008 r res_cap_dcn314 +ffffffff82cc3048 r debug_defaults_diags +ffffffff82cc31f0 r clk_src_regs +ffffffff82cc3394 r dccg_regs +ffffffff82cc3484 r dccg_shift +ffffffff82cc3524 r dccg_mask +ffffffff82cc37a0 r abm_regs +ffffffff82cc3940 r abm_shift +ffffffff82cc3964 r abm_mask +ffffffff82cc39f0 r res_create_funcs +ffffffff82cc3a20 r plane_cap +ffffffff82cc3a50 r link_enc_regs +ffffffff82cc40b0 r link_enc_aux_regs +ffffffff82cc4100 r link_enc_hpd_regs +ffffffff82cc4114 r le_shift +ffffffff82cc4204 r le_mask +ffffffff82cc45bc r link_enc_feature +ffffffff82cc45cc r panel_config_defaults +ffffffff82cc4620 r debug_defaults_drv +ffffffff82cc47c8 r cs_shift +ffffffff82cc47d4 r cs_mask +ffffffff82cc47fc r hubbub_reg +ffffffff82cc4984 r hubbub_shift +ffffffff82cc4a14 r hubbub_mask +ffffffff82cc4c50 r vmid_regs +ffffffff82cc4e10 r vmid_shifts +ffffffff82cc4e18 r vmid_masks +ffffffff82cc4e40 r hubp_regs +ffffffff82cc5670 r hubp_shift +ffffffff82cc576c r hubp_mask +ffffffff82cc5b60 r dpp_regs +ffffffff82cc7070 r tf_shift +ffffffff82cc7344 r tf_mask +ffffffff82cc7e90 r opp_regs +ffffffff82cc7ff0 r opp_shift +ffffffff82cc8028 r opp_mask +ffffffff82cc8100 r optc_regs +ffffffff82cc86a0 r optc_shift +ffffffff82cc8774 r optc_mask +ffffffff82cc8abc r mpc_regs +ffffffff82cca2a8 r mpc_shift +ffffffff82cca384 r mpc_mask +ffffffff82cca6f0 r dsc_regs +ffffffff82ccaa00 r dsc_shift +ffffffff82ccaab8 r dsc_mask +ffffffff82ccad90 r dwbc30_regs +ffffffff82ccaf6c r dwbc30_shift +ffffffff82ccb0a0 r dwbc30_mask +ffffffff82ccb570 r mcif_wb30_regs +ffffffff82ccb66c r mcif_wb30_shift +ffffffff82ccb718 r mcif_wb30_mask +ffffffff82ccb9d0 r aux_engine_regs +ffffffff82ccba98 r aux_mask +ffffffff82ccbaf8 r aux_shift +ffffffff82ccbb10 r i2c_hw_regs +ffffffff82ccbc28 r i2c_shifts +ffffffff82ccbc54 r i2c_masks +ffffffff82ccbd00 r audio_regs +ffffffff82ccbe34 r audio_shift +ffffffff82ccbe4c r audio_mask +ffffffff82ccbe90 r stream_enc_regs +ffffffff82ccc534 r se_shift +ffffffff82ccc610 r se_mask +ffffffff82ccc980 r vpg_regs +ffffffff82ccca70 r vpg_shift +ffffffff82ccca98 r vpg_mask +ffffffff82cccb40 r afmt_regs +ffffffff82cccc18 r afmt_shift +ffffffff82cccc2c r afmt_mask +ffffffff82cccc80 r hpo_dp_stream_enc_regs +ffffffff82ccceb0 r hpo_dp_se_shift +ffffffff82ccced8 r hpo_dp_se_mask +ffffffff82cccf80 r apg_regs +ffffffff82cccfc0 r apg_shift +ffffffff82cccfc8 r apg_mask +ffffffff82cccfe0 r hpo_dp_link_enc_regs +ffffffff82ccd0f0 r hpo_dp_le_shift +ffffffff82ccd10c r hpo_dp_le_mask +ffffffff82ccd170 r hwseq_reg +ffffffff82ccd38c r hwseq_shift +ffffffff82ccd40c r hwseq_mask +ffffffff82cce000 r bios_regs +ffffffff82cce008 r res_cap_dcn31 +ffffffff82cce050 r clk_src_regs +ffffffff82cce1f4 r dccg_regs +ffffffff82cce2e4 r dccg_shift +ffffffff82cce384 r dccg_mask +ffffffff82cce600 r abm_regs +ffffffff82cce7a0 r abm_shift +ffffffff82cce7c4 r abm_mask +ffffffff82cce850 r res_create_funcs +ffffffff82cce880 r plane_cap +ffffffff82cce8b0 r link_enc_regs +ffffffff82ccef10 r link_enc_aux_regs +ffffffff82ccef60 r link_enc_hpd_regs +ffffffff82ccef74 r le_shift +ffffffff82ccf064 r le_mask +ffffffff82ccf41c r link_enc_feature +ffffffff82ccf42c r panel_config_defaults +ffffffff82ccf480 r debug_defaults_drv +ffffffff82ccf628 r cs_shift +ffffffff82ccf634 r cs_mask +ffffffff82ccf65c r hubbub_reg +ffffffff82ccf7e4 r hubbub_shift +ffffffff82ccf874 r hubbub_mask +ffffffff82ccfab0 r vmid_regs +ffffffff82ccfc70 r vmid_shifts +ffffffff82ccfc78 r vmid_masks +ffffffff82ccfca0 r hubp_regs +ffffffff82cd04d0 r hubp_shift +ffffffff82cd05cc r hubp_mask +ffffffff82cd09c0 r dpp_regs +ffffffff82cd1ed0 r tf_shift +ffffffff82cd21a4 r tf_mask +ffffffff82cd2cf0 r opp_regs +ffffffff82cd2e50 r opp_shift +ffffffff82cd2e88 r opp_mask +ffffffff82cd2f60 r optc_regs +ffffffff82cd3500 r optc_shift +ffffffff82cd35d4 r optc_mask +ffffffff82cd391c r mpc_regs +ffffffff82cd5108 r mpc_shift +ffffffff82cd51e4 r mpc_mask +ffffffff82cd5550 r dsc_regs +ffffffff82cd579c r dsc_shift +ffffffff82cd5854 r dsc_mask +ffffffff82cd5b30 r dwbc30_regs +ffffffff82cd5d0c r dwbc30_shift +ffffffff82cd5e40 r dwbc30_mask +ffffffff82cd6310 r mcif_wb30_regs +ffffffff82cd640c r mcif_wb30_shift +ffffffff82cd64b8 r mcif_wb30_mask +ffffffff82cd6770 r aux_engine_regs +ffffffff82cd6838 r aux_mask +ffffffff82cd6898 r aux_shift +ffffffff82cd68b0 r i2c_hw_regs +ffffffff82cd69c8 r i2c_shifts +ffffffff82cd69f4 r i2c_masks +ffffffff82cd6aa0 r audio_regs +ffffffff82cd6bd4 r audio_shift +ffffffff82cd6bec r audio_mask +ffffffff82cd6c30 r stream_enc_regs +ffffffff82cd72d4 r se_shift +ffffffff82cd73b0 r se_mask +ffffffff82cd7720 r vpg_regs +ffffffff82cd7810 r vpg_shift +ffffffff82cd7838 r vpg_mask +ffffffff82cd78e0 r afmt_regs +ffffffff82cd79b8 r afmt_shift +ffffffff82cd79cc r afmt_mask +ffffffff82cd7a20 r hpo_dp_stream_enc_regs +ffffffff82cd7c50 r hpo_dp_se_shift +ffffffff82cd7c78 r hpo_dp_se_mask +ffffffff82cd7d20 r apg_regs +ffffffff82cd7d60 r apg_shift +ffffffff82cd7d68 r apg_mask +ffffffff82cd7d80 r hpo_dp_link_enc_regs +ffffffff82cd7e90 r hpo_dp_le_shift +ffffffff82cd7eac r hpo_dp_le_mask +ffffffff82cd7f10 r hwseq_reg +ffffffff82cd812c r hwseq_shift +ffffffff82cd81ac r hwseq_mask +ffffffff82cd9000 r bios_regs +ffffffff82cd9008 r res_cap_dcn31 +ffffffff82cd9050 r clk_src_regs +ffffffff82cd91f4 r dccg_regs +ffffffff82cd92e4 r dccg_shift +ffffffff82cd9384 r dccg_mask +ffffffff82cd9600 r abm_regs +ffffffff82cd97a0 r abm_shift +ffffffff82cd97c4 r abm_mask +ffffffff82cd9850 r res_create_funcs +ffffffff82cd9880 r plane_cap +ffffffff82cd98b0 r link_enc_regs +ffffffff82cd9f10 r link_enc_aux_regs +ffffffff82cd9f60 r link_enc_hpd_regs +ffffffff82cd9f74 r le_shift +ffffffff82cda064 r le_mask +ffffffff82cda41c r link_enc_feature +ffffffff82cda42c r panel_config_defaults +ffffffff82cda480 r debug_defaults_drv +ffffffff82cda628 r cs_shift +ffffffff82cda634 r cs_mask +ffffffff82cda65c r hubbub_reg +ffffffff82cda7e4 r hubbub_shift +ffffffff82cda874 r hubbub_mask +ffffffff82cdaab0 r vmid_regs +ffffffff82cdac70 r vmid_shifts +ffffffff82cdac78 r vmid_masks +ffffffff82cdaca0 r hubp_regs +ffffffff82cdb4d0 r hubp_shift +ffffffff82cdb5cc r hubp_mask +ffffffff82cdb9c0 r dpp_regs +ffffffff82cdced0 r tf_shift +ffffffff82cdd1a4 r tf_mask +ffffffff82cddcf0 r opp_regs +ffffffff82cdde50 r opp_shift +ffffffff82cdde88 r opp_mask +ffffffff82cddf60 r optc_regs +ffffffff82cde500 r optc_shift +ffffffff82cde5d4 r optc_mask +ffffffff82cde91c r mpc_regs +ffffffff82ce0108 r mpc_shift +ffffffff82ce01e4 r mpc_mask +ffffffff82ce0550 r dsc_regs +ffffffff82ce079c r dsc_shift +ffffffff82ce0854 r dsc_mask +ffffffff82ce0b30 r dwbc30_regs +ffffffff82ce0d0c r dwbc30_shift +ffffffff82ce0e40 r dwbc30_mask +ffffffff82ce1310 r mcif_wb30_regs +ffffffff82ce140c r mcif_wb30_shift +ffffffff82ce14b8 r mcif_wb30_mask +ffffffff82ce1770 r aux_engine_regs +ffffffff82ce1838 r aux_mask +ffffffff82ce1898 r aux_shift +ffffffff82ce18b0 r i2c_hw_regs +ffffffff82ce19c8 r i2c_shifts +ffffffff82ce19f4 r i2c_masks +ffffffff82ce1aa0 r audio_regs +ffffffff82ce1bd4 r audio_shift +ffffffff82ce1bec r audio_mask +ffffffff82ce1c30 r stream_enc_regs +ffffffff82ce22d4 r se_shift +ffffffff82ce23b0 r se_mask +ffffffff82ce2720 r vpg_regs +ffffffff82ce2810 r vpg_shift +ffffffff82ce2838 r vpg_mask +ffffffff82ce28e0 r afmt_regs +ffffffff82ce29b8 r afmt_shift +ffffffff82ce29cc r afmt_mask +ffffffff82ce2a20 r hpo_dp_stream_enc_regs +ffffffff82ce2c50 r hpo_dp_se_shift +ffffffff82ce2c78 r hpo_dp_se_mask +ffffffff82ce2d20 r apg_regs +ffffffff82ce2d60 r apg_shift +ffffffff82ce2d68 r apg_mask +ffffffff82ce2d80 r hpo_dp_link_enc_regs +ffffffff82ce2e90 r hpo_dp_le_shift +ffffffff82ce2eac r hpo_dp_le_mask +ffffffff82ce2f10 r hwseq_reg +ffffffff82ce312c r hwseq_shift +ffffffff82ce31ac r hwseq_mask +ffffffff82ce4000 r dccg32_funcs +ffffffff82ce5000 r dcn32_link_enc_funcs +ffffffff82ce6000 r dcn32_str_enc_funcs +ffffffff82ce7000 r hubbub32_funcs +ffffffff82ce8000 r dcn32_funcs +ffffffff82ce82e8 r dcn32_private_funcs +ffffffff82ce9000 r dcn32_mmhubbub_funcs +ffffffff82cea000 r dcn32_mpc_funcs +ffffffff82ceb000 r res_cap_dcn32 +ffffffff82ceb03c r dccg_shift +ffffffff82ceb0dc r dccg_mask +ffffffff82ceb350 r abm_shift +ffffffff82ceb374 r abm_mask +ffffffff82ceb400 r res_create_funcs +ffffffff82ceb430 r plane_cap +ffffffff82ceb45c r le_shift +ffffffff82ceb54c r le_mask +ffffffff82ceb904 r link_enc_feature +ffffffff82ceb918 r debug_defaults_drv +ffffffff82cebac0 r cs_shift +ffffffff82cebacc r cs_mask +ffffffff82cebaf4 r hubbub_shift +ffffffff82cebb84 r hubbub_mask +ffffffff82cebdbc r vmid_shifts +ffffffff82cebdc4 r vmid_masks +ffffffff82cebde4 r hubp_shift +ffffffff82cebee0 r hubp_mask +ffffffff82cec2d0 r tf_shift +ffffffff82cec5a4 r tf_mask +ffffffff82ced0e8 r opp_shift +ffffffff82ced120 r opp_mask +ffffffff82ced1f4 r optc_shift +ffffffff82ced2c8 r optc_mask +ffffffff82ced610 r mpc_shift +ffffffff82ced6ec r mpc_mask +ffffffff82ceda58 r dsc_shift +ffffffff82cedb10 r dsc_mask +ffffffff82cedde8 r dwbc30_shift +ffffffff82cedf1c r dwbc30_mask +ffffffff82cee3e4 r mcif_wb30_shift +ffffffff82cee490 r mcif_wb30_mask +ffffffff82cee73c r aux_mask +ffffffff82cee79c r aux_shift +ffffffff82cee7b4 r i2c_shifts +ffffffff82cee7e0 r i2c_masks +ffffffff82cee884 r audio_shift +ffffffff82cee89c r audio_mask +ffffffff82cee8d8 r se_shift +ffffffff82cee9b4 r se_mask +ffffffff82ceed20 r vpg_shift +ffffffff82ceed48 r vpg_mask +ffffffff82ceeddc r afmt_shift +ffffffff82ceedf0 r afmt_mask +ffffffff82ceee34 r hpo_dp_se_shift +ffffffff82ceee5c r hpo_dp_se_mask +ffffffff82ceeefc r apg_shift +ffffffff82ceef04 r apg_mask +ffffffff82ceef1c r hpo_dp_le_shift +ffffffff82ceef38 r hpo_dp_le_mask +ffffffff82ceef9c r hwseq_shift +ffffffff82cef01c r hwseq_mask +ffffffff82cf0000 r dcn321_link_enc_funcs +ffffffff82cf1000 r res_cap_dcn321 +ffffffff82cf103c r dccg_shift +ffffffff82cf10dc r dccg_mask +ffffffff82cf1350 r abm_shift +ffffffff82cf1374 r abm_mask +ffffffff82cf1400 r res_create_funcs +ffffffff82cf1430 r plane_cap +ffffffff82cf145c r le_shift +ffffffff82cf154c r le_mask +ffffffff82cf1904 r link_enc_feature +ffffffff82cf1918 r debug_defaults_drv +ffffffff82cf1ac0 r cs_shift +ffffffff82cf1acc r cs_mask +ffffffff82cf1af4 r hubbub_shift +ffffffff82cf1b84 r hubbub_mask +ffffffff82cf1dbc r vmid_shifts +ffffffff82cf1dc4 r vmid_masks +ffffffff82cf1de4 r hubp_shift +ffffffff82cf1ee0 r hubp_mask +ffffffff82cf22d0 r tf_shift +ffffffff82cf25a4 r tf_mask +ffffffff82cf30e8 r opp_shift +ffffffff82cf3120 r opp_mask +ffffffff82cf31f4 r optc_shift +ffffffff82cf32c8 r optc_mask +ffffffff82cf3610 r mpc_shift +ffffffff82cf36ec r mpc_mask +ffffffff82cf3a58 r dsc_shift +ffffffff82cf3b10 r dsc_mask +ffffffff82cf3de8 r dwbc30_shift +ffffffff82cf3f1c r dwbc30_mask +ffffffff82cf43e4 r mcif_wb30_shift +ffffffff82cf4490 r mcif_wb30_mask +ffffffff82cf473c r aux_mask +ffffffff82cf479c r aux_shift +ffffffff82cf47b4 r i2c_shifts +ffffffff82cf47e0 r i2c_masks +ffffffff82cf4884 r audio_shift +ffffffff82cf489c r audio_mask +ffffffff82cf48d8 r se_shift +ffffffff82cf49b4 r se_mask +ffffffff82cf4d20 r vpg_shift +ffffffff82cf4d48 r vpg_mask +ffffffff82cf4ddc r afmt_shift +ffffffff82cf4df0 r afmt_mask +ffffffff82cf4e34 r hpo_dp_se_shift +ffffffff82cf4e5c r hpo_dp_se_mask +ffffffff82cf4efc r apg_shift +ffffffff82cf4f04 r apg_mask +ffffffff82cf4f1c r hpo_dp_le_shift +ffffffff82cf4f38 r hpo_dp_le_mask +ffffffff82cf4f9c r hwseq_shift +ffffffff82cf501c r hwseq_mask +ffffffff82cf7000 R dcn10_soc_defaults +ffffffff82cf708c R dcn10_ip_defaults +ffffffff82d03000 r dml20_funcs +ffffffff82d03030 r dml20v2_funcs +ffffffff82d03060 r dml21_funcs +ffffffff82d03090 r dml30_funcs +ffffffff82d030c0 r dml31_funcs +ffffffff82d030f0 r dml314_funcs +ffffffff82d03120 r dml32_funcs +ffffffff82d06000 r qp_table_444_8bpc_max +ffffffff82d06940 r qp_table_444_8bpc_min +ffffffff82d07280 r qp_table_444_10bpc_max +ffffffff82d07ec0 r qp_table_444_10bpc_min +ffffffff82d08b00 r qp_table_444_12bpc_max +ffffffff82d09a40 r qp_table_444_12bpc_min +ffffffff82d0a980 r qp_table_422_8bpc_max +ffffffff82d0aec0 r qp_table_422_8bpc_min +ffffffff82d0b400 r qp_table_422_10bpc_max +ffffffff82d0bb40 r qp_table_422_10bpc_min +ffffffff82d0c280 r qp_table_422_12bpc_max +ffffffff82d0cbc0 r qp_table_422_12bpc_min +ffffffff82d0d500 r qp_table_420_8bpc_max +ffffffff82d0d940 r qp_table_420_8bpc_min +ffffffff82d0dd80 r qp_table_420_10bpc_max +ffffffff82d0e340 r qp_table_420_10bpc_min +ffffffff82d0e900 r qp_table_420_12bpc_max +ffffffff82d0f040 r qp_table_420_12bpc_min +ffffffff82d11000 r funcs +ffffffff82d11050 r hpd_regs +ffffffff82d111a0 r hpd_shift +ffffffff82d111b0 r hpd_mask +ffffffff82d111c0 r ddc_data_regs +ffffffff82d113a0 r ddc_clk_regs +ffffffff82d11580 r ddc_shift +ffffffff82d115a8 r ddc_mask ffffffff82d12000 r funcs -ffffffff82d12050 r hpd_regs -ffffffff82d121a0 r hpd_shift -ffffffff82d121b0 r hpd_mask -ffffffff82d121c0 r ddc_data_regs -ffffffff82d123a0 r ddc_clk_regs -ffffffff82d12580 r ddc_shift -ffffffff82d125a8 r ddc_mask ffffffff82d13000 r funcs +ffffffff82d13050 r hpd_regs +ffffffff82d131a0 r hpd_shift +ffffffff82d131b0 r hpd_mask +ffffffff82d131c0 r ddc_data_regs +ffffffff82d133a0 r ddc_clk_regs +ffffffff82d13580 r ddc_shift +ffffffff82d135a8 r ddc_mask ffffffff82d14000 r funcs -ffffffff82d14050 r hpd_regs -ffffffff82d141a0 r hpd_shift -ffffffff82d141b0 r hpd_mask -ffffffff82d141c0 r ddc_data_regs -ffffffff82d143a0 r ddc_clk_regs -ffffffff82d14580 r ddc_shift -ffffffff82d145a8 r ddc_mask ffffffff82d15000 r funcs +ffffffff82d15050 r hpd_regs +ffffffff82d151a0 r hpd_shift +ffffffff82d151b0 r hpd_mask +ffffffff82d151c0 r ddc_data_regs +ffffffff82d153a0 r ddc_clk_regs +ffffffff82d15580 r ddc_shift +ffffffff82d155a8 r ddc_mask ffffffff82d16000 r funcs -ffffffff82d16050 r hpd_regs -ffffffff82d161a0 r hpd_shift -ffffffff82d161b0 r hpd_mask -ffffffff82d161c0 r ddc_data_regs -ffffffff82d163a0 r ddc_clk_regs -ffffffff82d16580 r ddc_shift -ffffffff82d165a8 r ddc_mask ffffffff82d17000 r funcs +ffffffff82d17050 r hpd_regs +ffffffff82d171a0 r hpd_shift +ffffffff82d171b0 r hpd_mask +ffffffff82d171c0 r ddc_data_regs +ffffffff82d173a0 r ddc_clk_regs +ffffffff82d17580 r ddc_shift +ffffffff82d175a8 r ddc_mask +ffffffff82d175d0 r generic_regs +ffffffff82d17640 r generic_shift +ffffffff82d17650 r generic_mask ffffffff82d18000 r funcs -ffffffff82d18050 r hpd_regs -ffffffff82d181a0 r hpd_shift -ffffffff82d181b0 r hpd_mask -ffffffff82d181c0 r ddc_data_regs -ffffffff82d183a0 r ddc_clk_regs -ffffffff82d18580 r ddc_shift -ffffffff82d185a8 r ddc_mask -ffffffff82d185d0 r generic_regs -ffffffff82d18640 r generic_shift -ffffffff82d18650 r generic_mask ffffffff82d19000 r funcs +ffffffff82d19050 r hpd_regs +ffffffff82d191a0 r hpd_shift +ffffffff82d191b0 r hpd_mask +ffffffff82d191c0 r ddc_data_regs_dcn +ffffffff82d19370 r ddc_clk_regs_dcn +ffffffff82d19520 r ddc_shift +ffffffff82d19640 r ddc_mask +ffffffff82d19760 r generic_regs +ffffffff82d197d0 r generic_shift +ffffffff82d197e0 r generic_mask ffffffff82d1a000 r funcs -ffffffff82d1a050 r hpd_regs -ffffffff82d1a1a0 r hpd_shift -ffffffff82d1a1b0 r hpd_mask -ffffffff82d1a1c0 r ddc_data_regs_dcn -ffffffff82d1a370 r ddc_clk_regs_dcn -ffffffff82d1a520 r ddc_shift -ffffffff82d1a640 r ddc_mask -ffffffff82d1a760 r generic_regs -ffffffff82d1a7d0 r generic_shift -ffffffff82d1a7e0 r generic_mask ffffffff82d1b000 r funcs +ffffffff82d1b050 r hpd_regs +ffffffff82d1b168 r hpd_shift +ffffffff82d1b178 r hpd_mask +ffffffff82d1b190 r ddc_data_regs_dcn +ffffffff82d1b2c0 r ddc_clk_regs_dcn +ffffffff82d1b3f0 r ddc_shift +ffffffff82d1b4e0 r ddc_mask +ffffffff82d1b5d0 r generic_regs +ffffffff82d1b604 r generic_shift +ffffffff82d1b60c r generic_mask ffffffff82d1c000 r funcs -ffffffff82d1c050 r hpd_regs -ffffffff82d1c168 r hpd_shift -ffffffff82d1c178 r hpd_mask -ffffffff82d1c190 r ddc_data_regs_dcn -ffffffff82d1c2c0 r ddc_clk_regs_dcn -ffffffff82d1c3f0 r ddc_shift -ffffffff82d1c4e0 r ddc_mask -ffffffff82d1c5d0 r generic_regs -ffffffff82d1c604 r generic_shift -ffffffff82d1c60c r generic_mask ffffffff82d1d000 r funcs +ffffffff82d1d050 r hpd_regs +ffffffff82d1d1a0 r hpd_shift +ffffffff82d1d1b0 r hpd_mask +ffffffff82d1d1c0 r ddc_data_regs_dcn +ffffffff82d1d370 r ddc_clk_regs_dcn +ffffffff82d1d520 r ddc_shift +ffffffff82d1d640 r ddc_mask +ffffffff82d1d760 r generic_regs +ffffffff82d1d7d0 r generic_shift +ffffffff82d1d7e0 r generic_mask ffffffff82d1e000 r funcs -ffffffff82d1e050 r hpd_regs -ffffffff82d1e1a0 r hpd_shift -ffffffff82d1e1b0 r hpd_mask -ffffffff82d1e1c0 r ddc_data_regs_dcn -ffffffff82d1e370 r ddc_clk_regs_dcn -ffffffff82d1e520 r ddc_shift -ffffffff82d1e640 r ddc_mask -ffffffff82d1e760 r generic_regs -ffffffff82d1e7d0 r generic_shift -ffffffff82d1e7e0 r generic_mask ffffffff82d1f000 r funcs +ffffffff82d1f050 r hpd_regs +ffffffff82d1f168 r hpd_shift +ffffffff82d1f178 r hpd_mask +ffffffff82d1f190 r ddc_data_regs_dcn +ffffffff82d1f300 r ddc_clk_regs_dcn +ffffffff82d1f470 r ddc_shift +ffffffff82d1f560 r ddc_mask +ffffffff82d1f650 r generic_regs +ffffffff82d1f6c0 r generic_shift +ffffffff82d1f6d0 r generic_mask ffffffff82d20000 r funcs -ffffffff82d20050 r hpd_regs -ffffffff82d20168 r hpd_shift -ffffffff82d20178 r hpd_mask -ffffffff82d20190 r ddc_data_regs_dcn -ffffffff82d20300 r ddc_clk_regs_dcn -ffffffff82d20470 r ddc_shift -ffffffff82d20560 r ddc_mask -ffffffff82d20650 r generic_regs -ffffffff82d206c0 r generic_shift -ffffffff82d206d0 r generic_mask ffffffff82d21000 r funcs +ffffffff82d21050 r hpd_regs +ffffffff82d21168 r hpd_shift +ffffffff82d21178 r hpd_mask +ffffffff82d21190 r ddc_data_regs_dcn +ffffffff82d21340 r ddc_clk_regs_dcn +ffffffff82d214f0 r ddc_shift +ffffffff82d21610 r ddc_mask +ffffffff82d21730 r generic_regs +ffffffff82d217a0 r generic_shift +ffffffff82d217b0 r generic_mask ffffffff82d22000 r funcs -ffffffff82d22050 r hpd_regs -ffffffff82d22168 r hpd_shift -ffffffff82d22178 r hpd_mask -ffffffff82d22190 r ddc_data_regs_dcn -ffffffff82d22340 r ddc_clk_regs_dcn -ffffffff82d224f0 r ddc_shift -ffffffff82d22610 r ddc_mask -ffffffff82d22730 r generic_regs -ffffffff82d227a0 r generic_shift -ffffffff82d227b0 r generic_mask ffffffff82d23000 r funcs ffffffff82d24000 r funcs ffffffff82d25000 r funcs -ffffffff82d26000 r funcs -ffffffff82d27000 r hdmi_14_protection -ffffffff82d27010 r dp_11_protection -ffffffff82d27020 r hdcp_i2c_offsets -ffffffff82d27050 r hdcp_dpcd_addrs -ffffffff82d28000 r irq_service_funcs_dce110 -ffffffff82d28008 r dummy_irq_info_funcs -ffffffff82d28018 r hpd_irq_info_funcs -ffffffff82d28028 r hpd_rx_irq_info_funcs -ffffffff82d28038 r pflip_irq_info_funcs -ffffffff82d28048 r vupdate_irq_info_funcs -ffffffff82d28058 r vblank_irq_info_funcs -ffffffff82d28070 r irq_source_info_dce110 -ffffffff82d2a000 r irq_service_funcs_dce120 -ffffffff82d2a008 r dummy_irq_info_funcs -ffffffff82d2a018 r hpd_irq_info_funcs -ffffffff82d2a028 r hpd_rx_irq_info_funcs -ffffffff82d2a038 r pflip_irq_info_funcs -ffffffff82d2a048 r vupdate_irq_info_funcs -ffffffff82d2a058 r vblank_irq_info_funcs -ffffffff82d2a070 r irq_source_info_dce120 -ffffffff82d2c000 r irq_service_funcs_dce80 -ffffffff82d2c008 r dummy_irq_info_funcs -ffffffff82d2c018 r hpd_irq_info_funcs -ffffffff82d2c028 r hpd_rx_irq_info_funcs -ffffffff82d2c038 r pflip_irq_info_funcs -ffffffff82d2c048 r vupdate_irq_info_funcs -ffffffff82d2c058 r vblank_irq_info_funcs -ffffffff82d2c070 r irq_source_info_dce80 -ffffffff82d2e000 r irq_service_funcs_dcn10 -ffffffff82d2e008 r dummy_irq_info_funcs -ffffffff82d2e018 r hpd_irq_info_funcs -ffffffff82d2e028 r hpd_rx_irq_info_funcs -ffffffff82d2e038 r pflip_irq_info_funcs -ffffffff82d2e048 r vupdate_no_lock_irq_info_funcs -ffffffff82d2e058 r vblank_irq_info_funcs -ffffffff82d2e068 r vline0_irq_info_funcs -ffffffff82d2e080 r irq_source_info_dcn10 -ffffffff82d30000 r irq_service_funcs_dcn20 -ffffffff82d30008 r dummy_irq_info_funcs -ffffffff82d30018 r hpd_irq_info_funcs -ffffffff82d30028 r hpd_rx_irq_info_funcs -ffffffff82d30038 r pflip_irq_info_funcs -ffffffff82d30048 r vupdate_no_lock_irq_info_funcs -ffffffff82d30058 r vblank_irq_info_funcs -ffffffff82d30068 r vline0_irq_info_funcs -ffffffff82d30080 r irq_source_info_dcn20 -ffffffff82d32000 r irq_service_funcs_dcn201 -ffffffff82d32008 r dummy_irq_info_funcs -ffffffff82d32018 r hpd_irq_info_funcs -ffffffff82d32028 r hpd_rx_irq_info_funcs -ffffffff82d32038 r pflip_irq_info_funcs -ffffffff82d32048 r vupdate_no_lock_irq_info_funcs -ffffffff82d32058 r vblank_irq_info_funcs -ffffffff82d32068 r vline0_irq_info_funcs -ffffffff82d32080 r irq_source_info_dcn201 -ffffffff82d34000 r irq_source_info_dcn21 -ffffffff82d35290 r irq_service_funcs_dcn21 -ffffffff82d35298 r dummy_irq_info_funcs -ffffffff82d352a8 r hpd_irq_info_funcs -ffffffff82d352b8 r hpd_rx_irq_info_funcs -ffffffff82d352c8 r pflip_irq_info_funcs -ffffffff82d352d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d352e8 r vblank_irq_info_funcs -ffffffff82d352f8 r vline0_irq_info_funcs -ffffffff82d35308 r dmub_outbox_irq_info_funcs -ffffffff82d36000 r irq_source_info_dcn30 -ffffffff82d37290 r irq_service_funcs_dcn30 -ffffffff82d37298 r dummy_irq_info_funcs -ffffffff82d372a8 r hpd_irq_info_funcs -ffffffff82d372b8 r hpd_rx_irq_info_funcs -ffffffff82d372c8 r pflip_irq_info_funcs -ffffffff82d372d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d372e8 r vblank_irq_info_funcs -ffffffff82d372f8 r vline0_irq_info_funcs -ffffffff82d37308 r dmub_trace_irq_info_funcs -ffffffff82d38000 r irq_source_info_dcn302 -ffffffff82d39290 r irq_service_funcs_dcn302 -ffffffff82d39298 r dummy_irq_info_funcs -ffffffff82d392a8 r hpd_irq_info_funcs -ffffffff82d392b8 r hpd_rx_irq_info_funcs -ffffffff82d392c8 r pflip_irq_info_funcs -ffffffff82d392d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d392e8 r vblank_irq_info_funcs -ffffffff82d392f8 r vline0_irq_info_funcs -ffffffff82d39308 r dmub_trace_irq_info_funcs -ffffffff82d3a000 r irq_service_funcs_dcn303 -ffffffff82d3a008 r dummy_irq_info_funcs -ffffffff82d3a018 r hpd_irq_info_funcs -ffffffff82d3a028 r hpd_rx_irq_info_funcs -ffffffff82d3a038 r pflip_irq_info_funcs -ffffffff82d3a048 r vupdate_no_lock_irq_info_funcs -ffffffff82d3a058 r vblank_irq_info_funcs -ffffffff82d3a068 r vline0_irq_info_funcs -ffffffff82d3a080 r irq_source_info_dcn303 -ffffffff82d3c000 r irq_source_info_dcn31 -ffffffff82d3d290 r irq_service_funcs_dcn31 -ffffffff82d3d298 r dummy_irq_info_funcs -ffffffff82d3d2a8 r hpd_irq_info_funcs -ffffffff82d3d2b8 r hpd_rx_irq_info_funcs -ffffffff82d3d2c8 r pflip_irq_info_funcs -ffffffff82d3d2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d3d2e8 r vblank_irq_info_funcs -ffffffff82d3d2f8 r vline0_irq_info_funcs -ffffffff82d3d308 r outbox_irq_info_funcs -ffffffff82d3e000 r irq_source_info_dcn314 -ffffffff82d3f290 r irq_service_funcs_dcn314 -ffffffff82d3f298 r dummy_irq_info_funcs -ffffffff82d3f2a8 r hpd_irq_info_funcs -ffffffff82d3f2b8 r hpd_rx_irq_info_funcs -ffffffff82d3f2c8 r pflip_irq_info_funcs -ffffffff82d3f2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d3f2e8 r vblank_irq_info_funcs -ffffffff82d3f2f8 r vline0_irq_info_funcs -ffffffff82d3f308 r outbox_irq_info_funcs -ffffffff82d40000 r irq_source_info_dcn315 -ffffffff82d41290 r irq_service_funcs_dcn315 -ffffffff82d41298 r dummy_irq_info_funcs -ffffffff82d412a8 r hpd_irq_info_funcs -ffffffff82d412b8 r hpd_rx_irq_info_funcs -ffffffff82d412c8 r pflip_irq_info_funcs -ffffffff82d412d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d412e8 r vblank_irq_info_funcs -ffffffff82d412f8 r vline0_irq_info_funcs -ffffffff82d41308 r outbox_irq_info_funcs -ffffffff82d42000 r irq_source_info_dcn32 -ffffffff82d43290 r irq_service_funcs_dcn32 -ffffffff82d43298 r dummy_irq_info_funcs -ffffffff82d432a8 r hpd_irq_info_funcs -ffffffff82d432b8 r hpd_rx_irq_info_funcs -ffffffff82d432c8 r pflip_irq_info_funcs -ffffffff82d432d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d432e8 r vblank_irq_info_funcs -ffffffff82d432f8 r vline0_irq_info_funcs -ffffffff82d43308 r outbox_irq_info_funcs -ffffffff82d45000 r dio_link_hwss -ffffffff82d46000 r dio_fixed_vs_pe_retimer_link_hwss -ffffffff82d47000 r dpia_link_hwss -ffffffff82d48000 r hpo_dp_link_hwss -ffffffff82d49000 r hpo_fixed_vs_pe_retimer_dp_link_hwss -ffffffff82d4a000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82d4b000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82d4b006 r DP_DVI_CONVERTER_ID_4 -ffffffff82d4b00d r DP_DVI_CONVERTER_ID_5 -ffffffff82d4c000 r dp_lt_fallbacks -ffffffff82d50000 r mandatory_dpcd_partitions -ffffffff82d51000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82d51007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82d52000 r virtual_lnk_enc_funcs -ffffffff82d53000 r virtual_link_hwss -ffffffff82d54000 r virtual_str_enc_funcs -ffffffff82d55000 R dmub_srv_dcn20_regs -ffffffff82d56000 R dmub_srv_dcn21_regs -ffffffff82d57000 R dmub_srv_dcn30_regs -ffffffff82d58000 R dmub_srv_dcn301_regs -ffffffff82d59000 R dmub_srv_dcn302_regs -ffffffff82d5a000 R dmub_srv_dcn303_regs -ffffffff82d5b000 R dmub_srv_dcn31_regs -ffffffff82d5c000 R dmub_srv_dcn314_regs -ffffffff82d5d000 R dmub_srv_dcn315_regs -ffffffff82d5e000 R dmub_srv_dcn316_regs -ffffffff82d5f000 R dmub_srv_dcn32_regs -ffffffff82d60000 r numerator01 -ffffffff82d60020 r numerator02 -ffffffff82d60040 r numerator04 -ffffffff82d60060 r numerator05 -ffffffff82d64000 r abm_settings -ffffffff82d64020 r abm_settings_config0 -ffffffff82d64060 r abm_settings_config1 -ffffffff82d640a0 r abm_settings_config2 -ffffffff82d640d8 r min_reduction_table_v_2_2 -ffffffff82d640e5 r max_reduction_table_v_2_2 -ffffffff82d640f2 r min_reduction_table -ffffffff82d640ff r max_reduction_table -ffffffff82d64110 r custom_backlight_curve0 -ffffffff82d65000 R amdgpu_pp_profile_name -ffffffff82d66000 r pp_lib_thermal_controller_names -ffffffff82d67000 r pp_ip_funcs -ffffffff82d670a0 R pp_smu_ip_block -ffffffff82d670b8 r pp_dpm_funcs +ffffffff82d26000 r hdmi_14_protection +ffffffff82d26010 r dp_11_protection +ffffffff82d26020 r hdcp_i2c_offsets +ffffffff82d26050 r hdcp_dpcd_addrs +ffffffff82d27000 r irq_service_funcs_dce110 +ffffffff82d27008 r dummy_irq_info_funcs +ffffffff82d27018 r hpd_irq_info_funcs +ffffffff82d27028 r hpd_rx_irq_info_funcs +ffffffff82d27038 r pflip_irq_info_funcs +ffffffff82d27048 r vupdate_irq_info_funcs +ffffffff82d27058 r vblank_irq_info_funcs +ffffffff82d27070 r irq_source_info_dce110 +ffffffff82d29000 r irq_service_funcs_dce120 +ffffffff82d29008 r dummy_irq_info_funcs +ffffffff82d29018 r hpd_irq_info_funcs +ffffffff82d29028 r hpd_rx_irq_info_funcs +ffffffff82d29038 r pflip_irq_info_funcs +ffffffff82d29048 r vupdate_irq_info_funcs +ffffffff82d29058 r vblank_irq_info_funcs +ffffffff82d29070 r irq_source_info_dce120 +ffffffff82d2b000 r irq_service_funcs_dce80 +ffffffff82d2b008 r dummy_irq_info_funcs +ffffffff82d2b018 r hpd_irq_info_funcs +ffffffff82d2b028 r hpd_rx_irq_info_funcs +ffffffff82d2b038 r pflip_irq_info_funcs +ffffffff82d2b048 r vupdate_irq_info_funcs +ffffffff82d2b058 r vblank_irq_info_funcs +ffffffff82d2b070 r irq_source_info_dce80 +ffffffff82d2d000 r irq_service_funcs_dcn10 +ffffffff82d2d008 r dummy_irq_info_funcs +ffffffff82d2d018 r hpd_irq_info_funcs +ffffffff82d2d028 r hpd_rx_irq_info_funcs +ffffffff82d2d038 r pflip_irq_info_funcs +ffffffff82d2d048 r vupdate_no_lock_irq_info_funcs +ffffffff82d2d058 r vblank_irq_info_funcs +ffffffff82d2d068 r vline0_irq_info_funcs +ffffffff82d2d080 r irq_source_info_dcn10 +ffffffff82d2f000 r irq_service_funcs_dcn20 +ffffffff82d2f008 r dummy_irq_info_funcs +ffffffff82d2f018 r hpd_irq_info_funcs +ffffffff82d2f028 r hpd_rx_irq_info_funcs +ffffffff82d2f038 r pflip_irq_info_funcs +ffffffff82d2f048 r vupdate_no_lock_irq_info_funcs +ffffffff82d2f058 r vblank_irq_info_funcs +ffffffff82d2f068 r vline0_irq_info_funcs +ffffffff82d2f080 r irq_source_info_dcn20 +ffffffff82d31000 r irq_service_funcs_dcn201 +ffffffff82d31008 r dummy_irq_info_funcs +ffffffff82d31018 r hpd_irq_info_funcs +ffffffff82d31028 r hpd_rx_irq_info_funcs +ffffffff82d31038 r pflip_irq_info_funcs +ffffffff82d31048 r vupdate_no_lock_irq_info_funcs +ffffffff82d31058 r vblank_irq_info_funcs +ffffffff82d31068 r vline0_irq_info_funcs +ffffffff82d31080 r irq_source_info_dcn201 +ffffffff82d33000 r irq_source_info_dcn21 +ffffffff82d34290 r irq_service_funcs_dcn21 +ffffffff82d34298 r dummy_irq_info_funcs +ffffffff82d342a8 r hpd_irq_info_funcs +ffffffff82d342b8 r hpd_rx_irq_info_funcs +ffffffff82d342c8 r pflip_irq_info_funcs +ffffffff82d342d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d342e8 r vblank_irq_info_funcs +ffffffff82d342f8 r vline0_irq_info_funcs +ffffffff82d34308 r dmub_outbox_irq_info_funcs +ffffffff82d35000 r irq_source_info_dcn30 +ffffffff82d36290 r irq_service_funcs_dcn30 +ffffffff82d36298 r dummy_irq_info_funcs +ffffffff82d362a8 r hpd_irq_info_funcs +ffffffff82d362b8 r hpd_rx_irq_info_funcs +ffffffff82d362c8 r pflip_irq_info_funcs +ffffffff82d362d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d362e8 r vblank_irq_info_funcs +ffffffff82d362f8 r vline0_irq_info_funcs +ffffffff82d36308 r dmub_trace_irq_info_funcs +ffffffff82d37000 r irq_source_info_dcn302 +ffffffff82d38290 r irq_service_funcs_dcn302 +ffffffff82d38298 r dummy_irq_info_funcs +ffffffff82d382a8 r hpd_irq_info_funcs +ffffffff82d382b8 r hpd_rx_irq_info_funcs +ffffffff82d382c8 r pflip_irq_info_funcs +ffffffff82d382d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d382e8 r vblank_irq_info_funcs +ffffffff82d382f8 r vline0_irq_info_funcs +ffffffff82d38308 r dmub_trace_irq_info_funcs +ffffffff82d39000 r irq_service_funcs_dcn303 +ffffffff82d39008 r dummy_irq_info_funcs +ffffffff82d39018 r hpd_irq_info_funcs +ffffffff82d39028 r hpd_rx_irq_info_funcs +ffffffff82d39038 r pflip_irq_info_funcs +ffffffff82d39048 r vupdate_no_lock_irq_info_funcs +ffffffff82d39058 r vblank_irq_info_funcs +ffffffff82d39068 r vline0_irq_info_funcs +ffffffff82d39080 r irq_source_info_dcn303 +ffffffff82d3b000 r irq_source_info_dcn31 +ffffffff82d3c290 r irq_service_funcs_dcn31 +ffffffff82d3c298 r dummy_irq_info_funcs +ffffffff82d3c2a8 r hpd_irq_info_funcs +ffffffff82d3c2b8 r hpd_rx_irq_info_funcs +ffffffff82d3c2c8 r pflip_irq_info_funcs +ffffffff82d3c2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d3c2e8 r vblank_irq_info_funcs +ffffffff82d3c2f8 r vline0_irq_info_funcs +ffffffff82d3c308 r outbox_irq_info_funcs +ffffffff82d3d000 r irq_source_info_dcn314 +ffffffff82d3e290 r irq_service_funcs_dcn314 +ffffffff82d3e298 r dummy_irq_info_funcs +ffffffff82d3e2a8 r hpd_irq_info_funcs +ffffffff82d3e2b8 r hpd_rx_irq_info_funcs +ffffffff82d3e2c8 r pflip_irq_info_funcs +ffffffff82d3e2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d3e2e8 r vblank_irq_info_funcs +ffffffff82d3e2f8 r vline0_irq_info_funcs +ffffffff82d3e308 r outbox_irq_info_funcs +ffffffff82d3f000 r irq_source_info_dcn315 +ffffffff82d40290 r irq_service_funcs_dcn315 +ffffffff82d40298 r dummy_irq_info_funcs +ffffffff82d402a8 r hpd_irq_info_funcs +ffffffff82d402b8 r hpd_rx_irq_info_funcs +ffffffff82d402c8 r pflip_irq_info_funcs +ffffffff82d402d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d402e8 r vblank_irq_info_funcs +ffffffff82d402f8 r vline0_irq_info_funcs +ffffffff82d40308 r outbox_irq_info_funcs +ffffffff82d41000 r irq_source_info_dcn32 +ffffffff82d42290 r irq_service_funcs_dcn32 +ffffffff82d42298 r dummy_irq_info_funcs +ffffffff82d422a8 r hpd_irq_info_funcs +ffffffff82d422b8 r hpd_rx_irq_info_funcs +ffffffff82d422c8 r pflip_irq_info_funcs +ffffffff82d422d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d422e8 r vblank_irq_info_funcs +ffffffff82d422f8 r vline0_irq_info_funcs +ffffffff82d42308 r outbox_irq_info_funcs +ffffffff82d44000 r dio_link_hwss +ffffffff82d45000 r dio_fixed_vs_pe_retimer_link_hwss +ffffffff82d46000 r dpia_link_hwss +ffffffff82d47000 r hpo_dp_link_hwss +ffffffff82d48000 r hpo_fixed_vs_pe_retimer_dp_link_hwss +ffffffff82d49000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82d4a000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82d4a006 r DP_DVI_CONVERTER_ID_4 +ffffffff82d4a00d r DP_DVI_CONVERTER_ID_5 +ffffffff82d4b000 r dp_lt_fallbacks +ffffffff82d4f000 r mandatory_dpcd_partitions +ffffffff82d50000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82d50007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82d51000 r virtual_lnk_enc_funcs +ffffffff82d52000 r virtual_link_hwss +ffffffff82d53000 r virtual_str_enc_funcs +ffffffff82d54000 R dmub_srv_dcn20_regs +ffffffff82d55000 R dmub_srv_dcn21_regs +ffffffff82d56000 R dmub_srv_dcn30_regs +ffffffff82d57000 R dmub_srv_dcn301_regs +ffffffff82d58000 R dmub_srv_dcn302_regs +ffffffff82d59000 R dmub_srv_dcn303_regs +ffffffff82d5a000 R dmub_srv_dcn31_regs +ffffffff82d5b000 R dmub_srv_dcn314_regs +ffffffff82d5c000 R dmub_srv_dcn315_regs +ffffffff82d5d000 R dmub_srv_dcn316_regs +ffffffff82d5e000 R dmub_srv_dcn32_regs +ffffffff82d5f000 r numerator01 +ffffffff82d5f020 r numerator02 +ffffffff82d5f040 r numerator04 +ffffffff82d5f060 r numerator05 +ffffffff82d63000 r abm_settings +ffffffff82d63020 r abm_settings_config0 +ffffffff82d63060 r abm_settings_config1 +ffffffff82d630a0 r abm_settings_config2 +ffffffff82d630d8 r min_reduction_table_v_2_2 +ffffffff82d630e5 r max_reduction_table_v_2_2 +ffffffff82d630f2 r min_reduction_table +ffffffff82d630ff r max_reduction_table +ffffffff82d63110 r custom_backlight_curve0 +ffffffff82d64000 R amdgpu_pp_profile_name +ffffffff82d65000 r pp_lib_thermal_controller_names +ffffffff82d66000 r pp_ip_funcs +ffffffff82d660a0 R pp_smu_ip_block +ffffffff82d660b8 r pp_dpm_funcs +ffffffff82d67000 r gpio_tbl +ffffffff82d670f0 r enable_fb_req_rej_tbl +ffffffff82d67140 r use_bclk_tbl +ffffffff82d67310 r turn_off_plls_tbl +ffffffff82d67640 r enter_baco_tbl +ffffffff82d67730 r exit_baco_tbl +ffffffff82d67850 r clean_baco_tbl ffffffff82d68000 r gpio_tbl ffffffff82d680f0 r enable_fb_req_rej_tbl ffffffff82d68140 r use_bclk_tbl -ffffffff82d68310 r turn_off_plls_tbl -ffffffff82d68640 r enter_baco_tbl -ffffffff82d68730 r exit_baco_tbl -ffffffff82d68850 r clean_baco_tbl +ffffffff82d682e0 r turn_off_plls_tbl +ffffffff82d68370 r clk_req_b_tbl +ffffffff82d68490 r enter_baco_tbl +ffffffff82d685b0 r exit_baco_tbl +ffffffff82d686d0 r clean_baco_tbl ffffffff82d69000 r gpio_tbl ffffffff82d690f0 r enable_fb_req_rej_tbl -ffffffff82d69140 r use_bclk_tbl -ffffffff82d692e0 r turn_off_plls_tbl -ffffffff82d69370 r clk_req_b_tbl -ffffffff82d69490 r enter_baco_tbl -ffffffff82d695b0 r exit_baco_tbl -ffffffff82d696d0 r clean_baco_tbl -ffffffff82d6a000 r gpio_tbl -ffffffff82d6a0f0 r enable_fb_req_rej_tbl -ffffffff82d6a140 r use_bclk_tbl_vg -ffffffff82d6a200 r turn_off_plls_tbl_vg -ffffffff82d6a350 r use_bclk_tbl -ffffffff82d6a440 r turn_off_plls_tbl -ffffffff82d6a5f0 r clk_req_b_tbl -ffffffff82d6a710 r enter_baco_tbl -ffffffff82d6a830 r exit_baco_tbl -ffffffff82d6a950 r clean_baco_tbl -ffffffff82d6b000 r vega10_fuses_default -ffffffff82d7a000 r pp_r600_encode_lanes -ffffffff82d7b000 R pptable_v1_0_funcs -ffffffff82d7c000 R pptable_funcs -ffffffff82d7c020 r soft_dummy_pp_table -ffffffff82d7d000 r smu10_hwmgr_funcs -ffffffff82d7e000 r smu7_hwmgr_funcs -ffffffff82d7e2f8 r smu7_irq_funcs -ffffffff82d7e310 r SMU7ThermalPolicy -ffffffff82d7f000 r GCCACConfig_Polaris10 -ffffffff82d7f1b0 r DIDTConfig_Polaris10 -ffffffff82d7fa50 r GCCACConfig_Polaris11 -ffffffff82d7fc00 r DIDTConfig_Polaris11_Kicker -ffffffff82d804a0 r DIDTConfig_Polaris11 -ffffffff82d80d40 r DIDTConfig_Polaris12 -ffffffff82d815e0 r GCCACConfig_VegaM -ffffffff82d81790 r DIDTConfig_VegaM -ffffffff82d83000 r smu8_hwmgr_funcs -ffffffff82d832f0 r SMU7ThermalPolicy -ffffffff82d84000 r smu9_irq_funcs -ffffffff82d85000 r gpio_tbl_iceland -ffffffff82d85060 r gpio_tbl -ffffffff82d85150 r enable_fb_req_rej_tbl -ffffffff82d851a0 r use_bclk_tbl -ffffffff82d85370 r turn_off_plls_tbl -ffffffff82d85610 r enter_baco_tbl -ffffffff82d85730 r exit_baco_tbl_iceland -ffffffff82d85870 r clean_baco_tbl_iceland -ffffffff82d85890 r exit_baco_tbl -ffffffff82d859b0 r clean_baco_tbl -ffffffff82d86000 r pre_baco_tbl -ffffffff82d86090 r enter_baco_tbl -ffffffff82d862b0 r exit_baco_tbl -ffffffff82d86520 r clean_baco_tbl -ffffffff82d87000 r vega10_hwmgr_funcs -ffffffff82d872f0 r channel_number -ffffffff82d87320 r SMU7ThermalWithDelayPolicy -ffffffff82d88000 r SEDiDtStallCtrlConfig_vega10 -ffffffff82d88110 r SEDiDtStallPatternConfig_vega10 -ffffffff82d882e0 r SEDiDtWeightConfig_Vega10 -ffffffff82d883b0 r SEDiDtCtrl1Config_Vega10 -ffffffff82d88440 r SEDiDtCtrl2Config_Vega10 -ffffffff82d88510 r SEDiDtCtrl3Config_vega10 -ffffffff82d88820 r SEDiDtTuningCtrlConfig_Vega10 -ffffffff82d888b0 r SELCacConfig_Vega10 -ffffffff82d88a40 r SEDiDtCtrl0Config_Vega10 -ffffffff82d88d10 r AvfsPSMInitConfig_vega10 -ffffffff82d88d90 r SEEDCStallPatternConfig_Vega10 -ffffffff82d88ea0 r SEEDCStallDelayConfig_Vega10 -ffffffff82d88f80 r SEEDCCtrlConfig_Vega10 -ffffffff82d89040 r PSMSEEDCStallPatternConfig_Vega10 -ffffffff82d890c0 r PSMSEEDCStallDelayConfig_Vega10 -ffffffff82d891d0 r PSMSEEDCCtrlResetConfig_Vega10 -ffffffff82d89290 r PSMSEEDCCtrlConfig_Vega10 -ffffffff82d89350 r SEEDCForceStallPatternConfig_Vega10 -ffffffff82d893e0 r SEEDCCtrlForceStallConfig_Vega10 -ffffffff82d8a000 R vega10_pptable_funcs -ffffffff82d8b000 r pre_baco_tbl -ffffffff82d8b090 r enter_baco_tbl -ffffffff82d8b2b0 r exit_baco_tbl -ffffffff82d8b520 r clean_baco_tbl -ffffffff82d8c000 r vega12_hwmgr_funcs -ffffffff82d8c2f0 r SMU7ThermalWithDelayPolicy -ffffffff82d8c340 r link_width -ffffffff82d8d000 R vega12_pptable_funcs -ffffffff82d8e000 r clean_baco_tbl -ffffffff82d8f000 r vega20_hwmgr_funcs -ffffffff82d8f2f0 r SMU7ThermalWithDelayPolicy -ffffffff82d8f340 r link_width -ffffffff82d90000 R vega20_pptable_funcs -ffffffff82d91000 R ci_smu_funcs -ffffffff82d910e0 r defaults_hawaii_pro -ffffffff82d9112c r defaults_hawaii_xt -ffffffff82d91178 r defaults_saturn_xt -ffffffff82d911c4 r defaults_bonaire_xt -ffffffff82d91210 r ci_program_jump_on_start.data -ffffffff82d92000 R fiji_smu_funcs -ffffffff82d920e0 r avfs_graphics_level -ffffffff82d92240 r fiji_power_tune_data_set_array -ffffffff82d92246 r fiji_clock_stretch_amount_conversion -ffffffff82d92260 r fiji_clock_stretcher_ddt_table -ffffffff82d93000 R iceland_smu_funcs -ffffffff82d930e0 r defaults_icelandxt -ffffffff82d9312c r defaults_icelandpro -ffffffff82d93178 r defaults_iceland -ffffffff82d94000 R polaris10_smu_funcs -ffffffff82d940e0 r avfs_graphics_level_polaris10 -ffffffff82d942a0 r avfs_memory_level_polaris10 -ffffffff82d942c0 r polaris10_power_tune_data_set_array -ffffffff82d94310 r Range_Table -ffffffff82d95000 R smu10_smu_funcs -ffffffff82d96000 r smu7_program_jump_on_start.data -ffffffff82d96010 r pwr_virus_table_pre -ffffffff82d96680 r pwr_virus_table_post -ffffffff82d96f80 r pwr_virus_section1 -ffffffff82d97610 r pwr_virus_section2 -ffffffff82d97660 r pwr_virus_section3 -ffffffff82d9eab0 r pwr_virus_section4 -ffffffff82d9ee80 r pwr_virus_section5 -ffffffff82d9f490 r pwr_virus_section6 -ffffffff82da1000 R smu8_smu_funcs -ffffffff82da2000 R tonga_smu_funcs -ffffffff82da20e0 r tonga_power_tune_data_set_array -ffffffff82da212c r tonga_clock_stretch_amount_conversion -ffffffff82da2140 r tonga_clock_stretcher_ddt_table -ffffffff82da3000 R vega10_smu_funcs -ffffffff82da4000 R vega12_smu_funcs -ffffffff82da5000 R vega20_smu_funcs -ffffffff82da6000 R vegam_smu_funcs -ffffffff82da60e0 r vegam_power_tune_data_set_array -ffffffff82da6130 r Range_Table -ffffffff82da7000 R smu_ip_funcs -ffffffff82da70a0 R smu_v11_0_ip_block -ffffffff82da70b8 R smu_v12_0_ip_block -ffffffff82da70d0 R smu_v13_0_ip_block -ffffffff82da70e8 r swsmu_pm_funcs -ffffffff82da8000 r arcturus_ppt_funcs -ffffffff82da83f0 r arcturus_table_map -ffffffff82da8470 r arcturus_pwr_src_map -ffffffff82da8480 r arcturus_workload_map -ffffffff82da84d0 r smu11_thermal_policy -ffffffff82da8528 r arcturus_i2c_algo -ffffffff82da8538 r arcturus_i2c_control_quirks -ffffffff82da8550 r arcturus_throttler_map -ffffffff82da8570 r arcturus_message_map -ffffffff82da8ff0 r arcturus_clk_map -ffffffff82da90b0 r arcturus_feature_mask_map -ffffffff82daa000 r cyan_skillfish_ppt_funcs -ffffffff82dab000 r navi10_ppt_funcs -ffffffff82dab3f0 r smu11_thermal_policy -ffffffff82dab448 r navi10_i2c_algo -ffffffff82dab458 r navi10_i2c_control_quirks -ffffffff82dab470 r navi1x_throttler_map -ffffffff82dab490 r NoDbiPrbs7 -ffffffff82dac490 r DbiPrbs7 -ffffffff82dae000 r sienna_cichlid_ppt_funcs -ffffffff82dae3f0 r smu11_thermal_policy -ffffffff82dae448 r sienna_cichlid_i2c_algo -ffffffff82dae458 r sienna_cichlid_i2c_control_quirks -ffffffff82dae470 r sienna_cichlid_throttler_map -ffffffff82daf000 r smu_v11_0_irq_funcs -ffffffff82daf010 r link_width -ffffffff82db0000 r vangogh_ppt_funcs -ffffffff82db03e8 r vangogh_throttler_map -ffffffff82db1000 r renoir_ppt_funcs -ffffffff82db13e8 r renoir_throttler_map -ffffffff82db2000 r aldebaran_ppt_funcs -ffffffff82db23f0 r aldebaran_clk_map -ffffffff82db24b0 r aldebaran_table_map -ffffffff82db2530 r smu13_thermal_policy -ffffffff82db2588 r aldebaran_i2c_algo -ffffffff82db2598 r aldebaran_i2c_control_quirks -ffffffff82db25b0 r aldebaran_throttler_map -ffffffff82db25d0 r aldebaran_message_map -ffffffff82db3050 r aldebaran_feature_mask_map -ffffffff82db4000 R pmfw_decoded_link_speed -ffffffff82db4020 R pmfw_decoded_link_width -ffffffff82db4040 r smu_v13_0_irq_funcs -ffffffff82db5000 r smu_v13_0_0_ppt_funcs -ffffffff82db53f0 r smu13_thermal_policy -ffffffff82db5448 r smu_v13_0_0_i2c_algo -ffffffff82db5458 r smu_v13_0_0_i2c_control_quirks -ffffffff82db5470 r smu_v13_0_0_throttler_map -ffffffff82db6000 r smu_v13_0_4_ppt_funcs -ffffffff82db7000 r smu_v13_0_5_ppt_funcs -ffffffff82db8000 r smu_v13_0_6_ppt_funcs -ffffffff82db83f0 r smu_v13_0_6_message_map -ffffffff82db8e70 r smu_v13_0_6_clk_map -ffffffff82db8f30 r smu_v13_0_6_table_map -ffffffff82db8fb0 r smu_v13_0_6_i2c_algo -ffffffff82db8fc0 r smu_v13_0_6_i2c_control_quirks -ffffffff82db8fd0 r smu_v13_0_6_irq_funcs -ffffffff82db8fe0 r smu_v13_0_6_throttler_map -ffffffff82db8ff0 r smu_v13_0_6_feature_mask_map -ffffffff82dba000 r smu_v13_0_7_ppt_funcs -ffffffff82dba3f0 r smu13_thermal_policy -ffffffff82dba450 r smu_v13_0_7_throttler_map -ffffffff82dbb000 r yellow_carp_ppt_funcs -ffffffff82dbc000 R link_speed -ffffffff82dbc020 r __smu_message_names -ffffffff82dbd000 R pchb_ca -ffffffff82dbe000 R amas_ca -ffffffff82dbe028 R amas_devices -ffffffff82dbe040 r amas_feature -ffffffff82dbf000 R cardslot_ca -ffffffff82dc0000 R cardbus_ca -ffffffff82dc1000 R com_cardbus_ca -ffffffff82dc2000 R xl_cardbus_ca -ffffffff82dc2030 R xl_cardbus_products -ffffffff82dc3000 R dc_cardbus_ca -ffffffff82dc3030 R dc_cardbus_devices -ffffffff82dc4000 R fxp_cardbus_ca -ffffffff82dc4028 R fxp_cardbus_devices -ffffffff82dc5000 R rl_cardbus_devices -ffffffff82dc5028 R rl_cardbus_ca -ffffffff82dc6000 R re_cardbus_ca -ffffffff82dc6028 R re_cardbus_devices -ffffffff82dc7000 R ath_cardbus_ca -ffffffff82dc8000 R athn_cardbus_ca -ffffffff82dc8030 r athn_cardbus_devices -ffffffff82dc9000 R atw_cardbus_ca -ffffffff82dc9028 R atw_cardbus_devices -ffffffff82dca000 R rtw_cardbus_ca -ffffffff82dca028 R rtw_cardbus_devices -ffffffff82dcb000 R ral_cardbus_ca -ffffffff82dcb030 r ral_cardbus_devices -ffffffff82dcc000 R acx_cardbus_ca -ffffffff82dcc028 r acx_cardbus_devices -ffffffff82dcd000 R pgt_cardbus_ca -ffffffff82dcd028 R pgt_cardbus_devices -ffffffff82dce000 R ehci_cardbus_ca -ffffffff82dcf000 R ohci_cardbus_ca -ffffffff82dd0000 R uhci_cardbus_ca -ffffffff82dd1000 R malo_cardbus_ca -ffffffff82dd1028 r malo_cardbus_devices -ffffffff82dd2000 R bwi_cardbus_ca -ffffffff82dd2030 r bwi_cardbus_devices -ffffffff82dd3000 R pcmcia_ca -ffffffff82dd4000 r pcmcia_parse_cis_tuple.init_cfe -ffffffff82dd5000 r pcmcia_cis_quirks -ffffffff82dd6000 R ep_pcmcia_ca -ffffffff82dd7000 R ne_pcmcia_ca -ffffffff82dd7030 R ne2000devs -ffffffff82dd9000 R aic_pcmcia_ca -ffffffff82dda000 R com_pcmcia_ca -ffffffff82ddb000 R wdc_pcmcia_ca -ffffffff82ddc000 R sm_pcmcia_ca -ffffffff82ddd000 R xe_pcmcia_ca -ffffffff82dde000 R wi_pcmcia_ca -ffffffff82dde030 r wi_pcmcia_products -ffffffff82ddf000 R malo_pcmcia_ca -ffffffff82de0000 R an_pcmcia_ca -ffffffff82de1000 R pcib_ca -ffffffff82de2000 R amdpcib_ca -ffffffff82de2028 R amdpcib_devices -ffffffff82de3000 R tcpcib_ca -ffffffff82de3028 R tcpcib_devices -ffffffff82de4000 R aapic_ca -ffffffff82de5000 R hme_pci_ca -ffffffff82de5028 r hme_promhdr -ffffffff82de502a r hme_promdat -ffffffff82de6000 R isa_ca -ffffffff82de7000 R isadma_ca -ffffffff82de8000 R fdc_ca -ffffffff82de9000 R fd_ca -ffffffff82dea000 R com_isa_ca -ffffffff82deb000 R pckbc_isa_ca -ffffffff82dec000 R vga_isa_ca -ffffffff82ded000 R wdc_isa_ca -ffffffff82dee000 R mpu_midi_hw_if -ffffffff82def000 R mpu_isa_ca -ffffffff82df0000 R pcppi_ca -ffffffff82df1000 R spkr_ca -ffffffff82df1030 r pitchtab -ffffffff82df2000 R lpt_isa_ca -ffffffff82df3000 R wbsio_ca -ffffffff82df4000 R schsio_ca -ffffffff82df5000 R lm_isa_ca -ffffffff82df5028 R lm_wbsio_ca -ffffffff82df6000 R it_sensors -ffffffff82df6110 R it_vrfact -ffffffff82df6140 R it_fan_regs -ffffffff82df6160 R it_fan_ext_regs -ffffffff82df6178 R it_ca -ffffffff82df7000 R abitkv_sensors -ffffffff82df7200 R abitaa_sensors -ffffffff82df7480 R abitav_sensors -ffffffff82df7700 R abitas_sensors -ffffffff82df7980 R abitax_sensors -ffffffff82df7bc0 R abitm4_sensors -ffffffff82df7e80 R abitan_sensors -ffffffff82df8120 R abital_sensors -ffffffff82df83a0 R abitaw_sensors -ffffffff82df8700 R abitni_sensors -ffffffff82df89a0 R abitat_sensors -ffffffff82df8cc0 R abitan2_sensors -ffffffff82df8f60 R abitab_sensors -ffffffff82df9220 R abitan3_sensors -ffffffff82df9500 R abitaw2_sensors -ffffffff82df9860 R abitat2_sensors -ffffffff82df9b60 R abitab2_sensors -ffffffff82df9ea0 R abitin_sensors -ffffffff82dfa1e0 R uguru_ca -ffffffff82dfb000 R aps_ca -ffffffff82dfc000 R wsdisplay_emul_ca -ffffffff82dfc030 r charClass -ffffffff82dfd000 r usl_syncops -ffffffff82dfe000 R wsevent_filtops -ffffffff82dff000 R wskbd_ca -ffffffff82e00000 r latin1_to_upper -ffffffff82e01000 R wsmouse_ca -ffffffff82e02000 R cyrillic_to_koi8 -ffffffff82e02060 R unicode_to_latin2 -ffffffff82e020e0 R unicode_to_latin7 -ffffffff82e03000 R wsemul_vt100_ops -ffffffff82e04000 r decspcgr2uni -ffffffff82e04100 r dectech2uni -ffffffff82e04200 r nrctable -ffffffff82e05000 r vt100_fkeys -ffffffff82e050c0 r vt100_pfkeys -ffffffff82e050e0 r vt100_numpad -ffffffff82e06000 R pckbd_ca -ffffffff82e06028 R pckbd_accessops -ffffffff82e06040 R pckbd_consops -ffffffff82e06060 R pckbd_keymapdata -ffffffff82e06070 R pckbd_xtbl2 -ffffffff82e06100 R pckbd_xtbl2_ext -ffffffff82e07000 r pckbd_keydesc_us -ffffffff82e07250 r pckbd_keydesc_de -ffffffff82e072f0 r pckbd_keydesc_de_nodead -ffffffff82e07310 r pckbd_keydesc_fr -ffffffff82e073d0 r pckbd_keydesc_fr_dvorak_bepo -ffffffff82e07510 r pckbd_keydesc_dk -ffffffff82e075a0 r pckbd_keydesc_dk_nodead -ffffffff82e075b0 r pckbd_keydesc_it -ffffffff82e07640 r pckbd_keydesc_uk -ffffffff82e076e0 r pckbd_keydesc_jp -ffffffff82e07750 r pckbd_keydesc_sv -ffffffff82e07780 r pckbd_keydesc_sv_nodead -ffffffff82e07790 r pckbd_keydesc_no -ffffffff82e077c0 r pckbd_keydesc_no_nodead -ffffffff82e077d0 r pckbd_keydesc_us_declk -ffffffff82e07860 r pckbd_keydesc_us_dvorak -ffffffff82e07900 r pckbd_keydesc_us_colemak -ffffffff82e07948 r pckbd_keydesc_swapctrlcaps -ffffffff82e07960 r pckbd_keydesc_iopener -ffffffff82e079b0 r pckbd_keydesc_es -ffffffff82e07a50 r pckbd_keydesc_be -ffffffff82e07b10 r pckbd_keydesc_ru -ffffffff82e07c80 r pckbd_keydesc_ua -ffffffff82e07e10 r pckbd_keydesc_sg -ffffffff82e07ec0 r pckbd_keydesc_sg_nodead -ffffffff82e07ee0 r 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-ffffffff8323d078 D vfs_stall_lock -ffffffff8323d090 D vtypes -ffffffff8323d0e0 D vtags -ffffffff8323e000 D syncer_maxdelay -ffffffff8323e004 D syncdelay -ffffffff8323f000 D dosdirtemplate -ffffffff83240000 D ntfs_hashlock -ffffffff83241000 D ntfs_toupper_lock -ffffffff83242000 D art_table_gc_mtx -ffffffff83242010 D art_table_gc_task -ffffffff83242040 D art_node_gc_mtx -ffffffff83242050 D art_node_gc_task -ffffffff83243000 D bpf_bufsize -ffffffff83243004 D bpf_maxbufsize -ffffffff83243008 D bpf_sysctl_lk -ffffffff83244000 D ifg_head -ffffffff83244010 D if_cloners_lock -ffffffff83244020 D if_input_task_locked -ffffffff83244050 D netlock -ffffffff83244060 D ifnetlist -ffffffff83245000 D ifiq_maxlen_drop -ffffffff83245004 D ifiq_maxlen_return -ffffffff83246000 D etherbroadcastaddr -ffffffff83246006 D ether_ipmulticast_min -ffffffff8324600c D ether_ipmulticast_max -ffffffff83246012 D ether_ip6multicast_min -ffffffff83246018 D ether_ip6multicast_max -ffffffff83247000 D etherip_cloner -ffffffff83247030 D etherip_list -ffffffff83248000 D loop_cloner -ffffffff83249000 D ifmedia_mtx -ffffffff8324a000 D ppp_compressors -ffffffff8324a020 D ppp_cloner -ffffffff8324b000 D ppp_pkt_init -ffffffff8324c000 D ppp_bsd_compress -ffffffff8324d000 D ppp_deflate -ffffffff8324d070 D ppp_deflate_draft -ffffffff8324e000 D tun_cloner -ffffffff8324e030 D tap_cloner -ffffffff8324f000 D bridgeintrq -ffffffff8324f038 D bridge_cloner -ffffffff83250000 d veb_cloner -ffffffff83250030 d vport_cloner -ffffffff83251000 D vlan_tagh_lk -ffffffff83251010 D vlan_cloner -ffffffff83251040 D svlan_cloner -ffffffff83252000 D pipex_list_mtx -ffffffff83252010 D pipex_prune -ffffffff83252018 D pipexoutq -ffffffff83252050 d SHAPad2 -ffffffff83253000 D rtmap_gc -ffffffff83253018 D rt_rc -ffffffff83254000 D rt_labels -ffffffff83254010 D rtlabel_mtx -ffffffff83255000 D enc_cloner -ffffffff83256000 D gre_cloner -ffffffff83256030 D gre_list -ffffffff83256040 D mgre_cloner -ffffffff83256070 D egre_cloner -ffffffff832560a0 D nvgre_cloner -ffffffff832560d0 D eoip_cloner -ffffffff83257000 D trunk_cloner -ffffffff83258000 d aggr_cloner -ffffffff83259000 d tpmr_cloner -ffffffff8325a000 D mpe_cloner -ffffffff8325b000 D mpw_cloner -ffffffff8325c000 D mpip_cloner -ffffffff8325d000 d bpe_cloner -ffffffff8325d030 d bpe_lock -ffffffff8325e000 D vether_cloner -ffffffff8325f000 D pair_cloner -ffffffff83260000 d vxlan_cloner -ffffffff83260030 d vxlan_lock -ffffffff83260040 d vxlan_teps -ffffffff83261000 D underload_interval -ffffffff83261010 D wg_cloner -ffffffff83262000 d stoeplitz_keyseed -ffffffff83263000 D ieee80211_cache_size -ffffffff83264000 D arpt_prune -ffffffff83264004 D arpt_keep -ffffffff83264008 D arpt_down -ffffffff83264010 D arpinq -ffffffff83264048 D arp_mtx -ffffffff83264058 D arp_maxtries -ffffffff83265000 D ipport_firstauto -ffffffff83265004 D ipport_lastauto -ffffffff83265008 D ipport_hifirstauto -ffffffff8326500c D ipport_hilastauto -ffffffff83266000 D divert_sendspace -ffffffff83266004 D divert_recvspace -ffffffff83266008 D divbhashsize -ffffffff83267000 D icmptstamprepl -ffffffff83267004 D icmperrppslim -ffffffff83267008 D icmp_redirtimeout -ffffffff83268000 D ipsendredirects -ffffffff83268004 D ip_defttl -ffffffff83268008 D ip_mtudisc -ffffffff8326800c D ip_mtudisc_timeout -ffffffff83268010 D ipq_mutex -ffffffff83268020 D ip_maxqueue -ffffffff83268028 D ipintrq -ffffffff83268060 d ipsend_task -ffffffff83268090 d ipsendraw_task -ffffffff83269000 D ip_mrtproto -ffffffff83269004 d sin -ffffffff8326a000 D rip_sendspace -ffffffff8326a008 D rip_recvspace -ffffffff8326b000 D tcprexmtthresh -ffffffff8326b004 D tcptv_keep_init -ffffffff8326b008 D tcp_rst_ppslim -ffffffff8326b00c D tcp_ackdrop_ppslim -ffffffff8326b010 D tcp_syn_hash_size -ffffffff8326b014 D tcp_syn_cache_limit -ffffffff8326b018 D tcp_syn_bucket_limit -ffffffff8326b01c D tcp_syn_use_limit -ffffffff8326b020 D syn_cache_mtx -ffffffff8326c000 D tcp_outflags -ffffffff8326d000 D tcp_timer_mtx -ffffffff8326d010 D tcp_mssdflt -ffffffff8326d014 D tcp_rttdflt -ffffffff8326d018 D tcp_do_rfc1323 -ffffffff8326d01c D tcp_do_sack -ffffffff8326d020 D tcp_do_rfc3390 -ffffffff8326d024 D tcp_do_tso -ffffffff8326d028 D tcp_reass_limit -ffffffff8326d02c D tcp_sackhole_limit -ffffffff8326e000 D tcp_backoff -ffffffff8326e034 D tcp_totbackoff -ffffffff8326f000 D tcp_sendspace -ffffffff8326f004 D tcp_recvspace -ffffffff8326f008 D tcp_autorcvbuf_inc -ffffffff83270000 D udpcksum -ffffffff83270004 D udp_sendspace -ffffffff83270008 D udp_recvspace -ffffffff83271000 D ipsec_flows_mtx -ffffffff83271010 D ipsec_ids_idle -ffffffff83271014 D ipsec_ids_next_flow -ffffffff83271018 D ipsec_policy_head -ffffffff83271028 D ipsp_ids_gc_timeout -ffffffff83271070 D tdb_sadb_mtx -ffffffff83271080 d tdb_hashmask -ffffffff83272000 D ipo_tdb_mtx -ffffffff83272010 D ipsec_acquire_mtx -ffffffff83272020 D ipsec_acquire_head -ffffffff83273000 D ipsec_keep_invalid -ffffffff83273004 D ipsec_require_pfs -ffffffff83273008 D ipsec_soft_timeout -ffffffff8327300c D ipsec_exp_timeout -ffffffff83273010 D ipsec_soft_first_use -ffffffff83273014 D ipsec_exp_first_use -ffffffff83273018 D ipsec_expire_acquire -ffffffff8327301c D esp_enable -ffffffff83273020 D ah_enable -ffffffff83274000 D udpencap_enable -ffffffff83274004 D udpencap_port -ffffffff83275000 D carp_vh_rc -ffffffff83275020 D carp_sc_rc -ffffffff83275040 D carp_opts -ffffffff83275058 D carp_cloner -ffffffff83275088 d carp_send_na.mcast +ffffffff82d69140 r use_bclk_tbl_vg +ffffffff82d69200 r turn_off_plls_tbl_vg +ffffffff82d69350 r use_bclk_tbl +ffffffff82d69440 r turn_off_plls_tbl +ffffffff82d695f0 r clk_req_b_tbl +ffffffff82d69710 r enter_baco_tbl +ffffffff82d69830 r exit_baco_tbl +ffffffff82d69950 r clean_baco_tbl +ffffffff82d6a000 r vega10_fuses_default +ffffffff82d79000 r pp_r600_encode_lanes +ffffffff82d7a000 R pptable_v1_0_funcs +ffffffff82d7b000 R pptable_funcs +ffffffff82d7b020 r soft_dummy_pp_table +ffffffff82d7c000 r smu10_hwmgr_funcs +ffffffff82d7d000 r smu7_hwmgr_funcs +ffffffff82d7d2f8 r smu7_irq_funcs +ffffffff82d7d310 r SMU7ThermalPolicy +ffffffff82d7e000 r GCCACConfig_Polaris10 +ffffffff82d7e1b0 r DIDTConfig_Polaris10 +ffffffff82d7ea50 r GCCACConfig_Polaris11 +ffffffff82d7ec00 r DIDTConfig_Polaris11_Kicker +ffffffff82d7f4a0 r DIDTConfig_Polaris11 +ffffffff82d7fd40 r DIDTConfig_Polaris12 +ffffffff82d805e0 r GCCACConfig_VegaM +ffffffff82d80790 r DIDTConfig_VegaM +ffffffff82d82000 r smu8_hwmgr_funcs +ffffffff82d822f0 r SMU7ThermalPolicy +ffffffff82d83000 r smu9_irq_funcs +ffffffff82d84000 r gpio_tbl_iceland +ffffffff82d84060 r gpio_tbl +ffffffff82d84150 r enable_fb_req_rej_tbl +ffffffff82d841a0 r use_bclk_tbl +ffffffff82d84370 r turn_off_plls_tbl +ffffffff82d84610 r enter_baco_tbl +ffffffff82d84730 r exit_baco_tbl_iceland +ffffffff82d84870 r clean_baco_tbl_iceland +ffffffff82d84890 r exit_baco_tbl +ffffffff82d849b0 r clean_baco_tbl +ffffffff82d85000 r pre_baco_tbl +ffffffff82d85090 r enter_baco_tbl +ffffffff82d852b0 r exit_baco_tbl +ffffffff82d85520 r clean_baco_tbl +ffffffff82d86000 r vega10_hwmgr_funcs +ffffffff82d862f0 r channel_number +ffffffff82d86320 r SMU7ThermalWithDelayPolicy +ffffffff82d87000 r SEDiDtStallCtrlConfig_vega10 +ffffffff82d87110 r SEDiDtStallPatternConfig_vega10 +ffffffff82d872e0 r SEDiDtWeightConfig_Vega10 +ffffffff82d873b0 r SEDiDtCtrl1Config_Vega10 +ffffffff82d87440 r SEDiDtCtrl2Config_Vega10 +ffffffff82d87510 r SEDiDtCtrl3Config_vega10 +ffffffff82d87820 r SEDiDtTuningCtrlConfig_Vega10 +ffffffff82d878b0 r SELCacConfig_Vega10 +ffffffff82d87a40 r SEDiDtCtrl0Config_Vega10 +ffffffff82d87d10 r AvfsPSMInitConfig_vega10 +ffffffff82d87d90 r SEEDCStallPatternConfig_Vega10 +ffffffff82d87ea0 r SEEDCStallDelayConfig_Vega10 +ffffffff82d87f80 r SEEDCCtrlConfig_Vega10 +ffffffff82d88040 r PSMSEEDCStallPatternConfig_Vega10 +ffffffff82d880c0 r PSMSEEDCStallDelayConfig_Vega10 +ffffffff82d881d0 r PSMSEEDCCtrlResetConfig_Vega10 +ffffffff82d88290 r PSMSEEDCCtrlConfig_Vega10 +ffffffff82d88350 r SEEDCForceStallPatternConfig_Vega10 +ffffffff82d883e0 r SEEDCCtrlForceStallConfig_Vega10 +ffffffff82d89000 R vega10_pptable_funcs +ffffffff82d8a000 r pre_baco_tbl +ffffffff82d8a090 r enter_baco_tbl +ffffffff82d8a2b0 r exit_baco_tbl +ffffffff82d8a520 r clean_baco_tbl +ffffffff82d8b000 r vega12_hwmgr_funcs +ffffffff82d8b2f0 r SMU7ThermalWithDelayPolicy +ffffffff82d8b340 r link_width +ffffffff82d8c000 R vega12_pptable_funcs +ffffffff82d8d000 r clean_baco_tbl +ffffffff82d8e000 r vega20_hwmgr_funcs +ffffffff82d8e2f0 r SMU7ThermalWithDelayPolicy +ffffffff82d8e340 r link_width +ffffffff82d8f000 R vega20_pptable_funcs +ffffffff82d90000 R ci_smu_funcs +ffffffff82d900e0 r defaults_hawaii_pro +ffffffff82d9012c r defaults_hawaii_xt +ffffffff82d90178 r defaults_saturn_xt +ffffffff82d901c4 r defaults_bonaire_xt +ffffffff82d90210 r ci_program_jump_on_start.data +ffffffff82d91000 R fiji_smu_funcs +ffffffff82d910e0 r avfs_graphics_level +ffffffff82d91240 r fiji_power_tune_data_set_array +ffffffff82d91246 r fiji_clock_stretch_amount_conversion +ffffffff82d91260 r fiji_clock_stretcher_ddt_table +ffffffff82d92000 R iceland_smu_funcs +ffffffff82d920e0 r defaults_icelandxt +ffffffff82d9212c r defaults_icelandpro +ffffffff82d92178 r defaults_iceland +ffffffff82d93000 R polaris10_smu_funcs +ffffffff82d930e0 r avfs_graphics_level_polaris10 +ffffffff82d932a0 r avfs_memory_level_polaris10 +ffffffff82d932c0 r polaris10_power_tune_data_set_array +ffffffff82d93310 r Range_Table +ffffffff82d94000 R smu10_smu_funcs +ffffffff82d95000 r smu7_program_jump_on_start.data +ffffffff82d95010 r pwr_virus_table_pre +ffffffff82d95680 r pwr_virus_table_post +ffffffff82d95f80 r pwr_virus_section1 +ffffffff82d96610 r pwr_virus_section2 +ffffffff82d96660 r pwr_virus_section3 +ffffffff82d9dab0 r pwr_virus_section4 +ffffffff82d9de80 r pwr_virus_section5 +ffffffff82d9e490 r pwr_virus_section6 +ffffffff82da0000 R smu8_smu_funcs +ffffffff82da1000 R tonga_smu_funcs +ffffffff82da10e0 r tonga_power_tune_data_set_array +ffffffff82da112c r tonga_clock_stretch_amount_conversion +ffffffff82da1140 r tonga_clock_stretcher_ddt_table +ffffffff82da2000 R vega10_smu_funcs +ffffffff82da3000 R vega12_smu_funcs +ffffffff82da4000 R vega20_smu_funcs +ffffffff82da5000 R vegam_smu_funcs +ffffffff82da50e0 r vegam_power_tune_data_set_array +ffffffff82da5130 r Range_Table +ffffffff82da6000 R smu_ip_funcs +ffffffff82da60a0 R smu_v11_0_ip_block +ffffffff82da60b8 R smu_v12_0_ip_block +ffffffff82da60d0 R smu_v13_0_ip_block +ffffffff82da60e8 r swsmu_pm_funcs +ffffffff82da7000 r arcturus_ppt_funcs +ffffffff82da73f0 r arcturus_table_map +ffffffff82da7470 r arcturus_pwr_src_map +ffffffff82da7480 r arcturus_workload_map +ffffffff82da74d0 r smu11_thermal_policy +ffffffff82da7528 r arcturus_i2c_algo +ffffffff82da7538 r arcturus_i2c_control_quirks +ffffffff82da7550 r arcturus_throttler_map +ffffffff82da7570 r arcturus_message_map +ffffffff82da7ff0 r arcturus_clk_map +ffffffff82da80b0 r arcturus_feature_mask_map +ffffffff82da9000 r cyan_skillfish_ppt_funcs +ffffffff82daa000 r navi10_ppt_funcs +ffffffff82daa3f0 r smu11_thermal_policy +ffffffff82daa448 r navi10_i2c_algo +ffffffff82daa458 r navi10_i2c_control_quirks +ffffffff82daa470 r navi1x_throttler_map +ffffffff82daa490 r NoDbiPrbs7 +ffffffff82dab490 r DbiPrbs7 +ffffffff82dad000 r sienna_cichlid_ppt_funcs +ffffffff82dad3f0 r smu11_thermal_policy +ffffffff82dad448 r sienna_cichlid_i2c_algo +ffffffff82dad458 r sienna_cichlid_i2c_control_quirks +ffffffff82dad470 r sienna_cichlid_throttler_map +ffffffff82dae000 r smu_v11_0_irq_funcs +ffffffff82dae010 r link_width +ffffffff82daf000 r vangogh_ppt_funcs +ffffffff82daf3e8 r vangogh_throttler_map +ffffffff82db0000 r renoir_ppt_funcs +ffffffff82db03e8 r renoir_throttler_map +ffffffff82db1000 r aldebaran_ppt_funcs +ffffffff82db13f0 r aldebaran_clk_map +ffffffff82db14b0 r aldebaran_table_map +ffffffff82db1530 r smu13_thermal_policy +ffffffff82db1588 r aldebaran_i2c_algo +ffffffff82db1598 r aldebaran_i2c_control_quirks +ffffffff82db15b0 r aldebaran_throttler_map +ffffffff82db15d0 r aldebaran_message_map +ffffffff82db2050 r aldebaran_feature_mask_map +ffffffff82db3000 R pmfw_decoded_link_speed +ffffffff82db3020 R pmfw_decoded_link_width +ffffffff82db3040 r smu_v13_0_irq_funcs +ffffffff82db4000 r smu_v13_0_0_ppt_funcs +ffffffff82db43f0 r smu13_thermal_policy +ffffffff82db4448 r smu_v13_0_0_i2c_algo +ffffffff82db4458 r smu_v13_0_0_i2c_control_quirks +ffffffff82db4470 r smu_v13_0_0_throttler_map +ffffffff82db5000 r smu_v13_0_4_ppt_funcs +ffffffff82db6000 r smu_v13_0_5_ppt_funcs +ffffffff82db7000 r smu_v13_0_6_ppt_funcs +ffffffff82db73f0 r smu_v13_0_6_message_map +ffffffff82db7e70 r smu_v13_0_6_clk_map +ffffffff82db7f30 r smu_v13_0_6_table_map +ffffffff82db7fb0 r smu_v13_0_6_i2c_algo +ffffffff82db7fc0 r smu_v13_0_6_i2c_control_quirks +ffffffff82db7fd0 r smu_v13_0_6_irq_funcs +ffffffff82db7fe0 r smu_v13_0_6_throttler_map +ffffffff82db7ff0 r smu_v13_0_6_feature_mask_map +ffffffff82db9000 r smu_v13_0_7_ppt_funcs +ffffffff82db93f0 r smu13_thermal_policy +ffffffff82db9450 r smu_v13_0_7_throttler_map +ffffffff82dba000 r yellow_carp_ppt_funcs +ffffffff82dbb000 R link_speed +ffffffff82dbb020 r __smu_message_names +ffffffff82dbc000 R pchb_ca +ffffffff82dbd000 R amas_ca +ffffffff82dbd028 R amas_devices +ffffffff82dbd040 r amas_feature +ffffffff82dbe000 R cardslot_ca +ffffffff82dbf000 R cardbus_ca +ffffffff82dc0000 R com_cardbus_ca +ffffffff82dc1000 R xl_cardbus_ca +ffffffff82dc1030 R xl_cardbus_products +ffffffff82dc2000 R dc_cardbus_ca +ffffffff82dc2030 R dc_cardbus_devices +ffffffff82dc3000 R fxp_cardbus_ca +ffffffff82dc3028 R fxp_cardbus_devices +ffffffff82dc4000 R rl_cardbus_devices +ffffffff82dc4028 R rl_cardbus_ca +ffffffff82dc5000 R re_cardbus_ca +ffffffff82dc5028 R re_cardbus_devices +ffffffff82dc6000 R ath_cardbus_ca +ffffffff82dc7000 R athn_cardbus_ca +ffffffff82dc7030 r athn_cardbus_devices +ffffffff82dc8000 R atw_cardbus_ca +ffffffff82dc8028 R atw_cardbus_devices +ffffffff82dc9000 R rtw_cardbus_ca +ffffffff82dc9028 R rtw_cardbus_devices +ffffffff82dca000 R ral_cardbus_ca +ffffffff82dca030 r ral_cardbus_devices +ffffffff82dcb000 R acx_cardbus_ca +ffffffff82dcb028 r acx_cardbus_devices +ffffffff82dcc000 R pgt_cardbus_ca +ffffffff82dcc028 R pgt_cardbus_devices +ffffffff82dcd000 R ehci_cardbus_ca +ffffffff82dce000 R ohci_cardbus_ca +ffffffff82dcf000 R uhci_cardbus_ca +ffffffff82dd0000 R malo_cardbus_ca +ffffffff82dd0028 r malo_cardbus_devices +ffffffff82dd1000 R bwi_cardbus_ca +ffffffff82dd1030 r bwi_cardbus_devices +ffffffff82dd2000 R pcmcia_ca +ffffffff82dd3000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82dd4000 r pcmcia_cis_quirks +ffffffff82dd5000 R ep_pcmcia_ca +ffffffff82dd6000 R ne_pcmcia_ca +ffffffff82dd6030 R ne2000devs +ffffffff82dd8000 R aic_pcmcia_ca +ffffffff82dd9000 R com_pcmcia_ca +ffffffff82dda000 R wdc_pcmcia_ca +ffffffff82ddb000 R sm_pcmcia_ca +ffffffff82ddc000 R xe_pcmcia_ca +ffffffff82ddd000 R wi_pcmcia_ca +ffffffff82ddd030 r wi_pcmcia_products +ffffffff82dde000 R malo_pcmcia_ca +ffffffff82ddf000 R an_pcmcia_ca +ffffffff82de0000 R pcib_ca +ffffffff82de1000 R amdpcib_ca +ffffffff82de1028 R amdpcib_devices +ffffffff82de2000 R tcpcib_ca +ffffffff82de2028 R tcpcib_devices +ffffffff82de3000 R aapic_ca +ffffffff82de4000 R hme_pci_ca +ffffffff82de4028 r hme_promhdr +ffffffff82de402a r hme_promdat +ffffffff82de5000 R isa_ca +ffffffff82de6000 R isadma_ca +ffffffff82de7000 R fdc_ca +ffffffff82de8000 R fd_ca +ffffffff82de9000 R com_isa_ca +ffffffff82dea000 R pckbc_isa_ca +ffffffff82deb000 R vga_isa_ca +ffffffff82dec000 R wdc_isa_ca +ffffffff82ded000 R mpu_midi_hw_if +ffffffff82dee000 R mpu_isa_ca +ffffffff82def000 R pcppi_ca +ffffffff82df0000 R spkr_ca +ffffffff82df0030 r pitchtab +ffffffff82df1000 R lpt_isa_ca +ffffffff82df2000 R wbsio_ca +ffffffff82df3000 R schsio_ca +ffffffff82df4000 R lm_isa_ca +ffffffff82df4028 R lm_wbsio_ca +ffffffff82df5000 R it_sensors +ffffffff82df5110 R it_vrfact +ffffffff82df5140 R it_fan_regs +ffffffff82df5160 R it_fan_ext_regs +ffffffff82df5178 R it_ca +ffffffff82df6000 R abitkv_sensors +ffffffff82df6200 R abitaa_sensors +ffffffff82df6480 R abitav_sensors +ffffffff82df6700 R abitas_sensors +ffffffff82df6980 R abitax_sensors +ffffffff82df6bc0 R abitm4_sensors +ffffffff82df6e80 R abitan_sensors +ffffffff82df7120 R abital_sensors +ffffffff82df73a0 R abitaw_sensors +ffffffff82df7700 R abitni_sensors +ffffffff82df79a0 R abitat_sensors +ffffffff82df7cc0 R abitan2_sensors +ffffffff82df7f60 R abitab_sensors +ffffffff82df8220 R abitan3_sensors +ffffffff82df8500 R abitaw2_sensors +ffffffff82df8860 R abitat2_sensors +ffffffff82df8b60 R abitab2_sensors +ffffffff82df8ea0 R abitin_sensors +ffffffff82df91e0 R uguru_ca +ffffffff82dfa000 R aps_ca +ffffffff82dfb000 R wsdisplay_emul_ca +ffffffff82dfb030 r charClass +ffffffff82dfc000 r usl_syncops +ffffffff82dfd000 R wsevent_filtops +ffffffff82dfe000 R wskbd_ca +ffffffff82dff000 r latin1_to_upper +ffffffff82e00000 R wsmouse_ca +ffffffff82e01000 R cyrillic_to_koi8 +ffffffff82e01060 R unicode_to_latin2 +ffffffff82e010e0 R unicode_to_latin7 +ffffffff82e02000 R wsemul_vt100_ops +ffffffff82e03000 r decspcgr2uni +ffffffff82e03100 r dectech2uni +ffffffff82e03200 r nrctable +ffffffff82e04000 r vt100_fkeys +ffffffff82e040c0 r vt100_pfkeys +ffffffff82e040e0 r vt100_numpad +ffffffff82e05000 R pckbd_ca +ffffffff82e05028 R pckbd_accessops +ffffffff82e05040 R pckbd_consops +ffffffff82e05060 R pckbd_keymapdata +ffffffff82e05070 R pckbd_xtbl2 +ffffffff82e05100 R pckbd_xtbl2_ext +ffffffff82e06000 r pckbd_keydesc_us +ffffffff82e06250 r pckbd_keydesc_de +ffffffff82e062f0 r pckbd_keydesc_de_nodead +ffffffff82e06310 r pckbd_keydesc_fr +ffffffff82e063d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82e06510 r pckbd_keydesc_dk +ffffffff82e065a0 r pckbd_keydesc_dk_nodead +ffffffff82e065b0 r pckbd_keydesc_it +ffffffff82e06640 r pckbd_keydesc_uk +ffffffff82e066e0 r pckbd_keydesc_jp +ffffffff82e06750 r pckbd_keydesc_sv +ffffffff82e06780 r pckbd_keydesc_sv_nodead +ffffffff82e06790 r pckbd_keydesc_no +ffffffff82e067c0 r pckbd_keydesc_no_nodead +ffffffff82e067d0 r pckbd_keydesc_us_declk +ffffffff82e06860 r pckbd_keydesc_us_dvorak +ffffffff82e06900 r pckbd_keydesc_us_colemak +ffffffff82e06948 r pckbd_keydesc_swapctrlcaps +ffffffff82e06960 r pckbd_keydesc_iopener +ffffffff82e069b0 r pckbd_keydesc_es +ffffffff82e06a50 r pckbd_keydesc_be +ffffffff82e06b10 r pckbd_keydesc_ru +ffffffff82e06c80 r pckbd_keydesc_ua +ffffffff82e06e10 r pckbd_keydesc_sg +ffffffff82e06ec0 r pckbd_keydesc_sg_nodead +ffffffff82e06ee0 r pckbd_keydesc_sf +ffffffff82e06f00 r pckbd_keydesc_pt +ffffffff82e06f90 r pckbd_keydesc_lt +ffffffff82e07070 r pckbd_keydesc_la +ffffffff82e07100 r pckbd_keydesc_br +ffffffff82e07180 r pckbd_keydesc_tr +ffffffff82e07230 r pckbd_keydesc_tr_nodead +ffffffff82e07250 r pckbd_keydesc_pl +ffffffff82e072b0 r pckbd_keydesc_hu +ffffffff82e073c0 r pckbd_keydesc_si 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ukbd_keydesc_sv_nodead +ffffffff82e2a960 r ukbd_keydesc_no +ffffffff82e2a990 r ukbd_keydesc_no_nodead +ffffffff82e2a9a0 r ukbd_keydesc_us_dvorak +ffffffff82e2aa40 r ukbd_keydesc_us_colemak +ffffffff82e2aa88 r ukbd_keydesc_swapctrlcaps +ffffffff82e2aaa0 r ukbd_keydesc_iopener +ffffffff82e2aaf0 r ukbd_keydesc_es +ffffffff82e2ab90 r ukbd_keydesc_be +ffffffff82e2ac50 r ukbd_keydesc_ru +ffffffff82e2adc0 r ukbd_keydesc_ua +ffffffff82e2af60 r ukbd_keydesc_sg +ffffffff82e2b020 r ukbd_keydesc_sg_nodead +ffffffff82e2b040 r ukbd_keydesc_sf +ffffffff82e2b060 r ukbd_keydesc_pt +ffffffff82e2b0f0 r ukbd_keydesc_pt_apple +ffffffff82e2b110 r ukbd_keydesc_lt +ffffffff82e2b1f0 r ukbd_keydesc_la +ffffffff82e2b290 r ukbd_keydesc_br +ffffffff82e2b320 r ukbd_keydesc_tr +ffffffff82e2b3e0 r ukbd_keydesc_tr_nodead +ffffffff82e2b400 r ukbd_keydesc_pl +ffffffff82e2b460 r ukbd_keydesc_hu +ffffffff82e2b570 r ukbd_keydesc_si +ffffffff82e2b690 r ukbd_keydesc_cf +ffffffff82e2b770 r ukbd_keydesc_cf_nodead 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+ffffffff82e33000 R ulpt_ca +ffffffff82e34000 R umass_ca +ffffffff82e34028 R umass_bbb_methods +ffffffff82e34040 R umass_cbi_methods +ffffffff82e35000 R umass_quirks +ffffffff82e36000 R umass_scsi_switch +ffffffff82e37000 R uthum_devs +ffffffff82e37008 R uthum_ca +ffffffff82e37030 r uthum_sensor_type_s +ffffffff82e38000 R ugold_devs +ffffffff82e38018 R ugold_ca +ffffffff82e39000 R utrh_devs +ffffffff82e39008 R utrh_ca +ffffffff82e3a000 R uoakrh_devs +ffffffff82e3a008 R uoakrh_ca +ffffffff82e3a030 R uoakrh_methods +ffffffff82e3b000 R uoaklux_devs +ffffffff82e3b008 R uoaklux_ca +ffffffff82e3b030 R uoaklux_methods +ffffffff82e3c000 R uoakv_devs +ffffffff82e3c008 R uoakv_ca +ffffffff82e3c030 R uoakv_methods +ffffffff82e3d000 R uonerng_ca +ffffffff82e3e000 R urng_ca +ffffffff82e3e030 r urng_devs +ffffffff82e3f000 R udcf_ca +ffffffff82e3f028 r udcf_devs +ffffffff82e40000 R umbg_ca +ffffffff82e41000 R uvisor_methods +ffffffff82e41040 R uvisor_ca +ffffffff82e41070 r uvisor_devs +ffffffff82e42000 R udsbr_hw_if +ffffffff82e42028 R udsbr_ca +ffffffff82e43000 R utwitch_devs +ffffffff82e43008 R utwitch_ca +ffffffff82e44000 R aue_devs +ffffffff82e441b0 R aue_ca +ffffffff82e45000 R axe_devs +ffffffff82e450d0 R axe_ca +ffffffff82e46000 R axen_devs +ffffffff82e46020 R axen_ca +ffffffff82e47000 R smsc_ca +ffffffff82e47030 r smsc_devs +ffffffff82e48000 R cue_ca +ffffffff82e49000 R kue_devs +ffffffff82e49088 R kue_ca +ffffffff82e4a000 R cdce_devs +ffffffff82e4a048 R cdce_ca +ffffffff82e4b000 R urndis_ca +ffffffff82e4b030 R urndis_class +ffffffff82e4c000 R mos_devs +ffffffff82e4c018 R mos_ca +ffffffff82e4d000 R mue_devs +ffffffff82e4d020 R mue_ca +ffffffff82e4e000 R udav_ca +ffffffff82e4e030 r udav_devs +ffffffff82e4f000 R upl_ca +ffffffff82e50000 R ugl_ca +ffffffff82e51000 R url_ca +ffffffff82e51030 r url_devs +ffffffff82e52000 R ure_devs +ffffffff82e520e8 R ure_ca +ffffffff82e53000 R uaq_devs +ffffffff82e53018 R uaq_ca +ffffffff82e54000 R umodem_methods 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uscom_methods +ffffffff82e5f040 R uscom_ca +ffffffff82e5f068 r uscom_devs +ffffffff82e60000 R ucrcom_methods +ffffffff82e60040 R ucrcom_ca +ffffffff82e61000 R uxrcom_methods +ffffffff82e61040 R uxrcom_ca +ffffffff82e61068 r uxrcom_devs +ffffffff82e62000 R uipaq_methods +ffffffff82e62040 R uipaq_ca +ffffffff82e62070 r uipaq_devs +ffffffff82e63000 R umsm_methods +ffffffff82e63040 R umsm_ca +ffffffff82e63070 r umsm_devs +ffffffff82e64000 R uchcom_methods +ffffffff82e64040 R uchcom_ca +ffffffff82e64068 r uchcom_devs +ffffffff82e64080 r dividers +ffffffff82e65000 R uticom_methods +ffffffff82e65040 R uticom_ca +ffffffff82e65070 r uticom_devs +ffffffff82e66000 R wi_usb_devs +ffffffff82e660f0 R wi_usb_ca +ffffffff82e67000 R atu_ca +ffffffff82e68000 R ural_ca +ffffffff82e68030 r ural_devs +ffffffff82e680a0 r ural_rf2522_r2 +ffffffff82e680e0 r ural_rf2524_r2 +ffffffff82e68120 r ural_rf2525_hi_r2 +ffffffff82e68160 r ural_rf2525_r2 +ffffffff82e681a0 r ural_rf2525e_r2 +ffffffff82e681e0 r ural_rf2526_hi_r2 +ffffffff82e68220 r ural_rf2526_r2 +ffffffff82e68260 r ural_def_bbp +ffffffff82e682a0 r ural_def_mac +ffffffff82e69000 R rum_ca +ffffffff82e69030 r rum_devs +ffffffff82e69110 r rum_rf5225 +ffffffff82e69460 r rum_rf5226 +ffffffff82e697b0 r rum_def_bbp +ffffffff82e697f0 r rum_def_mac +ffffffff82e6a000 R run_ca +ffffffff82e6a030 r run_devs +ffffffff82e6a430 r rt2860_rf2850 +ffffffff82e6a860 r rt2860_rates +ffffffff82e6a920 r rt5592_freqs_40mhz +ffffffff82e6aa60 r rt5592_freqs_20mhz +ffffffff82e6aba0 r rt5592_2ghz_def_rf +ffffffff82e6abe0 r rt5592_chan_5ghz +ffffffff82e6ae30 r rt5592_def_bbp +ffffffff82e6ae70 r rt5592_bbp_r196 +ffffffff82e6aed0 r rt5390_def_bbp +ffffffff82e6af00 r rt3572_def_rf +ffffffff82e6af40 r rt3070_def_rf +ffffffff82e6af70 r rt3593_def_rf +ffffffff82e6afb0 r rt5592_def_rf +ffffffff82e6afe0 r rt5392_def_rf +ffffffff82e6b060 r rt5390_def_rf +ffffffff82e6b0e0 r rt2870_def_mac +ffffffff82e6c000 R mtw_ca +ffffffff82e6c030 r mtw_devs +ffffffff82e6c070 r rt2860_rates +ffffffff82e6c130 r mt7601_rf_chan +ffffffff82e6c1a0 r mt7601_def_bbp +ffffffff82e6c2d0 r mt7601_rf_bank0 +ffffffff82e6c330 r mt7601_rf_bank4 +ffffffff82e6c3b0 r mt7601_rf_bank5 +ffffffff82e6c430 r mt7601_def_mac +ffffffff82e6d000 R zyd_ca +ffffffff82e6d030 r zyd_devs +ffffffff82e6d1b0 r zyd_rfmd_init.phyini +ffffffff82e6d2e0 r zyd_rfmd_init.rfini +ffffffff82e6d330 r zyd_rfmd_set_channel.rfprog +ffffffff82e6d3a0 r zyd_al2230_init.phyini +ffffffff82e6d480 r zyd_al2230_init.rfini +ffffffff82e6d4e0 r zyd_al2230_init_b.phyini +ffffffff82e6d5d0 r zyd_al2230_init_b.rfini +ffffffff82e6d620 r zyd_al2230_set_channel.rfprog +ffffffff82e6d6d0 r zyd_al7230B_init.phyini_1 +ffffffff82e6d7b0 r zyd_al7230B_init.rfini_1 +ffffffff82e6d7f0 r zyd_al7230B_set_channel.rfprog +ffffffff82e6d860 r zyd_al7230B_set_channel.rfsc +ffffffff82e6d890 r zyd_al2210_init.phyini +ffffffff82e6d8f0 r zyd_al2210_init.rfini +ffffffff82e6d920 r zyd_al2210_set_channel.rfprog +ffffffff82e6d960 r zyd_gct_init.phyini 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rtl8192ce_bb_prog +ffffffff82e71a60 r rtl8192cu_bb_prog +ffffffff82e71a90 r rtl8188eu_bb_regs +ffffffff82e71c10 r rtl8188eu_bb_vals +ffffffff82e71f10 r rtl8188eu_agc_vals +ffffffff82e72110 r rtl8188ftv_bb_regs +ffffffff82e722b0 r rtl8188ftv_bb_vals +ffffffff82e725f0 r rtl8188ftv_agc_vals +ffffffff82e726f0 r rtl8192e_bb_regs +ffffffff82e72890 r rtl8192e_bb_vals +ffffffff82e72bd0 r rtl8192eu_agc_vals +ffffffff82e72dd0 r rtl8192ce_bb_regs +ffffffff82e72f50 r rtl8188ce_bb_vals +ffffffff82e73240 r rtl8188ce_agc_vals +ffffffff82e734c0 r rtl8188ru_bb_regs +ffffffff82e73640 r rtl8188ru_bb_vals +ffffffff82e73940 r rtl8188ru_agc_vals +ffffffff82e73bc0 r rtl8188cu_bb_vals +ffffffff82e73eb0 r rtl8192ce_bb_vals +ffffffff82e741a0 r rtl8192ce_agc_vals +ffffffff82e74420 r rtl8192cu_bb_vals +ffffffff82e75000 R rsu_ca +ffffffff82e75030 r rsu_devs +ffffffff82e750c8 r rsu_devs_noht +ffffffff82e750d0 r rsu_qid2idx_4ep +ffffffff82e750da r rsu_qid2idx_6ep +ffffffff82e750e4 r rsu_qid2idx_11ep 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userconf_base +ffffffff8322f004 D userconf_maxdev +ffffffff8322f008 D userconf_totdev +ffffffff8322f00c D userconf_maxlocnames +ffffffff8322f010 D userconf_cnt +ffffffff8322f014 D userconf_lines +ffffffff8322f018 D userconf_histsz +ffffffff8322f020 D userconf_cmds +ffffffff83230000 D ftlock +ffffffff83231000 d ppollcollect.poll_errintvl +ffffffff83232000 D ttydefchars +ffffffff83232014 D ttclos +ffffffff8323201b D ttopen +ffffffff83232022 D ttybg +ffffffff83232028 D ttyin +ffffffff8323202e D ttyout +ffffffff83232038 D ttylist_lock +ffffffff83233000 D linesw +ffffffff83233280 D nlinesw +ffffffff83234000 D pt_softc_lock +ffffffff83235000 d mbstat_boot_boot_cpumem +ffffffff83235080 D mbstat +ffffffff83235090 D mclsizes +ffffffff832350b0 D m_extref_mtx +ffffffff832350c0 D m_pool_allocator +ffffffff83236000 D somaxconn +ffffffff83236004 D sominconn +ffffffff83236008 D sosplice_lock +ffffffff83237000 D sb_max +ffffffff83238000 D unp_df_lock +ffffffff83238010 D unp_gc_lock +ffffffff83238020 D unp_rights_mtx +ffffffff83238030 D unp_ino_mtx +ffffffff83238040 D unp_gc_task +ffffffff83238070 D unpst_sendspace +ffffffff83238074 D unpst_recvspace +ffffffff83238078 D unpsq_sendspace +ffffffff8323807c D unpsq_recvspace +ffffffff83238080 D unpdg_sendspace +ffffffff83238084 D unpdg_recvspace +ffffffff83239000 D doingcache +ffffffff8323a000 D maxvfsconf +ffffffff8323a010 d vfsconflist +ffffffff8323b000 D lockf_lock +ffffffff8323b010 D maxlocksperuid +ffffffff8323c000 D iftovt_tab +ffffffff8323c040 D vttoif_tab +ffffffff8323c064 D suid_clear +ffffffff8323c068 D vnode_mtx +ffffffff8323c078 D vfs_stall_lock +ffffffff8323c090 D vtypes +ffffffff8323c0e0 D vtags +ffffffff8323d000 D syncer_maxdelay +ffffffff8323d004 D syncdelay +ffffffff8323e000 D dosdirtemplate +ffffffff8323f000 D ntfs_hashlock +ffffffff83240000 D ntfs_toupper_lock +ffffffff83241000 D art_table_gc_mtx +ffffffff83241010 D art_table_gc_task +ffffffff83241040 D art_node_gc_mtx +ffffffff83241050 D art_node_gc_task +ffffffff83242000 D bpf_bufsize +ffffffff83242004 D bpf_maxbufsize +ffffffff83242008 D bpf_sysctl_lk +ffffffff83243000 D ifg_head +ffffffff83243010 D if_cloners_lock +ffffffff83243020 D if_input_task_locked +ffffffff83243050 D netlock +ffffffff83243060 D ifnetlist +ffffffff83244000 D ifiq_maxlen_drop +ffffffff83244004 D ifiq_maxlen_return +ffffffff83245000 D etherbroadcastaddr +ffffffff83245006 D ether_ipmulticast_min +ffffffff8324500c D ether_ipmulticast_max +ffffffff83245012 D ether_ip6multicast_min +ffffffff83245018 D ether_ip6multicast_max +ffffffff83246000 D etherip_cloner +ffffffff83246030 D etherip_list +ffffffff83247000 D loop_cloner +ffffffff83248000 D ifmedia_mtx +ffffffff83249000 D ppp_compressors +ffffffff83249020 D ppp_cloner +ffffffff8324a000 D ppp_pkt_init +ffffffff8324b000 D ppp_bsd_compress +ffffffff8324c000 D ppp_deflate +ffffffff8324c070 D ppp_deflate_draft +ffffffff8324d000 D tun_cloner +ffffffff8324d030 D tap_cloner +ffffffff8324e000 D bridgeintrq +ffffffff8324e038 D bridge_cloner +ffffffff8324f000 d veb_cloner +ffffffff8324f030 d vport_cloner +ffffffff83250000 D vlan_tagh_lk +ffffffff83250010 D vlan_cloner +ffffffff83250040 D svlan_cloner +ffffffff83251000 D pipex_list_mtx +ffffffff83251010 D pipex_prune +ffffffff83251018 D pipexoutq +ffffffff83251050 d SHAPad2 +ffffffff83252000 D rtmap_gc +ffffffff83252018 D rt_rc +ffffffff83253000 D rt_labels +ffffffff83253010 D rtlabel_mtx +ffffffff83254000 D enc_cloner +ffffffff83255000 D gre_cloner +ffffffff83255030 D gre_list +ffffffff83255040 D mgre_cloner +ffffffff83255070 D egre_cloner +ffffffff832550a0 D nvgre_cloner +ffffffff832550d0 D eoip_cloner +ffffffff83256000 D trunk_cloner +ffffffff83257000 d aggr_cloner +ffffffff83258000 d tpmr_cloner +ffffffff83259000 D mpe_cloner +ffffffff8325a000 D mpw_cloner +ffffffff8325b000 D mpip_cloner +ffffffff8325c000 d bpe_cloner +ffffffff8325c030 d bpe_lock +ffffffff8325d000 D vether_cloner +ffffffff8325e000 D pair_cloner +ffffffff8325f000 d vxlan_cloner +ffffffff8325f030 d vxlan_lock +ffffffff8325f040 d vxlan_teps +ffffffff83260000 D underload_interval +ffffffff83260010 D wg_cloner +ffffffff83261000 d stoeplitz_keyseed +ffffffff83262000 D ieee80211_cache_size +ffffffff83263000 D arpt_prune +ffffffff83263004 D arpt_keep +ffffffff83263008 D arpt_down +ffffffff83263010 D arpinq +ffffffff83263048 D arp_mtx +ffffffff83263058 D arp_maxtries +ffffffff83264000 D ipport_firstauto +ffffffff83264004 D ipport_lastauto +ffffffff83264008 D ipport_hifirstauto +ffffffff8326400c D ipport_hilastauto +ffffffff83265000 D divert_sendspace +ffffffff83265004 D divert_recvspace +ffffffff83265008 D divbhashsize +ffffffff83266000 D icmptstamprepl +ffffffff83266004 D icmperrppslim +ffffffff83266008 D icmp_redirtimeout +ffffffff83267000 D ipsendredirects +ffffffff83267004 D ip_defttl +ffffffff83267008 D ip_mtudisc +ffffffff8326700c D ip_mtudisc_timeout +ffffffff83267010 D ipq_mutex +ffffffff83267020 D ip_maxqueue +ffffffff83267028 D ipintrq +ffffffff83267060 d ipsend_task +ffffffff83267090 d ipsendraw_task +ffffffff83268000 D ip_mrtproto +ffffffff83268004 d sin +ffffffff83269000 D rip_sendspace +ffffffff83269008 D rip_recvspace +ffffffff8326a000 D tcprexmtthresh +ffffffff8326a004 D tcptv_keep_init +ffffffff8326a008 D tcp_rst_ppslim +ffffffff8326a00c D tcp_ackdrop_ppslim +ffffffff8326a010 D tcp_syn_hash_size +ffffffff8326a014 D tcp_syn_cache_limit +ffffffff8326a018 D tcp_syn_bucket_limit +ffffffff8326a01c D tcp_syn_use_limit +ffffffff8326a020 D syn_cache_mtx +ffffffff8326b000 D tcp_outflags +ffffffff8326c000 D tcp_timer_mtx +ffffffff8326c010 D tcp_mssdflt +ffffffff8326c014 D tcp_rttdflt +ffffffff8326c018 D tcp_do_rfc1323 +ffffffff8326c01c D tcp_do_sack +ffffffff8326c020 D tcp_do_rfc3390 +ffffffff8326c024 D tcp_do_tso +ffffffff8326c028 D tcp_reass_limit +ffffffff8326c02c D tcp_sackhole_limit +ffffffff8326d000 D tcp_backoff +ffffffff8326d034 D tcp_totbackoff +ffffffff8326e000 D tcp_sendspace +ffffffff8326e004 D tcp_recvspace +ffffffff8326e008 D tcp_autorcvbuf_inc +ffffffff8326f000 D udpcksum +ffffffff8326f004 D udp_sendspace +ffffffff8326f008 D udp_recvspace +ffffffff83270000 D ipsec_flows_mtx +ffffffff83270010 D ipsec_ids_idle +ffffffff83270014 D ipsec_ids_next_flow +ffffffff83270018 D ipsec_policy_head +ffffffff83270028 D ipsp_ids_gc_timeout +ffffffff83270070 D tdb_sadb_mtx +ffffffff83270080 d tdb_hashmask +ffffffff83271000 D ipo_tdb_mtx +ffffffff83271010 D ipsec_acquire_mtx +ffffffff83271020 D ipsec_acquire_head +ffffffff83272000 D ipsec_keep_invalid +ffffffff83272004 D ipsec_require_pfs +ffffffff83272008 D ipsec_soft_timeout +ffffffff8327200c D ipsec_exp_timeout +ffffffff83272010 D ipsec_soft_first_use +ffffffff83272014 D ipsec_exp_first_use +ffffffff83272018 D ipsec_expire_acquire +ffffffff8327201c D esp_enable +ffffffff83272020 D ah_enable +ffffffff83273000 D udpencap_enable +ffffffff83273004 D udpencap_port +ffffffff83274000 D carp_vh_rc +ffffffff83274020 D carp_sc_rc +ffffffff83274040 D carp_opts +ffffffff83274058 D carp_cloner +ffffffff83274088 d carp_send_na.mcast +ffffffff83275000 d PADDING ffffffff83276000 d PADDING -ffffffff83277000 d PADDING -ffffffff83278000 d weak_keys -ffffffff83279000 D swcr_id -ffffffff8327a000 D window_inflate -ffffffff8327a004 D window_deflate -ffffffff8327b000 D ghash_update -ffffffff8327c000 D mpls_defttl -ffffffff8327c004 D mpls_mapttl_ip -ffffffff8327d000 D nfskevq_lock -ffffffff8327e000 D nfs_backoff -ffffffff8327e020 D nfs_ptimers -ffffffff8327f000 D desirednfsrvcache -ffffffff8327f010 D nonidempotent -ffffffff8327f070 D nfsv2_repstat -ffffffff83280000 D nfsv2_type -ffffffff83280030 D nfsv3_type -ffffffff83280060 D nv2tov_type -ffffffff83280080 D nv3tov_type -ffffffff832800a0 D nfsv3_procid -ffffffff83280100 D nfsv2_procid -ffffffff8328015c d nfsv3err_getattr -ffffffff83280170 d nfsv3err_setattr -ffffffff83280190 d nfsv3err_lookup -ffffffff832801a4 d nfsv3err_access -ffffffff832801b0 d nfsv3err_readlink -ffffffff832801d0 d nfsv3err_read -ffffffff832801f0 d nfsv3err_write -ffffffff83280210 d nfsv3err_create -ffffffff83280230 d nfsv3err_mkdir -ffffffff83280250 d nfsv3err_symlink -ffffffff83280270 d nfsv3err_mknod -ffffffff83280290 d nfsv3err_remove -ffffffff832802b0 d nfsv3err_rmdir -ffffffff832802d0 d nfsv3err_rename -ffffffff83280300 d nfsv3err_link -ffffffff83280330 d nfsv3err_readdir -ffffffff83280350 d nfsv3err_readdirplus -ffffffff83280366 d nfsv3err_fsstat -ffffffff83280372 d nfsv3err_fsinfo -ffffffff8328037c d nfsv3err_pathconf -ffffffff83280386 d nfsv3err_commit -ffffffff83281000 D nfsrv3_procs -ffffffff832810b8 D nfs_niothreads -ffffffff83282000 D fragtbl -ffffffff83283000 D ffs_vtbl -ffffffff83284000 D softdep_typenames -ffffffff83284070 D tickdelay -ffffffff83285000 D dirchk -ffffffff83286000 D desireddquot -ffffffff83287000 D amap_list_lock -ffffffff83288000 d uao_list_lock -ffffffff83289000 d uvmexp_countersboot_boot_cpumem -ffffffff832890c0 D uvmexp_counters -ffffffff832890c8 D vm_min_kernel_address -ffffffff8328a000 D no_constraint -ffffffff8328b000 d uvm_kmapent_warn_rate -ffffffff8328c000 D maxslp -ffffffff8328d000 D uvmpagerops -ffffffff8328e000 D uvm_swap_data_lock -ffffffff8328e010 D swap_syscall_lock -ffffffff8328e020 D oommtx -ffffffff8328f000 D uvm_doswapencrypt -ffffffff83290000 D gif_list -ffffffff83290010 D gif_cloner -ffffffff83291000 d sec_cloner -ffffffff83291030 d sec_tdb_gc_mtx -ffffffff83291040 d sec_tdb_gc_task -ffffffff83292000 D divert6_sendspace -ffffffff83292004 D divert6_recvspace -ffffffff83292008 D divb6hashsize -ffffffff83293000 d in6_get_hw_ifid.allone -ffffffff83294000 D ip6_sendredirects -ffffffff83294004 D ip6_defhlim -ffffffff83294008 D ip6_defmcasthlim -ffffffff8329400c D ip6_maxfragpackets -ffffffff83294010 D ip6_maxfrags -ffffffff83294014 D ip6_log_interval -ffffffff83294018 D ip6_hdrnestlimit -ffffffff8329401c D ip6_dad_count -ffffffff83294020 D ip6_auto_flowlabel -ffffffff83294024 D ip6_use_deprecated -ffffffff83294028 D ip6_neighborgcthresh -ffffffff8329402c D ip6_maxdynroutes -ffffffff83294030 D rip6_sendspace -ffffffff83294038 D rip6_recvspace -ffffffff83294040 D icmp6_redirtimeout -ffffffff83294044 D icmp6errppslim -ffffffff83294048 D ip6_mtudisc_timeout -ffffffff83295000 D frag6_mutex -ffffffff83296000 d icmp6_mtudisc_hiwat -ffffffff83296004 d icmp6_mtudisc_lowat -ffffffff83297000 d randomtab_20 -ffffffff83298000 D ip6intrq -ffffffff83298038 d ip6send_task -ffffffff83299000 D nd6_timer_next -ffffffff83299008 D nd6_expire_next -ffffffff83299010 D nd6_delay -ffffffff83299014 D nd6_umaxtries -ffffffff83299018 D nd6_mmaxtries -ffffffff8329901c D nd6_gctimer -ffffffff83299020 D nd6_maxndopt -ffffffff83299028 D nd6_mtx -ffffffff83299038 D nd6_list -ffffffff8329a000 d dadq -ffffffff8329b000 D pfkeyv2_mtx -ffffffff8329b010 d pfkeyv2_seq -ffffffff8329c000 D sadb_exts_allowed_in -ffffffff8329c090 D sadb_exts_required_in -ffffffff8329d000 D cold -ffffffff8329e000 D bdevsw -ffffffff8329e460 D nblkdev -ffffffff8329e470 D cdevsw -ffffffff832a0400 D nchrdev -ffffffff832a0404 D mem_no -ffffffff832a0408 D swapdev -ffffffff832a0410 D constab -ffffffff832a1000 D machine -ffffffff832a1008 D cpu_idle_cycle_fcn -ffffffff832a1010 D lid_action -ffffffff832a1014 D pwr_action -ffffffff832a1018 D isa_constraint -ffffffff832a1028 D dma_constraint -ffffffff832a1040 D uvm_md_constraints -ffffffff832a1058 D delay_func -ffffffff832a1060 D initclock_func -ffffffff832a1068 D startclock_func -ffffffff832a1070 D bootinfo_size -ffffffff832a1074 D waittime -ffffffff832a1078 D dumpmag -ffffffff832a2000 D tsc_rdtsc -ffffffff832a2008 D tsc_timecounter -ffffffff832a2058 D tsc_is_synchronized -ffffffff832a3000 D local_apic -ffffffff832a3020 D lapic_id -ffffffff832a3080 D lapic_tpr -ffffffff832a30a0 d lapic_ppr -ffffffff832a3100 d lapic_isr -ffffffff832a4000 D warn_once -ffffffff832a5000 d errata -ffffffff832a6000 D cpu_ucode_mtx -ffffffff832a7000 D mem_owner_bios -ffffffff832a7008 D mrops -ffffffff832a7028 D mtrrmask -ffffffff832a7030 D mtrrtomrt -ffffffff832a8000 D pmap_pg_wc -ffffffff832a8008 D pmaps_lock -ffffffff832a8018 d pmap_maxkvaddr -ffffffff832a9000 D kv_physwait -ffffffff832aa000 D fpu_save_len -ffffffff832ab000 D i8259_pic -ffffffff832ac000 D softintr_pic -ffffffff832ad000 D ipifunc -ffffffff832ae000 D setperf_mp_mutex -ffffffff832af000 D db_Grp6 -ffffffff832af040 D db_Grp7 -ffffffff832af100 D db_Grp8 -ffffffff832af140 D db_Grp9 -ffffffff832af200 D db_GrpA -ffffffff832af240 D db_GrpB -ffffffff832af280 D db_GrpC -ffffffff832af2c0 D db_inst_0f0x -ffffffff832af440 D db_inst_0f2x -ffffffff832af5c0 D db_inst_0f3x -ffffffff832af740 D db_inst_0f8x -ffffffff832af8c0 D db_inst_0f9x -ffffffff832afa40 D db_inst_0fax -ffffffff832afbc0 D db_inst_0fbx -ffffffff832afd40 D db_inst_0fcx -ffffffff832afec0 D db_inst_0f -ffffffff832aff40 D db_Esc92 -ffffffff832aff80 D db_Esc94 -ffffffff832affc0 D db_Esc95 -ffffffff832b0000 D db_Esc96 -ffffffff832b0040 D db_Esc97 -ffffffff832b0080 D db_Esca5 -ffffffff832b00c0 D db_Escb4 -ffffffff832b0100 D db_Esce3 -ffffffff832b0140 D db_Escf4 -ffffffff832b0180 D db_Esc8 -ffffffff832b0240 D db_Esc9 -ffffffff832b0300 D db_Esca -ffffffff832b03c0 D db_Escb -ffffffff832b0480 D db_Escc -ffffffff832b0540 D db_Escd -ffffffff832b0600 D db_Esce -ffffffff832b06c0 D db_Escf -ffffffff832b0780 D db_Esc_inst -ffffffff832b07c0 D db_Grp1 -ffffffff832b0800 D db_Grp2 -ffffffff832b0840 D db_Grp3 -ffffffff832b0900 D db_Grp4 -ffffffff832b09c0 D db_Grp5 -ffffffff832b0a80 D db_inst_table -ffffffff832b2280 D db_bad_inst -ffffffff832b22a0 D db_index_reg_16 -ffffffff832b22e0 D db_reg -ffffffff832b24e0 D db_seg_reg -ffffffff832b2520 D db_lengths -ffffffff832b3000 D db_regs -ffffffff832b31e0 D db_eregs -ffffffff832b31f0 D db_reg_args -ffffffff832b4000 D timer_mutex -ffffffff832b4010 d i8254_timecounter -ffffffff832b5000 D spleen8x16 -ffffffff832b5058 D spleen12x24 -ffffffff832b50b0 D spleen16x32 -ffffffff832b5108 D spleen32x64 -ffffffff832b5160 d builtin_fonts -ffffffff832b51e0 d wsfont_add.cookiegen -ffffffff832b51f0 d spleen8x16_data -ffffffff832b5ff0 d spleen12x24_data -ffffffff832b89f0 d spleen16x32_data -ffffffff832bc1f0 d spleen32x64_data -ffffffff832cb000 D nsphy_cd -ffffffff832cc000 D nsphyter_cd -ffffffff832cd000 D gentbi_cd -ffffffff832ce000 D qsphy_cd -ffffffff832cf000 D inphy_cd -ffffffff832d0000 D iophy_cd -ffffffff832d1000 D eephy_cd -ffffffff832d2000 D exphy_cd -ffffffff832d3000 D rlphy_cd -ffffffff832d4000 D lxtphy_cd -ffffffff832d5000 D luphy_cd -ffffffff832d6000 D mtdphy_cd -ffffffff832d7000 D icsphy_cd -ffffffff832d8000 D sqphy_cd -ffffffff832d9000 D tqphy_cd -ffffffff832da000 D ukphy_cd -ffffffff832db000 D dcphy_cd -ffffffff832dc000 D bmtphy_cd -ffffffff832dd000 D brgphy_cd -ffffffff832de000 D xmphy_cd -ffffffff832df000 D amphy_cd -ffffffff832e0000 D acphy_cd -ffffffff832e1000 D nsgphy_cd -ffffffff832e2000 D urlphy_cd -ffffffff832e3000 D rgephy_cd -ffffffff832e4000 D ciphy_cd -ffffffff832e5000 D ipgphy_cd -ffffffff832e6000 D etphy_cd -ffffffff832e7000 D jmphy_cd -ffffffff832e8000 D atphy_cd -ffffffff832e9000 D scsi_autoconf -ffffffff832e9008 D scsibus_cd -ffffffff832ea000 D cd_cd -ffffffff832eb000 D ch_cd -ffffffff832eb020 D chquirks -ffffffff832ec000 D sd_cd -ffffffff832ed000 D st_cd -ffffffff832ee000 D uk_cd -ffffffff832ef000 D safte_cd -ffffffff832f0000 D ses_cd -ffffffff832f1000 D sym_cd -ffffffff832f1020 D sym_devices -ffffffff832f1070 D asym_devices -ffffffff832f2000 D rdac_cd -ffffffff832f2020 D rdac_devices -ffffffff832f3000 D emc_cd -ffffffff832f3020 D emc_devices -ffffffff832f4000 D hds_cd -ffffffff832f4020 D hds_devices -ffffffff832f5000 D atapiscsi_cd -ffffffff832f6000 D wd_cd -ffffffff832f6020 d wddumpmulti -ffffffff832f7000 D mainbus_cd -ffffffff832f7020 D mba_iba -ffffffff832f8000 D bios_cd -ffffffff832f8020 D smbios_uninfo -ffffffff832f9000 D mpbios_cd -ffffffff832f9020 d mp_conf -ffffffff832f9070 d extint_bus -ffffffff832f90a0 d smi_bus -ffffffff832f90d0 d nmi_bus -ffffffff832fa000 D cpu_info_full_primary -ffffffff832fd000 D cpu_info_list -ffffffff832fd008 D mp_cpu_funcs -ffffffff832fd020 D cpu_cd -ffffffff832fd040 D cpu_info -ffffffff832fe000 D local_pic -ffffffff832fe098 D lapic_readreg -ffffffff832fe0a0 D lapic_writereg -ffffffff832fe0a8 D x86_ipi -ffffffff832ff000 D ioapic_cold -ffffffff832ff008 D ioapic_cd -ffffffff83300000 D efifb_std_descr -ffffffff83300030 D efifb_descrs -ffffffff83300038 D efifb_accessops -ffffffff83300098 D efifb_cd -ffffffff83301000 D pvbus_cd -ffffffff83301020 D pvbus_types -ffffffff833010e0 D pvbus_dma_tag -ffffffff83302000 D pvclock_cd -ffffffff83302020 D pvclock_timecounter -ffffffff83303000 D vmt_tclo_rpc -ffffffff833030d0 D vmt_cd -ffffffff83304000 D xen_cd -ffffffff83304020 D xen_bus_dma_tag -ffffffff83305000 D xnf_cd -ffffffff83306000 D xbf_cd -ffffffff83307000 D hv_msg_dispatch -ffffffff83307110 D hv_timecounter -ffffffff83307160 D hyperv_cd -ffffffff83308000 d hv_ic_devs -ffffffff83309000 D hvn_cd -ffffffff8330a000 D hvs_cd -ffffffff8330b000 D virtio_cd -ffffffff8330c000 D vio_cd -ffffffff8330d000 D vioblk_cd -ffffffff8330e000 D viomb_cd -ffffffff8330f000 D viornd_cd -ffffffff83310000 D vioscsi_cd -ffffffff83311000 D vmmci_cd -ffffffff83312000 D pci_cd -ffffffff83313000 D arc_fw_hdr -ffffffff83313008 D arc_cd -ffffffff83314000 D jmb_cd -ffffffff83315000 D mfii_cd -ffffffff83316000 D ips_cd -ffffffff83317000 D eap_cd -ffffffff83318000 D auacer_cd -ffffffff83319000 D auich_cd -ffffffff8331a000 D azalia_cd -ffffffff8331b000 D envy_cd -ffffffff8331b020 D envy_matchids -ffffffff8331b030 D envy_rates -ffffffff8331b0b0 D ak4524_dac -ffffffff8331b0d8 D ak4524_adc -ffffffff8331b100 D ak4358_dac -ffffffff8331b128 D ak5365_adc -ffffffff8331b150 D unkenvy_codec -ffffffff8331b180 D envy_cards -ffffffff8331b3f0 D envy_cards_ht -ffffffff8331b600 d julia_eeprom -ffffffff8331c000 D emu_cd -ffffffff8331d000 D auixp_cd -ffffffff8331e000 D clcs_cd -ffffffff8331f000 D yds_cd -ffffffff83320000 D auvia_cd -ffffffff83321000 D qle_cd -ffffffff83322000 D mpii_cd -ffffffff83323000 D aq_cd -ffffffff83324000 D de_cd -ffffffff83325000 D pcn_cd -ffffffff83326000 D wdc_sii3114_vtbl -ffffffff83326038 D wdc_pdc203xx_vtbl -ffffffff83326070 D wdc_svwsata_vtbl -ffffffff833260a8 D pciide_cd -ffffffff833260d0 d sis_hostbr_type -ffffffff83327000 D ppb_cd -ffffffff83328000 D vr_cd -ffffffff83328020 D vr_devices -ffffffff83329000 D txp_cd -ffffffff8332a000 D bt848_card_signature -ffffffff8332b000 D bktr_cd -ffffffff8332c000 D em_cd -ffffffff8332d000 D ixgb_cd -ffffffff8332e000 D ix_cd -ffffffff8332e020 D ixgbe_smart_speed -ffffffff8332e024 D ixgbe_enable_msix -ffffffff8332f000 D ixl_cd -ffffffff8332f020 d ixl_sff_lock -ffffffff83330000 D xge_cd -ffffffff83331000 D thtc_cd -ffffffff83331020 D tht_cd -ffffffff83331040 D tht_txt_desc -ffffffff83331068 D tht_rxf_desc -ffffffff83331090 D tht_rxd_desc -ffffffff833310b8 D tht_txf_desc -ffffffff83332000 D myx_cd -ffffffff83333000 D oce_cd -ffffffff83334000 D dc_devs -ffffffff83335000 D cas_cd -ffffffff83336000 D sis_cd -ffffffff83337000 D se_cd -ffffffff83338000 D mbg_cd -ffffffff83339000 D cbb_cd -ffffffff83339020 D yc_chipsets -ffffffff833391b0 d pccbb_funcs -ffffffff833391e0 d pccbb_pcmcia_funcs -ffffffff8333a000 D skc_cd -ffffffff8333a020 D sk_cd -ffffffff8333b000 D mskc_cd -ffffffff8333b020 D msk_cd -ffffffff8333c000 D puc_cd -ffffffff8333d000 D puc_ndevs -ffffffff8333e000 D iwi_cd -ffffffff8333f000 D wpi_cd -ffffffff83340000 D iwn_cd -ffffffff83341000 D iwm_cd -ffffffff83342000 D iwx_cd -ffffffff83343000 D cmpci_cd -ffffffff83344000 D iha_cd -ffffffff83345000 D pcscp_cd -ffffffff83345020 D pcscp_glue -ffffffff83346000 D bge_cd -ffffffff83347000 D bnx_firmwares -ffffffff83347160 D bnx_rv2ps -ffffffff833471c0 D bnx_cd -ffffffff833471e0 d flash_5709 -ffffffff83347210 d flash_table -ffffffff83348000 D vge_cd -ffffffff83349000 D stge_cd -ffffffff8334a000 D nfe_cd -ffffffff8334b000 D et_cd -ffffffff8334c000 D jme_cd -ffffffff8334d000 D age_cd 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nd6_umaxtries +ffffffff83298018 D nd6_mmaxtries +ffffffff8329801c D nd6_gctimer +ffffffff83298020 D nd6_maxndopt +ffffffff83298028 D nd6_mtx +ffffffff83298038 D nd6_list +ffffffff83299000 d dadq +ffffffff8329a000 D pfkeyv2_mtx +ffffffff8329a010 d pfkeyv2_seq +ffffffff8329b000 D sadb_exts_allowed_in +ffffffff8329b090 D sadb_exts_required_in +ffffffff8329c000 D cold +ffffffff8329d000 D bdevsw +ffffffff8329d460 D nblkdev +ffffffff8329d470 D cdevsw +ffffffff8329f400 D nchrdev +ffffffff8329f404 D mem_no +ffffffff8329f408 D swapdev +ffffffff8329f410 D constab +ffffffff832a0000 D machine +ffffffff832a0008 D cpu_idle_cycle_fcn +ffffffff832a0010 D lid_action +ffffffff832a0014 D pwr_action +ffffffff832a0018 D isa_constraint +ffffffff832a0028 D dma_constraint +ffffffff832a0040 D uvm_md_constraints +ffffffff832a0058 D delay_func +ffffffff832a0060 D initclock_func +ffffffff832a0068 D startclock_func +ffffffff832a0070 D bootinfo_size +ffffffff832a0074 D waittime +ffffffff832a0078 D dumpmag +ffffffff832a1000 D tsc_rdtsc +ffffffff832a1008 D tsc_timecounter +ffffffff832a1058 D tsc_is_synchronized +ffffffff832a2000 D local_apic +ffffffff832a2020 D lapic_id +ffffffff832a2080 D lapic_tpr +ffffffff832a20a0 d lapic_ppr +ffffffff832a2100 d lapic_isr +ffffffff832a3000 D warn_once +ffffffff832a4000 d errata +ffffffff832a5000 D cpu_ucode_mtx +ffffffff832a6000 D mem_owner_bios +ffffffff832a6008 D mrops +ffffffff832a6028 D mtrrmask +ffffffff832a6030 D mtrrtomrt +ffffffff832a7000 D pmap_pg_wc +ffffffff832a7008 D pmaps_lock +ffffffff832a7018 d pmap_maxkvaddr +ffffffff832a8000 D kv_physwait +ffffffff832a9000 D fpu_save_len +ffffffff832aa000 D i8259_pic +ffffffff832ab000 D softintr_pic +ffffffff832ac000 D ipifunc +ffffffff832ad000 D setperf_mp_mutex +ffffffff832ae000 D db_Grp6 +ffffffff832ae040 D db_Grp7 +ffffffff832ae100 D db_Grp8 +ffffffff832ae140 D db_Grp9 +ffffffff832ae200 D db_GrpA +ffffffff832ae240 D db_GrpB +ffffffff832ae280 D db_GrpC +ffffffff832ae2c0 D db_inst_0f0x +ffffffff832ae440 D db_inst_0f2x +ffffffff832ae5c0 D db_inst_0f3x +ffffffff832ae740 D db_inst_0f8x +ffffffff832ae8c0 D db_inst_0f9x +ffffffff832aea40 D db_inst_0fax +ffffffff832aebc0 D db_inst_0fbx +ffffffff832aed40 D db_inst_0fcx +ffffffff832aeec0 D db_inst_0f +ffffffff832aef40 D db_Esc92 +ffffffff832aef80 D db_Esc94 +ffffffff832aefc0 D db_Esc95 +ffffffff832af000 D db_Esc96 +ffffffff832af040 D db_Esc97 +ffffffff832af080 D db_Esca5 +ffffffff832af0c0 D db_Escb4 +ffffffff832af100 D db_Esce3 +ffffffff832af140 D db_Escf4 +ffffffff832af180 D db_Esc8 +ffffffff832af240 D db_Esc9 +ffffffff832af300 D db_Esca +ffffffff832af3c0 D db_Escb +ffffffff832af480 D db_Escc +ffffffff832af540 D db_Escd +ffffffff832af600 D db_Esce +ffffffff832af6c0 D db_Escf +ffffffff832af780 D db_Esc_inst +ffffffff832af7c0 D db_Grp1 +ffffffff832af800 D db_Grp2 +ffffffff832af840 D db_Grp3 +ffffffff832af900 D db_Grp4 +ffffffff832af9c0 D db_Grp5 +ffffffff832afa80 D db_inst_table +ffffffff832b1280 D db_bad_inst +ffffffff832b12a0 D db_index_reg_16 +ffffffff832b12e0 D db_reg +ffffffff832b14e0 D db_seg_reg +ffffffff832b1520 D db_lengths +ffffffff832b2000 D db_regs +ffffffff832b21e0 D db_eregs +ffffffff832b21f0 D db_reg_args +ffffffff832b3000 D timer_mutex +ffffffff832b3010 d i8254_timecounter +ffffffff832b4000 D spleen8x16 +ffffffff832b4058 D spleen12x24 +ffffffff832b40b0 D spleen16x32 +ffffffff832b4108 D spleen32x64 +ffffffff832b4160 d builtin_fonts +ffffffff832b41e0 d wsfont_add.cookiegen +ffffffff832b41f0 d spleen8x16_data +ffffffff832b4ff0 d spleen12x24_data +ffffffff832b79f0 d spleen16x32_data +ffffffff832bb1f0 d spleen32x64_data +ffffffff832ca000 D nsphy_cd +ffffffff832cb000 D nsphyter_cd +ffffffff832cc000 D gentbi_cd +ffffffff832cd000 D qsphy_cd +ffffffff832ce000 D inphy_cd +ffffffff832cf000 D iophy_cd +ffffffff832d0000 D eephy_cd +ffffffff832d1000 D exphy_cd +ffffffff832d2000 D rlphy_cd +ffffffff832d3000 D lxtphy_cd +ffffffff832d4000 D luphy_cd +ffffffff832d5000 D mtdphy_cd +ffffffff832d6000 D icsphy_cd +ffffffff832d7000 D sqphy_cd +ffffffff832d8000 D tqphy_cd +ffffffff832d9000 D ukphy_cd +ffffffff832da000 D dcphy_cd +ffffffff832db000 D bmtphy_cd +ffffffff832dc000 D brgphy_cd +ffffffff832dd000 D xmphy_cd +ffffffff832de000 D amphy_cd +ffffffff832df000 D acphy_cd +ffffffff832e0000 D nsgphy_cd +ffffffff832e1000 D urlphy_cd +ffffffff832e2000 D rgephy_cd +ffffffff832e3000 D ciphy_cd +ffffffff832e4000 D ipgphy_cd +ffffffff832e5000 D etphy_cd +ffffffff832e6000 D jmphy_cd +ffffffff832e7000 D atphy_cd +ffffffff832e8000 D scsi_autoconf +ffffffff832e8008 D scsibus_cd +ffffffff832e9000 D cd_cd +ffffffff832ea000 D ch_cd +ffffffff832ea020 D chquirks +ffffffff832eb000 D sd_cd +ffffffff832ec000 D st_cd +ffffffff832ed000 D uk_cd +ffffffff832ee000 D safte_cd +ffffffff832ef000 D ses_cd +ffffffff832f0000 D sym_cd +ffffffff832f0020 D sym_devices +ffffffff832f0070 D asym_devices +ffffffff832f1000 D rdac_cd +ffffffff832f1020 D rdac_devices +ffffffff832f2000 D emc_cd +ffffffff832f2020 D emc_devices +ffffffff832f3000 D hds_cd +ffffffff832f3020 D hds_devices +ffffffff832f4000 D atapiscsi_cd +ffffffff832f5000 D wd_cd +ffffffff832f5020 d wddumpmulti +ffffffff832f6000 D mainbus_cd +ffffffff832f6020 D mba_iba +ffffffff832f7000 D bios_cd +ffffffff832f7020 D smbios_uninfo +ffffffff832f8000 D mpbios_cd +ffffffff832f8020 d mp_conf +ffffffff832f8070 d extint_bus +ffffffff832f80a0 d smi_bus +ffffffff832f80d0 d nmi_bus +ffffffff832f9000 D cpu_info_full_primary +ffffffff832fc000 D cpu_info_list +ffffffff832fc008 D mp_cpu_funcs +ffffffff832fc020 D cpu_cd +ffffffff832fc040 D cpu_info +ffffffff832fd000 D local_pic +ffffffff832fd098 D lapic_readreg +ffffffff832fd0a0 D lapic_writereg +ffffffff832fd0a8 D x86_ipi +ffffffff832fe000 D ioapic_cold +ffffffff832fe008 D ioapic_cd +ffffffff832ff000 D efifb_std_descr +ffffffff832ff030 D efifb_descrs +ffffffff832ff038 D efifb_accessops +ffffffff832ff098 D efifb_cd +ffffffff83300000 D pvbus_cd +ffffffff83300020 D pvbus_types +ffffffff833000e0 D pvbus_dma_tag +ffffffff83301000 D pvclock_cd +ffffffff83301020 D pvclock_timecounter +ffffffff83302000 D vmt_tclo_rpc +ffffffff833020d0 D vmt_cd +ffffffff83303000 D xen_cd +ffffffff83303020 D xen_bus_dma_tag +ffffffff83304000 D xnf_cd +ffffffff83305000 D xbf_cd +ffffffff83306000 D hv_msg_dispatch +ffffffff83306110 D hv_timecounter +ffffffff83306160 D hyperv_cd +ffffffff83307000 d hv_ic_devs +ffffffff83308000 D hvn_cd +ffffffff83309000 D hvs_cd +ffffffff8330a000 D virtio_cd +ffffffff8330b000 D vio_cd +ffffffff8330c000 D vioblk_cd +ffffffff8330d000 D viomb_cd +ffffffff8330e000 D viornd_cd +ffffffff8330f000 D vioscsi_cd +ffffffff83310000 D vmmci_cd +ffffffff83311000 D pci_cd +ffffffff83312000 D arc_fw_hdr +ffffffff83312008 D arc_cd +ffffffff83313000 D jmb_cd +ffffffff83314000 D mfii_cd +ffffffff83315000 D ips_cd +ffffffff83316000 D eap_cd +ffffffff83317000 D auacer_cd +ffffffff83318000 D auich_cd +ffffffff83319000 D azalia_cd +ffffffff8331a000 D envy_cd +ffffffff8331a020 D envy_matchids +ffffffff8331a030 D envy_rates +ffffffff8331a0b0 D ak4524_dac +ffffffff8331a0d8 D ak4524_adc +ffffffff8331a100 D ak4358_dac +ffffffff8331a128 D ak5365_adc +ffffffff8331a150 D unkenvy_codec +ffffffff8331a180 D envy_cards +ffffffff8331a3f0 D envy_cards_ht +ffffffff8331a600 d julia_eeprom +ffffffff8331b000 D emu_cd +ffffffff8331c000 D auixp_cd +ffffffff8331d000 D clcs_cd +ffffffff8331e000 D yds_cd +ffffffff8331f000 D auvia_cd +ffffffff83320000 D qle_cd +ffffffff83321000 D mpii_cd +ffffffff83322000 D aq_cd +ffffffff83323000 D de_cd +ffffffff83324000 D pcn_cd +ffffffff83325000 D wdc_sii3114_vtbl +ffffffff83325038 D wdc_pdc203xx_vtbl +ffffffff83325070 D wdc_svwsata_vtbl +ffffffff833250a8 D pciide_cd +ffffffff833250d0 d sis_hostbr_type +ffffffff83326000 D ppb_cd +ffffffff83327000 D vr_cd +ffffffff83327020 D vr_devices +ffffffff83328000 D txp_cd +ffffffff83329000 D bt848_card_signature +ffffffff8332a000 D bktr_cd +ffffffff8332b000 D em_cd +ffffffff8332c000 D ixgb_cd +ffffffff8332d000 D ix_cd +ffffffff8332d020 D ixgbe_smart_speed +ffffffff8332d024 D ixgbe_enable_msix +ffffffff8332e000 D ixl_cd +ffffffff8332e020 d ixl_sff_lock +ffffffff8332f000 D xge_cd +ffffffff83330000 D thtc_cd +ffffffff83330020 D tht_cd +ffffffff83330040 D tht_txt_desc +ffffffff83330068 D tht_rxf_desc +ffffffff83330090 D tht_rxd_desc +ffffffff833300b8 D tht_txf_desc +ffffffff83331000 D myx_cd +ffffffff83332000 D oce_cd +ffffffff83333000 D dc_devs +ffffffff83334000 D cas_cd +ffffffff83335000 D sis_cd +ffffffff83336000 D se_cd +ffffffff83337000 D mbg_cd +ffffffff83338000 D cbb_cd +ffffffff83338020 D yc_chipsets +ffffffff833381b0 d pccbb_funcs +ffffffff833381e0 d pccbb_pcmcia_funcs +ffffffff83339000 D skc_cd +ffffffff83339020 D sk_cd +ffffffff8333a000 D mskc_cd +ffffffff8333a020 D msk_cd +ffffffff8333b000 D puc_cd +ffffffff8333c000 D puc_ndevs +ffffffff8333d000 D iwi_cd +ffffffff8333e000 D wpi_cd +ffffffff8333f000 D iwn_cd +ffffffff83340000 D iwm_cd +ffffffff83341000 D iwx_cd +ffffffff83342000 D cmpci_cd +ffffffff83343000 D iha_cd +ffffffff83344000 D pcscp_cd +ffffffff83344020 D pcscp_glue +ffffffff83345000 D bge_cd +ffffffff83346000 D bnx_firmwares +ffffffff83346160 D bnx_rv2ps +ffffffff833461c0 D bnx_cd +ffffffff833461e0 d flash_5709 +ffffffff83346210 d flash_table +ffffffff83347000 D vge_cd +ffffffff83348000 D stge_cd +ffffffff83349000 D nfe_cd +ffffffff8334a000 D et_cd +ffffffff8334b000 D jme_cd +ffffffff8334c000 D age_cd +ffffffff8334d000 D alc_dma_burst +ffffffff8334d020 D alc_cd +ffffffff8334e000 D ale_cd +ffffffff8334f000 D amdpm_cd +ffffffff8334f020 d amdpm_timecounter +ffffffff83350000 D bce_cd +ffffffff83351000 D rtwn_cd +ffffffff83352000 d ral_rt2560_opns +ffffffff83352028 d ral_rt2661_opns +ffffffff83352050 d ral_rt2860_opns +ffffffff83353000 D piixpm_cd +ffffffff83354000 D vic_cd +ffffffff83355000 D vmx_cd +ffffffff83356000 D vmwpvs_cd +ffffffff83357000 D lii_cd +ffffffff83358000 D ichiic_cd +ffffffff83359000 D viapm_cd +ffffffff83359020 d viapm_timecounter +ffffffff8335a000 D amdiic_cd +ffffffff8335b000 D nviic_cd +ffffffff8335c000 D kate_cd +ffffffff8335d000 D km_cd +ffffffff8335e000 D cpu_model_offsets +ffffffff8335e070 D ksmn_cd +ffffffff8335f000 D itherm_cd +ffffffff83360000 D pchtemp_cd +ffffffff83361000 D xspd_cd +ffffffff83362000 D virtio_pci_ops +ffffffff83363000 D bwfm_pci_buscore_ops +ffffffff83363030 D bwfm_pci_bus_ops +ffffffff83363058 D bwfm_pci_msgbuf_ops +ffffffff83364000 D bnxt_cd +ffffffff83365000 D mcx_cd +ffffffff83366000 D iavf_cd +ffffffff83367000 D rge_cd +ffffffff83368000 D igc_cd +ffffffff83369000 D ngbe_cd +ffffffff8336a000 D agp_cd +ffffffff8336b000 D intagp_cd +ffffffff8336b020 D agp_i810_methods +ffffffff8336c000 D reservation_ww_class +ffffffff8336d000 d bridge_lock +ffffffff8336d010 d bridge_list +ffffffff8336e000 d drm_connector_enum_list +ffffffff8336e1f8 d connector_list_lock +ffffffff8336e208 d connector_list +ffffffff8336f000 d kernel_fb_helper_list +ffffffff8336f010 d kernel_fb_helper_lock +ffffffff83370000 D drm_global_mutex +ffffffff83371000 D i2c_bit_algo +ffffffff83371010 d drm_fence_context_count +ffffffff83371018 d dma_fence_stub_mtx +ffffffff83371028 D wait_bit_mtx +ffffffff83371038 D shrinkers +ffffffff83372000 d crtc_ww_class +ffffffff83373000 d panel_lock +ffffffff83373010 d panel_list +ffffffff83374000 d ttm_global_mutex +ffffffff83375000 D drm_sched_policy +ffffffff83376000 D intel_bbops +ffffffff83377000 d i915_sys_placement +ffffffff83377020 d i915_ttm_bo_driver +ffffffff83378000 d mchdev_lock +ffffffff83379000 D inteldrm_stdscreen +ffffffff83379030 D inteldrm_scrlist +ffffffff83379038 D inteldrm_screenlist +ffffffff83379048 D inteldrm_accessops +ffffffff833790a8 D inteldrm_cd +ffffffff8337a000 d capture_mutex +ffffffff8337b000 d mitigations +ffffffff8337c000 D i915_modparams +ffffffff8337d000 d schedule_lock +ffffffff8337e000 d unbind_fence_ops +ffffffff8337f000 D intel_graphics_stolen_res +ffffffff83380000 D btc_valid_sclk +ffffffff83381000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff83381020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff83382000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff83382008 d r600_cs_packet_parse_vline.vline_status +ffffffff83383000 d r100_asic +ffffffff833832e0 d r200_asic +ffffffff833835c0 d r300_asic_pcie +ffffffff833838a0 d r300_asic +ffffffff83383b80 d r420_asic +ffffffff83383e60 d rs400_asic +ffffffff83384140 d rs600_asic +ffffffff83384420 d rs690_asic +ffffffff83384700 d rv515_asic +ffffffff833849e0 d r520_asic +ffffffff83384cc0 d r600_asic +ffffffff83384fa0 d rv6xx_asic +ffffffff83385280 d rs780_asic +ffffffff83385560 d rv770_asic +ffffffff83385840 d evergreen_asic +ffffffff83385b20 d sumo_asic +ffffffff83385e00 d btc_asic +ffffffff833860e0 d cayman_asic +ffffffff833863c0 d trinity_asic +ffffffff833866a0 d si_asic +ffffffff83386980 d ci_asic +ffffffff83386c60 d kv_asic +ffffffff83387000 d dce6_funcs +ffffffff83387018 d dce6_hdmi_funcs +ffffffff83387088 d dce6_dp_funcs +ffffffff833870f8 d dce4_funcs +ffffffff83387110 d dce4_hdmi_funcs +ffffffff83387180 d dce4_dp_funcs +ffffffff833871f0 d dce32_funcs +ffffffff83387208 d dce32_hdmi_funcs +ffffffff83387278 d dce32_dp_funcs +ffffffff833872e8 d r600_funcs +ffffffff83387300 d r600_hdmi_funcs +ffffffff83388000 D radeon_modeset +ffffffff83388004 D radeon_dynclks +ffffffff83388008 D radeon_agpmode +ffffffff8338800c D radeon_gart_size +ffffffff83388010 D radeon_tv +ffffffff83388014 D radeon_audio +ffffffff83388018 D radeon_pcie_gen2 +ffffffff8338801c D radeon_msi +ffffffff83388020 D radeon_lockup_timeout +ffffffff83388024 D radeon_dpm +ffffffff83388028 D radeon_aspm +ffffffff8338802c D radeon_runtime_pm +ffffffff83388030 D radeon_vm_size +ffffffff83388034 D radeon_vm_block_size +ffffffff83388038 D radeon_use_pflipirq +ffffffff8338803c D radeon_bapm +ffffffff83388040 D radeon_backlight +ffffffff83388044 D radeon_auxch +ffffffff83388048 D radeon_uvd +ffffffff8338804c D radeon_vce +ffffffff83388050 D radeon_si_support +ffffffff83388054 D radeon_cik_support +ffffffff83388058 D radeondrm_cd +ffffffff83388078 D radeondrm_stdscreen +ffffffff833880a8 D radeondrm_scrlist +ffffffff833880b0 D radeondrm_screenlist +ffffffff833880c0 D radeondrm_accessops +ffffffff83389000 D radeon_bbops +ffffffff8338a000 d radeon_bo_driver +ffffffff8338b000 d verde_pg_init +ffffffff8338c000 d cac_weights_pitcairn +ffffffff8338c4d0 d cac_weights_oland +ffffffff8338d000 d aldebaran_mode2_handler +ffffffff8338e000 d amdgpu_vbios_version_attrs +ffffffff8338f000 D amdgpu_asic_name +ffffffff83390000 D amdgpu_vram_limit +ffffffff83390004 D amdgpu_gart_size +ffffffff83390008 D amdgpu_gtt_size +ffffffff8339000c D amdgpu_moverate +ffffffff83390010 D amdgpu_audio +ffffffff83390014 D amdgpu_pcie_gen2 +ffffffff83390018 D amdgpu_msi +ffffffff8339001c D amdgpu_dpm +ffffffff83390020 D amdgpu_fw_load_type +ffffffff83390024 D amdgpu_aspm +ffffffff83390028 D amdgpu_runtime_pm +ffffffff8339002c D amdgpu_ip_block_mask +ffffffff83390030 D amdgpu_bapm +ffffffff83390034 D amdgpu_vm_size +ffffffff83390038 D amdgpu_vm_fragment_size +ffffffff8339003c D amdgpu_vm_block_size +ffffffff83390040 D amdgpu_vm_update_mode +ffffffff83390044 D amdgpu_dc +ffffffff83390048 D amdgpu_sched_jobs +ffffffff8339004c D amdgpu_sched_hw_submission +ffffffff83390050 D amdgpu_cg_mask +ffffffff83390058 D amdgpu_pg_mask +ffffffff8339005c D amdgpu_sdma_phase_quantum +ffffffff83390060 D amdgpu_pp_feature_mask +ffffffff83390064 D amdgpu_lbpw +ffffffff83390068 D amdgpu_compute_multipipe +ffffffff8339006c D amdgpu_gpu_recovery +ffffffff83390070 D amdgpu_smu_pptable_id +ffffffff83390074 D amdgpu_dc_feature_mask +ffffffff83390078 D amdgpu_async_gfx_ring +ffffffff8339007c D amdgpu_mcbp +ffffffff83390080 D amdgpu_discovery +ffffffff83390084 D amdgpu_noretry +ffffffff83390088 D amdgpu_force_asic_type +ffffffff8339008c D amdgpu_tmz +ffffffff83390090 D amdgpu_reset_method +ffffffff83390094 D amdgpu_num_kcq +ffffffff83390098 D amdgpu_use_xgmi_p2p +ffffffff8339009c D amdgpu_sg_display +ffffffff833900a0 D amdgpu_user_partt_mode +ffffffff833900a8 D mgpu_info +ffffffff83390558 D amdgpu_ras_enable +ffffffff8339055c D amdgpu_ras_mask +ffffffff83390560 D amdgpu_bad_page_threshold +ffffffff83390564 D amdgpu_backlight +ffffffff83390568 D amdgpu_cd +ffffffff83390588 D amdgpu_stdscreen +ffffffff833905b8 D amdgpu_scrlist +ffffffff833905c0 D amdgpu_screenlist +ffffffff833905d0 D amdgpu_accessops +ffffffff83391000 d amdgpu_gtt_mgr_attributes +ffffffff83392000 D amdgpu_bbops +ffffffff83393000 D soc15_ih_clientid_name +ffffffff83394000 D ras_error_string +ffffffff83394030 D ras_block_string +ffffffff833940c0 D ras_mca_block_string +ffffffff83395000 d amdgpu_bo_driver +ffffffff83396000 d amdgpu_vram_mgr_attributes +ffffffff83397000 d xgmi_mutex +ffffffff83397010 D xgmi_ras_hw_ops +ffffffff83397050 D xgmi_ras +ffffffff83398000 D aqua_vanjaram_xcp_funcs +ffffffff83399000 D gfx_v11_0_3_ras +ffffffff8339a000 d gfx_v9_0_ras +ffffffff8339b000 D gfx_v9_4_ras +ffffffff8339c000 D gfx_v9_4_2_ras_ops +ffffffff8339c040 D gfx_v9_4_2_ras +ffffffff8339d000 D gfx_v9_4_3_xcp_funcs +ffffffff8339d020 D gfx_v9_4_3_ras_ops +ffffffff8339d060 D gfx_v9_4_3_ras +ffffffff8339e000 D gfxhub_v1_2_xcp_funcs +ffffffff8339f000 D hdp_v4_0_ras_hw_ops +ffffffff8339f040 D hdp_v4_0_ras +ffffffff833a0000 d jpeg_v2_6_ras +ffffffff833a1000 d jpeg_v4_0_ras +ffffffff833a2000 d jpeg_v4_0_3_ras +ffffffff833a3000 D mca_v3_0_mp0_ras +ffffffff833a3058 D mca_v3_0_mp1_ras +ffffffff833a30b0 D mca_v3_0_mpio_ras +ffffffff833a4000 D mmhub_v1_0_ras_hw_ops +ffffffff833a4040 D mmhub_v1_0_ras +ffffffff833a5000 D mmhub_v1_7_ras_hw_ops +ffffffff833a5040 D mmhub_v1_7_ras +ffffffff833a6000 D mmhub_v1_8_ras +ffffffff833a7000 D mmhub_v9_4_ras +ffffffff833a8000 D nbio_v4_3_ras +ffffffff833a9000 D nbio_v7_4_ras +ffffffff833aa000 D nbio_v7_9_ras +ffffffff833ab000 d sriov_sc_video_codecs_encode +ffffffff833ab010 d sriov_sc_video_codecs_decode_vcn1 +ffffffff833ab020 d sriov_sc_video_codecs_decode_vcn0 +ffffffff833ab030 d sriov_sc_video_codecs_encode_array +ffffffff833ab060 d sriov_sc_video_codecs_decode_array_vcn1 +ffffffff833ab0f0 d sriov_sc_video_codecs_decode_array_vcn0 +ffffffff833ac000 d sdma_v4_0_ras +ffffffff833ad000 D sdma_v4_4_ras +ffffffff833ae000 D sdma_v4_4_2_xcp_funcs +ffffffff833ae020 d sdma_v4_4_2_ras +ffffffff833af000 d sdma_v6_0_3_ras +ffffffff833b0000 d sienna_cichlid_mode2_handler +ffffffff833b1000 d smu_v13_0_10_mode2_handler +ffffffff833b2000 d sriov_vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff833b2010 d sriov_vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff833b2020 d sriov_vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff833b2030 d sriov_vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff833b2040 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff833b2070 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff833b2100 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn0 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dcn3_funcs +ffffffff833c6000 d vg_funcs +ffffffff833c6090 d dummy_clocks +ffffffff833c61c0 d vg_bw_params +ffffffff833c7000 d dcn31_funcs +ffffffff833c7090 d dcn31_bw_params +ffffffff833c8000 d dcn314_funcs +ffffffff833c8090 d dcn314_bw_params +ffffffff833c9000 d dcn315_funcs +ffffffff833c9090 d dcn315_bw_params +ffffffff833ca000 d dcn316_funcs +ffffffff833ca090 d dcn316_bw_params +ffffffff833cb000 d dcn32_funcs +ffffffff833cc000 d dcn10_dpp_cap +ffffffff833cd000 d dcn20_dpp_funcs +ffffffff833cd110 d dcn20_dpp_cap +ffffffff833ce000 d dcn20_hubp_funcs +ffffffff833cf000 d dcn20_opp_funcs +ffffffff833d0000 d dcn20_tg_funcs +ffffffff833d1000 d dcn201_dpp_funcs +ffffffff833d1110 d dcn201_dpp_cap +ffffffff833d2000 d dcn201_hubp_funcs +ffffffff833d3000 d dcn201_opp_funcs +ffffffff833d4000 d dcn201_tg_funcs +ffffffff833d5000 d dcn201_res_pool_funcs +ffffffff833d50f8 d dcn201_ip +ffffffff833d52b0 d dcn201_soc +ffffffff833d7000 d dcn21_hubp_funcs +ffffffff833d8000 d dcn30_afmt_funcs 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dcn32_tg_funcs +ffffffff833f0000 d dcn32_res_pool_funcs +ffffffff833f1000 d dcn321_res_pool_funcs +ffffffff833f2000 D dcn1_0_ip +ffffffff833f21b8 D dcn1_0_soc +ffffffff833f4000 D dcn2_0_ip +ffffffff833f41b8 D dcn2_0_nv14_ip +ffffffff833f4370 D dcn2_0_soc +ffffffff833f56a8 D dcn2_0_nv14_soc +ffffffff833f69e0 D dcn2_0_nv12_soc +ffffffff833f7d18 D dcn2_1_ip +ffffffff833f7ed0 D dcn2_1_soc +ffffffff833f9208 D ddr4_wm_table_gs +ffffffff833f92c8 D lpddr4_wm_table_gs +ffffffff833f9388 D lpddr4_wm_table_with_disabled_ppt +ffffffff833f9448 D ddr4_wm_table_rn +ffffffff833f9508 D ddr4_1R_wm_table_rn +ffffffff833f95c8 D lpddr4_wm_table_rn +ffffffff833fa000 D dcn3_0_ip +ffffffff833fa1b8 D dcn3_0_soc +ffffffff833fc000 D dcn3_01_ip +ffffffff833fc1b8 D dcn3_01_soc +ffffffff833fd4f0 D ddr4_wm_table +ffffffff833fd5b0 D lpddr5_wm_table +ffffffff833fe000 D dcn3_02_ip +ffffffff833fe1b8 D dcn3_02_soc +ffffffff83400000 D dcn3_03_ip +ffffffff834001b8 D dcn3_03_soc +ffffffff83402000 D dcn3_1_ip +ffffffff834021b8 D dcn3_15_ip +ffffffff83402370 D dcn3_16_ip +ffffffff83402528 d dcn3_15_soc +ffffffff83403860 d dcn3_1_soc +ffffffff83404b98 d dcn3_16_soc +ffffffff83406000 D dcn3_14_ip +ffffffff834061b8 d dcn3_14_soc +ffffffff83408000 D dcn3_2_ip +ffffffff834081b8 D dcn3_2_soc +ffffffff8340a000 D dcn3_21_ip +ffffffff8340a1b8 D dcn3_21_soc +ffffffff8340c000 d dsc_policy_max_target_bpp_limit +ffffffff8340d000 D DIDTEDCConfig_P12 +ffffffff8340d070 d smu7_profiling +ffffffff8340e000 d cyan_skillfish_table_map +ffffffff8340e080 d cyan_skillfish_message_map +ffffffff8340f000 d navi10_table_map +ffffffff8340f080 d navi10_pwr_src_map +ffffffff8340f090 d navi10_workload_map +ffffffff8340f0e0 d navi10_message_map +ffffffff8340fb60 d navi10_clk_map +ffffffff8340fc20 d navi10_feature_mask_map +ffffffff83410000 d sienna_cichlid_table_map +ffffffff83410080 d sienna_cichlid_pwr_src_map +ffffffff83410090 d sienna_cichlid_workload_map +ffffffff834100e0 d sienna_cichlid_message_map +ffffffff83410b60 d sienna_cichlid_clk_map +ffffffff83410c20 d sienna_cichlid_feature_mask_map +ffffffff83411000 d vangogh_message_map +ffffffff83411a80 d vangogh_table_map +ffffffff83411b00 d vangogh_workload_map +ffffffff83411b50 d vangogh_feature_mask_map +ffffffff83412000 d renoir_table_map +ffffffff83412080 d renoir_workload_map +ffffffff834120d0 d renoir_message_map +ffffffff83412b50 d renoir_clk_map +ffffffff83413000 d smu_v13_0_0_message_map +ffffffff83413a80 d smu_v13_0_0_feature_mask_map +ffffffff83413e50 d smu_v13_0_0_table_map +ffffffff83413ed0 d smu_v13_0_0_pwr_src_map +ffffffff83413ee0 d smu_v13_0_0_workload_map +ffffffff83413f30 d smu_v13_0_0_clk_map +ffffffff83414000 d smu_v13_0_4_table_map +ffffffff83414080 d smu_v13_0_4_message_map +ffffffff83414b00 d smu_v13_0_4_feature_mask_map +ffffffff83415000 d smu_v13_0_5_table_map +ffffffff83415080 d smu_v13_0_5_message_map +ffffffff83415b00 d smu_v13_0_5_feature_mask_map +ffffffff83416000 d smu_v13_0_7_message_map +ffffffff83416a80 d smu_v13_0_7_feature_mask_map +ffffffff83416e50 d smu_v13_0_7_table_map +ffffffff83416ed0 d smu_v13_0_7_pwr_src_map +ffffffff83416ee0 d smu_v13_0_7_workload_map +ffffffff83416f30 d smu_v13_0_7_clk_map +ffffffff83417000 d yellow_carp_table_map +ffffffff83417080 d yellow_carp_message_map +ffffffff83417b00 d yellow_carp_feature_mask_map +ffffffff83418000 D pci_conf_lock +ffffffff83418010 D pci_bus_dma_tag +ffffffff83418088 D msi_pic +ffffffff83418120 D msix_pic +ffffffff83419000 D pchb_cd +ffffffff8341a000 D amas_cd +ffffffff8341b000 D cardslot_cd +ffffffff8341c000 D cardbus_cd +ffffffff8341d000 d csdevs +ffffffff8341e000 d ral_rt2560_opns +ffffffff8341e028 d ral_rt2661_opns +ffffffff8341e050 d ral_rt2860_opns +ffffffff8341f000 D pcmcia_cd +ffffffff83420000 D pcmcia_3cxem556_func0 +ffffffff834200b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff83420158 D pcmcia_megahertz_xjem1144_func0 +ffffffff83420210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff834202b0 d pcmcia_3cxem556_func1 +ffffffff83420368 d pcmcia_3cxem556_func1_cfe0 +ffffffff83420408 d pcmcia_megahertz_xjem1144_func1 +ffffffff834204c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff83420560 d pcmcia_sierra_a555_func1 +ffffffff83420618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff834206b8 d pcmcia_sveclancard_func0 +ffffffff83420770 d pcmcia_sveclancard_func0_cfe0 +ffffffff83421000 D ep_pcmcia_prod +ffffffff83422000 D aic_pcmcia_prod +ffffffff83423000 D com_pcmcia_prod +ffffffff83424000 D wdc_pcmcia_pr +ffffffff83425000 D sm_pcmcia_prod +ffffffff83426000 D xe_cd +ffffffff83427000 D pcib_cd +ffffffff83428000 D amdpcib_cd +ffffffff83429000 D tcpcib_cd +ffffffff8342a000 D aapic_cd +ffffffff8342b000 D hme_cd +ffffffff8342c000 D isa_cd +ffffffff8342d000 D isadma_cd +ffffffff8342e000 D fdc_cd +ffffffff8342f000 D fd_types +ffffffff8342f1f8 D fd_cd +ffffffff83430000 D mpu_cd +ffffffff83431000 D pcppi_cd +ffffffff83432000 D spkr_cd +ffffffff83433000 D wbsio_cd +ffffffff83434000 D schsio_cd +ffffffff83435000 D it_cd +ffffffff83436000 D uguru_cd +ffffffff83437000 D aps_cd +ffffffff83438000 D isa_bus_dma_tag +ffffffff83439000 D wsdisplay_cd +ffffffff83439020 D wsdisplay_cons +ffffffff83439058 D wsdisplay_defaultscreens +ffffffff8343a000 D wskbd_cd +ffffffff8343a020 D wskbd_default_bell_data +ffffffff8343a030 D wskbd_default_keyrepeat_data +ffffffff8343a040 D wskbd_srcops +ffffffff8343b000 d compose_tab +ffffffff8343c000 D wsmouse_cd +ffffffff8343c020 D wsmouse_srcops +ffffffff8343d000 D wsmux_srcops +ffffffff8343d030 D wsmux_tree_lock +ffffffff8343e000 D vt100_output +ffffffff8343f000 D pckbd_cd +ffffffff83440000 D pms_cd +ffffffff83440020 d synaptics_params +ffffffff83440030 d alps_params +ffffffff83441000 D skgpio_cd +ffffffff83442000 D pctr_conf_lock +ffffffff83443000 D ukbd_keymapdata +ffffffff83444000 D usbrev_str +ffffffff83444030 D usb_cd +ffffffff83445000 d usbd_ratecheck.errinterval +ffffffff83446000 D uhub_cd +ffffffff83447000 D uaudio_cd +ffffffff83448000 D uvideo_ctrls +ffffffff834482d8 D uvideo_cd +ffffffff83449000 D utvfu_norm_params +ffffffff83449030 D utvfu_cd +ffffffff8344a000 D udl_reg_vals_640x480_60 +ffffffff8344a020 D udl_reg_vals_640x480_67 +ffffffff8344a040 D udl_reg_vals_640x480_72 +ffffffff8344a060 D udl_reg_vals_640x480_75 +ffffffff8344a080 D udl_reg_vals_800x480_61 +ffffffff8344a0a0 D udl_reg_vals_800x600_56 +ffffffff8344a0c0 D udl_reg_vals_800x600_60 +ffffffff8344a0e0 D udl_reg_vals_800x600_72 +ffffffff8344a100 D udl_reg_vals_800x600_74 +ffffffff8344a120 D udl_reg_vals_800x600_75 +ffffffff8344a140 D udl_reg_vals_1024x768_60 +ffffffff8344a160 D udl_reg_vals_1024x768_70 +ffffffff8344a180 D udl_reg_vals_1024x768_75 +ffffffff8344a1a0 D udl_reg_vals_1280x800_60 +ffffffff8344a1c0 D udl_reg_vals_1280x960_60 +ffffffff8344a1e0 D udl_reg_vals_1280x1024_60 +ffffffff8344a200 D udl_reg_vals_1280x1024_75 +ffffffff8344a220 D udl_reg_vals_1366x768_60 +ffffffff8344a240 D udl_reg_vals_1440x900_60 +ffffffff8344a260 D udl_reg_vals_1440x900_59 +ffffffff8344a280 D udl_reg_vals_1440x900_75 +ffffffff8344a2a0 D udl_reg_vals_1680x1050_60 +ffffffff8344a2c0 D udl_reg_vals_1600x1200_60 +ffffffff8344a2e0 D udl_reg_vals_1920x1080_60 +ffffffff8344a300 D udl_null_key_1 +ffffffff8344a310 D udl_decomp_table +ffffffff8344b510 D udl_cd +ffffffff8344b530 D udl_stdscreen +ffffffff8344b560 D udl_scrlist +ffffffff8344b568 D udl_screenlist +ffffffff8344b578 D udl_accessops +ffffffff8344c000 D umidi_cd +ffffffff8344d000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff8344d020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff8344d040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff8344d060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff8344d080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff8344d0a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff8344d0c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff8344d0e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff8344d100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff8344d120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff8344d140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff8344d160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff8344d180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff8344d1a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff8344d1c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff8344d1e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff8344d200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff8344d220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff8344d240 D umidi_quirklist +ffffffff8344d4a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff8344d4c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff8344d4d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff8344d4f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff8344d500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff8344d520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff8344d530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff8344d550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff8344d560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff8344d580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff8344d590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff8344d5b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff8344d5c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff8344d5e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff8344d5f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff8344d610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff8344d620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff8344d640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff8344d650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff8344d670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff8344d680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff8344d6a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff8344d6b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff8344d6d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff8344d6e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff8344d700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff8344d710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff8344d730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff8344d740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff8344d760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff8344d770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff8344d790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff8344d7a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff8344d7c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff8344d7d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff8344d7f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff8344e000 D ucom_cd +ffffffff8344e020 D sysctl_ucomlock +ffffffff8344f000 D ugen_cd +ffffffff83450000 D uhidev_cd +ffffffff83450020 d uhidev_use_rdesc.reportbuf +ffffffff83451000 D uhid_cd +ffffffff83452000 D fido_cd +ffffffff83453000 D ujoy_cd +ffffffff83454000 D ukbd_cd +ffffffff83455000 D ums_cd +ffffffff83455020 d ums_fix_elecom_descriptor.match +ffffffff83456000 D umt_cd +ffffffff83457000 D def_scale +ffffffff83457020 D uts_cd +ffffffff83458000 D ubcmtp_cd +ffffffff83458020 d ubcmtp_wsmousecfg +ffffffff83459000 D ucycom_cd +ffffffff8345a000 D uslhcom_cd +ffffffff8345b000 D ulpt_fwdevs +ffffffff8345b060 D ulpt_cd +ffffffff8345b080 D ulptusein +ffffffff8345c000 D umass_cd +ffffffff8345c020 d umass_bbb_transfer.dCBWtag +ffffffff8345d000 D uthum_cd +ffffffff8345e000 D ugold_cd +ffffffff8345e020 d cmd_init +ffffffff8345e028 d cmd_type +ffffffff8345e030 d cmd_data +ffffffff8345f000 D utrh_cd +ffffffff83460000 D uoakrh_cd +ffffffff83461000 D uoaklux_cd +ffffffff83462000 D uoakv_cd +ffffffff83463000 D uonerng_cd +ffffffff83464000 D urng_cd +ffffffff83465000 D udcf_cd +ffffffff83466000 D umbg_cd +ffffffff83467000 D uvisor_cd +ffffffff83468000 D udsbr_cd +ffffffff83469000 D utwitch_cd +ffffffff8346a000 D aue_cd +ffffffff8346b000 D axe_cd +ffffffff8346c000 D axen_cd +ffffffff8346d000 D smsc_cd +ffffffff8346e000 D cue_devs +ffffffff8346e010 D cue_cd +ffffffff8346f000 D kue_cd +ffffffff83470000 D cdce_cd +ffffffff83471000 D urndis_cd +ffffffff83472000 D mos_cd +ffffffff83473000 D mue_cd +ffffffff83474000 D udav_cd +ffffffff83475000 D upl_devs +ffffffff83475008 D upl_cd +ffffffff83476000 D ugl_devs +ffffffff83476008 D ugl_cd +ffffffff83477000 D url_cd +ffffffff83478000 D ure_cd +ffffffff83479000 D uaq_cd +ffffffff8347a000 D umodem_cd +ffffffff8347b000 D uftdi_cd +ffffffff8347c000 D uplcom_cd +ffffffff8347d000 D umct_cd +ffffffff8347e000 D uvscom_cd +ffffffff8347f000 D ubsa_cd +ffffffff83480000 D ukspan_cd +ffffffff83481000 D uslcom_cd +ffffffff83482000 D uark_cd +ffffffff83483000 D moscom_cd +ffffffff83484000 D umcs_cd +ffffffff83485000 D uscom_cd +ffffffff83486000 D ucrcom_cd +ffffffff83487000 D uxrcom_cd +ffffffff83488000 D uipaq_cd +ffffffff83489000 D umsm_cd +ffffffff8348a000 D uchcom_cd +ffffffff8348b000 D uticom_cd +ffffffff8348c000 D wi_func_usb +ffffffff8348c060 D wi_usb_cd +ffffffff8348d000 D atu_cd +ffffffff8348d020 D atu_devs +ffffffff8348d270 D atu_radfirm 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acpicpu_hids +ffffffff834c8030 d acpicpu_set_pdc.cpu_oscuuid +ffffffff834c9000 D acpihpet_cd +ffffffff834c9020 d hpet_timecounter +ffffffff834ca000 D acpiec_cd +ffffffff834ca020 D acpiec_hids +ffffffff834cb000 D acpitz_cd +ffffffff834cb020 D acpitz_perflevel +ffffffff834cc000 D acpimadt_cd +ffffffff834cd000 D acpimcfg_cd +ffffffff834ce000 D acpiprt_map_list +ffffffff834ce010 D acpiprt_cd +ffffffff834ce030 D acpiprt_pri +ffffffff834cf000 D acpidmar_force_cm +ffffffff834cf008 D acpidmar_cd +ffffffff834cf030 D vtd_faults +ffffffff834d0000 D acpidock_cd +ffffffff834d1000 D abl_cd +ffffffff834d1020 D abl_hids +ffffffff834d2000 D asmc_cd +ffffffff834d2020 D asmc_hids +ffffffff834d3000 D acpiasus_cd +ffffffff834d3020 D acpiasus_hids +ffffffff834d4000 D acpithinkpad_cd +ffffffff834d4020 D acpithinkpad_hids +ffffffff834d5000 D acpitoshiba_cd +ffffffff834d5020 D acpitoshiba_hids +ffffffff834d6000 D acpisony_cd +ffffffff834d7000 D acpivideo_cd +ffffffff834d8000 D acpivout_cd +ffffffff834d9000 D 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tick_nsec +ffffffff834fa00c D initialvnodes +ffffffff834fa010 D maxprocess +ffffffff834fa014 D maxthread +ffffffff834fa018 D maxfiles +ffffffff834fa020 D nmbclust +ffffffff834fa028 D bufcachepercent +ffffffff834fa02c D fscale +ffffffff834fa030 D shminfo +ffffffff834fa044 D seminfo +ffffffff834fb000 D extraloc +ffffffff834fb100 D rextraloc +ffffffff834fb110 D locnames +ffffffff834fb1f0 D locnamp +ffffffff834fb410 D pv_size +ffffffff834fb420 D pv +ffffffff834fb640 d loc +ffffffff834fbad0 D cfdata +ffffffff83502638 D cfroots +ffffffff83502644 D cfroots_size +ffffffff83502650 D pdevnames +ffffffff835027b8 D pdevnames_size +ffffffff835027c0 D pdevinit +ffffffff83503000 D rootdev +ffffffff83503004 D dumpdev +ffffffff83503010 D swdevt +ffffffff83504000 A __kudata_start +ffffffff83504000 D tlb_shoot_first_pcid +ffffffff83504008 D tlb_shoot_addr1 +ffffffff83504010 D tlb_shoot_addr2 +ffffffff83504018 D tlb_shoot_wait +ffffffff83505000 A __kudata_end +ffffffff83505000 C _edata +ffffffff83505000 b drm_minors_idr +ffffffff83505008 B drm_refcnt +ffffffff83506000 B vga_console_screen +ffffffff83506070 B vga_console_attached +ffffffff83506078 B vga_console_vc +ffffffff83506488 B vgaconsole +ffffffff8350648c B vga_console_type +ffffffff83507000 b wdc_alloc_queue.inited +ffffffff83507008 B wdc_xfer_pool +ffffffff835071b0 B wdc_xfer_iopool +ffffffff83508000 B aic_debug +ffffffff83509000 B gdt_cnt +ffffffff83509004 B gdt_polling +ffffffff83509005 B gdt_from_wait +ffffffff83509008 b gdt_exec_ccb.__level +ffffffff8350900c B gdt_wait_index +ffffffff83509010 B gdt_wait_gdt +ffffffff8350a000 B sili_error_pmp_ports +ffffffff8350b000 B ncr53c9x_debug +ffffffff8350b008 b ecb_iopool +ffffffff8350b048 b ecb_pool_initialized +ffffffff8350b050 b ecb_pool +ffffffff8350b1f8 B sdebug +ffffffff8350c000 B epic_copy_small +ffffffff8350d000 B comconsaddr +ffffffff8350d008 B comconsiot +ffffffff8350d010 B comconsioh +ffffffff8350d018 B comconsfreq +ffffffff8350d01c B comcons_reg_width +ffffffff8350d020 B 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db_lbuf_start +ffffffff8353afc0 B db_lbuf_end +ffffffff8353b000 B db_line +ffffffff8353b078 B db_lp +ffffffff8353b080 B db_endlp +ffffffff8353b088 B db_look_char +ffffffff8353b08c B db_look_token +ffffffff8353b090 B db_tok_number +ffffffff8353b0a0 B db_tok_string +ffffffff8353c000 B db_output_position +ffffffff8353c004 B db_output_line +ffffffff8353c008 B db_last_non_space +ffffffff8353c010 b db_stack_dump.intrace +ffffffff8353d000 b db_rint.ddbescape +ffffffff8353e000 B db_run_mode +ffffffff8353e004 B db_loop_count +ffffffff8353e008 B db_sstep_print +ffffffff8353e00c B db_call_depth +ffffffff8353e010 B db_inst_count +ffffffff8353f000 b db_trap.ddb_msg_shown +ffffffff83540000 B db_watch_table +ffffffff83540960 B db_free_watchpoints +ffffffff83540968 B db_watchpoint_list +ffffffff83541000 B db_profile +ffffffff83542000 B audio_record_enable +ffffffff83543000 B constty +ffffffff83543008 B cn_devvp +ffffffff83543010 b cnpollc.refcount +ffffffff83544000 B numvnd +ffffffff83544008 B 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session0 +ffffffff835507a8 B sigacts0 +ffffffff83550950 B limit0 +ffffffff835509e8 B vmspace0 +ffffffff83550b48 B initprocess +ffffffff83550b50 B reaperproc +ffffffff83550b58 B start_init_exec +ffffffff83550b60 B rootvp +ffffffff83550b68 B swapdev_vp +ffffffff83551000 B acctp +ffffffff83551008 B savacctp +ffffffff83551010 B acct_proc +ffffffff83552000 B bufqs +ffffffff83552008 B bufqs_mtx +ffffffff83552018 B bufqs_stop +ffffffff83553000 B hardclock_period +ffffffff83553008 B stathz +ffffffff83553010 B statclock_avg +ffffffff83553018 B statclock_min +ffffffff83553020 B statclock_mask +ffffffff83553024 B profhz +ffffffff83553028 B jiffies +ffffffff83553030 B profprocs +ffffffff83553034 B statclock_is_randomized +ffffffff83554000 B file_pool +ffffffff835541a8 B fdesc_pool +ffffffff83554350 B filehead +ffffffff83554358 B numfiles +ffffffff83555000 B kq_ntimeouts +ffffffff83555008 B kqueue_pool +ffffffff835551b0 B knote_pool +ffffffff83556000 B sigobject +ffffffff83556008 B sigcode_va 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