--- 7.4/2024-02-01T07:17:04Z/2024-01-25T00:00:00Z/nm-bsd-ot14.txt Sun Feb 4 09:52:07 2024 +++ 7.4/2024-02-01T07:17:04Z/2024-01-26T00:00:00Z/nm-bsd-ot14.txt Sun Feb 4 12:42:29 2024 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -025f8000 T __kernel_kutext_phys -025fc000 C __kernel_cptext_phys -025fd000 C __kernel_rodata_phys -02eef000 R __kernel_kutext_page_phys -02ef1000 C __kernel_randomdata_phys -031ae000 R __kernel_data_phys -03504000 D __kernel_kudata_phys -03505000 C __kernel_bss_phys +025f9000 T __kernel_kutext_phys +025fd000 C __kernel_cptext_phys +025fe000 C __kernel_rodata_phys +02ef0000 R __kernel_kutext_page_phys +02ef2000 C __kernel_randomdata_phys +031af000 R __kernel_data_phys +03505000 D __kernel_kudata_phys +03506000 C __kernel_bss_phys 03a00000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -27054,54 +27054,54 @@ ffffffff81d73090 t amdgpu_device_ip_suspend_phase2 ffffffff81d73240 T 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psp_ring_cmd_submit +ffffffff81db1740 T psp_init_asd_microcode +ffffffff81db1810 T psp_init_toc_microcode +ffffffff81db18e0 T psp_init_sos_microcode +ffffffff81db1ef0 T psp_init_ta_microcode +ffffffff81db22f0 T psp_init_cap_microcode +ffffffff81db2490 T is_psp_fw_valid +ffffffff81db24c0 t psp_early_init +ffffffff81db2880 t psp_sw_init +ffffffff81db2bb0 t psp_sw_fini +ffffffff81db2cf0 t psp_hw_init +ffffffff81db3130 t psp_hw_fini +ffffffff81db3570 t psp_suspend +ffffffff81db39e0 t psp_resume +ffffffff81db3d90 t psp_set_clockgating_state +ffffffff81db3dc0 t psp_set_powergating_state +ffffffff81db3df0 t psp_gfx_cmd_name +ffffffff81db3e30 t psp_get_runtime_db_entry +ffffffff81db4030 t psp_free_shared_bufs +ffffffff81db4180 t psp_hw_start +ffffffff81db46c0 t psp_load_non_psp_fw +ffffffff81db49e0 t psp_hdcp_initialize +ffffffff81db4ae0 t psp_dtm_initialize +ffffffff81db4be0 t psp_rap_initialize +ffffffff81db4df0 t psp_load_smu_fw +ffffffff81db4ef0 t psp_securedisplay_terminate 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amdgpu_debugfs_ring_init +ffffffff81dbfda0 T amdgpu_ring_test_helper +ffffffff81dbfe50 T amdgpu_ring_init_mqd +ffffffff81dbff90 T amdgpu_ring_ib_begin +ffffffff81dbffd0 T amdgpu_ring_ib_end +ffffffff81dc0010 T amdgpu_ring_ib_on_emit_cntl +ffffffff81dc0050 T amdgpu_ring_ib_on_emit_ce +ffffffff81dc0090 T amdgpu_ring_ib_on_emit_de +ffffffff81dc1000 T amdgpu_ring_mux_init +ffffffff81dc10d0 t amdgpu_mux_resubmit_fallback +ffffffff81dc1160 T amdgpu_ring_mux_fini +ffffffff81dc1240 T amdgpu_ring_mux_add_sw_ring +ffffffff81dc12c0 T amdgpu_ring_mux_set_wptr +ffffffff81dc1400 t amdgpu_mux_resubmit_chunks +ffffffff81dc1640 t amdgpu_ring_mux_copy_pkt_from_sw_ring +ffffffff81dc1930 T amdgpu_ring_mux_get_wptr +ffffffff81dc19a0 T amdgpu_ring_mux_get_rptr +ffffffff81dc1aa0 T amdgpu_sw_ring_get_rptr_gfx +ffffffff81dc1b00 T amdgpu_sw_ring_get_wptr_gfx +ffffffff81dc1bc0 T amdgpu_sw_ring_set_wptr_gfx +ffffffff81dc1c30 T amdgpu_sw_ring_insert_nop +ffffffff81dc1c90 T amdgpu_sw_ring_name +ffffffff81dc1cd0 T amdgpu_sw_ring_priority +ffffffff81dc1d10 T amdgpu_sw_ring_ib_begin +ffffffff81dc1eb0 T amdgpu_ring_mux_start_ib +ffffffff81dc1fa0 T amdgpu_sw_ring_ib_end +ffffffff81dc2050 T amdgpu_ring_mux_end_ib +ffffffff81dc2160 T amdgpu_sw_ring_ib_mark_offset +ffffffff81dc2220 T amdgpu_ring_mux_ib_mark_offset +ffffffff81dc22d0 T amdgpu_mcbp_handle_trailing_fence_irq +ffffffff81dc3000 T amdgpu_gfx_rlc_enter_safe_mode +ffffffff81dc3090 T amdgpu_gfx_rlc_exit_safe_mode +ffffffff81dc3120 T amdgpu_gfx_rlc_init_sr +ffffffff81dc3280 T amdgpu_gfx_rlc_fini +ffffffff81dc3300 t amdgpu_bo_unreserve +ffffffff81dc33e0 T amdgpu_gfx_rlc_init_csb +ffffffff81dc3510 T amdgpu_gfx_rlc_init_cpt +ffffffff81dc37d0 T amdgpu_gfx_rlc_setup_cp_table +ffffffff81dc39c0 T amdgpu_gfx_rlc_init_microcode +ffffffff81dc5000 T amdgpu_sa_bo_manager_init +ffffffff81dc50e0 T amdgpu_sa_bo_manager_fini +ffffffff81dc5160 T amdgpu_sa_bo_new +ffffffff81dc51d0 T amdgpu_sa_bo_free +ffffffff81dc6000 T amdgpu_sched_ioctl +ffffffff81dc7000 T amdgpu_sdma_get_instance_from_ring +ffffffff81dc7080 T amdgpu_sdma_get_index_from_ring +ffffffff81dc7100 T amdgpu_sdma_get_csa_mc_addr +ffffffff81dc7200 T amdgpu_sdma_ras_late_init +ffffffff81dc72d0 T amdgpu_sdma_process_ras_data_cb +ffffffff81dc7320 T amdgpu_sdma_process_ecc_irq +ffffffff81dc73b0 T amdgpu_sdma_destroy_inst_ctx +ffffffff81dc7430 T amdgpu_sdma_init_microcode +ffffffff81dc77c0 T amdgpu_sdma_unset_buffer_funcs_helper +ffffffff81dc7860 T amdgpu_sdma_ras_sw_init +ffffffff81dc8000 T psp_securedisplay_parse_resp_status +ffffffff81dc81c0 T psp_prep_securedisplay_cmd_buf +ffffffff81dc8230 T amdgpu_securedisplay_debugfs_init +ffffffff81dc9000 T amdgpu_sync_create +ffffffff81dc90b0 T amdgpu_sync_fence +ffffffff81dc91e0 T amdgpu_sync_resv +ffffffff81dc93d0 T amdgpu_sync_peek_fence +ffffffff81dc9500 T amdgpu_sync_get_fence +ffffffff81dc95e0 T amdgpu_sync_clone +ffffffff81dc96e0 T amdgpu_sync_push_to_job +ffffffff81dc9800 T amdgpu_sync_wait +ffffffff81dc98d0 T amdgpu_sync_free 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amdgpu_ucode_print_smc_hdr +ffffffff81dce310 T amdgpu_ucode_print_gfx_hdr +ffffffff81dce3f0 T amdgpu_ucode_print_rlc_hdr +ffffffff81dceb70 T amdgpu_ucode_print_sdma_hdr +ffffffff81dced50 T amdgpu_ucode_print_psp_hdr +ffffffff81dcf300 T amdgpu_ucode_print_gpu_info_hdr +ffffffff81dcf3b0 T amdgpu_ucode_hdr_version +ffffffff81dcf3f0 T amdgpu_ucode_get_load_type +ffffffff81dcf460 T amdgpu_ucode_name +ffffffff81dcf4a0 T amdgpu_ucode_sysfs_init +ffffffff81dcf4d0 T amdgpu_ucode_sysfs_fini +ffffffff81dcf500 T amdgpu_ucode_create_bo +ffffffff81dcf5f0 T amdgpu_ucode_free_bo +ffffffff81dcf620 T amdgpu_ucode_init_bo +ffffffff81dcfbe0 T amdgpu_ucode_ip_version_decode +ffffffff81dd05a0 T amdgpu_ucode_request +ffffffff81dd0640 T amdgpu_ucode_release +ffffffff81dd1000 T amdgpu_umc_page_retirement_mca +ffffffff81dd1170 T amdgpu_umc_poison_handler +ffffffff81dd12e0 t amdgpu_umc_do_page_retirement +ffffffff81dd1530 T amdgpu_umc_process_ras_data_cb +ffffffff81dd1570 T amdgpu_umc_ras_sw_init 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t gfx_v10_0_soft_reset +ffffffff81e0b300 t gfx_v10_0_set_clockgating_state +ffffffff81e0b5b0 t gfx_v10_0_set_powergating_state +ffffffff81e0b670 t gfx_v10_0_get_clockgating_state +ffffffff81e0b780 t gfx_v10_0_get_gpu_clock_counter +ffffffff81e0bc90 t gfx_v10_0_select_se_sh +ffffffff81e0bd30 t gfx_v10_0_read_wave_data +ffffffff81e0bf90 t gfx_v10_0_read_wave_vgprs +ffffffff81e0bfc0 t gfx_v10_0_read_wave_sgprs +ffffffff81e0c040 t gfx_v10_0_select_me_pipe_q +ffffffff81e0c060 t gfx_v10_0_init_spm_golden_registers +ffffffff81e0c0d0 t gfx_v10_0_update_perfmon_mgcg +ffffffff81e0c200 t wave_read_ind +ffffffff81e0c2f0 t wave_read_regs +ffffffff81e0c450 t gfx10_kiq_set_resources +ffffffff81e0c770 t gfx10_kiq_map_queues +ffffffff81e0cb00 t gfx10_kiq_unmap_queues +ffffffff81e0cf00 t gfx10_kiq_query_status +ffffffff81e0d1f0 t gfx10_kiq_invalidate_tlbs +ffffffff81e0d310 t gfx_v10_0_ring_get_rptr_compute +ffffffff81e0d340 t gfx_v10_0_ring_get_wptr_compute +ffffffff81e0d3b0 t gfx_v10_0_ring_set_wptr_compute +ffffffff81e0d4f0 t gfx_v10_0_ring_emit_ib_compute +ffffffff81e0d830 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81e0dc60 t gfx_v10_0_ring_test_ring +ffffffff81e0dec0 t gfx_v10_0_ring_test_ib +ffffffff81e0e150 t gfx_v10_0_ring_emit_rreg +ffffffff81e0e3e0 t gfx_v10_0_ring_emit_wreg +ffffffff81e0e610 t gfx_v10_0_ring_emit_reg_wait +ffffffff81e0e660 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81e0e6f0 t gfx_v10_0_wait_reg_mem +ffffffff81e0ea20 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81e0ea50 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81e0eb60 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81e0ed70 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81e0f3f0 t gfx_v10_0_ring_emit_fence +ffffffff81e0f7c0 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81e0f820 t gfx_v10_0_ring_emit_vm_flush +ffffffff81e0f9f0 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81e0fac0 t gfx_v10_0_ring_emit_gds_switch +ffffffff81e0fba0 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81e0fdd0 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81e0fe90 t gfx_v10_0_ring_emit_sb +ffffffff81e0ff80 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81e10470 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81e10580 t gfx_v10_0_ring_soft_recovery +ffffffff81e105f0 t gfx_v10_0_ring_preempt_ib +ffffffff81e10760 t gfx_v10_0_emit_mem_sync +ffffffff81e10a90 t gfx_v10_0_write_data_to_reg +ffffffff81e10ca0 t gfx_v10_0_set_eop_interrupt_state +ffffffff81e10d80 t gfx_v10_0_eop_irq +ffffffff81e10f30 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81e110d0 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81e11290 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81e11580 t gfx_v10_0_kiq_irq +ffffffff81e11600 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81e11740 t gfx_v10_0_priv_reg_irq +ffffffff81e117a0 t gfx_v10_0_handle_priv_fault +ffffffff81e11900 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81e11a40 t gfx_v10_0_priv_inst_irq +ffffffff81e11aa0 t gfx_v10_0_is_rlc_enabled +ffffffff81e11b30 t gfx_v10_0_set_safe_mode +ffffffff81e11de0 t gfx_v10_0_unset_safe_mode +ffffffff81e11e90 t gfx_v10_0_rlc_init +ffffffff81e11eb0 t gfx_v10_0_get_csb_size +ffffffff81e11ee0 t gfx_v10_0_get_csb_buffer +ffffffff81e12050 t gfx_v10_0_rlc_resume +ffffffff81e12ac0 t gfx_v10_0_rlc_stop +ffffffff81e12ba0 t gfx_v10_0_rlc_reset +ffffffff81e12d50 t gfx_v10_0_rlc_start +ffffffff81e12f00 t gfx_v10_0_update_spm_vmid +ffffffff81e12f40 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81e13860 t gfx_v10_0_init_csb +ffffffff81e13b40 t gfx_v10_0_update_spm_vmid_internal +ffffffff81e13c60 t gfx_v10_0_rlc_backdoor_autoload_config_mec_cache +ffffffff81e13f30 t gfx_v10_0_is_rlcg_access_range +ffffffff81e13f60 t gfx_v10_0_gfx_mqd_init +ffffffff81e14350 t gfx_v10_0_compute_mqd_init +ffffffff81e14800 t gfx_v10_0_mec_init +ffffffff81e14a10 t gfx_v10_0_compute_ring_init +ffffffff81e14b50 t gfx_v10_0_rlc_backdoor_autoload_buffer_init +ffffffff81e14db0 t gfx_v10_0_gpu_early_init +ffffffff81e15010 t amdgpu_bo_unreserve +ffffffff81e150f0 t gfx_v10_0_cp_resume +ffffffff81e17ad0 t gfx_v10_3_get_disabled_sa +ffffffff81e17bf0 t gfx_v10_0_get_rb_active_bitmap +ffffffff81e17d20 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81e17e30 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81e17f40 t gfx_v10_0_cp_gfx_enable +ffffffff81e181b0 t gfx_v10_0_cp_compute_enable +ffffffff81e18350 t amdgpu_bo_reserve +ffffffff81e184c0 t gfx_v10_0_kiq_init_register +ffffffff81e19360 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81e19460 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81e19740 t gfx_v10_0_cp_gfx_start +ffffffff81e1a130 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81e1a480 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81e1abc0 t gfx_v10_0_update_3d_clock_gating +ffffffff81e1afb0 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81e1b390 t gfx_v10_cntl_pg +ffffffff81e1c000 t gfx_v11_0_early_init +ffffffff81e1c750 t gfx_v11_0_late_init +ffffffff81e1c7c0 t gfx_v11_0_sw_init +ffffffff81e1cd00 t gfx_v11_0_sw_fini +ffffffff81e1cf10 t gfx_v11_0_hw_init +ffffffff81e21390 t gfx_v11_0_hw_fini +ffffffff81e21490 t gfx_v11_0_suspend +ffffffff81e214d0 t gfx_v11_0_resume +ffffffff81e214e0 t gfx_v11_0_is_idle +ffffffff81e21570 t gfx_v11_0_wait_for_idle +ffffffff81e21670 t gfx_v11_0_check_soft_reset +ffffffff81e217a0 t gfx_v11_0_soft_reset +ffffffff81e224e0 t gfx_v11_0_post_soft_reset +ffffffff81e224f0 t gfx_v11_0_set_clockgating_state +ffffffff81e23130 t gfx_v11_0_set_powergating_state +ffffffff81e231d0 t gfx_v11_0_get_clockgating_state +ffffffff81e233a0 t gfx_v11_0_get_gpu_clock_counter +ffffffff81e23720 t gfx_v11_0_select_se_sh +ffffffff81e237c0 t gfx_v11_0_read_wave_data +ffffffff81e23a00 t gfx_v11_0_read_wave_vgprs +ffffffff81e23a30 t gfx_v11_0_read_wave_sgprs +ffffffff81e23ab0 t gfx_v11_0_select_me_pipe_q +ffffffff81e23ad0 t gfx_v11_0_update_perf_clk +ffffffff81e23c00 t gfx_v11_0_get_gfx_shadow_info +ffffffff81e23c70 t wave_read_ind +ffffffff81e23d60 t wave_read_regs +ffffffff81e23ec0 t gfx11_kiq_set_resources +ffffffff81e241e0 t gfx11_kiq_map_queues +ffffffff81e24570 t gfx11_kiq_unmap_queues +ffffffff81e24970 t gfx11_kiq_query_status +ffffffff81e24c60 t gfx11_kiq_invalidate_tlbs +ffffffff81e24d80 t gfx_v11_0_ring_get_rptr_compute +ffffffff81e24db0 t gfx_v11_0_ring_get_wptr_compute +ffffffff81e24e20 t gfx_v11_0_ring_set_wptr_compute +ffffffff81e24f60 t gfx_v11_0_ring_emit_ib_compute +ffffffff81e252a0 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81e256d0 t gfx_v11_0_ring_test_ring +ffffffff81e25950 t gfx_v11_0_ring_test_ib +ffffffff81e25bf0 t gfx_v11_0_ring_emit_rreg +ffffffff81e25e80 t gfx_v11_0_ring_emit_wreg +ffffffff81e260b0 t gfx_v11_0_ring_emit_reg_wait +ffffffff81e26100 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81e26170 t gfx_v11_0_wait_reg_mem +ffffffff81e264a0 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81e264d0 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81e265e0 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81e26800 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81e26e90 t gfx_v11_0_ring_emit_fence +ffffffff81e27260 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81e272c0 t gfx_v11_0_ring_emit_vm_flush +ffffffff81e27490 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81e27560 t gfx_v11_0_ring_emit_gds_switch +ffffffff81e27640 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81e27870 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81e27930 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81e27a90 t gfx_v11_0_ring_emit_gfx_shadow +ffffffff81e27e50 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81e27f60 t gfx_v11_0_ring_soft_recovery +ffffffff81e27fd0 t gfx_v11_0_ring_preempt_ib +ffffffff81e28140 t gfx_v11_0_emit_mem_sync +ffffffff81e28470 t gfx_v11_0_write_data_to_reg +ffffffff81e28680 t gfx_v11_0_set_eop_interrupt_state +ffffffff81e28710 t gfx_v11_0_eop_irq +ffffffff81e288c0 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81e28a60 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81e28bf0 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81e28d30 t gfx_v11_0_priv_reg_irq +ffffffff81e28d90 t gfx_v11_0_handle_priv_fault +ffffffff81e28ef0 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81e29030 t gfx_v11_0_priv_inst_irq +ffffffff81e29090 t gfx_v11_0_rlc_gc_fed_irq +ffffffff81e290e0 t gfx_v11_0_is_rlc_enabled +ffffffff81e29170 t gfx_v11_0_set_safe_mode +ffffffff81e292d0 t gfx_v11_0_unset_safe_mode +ffffffff81e29340 t gfx_v11_0_rlc_init +ffffffff81e293c0 t gfx_v11_0_get_csb_size +ffffffff81e293f0 t gfx_v11_0_get_csb_buffer +ffffffff81e29560 t gfx_v11_0_rlc_resume +ffffffff81e2a2c0 t gfx_v11_0_rlc_stop +ffffffff81e2a3a0 t gfx_v11_0_rlc_reset +ffffffff81e2a550 t gfx_v11_0_rlc_start +ffffffff81e2a700 t gfx_v11_0_update_spm_vmid +ffffffff81e2a800 t gfx_v11_0_init_csb +ffffffff81e2a990 t gfx_v11_0_gfx_mqd_init +ffffffff81e2ad70 t gfx_v11_0_compute_mqd_init +ffffffff81e2b2a0 t gfx_v11_0_mec_init +ffffffff81e2b3e0 t gfx_v11_0_compute_ring_init +ffffffff81e2b520 t gfx_v11_0_rlc_autoload_buffer_init +ffffffff81e2b710 t gfx_v11_0_gpu_early_init +ffffffff81e2b7e0 t amdgpu_bo_unreserve +ffffffff81e2b8c0 t gfx_v11_0_disable_gpa_mode +ffffffff81e2ba60 t gfx_v11_0_cp_resume +ffffffff81e2f860 t gfx_v11_0_config_me_cache +ffffffff81e2fc20 t gfx_v11_0_config_pfp_cache +ffffffff81e2ffe0 t gfx_v11_0_config_mec_cache +ffffffff81e303a0 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81e304b0 t gfx_v11_0_cp_compute_enable +ffffffff81e30690 t gfx_v11_0_cp_gfx_enable +ffffffff81e308a0 t amdgpu_bo_reserve +ffffffff81e30a10 t gfx_v11_0_kiq_init_register +ffffffff81e318b0 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81e31990 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81e31b70 t gfx_v11_0_cp_gfx_start +ffffffff81e323f0 t gfx_v11_cntl_pg +ffffffff81e33000 t gfx_v11_0_3_rlc_gc_fed_irq +ffffffff81e33200 t gfx_v11_0_3_poison_consumption_handler +ffffffff81e34000 t gfx_v8_0_early_init +ffffffff81e342f0 t gfx_v8_0_late_init +ffffffff81e34a10 t gfx_v8_0_sw_init +ffffffff81e34dd0 t gfx_v8_0_sw_fini +ffffffff81e34f70 t gfx_v8_0_hw_init +ffffffff81e37110 t gfx_v8_0_hw_fini +ffffffff81e375c0 t gfx_v8_0_suspend +ffffffff81e37600 t gfx_v8_0_resume +ffffffff81e37610 t gfx_v8_0_is_idle +ffffffff81e37680 t gfx_v8_0_wait_for_idle +ffffffff81e37730 t gfx_v8_0_check_soft_reset +ffffffff81e37810 t gfx_v8_0_pre_soft_reset +ffffffff81e37970 t gfx_v8_0_soft_reset +ffffffff81e37b30 t gfx_v8_0_post_soft_reset +ffffffff81e37cb0 t gfx_v8_0_set_clockgating_state +ffffffff81e37f30 t gfx_v8_0_set_powergating_state +ffffffff81e382e0 t gfx_v8_0_get_clockgating_state +ffffffff81e383c0 t gfx_v8_0_get_gpu_clock_counter +ffffffff81e38460 t gfx_v8_0_select_se_sh +ffffffff81e384c0 t gfx_v8_0_read_wave_data +ffffffff81e38960 t gfx_v8_0_read_wave_sgprs +ffffffff81e38a10 t gfx_v8_0_select_me_pipe_q +ffffffff81e38a30 t gfx_v8_0_ring_get_rptr +ffffffff81e38a60 t gfx_v8_0_ring_get_wptr_compute +ffffffff81e38a90 t gfx_v8_0_ring_set_wptr_compute +ffffffff81e38ad0 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81e38ef0 t gfx_v8_0_ring_test_ring +ffffffff81e390f0 t gfx_v8_0_ring_emit_rreg +ffffffff81e39380 t gfx_v8_0_ring_emit_wreg +ffffffff81e395b0 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81e39610 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81e39680 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81e39be0 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81e3a0d0 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81e3a3c0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81e3a770 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81e3aa90 t gfx_v8_0_ring_emit_gds_switch +ffffffff81e3b240 t gfx_v8_0_ring_test_ib +ffffffff81e3b3f0 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81e3b620 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81e3b6d0 t gfx_v8_ring_emit_sb +ffffffff81e3b7c0 t gfx_v8_ring_emit_cntxcntl +ffffffff81e3bd60 t gfx_v8_0_ring_soft_recovery +ffffffff81e3bd90 t gfx_v8_0_emit_mem_sync +ffffffff81e3bf90 t gfx_v8_0_ring_emit_ib_compute +ffffffff81e3c290 t gfx_v8_0_ring_emit_fence_compute +ffffffff81e3c590 t gfx_v8_0_emit_mem_sync_compute +ffffffff81e3c850 t gfx_v8_0_emit_wave_limit +ffffffff81e3ca00 t gfx_v8_0_set_eop_interrupt_state +ffffffff81e3cc10 t gfx_v8_0_eop_irq +ffffffff81e3cd20 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81e3cda0 t gfx_v8_0_priv_reg_irq +ffffffff81e3cea0 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81e3cf20 t gfx_v8_0_priv_inst_irq +ffffffff81e3d020 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81e3d280 t gfx_v8_0_cp_ecc_error_irq +ffffffff81e3d2d0 t gfx_v8_0_set_sq_int_state +ffffffff81e3d360 t gfx_v8_0_sq_irq +ffffffff81e3d3d0 t gfx_v8_0_parse_sq_irq +ffffffff81e3d620 t gfx_v8_0_is_rlc_enabled +ffffffff81e3d660 t gfx_v8_0_set_safe_mode +ffffffff81e3d760 t gfx_v8_0_unset_safe_mode +ffffffff81e3d800 t gfx_v8_0_rlc_init +ffffffff81e3d8b0 t gfx_v8_0_get_csb_size +ffffffff81e3d8e0 t gfx_v8_0_get_csb_buffer +ffffffff81e3da50 t gfx_v8_0_cp_jump_table_num +ffffffff81e3da90 t gfx_v8_0_rlc_resume +ffffffff81e3de10 t gfx_v8_0_rlc_stop +ffffffff81e3de80 t gfx_v8_0_rlc_reset +ffffffff81e3df00 t gfx_v8_0_rlc_start +ffffffff81e3df80 t gfx_v8_0_update_spm_vmid +ffffffff81e3dff0 t gfx_v8_0_init_save_restore_list +ffffffff81e3e400 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81e3e620 t gfx_v8_0_sq_irq_work_func +ffffffff81e3e640 t gfx_v8_0_init_microcode +ffffffff81e3eeb0 t gfx_v8_0_mec_init +ffffffff81e3efb0 t gfx_v8_0_compute_ring_init +ffffffff81e3f0e0 t gfx_v8_0_gpu_early_init +ffffffff81e3f580 t amdgpu_bo_unreserve +ffffffff81e3f660 t gfx_v8_0_kiq_resume +ffffffff81e3f910 t gfx_v8_0_cp_gfx_resume +ffffffff81e403d0 t gfx_v8_0_kcq_resume +ffffffff81e40d90 t amdgpu_bo_reserve +ffffffff81e40f00 t gfx_v8_0_mqd_commit +ffffffff81e410e0 t gfx_v8_0_mqd_init +ffffffff81e41500 t gfx_v8_0_deactivate_hqd +ffffffff81e415c0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e41900 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e42000 t gfx_v9_0_ras_error_inject +ffffffff81e421b0 t gfx_v9_0_query_ras_error_count +ffffffff81e42d80 t gfx_v9_0_reset_ras_error_count +ffffffff81e437b0 T gfx_v9_0_select_se_sh +ffffffff81e43850 t gfx_v9_0_early_init +ffffffff81e44380 t gfx_v9_0_late_init +ffffffff81e45270 t gfx_v9_0_sw_init +ffffffff81e45920 t gfx_v9_0_sw_fini +ffffffff81e45ae0 t gfx_v9_0_hw_init +ffffffff81e48a90 t gfx_v9_0_hw_fini +ffffffff81e49240 t gfx_v9_0_suspend +ffffffff81e49280 t gfx_v9_0_resume +ffffffff81e49290 t gfx_v9_0_is_idle +ffffffff81e49310 t gfx_v9_0_wait_for_idle +ffffffff81e49400 t gfx_v9_0_soft_reset +ffffffff81e497a0 t gfx_v9_0_set_clockgating_state +ffffffff81e49870 t gfx_v9_0_set_powergating_state +ffffffff81e49c60 t gfx_v9_0_get_clockgating_state +ffffffff81e49d70 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e4a500 t gfx_v9_0_read_wave_data +ffffffff81e4a740 t gfx_v9_0_read_wave_vgprs +ffffffff81e4a7a0 t gfx_v9_0_read_wave_sgprs +ffffffff81e4a7d0 t gfx_v9_0_select_me_pipe_q +ffffffff81e4a7f0 t wave_read_ind +ffffffff81e4a8e0 t wave_read_regs +ffffffff81e4aa30 t gfx_v9_0_kiq_set_resources +ffffffff81e4ad50 t gfx_v9_0_kiq_map_queues +ffffffff81e4b090 t gfx_v9_0_kiq_unmap_queues +ffffffff81e4b3c0 t gfx_v9_0_kiq_query_status +ffffffff81e4b6b0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e4b7d0 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e4b800 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e4b870 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e4b8d0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e4bd00 t gfx_v9_0_ring_test_ring +ffffffff81e4bf30 t gfx_v9_0_ring_emit_rreg +ffffffff81e4c1c0 t gfx_v9_0_ring_emit_wreg +ffffffff81e4c3f0 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e4c440 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e4c4e0 t gfx_v9_0_wait_reg_mem +ffffffff81e4c810 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e4c840 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e4c950 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e4ca80 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e4d100 t gfx_v9_0_ring_emit_fence +ffffffff81e4d4c0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e4d520 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e4d630 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e4d700 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e4d7e0 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e4da10 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e4dad0 t gfx_v9_ring_emit_sb +ffffffff81e4dbc0 t gfx_v9_ring_emit_cntxcntl +ffffffff81e4e0a0 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e4e1b0 t gfx_v9_0_ring_soft_recovery +ffffffff81e4e220 t gfx_v9_0_ring_preempt_ib +ffffffff81e4e3e0 t gfx_v9_0_emit_mem_sync +ffffffff81e4e6a0 t gfx_v9_0_write_data_to_reg +ffffffff81e4e8b0 t gfx_v9_0_ring_test_ib +ffffffff81e4ea60 t gfx_v9_0_ring_patch_cntl +ffffffff81e4eaa0 t gfx_v9_0_ring_patch_ce_meta +ffffffff81e4eba0 t gfx_v9_0_ring_patch_de_meta +ffffffff81e4ec70 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e4efa0 t gfx_v9_0_emit_wave_limit +ffffffff81e4f180 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e4f360 t gfx_v9_0_eop_irq +ffffffff81e4f4a0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e4f660 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e4f7a0 t gfx_v9_0_priv_reg_irq +ffffffff81e4f8a0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e4f9e0 t gfx_v9_0_priv_inst_irq +ffffffff81e4fae0 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e50370 t gfx_v9_0_is_rlc_enabled +ffffffff81e50400 t gfx_v9_0_set_safe_mode +ffffffff81e50560 t gfx_v9_0_unset_safe_mode +ffffffff81e505d0 t gfx_v9_0_rlc_init +ffffffff81e50640 t gfx_v9_0_get_csb_size +ffffffff81e50670 t gfx_v9_0_get_csb_buffer +ffffffff81e507b0 t gfx_v9_0_cp_jump_table_num +ffffffff81e50800 t gfx_v9_0_rlc_resume +ffffffff81e51f10 t gfx_v9_0_rlc_stop +ffffffff81e522b0 t gfx_v9_0_rlc_reset +ffffffff81e52450 t gfx_v9_0_rlc_start +ffffffff81e525a0 t gfx_v9_0_update_spm_vmid +ffffffff81e525e0 t gfx_v9_0_is_rlcg_access_range +ffffffff81e52630 t gfx_v9_0_init_csb +ffffffff81e527c0 t gfx_v9_0_enable_lbpw +ffffffff81e528b0 t gfx_v9_0_update_spm_vmid_internal +ffffffff81e529d0 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e52c60 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e52d60 t gfx_v9_0_mec_init +ffffffff81e52f40 t gfx_v9_0_compute_ring_init +ffffffff81e53080 t gfx_v9_0_gpu_early_init +ffffffff81e534c0 t amdgpu_bo_unreserve +ffffffff81e535a0 t gfx_v9_0_cp_gfx_enable +ffffffff81e53690 t amdgpu_bo_reserve +ffffffff81e53800 t gfx_v9_0_kiq_init_register +ffffffff81e544e0 t gfx_v9_0_mqd_init +ffffffff81e54a30 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e54f60 t gfx_v9_0_update_3d_clock_gating +ffffffff81e55350 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e56000 t gfx_v9_4_query_ras_error_count +ffffffff81e56e00 t gfx_v9_4_query_ras_error_status +ffffffff81e56fd0 t gfx_v9_4_reset_ras_error_count +ffffffff81e58000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e58720 T gfx_v9_4_2_init_golden_registers +ffffffff81e587b0 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e58890 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e58a70 t gfx_v9_4_2_query_ras_error_count +ffffffff81e58b20 t gfx_v9_4_2_query_ras_error_status +ffffffff81e59380 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e593e0 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e598b0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e59ad0 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e59b50 t gfx_v9_4_2_run_shader +ffffffff81e59f50 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e5a5a0 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e5a8e0 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e5aac0 t wave_read_ind +ffffffff81e5b000 t gfx_v9_4_3_xcp_suspend +ffffffff81e5b0a0 t gfx_v9_4_3_xcp_resume +ffffffff81e5b1e0 t gfx_v9_4_3_query_ras_error_count +ffffffff81e5b200 t gfx_v9_4_3_query_ras_error_status +ffffffff81e5b220 t gfx_v9_4_3_reset_ras_error_count +ffffffff81e5b240 t gfx_v9_4_3_reset_ras_error_status +ffffffff81e5b260 t gfx_v9_4_3_enable_watchdog_timer +ffffffff81e5b280 t gfx_v9_4_3_early_init +ffffffff81e5b940 t gfx_v9_4_3_late_init +ffffffff81e5b9c0 t gfx_v9_4_3_sw_init +ffffffff81e5be20 t gfx_v9_4_3_sw_fini +ffffffff81e5bfd0 t gfx_v9_4_3_hw_init +ffffffff81e5ca70 t gfx_v9_4_3_hw_fini +ffffffff81e5cb30 t gfx_v9_4_3_suspend +ffffffff81e5cbf0 t gfx_v9_4_3_resume +ffffffff81e5cc00 t gfx_v9_4_3_is_idle +ffffffff81e5cdb0 t gfx_v9_4_3_wait_for_idle +ffffffff81e5ce40 t gfx_v9_4_3_soft_reset +ffffffff81e5d550 t gfx_v9_4_3_set_clockgating_state +ffffffff81e5d6b0 t gfx_v9_4_3_set_powergating_state +ffffffff81e5d6e0 t gfx_v9_4_3_get_clockgating_state +ffffffff81e5d850 t gfx_v9_4_3_kiq_set_resources +ffffffff81e5db70 t gfx_v9_4_3_kiq_map_queues +ffffffff81e5ded0 t gfx_v9_4_3_kiq_unmap_queues +ffffffff81e5e250 t gfx_v9_4_3_kiq_query_status +ffffffff81e5e540 t gfx_v9_4_3_kiq_invalidate_tlbs +ffffffff81e5e660 t gfx_v9_4_3_ring_get_rptr_compute +ffffffff81e5e6a0 t gfx_v9_4_3_ring_get_wptr_compute +ffffffff81e5e710 t gfx_v9_4_3_ring_set_wptr_compute +ffffffff81e5e770 t gfx_v9_4_3_ring_emit_fence_kiq +ffffffff81e5ebc0 t gfx_v9_4_3_ring_test_ring +ffffffff81e5ee20 t gfx_v9_4_3_ring_emit_rreg +ffffffff81e5f0b0 t gfx_v9_4_3_ring_emit_wreg +ffffffff81e5f2e0 t gfx_v9_4_3_ring_emit_reg_wait +ffffffff81e5f330 t gfx_v9_4_3_ring_emit_reg_write_reg_wait +ffffffff81e5f350 t gfx_v9_4_3_wait_reg_mem +ffffffff81e5f680 t gfx_v9_4_3_ring_emit_ib_compute +ffffffff81e5f9b0 t gfx_v9_4_3_ring_emit_fence +ffffffff81e5fd60 t gfx_v9_4_3_ring_emit_pipeline_sync +ffffffff81e5fdc0 t gfx_v9_4_3_ring_emit_vm_flush +ffffffff81e5fde0 t gfx_v9_4_3_ring_emit_hdp_flush +ffffffff81e5feb0 t gfx_v9_4_3_ring_emit_gds_switch +ffffffff81e60050 t gfx_v9_4_3_ring_test_ib +ffffffff81e60200 t gfx_v9_4_3_emit_mem_sync +ffffffff81e604c0 t gfx_v9_4_3_emit_wave_limit +ffffffff81e606b0 t gfx_v9_4_3_write_data_to_reg +ffffffff81e608c0 t gfx_v9_4_3_set_eop_interrupt_state +ffffffff81e60a30 t gfx_v9_4_3_eop_irq +ffffffff81e60bd0 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state +ffffffff81e60d30 t gfx_v9_4_3_ih_to_xcc_inst +ffffffff81e60e00 t gfx_v9_4_3_set_priv_reg_fault_state +ffffffff81e611e0 t gfx_v9_4_3_priv_reg_irq +ffffffff81e61240 t gfx_v9_4_3_fault +ffffffff81e613c0 t gfx_v9_4_3_set_priv_inst_fault_state +ffffffff81e617a0 t gfx_v9_4_3_priv_inst_irq +ffffffff81e61800 t gfx_v9_4_3_is_rlc_enabled +ffffffff81e61920 t gfx_v9_4_3_xcc_set_safe_mode +ffffffff81e61bc0 t gfx_v9_4_3_xcc_unset_safe_mode +ffffffff81e61ce0 t gfx_v9_4_3_rlc_init +ffffffff81e61d30 t gfx_v9_4_3_rlc_resume +ffffffff81e61df0 t gfx_v9_4_3_rlc_stop +ffffffff81e61e90 t gfx_v9_4_3_rlc_reset +ffffffff81e62520 t gfx_v9_4_3_rlc_start +ffffffff81e625c0 t gfx_v9_4_3_update_spm_vmid +ffffffff81e627d0 t gfx_v9_4_3_is_rlcg_access_range +ffffffff81e62880 t gfx_v9_4_3_xcc_rlc_resume +ffffffff81e630d0 t gfx_v9_4_3_xcc_rlc_stop +ffffffff81e637f0 t gfx_v9_4_3_xcc_rlc_start +ffffffff81e63b80 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt +ffffffff81e63da0 t gfx_v9_4_3_xcc_select_se_sh +ffffffff81e63fa0 t gfx_v9_4_3_mec_init +ffffffff81e64290 t gfx_v9_4_3_gpu_early_init +ffffffff81e644c0 t amdgpu_bo_unreserve +ffffffff81e645a0 t gfx_v9_4_3_get_gpu_clock_counter +ffffffff81e648e0 t gfx_v9_4_3_read_wave_data +ffffffff81e64bb0 t gfx_v9_4_3_read_wave_vgprs +ffffffff81e64bd0 t gfx_v9_4_3_read_wave_sgprs +ffffffff81e64c20 t gfx_v9_4_3_select_me_pipe_q +ffffffff81e64c90 t gfx_v9_4_3_switch_compute_partition +ffffffff81e64ff0 t wave_read_ind +ffffffff81e651f0 t wave_read_regs +ffffffff81e65480 t gfx_v9_4_3_xcc_constants_init +ffffffff81e66500 t gfx_v9_4_3_xcc_cp_resume +ffffffff81e674b0 t gfx_v9_4_3_xcc_cp_compute_enable +ffffffff81e67650 t amdgpu_bo_reserve +ffffffff81e677c0 t gfx_v9_4_3_xcc_kiq_init_register +ffffffff81e69400 t gfx_v9_4_3_xcc_mqd_init +ffffffff81e69e40 t gfx_v9_4_3_xcc_fini +ffffffff81e6a3e0 t gfx_v9_4_3_xcc_q_fini_register +ffffffff81e6ad90 t gfx_v9_4_3_xcc_update_sram_fgcg +ffffffff81e6b000 t gfx_v9_4_3_xcc_update_repeater_fgcg +ffffffff81e6b270 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating +ffffffff81e6bdc0 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating +ffffffff81e6c620 t gfx_v9_4_3_inst_query_ras_err_count +ffffffff81e6c880 t gfx_v9_4_3_inst_query_ras_err_status +ffffffff81e6d600 t gfx_v9_4_3_inst_reset_ras_err_count +ffffffff81e6d7c0 t gfx_v9_4_3_inst_reset_ras_err_status +ffffffff81e6df40 t gfx_v9_4_3_inst_enable_watchdog_timer +ffffffff81e6f000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e6f090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e6f1d0 t gfxhub_v1_0_gart_enable +ffffffff81e70700 t gfxhub_v1_0_gart_disable +ffffffff81e709a0 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e70aa0 t gfxhub_v1_0_init +ffffffff81e71000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e72000 t gfxhub_v1_2_get_mc_fb_offset +ffffffff81e72120 t gfxhub_v1_2_setup_vm_pt_regs +ffffffff81e72190 t gfxhub_v1_2_gart_enable +ffffffff81e72220 t gfxhub_v1_2_gart_disable +ffffffff81e72280 t gfxhub_v1_2_set_fault_enable_default +ffffffff81e722f0 t gfxhub_v1_2_init +ffffffff81e725f0 t gfxhub_v1_2_get_xgmi_info +ffffffff81e72860 t gfxhub_v1_2_xcp_suspend +ffffffff81e728a0 t gfxhub_v1_2_xcp_resume +ffffffff81e72910 t gfxhub_v1_2_xcc_setup_vm_pt_regs +ffffffff81e72c30 t gfxhub_v1_2_xcc_gart_enable +ffffffff81e76070 t gfxhub_v1_2_xcc_gart_disable +ffffffff81e766e0 t gfxhub_v1_2_xcc_set_fault_enable_default +ffffffff81e77000 t gfxhub_v2_0_get_fb_location +ffffffff81e77090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e77120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e77260 t gfxhub_v2_0_gart_enable +ffffffff81e78490 t gfxhub_v2_0_gart_disable +ffffffff81e786e0 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e787e0 t gfxhub_v2_0_init +ffffffff81e788b0 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e78a80 t gfxhub_v2_0_get_invalidate_req +ffffffff81e79000 t gfxhub_v2_1_get_fb_location +ffffffff81e79090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e79120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e79260 t gfxhub_v2_1_gart_enable +ffffffff81e7a560 t gfxhub_v2_1_gart_disable +ffffffff81e7a7b0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e7a8d0 t gfxhub_v2_1_init +ffffffff81e7a9a0 t gfxhub_v2_1_get_xgmi_info +ffffffff81e7aae0 t gfxhub_v2_1_utcl2_harvest +ffffffff81e7acc0 t gfxhub_v2_1_save_regs +ffffffff81e7b730 t gfxhub_v2_1_restore_regs +ffffffff81e7c350 t gfxhub_v2_1_halt +ffffffff81e7c720 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e7c8f0 t gfxhub_v2_1_get_invalidate_req +ffffffff81e7d000 t gfxhub_v3_0_get_fb_location +ffffffff81e7d090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e7d120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e7d260 t gfxhub_v3_0_gart_enable +ffffffff81e7e560 t gfxhub_v3_0_gart_disable +ffffffff81e7e800 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e7e9d0 t gfxhub_v3_0_init +ffffffff81e7eaa0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e7ec70 t gfxhub_v3_0_get_invalidate_req +ffffffff81e7f000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e7f090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e7f120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e7f260 t gfxhub_v3_0_3_gart_enable +ffffffff81e80450 t gfxhub_v3_0_3_gart_disable +ffffffff81e806f0 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e80810 t gfxhub_v3_0_3_init +ffffffff81e808e0 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e80ab0 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e81000 t gmc_v10_0_early_init +ffffffff81e81170 t gmc_v10_0_late_init +ffffffff81e811e0 t gmc_v10_0_sw_init +ffffffff81e815d0 t gmc_v10_0_sw_fini +ffffffff81e81620 t gmc_v10_0_hw_init +ffffffff81e81830 t gmc_v10_0_hw_fini +ffffffff81e818d0 t gmc_v10_0_suspend +ffffffff81e81970 t gmc_v10_0_resume +ffffffff81e819d0 t gmc_v10_0_is_idle +ffffffff81e81a00 t gmc_v10_0_wait_for_idle +ffffffff81e81a30 t gmc_v10_0_soft_reset +ffffffff81e81a60 t gmc_v10_0_set_clockgating_state +ffffffff81e81b10 t gmc_v10_0_set_powergating_state +ffffffff81e81b40 t gmc_v10_0_get_clockgating_state +ffffffff81e81be0 t gmc_v10_0_flush_gpu_tlb +ffffffff81e81e70 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e82120 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e822d0 t gmc_v10_0_emit_pasid_mapping +ffffffff81e82350 t gmc_v10_0_map_mtype +ffffffff81e823a0 t gmc_v10_0_get_vm_pde +ffffffff81e82490 t gmc_v10_0_get_vm_pte +ffffffff81e82570 t gmc_v10_0_get_vbios_fb_size +ffffffff81e826e0 t gmc_v10_0_flush_vm_hub +ffffffff81e82b10 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e82bb0 t gmc_v10_0_process_interrupt +ffffffff81e82e90 t gmc_v10_0_ecc_interrupt_state +ffffffff81e82ec0 t gmc_v10_0_gart_init +ffffffff81e83000 t gmc_v11_0_early_init +ffffffff81e831f0 t gmc_v11_0_late_init +ffffffff81e83260 t gmc_v11_0_sw_init +ffffffff81e83570 t gmc_v11_0_sw_fini +ffffffff81e835c0 t gmc_v11_0_hw_init +ffffffff81e83720 t gmc_v11_0_hw_fini +ffffffff81e837a0 t gmc_v11_0_suspend +ffffffff81e83820 t gmc_v11_0_resume +ffffffff81e83880 t gmc_v11_0_is_idle +ffffffff81e838b0 t gmc_v11_0_wait_for_idle +ffffffff81e838e0 t gmc_v11_0_soft_reset +ffffffff81e83910 t gmc_v11_0_set_clockgating_state +ffffffff81e83990 t gmc_v11_0_set_powergating_state +ffffffff81e839c0 t gmc_v11_0_get_clockgating_state +ffffffff81e83a00 t gmc_v11_0_flush_gpu_tlb +ffffffff81e83eb0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e84120 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e842d0 t gmc_v11_0_emit_pasid_mapping +ffffffff81e84350 t gmc_v11_0_map_mtype +ffffffff81e843a0 t gmc_v11_0_get_vm_pde +ffffffff81e844a0 t gmc_v11_0_get_vm_pte +ffffffff81e84580 t gmc_v11_0_get_vbios_fb_size +ffffffff81e846f0 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e84790 t gmc_v11_0_process_interrupt +ffffffff81e849c0 t gmc_v11_0_ecc_interrupt_state +ffffffff81e849f0 t gmc_v11_0_gart_init +ffffffff81e85000 t gmc_v7_0_early_init +ffffffff81e850a0 t gmc_v7_0_late_init +ffffffff81e850f0 t gmc_v7_0_sw_init +ffffffff81e85520 t gmc_v7_0_sw_fini +ffffffff81e855a0 t gmc_v7_0_hw_init +ffffffff81e85f10 t gmc_v7_0_hw_fini +ffffffff81e85fd0 t gmc_v7_0_suspend +ffffffff81e86010 t gmc_v7_0_resume +ffffffff81e86070 t gmc_v7_0_is_idle +ffffffff81e860c0 t gmc_v7_0_wait_for_idle +ffffffff81e86160 t gmc_v7_0_soft_reset +ffffffff81e863c0 t gmc_v7_0_set_clockgating_state +ffffffff81e86620 t gmc_v7_0_set_powergating_state +ffffffff81e86650 t gmc_v7_0_flush_gpu_tlb +ffffffff81e86680 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e86740 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e867e0 t gmc_v7_0_emit_pasid_mapping +ffffffff81e86810 t gmc_v7_0_set_prt +ffffffff81e869d0 t gmc_v7_0_get_vm_pde +ffffffff81e86a30 t gmc_v7_0_get_vm_pte +ffffffff81e86a70 t gmc_v7_0_get_vbios_fb_size +ffffffff81e86ae0 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e86bb0 t gmc_v7_0_process_interrupt +ffffffff81e86e50 t gmc_v7_0_gart_init +ffffffff81e87000 t gmc_v8_0_early_init +ffffffff81e870a0 t gmc_v8_0_late_init +ffffffff81e870f0 t gmc_v8_0_sw_init +ffffffff81e876a0 t gmc_v8_0_sw_fini +ffffffff81e87720 t gmc_v8_0_hw_init +ffffffff81e88390 t gmc_v8_0_hw_fini +ffffffff81e88450 t gmc_v8_0_suspend +ffffffff81e88490 t gmc_v8_0_resume +ffffffff81e884f0 t gmc_v8_0_is_idle +ffffffff81e88540 t gmc_v8_0_wait_for_idle +ffffffff81e885e0 t gmc_v8_0_check_soft_reset +ffffffff81e88650 t gmc_v8_0_pre_soft_reset +ffffffff81e887c0 t gmc_v8_0_soft_reset +ffffffff81e88890 t gmc_v8_0_post_soft_reset +ffffffff81e88900 t gmc_v8_0_set_clockgating_state +ffffffff81e88ec0 t gmc_v8_0_set_powergating_state +ffffffff81e88ef0 t gmc_v8_0_get_clockgating_state +ffffffff81e88f60 t gmc_v8_0_flush_gpu_tlb +ffffffff81e88f90 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e89050 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e890f0 t gmc_v8_0_emit_pasid_mapping +ffffffff81e89120 t gmc_v8_0_set_prt +ffffffff81e892e0 t gmc_v8_0_get_vm_pde +ffffffff81e89340 t gmc_v8_0_get_vm_pte +ffffffff81e89390 t gmc_v8_0_get_vbios_fb_size +ffffffff81e89400 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e894d0 t gmc_v8_0_process_interrupt +ffffffff81e89860 t gmc_v8_0_gart_init +ffffffff81e8a000 T gmc_v9_0_restore_registers +ffffffff81e8a160 t gmc_v9_0_early_init +ffffffff81e8a510 t gmc_v9_0_late_init +ffffffff81e8a620 t gmc_v9_0_sw_init +ffffffff81e8ad80 t gmc_v9_0_sw_fini +ffffffff81e8ae40 t gmc_v9_0_hw_init +ffffffff81e8b2f0 t gmc_v9_0_hw_fini +ffffffff81e8b3b0 t gmc_v9_0_suspend +ffffffff81e8b470 t gmc_v9_0_resume +ffffffff81e8b4d0 t gmc_v9_0_is_idle +ffffffff81e8b500 t gmc_v9_0_wait_for_idle +ffffffff81e8b530 t gmc_v9_0_soft_reset +ffffffff81e8b560 t gmc_v9_0_set_clockgating_state +ffffffff81e8b5c0 t gmc_v9_0_set_powergating_state +ffffffff81e8b5f0 t gmc_v9_0_get_clockgating_state +ffffffff81e8b630 t gmc_v9_0_flush_gpu_tlb +ffffffff81e8bcd0 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e8c080 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e8c280 t gmc_v9_0_emit_pasid_mapping +ffffffff81e8c300 t gmc_v9_0_map_mtype +ffffffff81e8c340 t gmc_v9_0_get_vm_pde +ffffffff81e8c440 t gmc_v9_0_get_vm_pte +ffffffff81e8c770 t gmc_v9_0_override_vm_pte_flags +ffffffff81e8c830 t gmc_v9_0_get_vbios_fb_size +ffffffff81e8c9d0 t gmc_v9_0_query_memory_partition +ffffffff81e8ca30 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e8ced0 t gmc_v9_0_process_interrupt +ffffffff81e8d6d0 t gmc_v9_0_ecc_interrupt_state +ffffffff81e8d830 t gmc_v9_0_init_mem_ranges +ffffffff81e8dc50 t gmc_v9_0_gart_init +ffffffff81e8dd80 t gmc_v9_0_save_registers +ffffffff81e8e000 t hdp_v4_0_query_ras_error_count +ffffffff81e8e0c0 t hdp_v4_0_reset_ras_error_count +ffffffff81e8e1e0 t hdp_v4_0_flush_hdp +ffffffff81e8e230 t hdp_v4_0_invalidate_hdp +ffffffff81e8e310 t hdp_v4_0_update_clock_gating +ffffffff81e8e410 t hdp_v4_0_get_clockgating_state +ffffffff81e8e460 t hdp_v4_0_init_registers +ffffffff81e8f000 t hdp_v5_0_flush_hdp +ffffffff81e8f050 t hdp_v5_0_invalidate_hdp +ffffffff81e8f0f0 t hdp_v5_0_update_clock_gating +ffffffff81e8f4f0 t hdp_v5_0_get_clockgating_state +ffffffff81e8f610 t hdp_v5_0_init_registers +ffffffff81e90000 t hdp_v5_2_flush_hdp +ffffffff81e90050 t hdp_v5_2_update_clock_gating +ffffffff81e90460 t hdp_v5_2_get_clockgating_state +ffffffff81e91000 t hdp_v6_0_flush_hdp +ffffffff81e91050 t hdp_v6_0_update_clock_gating +ffffffff81e91380 t hdp_v6_0_get_clockgating_state +ffffffff81e92000 t iceland_ih_early_init +ffffffff81e92050 t iceland_ih_sw_init +ffffffff81e920b0 t iceland_ih_sw_fini +ffffffff81e920f0 t iceland_ih_hw_init +ffffffff81e92310 t iceland_ih_hw_fini +ffffffff81e923e0 t iceland_ih_suspend +ffffffff81e924b0 t iceland_ih_resume +ffffffff81e924f0 t iceland_ih_is_idle +ffffffff81e92540 t iceland_ih_wait_for_idle +ffffffff81e925e0 t iceland_ih_soft_reset +ffffffff81e926c0 t iceland_ih_set_clockgating_state +ffffffff81e926f0 t iceland_ih_set_powergating_state +ffffffff81e92720 t iceland_ih_get_wptr +ffffffff81e92810 t iceland_ih_decode_iv +ffffffff81e92890 t iceland_ih_set_rptr +ffffffff81e93000 t ih_v6_0_early_init +ffffffff81e93050 t ih_v6_0_sw_init +ffffffff81e931b0 t ih_v6_0_sw_fini +ffffffff81e931f0 t ih_v6_0_hw_init +ffffffff81e937a0 t ih_v6_0_hw_fini +ffffffff81e93800 t ih_v6_0_suspend +ffffffff81e93860 t ih_v6_0_resume +ffffffff81e93870 t ih_v6_0_is_idle +ffffffff81e938a0 t ih_v6_0_wait_for_idle +ffffffff81e938d0 t ih_v6_0_soft_reset +ffffffff81e93900 t ih_v6_0_set_clockgating_state +ffffffff81e93a30 t ih_v6_0_set_powergating_state +ffffffff81e93bb0 t ih_v6_0_get_clockgating_state +ffffffff81e93c40 t ih_v6_0_get_wptr +ffffffff81e93d30 t ih_v6_0_set_rptr +ffffffff81e93e00 t ih_v6_0_self_irq +ffffffff81e93e70 t ih_v6_0_toggle_interrupts +ffffffff81e94050 t force_update_wptr_for_self_int +ffffffff81e95000 t ih_v6_1_early_init +ffffffff81e95050 t ih_v6_1_sw_init +ffffffff81e951b0 t ih_v6_1_sw_fini +ffffffff81e951f0 t ih_v6_1_hw_init +ffffffff81e957a0 t ih_v6_1_hw_fini +ffffffff81e95800 t ih_v6_1_suspend +ffffffff81e95860 t ih_v6_1_resume +ffffffff81e95870 t ih_v6_1_is_idle +ffffffff81e958a0 t ih_v6_1_wait_for_idle +ffffffff81e958d0 t ih_v6_1_soft_reset +ffffffff81e95900 t ih_v6_1_set_clockgating_state +ffffffff81e95a30 t ih_v6_1_set_powergating_state +ffffffff81e95bb0 t ih_v6_1_get_clockgating_state +ffffffff81e95c40 t ih_v6_1_get_wptr +ffffffff81e95d30 t ih_v6_1_set_rptr +ffffffff81e95e00 t ih_v6_1_self_irq +ffffffff81e95e70 t ih_v6_1_toggle_interrupts +ffffffff81e96050 t force_update_wptr_for_self_int +ffffffff81e97000 t imu_v11_0_init_microcode +ffffffff81e97170 t imu_v11_0_load_microcode +ffffffff81e974f0 t imu_v11_0_setup +ffffffff81e97780 t imu_v11_0_start +ffffffff81e97880 t imu_v11_0_program_rlc_ram +ffffffff81e97a40 t imu_v11_0_wait_for_reset_status +ffffffff81e97b90 t program_imu_rlc_ram +ffffffff81e98000 T imu_v11_0_3_program_rlc_ram +ffffffff81e99000 T jpeg_v1_0_early_init +ffffffff81e99080 T jpeg_v1_0_sw_init +ffffffff81e99170 T jpeg_v1_0_sw_fini +ffffffff81e99190 T jpeg_v1_0_start +ffffffff81e99c40 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e99cd0 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e99d60 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e99dd0 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e9a6f0 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e9b030 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e9b0a0 t jpeg_v1_0_decode_ring_nop +ffffffff81e9b200 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e9b3c0 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e9b580 t jpeg_v1_0_ring_begin_use +ffffffff81e9b680 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e9b8e0 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e9bd00 t jpeg_v1_0_set_interrupt_state +ffffffff81e9bd30 t jpeg_v1_0_process_interrupt +ffffffff81e9c000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e9c1a0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e9c340 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e9ca20 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e9d1d0 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e9d580 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e9d5f0 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e9d830 T jpeg_v2_0_dec_ring_nop +ffffffff81e9d990 t jpeg_v2_0_early_init +ffffffff81e9da20 t jpeg_v2_0_sw_init +ffffffff81e9db50 t jpeg_v2_0_sw_fini +ffffffff81e9dba0 t jpeg_v2_0_hw_init +ffffffff81e9dc20 t jpeg_v2_0_hw_fini +ffffffff81e9dd00 t jpeg_v2_0_suspend +ffffffff81e9dd30 t jpeg_v2_0_resume +ffffffff81e9ddc0 t jpeg_v2_0_is_idle +ffffffff81e9de50 t jpeg_v2_0_wait_for_idle +ffffffff81e9de90 t jpeg_v2_0_set_clockgating_state +ffffffff81e9df40 t jpeg_v2_0_set_powergating_state +ffffffff81e9e660 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e9e6f0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e9e790 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e9e830 t jpeg_v2_0_set_interrupt_state +ffffffff81e9e860 t jpeg_v2_0_process_interrupt +ffffffff81e9e8f0 t jpeg_v2_0_enable_clock_gating +ffffffff81e9eaa0 t jpeg_v2_0_disable_clock_gating +ffffffff81e9f000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e9f150 t jpeg_v2_5_early_init +ffffffff81e9f350 t jpeg_v2_5_sw_init +ffffffff81e9f5f0 t jpeg_v2_5_sw_fini +ffffffff81e9f640 t jpeg_v2_5_hw_init +ffffffff81e9f730 t jpeg_v2_5_hw_fini +ffffffff81e9f8b0 t jpeg_v2_5_suspend +ffffffff81e9f8e0 t jpeg_v2_5_resume +ffffffff81e9f9e0 t jpeg_v2_5_is_idle +ffffffff81e9fae0 t jpeg_v2_5_wait_for_idle +ffffffff81e9fb90 t jpeg_v2_5_set_clockgating_state +ffffffff81e9fc40 t jpeg_v2_5_set_powergating_state +ffffffff81ea0370 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81ea0410 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81ea04c0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81ea0570 t jpeg_v2_6_dec_ring_insert_start +ffffffff81ea0730 t jpeg_v2_6_dec_ring_insert_end +ffffffff81ea08f0 t jpeg_v2_5_set_interrupt_state +ffffffff81ea0920 t jpeg_v2_5_process_interrupt +ffffffff81ea09e0 t jpeg_v2_6_set_ras_interrupt_state +ffffffff81ea0a10 t jpeg_v2_5_enable_clock_gating +ffffffff81ea0af0 t jpeg_v2_5_disable_clock_gating +ffffffff81ea1000 t jpeg_v3_0_early_init +ffffffff81ea1110 t jpeg_v3_0_sw_init +ffffffff81ea1240 t jpeg_v3_0_sw_fini +ffffffff81ea1290 t jpeg_v3_0_hw_init +ffffffff81ea1310 t jpeg_v3_0_hw_fini +ffffffff81ea13f0 t jpeg_v3_0_suspend +ffffffff81ea1420 t jpeg_v3_0_resume +ffffffff81ea14b0 t jpeg_v3_0_is_idle +ffffffff81ea1540 t jpeg_v3_0_wait_for_idle +ffffffff81ea1580 t jpeg_v3_0_set_clockgating_state +ffffffff81ea1630 t jpeg_v3_0_set_powergating_state +ffffffff81ea1e10 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81ea1ea0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81ea1f40 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81ea1fe0 t jpeg_v3_0_set_interrupt_state +ffffffff81ea2010 t jpeg_v3_0_process_interrupt +ffffffff81ea20a0 t jpeg_v3_0_enable_clock_gating +ffffffff81ea2170 t jpeg_v3_0_disable_clock_gating +ffffffff81ea3000 t jpeg_v4_0_query_ras_poison_status +ffffffff81ea3150 t jpeg_v4_0_early_init +ffffffff81ea3220 t jpeg_v4_0_sw_init +ffffffff81ea33c0 t jpeg_v4_0_sw_fini +ffffffff81ea3410 t jpeg_v4_0_hw_init +ffffffff81ea3a40 t jpeg_v4_0_hw_fini +ffffffff81ea3b10 t jpeg_v4_0_suspend +ffffffff81ea3b40 t jpeg_v4_0_resume +ffffffff81ea3b90 t jpeg_v4_0_is_idle +ffffffff81ea3c20 t jpeg_v4_0_wait_for_idle +ffffffff81ea3c60 t jpeg_v4_0_set_clockgating_state +ffffffff81ea3d10 t jpeg_v4_0_set_powergating_state +ffffffff81ea4470 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81ea4500 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81ea45a0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81ea4640 t jpeg_v4_0_set_interrupt_state +ffffffff81ea4670 t jpeg_v4_0_process_interrupt +ffffffff81ea4710 t jpeg_v4_0_set_ras_interrupt_state +ffffffff81ea4740 t jpeg_v4_0_enable_clock_gating +ffffffff81ea4900 t jpeg_v4_0_disable_clock_gating +ffffffff81ea5000 t jpeg_v4_0_3_early_init +ffffffff81ea5170 t jpeg_v4_0_3_sw_init +ffffffff81ea54a0 t jpeg_v4_0_3_sw_fini +ffffffff81ea54f0 t jpeg_v4_0_3_hw_init +ffffffff81ea5f50 t jpeg_v4_0_3_hw_fini +ffffffff81ea5fe0 t jpeg_v4_0_3_suspend +ffffffff81ea6060 t jpeg_v4_0_3_resume +ffffffff81ea60b0 t jpeg_v4_0_3_is_idle +ffffffff81ea6290 t jpeg_v4_0_3_wait_for_idle +ffffffff81ea63e0 t jpeg_v4_0_3_set_clockgating_state +ffffffff81ea6470 t jpeg_v4_0_3_set_powergating_state +ffffffff81ea70d0 t jpeg_v4_0_3_dec_ring_get_rptr +ffffffff81ea7240 t jpeg_v4_0_3_dec_ring_get_wptr +ffffffff81ea73d0 t jpeg_v4_0_3_dec_ring_set_wptr +ffffffff81ea7570 t jpeg_v4_0_3_dec_ring_emit_ib +ffffffff81ea7dd0 t jpeg_v4_0_3_dec_ring_emit_fence +ffffffff81ea8560 t jpeg_v4_0_3_dec_ring_emit_vm_flush +ffffffff81ea85d0 t jpeg_v4_0_3_dec_ring_nop +ffffffff81ea8730 t jpeg_v4_0_3_dec_ring_insert_start +ffffffff81ea88d0 t jpeg_v4_0_3_dec_ring_insert_end +ffffffff81ea8a70 t jpeg_v4_0_3_dec_ring_emit_wreg +ffffffff81ea8cb0 t jpeg_v4_0_3_dec_ring_emit_reg_wait +ffffffff81ea9060 t jpeg_v4_0_3_set_interrupt_state +ffffffff81ea9090 t jpeg_v4_0_3_process_interrupt +ffffffff81ea92d0 t jpeg_v4_0_3_query_ras_error_count +ffffffff81ea93c0 t jpeg_v4_0_3_reset_ras_error_count +ffffffff81ea94b0 t jpeg_v4_0_3_disable_clock_gating +ffffffff81eaa000 t lsdma_v6_0_copy_mem +ffffffff81eaa370 t lsdma_v6_0_fill_mem +ffffffff81eaa660 t lsdma_v6_0_update_memory_power_gating +ffffffff81eab000 t mca_v3_0_ras_block_match +ffffffff81eab050 t mca_v3_0_mp0_query_ras_error_count +ffffffff81eab070 t mca_v3_0_mp1_query_ras_error_count +ffffffff81eab090 t mca_v3_0_mpio_query_ras_error_count +ffffffff81eac000 t mes_v10_0_early_init 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mes_v11_0_sw_init +ffffffff81eaf570 t mes_v11_0_sw_fini +ffffffff81eaf730 t mes_v11_0_hw_init +ffffffff81eaff60 t mes_v11_0_hw_fini +ffffffff81eaff90 t mes_v11_0_suspend +ffffffff81eaffa0 t mes_v11_0_resume +ffffffff81eafff0 t mes_v11_0_kiq_hw_init +ffffffff81eb0200 t mes_v11_0_kiq_hw_fini +ffffffff81eb0340 t mes_v11_0_add_hw_queue +ffffffff81eb0540 t mes_v11_0_remove_hw_queue +ffffffff81eb05d0 t mes_v11_0_unmap_legacy_queue +ffffffff81eb06d0 t mes_v11_0_suspend_gang +ffffffff81eb0700 t mes_v11_0_resume_gang +ffffffff81eb0730 t mes_v11_0_misc_op +ffffffff81eb08f0 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff81eb0b10 t mes_v11_0_load_microcode +ffffffff81eb12a0 t mes_v11_0_enable +ffffffff81eb17b0 t mes_v11_0_queue_init +ffffffff81eb2250 t amdgpu_bo_unreserve +ffffffff81eb2330 t mes_v11_0_mqd_init +ffffffff81eb2520 t mes_v11_0_kiq_dequeue +ffffffff81eb2960 t mes_v11_0_ring_get_rptr +ffffffff81eb2990 t mes_v11_0_ring_get_wptr +ffffffff81eb2a00 t mes_v11_0_ring_set_wptr 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+ffffffff81ecb390 T xgpu_ai_mailbox_put_irq +ffffffff81ecb3d0 t xgpu_ai_request_full_gpu_access +ffffffff81ecb3f0 t xgpu_ai_release_full_gpu_access +ffffffff81ecb410 t xgpu_ai_request_init_data +ffffffff81ecb470 t xgpu_ai_request_reset +ffffffff81ecb520 t xgpu_ai_mailbox_trans_msg +ffffffff81ecb740 t xgpu_ai_ras_poison_handler +ffffffff81ecb770 t xgpu_ai_set_mailbox_ack_irq +ffffffff81ecb800 t xgpu_ai_mailbox_ack_irq +ffffffff81ecb850 t xgpu_ai_set_mailbox_rcv_irq +ffffffff81ecb8e0 t xgpu_ai_mailbox_rcv_irq +ffffffff81ecb9c0 t xgpu_ai_send_access_requests +ffffffff81ecbab0 t xgpu_ai_poll_msg +ffffffff81ecc000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81ecc050 T xgpu_nv_mailbox_add_irq_id +ffffffff81ecc0e0 T xgpu_nv_mailbox_get_irq +ffffffff81ecc190 t xgpu_nv_mailbox_flr_work +ffffffff81ecc3b0 T xgpu_nv_mailbox_put_irq +ffffffff81ecc3f0 t xgpu_nv_request_full_gpu_access +ffffffff81ecc410 t xgpu_nv_release_full_gpu_access +ffffffff81ecc430 t xgpu_nv_request_init_data +ffffffff81ecc450 t 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nbio_v7_4_get_hdp_flush_req_offset +ffffffff81ed8650 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff81ed8690 t nbio_v7_4_get_pcie_index_offset +ffffffff81ed86d0 t nbio_v7_4_get_pcie_data_offset +ffffffff81ed8710 t nbio_v7_4_get_rev_id +ffffffff81ed87e0 t nbio_v7_4_mc_access_enable +ffffffff81ed8890 t nbio_v7_4_get_memsize +ffffffff81ed8900 t nbio_v7_4_sdma_doorbell_range +ffffffff81ed89d0 t nbio_v7_4_vcn_doorbell_range +ffffffff81ed8a70 t nbio_v7_4_enable_doorbell_aperture +ffffffff81ed8b70 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff81ed8ce0 t nbio_v7_4_ih_doorbell_range +ffffffff81ed8e00 t nbio_v7_4_enable_doorbell_interrupt +ffffffff81ed8f50 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff81ed8f80 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff81ed9020 t nbio_v7_4_get_clockgating_state +ffffffff81ed90a0 t nbio_v7_4_ih_control +ffffffff81ed91f0 t nbio_v7_4_init_registers +ffffffff81ed92e0 t nbio_v7_4_remap_hdp_registers +ffffffff81ed93f0 t nbio_v7_4_program_aspm +ffffffff81ed9800 t nbio_v7_4_set_ras_controller_irq_state +ffffffff81ed9990 t nbio_v7_4_process_ras_controller_irq +ffffffff81ed99c0 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff81ed9b50 t nbio_v7_4_process_err_event_athub_irq +ffffffff81eda000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff81eda040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff81eda080 t nbio_v7_7_get_pcie_index_offset +ffffffff81eda0c0 t nbio_v7_7_get_pcie_data_offset +ffffffff81eda100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff81eda130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81eda170 t nbio_v7_7_get_rev_id +ffffffff81eda200 t nbio_v7_7_mc_access_enable +ffffffff81eda2b0 t nbio_v7_7_get_memsize +ffffffff81eda320 t nbio_v7_7_sdma_doorbell_range +ffffffff81eda3b0 t nbio_v7_7_vcn_doorbell_range +ffffffff81eda430 t nbio_v7_7_enable_doorbell_aperture +ffffffff81eda510 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81eda680 t nbio_v7_7_ih_doorbell_range +ffffffff81eda7a0 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81eda8e0 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81edaaf0 t nbio_v7_7_get_clockgating_state +ffffffff81edac00 t nbio_v7_7_ih_control +ffffffff81edad50 t nbio_v7_7_init_registers +ffffffff81edae70 t nbio_v7_7_remap_hdp_registers +ffffffff81edb000 t nbio_v7_9_get_hdp_flush_req_offset +ffffffff81edb040 t nbio_v7_9_get_hdp_flush_done_offset +ffffffff81edb080 t nbio_v7_9_get_pcie_index_offset +ffffffff81edb0c0 t nbio_v7_9_get_pcie_data_offset +ffffffff81edb100 t nbio_v7_9_get_pcie_index_hi_offset +ffffffff81edb140 t nbio_v7_9_get_rev_id +ffffffff81edb1d0 t nbio_v7_9_mc_access_enable +ffffffff81edb280 t nbio_v7_9_get_memsize +ffffffff81edb2f0 t nbio_v7_9_sdma_doorbell_range +ffffffff81edb630 t nbio_v7_9_vcn_doorbell_range +ffffffff81edb7c0 t nbio_v7_9_enable_doorbell_aperture +ffffffff81edb930 t nbio_v7_9_enable_doorbell_selfring_aperture +ffffffff81edbaa0 t nbio_v7_9_ih_doorbell_range +ffffffff81edbba0 t nbio_v7_9_enable_doorbell_interrupt +ffffffff81edbcb0 t nbio_v7_9_update_medium_grain_clock_gating +ffffffff81edbce0 t nbio_v7_9_update_medium_grain_light_sleep +ffffffff81edbd10 t nbio_v7_9_get_clockgating_state +ffffffff81edbd40 t nbio_v7_9_ih_control +ffffffff81edbe90 t nbio_v7_9_init_registers +ffffffff81edc1a0 t nbio_v7_9_remap_hdp_registers +ffffffff81edc2b0 t nbio_v7_9_get_compute_partition_mode +ffffffff81edc340 t nbio_v7_9_get_memory_partition_mode +ffffffff81edc430 t nbio_v7_9_get_pcie_replay_count +ffffffff81edc490 t nbio_v7_9_get_pcie_usage +ffffffff81edc5f0 t nbio_v7_9_query_ras_error_count +ffffffff81edc620 t nbio_v7_9_handle_ras_controller_intr_no_bifring +ffffffff81edc740 t nbio_v7_9_handle_ras_err_event_athub_intr_no_bifring +ffffffff81edc850 t nbio_v7_9_init_ras_controller_interrupt +ffffffff81edc890 t nbio_v7_9_init_ras_err_event_athub_interrupt +ffffffff81edc8d0 t nbio_v7_9_set_ras_controller_irq_state +ffffffff81edc900 t nbio_v7_9_process_ras_controller_irq +ffffffff81edc930 t nbio_v7_9_set_ras_err_event_athub_irq_state +ffffffff81edc960 t nbio_v7_9_process_err_event_athub_irq +ffffffff81edd000 T nv_grbm_select +ffffffff81edd0a0 T nv_set_virt_ops +ffffffff81edd0e0 t nv_common_early_init +ffffffff81edd4d0 t nv_common_late_init +ffffffff81edd580 t nv_common_sw_init +ffffffff81edd5c0 t nv_common_sw_fini +ffffffff81edd5f0 t nv_common_hw_init +ffffffff81edd6f0 t nv_common_hw_fini +ffffffff81edd750 t nv_common_suspend +ffffffff81edd7b0 t nv_common_resume +ffffffff81edd7f0 t nv_common_is_idle +ffffffff81edd820 t nv_common_wait_for_idle +ffffffff81edd850 t nv_common_soft_reset +ffffffff81edd880 t nv_common_set_clockgating_state +ffffffff81edd950 t nv_common_set_powergating_state +ffffffff81edd980 t nv_common_get_clockgating_state +ffffffff81edd9f0 t nv_didt_rreg +ffffffff81edda90 t nv_didt_wreg +ffffffff81eddb10 t nv_read_disabled_bios +ffffffff81eddb40 t nv_read_register +ffffffff81eddc30 t nv_asic_reset +ffffffff81eddd70 t nv_asic_reset_method +ffffffff81edde60 t nv_get_xclk +ffffffff81edde90 t nv_set_uvd_clocks +ffffffff81eddec0 t nv_set_vce_clocks +ffffffff81eddef0 t nv_get_config_memsize +ffffffff81eddf10 t nv_need_full_reset +ffffffff81eddf40 t nv_init_doorbell_index +ffffffff81ede070 t nv_need_reset_on_init +ffffffff81ede110 t nv_pre_asic_init +ffffffff81ede140 t nv_update_umd_stable_pstate +ffffffff81ede200 t nv_query_video_codecs +ffffffff81edf000 T psp_v10_0_set_psp_funcs +ffffffff81edf030 t psp_v10_0_init_microcode +ffffffff81edf0f0 t psp_v10_0_ring_create +ffffffff81edf400 t psp_v10_0_ring_stop +ffffffff81edf5f0 t psp_v10_0_ring_destroy +ffffffff81edf670 t psp_v10_0_mode1_reset +ffffffff81edf6c0 t psp_v10_0_ring_get_wptr +ffffffff81edf720 t psp_v10_0_ring_set_wptr +ffffffff81ee0000 T psp_v11_0_set_psp_funcs +ffffffff81ee0030 t psp_v11_0_init_microcode +ffffffff81ee0180 t psp_v11_0_bootloader_load_kdb +ffffffff81ee01a0 t psp_v11_0_bootloader_load_spl +ffffffff81ee01c0 t psp_v11_0_bootloader_load_sysdrv +ffffffff81ee01e0 t psp_v11_0_bootloader_load_sos +ffffffff81ee0540 t psp_v11_0_ring_create +ffffffff81ee0be0 t psp_v11_0_ring_stop +ffffffff81ee0e00 t psp_v11_0_ring_destroy +ffffffff81ee0e80 t psp_v11_0_mode1_reset +ffffffff81ee0f80 t psp_v11_0_memory_training +ffffffff81ee1400 t psp_v11_0_ring_get_wptr +ffffffff81ee1450 t psp_v11_0_ring_set_wptr +ffffffff81ee1590 t psp_v11_0_load_usbc_pd_fw +ffffffff81ee1780 t psp_v11_0_read_usbc_pd_fw +ffffffff81ee18a0 t psp_v11_0_bootloader_load_component +ffffffff81ee1a60 t psp_v11_0_wait_for_bootloader +ffffffff81ee1c30 t psp_v11_0_memory_training_send_msg +ffffffff81ee2000 T psp_v11_0_8_set_psp_funcs +ffffffff81ee2030 t psp_v11_0_8_ring_create +ffffffff81ee26d0 t psp_v11_0_8_ring_stop +ffffffff81ee2a60 t psp_v11_0_8_ring_destroy +ffffffff81ee2ae0 t psp_v11_0_8_ring_get_wptr +ffffffff81ee2b50 t psp_v11_0_8_ring_set_wptr +ffffffff81ee3000 T psp_v12_0_set_psp_funcs +ffffffff81ee3030 t psp_v12_0_init_microcode +ffffffff81ee30e0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81ee3410 t psp_v12_0_bootloader_load_sos +ffffffff81ee3790 t psp_v12_0_ring_create +ffffffff81ee4190 t psp_v12_0_ring_stop +ffffffff81ee43b0 t psp_v12_0_ring_destroy +ffffffff81ee4430 t psp_v12_0_mode1_reset +ffffffff81ee4530 t psp_v12_0_ring_get_wptr +ffffffff81ee45a0 t psp_v12_0_ring_set_wptr +ffffffff81ee5000 T psp_v13_0_set_psp_funcs +ffffffff81ee5030 t psp_v13_0_init_microcode +ffffffff81ee5130 t psp_v13_0_wait_for_bootloader_steady_state +ffffffff81ee5240 t psp_v13_0_bootloader_load_kdb +ffffffff81ee5260 t psp_v13_0_bootloader_load_spl +ffffffff81ee5280 t psp_v13_0_bootloader_load_sysdrv +ffffffff81ee52a0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81ee52c0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81ee52e0 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81ee5300 t psp_v13_0_bootloader_load_ras_drv +ffffffff81ee5320 t psp_v13_0_bootloader_load_sos +ffffffff81ee56f0 t psp_v13_0_ring_create +ffffffff81ee5d90 t psp_v13_0_ring_stop +ffffffff81ee6120 t psp_v13_0_ring_destroy +ffffffff81ee61a0 t psp_v13_0_memory_training +ffffffff81ee65d0 t psp_v13_0_ring_get_wptr +ffffffff81ee6640 t psp_v13_0_ring_set_wptr +ffffffff81ee6740 t psp_v13_0_load_usbc_pd_fw +ffffffff81ee6930 t psp_v13_0_read_usbc_pd_fw +ffffffff81ee6a50 t psp_v13_0_update_spirom +ffffffff81ee6c30 t psp_v13_0_vbflash_status +ffffffff81ee6c90 t psp_v13_0_fatal_error_recovery_quirk +ffffffff81ee6dc0 t psp_v13_0_bootloader_load_component +ffffffff81ee7030 t psp_v13_0_memory_training_send_msg +ffffffff81ee71a0 t psp_v13_0_exec_spi_cmd +ffffffff81ee8000 T psp_v13_0_4_set_psp_funcs +ffffffff81ee8030 t psp_v13_0_4_init_microcode +ffffffff81ee80d0 t psp_v13_0_4_bootloader_load_kdb +ffffffff81ee80f0 t psp_v13_0_4_bootloader_load_spl +ffffffff81ee8110 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81ee8130 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81ee8150 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81ee8170 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81ee8190 t psp_v13_0_4_bootloader_load_sos +ffffffff81ee8500 t psp_v13_0_4_ring_create +ffffffff81ee8bb0 t psp_v13_0_4_ring_stop +ffffffff81ee8f40 t psp_v13_0_4_ring_destroy +ffffffff81ee8fc0 t psp_v13_0_4_ring_get_wptr +ffffffff81ee9030 t psp_v13_0_4_ring_set_wptr +ffffffff81ee9130 t psp_v13_0_4_bootloader_load_component +ffffffff81ee9300 t psp_v13_0_4_wait_for_bootloader +ffffffff81eea000 T psp_v3_1_set_psp_funcs +ffffffff81eea030 t psp_v3_1_init_microcode +ffffffff81eea0c0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81eea3f0 t psp_v3_1_bootloader_load_sos +ffffffff81eea770 t psp_v3_1_ring_create +ffffffff81eeb290 t psp_v3_1_ring_stop +ffffffff81eeb4b0 t psp_v3_1_ring_destroy +ffffffff81eeb530 t psp_v3_1_smu_reload_quirk +ffffffff81eeb580 t psp_v3_1_mode1_reset +ffffffff81eeb680 t psp_v3_1_ring_get_wptr +ffffffff81eeb6d0 t psp_v3_1_ring_set_wptr +ffffffff81eec000 t sdma_v2_4_early_init +ffffffff81eec0f0 t sdma_v2_4_sw_init +ffffffff81eec4a0 t sdma_v2_4_sw_fini +ffffffff81eec550 t sdma_v2_4_hw_init +ffffffff81eec8f0 t sdma_v2_4_hw_fini +ffffffff81eec930 t sdma_v2_4_suspend +ffffffff81eec970 t sdma_v2_4_resume +ffffffff81eec980 t sdma_v2_4_is_idle +ffffffff81eec9c0 t sdma_v2_4_wait_for_idle +ffffffff81eeca60 t sdma_v2_4_soft_reset +ffffffff81eecba0 t sdma_v2_4_set_clockgating_state +ffffffff81eecbd0 t sdma_v2_4_set_powergating_state +ffffffff81eecc00 t sdma_v2_4_ring_get_rptr +ffffffff81eecc40 t sdma_v2_4_ring_get_wptr +ffffffff81eecca0 t sdma_v2_4_ring_set_wptr +ffffffff81eecce0 t sdma_v2_4_ring_emit_ib +ffffffff81eecf90 t sdma_v2_4_ring_emit_fence +ffffffff81eed390 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81eed610 t sdma_v2_4_ring_emit_vm_flush +ffffffff81eed880 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81eedb00 t sdma_v2_4_ring_test_ring +ffffffff81eedde0 t sdma_v2_4_ring_test_ib +ffffffff81eedfb0 t sdma_v2_4_ring_insert_nop +ffffffff81eee0e0 t sdma_v2_4_ring_pad_ib +ffffffff81eee210 t sdma_v2_4_ring_emit_wreg +ffffffff81eee360 t sdma_v2_4_emit_copy_buffer +ffffffff81eee420 t sdma_v2_4_emit_fill_buffer +ffffffff81eee4b0 t sdma_v2_4_vm_copy_pte +ffffffff81eee570 t sdma_v2_4_vm_write_pte +ffffffff81eee640 t sdma_v2_4_vm_set_pte_pde +ffffffff81eee740 t sdma_v2_4_set_trap_irq_state +ffffffff81eee800 t sdma_v2_4_process_trap_irq +ffffffff81eee8a0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81eee920 t sdma_v2_4_enable +ffffffff81eef000 t sdma_v3_0_early_init +ffffffff81eef100 t sdma_v3_0_sw_init +ffffffff81eef4c0 t sdma_v3_0_sw_fini +ffffffff81eef570 t sdma_v3_0_hw_init +ffffffff81eef6a0 t sdma_v3_0_hw_fini +ffffffff81eef6f0 t sdma_v3_0_suspend +ffffffff81eef740 t sdma_v3_0_resume +ffffffff81eef750 t sdma_v3_0_is_idle +ffffffff81eef790 t sdma_v3_0_wait_for_idle +ffffffff81eef830 t sdma_v3_0_check_soft_reset +ffffffff81eef890 t sdma_v3_0_pre_soft_reset +ffffffff81eef8e0 t sdma_v3_0_soft_reset +ffffffff81eef9b0 t sdma_v3_0_post_soft_reset +ffffffff81eefa00 t sdma_v3_0_set_clockgating_state +ffffffff81eefc60 t sdma_v3_0_set_powergating_state +ffffffff81eefc90 t sdma_v3_0_get_clockgating_state +ffffffff81eefd10 t sdma_v3_0_ring_get_rptr +ffffffff81eefd50 t sdma_v3_0_ring_get_wptr +ffffffff81eefdd0 t sdma_v3_0_ring_set_wptr +ffffffff81eefe80 t sdma_v3_0_ring_emit_ib +ffffffff81ef0130 t sdma_v3_0_ring_emit_fence +ffffffff81ef0530 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81ef07b0 t sdma_v3_0_ring_emit_vm_flush +ffffffff81ef0a20 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81ef0ca0 t sdma_v3_0_ring_test_ring +ffffffff81ef0f80 t sdma_v3_0_ring_test_ib +ffffffff81ef1150 t sdma_v3_0_ring_insert_nop +ffffffff81ef1280 t sdma_v3_0_ring_pad_ib +ffffffff81ef13b0 t sdma_v3_0_ring_emit_wreg +ffffffff81ef1500 t sdma_v3_0_emit_copy_buffer +ffffffff81ef15c0 t sdma_v3_0_emit_fill_buffer +ffffffff81ef1650 t sdma_v3_0_vm_copy_pte +ffffffff81ef1710 t sdma_v3_0_vm_write_pte +ffffffff81ef17e0 t sdma_v3_0_vm_set_pte_pde +ffffffff81ef18e0 t sdma_v3_0_set_trap_irq_state +ffffffff81ef19a0 t sdma_v3_0_process_trap_irq +ffffffff81ef1a40 t sdma_v3_0_process_illegal_inst_irq +ffffffff81ef1ac0 t sdma_v3_0_ctx_switch_enable +ffffffff81ef1c60 t sdma_v3_0_enable +ffffffff81ef1dd0 t sdma_v3_0_gfx_resume +ffffffff81ef3000 t sdma_v4_0_early_init +ffffffff81ef32d0 t sdma_v4_0_late_init +ffffffff81ef3570 t sdma_v4_0_sw_init +ffffffff81ef39b0 t sdma_v4_0_sw_fini +ffffffff81ef3a70 t sdma_v4_0_hw_init +ffffffff81ef69d0 t sdma_v4_0_hw_fini +ffffffff81ef6a90 t sdma_v4_0_suspend +ffffffff81ef6ae0 t sdma_v4_0_resume +ffffffff81ef6b60 t sdma_v4_0_is_idle +ffffffff81ef6c90 t sdma_v4_0_wait_for_idle +ffffffff81ef6e30 t sdma_v4_0_soft_reset +ffffffff81ef6e60 t sdma_v4_0_set_clockgating_state +ffffffff81ef7360 t sdma_v4_0_set_powergating_state +ffffffff81ef7420 t sdma_v4_0_get_clockgating_state +ffffffff81ef74c0 t sdma_v4_0_query_ras_error_count +ffffffff81ef7690 t sdma_v4_0_reset_ras_error_count +ffffffff81ef77e0 t sdma_v4_0_ring_get_rptr +ffffffff81ef7840 t sdma_v4_0_ring_get_wptr +ffffffff81ef7a30 t sdma_v4_0_ring_set_wptr +ffffffff81ef7cb0 t sdma_v4_0_ring_emit_ib +ffffffff81ef7f60 t sdma_v4_0_ring_emit_fence +ffffffff81ef8380 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81ef83e0 t sdma_v4_0_ring_emit_vm_flush +ffffffff81ef8400 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81ef84b0 t sdma_v4_0_ring_test_ring +ffffffff81ef8790 t sdma_v4_0_ring_test_ib +ffffffff81ef8960 t sdma_v4_0_ring_insert_nop +ffffffff81ef8a90 t sdma_v4_0_ring_pad_ib +ffffffff81ef8bc0 t sdma_v4_0_ring_emit_wreg +ffffffff81ef8d10 t sdma_v4_0_ring_emit_reg_wait +ffffffff81ef8d60 t sdma_v4_0_wait_reg_mem +ffffffff81ef9070 t sdma_v4_0_page_ring_get_wptr +ffffffff81ef9220 t sdma_v4_0_page_ring_set_wptr +ffffffff81ef93e0 t sdma_v4_0_emit_copy_buffer +ffffffff81ef94a0 t sdma_v4_0_emit_fill_buffer +ffffffff81ef9530 t sdma_v4_0_vm_copy_pte +ffffffff81ef95f0 t sdma_v4_0_vm_write_pte +ffffffff81ef96c0 t sdma_v4_0_vm_set_pte_pde +ffffffff81ef97c0 t sdma_v4_0_set_trap_irq_state +ffffffff81ef9960 t sdma_v4_0_process_trap_irq +ffffffff81ef9a90 t sdma_v4_0_process_illegal_inst_irq +ffffffff81ef9bb0 t sdma_v4_0_set_ecc_irq_state +ffffffff81ef9d50 t sdma_v4_0_process_vm_hole_irq +ffffffff81ef9d90 t sdma_v4_0_print_iv_entry +ffffffff81ef9ed0 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81ef9f10 t sdma_v4_0_process_pool_timeout_irq +ffffffff81ef9f50 t sdma_v4_0_process_srbm_write_irq +ffffffff81ef9f90 t sdma_v4_0_process_ras_data_cb +ffffffff81efa010 t sdma_v4_0_ctx_switch_enable +ffffffff81efa6e0 t sdma_v4_0_enable +ffffffff81efaca0 t sdma_v4_0_gfx_enable +ffffffff81efc000 t sdma_v4_4_query_ras_error_count +ffffffff81efc290 t sdma_v4_4_reset_ras_error_count +ffffffff81efd000 t sdma_v4_4_2_early_init +ffffffff81efd280 t sdma_v4_4_2_late_init +ffffffff81efd2f0 t sdma_v4_4_2_sw_init +ffffffff81efd810 t sdma_v4_4_2_sw_fini +ffffffff81efd8c0 t sdma_v4_4_2_hw_init +ffffffff81efd910 t sdma_v4_4_2_hw_fini +ffffffff81efd9d0 t sdma_v4_4_2_suspend +ffffffff81efdab0 t sdma_v4_4_2_resume +ffffffff81efdb00 t sdma_v4_4_2_is_idle +ffffffff81efdba0 t sdma_v4_4_2_wait_for_idle +ffffffff81efdcc0 t sdma_v4_4_2_soft_reset +ffffffff81efdcf0 t sdma_v4_4_2_set_clockgating_state +ffffffff81efe0f0 t sdma_v4_4_2_set_powergating_state +ffffffff81efe120 t sdma_v4_4_2_get_clockgating_state +ffffffff81efe200 t sdma_v4_4_2_xcp_suspend +ffffffff81efe2c0 t sdma_v4_4_2_xcp_resume +ffffffff81efe300 t sdma_v4_4_2_ring_get_rptr +ffffffff81efe370 t sdma_v4_4_2_ring_get_wptr +ffffffff81efe4b0 t sdma_v4_4_2_ring_set_wptr +ffffffff81efe670 t sdma_v4_4_2_ring_emit_ib +ffffffff81efe920 t sdma_v4_4_2_ring_emit_fence +ffffffff81efed40 t sdma_v4_4_2_ring_emit_pipeline_sync +ffffffff81efeda0 t sdma_v4_4_2_ring_emit_vm_flush +ffffffff81efedc0 t sdma_v4_4_2_ring_emit_hdp_flush +ffffffff81efee70 t sdma_v4_4_2_ring_test_ring +ffffffff81eff150 t sdma_v4_4_2_ring_test_ib +ffffffff81eff320 t sdma_v4_4_2_ring_insert_nop +ffffffff81eff450 t sdma_v4_4_2_ring_pad_ib +ffffffff81eff580 t sdma_v4_4_2_ring_emit_wreg +ffffffff81eff6d0 t sdma_v4_4_2_ring_emit_reg_wait +ffffffff81eff720 t sdma_v4_4_2_wait_reg_mem +ffffffff81effa30 t sdma_v4_4_2_page_ring_get_wptr +ffffffff81effb30 t sdma_v4_4_2_page_ring_set_wptr +ffffffff81effc40 t sdma_v4_4_2_emit_copy_buffer +ffffffff81effd00 t sdma_v4_4_2_emit_fill_buffer +ffffffff81effd90 t sdma_v4_4_2_vm_copy_pte +ffffffff81effe50 t sdma_v4_4_2_vm_write_pte +ffffffff81efff20 t sdma_v4_4_2_vm_set_pte_pde +ffffffff81f00020 t sdma_v4_4_2_set_trap_irq_state +ffffffff81f00100 t sdma_v4_4_2_process_trap_irq +ffffffff81f00220 t sdma_v4_4_2_process_illegal_inst_irq +ffffffff81f002b0 t sdma_v4_4_2_set_ecc_irq_state +ffffffff81f00390 t sdma_v4_4_2_process_vm_hole_irq +ffffffff81f00470 t sdma_v4_4_2_process_doorbell_invalid_irq +ffffffff81f00550 t sdma_v4_4_2_process_pool_timeout_irq +ffffffff81f00630 t sdma_v4_4_2_process_srbm_write_irq +ffffffff81f00710 t sdma_v4_4_2_query_ras_error_count +ffffffff81f00860 t sdma_v4_4_2_reset_ras_error_count +ffffffff81f00990 t sdma_v4_4_2_inst_init_golden_registers +ffffffff81f00b10 t sdma_v4_4_2_inst_start +ffffffff81f01eb0 t sdma_v4_4_2_inst_ctx_switch_enable +ffffffff81f02180 t sdma_v4_4_2_inst_enable +ffffffff81f03000 t sdma_v5_0_early_init +ffffffff81f03130 t sdma_v5_0_sw_init +ffffffff81f03310 t sdma_v5_0_sw_fini +ffffffff81f033a0 t sdma_v5_0_hw_init +ffffffff81f04600 t sdma_v5_0_hw_fini +ffffffff81f04660 t sdma_v5_0_suspend +ffffffff81f046c0 t sdma_v5_0_resume +ffffffff81f046d0 t sdma_v5_0_is_idle +ffffffff81f04760 t sdma_v5_0_wait_for_idle +ffffffff81f04820 t sdma_v5_0_soft_reset +ffffffff81f04850 t sdma_v5_0_set_clockgating_state +ffffffff81f04a50 t sdma_v5_0_set_powergating_state +ffffffff81f04a80 t sdma_v5_0_get_clockgating_state +ffffffff81f04b20 t sdma_v5_0_ring_get_rptr +ffffffff81f04b80 t sdma_v5_0_ring_get_wptr +ffffffff81f04d20 t sdma_v5_0_ring_set_wptr +ffffffff81f05070 t sdma_v5_0_ring_emit_ib +ffffffff81f05330 t sdma_v5_0_ring_emit_fence +ffffffff81f05790 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81f05a10 t sdma_v5_0_ring_emit_vm_flush +ffffffff81f05a30 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81f05cd0 t sdma_v5_0_ring_test_ring +ffffffff81f06090 t sdma_v5_0_ring_test_ib +ffffffff81f063c0 t sdma_v5_0_ring_insert_nop +ffffffff81f064f0 t sdma_v5_0_ring_pad_ib +ffffffff81f06620 t sdma_v5_0_ring_init_cond_exec +ffffffff81f06850 t sdma_v5_0_ring_patch_cond_exec +ffffffff81f06910 t sdma_v5_0_ring_emit_wreg +ffffffff81f06a60 t sdma_v5_0_ring_emit_reg_wait +ffffffff81f06ce0 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81f06d60 t sdma_v5_0_ring_preempt_ib +ffffffff81f06ea0 t sdma_v5_0_ring_emit_mem_sync +ffffffff81f070b0 t sdma_v5_0_emit_copy_buffer +ffffffff81f07170 t sdma_v5_0_emit_fill_buffer +ffffffff81f07200 t sdma_v5_0_vm_copy_pte +ffffffff81f072c0 t sdma_v5_0_vm_write_pte +ffffffff81f07390 t sdma_v5_0_vm_set_pte_pde +ffffffff81f07490 t sdma_v5_0_set_trap_irq_state +ffffffff81f07520 t sdma_v5_0_process_trap_irq +ffffffff81f07630 t sdma_v5_0_process_illegal_inst_irq +ffffffff81f07660 t sdma_v5_0_mqd_init +ffffffff81f07740 t sdma_v5_0_ctx_switch_enable +ffffffff81f07a80 t sdma_v5_0_enable +ffffffff81f08000 t sdma_v5_2_early_init +ffffffff81f08130 t sdma_v5_2_sw_init +ffffffff81f08390 t sdma_v5_2_sw_fini +ffffffff81f08420 t sdma_v5_2_hw_init +ffffffff81f09fc0 t sdma_v5_2_hw_fini +ffffffff81f0a020 t sdma_v5_2_suspend +ffffffff81f0a080 t sdma_v5_2_resume +ffffffff81f0a090 t sdma_v5_2_is_idle +ffffffff81f0a140 t sdma_v5_2_wait_for_idle +ffffffff81f0a240 t sdma_v5_2_soft_reset +ffffffff81f0a500 t sdma_v5_2_set_clockgating_state +ffffffff81f0a860 t sdma_v5_2_set_powergating_state +ffffffff81f0a890 t sdma_v5_2_get_clockgating_state +ffffffff81f0a920 t sdma_v5_2_ring_get_rptr +ffffffff81f0a980 t sdma_v5_2_ring_get_wptr +ffffffff81f0aac0 t sdma_v5_2_ring_set_wptr +ffffffff81f0ac70 t sdma_v5_2_ring_emit_ib +ffffffff81f0af30 t sdma_v5_2_ring_emit_fence +ffffffff81f0b390 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81f0b610 t sdma_v5_2_ring_emit_vm_flush +ffffffff81f0b630 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81f0b8d0 t sdma_v5_2_ring_test_ring +ffffffff81f0bc90 t sdma_v5_2_ring_test_ib +ffffffff81f0bfc0 t sdma_v5_2_ring_insert_nop +ffffffff81f0c0f0 t sdma_v5_2_ring_pad_ib +ffffffff81f0c220 t sdma_v5_2_ring_init_cond_exec +ffffffff81f0c450 t sdma_v5_2_ring_patch_cond_exec +ffffffff81f0c510 t sdma_v5_2_ring_begin_use +ffffffff81f0c530 t sdma_v5_2_ring_end_use +ffffffff81f0c550 t sdma_v5_2_ring_emit_wreg +ffffffff81f0c6a0 t sdma_v5_2_ring_emit_reg_wait +ffffffff81f0c920 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81f0c9a0 t sdma_v5_2_ring_preempt_ib +ffffffff81f0cb10 t sdma_v5_2_ring_emit_mem_sync +ffffffff81f0cd20 t sdma_v5_2_emit_copy_buffer +ffffffff81f0cde0 t sdma_v5_2_emit_fill_buffer +ffffffff81f0ce70 t sdma_v5_2_vm_copy_pte +ffffffff81f0cf30 t sdma_v5_2_vm_write_pte +ffffffff81f0d000 t sdma_v5_2_vm_set_pte_pde +ffffffff81f0d100 t sdma_v5_2_set_trap_irq_state +ffffffff81f0d1c0 t sdma_v5_2_process_trap_irq +ffffffff81f0d300 t sdma_v5_2_process_illegal_inst_irq +ffffffff81f0d330 t sdma_v5_2_mqd_init +ffffffff81f0d410 t sdma_v5_2_ctx_switch_enable +ffffffff81f0d820 t sdma_v5_2_enable +ffffffff81f0e000 t sdma_v6_0_early_init +ffffffff81f0e120 t sdma_v6_0_sw_init +ffffffff81f0e2e0 t sdma_v6_0_sw_fini +ffffffff81f0e370 t sdma_v6_0_hw_init +ffffffff81f0e380 t sdma_v6_0_hw_fini +ffffffff81f0e450 t sdma_v6_0_suspend +ffffffff81f0e490 t sdma_v6_0_resume +ffffffff81f0e4a0 t sdma_v6_0_is_idle +ffffffff81f0e530 t sdma_v6_0_wait_for_idle +ffffffff81f0e5f0 t sdma_v6_0_check_soft_reset +ffffffff81f0e6b0 t sdma_v6_0_soft_reset +ffffffff81f0eb70 t sdma_v6_0_set_clockgating_state +ffffffff81f0eba0 t sdma_v6_0_set_powergating_state +ffffffff81f0ebd0 t sdma_v6_0_get_clockgating_state +ffffffff81f0ec00 t sdma_v6_0_ring_get_rptr +ffffffff81f0ec60 t sdma_v6_0_ring_get_wptr +ffffffff81f0ecd0 t sdma_v6_0_ring_set_wptr +ffffffff81f0f020 t sdma_v6_0_ring_emit_ib +ffffffff81f0f2e0 t sdma_v6_0_ring_emit_fence +ffffffff81f0f740 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81f0f9c0 t sdma_v6_0_ring_emit_vm_flush +ffffffff81f0fc30 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81f0fed0 t sdma_v6_0_ring_test_ring +ffffffff81f10290 t sdma_v6_0_ring_test_ib +ffffffff81f105c0 t sdma_v6_0_ring_insert_nop +ffffffff81f106f0 t sdma_v6_0_ring_pad_ib +ffffffff81f10820 t sdma_v6_0_ring_init_cond_exec +ffffffff81f10a50 t sdma_v6_0_ring_patch_cond_exec +ffffffff81f10b10 t sdma_v6_0_ring_emit_wreg +ffffffff81f10c60 t sdma_v6_0_ring_emit_reg_wait +ffffffff81f10ee0 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81f10f60 t sdma_v6_0_ring_preempt_ib +ffffffff81f110b0 t sdma_v6_0_ring_emit_mem_sync +ffffffff81f112c0 t sdma_v6_0_emit_copy_buffer +ffffffff81f11380 t sdma_v6_0_emit_fill_buffer +ffffffff81f11410 t sdma_v6_0_vm_copy_pte +ffffffff81f114d0 t sdma_v6_0_vm_write_pte +ffffffff81f115a0 t sdma_v6_0_vm_set_pte_pde +ffffffff81f116a0 t sdma_v6_0_set_trap_irq_state +ffffffff81f11730 t sdma_v6_0_process_trap_irq +ffffffff81f11860 t sdma_v6_0_process_illegal_inst_irq +ffffffff81f11890 t sdma_v6_0_mqd_init +ffffffff81f119b0 t sdma_v6_0_start +ffffffff81f11c90 t sdma_v6_0_enable +ffffffff81f11e20 t sdma_v6_0_gfx_resume +ffffffff81f12eb0 t sdma_v6_0_gfx_stop +ffffffff81f14000 T sienna_cichlid_reset_init +ffffffff81f140c0 t sienna_cichlid_async_reset +ffffffff81f14120 t sienna_cichlid_get_reset_handler +ffffffff81f141b0 T sienna_cichlid_reset_fini +ffffffff81f14210 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81f14360 t sienna_cichlid_mode2_perform_reset +ffffffff81f143e0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81f146d0 t sienna_cichlid_mode2_reset +ffffffff81f15000 T smu_v11_0_i2c_control_init +ffffffff81f150d0 T smu_v11_0_i2c_control_fini +ffffffff81f15110 t smu_v11_0_i2c_xfer +ffffffff81f162c0 t smu_v11_0_i2c_func +ffffffff81f162f0 t smu_v11_0_i2c_enable +ffffffff81f16440 t smu_v11_0_i2c_abort +ffffffff81f16550 t lock_bus +ffffffff81f165f0 t trylock_bus +ffffffff81f16640 t unlock_bus +ffffffff81f17000 T smu_v13_0_10_reset_init +ffffffff81f170c0 t smu_v13_0_10_async_reset +ffffffff81f17120 t smu_v13_0_10_get_reset_handler +ffffffff81f171d0 T smu_v13_0_10_reset_fini +ffffffff81f17230 t smu_v13_0_10_mode2_prepare_hwcontext +ffffffff81f17360 t smu_v13_0_10_mode2_perform_reset +ffffffff81f173e0 t smu_v13_0_10_mode2_restore_hwcontext +ffffffff81f17740 t smu_v13_0_10_mode2_reset +ffffffff81f18000 t smuio_v11_0_get_rom_index_offset +ffffffff81f18040 t smuio_v11_0_get_rom_data_offset +ffffffff81f18080 t smuio_v11_0_update_rom_clock_gating +ffffffff81f181d0 t smuio_v11_0_get_clock_gating_state +ffffffff81f19000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81f19040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81f19080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81f191d0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81f1a000 t smuio_v13_0_get_rom_index_offset +ffffffff81f1a040 t smuio_v13_0_get_rom_data_offset +ffffffff81f1a080 t smuio_v13_0_update_rom_clock_gating +ffffffff81f1a1d0 t smuio_v13_0_get_clock_gating_state +ffffffff81f1a270 t smuio_v13_0_get_die_id +ffffffff81f1a2f0 t smuio_v13_0_get_socket_id +ffffffff81f1a380 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81f1b000 t smuio_v13_0_3_get_die_id +ffffffff81f1b080 t smuio_v13_0_3_get_socket_id +ffffffff81f1b110 t smuio_v13_0_3_get_pkg_type +ffffffff81f1c000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81f1c040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81f1d000 t smuio_v9_0_get_rom_index_offset +ffffffff81f1d040 t smuio_v9_0_get_rom_data_offset +ffffffff81f1d080 t smuio_v9_0_update_rom_clock_gating +ffffffff81f1d1c0 t smuio_v9_0_get_clock_gating_state +ffffffff81f1e000 T soc15_grbm_select +ffffffff81f1e090 T soc15_program_register_sequence +ffffffff81f1e290 T soc15_set_virt_ops +ffffffff81f1e300 t soc15_common_early_init +ffffffff81f1e720 t soc15_common_late_init +ffffffff81f1e780 t soc15_common_sw_init +ffffffff81f1e7e0 t soc15_common_sw_fini +ffffffff81f1e830 t soc15_common_hw_init +ffffffff81f1e950 t soc15_common_hw_fini +ffffffff81f1ea20 t soc15_common_suspend +ffffffff81f1ea60 t soc15_common_resume +ffffffff81f1eaa0 t soc15_common_is_idle +ffffffff81f1ead0 t soc15_common_wait_for_idle +ffffffff81f1eb00 t soc15_common_soft_reset +ffffffff81f1eb30 t soc15_common_set_clockgating_state +ffffffff81f1ee70 t soc15_common_set_powergating_state +ffffffff81f1eea0 t soc15_common_get_clockgating_state +ffffffff81f1efd0 t soc15_uvd_ctx_rreg +ffffffff81f1f070 t soc15_uvd_ctx_wreg +ffffffff81f1f100 t soc15_didt_rreg +ffffffff81f1f1a0 t soc15_didt_wreg +ffffffff81f1f220 t soc15_gc_cac_rreg +ffffffff81f1f340 t soc15_gc_cac_wreg +ffffffff81f1f450 t soc15_se_cac_rreg +ffffffff81f1f570 t soc15_se_cac_wreg +ffffffff81f1f680 t soc15_read_disabled_bios +ffffffff81f1f6b0 t soc15_read_register +ffffffff81f1f7b0 t soc15_asic_reset +ffffffff81f1f8b0 t soc15_asic_reset_method +ffffffff81f1fa60 t soc15_get_xclk +ffffffff81f1fac0 t soc15_set_uvd_clocks +ffffffff81f1faf0 t soc15_set_vce_clocks +ffffffff81f1fb20 t soc15_get_config_memsize +ffffffff81f1fb40 t soc15_need_full_reset +ffffffff81f1fb70 t soc15_get_pcie_usage +ffffffff81f1fca0 t soc15_need_reset_on_init +ffffffff81f1fd50 t soc15_get_pcie_replay_count +ffffffff81f1fdc0 t soc15_supports_baco +ffffffff81f1fe20 t soc15_pre_asic_init +ffffffff81f1fe30 t soc15_query_video_codecs +ffffffff81f1ff20 t vega20_get_pcie_usage +ffffffff81f21000 T soc21_grbm_select +ffffffff81f21090 t soc21_common_early_init +ffffffff81f21200 t soc21_common_late_init +ffffffff81f212e0 t soc21_common_sw_init +ffffffff81f21320 t soc21_common_sw_fini +ffffffff81f21350 t soc21_common_hw_init +ffffffff81f21410 t soc21_common_hw_fini +ffffffff81f214b0 t soc21_common_suspend +ffffffff81f21550 t soc21_common_resume +ffffffff81f21610 t soc21_common_is_idle +ffffffff81f21640 t soc21_common_wait_for_idle +ffffffff81f21670 t soc21_common_soft_reset +ffffffff81f216a0 t soc21_common_set_clockgating_state +ffffffff81f21750 t soc21_common_set_powergating_state +ffffffff81f217b0 t soc21_common_get_clockgating_state +ffffffff81f21800 t soc21_didt_rreg +ffffffff81f218a0 t soc21_didt_wreg +ffffffff81f21920 t soc21_read_disabled_bios +ffffffff81f21950 t soc21_read_register +ffffffff81f21a40 t soc21_asic_reset +ffffffff81f21b20 t soc21_asic_reset_method +ffffffff81f21be0 t soc21_get_xclk +ffffffff81f21c10 t soc21_set_uvd_clocks +ffffffff81f21c40 t soc21_set_vce_clocks +ffffffff81f21c70 t soc21_get_config_memsize +ffffffff81f21c90 t soc21_need_full_reset +ffffffff81f21cf0 t soc21_init_doorbell_index +ffffffff81f21e10 t soc21_need_reset_on_init +ffffffff81f21eb0 t soc21_pre_asic_init +ffffffff81f21ee0 t soc21_update_umd_stable_pstate +ffffffff81f21f60 t soc21_query_video_codecs +ffffffff81f23000 t tonga_ih_early_init +ffffffff81f23050 t tonga_ih_sw_init +ffffffff81f230d0 t tonga_ih_sw_fini +ffffffff81f23110 t tonga_ih_hw_init +ffffffff81f232f0 t tonga_ih_hw_fini +ffffffff81f23390 t tonga_ih_suspend +ffffffff81f23430 t tonga_ih_resume +ffffffff81f23470 t tonga_ih_is_idle +ffffffff81f234c0 t tonga_ih_wait_for_idle +ffffffff81f23560 t tonga_ih_check_soft_reset +ffffffff81f235c0 t tonga_ih_pre_soft_reset +ffffffff81f23670 t tonga_ih_soft_reset +ffffffff81f23740 t tonga_ih_post_soft_reset +ffffffff81f23780 t tonga_ih_set_clockgating_state +ffffffff81f237b0 t tonga_ih_set_powergating_state +ffffffff81f237e0 t tonga_ih_get_wptr +ffffffff81f238d0 t tonga_ih_decode_iv +ffffffff81f23950 t tonga_ih_set_rptr +ffffffff81f24000 t umc_v6_0_init_registers +ffffffff81f25000 t umc_v6_1_query_ras_error_count +ffffffff81f254e0 t umc_v6_1_query_ras_error_address +ffffffff81f257c0 t umc_v6_1_err_cnt_init +ffffffff81f26000 T umc_v6_7_convert_error_address +ffffffff81f26320 t umc_v6_7_query_ras_error_count +ffffffff81f26360 t umc_v6_7_query_ras_error_address +ffffffff81f26380 t umc_v6_7_query_ras_poison_mode +ffffffff81f263e0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81f26400 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81f26420 t umc_v6_7_query_ecc_error_count +ffffffff81f26690 t umc_v6_7_reset_error_count_per_channel +ffffffff81f26790 t umc_v6_7_query_error_address +ffffffff81f268b0 t umc_v6_7_ecc_info_querry_ecc_error_count +ffffffff81f26a80 t umc_v6_7_ecc_info_query_error_address +ffffffff81f27000 t umc_v8_10_query_ras_error_count +ffffffff81f27040 t umc_v8_10_query_ras_error_address +ffffffff81f27060 t umc_v8_10_err_cnt_init +ffffffff81f27080 t umc_v8_10_query_ras_poison_mode +ffffffff81f270b0 t umc_v8_10_ecc_info_query_ras_error_count +ffffffff81f270d0 t umc_v8_10_ecc_info_query_ras_error_address +ffffffff81f270f0 t umc_v8_10_set_eeprom_table_version +ffffffff81f27120 t umc_v8_10_query_ecc_error_count +ffffffff81f271f0 t umc_v8_10_clear_error_count_per_channel +ffffffff81f27260 t umc_v8_10_query_error_address +ffffffff81f27390 t umc_v8_10_convert_error_address +ffffffff81f275b0 t umc_v8_10_err_cnt_init_per_channel +ffffffff81f27660 t umc_v8_10_ecc_info_query_ecc_error_count +ffffffff81f27740 t umc_v8_10_ecc_info_query_error_address +ffffffff81f28000 t umc_v8_7_query_ras_error_count +ffffffff81f28310 t umc_v8_7_query_ras_error_address +ffffffff81f284d0 t umc_v8_7_err_cnt_init +ffffffff81f28630 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81f28750 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81f29000 t uvd_v5_0_early_init +ffffffff81f29050 t uvd_v5_0_sw_init +ffffffff81f29140 t uvd_v5_0_sw_fini +ffffffff81f29190 t uvd_v5_0_hw_init +ffffffff81f29690 t uvd_v5_0_hw_fini +ffffffff81f29710 t uvd_v5_0_suspend +ffffffff81f29810 t uvd_v5_0_resume +ffffffff81f29860 t uvd_v5_0_is_idle +ffffffff81f298b0 t uvd_v5_0_wait_for_idle +ffffffff81f29940 t uvd_v5_0_soft_reset +ffffffff81f299e0 t uvd_v5_0_set_clockgating_state +ffffffff81f29b80 t uvd_v5_0_set_powergating_state +ffffffff81f29bc0 t uvd_v5_0_get_clockgating_state +ffffffff81f29c40 t uvd_v5_0_ring_get_rptr +ffffffff81f29c80 t uvd_v5_0_ring_get_wptr +ffffffff81f29cc0 t uvd_v5_0_ring_set_wptr +ffffffff81f29cf0 t uvd_v5_0_ring_emit_ib +ffffffff81f29f60 t uvd_v5_0_ring_emit_fence +ffffffff81f2a510 t uvd_v5_0_ring_test_ring +ffffffff81f2a6b0 t uvd_v5_0_ring_insert_nop +ffffffff81f2a810 t uvd_v5_0_set_interrupt_state +ffffffff81f2a840 t uvd_v5_0_process_interrupt +ffffffff81f2a8a0 t uvd_v5_0_stop +ffffffff81f2a9b0 t uvd_v5_0_start +ffffffff81f2c000 t uvd_v6_0_early_init +ffffffff81f2c160 t uvd_v6_0_sw_init +ffffffff81f2c3c0 t uvd_v6_0_sw_fini +ffffffff81f2c480 t uvd_v6_0_hw_init +ffffffff81f2ca30 t uvd_v6_0_hw_fini +ffffffff81f2cab0 t uvd_v6_0_suspend +ffffffff81f2cbb0 t uvd_v6_0_resume +ffffffff81f2cc00 t uvd_v6_0_is_idle +ffffffff81f2cc50 t uvd_v6_0_wait_for_idle +ffffffff81f2cce0 t uvd_v6_0_check_soft_reset +ffffffff81f2cd60 t uvd_v6_0_pre_soft_reset +ffffffff81f2cda0 t uvd_v6_0_soft_reset +ffffffff81f2ce70 t uvd_v6_0_post_soft_reset +ffffffff81f2cf10 t uvd_v6_0_set_clockgating_state +ffffffff81f2d0a0 t uvd_v6_0_set_powergating_state +ffffffff81f2d110 t uvd_v6_0_get_clockgating_state +ffffffff81f2d1a0 t uvd_v6_0_ring_get_rptr +ffffffff81f2d1e0 t uvd_v6_0_ring_get_wptr +ffffffff81f2d220 t uvd_v6_0_ring_set_wptr +ffffffff81f2d250 t uvd_v6_0_ring_emit_ib +ffffffff81f2d5b0 t uvd_v6_0_ring_emit_fence +ffffffff81f2db60 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81f2df50 t uvd_v6_0_ring_emit_vm_flush +ffffffff81f2e2b0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81f2e2e0 t uvd_v6_0_ring_test_ring +ffffffff81f2e480 t uvd_v6_0_ring_insert_nop +ffffffff81f2e5e0 t uvd_v6_0_ring_emit_wreg +ffffffff81f2e860 t uvd_v6_0_enc_ring_get_rptr +ffffffff81f2e8c0 t uvd_v6_0_enc_ring_get_wptr +ffffffff81f2e920 t uvd_v6_0_enc_ring_set_wptr +ffffffff81f2e960 t uvd_v6_0_enc_ring_emit_ib +ffffffff81f2eba0 t uvd_v6_0_enc_ring_emit_fence +ffffffff81f2ede0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81f2ef90 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81f2f1a0 t uvd_v6_0_enc_ring_test_ring +ffffffff81f2f2f0 t uvd_v6_0_enc_ring_test_ib +ffffffff81f2f7d0 t uvd_v6_0_enc_ring_insert_end +ffffffff81f2f860 t uvd_v6_0_set_interrupt_state +ffffffff81f2f890 t uvd_v6_0_process_interrupt +ffffffff81f2f990 t uvd_v6_0_stop +ffffffff81f2faa0 t uvd_v6_0_start +ffffffff81f31000 t uvd_v7_0_early_init +ffffffff81f31270 t uvd_v7_0_sw_init +ffffffff81f31690 t uvd_v7_0_sw_fini +ffffffff81f31780 t uvd_v7_0_hw_init +ffffffff81f34540 t uvd_v7_0_hw_fini +ffffffff81f34850 t uvd_v7_0_suspend +ffffffff81f34900 t uvd_v7_0_resume +ffffffff81f34950 t uvd_v7_0_set_clockgating_state +ffffffff81f34980 t uvd_v7_0_ring_get_rptr +ffffffff81f34a20 t uvd_v7_0_ring_get_wptr +ffffffff81f34ac0 t uvd_v7_0_ring_set_wptr +ffffffff81f34b40 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81f34bb0 t uvd_v7_0_ring_emit_ib +ffffffff81f34f50 t uvd_v7_0_ring_emit_fence +ffffffff81f355a0 t uvd_v7_0_ring_emit_vm_flush +ffffffff81f35610 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81f35640 t uvd_v7_0_ring_test_ring +ffffffff81f358d0 t uvd_v7_0_ring_insert_nop +ffffffff81f35a70 t uvd_v7_0_ring_emit_wreg +ffffffff81f35d40 t uvd_v7_0_ring_emit_reg_wait +ffffffff81f360f0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81f361e0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81f362e0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81f363e0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81f36620 t uvd_v7_0_enc_ring_emit_fence +ffffffff81f36860 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81f368d0 t uvd_v7_0_enc_ring_test_ring +ffffffff81f36a30 t uvd_v7_0_enc_ring_test_ib +ffffffff81f36f10 t uvd_v7_0_enc_ring_insert_end +ffffffff81f36fa0 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81f370f0 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81f372b0 t uvd_v7_0_set_interrupt_state +ffffffff81f372e0 t uvd_v7_0_process_interrupt +ffffffff81f38000 t vce_v3_0_early_init +ffffffff81f38180 t vce_v3_0_sw_init +ffffffff81f382e0 t vce_v3_0_sw_fini +ffffffff81f38330 t vce_v3_0_hw_init +ffffffff81f38400 t vce_v3_0_hw_fini +ffffffff81f384f0 t vce_v3_0_suspend +ffffffff81f385c0 t vce_v3_0_resume +ffffffff81f386a0 t vce_v3_0_is_idle +ffffffff81f38710 t vce_v3_0_wait_for_idle +ffffffff81f387c0 t vce_v3_0_check_soft_reset +ffffffff81f388c0 t vce_v3_0_pre_soft_reset +ffffffff81f38960 t vce_v3_0_soft_reset +ffffffff81f38a30 t vce_v3_0_post_soft_reset +ffffffff81f38ad0 t vce_v3_0_set_clockgating_state +ffffffff81f38dc0 t vce_v3_0_set_powergating_state +ffffffff81f395e0 t vce_v3_0_get_clockgating_state +ffffffff81f396a0 t vce_v3_0_ring_get_rptr +ffffffff81f39770 t vce_v3_0_ring_get_wptr +ffffffff81f39840 t vce_v3_0_ring_set_wptr +ffffffff81f39900 t vce_v3_0_ring_emit_ib +ffffffff81f39b40 t vce_v3_0_emit_pipeline_sync +ffffffff81f39cf0 t vce_v3_0_emit_vm_flush +ffffffff81f39f60 t vce_v3_0_set_interrupt_state +ffffffff81f39fd0 t vce_v3_0_process_interrupt +ffffffff81f3a090 t vce_v3_0_stop +ffffffff81f3b000 t vce_v4_0_early_init +ffffffff81f3b0b0 t vce_v4_0_sw_init +ffffffff81f3b350 t vce_v4_0_sw_fini +ffffffff81f3b3d0 t vce_v4_0_hw_init +ffffffff81f3bb90 t vce_v4_0_hw_fini +ffffffff81f3bcc0 t vce_v4_0_suspend +ffffffff81f3bde0 t vce_v4_0_resume +ffffffff81f3be90 t vce_v4_0_set_clockgating_state +ffffffff81f3bec0 t vce_v4_0_set_powergating_state +ffffffff81f3bfa0 t vce_v4_0_ring_get_rptr +ffffffff81f3c010 t vce_v4_0_ring_get_wptr +ffffffff81f3c0a0 t vce_v4_0_ring_set_wptr +ffffffff81f3c130 t vce_v4_0_ring_emit_ib +ffffffff81f3c370 t vce_v4_0_ring_emit_fence +ffffffff81f3c5b0 t vce_v4_0_emit_vm_flush +ffffffff81f3c620 t vce_v4_0_ring_insert_end +ffffffff81f3c6b0 t vce_v4_0_emit_wreg +ffffffff81f3c800 t vce_v4_0_emit_reg_wait +ffffffff81f3c9c0 t vce_v4_0_set_interrupt_state +ffffffff81f3ca50 t vce_v4_0_process_interrupt +ffffffff81f3caf0 t vce_v4_0_start +ffffffff81f3e000 T vcn_dec_sw_ring_emit_fence +ffffffff81f3e240 T vcn_dec_sw_ring_insert_end +ffffffff81f3e2d0 T vcn_dec_sw_ring_emit_ib +ffffffff81f3e510 T vcn_dec_sw_ring_emit_reg_wait +ffffffff81f3e6d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81f3e740 T vcn_dec_sw_ring_emit_wreg +ffffffff81f3f000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81f3f140 T vcn_v1_0_ring_end_use +ffffffff81f3f1b0 t vcn_v1_0_early_init +ffffffff81f3f310 t vcn_v1_0_sw_init +ffffffff81f3f5b0 t vcn_v1_0_sw_fini +ffffffff81f3f610 t vcn_v1_0_hw_init +ffffffff81f3f6e0 t vcn_v1_0_hw_fini +ffffffff81f3f7e0 t vcn_v1_0_suspend +ffffffff81f3f850 t vcn_v1_0_resume +ffffffff81f3f930 t vcn_v1_0_is_idle +ffffffff81f3f9c0 t vcn_v1_0_wait_for_idle +ffffffff81f3fa00 t vcn_v1_0_set_clockgating_state +ffffffff81f3fab0 t vcn_v1_0_set_powergating_state +ffffffff81f40010 t vcn_v1_0_dec_ring_get_rptr +ffffffff81f400a0 t vcn_v1_0_dec_ring_get_wptr +ffffffff81f40130 t vcn_v1_0_dec_ring_set_wptr +ffffffff81f40240 t vcn_v1_0_ring_patch_cs_in_place +ffffffff81f40400 t vcn_v1_0_dec_ring_emit_ib +ffffffff81f40780 t vcn_v1_0_dec_ring_emit_fence +ffffffff81f40d90 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff81f40e00 t vcn_v1_0_dec_ring_insert_nop +ffffffff81f40f90 t vcn_v1_0_dec_ring_insert_start +ffffffff81f41160 t vcn_v1_0_dec_ring_insert_end +ffffffff81f41270 t vcn_v1_0_ring_begin_use +ffffffff81f41310 t vcn_v1_0_dec_ring_emit_wreg +ffffffff81f415c0 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff81f41940 t vcn_v1_0_enc_ring_get_rptr +ffffffff81f41a20 t vcn_v1_0_enc_ring_get_wptr +ffffffff81f41b00 t vcn_v1_0_enc_ring_set_wptr +ffffffff81f41bc0 t vcn_v1_0_enc_ring_emit_ib +ffffffff81f41e00 t vcn_v1_0_enc_ring_emit_fence +ffffffff81f42040 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81f420b0 t vcn_v1_0_enc_ring_insert_end +ffffffff81f42140 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81f42290 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81f42450 t vcn_v1_0_set_interrupt_state +ffffffff81f42480 t vcn_v1_0_process_interrupt +ffffffff81f42530 t vcn_v1_0_idle_work_handler +ffffffff81f426a0 t vcn_v1_0_pause_dpg_mode +ffffffff81f43540 t vcn_v1_0_enable_clock_gating +ffffffff81f43970 t vcn_v1_0_disable_clock_gating +ffffffff81f43f30 t vcn_1_0_enable_static_power_gating +ffffffff81f440e0 t vcn_v1_0_start_dpg_mode +ffffffff81f47ea0 t vcn_v1_0_start_spg_mode +ffffffff81f4a0a0 t vcn_v1_0_clock_gating_dpg_mode +ffffffff81f4b000 T vcn_v2_0_dec_ring_insert_start +ffffffff81f4b1c0 T vcn_v2_0_dec_ring_insert_end +ffffffff81f4b2c0 T vcn_v2_0_dec_ring_insert_nop +ffffffff81f4b430 T vcn_v2_0_dec_ring_emit_fence +ffffffff81f4b9f0 T vcn_v2_0_dec_ring_emit_ib +ffffffff81f4bd50 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff81f4c0a0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff81f4c110 T vcn_v2_0_dec_ring_emit_wreg +ffffffff81f4c390 T vcn_v2_0_enc_ring_emit_fence +ffffffff81f4c5d0 T vcn_v2_0_enc_ring_insert_end +ffffffff81f4c660 T vcn_v2_0_enc_ring_emit_ib +ffffffff81f4c8a0 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff81f4ca60 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff81f4cad0 T vcn_v2_0_enc_ring_emit_wreg +ffffffff81f4cc20 T vcn_v2_0_dec_ring_test_ring +ffffffff81f4cec0 t vcn_v2_0_early_init +ffffffff81f4d020 t vcn_v2_0_sw_init +ffffffff81f4d350 t vcn_v2_0_sw_fini +ffffffff81f4d3d0 t vcn_v2_0_hw_init +ffffffff81f4dd50 t vcn_v2_0_hw_fini +ffffffff81f4de50 t vcn_v2_0_suspend +ffffffff81f4de80 t vcn_v2_0_resume +ffffffff81f4ded0 t vcn_v2_0_is_idle +ffffffff81f4df60 t vcn_v2_0_wait_for_idle +ffffffff81f4dfa0 t vcn_v2_0_set_clockgating_state +ffffffff81f4e030 t vcn_v2_0_set_powergating_state +ffffffff81f4e5f0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81f4e680 t vcn_v2_0_dec_ring_get_wptr +ffffffff81f4e720 t vcn_v2_0_dec_ring_set_wptr +ffffffff81f4e860 t vcn_v2_0_enc_ring_get_rptr +ffffffff81f4e940 t vcn_v2_0_enc_ring_get_wptr +ffffffff81f4ea30 t vcn_v2_0_enc_ring_set_wptr +ffffffff81f4eb20 t vcn_v2_0_set_interrupt_state +ffffffff81f4eb50 t vcn_v2_0_process_interrupt +ffffffff81f4ec00 t vcn_v2_0_pause_dpg_mode +ffffffff81f4f3f0 t vcn_v2_0_enable_clock_gating +ffffffff81f4f680 t vcn_v2_0_disable_clock_gating +ffffffff81f4faa0 t vcn_v2_0_start +ffffffff81f54050 t vcn_v2_0_enable_static_power_gating +ffffffff81f541b0 t vcn_v2_0_clock_gating_dpg_mode +ffffffff81f54f30 t vcn_v2_0_mc_resume_dpg_mode +ffffffff81f5a000 t vcn_v2_6_query_poison_status +ffffffff81f5a0e0 t vcn_v2_5_early_init +ffffffff81f5a3b0 t vcn_v2_5_sw_init +ffffffff81f5a880 t vcn_v2_5_sw_fini +ffffffff81f5a950 t vcn_v2_5_hw_init +ffffffff81f5b390 t vcn_v2_5_hw_fini +ffffffff81f5b500 t vcn_v2_5_suspend +ffffffff81f5b530 t vcn_v2_5_resume +ffffffff81f5b580 t vcn_v2_5_is_idle +ffffffff81f5b670 t vcn_v2_5_wait_for_idle +ffffffff81f5b710 t vcn_v2_5_set_clockgating_state +ffffffff81f5b790 t vcn_v2_5_set_powergating_state +ffffffff81f5d9e0 t vcn_v2_5_dec_ring_get_rptr +ffffffff81f5da80 t vcn_v2_5_dec_ring_get_wptr +ffffffff81f5db30 t vcn_v2_5_dec_ring_set_wptr +ffffffff81f5dbe0 t vcn_v2_5_enc_ring_get_rptr +ffffffff81f5dcd0 t vcn_v2_5_enc_ring_get_wptr +ffffffff81f5dde0 t vcn_v2_5_enc_ring_set_wptr +ffffffff81f5def0 t vcn_v2_5_set_interrupt_state +ffffffff81f5df20 t vcn_v2_5_process_interrupt +ffffffff81f5e010 t vcn_v2_6_set_ras_interrupt_state +ffffffff81f5e040 t vcn_v2_5_pause_dpg_mode +ffffffff81f5e7c0 t vcn_v2_5_enable_clock_gating +ffffffff81f5ead0 t vcn_v2_5_disable_clock_gating +ffffffff81f5efc0 t vcn_v2_5_start_dpg_mode +ffffffff81f62990 t vcn_v2_5_clock_gating_dpg_mode +ffffffff81f63740 t vcn_v2_5_mc_resume_dpg_mode +ffffffff81f68000 t vcn_v3_0_early_init +ffffffff81f68220 t vcn_v3_0_sw_init +ffffffff81f686e0 t vcn_v3_0_sw_fini +ffffffff81f687c0 t vcn_v3_0_hw_init +ffffffff81f69310 t vcn_v3_0_hw_fini +ffffffff81f69410 t vcn_v3_0_suspend +ffffffff81f69440 t vcn_v3_0_resume +ffffffff81f69490 t vcn_v3_0_is_idle +ffffffff81f69580 t vcn_v3_0_wait_for_idle +ffffffff81f69620 t vcn_v3_0_set_clockgating_state +ffffffff81f69730 t vcn_v3_0_set_powergating_state +ffffffff81f6bcc0 t vcn_v3_0_dec_ring_get_rptr +ffffffff81f6bd60 t vcn_v3_0_dec_ring_get_wptr +ffffffff81f6be10 t vcn_v3_0_dec_ring_set_wptr +ffffffff81f6bf80 t vcn_v3_0_ring_patch_cs_in_place +ffffffff81f6c2a0 t vcn_v3_0_enc_ring_get_rptr +ffffffff81f6c390 t vcn_v3_0_enc_ring_get_wptr +ffffffff81f6c4a0 t vcn_v3_0_enc_ring_set_wptr +ffffffff81f6c5b0 t vcn_v3_0_set_interrupt_state +ffffffff81f6c5e0 t vcn_v3_0_process_interrupt +ffffffff81f6c6d0 t vcn_v3_0_pause_dpg_mode +ffffffff81f6cf00 t vcn_v3_0_enable_clock_gating +ffffffff81f6d190 t vcn_v3_0_disable_clock_gating +ffffffff81f6d6c0 t vcn_v3_0_start_dpg_mode +ffffffff81f709b0 t vcn_v3_0_clock_gating_dpg_mode +ffffffff81f71790 t vcn_v3_0_mc_resume_dpg_mode +ffffffff81f76000 t vcn_v4_0_query_ras_poison_status +ffffffff81f760e0 t vcn_v4_0_early_init +ffffffff81f762a0 t vcn_v4_0_sw_init +ffffffff81f76560 t vcn_v4_0_sw_fini +ffffffff81f76640 t vcn_v4_0_hw_init +ffffffff81f77070 t vcn_v4_0_hw_fini +ffffffff81f771c0 t vcn_v4_0_suspend +ffffffff81f771f0 t vcn_v4_0_resume +ffffffff81f77240 t vcn_v4_0_is_idle +ffffffff81f77340 t vcn_v4_0_wait_for_idle +ffffffff81f773f0 t vcn_v4_0_set_clockgating_state +ffffffff81f77500 t vcn_v4_0_set_powergating_state +ffffffff81f77d40 t vcn_v4_0_unified_ring_get_rptr +ffffffff81f77e20 t vcn_v4_0_unified_ring_get_wptr +ffffffff81f77f10 t vcn_v4_0_unified_ring_set_wptr +ffffffff81f78010 t vcn_v4_0_ring_patch_cs_in_place +ffffffff81f783a0 t vcn_v4_0_limit_sched +ffffffff81f78400 t vcn_v4_0_set_interrupt_state +ffffffff81f78430 t vcn_v4_0_process_interrupt +ffffffff81f784f0 t vcn_v4_0_set_ras_interrupt_state +ffffffff81f78520 t vcn_v4_0_pause_dpg_mode +ffffffff81f787a0 t vcn_v4_0_enable_clock_gating +ffffffff81f78aa0 t vcn_v4_0_disable_clock_gating +ffffffff81f78f60 t vcn_v4_0_start +ffffffff81f7da50 t vcn_v4_0_disable_clock_gating_dpg_mode +ffffffff81f7e830 t vcn_v4_0_mc_resume_dpg_mode +ffffffff81f83000 t vcn_v4_0_3_early_init +ffffffff81f83100 t vcn_v4_0_3_sw_init +ffffffff81f83380 t vcn_v4_0_3_sw_fini +ffffffff81f83440 t vcn_v4_0_3_hw_init +ffffffff81f84140 t vcn_v4_0_3_hw_fini +ffffffff81f841d0 t vcn_v4_0_3_suspend +ffffffff81f84240 t vcn_v4_0_3_resume +ffffffff81f84290 t vcn_v4_0_3_is_idle +ffffffff81f84400 t vcn_v4_0_3_wait_for_idle +ffffffff81f84500 t vcn_v4_0_3_set_clockgating_state +ffffffff81f84690 t vcn_v4_0_3_set_powergating_state +ffffffff81f84d80 t vcn_v4_0_3_unified_ring_get_rptr +ffffffff81f84ef0 t vcn_v4_0_3_unified_ring_get_wptr +ffffffff81f85080 t vcn_v4_0_3_unified_ring_set_wptr +ffffffff81f85230 t vcn_v4_0_3_set_interrupt_state +ffffffff81f85260 t vcn_v4_0_3_process_interrupt +ffffffff81f85370 t vcn_v4_0_3_query_ras_error_count +ffffffff81f85460 t vcn_v4_0_3_reset_ras_error_count +ffffffff81f85550 t vcn_v4_0_3_pause_dpg_mode +ffffffff81f85580 t vcn_v4_0_3_enable_clock_gating +ffffffff81f858a0 t vcn_v4_0_3_disable_clock_gating +ffffffff81f85d80 t vcn_v4_0_3_start +ffffffff81f8a4a0 t vcn_v4_0_3_disable_clock_gating_dpg_mode +ffffffff81f8b240 t vcn_v4_0_3_mc_resume_dpg_mode +ffffffff81f90000 t vega10_ih_early_init +ffffffff81f90050 t vega10_ih_sw_init +ffffffff81f90300 t vega10_ih_sw_fini +ffffffff81f90340 t vega10_ih_hw_init +ffffffff81f906c0 t vega10_ih_hw_fini +ffffffff81f90710 t vega10_ih_suspend +ffffffff81f90760 t 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bios_parser_get_encoder_cap_info +ffffffff81fc6520 t bios_parser_set_scratch_critical_state +ffffffff81fc6530 t bios_parser_is_device_id_supported +ffffffff81fc65f0 t bios_parser_encoder_control +ffffffff81fc6630 t bios_parser_transmitter_control +ffffffff81fc6670 t bios_parser_enable_crtc +ffffffff81fc66c0 t bios_parser_adjust_pixel_clock +ffffffff81fc6700 t bios_parser_set_pixel_clock +ffffffff81fc6740 t bios_parser_set_dce_clock +ffffffff81fc6780 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff81fc67d0 t bios_parser_program_crtc_timing +ffffffff81fc6810 t bios_parser_program_display_engine_pll +ffffffff81fc6850 t bios_parser_enable_disp_power_gating +ffffffff81fc6890 t bios_parser_destroy +ffffffff81fc6950 t bios_get_board_layout_info +ffffffff81fc6bd0 t get_bios_object +ffffffff81fc6da0 t get_ss_info_from_ss_info_table +ffffffff81fc6f70 t get_ss_info_v3_1 +ffffffff81fc70e0 t get_ss_entry_number_from_ss_info_tbl +ffffffff81fc8000 T firmware_parser_create +ffffffff81fc9e70 t bios_parser_get_connectors_number +ffffffff81fc9fe0 t bios_parser_get_connector_id +ffffffff81fca040 t bios_parser_get_src_obj +ffffffff81fca2e0 t bios_parser_get_i2c_info +ffffffff81fca580 t bios_parser_get_hpd_info +ffffffff81fca6f0 t bios_parser_get_device_tag +ffffffff81fca9c0 t bios_parser_get_spread_spectrum_info +ffffffff81fcae40 t bios_parser_get_ss_entry_number +ffffffff81fcae70 t bios_parser_get_embedded_panel_info +ffffffff81fcb070 t bios_parser_get_gpio_pin_info +ffffffff81fcb190 t bios_parser_get_encoder_cap_info +ffffffff81fcb300 t bios_parser_is_accelerated_mode +ffffffff81fcb310 t bios_parser_set_scratch_critical_state +ffffffff81fcb320 t bios_parser_is_device_id_supported +ffffffff81fcb390 t bios_parser_encoder_control +ffffffff81fcb3d0 t bios_parser_transmitter_control +ffffffff81fcb410 t bios_parser_enable_crtc +ffffffff81fcb460 t bios_parser_set_pixel_clock +ffffffff81fcb4a0 t bios_parser_set_dce_clock +ffffffff81fcb4e0 t bios_parser_program_crtc_timing +ffffffff81fcb520 t bios_parser_enable_disp_power_gating +ffffffff81fcb560 t firmware_parser_destroy +ffffffff81fcb620 t bios_get_board_layout_info +ffffffff81fcbac0 t bios_parser_pack_data_tables +ffffffff81fcbaf0 t bios_get_atom_dc_golden_table +ffffffff81fcbc30 t bios_parser_enable_lvtma_control +ffffffff81fcbc80 t bios_parser_get_soc_bb_info +ffffffff81fcbd90 t bios_parser_get_disp_connector_caps_info +ffffffff81fcbef0 t bios_parser_get_lttpr_caps +ffffffff81fcc040 t bios_parser_get_lttpr_interop +ffffffff81fcc180 t bios_parser_get_connector_speed_cap_info +ffffffff81fcc2d0 t get_bios_object +ffffffff81fcc430 t get_bios_object_from_path_v3 +ffffffff81fcd000 T object_id_from_bios_object_id +ffffffff81fce000 T bios_get_image +ffffffff81fce050 T bios_is_accelerated_mode +ffffffff81fce0b0 T bios_set_scratch_acc_mode_change +ffffffff81fce0f0 T bios_set_scratch_critical_state +ffffffff81fce130 T bios_get_vga_enabled_displays +ffffffff81fcf000 T dal_bios_parser_create +ffffffff81fcf070 T dal_bios_parser_destroy +ffffffff81fd0000 T dal_bios_parser_init_cmd_tbl +ffffffff81fd0810 t encoder_control_digx_v3 +ffffffff81fd0910 t encoder_control_digx_v4 +ffffffff81fd0a10 t encoder_control_digx_v5 +ffffffff81fd0b60 t encoder_control_dig1_v1 +ffffffff81fd0be0 t encoder_control_dig2_v1 +ffffffff81fd0c60 t encoder_control_dig_v1 +ffffffff81fd0cc0 t transmitter_control_v2 +ffffffff81fd0e60 t transmitter_control_v3 +ffffffff81fd1010 t transmitter_control_v4 +ffffffff81fd11c0 t transmitter_control_v1_5 +ffffffff81fd1330 t transmitter_control_v1_6 +ffffffff81fd1490 t set_pixel_clock_v3 +ffffffff81fd1600 t set_pixel_clock_v5 +ffffffff81fd17a0 t set_pixel_clock_v6 +ffffffff81fd1940 t set_pixel_clock_v7 +ffffffff81fd1b10 t enable_spread_spectrum_on_ppll_v1 +ffffffff81fd1c30 t enable_spread_spectrum_on_ppll_v2 +ffffffff81fd1d60 t enable_spread_spectrum_on_ppll_v3 +ffffffff81fd1e70 t adjust_display_pll_v2 +ffffffff81fd1fc0 t adjust_display_pll_v3 +ffffffff81fd2130 t dac1_encoder_control_v1 +ffffffff81fd21b0 t dac2_encoder_control_v1 +ffffffff81fd2230 t dac1_output_control_v1 +ffffffff81fd2290 t dac2_output_control_v1 +ffffffff81fd22f0 t set_crtc_using_dtd_timing_v3 +ffffffff81fd2440 t set_crtc_timing_v1 +ffffffff81fd25c0 t enable_crtc_v1 +ffffffff81fd2660 t enable_crtc_mem_req_v1 +ffffffff81fd2700 t program_clock_v5 +ffffffff81fd2810 t program_clock_v6 +ffffffff81fd2930 t external_encoder_control_v3 +ffffffff81fd2ae0 t enable_disp_power_gating_v2_1 +ffffffff81fd2bb0 t set_dce_clock_v2_1 +ffffffff81fd3000 T dal_firmware_parser_init_cmd_tbl +ffffffff81fd33d0 t encoder_control_digx_v1_5 +ffffffff81fd35a0 t encoder_control_fallback +ffffffff81fd3600 t transmitter_control_v1_6 +ffffffff81fd37a0 t transmitter_control_v1_7 +ffffffff81fd3990 t transmitter_control_fallback +ffffffff81fd39f0 t set_pixel_clock_v7 +ffffffff81fd3c40 t set_pixel_clock_fallback +ffffffff81fd3ca0 t set_crtc_using_dtd_timing_v3 +ffffffff81fd3df0 t enable_crtc_v1 +ffffffff81fd3e90 t external_encoder_control_v3 +ffffffff81fd3ec0 t enable_disp_power_gating_v2_1 +ffffffff81fd4010 t enable_disp_power_gating_fallback +ffffffff81fd4070 t set_dce_clock_v2_1 +ffffffff81fd41a0 t get_smu_clock_info_v3_1 +ffffffff81fd4210 t enable_lvtma_control +ffffffff81fd5000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81fd50a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81fd51c0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81fd5240 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81fd52d0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81fd5390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81fd5470 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff81fd6000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff81fd60b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff81fd61c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81fd6240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81fd62d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81fd63b0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81fd7000 T dal_cmd_tbl_helper_dce110_get_table ffffffff81fd7030 t encoder_action_to_atom ffffffff81fd70b0 t engine_bp_to_atom ffffffff81fd7100 t clock_source_id_to_atom -ffffffff81fd71d0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81fd7220 t signal_type_to_atom_dig_mode -ffffffff81fd7280 t hpd_sel_to_atom -ffffffff81fd72c0 t dig_encoder_sel_to_atom -ffffffff81fd72f0 t phy_id_to_atom -ffffffff81fd7330 t disp_power_gating_action_to_atom -ffffffff81fd73a0 t dc_clock_type_to_atom -ffffffff81fd7420 t transmitter_color_depth_to_atom -ffffffff81fd8000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff81fd71a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81fd71f0 t signal_type_to_atom_dig_mode +ffffffff81fd7250 t hpd_sel_to_atom +ffffffff81fd7290 t dig_encoder_sel_to_atom +ffffffff81fd72c0 t phy_id_to_atom +ffffffff81fd7300 t disp_power_gating_action_to_atom +ffffffff81fd8000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff81fd8030 t encoder_action_to_atom ffffffff81fd80b0 t engine_bp_to_atom ffffffff81fd8100 t clock_source_id_to_atom @@ -31072,7 +31062,7 @@ ffffffff81fd82f0 t phy_id_to_atom ffffffff81fd8330 t disp_power_gating_action_to_atom ffffffff81fd83a0 t dc_clock_type_to_atom ffffffff81fd8420 t transmitter_color_depth_to_atom -ffffffff81fd9000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff81fd9000 T dal_cmd_tbl_helper_dce112_get_table ffffffff81fd9030 t encoder_action_to_atom ffffffff81fd90b0 t engine_bp_to_atom ffffffff81fd9100 t clock_source_id_to_atom @@ -31080,26392 +31070,26404 @@ ffffffff81fd91d0 t clock_source_id_to_atom_phy_clk_src ffffffff81fd9220 t signal_type_to_atom_dig_mode ffffffff81fd9280 t hpd_sel_to_atom ffffffff81fd92c0 t dig_encoder_sel_to_atom -ffffffff81fd9310 t phy_id_to_atom -ffffffff81fd9350 t disp_power_gating_action_to_atom -ffffffff81fda000 T clk_mgr_helper_get_active_display_cnt -ffffffff81fda0e0 T clk_mgr_helper_get_active_plane_cnt -ffffffff81fda190 T clk_mgr_exit_optimized_pwr_state -ffffffff81fda2a0 T clk_mgr_optimize_pwr_state -ffffffff81fda390 T dc_clk_mgr_create -ffffffff81fdaa50 T dc_destroy_clk_mgr -ffffffff81fdb000 T dentist_get_divider_from_did -ffffffff81fdb070 T dce_adjust_dp_ref_freq_for_ss -ffffffff81fdb170 T dce_get_dp_ref_freq_khz -ffffffff81fdb2a0 T dce12_get_dp_ref_freq_khz -ffffffff81fdb2c0 T dce_get_max_pixel_clock_for_all_paths -ffffffff81fdb4d0 T dce_get_required_clocks_state -ffffffff81fdb580 T dce_set_clock -ffffffff81fdb6e0 T dce_clock_read_ss_info -ffffffff81fdb800 T dce_clk_mgr_construct -ffffffff81fdb9f0 t dce_update_clocks -ffffffff81fdc000 T dce110_get_min_vblank_time_us -ffffffff81fdc090 T dce110_fill_display_configs -ffffffff81fdc300 T dce11_pplib_apply_display_requirements -ffffffff81fdc5f0 T dce110_clk_mgr_construct -ffffffff81fdc6a0 t dce11_update_clocks -ffffffff81fdd000 T dce112_set_clock -ffffffff81fdd180 T dce112_set_dispclk -ffffffff81fdd2a0 T dce112_set_dprefclk -ffffffff81fdd310 T dce112_clk_mgr_construct -ffffffff81fdd3c0 t dce112_update_clocks -ffffffff81fde000 T dce120_clk_mgr_construct -ffffffff81fde090 T dce121_clk_mgr_construct -ffffffff81fde1c0 t dce12_update_clocks -ffffffff81fdf000 T rv1_clk_mgr_construct -ffffffff81fdf0c0 t rv1_update_clocks -ffffffff81fdf5a0 t rv1_init_clocks -ffffffff81fdf630 t rv1_enable_pme_wa -ffffffff81fe0000 T rv1_vbios_smu_set_dispclk -ffffffff81fe00e0 t rv1_vbios_smu_send_msg_with_param -ffffffff81fe01f0 T rv1_vbios_smu_set_dprefclk -ffffffff81fe1000 T rv2_clk_mgr_construct -ffffffff81fe2000 T dentist_get_did_from_divider -ffffffff81fe2080 T dcn20_update_clocks_update_dpp_dto -ffffffff81fe2150 T dcn20_update_clocks_update_dentist -ffffffff81fe2640 T dcn2_update_clocks -ffffffff81fe2bc0 T dcn2_read_clocks_from_hw_dentist -ffffffff81fe2c90 T dcn2_update_clocks_fpga -ffffffff81fe2dc0 T dcn2_init_clocks -ffffffff81fe2e60 T dcn2_get_clock -ffffffff81fe2ed0 T dcn20_clk_mgr_construct -ffffffff81fe3000 t dcn2_enable_pme_wa -ffffffff81fe3050 t dcn2_are_clock_states_equal -ffffffff81fe30c0 t dcn2_notify_link_rate_change -ffffffff81fe4000 T dcn201_clk_mgr_construct -ffffffff81fe4120 t dcn201_update_clocks -ffffffff81fe4340 t dcn201_init_clocks -ffffffff81fe5000 T rn_clk_mgr_construct -ffffffff81fe58a0 t rn_update_clocks -ffffffff81fe5e60 t rn_set_low_power_state -ffffffff81fe6040 t rn_init_clocks -ffffffff81fe60e0 t rn_enable_pme_wa -ffffffff81fe60f0 t rn_are_clock_states_equal -ffffffff81fe6140 t rn_notify_wm_ranges -ffffffff81fe64d0 t rn_notify_link_rate_change -ffffffff81fe7000 T rn_vbios_smu_get_smu_version -ffffffff81fe7020 t rn_vbios_smu_send_msg_with_param -ffffffff81fe71b0 T rn_vbios_smu_set_dispclk -ffffffff81fe72d0 T rn_vbios_smu_set_dprefclk -ffffffff81fe7340 T rn_vbios_smu_set_hard_min_dcfclk -ffffffff81fe73c0 T rn_vbios_smu_set_min_deep_sleep_dcfclk -ffffffff81fe7440 T rn_vbios_smu_set_phyclk -ffffffff81fe7480 T rn_vbios_smu_set_dppclk -ffffffff81fe7530 T rn_vbios_smu_set_dcn_low_power_state -ffffffff81fe7550 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn -ffffffff81fe7570 T rn_vbios_smu_enable_pme_wa -ffffffff81fe7590 T rn_vbios_smu_is_periodic_retraining_disabled -ffffffff81fe8000 T dcn3_init_clocks -ffffffff81fe83b0 t dcn3_init_clocks_fpga -ffffffff81fe83c0 T dcn3_clk_mgr_construct -ffffffff81fe8510 T dcn3_clk_mgr_destroy -ffffffff81fe8570 t dcn3_update_clocks -ffffffff81fe8990 t dcn3_enable_pme_wa -ffffffff81fe89d0 t dcn3_are_clock_states_equal -ffffffff81fe8a30 t dcn3_notify_wm_ranges -ffffffff81fe8cc0 t dcn30_notify_link_rate_change -ffffffff81fe8de0 t dcn3_set_hard_min_memclk -ffffffff81fe8e80 t dcn3_set_hard_max_memclk -ffffffff81fe8ee0 t dcn3_set_max_memclk -ffffffff81fe8f20 t dcn3_set_min_memclk -ffffffff81fe8f60 t dcn3_get_memclk_states_from_smu -ffffffff81fe90a0 t dcn3_is_smu_present -ffffffff81fea000 T dcn30_smu_test_message -ffffffff81fea070 t dcn30_smu_send_msg_with_param -ffffffff81fea1d0 T dcn30_smu_get_smu_version -ffffffff81fea1f0 T dcn30_smu_check_driver_if_version -ffffffff81fea240 T dcn30_smu_check_msg_header_version -ffffffff81fea290 T dcn30_smu_set_dram_addr_high -ffffffff81fea2b0 T dcn30_smu_set_dram_addr_low -ffffffff81fea2d0 T dcn30_smu_transfer_wm_table_smu_2_dram -ffffffff81fea2f0 T dcn30_smu_transfer_wm_table_dram_2_smu -ffffffff81fea310 T dcn30_smu_set_hard_min_by_freq -ffffffff81fea360 T dcn30_smu_set_hard_max_by_freq -ffffffff81fea3b0 T dcn30_smu_get_dpm_freq_by_index -ffffffff81fea400 T dcn30_smu_get_dc_mode_max_dpm_freq -ffffffff81fea450 T dcn30_smu_set_min_deep_sleep_dcef_clk -ffffffff81fea470 T dcn30_smu_set_num_of_displays -ffffffff81fea490 T dcn30_smu_set_display_refresh_from_mall -ffffffff81fea4c0 T dcn30_smu_set_external_client_df_cstate_allow -ffffffff81fea4e0 T dcn30_smu_set_pme_workaround -ffffffff81feb000 T dcn301_smu_get_smu_version -ffffffff81feb070 t dcn301_smu_send_msg_with_param -ffffffff81feb1f0 T dcn301_smu_set_dispclk -ffffffff81feb290 T dcn301_smu_set_dprefclk -ffffffff81feb340 T dcn301_smu_set_hard_min_dcfclk -ffffffff81feb3e0 T dcn301_smu_set_min_deep_sleep_dcfclk -ffffffff81feb480 T dcn301_smu_set_dppclk -ffffffff81feb520 T dcn301_smu_set_display_idle_optimization -ffffffff81feb570 T dcn301_smu_enable_phy_refclk_pwrdwn -ffffffff81feb5c0 T dcn301_smu_enable_pme_wa -ffffffff81feb5e0 T dcn301_smu_set_dram_addr_high -ffffffff81feb630 T dcn301_smu_set_dram_addr_low -ffffffff81feb680 T dcn301_smu_transfer_dpm_table_smu_2_dram -ffffffff81feb6a0 T dcn301_smu_transfer_wm_table_dram_2_smu -ffffffff81fec000 T vg_clk_mgr_construct -ffffffff81fec840 T vg_clk_mgr_destroy -ffffffff81fec890 t vg_update_clocks -ffffffff81fecbd0 t vg_init_clocks -ffffffff81fecc70 t vg_enable_pme_wa -ffffffff81fecc80 t vg_are_clock_states_equal -ffffffff81feccd0 t vg_notify_wm_ranges -ffffffff81fee000 T dcn31_update_clocks -ffffffff81fee610 T dcn31_init_clocks -ffffffff81fee6c0 T dcn31_are_clock_states_equal -ffffffff81fee720 T dcn31_get_dtb_ref_freq_khz -ffffffff81fee750 T dcn31_clk_mgr_construct -ffffffff81feee20 T dcn31_clk_mgr_destroy -ffffffff81feee70 t dcn31_set_low_power_state -ffffffff81fef080 t dcn31_enable_pme_wa -ffffffff81fef090 t dcn31_notify_wm_ranges -ffffffff81fef410 t find_clk_for_voltage -ffffffff81ff0000 T dcn31_smu_get_smu_version -ffffffff81ff0020 t dcn31_smu_send_msg_with_param -ffffffff81ff0230 T dcn31_smu_set_dispclk -ffffffff81ff02a0 T dcn31_smu_set_dprefclk -ffffffff81ff0310 T dcn31_smu_set_hard_min_dcfclk -ffffffff81ff0390 T dcn31_smu_set_min_deep_sleep_dcfclk -ffffffff81ff0410 T dcn31_smu_set_dppclk -ffffffff81ff0480 T dcn31_smu_set_display_idle_optimization -ffffffff81ff04d0 T dcn31_smu_enable_phy_refclk_pwrdwn -ffffffff81ff0520 T dcn31_smu_enable_pme_wa -ffffffff81ff0560 T dcn31_smu_set_dram_addr_high -ffffffff81ff05a0 T dcn31_smu_set_dram_addr_low -ffffffff81ff05e0 T dcn31_smu_transfer_dpm_table_smu_2_dram -ffffffff81ff0620 T dcn31_smu_transfer_wm_table_dram_2_smu -ffffffff81ff0660 T dcn31_smu_set_zstate_support -ffffffff81ff06d0 T dcn31_smu_set_dtbclk -ffffffff81ff1000 T dcn314_update_clocks -ffffffff81ff15d0 t dcn314_disable_otg_wa -ffffffff81ff1760 T dcn314_are_clock_states_equal -ffffffff81ff17c0 T dcn314_clk_mgr_construct -ffffffff81ff24d0 T dcn314_clk_mgr_destroy -ffffffff81ff2520 t dcn314_enable_pme_wa -ffffffff81ff2530 t dcn314_notify_wm_ranges -ffffffff81ff3000 T dcn314_smu_get_smu_version -ffffffff81ff3020 t dcn314_smu_send_msg_with_param -ffffffff81ff3250 T dcn314_smu_set_dispclk -ffffffff81ff32c0 T dcn314_smu_set_dprefclk -ffffffff81ff3330 T dcn314_smu_set_hard_min_dcfclk -ffffffff81ff33b0 T dcn314_smu_set_min_deep_sleep_dcfclk -ffffffff81ff3430 T dcn314_smu_set_dppclk -ffffffff81ff34a0 T dcn314_smu_set_display_idle_optimization -ffffffff81ff34f0 T dcn314_smu_enable_phy_refclk_pwrdwn -ffffffff81ff3540 T dcn314_smu_enable_pme_wa -ffffffff81ff3580 T dcn314_smu_set_dram_addr_high -ffffffff81ff35c0 T dcn314_smu_set_dram_addr_low -ffffffff81ff3600 T dcn314_smu_transfer_dpm_table_smu_2_dram -ffffffff81ff3640 T dcn314_smu_transfer_wm_table_dram_2_smu -ffffffff81ff3680 T dcn314_smu_set_zstate_support -ffffffff81ff36d0 T dcn314_smu_set_dtbclk -ffffffff81ff4000 T dcn315_clk_mgr_construct -ffffffff81ff4810 T dcn315_clk_mgr_destroy -ffffffff81ff4860 t dcn315_update_clocks -ffffffff81ff4da0 t dcn315_enable_pme_wa -ffffffff81ff4db0 t dcn315_notify_wm_ranges -ffffffff81ff5130 t dcn315_disable_otg_wa -ffffffff81ff6000 T dcn315_smu_get_smu_version -ffffffff81ff6020 t dcn315_smu_send_msg_with_param -ffffffff81ff6310 T dcn315_smu_set_dispclk -ffffffff81ff6380 T dcn315_smu_set_hard_min_dcfclk -ffffffff81ff6400 T dcn315_smu_set_min_deep_sleep_dcfclk -ffffffff81ff6480 T dcn315_smu_set_dppclk -ffffffff81ff64f0 T dcn315_smu_set_display_idle_optimization -ffffffff81ff6540 T dcn315_smu_enable_phy_refclk_pwrdwn -ffffffff81ff6590 T dcn315_smu_enable_pme_wa -ffffffff81ff65d0 T dcn315_smu_set_dram_addr_high -ffffffff81ff6610 T dcn315_smu_set_dram_addr_low -ffffffff81ff6650 T dcn315_smu_transfer_dpm_table_smu_2_dram -ffffffff81ff6690 T dcn315_smu_transfer_wm_table_dram_2_smu -ffffffff81ff66d0 T dcn315_smu_get_dpref_clk -ffffffff81ff6730 T dcn315_smu_get_dtbclk -ffffffff81ff6790 T dcn315_smu_set_dtbclk -ffffffff81ff7000 T dcn316_clk_mgr_construct -ffffffff81ff7650 T dcn316_clk_mgr_destroy -ffffffff81ff76a0 t dcn316_update_clocks -ffffffff81ff7c90 t dcn316_enable_pme_wa -ffffffff81ff7ca0 t dcn316_notify_wm_ranges -ffffffff81ff8020 t find_clk_for_voltage -ffffffff81ff9000 T dcn316_smu_get_smu_version -ffffffff81ff9020 t dcn316_smu_send_msg_with_param -ffffffff81ff91b0 T dcn316_smu_set_dispclk -ffffffff81ff9220 T dcn316_smu_set_hard_min_dcfclk -ffffffff81ff92a0 T dcn316_smu_set_min_deep_sleep_dcfclk -ffffffff81ff9320 T dcn316_smu_set_dppclk -ffffffff81ff9390 T dcn316_smu_set_display_idle_optimization -ffffffff81ff93e0 T dcn316_smu_enable_phy_refclk_pwrdwn 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T dcn30_smu_set_dram_addr_high +ffffffff81feb2b0 T dcn30_smu_set_dram_addr_low +ffffffff81feb2d0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff81feb2f0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff81feb310 T dcn30_smu_set_hard_min_by_freq +ffffffff81feb360 T dcn30_smu_set_hard_max_by_freq +ffffffff81feb3b0 T dcn30_smu_get_dpm_freq_by_index +ffffffff81feb400 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff81feb450 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff81feb470 T dcn30_smu_set_num_of_displays +ffffffff81feb490 T dcn30_smu_set_display_refresh_from_mall +ffffffff81feb4c0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff81feb4e0 T dcn30_smu_set_pme_workaround +ffffffff81fec000 T dcn301_smu_get_smu_version +ffffffff81fec070 t dcn301_smu_send_msg_with_param +ffffffff81fec1f0 T dcn301_smu_set_dispclk +ffffffff81fec290 T dcn301_smu_set_dprefclk +ffffffff81fec340 T dcn301_smu_set_hard_min_dcfclk +ffffffff81fec3e0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff81fec480 T dcn301_smu_set_dppclk +ffffffff81fec520 T dcn301_smu_set_display_idle_optimization +ffffffff81fec570 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff81fec5c0 T dcn301_smu_enable_pme_wa +ffffffff81fec5e0 T dcn301_smu_set_dram_addr_high +ffffffff81fec630 T dcn301_smu_set_dram_addr_low +ffffffff81fec680 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff81fec6a0 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff81fed000 T vg_clk_mgr_construct +ffffffff81fed840 T vg_clk_mgr_destroy +ffffffff81fed890 t vg_update_clocks +ffffffff81fedbd0 t vg_init_clocks +ffffffff81fedc70 t vg_enable_pme_wa +ffffffff81fedc80 t vg_are_clock_states_equal +ffffffff81fedcd0 t vg_notify_wm_ranges +ffffffff81fef000 T dcn31_update_clocks +ffffffff81fef610 T dcn31_init_clocks +ffffffff81fef6c0 T dcn31_are_clock_states_equal +ffffffff81fef720 T dcn31_get_dtb_ref_freq_khz +ffffffff81fef750 T dcn31_clk_mgr_construct +ffffffff81fefe20 T dcn31_clk_mgr_destroy +ffffffff81fefe70 t dcn31_set_low_power_state +ffffffff81ff0080 t dcn31_enable_pme_wa +ffffffff81ff0090 t dcn31_notify_wm_ranges +ffffffff81ff0410 t find_clk_for_voltage +ffffffff81ff1000 T dcn31_smu_get_smu_version +ffffffff81ff1020 t dcn31_smu_send_msg_with_param +ffffffff81ff1230 T dcn31_smu_set_dispclk +ffffffff81ff12a0 T dcn31_smu_set_dprefclk +ffffffff81ff1310 T dcn31_smu_set_hard_min_dcfclk +ffffffff81ff1390 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff81ff1410 T dcn31_smu_set_dppclk +ffffffff81ff1480 T dcn31_smu_set_display_idle_optimization +ffffffff81ff14d0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff81ff1520 T dcn31_smu_enable_pme_wa +ffffffff81ff1560 T dcn31_smu_set_dram_addr_high +ffffffff81ff15a0 T dcn31_smu_set_dram_addr_low +ffffffff81ff15e0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff81ff1620 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff81ff1660 T dcn31_smu_set_zstate_support +ffffffff81ff16d0 T dcn31_smu_set_dtbclk +ffffffff81ff2000 T dcn314_update_clocks +ffffffff81ff25d0 t dcn314_disable_otg_wa +ffffffff81ff2760 T dcn314_are_clock_states_equal +ffffffff81ff27c0 T dcn314_clk_mgr_construct +ffffffff81ff34d0 T dcn314_clk_mgr_destroy +ffffffff81ff3520 t dcn314_enable_pme_wa +ffffffff81ff3530 t dcn314_notify_wm_ranges +ffffffff81ff4000 T dcn314_smu_get_smu_version +ffffffff81ff4020 t dcn314_smu_send_msg_with_param +ffffffff81ff4250 T dcn314_smu_set_dispclk +ffffffff81ff42c0 T dcn314_smu_set_dprefclk +ffffffff81ff4330 T dcn314_smu_set_hard_min_dcfclk +ffffffff81ff43b0 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81ff4430 T dcn314_smu_set_dppclk +ffffffff81ff44a0 T dcn314_smu_set_display_idle_optimization +ffffffff81ff44f0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81ff4540 T dcn314_smu_enable_pme_wa +ffffffff81ff4580 T dcn314_smu_set_dram_addr_high +ffffffff81ff45c0 T dcn314_smu_set_dram_addr_low +ffffffff81ff4600 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81ff4640 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81ff4680 T dcn314_smu_set_zstate_support +ffffffff81ff46d0 T dcn314_smu_set_dtbclk +ffffffff81ff5000 T dcn315_clk_mgr_construct +ffffffff81ff5810 T dcn315_clk_mgr_destroy +ffffffff81ff5860 t dcn315_update_clocks +ffffffff81ff5da0 t dcn315_enable_pme_wa +ffffffff81ff5db0 t dcn315_notify_wm_ranges +ffffffff81ff6130 t dcn315_disable_otg_wa +ffffffff81ff7000 T dcn315_smu_get_smu_version +ffffffff81ff7020 t dcn315_smu_send_msg_with_param +ffffffff81ff7310 T dcn315_smu_set_dispclk +ffffffff81ff7380 T dcn315_smu_set_hard_min_dcfclk +ffffffff81ff7400 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81ff7480 T dcn315_smu_set_dppclk +ffffffff81ff74f0 T dcn315_smu_set_display_idle_optimization +ffffffff81ff7540 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81ff7590 T dcn315_smu_enable_pme_wa +ffffffff81ff75d0 T dcn315_smu_set_dram_addr_high +ffffffff81ff7610 T dcn315_smu_set_dram_addr_low +ffffffff81ff7650 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81ff7690 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81ff76d0 T dcn315_smu_get_dpref_clk +ffffffff81ff7730 T dcn315_smu_get_dtbclk +ffffffff81ff7790 T dcn315_smu_set_dtbclk +ffffffff81ff8000 T dcn316_clk_mgr_construct +ffffffff81ff8650 T dcn316_clk_mgr_destroy +ffffffff81ff86a0 t dcn316_update_clocks +ffffffff81ff8c90 t dcn316_enable_pme_wa +ffffffff81ff8ca0 t dcn316_notify_wm_ranges +ffffffff81ff9020 t find_clk_for_voltage +ffffffff81ffa000 T dcn316_smu_get_smu_version +ffffffff81ffa020 t dcn316_smu_send_msg_with_param +ffffffff81ffa1b0 T dcn316_smu_set_dispclk +ffffffff81ffa220 T dcn316_smu_set_hard_min_dcfclk +ffffffff81ffa2a0 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff81ffa320 T dcn316_smu_set_dppclk +ffffffff81ffa390 T dcn316_smu_set_display_idle_optimization +ffffffff81ffa3e0 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff81ffa430 T dcn316_smu_set_dram_addr_high +ffffffff81ffa470 T dcn316_smu_set_dram_addr_low +ffffffff81ffa4b0 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff81ffa4f0 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff81ffa530 T dcn316_smu_enable_pme_wa +ffffffff81ffa570 T dcn316_smu_set_dtbclk +ffffffff81ffa5b0 T dcn316_smu_get_dpref_clk +ffffffff81ffa610 T dcn316_smu_get_smu_fclk +ffffffff81ffb000 T dcn32_init_clocks +ffffffff81ffb560 T dcn32_update_clocks_update_dpp_dto +ffffffff81ffb6a0 T dcn32_clk_mgr_construct +ffffffff81ffb940 t dcn32_dump_clk_registers +ffffffff81ffbb60 T dcn32_clk_mgr_destroy +ffffffff81ffbbc0 t dcn32_update_clocks +ffffffff81ffc420 t dcn32_enable_pme_wa +ffffffff81ffc460 t dcn32_are_clock_states_equal +ffffffff81ffc4d0 t dcn32_notify_wm_ranges +ffffffff81ffc650 t dcn32_set_hard_min_memclk +ffffffff81ffc6e0 t dcn32_set_hard_max_memclk +ffffffff81ffc730 t dcn32_set_max_memclk +ffffffff81ffc770 t dcn32_set_min_memclk +ffffffff81ffc7b0 t dcn32_get_memclk_states_from_smu +ffffffff81ffca00 t dcn32_is_smu_present +ffffffff81ffca30 t dcn32_get_dispclk_from_dentist +ffffffff81ffcac0 t dcn32_update_clocks_update_dentist +ffffffff81ffd000 T dcn32_smu_send_fclk_pstate_message +ffffffff81ffd020 t dcn32_smu_send_msg_with_param +ffffffff81ffd160 T dcn32_smu_send_cab_for_uclk_message +ffffffff81ffd190 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff81ffd1b0 T dcn32_smu_set_pme_workaround +ffffffff81ffd1d0 T dcn32_smu_set_hard_min_by_freq +ffffffff81ffd220 T dcn32_smu_wait_for_dmub_ack_mclk +ffffffff81ffe000 T dc_stream_adjust_vmin_vmax +ffffffff81ffe170 T dc_stream_get_last_used_drr_vtotal +ffffffff81ffe2d0 T dc_stream_get_crtc_position +ffffffff81ffe500 T dc_stream_configure_crc +ffffffff81ffe670 T dc_stream_get_crc +ffffffff81ffe750 T dc_stream_set_dyn_expansion +ffffffff81ffe9c0 T dc_stream_set_dither_option +ffffffff81ffeb60 T dc_stream_set_gamut_remap +ffffffff81ffece0 T dc_stream_program_csc_matrix +ffffffff81ffef00 T dc_stream_set_static_screen_params +ffffffff81fff080 T dc_create +ffffffff81fff600 t dc_construct_ctx +ffffffff81fff770 t dc_destruct +ffffffff81fffa40 T dc_hardware_init +ffffffff81fffb10 T dc_init_callbacks +ffffffff81fffb60 T dc_deinit_callbacks +ffffffff81fffbb0 T dc_destroy +ffffffff81fffc00 T dc_validate_boot_timing +ffffffff81ffffa0 T dc_enable_stereo +ffffffff820000a0 T dc_trigger_sync +ffffffff820006d0 T dc_z10_restore +ffffffff82000710 T dc_z10_save_init +ffffffff82000750 T dc_commit_streams +ffffffff82000c30 t commit_minimal_transition_state +ffffffff82001060 T dc_create_state +ffffffff820010f0 t dc_commit_state_no_check +ffffffff82002770 T dc_release_state +ffffffff820027d0 T dc_acquire_release_mpc_3dlut +ffffffff820028a0 T dc_post_update_surfaces_to_stream +ffffffff82002cb0 T dc_copy_state +ffffffff82002e80 T dc_retain_state +ffffffff82002eb0 T dc_set_generic_gpio_for_stereo +ffffffff82002fc0 T dc_check_update_surfaces_for_stream +ffffffff820039a0 T dc_dmub_update_dirty_rect +ffffffff82003bb0 T dc_update_planes_and_stream +ffffffff82004730 t fast_update_only +ffffffff82004a90 t commit_planes_for_stream_fast +ffffffff82004eb0 t commit_planes_for_stream +ffffffff82006430 T dc_commit_updates_for_stream +ffffffff82006a50 t copy_surface_update_to_plane +ffffffff82006e60 t copy_stream_update_to_stream +ffffffff82007500 T dc_get_current_stream_count +ffffffff82007540 T dc_get_stream_at_index +ffffffff82007590 T dc_interrupt_to_irq_source +ffffffff820075b0 T dc_interrupt_set +ffffffff82007600 T dc_interrupt_ack +ffffffff82007620 T dc_power_down_on_boot +ffffffff82007670 T dc_set_power_state +ffffffff82007850 T dc_resume +ffffffff820078d0 T dc_is_dmcu_initialized +ffffffff82007920 T get_clock_requirements_for_state +ffffffff820079a0 T dc_set_clock +ffffffff820079e0 T dc_get_clock +ffffffff82007a20 T dc_set_psr_allow_active +ffffffff82007b20 T dc_allow_idle_optimizations +ffffffff82007bc0 T dc_unlock_memory_clock_frequency +ffffffff82007c30 T dc_lock_memory_clock_frequency +ffffffff82007cc0 T dc_enable_dcmode_clk_limit +ffffffff82007e80 t blank_and_force_memclk +ffffffff82008060 T dc_is_plane_eligible_for_idle_optimizations +ffffffff820080b0 T dc_hardware_release +ffffffff82008100 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff82008140 T dc_is_dmub_outbox_supported +ffffffff820081b0 T dc_enable_dmub_notifications +ffffffff82008220 T dc_enable_dmub_outbox +ffffffff82008260 T dc_process_dmub_aux_transfer_async +ffffffff820083e0 T get_link_index_from_dpia_port_index +ffffffff82008490 T dc_process_dmub_set_config_async +ffffffff82008570 T dc_process_dmub_set_mst_slots +ffffffff82008660 T dc_process_dmub_dpia_hpd_int_enable +ffffffff82008720 T dc_print_dmub_diagnostic_data +ffffffff82008740 T dc_disable_accelerated_mode +ffffffff82008760 T dc_notify_vsync_int_state +ffffffff82008980 T dc_abm_save_restore +ffffffff82008b50 T dc_query_current_properties +ffffffff82008bc0 T dc_set_edp_power +ffffffff82008c30 t create_links +ffffffff82009090 t create_link_encoders +ffffffff82009170 t dc_update_viusal_confirm_color +ffffffff8200a000 T pre_surface_trace +ffffffff8200a030 T update_surface_trace +ffffffff8200a060 T post_surface_trace +ffffffff8200a090 T context_timing_trace +ffffffff8200a240 T context_clock_trace +ffffffff8200a270 T dc_status_to_str +ffffffff8200b000 T find_color_matrix +ffffffff8200b0b0 T color_space_to_black_color +ffffffff8200b120 T hwss_wait_for_blank_complete +ffffffff8200b1c0 T get_mpctree_visual_confirm_color +ffffffff8200b220 T get_surface_visual_confirm_color +ffffffff8200b2d0 T get_hdr_visual_confirm_color +ffffffff8200b390 T get_subvp_visual_confirm_color +ffffffff8200b490 T hwss_build_fast_sequence +ffffffff8200bb50 T hwss_execute_sequence +ffffffff8200bf40 T hwss_setup_dpp +ffffffff8200bfe0 T hwss_program_bias_and_scale +ffffffff8200c060 T hwss_program_manual_trigger +ffffffff8200c0b0 T hwss_power_on_mpc_mem_pwr +ffffffff8200c100 T hwss_set_output_csc +ffffffff8200c150 T hwss_set_ocsc_default +ffffffff8200c1a0 T hwss_send_dmcub_cmd +ffffffff8200c1c0 T get_mclk_switch_visual_confirm_color +ffffffff8200c320 T get_surface_tile_visual_confirm_color +ffffffff8200d000 T link_enc_cfg_init +ffffffff8200d1b0 T link_enc_cfg_copy +ffffffff8200d1e0 T link_enc_cfg_link_encs_assign +ffffffff8200e5a0 T link_enc_cfg_validate +ffffffff8200ed40 T link_enc_cfg_link_enc_unassign +ffffffff8200eed0 T link_enc_cfg_is_transmitter_mappable +ffffffff8200eff0 T link_enc_cfg_get_stream_using_link_enc +ffffffff8200f0f0 T link_enc_cfg_get_link_using_link_enc +ffffffff8200f200 T link_enc_cfg_get_link_enc_used_by_link +ffffffff8200f380 T link_enc_cfg_get_next_avail_link_enc +ffffffff8200f4f0 T link_enc_cfg_get_link_enc_used_by_stream +ffffffff8200f510 T link_enc_cfg_get_link_enc +ffffffff8200f5a0 T link_enc_cfg_get_link_enc_used_by_stream_current +ffffffff8200f720 T link_enc_cfg_is_link_enc_avail +ffffffff8200f920 T link_enc_cfg_set_transient_mode +ffffffff82010000 T dc_get_link_at_index +ffffffff82010030 T dc_get_edp_links +ffffffff820100b0 T dc_get_edp_link_panel_inst +ffffffff82010170 T dc_link_detect +ffffffff820101a0 T dc_link_detect_connection_type +ffffffff820101d0 T dc_link_get_status +ffffffff82010200 T dc_link_is_hdcp14 +ffffffff82010230 T dc_link_is_hdcp22 +ffffffff82010260 T dc_link_clear_dprx_states +ffffffff82010290 T dc_link_reset_cur_dp_mst_topology +ffffffff820102c0 T dc_link_bandwidth_kbps +ffffffff820102f0 T dc_get_cur_link_res_map +ffffffff82010310 T dc_restore_link_res_map +ffffffff82010330 T dc_link_update_dsc_config +ffffffff82010360 T dc_is_oem_i2c_device_present +ffffffff820103b0 T dc_submit_i2c +ffffffff820103e0 T dc_submit_i2c_oem +ffffffff82010430 T dc_link_dp_handle_automated_test +ffffffff82010460 T dc_link_dp_set_test_pattern +ffffffff82010490 T dc_link_set_drive_settings +ffffffff82010520 T dc_link_set_preferred_link_settings +ffffffff82010540 T dc_link_set_preferred_training_settings +ffffffff82010570 T dc_dp_trace_is_initialized +ffffffff820105a0 T dc_dp_trace_set_is_logged_flag +ffffffff820105d0 T dc_dp_trace_is_logged +ffffffff82010600 T dc_dp_trace_get_lt_end_timestamp +ffffffff82010630 T dc_dp_trace_get_lt_counts +ffffffff82010660 T dc_dp_trace_get_link_loss_count +ffffffff82010690 T dc_link_add_remote_sink +ffffffff820106c0 T dc_link_remove_remote_sink +ffffffff820106f0 T dc_link_aux_transfer_raw +ffffffff82010720 T dc_link_bw_kbps_from_raw_frl_link_rate_data +ffffffff82010740 T dc_link_decide_edp_link_settings +ffffffff82010770 T dc_link_dp_get_max_link_enc_cap +ffffffff820107a0 T dc_link_dp_mst_decide_link_encoding_format +ffffffff820107d0 T dc_link_get_link_cap +ffffffff82010800 T dc_link_get_highest_encoding_format +ffffffff820108c0 T dc_link_is_dp_sink_present +ffffffff820108f0 T dc_link_is_fec_supported +ffffffff82010920 T dc_link_overwrite_extended_receiver_cap +ffffffff82010950 T dc_link_should_enable_fec +ffffffff82010980 T dc_link_dp_dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff820109b0 T dc_link_handle_usb4_bw_alloc_response +ffffffff820109e0 T dc_link_check_link_loss_status +ffffffff82010a10 T dc_link_dp_allow_hpd_rx_irq +ffffffff82010a40 T dc_link_dp_handle_link_loss +ffffffff82010a70 T dc_link_dp_read_hpd_rx_irq_data +ffffffff82010aa0 T dc_link_handle_hpd_rx_irq +ffffffff82010ad0 T dc_link_dp_receiver_power_ctrl +ffffffff82010b00 T dc_link_decide_lttpr_mode +ffffffff82010b30 T dc_link_edp_panel_backlight_power_on +ffffffff82010b60 T dc_link_get_backlight_level +ffffffff82010b90 T dc_link_get_backlight_level_nits +ffffffff82010bc0 T dc_link_set_backlight_level +ffffffff82010bf0 T dc_link_set_backlight_level_nits +ffffffff82010c20 T dc_link_get_target_backlight_pwm +ffffffff82010c50 T dc_link_get_psr_state +ffffffff82010c80 T dc_link_set_psr_allow_active +ffffffff82010cb0 T dc_link_setup_psr +ffffffff82010ce0 T dc_link_get_replay_state +ffffffff82010d10 T dc_link_wait_for_t12 +ffffffff82010d40 T dc_link_get_hpd_state +ffffffff82010d70 T dc_link_enable_hpd +ffffffff82010da0 T dc_link_disable_hpd +ffffffff82010dd0 T dc_link_enable_hpd_filter +ffffffff82010e00 T dc_link_validate +ffffffff82011000 T resource_parse_asic_id +ffffffff82011250 T dc_create_resource_pool +ffffffff82011550 T dc_destroy_resource_pool +ffffffff820115c0 T resource_construct +ffffffff82011aa0 T resource_unreference_clock_source +ffffffff82011b20 T resource_reference_clock_source +ffffffff82011ba0 T resource_get_clock_source_reference +ffffffff82011c20 T resource_are_vblanks_synchronizable +ffffffff82011e40 T resource_are_streams_timing_synchronizable +ffffffff82011f30 T resource_find_used_clk_src_for_sharing +ffffffff82012060 T resource_get_num_mpc_splits +ffffffff820120f0 T resource_get_num_odm_splits +ffffffff820121b0 T resource_get_otg_master +ffffffff82012250 T resource_build_scaling_params +ffffffff82012fe0 t calculate_odm_slice_in_timing_active +ffffffff82013160 T resource_build_scaling_params_for_context +ffffffff820132b0 T resource_find_free_secondary_pipe_legacy +ffffffff82013350 T resource_find_free_pipe_used_in_cur_mpc_blending_tree +ffffffff820133c0 T resource_is_pipe_type +ffffffff82013440 T recource_find_free_pipe_not_used_in_cur_res_ctx +ffffffff820134c0 T resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine +ffffffff820135e0 T resource_is_for_mpcc_combine +ffffffff82013670 T resource_find_any_free_pipe +ffffffff820136e0 T resource_get_otg_master_for_stream +ffffffff82013810 T resource_get_opp_head +ffffffff820138a0 T dc_add_plane_to_context +ffffffff82013b60 T dc_remove_plane_from_context +ffffffff82013d40 T dc_rem_all_planes_for_stream +ffffffff82013f00 T dc_add_all_planes_for_stream +ffffffff82014080 T dc_is_timing_changed +ffffffff820140e0 T dc_is_stream_unchanged +ffffffff820141c0 T dc_is_stream_scaling_unchanged +ffffffff82014260 T update_audio_usage +ffffffff820142d0 T dc_add_stream_to_ctx +ffffffff820143a0 T dc_remove_stream_from_ctx +ffffffff820147b0 T resource_map_pool_resources +ffffffff82015210 t acquire_first_split_pipe +ffffffff82015380 t add_hpo_dp_link_enc_to_ctx +ffffffff82015450 t find_first_free_audio +ffffffff82015500 T dc_resource_state_copy_construct_current +ffffffff82015520 T dc_resource_state_copy_construct +ffffffff820156c0 T dc_resource_state_construct +ffffffff820156e0 T dc_resource_is_dsc_encoding_supported +ffffffff82015730 T dc_validate_with_context +ffffffff82016360 t planes_changed_for_existing_stream +ffffffff820164e0 T dc_validate_global_state +ffffffff82016860 T dc_resource_state_destruct +ffffffff82016940 T dc_resource_find_first_free_pll +ffffffff820169b0 T resource_build_info_frame +ffffffff820170e0 T resource_map_clock_resources +ffffffff82017270 T pipe_need_reprogram +ffffffff820173e0 T resource_build_bit_depth_reduction_params +ffffffff82017610 T dc_validate_stream +ffffffff820177e0 T dc_validate_plane +ffffffff82017870 T resource_pixel_format_to_bpp +ffffffff820178f0 T get_audio_check +ffffffff82017a10 T get_temp_dp_link_res +ffffffff82017b20 T reset_syncd_pipes_from_disabled_pipes +ffffffff82017c70 T check_syncd_pipes_for_disabled_master_pipe +ffffffff82017db0 T reset_sync_context_for_pipe +ffffffff82017e60 T resource_transmitter_to_phy_idx +ffffffff82017ec0 T get_link_hwss +ffffffff82017f50 T is_h_timing_divisible_by_2 +ffffffff82017fb0 T dc_resource_acquire_secondary_pipe_for_mpc_odm +ffffffff820181c0 T update_dp_encoder_resources_for_test_harness +ffffffff82018480 t calculate_plane_rec_in_timing_active +ffffffff82018750 t calculate_init_and_vp +ffffffff82019000 T dc_sink_retain +ffffffff82019030 T dc_sink_release +ffffffff820190a0 T dc_sink_create +ffffffff8201a000 T dc_stat_get_dmub_notification +ffffffff8201a0b0 T dc_stat_get_dmub_dataout +ffffffff8201b000 T update_stream_signal +ffffffff8201b080 T dc_stream_retain +ffffffff8201b0b0 T dc_stream_release +ffffffff8201b130 T dc_create_stream_for_sink +ffffffff8201b470 T dc_copy_stream +ffffffff8201b540 T dc_stream_get_status_from_state +ffffffff8201b5a0 T dc_stream_get_status +ffffffff8201b610 T dc_optimize_timing_for_fsft +ffffffff8201b660 T dc_stream_set_cursor_attributes +ffffffff8201b860 t program_cursor_attributes +ffffffff8201b9c0 T dc_stream_set_cursor_position +ffffffff8201bae0 t program_cursor_position +ffffffff8201bc20 T dc_stream_add_writeback +ffffffff8201be30 T dc_stream_remove_writeback +ffffffff8201bf60 T dc_stream_warmup_writeback +ffffffff8201bfa0 T dc_stream_get_vblank_counter +ffffffff8201c070 T dc_stream_send_dp_sdp +ffffffff8201c300 T dc_stream_get_scanoutpos +ffffffff8201c3e0 T dc_stream_dmdata_status_done +ffffffff8201c4a0 T dc_stream_set_dynamic_metadata +ffffffff8201c600 T dc_stream_add_dsc_to_resource +ffffffff8201c650 T dc_stream_get_pipe_ctx +ffffffff8201c700 T dc_stream_log +ffffffff8201d000 T enable_surface_flip_reporting +ffffffff8201d030 T dc_create_plane_state +ffffffff8201d1d0 T dc_plane_get_status +ffffffff8201d350 T dc_plane_state_retain +ffffffff8201d380 T dc_plane_state_release +ffffffff8201d4d0 T dc_gamma_retain +ffffffff8201d500 T dc_gamma_release +ffffffff8201d560 T dc_create_gamma +ffffffff8201d5b0 T dc_transfer_func_retain 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T dc_dmub_srv_get_dmub_outbox0_msg +ffffffff8201fb10 T dc_dmub_trace_event_control +ffffffff8201fb30 T dc_dmub_srv_drr_update_cmd +ffffffff8201fbc0 T dc_dmub_srv_set_drr_manual_trigger_cmd +ffffffff8201fc50 T dc_dmub_srv_p_state_delegate +ffffffff82020000 T dc_dmub_srv_query_caps_cmd +ffffffff820200c0 T dc_dmub_srv_get_visual_confirm_color_cmd +ffffffff820201a0 T dc_dmub_setup_subvp_dmub_command +ffffffff82020bb0 T dc_dmub_srv_get_diagnostic_data +ffffffff82020bf0 T dc_send_update_cursor_info_to_dmu +ffffffff82020f60 T dc_dmub_check_min_version +ffffffff82020fa0 T dc_dmub_srv_enable_dpia_trace +ffffffff82022000 T dc_edid_parser_send_cea +ffffffff820220b0 T dc_edid_parser_recv_cea_ack +ffffffff82022140 T dc_edid_parser_recv_amd_vsdb +ffffffff82023000 T generic_reg_update_ex +ffffffff82023330 t set_reg_field_values +ffffffff820234e0 T generic_reg_set_ex +ffffffff820236d0 T generic_reg_get +ffffffff82023740 T generic_reg_get2 +ffffffff820237d0 T generic_reg_get3 +ffffffff82023870 T generic_reg_get4 +ffffffff82023920 T generic_reg_get5 +ffffffff820239e0 T generic_reg_get6 +ffffffff82023ac0 T generic_reg_get7 +ffffffff82023bb0 T generic_reg_get8 +ffffffff82023cc0 T generic_reg_wait +ffffffff82023f10 T generic_write_indirect_reg +ffffffff82023f60 T generic_read_indirect_reg +ffffffff82024000 T generic_indirect_reg_get +ffffffff820241b0 T generic_indirect_reg_update_ex +ffffffff820243c0 T generic_indirect_reg_update_ex_sync +ffffffff820245b0 T generic_indirect_reg_get_sync +ffffffff820246e0 T reg_sequence_start_gather +ffffffff82024770 T reg_sequence_start_execute +ffffffff82024910 T reg_sequence_wait_done +ffffffff82024970 T dce_version_to_string +ffffffff82025000 T dce_abm_create +ffffffff820250b0 T dce_abm_destroy +ffffffff82025100 t dce_abm_init +ffffffff82025380 t dce_abm_set_level +ffffffff82025480 t dce_abm_immediate_disable +ffffffff820254d0 t dce_abm_set_pipe +ffffffff82025620 t dce_abm_set_backlight_level_pwm +ffffffff82025810 t dce_abm_get_current_backlight +ffffffff82025840 t dce_abm_get_target_backlight +ffffffff82026000 T dce_aud_az_enable +ffffffff82026150 T dce_aud_az_disable +ffffffff82026340 T dce_aud_az_configure +ffffffff82026fc0 t check_audio_bandwidth +ffffffff82027150 T dce_aud_wall_dto_setup +ffffffff820272d0 T dce_aud_hw_init +ffffffff820274a0 T dce_aud_destroy +ffffffff820274f0 T dce_audio_create +ffffffff820275b0 t dce_aud_endpoint_valid +ffffffff82028000 T dce110_engine_destroy +ffffffff82028050 T dce110_aux_engine_construct +ffffffff820280d0 t dce_aux_configure_timeout +ffffffff820282b0 T dce_aux_transfer_raw +ffffffff82028ae0 t acquire +ffffffff82028d50 T dce_aux_transfer_dmub_raw +ffffffff82028e50 T dce_aux_transfer_with_retries +ffffffff8202a000 T look_up_in_video_optimized_rate_tlb +ffffffff8202a070 T dce110_clk_src_construct +ffffffff8202a270 t calc_pll_max_vco_construct +ffffffff8202a410 T dce112_clk_src_construct +ffffffff8202a4a0 T dcn20_clk_src_construct +ffffffff8202a550 T dcn3_clk_src_construct +ffffffff8202a600 T dcn31_clk_src_construct +ffffffff8202a6b0 T dcn301_clk_src_construct +ffffffff8202a760 t dce110_clock_source_power_down +ffffffff8202a7f0 t dce110_program_pix_clk +ffffffff8202ae80 t dce110_get_pix_clk_dividers +ffffffff8202b500 t get_pixel_clk_frequency_100hz +ffffffff8202b610 t get_ss_info_from_atombios +ffffffff8202b8e0 t dce112_program_pix_clk +ffffffff8202baf0 t dce112_get_pix_clk_dividers +ffffffff8202bc00 t dcn20_program_pix_clk +ffffffff8202bc90 t dcn20_override_dp_pix_clk +ffffffff8202bd80 t dcn3_program_pix_clk +ffffffff8202bf30 t dcn3_get_pix_clk_dividers +ffffffff8202c000 t dcn31_program_pix_clk +ffffffff8202d000 T dce_dmcu_create +ffffffff8202d0c0 T dcn10_dmcu_create +ffffffff8202d180 T dcn20_dmcu_create +ffffffff8202d240 T dcn21_dmcu_create +ffffffff8202d330 T dce_dmcu_destroy +ffffffff8202d380 t dce_dmcu_init +ffffffff8202d3b0 t dce_dmcu_load_iram +ffffffff8202d510 t dce_dmcu_set_psr_enable +ffffffff8202d640 t dce_dmcu_setup_psr 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+ffffffff820305b0 T dce_use_lut +ffffffff82031000 T dce_i2c_oem_device_present +ffffffff82031080 T dce_i2c_submit_command +ffffffff82032000 T acquire_i2c_hw_engine +ffffffff820323a0 T dce_i2c_submit_command_hw +ffffffff82032ce0 t set_speed +ffffffff82032e30 T dce_i2c_hw_construct +ffffffff82032ea0 T dce100_i2c_hw_construct +ffffffff82032f10 T dce112_i2c_hw_construct +ffffffff82032f80 T dcn1_i2c_hw_construct +ffffffff82032ff0 T dcn2_i2c_hw_construct +ffffffff82033080 t is_hw_busy +ffffffff82034000 T dce_i2c_sw_construct +ffffffff82034030 T dce_i2c_engine_acquire_sw +ffffffff820340d0 T dce_i2c_submit_command_sw +ffffffff820348a0 t write_byte_sw +ffffffff82035000 T dce_ipp_construct +ffffffff82035050 T dce_ipp_destroy +ffffffff820350a0 t dce_ipp_cursor_set_position +ffffffff820351d0 t dce_ipp_cursor_set_attributes +ffffffff82035460 t dce_ipp_program_prescale +ffffffff82035620 t dce_ipp_program_input_lut +ffffffff82035a90 t dce_ipp_set_degamma +ffffffff82036000 T dce110_get_dig_frontend +ffffffff820360c0 T dce110_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff82036160 T dce110_psr_program_dp_dphy_fast_training +ffffffff820361d0 T dce110_psr_program_secondary_packet +ffffffff82036240 T dce110_is_dig_enabled +ffffffff820362a0 T dce110_link_encoder_validate_dvi_output +ffffffff82036350 T dce110_link_encoder_validate_dp_output +ffffffff82036380 T dce110_link_encoder_construct +ffffffff82036550 T dce110_link_encoder_validate_output_with_stream +ffffffff82036700 T dce110_link_encoder_hw_init +ffffffff82036920 T dce110_link_encoder_destroy +ffffffff82036970 T dce110_link_encoder_setup +ffffffff82036aa0 T dce110_link_encoder_enable_tmds_output +ffffffff82036b90 T dce110_link_encoder_enable_lvds_output +ffffffff82036c80 T dce110_link_encoder_enable_dp_output +ffffffff82036de0 T dce110_link_encoder_enable_dp_mst_output +ffffffff82036f40 T dce110_link_encoder_disable_output +ffffffff82037150 T dce110_link_encoder_dp_set_lane_settings +ffffffff820372f0 T dce110_link_encoder_dp_set_phy_pattern +ffffffff82037af0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff82037d10 T dce110_link_encoder_update_mst_stream_allocation_table +ffffffff82037f80 T dce110_link_encoder_connect_dig_be_to_fe +ffffffff820380b0 T dce110_link_encoder_enable_hpd +ffffffff820380e0 T dce110_link_encoder_disable_hpd +ffffffff82038110 T dce110_link_encoder_get_max_link_cap +ffffffff82039000 T dce_mem_input_construct +ffffffff82039060 T dce112_mem_input_construct +ffffffff820390c0 T dce120_mem_input_construct +ffffffff82039120 t dce_mi_program_display_marks +ffffffff820393f0 t dce_mi_allocate_dmif +ffffffff82039630 t dce_mi_free_dmif +ffffffff82039790 t dce_mi_program_surface_flip_and_addr +ffffffff82039ab0 t dce_mi_program_pte_vm +ffffffff82039c70 t dce_mi_program_surface_config +ffffffff8203a4f0 t dce_mi_is_flip_pending +ffffffff8203a580 t program_nbp_watermark +ffffffff8203a780 t dce112_mi_program_display_marks +ffffffff8203ac90 t dce120_mi_program_display_marks +ffffffff8203b150 t dce120_program_stutter_watermark +ffffffff8203c000 T dce110_opp_set_clamping +ffffffff8203c2b0 T dce110_opp_program_bit_depth_reduction +ffffffff8203ca80 T dce110_opp_program_clamping_and_pixel_encoding +ffffffff8203cc20 T dce110_opp_set_dyn_expansion +ffffffff8203cd70 T dce110_opp_program_fmt +ffffffff8203cef0 T dce110_opp_construct +ffffffff8203cf50 T dce110_opp_destroy +ffffffff8203d000 T dce_panel_cntl_construct +ffffffff8203d060 t dce_panel_cntl_destroy +ffffffff8203d0b0 t dce_panel_cntl_hw_init +ffffffff8203d2f0 t dce_is_panel_backlight_on +ffffffff8203d3a0 t dce_is_panel_powered_on +ffffffff8203d450 t dce_store_backlight_level +ffffffff8203d4f0 t dce_driver_set_backlight +ffffffff8203d670 t dce_get_16_bit_backlight_from_pwm +ffffffff8203e000 T get_filter_3tap_16p +ffffffff8203e090 T get_filter_3tap_64p +ffffffff8203e120 T get_filter_4tap_16p +ffffffff8203e1b0 T get_filter_4tap_64p +ffffffff8203e240 T get_filter_5tap_64p +ffffffff8203e2d0 T get_filter_6tap_64p +ffffffff8203e360 T get_filter_7tap_64p +ffffffff8203e3f0 T get_filter_8tap_64p +ffffffff8203e480 T get_filter_2tap_16p +ffffffff8203e4b0 T get_filter_2tap_64p +ffffffff8203f000 T dce110_se_audio_mute_control +ffffffff8203f050 T dce110_se_dp_audio_setup +ffffffff8203f060 t dce110_se_audio_setup +ffffffff8203f1c0 T dce110_se_dp_audio_enable +ffffffff8203f400 T dce110_se_dp_audio_disable +ffffffff8203f560 T dce110_se_hdmi_audio_setup +ffffffff8203fa60 T dce110_se_hdmi_audio_disable +ffffffff8203fac0 T dce110_stream_encoder_construct +ffffffff8203fb10 t dce110_stream_encoder_dp_set_stream_attribute +ffffffff82040160 t dce110_stream_encoder_hdmi_set_stream_attribute +ffffffff82040690 t dce110_stream_encoder_dvi_set_stream_attribute +ffffffff820407c0 t dce110_stream_encoder_lvds_set_stream_attribute +ffffffff820408a0 t dce110_stream_encoder_set_throttled_vcp_size +ffffffff82040aa0 t dce110_stream_encoder_update_hdmi_info_packets +ffffffff82041190 t dce110_stream_encoder_stop_hdmi_info_packets +ffffffff82041430 t dce110_stream_encoder_update_dp_info_packets +ffffffff820415c0 t dce110_stream_encoder_stop_dp_info_packets +ffffffff82041730 t dce110_stream_encoder_dp_blank +ffffffff82041870 t dce110_stream_encoder_dp_unblank +ffffffff82041a30 t setup_stereo_sync +ffffffff82041ab0 t dce110_stream_encoder_set_avmute +ffffffff82041af0 t dig_connect_to_otg +ffffffff82041b30 t dce110_reset_hdmi_stream_attribute +ffffffff82041c30 t dig_source_otg +ffffffff82041ca0 t dce110_stream_encoder_set_stream_attribute_helper +ffffffff82041d90 t dce110_update_generic_info_packet +ffffffff82043000 T dce_transform_get_optimal_number_of_taps +ffffffff82043300 T dce110_opp_set_csc_adjustment +ffffffff820433c0 t program_color_matrix +ffffffff820435f0 T dce110_opp_set_csc_default +ffffffff82043730 T dce110_opp_program_regamma_pwl +ffffffff82043fe0 T dce110_opp_power_on_regamma_lut +ffffffff820440a0 T dce110_opp_set_regamma_mode +ffffffff82044110 T dce_transform_construct +ffffffff82044190 t dce_transform_reset +ffffffff820441d0 t dce_transform_set_scaler +ffffffff82044c70 t dce_transform_set_pixel_storage_depth +ffffffff82045120 t dce_transform_set_gamut_remap +ffffffff82045460 t program_multi_taps_filter +ffffffff82046000 T dmub_abm_create +ffffffff820460d0 T dmub_abm_destroy +ffffffff82046120 t dmub_abm_init_ex +ffffffff82046130 t dmub_abm_set_level_ex +ffffffff820461e0 t dmub_abm_set_backlight_level_pwm_ex +ffffffff82046280 t dmub_abm_get_current_backlight_ex +ffffffff82046290 t dmub_abm_get_target_backlight_ex +ffffffff820462a0 t dmub_abm_init_config_ex +ffffffff82046330 t dmub_abm_set_pause_ex +ffffffff820463d0 t dmub_abm_save_restore_ex +ffffffff82046460 t dmub_abm_set_pipe_ex +ffffffff82047000 T dmub_abm_init +ffffffff820473c0 T dmub_abm_get_current_backlight +ffffffff820473f0 T dmub_abm_get_target_backlight +ffffffff82047420 T dmub_abm_set_level +ffffffff820474b0 T dmub_abm_init_config +ffffffff820475b0 T dmub_abm_set_pause +ffffffff82047650 T dmub_abm_save_restore +ffffffff82047770 T dmub_abm_set_pipe +ffffffff82047810 T dmub_abm_set_backlight_level +ffffffff82048000 T dmub_hw_lock_mgr_cmd +ffffffff820480a0 T dmub_hw_lock_mgr_inbox0_cmd +ffffffff820480e0 T should_use_dmub_lock +ffffffff82049000 T dmub_enable_outbox_notification +ffffffff8204a000 T dmub_psr_create +ffffffff8204a090 T dmub_psr_destroy +ffffffff8204a0e0 t dmub_psr_copy_settings +ffffffff8204a5d0 t dmub_psr_enable +ffffffff8204a750 t dmub_psr_get_state +ffffffff8204aa60 t dmub_psr_set_level +ffffffff8204ab30 t dmub_psr_force_static +ffffffff8204abd0 t dmub_psr_get_residency +ffffffff8204ac20 t dmub_psr_set_sink_vtotal_in_psr_active +ffffffff8204acc0 t dmub_psr_set_power_opt +ffffffff8204b000 T dmub_replay_create +ffffffff8204b090 T dmub_replay_destroy +ffffffff8204b0e0 t dmub_replay_get_state +ffffffff8204b1d0 t dmub_replay_enable +ffffffff8204b3f0 t dmub_replay_copy_settings +ffffffff8204b6b0 t dmub_replay_set_power_opt +ffffffff8204b750 t dmub_replay_set_coasting_vtotal +ffffffff8204b7e0 t dmub_replay_residency +ffffffff8204c000 T dce100_enable_display_power_gating +ffffffff8204c0a0 T dce100_prepare_bandwidth +ffffffff8204c0f0 T dce100_optimize_bandwidth +ffffffff8204c140 T dce100_hw_sequencer_construct +ffffffff8204d000 T dce100_add_stream_to_ctx +ffffffff8204d0a0 T dce100_validate_plane +ffffffff8204d0e0 T dce100_find_first_free_match_stream_enc_for_link +ffffffff8204d190 T dce100_create_resource_pool +ffffffff8204df60 t dce100_resource_destruct +ffffffff8204e220 t dce100_destroy_resource_pool +ffffffff8204e280 t dce100_panel_cntl_create +ffffffff8204e310 t dce100_link_encoder_create +ffffffff8204e410 t dce100_validate_bandwidth +ffffffff8204e550 t dce100_validate_global +ffffffff8204e5f0 t read_dce_straps +ffffffff8204e660 t create_audio +ffffffff8204e690 t dce100_stream_encoder_create +ffffffff8204e730 t dce100_hwseq_create +ffffffff8204f000 T dce110_compressor_power_up_fbc +ffffffff8204f130 T dce110_compressor_enable_fbc +ffffffff8204f340 T dce110_compressor_is_fbc_enabled_in_hw +ffffffff8204f3f0 T dce110_compressor_disable_fbc +ffffffff8204f6c0 T dce110_compressor_program_compressed_surface_address_and_pitch +ffffffff8204f7e0 T dce110_compressor_set_fbc_invalidation_triggers +ffffffff8204f860 T dce110_compressor_create +ffffffff8204f900 T dce110_compressor_construct +ffffffff8204f980 T dce110_compressor_destroy +ffffffff8204f9d0 T get_max_support_fbc_buffersize +ffffffff82050000 T dce110_update_info_frame +ffffffff820500f0 T dce110_enable_stream +ffffffff82050190 T dce110_edp_wait_for_hpd_ready +ffffffff820503f0 T dce110_edp_power_control +ffffffff82050950 T dce110_edp_wait_for_T12 +ffffffff82050b00 T dce110_edp_backlight_control +ffffffff82050e60 T dce110_enable_audio_stream +ffffffff82050f20 T dce110_disable_audio_stream +ffffffff82050fe0 T dce110_disable_stream +ffffffff82051230 T dce110_unblank_stream +ffffffff82051330 T dce110_blank_stream +ffffffff820514a0 T dce110_set_avmute +ffffffff820514f0 T dce110_enable_accelerated_mode +ffffffff820518a0 t power_down_all_hw_blocks +ffffffff82051a70 T dce110_set_safe_displaymarks +ffffffff82051b90 T dce110_apply_ctx_to_hw +ffffffff82052490 t enable_fbc +ffffffff82052650 T dce110_power_down +ffffffff82052740 T dce110_prepare_bandwidth +ffffffff82052890 T dce110_optimize_bandwidth +ffffffff82052a90 T dce110_set_backlight_level +ffffffff82052ba0 T dce110_set_abm_immediate_disable +ffffffff82052c20 T dce110_set_pipe +ffffffff82052c90 T dce110_enable_lvds_link_output +ffffffff82052cf0 T dce110_enable_tmds_link_output +ffffffff82052d60 T dce110_enable_dp_link_output +ffffffff82052f90 T dce110_disable_link_output +ffffffff82053080 T dce110_hw_sequencer_construct +ffffffff820530d0 t enable_display_pipe_clock_gating +ffffffff82053100 t build_audio_output +ffffffff82053260 t init_hw +ffffffff82053500 t dce110_power_down_fe +ffffffff820535d0 t dce110_apply_ctx_for_surface +ffffffff82053d10 t dce110_post_unlock_program_front_end +ffffffff82053d40 t update_plane_addr +ffffffff82053db0 t dce110_wait_for_mpcc_disconnect +ffffffff82053de0 t dce110_update_pending_status +ffffffff82053ec0 t get_position +ffffffff82053f50 t dce110_enable_per_frame_crtc_position_reset +ffffffff820541f0 t dce110_enable_timing_synchronization +ffffffff820544e0 t set_drr +ffffffff820545c0 t set_static_screen_control +ffffffff82054690 t dce110_set_cursor_position +ffffffff820547e0 t dce110_set_cursor_attribute +ffffffff820548a0 t program_gamut_remap +ffffffff820549f0 t program_output_csc +ffffffff82054af0 t init_pipes +ffffffff82054b20 t dce110_reset_hw_ctx_wrap +ffffffff82054d70 t dce110_set_input_transfer_func +ffffffff82054f00 t dce110_set_output_transfer_func +ffffffff82055810 t dce110_enable_display_power_gating +ffffffff82055970 t dce110_enable_stream_timing +ffffffff82056000 T dce110_mem_input_v_construct +ffffffff82056040 t dce_mem_input_v_program_display_marks +ffffffff820560c0 t dce_mem_input_program_chroma_display_marks +ffffffff82056140 t dce110_allocate_mem_input_v +ffffffff82056250 t dce110_free_mem_input_v +ffffffff82056280 t dce_mem_input_v_program_surface_flip_and_addr +ffffffff820563d0 t dce_mem_input_v_program_pte_vm +ffffffff820566a0 t dce_mem_input_v_program_surface_config +ffffffff82056a70 t dce_mem_input_v_is_surface_pending +ffffffff82056ae0 t program_urgency_watermark +ffffffff82056bf0 t program_nbp_watermark +ffffffff82056d60 t program_stutter_watermark +ffffffff82057000 T dce110_opp_v_set_csc_default +ffffffff82057300 t program_color_matrix_v +ffffffff82057470 t configure_graphics_mode_v +ffffffff82057560 T dce110_opp_v_set_csc_adjustment +ffffffff82058000 T dce110_opp_program_regamma_pwl_v +ffffffff820584b0 t power_on_lut +ffffffff820585d0 T dce110_opp_power_on_regamma_lut_v +ffffffff82058630 T dce110_opp_set_regamma_mode_v +ffffffff82059000 T dce110_opp_v_construct +ffffffff8205a000 T dce110_resource_build_pipe_hw_param +ffffffff8205a150 T dce110_find_first_free_match_stream_enc_for_link +ffffffff8205a1f0 T dce110_create_resource_pool +ffffffff8205b190 t dce110_resource_destruct +ffffffff8205b4b0 t dce110_destroy_resource_pool +ffffffff8205b510 t dce110_panel_cntl_create +ffffffff8205b5a0 t dce110_link_encoder_create +ffffffff8205b6a0 t dce110_validate_bandwidth +ffffffff8205b790 t dce110_validate_global +ffffffff8205b870 t dce110_acquire_underlay +ffffffff8205ba50 t dce110_validate_plane +ffffffff8205bab0 t dce110_add_stream_to_ctx +ffffffff8205bb80 t read_dce_straps +ffffffff8205bbf0 t create_audio +ffffffff8205bc20 t dce110_stream_encoder_create +ffffffff8205bcc0 t dce110_hwseq_create +ffffffff8205c000 T dce110_timing_generator_set_early_control +ffffffff8205c070 T dce110_timing_generator_enable_crtc +ffffffff8205c100 T dce110_timing_generator_program_blank_color +ffffffff8205c190 T dce110_timing_generator_disable_crtc +ffffffff8205c1e0 T dce110_timing_generator_program_timing_generator +ffffffff8205c3d0 T dce110_timing_generator_set_drr +ffffffff8205c510 T dce110_timing_generator_set_static_screen_control +ffffffff8205c5a0 T dce110_timing_generator_get_vblank_counter +ffffffff8205c600 T dce110_timing_generator_get_position +ffffffff8205c6a0 T dce110_timing_generator_get_crtc_scanoutpos +ffffffff8205c790 T dce110_timing_generator_program_blanking +ffffffff8205ca00 T dce110_timing_generator_set_test_pattern +ffffffff8205ccf0 T dce110_timing_generator_validate_timing +ffffffff8205cdb0 T dce110_timing_generator_wait_for_vblank +ffffffff8205cf20 T dce110_timing_generator_is_counter_moving +ffffffff8205cfa0 T dce110_timing_generator_wait_for_vactive +ffffffff8205d080 T dce110_timing_generator_setup_global_swap_lock +ffffffff8205d1e0 T dce110_timing_generator_tear_down_global_swap_lock +ffffffff8205d260 T dce110_timing_generator_enable_advanced_request +ffffffff8205d300 T dce110_timing_generator_set_lock_master +ffffffff8205d360 T dce110_timing_generator_enable_reset_trigger +ffffffff8205d450 T dce110_timing_generator_enable_crtc_reset +ffffffff8205d640 T dce110_timing_generator_disable_reset_trigger +ffffffff8205d730 T dce110_timing_generator_did_triggered_reset_occur +ffffffff8205d7c0 T dce110_timing_generator_disable_vga +ffffffff8205d820 T dce110_timing_generator_set_overscan_color_black +ffffffff8205d8c0 T dce110_tg_program_blank_color +ffffffff8205d980 T dce110_tg_set_overscan_color +ffffffff8205d9e0 T dce110_tg_program_timing +ffffffff8205da10 T dce110_tg_is_blanked +ffffffff8205da70 T dce110_tg_set_blank +ffffffff8205dad0 T dce110_tg_validate_timing +ffffffff8205db90 T dce110_tg_wait_for_state +ffffffff8205dc90 T dce110_tg_set_colors +ffffffff8205dde0 T dce110_arm_vert_intr +ffffffff8205deb0 T dce110_configure_crc +ffffffff8205e010 t dce110_is_tg_enabled +ffffffff8205e070 T dce110_get_crc +ffffffff8205e140 T dce110_timing_generator_construct +ffffffff8205f000 T dce110_timing_generator_v_construct +ffffffff8205f070 t dce110_timing_generator_v_program_timing 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dce110_timing_generator_v_tear_down_global_swap_lock +ffffffff8205fad0 t dce110_timing_generator_v_enable_advanced_request +ffffffff82060000 T dce110_transform_v_construct +ffffffff82060060 t dce110_xfmv_reset +ffffffff820600c0 t dce110_xfmv_set_scaler +ffffffff82060800 t dce110_xfmv_set_pixel_storage_depth +ffffffff820608e0 t dce110_xfmv_set_gamut_remap +ffffffff82060910 t program_multi_taps_filter +ffffffff82060d00 t program_viewport +ffffffff82061000 T dce112_compressor_power_up_fbc +ffffffff82061130 T dce112_compressor_enable_fbc +ffffffff820612e0 T dce112_compressor_is_fbc_enabled_in_hw +ffffffff82061390 T dce112_compressor_enable_lpt +ffffffff820614b0 t wait_for_fbc_state_changed +ffffffff82061750 T dce112_compressor_disable_fbc +ffffffff82061850 T dce112_compressor_disable_lpt +ffffffff820619b0 T dce112_compressor_is_lpt_enabled_in_hw +ffffffff82061a00 T dce112_compressor_program_compressed_surface_address_and_pitch +ffffffff82061b40 T dce112_compressor_program_lpt_control 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dce120_enable_display_power_gating +ffffffff820660f0 t dce120_update_dchub +ffffffff82067000 T dce120_create_resource_pool +ffffffff82068320 t dce120_resource_destruct +ffffffff82068600 t dce120_destroy_resource_pool +ffffffff82068660 t dce120_panel_cntl_create +ffffffff820686f0 t dce120_link_encoder_create +ffffffff820687f0 t read_dce_straps +ffffffff82068880 t create_audio +ffffffff820688b0 t dce120_stream_encoder_create +ffffffff82068950 t dce121_hwseq_create +ffffffff820689c0 t dce120_hwseq_create +ffffffff82069000 T dce120_timing_generator_construct +ffffffff82069090 t dce120_tg_validate_timing +ffffffff82069140 t dce120_tg_program_timing +ffffffff82069310 t dce120_timing_generator_enable_crtc +ffffffff820693b0 t dce120_timing_generator_get_crtc_position +ffffffff82069450 t dce120_timing_generator_get_vblank_counter +ffffffff820694b0 t dce120_timing_generator_get_crtc_scanoutpos +ffffffff820695a0 t dce120_timing_generator_set_early_control +ffffffff820695e0 t dce120_tg_wait_for_state +ffffffff820696f0 t dce120_tg_set_blank +ffffffff820697b0 t dce120_tg_is_blanked +ffffffff82069810 t dce120_timing_generator_set_overscan_color_black +ffffffff820698e0 t dce120_timing_generator_program_blank_color +ffffffff82069960 t dce120_tg_set_colors +ffffffff82069a80 t dce120_timing_generator_disable_vga +ffffffff82069af0 t dce120_timing_generator_did_triggered_reset_occur +ffffffff82069b50 t dce120_timing_generator_setup_global_swap_lock +ffffffff82069c80 t dce120_timing_generator_enable_reset_trigger +ffffffff82069d90 t dce120_timing_generator_disable_reset_trigger +ffffffff82069e40 t dce120_timing_generator_tear_down_global_swap_lock +ffffffff82069f10 t dce120_timing_generator_enable_advanced_request +ffffffff82069fb0 t dce120_timing_generator_set_drr +ffffffff8206a180 t dce120_timing_generator_set_static_screen_control +ffffffff8206a200 t dce120_timing_generator_set_test_pattern +ffffffff8206a6a0 t dce120_arm_vert_intr +ffffffff8206a760 t dce120_is_tg_enabled +ffffffff8206a7c0 t dce120_configure_crc +ffffffff8206a9a0 t dce120_get_crc +ffffffff8206b000 T dce80_hw_sequencer_construct +ffffffff8206c000 T dce80_create_resource_pool +ffffffff8206ce10 T dce81_create_resource_pool +ffffffff8206dc10 T dce83_create_resource_pool +ffffffff8206e8f0 t dce80_resource_destruct +ffffffff8206eba0 t dce80_destroy_resource_pool +ffffffff8206ec00 t dce80_panel_cntl_create +ffffffff8206ec90 t dce80_link_encoder_create +ffffffff8206ed90 t dce80_validate_bandwidth +ffffffff8206eed0 t dce80_validate_global +ffffffff8206ef70 t read_dce_straps +ffffffff8206efe0 t create_audio +ffffffff8206f010 t dce80_stream_encoder_create +ffffffff8206f0b0 t dce80_hwseq_create +ffffffff82070000 T dce80_timing_generator_construct +ffffffff82070090 t program_timing +ffffffff82070170 t dce80_timing_generator_enable_advanced_request +ffffffff82071000 T cm_helper_program_color_matrices +ffffffff820710c0 T cm_helper_program_xfer_func +ffffffff82071480 T cm_helper_convert_to_custom_float +ffffffff820718d0 T cm_helper_translate_curve_to_hw_format +ffffffff82072490 T cm_helper_translate_curve_to_degamma_hw_format +ffffffff82073000 T dpp_read_state +ffffffff82073270 T dpp1_get_optimal_number_of_taps +ffffffff82073410 T dpp_reset +ffffffff82073460 T dpp1_cnv_setup +ffffffff82073980 T dpp1_set_cursor_attributes +ffffffff82073ab0 T dpp1_set_cursor_position +ffffffff82073c00 T dpp1_cnv_set_optional_cursor_attributes +ffffffff82073cc0 T dpp1_dppclk_control +ffffffff82073dc0 T dpp1_construct +ffffffff82073e40 t dpp1_cm_set_regamma_pwl +ffffffff82074000 T dpp1_cm_set_gamut_remap +ffffffff820741a0 T dpp1_cm_set_output_csc_default +ffffffff82074220 t dpp1_cm_program_color_matrix +ffffffff820743e0 T dpp1_cm_set_output_csc_adjustment +ffffffff820743f0 T dpp1_cm_power_on_regamma_lut +ffffffff82074470 T dpp1_cm_program_regamma_lut +ffffffff82074680 T dpp1_cm_configure_regamma_lut +ffffffff82074780 T dpp1_cm_program_regamma_luta_settings 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+ffffffff8207a000 T hubbub1_wm_read_state +ffffffff8207a320 T hubbub1_allow_self_refresh_control +ffffffff8207a3a0 T hubbub1_is_allow_self_refresh_enabled +ffffffff8207a410 T hubbub1_verify_allow_pstate_change_high +ffffffff8207a5d0 T hubbub1_wm_change_req_wa +ffffffff8207a670 T hubbub1_program_urgent_watermarks +ffffffff8207aa50 T hubbub1_program_stutter_watermarks +ffffffff8207aeb0 T hubbub1_program_pstate_watermarks +ffffffff8207b100 T hubbub1_program_watermarks +ffffffff8207b230 T hubbub1_update_dchub +ffffffff8207b460 T hubbub1_toggle_watermark_change_req +ffffffff8207b500 T hubbub1_soft_reset +ffffffff8207b540 T hubbub1_construct +ffffffff8207b5a0 t hubbub1_get_dcc_compression_cap +ffffffff8207b7c0 t hubbub1_dcc_support_swizzle +ffffffff8207b850 t hubbub1_dcc_support_pixel_format +ffffffff8207c000 T hubp1_set_blank +ffffffff8207c110 T hubp1_clear_underflow +ffffffff8207c160 T hubp1_vready_workaround +ffffffff8207c1f0 T hubp1_program_tiling +ffffffff8207c450 T hubp1_program_size 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hubp1_set_vm_system_aperture_settings +ffffffff82080550 t hubp1_set_vm_context0_settings +ffffffff82080830 t hubp1_set_hubp_blank_en +ffffffff82080870 t hubp1_disconnect +ffffffff82080900 t hubp1_disable_control +ffffffff82080940 t hubp1_get_underflow_status +ffffffff820809b0 t hubp1_wait_pipe_read_start +ffffffff82081000 T dcn10_lock_all_pipes +ffffffff82081130 T dcn10_log_hw_state +ffffffff82082c10 T dcn10_did_underflow_occur +ffffffff82082cb0 T dcn10_enable_power_gating_plane +ffffffff82082e50 T dcn10_disable_vga +ffffffff82083040 T dcn10_dpp_pg_control +ffffffff82083290 T dcn10_hubp_pg_control +ffffffff820834e0 T dcn10_bios_golden_init +ffffffff82083640 T dcn10_enable_stream_timing +ffffffff82083a40 T dcn10_verify_allow_pstate_change_high +ffffffff82083d90 T dcn10_plane_atomic_disconnect +ffffffff82083ec0 T dcn10_plane_atomic_power_down +ffffffff82084020 T dcn10_plane_atomic_disable +ffffffff82084160 T dcn10_disable_plane +ffffffff82084300 T dcn10_init_pipes +ffffffff820849c0 T dcn10_init_hw +ffffffff82084eb0 T dcn10_power_down_on_boot +ffffffff82085000 T dcn10_reset_hw_ctx_wrap +ffffffff82085340 T dcn10_update_plane_addr +ffffffff82085460 T dcn10_set_input_transfer_func +ffffffff820855d0 T dcn10_set_output_transfer_func +ffffffff820856a0 T dcn10_pipe_control_lock +ffffffff82085770 T dcn10_cursor_lock +ffffffff82085930 T dcn10_enable_vblanks_synchronization +ffffffff82086110 T dcn10_enable_timing_synchronization +ffffffff82086510 T dcn10_enable_per_frame_crtc_position_reset +ffffffff820866e0 T dcn10_program_gamut_remap +ffffffff820868e0 T dcn10_program_output_csc +ffffffff82086a10 T dcn10_update_visual_confirm_color +ffffffff82086a90 T dcn10_update_mpcc +ffffffff82086d40 T dcn10_blank_pixel_data +ffffffff82086e80 T dcn10_set_hdr_multiplier +ffffffff82086f10 T dcn10_program_pipe +ffffffff82087ab0 T dcn10_wait_for_pending_cleared +ffffffff82087bb0 T dcn10_post_unlock_program_front_end +ffffffff82087e50 T dcn10_prepare_bandwidth +ffffffff82087ff0 T dcn10_optimize_bandwidth +ffffffff82088190 T dcn10_set_drr +ffffffff82088290 T dcn10_get_position +ffffffff82088320 T dcn10_set_static_screen_control +ffffffff820883c0 T dcn10_setup_stereo +ffffffff82088510 T dcn10_wait_for_mpcc_disconnect +ffffffff820886c0 T dcn10_dummy_display_power_gating +ffffffff820886f0 T dcn10_update_pending_status +ffffffff82088830 T dcn10_update_dchub +ffffffff82088860 T dcn10_set_cursor_position +ffffffff82088da0 T dcn10_set_cursor_attribute +ffffffff82088df0 T dcn10_set_cursor_sdr_white_level +ffffffff82088eb0 T dcn10_get_vupdate_offset_from_vsync +ffffffff82088f40 T dcn10_calc_vupdate_position +ffffffff82088fd0 T dcn10_setup_periodic_interrupt +ffffffff820890e0 T dcn10_setup_vupdate_interrupt +ffffffff820891a0 T dcn10_unblank_stream +ffffffff820892b0 T dcn10_send_immediate_sdp_message +ffffffff82089310 T dcn10_set_clock +ffffffff82089420 T dcn10_get_clock +ffffffff82089480 T dcn10_get_dcc_en_bits +ffffffff8208a000 T snprintf_count +ffffffff8208a090 T dcn10_clear_status_bits +ffffffff8208a240 T dcn10_get_hw_state +ffffffff8208c000 T dcn10_hw_sequencer_construct +ffffffff8208d000 T dcn10_ipp_construct +ffffffff8208d050 T dcn20_ipp_construct +ffffffff8208d0a0 t dcn10_ipp_destroy +ffffffff8208e000 T dcn10_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff8208e0b0 T dcn10_get_dig_frontend +ffffffff8208e170 T enc1_configure_encoder +ffffffff8208e1f0 T dcn10_psr_program_dp_dphy_fast_training +ffffffff8208e270 T dcn10_psr_program_secondary_packet +ffffffff8208e2f0 T dcn10_is_dig_enabled +ffffffff8208e350 T dcn10_link_encoder_validate_dvi_output +ffffffff8208e400 T dcn10_link_encoder_validate_dp_output +ffffffff8208e440 T dcn10_link_encoder_construct +ffffffff8208e620 T dcn10_link_encoder_validate_output_with_stream +ffffffff8208e820 T dcn10_link_encoder_hw_init +ffffffff8208ea20 T dcn10_aux_initialize +ffffffff8208eab0 T dcn10_link_encoder_destroy +ffffffff8208eb00 T dcn10_link_encoder_setup +ffffffff8208ec50 T dcn10_link_encoder_enable_tmds_output +ffffffff8208ed40 T dcn10_link_encoder_enable_tmds_output_with_clk_pattern_wa +ffffffff8208ee60 T dcn10_link_encoder_enable_dp_output +ffffffff8208efc0 T dcn10_link_encoder_enable_dp_mst_output +ffffffff8208f120 T dcn10_link_encoder_disable_output +ffffffff8208f2f0 T dcn10_link_encoder_dp_set_lane_settings +ffffffff8208f490 T dcn10_link_encoder_dp_set_phy_pattern +ffffffff8208fbb0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff8208fdb0 T dcn10_link_encoder_update_mst_stream_allocation_table +ffffffff82090080 T dcn10_link_encoder_connect_dig_be_to_fe +ffffffff820901c0 T dcn10_link_encoder_enable_hpd +ffffffff82090200 T dcn10_link_encoder_disable_hpd +ffffffff82090240 T dcn10_get_dig_mode +ffffffff820902b0 T dcn10_link_encoder_get_max_link_cap +ffffffff82090330 t program_pattern_symbols +ffffffff82091000 T mpc1_set_bg_color +ffffffff820911e0 T mpc1_get_mpcc +ffffffff82091270 T mpc1_update_stereo_mix +ffffffff82091390 T mpc1_assert_idle_mpcc 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optc1_setup_vertical_interrupt2 +ffffffff820942c0 T optc1_program_timing +ffffffff820949a0 T optc1_is_two_pixels_per_containter +ffffffff820949f0 T optc1_set_vtg_params +ffffffff82094b20 T optc1_set_blank_data_double_buffer +ffffffff82094b60 T optc1_set_timing_double_buffer +ffffffff82094ba0 T optc1_set_blank +ffffffff82094c70 T optc1_is_blanked +ffffffff82094cf0 T optc1_enable_optc_clock +ffffffff82094f10 T optc1_disable_crtc +ffffffff82095000 T optc1_program_blank_color +ffffffff820950b0 T optc1_validate_timing +ffffffff820951b0 T optc1_get_vblank_counter +ffffffff82095210 T optc1_lock +ffffffff820952f0 T optc1_unlock +ffffffff82095360 T optc1_get_position +ffffffff820953f0 T optc1_is_counter_moving +ffffffff82095470 T optc1_did_triggered_reset_occur +ffffffff82095510 T optc1_disable_reset_trigger +ffffffff820955d0 T optc1_enable_reset_trigger +ffffffff820956e0 T optc1_enable_crtc_reset +ffffffff82095840 T optc1_wait_for_state +ffffffff82095910 T optc1_set_early_control +ffffffff82095940 T optc1_set_static_screen_control +ffffffff820959e0 T optc1_set_drr +ffffffff82095b80 T optc1_set_vtotal_min_max +ffffffff82095c20 T optc1_get_crtc_scanoutpos +ffffffff82095d30 T optc1_program_stereo +ffffffff82095f40 T optc1_is_stereo_left_eye +ffffffff82095fb0 T optc1_get_hw_timing +ffffffff820960c0 T optc1_read_otg_state +ffffffff820963d0 T optc1_get_otg_active_size +ffffffff820964e0 T optc1_clear_optc_underflow +ffffffff82096530 T optc1_tg_init +ffffffff820965e0 T optc1_is_tg_enabled +ffffffff82096650 T optc1_is_optc_underflow_occurred +ffffffff820966c0 T optc1_configure_crc +ffffffff82096930 T optc1_get_crc +ffffffff82096a30 T dcn10_timing_generator_init +ffffffff82096aa0 t optc1_enable_crtc +ffffffff82096ba0 t optc1_set_test_pattern +ffffffff82097290 t optc1_program_manual_trigger +ffffffff82097340 t optc1_setup_manual_trigger +ffffffff82098000 T dcn10_find_first_free_match_stream_enc_for_link +ffffffff820980b0 T dcn10_create_resource_pool +ffffffff82099230 t dcn10_resource_destruct +ffffffff82099540 t dcn10_destroy_resource_pool +ffffffff820995a0 t dcn10_panel_cntl_create +ffffffff82099630 t dcn10_link_encoder_create +ffffffff82099730 t dcn10_validate_bandwidth +ffffffff820997b0 t dcn10_validate_global +ffffffff82099990 t dcn10_acquire_free_pipe_for_layer +ffffffff82099ac0 t dcn10_validate_plane +ffffffff82099b10 t dcn10_add_stream_to_ctx +ffffffff82099ce0 t dcn10_patch_unknown_plane_state +ffffffff82099d40 t read_dce_straps +ffffffff82099d70 t create_audio +ffffffff82099da0 t dcn10_stream_encoder_create +ffffffff82099e40 t dcn10_hwseq_create +ffffffff82099ef0 t dcn10_get_dcc_compression_cap +ffffffff8209a000 T enc1_update_generic_info_packet +ffffffff8209a430 T enc1_stream_encoder_dp_set_stream_attribute +ffffffff8209a910 T enc1_stream_encoder_set_stream_attribute_helper +ffffffff8209a990 T enc1_stream_encoder_hdmi_set_stream_attribute +ffffffff8209af80 T enc1_stream_encoder_dvi_set_stream_attribute +ffffffff8209b110 T enc1_stream_encoder_set_throttled_vcp_size +ffffffff8209b330 T enc1_stream_encoder_update_dp_info_packets +ffffffff8209b530 T enc1_stream_encoder_send_immediate_sdp_message +ffffffff8209b940 T enc1_stream_encoder_stop_dp_info_packets +ffffffff8209bb10 T enc1_stream_encoder_dp_blank +ffffffff8209bcb0 T enc1_stream_encoder_dp_unblank +ffffffff8209bee0 T enc1_stream_encoder_set_avmute +ffffffff8209bf20 T enc1_reset_hdmi_stream_attribute +ffffffff8209bff0 T get_audio_clock_info +ffffffff8209c0e0 T enc1_se_enable_audio_clock +ffffffff8209c140 T enc1_se_enable_dp_audio +ffffffff8209c210 T enc1_se_audio_mute_control +ffffffff8209c260 T enc1_se_dp_audio_setup +ffffffff8209c270 t enc1_se_audio_setup +ffffffff8209c3d0 T enc1_se_dp_audio_enable +ffffffff8209c620 T enc1_se_dp_audio_disable +ffffffff8209c790 T enc1_se_hdmi_audio_setup +ffffffff8209cc50 T enc1_se_hdmi_audio_disable +ffffffff8209cce0 T enc1_setup_stereo_sync +ffffffff8209cd60 T enc1_dig_connect_to_otg +ffffffff8209cda0 T enc1_dig_source_otg +ffffffff8209ce10 T enc1_stream_encoder_dp_get_pixel_format +ffffffff8209cf00 T dcn10_stream_encoder_construct +ffffffff8209cf60 t enc1_stream_encoder_update_hdmi_info_packets +ffffffff8209d310 t enc1_stream_encoder_stop_hdmi_info_packets +ffffffff8209e000 T dccg2_update_dpp_dto +ffffffff8209e160 T dccg2_get_dccg_ref_freq +ffffffff8209e220 T dccg2_set_fifo_errdet_ovr_en +ffffffff8209e260 T dccg2_otg_add_pixel +ffffffff8209e300 T dccg2_otg_drop_pixel +ffffffff8209e3a0 T dccg2_init +ffffffff8209e3d0 T dccg2_create +ffffffff8209e480 T dcn_dccg_destroy +ffffffff8209f000 T dpp20_read_state +ffffffff8209f1d0 T dpp2_power_on_obuf +ffffffff8209f2a0 T dpp2_dummy_program_input_lut +ffffffff8209f2d0 T dscl2_calc_lb_num_partitions +ffffffff8209f400 T dpp2_cnv_set_alpha_keyer +ffffffff8209f680 T dpp2_set_cursor_attributes +ffffffff8209f7e0 T oppn20_dummy_program_regamma_pwl +ffffffff8209f810 T dpp2_construct +ffffffff8209f890 t dpp2_cnv_setup +ffffffff820a1000 T dpp2_set_degamma_pwl +ffffffff820a13b0 T dpp2_set_degamma +ffffffff820a1560 T dpp2_cm_set_gamut_remap +ffffffff820a1790 T dpp2_program_input_csc +ffffffff820a19c0 T dpp20_program_blnd_lut +ffffffff820a2120 T dpp20_program_shaper +ffffffff820a40d0 T dpp20_program_3dlut +ffffffff820a47a0 t dpp20_set3dlut_ram12 +ffffffff820a4970 T dpp2_set_hdr_multiplier +ffffffff820a5000 T dsc2_construct +ffffffff820a5050 T dsc2_get_enc_caps +ffffffff820a50d0 T dsc_config_log +ffffffff820a5180 T dsc2_get_packed_pps +ffffffff820a5320 T dsc_prepare_config +ffffffff820a5860 T dsc_log_pps +ffffffff820a5fe0 T dsc_override_rc_params +ffffffff820a6130 T dsc_init_reg_values +ffffffff820a6220 T dsc_dc_pixel_encoding_to_dsc_pixel_format +ffffffff820a62d0 T dsc_dc_color_depth_to_dsc_bits_per_comp +ffffffff820a6310 T dsc_update_from_dsc_parameters +ffffffff820a63c0 t dsc2_read_state +ffffffff820a6570 t dsc2_validate_stream +ffffffff820a65d0 t dsc2_set_config +ffffffff820a7940 t dsc2_enable +ffffffff820a7af0 t dsc2_disable +ffffffff820a7c70 t dsc2_disconnect +ffffffff820a8000 T dwb2_config_dwb_cnv +ffffffff820a8200 T dwb2_disable +ffffffff820a8310 T dwb2_is_enabled +ffffffff820a83b0 T dwb2_set_stereo +ffffffff820a8490 T dwb2_set_new_content +ffffffff820a8500 T dwb2_set_scaler +ffffffff820a8880 T dcn20_dwbc_construct +ffffffff820a88d0 t dwb2_get_caps +ffffffff820a89b0 t dwb2_enable +ffffffff820a8b10 t dwb2_update +ffffffff820a8c70 t dwb2_set_warmup +ffffffff820a9000 T dwb_program_horz_scalar +ffffffff820a94c0 t wbscl_get_filter_coeffs_16p +ffffffff820a9990 t wbscl_set_scaler_filter +ffffffff820a9ba0 T dwb_program_vert_scalar +ffffffff820ab000 T hubbub2_dcc_support_swizzle +ffffffff820ab0c0 T hubbub2_dcc_support_pixel_format +ffffffff820ab110 T hubbub2_get_dcc_compression_cap +ffffffff820ab350 T hubbub2_init_vm_ctx +ffffffff820ab4a0 T hubbub2_init_dchub_sys_ctx +ffffffff820ab6e0 T hubbub2_update_dchub +ffffffff820ab8d0 T hubbub2_wm_read_state +ffffffff820abc00 T hubbub2_get_dchub_ref_freq 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hubp2_is_flip_pending +ffffffff820aff50 T hubp2_set_blank +ffffffff820affb0 T hubp2_set_blank_regs +ffffffff820b00b0 T hubp2_cursor_set_position +ffffffff820b0520 T hubp2_clk_cntl +ffffffff820b0570 T hubp2_vtg_sel +ffffffff820b05b0 T hubp2_clear_underflow +ffffffff820b0600 T hubp2_read_state_common +ffffffff820b1250 T hubp2_read_state +ffffffff820b1520 T hubp2_construct +ffffffff820b1590 t hubp2_setup +ffffffff820b1a30 t hubp2_validate_dml_output +ffffffff820b3000 T dcn20_set_flip_control_gsl +ffffffff820b3050 T dcn20_enable_power_gating_plane +ffffffff820b34b0 T dcn20_dccg_init +ffffffff820b3530 T dcn20_disable_vga +ffffffff820b35f0 T dcn20_program_triple_buffer +ffffffff820b3640 T dcn20_init_blank +ffffffff820b3850 T dcn20_dsc_pg_control +ffffffff820b3c60 T dcn20_dpp_pg_control +ffffffff820b3f10 T dcn20_hubp_pg_control +ffffffff820b41c0 T dcn20_plane_atomic_disable +ffffffff820b4310 t dcn20_setup_gsl_group_as_lock +ffffffff820b4570 T dcn20_disable_plane +ffffffff820b4650 T dcn20_disable_pixel_data +ffffffff820b4670 T dcn20_blank_pixel_data +ffffffff820b4890 T dcn20_enable_stream_timing +ffffffff820b4e50 T dcn20_program_output_csc +ffffffff820b4f40 T dcn20_set_output_transfer_func +ffffffff820b50c0 T dcn20_set_blend_lut +ffffffff820b5130 T dcn20_set_shaper_3dlut +ffffffff820b51f0 T dcn20_set_input_transfer_func +ffffffff820b53b0 T dcn20_update_odm +ffffffff820b54a0 T dcn20_pipe_control_lock +ffffffff820b57c0 T dcn20_program_front_end_for_ctx +ffffffff820b6470 t dcn20_program_pipe +ffffffff820b6f10 T dcn20_post_unlock_program_front_end +ffffffff820b71e0 T dcn20_prepare_bandwidth +ffffffff820b7350 T dcn20_optimize_bandwidth +ffffffff820b7560 T dcn20_update_bandwidth +ffffffff820b7820 T dcn20_enable_writeback +ffffffff820b7970 T dcn20_disable_writeback +ffffffff820b7a00 T dcn20_wait_for_blank_complete +ffffffff820b7a90 T dcn20_dmdata_status_done +ffffffff820b7ae0 T dcn20_disable_stream_gating +ffffffff820b7b90 T dcn20_enable_stream_gating +ffffffff820b7c30 T dcn20_set_dmdata_attributes +ffffffff820b7cf0 T dcn20_init_vm_ctx +ffffffff820b7db0 T dcn20_init_sys_ctx +ffffffff820b7e60 T dcn20_update_plane_addr +ffffffff820b7fa0 T dcn20_unblank_stream +ffffffff820b8150 T dcn20_setup_vupdate_interrupt +ffffffff820b81c0 T dcn20_reset_hw_ctx_wrap +ffffffff820b8560 T dcn20_update_mpcc +ffffffff820b87c0 T dcn20_enable_stream +ffffffff820b8b20 T dcn20_program_dmdata_engine +ffffffff820b8bc0 T dcn20_fpga_init_hw +ffffffff820b91a0 T dcn20_optimize_timing_for_fsft +ffffffff820b91e0 T dcn20_set_disp_pattern_generator +ffffffff820ba000 T dcn20_hw_sequencer_construct +ffffffff820bb000 T enc2_fec_set_enable +ffffffff820bb090 T enc2_fec_set_ready +ffffffff820bb0d0 T enc2_fec_is_active +ffffffff820bb140 T link_enc2_read_state +ffffffff820bb1f0 T dcn20_link_encoder_enable_dp_output +ffffffff820bb2f0 T dcn20_link_encoder_get_max_link_cap +ffffffff820bb3a0 T dcn20_link_encoder_is_in_alt_mode +ffffffff820bb420 T enc2_hw_init +ffffffff820bb500 T dcn20_link_encoder_construct +ffffffff820bc000 T mmhubbub2_config_mcif_irq +ffffffff820bc130 T mmhubbub2_enable_mcif +ffffffff820bc170 T mmhubbub2_disable_mcif +ffffffff820bc1b0 T mcifwb2_dump_frame +ffffffff820bc2c0 T dcn20_mmhubbub_construct +ffffffff820bc310 t mmhubbub2_config_mcif_buf +ffffffff820bc960 t mmhubbub2_config_mcif_arb +ffffffff820bd000 T mpc2_update_blending +ffffffff820bd2a0 T mpc2_set_denorm +ffffffff820bd310 T mpc2_set_denorm_clamp +ffffffff820bd460 T mpc2_set_output_csc +ffffffff820bd650 T mpc2_set_ocsc_default +ffffffff820bd830 T mpc20_power_on_ogam_lut +ffffffff820bd8b0 T mpc2_set_output_gamma +ffffffff820be0b0 T mpc2_assert_idle_mpcc +ffffffff820be1c0 T mpc2_assert_mpcc_idle_before_connect +ffffffff820be410 T dcn20_mpc_construct +ffffffff820be4d0 t mpc2_get_mpcc_for_dpp +ffffffff820bf000 T opp2_set_disp_pattern_generator +ffffffff820bf810 T opp2_dpg_set_blank_color +ffffffff820bf990 T opp2_program_dpg_dimensions +ffffffff820bfa20 T opp2_dpg_is_blanked +ffffffff820bfae0 T opp2_program_left_edge_extra_pixel +ffffffff820bfb30 T dcn20_opp_construct +ffffffff820c0000 T optc2_enable_crtc +ffffffff820c0100 T optc2_set_gsl +ffffffff820c01f0 T optc2_set_gsl_source_select +ffffffff820c02b0 T optc2_set_dsc_config +ffffffff820c0380 T optc2_get_dsc_status +ffffffff820c03c0 T optc2_is_two_pixels_per_containter +ffffffff820c03d0 T optc2_set_odm_bypass +ffffffff820c0510 T optc2_set_odm_combine +ffffffff820c0700 T optc2_get_optc_source +ffffffff820c07d0 T optc2_triplebuffer_lock +ffffffff820c08f0 T optc2_triplebuffer_unlock +ffffffff820c09a0 T optc2_lock_doublebuffer_enable +ffffffff820c0b80 T optc2_lock_doublebuffer_disable +ffffffff820c0c60 T optc2_setup_manual_trigger +ffffffff820c0df0 T optc2_program_manual_trigger +ffffffff820c0e60 T optc2_configure_crc +ffffffff820c0ef0 T optc2_get_last_used_drr_vtotal +ffffffff820c0f30 T dcn20_timing_generator_init +ffffffff820c0fa0 t optc2_set_dwb_source +ffffffff820c1040 t optc2_align_vblanks +ffffffff820c2000 T dcn20_dpp_destroy +ffffffff820c2050 T dcn20_dpp_create +ffffffff820c2120 T dcn20_ipp_create +ffffffff820c21d0 T dcn20_opp_create +ffffffff820c2280 T dcn20_aux_engine_create +ffffffff820c2320 T dcn20_i2c_hw_create +ffffffff820c23b0 T dcn20_mpc_create +ffffffff820c2440 T dcn20_hubbub_create +ffffffff820c2510 T dcn20_timing_generator_create +ffffffff820c25a0 T dcn20_link_encoder_create +ffffffff820c26a0 T dcn20_stream_encoder_create +ffffffff820c2760 T dcn20_hwseq_create +ffffffff820c27d0 T dcn20_clock_source_destroy +ffffffff820c2820 T dcn20_dsc_create +ffffffff820c28e0 T dcn20_dsc_destroy +ffffffff820c2930 T dcn20_hubp_create +ffffffff820c2a00 T dcn20_build_mapped_resource +ffffffff820c2c20 T dcn20_acquire_dsc +ffffffff820c2d60 T dcn20_release_dsc +ffffffff820c2dd0 T dcn20_add_dsc_to_stream_resource +ffffffff820c2f40 T dcn20_add_stream_to_ctx +ffffffff820c2fd0 T dcn20_remove_stream_from_ctx +ffffffff820c30c0 T dcn20_split_stream_for_odm +ffffffff820c3570 T dcn20_split_stream_for_mpc +ffffffff820c36f0 T dcn20_calc_max_scaled_time +ffffffff820c3760 T dcn20_set_mcif_arb_params +ffffffff820c38d0 T dcn20_validate_dsc +ffffffff820c3a80 T dcn20_find_secondary_pipe +ffffffff820c3c60 T dcn20_merge_pipes_for_validate +ffffffff820c3ed0 T dcn20_validate_apply_pipe_split_flags +ffffffff820c4760 T dcn20_fast_validate_bw +ffffffff820c4cb0 T dcn20_validate_bandwidth +ffffffff820c4d30 T dcn20_acquire_free_pipe_for_layer +ffffffff820c4e50 T dcn20_get_dcc_compression_cap +ffffffff820c4e80 T dcn20_patch_unknown_plane_state +ffffffff820c4ee0 T dcn20_dwbc_create +ffffffff820c4ff0 T dcn20_mmhubbub_create +ffffffff820c5150 T dcn20_create_resource_pool +ffffffff820c68f0 t dcn20_resource_destruct +ffffffff820c6da0 t dcn20_destroy_resource_pool +ffffffff820c6e00 t dcn20_panel_cntl_create +ffffffff820c6e90 t read_dce_straps +ffffffff820c6ec0 t dcn20_create_audio +ffffffff820c7000 T enc2_set_dynamic_metadata +ffffffff820c7260 T enc2_stream_encoder_dp_unblank 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+ffffffff820dd4d0 T dcn21_set_backlight_level +ffffffff820dd6d0 T dcn21_is_abm_supported +ffffffff820de000 T dcn21_hw_sequencer_construct +ffffffff820df000 T dcn21_link_encoder_enable_dp_output +ffffffff820df140 t dcn21_link_encoder_acquire_phy +ffffffff820df320 T dcn21_link_encoder_construct +ffffffff820df500 t dcn21_link_encoder_enable_dp_mst_output +ffffffff820df570 t dcn21_link_encoder_disable_output +ffffffff820e0000 T dcn21_fast_validate_bw +ffffffff820e06a0 T dcn21_create_resource_pool +ffffffff820e19d0 t dcn21_resource_destruct +ffffffff820e1e70 t dcn21_destroy_resource_pool +ffffffff820e1ed0 t dcn21_panel_cntl_create +ffffffff820e1f60 t dcn21_link_encoder_create +ffffffff820e2060 t dcn21_validate_bandwidth +ffffffff820e20e0 t dcn21_patch_unknown_plane_state +ffffffff820e2130 t dcn21_get_panel_config_defaults +ffffffff820e2170 t read_dce_straps +ffffffff820e21a0 t dcn21_create_audio +ffffffff820e21d0 t dcn21_stream_encoder_create +ffffffff820e2270 t dcn21_hwseq_create +ffffffff820e3000 T afmt3_setup_hdmi_audio +ffffffff820e31d0 T afmt3_se_audio_setup +ffffffff820e3370 T afmt3_audio_mute_control +ffffffff820e33e0 T afmt3_audio_info_immediate_update +ffffffff820e3420 T afmt3_setup_dp_audio +ffffffff820e3510 T afmt3_construct +ffffffff820e4000 T cm_helper_program_gamcor_xfer_func +ffffffff820e43c0 T cm3_helper_translate_curve_to_hw_format +ffffffff820e4fd0 T cm3_helper_convert_to_custom_float +ffffffff820e5420 T cm3_helper_translate_curve_to_degamma_hw_format +ffffffff820e5c40 T is_rgb_equal +ffffffff820e6000 T dccg3_create +ffffffff820e60b0 T dccg30_create +ffffffff820e7000 T dcn30_link_encoder_validate_output_with_stream +ffffffff820e7010 T dcn30_link_encoder_construct +ffffffff820e71f0 T enc3_hw_init +ffffffff820e8000 T enc3_stream_encoder_update_hdmi_info_packets +ffffffff820e8100 t enc3_update_hdmi_info_packet +ffffffff820e84f0 T enc3_stream_encoder_stop_hdmi_info_packets +ffffffff820e8ad0 T enc3_dp_set_dsc_pps_info_packet +ffffffff820e8df0 T enc3_stream_encoder_update_dp_info_packets_sdp_line_num +ffffffff820e8eb0 T enc3_stream_encoder_update_dp_info_packets +ffffffff820e9170 T enc3_audio_mute_control +ffffffff820e91e0 T enc3_se_dp_audio_setup +ffffffff820e9260 T enc3_se_dp_audio_enable +ffffffff820e9350 T enc3_se_hdmi_audio_setup +ffffffff820e9660 T dcn30_dio_stream_encoder_construct +ffffffff820e96d0 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff820e9cd0 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff820e9ed0 t enc3_read_state +ffffffff820ea060 t enc3_dp_set_dsc_config +ffffffff820ea130 t enc3_dp_set_odm_combine +ffffffff820eb000 T dpp30_read_state +ffffffff820eb050 T dpp3_program_post_csc +ffffffff820eb240 T dpp3_set_pre_degam +ffffffff820eb2f0 T dpp3_cnv_setup +ffffffff820ebbc0 T dpp3_set_cursor_attributes +ffffffff820ebd30 T dpp3_get_optimal_number_of_taps +ffffffff820ec750 T dpp3_construct +ffffffff820ec7b0 t dpp3_deferred_update +ffffffff820ecb90 t dpp3_program_blnd_lut +ffffffff820ed5e0 t dpp3_program_shaper +ffffffff820ef660 t dpp3_program_3dlut +ffffffff820efe10 t dpp3_set3dlut_ram12 +ffffffff820f0000 T dpp3_program_cm_dealpha +ffffffff820f00a0 T dpp3_program_cm_bias +ffffffff820f0190 T dpp3_program_gamcor_lut +ffffffff820f0bb0 t dpp3_power_on_gamcor_lut +ffffffff820f0ce0 T dpp3_set_hdr_multiplier +ffffffff820f0d30 T dpp3_cm_set_gamut_remap +ffffffff820f1000 T dwb3_config_fc +ffffffff820f11b0 T dwb3_set_stereo +ffffffff820f1270 T dwb3_enable +ffffffff820f13a0 T dwb3_set_denorm +ffffffff820f14c0 T dwb3_disable +ffffffff820f1570 T dwb3_update +ffffffff820f16a0 T dwb3_is_enabled +ffffffff820f1740 T dwb3_set_new_content +ffffffff820f1780 T dcn30_dwbc_construct +ffffffff820f17d0 T dwb3_set_host_read_rate_control +ffffffff820f1840 t dwb3_get_caps +ffffffff820f2000 T dwb3_ogam_set_input_transfer_func +ffffffff820f29f0 T dwb3_set_gamut_remap +ffffffff820f2ca0 T dwb3_program_hdr_mult +ffffffff820f3000 T hubbub3_init_dchub_sys_ctx +ffffffff820f31c0 T hubbub3_program_watermarks +ffffffff820f32c0 T hubbub3_dcc_support_swizzle +ffffffff820f3380 T hubbub3_get_dcc_compression_cap +ffffffff820f3560 T hubbub3_force_wm_propagate_to_pipes +ffffffff820f3610 T hubbub3_force_pstate_change_control +ffffffff820f3690 T hubbub3_init_watermarks +ffffffff820f39d0 T hubbub3_construct +ffffffff820f4000 T hubp3_set_vm_system_aperture_settings +ffffffff820f4130 T hubp3_program_surface_flip_and_addr +ffffffff820f4b20 T hubp3_dcc_control +ffffffff820f4be0 T hubp3_dcc_control_sienna_cichlid +ffffffff820f4d00 T hubp3_dmdata_set_attributes +ffffffff820f4f00 T hubp3_program_surface_config +ffffffff820f51f0 T hubp3_read_state +ffffffff820f54c0 T hubp3_setup +ffffffff820f5550 T hubp3_init +ffffffff820f5580 T hubp3_construct +ffffffff820f6000 T dcn30_set_blend_lut +ffffffff820f6070 T dcn30_set_input_transfer_func +ffffffff820f61d0 T dcn30_set_output_transfer_func +ffffffff820f6500 T dcn30_update_writeback +ffffffff820f6590 t dcn30_set_writeback +ffffffff820f6740 T dcn30_mmhubbub_warmup +ffffffff820f6990 T dcn30_enable_writeback +ffffffff820f6a40 T dcn30_disable_writeback +ffffffff820f6b20 T dcn30_program_all_writeback_pipes_in_tree +ffffffff820f6e20 T dcn30_init_hw +ffffffff820f7550 T dcn30_set_avmute +ffffffff820f75b0 T dcn30_update_info_frame +ffffffff820f76a0 T dcn30_program_dmdata_engine +ffffffff820f7740 T dcn30_apply_idle_power_optimizations +ffffffff820f7c60 T dcn30_does_plane_fit_in_mall +ffffffff820f7d10 T dcn30_hardware_release +ffffffff820f7e00 T dcn30_set_disp_pattern_generator +ffffffff820f7e70 T dcn30_prepare_bandwidth +ffffffff820f7f60 T dcn30_set_static_screen_control +ffffffff820f8000 T dcn30_hw_sequencer_construct +ffffffff820f9000 T dcn30_mmhubbub_construct +ffffffff820f9050 t mmhubbub3_warmup_mcif +ffffffff820f9260 t mmhubbub3_config_mcif_buf +ffffffff820f9710 t mmhubbub3_config_mcif_arb +ffffffff820fa000 T mpc3_is_dwb_idle +ffffffff820fa070 T mpc3_set_dwb_mux +ffffffff820fa0f0 T mpc3_disable_dwb_mux +ffffffff820fa170 T mpc3_set_out_rate_control +ffffffff820fa280 T mpc3_get_ogam_current +ffffffff820fa320 T mpc3_power_on_ogam_lut +ffffffff820fa3f0 T mpc3_set_output_gamma +ffffffff820fb030 T mpc3_set_denorm +ffffffff820fb0a0 T mpc3_set_denorm_clamp +ffffffff820fb1f0 T mpc3_program_shaper +ffffffff820fd3b0 t mpc3_power_on_shaper_3dlut +ffffffff820fd730 T mpc3_init_mpcc +ffffffff820fd7b0 T mpc3_set_gamut_remap +ffffffff820fda20 T mpc3_program_3dlut +ffffffff820fe190 t mpc3_set3dlut_ram12 +ffffffff820fe370 T mpc3_set_output_csc +ffffffff820fe4e0 T mpc3_set_ocsc_default +ffffffff820fe650 T mpc3_set_rmu_mux +ffffffff820fe6f0 T mpc3_get_rmu_mux_status +ffffffff820fe7a0 T mpcc3_acquire_rmu +ffffffff820fe900 T dcn30_mpc_construct +ffffffff820fe9d0 t mpcc3_release_rmu +ffffffff820feb40 t mpc3_set_mpc_mem_lp_mode +ffffffff820ff000 T optc3_triplebuffer_lock +ffffffff820ff120 T optc3_lock_doublebuffer_enable +ffffffff820ff3b0 T optc3_lock_doublebuffer_disable +ffffffff820ff4d0 T optc3_lock +ffffffff820ff5a0 T optc3_set_out_mux +ffffffff820ff5e0 T optc3_program_blank_color +ffffffff820ff710 T optc3_set_drr_trigger_window +ffffffff820ff7a0 T optc3_set_vtotal_change_limit +ffffffff820ff810 T optc3_set_dsc_config +ffffffff820ff860 T optc3_set_odm_bypass +ffffffff820ff9e0 T optc3_set_odm_combine +ffffffff820ffd30 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff820ffdb0 T optc3_set_vtotal_min_max +ffffffff820ffdf0 T optc3_tg_init +ffffffff820ffe50 T dcn30_timing_generator_init +ffffffff82100000 T dcn30_add_stream_to_ctx +ffffffff82100020 T dcn30_populate_dml_pipes_from_context +ffffffff82100100 T dcn30_populate_dml_writeback_from_context +ffffffff82100160 T dcn30_calc_max_scaled_time +ffffffff821001c0 T dcn30_set_mcif_arb_params +ffffffff82100330 T dcn30_acquire_post_bldn_3dlut +ffffffff821004c0 T dcn30_release_post_bldn_3dlut +ffffffff82100570 T dcn30_internal_validate_bw +ffffffff821012e0 t dcn30_split_stream_for_mpc_or_odm +ffffffff82101600 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff821016e0 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82101780 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff82101820 T dcn30_update_soc_for_wm_a +ffffffff82101870 T dcn30_calculate_wm_and_dlg +ffffffff821018e0 T dcn30_validate_bandwidth +ffffffff82101d10 T dcn30_update_bw_bounding_box +ffffffff82102370 T dcn30_create_resource_pool +ffffffff82103920 t dcn30_resource_destruct +ffffffff82103ea0 t dcn30_destroy_resource_pool +ffffffff82103f00 t dcn30_panel_cntl_create +ffffffff82103f90 t dcn30_link_encoder_create +ffffffff82104040 t dcn30_get_panel_config_defaults +ffffffff821040c0 t read_dce_straps +ffffffff821040f0 t dcn30_create_audio +ffffffff82104120 t dcn30_stream_encoder_create +ffffffff821042a0 t dcn30_hwseq_create +ffffffff82105000 T vpg3_update_generic_info_packet +ffffffff821059a0 T vpg3_construct +ffffffff82106000 T dccg301_create +ffffffff82107000 T dcn301_link_encoder_construct +ffffffff82108000 T hubbub301_construct +ffffffff82109000 T dcn301_hw_sequencer_construct +ffffffff8210a000 T optc301_set_drr +ffffffff8210a230 T optc301_setup_manual_trigger +ffffffff8210a350 T dcn301_timing_generator_init +ffffffff8210b000 T dcn301_panel_cntl_construct +ffffffff8210b050 t dcn301_panel_cntl_destroy +ffffffff8210b0a0 t dcn301_panel_cntl_hw_init +ffffffff8210b2b0 t dcn301_is_panel_backlight_on +ffffffff8210b310 t dcn301_is_panel_powered_on +ffffffff8210b3c0 t dcn301_store_backlight_level +ffffffff8210b460 t dcn301_get_16_bit_backlight_from_pwm +ffffffff8210c000 T dcn301_create_resource_pool +ffffffff8210d590 t dcn301_destruct +ffffffff8210dad0 t dcn301_destroy_resource_pool +ffffffff8210db30 t dcn301_panel_cntl_create +ffffffff8210dbc0 t dcn301_link_encoder_create +ffffffff8210dc70 t dcn301_calculate_wm_and_dlg +ffffffff8210dce0 t read_dce_straps +ffffffff8210dd10 t dcn301_create_audio +ffffffff8210dd40 t dcn301_stream_encoder_create +ffffffff8210dec0 t dcn301_hwseq_create +ffffffff8210e000 T dcn302_dpp_pg_control +ffffffff8210e2a0 T dcn302_hubp_pg_control +ffffffff8210e550 T dcn302_dsc_pg_control +ffffffff8210f000 T dcn302_hw_sequencer_construct +ffffffff82110000 T dcn302_update_bw_bounding_box +ffffffff82110050 T dcn302_create_resource_pool +ffffffff821114a0 t dcn302_resource_destruct +ffffffff821119e0 t dcn302_destroy_resource_pool +ffffffff82111a30 t dcn302_panel_cntl_create +ffffffff82111ac0 t dcn302_link_encoder_create +ffffffff82111b70 t dcn302_get_panel_config_defaults +ffffffff82111bf0 t read_dce_straps +ffffffff82111c20 t dcn302_create_audio +ffffffff82111c50 t dcn302_stream_encoder_create +ffffffff82111dd0 t dcn302_hwseq_create +ffffffff82112000 T dcn303_dpp_pg_control +ffffffff82112030 T dcn303_hubp_pg_control +ffffffff82112060 T dcn303_dsc_pg_control +ffffffff82112090 T dcn303_enable_power_gating_plane +ffffffff82113000 T dcn303_hw_sequencer_construct +ffffffff82114000 T dcn303_update_bw_bounding_box +ffffffff82114050 T dcn303_create_resource_pool +ffffffff821152a0 t dcn303_resource_destruct +ffffffff821157e0 t dcn303_destroy_resource_pool +ffffffff82115830 t dcn303_panel_cntl_create +ffffffff821158c0 t dcn303_link_encoder_create +ffffffff82115970 t dcn303_get_panel_config_defaults +ffffffff821159f0 t read_dce_straps +ffffffff82115a20 t dcn303_create_audio +ffffffff82115a50 t dcn303_stream_encoder_create +ffffffff82115bd0 t dcn303_hwseq_create +ffffffff82116000 T afmt31_powerdown +ffffffff82116090 T afmt31_poweron +ffffffff82116120 T afmt31_construct +ffffffff82117000 T apg31_construct +ffffffff82117050 t apg31_se_audio_setup +ffffffff82117160 t apg31_enable +ffffffff82117270 t apg31_disable +ffffffff82118000 T dccg31_update_dpp_dto +ffffffff82118160 T dccg31_set_dpstreamclk +ffffffff821182f0 t dccg31_disable_dpstreamclk +ffffffff82118440 T dccg31_enable_symclk32_se +ffffffff82118740 T dccg31_disable_symclk32_se +ffffffff82118a10 T dccg31_enable_symclk32_le +ffffffff82118b20 T dccg31_disable_symclk32_le +ffffffff82118c10 T dccg31_set_symclk32_le_root_clock_gating +ffffffff82118d20 T dccg31_disable_dscclk +ffffffff82118f70 T dccg31_enable_dscclk +ffffffff821191e0 T dccg31_set_physymclk +ffffffff821196f0 T dccg31_set_dtbclk_dto +ffffffff821199a0 T dccg31_set_audio_dtbclk_dto +ffffffff82119ab0 T dccg31_get_dccg_ref_freq +ffffffff82119ae0 T dccg31_set_dispclk_change_mode +ffffffff82119b30 T dccg31_init +ffffffff8211a110 T dccg31_otg_add_pixel +ffffffff8211a150 T dccg31_otg_drop_pixel +ffffffff8211a190 T dccg31_create +ffffffff8211b000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff8211b390 T dcn31_link_encoder_construct +ffffffff8211b560 T dcn31_link_encoder_construct_minimal +ffffffff8211b5e0 T dcn31_link_encoder_enable_dp_output +ffffffff8211b820 T dcn31_link_encoder_enable_dp_mst_output +ffffffff8211ba60 T dcn31_link_encoder_disable_output +ffffffff8211bcd0 T dcn31_link_encoder_is_in_alt_mode +ffffffff8211be20 T dcn31_link_encoder_get_max_link_cap +ffffffff8211bfa0 t enc31_hw_init +ffffffff8211c000 T dcn31_hpo_dp_link_enc_enable +ffffffff8211c160 T dcn31_hpo_dp_link_enc_disable +ffffffff8211c1d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff8211cb30 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff8211cdb0 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff8211d050 T dcn31_hpo_dp_link_enc_read_state +ffffffff8211d2f0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff8211d3f0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff8211d530 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff8211d620 T hpo_dp_link_encoder31_construct +ffffffff8211d680 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff8211e000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff8211e070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff8211e1b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff8211e460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff8211e560 t dcn31_hpo_dp_stream_enc_disable +ffffffff8211e5d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff8211ee80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num +ffffffff8211ef40 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff8211f160 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff8211f2f0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff8211f590 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff8211f690 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff8211f740 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff8211f810 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff8211f9c0 t dcn31_hpo_dp_stream_enc_read_state +ffffffff8211fb50 t dcn31_set_hblank_min_symbol_width +ffffffff82120000 T hubbub31_init_dchub_sys_ctx +ffffffff821201e0 T hubbub31_init +ffffffff82120280 T hubbub31_construct +ffffffff82120320 t hubbub31_get_dcc_compression_cap +ffffffff82120500 t hubbub31_get_dchub_ref_freq +ffffffff821205e0 t hubbub31_program_watermarks +ffffffff82121f00 t hubbub31_verify_allow_pstate_change_high +ffffffff821220c0 t dcn31_program_det_size +ffffffff821222a0 t dcn31_program_compbuf_size +ffffffff82122520 t dcn31_init_crb +ffffffff82123000 T hubp31_set_unbounded_requesting +ffffffff82123090 T hubp31_soft_reset +ffffffff821230e0 T hubp31_construct +ffffffff82123150 t hubp31_program_extended_blank +ffffffff82124000 T dcn31_init_hw +ffffffff82124850 T dcn31_dsc_pg_control +ffffffff82124ba0 T dcn31_enable_power_gating_plane +ffffffff82124e00 T dcn31_update_info_frame +ffffffff82124f30 T dcn31_z10_save_init +ffffffff82124fc0 T dcn31_z10_restore +ffffffff82125070 T dcn31_hubp_pg_control +ffffffff82125390 T dcn31_init_sys_ctx +ffffffff82125440 T dcn31_reset_hw_ctx_wrap +ffffffff82125790 T dcn31_setup_hpo_hw_control +ffffffff82126000 T dcn31_hw_sequencer_construct +ffffffff82127000 T optc31_immediate_disable_crtc +ffffffff82127100 T optc31_set_drr +ffffffff82127310 T optc3_init_odm +ffffffff82127480 T dcn31_timing_generator_init +ffffffff821274f0 t optc31_enable_crtc +ffffffff821275f0 t optc31_disable_crtc +ffffffff821276d0 t optc31_set_odm_combine +ffffffff82128000 T dcn31_panel_cntl_construct +ffffffff82128040 t dcn31_panel_cntl_destroy +ffffffff82128090 t dcn31_panel_cntl_hw_init +ffffffff82128190 t dcn31_is_panel_backlight_on +ffffffff82128230 t dcn31_is_panel_powered_on +ffffffff821282e0 t dcn31_store_backlight_level +ffffffff821283b0 t dcn31_get_16_bit_backlight_from_pwm +ffffffff82129000 T dcn31x_populate_dml_pipes_from_context +ffffffff82129180 T dcn31_populate_dml_pipes_from_context +ffffffff821295c0 T dcn31_calculate_wm_and_dlg +ffffffff82129630 T dcn31_populate_dml_writeback_from_context +ffffffff82129690 T dcn31_set_mcif_arb_params +ffffffff821296f0 T dcn31_validate_bandwidth +ffffffff82129ae0 T dcn31_create_resource_pool +ffffffff8212ae80 t dcn31_resource_destruct +ffffffff8212b4f0 t dcn31_destroy_resource_pool +ffffffff8212b550 t dcn31_panel_cntl_create +ffffffff8212b5c0 t dcn31_link_encoder_create +ffffffff8212b670 t dcn31_link_enc_create_minimal +ffffffff8212b710 t dcn31_get_panel_config_defaults +ffffffff8212b750 t read_dce_straps +ffffffff8212b780 t dcn31_create_audio +ffffffff8212b7b0 t dcn31_stream_encoder_create +ffffffff8212b930 t dcn31_hpo_dp_stream_encoder_create +ffffffff8212baf0 t dcn31_hpo_dp_link_encoder_create +ffffffff8212bb80 t dcn31_hwseq_create +ffffffff8212c000 T vpg31_powerdown +ffffffff8212c090 T vpg31_poweron +ffffffff8212c120 T vpg31_construct +ffffffff8212d000 T dccg314_create +ffffffff8212d0b0 t dccg314_init +ffffffff8212d210 t dccg314_set_dpstreamclk +ffffffff8212d5d0 t dccg314_set_dtbclk_dto +ffffffff8212d7c0 t dccg314_set_pixel_rate_div +ffffffff8212db30 t dccg314_set_valid_pixel_rate +ffffffff8212dba0 t dccg314_trigger_dio_fifo_resync +ffffffff8212dc40 t dccg314_dpp_root_clock_control +ffffffff8212e000 T dcn314_dio_stream_encoder_construct +ffffffff8212e070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff8212e670 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff8212e880 t enc314_stream_encoder_dp_blank +ffffffff8212e900 t enc314_stream_encoder_dp_unblank +ffffffff8212ec80 t enc314_read_state +ffffffff8212ede0 t enc314_dp_set_dsc_config +ffffffff8212ee30 t enc314_dp_set_odm_combine +ffffffff8212ee70 t enc314_set_dig_input_mode +ffffffff8212eec0 t enc314_enable_fifo +ffffffff8212ef60 t enc314_disable_fifo +ffffffff8212efb0 t enc314_reset_fifo +ffffffff82130000 T dcn314_update_odm +ffffffff82130600 T dcn314_dsc_pg_control +ffffffff821309d0 T dcn314_enable_power_gating_plane +ffffffff82130c60 T dcn314_calculate_dccg_k1_k2_values +ffffffff82130e10 T dcn314_set_pixels_per_cycle +ffffffff82130f00 T dcn314_resync_fifo_dccg_dio +ffffffff821310a0 T dcn314_dpp_root_clock_control +ffffffff82131100 T dcn314_disable_link_output +ffffffff82132000 T dcn314_hw_sequencer_construct +ffffffff82133000 T dcn314_timing_generator_init +ffffffff82133070 t optc314_enable_crtc +ffffffff82133170 t optc314_disable_crtc +ffffffff82133250 t optc314_phantom_crtc_post_enable +ffffffff82133310 t optc314_set_odm_bypass +ffffffff82133480 t optc314_set_odm_combine +ffffffff82133770 t optc314_set_h_timing_div_manual_mode +ffffffff82134000 T dcn314_validate_bandwidth +ffffffff82134490 T dcn314_create_resource_pool +ffffffff821357b0 t dcn314_resource_destruct +ffffffff82135e20 t dcn314_get_preferred_eng_id_dpia +ffffffff82135e50 t dcn314_destroy_resource_pool +ffffffff82135eb0 t dcn31_panel_cntl_create +ffffffff82135f20 t dcn31_link_encoder_create +ffffffff82135fd0 t dcn31_link_enc_create_minimal +ffffffff82136070 t dcn314_populate_dml_pipes_from_context +ffffffff82136100 t dcn314_update_bw_bounding_box +ffffffff82136150 t dcn314_get_panel_config_defaults +ffffffff82136190 t read_dce_straps +ffffffff821361c0 t dcn31_create_audio +ffffffff821361f0 t dcn314_stream_encoder_create +ffffffff82136370 t dcn31_hpo_dp_stream_encoder_create +ffffffff82136530 t dcn31_hpo_dp_link_encoder_create +ffffffff821365c0 t dcn314_hwseq_create +ffffffff82137000 T dcn315_create_resource_pool +ffffffff82138280 t dcn315_resource_destruct +ffffffff821388e0 t dcn315_destroy_resource_pool +ffffffff82138940 t dcn31_panel_cntl_create +ffffffff821389b0 t dcn31_link_encoder_create +ffffffff82138a60 t dcn31_link_enc_create_minimal +ffffffff82138b00 t dcn315_populate_dml_pipes_from_context +ffffffff82139200 t dcn315_get_panel_config_defaults +ffffffff82139240 t read_dce_straps +ffffffff82139270 t dcn31_create_audio +ffffffff821392a0 t dcn315_stream_encoder_create +ffffffff82139420 t dcn31_hpo_dp_stream_encoder_create +ffffffff821395e0 t dcn31_hpo_dp_link_encoder_create +ffffffff82139670 t dcn31_hwseq_create +ffffffff8213a000 T dcn316_create_resource_pool +ffffffff8213b290 t dcn316_resource_destruct +ffffffff8213b8f0 t dcn316_destroy_resource_pool +ffffffff8213b950 t dcn31_panel_cntl_create +ffffffff8213b9c0 t dcn31_link_encoder_create +ffffffff8213ba70 t dcn31_link_enc_create_minimal +ffffffff8213bb10 t dcn316_populate_dml_pipes_from_context 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enc32_stream_encoder_dp_unblank +ffffffff8213f500 T enc32_enable_fifo +ffffffff8213f5a0 t enc32_reset_fifo +ffffffff8213f6a0 T dcn32_dio_stream_encoder_construct +ffffffff8213f710 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff8213fc90 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff8213fe10 t enc32_read_state +ffffffff8213ff70 t enc32_dp_set_dsc_config +ffffffff8213ffc0 t enc32_dp_set_odm_combine +ffffffff82140000 t enc32_set_dig_input_mode +ffffffff82141000 T dpp32_construct +ffffffff82141060 t dscl32_calc_lb_num_partitions +ffffffff82142000 T hpo_dp_link_encoder32_construct +ffffffff82142060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff82143000 T hubbub32_set_request_limit +ffffffff82143130 T dcn32_program_det_size +ffffffff821432d0 T hubbub32_program_urgent_watermarks +ffffffff82143a40 T hubbub32_program_stutter_watermarks +ffffffff82143e90 T hubbub32_program_pstate_watermarks +ffffffff82144320 T hubbub32_program_usr_watermarks +ffffffff82144580 T hubbub32_force_usr_retraining_allow +ffffffff82144600 T hubbub32_force_wm_propagate_to_pipes +ffffffff821446a0 T hubbub32_init +ffffffff821447e0 T hubbub32_construct +ffffffff82144860 t hubbub32_wm_read_state +ffffffff82144c80 t hubbub32_program_watermarks +ffffffff82144d90 t hubbub32_init_watermarks +ffffffff821451d0 t dcn32_program_compbuf_size +ffffffff82145460 t dcn32_init_crb +ffffffff82146000 T hubp32_update_force_pstate_disallow +ffffffff82146090 T hubp32_update_force_cursor_pstate_disallow +ffffffff82146120 T hubp32_update_mall_sel +ffffffff821461b0 T hubp32_prepare_subvp_buffering +ffffffff82146250 T hubp32_phantom_hubp_post_enable +ffffffff82146360 T hubp32_cursor_set_attributes +ffffffff82146620 T hubp32_init +ffffffff82146650 T hubp32_construct +ffffffff82147000 T dcn32_dsc_pg_control +ffffffff82147320 T dcn32_enable_power_gating_plane +ffffffff82147590 T dcn32_hubp_pg_control +ffffffff82147800 T dcn32_apply_idle_power_optimizations +ffffffff82147af0 T dcn32_commit_subvp_config +ffffffff82147ba0 T dcn32_subvp_pipe_control_lock +ffffffff82147d70 T dcn32_subvp_pipe_control_lock_fast +ffffffff82147df0 T dcn32_set_mpc_shaper_3dlut +ffffffff82147f10 T dcn32_set_mcm_luts +ffffffff821480a0 T dcn32_set_input_transfer_func +ffffffff821481e0 T dcn32_set_output_transfer_func +ffffffff82148420 T dcn32_update_force_pstate +ffffffff82148640 T dcn32_update_mall_sel +ffffffff82148830 T dcn32_program_mall_pipe_config +ffffffff82148920 T dcn32_init_hw +ffffffff821491e0 T dcn32_update_odm +ffffffff821497e0 T dcn32_calculate_dccg_k1_k2_values +ffffffff82149a10 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff82149ab0 T dcn32_set_pixels_per_cycle +ffffffff82149bf0 T dcn32_resync_fifo_dccg_dio +ffffffff82149d90 T dcn32_unblank_stream +ffffffff82149fa0 T dcn32_disable_link_output +ffffffff8214a310 T dcn32_update_phantom_vp_position +ffffffff8214a420 T dcn32_apply_update_flags_for_phantom +ffffffff8214a4a0 T dcn32_dsc_pg_status +ffffffff8214a580 T dcn32_update_dsc_pg +ffffffff8214a680 T dcn32_enable_phantom_streams +ffffffff8214a7c0 T dcn32_init_blank +ffffffff8214aa00 T dcn32_blank_phantom +ffffffff8214ab80 T dcn32_is_pipe_topology_transition_seamless +ffffffff8214b000 T dcn32_hw_sequencer_init_functions +ffffffff8214c000 T dcn32_mmhubbub_construct +ffffffff8214c050 t mmhubbub32_warmup_mcif +ffffffff8214c260 t mmhubbub32_config_mcif_buf +ffffffff8214c710 t mmhubbub32_config_mcif_arb +ffffffff8214d000 T mpc32_mpc_init +ffffffff8214d1e0 T mpc32_power_on_blnd_lut +ffffffff8214d350 T mpc32_configure_post1dlut +ffffffff8214d450 T mpc32_program_post1dluta_settings +ffffffff8214d660 T mpc32_program_post1dlutb_settings +ffffffff8214d870 T mpc32_program_post1dlut_pwl +ffffffff8214dca0 T mpc32_program_post1dlut +ffffffff8214dfb0 T mpc32_configure_shaper_lut +ffffffff8214e0d0 T mpc32_program_shaper_luta_settings +ffffffff8214ef60 T mpc32_program_shaper_lutb_settings +ffffffff8214fdf0 T mpc32_program_shaper_lut +ffffffff8214ff90 T mpc32_power_on_shaper_3dlut +ffffffff821501c0 T mpc32_program_shaper +ffffffff821504e0 T mpc32_select_3dlut_ram +ffffffff82150590 T mpc32_select_3dlut_ram_mask +ffffffff82150660 T mpc32_set3dlut_ram12 +ffffffff82150860 T mpc32_set3dlut_ram10 +ffffffff82150930 T mpc32_program_3dlut +ffffffff82151300 T dcn32_mpc_construct +ffffffff82152000 T optc32_set_h_timing_div_manual_mode +ffffffff82152040 T dcn32_timing_generator_init +ffffffff821520b0 t optc32_enable_crtc +ffffffff821521b0 t optc32_disable_crtc +ffffffff82152290 t optc32_phantom_crtc_post_enable +ffffffff82152350 t optc32_disable_phantom_otg +ffffffff82152390 t optc32_set_drr +ffffffff82152550 t optc32_set_odm_bypass +ffffffff821526c0 t optc32_set_odm_combine +ffffffff82153000 T dcn32_panel_cntl_create +ffffffff82153070 T dcn32_acquire_post_bldn_3dlut +ffffffff82153160 T dcn32_release_post_bldn_3dlut +ffffffff82153210 T dcn32_retain_phantom_pipes +ffffffff821532f0 T dcn32_remove_phantom_pipes +ffffffff82153460 T dcn32_add_phantom_pipes +ffffffff82153890 T dcn32_validate_bandwidth +ffffffff82153d70 T dcn32_populate_dml_pipes_from_context +ffffffff821541a0 T dcn32_calculate_wm_and_dlg +ffffffff82154210 T dcn32_create_resource_pool +ffffffff821542c0 t dcn32_resource_construct +ffffffff8215f800 T dcn32_acquire_free_pipe_as_secondary_dpp_pipe +ffffffff8215fb00 T dcn32_calc_num_avail_chans_for_mall +ffffffff8215fb70 t dcn32_mpc_create +ffffffff821641d0 t dcn32_dwbc_create +ffffffff82164bd0 t dcn32_mmhubbub_create +ffffffff82165080 t dcn32_resource_destruct +ffffffff82165710 t dcn32_destroy_resource_pool +ffffffff82165770 t dcn32_link_encoder_create +ffffffff82166840 t dcn32_update_bw_bounding_box +ffffffff82166890 t read_dce_straps +ffffffff821668c0 t dcn32_create_audio +ffffffff82166c40 t dcn32_stream_encoder_create +ffffffff82168a80 t dcn32_hpo_dp_stream_encoder_create +ffffffff82169860 t dcn32_hpo_dp_link_encoder_create +ffffffff82169cb0 t dcn32_hwseq_create +ffffffff8216a1a0 t dcn32_vpg_create +ffffffff8216b000 T dcn32_helper_mall_bytes_to_ways +ffffffff8216b060 T dcn32_helper_calculate_mall_bytes_for_cursor +ffffffff8216b100 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff8216b180 T dcn32_merge_pipes_for_subvp +ffffffff8216b340 T dcn32_all_pipes_have_stream_and_plane +ffffffff8216b3d0 T dcn32_subvp_in_use +ffffffff8216b460 T dcn32_mpo_in_use +ffffffff8216b4d0 T dcn32_any_surfaces_rotated +ffffffff8216b560 T dcn32_is_center_timing +ffffffff8216b5d0 T dcn32_is_psr_capable +ffffffff8216b620 T dcn32_determine_det_override +ffffffff8216b960 T dcn32_set_det_allocations +ffffffff8216baf0 T dcn32_save_mall_state +ffffffff8216bba0 T dcn32_restore_mall_state +ffffffff8216bc50 T dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8216be00 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff8216beb0 T dcn32_check_native_scaling_for_res +ffffffff8216bf10 T dcn32_subvp_drr_admissable +ffffffff8216c0d0 T dcn32_subvp_vblank_admissable +ffffffff8216d000 T dcn321_link_encoder_construct +ffffffff8216e000 T dcn321_create_resource_pool +ffffffff8216e0b0 t dcn321_resource_construct +ffffffff82179550 t dcn321_mpc_create +ffffffff8217dbb0 t dcn321_dwbc_create +ffffffff8217e5b0 t dcn321_mmhubbub_create +ffffffff8217ea60 t dcn321_resource_destruct +ffffffff8217f0f0 t dcn321_destroy_resource_pool +ffffffff8217f150 t dcn321_link_encoder_create +ffffffff82180220 t dcn321_update_bw_bounding_box +ffffffff82180270 t read_dce_straps +ffffffff821802a0 t dcn321_create_audio +ffffffff82180620 t dcn321_stream_encoder_create +ffffffff82182460 t dcn321_hpo_dp_stream_encoder_create +ffffffff82183240 t dcn321_hpo_dp_link_encoder_create +ffffffff82183690 t dcn321_hwseq_create +ffffffff82183b80 t dcn321_vpg_create +ffffffff82184000 T bw_int_to_fixed_nonconst +ffffffff82184090 T bw_frc_to_fixed +ffffffff82184260 T bw_floor2 +ffffffff82184310 T bw_ceil2 +ffffffff82184390 T bw_mul +ffffffff82185000 T convert_to_custom_float_format +ffffffff82186000 T bw_calcs_init +ffffffff82186e60 T bw_calcs +ffffffff82188800 t calculate_bandwidth +ffffffff82190000 T scaler_settings_calculation +ffffffff82190350 T mode_support_and_system_configuration +ffffffff82196180 T display_pipe_configuration +ffffffff82196ab0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff8219c000 T dcn_bw_mod +ffffffff8219c060 T dcn_bw_min2 +ffffffff8219c0a0 T dcn_bw_max +ffffffff8219c0d0 T dcn_bw_max2 +ffffffff8219c110 T dcn_bw_floor2 +ffffffff8219c1b0 T dcn_bw_floor +ffffffff8219c1e0 T dcn_bw_ceil +ffffffff8219c220 T dcn_bw_ceil2 +ffffffff8219c2d0 T dcn_bw_max3 +ffffffff8219c350 T dcn_bw_max5 +ffffffff8219c490 T dcn_bw_pow +ffffffff8219c520 T dcn_bw_fabs +ffffffff8219c560 T dcn_bw_log +ffffffff8219d000 T swizzle_mode_to_macro_tile_size +ffffffff8219d090 T dcn_validate_bandwidth +ffffffff8219f300 T dcn_bw_sync_calcs_and_dml +ffffffff8219f550 t dcn_bw_calc_rq_dlg_ttu +ffffffff8219fd20 T dcn_find_dcfclk_suits_all +ffffffff821a0180 T dcn_bw_update_from_pplib_fclks +ffffffff821a0300 T dcn_bw_update_from_pplib_dcfclks +ffffffff821a03d0 T dcn_get_soc_clks +ffffffff821a0450 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff821a1000 T dcn10_resource_construct_fp +ffffffff821a2000 T dcn20_populate_dml_writeback_from_context +ffffffff821a2180 T dcn20_fpu_set_wb_arb_params +ffffffff821a2330 T dcn20_calculate_dlg_params +ffffffff821a2b70 T dcn20_populate_dml_pipes_from_context +ffffffff821a3a80 T dcn20_calculate_wm +ffffffff821a4270 T dcn20_update_bounding_box +ffffffff821a44f0 T dcn20_cap_soc_clocks +ffffffff821a4850 T dcn20_patch_bounding_box +ffffffff821a4a40 T dcn20_validate_bandwidth_fp +ffffffff821a4be0 t dcn20_validate_bandwidth_internal +ffffffff821a4fe0 T dcn20_fpu_set_wm_ranges +ffffffff821a5080 T dcn20_fpu_adjust_dppclk +ffffffff821a5120 T dcn21_populate_dml_pipes_from_context +ffffffff821a5230 T dcn21_validate_bandwidth_fp +ffffffff821a5cc0 T dcn21_update_bw_bounding_box +ffffffff821a60d0 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff821a6130 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff821a6430 t calculate_wm_set_for_vlevel +ffffffff821a7000 T dml20_recalculate +ffffffff821a7740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821acbe0 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff821b4040 t TruncToValidBPP +ffffffff821b4220 t CalculateVMAndRowBytes +ffffffff821b48e0 t CalculatePrefetchSourceLines +ffffffff821b4ab0 t CalculateWriteBackDelay +ffffffff821b4d80 t CalculatePrefetchSchedule +ffffffff821b5c30 t CalculateFlipSchedule +ffffffff821b6000 t adjust_ReturnBW +ffffffff821b7000 T dml20v2_recalculate +ffffffff821b7740 t dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821bcd60 T dml20v2_ModeSupportAndSystemConfigurationFull +ffffffff821c4140 t TruncToValidBPP +ffffffff821c46d0 t CalculateVMAndRowBytes +ffffffff821c4d90 t CalculatePrefetchSourceLines +ffffffff821c4f60 t CalculateWriteBackDelay +ffffffff821c5230 t CalculateDelayAfterScaler +ffffffff821c5590 t CalculatePrefetchSchedule +ffffffff821c62b0 t CalculateFlipSchedule +ffffffff821c6680 t adjust_ReturnBW +ffffffff821c7000 T dml20_rq_dlg_get_rq_reg +ffffffff821c7490 t dml20_rq_dlg_get_rq_params +ffffffff821c7660 T dml20_rq_dlg_get_dlg_reg +ffffffff821c9550 t get_surf_rq_param +ffffffff821c9db0 t calculate_ttu_cursor +ffffffff821cb000 T dml20v2_rq_dlg_get_rq_reg +ffffffff821cb490 t dml20v2_rq_dlg_get_rq_params +ffffffff821cb660 T dml20v2_rq_dlg_get_dlg_reg +ffffffff821cd560 t get_surf_rq_param +ffffffff821cddc0 t calculate_ttu_cursor +ffffffff821cf000 T dml21_recalculate +ffffffff821cf710 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821d4ed0 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff821db380 t TruncToValidBPP +ffffffff821db910 t CalculateDCFCLKDeepSleep +ffffffff821dbc50 t CalculateVMAndRowBytes +ffffffff821dc4b0 t CalculatePrefetchSourceLines +ffffffff821dc680 t CalculateWriteBackDelay +ffffffff821dc950 t CalculatePrefetchSchedulePerPlane +ffffffff821dd190 t CalculateUrgentBurstFactor +ffffffff821dd5a0 t CalculateFlipSchedule +ffffffff821dda80 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821dea70 t CalculatePrefetchSchedule +ffffffff821e1000 T dml21_rq_dlg_get_rq_reg +ffffffff821e1490 t dml_rq_dlg_get_rq_params +ffffffff821e1660 T dml21_rq_dlg_get_dlg_reg +ffffffff821e3930 t get_surf_rq_param +ffffffff821e4250 t calculate_ttu_cursor +ffffffff821e5000 T optc3_fpu_set_vrr_m_const +ffffffff821e54a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff821e57b0 T dcn30_fpu_set_mcif_arb_params +ffffffff821e5920 T dcn30_fpu_update_soc_for_wm_a +ffffffff821e59f0 T dcn30_fpu_calculate_wm_and_dlg +ffffffff821e6480 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821e6670 T dcn30_fpu_update_dram_channel_width_bytes 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CalculateFlipSchedule +ffffffff821fa450 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821fb190 t CalculateSwathWidth +ffffffff821fc000 T dml30_rq_dlg_get_rq_reg +ffffffff821fc4b0 t dml_rq_dlg_get_rq_params +ffffffff821fc740 T dml30_rq_dlg_get_dlg_reg +ffffffff821fee10 t get_surf_rq_param +ffffffff821ff7a0 t calculate_ttu_cursor +ffffffff82200000 T dcn301_update_bw_bounding_box +ffffffff822002e0 T dcn301_fpu_set_wm_ranges +ffffffff82200380 T dcn301_fpu_init_soc_bounding_box +ffffffff82200420 T dcn301_calculate_wm_and_dlg_fp +ffffffff82200750 t calculate_wm_set_for_vlevel +ffffffff82201000 T dcn302_fpu_update_bw_bounding_box +ffffffff82201940 T dcn302_fpu_init_soc_bounding_box +ffffffff82202000 T dcn303_fpu_update_bw_bounding_box +ffffffff822029a0 T dcn303_fpu_init_soc_bounding_box +ffffffff82203000 T dcn31_zero_pipe_dcc_fraction +ffffffff82203060 T dcn31_update_soc_for_wm_a +ffffffff82203110 T dcn315_update_soc_for_wm_a +ffffffff822031e0 T dcn31_calculate_wm_and_dlg_fp +ffffffff82203840 T dcn31_update_bw_bounding_box +ffffffff82203be0 T dcn315_update_bw_bounding_box +ffffffff82203ed0 T dcn316_update_bw_bounding_box +ffffffff82204280 T dcn_get_max_non_odm_pix_rate_100hz +ffffffff822042e0 T dcn_get_approx_det_segs_required_for_pstate +ffffffff82205000 T dml31_recalculate +ffffffff822052d0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8220c190 T dml31_CalculateWriteBackDISPCLK +ffffffff8220c300 t dml_max3 +ffffffff8220c360 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff82214440 t CalculateSwathAndDETConfiguration +ffffffff82214aa0 t TruncToValidBPP +ffffffff82214cf0 t CalculateDCFCLKDeepSleep +ffffffff82215010 t CalculateVMAndRowBytes +ffffffff82215650 t CalculatePrefetchSourceLines +ffffffff82215820 t CalculateUrgentBurstFactor +ffffffff82215ab0 t UseMinimumDCFCLK +ffffffff82216a40 t CalculatePrefetchSchedulePerPlane +ffffffff822171a0 t CalculateFlipSchedule +ffffffff82217730 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82218350 t CalculateSwathWidth +ffffffff82218860 t CalculatePrefetchSchedule +ffffffff82219c40 t CalculateVupdateAndDynamicMetadataParameters +ffffffff8221a000 T dml31_rq_dlg_get_rq_reg +ffffffff8221a4b0 t dml_rq_dlg_get_rq_params +ffffffff8221a740 T dml31_rq_dlg_get_dlg_reg +ffffffff8221d100 t get_surf_rq_param +ffffffff8221e000 T dcn314_update_bw_bounding_box_fpu +ffffffff8221e3f0 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff8221f000 T dml314_recalculate +ffffffff8221f270 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82226050 T dml314_CalculateWriteBackDISPCLK +ffffffff822261c0 t dml_max3 +ffffffff82226220 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff8222e5a0 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff8222e810 t CalculateSwathAndDETConfiguration +ffffffff8222ee50 t TruncToValidBPP +ffffffff8222f0a0 t CalculateDCFCLKDeepSleep +ffffffff8222f3c0 t CalculateVMAndRowBytes +ffffffff8222fa00 t CalculatePrefetchSourceLines +ffffffff8222fbd0 t CalculateUrgentBurstFactor +ffffffff8222fe60 t CalculateMaxVStartup +ffffffff8222ffa0 t UseMinimumDCFCLK +ffffffff82230f30 t CalculatePrefetchSchedulePerPlane +ffffffff82231690 t CalculateFlipSchedule +ffffffff82231c20 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82232840 t CalculateSwathWidth +ffffffff82232d50 t CalculatePrefetchSchedule +ffffffff82234130 t CalculateVupdateAndDynamicMetadataParameters +ffffffff82235000 T dml314_rq_dlg_get_rq_reg +ffffffff822354b0 t dml_rq_dlg_get_rq_params +ffffffff82235740 T dml314_rq_dlg_get_dlg_reg +ffffffff82238100 t get_surf_rq_param +ffffffff82239000 T dcn32_build_wm_range_table_fpu +ffffffff82239390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff82239540 T dcn32_internal_validate_bw +ffffffff8223b3b0 T dcn32_helper_populate_phantom_dlg_params +ffffffff8223b550 T dcn32_predict_pipe_split +ffffffff8223b780 T dcn32_set_phantom_stream_timing +ffffffff8223ba90 T dcn32_determine_max_vratio_prefetch +ffffffff8223bb70 t dcn32_split_stream_for_mpc_or_odm +ffffffff8223bf20 T dcn32_calculate_wm_and_dlg_fpu +ffffffff8223d650 T dcn32_patch_dpm_table +ffffffff8223d860 T dcn32_update_bw_bounding_box_fpu +ffffffff8223fed0 T dcn32_zero_pipe_dcc_fraction +ffffffff8223ff30 T dcn32_allow_subvp_with_active_margin +ffffffff82240000 T dcn32_allow_subvp_high_refresh_rate +ffffffff82240200 T dcn32_assign_fpo_vactive_candidate +ffffffff822402c0 T dcn32_find_vactive_pipe +ffffffff82240430 T dcn32_set_clock_limits +ffffffff82240480 T dcn32_override_min_req_memclk +ffffffff82240540 t subvp_drr_schedulable +ffffffff822407d0 t get_optimal_ntuple +ffffffff82241000 T dml32_recalculate +ffffffff82245320 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff8224d000 T dml32_dscceComputeDelay +ffffffff8224d140 T dml32_dscComputeDelay +ffffffff8224d180 T IsVertical +ffffffff8224d1b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff8224d4d0 t dml_max3 +ffffffff8224d530 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff8224d860 T dml32_CalculateSwathAndDETConfiguration +ffffffff8224e090 T dml32_CalculateSwathWidth +ffffffff8224e950 T dml32_UnboundedRequest +ffffffff8224e9c0 T dml32_CalculateDETBufferSize +ffffffff8224f000 T dml32_CalculateODMMode +ffffffff8224f780 T dml32_CalculateRequiredDispclk +ffffffff8224f940 T dml32_RoundToDFSGranularity +ffffffff8224f9d0 T dml32_CalculateOutputLink +ffffffff82250440 T dml32_TruncToValidBPP +ffffffff82250770 T dml32_CalculateDPPCLK +ffffffff82250910 T dml32_RequiredDTBCLK +ffffffff82250b60 t dml_max4 +ffffffff82250be0 T dml32_DSCDelayRequirement +ffffffff822510a0 T dml32_CalculateSurfaceSizeInMall +ffffffff82251bf0 T dml32_CalculateVMRowAndSwath +ffffffff82252a00 T dml32_CalculateVMAndRowBytes +ffffffff82253650 T dml32_CalculatePrefetchSourceLines +ffffffff822538a0 T dml32_CalculateMALLUseForStaticScreen +ffffffff822539e0 T dml32_CalculateRowBandwidth +ffffffff82253b40 T dml32_CalculateUrgentLatency +ffffffff82253bf0 T dml32_CalculateUrgentBurstFactor +ffffffff82253ea0 T dml32_CalculateDCFCLKDeepSleep +ffffffff822541f0 T dml32_CalculateWriteBackDelay +ffffffff82254350 T dml32_UseMinimumDCFCLK +ffffffff822553c0 T dml32_CalculateExtraLatencyBytes +ffffffff82255580 T dml32_CalculateTWait +ffffffff82255670 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff822558d0 T dml32_get_return_bw_mbps +ffffffff82255a90 T dml32_get_return_bw_mbps_vm_only +ffffffff82255b70 T dml32_CalculateExtraLatency +ffffffff82255d90 T dml32_CalculatePrefetchSchedule +ffffffff822573a0 T dml32_CalculateFlipSchedule +ffffffff82257900 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff82258a10 T dml32_CalculateWriteBackDISPCLK +ffffffff82258be0 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff82258c30 T dml32_CalculatePixelDeliveryTimes +ffffffff822590b0 T dml32_CalculateMetaAndPTETimes +ffffffff82259810 T dml32_CalculateVMGroupAndRequestTimes +ffffffff82259d50 T dml32_CalculateDCCConfiguration +ffffffff8225a360 T dml32_CalculateStutterEfficiency +ffffffff8225b280 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff8225b370 T dml32_CalculateVActiveBandwithSupport +ffffffff8225b4e0 T dml32_CalculatePrefetchBandwithSupport +ffffffff8225b800 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff8225b950 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff8225bbd0 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff8225c000 T dml32_rq_dlg_get_rq_reg +ffffffff8225c6a0 T dml32_rq_dlg_get_dlg_reg +ffffffff8225f000 T dcn321_update_bw_bounding_box_fpu +ffffffff82261760 t get_optimal_ntuple +ffffffff82262000 T dml_init_instance +ffffffff82262310 T dml_get_status_message +ffffffff82262350 T dml_log_pipe_params +ffffffff82262380 T dml_log_mode_support_params +ffffffff82263000 T dml_get_voltage_level +ffffffff82263240 t fetch_socbb_params +ffffffff82263730 t fetch_ip_params +ffffffff82263bd0 t fetch_pipe_params +ffffffff82264c50 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff82264cd0 T get_clk_dcf_deepsleep +ffffffff82264de0 T get_wm_urgent +ffffffff82264ef0 T get_wm_memory_trip +ffffffff82265000 T get_wm_writeback_urgent +ffffffff82265110 T get_wm_stutter_exit +ffffffff82265220 T get_wm_stutter_enter_exit +ffffffff82265330 T get_wm_z8_stutter_exit +ffffffff82265440 T get_wm_z8_stutter_enter_exit +ffffffff82265550 T get_stutter_efficiency_z8 +ffffffff82265660 T get_stutter_num_bursts_z8 +ffffffff82265770 T get_wm_dram_clock_change +ffffffff82265880 T get_wm_writeback_dram_clock_change +ffffffff82265990 T get_stutter_efficiency +ffffffff82265aa0 T get_stutter_efficiency_no_vblank +ffffffff82265bb0 T get_stutter_period +ffffffff82265cc0 T get_urgent_latency +ffffffff82265dd0 T get_urgent_extra_latency +ffffffff82265ee0 T get_nonurgent_latency +ffffffff82265ff0 T get_dram_clock_change_latency +ffffffff82266100 T get_dispclk_calculated +ffffffff82266210 T get_total_data_read_bw +ffffffff82266320 T get_return_bw +ffffffff82266430 T get_tcalc +ffffffff82266540 T get_fraction_of_urgent_bandwidth +ffffffff82266650 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff82266760 T get_cstate_max_cap_mode +ffffffff82266880 T get_comp_buffer_size_kbytes +ffffffff82266990 T get_pixel_chunk_size_in_kbyte +ffffffff82266ab0 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff82266bd0 T get_meta_chunk_size_in_kbyte +ffffffff82266cf0 T get_min_pixel_chunk_size_in_byte +ffffffff82266e00 T get_min_meta_chunk_size_in_byte +ffffffff82266f20 T get_fclk_watermark +ffffffff82267030 T get_usr_retraining_watermark +ffffffff82267140 T get_comp_buffer_reserved_space_kbytes +ffffffff82267260 T get_comp_buffer_reserved_space_64bytes +ffffffff82267380 T get_comp_buffer_reserved_space_zs +ffffffff822674a0 T get_unbounded_request_enabled +ffffffff822675c0 T get_dsc_delay +ffffffff822676f0 T get_dppclk_calculated +ffffffff82267810 T get_dscclk_calculated +ffffffff82267930 T get_min_ttu_vblank +ffffffff82267a50 T get_min_ttu_vblank_in_us +ffffffff82267b70 T get_vratio_prefetch_l +ffffffff82267c90 T get_vratio_prefetch_c +ffffffff82267db0 T get_dst_x_after_scaler +ffffffff82267ed0 T get_dst_y_after_scaler +ffffffff82267ff0 T get_dst_y_per_vm_vblank +ffffffff82268110 T get_dst_y_per_row_vblank +ffffffff82268230 T get_dst_y_prefetch +ffffffff82268350 T get_dst_y_per_vm_flip +ffffffff82268470 T get_dst_y_per_row_flip +ffffffff82268590 T get_refcyc_per_vm_group_vblank +ffffffff822686b0 T get_refcyc_per_vm_group_flip +ffffffff822687d0 T get_refcyc_per_vm_req_vblank +ffffffff822688f0 T get_refcyc_per_vm_req_flip +ffffffff82268a10 T get_refcyc_per_vm_group_vblank_in_us +ffffffff82268b30 T get_refcyc_per_vm_group_flip_in_us +ffffffff82268c50 T get_refcyc_per_vm_req_vblank_in_us +ffffffff82268d70 T get_refcyc_per_vm_req_flip_in_us +ffffffff82268e90 T get_refcyc_per_vm_dmdata_in_us +ffffffff82268fb0 T get_dmdata_dl_delta_in_us +ffffffff822690d0 T get_refcyc_per_line_delivery_l_in_us +ffffffff822691f0 T get_refcyc_per_line_delivery_c_in_us +ffffffff82269310 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff82269430 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff82269550 T get_refcyc_per_req_delivery_l_in_us +ffffffff82269670 T get_refcyc_per_req_delivery_c_in_us +ffffffff82269790 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff822698b0 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff822699d0 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff82269af0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff82269c10 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff82269d30 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff82269e50 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff82269f70 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff8226a090 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff8226a1b0 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff8226a2d0 T get_vstartup +ffffffff8226a400 T get_vupdate_offset +ffffffff8226a530 T get_vupdate_width +ffffffff8226a650 T get_vready_offset +ffffffff8226a770 T get_vready_at_or_after_vsync +ffffffff8226a8a0 T get_min_dst_y_next_start +ffffffff8226a9d0 T get_dst_y_per_pte_row_nom_l +ffffffff8226aaf0 T get_dst_y_per_pte_row_nom_c +ffffffff8226ac10 T get_dst_y_per_meta_row_nom_l +ffffffff8226ad30 T get_dst_y_per_meta_row_nom_c +ffffffff8226ae50 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff8226af70 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff8226b090 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff8226b1b0 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff8226b2d0 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff8226b3f0 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff8226b510 T get_vstartup_calculated +ffffffff8226b640 T get_dpte_row_height_linear_c +ffffffff8226b770 T get_swath_height_l +ffffffff8226b8a0 T get_swath_height_c +ffffffff8226b9d0 T get_det_stored_buffer_size_l_bytes +ffffffff8226bb00 T get_det_stored_buffer_size_c_bytes +ffffffff8226bc30 T get_dpte_group_size_in_bytes +ffffffff8226bd60 T get_vm_group_size_in_bytes +ffffffff8226be90 T get_dpte_row_height_linear_l +ffffffff8226bfc0 T get_pte_buffer_mode +ffffffff8226c0f0 T get_subviewport_lines_needed_in_mall +ffffffff8226c220 T get_surface_size_in_mall +ffffffff8226c350 T get_total_immediate_flip_bytes +ffffffff8226c470 T get_total_immediate_flip_bw +ffffffff8226c650 T get_total_prefetch_bw +ffffffff8226c830 T get_total_surface_size_in_mall_bytes +ffffffff8226c9d0 T get_det_buffer_size_kbytes +ffffffff8226cb00 T get_is_phantom_pipe +ffffffff8226cc30 T Calculate256BBlockSizes +ffffffff8226cd20 T CalculateMinAndMaxPrefetchMode +ffffffff8226cda0 T ModeSupportAndSystemConfiguration +ffffffff8226d0b0 T CalculateWriteBackDISPCLK +ffffffff8226e000 T print__rq_params_st +ffffffff8226e030 T print__data_rq_sizing_params_st +ffffffff8226e060 T print__data_rq_dlg_params_st +ffffffff8226e090 T print__data_rq_misc_params_st +ffffffff8226e0c0 T print__rq_dlg_params_st +ffffffff8226e0f0 T print__dlg_sys_params_st +ffffffff8226e120 T print__data_rq_regs_st +ffffffff8226e150 T print__rq_regs_st +ffffffff8226e180 T print__dlg_regs_st +ffffffff8226e1b0 T print__ttu_regs_st +ffffffff8226f000 T dml1_extract_rq_regs +ffffffff8226f330 T dml1_rq_dlg_get_rq_params +ffffffff8226f510 t get_surf_rq_param +ffffffff822700c0 T dml1_rq_dlg_get_dlg_params +ffffffff82273000 T _do_calc_rc_params +ffffffff82273fc0 t get_qp_set +ffffffff82275000 T dc_bandwidth_in_kbps_from_timing +ffffffff82275290 T dc_dsc_stream_bandwidth_in_kbps +ffffffff822753e0 T dc_dsc_parse_dsc_dpcd +ffffffff82275680 t dsc_throughput_from_dpcd +ffffffff82275840 T dc_dsc_compute_bandwidth_range +ffffffff82275a30 t intersect_dsc_caps +ffffffff82275c00 t setup_dsc_config +ffffffff822763d0 T dc_dsc_compute_config +ffffffff822764c0 T dc_dsc_stream_bandwidth_overhead_in_kbps +ffffffff82276600 T dc_dsc_get_policy_for_timing +ffffffff822766a0 T dc_dsc_policy_set_max_target_bpp_limit +ffffffff822766d0 T dc_dsc_policy_set_enable_dsc_when_not_needed +ffffffff82276700 T dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff82276730 T dc_set_disable_128b_132b_stream_overhead +ffffffff82276760 T dc_dsc_get_default_config_option +ffffffff822767b0 t fit_num_slices_up +ffffffff82276860 t decide_dsc_target_bpp_x16 +ffffffff82277000 T calc_rc_params +ffffffff82278000 T dscc_compute_dsc_parameters +ffffffff82279000 T dal_hw_factory_dce110_init +ffffffff82279060 t define_hpd_registers +ffffffff822790b0 t define_ddc_registers +ffffffff8227a000 T dal_hw_translate_dce110_init +ffffffff8227a030 t offset_to_id +ffffffff8227a390 t id_to_offset +ffffffff8227b000 T dal_hw_factory_dce120_init +ffffffff8227b060 t define_hpd_registers +ffffffff8227b0b0 t define_ddc_registers +ffffffff8227c000 T dal_hw_translate_dce120_init +ffffffff8227c030 t offset_to_id +ffffffff8227c3a0 t id_to_offset +ffffffff8227d000 T dal_hw_factory_dce80_init +ffffffff8227d060 t define_hpd_registers +ffffffff8227d0b0 t define_ddc_registers +ffffffff8227e000 T dal_hw_translate_dce80_init +ffffffff8227e030 t offset_to_id +ffffffff8227e7b0 t id_to_offset +ffffffff8227f000 T dal_hw_factory_dcn10_init +ffffffff8227f060 t define_hpd_registers +ffffffff8227f0b0 t define_ddc_registers +ffffffff8227f150 t define_generic_registers +ffffffff82280000 T dal_hw_translate_dcn10_init +ffffffff82280030 t offset_to_id +ffffffff82280390 t id_to_offset +ffffffff82281000 T dal_hw_factory_dcn20_init +ffffffff82281060 t define_hpd_registers +ffffffff822810b0 t define_ddc_registers +ffffffff82281160 t define_generic_registers +ffffffff82282000 T dal_hw_translate_dcn20_init +ffffffff82282030 t offset_to_id +ffffffff822822b0 t id_to_offset +ffffffff82283000 T dal_hw_factory_dcn21_init +ffffffff82283060 t define_hpd_registers +ffffffff822830b0 t define_ddc_registers +ffffffff82283160 t define_generic_registers +ffffffff82284000 T dal_hw_translate_dcn21_init +ffffffff82284030 t offset_to_id +ffffffff822842b0 t id_to_offset +ffffffff82285000 T dal_hw_factory_dcn30_init +ffffffff82285060 t define_hpd_registers +ffffffff822850b0 t define_ddc_registers +ffffffff82285160 t define_generic_registers +ffffffff82286000 T dal_hw_translate_dcn30_init +ffffffff82286030 t offset_to_id +ffffffff822862c0 t id_to_offset +ffffffff82287000 T dal_hw_factory_dcn315_init +ffffffff82287060 t define_hpd_registers +ffffffff822870b0 t define_ddc_registers +ffffffff82287160 t define_generic_registers +ffffffff82288000 T dal_hw_translate_dcn315_init +ffffffff82288030 t offset_to_id +ffffffff822882b0 t id_to_offset +ffffffff82289000 T dal_hw_factory_dcn32_init +ffffffff82289060 t define_hpd_registers +ffffffff822890b0 t define_ddc_registers +ffffffff82289160 t define_generic_registers +ffffffff8228a000 T dal_hw_translate_dcn32_init +ffffffff8228a030 t offset_to_id +ffffffff8228a290 t id_to_offset +ffffffff8228b000 T dal_gpio_open +ffffffff8228b0c0 T dal_gpio_open_ex +ffffffff8228b180 T dal_gpio_get_value +ffffffff8228b200 T dal_gpio_set_value +ffffffff8228b280 T dal_gpio_get_mode +ffffffff8228b2b0 T dal_gpio_lock_pin +ffffffff8228b2d0 T dal_gpio_unlock_pin +ffffffff8228b2f0 T dal_gpio_change_mode +ffffffff8228b370 T dal_gpio_get_id +ffffffff8228b3a0 T dal_gpio_get_enum +ffffffff8228b3d0 T dal_gpio_set_config +ffffffff8228b450 T dal_gpio_get_pin_info +ffffffff8228b4b0 T dal_gpio_get_sync_source +ffffffff8228b540 T dal_gpio_get_output_state +ffffffff8228b570 T dal_gpio_get_ddc +ffffffff8228b5a0 T dal_gpio_get_hpd +ffffffff8228b5d0 T dal_gpio_get_generic +ffffffff8228b600 T dal_gpio_close +ffffffff8228b650 T dal_gpio_create +ffffffff8228b7e0 T dal_gpio_destroy +ffffffff8228c000 T dal_gpio_service_create +ffffffff8228c240 T dal_gpio_service_create_irq +ffffffff8228c300 T dal_gpio_create_irq +ffffffff8228c380 T dal_gpio_service_create_generic_mux +ffffffff8228c420 T dal_gpio_destroy_generic_mux +ffffffff8228c4b0 T dal_gpio_get_generic_pin_info +ffffffff8228c510 T dal_gpio_service_destroy +ffffffff8228c640 T dal_mux_setup_config +ffffffff8228c6a0 T dal_gpio_service_lock +ffffffff8228c720 T dal_gpio_service_unlock +ffffffff8228c7a0 T dal_gpio_service_open +ffffffff8228c9e0 T dal_gpio_service_close +ffffffff8228ca80 T dal_irq_get_source +ffffffff8228caf0 T dal_irq_get_rx_source +ffffffff8228cb40 T dal_irq_setup_hpd_filter +ffffffff8228cba0 T dal_gpio_destroy_irq +ffffffff8228cc30 T dal_gpio_create_ddc +ffffffff8228cda0 T dal_gpio_destroy_ddc +ffffffff8228ce70 T dal_ddc_close +ffffffff8228cec0 T dal_ddc_open +ffffffff8228d020 T dal_ddc_change_mode +ffffffff8228d0c0 T dal_ddc_get_line +ffffffff8228d0e0 T dal_ddc_set_config +ffffffff8228e000 T dal_hw_ddc_init +ffffffff8228e100 T dal_hw_ddc_get_pin +ffffffff8228e110 t dal_hw_ddc_destroy +ffffffff8228e170 t set_config +ffffffff8228f000 T dal_hw_factory_init +ffffffff82290000 T dal_hw_generic_init +ffffffff82290100 T dal_hw_generic_get_pin +ffffffff82290110 t dal_hw_generic_destroy +ffffffff82290170 t set_config +ffffffff82291000 T dal_hw_gpio_open +ffffffff822910b0 T dal_hw_gpio_config_mode +ffffffff822911a0 T dal_hw_gpio_get_value +ffffffff82291200 T dal_hw_gpio_set_value +ffffffff82291290 T dal_hw_gpio_change_mode +ffffffff822912a0 T dal_hw_gpio_close +ffffffff82291350 T dal_hw_gpio_construct +ffffffff822913b0 T dal_hw_gpio_destruct +ffffffff82292000 T dal_hw_hpd_init +ffffffff82292100 T dal_hw_hpd_get_pin +ffffffff82292110 t dal_hw_hpd_destroy +ffffffff82292170 t get_value +ffffffff82292210 t set_config +ffffffff82293000 T dal_hw_translate_init +ffffffff82294000 T dc_process_hdcp_msg +ffffffff82294180 t hdmi_14_process_transaction +ffffffff822942d0 t dp_11_process_transaction +ffffffff82295000 T dal_irq_service_dummy_set +ffffffff82295050 T dal_irq_service_dummy_ack +ffffffff822950a0 T dce110_vblank_set +ffffffff82295170 T to_dal_irq_source_dce110 +ffffffff822952f0 T dal_irq_service_dce110_create +ffffffff82295370 t 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vcpu_readregs_svm -ffffffff825d7c30 T vcpu_writeregs_svm -ffffffff825d8100 T vmm_get_guest_memtype -ffffffff825d8180 T vmx_mprotect_ept -ffffffff825d83e0 T vmx_pmap_find_pte_ept -ffffffff825d84b0 T start_vmm_on_cpu -ffffffff825d85d0 T stop_vmm_on_cpu -ffffffff825d8670 T vmclear_on_cpu -ffffffff825d86f0 T vm_impl_init_vmx -ffffffff825d8800 T vm_impl_init_svm -ffffffff825d8910 T vm_impl_init -ffffffff825d89b0 T vm_impl_deinit -ffffffff825d89e0 T vcpu_reload_vmcs_vmx -ffffffff825d8b20 T vcpu_reset_regs_svm -ffffffff825d8eb0 T svm_setmsrbrw -ffffffff825d8fc0 T svm_setmsrbr -ffffffff825d9090 T vmm_alloc_vpid -ffffffff825d91a0 T svm_setmsrbw -ffffffff825d9280 T vmx_setmsrbr -ffffffff825d9330 T vmx_setmsrbw -ffffffff825d93e0 T vmx_setmsrbrw -ffffffff825d94f0 T svm_set_clean -ffffffff825d9540 T svm_set_dirty -ffffffff825d9590 T vcpu_reset_regs_vmx -ffffffff825d9fd0 T vcpu_vmx_check_cap -ffffffff825da0d0 T vcpu_vmx_compute_ctrl -ffffffff825da2b0 T vcpu_init_vmx -ffffffff825da650 T vcpu_deinit_vmx -ffffffff825da7d0 T vcpu_reset_regs -ffffffff825da810 T vcpu_init_svm -ffffffff825da9a0 T vcpu_deinit_svm -ffffffff825daae0 T vcpu_init -ffffffff825daba0 T vmm_free_vpid -ffffffff825dac10 T vcpu_deinit -ffffffff825dac50 T vm_run -ffffffff825dae10 T vcpu_run_vmx -ffffffff825db600 T vcpu_run_svm -ffffffff825dbbf0 T vmm_fpurestore -ffffffff825dbcb0 T vmm_fpusave -ffffffff825dbd30 T vmm_translate_gva -ffffffff825dc040 T vmm_update_pvclock -ffffffff825dc140 T vmx_get_exit_info -ffffffff825dc1a0 T vmx_handle_exit -ffffffff825dc5d0 T vmx_instruction_error_decode -ffffffff825dc7a0 T vmm_get_guest_cpu_cpl -ffffffff825dc890 T vmx_handle_intr -ffffffff825dc920 T svm_handle_hlt -ffffffff825dc970 T vmx_handle_hlt -ffffffff825dca20 T svm_handle_exit -ffffffff825dcd40 T svm_handle_np_fault -ffffffff825dcee0 T vmm_handle_cpuid -ffffffff825dd580 T svm_handle_msr -ffffffff825dd850 T svm_handle_xsetbv -ffffffff825dd8f0 T svm_handle_inout -ffffffff825dd9f0 T vmm_inject_ud -ffffffff825dda20 T vmm_inject_db -ffffffff825dda50 T vmx_handle_np_fault -ffffffff825ddbb0 T vmx_handle_inout -ffffffff825ddd30 T vmx_handle_cr -ffffffff825ddf30 T vmx_handle_rdmsr -ffffffff825de000 T vmx_handle_wrmsr -ffffffff825de270 T vmx_handle_xsetbv -ffffffff825de340 T vmm_inject_gp -ffffffff825de370 T vmx_get_exit_qualification -ffffffff825de3d0 T vmx_get_guest_faulttype -ffffffff825de470 T svm_get_guest_faulttype -ffffffff825de4a0 T svm_fault_page -ffffffff825de530 T vmx_fault_page -ffffffff825de680 T vmm_get_guest_cpu_mode -ffffffff825de780 T vmx_load_pdptes -ffffffff825dea00 T vmx_handle_cr0_write -ffffffff825dec10 T vmx_handle_cr4_write -ffffffff825decb0 T vmm_handle_xsetbv -ffffffff825ded40 T vmx_handle_misc_enable_msr -ffffffff825deda0 T vmm_pat_is_valid -ffffffff825dee80 T vmm_gpa_is_valid -ffffffff825deef0 T vmx_exit_reason_decode -ffffffff825def30 T svm_exit_reason_decode -ffffffff825dfd40 T vcpu_state_decode -ffffffff825e0000 T vmm_dispatch_intr -ffffffff825e0020 T vmxon -ffffffff825e0050 T vmxoff -ffffffff825e0080 T vmclear -ffffffff825e00b0 T vmptrld -ffffffff825e00e0 T vmptrst -ffffffff825e0110 T vmwrite -ffffffff825e0140 T vmread -ffffffff825e0170 T invvpid -ffffffff825e018b t invvpid_fail -ffffffff825e0192 t invvpid_ret -ffffffff825e01b0 T invept -ffffffff825e01cb t invept_fail -ffffffff825e01d2 t invept_ret -ffffffff825e01f0 T vmx_enter_guest -ffffffff825e021b t skip_init -ffffffff825e02e8 t no_l1df_msr -ffffffff825e02eb t l1df_tlb_loop -ffffffff825e0304 t l1df_tlb_done -ffffffff825e030c t l1df_load_cache -ffffffff825e0323 t done_flush -ffffffff825e03b6 t do_resume -ffffffff825e043b t fail_launch_or_resume -ffffffff825e047d t fail_launch_unknown -ffffffff825e048a t fail_launch_invalid_vmcs -ffffffff825e0497 t fail_launch_valid_vmcs -ffffffff825e04b4 t vmx_exit_handler_asm -ffffffff825e0579 t restore_host -ffffffff825e0610 T svm_enter_guest -ffffffff825e07a0 t restore_host_svm -ffffffff825e1000 T sdmmc_match -ffffffff825e1050 T sdmmc_attach -ffffffff825e1390 T sdmmc_detach -ffffffff825e1440 T sdmmc_activate -ffffffff825e1510 T sdmmc_discover_task -ffffffff825e15d0 T sdmmc_create_thread -ffffffff825e1640 T sdmmc_holds_root_device -ffffffff825e16a0 T sdmmc_task_thread -ffffffff825e1890 T sdmmc_needs_discover -ffffffff825e1940 T sdmmc_del_task -ffffffff825e19f0 T sdmmc_card_detach -ffffffff825e1ad0 T sdmmc_add_task -ffffffff825e1b50 T sdmmc_card_attach -ffffffff825e1c60 T sdmmc_enable -ffffffff825e1db0 T sdmmc_scan -ffffffff825e1e40 T sdmmc_init -ffffffff825e1f40 T sdmmc_disable -ffffffff825e20a0 T sdmmc_function_free -ffffffff825e20c0 T sdmmc_delay -ffffffff825e2110 T sdmmc_select_card -ffffffff825e2330 T sdmmc_set_bus_power -ffffffff825e24e0 T sdmmc_function_alloc -ffffffff825e2570 T sdmmc_app_command -ffffffff825e2700 T sdmmc_mmc_command -ffffffff825e2780 T sdmmc_go_idle_state -ffffffff825e2890 T sdmmc_send_if_cond -ffffffff825e29e0 T sdmmc_set_relative_addr -ffffffff825e3000 T sdmmc_cisptr -ffffffff825e30a0 T sdmmc_read_cis -ffffffff825e33e0 T sdmmc_print_cis -ffffffff825e3550 T sdmmc_check_cis_quirks -ffffffff825e4000 T sdmmc_io_enable -ffffffff825e42a0 T sdmmc_io_reset -ffffffff825e43d0 T sdmmc_io_send_op_cond -ffffffff825e4540 T sdmmc_io_scan -ffffffff825e4690 T sdmmc_io_init -ffffffff825e47c0 T sdmmc_io_set_highspeed -ffffffff825e4a60 T sdmmc_io_set_bus_width -ffffffff825e4cf0 T sdmmc_io_function_ready -ffffffff825e4e70 T sdmmc_io_read_1 -ffffffff825e4fc0 T sdmmc_io_function_enable -ffffffff825e5390 T sdmmc_io_write_1 -ffffffff825e5510 T sdmmc_io_function_disable -ffffffff825e5790 T sdmmc_io_attach -ffffffff825e5880 T sdmmc_print -ffffffff825e5ad0 T sdmmc_submatch -ffffffff825e5b50 T sdmmc_io_detach -ffffffff825e5c00 T sdmmc_io_rw_direct -ffffffff825e5da0 T sdmmc_io_rw_extended_subr -ffffffff825e5f40 T sdmmc_io_rw_extended -ffffffff825e6340 T sdmmc_io_read_2 -ffffffff825e64a0 T sdmmc_io_write_2 -ffffffff825e6600 T sdmmc_io_read_4 -ffffffff825e6760 T sdmmc_io_write_4 -ffffffff825e68c0 T sdmmc_io_read_multi_1 -ffffffff825e69b0 T sdmmc_io_write_multi_1 -ffffffff825e6aa0 T sdmmc_io_read_region_1 -ffffffff825e6b90 T sdmmc_io_write_region_1 -ffffffff825e6c80 T sdmmc_io_xchg -ffffffff825e6e10 T sdmmc_intr_enable -ffffffff825e7080 T sdmmc_intr_disable -ffffffff825e72f0 T sdmmc_intr_establish -ffffffff825e73f0 T sdmmc_intr_disestablish -ffffffff825e74e0 T sdmmc_card_intr -ffffffff825e7530 T sdmmc_intr_task -ffffffff825e75c0 T sdmmc_io_set_blocklen -ffffffff825e8000 T sdmmc_mem_enable -ffffffff825e8450 T sdmmc_mem_send_op_cond -ffffffff825e8600 T sdmmc_mem_signal_voltage -ffffffff825e86c0 T sdmmc_mem_scan -ffffffff825e89d0 T sdmmc_decode_csd -ffffffff825e8e00 T sdmmc_decode_cid -ffffffff825e92a0 T sdmmc_mem_send_scr -ffffffff825e93e0 T sdmmc_mem_decode_scr -ffffffff825e9440 T sdmmc_mem_send_cxd_data -ffffffff825e95b0 T sdmmc_mem_set_bus_width -ffffffff825e96c0 T sdmmc_mem_sd_switch -ffffffff825e9970 T sdmmc_be512_to_bitfield512 -ffffffff825e9a20 T sdmmc_mem_mmc_switch -ffffffff825e9b10 T sdmmc_mem_init -ffffffff825e9c60 T sdmmc_mem_set_blocklen -ffffffff825e9d60 T sdmmc_mem_sd_init -ffffffff825ea140 T sdmmc_mem_mmc_init -ffffffff825ea800 T sdmmc_mem_select_transfer_mode -ffffffff825ea880 T sdmmc_mem_execute_tuning -ffffffff825ea910 T sdmmc_mem_read_block_subr -ffffffff825eac70 T sdmmc_mem_single_read_block -ffffffff825ead40 T sdmmc_mem_read_block -ffffffff825eaef0 T sdmmc_mem_write_block_subr -ffffffff825eb240 T sdmmc_mem_single_write_block -ffffffff825eb310 T sdmmc_mem_write_block -ffffffff825eb4c0 T sdmmc_mem_hibernate_write -ffffffff825ec000 T sdmmc_scsi_cmd -ffffffff825ec1f0 T sdmmc_minphys -ffffffff825ec270 T sdmmc_scsi_attach -ffffffff825ec460 T sdmmc_alloc_ccbs -ffffffff825ec5a0 T sdmmc_free_ccbs -ffffffff825ec600 T sdmmc_scsi_detach -ffffffff825ec760 T sdmmc_stimeout -ffffffff825ec7e0 T sdmmc_ccb_alloc -ffffffff825ec890 T sdmmc_ccb_free -ffffffff825ec970 T sdmmc_inquiry -ffffffff825ecbe0 T sdmmc_start_xs -ffffffff825eccd0 T sdmmc_complete_xs -ffffffff825ecda0 T sdmmc_done_xs -ffffffff825ecdf0 T sdmmc_scsi_hibernate_io -ffffffff825ed000 T bwfm_sdio_preinit -ffffffff825ed4a0 T bwfm_sdio_txcheck -ffffffff825ed4e0 T bwfm_sdio_txdata -ffffffff825ed550 T bwfm_sdio_txctl -ffffffff825ed6a0 T bwfm_sdio_buscore_read -ffffffff825ed6b0 T bwfm_sdio_buscore_write -ffffffff825ed6d0 T bwfm_sdio_buscore_prepare -ffffffff825ed810 T bwfm_sdio_buscore_activate -ffffffff825ed890 T bwfm_sdio_match -ffffffff825ed940 T bwfm_sdio_attach -ffffffff825edc00 T bwfm_sdio_detach -ffffffff825edc60 T bwfm_sdio_task -ffffffff825eddc0 T bwfm_sdio_write_1 -ffffffff825eddf0 T bwfm_sdio_read_1 -ffffffff825ede20 T bwfm_sdio_write_4 -ffffffff825eded0 T bwfm_sdio_read_4 -ffffffff825edf80 T bwfm_sdio_load_microcode -ffffffff825ee1e0 T bwfm_sdio_clkctl -ffffffff825ee310 T bwfm_sdio_dev_write -ffffffff825ee360 T bwfm_sdio_intr -ffffffff825ee3a0 T bwfm_sdio_ram_read_write -ffffffff825ee5d0 T bwfm_sdio_htclk -ffffffff825ee840 T bwfm_sdio_readshared -ffffffff825ee910 T bwfm_sdio_dev_read -ffffffff825ee950 T bwfm_sdio_rx_frames -ffffffff825eed00 T bwfm_sdio_tx_frames -ffffffff825eee00 T bwfm_sdio_backplane -ffffffff825eeeb0 T bwfm_sdio_buf_read -ffffffff825eef90 T bwfm_sdio_buf_write -ffffffff825ef040 T bwfm_sdio_frame_read_write -ffffffff825ef1c0 T bwfm_sdio_newbuf -ffffffff825ef240 T bwfm_sdio_tx_ok -ffffffff825ef2a0 T bwfm_sdio_tx_ctrlframe -ffffffff825ef3a0 T bwfm_sdio_tx_dataframe -ffffffff825ef4f0 T bwfm_sdio_rx_glom -ffffffff825f0000 T onewire_match -ffffffff825f0050 T onewire_attach -ffffffff825f00f0 T onewire_detach -ffffffff825f0160 T onewire_activate -ffffffff825f0180 T onewire_scan -ffffffff825f03a0 T onewire_createthread -ffffffff825f0410 T onewire_print -ffffffff825f04e0 T onewirebus_print -ffffffff825f0530 T onewire_lock -ffffffff825f0550 T onewire_unlock -ffffffff825f0570 T onewire_reset -ffffffff825f0590 T onewire_bit -ffffffff825f05b0 T onewire_read_byte -ffffffff825f06f0 T onewire_write_byte -ffffffff825f07d0 T onewire_read_block -ffffffff825f0870 T onewire_write_block -ffffffff825f0910 T onewire_triplet -ffffffff825f09f0 T onewire_matchrom -ffffffff825f0b40 T onewire_search -ffffffff825f0ee0 T onewire_thread -ffffffff825f1000 T onewire_crc -ffffffff825f10b0 T onewire_crc16 -ffffffff825f1170 T onewire_famname -ffffffff825f11b0 T onewire_matchbyfam -ffffffff825f2000 T owid_match -ffffffff825f2030 T owid_attach -ffffffff825f2100 T owid_detach -ffffffff825f2140 T owid_activate -ffffffff825f3000 T owsbm_match -ffffffff825f3030 T owsbm_attach -ffffffff825f31d0 T owsbm_detach -ffffffff825f3240 T owsbm_activate -ffffffff825f3270 T owsbm_update -ffffffff825f4000 T owtemp_match -ffffffff825f4030 T owtemp_attach -ffffffff825f4130 T owtemp_detach -ffffffff825f41a0 T owtemp_activate -ffffffff825f41d0 T owtemp_update -ffffffff825f5000 T owctr_match -ffffffff825f5030 T owctr_attach -ffffffff825f5180 T owctr_detach -ffffffff825f51f0 T owctr_activate -ffffffff825f5220 T owctr_update -ffffffff825f5250 T owctr_update_counter -ffffffff825f6000 A __text_page_start -ffffffff825f6000 T Xsyscall_meltdown -ffffffff825f600c T Xsyscall -ffffffff825f626e t Xsyscall_trampback -ffffffff825f6280 T intr_user_exit -ffffffff825f62c2 t intr_user_exit_post_ast -ffffffff825f63ee t Xiretq_trampback -ffffffff825f63fa T doreti_iret -ffffffff825f7000 T alltraps -ffffffff825f7138 T recall_trap -ffffffff825f7150 T alltraps_kern -ffffffff825f7153 T alltraps_kern_meltdown -ffffffff825f8000 ? Xsyscall32 -ffffffff825f8000 A __kutext_start -ffffffff825f8000 A __text_page_end -ffffffff825f9000 ? Xtrap00 -ffffffff825f9010 ? Xtrap01 -ffffffff825f9020 ? Xtrap02 -ffffffff825f9028 c calltrap_specstk -ffffffff825f90f0 ? calltrap_specstk_tramp -ffffffff825f9110 ? Xtrap03 -ffffffff825f9120 ? Xtrap04 -ffffffff825f9130 ? Xtrap05 -ffffffff825f9140 ? Xtrap06 -ffffffff825f9150 ? Xtrap07 -ffffffff825f9160 ? Xtrap08 -ffffffff825f9170 ? Xtrap09 -ffffffff825f9180 ? Xtrap0a -ffffffff825f9190 ? Xtrap0b -ffffffff825f91a0 ? Xtrap0c -ffffffff825f91b0 ? Xtrap0d -ffffffff825f9240 ? Xtrap0e -ffffffff825f9250 ? Xintrspurious -ffffffff825f9250 ? Xtrap0f -ffffffff825f9260 ? Xtrap10 -ffffffff825f9270 ? Xtrap11 -ffffffff825f9280 ? Xtrap12 -ffffffff825f9290 ? Xtrap13 -ffffffff825f92a0 ? Xtrap14 -ffffffff825f92b0 ? Xtrap15 -ffffffff825f92c0 ? Xtrap16 -ffffffff825f92c0 ? Xtrap17 -ffffffff825f92c0 ? Xtrap18 -ffffffff825f92c0 ? Xtrap19 -ffffffff825f92c0 ? Xtrap1a -ffffffff825f92c0 ? Xtrap1b -ffffffff825f92c0 ? Xtrap1c -ffffffff825f92c0 ? Xtrap1d -ffffffff825f92c0 ? Xtrap1e -ffffffff825f92c0 ? Xtrap1f -ffffffff825f92d0 ? x2apic_eoi -ffffffff825f92f0 ? Xintr_lapic_ipi -ffffffff825f9330 ? Xipi_invltlb -ffffffff825f9360 ? Xipi_invlpg -ffffffff825f9390 ? Xipi_invlrange -ffffffff825f93d0 ? Xipi_invltlb_pcid -ffffffff825f9410 ? Xipi_invlpg_pcid -ffffffff825f9460 ? Xipi_invlrange_pcid -ffffffff825f94d0 ? Xintr_lapic_ltimer -ffffffff825f9510 ? Xintr_xen_upcall -ffffffff825f9550 ? Xintr_hyperv_upcall -ffffffff825f9590 ? Xintr_legacy0 -ffffffff825f95d0 ? Xintr_legacy1 -ffffffff825f9610 ? Xintr_legacy2 -ffffffff825f9650 ? Xintr_legacy3 -ffffffff825f9690 ? Xintr_legacy4 -ffffffff825f96d0 ? Xintr_legacy5 -ffffffff825f9710 ? Xintr_legacy6 -ffffffff825f9750 ? Xintr_legacy7 -ffffffff825f9790 ? Xintr_legacy8 -ffffffff825f97d0 ? Xintr_legacy9 -ffffffff825f9810 ? Xintr_legacy10 -ffffffff825f9850 ? Xintr_legacy11 -ffffffff825f9890 ? Xintr_legacy12 -ffffffff825f98d0 ? Xintr_legacy13 -ffffffff825f9910 ? Xintr_legacy14 -ffffffff825f9950 ? Xintr_legacy15 -ffffffff825f9990 ? Xintr_ioapic_edge0 -ffffffff825f99d0 ? Xintr_ioapic_edge1 -ffffffff825f9a10 ? Xintr_ioapic_edge2 -ffffffff825f9a50 ? Xintr_ioapic_edge3 -ffffffff825f9a90 ? Xintr_ioapic_edge4 -ffffffff825f9ad0 ? Xintr_ioapic_edge5 -ffffffff825f9b10 ? Xintr_ioapic_edge6 -ffffffff825f9b50 ? Xintr_ioapic_edge7 -ffffffff825f9b90 ? Xintr_ioapic_edge8 -ffffffff825f9bd0 ? Xintr_ioapic_edge9 -ffffffff825f9c10 ? Xintr_ioapic_edge10 -ffffffff825f9c50 ? Xintr_ioapic_edge11 -ffffffff825f9c90 ? Xintr_ioapic_edge12 -ffffffff825f9cd0 ? Xintr_ioapic_edge13 -ffffffff825f9d10 ? Xintr_ioapic_edge14 -ffffffff825f9d50 ? Xintr_ioapic_edge15 -ffffffff825f9d90 ? Xintr_ioapic_edge16 -ffffffff825f9dd0 ? Xintr_ioapic_edge17 -ffffffff825f9e10 ? Xintr_ioapic_edge18 -ffffffff825f9e50 ? Xintr_ioapic_edge19 -ffffffff825f9e90 ? Xintr_ioapic_edge20 -ffffffff825f9ed0 ? Xintr_ioapic_edge21 -ffffffff825f9f10 ? Xintr_ioapic_edge22 -ffffffff825f9f50 ? Xintr_ioapic_edge23 -ffffffff825f9f90 ? Xintr_ioapic_edge24 -ffffffff825f9fd0 ? Xintr_ioapic_edge25 -ffffffff825fa010 ? Xintr_ioapic_edge26 -ffffffff825fa050 ? Xintr_ioapic_edge27 -ffffffff825fa090 ? Xintr_ioapic_edge28 -ffffffff825fa0d0 ? Xintr_ioapic_edge29 -ffffffff825fa110 ? Xintr_ioapic_edge30 -ffffffff825fa150 ? Xintr_ioapic_edge31 -ffffffff825fa190 ? Xintr_ioapic_edge32 -ffffffff825fa1d0 ? Xintr_ioapic_edge33 -ffffffff825fa210 ? Xintr_ioapic_edge34 -ffffffff825fa250 ? Xintr_ioapic_edge35 -ffffffff825fa290 ? Xintr_ioapic_edge36 -ffffffff825fa2d0 ? Xintr_ioapic_edge37 -ffffffff825fa310 ? Xintr_ioapic_edge38 -ffffffff825fa350 ? Xintr_ioapic_edge39 -ffffffff825fa390 ? Xintr_ioapic_edge40 -ffffffff825fa3d0 ? Xintr_ioapic_edge41 -ffffffff825fa410 ? Xintr_ioapic_edge42 -ffffffff825fa450 ? Xintr_ioapic_edge43 -ffffffff825fa490 ? Xintr_ioapic_edge44 -ffffffff825fa4d0 ? Xintr_ioapic_edge45 -ffffffff825fa510 ? Xintr_ioapic_edge46 -ffffffff825fa550 ? Xintr_ioapic_edge47 -ffffffff825fa590 ? Xintr_ioapic_edge48 -ffffffff825fa5d0 ? Xintr_ioapic_edge49 -ffffffff825fa610 ? Xintr_ioapic_edge50 -ffffffff825fa650 ? Xintr_ioapic_edge51 -ffffffff825fa690 ? Xintr_ioapic_edge52 -ffffffff825fa6d0 ? Xintr_ioapic_edge53 -ffffffff825fa710 ? Xintr_ioapic_edge54 -ffffffff825fa750 ? Xintr_ioapic_edge55 -ffffffff825fa790 ? Xintr_ioapic_edge56 -ffffffff825fa7d0 ? Xintr_ioapic_edge57 -ffffffff825fa810 ? Xintr_ioapic_edge58 -ffffffff825fa850 ? Xintr_ioapic_edge59 -ffffffff825fa890 ? Xintr_ioapic_edge60 -ffffffff825fa8d0 ? Xintr_ioapic_edge61 -ffffffff825fa910 ? Xintr_ioapic_edge62 -ffffffff825fa950 ? Xintr_ioapic_edge63 -ffffffff825fa990 ? Xintr_ioapic_level0 -ffffffff825fa9d0 ? Xintr_ioapic_level1 -ffffffff825faa10 ? Xintr_ioapic_level2 -ffffffff825faa50 ? Xintr_ioapic_level3 -ffffffff825faa90 ? Xintr_ioapic_level4 -ffffffff825faad0 ? Xintr_ioapic_level5 -ffffffff825fab10 ? Xintr_ioapic_level6 -ffffffff825fab50 ? Xintr_ioapic_level7 -ffffffff825fab90 ? Xintr_ioapic_level8 -ffffffff825fabd0 ? Xintr_ioapic_level9 -ffffffff825fac10 ? Xintr_ioapic_level10 -ffffffff825fac50 ? Xintr_ioapic_level11 -ffffffff825fac90 ? Xintr_ioapic_level12 -ffffffff825facd0 ? Xintr_ioapic_level13 -ffffffff825fad10 ? Xintr_ioapic_level14 -ffffffff825fad50 ? Xintr_ioapic_level15 -ffffffff825fad90 ? Xintr_ioapic_level16 -ffffffff825fadd0 ? Xintr_ioapic_level17 -ffffffff825fae10 ? Xintr_ioapic_level18 -ffffffff825fae50 ? Xintr_ioapic_level19 -ffffffff825fae90 ? Xintr_ioapic_level20 -ffffffff825faed0 ? Xintr_ioapic_level21 -ffffffff825faf10 ? Xintr_ioapic_level22 -ffffffff825faf50 ? Xintr_ioapic_level23 -ffffffff825faf90 ? Xintr_ioapic_level24 -ffffffff825fafd0 ? Xintr_ioapic_level25 -ffffffff825fb010 ? Xintr_ioapic_level26 -ffffffff825fb050 ? Xintr_ioapic_level27 -ffffffff825fb090 ? Xintr_ioapic_level28 -ffffffff825fb0d0 ? Xintr_ioapic_level29 -ffffffff825fb110 ? Xintr_ioapic_level30 -ffffffff825fb150 ? Xintr_ioapic_level31 -ffffffff825fb190 ? Xintr_ioapic_level32 -ffffffff825fb1d0 ? Xintr_ioapic_level33 -ffffffff825fb210 ? Xintr_ioapic_level34 -ffffffff825fb250 ? Xintr_ioapic_level35 -ffffffff825fb290 ? Xintr_ioapic_level36 -ffffffff825fb2d0 ? Xintr_ioapic_level37 -ffffffff825fb310 ? Xintr_ioapic_level38 -ffffffff825fb350 ? Xintr_ioapic_level39 -ffffffff825fb390 ? Xintr_ioapic_level40 -ffffffff825fb3d0 ? Xintr_ioapic_level41 -ffffffff825fb410 ? Xintr_ioapic_level42 -ffffffff825fb450 ? Xintr_ioapic_level43 -ffffffff825fb490 ? Xintr_ioapic_level44 -ffffffff825fb4d0 ? Xintr_ioapic_level45 -ffffffff825fb510 ? Xintr_ioapic_level46 -ffffffff825fb550 ? Xintr_ioapic_level47 -ffffffff825fb590 ? Xintr_ioapic_level48 -ffffffff825fb5d0 ? Xintr_ioapic_level49 -ffffffff825fb610 ? Xintr_ioapic_level50 -ffffffff825fb650 ? Xintr_ioapic_level51 -ffffffff825fb690 ? Xintr_ioapic_level52 -ffffffff825fb6d0 ? Xintr_ioapic_level53 -ffffffff825fb710 ? Xintr_ioapic_level54 -ffffffff825fb750 ? Xintr_ioapic_level55 -ffffffff825fb790 ? Xintr_ioapic_level56 -ffffffff825fb7d0 ? Xintr_ioapic_level57 -ffffffff825fb810 ? Xintr_ioapic_level58 -ffffffff825fb850 ? Xintr_ioapic_level59 -ffffffff825fb890 ? Xintr_ioapic_level60 -ffffffff825fb8d0 ? Xintr_ioapic_level61 -ffffffff825fb910 ? Xintr_ioapic_level62 -ffffffff825fb950 ? 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dmub_srv_get_gpint_response +ffffffff822dd670 T dmub_srv_get_gpint_dataout +ffffffff822dd6d0 T dmub_srv_get_fw_boot_status +ffffffff822dd740 T dmub_srv_get_fw_boot_option +ffffffff822dd7b0 T dmub_srv_set_skip_panel_power_sequence +ffffffff822dd810 T dmub_srv_cmd_with_reply_data +ffffffff822dda70 T dmub_srv_get_outbox0_msg +ffffffff822ddb10 T dmub_srv_get_diagnostic_data +ffffffff822ddb60 T dmub_srv_should_detect +ffffffff822ddbb0 T dmub_srv_clear_inbox0_ack +ffffffff822ddc00 T dmub_srv_wait_for_inbox0_ack +ffffffff822ddcb0 T dmub_srv_send_inbox0_cmd +ffffffff822de000 T dmub_srv_stat_get_notification +ffffffff822df000 T setup_x_points_distribution +ffffffff822df170 T log_x_points_distribution +ffffffff822df1a0 T precompute_pq +ffffffff822df370 t compute_pq +ffffffff822df570 T precompute_de_pq +ffffffff822df6d0 t compute_de_pq +ffffffff822df990 T calculate_user_regamma_coeff +ffffffff822dfd70 t apply_lut_1d +ffffffff822e00a0 T calculate_user_regamma_ramp +ffffffff822e0980 T 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amdgpu_dpm_enable_jpeg +ffffffff822fc520 T amdgpu_pm_load_smu_firmware +ffffffff822fc5d0 T amdgpu_dpm_handle_passthrough_sbr +ffffffff822fc650 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff822fc6d0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff822fc750 T amdgpu_dpm_get_dpm_freq_range +ffffffff822fc7f0 T amdgpu_dpm_set_soft_freq_range +ffffffff822fc890 T amdgpu_dpm_write_watermarks_table +ffffffff822fc910 T amdgpu_dpm_wait_for_event +ffffffff822fc9a0 T amdgpu_dpm_set_residency_gfxoff +ffffffff822fca20 T amdgpu_dpm_get_residency_gfxoff +ffffffff822fcaa0 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff822fcb20 T amdgpu_dpm_get_status_gfxoff +ffffffff822fcba0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff822fcbf0 T amdgpu_dpm_gfx_state_change +ffffffff822fcc60 T amdgpu_dpm_get_ecc_info +ffffffff822fcce0 T amdgpu_dpm_get_vce_clock_state +ffffffff822fcd70 T amdgpu_dpm_get_current_power_state +ffffffff822fcde0 T amdgpu_dpm_set_power_state +ffffffff822fcf40 T amdgpu_dpm_dispatch_task +ffffffff822fcfe0 T amdgpu_dpm_get_performance_level +ffffffff822fd070 T amdgpu_dpm_force_performance_level +ffffffff822fd250 T amdgpu_dpm_get_pp_num_states +ffffffff822fd2e0 T amdgpu_dpm_get_pp_table +ffffffff822fd370 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff822fd410 T amdgpu_dpm_odn_edit_dpm_table +ffffffff822fd4b0 T amdgpu_dpm_print_clock_levels +ffffffff822fd540 T amdgpu_dpm_emit_clock_levels +ffffffff822fd5e0 T amdgpu_dpm_set_ppfeature_status +ffffffff822fd670 T amdgpu_dpm_get_ppfeature_status +ffffffff822fd700 T amdgpu_dpm_force_clock_level +ffffffff822fd790 T amdgpu_dpm_get_sclk_od +ffffffff822fd810 T amdgpu_dpm_set_sclk_od +ffffffff822fd990 T amdgpu_dpm_get_mclk_od +ffffffff822fda10 T amdgpu_dpm_set_mclk_od +ffffffff822fdb90 T amdgpu_dpm_get_power_profile_mode +ffffffff822fdc20 T amdgpu_dpm_set_power_profile_mode +ffffffff822fdcc0 T amdgpu_dpm_get_gpu_metrics +ffffffff822fdd50 T amdgpu_dpm_get_fan_control_mode +ffffffff822fdde0 T amdgpu_dpm_set_fan_speed_pwm +ffffffff822fde70 T amdgpu_dpm_get_fan_speed_pwm +ffffffff822fdf00 T amdgpu_dpm_get_fan_speed_rpm +ffffffff822fdf90 T amdgpu_dpm_set_fan_speed_rpm +ffffffff822fe020 T amdgpu_dpm_set_fan_control_mode +ffffffff822fe0b0 T amdgpu_dpm_get_power_limit +ffffffff822fe160 T amdgpu_dpm_set_power_limit +ffffffff822fe1f0 T amdgpu_dpm_is_cclk_dpm_supported +ffffffff822fe260 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff822fe2f0 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff822fe390 T amdgpu_dpm_is_overdrive_supported +ffffffff822fe400 T amdgpu_dpm_set_pp_table +ffffffff822fe4a0 T amdgpu_dpm_get_num_cpu_cores +ffffffff822fe4f0 T amdgpu_dpm_stb_debug_fs_init +ffffffff822fe540 T amdgpu_dpm_display_configuration_change +ffffffff822fe5d0 T amdgpu_dpm_get_clock_by_type +ffffffff822fe670 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff822fe700 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff822fe7a0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff822fe840 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff822fe8d0 T amdgpu_dpm_display_clock_voltage_request +ffffffff822fe960 T amdgpu_dpm_get_current_clocks +ffffffff822fe9f0 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff822fea70 T amdgpu_dpm_set_active_display_count +ffffffff822feb00 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff822feb90 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff822fec30 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff822fecd0 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff822fed60 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff822fedf0 T amdgpu_dpm_get_uclk_dpm_states +ffffffff822fee90 T amdgpu_dpm_get_dpm_clock_table +ffffffff822ff000 T amdgpu_dpm_get_active_displays +ffffffff822ff0a0 T amdgpu_dpm_get_vblank_time +ffffffff822ff150 T amdgpu_dpm_get_vrefresh +ffffffff82300000 T amdgpu_pm_sysfs_init +ffffffff82300030 T amdgpu_pm_sysfs_fini +ffffffff82300060 T amdgpu_debugfs_pm_init +ffffffff82301000 T amdgpu_dpm_print_class_info +ffffffff823012b0 T amdgpu_dpm_print_cap_info +ffffffff82301340 T amdgpu_dpm_print_ps_status +ffffffff823013d0 T amdgpu_pm_print_power_states +ffffffff82301460 T amdgpu_get_platform_caps +ffffffff82301500 T amdgpu_parse_extended_power_table +ffffffff823022d0 t amdgpu_parse_clk_voltage_dep_table +ffffffff82302380 T amdgpu_free_extended_power_table +ffffffff82302490 T amdgpu_add_thermal_controller +ffffffff823028e0 T amdgpu_get_vce_clock_state +ffffffff82302920 T amdgpu_legacy_dpm_compute_clocks +ffffffff82302db0 T amdgpu_dpm_thermal_work_handler +ffffffff82303000 t pp_early_init +ffffffff82303100 t pp_late_init +ffffffff82303220 t pp_sw_init +ffffffff823032b0 t pp_sw_fini +ffffffff82303300 t pp_hw_init +ffffffff82303360 t pp_hw_fini +ffffffff823033d0 t pp_late_fini +ffffffff82303430 t pp_suspend +ffffffff82303480 t pp_resume +ffffffff823034a0 t pp_is_idle +ffffffff823034d0 t pp_wait_for_idle +ffffffff82303500 t pp_sw_reset +ffffffff82303530 t pp_set_clockgating_state +ffffffff82303560 t pp_set_powergating_state +ffffffff82303590 t pp_dpm_set_fan_control_mode +ffffffff82303600 t pp_dpm_get_fan_control_mode +ffffffff82303670 t pp_dpm_set_fan_speed_pwm +ffffffff823036d0 t pp_dpm_get_fan_speed_pwm +ffffffff82303730 t pp_dpm_force_clock_level +ffffffff82303790 t pp_dpm_print_clock_levels +ffffffff823037f0 t pp_dpm_emit_clock_levels +ffffffff82303850 t pp_dpm_force_performance_level +ffffffff823038f0 t pp_dpm_get_sclk_od +ffffffff82303950 t pp_dpm_set_sclk_od +ffffffff823039b0 t pp_dpm_get_mclk_od +ffffffff82303a10 t pp_dpm_set_mclk_od +ffffffff82303a70 t pp_dpm_read_sensor +ffffffff82303b30 t pp_dpm_get_performance_level +ffffffff82303b70 t pp_dpm_get_current_power_state +ffffffff82303bf0 t pp_dpm_get_fan_speed_rpm +ffffffff82303c50 t pp_dpm_set_fan_speed_rpm +ffffffff82303cb0 t pp_dpm_get_pp_num_states +ffffffff82303df0 t pp_dpm_get_pp_table +ffffffff82303e40 t pp_dpm_set_pp_table +ffffffff82303f70 t pp_dpm_switch_power_profile +ffffffff823040b0 t pp_dpm_get_vce_clock_state +ffffffff82304100 t pp_dpm_dispatch_tasks +ffffffff82304140 t pp_dpm_load_fw +ffffffff823041b0 t pp_dpm_fw_loading_complete +ffffffff823041e0 t pp_set_powergating_by_smu +ffffffff82304360 t pp_set_clockgating_by_smu +ffffffff823043d0 t pp_set_power_limit +ffffffff82304490 t pp_get_power_limit +ffffffff82304530 t pp_get_power_profile_mode +ffffffff82304590 t pp_set_power_profile_mode +ffffffff823045f0 t pp_set_fine_grain_clk_vol +ffffffff82304650 t pp_odn_edit_dpm_table +ffffffff823046b0 t pp_dpm_set_mp1_state +ffffffff82304710 t pp_smu_i2c_bus_access +ffffffff82304770 t pp_gfx_state_change_set +ffffffff823047d0 t pp_dpm_get_sclk +ffffffff82304820 t pp_dpm_get_mclk +ffffffff82304870 t pp_display_configuration_change +ffffffff823048c0 t pp_get_display_power_level +ffffffff82304900 t pp_get_current_clocks +ffffffff82304a20 t pp_get_clock_by_type +ffffffff82304a70 t pp_get_clock_by_type_with_latency +ffffffff82304ac0 t pp_get_clock_by_type_with_voltage +ffffffff82304b10 t pp_set_watermarks_for_clocks_ranges +ffffffff82304b50 t pp_display_clock_voltage_request +ffffffff82304b90 t pp_get_display_mode_validation_clocks +ffffffff82304bf0 t pp_notify_smu_enable_pwe +ffffffff82304c50 t pp_enable_mgpu_fan_boost +ffffffff82304cb0 t pp_set_active_display_count +ffffffff82304cf0 t pp_set_hard_min_dcefclk_by_freq +ffffffff82304d50 t pp_set_hard_min_fclk_by_freq +ffffffff82304db0 t pp_set_min_deep_sleep_dcefclk +ffffffff82304e10 t pp_get_asic_baco_capability +ffffffff82304e80 t pp_get_asic_baco_state +ffffffff82304ee0 t pp_set_asic_baco_state +ffffffff82304f50 t pp_get_ppfeature_status +ffffffff82304fb0 t pp_set_ppfeature_status +ffffffff82305000 t pp_asic_reset_mode_2 +ffffffff82305060 t pp_set_df_cstate +ffffffff823050c0 t pp_set_xgmi_pstate +ffffffff82305120 t pp_get_gpu_metrics +ffffffff82305180 t pp_get_prv_buffer_details +ffffffff82305200 t pp_pm_compute_clocks +ffffffff823052c0 t pp_swctf_delayed_work_handler +ffffffff82305400 t __delayed_work_tick +ffffffff82306000 T ci_baco_set_state +ffffffff82307000 T baco_program_registers +ffffffff823070d0 t baco_cmd_handler +ffffffff82307250 T soc15_baco_program_registers +ffffffff82308000 T fiji_baco_set_state +ffffffff82309000 T phm_setup_asic +ffffffff82309050 T phm_power_down_asic +ffffffff823090a0 T phm_set_power_state +ffffffff82309110 T phm_enable_dynamic_state_management +ffffffff823091c0 T phm_disable_dynamic_state_management +ffffffff82309260 T phm_force_dpm_levels +ffffffff823092b0 T phm_apply_state_adjust_rules +ffffffff82309300 T phm_apply_clock_adjust_rules +ffffffff82309350 T phm_powerdown_uvd +ffffffff823093a0 T phm_disable_clock_power_gatings +ffffffff823093f0 T phm_pre_display_configuration_changed +ffffffff82309450 T phm_display_configuration_changed +ffffffff823094b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff82309510 T phm_stop_thermal_controller +ffffffff82309570 T phm_register_irq_handlers +ffffffff823095c0 T phm_start_thermal_controller +ffffffff82309710 T phm_check_smc_update_required_for_display_configuration +ffffffff82309770 T phm_check_states_equal +ffffffff823097c0 T phm_store_dal_configuration_data +ffffffff82309910 T phm_get_dal_power_level +ffffffff82309970 T phm_set_cpu_power_state +ffffffff823099c0 T phm_get_performance_level +ffffffff82309a20 T phm_get_clock_info +ffffffff82309b90 T phm_get_current_shallow_sleep_clocks +ffffffff82309be0 T phm_get_clock_by_type +ffffffff82309c30 T phm_get_clock_by_type_with_latency +ffffffff82309c80 T phm_get_clock_by_type_with_voltage +ffffffff82309cd0 T phm_set_watermarks_for_clocks_ranges +ffffffff82309d20 T phm_display_clock_voltage_request +ffffffff82309d70 T phm_get_max_high_clocks +ffffffff82309dc0 T phm_disable_smc_firmware_ctf +ffffffff82309e20 T phm_set_active_display_count +ffffffff8230a000 T hwmgr_early_init +ffffffff8230a460 t polaris_set_asic_special_caps +ffffffff8230a4e0 T hwmgr_sw_init +ffffffff8230a550 T hwmgr_sw_fini +ffffffff8230a5a0 T hwmgr_hw_init +ffffffff8230a760 T hwmgr_hw_fini +ffffffff8230a820 T hwmgr_suspend +ffffffff8230a8a0 T hwmgr_resume +ffffffff8230a940 T hwmgr_handle_task +ffffffff8230b000 T polaris_baco_set_state +ffffffff8230c000 T pp_override_get_default_fuse_value +ffffffff8230d000 T psm_init_power_state_table +ffffffff8230d2a0 T psm_fini_power_state_table +ffffffff8230d360 T psm_set_boot_states +ffffffff8230d410 T psm_set_performance_states +ffffffff8230d4c0 T psm_set_user_performance_state +ffffffff8230d550 T psm_adjust_power_state_dynamic +ffffffff8230e000 T atomctrl_initialize_mc_reg_table +ffffffff8230e210 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff8230e420 T atomctrl_set_engine_dram_timings_rv770 +ffffffff8230e490 T atomctrl_get_memory_pll_dividers_si +ffffffff8230e570 T atomctrl_get_memory_pll_dividers_vi +ffffffff8230e5f0 T atomctrl_get_memory_pll_dividers_ai +ffffffff8230e6a0 T atomctrl_get_engine_pll_dividers_kong +ffffffff8230e720 T atomctrl_get_engine_pll_dividers_vi +ffffffff8230e7f0 T atomctrl_get_engine_pll_dividers_ai +ffffffff8230e8d0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff8230e990 T atomctrl_get_reference_clock +ffffffff8230e9f0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff8230eab0 T atomctrl_get_voltage_table_v3 +ffffffff8230ec10 T atomctrl_get_pp_assign_pin +ffffffff8230ecf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff8230f0c0 t GetScaledFraction +ffffffff8230f150 t fDecodeLeakageID +ffffffff8230f1b0 t fSqrt +ffffffff8230f230 T atomctrl_get_voltage_evv_on_sclk +ffffffff8230f2b0 T atomctrl_get_voltage_evv +ffffffff8230f360 T atomctrl_get_mpll_reference_clock +ffffffff8230f3d0 T atomctrl_is_asic_internal_ss_supported +ffffffff8230f420 T atomctrl_get_memory_clock_spread_spectrum +ffffffff8230f520 T atomctrl_get_engine_clock_spread_spectrum +ffffffff8230f620 T atomctrl_read_efuse +ffffffff8230f6d0 T atomctrl_set_ac_timing_ai +ffffffff8230f730 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff8230f7b0 T atomctrl_get_smc_sclk_range_table +ffffffff8230f860 T atomctrl_get_vddc_shared_railinfo +ffffffff8230f8d0 T atomctrl_get_avfs_information +ffffffff8230fa60 T atomctrl_get_svi2_info +ffffffff8230fb40 T atomctrl_get_leakage_id_from_efuse +ffffffff8230fba0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff8230fd40 T atomctrl_get_voltage_range +ffffffff8230fe00 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff8230fe80 T atomctrl_get_edc_leakage_table +ffffffff82310000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff823100c0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff82310280 T pp_atomfwctrl_get_pp_assign_pin +ffffffff82310360 T pp_atomfwctrl_enter_self_refresh +ffffffff82310390 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff82310440 T pp_atomfwctrl_get_avfs_information +ffffffff82310780 T pp_atomfwctrl_get_gpio_information +ffffffff82310820 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff823108b0 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff82310c30 T pp_atomfwctrl_get_smc_dpm_information +ffffffff82311000 T encode_pcie_lane_width +ffffffff82311030 T decode_pcie_lane_width +ffffffff82312000 t pp_tables_v1_0_initialize +ffffffff82313450 t pp_tables_v1_0_uninitialize +ffffffff82313600 T get_number_of_powerplay_table_entries_v1_0 +ffffffff823136b0 T get_powerplay_table_entry_v1_0 +ffffffff82314000 T pp_tables_get_response_times +ffffffff823140d0 T pp_tables_get_num_of_entries +ffffffff82314190 T pp_tables_get_entry +ffffffff823144a0 t init_non_clock_fields +ffffffff823145e0 t pp_tables_initialize +ffffffff82315760 t pp_tables_uninitialize +ffffffff82315960 t get_number_of_vce_state_table_entries +ffffffff82315a50 t get_vce_state_table_entry +ffffffff82316000 T smu10_init_function_pointers +ffffffff82316040 t smu10_hwmgr_backend_init +ffffffff823166e0 t smu10_hwmgr_backend_fini +ffffffff82316820 t smu10_setup_asic_task +ffffffff82316890 t smu10_get_power_state_size +ffffffff823168c0 t smu10_apply_state_adjust_rules +ffffffff823168f0 t smu10_dpm_force_dpm_level +ffffffff82316e70 t smu10_enable_dpm_tasks +ffffffff82316f30 t smu10_disable_dpm_tasks +ffffffff82316f60 t smu10_dpm_patch_boot_state +ffffffff82316f90 t smu10_dpm_get_pp_table_entry +ffffffff82316ff0 t smu10_dpm_get_num_of_pp_table_entries +ffffffff82317040 t smu10_powergate_vcn +ffffffff823170e0 t smu10_dpm_get_mclk +ffffffff82317140 t smu10_dpm_get_sclk +ffffffff82317190 t smu10_set_power_state_tasks +ffffffff82317200 t smu10_set_cpu_power_state +ffffffff82317230 t smu10_store_cc6_data +ffffffff823172a0 t smu10_get_dal_power_level +ffffffff823172d0 t smu10_get_performance_level +ffffffff82317370 t smu10_get_current_shallow_sleep_clocks +ffffffff823173d0 t smu10_get_clock_by_type_with_latency +ffffffff82317520 t smu10_get_clock_by_type_with_voltage +ffffffff82317630 t smu10_set_watermarks_for_clocks_ranges +ffffffff82317700 t smu10_display_clock_voltage_request +ffffffff823177a0 t smu10_get_max_high_clocks +ffffffff823177d0 t smu10_power_off_asic +ffffffff82317820 t smu10_force_clock_level +ffffffff823179e0 t smu10_print_clock_levels +ffffffff82317dd0 t smu10_gfx_off_control +ffffffff82317ee0 t smu10_read_sensor +ffffffff82318070 t smu10_set_active_display_count +ffffffff823180d0 t smu10_set_min_deep_sleep_dcefclk +ffffffff82318130 t smu10_get_power_profile_mode +ffffffff82318170 t smu10_set_power_profile_mode +ffffffff823182a0 t smu10_set_fine_grain_clk_vol +ffffffff823184b0 t smu10_powergate_mmhub +ffffffff823184d0 t smu10_smus_notify_pwe +ffffffff823184f0 t smu10_powergate_sdma +ffffffff82318510 t smu10_set_hard_min_dcefclk_by_freq +ffffffff82318570 t smu10_set_hard_min_fclk_by_freq +ffffffff823185d0 t smu10_set_hard_min_gfxclk_by_freq +ffffffff82318630 t smu10_set_soft_max_gfxclk_by_freq +ffffffff82318690 t smu10_asic_reset +ffffffff823186b0 t smu10_gfx_state_change +ffffffff823186f0 t smu10_dpm_get_pp_table_entry_callback +ffffffff82319000 T smu7_baco_get_capability +ffffffff82319060 T smu7_baco_get_state +ffffffff823190b0 T smu7_baco_set_state +ffffffff8231a000 T smu7_powerdown_uvd +ffffffff8231a050 T smu7_disable_clock_power_gating +ffffffff8231a0e0 T smu7_powergate_uvd +ffffffff8231a1d0 T smu7_powergate_vce +ffffffff8231a2c0 T smu7_update_clock_gatings +ffffffff8231a670 T smu7_powergate_gfx +ffffffff8231b000 T smu7_get_sleep_divider_id_from_clock +ffffffff8231b0a0 T smu7_init_function_pointers +ffffffff8231b100 t smu7_hwmgr_backend_init +ffffffff8231ced0 t smu7_hwmgr_backend_fini +ffffffff8231cf40 t smu7_setup_asic_task +ffffffff8231d2b0 t smu7_get_power_state_size +ffffffff8231d2e0 t smu7_apply_state_adjust_rules +ffffffff8231d780 t smu7_force_dpm_level +ffffffff8231dc90 t smu7_enable_dpm_tasks +ffffffff82320520 t smu7_disable_dpm_tasks +ffffffff82320b60 t smu7_dpm_patch_boot_state +ffffffff82320ca0 t smu7_get_pp_table_entry +ffffffff823210a0 t smu7_get_number_of_powerplay_table_entries +ffffffff82321110 t smu7_dpm_get_mclk +ffffffff823211b0 t smu7_dpm_get_sclk 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smu7_disable_smc_cac +ffffffff82326970 T smu7_set_power_limit +ffffffff823269d0 T smu7_enable_power_containment +ffffffff82326b60 T smu7_disable_power_containment +ffffffff82326c80 T smu7_power_control_set_level +ffffffff82327000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff82327080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff82327150 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff82327200 T smu7_fan_ctrl_set_static_mode +ffffffff82327330 T smu7_fan_ctrl_set_default_mode +ffffffff82327410 T smu7_fan_ctrl_start_smc_fan_control +ffffffff82327540 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff82327560 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff82327740 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff82327930 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff82327b10 T smu7_thermal_get_temperature +ffffffff82327b70 T smu7_thermal_disable_alert +ffffffff82327c10 T smu7_thermal_stop_thermal_controller +ffffffff82327d90 T smu7_start_thermal_controller +ffffffff82328120 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff82329000 T smu8_init_function_pointers +ffffffff82329040 t smu8_hwmgr_backend_init +ffffffff82329520 t smu8_hwmgr_backend_fini +ffffffff823295a0 t smu8_setup_asic_task +ffffffff82329ac0 t smu8_get_power_state_size +ffffffff82329af0 t smu8_apply_state_adjust_rules +ffffffff82329c40 t smu8_dpm_force_dpm_level +ffffffff82329f20 t smu8_enable_dpm_tasks +ffffffff8232a0b0 t smu8_disable_dpm_tasks +ffffffff8232a190 t smu8_dpm_patch_boot_state +ffffffff8232a1f0 t smu8_dpm_get_pp_table_entry +ffffffff8232a250 t smu8_dpm_get_num_of_pp_table_entries +ffffffff8232a2a0 t smu8_dpm_powerdown_uvd +ffffffff8232a2f0 t smu8_dpm_powergate_vce +ffffffff8232a4c0 t smu8_dpm_powergate_uvd +ffffffff8232a6d0 t smu8_dpm_powergate_acp +ffffffff8232a730 t smu8_dpm_get_mclk +ffffffff8232a760 t smu8_dpm_get_sclk +ffffffff8232a7d0 t smu8_set_power_state_tasks +ffffffff8232aad0 t smu8_set_cpu_power_state +ffffffff8232ab50 t smu8_store_cc6_data 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phm_wait_for_register_unequal +ffffffff8232d580 T phm_wait_for_indirect_register_unequal +ffffffff8232d680 T phm_cf_want_uvd_power_gating +ffffffff8232d6c0 T phm_cf_want_vce_power_gating +ffffffff8232d700 T phm_trim_voltage_table +ffffffff8232d820 T phm_get_svi2_mvdd_voltage_table +ffffffff8232d9a0 T phm_get_svi2_vddci_voltage_table +ffffffff8232db20 T phm_get_svi2_vdd_voltage_table +ffffffff8232dbc0 T phm_trim_voltage_table_to_fit_state_table +ffffffff8232dcb0 T phm_reset_single_dpm_table +ffffffff8232dd10 T phm_setup_pcie_table_entry +ffffffff8232dd50 T phm_get_dpm_level_enable_mask_value +ffffffff8232de30 T phm_get_voltage_index +ffffffff8232deb0 T phm_get_voltage_id +ffffffff8232df30 T phm_find_closest_vddci +ffffffff8232dfa0 T phm_find_boot_level +ffffffff8232e010 T phm_get_sclk_for_voltage_evv +ffffffff8232e0d0 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff8232e1e0 T phm_get_lowest_enabled_level +ffffffff8232e220 T phm_apply_dal_min_voltage_request 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vega10_power_gate_uvd +ffffffff82335e10 t vega10_dpm_get_mclk +ffffffff82335eb0 t vega10_dpm_get_sclk +ffffffff82335f50 t vega10_set_power_state_tasks +ffffffff823368b0 t vega10_notify_smc_display_config_after_ps_adjustment +ffffffff82336a60 t vega10_display_configuration_changed_task +ffffffff82336b30 t vega10_set_fan_control_mode +ffffffff82336ba0 t vega10_get_fan_control_mode +ffffffff82336be0 t vega10_check_smc_update_required_for_display_configuration +ffffffff82336c40 t vega10_check_states_equal +ffffffff82336da0 t vega10_get_dal_power_level +ffffffff82336de0 t vega10_get_performance_level +ffffffff82336e70 t vega10_get_clock_by_type_with_latency +ffffffff82337060 t vega10_get_clock_by_type_with_voltage +ffffffff82337140 t vega10_set_watermarks_for_clocks_ranges +ffffffff823371a0 t vega10_display_clock_voltage_request +ffffffff82337220 t vega10_power_off_asic +ffffffff82337290 t vega10_force_clock_level +ffffffff823373c0 t vega10_emit_clock_levels +ffffffff82337530 t vega10_print_clock_levels +ffffffff82337cd0 t vega10_get_sclk_od +ffffffff82337d40 t vega10_set_sclk_od +ffffffff82337e40 t vega10_get_mclk_od +ffffffff82337eb0 t vega10_set_mclk_od +ffffffff82337fa0 t vega10_read_sensor +ffffffff82338200 t vega10_avfs_enable +ffffffff823382c0 t vega10_notify_cac_buffer_info +ffffffff82338370 t vega10_get_thermal_temperature_range +ffffffff82338490 t vega10_get_power_profile_mode +ffffffff823384d0 t vega10_set_power_profile_mode +ffffffff823385f0 t vega10_odn_edit_dpm_table +ffffffff82338b60 t vega10_get_ppfeature_status +ffffffff82338be0 t vega10_set_ppfeature_status +ffffffff82338c80 t vega10_set_mp1_state +ffffffff82338cf0 t vega10_disable_power_features_for_compute_performance +ffffffff82338ee0 t vega10_upload_dpm_bootup_level +ffffffff82338ff0 t vega10_upload_dpm_max_level +ffffffff823390d0 t vega10_odn_initial_default_setting +ffffffff823392b0 t vega10_populate_all_graphic_levels +ffffffff823394c0 t vega10_populate_all_memory_levels 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vega10_fan_ctrl_get_fan_speed_pwm +ffffffff8233f1b0 T vega10_fan_ctrl_get_fan_speed_rpm +ffffffff8233f2b0 T vega10_fan_ctrl_set_static_mode +ffffffff8233f570 T vega10_fan_ctrl_set_default_mode +ffffffff8233f790 T vega10_fan_ctrl_start_smc_fan_control +ffffffff8233f850 T vega10_fan_ctrl_stop_smc_fan_control +ffffffff8233f910 T vega10_fan_ctrl_set_fan_speed_pwm +ffffffff8233fb50 T vega10_fan_ctrl_reset_fan_speed_to_default +ffffffff8233fc10 T vega10_fan_ctrl_set_fan_speed_rpm +ffffffff8233fdf0 T vega10_thermal_get_temperature +ffffffff8233fe80 T vega10_thermal_disable_alert +ffffffff8233ff90 T vega10_thermal_stop_thermal_controller +ffffffff8233fff0 T vega10_enable_mgpu_fan_boost +ffffffff82340100 T vega10_start_thermal_controller +ffffffff823406c0 T vega10_thermal_ctrl_uninitialize_thermal_controller +ffffffff82341000 T vega12_baco_set_state +ffffffff82342000 T vega12_enable_disable_vce_dpm +ffffffff82342090 T vega12_hwmgr_init +ffffffff823420d0 t vega12_hwmgr_backend_init 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vega12_pp_tables_uninitialize +ffffffff82348000 T vega12_fan_ctrl_get_fan_speed_info +ffffffff82348050 T vega12_fan_ctrl_get_fan_speed_rpm +ffffffff823480c0 T vega12_fan_ctrl_start_smc_fan_control +ffffffff823480f0 T vega12_fan_ctrl_stop_smc_fan_control +ffffffff82348120 T vega12_fan_ctrl_reset_fan_speed_to_default +ffffffff82348150 T vega12_thermal_get_temperature +ffffffff823481e0 T vega12_thermal_disable_alert +ffffffff82348270 T vega12_thermal_stop_thermal_controller +ffffffff82348300 T vega12_start_thermal_controller +ffffffff82349000 T vega20_baco_get_capability +ffffffff823490c0 T vega20_baco_get_state +ffffffff82349160 T vega20_baco_set_state +ffffffff82349360 T vega20_baco_apply_vdci_flush_workaround +ffffffff8234a000 T vega20_hwmgr_init +ffffffff8234a040 t vega20_hwmgr_backend_init +ffffffff8234a940 t vega20_hwmgr_backend_fini +ffffffff8234a9a0 t vega20_setup_asic_task +ffffffff8234aa90 t vega20_apply_clocks_adjust_rules +ffffffff8234af40 t vega20_dpm_force_dpm_level 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sienna_cichlid_dump_pptable +ffffffff8238dac0 t sienna_cichlid_get_power_limit +ffffffff8238db90 t sienna_cichlid_update_pcie_parameters +ffffffff8238dcc0 t sienna_cichlid_i2c_control_init +ffffffff8238ddf0 t sienna_cichlid_i2c_control_fini +ffffffff8238de30 t sienna_cichlid_get_unique_id +ffffffff8238df80 t sienna_cichlid_init_smc_tables +ffffffff8238e2a0 t sienna_cichlid_set_mp1_state +ffffffff8238e2e0 t sienna_cichlid_setup_pptable +ffffffff8238e720 t sienna_cichlid_system_features_control +ffffffff8238e7b0 t sienna_cichlid_baco_enter +ffffffff8238e800 t sienna_cichlid_baco_exit +ffffffff8238e900 t sienna_cichlid_is_mode1_reset_supported +ffffffff8238e980 t sienna_cichlid_is_mode2_reset_supported +ffffffff8238e9b0 t sienna_cichlid_mode2_reset +ffffffff8238eaf0 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff8238eb10 t sienna_cichlid_get_gpu_metrics +ffffffff8238f090 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff8238f0e0 t sienna_cichlid_get_fan_parameters +ffffffff8238f120 t sienna_cichlid_gpo_control +ffffffff8238f1d0 t sienna_cichlid_get_ecc_info +ffffffff8238f2c0 t sienna_cichlid_stb_get_data_direct +ffffffff8238f360 t sienna_cichlid_get_default_config_table_settings +ffffffff8238f3d0 t sienna_cichlid_set_config_table +ffffffff8238f4a0 t sienna_cichlid_get_throttler_status_locked +ffffffff8238f600 t sienna_cichlid_get_smartshift_power_percentage +ffffffff8238f730 t sienna_cichlid_i2c_xfer +ffffffff8238f9d0 t sienna_cichlid_i2c_func +ffffffff82390000 T smu_v11_0_init_microcode +ffffffff82390140 T smu_v11_0_fini_microcode +ffffffff82390190 T smu_v11_0_load_microcode +ffffffff823902d0 T smu_v11_0_check_fw_status +ffffffff82390320 T smu_v11_0_check_fw_version +ffffffff82390490 T smu_v11_0_setup_pptable +ffffffff823905b0 T smu_v11_0_init_smc_tables +ffffffff82390710 T smu_v11_0_fini_smc_tables +ffffffff82390940 T smu_v11_0_init_power +ffffffff823909d0 T smu_v11_0_fini_power +ffffffff82390a30 T smu_v11_0_get_vbios_bootup_values +ffffffff82390d90 T smu_v11_0_notify_memory_pool_location +ffffffff82390e80 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff82390f00 T smu_v11_0_set_driver_table_location +ffffffff82390f70 T smu_v11_0_set_tool_table_location +ffffffff82390fe0 T smu_v11_0_init_display_count +ffffffff82391040 T smu_v11_0_set_allowed_mask +ffffffff82391110 T smu_v11_0_system_features_control +ffffffff82391130 T smu_v11_0_notify_display_change +ffffffff823911a0 T smu_v11_0_init_max_sustainable_clocks +ffffffff82391400 t smu_v11_0_get_max_sustainable_clock +ffffffff82391520 T smu_v11_0_get_current_power_limit +ffffffff823915f0 T smu_v11_0_set_power_limit +ffffffff82391730 T smu_v11_0_interrupt_work +ffffffff823917b0 T smu_v11_0_enable_thermal_alert +ffffffff82391850 T smu_v11_0_disable_thermal_alert +ffffffff82391870 T smu_v11_0_get_gfx_vdd +ffffffff82391930 T smu_v11_0_display_clock_voltage_request +ffffffff82391a80 T smu_v11_0_set_hard_freq_limited_range +ffffffff82391b60 T smu_v11_0_gfx_off_control +ffffffff82391bd0 T smu_v11_0_get_fan_control_mode +ffffffff82391c20 T smu_v11_0_set_fan_speed_pwm +ffffffff82391dd0 t smu_v11_0_set_fan_static_mode +ffffffff82391f90 T smu_v11_0_set_fan_speed_rpm +ffffffff823920d0 T smu_v11_0_get_fan_speed_pwm +ffffffff82392210 T smu_v11_0_get_fan_speed_rpm +ffffffff82392310 T smu_v11_0_set_fan_control_mode +ffffffff823924b0 T smu_v11_0_set_xgmi_pstate +ffffffff823924d0 T smu_v11_0_register_irq_handler +ffffffff82392590 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff82392620 T smu_v11_0_set_azalia_d3_pme +ffffffff82392640 T smu_v11_0_baco_set_armd3_sequence +ffffffff82392660 T smu_v11_0_baco_is_support +ffffffff823926f0 T smu_v11_0_baco_get_state +ffffffff82392720 T smu_v11_0_baco_set_state +ffffffff823929d0 T smu_v11_0_baco_enter +ffffffff82392ac0 T smu_v11_0_baco_exit +ffffffff82392bf0 T smu_v11_0_mode1_reset +ffffffff82392c70 T smu_v11_0_handle_passthrough_sbr +ffffffff82392c90 T smu_v11_0_get_dpm_ultimate_freq +ffffffff82392dd0 T smu_v11_0_set_soft_freq_limited_range +ffffffff82392ea0 T smu_v11_0_set_performance_level +ffffffff823931f0 T smu_v11_0_set_power_source +ffffffff82393250 T smu_v11_0_get_dpm_freq_by_index +ffffffff82393300 T smu_v11_0_get_dpm_level_count +ffffffff823933a0 T smu_v11_0_set_single_dpm_table +ffffffff82393600 T smu_v11_0_get_dpm_level_range +ffffffff82393760 T smu_v11_0_get_current_pcie_link_width_level +ffffffff823937b0 T smu_v11_0_get_current_pcie_link_width +ffffffff82393810 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff82393860 T smu_v11_0_get_current_pcie_link_speed +ffffffff823938c0 T smu_v11_0_gfx_ulv_control +ffffffff82393930 T smu_v11_0_deep_sleep_control +ffffffff82393ae0 T smu_v11_0_restore_user_od_settings +ffffffff82393b70 T smu_v11_0_set_smu_mailbox_registers +ffffffff82393be0 t smu_v11_0_set_irq_state +ffffffff82394190 t smu_v11_0_irq_process +ffffffff82395000 T vangogh_set_ppt_funcs +ffffffff82395040 t vangogh_set_default_dpm_tables +ffffffff82395070 t vangogh_common_print_clk_levels +ffffffff823954e0 t vangogh_force_clk_levels +ffffffff82395710 t vangogh_od_edit_dpm_table +ffffffff82395c40 t vangogh_get_power_profile_mode +ffffffff82395d40 t vangogh_set_power_profile_mode +ffffffff82395e60 t vangogh_dpm_set_vcn_enable +ffffffff82395eb0 t vangogh_dpm_set_jpeg_enable +ffffffff82395f00 t vangogh_read_sensor +ffffffff82396530 t vangogh_get_apu_thermal_limit +ffffffff82396550 t vangogh_set_apu_thermal_limit +ffffffff82396570 t vangogh_is_dpm_running +ffffffff823965d0 t vangogh_set_watermarks_table +ffffffff82396750 t vangogh_set_performance_level +ffffffff82396f60 t vangogh_get_power_limit +ffffffff823970c0 t vangogh_get_ppt_limit +ffffffff82397130 t vangogh_get_dpm_clock_table +ffffffff823972a0 t vangogh_init_smc_tables +ffffffff823974e0 t vangogh_system_features_control +ffffffff82397530 t vangogh_set_power_limit +ffffffff82397680 t vangogh_get_gfxoff_status +ffffffff82397710 t vangogh_get_gfxoff_entrycount +ffffffff82397780 t vangogh_set_gfxoff_residency +ffffffff823977f0 t vangogh_get_gfxoff_residency +ffffffff82397830 t vangogh_mode2_reset +ffffffff82397970 t vangogh_common_get_gpu_metrics +ffffffff823980f0 t vangogh_post_smu_init +ffffffff82398280 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff823982f0 t vangogh_force_dpm_limit_value +ffffffff82398420 t vangogh_get_dpm_ultimate_freq +ffffffff823987e0 t vangogh_set_soft_freq_limited_range +ffffffff82398960 t vangogh_get_gpu_metrics_v2_3 +ffffffff82399000 T renoir_set_ppt_funcs +ffffffff823990a0 t renoir_get_current_power_state +ffffffff82399120 t renoir_print_clk_levels +ffffffff82399530 t renoir_force_clk_levels +ffffffff82399750 t renoir_od_edit_dpm_table +ffffffff82399a30 t renoir_get_power_profile_mode +ffffffff82399b00 t renoir_set_power_profile_mode +ffffffff82399c20 t renoir_dpm_set_vcn_enable +ffffffff82399ca0 t renoir_dpm_set_jpeg_enable +ffffffff82399d20 t renoir_read_sensor +ffffffff8239a0d0 t renoir_is_dpm_running +ffffffff8239a110 t renoir_set_watermarks_table +ffffffff8239a2b0 t renoir_set_performance_level +ffffffff8239a7d0 t renoir_get_dpm_clock_table +ffffffff8239ab20 t renoir_init_smc_tables +ffffffff8239ac90 t renoir_get_enabled_mask +ffffffff8239acd0 t renoir_get_dpm_ultimate_freq +ffffffff8239af70 t renoir_get_gpu_metrics +ffffffff8239b190 t renoir_gfx_state_change_set +ffffffff8239b1c0 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff8239b260 t renoir_force_dpm_limit_value +ffffffff8239c000 T smu_v12_0_check_fw_status +ffffffff8239c050 T smu_v12_0_check_fw_version +ffffffff8239c0c0 T smu_v12_0_powergate_sdma +ffffffff8239c110 T smu_v12_0_set_gfx_cgpg +ffffffff8239c170 T smu_v12_0_get_gfxoff_status +ffffffff8239c200 T smu_v12_0_gfx_off_control +ffffffff8239c320 T smu_v12_0_fini_smc_tables +ffffffff8239c3d0 T smu_v12_0_set_default_dpm_tables +ffffffff8239c400 T smu_v12_0_mode2_reset +ffffffff8239c420 T smu_v12_0_set_soft_freq_limited_range +ffffffff8239c560 T smu_v12_0_set_driver_table_location +ffffffff8239c5d0 T smu_v12_0_get_vbios_bootup_values +ffffffff8239d000 T aldebaran_set_ppt_funcs +ffffffff8239d050 t aldebaran_get_allowed_feature_mask +ffffffff8239d0a0 t aldebaran_set_default_dpm_table +ffffffff8239d2a0 t aldebaran_populate_umd_state_clk +ffffffff8239d3a0 t aldebaran_print_clk_levels +ffffffff8239d560 t aldebaran_force_clk_levels +ffffffff8239d720 t aldebaran_usr_edit_dpm_table +ffffffff8239d940 t aldebaran_read_sensor +ffffffff8239db60 t aldebaran_is_dpm_running +ffffffff8239dbb0 t aldebaran_get_thermal_temperature_range +ffffffff8239dc80 t aldebaran_set_performance_level +ffffffff8239dd30 t aldebaran_get_power_limit +ffffffff8239dec0 t aldebaran_set_df_cstate +ffffffff8239df40 t aldebaran_allow_xgmi_power_down +ffffffff8239dfe0 t aldebaran_i2c_control_init +ffffffff8239e0a0 t aldebaran_i2c_control_fini +ffffffff8239e0e0 t aldebaran_get_unique_id +ffffffff8239e1c0 t aldebaran_init_smc_tables +ffffffff8239e380 t aldebaran_set_mp1_state +ffffffff8239e3c0 t aldebaran_setup_pptable +ffffffff8239e490 t aldebaran_system_features_control +ffffffff8239e5f0 t aldebaran_set_power_limit +ffffffff8239e680 t aldebaran_is_baco_supported +ffffffff8239e6b0 t aldebaran_is_mode1_reset_supported +ffffffff8239e6e0 t aldebaran_is_mode2_reset_supported +ffffffff8239e710 t aldebaran_mode1_reset +ffffffff8239e7f0 t aldebaran_mode2_reset +ffffffff8239eb10 t aldebaran_set_soft_freq_limited_range +ffffffff8239ed10 t aldebaran_log_thermal_throttling_event +ffffffff8239f020 t aldebaran_get_gpu_metrics +ffffffff8239f2a0 t aldebaran_smu_handle_passthrough_sbr +ffffffff8239f2c0 t aldebaran_smu_send_hbm_bad_page_num +ffffffff8239f340 t aldebaran_get_ecc_info +ffffffff8239f4a0 t aldebaran_send_hbm_bad_channel_flag +ffffffff8239f570 t aldebaran_get_current_clk_freq_by_table +ffffffff8239f6b0 t aldebaran_get_smu_metrics_data +ffffffff8239f920 t aldebaran_upload_dpm_level +ffffffff8239fa10 t aldebaran_i2c_xfer +ffffffff8239fcb0 t aldebaran_i2c_func +ffffffff823a0000 T smu_v13_0_init_microcode +ffffffff823a0120 T smu_v13_0_fini_microcode +ffffffff823a0170 T smu_v13_0_load_microcode +ffffffff823a01a0 T smu_v13_0_init_pptable_microcode +ffffffff823a0350 T smu_v13_0_get_pptable_from_firmware +ffffffff823a0470 T smu_v13_0_check_fw_status +ffffffff823a04e0 T smu_v13_0_check_fw_version +ffffffff823a0560 T smu_v13_0_setup_pptable +ffffffff823a06f0 T smu_v13_0_init_smc_tables +ffffffff823a0870 T smu_v13_0_fini_smc_tables +ffffffff823a0a80 T smu_v13_0_init_power +ffffffff823a0b00 T smu_v13_0_fini_power +ffffffff823a0b80 T smu_v13_0_get_vbios_bootup_values +ffffffff823a0e20 T smu_v13_0_notify_memory_pool_location +ffffffff823a0ee0 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff823a0f60 T smu_v13_0_set_driver_table_location +ffffffff823a0fd0 T smu_v13_0_set_tool_table_location +ffffffff823a1040 T smu_v13_0_init_display_count +ffffffff823a1080 T smu_v13_0_set_allowed_mask +ffffffff823a1150 T smu_v13_0_gfx_off_control +ffffffff823a11d0 T smu_v13_0_system_features_control +ffffffff823a11f0 T smu_v13_0_notify_display_change +ffffffff823a1250 T smu_v13_0_init_max_sustainable_clocks +ffffffff823a14b0 t smu_v13_0_get_max_sustainable_clock +ffffffff823a15d0 T smu_v13_0_get_current_power_limit +ffffffff823a16a0 T smu_v13_0_set_power_limit +ffffffff823a17b0 T smu_v13_0_enable_thermal_alert +ffffffff823a1840 T smu_v13_0_disable_thermal_alert +ffffffff823a1880 T smu_v13_0_get_gfx_vdd +ffffffff823a1940 T smu_v13_0_display_clock_voltage_request +ffffffff823a1a90 T smu_v13_0_set_hard_freq_limited_range +ffffffff823a1b70 T smu_v13_0_get_fan_control_mode +ffffffff823a1bc0 T smu_v13_0_set_fan_speed_pwm +ffffffff823a1de0 t smu_v13_0_set_fan_static_mode +ffffffff823a1fb0 T smu_v13_0_set_fan_control_mode +ffffffff823a2110 T smu_v13_0_set_fan_speed_rpm +ffffffff823a22c0 T smu_v13_0_set_xgmi_pstate +ffffffff823a22e0 T smu_v13_0_register_irq_handler +ffffffff823a23b0 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff823a2440 T smu_v13_0_set_azalia_d3_pme +ffffffff823a2460 T smu_v13_0_wait_for_event +ffffffff823a24b0 T smu_v13_0_get_dpm_ultimate_freq +ffffffff823a2610 T smu_v13_0_set_soft_freq_limited_range +ffffffff823a26e0 T smu_v13_0_set_performance_level +ffffffff823a2e40 T smu_v13_0_set_power_source +ffffffff823a2ea0 T smu_v13_0_get_dpm_freq_by_index +ffffffff823a2f50 T smu_v13_0_set_single_dpm_table +ffffffff823a3240 T smu_v13_0_get_current_pcie_link_width_level +ffffffff823a3290 T smu_v13_0_get_current_pcie_link_width +ffffffff823a32f0 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff823a3340 T smu_v13_0_get_current_pcie_link_speed +ffffffff823a3390 T smu_v13_0_set_vcn_enable +ffffffff823a3450 T smu_v13_0_set_jpeg_enable +ffffffff823a3470 T smu_v13_0_run_btc +ffffffff823a34f0 T smu_v13_0_gpo_control +ffffffff823a3580 T smu_v13_0_deep_sleep_control +ffffffff823a37e0 T smu_v13_0_gfx_ulv_control +ffffffff823a3850 T smu_v13_0_baco_set_armd3_sequence +ffffffff823a38c0 T smu_v13_0_baco_is_support +ffffffff823a3950 T smu_v13_0_baco_get_state +ffffffff823a3980 T smu_v13_0_baco_set_state +ffffffff823a3a50 T smu_v13_0_baco_enter +ffffffff823a3b70 T smu_v13_0_baco_exit +ffffffff823a3c10 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff823a3c50 T smu_v13_0_od_edit_dpm_table +ffffffff823a3f00 T smu_v13_0_set_default_dpm_tables +ffffffff823a3f30 T smu_v13_0_set_smu_mailbox_registers +ffffffff823a3fa0 T smu_v13_0_mode1_reset +ffffffff823a4020 T smu_v13_0_update_pcie_parameters +ffffffff823a4290 t smu_v13_0_set_irq_state +ffffffff823a4840 t smu_v13_0_irq_process +ffffffff823a5000 T smu_v13_0_0_set_ppt_funcs +ffffffff823a50f0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff823a5230 t smu_v13_0_0_set_default_dpm_table +ffffffff823a5650 t smu_v13_0_0_populate_umd_state_clk +ffffffff823a5790 t smu_v13_0_0_print_clk_levels +ffffffff823a58a0 t smu_v13_0_0_force_clk_levels +ffffffff823a5a20 t smu_v13_0_0_od_edit_dpm_table +ffffffff823a5ef0 t smu_v13_0_0_restore_user_od_settings +ffffffff823a5fb0 t smu_v13_0_0_get_power_profile_mode +ffffffff823a60b0 t smu_v13_0_0_set_power_profile_mode +ffffffff823a6300 t smu_v13_0_0_read_sensor +ffffffff823a6520 t smu_v13_0_0_is_dpm_running +ffffffff823a6570 t smu_v13_0_0_get_fan_speed_pwm +ffffffff823a6650 t smu_v13_0_0_get_fan_speed_rpm +ffffffff823a66c0 t smu_v13_0_0_get_thermal_temperature_range +ffffffff823a67c0 t smu_v13_0_0_set_default_od_settings +ffffffff823a68f0 t smu_v13_0_0_dump_pptable +ffffffff823a6920 t smu_v13_0_0_get_power_limit +ffffffff823a6a00 t smu_v13_0_0_set_df_cstate +ffffffff823a6a20 t smu_v13_0_0_i2c_control_init +ffffffff823a6b50 t smu_v13_0_0_i2c_control_fini +ffffffff823a6b90 t smu_v13_0_0_get_unique_id +ffffffff823a6c30 t smu_v13_0_0_init_smc_tables +ffffffff823a6e80 t smu_v13_0_0_set_mp1_state +ffffffff823a6ec0 t smu_v13_0_0_setup_pptable +ffffffff823a7020 t smu_v13_0_0_system_features_control +ffffffff823a7030 t smu_v13_0_0_baco_enter +ffffffff823a7090 t smu_v13_0_0_baco_exit +ffffffff823a70f0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff823a7150 t smu_v13_0_0_mode1_reset +ffffffff823a7270 t smu_v13_0_0_mode2_reset +ffffffff823a72c0 t smu_v13_0_0_enable_gfx_features +ffffffff823a7310 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff823a7430 t smu_v13_0_0_get_gpu_metrics +ffffffff823a7870 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff823a78c0 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff823a7940 t smu_v13_0_0_get_ecc_info +ffffffff823a7a40 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff823a7ac0 t smu_v13_0_0_i2c_xfer +ffffffff823a7d60 t smu_v13_0_0_i2c_func +ffffffff823a8000 T smu_v13_0_4_set_ppt_funcs +ffffffff823a80c0 t smu_v13_0_4_print_clk_levels +ffffffff823a8130 t smu_v13_0_4_force_clk_levels +ffffffff823a83f0 t smu_v13_0_4_read_sensor +ffffffff823a86d0 t smu_v13_0_4_is_dpm_running +ffffffff823a8720 t smu_v13_0_4_set_watermarks_table +ffffffff823a88a0 t smu_v13_0_4_set_performance_level +ffffffff823a9450 t smu_v13_0_4_init_smc_tables +ffffffff823a95c0 t smu_v13_0_4_fini_smc_tables +ffffffff823a9670 t smu_v13_0_4_system_features_control +ffffffff823a96c0 t smu_v13_0_4_mode2_reset +ffffffff823a96e0 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff823a9b00 t smu_v13_0_4_get_gpu_metrics +ffffffff823a9cd0 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff823a9d30 t smu_v13_0_4_get_current_clk_freq +ffffffff823aa000 T smu_v13_0_5_set_ppt_funcs +ffffffff823aa0a0 t smu_v13_0_5_set_default_dpm_tables +ffffffff823aa0d0 t smu_v13_0_5_print_clk_levels +ffffffff823aa160 t smu_v13_0_5_force_clk_levels +ffffffff823aa2d0 t smu_v13_0_5_od_edit_dpm_table +ffffffff823aa580 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff823aa5a0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff823aa5c0 t smu_v13_0_5_read_sensor +ffffffff823aa7e0 t smu_v13_0_5_is_dpm_running +ffffffff823aa830 t smu_v13_0_5_set_watermarks_table +ffffffff823aa9b0 t smu_v13_0_5_set_performance_level +ffffffff823aaf50 t smu_v13_0_5_init_smc_tables +ffffffff823ab0c0 t smu_v13_0_5_fini_smc_tables +ffffffff823ab170 t smu_v13_0_5_system_features_control +ffffffff823ab1c0 t smu_v13_0_5_mode2_reset +ffffffff823ab240 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff823ab680 t smu_v13_0_5_get_gpu_metrics +ffffffff823ab7d0 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff823ac000 T smu_v13_0_6_set_ppt_funcs +ffffffff823ac050 t smu_v13_0_6_get_allowed_feature_mask +ffffffff823ac0a0 t smu_v13_0_6_set_default_dpm_table +ffffffff823ac5a0 t smu_v13_0_6_populate_umd_state_clk +ffffffff823ac6a0 t smu_v13_0_6_print_clk_levels +ffffffff823aca10 t smu_v13_0_6_force_clk_levels +ffffffff823acbd0 t smu_v13_0_6_usr_edit_dpm_table +ffffffff823acdf0 t smu_v13_0_6_read_sensor +ffffffff823ad380 t smu_v13_0_6_is_dpm_running +ffffffff823ad400 t smu_v13_0_6_get_thermal_temperature_range +ffffffff823ad550 t smu_v13_0_6_set_performance_level +ffffffff823ad660 t smu_v13_0_6_get_power_limit +ffffffff823ad730 t smu_v13_0_6_set_df_cstate +ffffffff823ad750 t smu_v13_0_6_allow_xgmi_power_down +ffffffff823ad770 t smu_v13_0_6_i2c_control_init +ffffffff823ad8a0 t smu_v13_0_6_i2c_control_fini +ffffffff823ad8e0 t smu_v13_0_6_get_unique_id +ffffffff823ad960 t smu_v13_0_6_init_smc_tables +ffffffff823adaf0 t smu_v13_0_6_check_fw_status +ffffffff823adb40 t smu_v13_0_6_setup_pptable +ffffffff823adb70 t smu_v13_0_6_system_features_control +ffffffff823adc10 t smu_v13_0_6_get_enabled_mask +ffffffff823adc80 t smu_v13_0_6_set_power_limit +ffffffff823adca0 t smu_v13_0_6_register_irq_handler +ffffffff823add00 t smu_v13_0_6_is_baco_supported +ffffffff823add30 t smu_v13_0_6_is_mode1_reset_supported +ffffffff823add60 t smu_v13_0_6_is_mode2_reset_supported +ffffffff823add90 t smu_v13_0_6_mode1_reset +ffffffff823ade40 t smu_v13_0_6_mode2_reset +ffffffff823ae0f0 t smu_v13_0_6_get_dpm_ultimate_freq +ffffffff823ae300 t smu_v13_0_6_set_soft_freq_limited_range +ffffffff823ae530 t smu_v13_0_6_log_thermal_throttling_event +ffffffff823ae820 t smu_v13_0_6_get_gpu_metrics +ffffffff823aeb70 t smu_v13_0_6_smu_send_hbm_bad_page_num +ffffffff823aebf0 t smu_v13_0_6_get_smu_metrics_data +ffffffff823aee80 t smu_v13_0_6_upload_dpm_level +ffffffff823aef80 t smu_v13_0_6_i2c_xfer +ffffffff823af280 t smu_v13_0_6_i2c_func +ffffffff823af2b0 t smu_v13_0_6_set_irq_state +ffffffff823af540 t smu_v13_0_6_irq_process +ffffffff823b0000 T smu_v13_0_7_set_ppt_funcs +ffffffff823b0060 t smu_v13_0_7_get_allowed_feature_mask +ffffffff823b01d0 t smu_v13_0_7_set_default_dpm_table +ffffffff823b05f0 t smu_v13_0_7_populate_umd_state_clk +ffffffff823b0730 t smu_v13_0_7_print_clk_levels +ffffffff823b0840 t smu_v13_0_7_force_clk_levels +ffffffff823b09c0 t smu_v13_0_7_od_edit_dpm_table +ffffffff823b0e90 t smu_v13_0_7_restore_user_od_settings +ffffffff823b0f50 t smu_v13_0_7_get_power_profile_mode +ffffffff823b1090 t smu_v13_0_7_set_power_profile_mode +ffffffff823b12d0 t smu_v13_0_7_read_sensor +ffffffff823b14e0 t smu_v13_0_7_is_dpm_running +ffffffff823b1530 t smu_v13_0_7_get_fan_speed_pwm +ffffffff823b1610 t smu_v13_0_7_get_fan_speed_rpm +ffffffff823b1680 t smu_v13_0_7_get_thermal_temperature_range +ffffffff823b1780 t smu_v13_0_7_set_default_od_settings +ffffffff823b18b0 t smu_v13_0_7_dump_pptable +ffffffff823b18e0 t smu_v13_0_7_get_power_limit +ffffffff823b19c0 t smu_v13_0_7_set_df_cstate +ffffffff823b19e0 t smu_v13_0_7_init_smc_tables +ffffffff823b1bd0 t smu_v13_0_7_check_fw_status +ffffffff823b1c20 t smu_v13_0_7_set_mp1_state +ffffffff823b1c60 t smu_v13_0_7_setup_pptable +ffffffff823b1dc0 t smu_v13_0_7_baco_enter +ffffffff823b1e20 t smu_v13_0_7_baco_exit +ffffffff823b1e80 t smu_v13_0_7_is_mode1_reset_supported +ffffffff823b1ec0 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff823b1fe0 t smu_v13_0_7_get_gpu_metrics +ffffffff823b2410 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff823b3000 T yellow_carp_set_ppt_funcs +ffffffff823b3050 t yellow_carp_set_default_dpm_tables +ffffffff823b3080 t yellow_carp_print_clk_levels +ffffffff823b3100 t yellow_carp_force_clk_levels +ffffffff823b33c0 t yellow_carp_od_edit_dpm_table +ffffffff823b3670 t yellow_carp_dpm_set_vcn_enable +ffffffff823b3690 t yellow_carp_dpm_set_jpeg_enable +ffffffff823b36b0 t yellow_carp_read_sensor +ffffffff823b3a20 t yellow_carp_is_dpm_running +ffffffff823b3a70 t yellow_carp_set_watermarks_table +ffffffff823b3bf0 t yellow_carp_set_performance_level +ffffffff823b4680 t yellow_carp_init_smc_tables +ffffffff823b47f0 t yellow_carp_fini_smc_tables +ffffffff823b48a0 t yellow_carp_system_features_control +ffffffff823b48f0 t yellow_carp_get_gfxoff_status +ffffffff823b4980 t yellow_carp_mode2_reset +ffffffff823b4a00 t yellow_carp_get_dpm_ultimate_freq +ffffffff823b4e40 t yellow_carp_get_gpu_metrics +ffffffff823b4ff0 t yellow_carp_post_smu_init +ffffffff823b5070 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff823b50d0 t yellow_carp_get_current_clk_freq +ffffffff823b51d0 t yellow_carp_get_dpm_profile_freq +ffffffff823b6000 T smu_cmn_send_msg_without_waiting +ffffffff823b6170 T smu_cmn_wait_for_response +ffffffff823b62a0 T smu_cmn_send_smc_msg_with_param +ffffffff823b65b0 T smu_cmn_to_asic_specific_index +ffffffff823b66e0 t __smu_cmn_reg_print_error +ffffffff823b6920 T smu_cmn_send_smc_msg +ffffffff823b6940 T smu_cmn_send_debug_smc_msg +ffffffff823b69c0 T smu_cmn_send_debug_smc_msg_with_param +ffffffff823b6a40 T smu_cmn_feature_is_supported +ffffffff823b6af0 T smu_cmn_feature_is_enabled +ffffffff823b6be0 T smu_cmn_clk_dpm_is_enabled +ffffffff823b6ce0 T smu_cmn_get_enabled_mask +ffffffff823b6dd0 T smu_cmn_get_indep_throttler_status +ffffffff823b6e80 T smu_cmn_feature_update_enable_state +ffffffff823b6f20 T smu_cmn_feature_set_enabled +ffffffff823b6ff0 T smu_cmn_get_pp_feature_mask +ffffffff823b71a0 T smu_cmn_set_pp_feature_mask +ffffffff823b72a0 T smu_cmn_disable_all_features_with_exception +ffffffff823b7350 T smu_cmn_get_smc_version +ffffffff823b7420 T smu_cmn_update_table +ffffffff823b7580 T smu_cmn_write_watermarks_table +ffffffff823b7650 T smu_cmn_write_pptable +ffffffff823b7710 T smu_cmn_get_metrics_table +ffffffff823b7870 T smu_cmn_get_combo_pptable +ffffffff823b7940 T smu_cmn_init_soft_gpu_metrics +ffffffff823b7a30 T smu_cmn_set_mp1_state +ffffffff823b7ad0 T smu_cmn_is_audio_func_enabled +ffffffff823b8000 T pci_mcfg_init +ffffffff823b8050 T pci_lookup_segment +ffffffff823b80b0 T pci_attach_hook +ffffffff823b80e0 T pci_bus_maxdevs +ffffffff823b8110 T pci_make_tag +ffffffff823b8180 T pci_decompose_tag +ffffffff823b81e0 T pci_conf_size +ffffffff823b8240 T pci_mcfg_map_bus +ffffffff823b82c0 T pci_conf_read +ffffffff823b8410 T pci_conf_write +ffffffff823b8550 T pci_msix_table_map +ffffffff823b8680 T pci_msix_table_unmap +ffffffff823b8720 T msi_hwmask +ffffffff823b8750 T msi_hwunmask +ffffffff823b8780 T msi_addroute +ffffffff823b8890 T msi_delroute +ffffffff823b8910 T msi_allocidtvec +ffffffff823b8a60 T pci_intr_enable_msivec +ffffffff823b8b40 T pci_intr_map_msi +ffffffff823b8bf0 T pci_intr_map_msivec +ffffffff823b8ca0 T msix_hwmask +ffffffff823b8cd0 T msix_hwunmask +ffffffff823b8d00 T msix_addroute +ffffffff823b8ef0 T msix_delroute +ffffffff823b9050 T pci_intr_map_msix +ffffffff823b9120 T pci_intr_map +ffffffff823b9350 T pci_intr_string +ffffffff823b9430 T pci_intr_establish +ffffffff823b9480 T pci_intr_establish_cpu +ffffffff823b95d0 T pci_intr_disestablish +ffffffff823b95f0 T pci_init_extents +ffffffff823b97d0 T pci_probe_device_hook +ffffffff823b9810 T pci_dev_postattach +ffffffff823b9820 T pci_min_powerstate +ffffffff823b9830 T pci_set_powerstate_md +ffffffff823ba000 T pciide_machdep_compat_intr_establish +ffffffff823ba060 T pciide_machdep_compat_intr_disestablish +ffffffff823bb000 T vga_post_init +ffffffff823bb310 t vm86_emu_inb +ffffffff823bb360 t vm86_emu_inw +ffffffff823bb3a0 t vm86_emu_inl +ffffffff823bb3e0 t vm86_emu_outb +ffffffff823bb430 t vm86_emu_outw +ffffffff823bb470 t vm86_emu_outl +ffffffff823bb4b0 T vga_post_call +ffffffff823bb520 T vga_post_free +ffffffff823bb590 T ddb_vgapost +ffffffff823bc000 T pchbmatch +ffffffff823bc040 T pchbattach +ffffffff823bc4a0 T pchbactivate +ffffffff823bc510 T pchb_amd64ht_attach +ffffffff823bc660 T pchb_rnd +ffffffff823bc6e0 T pchb_print +ffffffff823bd000 T amas_match +ffffffff823bd050 T amas_attach +ffffffff823bd0b0 T amas_intl_nodes +ffffffff823bd140 T amas_get_pagerange +ffffffff823be000 T agp_flush_cache +ffffffff823be030 T agp_flush_cache_range +ffffffff823be040 T agp_init_map +ffffffff823be110 T agp_destroy_map +ffffffff823be150 T agp_map_subregion +ffffffff823be180 T agp_unmap_subregion +ffffffff823be1b0 T agp_map_atomic +ffffffff823be1e0 T agp_unmap_atomic +ffffffff823bf000 T cardslotmatch +ffffffff823bf050 T cardslotattach +ffffffff823bf2a0 T cardslot_event +ffffffff823bf300 T cardslot_cb_print +ffffffff823bf350 T cardslot_16_print +ffffffff823bf3a0 T cardslot_16_submatch +ffffffff823bf3f0 T cardslot_event_throw +ffffffff823bf490 T cardslot_process_event +ffffffff823c0000 T cardbusmatch +ffffffff823c0050 T cardbusattach +ffffffff823c0130 T cardbus_read_tuples +ffffffff823c04e0 T parse_tuple +ffffffff823c0750 T cardbus_attach_card +ffffffff823c0ed0 T enable_function +ffffffff823c0f70 T decode_tuples +ffffffff823c1050 T cardbusprint +ffffffff823c1140 T cardbussubmatch +ffffffff823c11a0 T disable_function +ffffffff823c1200 T cardbus_detach_card +ffffffff823c12e0 T cardbus_intr_establish +ffffffff823c1310 T cardbus_intr_disestablish +ffffffff823c1330 T cardbus_function_enable +ffffffff823c1410 T cardbus_function_disable +ffffffff823c1470 T cardbus_matchbyid +ffffffff823c14e0 T decode_tuple +ffffffff823c2000 T cardbus_mapreg_map +ffffffff823c21a0 T cardbus_mapreg_unmap +ffffffff823c3000 T cardbus_read_exrom +ffffffff823c4000 T rbus_space_alloc +ffffffff823c4060 T rbus_space_alloc_subregion +ffffffff823c4230 T rbus_space_free +ffffffff823c42c0 T rbus_new_body +ffffffff823c4350 T rbus_new_root_delegate +ffffffff823c4420 T rbus_new_root_share +ffffffff823c5000 T com_cardbus_match +ffffffff823c5070 T com_cardbus_attach +ffffffff823c5220 T com_cardbus_detach +ffffffff823c52c0 T com_cardbus_find_csdev +ffffffff823c5440 T com_cardbus_gofigure +ffffffff823c5900 T com_cardbus_enable +ffffffff823c59d0 T com_cardbus_disable +ffffffff823c5a20 T com_cardbus_setup +ffffffff823c6000 T xl_cardbus_match +ffffffff823c6080 T xl_cardbus_attach +ffffffff823c63f0 T xl_cardbus_detach +ffffffff823c64b0 T xl_cardbus_lookup +ffffffff823c6560 T xl_cardbus_intr_ack +ffffffff823c7000 T dc_cardbus_match +ffffffff823c7030 T dc_cardbus_attach +ffffffff823c73e0 T dc_cardbus_detach +ffffffff823c7480 T dc_cardbus_setup +ffffffff823c8000 T fxp_cardbus_match +ffffffff823c8030 T fxp_cardbus_attach +ffffffff823c8240 T fxp_cardbus_detach +ffffffff823c82d0 T fxp_cardbus_setup +ffffffff823c9000 t rl_cardbus_match +ffffffff823c9030 t rl_cardbus_attach +ffffffff823c91d0 t rl_cardbus_detach +ffffffff823c9290 T rl_cardbus_setup +ffffffff823ca000 T re_cardbus_probe +ffffffff823ca030 T re_cardbus_attach +ffffffff823ca230 T re_cardbus_detach +ffffffff823ca2b0 T re_cardbus_setup +ffffffff823cb000 T ath_cardbus_match +ffffffff823cb050 T ath_cardbus_attach +ffffffff823cb180 T ath_cardbus_detach +ffffffff823cb250 T ath_cardbus_enable +ffffffff823cb320 T ath_cardbus_disable +ffffffff823cb370 T ath_cardbus_power +ffffffff823cb3b0 T ath_cardbus_setup +ffffffff823cc000 T athn_cardbus_match +ffffffff823cc030 T athn_cardbus_attach +ffffffff823cc170 T athn_cardbus_detach +ffffffff823cc210 T athn_cardbus_enable +ffffffff823cc2e0 T athn_cardbus_disable +ffffffff823cc330 T athn_cardbus_power +ffffffff823cc370 T athn_cardbus_read +ffffffff823cc3a0 T athn_cardbus_write +ffffffff823cc3d0 T athn_cardbus_write_barrier +ffffffff823cc400 T athn_cardbus_setup +ffffffff823cd000 T atw_cardbus_match +ffffffff823cd030 T atw_cardbus_attach +ffffffff823cd220 T atw_cardbus_detach +ffffffff823cd2e0 T atw_cardbus_enable +ffffffff823cd3b0 T atw_cardbus_disable +ffffffff823cd400 T atw_cardbus_power +ffffffff823cd440 T atw_cardbus_setup +ffffffff823ce000 T rtw_cardbus_match +ffffffff823ce030 T rtw_cardbus_attach +ffffffff823ce270 T rtw_cardbus_detach +ffffffff823ce390 T rtw_cardbus_intr_ack +ffffffff823ce3b0 T rtw_cardbus_funcregen +ffffffff823ce410 T rtw_cardbus_enable +ffffffff823ce570 T rtw_cardbus_disable +ffffffff823ce650 T rtw_cardbus_power +ffffffff823ce690 T rtw_cardbus_setup +ffffffff823cf000 T ral_cardbus_match +ffffffff823cf030 T ral_cardbus_attach +ffffffff823cf230 T ral_cardbus_detach +ffffffff823cf2e0 T ral_cardbus_activate +ffffffff823cf370 T ral_cardbus_enable +ffffffff823cf4d0 T ral_cardbus_disable +ffffffff823cf520 T ral_cardbus_setup +ffffffff823cf5c0 T ral_cardbus_wakeup +ffffffff823d0000 T acx_cardbus_match +ffffffff823d0030 T acx_cardbus_attach +ffffffff823d0260 T acx_cardbus_detach +ffffffff823d0380 T acx_cardbus_enable +ffffffff823d0450 T acx_cardbus_disable +ffffffff823d04a0 T acx_cardbus_power +ffffffff823d04e0 T acx_cardbus_setup +ffffffff823d1000 T pgt_cardbus_match +ffffffff823d1030 T pgt_cardbus_attach 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pcmcia_cis_read_1 +ffffffff823da0f0 T pcmcia_read_cis +ffffffff823da1e0 T pcmcia_scan_cis +ffffffff823dbcd0 T pcmcia_parse_cis_tuple +ffffffff823dce60 T pcmcia_print_cis +ffffffff823de000 T pcmcia_check_cis_quirks +ffffffff823df000 T ep_pcmcia_match +ffffffff823df110 T ep_pcmcia_attach +ffffffff823df520 T ep_pcmcia_detach +ffffffff823df5c0 T ep_pcmcia_activate +ffffffff823df6a0 T ep_pcmcia_lookup +ffffffff823df7b0 T ep_pcmcia_enable1 +ffffffff823df860 T ep_pcmcia_get_enaddr +ffffffff823e0000 T ne_pcmcia_match +ffffffff823e0140 T ne_pcmcia_attach +ffffffff823e0760 T ne_pcmcia_detach +ffffffff823e0820 T ne_pcmcia_activate +ffffffff823e0910 T ne_pcmcia_get_enaddr +ffffffff823e0af0 T ne_pcmcia_dl10019_get_enaddr +ffffffff823e0d30 T ne_pcmcia_ax88190_set_iobase +ffffffff823e1000 T aic_pcmcia_match +ffffffff823e10b0 T aic_pcmcia_attach +ffffffff823e12b0 T aic_pcmcia_detach +ffffffff823e2000 T com_pcmcia_match +ffffffff823e2220 T com_pcmcia_attach +ffffffff823e2500 T com_pcmcia_detach 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internal_command +ffffffff8241cf90 T wskbd_debugger +ffffffff8241d000 T wskbd_compose_value +ffffffff8241d1a0 T ksym_upcase +ffffffff8241d220 T fillmapentry +ffffffff8241d3b0 T wskbd_get_mapentry +ffffffff8241d5d0 T wskbd_init_keymap +ffffffff8241d670 T wskbd_load_keymap +ffffffff8241e000 T wsmouse_match +ffffffff8241e030 T wsmouse_attach +ffffffff8241e0d0 T wsmouse_detach +ffffffff8241e2b0 T wsmouse_activate +ffffffff8241e2f0 T wsmouse_mux_open +ffffffff8241e4a0 T wsmouse_mux_close +ffffffff8241e500 T wsmousedoioctl +ffffffff8241e570 T wsmousedevprint +ffffffff8241e5c0 T wsmouseopen +ffffffff8241e6a0 T wsmouse_input_cleanup +ffffffff8241e740 T wsmousedoopen +ffffffff8241e8f0 T wsmouseclose +ffffffff8241e9d0 T wsmouse_input_reset +ffffffff8241eb10 T wsmouseread +ffffffff8241ebd0 T wsmouseioctl +ffffffff8241ec50 T wsmouse_do_ioctl +ffffffff8241edf0 T wsmouse_param_ioctl +ffffffff8241ef20 T wsmouse_set_params +ffffffff8241f240 T wsmouse_get_params +ffffffff8241f4a0 T wsmousekqfilter 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wstpad_set_direction +ffffffff82422180 T wstpad_is_stable +ffffffff82422260 T wstpad_scroll_coords +ffffffff82422350 T wstpad_scroll +ffffffff824224e0 T wstpad_f2scroll +ffffffff82422790 T wstpad_edgescroll +ffffffff82422900 T wstpad_get_sbtn +ffffffff82422a80 T wstpad_mtbtn_contacts +ffffffff82422bb0 T wstpad_get_mtbtn +ffffffff82422c00 T wstpad_softbuttons +ffffffff82422cd0 T wstpad_is_tap +ffffffff82422d50 T wstpad_tap_filter +ffffffff82422df0 T wstpad_tap_touch +ffffffff82423020 T wstpad_tap_button +ffffffff82423070 T wstpad_tap +ffffffff824234a0 T wstpad_tap_sync +ffffffff82423500 T wstpad_tap_timeout +ffffffff82423730 T wstpad_click +ffffffff824237d0 T wstpad_cmds +ffffffff82423a40 T wstpad_mt_inputs +ffffffff82423db0 T wstpad_mt_masks +ffffffff82424130 T wstpad_touch_inputs +ffffffff82424340 T wstpad_process_input +ffffffff82424650 T wstpad_track_interval +ffffffff824247b0 T wstpad_init_deceleration +ffffffff82424880 T wstpad_decelerate +ffffffff824249f0 T wstpad_filter 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wsmux_set_display +ffffffff82427790 T wsmux_get_layout +ffffffff824277c0 T wsmux_set_layout +ffffffff82428000 T wsemul_pick +ffffffff82428070 T wsemul_getname +ffffffff82429000 T wsemul_getchar +ffffffff824291d0 T wsemul_local_translate +ffffffff824294b0 T wsemul_utf8_translate +ffffffff8242a000 T wsemul_vt100_cnattach +ffffffff8242a200 T wsemul_vt100_attach +ffffffff8242a4d0 T wsemul_vt100_output +ffffffff8242a7e0 T wsemul_vt100_detach +ffffffff8242a910 T wsemul_vt100_resetop +ffffffff8242aac0 T wsemul_vt100_output_esc +ffffffff8242b140 T wsemul_vt100_output_csi +ffffffff8242b280 T wsemul_vt100_output_scs94 +ffffffff8242b340 T wsemul_vt100_output_scs94_percent +ffffffff8242b390 T wsemul_vt100_output_scs96 +ffffffff8242b4e0 T wsemul_vt100_output_scs96_percent +ffffffff8242b530 T wsemul_vt100_output_esc_hash +ffffffff8242b860 T wsemul_vt100_output_esc_spc +ffffffff8242b890 T wsemul_vt100_output_string +ffffffff8242b900 T wsemul_vt100_output_string_esc +ffffffff8242b950 T wsemul_vt100_output_dcs +ffffffff8242ba00 T wsemul_vt100_output_dcs_dollar +ffffffff8242ba60 T wsemul_vt100_output_esc_percent +ffffffff8242bac0 T wsemul_vt100_init +ffffffff8242bb20 T wsemul_vt100_reset +ffffffff8242bc40 T wsemul_vt100_nextline +ffffffff8242bcd0 T wsemul_vt100_output_normal +ffffffff8242bf10 T wsemul_vt100_output_c0c1 +ffffffff8242c190 T wsemul_vt100_jump_scroll +ffffffff8242d000 T wsemul_vt100_scrollup +ffffffff8242d150 T wsemul_vt100_scrolldown +ffffffff8242d290 T wsemul_vt100_ed +ffffffff8242d4f0 T wsemul_vt100_el +ffffffff8242d5e0 T wsemul_vt100_handle_csi +ffffffff8242e570 T vt100_ansimode +ffffffff8242e5f0 T vt100_decmode +ffffffff8242e720 T vt100_selectattribute +ffffffff8242e860 T wsemul_vt100_handle_dcs +ffffffff8242f000 T vt100_initchartables +ffffffff8242f120 T vt100_setnrc +ffffffff82430000 T wsemul_vt100_translate +ffffffff82431000 T pckbdprobe +ffffffff82431140 T pckbdattach +ffffffff82431320 T pckbdactivate +ffffffff824313b0 T pckbd_enable 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pms_disable_synaptics +ffffffff824340d0 T pms_enable_alps +ffffffff824345f0 T pms_ioctl_alps +ffffffff824346a0 T pms_sync_alps +ffffffff82434750 T pms_proc_alps +ffffffff824349a0 T pms_enable_elantech_v1 +ffffffff82434bb0 T pms_ioctl_elantech +ffffffff82434c70 T pms_sync_elantech_v1 +ffffffff82434d50 T pms_proc_elantech_v1 +ffffffff82434ec0 T pms_enable_elantech_v2 +ffffffff82435060 T pms_sync_elantech_v2 +ffffffff82435150 T pms_proc_elantech_v2 +ffffffff824352c0 T pms_enable_elantech_v3 +ffffffff82435460 T pms_sync_elantech_v3 +ffffffff824354f0 T pms_proc_elantech_v3 +ffffffff824356e0 T pms_enable_elantech_v4 +ffffffff824358e0 T pms_sync_elantech_v4 +ffffffff824359b0 T pms_proc_elantech_v4 +ffffffff82435d00 T pms_enable_intelli +ffffffff82435ef0 T pms_cmd +ffffffff82435f60 T pms_spec_cmd +ffffffff824361f0 T pms_set_scaling +ffffffff82436280 T pms_set_resolution +ffffffff82436310 T pms_get_devid +ffffffff824363a0 T pms_get_status +ffffffff82436430 T pms_set_rate +ffffffff824364c0 T pms_reset +ffffffff82436550 T pms_dev_enable +ffffffff82436610 T pms_dev_disable +ffffffff824366d0 T pms_protocol_lookup +ffffffff824367d0 T pms_reset_detect +ffffffff82436850 T pms_reset_timo +ffffffff824368a0 T pms_reset_task +ffffffff82436960 T pms_change_state +ffffffff82436cf0 T pmsinput +ffffffff82436e90 T synaptics_set_mode +ffffffff82436f90 T synaptics_query +ffffffff82437080 T synaptics_get_hwinfo +ffffffff82437560 T synaptics_sec_proc +ffffffff82437630 T synaptics_knock +ffffffff82437890 T alps_sec_proc +ffffffff824379b0 T alps_get_hwinfo +ffffffff82437e20 T elantech_set_absolute_mode_v1 +ffffffff824380e0 T elantech_set_absolute_mode_v2 +ffffffff82438600 T elantech_ps2_cmd +ffffffff82438690 T elantech_set_absolute_mode_v3 +ffffffff82438b00 T elantech_set_absolute_mode_v4 +ffffffff82438d30 T elantech_get_hwinfo_v1 +ffffffff82438f30 T elantech_get_hwinfo_v2 +ffffffff82439240 T elantech_get_hwinfo_v3 +ffffffff82439450 T elantech_get_hwinfo_v4 +ffffffff824396c0 T elantech_knock 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T hidkbd_cngetc +ffffffff82441520 T hidkbd_hookup_bell +ffffffff82442000 T hidms_stylus_hid_parse +ffffffff82442320 T hidms_pad_buttons_hid_parse +ffffffff82442400 T hidms_wacom_setup +ffffffff82442710 T hidms_setup +ffffffff82442cb0 T hidms_attach +ffffffff82442e00 T hidms_detach +ffffffff82442e40 T hidms_input +ffffffff824430f0 T hidms_enable +ffffffff82443140 T hidms_ioctl +ffffffff82443310 T hidms_disable +ffffffff82444000 T hidmt_get_resolution +ffffffff82444110 T hidmt_setup +ffffffff824447b0 T hidmt_set_input_mode +ffffffff82444840 T hidmt_configure +ffffffff824448e0 T hidmt_attach +ffffffff824449f0 T hidmt_detach +ffffffff82444a30 T hidmt_input +ffffffff82444f10 T hidmt_enable +ffffffff82444f50 T hidmt_ioctl +ffffffff82445020 T hidmt_disable +ffffffff82446000 T hidcc_match +ffffffff824460e0 T hidcc_attach +ffffffff82446280 T hidcc_parse +ffffffff82446640 T hidcc_attach_wskbd +ffffffff824466f0 T hidcc_detach +ffffffff824467a0 T hidcc_intr +ffffffff82446ab0 T hidcc_intr_slice +ffffffff82446ba0 T hidcc_setbits +ffffffff82446d30 T hidcc_rawinput +ffffffff82446dd0 T hidcc_input +ffffffff82446e30 T hidcc_bits_to_int +ffffffff82446e90 T hidcc_usage_to_sym +ffffffff824470a0 T hidcc_bit_to_sym +ffffffff824470f0 T hidcc_enable +ffffffff82447110 T hidcc_set_leds +ffffffff82447140 T hidcc_ioctl +ffffffff824471b0 T hidcc_is_array +ffffffff82447200 T hidcc_parse_array +ffffffff82447310 T hidcc_add_key_volume +ffffffff82447440 T hidcc_add_key +ffffffff82447510 T hidcc_bits_to_volume +ffffffff82448000 T usb_match +ffffffff82448030 T usb_attach +ffffffff82448330 T usb_detach +ffffffff824483e0 T usb_activate +ffffffff824484f0 T usb_create_task_threads +ffffffff82448590 T usb_explore +ffffffff82448730 T usb_attach_roothub +ffffffff824487d0 T usb_needs_explore +ffffffff82448820 T usb_detach_roothub +ffffffff82448910 T usb_wait_task +ffffffff824489b0 T usb_abort_task_thread +ffffffff82448aa0 T usb_task_thread +ffffffff82448bc0 T usb_add_task +ffffffff82448c80 T usb_rem_task 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+ffffffff8244ae90 T usbd_dopoll +ffffffff8244aeb0 T usbd_alloc_buffer +ffffffff8244af40 T usbd_free_buffer +ffffffff8244af80 T usbd_setup_default_xfer +ffffffff8244b000 T usbd_setup_isoc_xfer +ffffffff8244b130 T usbd_get_xfer_status +ffffffff8244b190 T usbd_get_config_descriptor +ffffffff8244b1e0 T usbd_get_interface_descriptor +ffffffff8244b230 T usbd_get_device_descriptor +ffffffff8244b260 T usbd_interface2endpoint_descriptor +ffffffff8244b2b0 T usbd_clear_endpoint_stall +ffffffff8244b340 T usbd_clear_endpoint_toggle +ffffffff8244b380 T usbd_do_request +ffffffff8244b3a0 T usbd_clear_endpoint_stall_async +ffffffff8244b460 T usbd_request_async +ffffffff8244b570 T usbd_device2interface_handle +ffffffff8244b600 T usbd_set_interface +ffffffff8244b6e0 T usbd_get_no_alts +ffffffff8244b750 T usbd_get_interface_altindex +ffffffff8244b780 T usbd_start_next +ffffffff8244b850 T usb_insert_transfer +ffffffff8244b900 T usbd_do_request_flags +ffffffff8244bb80 T usbd_request_async_cb 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uaudio_copy_output +ffffffff82454ce0 T uaudio_underrun +ffffffff82454d00 T uaudio_set_blksz +ffffffff82454dc0 T uaudio_sign_expand +ffffffff82454e00 T uaudio_req +ffffffff82454e90 T uaudio_getnum +ffffffff82454fc0 T uaudio_getdesc +ffffffff82455040 T uaudio_unit_byid +ffffffff82455080 T uaudio_tname +ffffffff824551f0 T uaudio_clkname +ffffffff82455230 T uaudio_mkname +ffffffff82455350 T uaudio_feature_fixup +ffffffff82455490 T uaudio_ranges_init +ffffffff824554d0 T uaudio_ranges_add +ffffffff82455590 T uaudio_ranges_clear +ffffffff82455600 T uaudio_ranges_decode +ffffffff82455690 T uaudio_ranges_encode +ffffffff82455710 T uaudio_ranges_getrates +ffffffff82455810 T uaudio_rates_indexof +ffffffff824558a0 T uaudio_req_ranges +ffffffff82455ec0 T uaudio_alt_getrates +ffffffff82455fa0 T uaudio_clock_id +ffffffff82456020 T uaudio_getrates +ffffffff82456100 T uaudio_feature_addent +ffffffff824562c0 T uaudio_process_srcs +ffffffff824563a0 T uaudio_process_unit +ffffffff82456fa0 T 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uath_ioctl +ffffffff82537ce0 T uath_start +ffffffff82537e90 T uath_watchdog +ffffffff82537f20 T uath_newstate +ffffffff82537fc0 T uath_media_change +ffffffff82538020 T uath_close_pipes +ffffffff825380d0 T uath_free_tx_data_list +ffffffff825381f0 T uath_free_rx_cmd_list +ffffffff82538240 T uath_free_tx_cmd_list +ffffffff82538360 T uath_free_rx_data_list +ffffffff825383d0 T uath_init +ffffffff825389b0 T uath_cmd_write +ffffffff825389d0 T uath_set_led +ffffffff82538a30 T uath_switch_channel +ffffffff82538c10 T uath_set_rates +ffffffff82538cb0 T uath_cmd +ffffffff82538ec0 T uath_cmd_read +ffffffff82538ee0 T uath_write_reg +ffffffff82538f80 T uath_write_multi +ffffffff82539040 T uath_read_reg +ffffffff825390e0 T uath_read_eeprom +ffffffff825391a0 T uath_data_rxeof +ffffffff825394c0 T uath_tx_null +ffffffff82539600 T uath_data_txeof +ffffffff82539700 T uath_tx_data +ffffffff825399b0 T uath_stop +ffffffff82539ae0 T uath_reset_tx_queues +ffffffff82539bb0 T uath_wme_init +ffffffff82539ca0 T uath_set_chan +ffffffff82539d20 T uath_set_key +ffffffff82539ee0 T uath_set_keys +ffffffff8253a170 T uath_set_rxfilter +ffffffff8253b000 T athn_usb_match +ffffffff8253b070 T athn_usb_attach +ffffffff8253b1b0 T athn_usb_detach +ffffffff8253b260 T athn_usb_read +ffffffff8253b300 T athn_usb_write +ffffffff8253b390 T athn_usb_write_barrier +ffffffff8253b3f0 T athn_usb_task +ffffffff8253b4b0 T athn_usb_open_pipes +ffffffff8253b660 T athn_usb_alloc_tx_cmd +ffffffff8253b700 T athn_usb_attachhook +ffffffff8253b8c0 T athn_usb_wait_async +ffffffff8253b8f0 T athn_usb_close_pipes +ffffffff8253b9c0 T athn_usb_free_tx_cmd +ffffffff8253ba10 T athn_usb_free_tx_list +ffffffff8253bb40 T athn_usb_free_rx_list +ffffffff8253bb90 T athn_usb_load_firmware +ffffffff8253bd80 T athn_usb_htc_setup +ffffffff8253c030 T athn_usb_ioctl +ffffffff8253c1e0 T athn_usb_start +ffffffff8253c360 T athn_usb_watchdog +ffffffff8253c3f0 T athn_usb_node_alloc +ffffffff8253c410 T athn_usb_newauth +ffffffff8253c5c0 T athn_usb_newassoc +ffffffff8253c6f0 T athn_usb_node_free +ffffffff8253c7f0 T athn_usb_updateslot +ffffffff8253c820 T athn_usb_updateedca +ffffffff8253c8e0 T athn_usb_set_key +ffffffff8253ca20 T athn_usb_delete_key +ffffffff8253cb70 T athn_usb_newstate +ffffffff8253cc70 T athn_usb_media_change +ffffffff8253cd00 T athn_usb_next_scan +ffffffff8253cda0 T athn_usb_rx_enable +ffffffff8253ce10 T athn_usb_intr +ffffffff8253cfa0 T athn_usb_alloc_rx_list +ffffffff8253d050 T athn_usb_alloc_tx_list +ffffffff8253d150 T athn_usb_do_async +ffffffff8253d270 T athn_usb_htc_msg +ffffffff8253d300 T athn_usb_htc_connect_svc +ffffffff8253d4d0 T athn_usb_wmi_xcmd +ffffffff8253d700 T athn_usb_read_rom +ffffffff8253d860 T athn_usb_stop +ffffffff8253db70 T athn_usb_init +ffffffff8253dfc0 T athn_usb_newstate_cb +ffffffff8253e2c0 T athn_usb_remove_node +ffffffff8253e3c0 T athn_usb_switch_chan +ffffffff8253e580 T athn_usb_create_node +ffffffff8253e7e0 T athn_usb_newassoc_cb +ffffffff8253e960 T athn_usb_node_set_rates +ffffffff8253eaa0 T athn_usb_count_active_sta +ffffffff8253eaf0 T athn_usb_newauth_cb +ffffffff8253ebd0 T athn_usb_node_free_cb +ffffffff8253ec90 T athn_usb_ampdu_tx_start +ffffffff8253eda0 T athn_usb_ampdu_tx_start_cb +ffffffff8253ee00 T athn_usb_ampdu_tx_stop +ffffffff8253eee0 T athn_usb_ampdu_tx_stop_cb +ffffffff8253ef40 T athn_usb_clean_nodes +ffffffff8253f000 T athn_usb_updateedca_cb +ffffffff8253f040 T athn_usb_updateslot_cb +ffffffff8253f080 T athn_usb_set_key_cb +ffffffff8253f140 T athn_usb_delete_key_cb +ffffffff8253f1a0 T athn_usb_bcneof +ffffffff8253f200 T athn_usb_swba +ffffffff8253f360 T athn_usb_tx_status +ffffffff8253f3d0 T athn_usb_rx_wmi_ctrl +ffffffff8253f5f0 T athn_usb_rx_radiotap +ffffffff8253f7e0 T athn_usb_rx_frame +ffffffff8253fa50 T athn_usb_rxeof +ffffffff8253fd70 T athn_usb_txeof +ffffffff8253fe30 T athn_usb_tx +ffffffff82541000 T uow_match +ffffffff82541070 T uow_attach +ffffffff82541510 T uow_detach +ffffffff825415e0 T uow_activate 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upd_sensor_invalidate +ffffffff82543c80 T upd_sensor_update +ffffffff82544000 T uwacom_match +ffffffff825440e0 T uwacom_attach +ffffffff82544300 T uwacom_detach +ffffffff82544320 T uwacom_enable +ffffffff82544390 T uwacom_ioctl +ffffffff82544440 T uwacom_disable +ffffffff82544470 T uwacom_intr_legacy +ffffffff82544620 T uwacom_intr +ffffffff82545000 T bwfm_usb_preinit +ffffffff825454b0 T bwfm_usb_txcheck +ffffffff825454f0 T bwfm_usb_txdata +ffffffff82545630 T bwfm_usb_txctl +ffffffff825457f0 T bwfm_usb_match +ffffffff82545860 T bwfm_usb_attach +ffffffff825459f0 T bwfm_usb_detach +ffffffff82545ad0 T bwfm_usb_dl_cmd +ffffffff82545b70 T bwfm_usb_load_microcode +ffffffff82545e60 T bwfm_usb_alloc_rx_list +ffffffff82545f50 T bwfm_usb_alloc_tx_list +ffffffff82546080 T bwfm_usb_rxeof +ffffffff82546230 T bwfm_usb_free_rx_list +ffffffff825462b0 T bwfm_usb_free_tx_list +ffffffff82546330 T bwfm_usb_newbuf +ffffffff825463b0 T bwfm_usb_txeof +ffffffff825464c0 T bwfm_usb_txctl_cb +ffffffff82547000 T umstc_match +ffffffff825470b0 T umstc_attach +ffffffff825471b0 T umstc_detach +ffffffff82547200 T umstc_intr +ffffffff82547350 T umstc_brightness_task +ffffffff82548000 T uhidpp_match +ffffffff825480e0 T uhidpp_attach +ffffffff82548450 T uhidpp_detach +ffffffff82548690 T uhidpp_intr +ffffffff825488a0 T uhidpp_task +ffffffff82548930 T hidpp10_get_type +ffffffff82548a30 T hidpp10_get_name +ffffffff82548b30 T hidpp10_enable_notifications +ffffffff82548ba0 T uhidpp_is_notification +ffffffff82548c30 T uhidpp_claim_notification +ffffffff82548d50 T uhidpp_refresh +ffffffff82548e20 T uhidpp_device_refresh +ffffffff82548ed0 T uhidpp_consume_notification +ffffffff82549020 T uhidpp_device_connect +ffffffff82549310 T uhidpp_sleep +ffffffff82549340 T hidpp_get_protocol_version +ffffffff82549410 T uhidpp_device_features +ffffffff82549600 T hidpp20_battery_get_capability +ffffffff825496c0 T hidpp20_unified_battery_get_capabilities +ffffffff825497b0 T hidpp20_battery_get_level_status +ffffffff825498e0 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maxtmp_refresh +ffffffff8255a350 T maxtmp_readport +ffffffff8255b000 T adc_match +ffffffff8255b070 T adc_attach +ffffffff8255b310 T adc_refresh +ffffffff8255c000 T admtemp_match +ffffffff8255c110 T admtemp_attach +ffffffff8255c410 T admtemp_refresh +ffffffff8255d000 T admlc_match +ffffffff8255d050 T admlc_attach +ffffffff8255d3f0 T admlc_refresh +ffffffff8255e000 T admtm_match +ffffffff8255e090 T admtm_attach +ffffffff8255e410 T admtm_refresh +ffffffff8255f000 T admtmp_match +ffffffff8255f050 T admtmp_attach +ffffffff8255f1c0 T admtmp_refresh +ffffffff82560000 T admtt_match +ffffffff82560050 T admtt_attach +ffffffff82560200 T admtt_refresh +ffffffff82561000 T maxds_match +ffffffff82561090 T maxds_attach +ffffffff82561290 T maxds_refresh +ffffffff82562000 T adt_match +ffffffff82562140 T adt_attach +ffffffff825626b0 T adt_refresh +ffffffff82563000 T lm_i2c_match +ffffffff82563110 T lm_i2c_attach +ffffffff82563210 T lm_i2c_writereg +ffffffff825632c0 T lm_i2c_readreg +ffffffff82564000 T admcts_match +ffffffff82564050 T admcts_attach +ffffffff825645c0 T admcts_refresh +ffffffff82565000 T wbng_match +ffffffff82565050 T wbng_attach +ffffffff82565600 T wbng_refresh +ffffffff82565730 T wbng_readreg +ffffffff825657a0 T wbng_writereg +ffffffff82565800 T wbng_refresh_volts +ffffffff82565b20 T wbng_refresh_temps +ffffffff82565d20 T wbng_refresh_fans +ffffffff82566000 T nvt_match +ffffffff82566050 T nvt_attach +ffffffff825663e0 T nvt_readreg +ffffffff82566450 T nvt_refresh +ffffffff82566580 T nvt_writereg +ffffffff825665e0 T nvt_refresh_volts +ffffffff82566720 T nvt_refresh_temps +ffffffff82566870 T nvt_refresh_fans +ffffffff82567000 T adl_match +ffffffff82567050 T adl_attach +ffffffff825671f0 T adl_refresh +ffffffff82568000 T andl_match +ffffffff82568050 T andl_attach +ffffffff82568340 T andl_refresh +ffffffff825683c0 T andl_refresh_temps +ffffffff82568500 T andl_refresh_volts +ffffffff825686c0 T andl_refresh_tachs +ffffffff825687e0 T andl_readreg +ffffffff82568850 T andl_writereg +ffffffff82569000 T spdmem_iic_match +ffffffff825690a0 T spdmem_iic_attach +ffffffff825690f0 T spdmem_iic_read +ffffffff8256a000 T sdtemp_match +ffffffff8256a290 T sdtemp_attach +ffffffff8256a340 T sdtemp_refresh +ffffffff8256b000 T lisa_match +ffffffff8256b050 T lisa_attach +ffffffff8256b180 T lisa_refresh +ffffffff8256b2a0 T lisa_readreg +ffffffff8256b310 T lisa_writereg +ffffffff8256c000 T ihidev_match +ffffffff8256c050 T ihidev_attach +ffffffff8256c550 T ihidev_detach +ffffffff8256c5f0 T ihidev_activate +ffffffff8256c730 T ihidev_hid_command +ffffffff8256cb10 T ihidev_hid_desc_parse +ffffffff8256cd20 T ihidev_intr +ffffffff8256d050 T ihidev_maxrepid +ffffffff8256d100 T ihidev_submatch +ffffffff8256d150 T ihidev_print +ffffffff8256d1b0 T ihidev_reset +ffffffff8256d3d0 T ihidev_sleep +ffffffff8256d460 T ihidev_poll +ffffffff8256d4b0 T ihidev_open +ffffffff8256d580 T ihidev_close +ffffffff8256d680 T ihidev_ioctl +ffffffff8256d6b0 T ihidev_get_report_desc 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iommu_flush_ctx_qi +ffffffff825a19c0 T ivhd_invalidate_domain +ffffffff825a1a20 T iommu_read_8 +ffffffff825a1a40 T iommu_flush_ctx +ffffffff825a1b60 T iommu_enable_qi +ffffffff825a1c80 T iommu_showcfg +ffffffff825a1ea0 T iommu_init +ffffffff825a21e0 T acpidmar_intr_establish +ffffffff825a22f0 T acpidmar_intr +ffffffff825a2480 T acpidmar_match_devscope +ffffffff825a25c0 T domain_create +ffffffff825a2800 t dmar_dmamap_create +ffffffff825a2820 t dmar_dmamap_destroy +ffffffff825a2830 t dmar_dmamap_load +ffffffff825a28a0 t dmar_dmamap_load_mbuf +ffffffff825a2900 t dmar_dmamap_load_uio +ffffffff825a2960 t dmar_dmamap_load_raw +ffffffff825a29d0 t dmar_dmamap_unload +ffffffff825a2a00 t dmar_dmamap_sync +ffffffff825a2a20 t dmar_dmamem_alloc +ffffffff825a2a40 t dmar_dmamem_free +ffffffff825a2a60 t dmar_dmamem_map +ffffffff825a2a80 t dmar_dmamem_unmap +ffffffff825a2aa0 t dmar_dmamem_mmap +ffffffff825a2ac0 T domain_add_device +ffffffff825a2b40 T domain_remove_device +ffffffff825a2bf0 T domain_lookup +ffffffff825a2db0 T _iommu_map +ffffffff825a2e70 T _iommu_domain +ffffffff825a2ed0 T domain_map_device +ffffffff825a31d0 T ivhd_flush_devtab +ffffffff825a3230 T acpidmar_pci_hook +ffffffff825a33f0 T acpidmar_parse_devscope +ffffffff825a3510 T acpidmar_drhd +ffffffff825a36e0 T acpidmar_rmrr +ffffffff825a3970 T acpidmar_atsr +ffffffff825a3b10 T acpidmar_init +ffffffff825a3f60 T acpiivhd_intr +ffffffff825a4040 T ivhd_poll_events +ffffffff825a4100 T ivhd_intr_map +ffffffff825a41b0 T _dumppte +ffffffff825a42e0 T ivhd_showpage +ffffffff825a4420 T ivhd_show_event +ffffffff825a4cc0 T ivhd_showdte +ffffffff825a4da0 T ivhd_showcmd +ffffffff825a4e60 T _ivhd_issue_command +ffffffff825a4f40 T ivhd_issue_command +ffffffff825a5210 T ivhd_invalidate_iommu_all +ffffffff825a5300 T ivhd_invalidate_interrupt_table +ffffffff825a53f0 T ivhd_showreg +ffffffff825a5530 T ivhd_checkerr +ffffffff825a5770 T ivhd_iommu_init +ffffffff825a5c50 T acpiivrs_ivhd +ffffffff825a5cc0 T acpiivrs_init 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asmc_backlight +ffffffff825a9bc0 T asmc_init +ffffffff825a9dc0 T asmc_update +ffffffff825a9f60 T asmc_detach +ffffffff825aa110 t asmc_temp +ffffffff825aa2a0 t asmc_fan +ffffffff825aa460 t asmc_light +ffffffff825ab000 T acpiasus_match +ffffffff825ab030 T acpiasus_attach +ffffffff825ab150 T acpiasus_activate +ffffffff825ab2e0 T acpiasus_init +ffffffff825ab3c0 T acpiasus_notify +ffffffff825ac000 T thinkpad_match +ffffffff825ac0b0 T thinkpad_attach +ffffffff825ac4c0 T thinkpad_activate +ffffffff825ac640 T thinkpad_sensor_attach +ffffffff825ac7b0 T thinkpad_get_temp +ffffffff825ac840 T thinkpad_sensor_refresh +ffffffff825ac9c0 T thinkpad_get_volume_mute +ffffffff825aca30 T thinkpad_attach_deferred +ffffffff825aca50 T thinkpad_enable_events +ffffffff825acc20 T thinkpad_get_kbd_backlight +ffffffff825accb0 T thinkpad_set_kbd_backlight +ffffffff825acd80 T thinkpad_get_param +ffffffff825acde0 T thinkpad_set_param +ffffffff825acea0 T thinkpad_battery_setchargestart +ffffffff825acff0 T thinkpad_battery_setchargestop +ffffffff825ad140 T thinkpad_battery_setchargemode +ffffffff825ad710 T thinkpad_hotkey +ffffffff825add40 T thinkpad_brightness_up +ffffffff825adee0 T thinkpad_brightness_down +ffffffff825ae090 T thinkpad_toggle_bluetooth +ffffffff825ae1b0 T thinkpad_volume_mute +ffffffff825ae260 T thinkpad_volume_down +ffffffff825ae310 T thinkpad_volume_up +ffffffff825ae3c0 T thinkpad_get_thinklight +ffffffff825ae410 T thinkpad_adaptive_change +ffffffff825ae530 T thinkpad_get_brightness +ffffffff825ae570 T thinkpad_toggle_wan +ffffffff825ae690 T thinkpad_cmos +ffffffff825ae740 T thinkpad_set_brightness +ffffffff825ae830 T thinkpad_set_thinklight +ffffffff825ae8f0 T thinkpad_battery_inhibit_charge +ffffffff825aea20 T thinkpad_battery_force_discharge +ffffffff825af000 T toshiba_match +ffffffff825af0a0 T toshiba_attach +ffffffff825af180 T get_param_brightness +ffffffff825af1e0 T acpitoshiba_get_param +ffffffff825af240 T set_param_brightness +ffffffff825af2d0 T toshiba_update_brightness +ffffffff825af3d0 T acpitoshiba_set_param +ffffffff825af470 T toshiba_set_brightness +ffffffff825af590 T toshiba_enable_events +ffffffff825af620 T toshiba_read_events +ffffffff825af780 T toshiba_hotkey +ffffffff825af9b0 T toshiba_get_brightness +ffffffff825afb20 T toshiba_fn_key_brightness_up +ffffffff825afc70 T toshiba_fn_key_brightness_down +ffffffff825afdc0 T toshiba_fn_key_video_output +ffffffff825aff10 T toshiba_get_video_output +ffffffff825b0080 T toshiba_set_video_output +ffffffff825b1000 T acpisony_match +ffffffff825b1070 T acpisony_attach +ffffffff825b10e0 T acpisony_activate +ffffffff825b1120 T acpisony_notify_setup +ffffffff825b1310 T acpisony_notify +ffffffff825b16b0 T acpisony_find_offset +ffffffff825b17c0 T acpisony_set_hotkey +ffffffff825b19b0 T acpisony_brightness_down +ffffffff825b1ac0 T acpisony_get_brightness +ffffffff825b1b40 T acpisony_set_brightness +ffffffff825b2000 T acpivideo_match +ffffffff825b2070 T acpivideo_attach +ffffffff825b21d0 T acpivideo_getpcibus +ffffffff825b2210 T acpivideo_notify +ffffffff825b2270 T acpivideo_set_policy +ffffffff825b2340 T acpi_foundvout +ffffffff825b2410 T acpivideo_print +ffffffff825b3000 T acpivout_match +ffffffff825b3070 T acpivout_attach +ffffffff825b31c0 T acpivout_notify +ffffffff825b3270 T acpivout_get_bcl +ffffffff825b3390 T acpivout_get_brightness +ffffffff825b3430 T acpivout_get_param +ffffffff825b34d0 T acpivout_set_param +ffffffff825b3630 T acpivout_select_brightness +ffffffff825b3700 T acpivout_find_brightness +ffffffff825b3790 T acpivout_set_brightness +ffffffff825b4000 T acpipwrres_match +ffffffff825b4070 T acpipwrres_attach +ffffffff825b42b0 T acpipwrres_foundcons +ffffffff825b4440 T acpipwrres_ref_incr +ffffffff825b44d0 T acpipwrres_hascons +ffffffff825b4520 T acpipwrres_ref_decr +ffffffff825b45b0 T acpipwrres_addcons +ffffffff825b5000 T aibs_match +ffffffff825b5030 T aibs_attach +ffffffff825b5140 T aibs_probe +ffffffff825b52a0 T aibs_attach_new +ffffffff825b53c0 T aibs_attach_sif +ffffffff825b5590 T aibs_notify +ffffffff825b5600 T aibs_add_sensor +ffffffff825b5850 T aibs_getpack +ffffffff825b58d0 T aibs_refresh +ffffffff825b5930 T aibs_refresh_r +ffffffff825b5a70 T aibs_getvalue +ffffffff825b5bc0 T aibs_find_cb +ffffffff825b6000 T aplgpio_match +ffffffff825b6060 T aplgpio_attach +ffffffff825b6310 T aplgpio_intr +ffffffff825b6460 T aplgpio_read_pin +ffffffff825b64b0 T aplgpio_write_pin +ffffffff825b6520 T aplgpio_intr_establish +ffffffff825b6640 T aplgpio_intr_enable +ffffffff825b66d0 T aplgpio_intr_disable +ffffffff825b7000 T bytgpio_match +ffffffff825b7060 T bytgpio_attach +ffffffff825b7320 T bytgpio_intr +ffffffff825b7450 T bytgpio_read_pin +ffffffff825b74b0 T bytgpio_write_pin +ffffffff825b7530 T bytgpio_intr_establish +ffffffff825b75a0 T bytgpio_intr_enable +ffffffff825b7690 T bytgpio_intr_disable +ffffffff825b8000 T chvgpio_match +ffffffff825b8060 T chvgpio_attach +ffffffff825b8300 T chvgpio_intr +ffffffff825b83d0 T chvgpio_read_pin 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+ffffffff825bafe0 T pchgpio_intr_handle +ffffffff825bb0c0 T pchgpio_save_pin +ffffffff825bb280 T pchgpio_restore_pin +ffffffff825bc000 T tipmic_match +ffffffff825bc050 T tipmic_attach +ffffffff825bc250 T tipmic_write_1 +ffffffff825bc310 T tipmic_intr +ffffffff825bc470 T tipmic_get_lpat +ffffffff825bc580 T tipmic_read_pin +ffffffff825bc5b0 T tipmic_write_pin +ffffffff825bc5e0 T tipmic_thermal_opreg_handler +ffffffff825bce60 T tipmic_power_opreg_handler +ffffffff825bd100 T tipmic_read_1 +ffffffff825bd1d0 T tipmic_raw_to_temp +ffffffff825be000 T ccpmic_match +ffffffff825be050 T ccpmic_attach +ffffffff825be130 T ccpmic_get_lpat +ffffffff825be240 T ccpmic_read_pin +ffffffff825be3c0 T ccpmic_write_pin +ffffffff825be520 T ccpmic_thermal_opreg_handler +ffffffff825be770 T ccpmic_power_opreg_handler +ffffffff825be960 T ccpmic_read_1 +ffffffff825bea30 T ccpmic_write_1 +ffffffff825beaf0 T ccpmic_raw_to_temp +ffffffff825bf000 T com_acpi_match +ffffffff825bf120 T com_acpi_attach +ffffffff825bf3a0 T com_acpi_is_designware +ffffffff825bf400 T com_acpi_intr_designware +ffffffff825bf430 T com_acpi_is_console +ffffffff825c0000 T sdhc_acpi_match +ffffffff825c0060 T sdhc_acpi_attach +ffffffff825c0370 T sdhc_acpi_parse_resources +ffffffff825c0420 T sdhc_acpi_card_detect_gpio +ffffffff825c0480 T sdhc_acpi_card_detect_intr +ffffffff825c04c0 T sdhc_acpi_power_on +ffffffff825c0540 T sdhc_acpi_explore +ffffffff825c0570 T sdhc_acpi_card_detect_nonremovable +ffffffff825c05a0 T sdhc_acpi_do_explore +ffffffff825c1000 T dwiic_acpi_match +ffffffff825c1050 T dwiic_acpi_attach +ffffffff825c1410 T dwiic_acpi_parse_crs +ffffffff825c1560 T dwiic_acpi_power +ffffffff825c1670 T dwiic_acpi_get_params +ffffffff825c17b0 T dwiic_i2c_intr_establish +ffffffff825c1830 T dwiic_i2c_intr_disestablish +ffffffff825c1850 T dwiic_i2c_intr_string +ffffffff825c18e0 T dwiic_acpi_acquire_bus +ffffffff825c1930 T dwiic_acpi_release_bus +ffffffff825c1960 T dwiic_acpi_bus_scan +ffffffff825c19a0 T dwiic_acpi_found_hid +ffffffff825c1d00 T dwiic_matchhids +ffffffff825c1d90 T dwiic_acpi_found_ihidev +ffffffff825c2000 T dwiic_acpi_found_iatp +ffffffff825c2160 T dwiic_acpi_found_ietp +ffffffff825c3000 T acpicbkbd_match +ffffffff825c3030 T acpicbkbd_attach +ffffffff825c30d0 T acpicbkbd_activate +ffffffff825c3120 T acpicbkbd_get_backlight +ffffffff825c31a0 T acpicbkbd_set_backlight +ffffffff825c3240 T acpicbkbd_write_backlight +ffffffff825c4000 T acpials_match +ffffffff825c4090 T acpials_attach +ffffffff825c4230 T acpials_read +ffffffff825c42b0 T acpials_addtask +ffffffff825c42f0 T acpials_notify +ffffffff825c4380 T acpials_update +ffffffff825c5000 T tpm_match +ffffffff825c5050 T tpm_attach +ffffffff825c5320 T tpm_activate +ffffffff825c5430 T tpm2_start_method +ffffffff825c54b0 T tpm_probe +ffffffff825c5560 T tpm_init_tis +ffffffff825c57d0 T tpm_init_crb +ffffffff825c5b10 T tpm_suspend +ffffffff825c5c00 T tpm_resume +ffffffff825c5c30 T tpm_write_tis +ffffffff825c5fc0 T tpm_read_tis +ffffffff825c6190 T tpm_write_crb +ffffffff825c6570 T tpm_read_crb +ffffffff825c6870 T tpm_request_locality_tis +ffffffff825c6960 T tpm_request_locality_crb +ffffffff825c6a60 T tpm_release_locality_crb +ffffffff825c6ab0 T tpm_release_locality_tis +ffffffff825c6b20 T tpm_getburst +ffffffff825c6bd0 T tpm_status +ffffffff825c6bf0 T tpm_waitfor +ffffffff825c6cd0 T tpm_waitfor_status +ffffffff825c7000 T acpihve_match +ffffffff825c70b0 T acpihve_attach +ffffffff825c8000 T acpisbs_match +ffffffff825c8030 T acpisbs_attach +ffffffff825c82b0 T acpisbs_activate +ffffffff825c8390 T acpisbs_read +ffffffff825c8450 T acpisbs_setup_sensors +ffffffff825c8550 T acpisbs_refresh_sensors +ffffffff825c86a0 T acpisbs_notify +ffffffff825c87e0 T acpi_smbus_read +ffffffff825c9000 T surface_match +ffffffff825c9060 T surface_attach +ffffffff825c90c0 T surface_hotkey +ffffffff825ca000 T ipmi_acpi_match +ffffffff825ca030 T ipmi_acpi_attach +ffffffff825ca260 T ipmi_acpi_parse_crs +ffffffff825cb000 T amdgpio_match +ffffffff825cb060 T amdgpio_attach +ffffffff825cb2a0 T amdgpio_activate +ffffffff825cb390 T amdgpio_intr +ffffffff825cb530 T amdgpio_read_pin +ffffffff825cb580 T amdgpio_write_pin +ffffffff825cb5f0 T amdgpio_intr_establish +ffffffff825cb6e0 T amdgpio_intr_enable +ffffffff825cb760 T amdgpio_intr_disable +ffffffff825cb7e0 T amdgpio_save +ffffffff825cb860 T amdgpio_restore +ffffffff825cb8f0 T amdgpio_save_pin +ffffffff825cb960 T amdgpio_restore_pin +ffffffff825cb9d0 T amdgpio_pin_intr +ffffffff825cc000 T acpihid_match +ffffffff825cc030 T acpihid_attach +ffffffff825cc210 T acpihid_init_dsm +ffffffff825cc370 T acpihid_eval +ffffffff825cc590 T acpihid_notify +ffffffff825cc5f0 T acpihid_button_array_enable +ffffffff825cd000 t iosf_acpi_match +ffffffff825cd050 t iosf_acpi_attach +ffffffff825cd150 t iosf_acpi_mbi_mdr_rd +ffffffff825cd1c0 t iosf_acpi_mbi_mdr_wr +ffffffff825ce000 T acpi_match +ffffffff825ce060 T acpi_attach +ffffffff825ce0a0 T acpi_probe +ffffffff825ce240 T acpi_map +ffffffff825ce330 T acpi_unmap +ffffffff825ce380 T acpi_bus_space_map +ffffffff825ce3a0 T acpi_bus_space_unmap +ffffffff825ce3c0 T acpi_intr_establish +ffffffff825ce500 T acpi_intr_disestablish +ffffffff825ce510 T acpi_scan +ffffffff825ce6b0 T acpi_acquire_glk +ffffffff825ce710 T acpi_release_glk +ffffffff825ce760 T acpi_attach_machdep +ffffffff825ce8f0 T acpi_sleep_cpu +ffffffff825cea90 T acpi_resume_cpu +ffffffff825ceb90 T sleep_mp +ffffffff825cec80 T resume_mp +ffffffff825ced70 T acpi_iommu_device_map +ffffffff825cf000 T hibernate_resume_machdep +ffffffff825cf050 T hibernate_drop_to_real_mode +ffffffff825cf060 T hibernate_activate_resume_pt_machdep +ffffffff825cf0a0 T hibernate_switch_stack_machdep +ffffffff825cf0e0 T hibernate_flush +ffffffff825cf110 T acpi_savecpu +ffffffff825d0000 T sleep_showstate +ffffffff825d00f0 T sleep_setstate +ffffffff825d0150 T gosleep +ffffffff825d0210 T sleep_abort +ffffffff825d0240 T sleep_resume +ffffffff825d02b0 T suspend_finish +ffffffff825d1000 T acpiopen +ffffffff825d10d0 T acpiclose +ffffffff825d1160 T acpiioctl +ffffffff825d12b0 T request_sleep +ffffffff825d1330 T acpi_filtdetach +ffffffff825d1380 T acpi_filtread +ffffffff825d13c0 T acpikqfilter +ffffffff825d2000 T acpipci_match +ffffffff825d2030 T acpipci_attach +ffffffff825d22f0 T acpipci_osc +ffffffff825d2430 T acpipci_parse_resources +ffffffff825d2560 T acpipci_attach_bus +ffffffff825d2730 T acpipci_print +ffffffff825d27a0 T acpipci_attach_busses +ffffffff825d3000 T efiopen +ffffffff825d3040 T eficlose +ffffffff825d3070 T efiioctl +ffffffff825d3110 T efiioc_get_table +ffffffff825d3280 T efiioc_var_get +ffffffff825d3500 T efiioc_var_next +ffffffff825d3720 T efiioc_var_set +ffffffff825d38a0 T efi_adapt_error +ffffffff825d4000 T efi_match +ffffffff825d4060 T efi_attach +ffffffff825d4330 T efi_map_runtime +ffffffff825d44b0 T efi_enter +ffffffff825d4550 T efi_leave +ffffffff825d45d0 T efi_fault +ffffffff825d5000 T vmm_probe +ffffffff825d5050 T vmm_attach +ffffffff825d5170 T vmm_activate +ffffffff825d52b0 T vmmopen +ffffffff825d5300 T vmmclose +ffffffff825d5330 T vm_find +ffffffff825d5450 T vmmioctl +ffffffff825d56d0 T vm_create +ffffffff825d59a0 T vm_get_info +ffffffff825d5bf0 T vm_terminate +ffffffff825d5d60 T vm_resetcpu +ffffffff825d5e80 T vm_share_mem +ffffffff825d5fd0 T pledge_ioctl_vmm +ffffffff825d60c0 T vm_find_vcpu +ffffffff825d6120 T vm_create_check_mem_ranges +ffffffff825d62e0 T vm_teardown +ffffffff825d6420 T vcpu_must_stop +ffffffff825d7000 T vmm_enabled +ffffffff825d7080 T vmm_attach_machdep +ffffffff825d7230 T vmm_quiesce_vmx +ffffffff825d7400 T vmm_activate_machdep +ffffffff825d7520 T vmm_stop +ffffffff825d7650 T vmm_start +ffffffff825d7730 T vmmioctl_machdep +ffffffff825d7800 T vm_intr_pending +ffffffff825d78a0 T vm_mprotect_ept +ffffffff825d7b20 T pledge_ioctl_vmm_machdep +ffffffff825d7b70 T vm_rwvmparams +ffffffff825d7d00 T vmm_init_pvclock +ffffffff825d7dd0 T vm_rwregs +ffffffff825d7ee0 T vcpu_readregs_vmx +ffffffff825d8310 T vcpu_writeregs_vmx +ffffffff825d8780 T vcpu_readregs_svm +ffffffff825d8c30 T vcpu_writeregs_svm +ffffffff825d9100 T vmm_get_guest_memtype +ffffffff825d9180 T vmx_mprotect_ept +ffffffff825d93e0 T vmx_pmap_find_pte_ept +ffffffff825d94b0 T start_vmm_on_cpu +ffffffff825d95d0 T stop_vmm_on_cpu +ffffffff825d9670 T vmclear_on_cpu +ffffffff825d96f0 T vm_impl_init_vmx +ffffffff825d9800 T vm_impl_init_svm +ffffffff825d9910 T vm_impl_init +ffffffff825d99b0 T vm_impl_deinit +ffffffff825d99e0 T vcpu_reload_vmcs_vmx +ffffffff825d9b20 T vcpu_reset_regs_svm +ffffffff825d9eb0 T svm_setmsrbrw +ffffffff825d9fc0 T svm_setmsrbr +ffffffff825da090 T vmm_alloc_vpid +ffffffff825da1a0 T svm_setmsrbw +ffffffff825da280 T vmx_setmsrbr +ffffffff825da330 T vmx_setmsrbw +ffffffff825da3e0 T vmx_setmsrbrw +ffffffff825da4f0 T svm_set_clean +ffffffff825da540 T svm_set_dirty +ffffffff825da590 T vcpu_reset_regs_vmx +ffffffff825dafd0 T vcpu_vmx_check_cap +ffffffff825db0d0 T vcpu_vmx_compute_ctrl +ffffffff825db2b0 T vcpu_init_vmx +ffffffff825db650 T vcpu_deinit_vmx +ffffffff825db7d0 T vcpu_reset_regs +ffffffff825db810 T vcpu_init_svm +ffffffff825db9a0 T vcpu_deinit_svm +ffffffff825dbae0 T vcpu_init +ffffffff825dbba0 T vmm_free_vpid +ffffffff825dbc10 T vcpu_deinit +ffffffff825dbc50 T vm_run +ffffffff825dbe10 T vcpu_run_vmx +ffffffff825dc600 T vcpu_run_svm +ffffffff825dcbf0 T vmm_fpurestore +ffffffff825dccb0 T vmm_fpusave +ffffffff825dcd30 T vmm_translate_gva +ffffffff825dd040 T vmm_update_pvclock +ffffffff825dd140 T vmx_get_exit_info +ffffffff825dd1a0 T vmx_handle_exit +ffffffff825dd5d0 T vmx_instruction_error_decode +ffffffff825dd7a0 T vmm_get_guest_cpu_cpl +ffffffff825dd890 T vmx_handle_intr +ffffffff825dd920 T svm_handle_hlt +ffffffff825dd970 T vmx_handle_hlt +ffffffff825dda20 T svm_handle_exit +ffffffff825ddd40 T svm_handle_np_fault +ffffffff825ddee0 T vmm_handle_cpuid +ffffffff825de580 T svm_handle_msr +ffffffff825de850 T svm_handle_xsetbv +ffffffff825de8f0 T svm_handle_inout +ffffffff825de9f0 T vmm_inject_ud +ffffffff825dea20 T vmm_inject_db +ffffffff825dea50 T vmx_handle_np_fault +ffffffff825debb0 T vmx_handle_inout +ffffffff825ded30 T vmx_handle_cr +ffffffff825def30 T vmx_handle_rdmsr +ffffffff825df000 T vmx_handle_wrmsr +ffffffff825df270 T vmx_handle_xsetbv +ffffffff825df340 T vmm_inject_gp +ffffffff825df370 T vmx_get_exit_qualification +ffffffff825df3d0 T vmx_get_guest_faulttype +ffffffff825df470 T svm_get_guest_faulttype +ffffffff825df4a0 T svm_fault_page +ffffffff825df530 T vmx_fault_page +ffffffff825df680 T vmm_get_guest_cpu_mode +ffffffff825df780 T vmx_load_pdptes +ffffffff825dfa00 T vmx_handle_cr0_write +ffffffff825dfc10 T vmx_handle_cr4_write +ffffffff825dfcb0 T vmm_handle_xsetbv +ffffffff825dfd40 T vmx_handle_misc_enable_msr +ffffffff825dfda0 T vmm_pat_is_valid +ffffffff825dfe80 T vmm_gpa_is_valid +ffffffff825dfef0 T vmx_exit_reason_decode +ffffffff825dff30 T svm_exit_reason_decode +ffffffff825e0d40 T vcpu_state_decode +ffffffff825e1000 T vmm_dispatch_intr +ffffffff825e1020 T vmxon +ffffffff825e1050 T vmxoff +ffffffff825e1080 T vmclear +ffffffff825e10b0 T vmptrld +ffffffff825e10e0 T vmptrst +ffffffff825e1110 T vmwrite +ffffffff825e1140 T vmread +ffffffff825e1170 T invvpid +ffffffff825e118b t invvpid_fail +ffffffff825e1192 t invvpid_ret +ffffffff825e11b0 T invept +ffffffff825e11cb t invept_fail +ffffffff825e11d2 t invept_ret +ffffffff825e11f0 T vmx_enter_guest +ffffffff825e121b t skip_init +ffffffff825e12e8 t no_l1df_msr +ffffffff825e12eb t l1df_tlb_loop +ffffffff825e1304 t l1df_tlb_done +ffffffff825e130c t l1df_load_cache +ffffffff825e1323 t done_flush +ffffffff825e13b6 t do_resume +ffffffff825e143b t fail_launch_or_resume +ffffffff825e147d t fail_launch_unknown +ffffffff825e148a t fail_launch_invalid_vmcs +ffffffff825e1497 t fail_launch_valid_vmcs +ffffffff825e14b4 t vmx_exit_handler_asm +ffffffff825e1579 t restore_host +ffffffff825e1610 T svm_enter_guest +ffffffff825e17a0 t restore_host_svm +ffffffff825e2000 T sdmmc_match +ffffffff825e2050 T sdmmc_attach +ffffffff825e2390 T sdmmc_detach +ffffffff825e2440 T sdmmc_activate +ffffffff825e2510 T sdmmc_discover_task +ffffffff825e25d0 T sdmmc_create_thread +ffffffff825e2640 T sdmmc_holds_root_device +ffffffff825e26a0 T sdmmc_task_thread +ffffffff825e2890 T sdmmc_needs_discover +ffffffff825e2940 T sdmmc_del_task +ffffffff825e29f0 T sdmmc_card_detach +ffffffff825e2ad0 T sdmmc_add_task +ffffffff825e2b50 T sdmmc_card_attach +ffffffff825e2c60 T sdmmc_enable +ffffffff825e2db0 T sdmmc_scan +ffffffff825e2e40 T sdmmc_init +ffffffff825e2f40 T sdmmc_disable +ffffffff825e30a0 T sdmmc_function_free +ffffffff825e30c0 T sdmmc_delay +ffffffff825e3110 T sdmmc_select_card +ffffffff825e3330 T sdmmc_set_bus_power +ffffffff825e34e0 T sdmmc_function_alloc +ffffffff825e3570 T sdmmc_app_command +ffffffff825e3700 T sdmmc_mmc_command +ffffffff825e3780 T sdmmc_go_idle_state +ffffffff825e3890 T sdmmc_send_if_cond +ffffffff825e39e0 T sdmmc_set_relative_addr +ffffffff825e4000 T sdmmc_cisptr +ffffffff825e40a0 T sdmmc_read_cis +ffffffff825e43e0 T sdmmc_print_cis +ffffffff825e4550 T sdmmc_check_cis_quirks +ffffffff825e5000 T sdmmc_io_enable +ffffffff825e52a0 T sdmmc_io_reset +ffffffff825e53d0 T sdmmc_io_send_op_cond +ffffffff825e5540 T sdmmc_io_scan +ffffffff825e5690 T sdmmc_io_init +ffffffff825e57c0 T sdmmc_io_set_highspeed +ffffffff825e5a60 T sdmmc_io_set_bus_width +ffffffff825e5cf0 T sdmmc_io_function_ready +ffffffff825e5e70 T sdmmc_io_read_1 +ffffffff825e5fc0 T sdmmc_io_function_enable +ffffffff825e6390 T sdmmc_io_write_1 +ffffffff825e6510 T sdmmc_io_function_disable +ffffffff825e6790 T sdmmc_io_attach +ffffffff825e6880 T sdmmc_print +ffffffff825e6ad0 T sdmmc_submatch +ffffffff825e6b50 T sdmmc_io_detach +ffffffff825e6c00 T sdmmc_io_rw_direct +ffffffff825e6da0 T sdmmc_io_rw_extended_subr +ffffffff825e6f40 T sdmmc_io_rw_extended +ffffffff825e7340 T sdmmc_io_read_2 +ffffffff825e74a0 T sdmmc_io_write_2 +ffffffff825e7600 T sdmmc_io_read_4 +ffffffff825e7760 T sdmmc_io_write_4 +ffffffff825e78c0 T sdmmc_io_read_multi_1 +ffffffff825e79b0 T sdmmc_io_write_multi_1 +ffffffff825e7aa0 T sdmmc_io_read_region_1 +ffffffff825e7b90 T sdmmc_io_write_region_1 +ffffffff825e7c80 T sdmmc_io_xchg +ffffffff825e7e10 T sdmmc_intr_enable +ffffffff825e8080 T sdmmc_intr_disable +ffffffff825e82f0 T sdmmc_intr_establish +ffffffff825e83f0 T sdmmc_intr_disestablish +ffffffff825e84e0 T sdmmc_card_intr +ffffffff825e8530 T sdmmc_intr_task +ffffffff825e85c0 T sdmmc_io_set_blocklen +ffffffff825e9000 T sdmmc_mem_enable +ffffffff825e9450 T sdmmc_mem_send_op_cond +ffffffff825e9600 T sdmmc_mem_signal_voltage +ffffffff825e96c0 T sdmmc_mem_scan +ffffffff825e99d0 T sdmmc_decode_csd +ffffffff825e9e00 T sdmmc_decode_cid +ffffffff825ea2a0 T sdmmc_mem_send_scr +ffffffff825ea3e0 T sdmmc_mem_decode_scr +ffffffff825ea440 T sdmmc_mem_send_cxd_data +ffffffff825ea5b0 T sdmmc_mem_set_bus_width +ffffffff825ea6c0 T sdmmc_mem_sd_switch +ffffffff825ea970 T sdmmc_be512_to_bitfield512 +ffffffff825eaa20 T sdmmc_mem_mmc_switch +ffffffff825eab10 T sdmmc_mem_init +ffffffff825eac60 T sdmmc_mem_set_blocklen +ffffffff825ead60 T sdmmc_mem_sd_init +ffffffff825eb140 T sdmmc_mem_mmc_init +ffffffff825eb800 T sdmmc_mem_select_transfer_mode +ffffffff825eb880 T sdmmc_mem_execute_tuning +ffffffff825eb910 T sdmmc_mem_read_block_subr +ffffffff825ebc70 T sdmmc_mem_single_read_block +ffffffff825ebd40 T sdmmc_mem_read_block +ffffffff825ebef0 T sdmmc_mem_write_block_subr +ffffffff825ec240 T sdmmc_mem_single_write_block +ffffffff825ec310 T sdmmc_mem_write_block +ffffffff825ec4c0 T sdmmc_mem_hibernate_write +ffffffff825ed000 T sdmmc_scsi_cmd +ffffffff825ed1f0 T sdmmc_minphys +ffffffff825ed270 T sdmmc_scsi_attach +ffffffff825ed460 T sdmmc_alloc_ccbs +ffffffff825ed5a0 T sdmmc_free_ccbs +ffffffff825ed600 T sdmmc_scsi_detach +ffffffff825ed760 T sdmmc_stimeout +ffffffff825ed7e0 T sdmmc_ccb_alloc +ffffffff825ed890 T sdmmc_ccb_free +ffffffff825ed970 T sdmmc_inquiry +ffffffff825edbe0 T sdmmc_start_xs +ffffffff825edcd0 T sdmmc_complete_xs +ffffffff825edda0 T sdmmc_done_xs +ffffffff825eddf0 T sdmmc_scsi_hibernate_io +ffffffff825ee000 T bwfm_sdio_preinit +ffffffff825ee4a0 T bwfm_sdio_txcheck +ffffffff825ee4e0 T bwfm_sdio_txdata +ffffffff825ee550 T bwfm_sdio_txctl +ffffffff825ee6a0 T bwfm_sdio_buscore_read +ffffffff825ee6b0 T bwfm_sdio_buscore_write +ffffffff825ee6d0 T bwfm_sdio_buscore_prepare +ffffffff825ee810 T bwfm_sdio_buscore_activate +ffffffff825ee890 T bwfm_sdio_match +ffffffff825ee940 T bwfm_sdio_attach +ffffffff825eec00 T bwfm_sdio_detach +ffffffff825eec60 T bwfm_sdio_task +ffffffff825eedc0 T bwfm_sdio_write_1 +ffffffff825eedf0 T bwfm_sdio_read_1 +ffffffff825eee20 T bwfm_sdio_write_4 +ffffffff825eeed0 T bwfm_sdio_read_4 +ffffffff825eef80 T bwfm_sdio_load_microcode +ffffffff825ef1e0 T bwfm_sdio_clkctl +ffffffff825ef310 T bwfm_sdio_dev_write +ffffffff825ef360 T bwfm_sdio_intr +ffffffff825ef3a0 T bwfm_sdio_ram_read_write +ffffffff825ef5d0 T bwfm_sdio_htclk +ffffffff825ef840 T bwfm_sdio_readshared +ffffffff825ef910 T bwfm_sdio_dev_read +ffffffff825ef950 T bwfm_sdio_rx_frames +ffffffff825efd00 T bwfm_sdio_tx_frames +ffffffff825efe00 T bwfm_sdio_backplane +ffffffff825efeb0 T bwfm_sdio_buf_read +ffffffff825eff90 T bwfm_sdio_buf_write +ffffffff825f0040 T bwfm_sdio_frame_read_write +ffffffff825f01c0 T bwfm_sdio_newbuf +ffffffff825f0240 T bwfm_sdio_tx_ok +ffffffff825f02a0 T bwfm_sdio_tx_ctrlframe +ffffffff825f03a0 T bwfm_sdio_tx_dataframe +ffffffff825f04f0 T bwfm_sdio_rx_glom +ffffffff825f1000 T onewire_match +ffffffff825f1050 T onewire_attach +ffffffff825f10f0 T onewire_detach +ffffffff825f1160 T onewire_activate +ffffffff825f1180 T onewire_scan +ffffffff825f13a0 T onewire_createthread +ffffffff825f1410 T onewire_print +ffffffff825f14e0 T onewirebus_print +ffffffff825f1530 T onewire_lock +ffffffff825f1550 T onewire_unlock +ffffffff825f1570 T onewire_reset +ffffffff825f1590 T onewire_bit +ffffffff825f15b0 T onewire_read_byte +ffffffff825f16f0 T onewire_write_byte +ffffffff825f17d0 T onewire_read_block +ffffffff825f1870 T onewire_write_block +ffffffff825f1910 T onewire_triplet +ffffffff825f19f0 T onewire_matchrom +ffffffff825f1b40 T onewire_search +ffffffff825f1ee0 T onewire_thread +ffffffff825f2000 T onewire_crc +ffffffff825f20b0 T onewire_crc16 +ffffffff825f2170 T onewire_famname +ffffffff825f21b0 T onewire_matchbyfam +ffffffff825f3000 T owid_match +ffffffff825f3030 T owid_attach +ffffffff825f3100 T owid_detach +ffffffff825f3140 T owid_activate +ffffffff825f4000 T owsbm_match +ffffffff825f4030 T owsbm_attach +ffffffff825f41d0 T owsbm_detach +ffffffff825f4240 T owsbm_activate +ffffffff825f4270 T owsbm_update +ffffffff825f5000 T owtemp_match +ffffffff825f5030 T owtemp_attach +ffffffff825f5130 T owtemp_detach +ffffffff825f51a0 T owtemp_activate +ffffffff825f51d0 T owtemp_update +ffffffff825f6000 T owctr_match +ffffffff825f6030 T owctr_attach +ffffffff825f6180 T owctr_detach +ffffffff825f61f0 T owctr_activate +ffffffff825f6220 T owctr_update +ffffffff825f6250 T owctr_update_counter +ffffffff825f7000 A __text_page_start +ffffffff825f7000 T Xsyscall_meltdown +ffffffff825f700c T Xsyscall +ffffffff825f726e t Xsyscall_trampback +ffffffff825f7280 T intr_user_exit +ffffffff825f72c2 t intr_user_exit_post_ast +ffffffff825f73ee t Xiretq_trampback +ffffffff825f73fa T doreti_iret +ffffffff825f8000 T alltraps +ffffffff825f8138 T recall_trap +ffffffff825f8150 T alltraps_kern +ffffffff825f8153 T alltraps_kern_meltdown +ffffffff825f9000 ? Xsyscall32 +ffffffff825f9000 A __kutext_start +ffffffff825f9000 A __text_page_end +ffffffff825fa000 ? Xtrap00 +ffffffff825fa010 ? Xtrap01 +ffffffff825fa020 ? Xtrap02 +ffffffff825fa028 c calltrap_specstk +ffffffff825fa0f0 ? calltrap_specstk_tramp +ffffffff825fa110 ? Xtrap03 +ffffffff825fa120 ? Xtrap04 +ffffffff825fa130 ? Xtrap05 +ffffffff825fa140 ? Xtrap06 +ffffffff825fa150 ? Xtrap07 +ffffffff825fa160 ? Xtrap08 +ffffffff825fa170 ? Xtrap09 +ffffffff825fa180 ? Xtrap0a +ffffffff825fa190 ? Xtrap0b +ffffffff825fa1a0 ? Xtrap0c +ffffffff825fa1b0 ? Xtrap0d +ffffffff825fa240 ? Xtrap0e +ffffffff825fa250 ? Xintrspurious +ffffffff825fa250 ? Xtrap0f +ffffffff825fa260 ? Xtrap10 +ffffffff825fa270 ? Xtrap11 +ffffffff825fa280 ? Xtrap12 +ffffffff825fa290 ? Xtrap13 +ffffffff825fa2a0 ? Xtrap14 +ffffffff825fa2b0 ? Xtrap15 +ffffffff825fa2c0 ? Xtrap16 +ffffffff825fa2c0 ? Xtrap17 +ffffffff825fa2c0 ? Xtrap18 +ffffffff825fa2c0 ? Xtrap19 +ffffffff825fa2c0 ? Xtrap1a +ffffffff825fa2c0 ? Xtrap1b +ffffffff825fa2c0 ? Xtrap1c +ffffffff825fa2c0 ? Xtrap1d +ffffffff825fa2c0 ? Xtrap1e +ffffffff825fa2c0 ? Xtrap1f +ffffffff825fa2d0 ? x2apic_eoi +ffffffff825fa2f0 ? Xintr_lapic_ipi +ffffffff825fa330 ? Xipi_invltlb +ffffffff825fa360 ? Xipi_invlpg +ffffffff825fa390 ? Xipi_invlrange +ffffffff825fa3d0 ? Xipi_invltlb_pcid +ffffffff825fa410 ? Xipi_invlpg_pcid +ffffffff825fa460 ? Xipi_invlrange_pcid +ffffffff825fa4d0 ? Xintr_lapic_ltimer +ffffffff825fa510 ? Xintr_xen_upcall +ffffffff825fa550 ? Xintr_hyperv_upcall +ffffffff825fa590 ? Xintr_legacy0 +ffffffff825fa5d0 ? Xintr_legacy1 +ffffffff825fa610 ? Xintr_legacy2 +ffffffff825fa650 ? Xintr_legacy3 +ffffffff825fa690 ? Xintr_legacy4 +ffffffff825fa6d0 ? Xintr_legacy5 +ffffffff825fa710 ? Xintr_legacy6 +ffffffff825fa750 ? Xintr_legacy7 +ffffffff825fa790 ? Xintr_legacy8 +ffffffff825fa7d0 ? Xintr_legacy9 +ffffffff825fa810 ? Xintr_legacy10 +ffffffff825fa850 ? Xintr_legacy11 +ffffffff825fa890 ? Xintr_legacy12 +ffffffff825fa8d0 ? Xintr_legacy13 +ffffffff825fa910 ? Xintr_legacy14 +ffffffff825fa950 ? Xintr_legacy15 +ffffffff825fa990 ? Xintr_ioapic_edge0 +ffffffff825fa9d0 ? Xintr_ioapic_edge1 +ffffffff825faa10 ? Xintr_ioapic_edge2 +ffffffff825faa50 ? Xintr_ioapic_edge3 +ffffffff825faa90 ? Xintr_ioapic_edge4 +ffffffff825faad0 ? Xintr_ioapic_edge5 +ffffffff825fab10 ? Xintr_ioapic_edge6 +ffffffff825fab50 ? Xintr_ioapic_edge7 +ffffffff825fab90 ? Xintr_ioapic_edge8 +ffffffff825fabd0 ? Xintr_ioapic_edge9 +ffffffff825fac10 ? Xintr_ioapic_edge10 +ffffffff825fac50 ? Xintr_ioapic_edge11 +ffffffff825fac90 ? Xintr_ioapic_edge12 +ffffffff825facd0 ? Xintr_ioapic_edge13 +ffffffff825fad10 ? Xintr_ioapic_edge14 +ffffffff825fad50 ? Xintr_ioapic_edge15 +ffffffff825fad90 ? Xintr_ioapic_edge16 +ffffffff825fadd0 ? Xintr_ioapic_edge17 +ffffffff825fae10 ? Xintr_ioapic_edge18 +ffffffff825fae50 ? Xintr_ioapic_edge19 +ffffffff825fae90 ? Xintr_ioapic_edge20 +ffffffff825faed0 ? Xintr_ioapic_edge21 +ffffffff825faf10 ? Xintr_ioapic_edge22 +ffffffff825faf50 ? Xintr_ioapic_edge23 +ffffffff825faf90 ? Xintr_ioapic_edge24 +ffffffff825fafd0 ? Xintr_ioapic_edge25 +ffffffff825fb010 ? Xintr_ioapic_edge26 +ffffffff825fb050 ? Xintr_ioapic_edge27 +ffffffff825fb090 ? Xintr_ioapic_edge28 +ffffffff825fb0d0 ? Xintr_ioapic_edge29 +ffffffff825fb110 ? Xintr_ioapic_edge30 +ffffffff825fb150 ? Xintr_ioapic_edge31 +ffffffff825fb190 ? Xintr_ioapic_edge32 +ffffffff825fb1d0 ? Xintr_ioapic_edge33 +ffffffff825fb210 ? Xintr_ioapic_edge34 +ffffffff825fb250 ? Xintr_ioapic_edge35 +ffffffff825fb290 ? Xintr_ioapic_edge36 +ffffffff825fb2d0 ? Xintr_ioapic_edge37 +ffffffff825fb310 ? Xintr_ioapic_edge38 +ffffffff825fb350 ? Xintr_ioapic_edge39 +ffffffff825fb390 ? Xintr_ioapic_edge40 +ffffffff825fb3d0 ? Xintr_ioapic_edge41 +ffffffff825fb410 ? Xintr_ioapic_edge42 +ffffffff825fb450 ? Xintr_ioapic_edge43 +ffffffff825fb490 ? Xintr_ioapic_edge44 +ffffffff825fb4d0 ? Xintr_ioapic_edge45 +ffffffff825fb510 ? Xintr_ioapic_edge46 +ffffffff825fb550 ? Xintr_ioapic_edge47 +ffffffff825fb590 ? Xintr_ioapic_edge48 +ffffffff825fb5d0 ? Xintr_ioapic_edge49 +ffffffff825fb610 ? Xintr_ioapic_edge50 +ffffffff825fb650 ? Xintr_ioapic_edge51 +ffffffff825fb690 ? Xintr_ioapic_edge52 +ffffffff825fb6d0 ? Xintr_ioapic_edge53 +ffffffff825fb710 ? Xintr_ioapic_edge54 +ffffffff825fb750 ? Xintr_ioapic_edge55 +ffffffff825fb790 ? Xintr_ioapic_edge56 +ffffffff825fb7d0 ? Xintr_ioapic_edge57 +ffffffff825fb810 ? Xintr_ioapic_edge58 +ffffffff825fb850 ? Xintr_ioapic_edge59 +ffffffff825fb890 ? Xintr_ioapic_edge60 +ffffffff825fb8d0 ? Xintr_ioapic_edge61 +ffffffff825fb910 ? Xintr_ioapic_edge62 +ffffffff825fb950 ? Xintr_ioapic_edge63 +ffffffff825fb990 ? Xintr_ioapic_level0 +ffffffff825fb9d0 ? Xintr_ioapic_level1 +ffffffff825fba10 ? Xintr_ioapic_level2 +ffffffff825fba50 ? Xintr_ioapic_level3 +ffffffff825fba90 ? Xintr_ioapic_level4 +ffffffff825fbad0 ? Xintr_ioapic_level5 +ffffffff825fbb10 ? Xintr_ioapic_level6 +ffffffff825fbb50 ? Xintr_ioapic_level7 +ffffffff825fbb90 ? Xintr_ioapic_level8 +ffffffff825fbbd0 ? Xintr_ioapic_level9 +ffffffff825fbc10 ? Xintr_ioapic_level10 +ffffffff825fbc50 ? Xintr_ioapic_level11 +ffffffff825fbc90 ? Xintr_ioapic_level12 +ffffffff825fbcd0 ? Xintr_ioapic_level13 +ffffffff825fbd10 ? Xintr_ioapic_level14 +ffffffff825fbd50 ? Xintr_ioapic_level15 +ffffffff825fbd90 ? Xintr_ioapic_level16 +ffffffff825fbdd0 ? Xintr_ioapic_level17 +ffffffff825fbe10 ? Xintr_ioapic_level18 +ffffffff825fbe50 ? Xintr_ioapic_level19 +ffffffff825fbe90 ? Xintr_ioapic_level20 +ffffffff825fbed0 ? Xintr_ioapic_level21 +ffffffff825fbf10 ? Xintr_ioapic_level22 +ffffffff825fbf50 ? Xintr_ioapic_level23 +ffffffff825fbf90 ? Xintr_ioapic_level24 +ffffffff825fbfd0 ? Xintr_ioapic_level25 +ffffffff825fc010 ? Xintr_ioapic_level26 +ffffffff825fc050 ? Xintr_ioapic_level27 +ffffffff825fc090 ? Xintr_ioapic_level28 +ffffffff825fc0d0 ? Xintr_ioapic_level29 +ffffffff825fc110 ? Xintr_ioapic_level30 +ffffffff825fc150 ? Xintr_ioapic_level31 +ffffffff825fc190 ? Xintr_ioapic_level32 +ffffffff825fc1d0 ? Xintr_ioapic_level33 +ffffffff825fc210 ? Xintr_ioapic_level34 +ffffffff825fc250 ? Xintr_ioapic_level35 +ffffffff825fc290 ? Xintr_ioapic_level36 +ffffffff825fc2d0 ? Xintr_ioapic_level37 +ffffffff825fc310 ? Xintr_ioapic_level38 +ffffffff825fc350 ? Xintr_ioapic_level39 +ffffffff825fc390 ? Xintr_ioapic_level40 +ffffffff825fc3d0 ? Xintr_ioapic_level41 +ffffffff825fc410 ? Xintr_ioapic_level42 +ffffffff825fc450 ? Xintr_ioapic_level43 +ffffffff825fc490 ? Xintr_ioapic_level44 +ffffffff825fc4d0 ? Xintr_ioapic_level45 +ffffffff825fc510 ? Xintr_ioapic_level46 +ffffffff825fc550 ? Xintr_ioapic_level47 +ffffffff825fc590 ? Xintr_ioapic_level48 +ffffffff825fc5d0 ? Xintr_ioapic_level49 +ffffffff825fc610 ? Xintr_ioapic_level50 +ffffffff825fc650 ? Xintr_ioapic_level51 +ffffffff825fc690 ? Xintr_ioapic_level52 +ffffffff825fc6d0 ? Xintr_ioapic_level53 +ffffffff825fc710 ? Xintr_ioapic_level54 +ffffffff825fc750 ? Xintr_ioapic_level55 +ffffffff825fc790 ? Xintr_ioapic_level56 +ffffffff825fc7d0 ? Xintr_ioapic_level57 +ffffffff825fc810 ? Xintr_ioapic_level58 +ffffffff825fc850 ? Xintr_ioapic_level59 +ffffffff825fc890 ? Xintr_ioapic_level60 +ffffffff825fc8d0 ? Xintr_ioapic_level61 +ffffffff825fc910 ? Xintr_ioapic_level62 +ffffffff825fc950 ? Xintr_ioapic_level63 +ffffffff825fd000 ? codepatch_fill_nop +ffffffff825fd000 A __cptext_start +ffffffff825fd000 A __kutext_end +ffffffff825fd0b0 ? codepatch_maprw +ffffffff825fd190 ? codepatch_unmaprw +ffffffff825fd200 ? codepatch_nop +ffffffff825fd360 ? codepatch_replace +ffffffff825fd510 ? codepatch_call +ffffffff825fd530 ? codepatch_jmp +ffffffff825fe000 A __cptext_end +ffffffff825fe000 A __rodata_start +ffffffff825fe000 C _etext +ffffffff825fe000 C etext +ffffffff825ff000 r seeprom_read +ffffffff825ff004 r icl_mg_pll_find_divisors.div1_vals +ffffffff825ff034 r athn_ac2qid +ffffffff825ff034 r athn_ac2qid +ffffffff825ff034 r athn_ac2qid +ffffffff825ff040 r rtwn_get_rssi.cckoff +ffffffff825ff068 r rsu_ac2qid +ffffffff825ff078 r pckbc_portcmd +ffffffff825ff07c r tht_fifo_write_pad.pad +ffffffff825ff084 r rsu_get_rssi.cckoff +ffffffff825ff0a4 r adlp_n_revids +ffffffff825ff0e8 r apple_iso_trans +ffffffff825ff0f0 r wihap_check_tx.txratetable +ffffffff825ff0f4 r dmamode +ffffffff825ff118 r gen9_edram_size_mb.sets +ffffffff825ff12c r dg2_g12_revid_step_tbl +ffffffff82600000 r isomappings +ffffffff82600080 r unimappings +ffffffff82600230 r replacements +ffffffff8260393f r apollo_pio_rec +ffffffff8264fec1 r apollo_udma33_tim +ffffffff82664fe7 r pp_r600_decoded_lanes +ffffffff8269b152 r cmd680_setup_channel.udma_tbl +ffffffff826a3604 r apollo_udma100_tim +ffffffff826a360a r cmd0646_9_tim_udma +ffffffff826b1a8b r substchar +ffffffff827075ca r apollo_udma133_tim +ffffffff827075d1 r apollo_udma66_tim +ffffffff827075fb r cy_pio_rec +ffffffff8270ccd8 R drm_ca +ffffffff8270cd00 R drm_filtops +ffffffff8270cd30 R drmread_filtops +ffffffff8270d000 r vga_emulops +ffffffff8270d048 R vga_stdscreen +ffffffff8270d078 R vga_stdscreen_mono +ffffffff8270d0a8 R vga_stdscreen_bf +ffffffff8270d0d8 R vga_40lscreen +ffffffff8270d108 R vga_40lscreen_mono +ffffffff8270d138 R vga_40lscreen_bf +ffffffff8270d168 R vga_50lscreen +ffffffff8270d198 R vga_50lscreen_mono +ffffffff8270d1c8 R vga_50lscreen_bf +ffffffff8270d1f8 R vga_screenlist +ffffffff8270d208 R vga_screenlist_mono +ffffffff8270d218 R vga_accessops +ffffffff8270d278 r i945_wm_info +ffffffff8270d2b8 r bgansitopc +ffffffff8270d2c0 r pctoansi +ffffffff8270d300 r sdma_offsets +ffffffff8270d300 r sdma_offsets +ffffffff8270d338 r iha_rate_tbl +ffffffff8270d370 r i830_a_wm_info +ffffffff8270d3a8 r gen9_edram_size_mb.ways +ffffffff8270d408 r aggr_periodic_times +ffffffff8270d500 r michael_final.pad +ffffffff8270d528 r rt_copysa.maskarray +ffffffff8270d530 r i915_wm_info +ffffffff8270d538 r amdgpu_ih_clientid_jpeg +ffffffff8270d538 r amdgpu_ih_clientid_uvds +ffffffff8270d538 r amdgpu_ih_clientid_vcns +ffffffff8270d538 r amdgpu_ih_clientid_vcns +ffffffff8270d538 r amdgpu_ih_clientid_vcns +ffffffff8270d568 r jsl_ehl_revids +ffffffff8270d578 r vga_setfontset.cmaptabb +ffffffff8270d5e8 r i830_bc_wm_info +ffffffff8270d650 r hsw_activate_psr2.map +ffffffff8270d658 r tgl_revids +ffffffff8270d690 r __drm_universal_plane_init.default_modifiers +ffffffff8270d6a0 r iwn_tid2fifo +ffffffff8270d6b8 r vga_setfontset.cmaptaba +ffffffff8270d6c0 r crtc_offsets +ffffffff8270d6c0 r crtc_offsets +ffffffff8270d6c0 r crtc_offsets +ffffffff8270d768 r rtwn_r88e_get_rssi.cckoff +ffffffff8270e000 R edid_vendors +ffffffff8270e2c0 R edid_nvendors +ffffffff8270e2d0 R edid_products +ffffffff8270e330 R edid_nproducts +ffffffff8270e340 r _edid_modes +ffffffff8270f000 R videomode_list +ffffffff82710080 R videomode_count +ffffffff82711000 r ahc_hard_errors +ffffffff82711080 r critical_sections +ffffffff827110b0 r patches +ffffffff82711d50 r seqprog +ffffffff82713000 r ahc_switch +ffffffff82714000 r termstat_strings +ffffffff82714020 r critical_sections +ffffffff82714060 r seqprog +ffffffff82714d50 r patches +ffffffff82716000 r ahd_switch +ffffffff82717000 R aic_switch +ffffffff82718000 R adw_switch +ffffffff82719000 R gdt_switch +ffffffff8271a000 R twe_switch +ffffffff8271b000 R ciss_switch +ffffffff8271b030 R ciss_level +ffffffff8271b050 R ciss_stat +ffffffff8271c000 R ami_switch +ffffffff8271c028 R ami_raw_switch +ffffffff8271d000 R mfi_switch +ffffffff8271d028 R mfi_pd_switch +ffffffff8271d050 r mfi_iop_xscale +ffffffff8271d080 r mfi_iop_ppc +ffffffff8271d0b0 r mfi_iop_gen2 +ffffffff8271d0e0 r mfi_iop_skinny +ffffffff8271d110 r mfi_bbu_indicators +ffffffff8271e000 R qlw_switch +ffffffff8271f000 R isp_2100_risc_code +ffffffff82731bf0 R isp_2200_risc_code +ffffffff82744990 R isp_2300_risc_code +ffffffff8275e408 R qla_switch +ffffffff8275e430 r qla_regs_2100 +ffffffff8275e460 r qla_regs_2200 +ffffffff8275e490 r qla_regs_23XX +ffffffff8275f000 R ahci_atascsi_methods +ffffffff82760000 R nvme_switch +ffffffff82760028 r nvme_ops +ffffffff82761000 R mpi_switch +ffffffff82761060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff82761090 r chv_oa_mux_regs +ffffffff827610b0 r fiji_clock_stretcher_lookup_table +ffffffff827610b0 r tonga_clock_stretcher_lookup_table +ffffffff827610d0 r iosf_pci_devices +ffffffff827610f0 r link_speed +ffffffff827610f0 r link_speed +ffffffff82761130 r drm_fb_xfrm.default_dst_pitch +ffffffff82761130 r non_supported_protection +ffffffff82761140 r tgl_uy_revids +ffffffff827612a0 r bwi_phy_noise_11g_rev1 +ffffffff82761310 r cardslot_process_event.antonym_ev +ffffffff827613a0 r gen11_oa_mux_regs +ffffffff82761440 r dpia_to_preferred_enc_id_table +ffffffff827614b0 r ddr2_cycle_tenths +ffffffff82761520 r rtw_intr_rx.ratetbl +ffffffff827615a0 r abm_config +ffffffff82761620 r getbootinfo.ports +ffffffff82761670 r reg_offsets +ffffffff82761680 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff82761690 r glk_revids +ffffffff827616a0 r init_non_clock_fields.look_up +ffffffff827616b0 r uftdi_8u232am_getrate.roundoff +ffffffff82761710 r zyd_rx_data.rates +ffffffff82761730 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff82761760 r intel_engine_init_tlb_invalidation.gen8_regs +ffffffff82761790 r bwi_phy_noise_11g +ffffffff827617a0 r hpt366_pio +ffffffff82761800 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff82761820 r ether_crc32_be_update.rev +ffffffff82761820 r rtw_grf5101_mac_crypt.caesar +ffffffff82761870 r snb_b_fdi_train_param +ffffffff82761940 r intel_hpll_vco.elk_vco +ffffffff82761960 r icl_revids +ffffffff827619c0 r pin_offsets +ffffffff827619e0 r amdgpu_ih_srcid_jpeg +ffffffff82761a20 r firmware_list +ffffffff82761a80 r atom_arg_shift +ffffffff82761a80 r atom_arg_shift +ffffffff82761ac0 r pf_syncookie_wstab +ffffffff82761ae0 r ieee80211_media_init.mopts +ffffffff82761b40 r add_entropy_words.twist_table +ffffffff82761be0 r urtw_8225v2_txpwr_cck +ffffffff82761c00 r bwfm_pci_prio2fifo +ffffffff82761c00 r ieee80211_up_to_ac.up_to_ac +ffffffff82761cc0 r paritytab +ffffffff82761cc0 r x86emu_parity_tab +ffffffff82761ce0 r legacy_connector_convert +ffffffff82761d20 r gen7_oa_mux_regs +ffffffff82761d40 r hsw_oa_mux_regs +ffffffff82761d60 r notetab +ffffffff82761d80 r urtw_8225v2_txpwr_cck_ch14 +ffffffff82761da0 r bwi_rf_calibval.rf_calibvals +ffffffff82761e40 r pf_syncookie_msstab +ffffffff82761ea0 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff82761f00 r uath_wme_init.uath_wme_11g +ffffffff82761f40 r gen7_oa_b_counters +ffffffff82762140 r rtwn_iq_calib_run.reg_adda +ffffffff82762180 r atom_def_dst +ffffffff82762180 r atom_def_dst +ffffffff827621c0 r sha256_initial_hash_value +ffffffff82762220 r otus_edca_def +ffffffff82762240 r intel_hpll_vco.blb_vco +ffffffff82762320 r epic_pci_subsys_info +ffffffff82762340 r kbl_revids +ffffffff82762360 r atom_arg_mask +ffffffff82762360 r atom_arg_mask +ffffffff827623c0 r butmap +ffffffff82762400 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff82762440 r comsoft.lsrmap +ffffffff82762480 r xgmi3x16_pcs_err_noncorrectable_mask_reg_aldebaran +ffffffff827624a0 r tulip_mii_phy_readspecific.table +ffffffff82762540 r intel_hpll_vco.pnv_vco +ffffffff827625a0 r dmapageport +ffffffff82762660 r intel_hpll_vco.ctg_vco +ffffffff82762720 r drm_calculate_luminance_range.pre_computed_values +ffffffff82763000 R sili_atascsi_methods +ffffffff82764000 R ncr53c9x_switch +ffffffff82765000 r scf_period +ffffffff82766000 R siop_script +ffffffff827665a0 R lun_switch +ffffffff827665d0 R tag_switch +ffffffff82766660 R load_dsa +ffffffff827666c4 R siop_led_on +ffffffff827666cc R siop_led_off +ffffffff827666d8 R siop_switch +ffffffff82767000 R ep_vortex_media +ffffffff82767100 R ep_default_to_media +ffffffff82768000 R wi_card_ident +ffffffff8276a000 R ucode_table +ffffffff8276b000 r re_revisions +ffffffff8276b290 r re_kstats_tpl +ffffffff8276d000 R smc91cxx_media +ffffffff8276d010 R smc91cxx_mii_bitbang_ops +ffffffff8276e000 R dl10019_mii_bitbang_ops +ffffffff8276e028 R dl10022_mii_bitbang_ops +ffffffff8276f000 R ax88190_mii_bitbang_ops +ffffffff82771000 R ac97_audio_default +ffffffff82771020 R ac97_on_off +ffffffff82771324 R ac97_mic_select +ffffffff82771628 R ac97_mono_select +ffffffff8277192c R ac97_source +ffffffff82771c30 R ac97_volume_stereo +ffffffff82771c4c R ac97_volume_mono +ffffffff82771c70 R source_info +ffffffff82772470 R ac97_ad +ffffffff82772580 R ac97_ak +ffffffff82772610 R ac97_av +ffffffff82772750 R ac97_rl +ffffffff827727a0 R ac97_cm +ffffffff82772820 R ac97_cr +ffffffff82772840 R ac97_cs +ffffffff82772920 R ac97_cx +ffffffff82772980 R ac97_dt +ffffffff827729a0 R ac97_em +ffffffff827729d0 R ac97_es +ffffffff827729f0 R ac97_is +ffffffff82772a10 R ac97_ic +ffffffff82772a90 R ac97_it +ffffffff82772ac0 R ac97_ns +ffffffff82772b80 R ac97_ps +ffffffff82772bb0 R ac97_sl +ffffffff82772bd0 R ac97_st +ffffffff82772d20 R ac97_vi +ffffffff82772d50 R ac97_tt +ffffffff82772dd0 R ac97_ti +ffffffff82772df0 R ac97_wb +ffffffff82772e10 R ac97_wo +ffffffff82772ea0 R ac97_ym +ffffffff82772ef0 R ac97_vendors +ffffffff827731f0 R ac97enhancement +ffffffff827732f0 R ac97feature +ffffffff82774000 R lm_chips +ffffffff82774020 R lm78_sensors +ffffffff827741a0 R w83627hf_sensors +ffffffff827743a0 R w83627ehf_sensors +ffffffff827745c0 R w83627dhg_sensors +ffffffff827747c0 R nct6776f_sensors +ffffffff82774a00 R nct6779d_sensors +ffffffff82774d60 R w83637hf_sensors +ffffffff82774f20 R w83697hf_sensors +ffffffff827750c0 R w83781d_sensors +ffffffff82775280 R w83782d_sensors +ffffffff82775480 R w83783s_sensors +ffffffff82775600 R w83791d_sensors +ffffffff82775860 R w83792d_sensors +ffffffff82775ae0 R as99127f_sensors +ffffffff82776000 r ar5k_known_products +ffffffff82776110 r ar5111_gain_opt +ffffffff827761e0 r ar5112_gain_opt +ffffffff827762b0 r ar5k_5ghz_channels +ffffffff82776a00 r ar5k_2ghz_channels +ffffffff82776f10 r ar5111_rf +ffffffff82777350 r ar5112a_rf +ffffffff82777890 r ar5112_rf +ffffffff82777da0 r ar5413_rf +ffffffff827781b0 r ar2413_rf +ffffffff827784d0 r ar2425_rf +ffffffff82778830 r ar5111_rfg +ffffffff82778b30 r ar5112_rfg +ffffffff82778e30 r ar5413_rfg +ffffffff82779130 r ar2413_rfg +ffffffff82779430 r ar5k_rt_11a +ffffffff82779552 r ar5k_rt_11b +ffffffff82779674 r ar5k_rt_11g +ffffffff82779796 r ar5k_rt_xr +ffffffff8277a000 r ar5210_ini +ffffffff8277b000 r ar5211_mode +ffffffff8277b2c0 r ar5211_ini +ffffffff8277bad0 r ar5211_rf +ffffffff8277c000 r ar5212_pcie +ffffffff8277c080 r ar5212_mode +ffffffff8277c310 r ar5212_ini +ffffffff8277cc80 r ar5212_ar5111_mode +ffffffff8277cf20 r ar5212_ar5112_mode +ffffffff8277d1b0 r ar5413_mode +ffffffff8277db10 r ar2413_mode +ffffffff8277e430 r ar2425_mode +ffffffff8277ed90 r ar5111_bbgain +ffffffff8277f090 r ar5112_bbgain +ffffffff82780000 r athn_5ghz_chans +ffffffff82780020 r athn_rates +ffffffff82781000 r athn_rates +ffffffff82782000 r ar9160_ini +ffffffff82782068 r ar5416_ini +ffffffff827820d0 r ar5416_serdes +ffffffff827820e8 r ar9160_1_1_addac +ffffffff827820f8 r ar9160_1_0_addac +ffffffff82782108 r ar5416_2_2_addac +ffffffff82782118 r ar5416_2_1_addac +ffffffff82782128 r ar5416_set_power_calib.chainoffset +ffffffff82782140 r ar9160_bank6tpc_vals +ffffffff827821c0 r ar5416_bank6tpc_vals +ffffffff82782240 r ar5416_bb_rfgain_vals_2g +ffffffff82782340 r ar5416_bb_rfgain_vals_5g +ffffffff82782440 r ar5416_bank6_vals +ffffffff827824c0 r ar9160_regs +ffffffff82782540 r ar9160_vals_5g20 +ffffffff82782640 r ar9160_vals_5g40 +ffffffff82782740 r ar9160_vals_2g40 +ffffffff82782840 r ar9160_vals_2g20 +ffffffff82782940 r ar9160_cm_regs +ffffffff82782c30 r ar9160_cm_vals +ffffffff82783210 r ar5416_regs +ffffffff82783290 r ar5416_vals_5g20 +ffffffff82783390 r ar5416_vals_5g40 +ffffffff82783490 r ar5416_vals_2g40 +ffffffff82783590 r ar5416_vals_2g20 +ffffffff82783690 r ar5416_cm_regs +ffffffff82783980 r ar5416_cm_vals +ffffffff82783f60 r ar5416_serdes_regs +ffffffff82783f90 r ar5416_serdes_vals +ffffffff82783fc0 r ar9160_1_1_addac_vals +ffffffff82784040 r ar9160_1_0_addac_vals +ffffffff827840c0 r ar5416_2_2_addac_vals +ffffffff82784150 r ar5416_2_1_addac_vals +ffffffff82785000 r ar9280_2_0_ini +ffffffff82785068 r ar9280_2_0_serdes +ffffffff82785080 r ar9280_2_0_rx_gain_23db_backoff +ffffffff827850a0 r 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ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff82790040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff827901e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff82790380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff82790520 r ar9380_2_2_tx_gain_vals_5g +ffffffff827906c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff82790860 r ar9485_1_1_tx_gain_regs +ffffffff827908f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff82790a10 r ar9380_def_rom +ffffffff82790e50 r ar9380_def_rom_h112 +ffffffff82791290 r ar9380_def_rom_h116 +ffffffff827916d0 r ar9380_def_rom_x112 +ffffffff82791b10 r ar9380_def_rom_x113 +ffffffff82792000 R atw_txthresh_tab_lo +ffffffff82792050 R atw_txthresh_tab_hi +ffffffff827920a0 r atw_attach.empty_macaddr +ffffffff827920b0 r atw_attach.type_strings +ffffffff827920d0 r atw_rfmd2958_ifn +ffffffff82792110 r atw_rfmd2958_rf1r +ffffffff82792150 r atw_rxintr.rate_tbl +ffffffff82793000 r rtw_identify_sta.empty_macaddr +ffffffff82794000 r rtwn_set_key.etherzeroaddr +ffffffff82794010 r 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pppdumpb.digits +ffffffff8279b0f0 r pppdumpm.digits +ffffffff8279b140 r hangpic +ffffffff8279b180 r gen11_rcs_offsets +ffffffff8279b1b0 r xehp_rcs_offsets +ffffffff8279b1e0 r dg2_rcs_offsets +ffffffff8279b220 r dg2_xcs_offsets +ffffffff8279b250 r gen12_xcs_offsets +ffffffff8279c000 r trinity_override_mgpg_sequences +ffffffff8279c3c0 r voltage_swing_to_pre_emphasis +ffffffff8279c3d0 r sgpr_init_compute_shader +ffffffff8279c4a0 r intel_hpll_vco.cl_vco +ffffffff8279c4c0 r vgpr_init_compute_shader +ffffffff8279d000 r malo_cmd_string.cmds +ffffffff8279d0b0 r malo_cmd_string_result.results +ffffffff8279e000 R bwi_vendor_led_act +ffffffff8279e00c R bwi_default_led_act +ffffffff8279e010 R bwi_led_duration +ffffffff8279e380 r bwi_sup_bphy +ffffffff8279e3c0 r bwi_phy_freq_11g_rev1 +ffffffff8279e5c0 r bwi_phy_rotor_11g_rev1 +ffffffff8279e6a0 r bwi_phy_noise_scale_11g_rev2 +ffffffff8279e6e0 r bwi_phy_noise_scale_11g_rev7 +ffffffff8279e720 r bwi_phy_noise_scale_11g +ffffffff8279e760 r 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ehci_confd +ffffffff827a1175 R ehci_ifcd +ffffffff827a117e R ehci_endpd +ffffffff827a1185 R ehci_hubd +ffffffff827a2000 R xhci_bus_methods +ffffffff827a2030 R xhci_root_ctrl_methods +ffffffff827a2060 R xhci_root_intr_methods +ffffffff827a2090 R xhci_device_ctrl_methods +ffffffff827a20c0 R xhci_device_intr_methods +ffffffff827a20f0 R xhci_device_bulk_methods +ffffffff827a2120 R xhci_device_isoc_methods +ffffffff827a2150 R xhci_devd +ffffffff827a2162 R xhci_confd +ffffffff827a216b R xhci_ifcd +ffffffff827a2174 R xhci_endpd +ffffffff827a217b R xhci_endpcd +ffffffff827a2181 R xhci_hubd +ffffffff827a5000 R radio_ca +ffffffff827a6000 R ipmi_ca +ffffffff827a7000 R vscsi_ca +ffffffff827a7028 R vscsi_switch +ffffffff827a7050 R vscsi_filtops +ffffffff827a8000 R mpath_ca +ffffffff827a8028 R mpath_switch +ffffffff827a9000 R softraid_ca +ffffffff827a9028 R sr_switch +ffffffff827aa000 r spdmem_basic_types +ffffffff827aa0a0 r spdmem_parity_types +ffffffff827aa0e0 r spdmem_ddr4_decode.ddr4_chipsize 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lintomulaw +ffffffff827bb000 R randomread_filtops +ffffffff827bb030 R randomwrite_filtops +ffffffff827bc000 R video_ca +ffffffff827bc028 R video_filtops +ffffffff827bd000 R cd9660_vfsops +ffffffff827be000 R cd9660_vops +ffffffff827be110 R cd9660_specvops +ffffffff827be220 R cd9660_fifovops +ffffffff827be330 R cd9660read_filtops +ffffffff827be360 R cd9660write_filtops +ffffffff827be390 R cd9660vnode_filtops +ffffffff827bf000 R udf_vfsops +ffffffff827c0000 R udf_vops +ffffffff827c0110 r mon_lens +ffffffff827c1000 r month_days +ffffffff827c2000 R execsw +ffffffff827c3000 r shstrtab +ffffffff827c4000 R copyright +ffffffff827c40c0 r initpaths +ffffffff827c5000 R sysent +ffffffff827c7000 R bufq_impls +ffffffff827c8000 R kqueueops +ffffffff827c8038 R kqread_filtops +ffffffff827c8068 R proc_filtops +ffffffff827c8098 R file_filtops +ffffffff827c80c8 R timer_filtops +ffffffff827c8100 R sysfilt_ops +ffffffff827c8148 R seltrue_filtops +ffffffff827c8178 R dead_filtops +ffffffff827c81a8 R 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kd_nowait +ffffffff8284a190 R kd_trylock +ffffffff8284b000 R vmmapbsy +ffffffff8284b010 r page_flagbits +ffffffff8284b0a8 r uvm_map_addr_RBT_INFO +ffffffff8284b0c0 R uvm_map_addr_RBT_TYPE +ffffffff8284c000 R pmap_pager +ffffffff8284c048 R bufcache_pager +ffffffff8284d000 r uvm_objtree_RBT_INFO +ffffffff8284d018 R uvm_objtree_RBT_TYPE +ffffffff8284e000 r uvm_pmr_addr_RBT_INFO +ffffffff8284e018 R uvm_pmr_addr_RBT_TYPE +ffffffff8284e020 r uvm_pmr_size_RBT_INFO +ffffffff8284e038 R uvm_pmr_size_RBT_TYPE +ffffffff8284e040 r uvm_pmemrange_addr_RBT_INFO +ffffffff8284e058 R uvm_pmemrange_addr_RBT_TYPE +ffffffff8284f000 R uvm_vnodeops +ffffffff8284f048 r uvn_flush.interval +ffffffff82850000 R zeroin6_addr +ffffffff82851000 R in6addr_any +ffffffff82851010 R in6addr_loopback +ffffffff82851020 R in6addr_intfacelocal_allnodes +ffffffff82851030 R in6addr_linklocal_allnodes +ffffffff82851040 R in6addr_linklocal_allrouters +ffffffff82851050 R in6mask0 +ffffffff82851060 R in6mask32 +ffffffff82851070 R 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pciide_triones_products +ffffffff8298e8f0 R pciide_promise_products +ffffffff8298eac0 R pciide_acard_products +ffffffff8298eb10 R pciide_serverworks_products +ffffffff8298ebb0 R pciide_nvidia_products +ffffffff8298ee80 R pciide_ite_products +ffffffff8298eea0 R pciide_ati_products +ffffffff8298ef20 R pciide_jmicron_products +ffffffff8298ef70 R pciide_phison_products +ffffffff8298ef80 R pciide_rdc_products +ffffffff8298ef90 R pciide_vendors +ffffffff8298f140 R pciide_pci_ca +ffffffff8298f168 R pciide_jmb_ca +ffffffff8298f190 r piix_isp_dma +ffffffff8298f193 r piix_rtc_dma +ffffffff8298f196 r apollo_pio_set +ffffffff8298f19b r cmd0643_9_data_tim_pio +ffffffff8298f1a0 r cmd0643_9_data_tim_dma +ffffffff8298f1a3 r cmd680_channel_map.init_val +ffffffff8298f1b1 r cmd680_setup_channel.udma2_tbl +ffffffff8298f1b8 r cmd680_setup_channel.dma_tbl +ffffffff8298f1be r cmd680_setup_channel.pio_tbl +ffffffff8298f1d0 r satalink_ba5_regmap +ffffffff8298f690 r sii3114_chansetup.channel_names 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bktr_ca +ffffffff82998028 R bktr_hw_if +ffffffff82999000 r tuners +ffffffff82999170 r freqTable +ffffffff82999260 r nabcst +ffffffff829992a0 r irccable +ffffffff82999310 r hrccable +ffffffff82999380 r weurope +ffffffff82999420 r jpnbcst +ffffffff82999460 r jpncable +ffffffff829994c0 r xussr +ffffffff82999530 r australia +ffffffff82999590 r france +ffffffff8299a000 R xl_pci_ca +ffffffff8299a030 R xl_pci_devices +ffffffff8299b000 R fxp_pci_ca +ffffffff8299b030 R fxp_pci_devices +ffffffff8299c000 R em_devices +ffffffff8299c308 R em_ca +ffffffff8299c330 r em_counters +ffffffff8299d000 r em_igp_cable_length_table +ffffffff8299d100 r em_igp_2_cable_length_table +ffffffff8299e000 R ixgb_devices +ffffffff8299e010 R ixgb_ca +ffffffff8299f000 R ixgbe_devices +ffffffff8299f0b8 R ix_ca +ffffffff8299f0e0 r ix_counters +ffffffff8299f3e0 r ix_rxq_kstats_tpl +ffffffff8299f458 r ix_txq_kstats_tpl +ffffffff829a0000 r ixgbe_mvals_base +ffffffff829a0060 r ixgbe_mvals_X540 +ffffffff829a00c0 r ixgbe_mvals_X550 +ffffffff829a0120 r ixgbe_mvals_X550EM_x +ffffffff829a0180 r ixgbe_mvals_X550EM_a +ffffffff829a3000 R ixl_ca +ffffffff829a3030 R ixl_port_counters +ffffffff829a32c0 R ixl_vsi_counters +ffffffff829a3380 r ixl_devices +ffffffff829a34c0 r ixl_710 +ffffffff829a34e8 r ixl_722 +ffffffff829a3510 r ixl_pf_aq_regs +ffffffff829a3578 r ixl_710_decrepit +ffffffff829a35a0 r ixl_phy_type_map +ffffffff829a3770 r ixl_speed_type_map +ffffffff829a37b0 r ixl_hmc_pack_rxq +ffffffff829a3830 r ixl_hmc_pack_txq +ffffffff829a38a0 r ixl_sfp_ops +ffffffff829a38b8 r ixl_qsfp_ops +ffffffff829a4000 r dwqe_pci_devices +ffffffff829a4018 R dwqe_pci_ca +ffffffff829a5000 R xge_ca +ffffffff829a5028 R xge_devices +ffffffff829a5030 r xge_fix_mac +ffffffff829a5110 r xge_xena_dtx_cfg +ffffffff829a5170 r xge_herc_dtx_cfg +ffffffff829a6000 R thtc_ca +ffffffff829a6028 R tht_ca +ffffffff829a6050 r thtc_devices +ffffffff829a6068 r tht_link_state.interval +ffffffff829a7000 R myx_ca +ffffffff829a7028 R myx_devices +ffffffff829a8000 R oce_ca +ffffffff829a8030 R oce_devices +ffffffff829a9000 R dc_pci_ca +ffffffff829aa000 R epic_pci_ca +ffffffff829aa028 R epic_pci_devices +ffffffff829ab000 R ti_pci_ca +ffffffff829ab030 R ti_devices +ffffffff829ac000 R ne_pci_ca +ffffffff829ac030 R ne_pci_prod +ffffffff829ad000 R gem_pci_ca +ffffffff829ad030 R gem_pci_devices +ffffffff829ad050 r gem_promhdr +ffffffff829ad052 r gem_promdat +ffffffff829ad05a r gem_promdat2 +ffffffff829ae000 R cas_ca +ffffffff829ae028 R cas_pci_devices +ffffffff829ae030 r cas_promhdr +ffffffff829ae032 r cas_promdat_sun +ffffffff829ae03a r cas_promdat_ns +ffffffff829ae042 r cas_promdat2 +ffffffff829af000 R sf_pci_ca +ffffffff829af028 R sf_pci_products +ffffffff829b0000 R sis_ca +ffffffff829b0028 R sis_devices +ffffffff829b1000 R se_devices +ffffffff829b1008 R se_ca +ffffffff829b2000 R mbg_ca +ffffffff829b2030 R mbg_devices +ffffffff829b3000 R uhci_pci_ca +ffffffff829b4000 R ohci_pci_ca +ffffffff829b5000 R ehci_pci_ca +ffffffff829b6000 R xhci_pci_ca +ffffffff829b7000 R cbb_pci_ca +ffffffff829b7028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff829b8000 R skc_devices +ffffffff829b8030 R skc_ca +ffffffff829b8058 R sk_ca +ffffffff829b9000 R mskc_devices +ffffffff829b90a8 R mskc_ca +ffffffff829b90d0 R msk_ca +ffffffff829b9100 r msk_mib +ffffffff829ba000 R puc_pci_ca +ffffffff829bb000 R puc_devs +ffffffff829c0000 R com_puc_ca +ffffffff829c0030 r puc_port_types +ffffffff829c1000 R lpt_puc_ca +ffffffff829c2000 R wi_pci_ca +ffffffff829c2030 r wi_pci_products +ffffffff829c3000 R an_pci_ca +ffffffff829c3030 R an_pci_devices +ffffffff829c4000 R iwi_devices +ffffffff829c4010 R iwi_ca +ffffffff829c5000 R wpi_ca +ffffffff829c5028 r wpi_devices +ffffffff829c5030 r wpi_rates +ffffffff829c5050 r wpi_rf_gain_5ghz +ffffffff829c50a0 r wpi_dsp_gain_5ghz +ffffffff829c50f0 r wpi_rf_gain_2ghz +ffffffff829c5140 r wpi_dsp_gain_2ghz +ffffffff829c5190 r wpi_pmgt +ffffffff829c5310 r wpi_bands +ffffffff829c6000 R iwn_mcs2ridx +ffffffff829c6020 R iwn_ca +ffffffff829c6050 r iwn_devices +ffffffff829c60e8 r iwn4965_sensitivity_limits +ffffffff829c6124 r iwn5000_sensitivity_limits +ffffffff829c6160 r iwn5150_sensitivity_limits +ffffffff829c619c r iwn1000_sensitivity_limits +ffffffff829c61d8 r iwn6000_sensitivity_limits +ffffffff829c6214 r iwn2000_sensitivity_limits +ffffffff829c6250 r iwn_fw_errmsg +ffffffff829c6340 r iwn4965_set_txpower.tdiv +ffffffff829c6360 r iwn4965_rf_gain_5ghz +ffffffff829c63d0 r iwn4965_dsp_gain_5ghz +ffffffff829c6440 r iwn4965_dsp_gain_2ghz +ffffffff829c64b0 r iwn_pmgt +ffffffff829c66f0 r iwn4965_post_alive.qid2fifo +ffffffff829c6700 r iwn_bands +ffffffff829c6770 r iwn_rates +ffffffff829c6820 r iwn4965_rf_gain_2ghz +ffffffff829c7000 R iwm_nvm_channels +ffffffff829c7030 R iwm_nvm_channels_8000 +ffffffff829c7070 R iwm_rates +ffffffff829c70d0 R iwm_ht_mcs2ridx +ffffffff829c7110 R iwm_tid_to_ac +ffffffff829c7118 R iwm_ac_to_tx_fifo +ffffffff829c7120 R iwm_nvm_to_read +ffffffff829c7144 r iwm_set_hw_address_8000.reserved_mac +ffffffff829c7180 r iwm_sf_full_timeout +ffffffff829c71b0 r iwm_sf_full_timeout_def +ffffffff829c71e0 r advanced_lookup +ffffffff829c7320 r iwm_devices +ffffffff829c7360 R iwm_ca +ffffffff829c8000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff829c8020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff829c8040 R iwx_qu_b0_hr1_b0 +ffffffff829c8060 R iwx_qu_b0_hr_b0 +ffffffff829c8080 R iwx_ax201_cfg_qu_hr +ffffffff829c80a0 R iwx_qu_c0_hr1_b0 +ffffffff829c80c0 R iwx_qu_c0_hr_b0 +ffffffff829c80e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff829c8100 R iwx_quz_a0_hr1_b0 +ffffffff829c8120 R iwx_ax201_cfg_quz_hr +ffffffff829c8140 R iwx_cfg_so_a0_hr_b0 +ffffffff829c8160 R iwx_cfg_quz_a0_hr_b0 +ffffffff829c8180 R iwx_2ax_cfg_so_gf_a0 +ffffffff829c81a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff829c81c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff829c81e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff829c8200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff829c8220 R iwx_2ax_cfg_so_jf_b0 +ffffffff829c8240 R iwx_nvm_channels_8000 +ffffffff829c8280 R iwx_rates +ffffffff829c82e0 R iwx_mcs2ridx +ffffffff829c8320 R iwx_tid_to_ac +ffffffff829c8328 R iwx_ac_to_tx_fifo +ffffffff829c8330 r iwx_nvm_channels_uhb +ffffffff829c839e r iwx_is_valid_mac_addr.reserved_mac +ffffffff829c83b0 r iwx_sf_full_timeout +ffffffff829c83e0 r iwx_sf_full_timeout_def +ffffffff829c8410 r advanced_lookup +ffffffff829c8550 r iwx_devices +ffffffff829c8590 r iwx_dev_info_table +ffffffff829c8e18 R iwx_ca +ffffffff829c9000 R cmpci_ca +ffffffff829c9028 R cmpci_hw_if +ffffffff829c90e0 r cmpci_rate_table +ffffffff829c9120 R cmpci_devices +ffffffff829c9130 r cmpci_query_devinfo.mixer_port_names +ffffffff829c9160 r cmpci_query_devinfo.mixer_classes +ffffffff829ca000 R iha_pci_ca +ffffffff829ca028 R iha_switch +ffffffff829cb000 R pcscp_ca +ffffffff829cc000 R bge_ca +ffffffff829cc030 R bge_devices +ffffffff829cc1b0 r bge_revisions +ffffffff829cc610 r bge_majorrevs +ffffffff829cc790 r bge_kstat_tpl +ffffffff829cd000 R bnx_devices +ffffffff829cd020 R bnx_ca +ffffffff829ce000 R vge_ca +ffffffff829ce028 R vge_devices +ffffffff829cf000 R stge_ca +ffffffff829cf028 R stge_mii_bitbang_ops +ffffffff829cf050 R stge_devices +ffffffff829d0000 R nfe_ca +ffffffff829d0030 R nfe_devices +ffffffff829d1000 R et_devices +ffffffff829d1008 R et_ca +ffffffff829d2000 R jme_devices +ffffffff829d2008 R jme_ca +ffffffff829d3000 R age_devices +ffffffff829d3008 R age_ca +ffffffff829d4000 R alc_devices +ffffffff829d4038 R alc_ca +ffffffff829d5000 R ale_devices +ffffffff829d5008 R ale_ca +ffffffff829d6000 R amdpm_ca +ffffffff829d6030 R amdpm_ids +ffffffff829d7000 R bce_ca +ffffffff829d7028 R bce_devices +ffffffff829d8000 R ath_pci_ca +ffffffff829d9000 R athn_pci_ca +ffffffff829d9030 r athn_pci_devices +ffffffff829da000 R atw_pci_ca +ffffffff829da028 R atw_pci_devices +ffffffff829db000 R rtw_pci_ca +ffffffff829db030 R rtw_pci_products +ffffffff829dc000 R rtwn_pci_ca +ffffffff829dc030 r rtwn_pci_devices +ffffffff829dc040 r rtl8188eu_mac +ffffffff829dc1b0 r rtl8192cu_mac +ffffffff829dc310 r rtl8192ce_mac +ffffffff829dc458 r rtl8188eu_bb_prog +ffffffff829dc480 r rtl8723a_bb_prog +ffffffff829dc4a8 r rtl8192ce_bb_prog_1t +ffffffff829dc4d0 r rtl8192ce_bb_prog_2t +ffffffff829dc500 r rtl8188eu_bb_regs +ffffffff829dc680 r rtl8188eu_bb_vals +ffffffff829dc980 r rtl8188eu_agc_vals +ffffffff829dcb80 r rtl8723a_bb_regs +ffffffff829dcd00 r rtl8723a_bb_vals +ffffffff829dcff0 r rtl8192ce_agc_vals +ffffffff829dd270 r rtl8192ce_bb_regs +ffffffff829dd3f0 r rtl8192ce_bb_vals_1t +ffffffff829dd6e0 r rtl8192ce_bb_vals_2t +ffffffff829de000 R ral_pci_ca +ffffffff829de030 R ral_pci_devices +ffffffff829df000 R acx_pci_ca +ffffffff829df028 R acx_pci_devices +ffffffff829e0000 R pgt_pci_ca +ffffffff829e0028 R pgt_pci_devices +ffffffff829e1000 R malo_pci_ca +ffffffff829e1028 R malo_pci_devices +ffffffff829e2000 R bwi_pci_ca +ffffffff829e2030 R bwi_pci_devices +ffffffff829e3000 R piixpm_ca +ffffffff829e3030 R piixpm_ids +ffffffff829e4000 R vic_ca +ffffffff829e4028 R vic_devices +ffffffff829e5000 R vmx_devices +ffffffff829e5008 R vmx_ca +ffffffff829e5030 r vmx_tx_kstat_tpl +ffffffff829e50d0 r vmx_kstat_rate +ffffffff829e50e0 r vmx_rx_kstat_tpl +ffffffff829e6000 R vmwpvs_ca +ffffffff829e6028 R vmwpvs_switch +ffffffff829e7000 R lii_ca +ffffffff829e7028 R lii_devices +ffffffff829e8000 R ichiic_ca +ffffffff829e8030 R ichiic_ids +ffffffff829e9000 R viapm_ca +ffffffff829e9030 R viapm_ids +ffffffff829e9070 r val_to_temp +ffffffff829e9870 r val_to_uV.mult +ffffffff829ea000 R amdiic_ca +ffffffff829ea028 R amdiic_ids +ffffffff829eb000 R nviic_ca +ffffffff829eb030 R nviic_ids +ffffffff829ec000 R sdhc_pci_ca +ffffffff829ed000 R kate_ca +ffffffff829ed030 r kate_proc +ffffffff829ee000 R km_ca +ffffffff829ee030 r km_devices +ffffffff829ef000 R ksmn_ca +ffffffff829ef030 r ksmn_devices +ffffffff829f0000 R iosf_pci_ca +ffffffff829f1000 R itherm_devices +ffffffff829f1008 R itherm_ca +ffffffff829f2000 R pchtemp_ca +ffffffff829f2030 R pchtemp_devices +ffffffff829f3000 R rtsx_pci_ca +ffffffff829f4000 R xspd_ca +ffffffff829f4028 R xspd_devices +ffffffff829f5000 R virtio_pci_ca +ffffffff829f6000 R dwiic_pci_ca +ffffffff829f6030 R dwiic_pci_ids +ffffffff829f7000 R bwfm_pci_ca +ffffffff829f7030 r bwfm_pci_devices +ffffffff829f8000 R ccp_pci_ca +ffffffff829f8030 r ccp_pci_devices +ffffffff829f9000 R bnxt_devices +ffffffff829f9040 R bnxt_ca +ffffffff829fa000 R mcx_ca +ffffffff829fa030 r mcx_devices +ffffffff829fa060 r mcx_rss_config +ffffffff829fa0d0 r mcx_eth_cap_map +ffffffff829fa2d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff829fa2e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff829fa300 r mcx_kstat_ppcnt_rfc2819 +ffffffff829fa318 r mcx_kstat_ppcnt_rfc3635 +ffffffff829fa330 r mcx_ppcnt_ieee8023_tpl +ffffffff829fa4b0 r mcx_ppcnt_rfc2863_tpl +ffffffff829fa5c0 r mcx_ppcnt_rfc2819_tpl +ffffffff829fa770 r mcx_ppcnt_rfc3635_tpl +ffffffff829fa8b0 r mcx_kstat_mtmp_tpl +ffffffff829fa950 r mcx_kstat_mtmp_rate +ffffffff829fa960 r mcx_queue_kstat_tpl +ffffffff829fb000 R iavf_ca +ffffffff829fb030 r iavf_devices +ffffffff829fb040 r iavf_aq_regs +ffffffff829fb0b0 r iavf_link_speeds +ffffffff829fc000 R rge_ca +ffffffff829fc028 R rge_devices +ffffffff829fc030 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff829fc050 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff829fc0b0 r rtl8125_mac_cfg3_mcu +ffffffff829fc950 r rtl8125_mac_cfg5_mcu +ffffffff829fd970 r rtl8125_mac_bps +ffffffff829fdd70 r rtl8125b_mac_bps +ffffffff829fdf98 r rge_kstats_tpl +ffffffff829ff000 R igc_devices +ffffffff829ff040 R igc_ca +ffffffff82a00000 R ngbe_devices +ffffffff82a00008 R ngbe_ca +ffffffff82a01000 R com_pci_ca +ffffffff82a01030 R com_pci_ids +ffffffff82a02000 r agp_attach.agp_max +ffffffff82a02048 R agp_ca +ffffffff82a03000 R intagp_ca +ffffffff82a04000 r drm_plane_create_rotation_property.props +ffffffff82a05000 r drm_bridge_priv_state_funcs +ffffffff82a07000 r color_encoding_name +ffffffff82a07020 r color_range_name +ffffffff82a08000 r drm_subpixel_enum_list +ffffffff82a08060 r drm_dpms_enum_list +ffffffff82a080a0 r drm_dvi_i_select_enum_list +ffffffff82a080d0 r drm_dvi_i_subconnector_enum_list +ffffffff82a08100 r drm_tv_mode_enum_list +ffffffff82a08170 r drm_tv_select_enum_list +ffffffff82a081c0 r drm_tv_subconnector_enum_list +ffffffff82a08210 r drm_dp_subconnector_enum_list +ffffffff82a08280 r colorspace_names +ffffffff82a08300 r drm_link_status_enum_list +ffffffff82a08320 r drm_scaling_mode_enum_list +ffffffff82a08360 r drm_aspect_ratio_enum_list +ffffffff82a08390 r drm_content_type_enum_list +ffffffff82a083e0 r drm_panel_orientation_enum_list +ffffffff82a08420 r privacy_screen_enum +ffffffff82a09000 r drm_crtc_fence_ops +ffffffff82a0a000 r drm_dmt_modes +ffffffff82a0c940 r edid_cea_modes_1 +ffffffff82a104d0 r edid_cea_modes_193 +ffffffff82a11180 r edid_quirk_list +ffffffff82a11360 r drm_mode_do_interlace_quirk.cea_interlaced +ffffffff82a113a0 r edid_4k_modes +ffffffff82a11600 r edid_est_modes +ffffffff82a11e00 r est3_modes +ffffffff82a11f60 r stereo_mandatory_modes +ffffffff82a11fe0 r extra_modes +ffffffff82a13000 r drm_encoder_enum_list +ffffffff82a15000 r drm_fbdev_dma_helper_funcs +ffffffff82a15010 r drm_fbdev_dma_client_funcs +ffffffff82a15030 r drm_fbdev_dma_fb_ops +ffffffff82a16000 r drm_fbdev_generic_helper_funcs +ffffffff82a16010 r drm_fbdev_generic_client_funcs +ffffffff82a16030 r drm_fbdev_generic_fb_ops +ffffffff82a18000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82a18004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82a18008 r drm_fb_xrgb8888_to_xrgb1555.dst_pixsize +ffffffff82a1800c r drm_fb_xrgb8888_to_argb1555.dst_pixsize +ffffffff82a18010 r drm_fb_xrgb8888_to_rgba5551.dst_pixsize +ffffffff82a18014 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff82a18018 r drm_fb_xrgb8888_to_argb8888.dst_pixsize +ffffffff82a1801c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82a18020 r drm_fb_xrgb8888_to_argb2101010.dst_pixsize +ffffffff82a18024 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82a18028 r drm_fb_xrgb8888_to_xbgr8888.dst_pixsize +ffffffff82a1802c r drm_fb_xrgb8888_to_abgr8888.dst_pixsize +ffffffff82a19000 r __drm_format_info.formats +ffffffff82a1a000 R drm_pgops +ffffffff82a1b000 r drm_gem_dma_default_funcs +ffffffff82a1c000 R drm_gem_fb_funcs +ffffffff82a1d000 r drm_ioctls +ffffffff82a1f000 r dma_fence_stub_ops +ffffffff82a1f040 R dma_fence_array_ops +ffffffff82a1f080 R dma_fence_chain_ops +ffffffff82a1f0c0 R dmabufops +ffffffff82a1f0f8 R syncfileops +ffffffff82a20000 r drm_plane_type_enum_list +ffffffff82a21000 r tv_modes_parameters +ffffffff82a210c0 r drm_mode_status_names +ffffffff82a21200 r drm_named_modes +ffffffff82a22000 r primary_plane_funcs +ffffffff82a22068 r safe_modeset_formats +ffffffff82a23000 r orientation_data +ffffffff82a26718 r lcd800x1280_rightside_up +ffffffff82a26730 r lcd720x1280_rightside_up +ffffffff82a26748 r lcd800x1280_leftside_up +ffffffff82a26760 r lcd1080x1920_leftside_up +ffffffff82a26778 r lcd1200x1920_rightside_up +ffffffff82a26790 r gpd_micropc +ffffffff82a267a8 r gpd_pocket +ffffffff82a267c0 r gpd_pocket2 +ffffffff82a267d8 r gpd_win +ffffffff82a267f0 r gpd_win2 +ffffffff82a26808 r itworks_tw891 +ffffffff82a26820 r lcd1600x2560_rightside_up +ffffffff82a26838 r onegx1_pro +ffffffff82a26850 r lcd1600x2560_leftside_up +ffffffff82a26868 r lcd1280x1920_rightside_up +ffffffff82a26880 r gpd_onemix2s +ffffffff82a26898 r .compoundliteral +ffffffff82a268a8 r .compoundliteral.5 +ffffffff82a268d0 r .compoundliteral.9 +ffffffff82a268f0 r .compoundliteral.17 +ffffffff82a26930 r .compoundliteral.21 +ffffffff82a26950 r .compoundliteral.23 +ffffffff82a26960 r .compoundliteral.25 +ffffffff82a26970 r .compoundliteral.29 +ffffffff82a27000 r drm_gem_prime_dmabuf_ops +ffffffff82a29000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82a2a000 r drm_dp_phy_name.phy_names +ffffffff82a2a048 r drm_dp_i2c_algo +ffffffff82a2a058 r drm_dp_i2c_lock_ops +ffffffff82a2a070 r dp_aux_bl_ops +ffffffff82a2a090 r dpcd_quirk_list +ffffffff82a2a320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82a2b000 R drm_dp_mst_topology_state_funcs +ffffffff82a2b020 r drm_dp_mst_req_type_str.req_type_str +ffffffff82a2b1f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82a2b220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82a2b278 r drm_dp_mst_i2c_algo +ffffffff82a2c000 r rc_parameters_1_2_444 +ffffffff82a2c5f0 r rc_parameters_pre_scr +ffffffff82a2c920 r rc_parameters_1_2_422 +ffffffff82a2cdf0 r rc_parameters_1_2_420 +ffffffff82a2e000 r hdmi_colorimetry_val +ffffffff82a2f018 R ttm_bo_vm_ops +ffffffff82a30000 r ttm_range_manager_func +ffffffff82a31018 r ttm_kmap_iter_io_ops +ffffffff82a31030 r ttm_kmap_iter_linear_io_ops +ffffffff82a32000 r ttm_sys_manager_func +ffffffff82a33000 r ttm_kmap_iter_tt_ops +ffffffff82a34000 r drm_sched_fence_ops_scheduled +ffffffff82a34040 r drm_sched_fence_ops_finished +ffffffff82a35000 R ch7017_ops +ffffffff82a36000 R ch7xxx_ops +ffffffff82a36060 r ch7xxx_ids +ffffffff82a37000 R ivch_ops +ffffffff82a37060 r backup_addresses +ffffffff82a38000 R ns2501_ops +ffffffff82a38060 r mode_agnostic_values +ffffffff82a380e0 r ns2501_modes +ffffffff82a39000 R sil164_ops +ffffffff82a3a000 R tfp410_ops +ffffffff82a3b000 r chv_dpll +ffffffff82a3b050 r vlv_dpll +ffffffff82a3b0a0 r g4x_dpll +ffffffff82a3b0f0 r pch_dpll +ffffffff82a3b138 r intel_dp_enc_funcs +ffffffff82a3c000 r intel_hdmi_enc_funcs +ffffffff82a3d000 r vlv_primary_formats +ffffffff82a3d030 r ivb_primary_formats +ffffffff82a3d050 r i965_primary_formats +ffffffff82a3d070 r i8xx_primary_formats +ffffffff82a3d080 r i965_plane_funcs +ffffffff82a3d0e8 r i8xx_plane_funcs +ffffffff82a3e000 r ilk_wm_funcs +ffffffff82a3e040 r vlv_wm_funcs +ffffffff82a3e080 r g4x_wm_funcs +ffffffff82a3e0c0 r nop_funcs +ffffffff82a3e100 r pnv_wm_funcs +ffffffff82a3e140 r i965_wm_funcs +ffffffff82a3e180 r i9xx_wm_funcs +ffffffff82a3e1c0 r i845_wm_funcs +ffffffff82a3e200 r cxsr_latency_table +ffffffff82a3f000 r gen11_dsi_encoder_funcs +ffffffff82a3f020 r gen11_dsi_connector_funcs +ffffffff82a3f098 r gen11_dsi_connector_helper_funcs +ffffffff82a3f0f8 r gen11_dsi_host_ops +ffffffff82a40000 r intel_plane_helper_funcs +ffffffff82a41000 r g4x_audio_funcs +ffffffff82a41018 r ibx_audio_funcs +ffffffff82a41030 r hsw_audio_funcs +ffffffff82a41050 r hdmi_audio_clock +ffffffff82a410c0 r dp_aud_n_m +ffffffff82a41270 r hdmi_aud_ncts_36bpp +ffffffff82a41350 r hdmi_aud_ncts_30bpp +ffffffff82a41430 r hdmi_aud_ncts_24bpp +ffffffff82a42000 r intel_backlight_device_ops +ffffffff82a42018 r bxt_pwm_funcs +ffffffff82a42048 r cnp_pwm_funcs +ffffffff82a42078 r lpt_pwm_funcs +ffffffff82a420a8 r spt_pwm_funcs +ffffffff82a420d8 r pch_pwm_funcs +ffffffff82a42108 r ext_pwm_funcs +ffffffff82a42138 r vlv_pwm_funcs +ffffffff82a42168 r i965_pwm_funcs +ffffffff82a42198 r i9xx_pwm_funcs +ffffffff82a421c8 r pwm_bl_funcs +ffffffff82a43000 r bdb_blocks +ffffffff82a43160 r adlp_aux_ch_map +ffffffff82a43169 r adls_aux_ch_map +ffffffff82a43170 r rkl_aux_ch_map +ffffffff82a43175 r direct_aux_ch_map +ffffffff82a4317e r translate_iboost.mapping +ffffffff82a43181 r adlp_ddc_pin_map +ffffffff82a4318e r adls_ddc_pin_map +ffffffff82a4319b r rkl_pch_tgp_ddc_pin_map +ffffffff82a431a6 r gen9bc_tgp_ddc_pin_map +ffffffff82a431b1 r icp_ddc_pin_map +ffffffff82a431c0 r cnp_ddc_pin_map +ffffffff82a44000 r mtl_sa_info +ffffffff82a44006 r adlp_sa_info +ffffffff82a4400c r adls_sa_info +ffffffff82a44012 r rkl_sa_info +ffffffff82a44018 r tgl_sa_info +ffffffff82a44020 r intel_bw_funcs +ffffffff82a45000 r intel_cdclk_funcs +ffffffff82a45010 r mtl_cdclk_funcs +ffffffff82a45030 r mtl_cdclk_table +ffffffff82a45088 r tgl_cdclk_funcs +ffffffff82a450b0 r dg2_cdclk_table +ffffffff82a45160 r adlp_a_step_cdclk_table +ffffffff82a451e0 r rplu_cdclk_table +ffffffff82a452c8 r rplu_cdclk_funcs +ffffffff82a452f0 r adlp_cdclk_table +ffffffff82a453b0 r rkl_cdclk_table +ffffffff82a454a0 r icl_cdclk_table +ffffffff82a45588 r ehl_cdclk_funcs +ffffffff82a455a8 r icl_cdclk_funcs +ffffffff82a455c8 r bxt_cdclk_funcs +ffffffff82a455f0 r glk_cdclk_table +ffffffff82a45620 r bxt_cdclk_table +ffffffff82a45668 r skl_cdclk_funcs +ffffffff82a45688 r bdw_cdclk_funcs +ffffffff82a456a8 r hsw_cdclk_funcs +ffffffff82a456c8 r chv_cdclk_funcs +ffffffff82a456e8 r vlv_cdclk_funcs +ffffffff82a45708 r fixed_400mhz_cdclk_funcs +ffffffff82a45728 r ilk_cdclk_funcs +ffffffff82a45748 r gm45_cdclk_funcs +ffffffff82a45768 r g33_cdclk_funcs +ffffffff82a45788 r i965gm_cdclk_funcs +ffffffff82a457a8 r pnv_cdclk_funcs +ffffffff82a457c8 r i945gm_cdclk_funcs +ffffffff82a457e8 r i915gm_cdclk_funcs +ffffffff82a45808 r i915g_cdclk_funcs +ffffffff82a45828 r i865g_cdclk_funcs +ffffffff82a45848 r i85x_cdclk_funcs +ffffffff82a45868 r i845g_cdclk_funcs +ffffffff82a45888 r i830_cdclk_funcs +ffffffff82a458a8 r g33_get_cdclk.div_3200 +ffffffff82a458ae r g33_get_cdclk.div_4000 +ffffffff82a458b4 r g33_get_cdclk.div_4800 +ffffffff82a458ba r g33_get_cdclk.div_5333 +ffffffff82a458c0 r i965gm_get_cdclk.div_3200 +ffffffff82a458c3 r i965gm_get_cdclk.div_4000 +ffffffff82a458c6 r i965gm_get_cdclk.div_5333 +ffffffff82a46000 r chv_color_funcs +ffffffff82a46040 r vlv_color_funcs +ffffffff82a46080 r i965_color_funcs +ffffffff82a460c0 r i9xx_color_funcs +ffffffff82a46100 r tgl_color_funcs +ffffffff82a46140 r icl_color_funcs +ffffffff82a46180 r glk_color_funcs +ffffffff82a461c0 r skl_color_funcs +ffffffff82a46200 r bdw_color_funcs +ffffffff82a46240 r hsw_color_funcs +ffffffff82a46280 r ivb_color_funcs +ffffffff82a462c0 r ilk_color_funcs +ffffffff82a46300 r chv_cgm_csc_matrix_identity +ffffffff82a4631e r ilk_csc_matrix_rgb_to_ycbcr +ffffffff82a4633c r ilk_csc_matrix_limited_range +ffffffff82a4635a r ilk_csc_matrix_identity +ffffffff82a47000 r icl_procmon_values +ffffffff82a48000 r force_audio_names +ffffffff82a48040 r broadcast_rgb_names +ffffffff82a49000 r intel_crt_connector_funcs +ffffffff82a49078 r intel_crt_enc_funcs +ffffffff82a490a0 r intel_spurious_crt_detect +ffffffff82a494a8 r intel_crt_connector_helper_funcs +ffffffff82a4a000 r g4x_crtc_funcs +ffffffff82a4a0c0 r i965_crtc_funcs +ffffffff82a4a180 r i915gm_crtc_funcs +ffffffff82a4a240 r i915_crtc_funcs +ffffffff82a4a300 r i8xx_crtc_funcs +ffffffff82a4a3c0 r bdw_crtc_funcs +ffffffff82a4a480 r ilk_crtc_funcs +ffffffff82a4b000 r output_format_str +ffffffff82a4b020 r output_type_str +ffffffff82a4c000 r intel_cursor_plane_funcs +ffffffff82a4c068 r intel_cursor_formats +ffffffff82a4d000 r mtl_c10_hdmi_tables +ffffffff82a4d170 r mtl_c10_hdmi_25_2 +ffffffff82a4d18c r mtl_c10_hdmi_27_0 +ffffffff82a4d1a8 r mtl_c10_hdmi_27027 +ffffffff82a4d1c4 r mtl_c10_hdmi_28320 +ffffffff82a4d1e0 r mtl_c10_hdmi_30240 +ffffffff82a4d1fc r mtl_c10_hdmi_31500 +ffffffff82a4d218 r mtl_c10_hdmi_36000 +ffffffff82a4d234 r mtl_c10_hdmi_40000 +ffffffff82a4d250 r mtl_c10_hdmi_49500 +ffffffff82a4d26c r mtl_c10_hdmi_50000 +ffffffff82a4d288 r mtl_c10_hdmi_57284 +ffffffff82a4d2a4 r mtl_c10_hdmi_58000 +ffffffff82a4d2c0 r mtl_c10_hdmi_65000 +ffffffff82a4d2dc r mtl_c10_hdmi_71000 +ffffffff82a4d2f8 r mtl_c10_hdmi_74176 +ffffffff82a4d314 r mtl_c10_hdmi_74_25 +ffffffff82a4d330 r mtl_c10_hdmi_75000 +ffffffff82a4d34c r mtl_c10_hdmi_78750 +ffffffff82a4d368 r mtl_c10_hdmi_85500 +ffffffff82a4d384 r mtl_c10_hdmi_88750 +ffffffff82a4d3a0 r mtl_c10_hdmi_106500 +ffffffff82a4d3bc r mtl_c10_hdmi_108000 +ffffffff82a4d3d8 r mtl_c10_hdmi_115500 +ffffffff82a4d3f4 r mtl_c10_hdmi_119000 +ffffffff82a4d410 r mtl_c10_hdmi_135000 +ffffffff82a4d42c r mtl_c10_hdmi_138500 +ffffffff82a4d448 r mtl_c10_hdmi_147160 +ffffffff82a4d464 r mtl_c10_hdmi_148352 +ffffffff82a4d480 r mtl_c10_hdmi_148_5 +ffffffff82a4d49c r mtl_c10_hdmi_154000 +ffffffff82a4d4b8 r mtl_c10_hdmi_162000 +ffffffff82a4d4d4 r mtl_c10_hdmi_167000 +ffffffff82a4d4f0 r mtl_c10_hdmi_197802 +ffffffff82a4d50c r mtl_c10_hdmi_198000 +ffffffff82a4d528 r mtl_c10_hdmi_209800 +ffffffff82a4d544 r mtl_c10_hdmi_241500 +ffffffff82a4d560 r mtl_c10_hdmi_262750 +ffffffff82a4d57c r mtl_c10_hdmi_268500 +ffffffff82a4d598 r mtl_c10_hdmi_296703 +ffffffff82a4d5b4 r mtl_c10_hdmi_297000 +ffffffff82a4d5d0 r mtl_c10_hdmi_319750 +ffffffff82a4d5ec r mtl_c10_hdmi_497750 +ffffffff82a4d608 r mtl_c10_hdmi_592000 +ffffffff82a4d624 r mtl_c10_hdmi_593407 +ffffffff82a4d640 r mtl_c10_hdmi_594 +ffffffff82a4d660 r mtl_c20_hdmi_tables +ffffffff82a4d6b8 r mtl_c20_hdmi_25_175 +ffffffff82a4d6e4 r mtl_c20_hdmi_27_0 +ffffffff82a4d710 r mtl_c20_hdmi_74_25 +ffffffff82a4d73c r mtl_c20_hdmi_148_5 +ffffffff82a4d768 r mtl_c20_hdmi_594 +ffffffff82a4d794 r mtl_c20_hdmi_300 +ffffffff82a4d7c0 r mtl_c20_hdmi_600 +ffffffff82a4d7ec r mtl_c20_hdmi_800 +ffffffff82a4d818 r mtl_c20_hdmi_1000 +ffffffff82a4d844 r mtl_c20_hdmi_1200 +ffffffff82a4d870 r mtl_c10_edp_tables +ffffffff82a4d8c0 r mtl_c10_dp_tables +ffffffff82a4d8e8 r mtl_c10_dp_rbr +ffffffff82a4d904 r mtl_c10_edp_r216 +ffffffff82a4d920 r mtl_c10_edp_r243 +ffffffff82a4d93c r mtl_c10_dp_hbr1 +ffffffff82a4d958 r mtl_c10_edp_r324 +ffffffff82a4d974 r mtl_c10_edp_r432 +ffffffff82a4d990 r mtl_c10_dp_hbr2 +ffffffff82a4d9ac r mtl_c10_edp_r675 +ffffffff82a4d9c8 r mtl_c10_dp_hbr3 +ffffffff82a4d9f0 r mtl_c20_dp_tables +ffffffff82a4da30 r mtl_c20_dp_rbr +ffffffff82a4da5c r mtl_c20_dp_hbr1 +ffffffff82a4da88 r mtl_c20_dp_hbr2 +ffffffff82a4dab4 r mtl_c20_dp_hbr3 +ffffffff82a4dae0 r mtl_c20_dp_uhbr13_5 +ffffffff82a4db0c r mtl_c20_dp_uhbr10 +ffffffff82a4db38 r mtl_c20_dp_uhbr20 +ffffffff82a4e000 r intel_ddi_funcs +ffffffff82a4e020 r index_to_dp_signal_levels +ffffffff82a4e030 r gen9_chicken_trans_reg_by_port.trans +ffffffff82a4f000 r tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff82a4f010 r _tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff82a4f080 r mtl_c20_trans_uhbr +ffffffff82a4f090 r mtl_c20_trans_hdmi +ffffffff82a4f0a0 r mtl_c20_trans_dp14 +ffffffff82a4f0b0 r mtl_c10_trans_dp14 +ffffffff82a4f0c0 r _mtl_c20_trans_uhbr +ffffffff82a4f180 r _mtl_c20_trans_hdmi +ffffffff82a4f1c0 r _mtl_c20_trans_dp14 +ffffffff82a4f240 r _mtl_c10_trans_dp14 +ffffffff82a4f2b8 r dg2_snps_trans_uhbr +ffffffff82a4f2c8 r dg2_snps_trans +ffffffff82a4f2e0 r _dg2_snps_trans_uhbr +ffffffff82a4f3a0 r _dg2_snps_trans +ffffffff82a4f418 r icl_combo_phy_trans_hdmi +ffffffff82a4f430 r _icl_combo_phy_trans_hdmi +ffffffff82a4f488 r adlp_combo_phy_trans_edp_hbr3 +ffffffff82a4f498 r adlp_combo_phy_trans_edp_up_to_hbr2 +ffffffff82a4f4b0 r _adlp_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff82a4f530 r _adlp_combo_phy_trans_edp_hbr2 +ffffffff82a4f5a8 r adlp_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82a4f5b8 r adlp_combo_phy_trans_dp_hbr +ffffffff82a4f5d0 r _adlp_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82a4f650 r _adlp_combo_phy_trans_dp_hbr +ffffffff82a4f6c8 r tgl_dkl_phy_trans_hdmi +ffffffff82a4f6e0 r _tgl_dkl_phy_trans_hdmi +ffffffff82a4f758 r adlp_dkl_phy_trans_dp_hbr2_hbr3 +ffffffff82a4f768 r adlp_dkl_phy_trans_dp_hbr +ffffffff82a4f780 r _adlp_dkl_phy_trans_dp_hbr2_hbr3 +ffffffff82a4f800 r _adlp_dkl_phy_trans_dp_hbr +ffffffff82a4f878 r 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r600_encode_pci_lane_width.encoded_lanes +ffffffff82af2000 r r100_gfx_ring +ffffffff82af2070 r r300_gfx_ring +ffffffff82af20e0 r rv515_gfx_ring +ffffffff82af2150 r r600_gfx_ring +ffffffff82af21c0 r r600_dma_ring +ffffffff82af2230 r rv6xx_uvd_ring +ffffffff82af22a0 r rv770_uvd_ring +ffffffff82af2310 r evergreen_gfx_ring +ffffffff82af2380 r evergreen_dma_ring +ffffffff82af23f0 r cayman_gfx_ring +ffffffff82af2460 r cayman_dma_ring +ffffffff82af24d0 r cayman_uvd_ring +ffffffff82af2540 r trinity_vce_ring +ffffffff82af25b0 r si_gfx_ring +ffffffff82af2620 r si_dma_ring +ffffffff82af2690 r ci_gfx_ring +ffffffff82af2700 r ci_cp_ring +ffffffff82af2770 r ci_dma_ring +ffffffff82af27e0 r ci_vce_ring +ffffffff82af3000 r object_connector_convert +ffffffff82af3060 r supported_devices_connector_convert +ffffffff82af30a0 r supported_devices_connector_object_id_convert +ffffffff82af30c0 r thermal_controller_names +ffffffff82af3100 r pp_lib_thermal_controller_names +ffffffff82af4000 r pin_offsets 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radeon_tmds_pll_enum_list +ffffffff82af9080 r radeon_tv_std_enum_list +ffffffff82af9100 r radeon_underscan_enum_list +ffffffff82af9130 r radeon_audio_enum_list +ffffffff82af9160 r radeon_dither_enum_list +ffffffff82af9180 r radeon_output_csc_enum_list +ffffffff82af91c0 r radeon_crtc_funcs +ffffffff82af9280 r hpd_names +ffffffff82af92b0 r encoder_names +ffffffff82af93e0 r radeon_afmt_init.eg_offsets +ffffffff82afa000 r aux_offset +ffffffff82afb000 R radeondrm_ca +ffffffff82afb030 r pciidlist +ffffffff82aff1d0 r kms_driver +ffffffff82aff2c0 r radeon_ioctls_kms +ffffffff82b00000 r radeon_fbdev_fb_helper_funcs +ffffffff82b00010 r radeon_fbdev_client_funcs +ffffffff82b00030 r radeon_fbdev_fb_ops +ffffffff82b01000 R radeon_fence_ops +ffffffff82b03000 R radeon_gem_object_funcs +ffffffff82b03070 r radeon_gem_vm_ops +ffffffff82b04000 r radeon_i2c_algo +ffffffff82b04010 r radeon_atom_i2c_algo +ffffffff82b05000 r legacy_helper_funcs +ffffffff82b06000 r radeon_backlight_ops +ffffffff82b06018 r radeon_legacy_lvds_enc_funcs +ffffffff82b06038 r radeon_legacy_lvds_helper_funcs +ffffffff82b060a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82b060c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82b06128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82b06148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82b061b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82b061d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82b06238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82b06258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82b07000 r SLOPE_value +ffffffff82b07030 r YCOEF_EN_value +ffffffff82b07060 r YCOEF_value +ffffffff82b07090 r available_tv_modes +ffffffff82b07110 r hor_timing_NTSC +ffffffff82b07150 r vert_timing_NTSC +ffffffff82b07190 r hor_timing_PAL +ffffffff82b071d0 r vert_timing_PAL +ffffffff82b09000 r radeon_pm_state_type_name +ffffffff82b0a000 r radeon_evict_flags.placements +ffffffff82b0d000 r rs600_reg_safe_bm +ffffffff82b0f000 r rv515_reg_safe_bm +ffffffff82b10000 r dll_speed_table +ffffffff82b11000 r r7xx_golden_registers +ffffffff82b11090 r r7xx_golden_dyn_gpr_registers +ffffffff82b11100 r rv770ce_golden_registers +ffffffff82b11160 r rv770_golden_registers +ffffffff82b111b0 r rv770_mgcg_init +ffffffff82b118f0 r rv730_golden_registers +ffffffff82b11950 r rv730_mgcg_init +ffffffff82b11ee0 r rv710_golden_registers +ffffffff82b11f30 r rv710_mgcg_init +ffffffff82b121d0 r rv740_golden_registers +ffffffff82b12360 r rv740_mgcg_init +ffffffff82b14000 r rv730_smc_int_vectors +ffffffff82b14040 r rv710_smc_int_vectors +ffffffff82b14080 r rv740_smc_int_vectors +ffffffff82b140c0 r cypress_smc_int_vectors +ffffffff82b14100 r caicos_smc_int_vectors +ffffffff82b14140 r cayman_smc_int_vectors +ffffffff82b15000 r tahiti_io_mc_regs +ffffffff82b15120 r pitcairn_io_mc_regs +ffffffff82b15240 r verde_io_mc_regs +ffffffff82b15360 r oland_io_mc_regs +ffffffff82b15480 r hainan_io_mc_regs +ffffffff82b155a0 r crtc_offsets +ffffffff82b155c0 r si_disp_int_status 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si_SECT_CONTEXT_def_5 +ffffffff82b17ea8 r si_SECT_CONTEXT_def_6 +ffffffff82b17eb0 r si_SECT_CONTEXT_def_2 +ffffffff82b182f0 r si_SECT_CONTEXT_def_7 +ffffffff82b186a0 r mc_cg_registers +ffffffff82b186d0 r si_default_state +ffffffff82b19000 r cac_weights_tahiti +ffffffff82b194d0 r lcac_tahiti +ffffffff82b19ba0 r cac_override_tahiti +ffffffff82b19bb4 r powertune_data_tahiti +ffffffff82b19bf0 r dte_data_tahiti +ffffffff82b19cc0 r dte_data_new_zealand +ffffffff82b19d90 r dte_data_malta +ffffffff82b19e60 r lcac_pitcairn +ffffffff82b1a530 r cac_override_pitcairn +ffffffff82b1a544 r powertune_data_pitcairn +ffffffff82b1a580 r lcac_cape_verde +ffffffff82b1a9d0 r cac_override_cape_verde +ffffffff82b1a9e4 r powertune_data_cape_verde +ffffffff82b1aa20 r cac_weights_cape_verde_pro +ffffffff82b1aef0 r cac_weights_heathrow +ffffffff82b1b3c0 r cac_weights_chelsea_xt +ffffffff82b1b890 r cac_weights_chelsea_pro +ffffffff82b1bd60 r cac_weights_cape_verde +ffffffff82b1c230 r cac_weights_mars_pro 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HDP_BASE +ffffffff82b23150 r MMHUB_BASE +ffffffff82b231f8 r ATHUB_BASE +ffffffff82b232a0 r NBIO_BASE +ffffffff82b23348 r MP0_BASE +ffffffff82b233f0 r MP1_BASE +ffffffff82b23498 r DF_BASE +ffffffff82b23540 r OSSSYS_BASE +ffffffff82b235e8 r SDMA0_BASE +ffffffff82b23690 r SDMA1_BASE +ffffffff82b23738 r SDMA2_BASE +ffffffff82b237e0 r SDMA3_BASE +ffffffff82b23888 r SDMA4_BASE +ffffffff82b23930 r SMUIO_BASE +ffffffff82b239d8 r THM_BASE +ffffffff82b23a80 r UMC_BASE +ffffffff82b23b28 r VCN_BASE +ffffffff82b24000 r amdgpu_afmt_predefined_acr +ffffffff82b25000 r atom_op_names +ffffffff82b253e0 r opcode_table +ffffffff82b25bd0 r atom_dst_to_src +ffffffff82b25c50 r atom_io_names +ffffffff82b25c80 r atom_table_names +ffffffff82b25ed0 r atom_iio_len +ffffffff82b26000 r object_connector_convert +ffffffff82b26058 R amdgpu_vbios_version_attr_group +ffffffff82b27000 r voltage_names +ffffffff82b27020 r pre_emph_names +ffffffff82b28000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82b2a000 r amdgpu_benchmark.common_modes +ffffffff82b2b000 r amdgpu_cgs_ops +ffffffff82b2c000 r amdgpu_connector_dp_funcs +ffffffff82b2c078 r amdgpu_connector_dp_helper_funcs +ffffffff82b2c0d8 r amdgpu_connector_edp_funcs +ffffffff82b2c150 r amdgpu_connector_vga_funcs +ffffffff82b2c1c8 r amdgpu_connector_vga_helper_funcs +ffffffff82b2c228 r amdgpu_connector_dvi_funcs +ffffffff82b2c2a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82b2c300 r amdgpu_connector_lvds_funcs +ffffffff82b2c378 r amdgpu_connector_lvds_helper_funcs +ffffffff82b2c3e0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82b2e000 R amdgpu_ctx_num_entities +ffffffff82b2f000 r amdgpu_kms_driver +ffffffff82b2f0f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82b30000 r hw_id_map +ffffffff82b30090 r hw_id_names +ffffffff82b31000 r hpd_names +ffffffff82b31030 r encoder_names +ffffffff82b31180 r dcc_retile_formats +ffffffff82b31270 r dcc_formats +ffffffff82b31360 R amdgpu_mode_funcs +ffffffff82b313b0 r amdgpu_underscan_enum_list +ffffffff82b313e0 r amdgpu_audio_enum_list +ffffffff82b31410 r amdgpu_dither_enum_list +ffffffff82b31430 r amdgpu_fb_funcs_atomic +ffffffff82b31448 r amdgpu_fb_funcs +ffffffff82b32000 R amdgpu_dmabuf_ops +ffffffff82b33000 R amdgpu_ioctls_kms +ffffffff82b33210 R amdgpu_partition_driver +ffffffff82b332f8 R amdgpu_ca +ffffffff82b33320 r pciidlist +ffffffff82b341f0 r amdgpu_unsupported_pciidlist +ffffffff82b34770 r amdgpu_kms_driver +ffffffff82b35000 r amdgpu_job_fence_ops +ffffffff82b35040 r amdgpu_fence_ops +ffffffff82b36000 r amdgpu_gem_object_funcs +ffffffff82b36070 r amdgpu_gem_vm_ops +ffffffff82b37000 R amdgpu_gtt_mgr_attr_group +ffffffff82b37018 r amdgpu_gtt_mgr_func +ffffffff82b38000 r amdgpu_atombios_i2c_algo +ffffffff82b39000 R node_id_to_phys_map +ffffffff82b3a000 R amdgpu_sched_ops +ffffffff82b3c000 r amdgpu_vram_names +ffffffff82b3d000 r amdgpu_preempt_mgr_func +ffffffff82b3e000 R psp_ip_funcs +ffffffff82b3e0a0 R psp_v3_1_ip_block +ffffffff82b3e0b8 R psp_v10_0_ip_block +ffffffff82b3e0d0 R psp_v11_0_ip_block +ffffffff82b3e0e8 R psp_v11_0_8_ip_block +ffffffff82b3e100 R psp_v12_0_ip_block +ffffffff82b3e118 R psp_v13_0_ip_block +ffffffff82b3e130 R psp_v13_0_4_ip_block +ffffffff82b40000 r sw_ring_info +ffffffff82b41000 r amdgpu_evict_flags.placements +ffffffff82b45000 R amdgpu_vkms_ip_block +ffffffff82b46000 R amdgpu_vm_cpu_funcs +ffffffff82b48000 R amdgpu_vm_sdma_funcs +ffffffff82b49000 R amdgpu_vram_mgr_attr_group +ffffffff82b49018 r amdgpu_vram_mgr_func +ffffffff82b49040 r amdgpu_dummy_vram_mgr_func +ffffffff82b4a000 r xgmi_pcs_err_status_reg_arct +ffffffff82b4a020 r xgmi3x16_pcs_ras_fields +ffffffff82b4a1f0 r xgmi_pcs_ras_fields +ffffffff82b4a310 r wafl_pcs_ras_fields +ffffffff82b4b000 r GC_BASE +ffffffff82b4b0c0 r HDP_BASE +ffffffff82b4b180 r MMHUB_BASE +ffffffff82b4b240 r ATHUB_BASE +ffffffff82b4b300 r NBIF0_BASE +ffffffff82b4b3c0 r MP0_BASE +ffffffff82b4b480 r MP1_BASE +ffffffff82b4b540 r UVD_BASE +ffffffff82b4b600 r DF_BASE +ffffffff82b4b6c0 r OSSSYS_BASE +ffffffff82b4b780 r SDMA0_BASE +ffffffff82b4b840 r SDMA1_BASE +ffffffff82b4b900 r SDMA2_BASE +ffffffff82b4b9c0 r SDMA3_BASE +ffffffff82b4ba80 r SDMA4_BASE +ffffffff82b4bb40 r SDMA5_BASE +ffffffff82b4bc00 r SDMA6_BASE +ffffffff82b4bcc0 r SDMA7_BASE +ffffffff82b4bd80 r SMUIO_BASE +ffffffff82b4be40 r THM_BASE +ffffffff82b4bf00 r UMC_BASE +ffffffff82b4bfc0 r RSMU_BASE +ffffffff82b4d000 r cz_ih_ip_funcs +ffffffff82b4d0a0 R cz_ih_ip_block +ffffffff82b4d0b8 r cz_ih_funcs ffffffff82b4e000 r crtc_offsets -ffffffff82b4e020 r dce_v11_0_ip_funcs -ffffffff82b4e0c0 R dce_v11_0_ip_block -ffffffff82b4e0d8 R dce_v11_2_ip_block -ffffffff82b4e0f0 r dce_v11_0_display_funcs +ffffffff82b4e020 r dce_v10_0_ip_funcs +ffffffff82b4e0c0 R dce_v10_0_ip_block +ffffffff82b4e0d8 R dce_v10_1_ip_block +ffffffff82b4e0f0 r dce_v10_0_display_funcs ffffffff82b4e150 r hpd_offsets -ffffffff82b4e168 r dce_v11_0_encoder_funcs -ffffffff82b4e188 r dce_v11_0_dac_helper_funcs -ffffffff82b4e1f0 r dce_v11_0_dig_helper_funcs -ffffffff82b4e258 r dce_v11_0_ext_helper_funcs -ffffffff82b4e2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82b4e2f0 r dce_v11_0_crtc_irq_funcs -ffffffff82b4e300 r dce_v11_0_pageflip_irq_funcs -ffffffff82b4e310 r dce_v11_0_hpd_irq_funcs +ffffffff82b4e168 r dce_v10_0_encoder_funcs +ffffffff82b4e188 r dce_v10_0_dac_helper_funcs +ffffffff82b4e1f0 r dce_v10_0_dig_helper_funcs +ffffffff82b4e258 r dce_v10_0_ext_helper_funcs +ffffffff82b4e2c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82b4e2f0 r dce_v10_0_crtc_irq_funcs +ffffffff82b4e300 r dce_v10_0_pageflip_irq_funcs +ffffffff82b4e310 r dce_v10_0_hpd_irq_funcs ffffffff82b4e320 r interrupt_status_offsets -ffffffff82b4e380 r dce_v11_0_crtc_funcs -ffffffff82b4e440 r dce_v11_0_crtc_helper_funcs +ffffffff82b4e380 r dce_v10_0_crtc_funcs +ffffffff82b4e440 r dce_v10_0_crtc_helper_funcs ffffffff82b4e4c0 r vga_control_regs ffffffff82b4e4e0 r dig_offsets -ffffffff82b4e510 r cz_mgcg_cgcg_init -ffffffff82b4e530 r cz_golden_settings_a11 -ffffffff82b4e550 r stoney_golden_settings_a11 -ffffffff82b4e570 r polaris11_golden_settings_a11 -ffffffff82b4e5b0 r polaris10_golden_settings_a11 -ffffffff82b4f000 R df_v1_7_funcs -ffffffff82b4f070 r df_v1_7_channel_number -ffffffff82b50000 R df_v3_6_funcs -ffffffff82b50070 r df_v3_6_channel_number -ffffffff82b51000 R df_v4_3_funcs -ffffffff82b52000 r GC_BASE -ffffffff82b520a8 r HDP_BASE -ffffffff82b52150 r MMHUB_BASE -ffffffff82b521f8 r ATHUB_BASE -ffffffff82b522a0 r NBIO_BASE -ffffffff82b52348 r MP0_BASE -ffffffff82b523f0 r MP1_BASE -ffffffff82b52498 r VCN0_BASE -ffffffff82b52540 r DF_BASE -ffffffff82b525e8 r DCN_BASE -ffffffff82b52690 r OSSSYS_BASE -ffffffff82b52738 r SMUIO_BASE -ffffffff82b527e0 r THM_BASE -ffffffff82b53000 r gfx_v10_0_ip_funcs -ffffffff82b530a0 R gfx_v10_0_ip_block -ffffffff82b530b8 r gfx_v10_0_gfx_funcs -ffffffff82b53120 r golden_settings_gc_rlc_spm_10_0_nv10 -ffffffff82b593c0 r golden_settings_gc_rlc_spm_10_1_nv14 -ffffffff82b5cde0 r golden_settings_gc_rlc_spm_10_1_2_nv12 -ffffffff82b63080 r gfx_v10_0_kiq_pm4_funcs -ffffffff82b630c0 r gfx_v10_0_ring_funcs_kiq -ffffffff82b63200 r gfx_v10_0_ring_funcs_gfx -ffffffff82b63340 r gfx_v10_0_ring_funcs_compute -ffffffff82b63480 r gfx_v10_0_eop_irq_funcs -ffffffff82b63490 r gfx_v10_0_kiq_irq_funcs -ffffffff82b634a0 r gfx_v10_0_priv_reg_irq_funcs -ffffffff82b634b0 r gfx_v10_0_priv_inst_irq_funcs -ffffffff82b634c0 r gfx_v10_0_rlc_funcs -ffffffff82b63528 r gfx_v10_0_rlc_funcs_sriov -ffffffff82b63590 r gfx10_cs_data -ffffffff82b635b0 r gfx10_SECT_CONTEXT_defs -ffffffff82b63640 r gfx10_SECT_CONTEXT_def_1 -ffffffff82b639a0 r gfx10_SECT_CONTEXT_def_3 -ffffffff82b639b0 r gfx10_SECT_CONTEXT_def_4 -ffffffff82b63c28 r gfx10_SECT_CONTEXT_def_5 -ffffffff82b63c30 r gfx10_SECT_CONTEXT_def_6 -ffffffff82b63c40 r gfx10_SECT_CONTEXT_def_2 -ffffffff82b64080 r gfx10_SECT_CONTEXT_def_7 -ffffffff82b64190 r gfx10_SECT_CONTEXT_def_8 -ffffffff82b644c0 r golden_settings_gc_10_1 -ffffffff82b64880 r golden_settings_gc_10_0_nv10 -ffffffff82b64880 r golden_settings_gc_10_1_1 -ffffffff82b64c10 r golden_settings_gc_10_1_2 -ffffffff82b64c10 r golden_settings_gc_10_1_nv14 -ffffffff82b65000 r golden_settings_gc_10_1_2_nv12 -ffffffff82b65000 r golden_settings_gc_10_3 -ffffffff82b65408 r golden_settings_gc_10_3_sienna_cichlid -ffffffff82b65410 r golden_settings_gc_10_3_2 -ffffffff82b65800 r golden_settings_gc_10_3_vangogh -ffffffff82b65a60 r golden_settings_gc_10_3_3 -ffffffff82b65c40 r golden_settings_gc_10_3_4 -ffffffff82b65fa0 r golden_settings_gc_10_3_5 -ffffffff82b662a0 r golden_settings_gc_10_0_cyan_skillfish -ffffffff82b665d0 r golden_settings_gc_10_3_6 -ffffffff82b667e0 r golden_settings_gc_10_3_7 -ffffffff82b67000 r gfx_v11_0_ip_funcs -ffffffff82b670a0 R gfx_v11_0_ip_block -ffffffff82b670b8 r gfx_v11_0_gfx_funcs -ffffffff82b67118 r gfx_v11_0_kiq_pm4_funcs -ffffffff82b67158 r gfx_v11_0_ring_funcs_kiq -ffffffff82b67298 r gfx_v11_0_ring_funcs_gfx -ffffffff82b673d8 r gfx_v11_0_ring_funcs_compute -ffffffff82b67518 r gfx_v11_0_eop_irq_funcs -ffffffff82b67528 r gfx_v11_0_priv_reg_irq_funcs -ffffffff82b67538 r gfx_v11_0_priv_inst_irq_funcs -ffffffff82b67548 r gfx_v11_0_rlc_gc_fed_irq_funcs -ffffffff82b67558 r gfx_v11_0_rlc_funcs -ffffffff82b675c0 r gfx11_cs_data -ffffffff82b675e0 r gfx11_SECT_CONTEXT_defs -ffffffff82b67660 r gfx11_SECT_CONTEXT_def_1 -ffffffff82b679c0 r gfx11_SECT_CONTEXT_def_3 -ffffffff82b679d0 r gfx11_SECT_CONTEXT_def_5 -ffffffff82b679d8 r gfx11_SECT_CONTEXT_def_6 -ffffffff82b679e0 r gfx11_SECT_CONTEXT_def_2 -ffffffff82b67e20 r gfx11_SECT_CONTEXT_def_4 -ffffffff82b680a0 r gfx11_SECT_CONTEXT_def_7 -ffffffff82b68510 r golden_settings_gc_11_0_1 -ffffffff82b685f0 r golden_settings_gc_11_0 -ffffffff82b69000 r gfx_v8_0_ip_funcs -ffffffff82b690a0 R gfx_v8_0_ip_block -ffffffff82b690b8 R gfx_v8_1_ip_block -ffffffff82b690d0 r gfx_v8_0_gfx_funcs -ffffffff82b69130 r gfx_v8_0_ring_funcs_kiq -ffffffff82b69270 r gfx_v8_0_ring_funcs_gfx -ffffffff82b693b0 r gfx_v8_0_ring_funcs_compute -ffffffff82b694f0 r amdgpu_gds_reg_offset -ffffffff82b695f0 r gfx_v8_0_eop_irq_funcs -ffffffff82b69600 r gfx_v8_0_priv_reg_irq_funcs -ffffffff82b69610 r gfx_v8_0_priv_inst_irq_funcs -ffffffff82b69620 r gfx_v8_0_cp_ecc_error_irq_funcs -ffffffff82b69630 r gfx_v8_0_sq_irq_funcs -ffffffff82b69640 r sq_edc_source_names -ffffffff82b69678 r iceland_rlc_funcs -ffffffff82b696e0 r vi_cs_data -ffffffff82b69700 r vi_SECT_CONTEXT_defs -ffffffff82b69780 r vi_SECT_CONTEXT_def_1 -ffffffff82b69ad0 r vi_SECT_CONTEXT_def_3 -ffffffff82b69af0 r vi_SECT_CONTEXT_def_4 -ffffffff82b69d64 r vi_SECT_CONTEXT_def_5 -ffffffff82b69d6c r vi_SECT_CONTEXT_def_6 -ffffffff82b69d70 r vi_SECT_CONTEXT_def_2 -ffffffff82b6a1c0 r vi_SECT_CONTEXT_def_7 -ffffffff82b6a570 r vgpr_init_compute_shader -ffffffff82b6a680 r vgpr_init_regs -ffffffff82b6a710 r sgpr1_init_regs -ffffffff82b6a7a0 r sgpr2_init_regs -ffffffff82b6a830 r sec_ded_counter_registers -ffffffff82b6a8a0 r iceland_mgcg_cgcg_init -ffffffff82b6aba0 r golden_settings_iceland_a11 -ffffffff82b6ac60 r iceland_golden_common_all -ffffffff82b6acc0 r fiji_mgcg_cgcg_init -ffffffff82b6ae70 r golden_settings_fiji_a10 -ffffffff82b6af00 r fiji_golden_common_all -ffffffff82b6af80 r tonga_mgcg_cgcg_init -ffffffff82b6b310 r golden_settings_tonga_a11 -ffffffff82b6b3d0 r tonga_golden_common_all -ffffffff82b6b430 r golden_settings_vegam_a11 -ffffffff82b6b500 r vegam_golden_common_all -ffffffff82b6b550 r golden_settings_polaris11_a11 -ffffffff82b6b620 r polaris11_golden_common_all -ffffffff82b6b670 r golden_settings_polaris10_a11 -ffffffff82b6b740 r polaris10_golden_common_all -ffffffff82b6b7a0 r cz_mgcg_cgcg_init -ffffffff82b6bb30 r cz_golden_settings_a11 -ffffffff82b6bbc0 r cz_golden_common_all -ffffffff82b6bc20 r stoney_mgcg_cgcg_init -ffffffff82b6bc60 r stoney_golden_settings_a11 -ffffffff82b6bce0 r stoney_golden_common_all -ffffffff82b6c000 R gfx_v9_0_ras_ops -ffffffff82b6c040 r gfx_v9_0_ip_funcs -ffffffff82b6c0e0 R gfx_v9_0_ip_block -ffffffff82b6c100 r ras_gfx_subblocks -ffffffff82b6cb80 r gfx_v9_0_edc_counter_regs -ffffffff82b6cf20 r gfx_v9_0_ras_fields -ffffffff82b6e000 r gfx_v9_0_gfx_funcs -ffffffff82b6e060 r gfx_v9_0_kiq_pm4_funcs -ffffffff82b6e0a0 r gfx_v9_0_ring_funcs_kiq -ffffffff82b6e1e0 r gfx_v9_0_ring_funcs_gfx -ffffffff82b6e320 r gfx_v9_0_sw_ring_funcs_gfx -ffffffff82b6e460 r gfx_v9_0_ring_funcs_compute -ffffffff82b6e5a0 r gfx_v9_0_eop_irq_funcs -ffffffff82b6e5b0 r gfx_v9_0_priv_reg_irq_funcs -ffffffff82b6e5c0 r gfx_v9_0_priv_inst_irq_funcs -ffffffff82b6e5d0 r gfx_v9_0_cp_ecc_error_irq_funcs -ffffffff82b6e5e0 r gfx_v9_0_rlc_funcs -ffffffff82b6e650 r gfx9_cs_data -ffffffff82b6e670 r gfx9_SECT_CONTEXT_defs -ffffffff82b6e700 r gfx9_SECT_CONTEXT_def_1 -ffffffff82b6ea50 r gfx9_SECT_CONTEXT_def_3 -ffffffff82b6ea60 r gfx9_SECT_CONTEXT_def_4 -ffffffff82b6ecd4 r gfx9_SECT_CONTEXT_def_5 -ffffffff82b6ecdc r gfx9_SECT_CONTEXT_def_6 -ffffffff82b6ece0 r gfx9_SECT_CONTEXT_def_7 -ffffffff82b6edf0 r gfx9_SECT_CONTEXT_def_2 -ffffffff82b6f260 r gfx9_SECT_CONTEXT_def_8 -ffffffff82b6f4d0 r vgpr_init_compute_shader_arcturus -ffffffff82b6fd60 r vgpr_init_regs_arcturus -ffffffff82b6fef0 r vgpr_init_regs -ffffffff82b70080 r sgpr1_init_regs -ffffffff82b70210 r sgpr2_init_regs -ffffffff82b703a0 r golden_settings_gc_9_0 -ffffffff82b70580 r golden_settings_gc_9_0_vg10 -ffffffff82b70730 r golden_settings_gc_9_2_1 -ffffffff82b708b0 r golden_settings_gc_9_2_1_vg12 -ffffffff82b709f0 r golden_settings_gc_9_0_vg20 -ffffffff82b70b00 r golden_settings_gc_9_4_1_arct -ffffffff82b70c10 r golden_settings_gc_9_1 -ffffffff82b70e50 r golden_settings_gc_9_1_rv2 -ffffffff82b71020 r golden_settings_gc_9_1_rv1 -ffffffff82b710d0 r golden_settings_gc_9_1_rn -ffffffff82b711f0 r golden_settings_gc_9_x_common -ffffffff82b72000 R gfx_v9_4_ras_ops -ffffffff82b72040 r gfx_v9_4_edc_counter_regs -ffffffff82b72420 r gfx_v9_4_ras_fields -ffffffff82b74000 R vgpr_init_regs_aldebaran -ffffffff82b741b0 R sgpr112_init_regs_aldebaran -ffffffff82b74360 R sgpr96_init_regs_aldebaran -ffffffff82b74510 R sgpr64_init_regs_aldebaran -ffffffff82b746c0 r golden_settings_gc_9_4_2_alde -ffffffff82b74720 r golden_settings_gc_9_4_2_alde_die_0 -ffffffff82b747b0 r golden_settings_gc_9_4_2_alde_die_1 -ffffffff82b74840 r sgpr112_init_compute_shader_aldebaran -ffffffff82b74a60 r sgpr96_init_compute_shader_aldebaran -ffffffff82b74c50 r sgpr64_init_compute_shader_aldebaran -ffffffff82b74dc0 r vgpr_init_compute_shader_aldebaran -ffffffff82b756a0 r gfx_v9_4_2_edc_counter_regs -ffffffff82b75a20 r gfx_v9_4_2_ras_fields -ffffffff82b773c0 r gfx_v9_4_2_utc_blocks -ffffffff82b78000 r gfx_v9_4_3_ip_funcs -ffffffff82b780a0 R gfx_v9_4_3_ip_block -ffffffff82b780b8 r gfx_v9_4_3_kiq_pm4_funcs -ffffffff82b780f8 r gfx_v9_4_3_ring_funcs_kiq -ffffffff82b78238 r gfx_v9_4_3_ring_funcs_compute -ffffffff82b78378 r gfx_v9_4_3_eop_irq_funcs -ffffffff82b78388 r gfx_v9_4_3_priv_reg_irq_funcs -ffffffff82b78398 r gfx_v9_4_3_priv_inst_irq_funcs -ffffffff82b783a8 r gfx_v9_4_3_rlc_funcs -ffffffff82b78410 r gfx_v9_4_3_gfx_funcs -ffffffff82b78470 r gfx_v9_4_3_ce_reg_list -ffffffff82b78800 r gfx_v9_4_3_ras_mem_list_array -ffffffff82b78960 r gfx_v9_4_3_ue_reg_list -ffffffff82b78d20 r gfx_v9_4_3_ras_cp_mem_list -ffffffff82b78d70 r gfx_v9_4_3_ras_gcea_mem_list -ffffffff82b78eb0 r gfx_v9_4_3_ras_gc_cane_mem_list -ffffffff82b78ec0 r gfx_v9_4_3_ras_gcutcl2_mem_list -ffffffff82b78ed0 r gfx_v9_4_3_ras_gds_mem_list -ffffffff82b78ee0 r gfx_v9_4_3_ras_lds_mem_list -ffffffff82b79100 r gfx_v9_4_3_ras_rlc_mem_list -ffffffff82b79180 r gfx_v9_4_3_ras_sp_mem_list -ffffffff82b79190 r gfx_v9_4_3_ras_spi_mem_list -ffffffff82b791d0 r gfx_v9_4_3_ras_sqc_mem_list -ffffffff82b79340 r gfx_v9_4_3_ras_sq_mem_list -ffffffff82b79380 r gfx_v9_4_3_ras_ta_mem_list -ffffffff82b793d0 r gfx_v9_4_3_ras_tcc_mem_list -ffffffff82b793e0 r gfx_v9_4_3_ras_tca_mem_list -ffffffff82b793f0 r gfx_v9_4_3_ras_tci_mem_list -ffffffff82b79400 r gfx_v9_4_3_ras_tcp_mem_list -ffffffff82b79590 r gfx_v9_4_3_ras_td_mem_list -ffffffff82b795c0 r gfx_v9_4_3_ras_tcx_mem_list -ffffffff82b79b40 r gfx_v9_4_3_ras_atc_l2_mem_list -ffffffff82b79b50 r gfx_v9_4_3_ras_utcl2_mem_list -ffffffff82b79b60 r gfx_v9_4_3_ras_vml2_mem_list -ffffffff82b79b70 r gfx_v9_4_3_ras_vml2_walker_mem_list -ffffffff82b7a000 R gfxhub_v1_0_funcs -ffffffff82b7b000 R gfxhub_v1_2_funcs -ffffffff82b7c000 R gfxhub_v2_0_funcs -ffffffff82b7c060 r gfxhub_v2_0_vmhub_funcs -ffffffff82b7c070 r gfxhub_client_ids -ffffffff82b7d000 R gfxhub_v2_1_funcs -ffffffff82b7d060 r gfxhub_v2_1_vmhub_funcs +ffffffff82b4e500 r pin_offsets +ffffffff82b4e520 r fiji_mgcg_cgcg_init +ffffffff82b4e540 r golden_settings_fiji_a10 +ffffffff82b4e570 r tonga_mgcg_cgcg_init +ffffffff82b4e590 r golden_settings_tonga_a11 +ffffffff82b4f000 r crtc_offsets +ffffffff82b4f020 r dce_v11_0_ip_funcs +ffffffff82b4f0c0 R dce_v11_0_ip_block +ffffffff82b4f0d8 R dce_v11_2_ip_block +ffffffff82b4f0f0 r dce_v11_0_display_funcs +ffffffff82b4f150 r hpd_offsets +ffffffff82b4f168 r dce_v11_0_encoder_funcs +ffffffff82b4f188 r dce_v11_0_dac_helper_funcs +ffffffff82b4f1f0 r dce_v11_0_dig_helper_funcs +ffffffff82b4f258 r dce_v11_0_ext_helper_funcs +ffffffff82b4f2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82b4f2f0 r dce_v11_0_crtc_irq_funcs +ffffffff82b4f300 r dce_v11_0_pageflip_irq_funcs +ffffffff82b4f310 r dce_v11_0_hpd_irq_funcs +ffffffff82b4f320 r interrupt_status_offsets +ffffffff82b4f380 r dce_v11_0_crtc_funcs +ffffffff82b4f440 r dce_v11_0_crtc_helper_funcs +ffffffff82b4f4c0 r vga_control_regs +ffffffff82b4f4e0 r dig_offsets +ffffffff82b4f510 r cz_mgcg_cgcg_init +ffffffff82b4f530 r cz_golden_settings_a11 +ffffffff82b4f550 r stoney_golden_settings_a11 +ffffffff82b4f570 r polaris11_golden_settings_a11 +ffffffff82b4f5b0 r polaris10_golden_settings_a11 +ffffffff82b50000 R df_v1_7_funcs +ffffffff82b50070 r df_v1_7_channel_number +ffffffff82b51000 R df_v3_6_funcs +ffffffff82b51070 r df_v3_6_channel_number +ffffffff82b52000 R df_v4_3_funcs +ffffffff82b53000 r GC_BASE +ffffffff82b530a8 r HDP_BASE +ffffffff82b53150 r MMHUB_BASE +ffffffff82b531f8 r ATHUB_BASE +ffffffff82b532a0 r NBIO_BASE +ffffffff82b53348 r MP0_BASE +ffffffff82b533f0 r MP1_BASE +ffffffff82b53498 r VCN0_BASE +ffffffff82b53540 r DF_BASE +ffffffff82b535e8 r DCN_BASE +ffffffff82b53690 r OSSSYS_BASE +ffffffff82b53738 r SMUIO_BASE +ffffffff82b537e0 r THM_BASE +ffffffff82b54000 r gfx_v10_0_ip_funcs +ffffffff82b540a0 R gfx_v10_0_ip_block +ffffffff82b540b8 r gfx_v10_0_gfx_funcs +ffffffff82b54120 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82b5a3c0 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82b5dde0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82b64080 r gfx_v10_0_kiq_pm4_funcs +ffffffff82b640c0 r gfx_v10_0_ring_funcs_kiq +ffffffff82b64200 r gfx_v10_0_ring_funcs_gfx +ffffffff82b64340 r gfx_v10_0_ring_funcs_compute +ffffffff82b64480 r gfx_v10_0_eop_irq_funcs +ffffffff82b64490 r gfx_v10_0_kiq_irq_funcs +ffffffff82b644a0 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82b644b0 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82b644c0 r gfx_v10_0_rlc_funcs +ffffffff82b64528 r gfx_v10_0_rlc_funcs_sriov +ffffffff82b64590 r gfx10_cs_data +ffffffff82b645b0 r gfx10_SECT_CONTEXT_defs +ffffffff82b64640 r gfx10_SECT_CONTEXT_def_1 +ffffffff82b649a0 r gfx10_SECT_CONTEXT_def_3 +ffffffff82b649b0 r gfx10_SECT_CONTEXT_def_4 +ffffffff82b64c28 r gfx10_SECT_CONTEXT_def_5 +ffffffff82b64c30 r gfx10_SECT_CONTEXT_def_6 +ffffffff82b64c40 r gfx10_SECT_CONTEXT_def_2 +ffffffff82b65080 r gfx10_SECT_CONTEXT_def_7 +ffffffff82b65190 r gfx10_SECT_CONTEXT_def_8 +ffffffff82b654c0 r golden_settings_gc_10_1 +ffffffff82b65880 r golden_settings_gc_10_0_nv10 +ffffffff82b65880 r golden_settings_gc_10_1_1 +ffffffff82b65c10 r golden_settings_gc_10_1_2 +ffffffff82b65c10 r golden_settings_gc_10_1_nv14 +ffffffff82b66000 r golden_settings_gc_10_1_2_nv12 +ffffffff82b66000 r golden_settings_gc_10_3 +ffffffff82b66408 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82b66410 r golden_settings_gc_10_3_2 +ffffffff82b66800 r golden_settings_gc_10_3_vangogh +ffffffff82b66a60 r golden_settings_gc_10_3_3 +ffffffff82b66c40 r golden_settings_gc_10_3_4 +ffffffff82b66fa0 r golden_settings_gc_10_3_5 +ffffffff82b672a0 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82b675d0 r golden_settings_gc_10_3_6 +ffffffff82b677e0 r golden_settings_gc_10_3_7 +ffffffff82b68000 r gfx_v11_0_ip_funcs +ffffffff82b680a0 R gfx_v11_0_ip_block +ffffffff82b680b8 r gfx_v11_0_gfx_funcs +ffffffff82b68118 r gfx_v11_0_kiq_pm4_funcs +ffffffff82b68158 r gfx_v11_0_ring_funcs_kiq +ffffffff82b68298 r gfx_v11_0_ring_funcs_gfx +ffffffff82b683d8 r gfx_v11_0_ring_funcs_compute +ffffffff82b68518 r gfx_v11_0_eop_irq_funcs +ffffffff82b68528 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82b68538 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82b68548 r gfx_v11_0_rlc_gc_fed_irq_funcs +ffffffff82b68558 r gfx_v11_0_rlc_funcs +ffffffff82b685c0 r gfx11_cs_data +ffffffff82b685e0 r gfx11_SECT_CONTEXT_defs +ffffffff82b68660 r gfx11_SECT_CONTEXT_def_1 +ffffffff82b689c0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82b689d0 r gfx11_SECT_CONTEXT_def_5 +ffffffff82b689d8 r gfx11_SECT_CONTEXT_def_6 +ffffffff82b689e0 r gfx11_SECT_CONTEXT_def_2 +ffffffff82b68e20 r gfx11_SECT_CONTEXT_def_4 +ffffffff82b690a0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82b69510 r golden_settings_gc_11_0_1 +ffffffff82b695f0 r golden_settings_gc_11_0 +ffffffff82b6a000 r gfx_v8_0_ip_funcs +ffffffff82b6a0a0 R gfx_v8_0_ip_block +ffffffff82b6a0b8 R gfx_v8_1_ip_block +ffffffff82b6a0d0 r gfx_v8_0_gfx_funcs +ffffffff82b6a130 r gfx_v8_0_ring_funcs_kiq +ffffffff82b6a270 r gfx_v8_0_ring_funcs_gfx +ffffffff82b6a3b0 r gfx_v8_0_ring_funcs_compute +ffffffff82b6a4f0 r amdgpu_gds_reg_offset +ffffffff82b6a5f0 r gfx_v8_0_eop_irq_funcs +ffffffff82b6a600 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82b6a610 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82b6a620 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82b6a630 r gfx_v8_0_sq_irq_funcs +ffffffff82b6a640 r sq_edc_source_names +ffffffff82b6a678 r iceland_rlc_funcs +ffffffff82b6a6e0 r vi_cs_data +ffffffff82b6a700 r vi_SECT_CONTEXT_defs +ffffffff82b6a780 r vi_SECT_CONTEXT_def_1 +ffffffff82b6aad0 r vi_SECT_CONTEXT_def_3 +ffffffff82b6aaf0 r vi_SECT_CONTEXT_def_4 +ffffffff82b6ad64 r vi_SECT_CONTEXT_def_5 +ffffffff82b6ad6c r vi_SECT_CONTEXT_def_6 +ffffffff82b6ad70 r vi_SECT_CONTEXT_def_2 +ffffffff82b6b1c0 r vi_SECT_CONTEXT_def_7 +ffffffff82b6b570 r vgpr_init_compute_shader +ffffffff82b6b680 r vgpr_init_regs +ffffffff82b6b710 r sgpr1_init_regs +ffffffff82b6b7a0 r sgpr2_init_regs +ffffffff82b6b830 r sec_ded_counter_registers +ffffffff82b6b8a0 r iceland_mgcg_cgcg_init +ffffffff82b6bba0 r golden_settings_iceland_a11 +ffffffff82b6bc60 r iceland_golden_common_all +ffffffff82b6bcc0 r fiji_mgcg_cgcg_init +ffffffff82b6be70 r golden_settings_fiji_a10 +ffffffff82b6bf00 r fiji_golden_common_all +ffffffff82b6bf80 r tonga_mgcg_cgcg_init +ffffffff82b6c310 r golden_settings_tonga_a11 +ffffffff82b6c3d0 r tonga_golden_common_all +ffffffff82b6c430 r golden_settings_vegam_a11 +ffffffff82b6c500 r vegam_golden_common_all +ffffffff82b6c550 r golden_settings_polaris11_a11 +ffffffff82b6c620 r polaris11_golden_common_all +ffffffff82b6c670 r golden_settings_polaris10_a11 +ffffffff82b6c740 r polaris10_golden_common_all +ffffffff82b6c7a0 r cz_mgcg_cgcg_init +ffffffff82b6cb30 r cz_golden_settings_a11 +ffffffff82b6cbc0 r cz_golden_common_all +ffffffff82b6cc20 r stoney_mgcg_cgcg_init +ffffffff82b6cc60 r stoney_golden_settings_a11 +ffffffff82b6cce0 r stoney_golden_common_all +ffffffff82b6d000 R gfx_v9_0_ras_ops +ffffffff82b6d040 r gfx_v9_0_ip_funcs +ffffffff82b6d0e0 R gfx_v9_0_ip_block +ffffffff82b6d100 r ras_gfx_subblocks +ffffffff82b6db80 r gfx_v9_0_edc_counter_regs +ffffffff82b6df20 r gfx_v9_0_ras_fields +ffffffff82b6f000 r gfx_v9_0_gfx_funcs +ffffffff82b6f060 r gfx_v9_0_kiq_pm4_funcs +ffffffff82b6f0a0 r gfx_v9_0_ring_funcs_kiq +ffffffff82b6f1e0 r gfx_v9_0_ring_funcs_gfx +ffffffff82b6f320 r gfx_v9_0_sw_ring_funcs_gfx +ffffffff82b6f460 r gfx_v9_0_ring_funcs_compute +ffffffff82b6f5a0 r gfx_v9_0_eop_irq_funcs +ffffffff82b6f5b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82b6f5c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82b6f5d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82b6f5e0 r gfx_v9_0_rlc_funcs +ffffffff82b6f650 r gfx9_cs_data +ffffffff82b6f670 r gfx9_SECT_CONTEXT_defs +ffffffff82b6f700 r gfx9_SECT_CONTEXT_def_1 +ffffffff82b6fa50 r gfx9_SECT_CONTEXT_def_3 +ffffffff82b6fa60 r gfx9_SECT_CONTEXT_def_4 +ffffffff82b6fcd4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82b6fcdc r gfx9_SECT_CONTEXT_def_6 +ffffffff82b6fce0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82b6fdf0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82b70260 r gfx9_SECT_CONTEXT_def_8 +ffffffff82b704d0 r vgpr_init_compute_shader_arcturus +ffffffff82b70d60 r vgpr_init_regs_arcturus +ffffffff82b70ef0 r vgpr_init_regs +ffffffff82b71080 r sgpr1_init_regs +ffffffff82b71210 r sgpr2_init_regs +ffffffff82b713a0 r golden_settings_gc_9_0 +ffffffff82b71580 r golden_settings_gc_9_0_vg10 +ffffffff82b71730 r golden_settings_gc_9_2_1 +ffffffff82b718b0 r golden_settings_gc_9_2_1_vg12 +ffffffff82b719f0 r golden_settings_gc_9_0_vg20 +ffffffff82b71b00 r golden_settings_gc_9_4_1_arct +ffffffff82b71c10 r golden_settings_gc_9_1 +ffffffff82b71e50 r golden_settings_gc_9_1_rv2 +ffffffff82b72020 r golden_settings_gc_9_1_rv1 +ffffffff82b720d0 r golden_settings_gc_9_1_rn +ffffffff82b721f0 r golden_settings_gc_9_x_common +ffffffff82b73000 R gfx_v9_4_ras_ops +ffffffff82b73040 r gfx_v9_4_edc_counter_regs +ffffffff82b73420 r gfx_v9_4_ras_fields +ffffffff82b75000 R vgpr_init_regs_aldebaran +ffffffff82b751b0 R sgpr112_init_regs_aldebaran +ffffffff82b75360 R sgpr96_init_regs_aldebaran +ffffffff82b75510 R sgpr64_init_regs_aldebaran +ffffffff82b756c0 r golden_settings_gc_9_4_2_alde +ffffffff82b75720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82b757b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82b75840 r sgpr112_init_compute_shader_aldebaran +ffffffff82b75a60 r sgpr96_init_compute_shader_aldebaran +ffffffff82b75c50 r sgpr64_init_compute_shader_aldebaran +ffffffff82b75dc0 r vgpr_init_compute_shader_aldebaran +ffffffff82b766a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82b76a20 r gfx_v9_4_2_ras_fields +ffffffff82b783c0 r gfx_v9_4_2_utc_blocks +ffffffff82b79000 r gfx_v9_4_3_ip_funcs +ffffffff82b790a0 R gfx_v9_4_3_ip_block +ffffffff82b790b8 r gfx_v9_4_3_kiq_pm4_funcs +ffffffff82b790f8 r gfx_v9_4_3_ring_funcs_kiq +ffffffff82b79238 r gfx_v9_4_3_ring_funcs_compute +ffffffff82b79378 r gfx_v9_4_3_eop_irq_funcs +ffffffff82b79388 r gfx_v9_4_3_priv_reg_irq_funcs +ffffffff82b79398 r gfx_v9_4_3_priv_inst_irq_funcs +ffffffff82b793a8 r gfx_v9_4_3_rlc_funcs +ffffffff82b79410 r gfx_v9_4_3_gfx_funcs +ffffffff82b79470 r gfx_v9_4_3_ce_reg_list +ffffffff82b79800 r gfx_v9_4_3_ras_mem_list_array +ffffffff82b79960 r gfx_v9_4_3_ue_reg_list +ffffffff82b79d20 r gfx_v9_4_3_ras_cp_mem_list +ffffffff82b79d70 r gfx_v9_4_3_ras_gcea_mem_list +ffffffff82b79eb0 r gfx_v9_4_3_ras_gc_cane_mem_list +ffffffff82b79ec0 r gfx_v9_4_3_ras_gcutcl2_mem_list +ffffffff82b79ed0 r gfx_v9_4_3_ras_gds_mem_list +ffffffff82b79ee0 r gfx_v9_4_3_ras_lds_mem_list +ffffffff82b7a100 r gfx_v9_4_3_ras_rlc_mem_list +ffffffff82b7a180 r gfx_v9_4_3_ras_sp_mem_list +ffffffff82b7a190 r gfx_v9_4_3_ras_spi_mem_list +ffffffff82b7a1d0 r gfx_v9_4_3_ras_sqc_mem_list +ffffffff82b7a340 r gfx_v9_4_3_ras_sq_mem_list +ffffffff82b7a380 r gfx_v9_4_3_ras_ta_mem_list +ffffffff82b7a3d0 r gfx_v9_4_3_ras_tcc_mem_list +ffffffff82b7a3e0 r gfx_v9_4_3_ras_tca_mem_list +ffffffff82b7a3f0 r gfx_v9_4_3_ras_tci_mem_list +ffffffff82b7a400 r gfx_v9_4_3_ras_tcp_mem_list +ffffffff82b7a590 r gfx_v9_4_3_ras_td_mem_list +ffffffff82b7a5c0 r gfx_v9_4_3_ras_tcx_mem_list +ffffffff82b7ab40 r gfx_v9_4_3_ras_atc_l2_mem_list +ffffffff82b7ab50 r gfx_v9_4_3_ras_utcl2_mem_list +ffffffff82b7ab60 r gfx_v9_4_3_ras_vml2_mem_list +ffffffff82b7ab70 r gfx_v9_4_3_ras_vml2_walker_mem_list +ffffffff82b7b000 R gfxhub_v1_0_funcs +ffffffff82b7c000 R gfxhub_v1_2_funcs +ffffffff82b7d000 R gfxhub_v2_0_funcs +ffffffff82b7d060 r gfxhub_v2_0_vmhub_funcs ffffffff82b7d070 r gfxhub_client_ids -ffffffff82b7e000 R gfxhub_v3_0_funcs -ffffffff82b7e060 r gfxhub_v3_0_vmhub_funcs +ffffffff82b7e000 R gfxhub_v2_1_funcs +ffffffff82b7e060 r gfxhub_v2_1_vmhub_funcs ffffffff82b7e070 r gfxhub_client_ids -ffffffff82b7f000 R gfxhub_v3_0_3_funcs -ffffffff82b7f060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82b7f000 R gfxhub_v3_0_funcs +ffffffff82b7f060 r gfxhub_v3_0_vmhub_funcs ffffffff82b7f070 r gfxhub_client_ids -ffffffff82b80000 R gmc_v10_0_ip_funcs -ffffffff82b800a0 R gmc_v10_0_ip_block -ffffffff82b800b8 r gmc_v10_0_gmc_funcs -ffffffff82b80110 r gmc_v10_0_irq_funcs -ffffffff82b80120 r gmc_v10_0_ecc_funcs -ffffffff82b81000 R gmc_v11_0_ip_funcs -ffffffff82b810a0 R gmc_v11_0_ip_block -ffffffff82b810b8 r gmc_v11_0_gmc_funcs -ffffffff82b81110 r gmc_v11_0_irq_funcs -ffffffff82b81120 r gmc_v11_0_ecc_funcs -ffffffff82b82000 r gmc_v7_0_ip_funcs -ffffffff82b820a0 R gmc_v7_0_ip_block -ffffffff82b820b8 R gmc_v7_4_ip_block -ffffffff82b820d0 r gmc_v7_0_gmc_funcs -ffffffff82b82128 r gmc_v7_0_irq_funcs -ffffffff82b82138 r iceland_mgcg_cgcg_init -ffffffff82b82150 r golden_settings_iceland_a11 -ffffffff82b82180 r mc_cg_registers -ffffffff82b821b0 r mc_cg_en -ffffffff82b821e0 r mc_cg_ls_en -ffffffff82b83000 r gmc_v8_0_ip_funcs -ffffffff82b830a0 R gmc_v8_0_ip_block -ffffffff82b830b8 R gmc_v8_1_ip_block -ffffffff82b830d0 R gmc_v8_5_ip_block -ffffffff82b830e8 r gmc_v8_0_gmc_funcs -ffffffff82b83140 r gmc_v8_0_irq_funcs -ffffffff82b83150 r fiji_mgcg_cgcg_init -ffffffff82b83160 r golden_settings_fiji_a10 -ffffffff82b83190 r tonga_mgcg_cgcg_init -ffffffff82b831a0 r golden_settings_tonga_a11 -ffffffff82b83200 r golden_settings_polaris11_a11 -ffffffff82b83230 r golden_settings_polaris10_a11 -ffffffff82b8326c r cz_mgcg_cgcg_init -ffffffff82b83280 r stoney_mgcg_cgcg_init -ffffffff82b832a0 r golden_settings_stoney_common -ffffffff82b84000 R gmc_v9_0_ip_funcs -ffffffff82b840a0 R gmc_v9_0_ip_block -ffffffff82b840b8 r gmc_v9_0_gmc_funcs -ffffffff82b84110 r gmc_v9_0_irq_funcs -ffffffff82b84120 r gmc_v9_0_ecc_funcs -ffffffff82b84130 r gfxhub_client_ids -ffffffff82b841a0 r mmhub_client_ids_vega10 -ffffffff82b84490 r mmhub_client_ids_vega12 -ffffffff82b84790 r mmhub_client_ids_vega20 -ffffffff82b84a80 r mmhub_client_ids_arcturus -ffffffff82b86290 r mmhub_client_ids_raven -ffffffff82b86450 r mmhub_client_ids_renoir -ffffffff82b86640 r mmhub_client_ids_aldebaran -ffffffff82b87e50 r ecc_umc_mcumc_ctrl_addrs -ffffffff82b87ed0 r ecc_umc_mcumc_ctrl_mask_addrs -ffffffff82b87f50 r golden_settings_mmhub_1_0_0 -ffffffff82b87f80 r golden_settings_athub_1_0_0 -ffffffff82b88000 R hdp_v4_0_funcs -ffffffff82b89000 R hdp_v5_0_funcs -ffffffff82b8a000 R hdp_v5_2_funcs -ffffffff82b8b000 R hdp_v6_0_funcs -ffffffff82b8c000 r iceland_ih_ip_funcs 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jpeg_v2_6_ras_hw_ops -ffffffff82b931b0 r jpeg_v2_5_dec_ring_vm_funcs -ffffffff82b932f0 r jpeg_v2_6_dec_ring_vm_funcs -ffffffff82b93430 r jpeg_v2_5_irq_funcs -ffffffff82b93440 r jpeg_v2_6_ras_irq_funcs -ffffffff82b94000 r jpeg_v3_0_ip_funcs -ffffffff82b940a0 R jpeg_v3_0_ip_block -ffffffff82b940b8 r jpeg_v3_0_dec_ring_vm_funcs -ffffffff82b941f8 r jpeg_v3_0_irq_funcs -ffffffff82b95000 r jpeg_v4_0_ip_funcs -ffffffff82b950a0 R jpeg_v4_0_ip_block -ffffffff82b950b8 R jpeg_v4_0_ras_hw_ops -ffffffff82b950f8 r jpeg_v4_0_dec_ring_vm_funcs -ffffffff82b95238 r jpeg_v4_0_irq_funcs -ffffffff82b95248 r jpeg_v4_0_ras_irq_funcs -ffffffff82b96000 r jpeg_v4_0_3_ip_funcs -ffffffff82b960a0 R jpeg_v4_0_3_ip_block -ffffffff82b960b8 r jpeg_v4_0_3_dec_ring_vm_funcs -ffffffff82b961f8 r jpeg_v4_0_3_irq_funcs -ffffffff82b96208 r jpeg_v4_0_3_ras_hw_ops -ffffffff82b96250 r jpeg_v4_0_3_ue_reg_list -ffffffff82b97000 R lsdma_v6_0_funcs -ffffffff82b98000 r mca_v3_0_mp0_hw_ops -ffffffff82b98040 r mca_v3_0_mp1_hw_ops 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sdma_v4_4_2_srbm_write_irq_funcs -ffffffff82bc03e8 r sdma_v4_4_2_ras_hw_ops -ffffffff82bc0430 r sdma_v4_2_2_ue_reg_list -ffffffff82bc0460 r sdma_v4_4_2_ras_memory_list -ffffffff82bc1000 R sdma_v5_0_ip_funcs -ffffffff82bc10a0 R sdma_v5_0_ip_block -ffffffff82bc10b8 r sdma_v5_0_ring_funcs -ffffffff82bc11f8 r sdma_v5_0_buffer_funcs -ffffffff82bc1218 r sdma_v5_0_vm_pte_funcs -ffffffff82bc1238 r sdma_v5_0_trap_irq_funcs -ffffffff82bc1248 r sdma_v5_0_illegal_inst_irq_funcs -ffffffff82bc1260 r golden_settings_sdma_5 -ffffffff82bc14a0 r golden_settings_sdma_nv10 -ffffffff82bc14d0 r golden_settings_sdma_nv14 -ffffffff82bc1500 r golden_settings_sdma_5_sriov -ffffffff82bc16e0 r golden_settings_sdma_nv12 -ffffffff82bc1770 r golden_settings_sdma_cyan_skillfish -ffffffff82bc2000 R sdma_v5_2_ip_funcs -ffffffff82bc20a0 R sdma_v5_2_ip_block -ffffffff82bc20b8 r sdma_v5_2_ring_funcs -ffffffff82bc21f8 r sdma_v5_2_buffer_funcs -ffffffff82bc2218 r sdma_v5_2_vm_pte_funcs -ffffffff82bc2238 r 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vcn_4_0_0_video_codecs_encode_array_vcn1 -ffffffff82bcc370 r vcn_4_0_0_video_codecs_decode_array_vcn1 -ffffffff82bcc3c0 r vcn_4_0_0_video_codecs_encode_array_vcn0 -ffffffff82bcc400 r vcn_4_0_0_video_codecs_decode_array_vcn0 -ffffffff82bcd000 r tonga_ih_ip_funcs -ffffffff82bcd0a0 R tonga_ih_ip_block -ffffffff82bcd0b8 r tonga_ih_funcs -ffffffff82bce000 R umc_v6_0_funcs -ffffffff82bcf000 R umc_v6_1_channel_idx_tbl -ffffffff82bcf080 R umc_v6_1_ras_hw_ops -ffffffff82bd0000 R umc_v6_7_channel_idx_tbl_second -ffffffff82bd0080 R umc_v6_7_channel_idx_tbl_first -ffffffff82bd0100 R umc_v6_7_ras_hw_ops -ffffffff82bd1000 R umc_v8_10_channelnum_map_colbit_table -ffffffff82bd1040 R umc_v8_10_channel_idx_tbl_ext0 -ffffffff82bd1080 R umc_v8_10_channel_idx_tbl -ffffffff82bd10e0 R umc_v8_10_ras_hw_ops -ffffffff82bd2000 R umc_v8_7_channel_idx_tbl -ffffffff82bd2040 R umc_v8_7_ras_hw_ops -ffffffff82bd3000 r uvd_v5_0_ip_funcs -ffffffff82bd30a0 R uvd_v5_0_ip_block -ffffffff82bd30b8 r uvd_v5_0_ring_funcs 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vcn_v3_0_irq_funcs -ffffffff82bdc000 r vcn_v4_0_ip_funcs -ffffffff82bdc0a0 R vcn_v4_0_ip_block -ffffffff82bdc0b8 R vcn_v4_0_ras_hw_ops -ffffffff82bdc0f8 r vcn_v4_0_irq_funcs -ffffffff82bdc108 r vcn_v4_0_ras_irq_funcs -ffffffff82bdd000 r vcn_v4_0_3_ip_funcs -ffffffff82bdd0a0 R vcn_v4_0_3_ip_block -ffffffff82bdd0b8 r vcn_v4_0_3_unified_ring_vm_funcs -ffffffff82bdd1f8 r vcn_v4_0_3_irq_funcs -ffffffff82bdd208 r vcn_v4_0_3_ras_hw_ops -ffffffff82bdd250 r vcn_v4_0_3_ue_reg_list -ffffffff82bde000 R vega10_ih_ip_funcs -ffffffff82bde0a0 R vega10_ih_ip_block -ffffffff82bde0b8 r vega10_ih_funcs -ffffffff82bde0d8 r vega10_ih_self_irq_funcs -ffffffff82bdf000 r GC_BASE -ffffffff82bdf064 r HDP_BASE -ffffffff82bdf0c8 r MMHUB_BASE -ffffffff82bdf12c r ATHUB_BASE -ffffffff82bdf190 r NBIO_BASE -ffffffff82bdf1f4 r MP0_BASE -ffffffff82bdf258 r MP1_BASE -ffffffff82bdf2bc r VCE_BASE -ffffffff82bdf320 r VCN_BASE -ffffffff82bdf384 r DF_BASE -ffffffff82bdf3e8 r DCE_BASE -ffffffff82bdf44c r OSSSYS_BASE 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vi_common_ip_funcs -ffffffff82be20b8 r vi_asic_funcs -ffffffff82be2180 r vi_allowed_read_registers -ffffffff82be23e0 r topaz_video_codecs_encode -ffffffff82be23f0 r topaz_video_codecs_decode -ffffffff82be2400 r tonga_video_codecs_encode -ffffffff82be2410 r tonga_video_codecs_decode -ffffffff82be2420 r polaris_video_codecs_encode -ffffffff82be2430 r cz_video_codecs_decode -ffffffff82be2440 r tonga_video_codecs_encode_array -ffffffff82be2460 r tonga_video_codecs_decode_array -ffffffff82be24b0 r polaris_video_codecs_encode_array -ffffffff82be24e0 r cz_video_codecs_decode_array -ffffffff82be2560 r iceland_mgcg_cgcg_init -ffffffff82be25a0 r fiji_mgcg_cgcg_init -ffffffff82be2600 r tonga_mgcg_cgcg_init -ffffffff82be2660 r cz_mgcg_cgcg_init -ffffffff82be26a0 r stoney_mgcg_cgcg_init -ffffffff82be3000 r amdgpu_dm_funcs -ffffffff82be30a0 R dm_ip_block -ffffffff82be30b8 R amdgpu_dm_encoder_helper_funcs -ffffffff82be3120 r dm_display_funcs -ffffffff82be3180 r hpd_disconnect_quirk_table -ffffffff82be3ef0 r amdgpu_dm_mode_funcs -ffffffff82be3f38 r amdgpu_dm_audio_component_bind_ops -ffffffff82be3f48 r amdgpu_dm_audio_component_ops -ffffffff82be3f80 r amdgpu_dm_encoder_funcs -ffffffff82be3fa0 r amdgpu_dm_connector_funcs -ffffffff82be4018 r amdgpu_dm_connector_helper_funcs -ffffffff82be4078 r amdgpu_dm_i2c_algo -ffffffff82be4088 r amdgpu_dm_backlight_ops -ffffffff82be4260 r add_fs_modes.common_rates -ffffffff82be5000 r amdgpu_dm_crtc_funcs -ffffffff82be50c0 r amdgpu_dm_crtc_helper_funcs -ffffffff82be6000 r dm_dtn_log_begin.msg -ffffffff82be600d r dm_dtn_log_end.msg -ffffffff82be6018 r SYNAPTICS_DEVICE_ID -ffffffff82be7000 r dm_crtc_irq_funcs -ffffffff82be7010 r dm_vline0_irq_funcs -ffffffff82be7020 r dm_dmub_outbox_irq_funcs -ffffffff82be7030 r dm_vupdate_irq_funcs -ffffffff82be7040 r dm_dmub_trace_irq_funcs -ffffffff82be7050 r dm_pageflip_irq_funcs -ffffffff82be7060 r dm_hpd_irq_funcs -ffffffff82be8000 r amdgpu_dm_encoder_funcs -ffffffff82be8020 r dm_mst_cbs -ffffffff82be8030 r dm_dp_mst_connector_funcs -ffffffff82be80a8 r dm_dp_mst_connector_helper_funcs -ffffffff82be9000 r dm_plane_funcs -ffffffff82be9068 r dm_plane_helper_funcs -ffffffff82beb000 r vbios_funcs +ffffffff82b80000 R gfxhub_v3_0_3_funcs +ffffffff82b80060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82b80070 r gfxhub_client_ids +ffffffff82b81000 R gmc_v10_0_ip_funcs +ffffffff82b810a0 R gmc_v10_0_ip_block +ffffffff82b810b8 r gmc_v10_0_gmc_funcs +ffffffff82b81110 r gmc_v10_0_irq_funcs +ffffffff82b81120 r gmc_v10_0_ecc_funcs +ffffffff82b82000 R gmc_v11_0_ip_funcs +ffffffff82b820a0 R gmc_v11_0_ip_block +ffffffff82b820b8 r gmc_v11_0_gmc_funcs +ffffffff82b82110 r gmc_v11_0_irq_funcs +ffffffff82b82120 r gmc_v11_0_ecc_funcs +ffffffff82b83000 r gmc_v7_0_ip_funcs +ffffffff82b830a0 R gmc_v7_0_ip_block +ffffffff82b830b8 R gmc_v7_4_ip_block +ffffffff82b830d0 r gmc_v7_0_gmc_funcs +ffffffff82b83128 r gmc_v7_0_irq_funcs +ffffffff82b83138 r iceland_mgcg_cgcg_init +ffffffff82b83150 r golden_settings_iceland_a11 +ffffffff82b83180 r mc_cg_registers +ffffffff82b831b0 r mc_cg_en +ffffffff82b831e0 r mc_cg_ls_en +ffffffff82b84000 r gmc_v8_0_ip_funcs +ffffffff82b840a0 R gmc_v8_0_ip_block +ffffffff82b840b8 R gmc_v8_1_ip_block +ffffffff82b840d0 R gmc_v8_5_ip_block +ffffffff82b840e8 r gmc_v8_0_gmc_funcs +ffffffff82b84140 r gmc_v8_0_irq_funcs +ffffffff82b84150 r fiji_mgcg_cgcg_init +ffffffff82b84160 r golden_settings_fiji_a10 +ffffffff82b84190 r tonga_mgcg_cgcg_init +ffffffff82b841a0 r golden_settings_tonga_a11 +ffffffff82b84200 r golden_settings_polaris11_a11 +ffffffff82b84230 r golden_settings_polaris10_a11 +ffffffff82b8426c r cz_mgcg_cgcg_init +ffffffff82b84280 r stoney_mgcg_cgcg_init +ffffffff82b842a0 r golden_settings_stoney_common +ffffffff82b85000 R gmc_v9_0_ip_funcs +ffffffff82b850a0 R gmc_v9_0_ip_block +ffffffff82b850b8 r gmc_v9_0_gmc_funcs +ffffffff82b85110 r gmc_v9_0_irq_funcs +ffffffff82b85120 r gmc_v9_0_ecc_funcs +ffffffff82b85130 r gfxhub_client_ids +ffffffff82b851a0 r mmhub_client_ids_vega10 +ffffffff82b85490 r mmhub_client_ids_vega12 +ffffffff82b85790 r mmhub_client_ids_vega20 +ffffffff82b85a80 r mmhub_client_ids_arcturus +ffffffff82b87290 r mmhub_client_ids_raven +ffffffff82b87450 r mmhub_client_ids_renoir +ffffffff82b87640 r mmhub_client_ids_aldebaran +ffffffff82b88e50 r ecc_umc_mcumc_ctrl_addrs +ffffffff82b88ed0 r ecc_umc_mcumc_ctrl_mask_addrs +ffffffff82b88f50 r golden_settings_mmhub_1_0_0 +ffffffff82b88f80 r golden_settings_athub_1_0_0 +ffffffff82b89000 R hdp_v4_0_funcs +ffffffff82b8a000 R hdp_v5_0_funcs +ffffffff82b8b000 R hdp_v5_2_funcs +ffffffff82b8c000 R hdp_v6_0_funcs +ffffffff82b8d000 r iceland_ih_ip_funcs +ffffffff82b8d0a0 R iceland_ih_ip_block +ffffffff82b8d0b8 r iceland_ih_funcs +ffffffff82b8e000 r ih_v6_0_ip_funcs +ffffffff82b8e0a0 R ih_v6_0_ip_block +ffffffff82b8e0b8 r ih_v6_0_funcs +ffffffff82b8e0d8 r ih_v6_0_self_irq_funcs +ffffffff82b8f000 r ih_v6_1_ip_funcs +ffffffff82b8f0a0 R ih_v6_1_ip_block +ffffffff82b8f0b8 r ih_v6_1_funcs +ffffffff82b8f0d8 r ih_v6_1_self_irq_funcs +ffffffff82b90000 R gfx_v11_0_imu_funcs +ffffffff82b90030 r imu_rlc_ram_golden_11 +ffffffff82b90680 r imu_rlc_ram_golden_11_0_2 +ffffffff82b91000 r imu_rlc_ram_golden_11_0_3 +ffffffff82b92000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82b92140 r jpeg_v1_0_irq_funcs +ffffffff82b93000 r jpeg_v2_0_ip_funcs +ffffffff82b930a0 R jpeg_v2_0_ip_block +ffffffff82b930b8 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82b931f8 r jpeg_v2_0_irq_funcs +ffffffff82b94000 r jpeg_v2_5_ip_funcs +ffffffff82b940a0 R jpeg_v2_5_ip_block +ffffffff82b940b8 r jpeg_v2_6_ip_funcs +ffffffff82b94158 R jpeg_v2_6_ip_block +ffffffff82b94170 R jpeg_v2_6_ras_hw_ops +ffffffff82b941b0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82b942f0 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82b94430 r jpeg_v2_5_irq_funcs +ffffffff82b94440 r jpeg_v2_6_ras_irq_funcs +ffffffff82b95000 r jpeg_v3_0_ip_funcs +ffffffff82b950a0 R jpeg_v3_0_ip_block +ffffffff82b950b8 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82b951f8 r jpeg_v3_0_irq_funcs +ffffffff82b96000 r jpeg_v4_0_ip_funcs +ffffffff82b960a0 R jpeg_v4_0_ip_block +ffffffff82b960b8 R jpeg_v4_0_ras_hw_ops +ffffffff82b960f8 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82b96238 r jpeg_v4_0_irq_funcs +ffffffff82b96248 r jpeg_v4_0_ras_irq_funcs +ffffffff82b97000 r jpeg_v4_0_3_ip_funcs +ffffffff82b970a0 R jpeg_v4_0_3_ip_block +ffffffff82b970b8 r jpeg_v4_0_3_dec_ring_vm_funcs +ffffffff82b971f8 r jpeg_v4_0_3_irq_funcs +ffffffff82b97208 r jpeg_v4_0_3_ras_hw_ops +ffffffff82b97250 r jpeg_v4_0_3_ue_reg_list +ffffffff82b98000 R lsdma_v6_0_funcs +ffffffff82b99000 r mca_v3_0_mp0_hw_ops +ffffffff82b99040 r mca_v3_0_mp1_hw_ops +ffffffff82b99080 r mca_v3_0_mpio_hw_ops +ffffffff82b9a000 r mes_v10_1_ip_funcs +ffffffff82b9a0a0 R mes_v10_1_ip_block +ffffffff82b9a0b8 r mes_v10_1_funcs +ffffffff82b9a0e8 r mes_v10_1_ring_funcs +ffffffff82b9b000 r mes_v11_0_ip_funcs +ffffffff82b9b0a0 R mes_v11_0_ip_block +ffffffff82b9b0b8 r mes_v11_0_funcs +ffffffff82b9b0e8 r mes_v11_0_ring_funcs +ffffffff82b9c000 R mmhub_v1_0_funcs +ffffffff82b9c050 r mmhub_v1_0_edc_cnt_regs +ffffffff82b9c0c0 r mmhub_v1_0_ras_fields +ffffffff82b9d000 R mmhub_v1_7_funcs +ffffffff82b9d050 r mmhub_v1_7_edc_cnt_regs +ffffffff82b9d250 r mmhub_v1_7_ras_fields +ffffffff82b9e9c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82b9f000 R mmhub_v1_8_funcs +ffffffff82b9f050 r mmhub_v1_8_ras_hw_ops +ffffffff82b9f090 r mmhub_v1_8_ce_reg_list +ffffffff82b9f180 r mmhub_v1_8_ras_memory_list +ffffffff82b9f2b0 r mmhub_v1_8_ue_reg_list +ffffffff82ba0000 R mmhub_v2_0_funcs +ffffffff82ba0050 r mmhub_v2_0_vmhub_funcs +ffffffff82ba0060 r mmhub_client_ids_navi1x +ffffffff82ba0190 r mmhub_client_ids_sienna_cichlid +ffffffff82ba0450 r mmhub_client_ids_beige_goby +ffffffff82ba1000 R mmhub_v2_3_funcs +ffffffff82ba1050 r mmhub_v2_3_vmhub_funcs +ffffffff82ba1060 r mmhub_client_ids_vangogh +ffffffff82ba2000 R mmhub_v3_0_funcs +ffffffff82ba2050 r mmhub_v3_0_vmhub_funcs +ffffffff82ba2060 r mmhub_client_ids_v3_0_0 +ffffffff82ba3000 R mmhub_v3_0_1_funcs +ffffffff82ba3050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82ba3060 r mmhub_client_ids_v3_0_1 +ffffffff82ba4000 R mmhub_v3_0_2_funcs +ffffffff82ba4050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82ba4060 r mmhub_client_ids_v3_0_2 +ffffffff82ba5000 R mmhub_v9_4_ras_hw_ops +ffffffff82ba5040 R mmhub_v9_4_funcs +ffffffff82ba5090 r mmhub_v9_4_edc_cnt_regs +ffffffff82ba5330 r mmhub_v9_4_ras_fields +ffffffff82ba73b0 r mmhub_v9_4_err_status_regs +ffffffff82ba8000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82ba8010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82ba8020 R xgpu_ai_virt_ops +ffffffff82ba9000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82ba9010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82ba9020 R xgpu_nv_virt_ops +ffffffff82baa000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82baa240 r xgpu_fiji_golden_settings_a10 +ffffffff82baa370 r xgpu_fiji_golden_common_all +ffffffff82baa3f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82baa810 r xgpu_tonga_golden_settings_a11 +ffffffff82baa9d0 r xgpu_tonga_golden_common_all +ffffffff82baaa28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82baaa38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82baaa48 R xgpu_vi_virt_ops +ffffffff82bab000 r navi10_ih_ip_funcs +ffffffff82bab0a0 R navi10_ih_ip_block +ffffffff82bab0b8 r navi10_ih_funcs +ffffffff82bab0d8 r navi10_ih_self_irq_funcs +ffffffff82bac000 R nbio_v2_3_hdp_flush_reg +ffffffff82bac048 R nbio_v2_3_funcs +ffffffff82bad000 R nbio_v4_3_hdp_flush_reg +ffffffff82bad048 R nbio_v4_3_funcs +ffffffff82bad158 R nbio_v4_3_sriov_funcs +ffffffff82bad268 r nbio_v4_3_ras_err_event_athub_irq_funcs +ffffffff82bae000 R nbio_v6_1_hdp_flush_reg +ffffffff82bae048 R nbio_v6_1_funcs +ffffffff82baf000 R nbio_v7_0_hdp_flush_reg +ffffffff82baf048 R nbio_v7_0_funcs +ffffffff82bb0000 R nbio_v7_2_hdp_flush_reg +ffffffff82bb0048 R nbio_v7_2_funcs +ffffffff82bb1000 R nbio_v7_4_hdp_flush_reg +ffffffff82bb1048 R nbio_v7_4_ras_hw_ops +ffffffff82bb1088 R nbio_v7_4_funcs +ffffffff82bb1198 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82bb11a8 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82bb2000 R nbio_v7_7_hdp_flush_reg +ffffffff82bb2048 R nbio_v7_7_funcs +ffffffff82bb3000 R nbio_v7_9_hdp_flush_reg +ffffffff82bb3048 R nbio_v7_9_funcs +ffffffff82bb3158 R nbio_v7_9_ras_hw_ops +ffffffff82bb3198 r nbio_v7_9_ras_controller_irq_funcs +ffffffff82bb31a8 r nbio_v7_9_ras_err_event_athub_irq_funcs +ffffffff82bb4000 r nv_common_ip_funcs +ffffffff82bb40a0 R nv_common_ip_block +ffffffff82bb40b8 r nv_asic_funcs +ffffffff82bb4180 r nv_allowed_read_registers +ffffffff82bb4300 r sc_video_codecs_encode +ffffffff82bb4310 r sc_video_codecs_decode_vcn1 +ffffffff82bb4320 r sc_video_codecs_decode_vcn0 +ffffffff82bb4330 r yc_video_codecs_decode +ffffffff82bb4340 r bg_video_codecs_encode +ffffffff82bb4350 r bg_video_codecs_decode +ffffffff82bb4360 r nv_video_codecs_encode +ffffffff82bb4370 r nv_video_codecs_decode +ffffffff82bb4380 r sc_video_codecs_encode_array +ffffffff82bb43b0 r sc_video_codecs_decode_array_vcn1 +ffffffff82bb4440 r sc_video_codecs_decode_array_vcn0 +ffffffff82bb44e0 r yc_video_codecs_decode_array +ffffffff82bb4550 r bg_video_codecs_decode_array +ffffffff82bb4590 r nv_video_codecs_encode_array +ffffffff82bb45c0 r nv_video_codecs_decode_array +ffffffff82bb5000 r psp_v10_0_funcs +ffffffff82bb6000 r psp_v11_0_funcs +ffffffff82bb7000 r psp_v11_0_8_funcs +ffffffff82bb8000 r psp_v12_0_funcs +ffffffff82bb9000 r psp_v13_0_funcs +ffffffff82bba000 r psp_v13_0_4_funcs +ffffffff82bbb000 r psp_v3_1_funcs +ffffffff82bbc000 r sdma_v2_4_ip_funcs +ffffffff82bbc0a0 R sdma_v2_4_ip_block +ffffffff82bbc0b8 r sdma_v2_4_ring_funcs +ffffffff82bbc1f8 r sdma_v2_4_buffer_funcs +ffffffff82bbc218 r sdma_v2_4_vm_pte_funcs +ffffffff82bbc238 r sdma_v2_4_trap_irq_funcs +ffffffff82bbc248 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82bbc260 r iceland_mgcg_cgcg_init +ffffffff82bbc280 r golden_settings_iceland_a11 +ffffffff82bbd000 r sdma_v3_0_ip_funcs +ffffffff82bbd0a0 R sdma_v3_0_ip_block +ffffffff82bbd0b8 R sdma_v3_1_ip_block +ffffffff82bbd0d0 r sdma_v3_0_ring_funcs +ffffffff82bbd210 r sdma_v3_0_buffer_funcs +ffffffff82bbd230 r sdma_v3_0_vm_pte_funcs +ffffffff82bbd250 r sdma_v3_0_trap_irq_funcs +ffffffff82bbd260 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82bbd270 r fiji_mgcg_cgcg_init +ffffffff82bbd290 r golden_settings_fiji_a10 +ffffffff82bbd2f0 r tonga_mgcg_cgcg_init +ffffffff82bbd310 r golden_settings_tonga_a11 +ffffffff82bbd390 r golden_settings_polaris11_a11 +ffffffff82bbd410 r golden_settings_polaris10_a11 +ffffffff82bbd490 r cz_mgcg_cgcg_init +ffffffff82bbd4b0 r cz_golden_settings_a11 +ffffffff82bbd540 r stoney_mgcg_cgcg_init +ffffffff82bbd550 r stoney_golden_settings_a11 +ffffffff82bbe000 R sdma_v4_0_ip_funcs +ffffffff82bbe0a0 R sdma_v4_0_ras_hw_ops +ffffffff82bbe0e0 R sdma_v4_0_ip_block +ffffffff82bbe0f8 r sdma_v4_0_ring_funcs +ffffffff82bbe238 r sdma_v4_0_page_ring_funcs +ffffffff82bbe378 r sdma_v4_0_buffer_funcs +ffffffff82bbe398 r sdma_v4_0_vm_pte_funcs +ffffffff82bbe3b8 r sdma_v4_0_trap_irq_funcs +ffffffff82bbe3c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82bbe3d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82bbe3e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82bbe3f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82bbe408 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82bbe418 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82bbe430 r golden_settings_sdma_4 +ffffffff82bbe690 r golden_settings_sdma_vg10 +ffffffff82bbe740 r golden_settings_sdma_vg12 +ffffffff82bbe7f0 r golden_settings_sdma0_4_2_init +ffffffff82bbe810 r golden_settings_sdma0_4_2 +ffffffff82bbeaa0 r golden_settings_sdma1_4_2 +ffffffff82bbed30 r golden_settings_sdma_arct +ffffffff82bbf030 r golden_settings_sdma_aldebaran +ffffffff82bbf1a0 r golden_settings_sdma_4_1 +ffffffff82bbf2b0 r golden_settings_sdma_rv2 +ffffffff82bbf2e0 r golden_settings_sdma_rv1 +ffffffff82bbf310 r golden_settings_sdma_4_3 +ffffffff82bbf400 r sdma_v4_0_ras_fields +ffffffff82bc0000 R sdma_v4_4_ras_hw_ops +ffffffff82bc0040 r sdma_v4_4_ras_fields +ffffffff82bc1000 R sdma_v4_4_2_ip_funcs +ffffffff82bc10a0 R sdma_v4_4_2_ip_block +ffffffff82bc10b8 r sdma_v4_4_2_ring_funcs +ffffffff82bc11f8 r sdma_v4_4_2_page_ring_funcs +ffffffff82bc1338 r sdma_v4_4_2_buffer_funcs +ffffffff82bc1358 r sdma_v4_4_2_vm_pte_funcs +ffffffff82bc1378 r sdma_v4_4_2_trap_irq_funcs +ffffffff82bc1388 r sdma_v4_4_2_illegal_inst_irq_funcs +ffffffff82bc1398 r sdma_v4_4_2_ecc_irq_funcs +ffffffff82bc13a8 r sdma_v4_4_2_vm_hole_irq_funcs +ffffffff82bc13b8 r sdma_v4_4_2_doorbell_invalid_irq_funcs +ffffffff82bc13c8 r sdma_v4_4_2_pool_timeout_irq_funcs +ffffffff82bc13d8 r sdma_v4_4_2_srbm_write_irq_funcs +ffffffff82bc13e8 r sdma_v4_4_2_ras_hw_ops +ffffffff82bc1430 r sdma_v4_2_2_ue_reg_list +ffffffff82bc1460 r sdma_v4_4_2_ras_memory_list +ffffffff82bc2000 R sdma_v5_0_ip_funcs +ffffffff82bc20a0 R sdma_v5_0_ip_block +ffffffff82bc20b8 r sdma_v5_0_ring_funcs +ffffffff82bc21f8 r sdma_v5_0_buffer_funcs +ffffffff82bc2218 r sdma_v5_0_vm_pte_funcs +ffffffff82bc2238 r sdma_v5_0_trap_irq_funcs +ffffffff82bc2248 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82bc2260 r golden_settings_sdma_5 +ffffffff82bc24a0 r golden_settings_sdma_nv10 +ffffffff82bc24d0 r golden_settings_sdma_nv14 +ffffffff82bc2500 r golden_settings_sdma_5_sriov +ffffffff82bc26e0 r golden_settings_sdma_nv12 +ffffffff82bc2770 r golden_settings_sdma_cyan_skillfish +ffffffff82bc3000 R sdma_v5_2_ip_funcs +ffffffff82bc30a0 R sdma_v5_2_ip_block +ffffffff82bc30b8 r sdma_v5_2_ring_funcs +ffffffff82bc31f8 r sdma_v5_2_buffer_funcs +ffffffff82bc3218 r sdma_v5_2_vm_pte_funcs +ffffffff82bc3238 r sdma_v5_2_trap_irq_funcs +ffffffff82bc3248 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82bc4000 R sdma_v6_0_ip_funcs +ffffffff82bc40a0 R sdma_v6_0_ip_block +ffffffff82bc40b8 r sdma_v6_0_ring_funcs +ffffffff82bc41f8 r sdma_v6_0_buffer_funcs +ffffffff82bc4218 r sdma_v6_0_vm_pte_funcs +ffffffff82bc4238 r sdma_v6_0_trap_irq_funcs +ffffffff82bc4248 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82bc5000 r smu_v11_0_i2c_algo +ffffffff82bc5010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82bc5028 r smu_v11_0_i2c_control_quirks +ffffffff82bc6000 R smuio_v11_0_funcs +ffffffff82bc7000 R smuio_v11_0_6_funcs +ffffffff82bc8000 R smuio_v13_0_funcs +ffffffff82bc9000 R smuio_v13_0_3_funcs +ffffffff82bca000 R smuio_v13_0_6_funcs +ffffffff82bcb000 R smuio_v9_0_funcs +ffffffff82bcc000 r soc15_common_ip_funcs +ffffffff82bcc0a0 R vega10_common_ip_block +ffffffff82bcc0b8 r soc15_asic_funcs +ffffffff82bcc178 r vega20_asic_funcs +ffffffff82bcc238 r aqua_vanjaram_asic_funcs +ffffffff82bcc300 r soc15_allowed_read_registers +ffffffff82bcc490 r vega_video_codecs_encode +ffffffff82bcc4a0 r vega_video_codecs_decode +ffffffff82bcc4b0 r rv_video_codecs_decode +ffffffff82bcc4c0 r rn_video_codecs_decode +ffffffff82bcc4d0 r vcn_4_0_3_video_codecs_encode +ffffffff82bcc4e0 r vcn_4_0_3_video_codecs_decode +ffffffff82bcc4f0 r vega_video_codecs_encode_array +ffffffff82bcc520 r vega_video_codecs_decode_array +ffffffff82bcc5a0 r rv_video_codecs_decode_array +ffffffff82bcc630 r rn_video_codecs_decode_array +ffffffff82bcc6c0 r vcn_4_0_3_video_codecs_decode_array +ffffffff82bcd000 r soc21_common_ip_funcs +ffffffff82bcd0a0 R soc21_common_ip_block +ffffffff82bcd0b8 r soc21_asic_funcs +ffffffff82bcd180 r soc21_allowed_read_registers +ffffffff82bcd300 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82bcd310 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82bcd320 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82bcd330 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82bcd340 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82bcd370 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82bcd3c0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82bcd400 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82bce000 r tonga_ih_ip_funcs +ffffffff82bce0a0 R tonga_ih_ip_block +ffffffff82bce0b8 r tonga_ih_funcs +ffffffff82bcf000 R umc_v6_0_funcs +ffffffff82bd0000 R umc_v6_1_channel_idx_tbl +ffffffff82bd0080 R umc_v6_1_ras_hw_ops +ffffffff82bd1000 R umc_v6_7_channel_idx_tbl_second +ffffffff82bd1080 R umc_v6_7_channel_idx_tbl_first +ffffffff82bd1100 R umc_v6_7_ras_hw_ops +ffffffff82bd2000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82bd2040 R umc_v8_10_channel_idx_tbl_ext0 +ffffffff82bd2080 R umc_v8_10_channel_idx_tbl +ffffffff82bd20e0 R umc_v8_10_ras_hw_ops +ffffffff82bd3000 R umc_v8_7_channel_idx_tbl +ffffffff82bd3040 R umc_v8_7_ras_hw_ops +ffffffff82bd4000 r uvd_v5_0_ip_funcs +ffffffff82bd40a0 R uvd_v5_0_ip_block +ffffffff82bd40b8 r uvd_v5_0_ring_funcs +ffffffff82bd41f8 r uvd_v5_0_irq_funcs +ffffffff82bd5000 r uvd_v6_0_ip_funcs +ffffffff82bd50a0 R uvd_v6_0_ip_block +ffffffff82bd50b8 R uvd_v6_2_ip_block +ffffffff82bd50d0 R uvd_v6_3_ip_block +ffffffff82bd50e8 r uvd_v6_0_ring_vm_funcs +ffffffff82bd5228 r uvd_v6_0_ring_phys_funcs +ffffffff82bd5368 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82bd54a8 r uvd_v6_0_irq_funcs +ffffffff82bd6000 R uvd_v7_0_ip_funcs +ffffffff82bd60a0 R uvd_v7_0_ip_block +ffffffff82bd60b8 r uvd_v7_0_ring_vm_funcs +ffffffff82bd61f8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82bd6338 r uvd_v7_0_irq_funcs +ffffffff82bd7000 r vce_v3_0_ip_funcs +ffffffff82bd70a0 R vce_v3_0_ip_block +ffffffff82bd70b8 R vce_v3_1_ip_block +ffffffff82bd70d0 R vce_v3_4_ip_block +ffffffff82bd70e8 r vce_v3_0_ring_vm_funcs +ffffffff82bd7228 r vce_v3_0_ring_phys_funcs +ffffffff82bd7368 r vce_v3_0_irq_funcs +ffffffff82bd8000 R vce_v4_0_ip_funcs +ffffffff82bd80a0 R vce_v4_0_ip_block +ffffffff82bd80b8 r vce_v4_0_ring_vm_funcs +ffffffff82bd81f8 r vce_v4_0_irq_funcs +ffffffff82bd9000 r vcn_v1_0_ip_funcs +ffffffff82bd90a0 R vcn_v1_0_ip_block +ffffffff82bd90b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82bd91f8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82bd9338 r vcn_v1_0_irq_funcs +ffffffff82bda000 r vcn_v2_0_ip_funcs +ffffffff82bda0a0 R vcn_v2_0_ip_block +ffffffff82bda0b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82bda1f8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82bda338 r vcn_v2_0_irq_funcs +ffffffff82bdb000 r vcn_v2_5_ip_funcs +ffffffff82bdb0a0 R vcn_v2_5_ip_block +ffffffff82bdb0b8 r vcn_v2_6_ip_funcs +ffffffff82bdb158 R vcn_v2_6_ip_block +ffffffff82bdb170 R vcn_v2_6_ras_hw_ops +ffffffff82bdb1b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82bdb2f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82bdb430 r vcn_v2_5_irq_funcs +ffffffff82bdb440 r vcn_v2_6_ras_irq_funcs +ffffffff82bdc000 r vcn_v3_0_ip_funcs +ffffffff82bdc0a0 R vcn_v3_0_ip_block +ffffffff82bdc0b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82bdc1f8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82bdc338 r vcn_v3_0_irq_funcs +ffffffff82bdd000 r vcn_v4_0_ip_funcs +ffffffff82bdd0a0 R vcn_v4_0_ip_block +ffffffff82bdd0b8 R vcn_v4_0_ras_hw_ops +ffffffff82bdd0f8 r vcn_v4_0_irq_funcs +ffffffff82bdd108 r vcn_v4_0_ras_irq_funcs +ffffffff82bde000 r vcn_v4_0_3_ip_funcs +ffffffff82bde0a0 R vcn_v4_0_3_ip_block +ffffffff82bde0b8 r vcn_v4_0_3_unified_ring_vm_funcs +ffffffff82bde1f8 r vcn_v4_0_3_irq_funcs +ffffffff82bde208 r vcn_v4_0_3_ras_hw_ops +ffffffff82bde250 r vcn_v4_0_3_ue_reg_list +ffffffff82bdf000 R vega10_ih_ip_funcs +ffffffff82bdf0a0 R vega10_ih_ip_block +ffffffff82bdf0b8 r vega10_ih_funcs +ffffffff82bdf0d8 r vega10_ih_self_irq_funcs +ffffffff82be0000 r GC_BASE +ffffffff82be0064 r HDP_BASE +ffffffff82be00c8 r MMHUB_BASE +ffffffff82be012c r ATHUB_BASE +ffffffff82be0190 r NBIO_BASE +ffffffff82be01f4 r MP0_BASE +ffffffff82be0258 r MP1_BASE +ffffffff82be02bc r VCE_BASE +ffffffff82be0320 r VCN_BASE +ffffffff82be0384 r DF_BASE +ffffffff82be03e8 r DCE_BASE +ffffffff82be044c r OSSSYS_BASE +ffffffff82be04b0 r SDMA0_BASE +ffffffff82be0514 r SDMA1_BASE +ffffffff82be0578 r SMUIO_BASE +ffffffff82be05dc r PWR_BASE +ffffffff82be0640 r NBIF_BASE +ffffffff82be06a4 r THM_BASE +ffffffff82be0708 r CLK_BASE +ffffffff82be1000 R vega20_ih_ip_funcs +ffffffff82be10a0 R vega20_ih_ip_block +ffffffff82be10b8 r vega20_ih_funcs +ffffffff82be10d8 r vega20_ih_self_irq_funcs +ffffffff82be2000 r GC_BASE +ffffffff82be2090 r HDP_BASE +ffffffff82be2120 r MMHUB_BASE +ffffffff82be21b0 r ATHUB_BASE +ffffffff82be2240 r NBIO_BASE +ffffffff82be22d0 r MP0_BASE +ffffffff82be2360 r MP1_BASE +ffffffff82be23f0 r UVD_BASE +ffffffff82be2480 r VCE_BASE +ffffffff82be2510 r DF_BASE +ffffffff82be25a0 r DCE_BASE +ffffffff82be2630 r OSSSYS_BASE +ffffffff82be26c0 r SDMA0_BASE +ffffffff82be2750 r SDMA1_BASE +ffffffff82be27e0 r SMUIO_BASE +ffffffff82be2870 r THM_BASE +ffffffff82be2900 r CLK_BASE +ffffffff82be2990 r UMC_BASE +ffffffff82be2a20 r RSMU_BASE +ffffffff82be3000 r vi_common_ip_block +ffffffff82be3018 r vi_common_ip_funcs +ffffffff82be30b8 r vi_asic_funcs +ffffffff82be3180 r vi_allowed_read_registers +ffffffff82be33e0 r topaz_video_codecs_encode +ffffffff82be33f0 r topaz_video_codecs_decode +ffffffff82be3400 r tonga_video_codecs_encode +ffffffff82be3410 r tonga_video_codecs_decode +ffffffff82be3420 r polaris_video_codecs_encode +ffffffff82be3430 r cz_video_codecs_decode +ffffffff82be3440 r tonga_video_codecs_encode_array +ffffffff82be3460 r tonga_video_codecs_decode_array +ffffffff82be34b0 r polaris_video_codecs_encode_array +ffffffff82be34e0 r cz_video_codecs_decode_array +ffffffff82be3560 r iceland_mgcg_cgcg_init +ffffffff82be35a0 r fiji_mgcg_cgcg_init +ffffffff82be3600 r tonga_mgcg_cgcg_init +ffffffff82be3660 r cz_mgcg_cgcg_init +ffffffff82be36a0 r stoney_mgcg_cgcg_init +ffffffff82be4000 r amdgpu_dm_funcs +ffffffff82be40a0 R dm_ip_block +ffffffff82be40b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82be4120 r dm_display_funcs +ffffffff82be4180 r hpd_disconnect_quirk_table +ffffffff82be4ef0 r amdgpu_dm_mode_funcs +ffffffff82be4f38 r amdgpu_dm_audio_component_bind_ops +ffffffff82be4f48 r amdgpu_dm_audio_component_ops +ffffffff82be4f80 r amdgpu_dm_encoder_funcs +ffffffff82be4fa0 r amdgpu_dm_connector_funcs +ffffffff82be5018 r amdgpu_dm_connector_helper_funcs +ffffffff82be5078 r amdgpu_dm_i2c_algo +ffffffff82be5088 r amdgpu_dm_backlight_ops +ffffffff82be5260 r add_fs_modes.common_rates +ffffffff82be6000 r amdgpu_dm_crtc_funcs +ffffffff82be60c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82be7000 r dm_dtn_log_begin.msg +ffffffff82be700d r dm_dtn_log_end.msg +ffffffff82be7018 r SYNAPTICS_DEVICE_ID +ffffffff82be8000 r dm_crtc_irq_funcs +ffffffff82be8010 r dm_vline0_irq_funcs +ffffffff82be8020 r dm_dmub_outbox_irq_funcs +ffffffff82be8030 r dm_vupdate_irq_funcs +ffffffff82be8040 r dm_dmub_trace_irq_funcs +ffffffff82be8050 r dm_pageflip_irq_funcs +ffffffff82be8060 r dm_hpd_irq_funcs +ffffffff82be9000 r amdgpu_dm_encoder_funcs +ffffffff82be9020 r dm_mst_cbs +ffffffff82be9030 r dm_dp_mst_connector_funcs +ffffffff82be90a8 r dm_dp_mst_connector_helper_funcs +ffffffff82bea000 r dm_plane_funcs +ffffffff82bea068 r dm_plane_helper_funcs ffffffff82bec000 r vbios_funcs -ffffffff82bf1000 r command_table_helper_funcs +ffffffff82bed000 r vbios_funcs ffffffff82bf2000 r command_table_helper_funcs ffffffff82bf3000 r command_table_helper_funcs ffffffff82bf4000 r command_table_helper_funcs -ffffffff82bf5000 r dce80_max_clks_by_state -ffffffff82bf5028 r disp_clk_regs -ffffffff82bf507c r disp_clk_shift -ffffffff82bf5088 r disp_clk_mask -ffffffff82bf6000 r dce110_max_clks_by_state +ffffffff82bf5000 r command_table_helper_funcs +ffffffff82bf6000 r dce80_max_clks_by_state ffffffff82bf6028 r disp_clk_regs ffffffff82bf607c r disp_clk_shift ffffffff82bf6088 r disp_clk_mask -ffffffff82bf7000 r dce112_max_clks_by_state +ffffffff82bf7000 r dce110_max_clks_by_state ffffffff82bf7028 r disp_clk_regs ffffffff82bf707c r disp_clk_shift ffffffff82bf7088 r disp_clk_mask -ffffffff82bf8000 r dce120_max_clks_by_state -ffffffff82bf9000 r clk_mgr_regs -ffffffff82bf9054 r clk_mgr_shift -ffffffff82bf9060 r clk_mgr_mask +ffffffff82bf8000 r dce112_max_clks_by_state +ffffffff82bf8028 r disp_clk_regs +ffffffff82bf807c r disp_clk_shift +ffffffff82bf8088 r disp_clk_mask +ffffffff82bf9000 r dce120_max_clks_by_state ffffffff82bfa000 r clk_mgr_regs ffffffff82bfa054 r clk_mgr_shift ffffffff82bfa060 r clk_mgr_mask ffffffff82bfb000 r clk_mgr_regs ffffffff82bfb054 r clk_mgr_shift ffffffff82bfb060 r clk_mgr_mask -ffffffff82bfc000 r lpddr5_wm_table -ffffffff82bfc0c0 r ddr5_wm_table +ffffffff82bfc000 r clk_mgr_regs +ffffffff82bfc054 r clk_mgr_shift +ffffffff82bfc060 r clk_mgr_mask ffffffff82bfd000 r lpddr5_wm_table ffffffff82bfd0c0 r ddr5_wm_table -ffffffff82bfe000 r ddr5_wm_table -ffffffff82bff000 r lpddr5_wm_table -ffffffff82bff0c0 r ddr4_wm_table -ffffffff82c00000 r clk_mgr_regs_dcn321 -ffffffff82c00054 r clk_mgr_shift_dcn321 -ffffffff82c00060 r clk_mgr_mask_dcn321 -ffffffff82c00084 r clk_mgr_regs_dcn32 -ffffffff82c000d8 r clk_mgr_shift_dcn32 -ffffffff82c000e4 r clk_mgr_mask_dcn32 -ffffffff82c01000 r DC_BUILD_ID -ffffffff82c03000 r output_csc_matrix -ffffffff82c030e0 r black_color_format -ffffffff82c06000 r dce_funcs -ffffffff82c07000 r funcs -ffffffff82c08000 R video_optimized_pixel_rates -ffffffff82c081c0 r dce110_clk_src_funcs -ffffffff82c081e8 r dce112_clk_src_funcs -ffffffff82c08210 r dcn20_clk_src_funcs -ffffffff82c08238 r dcn3_clk_src_funcs -ffffffff82c08260 r dcn31_clk_src_funcs -ffffffff82c09000 r dce_funcs -ffffffff82c09068 r dcn10_funcs -ffffffff82c090d0 r dcn20_funcs -ffffffff82c09138 r dcn21_funcs -ffffffff82c0a000 r dce_ipp_funcs -ffffffff82c0b000 r dce110_lnk_enc_funcs -ffffffff82c0c000 r dce_mi_funcs -ffffffff82c0c090 r dce112_mi_funcs -ffffffff82c0c120 r dce120_mi_funcs -ffffffff82c0c1b0 r pte_settings -ffffffff82c0d000 r funcs -ffffffff82c0e000 r dce_link_panel_cntl_funcs -ffffffff82c0f000 r filter_3tap_16p_upscale -ffffffff82c0f040 r filter_3tap_16p_116 -ffffffff82c0f080 r filter_3tap_16p_149 -ffffffff82c0f0c0 r filter_3tap_16p_183 -ffffffff82c0f100 r filter_3tap_64p_upscale -ffffffff82c0f1d0 r filter_3tap_64p_116 -ffffffff82c0f2a0 r filter_3tap_64p_149 -ffffffff82c0f370 r filter_3tap_64p_183 -ffffffff82c0f440 r filter_4tap_16p_upscale -ffffffff82c0f490 r filter_4tap_16p_116 -ffffffff82c0f4e0 r filter_4tap_16p_149 -ffffffff82c0f530 r filter_4tap_16p_183 -ffffffff82c0f580 r filter_4tap_64p_upscale -ffffffff82c0f690 r filter_4tap_64p_116 -ffffffff82c0f7a0 r filter_4tap_64p_149 -ffffffff82c0f8b0 r filter_4tap_64p_183 -ffffffff82c0f9c0 r filter_5tap_64p_upscale -ffffffff82c0fb10 r filter_5tap_64p_116 -ffffffff82c0fc60 r filter_5tap_64p_149 -ffffffff82c0fdb0 r filter_5tap_64p_183 -ffffffff82c0ff00 r filter_6tap_64p_upscale -ffffffff82c10090 r filter_6tap_64p_116 -ffffffff82c10220 r filter_6tap_64p_149 -ffffffff82c103b0 r filter_6tap_64p_183 -ffffffff82c10540 r filter_7tap_64p_upscale -ffffffff82c10710 r filter_7tap_64p_116 -ffffffff82c108e0 r filter_7tap_64p_149 -ffffffff82c10ab0 r filter_7tap_64p_183 -ffffffff82c10c80 r filter_8tap_64p_upscale -ffffffff82c10e90 r filter_8tap_64p_116 -ffffffff82c110a0 r filter_8tap_64p_149 -ffffffff82c112b0 r filter_8tap_64p_183 -ffffffff82c114c0 r filter_2tap_16p -ffffffff82c114f0 r filter_2tap_64p -ffffffff82c12000 r dce110_str_enc_funcs -ffffffff82c12120 r audio_clock_info_table_48bpc -ffffffff82c122b0 r audio_clock_info_table_36bpc -ffffffff82c12440 r audio_clock_info_table -ffffffff82c13000 r global_color_matrix -ffffffff82c130a8 r dce_transform_funcs -ffffffff82c14000 r abm_funcs -ffffffff82c15000 r psr_funcs -ffffffff82c15040 r DP_SINK_DEVICE_STR_ID_1 -ffffffff82c15045 r DP_SINK_DEVICE_STR_ID_2 -ffffffff82c16000 r replay_funcs -ffffffff82c17000 r reg_offsets -ffffffff82c18000 r bios_regs -ffffffff82c18008 r res_cap -ffffffff82c18048 r dce100_res_pool_funcs -ffffffff82c18140 r clk_src_regs -ffffffff82c1823c r dmcu_regs -ffffffff82c18298 r dmcu_shift -ffffffff82c182ac r dmcu_mask -ffffffff82c182f8 r abm_regs -ffffffff82c18360 r abm_shift -ffffffff82c18384 r abm_mask -ffffffff82c18410 r debug_defaults -ffffffff82c185c0 r dce100_tg_offsets -ffffffff82c18608 r plane_cap -ffffffff82c18638 r res_create_funcs -ffffffff82c18670 r panel_cntl_regs -ffffffff82c18690 r panel_cntl_shift -ffffffff82c186a0 r panel_cntl_mask -ffffffff82c186e0 r link_enc_regs -ffffffff82c18aa0 r link_enc_aux_regs -ffffffff82c18af0 r link_enc_hpd_regs -ffffffff82c18b08 r link_enc_feature -ffffffff82c18b18 r cs_shift -ffffffff82c18b24 r cs_mask -ffffffff82c18b50 r mi_regs -ffffffff82c18e68 r mi_shifts -ffffffff82c18eb0 r mi_masks -ffffffff82c18fd0 r ipp_regs -ffffffff82c191c8 r ipp_shift -ffffffff82c191f0 r ipp_mask -ffffffff82c19290 r xfm_regs -ffffffff82c19830 r xfm_shift -ffffffff82c19890 r xfm_mask -ffffffff82c19a10 r opp_regs -ffffffff82c19b60 r opp_shift -ffffffff82c19b8c r opp_mask -ffffffff82c19c40 r aux_engine_regs -ffffffff82c19d30 r aux_mask -ffffffff82c19d90 r aux_shift -ffffffff82c19db0 r i2c_hw_regs -ffffffff82c19f00 r i2c_shifts -ffffffff82c19f2c r i2c_masks -ffffffff82c19fd0 r audio_regs -ffffffff82c1a104 r audio_shift -ffffffff82c1a11c r audio_mask -ffffffff82c1a160 r stream_enc_regs -ffffffff82c1a80c r se_shift -ffffffff82c1a890 r se_mask -ffffffff82c1aa94 r hwseq_reg -ffffffff82c1acb0 r hwseq_shift -ffffffff82c1ad30 r hwseq_mask -ffffffff82c1b000 r reg_offsets -ffffffff82c1b018 r dce110_compressor_funcs -ffffffff82c1c000 r dce110_funcs -ffffffff82c1c2e8 r dce110_private_funcs -ffffffff82c1d000 r dce110_mem_input_v_funcs -ffffffff82c1d090 r dvmm_Hw_Setting_1DTiling -ffffffff82c1d120 r dvmm_Hw_Setting_2DTiling -ffffffff82c1d1b0 r dvmm_Hw_Setting_Linear -ffffffff82c1e000 r global_color_matrix -ffffffff82c1e0b0 r input_csc_matrix -ffffffff82c1f000 r funcs -ffffffff82c20000 r bios_regs -ffffffff82c20008 r dce110_res_pool_funcs -ffffffff82c20100 r debug_defaults -ffffffff82c202b0 r clk_src_regs -ffffffff82c203ac r dmcu_regs -ffffffff82c20408 r dmcu_shift -ffffffff82c2041c r dmcu_mask -ffffffff82c20468 r abm_regs -ffffffff82c204d0 r abm_shift -ffffffff82c204f4 r abm_mask -ffffffff82c20580 r dce110_tg_offsets -ffffffff82c205c8 r res_create_funcs -ffffffff82c205f8 r plane_cap -ffffffff82c20624 r underlay_plane_cap -ffffffff82c20650 r stoney_resource_cap -ffffffff82c2068c r carrizo_resource_cap -ffffffff82c206d0 r panel_cntl_regs -ffffffff82c206f0 r panel_cntl_shift -ffffffff82c20700 r panel_cntl_mask -ffffffff82c20740 r link_enc_regs -ffffffff82c20b00 r link_enc_aux_regs -ffffffff82c20b50 r link_enc_hpd_regs -ffffffff82c20b68 r link_enc_feature -ffffffff82c20b78 r cs_shift -ffffffff82c20b84 r cs_mask -ffffffff82c20bb0 r mi_regs -ffffffff82c20d3c r mi_shifts -ffffffff82c20d84 r mi_masks -ffffffff82c20ea0 r ipp_regs -ffffffff82c20f9c r ipp_shift -ffffffff82c20fc4 r ipp_mask -ffffffff82c21060 r xfm_regs -ffffffff82c21330 r xfm_shift -ffffffff82c21390 r xfm_mask -ffffffff82c21510 r opp_regs -ffffffff82c21660 r opp_shift -ffffffff82c2168c r opp_mask -ffffffff82c21740 r aux_engine_regs -ffffffff82c21830 r aux_mask -ffffffff82c21890 r aux_shift -ffffffff82c218b0 r i2c_hw_regs -ffffffff82c21a00 r i2c_shifts -ffffffff82c21a2c r i2c_masks -ffffffff82c21ad0 r audio_regs -ffffffff82c21c04 r audio_shift -ffffffff82c21c1c r audio_mask -ffffffff82c21c60 r stream_enc_regs -ffffffff82c21f3c r se_shift -ffffffff82c21fc0 r se_mask -ffffffff82c221c4 r hwseq_stoney_reg -ffffffff82c223e0 r hwseq_cz_reg -ffffffff82c225fc r hwseq_shift -ffffffff82c2267c r hwseq_mask -ffffffff82c23000 r dce110_tg_funcs -ffffffff82c24000 r dce110_tg_v_funcs -ffffffff82c25000 r dce110_xfmv_funcs -ffffffff82c26000 r reg_offsets +ffffffff82bfe000 r lpddr5_wm_table +ffffffff82bfe0c0 r ddr5_wm_table +ffffffff82bff000 r ddr5_wm_table +ffffffff82c00000 r lpddr5_wm_table +ffffffff82c000c0 r ddr4_wm_table +ffffffff82c01000 r clk_mgr_regs_dcn321 +ffffffff82c01054 r clk_mgr_shift_dcn321 +ffffffff82c01060 r clk_mgr_mask_dcn321 +ffffffff82c01084 r clk_mgr_regs_dcn32 +ffffffff82c010d8 r clk_mgr_shift_dcn32 +ffffffff82c010e4 r clk_mgr_mask_dcn32 +ffffffff82c02000 r DC_BUILD_ID +ffffffff82c04000 r output_csc_matrix +ffffffff82c040e0 r black_color_format +ffffffff82c07000 r dce_funcs +ffffffff82c08000 r funcs +ffffffff82c09000 R video_optimized_pixel_rates +ffffffff82c091c0 r dce110_clk_src_funcs +ffffffff82c091e8 r dce112_clk_src_funcs +ffffffff82c09210 r dcn20_clk_src_funcs +ffffffff82c09238 r dcn3_clk_src_funcs +ffffffff82c09260 r dcn31_clk_src_funcs +ffffffff82c0a000 r dce_funcs +ffffffff82c0a068 r dcn10_funcs +ffffffff82c0a0d0 r dcn20_funcs +ffffffff82c0a138 r dcn21_funcs +ffffffff82c0b000 r dce_ipp_funcs +ffffffff82c0c000 r dce110_lnk_enc_funcs +ffffffff82c0d000 r dce_mi_funcs +ffffffff82c0d090 r dce112_mi_funcs +ffffffff82c0d120 r dce120_mi_funcs +ffffffff82c0d1b0 r pte_settings +ffffffff82c0e000 r funcs +ffffffff82c0f000 r dce_link_panel_cntl_funcs +ffffffff82c10000 r filter_3tap_16p_upscale +ffffffff82c10040 r filter_3tap_16p_116 +ffffffff82c10080 r filter_3tap_16p_149 +ffffffff82c100c0 r filter_3tap_16p_183 +ffffffff82c10100 r filter_3tap_64p_upscale +ffffffff82c101d0 r filter_3tap_64p_116 +ffffffff82c102a0 r filter_3tap_64p_149 +ffffffff82c10370 r filter_3tap_64p_183 +ffffffff82c10440 r filter_4tap_16p_upscale +ffffffff82c10490 r filter_4tap_16p_116 +ffffffff82c104e0 r filter_4tap_16p_149 +ffffffff82c10530 r filter_4tap_16p_183 +ffffffff82c10580 r filter_4tap_64p_upscale +ffffffff82c10690 r filter_4tap_64p_116 +ffffffff82c107a0 r filter_4tap_64p_149 +ffffffff82c108b0 r filter_4tap_64p_183 +ffffffff82c109c0 r filter_5tap_64p_upscale +ffffffff82c10b10 r filter_5tap_64p_116 +ffffffff82c10c60 r filter_5tap_64p_149 +ffffffff82c10db0 r filter_5tap_64p_183 +ffffffff82c10f00 r filter_6tap_64p_upscale +ffffffff82c11090 r filter_6tap_64p_116 +ffffffff82c11220 r filter_6tap_64p_149 +ffffffff82c113b0 r filter_6tap_64p_183 +ffffffff82c11540 r filter_7tap_64p_upscale +ffffffff82c11710 r filter_7tap_64p_116 +ffffffff82c118e0 r filter_7tap_64p_149 +ffffffff82c11ab0 r filter_7tap_64p_183 +ffffffff82c11c80 r filter_8tap_64p_upscale +ffffffff82c11e90 r filter_8tap_64p_116 +ffffffff82c120a0 r filter_8tap_64p_149 +ffffffff82c122b0 r filter_8tap_64p_183 +ffffffff82c124c0 r filter_2tap_16p +ffffffff82c124f0 r filter_2tap_64p +ffffffff82c13000 r dce110_str_enc_funcs +ffffffff82c13120 r audio_clock_info_table_48bpc +ffffffff82c132b0 r audio_clock_info_table_36bpc +ffffffff82c13440 r audio_clock_info_table +ffffffff82c14000 r global_color_matrix +ffffffff82c140a8 r dce_transform_funcs +ffffffff82c15000 r abm_funcs +ffffffff82c16000 r psr_funcs +ffffffff82c16040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82c16045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82c17000 r replay_funcs +ffffffff82c18000 r reg_offsets +ffffffff82c19000 r bios_regs +ffffffff82c19008 r res_cap +ffffffff82c19048 r dce100_res_pool_funcs +ffffffff82c19140 r clk_src_regs +ffffffff82c1923c r dmcu_regs +ffffffff82c19298 r dmcu_shift +ffffffff82c192ac r dmcu_mask +ffffffff82c192f8 r abm_regs +ffffffff82c19360 r abm_shift +ffffffff82c19384 r abm_mask +ffffffff82c19410 r debug_defaults +ffffffff82c195c0 r dce100_tg_offsets +ffffffff82c19608 r plane_cap +ffffffff82c19638 r res_create_funcs +ffffffff82c19670 r panel_cntl_regs +ffffffff82c19690 r panel_cntl_shift +ffffffff82c196a0 r panel_cntl_mask +ffffffff82c196e0 r link_enc_regs +ffffffff82c19aa0 r link_enc_aux_regs +ffffffff82c19af0 r link_enc_hpd_regs +ffffffff82c19b08 r link_enc_feature +ffffffff82c19b18 r cs_shift +ffffffff82c19b24 r cs_mask +ffffffff82c19b50 r mi_regs +ffffffff82c19e68 r mi_shifts +ffffffff82c19eb0 r mi_masks +ffffffff82c19fd0 r ipp_regs +ffffffff82c1a1c8 r ipp_shift +ffffffff82c1a1f0 r ipp_mask +ffffffff82c1a290 r xfm_regs +ffffffff82c1a830 r xfm_shift +ffffffff82c1a890 r xfm_mask +ffffffff82c1aa10 r opp_regs +ffffffff82c1ab60 r opp_shift +ffffffff82c1ab8c r opp_mask +ffffffff82c1ac40 r aux_engine_regs +ffffffff82c1ad30 r aux_mask +ffffffff82c1ad90 r aux_shift +ffffffff82c1adb0 r i2c_hw_regs +ffffffff82c1af00 r i2c_shifts +ffffffff82c1af2c r i2c_masks +ffffffff82c1afd0 r audio_regs +ffffffff82c1b104 r audio_shift +ffffffff82c1b11c r audio_mask +ffffffff82c1b160 r stream_enc_regs +ffffffff82c1b80c r se_shift +ffffffff82c1b890 r se_mask +ffffffff82c1ba94 r hwseq_reg +ffffffff82c1bcb0 r hwseq_shift +ffffffff82c1bd30 r hwseq_mask +ffffffff82c1c000 r reg_offsets +ffffffff82c1c018 r dce110_compressor_funcs +ffffffff82c1d000 r dce110_funcs +ffffffff82c1d2e8 r dce110_private_funcs +ffffffff82c1e000 r dce110_mem_input_v_funcs +ffffffff82c1e090 r dvmm_Hw_Setting_1DTiling +ffffffff82c1e120 r dvmm_Hw_Setting_2DTiling +ffffffff82c1e1b0 r dvmm_Hw_Setting_Linear +ffffffff82c1f000 r global_color_matrix +ffffffff82c1f0b0 r input_csc_matrix +ffffffff82c20000 r funcs +ffffffff82c21000 r bios_regs +ffffffff82c21008 r dce110_res_pool_funcs +ffffffff82c21100 r debug_defaults +ffffffff82c212b0 r clk_src_regs +ffffffff82c213ac r dmcu_regs +ffffffff82c21408 r dmcu_shift +ffffffff82c2141c r dmcu_mask +ffffffff82c21468 r abm_regs +ffffffff82c214d0 r abm_shift +ffffffff82c214f4 r abm_mask +ffffffff82c21580 r dce110_tg_offsets +ffffffff82c215c8 r res_create_funcs +ffffffff82c215f8 r plane_cap +ffffffff82c21624 r underlay_plane_cap +ffffffff82c21650 r stoney_resource_cap +ffffffff82c2168c r carrizo_resource_cap +ffffffff82c216d0 r panel_cntl_regs +ffffffff82c216f0 r panel_cntl_shift +ffffffff82c21700 r panel_cntl_mask +ffffffff82c21740 r link_enc_regs +ffffffff82c21b00 r link_enc_aux_regs +ffffffff82c21b50 r link_enc_hpd_regs +ffffffff82c21b68 r link_enc_feature +ffffffff82c21b78 r cs_shift +ffffffff82c21b84 r cs_mask +ffffffff82c21bb0 r mi_regs +ffffffff82c21d3c r mi_shifts +ffffffff82c21d84 r mi_masks +ffffffff82c21ea0 r ipp_regs +ffffffff82c21f9c r ipp_shift +ffffffff82c21fc4 r ipp_mask +ffffffff82c22060 r xfm_regs +ffffffff82c22330 r xfm_shift +ffffffff82c22390 r xfm_mask +ffffffff82c22510 r opp_regs +ffffffff82c22660 r opp_shift +ffffffff82c2268c r opp_mask +ffffffff82c22740 r aux_engine_regs +ffffffff82c22830 r aux_mask +ffffffff82c22890 r aux_shift +ffffffff82c228b0 r i2c_hw_regs +ffffffff82c22a00 r i2c_shifts +ffffffff82c22a2c r i2c_masks +ffffffff82c22ad0 r audio_regs +ffffffff82c22c04 r audio_shift +ffffffff82c22c1c r audio_mask +ffffffff82c22c60 r stream_enc_regs +ffffffff82c22f3c r se_shift +ffffffff82c22fc0 r se_mask +ffffffff82c231c4 r hwseq_stoney_reg +ffffffff82c233e0 r hwseq_cz_reg +ffffffff82c235fc r hwseq_shift +ffffffff82c2367c r hwseq_mask +ffffffff82c24000 r dce110_tg_funcs +ffffffff82c25000 r dce110_tg_v_funcs +ffffffff82c26000 r dce110_xfmv_funcs ffffffff82c27000 r reg_offsets -ffffffff82c28000 r bios_regs -ffffffff82c28008 r dce112_res_pool_funcs -ffffffff82c28100 r debug_defaults -ffffffff82c282b0 r clk_src_regs -ffffffff82c284a8 r dmcu_regs -ffffffff82c28504 r dmcu_shift -ffffffff82c28518 r dmcu_mask -ffffffff82c28564 r abm_regs -ffffffff82c285cc r abm_shift -ffffffff82c285f0 r abm_mask -ffffffff82c28680 r dce112_tg_offsets -ffffffff82c286c8 r res_create_funcs -ffffffff82c286f8 r plane_cap -ffffffff82c28724 r polaris_11_resource_cap -ffffffff82c28760 r polaris_10_resource_cap -ffffffff82c287a0 r panel_cntl_regs -ffffffff82c287c0 r panel_cntl_shift -ffffffff82c287d0 r panel_cntl_mask -ffffffff82c28810 r link_enc_regs -ffffffff82c28bd0 r link_enc_aux_regs -ffffffff82c28c20 r link_enc_hpd_regs -ffffffff82c28c38 r link_enc_feature -ffffffff82c28c48 r cs_shift -ffffffff82c28c54 r cs_mask -ffffffff82c28c80 r mi_regs -ffffffff82c28f98 r mi_shifts -ffffffff82c28fe0 r mi_masks -ffffffff82c29100 r ipp_regs -ffffffff82c292f8 r ipp_shift -ffffffff82c29320 r ipp_mask -ffffffff82c293c0 r xfm_regs -ffffffff82c29960 r xfm_shift -ffffffff82c299c0 r xfm_mask -ffffffff82c29b40 r opp_regs -ffffffff82c29c90 r opp_shift -ffffffff82c29cbc r opp_mask -ffffffff82c29d70 r aux_engine_regs -ffffffff82c29e60 r aux_mask -ffffffff82c29ec0 r aux_shift -ffffffff82c29ee0 r i2c_hw_regs -ffffffff82c2a030 r i2c_shifts -ffffffff82c2a05c r i2c_masks -ffffffff82c2a100 r audio_regs -ffffffff82c2a208 r audio_shift -ffffffff82c2a220 r audio_mask -ffffffff82c2a260 r stream_enc_regs -ffffffff82c2a818 r se_shift -ffffffff82c2a89c r se_mask -ffffffff82c2aaa0 r hwseq_reg -ffffffff82c2acbc r hwseq_shift -ffffffff82c2ad3c r hwseq_mask -ffffffff82c2b000 r bios_regs -ffffffff82c2b008 r res_cap -ffffffff82c2b048 r dce120_res_pool_funcs -ffffffff82c2b140 r debug_defaults -ffffffff82c2b2f0 r clk_src_regs -ffffffff82c2b4e8 r dmcu_regs -ffffffff82c2b544 r dmcu_shift -ffffffff82c2b558 r dmcu_mask -ffffffff82c2b5a4 r abm_regs -ffffffff82c2b60c r abm_shift -ffffffff82c2b630 r abm_mask -ffffffff82c2b6c0 r dce120_tg_offsets -ffffffff82c2b708 r dce121_res_create_funcs -ffffffff82c2b738 r res_create_funcs -ffffffff82c2b768 r plane_cap -ffffffff82c2b7a0 r panel_cntl_regs -ffffffff82c2b7c0 r panel_cntl_shift -ffffffff82c2b7d0 r panel_cntl_mask -ffffffff82c2b810 r link_enc_regs -ffffffff82c2bbd0 r link_enc_aux_regs -ffffffff82c2bc20 r link_enc_hpd_regs -ffffffff82c2bc38 r link_enc_feature -ffffffff82c2bc48 r cs_shift -ffffffff82c2bc54 r cs_mask -ffffffff82c2bc80 r mi_regs -ffffffff82c2bf98 r mi_shifts -ffffffff82c2bfe0 r mi_masks -ffffffff82c2c100 r ipp_regs -ffffffff82c2c2f8 r ipp_shift -ffffffff82c2c320 r ipp_mask -ffffffff82c2c3c0 r xfm_regs -ffffffff82c2c960 r xfm_shift -ffffffff82c2c9c0 r xfm_mask -ffffffff82c2cb40 r opp_regs -ffffffff82c2cc90 r opp_shift -ffffffff82c2ccbc r opp_mask -ffffffff82c2cd70 r aux_engine_regs -ffffffff82c2ce60 r aux_mask -ffffffff82c2cec0 r aux_shift -ffffffff82c2cee0 r i2c_hw_regs -ffffffff82c2d030 r i2c_shifts -ffffffff82c2d05c r i2c_masks -ffffffff82c2d100 r audio_regs -ffffffff82c2d234 r audio_shift -ffffffff82c2d24c r audio_mask -ffffffff82c2d290 r stream_enc_regs -ffffffff82c2d848 r se_shift -ffffffff82c2d8cc r se_mask -ffffffff82c2dad0 r dce121_hwseq_reg -ffffffff82c2dcec r dce121_hwseq_shift -ffffffff82c2dd6c r dce121_hwseq_mask -ffffffff82c2df60 r hwseq_reg -ffffffff82c2e17c r hwseq_shift -ffffffff82c2e1fc r hwseq_mask -ffffffff82c2f000 r dce120_tg_funcs -ffffffff82c30000 r bios_regs -ffffffff82c30008 r res_cap -ffffffff82c30048 r dce80_res_pool_funcs -ffffffff82c30140 r debug_defaults -ffffffff82c302f0 r clk_src_regs -ffffffff82c303ec r dmcu_regs -ffffffff82c30448 r dmcu_shift -ffffffff82c3045c r dmcu_mask -ffffffff82c304a8 r abm_regs -ffffffff82c30510 r abm_shift -ffffffff82c30534 r abm_mask -ffffffff82c305c0 r dce80_tg_offsets -ffffffff82c30608 r plane_cap -ffffffff82c30638 r res_create_funcs -ffffffff82c30670 r panel_cntl_regs -ffffffff82c30690 r panel_cntl_shift -ffffffff82c306a0 r panel_cntl_mask -ffffffff82c306e0 r link_enc_regs -ffffffff82c30aa0 r link_enc_aux_regs -ffffffff82c30af0 r link_enc_hpd_regs -ffffffff82c30b08 r link_enc_feature -ffffffff82c30b18 r cs_shift -ffffffff82c30b24 r cs_mask -ffffffff82c30b50 r mi_regs -ffffffff82c30e68 r mi_shifts -ffffffff82c30eb0 r mi_masks -ffffffff82c30fd0 r ipp_regs -ffffffff82c311c8 r ipp_shift -ffffffff82c311f0 r ipp_mask -ffffffff82c31290 r xfm_regs -ffffffff82c31830 r xfm_shift -ffffffff82c31890 r xfm_mask -ffffffff82c31a10 r opp_regs -ffffffff82c31b60 r opp_shift -ffffffff82c31b8c r opp_mask -ffffffff82c31c40 r aux_engine_regs -ffffffff82c31d30 r aux_mask -ffffffff82c31d90 r aux_shift -ffffffff82c31db0 r i2c_hw_regs -ffffffff82c31f00 r i2c_shifts -ffffffff82c31f2c r i2c_masks -ffffffff82c31fd0 r audio_regs -ffffffff82c32104 r audio_shift -ffffffff82c3211c r audio_mask -ffffffff82c32160 r stream_enc_regs -ffffffff82c3280c r se_shift -ffffffff82c32890 r se_mask -ffffffff82c32a94 r hwseq_reg -ffffffff82c32cb0 r hwseq_shift -ffffffff82c32d30 r hwseq_mask -ffffffff82c32f24 r res_cap_81 -ffffffff82c32f60 r res_cap_83 -ffffffff82c33000 r reg_offsets -ffffffff82c33048 r dce80_tg_funcs -ffffffff82c34000 r dcn10_dpp_funcs -ffffffff82c35000 r dpp_input_csc_matrix -ffffffff82c37000 R dcn10_dwbc_funcs -ffffffff82c38000 r hubbub1_funcs -ffffffff82c39000 r dcn10_hubp_funcs -ffffffff82c3a000 r reduceSizeAndFraction.prime_numbers -ffffffff82c3c000 r dcn10_funcs -ffffffff82c3c2e8 r dcn10_private_funcs -ffffffff82c3d000 r dcn10_ipp_funcs -ffffffff82c3d048 r dcn20_ipp_funcs -ffffffff82c3e000 r dcn10_lnk_enc_funcs -ffffffff82c3f000 r dcn10_mpc_funcs -ffffffff82c40000 r dcn10_opp_funcs -ffffffff82c41000 r dcn10_tg_funcs -ffffffff82c42000 r bios_regs -ffffffff82c42008 r rv2_res_cap -ffffffff82c42044 r res_cap -ffffffff82c42080 r dcn10_res_pool_funcs -ffffffff82c42178 r debug_defaults_drv -ffffffff82c42320 r debug_defaults_diags -ffffffff82c424d0 r clk_src_regs -ffffffff82c42620 r dmcu_regs -ffffffff82c4267c r dmcu_shift -ffffffff82c42690 r dmcu_mask -ffffffff82c426dc r abm_regs -ffffffff82c42744 r abm_shift -ffffffff82c42768 r abm_mask -ffffffff82c427f8 r res_create_funcs -ffffffff82c42828 r plane_cap -ffffffff82c42860 r panel_cntl_regs -ffffffff82c42880 r panel_cntl_shift -ffffffff82c42890 r panel_cntl_mask -ffffffff82c428d0 r link_enc_regs -ffffffff82c42de0 r link_enc_aux_regs -ffffffff82c42e20 r link_enc_hpd_regs -ffffffff82c42e30 r le_shift -ffffffff82c42f20 r le_mask -ffffffff82c432d8 r link_enc_feature -ffffffff82c432e8 r cs_shift -ffffffff82c432f4 r cs_mask -ffffffff82c43320 r hubp_regs -ffffffff82c439d0 r hubp_shift -ffffffff82c43a94 r hubp_mask -ffffffff82c43da0 r ipp_regs -ffffffff82c43e80 r ipp_shift -ffffffff82c43e9c r ipp_mask -ffffffff82c43f10 r tf_regs -ffffffff82c44e80 r tf_shift -ffffffff82c450e8 r tf_mask -ffffffff82c45a80 r opp_regs -ffffffff82c45b50 r opp_shift -ffffffff82c45b70 r opp_mask -ffffffff82c45bf0 r tg_regs -ffffffff82c46190 r tg_shift -ffffffff82c46264 r tg_mask -ffffffff82c465b0 r aux_engine_regs -ffffffff82c466a0 r aux_mask -ffffffff82c46700 r aux_shift -ffffffff82c46720 r i2c_hw_regs -ffffffff82c46870 r i2c_shifts -ffffffff82c4689c r i2c_masks -ffffffff82c46940 r mpc_regs -ffffffff82c46a60 r mpc_shift -ffffffff82c46a78 r mpc_mask -ffffffff82c46ad4 r hubbub_reg -ffffffff82c46c5c r hubbub_shift -ffffffff82c46cec r hubbub_mask -ffffffff82c46f30 r audio_regs -ffffffff82c46fe0 r audio_shift -ffffffff82c46ff8 r audio_mask -ffffffff82c47040 r stream_enc_regs -ffffffff82c47590 r se_shift -ffffffff82c4766c r se_mask -ffffffff82c479d8 r hwseq_reg -ffffffff82c47bf4 r hwseq_shift -ffffffff82c47c74 r hwseq_mask -ffffffff82c48000 r audio_clock_info_table_48bpc -ffffffff82c48190 r audio_clock_info_table_36bpc -ffffffff82c48320 r audio_clock_info_table -ffffffff82c484e0 r dcn10_str_enc_funcs -ffffffff82c49000 r dccg2_funcs -ffffffff82c4b000 r dpp_input_csc_matrix -ffffffff82c4c000 r dcn20_dsc_funcs -ffffffff82c4d000 r dcn20_dwbc_funcs -ffffffff82c4e000 r filter_12tap_16p_upscale -ffffffff82c4e0e0 r filter_12tap_16p_117 -ffffffff82c4e1c0 r filter_12tap_16p_150 -ffffffff82c4e2a0 r filter_12tap_16p_183 -ffffffff82c4e380 r filter_11tap_16p_upscale -ffffffff82c4e450 r filter_11tap_16p_117 -ffffffff82c4e520 r filter_11tap_16p_150 -ffffffff82c4e5f0 r filter_11tap_16p_183 -ffffffff82c4e6c0 r filter_10tap_16p_upscale -ffffffff82c4e780 r filter_10tap_16p_117 -ffffffff82c4e840 r filter_10tap_16p_150 -ffffffff82c4e900 r filter_10tap_16p_183 -ffffffff82c4e9c0 r filter_9tap_16p_upscale -ffffffff82c4ea70 r filter_9tap_16p_117 -ffffffff82c4eb20 r filter_9tap_16p_150 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qp_table_444_12bpc_max -ffffffff82d09a40 r qp_table_444_12bpc_min -ffffffff82d0a980 r qp_table_422_8bpc_max -ffffffff82d0aec0 r qp_table_422_8bpc_min -ffffffff82d0b400 r qp_table_422_10bpc_max -ffffffff82d0bb40 r qp_table_422_10bpc_min -ffffffff82d0c280 r qp_table_422_12bpc_max -ffffffff82d0cbc0 r qp_table_422_12bpc_min -ffffffff82d0d500 r qp_table_420_8bpc_max -ffffffff82d0d940 r qp_table_420_8bpc_min -ffffffff82d0dd80 r qp_table_420_10bpc_max -ffffffff82d0e340 r qp_table_420_10bpc_min -ffffffff82d0e900 r qp_table_420_12bpc_max -ffffffff82d0f040 r qp_table_420_12bpc_min -ffffffff82d11000 r funcs -ffffffff82d11050 r hpd_regs -ffffffff82d111a0 r hpd_shift -ffffffff82d111b0 r hpd_mask -ffffffff82d111c0 r ddc_data_regs -ffffffff82d113a0 r ddc_clk_regs -ffffffff82d11580 r ddc_shift -ffffffff82d115a8 r ddc_mask +ffffffff82c28000 r reg_offsets +ffffffff82c29000 r bios_regs +ffffffff82c29008 r dce112_res_pool_funcs +ffffffff82c29100 r debug_defaults +ffffffff82c292b0 r clk_src_regs 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opp_shift +ffffffff82c2acbc r opp_mask +ffffffff82c2ad70 r aux_engine_regs +ffffffff82c2ae60 r aux_mask +ffffffff82c2aec0 r aux_shift +ffffffff82c2aee0 r i2c_hw_regs +ffffffff82c2b030 r i2c_shifts +ffffffff82c2b05c r i2c_masks +ffffffff82c2b100 r audio_regs +ffffffff82c2b208 r audio_shift +ffffffff82c2b220 r audio_mask +ffffffff82c2b260 r stream_enc_regs +ffffffff82c2b818 r se_shift +ffffffff82c2b89c r se_mask +ffffffff82c2baa0 r hwseq_reg +ffffffff82c2bcbc r hwseq_shift +ffffffff82c2bd3c r hwseq_mask +ffffffff82c2c000 r bios_regs +ffffffff82c2c008 r res_cap +ffffffff82c2c048 r dce120_res_pool_funcs +ffffffff82c2c140 r debug_defaults +ffffffff82c2c2f0 r clk_src_regs +ffffffff82c2c4e8 r dmcu_regs +ffffffff82c2c544 r dmcu_shift +ffffffff82c2c558 r dmcu_mask +ffffffff82c2c5a4 r abm_regs +ffffffff82c2c60c r abm_shift +ffffffff82c2c630 r abm_mask +ffffffff82c2c6c0 r dce120_tg_offsets +ffffffff82c2c708 r dce121_res_create_funcs +ffffffff82c2c738 r res_create_funcs +ffffffff82c2c768 r plane_cap +ffffffff82c2c7a0 r panel_cntl_regs +ffffffff82c2c7c0 r panel_cntl_shift +ffffffff82c2c7d0 r panel_cntl_mask +ffffffff82c2c810 r link_enc_regs +ffffffff82c2cbd0 r link_enc_aux_regs +ffffffff82c2cc20 r link_enc_hpd_regs +ffffffff82c2cc38 r link_enc_feature +ffffffff82c2cc48 r cs_shift +ffffffff82c2cc54 r cs_mask +ffffffff82c2cc80 r mi_regs +ffffffff82c2cf98 r mi_shifts +ffffffff82c2cfe0 r mi_masks +ffffffff82c2d100 r ipp_regs +ffffffff82c2d2f8 r ipp_shift +ffffffff82c2d320 r ipp_mask +ffffffff82c2d3c0 r xfm_regs +ffffffff82c2d960 r xfm_shift +ffffffff82c2d9c0 r xfm_mask +ffffffff82c2db40 r opp_regs +ffffffff82c2dc90 r opp_shift +ffffffff82c2dcbc r opp_mask +ffffffff82c2dd70 r aux_engine_regs +ffffffff82c2de60 r aux_mask +ffffffff82c2dec0 r aux_shift +ffffffff82c2dee0 r i2c_hw_regs +ffffffff82c2e030 r i2c_shifts +ffffffff82c2e05c r i2c_masks +ffffffff82c2e100 r audio_regs +ffffffff82c2e234 r audio_shift +ffffffff82c2e24c r audio_mask +ffffffff82c2e290 r stream_enc_regs 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opp_shift +ffffffff82c58a08 r opp_mask +ffffffff82c58ae0 r aux_engine_regs +ffffffff82c58bd0 r aux_mask +ffffffff82c58c30 r aux_shift +ffffffff82c58c50 r i2c_hw_regs +ffffffff82c58da0 r i2c_shifts +ffffffff82c58dcc r i2c_masks +ffffffff82c58e70 r mpc_regs +ffffffff82c593b8 r mpc_shift +ffffffff82c59400 r mpc_mask +ffffffff82c59514 r hubbub_reg +ffffffff82c5969c r hubbub_shift +ffffffff82c5972c r hubbub_mask +ffffffff82c59964 r res_cap_nv10 +ffffffff82c599a0 r vmid_regs +ffffffff82c59b60 r vmid_shifts +ffffffff82c59b68 r vmid_masks +ffffffff82c59b90 r tg_regs +ffffffff82c5a400 r tg_shift +ffffffff82c5a4d4 r tg_mask +ffffffff82c5a820 r link_enc_regs +ffffffff82c5afc0 r link_enc_aux_regs +ffffffff82c5b020 r link_enc_hpd_regs +ffffffff82c5b038 r le_shift +ffffffff82c5b128 r le_mask +ffffffff82c5b4e0 r stream_enc_regs +ffffffff82c5bcd8 r se_shift +ffffffff82c5bdb4 r se_mask +ffffffff82c5c120 r hwseq_reg +ffffffff82c5c33c r hwseq_shift +ffffffff82c5c3bc r hwseq_mask +ffffffff82c5c5b0 r dsc_regs +ffffffff82c5ca48 r dsc_shift +ffffffff82c5cb00 r dsc_mask +ffffffff82c5cde0 r hubp_regs +ffffffff82c5da28 r hubp_shift +ffffffff82c5db24 r hubp_mask +ffffffff82c5df20 r dwbc20_regs +ffffffff82c5dfd8 r dwbc20_shift +ffffffff82c5e058 r dwbc20_mask +ffffffff82c5e250 r mcif_wb20_regs +ffffffff82c5e330 r mcif_wb20_shift +ffffffff82c5e3d0 r mcif_wb20_mask +ffffffff82c5e650 r link_enc_feature +ffffffff82c5e660 r bios_regs +ffffffff82c5e668 r dcn20_res_pool_funcs +ffffffff82c5e760 r res_cap_nv14 +ffffffff82c5e7a0 r debug_defaults_drv +ffffffff82c5e950 r clk_src_regs +ffffffff82c5eb48 r dccg_regs +ffffffff82c5ec38 r dccg_shift +ffffffff82c5ecd8 r dccg_mask +ffffffff82c5ef4c r dmcu_regs +ffffffff82c5efa8 r dmcu_shift +ffffffff82c5efbc r dmcu_mask +ffffffff82c5f008 r abm_regs +ffffffff82c5f070 r abm_shift +ffffffff82c5f094 r abm_mask +ffffffff82c5f120 r res_create_funcs +ffffffff82c5f150 r plane_cap +ffffffff82c5f180 r panel_cntl_regs +ffffffff82c5f1a0 r panel_cntl_shift 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cs_mask +ffffffff82c66eb0 r hubp_regs +ffffffff82c67640 r hubp_shift +ffffffff82c67718 r hubp_mask +ffffffff82c67a80 r ipp_regs +ffffffff82c67b60 r ipp_shift +ffffffff82c67b7c r ipp_mask +ffffffff82c67bf0 r tf_regs +ffffffff82c68c40 r tf_shift +ffffffff82c68ec8 r tf_mask +ffffffff82c698e0 r opp_regs +ffffffff82c69990 r opp_shift +ffffffff82c699c8 r opp_mask +ffffffff82c69aa0 r aux_engine_regs +ffffffff82c69af0 r aux_mask +ffffffff82c69b50 r aux_shift +ffffffff82c69b70 r i2c_hw_regs +ffffffff82c69be0 r i2c_shifts +ffffffff82c69c0c r i2c_masks +ffffffff82c69cb0 r tg_regs +ffffffff82c69f80 r tg_shift +ffffffff82c6a054 r tg_mask +ffffffff82c6a39c r mpc_regs +ffffffff82c6a8e4 r mpc_shift +ffffffff82c6a930 r mpc_mask +ffffffff82c6aa58 r hubbub_reg +ffffffff82c6abe0 r hubbub_shift +ffffffff82c6ac70 r hubbub_mask +ffffffff82c6aeb0 r audio_regs +ffffffff82c6af08 r audio_shift +ffffffff82c6af20 r audio_mask +ffffffff82c6af60 r stream_enc_regs +ffffffff82c6b208 r se_shift +ffffffff82c6b2e4 r se_mask +ffffffff82c6b650 r hwseq_reg +ffffffff82c6b86c r hwseq_shift +ffffffff82c6b8ec r hwseq_mask +ffffffff82c6c000 r dccg21_funcs +ffffffff82c6d000 r hubbub21_funcs +ffffffff82c6e000 r dcn21_funcs +ffffffff82c6e2e8 r dcn21_private_funcs +ffffffff82c6f000 r dcn21_link_enc_funcs +ffffffff82c6f0e0 r dcn21_mpll_cfg_ref +ffffffff82c70000 r bios_regs +ffffffff82c70008 r res_cap_rn +ffffffff82c70048 r dcn21_res_pool_funcs +ffffffff82c70140 r debug_defaults_drv +ffffffff82c702f0 r clk_src_regs +ffffffff82c70494 r dccg_regs +ffffffff82c70584 r dccg_shift +ffffffff82c70624 r dccg_mask +ffffffff82c70898 r dmcu_regs +ffffffff82c708f4 r dmcu_shift +ffffffff82c70908 r dmcu_mask +ffffffff82c70954 r abm_regs +ffffffff82c709bc r abm_shift +ffffffff82c709e0 r abm_mask +ffffffff82c70a70 r res_create_funcs +ffffffff82c70aa0 r plane_cap +ffffffff82c70ad0 r panel_cntl_regs +ffffffff82c70af0 r panel_cntl_shift +ffffffff82c70b00 r panel_cntl_mask +ffffffff82c70b40 r link_enc_regs +ffffffff82c711a0 r link_enc_aux_regs +ffffffff82c711f0 r link_enc_hpd_regs +ffffffff82c71204 r le_shift +ffffffff82c712f4 r le_mask +ffffffff82c716ac r link_enc_feature +ffffffff82c716bc r panel_config_defaults +ffffffff82c71710 r cs_shift +ffffffff82c7171c r cs_mask +ffffffff82c71750 r hubp_regs +ffffffff82c71f80 r hubp_shift +ffffffff82c7207c r hubp_mask +ffffffff82c72470 r ipp_regs +ffffffff82c72550 r ipp_shift +ffffffff82c7256c r ipp_mask +ffffffff82c725e0 r tf_regs +ffffffff82c736b0 r tf_shift +ffffffff82c73938 r tf_mask +ffffffff82c74350 r opp_regs +ffffffff82c74560 r opp_shift +ffffffff82c74598 r opp_mask +ffffffff82c74670 r tg_regs +ffffffff82c74c10 r tg_shift +ffffffff82c74ce4 r tg_mask +ffffffff82c75030 r aux_engine_regs +ffffffff82c750f8 r aux_mask +ffffffff82c75158 r aux_shift +ffffffff82c75170 r i2c_hw_regs +ffffffff82c75288 r i2c_shifts +ffffffff82c752b4 r i2c_masks +ffffffff82c75358 r mpc_regs +ffffffff82c758a0 r mpc_shift +ffffffff82c758e8 r mpc_mask +ffffffff82c759fc r hubbub_reg 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dcn30_res_pool_funcs +ffffffff82c81140 r debug_defaults_drv +ffffffff82c812f0 r clk_src_regs +ffffffff82c814e8 r dccg_regs +ffffffff82c815d8 r dccg_shift +ffffffff82c81678 r dccg_mask +ffffffff82c818f0 r abm_regs +ffffffff82c81b60 r abm_shift +ffffffff82c81b84 r abm_mask +ffffffff82c81c10 r res_create_funcs +ffffffff82c81c40 r plane_cap +ffffffff82c81c70 r panel_cntl_regs +ffffffff82c81c90 r panel_cntl_shift +ffffffff82c81ca0 r panel_cntl_mask +ffffffff82c81ce0 r link_enc_regs +ffffffff82c82480 r link_enc_aux_regs +ffffffff82c824e0 r link_enc_hpd_regs +ffffffff82c824f8 r le_shift +ffffffff82c825e8 r le_mask +ffffffff82c829a0 r link_enc_feature +ffffffff82c829b0 r cs_shift +ffffffff82c829bc r cs_mask +ffffffff82c829e4 r hubbub_reg +ffffffff82c82b6c r hubbub_shift +ffffffff82c82bfc r hubbub_mask +ffffffff82c82e40 r vmid_regs +ffffffff82c83000 r vmid_shifts +ffffffff82c83008 r vmid_masks +ffffffff82c83030 r hubp_regs +ffffffff82c83c78 r hubp_shift +ffffffff82c83d74 r hubp_mask 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r dwbc30_regs +ffffffff82c99b4c r dwbc30_shift +ffffffff82c99c80 r dwbc30_mask +ffffffff82c9a150 r mcif_wb30_regs +ffffffff82c9a24c r mcif_wb30_shift +ffffffff82c9a2f8 r mcif_wb30_mask +ffffffff82c9a5b0 r aux_engine_regs +ffffffff82c9a650 r aux_mask +ffffffff82c9a6b0 r aux_shift +ffffffff82c9a6d0 r i2c_hw_regs +ffffffff82c9a7b0 r i2c_shifts +ffffffff82c9a7dc r i2c_masks +ffffffff82c9a880 r audio_regs +ffffffff82c9a9b4 r audio_shift +ffffffff82c9a9cc r audio_mask +ffffffff82c9aa10 r stream_enc_regs +ffffffff82c9af60 r se_shift +ffffffff82c9b03c r se_mask +ffffffff82c9b3b0 r vpg_regs +ffffffff82c9b400 r vpg_shift +ffffffff82c9b428 r vpg_mask +ffffffff82c9b4c0 r afmt_regs +ffffffff82c9b550 r afmt_shift +ffffffff82c9b564 r afmt_mask +ffffffff82c9b5a8 r hwseq_reg +ffffffff82c9b7c4 r hwseq_shift +ffffffff82c9b844 r hwseq_mask +ffffffff82c9c000 r bios_regs +ffffffff82c9c008 r res_cap_dcn302 +ffffffff82c9c048 r debug_defaults_drv +ffffffff82c9c1f0 r clk_src_regs +ffffffff82c9c394 r dccg_regs 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opp_shift +ffffffff82ca16b0 r opp_mask +ffffffff82ca1790 r optc_regs +ffffffff82ca1e98 r optc_shift +ffffffff82ca1f6c r optc_mask +ffffffff82ca22b4 r mpc_regs +ffffffff82ca3aa0 r mpc_shift +ffffffff82ca3b7c r mpc_mask +ffffffff82ca3ef0 r dsc_regs +ffffffff82ca42c4 r dsc_shift +ffffffff82ca437c r dsc_mask +ffffffff82ca4660 r dwbc30_regs +ffffffff82ca483c r dwbc30_shift +ffffffff82ca4970 r dwbc30_mask +ffffffff82ca4e40 r mcif_wb30_regs +ffffffff82ca4f3c r mcif_wb30_shift +ffffffff82ca4fe8 r mcif_wb30_mask +ffffffff82ca52a0 r aux_engine_regs +ffffffff82ca5368 r aux_mask +ffffffff82ca53c8 r aux_shift +ffffffff82ca53e0 r i2c_hw_regs +ffffffff82ca54f8 r i2c_shifts +ffffffff82ca5524 r i2c_masks +ffffffff82ca55d0 r audio_regs +ffffffff82ca5704 r audio_shift +ffffffff82ca571c r audio_mask +ffffffff82ca5760 r stream_enc_regs +ffffffff82ca5e04 r se_shift +ffffffff82ca5ee0 r se_mask +ffffffff82ca6250 r vpg_regs +ffffffff82ca62c8 r vpg_shift +ffffffff82ca62f0 r vpg_mask +ffffffff82ca6390 r afmt_regs +ffffffff82ca6468 r afmt_shift +ffffffff82ca647c r afmt_mask +ffffffff82ca64c0 r hwseq_reg +ffffffff82ca66dc r hwseq_shift +ffffffff82ca675c r hwseq_mask +ffffffff82ca7000 r bios_regs +ffffffff82ca7008 r res_cap_dcn303 +ffffffff82ca7048 r debug_defaults_drv +ffffffff82ca71f0 r clk_src_regs +ffffffff82ca7298 r dccg_regs +ffffffff82ca7388 r dccg_shift +ffffffff82ca7428 r dccg_mask +ffffffff82ca76a0 r abm_regs +ffffffff82ca7770 r abm_shift +ffffffff82ca7794 r abm_mask +ffffffff82ca7820 r res_create_funcs +ffffffff82ca7850 r plane_cap +ffffffff82ca7880 r panel_cntl_regs +ffffffff82ca78a0 r panel_cntl_shift +ffffffff82ca78b0 r panel_cntl_mask +ffffffff82ca78f0 r link_enc_regs +ffffffff82ca7b80 r link_enc_aux_regs +ffffffff82ca7ba0 r link_enc_hpd_regs +ffffffff82ca7ba8 r le_shift +ffffffff82ca7c98 r le_mask +ffffffff82ca8050 r link_enc_feature +ffffffff82ca8060 r cs_shift +ffffffff82ca806c r cs_mask +ffffffff82ca8094 r hubbub_reg +ffffffff82ca821c r hubbub_shift +ffffffff82ca82ac r hubbub_mask +ffffffff82ca84f0 r vmid_regs +ffffffff82ca86b0 r vmid_shifts +ffffffff82ca86b8 r vmid_masks +ffffffff82ca86e0 r hubp_regs +ffffffff82ca8af8 r hubp_shift +ffffffff82ca8bf4 r hubp_mask +ffffffff82ca8ff0 r dpp_regs +ffffffff82ca9a78 r tf_shift +ffffffff82ca9d4c r tf_mask +ffffffff82caa890 r opp_regs +ffffffff82caa940 r opp_shift +ffffffff82caa978 r opp_mask +ffffffff82caaa50 r optc_regs +ffffffff82caad20 r optc_shift +ffffffff82caadf4 r optc_mask +ffffffff82cab13c r mpc_regs +ffffffff82cac928 r mpc_shift +ffffffff82caca04 r mpc_mask +ffffffff82cacd70 r dsc_regs +ffffffff82cacef8 r dsc_shift +ffffffff82cacfb0 r dsc_mask +ffffffff82cad290 r dwbc30_regs +ffffffff82cad46c r dwbc30_shift +ffffffff82cad5a0 r dwbc30_mask +ffffffff82cada70 r mcif_wb30_regs +ffffffff82cadb6c r mcif_wb30_shift +ffffffff82cadc18 r mcif_wb30_mask +ffffffff82caded0 r aux_engine_regs +ffffffff82cadf20 r aux_mask +ffffffff82cadf80 r aux_shift +ffffffff82cadfa0 r i2c_hw_regs +ffffffff82cae010 r i2c_shifts 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r abm_regs +ffffffff82cb5950 r abm_shift +ffffffff82cb5974 r abm_mask +ffffffff82cb5a00 r res_create_funcs +ffffffff82cb5a30 r plane_cap +ffffffff82cb5a60 r link_enc_regs +ffffffff82cb60c0 r link_enc_aux_regs +ffffffff82cb6110 r link_enc_hpd_regs +ffffffff82cb6124 r le_shift +ffffffff82cb6214 r le_mask +ffffffff82cb65cc r link_enc_feature +ffffffff82cb65dc r panel_config_defaults +ffffffff82cb6630 r debug_defaults_drv +ffffffff82cb67d8 r cs_shift +ffffffff82cb67e4 r cs_mask +ffffffff82cb680c r hubbub_reg +ffffffff82cb6994 r hubbub_shift +ffffffff82cb6a24 r hubbub_mask +ffffffff82cb6c60 r vmid_regs +ffffffff82cb6e20 r vmid_shifts +ffffffff82cb6e28 r vmid_masks +ffffffff82cb6e50 r hubp_regs +ffffffff82cb7680 r hubp_shift +ffffffff82cb777c r hubp_mask +ffffffff82cb7b70 r dpp_regs +ffffffff82cb9080 r tf_shift +ffffffff82cb9354 r tf_mask +ffffffff82cb9ea0 r opp_regs +ffffffff82cba000 r opp_shift +ffffffff82cba038 r opp_mask +ffffffff82cba110 r optc_regs +ffffffff82cba6b0 r optc_shift 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hpo_dp_stream_enc_regs +ffffffff82cbfdf0 r hpo_dp_se_shift +ffffffff82cbfe18 r hpo_dp_se_mask +ffffffff82cbfec0 r apg_regs +ffffffff82cbff00 r apg_shift +ffffffff82cbff08 r apg_mask +ffffffff82cbff20 r hpo_dp_link_enc_regs +ffffffff82cc0030 r hpo_dp_le_shift +ffffffff82cc004c r hpo_dp_le_mask +ffffffff82cc00b0 r hwseq_reg +ffffffff82cc02cc r hwseq_shift +ffffffff82cc034c r hwseq_mask +ffffffff82cc1000 r dccg314_funcs +ffffffff82cc2000 r dcn314_str_enc_funcs +ffffffff82cc3000 r dcn314_funcs +ffffffff82cc32e8 r dcn314_private_funcs +ffffffff82cc4000 r bios_regs +ffffffff82cc4008 r res_cap_dcn314 +ffffffff82cc4048 r debug_defaults_diags +ffffffff82cc41f0 r clk_src_regs +ffffffff82cc4394 r dccg_regs +ffffffff82cc4484 r dccg_shift +ffffffff82cc4524 r dccg_mask +ffffffff82cc47a0 r abm_regs +ffffffff82cc4940 r abm_shift +ffffffff82cc4964 r abm_mask +ffffffff82cc49f0 r res_create_funcs +ffffffff82cc4a20 r plane_cap +ffffffff82cc4a50 r link_enc_regs +ffffffff82cc50b0 r link_enc_aux_regs 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vmid_shifts +ffffffff82cd0c78 r vmid_masks +ffffffff82cd0ca0 r hubp_regs +ffffffff82cd14d0 r hubp_shift +ffffffff82cd15cc r hubp_mask +ffffffff82cd19c0 r dpp_regs +ffffffff82cd2ed0 r tf_shift +ffffffff82cd31a4 r tf_mask +ffffffff82cd3cf0 r opp_regs +ffffffff82cd3e50 r opp_shift +ffffffff82cd3e88 r opp_mask +ffffffff82cd3f60 r optc_regs +ffffffff82cd4500 r optc_shift +ffffffff82cd45d4 r optc_mask +ffffffff82cd491c r mpc_regs +ffffffff82cd6108 r mpc_shift +ffffffff82cd61e4 r mpc_mask +ffffffff82cd6550 r dsc_regs +ffffffff82cd679c r dsc_shift +ffffffff82cd6854 r dsc_mask +ffffffff82cd6b30 r dwbc30_regs +ffffffff82cd6d0c r dwbc30_shift +ffffffff82cd6e40 r dwbc30_mask +ffffffff82cd7310 r mcif_wb30_regs +ffffffff82cd740c r mcif_wb30_shift +ffffffff82cd74b8 r mcif_wb30_mask +ffffffff82cd7770 r aux_engine_regs +ffffffff82cd7838 r aux_mask +ffffffff82cd7898 r aux_shift +ffffffff82cd78b0 r i2c_hw_regs +ffffffff82cd79c8 r i2c_shifts +ffffffff82cd79f4 r i2c_masks +ffffffff82cd7aa0 r audio_regs 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r mpc_regs +ffffffff82ce1108 r mpc_shift +ffffffff82ce11e4 r mpc_mask +ffffffff82ce1550 r dsc_regs +ffffffff82ce179c r dsc_shift +ffffffff82ce1854 r dsc_mask +ffffffff82ce1b30 r dwbc30_regs +ffffffff82ce1d0c r dwbc30_shift +ffffffff82ce1e40 r dwbc30_mask +ffffffff82ce2310 r mcif_wb30_regs +ffffffff82ce240c r mcif_wb30_shift +ffffffff82ce24b8 r mcif_wb30_mask +ffffffff82ce2770 r aux_engine_regs +ffffffff82ce2838 r aux_mask +ffffffff82ce2898 r aux_shift +ffffffff82ce28b0 r i2c_hw_regs +ffffffff82ce29c8 r i2c_shifts +ffffffff82ce29f4 r i2c_masks +ffffffff82ce2aa0 r audio_regs +ffffffff82ce2bd4 r audio_shift +ffffffff82ce2bec r audio_mask +ffffffff82ce2c30 r stream_enc_regs +ffffffff82ce32d4 r se_shift +ffffffff82ce33b0 r se_mask +ffffffff82ce3720 r vpg_regs +ffffffff82ce3810 r vpg_shift +ffffffff82ce3838 r vpg_mask +ffffffff82ce38e0 r afmt_regs +ffffffff82ce39b8 r afmt_shift +ffffffff82ce39cc r afmt_mask +ffffffff82ce3a20 r hpo_dp_stream_enc_regs +ffffffff82ce3c50 r hpo_dp_se_shift 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cs_shift +ffffffff82cecacc r cs_mask +ffffffff82cecaf4 r hubbub_shift +ffffffff82cecb84 r hubbub_mask +ffffffff82cecdbc r vmid_shifts +ffffffff82cecdc4 r vmid_masks +ffffffff82cecde4 r hubp_shift +ffffffff82cecee0 r hubp_mask +ffffffff82ced2d0 r tf_shift +ffffffff82ced5a4 r tf_mask +ffffffff82cee0e8 r opp_shift +ffffffff82cee120 r opp_mask +ffffffff82cee1f4 r optc_shift +ffffffff82cee2c8 r optc_mask +ffffffff82cee610 r mpc_shift +ffffffff82cee6ec r mpc_mask +ffffffff82ceea58 r dsc_shift +ffffffff82ceeb10 r dsc_mask +ffffffff82ceede8 r dwbc30_shift +ffffffff82ceef1c r dwbc30_mask +ffffffff82cef3e4 r mcif_wb30_shift +ffffffff82cef490 r mcif_wb30_mask +ffffffff82cef73c r aux_mask +ffffffff82cef79c r aux_shift +ffffffff82cef7b4 r i2c_shifts +ffffffff82cef7e0 r i2c_masks +ffffffff82cef884 r audio_shift +ffffffff82cef89c r audio_mask +ffffffff82cef8d8 r se_shift +ffffffff82cef9b4 r se_mask +ffffffff82cefd20 r vpg_shift +ffffffff82cefd48 r vpg_mask +ffffffff82cefddc r afmt_shift +ffffffff82cefdf0 r afmt_mask +ffffffff82cefe34 r hpo_dp_se_shift +ffffffff82cefe5c r hpo_dp_se_mask +ffffffff82cefefc r apg_shift +ffffffff82ceff04 r apg_mask +ffffffff82ceff1c r hpo_dp_le_shift +ffffffff82ceff38 r hpo_dp_le_mask +ffffffff82ceff9c r hwseq_shift +ffffffff82cf001c r hwseq_mask +ffffffff82cf1000 r dcn321_link_enc_funcs +ffffffff82cf2000 r res_cap_dcn321 +ffffffff82cf203c r dccg_shift +ffffffff82cf20dc r dccg_mask +ffffffff82cf2350 r abm_shift +ffffffff82cf2374 r abm_mask +ffffffff82cf2400 r res_create_funcs +ffffffff82cf2430 r plane_cap +ffffffff82cf245c r le_shift +ffffffff82cf254c r le_mask +ffffffff82cf2904 r link_enc_feature +ffffffff82cf2918 r debug_defaults_drv +ffffffff82cf2ac0 r cs_shift +ffffffff82cf2acc r cs_mask +ffffffff82cf2af4 r hubbub_shift +ffffffff82cf2b84 r hubbub_mask +ffffffff82cf2dbc r vmid_shifts +ffffffff82cf2dc4 r vmid_masks +ffffffff82cf2de4 r hubp_shift +ffffffff82cf2ee0 r hubp_mask +ffffffff82cf32d0 r tf_shift +ffffffff82cf35a4 r tf_mask +ffffffff82cf40e8 r opp_shift +ffffffff82cf4120 r opp_mask +ffffffff82cf41f4 r optc_shift +ffffffff82cf42c8 r optc_mask +ffffffff82cf4610 r mpc_shift +ffffffff82cf46ec r mpc_mask +ffffffff82cf4a58 r dsc_shift +ffffffff82cf4b10 r dsc_mask +ffffffff82cf4de8 r dwbc30_shift +ffffffff82cf4f1c r dwbc30_mask +ffffffff82cf53e4 r mcif_wb30_shift +ffffffff82cf5490 r mcif_wb30_mask +ffffffff82cf573c r aux_mask +ffffffff82cf579c r aux_shift +ffffffff82cf57b4 r i2c_shifts +ffffffff82cf57e0 r i2c_masks +ffffffff82cf5884 r audio_shift +ffffffff82cf589c r audio_mask +ffffffff82cf58d8 r se_shift +ffffffff82cf59b4 r se_mask +ffffffff82cf5d20 r vpg_shift +ffffffff82cf5d48 r vpg_mask +ffffffff82cf5ddc r afmt_shift +ffffffff82cf5df0 r afmt_mask +ffffffff82cf5e34 r hpo_dp_se_shift +ffffffff82cf5e5c r hpo_dp_se_mask +ffffffff82cf5efc r apg_shift +ffffffff82cf5f04 r apg_mask +ffffffff82cf5f1c r hpo_dp_le_shift +ffffffff82cf5f38 r hpo_dp_le_mask +ffffffff82cf5f9c r hwseq_shift +ffffffff82cf601c r hwseq_mask +ffffffff82cf8000 R dcn10_soc_defaults +ffffffff82cf808c R dcn10_ip_defaults +ffffffff82d04000 r dml20_funcs +ffffffff82d04030 r dml20v2_funcs +ffffffff82d04060 r dml21_funcs +ffffffff82d04090 r dml30_funcs +ffffffff82d040c0 r dml31_funcs +ffffffff82d040f0 r dml314_funcs +ffffffff82d04120 r dml32_funcs +ffffffff82d07000 r qp_table_444_8bpc_max +ffffffff82d07940 r qp_table_444_8bpc_min +ffffffff82d08280 r qp_table_444_10bpc_max +ffffffff82d08ec0 r qp_table_444_10bpc_min +ffffffff82d09b00 r qp_table_444_12bpc_max +ffffffff82d0aa40 r qp_table_444_12bpc_min +ffffffff82d0b980 r qp_table_422_8bpc_max +ffffffff82d0bec0 r qp_table_422_8bpc_min +ffffffff82d0c400 r qp_table_422_10bpc_max +ffffffff82d0cb40 r qp_table_422_10bpc_min +ffffffff82d0d280 r qp_table_422_12bpc_max +ffffffff82d0dbc0 r qp_table_422_12bpc_min +ffffffff82d0e500 r qp_table_420_8bpc_max +ffffffff82d0e940 r qp_table_420_8bpc_min +ffffffff82d0ed80 r qp_table_420_10bpc_max +ffffffff82d0f340 r qp_table_420_10bpc_min +ffffffff82d0f900 r qp_table_420_12bpc_max +ffffffff82d10040 r qp_table_420_12bpc_min ffffffff82d12000 r funcs +ffffffff82d12050 r hpd_regs +ffffffff82d121a0 r hpd_shift +ffffffff82d121b0 r hpd_mask +ffffffff82d121c0 r ddc_data_regs +ffffffff82d123a0 r ddc_clk_regs +ffffffff82d12580 r ddc_shift +ffffffff82d125a8 r ddc_mask ffffffff82d13000 r funcs -ffffffff82d13050 r hpd_regs -ffffffff82d131a0 r hpd_shift -ffffffff82d131b0 r hpd_mask -ffffffff82d131c0 r ddc_data_regs -ffffffff82d133a0 r ddc_clk_regs -ffffffff82d13580 r ddc_shift -ffffffff82d135a8 r ddc_mask ffffffff82d14000 r funcs +ffffffff82d14050 r hpd_regs +ffffffff82d141a0 r hpd_shift +ffffffff82d141b0 r hpd_mask +ffffffff82d141c0 r ddc_data_regs +ffffffff82d143a0 r ddc_clk_regs +ffffffff82d14580 r ddc_shift +ffffffff82d145a8 r ddc_mask ffffffff82d15000 r funcs -ffffffff82d15050 r hpd_regs -ffffffff82d151a0 r hpd_shift -ffffffff82d151b0 r hpd_mask -ffffffff82d151c0 r ddc_data_regs -ffffffff82d153a0 r ddc_clk_regs -ffffffff82d15580 r ddc_shift -ffffffff82d155a8 r ddc_mask ffffffff82d16000 r funcs +ffffffff82d16050 r hpd_regs +ffffffff82d161a0 r hpd_shift +ffffffff82d161b0 r hpd_mask +ffffffff82d161c0 r ddc_data_regs +ffffffff82d163a0 r ddc_clk_regs +ffffffff82d16580 r ddc_shift +ffffffff82d165a8 r ddc_mask ffffffff82d17000 r funcs -ffffffff82d17050 r hpd_regs -ffffffff82d171a0 r hpd_shift -ffffffff82d171b0 r hpd_mask -ffffffff82d171c0 r ddc_data_regs -ffffffff82d173a0 r ddc_clk_regs -ffffffff82d17580 r ddc_shift -ffffffff82d175a8 r ddc_mask -ffffffff82d175d0 r generic_regs -ffffffff82d17640 r generic_shift -ffffffff82d17650 r generic_mask ffffffff82d18000 r funcs +ffffffff82d18050 r hpd_regs +ffffffff82d181a0 r hpd_shift +ffffffff82d181b0 r hpd_mask +ffffffff82d181c0 r ddc_data_regs +ffffffff82d183a0 r ddc_clk_regs +ffffffff82d18580 r ddc_shift +ffffffff82d185a8 r ddc_mask +ffffffff82d185d0 r generic_regs +ffffffff82d18640 r generic_shift +ffffffff82d18650 r generic_mask ffffffff82d19000 r funcs -ffffffff82d19050 r hpd_regs -ffffffff82d191a0 r hpd_shift -ffffffff82d191b0 r hpd_mask -ffffffff82d191c0 r ddc_data_regs_dcn -ffffffff82d19370 r ddc_clk_regs_dcn -ffffffff82d19520 r ddc_shift -ffffffff82d19640 r ddc_mask -ffffffff82d19760 r generic_regs -ffffffff82d197d0 r generic_shift -ffffffff82d197e0 r generic_mask ffffffff82d1a000 r funcs +ffffffff82d1a050 r hpd_regs +ffffffff82d1a1a0 r hpd_shift +ffffffff82d1a1b0 r hpd_mask +ffffffff82d1a1c0 r ddc_data_regs_dcn +ffffffff82d1a370 r ddc_clk_regs_dcn +ffffffff82d1a520 r ddc_shift +ffffffff82d1a640 r ddc_mask +ffffffff82d1a760 r generic_regs +ffffffff82d1a7d0 r generic_shift +ffffffff82d1a7e0 r generic_mask ffffffff82d1b000 r funcs -ffffffff82d1b050 r hpd_regs -ffffffff82d1b168 r hpd_shift -ffffffff82d1b178 r hpd_mask -ffffffff82d1b190 r ddc_data_regs_dcn -ffffffff82d1b2c0 r ddc_clk_regs_dcn -ffffffff82d1b3f0 r ddc_shift -ffffffff82d1b4e0 r ddc_mask -ffffffff82d1b5d0 r generic_regs -ffffffff82d1b604 r generic_shift -ffffffff82d1b60c r generic_mask ffffffff82d1c000 r funcs +ffffffff82d1c050 r hpd_regs +ffffffff82d1c168 r hpd_shift +ffffffff82d1c178 r hpd_mask +ffffffff82d1c190 r ddc_data_regs_dcn +ffffffff82d1c2c0 r ddc_clk_regs_dcn +ffffffff82d1c3f0 r ddc_shift +ffffffff82d1c4e0 r ddc_mask +ffffffff82d1c5d0 r generic_regs +ffffffff82d1c604 r generic_shift +ffffffff82d1c60c r generic_mask ffffffff82d1d000 r funcs -ffffffff82d1d050 r hpd_regs -ffffffff82d1d1a0 r hpd_shift -ffffffff82d1d1b0 r hpd_mask -ffffffff82d1d1c0 r ddc_data_regs_dcn -ffffffff82d1d370 r ddc_clk_regs_dcn -ffffffff82d1d520 r ddc_shift -ffffffff82d1d640 r ddc_mask -ffffffff82d1d760 r generic_regs -ffffffff82d1d7d0 r generic_shift -ffffffff82d1d7e0 r generic_mask ffffffff82d1e000 r funcs +ffffffff82d1e050 r hpd_regs +ffffffff82d1e1a0 r hpd_shift +ffffffff82d1e1b0 r hpd_mask +ffffffff82d1e1c0 r ddc_data_regs_dcn +ffffffff82d1e370 r ddc_clk_regs_dcn +ffffffff82d1e520 r ddc_shift +ffffffff82d1e640 r ddc_mask +ffffffff82d1e760 r generic_regs +ffffffff82d1e7d0 r generic_shift +ffffffff82d1e7e0 r generic_mask ffffffff82d1f000 r funcs -ffffffff82d1f050 r hpd_regs -ffffffff82d1f168 r hpd_shift -ffffffff82d1f178 r hpd_mask -ffffffff82d1f190 r ddc_data_regs_dcn -ffffffff82d1f300 r ddc_clk_regs_dcn -ffffffff82d1f470 r ddc_shift -ffffffff82d1f560 r ddc_mask -ffffffff82d1f650 r generic_regs -ffffffff82d1f6c0 r generic_shift -ffffffff82d1f6d0 r generic_mask ffffffff82d20000 r funcs +ffffffff82d20050 r hpd_regs +ffffffff82d20168 r hpd_shift +ffffffff82d20178 r hpd_mask +ffffffff82d20190 r ddc_data_regs_dcn +ffffffff82d20300 r ddc_clk_regs_dcn +ffffffff82d20470 r ddc_shift +ffffffff82d20560 r ddc_mask +ffffffff82d20650 r generic_regs +ffffffff82d206c0 r generic_shift +ffffffff82d206d0 r generic_mask ffffffff82d21000 r funcs -ffffffff82d21050 r hpd_regs -ffffffff82d21168 r hpd_shift -ffffffff82d21178 r hpd_mask -ffffffff82d21190 r ddc_data_regs_dcn -ffffffff82d21340 r ddc_clk_regs_dcn -ffffffff82d214f0 r ddc_shift -ffffffff82d21610 r ddc_mask -ffffffff82d21730 r generic_regs -ffffffff82d217a0 r generic_shift -ffffffff82d217b0 r generic_mask ffffffff82d22000 r funcs +ffffffff82d22050 r hpd_regs +ffffffff82d22168 r hpd_shift +ffffffff82d22178 r hpd_mask +ffffffff82d22190 r ddc_data_regs_dcn +ffffffff82d22340 r ddc_clk_regs_dcn +ffffffff82d224f0 r ddc_shift +ffffffff82d22610 r ddc_mask +ffffffff82d22730 r generic_regs +ffffffff82d227a0 r generic_shift +ffffffff82d227b0 r generic_mask ffffffff82d23000 r funcs ffffffff82d24000 r funcs ffffffff82d25000 r funcs -ffffffff82d26000 r hdmi_14_protection -ffffffff82d26010 r dp_11_protection -ffffffff82d26020 r hdcp_i2c_offsets -ffffffff82d26050 r hdcp_dpcd_addrs -ffffffff82d27000 r irq_service_funcs_dce110 -ffffffff82d27008 r dummy_irq_info_funcs -ffffffff82d27018 r hpd_irq_info_funcs -ffffffff82d27028 r hpd_rx_irq_info_funcs -ffffffff82d27038 r pflip_irq_info_funcs -ffffffff82d27048 r vupdate_irq_info_funcs -ffffffff82d27058 r vblank_irq_info_funcs -ffffffff82d27070 r irq_source_info_dce110 -ffffffff82d29000 r irq_service_funcs_dce120 -ffffffff82d29008 r dummy_irq_info_funcs -ffffffff82d29018 r hpd_irq_info_funcs -ffffffff82d29028 r hpd_rx_irq_info_funcs -ffffffff82d29038 r pflip_irq_info_funcs -ffffffff82d29048 r vupdate_irq_info_funcs -ffffffff82d29058 r vblank_irq_info_funcs -ffffffff82d29070 r irq_source_info_dce120 -ffffffff82d2b000 r irq_service_funcs_dce80 -ffffffff82d2b008 r dummy_irq_info_funcs -ffffffff82d2b018 r hpd_irq_info_funcs -ffffffff82d2b028 r hpd_rx_irq_info_funcs -ffffffff82d2b038 r pflip_irq_info_funcs -ffffffff82d2b048 r vupdate_irq_info_funcs -ffffffff82d2b058 r vblank_irq_info_funcs -ffffffff82d2b070 r irq_source_info_dce80 -ffffffff82d2d000 r irq_service_funcs_dcn10 -ffffffff82d2d008 r dummy_irq_info_funcs -ffffffff82d2d018 r hpd_irq_info_funcs -ffffffff82d2d028 r hpd_rx_irq_info_funcs -ffffffff82d2d038 r pflip_irq_info_funcs -ffffffff82d2d048 r vupdate_no_lock_irq_info_funcs -ffffffff82d2d058 r vblank_irq_info_funcs -ffffffff82d2d068 r vline0_irq_info_funcs -ffffffff82d2d080 r irq_source_info_dcn10 -ffffffff82d2f000 r irq_service_funcs_dcn20 -ffffffff82d2f008 r dummy_irq_info_funcs -ffffffff82d2f018 r hpd_irq_info_funcs -ffffffff82d2f028 r hpd_rx_irq_info_funcs -ffffffff82d2f038 r pflip_irq_info_funcs -ffffffff82d2f048 r vupdate_no_lock_irq_info_funcs -ffffffff82d2f058 r vblank_irq_info_funcs -ffffffff82d2f068 r vline0_irq_info_funcs -ffffffff82d2f080 r irq_source_info_dcn20 -ffffffff82d31000 r irq_service_funcs_dcn201 -ffffffff82d31008 r dummy_irq_info_funcs -ffffffff82d31018 r hpd_irq_info_funcs -ffffffff82d31028 r hpd_rx_irq_info_funcs -ffffffff82d31038 r pflip_irq_info_funcs -ffffffff82d31048 r vupdate_no_lock_irq_info_funcs -ffffffff82d31058 r vblank_irq_info_funcs -ffffffff82d31068 r vline0_irq_info_funcs -ffffffff82d31080 r irq_source_info_dcn201 -ffffffff82d33000 r irq_source_info_dcn21 -ffffffff82d34290 r irq_service_funcs_dcn21 -ffffffff82d34298 r dummy_irq_info_funcs -ffffffff82d342a8 r hpd_irq_info_funcs -ffffffff82d342b8 r hpd_rx_irq_info_funcs -ffffffff82d342c8 r pflip_irq_info_funcs -ffffffff82d342d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d342e8 r vblank_irq_info_funcs -ffffffff82d342f8 r vline0_irq_info_funcs -ffffffff82d34308 r dmub_outbox_irq_info_funcs -ffffffff82d35000 r irq_source_info_dcn30 -ffffffff82d36290 r irq_service_funcs_dcn30 -ffffffff82d36298 r dummy_irq_info_funcs -ffffffff82d362a8 r hpd_irq_info_funcs -ffffffff82d362b8 r hpd_rx_irq_info_funcs -ffffffff82d362c8 r pflip_irq_info_funcs -ffffffff82d362d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d362e8 r vblank_irq_info_funcs -ffffffff82d362f8 r vline0_irq_info_funcs -ffffffff82d36308 r dmub_trace_irq_info_funcs -ffffffff82d37000 r irq_source_info_dcn302 -ffffffff82d38290 r irq_service_funcs_dcn302 -ffffffff82d38298 r dummy_irq_info_funcs -ffffffff82d382a8 r hpd_irq_info_funcs -ffffffff82d382b8 r hpd_rx_irq_info_funcs -ffffffff82d382c8 r pflip_irq_info_funcs -ffffffff82d382d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d382e8 r vblank_irq_info_funcs -ffffffff82d382f8 r vline0_irq_info_funcs -ffffffff82d38308 r dmub_trace_irq_info_funcs -ffffffff82d39000 r irq_service_funcs_dcn303 -ffffffff82d39008 r dummy_irq_info_funcs -ffffffff82d39018 r hpd_irq_info_funcs -ffffffff82d39028 r hpd_rx_irq_info_funcs -ffffffff82d39038 r pflip_irq_info_funcs -ffffffff82d39048 r vupdate_no_lock_irq_info_funcs -ffffffff82d39058 r vblank_irq_info_funcs -ffffffff82d39068 r vline0_irq_info_funcs -ffffffff82d39080 r irq_source_info_dcn303 -ffffffff82d3b000 r irq_source_info_dcn31 -ffffffff82d3c290 r irq_service_funcs_dcn31 -ffffffff82d3c298 r dummy_irq_info_funcs -ffffffff82d3c2a8 r hpd_irq_info_funcs -ffffffff82d3c2b8 r hpd_rx_irq_info_funcs -ffffffff82d3c2c8 r pflip_irq_info_funcs -ffffffff82d3c2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d3c2e8 r vblank_irq_info_funcs -ffffffff82d3c2f8 r vline0_irq_info_funcs -ffffffff82d3c308 r outbox_irq_info_funcs -ffffffff82d3d000 r irq_source_info_dcn314 -ffffffff82d3e290 r irq_service_funcs_dcn314 -ffffffff82d3e298 r dummy_irq_info_funcs -ffffffff82d3e2a8 r hpd_irq_info_funcs -ffffffff82d3e2b8 r hpd_rx_irq_info_funcs -ffffffff82d3e2c8 r pflip_irq_info_funcs -ffffffff82d3e2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d3e2e8 r vblank_irq_info_funcs -ffffffff82d3e2f8 r vline0_irq_info_funcs -ffffffff82d3e308 r outbox_irq_info_funcs -ffffffff82d3f000 r irq_source_info_dcn315 -ffffffff82d40290 r irq_service_funcs_dcn315 -ffffffff82d40298 r dummy_irq_info_funcs -ffffffff82d402a8 r hpd_irq_info_funcs -ffffffff82d402b8 r hpd_rx_irq_info_funcs -ffffffff82d402c8 r pflip_irq_info_funcs -ffffffff82d402d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d402e8 r vblank_irq_info_funcs -ffffffff82d402f8 r vline0_irq_info_funcs -ffffffff82d40308 r outbox_irq_info_funcs -ffffffff82d41000 r irq_source_info_dcn32 -ffffffff82d42290 r irq_service_funcs_dcn32 -ffffffff82d42298 r dummy_irq_info_funcs -ffffffff82d422a8 r hpd_irq_info_funcs -ffffffff82d422b8 r hpd_rx_irq_info_funcs -ffffffff82d422c8 r pflip_irq_info_funcs -ffffffff82d422d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d422e8 r vblank_irq_info_funcs -ffffffff82d422f8 r vline0_irq_info_funcs -ffffffff82d42308 r outbox_irq_info_funcs -ffffffff82d44000 r dio_link_hwss -ffffffff82d45000 r dio_fixed_vs_pe_retimer_link_hwss -ffffffff82d46000 r dpia_link_hwss -ffffffff82d47000 r hpo_dp_link_hwss -ffffffff82d48000 r hpo_fixed_vs_pe_retimer_dp_link_hwss -ffffffff82d49000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82d4a000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82d4a006 r DP_DVI_CONVERTER_ID_4 -ffffffff82d4a00d r DP_DVI_CONVERTER_ID_5 -ffffffff82d4b000 r dp_lt_fallbacks -ffffffff82d4f000 r mandatory_dpcd_partitions -ffffffff82d50000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82d50007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82d51000 r virtual_lnk_enc_funcs -ffffffff82d52000 r virtual_link_hwss -ffffffff82d53000 r virtual_str_enc_funcs -ffffffff82d54000 R dmub_srv_dcn20_regs -ffffffff82d55000 R dmub_srv_dcn21_regs -ffffffff82d56000 R dmub_srv_dcn30_regs -ffffffff82d57000 R dmub_srv_dcn301_regs -ffffffff82d58000 R dmub_srv_dcn302_regs -ffffffff82d59000 R dmub_srv_dcn303_regs -ffffffff82d5a000 R dmub_srv_dcn31_regs -ffffffff82d5b000 R dmub_srv_dcn314_regs -ffffffff82d5c000 R dmub_srv_dcn315_regs -ffffffff82d5d000 R dmub_srv_dcn316_regs -ffffffff82d5e000 R dmub_srv_dcn32_regs -ffffffff82d5f000 r numerator01 -ffffffff82d5f020 r numerator02 -ffffffff82d5f040 r numerator04 -ffffffff82d5f060 r numerator05 -ffffffff82d63000 r abm_settings -ffffffff82d63020 r abm_settings_config0 -ffffffff82d63060 r abm_settings_config1 -ffffffff82d630a0 r abm_settings_config2 -ffffffff82d630d8 r min_reduction_table_v_2_2 -ffffffff82d630e5 r max_reduction_table_v_2_2 -ffffffff82d630f2 r min_reduction_table -ffffffff82d630ff r max_reduction_table -ffffffff82d63110 r custom_backlight_curve0 -ffffffff82d64000 R amdgpu_pp_profile_name -ffffffff82d65000 r pp_lib_thermal_controller_names -ffffffff82d66000 r pp_ip_funcs -ffffffff82d660a0 R pp_smu_ip_block -ffffffff82d660b8 r pp_dpm_funcs -ffffffff82d67000 r gpio_tbl -ffffffff82d670f0 r enable_fb_req_rej_tbl -ffffffff82d67140 r use_bclk_tbl -ffffffff82d67310 r turn_off_plls_tbl -ffffffff82d67640 r enter_baco_tbl -ffffffff82d67730 r exit_baco_tbl -ffffffff82d67850 r clean_baco_tbl +ffffffff82d26000 r funcs +ffffffff82d27000 r hdmi_14_protection +ffffffff82d27010 r dp_11_protection +ffffffff82d27020 r hdcp_i2c_offsets +ffffffff82d27050 r hdcp_dpcd_addrs +ffffffff82d28000 r irq_service_funcs_dce110 +ffffffff82d28008 r dummy_irq_info_funcs +ffffffff82d28018 r hpd_irq_info_funcs +ffffffff82d28028 r hpd_rx_irq_info_funcs +ffffffff82d28038 r pflip_irq_info_funcs +ffffffff82d28048 r vupdate_irq_info_funcs +ffffffff82d28058 r vblank_irq_info_funcs +ffffffff82d28070 r irq_source_info_dce110 +ffffffff82d2a000 r irq_service_funcs_dce120 +ffffffff82d2a008 r dummy_irq_info_funcs +ffffffff82d2a018 r hpd_irq_info_funcs +ffffffff82d2a028 r hpd_rx_irq_info_funcs +ffffffff82d2a038 r pflip_irq_info_funcs +ffffffff82d2a048 r vupdate_irq_info_funcs +ffffffff82d2a058 r vblank_irq_info_funcs +ffffffff82d2a070 r irq_source_info_dce120 +ffffffff82d2c000 r irq_service_funcs_dce80 +ffffffff82d2c008 r dummy_irq_info_funcs +ffffffff82d2c018 r hpd_irq_info_funcs +ffffffff82d2c028 r hpd_rx_irq_info_funcs +ffffffff82d2c038 r pflip_irq_info_funcs +ffffffff82d2c048 r vupdate_irq_info_funcs +ffffffff82d2c058 r vblank_irq_info_funcs +ffffffff82d2c070 r irq_source_info_dce80 +ffffffff82d2e000 r irq_service_funcs_dcn10 +ffffffff82d2e008 r dummy_irq_info_funcs +ffffffff82d2e018 r hpd_irq_info_funcs +ffffffff82d2e028 r hpd_rx_irq_info_funcs +ffffffff82d2e038 r pflip_irq_info_funcs +ffffffff82d2e048 r vupdate_no_lock_irq_info_funcs +ffffffff82d2e058 r vblank_irq_info_funcs +ffffffff82d2e068 r vline0_irq_info_funcs +ffffffff82d2e080 r irq_source_info_dcn10 +ffffffff82d30000 r irq_service_funcs_dcn20 +ffffffff82d30008 r dummy_irq_info_funcs +ffffffff82d30018 r hpd_irq_info_funcs +ffffffff82d30028 r hpd_rx_irq_info_funcs +ffffffff82d30038 r pflip_irq_info_funcs +ffffffff82d30048 r vupdate_no_lock_irq_info_funcs +ffffffff82d30058 r vblank_irq_info_funcs +ffffffff82d30068 r vline0_irq_info_funcs +ffffffff82d30080 r irq_source_info_dcn20 +ffffffff82d32000 r irq_service_funcs_dcn201 +ffffffff82d32008 r dummy_irq_info_funcs +ffffffff82d32018 r hpd_irq_info_funcs +ffffffff82d32028 r hpd_rx_irq_info_funcs +ffffffff82d32038 r pflip_irq_info_funcs +ffffffff82d32048 r vupdate_no_lock_irq_info_funcs +ffffffff82d32058 r vblank_irq_info_funcs +ffffffff82d32068 r vline0_irq_info_funcs +ffffffff82d32080 r irq_source_info_dcn201 +ffffffff82d34000 r irq_source_info_dcn21 +ffffffff82d35290 r irq_service_funcs_dcn21 +ffffffff82d35298 r dummy_irq_info_funcs +ffffffff82d352a8 r hpd_irq_info_funcs +ffffffff82d352b8 r hpd_rx_irq_info_funcs +ffffffff82d352c8 r pflip_irq_info_funcs +ffffffff82d352d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d352e8 r vblank_irq_info_funcs +ffffffff82d352f8 r vline0_irq_info_funcs +ffffffff82d35308 r dmub_outbox_irq_info_funcs +ffffffff82d36000 r irq_source_info_dcn30 +ffffffff82d37290 r irq_service_funcs_dcn30 +ffffffff82d37298 r dummy_irq_info_funcs +ffffffff82d372a8 r hpd_irq_info_funcs +ffffffff82d372b8 r hpd_rx_irq_info_funcs +ffffffff82d372c8 r pflip_irq_info_funcs +ffffffff82d372d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d372e8 r vblank_irq_info_funcs +ffffffff82d372f8 r vline0_irq_info_funcs +ffffffff82d37308 r dmub_trace_irq_info_funcs +ffffffff82d38000 r irq_source_info_dcn302 +ffffffff82d39290 r irq_service_funcs_dcn302 +ffffffff82d39298 r dummy_irq_info_funcs +ffffffff82d392a8 r hpd_irq_info_funcs +ffffffff82d392b8 r hpd_rx_irq_info_funcs +ffffffff82d392c8 r pflip_irq_info_funcs +ffffffff82d392d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d392e8 r vblank_irq_info_funcs +ffffffff82d392f8 r vline0_irq_info_funcs +ffffffff82d39308 r dmub_trace_irq_info_funcs +ffffffff82d3a000 r irq_service_funcs_dcn303 +ffffffff82d3a008 r dummy_irq_info_funcs +ffffffff82d3a018 r hpd_irq_info_funcs +ffffffff82d3a028 r hpd_rx_irq_info_funcs +ffffffff82d3a038 r pflip_irq_info_funcs +ffffffff82d3a048 r vupdate_no_lock_irq_info_funcs +ffffffff82d3a058 r vblank_irq_info_funcs +ffffffff82d3a068 r vline0_irq_info_funcs +ffffffff82d3a080 r irq_source_info_dcn303 +ffffffff82d3c000 r irq_source_info_dcn31 +ffffffff82d3d290 r irq_service_funcs_dcn31 +ffffffff82d3d298 r dummy_irq_info_funcs +ffffffff82d3d2a8 r hpd_irq_info_funcs +ffffffff82d3d2b8 r hpd_rx_irq_info_funcs +ffffffff82d3d2c8 r pflip_irq_info_funcs +ffffffff82d3d2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d3d2e8 r vblank_irq_info_funcs +ffffffff82d3d2f8 r vline0_irq_info_funcs +ffffffff82d3d308 r outbox_irq_info_funcs +ffffffff82d3e000 r irq_source_info_dcn314 +ffffffff82d3f290 r irq_service_funcs_dcn314 +ffffffff82d3f298 r dummy_irq_info_funcs +ffffffff82d3f2a8 r hpd_irq_info_funcs +ffffffff82d3f2b8 r hpd_rx_irq_info_funcs +ffffffff82d3f2c8 r pflip_irq_info_funcs +ffffffff82d3f2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d3f2e8 r vblank_irq_info_funcs +ffffffff82d3f2f8 r vline0_irq_info_funcs +ffffffff82d3f308 r outbox_irq_info_funcs +ffffffff82d40000 r irq_source_info_dcn315 +ffffffff82d41290 r irq_service_funcs_dcn315 +ffffffff82d41298 r dummy_irq_info_funcs +ffffffff82d412a8 r hpd_irq_info_funcs +ffffffff82d412b8 r hpd_rx_irq_info_funcs +ffffffff82d412c8 r pflip_irq_info_funcs +ffffffff82d412d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d412e8 r vblank_irq_info_funcs +ffffffff82d412f8 r vline0_irq_info_funcs +ffffffff82d41308 r outbox_irq_info_funcs +ffffffff82d42000 r irq_source_info_dcn32 +ffffffff82d43290 r irq_service_funcs_dcn32 +ffffffff82d43298 r dummy_irq_info_funcs +ffffffff82d432a8 r hpd_irq_info_funcs +ffffffff82d432b8 r hpd_rx_irq_info_funcs +ffffffff82d432c8 r pflip_irq_info_funcs +ffffffff82d432d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d432e8 r vblank_irq_info_funcs +ffffffff82d432f8 r vline0_irq_info_funcs +ffffffff82d43308 r outbox_irq_info_funcs +ffffffff82d45000 r dio_link_hwss +ffffffff82d46000 r dio_fixed_vs_pe_retimer_link_hwss +ffffffff82d47000 r dpia_link_hwss +ffffffff82d48000 r hpo_dp_link_hwss +ffffffff82d49000 r hpo_fixed_vs_pe_retimer_dp_link_hwss +ffffffff82d4a000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82d4b000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82d4b006 r DP_DVI_CONVERTER_ID_4 +ffffffff82d4b00d r DP_DVI_CONVERTER_ID_5 +ffffffff82d4c000 r dp_lt_fallbacks +ffffffff82d50000 r mandatory_dpcd_partitions +ffffffff82d51000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82d51007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82d52000 r virtual_lnk_enc_funcs +ffffffff82d53000 r virtual_link_hwss +ffffffff82d54000 r virtual_str_enc_funcs +ffffffff82d55000 R dmub_srv_dcn20_regs +ffffffff82d56000 R dmub_srv_dcn21_regs +ffffffff82d57000 R dmub_srv_dcn30_regs +ffffffff82d58000 R dmub_srv_dcn301_regs +ffffffff82d59000 R dmub_srv_dcn302_regs +ffffffff82d5a000 R dmub_srv_dcn303_regs +ffffffff82d5b000 R dmub_srv_dcn31_regs +ffffffff82d5c000 R dmub_srv_dcn314_regs +ffffffff82d5d000 R dmub_srv_dcn315_regs +ffffffff82d5e000 R dmub_srv_dcn316_regs +ffffffff82d5f000 R dmub_srv_dcn32_regs +ffffffff82d60000 r numerator01 +ffffffff82d60020 r numerator02 +ffffffff82d60040 r numerator04 +ffffffff82d60060 r numerator05 +ffffffff82d64000 r abm_settings +ffffffff82d64020 r abm_settings_config0 +ffffffff82d64060 r abm_settings_config1 +ffffffff82d640a0 r abm_settings_config2 +ffffffff82d640d8 r min_reduction_table_v_2_2 +ffffffff82d640e5 r max_reduction_table_v_2_2 +ffffffff82d640f2 r min_reduction_table +ffffffff82d640ff r max_reduction_table +ffffffff82d64110 r custom_backlight_curve0 +ffffffff82d65000 R amdgpu_pp_profile_name +ffffffff82d66000 r pp_lib_thermal_controller_names +ffffffff82d67000 r pp_ip_funcs +ffffffff82d670a0 R pp_smu_ip_block +ffffffff82d670b8 r pp_dpm_funcs ffffffff82d68000 r gpio_tbl ffffffff82d680f0 r enable_fb_req_rej_tbl ffffffff82d68140 r use_bclk_tbl -ffffffff82d682e0 r turn_off_plls_tbl -ffffffff82d68370 r clk_req_b_tbl -ffffffff82d68490 r enter_baco_tbl -ffffffff82d685b0 r exit_baco_tbl -ffffffff82d686d0 r clean_baco_tbl +ffffffff82d68310 r turn_off_plls_tbl +ffffffff82d68640 r enter_baco_tbl +ffffffff82d68730 r exit_baco_tbl +ffffffff82d68850 r clean_baco_tbl ffffffff82d69000 r gpio_tbl ffffffff82d690f0 r enable_fb_req_rej_tbl -ffffffff82d69140 r use_bclk_tbl_vg -ffffffff82d69200 r turn_off_plls_tbl_vg -ffffffff82d69350 r use_bclk_tbl -ffffffff82d69440 r turn_off_plls_tbl -ffffffff82d695f0 r clk_req_b_tbl -ffffffff82d69710 r enter_baco_tbl -ffffffff82d69830 r exit_baco_tbl -ffffffff82d69950 r clean_baco_tbl -ffffffff82d6a000 r vega10_fuses_default -ffffffff82d79000 r pp_r600_encode_lanes -ffffffff82d7a000 R pptable_v1_0_funcs -ffffffff82d7b000 R pptable_funcs -ffffffff82d7b020 r soft_dummy_pp_table -ffffffff82d7c000 r smu10_hwmgr_funcs -ffffffff82d7d000 r smu7_hwmgr_funcs -ffffffff82d7d2f8 r smu7_irq_funcs -ffffffff82d7d310 r SMU7ThermalPolicy -ffffffff82d7e000 r GCCACConfig_Polaris10 -ffffffff82d7e1b0 r DIDTConfig_Polaris10 -ffffffff82d7ea50 r GCCACConfig_Polaris11 -ffffffff82d7ec00 r DIDTConfig_Polaris11_Kicker -ffffffff82d7f4a0 r DIDTConfig_Polaris11 -ffffffff82d7fd40 r DIDTConfig_Polaris12 -ffffffff82d805e0 r GCCACConfig_VegaM -ffffffff82d80790 r DIDTConfig_VegaM -ffffffff82d82000 r smu8_hwmgr_funcs -ffffffff82d822f0 r SMU7ThermalPolicy -ffffffff82d83000 r smu9_irq_funcs -ffffffff82d84000 r gpio_tbl_iceland -ffffffff82d84060 r gpio_tbl -ffffffff82d84150 r enable_fb_req_rej_tbl -ffffffff82d841a0 r use_bclk_tbl -ffffffff82d84370 r turn_off_plls_tbl -ffffffff82d84610 r enter_baco_tbl -ffffffff82d84730 r exit_baco_tbl_iceland -ffffffff82d84870 r clean_baco_tbl_iceland -ffffffff82d84890 r exit_baco_tbl -ffffffff82d849b0 r clean_baco_tbl -ffffffff82d85000 r pre_baco_tbl -ffffffff82d85090 r enter_baco_tbl -ffffffff82d852b0 r exit_baco_tbl -ffffffff82d85520 r clean_baco_tbl -ffffffff82d86000 r vega10_hwmgr_funcs -ffffffff82d862f0 r channel_number -ffffffff82d86320 r SMU7ThermalWithDelayPolicy -ffffffff82d87000 r SEDiDtStallCtrlConfig_vega10 -ffffffff82d87110 r SEDiDtStallPatternConfig_vega10 -ffffffff82d872e0 r SEDiDtWeightConfig_Vega10 -ffffffff82d873b0 r SEDiDtCtrl1Config_Vega10 -ffffffff82d87440 r SEDiDtCtrl2Config_Vega10 -ffffffff82d87510 r SEDiDtCtrl3Config_vega10 -ffffffff82d87820 r SEDiDtTuningCtrlConfig_Vega10 -ffffffff82d878b0 r SELCacConfig_Vega10 -ffffffff82d87a40 r SEDiDtCtrl0Config_Vega10 -ffffffff82d87d10 r AvfsPSMInitConfig_vega10 -ffffffff82d87d90 r SEEDCStallPatternConfig_Vega10 -ffffffff82d87ea0 r SEEDCStallDelayConfig_Vega10 -ffffffff82d87f80 r SEEDCCtrlConfig_Vega10 -ffffffff82d88040 r PSMSEEDCStallPatternConfig_Vega10 -ffffffff82d880c0 r PSMSEEDCStallDelayConfig_Vega10 -ffffffff82d881d0 r PSMSEEDCCtrlResetConfig_Vega10 -ffffffff82d88290 r PSMSEEDCCtrlConfig_Vega10 -ffffffff82d88350 r SEEDCForceStallPatternConfig_Vega10 -ffffffff82d883e0 r SEEDCCtrlForceStallConfig_Vega10 -ffffffff82d89000 R vega10_pptable_funcs -ffffffff82d8a000 r pre_baco_tbl -ffffffff82d8a090 r enter_baco_tbl -ffffffff82d8a2b0 r exit_baco_tbl -ffffffff82d8a520 r clean_baco_tbl -ffffffff82d8b000 r vega12_hwmgr_funcs -ffffffff82d8b2f0 r SMU7ThermalWithDelayPolicy -ffffffff82d8b340 r link_width -ffffffff82d8c000 R vega12_pptable_funcs -ffffffff82d8d000 r clean_baco_tbl -ffffffff82d8e000 r vega20_hwmgr_funcs -ffffffff82d8e2f0 r SMU7ThermalWithDelayPolicy -ffffffff82d8e340 r link_width -ffffffff82d8f000 R vega20_pptable_funcs -ffffffff82d90000 R ci_smu_funcs -ffffffff82d900e0 r defaults_hawaii_pro -ffffffff82d9012c r defaults_hawaii_xt -ffffffff82d90178 r defaults_saturn_xt -ffffffff82d901c4 r defaults_bonaire_xt -ffffffff82d90210 r ci_program_jump_on_start.data -ffffffff82d91000 R fiji_smu_funcs -ffffffff82d910e0 r avfs_graphics_level -ffffffff82d91240 r fiji_power_tune_data_set_array -ffffffff82d91246 r fiji_clock_stretch_amount_conversion -ffffffff82d91260 r fiji_clock_stretcher_ddt_table -ffffffff82d92000 R iceland_smu_funcs -ffffffff82d920e0 r defaults_icelandxt -ffffffff82d9212c r defaults_icelandpro -ffffffff82d92178 r defaults_iceland -ffffffff82d93000 R polaris10_smu_funcs -ffffffff82d930e0 r avfs_graphics_level_polaris10 -ffffffff82d932a0 r avfs_memory_level_polaris10 -ffffffff82d932c0 r polaris10_power_tune_data_set_array -ffffffff82d93310 r Range_Table -ffffffff82d94000 R smu10_smu_funcs -ffffffff82d95000 r smu7_program_jump_on_start.data -ffffffff82d95010 r pwr_virus_table_pre -ffffffff82d95680 r pwr_virus_table_post -ffffffff82d95f80 r pwr_virus_section1 -ffffffff82d96610 r pwr_virus_section2 -ffffffff82d96660 r pwr_virus_section3 -ffffffff82d9dab0 r pwr_virus_section4 -ffffffff82d9de80 r pwr_virus_section5 -ffffffff82d9e490 r pwr_virus_section6 -ffffffff82da0000 R smu8_smu_funcs -ffffffff82da1000 R tonga_smu_funcs -ffffffff82da10e0 r tonga_power_tune_data_set_array -ffffffff82da112c r tonga_clock_stretch_amount_conversion -ffffffff82da1140 r tonga_clock_stretcher_ddt_table -ffffffff82da2000 R vega10_smu_funcs -ffffffff82da3000 R vega12_smu_funcs -ffffffff82da4000 R vega20_smu_funcs -ffffffff82da5000 R vegam_smu_funcs -ffffffff82da50e0 r vegam_power_tune_data_set_array -ffffffff82da5130 r Range_Table -ffffffff82da6000 R smu_ip_funcs -ffffffff82da60a0 R smu_v11_0_ip_block -ffffffff82da60b8 R smu_v12_0_ip_block -ffffffff82da60d0 R smu_v13_0_ip_block -ffffffff82da60e8 r swsmu_pm_funcs -ffffffff82da7000 r arcturus_ppt_funcs -ffffffff82da73f0 r arcturus_table_map -ffffffff82da7470 r arcturus_pwr_src_map -ffffffff82da7480 r arcturus_workload_map -ffffffff82da74d0 r smu11_thermal_policy -ffffffff82da7528 r arcturus_i2c_algo -ffffffff82da7538 r arcturus_i2c_control_quirks -ffffffff82da7550 r arcturus_throttler_map -ffffffff82da7570 r arcturus_message_map -ffffffff82da7ff0 r arcturus_clk_map -ffffffff82da80b0 r arcturus_feature_mask_map -ffffffff82da9000 r cyan_skillfish_ppt_funcs -ffffffff82daa000 r navi10_ppt_funcs -ffffffff82daa3f0 r smu11_thermal_policy -ffffffff82daa448 r navi10_i2c_algo -ffffffff82daa458 r navi10_i2c_control_quirks -ffffffff82daa470 r navi1x_throttler_map -ffffffff82daa490 r NoDbiPrbs7 -ffffffff82dab490 r DbiPrbs7 -ffffffff82dad000 r sienna_cichlid_ppt_funcs -ffffffff82dad3f0 r smu11_thermal_policy -ffffffff82dad448 r sienna_cichlid_i2c_algo -ffffffff82dad458 r sienna_cichlid_i2c_control_quirks -ffffffff82dad470 r sienna_cichlid_throttler_map -ffffffff82dae000 r smu_v11_0_irq_funcs -ffffffff82dae010 r link_width -ffffffff82daf000 r vangogh_ppt_funcs -ffffffff82daf3e8 r vangogh_throttler_map -ffffffff82db0000 r renoir_ppt_funcs -ffffffff82db03e8 r renoir_throttler_map -ffffffff82db1000 r aldebaran_ppt_funcs -ffffffff82db13f0 r aldebaran_clk_map -ffffffff82db14b0 r aldebaran_table_map -ffffffff82db1530 r smu13_thermal_policy -ffffffff82db1588 r aldebaran_i2c_algo -ffffffff82db1598 r aldebaran_i2c_control_quirks -ffffffff82db15b0 r aldebaran_throttler_map -ffffffff82db15d0 r aldebaran_message_map -ffffffff82db2050 r aldebaran_feature_mask_map -ffffffff82db3000 R pmfw_decoded_link_speed -ffffffff82db3020 R pmfw_decoded_link_width -ffffffff82db3040 r smu_v13_0_irq_funcs -ffffffff82db4000 r smu_v13_0_0_ppt_funcs -ffffffff82db43f0 r smu13_thermal_policy -ffffffff82db4448 r smu_v13_0_0_i2c_algo -ffffffff82db4458 r smu_v13_0_0_i2c_control_quirks -ffffffff82db4470 r smu_v13_0_0_throttler_map -ffffffff82db5000 r smu_v13_0_4_ppt_funcs -ffffffff82db6000 r smu_v13_0_5_ppt_funcs -ffffffff82db7000 r smu_v13_0_6_ppt_funcs -ffffffff82db73f0 r smu_v13_0_6_message_map -ffffffff82db7e70 r smu_v13_0_6_clk_map -ffffffff82db7f30 r smu_v13_0_6_table_map -ffffffff82db7fb0 r smu_v13_0_6_i2c_algo -ffffffff82db7fc0 r smu_v13_0_6_i2c_control_quirks -ffffffff82db7fd0 r smu_v13_0_6_irq_funcs -ffffffff82db7fe0 r smu_v13_0_6_throttler_map -ffffffff82db7ff0 r smu_v13_0_6_feature_mask_map -ffffffff82db9000 r smu_v13_0_7_ppt_funcs -ffffffff82db93f0 r smu13_thermal_policy -ffffffff82db9450 r smu_v13_0_7_throttler_map -ffffffff82dba000 r yellow_carp_ppt_funcs -ffffffff82dbb000 R link_speed -ffffffff82dbb020 r __smu_message_names -ffffffff82dbc000 R pchb_ca -ffffffff82dbd000 R amas_ca -ffffffff82dbd028 R amas_devices -ffffffff82dbd040 r amas_feature -ffffffff82dbe000 R cardslot_ca -ffffffff82dbf000 R cardbus_ca -ffffffff82dc0000 R com_cardbus_ca -ffffffff82dc1000 R xl_cardbus_ca -ffffffff82dc1030 R xl_cardbus_products -ffffffff82dc2000 R dc_cardbus_ca -ffffffff82dc2030 R dc_cardbus_devices -ffffffff82dc3000 R fxp_cardbus_ca -ffffffff82dc3028 R fxp_cardbus_devices -ffffffff82dc4000 R rl_cardbus_devices -ffffffff82dc4028 R rl_cardbus_ca -ffffffff82dc5000 R re_cardbus_ca -ffffffff82dc5028 R re_cardbus_devices -ffffffff82dc6000 R ath_cardbus_ca -ffffffff82dc7000 R athn_cardbus_ca -ffffffff82dc7030 r athn_cardbus_devices -ffffffff82dc8000 R atw_cardbus_ca -ffffffff82dc8028 R atw_cardbus_devices -ffffffff82dc9000 R rtw_cardbus_ca -ffffffff82dc9028 R rtw_cardbus_devices -ffffffff82dca000 R ral_cardbus_ca -ffffffff82dca030 r ral_cardbus_devices -ffffffff82dcb000 R acx_cardbus_ca -ffffffff82dcb028 r acx_cardbus_devices -ffffffff82dcc000 R pgt_cardbus_ca -ffffffff82dcc028 R pgt_cardbus_devices -ffffffff82dcd000 R ehci_cardbus_ca -ffffffff82dce000 R ohci_cardbus_ca -ffffffff82dcf000 R uhci_cardbus_ca -ffffffff82dd0000 R malo_cardbus_ca -ffffffff82dd0028 r malo_cardbus_devices -ffffffff82dd1000 R bwi_cardbus_ca -ffffffff82dd1030 r bwi_cardbus_devices -ffffffff82dd2000 R pcmcia_ca -ffffffff82dd3000 r pcmcia_parse_cis_tuple.init_cfe -ffffffff82dd4000 r pcmcia_cis_quirks -ffffffff82dd5000 R ep_pcmcia_ca -ffffffff82dd6000 R ne_pcmcia_ca -ffffffff82dd6030 R ne2000devs -ffffffff82dd8000 R aic_pcmcia_ca -ffffffff82dd9000 R com_pcmcia_ca -ffffffff82dda000 R wdc_pcmcia_ca -ffffffff82ddb000 R sm_pcmcia_ca -ffffffff82ddc000 R xe_pcmcia_ca -ffffffff82ddd000 R wi_pcmcia_ca -ffffffff82ddd030 r wi_pcmcia_products -ffffffff82dde000 R malo_pcmcia_ca -ffffffff82ddf000 R an_pcmcia_ca -ffffffff82de0000 R pcib_ca -ffffffff82de1000 R amdpcib_ca -ffffffff82de1028 R amdpcib_devices -ffffffff82de2000 R tcpcib_ca -ffffffff82de2028 R tcpcib_devices -ffffffff82de3000 R aapic_ca -ffffffff82de4000 R hme_pci_ca -ffffffff82de4028 r hme_promhdr -ffffffff82de402a r hme_promdat -ffffffff82de5000 R isa_ca -ffffffff82de6000 R isadma_ca -ffffffff82de7000 R fdc_ca -ffffffff82de8000 R fd_ca -ffffffff82de9000 R com_isa_ca -ffffffff82dea000 R pckbc_isa_ca -ffffffff82deb000 R vga_isa_ca -ffffffff82dec000 R wdc_isa_ca -ffffffff82ded000 R mpu_midi_hw_if -ffffffff82dee000 R mpu_isa_ca -ffffffff82def000 R pcppi_ca -ffffffff82df0000 R spkr_ca -ffffffff82df0030 r pitchtab -ffffffff82df1000 R lpt_isa_ca -ffffffff82df2000 R wbsio_ca -ffffffff82df3000 R schsio_ca -ffffffff82df4000 R lm_isa_ca -ffffffff82df4028 R lm_wbsio_ca -ffffffff82df5000 R it_sensors -ffffffff82df5110 R it_vrfact -ffffffff82df5140 R it_fan_regs -ffffffff82df5160 R it_fan_ext_regs -ffffffff82df5178 R it_ca -ffffffff82df6000 R abitkv_sensors -ffffffff82df6200 R abitaa_sensors -ffffffff82df6480 R abitav_sensors -ffffffff82df6700 R abitas_sensors -ffffffff82df6980 R abitax_sensors -ffffffff82df6bc0 R abitm4_sensors -ffffffff82df6e80 R abitan_sensors -ffffffff82df7120 R abital_sensors -ffffffff82df73a0 R abitaw_sensors -ffffffff82df7700 R abitni_sensors -ffffffff82df79a0 R abitat_sensors -ffffffff82df7cc0 R abitan2_sensors -ffffffff82df7f60 R abitab_sensors -ffffffff82df8220 R abitan3_sensors -ffffffff82df8500 R abitaw2_sensors -ffffffff82df8860 R abitat2_sensors -ffffffff82df8b60 R abitab2_sensors -ffffffff82df8ea0 R abitin_sensors -ffffffff82df91e0 R uguru_ca -ffffffff82dfa000 R aps_ca -ffffffff82dfb000 R wsdisplay_emul_ca -ffffffff82dfb030 r charClass -ffffffff82dfc000 r usl_syncops -ffffffff82dfd000 R wsevent_filtops -ffffffff82dfe000 R wskbd_ca -ffffffff82dff000 r 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-ffffffff83242000 D bpf_bufsize -ffffffff83242004 D bpf_maxbufsize -ffffffff83242008 D bpf_sysctl_lk -ffffffff83243000 D ifg_head -ffffffff83243010 D if_cloners_lock -ffffffff83243020 D if_input_task_locked -ffffffff83243050 D netlock -ffffffff83243060 D ifnetlist -ffffffff83244000 D ifiq_maxlen_drop -ffffffff83244004 D ifiq_maxlen_return -ffffffff83245000 D etherbroadcastaddr -ffffffff83245006 D ether_ipmulticast_min -ffffffff8324500c D ether_ipmulticast_max -ffffffff83245012 D ether_ip6multicast_min -ffffffff83245018 D ether_ip6multicast_max -ffffffff83246000 D etherip_cloner -ffffffff83246030 D etherip_list -ffffffff83247000 D loop_cloner -ffffffff83248000 D ifmedia_mtx -ffffffff83249000 D ppp_compressors -ffffffff83249020 D ppp_cloner -ffffffff8324a000 D ppp_pkt_init -ffffffff8324b000 D ppp_bsd_compress -ffffffff8324c000 D ppp_deflate -ffffffff8324c070 D ppp_deflate_draft -ffffffff8324d000 D tun_cloner -ffffffff8324d030 D tap_cloner -ffffffff8324e000 D bridgeintrq -ffffffff8324e038 D bridge_cloner -ffffffff8324f000 d veb_cloner -ffffffff8324f030 d vport_cloner -ffffffff83250000 D vlan_tagh_lk -ffffffff83250010 D vlan_cloner -ffffffff83250040 D svlan_cloner -ffffffff83251000 D pipex_list_mtx -ffffffff83251010 D pipex_prune -ffffffff83251018 D pipexoutq -ffffffff83251050 d SHAPad2 -ffffffff83252000 D rtmap_gc -ffffffff83252018 D rt_rc -ffffffff83253000 D rt_labels -ffffffff83253010 D rtlabel_mtx -ffffffff83254000 D enc_cloner -ffffffff83255000 D gre_cloner -ffffffff83255030 D gre_list -ffffffff83255040 D mgre_cloner -ffffffff83255070 D egre_cloner -ffffffff832550a0 D nvgre_cloner -ffffffff832550d0 D eoip_cloner -ffffffff83256000 D trunk_cloner -ffffffff83257000 d aggr_cloner -ffffffff83258000 d tpmr_cloner -ffffffff83259000 D mpe_cloner -ffffffff8325a000 D mpw_cloner -ffffffff8325b000 D mpip_cloner -ffffffff8325c000 d bpe_cloner -ffffffff8325c030 d bpe_lock -ffffffff8325d000 D vether_cloner -ffffffff8325e000 D pair_cloner -ffffffff8325f000 d vxlan_cloner -ffffffff8325f030 d vxlan_lock -ffffffff8325f040 d vxlan_teps -ffffffff83260000 D underload_interval -ffffffff83260010 D wg_cloner -ffffffff83261000 d stoeplitz_keyseed -ffffffff83262000 D ieee80211_cache_size -ffffffff83263000 D arpt_prune -ffffffff83263004 D arpt_keep -ffffffff83263008 D arpt_down -ffffffff83263010 D arpinq -ffffffff83263048 D arp_mtx -ffffffff83263058 D arp_maxtries -ffffffff83264000 D ipport_firstauto -ffffffff83264004 D ipport_lastauto -ffffffff83264008 D ipport_hifirstauto -ffffffff8326400c D ipport_hilastauto -ffffffff83265000 D divert_sendspace -ffffffff83265004 D divert_recvspace -ffffffff83265008 D divbhashsize -ffffffff83266000 D icmptstamprepl -ffffffff83266004 D icmperrppslim -ffffffff83266008 D icmp_redirtimeout -ffffffff83267000 D ipsendredirects -ffffffff83267004 D ip_defttl -ffffffff83267008 D ip_mtudisc -ffffffff8326700c D ip_mtudisc_timeout -ffffffff83267010 D ipq_mutex -ffffffff83267020 D ip_maxqueue -ffffffff83267028 D ipintrq -ffffffff83267060 d ipsend_task -ffffffff83267090 d ipsendraw_task -ffffffff83268000 D ip_mrtproto -ffffffff83268004 d sin -ffffffff83269000 D rip_sendspace -ffffffff83269008 D rip_recvspace -ffffffff8326a000 D tcprexmtthresh -ffffffff8326a004 D tcptv_keep_init -ffffffff8326a008 D tcp_rst_ppslim -ffffffff8326a00c D tcp_ackdrop_ppslim -ffffffff8326a010 D tcp_syn_hash_size -ffffffff8326a014 D tcp_syn_cache_limit -ffffffff8326a018 D tcp_syn_bucket_limit -ffffffff8326a01c D tcp_syn_use_limit -ffffffff8326a020 D syn_cache_mtx -ffffffff8326b000 D tcp_outflags -ffffffff8326c000 D tcp_timer_mtx -ffffffff8326c010 D tcp_mssdflt -ffffffff8326c014 D tcp_rttdflt -ffffffff8326c018 D tcp_do_rfc1323 -ffffffff8326c01c D tcp_do_sack -ffffffff8326c020 D tcp_do_rfc3390 -ffffffff8326c024 D tcp_do_tso -ffffffff8326c028 D tcp_reass_limit -ffffffff8326c02c D tcp_sackhole_limit -ffffffff8326d000 D tcp_backoff -ffffffff8326d034 D tcp_totbackoff -ffffffff8326e000 D tcp_sendspace -ffffffff8326e004 D tcp_recvspace -ffffffff8326e008 D tcp_autorcvbuf_inc -ffffffff8326f000 D udpcksum -ffffffff8326f004 D udp_sendspace -ffffffff8326f008 D udp_recvspace -ffffffff83270000 D ipsec_flows_mtx -ffffffff83270010 D ipsec_ids_idle -ffffffff83270014 D ipsec_ids_next_flow -ffffffff83270018 D ipsec_policy_head -ffffffff83270028 D ipsp_ids_gc_timeout -ffffffff83270070 D tdb_sadb_mtx -ffffffff83270080 d tdb_hashmask -ffffffff83271000 D ipo_tdb_mtx -ffffffff83271010 D ipsec_acquire_mtx -ffffffff83271020 D ipsec_acquire_head -ffffffff83272000 D ipsec_keep_invalid -ffffffff83272004 D ipsec_require_pfs -ffffffff83272008 D ipsec_soft_timeout -ffffffff8327200c D ipsec_exp_timeout -ffffffff83272010 D ipsec_soft_first_use -ffffffff83272014 D ipsec_exp_first_use -ffffffff83272018 D ipsec_expire_acquire -ffffffff8327201c D esp_enable -ffffffff83272020 D ah_enable -ffffffff83273000 D udpencap_enable -ffffffff83273004 D udpencap_port -ffffffff83274000 D carp_vh_rc -ffffffff83274020 D carp_sc_rc -ffffffff83274040 D carp_opts -ffffffff83274058 D carp_cloner -ffffffff83274088 d carp_send_na.mcast -ffffffff83275000 d PADDING +ffffffff82d69140 r use_bclk_tbl +ffffffff82d692e0 r turn_off_plls_tbl +ffffffff82d69370 r clk_req_b_tbl +ffffffff82d69490 r enter_baco_tbl +ffffffff82d695b0 r exit_baco_tbl +ffffffff82d696d0 r clean_baco_tbl +ffffffff82d6a000 r gpio_tbl +ffffffff82d6a0f0 r enable_fb_req_rej_tbl +ffffffff82d6a140 r use_bclk_tbl_vg +ffffffff82d6a200 r turn_off_plls_tbl_vg +ffffffff82d6a350 r use_bclk_tbl +ffffffff82d6a440 r turn_off_plls_tbl +ffffffff82d6a5f0 r clk_req_b_tbl +ffffffff82d6a710 r enter_baco_tbl +ffffffff82d6a830 r exit_baco_tbl +ffffffff82d6a950 r clean_baco_tbl +ffffffff82d6b000 r vega10_fuses_default +ffffffff82d7a000 r pp_r600_encode_lanes +ffffffff82d7b000 R pptable_v1_0_funcs +ffffffff82d7c000 R pptable_funcs +ffffffff82d7c020 r soft_dummy_pp_table +ffffffff82d7d000 r smu10_hwmgr_funcs +ffffffff82d7e000 r smu7_hwmgr_funcs +ffffffff82d7e2f8 r smu7_irq_funcs +ffffffff82d7e310 r SMU7ThermalPolicy +ffffffff82d7f000 r GCCACConfig_Polaris10 +ffffffff82d7f1b0 r DIDTConfig_Polaris10 +ffffffff82d7fa50 r GCCACConfig_Polaris11 +ffffffff82d7fc00 r DIDTConfig_Polaris11_Kicker +ffffffff82d804a0 r DIDTConfig_Polaris11 +ffffffff82d80d40 r DIDTConfig_Polaris12 +ffffffff82d815e0 r GCCACConfig_VegaM +ffffffff82d81790 r DIDTConfig_VegaM +ffffffff82d83000 r smu8_hwmgr_funcs +ffffffff82d832f0 r SMU7ThermalPolicy +ffffffff82d84000 r smu9_irq_funcs +ffffffff82d85000 r gpio_tbl_iceland +ffffffff82d85060 r gpio_tbl +ffffffff82d85150 r enable_fb_req_rej_tbl +ffffffff82d851a0 r use_bclk_tbl +ffffffff82d85370 r turn_off_plls_tbl +ffffffff82d85610 r enter_baco_tbl +ffffffff82d85730 r exit_baco_tbl_iceland +ffffffff82d85870 r clean_baco_tbl_iceland +ffffffff82d85890 r exit_baco_tbl +ffffffff82d859b0 r clean_baco_tbl +ffffffff82d86000 r pre_baco_tbl +ffffffff82d86090 r enter_baco_tbl +ffffffff82d862b0 r exit_baco_tbl +ffffffff82d86520 r clean_baco_tbl +ffffffff82d87000 r vega10_hwmgr_funcs +ffffffff82d872f0 r channel_number +ffffffff82d87320 r SMU7ThermalWithDelayPolicy +ffffffff82d88000 r SEDiDtStallCtrlConfig_vega10 +ffffffff82d88110 r SEDiDtStallPatternConfig_vega10 +ffffffff82d882e0 r SEDiDtWeightConfig_Vega10 +ffffffff82d883b0 r SEDiDtCtrl1Config_Vega10 +ffffffff82d88440 r SEDiDtCtrl2Config_Vega10 +ffffffff82d88510 r SEDiDtCtrl3Config_vega10 +ffffffff82d88820 r SEDiDtTuningCtrlConfig_Vega10 +ffffffff82d888b0 r SELCacConfig_Vega10 +ffffffff82d88a40 r SEDiDtCtrl0Config_Vega10 +ffffffff82d88d10 r AvfsPSMInitConfig_vega10 +ffffffff82d88d90 r SEEDCStallPatternConfig_Vega10 +ffffffff82d88ea0 r SEEDCStallDelayConfig_Vega10 +ffffffff82d88f80 r SEEDCCtrlConfig_Vega10 +ffffffff82d89040 r PSMSEEDCStallPatternConfig_Vega10 +ffffffff82d890c0 r PSMSEEDCStallDelayConfig_Vega10 +ffffffff82d891d0 r PSMSEEDCCtrlResetConfig_Vega10 +ffffffff82d89290 r PSMSEEDCCtrlConfig_Vega10 +ffffffff82d89350 r SEEDCForceStallPatternConfig_Vega10 +ffffffff82d893e0 r SEEDCCtrlForceStallConfig_Vega10 +ffffffff82d8a000 R vega10_pptable_funcs +ffffffff82d8b000 r pre_baco_tbl +ffffffff82d8b090 r enter_baco_tbl +ffffffff82d8b2b0 r exit_baco_tbl +ffffffff82d8b520 r clean_baco_tbl +ffffffff82d8c000 r vega12_hwmgr_funcs +ffffffff82d8c2f0 r SMU7ThermalWithDelayPolicy +ffffffff82d8c340 r link_width +ffffffff82d8d000 R vega12_pptable_funcs +ffffffff82d8e000 r clean_baco_tbl +ffffffff82d8f000 r vega20_hwmgr_funcs +ffffffff82d8f2f0 r SMU7ThermalWithDelayPolicy +ffffffff82d8f340 r link_width +ffffffff82d90000 R vega20_pptable_funcs +ffffffff82d91000 R ci_smu_funcs +ffffffff82d910e0 r defaults_hawaii_pro +ffffffff82d9112c r defaults_hawaii_xt +ffffffff82d91178 r defaults_saturn_xt +ffffffff82d911c4 r defaults_bonaire_xt +ffffffff82d91210 r ci_program_jump_on_start.data +ffffffff82d92000 R fiji_smu_funcs +ffffffff82d920e0 r avfs_graphics_level +ffffffff82d92240 r fiji_power_tune_data_set_array +ffffffff82d92246 r fiji_clock_stretch_amount_conversion +ffffffff82d92260 r fiji_clock_stretcher_ddt_table +ffffffff82d93000 R iceland_smu_funcs +ffffffff82d930e0 r defaults_icelandxt +ffffffff82d9312c r defaults_icelandpro +ffffffff82d93178 r defaults_iceland +ffffffff82d94000 R polaris10_smu_funcs +ffffffff82d940e0 r avfs_graphics_level_polaris10 +ffffffff82d942a0 r avfs_memory_level_polaris10 +ffffffff82d942c0 r polaris10_power_tune_data_set_array +ffffffff82d94310 r Range_Table +ffffffff82d95000 R smu10_smu_funcs +ffffffff82d96000 r smu7_program_jump_on_start.data +ffffffff82d96010 r pwr_virus_table_pre +ffffffff82d96680 r pwr_virus_table_post +ffffffff82d96f80 r pwr_virus_section1 +ffffffff82d97610 r pwr_virus_section2 +ffffffff82d97660 r pwr_virus_section3 +ffffffff82d9eab0 r pwr_virus_section4 +ffffffff82d9ee80 r pwr_virus_section5 +ffffffff82d9f490 r pwr_virus_section6 +ffffffff82da1000 R smu8_smu_funcs +ffffffff82da2000 R tonga_smu_funcs +ffffffff82da20e0 r tonga_power_tune_data_set_array +ffffffff82da212c r tonga_clock_stretch_amount_conversion +ffffffff82da2140 r tonga_clock_stretcher_ddt_table +ffffffff82da3000 R vega10_smu_funcs +ffffffff82da4000 R vega12_smu_funcs +ffffffff82da5000 R vega20_smu_funcs +ffffffff82da6000 R vegam_smu_funcs +ffffffff82da60e0 r vegam_power_tune_data_set_array +ffffffff82da6130 r Range_Table +ffffffff82da7000 R smu_ip_funcs +ffffffff82da70a0 R smu_v11_0_ip_block +ffffffff82da70b8 R smu_v12_0_ip_block +ffffffff82da70d0 R smu_v13_0_ip_block +ffffffff82da70e8 r swsmu_pm_funcs +ffffffff82da8000 r arcturus_ppt_funcs +ffffffff82da83f0 r arcturus_table_map +ffffffff82da8470 r arcturus_pwr_src_map +ffffffff82da8480 r arcturus_workload_map +ffffffff82da84d0 r smu11_thermal_policy +ffffffff82da8528 r arcturus_i2c_algo +ffffffff82da8538 r arcturus_i2c_control_quirks +ffffffff82da8550 r arcturus_throttler_map +ffffffff82da8570 r arcturus_message_map +ffffffff82da8ff0 r arcturus_clk_map +ffffffff82da90b0 r arcturus_feature_mask_map +ffffffff82daa000 r cyan_skillfish_ppt_funcs +ffffffff82dab000 r navi10_ppt_funcs +ffffffff82dab3f0 r smu11_thermal_policy +ffffffff82dab448 r navi10_i2c_algo +ffffffff82dab458 r navi10_i2c_control_quirks +ffffffff82dab470 r navi1x_throttler_map +ffffffff82dab490 r NoDbiPrbs7 +ffffffff82dac490 r DbiPrbs7 +ffffffff82dae000 r sienna_cichlid_ppt_funcs +ffffffff82dae3f0 r smu11_thermal_policy +ffffffff82dae448 r sienna_cichlid_i2c_algo +ffffffff82dae458 r sienna_cichlid_i2c_control_quirks +ffffffff82dae470 r sienna_cichlid_throttler_map +ffffffff82daf000 r smu_v11_0_irq_funcs +ffffffff82daf010 r link_width +ffffffff82db0000 r vangogh_ppt_funcs +ffffffff82db03e8 r vangogh_throttler_map +ffffffff82db1000 r renoir_ppt_funcs +ffffffff82db13e8 r renoir_throttler_map +ffffffff82db2000 r aldebaran_ppt_funcs +ffffffff82db23f0 r aldebaran_clk_map +ffffffff82db24b0 r aldebaran_table_map +ffffffff82db2530 r smu13_thermal_policy +ffffffff82db2588 r aldebaran_i2c_algo +ffffffff82db2598 r aldebaran_i2c_control_quirks +ffffffff82db25b0 r aldebaran_throttler_map +ffffffff82db25d0 r aldebaran_message_map +ffffffff82db3050 r aldebaran_feature_mask_map +ffffffff82db4000 R pmfw_decoded_link_speed +ffffffff82db4020 R pmfw_decoded_link_width +ffffffff82db4040 r smu_v13_0_irq_funcs +ffffffff82db5000 r smu_v13_0_0_ppt_funcs +ffffffff82db53f0 r smu13_thermal_policy +ffffffff82db5448 r smu_v13_0_0_i2c_algo +ffffffff82db5458 r smu_v13_0_0_i2c_control_quirks +ffffffff82db5470 r smu_v13_0_0_throttler_map +ffffffff82db6000 r smu_v13_0_4_ppt_funcs +ffffffff82db7000 r smu_v13_0_5_ppt_funcs +ffffffff82db8000 r smu_v13_0_6_ppt_funcs +ffffffff82db83f0 r smu_v13_0_6_message_map +ffffffff82db8e70 r smu_v13_0_6_clk_map +ffffffff82db8f30 r smu_v13_0_6_table_map +ffffffff82db8fb0 r smu_v13_0_6_i2c_algo +ffffffff82db8fc0 r smu_v13_0_6_i2c_control_quirks +ffffffff82db8fd0 r smu_v13_0_6_irq_funcs +ffffffff82db8fe0 r smu_v13_0_6_throttler_map +ffffffff82db8ff0 r smu_v13_0_6_feature_mask_map +ffffffff82dba000 r smu_v13_0_7_ppt_funcs +ffffffff82dba3f0 r smu13_thermal_policy +ffffffff82dba450 r smu_v13_0_7_throttler_map +ffffffff82dbb000 r yellow_carp_ppt_funcs +ffffffff82dbc000 R link_speed +ffffffff82dbc020 r __smu_message_names +ffffffff82dbd000 R pchb_ca +ffffffff82dbe000 R amas_ca +ffffffff82dbe028 R amas_devices +ffffffff82dbe040 r amas_feature +ffffffff82dbf000 R cardslot_ca +ffffffff82dc0000 R cardbus_ca +ffffffff82dc1000 R com_cardbus_ca +ffffffff82dc2000 R xl_cardbus_ca +ffffffff82dc2030 R xl_cardbus_products +ffffffff82dc3000 R dc_cardbus_ca +ffffffff82dc3030 R dc_cardbus_devices +ffffffff82dc4000 R fxp_cardbus_ca +ffffffff82dc4028 R fxp_cardbus_devices +ffffffff82dc5000 R rl_cardbus_devices +ffffffff82dc5028 R rl_cardbus_ca +ffffffff82dc6000 R re_cardbus_ca +ffffffff82dc6028 R re_cardbus_devices +ffffffff82dc7000 R ath_cardbus_ca +ffffffff82dc8000 R athn_cardbus_ca +ffffffff82dc8030 r athn_cardbus_devices +ffffffff82dc9000 R atw_cardbus_ca +ffffffff82dc9028 R atw_cardbus_devices +ffffffff82dca000 R rtw_cardbus_ca +ffffffff82dca028 R rtw_cardbus_devices +ffffffff82dcb000 R ral_cardbus_ca +ffffffff82dcb030 r ral_cardbus_devices +ffffffff82dcc000 R acx_cardbus_ca +ffffffff82dcc028 r acx_cardbus_devices +ffffffff82dcd000 R pgt_cardbus_ca +ffffffff82dcd028 R pgt_cardbus_devices +ffffffff82dce000 R ehci_cardbus_ca +ffffffff82dcf000 R ohci_cardbus_ca +ffffffff82dd0000 R uhci_cardbus_ca +ffffffff82dd1000 R malo_cardbus_ca +ffffffff82dd1028 r malo_cardbus_devices +ffffffff82dd2000 R bwi_cardbus_ca +ffffffff82dd2030 r bwi_cardbus_devices +ffffffff82dd3000 R pcmcia_ca +ffffffff82dd4000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82dd5000 r pcmcia_cis_quirks +ffffffff82dd6000 R ep_pcmcia_ca +ffffffff82dd7000 R ne_pcmcia_ca +ffffffff82dd7030 R ne2000devs +ffffffff82dd9000 R aic_pcmcia_ca +ffffffff82dda000 R com_pcmcia_ca +ffffffff82ddb000 R wdc_pcmcia_ca +ffffffff82ddc000 R sm_pcmcia_ca +ffffffff82ddd000 R xe_pcmcia_ca +ffffffff82dde000 R wi_pcmcia_ca +ffffffff82dde030 r wi_pcmcia_products +ffffffff82ddf000 R malo_pcmcia_ca +ffffffff82de0000 R an_pcmcia_ca +ffffffff82de1000 R pcib_ca +ffffffff82de2000 R amdpcib_ca +ffffffff82de2028 R amdpcib_devices +ffffffff82de3000 R tcpcib_ca +ffffffff82de3028 R tcpcib_devices +ffffffff82de4000 R aapic_ca +ffffffff82de5000 R hme_pci_ca +ffffffff82de5028 r hme_promhdr +ffffffff82de502a r hme_promdat +ffffffff82de6000 R isa_ca +ffffffff82de7000 R isadma_ca +ffffffff82de8000 R fdc_ca +ffffffff82de9000 R fd_ca +ffffffff82dea000 R com_isa_ca +ffffffff82deb000 R pckbc_isa_ca +ffffffff82dec000 R vga_isa_ca +ffffffff82ded000 R wdc_isa_ca +ffffffff82dee000 R mpu_midi_hw_if +ffffffff82def000 R mpu_isa_ca +ffffffff82df0000 R pcppi_ca +ffffffff82df1000 R spkr_ca +ffffffff82df1030 r pitchtab +ffffffff82df2000 R lpt_isa_ca +ffffffff82df3000 R wbsio_ca +ffffffff82df4000 R schsio_ca +ffffffff82df5000 R lm_isa_ca +ffffffff82df5028 R lm_wbsio_ca +ffffffff82df6000 R it_sensors +ffffffff82df6110 R it_vrfact +ffffffff82df6140 R it_fan_regs +ffffffff82df6160 R it_fan_ext_regs +ffffffff82df6178 R it_ca +ffffffff82df7000 R abitkv_sensors +ffffffff82df7200 R abitaa_sensors +ffffffff82df7480 R abitav_sensors +ffffffff82df7700 R abitas_sensors +ffffffff82df7980 R abitax_sensors +ffffffff82df7bc0 R abitm4_sensors +ffffffff82df7e80 R abitan_sensors +ffffffff82df8120 R abital_sensors +ffffffff82df83a0 R abitaw_sensors +ffffffff82df8700 R abitni_sensors +ffffffff82df89a0 R abitat_sensors +ffffffff82df8cc0 R abitan2_sensors +ffffffff82df8f60 R abitab_sensors +ffffffff82df9220 R abitan3_sensors +ffffffff82df9500 R abitaw2_sensors +ffffffff82df9860 R abitat2_sensors +ffffffff82df9b60 R abitab2_sensors +ffffffff82df9ea0 R abitin_sensors +ffffffff82dfa1e0 R uguru_ca +ffffffff82dfb000 R aps_ca +ffffffff82dfc000 R wsdisplay_emul_ca +ffffffff82dfc030 r charClass +ffffffff82dfd000 r usl_syncops +ffffffff82dfe000 R wsevent_filtops +ffffffff82dff000 R wskbd_ca +ffffffff82e00000 r latin1_to_upper +ffffffff82e01000 R wsmouse_ca +ffffffff82e02000 R cyrillic_to_koi8 +ffffffff82e02060 R unicode_to_latin2 +ffffffff82e020e0 R unicode_to_latin7 +ffffffff82e03000 R wsemul_vt100_ops +ffffffff82e04000 r decspcgr2uni +ffffffff82e04100 r dectech2uni +ffffffff82e04200 r nrctable +ffffffff82e05000 r vt100_fkeys +ffffffff82e050c0 r vt100_pfkeys +ffffffff82e050e0 r vt100_numpad +ffffffff82e06000 R pckbd_ca +ffffffff82e06028 R pckbd_accessops +ffffffff82e06040 R pckbd_consops +ffffffff82e06060 R pckbd_keymapdata +ffffffff82e06070 R pckbd_xtbl2 +ffffffff82e06100 R pckbd_xtbl2_ext +ffffffff82e07000 r pckbd_keydesc_us +ffffffff82e07250 r pckbd_keydesc_de +ffffffff82e072f0 r pckbd_keydesc_de_nodead +ffffffff82e07310 r pckbd_keydesc_fr +ffffffff82e073d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82e07510 r pckbd_keydesc_dk +ffffffff82e075a0 r pckbd_keydesc_dk_nodead +ffffffff82e075b0 r pckbd_keydesc_it +ffffffff82e07640 r pckbd_keydesc_uk +ffffffff82e076e0 r pckbd_keydesc_jp +ffffffff82e07750 r pckbd_keydesc_sv +ffffffff82e07780 r pckbd_keydesc_sv_nodead +ffffffff82e07790 r pckbd_keydesc_no +ffffffff82e077c0 r pckbd_keydesc_no_nodead +ffffffff82e077d0 r pckbd_keydesc_us_declk +ffffffff82e07860 r pckbd_keydesc_us_dvorak +ffffffff82e07900 r pckbd_keydesc_us_colemak +ffffffff82e07948 r pckbd_keydesc_swapctrlcaps +ffffffff82e07960 r pckbd_keydesc_iopener +ffffffff82e079b0 r pckbd_keydesc_es +ffffffff82e07a50 r pckbd_keydesc_be +ffffffff82e07b10 r pckbd_keydesc_ru +ffffffff82e07c80 r pckbd_keydesc_ua +ffffffff82e07e10 r pckbd_keydesc_sg +ffffffff82e07ec0 r pckbd_keydesc_sg_nodead +ffffffff82e07ee0 r pckbd_keydesc_sf +ffffffff82e07f00 r pckbd_keydesc_pt +ffffffff82e07f90 r pckbd_keydesc_lt +ffffffff82e08070 r pckbd_keydesc_la +ffffffff82e08100 r pckbd_keydesc_br +ffffffff82e08180 r pckbd_keydesc_tr +ffffffff82e08230 r pckbd_keydesc_tr_nodead +ffffffff82e08250 r pckbd_keydesc_pl +ffffffff82e082b0 r pckbd_keydesc_hu +ffffffff82e083c0 r pckbd_keydesc_si +ffffffff82e084d0 r pckbd_keydesc_cf +ffffffff82e085a0 r pckbd_keydesc_cf_nodead +ffffffff82e085c0 r pckbd_keydesc_lv +ffffffff82e08640 r pckbd_keydesc_nl +ffffffff82e08720 r pckbd_keydesc_nl_nodead +ffffffff82e08740 r pckbd_keydesc_is +ffffffff82e087cc r pckbd_keydesc_is_nodead +ffffffff82e087e0 r pckbd_keydesc_ee +ffffffff82e08890 r pckbd_keydesc_ee_nodead +ffffffff82e088b0 R pckbd_keydesctab +ffffffff82e09000 R pms_ca +ffffffff82e09028 R pms_accessops +ffffffff82e09040 R pms_sec_accessops +ffffffff82e09060 R pms_protocols +ffffffff82e091e0 r alps_models +ffffffff82e0a000 R skgpio_led_offset +ffffffff82e0a008 R skgpio_ca +ffffffff82e0b000 R hidkbd_trtab +ffffffff82e0b100 r apple_fn_trans +ffffffff82e0b120 r apple_tb_trans +ffffffff82e0b140 r apple_mba_trans +ffffffff82e0c000 r hidcc_attach_wskbd.accessops +ffffffff82e0c020 r hidcc_keysyms +ffffffff82e0d000 R usb_ca +ffffffff82e0e000 R usb_known_products +ffffffff82e19f90 R usb_known_vendors +ffffffff82e1c7b0 R usbd_error_strs +ffffffff82e1d000 R usb_quirks +ffffffff82e1d390 R usb_dev_quirks +ffffffff82e1d398 R usbd_no_quirk +ffffffff82e1e000 R uhub_ca +ffffffff82e1e028 R uhub_uhub_ca +ffffffff82e1f000 R uaudio_ca +ffffffff82e1f028 R uaudio_hw_if +ffffffff82e1f0e0 R uaudio_rates +ffffffff82e1f120 r uaudio_clkname.names +ffffffff82e1f140 r uaudio_feature_addent.features +ffffffff82e20000 R uvideo_ca +ffffffff82e20028 R uvideo_hw_if +ffffffff82e20100 R uvideo_devs +ffffffff82e21000 r utvfu_select_norm.pal +ffffffff82e21040 r utvfu_select_norm.ntsc +ffffffff82e21080 r utvfu_setup_capture.setup +ffffffff82e21180 r utvfu_audio_start_chip.setup +ffffffff82e211c8 r utvfu_audio_stop_chip.setup +ffffffff82e211d8 R utvfu_ca +ffffffff82e21200 R utvfu_vid_hw_if +ffffffff82e212d0 R utvfu_au_hw_if +ffffffff82e22000 R udl_ca +ffffffff82e22030 r udl_devs +ffffffff82e220b0 r udl_modes +ffffffff82e23000 R umidi_hw_if +ffffffff82e23030 R umidi_ca +ffffffff82e23060 r umidi_evlen +ffffffff82e23080 r packet_length +ffffffff82e24000 r quirk_name +ffffffff82e25000 R ucom_ca +ffffffff82e26000 R ugen_ca +ffffffff82e26028 R ugenread_intr_filtops +ffffffff82e26058 R ugenread_isoc_filtops +ffffffff82e27000 R uhidev_ca +ffffffff82e27030 r uhid_graphire_report_descr +ffffffff82e270b0 r uhid_graphire3_4x5_report_descr +ffffffff82e27160 r uhid_xb360gp_report_descr +ffffffff82e27210 r uhid_xbonegp_report_descr +ffffffff82e28000 R uhid_ca +ffffffff82e28028 R uhidread_filtops +ffffffff82e29000 R fido_ca +ffffffff82e2a000 R ujoy_ca +ffffffff82e2b000 r ukbd_keydesc_us +ffffffff82e2b2a0 r ukbd_keydesc_de +ffffffff82e2b350 r ukbd_keydesc_de_nodead +ffffffff82e2b370 r ukbd_keydesc_fr +ffffffff82e2b430 r ukbd_keydesc_fr_apple +ffffffff82e2b570 r ukbd_keydesc_fr_dvorak_bepo +ffffffff82e2b6b0 r ukbd_keydesc_dk +ffffffff82e2b750 r ukbd_keydesc_dk_nodead +ffffffff82e2b760 r ukbd_keydesc_it +ffffffff82e2b800 r ukbd_keydesc_uk +ffffffff82e2b8b0 r ukbd_keydesc_jp +ffffffff82e2b920 r ukbd_keydesc_sv +ffffffff82e2b950 r ukbd_keydesc_sv_nodead +ffffffff82e2b960 r ukbd_keydesc_no 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umass_bbb_methods +ffffffff82e35040 R umass_cbi_methods +ffffffff82e36000 R umass_quirks +ffffffff82e37000 R umass_scsi_switch +ffffffff82e38000 R uthum_devs +ffffffff82e38008 R uthum_ca +ffffffff82e38030 r uthum_sensor_type_s +ffffffff82e39000 R ugold_devs +ffffffff82e39018 R ugold_ca +ffffffff82e3a000 R utrh_devs +ffffffff82e3a008 R utrh_ca +ffffffff82e3b000 R uoakrh_devs +ffffffff82e3b008 R uoakrh_ca +ffffffff82e3b030 R uoakrh_methods +ffffffff82e3c000 R uoaklux_devs +ffffffff82e3c008 R uoaklux_ca +ffffffff82e3c030 R uoaklux_methods +ffffffff82e3d000 R uoakv_devs +ffffffff82e3d008 R uoakv_ca +ffffffff82e3d030 R uoakv_methods +ffffffff82e3e000 R uonerng_ca +ffffffff82e3f000 R urng_ca +ffffffff82e3f030 r urng_devs +ffffffff82e40000 R udcf_ca +ffffffff82e40028 r udcf_devs +ffffffff82e41000 R umbg_ca +ffffffff82e42000 R uvisor_methods +ffffffff82e42040 R uvisor_ca +ffffffff82e42070 r uvisor_devs +ffffffff82e43000 R udsbr_hw_if +ffffffff82e43028 R udsbr_ca +ffffffff82e44000 R utwitch_devs +ffffffff82e44008 R utwitch_ca +ffffffff82e45000 R aue_devs +ffffffff82e451b0 R aue_ca +ffffffff82e46000 R axe_devs +ffffffff82e460d0 R axe_ca +ffffffff82e47000 R axen_devs +ffffffff82e47020 R axen_ca +ffffffff82e48000 R smsc_ca +ffffffff82e48030 r smsc_devs +ffffffff82e49000 R cue_ca +ffffffff82e4a000 R kue_devs +ffffffff82e4a088 R kue_ca +ffffffff82e4b000 R cdce_devs +ffffffff82e4b048 R cdce_ca +ffffffff82e4c000 R urndis_ca +ffffffff82e4c030 R urndis_class +ffffffff82e4d000 R mos_devs +ffffffff82e4d018 R mos_ca +ffffffff82e4e000 R mue_devs +ffffffff82e4e020 R mue_ca +ffffffff82e4f000 R udav_ca +ffffffff82e4f030 r udav_devs +ffffffff82e50000 R upl_ca +ffffffff82e51000 R ugl_ca +ffffffff82e52000 R url_ca +ffffffff82e52030 r url_devs +ffffffff82e53000 R ure_devs +ffffffff82e530e8 R ure_ca +ffffffff82e54000 R uaq_devs +ffffffff82e54018 R uaq_ca +ffffffff82e55000 R umodem_methods +ffffffff82e55040 R umodem_ca +ffffffff82e56000 R uftdi_methods +ffffffff82e56040 R uftdi_ca +ffffffff82e56070 r uftdi_devs +ffffffff82e57000 R uplcom_methods +ffffffff82e57040 R uplcom_ca +ffffffff82e57070 r uplcom_devs +ffffffff82e58000 R umct_methods +ffffffff82e58040 R umct_ca +ffffffff82e58070 r umct_devs +ffffffff82e59000 R uvscom_methods +ffffffff82e59040 R uvscom_ca +ffffffff82e59070 r uvscom_devs +ffffffff82e5a000 R ubsa_methods +ffffffff82e5a040 R ubsa_devs +ffffffff82e5a060 R ubsa_ca +ffffffff82e5b000 R ukspan_ca +ffffffff82e5b028 r ukspan_devs +ffffffff82e5b030 r ukspan_methods +ffffffff82e5c000 R uslcom_methods +ffffffff82e5c040 R uslcom_ca +ffffffff82e5c070 r uslcom_devs +ffffffff82e5d000 R uark_methods +ffffffff82e5d040 R uark_ca +ffffffff82e5d068 r uark_devs +ffffffff82e5e000 R moscom_methods +ffffffff82e5e040 R moscom_ca +ffffffff82e5e068 r moscom_devs +ffffffff82e5f000 R umcs_methods +ffffffff82e5f040 R umcs_devs +ffffffff82e5f050 R umcs_ca +ffffffff82e60000 R uscom_methods +ffffffff82e60040 R uscom_ca +ffffffff82e60068 r uscom_devs +ffffffff82e61000 R ucrcom_methods +ffffffff82e61040 R ucrcom_ca +ffffffff82e62000 R uxrcom_methods +ffffffff82e62040 R uxrcom_ca +ffffffff82e62068 r uxrcom_devs +ffffffff82e63000 R uipaq_methods +ffffffff82e63040 R uipaq_ca +ffffffff82e63070 r uipaq_devs +ffffffff82e64000 R umsm_methods +ffffffff82e64040 R umsm_ca +ffffffff82e64070 r umsm_devs +ffffffff82e65000 R uchcom_methods +ffffffff82e65040 R uchcom_ca +ffffffff82e65068 r uchcom_devs +ffffffff82e65080 r dividers +ffffffff82e66000 R uticom_methods +ffffffff82e66040 R uticom_ca +ffffffff82e66070 r uticom_devs +ffffffff82e67000 R wi_usb_devs +ffffffff82e670f0 R wi_usb_ca +ffffffff82e68000 R atu_ca +ffffffff82e69000 R ural_ca +ffffffff82e69030 r ural_devs +ffffffff82e690a0 r ural_rf2522_r2 +ffffffff82e690e0 r ural_rf2524_r2 +ffffffff82e69120 r ural_rf2525_hi_r2 +ffffffff82e69160 r ural_rf2525_r2 +ffffffff82e691a0 r ural_rf2525e_r2 +ffffffff82e691e0 r ural_rf2526_hi_r2 +ffffffff82e69220 r ural_rf2526_r2 +ffffffff82e69260 r ural_def_bbp +ffffffff82e692a0 r ural_def_mac +ffffffff82e6a000 R rum_ca +ffffffff82e6a030 r rum_devs +ffffffff82e6a110 r rum_rf5225 +ffffffff82e6a460 r rum_rf5226 +ffffffff82e6a7b0 r rum_def_bbp +ffffffff82e6a7f0 r rum_def_mac +ffffffff82e6b000 R run_ca +ffffffff82e6b030 r run_devs +ffffffff82e6b430 r rt2860_rf2850 +ffffffff82e6b860 r rt2860_rates +ffffffff82e6b920 r rt5592_freqs_40mhz +ffffffff82e6ba60 r rt5592_freqs_20mhz +ffffffff82e6bba0 r rt5592_2ghz_def_rf +ffffffff82e6bbe0 r rt5592_chan_5ghz +ffffffff82e6be30 r rt5592_def_bbp +ffffffff82e6be70 r rt5592_bbp_r196 +ffffffff82e6bed0 r rt5390_def_bbp +ffffffff82e6bf00 r rt3572_def_rf +ffffffff82e6bf40 r rt3070_def_rf +ffffffff82e6bf70 r rt3593_def_rf +ffffffff82e6bfb0 r rt5592_def_rf +ffffffff82e6bfe0 r rt5392_def_rf +ffffffff82e6c060 r rt5390_def_rf +ffffffff82e6c0e0 r rt2870_def_mac +ffffffff82e6d000 R mtw_ca +ffffffff82e6d030 r mtw_devs +ffffffff82e6d070 r rt2860_rates +ffffffff82e6d130 r mt7601_rf_chan +ffffffff82e6d1a0 r mt7601_def_bbp +ffffffff82e6d2d0 r mt7601_rf_bank0 +ffffffff82e6d330 r mt7601_rf_bank4 +ffffffff82e6d3b0 r mt7601_rf_bank5 +ffffffff82e6d430 r mt7601_def_mac +ffffffff82e6e000 R zyd_ca +ffffffff82e6e030 r zyd_devs +ffffffff82e6e1b0 r zyd_rfmd_init.phyini +ffffffff82e6e2e0 r zyd_rfmd_init.rfini +ffffffff82e6e330 r zyd_rfmd_set_channel.rfprog +ffffffff82e6e3a0 r zyd_al2230_init.phyini +ffffffff82e6e480 r zyd_al2230_init.rfini +ffffffff82e6e4e0 r zyd_al2230_init_b.phyini +ffffffff82e6e5d0 r zyd_al2230_init_b.rfini +ffffffff82e6e620 r zyd_al2230_set_channel.rfprog +ffffffff82e6e6d0 r zyd_al7230B_init.phyini_1 +ffffffff82e6e7b0 r zyd_al7230B_init.rfini_1 +ffffffff82e6e7f0 r zyd_al7230B_set_channel.rfprog +ffffffff82e6e860 r zyd_al7230B_set_channel.rfsc +ffffffff82e6e890 r zyd_al2210_init.phyini +ffffffff82e6e8f0 r zyd_al2210_init.rfini +ffffffff82e6e920 r zyd_al2210_set_channel.rfprog +ffffffff82e6e960 r zyd_gct_init.phyini +ffffffff82e6e9b0 r zyd_gct_init.rfini +ffffffff82e6ea50 r zyd_gct_set_channel.rfprog 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urtw_8225_channel +ffffffff82e7158c r urtw_8225_threshold +ffffffff82e715a0 r urtw_8225v2_gain_bg +ffffffff82e715c0 r urtw_8225v2_tx_gain_cck_ofdm +ffffffff82e715f0 r urtw_8225v2_rf_part1 +ffffffff82e71670 r urtw_8225v2_rxgain +ffffffff82e71730 r urtw_8225v2_rf_part2 +ffffffff82e71870 r urtw_8225v2_rf_part3 +ffffffff82e71970 r urtw_8187b_regtbl +ffffffff82e71a90 r urtw_8225v2_b_rf +ffffffff82e71b20 r urtw_8225v2_agc +ffffffff82e71ba0 r urtw_8225v2_ofdm +ffffffff82e72000 R urtwn_ca +ffffffff82e72030 r urtwn_devs +ffffffff82e72340 r rtl8188eu_mac +ffffffff82e724b0 r rtl8188ftv_mac +ffffffff82e72650 r rtl8192eu_mac +ffffffff82e727f0 r rtl8192cu_mac +ffffffff82e72948 r rtl8188eu_bb_prog +ffffffff82e72970 r rtl8188ftv_bb_prog +ffffffff82e72998 r rtl8192eu_bb_prog +ffffffff82e729c0 r rtl8188ce_bb_prog +ffffffff82e729e8 r rtl8188ru_bb_prog +ffffffff82e72a10 r rtl8188cu_bb_prog +ffffffff82e72a38 r rtl8192ce_bb_prog +ffffffff82e72a60 r rtl8192cu_bb_prog +ffffffff82e72a90 r rtl8188eu_bb_regs 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ar_chans +ffffffff82e770c0 r otus_rates +ffffffff82e770e0 r ar5416_phy_regs +ffffffff82e77380 r ar5416_phy_vals_2ghz_20mhz +ffffffff82e778b0 r ar5416_phy_vals_5ghz_20mhz +ffffffff82e77de0 r ar5416_banks_vals_5ghz +ffffffff82e77ef0 r ar5416_banks_vals_2ghz +ffffffff82e78000 r ar5416_banks_regs +ffffffff82e79000 R umb_regstates +ffffffff82e79080 R umb_dataclasses +ffffffff82e79190 R umb_simstate +ffffffff82e79210 R umb_messages +ffffffff82e792b0 R umb_status +ffffffff82e79570 R umb_cids +ffffffff82e796e0 R umb_pktstate +ffffffff82e79740 R umb_actstate +ffffffff82e797a0 R umb_error +ffffffff82e79830 R umb_pintype +ffffffff82e79960 R umb_istate +ffffffff82e799f0 R umb_ca +ffffffff82e79a20 R umb_quirks +ffffffff82e7a000 R uath_ca +ffffffff82e7a030 r uath_devs +ffffffff82e7b000 R athn_usb_ca +ffffffff82e7b030 r athn_usb_devs +ffffffff82e7c000 R uow_ca +ffffffff82e7c028 r uow_devs +ffffffff82e7d000 R uberry_devices +ffffffff82e7d008 R uberry_ca +ffffffff82e7e000 R upd_ca +ffffffff82e7f000 R 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userconf_base +ffffffff83230004 D userconf_maxdev +ffffffff83230008 D userconf_totdev +ffffffff8323000c D userconf_maxlocnames +ffffffff83230010 D userconf_cnt +ffffffff83230014 D userconf_lines +ffffffff83230018 D userconf_histsz +ffffffff83230020 D userconf_cmds +ffffffff83231000 D ftlock +ffffffff83232000 d ppollcollect.poll_errintvl +ffffffff83233000 D ttydefchars +ffffffff83233014 D ttclos +ffffffff8323301b D ttopen +ffffffff83233022 D ttybg +ffffffff83233028 D ttyin +ffffffff8323302e D ttyout +ffffffff83233038 D ttylist_lock +ffffffff83234000 D linesw +ffffffff83234280 D nlinesw +ffffffff83235000 D pt_softc_lock +ffffffff83236000 d mbstat_boot_boot_cpumem +ffffffff83236080 D mbstat +ffffffff83236090 D mclsizes +ffffffff832360b0 D m_extref_mtx +ffffffff832360c0 D m_pool_allocator +ffffffff83237000 D somaxconn +ffffffff83237004 D sominconn +ffffffff83237008 D sosplice_lock +ffffffff83238000 D sb_max +ffffffff83239000 D unp_df_lock +ffffffff83239010 D unp_gc_lock +ffffffff83239020 D unp_rights_mtx +ffffffff83239030 D unp_ino_mtx +ffffffff83239040 D unp_gc_task +ffffffff83239070 D unpst_sendspace +ffffffff83239074 D unpst_recvspace +ffffffff83239078 D unpsq_sendspace +ffffffff8323907c D unpsq_recvspace +ffffffff83239080 D unpdg_sendspace +ffffffff83239084 D unpdg_recvspace +ffffffff8323a000 D doingcache +ffffffff8323b000 D maxvfsconf +ffffffff8323b010 d vfsconflist +ffffffff8323c000 D lockf_lock +ffffffff8323c010 D maxlocksperuid +ffffffff8323d000 D iftovt_tab +ffffffff8323d040 D vttoif_tab +ffffffff8323d064 D suid_clear +ffffffff8323d068 D vnode_mtx +ffffffff8323d078 D vfs_stall_lock +ffffffff8323d090 D vtypes +ffffffff8323d0e0 D vtags +ffffffff8323e000 D syncer_maxdelay +ffffffff8323e004 D syncdelay +ffffffff8323f000 D dosdirtemplate +ffffffff83240000 D ntfs_hashlock +ffffffff83241000 D ntfs_toupper_lock +ffffffff83242000 D art_table_gc_mtx +ffffffff83242010 D art_table_gc_task +ffffffff83242040 D art_node_gc_mtx +ffffffff83242050 D art_node_gc_task +ffffffff83243000 D bpf_bufsize +ffffffff83243004 D bpf_maxbufsize +ffffffff83243008 D bpf_sysctl_lk +ffffffff83244000 D ifg_head +ffffffff83244010 D if_cloners_lock +ffffffff83244020 D if_input_task_locked +ffffffff83244050 D netlock +ffffffff83244060 D ifnetlist +ffffffff83245000 D ifiq_maxlen_drop +ffffffff83245004 D ifiq_maxlen_return +ffffffff83246000 D etherbroadcastaddr +ffffffff83246006 D ether_ipmulticast_min +ffffffff8324600c D ether_ipmulticast_max +ffffffff83246012 D ether_ip6multicast_min +ffffffff83246018 D ether_ip6multicast_max +ffffffff83247000 D etherip_cloner +ffffffff83247030 D etherip_list +ffffffff83248000 D loop_cloner +ffffffff83249000 D ifmedia_mtx +ffffffff8324a000 D ppp_compressors +ffffffff8324a020 D ppp_cloner +ffffffff8324b000 D ppp_pkt_init +ffffffff8324c000 D ppp_bsd_compress +ffffffff8324d000 D ppp_deflate +ffffffff8324d070 D ppp_deflate_draft +ffffffff8324e000 D tun_cloner +ffffffff8324e030 D tap_cloner +ffffffff8324f000 D bridgeintrq +ffffffff8324f038 D bridge_cloner +ffffffff83250000 d veb_cloner +ffffffff83250030 d vport_cloner +ffffffff83251000 D vlan_tagh_lk +ffffffff83251010 D vlan_cloner +ffffffff83251040 D svlan_cloner +ffffffff83252000 D pipex_list_mtx +ffffffff83252010 D pipex_prune +ffffffff83252018 D pipexoutq +ffffffff83252050 d SHAPad2 +ffffffff83253000 D rtmap_gc +ffffffff83253018 D rt_rc +ffffffff83254000 D rt_labels +ffffffff83254010 D rtlabel_mtx +ffffffff83255000 D enc_cloner +ffffffff83256000 D gre_cloner +ffffffff83256030 D gre_list +ffffffff83256040 D mgre_cloner +ffffffff83256070 D egre_cloner +ffffffff832560a0 D nvgre_cloner +ffffffff832560d0 D eoip_cloner +ffffffff83257000 D trunk_cloner +ffffffff83258000 d aggr_cloner +ffffffff83259000 d tpmr_cloner +ffffffff8325a000 D mpe_cloner +ffffffff8325b000 D mpw_cloner +ffffffff8325c000 D mpip_cloner +ffffffff8325d000 d bpe_cloner +ffffffff8325d030 d bpe_lock +ffffffff8325e000 D vether_cloner +ffffffff8325f000 D pair_cloner +ffffffff83260000 d vxlan_cloner +ffffffff83260030 d vxlan_lock +ffffffff83260040 d vxlan_teps +ffffffff83261000 D underload_interval +ffffffff83261010 D wg_cloner +ffffffff83262000 d stoeplitz_keyseed +ffffffff83263000 D ieee80211_cache_size +ffffffff83264000 D arpt_prune +ffffffff83264004 D arpt_keep +ffffffff83264008 D arpt_down +ffffffff83264010 D arpinq +ffffffff83264048 D arp_mtx +ffffffff83264058 D arp_maxtries +ffffffff83265000 D ipport_firstauto +ffffffff83265004 D ipport_lastauto +ffffffff83265008 D ipport_hifirstauto +ffffffff8326500c D ipport_hilastauto +ffffffff83266000 D divert_sendspace +ffffffff83266004 D divert_recvspace +ffffffff83266008 D divbhashsize +ffffffff83267000 D icmptstamprepl +ffffffff83267004 D icmperrppslim +ffffffff83267008 D icmp_redirtimeout +ffffffff83268000 D ipsendredirects +ffffffff83268004 D ip_defttl +ffffffff83268008 D ip_mtudisc +ffffffff8326800c D ip_mtudisc_timeout +ffffffff83268010 D ipq_mutex +ffffffff83268020 D ip_maxqueue +ffffffff83268028 D ipintrq +ffffffff83268060 d ipsend_task +ffffffff83268090 d ipsendraw_task +ffffffff83269000 D ip_mrtproto +ffffffff83269004 d sin +ffffffff8326a000 D rip_sendspace +ffffffff8326a008 D rip_recvspace +ffffffff8326b000 D tcprexmtthresh +ffffffff8326b004 D tcptv_keep_init +ffffffff8326b008 D tcp_rst_ppslim +ffffffff8326b00c D tcp_ackdrop_ppslim +ffffffff8326b010 D tcp_syn_hash_size +ffffffff8326b014 D tcp_syn_cache_limit +ffffffff8326b018 D tcp_syn_bucket_limit +ffffffff8326b01c D tcp_syn_use_limit +ffffffff8326b020 D syn_cache_mtx +ffffffff8326c000 D tcp_outflags +ffffffff8326d000 D tcp_timer_mtx +ffffffff8326d010 D tcp_mssdflt +ffffffff8326d014 D tcp_rttdflt +ffffffff8326d018 D tcp_do_rfc1323 +ffffffff8326d01c D tcp_do_sack +ffffffff8326d020 D tcp_do_rfc3390 +ffffffff8326d024 D tcp_do_tso +ffffffff8326d028 D tcp_reass_limit +ffffffff8326d02c D tcp_sackhole_limit +ffffffff8326e000 D tcp_backoff +ffffffff8326e034 D tcp_totbackoff +ffffffff8326f000 D tcp_sendspace +ffffffff8326f004 D tcp_recvspace +ffffffff8326f008 D tcp_autorcvbuf_inc +ffffffff83270000 D udpcksum +ffffffff83270004 D udp_sendspace +ffffffff83270008 D udp_recvspace +ffffffff83271000 D ipsec_flows_mtx +ffffffff83271010 D ipsec_ids_idle +ffffffff83271014 D ipsec_ids_next_flow +ffffffff83271018 D ipsec_policy_head +ffffffff83271028 D ipsp_ids_gc_timeout +ffffffff83271070 D tdb_sadb_mtx +ffffffff83271080 d tdb_hashmask +ffffffff83272000 D ipo_tdb_mtx +ffffffff83272010 D ipsec_acquire_mtx +ffffffff83272020 D ipsec_acquire_head +ffffffff83273000 D ipsec_keep_invalid +ffffffff83273004 D ipsec_require_pfs +ffffffff83273008 D ipsec_soft_timeout +ffffffff8327300c D ipsec_exp_timeout +ffffffff83273010 D ipsec_soft_first_use +ffffffff83273014 D ipsec_exp_first_use +ffffffff83273018 D ipsec_expire_acquire +ffffffff8327301c D esp_enable +ffffffff83273020 D ah_enable +ffffffff83274000 D udpencap_enable +ffffffff83274004 D udpencap_port +ffffffff83275000 D carp_vh_rc +ffffffff83275020 D carp_sc_rc +ffffffff83275040 D carp_opts +ffffffff83275058 D carp_cloner +ffffffff83275088 d carp_send_na.mcast ffffffff83276000 d PADDING -ffffffff83277000 d weak_keys -ffffffff83278000 D swcr_id -ffffffff83279000 D window_inflate -ffffffff83279004 D window_deflate -ffffffff8327a000 D ghash_update -ffffffff8327b000 D mpls_defttl -ffffffff8327b004 D mpls_mapttl_ip -ffffffff8327c000 D nfskevq_lock -ffffffff8327d000 D nfs_backoff -ffffffff8327d020 D nfs_ptimers -ffffffff8327e000 D desirednfsrvcache -ffffffff8327e010 D nonidempotent -ffffffff8327e070 D nfsv2_repstat -ffffffff8327f000 D nfsv2_type -ffffffff8327f030 D nfsv3_type -ffffffff8327f060 D nv2tov_type -ffffffff8327f080 D nv3tov_type -ffffffff8327f0a0 D nfsv3_procid -ffffffff8327f100 D nfsv2_procid -ffffffff8327f15c d nfsv3err_getattr -ffffffff8327f170 d nfsv3err_setattr -ffffffff8327f190 d nfsv3err_lookup -ffffffff8327f1a4 d nfsv3err_access -ffffffff8327f1b0 d nfsv3err_readlink -ffffffff8327f1d0 d nfsv3err_read -ffffffff8327f1f0 d nfsv3err_write -ffffffff8327f210 d nfsv3err_create -ffffffff8327f230 d nfsv3err_mkdir -ffffffff8327f250 d nfsv3err_symlink -ffffffff8327f270 d nfsv3err_mknod -ffffffff8327f290 d nfsv3err_remove -ffffffff8327f2b0 d nfsv3err_rmdir -ffffffff8327f2d0 d nfsv3err_rename -ffffffff8327f300 d nfsv3err_link -ffffffff8327f330 d nfsv3err_readdir -ffffffff8327f350 d nfsv3err_readdirplus -ffffffff8327f366 d nfsv3err_fsstat -ffffffff8327f372 d nfsv3err_fsinfo -ffffffff8327f37c d nfsv3err_pathconf -ffffffff8327f386 d nfsv3err_commit -ffffffff83280000 D nfsrv3_procs -ffffffff832800b8 D nfs_niothreads -ffffffff83281000 D fragtbl -ffffffff83282000 D ffs_vtbl -ffffffff83283000 D softdep_typenames -ffffffff83283070 D tickdelay -ffffffff83284000 D dirchk -ffffffff83285000 D desireddquot -ffffffff83286000 D amap_list_lock -ffffffff83287000 d uao_list_lock -ffffffff83288000 d uvmexp_countersboot_boot_cpumem -ffffffff832880c0 D uvmexp_counters -ffffffff832880c8 D vm_min_kernel_address -ffffffff83289000 D no_constraint -ffffffff8328a000 d uvm_kmapent_warn_rate -ffffffff8328b000 D maxslp -ffffffff8328c000 D uvmpagerops -ffffffff8328d000 D uvm_swap_data_lock -ffffffff8328d010 D swap_syscall_lock -ffffffff8328d020 D oommtx -ffffffff8328e000 D uvm_doswapencrypt -ffffffff8328f000 D gif_list -ffffffff8328f010 D gif_cloner -ffffffff83290000 d sec_cloner -ffffffff83290030 d sec_tdb_gc_mtx -ffffffff83290040 d sec_tdb_gc_task -ffffffff83291000 D divert6_sendspace -ffffffff83291004 D divert6_recvspace -ffffffff83291008 D divb6hashsize -ffffffff83292000 d in6_get_hw_ifid.allone -ffffffff83293000 D ip6_sendredirects -ffffffff83293004 D ip6_defhlim -ffffffff83293008 D ip6_defmcasthlim -ffffffff8329300c D ip6_maxfragpackets -ffffffff83293010 D ip6_maxfrags -ffffffff83293014 D ip6_log_interval -ffffffff83293018 D ip6_hdrnestlimit -ffffffff8329301c D ip6_dad_count -ffffffff83293020 D ip6_auto_flowlabel -ffffffff83293024 D ip6_use_deprecated -ffffffff83293028 D ip6_neighborgcthresh -ffffffff8329302c D ip6_maxdynroutes -ffffffff83293030 D rip6_sendspace -ffffffff83293038 D rip6_recvspace -ffffffff83293040 D icmp6_redirtimeout -ffffffff83293044 D icmp6errppslim -ffffffff83293048 D ip6_mtudisc_timeout -ffffffff83294000 D frag6_mutex -ffffffff83295000 d icmp6_mtudisc_hiwat -ffffffff83295004 d icmp6_mtudisc_lowat -ffffffff83296000 d randomtab_20 -ffffffff83297000 D ip6intrq -ffffffff83297038 d ip6send_task -ffffffff83298000 D nd6_timer_next -ffffffff83298008 D nd6_expire_next -ffffffff83298010 D nd6_delay -ffffffff83298014 D nd6_umaxtries -ffffffff83298018 D nd6_mmaxtries -ffffffff8329801c D nd6_gctimer -ffffffff83298020 D nd6_maxndopt -ffffffff83298028 D nd6_mtx -ffffffff83298038 D nd6_list -ffffffff83299000 d dadq -ffffffff8329a000 D pfkeyv2_mtx -ffffffff8329a010 d pfkeyv2_seq -ffffffff8329b000 D sadb_exts_allowed_in -ffffffff8329b090 D sadb_exts_required_in -ffffffff8329c000 D cold -ffffffff8329d000 D bdevsw -ffffffff8329d460 D nblkdev -ffffffff8329d470 D cdevsw -ffffffff8329f400 D nchrdev -ffffffff8329f404 D mem_no -ffffffff8329f408 D swapdev -ffffffff8329f410 D constab -ffffffff832a0000 D machine -ffffffff832a0008 D cpu_idle_cycle_fcn -ffffffff832a0010 D lid_action -ffffffff832a0014 D pwr_action -ffffffff832a0018 D isa_constraint -ffffffff832a0028 D dma_constraint -ffffffff832a0040 D uvm_md_constraints -ffffffff832a0058 D delay_func -ffffffff832a0060 D initclock_func -ffffffff832a0068 D startclock_func -ffffffff832a0070 D bootinfo_size -ffffffff832a0074 D waittime -ffffffff832a0078 D dumpmag -ffffffff832a1000 D tsc_rdtsc -ffffffff832a1008 D tsc_timecounter -ffffffff832a1058 D tsc_is_synchronized -ffffffff832a2000 D local_apic -ffffffff832a2020 D lapic_id -ffffffff832a2080 D lapic_tpr -ffffffff832a20a0 d lapic_ppr -ffffffff832a2100 d lapic_isr -ffffffff832a3000 D warn_once -ffffffff832a4000 d errata -ffffffff832a5000 D cpu_ucode_mtx -ffffffff832a6000 D mem_owner_bios -ffffffff832a6008 D mrops -ffffffff832a6028 D mtrrmask -ffffffff832a6030 D mtrrtomrt -ffffffff832a7000 D pmap_pg_wc -ffffffff832a7008 D pmaps_lock -ffffffff832a7018 d pmap_maxkvaddr -ffffffff832a8000 D kv_physwait -ffffffff832a9000 D fpu_save_len -ffffffff832aa000 D i8259_pic -ffffffff832ab000 D softintr_pic -ffffffff832ac000 D ipifunc -ffffffff832ad000 D setperf_mp_mutex -ffffffff832ae000 D db_Grp6 -ffffffff832ae040 D db_Grp7 -ffffffff832ae100 D db_Grp8 -ffffffff832ae140 D db_Grp9 -ffffffff832ae200 D db_GrpA -ffffffff832ae240 D db_GrpB -ffffffff832ae280 D db_GrpC -ffffffff832ae2c0 D db_inst_0f0x -ffffffff832ae440 D db_inst_0f2x -ffffffff832ae5c0 D db_inst_0f3x -ffffffff832ae740 D db_inst_0f8x -ffffffff832ae8c0 D db_inst_0f9x -ffffffff832aea40 D db_inst_0fax -ffffffff832aebc0 D db_inst_0fbx -ffffffff832aed40 D db_inst_0fcx -ffffffff832aeec0 D db_inst_0f -ffffffff832aef40 D db_Esc92 -ffffffff832aef80 D db_Esc94 -ffffffff832aefc0 D db_Esc95 -ffffffff832af000 D db_Esc96 -ffffffff832af040 D db_Esc97 -ffffffff832af080 D db_Esca5 -ffffffff832af0c0 D db_Escb4 -ffffffff832af100 D db_Esce3 -ffffffff832af140 D db_Escf4 -ffffffff832af180 D db_Esc8 -ffffffff832af240 D db_Esc9 -ffffffff832af300 D db_Esca -ffffffff832af3c0 D db_Escb -ffffffff832af480 D db_Escc -ffffffff832af540 D db_Escd -ffffffff832af600 D db_Esce -ffffffff832af6c0 D db_Escf -ffffffff832af780 D db_Esc_inst -ffffffff832af7c0 D db_Grp1 -ffffffff832af800 D db_Grp2 -ffffffff832af840 D db_Grp3 -ffffffff832af900 D db_Grp4 -ffffffff832af9c0 D db_Grp5 -ffffffff832afa80 D db_inst_table -ffffffff832b1280 D db_bad_inst -ffffffff832b12a0 D db_index_reg_16 -ffffffff832b12e0 D db_reg -ffffffff832b14e0 D db_seg_reg -ffffffff832b1520 D db_lengths -ffffffff832b2000 D db_regs -ffffffff832b21e0 D db_eregs -ffffffff832b21f0 D db_reg_args -ffffffff832b3000 D timer_mutex -ffffffff832b3010 d i8254_timecounter -ffffffff832b4000 D spleen8x16 -ffffffff832b4058 D spleen12x24 -ffffffff832b40b0 D spleen16x32 -ffffffff832b4108 D spleen32x64 -ffffffff832b4160 d builtin_fonts -ffffffff832b41e0 d wsfont_add.cookiegen -ffffffff832b41f0 d spleen8x16_data -ffffffff832b4ff0 d spleen12x24_data -ffffffff832b79f0 d spleen16x32_data -ffffffff832bb1f0 d spleen32x64_data -ffffffff832ca000 D nsphy_cd -ffffffff832cb000 D nsphyter_cd -ffffffff832cc000 D gentbi_cd -ffffffff832cd000 D qsphy_cd -ffffffff832ce000 D inphy_cd -ffffffff832cf000 D iophy_cd -ffffffff832d0000 D eephy_cd -ffffffff832d1000 D exphy_cd -ffffffff832d2000 D rlphy_cd -ffffffff832d3000 D lxtphy_cd -ffffffff832d4000 D luphy_cd -ffffffff832d5000 D mtdphy_cd -ffffffff832d6000 D icsphy_cd -ffffffff832d7000 D sqphy_cd -ffffffff832d8000 D tqphy_cd -ffffffff832d9000 D ukphy_cd -ffffffff832da000 D dcphy_cd -ffffffff832db000 D bmtphy_cd -ffffffff832dc000 D brgphy_cd -ffffffff832dd000 D xmphy_cd -ffffffff832de000 D amphy_cd -ffffffff832df000 D acphy_cd -ffffffff832e0000 D nsgphy_cd -ffffffff832e1000 D urlphy_cd -ffffffff832e2000 D rgephy_cd -ffffffff832e3000 D ciphy_cd -ffffffff832e4000 D ipgphy_cd -ffffffff832e5000 D etphy_cd -ffffffff832e6000 D jmphy_cd -ffffffff832e7000 D atphy_cd -ffffffff832e8000 D scsi_autoconf -ffffffff832e8008 D scsibus_cd -ffffffff832e9000 D cd_cd -ffffffff832ea000 D ch_cd -ffffffff832ea020 D chquirks -ffffffff832eb000 D sd_cd -ffffffff832ec000 D st_cd -ffffffff832ed000 D uk_cd -ffffffff832ee000 D safte_cd -ffffffff832ef000 D ses_cd -ffffffff832f0000 D sym_cd -ffffffff832f0020 D sym_devices -ffffffff832f0070 D asym_devices -ffffffff832f1000 D rdac_cd -ffffffff832f1020 D rdac_devices -ffffffff832f2000 D emc_cd -ffffffff832f2020 D emc_devices -ffffffff832f3000 D hds_cd -ffffffff832f3020 D hds_devices -ffffffff832f4000 D atapiscsi_cd -ffffffff832f5000 D wd_cd -ffffffff832f5020 d wddumpmulti -ffffffff832f6000 D mainbus_cd -ffffffff832f6020 D mba_iba -ffffffff832f7000 D bios_cd -ffffffff832f7020 D smbios_uninfo -ffffffff832f8000 D mpbios_cd -ffffffff832f8020 d mp_conf -ffffffff832f8070 d extint_bus -ffffffff832f80a0 d smi_bus -ffffffff832f80d0 d nmi_bus -ffffffff832f9000 D cpu_info_full_primary -ffffffff832fc000 D cpu_info_list -ffffffff832fc008 D mp_cpu_funcs -ffffffff832fc020 D cpu_cd -ffffffff832fc040 D cpu_info -ffffffff832fd000 D local_pic -ffffffff832fd098 D lapic_readreg -ffffffff832fd0a0 D lapic_writereg -ffffffff832fd0a8 D x86_ipi -ffffffff832fe000 D ioapic_cold -ffffffff832fe008 D ioapic_cd -ffffffff832ff000 D efifb_std_descr -ffffffff832ff030 D efifb_descrs -ffffffff832ff038 D efifb_accessops -ffffffff832ff098 D efifb_cd -ffffffff83300000 D pvbus_cd -ffffffff83300020 D pvbus_types -ffffffff833000e0 D pvbus_dma_tag -ffffffff83301000 D pvclock_cd -ffffffff83301020 D pvclock_timecounter -ffffffff83302000 D vmt_tclo_rpc -ffffffff833020d0 D vmt_cd -ffffffff83303000 D xen_cd -ffffffff83303020 D xen_bus_dma_tag -ffffffff83304000 D xnf_cd -ffffffff83305000 D xbf_cd -ffffffff83306000 D hv_msg_dispatch -ffffffff83306110 D hv_timecounter -ffffffff83306160 D hyperv_cd -ffffffff83307000 d hv_ic_devs -ffffffff83308000 D hvn_cd -ffffffff83309000 D hvs_cd -ffffffff8330a000 D virtio_cd -ffffffff8330b000 D vio_cd -ffffffff8330c000 D vioblk_cd -ffffffff8330d000 D viomb_cd -ffffffff8330e000 D viornd_cd -ffffffff8330f000 D vioscsi_cd -ffffffff83310000 D vmmci_cd -ffffffff83311000 D pci_cd -ffffffff83312000 D arc_fw_hdr -ffffffff83312008 D arc_cd -ffffffff83313000 D jmb_cd -ffffffff83314000 D mfii_cd -ffffffff83315000 D ips_cd -ffffffff83316000 D eap_cd -ffffffff83317000 D auacer_cd -ffffffff83318000 D auich_cd -ffffffff83319000 D azalia_cd -ffffffff8331a000 D envy_cd -ffffffff8331a020 D envy_matchids -ffffffff8331a030 D envy_rates -ffffffff8331a0b0 D ak4524_dac -ffffffff8331a0d8 D ak4524_adc -ffffffff8331a100 D ak4358_dac -ffffffff8331a128 D ak5365_adc -ffffffff8331a150 D unkenvy_codec -ffffffff8331a180 D envy_cards -ffffffff8331a3f0 D envy_cards_ht -ffffffff8331a600 d julia_eeprom -ffffffff8331b000 D emu_cd -ffffffff8331c000 D auixp_cd -ffffffff8331d000 D clcs_cd -ffffffff8331e000 D yds_cd -ffffffff8331f000 D auvia_cd -ffffffff83320000 D qle_cd -ffffffff83321000 D mpii_cd -ffffffff83322000 D aq_cd -ffffffff83323000 D de_cd -ffffffff83324000 D pcn_cd -ffffffff83325000 D wdc_sii3114_vtbl -ffffffff83325038 D wdc_pdc203xx_vtbl -ffffffff83325070 D wdc_svwsata_vtbl -ffffffff833250a8 D pciide_cd -ffffffff833250d0 d sis_hostbr_type -ffffffff83326000 D ppb_cd -ffffffff83327000 D vr_cd -ffffffff83327020 D vr_devices -ffffffff83328000 D txp_cd -ffffffff83329000 D bt848_card_signature -ffffffff8332a000 D bktr_cd -ffffffff8332b000 D em_cd -ffffffff8332c000 D ixgb_cd -ffffffff8332d000 D ix_cd -ffffffff8332d020 D ixgbe_smart_speed -ffffffff8332d024 D ixgbe_enable_msix -ffffffff8332e000 D ixl_cd -ffffffff8332e020 d ixl_sff_lock -ffffffff8332f000 D xge_cd -ffffffff83330000 D thtc_cd -ffffffff83330020 D tht_cd -ffffffff83330040 D tht_txt_desc -ffffffff83330068 D tht_rxf_desc -ffffffff83330090 D tht_rxd_desc -ffffffff833300b8 D tht_txf_desc -ffffffff83331000 D myx_cd -ffffffff83332000 D oce_cd -ffffffff83333000 D dc_devs -ffffffff83334000 D cas_cd -ffffffff83335000 D sis_cd -ffffffff83336000 D se_cd -ffffffff83337000 D mbg_cd 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in6_get_hw_ifid.allone +ffffffff83294000 D ip6_sendredirects +ffffffff83294004 D ip6_defhlim +ffffffff83294008 D ip6_defmcasthlim +ffffffff8329400c D ip6_maxfragpackets +ffffffff83294010 D ip6_maxfrags +ffffffff83294014 D ip6_log_interval +ffffffff83294018 D ip6_hdrnestlimit +ffffffff8329401c D ip6_dad_count +ffffffff83294020 D ip6_auto_flowlabel +ffffffff83294024 D ip6_use_deprecated +ffffffff83294028 D ip6_neighborgcthresh +ffffffff8329402c D ip6_maxdynroutes +ffffffff83294030 D rip6_sendspace +ffffffff83294038 D rip6_recvspace +ffffffff83294040 D icmp6_redirtimeout +ffffffff83294044 D icmp6errppslim +ffffffff83294048 D ip6_mtudisc_timeout +ffffffff83295000 D frag6_mutex +ffffffff83296000 d icmp6_mtudisc_hiwat +ffffffff83296004 d icmp6_mtudisc_lowat +ffffffff83297000 d randomtab_20 +ffffffff83298000 D ip6intrq +ffffffff83298038 d ip6send_task +ffffffff83299000 D nd6_timer_next +ffffffff83299008 D nd6_expire_next +ffffffff83299010 D nd6_delay +ffffffff83299014 D nd6_umaxtries +ffffffff83299018 D nd6_mmaxtries +ffffffff8329901c D nd6_gctimer +ffffffff83299020 D nd6_maxndopt +ffffffff83299028 D nd6_mtx +ffffffff83299038 D nd6_list +ffffffff8329a000 d dadq +ffffffff8329b000 D pfkeyv2_mtx +ffffffff8329b010 d pfkeyv2_seq +ffffffff8329c000 D sadb_exts_allowed_in +ffffffff8329c090 D sadb_exts_required_in +ffffffff8329d000 D cold +ffffffff8329e000 D bdevsw +ffffffff8329e460 D nblkdev +ffffffff8329e470 D cdevsw +ffffffff832a0400 D nchrdev +ffffffff832a0404 D mem_no +ffffffff832a0408 D swapdev +ffffffff832a0410 D constab +ffffffff832a1000 D machine +ffffffff832a1008 D cpu_idle_cycle_fcn +ffffffff832a1010 D lid_action +ffffffff832a1014 D pwr_action +ffffffff832a1018 D isa_constraint +ffffffff832a1028 D dma_constraint +ffffffff832a1040 D uvm_md_constraints +ffffffff832a1058 D delay_func +ffffffff832a1060 D initclock_func +ffffffff832a1068 D startclock_func +ffffffff832a1070 D bootinfo_size +ffffffff832a1074 D waittime +ffffffff832a1078 D dumpmag +ffffffff832a2000 D tsc_rdtsc +ffffffff832a2008 D tsc_timecounter +ffffffff832a2058 D tsc_is_synchronized +ffffffff832a3000 D local_apic +ffffffff832a3020 D lapic_id +ffffffff832a3080 D lapic_tpr +ffffffff832a30a0 d lapic_ppr +ffffffff832a3100 d lapic_isr +ffffffff832a4000 D warn_once +ffffffff832a5000 d errata +ffffffff832a6000 D cpu_ucode_mtx +ffffffff832a7000 D mem_owner_bios +ffffffff832a7008 D mrops +ffffffff832a7028 D mtrrmask +ffffffff832a7030 D mtrrtomrt +ffffffff832a8000 D pmap_pg_wc +ffffffff832a8008 D pmaps_lock +ffffffff832a8018 d pmap_maxkvaddr +ffffffff832a9000 D kv_physwait +ffffffff832aa000 D fpu_save_len +ffffffff832ab000 D i8259_pic +ffffffff832ac000 D softintr_pic +ffffffff832ad000 D ipifunc +ffffffff832ae000 D setperf_mp_mutex +ffffffff832af000 D db_Grp6 +ffffffff832af040 D db_Grp7 +ffffffff832af100 D db_Grp8 +ffffffff832af140 D db_Grp9 +ffffffff832af200 D db_GrpA +ffffffff832af240 D db_GrpB +ffffffff832af280 D db_GrpC +ffffffff832af2c0 D db_inst_0f0x +ffffffff832af440 D db_inst_0f2x +ffffffff832af5c0 D db_inst_0f3x +ffffffff832af740 D db_inst_0f8x +ffffffff832af8c0 D db_inst_0f9x +ffffffff832afa40 D db_inst_0fax +ffffffff832afbc0 D db_inst_0fbx +ffffffff832afd40 D db_inst_0fcx +ffffffff832afec0 D db_inst_0f +ffffffff832aff40 D db_Esc92 +ffffffff832aff80 D db_Esc94 +ffffffff832affc0 D db_Esc95 +ffffffff832b0000 D db_Esc96 +ffffffff832b0040 D db_Esc97 +ffffffff832b0080 D db_Esca5 +ffffffff832b00c0 D db_Escb4 +ffffffff832b0100 D db_Esce3 +ffffffff832b0140 D db_Escf4 +ffffffff832b0180 D db_Esc8 +ffffffff832b0240 D db_Esc9 +ffffffff832b0300 D db_Esca +ffffffff832b03c0 D db_Escb +ffffffff832b0480 D db_Escc +ffffffff832b0540 D db_Escd +ffffffff832b0600 D db_Esce +ffffffff832b06c0 D db_Escf +ffffffff832b0780 D db_Esc_inst +ffffffff832b07c0 D db_Grp1 +ffffffff832b0800 D db_Grp2 +ffffffff832b0840 D db_Grp3 +ffffffff832b0900 D db_Grp4 +ffffffff832b09c0 D db_Grp5 +ffffffff832b0a80 D db_inst_table +ffffffff832b2280 D db_bad_inst +ffffffff832b22a0 D db_index_reg_16 +ffffffff832b22e0 D db_reg +ffffffff832b24e0 D db_seg_reg +ffffffff832b2520 D db_lengths +ffffffff832b3000 D db_regs +ffffffff832b31e0 D db_eregs +ffffffff832b31f0 D db_reg_args +ffffffff832b4000 D timer_mutex +ffffffff832b4010 d i8254_timecounter +ffffffff832b5000 D spleen8x16 +ffffffff832b5058 D spleen12x24 +ffffffff832b50b0 D spleen16x32 +ffffffff832b5108 D spleen32x64 +ffffffff832b5160 d builtin_fonts +ffffffff832b51e0 d wsfont_add.cookiegen +ffffffff832b51f0 d spleen8x16_data +ffffffff832b5ff0 d spleen12x24_data +ffffffff832b89f0 d spleen16x32_data +ffffffff832bc1f0 d spleen32x64_data +ffffffff832cb000 D nsphy_cd +ffffffff832cc000 D nsphyter_cd +ffffffff832cd000 D gentbi_cd +ffffffff832ce000 D qsphy_cd +ffffffff832cf000 D inphy_cd +ffffffff832d0000 D iophy_cd +ffffffff832d1000 D eephy_cd +ffffffff832d2000 D exphy_cd +ffffffff832d3000 D rlphy_cd +ffffffff832d4000 D lxtphy_cd +ffffffff832d5000 D luphy_cd +ffffffff832d6000 D mtdphy_cd +ffffffff832d7000 D icsphy_cd +ffffffff832d8000 D sqphy_cd +ffffffff832d9000 D tqphy_cd +ffffffff832da000 D ukphy_cd +ffffffff832db000 D dcphy_cd +ffffffff832dc000 D bmtphy_cd +ffffffff832dd000 D brgphy_cd +ffffffff832de000 D xmphy_cd +ffffffff832df000 D amphy_cd +ffffffff832e0000 D acphy_cd +ffffffff832e1000 D nsgphy_cd +ffffffff832e2000 D urlphy_cd +ffffffff832e3000 D rgephy_cd +ffffffff832e4000 D ciphy_cd +ffffffff832e5000 D ipgphy_cd +ffffffff832e6000 D etphy_cd +ffffffff832e7000 D jmphy_cd +ffffffff832e8000 D atphy_cd +ffffffff832e9000 D scsi_autoconf +ffffffff832e9008 D scsibus_cd +ffffffff832ea000 D cd_cd +ffffffff832eb000 D ch_cd +ffffffff832eb020 D chquirks +ffffffff832ec000 D sd_cd +ffffffff832ed000 D st_cd +ffffffff832ee000 D uk_cd +ffffffff832ef000 D safte_cd +ffffffff832f0000 D ses_cd +ffffffff832f1000 D sym_cd +ffffffff832f1020 D sym_devices +ffffffff832f1070 D asym_devices +ffffffff832f2000 D rdac_cd +ffffffff832f2020 D rdac_devices +ffffffff832f3000 D emc_cd +ffffffff832f3020 D emc_devices +ffffffff832f4000 D hds_cd +ffffffff832f4020 D hds_devices +ffffffff832f5000 D atapiscsi_cd +ffffffff832f6000 D wd_cd +ffffffff832f6020 d wddumpmulti +ffffffff832f7000 D mainbus_cd +ffffffff832f7020 D mba_iba +ffffffff832f8000 D bios_cd +ffffffff832f8020 D smbios_uninfo +ffffffff832f9000 D mpbios_cd +ffffffff832f9020 d mp_conf +ffffffff832f9070 d extint_bus +ffffffff832f90a0 d smi_bus +ffffffff832f90d0 d nmi_bus +ffffffff832fa000 D cpu_info_full_primary +ffffffff832fd000 D cpu_info_list +ffffffff832fd008 D mp_cpu_funcs +ffffffff832fd020 D cpu_cd +ffffffff832fd040 D cpu_info +ffffffff832fe000 D local_pic +ffffffff832fe098 D lapic_readreg +ffffffff832fe0a0 D lapic_writereg +ffffffff832fe0a8 D x86_ipi +ffffffff832ff000 D ioapic_cold +ffffffff832ff008 D ioapic_cd +ffffffff83300000 D efifb_std_descr +ffffffff83300030 D efifb_descrs +ffffffff83300038 D efifb_accessops +ffffffff83300098 D efifb_cd +ffffffff83301000 D pvbus_cd +ffffffff83301020 D pvbus_types +ffffffff833010e0 D pvbus_dma_tag +ffffffff83302000 D pvclock_cd +ffffffff83302020 D pvclock_timecounter +ffffffff83303000 D vmt_tclo_rpc +ffffffff833030d0 D vmt_cd +ffffffff83304000 D xen_cd +ffffffff83304020 D xen_bus_dma_tag +ffffffff83305000 D xnf_cd +ffffffff83306000 D xbf_cd +ffffffff83307000 D hv_msg_dispatch +ffffffff83307110 D hv_timecounter +ffffffff83307160 D hyperv_cd +ffffffff83308000 d hv_ic_devs +ffffffff83309000 D hvn_cd +ffffffff8330a000 D hvs_cd +ffffffff8330b000 D virtio_cd +ffffffff8330c000 D vio_cd +ffffffff8330d000 D vioblk_cd +ffffffff8330e000 D viomb_cd +ffffffff8330f000 D viornd_cd +ffffffff83310000 D vioscsi_cd +ffffffff83311000 D vmmci_cd +ffffffff83312000 D pci_cd +ffffffff83313000 D arc_fw_hdr +ffffffff83313008 D arc_cd +ffffffff83314000 D jmb_cd +ffffffff83315000 D mfii_cd +ffffffff83316000 D ips_cd +ffffffff83317000 D eap_cd +ffffffff83318000 D auacer_cd +ffffffff83319000 D auich_cd +ffffffff8331a000 D azalia_cd +ffffffff8331b000 D envy_cd +ffffffff8331b020 D envy_matchids +ffffffff8331b030 D envy_rates +ffffffff8331b0b0 D ak4524_dac +ffffffff8331b0d8 D ak4524_adc +ffffffff8331b100 D ak4358_dac +ffffffff8331b128 D ak5365_adc +ffffffff8331b150 D unkenvy_codec +ffffffff8331b180 D envy_cards +ffffffff8331b3f0 D envy_cards_ht +ffffffff8331b600 d julia_eeprom +ffffffff8331c000 D emu_cd +ffffffff8331d000 D auixp_cd +ffffffff8331e000 D clcs_cd +ffffffff8331f000 D yds_cd +ffffffff83320000 D auvia_cd +ffffffff83321000 D qle_cd +ffffffff83322000 D mpii_cd +ffffffff83323000 D aq_cd +ffffffff83324000 D de_cd +ffffffff83325000 D pcn_cd +ffffffff83326000 D wdc_sii3114_vtbl +ffffffff83326038 D wdc_pdc203xx_vtbl +ffffffff83326070 D wdc_svwsata_vtbl +ffffffff833260a8 D pciide_cd +ffffffff833260d0 d sis_hostbr_type +ffffffff83327000 D ppb_cd +ffffffff83328000 D vr_cd +ffffffff83328020 D vr_devices +ffffffff83329000 D txp_cd +ffffffff8332a000 D bt848_card_signature +ffffffff8332b000 D bktr_cd +ffffffff8332c000 D em_cd +ffffffff8332d000 D ixgb_cd +ffffffff8332e000 D ix_cd +ffffffff8332e020 D ixgbe_smart_speed +ffffffff8332e024 D ixgbe_enable_msix +ffffffff8332f000 D ixl_cd +ffffffff8332f020 d ixl_sff_lock +ffffffff83330000 D xge_cd +ffffffff83331000 D thtc_cd +ffffffff83331020 D tht_cd +ffffffff83331040 D tht_txt_desc +ffffffff83331068 D tht_rxf_desc +ffffffff83331090 D tht_rxd_desc +ffffffff833310b8 D tht_txf_desc +ffffffff83332000 D myx_cd +ffffffff83333000 D oce_cd +ffffffff83334000 D dc_devs +ffffffff83335000 D cas_cd +ffffffff83336000 D sis_cd +ffffffff83337000 D se_cd +ffffffff83338000 D mbg_cd +ffffffff83339000 D cbb_cd +ffffffff83339020 D yc_chipsets +ffffffff833391b0 d pccbb_funcs +ffffffff833391e0 d pccbb_pcmcia_funcs +ffffffff8333a000 D skc_cd +ffffffff8333a020 D sk_cd +ffffffff8333b000 D mskc_cd +ffffffff8333b020 D msk_cd +ffffffff8333c000 D puc_cd +ffffffff8333d000 D puc_ndevs +ffffffff8333e000 D iwi_cd +ffffffff8333f000 D wpi_cd +ffffffff83340000 D iwn_cd +ffffffff83341000 D iwm_cd +ffffffff83342000 D iwx_cd +ffffffff83343000 D cmpci_cd +ffffffff83344000 D iha_cd +ffffffff83345000 D pcscp_cd +ffffffff83345020 D pcscp_glue +ffffffff83346000 D bge_cd +ffffffff83347000 D bnx_firmwares +ffffffff83347160 D bnx_rv2ps +ffffffff833471c0 D bnx_cd +ffffffff833471e0 d flash_5709 +ffffffff83347210 d flash_table +ffffffff83348000 D vge_cd +ffffffff83349000 D stge_cd +ffffffff8334a000 D nfe_cd +ffffffff8334b000 D et_cd +ffffffff8334c000 D jme_cd +ffffffff8334d000 D age_cd +ffffffff8334e000 D alc_dma_burst +ffffffff8334e020 D alc_cd +ffffffff8334f000 D ale_cd +ffffffff83350000 D amdpm_cd +ffffffff83350020 d amdpm_timecounter +ffffffff83351000 D bce_cd +ffffffff83352000 D rtwn_cd +ffffffff83353000 d ral_rt2560_opns +ffffffff83353028 d ral_rt2661_opns +ffffffff83353050 d ral_rt2860_opns +ffffffff83354000 D piixpm_cd +ffffffff83355000 D vic_cd +ffffffff83356000 D vmx_cd +ffffffff83357000 D vmwpvs_cd +ffffffff83358000 D lii_cd +ffffffff83359000 D ichiic_cd +ffffffff8335a000 D viapm_cd +ffffffff8335a020 d viapm_timecounter +ffffffff8335b000 D amdiic_cd +ffffffff8335c000 D nviic_cd +ffffffff8335d000 D kate_cd +ffffffff8335e000 D km_cd +ffffffff8335f000 D cpu_model_offsets +ffffffff8335f070 D ksmn_cd +ffffffff83360000 D itherm_cd +ffffffff83361000 D pchtemp_cd +ffffffff83362000 D xspd_cd +ffffffff83363000 D virtio_pci_ops +ffffffff83364000 D bwfm_pci_buscore_ops +ffffffff83364030 D bwfm_pci_bus_ops +ffffffff83364058 D bwfm_pci_msgbuf_ops +ffffffff83365000 D bnxt_cd +ffffffff83366000 D mcx_cd +ffffffff83367000 D iavf_cd +ffffffff83368000 D rge_cd +ffffffff83369000 D igc_cd +ffffffff8336a000 D ngbe_cd +ffffffff8336b000 D agp_cd +ffffffff8336c000 D intagp_cd +ffffffff8336c020 D agp_i810_methods +ffffffff8336d000 D reservation_ww_class +ffffffff8336e000 d bridge_lock +ffffffff8336e010 d bridge_list +ffffffff8336f000 d drm_connector_enum_list +ffffffff8336f1f8 d connector_list_lock +ffffffff8336f208 d connector_list +ffffffff83370000 d kernel_fb_helper_list +ffffffff83370010 d kernel_fb_helper_lock +ffffffff83371000 D drm_global_mutex +ffffffff83372000 D i2c_bit_algo +ffffffff83372010 d drm_fence_context_count +ffffffff83372018 d dma_fence_stub_mtx +ffffffff83372028 D wait_bit_mtx +ffffffff83372038 D shrinkers +ffffffff83373000 d crtc_ww_class +ffffffff83374000 d panel_lock +ffffffff83374010 d panel_list +ffffffff83375000 d ttm_global_mutex +ffffffff83376000 D drm_sched_policy +ffffffff83377000 D intel_bbops +ffffffff83378000 d i915_sys_placement +ffffffff83378020 d i915_ttm_bo_driver +ffffffff83379000 d mchdev_lock +ffffffff8337a000 D inteldrm_stdscreen +ffffffff8337a030 D inteldrm_scrlist +ffffffff8337a038 D inteldrm_screenlist +ffffffff8337a048 D inteldrm_accessops +ffffffff8337a0a8 D inteldrm_cd +ffffffff8337b000 d capture_mutex +ffffffff8337c000 d mitigations +ffffffff8337d000 D i915_modparams +ffffffff8337e000 d schedule_lock +ffffffff8337f000 d unbind_fence_ops +ffffffff83380000 D intel_graphics_stolen_res +ffffffff83381000 D btc_valid_sclk +ffffffff83382000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff83382020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff83383000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff83383008 d r600_cs_packet_parse_vline.vline_status +ffffffff83384000 d r100_asic +ffffffff833842e0 d r200_asic +ffffffff833845c0 d r300_asic_pcie +ffffffff833848a0 d r300_asic +ffffffff83384b80 d r420_asic +ffffffff83384e60 d rs400_asic +ffffffff83385140 d rs600_asic +ffffffff83385420 d rs690_asic +ffffffff83385700 d rv515_asic +ffffffff833859e0 d r520_asic +ffffffff83385cc0 d r600_asic +ffffffff83385fa0 d rv6xx_asic +ffffffff83386280 d rs780_asic +ffffffff83386560 d rv770_asic +ffffffff83386840 d evergreen_asic +ffffffff83386b20 d sumo_asic +ffffffff83386e00 d btc_asic +ffffffff833870e0 d cayman_asic +ffffffff833873c0 d trinity_asic +ffffffff833876a0 d si_asic +ffffffff83387980 d ci_asic +ffffffff83387c60 d kv_asic +ffffffff83388000 d dce6_funcs +ffffffff83388018 d dce6_hdmi_funcs +ffffffff83388088 d dce6_dp_funcs +ffffffff833880f8 d dce4_funcs +ffffffff83388110 d dce4_hdmi_funcs +ffffffff83388180 d dce4_dp_funcs +ffffffff833881f0 d dce32_funcs +ffffffff83388208 d dce32_hdmi_funcs +ffffffff83388278 d dce32_dp_funcs +ffffffff833882e8 d r600_funcs +ffffffff83388300 d r600_hdmi_funcs +ffffffff83389000 D radeon_modeset +ffffffff83389004 D radeon_dynclks +ffffffff83389008 D radeon_agpmode +ffffffff8338900c D radeon_gart_size +ffffffff83389010 D radeon_tv +ffffffff83389014 D radeon_audio +ffffffff83389018 D radeon_pcie_gen2 +ffffffff8338901c D radeon_msi +ffffffff83389020 D radeon_lockup_timeout +ffffffff83389024 D radeon_dpm +ffffffff83389028 D radeon_aspm +ffffffff8338902c D radeon_runtime_pm +ffffffff83389030 D radeon_vm_size +ffffffff83389034 D radeon_vm_block_size +ffffffff83389038 D radeon_use_pflipirq +ffffffff8338903c D radeon_bapm +ffffffff83389040 D radeon_backlight +ffffffff83389044 D radeon_auxch +ffffffff83389048 D radeon_uvd +ffffffff8338904c D radeon_vce +ffffffff83389050 D radeon_si_support +ffffffff83389054 D radeon_cik_support +ffffffff83389058 D radeondrm_cd +ffffffff83389078 D radeondrm_stdscreen +ffffffff833890a8 D radeondrm_scrlist +ffffffff833890b0 D radeondrm_screenlist +ffffffff833890c0 D radeondrm_accessops +ffffffff8338a000 D radeon_bbops +ffffffff8338b000 d radeon_bo_driver +ffffffff8338c000 d verde_pg_init +ffffffff8338d000 d cac_weights_pitcairn +ffffffff8338d4d0 d cac_weights_oland +ffffffff8338e000 d aldebaran_mode2_handler +ffffffff8338f000 d amdgpu_vbios_version_attrs +ffffffff83390000 D amdgpu_asic_name +ffffffff83391000 D amdgpu_vram_limit +ffffffff83391004 D amdgpu_gart_size +ffffffff83391008 D amdgpu_gtt_size +ffffffff8339100c D amdgpu_moverate +ffffffff83391010 D amdgpu_audio +ffffffff83391014 D amdgpu_pcie_gen2 +ffffffff83391018 D amdgpu_msi +ffffffff8339101c D amdgpu_dpm +ffffffff83391020 D amdgpu_fw_load_type +ffffffff83391024 D amdgpu_aspm +ffffffff83391028 D amdgpu_runtime_pm +ffffffff8339102c D amdgpu_ip_block_mask +ffffffff83391030 D amdgpu_bapm +ffffffff83391034 D amdgpu_vm_size +ffffffff83391038 D amdgpu_vm_fragment_size +ffffffff8339103c D amdgpu_vm_block_size +ffffffff83391040 D amdgpu_vm_update_mode +ffffffff83391044 D amdgpu_dc +ffffffff83391048 D amdgpu_sched_jobs +ffffffff8339104c D amdgpu_sched_hw_submission +ffffffff83391050 D amdgpu_cg_mask +ffffffff83391058 D amdgpu_pg_mask +ffffffff8339105c D amdgpu_sdma_phase_quantum +ffffffff83391060 D amdgpu_pp_feature_mask +ffffffff83391064 D amdgpu_lbpw +ffffffff83391068 D amdgpu_compute_multipipe +ffffffff8339106c D amdgpu_gpu_recovery +ffffffff83391070 D amdgpu_smu_pptable_id +ffffffff83391074 D amdgpu_dc_feature_mask +ffffffff83391078 D amdgpu_async_gfx_ring +ffffffff8339107c D amdgpu_mcbp +ffffffff83391080 D amdgpu_discovery +ffffffff83391084 D amdgpu_noretry +ffffffff83391088 D amdgpu_force_asic_type +ffffffff8339108c D amdgpu_tmz +ffffffff83391090 D amdgpu_reset_method +ffffffff83391094 D amdgpu_num_kcq +ffffffff83391098 D amdgpu_use_xgmi_p2p +ffffffff8339109c D amdgpu_sg_display +ffffffff833910a0 D amdgpu_user_partt_mode +ffffffff833910a8 D mgpu_info +ffffffff83391558 D amdgpu_ras_enable +ffffffff8339155c D amdgpu_ras_mask +ffffffff83391560 D amdgpu_bad_page_threshold +ffffffff83391564 D amdgpu_backlight +ffffffff83391568 D amdgpu_cd +ffffffff83391588 D amdgpu_stdscreen +ffffffff833915b8 D amdgpu_scrlist +ffffffff833915c0 D amdgpu_screenlist +ffffffff833915d0 D amdgpu_accessops +ffffffff83392000 d amdgpu_gtt_mgr_attributes +ffffffff83393000 D amdgpu_bbops +ffffffff83394000 D soc15_ih_clientid_name +ffffffff83395000 D ras_error_string +ffffffff83395030 D ras_block_string +ffffffff833950c0 D ras_mca_block_string +ffffffff83396000 d amdgpu_bo_driver +ffffffff83397000 d amdgpu_vram_mgr_attributes +ffffffff83398000 d xgmi_mutex +ffffffff83398010 D xgmi_ras_hw_ops +ffffffff83398050 D xgmi_ras +ffffffff83399000 D aqua_vanjaram_xcp_funcs +ffffffff8339a000 D gfx_v11_0_3_ras +ffffffff8339b000 d gfx_v9_0_ras +ffffffff8339c000 D gfx_v9_4_ras +ffffffff8339d000 D gfx_v9_4_2_ras_ops +ffffffff8339d040 D gfx_v9_4_2_ras +ffffffff8339e000 D gfx_v9_4_3_xcp_funcs +ffffffff8339e020 D gfx_v9_4_3_ras_ops +ffffffff8339e060 D gfx_v9_4_3_ras +ffffffff8339f000 D gfxhub_v1_2_xcp_funcs +ffffffff833a0000 D hdp_v4_0_ras_hw_ops +ffffffff833a0040 D hdp_v4_0_ras +ffffffff833a1000 d jpeg_v2_6_ras +ffffffff833a2000 d jpeg_v4_0_ras +ffffffff833a3000 d jpeg_v4_0_3_ras +ffffffff833a4000 D mca_v3_0_mp0_ras +ffffffff833a4058 D mca_v3_0_mp1_ras +ffffffff833a40b0 D mca_v3_0_mpio_ras +ffffffff833a5000 D mmhub_v1_0_ras_hw_ops +ffffffff833a5040 D mmhub_v1_0_ras +ffffffff833a6000 D mmhub_v1_7_ras_hw_ops +ffffffff833a6040 D mmhub_v1_7_ras +ffffffff833a7000 D mmhub_v1_8_ras +ffffffff833a8000 D mmhub_v9_4_ras +ffffffff833a9000 D nbio_v4_3_ras +ffffffff833aa000 D nbio_v7_4_ras +ffffffff833ab000 D nbio_v7_9_ras +ffffffff833ac000 d sriov_sc_video_codecs_encode +ffffffff833ac010 d sriov_sc_video_codecs_decode_vcn1 +ffffffff833ac020 d sriov_sc_video_codecs_decode_vcn0 +ffffffff833ac030 d sriov_sc_video_codecs_encode_array +ffffffff833ac060 d sriov_sc_video_codecs_decode_array_vcn1 +ffffffff833ac0f0 d sriov_sc_video_codecs_decode_array_vcn0 +ffffffff833ad000 d sdma_v4_0_ras +ffffffff833ae000 D sdma_v4_4_ras +ffffffff833af000 D sdma_v4_4_2_xcp_funcs +ffffffff833af020 d sdma_v4_4_2_ras +ffffffff833b0000 d sdma_v6_0_3_ras +ffffffff833b1000 d sienna_cichlid_mode2_handler +ffffffff833b2000 d smu_v13_0_10_mode2_handler +ffffffff833b3000 d sriov_vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff833b3010 d sriov_vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff833b3020 d sriov_vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff833b3030 d sriov_vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff833b3040 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff833b3070 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff833b3100 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff833b3140 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff833b4000 D umc_v6_1_ras +ffffffff833b5000 D umc_v6_7_ras +ffffffff833b6000 D umc_v8_10_ras +ffffffff833b7000 D umc_v8_7_ras +ffffffff833b8000 d vcn_v2_6_ras +ffffffff833b9000 d vcn_v4_0_unified_ring_vm_funcs +ffffffff833b9140 d vcn_v4_0_ras +ffffffff833ba000 d vcn_v4_0_3_ras +ffffffff833bb000 d amdgpu_dm_mode_config_helperfuncs +ffffffff833bb010 d dm_atomic_state_funcs +ffffffff833bc000 d construct_integrated_info.result +ffffffff833bc004 d bios_parser_get_firmware_info.result +ffffffff833bd000 d dce_funcs +ffffffff833be000 d dce110_funcs +ffffffff833bf000 d dce112_funcs +ffffffff833c0000 d dce120_funcs +ffffffff833c1000 d rv1_clk_funcs +ffffffff833c1090 d rv1_clk_internal_funcs +ffffffff833c2000 d rv2_clk_internal_funcs +ffffffff833c3000 d dcn2_funcs +ffffffff833c4000 d dcn201_funcs +ffffffff833c5000 d dcn21_funcs +ffffffff833c5090 d rn_bw_params +ffffffff833c6000 D dcn3_fpga_funcs +ffffffff833c6090 d dcn3_funcs +ffffffff833c7000 d vg_funcs +ffffffff833c7090 d dummy_clocks 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dcn321_res_pool_funcs +ffffffff833f3000 D dcn1_0_ip +ffffffff833f31b8 D dcn1_0_soc +ffffffff833f5000 D dcn2_0_ip +ffffffff833f51b8 D dcn2_0_nv14_ip +ffffffff833f5370 D dcn2_0_soc +ffffffff833f66a8 D dcn2_0_nv14_soc +ffffffff833f79e0 D dcn2_0_nv12_soc +ffffffff833f8d18 D dcn2_1_ip +ffffffff833f8ed0 D dcn2_1_soc +ffffffff833fa208 D ddr4_wm_table_gs +ffffffff833fa2c8 D lpddr4_wm_table_gs +ffffffff833fa388 D lpddr4_wm_table_with_disabled_ppt +ffffffff833fa448 D ddr4_wm_table_rn +ffffffff833fa508 D ddr4_1R_wm_table_rn +ffffffff833fa5c8 D lpddr4_wm_table_rn +ffffffff833fb000 D dcn3_0_ip +ffffffff833fb1b8 D dcn3_0_soc +ffffffff833fd000 D dcn3_01_ip +ffffffff833fd1b8 D dcn3_01_soc +ffffffff833fe4f0 D ddr4_wm_table +ffffffff833fe5b0 D lpddr5_wm_table +ffffffff833ff000 D dcn3_02_ip +ffffffff833ff1b8 D dcn3_02_soc +ffffffff83401000 D dcn3_03_ip +ffffffff834011b8 D dcn3_03_soc +ffffffff83403000 D dcn3_1_ip +ffffffff834031b8 D dcn3_15_ip +ffffffff83403370 D dcn3_16_ip +ffffffff83403528 d dcn3_15_soc +ffffffff83404860 d dcn3_1_soc +ffffffff83405b98 d dcn3_16_soc +ffffffff83407000 D dcn3_14_ip +ffffffff834071b8 d dcn3_14_soc +ffffffff83409000 D dcn3_2_ip +ffffffff834091b8 D dcn3_2_soc +ffffffff8340b000 D dcn3_21_ip +ffffffff8340b1b8 D dcn3_21_soc +ffffffff8340d000 d dsc_policy_max_target_bpp_limit +ffffffff8340e000 D DIDTEDCConfig_P12 +ffffffff8340e070 d smu7_profiling +ffffffff8340f000 d cyan_skillfish_table_map +ffffffff8340f080 d cyan_skillfish_message_map +ffffffff83410000 d navi10_table_map +ffffffff83410080 d navi10_pwr_src_map +ffffffff83410090 d navi10_workload_map +ffffffff834100e0 d navi10_message_map +ffffffff83410b60 d navi10_clk_map +ffffffff83410c20 d navi10_feature_mask_map +ffffffff83411000 d sienna_cichlid_table_map +ffffffff83411080 d sienna_cichlid_pwr_src_map +ffffffff83411090 d sienna_cichlid_workload_map +ffffffff834110e0 d sienna_cichlid_message_map +ffffffff83411b60 d sienna_cichlid_clk_map +ffffffff83411c20 d sienna_cichlid_feature_mask_map +ffffffff83412000 d vangogh_message_map +ffffffff83412a80 d vangogh_table_map +ffffffff83412b00 d vangogh_workload_map +ffffffff83412b50 d vangogh_feature_mask_map +ffffffff83413000 d renoir_table_map +ffffffff83413080 d renoir_workload_map +ffffffff834130d0 d renoir_message_map +ffffffff83413b50 d renoir_clk_map +ffffffff83414000 d smu_v13_0_0_message_map +ffffffff83414a80 d smu_v13_0_0_feature_mask_map +ffffffff83414e50 d smu_v13_0_0_table_map +ffffffff83414ed0 d smu_v13_0_0_pwr_src_map +ffffffff83414ee0 d smu_v13_0_0_workload_map +ffffffff83414f30 d smu_v13_0_0_clk_map +ffffffff83415000 d smu_v13_0_4_table_map +ffffffff83415080 d smu_v13_0_4_message_map +ffffffff83415b00 d smu_v13_0_4_feature_mask_map +ffffffff83416000 d smu_v13_0_5_table_map +ffffffff83416080 d smu_v13_0_5_message_map +ffffffff83416b00 d smu_v13_0_5_feature_mask_map +ffffffff83417000 d smu_v13_0_7_message_map +ffffffff83417a80 d smu_v13_0_7_feature_mask_map +ffffffff83417e50 d smu_v13_0_7_table_map +ffffffff83417ed0 d smu_v13_0_7_pwr_src_map +ffffffff83417ee0 d smu_v13_0_7_workload_map +ffffffff83417f30 d smu_v13_0_7_clk_map +ffffffff83418000 d yellow_carp_table_map +ffffffff83418080 d yellow_carp_message_map +ffffffff83418b00 d yellow_carp_feature_mask_map +ffffffff83419000 D pci_conf_lock +ffffffff83419010 D pci_bus_dma_tag +ffffffff83419088 D msi_pic +ffffffff83419120 D msix_pic +ffffffff8341a000 D pchb_cd +ffffffff8341b000 D amas_cd +ffffffff8341c000 D cardslot_cd +ffffffff8341d000 D cardbus_cd +ffffffff8341e000 d csdevs +ffffffff8341f000 d ral_rt2560_opns +ffffffff8341f028 d ral_rt2661_opns +ffffffff8341f050 d ral_rt2860_opns +ffffffff83420000 D pcmcia_cd +ffffffff83421000 D pcmcia_3cxem556_func0 +ffffffff834210b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff83421158 D pcmcia_megahertz_xjem1144_func0 +ffffffff83421210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff834212b0 d pcmcia_3cxem556_func1 +ffffffff83421368 d pcmcia_3cxem556_func1_cfe0 +ffffffff83421408 d pcmcia_megahertz_xjem1144_func1 +ffffffff834214c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff83421560 d pcmcia_sierra_a555_func1 +ffffffff83421618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff834216b8 d pcmcia_sveclancard_func0 +ffffffff83421770 d pcmcia_sveclancard_func0_cfe0 +ffffffff83422000 D ep_pcmcia_prod +ffffffff83423000 D aic_pcmcia_prod +ffffffff83424000 D com_pcmcia_prod +ffffffff83425000 D wdc_pcmcia_pr +ffffffff83426000 D sm_pcmcia_prod +ffffffff83427000 D xe_cd +ffffffff83428000 D pcib_cd +ffffffff83429000 D amdpcib_cd +ffffffff8342a000 D tcpcib_cd +ffffffff8342b000 D aapic_cd +ffffffff8342c000 D hme_cd +ffffffff8342d000 D isa_cd +ffffffff8342e000 D isadma_cd +ffffffff8342f000 D fdc_cd +ffffffff83430000 D fd_types +ffffffff834301f8 D fd_cd +ffffffff83431000 D mpu_cd +ffffffff83432000 D pcppi_cd +ffffffff83433000 D spkr_cd +ffffffff83434000 D wbsio_cd +ffffffff83435000 D schsio_cd +ffffffff83436000 D it_cd +ffffffff83437000 D uguru_cd +ffffffff83438000 D aps_cd +ffffffff83439000 D isa_bus_dma_tag +ffffffff8343a000 D wsdisplay_cd +ffffffff8343a020 D wsdisplay_cons +ffffffff8343a058 D wsdisplay_defaultscreens +ffffffff8343b000 D wskbd_cd +ffffffff8343b020 D wskbd_default_bell_data +ffffffff8343b030 D wskbd_default_keyrepeat_data +ffffffff8343b040 D wskbd_srcops +ffffffff8343c000 d compose_tab +ffffffff8343d000 D wsmouse_cd +ffffffff8343d020 D wsmouse_srcops +ffffffff8343e000 D wsmux_srcops +ffffffff8343e030 D wsmux_tree_lock +ffffffff8343f000 D vt100_output +ffffffff83440000 D pckbd_cd +ffffffff83441000 D pms_cd +ffffffff83441020 d synaptics_params +ffffffff83441030 d alps_params +ffffffff83442000 D skgpio_cd +ffffffff83443000 D pctr_conf_lock +ffffffff83444000 D ukbd_keymapdata +ffffffff83445000 D usbrev_str +ffffffff83445030 D usb_cd +ffffffff83446000 d usbd_ratecheck.errinterval +ffffffff83447000 D uhub_cd +ffffffff83448000 D uaudio_cd +ffffffff83449000 D uvideo_ctrls +ffffffff834492d8 D uvideo_cd +ffffffff8344a000 D utvfu_norm_params +ffffffff8344a030 D utvfu_cd +ffffffff8344b000 D udl_reg_vals_640x480_60 +ffffffff8344b020 D udl_reg_vals_640x480_67 +ffffffff8344b040 D udl_reg_vals_640x480_72 +ffffffff8344b060 D udl_reg_vals_640x480_75 +ffffffff8344b080 D udl_reg_vals_800x480_61 +ffffffff8344b0a0 D udl_reg_vals_800x600_56 +ffffffff8344b0c0 D udl_reg_vals_800x600_60 +ffffffff8344b0e0 D udl_reg_vals_800x600_72 +ffffffff8344b100 D udl_reg_vals_800x600_74 +ffffffff8344b120 D udl_reg_vals_800x600_75 +ffffffff8344b140 D udl_reg_vals_1024x768_60 +ffffffff8344b160 D udl_reg_vals_1024x768_70 +ffffffff8344b180 D udl_reg_vals_1024x768_75 +ffffffff8344b1a0 D udl_reg_vals_1280x800_60 +ffffffff8344b1c0 D udl_reg_vals_1280x960_60 +ffffffff8344b1e0 D udl_reg_vals_1280x1024_60 +ffffffff8344b200 D udl_reg_vals_1280x1024_75 +ffffffff8344b220 D udl_reg_vals_1366x768_60 +ffffffff8344b240 D udl_reg_vals_1440x900_60 +ffffffff8344b260 D udl_reg_vals_1440x900_59 +ffffffff8344b280 D udl_reg_vals_1440x900_75 +ffffffff8344b2a0 D udl_reg_vals_1680x1050_60 +ffffffff8344b2c0 D udl_reg_vals_1600x1200_60 +ffffffff8344b2e0 D udl_reg_vals_1920x1080_60 +ffffffff8344b300 D udl_null_key_1 +ffffffff8344b310 D udl_decomp_table +ffffffff8344c510 D udl_cd +ffffffff8344c530 D udl_stdscreen +ffffffff8344c560 D udl_scrlist +ffffffff8344c568 D udl_screenlist +ffffffff8344c578 D udl_accessops +ffffffff8344d000 D umidi_cd +ffffffff8344e000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff8344e020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff8344e040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff8344e060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff8344e080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff8344e0a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff8344e0c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff8344e0e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff8344e100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff8344e120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff8344e140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff8344e160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff8344e180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff8344e1a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff8344e1c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff8344e1e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff8344e200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff8344e220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff8344e240 D umidi_quirklist +ffffffff8344e4a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff8344e4c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff8344e4d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff8344e4f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff8344e500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff8344e520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff8344e530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff8344e550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff8344e560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff8344e580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff8344e590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff8344e5b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff8344e5c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff8344e5e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff8344e5f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff8344e610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff8344e620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff8344e640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff8344e650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff8344e670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff8344e680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff8344e6a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff8344e6b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff8344e6d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff8344e6e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff8344e700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff8344e710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff8344e730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff8344e740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff8344e760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff8344e770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff8344e790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff8344e7a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff8344e7c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff8344e7d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff8344e7f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff8344f000 D ucom_cd +ffffffff8344f020 D sysctl_ucomlock +ffffffff83450000 D ugen_cd +ffffffff83451000 D uhidev_cd +ffffffff83451020 d uhidev_use_rdesc.reportbuf +ffffffff83452000 D uhid_cd +ffffffff83453000 D fido_cd +ffffffff83454000 D ujoy_cd +ffffffff83455000 D ukbd_cd +ffffffff83456000 D ums_cd +ffffffff83456020 d ums_fix_elecom_descriptor.match +ffffffff83457000 D umt_cd +ffffffff83458000 D def_scale +ffffffff83458020 D uts_cd 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icc_cd +ffffffff834c0000 D gpio_cd +ffffffff834c1000 D acpi_cd +ffffffff834c1020 D acpi_pcidevs +ffffffff834c1030 D acpi_pcirootdevs +ffffffff834c1040 D acpi_taskq +ffffffff834c1050 d acpi_indicator.save_led_state +ffffffff834c1060 d acpi_getprop.prop_guid +ffffffff834c1070 d acpi_getpropint.prop_guid +ffffffff834c1080 D acpi_skip_hids +ffffffff834c10f0 D acpi_isa_hids +ffffffff834c2000 D aml_intlen +ffffffff834c2010 D aml_table +ffffffff834c2af0 d osstring +ffffffff834c2b10 D aml_defobj +ffffffff834c2ca0 D aml_valid_osi +ffffffff834c2d78 D acpi_max_osi +ffffffff834c2d80 D aml_regionspace +ffffffff834c4000 D acpitimer_cd +ffffffff834c4020 d acpi_timecounter +ffffffff834c5000 D acpiac_cd +ffffffff834c5020 D acpiac_hids +ffffffff834c6000 D acpibat_cd +ffffffff834c6020 D acpibat_hids +ffffffff834c7000 D acpibtn_cd +ffffffff834c7020 D acpibtn_hids +ffffffff834c8000 D acpicmos_cd +ffffffff834c8020 D acpicmos_hids +ffffffff834c9000 D acpicpu_cd +ffffffff834c9020 D acpicpu_hids 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drm_minors_idr +ffffffff83506008 B drm_refcnt +ffffffff83507000 B vga_console_screen +ffffffff83507070 B vga_console_attached +ffffffff83507078 B vga_console_vc +ffffffff83507488 B vgaconsole +ffffffff8350748c B vga_console_type +ffffffff83508000 b wdc_alloc_queue.inited +ffffffff83508008 B wdc_xfer_pool +ffffffff835081b0 B wdc_xfer_iopool +ffffffff83509000 B aic_debug +ffffffff8350a000 B gdt_cnt +ffffffff8350a004 B gdt_polling +ffffffff8350a005 B gdt_from_wait +ffffffff8350a008 b gdt_exec_ccb.__level +ffffffff8350a00c B gdt_wait_index +ffffffff8350a010 B gdt_wait_gdt +ffffffff8350b000 B sili_error_pmp_ports +ffffffff8350c000 B ncr53c9x_debug +ffffffff8350c008 b ecb_iopool +ffffffff8350c048 b ecb_pool_initialized +ffffffff8350c050 b ecb_pool +ffffffff8350c1f8 B sdebug +ffffffff8350d000 B epic_copy_small +ffffffff8350e000 B comconsaddr +ffffffff8350e008 B comconsiot +ffffffff8350e010 B comconsioh +ffffffff8350e018 B comconsfreq +ffffffff8350e01c B comcons_reg_width +ffffffff8350e020 B commajor +ffffffff8350e024 B comconsunit +ffffffff8350e028 B comcons_reg_shift +ffffffff8350e02c B comconsattached +ffffffff8350f000 B pckbc_console +ffffffff8350f004 B pckbc_console_attached +ffffffff8350f008 B pckbc_consdata +ffffffff8350f0e0 b pckbc_cons_slotdata +ffffffff83510000 b cy_poll.counter +ffffffff83511000 B atw_xindiv2 +ffffffff83512000 B rtw_rfprog_fallback +ffffffff83512004 B rtw_do_chip_reset +ffffffff83513000 b malo_cmd_string.cmd_buf +ffffffff83514000 b iosf_mbi +ffffffff83515000 B uhcixfer +ffffffff83516000 B ohcixfer +ffffffff83516008 b ohci_intr.ohci_intr_tv +ffffffff83517000 B ehcixfer +ffffffff83518000 B xhcixfer +ffffffff83519000 B ipmi_enabled +ffffffff83519008 B ipmi_sensor_list +ffffffff8351a000 B mpath +ffffffff8351b000 B sr_bootuuid +ffffffff8351b010 B sr_bootkey +ffffffff8351b030 B softraid0 +ffffffff8351b038 B sr_hotplug_callbacks +ffffffff8351c000 B gf_pow +ffffffff8351c300 B gf_map +ffffffff8351cb00 B gf_log +ffffffff8351d000 b ksym_syms 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pfr_ktables +ffffffff83527c90 B pfr_ktable_cnt +ffffffff83527c94 B pfr_mask +ffffffff83528000 B pf_osfp_list +ffffffff83528008 B pf_osfp_entry_pl +ffffffff835281b0 B pf_osfp_pl +ffffffff83529000 B pfi_all +ffffffff83529008 B pfi_addr_pl +ffffffff835291b0 B pfi_buffer_max +ffffffff835291b8 B pfi_buffer +ffffffff835291c0 B pfi_ifs +ffffffff835291c8 B pfi_buffer_cnt +ffffffff8352a000 b pf_syncookie_status +ffffffff8352b000 B hfsc_class_pl +ffffffff8352b1a8 B hfsc_internal_sc_pl +ffffffff8352c000 B pflog_ifs +ffffffff8352d000 b pfsynccounters +ffffffff8352d008 b pfsyncif +ffffffff8352d010 b pfsync_deferrals_pool +ffffffff8352e000 B pflowif_list +ffffffff8352e008 B pflow_counters +ffffffff8352f000 B bios +ffffffff83530000 b opened +ffffffff83530004 b evqueue_head +ffffffff83530008 b evqueue_tail +ffffffff8353000c b evqueue_count +ffffffff83530010 b hotplug_klist +ffffffff83530030 b evqueue +ffffffff83531000 B pppoe_softc_list +ffffffff83532000 B dt_tracing +ffffffff83532008 B dtdev_list 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db_lbuf_start +ffffffff8353bfc0 B db_lbuf_end +ffffffff8353c000 B db_line +ffffffff8353c078 B db_lp +ffffffff8353c080 B db_endlp +ffffffff8353c088 B db_look_char +ffffffff8353c08c B db_look_token +ffffffff8353c090 B db_tok_number +ffffffff8353c0a0 B db_tok_string +ffffffff8353d000 B db_output_position +ffffffff8353d004 B db_output_line +ffffffff8353d008 B db_last_non_space +ffffffff8353d010 b db_stack_dump.intrace +ffffffff8353e000 b db_rint.ddbescape +ffffffff8353f000 B db_run_mode +ffffffff8353f004 B db_loop_count +ffffffff8353f008 B db_sstep_print +ffffffff8353f00c B db_call_depth +ffffffff8353f010 B db_inst_count +ffffffff83540000 b db_trap.ddb_msg_shown +ffffffff83541000 B db_watch_table +ffffffff83541960 B db_free_watchpoints +ffffffff83541968 B db_watchpoint_list +ffffffff83542000 B db_profile +ffffffff83543000 B audio_record_enable +ffffffff83544000 B constty +ffffffff83544008 B cn_devvp +ffffffff83544010 b cnpollc.refcount +ffffffff83545000 B numvnd +ffffffff83545008 B vnd_softc +ffffffff83546000 B rnd_event_prod +ffffffff83546010 B rnd_event_space +ffffffff83546410 B rnd_event_cons +ffffffff83546414 b add_entropy_words.entropy_add_ptr +ffffffff83546418 b add_entropy_words.entropy_input_rotate +ffffffff83546420 b entropy_pool +ffffffff83548420 b extract_entropy.extract_pool +ffffffff8354a420 b rs_count +ffffffff8354a428 b rs_have +ffffffff8354a430 b rs_buf +ffffffff8354a830 b rs +ffffffff8354a870 b _rs_stir_if_needed.rs_initialized +ffffffff8354b000 B video_record_enable +ffffffff8354c000 B iso_nchstats +ffffffff8354d000 B isohash +ffffffff8354d008 B isohashtbl +ffffffff8354d010 B isohashkey +ffffffff8354e000 B cd9660_wchar2char +ffffffff8354f000 B udf_trans_pool +ffffffff8354f1a8 B unode_pool +ffffffff8354f350 B udf_ds_pool +ffffffff83550000 B exec_maxhdrsz +ffffffff83551000 B db_active +ffffffff83551004 B pdevinit_done +ffffffff83551008 B proc0 +ffffffff835512b0 B boothowto +ffffffff835512b8 B process0 +ffffffff835516e8 B pgrp0 +ffffffff83551718 B session0 +ffffffff835517a8 B sigacts0 +ffffffff83551950 B limit0 +ffffffff835519e8 B vmspace0 +ffffffff83551b48 B initprocess +ffffffff83551b50 B reaperproc +ffffffff83551b58 B start_init_exec +ffffffff83551b60 B rootvp +ffffffff83551b68 B swapdev_vp +ffffffff83552000 B acctp +ffffffff83552008 B savacctp +ffffffff83552010 B acct_proc +ffffffff83553000 B bufqs +ffffffff83553008 B bufqs_mtx +ffffffff83553018 B bufqs_stop +ffffffff83554000 B hardclock_period +ffffffff83554008 B stathz +ffffffff83554010 B statclock_avg +ffffffff83554018 B statclock_min +ffffffff83554020 B statclock_mask +ffffffff83554024 B profhz +ffffffff83554028 B jiffies +ffffffff83554030 B profprocs +ffffffff83554034 B statclock_is_randomized +ffffffff83555000 B file_pool +ffffffff835551a8 B fdesc_pool +ffffffff83555350 B filehead +ffffffff83555358 B numfiles +ffffffff83556000 B kq_ntimeouts +ffffffff83556008 B kqueue_pool +ffffffff835561b0 B knote_pool +ffffffff83557000 B sigobject +ffffffff83557008 B sigcode_va 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