--- 7.4/2024-02-01T07:17:04Z/2024-01-19T00:00:00Z/nm-bsd-ot14.txt Sat Feb 3 16:42:39 2024 +++ 7.4/2024-02-01T07:17:04Z/2024-01-20T00:00:00Z/nm-bsd-ot14.txt Sat Feb 3 19:38:48 2024 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -025f5000 T __kernel_kutext_phys -025f9000 C __kernel_cptext_phys -025fa000 C __kernel_rodata_phys -02eec000 R __kernel_kutext_page_phys -02eee000 C __kernel_randomdata_phys -031ab000 R __kernel_data_phys -03501000 D __kernel_kudata_phys -03502000 C __kernel_bss_phys +025f6000 T __kernel_kutext_phys +025fa000 C __kernel_cptext_phys +025fb000 C __kernel_rodata_phys +02eed000 R __kernel_kutext_page_phys +02eef000 C __kernel_randomdata_phys +031ac000 R __kernel_data_phys +03502000 D __kernel_kudata_phys +03503000 C __kernel_bss_phys 03a00000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -1395,24 +1395,26 @@ ffffffff810b33e0 T re_txstart ffffffff810b3410 T re_ifmedia_upd ffffffff810b3430 T re_ifmedia_sts ffffffff810b3490 T re_kstat_attach -ffffffff810b3750 T re_newbuf -ffffffff810b3980 T re_tx_list_init -ffffffff810b3a50 T re_rx_list_init -ffffffff810b3b30 T re_rx_list_fill -ffffffff810b3bb0 T re_rxeof -ffffffff810b3ff0 T re_txeof -ffffffff810b41d0 T re_intr -ffffffff810b4540 T re_init -ffffffff810b4b00 T re_setup_intr -ffffffff810b4df0 T re_encap -ffffffff810b53c0 T re_stop -ffffffff810b56d0 T re_set_jumbo -ffffffff810b57c0 T re_setup_hw_im -ffffffff810b5840 T re_disable_hw_im -ffffffff810b5890 T re_setup_sim_im -ffffffff810b5950 T re_disable_sim_im -ffffffff810b59c0 t re_kstat_read -ffffffff810b5b40 t re_kstat_copy +ffffffff810b3750 T re_detach +ffffffff810b37c0 T re_kstat_detach +ffffffff810b3890 T re_newbuf +ffffffff810b3ac0 T re_tx_list_init +ffffffff810b3b90 T re_rx_list_init +ffffffff810b3c70 T re_rx_list_fill +ffffffff810b3cf0 T re_rxeof +ffffffff810b4130 T re_txeof +ffffffff810b4310 T re_intr +ffffffff810b4680 T re_init +ffffffff810b4c40 T re_setup_intr +ffffffff810b4f30 T re_encap +ffffffff810b5500 T re_stop +ffffffff810b5810 T re_set_jumbo +ffffffff810b5900 T re_setup_hw_im +ffffffff810b5980 T re_disable_hw_im +ffffffff810b59d0 T re_setup_sim_im +ffffffff810b5a90 T re_disable_sim_im +ffffffff810b5b00 t re_kstat_read +ffffffff810b5c80 t re_kstat_copy ffffffff810b6000 T dc_delay ffffffff810b6120 T dc_eeprom_width ffffffff810b6fc0 T dc_eeprom_idle @@ -5685,18 +5687,18 @@ ffffffff812a4670 T exec_timekeep_map ffffffff812a4810 T exec_sigcode_map ffffffff812a5000 T sys_exit ffffffff812a5020 T exit1 -ffffffff812a5790 T sys___threxit -ffffffff812a57f0 T process_untrace -ffffffff812a5880 T process_reparent -ffffffff812a59f0 T process_clear_orphan -ffffffff812a5a60 T exit2 -ffffffff812a5ad0 T proc_free -ffffffff812a5b30 T reaper -ffffffff812a5d00 T process_zap -ffffffff812a5ed0 T dowait6 -ffffffff812a6360 T proc_finish_wait -ffffffff812a6470 T sys_wait4 -ffffffff812a65c0 T sys_waitid +ffffffff812a5780 T sys___threxit +ffffffff812a57e0 T process_untrace +ffffffff812a5870 T process_reparent +ffffffff812a59e0 T process_clear_orphan +ffffffff812a5a50 T exit2 +ffffffff812a5ac0 T proc_free +ffffffff812a5b20 T reaper +ffffffff812a5cf0 T process_zap +ffffffff812a5ec0 T dowait6 +ffffffff812a6350 T proc_finish_wait +ffffffff812a6460 T sys_wait4 +ffffffff812a65b0 T sys_waitid ffffffff812a7000 T fork_return ffffffff812a7040 T sys_fork ffffffff812a7090 T fork1 @@ -5795,19 +5797,18 @@ ffffffff812b1410 T inferior ffffffff812b1460 T tfind ffffffff812b14c0 T tfind_user ffffffff812b1550 T prfind -ffffffff812b15b0 T priterator -ffffffff812b1650 T pgfind -ffffffff812b16a0 T zombiefind -ffffffff812b1700 T enternewpgrp -ffffffff812b18a0 T zapverauth -ffffffff812b18d0 T enterthispgrp -ffffffff812b1a10 T fixjobc -ffffffff812b1bb0 T pgdelete -ffffffff812b1c60 T leavepgrp -ffffffff812b1d00 T killjobc -ffffffff812b1dc0 T proc_printit -ffffffff812b1fc0 T db_kill_cmd -ffffffff812b2020 T db_show_all_procs +ffffffff812b15b0 T pgfind +ffffffff812b1600 T zombiefind +ffffffff812b1660 T enternewpgrp +ffffffff812b1800 T zapverauth +ffffffff812b1830 T enterthispgrp +ffffffff812b1970 T fixjobc +ffffffff812b1b10 T pgdelete +ffffffff812b1bc0 T leavepgrp +ffffffff812b1c60 T killjobc +ffffffff812b1d20 T proc_printit +ffffffff812b1f20 T db_kill_cmd +ffffffff812b1f80 T db_show_all_procs ffffffff812b3000 T crset ffffffff812b3050 T sys_getpid ffffffff812b3090 T sys_getthrid @@ -6056,35 +6057,35 @@ ffffffff812ca2e0 T sysctl_proc_cwd ffffffff812ca480 T sysctl_proc_nobroadcastkill ffffffff812ca600 T sysctl_proc_vmmap ffffffff812ca830 T sysctl_file -ffffffff812cb770 T sysctl_sysvipc -ffffffff812cb9f0 T sysctl_intrcnt -ffffffff812cba10 T sysctl_cptime2 -ffffffff812cbaf0 T sysctl_audio -ffffffff812cbbd0 T sysctl_video -ffffffff812cbcb0 T sysctl_cpustats -ffffffff812cbe10 T sysctl_rdstring -ffffffff812cbec0 T sysctl_rdint -ffffffff812cbf40 T sysctl_int -ffffffff812cc000 T sysctl_securelevel_int -ffffffff812cc140 T sysctl_tstring -ffffffff812cc190 T sysctl_rdstruct -ffffffff812cc200 T sysctl_utc_offset -ffffffff812cc2d0 T sysctl_bounded_arr -ffffffff812cc370 T sysctl_diskinit -ffffffff812cc770 T sysctl_sensors -ffffffff812cc9a0 T sysctl_rdquad -ffffffff812cca20 T sysctl_hwbattery -ffffffff812ccba0 T sysctl_hwchargemode -ffffffff812ccc30 T sysctl_int_bounded -ffffffff812ccd70 T sysctl_hwchargestart -ffffffff812cce00 T sysctl_hwchargestop -ffffffff812cce90 T sysctl_int_lower -ffffffff812ccfa0 T sysctl_quad -ffffffff812cd060 T sysctl_string -ffffffff812cd150 T sysctl__string -ffffffff812cd2b0 T sysctl_struct -ffffffff812cd380 T fill_file -ffffffff812cdae0 T fill_kproc +ffffffff812cb790 T sysctl_sysvipc +ffffffff812cba10 T sysctl_intrcnt +ffffffff812cba30 T sysctl_cptime2 +ffffffff812cbb10 T sysctl_audio +ffffffff812cbbf0 T sysctl_video +ffffffff812cbcd0 T sysctl_cpustats +ffffffff812cbe30 T sysctl_rdstring +ffffffff812cbee0 T sysctl_rdint +ffffffff812cbf60 T sysctl_int +ffffffff812cc020 T sysctl_securelevel_int +ffffffff812cc160 T sysctl_tstring +ffffffff812cc1b0 T sysctl_rdstruct +ffffffff812cc220 T sysctl_utc_offset +ffffffff812cc2f0 T sysctl_bounded_arr +ffffffff812cc390 T sysctl_diskinit +ffffffff812cc790 T sysctl_sensors +ffffffff812cc9c0 T sysctl_rdquad +ffffffff812cca40 T sysctl_hwbattery +ffffffff812ccbc0 T sysctl_hwchargemode +ffffffff812ccc50 T sysctl_int_bounded +ffffffff812ccd90 T sysctl_hwchargestart +ffffffff812cce20 T sysctl_hwchargestop +ffffffff812cceb0 T sysctl_int_lower +ffffffff812ccfc0 T sysctl_quad +ffffffff812cd080 T sysctl_string +ffffffff812cd170 T sysctl__string +ffffffff812cd2d0 T sysctl_struct +ffffffff812cd3a0 T fill_file +ffffffff812cdb00 T fill_kproc ffffffff812cf000 T sleep_queue_init ffffffff812cf060 T tsleep ffffffff812cf1e0 T sleep_setup @@ -6367,13 +6368,15 @@ ffffffff812eb170 T extent_create ffffffff812eb460 t extent_alloc_region_descriptor ffffffff812eb580 T extent_destroy ffffffff812eb6b0 t extent_free_region_descriptor -ffffffff812eb7a0 T extent_alloc_region -ffffffff812ebac0 t extent_insert_and_optimize -ffffffff812ebc20 T extent_do_alloc -ffffffff812ec1a0 T extent_alloc_subregion -ffffffff812ec250 T extent_alloc_subregion_with_descr -ffffffff812ec290 T extent_free -ffffffff812ec590 T extent_print +ffffffff812eb7a0 T extent_do_alloc_region +ffffffff812ebaa0 t extent_insert_and_optimize +ffffffff812ebc00 T extent_alloc_region +ffffffff812ebca0 T extent_alloc_region_with_descr +ffffffff812ebce0 T extent_do_alloc +ffffffff812ec260 T extent_alloc_subregion +ffffffff812ec310 T extent_alloc_subregion_with_descr +ffffffff812ec350 T extent_free +ffffffff812ec650 T extent_print ffffffff812ed000 T device_register_wakeup ffffffff812ed030 T sleep_state ffffffff812ee000 T hibernate_sort_ranges @@ -9446,20 +9449,20 @@ ffffffff8142db80 T in_pcbdisconnect ffffffff8142dbf0 T in_pcbdetach ffffffff8142dd30 T in_pcbref ffffffff8142dd80 T in_setsockaddr -ffffffff8142dde0 T in_setpeeraddr -ffffffff8142de50 T in_sockaddr -ffffffff8142deb0 T in_peeraddr -ffffffff8142df30 T in_pcbnotifyall -ffffffff8142e090 T in_losing -ffffffff8142e120 T in_rtchange -ffffffff8142e170 T in_pcbrtentry -ffffffff8142e2c0 T in_pcbhash_lookup -ffffffff8142e430 T in_pcblookup -ffffffff8142e480 T in_pcblookup_listen -ffffffff8142e6b0 T in_pcbset_rtableid -ffffffff8142e7a0 T in_pcbset_laddr -ffffffff8142e8e0 T in_pcbunset_faddr -ffffffff8142e9a0 T in_pcbunset_laddr +ffffffff8142ddf0 T in_setpeeraddr +ffffffff8142de60 T in_sockaddr +ffffffff8142dee0 T in_peeraddr +ffffffff8142df60 T in_pcbnotifyall +ffffffff8142e0c0 T in_losing +ffffffff8142e150 T in_rtchange +ffffffff8142e1a0 T in_pcbrtentry +ffffffff8142e2f0 T in_pcbhash_lookup +ffffffff8142e460 T in_pcblookup +ffffffff8142e4b0 T in_pcblookup_listen +ffffffff8142e6e0 T in_pcbset_rtableid +ffffffff8142e7d0 T in_pcbset_laddr +ffffffff8142e910 T in_pcbunset_faddr +ffffffff8142e9d0 T in_pcbunset_laddr ffffffff8142f000 T inet_nat64_mask ffffffff8142f050 T inet_nat64 ffffffff8142f1f0 T inet_nat64_inet @@ -9663,25 +9666,25 @@ ffffffff8144f280 T tcp_bind ffffffff8144f350 T tcp_listen ffffffff8144f440 T tcp_connect ffffffff8144f6c0 T tcp_accept -ffffffff8144f790 T tcp_disconnect -ffffffff8144f850 T tcp_shutdown -ffffffff8144f9e0 T tcp_rcvd -ffffffff8144fa90 T tcp_send -ffffffff8144fba0 T tcp_abort -ffffffff8144fc50 T tcp_sense -ffffffff8144fd00 T tcp_rcvoob -ffffffff8144fe10 T tcp_sendoob -ffffffff8144ff80 T tcp_sockaddr -ffffffff81450050 T tcp_peeraddr -ffffffff81450120 T tcp_fill_info -ffffffff81450500 T tcp_ctloutput -ffffffff81450840 T tcp_dodisconnect -ffffffff81450990 T tcp_usrclosed -ffffffff81450a60 T tcp_ident -ffffffff81450de0 T tcp_sysctl_tcpstat -ffffffff814514c0 T tcp_sysctl -ffffffff81451a20 T tcp_update_sndspace -ffffffff81451ba0 T tcp_update_rcvspace +ffffffff8144f780 T tcp_disconnect +ffffffff8144f840 T tcp_shutdown +ffffffff8144f9d0 T tcp_rcvd +ffffffff8144fa80 T tcp_send +ffffffff8144fb90 T tcp_abort +ffffffff8144fc40 T tcp_sense +ffffffff8144fcf0 T tcp_rcvoob +ffffffff8144fe00 T tcp_sendoob +ffffffff8144ff70 T tcp_sockaddr +ffffffff81450030 T tcp_peeraddr +ffffffff814500f0 T tcp_fill_info +ffffffff814504d0 T tcp_ctloutput +ffffffff81450810 T tcp_dodisconnect +ffffffff81450960 T tcp_usrclosed +ffffffff81450a30 T tcp_ident +ffffffff81450db0 T tcp_sysctl_tcpstat +ffffffff81451490 T tcp_sysctl +ffffffff814519f0 T tcp_update_sndspace +ffffffff81451b70 T tcp_update_rcvspace ffffffff81452000 T udp_attach ffffffff81452100 T udp_detach ffffffff81452150 T udp_lock @@ -9691,15 +9694,15 @@ ffffffff81452250 T udp_connect ffffffff814522f0 T udp_disconnect ffffffff81452380 T udp_shutdown ffffffff814523c0 T udp_send -ffffffff814524d0 T udp_init -ffffffff81452510 T udp_input -ffffffff81453280 T udp_sbappend -ffffffff814534f0 T udp_notify -ffffffff81453530 T udp6_ctlinput -ffffffff81453880 T udp_ctlinput -ffffffff814539d0 T udp_output -ffffffff81453e40 T udp_sysctl -ffffffff81454060 T udp_sysctl_udpstat +ffffffff814524b0 T udp_init +ffffffff814524f0 T udp_input +ffffffff81453260 T udp_sbappend +ffffffff814534d0 T udp_notify +ffffffff81453510 T udp6_ctlinput +ffffffff81453860 T udp_ctlinput +ffffffff814539b0 T udp_output +ffffffff81453e10 T udp_sysctl +ffffffff81454030 T udp_sysctl_udpstat ffffffff81455000 T gre_send ffffffff81456000 T ipsp_ids_gc ffffffff81456120 T ipsp_init @@ -10791,35 +10794,35 @@ ffffffff81511bb0 T uvmspace_init ffffffff81511c80 T uvmspace_share ffffffff81511d20 T uvmspace_addref ffffffff81511db0 T uvmspace_exec -ffffffff815120e0 T uvmspace_free -ffffffff81512180 T uvm_share -ffffffff81512510 T uvm_mapent_share -ffffffff815125c0 T uvm_mapent_clone -ffffffff81512750 T uvm_mapent_forkshared -ffffffff81512810 T uvm_mapent_forkcopy -ffffffff815129e0 T uvm_mapent_forkzero -ffffffff81512ad0 T uvmspace_fork -ffffffff81512e80 T uvm_map_hint -ffffffff81512f20 T uvm_map_submap -ffffffff81513150 T uvm_map_checkprot -ffffffff815132f0 T uvm_map_create -ffffffff81513370 T uvm_map_inherit -ffffffff81513590 T uvm_map_check_copyin_add -ffffffff81513750 T uvm_map_syscall -ffffffff81513a50 T uvm_map_immutable -ffffffff81513cb0 T uvm_map_advice -ffffffff81513ee0 T uvm_map_extract -ffffffff815142c0 T uvm_map_clean -ffffffff81514860 T uvm_map_uaddr -ffffffff81514980 T uvm_map_boundary -ffffffff81514b80 T uvm_map_freelist_update -ffffffff81514ce0 T uvm_map_freelist_update_clear -ffffffff81514de0 T uvm_map_freelist_update_refill -ffffffff81514e80 T uvm_map_set_uaddr -ffffffff81515020 T uvm_map_mquery -ffffffff81515330 T uvm_map_fill_vmmap -ffffffff815155c0 t uvm_map_addr_RBT_COMPARE -ffffffff81515600 t uvm_map_addr_RBT_AUGMENT +ffffffff815120c0 T uvmspace_free +ffffffff81512160 T uvm_share +ffffffff815124f0 T uvm_mapent_share +ffffffff815125a0 T uvm_mapent_clone +ffffffff81512730 T uvm_mapent_forkshared +ffffffff815127f0 T uvm_mapent_forkcopy +ffffffff815129c0 T uvm_mapent_forkzero +ffffffff81512ab0 T uvmspace_fork +ffffffff81512eb0 T uvm_map_hint +ffffffff81512f50 T uvm_map_submap +ffffffff81513180 T uvm_map_checkprot +ffffffff81513320 T uvm_map_create +ffffffff815133a0 T uvm_map_inherit +ffffffff815135c0 T uvm_map_check_copyin_add +ffffffff81513780 T uvm_map_syscall +ffffffff81513a80 T uvm_map_immutable +ffffffff81513ce0 T uvm_map_advice +ffffffff81513f10 T uvm_map_extract +ffffffff815142f0 T uvm_map_clean +ffffffff81514890 T uvm_map_uaddr +ffffffff815149b0 T uvm_map_boundary +ffffffff81514bb0 T uvm_map_freelist_update +ffffffff81514d10 T uvm_map_freelist_update_clear +ffffffff81514e10 T uvm_map_freelist_update_refill +ffffffff81514eb0 T uvm_map_set_uaddr +ffffffff81515050 T uvm_map_mquery +ffffffff81515360 T uvm_map_fill_vmmap +ffffffff815155f0 t uvm_map_addr_RBT_COMPARE +ffffffff81515630 t uvm_map_addr_RBT_AUGMENT ffffffff81516000 T uvm_sysctl ffffffff815165a0 T uvm_total ffffffff815166d0 T uvmexp_read @@ -10833,16 +10836,16 @@ ffffffff81517bb0 T sys_munmap ffffffff81517d30 T sys_mprotect ffffffff81517ea0 T sys_msyscall ffffffff81517f40 T sys_pinsyscall -ffffffff81518010 T sys_pinsyscalls -ffffffff81518180 T sys_mimmutable -ffffffff81518220 T sys_minherit -ffffffff815182c0 T sys_madvise -ffffffff815183a0 T sys_mlock -ffffffff815184c0 T sys_munlock -ffffffff81518580 T sys_mlockall -ffffffff81518600 T sys_munlockall -ffffffff81518640 T uvm_mmaplock -ffffffff81518780 T sys_kbind +ffffffff81517f70 T sys_pinsyscalls +ffffffff815180e0 T sys_mimmutable +ffffffff81518180 T sys_minherit +ffffffff81518220 T sys_madvise +ffffffff81518300 T sys_mlock +ffffffff81518420 T sys_munlock +ffffffff815184e0 T sys_mlockall +ffffffff81518560 T sys_munlockall +ffffffff815185a0 T uvm_mmaplock +ffffffff815186f0 T sys_kbind ffffffff81519000 T uvm_obj_init ffffffff815190a0 T uvm_obj_destroy ffffffff815190e0 T uvm_obj_setlock @@ -11585,13 +11588,14 @@ ffffffff815b5480 T cpu_initclocks ffffffff815b54a0 T cpu_startclock ffffffff815b54c0 T need_resched ffffffff815b5540 T idt_vec_alloc -ffffffff815b5590 T idt_vec_set -ffffffff815b5630 T idt_vec_free -ffffffff815b5680 T splassert_check -ffffffff815b5710 T copyin32 -ffffffff815b5760 T check_context -ffffffff815b57d0 T delay_init -ffffffff815b5810 T delay_fini +ffffffff815b5590 T idt_vec_alloc_range +ffffffff815b56f0 T idt_vec_set +ffffffff815b5790 T idt_vec_free +ffffffff815b57e0 T splassert_check +ffffffff815b5870 T copyin32 +ffffffff815b58c0 T check_context +ffffffff815b5930 T delay_init +ffffffff815b5970 T delay_fini ffffffff815b6000 T get_hibernate_io_function ffffffff815b6150 T get_hibernate_info_md ffffffff815b6350 T hibernate_enter_resume_mapping @@ -12303,15 +12307,15 @@ ffffffff815f8080 T x86_nmi ffffffff815f80d0 T intr_calculatemasks ffffffff815f8470 T intr_allocate_slot_cpu ffffffff815f8610 T intr_allocate_slot -ffffffff815f88d0 T intr_establish -ffffffff815f8d30 T intr_disestablish -ffffffff815f8e70 T intr_handler -ffffffff815f8f30 T cpu_intr_init -ffffffff815f9180 T intr_printconfig -ffffffff815f91b0 T intr_barrier -ffffffff815f91d0 T splraise -ffffffff815f9240 T spllower -ffffffff815f92b0 T softintr +ffffffff815f88f0 T intr_establish +ffffffff815f8d50 T intr_disestablish +ffffffff815f8e90 T intr_handler +ffffffff815f8f50 T cpu_intr_init +ffffffff815f91a0 T intr_printconfig +ffffffff815f91d0 T intr_barrier +ffffffff815f91f0 T splraise +ffffffff815f9270 T spllower +ffffffff815f92e0 T softintr ffffffff815fa000 T x86_bus_space_io_read_1 ffffffff815fa030 T x86_bus_space_io_read_2 ffffffff815fa060 T x86_bus_space_io_read_4 @@ -15025,7 +15029,7 @@ ffffffff81745220 T rl_pci_detach ffffffff81746000 T re_pci_probe ffffffff817460a0 T re_pci_attach ffffffff817463d0 T re_pci_detach -ffffffff81746490 T re_pci_activate +ffffffff81746440 T re_pci_activate ffffffff81747000 T vr_probe ffffffff817470d0 T vr_attach ffffffff817476a0 T vr_activate @@ -18070,12989 +18074,12977 @@ ffffffff818c7fa0 T bnxt_write_cp_doorbell ffffffff818c7fe0 T bnxt_set_cp_ring_aggint ffffffff818c80c0 T bnxt_ioctl ffffffff818c8250 T bnxt_start -ffffffff818c8650 T bnxt_watchdog -ffffffff818c8680 T bnxt_media_change -ffffffff818c87d0 T bnxt_media_status -ffffffff818c87f0 T bnxt_refill -ffffffff818c8850 T bnxt_media_autonegotiate -ffffffff818c8940 T bnxt_hwrm_port_phy_qcfg -ffffffff818c8dc0 T bnxt_free_slots -ffffffff818c8e60 T bnxt_hwrm_cmd_hdr_init -ffffffff818c8eb0 T hwrm_send_message -ffffffff818c8f30 T bnxt_queue_up -ffffffff818c9ab0 T bnxt_hwrm_stat_ctx_alloc -ffffffff818c9bb0 T bnxt_write_tx_doorbell -ffffffff818c9c20 T bnxt_write_rx_doorbell -ffffffff818c9ca0 T bnxt_hwrm_ring_grp_alloc -ffffffff818c9da0 T bnxt_rx_fill -ffffffff818c9eb0 T bnxt_hwrm_ring_grp_free -ffffffff818c9f90 T bnxt_hwrm_ring_free -ffffffff818ca080 T bnxt_hwrm_stat_ctx_free -ffffffff818ca170 T bnxt_queue_down -ffffffff818ca890 T bnxt_up -ffffffff818cae20 T bnxt_hwrm_vnic_ctx_alloc -ffffffff818caf00 T bnxt_hwrm_vnic_alloc -ffffffff818cb000 T bnxt_hwrm_vnic_cfg -ffffffff818cb140 T bnxt_hwrm_vnic_cfg_placement -ffffffff818cb210 T bnxt_hwrm_set_filter -ffffffff818cb3a0 T bnxt_hwrm_vnic_rss_cfg -ffffffff818cb480 T bnxt_iff -ffffffff818cb5f0 T bnxt_hwrm_vnic_free -ffffffff818cb6e0 T bnxt_hwrm_vnic_ctx_free -ffffffff818cb7d0 T bnxt_down -ffffffff818cbba0 T bnxt_hwrm_free_filter -ffffffff818cbc80 T bnxt_hwrm_cfa_l2_set_rx_mask -ffffffff818cbd60 T bnxt_rxrinfo -ffffffff818cbeb0 T bnxt_get_sffpage -ffffffff818cc1c0 T bnxt_load_mbuf -ffffffff818cc270 T bnxt_handle_async_event -ffffffff818cc2c0 T bnxt_cpr_next_cmpl -ffffffff818cc330 T bnxt_cpr_commit -ffffffff818cc360 T bnxt_cpr_rollback -ffffffff818cc390 T bnxt_write_cp_doorbell_index -ffffffff818cc410 T bnxt_rx -ffffffff818cc6b0 T bnxt_txeof -ffffffff818cc7e0 T bnxt_get_media_type -ffffffff818ccd40 T bnxt_add_media_type -ffffffff818ccf00 T _hwrm_send_message -ffffffff818cfc20 T bnxt_rx_fill_slots -ffffffff818cfe00 T bnxt_hwrm_err_map -ffffffff818cfe40 T _bnxt_hwrm_set_async_event_bit -ffffffff818d0000 t mcx_match -ffffffff818d0030 t mcx_attach -ffffffff818d0c40 T mcx_rx_fill -ffffffff818d0e90 T mcx_load_mbuf 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drm_kms_helper_hotplug_event -ffffffff8197de10 T drm_kms_helper_connector_hotplug_event -ffffffff8197de50 T drm_kms_helper_is_poll_worker -ffffffff8197de80 T drm_kms_helper_poll_disable -ffffffff8197df50 T drm_kms_helper_poll_init -ffffffff8197dfb0 t output_poll_execute -ffffffff8197e200 T drm_kms_helper_poll_fini -ffffffff8197e250 T drm_connector_helper_hpd_irq_event -ffffffff8197e310 t check_connector_changed -ffffffff8197e4e0 T drm_helper_hpd_irq_event -ffffffff8197e630 T drm_crtc_helper_mode_valid_fixed -ffffffff8197e680 T drm_connector_helper_get_modes_from_ddc -ffffffff8197e710 T drm_connector_helper_get_modes_fixed -ffffffff8197e880 T drm_connector_helper_get_modes -ffffffff8197e8f0 T drm_connector_helper_tv_get_modes -ffffffff8197eb30 t __delayed_work_tick -ffffffff8197f000 T drm_property_create -ffffffff8197f1f0 T drm_property_create_enum -ffffffff8197f2a0 T drm_property_add_enum -ffffffff8197f4a0 T drm_property_destroy -ffffffff8197f550 T drm_property_create_bitmask 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drm_rect_calc_vscale -ffffffff81981490 T drm_rect_debug_print -ffffffff819815b0 T drm_rect_rotate -ffffffff81981670 T drm_rect_rotate_inv -ffffffff81982000 T drm_self_refresh_helper_update_avg_times -ffffffff81982150 T drm_self_refresh_helper_alter_state -ffffffff819822e0 T drm_self_refresh_helper_init -ffffffff81982470 t drm_self_refresh_helper_entry_work -ffffffff819825d0 T drm_self_refresh_helper_cleanup -ffffffff81982650 t __delayed_work_tick -ffffffff81983000 T drm_suballoc_manager_init -ffffffff81983180 T drm_suballoc_manager_fini -ffffffff81983290 t drm_suballoc_try_free -ffffffff81983380 T drm_suballoc_new -ffffffff81983da0 t drm_suballoc_event -ffffffff81983ee0 T drm_suballoc_free -ffffffff81985000 T drm_syncobj_find -ffffffff81985070 T drm_syncobj_add_point -ffffffff81985180 t syncobj_wait_syncobj_func -ffffffff81985230 t syncobj_eventfd_entry_func -ffffffff81985310 T drm_syncobj_replace_fence -ffffffff819853c0 T drm_syncobj_find_fence -ffffffff81985710 t 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drm_syncobj_query_ioctl -ffffffff81987450 t drm_syncobj_array_wait_timeout -ffffffff819878b0 t syncobj_wait_fence_func -ffffffff819878d0 t syncobj_eventfd_entry_fence_func -ffffffff81988000 T drm_vblank_count -ffffffff81988090 T drm_crtc_accurate_vblank_count -ffffffff819881a0 t drm_update_vblank_count -ffffffff819885e0 T drm_vblank_disable_and_save -ffffffff81988730 T drm_vblank_init -ffffffff819888b0 t vblank_disable_fn -ffffffff81988930 t drm_vblank_init_release -ffffffff819889c0 T drm_dev_has_vblank -ffffffff819889f0 T drm_crtc_vblank_waitqueue -ffffffff81988a40 T drm_calc_timestamping_constants -ffffffff81988c60 T drm_crtc_vblank_helper_get_vblank_timestamp_internal -ffffffff819891b0 T drm_crtc_vblank_helper_get_vblank_timestamp -ffffffff819891d0 T drm_crtc_vblank_count -ffffffff81989260 T drm_crtc_vblank_count_and_time -ffffffff81989320 t drm_vblank_count_and_time -ffffffff819893d0 T drm_crtc_next_vblank_start -ffffffff81989520 T drm_crtc_arm_vblank_event -ffffffff81989600 T drm_crtc_send_vblank_event -ffffffff819897b0 t send_vblank_event -ffffffff81989860 T drm_vblank_get -ffffffff81989960 t drm_vblank_enable -ffffffff81989b60 T drm_crtc_vblank_get -ffffffff81989c60 T drm_vblank_put -ffffffff81989d90 T drm_crtc_vblank_put -ffffffff81989db0 T drm_wait_one_vblank -ffffffff8198a2a0 T drm_crtc_wait_one_vblank -ffffffff8198a2c0 T drm_crtc_vblank_off -ffffffff8198a6b0 T drm_crtc_vblank_reset -ffffffff8198a7e0 T drm_crtc_set_max_vblank_count -ffffffff8198a8c0 T drm_crtc_vblank_on -ffffffff8198aa10 t drm_reset_vblank_timestamp -ffffffff8198abf0 T drm_crtc_vblank_restore -ffffffff8198afd0 T drm_legacy_modeset_ctl_ioctl -ffffffff8198b1f0 T drm_wait_vblank_ioctl -ffffffff8198b740 t drm_wait_vblank_reply -ffffffff8198b850 t drm_queue_vblank_event -ffffffff8198bb90 T drm_handle_vblank -ffffffff8198be80 t drm_handle_vblank_events -ffffffff8198c110 T drm_crtc_handle_vblank -ffffffff8198c130 T drm_crtc_get_sequence_ioctl -ffffffff8198c300 T drm_crtc_queue_sequence_ioctl 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hdmi_spd_infoframe_init -ffffffff8198f3e0 T hdmi_spd_infoframe_check -ffffffff8198f430 T hdmi_spd_infoframe_pack_only -ffffffff8198f570 T hdmi_spd_infoframe_pack -ffffffff8198f6d0 T hdmi_audio_infoframe_init -ffffffff8198f720 T hdmi_audio_infoframe_check -ffffffff8198f770 T hdmi_audio_infoframe_pack_only -ffffffff8198f8d0 T hdmi_audio_infoframe_pack -ffffffff8198f920 T hdmi_audio_infoframe_pack_for_dp -ffffffff8198fa10 T hdmi_vendor_infoframe_init -ffffffff8198fa70 T hdmi_vendor_infoframe_check -ffffffff8198fb10 T hdmi_vendor_infoframe_pack_only -ffffffff8198fcd0 T hdmi_vendor_infoframe_pack -ffffffff8198fd70 T hdmi_drm_infoframe_init -ffffffff8198fdd0 T hdmi_drm_infoframe_check -ffffffff8198fe20 T hdmi_drm_infoframe_pack_only -ffffffff81990010 T hdmi_drm_infoframe_pack -ffffffff81990060 T hdmi_infoframe_check -ffffffff819901b0 T hdmi_infoframe_pack_only -ffffffff819903d0 T hdmi_infoframe_pack -ffffffff81990540 T hdmi_infoframe_log -ffffffff81991430 T hdmi_drm_infoframe_unpack_only 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psp_v3_1_bootloader_load_sysdrv -ffffffff81ee73f0 t psp_v3_1_bootloader_load_sos -ffffffff81ee7770 t psp_v3_1_ring_create -ffffffff81ee8290 t psp_v3_1_ring_stop -ffffffff81ee84b0 t psp_v3_1_ring_destroy -ffffffff81ee8530 t psp_v3_1_smu_reload_quirk -ffffffff81ee8580 t psp_v3_1_mode1_reset -ffffffff81ee8680 t psp_v3_1_ring_get_wptr -ffffffff81ee86d0 t psp_v3_1_ring_set_wptr -ffffffff81ee9000 t sdma_v2_4_early_init -ffffffff81ee90f0 t sdma_v2_4_sw_init -ffffffff81ee94a0 t sdma_v2_4_sw_fini -ffffffff81ee9550 t sdma_v2_4_hw_init -ffffffff81ee98f0 t sdma_v2_4_hw_fini -ffffffff81ee9930 t sdma_v2_4_suspend -ffffffff81ee9970 t sdma_v2_4_resume -ffffffff81ee9980 t sdma_v2_4_is_idle -ffffffff81ee99c0 t sdma_v2_4_wait_for_idle -ffffffff81ee9a60 t sdma_v2_4_soft_reset -ffffffff81ee9ba0 t sdma_v2_4_set_clockgating_state -ffffffff81ee9bd0 t sdma_v2_4_set_powergating_state -ffffffff81ee9c00 t sdma_v2_4_ring_get_rptr -ffffffff81ee9c40 t sdma_v2_4_ring_get_wptr -ffffffff81ee9ca0 t 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mcx_set_flow_table_entry_proto +ffffffff818dd000 t mcx_ready_sq +ffffffff818dd390 t mcx_ready_rq +ffffffff818dd720 t mcx_calibrate_first +ffffffff818dd810 t mcx_create_rq +ffffffff818ddd20 t mcx_destroy_sq +ffffffff818ddfd0 t mcx_destroy_cq +ffffffff818de290 t mcx_destroy_flow_table +ffffffff818de600 t mcx_kstat_attach_ppcnt +ffffffff818de730 t mcx_kstat_ppcnt_read +ffffffff818de850 t mcx_kstat_mtmp_read +ffffffff818de9e0 t mcx_kstat_queue_read +ffffffff818df9a0 t mcx_timecounter_read +ffffffff818e0000 t iavf_match +ffffffff818e0030 t iavf_attach +ffffffff818e08a0 t iavf_reset +ffffffff818e0b60 t iavf_dmamem_alloc +ffffffff818e0cc0 t iavf_arq_fill +ffffffff818e0f80 t iavf_arq_timeout +ffffffff818e0fb0 t iavf_init_admin_queue +ffffffff818e1160 t iavf_get_version +ffffffff818e1360 t iavf_get_vf_resources +ffffffff818e1530 t iavf_config_irq_map +ffffffff818e1710 t iavf_intr +ffffffff818e1d90 t iavf_ioctl +ffffffff818e22f0 t iavf_start +ffffffff818e2650 t iavf_watchdog +ffffffff818e2680 t iavf_media_change +ffffffff818e26b0 t iavf_media_status +ffffffff818e2740 t iavf_dmamem_free +ffffffff818e27b0 t iavf_arq_unfill +ffffffff818e28b0 t iavf_down +ffffffff818e2c40 t iavf_up +ffffffff818e3610 t iavf_queue_select +ffffffff818e3800 t iavf_txr_free +ffffffff818e3900 t iavf_rxr_free +ffffffff818e3a10 t iavf_rxfill +ffffffff818e3d20 t iavf_rxrefill +ffffffff818e3d40 t iavf_process_arq +ffffffff818e41c0 t iavf_add_del_addr +ffffffff818e5000 T rge_match +ffffffff818e5030 T rge_attach +ffffffff818e54c0 T rge_activate +ffffffff818e5600 T rge_intr +ffffffff818e58f0 T rge_config_imtype +ffffffff818e5960 T rge_chipinit +ffffffff818e5a70 T rge_get_macaddr +ffffffff818e5c40 T rge_allocmem +ffffffff818e6040 T rge_ioctl +ffffffff818e61f0 T rge_start +ffffffff818e63d0 T rge_watchdog +ffffffff818e6410 T rge_wol +ffffffff818e6640 T rge_tick +ffffffff818e66c0 T rge_txstart +ffffffff818e66f0 T rge_ifmedia_upd +ffffffff818e6cc0 T rge_ifmedia_sts +ffffffff818e6db0 T rge_add_media_types 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igc_is_valid_ether_addr +ffffffff818f1c30 T igc_allocate_msix +ffffffff818f1e70 T igc_setup_interface +ffffffff818f20b0 T igc_reset +ffffffff818f21f0 T igc_update_link_status +ffffffff818f2300 T igc_get_hw_control +ffffffff818f2360 T igc_release_hw_control +ffffffff818f23c0 T igc_free_pci_resources +ffffffff818f24a0 T igc_stop +ffffffff818f27a0 T igc_free_transmit_structures +ffffffff818f2820 T igc_free_receive_structures +ffffffff818f28d0 T igc_setup_msix +ffffffff818f2960 T igc_dma_malloc +ffffffff818f2ac0 T igc_rxrefill +ffffffff818f2b90 T igc_dma_free +ffffffff818f2c40 T igc_init_dmac +ffffffff818f2ee0 T igc_intr_queue +ffffffff818f2ff0 T igc_intr_link +ffffffff818f3170 T igc_ioctl +ffffffff818f3450 T igc_start +ffffffff818f3880 T igc_watchdog +ffffffff818f38b0 T igc_media_change +ffffffff818f39c0 T igc_media_status +ffffffff818f3b60 T igc_init +ffffffff818f4050 T igc_setup_transmit_structures +ffffffff818f4110 T igc_initialize_transmit_unit +ffffffff818f4330 T igc_setup_receive_structures +ffffffff818f4490 T igc_initialize_receive_unit +ffffffff818f4850 T igc_iff +ffffffff818f49a0 T igc_configure_queues +ffffffff818f4bb0 T igc_rxfill +ffffffff818f4cf0 T igc_enable_intr +ffffffff818f4dc0 T igc_tx_ctx_setup +ffffffff818f4ed0 T igc_txeof +ffffffff818f5090 T igc_disable_intr +ffffffff818f5130 T igc_rxrinfo +ffffffff818f5260 T igc_get_buf +ffffffff818f53a0 T igc_rxeof +ffffffff818f5740 T igc_rx_checksum +ffffffff818f5790 T igc_set_queues +ffffffff818f5870 T igc_enable_queue +ffffffff818f58a0 T igc_allocate_transmit_buffers +ffffffff818f59c0 T igc_setup_transmit_ring +ffffffff818f5b00 T igc_free_transmit_buffers +ffffffff818f5c20 T igc_allocate_receive_buffers +ffffffff818f5d50 T igc_setup_receive_ring +ffffffff818f5e10 T igc_initialize_rss_mapping +ffffffff818f6030 T igc_free_receive_buffers +ffffffff818f7000 T igc_init_mac_params +ffffffff818f7040 T igc_init_nvm_params +ffffffff818f7080 T igc_init_phy_params +ffffffff818f70c0 T igc_set_mac_type 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ngbe_dma_free +ffffffff81904f50 T ngbe_rxrefill +ffffffff81905000 T ngbe_free_receive_buffers +ffffffff81905110 T ngbe_free_transmit_buffers +ffffffff81905230 T ngbe_allocate_receive_buffers +ffffffff81905360 T ngbe_allocate_transmit_buffers +ffffffff81905480 T ngbe_setup_receive_ring +ffffffff81905570 T ngbe_setup_transmit_ring +ffffffff819056b0 T ngbe_addr_list_itr +ffffffff819056f0 T ngbe_setup_psrtype +ffffffff81905720 T ngbe_initialize_rss_mapping +ffffffff81905940 T ngbe_handle_phy_event +ffffffff819059e0 T ngbe_enable_queue +ffffffff81905a40 T ngbe_rxeof +ffffffff81905db0 T ngbe_txeof +ffffffff81905f50 T ngbe_init_eeprom_params +ffffffff81905fd0 T ngbe_init_hw +ffffffff81906040 T ngbe_init_ops +ffffffff81906250 T ngbe_phy_reset +ffffffff819063d0 T ngbe_phy_read_reg +ffffffff81906470 T ngbe_phy_write_reg +ffffffff81906510 T ngbe_phy_setup_link +ffffffff81906770 T ngbe_phy_led_ctrl +ffffffff81906860 T ngbe_phy_check_overtemp +ffffffff819068b0 T ngbe_phy_identify +ffffffff819068f0 T ngbe_phy_init +ffffffff81906b10 T ngbe_phy_check_event +ffffffff81906b70 T ngbe_phy_get_advertised_pause +ffffffff81906bd0 T ngbe_phy_get_lp_advertised_pause +ffffffff81906c80 T ngbe_phy_set_pause_advertisement +ffffffff81906d00 T ngbe_phy_setup +ffffffff81906e90 T ngbe_clear_hw_cntrs +ffffffff819070d0 T ngbe_get_mac_addr +ffffffff81907180 T ngbe_stop_adapter +ffffffff819073c0 T ngbe_get_bus_info +ffffffff81907470 T ngbe_set_lan_id_multi_port_pcie +ffffffff819074d0 T ngbe_acquire_swfw_sync +ffffffff81907730 T ngbe_release_swfw_sync +ffffffff81907870 T ngbe_reset_hw +ffffffff81907ab0 T ngbe_get_media_type +ffffffff81907ae0 T ngbe_disable_sec_rx_path +ffffffff81907ba0 T ngbe_enable_sec_rx_path +ffffffff81907c10 T ngbe_enable_rx_dma +ffffffff81907c60 T ngbe_start_hw +ffffffff81907d20 T ngbe_set_rar +ffffffff81907e70 T ngbe_init_rx_addrs +ffffffff81908030 T ngbe_update_mc_addr_list +ffffffff819081e0 T ngbe_enable_rx +ffffffff81908320 T ngbe_disable_rx +ffffffff81908440 T ngbe_clear_vfta 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ngbe_host_interface_command +ffffffff81909de0 T ngbe_tx_ctx_setup +ffffffff81909e70 T ngbe_read_pci_cfg_word +ffffffff81909ed0 T ngbe_set_pci_config_data +ffffffff81909f60 T ngbe_get_copper_link_capabilities +ffffffff81909fb0 T ngbe_get_eeprom_semaphore +ffffffff8190a110 T ngbe_release_eeprom_semaphore +ffffffff8190a1c0 T ngbe_gphy_dis_eee +ffffffff8190a2e0 T ngbe_gphy_efuse_calibration +ffffffff8190a690 T ngbe_hpbthresh +ffffffff8190a720 T ngbe_lpbthresh +ffffffff8190a760 T ngbe_mta_vector +ffffffff8190a7b0 T ngbe_setup_copper_link +ffffffff8190a800 T ngbe_reset_misc +ffffffff8190ab60 T ngbe_set_mta +ffffffff8190abd0 T ngbe_rx_checksum +ffffffff8190b000 T com_pci_match +ffffffff8190b030 T com_pci_attach +ffffffff8190b310 T com_pci_detach +ffffffff8190b3b0 T com_pci_activate +ffffffff8190b4a0 T com_pci_intr_designware +ffffffff8190c000 T agpdev_print +ffffffff8190c050 T agpbus_probe +ffffffff8190c0c0 T agpvga_match +ffffffff8190c130 T agp_attach_bus +ffffffff8190c1b0 T agp_probe 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dma_resv_add_fence +ffffffff8190e4a0 T dma_resv_replace_fences +ffffffff8190e550 T dma_resv_iter_first_unlocked +ffffffff8190e5e0 t dma_resv_iter_walk_unlocked +ffffffff8190e6d0 T dma_resv_iter_next_unlocked +ffffffff8190e760 T dma_resv_iter_first +ffffffff8190e7f0 T dma_resv_iter_next +ffffffff8190e870 T dma_resv_copy_fences +ffffffff8190ec00 T dma_resv_get_fences +ffffffff8190eff0 T dma_resv_get_singleton +ffffffff8190f0f0 T dma_resv_wait_timeout +ffffffff8190f360 T dma_resv_test_signaled +ffffffff8190f4b0 T dma_resv_describe +ffffffff81910000 T drm_legacy_agp_info +ffffffff819100b0 T drm_legacy_agp_acquire +ffffffff81910120 T drm_legacy_agp_release +ffffffff81910180 T drm_legacy_agp_enable +ffffffff819101f0 T drm_legacy_agp_takedown +ffffffff81910260 T drm_legacy_agp_init +ffffffff81911000 T devm_aperture_acquire_from_firmware +ffffffff81911050 T drm_aperture_remove_conflicting_framebuffers +ffffffff81911080 T drm_aperture_remove_conflicting_pci_framebuffers +ffffffff81912000 T __drm_crtc_commit_free +ffffffff81912020 T drm_crtc_commit_wait +ffffffff819121c0 T drm_atomic_state_default_release +ffffffff81912220 T drm_atomic_state_init +ffffffff81912340 T drm_atomic_state_alloc +ffffffff819123e0 T drm_atomic_state_default_clear +ffffffff819126e0 T drm_atomic_state_clear +ffffffff81912710 T __drm_atomic_state_free +ffffffff819127e0 T drm_atomic_get_crtc_state +ffffffff81912930 T drm_atomic_get_plane_state +ffffffff81912b20 T drm_atomic_private_obj_init +ffffffff81912c10 T drm_atomic_private_obj_fini +ffffffff81912ca0 T drm_atomic_get_private_obj_state +ffffffff81912e50 T drm_atomic_get_old_private_obj_state +ffffffff81912eb0 T drm_atomic_get_new_private_obj_state +ffffffff81912f10 T drm_atomic_get_old_connector_for_encoder +ffffffff81912f80 T drm_atomic_get_new_connector_for_encoder +ffffffff81912ff0 T drm_atomic_get_old_crtc_for_encoder +ffffffff81913090 T drm_atomic_get_new_crtc_for_encoder +ffffffff81913130 T drm_atomic_get_connector_state +ffffffff81913340 T drm_atomic_get_bridge_state +ffffffff81913350 T drm_atomic_get_old_bridge_state +ffffffff819133b0 T drm_atomic_get_new_bridge_state +ffffffff81913410 T drm_atomic_add_encoder_bridges +ffffffff819134d0 T drm_atomic_add_affected_connectors +ffffffff819135f0 T drm_atomic_add_affected_planes +ffffffff81913710 T drm_atomic_check_only +ffffffff819141d0 T drm_atomic_commit +ffffffff819142a0 T drm_atomic_print_new_state +ffffffff81914490 T drm_atomic_nonblocking_commit +ffffffff81914530 T __drm_atomic_helper_disable_plane +ffffffff819145b0 T __drm_atomic_helper_set_config +ffffffff81914920 t drm_atomic_plane_print_state +ffffffff81914b40 t drm_atomic_crtc_print_state +ffffffff81914da0 t drm_atomic_connector_print_state +ffffffff81914ed0 T drm_state_dump +ffffffff81916000 T drm_atomic_helper_check_modeset +ffffffff81916cd0 t handle_conflicting_encoders +ffffffff81916fd0 t mode_fixup +ffffffff81917310 T drm_atomic_helper_check_wb_encoder_state +ffffffff81917370 T drm_atomic_helper_check_plane_state +ffffffff81917720 T drm_atomic_helper_check_crtc_primary_plane +ffffffff819177d0 T drm_atomic_helper_check_planes +ffffffff81917a80 T drm_atomic_helper_check +ffffffff81917b30 T drm_atomic_helper_async_check +ffffffff81917e00 T drm_atomic_helper_update_legacy_modeset_state +ffffffff81918070 T drm_atomic_helper_calc_timestamping_constants +ffffffff81918110 T drm_atomic_helper_commit_modeset_disables +ffffffff81918770 T drm_atomic_helper_commit_modeset_enables +ffffffff81918a40 T drm_atomic_helper_wait_for_fences +ffffffff81918c20 T drm_atomic_helper_wait_for_vblanks +ffffffff81918f60 T drm_atomic_helper_wait_for_flip_done +ffffffff81919120 T drm_atomic_helper_commit_tail +ffffffff81919290 T drm_atomic_helper_commit_planes +ffffffff81919600 T drm_atomic_helper_fake_vblank +ffffffff819196e0 T drm_atomic_helper_commit_hw_done +ffffffff819198b0 T drm_atomic_helper_cleanup_planes +ffffffff81919950 T drm_atomic_helper_commit_tail_rpm +ffffffff81919ac0 t try_wait_for_completion +ffffffff81919b20 T drm_atomic_helper_async_commit +ffffffff81919db0 T drm_atomic_helper_commit +ffffffff8191a030 T drm_atomic_helper_prepare_planes +ffffffff8191a2d0 T drm_atomic_helper_unprepare_planes +ffffffff8191a3c0 T drm_atomic_helper_setup_commit +ffffffff8191aaa0 t commit_work +ffffffff8191aac0 T drm_atomic_helper_swap_state +ffffffff8191b110 t commit_tail +ffffffff8191b330 t release_crtc_commit +ffffffff8191b370 t crtc_or_fake_commit +ffffffff8191b470 T drm_atomic_helper_wait_for_dependencies +ffffffff8191b670 T drm_atomic_helper_commit_cleanup_done +ffffffff8191b8d0 T drm_atomic_helper_commit_planes_on_crtc +ffffffff8191bb50 T drm_atomic_helper_disable_planes_on_crtc +ffffffff8191bcb0 T drm_atomic_helper_update_plane +ffffffff8191bde0 T drm_atomic_helper_disable_plane +ffffffff8191bea0 T drm_atomic_helper_set_config +ffffffff8191bf50 T drm_atomic_helper_disable_all +ffffffff8191c100 T drm_atomic_helper_shutdown +ffffffff8191c250 T drm_atomic_helper_duplicate_state +ffffffff8191c3a0 T drm_atomic_helper_suspend +ffffffff8191c4f0 T drm_atomic_helper_commit_duplicated_state +ffffffff8191c630 T drm_atomic_helper_resume +ffffffff8191c760 T drm_atomic_helper_page_flip +ffffffff8191c820 t page_flip_common +ffffffff8191c920 T drm_atomic_helper_page_flip_target +ffffffff8191ca40 T drm_atomic_helper_bridge_propagate_bus_fmt +ffffffff8191cab0 t set_best_encoder +ffffffff8191d000 T __drm_atomic_helper_crtc_state_reset +ffffffff8191d030 T __drm_atomic_helper_crtc_reset +ffffffff8191d090 T drm_atomic_helper_crtc_reset +ffffffff8191d130 T __drm_atomic_helper_crtc_duplicate_state +ffffffff8191d200 T drm_atomic_helper_crtc_duplicate_state +ffffffff8191d2a0 T __drm_atomic_helper_crtc_destroy_state +ffffffff8191d360 T drm_atomic_helper_crtc_destroy_state +ffffffff8191d390 T __drm_atomic_helper_plane_state_reset +ffffffff8191d460 T __drm_atomic_helper_plane_reset +ffffffff8191d4c0 T drm_atomic_helper_plane_reset +ffffffff8191d5a0 T __drm_atomic_helper_plane_destroy_state +ffffffff8191d610 T __drm_atomic_helper_plane_duplicate_state +ffffffff8191d690 T drm_atomic_helper_plane_duplicate_state +ffffffff8191d770 T drm_atomic_helper_plane_destroy_state +ffffffff8191d7f0 T __drm_atomic_helper_connector_state_reset +ffffffff8191d820 T __drm_atomic_helper_connector_reset +ffffffff8191d860 T drm_atomic_helper_connector_reset +ffffffff8191d930 T __drm_atomic_helper_connector_destroy_state +ffffffff8191d990 T drm_atomic_helper_connector_tv_margins_reset +ffffffff8191d9f0 T drm_atomic_helper_connector_tv_reset +ffffffff8191dbf0 T drm_atomic_helper_connector_tv_check +ffffffff8191dcd0 T __drm_atomic_helper_connector_duplicate_state +ffffffff8191dd60 T drm_atomic_helper_connector_duplicate_state +ffffffff8191de40 T drm_atomic_helper_connector_destroy_state +ffffffff8191deb0 T __drm_atomic_helper_private_obj_duplicate_state +ffffffff8191def0 T __drm_atomic_helper_bridge_duplicate_state +ffffffff8191df30 T drm_atomic_helper_bridge_duplicate_state +ffffffff8191dfe0 T drm_atomic_helper_bridge_destroy_state +ffffffff8191e000 T __drm_atomic_helper_bridge_reset +ffffffff8191e050 T drm_atomic_helper_bridge_reset +ffffffff8191f000 T drm_atomic_set_mode_for_crtc +ffffffff8191f220 T drm_atomic_set_mode_prop_for_crtc +ffffffff8191f4b0 T drm_atomic_set_crtc_for_plane +ffffffff8191f620 T drm_atomic_set_fb_for_plane +ffffffff8191f700 T drm_atomic_set_crtc_for_connector +ffffffff8191f860 T drm_atomic_get_property +ffffffff8191ffc0 T drm_atomic_connector_commit_dpms +ffffffff81920100 T drm_atomic_set_property +ffffffff81920c00 T drm_mode_atomic_ioctl +ffffffff819210a0 t prepare_signaling +ffffffff81921530 t complete_signaling +ffffffff81921700 t drm_atomic_replace_property_blob_from_id +ffffffff81921870 t drm_atomic_set_writeback_fb_for_connector +ffffffff819218e0 t set_out_fence_for_connector +ffffffff81922000 T drm_is_current_master +ffffffff81922060 T drm_getmagic +ffffffff81922130 T drm_authmagic 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+ffffffff8192d960 T drm_get_color_range_name +ffffffff8192d9d0 T drm_plane_create_color_properties +ffffffff8192dc30 T drm_color_lut_check +ffffffff8192e000 T drm_connector_ida_init +ffffffff8192e110 T drm_connector_ida_destroy +ffffffff8192e220 T drm_get_connector_type_name +ffffffff8192e260 T drm_connector_free_work_fn +ffffffff8192e320 T drm_connector_init +ffffffff8192e3a0 t __drm_connector_init +ffffffff8192e710 T drm_connector_init_with_ddc +ffffffff8192e7a0 T drmm_connector_init +ffffffff8192e860 t drm_connector_cleanup_action +ffffffff8192e880 T drm_connector_attach_edid_property +ffffffff8192e8a0 T drm_connector_attach_encoder +ffffffff8192e920 T drm_connector_has_possible_encoder +ffffffff8192e960 T drm_connector_cleanup +ffffffff8192eca0 T drm_connector_unregister +ffffffff8192ed40 T drm_mode_put_tile_group +ffffffff8192edd0 T drm_connector_register +ffffffff8192eec0 T drm_connector_unregister_all +ffffffff8192f060 T drm_connector_list_iter_begin +ffffffff8192f0a0 T drm_connector_list_iter_next +ffffffff8192f1b0 T drm_connector_list_iter_end +ffffffff8192f280 T drm_connector_register_all +ffffffff8192f410 T drm_get_connector_status_name +ffffffff8192f460 T drm_get_connector_force_name +ffffffff8192f4a0 T drm_get_subpixel_order_name +ffffffff8192f4e0 T drm_get_dpms_name +ffffffff8192f520 T drm_display_info_set_bus_formats +ffffffff8192f5f0 T drm_get_dvi_i_select_name +ffffffff8192f650 T drm_get_dvi_i_subconnector_name +ffffffff8192f6b0 T drm_get_tv_mode_name +ffffffff8192f6f0 T drm_get_tv_mode_from_name +ffffffff8192f890 T drm_get_tv_select_name +ffffffff8192f8f0 T drm_get_tv_subconnector_name +ffffffff8192f950 T drm_get_dp_subconnector_name +ffffffff8192f9e0 T drm_get_colorspace_name +ffffffff8192fa20 T drm_connector_create_standard_properties +ffffffff8192fba0 T drm_mode_create_dvi_i_properties +ffffffff8192fc40 T drm_connector_attach_dp_subconnector_property +ffffffff8192fcb0 T drm_connector_attach_content_type_property +ffffffff8192fd50 T drm_mode_create_content_type_property +ffffffff8192fdd0 T drm_connector_attach_tv_margin_properties +ffffffff8192fe40 T drm_mode_create_tv_margin_properties +ffffffff8192ff60 T drm_mode_create_tv_properties_legacy +ffffffff819301b0 T drm_mode_create_tv_properties +ffffffff81930390 T drm_mode_create_scaling_mode_property +ffffffff81930400 T drm_connector_attach_vrr_capable_property +ffffffff81930490 T drm_connector_attach_scaling_mode_property +ffffffff81930660 T drm_mode_create_aspect_ratio_property +ffffffff819306e0 T drm_mode_create_hdmi_colorspace_property +ffffffff81930700 t drm_mode_create_colorspace_property +ffffffff81930830 T drm_mode_create_dp_colorspace_property +ffffffff81930860 T drm_mode_create_suggested_offset_properties +ffffffff81930930 T drm_connector_set_path_property +ffffffff81930990 T drm_connector_set_tile_property +ffffffff81930ae0 T drm_connector_set_link_status_property +ffffffff81930b30 T drm_connector_attach_max_bpc_property +ffffffff81930bf0 T drm_connector_attach_hdr_output_metadata_property +ffffffff81930c40 T drm_connector_attach_colorspace_property +ffffffff81930c90 T drm_connector_atomic_hdr_metadata_equal +ffffffff81930d00 T drm_connector_set_vrr_capable_property +ffffffff81930d50 T drm_connector_set_panel_orientation +ffffffff81930e20 T drm_connector_set_panel_orientation_with_quirk +ffffffff81930f00 T drm_connector_set_orientation_from_panel +ffffffff81930ff0 T drm_connector_create_privacy_screen_properties +ffffffff81931090 T drm_connector_attach_privacy_screen_properties +ffffffff81931100 T drm_connector_attach_privacy_screen_provider +ffffffff81931210 t drm_connector_privacy_screen_notifier +ffffffff819312b0 T drm_connector_update_privacy_screen +ffffffff81931320 T drm_connector_set_obj_prop +ffffffff81931400 T drm_connector_property_set_ioctl +ffffffff81931460 T drm_mode_getconnector +ffffffff81931960 T drm_connector_find_by_fwnode +ffffffff81931a10 T drm_connector_oob_hotplug_event +ffffffff81931b00 T drm_mode_get_tile_group +ffffffff81931bd0 T drm_mode_create_tile_group +ffffffff81931ca0 t drm_connector_free +ffffffff81931ce0 t kasprintf +ffffffff81932000 T drm_crtc_from_index +ffffffff81932060 T drm_crtc_force_disable +ffffffff819321a0 T drm_mode_set_config_internal +ffffffff81932220 T drm_crtc_register_all +ffffffff819322a0 T drm_crtc_unregister_all +ffffffff81932310 T drm_crtc_create_fence +ffffffff819323a0 T drm_crtc_init_with_planes +ffffffff81932470 t __drm_crtc_init_with_planes +ffffffff81932870 T drmm_crtc_init_with_planes +ffffffff81932970 T __drmm_crtc_alloc_with_planes +ffffffff81932ae0 T drm_crtc_cleanup +ffffffff81932c00 T drm_mode_getcrtc +ffffffff81932da0 t __drm_mode_set_config_internal +ffffffff81932f50 T drm_crtc_check_viewport +ffffffff81933000 T drm_mode_setcrtc +ffffffff81933740 T drm_mode_crtc_set_obj_prop +ffffffff819337c0 T drm_crtc_create_scaling_filter_property +ffffffff81933830 t drm_crtc_fence_get_driver_name +ffffffff819338b0 t drm_crtc_fence_get_timeline_name +ffffffff81933920 t kasprintf +ffffffff819339f0 t drmm_crtc_init_with_planes_cleanup +ffffffff81934000 T drm_helper_encoder_in_use +ffffffff81934180 T drm_helper_crtc_in_use +ffffffff819342b0 T drm_helper_disable_unused_functions +ffffffff81934330 t __drm_helper_disable_unused_functions +ffffffff81934450 T drm_crtc_helper_set_mode +ffffffff819348f0 T drm_crtc_helper_atomic_check +ffffffff81934940 T drm_connector_get_single_encoder +ffffffff81934a20 T drm_crtc_helper_set_config +ffffffff81935660 T drm_helper_connector_dpms +ffffffff81935930 T drm_helper_resume_force_mode +ffffffff81935c30 T drm_helper_force_disable_all +ffffffff81936000 T drm_atomic_helper_check_plane_damage +ffffffff819360a0 T drm_atomic_helper_dirtyfb +ffffffff81936350 T drm_atomic_helper_damage_iter_init +ffffffff819364a0 T drm_atomic_helper_damage_iter_next +ffffffff81936540 T drm_atomic_helper_damage_merged +ffffffff81937000 T displayid_iter_edid_begin +ffffffff81937050 T __displayid_iter_next +ffffffff81937300 T displayid_iter_end +ffffffff81937350 T displayid_version +ffffffff81937380 T displayid_primary_use +ffffffff81938000 T drm_mode_create_dumb +ffffffff819380e0 T drm_mode_create_dumb_ioctl +ffffffff819381c0 T drm_mode_mmap_dumb_ioctl +ffffffff81938230 T drm_mode_destroy_dumb +ffffffff81938280 T drm_mode_destroy_dumb_ioctl +ffffffff81939000 T drm_edid_header_is_valid +ffffffff81939080 T drm_edid_are_equal +ffffffff819390f0 T drm_edid_block_valid +ffffffff81939300 t edid_block_check +ffffffff81939430 t edid_block_status_print +ffffffff81939520 T drm_edid_is_valid +ffffffff819395a0 T drm_edid_valid +ffffffff819396d0 t drm_edid_block_count +ffffffff81939810 T drm_edid_override_show +ffffffff81939860 T drm_edid_override_set +ffffffff81939a00 T drm_edid_alloc +ffffffff81939ac0 T drm_edid_free +ffffffff81939b20 T drm_edid_override_reset +ffffffff81939be0 T drm_edid_override_connector_update +ffffffff81939cb0 t drm_edid_override_get +ffffffff81939da0 T drm_edid_connector_update +ffffffff8193a1f0 T drm_edid_connector_add_modes +ffffffff8193a310 T drm_do_get_edid +ffffffff8193a330 t _drm_do_get_edid +ffffffff8193a750 T drm_edid_raw +ffffffff8193a7e0 T drm_edid_dup +ffffffff8193a8b0 T drm_probe_ddc +ffffffff8193a9b0 t drm_do_probe_ddc_edid +ffffffff8193ab00 T drm_get_edid +ffffffff8193ac70 T drm_connector_update_edid_property +ffffffff8193acd0 T drm_edid_read_custom +ffffffff8193adc0 T drm_edid_read_ddc +ffffffff8193aef0 T drm_edid_read +ffffffff8193af70 T drm_edid_get_panel_id +ffffffff8193b0f0 t edid_block_read +ffffffff8193b360 T drm_get_edid_switcheroo +ffffffff8193b3b0 T drm_edid_read_switcheroo +ffffffff8193b400 T drm_edid_duplicate +ffffffff8193b480 T drm_mode_find_dmt +ffffffff8193b5a0 T drm_mode_fixup_1366x768 +ffffffff8193b5f0 T drm_find_edid_extension +ffffffff8193b690 T drm_match_cea_mode +ffffffff8193b910 T drm_display_mode_from_cea_vic +ffffffff8193b980 T drm_edid_get_monitor_name +ffffffff8193ba20 t get_monitor_name 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drm_fb_xrgb8888_to_argb1555_line +ffffffff8194de10 T drm_fb_xrgb8888_to_rgba5551 +ffffffff8194de70 t drm_fb_xrgb8888_to_rgba5551_line +ffffffff8194df80 T drm_fb_xrgb8888_to_rgb888 +ffffffff8194dfe0 t drm_fb_xrgb8888_to_rgb888_line +ffffffff8194e070 T drm_fb_xrgb8888_to_argb8888 +ffffffff8194e0d0 t drm_fb_xrgb8888_to_argb8888_line +ffffffff8194e1a0 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff8194e200 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff8194e280 T drm_fb_xrgb8888_to_argb2101010 +ffffffff8194e2e0 t drm_fb_xrgb8888_to_argb2101010_line +ffffffff8194e370 T drm_fb_xrgb8888_to_gray8 +ffffffff8194e3d0 t drm_fb_xrgb8888_to_gray8_line +ffffffff8194e440 T drm_fb_blit +ffffffff8194eac0 T drm_fb_xrgb8888_to_mono +ffffffff8194ee50 T drm_fb_build_fourcc_list +ffffffff8194f120 t drm_fb_xrgb8888_to_xbgr8888_line +ffffffff8194f200 t drm_fb_xrgb8888_to_abgr8888_line +ffffffff81950000 T drm_mode_legacy_fb_format +ffffffff819500f0 T drm_driver_legacy_fb_format +ffffffff819501f0 T __drm_format_info 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drm_framebuffer_cleanup +ffffffff81952830 T drm_framebuffer_remove +ffffffff81952cc0 T drm_framebuffer_plane_width +ffffffff81952d10 T drm_framebuffer_plane_height +ffffffff81952d60 T drm_framebuffer_print_info +ffffffff81954000 T drm_ref +ffffffff81954030 T drm_unref +ffffffff819540b0 T drm_fault +ffffffff81954280 T drm_flush +ffffffff819542b0 T udv_attach_drm +ffffffff819544a0 T drm_gem_init +ffffffff81954550 t drm_gem_init_release +ffffffff81954570 T drm_gem_object_init +ffffffff819546f0 T drm_gem_private_object_init +ffffffff81954810 T drm_gem_private_object_fini +ffffffff81954870 T drm_gem_handle_delete +ffffffff81954960 t drm_gem_object_release_handle +ffffffff819549f0 T drm_gem_dumb_map_offset +ffffffff81954b20 T drm_gem_object_lookup +ffffffff81954b90 T drm_gem_create_mmap_offset +ffffffff81954bc0 T drm_gem_handle_create_tail +ffffffff81954d30 t drm_gem_object_handle_put_unlocked +ffffffff81954e80 T drm_gem_handle_create +ffffffff81954ed0 T drm_gem_free_mmap_offset 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dma_fence_remove_callback +ffffffff81961790 T dma_fence_context_alloc +ffffffff819617d0 t dma_fence_default_wait_cb +ffffffff81961820 T dma_fence_wait_any_timeout +ffffffff81961b30 T dma_fence_set_deadline +ffffffff81961bd0 T dma_fence_get_stub +ffffffff81961d60 T dma_fence_allocate_private_stub +ffffffff81961e80 T dma_fence_array_create +ffffffff81961f90 t irq_dma_fence_array_work +ffffffff81962020 T dma_fence_array_first +ffffffff81962070 T dma_fence_array_next +ffffffff819620c0 t dma_fence_array_get_driver_name +ffffffff819620f0 t dma_fence_array_get_timeline_name +ffffffff81962120 t dma_fence_array_enable_signaling +ffffffff81962220 t dma_fence_array_signaled +ffffffff81962270 t dma_fence_array_release +ffffffff81962330 T dma_fence_chain_find_seqno +ffffffff81962450 T dma_fence_chain_walk +ffffffff81962680 T dma_fence_chain_init +ffffffff81962790 t dma_fence_chain_get_driver_name +ffffffff819627c0 t dma_fence_chain_get_timeline_name +ffffffff819627f0 t dma_fence_chain_enable_signaling +ffffffff819629a0 t dma_fence_chain_signaled +ffffffff81962a90 t dma_fence_chain_release +ffffffff81962bd0 T dma_fence_is_container +ffffffff81962c20 T dmabuf_read +ffffffff81962c50 T dmabuf_write +ffffffff81962c80 T dmabuf_ioctl +ffffffff81962cb0 T dmabuf_kqfilter +ffffffff81962ce0 T dmabuf_stat +ffffffff81962da0 T dmabuf_close +ffffffff81962e10 T dmabuf_seek +ffffffff81962ea0 T dma_buf_export +ffffffff81962f50 T dma_buf_get +ffffffff81962fe0 T dma_buf_put +ffffffff81963090 T dma_buf_fd +ffffffff819631a0 T get_dma_buf +ffffffff819631e0 T pcie_get_speed_cap +ffffffff81963390 T printk +ffffffff81963430 T pcie_get_width_cap +ffffffff81963520 T pcie_aspm_enabled +ffffffff819635b0 T wait_on_bit +ffffffff81963680 T wait_on_bit_timeout +ffffffff81963750 T wake_up_bit +ffffffff81963790 T clear_and_wake_up_bit +ffffffff819637e0 T bit_waitqueue +ffffffff81963810 T __var_waitqueue +ffffffff81963840 T drm_linux_init +ffffffff819639b0 T drm_linux_exit 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dma_alloc_coherent +ffffffff81964740 T dma_free_coherent +ffffffff81964870 T dma_get_sgtable +ffffffff81964940 T dma_map_resource +ffffffff81964a60 T component_add +ffffffff81964ad0 T component_add_typed +ffffffff81964b40 T component_bind_all +ffffffff81964bd0 T component_master_add_with_match +ffffffff81964c70 t dma_fence_stub_get_name +ffffffff81964ca0 t dma_fence_array_cb_func +ffffffff81964d20 t dma_fence_chain_cb +ffffffff81964de0 t dma_fence_chain_timo +ffffffff81965000 T drmm_kzalloc +ffffffff81965100 T drmm_kcalloc +ffffffff81965210 T drmm_kstrdup +ffffffff81965340 T drmm_kfree +ffffffff81965440 T drmm_add_action +ffffffff81965500 T drmm_add_action_or_reset +ffffffff819655d0 T drm_managed_release +ffffffff81965690 T drmm_add_final_kfree +ffffffff81966000 T mipi_dsi_attach +ffffffff81966050 T mipi_dsi_detach +ffffffff819660a0 T devm_mipi_dsi_attach +ffffffff81966110 T mipi_dsi_packet_format_is_short +ffffffff81966150 T mipi_dsi_packet_format_is_long +ffffffff81966190 T mipi_dsi_create_packet +ffffffff819662a0 T mipi_dsi_shutdown_peripheral +ffffffff81966350 T mipi_dsi_turn_on_peripheral +ffffffff81966400 T mipi_dsi_set_maximum_return_packet_size +ffffffff819664b0 T mipi_dsi_compression_mode +ffffffff81966560 T mipi_dsi_picture_parameter_set +ffffffff81966610 T mipi_dsi_generic_write +ffffffff819666d0 T mipi_dsi_generic_read +ffffffff81966780 T mipi_dsi_dcs_write_buffer +ffffffff81966840 T mipi_dsi_dcs_write +ffffffff81966990 T mipi_dsi_dcs_read +ffffffff81966a30 T mipi_dsi_dcs_nop +ffffffff81966ae0 T mipi_dsi_dcs_soft_reset +ffffffff81966b90 T mipi_dsi_dcs_get_power_mode +ffffffff81966c50 T mipi_dsi_dcs_get_pixel_format +ffffffff81966d10 T mipi_dsi_dcs_enter_sleep_mode +ffffffff81966dc0 T mipi_dsi_dcs_exit_sleep_mode +ffffffff81966e70 T mipi_dsi_dcs_set_display_off +ffffffff81966f20 T mipi_dsi_dcs_set_display_on +ffffffff81966fd0 T mipi_dsi_dcs_set_column_address +ffffffff81967090 T mipi_dsi_dcs_set_page_address +ffffffff81967150 T mipi_dsi_dcs_set_tear_off +ffffffff81967200 T mipi_dsi_dcs_set_tear_on +ffffffff819672b0 T mipi_dsi_dcs_set_pixel_format +ffffffff81968000 T __drm_mm_interval_first +ffffffff819680c0 T drm_mm_reserve_node +ffffffff81968340 t add_hole +ffffffff819684a0 T drm_mm_insert_node_in_range +ffffffff81968a90 T drm_mm_remove_node +ffffffff81968bc0 T drm_mm_replace_node +ffffffff81968da0 T drm_mm_scan_init_with_range +ffffffff81968e30 T drm_mm_scan_add_block +ffffffff81968fa0 T drm_mm_scan_remove_block +ffffffff81969020 T drm_mm_scan_color_evict +ffffffff81969100 T drm_mm_init +ffffffff819691b0 T drm_mm_takedown +ffffffff819691f0 T drm_mm_print +ffffffff8196a000 T drm_modeset_register_all +ffffffff8196a0a0 T drm_modeset_unregister_all +ffffffff8196a0e0 T drm_mode_getresources +ffffffff8196a390 T drm_mode_config_reset +ffffffff8196a4f0 T drmm_mode_config_init +ffffffff8196ab70 T drm_mode_config_cleanup +ffffffff8196ae90 t drm_mode_config_init_release +ffffffff8196aea0 T drm_mode_config_validate +ffffffff8196c000 T __drm_mode_object_add +ffffffff8196c100 T drm_mode_object_add +ffffffff8196c1e0 T drm_mode_object_register +ffffffff8196c230 T drm_mode_object_unregister +ffffffff8196c2d0 T drm_mode_object_lease_required +ffffffff8196c320 T __drm_mode_object_find +ffffffff8196c3d0 T drm_mode_object_find +ffffffff8196c480 T drm_mode_object_put +ffffffff8196c500 T drm_mode_object_get +ffffffff8196c560 T drm_object_attach_property +ffffffff8196c670 T drm_object_property_set_value +ffffffff8196c750 T drm_object_property_get_value +ffffffff8196c7e0 t __drm_object_property_get_value +ffffffff8196c8c0 T drm_object_property_get_default_value +ffffffff8196c990 T drm_mode_object_get_properties +ffffffff8196cad0 T drm_mode_obj_get_properties_ioctl +ffffffff8196cd20 T drm_mode_obj_find_prop_id +ffffffff8196cd80 T drm_mode_obj_set_property_ioctl +ffffffff8196e000 T drm_mode_debug_printmodeline +ffffffff8196e140 T drm_mode_vrefresh +ffffffff8196e1e0 T drm_mode_create +ffffffff8196e200 T drm_mode_destroy +ffffffff8196e240 T drm_mode_probed_add +ffffffff8196e2e0 T drm_analog_tv_mode +ffffffff8196eb80 T drm_cvt_mode +ffffffff8196f000 T drm_mode_set_name +ffffffff8196f050 T drm_gtf_mode_complex +ffffffff8196f350 T drm_gtf_mode +ffffffff8196f3a0 T drm_mode_get_hv_timing +ffffffff8196f3f0 T drm_mode_init +ffffffff8196f4c0 T drm_mode_set_crtcinfo +ffffffff8196f680 T drm_mode_copy +ffffffff8196f6e0 T drm_mode_duplicate +ffffffff8196f760 T drm_mode_match +ffffffff8196f900 T drm_mode_equal +ffffffff8196f920 T drm_mode_equal_no_clocks +ffffffff8196f940 T drm_mode_equal_no_clocks_no_stereo +ffffffff8196fa00 T drm_mode_validate_driver +ffffffff8196faf0 T drm_mode_validate_size +ffffffff8196fb40 T drm_mode_validate_ycbcr420 +ffffffff8196fbb0 T drm_mode_is_420_only +ffffffff8196fc00 T drm_get_mode_status_name +ffffffff8196fc80 T drm_mode_prune_invalid +ffffffff8196ff10 T drm_mode_sort +ffffffff8196ff40 t drm_mode_compare +ffffffff819700e0 T drm_connector_list_update +ffffffff819702b0 T drm_mode_parse_command_line_for_connector +ffffffff819702e0 T drm_mode_create_from_cmdline_mode +ffffffff819704a0 T drm_mode_convert_to_umode +ffffffff81970640 T drm_mode_convert_umode +ffffffff81970860 T drm_mode_is_420_also +ffffffff819708b0 T drm_mode_is_420 +ffffffff81971000 T drm_helper_move_panel_connectors_to_head +ffffffff819710f0 T drm_helper_mode_fill_fb_struct +ffffffff819711b0 T drm_crtc_init +ffffffff81971280 T drm_mode_config_helper_suspend +ffffffff81971310 T drm_mode_config_helper_resume +ffffffff81972000 T drm_modeset_lock_all +ffffffff81972290 T drm_modeset_acquire_init +ffffffff81972320 T drm_modeset_lock_all_ctx +ffffffff81972410 T drm_modeset_backoff +ffffffff819724e0 T drm_modeset_acquire_fini +ffffffff81972510 T drm_warn_on_modeset_not_all_locked +ffffffff81972660 T drm_modeset_unlock_all +ffffffff81972750 T drm_modeset_drop_locks +ffffffff819727e0 T drm_modeset_unlock +ffffffff819728b0 t modeset_lock +ffffffff81972bf0 T drm_modeset_lock_init +ffffffff81972c50 T drm_modeset_lock +ffffffff81972d70 T drm_modeset_lock_single_interruptible +ffffffff81972e90 t __ww_mutex_lock +ffffffff81974000 T drm_mtrr_add +ffffffff81974070 T drm_mtrr_del +ffffffff81975000 T drm_panel_init +ffffffff81975090 T drm_panel_add +ffffffff819750e0 T drm_panel_remove +ffffffff81975140 T drm_panel_prepare +ffffffff81975250 T drm_panel_unprepare +ffffffff81975360 T drm_panel_enable +ffffffff81975450 T drm_panel_disable +ffffffff81975530 T drm_panel_get_modes +ffffffff81975580 T drm_is_panel_follower +ffffffff819755d0 T drm_panel_add_follower +ffffffff81975620 T drm_panel_remove_follower +ffffffff81975640 T devm_drm_panel_add_follower +ffffffff81975690 T drm_panel_of_backlight +ffffffff81976000 T drm_get_panel_orientation_quirk +ffffffff81977000 T drm_pci_set_busid +ffffffff81977090 t kasprintf +ffffffff81978000 T drm_universal_plane_init +ffffffff819780e0 t __drm_universal_plane_init +ffffffff819785c0 T __drmm_universal_plane_alloc +ffffffff81978700 t drmm_universal_plane_alloc_release +ffffffff81978750 T __drm_universal_plane_alloc +ffffffff81978890 T drm_plane_register_all +ffffffff81978980 T drm_plane_unregister_all +ffffffff819789f0 T drm_plane_cleanup +ffffffff81978b40 T drm_plane_from_index +ffffffff81978ba0 T drm_plane_force_disable +ffffffff81978cb0 T drm_mode_plane_set_obj_prop +ffffffff81978d30 T drm_mode_getplane_res +ffffffff81978e30 T drm_mode_getplane +ffffffff81978f80 T drm_plane_check_pixel_format +ffffffff81979040 T drm_any_plane_has_format +ffffffff81979170 T drm_mode_setplane +ffffffff81979460 T drm_mode_cursor_ioctl +ffffffff819794d0 t drm_mode_cursor_common +ffffffff81979a10 T drm_mode_cursor2_ioctl +ffffffff81979a30 T drm_mode_page_flip_ioctl +ffffffff81979f90 T drm_plane_enable_fb_damage_clips +ffffffff81979fb0 T drm_plane_get_damage_clips_count +ffffffff81979ff0 T __drm_plane_get_damage_clips +ffffffff8197a030 T drm_plane_get_damage_clips +ffffffff8197a0d0 T drm_create_scaling_filter_prop +ffffffff8197a220 T drm_plane_create_scaling_filter_property +ffffffff8197a290 t kvasprintf +ffffffff8197a330 t kasprintf +ffffffff8197a400 t create_in_format_blob +ffffffff8197a5f0 t __setplane_atomic +ffffffff8197a790 t __setplane_internal +ffffffff8197a9a0 t __setplane_check +ffffffff8197b000 T drm_plane_helper_update_primary +ffffffff8197b4b0 t get_connectors_for_crtc +ffffffff8197b5c0 T drm_plane_helper_disable_primary +ffffffff8197b670 T drm_plane_helper_destroy +ffffffff8197b6a0 T drm_plane_helper_atomic_check +ffffffff8197c000 T drm_prime_remove_buf_handle +ffffffff8197c0a0 T drm_prime_init_file_private +ffffffff8197c100 T drm_prime_destroy_file_private +ffffffff8197c160 T drm_gem_dmabuf_export +ffffffff8197c1c0 T drm_gem_dmabuf_release +ffffffff8197c200 T drm_prime_fd_to_handle_ioctl +ffffffff8197c450 T drm_prime_handle_to_fd_ioctl +ffffffff8197c6d0 T drm_gem_map_attach +ffffffff8197c720 T drm_gem_map_detach +ffffffff8197c740 T drm_gem_dmabuf_vmap +ffffffff8197c760 T drm_gem_dmabuf_vunmap +ffffffff8197c780 T drm_gem_prime_mmap +ffffffff8197c7d0 T drm_prime_pages_to_sg +ffffffff8197c820 T drm_prime_get_contiguous_size +ffffffff8197c870 T drm_gem_prime_export +ffffffff8197c900 T drm_gem_prime_import_dev +ffffffff8197c960 T drm_gem_prime_import +ffffffff8197c9c0 T drm_prime_sg_to_page_array +ffffffff8197ca10 T drm_prime_sg_to_dma_addr_array +ffffffff8197ca60 T drm_prime_gem_destroy +ffffffff8197ca80 t drm_prime_add_buf_handle +ffffffff8197d000 T __drm_puts_coredump +ffffffff8197d0e0 T __drm_printfn_coredump +ffffffff8197d2b0 T __drm_puts_seq_file +ffffffff8197d2e0 T __drm_printfn_seq_file +ffffffff8197d310 T __drm_printfn_info +ffffffff8197d340 T __drm_printfn_debug +ffffffff8197d370 T __drm_printfn_err +ffffffff8197d3b0 T drm_puts +ffffffff8197d3e0 T drm_printf +ffffffff8197d460 T drm_print_bits +ffffffff8197d690 T drm_dev_printk +ffffffff8197d730 T __drm_dev_dbg +ffffffff8197d7c0 T ___drm_dbg +ffffffff8197d850 T __drm_err +ffffffff8197d8e0 T drm_print_regset32 +ffffffff8197e000 T drm_crtc_mode_valid +ffffffff8197e050 T drm_encoder_mode_valid +ffffffff8197e090 T drm_connector_mode_valid +ffffffff8197e110 T drm_kms_helper_poll_enable +ffffffff8197e250 T drm_kms_helper_poll_reschedule +ffffffff8197e2b0 T drm_helper_probe_detect +ffffffff8197e4a0 T drm_helper_probe_single_connector_modes +ffffffff8197ea20 t __drm_helper_update_and_validate +ffffffff8197edd0 T drm_kms_helper_hotplug_event +ffffffff8197ee10 T drm_kms_helper_connector_hotplug_event +ffffffff8197ee50 T drm_kms_helper_is_poll_worker +ffffffff8197ee80 T drm_kms_helper_poll_disable +ffffffff8197ef50 T drm_kms_helper_poll_init +ffffffff8197efb0 t output_poll_execute +ffffffff8197f200 T drm_kms_helper_poll_fini +ffffffff8197f250 T drm_connector_helper_hpd_irq_event +ffffffff8197f310 t check_connector_changed +ffffffff8197f4e0 T drm_helper_hpd_irq_event +ffffffff8197f630 T drm_crtc_helper_mode_valid_fixed +ffffffff8197f680 T drm_connector_helper_get_modes_from_ddc +ffffffff8197f710 T drm_connector_helper_get_modes_fixed +ffffffff8197f880 T drm_connector_helper_get_modes +ffffffff8197f8f0 T drm_connector_helper_tv_get_modes +ffffffff8197fb30 t __delayed_work_tick +ffffffff81980000 T drm_property_create +ffffffff819801f0 T drm_property_create_enum +ffffffff819802a0 T drm_property_add_enum +ffffffff819804a0 T drm_property_destroy +ffffffff81980550 T drm_property_create_bitmask +ffffffff81980680 T drm_property_create_range +ffffffff819806f0 T drm_property_create_signed_range +ffffffff81980760 T drm_property_create_object +ffffffff81980800 T drm_property_create_bool +ffffffff81980860 T drm_mode_getproperty_ioctl +ffffffff81980ab0 T drm_property_create_blob +ffffffff81980bf0 t drm_property_free_blob +ffffffff81980c70 T drm_property_blob_put +ffffffff81980cb0 T drm_property_destroy_user_blobs +ffffffff81980d30 T drm_property_blob_get +ffffffff81980d70 T drm_property_lookup_blob +ffffffff81980d90 T drm_property_replace_global_blob +ffffffff81980ee0 T drm_property_replace_blob +ffffffff81980f50 T drm_mode_getblob_ioctl +ffffffff81981010 T drm_mode_createblob_ioctl +ffffffff81981110 T drm_mode_destroyblob_ioctl +ffffffff81981210 T drm_property_change_valid_get +ffffffff81981470 T drm_property_change_valid_put +ffffffff81982000 T drm_rect_intersect +ffffffff81982080 T drm_rect_clip_scaled +ffffffff819822f0 T drm_rect_calc_hscale +ffffffff819823c0 T drm_rect_calc_vscale +ffffffff81982490 T drm_rect_debug_print +ffffffff819825b0 T drm_rect_rotate +ffffffff81982670 T drm_rect_rotate_inv +ffffffff81983000 T drm_self_refresh_helper_update_avg_times +ffffffff81983150 T drm_self_refresh_helper_alter_state +ffffffff819832e0 T drm_self_refresh_helper_init +ffffffff81983470 t drm_self_refresh_helper_entry_work +ffffffff819835d0 T drm_self_refresh_helper_cleanup +ffffffff81983650 t __delayed_work_tick +ffffffff81984000 T drm_suballoc_manager_init +ffffffff81984180 T drm_suballoc_manager_fini +ffffffff81984290 t drm_suballoc_try_free +ffffffff81984380 T drm_suballoc_new +ffffffff81984da0 t drm_suballoc_event +ffffffff81984ee0 T drm_suballoc_free +ffffffff81986000 T drm_syncobj_find +ffffffff81986070 T drm_syncobj_add_point +ffffffff81986180 t syncobj_wait_syncobj_func +ffffffff81986230 t syncobj_eventfd_entry_func +ffffffff81986310 T drm_syncobj_replace_fence +ffffffff819863c0 T drm_syncobj_find_fence +ffffffff81986710 t drm_syncobj_fence_add_wait +ffffffff819867e0 T drm_syncobj_free +ffffffff81986860 T drm_syncobj_create +ffffffff81986a30 T drm_syncobj_get_handle +ffffffff81986b40 T drm_syncobj_get_fd +ffffffff81986b90 T drm_syncobj_open +ffffffff81986bc0 T drm_syncobj_release +ffffffff81986c00 t drm_syncobj_release_handle +ffffffff81986cc0 T drm_syncobj_create_ioctl +ffffffff81986df0 T drm_syncobj_destroy_ioctl +ffffffff81986f30 T drm_syncobj_handle_to_fd_ioctl +ffffffff81987120 T drm_syncobj_fd_to_handle_ioctl +ffffffff819872d0 T drm_syncobj_transfer_ioctl +ffffffff819876b0 T drm_timeout_abs_to_jiffies +ffffffff81987780 T drm_syncobj_wait_ioctl +ffffffff81987900 t drm_syncobj_array_find +ffffffff81987b20 t drm_syncobj_array_free +ffffffff81987c10 T drm_syncobj_timeline_wait_ioctl +ffffffff81987d90 T drm_syncobj_eventfd_ioctl +ffffffff81987dc0 T drm_syncobj_reset_ioctl +ffffffff81987ea0 T drm_syncobj_signal_ioctl +ffffffff81988000 T drm_syncobj_timeline_signal_ioctl +ffffffff81988240 T drm_syncobj_query_ioctl +ffffffff81988450 t drm_syncobj_array_wait_timeout +ffffffff819888b0 t syncobj_wait_fence_func +ffffffff819888d0 t syncobj_eventfd_entry_fence_func +ffffffff81989000 T drm_vblank_count +ffffffff81989090 T drm_crtc_accurate_vblank_count +ffffffff819891a0 t drm_update_vblank_count +ffffffff819895e0 T drm_vblank_disable_and_save +ffffffff81989730 T drm_vblank_init +ffffffff819898b0 t vblank_disable_fn +ffffffff81989930 t drm_vblank_init_release +ffffffff819899c0 T drm_dev_has_vblank +ffffffff819899f0 T drm_crtc_vblank_waitqueue +ffffffff81989a40 T drm_calc_timestamping_constants +ffffffff81989c60 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff8198a1b0 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff8198a1d0 T drm_crtc_vblank_count +ffffffff8198a260 T drm_crtc_vblank_count_and_time +ffffffff8198a320 t drm_vblank_count_and_time +ffffffff8198a3d0 T drm_crtc_next_vblank_start +ffffffff8198a520 T drm_crtc_arm_vblank_event +ffffffff8198a600 T drm_crtc_send_vblank_event +ffffffff8198a7b0 t send_vblank_event +ffffffff8198a860 T drm_vblank_get +ffffffff8198a960 t drm_vblank_enable +ffffffff8198ab60 T drm_crtc_vblank_get +ffffffff8198ac60 T drm_vblank_put +ffffffff8198ad90 T drm_crtc_vblank_put +ffffffff8198adb0 T drm_wait_one_vblank +ffffffff8198b2a0 T drm_crtc_wait_one_vblank +ffffffff8198b2c0 T drm_crtc_vblank_off +ffffffff8198b6b0 T drm_crtc_vblank_reset +ffffffff8198b7e0 T drm_crtc_set_max_vblank_count +ffffffff8198b8c0 T drm_crtc_vblank_on +ffffffff8198ba10 t drm_reset_vblank_timestamp +ffffffff8198bbf0 T drm_crtc_vblank_restore +ffffffff8198bfd0 T drm_legacy_modeset_ctl_ioctl +ffffffff8198c1f0 T drm_wait_vblank_ioctl +ffffffff8198c740 t drm_wait_vblank_reply +ffffffff8198c850 t drm_queue_vblank_event +ffffffff8198cb90 T drm_handle_vblank +ffffffff8198ce80 t drm_handle_vblank_events +ffffffff8198d110 T drm_crtc_handle_vblank +ffffffff8198d130 T drm_crtc_get_sequence_ioctl +ffffffff8198d300 T drm_crtc_queue_sequence_ioctl +ffffffff8198d5c0 t __get_vblank_counter +ffffffff8198e000 T drm_handle_vblank_works +ffffffff8198e1a0 T drm_vblank_cancel_pending_works +ffffffff8198e2e0 T drm_vblank_work_schedule +ffffffff8198e550 T drm_vblank_work_cancel_sync +ffffffff8198e6a0 T drm_vblank_work_flush +ffffffff8198e7d0 T drm_vblank_work_init +ffffffff8198e840 T drm_vblank_worker_init +ffffffff8198f000 T drm_vma_offset_manager_init +ffffffff8198f040 T drm_vma_offset_manager_destroy +ffffffff8198f060 T drm_vma_offset_lookup_locked +ffffffff8198f0f0 T drm_vma_offset_add +ffffffff8198f180 T drm_vma_offset_remove +ffffffff8198f1d0 T drm_vma_node_allow +ffffffff8198f1f0 t vma_node_allow +ffffffff8198f310 T drm_vma_node_allow_once +ffffffff8198f330 T drm_vma_node_revoke +ffffffff8198f3b0 T drm_vma_node_is_allowed +ffffffff81990000 T hdmi_avi_infoframe_init +ffffffff81990070 T hdmi_avi_infoframe_check +ffffffff819900c0 T hdmi_avi_infoframe_pack_only +ffffffff819902c0 T hdmi_avi_infoframe_pack +ffffffff81990320 T hdmi_spd_infoframe_init +ffffffff819903e0 T hdmi_spd_infoframe_check +ffffffff81990430 T hdmi_spd_infoframe_pack_only +ffffffff81990570 T hdmi_spd_infoframe_pack +ffffffff819906d0 T hdmi_audio_infoframe_init +ffffffff81990720 T hdmi_audio_infoframe_check +ffffffff81990770 T hdmi_audio_infoframe_pack_only +ffffffff819908d0 T hdmi_audio_infoframe_pack +ffffffff81990920 T hdmi_audio_infoframe_pack_for_dp +ffffffff81990a10 T hdmi_vendor_infoframe_init +ffffffff81990a70 T hdmi_vendor_infoframe_check +ffffffff81990b10 T hdmi_vendor_infoframe_pack_only +ffffffff81990cd0 T hdmi_vendor_infoframe_pack +ffffffff81990d70 T hdmi_drm_infoframe_init +ffffffff81990dd0 T hdmi_drm_infoframe_check +ffffffff81990e20 T hdmi_drm_infoframe_pack_only +ffffffff81991010 T hdmi_drm_infoframe_pack +ffffffff81991060 T hdmi_infoframe_check +ffffffff819911b0 T hdmi_infoframe_pack_only +ffffffff819913d0 T hdmi_infoframe_pack +ffffffff81991540 T hdmi_infoframe_log +ffffffff81992430 T hdmi_drm_infoframe_unpack_only +ffffffff81992510 T hdmi_infoframe_unpack +ffffffff81993000 T list_sort +ffffffff81994000 T radix_tree_lookup +ffffffff819940b0 T radix_tree_iter_find +ffffffff81994180 T radix_tree_delete +ffffffff81994310 T radix_tree_iter_delete +ffffffff81994330 T radix_tree_insert +ffffffff81995000 T sort +ffffffff81995040 t qsort +ffffffff81997000 T drm_dp_dual_mode_read +ffffffff81997110 T drm_dp_dual_mode_write +ffffffff819971f0 T drm_dp_dual_mode_detect +ffffffff81997490 T drm_dp_dual_mode_max_tmds_clock +ffffffff819975b0 T drm_dp_dual_mode_get_tmds_output +ffffffff819976d0 T drm_dp_dual_mode_set_tmds_output +ffffffff81997950 T drm_dp_get_dual_mode_type_name +ffffffff819979c0 T drm_lspcon_get_mode +ffffffff81997be0 T drm_lspcon_set_mode +ffffffff81998000 T drm_dp_channel_eq_ok +ffffffff81998080 T drm_dp_clock_recovery_ok +ffffffff819980f0 T drm_dp_get_adjust_request_voltage +ffffffff81998130 T drm_dp_get_adjust_request_pre_emphasis +ffffffff81998180 T drm_dp_get_adjust_tx_ffe_preset +ffffffff819981c0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff81998240 T drm_dp_128b132b_lane_symbol_locked +ffffffff819982b0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff819982e0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff81998310 T drm_dp_128b132b_link_training_failed +ffffffff81998340 T drm_dp_read_clock_recovery_delay +ffffffff81998450 T drm_dp_read_channel_eq_delay +ffffffff81998550 T drm_dp_128b132b_read_aux_rd_interval +ffffffff81998600 T drm_dp_link_train_clock_recovery_delay +ffffffff81998690 t __8b10b_clock_recovery_delay_us +ffffffff81998710 T drm_dp_link_train_channel_eq_delay +ffffffff81998780 T drm_dp_phy_name +ffffffff819987c0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff819987e0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff81998850 T drm_dp_link_rate_to_bw_code +ffffffff819988c0 T drm_dp_bw_code_to_link_rate +ffffffff81998920 T drm_dp_dpcd_probe +ffffffff81998a60 t drm_dp_dpcd_access +ffffffff81998b90 T drm_dp_dpcd_read +ffffffff81998cc0 T drm_dp_dpcd_write +ffffffff81998dd0 T drm_dp_dpcd_read_link_status +ffffffff81998df0 T drm_dp_dpcd_read_phy_link_status +ffffffff81998ef0 T drm_dp_downstream_is_type +ffffffff81998f40 T drm_dp_downstream_is_tmds +ffffffff81998fb0 T drm_dp_send_real_edid_checksum +ffffffff81999200 T drm_dp_read_dpcd_caps +ffffffff81999390 T drm_dp_read_downstream_info +ffffffff81999490 T drm_dp_downstream_max_dotclock +ffffffff819994e0 T drm_dp_downstream_max_tmds_clock +ffffffff81999580 T drm_dp_downstream_min_tmds_clock +ffffffff81999600 T drm_dp_downstream_max_bpc +ffffffff819996a0 T drm_dp_downstream_420_passthrough +ffffffff81999700 T drm_dp_downstream_444_to_420_conversion +ffffffff81999760 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff819997c0 T drm_dp_downstream_mode +ffffffff81999850 T drm_dp_downstream_id +ffffffff81999870 T drm_dp_downstream_debug +ffffffff81999910 T drm_dp_subconnector_type +ffffffff81999980 T drm_dp_set_subconnector_property +ffffffff819999f0 T drm_dp_read_sink_count_cap +ffffffff81999a40 T drm_dp_read_sink_count +ffffffff81999aa0 T drm_dp_remote_aux_init +ffffffff81999ad0 t drm_dp_aux_crc_work +ffffffff81999c40 T drm_dp_aux_init +ffffffff81999cf0 T drm_dp_aux_register +ffffffff81999e10 T drm_dp_aux_unregister +ffffffff81999e40 T drm_dp_psr_setup_time +ffffffff81999e90 T drm_dp_start_crc +ffffffff81999f40 T drm_dp_stop_crc +ffffffff81999fd0 T drm_dp_read_desc +ffffffff8199a190 T drm_dp_dsc_sink_max_slice_count +ffffffff8199a220 T drm_dp_dsc_sink_line_buf_depth +ffffffff8199a260 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff8199a2d0 T drm_dp_read_lttpr_common_caps +ffffffff8199a390 T drm_dp_read_lttpr_phy_caps +ffffffff8199a450 T drm_dp_lttpr_count +ffffffff8199a4e0 T drm_dp_lttpr_max_link_rate +ffffffff8199a540 T drm_dp_lttpr_max_lane_count +ffffffff8199a570 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff8199a5a0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff8199a5d0 T drm_dp_get_phy_test_pattern +ffffffff8199a6f0 T drm_dp_set_phy_test_pattern +ffffffff8199a7b0 T drm_dp_vsc_sdp_log +ffffffff8199aad0 T drm_dp_get_pcon_max_frl_bw +ffffffff8199ab20 T drm_dp_pcon_frl_prepare +ffffffff8199ab70 T drm_dp_pcon_is_frl_ready +ffffffff8199abd0 T drm_dp_pcon_frl_configure_1 +ffffffff8199acd0 T drm_dp_pcon_frl_configure_2 +ffffffff8199ad30 T drm_dp_pcon_reset_frl_config +ffffffff8199ad80 T drm_dp_pcon_frl_enable +ffffffff8199ae40 T drm_dp_pcon_hdmi_link_active +ffffffff8199ae90 T drm_dp_pcon_hdmi_link_mode +ffffffff8199af00 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff8199aff0 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff8199b020 T drm_dp_pcon_dsc_max_slices +ffffffff8199b0b0 T drm_dp_pcon_dsc_max_slice_width +ffffffff8199b0e0 T drm_dp_pcon_dsc_bpp_incr +ffffffff8199b120 T drm_dp_pcon_pps_default +ffffffff8199b1a0 T drm_dp_pcon_pps_override_buf +ffffffff8199b240 T drm_dp_pcon_pps_override_param +ffffffff8199b310 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff8199b3b0 T drm_edp_backlight_set_level +ffffffff8199b480 T drm_edp_backlight_enable +ffffffff8199b690 t drm_edp_backlight_set_enable +ffffffff8199b7c0 T drm_edp_backlight_disable +ffffffff8199b800 T drm_edp_backlight_init +ffffffff8199bd60 T drm_panel_dp_aux_backlight +ffffffff8199bef0 t __128b132b_channel_eq_delay_us +ffffffff8199bf70 t __8b10b_channel_eq_delay_us +ffffffff8199bff0 t drm_dp_aux_get_crc +ffffffff8199c0d0 t drm_dp_i2c_xfer +ffffffff8199c340 t drm_dp_i2c_functionality +ffffffff8199c370 t drm_dp_i2c_do_msg +ffffffff8199c740 t lock_bus +ffffffff8199c760 t trylock_bus +ffffffff8199c7b0 t unlock_bus +ffffffff8199c7d0 t dp_aux_backlight_update_status +ffffffff8199d000 T drm_dp_encode_sideband_req +ffffffff8199d440 T drm_dp_decode_sideband_req +ffffffff8199d970 T drm_dp_dump_sideband_msg_req_body +ffffffff8199dd40 T drm_dp_mst_get_port_malloc +ffffffff8199dd90 T drm_dp_mst_put_port_malloc +ffffffff8199de80 t kref_put +ffffffff8199dec0 T drm_atomic_get_mst_payload_state +ffffffff8199df10 T drm_dp_mst_dpcd_read +ffffffff8199e1d0 T drm_dp_mst_dpcd_write +ffffffff8199e220 t drm_dp_send_dpcd_write +ffffffff8199e460 T drm_dp_mst_connector_late_register +ffffffff8199e4e0 T drm_dp_mst_connector_early_unregister +ffffffff8199e520 T drm_dp_send_power_updown_phy +ffffffff8199e760 t drm_dp_mst_topology_put_port +ffffffff8199e880 t drm_dp_mst_wait_tx_reply +ffffffff8199ec20 T drm_dp_send_query_stream_enc_status +ffffffff8199eee0 T drm_dp_add_payload_part1 +ffffffff8199f090 T drm_dp_remove_payload +ffffffff8199f230 T drm_dp_add_payload_part2 +ffffffff8199f3e0 T drm_dp_get_vc_payload_bw +ffffffff8199f480 T drm_dp_read_mst_cap +ffffffff8199f4e0 T drm_dp_mst_topology_mgr_set_mst +ffffffff8199f790 t drm_dp_dpcd_write_payload +ffffffff8199f930 t drm_dp_mst_topology_put_mstb +ffffffff8199fa30 T drm_dp_mst_topology_mgr_suspend +ffffffff8199faf0 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff8199fb60 T drm_dp_mst_topology_mgr_resume +ffffffff8199fda0 T drm_dp_mst_hpd_irq_handle_event +ffffffff819a0d10 T drm_dp_mst_hpd_irq_send_new_request +ffffffff819a0d90 T drm_dp_mst_detect_port +ffffffff819a0ef0 T drm_dp_mst_edid_read +ffffffff819a0ff0 T drm_dp_mst_get_edid +ffffffff819a1050 T drm_dp_atomic_find_time_slots +ffffffff819a1300 T drm_atomic_get_mst_topology_state +ffffffff819a1310 T drm_dp_atomic_release_time_slots +ffffffff819a1520 T drm_dp_mst_atomic_setup_commit +ffffffff819a16b0 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff819a1820 T drm_dp_mst_root_conn_atomic_check +ffffffff819a1940 T drm_dp_mst_update_slots +ffffffff819a19a0 T drm_dp_check_act_status +ffffffff819a1b30 T drm_dp_calc_pbn_mode +ffffffff819a1ba0 T drm_dp_mst_dump_topology +ffffffff819a1e20 t drm_dp_mst_dump_mstb +ffffffff819a1e90 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff819a1fc0 T drm_dp_mst_dsc_aux_for_port +ffffffff819a21f0 T drm_dp_mst_atomic_enable_dsc +ffffffff819a2370 T drm_dp_mst_atomic_check +ffffffff819a2660 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff819a28e0 t drm_dp_mst_duplicate_state +ffffffff819a2ab0 t drm_dp_mst_destroy_state +ffffffff819a2b70 T drm_atomic_get_old_mst_topology_state +ffffffff819a2b80 T drm_atomic_get_new_mst_topology_state +ffffffff819a2b90 T drm_dp_mst_topology_mgr_init +ffffffff819a2e00 t drm_dp_mst_link_probe_work +ffffffff819a3090 t drm_dp_tx_work +ffffffff819a30e0 t drm_dp_delayed_destroy_work +ffffffff819a3590 t drm_dp_mst_up_req_work +ffffffff819a3ab0 T drm_dp_mst_topology_mgr_destroy +ffffffff819a3b40 t drm_dp_mst_is_virtual_dpcd +ffffffff819a3c20 t drm_dp_free_mst_branch_device +ffffffff819a3c60 t drm_dp_mst_topology_get_port_validated_locked +ffffffff819a3ce0 t drm_dp_mst_dump_sideband_msg_tx +ffffffff819a3ef0 t process_single_down_tx_qlock +ffffffff819a4060 t process_single_tx_qlock +ffffffff819a4530 t drm_dp_msg_data_crc4 +ffffffff819a4660 t drm_dp_payload_send_msg +ffffffff819a4ac0 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff819a4b40 t drm_dp_get_one_sb_msg +ffffffff819a5280 t drm_dp_get_mst_branch_device +ffffffff819a53e0 t drm_dp_check_and_send_link_address +ffffffff819a54b0 t drm_dp_send_link_address +ffffffff819a6170 t drm_dp_send_enum_path_resources +ffffffff819a63d0 t drm_dp_port_set_pdt +ffffffff819a66a0 t drm_dp_mst_port_add_connector +ffffffff819a6880 t drm_dp_mst_i2c_xfer +ffffffff819a6fa0 t drm_dp_mst_i2c_functionality +ffffffff819a6fd0 t get_mst_branch_device_by_guid_helper +ffffffff819a8000 T drm_dsc_dp_pps_header_init +ffffffff819a8030 T drm_dsc_dp_rc_buffer_size +ffffffff819a8090 T drm_dsc_pps_payload_pack +ffffffff819a8340 T drm_dsc_set_const_params +ffffffff819a8390 T drm_dsc_set_rc_buf_thresh +ffffffff819a8400 T drm_dsc_setup_rc_params +ffffffff819a85c0 T drm_dsc_compute_rc_parameters +ffffffff819a88c0 T drm_dsc_get_bpp_int +ffffffff819a8940 T drm_dsc_initial_scale_value +ffffffff819a8980 T drm_dsc_flatness_det_thresh +ffffffff819a9000 T drm_connector_attach_content_protection_property +ffffffff819a9030 T drm_hdcp_check_ksvs_revoked +ffffffff819a9080 T drm_hdcp_update_content_protection +ffffffff819aa000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff819aa120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff819aa180 T drm_hdmi_avi_infoframe_bars +ffffffff819aa1d0 T drm_hdmi_avi_infoframe_content_type +ffffffff819ab000 T drm_scdc_read +ffffffff819ab090 T drm_scdc_write +ffffffff819ab170 T drm_scdc_get_scrambling_status +ffffffff819ab250 T drm_scdc_set_scrambling +ffffffff819ab3e0 T drm_scdc_set_high_tmds_clock_ratio +ffffffff819ac000 T drm_gem_ttm_mmap +ffffffff819ac070 T drm_gem_ttm_vmap +ffffffff819ac080 T drm_gem_ttm_vunmap +ffffffff819ad000 T ttm_agp_bind +ffffffff819ad050 T ttm_agp_unbind +ffffffff819ad070 T ttm_agp_is_bound +ffffffff819ad0c0 T ttm_agp_destroy +ffffffff819ad0e0 T ttm_agp_tt_create +ffffffff819ae000 T ttm_bo_move_to_lru_tail +ffffffff819ae040 T ttm_bo_set_bulk_move +ffffffff819ae100 T ttm_bo_put +ffffffff819ae610 T ttm_bo_eviction_valuable +ffffffff819ae660 T ttm_mem_evict_first +ffffffff819aed60 t ttm_bo_evict_swapout_allowable +ffffffff819aef60 t dma_resv_unlock +ffffffff819af000 t ttm_bo_cleanup_refs +ffffffff819af350 t ttm_bo_unreserve +ffffffff819af430 T ttm_bo_pin +ffffffff819af4d0 T ttm_bo_unpin +ffffffff819af5e0 T ttm_bo_mem_space +ffffffff819af820 t ttm_bo_add_move_fence +ffffffff819af8e0 T ttm_bo_validate +ffffffff819afa70 T ttm_bo_init_reserved +ffffffff819afc60 T ttm_bo_init_validate +ffffffff819afd00 T ttm_bo_unmap_virtual +ffffffff819afe30 T ttm_bo_wait_ctx +ffffffff819afec0 T ttm_bo_swapout +ffffffff819b0180 t ttm_bo_handle_move_mem +ffffffff819b0300 T ttm_bo_tt_destroy +ffffffff819b0370 t ttm_bo_delayed_delete +ffffffff819b1000 T ttm_mem_io_reserve +ffffffff819b1060 T ttm_mem_io_free +ffffffff819b10d0 T ttm_move_memcpy +ffffffff819b1290 T ttm_bo_move_memcpy +ffffffff819b14f0 T ttm_bo_move_sync_cleanup +ffffffff819b1600 T ttm_io_prot +ffffffff819b1640 T ttm_bo_kmap +ffffffff819b1900 T ttm_bo_kunmap +ffffffff819b1a40 T ttm_bo_vmap +ffffffff819b1c30 T ttm_bo_vunmap +ffffffff819b1d20 T ttm_bo_move_accel_cleanup +ffffffff819b2000 T ttm_bo_pipeline_gutting +ffffffff819b2200 t ttm_buffer_object_transfer +ffffffff819b2430 t ttm_transfered_destroy +ffffffff819b3000 T ttm_bo_vm_reserve +ffffffff819b3180 t dma_resv_lock_interruptible +ffffffff819b32a0 T ttm_bo_vm_fault_reserved +ffffffff819b35e0 T ttm_bo_vm_fault +ffffffff819b3740 T ttm_bo_vm_reference +ffffffff819b3770 T ttm_bo_vm_detach +ffffffff819b3780 T ttm_bo_mmap_obj +ffffffff819b4000 T ttm_global_swapout +ffffffff819b40e0 T ttm_device_swapout +ffffffff819b4200 T ttm_device_init +ffffffff819b4490 T ttm_device_fini +ffffffff819b4650 T ttm_device_clear_dma_mappings +ffffffff819b4700 t ttm_device_clear_lru_dma_mappings +ffffffff819b5000 T ttm_eu_backoff_reservation +ffffffff819b5130 T ttm_eu_reserve_buffers +ffffffff819b55b0 T ttm_eu_fence_buffer_objects +ffffffff819b5700 t __ww_mutex_lock +ffffffff819b6000 T ttm_prot_from_caching +ffffffff819b7000 T ttm_pool_alloc +ffffffff819b7a40 t ttm_pool_free_range +ffffffff819b7d20 T ttm_pool_free +ffffffff819b7d80 t ttm_pool_shrink +ffffffff819b7f60 T ttm_pool_init +ffffffff819b8220 T ttm_pool_fini +ffffffff819b8420 t ttm_pool_type_fini +ffffffff819b8660 T ttm_pool_mgr_init +ffffffff819b8940 t ttm_pool_shrinker_count +ffffffff819b8990 t ttm_pool_shrinker_scan +ffffffff819b89e0 T ttm_pool_mgr_fini +ffffffff819b9000 T ttm_range_man_init_nocheck +ffffffff819b9180 T ttm_range_man_fini_nocheck +ffffffff819b9310 t ttm_range_man_alloc +ffffffff819b9460 t ttm_range_man_free +ffffffff819b94c0 t ttm_range_man_intersects +ffffffff819b9520 t ttm_range_man_compatible +ffffffff819b9580 t ttm_range_man_debug +ffffffff819ba000 T ttm_lru_bulk_move_init +ffffffff819ba020 T ttm_lru_bulk_move_tail +ffffffff819ba1e0 T ttm_resource_add_bulk_move +ffffffff819ba2b0 T ttm_resource_del_bulk_move +ffffffff819ba3f0 T ttm_resource_move_to_lru_tail +ffffffff819ba560 T ttm_resource_init +ffffffff819ba650 T ttm_resource_fini +ffffffff819ba6c0 T ttm_resource_alloc +ffffffff819ba810 T ttm_resource_free +ffffffff819ba9d0 T ttm_resource_intersects +ffffffff819baa30 T ttm_resource_compatible +ffffffff819baa90 T ttm_resource_compat +ffffffff819bac20 T ttm_resource_set_bo +ffffffff819bac70 T ttm_resource_manager_init +ffffffff819bad20 T ttm_resource_manager_evict_all +ffffffff819baef0 T ttm_resource_manager_usage +ffffffff819baf50 T ttm_resource_manager_debug +ffffffff819bb040 T ttm_resource_manager_first +ffffffff819bb0d0 T ttm_resource_manager_next +ffffffff819bb1f0 T ttm_kmap_iter_iomap_init +ffffffff819bb250 T ttm_kmap_iter_linear_io_init +ffffffff819bb430 T ttm_kmap_iter_linear_io_fini +ffffffff819bb480 T ttm_resource_manager_create_debugfs +ffffffff819bb4b0 t ttm_kmap_iter_iomap_map_local +ffffffff819bb5e0 t ttm_kmap_iter_iomap_unmap_local +ffffffff819bb600 t ttm_kmap_iter_linear_io_map_local +ffffffff819bc000 T ttm_sys_man_init +ffffffff819bc130 t ttm_sys_man_alloc +ffffffff819bc1b0 t ttm_sys_man_free +ffffffff819bd000 T ttm_tt_create +ffffffff819bd100 T ttm_tt_destroy +ffffffff819bd120 T ttm_tt_init +ffffffff819bd1f0 T ttm_tt_fini +ffffffff819bd2d0 T ttm_sg_tt_init +ffffffff819bd4f0 T ttm_tt_swapin +ffffffff819bd610 T ttm_tt_swapout +ffffffff819bd660 T ttm_tt_populate +ffffffff819bd7d0 T ttm_tt_unpopulate +ffffffff819bd880 T ttm_tt_mgr_init +ffffffff819bd8e0 T ttm_kmap_iter_tt_init +ffffffff819bd940 T ttm_tt_pages_limit +ffffffff819bd970 t ttm_kmap_iter_tt_map_local +ffffffff819bd9d0 t ttm_kmap_iter_tt_unmap_local +ffffffff819be000 T drm_sched_entity_init +ffffffff819be170 T drm_sched_entity_modify_sched +ffffffff819be1f0 T drm_sched_entity_is_ready +ffffffff819be230 T drm_sched_entity_error +ffffffff819be270 T drm_sched_entity_flush +ffffffff819be5a0 t drm_sched_entity_kill +ffffffff819be760 T drm_sched_entity_fini +ffffffff819be7d0 T drm_sched_entity_destroy +ffffffff819be870 T drm_sched_entity_set_priority +ffffffff819be8b0 T drm_sched_entity_pop_job +ffffffff819beb00 T drm_sched_entity_select_rq +ffffffff819bebd0 T drm_sched_entity_push_job +ffffffff819bed20 t drm_sched_entity_kill_jobs_cb +ffffffff819bee70 t drm_sched_entity_kill_jobs_work +ffffffff819beef0 t drm_sched_entity_clear_dep +ffffffff819bef10 t drm_sched_entity_wakeup +ffffffff819bf000 T drm_sched_fence_slab_init +ffffffff819bf060 T drm_sched_fence_slab_fini +ffffffff819bf080 T drm_sched_fence_scheduled +ffffffff819bf0e0 T drm_sched_fence_finished +ffffffff819bf100 T drm_sched_fence_free +ffffffff819bf1a0 T to_drm_sched_fence +ffffffff819bf200 T drm_sched_fence_alloc +ffffffff819bf280 T drm_sched_fence_init +ffffffff819bf300 t drm_sched_fence_get_driver_name +ffffffff819bf330 t drm_sched_fence_get_timeline_name +ffffffff819bf390 t drm_sched_fence_release_scheduled +ffffffff819bf480 t drm_sched_fence_release_finished +ffffffff819bf4c0 t drm_sched_fence_set_deadline_finished +ffffffff819c0000 T drm_sched_rq_update_fifo +ffffffff819c00e0 T drm_sched_rq_add_entity +ffffffff819c0170 T drm_sched_rq_remove_entity +ffffffff819c0250 T drm_sched_fault +ffffffff819c02a0 T drm_sched_suspend_timeout +ffffffff819c0320 T drm_sched_resume_timeout +ffffffff819c03c0 T drm_sched_stop +ffffffff819c0590 T drm_sched_start +ffffffff819c06c0 t drm_sched_job_done_cb +ffffffff819c06e0 t drm_sched_job_done +ffffffff819c07b0 T drm_sched_resubmit_jobs +ffffffff819c0900 T drm_sched_job_init +ffffffff819c0990 T drm_sched_job_arm +ffffffff819c0a20 T drm_sched_job_add_dependency +ffffffff819c0b90 T drm_sched_job_add_syncobj_dependency +ffffffff819c0bf0 T drm_sched_job_add_resv_dependencies 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intel_plane_data_rate +ffffffff819e3450 T intel_plane_calc_min_cdclk +ffffffff819e35b0 T intel_plane_copy_uapi_to_hw_state +ffffffff819e3720 T intel_plane_copy_hw_state +ffffffff819e3810 T intel_plane_set_invisible +ffffffff819e3910 T intel_plane_atomic_check_with_state +ffffffff819e4560 T intel_plane_atomic_check +ffffffff819e46c0 T intel_plane_update_noarm +ffffffff819e4700 T intel_plane_update_arm +ffffffff819e4740 T intel_plane_disable_arm +ffffffff819e4760 T intel_crtc_planes_update_noarm +ffffffff819e4880 T intel_crtc_planes_update_arm +ffffffff819e4c70 T intel_atomic_plane_check_clipping +ffffffff819e4ed0 T intel_plane_check_src_coordinates +ffffffff819e5090 T intel_plane_helper_add +ffffffff819e50d0 t intel_prepare_plane_fb +ffffffff819e5330 t intel_cleanup_plane_fb +ffffffff819e6000 T intel_audio_sdp_split_update +ffffffff819e60d0 T intel_audio_compute_config +ffffffff819e6180 T intel_audio_codec_enable +ffffffff819e6370 T intel_audio_codec_disable +ffffffff819e65c0 T intel_audio_codec_get_config +ffffffff819e6610 T intel_audio_hooks_init +ffffffff819e6690 T intel_audio_cdclk_change_pre +ffffffff819e6720 T intel_audio_cdclk_change_post +ffffffff819e6800 T intel_audio_init +ffffffff819e6810 T intel_audio_deinit +ffffffff819e6860 t g4x_audio_codec_enable +ffffffff819e6a20 t g4x_audio_codec_disable +ffffffff819e6aa0 t g4x_audio_codec_get_config +ffffffff819e6bb0 t ibx_audio_codec_enable +ffffffff819e6d70 t ibx_audio_codec_disable +ffffffff819e6f40 t intel_acomp_get_config +ffffffff819e6fc0 t audio_config_hdmi_pixel_clock +ffffffff819e7190 t hsw_audio_codec_enable +ffffffff819e79d0 t hsw_audio_codec_disable +ffffffff819e8000 T intel_backlight_invert_pwm_level +ffffffff819e80c0 T intel_backlight_set_pwm_level +ffffffff819e8130 T intel_backlight_level_to_pwm +ffffffff819e8320 T intel_backlight_level_from_pwm +ffffffff819e84c0 T intel_backlight_set_acpi +ffffffff819e86d0 T intel_backlight_disable +ffffffff819e87b0 T intel_backlight_enable +ffffffff819e8850 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T intel_bios_hdmi_max_tmds_clock +ffffffff819ed580 T intel_bios_is_valid_vbt +ffffffff819ed670 T intel_bios_init +ffffffff819ef500 T intel_bios_init_panel_early +ffffffff819ef520 t intel_bios_init_panel +ffffffff819f15a0 T intel_bios_init_panel_late +ffffffff819f15c0 T intel_bios_driver_remove +ffffffff819f16b0 T intel_bios_fini_panel +ffffffff819f1790 T intel_bios_is_tv_present +ffffffff819f1810 T intel_bios_is_lvds_present +ffffffff819f18c0 T intel_bios_is_port_present +ffffffff819f1990 T intel_bios_encoder_supports_dp_dual_mode +ffffffff819f1a00 T intel_bios_is_dsi_present +ffffffff819f1ad0 T intel_bios_get_dsc_params +ffffffff819f1cf0 T intel_bios_dp_aux_ch +ffffffff819f1df0 T intel_bios_dp_has_shared_aux_ch +ffffffff819f1e80 T intel_bios_dp_boost_level +ffffffff819f1f10 T intel_bios_hdmi_boost_level +ffffffff819f1fa0 T intel_bios_hdmi_ddc_pin +ffffffff819f2100 T intel_bios_encoder_supports_typec_usb +ffffffff819f2150 T intel_bios_encoder_supports_tbt +ffffffff819f21a0 T intel_bios_encoder_lane_reversal +ffffffff819f21e0 T intel_bios_encoder_hpd_invert +ffffffff819f2220 T intel_bios_encoder_data_lookup +ffffffff819f22e0 T intel_bios_for_each_encoder +ffffffff819f2360 t opregion_get_panel_type +ffffffff819f2380 t vbt_get_panel_type +ffffffff819f2470 t pnpid_get_panel_type +ffffffff819f2650 t fallback_get_panel_type +ffffffff819f2680 t fill_detail_timing_data +ffffffff819f3000 T icl_pcode_restrict_qgv_points +ffffffff819f3120 T intel_bw_init_hw +ffffffff819f3290 t tgl_get_bw_info +ffffffff819f3880 t icl_get_bw_info +ffffffff819f3c50 T intel_bw_crtc_update +ffffffff819f3d30 t intel_bw_crtc_data_rate +ffffffff819f3e50 T intel_atomic_get_old_bw_state +ffffffff819f3e70 T intel_atomic_get_new_bw_state +ffffffff819f3e90 T intel_atomic_get_bw_state +ffffffff819f3eb0 T intel_bw_min_cdclk +ffffffff819f4130 T intel_bw_calc_min_cdclk +ffffffff819f44f0 T intel_bw_atomic_check +ffffffff819f4f60 T intel_bw_init +ffffffff819f4fd0 t icl_get_qgv_points +ffffffff819f5530 t skl_plane_calc_dbuf_bw +ffffffff819f5670 t intel_bw_duplicate_state +ffffffff819f56e0 t intel_bw_destroy_state +ffffffff819f6000 T intel_cdclk_get_cdclk +ffffffff819f6020 T intel_cdclk_init_hw +ffffffff819f67d0 T intel_cdclk_uninit_hw +ffffffff819f68e0 T intel_cdclk_needs_modeset +ffffffff819f6920 T intel_cdclk_dump_config +ffffffff819f69a0 T intel_set_cdclk_pre_plane_update +ffffffff819f6c80 t intel_set_cdclk +ffffffff819f7050 T intel_set_cdclk_post_plane_update +ffffffff819f72d0 T intel_crtc_compute_min_cdclk +ffffffff819f7660 T intel_atomic_get_cdclk_state +ffffffff819f7680 T intel_cdclk_atomic_check +ffffffff819f7780 T intel_cdclk_init +ffffffff819f77f0 T intel_modeset_calc_cdclk +ffffffff819f7e20 t intel_cdclk_can_crawl +ffffffff819f7eb0 T intel_update_max_cdclk +ffffffff819f8210 T intel_update_cdclk +ffffffff819f82b0 T intel_read_rawclk +ffffffff819f8430 t i9xx_hrawclk +ffffffff819f84e0 T intel_cdclk_debugfs_register +ffffffff819f8510 T intel_init_cdclk_hooks +ffffffff819f8930 t bxt_set_cdclk +ffffffff819f8fa0 t _bxt_set_cdclk +ffffffff819f9750 t skl_set_cdclk +ffffffff819f9d50 t intel_cdclk_duplicate_state +ffffffff819f9dd0 t intel_cdclk_destroy_state +ffffffff819f9df0 t bxt_get_cdclk +ffffffff819fa020 t bxt_modeset_calc_cdclk +ffffffff819fa470 t tgl_calc_voltage_level +ffffffff819fa4c0 t intel_compute_min_cdclk +ffffffff819fa6c0 t rplu_calc_voltage_level +ffffffff819fa710 t ehl_calc_voltage_level +ffffffff819fa760 t icl_calc_voltage_level +ffffffff819fa7b0 t bxt_calc_voltage_level +ffffffff819fa800 t skl_get_cdclk +ffffffff819faa10 t skl_modeset_calc_cdclk +ffffffff819fac20 t bdw_get_cdclk +ffffffff819fad10 t bdw_set_cdclk +ffffffff819fb2a0 t bdw_modeset_calc_cdclk +ffffffff819fb3a0 t hsw_get_cdclk +ffffffff819fb470 t fixed_modeset_calc_cdclk +ffffffff819fb4b0 t vlv_get_cdclk +ffffffff819fb570 t chv_set_cdclk +ffffffff819fb8e0 t vlv_modeset_calc_cdclk +ffffffff819fbab0 t vlv_set_cdclk +ffffffff819fbff0 t fixed_400mhz_get_cdclk +ffffffff819fc020 t fixed_450mhz_get_cdclk +ffffffff819fc050 t gm45_get_cdclk +ffffffff819fc150 t intel_hpll_vco +ffffffff819fc280 t g33_get_cdclk +ffffffff819fc390 t i965gm_get_cdclk +ffffffff819fc490 t pnv_get_cdclk +ffffffff819fc540 t i945gm_get_cdclk +ffffffff819fc5b0 t i915gm_get_cdclk +ffffffff819fc620 t fixed_333mhz_get_cdclk +ffffffff819fc650 t fixed_266mhz_get_cdclk +ffffffff819fc680 t i85x_get_cdclk +ffffffff819fc700 t fixed_200mhz_get_cdclk +ffffffff819fc730 t fixed_133mhz_get_cdclk +ffffffff819fd000 T intel_color_load_luts +ffffffff819fd030 T intel_color_commit_noarm +ffffffff819fd080 T intel_color_commit_arm +ffffffff819fd0b0 T intel_color_post_update +ffffffff819fd100 T intel_color_prepare_commit +ffffffff819fd130 T intel_color_cleanup_commit +ffffffff819fd180 T intel_color_check +ffffffff819fd1a0 T intel_color_get_config +ffffffff819fd220 T intel_color_lut_equal +ffffffff819fd280 T intel_color_assert_luts +ffffffff819fd570 T intel_color_crtc_init +ffffffff819fd5e0 T intel_color_init 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ivb_load_luts +ffffffff81a058c0 t ivb_read_luts +ffffffff81a05d70 t ivb_load_lut_10 +ffffffff81a05f70 t ilk_color_commit_arm +ffffffff81a05ff0 t ilk_color_check +ffffffff81a06250 t ilk_load_luts +ffffffff81a064e0 t ilk_read_luts +ffffffff81a06740 t ilk_lut_equal +ffffffff81a07000 T intel_combo_phy_power_up_lanes +ffffffff81a07120 T intel_combo_phy_init +ffffffff81a075c0 T intel_combo_phy_uninit +ffffffff81a07790 t icl_combo_phy_verify_state +ffffffff81a08000 T intel_connector_init +ffffffff81a08070 T intel_connector_alloc +ffffffff81a08100 T intel_connector_free +ffffffff81a08140 T intel_connector_destroy +ffffffff81a081a0 T intel_connector_register +ffffffff81a081b0 T intel_connector_unregister +ffffffff81a081c0 T intel_connector_attach_encoder +ffffffff81a081e0 T intel_connector_get_hw_state +ffffffff81a08230 T intel_connector_get_pipe +ffffffff81a082f0 T intel_connector_update_modes +ffffffff81a08320 T intel_ddc_get_modes +ffffffff81a08390 T intel_attach_force_audio_property +ffffffff81a08430 T intel_attach_broadcast_rgb_property +ffffffff81a084d0 T intel_attach_aspect_ratio_property +ffffffff81a08530 T intel_attach_hdmi_colorspace_property +ffffffff81a08580 T intel_attach_dp_colorspace_property +ffffffff81a085d0 T intel_attach_scaling_mode_property +ffffffff81a09000 T intel_crt_port_enabled +ffffffff81a09080 T intel_crt_reset +ffffffff81a09160 T intel_crt_init +ffffffff81a09590 t hsw_crt_get_config +ffffffff81a09640 t hsw_crt_compute_config +ffffffff81a09730 t hsw_pre_pll_enable_crt +ffffffff81a097a0 t hsw_pre_enable_crt +ffffffff81a09840 t hsw_enable_crt +ffffffff81a099e0 t hsw_disable_crt +ffffffff81a09a50 t hsw_post_disable_crt +ffffffff81a09bf0 t pch_crt_compute_config +ffffffff81a09c40 t pch_disable_crt +ffffffff81a09c70 t pch_post_disable_crt +ffffffff81a09d60 t intel_crt_compute_config +ffffffff81a09db0 t intel_disable_crt +ffffffff81a09ea0 t intel_crt_get_config +ffffffff81a09f40 t intel_crt_get_hw_state +ffffffff81a0a000 t intel_enable_crt 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intel_pipe_update_start +ffffffff81a0cd50 T intel_pipe_update_end +ffffffff81a0d060 t intel_crtc_destroy +ffffffff81a0d090 t intel_crtc_late_register +ffffffff81a0d0c0 t intel_crtc_vblank_work +ffffffff81a0e000 T intel_output_format_name +ffffffff81a0e040 T intel_crtc_state_dump +ffffffff81a0f430 t ilk_dump_csc +ffffffff81a10000 T intel_cursor_plane_create +ffffffff81a10200 t i845_cursor_max_stride +ffffffff81a10230 t i845_cursor_update_arm +ffffffff81a104b0 t i845_cursor_disable_arm +ffffffff81a104d0 t i845_cursor_get_hw_state +ffffffff81a10580 t i845_check_cursor +ffffffff81a10710 t i9xx_cursor_max_stride +ffffffff81a10750 t i9xx_cursor_update_arm +ffffffff81a10b10 t i9xx_cursor_disable_arm +ffffffff81a10b30 t i9xx_cursor_get_hw_state +ffffffff81a10c20 t i9xx_check_cursor +ffffffff81a10ea0 t intel_check_cursor +ffffffff81a110b0 t intel_legacy_cursor_update +ffffffff81a11470 t intel_cursor_format_mod_supported +ffffffff81a12000 T intel_is_c10phy +ffffffff81a12040 T intel_cx0_phy_set_signal_levels +ffffffff81a12630 t intel_cx0_rmw +ffffffff81a12720 T intel_c10pll_readout_hw_state +ffffffff81a128b0 T intel_c10pll_dump_hw_state +ffffffff81a12b30 T intel_cx0_phy_check_hdmi_link_rate +ffffffff81a12ca0 T intel_cx0pll_calc_state +ffffffff81a130b0 T intel_c20pll_readout_hw_state +ffffffff81a135d0 t intel_c20_sram_read +ffffffff81a136e0 T intel_c20pll_dump_hw_state +ffffffff81a13a90 T intel_c10pll_calc_port_clock +ffffffff81a13b70 T intel_c20pll_calc_port_clock +ffffffff81a13c70 T intel_mtl_tbt_calc_port_clock +ffffffff81a13dd0 T intel_mtl_pll_enable +ffffffff81a155d0 T intel_mtl_pll_disable +ffffffff81a15a40 T intel_mtl_port_pll_type +ffffffff81a15ad0 T intel_c10pll_state_verify +ffffffff81a15dc0 t __intel_cx0_read +ffffffff81a16150 t __intel_cx0_write +ffffffff81a164a0 t intel_cx0_bus_reset +ffffffff81a165d0 t intel_cx0_wait_for_ack +ffffffff81a16750 t intel_cx0_powerdown_change_sequence +ffffffff81a169b0 t intel_c20_sram_write +ffffffff81a17000 T hsw_prepare_dp_ddi_buffers +ffffffff81a171a0 T intel_wait_ddi_buf_idle +ffffffff81a173a0 T intel_ddi_set_dp_msa +ffffffff81a17570 T intel_ddi_enable_transcoder_func +ffffffff81a17650 t intel_ddi_transcoder_func_reg_val_get +ffffffff81a17900 T intel_ddi_disable_transcoder_func +ffffffff81a17af0 T intel_ddi_toggle_hdcp_bits +ffffffff81a17c10 T intel_ddi_connector_get_hw_state +ffffffff81a17d60 T intel_ddi_get_hw_state +ffffffff81a17dd0 t intel_ddi_get_encoder_pipes +ffffffff81a18220 T intel_ddi_enable_transcoder_clock +ffffffff81a182e0 T intel_ddi_disable_transcoder_clock +ffffffff81a18350 T intel_ddi_level +ffffffff81a18530 T icl_ddi_combo_get_pll +ffffffff81a185b0 T hsw_ddi_enable_clock +ffffffff81a18670 T hsw_ddi_disable_clock +ffffffff81a186b0 T hsw_ddi_is_clock_enabled +ffffffff81a18710 T intel_ddi_enable_clock +ffffffff81a18750 T intel_ddi_disable_clock +ffffffff81a18790 T intel_ddi_sanitize_encoder_pll_mapping +ffffffff81a18970 T dp_tp_ctl_reg +ffffffff81a189f0 T dp_tp_status_reg +ffffffff81a18a70 T intel_ddi_update_pipe +ffffffff81a18b00 T intel_ddi_update_active_dpll +ffffffff81a18bf0 T intel_ddi_compute_min_voltage_level +ffffffff81a18c70 T intel_ddi_get_clock +ffffffff81a18d80 T intel_ddi_port_pll_type +ffffffff81a18dc0 T hsw_ddi_get_config +ffffffff81a18eb0 t intel_ddi_get_config +ffffffff81a19800 T intel_ddi_init +ffffffff81a1a580 t intel_ddi_hotplug +ffffffff81a1a990 t intel_ddi_compute_output_type +ffffffff81a1aa10 t intel_ddi_compute_config +ffffffff81a1ab80 t intel_ddi_compute_config_late +ffffffff81a1ae40 t intel_enable_ddi +ffffffff81a1b790 t intel_ddi_pre_pll_enable +ffffffff81a1b980 t intel_ddi_pre_enable +ffffffff81a1c980 t intel_disable_ddi +ffffffff81a1cb30 t intel_ddi_post_pll_disable +ffffffff81a1cc10 t intel_ddi_post_disable +ffffffff81a1d0a0 t intel_ddi_sync_state +ffffffff81a1d160 t intel_ddi_initial_fastset_check +ffffffff81a1d220 t intel_ddi_encoder_suspend +ffffffff81a1d230 t intel_ddi_encoder_shutdown +ffffffff81a1d260 t intel_ddi_get_power_domains +ffffffff81a1d3e0 t mtl_ddi_get_config +ffffffff81a1d4c0 t dg2_ddi_get_config +ffffffff81a1d510 t adls_ddi_enable_clock +ffffffff81a1d680 t adls_ddi_disable_clock +ffffffff81a1d730 t adls_ddi_is_clock_enabled +ffffffff81a1d7d0 t adls_ddi_get_config +ffffffff81a1d890 t rkl_ddi_enable_clock +ffffffff81a1da10 t rkl_ddi_disable_clock +ffffffff81a1daa0 t rkl_ddi_is_clock_enabled +ffffffff81a1db20 t rkl_ddi_get_config +ffffffff81a1dbf0 t dg1_ddi_enable_clock +ffffffff81a1dda0 t dg1_ddi_disable_clock +ffffffff81a1de60 t dg1_ddi_is_clock_enabled +ffffffff81a1df00 t dg1_ddi_get_config +ffffffff81a1dfd0 t jsl_ddi_tc_enable_clock +ffffffff81a1e060 t jsl_ddi_tc_disable_clock +ffffffff81a1e120 t jsl_ddi_tc_is_clock_enabled +ffffffff81a1e1d0 t icl_ddi_tc_port_pll_type +ffffffff81a1e260 t icl_ddi_combo_get_config +ffffffff81a1e300 t icl_ddi_combo_enable_clock +ffffffff81a1e440 t icl_ddi_combo_disable_clock +ffffffff81a1e4e0 t icl_ddi_combo_is_clock_enabled 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intel_ddi_init_hdmi_connector +ffffffff81a20c00 t intel_ddi_encoder_reset +ffffffff81a20ce0 t intel_ddi_encoder_destroy +ffffffff81a20d90 t intel_ddi_encoder_late_register +ffffffff81a20df0 t mtl_ddi_enable_d2d +ffffffff81a20fb0 t intel_wait_ddi_buf_active +ffffffff81a212c0 t intel_ddi_main_link_aux_domain +ffffffff81a213b0 t icl_program_mg_dp_mode +ffffffff81a21680 t intel_ddi_init_dp_buf_reg +ffffffff81a21880 t intel_disable_ddi_buf +ffffffff81a21a30 t mtl_disable_ddi_buf +ffffffff81a21e50 t intel_ddi_disable_fec_state +ffffffff81a21fa0 t mtl_ddi_prepare_link_retrain +ffffffff81a222e0 t intel_ddi_prepare_link_retrain +ffffffff81a227e0 t intel_ddi_set_link_train +ffffffff81a22930 t intel_ddi_set_idle_link_train +ffffffff81a22b00 t intel_ddi_dp_voltage_max +ffffffff81a22bc0 t intel_ddi_dp_preemph_max +ffffffff81a23000 T is_hobl_buf_trans +ffffffff81a23040 T intel_ddi_buf_trans_init +ffffffff81a23300 t mtl_get_cx0_buf_trans +ffffffff81a233e0 t dg2_get_snps_buf_trans +ffffffff81a23450 t adlp_get_combo_buf_trans +ffffffff81a23570 t adlp_get_dkl_buf_trans +ffffffff81a235d0 t adls_get_combo_buf_trans +ffffffff81a236f0 t rkl_get_combo_buf_trans +ffffffff81a23810 t dg1_get_combo_buf_trans +ffffffff81a23930 t tgl_get_combo_buf_trans +ffffffff81a23a70 t tgl_get_dkl_buf_trans +ffffffff81a23ad0 t jsl_get_combo_buf_trans +ffffffff81a23b70 t ehl_get_combo_buf_trans +ffffffff81a23c10 t icl_get_combo_buf_trans +ffffffff81a23cc0 t icl_get_mg_buf_trans +ffffffff81a23d20 t bxt_get_buf_trans +ffffffff81a23da0 t kbl_y_get_buf_trans +ffffffff81a23e40 t kbl_u_get_buf_trans +ffffffff81a23ee0 t kbl_get_buf_trans +ffffffff81a23f80 t skl_y_get_buf_trans +ffffffff81a24020 t skl_u_get_buf_trans +ffffffff81a240c0 t skl_get_buf_trans +ffffffff81a24160 t bdw_get_buf_trans +ffffffff81a241f0 t hsw_get_buf_trans +ffffffff81a25000 T vlv_get_hpll_vco +ffffffff81a25050 T vlv_get_cck_clock +ffffffff81a25100 T vlv_get_cck_clock_hpll +ffffffff81a25200 T intel_update_czclk +ffffffff81a25280 T is_trans_port_sync_master +ffffffff81a252b0 T is_trans_port_sync_mode +ffffffff81a252f0 T intel_crtc_bigjoiner_slave_pipes +ffffffff81a25350 T intel_crtc_is_bigjoiner_slave +ffffffff81a253b0 T intel_crtc_is_bigjoiner_master +ffffffff81a25410 T intel_master_crtc +ffffffff81a254a0 T assert_transcoder +ffffffff81a25660 t transcoder_name +ffffffff81a256a0 T vlv_wait_port_ready +ffffffff81a257f0 T intel_enable_transcoder +ffffffff81a25a50 t assert_planes_disabled +ffffffff81a25b80 T intel_disable_transcoder +ffffffff81a25da0 T intel_rotation_info_size +ffffffff81a25df0 T intel_remapped_info_size +ffffffff81a25f20 T intel_plane_uses_fence +ffffffff81a25f70 T intel_fb_xy_to_linear +ffffffff81a25fc0 T intel_add_fb_offsets +ffffffff81a26010 T intel_plane_fb_max_stride +ffffffff81a26090 T intel_set_plane_visible +ffffffff81a260e0 T intel_plane_fixup_bitmasks +ffffffff81a26190 T intel_plane_disable_noatomic +ffffffff81a26380 T intel_plane_fence_y_offset +ffffffff81a263e0 T intel_has_pending_fb_unpin +ffffffff81a264d0 T intel_get_crtc_new_encoder +ffffffff81a26660 T ilk_pfit_disable +ffffffff81a26720 T intel_phy_is_combo +ffffffff81a26790 T intel_phy_is_tc +ffffffff81a26800 T intel_phy_is_snps +ffffffff81a26850 T intel_port_to_phy +ffffffff81a26900 T intel_port_to_tc +ffffffff81a26a10 T intel_aux_power_domain +ffffffff81a26a50 T intel_modeset_get_crtc_power_domains +ffffffff81a26c80 T intel_modeset_put_crtc_power_domains +ffffffff81a26cb0 T intel_encoder_destroy +ffffffff81a26ce0 T intel_encoder_get_config +ffffffff81a26d10 t intel_crtc_readout_derived_state +ffffffff81a27150 T intel_link_compute_m_n +ffffffff81a27280 T intel_panel_sanitize_ssc +ffffffff81a27360 T intel_zero_m_n +ffffffff81a273a0 T intel_set_m_n +ffffffff81a27460 T intel_cpu_transcoder_has_m2_n2 +ffffffff81a274c0 T intel_cpu_transcoder_set_m1_n1 +ffffffff81a27670 T intel_cpu_transcoder_set_m2_n2 +ffffffff81a277d0 T i9xx_set_pipeconf +ffffffff81a27980 T ilk_set_pipeconf +ffffffff81a27b50 T bdw_get_pipe_misc_bpp +ffffffff81a27c20 T ilk_get_lanes_required +ffffffff81a27c80 T intel_get_m_n +ffffffff81a27d90 T intel_cpu_transcoder_get_m1_n1 +ffffffff81a27f20 T intel_cpu_transcoder_get_m2_n2 +ffffffff81a28080 T intel_crtc_get_pipe_config +ffffffff81a280f0 T i9xx_crtc_clock_get +ffffffff81a28380 T intel_dotclock_calculate +ffffffff81a283e0 T intel_crtc_dotclock +ffffffff81a284b0 T intel_encoder_current_mode +ffffffff81a28660 T intel_fuzzy_clock_check +ffffffff81a286b0 T intel_pipe_config_compare +ffffffff81a2ba00 t pipe_config_mismatch +ffffffff81a2baf0 t pipe_config_infoframe_mismatch +ffffffff81a2bc90 T intel_modeset_all_pipes +ffffffff81a2bea0 T intel_atomic_add_affected_planes +ffffffff81a2bf70 T intel_calc_active_pipes +ffffffff81a2c000 T intel_atomic_check +ffffffff81a2e010 t copy_bigjoiner_crtc_state_nomodeset +ffffffff81a2e120 t intel_atomic_check_planes +ffffffff81a2eb90 t intel_modeset_checks +ffffffff81a2ed20 t intel_atomic_check_crtcs +ffffffff81a2f140 t intel_async_flip_check_hw +ffffffff81a2f610 T intel_crtc_arm_fifo_underrun +ffffffff81a2f6b0 T intel_atomic_helper_free_state_worker +ffffffff81a2f730 T intel_atomic_commit +ffffffff81a2fa90 t intel_atomic_commit_ready +ffffffff81a2fb20 t intel_atomic_commit_work +ffffffff81a2fb40 t intel_atomic_commit_tail +ffffffff81a30cc0 T intel_plane_destroy +ffffffff81a30cf0 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81a30d60 T assert_port_valid +ffffffff81a30de0 T intel_setup_outputs +ffffffff81a31670 T intel_mode_valid +ffffffff81a317f0 T intel_cpu_transcoder_mode_valid +ffffffff81a318b0 T intel_mode_valid_max_plane_size +ffffffff81a31930 T intel_init_display_hooks +ffffffff81a319b0 T intel_initial_commit +ffffffff81a31b50 T i830_enable_pipe +ffffffff81a32190 T i830_disable_pipe +ffffffff81a324c0 T intel_hpd_poll_fini +ffffffff81a325c0 T intel_scanout_needs_vtd_wa +ffffffff81a32600 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81a32760 t intel_atomic_cleanup_work +ffffffff81a32860 t intel_pre_plane_update +ffffffff81a32dc0 t hsw_get_pipe_config +ffffffff81a339f0 t hsw_crtc_enable +ffffffff81a34450 t hsw_crtc_disable +ffffffff81a34750 t skl_commit_modeset_enables +ffffffff81a34d20 t intel_get_transcoder_timings +ffffffff81a35030 t intel_get_pipe_src_size +ffffffff81a35150 t ilk_get_pfit_config +ffffffff81a352d0 t enabled_bigjoiner_pipes +ffffffff81a354f0 t bdw_set_pipe_misc +ffffffff81a35640 t ilk_pfit_enable +ffffffff81a35770 t intel_set_transcoder_timings +ffffffff81a35b30 t intel_update_crtc +ffffffff81a36190 t intel_commit_modeset_enables +ffffffff81a362b0 t ilk_get_pipe_config +ffffffff81a36500 t ilk_crtc_enable +ffffffff81a368a0 t ilk_crtc_disable +ffffffff81a36b30 t i9xx_get_pipe_config +ffffffff81a372b0 t valleyview_crtc_enable +ffffffff81a37710 t i9xx_crtc_disable +ffffffff81a37ab0 t i9xx_pfit_enable +ffffffff81a37c20 t i9xx_crtc_enable +ffffffff81a38000 T intel_display_device_probe +ffffffff81a380f0 T intel_display_device_info_runtime_init +ffffffff81a38750 T intel_display_device_info_print +ffffffff81a39000 T intel_display_driver_probe_defer +ffffffff81a39030 T intel_display_driver_init_hw +ffffffff81a390f0 T intel_display_driver_early_probe +ffffffff81a39170 T intel_display_driver_probe_noirq +ffffffff81a39450 T intel_display_driver_probe_nogem +ffffffff81a39760 T intel_display_driver_probe +ffffffff81a39800 T intel_display_driver_register +ffffffff81a39860 T intel_display_driver_remove +ffffffff81a39910 T intel_display_driver_remove_noirq +ffffffff81a399c0 T intel_display_driver_remove_nogem +ffffffff81a39a00 T intel_display_driver_unregister +ffffffff81a39a80 T intel_display_driver_suspend +ffffffff81a39b30 T __intel_display_driver_resume +ffffffff81a39c40 T intel_display_driver_resume +ffffffff81a3a000 T ilk_update_display_irq +ffffffff81a3a140 T ilk_enable_display_irq +ffffffff81a3a160 T ilk_disable_display_irq +ffffffff81a3a240 T bdw_update_port_irq +ffffffff81a3a390 T bdw_enable_pipe_irq +ffffffff81a3a3b0 t bdw_update_pipe_irq +ffffffff81a3a510 T bdw_disable_pipe_irq +ffffffff81a3a620 T ibx_display_interrupt_update +ffffffff81a3a740 T ibx_enable_display_interrupt +ffffffff81a3a760 T ibx_disable_display_interrupt +ffffffff81a3a820 T i915_pipestat_enable_mask +ffffffff81a3a9b0 T i915_enable_pipestat +ffffffff81a3ab30 T i915_disable_pipestat +ffffffff81a3aca0 T i915_enable_asle_pipestat +ffffffff81a3ad50 T i9xx_pipestat_irq_reset +ffffffff81a3aee0 T i9xx_pipestat_irq_ack +ffffffff81a3b060 T i8xx_pipestat_irq_handler +ffffffff81a3b250 t i9xx_pipe_crc_irq_handler +ffffffff81a3b390 T i915_pipestat_irq_handler +ffffffff81a3b5c0 T i965_pipestat_irq_handler +ffffffff81a3b800 T valleyview_pipestat_irq_handler +ffffffff81a3b9a0 T ilk_display_irq_handler +ffffffff81a3bed0 t cpt_irq_handler +ffffffff81a3c240 T ivb_display_irq_handler +ffffffff81a3c7e0 T gen8_de_pipe_underrun_mask +ffffffff81a3c820 T gen8_de_irq_handler +ffffffff81a3d3d0 T gen11_gu_misc_irq_ack +ffffffff81a3d420 T gen11_gu_misc_irq_handler +ffffffff81a3d460 T gen11_display_irq_handler +ffffffff81a3d4f0 T i8xx_enable_vblank +ffffffff81a3d560 T i915gm_enable_vblank +ffffffff81a3d610 T i965_enable_vblank +ffffffff81a3d680 T ilk_enable_vblank +ffffffff81a3d730 T bdw_enable_vblank +ffffffff81a3d8e0 T i8xx_disable_vblank +ffffffff81a3d940 T i915gm_disable_vblank +ffffffff81a3da00 T i965_disable_vblank +ffffffff81a3da60 T ilk_disable_vblank +ffffffff81a3db60 T bdw_disable_vblank +ffffffff81a3dce0 T vlv_display_irq_reset +ffffffff81a3ddd0 T vlv_display_irq_postinstall +ffffffff81a3df20 T gen8_display_irq_reset +ffffffff81a3e0b0 T gen11_display_irq_reset +ffffffff81a3e380 T gen8_irq_power_well_post_enable +ffffffff81a3e4f0 T gen8_irq_power_well_pre_disable +ffffffff81a3e600 T valleyview_enable_display_irqs +ffffffff81a3e720 T valleyview_disable_display_irqs +ffffffff81a3e830 T ilk_de_irq_postinstall +ffffffff81a3e940 T gen8_de_irq_postinstall +ffffffff81a3edb0 T gen11_de_irq_postinstall +ffffffff81a3ee20 T dg1_de_irq_postinstall +ffffffff81a3ee90 T intel_display_irq_init +ffffffff81a3f000 T intel_display_power_domain_str +ffffffff81a3f060 T __intel_display_power_is_enabled +ffffffff81a3f120 T intel_display_power_is_enabled +ffffffff81a3f240 T intel_display_power_set_target_dc_state +ffffffff81a3f360 T intel_display_power_get +ffffffff81a3f3e0 t __intel_display_power_get_domain +ffffffff81a3f5d0 T intel_display_power_get_if_enabled +ffffffff81a3f700 T __intel_display_power_put_async +ffffffff81a3f8f0 t __intel_display_power_put_domain +ffffffff81a3fa60 T intel_display_power_flush_work +ffffffff81a3fb80 t release_async_put_domains +ffffffff81a3fc70 T intel_display_power_put_unchecked +ffffffff81a3fcd0 T intel_display_power_get_in_set +ffffffff81a3fdb0 T intel_display_power_get_in_set_if_enabled +ffffffff81a3fe60 T intel_display_power_put_mask_in_set +ffffffff81a3ff30 T intel_power_domains_init +ffffffff81a40180 t intel_display_power_put_async_work +ffffffff81a403f0 T intel_power_domains_cleanup +ffffffff81a40410 T gen9_dbuf_slices_update +ffffffff81a40620 T intel_power_domains_init_hw +ffffffff81a40b20 t icl_display_core_init +ffffffff81a41320 t bxt_display_core_init +ffffffff81a41470 t vlv_cmnlane_wa +ffffffff81a41540 t assert_ved_power_gated +ffffffff81a415f0 t hsw_assert_cdclk +ffffffff81a41700 t intel_pch_reset_handshake +ffffffff81a417b0 T intel_power_domains_driver_remove +ffffffff81a418a0 T intel_power_domains_sanitize_state +ffffffff81a41990 T intel_power_domains_enable +ffffffff81a419f0 T intel_power_domains_disable +ffffffff81a41aa0 T intel_power_domains_suspend +ffffffff81a41c50 t icl_display_core_uninit +ffffffff81a41d60 t bxt_display_core_uninit +ffffffff81a41e20 T intel_power_domains_resume +ffffffff81a41ef0 T intel_display_power_suspend_late +ffffffff81a41fd0 t hsw_enable_pc8 +ffffffff81a42c80 T intel_display_power_resume_early +ffffffff81a42d70 t hsw_disable_pc8 +ffffffff81a43190 T intel_display_power_suspend +ffffffff81a43210 T intel_display_power_resume +ffffffff81a432f0 T intel_display_power_debug +ffffffff81a433b0 T intel_display_power_ddi_io_domain +ffffffff81a434a0 T intel_display_power_ddi_lanes_domain +ffffffff81a43590 T intel_display_power_aux_io_domain +ffffffff81a436a0 T intel_display_power_legacy_aux_domain +ffffffff81a437b0 T intel_display_power_tbt_aux_domain +ffffffff81a438c0 t __delayed_work_tick +ffffffff81a44000 T intel_display_power_map_init +ffffffff81a44180 t __set_power_wells +ffffffff81a44560 T intel_display_power_map_cleanup +ffffffff81a45000 T lookup_power_well +ffffffff81a450c0 T intel_power_well_enable +ffffffff81a45150 T intel_power_well_name +ffffffff81a45190 T intel_power_well_disable +ffffffff81a45200 T intel_power_well_sync_hw +ffffffff81a45270 T intel_power_well_get +ffffffff81a45310 T intel_power_well_put +ffffffff81a45410 T intel_power_well_is_enabled +ffffffff81a45430 T intel_power_well_is_enabled_cached +ffffffff81a45460 T intel_display_power_well_is_enabled +ffffffff81a45510 T intel_power_well_is_always_on +ffffffff81a45550 T intel_power_well_domains +ffffffff81a45580 T intel_power_well_refcount +ffffffff81a455b0 T gen9_sanitize_dc_state +ffffffff81a45680 T gen9_set_dc_state +ffffffff81a459e0 T gen9_enable_dc5 +ffffffff81a45c40 T skl_enable_dc6 +ffffffff81a45da0 T bxt_enable_dc9 +ffffffff81a45f50 T bxt_disable_dc9 +ffffffff81a46040 T gen9_disable_dc_states +ffffffff81a46410 T chv_phy_powergate_ch +ffffffff81a46520 t assert_chv_phy_status +ffffffff81a468d0 T chv_phy_powergate_lanes +ffffffff81a46b30 t i9xx_power_well_sync_hw_noop +ffffffff81a46b60 t i9xx_always_on_power_well_noop +ffffffff81a46b90 t i9xx_always_on_power_well_enabled +ffffffff81a46bc0 t chv_pipe_power_well_sync_hw +ffffffff81a46bf0 t chv_pipe_power_well_enable +ffffffff81a46c20 t chv_pipe_power_well_disable +ffffffff81a46c80 t chv_pipe_power_well_enabled +ffffffff81a46d80 t chv_dpio_cmn_power_well_enable +ffffffff81a46f90 t chv_dpio_cmn_power_well_disable +ffffffff81a470c0 t vlv_power_well_enabled +ffffffff81a471e0 t i830_pipes_power_well_sync_hw +ffffffff81a472d0 t i830_pipes_power_well_enable +ffffffff81a47390 t i830_pipes_power_well_disable +ffffffff81a473c0 t i830_pipes_power_well_enabled +ffffffff81a47460 t hsw_power_well_sync_hw +ffffffff81a47550 t hsw_power_well_enable +ffffffff81a477d0 t hsw_power_well_disable +ffffffff81a47890 t hsw_power_well_enabled +ffffffff81a47970 t gen9_dc_off_power_well_enable +ffffffff81a47980 t gen9_dc_off_power_well_disable +ffffffff81a47a20 t gen9_dc_off_power_well_enabled +ffffffff81a47ab0 t bxt_dpio_cmn_power_well_enable +ffffffff81a47ae0 t bxt_dpio_cmn_power_well_disable +ffffffff81a47b10 t bxt_dpio_cmn_power_well_enabled +ffffffff81a47b40 t vlv_display_power_well_enable +ffffffff81a47b70 t vlv_display_power_well_disable +ffffffff81a47be0 t vlv_dpio_cmn_power_well_enable +ffffffff81a47c60 t vlv_dpio_cmn_power_well_disable +ffffffff81a47d60 t vlv_power_well_enable +ffffffff81a47d80 t vlv_power_well_disable +ffffffff81a47da0 t icl_aux_power_well_enable +ffffffff81a48430 t icl_aux_power_well_disable +ffffffff81a486c0 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81a486e0 t tgl_tc_cold_off_power_well_enable +ffffffff81a48700 t tgl_tc_cold_off_power_well_disable +ffffffff81a48720 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81a48750 t xelpdp_aux_power_well_enable +ffffffff81a48820 t xelpdp_aux_power_well_disable +ffffffff81a488f0 t xelpdp_aux_power_well_enabled +ffffffff81a489a0 t chv_set_pipe_power_well +ffffffff81a48ba0 t vlv_display_power_well_init +ffffffff81a48f00 t vlv_set_power_well +ffffffff81a49120 t hsw_wait_for_power_well_enable +ffffffff81a49270 t hsw_wait_for_power_well_disable +ffffffff81a49540 t tgl_tc_cold_request +ffffffff81a4a000 T intel_display_reset_prepare +ffffffff81a4a1e0 T intel_display_reset_finish +ffffffff81a4b000 T intel_display_rps_boost_after_vblank +ffffffff81a4b110 t do_rps_boost +ffffffff81a4b1c0 T intel_display_rps_mark_interactive +ffffffff81a4c000 T intel_dkl_phy_init +ffffffff81a4c020 T intel_dkl_phy_read +ffffffff81a4c150 T intel_dkl_phy_write +ffffffff81a4c260 T intel_dkl_phy_rmw +ffffffff81a4c390 T intel_dkl_phy_posting_read +ffffffff81a4d000 T intel_dmc_has_payload +ffffffff81a4d050 T intel_dmc_enable_pipe +ffffffff81a4d160 T intel_dmc_disable_pipe +ffffffff81a4d270 T intel_dmc_load_program +ffffffff81a4daa0 t pipedmc_clock_gating_wa +ffffffff81a4dc90 T intel_dmc_disable_program +ffffffff81a4dec0 T assert_dmc_loaded +ffffffff81a4e040 T intel_dmc_init +ffffffff81a4e300 t dmc_load_work_fn +ffffffff81a4ec10 T intel_dmc_suspend +ffffffff81a4eca0 T intel_dmc_resume +ffffffff81a4ed40 T intel_dmc_fini +ffffffff81a4ee90 T intel_dmc_print_error_state +ffffffff81a4ef90 T intel_dmc_debugfs_register +ffffffff81a4f000 T intel_dp_is_edp +ffffffff81a4f030 T intel_dp_is_uhbr +ffffffff81a4f070 T intel_dp_max_lane_count +ffffffff81a4f0e0 T intel_dp_link_required +ffffffff81a4f120 T intel_dp_max_data_rate +ffffffff81a4f180 T intel_dp_can_bigjoiner +ffffffff81a4f1d0 T intel_dp_get_link_train_fallback_values +ffffffff81a4f580 T intel_dp_mode_to_fec_clock +ffffffff81a4f5d0 T intel_dp_dsc_nearest_valid_bpp +ffffffff81a4f6d0 T intel_dp_dsc_get_output_bpp +ffffffff81a4f7f0 T intel_dp_dsc_get_slice_count +ffffffff81a4f980 T intel_dp_min_bpp +ffffffff81a4f9c0 T intel_dp_need_bigjoiner +ffffffff81a4fa20 T intel_dp_source_supports_tps3 +ffffffff81a4fa70 T intel_dp_source_supports_tps4 +ffffffff81a4fab0 T intel_dp_max_link_rate +ffffffff81a4fb60 T intel_dp_rate_select +ffffffff81a4fc00 T intel_dp_compute_rate +ffffffff81a4fcd0 T intel_dp_has_hdmi_sink +ffffffff81a4fd10 T intel_dp_adjust_compliance_config +ffffffff81a4fe50 T intel_dp_dsc_compute_bpp +ffffffff81a4ff00 T intel_dp_dsc_compute_config +ffffffff81a505d0 T intel_dp_limited_color_range +ffffffff81a50640 T intel_dp_compute_psr_vsc_sdp +ffffffff81a506c0 T intel_dp_needs_vsc_sdp +ffffffff81a50710 t intel_dp_compute_vsc_colorimetry +ffffffff81a50890 T intel_dp_compute_config +ffffffff81a50ce0 t intel_dp_compute_output_format +ffffffff81a50f10 t intel_dp_audio_compute_config +ffffffff81a50ff0 t intel_dp_drrs_compute_config +ffffffff81a51190 t intel_dp_compute_vsc_sdp +ffffffff81a51230 t intel_dp_compute_hdr_metadata_infoframe_sdp +ffffffff81a512c0 T intel_dp_set_link_params +ffffffff81a51300 T intel_edp_backlight_on +ffffffff81a513a0 T intel_edp_backlight_off +ffffffff81a51430 T intel_dp_sink_set_decompression_state +ffffffff81a514d0 T intel_dp_wait_source_oui +ffffffff81a515c0 T intel_dp_set_power +ffffffff81a517e0 T intel_dp_sync_state +ffffffff81a51860 t intel_dp_get_dpcd +ffffffff81a519c0 t intel_dp_reset_max_link_params +ffffffff81a51ac0 T intel_dp_initial_fastset_check +ffffffff81a51bf0 T intel_dp_check_frl_training +ffffffff81a521a0 T intel_dp_pcon_dsc_configure +ffffffff81a52390 T intel_dp_configure_protocol_converter +ffffffff81a52570 T intel_dp_get_colorimetry_status +ffffffff81a525d0 T intel_edp_fixup_vbt_bpp +ffffffff81a52660 T intel_write_dp_vsc_sdp +ffffffff81a52800 T intel_dp_set_infoframes +ffffffff81a52920 t intel_write_dp_sdp +ffffffff81a52c00 T intel_read_dp_sdp +ffffffff81a52f20 T intel_dp_get_active_pipes +ffffffff81a53140 T intel_dp_retrain_link +ffffffff81a533f0 t intel_dp_needs_link_retrain +ffffffff81a53570 T intel_dp_phy_test +ffffffff81a53c20 T intel_digital_port_connected +ffffffff81a53cd0 T intel_dp_encoder_flush_work +ffffffff81a53d30 T intel_dp_encoder_suspend +ffffffff81a53d70 T intel_dp_encoder_shutdown +ffffffff81a53db0 T intel_dp_hpd_pulse +ffffffff81a54420 T intel_dp_is_port_edp +ffffffff81a544b0 T intel_dp_init_connector +ffffffff81a55610 t intel_dp_modeset_retry_work_fn +ffffffff81a556b0 t intel_dp_set_common_rates +ffffffff81a55830 T intel_dp_mst_suspend +ffffffff81a558d0 T intel_dp_mst_resume +ffffffff81a55980 t intel_dp_output_format +ffffffff81a55ac0 t intel_dp_compute_link_config +ffffffff81a56280 t intel_dp_tmds_clock_valid +ffffffff81a56320 t intel_dp_set_sink_rates +ffffffff81a56550 t intel_dp_check_device_service_irq +ffffffff81a56b20 t intel_dp_force +ffffffff81a56c50 t intel_dp_connector_register +ffffffff81a56d20 t intel_dp_connector_unregister +ffffffff81a56d80 t intel_dp_oob_hotplug_event +ffffffff81a56e00 t intel_dp_set_edid +ffffffff81a57200 t intel_dp_get_modes +ffffffff81a572f0 t intel_dp_detect +ffffffff81a57bb0 t intel_dp_mode_valid +ffffffff81a57f30 t intel_dp_connector_atomic_check +ffffffff81a582a0 t intel_dp_get_dsc_sink_cap +ffffffff81a58410 t intel_dp_mode_min_output_bpp +ffffffff81a58470 t intel_dp_mode_valid_downstream +ffffffff81a58630 t icl_max_source_rate +ffffffff81a59000 T intel_dp_aux_pack +ffffffff81a59070 T intel_dp_aux_fini +ffffffff81a59090 T intel_dp_aux_init +ffffffff81a592a0 t xelpdp_aux_ctl_reg +ffffffff81a59370 t xelpdp_aux_data_reg +ffffffff81a59440 t tgl_aux_ctl_reg +ffffffff81a594c0 t tgl_aux_data_reg +ffffffff81a59550 t skl_aux_ctl_reg +ffffffff81a595d0 t skl_aux_data_reg +ffffffff81a59660 t ilk_aux_ctl_reg +ffffffff81a596e0 t ilk_aux_data_reg +ffffffff81a59770 t g4x_aux_ctl_reg +ffffffff81a597f0 t g4x_aux_data_reg +ffffffff81a59890 t skl_get_aux_clock_divider +ffffffff81a598c0 t hsw_get_aux_clock_divider +ffffffff81a59950 t ilk_get_aux_clock_divider +ffffffff81a599b0 t g4x_get_aux_clock_divider +ffffffff81a59a00 t skl_get_aux_send_ctl +ffffffff81a59a80 t g4x_get_aux_send_ctl +ffffffff81a59ae0 t kasprintf +ffffffff81a59bb0 t intel_dp_aux_transfer +ffffffff81a59e40 T intel_dp_aux_ch +ffffffff81a59fa0 T intel_dp_aux_irq_handler +ffffffff81a5a040 t intel_dp_aux_xfer +ffffffff81a5b000 T intel_dp_aux_init_backlight_funcs +ffffffff81a5b260 t intel_dp_aux_hdr_setup_backlight +ffffffff81a5b3e0 t intel_dp_aux_hdr_get_backlight +ffffffff81a5b560 t intel_dp_aux_hdr_set_backlight +ffffffff81a5b660 t intel_dp_aux_hdr_disable_backlight +ffffffff81a5b6e0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a5b910 t intel_dp_aux_vesa_setup_backlight +ffffffff81a5bb70 t intel_dp_aux_vesa_get_backlight +ffffffff81a5bba0 t intel_dp_aux_vesa_set_backlight +ffffffff81a5bc40 t intel_dp_aux_vesa_disable_backlight +ffffffff81a5bcf0 t intel_dp_aux_vesa_enable_backlight +ffffffff81a5c000 T intel_dp_hdcp_init +ffffffff81a5c0b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a5c1a0 t intel_dp_hdcp_read_bksv +ffffffff81a5c230 t intel_dp_hdcp_read_bstatus +ffffffff81a5c2c0 t intel_dp_hdcp_repeater_present +ffffffff81a5c370 t intel_dp_hdcp_read_ri_prime +ffffffff81a5c400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a5c4a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a5c590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a5c630 t intel_dp_hdcp_toggle_signalling +ffffffff81a5c660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a5c850 t intel_dp_hdcp_check_link +ffffffff81a5c8e0 t intel_dp_hdcp_capable +ffffffff81a5c990 t intel_dp_hdcp2_capable +ffffffff81a5ca10 t intel_dp_hdcp2_write_msg +ffffffff81a5cbc0 t intel_dp_hdcp2_read_msg +ffffffff81a5d290 t intel_dp_hdcp2_config_stream_type +ffffffff81a5d2f0 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a5d550 t intel_dp_mst_hdcp2_check_link +ffffffff81a5d610 t intel_dp_hdcp2_check_link +ffffffff81a5e000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a5e0d0 t intel_dp_init_lttpr +ffffffff81a5e3b0 T intel_dp_get_adjust_train +ffffffff81a5eab0 T intel_dp_program_link_training_pattern +ffffffff81a5ebd0 T intel_dp_set_signal_levels +ffffffff81a5ef70 T intel_dp_dump_link_status +ffffffff81a5f060 T intel_dp_stop_link_train +ffffffff81a5f310 T intel_dp_start_link_train +ffffffff81a610a0 T intel_dp_128b132b_sdp_crc16 +ffffffff81a61170 t intel_dp_link_train_phy +ffffffff81a63000 T intel_dp_mst_encoder_active_links +ffffffff81a63030 T intel_dp_mst_encoder_init +ffffffff81a63270 T intel_dp_mst_source_support +ffffffff81a632b0 T intel_dp_mst_encoder_cleanup +ffffffff81a63310 T intel_dp_mst_is_master_trans +ffffffff81a63350 T intel_dp_mst_is_slave_trans +ffffffff81a63390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a63450 t intel_dp_add_mst_connector +ffffffff81a63680 t intel_dp_mst_poll_hpd_irq +ffffffff81a636a0 t intel_dp_mst_get_hw_state +ffffffff81a63700 t intel_dp_mst_connector_late_register +ffffffff81a63770 t intel_dp_mst_connector_early_unregister +ffffffff81a637a0 t intel_dp_mst_get_modes +ffffffff81a63840 t intel_dp_mst_detect +ffffffff81a63940 t intel_dp_mst_mode_valid_ctx +ffffffff81a63b60 t intel_mst_atomic_best_encoder +ffffffff81a63bc0 t intel_dp_mst_atomic_check +ffffffff81a63d30 t intel_dp_mst_compute_config +ffffffff81a64280 t intel_dp_mst_compute_config_late +ffffffff81a64380 t intel_mst_disable_dp +ffffffff81a64460 t intel_mst_post_disable_dp +ffffffff81a64710 t intel_mst_post_pll_disable_dp +ffffffff81a64770 t intel_mst_pre_pll_enable_dp +ffffffff81a647b0 t intel_mst_pre_enable_dp +ffffffff81a649d0 t intel_mst_enable_dp +ffffffff81a64d70 t intel_dp_mst_enc_get_hw_state +ffffffff81a64db0 t intel_dp_mst_enc_get_config +ffffffff81a64dd0 t intel_dp_mst_initial_fastset_check +ffffffff81a64df0 t intel_dp_mst_encoder_destroy +ffffffff81a64e20 t intel_dp_mst_find_vcpi_slots_for_bpp +ffffffff81a66000 T bxt_port_to_phy_channel +ffffffff81a66110 T bxt_ddi_phy_set_signal_levels +ffffffff81a664e0 T bxt_ddi_phy_is_enabled +ffffffff81a66610 T bxt_ddi_phy_uninit +ffffffff81a666f0 T bxt_ddi_phy_init +ffffffff81a66910 t _bxt_ddi_phy_init +ffffffff81a66e50 T bxt_ddi_phy_verify_state +ffffffff81a67130 t __phy_reg_verify_state +ffffffff81a67230 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a672a0 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a67500 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a676e0 T vlv_dig_port_to_channel +ffffffff81a67750 T vlv_dig_port_to_phy +ffffffff81a677c0 T vlv_pipe_to_channel +ffffffff81a67820 T chv_set_phy_signal_level +ffffffff81a67b70 T chv_data_lane_soft_reset +ffffffff81a67d40 T chv_phy_pre_pll_enable +ffffffff81a67fe0 T chv_phy_pre_encoder_enable +ffffffff81a68240 T chv_phy_release_cl2_override +ffffffff81a682d0 T chv_phy_post_pll_disable +ffffffff81a68380 T vlv_set_phy_signal_level +ffffffff81a684f0 T vlv_phy_pre_pll_enable +ffffffff81a685f0 T vlv_phy_pre_encoder_enable +ffffffff81a686f0 T vlv_phy_reset_lanes +ffffffff81a69000 T pnv_calc_dpll_params +ffffffff81a690c0 T i9xx_calc_dpll_params +ffffffff81a69190 T vlv_calc_dpll_params +ffffffff81a69250 T chv_calc_dpll_params +ffffffff81a69320 T bxt_find_best_dpll +ffffffff81a69340 t chv_find_best_dpll +ffffffff81a69680 T i9xx_dpll_compute_fp +ffffffff81a696c0 T vlv_compute_dpll +ffffffff81a69740 T chv_compute_dpll +ffffffff81a697c0 T intel_dpll_crtc_compute_clock +ffffffff81a698c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a69a10 T intel_dpll_init_clock_hook +ffffffff81a69b20 T i9xx_enable_pll +ffffffff81a69ef0 T vlv_enable_pll +ffffffff81a6a410 T chv_enable_pll +ffffffff81a6a9e0 T vlv_force_pll_on +ffffffff81a6ab30 T vlv_disable_pll +ffffffff81a6ac00 T chv_disable_pll +ffffffff81a6ad30 T i9xx_disable_pll +ffffffff81a6ae50 T vlv_force_pll_off +ffffffff81a6af50 T assert_pll_enabled +ffffffff81a6b050 T assert_pll_disabled +ffffffff81a6b150 t intel_pll_is_valid +ffffffff81a6b210 t mtl_crtc_compute_clock +ffffffff81a6b2d0 t dg2_crtc_compute_clock +ffffffff81a6b350 t hsw_crtc_compute_clock +ffffffff81a6b410 t hsw_crtc_get_shared_dpll +ffffffff81a6b4b0 t ilk_crtc_compute_clock +ffffffff81a6b7b0 t ilk_crtc_get_shared_dpll +ffffffff81a6b800 t g4x_find_best_dpll +ffffffff81a6bb40 t chv_crtc_compute_clock +ffffffff81a6bc50 t vlv_crtc_compute_clock +ffffffff81a6c0f0 t g4x_crtc_compute_clock +ffffffff81a6c250 t i9xx_compute_dpll +ffffffff81a6c4d0 t pnv_crtc_compute_clock +ffffffff81a6c8b0 t i9xx_crtc_compute_clock +ffffffff81a6c9d0 t i9xx_find_best_dpll +ffffffff81a6cd10 t i8xx_crtc_compute_clock +ffffffff81a6d000 T intel_get_shared_dpll_by_id +ffffffff81a6d040 T assert_shared_dpll +ffffffff81a6d1f0 T intel_dpll_get_hw_state +ffffffff81a6d220 T icl_tc_port_to_pll_id +ffffffff81a6d250 T intel_enable_shared_dpll +ffffffff81a6d5b0 T intel_disable_shared_dpll +ffffffff81a6d840 T intel_unreference_shared_dpll_crtc +ffffffff81a6d940 T intel_shared_dpll_swap_state +ffffffff81a6da20 T icl_set_active_port_dpll +ffffffff81a6da60 T intel_shared_dpll_init +ffffffff81a6dc60 T intel_compute_shared_dplls +ffffffff81a6dcf0 T intel_reserve_shared_dplls +ffffffff81a6dd80 T intel_release_shared_dplls +ffffffff81a6ddc0 T intel_update_active_dpll +ffffffff81a6de20 T intel_dpll_get_freq +ffffffff81a6deb0 T intel_dpll_update_ref_clks +ffffffff81a6df00 T intel_dpll_readout_hw_state +ffffffff81a6e130 T intel_dpll_sanitize_state +ffffffff81a6e210 T intel_dpll_dump_hw_state +ffffffff81a6e290 T intel_shared_dpll_state_verify +ffffffff81a6e470 t verify_single_dpll_state +ffffffff81a6e9e0 T intel_shared_dpll_verify_disabled +ffffffff81a6ea60 t icl_compute_dplls +ffffffff81a6f6a0 t icl_get_dplls +ffffffff81a6f970 t icl_put_dplls +ffffffff81a6fa30 t icl_update_active_dpll +ffffffff81a6fae0 t icl_update_dpll_ref_clks +ffffffff81a6fb20 t icl_dump_hw_state +ffffffff81a6fbe0 t combo_pll_enable +ffffffff81a6fdf0 t combo_pll_disable +ffffffff81a6fec0 t combo_pll_get_hw_state +ffffffff81a6ff40 t icl_ddi_combo_pll_get_freq +ffffffff81a70110 t icl_dpll_write +ffffffff81a70350 t adlp_cmtg_clock_gating_wa +ffffffff81a704b0 t icl_pll_disable +ffffffff81a70650 t icl_pll_get_hw_state +ffffffff81a70930 t tbt_pll_enable +ffffffff81a70ae0 t tbt_pll_disable +ffffffff81a70b00 t tbt_pll_get_hw_state +ffffffff81a70b20 t icl_ddi_tbt_pll_get_freq +ffffffff81a70b90 t mg_pll_enable +ffffffff81a711a0 t mg_pll_disable +ffffffff81a711e0 t dkl_pll_get_hw_state +ffffffff81a713f0 t icl_ddi_mg_pll_get_freq +ffffffff81a714d0 t icl_calc_dpll_state +ffffffff81a71610 t intel_find_shared_dpll +ffffffff81a71930 t intel_reference_shared_dpll +ffffffff81a71b50 t intel_unreference_shared_dpll +ffffffff81a71d50 t mg_pll_get_hw_state +ffffffff81a71fa0 t bxt_compute_dpll +ffffffff81a722a0 t bxt_get_dpll +ffffffff81a72370 t intel_put_dpll +ffffffff81a723d0 t bxt_update_dpll_ref_clks +ffffffff81a72410 t bxt_dump_hw_state +ffffffff81a724c0 t bxt_ddi_pll_enable +ffffffff81a72e90 t bxt_ddi_pll_disable +ffffffff81a730a0 t bxt_ddi_pll_get_hw_state +ffffffff81a734d0 t bxt_ddi_pll_get_freq +ffffffff81a73560 t bxt_ddi_set_dpll_hw_state +ffffffff81a73750 t skl_compute_dpll +ffffffff81a73eb0 t skl_get_dpll +ffffffff81a73f60 t skl_update_dpll_ref_clks +ffffffff81a73fa0 t skl_dump_hw_state +ffffffff81a74000 t skl_ddi_dpll0_enable +ffffffff81a740c0 t skl_ddi_dpll0_disable +ffffffff81a740f0 t skl_ddi_dpll0_get_hw_state +ffffffff81a741f0 t skl_ddi_pll_get_freq +ffffffff81a74280 t skl_ddi_wrpll_get_freq +ffffffff81a743e0 t skl_ddi_pll_enable +ffffffff81a74600 t skl_ddi_pll_disable +ffffffff81a74690 t skl_ddi_pll_get_hw_state +ffffffff81a747b0 t hsw_compute_dpll +ffffffff81a74fd0 t hsw_get_dpll +ffffffff81a75120 t hsw_update_dpll_ref_clks +ffffffff81a75190 t hsw_dump_hw_state +ffffffff81a751c0 t hsw_ddi_wrpll_enable +ffffffff81a75240 t hsw_ddi_wrpll_disable +ffffffff81a75320 t hsw_ddi_wrpll_get_hw_state +ffffffff81a753c0 t hsw_ddi_wrpll_get_freq +ffffffff81a754b0 t hsw_ddi_spll_enable +ffffffff81a75510 t hsw_ddi_spll_disable +ffffffff81a755e0 t hsw_ddi_spll_get_hw_state +ffffffff81a75670 t hsw_ddi_spll_get_freq +ffffffff81a75710 t hsw_ddi_lcpll_enable +ffffffff81a75740 t hsw_ddi_lcpll_disable +ffffffff81a75770 t hsw_ddi_lcpll_get_hw_state +ffffffff81a757a0 t hsw_ddi_lcpll_get_freq +ffffffff81a75820 t ibx_compute_dpll +ffffffff81a75850 t ibx_get_dpll +ffffffff81a75950 t ibx_dump_hw_state +ffffffff81a759b0 t ibx_pch_dpll_enable +ffffffff81a75b50 t ibx_pch_dpll_disable +ffffffff81a75bd0 t ibx_pch_dpll_get_hw_state +ffffffff81a76000 T intel_dpt_pin +ffffffff81a761e0 T intel_dpt_unpin +ffffffff81a76250 T intel_dpt_resume +ffffffff81a76320 T intel_dpt_suspend +ffffffff81a763f0 T intel_dpt_create +ffffffff81a767e0 t dpt_insert_page +ffffffff81a76850 t dpt_clear_range +ffffffff81a76880 t dpt_insert_entries +ffffffff81a76970 t dpt_cleanup +ffffffff81a769c0 t dpt_bind_vma +ffffffff81a76a50 t dpt_unbind_vma +ffffffff81a76a80 T intel_dpt_destroy +ffffffff81a76ad0 T intel_dpt_configure +ffffffff81a76c70 t __ww_mutex_lock +ffffffff81a77000 T intel_drrs_type_str +ffffffff81a77040 T intel_drrs_is_active +ffffffff81a77070 T intel_drrs_activate +ffffffff81a77260 T intel_drrs_deactivate +ffffffff81a77420 T intel_drrs_invalidate +ffffffff81a77440 t intel_drrs_frontbuffer_update +ffffffff81a77690 T intel_drrs_flush +ffffffff81a776b0 T intel_drrs_crtc_init +ffffffff81a77750 t intel_drrs_downclock_work +ffffffff81a77870 T intel_drrs_crtc_debugfs_add +ffffffff81a778a0 T intel_drrs_connector_debugfs_add +ffffffff81a778b0 t __delayed_work_tick +ffffffff81a78000 T intel_dsb_reg_write +ffffffff81a78140 T intel_dsb_finish +ffffffff81a781c0 T intel_dsb_commit +ffffffff81a78370 T intel_dsb_wait +ffffffff81a78560 T intel_dsb_prepare +ffffffff81a786e0 T intel_dsb_cleanup +ffffffff81a79000 T intel_dsi_wait_panel_power_cycle +ffffffff81a790f0 T intel_dsi_shutdown +ffffffff81a791e0 T intel_dsi_bitrate +ffffffff81a79270 T intel_dsi_tlpx_ns +ffffffff81a792c0 T intel_dsi_get_modes +ffffffff81a792d0 T intel_dsi_mode_valid +ffffffff81a79390 T intel_dsi_host_init +ffffffff81a79440 T intel_dsi_get_panel_orientation +ffffffff81a7a000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a7a0a0 t dcs_setup_backlight +ffffffff81a7a120 t dcs_get_backlight +ffffffff81a7a210 t dcs_set_backlight +ffffffff81a7a300 t dcs_disable_backlight +ffffffff81a7a660 t dcs_enable_backlight +ffffffff81a7b000 T intel_dsi_vbt_exec_sequence +ffffffff81a7b020 T intel_dsi_log_params +ffffffff81a7b3a0 T intel_dsi_vbt_init +ffffffff81a7b840 T intel_dsi_vbt_gpio_init +ffffffff81a7b860 T intel_dsi_vbt_gpio_cleanup +ffffffff81a7c000 T intel_dvo_init +ffffffff81a7c650 t intel_disable_dvo +ffffffff81a7c6f0 t intel_enable_dvo +ffffffff81a7c7c0 t intel_dvo_get_hw_state +ffffffff81a7c830 t intel_dvo_get_config +ffffffff81a7c8d0 t intel_dvo_compute_config +ffffffff81a7c960 t intel_dvo_pre_enable +ffffffff81a7ca60 t intel_dvo_connector_get_hw_state +ffffffff81a7caf0 t intel_dvo_enc_destroy +ffffffff81a7cb30 t intel_dvo_detect +ffffffff81a7cc30 t intel_dvo_get_modes +ffffffff81a7cca0 t intel_dvo_mode_valid +ffffffff81a7d000 T intel_fb_get_format_info +ffffffff81a7d2b0 T intel_fb_is_tiled_modifier +ffffffff81a7d2f0 t lookup_modifier +ffffffff81a7d530 T intel_fb_is_ccs_modifier +ffffffff81a7d570 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a7d5b0 T intel_fb_is_mc_ccs_modifier +ffffffff81a7d5f0 T intel_fb_plane_get_modifiers +ffffffff81a7d7d0 T intel_fb_plane_supports_modifier +ffffffff81a7d850 T intel_format_info_is_yuv_semiplanar +ffffffff81a7d8d0 T intel_fb_is_ccs_aux_plane +ffffffff81a7d980 T intel_fb_rc_ccs_cc_plane +ffffffff81a7da50 T is_surface_linear +ffffffff81a7dbb0 T main_to_ccs_plane +ffffffff81a7dc60 T skl_ccs_to_main_plane +ffffffff81a7dda0 T skl_main_to_aux_plane +ffffffff81a7dec0 T intel_tile_size +ffffffff81a7df00 T intel_tile_width_bytes +ffffffff81a7e320 T intel_tile_height +ffffffff81a7e380 T intel_tile_row_size +ffffffff81a7e400 T intel_fb_align_height +ffffffff81a7e480 T intel_fb_modifier_uses_dpt +ffffffff81a7e4c0 T intel_fb_uses_dpt +ffffffff81a7e520 T intel_cursor_alignment +ffffffff81a7e580 T intel_surf_alignment +ffffffff81a7e810 T intel_fb_plane_get_subsampling +ffffffff81a7e960 T intel_plane_adjust_aligned_offset +ffffffff81a7e9d0 t intel_adjust_aligned_offset +ffffffff81a7eb80 T intel_plane_compute_aligned_offset +ffffffff81a7ec80 t intel_compute_aligned_offset +ffffffff81a7ee40 T intel_fb_needs_pot_stride_remap +ffffffff81a7eeb0 T intel_fb_supports_90_270_rotation +ffffffff81a7ef10 T intel_fill_fb_info +ffffffff81a7fa10 t calc_plane_remap_info +ffffffff81a803c0 T intel_fb_fill_view +ffffffff81a80430 T intel_plane_compute_gtt +ffffffff81a80910 t intel_plane_check_stride +ffffffff81a80a70 T intel_framebuffer_init +ffffffff81a812d0 t gen12_ccs_aux_stride +ffffffff81a81330 T intel_user_framebuffer_create +ffffffff81a81490 T intel_framebuffer_create +ffffffff81a81520 t intel_adjust_tile_offset +ffffffff81a81660 t intel_user_framebuffer_destroy +ffffffff81a816d0 t intel_user_framebuffer_create_handle +ffffffff81a81700 t intel_user_framebuffer_dirty +ffffffff81a82000 T intel_pin_and_fence_fb_obj +ffffffff81a82330 t i915_gem_object_lock +ffffffff81a82540 T intel_unpin_fb_vma +ffffffff81a825b0 T intel_plane_pin_fb +ffffffff81a828e0 T intel_plane_unpin_fb +ffffffff81a83000 T intel_fbc_cleanup +ffffffff81a831c0 T intel_fbc_pre_update +ffffffff81a83850 T intel_fbc_post_update +ffffffff81a83a00 T intel_fbc_invalidate +ffffffff81a83b80 T intel_fbc_flush +ffffffff81a83e20 T intel_fbc_atomic_check +ffffffff81a843e0 T intel_fbc_disable +ffffffff81a844a0 t __intel_fbc_disable +ffffffff81a845e0 T intel_fbc_update +ffffffff81a84ca0 T intel_fbc_reset_underrun +ffffffff81a84e00 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a84ec0 T intel_fbc_add_plane +ffffffff81a84ef0 T intel_fbc_init +ffffffff81a85170 T intel_fbc_sanitize +ffffffff81a85240 T intel_fbc_crtc_debugfs_add +ffffffff81a85270 T intel_fbc_debugfs_register +ffffffff81a852a0 t intel_fbc_is_ok +ffffffff81a85410 t intel_fbc_update_state +ffffffff81a85790 t intel_fbc_underrun_work_fn +ffffffff81a85860 t ivb_fbc_activate +ffffffff81a85ab0 t ilk_fbc_deactivate +ffffffff81a85b60 t ilk_fbc_is_active +ffffffff81a85bc0 t ivb_fbc_is_compressing +ffffffff81a85c30 t snb_fbc_nuke +ffffffff81a85cb0 t ilk_fbc_program_cfb +ffffffff81a85d10 t ivb_fbc_set_false_color +ffffffff81a85d90 t snb_fbc_activate +ffffffff81a85e20 t ilk_fbc_is_compressing +ffffffff81a85e90 t ilk_fbc_activate +ffffffff81a85fc0 t i965_fbc_nuke +ffffffff81a86060 t g4x_fbc_activate +ffffffff81a86170 t g4x_fbc_deactivate +ffffffff81a86200 t g4x_fbc_is_active +ffffffff81a86260 t g4x_fbc_is_compressing +ffffffff81a862c0 t g4x_fbc_program_cfb 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+ffffffff81a88440 T assert_fdi_rx_pll_enabled +ffffffff81a88530 T assert_fdi_rx_pll_disabled +ffffffff81a88620 T intel_fdi_link_train +ffffffff81a88640 T intel_fdi_pll_freq_update +ffffffff81a886f0 T intel_fdi_link_freq +ffffffff81a88740 T ilk_fdi_compute_config +ffffffff81a88a80 T intel_fdi_normal_train +ffffffff81a88c10 T hsw_fdi_link_train +ffffffff81a890f0 T hsw_fdi_disable +ffffffff81a89250 T ilk_fdi_pll_enable +ffffffff81a89440 T ilk_fdi_pll_disable +ffffffff81a89570 T ilk_fdi_disable +ffffffff81a897c0 T intel_fdi_init_hook +ffffffff81a89820 t ilk_fdi_link_train +ffffffff81a89e80 t gen6_fdi_link_train +ffffffff81a8a6c0 t ivb_manual_fdi_link_train +ffffffff81a8af40 t cpt_set_fdi_bc_bifurcation +ffffffff81a8c000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81a8c3c0 T intel_set_pch_fifo_underrun_reporting +ffffffff81a8c5f0 T intel_cpu_fifo_underrun_irq_handler +ffffffff81a8c7e0 T intel_pch_fifo_underrun_irq_handler +ffffffff81a8c860 T intel_check_cpu_fifo_underruns +ffffffff81a8ca70 T intel_check_pch_fifo_underruns +ffffffff81a8cba0 T intel_init_fifo_underrun_reporting +ffffffff81a8d000 T intel_frontbuffer_flip_prepare +ffffffff81a8d050 T intel_frontbuffer_flip_complete +ffffffff81a8d130 T intel_frontbuffer_flip +ffffffff81a8d200 T __intel_fb_invalidate +ffffffff81a8d290 T __intel_fb_flush +ffffffff81a8d380 T intel_frontbuffer_get +ffffffff81a8d4c0 t frontbuffer_active +ffffffff81a8d4f0 t frontbuffer_retire +ffffffff81a8d530 T intel_frontbuffer_put +ffffffff81a8d660 T intel_frontbuffer_track +ffffffff81a8e000 T intel_atomic_global_obj_init +ffffffff81a8e070 T intel_atomic_global_obj_cleanup +ffffffff81a8e160 T intel_atomic_get_global_obj_state +ffffffff81a8e3b0 T intel_atomic_get_old_global_obj_state +ffffffff81a8e410 T intel_atomic_get_new_global_obj_state +ffffffff81a8e470 T intel_atomic_swap_global_state +ffffffff81a8e5b0 T intel_atomic_clear_global_state +ffffffff81a8e6d0 T intel_atomic_lock_global_state +ffffffff81a8e760 T intel_atomic_serialize_global_state +ffffffff81a8e7f0 T intel_atomic_global_state_is_serialized +ffffffff81a8f000 T intel_gmbus_is_valid_pin +ffffffff81a8f100 T intel_gmbus_reset +ffffffff81a8f160 T intel_bb_set_bits +ffffffff81a8f2a0 T intel_bb_set_dir +ffffffff81a8f2d0 T intel_bb_read_bits +ffffffff81a8f460 T intel_acquire_bus +ffffffff81a8f660 T intel_release_bus +ffffffff81a8f800 T intel_send_start +ffffffff81a8f820 T intel_send_stop +ffffffff81a8f840 T intel_initiate_xfer +ffffffff81a8f860 T intel_read_byte +ffffffff81a8f880 T intel_write_byte +ffffffff81a8f8a0 T intel_gmbus_output_aksv +ffffffff81a8f970 t do_gmbus_xfer +ffffffff81a8ff70 T intel_gmbus_setup +ffffffff81a902f0 T intel_gmbus_teardown +ffffffff81a90370 T intel_gmbus_get_adapter +ffffffff81a903f0 T intel_gmbus_force_bit +ffffffff81a90490 T intel_gmbus_is_forced_bit +ffffffff81a904c0 T intel_gmbus_irq_handler +ffffffff81a90560 t gmbus_xfer_read +ffffffff81a90850 t gmbus_xfer_write +ffffffff81a90a90 t gmbus_wait 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+ffffffff81a95f60 t hdcp2_authenticate_repeater_topology +ffffffff81a96220 t transcoder_name +ffffffff81a96260 t intel_hdcp_get_repeater_ctl +ffffffff81a96330 t ktime_get_raw +ffffffff81a963b0 t wait_remaining_ms_from_jiffies +ffffffff81a96440 t intel_hdcp_auth_downstream +ffffffff81a97610 t intel_write_sha_text +ffffffff81a98000 T intel_hdcp_gsc_cs_required +ffffffff81a98040 T intel_hdcp_gsc_init +ffffffff81a984b0 T intel_hdcp_gsc_fini +ffffffff81a98510 T intel_hdcp_gsc_msg_send +ffffffff81a98840 t gsc_hdcp_initiate_session +ffffffff81a98890 t gsc_hdcp_verify_receiver_cert_prepare_km +ffffffff81a988e0 t gsc_hdcp_verify_hprime +ffffffff81a98930 t gsc_hdcp_store_pairing_info +ffffffff81a98980 t gsc_hdcp_initiate_locality_check +ffffffff81a989d0 t gsc_hdcp_verify_lprime +ffffffff81a98a20 t gsc_hdcp_get_session_key +ffffffff81a98a70 t gsc_hdcp_repeater_check_flow_prepare_ack +ffffffff81a98ac0 t gsc_hdcp_verify_mprime +ffffffff81a98b10 t gsc_hdcp_enable_authentication +ffffffff81a98b60 t gsc_hdcp_close_session +ffffffff81a99000 T intel_hdmi_to_i915 +ffffffff81a99040 T hsw_write_infoframe +ffffffff81a99450 t hsw_dip_data_reg +ffffffff81a99600 T hsw_read_infoframe +ffffffff81a996c0 T intel_hdmi_infoframe_enable +ffffffff81a99760 T intel_hdmi_infoframes_enabled +ffffffff81a99880 T intel_read_infoframe +ffffffff81a99a20 T intel_hdmi_read_gcp_infoframe +ffffffff81a99b00 T intel_dp_dual_mode_set_tmds_output +ffffffff81a99bc0 T intel_hdmi_tmds_clock +ffffffff81a99c10 T intel_hdmi_bpc_possible +ffffffff81a99d30 T intel_hdmi_limited_color_range +ffffffff81a99da0 T intel_hdmi_compute_has_hdmi_sink +ffffffff81a99e10 T intel_hdmi_compute_config +ffffffff81a9a3c0 t intel_hdmi_compute_output_format +ffffffff81a9a520 t intel_hdmi_compute_hdmi_infoframe +ffffffff81a9a5e0 t intel_hdmi_compute_drm_infoframe +ffffffff81a9a6d0 T intel_hdmi_encoder_shutdown +ffffffff81a9a7a0 T intel_hdmi_handle_sink_scrambling +ffffffff81a9a890 T intel_infoframe_init +ffffffff81a9aa30 t vlv_write_infoframe +ffffffff81a9ad60 t vlv_read_infoframe +ffffffff81a9aee0 t vlv_set_infoframes +ffffffff81a9b220 t vlv_infoframes_enabled +ffffffff81a9b2b0 t g4x_write_infoframe +ffffffff81a9b550 t g4x_read_infoframe +ffffffff81a9b680 t g4x_set_infoframes +ffffffff81a9b910 t g4x_infoframes_enabled +ffffffff81a9b990 t hsw_set_infoframes +ffffffff81a9bc20 t hsw_infoframes_enabled +ffffffff81a9bcb0 t ibx_write_infoframe +ffffffff81a9bfc0 t ibx_read_infoframe +ffffffff81a9c130 t ibx_set_infoframes +ffffffff81a9c460 t ibx_infoframes_enabled +ffffffff81a9c4f0 t cpt_write_infoframe +ffffffff81a9c7f0 t cpt_read_infoframe +ffffffff81a9c960 t cpt_set_infoframes +ffffffff81a9cc40 t cpt_infoframes_enabled +ffffffff81a9ccb0 T intel_hdmi_init_connector +ffffffff81a9d430 T intel_hdmi_dsc_get_slice_height +ffffffff81a9d490 T intel_hdmi_dsc_get_num_slices +ffffffff81a9d610 T intel_hdmi_dsc_get_bpp +ffffffff81a9d6f0 t intel_hdmi_compute_clock +ffffffff81a9d950 t hdmi_port_clock_valid +ffffffff81a9db70 t intel_write_infoframe +ffffffff81a9dd40 t intel_hdmi_detect +ffffffff81a9dee0 t intel_hdmi_force +ffffffff81a9df80 t intel_hdmi_connector_register +ffffffff81a9df90 t intel_hdmi_connector_unregister +ffffffff81a9dfa0 t intel_hdmi_set_edid +ffffffff81a9e230 t intel_hdmi_get_modes +ffffffff81a9e240 t intel_hdmi_mode_valid +ffffffff81a9e3f0 t intel_hdmi_connector_atomic_check +ffffffff81a9e420 t intel_hdmi_mode_clock_valid +ffffffff81a9e5c0 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a9e700 t intel_hdmi_hdcp_read_bksv +ffffffff81a9e7d0 t intel_hdmi_hdcp_read_bstatus +ffffffff81a9e8a0 t intel_hdmi_hdcp_repeater_present +ffffffff81a9e980 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a9ea50 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a9eb30 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a9ec00 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a9ecf0 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a9ef60 t intel_hdmi_hdcp_check_link +ffffffff81a9f280 t intel_hdmi_hdcp2_capable +ffffffff81a9f340 t intel_hdmi_hdcp2_write_msg +ffffffff81a9f430 t intel_hdmi_hdcp2_read_msg +ffffffff81a9f830 t intel_hdmi_hdcp2_check_link +ffffffff81aa0000 T intel_hpd_pin_default +ffffffff81aa0030 T intel_encoder_hotplug +ffffffff81aa0160 T intel_hpd_trigger_irq +ffffffff81aa01d0 T intel_hpd_irq_handler +ffffffff81aa05f0 T intel_hpd_init +ffffffff81aa0700 T intel_hpd_poll_enable +ffffffff81aa0780 T intel_hpd_poll_disable +ffffffff81aa07e0 T intel_hpd_init_early +ffffffff81aa08f0 t i915_hotplug_work_func +ffffffff81aa0cd0 t i915_digport_work_func +ffffffff81aa0e50 t i915_hpd_poll_init_work +ffffffff81aa0f50 t intel_hpd_irq_storm_reenable_work +ffffffff81aa1270 T intel_hpd_cancel_work +ffffffff81aa1390 T intel_hpd_disable +ffffffff81aa1420 T intel_hpd_enable +ffffffff81aa1490 T intel_hpd_debugfs_register +ffffffff81aa14c0 t __delayed_work_tick +ffffffff81aa2000 T i915_hotplug_interrupt_update_locked +ffffffff81aa20c0 T i915_hotplug_interrupt_update +ffffffff81aa2190 T i9xx_hpd_irq_ack +ffffffff81aa22d0 T i9xx_hpd_irq_handler +ffffffff81aa2480 T ibx_hpd_irq_handler +ffffffff81aa2620 T xelpdp_pica_irq_handler +ffffffff81aa28e0 T icp_irq_handler +ffffffff81aa2b70 T spt_irq_handler +ffffffff81aa2e10 T ilk_hpd_irq_handler +ffffffff81aa2f30 T bxt_hpd_irq_handler +ffffffff81aa3090 T gen11_hpd_irq_handler +ffffffff81aa3300 T intel_hpd_enable_detection +ffffffff81aa3340 T intel_hpd_irq_setup +ffffffff81aa3390 T intel_hotplug_irq_init +ffffffff81aa3610 t i915_hpd_irq_setup +ffffffff81aa3720 t i915_hpd_enable_detection +ffffffff81aa37c0 t icp_hpd_irq_setup +ffffffff81aa39b0 t icp_hpd_enable_detection +ffffffff81aa3ab0 t dg1_hpd_irq_setup +ffffffff81aa3b10 t dg1_hpd_enable_detection +ffffffff81aa3c50 t xelpdp_hpd_irq_setup +ffffffff81aa4050 t xelpdp_hpd_enable_detection +ffffffff81aa41f0 t gen11_hpd_irq_setup +ffffffff81aa4440 t gen11_hpd_enable_detection +ffffffff81aa4640 t bxt_hpd_irq_setup +ffffffff81aa47c0 t bxt_hpd_enable_detection +ffffffff81aa48a0 t spt_hpd_irq_setup +ffffffff81aa4ac0 t spt_hpd_enable_detection +ffffffff81aa4be0 t ilk_hpd_irq_setup +ffffffff81aa4e50 t ilk_hpd_enable_detection +ffffffff81aa5000 T intel_hti_init +ffffffff81aa5070 T intel_hti_uses_phy +ffffffff81aa5110 T intel_hti_dpll_mask +ffffffff81aa6000 T intel_load_detect_get_pipe +ffffffff81aa6370 t intel_modeset_disable_planes +ffffffff81aa6430 T intel_load_detect_release_pipe +ffffffff81aa7000 T intel_lpe_audio_irq_handler +ffffffff81aa7020 T intel_lpe_audio_init +ffffffff81aa7050 T intel_lpe_audio_teardown +ffffffff81aa7070 T intel_lpe_audio_notify +ffffffff81aa8000 T lspcon_detect_hdr_capability +ffffffff81aa80b0 T lspcon_write_infoframe +ffffffff81aa87f0 T lspcon_read_infoframe +ffffffff81aa8830 T lspcon_set_infoframes +ffffffff81aa8a90 T lspcon_infoframes_enabled +ffffffff81aa8c60 T lspcon_wait_pcon_mode +ffffffff81aa8c80 t lspcon_wait_mode +ffffffff81aa8f40 T lspcon_init +ffffffff81aa9340 T intel_lspcon_infoframes_enabled +ffffffff81aa9370 T lspcon_resume +ffffffff81aa9610 t lspcon_change_mode +ffffffff81aaa000 T intel_lvds_port_enabled +ffffffff81aaa080 T intel_get_lvds_encoder +ffffffff81aaa0e0 T intel_is_dual_link_lvds +ffffffff81aaa140 T intel_lvds_init +ffffffff81aaa7e0 t intel_enable_lvds +ffffffff81aaa920 t intel_pre_enable_lvds +ffffffff81aaac00 t intel_lvds_compute_config +ffffffff81aaad60 t pch_disable_lvds +ffffffff81aaad80 t pch_post_disable_lvds +ffffffff81aaada0 t gmch_disable_lvds +ffffffff81aaadd0 t intel_lvds_get_hw_state +ffffffff81aaae90 t intel_lvds_get_config +ffffffff81aaafa0 t intel_lvds_shutdown +ffffffff81aab040 t compute_is_dual_link_lvds +ffffffff81aab110 t intel_no_lvds_dmi_callback +ffffffff81aab160 t intel_disable_lvds +ffffffff81aab280 t intel_lvds_get_modes +ffffffff81aab2d0 t intel_lvds_mode_valid +ffffffff81aab370 t intel_dual_link_lvds_callback +ffffffff81aac000 T _intel_modeset_lock_begin +ffffffff81aac060 T _intel_modeset_lock_loop +ffffffff81aac0a0 T _intel_modeset_lock_end +ffffffff81aad000 T intel_modeset_setup_hw_state +ffffffff81aae2d0 t intel_crtc_disable_noatomic +ffffffff81aae8b0 t intel_crtc_disable_noatomic_begin +ffffffff81aaf000 T intel_modeset_verify_crtc +ffffffff81aaf540 t verify_connector_state +ffffffff81aaf9d0 T intel_modeset_verify_disabled +ffffffff81ab0000 T intel_opregion_notify_encoder +ffffffff81ab0180 t swsci +ffffffff81ab04b0 T intel_opregion_notify_adapter +ffffffff81ab0510 T intel_opregion_asle_intr +ffffffff81ab0560 T intel_opregion_setup +ffffffff81ab0d70 t asle_work +ffffffff81ab11e0 T intel_opregion_get_panel_type +ffffffff81ab12d0 T intel_opregion_get_edid +ffffffff81ab1390 T intel_opregion_headless_sku +ffffffff81ab13e0 T intel_opregion_register +ffffffff81ab1480 T intel_opregion_resume +ffffffff81ab1520 T intel_opregion_suspend +ffffffff81ab15d0 T intel_opregion_unregister +ffffffff81ab16a0 T intel_opregion_cleanup +ffffffff81ab1790 t intel_no_opregion_vbt_callback +ffffffff81ab17f0 t intel_use_opregion_panel_type_callback +ffffffff81ab2000 T intel_overlay_reset +ffffffff81ab2050 T intel_overlay_switch_off +ffffffff81ab2250 t intel_overlay_release_old_vid +ffffffff81ab23f0 T intel_overlay_put_image_ioctl +ffffffff81ab2700 t update_pfit_vscale_ratio +ffffffff81ab27d0 t check_overlay_dst +ffffffff81ab28a0 t check_overlay_src +ffffffff81ab2af0 t intel_overlay_do_put_image +ffffffff81ab3660 T intel_overlay_attrs_ioctl +ffffffff81ab3980 t check_gamma +ffffffff81ab3b70 T intel_overlay_setup +ffffffff81ab3de0 t intel_overlay_last_flip_retire +ffffffff81ab3e20 T intel_overlay_cleanup +ffffffff81ab3ee0 T intel_overlay_capture_error_state +ffffffff81ab3fd0 T intel_overlay_print_error_state +ffffffff81ab43a0 t intel_overlay_release_old_vid_tail +ffffffff81ab4470 t intel_overlay_off_tail +ffffffff81ab4620 t intel_overlay_flip_prepare +ffffffff81ab5000 T intel_panel_use_ssc +ffffffff81ab5060 T intel_panel_preferred_fixed_mode +ffffffff81ab50b0 T intel_panel_fixed_mode +ffffffff81ab5210 T intel_panel_downclock_mode +ffffffff81ab5300 T intel_panel_highest_mode +ffffffff81ab5360 T intel_panel_get_modes +ffffffff81ab53f0 T intel_panel_drrs_type +ffffffff81ab5420 T intel_panel_compute_config +ffffffff81ab5590 T intel_panel_add_edid_fixed_modes +ffffffff81ab5ac0 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81ab5b20 t intel_panel_add_fixed_mode +ffffffff81ab5ca0 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81ab5d10 T intel_panel_add_encoder_fixed_mode +ffffffff81ab5d50 T intel_panel_fitting +ffffffff81ab63b0 T intel_panel_detect +ffffffff81ab6440 T intel_panel_mode_valid +ffffffff81ab64d0 T intel_panel_init_alloc +ffffffff81ab6520 T intel_panel_init +ffffffff81ab6640 T intel_panel_fini +ffffffff81ab7000 T intel_has_pch_trancoder +ffffffff81ab7060 T intel_crtc_pch_transcoder +ffffffff81ab70a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81ab70f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81ab7140 T ilk_pch_pre_enable +ffffffff81ab7170 T ilk_pch_enable +ffffffff81ab7750 t ilk_pch_transcoder_set_timings +ffffffff81ab79b0 T ilk_pch_disable +ffffffff81ab79d0 T ilk_pch_post_disable +ffffffff81ab7da0 T ilk_pch_get_config +ffffffff81ab7f60 T lpt_pch_enable +ffffffff81ab81d0 T lpt_pch_disable +ffffffff81ab82e0 T lpt_pch_get_config +ffffffff81ab83b0 T intel_pch_sanitize +ffffffff81ab8690 t assert_pch_dp_disabled +ffffffff81ab8810 t assert_pch_hdmi_disabled +ffffffff81ab9000 T lpt_disable_iclkip +ffffffff81ab9070 T lpt_iclkip +ffffffff81ab9100 T lpt_program_iclkip +ffffffff81ab9390 T lpt_get_iclkip +ffffffff81ab94a0 T lpt_disable_clkout_dp +ffffffff81ab9580 T intel_init_pch_refclk +ffffffff81abb000 T intel_crtc_initial_plane_config +ffffffff81abc000 T intel_pmdemand_init +ffffffff81abc120 T intel_pmdemand_init_early +ffffffff81abc1a0 T intel_pmdemand_update_phys_mask +ffffffff81abc240 T intel_pmdemand_update_port_clock +ffffffff81abc280 T intel_pmdemand_atomic_check +ffffffff81abc620 t intel_pmdemand_update_max_ddiclk +ffffffff81abc6f0 t intel_pmdemand_update_active_non_tc_phys +ffffffff81abc8f0 T intel_pmdemand_init_pmdemand_params +ffffffff81abcac0 T intel_pmdemand_program_dbuf +ffffffff81abcc50 t intel_pmdemand_wait +ffffffff81abce40 T intel_pmdemand_pre_plane_update +ffffffff81abcf30 t intel_pmdemand_program_params +ffffffff81abd370 T intel_pmdemand_post_plane_update +ffffffff81abd450 t intel_pmdemand_duplicate_state +ffffffff81abd4e0 t intel_pmdemand_destroy_state +ffffffff81abe000 T intel_pps_lock +ffffffff81abe060 T intel_pps_unlock +ffffffff81abe0c0 T intel_pps_reset_all +ffffffff81abe210 T intel_pps_check_power_unlocked +ffffffff81abe4f0 t pps_name +ffffffff81abe590 T intel_pps_wait_power_cycle +ffffffff81abe630 t wait_panel_power_cycle +ffffffff81abe810 T intel_pps_vdd_on_unlocked +ffffffff81abed80 T intel_pps_vdd_on +ffffffff81abef10 T intel_pps_vdd_off_sync +ffffffff81abefe0 t intel_pps_vdd_off_sync_unlocked +ffffffff81abf400 T intel_pps_vdd_off_unlocked +ffffffff81abf5b0 T intel_pps_on_unlocked +ffffffff81abfa40 T intel_pps_on +ffffffff81abfae0 T intel_pps_off_unlocked +ffffffff81abfec0 T intel_pps_off +ffffffff81abff60 T intel_pps_backlight_on +ffffffff81ac0150 T intel_pps_backlight_off +ffffffff81ac0340 T intel_pps_backlight_power +ffffffff81ac0530 T vlv_pps_init +ffffffff81ac0710 t vlv_detach_power_sequencer +ffffffff81ac08e0 t vlv_steal_power_sequencer +ffffffff81ac0a10 t pps_init_delays +ffffffff81ac0eb0 t pps_init_registers +ffffffff81ac1240 T intel_pps_have_panel_power_or_vdd +ffffffff81ac1390 T intel_pps_encoder_reset +ffffffff81ac1530 t vlv_initial_power_sequencer_setup +ffffffff81ac1840 t pps_vdd_init +ffffffff81ac19f0 T intel_pps_init +ffffffff81ac1e60 t edp_panel_vdd_work +ffffffff81ac1f10 T intel_pps_init_late +ffffffff81ac2150 T intel_pps_unlock_regs_wa +ffffffff81ac2260 T intel_pps_setup +ffffffff81ac22d0 T assert_pps_unlocked +ffffffff81ac2560 t intel_pps_get_registers +ffffffff81ac2d70 t wait_panel_status +ffffffff81ac3180 t intel_pps_readout_hw_state +ffffffff81ac3330 t __delayed_work_tick +ffffffff81ac4000 T intel_psr_irq_handler +ffffffff81ac4640 t transcoder_name +ffffffff81ac4680 T intel_psr_init_dpcd +ffffffff81ac4920 T intel_psr_compute_config +ffffffff81ac4b00 t intel_psr2_config_valid +ffffffff81ac4f70 T intel_psr_get_config +ffffffff81ac5110 T intel_psr_disable +ffffffff81ac5220 t intel_psr_disable_locked +ffffffff81ac55a0 T intel_psr_pause +ffffffff81ac5790 t intel_psr_exit +ffffffff81ac5a40 T intel_psr_resume +ffffffff81ac5ad0 t intel_psr_activate +ffffffff81ac61e0 T intel_psr2_disable_plane_sel_fetch_arm +ffffffff81ac6250 T intel_psr2_program_plane_sel_fetch_arm +ffffffff81ac62f0 T intel_psr2_program_plane_sel_fetch_noarm +ffffffff81ac6460 T intel_psr2_program_trans_man_trk_ctl +ffffffff81ac6550 T intel_psr2_sel_fetch_update +ffffffff81ac6cc0 T intel_psr_pre_plane_update +ffffffff81ac6e90 t wm_optimization_wa +ffffffff81ac7020 T intel_psr_post_plane_update +ffffffff81ac7c20 T intel_psr_wait_for_idle_locked +ffffffff81ac7df0 T intel_psr_debug_set +ffffffff81ac8110 T intel_psr_invalidate +ffffffff81ac8350 T intel_psr_flush +ffffffff81ac8780 T intel_psr_init +ffffffff81ac88b0 t intel_psr_work +ffffffff81ac8a50 t tgl_dc3co_disable_work +ffffffff81ac8aa0 T intel_psr_short_pulse +ffffffff81ac8e60 T intel_psr_enabled +ffffffff81ac8ee0 T intel_psr_lock +ffffffff81ac8fa0 T intel_psr_unlock +ffffffff81ac9060 T intel_psr_debugfs_register +ffffffff81ac9090 T intel_psr_connector_debugfs_add +ffffffff81ac90c0 t _compute_psr2_sdp_prior_scanline_indication +ffffffff81ac9180 t _compute_psr2_wake_times +ffffffff81ac9270 t intel_psr2_sel_fetch_config_valid +ffffffff81ac9300 t psr2_granularity_check +ffffffff81ac93f0 t tgl_psr2_disable_dc3co +ffffffff81ac9500 t __delayed_work_tick +ffffffff81aca000 T intel_lookup_range_min_qp +ffffffff81aca110 T intel_lookup_range_max_qp +ffffffff81acb000 T intel_init_quirks +ffffffff81acb0f0 T intel_has_quirk +ffffffff81acb130 t quirk_ssc_force_disable +ffffffff81acb160 t quirk_invert_brightness +ffffffff81acb190 t quirk_backlight_present +ffffffff81acb1c0 t quirk_increase_t12_delay +ffffffff81acb1f0 t quirk_increase_ddi_disabled_time +ffffffff81acb220 t intel_dmi_reverse_brightness +ffffffff81acb270 t intel_dmi_no_pps_backlight +ffffffff81acc000 T intel_sdvo_port_enabled +ffffffff81acc0a0 T intel_sdvo_init +ffffffff81acd030 t intel_sdvo_compute_config +ffffffff81acd3f0 t pch_disable_sdvo +ffffffff81acd420 t pch_post_disable_sdvo +ffffffff81acd430 t intel_disable_sdvo +ffffffff81acd5a0 t intel_sdvo_pre_enable +ffffffff81acdf20 t intel_enable_sdvo +ffffffff81ace0f0 t intel_sdvo_get_hw_state +ffffffff81ace1e0 t intel_sdvo_get_config +ffffffff81ace600 t intel_sdvo_set_target_input +ffffffff81ace670 t intel_sdvo_get_input_pixel_clock_range +ffffffff81ace710 t intel_sdvo_ddc_proxy_xfer +ffffffff81ace7c0 t intel_sdvo_ddc_proxy_func +ffffffff81ace7f0 t __intel_sdvo_write_cmd +ffffffff81aceca0 t proxy_lock_bus +ffffffff81acecd0 t proxy_trylock_bus +ffffffff81aced00 t proxy_unlock_bus +ffffffff81aced30 t intel_sdvo_enc_destroy +ffffffff81aced40 t intel_sdvo_set_output_timings_from_mode +ffffffff81acee40 t intel_sdvo_get_preferred_input_mode +ffffffff81acf1d0 t intel_sdvo_get_dtd_from_mode +ffffffff81acf350 t intel_sdvo_read_response +ffffffff81acf7f0 t intel_sdvo_get_value +ffffffff81acf860 t intel_sdvo_write_sdvox +ffffffff81acfa50 t intel_sdvo_write_infoframe +ffffffff81acfc10 t intel_sdvo_read_infoframe +ffffffff81acfe30 t intel_sdvo_hotplug +ffffffff81acfe70 t intel_sdvo_connector_get_hw_state +ffffffff81acff00 t intel_sdvo_detect +ffffffff81ad01f0 t intel_sdvo_connector_register +ffffffff81ad0200 t intel_sdvo_connector_unregister +ffffffff81ad0210 t intel_sdvo_connector_duplicate_state +ffffffff81ad0290 t intel_sdvo_connector_atomic_set_property +ffffffff81ad0460 t intel_sdvo_connector_atomic_get_property +ffffffff81ad0680 t intel_sdvo_get_analog_edid +ffffffff81ad06b0 t intel_sdvo_connector_matches_edid +ffffffff81ad0740 t intel_sdvo_get_modes +ffffffff81ad09e0 t intel_sdvo_mode_valid +ffffffff81ad0af0 t intel_sdvo_atomic_check +ffffffff81ad0ba0 t intel_sdvo_create_enhance_property +ffffffff81ad2000 T intel_snps_phy_wait_for_calibration +ffffffff81ad20d0 T intel_snps_phy_update_psr_power_state +ffffffff81ad2190 T intel_snps_phy_set_signal_levels +ffffffff81ad23e0 T intel_mpllb_calc_state +ffffffff81ad2570 T intel_snps_phy_check_hdmi_link_rate +ffffffff81ad2610 T intel_mpllb_enable +ffffffff81ad2850 T intel_mpllb_disable +ffffffff81ad29c0 T intel_mpllb_calc_port_clock +ffffffff81ad2a90 T intel_mpllb_readout_hw_state +ffffffff81ad2c00 T intel_mpllb_state_verify +ffffffff81ad4000 T vlv_plane_min_cdclk +ffffffff81ad40f0 T ivb_plane_min_cdclk +ffffffff81ad41b0 T hsw_plane_min_cdclk +ffffffff81ad4250 T chv_plane_check_rotation +ffffffff81ad42c0 T intel_sprite_plane_create +ffffffff81ad4610 t vlv_sprite_update_noarm +ffffffff81ad4710 t vlv_sprite_update_arm +ffffffff81ad4db0 t vlv_sprite_disable_arm +ffffffff81ad4e40 t vlv_sprite_get_hw_state +ffffffff81ad4f10 t vlv_sprite_check +ffffffff81ad4fe0 t ivb_sprite_update_noarm +ffffffff81ad5140 t ivb_sprite_update_arm +ffffffff81ad5510 t ivb_sprite_disable_arm +ffffffff81ad55c0 t ivb_sprite_get_hw_state +ffffffff81ad5680 t g4x_sprite_check +ffffffff81ad5920 t hsw_sprite_max_stride +ffffffff81ad5970 t g4x_sprite_max_stride +ffffffff81ad59e0 t ivb_sprite_min_cdclk +ffffffff81ad5b20 t g4x_sprite_update_noarm +ffffffff81ad5c80 t g4x_sprite_update_arm +ffffffff81ad60c0 t g4x_sprite_disable_arm +ffffffff81ad6170 t g4x_sprite_get_hw_state +ffffffff81ad6230 t g4x_sprite_min_cdclk +ffffffff81ad6300 t vlv_sprite_ctl +ffffffff81ad64f0 t vlv_sprite_format_mod_supported +ffffffff81ad6620 t ivb_sprite_ctl +ffffffff81ad6850 t g4x_sprite_ctl +ffffffff81ad6a10 t snb_sprite_format_mod_supported +ffffffff81ad6b00 t g4x_sprite_format_mod_supported +ffffffff81ad7000 T intel_sprite_set_colorkey_ioctl +ffffffff81ad8000 T intel_tc_port_in_tbt_alt_mode +ffffffff81ad8070 T intel_tc_port_in_dp_alt_mode +ffffffff81ad80e0 T intel_tc_port_in_legacy_mode +ffffffff81ad8150 T intel_tc_cold_requires_aux_pw +ffffffff81ad81c0 T intel_tc_port_get_lane_mask +ffffffff81ad82f0 T intel_tc_port_get_pin_assignment_mask +ffffffff81ad8420 T intel_tc_port_fia_max_lane_count +ffffffff81ad8600 T intel_tc_port_set_fia_lane_count +ffffffff81ad87d0 T intel_tc_port_init_mode +ffffffff81ad8a00 t intel_tc_port_update_mode +ffffffff81ad8db0 T intel_tc_port_sanitize_mode +ffffffff81ad90e0 T intel_tc_port_connected_locked +ffffffff81ad9240 T intel_tc_port_ref_held +ffffffff81ad92a0 T intel_tc_port_connected +ffffffff81ad9310 T intel_tc_port_link_needs_reset +ffffffff81ad93c0 T intel_tc_port_link_reset +ffffffff81ad94c0 T intel_tc_port_link_cancel_reset_work +ffffffff81ad9570 T intel_tc_port_lock +ffffffff81ad9590 t __intel_tc_port_lock +ffffffff81ad96d0 T intel_tc_port_suspend +ffffffff81ad9730 T intel_tc_port_unlock +ffffffff81ad97b0 T intel_tc_port_get_link +ffffffff81ad9840 T intel_tc_port_put_link +ffffffff81ad98f0 T intel_tc_port_init +ffffffff81ad9b30 t kasprintf +ffffffff81ad9c00 t intel_tc_port_disconnect_phy_work +ffffffff81ad9c50 t intel_tc_port_link_reset_work +ffffffff81ad9f50 T intel_tc_port_cleanup +ffffffff81ada010 t intel_tc_port_needs_reset +ffffffff81ada110 t tgl_tc_phy_cold_off_domain +ffffffff81ada140 t xelpdp_tc_phy_hpd_live_status +ffffffff81ada250 t adlp_tc_phy_is_ready +ffffffff81ada350 t xelpdp_tc_phy_is_owned +ffffffff81ada420 t xelpdp_tc_phy_get_hw_state +ffffffff81ada5a0 t xelpdp_tc_phy_connect +ffffffff81ada7f0 t xelpdp_tc_phy_disconnect +ffffffff81ada930 t adlp_tc_phy_init +ffffffff81ada9a0 t tc_phy_get_current_mode +ffffffff81adacc0 t tc_phy_wait_for_ready +ffffffff81adae30 t xelpdp_tc_phy_enable_tcss_power +ffffffff81adb080 t tc_phy_verify_legacy_or_dp_alt_mode +ffffffff81adb260 t xelpdp_tc_phy_wait_for_tcss_power +ffffffff81adb470 t adlp_tc_phy_cold_off_domain +ffffffff81adb4d0 t adlp_tc_phy_hpd_live_status +ffffffff81adb5d0 t adlp_tc_phy_is_owned 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intel_atomic_update_watermarks +ffffffff81ae61b0 T intel_optimize_watermarks +ffffffff81ae61f0 T intel_compute_global_watermarks +ffffffff81ae6240 T intel_wm_get_hw_state +ffffffff81ae6280 T intel_wm_plane_visible +ffffffff81ae62e0 T intel_print_wm_latency +ffffffff81ae63f0 T intel_wm_init +ffffffff81ae6410 T intel_wm_debugfs_register +ffffffff81ae7000 T skl_update_scaler_crtc +ffffffff81ae70b0 t skl_update_scaler +ffffffff81ae73f0 T skl_update_scaler_plane +ffffffff81ae77f0 T intel_atomic_setup_scalers +ffffffff81ae7d50 T skl_pfit_enable +ffffffff81ae8240 T skl_program_plane_scaler +ffffffff81ae8930 T skl_detach_scalers +ffffffff81ae8a90 T skl_scaler_disable +ffffffff81ae8bc0 T skl_scaler_get_config +ffffffff81ae9000 T skl_format_to_fourcc +ffffffff81ae9180 T icl_is_nv12_y_plane +ffffffff81ae91f0 T icl_hdr_plane_mask +ffffffff81ae9220 T icl_is_hdr_plane +ffffffff81ae9260 T skl_calc_main_surface_offset +ffffffff81ae94a0 T skl_universal_plane_create +ffffffff81ae9ce0 t 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intel_atomic_get_dbuf_state +ffffffff81af0670 T intel_dbuf_init +ffffffff81af06e0 T intel_dbuf_pre_plane_update +ffffffff81af09b0 T intel_dbuf_post_plane_update +ffffffff81af0a80 T intel_mbus_dbox_update +ffffffff81af0cf0 T skl_watermark_debugfs_register +ffffffff81af0d20 t skl_sagv_disable +ffffffff81af0e40 t skl_compute_wm +ffffffff81af4130 t skl_wm_get_hw_state_and_sanitize +ffffffff81af4920 t skl_build_plane_wm_single +ffffffff81af4cb0 t skl_compute_wm_params +ffffffff81af5080 t skl_compute_plane_wm +ffffffff81af54b0 t skl_compute_dbuf_slices +ffffffff81af59b0 t skl_ddb_entry_for_slices +ffffffff81af5af0 t intel_dbuf_duplicate_state +ffffffff81af5b80 t intel_dbuf_destroy_state +ffffffff81af6000 T pixel_format_from_register_bits +ffffffff81af6060 T vlv_dsi_wait_for_fifo_empty +ffffffff81af6120 T vlv_dsi_init +ffffffff81af6930 t intel_dsi_compute_config +ffffffff81af6a80 t intel_dsi_pre_enable +ffffffff81af8530 t bxt_dsi_enable +ffffffff81af8550 t intel_dsi_disable +ffffffff81af8800 t intel_dsi_post_disable +ffffffff81af9480 t intel_dsi_get_hw_state +ffffffff81af9750 t intel_dsi_get_config +ffffffff81af9ef0 t intel_dsi_encoder_destroy +ffffffff81af9f20 t intel_dsi_prepare +ffffffff81afac00 t dpi_send_cmd +ffffffff81afad80 t intel_dsi_host_attach +ffffffff81afadb0 t intel_dsi_host_detach +ffffffff81afade0 t intel_dsi_host_transfer +ffffffff81afb240 t vlv_dsi_mode_valid +ffffffff81afc000 T vlv_dsi_pll_compute +ffffffff81afc3a0 t vlv_dsi_pclk +ffffffff81afc540 T vlv_dsi_pll_enable +ffffffff81afc770 T vlv_dsi_pll_disable +ffffffff81afc7f0 T bxt_dsi_pll_is_enabled +ffffffff81afc8c0 T bxt_dsi_pll_disable +ffffffff81afc9c0 T vlv_dsi_get_pclk +ffffffff81afca60 T bxt_dsi_get_pclk +ffffffff81afcb20 T vlv_dsi_reset_clocks +ffffffff81afcbb0 T bxt_dsi_pll_compute +ffffffff81afcd50 T bxt_dsi_pll_enable +ffffffff81afd0c0 T bxt_dsi_reset_clocks +ffffffff81afd1e0 T assert_dsi_pll_enabled +ffffffff81afd200 t assert_dsi_pll +ffffffff81afd310 T assert_dsi_pll_disabled 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i915_gem_context_setparam_ioctl +ffffffff81b027c0 t set_proto_ctx_param +ffffffff81b02ee0 T i915_gem_context_reset_stats_ioctl +ffffffff81b02fe0 T i915_gem_engines_iter_next +ffffffff81b03030 T i915_gem_context_module_exit +ffffffff81b03050 T i915_gem_context_module_init +ffffffff81b030b0 t i915_gem_context_release_work +ffffffff81b03180 t intel_context_set_gem +ffffffff81b032b0 t engines_notify +ffffffff81b03420 t intel_context_unpin +ffffffff81b034b0 t kill_engines +ffffffff81b03640 t create_setparam +ffffffff81b036b0 t invalid_ext +ffffffff81b036e0 t lookup_user_engine +ffffffff81b037a0 t set_proto_ctx_engines_balance +ffffffff81b03a80 t set_proto_ctx_engines_bond +ffffffff81b03e00 t set_proto_ctx_engines_parallel_submit +ffffffff81b05000 T __i915_gem_object_create_user +ffffffff81b05020 t __i915_gem_object_create_user_ext +ffffffff81b054b0 T i915_gem_dumb_create +ffffffff81b05620 T i915_gem_create_ioctl +ffffffff81b056f0 T i915_gem_create_ext_ioctl +ffffffff81b058f0 t ext_set_placements +ffffffff81b05d00 t ext_set_protected +ffffffff81b05d80 t ext_set_pat +ffffffff81b06000 T i915_gem_prime_export +ffffffff81b06090 T i915_gem_prime_import +ffffffff81b07000 T i915_gem_cpu_write_needs_clflush +ffffffff81b07070 T i915_gem_object_flush_if_display +ffffffff81b07280 t i915_gem_object_unlock +ffffffff81b07340 T i915_gem_object_flush_if_display_locked +ffffffff81b073c0 T i915_gem_object_set_to_wc_domain +ffffffff81b074c0 t flush_write_domain +ffffffff81b07610 T i915_gem_object_set_to_gtt_domain +ffffffff81b07760 T i915_gem_object_set_cache_level +ffffffff81b077f0 T i915_gem_get_caching_ioctl +ffffffff81b078d0 T i915_gem_set_caching_ioctl +ffffffff81b07b10 t i915_gem_object_lock_interruptible +ffffffff81b07c20 T i915_gem_object_pin_to_display_plane +ffffffff81b07e40 T i915_gem_object_set_to_cpu_domain +ffffffff81b07f30 T i915_gem_set_domain_ioctl +ffffffff81b08120 T i915_gem_object_prepare_read +ffffffff81b08270 T i915_gem_object_prepare_write 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__i915_gem_object_create_internal +ffffffff81b0f0c0 T i915_gem_object_create_internal +ffffffff81b0f180 t i915_gem_object_get_pages_internal +ffffffff81b0f470 t i915_gem_object_put_pages_internal +ffffffff81b10000 T i915_gem_object_lmem_io_map +ffffffff81b10050 T i915_gem_object_is_lmem +ffffffff81b100a0 T __i915_gem_object_is_lmem +ffffffff81b100f0 T __i915_gem_object_create_lmem_with_ps +ffffffff81b10110 T i915_gem_object_create_lmem_from_data +ffffffff81b101f0 T i915_gem_object_create_lmem +ffffffff81b11000 T i915_gem_mmap_ioctl +ffffffff81b11210 T i915_gem_mmap_gtt_version +ffffffff81b11240 T remap_io_mapping +ffffffff81b11300 T i915_gem_fault +ffffffff81b11f40 T __i915_gem_object_release_mmap_gtt +ffffffff81b11fc0 T i915_gem_object_release_mmap_gtt +ffffffff81b12070 T i915_gem_object_runtime_pm_release_mmap_offset +ffffffff81b120d0 T i915_gem_object_release_mmap_offset +ffffffff81b121d0 T i915_gem_dumb_mmap_offset +ffffffff81b12250 t __assign_mmap_offset_handle +ffffffff81b12760 T i915_gem_mmap_offset_ioctl +ffffffff81b12870 T i915_gem_mmap +ffffffff81b13000 T i915_gem_get_pat_index +ffffffff81b13080 T i915_gem_object_has_cache_level +ffffffff81b13120 T i915_gem_object_alloc +ffffffff81b13170 T i915_gem_object_free +ffffffff81b13190 T i915_gem_object_init +ffffffff81b132b0 T __i915_gem_object_fini +ffffffff81b132d0 T i915_gem_object_set_cache_coherency +ffffffff81b133f0 T i915_gem_object_set_pat_index +ffffffff81b134a0 T i915_gem_object_can_bypass_llc +ffffffff81b13500 T __i915_gem_free_object_rcu +ffffffff81b13570 T __i915_gem_object_pages_fini +ffffffff81b138c0 T __i915_gem_free_object +ffffffff81b13970 T i915_gem_flush_free_objects +ffffffff81b139c0 t __i915_gem_free_objects +ffffffff81b13ab0 T __i915_gem_object_flush_frontbuffer +ffffffff81b13b60 T __i915_gem_object_invalidate_frontbuffer +ffffffff81b13c10 T i915_gem_object_read_from_page +ffffffff81b13d10 T i915_gem_object_has_struct_page +ffffffff81b13d40 T i915_gem_object_has_iomem +ffffffff81b13d80 T i915_gem_object_evictable +ffffffff81b13e30 T i915_gem_object_migratable +ffffffff81b13e70 T i915_gem_object_can_migrate +ffffffff81b13fe0 T i915_gem_object_migrate +ffffffff81b14080 T __i915_gem_object_migrate +ffffffff81b14120 T i915_gem_object_placement_possible +ffffffff81b141b0 T i915_gem_object_needs_ccs_pages +ffffffff81b14250 T i915_gem_init__objects +ffffffff81b14280 t __i915_gem_free_work +ffffffff81b142d0 T i915_objects_module_exit +ffffffff81b142f0 T i915_objects_module_init +ffffffff81b14350 T i915_gem_object_get_moving_fence +ffffffff81b14370 T i915_gem_object_wait_moving_fence +ffffffff81b143f0 T i915_gem_object_has_unknown_state +ffffffff81b14420 t i915_gem_free_object +ffffffff81b144b0 t i915_gem_close_object +ffffffff81b15000 T __i915_gem_object_set_pages +ffffffff81b15320 T ____i915_gem_object_get_pages +ffffffff81b15390 T __i915_gem_object_get_pages +ffffffff81b153f0 T i915_gem_object_pin_pages_unlocked +ffffffff81b15510 t i915_gem_object_lock +ffffffff81b15720 T i915_gem_object_truncate +ffffffff81b15760 T __i915_gem_object_unset_pages +ffffffff81b15940 T __i915_gem_object_put_pages +ffffffff81b159c0 T i915_gem_object_pin_map +ffffffff81b15c20 t i915_gem_object_map_page +ffffffff81b15de0 T i915_gem_object_pin_map_unlocked +ffffffff81b15ee0 T __i915_gem_object_flush_map +ffffffff81b15f70 T __i915_gem_object_release_map +ffffffff81b15ff0 T __i915_gem_object_page_iter_get_sg +ffffffff81b161e0 T __i915_gem_object_get_page +ffffffff81b16230 T __i915_gem_object_get_dirty_page +ffffffff81b162a0 T __i915_gem_object_get_dma_address_len +ffffffff81b16320 T __i915_gem_object_get_dma_address +ffffffff81b17000 T i915_gem_object_put_pages_phys +ffffffff81b171c0 T i915_gem_object_pwrite_phys +ffffffff81b172c0 T i915_gem_object_pread_phys +ffffffff81b17370 T i915_gem_object_attach_phys +ffffffff81b17440 t i915_gem_object_shmem_to_phys +ffffffff81b18000 T i915_gem_suspend +ffffffff81b18060 T i915_gem_backup_suspend +ffffffff81b181e0 t lmem_suspend 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i915_gem_stolen_remove_node +ffffffff81b1c1c0 T i915_gem_object_create_stolen +ffffffff81b1c1e0 T i915_gem_stolen_lmem_setup +ffffffff81b1c4f0 T i915_gem_stolen_smem_setup +ffffffff81b1c590 T i915_gem_object_is_stolen +ffffffff81b1c5d0 T i915_gem_stolen_initialized +ffffffff81b1c610 T i915_gem_stolen_area_address +ffffffff81b1c640 T i915_gem_stolen_area_size +ffffffff81b1c680 T i915_gem_stolen_node_address +ffffffff81b1c6c0 T i915_gem_stolen_node_offset +ffffffff81b1c6f0 T i915_gem_stolen_node_allocated +ffffffff81b1c720 T i915_gem_stolen_node_size +ffffffff81b1c750 t init_stolen_lmem +ffffffff81b1c7f0 t release_stolen_lmem +ffffffff81b1c860 t _i915_gem_object_stolen_init +ffffffff81b1cc60 t i915_gem_init_stolen +ffffffff81b1d4b0 t init_stolen_smem +ffffffff81b1d510 t release_stolen_smem +ffffffff81b1d560 t i915_gem_object_get_pages_stolen +ffffffff81b1d650 t i915_gem_object_put_pages_stolen +ffffffff81b1d680 t i915_gem_object_release_stolen +ffffffff81b1e000 T i915_gem_throttle_ioctl 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gen6_emit_flush_xcs +ffffffff81b2a270 T gen6_emit_flush_vcs +ffffffff81b2a2e0 T gen6_emit_bb_start +ffffffff81b2a350 T hsw_emit_bb_start +ffffffff81b2a3c0 T gen7_emit_flush_rcs +ffffffff81b2a4a0 T gen7_emit_breadcrumb_rcs +ffffffff81b2a530 T gen6_emit_breadcrumb_xcs +ffffffff81b2a5a0 T gen7_emit_breadcrumb_xcs +ffffffff81b2a670 T gen6_irq_enable +ffffffff81b2a6d0 T gen6_irq_disable +ffffffff81b2a720 T hsw_irq_enable_vecs +ffffffff81b2a770 T hsw_irq_disable_vecs +ffffffff81b2b000 T gen7_ppgtt_enable +ffffffff81b2b0a0 T gen6_ppgtt_enable +ffffffff81b2b1b0 T gen6_ppgtt_pin +ffffffff81b2b270 T gen6_ppgtt_unpin +ffffffff81b2b2b0 T gen6_ppgtt_create +ffffffff81b2b5e0 t gen6_alloc_va_range +ffffffff81b2b820 t gen6_ppgtt_clear_range +ffffffff81b2b990 t gen6_ppgtt_insert_entries +ffffffff81b2bad0 t gen6_ppgtt_cleanup +ffffffff81b2bb70 t gen6_flush_pd +ffffffff81b2bc80 t pd_dummy_obj_get_pages +ffffffff81b2bcc0 t pd_dummy_obj_put_pages +ffffffff81b2bcf0 t pd_vma_bind +ffffffff81b2bd60 t pd_vma_unbind +ffffffff81b2c000 T gen7_setup_clear_gpr_bb +ffffffff81b2d000 T gen8_emit_flush_rcs +ffffffff81b2d1b0 T gen8_emit_flush_xcs +ffffffff81b2d240 T gen11_emit_flush_rcs +ffffffff81b2d310 T gen12_emit_aux_table_inv +ffffffff81b2d3f0 T gen12_emit_flush_rcs +ffffffff81b2d6b0 t mtl_dummy_pipe_control +ffffffff81b2d800 T gen12_emit_flush_xcs +ffffffff81b2da00 T gen8_emit_init_breadcrumb +ffffffff81b2dac0 T xehp_emit_bb_start_noarb +ffffffff81b2db90 T xehp_emit_bb_start +ffffffff81b2dc60 T gen8_emit_bb_start_noarb +ffffffff81b2dce0 T gen8_emit_bb_start +ffffffff81b2ddb0 T gen8_emit_fini_breadcrumb_xcs +ffffffff81b2ded0 T gen8_emit_fini_breadcrumb_rcs +ffffffff81b2e020 T gen11_emit_fini_breadcrumb_rcs +ffffffff81b2e170 T gen12_emit_fini_breadcrumb_xcs +ffffffff81b2e330 T gen12_emit_fini_breadcrumb_rcs +ffffffff81b2f000 T gen8_ppgtt_create +ffffffff81b2f6c0 t gen12_pte_encode +ffffffff81b2f730 t gen8_pte_encode +ffffffff81b2f7a0 t gen8_ppgtt_insert +ffffffff81b304a0 t xehpsdv_ppgtt_insert_entry +ffffffff81b30640 t gen8_ppgtt_insert_entry +ffffffff81b30780 t gen8_ppgtt_alloc +ffffffff81b30820 t gen8_ppgtt_clear +ffffffff81b30890 t gen8_ppgtt_foreach +ffffffff81b30940 t gen8_ppgtt_cleanup +ffffffff81b309f0 t gen8_ppgtt_notify_vgt +ffffffff81b30ca0 t __gen8_ppgtt_alloc +ffffffff81b30f10 t gen8_pde_encode +ffffffff81b30f50 t __gen8_ppgtt_clear +ffffffff81b312c0 t __gen8_ppgtt_cleanup +ffffffff81b31350 t __gen8_ppgtt_foreach +ffffffff81b32000 T intel_breadcrumbs_create +ffffffff81b320d0 t signal_irq_work +ffffffff81b32500 t irq_enable +ffffffff81b32520 t irq_disable +ffffffff81b32540 T intel_breadcrumbs_reset +ffffffff81b325e0 T __intel_breadcrumbs_park +ffffffff81b32690 T intel_breadcrumbs_free +ffffffff81b326c0 T i915_request_enable_breadcrumb +ffffffff81b32890 T i915_request_cancel_breadcrumb +ffffffff81b329e0 T intel_context_remove_breadcrumbs +ffffffff81b32b80 T intel_engine_print_breadcrumbs +ffffffff81b33000 T intel_context_free +ffffffff81b33020 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cleanup_status_page +ffffffff81b385c0 T intel_engine_resume +ffffffff81b38600 T intel_engine_get_active_head +ffffffff81b38690 t intel_uncore_read64_2x32 +ffffffff81b387b0 T intel_engine_get_last_batch_head +ffffffff81b38830 T intel_engine_stop_cs +ffffffff81b38a00 T intel_engine_cancel_stop_cs +ffffffff81b38a50 T intel_engine_wait_for_pending_mi_fw +ffffffff81b38b20 T intel_engine_get_instdone +ffffffff81b38ff0 T __intel_engine_flush_submission +ffffffff81b39080 T intel_engine_is_idle +ffffffff81b39230 T intel_engines_are_idle +ffffffff81b392b0 T intel_engine_irq_enable +ffffffff81b39330 T intel_engine_irq_disable +ffffffff81b393a0 T intel_engines_reset_default_submission +ffffffff81b39430 T intel_engine_can_store_dword +ffffffff81b394b0 T intel_engine_dump_active_requests +ffffffff81b39560 t engine_dump_request +ffffffff81b397e0 T intel_engine_dump +ffffffff81b3a620 T intel_engine_get_busy_time +ffffffff81b3a640 T intel_engine_create_virtual +ffffffff81b3a6a0 T intel_engine_get_hung_entity +ffffffff81b3a840 T xehp_enable_ccs_engines +ffffffff81b3a8a0 t nop_irq_handler +ffffffff81b3a8d0 t print_ring +ffffffff81b3b000 T intel_engine_unpark_heartbeat +ffffffff81b3b120 T intel_engine_park_heartbeat +ffffffff81b3b1a0 T intel_gt_unpark_heartbeats +ffffffff81b3b2f0 T intel_gt_park_heartbeats +ffffffff81b3b3a0 T intel_engine_init_heartbeat +ffffffff81b3b400 t heartbeat +ffffffff81b3b7a0 T intel_engine_set_heartbeat +ffffffff81b3b940 t set_heartbeat +ffffffff81b3bab0 t __intel_engine_pulse +ffffffff81b3bb80 T intel_engine_pulse +ffffffff81b3bc80 T intel_engine_flush_barriers +ffffffff81b3be00 t heartbeat_create +ffffffff81b3bf00 t heartbeat_commit +ffffffff81b3bf90 t __delayed_work_tick +ffffffff81b3bfb0 t reset_engine +ffffffff81b3c000 T intel_engine_init__pm +ffffffff81b3c0c0 T intel_engine_reset_pinned_contexts +ffffffff81b3c150 t __engine_unpark +ffffffff81b3c240 t __engine_park +ffffffff81b3c4b0 t duration +ffffffff81b3d000 T intel_engine_lookup_user +ffffffff81b3d070 T intel_engine_add_user +ffffffff81b3d0c0 T intel_engine_class_repr +ffffffff81b3d100 T intel_engines_driver_register +ffffffff81b3d4b0 T intel_engines_has_context_isolation +ffffffff81b3d570 t engine_cmp +ffffffff81b3e000 T execlists_unwind_incomplete_requests +ffffffff81b3e020 t __unwind_incomplete_requests +ffffffff81b3e180 T intel_execlists_submission_setup +ffffffff81b3e590 t execlists_submission_tasklet +ffffffff81b3f5a0 t execlists_timeslice +ffffffff81b3f5d0 t execlists_preempt +ffffffff81b3f600 t execlists_sanitize +ffffffff81b3f730 t execlists_release +ffffffff81b3f7b0 T intel_execlists_show_requests +ffffffff81b3fa90 T intel_execlists_dump_active_requests +ffffffff81b3fb30 t process_csb +ffffffff81b3ff20 t active_preempt_timeout +ffffffff81b3ffa0 t execlists_reset +ffffffff81b404a0 t post_process_csb +ffffffff81b40790 t wa_csb_read +ffffffff81b408c0 t execlists_capture_work +ffffffff81b40b80 t execlists_resume +ffffffff81b40d80 t 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intel_rps_get_max_frequency +ffffffff81b73730 T intel_rps_get_max_raw_freq +ffffffff81b737b0 T intel_rps_get_rp0_frequency +ffffffff81b73890 T intel_rps_get_rp1_frequency +ffffffff81b73970 T intel_rps_get_rpn_frequency +ffffffff81b73a50 T gen6_rps_frequency_dump +ffffffff81b750f0 T intel_rps_set_max_frequency +ffffffff81b75360 T intel_rps_get_min_frequency +ffffffff81b75440 T intel_rps_get_min_raw_freq +ffffffff81b754c0 T intel_rps_set_min_frequency +ffffffff81b75640 T intel_rps_get_up_threshold +ffffffff81b75670 T intel_rps_set_up_threshold +ffffffff81b75750 T intel_rps_get_down_threshold +ffffffff81b75780 T intel_rps_set_down_threshold +ffffffff81b75860 T intel_rps_raise_unslice +ffffffff81b75940 T intel_rps_lower_unslice +ffffffff81b75a20 T rps_read_mask_mmio +ffffffff81b75ab0 T intel_rps_driver_register +ffffffff81b75af0 T intel_rps_driver_unregister +ffffffff81b75b40 T i915_read_mch_val +ffffffff81b75fb0 T i915_gpu_raise +ffffffff81b76040 T i915_gpu_lower +ffffffff81b760d0 T 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intel_gsc_uc_heci_cmd_submit_packet +ffffffff81b8c1d0 T intel_gsc_uc_heci_cmd_emit_mtl_header +ffffffff81b8c230 T intel_gsc_uc_heci_cmd_submit_nonpriv +ffffffff81b8c5a0 t i915_gem_object_lock +ffffffff81b8d000 T intel_guc_notify +ffffffff81b8d040 T intel_guc_init_send_regs +ffffffff81b8d0e0 T intel_guc_init_early +ffffffff81b8d230 t gen11_reset_guc_interrupts +ffffffff81b8d280 t gen11_enable_guc_interrupts +ffffffff81b8d300 t gen11_disable_guc_interrupts +ffffffff81b8d370 t gen9_reset_guc_interrupts +ffffffff81b8d440 t gen9_enable_guc_interrupts +ffffffff81b8d5b0 t gen9_disable_guc_interrupts +ffffffff81b8d6a0 T intel_guc_init_late +ffffffff81b8d6b0 T intel_guc_write_params +ffffffff81b8d8d0 T intel_guc_dump_time_info +ffffffff81b8da10 T intel_guc_init +ffffffff81b8dba0 t guc_init_params +ffffffff81b8e340 T intel_guc_fini +ffffffff81b8e3f0 T intel_guc_send_mmio +ffffffff81b8e8d0 T intel_guc_to_host_process_recv_msg +ffffffff81b8e9c0 T intel_guc_auth_huc +ffffffff81b8ea20 T intel_guc_suspend +ffffffff81b8eb10 T intel_guc_resume +ffffffff81b8eb40 T intel_guc_allocate_vma +ffffffff81b8ec60 T intel_guc_allocate_and_map_vma +ffffffff81b8ed10 T intel_guc_self_cfg32 +ffffffff81b8ee10 T intel_guc_self_cfg64 +ffffffff81b8ef10 T intel_guc_load_status +ffffffff81b8f0a0 T intel_guc_write_barrier +ffffffff81b90000 T intel_guc_ads_print_policy_info +ffffffff81b90020 T intel_guc_global_policies_update +ffffffff81b90070 T intel_guc_ads_create +ffffffff81b90560 T intel_guc_ads_init_late +ffffffff81b905b0 T intel_guc_ads_destroy +ffffffff81b90610 T intel_guc_ads_reset +ffffffff81b90680 T intel_guc_engine_usage_offset +ffffffff81b906c0 T intel_guc_engine_usage_record_map +ffffffff81b91000 T intel_guc_capture_getlistsize +ffffffff81b91020 t guc_capture_getlistsize +ffffffff81b91250 T intel_guc_capture_getlist +ffffffff81b92100 t guc_cap_list_num_regs +ffffffff81b92210 T intel_guc_capture_getnullheader +ffffffff81b922d0 T intel_guc_capture_print_engine_node +ffffffff81b927e0 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intel_guc_slpc_print_info +ffffffff81b9f570 T intel_guc_slpc_fini +ffffffff81ba0000 T intel_guc_wait_for_pending_msg +ffffffff81ba0150 T intel_guc_wait_for_idle +ffffffff81ba01a0 T intel_guc_busyness_park +ffffffff81ba02e0 T intel_guc_busyness_unpark +ffffffff81ba0390 t guc_update_pm_timestamp +ffffffff81ba0540 T intel_guc_submission_reset_prepare +ffffffff81ba0c50 t guc_flush_destroyed_contexts +ffffffff81ba0dc0 T intel_guc_submission_reset +ffffffff81ba0ed0 t __guc_reset_context +ffffffff81ba11d0 T intel_guc_submission_cancel_requests +ffffffff81ba1470 T intel_guc_submission_reset_finish +ffffffff81ba1550 T intel_guc_submission_init +ffffffff81ba16d0 T intel_guc_submission_fini +ffffffff81ba1770 T intel_guc_submission_setup +ffffffff81ba1bc0 t guc_sched_engine_disabled +ffffffff81ba1bf0 t guc_sched_engine_destroy +ffffffff81ba1c50 t guc_bump_inflight_request_prio +ffffffff81ba1d40 t guc_retire_inflight_request_prio +ffffffff81ba1dc0 t guc_submission_tasklet +ffffffff81ba2190 t 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emit_fini_breadcrumb_child_no_preempt_mid_batch +ffffffff81ba8c90 t guc_parent_context_pin +ffffffff81ba8d60 t guc_parent_context_unpin +ffffffff81ba8e20 t pin_guc_id +ffffffff81ba90a0 t guc_child_context_pin +ffffffff81ba9130 t guc_child_context_unpin +ffffffff81ba9140 t guc_child_context_post_unpin +ffffffff81ba91e0 t guc_child_context_destroy +ffffffff81ba9260 t guc_context_init +ffffffff81ba9310 t submit_work_cb +ffffffff81ba9330 t cs_irq_handler +ffffffff81ba9380 t guc_irq_enable_breadcrumbs +ffffffff81ba9440 t guc_irq_disable_breadcrumbs +ffffffff81ba94e0 t __delayed_work_tick +ffffffff81baa000 T intel_huc_register_gsc_notifier +ffffffff81baa040 t gsc_notifier +ffffffff81baa090 T intel_huc_unregister_gsc_notifier +ffffffff81baa100 T intel_huc_sanitize +ffffffff81baa170 T intel_huc_init_early +ffffffff81baa2c0 T intel_huc_init +ffffffff81baa4e0 T intel_huc_fini +ffffffff81baa560 T intel_huc_suspend +ffffffff81baa5d0 T intel_huc_wait_for_auth_complete +ffffffff81baa6f0 T intel_huc_auth +ffffffff81baa8b0 T intel_huc_is_authenticated +ffffffff81baa960 T intel_huc_check_status +ffffffff81baaa50 t huc_is_fully_authenticated +ffffffff81baab70 T intel_huc_update_auth_status +ffffffff81baac80 T intel_huc_load_status +ffffffff81baad60 t sw_fence_dummy_notify +ffffffff81baad90 t huc_delayed_load_timer_callback +ffffffff81bab000 T intel_huc_debugfs_register +ffffffff81bac000 T intel_huc_fw_auth_via_gsccs +ffffffff81bac420 T intel_huc_fw_get_binary_info +ffffffff81bac6e0 T intel_huc_fw_load_and_auth_via_gsc +ffffffff81bac780 T intel_huc_fw_upload +ffffffff81bad000 T intel_uc_init_early +ffffffff81bad170 T intel_uc_init_late +ffffffff81bad1a0 T intel_uc_driver_late_release +ffffffff81bad1d0 T intel_uc_init_mmio +ffffffff81bad1f0 T intel_uc_driver_remove +ffffffff81bad280 T intel_uc_reset_prepare +ffffffff81bad300 t __uc_sanitize +ffffffff81bad430 T intel_uc_reset +ffffffff81bad480 T intel_uc_reset_finish +ffffffff81bad4d0 T intel_uc_cancel_requests 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i915_active_fini +ffffffff81bb2f30 T i915_active_acquire_preallocate_barrier +ffffffff81bb3300 t node_retire +ffffffff81bb3390 T i915_active_acquire_barrier +ffffffff81bb34f0 T i915_request_add_active_barriers +ffffffff81bb35a0 T i915_active_fence_set +ffffffff81bb3610 T i915_active_noop +ffffffff81bb3650 T i915_active_get +ffffffff81bb3680 T i915_active_put +ffffffff81bb36f0 T i915_active_create +ffffffff81bb37e0 t auto_active +ffffffff81bb3810 t auto_retire +ffffffff81bb3880 T i915_active_module_exit +ffffffff81bb38a0 T i915_active_module_init +ffffffff81bb3900 t __active_retire +ffffffff81bb3af0 t barrier_wake +ffffffff81bb4000 T intel_engine_init_cmd_parser +ffffffff81bb46f0 t gen7_render_get_cmd_length_mask +ffffffff81bb4780 t gen7_bsd_get_cmd_length_mask +ffffffff81bb4820 t gen7_blt_get_cmd_length_mask +ffffffff81bb4890 t gen9_blt_get_cmd_length_mask +ffffffff81bb4900 T intel_engine_cleanup_cmd_parser +ffffffff81bb49d0 T intel_engine_cmd_parser +ffffffff81bb5580 T i915_cmd_parser_get_version +ffffffff81bb6000 T i915_fence_context_timeout +ffffffff81bb7000 T i915_deps_init +ffffffff81bb7060 T i915_deps_fini +ffffffff81bb70f0 T i915_deps_sync +ffffffff81bb71a0 T i915_deps_add_dependency +ffffffff81bb73f0 T i915_deps_add_resv +ffffffff81bb8000 T i915_print_iommu_status +ffffffff81bb8050 T i915_driver_probe +ffffffff81bb88d0 t i915_driver_register +ffffffff81bb89c0 T inteldrm_init_backlight +ffffffff81bb8a30 t i915_welcome_messages +ffffffff81bb8bb0 T i915_driver_remove +ffffffff81bb8c90 T i915_driver_shutdown +ffffffff81bb8e30 T i915_driver_resume_switcheroo +ffffffff81bb8e90 t i915_drm_resume_early +ffffffff81bb8f80 t i915_drm_resume +ffffffff81bb91c0 T intagpsubmatch +ffffffff81bb9210 T intagp_print +ffffffff81bb9260 T inteldrm_wsioctl +ffffffff81bb9440 T inteldrm_wsmmap +ffffffff81bb9470 T inteldrm_alloc_screen +ffffffff81bb94a0 T inteldrm_free_screen +ffffffff81bb94c0 T inteldrm_show_screen +ffffffff81bb9590 T inteldrm_load_font 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i915_drm_client_alloc +ffffffff81bbb070 T __i915_drm_client_free +ffffffff81bbc000 T i915_gem_get_aperture_ioctl +ffffffff81bbc0d0 T i915_gem_object_unbind +ffffffff81bbc340 T i915_gem_pread_ioctl +ffffffff81bbc4d0 t i915_gem_shmem_pread +ffffffff81bbc8d0 t i915_gem_gtt_pread +ffffffff81bbcbf0 T i915_gem_pwrite_ioctl +ffffffff81bbcdc0 t i915_gem_gtt_pwrite_fast +ffffffff81bbd170 t i915_gem_shmem_pwrite +ffffffff81bbd600 T i915_gem_sw_finish_ioctl +ffffffff81bbd690 T i915_gem_runtime_suspend +ffffffff81bbd790 T i915_gem_object_ggtt_pin_ww +ffffffff81bbda30 T i915_gem_object_ggtt_pin +ffffffff81bbdb40 t i915_gem_object_lock +ffffffff81bbdd50 T i915_gem_madvise_ioctl +ffffffff81bbe150 T i915_gem_drain_freed_objects +ffffffff81bbe1c0 T i915_gem_drain_workqueue +ffffffff81bbe2a0 T i915_gem_init +ffffffff81bbe540 T i915_gem_driver_register +ffffffff81bbe550 T i915_gem_driver_unregister +ffffffff81bbe560 T i915_gem_driver_remove +ffffffff81bbe5c0 T i915_gem_driver_release +ffffffff81bbe6b0 T i915_gem_init_early +ffffffff81bbe730 T i915_gem_cleanup_early +ffffffff81bbe7b0 T i915_gem_open +ffffffff81bbe8c0 t i915_gem_gtt_prepare +ffffffff81bbf000 T i915_gem_evict_something +ffffffff81bbf440 t ungrab_vma +ffffffff81bbf570 t grab_vma +ffffffff81bbf690 T i915_gem_evict_for_node +ffffffff81bbf8d0 T i915_gem_evict_vm +ffffffff81bc0000 T i915_gem_gtt_prepare_pages +ffffffff81bc0030 T i915_gem_gtt_finish_pages +ffffffff81bc0090 T i915_gem_gtt_reserve +ffffffff81bc0140 T i915_gem_gtt_insert +ffffffff81bc1000 T i915_gem_ww_ctx_init +ffffffff81bc1060 T i915_gem_ww_unlock_single +ffffffff81bc11a0 T i915_gem_ww_ctx_fini +ffffffff81bc1210 t i915_gem_ww_ctx_unlock_all +ffffffff81bc1370 T i915_gem_ww_ctx_backoff +ffffffff81bc2000 T i915_getparam_ioctl +ffffffff81bc3000 T intel_gpu_error_find_batch +ffffffff81bc3070 T i915_error_printf +ffffffff81bc3130 T intel_gpu_error_print_vma +ffffffff81bc3160 T i915_gpu_coredump_copy_to_buffer +ffffffff81bc31b0 T __i915_gpu_coredump_free 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i915_pmu_init +ffffffff81bcb2e0 t i915_pmu_exit +ffffffff81bcc000 T i915_params_dump +ffffffff81bcc670 T i915_params_copy +ffffffff81bcc870 T i915_params_free +ffffffff81bcd000 T i915_pci_register_driver +ffffffff81bcd030 T i915_pci_unregister_driver +ffffffff81bce000 T i915_oa_config_release +ffffffff81bce060 T i915_perf_get_oa_config +ffffffff81bce0c0 T i915_perf_oa_timestamp_frequency +ffffffff81bce170 T i915_oa_init_reg_state +ffffffff81bce260 T i915_perf_open_ioctl +ffffffff81bcea80 T i915_perf_register +ffffffff81bceab0 T i915_perf_unregister +ffffffff81bceb20 T i915_perf_add_config_ioctl +ffffffff81bceb70 T i915_perf_remove_config_ioctl +ffffffff81bcebe0 T i915_perf_init +ffffffff81bcf2c0 t gen7_is_valid_b_counter_addr +ffffffff81bcf310 t hsw_is_valid_mux_addr +ffffffff81bcf390 t hsw_enable_metric_set +ffffffff81bcf450 t hsw_disable_metric_set +ffffffff81bcf520 t gen7_oa_enable +ffffffff81bcf690 t gen7_oa_disable +ffffffff81bcf750 t gen7_oa_read +ffffffff81bcfbb0 t gen7_oa_hw_tail_read +ffffffff81bcfc00 t gen8_oa_read +ffffffff81bd0230 t gen8_is_valid_mux_addr +ffffffff81bd02b0 t gen8_is_valid_flex_addr +ffffffff81bd0330 t chv_is_valid_mux_addr +ffffffff81bd03b0 t gen8_oa_enable +ffffffff81bd04f0 t gen8_oa_disable +ffffffff81bd05b0 t gen8_enable_metric_set +ffffffff81bd0670 t gen8_disable_metric_set +ffffffff81bd06d0 t gen8_oa_hw_tail_read +ffffffff81bd0720 t gen11_is_valid_mux_addr +ffffffff81bd07e0 t gen11_disable_metric_set +ffffffff81bd0840 t xehp_is_valid_b_counter_addr +ffffffff81bd0910 t gen12_is_valid_b_counter_addr +ffffffff81bd0960 t gen12_is_valid_mux_addr +ffffffff81bd09f0 t gen12_oa_enable +ffffffff81bd0b90 t gen12_oa_disable +ffffffff81bd0ce0 t gen12_enable_metric_set +ffffffff81bd0ed0 t gen12_disable_metric_set +ffffffff81bd1020 t gen12_oa_hw_tail_read +ffffffff81bd1080 T i915_perf_sysctl_register +ffffffff81bd10b0 T i915_perf_sysctl_unregister +ffffffff81bd10e0 T i915_perf_fini +ffffffff81bd1200 t destroy_config +ffffffff81bd1290 T i915_perf_ioctl_version +ffffffff81bd1390 t get_sseu_config +ffffffff81bd13e0 t emit_oa_config +ffffffff81bd1ab0 t i915_gem_object_lock +ffffffff81bd1cc0 t append_oa_status +ffffffff81bd1d40 t append_oa_sample +ffffffff81bd1ea0 t lrc_configure_all_contexts +ffffffff81bd2050 t oa_configure_all_contexts +ffffffff81bd2370 t gen8_modify_self +ffffffff81bd2540 t gen8_modify_context +ffffffff81bd26f0 t gen12_configure_oar_context +ffffffff81bd3000 T i915_query_ioctl +ffffffff81bd3100 t query_topology_info +ffffffff81bd3150 t query_engine_info +ffffffff81bd3390 t query_perf_config +ffffffff81bd3690 t query_memregion_info +ffffffff81bd3920 t query_hwconfig_blob +ffffffff81bd39a0 t query_geometry_subslices +ffffffff81bd3a30 t fill_topology_info +ffffffff81bd3bd0 t query_perf_config_data +ffffffff81bd3f30 t copy_perf_config_registers_or_number +ffffffff81bd5000 T i915_request_slab_cache +ffffffff81bd5030 t i915_fence_get_driver_name +ffffffff81bd5060 t i915_fence_get_timeline_name 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intel_pxp_tee_component_fini +ffffffff81bff430 T intel_pxp_tee_cmd_create_arb_session +ffffffff81bff660 T intel_pxp_tee_end_arb_fw_session +ffffffff81bff8d0 t i915_pxp_tee_component_bind +ffffffff81bffa40 t i915_pxp_tee_component_unbind +ffffffff81c00000 T intel_dram_detect +ffffffff81c00430 t gen11_get_dram_info +ffffffff81c00480 t bxt_get_dram_info +ffffffff81c00790 t skl_get_dram_info +ffffffff81c00970 T intel_dram_edram_detect +ffffffff81c00a00 t icl_pcode_read_mem_global_info +ffffffff81c00ae0 t skl_dram_get_channel_info +ffffffff81c00cb0 t skl_dram_get_dimm_info +ffffffff81c01000 T intel_gmch_bridge_setup +ffffffff81c010d0 t intel_gmch_bridge_release +ffffffff81c01100 T intel_gmch_bar_setup +ffffffff81c012f0 T intel_gmch_bar_teardown +ffffffff81c013e0 T intel_gmch_vga_set_state +ffffffff81c02000 T intel_detect_pch +ffffffff81c021b0 t intel_pch_match +ffffffff81c02200 t intel_pch_type +ffffffff81c029c0 t intel_virt_detect_pch +ffffffff81c03000 T vlv_iosf_sb_get +ffffffff81c03020 T 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atombios_set_backlight_level +ffffffff81c12220 T atombios_dig_transmitter_setup +ffffffff81c12240 T radeon_atom_backlight_init +ffffffff81c12420 t radeon_atom_backlight_get_brightness +ffffffff81c12480 T atombios_dvo_setup +ffffffff81c12640 T atombios_digital_setup +ffffffff81c12900 T atombios_get_encoder_mode +ffffffff81c12b90 T atombios_dig_encoder_setup2 +ffffffff81c12fd0 T atombios_dig_encoder_setup +ffffffff81c12ff0 T atombios_dig_transmitter_setup2 +ffffffff81c139d0 T atombios_set_edp_panel_power +ffffffff81c13ae0 T radeon_atom_release_dig_encoder +ffffffff81c13b20 T radeon_atom_pick_dig_encoder +ffffffff81c13d40 T radeon_atom_encoder_init +ffffffff81c13e10 t atombios_external_encoder_setup +ffffffff81c14080 T radeon_atom_ext_encoder_setup_ddc +ffffffff81c140d0 T radeon_enc_destroy +ffffffff81c14180 T radeon_add_atom_encoder +ffffffff81c14590 t radeon_atombios_set_dig_info +ffffffff81c14600 t radeon_atombios_set_dac_info +ffffffff81c14670 t radeon_atom_backlight_update_status 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btc_skip_blacklist_clocks +ffffffff81c18230 T btc_adjust_clock_combinations +ffffffff81c18360 T btc_apply_voltage_delta_rules +ffffffff81c18480 T btc_program_mgcg_hw_sequence +ffffffff81c18580 T btc_dpm_enabled +ffffffff81c18590 T btc_notify_uvd_to_smc +ffffffff81c18600 T btc_reset_to_default +ffffffff81c18650 T btc_read_arb_registers +ffffffff81c186e0 T btc_dpm_vblank_too_short +ffffffff81c18750 T btc_dpm_pre_set_power_state +ffffffff81c19970 T btc_dpm_set_power_state +ffffffff81c19ca0 t btc_set_power_state_conditionally_enable_ulv +ffffffff81c19dd0 T btc_dpm_post_set_power_state +ffffffff81c19ef0 t btc_update_current_ps +ffffffff81c19ff0 T btc_dpm_enable +ffffffff81c1aed0 t btc_cg_clock_gating_enable +ffffffff81c1b000 t btc_mg_clock_gating_enable +ffffffff81c1b120 t btc_ls_clock_gating_enable +ffffffff81c1b250 t btc_init_stutter_mode +ffffffff81c1b2d0 T btc_dpm_disable +ffffffff81c1b5b0 T btc_dpm_setup_asic +ffffffff81c1b690 T btc_dpm_init +ffffffff81c1ba80 T btc_dpm_fini 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ci_populate_initial_mc_reg_table +ffffffff81c20690 t ci_populate_pm_base +ffffffff81c20a00 t ci_dpm_start_smc +ffffffff81c20a80 t ci_enable_vr_hot_gpio_interrupt +ffffffff81c20b20 t ci_notify_smc_display_change +ffffffff81c20bf0 t ci_enable_sclk_control +ffffffff81c20c20 t ci_enable_ulv +ffffffff81c20d70 t ci_enable_ds_master_switch +ffffffff81c20f60 t ci_start_dpm +ffffffff81c21150 t ci_enable_didt +ffffffff81c21400 t ci_enable_smc_cac +ffffffff81c21590 t ci_enable_power_containment +ffffffff81c21a10 t ci_power_control_set_level +ffffffff81c21b20 t ci_enable_auto_throttle_source +ffffffff81c21c00 t ci_enable_thermal_based_sclk_dpm +ffffffff81c21d50 t ci_thermal_start_thermal_controller +ffffffff81c22050 T ci_dpm_late_enable +ffffffff81c220f0 T ci_dpm_disable +ffffffff81c227e0 T ci_dpm_set_power_state +ffffffff81c23450 t ci_update_sclk_t +ffffffff81c234c0 t ci_update_and_upload_mc_reg_table +ffffffff81c23670 t ci_unfreeze_sclk_mclk_dpm +ffffffff81c23820 t ci_notify_link_speed_change_after_state_change +ffffffff81c23950 T ci_dpm_display_configuration_changed +ffffffff81c23ae0 T ci_dpm_fini +ffffffff81c23b90 T ci_dpm_init +ffffffff81c249f0 t ci_initialize_powertune_defaults +ffffffff81c24ae0 t ci_get_leakage_voltages +ffffffff81c24c90 t ci_patch_dependency_tables_with_leakage +ffffffff81c25300 t ci_set_private_data_variables_based_on_pptable +ffffffff81c25410 T ci_dpm_debugfs_print_current_performance_level +ffffffff81c25550 T ci_dpm_print_power_state +ffffffff81c25610 T ci_dpm_get_current_sclk +ffffffff81c256e0 T ci_dpm_get_current_mclk +ffffffff81c257b0 T ci_dpm_get_sclk +ffffffff81c25800 T ci_dpm_get_mclk +ffffffff81c25850 t ci_set_valid_flag +ffffffff81c258f0 t ci_populate_all_graphic_levels +ffffffff81c25e80 t ci_populate_all_memory_levels +ffffffff81c26780 t ci_populate_smc_vce_level +ffffffff81c268a0 t ci_populate_smc_acp_level +ffffffff81c269a0 t ci_populate_smc_samu_level +ffffffff81c26aa0 t ci_do_program_memory_timing_parameters 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cik_pciep_rreg +ffffffff81c292e0 T cik_pciep_wreg +ffffffff81c29350 T cik_get_xclk +ffffffff81c293c0 T cik_mm_rdoorbell +ffffffff81c29420 T cik_mm_wdoorbell +ffffffff81c29470 T ci_mc_load_microcode +ffffffff81c297b0 T cik_ring_test +ffffffff81c29a50 T cik_fence_gfx_ring_emit +ffffffff81c29e40 T cik_fence_compute_ring_emit +ffffffff81c2a0c0 T cik_semaphore_ring_emit +ffffffff81c2a280 T cik_copy_cpdma +ffffffff81c2a6d0 T cik_ring_ib_execute +ffffffff81c2ac70 T cik_ib_test +ffffffff81c2af50 T cik_gfx_get_rptr +ffffffff81c2afb0 T cik_gfx_get_wptr +ffffffff81c2aff0 T cik_gfx_set_wptr +ffffffff81c2b030 T cik_compute_get_rptr +ffffffff81c2b110 T cik_compute_get_wptr +ffffffff81c2b1f0 T cik_compute_set_wptr +ffffffff81c2b270 T cik_gpu_check_soft_reset +ffffffff81c2b3e0 T cik_asic_reset +ffffffff81c2b7f0 t cik_gpu_pci_config_reset +ffffffff81c2c000 T cik_gfx_is_lockup +ffffffff81c2c070 T cik_pcie_gart_tlb_flush +ffffffff81c2c0c0 T cik_ib_parse +ffffffff81c2c0f0 T cik_vm_init +ffffffff81c2c150 T cik_vm_fini +ffffffff81c2c180 T cik_vm_flush +ffffffff81c2cdf0 T cik_enter_rlc_safe_mode +ffffffff81c2cee0 T cik_exit_rlc_safe_mode +ffffffff81c2cf20 T cik_update_cg +ffffffff81c2d420 t cik_enable_mgcg +ffffffff81c2d940 t cik_enable_cgcg +ffffffff81c2dcb0 T cik_init_cp_pg_table +ffffffff81c2df20 T cik_get_csb_size +ffffffff81c2dfb0 T cik_get_csb_buffer +ffffffff81c2e140 T cik_irq_set +ffffffff81c2eec0 t cik_disable_interrupt_state +ffffffff81c2f380 T cik_irq_process +ffffffff81c30b50 t cik_irq_ack +ffffffff81c314d0 T cik_resume +ffffffff81c31560 t cik_init_golden_registers +ffffffff81c31720 t cik_startup +ffffffff81c344f0 T cik_suspend +ffffffff81c348e0 T cik_init +ffffffff81c34e00 t cik_init_microcode +ffffffff81c35b50 t cik_uvd_init +ffffffff81c35c00 t cik_vce_init +ffffffff81c35cd0 t cik_cp_fini +ffffffff81c35d50 t cik_irq_fini +ffffffff81c35e60 t cik_mec_fini +ffffffff81c35f10 t cik_pcie_gart_fini +ffffffff81c36010 T cik_fini +ffffffff81c36330 T dce8_program_fmt +ffffffff81c36460 T dce8_bandwidth_update +ffffffff81c37070 T cik_get_gpu_clock_counter +ffffffff81c37130 T cik_set_uvd_clocks +ffffffff81c371b0 t cik_set_uvd_clock +ffffffff81c37320 T cik_set_vce_clocks +ffffffff81c37560 t cik_wait_for_rlc_serdes +ffffffff81c37720 t cik_mec_init +ffffffff81c37900 t cik_uvd_start +ffffffff81c379e0 t cik_vce_start +ffffffff81c37af0 t cik_irq_init +ffffffff81c38670 t cik_cp_resume +ffffffff81c39e10 t cik_uvd_resume +ffffffff81c39ee0 t cik_vce_resume +ffffffff81c39fd0 t pcie_capability_set_word +ffffffff81c3a0e0 t pcie_capability_read_word +ffffffff81c3a180 t pcie_capability_clear_and_set_word +ffffffff81c3a2a0 t pcie_capability_write_word +ffffffff81c3a360 t cik_get_cu_active_bitmap +ffffffff81c3a4e0 t radeon_bo_reserve +ffffffff81c3a650 t radeon_bo_unreserve +ffffffff81c3a730 t cik_update_gfx_pg +ffffffff81c3a8d0 t cik_compute_stop +ffffffff81c3aa40 t cik_cp_compute_fini +ffffffff81c3abe0 t request_firmware +ffffffff81c3ac70 t release_firmware +ffffffff81c3acb0 t dce8_latency_watermark +ffffffff81c3b000 T cik_sdma_get_rptr +ffffffff81c3b070 T cik_sdma_get_wptr +ffffffff81c3b0c0 T cik_sdma_set_wptr +ffffffff81c3b110 T cik_sdma_ring_ib_execute +ffffffff81c3b510 T cik_sdma_fence_ring_emit +ffffffff81c3b6e0 t cik_sdma_hdp_flush_ring_emit +ffffffff81c3b910 T cik_sdma_semaphore_ring_emit +ffffffff81c3ba30 T cik_sdma_enable +ffffffff81c3bc10 T cik_sdma_resume +ffffffff81c3c0f0 T cik_sdma_fini +ffffffff81c3c130 T cik_copy_dma +ffffffff81c3c530 T cik_sdma_ring_test +ffffffff81c3c7e0 T cik_sdma_ib_test +ffffffff81c3ca40 T cik_sdma_is_lockup +ffffffff81c3cac0 T cik_sdma_vm_copy_pages +ffffffff81c3cbd0 T cik_sdma_vm_write_pages +ffffffff81c3cd40 T cik_sdma_vm_set_pages +ffffffff81c3cec0 T cik_sdma_vm_pad_ib +ffffffff81c3cf10 T cik_dma_vm_flush +ffffffff81c3e000 T cypress_enable_spread_spectrum +ffffffff81c3e140 T cypress_start_dpm +ffffffff81c3e190 T cypress_enable_sclk_control +ffffffff81c3e1f0 T cypress_enable_mclk_control +ffffffff81c3e250 T cypress_notify_smc_display_change +ffffffff81c3e2a0 T cypress_program_response_times +ffffffff81c3e360 T cypress_advertise_gen2_capability +ffffffff81c3e430 T cypress_notify_link_speed_change_after_state_change +ffffffff81c3e4f0 T cypress_notify_link_speed_change_before_state_change +ffffffff81c3e5b0 T cypress_get_strobe_mode_settings +ffffffff81c3e6b0 T cypress_get_mclk_frequency_ratio +ffffffff81c3e760 T cypress_map_clkf_to_ibias +ffffffff81c3e820 T cypress_convert_power_level_to_smc +ffffffff81c3ebf0 t cypress_populate_mclk_value +ffffffff81c3f000 T cypress_upload_sw_state +ffffffff81c3f180 T cypress_upload_mc_reg_table +ffffffff81c3f240 t cypress_convert_mc_reg_table_to_smc +ffffffff81c3f4d0 T cypress_calculate_burst_time +ffffffff81c3f560 T cypress_program_memory_timing_parameters +ffffffff81c3f700 T cypress_populate_smc_initial_state +ffffffff81c3fab0 T cypress_populate_smc_acpi_state +ffffffff81c3fe30 T cypress_construct_voltage_tables +ffffffff81c3ffc0 T cypress_populate_smc_voltage_tables +ffffffff81c400f0 T cypress_get_mvdd_configuration +ffffffff81c401c0 T cypress_populate_mc_reg_table +ffffffff81c40410 T cypress_get_table_locations +ffffffff81c404f0 T cypress_enable_display_gap +ffffffff81c40550 T cypress_dpm_setup_asic +ffffffff81c40640 T cypress_dpm_enable +ffffffff81c41110 t cypress_force_mc_use_s1 +ffffffff81c41390 t cypress_gfx_clock_gating_enable +ffffffff81c416a0 t cypress_mg_clock_gating_enable +ffffffff81c41920 T cypress_dpm_disable +ffffffff81c41b50 T cypress_dpm_set_power_state +ffffffff81c41d90 T cypress_dpm_display_configuration_changed +ffffffff81c41e70 T cypress_dpm_init +ffffffff81c420e0 T cypress_dpm_fini +ffffffff81c42170 T cypress_dpm_vblank_too_short +ffffffff81c421e0 t cypress_wait_for_mc_sequencer +ffffffff81c43000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81c43070 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81c430e0 T dce3_2_afmt_write_sad_regs +ffffffff81c431e0 T dce3_2_audio_set_dto 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sumo_set_uvd_clock +ffffffff81c456b0 T evergreen_set_uvd_clocks +ffffffff81c45c30 T evergreen_fix_pci_max_read_req_size +ffffffff81c45df0 T dce4_program_fmt +ffffffff81c45f10 T dce4_wait_for_vblank +ffffffff81c46190 T evergreen_page_flip +ffffffff81c46320 T evergreen_page_flip_pending +ffffffff81c46390 T evergreen_get_temp +ffffffff81c46460 T sumo_get_temp +ffffffff81c464b0 T sumo_pm_init_profile +ffffffff81c465f0 T btc_pm_init_profile +ffffffff81c46700 T evergreen_pm_misc +ffffffff81c468a0 T evergreen_pm_prepare +ffffffff81c469a0 T evergreen_pm_finish +ffffffff81c46aa0 T evergreen_hpd_sense +ffffffff81c46b10 T evergreen_hpd_set_polarity +ffffffff81c46c50 T evergreen_hpd_init +ffffffff81c46d20 T evergreen_hpd_fini +ffffffff81c46dc0 T evergreen_get_number_of_dram_channels +ffffffff81c46e10 T evergreen_bandwidth_update +ffffffff81c46fd0 t evergreen_line_buffer_adjust +ffffffff81c471c0 t evergreen_program_watermarks +ffffffff81c47c20 T evergreen_mc_wait_for_idle +ffffffff81c47cc0 T evergreen_pcie_gart_tlb_flush +ffffffff81c47d90 T evergreen_mc_stop +ffffffff81c48890 T evergreen_mc_resume +ffffffff81c48fa0 T evergreen_mc_program +ffffffff81c493a0 T evergreen_ring_ib_execute +ffffffff81c49830 T evergreen_mc_init +ffffffff81c49970 T evergreen_print_gpu_status_regs +ffffffff81c499a0 T evergreen_is_display_hung +ffffffff81c49ba0 T evergreen_gpu_check_soft_reset +ffffffff81c49d00 T evergreen_gpu_pci_config_reset +ffffffff81c49e80 T evergreen_asic_reset +ffffffff81c4a1a0 T evergreen_gfx_is_lockup +ffffffff81c4a210 T sumo_rlc_fini +ffffffff81c4a3c0 t radeon_bo_reserve +ffffffff81c4a530 t radeon_bo_unreserve +ffffffff81c4a610 T sumo_rlc_init +ffffffff81c4ade0 T evergreen_rlc_resume +ffffffff81c4b150 T evergreen_get_vblank_counter +ffffffff81c4b1c0 T evergreen_disable_interrupt_state +ffffffff81c4b490 T evergreen_irq_set +ffffffff81c4ba50 T evergreen_irq_suspend +ffffffff81c4baa0 T evergreen_irq_process +ffffffff81c4c5f0 t evergreen_irq_ack +ffffffff81c4ccb0 T evergreen_resume +ffffffff81c4cd90 t evergreen_init_golden_registers +ffffffff81c4cfa0 t evergreen_startup +ffffffff81c4e830 T evergreen_suspend +ffffffff81c4e9d0 T evergreen_init +ffffffff81c4edd0 t evergreen_pcie_gart_fini +ffffffff81c4eef0 T evergreen_fini +ffffffff81c4f0e0 T evergreen_pcie_gen2_enable +ffffffff81c4f310 T evergreen_program_aspm +ffffffff81c4f9a0 t evergreen_latency_watermark +ffffffff81c4fba0 t evergreen_uvd_start +ffffffff81c4fc50 t evergreen_cp_load_microcode +ffffffff81c4fdb0 t evergreen_cp_resume +ffffffff81c50a20 t evergreen_uvd_resume +ffffffff81c51000 T evergreen_cs_parse +ffffffff81c53760 T evergreen_dma_cs_parse +ffffffff81c548d0 T evergreen_ib_parse +ffffffff81c54d30 T evergreen_dma_ib_parse +ffffffff81c54f00 t evergreen_cs_track_check +ffffffff81c55f70 t evergreen_cs_handle_reg +ffffffff81c57dd0 t evergreen_surface_value_conv_check +ffffffff81c580a0 t evergreen_surface_check +ffffffff81c58510 t evergreen_cs_track_validate_htile +ffffffff81c587b0 t evergreen_vm_reg_valid +ffffffff81c59000 T evergreen_dma_fence_ring_emit +ffffffff81c592b0 T evergreen_dma_ring_ib_execute +ffffffff81c59600 T evergreen_copy_dma +ffffffff81c599a0 T evergreen_dma_is_lockup +ffffffff81c5a000 T dce4_audio_enable +ffffffff81c5a080 T evergreen_hdmi_update_acr +ffffffff81c5a2a0 T dce4_afmt_write_latency_fields +ffffffff81c5a310 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c5a380 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c5a3f0 T evergreen_hdmi_write_sad_regs +ffffffff81c5a4f0 T evergreen_set_avi_packet +ffffffff81c5a690 T dce4_hdmi_audio_set_dto +ffffffff81c5a770 T dce4_dp_audio_set_dto +ffffffff81c5a860 T dce4_set_vbi_packet +ffffffff81c5a8d0 T dce4_hdmi_set_color_depth +ffffffff81c5aa20 T dce4_set_audio_packet +ffffffff81c5ac30 T dce4_set_mute +ffffffff81c5ad40 T evergreen_hdmi_enable +ffffffff81c5b070 T evergreen_dp_enable +ffffffff81c5c000 T kv_dpm_enable_bapm +ffffffff81c5c070 T kv_dpm_enable +ffffffff81c5cf70 t kv_populate_vce_table +ffffffff81c5d1f0 t kv_populate_samu_table +ffffffff81c5d450 t kv_populate_acp_table +ffffffff81c5d5e0 t kv_start_am +ffffffff81c5d620 t kv_enable_auto_thermal_throttling +ffffffff81c5d660 t kv_enable_dpm_voltage_scaling +ffffffff81c5d6a0 t kv_set_dpm_interval +ffffffff81c5d6e0 t kv_start_dpm +ffffffff81c5d720 t kv_enable_didt +ffffffff81c5d9d0 T kv_dpm_late_enable +ffffffff81c5dbd0 T kv_dpm_powergate_uvd +ffffffff81c5dd50 T kv_dpm_disable +ffffffff81c5e0c0 T kv_dpm_force_performance_level +ffffffff81c5e240 t kv_force_dpm_lowest +ffffffff81c5e310 T kv_dpm_pre_set_power_state +ffffffff81c5e890 T kv_dpm_set_power_state +ffffffff81c5f060 t kv_set_valid_clock_range +ffffffff81c5f200 t kv_calculate_ds_divider +ffffffff81c5f370 t kv_calculate_nbps_level_settings +ffffffff81c5f4f0 t kv_update_vce_dpm +ffffffff81c5f6d0 T kv_dpm_post_set_power_state +ffffffff81c5f770 T kv_dpm_setup_asic +ffffffff81c5f7d0 T kv_dpm_init +ffffffff81c60080 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c600f0 T kv_dpm_get_current_sclk +ffffffff81c60160 T kv_dpm_get_current_mclk +ffffffff81c60190 T kv_dpm_print_power_state +ffffffff81c60230 T kv_dpm_fini +ffffffff81c602d0 T kv_dpm_display_configuration_changed +ffffffff81c60300 T kv_dpm_get_sclk +ffffffff81c60350 T kv_dpm_get_mclk +ffffffff81c61000 T kv_notify_message_to_smu +ffffffff81c610c0 T kv_dpm_get_enable_mask +ffffffff81c61190 T kv_send_msg_to_smc_with_parameter +ffffffff81c61260 T kv_read_smc_sram_dword +ffffffff81c612f0 T kv_smc_dpm_enable +ffffffff81c61420 T kv_smc_bapm_enable +ffffffff81c61550 T kv_copy_bytes_to_smc +ffffffff81c62000 T tn_smc_rreg +ffffffff81c62080 T tn_smc_wreg +ffffffff81c620f0 T ni_mc_load_microcode +ffffffff81c622e0 T ni_init_microcode +ffffffff81c627b0 t request_firmware +ffffffff81c62840 t release_firmware +ffffffff81c62880 T cayman_get_allowed_info_register +ffffffff81c62910 T tn_get_temp +ffffffff81c629a0 T cayman_pcie_gart_tlb_flush +ffffffff81c629f0 T cayman_cp_int_cntl_setup +ffffffff81c62a40 T cayman_fence_ring_emit +ffffffff81c62dd0 T cayman_ring_ib_execute +ffffffff81c63230 T cayman_gfx_get_rptr +ffffffff81c632c0 T cayman_gfx_get_wptr +ffffffff81c63330 T cayman_gfx_set_wptr +ffffffff81c633b0 T cayman_gpu_check_soft_reset +ffffffff81c63540 T cayman_asic_reset +ffffffff81c63840 T cayman_gfx_is_lockup +ffffffff81c638b0 T cayman_resume +ffffffff81c63940 t ni_init_golden_registers +ffffffff81c63a20 t cayman_startup +ffffffff81c64e60 T cayman_suspend +ffffffff81c65050 T cayman_init +ffffffff81c653c0 t cayman_uvd_init +ffffffff81c65470 t cayman_vce_init +ffffffff81c65540 t cayman_cp_fini +ffffffff81c655c0 t cayman_pcie_gart_fini +ffffffff81c65700 T cayman_fini +ffffffff81c65980 T cayman_vm_init +ffffffff81c659e0 T cayman_vm_fini +ffffffff81c65a10 T cayman_vm_decode_fault +ffffffff81c65aa0 T cayman_vm_flush +ffffffff81c65f00 T tn_set_vce_clocks +ffffffff81c66160 t cayman_uvd_start +ffffffff81c66210 t cayman_vce_start +ffffffff81c66320 t cayman_cp_load_microcode +ffffffff81c664b0 t cayman_cp_resume +ffffffff81c67370 t cayman_uvd_resume +ffffffff81c67440 t cayman_vce_resume +ffffffff81c68000 T cayman_dma_get_rptr +ffffffff81c68070 T cayman_dma_get_wptr +ffffffff81c680c0 T cayman_dma_set_wptr +ffffffff81c68110 T cayman_dma_ring_ib_execute +ffffffff81c684a0 T cayman_dma_stop +ffffffff81c68550 T cayman_dma_resume +ffffffff81c687b0 T cayman_dma_fini +ffffffff81c68870 T cayman_dma_is_lockup +ffffffff81c688f0 T cayman_dma_vm_copy_pages +ffffffff81c689f0 T cayman_dma_vm_write_pages +ffffffff81c68b50 T cayman_dma_vm_set_pages +ffffffff81c68cc0 T cayman_dma_vm_pad_ib +ffffffff81c68d10 T cayman_dma_vm_flush +ffffffff81c6a000 T ni_get_pi +ffffffff81c6a030 T ni_get_ps +ffffffff81c6a060 T ni_dpm_vblank_too_short +ffffffff81c6a0d0 T ni_dpm_force_performance_level +ffffffff81c6a220 T ni_copy_and_switch_arb_sets +ffffffff81c6a4f0 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c6a570 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c6a5f0 T ni_dpm_setup_asic +ffffffff81c6a800 T ni_update_current_ps +ffffffff81c6a8c0 T ni_update_requested_ps +ffffffff81c6a980 T ni_dpm_enable +ffffffff81c6b7e0 t ni_init_smc_table +ffffffff81c6c190 t ni_init_smc_spll_table +ffffffff81c6c300 t ni_init_arb_table_index +ffffffff81c6c3a0 t ni_populate_mc_reg_table +ffffffff81c6c6e0 t ni_initialize_smc_cac_tables +ffffffff81c6d960 t ni_initialize_hardware_cac_manager +ffffffff81c6de90 t ni_populate_smc_tdp_limits +ffffffff81c6e040 t ni_program_response_times +ffffffff81c6e150 T ni_dpm_disable +ffffffff81c6e510 t ni_enable_power_containment +ffffffff81c6e5d0 t ni_enable_smc_cac +ffffffff81c6e6f0 T ni_dpm_pre_set_power_state +ffffffff81c6ecd0 T ni_dpm_set_power_state +ffffffff81c6efc0 t ni_upload_sw_state +ffffffff81c6fbb0 t ni_upload_mc_reg_table +ffffffff81c6fd60 t ni_power_control_set_level +ffffffff81c6fe30 T ni_dpm_post_set_power_state +ffffffff81c6ff00 T ni_dpm_init +ffffffff81c708a0 T ni_dpm_fini +ffffffff81c70950 T ni_dpm_print_power_state +ffffffff81c70a20 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c70a60 T ni_dpm_get_current_sclk +ffffffff81c70ad0 T ni_dpm_get_current_mclk +ffffffff81c70b40 T ni_dpm_get_sclk +ffffffff81c70ba0 T ni_dpm_get_mclk +ffffffff81c70c00 t ni_do_program_memory_timing_parameters +ffffffff81c70d40 t ni_calculate_sclk_params +ffffffff81c70f70 t ni_calculate_power_boost_limit +ffffffff81c71130 t ni_populate_mclk_value +ffffffff81c72000 T r100_wait_for_vblank +ffffffff81c72190 T r100_page_flip +ffffffff81c72450 T r100_page_flip_pending +ffffffff81c72500 T r100_pm_get_dynpm_state +ffffffff81c72720 T r100_pm_init_profile +ffffffff81c72800 T r100_pm_misc +ffffffff81c72c40 T r100_pm_prepare +ffffffff81c72cf0 T r100_pm_finish +ffffffff81c72da0 T r100_gui_idle +ffffffff81c72de0 T r100_hpd_sense +ffffffff81c72e40 T r100_hpd_set_polarity +ffffffff81c72f00 T r100_hpd_init +ffffffff81c72fa0 T r100_hpd_fini +ffffffff81c73010 T r100_pci_gart_tlb_flush +ffffffff81c73040 T r100_pci_gart_init +ffffffff81c73110 T r100_pci_gart_get_page_entry +ffffffff81c73140 T r100_pci_gart_set_page +ffffffff81c73180 T r100_pci_gart_enable +ffffffff81c73270 T r100_pci_gart_disable +ffffffff81c732f0 T r100_pci_gart_fini +ffffffff81c73370 T r100_irq_set +ffffffff81c73450 T r100_irq_disable +ffffffff81c734c0 T r100_irq_process +ffffffff81c737c0 T r100_get_vblank_counter +ffffffff81c73810 T r100_fence_ring_emit +ffffffff81c73c70 T r100_semaphore_ring_emit +ffffffff81c73ca0 T r100_copy_blit +ffffffff81c74330 T r100_ring_start +ffffffff81c74420 T r100_gfx_get_rptr +ffffffff81c74480 T r100_gfx_get_wptr +ffffffff81c744c0 T r100_gfx_set_wptr +ffffffff81c74500 T r100_cp_init +ffffffff81c74a30 T r100_debugfs_cp_init +ffffffff81c74a60 T r100_cp_fini +ffffffff81c74b00 T r100_cp_disable +ffffffff81c74c40 T r100_gui_wait_for_idle +ffffffff81c74d30 T r100_reloc_pitch_offset +ffffffff81c74e70 T r100_packet3_load_vbpntr +ffffffff81c75110 T r100_cs_parse_packet0 +ffffffff81c75220 T r100_cs_packet_parse_vline +ffffffff81c75430 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c754b0 T r100_cs_parse +ffffffff81c766a0 T r100_cs_track_clear +ffffffff81c76a30 T r100_cs_track_check +ffffffff81c77240 T r100_mc_wait_for_idle +ffffffff81c772e0 T r100_gpu_is_lockup +ffffffff81c77340 T r100_enable_bm +ffffffff81c77390 T r100_bm_disable +ffffffff81c77440 T r100_asic_reset +ffffffff81c77770 T r100_mc_stop +ffffffff81c77930 T r100_mc_resume +ffffffff81c779f0 T r100_set_common_regs +ffffffff81c77b90 T r100_vram_init_sizes +ffffffff81c77d80 T r100_vga_set_state +ffffffff81c77de0 T r100_pll_errata_after_index +ffffffff81c77e20 T r100_pll_rreg +ffffffff81c77f50 T r100_pll_wreg +ffffffff81c78060 T r100_debugfs_rbbm_init +ffffffff81c78090 T r100_debugfs_mc_info_init +ffffffff81c780c0 T r100_set_surface_reg +ffffffff81c782d0 T r100_clear_surface_reg +ffffffff81c78380 T r100_bandwidth_update +ffffffff81c78dd0 T r100_ring_test +ffffffff81c79080 T r100_ring_ib_execute +ffffffff81c792e0 T r100_ib_test +ffffffff81c79620 T r100_vga_render_disable +ffffffff81c79680 T r100_resume +ffffffff81c79870 t r100_startup +ffffffff81c79db0 T r100_suspend +ffffffff81c79e90 T r100_fini +ffffffff81c79fa0 T r100_restore_sanity +ffffffff81c7a040 T r100_init +ffffffff81c7a490 t r100_set_safe_registers +ffffffff81c7a510 T r100_mm_rreg_slow +ffffffff81c7a590 T r100_mm_wreg_slow +ffffffff81c7a5f0 T r100_io_rreg +ffffffff81c7a690 T r100_io_wreg +ffffffff81c7a700 t r100_get_vtx_size +ffffffff81c7a7f0 t r100_cs_track_texture_print +ffffffff81c7b000 T r200_copy_dma +ffffffff81c7b470 T r200_packet0_check +ffffffff81c7c240 t r200_get_vtx_size_0 +ffffffff81c7c400 t r200_get_vtx_size_1 +ffffffff81c7c490 T r200_set_safe_registers +ffffffff81c7d000 T rv370_pcie_rreg +ffffffff81c7d080 T rv370_pcie_wreg +ffffffff81c7d0f0 T rv370_pcie_gart_tlb_flush +ffffffff81c7d2f0 T rv370_pcie_gart_get_page_entry +ffffffff81c7d350 T rv370_pcie_gart_set_page +ffffffff81c7d390 T rv370_pcie_gart_init +ffffffff81c7d460 T rv370_pcie_gart_enable +ffffffff81c7d7c0 T rv370_pcie_gart_disable +ffffffff81c7d940 T rv370_pcie_gart_fini +ffffffff81c7d970 T r300_fence_ring_emit +ffffffff81c7dee0 T r300_ring_start +ffffffff81c7e850 T r300_mc_wait_for_idle +ffffffff81c7e8f0 T r300_asic_reset +ffffffff81c7eb10 T r300_mc_init +ffffffff81c7ebc0 T rv370_set_pcie_lanes +ffffffff81c7ed80 T rv370_get_pcie_lanes +ffffffff81c7ee30 T r300_cs_parse +ffffffff81c7f1a0 t r300_packet0_check +ffffffff81c80060 T r300_set_reg_safe +ffffffff81c800a0 T r300_mc_program +ffffffff81c80230 T r300_clock_startup +ffffffff81c802c0 T r300_resume +ffffffff81c80490 t r300_startup +ffffffff81c807f0 T r300_suspend +ffffffff81c80870 T r300_fini +ffffffff81c80950 T r300_init +ffffffff81c81000 T r420_pm_init_profile +ffffffff81c810f0 T r420_pipes_init +ffffffff81c812d0 T r420_mc_rreg +ffffffff81c81350 T r420_mc_wreg +ffffffff81c813c0 T r420_resume +ffffffff81c81590 t r420_startup +ffffffff81c81790 T r420_suspend +ffffffff81c81930 T r420_fini +ffffffff81c81a10 T r420_init +ffffffff81c81c90 T r420_debugfs_pipes_info_init +ffffffff81c81cc0 t r420_cp_errata_init +ffffffff81c82000 T r520_mc_wait_for_idle +ffffffff81c820a0 T r520_resume +ffffffff81c82190 t r520_startup +ffffffff81c82580 T r520_init +ffffffff81c83000 T r600_rcu_rreg +ffffffff81c83080 T r600_rcu_wreg +ffffffff81c830f0 T r600_uvd_ctx_rreg +ffffffff81c83170 T r600_uvd_ctx_wreg +ffffffff81c831e0 T r600_get_allowed_info_register +ffffffff81c83260 T r600_get_xclk +ffffffff81c83290 T r600_set_uvd_clocks +ffffffff81c837f0 T dce3_program_fmt +ffffffff81c83910 T rv6xx_get_temp +ffffffff81c83960 T r600_pm_get_dynpm_state +ffffffff81c83d70 T rs780_pm_init_profile +ffffffff81c83e80 T r600_pm_init_profile +ffffffff81c84120 T r600_pm_misc +ffffffff81c84200 T r600_gui_idle +ffffffff81c84240 T r600_hpd_sense +ffffffff81c84360 T r600_hpd_set_polarity +ffffffff81c845e0 T r600_hpd_init +ffffffff81c847c0 T r600_hpd_fini +ffffffff81c84970 T r600_pcie_gart_tlb_flush +ffffffff81c84aa0 T r600_pcie_gart_init +ffffffff81c84b40 T r600_mc_wait_for_idle +ffffffff81c84be0 T rs780_mc_rreg +ffffffff81c84c80 T rs780_mc_wreg +ffffffff81c84d10 T r600_vram_scratch_init +ffffffff81c84e10 t radeon_bo_reserve +ffffffff81c84f80 t radeon_bo_unreserve +ffffffff81c85060 T r600_vram_scratch_fini +ffffffff81c850e0 T r600_set_bios_scratch_engine_hung +ffffffff81c85130 T r600_gpu_check_soft_reset +ffffffff81c854d0 T r600_asic_reset +ffffffff81c85860 t r600_gpu_pci_config_reset +ffffffff81c85a70 T r600_gfx_is_lockup +ffffffff81c85ae0 T r6xx_remap_render_backend +ffffffff81c85ca0 T r600_count_pipe_bits +ffffffff81c85d10 T r600_pciep_rreg +ffffffff81c85d90 T r600_pciep_wreg +ffffffff81c85e00 T r600_cp_stop +ffffffff81c85e80 T r600_init_microcode +ffffffff81c86340 t request_firmware +ffffffff81c863d0 t release_firmware +ffffffff81c86410 T r600_gfx_get_rptr +ffffffff81c86470 T r600_gfx_get_wptr +ffffffff81c864b0 T r600_gfx_set_wptr +ffffffff81c864f0 T r600_cp_start +ffffffff81c86860 T r600_cp_resume +ffffffff81c86bc0 T r600_ring_init +ffffffff81c86c60 T r600_cp_fini +ffffffff81c86cf0 T r600_scratch_init +ffffffff81c86d60 T r600_ring_test +ffffffff81c87000 T r600_fence_ring_emit +ffffffff81c878a0 T r600_semaphore_ring_emit +ffffffff81c87a80 T r600_copy_cpdma +ffffffff81c88030 T r600_set_surface_reg +ffffffff81c88060 T r600_clear_surface_reg +ffffffff81c88090 T r600_vga_set_state +ffffffff81c880f0 T r600_resume +ffffffff81c88180 t r600_startup +ffffffff81c89e60 T r600_suspend +ffffffff81c89fd0 T r600_irq_suspend +ffffffff81c8a090 t r600_pcie_gart_disable +ffffffff81c8a290 T r600_init +ffffffff81c8a9f0 T r600_ih_ring_init +ffffffff81c8aa60 T r600_irq_fini +ffffffff81c8aba0 t r600_pcie_gart_fini +ffffffff81c8abd0 T r600_fini +ffffffff81c8ad60 T r600_ring_ib_execute +ffffffff81c8b1f0 T r600_ib_test +ffffffff81c8b4a0 T r600_ih_ring_alloc +ffffffff81c8b5c0 T r600_ih_ring_fini +ffffffff81c8b650 T r600_rlc_stop +ffffffff81c8b7e0 T r600_disable_interrupts +ffffffff81c8b890 T r600_irq_init +ffffffff81c8bcf0 t r600_disable_interrupt_state +ffffffff81c8bff0 T r600_irq_disable +ffffffff81c8c0b0 T r600_irq_set +ffffffff81c8c830 t r600_irq_ack +ffffffff81c8cd60 T r600_irq_process +ffffffff81c8d960 T r600_mmio_hdp_flush +ffffffff81c8d9e0 T r600_set_pcie_lanes +ffffffff81c8db10 T r600_get_pcie_lanes +ffffffff81c8dbe0 T r600_get_gpu_clock_counter +ffffffff81c8dc70 t r600_cp_load_microcode +ffffffff81c8df40 t r600_uvd_resume +ffffffff81c8f000 T r600_fmt_is_valid_color +ffffffff81c8f040 T r600_fmt_is_valid_texture +ffffffff81c8f090 T r600_fmt_get_blocksize +ffffffff81c8f0d0 T r600_fmt_get_nblocksx +ffffffff81c8f120 T r600_fmt_get_nblocksy +ffffffff81c8f180 T r600_cs_common_vline_parse +ffffffff81c8f440 T r600_mip_minify +ffffffff81c8f4a0 T r600_cs_parse +ffffffff81c91360 T r600_dma_cs_next_reloc +ffffffff81c913e0 T r600_dma_cs_parse +ffffffff81c91a80 t r600_cs_track_check +ffffffff81c92bc0 t r600_cs_check_reg +ffffffff81c93ae0 t r600_is_safe_reg +ffffffff81c93b80 t r600_texture_size +ffffffff81c94000 T r600_dma_get_rptr +ffffffff81c94060 T r600_dma_get_wptr +ffffffff81c940a0 T r600_dma_set_wptr +ffffffff81c940e0 T r600_dma_stop +ffffffff81c94170 T r600_dma_resume +ffffffff81c94370 T r600_dma_fini +ffffffff81c943f0 T r600_dma_is_lockup +ffffffff81c94460 T r600_dma_ring_test +ffffffff81c946d0 T r600_dma_fence_ring_emit +ffffffff81c948b0 T r600_dma_semaphore_ring_emit +ffffffff81c949d0 T r600_dma_ib_test +ffffffff81c94bf0 T r600_dma_ring_ib_execute +ffffffff81c94f40 T r600_copy_dma +ffffffff81c96000 T r600_dpm_print_class_info +ffffffff81c962b0 T r600_dpm_print_cap_info +ffffffff81c96340 T r600_dpm_print_ps_status +ffffffff81c963d0 T r600_dpm_get_vblank_time +ffffffff81c96490 T r600_dpm_get_vrefresh +ffffffff81c96520 T r600_calculate_u_and_p +ffffffff81c965a0 T r600_calculate_at +ffffffff81c96650 T r600_gfx_clockgating_enable +ffffffff81c96750 T r600_dynamicpm_enable +ffffffff81c967a0 T r600_enable_thermal_protection +ffffffff81c96800 T r600_enable_acpi_pm +ffffffff81c96850 T r600_enable_dynamic_pcie_gen2 +ffffffff81c968a0 T r600_dynamicpm_enabled +ffffffff81c968e0 T r600_enable_sclk_control +ffffffff81c96940 T r600_enable_mclk_control +ffffffff81c969a0 T r600_enable_spll_bypass +ffffffff81c969f0 T r600_wait_for_spll_change +ffffffff81c96a70 T r600_set_bsp +ffffffff81c96ab0 T r600_set_at +ffffffff81c96b10 T r600_set_tc +ffffffff81c96b70 T r600_select_td +ffffffff81c96c20 T r600_set_vrc +ffffffff81c96c60 T r600_set_tpu +ffffffff81c96cc0 T r600_set_tpc +ffffffff81c96d20 T r600_set_sstu +ffffffff81c96d80 T r600_set_sst +ffffffff81c96dd0 T r600_set_git +ffffffff81c96e20 T r600_set_fctu +ffffffff81c96e80 T r600_set_fct +ffffffff81c96ed0 T r600_set_ctxcgtt3d_rphc +ffffffff81c96f30 T r600_set_ctxcgtt3d_rsdc +ffffffff81c96f90 T r600_set_vddc3d_oorsu +ffffffff81c96ff0 T r600_set_vddc3d_oorphc +ffffffff81c97050 T r600_set_vddc3d_oorsdc +ffffffff81c970b0 T r600_set_mpll_lock_time +ffffffff81c97100 T r600_set_mpll_reset_time +ffffffff81c97150 T r600_engine_clock_entry_enable +ffffffff81c97250 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c97350 T r600_engine_clock_entry_enable_post_divider +ffffffff81c97450 T r600_engine_clock_entry_set_post_divider +ffffffff81c97510 T r600_engine_clock_entry_set_reference_divider +ffffffff81c975d0 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c97690 T r600_engine_clock_entry_set_step_time +ffffffff81c97750 T r600_vid_rt_set_ssu +ffffffff81c977b0 T r600_vid_rt_set_vru +ffffffff81c97810 T r600_vid_rt_set_vrt +ffffffff81c97870 T r600_voltage_control_enable_pins +ffffffff81c978c0 T r600_voltage_control_program_voltages +ffffffff81c97950 T r600_voltage_control_deactivate_static_control +ffffffff81c979e0 T r600_power_level_enable +ffffffff81c97a50 T r600_power_level_set_voltage_index +ffffffff81c97ac0 T r600_power_level_set_mem_clock_index +ffffffff81c97b20 T r600_power_level_set_eng_clock_index +ffffffff81c97b90 T r600_power_level_set_watermark_id +ffffffff81c97c00 T r600_power_level_set_pcie_gen2 +ffffffff81c97c60 T r600_power_level_get_current_index +ffffffff81c97ca0 T r600_power_level_get_target_index +ffffffff81c97ce0 T r600_power_level_set_enter_index +ffffffff81c97d40 T r600_wait_for_power_level_unequal +ffffffff81c97e30 T r600_wait_for_power_level +ffffffff81c97f20 T r600_start_dpm +ffffffff81c98200 T r600_stop_dpm +ffffffff81c98250 T r600_dpm_pre_set_power_state +ffffffff81c98280 T r600_dpm_post_set_power_state +ffffffff81c982b0 T r600_is_uvd_state +ffffffff81c982f0 T r600_is_internal_thermal_sensor +ffffffff81c98330 T r600_dpm_late_enable +ffffffff81c98440 T r600_get_platform_caps +ffffffff81c984e0 T r600_parse_extended_power_table +ffffffff81c992a0 T r600_free_extended_power_table +ffffffff81c993a0 T r600_get_pcie_gen_support +ffffffff81c993f0 T r600_get_pcie_lane_support +ffffffff81c99450 T r600_encode_pci_lane_width +ffffffff81c9a000 T r600_audio_update_hdmi +ffffffff81c9a170 t r600_audio_status +ffffffff81c9a290 T r600_hdmi_buffer_status_changed +ffffffff81c9a330 T r600_hdmi_update_audio_settings +ffffffff81c9a700 T r600_audio_enable +ffffffff81c9a780 T r600_audio_get_pin +ffffffff81c9a7b0 T r600_hdmi_update_acr +ffffffff81c9ab50 T r600_set_avi_packet +ffffffff81c9ad50 T r600_hdmi_audio_workaround +ffffffff81c9ae20 T r600_hdmi_audio_set_dto +ffffffff81c9aee0 T r600_set_vbi_packet +ffffffff81c9afa0 T r600_set_audio_packet +ffffffff81c9b270 T r600_set_mute +ffffffff81c9b380 T r600_hdmi_enable +ffffffff81c9c000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c9c040 T radeon_acpi_pcie_notify_device_ready +ffffffff81c9c160 T radeon_acpi_pcie_performance_request +ffffffff81c9c4f0 T radeon_acpi_init +ffffffff81c9cc60 t radeon_acpi_event +ffffffff81c9cf60 T radeon_acpi_fini +ffffffff81c9d000 T radeon_agp_head_init +ffffffff81c9d050 T radeon_agp_init +ffffffff81c9d0a0 T radeon_agp_resume +ffffffff81c9d130 T radeon_agp_fini +ffffffff81c9d180 T radeon_agp_suspend +ffffffff81c9e000 T radeon_agp_disable +ffffffff81c9e120 T radeon_asic_init +ffffffff81c9e8f0 t radeon_invalid_rreg +ffffffff81c9e930 t radeon_invalid_wreg +ffffffff81c9e970 t radeon_invalid_get_allowed_info_register +ffffffff81c9f000 T radeon_atombios_i2c_init +ffffffff81c9f3a0 T radeon_atombios_lookup_gpio +ffffffff81c9f4a0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c9fde0 t radeon_lookup_i2c_gpio +ffffffff81ca00d0 t radeon_atom_apply_quirks +ffffffff81ca04f0 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81ca09f0 T radeon_atom_get_clock_info +ffffffff81ca0dd0 T radeon_atombios_sideport_present +ffffffff81ca0e80 T radeon_atombios_get_tmds_info +ffffffff81ca0fc0 T radeon_atombios_get_ppll_ss_info +ffffffff81ca10e0 T radeon_atombios_get_asic_ss_info +ffffffff81ca13c0 t radeon_atombios_get_igp_ss_overrides +ffffffff81ca14d0 T radeon_atombios_get_lvds_info +ffffffff81ca1830 T radeon_atombios_get_primary_dac_info +ffffffff81ca18f0 T radeon_atom_get_tv_timings +ffffffff81ca1b30 T radeon_atombios_get_tv_info +ffffffff81ca1bf0 T radeon_atombios_get_tv_dac_info +ffffffff81ca1cf0 T radeon_atombios_get_default_voltages +ffffffff81ca1db0 T radeon_atombios_get_power_modes +ffffffff81ca2e20 T radeon_atom_get_clock_dividers +ffffffff81ca3110 T radeon_atom_get_memory_pll_dividers +ffffffff81ca3250 T radeon_atom_set_clock_gating +ffffffff81ca32a0 T radeon_atom_get_engine_clock +ffffffff81ca32f0 T radeon_atom_get_memory_clock +ffffffff81ca3340 T radeon_atom_set_engine_clock +ffffffff81ca3390 T radeon_atom_set_memory_clock +ffffffff81ca33f0 T radeon_atom_set_engine_dram_timings +ffffffff81ca3460 T radeon_atom_update_memory_dll +ffffffff81ca34b0 T radeon_atom_set_ac_timing +ffffffff81ca3500 T radeon_atom_set_voltage +ffffffff81ca35d0 T radeon_atom_get_max_vddc +ffffffff81ca36b0 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81ca3780 T radeon_atom_get_leakage_id_from_vbios +ffffffff81ca3840 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81ca3a60 T radeon_atom_get_voltage_evv +ffffffff81ca3b20 T radeon_atom_get_voltage_gpio_settings +ffffffff81ca3c20 T radeon_atom_is_voltage_gpio +ffffffff81ca3db0 T radeon_atom_get_svi2_info +ffffffff81ca3ea0 T radeon_atom_get_max_voltage +ffffffff81ca4030 T radeon_atom_get_min_voltage +ffffffff81ca4170 T radeon_atom_get_voltage_step +ffffffff81ca4270 T radeon_atom_round_to_true_voltage +ffffffff81ca43d0 T radeon_atom_get_voltage_table +ffffffff81ca4640 T radeon_atom_get_memory_info +ffffffff81ca47f0 T radeon_atom_get_mclk_range_table +ffffffff81ca4a30 T radeon_atom_init_mc_reg_table +ffffffff81ca4ca0 T radeon_atom_initialize_bios_scratch_regs +ffffffff81ca4d70 T radeon_save_bios_scratch_regs +ffffffff81ca4e50 T radeon_restore_bios_scratch_regs +ffffffff81ca4f30 T radeon_atom_output_lock +ffffffff81ca4fc0 T radeon_atombios_connected_scratch_regs +ffffffff81ca5730 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81ca5880 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81ca5ab0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81ca5c90 t radeon_atombios_add_pplib_thermal_controller +ffffffff81ca6090 t radeon_atombios_parse_pplib_clock_info +ffffffff81ca6440 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81ca7000 T radeon_audio_init +ffffffff81ca71f0 t radeon_audio_enable +ffffffff81ca7350 T radeon_audio_endpoint_rreg +ffffffff81ca7390 T radeon_audio_endpoint_wreg +ffffffff81ca73d0 T radeon_audio_get_pin +ffffffff81ca7420 T radeon_audio_detect +ffffffff81ca7580 T radeon_audio_fini +ffffffff81ca7610 T radeon_audio_mode_set +ffffffff81ca7660 T radeon_audio_dpms +ffffffff81ca76b0 T radeon_audio_decode_dfs_div +ffffffff81ca7710 T radeon_audio_component_init +ffffffff81ca7780 T radeon_audio_component_fini +ffffffff81ca77d0 t radeon_audio_hdmi_mode_set +ffffffff81ca7eb0 t radeon_audio_write_speaker_allocation +ffffffff81ca7f60 t radeon_audio_write_sad_regs +ffffffff81ca8030 t radeon_audio_set_avi_packet +ffffffff81ca8170 t radeon_audio_dp_mode_set +ffffffff81ca82f0 t radeon_audio_rreg +ffffffff81ca8340 t radeon_audio_wreg +ffffffff81ca9000 T radeon_benchmark +ffffffff81ca9940 t radeon_benchmark_move +ffffffff81ca9c20 t radeon_bo_reserve +ffffffff81ca9d90 t radeon_bo_unreserve +ffffffff81ca9e70 t radeon_benchmark_do_move +ffffffff81caa000 T radeon_get_bios +ffffffff81caafc0 t igp_read_bios_from_vram +ffffffff81cab0d0 t radeon_read_bios +ffffffff81cac000 T radeon_legacy_get_engine_clock +ffffffff81cac0d0 T radeon_legacy_get_memory_clock +ffffffff81cac1a0 T radeon_get_clock_info +ffffffff81cac730 T radeon_legacy_set_engine_clock +ffffffff81caca80 T radeon_legacy_set_clock_gating +ffffffff81cae000 T radeon_combios_check_hardcoded_edid +ffffffff81cae100 t combios_get_table_offset +ffffffff81cae690 T radeon_bios_get_hardcoded_edid +ffffffff81cae710 T radeon_combios_i2c_init +ffffffff81caedb0 t combios_setup_i2c_bus +ffffffff81caf0a0 t radeon_combios_get_i2c_info_from_table +ffffffff81caf2f0 T radeon_combios_get_clock_info +ffffffff81caf4e0 T radeon_combios_sideport_present +ffffffff81caf560 T radeon_combios_get_primary_dac_info +ffffffff81caf6b0 T radeon_combios_get_tv_info +ffffffff81caf7b0 T radeon_combios_get_tv_dac_info +ffffffff81cafa40 T radeon_combios_get_lvds_info +ffffffff81cb00b0 T radeon_legacy_get_tmds_info_from_table +ffffffff81cb0180 T radeon_legacy_get_tmds_info_from_combios +ffffffff81cb0390 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81cb05c0 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81cb0900 T radeon_get_legacy_connector_info_from_table +ffffffff81cb2a70 T radeon_get_legacy_connector_info_from_bios +ffffffff81cb3660 T radeon_combios_get_power_modes +ffffffff81cb3d30 T radeon_external_tmds_setup +ffffffff81cb3e00 T radeon_combios_external_tmds_setup +ffffffff81cb4380 T radeon_combios_asic_init +ffffffff81cb48d0 t combios_parse_mmio_table +ffffffff81cb4af0 t combios_parse_pll_table +ffffffff81cb4dc0 T radeon_combios_initialize_bios_scratch_regs +ffffffff81cb4e50 T radeon_combios_output_lock +ffffffff81cb4eb0 T radeon_combios_connected_scratch_regs +ffffffff81cb5210 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81cb52f0 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81cb6000 T radeon_connector_hotplug +ffffffff81cb6100 T radeon_get_monitor_bpc +ffffffff81cb6550 T radeon_connector_edid +ffffffff81cb6600 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81cb6680 T radeon_connector_is_dp12_capable +ffffffff81cb6720 T radeon_add_atom_connector +ffffffff81cb75d0 T radeon_add_legacy_connector +ffffffff81cb7ac0 t radeon_dp_detect +ffffffff81cb7e60 t radeon_dvi_force +ffffffff81cb7eb0 t radeon_connector_set_property +ffffffff81cb86f0 t radeon_connector_unregister +ffffffff81cb8750 t radeon_connector_destroy +ffffffff81cb87c0 t radeon_best_single_encoder +ffffffff81cb8830 t radeon_connector_get_edid +ffffffff81cb8990 t radeon_dp_get_modes +ffffffff81cb8c90 t radeon_dp_mode_valid +ffffffff81cb8e60 t radeon_dvi_encoder +ffffffff81cb8f20 t radeon_fixup_lvds_native_mode +ffffffff81cb9060 t radeon_add_common_modes +ffffffff81cb9150 t radeon_fp_native_mode +ffffffff81cb9230 t radeon_lvds_set_property +ffffffff81cb9320 t radeon_vga_detect +ffffffff81cb95c0 t radeon_connector_analog_encoder_conflict_solve +ffffffff81cb97e0 t radeon_vga_get_modes +ffffffff81cb98c0 t radeon_vga_mode_valid +ffffffff81cb9920 t radeon_dvi_detect +ffffffff81cb9f80 t radeon_dvi_mode_valid +ffffffff81cba100 t radeon_tv_detect +ffffffff81cba340 t radeon_tv_get_modes +ffffffff81cba420 t radeon_tv_mode_valid +ffffffff81cba470 t radeon_lvds_detect +ffffffff81cba610 t radeon_lvds_get_modes +ffffffff81cba750 t radeon_lvds_mode_valid +ffffffff81cbb000 T radeon_cs_parser_init +ffffffff81cbb490 T radeon_cs_ioctl +ffffffff81cbbc70 t radeon_cs_parser_fini +ffffffff81cbbdf0 t radeon_cs_ib_vm_chunk +ffffffff81cbc130 T radeon_cs_packet_parse +ffffffff81cbc2e0 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81cbc340 T radeon_cs_dump_packet +ffffffff81cbc3c0 T radeon_cs_packet_next_reloc +ffffffff81cbc5a0 t cmp_size_smaller_first +ffffffff81cbd000 T radeon_crtc_cursor_move +ffffffff81cbd070 t radeon_lock_cursor +ffffffff81cbd230 t radeon_cursor_move_locked +ffffffff81cbd770 T radeon_crtc_cursor_set2 +ffffffff81cbda00 t radeon_hide_cursor +ffffffff81cbdac0 t radeon_bo_reserve +ffffffff81cbdc30 t radeon_bo_unreserve +ffffffff81cbdd10 t radeon_show_cursor +ffffffff81cbdf60 T radeon_cursor_reset +ffffffff81cbe000 T radeon_is_px +ffffffff81cbe040 T radeon_program_register_sequence +ffffffff81cbe170 T radeon_pci_config_reset +ffffffff81cbe1a0 T radeon_surface_init +ffffffff81cbe360 T radeon_scratch_init +ffffffff81cbe3e0 T radeon_scratch_get +ffffffff81cbe460 T radeon_scratch_free +ffffffff81cbe4c0 T radeon_doorbell_get +ffffffff81cbe570 T radeon_doorbell_free +ffffffff81cbe5c0 T radeon_wb_disable +ffffffff81cbe5f0 T radeon_wb_fini +ffffffff81cbe690 t radeon_bo_reserve +ffffffff81cbe800 t radeon_bo_unreserve +ffffffff81cbe8e0 T radeon_wb_init +ffffffff81cbebc0 T radeon_vram_location +ffffffff81cbece0 T radeon_gtt_location +ffffffff81cbee10 T radeon_device_is_virtual +ffffffff81cbee40 T radeon_card_posted +ffffffff81cbf050 T radeon_update_bandwidth_info +ffffffff81cbf0d0 T radeon_boot_test_post_card +ffffffff81cbf190 T radeon_dummy_page_init +ffffffff81cbf250 T radeon_dummy_page_fini +ffffffff81cbf2b0 T radeon_atombios_init +ffffffff81cbf440 t cail_reg_read +ffffffff81cbf4a0 t cail_reg_write +ffffffff81cbf500 t cail_ioreg_read +ffffffff81cbf520 t cail_ioreg_write +ffffffff81cbf540 t cail_mc_read +ffffffff81cbf570 t cail_mc_write +ffffffff81cbf5a0 t cail_pll_read +ffffffff81cbf5d0 t cail_pll_write +ffffffff81cbf600 T radeon_atombios_fini +ffffffff81cbf6b0 T radeon_combios_init +ffffffff81cbf6f0 T radeon_combios_fini +ffffffff81cbf720 T radeon_device_init +ffffffff81cc0200 T radeon_device_fini +ffffffff81cc0310 T radeon_suspend_kms +ffffffff81cc0680 T radeon_resume_kms +ffffffff81cc08c0 T radeon_gpu_reset +ffffffff81cc1000 T radeon_crtc_load_lut +ffffffff81cc1e60 T radeon_crtc_handle_vblank +ffffffff81cc1fd0 T radeon_get_crtc_scanoutpos +ffffffff81cc25a0 T radeon_crtc_handle_flip +ffffffff81cc26d0 T radeon_compute_pll_avivo +ffffffff81cc2c30 T radeon_compute_pll_legacy +ffffffff81cc3300 T radeon_framebuffer_init +ffffffff81cc3380 T radeon_update_display_priority +ffffffff81cc33e0 T radeon_modeset_init +ffffffff81cc3e90 T radeon_modeset_fini +ffffffff81cc3fe0 T radeon_crtc_scaling_mode_fixup +ffffffff81cc4360 T radeon_get_crtc_scanout_position +ffffffff81cc43d0 t radeon_user_framebuffer_create +ffffffff81cc4570 t radeon_crtc_gamma_set +ffffffff81cc45b0 t radeon_crtc_destroy +ffffffff81cc45f0 t radeon_crtc_set_config +ffffffff81cc46c0 t radeon_crtc_page_flip_target +ffffffff81cc4b60 t radeon_flip_work_func +ffffffff81cc4d80 t radeon_unpin_work_func +ffffffff81cc4e00 t radeon_bo_reserve +ffffffff81cc4f70 t radeon_bo_unreserve +ffffffff81cc6000 T radeon_dp_aux_transfer_native +ffffffff81cc7000 T radeondrm_probe +ffffffff81cc7060 T radeondrm_attach_kms +ffffffff81cc77a0 T radeondrm_detach_kms +ffffffff81cc7830 T radeondrm_activate_kms +ffffffff81cc78f0 T radeondrm_wsioctl +ffffffff81cc79b0 T radeondrm_wsmmap +ffffffff81cc79e0 T radeondrm_alloc_screen +ffffffff81cc7a10 T radeondrm_free_screen +ffffffff81cc7a20 T radeondrm_show_screen +ffffffff81cc7b10 T radeondrm_enter_ddb +ffffffff81cc7b70 T radeondrm_doswitch +ffffffff81cc7c10 T radeondrm_setpal +ffffffff81cc7e30 T radeondrm_attachhook +ffffffff81cc8160 T radeondrm_forcedetach +ffffffff81cc9000 T radeon_setup_encoder_clones +ffffffff81cc90b0 T radeon_get_encoder_enum +ffffffff81cc9230 T radeon_link_encoder_connector +ffffffff81cc9380 T radeon_encoder_set_active_device +ffffffff81cc9440 T radeon_get_connector_for_encoder +ffffffff81cc94b0 T radeon_get_connector_for_encoder_init +ffffffff81cc9520 T radeon_get_external_encoder +ffffffff81cc95b0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81cc9650 T radeon_panel_mode_fixup +ffffffff81cc9820 T radeon_dig_monitor_is_duallink +ffffffff81cc9940 T radeon_encoder_is_digital +ffffffff81cca000 T radeon_fbdev_setup +ffffffff81cca150 T radeon_fbdev_set_suspend +ffffffff81cca1a0 T radeon_fbdev_robj_is_fb +ffffffff81cca210 T radeondrm_burner +ffffffff81cca290 T radeondrm_burner_cb +ffffffff81cca2c0 t radeon_fbdev_fb_helper_fb_probe +ffffffff81cca800 t radeon_bo_reserve +ffffffff81cca970 t radeon_bo_unreserve +ffffffff81ccaa50 t radeon_fbdev_client_unregister +ffffffff81ccaab0 t radeon_fbdev_client_restore +ffffffff81ccaaf0 t radeon_fbdev_client_hotplug +ffffffff81ccb000 T radeon_fence_emit +ffffffff81ccb120 T radeon_fence_process +ffffffff81ccb1e0 t radeon_fence_activity +ffffffff81ccb450 T radeon_fence_signaled +ffffffff81ccb4c0 t radeon_fence_seq_signaled +ffffffff81ccb5b0 T radeon_fence_wait_timeout +ffffffff81ccb6e0 t radeon_fence_wait_seq_timeout +ffffffff81ccbb50 T radeon_fence_wait +ffffffff81ccbc80 T radeon_fence_wait_any +ffffffff81ccbdc0 T radeon_fence_wait_next +ffffffff81ccbe80 T radeon_fence_wait_empty +ffffffff81ccbf90 T radeon_fence_ref +ffffffff81ccbfd0 T radeon_fence_unref +ffffffff81ccc010 T radeon_fence_count_emitted +ffffffff81ccc110 T radeon_fence_need_sync +ffffffff81ccc170 T radeon_fence_note_sync +ffffffff81ccc340 T radeon_fence_driver_start_ring +ffffffff81ccc520 T radeon_fence_driver_init +ffffffff81ccc660 T radeon_debugfs_fence_init +ffffffff81ccc690 T radeon_fence_driver_fini +ffffffff81ccc8b0 T radeon_fence_driver_force_completion +ffffffff81ccc9a0 t radeon_fence_get_driver_name +ffffffff81ccc9d0 t radeon_fence_get_timeline_name +ffffffff81ccca70 t radeon_fence_enable_signaling +ffffffff81cccc80 t radeon_fence_is_signaled +ffffffff81cccdc0 t radeon_fence_default_wait +ffffffff81cccf20 t radeon_fence_any_seq_signaled +ffffffff81ccd060 t radeon_fence_check_lockup +ffffffff81ccd2b0 t __delayed_work_tick +ffffffff81ccd2d0 t radeon_fence_check_signaled +ffffffff81ccd370 t radeon_fence_wait_cb +ffffffff81cce000 T radeon_gart_table_ram_alloc +ffffffff81cce0c0 T radeon_gart_table_ram_free +ffffffff81cce130 T radeon_gart_table_vram_alloc +ffffffff81cce1b0 T radeon_gart_table_vram_pin +ffffffff81cce2f0 t radeon_bo_reserve +ffffffff81cce460 t radeon_bo_unreserve +ffffffff81cce540 T radeon_gart_table_vram_unpin +ffffffff81cce5c0 T radeon_gart_table_vram_free +ffffffff81cce600 T radeon_gart_unbind +ffffffff81cce720 T radeon_gart_bind +ffffffff81cce870 T radeon_gart_init +ffffffff81cce980 T radeon_gart_fini +ffffffff81ccf000 T radeon_gem_fault +ffffffff81ccf180 T radeon_gem_vm_reference +ffffffff81ccf1b0 T radeon_gem_vm_detach +ffffffff81ccf1c0 T radeon_gem_object_create +ffffffff81ccf3a0 T radeon_gem_init +ffffffff81ccf3e0 T radeon_gem_fini +ffffffff81ccf3f0 t radeon_gem_object_free +ffffffff81ccf440 t radeon_gem_object_open +ffffffff81ccf4e0 t radeon_gem_object_close +ffffffff81ccf5d0 t radeon_gem_object_mmap +ffffffff81ccf670 T radeon_gem_info_ioctl +ffffffff81ccf6e0 T radeon_gem_create_ioctl +ffffffff81ccf800 T radeon_gem_userptr_ioctl +ffffffff81ccf830 T radeon_gem_set_domain_ioctl +ffffffff81ccf990 T radeon_mode_dumb_mmap +ffffffff81ccfa40 T radeon_gem_mmap_ioctl +ffffffff81ccfb00 T radeon_gem_busy_ioctl +ffffffff81ccfbb0 T radeon_gem_wait_idle_ioctl +ffffffff81ccfcc0 T radeon_gem_set_tiling_ioctl +ffffffff81ccfd70 T radeon_gem_get_tiling_ioctl +ffffffff81ccfe40 t radeon_bo_reserve +ffffffff81cd0040 t radeon_bo_unreserve +ffffffff81cd0120 T radeon_gem_va_ioctl +ffffffff81cd03d0 t radeon_gem_va_update_vm +ffffffff81cd0520 T radeon_gem_op_ioctl +ffffffff81cd0620 T radeon_align_pitch +ffffffff81cd06b0 T radeon_mode_dumb_create +ffffffff81cd0800 T radeon_gem_debugfs_init +ffffffff81cd1000 T radeon_ddc_probe +ffffffff81cd10c0 T radeon_router_select_ddc_port +ffffffff81cd1320 T radeon_bb_set_bits +ffffffff81cd1490 T radeon_bb_set_dir +ffffffff81cd14c0 T radeon_bb_read_bits +ffffffff81cd15a0 T radeon_acquire_bus +ffffffff81cd19f0 T radeon_release_bus +ffffffff81cd1b60 T radeon_send_start +ffffffff81cd1b80 T radeon_send_stop +ffffffff81cd1ba0 T radeon_initiate_xfer +ffffffff81cd1bc0 T radeon_read_byte +ffffffff81cd1be0 T radeon_write_byte +ffffffff81cd1c00 T radeon_i2c_create +ffffffff81cd1e10 T radeon_i2c_destroy +ffffffff81cd1e90 T radeon_i2c_init +ffffffff81cd1ee0 T radeon_i2c_fini +ffffffff81cd1f90 T radeon_i2c_add +ffffffff81cd2140 T radeon_i2c_lookup +ffffffff81cd2310 T radeon_i2c_get_byte +ffffffff81cd23e0 T radeon_i2c_put_byte +ffffffff81cd2470 T radeon_router_select_cd_port +ffffffff81cd26d0 t radeon_hw_i2c_xfer +ffffffff81cd3270 t radeon_hw_i2c_func +ffffffff81cd32a0 t r100_hw_i2c_xfer +ffffffff81cd3960 t radeon_get_i2c_prescale +ffffffff81cd4000 T radeon_ib_get +ffffffff81cd4100 T radeon_ib_free +ffffffff81cd4140 T radeon_ib_schedule +ffffffff81cd43d0 T radeon_ib_pool_init +ffffffff81cd4470 T radeon_ib_pool_fini +ffffffff81cd44e0 T radeon_ib_ring_tests +ffffffff81cd5000 T radeon_driver_irq_handler_kms +ffffffff81cd5050 T radeon_msi_ok +ffffffff81cd5150 T radeon_irq_kms_init +ffffffff81cd53e0 t radeon_hotplug_work_func +ffffffff81cd5490 t radeon_dp_work_func +ffffffff81cd5500 T radeon_irq_kms_fini +ffffffff81cd56a0 T radeon_irq_kms_sw_irq_get +ffffffff81cd5740 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81cd5780 T radeon_irq_kms_sw_irq_put +ffffffff81cd5810 T radeon_irq_kms_pflip_irq_get +ffffffff81cd58c0 T radeon_irq_kms_pflip_irq_put +ffffffff81cd5960 T radeon_irq_kms_enable_afmt +ffffffff81cd59f0 T radeon_irq_kms_disable_afmt +ffffffff81cd5a80 T radeon_irq_kms_enable_hpd +ffffffff81cd5b70 T radeon_irq_kms_disable_hpd +ffffffff81cd5c50 T radeon_irq_kms_set_irq_n_enabled +ffffffff81cd5dc0 t __delayed_work_tick +ffffffff81cd6000 T radeon_info_ioctl +ffffffff81cd6af0 t radeon_set_filp_rights +ffffffff81cd6b80 T radeon_driver_open_kms +ffffffff81cd6cb0 t radeon_bo_reserve +ffffffff81cd6e20 T radeon_driver_postclose_kms +ffffffff81cd7040 T radeon_get_vblank_counter_kms +ffffffff81cd71f0 T radeon_enable_vblank_kms +ffffffff81cd72a0 T radeon_disable_vblank_kms +ffffffff81cd8000 T radeon_crtc_set_base +ffffffff81cd8020 T radeon_crtc_do_set_base +ffffffff81cd8590 T radeon_crtc_set_base_atomic +ffffffff81cd85b0 t radeon_bo_reserve +ffffffff81cd8720 t radeon_bo_unreserve +ffffffff81cd8800 T radeon_legacy_init_crtc +ffffffff81cd8850 t radeon_crtc_dpms +ffffffff81cd8a40 t radeon_crtc_prepare +ffffffff81cd8ac0 t radeon_crtc_commit +ffffffff81cd8b30 t radeon_crtc_mode_fixup +ffffffff81cd8b50 t radeon_crtc_mode_set +ffffffff81cd9fc0 t radeon_crtc_disable +ffffffff81cdb000 T radeon_legacy_get_backlight_level +ffffffff81cdb050 T radeon_legacy_set_backlight_level +ffffffff81cdb0a0 t radeon_legacy_lvds_update +ffffffff81cdb3e0 T radeon_legacy_backlight_init +ffffffff81cdb5b0 t radeon_legacy_backlight_get_brightness +ffffffff81cdb610 T radeon_add_legacy_encoder +ffffffff81cdb970 t radeon_legacy_backlight_update_status +ffffffff81cdba10 t radeon_lvds_enc_destroy +ffffffff81cdbaa0 t radeon_legacy_lvds_dpms +ffffffff81cdbaf0 t radeon_legacy_mode_fixup +ffffffff81cdbb60 t radeon_legacy_lvds_prepare +ffffffff81cdbbf0 t radeon_legacy_lvds_commit +ffffffff81cdbc70 t radeon_legacy_lvds_mode_set +ffffffff81cdbe80 t radeon_legacy_encoder_disable +ffffffff81cdbed0 t radeon_legacy_tmds_int_dpms +ffffffff81cdbf90 t radeon_legacy_tmds_int_prepare +ffffffff81cdc060 t radeon_legacy_tmds_int_commit +ffffffff81cdc130 t radeon_legacy_tmds_int_mode_set +ffffffff81cdc390 t radeon_legacy_primary_dac_dpms +ffffffff81cdc4d0 t radeon_legacy_primary_dac_prepare +ffffffff81cdc530 t radeon_legacy_primary_dac_commit +ffffffff81cdc580 t radeon_legacy_primary_dac_mode_set +ffffffff81cdc710 t radeon_legacy_primary_dac_detect +ffffffff81cdc900 t radeon_legacy_tv_dac_dpms +ffffffff81cdcb10 t radeon_legacy_tv_dac_prepare +ffffffff81cdcb70 t radeon_legacy_tv_dac_commit +ffffffff81cdcbc0 t radeon_legacy_tv_dac_mode_set +ffffffff81cdcf60 t radeon_legacy_tv_dac_detect +ffffffff81cddb60 t radeon_ext_tmds_enc_destroy +ffffffff81cddbb0 t radeon_legacy_tmds_ext_dpms +ffffffff81cddc80 t radeon_legacy_tmds_ext_prepare +ffffffff81cddd50 t radeon_legacy_tmds_ext_commit +ffffffff81cdde20 t radeon_legacy_tmds_ext_mode_set +ffffffff81cde000 T radeon_legacy_tv_mode_set +ffffffff81cdf0f0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81cdf200 T radeon_legacy_tv_adjust_pll1 +ffffffff81cdf300 T radeon_legacy_tv_adjust_pll2 +ffffffff81ce0000 T radeon_ttm_bo_is_radeon_bo +ffffffff81ce0040 t radeon_ttm_bo_destroy +ffffffff81ce0170 T radeon_ttm_placement_from_domain +ffffffff81ce02d0 T radeon_bo_create +ffffffff81ce04a0 T radeon_bo_kmap +ffffffff81ce0590 T radeon_bo_check_tiling +ffffffff81ce0670 T radeon_bo_kunmap +ffffffff81ce0700 T radeon_bo_ref +ffffffff81ce0740 T radeon_bo_unref +ffffffff81ce0790 T radeon_bo_pin_restricted +ffffffff81ce0ab0 T radeon_bo_pin +ffffffff81ce0ad0 T radeon_bo_unpin +ffffffff81ce0b40 T radeon_bo_evict_vram +ffffffff81ce0ba0 T radeon_bo_force_delete +ffffffff81ce0d00 T radeon_bo_init +ffffffff81ce0de0 T radeon_bo_fini +ffffffff81ce0e20 T radeon_bo_list_validate +ffffffff81ce1130 T radeon_bo_get_surface_reg +ffffffff81ce13b0 T radeon_bo_set_tiling_flags +ffffffff81ce16b0 T radeon_bo_get_tiling_flags +ffffffff81ce1700 T radeon_bo_move_notify +ffffffff81ce17d0 T radeon_bo_fault_reserve_notify +ffffffff81ce1a60 t ttm_bo_move_to_lru_tail_unlocked +ffffffff81ce1aa0 T radeon_bo_fence +ffffffff81ce2000 T radeon_pm_get_type_index +ffffffff81ce2080 T radeon_pm_acpi_event_handler +ffffffff81ce2160 t radeon_pm_update_profile +ffffffff81ce2280 t radeon_pm_set_clocks +ffffffff81ce2c40 T radeon_dpm_enable_uvd +ffffffff81ce2d00 T radeon_pm_compute_clocks +ffffffff81ce3710 T radeon_dpm_enable_vce +ffffffff81ce3780 T radeon_pm_suspend +ffffffff81ce3880 T radeon_pm_resume +ffffffff81ce3b70 T radeon_pm_init +ffffffff81ce4280 T radeon_pm_late_init +ffffffff81ce4340 T radeon_pm_fini +ffffffff81ce4460 t radeon_dpm_thermal_work_handler +ffffffff81ce4540 t radeon_dynpm_idle_work_handler +ffffffff81ce47c0 t __delayed_work_tick +ffffffff81ce5000 T radeon_gem_prime_get_sg_table +ffffffff81ce5030 T radeon_gem_prime_pin +ffffffff81ce50c0 t radeon_bo_reserve +ffffffff81ce5230 t radeon_bo_unreserve +ffffffff81ce5310 T radeon_gem_prime_unpin +ffffffff81ce5390 T radeon_gem_prime_export +ffffffff81ce6000 T radeon_ring_supports_scratch_reg +ffffffff81ce6030 T radeon_ring_free_size +ffffffff81ce60e0 T radeon_ring_lockup_update +ffffffff81ce6140 T radeon_ring_alloc +ffffffff81ce62c0 T radeon_ring_lock +ffffffff81ce6340 T radeon_ring_commit +ffffffff81ce6440 T radeon_ring_unlock_commit +ffffffff81ce6470 T radeon_ring_undo +ffffffff81ce64a0 T radeon_ring_unlock_undo +ffffffff81ce64c0 T radeon_ring_test_lockup +ffffffff81ce65e0 T radeon_ring_backup +ffffffff81ce6780 T radeon_ring_restore +ffffffff81ce6930 T radeon_ring_init +ffffffff81ce6b20 t radeon_bo_reserve +ffffffff81ce6c90 t radeon_bo_unreserve +ffffffff81ce6d70 T radeon_ring_fini +ffffffff81ce7000 T radeon_sa_bo_manager_init +ffffffff81ce70d0 T radeon_sa_bo_manager_fini +ffffffff81ce7100 T radeon_sa_bo_manager_start +ffffffff81ce7240 t radeon_bo_reserve +ffffffff81ce73b0 t radeon_bo_unreserve +ffffffff81ce7490 T radeon_sa_bo_manager_suspend +ffffffff81ce7540 T radeon_sa_bo_new +ffffffff81ce75b0 T radeon_sa_bo_free +ffffffff81ce8000 T radeon_semaphore_create +ffffffff81ce80e0 T radeon_semaphore_emit_signal +ffffffff81ce8170 T radeon_semaphore_emit_wait +ffffffff81ce8200 T radeon_semaphore_free +ffffffff81ce9000 T radeon_sync_create +ffffffff81ce9090 T radeon_sync_fence +ffffffff81ce9140 T radeon_sync_resv +ffffffff81ce9280 T radeon_sync_rings +ffffffff81ce9440 T radeon_sync_free +ffffffff81cea000 T radeon_test_moves +ffffffff81cea070 t radeon_do_test_moves +ffffffff81cea680 T radeon_test_ring_sync +ffffffff81cea950 t radeon_test_create_and_emit_fence +ffffffff81ceaac0 T radeon_test_syncing +ffffffff81cead90 t radeon_test_ring_sync2 +ffffffff81ceb100 t radeon_bo_reserve +ffffffff81ceb270 t radeon_bo_unreserve +ffffffff81cec000 T radeon_get_rdev +ffffffff81cec030 T radeon_ttm_tt_set_userptr +ffffffff81cec080 T radeon_ttm_tt_is_bound +ffffffff81cec0d0 T radeon_ttm_tt_has_userptr +ffffffff81cec120 T radeon_ttm_tt_is_readonly +ffffffff81cec170 T radeon_ttm_init +ffffffff81cec390 T radeon_ttm_set_active_vram_size +ffffffff81cec3d0 t radeon_bo_reserve +ffffffff81cec540 t radeon_bo_unreserve +ffffffff81cec620 T radeon_ttm_fini +ffffffff81cec6f0 t radeon_ttm_tt_create +ffffffff81cec7d0 t radeon_ttm_tt_populate +ffffffff81cec880 t radeon_ttm_tt_unpopulate +ffffffff81cec970 t radeon_ttm_tt_destroy +ffffffff81cec9c0 t radeon_evict_flags +ffffffff81cecb20 t radeon_bo_move +ffffffff81cecf20 t radeon_ttm_io_mem_reserve +ffffffff81ced000 T radeon_ucode_print_mc_hdr +ffffffff81ced0b0 t radeon_ucode_print_common_hdr +ffffffff81ced1e0 T radeon_ucode_print_smc_hdr +ffffffff81ced270 T radeon_ucode_print_gfx_hdr +ffffffff81ced340 T radeon_ucode_print_rlc_hdr +ffffffff81ced440 T radeon_ucode_print_sdma_hdr +ffffffff81ced520 T radeon_ucode_validate +ffffffff81cee000 T radeon_uvd_init +ffffffff81cee4f0 t radeon_uvd_idle_work_handler +ffffffff81cee660 t radeon_bo_reserve +ffffffff81cee860 t radeon_bo_unreserve +ffffffff81cee940 T radeon_uvd_fini +ffffffff81ceea10 T radeon_uvd_suspend +ffffffff81ceebd0 T radeon_uvd_note_usage +ffffffff81ceee10 T radeon_uvd_get_destroy_msg +ffffffff81ceef20 T radeon_uvd_resume +ffffffff81ceefb0 T radeon_uvd_force_into_uvd_segment +ffffffff81cef050 T radeon_uvd_free_handles +ffffffff81cef210 T radeon_uvd_cs_parse +ffffffff81cef930 T radeon_uvd_get_create_msg +ffffffff81cefab0 t radeon_uvd_send_msg +ffffffff81cefc50 T radeon_uvd_calc_upll_dividers +ffffffff81cefe20 T radeon_uvd_send_upll_ctlreq +ffffffff81cf0160 t __delayed_work_tick +ffffffff81cf1000 T radeon_vce_init +ffffffff81cf1620 t radeon_vce_idle_work_handler +ffffffff81cf16e0 t radeon_bo_reserve +ffffffff81cf1850 t radeon_bo_unreserve +ffffffff81cf1930 T radeon_vce_fini +ffffffff81cf19b0 T radeon_vce_suspend +ffffffff81cf1a90 T radeon_vce_resume +ffffffff81cf1be0 T radeon_vce_note_usage +ffffffff81cf1d00 T radeon_vce_free_handles +ffffffff81cf1dc0 T radeon_vce_get_destroy_msg +ffffffff81cf1ff0 T radeon_vce_get_create_msg +ffffffff81cf2340 T radeon_vce_cs_reloc +ffffffff81cf2440 T radeon_vce_cs_parse +ffffffff81cf2bb0 T radeon_vce_semaphore_emit +ffffffff81cf2d70 T radeon_vce_ib_execute +ffffffff81cf2f00 T radeon_vce_fence_emit +ffffffff81cf3130 T radeon_vce_ring_test +ffffffff81cf3280 T radeon_vce_ib_test +ffffffff81cf33a0 t __delayed_work_tick +ffffffff81cf4000 T radeon_vm_manager_init +ffffffff81cf4060 T radeon_vm_manager_fini +ffffffff81cf4180 T radeon_vm_get_bos +ffffffff81cf42d0 T radeon_vm_grab_id +ffffffff81cf4460 T radeon_vm_flush +ffffffff81cf45f0 T radeon_vm_fence +ffffffff81cf46a0 T radeon_vm_bo_find +ffffffff81cf46f0 T radeon_vm_bo_add +ffffffff81cf47e0 T radeon_vm_bo_set_addr +ffffffff81cf4c30 t radeon_bo_unreserve +ffffffff81cf4d10 t radeon_vm_clear_bo +ffffffff81cf4f00 T radeon_vm_map_gart +ffffffff81cf4f40 T radeon_vm_update_page_directory +ffffffff81cf52c0 T radeon_vm_bo_update +ffffffff81cf5900 t radeon_vm_fence_pts +ffffffff81cf5990 T radeon_vm_clear_freed +ffffffff81cf5a70 T radeon_vm_clear_invalids +ffffffff81cf5b10 T radeon_vm_bo_rmv +ffffffff81cf5c00 T radeon_vm_bo_invalidate +ffffffff81cf5cb0 T radeon_vm_init +ffffffff81cf5f10 T radeon_vm_fini +ffffffff81cf61f0 t radeon_bo_reserve +ffffffff81cf6360 t radeon_vm_frag_ptes +ffffffff81cf7000 T rs400_gart_adjust_size +ffffffff81cf70c0 T rs400_gart_tlb_flush +ffffffff81cf7140 T rs400_gart_init +ffffffff81cf7240 T rs400_gart_enable +ffffffff81cf75a0 T rs400_gart_disable +ffffffff81cf7600 T rs400_gart_fini +ffffffff81cf7670 T rs400_gart_get_page_entry +ffffffff81cf76d0 T rs400_gart_set_page +ffffffff81cf7710 T rs400_mc_wait_for_idle +ffffffff81cf77b0 T rs400_mc_rreg +ffffffff81cf7840 T rs400_mc_wreg +ffffffff81cf78c0 T rs400_resume +ffffffff81cf79f0 t rs400_mc_program +ffffffff81cf7ae0 t rs400_startup +ffffffff81cf7cd0 T rs400_suspend +ffffffff81cf7d70 T rs400_fini +ffffffff81cf7e60 T rs400_init +ffffffff81cf9000 T avivo_wait_for_vblank +ffffffff81cf9280 T rs600_page_flip +ffffffff81cf9550 T rs600_page_flip_pending +ffffffff81cf95c0 T avivo_program_fmt +ffffffff81cf96e0 T rs600_pm_misc +ffffffff81cf9a20 T rs600_pm_prepare +ffffffff81cf9b20 T rs600_pm_finish +ffffffff81cf9c20 T rs600_hpd_sense +ffffffff81cf9c80 T rs600_hpd_set_polarity +ffffffff81cf9d40 T rs600_hpd_init +ffffffff81cf9e20 T rs600_hpd_fini +ffffffff81cf9ed0 T rs600_asic_reset +ffffffff81cfa140 T rs600_gart_tlb_flush +ffffffff81cfa200 T rs600_gart_get_page_entry +ffffffff81cfa260 T rs600_gart_set_page +ffffffff81cfa2a0 T rs600_irq_set +ffffffff81cfa480 T rs600_irq_disable +ffffffff81cfa500 t rs600_irq_ack +ffffffff81cfa6b0 T rs600_irq_process +ffffffff81cfaa10 T rs600_get_vblank_counter +ffffffff81cfaa60 T rs600_mc_wait_for_idle +ffffffff81cfab00 T rs600_bandwidth_update +ffffffff81cfabf0 T rs600_mc_rreg +ffffffff81cfac70 T rs600_mc_wreg +ffffffff81cface0 T rs600_set_safe_registers +ffffffff81cfad20 T rs600_resume +ffffffff81cfae50 t rs600_startup +ffffffff81cfb670 T rs600_suspend +ffffffff81cfb770 T rs600_fini +ffffffff81cfb870 t rs600_gart_fini +ffffffff81cfb8e0 T rs600_init +ffffffff81cfc000 T rs690_mc_wait_for_idle +ffffffff81cfc0a0 T rs690_pm_info +ffffffff81cfc310 T rs690_line_buffer_adjust +ffffffff81cfc430 T rs690_bandwidth_update +ffffffff81cfc780 t rs690_crtc_bandwidth_compute +ffffffff81cfcb70 t rs690_compute_mode_priority +ffffffff81cfcff0 T rs690_mc_rreg +ffffffff81cfd080 T rs690_mc_wreg +ffffffff81cfd100 T rs690_resume +ffffffff81cfd1f0 t rs690_startup +ffffffff81cfd4d0 T rs690_suspend +ffffffff81cfd530 T rs690_fini +ffffffff81cfd5e0 T rs690_init +ffffffff81cfe000 T rs780_dpm_enable +ffffffff81cfebf0 T rs780_dpm_disable +ffffffff81cfecd0 T rs780_dpm_set_power_state +ffffffff81cff0b0 t rs780_force_voltage +ffffffff81cff1f0 t rs780_enable_voltage_scaling +ffffffff81cff3b0 T rs780_dpm_setup_asic +ffffffff81cff3e0 T rs780_dpm_display_configuration_changed +ffffffff81cff530 T rs780_dpm_init +ffffffff81cffaa0 T rs780_dpm_print_power_state +ffffffff81cffb30 T rs780_dpm_fini +ffffffff81cffbc0 T rs780_dpm_get_sclk +ffffffff81cffc00 T rs780_dpm_get_mclk +ffffffff81cffc30 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81cffc60 T rs780_dpm_get_current_sclk +ffffffff81cffcf0 T rs780_dpm_get_current_mclk +ffffffff81cffd20 T rs780_dpm_force_performance_level +ffffffff81cfff10 t rs780_force_fbdiv +ffffffff81d01000 T rv515_ring_start +ffffffff81d01af0 T rv515_mc_wait_for_idle +ffffffff81d01b90 T rv515_vga_render_disable +ffffffff81d01be0 T rv515_mc_rreg +ffffffff81d01c70 T rv515_mc_wreg +ffffffff81d01cf0 T rv515_debugfs +ffffffff81d01d00 T rv515_mc_stop +ffffffff81d02270 T rv515_mc_resume +ffffffff81d02850 T rv515_clock_startup +ffffffff81d02910 T rv515_resume +ffffffff81d02b50 t rv515_startup +ffffffff81d03020 T rv515_suspend +ffffffff81d03090 T rv515_set_safe_registers +ffffffff81d030d0 T rv515_fini +ffffffff81d03180 T rv515_init +ffffffff81d03460 T atom_rv515_force_tv_scaler +ffffffff81d06b00 T rv515_bandwidth_avivo_update +ffffffff81d06ca0 t rv515_crtc_bandwidth_compute +ffffffff81d06fb0 t rv515_compute_mode_priority +ffffffff81d07480 T rv515_bandwidth_update +ffffffff81d08000 T rv6xx_dpm_enable +ffffffff81d08800 t rv6xx_calculate_stepping_parameters +ffffffff81d089e0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81d08fb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81d09080 t rv6xx_enable_dynamic_pcie_gen2 +ffffffff81d09240 T rv6xx_dpm_disable +ffffffff81d094b0 T rv6xx_dpm_set_power_state +ffffffff81d09ea0 T rv6xx_setup_asic +ffffffff81d09fe0 T rv6xx_dpm_display_configuration_changed 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+ffffffff81d0cb70 T rv730_stop_dpm +ffffffff81d0cc30 T rv730_program_dcodt +ffffffff81d0cd00 T rv730_get_odt_values +ffffffff81d0d000 T rv740_get_decoded_reference_divider +ffffffff81d0d0a0 T rv740_get_dll_speed +ffffffff81d0d2b0 T rv740_populate_sclk_value +ffffffff81d0d4b0 T rv740_populate_mclk_value +ffffffff81d0d860 T rv740_read_clock_registers +ffffffff81d0d990 T rv740_populate_smc_acpi_state +ffffffff81d0dbc0 T rv740_enable_mclk_spread_spectrum +ffffffff81d0dc10 T rv740_get_mclk_frequency_ratio +ffffffff81d0e000 T rv770_set_uvd_clocks +ffffffff81d0e570 T rv770_get_xclk +ffffffff81d0e5d0 T rv770_page_flip +ffffffff81d0e8d0 T rv770_page_flip_pending +ffffffff81d0e940 T rv770_get_temp +ffffffff81d0e9a0 T rv770_pm_misc +ffffffff81d0ea80 T r700_cp_stop +ffffffff81d0eb00 T r700_cp_fini +ffffffff81d0eb90 T rv770_set_clk_bypass_mode +ffffffff81d0ecb0 T r700_vram_gtt_location +ffffffff81d0ee40 T rv770_resume +ffffffff81d0eed0 t rv770_init_golden_registers +ffffffff81d0f060 t rv770_startup +ffffffff81d10c00 T rv770_suspend +ffffffff81d10e20 T rv770_init +ffffffff81d11210 t rv770_pcie_gart_fini +ffffffff81d11390 T rv770_fini +ffffffff81d11630 t rv770_uvd_start +ffffffff81d116e0 t rv770_cp_load_microcode +ffffffff81d119b0 t rv770_uvd_resume +ffffffff81d12000 T rv770_copy_dma +ffffffff81d13000 T rv770_get_ps +ffffffff81d13030 T rv770_get_pi +ffffffff81d13060 T evergreen_get_pi +ffffffff81d13090 T rv770_restore_cgcg +ffffffff81d13110 T rv770_stop_dpm +ffffffff81d131d0 T rv770_dpm_enabled +ffffffff81d13210 T rv770_enable_thermal_protection +ffffffff81d13270 T rv770_enable_acpi_pm +ffffffff81d132c0 T rv770_get_seq_value +ffffffff81d13300 T rv770_write_smc_soft_register +ffffffff81d13330 T rv770_populate_smc_t +ffffffff81d134e0 T rv770_populate_smc_sp +ffffffff81d13540 T rv770_map_clkf_to_ibias +ffffffff81d135a0 T rv770_populate_vddc_value +ffffffff81d13650 T rv770_populate_mvdd_value +ffffffff81d136a0 T rv770_calculate_memory_refresh_rate +ffffffff81d13720 T rv770_enable_backbias +ffffffff81d13780 T rv770_setup_bsp +ffffffff81d13870 T rv770_program_git +ffffffff81d138c0 T rv770_program_tp +ffffffff81d13940 T rv770_program_tpp +ffffffff81d13980 T rv770_program_sstp +ffffffff81d139c0 T rv770_program_engine_speed_parameters +ffffffff81d13a10 T rv770_program_vc +ffffffff81d13a60 T rv770_clear_vc +ffffffff81d13aa0 T rv770_upload_firmware +ffffffff81d13ae0 T rv770_populate_initial_mvdd_value +ffffffff81d13b30 T rv770_get_memory_module_index +ffffffff81d13b70 T rv770_enable_voltage_control +ffffffff81d13bc0 T rv770_halt_smc +ffffffff81d13c20 T rv770_resume_smc +ffffffff81d13c70 T rv770_set_sw_state +ffffffff81d13cd0 T rv770_set_boot_state +ffffffff81d13d20 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81d13d90 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81d13e00 T rv770_restrict_performance_levels_before_switch +ffffffff81d13e60 T rv770_dpm_force_performance_level +ffffffff81d13f20 T r7xx_start_smc +ffffffff81d13f50 T r7xx_stop_smc +ffffffff81d13f80 T rv770_read_voltage_smio_registers +ffffffff81d13fc0 T rv770_reset_smio_status +ffffffff81d14080 T rv770_get_memory_type +ffffffff81d140d0 T rv770_get_pcie_gen2_status +ffffffff81d14140 T rv770_get_max_vddc +ffffffff81d141a0 T rv770_program_response_times +ffffffff81d142f0 T rv770_enable_auto_throttle_source +ffffffff81d14470 T rv770_dpm_enable +ffffffff81d154f0 T rv770_dpm_late_enable +ffffffff81d15620 T rv770_dpm_disable +ffffffff81d15990 T rv770_dpm_set_power_state +ffffffff81d16080 t rv770_program_dcodt_after_state_switch +ffffffff81d16100 T rv770_dpm_setup_asic +ffffffff81d16470 T rv770_dpm_display_configuration_changed +ffffffff81d164f0 T rv7xx_parse_power_table +ffffffff81d16a70 T rv770_get_engine_memory_ss +ffffffff81d16b00 T rv770_dpm_init +ffffffff81d16d40 T rv770_dpm_print_power_state +ffffffff81d16e60 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81d16e90 T rv770_dpm_get_current_sclk +ffffffff81d16f00 T rv770_dpm_get_current_mclk +ffffffff81d16f70 T rv770_dpm_fini +ffffffff81d17000 T rv770_dpm_get_sclk +ffffffff81d17050 T rv770_dpm_get_mclk +ffffffff81d170a0 T rv770_dpm_vblank_too_short +ffffffff81d17110 t rv770_convert_power_level_to_smc +ffffffff81d18000 T rv770_copy_bytes_to_smc +ffffffff81d18210 T rv770_start_smc +ffffffff81d18260 T rv770_reset_smc +ffffffff81d182b0 T rv770_stop_smc_clock +ffffffff81d18300 T rv770_start_smc_clock +ffffffff81d18350 T rv770_is_smc_running +ffffffff81d18390 T rv770_send_msg_to_smc +ffffffff81d18470 T rv770_wait_for_smc_inactive +ffffffff81d18510 T rv770_load_smc_ucode +ffffffff81d186a0 T rv770_read_smc_sram_dword +ffffffff81d18760 T rv770_write_smc_sram_dword +ffffffff81d19000 T si_get_allowed_info_register +ffffffff81d19090 T si_get_xclk +ffffffff81d19100 T si_get_temp +ffffffff81d19150 T si_mc_load_microcode +ffffffff81d19410 T dce6_bandwidth_update +ffffffff81d195d0 t dce6_line_buffer_adjust +ffffffff81d19780 t dce6_program_watermarks +ffffffff81d1a230 T si_fence_ring_emit +ffffffff81d1a690 T si_ring_ib_execute +ffffffff81d1ae00 T si_gpu_check_soft_reset +ffffffff81d1afa0 T si_asic_reset +ffffffff81d1b320 t si_gpu_pci_config_reset +ffffffff81d1b640 T si_gfx_is_lockup +ffffffff81d1b6b0 T si_vram_gtt_location +ffffffff81d1b750 T si_pcie_gart_tlb_flush +ffffffff81d1b7a0 T si_ib_parse +ffffffff81d1be40 T si_vm_init +ffffffff81d1be80 T si_vm_fini +ffffffff81d1beb0 T si_vm_flush +ffffffff81d1c550 T si_init_uvd_internal_cg +ffffffff81d1c5a0 T si_get_csb_size +ffffffff81d1c630 T si_get_csb_buffer +ffffffff81d1c7b0 T si_rlc_reset +ffffffff81d1c830 T si_irq_set +ffffffff81d1cd20 t si_disable_interrupt_state +ffffffff81d1cfa0 T si_irq_process +ffffffff81d1e2a0 t si_irq_ack +ffffffff81d1e890 T si_resume +ffffffff81d1e920 t si_init_golden_registers +ffffffff81d1eae0 t si_startup +ffffffff81d20f00 T si_suspend +ffffffff81d211f0 t si_fini_cg +ffffffff81d21290 T si_init +ffffffff81d225f0 t si_cp_fini +ffffffff81d226e0 t si_irq_fini +ffffffff81d227b0 t si_pcie_gart_fini +ffffffff81d228b0 T si_fini +ffffffff81d22ad0 T si_get_gpu_clock_counter +ffffffff81d22b90 T si_set_uvd_clocks +ffffffff81d230f0 T si_set_vce_clocks +ffffffff81d23630 t si_vce_send_vcepll_ctlreq +ffffffff81d23870 t dce6_latency_watermark +ffffffff81d23ab0 t si_rlc_stop +ffffffff81d23c60 t si_vm_reg_valid +ffffffff81d23dc0 t si_vm_packet3_cp_dma_check +ffffffff81d23f30 t si_uvd_start +ffffffff81d23fe0 t si_vce_start +ffffffff81d240f0 t si_irq_init +ffffffff81d24bd0 t si_cp_load_microcode +ffffffff81d24fb0 t si_cp_resume +ffffffff81d25e70 t si_uvd_resume +ffffffff81d25f40 t si_vce_resume +ffffffff81d26030 t pcie_capability_set_word +ffffffff81d26140 t pcie_capability_read_word +ffffffff81d261e0 t pcie_capability_clear_and_set_word +ffffffff81d26300 t pcie_capability_write_word +ffffffff81d263c0 t si_update_cg +ffffffff81d26930 t si_enable_mgcg +ffffffff81d26d50 t si_enable_cgcg +ffffffff81d270e0 t request_firmware +ffffffff81d27170 t release_firmware +ffffffff81d28000 T si_dma_is_lockup +ffffffff81d28080 T si_dma_vm_copy_pages +ffffffff81d28170 T si_dma_vm_write_pages +ffffffff81d282d0 T si_dma_vm_set_pages +ffffffff81d28440 T si_dma_vm_flush +ffffffff81d288b0 T si_copy_dma +ffffffff81d29000 T si_dpm_force_performance_level +ffffffff81d29160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81d291c0 T si_get_mclk_frequency_ratio +ffffffff81d29240 T si_trim_voltage_table_to_fit_state_table +ffffffff81d29350 T si_dpm_setup_asic +ffffffff81d29520 T si_fan_ctrl_get_fan_speed_percent +ffffffff81d295b0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81d29670 T si_fan_ctrl_set_mode +ffffffff81d298c0 T si_fan_ctrl_get_mode +ffffffff81d29910 T si_dpm_enable +ffffffff81d2ac90 t si_init_smc_table +ffffffff81d2bea0 t si_init_smc_spll_table +ffffffff81d2c020 t si_init_arb_table_index +ffffffff81d2c0b0 t si_populate_mc_reg_table +ffffffff81d2c500 t si_initialize_smc_cac_tables +ffffffff81d2e150 t si_initialize_hardware_cac_manager +ffffffff81d2e200 t si_initialize_smc_dte_tables +ffffffff81d2e400 t si_populate_smc_tdp_limits +ffffffff81d2e600 t si_populate_smc_tdp_limits_2 +ffffffff81d2e6d0 t si_program_response_times +ffffffff81d2e7f0 t si_program_ds_registers +ffffffff81d2e880 t si_dpm_start_smc +ffffffff81d2e8b0 t si_enable_auto_throttle_source +ffffffff81d2ea40 t si_thermal_start_thermal_controller +ffffffff81d2ef00 T si_dpm_late_enable +ffffffff81d2f050 T si_dpm_disable +ffffffff81d2f3d0 t si_enable_power_containment +ffffffff81d2f4a0 t si_enable_smc_cac +ffffffff81d2f600 T si_dpm_pre_set_power_state +ffffffff81d30170 T si_dpm_set_power_state +ffffffff81d306d0 t si_halt_smc +ffffffff81d30730 t si_upload_sw_state +ffffffff81d31130 t si_upload_smc_data +ffffffff81d31270 t si_upload_ulv_state +ffffffff81d313b0 t si_upload_mc_reg_table +ffffffff81d31550 t si_set_pcie_lane_width_in_smc +ffffffff81d315f0 t si_resume_smc +ffffffff81d31650 t si_set_vce_clock +ffffffff81d316f0 t si_notify_link_speed_change_after_state_change +ffffffff81d31820 t si_set_power_state_conditionally_enable_ulv +ffffffff81d31900 t si_power_control_set_level +ffffffff81d31a90 T si_dpm_post_set_power_state +ffffffff81d31ac0 T si_dpm_display_configuration_changed +ffffffff81d31ba0 T si_dpm_init +ffffffff81d335e0 T si_dpm_fini +ffffffff81d33690 T si_dpm_debugfs_print_current_performance_level +ffffffff81d336e0 T si_dpm_get_current_sclk +ffffffff81d33750 T si_dpm_get_current_mclk +ffffffff81d337c0 t si_do_program_memory_timing_parameters +ffffffff81d33950 t si_populate_mvdd_value +ffffffff81d339d0 t si_convert_power_level_to_smc +ffffffff81d34280 t si_calculate_sclk_params +ffffffff81d344b0 t si_program_cac_config_registers +ffffffff81d35000 T si_copy_bytes_to_smc +ffffffff81d35240 T si_start_smc +ffffffff81d35280 T si_reset_smc +ffffffff81d352c0 T si_program_jump_on_start +ffffffff81d352f0 T si_stop_smc_clock +ffffffff81d35330 T si_start_smc_clock +ffffffff81d35370 T si_is_smc_running +ffffffff81d353d0 T si_send_msg_to_smc +ffffffff81d354a0 T si_wait_for_smc_inactive +ffffffff81d35540 T si_load_smc_ucode +ffffffff81d356e0 T si_read_smc_sram_dword +ffffffff81d357b0 T si_write_smc_sram_dword +ffffffff81d36000 T sumo_get_pi +ffffffff81d36030 T sumo_gfx_clockgating_initialize +ffffffff81d36110 T sumo_program_vc +ffffffff81d36150 T sumo_clear_vc +ffffffff81d36190 T sumo_program_sstp +ffffffff81d36210 T sumo_take_smu_control +ffffffff81d36240 T sumo_get_sleep_divider_from_id +ffffffff81d36270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d36320 T sumo_dpm_enable +ffffffff81d369b0 T sumo_dpm_late_enable +ffffffff81d36f70 T sumo_dpm_disable +ffffffff81d372c0 T sumo_dpm_pre_set_power_state +ffffffff81d377b0 T sumo_dpm_set_power_state +ffffffff81d38260 T sumo_dpm_post_set_power_state +ffffffff81d38300 T sumo_dpm_setup_asic +ffffffff81d38400 T sumo_dpm_display_configuration_changed +ffffffff81d38430 T sumo_convert_vid2_to_vid7 +ffffffff81d38480 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d38540 T sumo_construct_vid_mapping_table +ffffffff81d386b0 T sumo_dpm_init +ffffffff81d38f60 T sumo_dpm_print_power_state +ffffffff81d39080 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d390b0 T sumo_dpm_get_current_sclk +ffffffff81d39120 T sumo_dpm_get_current_mclk +ffffffff81d39150 T sumo_dpm_get_current_vddc +ffffffff81d39220 T sumo_dpm_fini +ffffffff81d392b0 T sumo_dpm_get_sclk +ffffffff81d39300 T sumo_dpm_get_mclk +ffffffff81d39330 T sumo_dpm_force_performance_level +ffffffff81d39720 t sumo_power_level_enable +ffffffff81d39950 t sumo_program_power_level +ffffffff81d3a000 T sumo_initialize_m3_arb +ffffffff81d3a2c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d3a360 t sumo_send_msg_to_smu +ffffffff81d3a4f0 T sumo_smu_pg_init +ffffffff81d3a510 T sumo_enable_boost_timer +ffffffff81d3a640 T sumo_set_tdp_limit +ffffffff81d3a6c0 T sumo_boost_state_enable +ffffffff81d3a710 T sumo_get_running_fw_version +ffffffff81d3b000 T trinity_dpm_enable_bapm +ffffffff81d3b080 T trinity_dpm_enable +ffffffff81d3b520 T trinity_dpm_late_enable +ffffffff81d3ba60 T trinity_dpm_disable +ffffffff81d3be50 T trinity_dpm_force_performance_level +ffffffff81d3bf00 T trinity_dpm_pre_set_power_state +ffffffff81d3c4c0 T trinity_dpm_set_power_state +ffffffff81d3ca30 T trinity_dpm_post_set_power_state +ffffffff81d3cad0 T trinity_dpm_setup_asic +ffffffff81d3cb30 T trinity_dpm_display_configuration_changed +ffffffff81d3cbc0 T trinity_dpm_init +ffffffff81d3d4a0 T trinity_dpm_print_power_state +ffffffff81d3d5b0 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d3d640 T trinity_dpm_get_current_sclk +ffffffff81d3d6a0 T trinity_dpm_get_current_mclk +ffffffff81d3d6d0 T trinity_dpm_fini +ffffffff81d3d770 T trinity_dpm_get_sclk +ffffffff81d3d7c0 T trinity_dpm_get_mclk +ffffffff81d3d7f0 t trinity_program_power_level +ffffffff81d3e000 T trinity_dpm_bapm_enable +ffffffff81d3e150 T trinity_dpm_config +ffffffff81d3e230 T trinity_dpm_force_state +ffffffff81d3e310 T trinity_dpm_n_levels_disabled +ffffffff81d3e3f0 T trinity_uvd_dpm_config +ffffffff81d3e4c0 T trinity_dpm_no_forced_level +ffffffff81d3e590 T trinity_dce_enable_voltage_adjustment +ffffffff81d3e6e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d3e7b0 T trinity_acquire_mutex +ffffffff81d3e840 T trinity_release_mutex +ffffffff81d3f000 T uvd_v1_0_get_rptr +ffffffff81d3f040 T uvd_v1_0_get_wptr +ffffffff81d3f080 T uvd_v1_0_set_wptr +ffffffff81d3f0c0 T uvd_v1_0_fence_emit +ffffffff81d3f4b0 T uvd_v1_0_resume +ffffffff81d3f610 T uvd_v1_0_init +ffffffff81d3fb90 T uvd_v1_0_start +ffffffff81d40310 T uvd_v1_0_fini +ffffffff81d40480 T uvd_v1_0_stop +ffffffff81d405f0 T uvd_v1_0_ring_test +ffffffff81d407c0 T uvd_v1_0_semaphore_emit +ffffffff81d407f0 T uvd_v1_0_ib_execute +ffffffff81d40980 T uvd_v1_0_ib_test +ffffffff81d41000 T uvd_v2_2_fence_emit +ffffffff81d41450 T uvd_v2_2_semaphore_emit +ffffffff81d41650 T uvd_v2_2_resume +ffffffff81d42000 T uvd_v3_1_semaphore_emit +ffffffff81d43000 T uvd_v4_2_resume +ffffffff81d44000 T vce_v1_0_get_rptr +ffffffff81d44090 T vce_v1_0_get_wptr +ffffffff81d44120 T vce_v1_0_set_wptr +ffffffff81d441b0 T vce_v1_0_enable_mgcg +ffffffff81d44470 T vce_v1_0_load_fw +ffffffff81d44640 T vce_v1_0_bo_size +ffffffff81d446b0 T vce_v1_0_resume +ffffffff81d45020 T vce_v1_0_start +ffffffff81d457e0 T vce_v1_0_init +ffffffff81d46000 T vce_v2_0_enable_mgcg +ffffffff81d46070 t vce_v2_0_set_dyn_cg +ffffffff81d46260 T vce_v2_0_bo_size +ffffffff81d462d0 T vce_v2_0_resume +ffffffff81d47000 T aldebaran_reset_init +ffffffff81d470c0 t aldebaran_async_reset +ffffffff81d47120 t aldebaran_get_reset_handler +ffffffff81d471c0 T aldebaran_reset_fini +ffffffff81d47220 t aldebaran_mode2_prepare_hwcontext +ffffffff81d47340 t aldebaran_mode2_perform_reset +ffffffff81d47500 t aldebaran_mode2_restore_hwcontext +ffffffff81d479e0 t aldebaran_mode2_reset +ffffffff81d48000 T aldebaran_reg_base_init +ffffffff81d49000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d49040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d49070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d49180 T amdgpu_acpi_pcie_performance_request +ffffffff81d49500 T amdgpu_acpi_power_shift_control +ffffffff81d49640 T amdgpu_acpi_smart_shift_update +ffffffff81d496e0 T amdgpu_acpi_get_tmr_info +ffffffff81d49770 T amdgpu_acpi_get_mem_info +ffffffff81d49830 T amdgpu_acpi_init +ffffffff81d498e0 t amdgpu_acpi_event +ffffffff81d49bf0 T amdgpu_acpi_get_backlight_caps +ffffffff81d49c40 T amdgpu_acpi_fini +ffffffff81d49c60 T amdgpu_acpi_should_gpu_reset +ffffffff81d49cb0 T amdgpu_acpi_detect +ffffffff81d4a5e0 T amdgpu_acpi_release +ffffffff81d4b000 T amdgpu_afmt_acr +ffffffff81d4c000 T amdgpu_amdkfd_init +ffffffff81d4c040 T amdgpu_amdkfd_fini +ffffffff81d4c070 T amdgpu_amdkfd_device_probe +ffffffff81d4c0a0 T amdgpu_amdkfd_device_init +ffffffff81d4c260 t amdgpu_amdkfd_reset_work +ffffffff81d4c2e0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d4c330 T amdgpu_amdkfd_interrupt +ffffffff81d4c360 T amdgpu_amdkfd_suspend +ffffffff81d4c390 T amdgpu_amdkfd_resume +ffffffff81d4c3c0 T amdgpu_amdkfd_pre_reset +ffffffff81d4c3f0 T amdgpu_amdkfd_post_reset +ffffffff81d4c420 T amdgpu_amdkfd_gpu_reset +ffffffff81d4c480 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d4c730 t amdgpu_bo_reserve +ffffffff81d4c890 t amdgpu_bo_unreserve +ffffffff81d4c970 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d4c9e0 T amdgpu_amdkfd_alloc_gws +ffffffff81d4cac0 T amdgpu_amdkfd_free_gws +ffffffff81d4cb00 T amdgpu_amdkfd_get_fw_version +ffffffff81d4cbb0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d4cd50 T amdgpu_amdkfd_xcp_memory_size +ffffffff81d4cdf0 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d4ce30 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d4ce90 T amdgpu_amdkfd_get_cu_info +ffffffff81d4cfa0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d4d0f0 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d4d160 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d4d1f0 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d4d350 T amdgpu_amdkfd_submit_ib +ffffffff81d4d4b0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d4d500 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d4d540 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d4d670 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d4d6b0 T amdgpu_amdkfd_have_atomics_support +ffffffff81d4d6e0 T amdgpu_amdkfd_debug_mem_fence +ffffffff81d4d700 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d4d710 T amdgpu_amdkfd_send_close_event_drain_irq +ffffffff81d4d730 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d4d780 T amdgpu_amdkfd_check_and_lock_kfd +ffffffff81d4d7b0 T amdgpu_amdkfd_unlock_kfd +ffffffff81d4d7e0 T amdgpu_amdkfd_unmap_hiq +ffffffff81d4e000 T amdgpu_atom_execute_table +ffffffff81d4e0a0 t amdgpu_atom_execute_table_locked +ffffffff81d4e3c0 T amdgpu_atom_parse +ffffffff81d4e910 T amdgpu_atom_destroy +ffffffff81d4e950 T amdgpu_atom_asic_init +ffffffff81d4ea70 t get_u32 +ffffffff81d4ead0 T amdgpu_atom_parse_data_header +ffffffff81d4eb70 T amdgpu_atom_parse_cmd_header +ffffffff81d4ebf0 t atom_op_move +ffffffff81d4edc0 t atom_op_and +ffffffff81d4efa0 t atom_op_or +ffffffff81d4f180 t atom_op_shift_left +ffffffff81d4f360 t atom_op_shift_right +ffffffff81d4f540 t atom_op_mul +ffffffff81d4f690 t atom_op_div +ffffffff81d4f800 t atom_op_add +ffffffff81d4f9e0 t atom_op_sub +ffffffff81d4fbc0 t atom_op_setport +ffffffff81d4fd40 t atom_op_setregblock +ffffffff81d4fe00 t atom_op_setfbbase +ffffffff81d4fec0 t atom_op_compare +ffffffff81d500a0 t atom_op_switch +ffffffff81d502d0 t atom_op_jump +ffffffff81d50540 t atom_op_test +ffffffff81d50700 t atom_op_delay +ffffffff81d507e0 t atom_op_calltable +ffffffff81d50930 t atom_op_repeat +ffffffff81d50960 t atom_op_clear +ffffffff81d50a70 t atom_op_nop +ffffffff81d50aa0 t atom_op_eot +ffffffff81d50ad0 t atom_op_mask +ffffffff81d50d80 t atom_op_postcard +ffffffff81d50e30 t atom_op_beep +ffffffff81d50e50 t atom_op_savereg +ffffffff81d50e80 t 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dce_v10_0_crtc_dpms +ffffffff81df7e90 t dce_v10_0_crtc_prepare +ffffffff81df7ed0 t dce_v10_0_crtc_commit +ffffffff81df7f00 t dce_v10_0_crtc_mode_fixup +ffffffff81df80b0 t dce_v10_0_crtc_mode_set +ffffffff81df8290 t dce_v10_0_crtc_set_base +ffffffff81df82b0 t dce_v10_0_crtc_set_base_atomic +ffffffff81df82d0 t dce_v10_0_crtc_disable +ffffffff81df8460 t dce_v10_0_crtc_do_set_base +ffffffff81df8b60 t __delayed_work_tick +ffffffff81df8b80 t dce_v10_0_is_display_hung +ffffffff81df9000 T dce_v11_0_disable_dce +ffffffff81df9160 t dce_v11_0_early_init +ffffffff81df9290 t dce_v11_0_sw_init +ffffffff81df95b0 t dce_v11_0_sw_fini +ffffffff81df96d0 t dce_v11_0_hw_init +ffffffff81df9a90 t dce_v11_0_hw_fini +ffffffff81df9c20 t dce_v11_0_suspend +ffffffff81df9c80 t dce_v11_0_resume +ffffffff81df9cf0 t dce_v11_0_is_idle +ffffffff81df9d20 t dce_v11_0_wait_for_idle +ffffffff81df9d50 t dce_v11_0_soft_reset +ffffffff81df9f60 t dce_v11_0_set_clockgating_state +ffffffff81df9f90 t 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dce_v11_0_set_crtc_irq_state +ffffffff81dfc7f0 t dce_v11_0_crtc_irq +ffffffff81dfca10 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81dfcae0 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81dfcbb0 t dce_v11_0_set_pageflip_irq_state +ffffffff81dfcc60 t dce_v11_0_pageflip_irq +ffffffff81dfcdc0 t dce_v11_0_set_hpd_irq_state +ffffffff81dfce90 t dce_v11_0_hpd_irq +ffffffff81dfcfc0 t dce_v11_0_afmt_init +ffffffff81dfd0d0 t dce_v11_0_audio_init +ffffffff81dfd1d0 t INIT_DELAYED_WORK +ffffffff81dfd210 t dce_v11_0_crtc_cursor_set2 +ffffffff81dfd4d0 t dce_v11_0_crtc_cursor_move +ffffffff81dfd5a0 t dce_v11_0_crtc_gamma_set +ffffffff81dfd5e0 t dce_v11_0_crtc_destroy +ffffffff81dfd610 t amdgpu_bo_reserve +ffffffff81dfd810 t amdgpu_bo_unreserve +ffffffff81dfd8f0 t dce_v11_0_lock_cursor +ffffffff81dfd950 t dce_v11_0_cursor_move_locked +ffffffff81dfdab0 t dce_v11_0_show_cursor +ffffffff81dfdb50 t dce_v11_0_crtc_load_lut +ffffffff81dfdeb0 t dce_v11_0_crtc_dpms +ffffffff81dfe090 t dce_v11_0_crtc_prepare +ffffffff81dfe0d0 t dce_v11_0_crtc_commit +ffffffff81dfe100 t dce_v11_0_crtc_mode_fixup +ffffffff81dfe370 t dce_v11_0_crtc_mode_set +ffffffff81dfe5d0 t dce_v11_0_crtc_set_base +ffffffff81dfe5f0 t dce_v11_0_crtc_set_base_atomic +ffffffff81dfe610 t dce_v11_0_crtc_disable +ffffffff81dfe7b0 t dce_v11_0_crtc_do_set_base +ffffffff81dfeeb0 t __delayed_work_tick +ffffffff81dff000 t df_v1_7_sw_init +ffffffff81dff040 t df_v1_7_sw_fini +ffffffff81dff070 t df_v1_7_enable_broadcast_mode +ffffffff81dff1a0 t df_v1_7_get_fb_channel_number +ffffffff81dff230 t df_v1_7_get_hbm_channel_number +ffffffff81dff280 t df_v1_7_update_medium_grain_clock_gating +ffffffff81dff400 t df_v1_7_get_clockgating_state +ffffffff81dff490 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81e00000 t df_v3_6_sw_init +ffffffff81e00150 t df_v3_6_sw_fini +ffffffff81e00180 t df_v3_6_enable_broadcast_mode +ffffffff81e002b0 t df_v3_6_get_fb_channel_number +ffffffff81e00390 t df_v3_6_get_hbm_channel_number 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gfx_v10_0_set_powergating_state +ffffffff81e09670 t gfx_v10_0_get_clockgating_state +ffffffff81e09780 t gfx_v10_0_get_gpu_clock_counter +ffffffff81e09c90 t gfx_v10_0_select_se_sh +ffffffff81e09d30 t gfx_v10_0_read_wave_data +ffffffff81e09f90 t gfx_v10_0_read_wave_vgprs +ffffffff81e09fc0 t gfx_v10_0_read_wave_sgprs +ffffffff81e0a040 t gfx_v10_0_select_me_pipe_q +ffffffff81e0a060 t gfx_v10_0_init_spm_golden_registers +ffffffff81e0a0d0 t gfx_v10_0_update_perfmon_mgcg +ffffffff81e0a200 t wave_read_ind +ffffffff81e0a2f0 t wave_read_regs +ffffffff81e0a450 t gfx10_kiq_set_resources +ffffffff81e0a770 t gfx10_kiq_map_queues +ffffffff81e0ab00 t gfx10_kiq_unmap_queues +ffffffff81e0af00 t gfx10_kiq_query_status +ffffffff81e0b1f0 t gfx10_kiq_invalidate_tlbs +ffffffff81e0b310 t gfx_v10_0_ring_get_rptr_compute +ffffffff81e0b340 t gfx_v10_0_ring_get_wptr_compute +ffffffff81e0b3b0 t gfx_v10_0_ring_set_wptr_compute +ffffffff81e0b4f0 t gfx_v10_0_ring_emit_ib_compute +ffffffff81e0b830 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81e0bc60 t gfx_v10_0_ring_test_ring +ffffffff81e0bec0 t gfx_v10_0_ring_test_ib +ffffffff81e0c150 t gfx_v10_0_ring_emit_rreg +ffffffff81e0c3e0 t gfx_v10_0_ring_emit_wreg +ffffffff81e0c610 t gfx_v10_0_ring_emit_reg_wait +ffffffff81e0c660 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81e0c6f0 t gfx_v10_0_wait_reg_mem +ffffffff81e0ca20 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81e0ca50 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81e0cb60 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81e0cd70 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81e0d3f0 t gfx_v10_0_ring_emit_fence +ffffffff81e0d7c0 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81e0d820 t gfx_v10_0_ring_emit_vm_flush +ffffffff81e0d9f0 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81e0dac0 t gfx_v10_0_ring_emit_gds_switch +ffffffff81e0dba0 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81e0ddd0 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81e0de90 t gfx_v10_0_ring_emit_sb +ffffffff81e0df80 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81e0e470 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81e0e580 t gfx_v10_0_ring_soft_recovery +ffffffff81e0e5f0 t gfx_v10_0_ring_preempt_ib +ffffffff81e0e760 t gfx_v10_0_emit_mem_sync +ffffffff81e0ea90 t gfx_v10_0_write_data_to_reg +ffffffff81e0eca0 t gfx_v10_0_set_eop_interrupt_state +ffffffff81e0ed80 t gfx_v10_0_eop_irq +ffffffff81e0ef30 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81e0f0d0 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81e0f290 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81e0f580 t gfx_v10_0_kiq_irq +ffffffff81e0f600 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81e0f740 t gfx_v10_0_priv_reg_irq +ffffffff81e0f7a0 t gfx_v10_0_handle_priv_fault +ffffffff81e0f900 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81e0fa40 t gfx_v10_0_priv_inst_irq +ffffffff81e0faa0 t gfx_v10_0_is_rlc_enabled +ffffffff81e0fb30 t gfx_v10_0_set_safe_mode +ffffffff81e0fde0 t gfx_v10_0_unset_safe_mode +ffffffff81e0fe90 t gfx_v10_0_rlc_init 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gfx_v10_0_get_rb_active_bitmap +ffffffff81e15d20 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81e15e30 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81e15f40 t gfx_v10_0_cp_gfx_enable +ffffffff81e161b0 t gfx_v10_0_cp_compute_enable +ffffffff81e16350 t amdgpu_bo_reserve +ffffffff81e164c0 t gfx_v10_0_kiq_init_register +ffffffff81e17360 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81e17460 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81e17740 t gfx_v10_0_cp_gfx_start +ffffffff81e18130 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81e18480 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81e18bc0 t gfx_v10_0_update_3d_clock_gating +ffffffff81e18fb0 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81e19390 t gfx_v10_cntl_pg +ffffffff81e1a000 t gfx_v11_0_early_init +ffffffff81e1a750 t gfx_v11_0_late_init +ffffffff81e1a7c0 t gfx_v11_0_sw_init +ffffffff81e1ad00 t gfx_v11_0_sw_fini +ffffffff81e1af10 t gfx_v11_0_hw_init +ffffffff81e1f390 t gfx_v11_0_hw_fini +ffffffff81e1f490 t gfx_v11_0_suspend +ffffffff81e1f4d0 t gfx_v11_0_resume +ffffffff81e1f4e0 t gfx_v11_0_is_idle +ffffffff81e1f570 t gfx_v11_0_wait_for_idle +ffffffff81e1f670 t gfx_v11_0_check_soft_reset +ffffffff81e1f7a0 t gfx_v11_0_soft_reset +ffffffff81e204e0 t gfx_v11_0_post_soft_reset +ffffffff81e204f0 t gfx_v11_0_set_clockgating_state +ffffffff81e21130 t gfx_v11_0_set_powergating_state +ffffffff81e211d0 t gfx_v11_0_get_clockgating_state +ffffffff81e213a0 t gfx_v11_0_get_gpu_clock_counter +ffffffff81e21720 t gfx_v11_0_select_se_sh +ffffffff81e217c0 t gfx_v11_0_read_wave_data +ffffffff81e21a00 t gfx_v11_0_read_wave_vgprs +ffffffff81e21a30 t gfx_v11_0_read_wave_sgprs +ffffffff81e21ab0 t gfx_v11_0_select_me_pipe_q +ffffffff81e21ad0 t gfx_v11_0_update_perf_clk +ffffffff81e21c00 t gfx_v11_0_get_gfx_shadow_info +ffffffff81e21c70 t wave_read_ind +ffffffff81e21d60 t wave_read_regs +ffffffff81e21ec0 t gfx11_kiq_set_resources +ffffffff81e221e0 t gfx11_kiq_map_queues +ffffffff81e22570 t gfx11_kiq_unmap_queues +ffffffff81e22970 t gfx11_kiq_query_status +ffffffff81e22c60 t gfx11_kiq_invalidate_tlbs +ffffffff81e22d80 t gfx_v11_0_ring_get_rptr_compute +ffffffff81e22db0 t gfx_v11_0_ring_get_wptr_compute +ffffffff81e22e20 t gfx_v11_0_ring_set_wptr_compute +ffffffff81e22f60 t gfx_v11_0_ring_emit_ib_compute +ffffffff81e232a0 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81e236d0 t gfx_v11_0_ring_test_ring +ffffffff81e23950 t gfx_v11_0_ring_test_ib +ffffffff81e23bf0 t gfx_v11_0_ring_emit_rreg +ffffffff81e23e80 t gfx_v11_0_ring_emit_wreg +ffffffff81e240b0 t gfx_v11_0_ring_emit_reg_wait +ffffffff81e24100 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81e24170 t gfx_v11_0_wait_reg_mem +ffffffff81e244a0 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81e244d0 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81e245e0 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81e24800 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81e24e90 t gfx_v11_0_ring_emit_fence +ffffffff81e25260 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81e252c0 t gfx_v11_0_ring_emit_vm_flush +ffffffff81e25490 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81e25560 t gfx_v11_0_ring_emit_gds_switch +ffffffff81e25640 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81e25870 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81e25930 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81e25a90 t gfx_v11_0_ring_emit_gfx_shadow +ffffffff81e25e50 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81e25f60 t gfx_v11_0_ring_soft_recovery +ffffffff81e25fd0 t gfx_v11_0_ring_preempt_ib +ffffffff81e26140 t gfx_v11_0_emit_mem_sync +ffffffff81e26470 t gfx_v11_0_write_data_to_reg +ffffffff81e26680 t gfx_v11_0_set_eop_interrupt_state +ffffffff81e26710 t gfx_v11_0_eop_irq +ffffffff81e268c0 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81e26a60 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81e26bf0 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81e26d30 t gfx_v11_0_priv_reg_irq +ffffffff81e26d90 t gfx_v11_0_handle_priv_fault +ffffffff81e26ef0 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81e27030 t gfx_v11_0_priv_inst_irq +ffffffff81e27090 t gfx_v11_0_rlc_gc_fed_irq +ffffffff81e270e0 t gfx_v11_0_is_rlc_enabled +ffffffff81e27170 t gfx_v11_0_set_safe_mode +ffffffff81e272d0 t gfx_v11_0_unset_safe_mode +ffffffff81e27340 t gfx_v11_0_rlc_init +ffffffff81e273c0 t gfx_v11_0_get_csb_size +ffffffff81e273f0 t gfx_v11_0_get_csb_buffer +ffffffff81e27560 t gfx_v11_0_rlc_resume +ffffffff81e282c0 t gfx_v11_0_rlc_stop +ffffffff81e283a0 t gfx_v11_0_rlc_reset +ffffffff81e28550 t gfx_v11_0_rlc_start +ffffffff81e28700 t gfx_v11_0_update_spm_vmid +ffffffff81e28800 t gfx_v11_0_init_csb +ffffffff81e28990 t gfx_v11_0_gfx_mqd_init +ffffffff81e28d70 t gfx_v11_0_compute_mqd_init +ffffffff81e292a0 t gfx_v11_0_mec_init +ffffffff81e293e0 t gfx_v11_0_compute_ring_init +ffffffff81e29520 t gfx_v11_0_rlc_autoload_buffer_init +ffffffff81e29710 t gfx_v11_0_gpu_early_init +ffffffff81e297e0 t amdgpu_bo_unreserve +ffffffff81e298c0 t gfx_v11_0_disable_gpa_mode +ffffffff81e29a60 t gfx_v11_0_cp_resume +ffffffff81e2d860 t gfx_v11_0_config_me_cache +ffffffff81e2dc20 t gfx_v11_0_config_pfp_cache +ffffffff81e2dfe0 t gfx_v11_0_config_mec_cache +ffffffff81e2e3a0 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81e2e4b0 t gfx_v11_0_cp_compute_enable +ffffffff81e2e690 t gfx_v11_0_cp_gfx_enable +ffffffff81e2e8a0 t amdgpu_bo_reserve +ffffffff81e2ea10 t gfx_v11_0_kiq_init_register +ffffffff81e2f8b0 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81e2f990 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81e2fb70 t gfx_v11_0_cp_gfx_start +ffffffff81e303f0 t gfx_v11_cntl_pg +ffffffff81e31000 t gfx_v11_0_3_rlc_gc_fed_irq +ffffffff81e31200 t gfx_v11_0_3_poison_consumption_handler +ffffffff81e32000 t gfx_v8_0_early_init +ffffffff81e322f0 t gfx_v8_0_late_init +ffffffff81e32a10 t gfx_v8_0_sw_init +ffffffff81e32dd0 t gfx_v8_0_sw_fini +ffffffff81e32f70 t gfx_v8_0_hw_init +ffffffff81e35110 t gfx_v8_0_hw_fini +ffffffff81e355c0 t gfx_v8_0_suspend +ffffffff81e35600 t gfx_v8_0_resume +ffffffff81e35610 t gfx_v8_0_is_idle +ffffffff81e35680 t gfx_v8_0_wait_for_idle +ffffffff81e35730 t gfx_v8_0_check_soft_reset +ffffffff81e35810 t gfx_v8_0_pre_soft_reset +ffffffff81e35970 t gfx_v8_0_soft_reset +ffffffff81e35b30 t gfx_v8_0_post_soft_reset +ffffffff81e35cb0 t gfx_v8_0_set_clockgating_state +ffffffff81e35f30 t gfx_v8_0_set_powergating_state +ffffffff81e362e0 t gfx_v8_0_get_clockgating_state +ffffffff81e363c0 t gfx_v8_0_get_gpu_clock_counter +ffffffff81e36460 t gfx_v8_0_select_se_sh +ffffffff81e364c0 t gfx_v8_0_read_wave_data +ffffffff81e36960 t gfx_v8_0_read_wave_sgprs +ffffffff81e36a10 t gfx_v8_0_select_me_pipe_q +ffffffff81e36a30 t gfx_v8_0_ring_get_rptr +ffffffff81e36a60 t gfx_v8_0_ring_get_wptr_compute +ffffffff81e36a90 t gfx_v8_0_ring_set_wptr_compute +ffffffff81e36ad0 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81e36ef0 t gfx_v8_0_ring_test_ring +ffffffff81e370f0 t gfx_v8_0_ring_emit_rreg +ffffffff81e37380 t gfx_v8_0_ring_emit_wreg +ffffffff81e375b0 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81e37610 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81e37680 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81e37be0 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81e380d0 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81e383c0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81e38770 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81e38a90 t gfx_v8_0_ring_emit_gds_switch +ffffffff81e39240 t gfx_v8_0_ring_test_ib +ffffffff81e393f0 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81e39620 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81e396d0 t gfx_v8_ring_emit_sb +ffffffff81e397c0 t gfx_v8_ring_emit_cntxcntl +ffffffff81e39d60 t gfx_v8_0_ring_soft_recovery +ffffffff81e39d90 t gfx_v8_0_emit_mem_sync +ffffffff81e39f90 t gfx_v8_0_ring_emit_ib_compute +ffffffff81e3a290 t gfx_v8_0_ring_emit_fence_compute +ffffffff81e3a590 t gfx_v8_0_emit_mem_sync_compute +ffffffff81e3a850 t gfx_v8_0_emit_wave_limit +ffffffff81e3aa00 t gfx_v8_0_set_eop_interrupt_state +ffffffff81e3ac10 t gfx_v8_0_eop_irq +ffffffff81e3ad20 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81e3ada0 t gfx_v8_0_priv_reg_irq +ffffffff81e3aea0 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81e3af20 t gfx_v8_0_priv_inst_irq +ffffffff81e3b020 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81e3b280 t gfx_v8_0_cp_ecc_error_irq +ffffffff81e3b2d0 t gfx_v8_0_set_sq_int_state +ffffffff81e3b360 t gfx_v8_0_sq_irq +ffffffff81e3b3d0 t gfx_v8_0_parse_sq_irq +ffffffff81e3b620 t gfx_v8_0_is_rlc_enabled +ffffffff81e3b660 t gfx_v8_0_set_safe_mode +ffffffff81e3b760 t gfx_v8_0_unset_safe_mode +ffffffff81e3b800 t gfx_v8_0_rlc_init +ffffffff81e3b8b0 t gfx_v8_0_get_csb_size +ffffffff81e3b8e0 t gfx_v8_0_get_csb_buffer +ffffffff81e3ba50 t gfx_v8_0_cp_jump_table_num +ffffffff81e3ba90 t gfx_v8_0_rlc_resume +ffffffff81e3be10 t gfx_v8_0_rlc_stop +ffffffff81e3be80 t gfx_v8_0_rlc_reset +ffffffff81e3bf00 t gfx_v8_0_rlc_start +ffffffff81e3bf80 t gfx_v8_0_update_spm_vmid +ffffffff81e3bff0 t gfx_v8_0_init_save_restore_list +ffffffff81e3c400 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81e3c620 t gfx_v8_0_sq_irq_work_func +ffffffff81e3c640 t gfx_v8_0_init_microcode +ffffffff81e3ceb0 t gfx_v8_0_mec_init +ffffffff81e3cfb0 t gfx_v8_0_compute_ring_init +ffffffff81e3d0e0 t gfx_v8_0_gpu_early_init +ffffffff81e3d580 t amdgpu_bo_unreserve +ffffffff81e3d660 t gfx_v8_0_kiq_resume +ffffffff81e3d910 t gfx_v8_0_cp_gfx_resume +ffffffff81e3e3d0 t gfx_v8_0_kcq_resume +ffffffff81e3ed90 t amdgpu_bo_reserve +ffffffff81e3ef00 t gfx_v8_0_mqd_commit +ffffffff81e3f0e0 t gfx_v8_0_mqd_init +ffffffff81e3f500 t gfx_v8_0_deactivate_hqd +ffffffff81e3f5c0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e3f900 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e40000 t gfx_v9_0_ras_error_inject +ffffffff81e401b0 t gfx_v9_0_query_ras_error_count +ffffffff81e40d80 t gfx_v9_0_reset_ras_error_count +ffffffff81e417b0 T gfx_v9_0_select_se_sh +ffffffff81e41850 t gfx_v9_0_early_init +ffffffff81e42380 t gfx_v9_0_late_init +ffffffff81e43270 t gfx_v9_0_sw_init +ffffffff81e43920 t gfx_v9_0_sw_fini +ffffffff81e43ae0 t gfx_v9_0_hw_init +ffffffff81e46a90 t gfx_v9_0_hw_fini +ffffffff81e47240 t gfx_v9_0_suspend +ffffffff81e47280 t gfx_v9_0_resume +ffffffff81e47290 t gfx_v9_0_is_idle +ffffffff81e47310 t gfx_v9_0_wait_for_idle +ffffffff81e47400 t gfx_v9_0_soft_reset +ffffffff81e477a0 t gfx_v9_0_set_clockgating_state +ffffffff81e47870 t gfx_v9_0_set_powergating_state +ffffffff81e47c60 t gfx_v9_0_get_clockgating_state +ffffffff81e47d70 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e48500 t gfx_v9_0_read_wave_data +ffffffff81e48740 t gfx_v9_0_read_wave_vgprs +ffffffff81e487a0 t gfx_v9_0_read_wave_sgprs +ffffffff81e487d0 t gfx_v9_0_select_me_pipe_q +ffffffff81e487f0 t wave_read_ind +ffffffff81e488e0 t wave_read_regs +ffffffff81e48a30 t gfx_v9_0_kiq_set_resources +ffffffff81e48d50 t gfx_v9_0_kiq_map_queues +ffffffff81e49090 t gfx_v9_0_kiq_unmap_queues +ffffffff81e493c0 t gfx_v9_0_kiq_query_status +ffffffff81e496b0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e497d0 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e49800 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e49870 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e498d0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e49d00 t gfx_v9_0_ring_test_ring +ffffffff81e49f30 t gfx_v9_0_ring_emit_rreg +ffffffff81e4a1c0 t gfx_v9_0_ring_emit_wreg +ffffffff81e4a3f0 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e4a440 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e4a4e0 t gfx_v9_0_wait_reg_mem +ffffffff81e4a810 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e4a840 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e4a950 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e4aa80 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e4b100 t gfx_v9_0_ring_emit_fence +ffffffff81e4b4c0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e4b520 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e4b630 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e4b700 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e4b7e0 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e4ba10 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e4bad0 t gfx_v9_ring_emit_sb +ffffffff81e4bbc0 t gfx_v9_ring_emit_cntxcntl +ffffffff81e4c0a0 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e4c1b0 t gfx_v9_0_ring_soft_recovery +ffffffff81e4c220 t gfx_v9_0_ring_preempt_ib +ffffffff81e4c3e0 t gfx_v9_0_emit_mem_sync +ffffffff81e4c6a0 t gfx_v9_0_write_data_to_reg +ffffffff81e4c8b0 t gfx_v9_0_ring_test_ib +ffffffff81e4ca60 t gfx_v9_0_ring_patch_cntl +ffffffff81e4caa0 t gfx_v9_0_ring_patch_ce_meta +ffffffff81e4cba0 t gfx_v9_0_ring_patch_de_meta +ffffffff81e4cc70 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e4cfa0 t gfx_v9_0_emit_wave_limit +ffffffff81e4d180 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e4d360 t gfx_v9_0_eop_irq +ffffffff81e4d4a0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e4d660 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e4d7a0 t gfx_v9_0_priv_reg_irq +ffffffff81e4d8a0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e4d9e0 t gfx_v9_0_priv_inst_irq +ffffffff81e4dae0 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e4e370 t gfx_v9_0_is_rlc_enabled +ffffffff81e4e400 t gfx_v9_0_set_safe_mode +ffffffff81e4e560 t gfx_v9_0_unset_safe_mode +ffffffff81e4e5d0 t gfx_v9_0_rlc_init +ffffffff81e4e640 t gfx_v9_0_get_csb_size +ffffffff81e4e670 t gfx_v9_0_get_csb_buffer +ffffffff81e4e7b0 t gfx_v9_0_cp_jump_table_num +ffffffff81e4e800 t gfx_v9_0_rlc_resume +ffffffff81e4ff10 t gfx_v9_0_rlc_stop +ffffffff81e502b0 t gfx_v9_0_rlc_reset +ffffffff81e50450 t gfx_v9_0_rlc_start +ffffffff81e505a0 t gfx_v9_0_update_spm_vmid +ffffffff81e505e0 t gfx_v9_0_is_rlcg_access_range +ffffffff81e50630 t gfx_v9_0_init_csb +ffffffff81e507c0 t gfx_v9_0_enable_lbpw +ffffffff81e508b0 t gfx_v9_0_update_spm_vmid_internal +ffffffff81e509d0 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e50c60 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e50d60 t gfx_v9_0_mec_init +ffffffff81e50f40 t gfx_v9_0_compute_ring_init +ffffffff81e51080 t gfx_v9_0_gpu_early_init +ffffffff81e514c0 t amdgpu_bo_unreserve +ffffffff81e515a0 t gfx_v9_0_cp_gfx_enable +ffffffff81e51690 t amdgpu_bo_reserve +ffffffff81e51800 t gfx_v9_0_kiq_init_register +ffffffff81e524e0 t gfx_v9_0_mqd_init +ffffffff81e52a30 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e52f60 t gfx_v9_0_update_3d_clock_gating +ffffffff81e53350 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e54000 t gfx_v9_4_query_ras_error_count +ffffffff81e54e00 t gfx_v9_4_query_ras_error_status +ffffffff81e54fd0 t gfx_v9_4_reset_ras_error_count +ffffffff81e56000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e56720 T gfx_v9_4_2_init_golden_registers +ffffffff81e567b0 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e56890 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e56a70 t gfx_v9_4_2_query_ras_error_count +ffffffff81e56b20 t gfx_v9_4_2_query_ras_error_status +ffffffff81e57380 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e573e0 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e578b0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e57ad0 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e57b50 t gfx_v9_4_2_run_shader +ffffffff81e57f50 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e585a0 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e588e0 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e58ac0 t wave_read_ind +ffffffff81e59000 t gfx_v9_4_3_xcp_suspend +ffffffff81e590a0 t gfx_v9_4_3_xcp_resume +ffffffff81e591e0 t gfx_v9_4_3_query_ras_error_count +ffffffff81e59200 t gfx_v9_4_3_query_ras_error_status +ffffffff81e59220 t gfx_v9_4_3_reset_ras_error_count +ffffffff81e59240 t gfx_v9_4_3_reset_ras_error_status +ffffffff81e59260 t gfx_v9_4_3_enable_watchdog_timer +ffffffff81e59280 t gfx_v9_4_3_early_init +ffffffff81e59940 t gfx_v9_4_3_late_init +ffffffff81e599c0 t gfx_v9_4_3_sw_init +ffffffff81e59e20 t gfx_v9_4_3_sw_fini +ffffffff81e59fd0 t gfx_v9_4_3_hw_init +ffffffff81e5aa70 t gfx_v9_4_3_hw_fini +ffffffff81e5ab30 t gfx_v9_4_3_suspend +ffffffff81e5abf0 t gfx_v9_4_3_resume +ffffffff81e5ac00 t gfx_v9_4_3_is_idle +ffffffff81e5adb0 t gfx_v9_4_3_wait_for_idle +ffffffff81e5ae40 t gfx_v9_4_3_soft_reset +ffffffff81e5b550 t gfx_v9_4_3_set_clockgating_state +ffffffff81e5b6b0 t gfx_v9_4_3_set_powergating_state +ffffffff81e5b6e0 t gfx_v9_4_3_get_clockgating_state +ffffffff81e5b850 t gfx_v9_4_3_kiq_set_resources +ffffffff81e5bb70 t gfx_v9_4_3_kiq_map_queues +ffffffff81e5bed0 t gfx_v9_4_3_kiq_unmap_queues +ffffffff81e5c250 t gfx_v9_4_3_kiq_query_status +ffffffff81e5c540 t gfx_v9_4_3_kiq_invalidate_tlbs +ffffffff81e5c660 t gfx_v9_4_3_ring_get_rptr_compute +ffffffff81e5c6a0 t gfx_v9_4_3_ring_get_wptr_compute +ffffffff81e5c710 t gfx_v9_4_3_ring_set_wptr_compute +ffffffff81e5c770 t gfx_v9_4_3_ring_emit_fence_kiq +ffffffff81e5cbc0 t gfx_v9_4_3_ring_test_ring +ffffffff81e5ce20 t gfx_v9_4_3_ring_emit_rreg +ffffffff81e5d0b0 t gfx_v9_4_3_ring_emit_wreg +ffffffff81e5d2e0 t gfx_v9_4_3_ring_emit_reg_wait +ffffffff81e5d330 t gfx_v9_4_3_ring_emit_reg_write_reg_wait +ffffffff81e5d350 t gfx_v9_4_3_wait_reg_mem +ffffffff81e5d680 t gfx_v9_4_3_ring_emit_ib_compute +ffffffff81e5d9b0 t gfx_v9_4_3_ring_emit_fence +ffffffff81e5dd60 t gfx_v9_4_3_ring_emit_pipeline_sync +ffffffff81e5ddc0 t gfx_v9_4_3_ring_emit_vm_flush +ffffffff81e5dde0 t gfx_v9_4_3_ring_emit_hdp_flush +ffffffff81e5deb0 t gfx_v9_4_3_ring_emit_gds_switch +ffffffff81e5e050 t gfx_v9_4_3_ring_test_ib +ffffffff81e5e200 t gfx_v9_4_3_emit_mem_sync +ffffffff81e5e4c0 t gfx_v9_4_3_emit_wave_limit +ffffffff81e5e6b0 t gfx_v9_4_3_write_data_to_reg +ffffffff81e5e8c0 t gfx_v9_4_3_set_eop_interrupt_state +ffffffff81e5ea30 t gfx_v9_4_3_eop_irq +ffffffff81e5ebd0 t gfx_v9_4_3_xcc_set_compute_eop_interrupt_state +ffffffff81e5ed30 t gfx_v9_4_3_ih_to_xcc_inst +ffffffff81e5ee00 t gfx_v9_4_3_set_priv_reg_fault_state +ffffffff81e5f1e0 t gfx_v9_4_3_priv_reg_irq +ffffffff81e5f240 t gfx_v9_4_3_fault +ffffffff81e5f3c0 t gfx_v9_4_3_set_priv_inst_fault_state +ffffffff81e5f7a0 t gfx_v9_4_3_priv_inst_irq +ffffffff81e5f800 t gfx_v9_4_3_is_rlc_enabled +ffffffff81e5f920 t gfx_v9_4_3_xcc_set_safe_mode +ffffffff81e5fbc0 t gfx_v9_4_3_xcc_unset_safe_mode +ffffffff81e5fce0 t gfx_v9_4_3_rlc_init +ffffffff81e5fd30 t gfx_v9_4_3_rlc_resume +ffffffff81e5fdf0 t gfx_v9_4_3_rlc_stop +ffffffff81e5fe90 t gfx_v9_4_3_rlc_reset +ffffffff81e60520 t gfx_v9_4_3_rlc_start +ffffffff81e605c0 t gfx_v9_4_3_update_spm_vmid +ffffffff81e607d0 t gfx_v9_4_3_is_rlcg_access_range +ffffffff81e60880 t gfx_v9_4_3_xcc_rlc_resume +ffffffff81e610d0 t gfx_v9_4_3_xcc_rlc_stop +ffffffff81e617f0 t gfx_v9_4_3_xcc_rlc_start +ffffffff81e61b80 t gfx_v9_4_3_xcc_enable_gui_idle_interrupt +ffffffff81e61da0 t gfx_v9_4_3_xcc_select_se_sh +ffffffff81e61fa0 t gfx_v9_4_3_mec_init +ffffffff81e62290 t gfx_v9_4_3_gpu_early_init +ffffffff81e624c0 t amdgpu_bo_unreserve +ffffffff81e625a0 t gfx_v9_4_3_get_gpu_clock_counter +ffffffff81e628e0 t gfx_v9_4_3_read_wave_data +ffffffff81e62bb0 t gfx_v9_4_3_read_wave_vgprs +ffffffff81e62bd0 t gfx_v9_4_3_read_wave_sgprs +ffffffff81e62c20 t gfx_v9_4_3_select_me_pipe_q +ffffffff81e62c90 t gfx_v9_4_3_switch_compute_partition +ffffffff81e62ff0 t wave_read_ind +ffffffff81e631f0 t wave_read_regs +ffffffff81e63480 t gfx_v9_4_3_xcc_constants_init +ffffffff81e64500 t gfx_v9_4_3_xcc_cp_resume +ffffffff81e654b0 t gfx_v9_4_3_xcc_cp_compute_enable +ffffffff81e65650 t amdgpu_bo_reserve +ffffffff81e657c0 t gfx_v9_4_3_xcc_kiq_init_register +ffffffff81e67400 t gfx_v9_4_3_xcc_mqd_init +ffffffff81e67e40 t gfx_v9_4_3_xcc_fini +ffffffff81e683e0 t gfx_v9_4_3_xcc_q_fini_register +ffffffff81e68d90 t gfx_v9_4_3_xcc_update_sram_fgcg +ffffffff81e69000 t gfx_v9_4_3_xcc_update_repeater_fgcg +ffffffff81e69270 t gfx_v9_4_3_xcc_update_medium_grain_clock_gating +ffffffff81e69dc0 t gfx_v9_4_3_xcc_update_coarse_grain_clock_gating +ffffffff81e6a620 t gfx_v9_4_3_inst_query_ras_err_count +ffffffff81e6a880 t gfx_v9_4_3_inst_query_ras_err_status +ffffffff81e6b600 t gfx_v9_4_3_inst_reset_ras_err_count +ffffffff81e6b7c0 t gfx_v9_4_3_inst_reset_ras_err_status +ffffffff81e6bf40 t gfx_v9_4_3_inst_enable_watchdog_timer +ffffffff81e6d000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e6d090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e6d1d0 t gfxhub_v1_0_gart_enable +ffffffff81e6e700 t gfxhub_v1_0_gart_disable +ffffffff81e6e9a0 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e6eaa0 t gfxhub_v1_0_init +ffffffff81e6f000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e70000 t gfxhub_v1_2_get_mc_fb_offset +ffffffff81e70120 t gfxhub_v1_2_setup_vm_pt_regs +ffffffff81e70190 t gfxhub_v1_2_gart_enable +ffffffff81e70220 t gfxhub_v1_2_gart_disable +ffffffff81e70280 t gfxhub_v1_2_set_fault_enable_default +ffffffff81e702f0 t gfxhub_v1_2_init +ffffffff81e705f0 t gfxhub_v1_2_get_xgmi_info +ffffffff81e70860 t gfxhub_v1_2_xcp_suspend +ffffffff81e708a0 t gfxhub_v1_2_xcp_resume +ffffffff81e70910 t gfxhub_v1_2_xcc_setup_vm_pt_regs +ffffffff81e70c30 t gfxhub_v1_2_xcc_gart_enable +ffffffff81e74070 t gfxhub_v1_2_xcc_gart_disable +ffffffff81e746e0 t gfxhub_v1_2_xcc_set_fault_enable_default +ffffffff81e75000 t gfxhub_v2_0_get_fb_location +ffffffff81e75090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e75120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e75260 t gfxhub_v2_0_gart_enable +ffffffff81e76490 t gfxhub_v2_0_gart_disable +ffffffff81e766e0 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e767e0 t gfxhub_v2_0_init +ffffffff81e768b0 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e76a80 t gfxhub_v2_0_get_invalidate_req +ffffffff81e77000 t gfxhub_v2_1_get_fb_location +ffffffff81e77090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e77120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e77260 t gfxhub_v2_1_gart_enable +ffffffff81e78560 t gfxhub_v2_1_gart_disable +ffffffff81e787b0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e788d0 t gfxhub_v2_1_init +ffffffff81e789a0 t gfxhub_v2_1_get_xgmi_info +ffffffff81e78ae0 t gfxhub_v2_1_utcl2_harvest +ffffffff81e78cc0 t gfxhub_v2_1_save_regs +ffffffff81e79730 t gfxhub_v2_1_restore_regs +ffffffff81e7a350 t gfxhub_v2_1_halt +ffffffff81e7a720 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e7a8f0 t gfxhub_v2_1_get_invalidate_req +ffffffff81e7b000 t gfxhub_v3_0_get_fb_location +ffffffff81e7b090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e7b120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e7b260 t gfxhub_v3_0_gart_enable +ffffffff81e7c560 t gfxhub_v3_0_gart_disable +ffffffff81e7c800 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e7c9d0 t gfxhub_v3_0_init +ffffffff81e7caa0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e7cc70 t gfxhub_v3_0_get_invalidate_req +ffffffff81e7d000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e7d090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e7d120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e7d260 t gfxhub_v3_0_3_gart_enable +ffffffff81e7e450 t gfxhub_v3_0_3_gart_disable +ffffffff81e7e6f0 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e7e810 t gfxhub_v3_0_3_init +ffffffff81e7e8e0 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e7eab0 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e7f000 t gmc_v10_0_early_init +ffffffff81e7f170 t gmc_v10_0_late_init +ffffffff81e7f1e0 t gmc_v10_0_sw_init +ffffffff81e7f5d0 t gmc_v10_0_sw_fini +ffffffff81e7f620 t gmc_v10_0_hw_init +ffffffff81e7f830 t gmc_v10_0_hw_fini +ffffffff81e7f8d0 t gmc_v10_0_suspend +ffffffff81e7f970 t gmc_v10_0_resume +ffffffff81e7f9d0 t gmc_v10_0_is_idle +ffffffff81e7fa00 t gmc_v10_0_wait_for_idle +ffffffff81e7fa30 t gmc_v10_0_soft_reset +ffffffff81e7fa60 t gmc_v10_0_set_clockgating_state +ffffffff81e7fb10 t gmc_v10_0_set_powergating_state +ffffffff81e7fb40 t gmc_v10_0_get_clockgating_state +ffffffff81e7fbe0 t gmc_v10_0_flush_gpu_tlb +ffffffff81e7fe70 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e80120 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e802d0 t gmc_v10_0_emit_pasid_mapping +ffffffff81e80350 t gmc_v10_0_map_mtype +ffffffff81e803a0 t gmc_v10_0_get_vm_pde +ffffffff81e80490 t gmc_v10_0_get_vm_pte +ffffffff81e80570 t gmc_v10_0_get_vbios_fb_size +ffffffff81e806e0 t gmc_v10_0_flush_vm_hub +ffffffff81e80b10 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e80bb0 t gmc_v10_0_process_interrupt +ffffffff81e80e90 t gmc_v10_0_ecc_interrupt_state +ffffffff81e80ec0 t gmc_v10_0_gart_init +ffffffff81e81000 t gmc_v11_0_early_init +ffffffff81e811f0 t gmc_v11_0_late_init +ffffffff81e81260 t gmc_v11_0_sw_init +ffffffff81e81570 t gmc_v11_0_sw_fini +ffffffff81e815c0 t gmc_v11_0_hw_init +ffffffff81e81720 t gmc_v11_0_hw_fini +ffffffff81e817a0 t gmc_v11_0_suspend +ffffffff81e81820 t gmc_v11_0_resume +ffffffff81e81880 t gmc_v11_0_is_idle +ffffffff81e818b0 t gmc_v11_0_wait_for_idle +ffffffff81e818e0 t gmc_v11_0_soft_reset +ffffffff81e81910 t gmc_v11_0_set_clockgating_state +ffffffff81e81990 t gmc_v11_0_set_powergating_state +ffffffff81e819c0 t gmc_v11_0_get_clockgating_state +ffffffff81e81a00 t gmc_v11_0_flush_gpu_tlb +ffffffff81e81eb0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e82120 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e822d0 t gmc_v11_0_emit_pasid_mapping +ffffffff81e82350 t gmc_v11_0_map_mtype +ffffffff81e823a0 t gmc_v11_0_get_vm_pde +ffffffff81e824a0 t gmc_v11_0_get_vm_pte +ffffffff81e82580 t gmc_v11_0_get_vbios_fb_size +ffffffff81e826f0 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e82790 t gmc_v11_0_process_interrupt +ffffffff81e829c0 t gmc_v11_0_ecc_interrupt_state +ffffffff81e829f0 t gmc_v11_0_gart_init +ffffffff81e83000 t gmc_v7_0_early_init +ffffffff81e830a0 t gmc_v7_0_late_init +ffffffff81e830f0 t gmc_v7_0_sw_init +ffffffff81e83520 t gmc_v7_0_sw_fini +ffffffff81e835a0 t gmc_v7_0_hw_init +ffffffff81e83f10 t gmc_v7_0_hw_fini +ffffffff81e83fd0 t gmc_v7_0_suspend +ffffffff81e84010 t gmc_v7_0_resume +ffffffff81e84070 t gmc_v7_0_is_idle +ffffffff81e840c0 t gmc_v7_0_wait_for_idle +ffffffff81e84160 t gmc_v7_0_soft_reset +ffffffff81e843c0 t gmc_v7_0_set_clockgating_state +ffffffff81e84620 t gmc_v7_0_set_powergating_state +ffffffff81e84650 t gmc_v7_0_flush_gpu_tlb +ffffffff81e84680 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e84740 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e847e0 t gmc_v7_0_emit_pasid_mapping +ffffffff81e84810 t gmc_v7_0_set_prt +ffffffff81e849d0 t gmc_v7_0_get_vm_pde +ffffffff81e84a30 t gmc_v7_0_get_vm_pte +ffffffff81e84a70 t gmc_v7_0_get_vbios_fb_size +ffffffff81e84ae0 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e84bb0 t gmc_v7_0_process_interrupt +ffffffff81e84e50 t gmc_v7_0_gart_init +ffffffff81e85000 t gmc_v8_0_early_init +ffffffff81e850a0 t gmc_v8_0_late_init +ffffffff81e850f0 t gmc_v8_0_sw_init +ffffffff81e856a0 t gmc_v8_0_sw_fini +ffffffff81e85720 t gmc_v8_0_hw_init +ffffffff81e86390 t gmc_v8_0_hw_fini +ffffffff81e86450 t gmc_v8_0_suspend +ffffffff81e86490 t gmc_v8_0_resume +ffffffff81e864f0 t gmc_v8_0_is_idle +ffffffff81e86540 t gmc_v8_0_wait_for_idle +ffffffff81e865e0 t gmc_v8_0_check_soft_reset +ffffffff81e86650 t gmc_v8_0_pre_soft_reset +ffffffff81e867c0 t gmc_v8_0_soft_reset +ffffffff81e86890 t gmc_v8_0_post_soft_reset +ffffffff81e86900 t gmc_v8_0_set_clockgating_state +ffffffff81e86ec0 t gmc_v8_0_set_powergating_state +ffffffff81e86ef0 t gmc_v8_0_get_clockgating_state +ffffffff81e86f60 t gmc_v8_0_flush_gpu_tlb +ffffffff81e86f90 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e87050 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e870f0 t gmc_v8_0_emit_pasid_mapping +ffffffff81e87120 t gmc_v8_0_set_prt +ffffffff81e872e0 t gmc_v8_0_get_vm_pde +ffffffff81e87340 t gmc_v8_0_get_vm_pte +ffffffff81e87390 t gmc_v8_0_get_vbios_fb_size +ffffffff81e87400 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e874d0 t gmc_v8_0_process_interrupt +ffffffff81e87860 t gmc_v8_0_gart_init +ffffffff81e88000 T gmc_v9_0_restore_registers +ffffffff81e88160 t gmc_v9_0_early_init +ffffffff81e88510 t gmc_v9_0_late_init +ffffffff81e88620 t gmc_v9_0_sw_init +ffffffff81e88d80 t gmc_v9_0_sw_fini +ffffffff81e88e40 t gmc_v9_0_hw_init +ffffffff81e892f0 t gmc_v9_0_hw_fini +ffffffff81e893b0 t gmc_v9_0_suspend +ffffffff81e89470 t gmc_v9_0_resume +ffffffff81e894d0 t gmc_v9_0_is_idle +ffffffff81e89500 t gmc_v9_0_wait_for_idle +ffffffff81e89530 t gmc_v9_0_soft_reset +ffffffff81e89560 t gmc_v9_0_set_clockgating_state +ffffffff81e895c0 t gmc_v9_0_set_powergating_state +ffffffff81e895f0 t gmc_v9_0_get_clockgating_state +ffffffff81e89630 t gmc_v9_0_flush_gpu_tlb +ffffffff81e89cd0 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e8a080 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e8a280 t gmc_v9_0_emit_pasid_mapping +ffffffff81e8a300 t gmc_v9_0_map_mtype +ffffffff81e8a340 t gmc_v9_0_get_vm_pde +ffffffff81e8a440 t gmc_v9_0_get_vm_pte +ffffffff81e8a770 t gmc_v9_0_override_vm_pte_flags +ffffffff81e8a830 t gmc_v9_0_get_vbios_fb_size +ffffffff81e8a9d0 t gmc_v9_0_query_memory_partition +ffffffff81e8aa30 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e8aed0 t gmc_v9_0_process_interrupt +ffffffff81e8b6d0 t gmc_v9_0_ecc_interrupt_state +ffffffff81e8b830 t gmc_v9_0_init_mem_ranges +ffffffff81e8bc50 t gmc_v9_0_gart_init +ffffffff81e8bd80 t gmc_v9_0_save_registers +ffffffff81e8c000 t hdp_v4_0_query_ras_error_count +ffffffff81e8c0c0 t hdp_v4_0_reset_ras_error_count +ffffffff81e8c1e0 t hdp_v4_0_flush_hdp +ffffffff81e8c230 t hdp_v4_0_invalidate_hdp +ffffffff81e8c310 t hdp_v4_0_update_clock_gating +ffffffff81e8c410 t hdp_v4_0_get_clockgating_state +ffffffff81e8c460 t hdp_v4_0_init_registers +ffffffff81e8d000 t hdp_v5_0_flush_hdp +ffffffff81e8d050 t hdp_v5_0_invalidate_hdp +ffffffff81e8d0f0 t hdp_v5_0_update_clock_gating +ffffffff81e8d4f0 t hdp_v5_0_get_clockgating_state +ffffffff81e8d610 t hdp_v5_0_init_registers +ffffffff81e8e000 t hdp_v5_2_flush_hdp +ffffffff81e8e050 t hdp_v5_2_update_clock_gating +ffffffff81e8e460 t hdp_v5_2_get_clockgating_state +ffffffff81e8f000 t hdp_v6_0_flush_hdp +ffffffff81e8f050 t hdp_v6_0_update_clock_gating +ffffffff81e8f380 t hdp_v6_0_get_clockgating_state +ffffffff81e90000 t iceland_ih_early_init +ffffffff81e90050 t iceland_ih_sw_init +ffffffff81e900b0 t iceland_ih_sw_fini +ffffffff81e900f0 t iceland_ih_hw_init +ffffffff81e90310 t iceland_ih_hw_fini +ffffffff81e903e0 t iceland_ih_suspend +ffffffff81e904b0 t iceland_ih_resume +ffffffff81e904f0 t iceland_ih_is_idle +ffffffff81e90540 t iceland_ih_wait_for_idle +ffffffff81e905e0 t iceland_ih_soft_reset +ffffffff81e906c0 t iceland_ih_set_clockgating_state +ffffffff81e906f0 t iceland_ih_set_powergating_state +ffffffff81e90720 t iceland_ih_get_wptr +ffffffff81e90810 t iceland_ih_decode_iv +ffffffff81e90890 t iceland_ih_set_rptr +ffffffff81e91000 t ih_v6_0_early_init +ffffffff81e91050 t ih_v6_0_sw_init +ffffffff81e911b0 t ih_v6_0_sw_fini +ffffffff81e911f0 t ih_v6_0_hw_init +ffffffff81e917a0 t ih_v6_0_hw_fini +ffffffff81e91800 t ih_v6_0_suspend +ffffffff81e91860 t ih_v6_0_resume +ffffffff81e91870 t ih_v6_0_is_idle +ffffffff81e918a0 t ih_v6_0_wait_for_idle +ffffffff81e918d0 t ih_v6_0_soft_reset +ffffffff81e91900 t ih_v6_0_set_clockgating_state +ffffffff81e91a30 t ih_v6_0_set_powergating_state +ffffffff81e91bb0 t ih_v6_0_get_clockgating_state +ffffffff81e91c40 t ih_v6_0_get_wptr +ffffffff81e91d30 t ih_v6_0_set_rptr +ffffffff81e91e00 t ih_v6_0_self_irq +ffffffff81e91e70 t ih_v6_0_toggle_interrupts +ffffffff81e92050 t force_update_wptr_for_self_int +ffffffff81e93000 t ih_v6_1_early_init +ffffffff81e93050 t ih_v6_1_sw_init +ffffffff81e931b0 t ih_v6_1_sw_fini +ffffffff81e931f0 t ih_v6_1_hw_init +ffffffff81e937a0 t ih_v6_1_hw_fini +ffffffff81e93800 t ih_v6_1_suspend +ffffffff81e93860 t ih_v6_1_resume +ffffffff81e93870 t ih_v6_1_is_idle +ffffffff81e938a0 t ih_v6_1_wait_for_idle +ffffffff81e938d0 t ih_v6_1_soft_reset +ffffffff81e93900 t ih_v6_1_set_clockgating_state +ffffffff81e93a30 t ih_v6_1_set_powergating_state +ffffffff81e93bb0 t ih_v6_1_get_clockgating_state +ffffffff81e93c40 t ih_v6_1_get_wptr +ffffffff81e93d30 t ih_v6_1_set_rptr +ffffffff81e93e00 t ih_v6_1_self_irq +ffffffff81e93e70 t ih_v6_1_toggle_interrupts +ffffffff81e94050 t force_update_wptr_for_self_int +ffffffff81e95000 t imu_v11_0_init_microcode +ffffffff81e95170 t imu_v11_0_load_microcode +ffffffff81e954f0 t imu_v11_0_setup +ffffffff81e95780 t imu_v11_0_start +ffffffff81e95880 t imu_v11_0_program_rlc_ram +ffffffff81e95a40 t imu_v11_0_wait_for_reset_status +ffffffff81e95b90 t program_imu_rlc_ram +ffffffff81e96000 T imu_v11_0_3_program_rlc_ram +ffffffff81e97000 T jpeg_v1_0_early_init +ffffffff81e97080 T jpeg_v1_0_sw_init +ffffffff81e97170 T jpeg_v1_0_sw_fini +ffffffff81e97190 T jpeg_v1_0_start +ffffffff81e97c40 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e97cd0 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e97d60 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e97dd0 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e986f0 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e99030 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e990a0 t jpeg_v1_0_decode_ring_nop +ffffffff81e99200 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e993c0 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e99580 t jpeg_v1_0_ring_begin_use +ffffffff81e99680 t jpeg_v1_0_decode_ring_emit_wreg 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jpeg_v2_0_set_powergating_state +ffffffff81e9c660 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e9c6f0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e9c790 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e9c830 t jpeg_v2_0_set_interrupt_state +ffffffff81e9c860 t jpeg_v2_0_process_interrupt +ffffffff81e9c8f0 t jpeg_v2_0_enable_clock_gating +ffffffff81e9caa0 t jpeg_v2_0_disable_clock_gating +ffffffff81e9d000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e9d150 t jpeg_v2_5_early_init +ffffffff81e9d350 t jpeg_v2_5_sw_init +ffffffff81e9d5f0 t jpeg_v2_5_sw_fini +ffffffff81e9d640 t jpeg_v2_5_hw_init +ffffffff81e9d730 t jpeg_v2_5_hw_fini +ffffffff81e9d8b0 t jpeg_v2_5_suspend +ffffffff81e9d8e0 t jpeg_v2_5_resume +ffffffff81e9d9e0 t jpeg_v2_5_is_idle +ffffffff81e9dae0 t jpeg_v2_5_wait_for_idle +ffffffff81e9db90 t jpeg_v2_5_set_clockgating_state +ffffffff81e9dc40 t jpeg_v2_5_set_powergating_state +ffffffff81e9e370 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e9e410 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e9e4c0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e9e570 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e9e730 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e9e8f0 t jpeg_v2_5_set_interrupt_state +ffffffff81e9e920 t jpeg_v2_5_process_interrupt +ffffffff81e9e9e0 t jpeg_v2_6_set_ras_interrupt_state +ffffffff81e9ea10 t jpeg_v2_5_enable_clock_gating +ffffffff81e9eaf0 t jpeg_v2_5_disable_clock_gating +ffffffff81e9f000 t jpeg_v3_0_early_init +ffffffff81e9f110 t jpeg_v3_0_sw_init +ffffffff81e9f240 t jpeg_v3_0_sw_fini +ffffffff81e9f290 t jpeg_v3_0_hw_init +ffffffff81e9f310 t jpeg_v3_0_hw_fini +ffffffff81e9f3f0 t jpeg_v3_0_suspend +ffffffff81e9f420 t jpeg_v3_0_resume +ffffffff81e9f4b0 t jpeg_v3_0_is_idle +ffffffff81e9f540 t jpeg_v3_0_wait_for_idle +ffffffff81e9f580 t jpeg_v3_0_set_clockgating_state +ffffffff81e9f630 t jpeg_v3_0_set_powergating_state +ffffffff81e9fe10 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e9fea0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e9ff40 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e9ffe0 t jpeg_v3_0_set_interrupt_state +ffffffff81ea0010 t jpeg_v3_0_process_interrupt +ffffffff81ea00a0 t jpeg_v3_0_enable_clock_gating +ffffffff81ea0170 t jpeg_v3_0_disable_clock_gating +ffffffff81ea1000 t jpeg_v4_0_query_ras_poison_status +ffffffff81ea1150 t jpeg_v4_0_early_init +ffffffff81ea1220 t jpeg_v4_0_sw_init +ffffffff81ea13c0 t jpeg_v4_0_sw_fini +ffffffff81ea1410 t jpeg_v4_0_hw_init +ffffffff81ea1a40 t jpeg_v4_0_hw_fini +ffffffff81ea1b10 t jpeg_v4_0_suspend +ffffffff81ea1b40 t jpeg_v4_0_resume +ffffffff81ea1b90 t jpeg_v4_0_is_idle +ffffffff81ea1c20 t jpeg_v4_0_wait_for_idle +ffffffff81ea1c60 t jpeg_v4_0_set_clockgating_state +ffffffff81ea1d10 t jpeg_v4_0_set_powergating_state +ffffffff81ea2470 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81ea2500 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81ea25a0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81ea2640 t jpeg_v4_0_set_interrupt_state +ffffffff81ea2670 t jpeg_v4_0_process_interrupt +ffffffff81ea2710 t jpeg_v4_0_set_ras_interrupt_state +ffffffff81ea2740 t jpeg_v4_0_enable_clock_gating +ffffffff81ea2900 t jpeg_v4_0_disable_clock_gating +ffffffff81ea3000 t jpeg_v4_0_3_early_init +ffffffff81ea3170 t jpeg_v4_0_3_sw_init +ffffffff81ea34a0 t jpeg_v4_0_3_sw_fini +ffffffff81ea34f0 t jpeg_v4_0_3_hw_init +ffffffff81ea3f50 t jpeg_v4_0_3_hw_fini +ffffffff81ea3fe0 t jpeg_v4_0_3_suspend +ffffffff81ea4060 t jpeg_v4_0_3_resume +ffffffff81ea40b0 t jpeg_v4_0_3_is_idle +ffffffff81ea4290 t jpeg_v4_0_3_wait_for_idle +ffffffff81ea43e0 t jpeg_v4_0_3_set_clockgating_state +ffffffff81ea4470 t jpeg_v4_0_3_set_powergating_state +ffffffff81ea50d0 t jpeg_v4_0_3_dec_ring_get_rptr +ffffffff81ea5240 t jpeg_v4_0_3_dec_ring_get_wptr +ffffffff81ea53d0 t jpeg_v4_0_3_dec_ring_set_wptr +ffffffff81ea5570 t jpeg_v4_0_3_dec_ring_emit_ib +ffffffff81ea5dd0 t jpeg_v4_0_3_dec_ring_emit_fence +ffffffff81ea6560 t jpeg_v4_0_3_dec_ring_emit_vm_flush +ffffffff81ea65d0 t jpeg_v4_0_3_dec_ring_nop +ffffffff81ea6730 t jpeg_v4_0_3_dec_ring_insert_start +ffffffff81ea68d0 t jpeg_v4_0_3_dec_ring_insert_end +ffffffff81ea6a70 t jpeg_v4_0_3_dec_ring_emit_wreg +ffffffff81ea6cb0 t jpeg_v4_0_3_dec_ring_emit_reg_wait +ffffffff81ea7060 t jpeg_v4_0_3_set_interrupt_state +ffffffff81ea7090 t jpeg_v4_0_3_process_interrupt +ffffffff81ea72d0 t jpeg_v4_0_3_query_ras_error_count +ffffffff81ea73c0 t jpeg_v4_0_3_reset_ras_error_count +ffffffff81ea74b0 t jpeg_v4_0_3_disable_clock_gating +ffffffff81ea8000 t lsdma_v6_0_copy_mem +ffffffff81ea8370 t lsdma_v6_0_fill_mem +ffffffff81ea8660 t lsdma_v6_0_update_memory_power_gating +ffffffff81ea9000 t mca_v3_0_ras_block_match +ffffffff81ea9050 t mca_v3_0_mp0_query_ras_error_count +ffffffff81ea9070 t mca_v3_0_mp1_query_ras_error_count +ffffffff81ea9090 t mca_v3_0_mpio_query_ras_error_count +ffffffff81eaa000 t mes_v10_0_early_init +ffffffff81eaa060 t mes_v10_0_late_init +ffffffff81eaa0b0 t mes_v10_1_sw_init +ffffffff81eaa550 t mes_v10_1_sw_fini +ffffffff81eaa670 t mes_v10_1_hw_init +ffffffff81eaaf60 t mes_v10_1_hw_fini +ffffffff81eab050 t mes_v10_1_suspend +ffffffff81eab160 t mes_v10_1_resume +ffffffff81eab1b0 t mes_v10_1_kiq_hw_init +ffffffff81eab5c0 t mes_v10_1_add_hw_queue +ffffffff81eab740 t mes_v10_1_remove_hw_queue +ffffffff81eab7d0 t mes_v10_1_unmap_legacy_queue +ffffffff81eab8c0 t mes_v10_1_suspend_gang +ffffffff81eab8f0 t mes_v10_1_resume_gang +ffffffff81eab920 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81eabb20 t mes_v10_1_load_microcode +ffffffff81eac340 t mes_v10_1_enable +ffffffff81eac7c0 t mes_v10_1_queue_init +ffffffff81eaca60 t amdgpu_bo_unreserve +ffffffff81eacb40 t mes_v10_1_ring_get_rptr +ffffffff81eacb70 t mes_v10_1_ring_get_wptr +ffffffff81eacbe0 t mes_v10_1_ring_set_wptr +ffffffff81ead000 t mes_v11_0_early_init +ffffffff81ead060 t mes_v11_0_late_init +ffffffff81ead0d0 t mes_v11_0_sw_init +ffffffff81ead570 t mes_v11_0_sw_fini +ffffffff81ead730 t mes_v11_0_hw_init +ffffffff81eadf60 t mes_v11_0_hw_fini +ffffffff81eadf90 t mes_v11_0_suspend +ffffffff81eadfa0 t mes_v11_0_resume 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mmhub_v1_0_gart_enable +ffffffff81eb2720 t mmhub_v1_0_set_fault_enable_default +ffffffff81eb2840 t mmhub_v1_0_gart_disable +ffffffff81eb2ae0 t mmhub_v1_0_set_clockgating +ffffffff81eb2f70 t mmhub_v1_0_get_clockgating +ffffffff81eb3090 t mmhub_v1_0_setup_vm_pt_regs +ffffffff81eb31d0 t mmhub_v1_0_update_power_gating +ffffffff81eb4000 t mmhub_v1_7_query_ras_error_count +ffffffff81eb4150 t mmhub_v1_7_query_ras_error_status +ffffffff81eb4230 t mmhub_v1_7_reset_ras_error_count +ffffffff81eb42d0 t mmhub_v1_7_reset_ras_error_status +ffffffff81eb43d0 t mmhub_v1_7_get_fb_location +ffffffff81eb44f0 t mmhub_v1_7_init +ffffffff81eb4590 t mmhub_v1_7_gart_enable +ffffffff81eb5aa0 t mmhub_v1_7_set_fault_enable_default +ffffffff81eb5bc0 t mmhub_v1_7_gart_disable +ffffffff81eb5e60 t mmhub_v1_7_set_clockgating +ffffffff81eb6200 t mmhub_v1_7_get_clockgating +ffffffff81eb6320 t mmhub_v1_7_setup_vm_pt_regs +ffffffff81eb7000 t mmhub_v1_8_get_fb_location +ffffffff81eb7120 t mmhub_v1_8_init +ffffffff81eb7280 t mmhub_v1_8_gart_enable +ffffffff81eb8e90 t mmhub_v1_8_set_fault_enable_default +ffffffff81eb9060 t mmhub_v1_8_gart_disable +ffffffff81eb93a0 t mmhub_v1_8_set_clockgating +ffffffff81eb93d0 t mmhub_v1_8_get_clockgating +ffffffff81eb9400 t mmhub_v1_8_setup_vm_pt_regs +ffffffff81eb9610 t mmhub_v1_8_query_ras_error_count +ffffffff81eb9770 t mmhub_v1_8_query_ras_error_status +ffffffff81eb9a20 t mmhub_v1_8_reset_ras_error_count +ffffffff81eb9b30 t mmhub_v1_8_reset_ras_error_status +ffffffff81ebb000 t mmhub_v2_0_init +ffffffff81ebb0d0 t mmhub_v2_0_gart_enable +ffffffff81ebc290 t mmhub_v2_0_set_fault_enable_default +ffffffff81ebc3b0 t mmhub_v2_0_gart_disable +ffffffff81ebc640 t mmhub_v2_0_set_clockgating +ffffffff81ebc990 t mmhub_v2_0_get_clockgating +ffffffff81ebcb20 t mmhub_v2_0_setup_vm_pt_regs +ffffffff81ebcc60 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff81ebceb0 t mmhub_v2_0_get_invalidate_req +ffffffff81ebd000 t mmhub_v2_3_init +ffffffff81ebd0e0 t mmhub_v2_3_gart_enable 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+ffffffff81edef80 t psp_v11_0_memory_training +ffffffff81edf400 t psp_v11_0_ring_get_wptr +ffffffff81edf450 t psp_v11_0_ring_set_wptr +ffffffff81edf590 t psp_v11_0_load_usbc_pd_fw +ffffffff81edf780 t psp_v11_0_read_usbc_pd_fw +ffffffff81edf8a0 t psp_v11_0_bootloader_load_component +ffffffff81edfa60 t psp_v11_0_wait_for_bootloader +ffffffff81edfc30 t psp_v11_0_memory_training_send_msg +ffffffff81ee0000 T psp_v11_0_8_set_psp_funcs +ffffffff81ee0030 t psp_v11_0_8_ring_create +ffffffff81ee06d0 t psp_v11_0_8_ring_stop +ffffffff81ee0a60 t psp_v11_0_8_ring_destroy +ffffffff81ee0ae0 t psp_v11_0_8_ring_get_wptr +ffffffff81ee0b50 t psp_v11_0_8_ring_set_wptr +ffffffff81ee1000 T psp_v12_0_set_psp_funcs +ffffffff81ee1030 t psp_v12_0_init_microcode +ffffffff81ee10e0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81ee1410 t psp_v12_0_bootloader_load_sos +ffffffff81ee1790 t psp_v12_0_ring_create +ffffffff81ee2190 t psp_v12_0_ring_stop +ffffffff81ee23b0 t psp_v12_0_ring_destroy +ffffffff81ee2430 t psp_v12_0_mode1_reset +ffffffff81ee2530 t psp_v12_0_ring_get_wptr +ffffffff81ee25a0 t psp_v12_0_ring_set_wptr +ffffffff81ee3000 T psp_v13_0_set_psp_funcs +ffffffff81ee3030 t psp_v13_0_init_microcode +ffffffff81ee3130 t psp_v13_0_wait_for_bootloader_steady_state +ffffffff81ee3240 t psp_v13_0_bootloader_load_kdb +ffffffff81ee3260 t psp_v13_0_bootloader_load_spl +ffffffff81ee3280 t psp_v13_0_bootloader_load_sysdrv +ffffffff81ee32a0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81ee32c0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81ee32e0 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81ee3300 t psp_v13_0_bootloader_load_ras_drv +ffffffff81ee3320 t psp_v13_0_bootloader_load_sos +ffffffff81ee36f0 t psp_v13_0_ring_create +ffffffff81ee3d90 t psp_v13_0_ring_stop +ffffffff81ee4120 t psp_v13_0_ring_destroy +ffffffff81ee41a0 t psp_v13_0_memory_training +ffffffff81ee45d0 t psp_v13_0_ring_get_wptr +ffffffff81ee4640 t psp_v13_0_ring_set_wptr +ffffffff81ee4740 t psp_v13_0_load_usbc_pd_fw +ffffffff81ee4930 t psp_v13_0_read_usbc_pd_fw +ffffffff81ee4a50 t psp_v13_0_update_spirom +ffffffff81ee4c30 t psp_v13_0_vbflash_status +ffffffff81ee4c90 t psp_v13_0_fatal_error_recovery_quirk +ffffffff81ee4dc0 t psp_v13_0_bootloader_load_component +ffffffff81ee5030 t psp_v13_0_memory_training_send_msg +ffffffff81ee51a0 t psp_v13_0_exec_spi_cmd +ffffffff81ee6000 T psp_v13_0_4_set_psp_funcs +ffffffff81ee6030 t psp_v13_0_4_init_microcode +ffffffff81ee60d0 t psp_v13_0_4_bootloader_load_kdb +ffffffff81ee60f0 t psp_v13_0_4_bootloader_load_spl +ffffffff81ee6110 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81ee6130 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81ee6150 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81ee6170 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81ee6190 t psp_v13_0_4_bootloader_load_sos +ffffffff81ee6500 t psp_v13_0_4_ring_create +ffffffff81ee6bb0 t psp_v13_0_4_ring_stop +ffffffff81ee6f40 t psp_v13_0_4_ring_destroy +ffffffff81ee6fc0 t psp_v13_0_4_ring_get_wptr +ffffffff81ee7030 t psp_v13_0_4_ring_set_wptr +ffffffff81ee7130 t psp_v13_0_4_bootloader_load_component +ffffffff81ee7300 t psp_v13_0_4_wait_for_bootloader +ffffffff81ee8000 T psp_v3_1_set_psp_funcs +ffffffff81ee8030 t psp_v3_1_init_microcode +ffffffff81ee80c0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81ee83f0 t psp_v3_1_bootloader_load_sos +ffffffff81ee8770 t psp_v3_1_ring_create +ffffffff81ee9290 t psp_v3_1_ring_stop +ffffffff81ee94b0 t psp_v3_1_ring_destroy +ffffffff81ee9530 t psp_v3_1_smu_reload_quirk +ffffffff81ee9580 t psp_v3_1_mode1_reset +ffffffff81ee9680 t psp_v3_1_ring_get_wptr +ffffffff81ee96d0 t psp_v3_1_ring_set_wptr +ffffffff81eea000 t sdma_v2_4_early_init +ffffffff81eea0f0 t sdma_v2_4_sw_init +ffffffff81eea4a0 t sdma_v2_4_sw_fini +ffffffff81eea550 t sdma_v2_4_hw_init +ffffffff81eea8f0 t sdma_v2_4_hw_fini +ffffffff81eea930 t sdma_v2_4_suspend +ffffffff81eea970 t sdma_v2_4_resume +ffffffff81eea980 t sdma_v2_4_is_idle +ffffffff81eea9c0 t sdma_v2_4_wait_for_idle +ffffffff81eeaa60 t sdma_v2_4_soft_reset +ffffffff81eeaba0 t sdma_v2_4_set_clockgating_state +ffffffff81eeabd0 t sdma_v2_4_set_powergating_state +ffffffff81eeac00 t sdma_v2_4_ring_get_rptr +ffffffff81eeac40 t sdma_v2_4_ring_get_wptr +ffffffff81eeaca0 t sdma_v2_4_ring_set_wptr +ffffffff81eeace0 t sdma_v2_4_ring_emit_ib +ffffffff81eeaf90 t sdma_v2_4_ring_emit_fence +ffffffff81eeb390 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81eeb610 t sdma_v2_4_ring_emit_vm_flush +ffffffff81eeb880 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81eebb00 t sdma_v2_4_ring_test_ring +ffffffff81eebde0 t sdma_v2_4_ring_test_ib +ffffffff81eebfb0 t sdma_v2_4_ring_insert_nop +ffffffff81eec0e0 t sdma_v2_4_ring_pad_ib +ffffffff81eec210 t sdma_v2_4_ring_emit_wreg +ffffffff81eec360 t sdma_v2_4_emit_copy_buffer +ffffffff81eec420 t sdma_v2_4_emit_fill_buffer +ffffffff81eec4b0 t sdma_v2_4_vm_copy_pte +ffffffff81eec570 t sdma_v2_4_vm_write_pte +ffffffff81eec640 t sdma_v2_4_vm_set_pte_pde +ffffffff81eec740 t sdma_v2_4_set_trap_irq_state +ffffffff81eec800 t sdma_v2_4_process_trap_irq +ffffffff81eec8a0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81eec920 t sdma_v2_4_enable +ffffffff81eed000 t sdma_v3_0_early_init +ffffffff81eed100 t sdma_v3_0_sw_init +ffffffff81eed4c0 t sdma_v3_0_sw_fini +ffffffff81eed570 t sdma_v3_0_hw_init +ffffffff81eed6a0 t sdma_v3_0_hw_fini +ffffffff81eed6f0 t sdma_v3_0_suspend +ffffffff81eed740 t sdma_v3_0_resume +ffffffff81eed750 t sdma_v3_0_is_idle +ffffffff81eed790 t sdma_v3_0_wait_for_idle +ffffffff81eed830 t sdma_v3_0_check_soft_reset +ffffffff81eed890 t sdma_v3_0_pre_soft_reset +ffffffff81eed8e0 t sdma_v3_0_soft_reset +ffffffff81eed9b0 t sdma_v3_0_post_soft_reset +ffffffff81eeda00 t sdma_v3_0_set_clockgating_state +ffffffff81eedc60 t sdma_v3_0_set_powergating_state +ffffffff81eedc90 t sdma_v3_0_get_clockgating_state +ffffffff81eedd10 t sdma_v3_0_ring_get_rptr +ffffffff81eedd50 t sdma_v3_0_ring_get_wptr +ffffffff81eeddd0 t sdma_v3_0_ring_set_wptr +ffffffff81eede80 t sdma_v3_0_ring_emit_ib +ffffffff81eee130 t sdma_v3_0_ring_emit_fence +ffffffff81eee530 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81eee7b0 t sdma_v3_0_ring_emit_vm_flush +ffffffff81eeea20 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81eeeca0 t sdma_v3_0_ring_test_ring +ffffffff81eeef80 t sdma_v3_0_ring_test_ib +ffffffff81eef150 t sdma_v3_0_ring_insert_nop +ffffffff81eef280 t sdma_v3_0_ring_pad_ib +ffffffff81eef3b0 t sdma_v3_0_ring_emit_wreg +ffffffff81eef500 t sdma_v3_0_emit_copy_buffer +ffffffff81eef5c0 t sdma_v3_0_emit_fill_buffer +ffffffff81eef650 t sdma_v3_0_vm_copy_pte +ffffffff81eef710 t sdma_v3_0_vm_write_pte +ffffffff81eef7e0 t sdma_v3_0_vm_set_pte_pde +ffffffff81eef8e0 t sdma_v3_0_set_trap_irq_state +ffffffff81eef9a0 t sdma_v3_0_process_trap_irq +ffffffff81eefa40 t sdma_v3_0_process_illegal_inst_irq +ffffffff81eefac0 t sdma_v3_0_ctx_switch_enable +ffffffff81eefc60 t sdma_v3_0_enable +ffffffff81eefdd0 t sdma_v3_0_gfx_resume +ffffffff81ef1000 t sdma_v4_0_early_init +ffffffff81ef12d0 t sdma_v4_0_late_init +ffffffff81ef1570 t sdma_v4_0_sw_init +ffffffff81ef19b0 t sdma_v4_0_sw_fini +ffffffff81ef1a70 t sdma_v4_0_hw_init +ffffffff81ef49d0 t sdma_v4_0_hw_fini +ffffffff81ef4a90 t sdma_v4_0_suspend +ffffffff81ef4ae0 t sdma_v4_0_resume +ffffffff81ef4b60 t sdma_v4_0_is_idle +ffffffff81ef4c90 t sdma_v4_0_wait_for_idle +ffffffff81ef4e30 t sdma_v4_0_soft_reset +ffffffff81ef4e60 t sdma_v4_0_set_clockgating_state +ffffffff81ef5360 t sdma_v4_0_set_powergating_state +ffffffff81ef5420 t sdma_v4_0_get_clockgating_state +ffffffff81ef54c0 t sdma_v4_0_query_ras_error_count +ffffffff81ef5690 t sdma_v4_0_reset_ras_error_count +ffffffff81ef57e0 t sdma_v4_0_ring_get_rptr +ffffffff81ef5840 t sdma_v4_0_ring_get_wptr +ffffffff81ef5a30 t sdma_v4_0_ring_set_wptr +ffffffff81ef5cb0 t sdma_v4_0_ring_emit_ib +ffffffff81ef5f60 t sdma_v4_0_ring_emit_fence +ffffffff81ef6380 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81ef63e0 t sdma_v4_0_ring_emit_vm_flush +ffffffff81ef6400 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81ef64b0 t sdma_v4_0_ring_test_ring +ffffffff81ef6790 t sdma_v4_0_ring_test_ib +ffffffff81ef6960 t sdma_v4_0_ring_insert_nop +ffffffff81ef6a90 t sdma_v4_0_ring_pad_ib +ffffffff81ef6bc0 t sdma_v4_0_ring_emit_wreg +ffffffff81ef6d10 t sdma_v4_0_ring_emit_reg_wait +ffffffff81ef6d60 t sdma_v4_0_wait_reg_mem +ffffffff81ef7070 t sdma_v4_0_page_ring_get_wptr +ffffffff81ef7220 t sdma_v4_0_page_ring_set_wptr +ffffffff81ef73e0 t sdma_v4_0_emit_copy_buffer +ffffffff81ef74a0 t sdma_v4_0_emit_fill_buffer +ffffffff81ef7530 t sdma_v4_0_vm_copy_pte +ffffffff81ef75f0 t sdma_v4_0_vm_write_pte +ffffffff81ef76c0 t sdma_v4_0_vm_set_pte_pde +ffffffff81ef77c0 t sdma_v4_0_set_trap_irq_state +ffffffff81ef7960 t sdma_v4_0_process_trap_irq +ffffffff81ef7a90 t sdma_v4_0_process_illegal_inst_irq +ffffffff81ef7bb0 t sdma_v4_0_set_ecc_irq_state +ffffffff81ef7d50 t sdma_v4_0_process_vm_hole_irq +ffffffff81ef7d90 t sdma_v4_0_print_iv_entry +ffffffff81ef7ed0 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81ef7f10 t sdma_v4_0_process_pool_timeout_irq +ffffffff81ef7f50 t sdma_v4_0_process_srbm_write_irq +ffffffff81ef7f90 t sdma_v4_0_process_ras_data_cb +ffffffff81ef8010 t sdma_v4_0_ctx_switch_enable +ffffffff81ef86e0 t sdma_v4_0_enable +ffffffff81ef8ca0 t sdma_v4_0_gfx_enable +ffffffff81efa000 t sdma_v4_4_query_ras_error_count +ffffffff81efa290 t sdma_v4_4_reset_ras_error_count +ffffffff81efb000 t sdma_v4_4_2_early_init +ffffffff81efb280 t sdma_v4_4_2_late_init +ffffffff81efb2f0 t sdma_v4_4_2_sw_init +ffffffff81efb810 t sdma_v4_4_2_sw_fini +ffffffff81efb8c0 t sdma_v4_4_2_hw_init +ffffffff81efb910 t sdma_v4_4_2_hw_fini +ffffffff81efb9d0 t sdma_v4_4_2_suspend +ffffffff81efbab0 t sdma_v4_4_2_resume +ffffffff81efbb00 t sdma_v4_4_2_is_idle +ffffffff81efbba0 t sdma_v4_4_2_wait_for_idle +ffffffff81efbcc0 t sdma_v4_4_2_soft_reset +ffffffff81efbcf0 t sdma_v4_4_2_set_clockgating_state +ffffffff81efc0f0 t sdma_v4_4_2_set_powergating_state +ffffffff81efc120 t sdma_v4_4_2_get_clockgating_state +ffffffff81efc200 t sdma_v4_4_2_xcp_suspend +ffffffff81efc2c0 t sdma_v4_4_2_xcp_resume +ffffffff81efc300 t sdma_v4_4_2_ring_get_rptr +ffffffff81efc370 t sdma_v4_4_2_ring_get_wptr +ffffffff81efc4b0 t sdma_v4_4_2_ring_set_wptr +ffffffff81efc670 t sdma_v4_4_2_ring_emit_ib +ffffffff81efc920 t sdma_v4_4_2_ring_emit_fence +ffffffff81efcd40 t sdma_v4_4_2_ring_emit_pipeline_sync +ffffffff81efcda0 t sdma_v4_4_2_ring_emit_vm_flush +ffffffff81efcdc0 t sdma_v4_4_2_ring_emit_hdp_flush +ffffffff81efce70 t sdma_v4_4_2_ring_test_ring +ffffffff81efd150 t sdma_v4_4_2_ring_test_ib +ffffffff81efd320 t sdma_v4_4_2_ring_insert_nop +ffffffff81efd450 t sdma_v4_4_2_ring_pad_ib +ffffffff81efd580 t sdma_v4_4_2_ring_emit_wreg +ffffffff81efd6d0 t sdma_v4_4_2_ring_emit_reg_wait +ffffffff81efd720 t sdma_v4_4_2_wait_reg_mem +ffffffff81efda30 t sdma_v4_4_2_page_ring_get_wptr +ffffffff81efdb30 t sdma_v4_4_2_page_ring_set_wptr +ffffffff81efdc40 t sdma_v4_4_2_emit_copy_buffer +ffffffff81efdd00 t sdma_v4_4_2_emit_fill_buffer +ffffffff81efdd90 t sdma_v4_4_2_vm_copy_pte +ffffffff81efde50 t sdma_v4_4_2_vm_write_pte +ffffffff81efdf20 t sdma_v4_4_2_vm_set_pte_pde +ffffffff81efe020 t sdma_v4_4_2_set_trap_irq_state +ffffffff81efe100 t sdma_v4_4_2_process_trap_irq +ffffffff81efe220 t sdma_v4_4_2_process_illegal_inst_irq +ffffffff81efe2b0 t sdma_v4_4_2_set_ecc_irq_state +ffffffff81efe390 t sdma_v4_4_2_process_vm_hole_irq +ffffffff81efe470 t sdma_v4_4_2_process_doorbell_invalid_irq +ffffffff81efe550 t sdma_v4_4_2_process_pool_timeout_irq +ffffffff81efe630 t sdma_v4_4_2_process_srbm_write_irq +ffffffff81efe710 t sdma_v4_4_2_query_ras_error_count +ffffffff81efe860 t sdma_v4_4_2_reset_ras_error_count +ffffffff81efe990 t sdma_v4_4_2_inst_init_golden_registers +ffffffff81efeb10 t sdma_v4_4_2_inst_start +ffffffff81effeb0 t sdma_v4_4_2_inst_ctx_switch_enable +ffffffff81f00180 t sdma_v4_4_2_inst_enable +ffffffff81f01000 t sdma_v5_0_early_init +ffffffff81f01130 t sdma_v5_0_sw_init +ffffffff81f01310 t sdma_v5_0_sw_fini +ffffffff81f013a0 t sdma_v5_0_hw_init +ffffffff81f02600 t sdma_v5_0_hw_fini +ffffffff81f02660 t sdma_v5_0_suspend +ffffffff81f026c0 t sdma_v5_0_resume +ffffffff81f026d0 t sdma_v5_0_is_idle +ffffffff81f02760 t sdma_v5_0_wait_for_idle +ffffffff81f02820 t sdma_v5_0_soft_reset +ffffffff81f02850 t sdma_v5_0_set_clockgating_state +ffffffff81f02a50 t sdma_v5_0_set_powergating_state +ffffffff81f02a80 t sdma_v5_0_get_clockgating_state +ffffffff81f02b20 t sdma_v5_0_ring_get_rptr +ffffffff81f02b80 t sdma_v5_0_ring_get_wptr +ffffffff81f02d20 t sdma_v5_0_ring_set_wptr +ffffffff81f03070 t sdma_v5_0_ring_emit_ib +ffffffff81f03330 t sdma_v5_0_ring_emit_fence +ffffffff81f03790 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81f03a10 t sdma_v5_0_ring_emit_vm_flush +ffffffff81f03a30 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81f03cd0 t sdma_v5_0_ring_test_ring +ffffffff81f04090 t sdma_v5_0_ring_test_ib +ffffffff81f043c0 t sdma_v5_0_ring_insert_nop +ffffffff81f044f0 t sdma_v5_0_ring_pad_ib +ffffffff81f04620 t sdma_v5_0_ring_init_cond_exec +ffffffff81f04850 t sdma_v5_0_ring_patch_cond_exec +ffffffff81f04910 t sdma_v5_0_ring_emit_wreg +ffffffff81f04a60 t sdma_v5_0_ring_emit_reg_wait +ffffffff81f04ce0 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81f04d60 t sdma_v5_0_ring_preempt_ib +ffffffff81f04ea0 t sdma_v5_0_ring_emit_mem_sync +ffffffff81f050b0 t sdma_v5_0_emit_copy_buffer +ffffffff81f05170 t sdma_v5_0_emit_fill_buffer +ffffffff81f05200 t sdma_v5_0_vm_copy_pte +ffffffff81f052c0 t sdma_v5_0_vm_write_pte +ffffffff81f05390 t sdma_v5_0_vm_set_pte_pde +ffffffff81f05490 t sdma_v5_0_set_trap_irq_state +ffffffff81f05520 t sdma_v5_0_process_trap_irq +ffffffff81f05630 t sdma_v5_0_process_illegal_inst_irq +ffffffff81f05660 t sdma_v5_0_mqd_init +ffffffff81f05740 t sdma_v5_0_ctx_switch_enable +ffffffff81f05a80 t sdma_v5_0_enable +ffffffff81f06000 t sdma_v5_2_early_init +ffffffff81f06130 t sdma_v5_2_sw_init +ffffffff81f06390 t sdma_v5_2_sw_fini +ffffffff81f06420 t sdma_v5_2_hw_init +ffffffff81f07fc0 t sdma_v5_2_hw_fini +ffffffff81f08020 t sdma_v5_2_suspend +ffffffff81f08080 t sdma_v5_2_resume +ffffffff81f08090 t sdma_v5_2_is_idle +ffffffff81f08140 t sdma_v5_2_wait_for_idle +ffffffff81f08240 t sdma_v5_2_soft_reset +ffffffff81f08500 t sdma_v5_2_set_clockgating_state +ffffffff81f08860 t sdma_v5_2_set_powergating_state +ffffffff81f08890 t sdma_v5_2_get_clockgating_state +ffffffff81f08920 t sdma_v5_2_ring_get_rptr +ffffffff81f08980 t sdma_v5_2_ring_get_wptr +ffffffff81f08ac0 t sdma_v5_2_ring_set_wptr +ffffffff81f08c70 t sdma_v5_2_ring_emit_ib +ffffffff81f08f30 t sdma_v5_2_ring_emit_fence +ffffffff81f09390 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81f09610 t sdma_v5_2_ring_emit_vm_flush +ffffffff81f09630 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81f098d0 t sdma_v5_2_ring_test_ring +ffffffff81f09c90 t sdma_v5_2_ring_test_ib +ffffffff81f09fc0 t sdma_v5_2_ring_insert_nop +ffffffff81f0a0f0 t sdma_v5_2_ring_pad_ib +ffffffff81f0a220 t sdma_v5_2_ring_init_cond_exec +ffffffff81f0a450 t sdma_v5_2_ring_patch_cond_exec +ffffffff81f0a510 t sdma_v5_2_ring_begin_use +ffffffff81f0a530 t sdma_v5_2_ring_end_use +ffffffff81f0a550 t sdma_v5_2_ring_emit_wreg +ffffffff81f0a6a0 t sdma_v5_2_ring_emit_reg_wait +ffffffff81f0a920 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81f0a9a0 t sdma_v5_2_ring_preempt_ib +ffffffff81f0ab10 t sdma_v5_2_ring_emit_mem_sync +ffffffff81f0ad20 t sdma_v5_2_emit_copy_buffer +ffffffff81f0ade0 t sdma_v5_2_emit_fill_buffer +ffffffff81f0ae70 t sdma_v5_2_vm_copy_pte +ffffffff81f0af30 t sdma_v5_2_vm_write_pte +ffffffff81f0b000 t sdma_v5_2_vm_set_pte_pde +ffffffff81f0b100 t sdma_v5_2_set_trap_irq_state +ffffffff81f0b1c0 t sdma_v5_2_process_trap_irq +ffffffff81f0b300 t sdma_v5_2_process_illegal_inst_irq +ffffffff81f0b330 t sdma_v5_2_mqd_init +ffffffff81f0b410 t sdma_v5_2_ctx_switch_enable +ffffffff81f0b820 t sdma_v5_2_enable +ffffffff81f0c000 t sdma_v6_0_early_init +ffffffff81f0c120 t sdma_v6_0_sw_init +ffffffff81f0c2e0 t sdma_v6_0_sw_fini +ffffffff81f0c370 t sdma_v6_0_hw_init +ffffffff81f0c380 t sdma_v6_0_hw_fini +ffffffff81f0c450 t sdma_v6_0_suspend +ffffffff81f0c490 t sdma_v6_0_resume +ffffffff81f0c4a0 t sdma_v6_0_is_idle +ffffffff81f0c530 t sdma_v6_0_wait_for_idle +ffffffff81f0c5f0 t sdma_v6_0_check_soft_reset +ffffffff81f0c6b0 t sdma_v6_0_soft_reset +ffffffff81f0cb70 t sdma_v6_0_set_clockgating_state +ffffffff81f0cba0 t sdma_v6_0_set_powergating_state +ffffffff81f0cbd0 t sdma_v6_0_get_clockgating_state +ffffffff81f0cc00 t sdma_v6_0_ring_get_rptr +ffffffff81f0cc60 t sdma_v6_0_ring_get_wptr +ffffffff81f0ccd0 t sdma_v6_0_ring_set_wptr +ffffffff81f0d020 t sdma_v6_0_ring_emit_ib +ffffffff81f0d2e0 t sdma_v6_0_ring_emit_fence +ffffffff81f0d740 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81f0d9c0 t sdma_v6_0_ring_emit_vm_flush +ffffffff81f0dc30 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81f0ded0 t sdma_v6_0_ring_test_ring +ffffffff81f0e290 t sdma_v6_0_ring_test_ib +ffffffff81f0e5c0 t sdma_v6_0_ring_insert_nop +ffffffff81f0e6f0 t sdma_v6_0_ring_pad_ib +ffffffff81f0e820 t sdma_v6_0_ring_init_cond_exec +ffffffff81f0ea50 t sdma_v6_0_ring_patch_cond_exec +ffffffff81f0eb10 t sdma_v6_0_ring_emit_wreg +ffffffff81f0ec60 t sdma_v6_0_ring_emit_reg_wait +ffffffff81f0eee0 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81f0ef60 t sdma_v6_0_ring_preempt_ib +ffffffff81f0f0b0 t sdma_v6_0_ring_emit_mem_sync +ffffffff81f0f2c0 t sdma_v6_0_emit_copy_buffer +ffffffff81f0f380 t sdma_v6_0_emit_fill_buffer +ffffffff81f0f410 t sdma_v6_0_vm_copy_pte +ffffffff81f0f4d0 t sdma_v6_0_vm_write_pte +ffffffff81f0f5a0 t sdma_v6_0_vm_set_pte_pde +ffffffff81f0f6a0 t sdma_v6_0_set_trap_irq_state +ffffffff81f0f730 t sdma_v6_0_process_trap_irq +ffffffff81f0f860 t sdma_v6_0_process_illegal_inst_irq +ffffffff81f0f890 t sdma_v6_0_mqd_init +ffffffff81f0f9b0 t sdma_v6_0_start +ffffffff81f0fc90 t sdma_v6_0_enable +ffffffff81f0fe20 t sdma_v6_0_gfx_resume +ffffffff81f10eb0 t sdma_v6_0_gfx_stop +ffffffff81f12000 T sienna_cichlid_reset_init +ffffffff81f120c0 t sienna_cichlid_async_reset +ffffffff81f12120 t sienna_cichlid_get_reset_handler +ffffffff81f121b0 T sienna_cichlid_reset_fini +ffffffff81f12210 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81f12360 t sienna_cichlid_mode2_perform_reset +ffffffff81f123e0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81f126d0 t sienna_cichlid_mode2_reset +ffffffff81f13000 T smu_v11_0_i2c_control_init +ffffffff81f130d0 T smu_v11_0_i2c_control_fini +ffffffff81f13110 t smu_v11_0_i2c_xfer +ffffffff81f142c0 t smu_v11_0_i2c_func +ffffffff81f142f0 t smu_v11_0_i2c_enable +ffffffff81f14440 t smu_v11_0_i2c_abort +ffffffff81f14550 t lock_bus +ffffffff81f145f0 t trylock_bus +ffffffff81f14640 t unlock_bus +ffffffff81f15000 T smu_v13_0_10_reset_init +ffffffff81f150c0 t smu_v13_0_10_async_reset +ffffffff81f15120 t smu_v13_0_10_get_reset_handler +ffffffff81f151d0 T smu_v13_0_10_reset_fini +ffffffff81f15230 t smu_v13_0_10_mode2_prepare_hwcontext +ffffffff81f15360 t smu_v13_0_10_mode2_perform_reset +ffffffff81f153e0 t smu_v13_0_10_mode2_restore_hwcontext +ffffffff81f15740 t smu_v13_0_10_mode2_reset +ffffffff81f16000 t smuio_v11_0_get_rom_index_offset +ffffffff81f16040 t smuio_v11_0_get_rom_data_offset +ffffffff81f16080 t smuio_v11_0_update_rom_clock_gating +ffffffff81f161d0 t smuio_v11_0_get_clock_gating_state +ffffffff81f17000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81f17040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81f17080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81f171d0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81f18000 t smuio_v13_0_get_rom_index_offset +ffffffff81f18040 t smuio_v13_0_get_rom_data_offset +ffffffff81f18080 t smuio_v13_0_update_rom_clock_gating +ffffffff81f181d0 t smuio_v13_0_get_clock_gating_state +ffffffff81f18270 t smuio_v13_0_get_die_id +ffffffff81f182f0 t smuio_v13_0_get_socket_id +ffffffff81f18380 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81f19000 t smuio_v13_0_3_get_die_id +ffffffff81f19080 t smuio_v13_0_3_get_socket_id +ffffffff81f19110 t smuio_v13_0_3_get_pkg_type +ffffffff81f1a000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81f1a040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81f1b000 t smuio_v9_0_get_rom_index_offset +ffffffff81f1b040 t smuio_v9_0_get_rom_data_offset +ffffffff81f1b080 t smuio_v9_0_update_rom_clock_gating +ffffffff81f1b1c0 t smuio_v9_0_get_clock_gating_state +ffffffff81f1c000 T soc15_grbm_select +ffffffff81f1c090 T soc15_program_register_sequence +ffffffff81f1c290 T soc15_set_virt_ops +ffffffff81f1c300 t soc15_common_early_init +ffffffff81f1c6e0 t soc15_common_late_init +ffffffff81f1c740 t soc15_common_sw_init +ffffffff81f1c7a0 t soc15_common_sw_fini +ffffffff81f1c7f0 t soc15_common_hw_init +ffffffff81f1c910 t soc15_common_hw_fini +ffffffff81f1c9e0 t soc15_common_suspend +ffffffff81f1ca20 t soc15_common_resume +ffffffff81f1ca60 t soc15_common_is_idle +ffffffff81f1ca90 t soc15_common_wait_for_idle +ffffffff81f1cac0 t soc15_common_soft_reset +ffffffff81f1caf0 t soc15_common_set_clockgating_state +ffffffff81f1ce30 t soc15_common_set_powergating_state +ffffffff81f1ce60 t soc15_common_get_clockgating_state +ffffffff81f1cf40 t soc15_uvd_ctx_rreg +ffffffff81f1cfe0 t soc15_uvd_ctx_wreg +ffffffff81f1d070 t soc15_didt_rreg +ffffffff81f1d110 t soc15_didt_wreg +ffffffff81f1d190 t soc15_gc_cac_rreg +ffffffff81f1d2b0 t soc15_gc_cac_wreg +ffffffff81f1d3c0 t soc15_se_cac_rreg +ffffffff81f1d4e0 t soc15_se_cac_wreg +ffffffff81f1d5f0 t soc15_read_disabled_bios +ffffffff81f1d620 t soc15_read_register +ffffffff81f1d720 t soc15_asic_reset +ffffffff81f1d820 t soc15_asic_reset_method +ffffffff81f1d9d0 t soc15_get_xclk +ffffffff81f1da30 t soc15_set_uvd_clocks +ffffffff81f1da60 t soc15_set_vce_clocks +ffffffff81f1da90 t soc15_get_config_memsize +ffffffff81f1dab0 t soc15_need_full_reset +ffffffff81f1dae0 t soc15_get_pcie_usage +ffffffff81f1dc10 t soc15_need_reset_on_init +ffffffff81f1dcc0 t soc15_get_pcie_replay_count +ffffffff81f1dd30 t soc15_supports_baco +ffffffff81f1dd90 t soc15_pre_asic_init +ffffffff81f1dda0 t soc15_query_video_codecs +ffffffff81f1de90 t vega20_get_pcie_usage +ffffffff81f1e000 T soc21_grbm_select +ffffffff81f1e090 t soc21_common_early_init +ffffffff81f1e200 t soc21_common_late_init +ffffffff81f1e2e0 t soc21_common_sw_init +ffffffff81f1e320 t soc21_common_sw_fini +ffffffff81f1e350 t soc21_common_hw_init +ffffffff81f1e410 t soc21_common_hw_fini +ffffffff81f1e4b0 t soc21_common_suspend +ffffffff81f1e550 t soc21_common_resume +ffffffff81f1e610 t soc21_common_is_idle +ffffffff81f1e640 t soc21_common_wait_for_idle +ffffffff81f1e670 t soc21_common_soft_reset +ffffffff81f1e6a0 t soc21_common_set_clockgating_state +ffffffff81f1e750 t soc21_common_set_powergating_state +ffffffff81f1e7b0 t soc21_common_get_clockgating_state +ffffffff81f1e800 t soc21_didt_rreg +ffffffff81f1e8a0 t soc21_didt_wreg +ffffffff81f1e920 t soc21_read_disabled_bios +ffffffff81f1e950 t soc21_read_register +ffffffff81f1ea40 t soc21_asic_reset +ffffffff81f1eb20 t soc21_asic_reset_method +ffffffff81f1ebe0 t soc21_get_xclk +ffffffff81f1ec10 t soc21_set_uvd_clocks +ffffffff81f1ec40 t soc21_set_vce_clocks +ffffffff81f1ec70 t soc21_get_config_memsize +ffffffff81f1ec90 t soc21_need_full_reset +ffffffff81f1ecf0 t soc21_init_doorbell_index +ffffffff81f1ee10 t soc21_need_reset_on_init +ffffffff81f1eeb0 t soc21_pre_asic_init +ffffffff81f1eee0 t soc21_update_umd_stable_pstate +ffffffff81f1ef60 t soc21_query_video_codecs +ffffffff81f20000 t tonga_ih_early_init +ffffffff81f20050 t tonga_ih_sw_init +ffffffff81f200d0 t tonga_ih_sw_fini +ffffffff81f20110 t tonga_ih_hw_init +ffffffff81f202f0 t tonga_ih_hw_fini +ffffffff81f20390 t tonga_ih_suspend +ffffffff81f20430 t tonga_ih_resume +ffffffff81f20470 t tonga_ih_is_idle +ffffffff81f204c0 t tonga_ih_wait_for_idle +ffffffff81f20560 t tonga_ih_check_soft_reset +ffffffff81f205c0 t tonga_ih_pre_soft_reset +ffffffff81f20670 t tonga_ih_soft_reset +ffffffff81f20740 t tonga_ih_post_soft_reset +ffffffff81f20780 t tonga_ih_set_clockgating_state +ffffffff81f207b0 t tonga_ih_set_powergating_state +ffffffff81f207e0 t tonga_ih_get_wptr +ffffffff81f208d0 t tonga_ih_decode_iv +ffffffff81f20950 t tonga_ih_set_rptr +ffffffff81f21000 t umc_v6_0_init_registers +ffffffff81f22000 t umc_v6_1_query_ras_error_count +ffffffff81f224e0 t umc_v6_1_query_ras_error_address +ffffffff81f227c0 t umc_v6_1_err_cnt_init +ffffffff81f23000 T umc_v6_7_convert_error_address +ffffffff81f23320 t umc_v6_7_query_ras_error_count +ffffffff81f23360 t umc_v6_7_query_ras_error_address +ffffffff81f23380 t umc_v6_7_query_ras_poison_mode +ffffffff81f233e0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81f23400 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81f23420 t umc_v6_7_query_ecc_error_count +ffffffff81f23690 t umc_v6_7_reset_error_count_per_channel +ffffffff81f23790 t umc_v6_7_query_error_address +ffffffff81f238b0 t umc_v6_7_ecc_info_querry_ecc_error_count +ffffffff81f23a80 t umc_v6_7_ecc_info_query_error_address +ffffffff81f24000 t umc_v8_10_query_ras_error_count +ffffffff81f24040 t umc_v8_10_query_ras_error_address +ffffffff81f24060 t umc_v8_10_err_cnt_init +ffffffff81f24080 t umc_v8_10_query_ras_poison_mode +ffffffff81f240b0 t umc_v8_10_ecc_info_query_ras_error_count +ffffffff81f240d0 t umc_v8_10_ecc_info_query_ras_error_address +ffffffff81f240f0 t umc_v8_10_set_eeprom_table_version +ffffffff81f24120 t umc_v8_10_query_ecc_error_count +ffffffff81f241f0 t umc_v8_10_clear_error_count_per_channel +ffffffff81f24260 t umc_v8_10_query_error_address +ffffffff81f24390 t umc_v8_10_convert_error_address +ffffffff81f245b0 t umc_v8_10_err_cnt_init_per_channel +ffffffff81f24660 t umc_v8_10_ecc_info_query_ecc_error_count +ffffffff81f24740 t umc_v8_10_ecc_info_query_error_address +ffffffff81f25000 t umc_v8_7_query_ras_error_count +ffffffff81f25310 t umc_v8_7_query_ras_error_address +ffffffff81f254d0 t umc_v8_7_err_cnt_init +ffffffff81f25630 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81f25750 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81f26000 t uvd_v5_0_early_init +ffffffff81f26050 t uvd_v5_0_sw_init +ffffffff81f26140 t uvd_v5_0_sw_fini +ffffffff81f26190 t uvd_v5_0_hw_init +ffffffff81f26690 t uvd_v5_0_hw_fini +ffffffff81f26710 t uvd_v5_0_suspend +ffffffff81f26810 t uvd_v5_0_resume +ffffffff81f26860 t uvd_v5_0_is_idle +ffffffff81f268b0 t uvd_v5_0_wait_for_idle +ffffffff81f26940 t uvd_v5_0_soft_reset +ffffffff81f269e0 t uvd_v5_0_set_clockgating_state +ffffffff81f26b80 t uvd_v5_0_set_powergating_state +ffffffff81f26bc0 t uvd_v5_0_get_clockgating_state +ffffffff81f26c40 t uvd_v5_0_ring_get_rptr +ffffffff81f26c80 t uvd_v5_0_ring_get_wptr +ffffffff81f26cc0 t uvd_v5_0_ring_set_wptr +ffffffff81f26cf0 t uvd_v5_0_ring_emit_ib +ffffffff81f26f60 t uvd_v5_0_ring_emit_fence +ffffffff81f27510 t uvd_v5_0_ring_test_ring +ffffffff81f276b0 t uvd_v5_0_ring_insert_nop +ffffffff81f27810 t uvd_v5_0_set_interrupt_state +ffffffff81f27840 t uvd_v5_0_process_interrupt +ffffffff81f278a0 t uvd_v5_0_stop +ffffffff81f279b0 t uvd_v5_0_start +ffffffff81f29000 t uvd_v6_0_early_init +ffffffff81f29160 t uvd_v6_0_sw_init +ffffffff81f293c0 t uvd_v6_0_sw_fini +ffffffff81f29480 t uvd_v6_0_hw_init +ffffffff81f29a30 t uvd_v6_0_hw_fini +ffffffff81f29ab0 t uvd_v6_0_suspend +ffffffff81f29bb0 t uvd_v6_0_resume +ffffffff81f29c00 t uvd_v6_0_is_idle +ffffffff81f29c50 t uvd_v6_0_wait_for_idle +ffffffff81f29ce0 t uvd_v6_0_check_soft_reset +ffffffff81f29d60 t uvd_v6_0_pre_soft_reset +ffffffff81f29da0 t uvd_v6_0_soft_reset +ffffffff81f29e70 t uvd_v6_0_post_soft_reset +ffffffff81f29f10 t uvd_v6_0_set_clockgating_state +ffffffff81f2a0a0 t uvd_v6_0_set_powergating_state +ffffffff81f2a110 t uvd_v6_0_get_clockgating_state +ffffffff81f2a1a0 t uvd_v6_0_ring_get_rptr +ffffffff81f2a1e0 t uvd_v6_0_ring_get_wptr +ffffffff81f2a220 t uvd_v6_0_ring_set_wptr +ffffffff81f2a250 t uvd_v6_0_ring_emit_ib +ffffffff81f2a5b0 t uvd_v6_0_ring_emit_fence +ffffffff81f2ab60 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81f2af50 t uvd_v6_0_ring_emit_vm_flush +ffffffff81f2b2b0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81f2b2e0 t uvd_v6_0_ring_test_ring +ffffffff81f2b480 t uvd_v6_0_ring_insert_nop +ffffffff81f2b5e0 t uvd_v6_0_ring_emit_wreg +ffffffff81f2b860 t uvd_v6_0_enc_ring_get_rptr +ffffffff81f2b8c0 t uvd_v6_0_enc_ring_get_wptr +ffffffff81f2b920 t uvd_v6_0_enc_ring_set_wptr +ffffffff81f2b960 t uvd_v6_0_enc_ring_emit_ib +ffffffff81f2bba0 t uvd_v6_0_enc_ring_emit_fence +ffffffff81f2bde0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81f2bf90 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81f2c1a0 t uvd_v6_0_enc_ring_test_ring +ffffffff81f2c2f0 t uvd_v6_0_enc_ring_test_ib +ffffffff81f2c7d0 t uvd_v6_0_enc_ring_insert_end +ffffffff81f2c860 t uvd_v6_0_set_interrupt_state +ffffffff81f2c890 t uvd_v6_0_process_interrupt +ffffffff81f2c990 t uvd_v6_0_stop +ffffffff81f2caa0 t uvd_v6_0_start +ffffffff81f2e000 t uvd_v7_0_early_init +ffffffff81f2e270 t uvd_v7_0_sw_init +ffffffff81f2e690 t uvd_v7_0_sw_fini +ffffffff81f2e780 t uvd_v7_0_hw_init +ffffffff81f31540 t uvd_v7_0_hw_fini +ffffffff81f31850 t uvd_v7_0_suspend +ffffffff81f31900 t uvd_v7_0_resume +ffffffff81f31950 t uvd_v7_0_set_clockgating_state +ffffffff81f31980 t uvd_v7_0_ring_get_rptr +ffffffff81f31a20 t uvd_v7_0_ring_get_wptr +ffffffff81f31ac0 t uvd_v7_0_ring_set_wptr +ffffffff81f31b40 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81f31bb0 t uvd_v7_0_ring_emit_ib +ffffffff81f31f50 t uvd_v7_0_ring_emit_fence +ffffffff81f325a0 t uvd_v7_0_ring_emit_vm_flush +ffffffff81f32610 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81f32640 t uvd_v7_0_ring_test_ring +ffffffff81f328d0 t uvd_v7_0_ring_insert_nop +ffffffff81f32a70 t uvd_v7_0_ring_emit_wreg +ffffffff81f32d40 t uvd_v7_0_ring_emit_reg_wait +ffffffff81f330f0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81f331e0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81f332e0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81f333e0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81f33620 t uvd_v7_0_enc_ring_emit_fence +ffffffff81f33860 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81f338d0 t uvd_v7_0_enc_ring_test_ring +ffffffff81f33a30 t uvd_v7_0_enc_ring_test_ib +ffffffff81f33f10 t uvd_v7_0_enc_ring_insert_end +ffffffff81f33fa0 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81f340f0 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81f342b0 t uvd_v7_0_set_interrupt_state +ffffffff81f342e0 t uvd_v7_0_process_interrupt +ffffffff81f35000 t vce_v3_0_early_init +ffffffff81f35180 t vce_v3_0_sw_init +ffffffff81f352e0 t vce_v3_0_sw_fini +ffffffff81f35330 t vce_v3_0_hw_init +ffffffff81f35400 t vce_v3_0_hw_fini +ffffffff81f354f0 t vce_v3_0_suspend +ffffffff81f355c0 t vce_v3_0_resume +ffffffff81f356a0 t vce_v3_0_is_idle +ffffffff81f35710 t vce_v3_0_wait_for_idle +ffffffff81f357c0 t vce_v3_0_check_soft_reset +ffffffff81f358c0 t vce_v3_0_pre_soft_reset +ffffffff81f35960 t vce_v3_0_soft_reset +ffffffff81f35a30 t vce_v3_0_post_soft_reset +ffffffff81f35ad0 t vce_v3_0_set_clockgating_state +ffffffff81f35dc0 t vce_v3_0_set_powergating_state +ffffffff81f365e0 t vce_v3_0_get_clockgating_state +ffffffff81f366a0 t vce_v3_0_ring_get_rptr +ffffffff81f36770 t vce_v3_0_ring_get_wptr +ffffffff81f36840 t vce_v3_0_ring_set_wptr +ffffffff81f36900 t vce_v3_0_ring_emit_ib +ffffffff81f36b40 t vce_v3_0_emit_pipeline_sync +ffffffff81f36cf0 t vce_v3_0_emit_vm_flush +ffffffff81f36f60 t vce_v3_0_set_interrupt_state +ffffffff81f36fd0 t vce_v3_0_process_interrupt +ffffffff81f37090 t vce_v3_0_stop +ffffffff81f38000 t vce_v4_0_early_init +ffffffff81f380b0 t vce_v4_0_sw_init +ffffffff81f38350 t vce_v4_0_sw_fini +ffffffff81f383d0 t vce_v4_0_hw_init +ffffffff81f38b90 t vce_v4_0_hw_fini +ffffffff81f38cc0 t vce_v4_0_suspend +ffffffff81f38de0 t vce_v4_0_resume +ffffffff81f38e90 t vce_v4_0_set_clockgating_state +ffffffff81f38ec0 t vce_v4_0_set_powergating_state +ffffffff81f38fa0 t vce_v4_0_ring_get_rptr +ffffffff81f39010 t vce_v4_0_ring_get_wptr +ffffffff81f390a0 t vce_v4_0_ring_set_wptr +ffffffff81f39130 t vce_v4_0_ring_emit_ib +ffffffff81f39370 t vce_v4_0_ring_emit_fence +ffffffff81f395b0 t vce_v4_0_emit_vm_flush +ffffffff81f39620 t vce_v4_0_ring_insert_end +ffffffff81f396b0 t vce_v4_0_emit_wreg +ffffffff81f39800 t vce_v4_0_emit_reg_wait +ffffffff81f399c0 t vce_v4_0_set_interrupt_state +ffffffff81f39a50 t vce_v4_0_process_interrupt +ffffffff81f39af0 t vce_v4_0_start +ffffffff81f3b000 T vcn_dec_sw_ring_emit_fence +ffffffff81f3b240 T vcn_dec_sw_ring_insert_end +ffffffff81f3b2d0 T vcn_dec_sw_ring_emit_ib +ffffffff81f3b510 T vcn_dec_sw_ring_emit_reg_wait +ffffffff81f3b6d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81f3b740 T vcn_dec_sw_ring_emit_wreg +ffffffff81f3c000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81f3c140 T vcn_v1_0_ring_end_use +ffffffff81f3c1b0 t vcn_v1_0_early_init +ffffffff81f3c310 t vcn_v1_0_sw_init +ffffffff81f3c5b0 t vcn_v1_0_sw_fini +ffffffff81f3c610 t vcn_v1_0_hw_init +ffffffff81f3c6e0 t vcn_v1_0_hw_fini +ffffffff81f3c7e0 t vcn_v1_0_suspend +ffffffff81f3c850 t vcn_v1_0_resume +ffffffff81f3c930 t vcn_v1_0_is_idle +ffffffff81f3c9c0 t vcn_v1_0_wait_for_idle +ffffffff81f3ca00 t vcn_v1_0_set_clockgating_state +ffffffff81f3cab0 t vcn_v1_0_set_powergating_state +ffffffff81f3d010 t vcn_v1_0_dec_ring_get_rptr +ffffffff81f3d0a0 t vcn_v1_0_dec_ring_get_wptr +ffffffff81f3d130 t vcn_v1_0_dec_ring_set_wptr +ffffffff81f3d240 t vcn_v1_0_ring_patch_cs_in_place +ffffffff81f3d400 t vcn_v1_0_dec_ring_emit_ib +ffffffff81f3d780 t vcn_v1_0_dec_ring_emit_fence +ffffffff81f3dd90 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff81f3de00 t vcn_v1_0_dec_ring_insert_nop +ffffffff81f3df90 t vcn_v1_0_dec_ring_insert_start +ffffffff81f3e160 t vcn_v1_0_dec_ring_insert_end +ffffffff81f3e270 t vcn_v1_0_ring_begin_use +ffffffff81f3e310 t vcn_v1_0_dec_ring_emit_wreg +ffffffff81f3e5c0 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff81f3e940 t vcn_v1_0_enc_ring_get_rptr +ffffffff81f3ea20 t vcn_v1_0_enc_ring_get_wptr +ffffffff81f3eb00 t vcn_v1_0_enc_ring_set_wptr +ffffffff81f3ebc0 t vcn_v1_0_enc_ring_emit_ib +ffffffff81f3ee00 t vcn_v1_0_enc_ring_emit_fence +ffffffff81f3f040 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81f3f0b0 t vcn_v1_0_enc_ring_insert_end +ffffffff81f3f140 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81f3f290 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81f3f450 t vcn_v1_0_set_interrupt_state +ffffffff81f3f480 t vcn_v1_0_process_interrupt +ffffffff81f3f530 t vcn_v1_0_idle_work_handler +ffffffff81f3f6a0 t vcn_v1_0_pause_dpg_mode +ffffffff81f40540 t vcn_v1_0_enable_clock_gating +ffffffff81f40970 t vcn_v1_0_disable_clock_gating +ffffffff81f40f30 t vcn_1_0_enable_static_power_gating +ffffffff81f410e0 t vcn_v1_0_start_dpg_mode +ffffffff81f44ea0 t vcn_v1_0_start_spg_mode +ffffffff81f470a0 t vcn_v1_0_clock_gating_dpg_mode +ffffffff81f48000 T vcn_v2_0_dec_ring_insert_start +ffffffff81f481c0 T vcn_v2_0_dec_ring_insert_end +ffffffff81f482c0 T vcn_v2_0_dec_ring_insert_nop +ffffffff81f48430 T vcn_v2_0_dec_ring_emit_fence +ffffffff81f489f0 T vcn_v2_0_dec_ring_emit_ib +ffffffff81f48d50 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff81f490a0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff81f49110 T vcn_v2_0_dec_ring_emit_wreg +ffffffff81f49390 T vcn_v2_0_enc_ring_emit_fence +ffffffff81f495d0 T vcn_v2_0_enc_ring_insert_end +ffffffff81f49660 T vcn_v2_0_enc_ring_emit_ib +ffffffff81f498a0 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff81f49a60 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff81f49ad0 T vcn_v2_0_enc_ring_emit_wreg +ffffffff81f49c20 T vcn_v2_0_dec_ring_test_ring +ffffffff81f49ec0 t vcn_v2_0_early_init +ffffffff81f4a020 t vcn_v2_0_sw_init +ffffffff81f4a350 t vcn_v2_0_sw_fini +ffffffff81f4a3d0 t vcn_v2_0_hw_init +ffffffff81f4ad50 t vcn_v2_0_hw_fini +ffffffff81f4ae50 t vcn_v2_0_suspend +ffffffff81f4ae80 t vcn_v2_0_resume +ffffffff81f4aed0 t vcn_v2_0_is_idle +ffffffff81f4af60 t vcn_v2_0_wait_for_idle +ffffffff81f4afa0 t vcn_v2_0_set_clockgating_state +ffffffff81f4b030 t vcn_v2_0_set_powergating_state +ffffffff81f4b5f0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81f4b680 t vcn_v2_0_dec_ring_get_wptr +ffffffff81f4b720 t vcn_v2_0_dec_ring_set_wptr +ffffffff81f4b860 t vcn_v2_0_enc_ring_get_rptr +ffffffff81f4b940 t vcn_v2_0_enc_ring_get_wptr +ffffffff81f4ba30 t vcn_v2_0_enc_ring_set_wptr +ffffffff81f4bb20 t vcn_v2_0_set_interrupt_state +ffffffff81f4bb50 t vcn_v2_0_process_interrupt +ffffffff81f4bc00 t vcn_v2_0_pause_dpg_mode +ffffffff81f4c3f0 t vcn_v2_0_enable_clock_gating +ffffffff81f4c680 t vcn_v2_0_disable_clock_gating +ffffffff81f4caa0 t vcn_v2_0_start +ffffffff81f51050 t vcn_v2_0_enable_static_power_gating +ffffffff81f511b0 t vcn_v2_0_clock_gating_dpg_mode +ffffffff81f51f30 t vcn_v2_0_mc_resume_dpg_mode +ffffffff81f57000 t vcn_v2_6_query_poison_status +ffffffff81f570e0 t vcn_v2_5_early_init +ffffffff81f573b0 t vcn_v2_5_sw_init +ffffffff81f57880 t vcn_v2_5_sw_fini +ffffffff81f57950 t vcn_v2_5_hw_init +ffffffff81f58390 t vcn_v2_5_hw_fini +ffffffff81f58500 t vcn_v2_5_suspend +ffffffff81f58530 t vcn_v2_5_resume +ffffffff81f58580 t vcn_v2_5_is_idle +ffffffff81f58670 t vcn_v2_5_wait_for_idle +ffffffff81f58710 t vcn_v2_5_set_clockgating_state +ffffffff81f58790 t vcn_v2_5_set_powergating_state +ffffffff81f5a9e0 t vcn_v2_5_dec_ring_get_rptr +ffffffff81f5aa80 t vcn_v2_5_dec_ring_get_wptr +ffffffff81f5ab30 t vcn_v2_5_dec_ring_set_wptr +ffffffff81f5abe0 t vcn_v2_5_enc_ring_get_rptr +ffffffff81f5acd0 t vcn_v2_5_enc_ring_get_wptr +ffffffff81f5ade0 t vcn_v2_5_enc_ring_set_wptr +ffffffff81f5aef0 t vcn_v2_5_set_interrupt_state +ffffffff81f5af20 t vcn_v2_5_process_interrupt +ffffffff81f5b010 t vcn_v2_6_set_ras_interrupt_state +ffffffff81f5b040 t vcn_v2_5_pause_dpg_mode +ffffffff81f5b7c0 t vcn_v2_5_enable_clock_gating +ffffffff81f5bad0 t vcn_v2_5_disable_clock_gating +ffffffff81f5bfc0 t vcn_v2_5_start_dpg_mode +ffffffff81f5f990 t vcn_v2_5_clock_gating_dpg_mode +ffffffff81f60740 t vcn_v2_5_mc_resume_dpg_mode +ffffffff81f65000 t vcn_v3_0_early_init +ffffffff81f65220 t vcn_v3_0_sw_init +ffffffff81f656e0 t vcn_v3_0_sw_fini +ffffffff81f657c0 t vcn_v3_0_hw_init +ffffffff81f66310 t vcn_v3_0_hw_fini +ffffffff81f66410 t vcn_v3_0_suspend +ffffffff81f66440 t vcn_v3_0_resume +ffffffff81f66490 t vcn_v3_0_is_idle +ffffffff81f66580 t vcn_v3_0_wait_for_idle +ffffffff81f66620 t vcn_v3_0_set_clockgating_state +ffffffff81f66730 t vcn_v3_0_set_powergating_state +ffffffff81f68cc0 t vcn_v3_0_dec_ring_get_rptr +ffffffff81f68d60 t vcn_v3_0_dec_ring_get_wptr +ffffffff81f68e10 t vcn_v3_0_dec_ring_set_wptr +ffffffff81f68f80 t vcn_v3_0_ring_patch_cs_in_place +ffffffff81f692a0 t vcn_v3_0_enc_ring_get_rptr +ffffffff81f69390 t vcn_v3_0_enc_ring_get_wptr +ffffffff81f694a0 t vcn_v3_0_enc_ring_set_wptr +ffffffff81f695b0 t vcn_v3_0_set_interrupt_state +ffffffff81f695e0 t vcn_v3_0_process_interrupt +ffffffff81f696d0 t vcn_v3_0_pause_dpg_mode +ffffffff81f69f00 t vcn_v3_0_enable_clock_gating +ffffffff81f6a190 t vcn_v3_0_disable_clock_gating +ffffffff81f6a6c0 t vcn_v3_0_start_dpg_mode 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dm_crtc_reset_state +ffffffff81fa8830 t amdgpu_dm_crtc_destroy +ffffffff81fa8860 t dm_crtc_duplicate_state +ffffffff81fa8a10 t dm_crtc_destroy_state +ffffffff81fa8a50 t dm_crtc_helper_mode_fixup +ffffffff81fa8a80 t dm_crtc_helper_disable +ffffffff81fa8ab0 t dm_crtc_helper_atomic_check +ffffffff81fa9000 T hdcp_update_display +ffffffff81fa9280 t process_output +ffffffff81fa93d0 T hdcp_reset_display +ffffffff81fa9530 T hdcp_handle_cpirq +ffffffff81fa9560 T hdcp_destroy +ffffffff81fa9650 T hdcp_create_workqueue +ffffffff81fa9a30 t event_cpirq +ffffffff81fa9a80 t event_property_update +ffffffff81fa9cb0 t event_callback +ffffffff81fa9d30 t event_watchdog_timer +ffffffff81fa9dc0 t event_property_validate +ffffffff81fa9f30 t lp_write_i2c +ffffffff81fa9fb0 t lp_read_i2c +ffffffff81faa050 t lp_write_dpcd +ffffffff81faa080 t lp_read_dpcd +ffffffff81faa0b0 t update_config +ffffffff81faa420 t enable_assr +ffffffff81faa540 t __delayed_work_tick +ffffffff81fab000 T dm_helpers_parse_edid_caps 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+ffffffff81fae6e0 T amdgpu_dm_irq_resume_early +ffffffff81fae8a0 T amdgpu_dm_irq_resume_late +ffffffff81faea60 T amdgpu_dm_set_irq_funcs +ffffffff81faeb20 T amdgpu_dm_outbox_init +ffffffff81faeb50 T amdgpu_dm_hpd_init +ffffffff81faec00 T amdgpu_dm_hpd_fini +ffffffff81faecb0 t amdgpu_dm_set_crtc_irq_state +ffffffff81faed30 t amdgpu_dm_irq_handler +ffffffff81faef30 t amdgpu_dm_set_vline0_irq_state +ffffffff81faefb0 t amdgpu_dm_set_dmub_outbox_irq_state +ffffffff81faf000 t amdgpu_dm_set_vupdate_irq_state +ffffffff81faf080 t amdgpu_dm_set_dmub_trace_irq_state +ffffffff81faf0d0 t amdgpu_dm_set_pflip_irq_state +ffffffff81faf150 t amdgpu_dm_set_hpd_irq_state +ffffffff81fb0000 T needs_dsc_aux_workaround +ffffffff81fb0050 T dm_dp_create_fake_mst_encoders +ffffffff81fb0100 T dm_handle_mst_sideband_msg_ready_event +ffffffff81fb0340 T amdgpu_dm_initialize_dp_connector +ffffffff81fb0440 t kasprintf +ffffffff81fb0510 t dm_dp_aux_transfer +ffffffff81fb0650 T dm_mst_get_pbn_divider +ffffffff81fb06b0 T compute_mst_dsc_configs_for_state +ffffffff81fb0950 t is_dsc_need_re_compute +ffffffff81fb0b20 t compute_mst_dsc_configs_for_link +ffffffff81fb1150 T pre_validate_dsc +ffffffff81fb1700 T dm_dp_mst_is_port_support_mode +ffffffff81fb1960 t amdgpu_dm_encoder_destroy +ffffffff81fb1970 t dm_dp_add_mst_connector +ffffffff81fb1b30 t dm_handle_mst_down_rep_msg_ready +ffffffff81fb1b50 t amdgpu_dm_mst_connector_late_register +ffffffff81fb1ba0 t amdgpu_dm_mst_connector_early_unregister +ffffffff81fb1c70 t dm_dp_mst_connector_destroy +ffffffff81fb1cf0 t dm_dp_mst_get_modes +ffffffff81fb21e0 t dm_dp_mst_detect +ffffffff81fb23a0 t dm_mst_atomic_best_encoder +ffffffff81fb2400 t dm_dp_mst_atomic_check +ffffffff81fb2430 t set_dsc_configs_from_fairness_vars +ffffffff81fb2700 t increase_dsc_bpp +ffffffff81fb2c50 t try_disable_dsc +ffffffff81fb3000 T amdgpu_dm_plane_get_format_info +ffffffff81fb3020 T amdgpu_dm_plane_fill_blending_from_plane_state +ffffffff81fb3120 T amdgpu_dm_plane_fill_plane_buffer_attributes +ffffffff81fb36a0 T amdgpu_dm_plane_helper_check_state +ffffffff81fb38c0 T amdgpu_dm_plane_fill_dc_scaling_info +ffffffff81fb3b20 T amdgpu_dm_plane_handle_cursor_update +ffffffff81fb3db0 T amdgpu_dm_plane_init +ffffffff81fb4bb0 T is_video_format +ffffffff81fb4c00 t dm_drm_plane_reset +ffffffff81fb4c90 t dm_drm_plane_duplicate_state +ffffffff81fb4d20 t dm_drm_plane_destroy_state +ffffffff81fb4d60 t dm_plane_format_mod_supported +ffffffff81fb4e90 t dm_plane_helper_prepare_fb +ffffffff81fb5140 t dm_plane_helper_cleanup_fb +ffffffff81fb51e0 t dm_plane_atomic_check +ffffffff81fb52b0 t dm_plane_atomic_async_check +ffffffff81fb52f0 t dm_plane_atomic_async_update +ffffffff81fb53a0 t amdgpu_bo_reserve +ffffffff81fb55a0 t amdgpu_bo_unreserve +ffffffff81fb6000 T dm_pp_apply_display_requirements +ffffffff81fb61d0 T dm_pp_get_clock_levels_by_type +ffffffff81fb6510 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff81fb66d0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff81fb6880 T dm_pp_notify_wm_clock_changes +ffffffff81fb68d0 T dm_pp_apply_power_level_change_request +ffffffff81fb6900 T dm_pp_apply_clock_for_voltage_request +ffffffff81fb69a0 T dm_pp_get_static_clocks +ffffffff81fb6a60 T dm_pp_get_funcs +ffffffff81fb6b70 t pp_rv_set_wm_ranges +ffffffff81fb6cf0 t pp_rv_set_pme_wa_enable +ffffffff81fb6d10 t pp_rv_set_active_display_count +ffffffff81fb6d30 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff81fb6d50 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff81fb6d70 t pp_rv_set_hard_min_fclk_by_freq +ffffffff81fb6d90 t pp_nv_set_display_count +ffffffff81fb6df0 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff81fb6e60 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff81fb6ec0 t pp_nv_set_voltage_by_freq +ffffffff81fb6f50 t pp_nv_set_wm_ranges +ffffffff81fb6fa0 t pp_nv_set_hard_min_uclk_by_freq +ffffffff81fb7010 t pp_nv_get_maximum_sustainable_clocks +ffffffff81fb7070 t pp_nv_get_uclk_dpm_states +ffffffff81fb70d0 t pp_nv_set_pstate_handshake_support +ffffffff81fb7120 t pp_rn_set_wm_ranges +ffffffff81fb7170 t pp_rn_get_dpm_clock_table +ffffffff81fb8000 T amdgpu_dm_set_psr_caps +ffffffff81fb8150 T amdgpu_dm_link_setup_psr +ffffffff81fb82e0 T amdgpu_dm_psr_enable +ffffffff81fb83e0 T amdgpu_dm_psr_disable +ffffffff81fb8460 T amdgpu_dm_psr_disable_all +ffffffff81fb9000 T amdgpu_dm_setup_replay +ffffffff81fb90f0 T amdgpu_dm_replay_enable +ffffffff81fb9270 T amdgpu_dm_replay_disable +ffffffff81fba000 T dm_get_elapse_time_in_ns +ffffffff81fba030 T dm_perf_trace_timestamp +ffffffff81fbb000 T dc_assert_fp_enabled +ffffffff81fbb070 T dc_fpu_begin +ffffffff81fbb0c0 T dc_fpu_end +ffffffff81fbc000 T dal_vector_construct +ffffffff81fbc0d0 T dal_vector_presized_create +ffffffff81fbc340 T dal_vector_create +ffffffff81fbc460 T dal_vector_destruct +ffffffff81fbc4b0 T dal_vector_destroy +ffffffff81fbc530 T dal_vector_get_count +ffffffff81fbc560 T dal_vector_at_index +ffffffff81fbc5a0 T dal_vector_remove_at_index +ffffffff81fbc630 T dal_vector_set_at_index +ffffffff81fbc690 T dal_vector_insert_at +ffffffff81fbc790 T dal_vector_reserve +ffffffff81fbc840 T dal_vector_append +ffffffff81fbc940 T dal_vector_clone +ffffffff81fbc9f0 T dal_vector_capacity +ffffffff81fbca20 T dal_vector_clear +ffffffff81fbd000 T fixed_point_to_int_frac +ffffffff81fbd1f0 T convert_float_matrix +ffffffff81fbd2b0 T reduce_fraction +ffffffff81fbe000 T is_rgb_cspace +ffffffff81fbe080 T is_lower_pipe_tree_visible +ffffffff81fbe0e0 T is_upper_pipe_tree_visible +ffffffff81fbe140 T is_pipe_tree_visible +ffffffff81fbe1c0 T build_prescale_params +ffffffff81fbf000 T dc_fixpt_from_fraction +ffffffff81fbf1c0 T dc_fixpt_mul +ffffffff81fbf360 T dc_fixpt_sqr +ffffffff81fbf4d0 T dc_fixpt_recip +ffffffff81fbf540 T dc_fixpt_sinc +ffffffff81fbf730 T dc_fixpt_sin +ffffffff81fbf760 T dc_fixpt_cos +ffffffff81fbf850 T dc_fixpt_exp +ffffffff81fbfb30 t fixed31_32_exp_from_taylor_series +ffffffff81fbff10 T dc_fixpt_log +ffffffff81fc0120 T dc_fixpt_u4d19 +ffffffff81fc0160 T dc_fixpt_u3d19 +ffffffff81fc01a0 T dc_fixpt_u2d19 +ffffffff81fc01e0 T dc_fixpt_u0d19 +ffffffff81fc0210 T dc_fixpt_clamp_u0d14 +ffffffff81fc0260 T dc_fixpt_clamp_u0d10 +ffffffff81fc02b0 T dc_fixpt_s4d19 +ffffffff81fc1000 T bios_parser_create +ffffffff81fc2270 t bios_parser_get_connectors_number +ffffffff81fc22d0 t bios_parser_get_connector_id +ffffffff81fc2360 t bios_parser_get_src_obj +ffffffff81fc2460 t bios_parser_get_i2c_info +ffffffff81fc2680 t bios_parser_get_hpd_info +ffffffff81fc2760 t bios_parser_get_device_tag +ffffffff81fc2960 t bios_parser_get_spread_spectrum_info +ffffffff81fc2b60 t bios_parser_get_ss_entry_number +ffffffff81fc2da0 t bios_parser_get_embedded_panel_info +ffffffff81fc3310 t bios_parser_get_gpio_pin_info +ffffffff81fc3420 t bios_parser_get_encoder_cap_info +ffffffff81fc3520 t bios_parser_set_scratch_critical_state +ffffffff81fc3530 t bios_parser_is_device_id_supported +ffffffff81fc35f0 t bios_parser_encoder_control +ffffffff81fc3630 t bios_parser_transmitter_control +ffffffff81fc3670 t bios_parser_enable_crtc +ffffffff81fc36c0 t bios_parser_adjust_pixel_clock +ffffffff81fc3700 t bios_parser_set_pixel_clock +ffffffff81fc3740 t bios_parser_set_dce_clock +ffffffff81fc3780 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff81fc37d0 t bios_parser_program_crtc_timing +ffffffff81fc3810 t bios_parser_program_display_engine_pll +ffffffff81fc3850 t bios_parser_enable_disp_power_gating +ffffffff81fc3890 t bios_parser_destroy +ffffffff81fc3950 t bios_get_board_layout_info +ffffffff81fc3bd0 t get_bios_object +ffffffff81fc3da0 t get_ss_info_from_ss_info_table +ffffffff81fc3f70 t get_ss_info_v3_1 +ffffffff81fc40e0 t get_ss_entry_number_from_ss_info_tbl +ffffffff81fc5000 T firmware_parser_create +ffffffff81fc6e50 t bios_parser_get_connectors_number +ffffffff81fc6fc0 t bios_parser_get_connector_id +ffffffff81fc7020 t bios_parser_get_src_obj +ffffffff81fc72c0 t bios_parser_get_i2c_info +ffffffff81fc7560 t bios_parser_get_hpd_info +ffffffff81fc76d0 t bios_parser_get_device_tag +ffffffff81fc79a0 t bios_parser_get_spread_spectrum_info +ffffffff81fc7d70 t bios_parser_get_ss_entry_number +ffffffff81fc7da0 t bios_parser_get_embedded_panel_info +ffffffff81fc7fa0 t bios_parser_get_gpio_pin_info +ffffffff81fc80c0 t bios_parser_get_encoder_cap_info +ffffffff81fc8230 t bios_parser_is_accelerated_mode +ffffffff81fc8240 t bios_parser_set_scratch_critical_state +ffffffff81fc8250 t bios_parser_is_device_id_supported +ffffffff81fc82c0 t bios_parser_encoder_control +ffffffff81fc8300 t bios_parser_transmitter_control +ffffffff81fc8340 t bios_parser_enable_crtc +ffffffff81fc8390 t bios_parser_set_pixel_clock +ffffffff81fc83d0 t bios_parser_set_dce_clock +ffffffff81fc8410 t bios_parser_program_crtc_timing +ffffffff81fc8450 t bios_parser_enable_disp_power_gating +ffffffff81fc8490 t firmware_parser_destroy +ffffffff81fc8550 t bios_get_board_layout_info +ffffffff81fc89f0 t bios_parser_pack_data_tables +ffffffff81fc8a20 t bios_get_atom_dc_golden_table +ffffffff81fc8b60 t bios_parser_enable_lvtma_control +ffffffff81fc8bb0 t bios_parser_get_soc_bb_info +ffffffff81fc8cc0 t bios_parser_get_disp_connector_caps_info +ffffffff81fc8e20 t bios_parser_get_lttpr_caps +ffffffff81fc8f70 t bios_parser_get_lttpr_interop +ffffffff81fc90b0 t bios_parser_get_connector_speed_cap_info +ffffffff81fc9200 t get_bios_object +ffffffff81fc9360 t get_bios_object_from_path_v3 +ffffffff81fca000 T object_id_from_bios_object_id +ffffffff81fcb000 T bios_get_image +ffffffff81fcb050 T bios_is_accelerated_mode +ffffffff81fcb0b0 T bios_set_scratch_acc_mode_change +ffffffff81fcb0f0 T bios_set_scratch_critical_state +ffffffff81fcb130 T bios_get_vga_enabled_displays +ffffffff81fcc000 T dal_bios_parser_create +ffffffff81fcc070 T dal_bios_parser_destroy +ffffffff81fcd000 T dal_bios_parser_init_cmd_tbl +ffffffff81fcd810 t encoder_control_digx_v3 +ffffffff81fcd910 t encoder_control_digx_v4 +ffffffff81fcda10 t encoder_control_digx_v5 +ffffffff81fcdb60 t encoder_control_dig1_v1 +ffffffff81fcdbe0 t encoder_control_dig2_v1 +ffffffff81fcdc60 t encoder_control_dig_v1 +ffffffff81fcdcc0 t transmitter_control_v2 +ffffffff81fcde60 t transmitter_control_v3 +ffffffff81fce010 t transmitter_control_v4 +ffffffff81fce1c0 t transmitter_control_v1_5 +ffffffff81fce330 t transmitter_control_v1_6 +ffffffff81fce490 t set_pixel_clock_v3 +ffffffff81fce600 t set_pixel_clock_v5 +ffffffff81fce7a0 t set_pixel_clock_v6 +ffffffff81fce940 t set_pixel_clock_v7 +ffffffff81fceb10 t enable_spread_spectrum_on_ppll_v1 +ffffffff81fcec30 t enable_spread_spectrum_on_ppll_v2 +ffffffff81fced60 t enable_spread_spectrum_on_ppll_v3 +ffffffff81fcee70 t adjust_display_pll_v2 +ffffffff81fcefc0 t adjust_display_pll_v3 +ffffffff81fcf130 t dac1_encoder_control_v1 +ffffffff81fcf1b0 t dac2_encoder_control_v1 +ffffffff81fcf230 t dac1_output_control_v1 +ffffffff81fcf290 t dac2_output_control_v1 +ffffffff81fcf2f0 t set_crtc_using_dtd_timing_v3 +ffffffff81fcf440 t set_crtc_timing_v1 +ffffffff81fcf5c0 t enable_crtc_v1 +ffffffff81fcf660 t enable_crtc_mem_req_v1 +ffffffff81fcf700 t program_clock_v5 +ffffffff81fcf810 t program_clock_v6 +ffffffff81fcf930 t external_encoder_control_v3 +ffffffff81fcfae0 t enable_disp_power_gating_v2_1 +ffffffff81fcfbb0 t set_dce_clock_v2_1 +ffffffff81fd0000 T dal_firmware_parser_init_cmd_tbl +ffffffff81fd03d0 t encoder_control_digx_v1_5 +ffffffff81fd05a0 t encoder_control_fallback +ffffffff81fd0600 t transmitter_control_v1_6 +ffffffff81fd07a0 t transmitter_control_v1_7 +ffffffff81fd0990 t transmitter_control_fallback +ffffffff81fd09f0 t set_pixel_clock_v7 +ffffffff81fd0c40 t set_pixel_clock_fallback +ffffffff81fd0ca0 t set_crtc_using_dtd_timing_v3 +ffffffff81fd0df0 t enable_crtc_v1 +ffffffff81fd0e90 t external_encoder_control_v3 +ffffffff81fd0ec0 t enable_disp_power_gating_v2_1 +ffffffff81fd1010 t enable_disp_power_gating_fallback +ffffffff81fd1070 t set_dce_clock_v2_1 +ffffffff81fd11a0 t get_smu_clock_info_v3_1 +ffffffff81fd1210 t enable_lvtma_control +ffffffff81fd2000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81fd20a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81fd21c0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81fd2240 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81fd22d0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81fd2390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81fd2470 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff81fd3000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff81fd30b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff81fd31c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81fd3240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81fd32d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81fd33b0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81fd4000 T dal_cmd_tbl_helper_dce110_get_table ffffffff81fd4030 t encoder_action_to_atom ffffffff81fd40b0 t engine_bp_to_atom ffffffff81fd4100 t clock_source_id_to_atom -ffffffff81fd41d0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81fd4220 t signal_type_to_atom_dig_mode -ffffffff81fd4280 t hpd_sel_to_atom -ffffffff81fd42c0 t dig_encoder_sel_to_atom -ffffffff81fd42f0 t phy_id_to_atom -ffffffff81fd4330 t disp_power_gating_action_to_atom -ffffffff81fd43a0 t dc_clock_type_to_atom -ffffffff81fd4420 t transmitter_color_depth_to_atom -ffffffff81fd5000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff81fd41a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81fd41f0 t signal_type_to_atom_dig_mode +ffffffff81fd4250 t hpd_sel_to_atom +ffffffff81fd4290 t dig_encoder_sel_to_atom +ffffffff81fd42c0 t phy_id_to_atom +ffffffff81fd4300 t disp_power_gating_action_to_atom +ffffffff81fd5000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff81fd5030 t encoder_action_to_atom ffffffff81fd50b0 t engine_bp_to_atom ffffffff81fd5100 t clock_source_id_to_atom @@ -31064,7 +31056,7 @@ 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dal_hw_factory_dce80_init -ffffffff82279060 t define_hpd_registers -ffffffff822790b0 t define_ddc_registers -ffffffff8227a000 T dal_hw_translate_dce80_init -ffffffff8227a030 t offset_to_id -ffffffff8227a7b0 t id_to_offset -ffffffff8227b000 T dal_hw_factory_dcn10_init -ffffffff8227b060 t define_hpd_registers -ffffffff8227b0b0 t define_ddc_registers -ffffffff8227b150 t define_generic_registers -ffffffff8227c000 T dal_hw_translate_dcn10_init -ffffffff8227c030 t offset_to_id -ffffffff8227c390 t id_to_offset -ffffffff8227d000 T dal_hw_factory_dcn20_init -ffffffff8227d060 t define_hpd_registers -ffffffff8227d0b0 t define_ddc_registers -ffffffff8227d160 t define_generic_registers -ffffffff8227e000 T dal_hw_translate_dcn20_init -ffffffff8227e030 t offset_to_id -ffffffff8227e2b0 t id_to_offset -ffffffff8227f000 T dal_hw_factory_dcn21_init -ffffffff8227f060 t define_hpd_registers -ffffffff8227f0b0 t define_ddc_registers -ffffffff8227f160 t define_generic_registers -ffffffff82280000 T dal_hw_translate_dcn21_init -ffffffff82280030 t offset_to_id -ffffffff822802b0 t id_to_offset -ffffffff82281000 T dal_hw_factory_dcn30_init -ffffffff82281060 t define_hpd_registers -ffffffff822810b0 t define_ddc_registers -ffffffff82281160 t define_generic_registers -ffffffff82282000 T dal_hw_translate_dcn30_init -ffffffff82282030 t offset_to_id -ffffffff822822c0 t id_to_offset -ffffffff82283000 T dal_hw_factory_dcn315_init -ffffffff82283060 t define_hpd_registers -ffffffff822830b0 t define_ddc_registers -ffffffff82283160 t define_generic_registers -ffffffff82284000 T dal_hw_translate_dcn315_init -ffffffff82284030 t offset_to_id -ffffffff822842b0 t id_to_offset -ffffffff82285000 T dal_hw_factory_dcn32_init -ffffffff82285060 t define_hpd_registers -ffffffff822850b0 t define_ddc_registers -ffffffff82285160 t define_generic_registers -ffffffff82286000 T dal_hw_translate_dcn32_init -ffffffff82286030 t offset_to_id -ffffffff82286290 t id_to_offset -ffffffff82287000 T dal_gpio_open -ffffffff822870c0 T dal_gpio_open_ex -ffffffff82287180 T dal_gpio_get_value -ffffffff82287200 T dal_gpio_set_value -ffffffff82287280 T dal_gpio_get_mode -ffffffff822872b0 T dal_gpio_lock_pin -ffffffff822872d0 T dal_gpio_unlock_pin -ffffffff822872f0 T dal_gpio_change_mode -ffffffff82287370 T dal_gpio_get_id -ffffffff822873a0 T dal_gpio_get_enum -ffffffff822873d0 T dal_gpio_set_config -ffffffff82287450 T dal_gpio_get_pin_info -ffffffff822874b0 T dal_gpio_get_sync_source -ffffffff82287540 T dal_gpio_get_output_state -ffffffff82287570 T dal_gpio_get_ddc -ffffffff822875a0 T dal_gpio_get_hpd -ffffffff822875d0 T dal_gpio_get_generic -ffffffff82287600 T dal_gpio_close -ffffffff82287650 T dal_gpio_create -ffffffff822877e0 T dal_gpio_destroy -ffffffff82288000 T dal_gpio_service_create -ffffffff82288240 T dal_gpio_service_create_irq -ffffffff82288300 T dal_gpio_create_irq -ffffffff82288380 T dal_gpio_service_create_generic_mux -ffffffff82288420 T dal_gpio_destroy_generic_mux -ffffffff822884b0 T dal_gpio_get_generic_pin_info -ffffffff82288510 T dal_gpio_service_destroy -ffffffff82288640 T dal_mux_setup_config -ffffffff822886a0 T dal_gpio_service_lock -ffffffff82288720 T dal_gpio_service_unlock -ffffffff822887a0 T dal_gpio_service_open -ffffffff822889e0 T dal_gpio_service_close -ffffffff82288a80 T dal_irq_get_source -ffffffff82288af0 T dal_irq_get_rx_source -ffffffff82288b40 T dal_irq_setup_hpd_filter -ffffffff82288ba0 T dal_gpio_destroy_irq -ffffffff82288c30 T dal_gpio_create_ddc -ffffffff82288da0 T dal_gpio_destroy_ddc -ffffffff82288e70 T dal_ddc_close -ffffffff82288ec0 T dal_ddc_open -ffffffff82289020 T dal_ddc_change_mode -ffffffff822890c0 T dal_ddc_get_line -ffffffff822890e0 T dal_ddc_set_config -ffffffff8228a000 T dal_hw_ddc_init -ffffffff8228a100 T dal_hw_ddc_get_pin -ffffffff8228a110 t dal_hw_ddc_destroy -ffffffff8228a170 t set_config -ffffffff8228b000 T dal_hw_factory_init -ffffffff8228c000 T dal_hw_generic_init -ffffffff8228c100 T dal_hw_generic_get_pin -ffffffff8228c110 t dal_hw_generic_destroy -ffffffff8228c170 t set_config -ffffffff8228d000 T dal_hw_gpio_open -ffffffff8228d0b0 T dal_hw_gpio_config_mode -ffffffff8228d1a0 T dal_hw_gpio_get_value -ffffffff8228d200 T dal_hw_gpio_set_value -ffffffff8228d290 T dal_hw_gpio_change_mode -ffffffff8228d2a0 T dal_hw_gpio_close -ffffffff8228d350 T dal_hw_gpio_construct -ffffffff8228d3b0 T dal_hw_gpio_destruct -ffffffff8228e000 T dal_hw_hpd_init -ffffffff8228e100 T dal_hw_hpd_get_pin -ffffffff8228e110 t dal_hw_hpd_destroy -ffffffff8228e170 t get_value -ffffffff8228e210 t set_config -ffffffff8228f000 T dal_hw_translate_init -ffffffff82290000 T dc_process_hdcp_msg -ffffffff82290180 t hdmi_14_process_transaction -ffffffff822902d0 t dp_11_process_transaction -ffffffff82291000 T dal_irq_service_dummy_set -ffffffff82291050 T dal_irq_service_dummy_ack -ffffffff822910a0 T dce110_vblank_set -ffffffff82291170 T to_dal_irq_source_dce110 -ffffffff822912f0 T dal_irq_service_dce110_create -ffffffff82291370 t hpd_ack -ffffffff82292000 T dal_irq_service_dce120_create -ffffffff82292080 t hpd_ack -ffffffff82293000 T dal_irq_service_dce80_create +ffffffff81fd62f0 t phy_id_to_atom +ffffffff81fd6330 t disp_power_gating_action_to_atom +ffffffff81fd63a0 t dc_clock_type_to_atom +ffffffff81fd6420 t transmitter_color_depth_to_atom +ffffffff81fd7000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff81fd7030 t encoder_action_to_atom +ffffffff81fd70b0 t engine_bp_to_atom +ffffffff81fd7100 t clock_source_id_to_atom +ffffffff81fd71d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81fd7220 t signal_type_to_atom_dig_mode +ffffffff81fd7280 t hpd_sel_to_atom +ffffffff81fd72c0 t dig_encoder_sel_to_atom +ffffffff81fd7310 t phy_id_to_atom +ffffffff81fd7350 t disp_power_gating_action_to_atom +ffffffff81fd8000 T clk_mgr_helper_get_active_display_cnt +ffffffff81fd80e0 T clk_mgr_helper_get_active_plane_cnt +ffffffff81fd8190 T clk_mgr_exit_optimized_pwr_state +ffffffff81fd82a0 T clk_mgr_optimize_pwr_state +ffffffff81fd8390 T dc_clk_mgr_create +ffffffff81fd8a50 T dc_destroy_clk_mgr +ffffffff81fd9000 T dentist_get_divider_from_did +ffffffff81fd9070 T dce_adjust_dp_ref_freq_for_ss +ffffffff81fd9170 T dce_get_dp_ref_freq_khz +ffffffff81fd92a0 T dce12_get_dp_ref_freq_khz +ffffffff81fd92c0 T dce_get_max_pixel_clock_for_all_paths +ffffffff81fd94d0 T dce_get_required_clocks_state +ffffffff81fd9580 T dce_set_clock +ffffffff81fd96e0 T dce_clock_read_ss_info +ffffffff81fd9800 T dce_clk_mgr_construct +ffffffff81fd99f0 t dce_update_clocks +ffffffff81fda000 T dce110_get_min_vblank_time_us +ffffffff81fda090 T dce110_fill_display_configs +ffffffff81fda300 T dce11_pplib_apply_display_requirements +ffffffff81fda5f0 T dce110_clk_mgr_construct +ffffffff81fda6a0 t dce11_update_clocks +ffffffff81fdb000 T dce112_set_clock +ffffffff81fdb180 T dce112_set_dispclk +ffffffff81fdb2a0 T dce112_set_dprefclk +ffffffff81fdb310 T dce112_clk_mgr_construct +ffffffff81fdb3c0 t dce112_update_clocks +ffffffff81fdc000 T dce120_clk_mgr_construct +ffffffff81fdc090 T dce121_clk_mgr_construct +ffffffff81fdc1c0 t dce12_update_clocks +ffffffff81fdd000 T rv1_clk_mgr_construct +ffffffff81fdd0c0 t rv1_update_clocks +ffffffff81fdd5a0 t rv1_init_clocks +ffffffff81fdd630 t rv1_enable_pme_wa +ffffffff81fde000 T rv1_vbios_smu_set_dispclk +ffffffff81fde0e0 t rv1_vbios_smu_send_msg_with_param +ffffffff81fde1f0 T rv1_vbios_smu_set_dprefclk +ffffffff81fdf000 T rv2_clk_mgr_construct +ffffffff81fe0000 T dentist_get_did_from_divider +ffffffff81fe0080 T dcn20_update_clocks_update_dpp_dto +ffffffff81fe0150 T dcn20_update_clocks_update_dentist +ffffffff81fe0640 T dcn2_update_clocks +ffffffff81fe0bc0 T dcn2_read_clocks_from_hw_dentist +ffffffff81fe0c90 T dcn2_update_clocks_fpga +ffffffff81fe0dc0 T dcn2_init_clocks +ffffffff81fe0e60 T dcn2_get_clock +ffffffff81fe0ed0 T dcn20_clk_mgr_construct +ffffffff81fe1000 t dcn2_enable_pme_wa +ffffffff81fe1050 t dcn2_are_clock_states_equal +ffffffff81fe10c0 t dcn2_notify_link_rate_change +ffffffff81fe2000 T dcn201_clk_mgr_construct +ffffffff81fe2120 t dcn201_update_clocks +ffffffff81fe2340 t dcn201_init_clocks +ffffffff81fe3000 T rn_clk_mgr_construct +ffffffff81fe38a0 t rn_update_clocks +ffffffff81fe3e60 t rn_set_low_power_state +ffffffff81fe4040 t rn_init_clocks +ffffffff81fe40e0 t rn_enable_pme_wa +ffffffff81fe40f0 t rn_are_clock_states_equal +ffffffff81fe4140 t rn_notify_wm_ranges +ffffffff81fe44d0 t rn_notify_link_rate_change +ffffffff81fe5000 T rn_vbios_smu_get_smu_version +ffffffff81fe5020 t rn_vbios_smu_send_msg_with_param +ffffffff81fe51b0 T rn_vbios_smu_set_dispclk +ffffffff81fe52d0 T rn_vbios_smu_set_dprefclk +ffffffff81fe5340 T rn_vbios_smu_set_hard_min_dcfclk +ffffffff81fe53c0 T rn_vbios_smu_set_min_deep_sleep_dcfclk +ffffffff81fe5440 T rn_vbios_smu_set_phyclk +ffffffff81fe5480 T rn_vbios_smu_set_dppclk +ffffffff81fe5530 T rn_vbios_smu_set_dcn_low_power_state +ffffffff81fe5550 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff81fe5570 T rn_vbios_smu_enable_pme_wa +ffffffff81fe5590 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff81fe6000 T dcn3_init_clocks +ffffffff81fe63b0 t dcn3_init_clocks_fpga +ffffffff81fe63c0 T dcn3_clk_mgr_construct +ffffffff81fe6510 T dcn3_clk_mgr_destroy +ffffffff81fe6570 t dcn3_update_clocks +ffffffff81fe6990 t dcn3_enable_pme_wa +ffffffff81fe69d0 t dcn3_are_clock_states_equal +ffffffff81fe6a30 t dcn3_notify_wm_ranges +ffffffff81fe6cc0 t dcn30_notify_link_rate_change +ffffffff81fe6de0 t dcn3_set_hard_min_memclk +ffffffff81fe6e80 t dcn3_set_hard_max_memclk +ffffffff81fe6ee0 t dcn3_set_max_memclk +ffffffff81fe6f20 t dcn3_set_min_memclk +ffffffff81fe6f60 t dcn3_get_memclk_states_from_smu +ffffffff81fe70a0 t dcn3_is_smu_present +ffffffff81fe8000 T dcn30_smu_test_message +ffffffff81fe8070 t dcn30_smu_send_msg_with_param +ffffffff81fe81d0 T dcn30_smu_get_smu_version +ffffffff81fe81f0 T dcn30_smu_check_driver_if_version +ffffffff81fe8240 T dcn30_smu_check_msg_header_version +ffffffff81fe8290 T dcn30_smu_set_dram_addr_high +ffffffff81fe82b0 T dcn30_smu_set_dram_addr_low +ffffffff81fe82d0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff81fe82f0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff81fe8310 T dcn30_smu_set_hard_min_by_freq +ffffffff81fe8360 T dcn30_smu_set_hard_max_by_freq +ffffffff81fe83b0 T dcn30_smu_get_dpm_freq_by_index +ffffffff81fe8400 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff81fe8450 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff81fe8470 T dcn30_smu_set_num_of_displays +ffffffff81fe8490 T dcn30_smu_set_display_refresh_from_mall +ffffffff81fe84c0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff81fe84e0 T dcn30_smu_set_pme_workaround +ffffffff81fe9000 T dcn301_smu_get_smu_version +ffffffff81fe9070 t dcn301_smu_send_msg_with_param +ffffffff81fe91f0 T dcn301_smu_set_dispclk +ffffffff81fe9290 T dcn301_smu_set_dprefclk +ffffffff81fe9340 T dcn301_smu_set_hard_min_dcfclk +ffffffff81fe93e0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff81fe9480 T dcn301_smu_set_dppclk +ffffffff81fe9520 T dcn301_smu_set_display_idle_optimization +ffffffff81fe9570 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff81fe95c0 T dcn301_smu_enable_pme_wa +ffffffff81fe95e0 T dcn301_smu_set_dram_addr_high +ffffffff81fe9630 T dcn301_smu_set_dram_addr_low +ffffffff81fe9680 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff81fe96a0 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff81fea000 T vg_clk_mgr_construct +ffffffff81fea840 T vg_clk_mgr_destroy +ffffffff81fea890 t vg_update_clocks +ffffffff81feabd0 t vg_init_clocks +ffffffff81feac70 t vg_enable_pme_wa +ffffffff81feac80 t vg_are_clock_states_equal +ffffffff81feacd0 t vg_notify_wm_ranges +ffffffff81fec000 T dcn31_update_clocks +ffffffff81fec610 T dcn31_init_clocks +ffffffff81fec6c0 T dcn31_are_clock_states_equal +ffffffff81fec720 T dcn31_get_dtb_ref_freq_khz +ffffffff81fec750 T dcn31_clk_mgr_construct +ffffffff81fece20 T dcn31_clk_mgr_destroy +ffffffff81fece70 t dcn31_set_low_power_state +ffffffff81fed080 t dcn31_enable_pme_wa +ffffffff81fed090 t dcn31_notify_wm_ranges +ffffffff81fed410 t find_clk_for_voltage +ffffffff81fee000 T dcn31_smu_get_smu_version +ffffffff81fee020 t dcn31_smu_send_msg_with_param +ffffffff81fee230 T dcn31_smu_set_dispclk +ffffffff81fee2a0 T dcn31_smu_set_dprefclk +ffffffff81fee310 T dcn31_smu_set_hard_min_dcfclk +ffffffff81fee390 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff81fee410 T dcn31_smu_set_dppclk +ffffffff81fee480 T dcn31_smu_set_display_idle_optimization +ffffffff81fee4d0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff81fee520 T dcn31_smu_enable_pme_wa +ffffffff81fee560 T dcn31_smu_set_dram_addr_high +ffffffff81fee5a0 T dcn31_smu_set_dram_addr_low +ffffffff81fee5e0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff81fee620 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff81fee660 T dcn31_smu_set_zstate_support +ffffffff81fee6d0 T dcn31_smu_set_dtbclk +ffffffff81fef000 T dcn314_update_clocks +ffffffff81fef5d0 t dcn314_disable_otg_wa +ffffffff81fef760 T dcn314_are_clock_states_equal +ffffffff81fef7c0 T dcn314_clk_mgr_construct +ffffffff81ff04d0 T dcn314_clk_mgr_destroy +ffffffff81ff0520 t dcn314_enable_pme_wa +ffffffff81ff0530 t dcn314_notify_wm_ranges +ffffffff81ff1000 T dcn314_smu_get_smu_version +ffffffff81ff1020 t dcn314_smu_send_msg_with_param +ffffffff81ff1250 T dcn314_smu_set_dispclk +ffffffff81ff12c0 T dcn314_smu_set_dprefclk +ffffffff81ff1330 T dcn314_smu_set_hard_min_dcfclk +ffffffff81ff13b0 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81ff1430 T dcn314_smu_set_dppclk +ffffffff81ff14a0 T dcn314_smu_set_display_idle_optimization +ffffffff81ff14f0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81ff1540 T dcn314_smu_enable_pme_wa +ffffffff81ff1580 T dcn314_smu_set_dram_addr_high +ffffffff81ff15c0 T dcn314_smu_set_dram_addr_low +ffffffff81ff1600 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81ff1640 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81ff1680 T dcn314_smu_set_zstate_support +ffffffff81ff16d0 T dcn314_smu_set_dtbclk +ffffffff81ff2000 T dcn315_clk_mgr_construct +ffffffff81ff2820 T dcn315_clk_mgr_destroy +ffffffff81ff2870 t dcn315_update_clocks +ffffffff81ff2db0 t dcn315_enable_pme_wa +ffffffff81ff2dc0 t dcn315_notify_wm_ranges +ffffffff81ff3140 t dcn315_disable_otg_wa +ffffffff81ff4000 T dcn315_smu_get_smu_version +ffffffff81ff4020 t dcn315_smu_send_msg_with_param +ffffffff81ff4310 T dcn315_smu_set_dispclk +ffffffff81ff4380 T dcn315_smu_set_hard_min_dcfclk +ffffffff81ff4400 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81ff4480 T dcn315_smu_set_dppclk +ffffffff81ff44f0 T dcn315_smu_set_display_idle_optimization +ffffffff81ff4540 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81ff4590 T dcn315_smu_enable_pme_wa +ffffffff81ff45d0 T dcn315_smu_set_dram_addr_high +ffffffff81ff4610 T dcn315_smu_set_dram_addr_low +ffffffff81ff4650 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81ff4690 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81ff46d0 T dcn315_smu_get_dpref_clk +ffffffff81ff4730 T dcn315_smu_get_dtbclk +ffffffff81ff4790 T dcn315_smu_set_dtbclk +ffffffff81ff5000 T dcn316_clk_mgr_construct +ffffffff81ff5650 T dcn316_clk_mgr_destroy +ffffffff81ff56a0 t dcn316_update_clocks +ffffffff81ff5c90 t dcn316_enable_pme_wa +ffffffff81ff5ca0 t dcn316_notify_wm_ranges +ffffffff81ff6020 t find_clk_for_voltage +ffffffff81ff7000 T dcn316_smu_get_smu_version +ffffffff81ff7020 t dcn316_smu_send_msg_with_param +ffffffff81ff71b0 T dcn316_smu_set_dispclk +ffffffff81ff7220 T dcn316_smu_set_hard_min_dcfclk +ffffffff81ff72a0 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff81ff7320 T dcn316_smu_set_dppclk +ffffffff81ff7390 T dcn316_smu_set_display_idle_optimization +ffffffff81ff73e0 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff81ff7430 T dcn316_smu_set_dram_addr_high +ffffffff81ff7470 T dcn316_smu_set_dram_addr_low +ffffffff81ff74b0 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff81ff74f0 T dcn316_smu_transfer_wm_table_dram_2_smu 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+ffffffff81ffa020 t dcn32_smu_send_msg_with_param +ffffffff81ffa160 T dcn32_smu_send_cab_for_uclk_message +ffffffff81ffa190 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff81ffa1b0 T dcn32_smu_set_pme_workaround +ffffffff81ffa1d0 T dcn32_smu_set_hard_min_by_freq +ffffffff81ffa220 T dcn32_smu_wait_for_dmub_ack_mclk +ffffffff81ffb000 T dc_stream_adjust_vmin_vmax +ffffffff81ffb170 T dc_stream_get_last_used_drr_vtotal +ffffffff81ffb2d0 T dc_stream_get_crtc_position +ffffffff81ffb500 T dc_stream_configure_crc +ffffffff81ffb670 T dc_stream_get_crc +ffffffff81ffb750 T dc_stream_set_dyn_expansion +ffffffff81ffb9c0 T dc_stream_set_dither_option +ffffffff81ffbb60 T dc_stream_set_gamut_remap +ffffffff81ffbce0 T dc_stream_program_csc_matrix +ffffffff81ffbf00 T dc_stream_set_static_screen_params +ffffffff81ffc080 T dc_create +ffffffff81ffc600 t dc_construct_ctx +ffffffff81ffc770 t dc_destruct +ffffffff81ffca40 T dc_hardware_init +ffffffff81ffcb10 T dc_init_callbacks +ffffffff81ffcb60 T dc_deinit_callbacks +ffffffff81ffcbb0 T dc_destroy +ffffffff81ffcc00 T dc_validate_boot_timing +ffffffff81ffcfa0 T dc_enable_stereo +ffffffff81ffd0a0 T dc_trigger_sync +ffffffff81ffd6d0 T dc_z10_restore +ffffffff81ffd710 T dc_z10_save_init +ffffffff81ffd750 T dc_commit_streams +ffffffff81ffdc30 t commit_minimal_transition_state +ffffffff81ffe060 T dc_create_state +ffffffff81ffe0f0 t dc_commit_state_no_check +ffffffff81fff770 T dc_release_state +ffffffff81fff7d0 T dc_acquire_release_mpc_3dlut +ffffffff81fff8a0 T dc_post_update_surfaces_to_stream +ffffffff81fffcb0 T dc_copy_state +ffffffff81fffe80 T dc_retain_state +ffffffff81fffeb0 T dc_set_generic_gpio_for_stereo +ffffffff81ffffc0 T dc_check_update_surfaces_for_stream +ffffffff820009a0 T dc_dmub_update_dirty_rect +ffffffff82000bb0 T dc_update_planes_and_stream +ffffffff82001730 t fast_update_only +ffffffff82001a90 t commit_planes_for_stream_fast +ffffffff82001eb0 t commit_planes_for_stream +ffffffff82003430 T dc_commit_updates_for_stream +ffffffff82003a50 t copy_surface_update_to_plane +ffffffff82003e60 t copy_stream_update_to_stream +ffffffff82004500 T dc_get_current_stream_count +ffffffff82004540 T dc_get_stream_at_index +ffffffff82004590 T dc_interrupt_to_irq_source +ffffffff820045b0 T dc_interrupt_set +ffffffff82004600 T dc_interrupt_ack +ffffffff82004620 T dc_power_down_on_boot +ffffffff82004670 T dc_set_power_state +ffffffff82004850 T dc_resume +ffffffff820048d0 T dc_is_dmcu_initialized +ffffffff82004920 T get_clock_requirements_for_state +ffffffff820049a0 T dc_set_clock +ffffffff820049e0 T dc_get_clock +ffffffff82004a20 T dc_set_psr_allow_active +ffffffff82004b20 T dc_allow_idle_optimizations +ffffffff82004bc0 T dc_unlock_memory_clock_frequency +ffffffff82004c30 T dc_lock_memory_clock_frequency +ffffffff82004cc0 T dc_enable_dcmode_clk_limit +ffffffff82004e80 t blank_and_force_memclk +ffffffff82005060 T dc_is_plane_eligible_for_idle_optimizations +ffffffff820050b0 T dc_hardware_release +ffffffff82005100 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff82005140 T dc_is_dmub_outbox_supported +ffffffff820051a0 T dc_enable_dmub_notifications +ffffffff82005200 T dc_enable_dmub_outbox +ffffffff82005240 T dc_process_dmub_aux_transfer_async +ffffffff820053c0 T get_link_index_from_dpia_port_index +ffffffff82005470 T dc_process_dmub_set_config_async +ffffffff82005550 T dc_process_dmub_set_mst_slots +ffffffff82005640 T dc_process_dmub_dpia_hpd_int_enable +ffffffff82005700 T dc_print_dmub_diagnostic_data +ffffffff82005720 T dc_disable_accelerated_mode +ffffffff82005740 T dc_notify_vsync_int_state +ffffffff82005960 T dc_abm_save_restore +ffffffff82005b30 T dc_query_current_properties +ffffffff82005ba0 T dc_set_edp_power +ffffffff82005c10 t create_links +ffffffff82006070 t create_link_encoders +ffffffff82006150 t dc_update_viusal_confirm_color +ffffffff82007000 T pre_surface_trace +ffffffff82007030 T update_surface_trace +ffffffff82007060 T post_surface_trace +ffffffff82007090 T context_timing_trace +ffffffff82007240 T context_clock_trace +ffffffff82007270 T dc_status_to_str +ffffffff82008000 T find_color_matrix +ffffffff820080b0 T color_space_to_black_color +ffffffff82008120 T hwss_wait_for_blank_complete +ffffffff820081c0 T get_mpctree_visual_confirm_color +ffffffff82008220 T get_surface_visual_confirm_color +ffffffff820082d0 T get_hdr_visual_confirm_color +ffffffff82008390 T get_subvp_visual_confirm_color +ffffffff82008490 T hwss_build_fast_sequence +ffffffff82008b50 T hwss_execute_sequence +ffffffff82008f40 T hwss_setup_dpp +ffffffff82008fe0 T hwss_program_bias_and_scale +ffffffff82009060 T hwss_program_manual_trigger +ffffffff820090b0 T hwss_power_on_mpc_mem_pwr +ffffffff82009100 T hwss_set_output_csc +ffffffff82009150 T hwss_set_ocsc_default +ffffffff820091a0 T hwss_send_dmcub_cmd +ffffffff820091c0 T get_mclk_switch_visual_confirm_color +ffffffff82009320 T get_surface_tile_visual_confirm_color +ffffffff8200a000 T link_enc_cfg_init +ffffffff8200a1b0 T link_enc_cfg_copy +ffffffff8200a1e0 T link_enc_cfg_link_encs_assign +ffffffff8200b5a0 T link_enc_cfg_validate +ffffffff8200bd40 T link_enc_cfg_link_enc_unassign +ffffffff8200bed0 T link_enc_cfg_is_transmitter_mappable +ffffffff8200bff0 T link_enc_cfg_get_stream_using_link_enc +ffffffff8200c0f0 T link_enc_cfg_get_link_using_link_enc +ffffffff8200c200 T link_enc_cfg_get_link_enc_used_by_link +ffffffff8200c380 T link_enc_cfg_get_next_avail_link_enc +ffffffff8200c4f0 T link_enc_cfg_get_link_enc_used_by_stream +ffffffff8200c510 T link_enc_cfg_get_link_enc +ffffffff8200c5a0 T link_enc_cfg_get_link_enc_used_by_stream_current +ffffffff8200c720 T link_enc_cfg_is_link_enc_avail +ffffffff8200c920 T link_enc_cfg_set_transient_mode +ffffffff8200d000 T dc_get_link_at_index +ffffffff8200d030 T dc_get_edp_links +ffffffff8200d0b0 T dc_get_edp_link_panel_inst +ffffffff8200d170 T dc_link_detect +ffffffff8200d1a0 T dc_link_detect_connection_type +ffffffff8200d1d0 T dc_link_get_status +ffffffff8200d200 T dc_link_is_hdcp14 +ffffffff8200d230 T dc_link_is_hdcp22 +ffffffff8200d260 T dc_link_clear_dprx_states +ffffffff8200d290 T dc_link_reset_cur_dp_mst_topology +ffffffff8200d2c0 T dc_link_bandwidth_kbps +ffffffff8200d2f0 T dc_get_cur_link_res_map +ffffffff8200d310 T dc_restore_link_res_map +ffffffff8200d330 T dc_link_update_dsc_config +ffffffff8200d360 T dc_is_oem_i2c_device_present +ffffffff8200d3b0 T dc_submit_i2c +ffffffff8200d3e0 T dc_submit_i2c_oem +ffffffff8200d430 T dc_link_dp_handle_automated_test +ffffffff8200d460 T dc_link_dp_set_test_pattern +ffffffff8200d490 T dc_link_set_drive_settings +ffffffff8200d520 T dc_link_set_preferred_link_settings +ffffffff8200d540 T dc_link_set_preferred_training_settings +ffffffff8200d570 T dc_dp_trace_is_initialized +ffffffff8200d5a0 T dc_dp_trace_set_is_logged_flag +ffffffff8200d5d0 T dc_dp_trace_is_logged +ffffffff8200d600 T dc_dp_trace_get_lt_end_timestamp +ffffffff8200d630 T dc_dp_trace_get_lt_counts +ffffffff8200d660 T dc_dp_trace_get_link_loss_count +ffffffff8200d690 T dc_link_add_remote_sink +ffffffff8200d6c0 T dc_link_remove_remote_sink +ffffffff8200d6f0 T dc_link_aux_transfer_raw +ffffffff8200d720 T dc_link_bw_kbps_from_raw_frl_link_rate_data +ffffffff8200d740 T dc_link_decide_edp_link_settings +ffffffff8200d770 T dc_link_dp_get_max_link_enc_cap +ffffffff8200d7a0 T dc_link_dp_mst_decide_link_encoding_format +ffffffff8200d7d0 T dc_link_get_link_cap +ffffffff8200d800 T dc_link_get_highest_encoding_format +ffffffff8200d8c0 T dc_link_is_dp_sink_present +ffffffff8200d8f0 T dc_link_is_fec_supported +ffffffff8200d920 T dc_link_overwrite_extended_receiver_cap +ffffffff8200d950 T dc_link_should_enable_fec +ffffffff8200d980 T dc_link_dp_dpia_handle_usb4_bandwidth_allocation_for_link +ffffffff8200d9b0 T dc_link_handle_usb4_bw_alloc_response +ffffffff8200d9e0 T dc_link_check_link_loss_status +ffffffff8200da10 T dc_link_dp_allow_hpd_rx_irq +ffffffff8200da40 T dc_link_dp_handle_link_loss +ffffffff8200da70 T dc_link_dp_read_hpd_rx_irq_data +ffffffff8200daa0 T dc_link_handle_hpd_rx_irq +ffffffff8200dad0 T dc_link_dp_receiver_power_ctrl +ffffffff8200db00 T dc_link_decide_lttpr_mode +ffffffff8200db30 T dc_link_edp_panel_backlight_power_on +ffffffff8200db60 T dc_link_get_backlight_level +ffffffff8200db90 T dc_link_get_backlight_level_nits +ffffffff8200dbc0 T dc_link_set_backlight_level +ffffffff8200dbf0 T dc_link_set_backlight_level_nits +ffffffff8200dc20 T dc_link_get_target_backlight_pwm +ffffffff8200dc50 T dc_link_get_psr_state +ffffffff8200dc80 T dc_link_set_psr_allow_active +ffffffff8200dcb0 T dc_link_setup_psr +ffffffff8200dce0 T dc_link_get_replay_state +ffffffff8200dd10 T dc_link_wait_for_t12 +ffffffff8200dd40 T dc_link_get_hpd_state +ffffffff8200dd70 T dc_link_enable_hpd +ffffffff8200dda0 T dc_link_disable_hpd +ffffffff8200ddd0 T dc_link_enable_hpd_filter +ffffffff8200de00 T dc_link_validate +ffffffff8200e000 T resource_parse_asic_id +ffffffff8200e250 T dc_create_resource_pool +ffffffff8200e550 T dc_destroy_resource_pool +ffffffff8200e5c0 T resource_construct +ffffffff8200eaa0 T resource_unreference_clock_source +ffffffff8200eb20 T resource_reference_clock_source +ffffffff8200eba0 T resource_get_clock_source_reference +ffffffff8200ec20 T resource_are_vblanks_synchronizable +ffffffff8200ee40 T resource_are_streams_timing_synchronizable +ffffffff8200ef30 T resource_find_used_clk_src_for_sharing +ffffffff8200f060 T resource_get_num_mpc_splits +ffffffff8200f0f0 T resource_get_num_odm_splits +ffffffff8200f1b0 T resource_get_otg_master +ffffffff8200f250 T resource_build_scaling_params +ffffffff8200ffe0 t calculate_odm_slice_in_timing_active +ffffffff82010160 T resource_build_scaling_params_for_context +ffffffff820102b0 T resource_find_free_secondary_pipe_legacy +ffffffff82010350 T resource_find_free_pipe_used_in_cur_mpc_blending_tree +ffffffff820103c0 T resource_is_pipe_type +ffffffff82010440 T recource_find_free_pipe_not_used_in_cur_res_ctx +ffffffff820104c0 T resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine +ffffffff820105e0 T resource_is_for_mpcc_combine +ffffffff82010670 T resource_find_any_free_pipe +ffffffff820106e0 T resource_get_otg_master_for_stream +ffffffff82010810 T resource_get_opp_head +ffffffff820108a0 T dc_add_plane_to_context +ffffffff82010b60 T dc_remove_plane_from_context +ffffffff82010d40 T dc_rem_all_planes_for_stream +ffffffff82010f00 T dc_add_all_planes_for_stream +ffffffff82011080 T dc_is_timing_changed +ffffffff820110e0 T dc_is_stream_unchanged +ffffffff820111c0 T dc_is_stream_scaling_unchanged +ffffffff82011260 T update_audio_usage +ffffffff820112d0 T dc_add_stream_to_ctx +ffffffff820113a0 T dc_remove_stream_from_ctx +ffffffff820117b0 T resource_map_pool_resources +ffffffff82012210 t acquire_first_split_pipe +ffffffff82012380 t add_hpo_dp_link_enc_to_ctx +ffffffff82012450 t find_first_free_audio +ffffffff82012500 T dc_resource_state_copy_construct_current +ffffffff82012520 T dc_resource_state_copy_construct +ffffffff820126c0 T dc_resource_state_construct +ffffffff820126e0 T dc_resource_is_dsc_encoding_supported +ffffffff82012730 T dc_validate_with_context +ffffffff82013360 t planes_changed_for_existing_stream +ffffffff820134e0 T dc_validate_global_state +ffffffff82013860 T dc_resource_state_destruct +ffffffff82013940 T dc_resource_find_first_free_pll +ffffffff820139b0 T resource_build_info_frame +ffffffff820140e0 T resource_map_clock_resources +ffffffff82014270 T pipe_need_reprogram +ffffffff820143e0 T resource_build_bit_depth_reduction_params +ffffffff82014610 T dc_validate_stream +ffffffff820147e0 T dc_validate_plane +ffffffff82014870 T resource_pixel_format_to_bpp +ffffffff820148f0 T get_audio_check +ffffffff82014a10 T get_temp_dp_link_res +ffffffff82014b20 T reset_syncd_pipes_from_disabled_pipes +ffffffff82014c70 T check_syncd_pipes_for_disabled_master_pipe +ffffffff82014db0 T reset_sync_context_for_pipe +ffffffff82014e60 T resource_transmitter_to_phy_idx +ffffffff82014ec0 T get_link_hwss +ffffffff82014f50 T is_h_timing_divisible_by_2 +ffffffff82014fb0 T dc_resource_acquire_secondary_pipe_for_mpc_odm +ffffffff820151c0 T update_dp_encoder_resources_for_test_harness +ffffffff82015480 t calculate_plane_rec_in_timing_active +ffffffff82015750 t calculate_init_and_vp +ffffffff82016000 T dc_sink_retain +ffffffff82016030 T dc_sink_release +ffffffff820160a0 T dc_sink_create +ffffffff82017000 T dc_stat_get_dmub_notification +ffffffff820170b0 T dc_stat_get_dmub_dataout +ffffffff82018000 T update_stream_signal +ffffffff82018080 T dc_stream_retain +ffffffff820180b0 T dc_stream_release +ffffffff82018130 T dc_create_stream_for_sink +ffffffff82018470 T dc_copy_stream +ffffffff82018540 T dc_stream_get_status_from_state +ffffffff820185a0 T dc_stream_get_status +ffffffff82018610 T dc_optimize_timing_for_fsft +ffffffff82018660 T dc_stream_set_cursor_attributes +ffffffff82018860 t program_cursor_attributes +ffffffff820189c0 T dc_stream_set_cursor_position +ffffffff82018ae0 t program_cursor_position +ffffffff82018c20 T dc_stream_add_writeback +ffffffff82018e30 T dc_stream_remove_writeback +ffffffff82018f60 T dc_stream_warmup_writeback +ffffffff82018fa0 T dc_stream_get_vblank_counter +ffffffff82019070 T dc_stream_send_dp_sdp +ffffffff82019300 T dc_stream_get_scanoutpos +ffffffff820193e0 T dc_stream_dmdata_status_done +ffffffff820194a0 T dc_stream_set_dynamic_metadata +ffffffff82019600 T dc_stream_add_dsc_to_resource +ffffffff82019650 T dc_stream_get_pipe_ctx +ffffffff82019700 T dc_stream_log +ffffffff8201a000 T enable_surface_flip_reporting +ffffffff8201a030 T dc_create_plane_state +ffffffff8201a1d0 T dc_plane_get_status +ffffffff8201a350 T dc_plane_state_retain +ffffffff8201a380 T dc_plane_state_release +ffffffff8201a4d0 T dc_gamma_retain +ffffffff8201a500 T dc_gamma_release +ffffffff8201a560 T dc_create_gamma +ffffffff8201a5b0 T dc_transfer_func_retain +ffffffff8201a5e0 T dc_transfer_func_release +ffffffff8201a630 T dc_create_transfer_func +ffffffff8201a680 T dc_create_3dlut_func +ffffffff8201a6e0 T dc_3dlut_func_release +ffffffff8201a730 T dc_3dlut_func_retain +ffffffff8201b000 T vm_helper_mark_vmid_used +ffffffff8201b030 T dc_setup_system_context +ffffffff8201b0c0 T dc_setup_vm_context +ffffffff8201b0f0 T dc_get_vmid_use_vector +ffffffff8201b150 T vm_helper_init +ffffffff8201c000 T dc_dmub_srv_create +ffffffff8201c0a0 T dc_dmub_srv_destroy +ffffffff8201c0f0 T dc_dmub_srv_wait_idle +ffffffff8201c150 T dc_dmub_srv_log_diagnostic_data +ffffffff8201c690 T dc_dmub_srv_clear_inbox0_ack +ffffffff8201c6f0 T dc_dmub_srv_wait_for_inbox0_ack +ffffffff8201c750 T dc_dmub_srv_send_inbox0_cmd +ffffffff8201c7b0 T dc_dmub_srv_cmd_run +ffffffff8201c7d0 T dc_dmub_srv_cmd_run_list +ffffffff8201c980 T dc_dmub_srv_optimized_init_done +ffffffff8201ca00 T dc_dmub_srv_notify_stream_mask +ffffffff8201ca60 T dc_dmub_srv_is_restore_required +ffffffff8201cae0 T dc_dmub_srv_get_dmub_outbox0_msg +ffffffff8201cb10 T dc_dmub_trace_event_control +ffffffff8201cb30 T dc_dmub_srv_drr_update_cmd +ffffffff8201cbc0 T dc_dmub_srv_set_drr_manual_trigger_cmd +ffffffff8201cc50 T dc_dmub_srv_p_state_delegate +ffffffff8201d000 T dc_dmub_srv_query_caps_cmd +ffffffff8201d0c0 T dc_dmub_srv_get_visual_confirm_color_cmd +ffffffff8201d1a0 T dc_dmub_setup_subvp_dmub_command +ffffffff8201dbb0 T dc_dmub_srv_get_diagnostic_data +ffffffff8201dbf0 T dc_send_update_cursor_info_to_dmu +ffffffff8201df60 T dc_dmub_check_min_version +ffffffff8201dfa0 T dc_dmub_srv_enable_dpia_trace +ffffffff8201f000 T dc_edid_parser_send_cea +ffffffff8201f0b0 T dc_edid_parser_recv_cea_ack +ffffffff8201f140 T dc_edid_parser_recv_amd_vsdb +ffffffff82020000 T generic_reg_update_ex +ffffffff82020330 t set_reg_field_values +ffffffff820204e0 T generic_reg_set_ex +ffffffff820206d0 T generic_reg_get +ffffffff82020740 T generic_reg_get2 +ffffffff820207d0 T generic_reg_get3 +ffffffff82020870 T generic_reg_get4 +ffffffff82020920 T generic_reg_get5 +ffffffff820209e0 T generic_reg_get6 +ffffffff82020ac0 T generic_reg_get7 +ffffffff82020bb0 T generic_reg_get8 +ffffffff82020cc0 T generic_reg_wait +ffffffff82020f10 T generic_write_indirect_reg +ffffffff82020f60 T generic_read_indirect_reg +ffffffff82021000 T generic_indirect_reg_get +ffffffff820211b0 T generic_indirect_reg_update_ex +ffffffff820213c0 T generic_indirect_reg_update_ex_sync +ffffffff820215b0 T generic_indirect_reg_get_sync +ffffffff820216e0 T reg_sequence_start_gather +ffffffff82021770 T reg_sequence_start_execute +ffffffff82021910 T reg_sequence_wait_done +ffffffff82021970 T dce_version_to_string +ffffffff82022000 T dce_abm_create +ffffffff820220b0 T dce_abm_destroy +ffffffff82022100 t dce_abm_init +ffffffff82022380 t dce_abm_set_level +ffffffff82022480 t dce_abm_immediate_disable +ffffffff820224d0 t dce_abm_set_pipe +ffffffff82022620 t dce_abm_set_backlight_level_pwm +ffffffff82022810 t dce_abm_get_current_backlight +ffffffff82022840 t dce_abm_get_target_backlight +ffffffff82023000 T dce_aud_az_enable +ffffffff82023150 T dce_aud_az_disable +ffffffff82023340 T dce_aud_az_configure +ffffffff82023fc0 t check_audio_bandwidth +ffffffff82024150 T dce_aud_wall_dto_setup +ffffffff820242d0 T dce_aud_hw_init +ffffffff820244a0 T dce_aud_destroy +ffffffff820244f0 T dce_audio_create +ffffffff820245b0 t dce_aud_endpoint_valid +ffffffff82025000 T dce110_engine_destroy +ffffffff82025050 T dce110_aux_engine_construct +ffffffff820250d0 t dce_aux_configure_timeout +ffffffff820252b0 T dce_aux_transfer_raw +ffffffff82025ae0 t acquire +ffffffff82025d50 T dce_aux_transfer_dmub_raw +ffffffff82025e50 T dce_aux_transfer_with_retries +ffffffff82027000 T look_up_in_video_optimized_rate_tlb +ffffffff82027070 T dce110_clk_src_construct +ffffffff82027270 t calc_pll_max_vco_construct +ffffffff82027410 T dce112_clk_src_construct +ffffffff820274a0 T dcn20_clk_src_construct +ffffffff82027550 T dcn3_clk_src_construct +ffffffff82027600 T dcn31_clk_src_construct +ffffffff820276b0 T dcn301_clk_src_construct +ffffffff82027760 t dce110_clock_source_power_down +ffffffff820277f0 t dce110_program_pix_clk +ffffffff82027e80 t dce110_get_pix_clk_dividers +ffffffff82028500 t get_pixel_clk_frequency_100hz +ffffffff82028610 t get_ss_info_from_atombios +ffffffff820288e0 t dce112_program_pix_clk +ffffffff82028af0 t dce112_get_pix_clk_dividers +ffffffff82028c00 t dcn20_program_pix_clk +ffffffff82028c90 t dcn20_override_dp_pix_clk +ffffffff82028d80 t dcn3_program_pix_clk +ffffffff82028f30 t dcn3_get_pix_clk_dividers +ffffffff82029000 t dcn31_program_pix_clk +ffffffff8202a000 T dce_dmcu_create +ffffffff8202a0c0 T dcn10_dmcu_create +ffffffff8202a180 T dcn20_dmcu_create +ffffffff8202a240 T dcn21_dmcu_create +ffffffff8202a330 T dce_dmcu_destroy +ffffffff8202a380 t dce_dmcu_init +ffffffff8202a3b0 t dce_dmcu_load_iram +ffffffff8202a510 t dce_dmcu_set_psr_enable +ffffffff8202a640 t dce_dmcu_setup_psr +ffffffff8202a970 t dce_get_dmcu_psr_state +ffffffff8202aa50 t dce_psr_wait_loop +ffffffff8202ab80 t dce_get_psr_wait_loop +ffffffff8202abb0 t dce_is_dmcu_initialized +ffffffff8202ac10 t dcn10_dmcu_init +ffffffff8202b150 t dcn10_dmcu_load_iram +ffffffff8202b390 t dcn10_dmcu_set_psr_enable +ffffffff8202b520 t dcn10_dmcu_setup_psr +ffffffff8202b8e0 t dcn10_get_dmcu_psr_state +ffffffff8202ba00 t dcn10_psr_wait_loop +ffffffff8202bb10 t dcn10_get_psr_wait_loop +ffffffff8202bb40 t dcn10_is_dmcu_initialized +ffffffff8202bb70 t dcn10_send_edid_cea +ffffffff8202bd10 t dcn10_recv_amd_vsdb +ffffffff8202bdc0 t dcn10_recv_edid_cea_ack +ffffffff8202be40 t dcn10_get_scp_results +ffffffff8202bf60 t dcn20_lock_phy +ffffffff8202c090 t dcn20_unlock_phy +ffffffff8202c1c0 t dcn21_dmcu_init +ffffffff8202d000 T dce_enable_fe_clock +ffffffff8202d040 T dce_pipe_control_lock +ffffffff8202d240 T dce_set_blender_mode +ffffffff8202d350 T dce_clock_gating_power_up +ffffffff8202d3f0 T dce_crtc_switch_to_clk_src +ffffffff8202d5b0 T dce_use_lut +ffffffff8202e000 T dce_i2c_oem_device_present +ffffffff8202e080 T dce_i2c_submit_command +ffffffff8202f000 T acquire_i2c_hw_engine +ffffffff8202f3a0 T dce_i2c_submit_command_hw +ffffffff8202fce0 t set_speed +ffffffff8202fe30 T dce_i2c_hw_construct +ffffffff8202fea0 T dce100_i2c_hw_construct +ffffffff8202ff10 T dce112_i2c_hw_construct +ffffffff8202ff80 T dcn1_i2c_hw_construct +ffffffff8202fff0 T dcn2_i2c_hw_construct +ffffffff82030080 t is_hw_busy +ffffffff82031000 T dce_i2c_sw_construct +ffffffff82031030 T dce_i2c_engine_acquire_sw +ffffffff820310d0 T dce_i2c_submit_command_sw +ffffffff820318a0 t write_byte_sw +ffffffff82032000 T dce_ipp_construct +ffffffff82032050 T dce_ipp_destroy +ffffffff820320a0 t dce_ipp_cursor_set_position +ffffffff820321d0 t dce_ipp_cursor_set_attributes +ffffffff82032460 t dce_ipp_program_prescale +ffffffff82032620 t dce_ipp_program_input_lut +ffffffff82032a90 t dce_ipp_set_degamma +ffffffff82033000 T dce110_get_dig_frontend +ffffffff820330c0 T dce110_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff82033160 T dce110_psr_program_dp_dphy_fast_training +ffffffff820331d0 T dce110_psr_program_secondary_packet +ffffffff82033240 T dce110_is_dig_enabled +ffffffff820332a0 T dce110_link_encoder_validate_dvi_output +ffffffff82033350 T dce110_link_encoder_validate_dp_output +ffffffff82033380 T dce110_link_encoder_construct +ffffffff82033550 T dce110_link_encoder_validate_output_with_stream +ffffffff82033700 T dce110_link_encoder_hw_init +ffffffff82033920 T dce110_link_encoder_destroy +ffffffff82033970 T dce110_link_encoder_setup +ffffffff82033aa0 T dce110_link_encoder_enable_tmds_output +ffffffff82033b90 T dce110_link_encoder_enable_lvds_output +ffffffff82033c80 T dce110_link_encoder_enable_dp_output +ffffffff82033de0 T dce110_link_encoder_enable_dp_mst_output +ffffffff82033f40 T dce110_link_encoder_disable_output +ffffffff82034150 T dce110_link_encoder_dp_set_lane_settings +ffffffff820342f0 T dce110_link_encoder_dp_set_phy_pattern +ffffffff82034af0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff82034d10 T dce110_link_encoder_update_mst_stream_allocation_table +ffffffff82034f80 T dce110_link_encoder_connect_dig_be_to_fe +ffffffff820350b0 T dce110_link_encoder_enable_hpd +ffffffff820350e0 T dce110_link_encoder_disable_hpd +ffffffff82035110 T dce110_link_encoder_get_max_link_cap +ffffffff82036000 T dce_mem_input_construct +ffffffff82036060 T dce112_mem_input_construct +ffffffff820360c0 T dce120_mem_input_construct +ffffffff82036120 t dce_mi_program_display_marks +ffffffff820363f0 t dce_mi_allocate_dmif +ffffffff82036630 t dce_mi_free_dmif +ffffffff82036790 t dce_mi_program_surface_flip_and_addr +ffffffff82036ab0 t dce_mi_program_pte_vm +ffffffff82036c70 t dce_mi_program_surface_config +ffffffff820374f0 t dce_mi_is_flip_pending +ffffffff82037580 t program_nbp_watermark +ffffffff82037780 t dce112_mi_program_display_marks +ffffffff82037c90 t dce120_mi_program_display_marks +ffffffff82038150 t dce120_program_stutter_watermark +ffffffff82039000 T dce110_opp_set_clamping +ffffffff820392b0 T dce110_opp_program_bit_depth_reduction +ffffffff82039a80 T dce110_opp_program_clamping_and_pixel_encoding +ffffffff82039c20 T dce110_opp_set_dyn_expansion +ffffffff82039d70 T dce110_opp_program_fmt +ffffffff82039ef0 T dce110_opp_construct +ffffffff82039f50 T dce110_opp_destroy +ffffffff8203a000 T dce_panel_cntl_construct +ffffffff8203a060 t dce_panel_cntl_destroy +ffffffff8203a0b0 t dce_panel_cntl_hw_init +ffffffff8203a2f0 t dce_is_panel_backlight_on +ffffffff8203a3a0 t dce_is_panel_powered_on +ffffffff8203a450 t dce_store_backlight_level +ffffffff8203a4f0 t dce_driver_set_backlight +ffffffff8203a670 t dce_get_16_bit_backlight_from_pwm +ffffffff8203b000 T get_filter_3tap_16p +ffffffff8203b090 T get_filter_3tap_64p +ffffffff8203b120 T get_filter_4tap_16p +ffffffff8203b1b0 T get_filter_4tap_64p +ffffffff8203b240 T get_filter_5tap_64p +ffffffff8203b2d0 T get_filter_6tap_64p +ffffffff8203b360 T get_filter_7tap_64p +ffffffff8203b3f0 T get_filter_8tap_64p +ffffffff8203b480 T get_filter_2tap_16p +ffffffff8203b4b0 T get_filter_2tap_64p +ffffffff8203c000 T dce110_se_audio_mute_control +ffffffff8203c050 T dce110_se_dp_audio_setup +ffffffff8203c060 t dce110_se_audio_setup +ffffffff8203c1c0 T dce110_se_dp_audio_enable +ffffffff8203c400 T dce110_se_dp_audio_disable +ffffffff8203c560 T dce110_se_hdmi_audio_setup +ffffffff8203ca60 T dce110_se_hdmi_audio_disable +ffffffff8203cac0 T dce110_stream_encoder_construct +ffffffff8203cb10 t dce110_stream_encoder_dp_set_stream_attribute +ffffffff8203d160 t dce110_stream_encoder_hdmi_set_stream_attribute +ffffffff8203d690 t dce110_stream_encoder_dvi_set_stream_attribute +ffffffff8203d7c0 t dce110_stream_encoder_lvds_set_stream_attribute +ffffffff8203d8a0 t dce110_stream_encoder_set_throttled_vcp_size +ffffffff8203daa0 t dce110_stream_encoder_update_hdmi_info_packets +ffffffff8203e190 t dce110_stream_encoder_stop_hdmi_info_packets +ffffffff8203e430 t dce110_stream_encoder_update_dp_info_packets +ffffffff8203e5c0 t dce110_stream_encoder_stop_dp_info_packets +ffffffff8203e730 t dce110_stream_encoder_dp_blank +ffffffff8203e870 t dce110_stream_encoder_dp_unblank +ffffffff8203ea30 t setup_stereo_sync +ffffffff8203eab0 t dce110_stream_encoder_set_avmute +ffffffff8203eaf0 t dig_connect_to_otg +ffffffff8203eb30 t dce110_reset_hdmi_stream_attribute +ffffffff8203ec30 t dig_source_otg +ffffffff8203eca0 t dce110_stream_encoder_set_stream_attribute_helper +ffffffff8203ed90 t dce110_update_generic_info_packet +ffffffff82040000 T dce_transform_get_optimal_number_of_taps +ffffffff82040300 T dce110_opp_set_csc_adjustment +ffffffff820403c0 t program_color_matrix +ffffffff820405f0 T dce110_opp_set_csc_default +ffffffff82040730 T dce110_opp_program_regamma_pwl +ffffffff82040fe0 T dce110_opp_power_on_regamma_lut +ffffffff820410a0 T dce110_opp_set_regamma_mode +ffffffff82041110 T dce_transform_construct +ffffffff82041190 t dce_transform_reset +ffffffff820411d0 t dce_transform_set_scaler +ffffffff82041c70 t dce_transform_set_pixel_storage_depth +ffffffff82042120 t dce_transform_set_gamut_remap +ffffffff82042460 t program_multi_taps_filter +ffffffff82043000 T dmub_abm_create +ffffffff820430d0 T dmub_abm_destroy +ffffffff82043120 t dmub_abm_init_ex +ffffffff82043130 t dmub_abm_set_level_ex +ffffffff820431e0 t dmub_abm_set_backlight_level_pwm_ex +ffffffff82043280 t dmub_abm_get_current_backlight_ex +ffffffff82043290 t dmub_abm_get_target_backlight_ex +ffffffff820432a0 t dmub_abm_init_config_ex +ffffffff82043330 t dmub_abm_set_pause_ex +ffffffff820433d0 t dmub_abm_save_restore_ex +ffffffff82043460 t dmub_abm_set_pipe_ex +ffffffff82044000 T dmub_abm_init +ffffffff820443c0 T dmub_abm_get_current_backlight +ffffffff820443f0 T dmub_abm_get_target_backlight +ffffffff82044420 T dmub_abm_set_level +ffffffff820444b0 T dmub_abm_init_config +ffffffff820445b0 T dmub_abm_set_pause +ffffffff82044650 T dmub_abm_save_restore +ffffffff82044770 T dmub_abm_set_pipe +ffffffff82044810 T dmub_abm_set_backlight_level +ffffffff82045000 T dmub_hw_lock_mgr_cmd +ffffffff820450a0 T dmub_hw_lock_mgr_inbox0_cmd +ffffffff820450e0 T should_use_dmub_lock +ffffffff82046000 T dmub_enable_outbox_notification +ffffffff82047000 T dmub_psr_create +ffffffff82047090 T dmub_psr_destroy +ffffffff820470e0 t dmub_psr_copy_settings +ffffffff820475d0 t dmub_psr_enable +ffffffff82047750 t dmub_psr_get_state +ffffffff82047a60 t dmub_psr_set_level +ffffffff82047b30 t dmub_psr_force_static +ffffffff82047bd0 t dmub_psr_get_residency +ffffffff82047c20 t dmub_psr_set_sink_vtotal_in_psr_active +ffffffff82047cc0 t dmub_psr_set_power_opt +ffffffff82048000 T dmub_replay_create +ffffffff82048090 T dmub_replay_destroy +ffffffff820480e0 t dmub_replay_get_state +ffffffff820481d0 t dmub_replay_enable +ffffffff820483f0 t dmub_replay_copy_settings +ffffffff820486b0 t dmub_replay_set_power_opt +ffffffff82048750 t dmub_replay_set_coasting_vtotal +ffffffff820487e0 t dmub_replay_residency +ffffffff82049000 T dce100_enable_display_power_gating +ffffffff820490a0 T dce100_prepare_bandwidth +ffffffff820490f0 T dce100_optimize_bandwidth +ffffffff82049140 T dce100_hw_sequencer_construct +ffffffff8204a000 T dce100_add_stream_to_ctx +ffffffff8204a0a0 T dce100_validate_plane +ffffffff8204a0e0 T dce100_find_first_free_match_stream_enc_for_link +ffffffff8204a190 T dce100_create_resource_pool +ffffffff8204af60 t dce100_resource_destruct +ffffffff8204b220 t dce100_destroy_resource_pool +ffffffff8204b280 t dce100_panel_cntl_create +ffffffff8204b310 t dce100_link_encoder_create +ffffffff8204b410 t dce100_validate_bandwidth +ffffffff8204b550 t dce100_validate_global +ffffffff8204b5f0 t read_dce_straps +ffffffff8204b660 t create_audio +ffffffff8204b690 t dce100_stream_encoder_create +ffffffff8204b730 t dce100_hwseq_create +ffffffff8204c000 T dce110_compressor_power_up_fbc +ffffffff8204c130 T dce110_compressor_enable_fbc +ffffffff8204c340 T dce110_compressor_is_fbc_enabled_in_hw +ffffffff8204c3f0 T dce110_compressor_disable_fbc +ffffffff8204c6c0 T dce110_compressor_program_compressed_surface_address_and_pitch +ffffffff8204c7e0 T dce110_compressor_set_fbc_invalidation_triggers +ffffffff8204c860 T dce110_compressor_create +ffffffff8204c900 T dce110_compressor_construct +ffffffff8204c980 T dce110_compressor_destroy +ffffffff8204c9d0 T get_max_support_fbc_buffersize +ffffffff8204d000 T dce110_update_info_frame +ffffffff8204d0f0 T dce110_enable_stream +ffffffff8204d190 T dce110_edp_wait_for_hpd_ready +ffffffff8204d3f0 T dce110_edp_power_control +ffffffff8204d950 T dce110_edp_wait_for_T12 +ffffffff8204db00 T dce110_edp_backlight_control +ffffffff8204de60 T dce110_enable_audio_stream +ffffffff8204df20 T dce110_disable_audio_stream +ffffffff8204dfe0 T dce110_disable_stream +ffffffff8204e230 T dce110_unblank_stream +ffffffff8204e330 T dce110_blank_stream +ffffffff8204e4a0 T dce110_set_avmute +ffffffff8204e4f0 T dce110_enable_accelerated_mode +ffffffff8204e8a0 t power_down_all_hw_blocks +ffffffff8204ea70 T dce110_set_safe_displaymarks +ffffffff8204eb90 T dce110_apply_ctx_to_hw +ffffffff8204f490 t enable_fbc +ffffffff8204f650 T dce110_power_down +ffffffff8204f740 T dce110_prepare_bandwidth +ffffffff8204f890 T dce110_optimize_bandwidth +ffffffff8204fa90 T dce110_set_backlight_level +ffffffff8204fba0 T dce110_set_abm_immediate_disable +ffffffff8204fc20 T dce110_set_pipe +ffffffff8204fc90 T dce110_enable_lvds_link_output +ffffffff8204fcf0 T dce110_enable_tmds_link_output +ffffffff8204fd60 T dce110_enable_dp_link_output +ffffffff8204ff90 T dce110_disable_link_output +ffffffff82050080 T dce110_hw_sequencer_construct +ffffffff820500d0 t enable_display_pipe_clock_gating +ffffffff82050100 t build_audio_output +ffffffff82050260 t init_hw +ffffffff82050500 t dce110_power_down_fe +ffffffff820505d0 t dce110_apply_ctx_for_surface +ffffffff82050d10 t dce110_post_unlock_program_front_end +ffffffff82050d40 t update_plane_addr +ffffffff82050db0 t dce110_wait_for_mpcc_disconnect +ffffffff82050de0 t dce110_update_pending_status +ffffffff82050ec0 t get_position +ffffffff82050f50 t dce110_enable_per_frame_crtc_position_reset +ffffffff820511f0 t dce110_enable_timing_synchronization +ffffffff820514e0 t set_drr +ffffffff820515c0 t set_static_screen_control +ffffffff82051690 t dce110_set_cursor_position +ffffffff820517e0 t dce110_set_cursor_attribute +ffffffff820518a0 t program_gamut_remap +ffffffff820519f0 t program_output_csc +ffffffff82051af0 t init_pipes +ffffffff82051b20 t dce110_reset_hw_ctx_wrap +ffffffff82051d70 t dce110_set_input_transfer_func +ffffffff82051f00 t dce110_set_output_transfer_func +ffffffff82052810 t dce110_enable_display_power_gating +ffffffff82052970 t dce110_enable_stream_timing +ffffffff82053000 T dce110_mem_input_v_construct +ffffffff82053040 t dce_mem_input_v_program_display_marks +ffffffff820530c0 t dce_mem_input_program_chroma_display_marks +ffffffff82053140 t dce110_allocate_mem_input_v +ffffffff82053250 t dce110_free_mem_input_v +ffffffff82053280 t dce_mem_input_v_program_surface_flip_and_addr +ffffffff820533d0 t dce_mem_input_v_program_pte_vm +ffffffff820536a0 t dce_mem_input_v_program_surface_config +ffffffff82053a70 t dce_mem_input_v_is_surface_pending +ffffffff82053ae0 t program_urgency_watermark +ffffffff82053bf0 t program_nbp_watermark +ffffffff82053d60 t program_stutter_watermark +ffffffff82054000 T dce110_opp_v_set_csc_default +ffffffff82054300 t program_color_matrix_v +ffffffff82054470 t configure_graphics_mode_v +ffffffff82054560 T dce110_opp_v_set_csc_adjustment +ffffffff82055000 T dce110_opp_program_regamma_pwl_v +ffffffff820554b0 t power_on_lut +ffffffff820555d0 T dce110_opp_power_on_regamma_lut_v +ffffffff82055630 T dce110_opp_set_regamma_mode_v +ffffffff82056000 T dce110_opp_v_construct +ffffffff82057000 T dce110_resource_build_pipe_hw_param +ffffffff82057150 T dce110_find_first_free_match_stream_enc_for_link +ffffffff820571f0 T dce110_create_resource_pool +ffffffff82058190 t dce110_resource_destruct +ffffffff820584b0 t dce110_destroy_resource_pool +ffffffff82058510 t dce110_panel_cntl_create +ffffffff820585a0 t dce110_link_encoder_create +ffffffff820586a0 t dce110_validate_bandwidth +ffffffff82058790 t dce110_validate_global +ffffffff82058870 t dce110_acquire_underlay +ffffffff82058a50 t dce110_validate_plane +ffffffff82058ab0 t dce110_add_stream_to_ctx +ffffffff82058b80 t read_dce_straps +ffffffff82058bf0 t create_audio +ffffffff82058c20 t dce110_stream_encoder_create +ffffffff82058cc0 t dce110_hwseq_create +ffffffff82059000 T dce110_timing_generator_set_early_control +ffffffff82059070 T dce110_timing_generator_enable_crtc +ffffffff82059100 T dce110_timing_generator_program_blank_color +ffffffff82059190 T dce110_timing_generator_disable_crtc +ffffffff820591e0 T dce110_timing_generator_program_timing_generator +ffffffff820593d0 T dce110_timing_generator_set_drr +ffffffff82059510 T dce110_timing_generator_set_static_screen_control +ffffffff820595a0 T dce110_timing_generator_get_vblank_counter +ffffffff82059600 T dce110_timing_generator_get_position +ffffffff820596a0 T dce110_timing_generator_get_crtc_scanoutpos +ffffffff82059790 T dce110_timing_generator_program_blanking +ffffffff82059a00 T dce110_timing_generator_set_test_pattern +ffffffff82059cf0 T dce110_timing_generator_validate_timing +ffffffff82059db0 T dce110_timing_generator_wait_for_vblank +ffffffff82059f20 T dce110_timing_generator_is_counter_moving +ffffffff82059fa0 T dce110_timing_generator_wait_for_vactive +ffffffff8205a080 T dce110_timing_generator_setup_global_swap_lock +ffffffff8205a1e0 T dce110_timing_generator_tear_down_global_swap_lock +ffffffff8205a260 T dce110_timing_generator_enable_advanced_request +ffffffff8205a300 T dce110_timing_generator_set_lock_master +ffffffff8205a360 T dce110_timing_generator_enable_reset_trigger +ffffffff8205a450 T dce110_timing_generator_enable_crtc_reset +ffffffff8205a640 T dce110_timing_generator_disable_reset_trigger +ffffffff8205a730 T dce110_timing_generator_did_triggered_reset_occur +ffffffff8205a7c0 T dce110_timing_generator_disable_vga +ffffffff8205a820 T dce110_timing_generator_set_overscan_color_black +ffffffff8205a8c0 T dce110_tg_program_blank_color +ffffffff8205a980 T dce110_tg_set_overscan_color +ffffffff8205a9e0 T dce110_tg_program_timing +ffffffff8205aa10 T dce110_tg_is_blanked +ffffffff8205aa70 T dce110_tg_set_blank +ffffffff8205aad0 T dce110_tg_validate_timing +ffffffff8205ab90 T dce110_tg_wait_for_state +ffffffff8205ac90 T dce110_tg_set_colors +ffffffff8205ade0 T dce110_arm_vert_intr +ffffffff8205aeb0 T dce110_configure_crc +ffffffff8205b010 t dce110_is_tg_enabled +ffffffff8205b070 T dce110_get_crc +ffffffff8205b140 T dce110_timing_generator_construct +ffffffff8205c000 T dce110_timing_generator_v_construct +ffffffff8205c070 t dce110_timing_generator_v_program_timing +ffffffff8205c340 t dce110_timing_generator_v_enable_crtc +ffffffff8205c3d0 t dce110_timing_generator_v_disable_crtc +ffffffff8205c440 t dce110_timing_generator_v_is_counter_moving +ffffffff8205c4c0 t dce110_timing_generator_v_get_vblank_counter +ffffffff8205c510 t dce110_timing_generator_v_set_early_control +ffffffff8205c570 t dce110_timing_generator_v_wait_for_state +ffffffff8205c700 t dce110_timing_generator_v_set_blank +ffffffff8205c790 t dce110_timing_generator_v_set_overscan_color_black +ffffffff8205c830 t dce110_timing_generator_v_program_blank_color +ffffffff8205c8b0 t dce110_timing_generator_v_set_colors +ffffffff8205c9e0 t dce110_timing_generator_v_disable_vga +ffffffff8205ca10 t dce110_timing_generator_v_did_triggered_reset_occur +ffffffff8205ca50 t dce110_timing_generator_v_setup_global_swap_lock +ffffffff8205ca70 t dce110_timing_generator_v_enable_reset_trigger +ffffffff8205ca90 t dce110_timing_generator_v_disable_reset_trigger +ffffffff8205cab0 t dce110_timing_generator_v_tear_down_global_swap_lock +ffffffff8205cad0 t dce110_timing_generator_v_enable_advanced_request +ffffffff8205d000 T dce110_transform_v_construct +ffffffff8205d060 t dce110_xfmv_reset +ffffffff8205d0c0 t dce110_xfmv_set_scaler +ffffffff8205d800 t dce110_xfmv_set_pixel_storage_depth +ffffffff8205d8e0 t dce110_xfmv_set_gamut_remap +ffffffff8205d910 t program_multi_taps_filter +ffffffff8205dd00 t program_viewport +ffffffff8205e000 T dce112_compressor_power_up_fbc +ffffffff8205e130 T dce112_compressor_enable_fbc +ffffffff8205e2e0 T dce112_compressor_is_fbc_enabled_in_hw +ffffffff8205e390 T dce112_compressor_enable_lpt +ffffffff8205e4b0 t wait_for_fbc_state_changed +ffffffff8205e750 T dce112_compressor_disable_fbc +ffffffff8205e850 T dce112_compressor_disable_lpt +ffffffff8205e9b0 T dce112_compressor_is_lpt_enabled_in_hw +ffffffff8205ea00 T dce112_compressor_program_compressed_surface_address_and_pitch +ffffffff8205eb40 T dce112_compressor_program_lpt_control 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dcn10_init_hw +ffffffff82081eb0 T dcn10_power_down_on_boot +ffffffff82082000 T dcn10_reset_hw_ctx_wrap +ffffffff82082340 T dcn10_update_plane_addr +ffffffff82082460 T dcn10_set_input_transfer_func +ffffffff820825d0 T dcn10_set_output_transfer_func +ffffffff820826a0 T dcn10_pipe_control_lock +ffffffff82082770 T dcn10_cursor_lock +ffffffff82082930 T dcn10_enable_vblanks_synchronization +ffffffff82083110 T dcn10_enable_timing_synchronization +ffffffff82083510 T dcn10_enable_per_frame_crtc_position_reset +ffffffff820836e0 T dcn10_program_gamut_remap +ffffffff820838e0 T dcn10_program_output_csc +ffffffff82083a10 T dcn10_update_visual_confirm_color +ffffffff82083a90 T dcn10_update_mpcc +ffffffff82083d40 T dcn10_blank_pixel_data +ffffffff82083e80 T dcn10_set_hdr_multiplier +ffffffff82083f10 T dcn10_program_pipe +ffffffff82084ab0 T dcn10_wait_for_pending_cleared +ffffffff82084bb0 T dcn10_post_unlock_program_front_end +ffffffff82084e50 T dcn10_prepare_bandwidth +ffffffff82084ff0 T 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hubp2_is_flip_pending +ffffffff820acf50 T hubp2_set_blank +ffffffff820acfb0 T hubp2_set_blank_regs +ffffffff820ad0b0 T hubp2_cursor_set_position +ffffffff820ad520 T hubp2_clk_cntl +ffffffff820ad570 T hubp2_vtg_sel +ffffffff820ad5b0 T hubp2_clear_underflow +ffffffff820ad600 T hubp2_read_state_common +ffffffff820ae250 T hubp2_read_state +ffffffff820ae520 T hubp2_construct +ffffffff820ae590 t hubp2_setup +ffffffff820aea30 t hubp2_validate_dml_output +ffffffff820b0000 T dcn20_set_flip_control_gsl +ffffffff820b0050 T dcn20_enable_power_gating_plane +ffffffff820b04b0 T dcn20_dccg_init +ffffffff820b0530 T dcn20_disable_vga +ffffffff820b05f0 T dcn20_program_triple_buffer +ffffffff820b0640 T dcn20_init_blank +ffffffff820b0850 T dcn20_dsc_pg_control +ffffffff820b0c60 T dcn20_dpp_pg_control +ffffffff820b0f10 T dcn20_hubp_pg_control +ffffffff820b11c0 T dcn20_plane_atomic_disable +ffffffff820b1310 t dcn20_setup_gsl_group_as_lock +ffffffff820b1570 T dcn20_disable_plane +ffffffff820b1650 T dcn20_disable_pixel_data +ffffffff820b1670 T dcn20_blank_pixel_data +ffffffff820b1890 T dcn20_enable_stream_timing +ffffffff820b1e50 T dcn20_program_output_csc +ffffffff820b1f40 T dcn20_set_output_transfer_func +ffffffff820b20c0 T dcn20_set_blend_lut +ffffffff820b2130 T dcn20_set_shaper_3dlut +ffffffff820b21f0 T dcn20_set_input_transfer_func +ffffffff820b23b0 T dcn20_update_odm +ffffffff820b24a0 T dcn20_pipe_control_lock +ffffffff820b27c0 T dcn20_program_front_end_for_ctx +ffffffff820b3470 t dcn20_program_pipe +ffffffff820b3f10 T dcn20_post_unlock_program_front_end +ffffffff820b41e0 T dcn20_prepare_bandwidth +ffffffff820b4350 T dcn20_optimize_bandwidth +ffffffff820b4560 T dcn20_update_bandwidth +ffffffff820b4820 T dcn20_enable_writeback +ffffffff820b4970 T dcn20_disable_writeback +ffffffff820b4a00 T dcn20_wait_for_blank_complete +ffffffff820b4a90 T dcn20_dmdata_status_done +ffffffff820b4ae0 T dcn20_disable_stream_gating +ffffffff820b4b90 T dcn20_enable_stream_gating +ffffffff820b4c30 T dcn20_set_dmdata_attributes +ffffffff820b4cf0 T dcn20_init_vm_ctx +ffffffff820b4db0 T dcn20_init_sys_ctx +ffffffff820b4e60 T dcn20_update_plane_addr +ffffffff820b4fa0 T dcn20_unblank_stream +ffffffff820b5150 T dcn20_setup_vupdate_interrupt +ffffffff820b51c0 T dcn20_reset_hw_ctx_wrap +ffffffff820b5560 T dcn20_update_mpcc +ffffffff820b57c0 T dcn20_enable_stream +ffffffff820b5b20 T dcn20_program_dmdata_engine +ffffffff820b5bc0 T dcn20_fpga_init_hw +ffffffff820b61a0 T dcn20_optimize_timing_for_fsft +ffffffff820b61e0 T dcn20_set_disp_pattern_generator +ffffffff820b7000 T dcn20_hw_sequencer_construct +ffffffff820b8000 T enc2_fec_set_enable +ffffffff820b8090 T enc2_fec_set_ready +ffffffff820b80d0 T enc2_fec_is_active +ffffffff820b8140 T link_enc2_read_state +ffffffff820b81f0 T dcn20_link_encoder_enable_dp_output +ffffffff820b82f0 T dcn20_link_encoder_get_max_link_cap +ffffffff820b83a0 T dcn20_link_encoder_is_in_alt_mode +ffffffff820b8420 T enc2_hw_init +ffffffff820b8500 T dcn20_link_encoder_construct +ffffffff820b9000 T mmhubbub2_config_mcif_irq +ffffffff820b9130 T mmhubbub2_enable_mcif +ffffffff820b9170 T mmhubbub2_disable_mcif +ffffffff820b91b0 T mcifwb2_dump_frame +ffffffff820b92c0 T dcn20_mmhubbub_construct +ffffffff820b9310 t mmhubbub2_config_mcif_buf +ffffffff820b9960 t mmhubbub2_config_mcif_arb +ffffffff820ba000 T mpc2_update_blending +ffffffff820ba2a0 T mpc2_set_denorm +ffffffff820ba310 T mpc2_set_denorm_clamp +ffffffff820ba460 T mpc2_set_output_csc +ffffffff820ba650 T mpc2_set_ocsc_default +ffffffff820ba830 T mpc20_power_on_ogam_lut +ffffffff820ba8b0 T mpc2_set_output_gamma +ffffffff820bb0b0 T mpc2_assert_idle_mpcc +ffffffff820bb1c0 T mpc2_assert_mpcc_idle_before_connect +ffffffff820bb410 T dcn20_mpc_construct +ffffffff820bb4d0 t mpc2_get_mpcc_for_dpp +ffffffff820bc000 T opp2_set_disp_pattern_generator +ffffffff820bc810 T opp2_dpg_set_blank_color +ffffffff820bc990 T opp2_program_dpg_dimensions +ffffffff820bca20 T opp2_dpg_is_blanked +ffffffff820bcae0 T opp2_program_left_edge_extra_pixel +ffffffff820bcb30 T dcn20_opp_construct +ffffffff820bd000 T optc2_enable_crtc +ffffffff820bd100 T optc2_set_gsl +ffffffff820bd1f0 T optc2_set_gsl_source_select +ffffffff820bd2b0 T optc2_set_dsc_config +ffffffff820bd380 T optc2_get_dsc_status +ffffffff820bd3c0 T optc2_is_two_pixels_per_containter +ffffffff820bd3d0 T optc2_set_odm_bypass +ffffffff820bd510 T optc2_set_odm_combine +ffffffff820bd700 T optc2_get_optc_source +ffffffff820bd7d0 T optc2_triplebuffer_lock +ffffffff820bd8f0 T optc2_triplebuffer_unlock +ffffffff820bd9a0 T optc2_lock_doublebuffer_enable +ffffffff820bdb80 T optc2_lock_doublebuffer_disable +ffffffff820bdc60 T optc2_setup_manual_trigger +ffffffff820bddf0 T optc2_program_manual_trigger +ffffffff820bde60 T optc2_configure_crc +ffffffff820bdef0 T optc2_get_last_used_drr_vtotal +ffffffff820bdf30 T dcn20_timing_generator_init +ffffffff820bdfa0 t optc2_set_dwb_source +ffffffff820be040 t optc2_align_vblanks +ffffffff820bf000 T dcn20_dpp_destroy +ffffffff820bf050 T dcn20_dpp_create +ffffffff820bf120 T dcn20_ipp_create +ffffffff820bf1d0 T dcn20_opp_create +ffffffff820bf280 T dcn20_aux_engine_create +ffffffff820bf320 T dcn20_i2c_hw_create +ffffffff820bf3b0 T dcn20_mpc_create +ffffffff820bf440 T dcn20_hubbub_create +ffffffff820bf510 T dcn20_timing_generator_create +ffffffff820bf5a0 T dcn20_link_encoder_create +ffffffff820bf6a0 T dcn20_stream_encoder_create +ffffffff820bf760 T dcn20_hwseq_create +ffffffff820bf7d0 T dcn20_clock_source_destroy +ffffffff820bf820 T dcn20_dsc_create +ffffffff820bf8e0 T dcn20_dsc_destroy +ffffffff820bf930 T dcn20_hubp_create +ffffffff820bfa00 T dcn20_build_mapped_resource +ffffffff820bfc20 T dcn20_acquire_dsc +ffffffff820bfd60 T dcn20_release_dsc +ffffffff820bfdd0 T dcn20_add_dsc_to_stream_resource +ffffffff820bff40 T dcn20_add_stream_to_ctx +ffffffff820bffd0 T dcn20_remove_stream_from_ctx +ffffffff820c00c0 T dcn20_split_stream_for_odm +ffffffff820c0570 T dcn20_split_stream_for_mpc +ffffffff820c06f0 T dcn20_calc_max_scaled_time +ffffffff820c0760 T dcn20_set_mcif_arb_params +ffffffff820c08d0 T dcn20_validate_dsc +ffffffff820c0a80 T dcn20_find_secondary_pipe +ffffffff820c0c60 T dcn20_merge_pipes_for_validate +ffffffff820c0ed0 T dcn20_validate_apply_pipe_split_flags +ffffffff820c1760 T dcn20_fast_validate_bw +ffffffff820c1cb0 T dcn20_validate_bandwidth +ffffffff820c1d30 T dcn20_acquire_free_pipe_for_layer +ffffffff820c1e50 T dcn20_get_dcc_compression_cap +ffffffff820c1e80 T dcn20_patch_unknown_plane_state +ffffffff820c1ee0 T dcn20_dwbc_create +ffffffff820c1ff0 T dcn20_mmhubbub_create +ffffffff820c2150 T dcn20_create_resource_pool +ffffffff820c38f0 t dcn20_resource_destruct +ffffffff820c3da0 t dcn20_destroy_resource_pool +ffffffff820c3e00 t dcn20_panel_cntl_create +ffffffff820c3e90 t read_dce_straps +ffffffff820c3ec0 t dcn20_create_audio +ffffffff820c4000 T enc2_set_dynamic_metadata +ffffffff820c4260 T enc2_stream_encoder_dp_unblank +ffffffff820c45a0 T enc2_stream_encoder_dp_set_stream_attribute +ffffffff820c4600 T enc2_get_fifo_cal_average_level +ffffffff820c4660 T dcn20_stream_encoder_construct +ffffffff820c46c0 t enc2_stream_encoder_update_hdmi_info_packets +ffffffff820c4790 t enc2_stream_encoder_stop_hdmi_info_packets +ffffffff820c4aa0 t enc2_stream_encoder_update_dp_info_packets_sdp_line_num +ffffffff820c4b60 t enc2_stream_encoder_update_dp_info_packets +ffffffff820c4c10 t enc2_read_state +ffffffff820c4d90 t enc2_dp_set_dsc_config +ffffffff820c4e60 t enc2_dp_set_dsc_pps_info_packet +ffffffff820c5330 t enc2_dp_set_odm_combine +ffffffff820c5370 t enc2_update_hdmi_info_packet +ffffffff820c6000 T dcn20_vmid_setup +ffffffff820c7000 T dccg201_create +ffffffff820c70b0 t dccg201_update_dpp_dto +ffffffff820c8000 T dpp201_construct +ffffffff820c8080 t dpp201_get_optimal_number_of_taps +ffffffff820c8440 t dpp201_cnv_setup +ffffffff820c9000 T hubbub201_construct +ffffffff820c9060 t hubbub201_program_watermarks +ffffffff820ca000 T dcn201_hubp_construct +ffffffff820ca070 t hubp201_setup +ffffffff820ca350 t hubp201_program_surface_config +ffffffff820cb000 T dcn201_update_plane_addr +ffffffff820cb2a0 T dcn201_init_blank +ffffffff820cb3e0 T dcn201_init_hw +ffffffff820cbbb0 T dcn201_plane_atomic_disconnect +ffffffff820cbd20 T dcn201_update_mpcc +ffffffff820cbfb0 T dcn201_pipe_control_lock +ffffffff820cc0b0 T dcn201_set_cursor_attribute +ffffffff820cc140 T dcn201_set_dmdata_attributes +ffffffff820cc250 T dcn201_unblank_stream +ffffffff820cd000 T dcn201_hw_sequencer_construct +ffffffff820ce000 T dcn201_link_encoder_construct +ffffffff820ce190 t dcn201_link_encoder_is_in_alt_mode +ffffffff820ce200 t dcn201_link_encoder_get_max_link_cap +ffffffff820cf000 T dcn201_mpc_construct +ffffffff820cf0c0 t mpc201_set_out_rate_control +ffffffff820d0000 T dcn201_opp_construct +ffffffff820d1000 T optc201_is_two_pixels_per_containter +ffffffff820d1010 T dcn201_timing_generator_init +ffffffff820d1080 t optc201_validate_timing +ffffffff820d1180 t optc201_triplebuffer_unlock +ffffffff820d1230 t optc201_triplebuffer_lock +ffffffff820d1350 t optc201_get_optc_source +ffffffff820d2000 T dcn201_create_resource_pool +ffffffff820d2a30 t dcn201_resource_destruct +ffffffff820d2d30 t dcn201_destroy_resource_pool +ffffffff820d2d90 t dcn201_link_init +ffffffff820d2de0 t dcn201_link_encoder_create +ffffffff820d2e90 t dcn201_acquire_free_pipe_for_layer +ffffffff820d2fa0 t dcn201_populate_dml_writeback_from_context +ffffffff820d3000 t read_dce_straps +ffffffff820d3030 t dcn201_create_audio +ffffffff820d3060 t dcn201_stream_encoder_create +ffffffff820d3100 t dcn201_hwseq_create +ffffffff820d3170 t dcn201_get_dcc_compression_cap +ffffffff820d4000 T dccg21_create +ffffffff820d40b0 t dccg21_update_dpp_dto +ffffffff820d5000 T dcn21_dchvm_init +ffffffff820d5200 T hubbub21_init_dchub +ffffffff820d53d0 T hubbub21_program_urgent_watermarks +ffffffff820d5bf0 T hubbub21_program_stutter_watermarks +ffffffff820d60e0 T hubbub21_program_pstate_watermarks +ffffffff820d6380 T hubbub21_program_watermarks +ffffffff820d64e0 T hubbub21_wm_read_state +ffffffff820d6780 T hubbub21_construct +ffffffff820d67e0 t hubbub21_apply_DEDCN21_147_wa +ffffffff820d7000 T apply_DEDCN21_142_wa_for_hostvm_deadline +ffffffff820d72e0 T hubp21_program_deadline +ffffffff820d7310 T hubp21_program_requestor +ffffffff820d76b0 T hubp21_construct +ffffffff820d7720 t hubp21_setup +ffffffff820d7780 t hubp21_set_viewport +ffffffff820d7a80 t hubp21_program_surface_flip_and_addr +ffffffff820d8370 t hubp21_set_vm_system_aperture_settings +ffffffff820d84a0 t hubp21_init +ffffffff820d84d0 t hubp21_validate_dml_output +ffffffff820da000 T dcn21_init_sys_ctx +ffffffff820da110 T dcn21_s0i3_golden_init_wa +ffffffff820da170 T dcn21_exit_optimized_pwr_state +ffffffff820da190 T dcn21_optimize_pwr_state +ffffffff820da1c0 T dcn21_PLAT_58856_wa +ffffffff820da260 T dcn21_set_abm_immediate_disable +ffffffff820da390 T dcn21_set_pipe +ffffffff820da4b0 T dcn21_set_backlight_level +ffffffff820da6a0 T dcn21_is_abm_supported +ffffffff820db000 T dcn21_hw_sequencer_construct +ffffffff820dc000 T dcn21_link_encoder_enable_dp_output +ffffffff820dc140 t dcn21_link_encoder_acquire_phy +ffffffff820dc320 T dcn21_link_encoder_construct +ffffffff820dc500 t dcn21_link_encoder_enable_dp_mst_output +ffffffff820dc570 t dcn21_link_encoder_disable_output +ffffffff820dd000 T dcn21_fast_validate_bw +ffffffff820dd6a0 T dcn21_create_resource_pool +ffffffff820de9d0 t dcn21_resource_destruct +ffffffff820dee70 t dcn21_destroy_resource_pool +ffffffff820deed0 t dcn21_panel_cntl_create +ffffffff820def60 t dcn21_link_encoder_create +ffffffff820df060 t dcn21_validate_bandwidth +ffffffff820df0e0 t dcn21_patch_unknown_plane_state +ffffffff820df130 t dcn21_get_panel_config_defaults +ffffffff820df170 t read_dce_straps +ffffffff820df1a0 t dcn21_create_audio +ffffffff820df1d0 t dcn21_stream_encoder_create +ffffffff820df270 t dcn21_hwseq_create +ffffffff820e0000 T afmt3_setup_hdmi_audio +ffffffff820e01d0 T afmt3_se_audio_setup +ffffffff820e0370 T afmt3_audio_mute_control +ffffffff820e03e0 T afmt3_audio_info_immediate_update +ffffffff820e0420 T afmt3_setup_dp_audio +ffffffff820e0510 T afmt3_construct +ffffffff820e1000 T cm_helper_program_gamcor_xfer_func +ffffffff820e13c0 T cm3_helper_translate_curve_to_hw_format +ffffffff820e1fd0 T cm3_helper_convert_to_custom_float +ffffffff820e2420 T cm3_helper_translate_curve_to_degamma_hw_format +ffffffff820e2c40 T is_rgb_equal +ffffffff820e3000 T dccg3_create +ffffffff820e30b0 T dccg30_create +ffffffff820e4000 T dcn30_link_encoder_validate_output_with_stream +ffffffff820e4010 T dcn30_link_encoder_construct +ffffffff820e41f0 T enc3_hw_init +ffffffff820e5000 T enc3_stream_encoder_update_hdmi_info_packets +ffffffff820e5100 t enc3_update_hdmi_info_packet +ffffffff820e54f0 T enc3_stream_encoder_stop_hdmi_info_packets +ffffffff820e5ad0 T enc3_dp_set_dsc_pps_info_packet +ffffffff820e5df0 T enc3_stream_encoder_update_dp_info_packets_sdp_line_num +ffffffff820e5eb0 T enc3_stream_encoder_update_dp_info_packets +ffffffff820e6170 T enc3_audio_mute_control +ffffffff820e61e0 T enc3_se_dp_audio_setup +ffffffff820e6260 T enc3_se_dp_audio_enable +ffffffff820e6350 T enc3_se_hdmi_audio_setup +ffffffff820e6660 T dcn30_dio_stream_encoder_construct +ffffffff820e66d0 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff820e6cd0 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff820e6ed0 t enc3_read_state +ffffffff820e7060 t enc3_dp_set_dsc_config +ffffffff820e7130 t enc3_dp_set_odm_combine +ffffffff820e8000 T dpp30_read_state +ffffffff820e8050 T dpp3_program_post_csc +ffffffff820e8240 T dpp3_set_pre_degam +ffffffff820e82f0 T dpp3_cnv_setup +ffffffff820e8bc0 T dpp3_set_cursor_attributes +ffffffff820e8d30 T dpp3_get_optimal_number_of_taps +ffffffff820e9750 T dpp3_construct +ffffffff820e97b0 t dpp3_deferred_update +ffffffff820e9b90 t dpp3_program_blnd_lut +ffffffff820ea5e0 t dpp3_program_shaper +ffffffff820ec660 t dpp3_program_3dlut +ffffffff820ece10 t dpp3_set3dlut_ram12 +ffffffff820ed000 T dpp3_program_cm_dealpha +ffffffff820ed0a0 T dpp3_program_cm_bias +ffffffff820ed190 T dpp3_program_gamcor_lut +ffffffff820edbb0 t dpp3_power_on_gamcor_lut +ffffffff820edce0 T dpp3_set_hdr_multiplier +ffffffff820edd30 T dpp3_cm_set_gamut_remap +ffffffff820ee000 T dwb3_config_fc +ffffffff820ee1b0 T dwb3_set_stereo +ffffffff820ee270 T dwb3_enable +ffffffff820ee3a0 T dwb3_set_denorm +ffffffff820ee4c0 T dwb3_disable +ffffffff820ee570 T dwb3_update +ffffffff820ee6a0 T dwb3_is_enabled +ffffffff820ee740 T dwb3_set_new_content +ffffffff820ee780 T dcn30_dwbc_construct +ffffffff820ee7d0 T dwb3_set_host_read_rate_control +ffffffff820ee840 t dwb3_get_caps +ffffffff820ef000 T dwb3_ogam_set_input_transfer_func +ffffffff820ef9f0 T dwb3_set_gamut_remap +ffffffff820efca0 T dwb3_program_hdr_mult +ffffffff820f0000 T hubbub3_init_dchub_sys_ctx +ffffffff820f01c0 T hubbub3_program_watermarks +ffffffff820f02c0 T hubbub3_dcc_support_swizzle +ffffffff820f0380 T hubbub3_get_dcc_compression_cap +ffffffff820f0560 T hubbub3_force_wm_propagate_to_pipes +ffffffff820f0610 T hubbub3_force_pstate_change_control +ffffffff820f0690 T hubbub3_init_watermarks +ffffffff820f09d0 T hubbub3_construct +ffffffff820f1000 T hubp3_set_vm_system_aperture_settings +ffffffff820f1130 T hubp3_program_surface_flip_and_addr +ffffffff820f1b20 T hubp3_dcc_control +ffffffff820f1be0 T hubp3_dcc_control_sienna_cichlid +ffffffff820f1d00 T hubp3_dmdata_set_attributes +ffffffff820f1f00 T hubp3_program_surface_config +ffffffff820f21f0 T hubp3_read_state +ffffffff820f24c0 T hubp3_setup +ffffffff820f2550 T hubp3_init +ffffffff820f2580 T hubp3_construct +ffffffff820f3000 T dcn30_set_blend_lut +ffffffff820f3070 T dcn30_set_input_transfer_func +ffffffff820f31d0 T dcn30_set_output_transfer_func +ffffffff820f3500 T dcn30_update_writeback +ffffffff820f3590 t dcn30_set_writeback +ffffffff820f3740 T dcn30_mmhubbub_warmup +ffffffff820f3990 T dcn30_enable_writeback +ffffffff820f3a40 T dcn30_disable_writeback +ffffffff820f3b20 T dcn30_program_all_writeback_pipes_in_tree +ffffffff820f3e20 T dcn30_init_hw +ffffffff820f4550 T dcn30_set_avmute +ffffffff820f45b0 T dcn30_update_info_frame +ffffffff820f46a0 T dcn30_program_dmdata_engine +ffffffff820f4740 T dcn30_apply_idle_power_optimizations +ffffffff820f4c60 T dcn30_does_plane_fit_in_mall +ffffffff820f4d10 T dcn30_hardware_release +ffffffff820f4e00 T dcn30_set_disp_pattern_generator +ffffffff820f4e70 T dcn30_prepare_bandwidth +ffffffff820f4f60 T dcn30_set_static_screen_control +ffffffff820f5000 T dcn30_hw_sequencer_construct +ffffffff820f6000 T dcn30_mmhubbub_construct +ffffffff820f6050 t mmhubbub3_warmup_mcif +ffffffff820f6260 t mmhubbub3_config_mcif_buf +ffffffff820f6710 t mmhubbub3_config_mcif_arb +ffffffff820f7000 T mpc3_is_dwb_idle +ffffffff820f7070 T mpc3_set_dwb_mux +ffffffff820f70f0 T mpc3_disable_dwb_mux +ffffffff820f7170 T mpc3_set_out_rate_control +ffffffff820f7280 T mpc3_get_ogam_current +ffffffff820f7320 T mpc3_power_on_ogam_lut +ffffffff820f73f0 T mpc3_set_output_gamma +ffffffff820f8030 T mpc3_set_denorm +ffffffff820f80a0 T mpc3_set_denorm_clamp +ffffffff820f81f0 T mpc3_program_shaper +ffffffff820fa3b0 t mpc3_power_on_shaper_3dlut +ffffffff820fa730 T mpc3_init_mpcc +ffffffff820fa7b0 T mpc3_set_gamut_remap +ffffffff820faa20 T mpc3_program_3dlut +ffffffff820fb190 t mpc3_set3dlut_ram12 +ffffffff820fb370 T mpc3_set_output_csc +ffffffff820fb4e0 T mpc3_set_ocsc_default +ffffffff820fb650 T mpc3_set_rmu_mux +ffffffff820fb6f0 T mpc3_get_rmu_mux_status +ffffffff820fb7a0 T mpcc3_acquire_rmu +ffffffff820fb900 T dcn30_mpc_construct +ffffffff820fb9d0 t mpcc3_release_rmu +ffffffff820fbb40 t mpc3_set_mpc_mem_lp_mode +ffffffff820fc000 T optc3_triplebuffer_lock +ffffffff820fc120 T optc3_lock_doublebuffer_enable +ffffffff820fc3b0 T optc3_lock_doublebuffer_disable +ffffffff820fc4d0 T optc3_lock +ffffffff820fc5a0 T optc3_set_out_mux +ffffffff820fc5e0 T optc3_program_blank_color +ffffffff820fc710 T optc3_set_drr_trigger_window +ffffffff820fc7a0 T optc3_set_vtotal_change_limit +ffffffff820fc810 T optc3_set_dsc_config +ffffffff820fc860 T optc3_set_odm_bypass +ffffffff820fc9e0 T optc3_set_odm_combine +ffffffff820fcd30 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff820fcdb0 T optc3_set_vtotal_min_max +ffffffff820fcdf0 T optc3_tg_init +ffffffff820fce50 T dcn30_timing_generator_init +ffffffff820fd000 T dcn30_add_stream_to_ctx +ffffffff820fd020 T dcn30_populate_dml_pipes_from_context +ffffffff820fd100 T dcn30_populate_dml_writeback_from_context +ffffffff820fd160 T dcn30_calc_max_scaled_time +ffffffff820fd1c0 T dcn30_set_mcif_arb_params +ffffffff820fd330 T dcn30_acquire_post_bldn_3dlut +ffffffff820fd4c0 T dcn30_release_post_bldn_3dlut +ffffffff820fd570 T dcn30_internal_validate_bw +ffffffff820fe2e0 t dcn30_split_stream_for_mpc_or_odm +ffffffff820fe600 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff820fe6e0 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff820fe780 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff820fe820 T dcn30_update_soc_for_wm_a +ffffffff820fe870 T dcn30_calculate_wm_and_dlg +ffffffff820fe8e0 T dcn30_validate_bandwidth +ffffffff820fed10 T dcn30_update_bw_bounding_box +ffffffff820ff370 T dcn30_create_resource_pool +ffffffff82100920 t dcn30_resource_destruct +ffffffff82100ea0 t dcn30_destroy_resource_pool +ffffffff82100f00 t dcn30_panel_cntl_create +ffffffff82100f90 t dcn30_link_encoder_create +ffffffff82101040 t dcn30_get_panel_config_defaults +ffffffff821010c0 t read_dce_straps +ffffffff821010f0 t dcn30_create_audio +ffffffff82101120 t dcn30_stream_encoder_create +ffffffff821012a0 t dcn30_hwseq_create +ffffffff82102000 T vpg3_update_generic_info_packet +ffffffff821029a0 T vpg3_construct +ffffffff82103000 T dccg301_create +ffffffff82104000 T dcn301_link_encoder_construct +ffffffff82105000 T hubbub301_construct +ffffffff82106000 T dcn301_hw_sequencer_construct +ffffffff82107000 T optc301_set_drr +ffffffff82107230 T optc301_setup_manual_trigger +ffffffff82107350 T dcn301_timing_generator_init +ffffffff82108000 T dcn301_panel_cntl_construct +ffffffff82108050 t dcn301_panel_cntl_destroy +ffffffff821080a0 t dcn301_panel_cntl_hw_init +ffffffff821082b0 t dcn301_is_panel_backlight_on +ffffffff82108310 t dcn301_is_panel_powered_on +ffffffff821083c0 t dcn301_store_backlight_level +ffffffff82108460 t dcn301_get_16_bit_backlight_from_pwm +ffffffff82109000 T dcn301_create_resource_pool +ffffffff8210a590 t dcn301_destruct +ffffffff8210aad0 t dcn301_destroy_resource_pool +ffffffff8210ab30 t dcn301_panel_cntl_create +ffffffff8210abc0 t dcn301_link_encoder_create +ffffffff8210ac70 t dcn301_calculate_wm_and_dlg +ffffffff8210ace0 t read_dce_straps +ffffffff8210ad10 t dcn301_create_audio +ffffffff8210ad40 t dcn301_stream_encoder_create +ffffffff8210aec0 t dcn301_hwseq_create +ffffffff8210b000 T dcn302_dpp_pg_control +ffffffff8210b2a0 T dcn302_hubp_pg_control +ffffffff8210b550 T dcn302_dsc_pg_control +ffffffff8210c000 T dcn302_hw_sequencer_construct +ffffffff8210d000 T dcn302_update_bw_bounding_box +ffffffff8210d050 T dcn302_create_resource_pool +ffffffff8210e4a0 t dcn302_resource_destruct +ffffffff8210e9e0 t dcn302_destroy_resource_pool +ffffffff8210ea30 t dcn302_panel_cntl_create +ffffffff8210eac0 t dcn302_link_encoder_create +ffffffff8210eb70 t dcn302_get_panel_config_defaults +ffffffff8210ebf0 t read_dce_straps +ffffffff8210ec20 t dcn302_create_audio +ffffffff8210ec50 t dcn302_stream_encoder_create +ffffffff8210edd0 t dcn302_hwseq_create +ffffffff8210f000 T dcn303_dpp_pg_control +ffffffff8210f030 T dcn303_hubp_pg_control +ffffffff8210f060 T dcn303_dsc_pg_control +ffffffff8210f090 T dcn303_enable_power_gating_plane +ffffffff82110000 T dcn303_hw_sequencer_construct +ffffffff82111000 T dcn303_update_bw_bounding_box +ffffffff82111050 T dcn303_create_resource_pool +ffffffff821122a0 t dcn303_resource_destruct +ffffffff821127e0 t dcn303_destroy_resource_pool +ffffffff82112830 t dcn303_panel_cntl_create +ffffffff821128c0 t dcn303_link_encoder_create +ffffffff82112970 t dcn303_get_panel_config_defaults +ffffffff821129f0 t read_dce_straps +ffffffff82112a20 t dcn303_create_audio +ffffffff82112a50 t dcn303_stream_encoder_create +ffffffff82112bd0 t dcn303_hwseq_create +ffffffff82113000 T afmt31_powerdown +ffffffff82113090 T afmt31_poweron +ffffffff82113120 T afmt31_construct +ffffffff82114000 T apg31_construct +ffffffff82114050 t apg31_se_audio_setup +ffffffff82114160 t apg31_enable +ffffffff82114270 t apg31_disable +ffffffff82115000 T dccg31_update_dpp_dto +ffffffff82115160 T dccg31_set_dpstreamclk +ffffffff821152f0 t dccg31_disable_dpstreamclk +ffffffff82115440 T dccg31_enable_symclk32_se +ffffffff82115740 T dccg31_disable_symclk32_se +ffffffff82115a10 T dccg31_enable_symclk32_le +ffffffff82115b20 T dccg31_disable_symclk32_le +ffffffff82115c10 T dccg31_set_symclk32_le_root_clock_gating +ffffffff82115d20 T dccg31_disable_dscclk +ffffffff82115f70 T dccg31_enable_dscclk +ffffffff821161e0 T dccg31_set_physymclk +ffffffff821166f0 T dccg31_set_dtbclk_dto +ffffffff821169a0 T dccg31_set_audio_dtbclk_dto +ffffffff82116ab0 T dccg31_get_dccg_ref_freq +ffffffff82116ae0 T dccg31_set_dispclk_change_mode +ffffffff82116b30 T dccg31_init +ffffffff82117110 T dccg31_otg_add_pixel +ffffffff82117150 T dccg31_otg_drop_pixel +ffffffff82117190 T dccg31_create +ffffffff82118000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff82118390 T dcn31_link_encoder_construct +ffffffff82118560 T dcn31_link_encoder_construct_minimal +ffffffff821185e0 T dcn31_link_encoder_enable_dp_output +ffffffff82118820 T dcn31_link_encoder_enable_dp_mst_output +ffffffff82118a60 T dcn31_link_encoder_disable_output +ffffffff82118cd0 T dcn31_link_encoder_is_in_alt_mode +ffffffff82118e20 T dcn31_link_encoder_get_max_link_cap +ffffffff82118fa0 t enc31_hw_init +ffffffff82119000 T dcn31_hpo_dp_link_enc_enable +ffffffff82119160 T dcn31_hpo_dp_link_enc_disable +ffffffff821191d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff82119b30 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff82119db0 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff8211a050 T dcn31_hpo_dp_link_enc_read_state +ffffffff8211a2f0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff8211a3f0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff8211a530 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff8211a620 T hpo_dp_link_encoder31_construct +ffffffff8211a680 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff8211b000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff8211b070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff8211b1b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff8211b460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff8211b560 t dcn31_hpo_dp_stream_enc_disable +ffffffff8211b5d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff8211be80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num +ffffffff8211bf40 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff8211c160 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff8211c2f0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff8211c590 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff8211c690 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff8211c740 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff8211c810 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff8211c9c0 t dcn31_hpo_dp_stream_enc_read_state +ffffffff8211cb50 t dcn31_set_hblank_min_symbol_width +ffffffff8211d000 T hubbub31_init_dchub_sys_ctx +ffffffff8211d1e0 T hubbub31_init +ffffffff8211d280 T hubbub31_construct +ffffffff8211d320 t hubbub31_get_dcc_compression_cap +ffffffff8211d500 t hubbub31_get_dchub_ref_freq +ffffffff8211d5e0 t hubbub31_program_watermarks +ffffffff8211ef00 t hubbub31_verify_allow_pstate_change_high +ffffffff8211f0c0 t dcn31_program_det_size +ffffffff8211f2a0 t dcn31_program_compbuf_size +ffffffff8211f520 t dcn31_init_crb +ffffffff82120000 T hubp31_set_unbounded_requesting +ffffffff82120090 T hubp31_soft_reset +ffffffff821200e0 T hubp31_construct +ffffffff82120150 t hubp31_program_extended_blank +ffffffff82121000 T dcn31_init_hw +ffffffff82121850 T dcn31_dsc_pg_control +ffffffff82121ba0 T dcn31_enable_power_gating_plane +ffffffff82121e00 T dcn31_update_info_frame +ffffffff82121f30 T dcn31_z10_save_init +ffffffff82121fc0 T dcn31_z10_restore +ffffffff82122070 T dcn31_hubp_pg_control +ffffffff82122390 T dcn31_init_sys_ctx +ffffffff82122440 T dcn31_reset_hw_ctx_wrap +ffffffff82122790 T dcn31_setup_hpo_hw_control +ffffffff82123000 T dcn31_hw_sequencer_construct +ffffffff82124000 T optc31_immediate_disable_crtc +ffffffff82124100 T optc31_set_drr +ffffffff82124310 T optc3_init_odm +ffffffff82124480 T dcn31_timing_generator_init +ffffffff821244f0 t optc31_enable_crtc +ffffffff821245f0 t optc31_disable_crtc +ffffffff821246d0 t optc31_set_odm_combine +ffffffff82125000 T dcn31_panel_cntl_construct +ffffffff82125040 t dcn31_panel_cntl_destroy +ffffffff82125090 t dcn31_panel_cntl_hw_init +ffffffff82125190 t dcn31_is_panel_backlight_on +ffffffff82125230 t dcn31_is_panel_powered_on +ffffffff821252e0 t dcn31_store_backlight_level +ffffffff821253b0 t dcn31_get_16_bit_backlight_from_pwm +ffffffff82126000 T dcn31x_populate_dml_pipes_from_context +ffffffff82126180 T dcn31_populate_dml_pipes_from_context +ffffffff821265c0 T dcn31_calculate_wm_and_dlg +ffffffff82126630 T dcn31_populate_dml_writeback_from_context +ffffffff82126690 T dcn31_set_mcif_arb_params +ffffffff821266f0 T dcn31_validate_bandwidth +ffffffff82126ae0 T dcn31_create_resource_pool +ffffffff82127e80 t dcn31_resource_destruct +ffffffff821284f0 t dcn31_destroy_resource_pool +ffffffff82128550 t dcn31_panel_cntl_create +ffffffff821285c0 t dcn31_link_encoder_create +ffffffff82128670 t dcn31_link_enc_create_minimal +ffffffff82128710 t dcn31_get_panel_config_defaults +ffffffff82128750 t read_dce_straps +ffffffff82128780 t dcn31_create_audio +ffffffff821287b0 t dcn31_stream_encoder_create +ffffffff82128930 t dcn31_hpo_dp_stream_encoder_create +ffffffff82128af0 t dcn31_hpo_dp_link_encoder_create +ffffffff82128b80 t dcn31_hwseq_create +ffffffff82129000 T vpg31_powerdown +ffffffff82129090 T vpg31_poweron +ffffffff82129120 T vpg31_construct +ffffffff8212a000 T dccg314_create +ffffffff8212a0b0 t dccg314_init +ffffffff8212a210 t dccg314_set_dpstreamclk +ffffffff8212a5d0 t dccg314_set_dtbclk_dto +ffffffff8212a7c0 t dccg314_set_pixel_rate_div +ffffffff8212ab30 t dccg314_set_valid_pixel_rate +ffffffff8212aba0 t dccg314_trigger_dio_fifo_resync +ffffffff8212ac40 t dccg314_dpp_root_clock_control +ffffffff8212b000 T dcn314_dio_stream_encoder_construct +ffffffff8212b070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff8212b670 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff8212b880 t enc314_stream_encoder_dp_blank +ffffffff8212b900 t enc314_stream_encoder_dp_unblank +ffffffff8212bc80 t enc314_read_state +ffffffff8212bde0 t enc314_dp_set_dsc_config +ffffffff8212be30 t enc314_dp_set_odm_combine +ffffffff8212be70 t enc314_set_dig_input_mode +ffffffff8212bec0 t enc314_enable_fifo +ffffffff8212bf60 t enc314_disable_fifo +ffffffff8212bfb0 t enc314_reset_fifo +ffffffff8212d000 T dcn314_update_odm +ffffffff8212d600 T dcn314_dsc_pg_control +ffffffff8212d9d0 T dcn314_enable_power_gating_plane +ffffffff8212dc60 T dcn314_calculate_dccg_k1_k2_values +ffffffff8212de10 T dcn314_set_pixels_per_cycle +ffffffff8212df00 T dcn314_resync_fifo_dccg_dio +ffffffff8212e0a0 T dcn314_dpp_root_clock_control +ffffffff8212e100 T dcn314_disable_link_output +ffffffff8212f000 T dcn314_hw_sequencer_construct +ffffffff82130000 T dcn314_timing_generator_init +ffffffff82130070 t optc314_enable_crtc +ffffffff82130170 t optc314_disable_crtc +ffffffff82130250 t optc314_phantom_crtc_post_enable +ffffffff82130310 t optc314_set_odm_bypass +ffffffff82130480 t optc314_set_odm_combine +ffffffff82130770 t optc314_set_h_timing_div_manual_mode +ffffffff82131000 T dcn314_validate_bandwidth +ffffffff82131490 T dcn314_create_resource_pool +ffffffff821327b0 t dcn314_resource_destruct +ffffffff82132e20 t dcn314_get_preferred_eng_id_dpia +ffffffff82132e50 t dcn314_destroy_resource_pool +ffffffff82132eb0 t dcn31_panel_cntl_create +ffffffff82132f20 t dcn31_link_encoder_create +ffffffff82132fd0 t dcn31_link_enc_create_minimal +ffffffff82133070 t dcn314_populate_dml_pipes_from_context +ffffffff82133100 t dcn314_update_bw_bounding_box +ffffffff82133150 t dcn314_get_panel_config_defaults +ffffffff82133190 t read_dce_straps +ffffffff821331c0 t dcn31_create_audio +ffffffff821331f0 t dcn314_stream_encoder_create +ffffffff82133370 t dcn31_hpo_dp_stream_encoder_create +ffffffff82133530 t dcn31_hpo_dp_link_encoder_create +ffffffff821335c0 t dcn314_hwseq_create +ffffffff82134000 T dcn315_create_resource_pool +ffffffff82135280 t dcn315_resource_destruct +ffffffff821358e0 t dcn315_destroy_resource_pool +ffffffff82135940 t dcn31_panel_cntl_create +ffffffff821359b0 t dcn31_link_encoder_create +ffffffff82135a60 t dcn31_link_enc_create_minimal +ffffffff82135b00 t dcn315_populate_dml_pipes_from_context +ffffffff82136200 t dcn315_get_panel_config_defaults +ffffffff82136240 t read_dce_straps +ffffffff82136270 t dcn31_create_audio +ffffffff821362a0 t dcn315_stream_encoder_create +ffffffff82136420 t dcn31_hpo_dp_stream_encoder_create +ffffffff821365e0 t dcn31_hpo_dp_link_encoder_create +ffffffff82136670 t dcn31_hwseq_create +ffffffff82137000 T dcn316_create_resource_pool +ffffffff82138290 t dcn316_resource_destruct +ffffffff821388f0 t dcn316_destroy_resource_pool +ffffffff82138950 t dcn31_panel_cntl_create +ffffffff821389c0 t dcn31_link_encoder_create +ffffffff82138a70 t dcn31_link_enc_create_minimal +ffffffff82138b10 t dcn316_populate_dml_pipes_from_context +ffffffff82138e40 t dcn316_get_panel_config_defaults +ffffffff82138e80 t read_dce_straps +ffffffff82138eb0 t dcn31_create_audio +ffffffff82138ee0 t dcn316_stream_encoder_create +ffffffff82139060 t dcn31_hpo_dp_stream_encoder_create +ffffffff82139220 t dcn31_hpo_dp_link_encoder_create +ffffffff821392b0 t dcn31_hwseq_create +ffffffff8213a000 T dccg32_create +ffffffff8213a0b0 t dccg32_get_dccg_ref_freq +ffffffff8213a0e0 t dccg32_otg_add_pixel +ffffffff8213a120 t dccg32_otg_drop_pixel +ffffffff8213a160 t dccg32_set_dpstreamclk +ffffffff8213a4a0 t dccg32_set_dtbclk_dto +ffffffff8213a6a0 t dccg32_set_pixel_rate_div +ffffffff8213aa10 t dccg32_set_valid_pixel_rate +ffffffff8213aa80 t dccg32_trigger_dio_fifo_resync +ffffffff8213b000 T enc32_hw_init +ffffffff8213b090 T dcn32_link_encoder_enable_dp_output +ffffffff8213b0e0 T dcn32_link_encoder_construct +ffffffff8213b2d0 t dcn32_link_encoder_is_in_alt_mode +ffffffff8213b350 t dcn32_link_encoder_get_max_link_cap +ffffffff8213c000 T enc32_stream_encoder_dp_unblank +ffffffff8213c500 T enc32_enable_fifo +ffffffff8213c5a0 t enc32_reset_fifo +ffffffff8213c6a0 T dcn32_dio_stream_encoder_construct +ffffffff8213c710 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff8213cc90 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff8213ce10 t enc32_read_state +ffffffff8213cf70 t enc32_dp_set_dsc_config +ffffffff8213cfc0 t enc32_dp_set_odm_combine +ffffffff8213d000 t enc32_set_dig_input_mode +ffffffff8213e000 T dpp32_construct +ffffffff8213e060 t dscl32_calc_lb_num_partitions +ffffffff8213f000 T hpo_dp_link_encoder32_construct +ffffffff8213f060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff82140000 T hubbub32_set_request_limit +ffffffff82140130 T dcn32_program_det_size +ffffffff821402d0 T hubbub32_program_urgent_watermarks +ffffffff82140a40 T hubbub32_program_stutter_watermarks +ffffffff82140e90 T hubbub32_program_pstate_watermarks +ffffffff82141320 T hubbub32_program_usr_watermarks +ffffffff82141580 T hubbub32_force_usr_retraining_allow +ffffffff82141600 T hubbub32_force_wm_propagate_to_pipes +ffffffff821416a0 T hubbub32_init +ffffffff821417e0 T hubbub32_construct +ffffffff82141860 t hubbub32_wm_read_state +ffffffff82141c80 t hubbub32_program_watermarks +ffffffff82141d90 t hubbub32_init_watermarks +ffffffff821421d0 t dcn32_program_compbuf_size +ffffffff82142460 t dcn32_init_crb +ffffffff82143000 T hubp32_update_force_pstate_disallow +ffffffff82143090 T hubp32_update_force_cursor_pstate_disallow +ffffffff82143120 T hubp32_update_mall_sel +ffffffff821431b0 T hubp32_prepare_subvp_buffering +ffffffff82143250 T hubp32_phantom_hubp_post_enable +ffffffff82143360 T hubp32_cursor_set_attributes +ffffffff82143620 T hubp32_init +ffffffff82143650 T hubp32_construct +ffffffff82144000 T dcn32_dsc_pg_control +ffffffff82144320 T dcn32_enable_power_gating_plane +ffffffff82144590 T dcn32_hubp_pg_control +ffffffff82144800 T dcn32_apply_idle_power_optimizations +ffffffff82144af0 T dcn32_commit_subvp_config +ffffffff82144ba0 T dcn32_subvp_pipe_control_lock +ffffffff82144d70 T dcn32_subvp_pipe_control_lock_fast +ffffffff82144df0 T dcn32_set_mpc_shaper_3dlut +ffffffff82144f10 T dcn32_set_mcm_luts +ffffffff821450a0 T dcn32_set_input_transfer_func +ffffffff821451e0 T dcn32_set_output_transfer_func +ffffffff82145420 T dcn32_update_force_pstate +ffffffff82145640 T dcn32_update_mall_sel +ffffffff82145830 T dcn32_program_mall_pipe_config +ffffffff82145920 T dcn32_init_hw +ffffffff821461e0 T dcn32_update_odm +ffffffff821467e0 T dcn32_calculate_dccg_k1_k2_values +ffffffff82146a10 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff82146ab0 T dcn32_set_pixels_per_cycle +ffffffff82146bf0 T dcn32_resync_fifo_dccg_dio +ffffffff82146d90 T dcn32_unblank_stream +ffffffff82146fa0 T dcn32_disable_link_output +ffffffff82147310 T dcn32_update_phantom_vp_position +ffffffff82147420 T dcn32_apply_update_flags_for_phantom +ffffffff821474a0 T dcn32_dsc_pg_status +ffffffff82147580 T dcn32_update_dsc_pg +ffffffff82147680 T dcn32_enable_phantom_streams +ffffffff821477c0 T dcn32_init_blank +ffffffff82147a00 T dcn32_blank_phantom +ffffffff82147b80 T dcn32_is_pipe_topology_transition_seamless +ffffffff82148000 T dcn32_hw_sequencer_init_functions +ffffffff82149000 T dcn32_mmhubbub_construct +ffffffff82149050 t mmhubbub32_warmup_mcif +ffffffff82149260 t mmhubbub32_config_mcif_buf +ffffffff82149710 t mmhubbub32_config_mcif_arb +ffffffff8214a000 T mpc32_mpc_init +ffffffff8214a1e0 T mpc32_power_on_blnd_lut +ffffffff8214a350 T mpc32_configure_post1dlut +ffffffff8214a450 T mpc32_program_post1dluta_settings +ffffffff8214a660 T mpc32_program_post1dlutb_settings +ffffffff8214a870 T mpc32_program_post1dlut_pwl +ffffffff8214aca0 T mpc32_program_post1dlut +ffffffff8214afb0 T mpc32_configure_shaper_lut +ffffffff8214b0d0 T mpc32_program_shaper_luta_settings +ffffffff8214bf60 T mpc32_program_shaper_lutb_settings +ffffffff8214cdf0 T mpc32_program_shaper_lut +ffffffff8214cf90 T mpc32_power_on_shaper_3dlut +ffffffff8214d1c0 T mpc32_program_shaper +ffffffff8214d4e0 T mpc32_select_3dlut_ram +ffffffff8214d590 T mpc32_select_3dlut_ram_mask +ffffffff8214d660 T mpc32_set3dlut_ram12 +ffffffff8214d860 T mpc32_set3dlut_ram10 +ffffffff8214d930 T mpc32_program_3dlut +ffffffff8214e300 T dcn32_mpc_construct +ffffffff8214f000 T optc32_set_h_timing_div_manual_mode +ffffffff8214f040 T dcn32_timing_generator_init +ffffffff8214f0b0 t optc32_enable_crtc +ffffffff8214f1b0 t optc32_disable_crtc +ffffffff8214f290 t optc32_phantom_crtc_post_enable +ffffffff8214f350 t optc32_disable_phantom_otg +ffffffff8214f390 t optc32_set_drr +ffffffff8214f550 t optc32_set_odm_bypass +ffffffff8214f6c0 t optc32_set_odm_combine +ffffffff82150000 T dcn32_panel_cntl_create +ffffffff82150070 T dcn32_acquire_post_bldn_3dlut +ffffffff82150160 T dcn32_release_post_bldn_3dlut +ffffffff82150210 T dcn32_retain_phantom_pipes +ffffffff821502f0 T dcn32_remove_phantom_pipes +ffffffff82150460 T dcn32_add_phantom_pipes +ffffffff82150890 T dcn32_validate_bandwidth +ffffffff82150d70 T dcn32_populate_dml_pipes_from_context +ffffffff821511a0 T dcn32_calculate_wm_and_dlg +ffffffff82151210 T dcn32_create_resource_pool +ffffffff821512c0 t dcn32_resource_construct +ffffffff8215c800 T dcn32_acquire_free_pipe_as_secondary_dpp_pipe +ffffffff8215cb00 T dcn32_calc_num_avail_chans_for_mall +ffffffff8215cb70 t dcn32_mpc_create +ffffffff821611d0 t dcn32_dwbc_create +ffffffff82161bd0 t dcn32_mmhubbub_create +ffffffff82162080 t dcn32_resource_destruct +ffffffff82162710 t dcn32_destroy_resource_pool +ffffffff82162770 t dcn32_link_encoder_create +ffffffff82163840 t dcn32_update_bw_bounding_box +ffffffff82163890 t read_dce_straps +ffffffff821638c0 t dcn32_create_audio +ffffffff82163c40 t dcn32_stream_encoder_create +ffffffff82165a80 t dcn32_hpo_dp_stream_encoder_create +ffffffff82166860 t dcn32_hpo_dp_link_encoder_create +ffffffff82166cb0 t dcn32_hwseq_create +ffffffff821671a0 t dcn32_vpg_create +ffffffff82168000 T dcn32_helper_mall_bytes_to_ways +ffffffff82168060 T dcn32_helper_calculate_mall_bytes_for_cursor +ffffffff82168100 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff82168180 T dcn32_merge_pipes_for_subvp +ffffffff82168340 T dcn32_all_pipes_have_stream_and_plane +ffffffff821683d0 T dcn32_subvp_in_use +ffffffff82168460 T dcn32_mpo_in_use +ffffffff821684d0 T dcn32_any_surfaces_rotated +ffffffff82168560 T dcn32_is_center_timing +ffffffff821685d0 T dcn32_is_psr_capable +ffffffff82168620 T dcn32_determine_det_override +ffffffff82168960 T dcn32_set_det_allocations +ffffffff82168af0 T dcn32_save_mall_state +ffffffff82168ba0 T dcn32_restore_mall_state +ffffffff82168c50 T dcn32_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82168e00 t is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82168eb0 T dcn32_check_native_scaling_for_res +ffffffff82168f10 T dcn32_subvp_drr_admissable +ffffffff821690d0 T dcn32_subvp_vblank_admissable +ffffffff8216a000 T dcn321_link_encoder_construct +ffffffff8216b000 T dcn321_create_resource_pool +ffffffff8216b0b0 t dcn321_resource_construct +ffffffff82176550 t dcn321_mpc_create +ffffffff8217abb0 t dcn321_dwbc_create +ffffffff8217b5b0 t dcn321_mmhubbub_create +ffffffff8217ba60 t dcn321_resource_destruct +ffffffff8217c0f0 t dcn321_destroy_resource_pool +ffffffff8217c150 t dcn321_link_encoder_create +ffffffff8217d220 t dcn321_update_bw_bounding_box +ffffffff8217d270 t read_dce_straps +ffffffff8217d2a0 t dcn321_create_audio +ffffffff8217d620 t dcn321_stream_encoder_create +ffffffff8217f460 t dcn321_hpo_dp_stream_encoder_create +ffffffff82180240 t dcn321_hpo_dp_link_encoder_create +ffffffff82180690 t dcn321_hwseq_create +ffffffff82180b80 t dcn321_vpg_create +ffffffff82181000 T bw_int_to_fixed_nonconst +ffffffff82181090 T bw_frc_to_fixed +ffffffff82181260 T bw_floor2 +ffffffff82181310 T bw_ceil2 +ffffffff82181390 T bw_mul +ffffffff82182000 T convert_to_custom_float_format +ffffffff82183000 T bw_calcs_init +ffffffff82183e60 T bw_calcs +ffffffff82185800 t calculate_bandwidth +ffffffff8218d000 T scaler_settings_calculation +ffffffff8218d350 T mode_support_and_system_configuration +ffffffff82193180 T display_pipe_configuration +ffffffff82193ab0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff82199000 T dcn_bw_mod +ffffffff82199060 T dcn_bw_min2 +ffffffff821990a0 T dcn_bw_max +ffffffff821990d0 T dcn_bw_max2 +ffffffff82199110 T dcn_bw_floor2 +ffffffff821991b0 T dcn_bw_floor +ffffffff821991e0 T dcn_bw_ceil +ffffffff82199220 T dcn_bw_ceil2 +ffffffff821992d0 T dcn_bw_max3 +ffffffff82199350 T dcn_bw_max5 +ffffffff82199490 T dcn_bw_pow +ffffffff82199520 T dcn_bw_fabs +ffffffff82199560 T dcn_bw_log +ffffffff8219a000 T swizzle_mode_to_macro_tile_size +ffffffff8219a090 T dcn_validate_bandwidth +ffffffff8219c300 T dcn_bw_sync_calcs_and_dml +ffffffff8219c550 t dcn_bw_calc_rq_dlg_ttu +ffffffff8219cd20 T dcn_find_dcfclk_suits_all +ffffffff8219d180 T dcn_bw_update_from_pplib_fclks +ffffffff8219d300 T dcn_bw_update_from_pplib_dcfclks +ffffffff8219d3d0 T dcn_get_soc_clks +ffffffff8219d450 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff8219e000 T dcn10_resource_construct_fp +ffffffff8219f000 T dcn20_populate_dml_writeback_from_context +ffffffff8219f180 T dcn20_fpu_set_wb_arb_params +ffffffff8219f330 T dcn20_calculate_dlg_params +ffffffff8219fb70 T dcn20_populate_dml_pipes_from_context +ffffffff821a0a80 T dcn20_calculate_wm +ffffffff821a1270 T dcn20_update_bounding_box +ffffffff821a14f0 T dcn20_cap_soc_clocks +ffffffff821a1850 T dcn20_patch_bounding_box +ffffffff821a1a40 T dcn20_validate_bandwidth_fp +ffffffff821a1be0 t dcn20_validate_bandwidth_internal +ffffffff821a1fe0 T dcn20_fpu_set_wm_ranges +ffffffff821a2080 T dcn20_fpu_adjust_dppclk +ffffffff821a2120 T dcn21_populate_dml_pipes_from_context +ffffffff821a2230 T dcn21_validate_bandwidth_fp +ffffffff821a2cc0 T dcn21_update_bw_bounding_box +ffffffff821a30d0 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff821a3130 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff821a3430 t calculate_wm_set_for_vlevel +ffffffff821a4000 T dml20_recalculate +ffffffff821a4740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821a9be0 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff821b1040 t TruncToValidBPP +ffffffff821b1220 t CalculateVMAndRowBytes +ffffffff821b18e0 t CalculatePrefetchSourceLines +ffffffff821b1ab0 t CalculateWriteBackDelay +ffffffff821b1d80 t CalculatePrefetchSchedule +ffffffff821b2c30 t CalculateFlipSchedule +ffffffff821b3000 t adjust_ReturnBW +ffffffff821b4000 T dml20v2_recalculate +ffffffff821b4740 t dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821b9d60 T dml20v2_ModeSupportAndSystemConfigurationFull +ffffffff821c1140 t TruncToValidBPP +ffffffff821c16d0 t CalculateVMAndRowBytes +ffffffff821c1d90 t CalculatePrefetchSourceLines +ffffffff821c1f60 t CalculateWriteBackDelay +ffffffff821c2230 t CalculateDelayAfterScaler +ffffffff821c2590 t CalculatePrefetchSchedule +ffffffff821c32b0 t CalculateFlipSchedule +ffffffff821c3680 t adjust_ReturnBW +ffffffff821c4000 T dml20_rq_dlg_get_rq_reg +ffffffff821c4490 t dml20_rq_dlg_get_rq_params +ffffffff821c4660 T dml20_rq_dlg_get_dlg_reg +ffffffff821c6550 t get_surf_rq_param +ffffffff821c6db0 t calculate_ttu_cursor +ffffffff821c8000 T dml20v2_rq_dlg_get_rq_reg +ffffffff821c8490 t dml20v2_rq_dlg_get_rq_params +ffffffff821c8660 T dml20v2_rq_dlg_get_dlg_reg +ffffffff821ca560 t get_surf_rq_param +ffffffff821cadc0 t calculate_ttu_cursor +ffffffff821cc000 T dml21_recalculate +ffffffff821cc710 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821d1ed0 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff821d8380 t TruncToValidBPP +ffffffff821d8910 t CalculateDCFCLKDeepSleep +ffffffff821d8c50 t CalculateVMAndRowBytes +ffffffff821d94b0 t CalculatePrefetchSourceLines +ffffffff821d9680 t CalculateWriteBackDelay +ffffffff821d9950 t CalculatePrefetchSchedulePerPlane +ffffffff821da190 t CalculateUrgentBurstFactor +ffffffff821da5a0 t CalculateFlipSchedule +ffffffff821daa80 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821dba70 t CalculatePrefetchSchedule +ffffffff821de000 T dml21_rq_dlg_get_rq_reg +ffffffff821de490 t dml_rq_dlg_get_rq_params +ffffffff821de660 T dml21_rq_dlg_get_dlg_reg +ffffffff821e0930 t get_surf_rq_param +ffffffff821e1250 t calculate_ttu_cursor +ffffffff821e2000 T optc3_fpu_set_vrr_m_const +ffffffff821e24a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff821e27b0 T dcn30_fpu_set_mcif_arb_params +ffffffff821e2920 T dcn30_fpu_update_soc_for_wm_a +ffffffff821e29f0 T dcn30_fpu_calculate_wm_and_dlg +ffffffff821e3480 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821e3670 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff821e36d0 T dcn30_fpu_update_max_clk +ffffffff821e3780 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff821e3880 T dcn30_fpu_update_bw_bounding_box +ffffffff821e3a60 T dcn3_fpu_build_wm_range_table +ffffffff821e3d40 T patch_dcn30_soc_bounding_box +ffffffff821e4000 T dml30_recalculate +ffffffff821e45f0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821eb0b0 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff821eb320 T dml30_CalculateWriteBackDISPCLK +ffffffff821eb490 t dml_max3 +ffffffff821eb4f0 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff821f3040 t CalculateSwathAndDETConfiguration +ffffffff821f3740 t TruncToValidBPP +ffffffff821f39a0 t CalculateVMAndRowBytes +ffffffff821f4010 t CalculatePrefetchSourceLines +ffffffff821f41e0 t CalculateUrgentBurstFactor +ffffffff821f4470 t CalculateDCFCLKDeepSleep +ffffffff821f4790 t UseMinimumDCFCLK +ffffffff821f5ab0 t CalculatePrefetchSchedule +ffffffff821f6f50 t CalculateFlipSchedule +ffffffff821f7450 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821f8190 t CalculateSwathWidth +ffffffff821f9000 T dml30_rq_dlg_get_rq_reg +ffffffff821f94b0 t dml_rq_dlg_get_rq_params +ffffffff821f9740 T dml30_rq_dlg_get_dlg_reg +ffffffff821fbe10 t get_surf_rq_param +ffffffff821fc7a0 t calculate_ttu_cursor +ffffffff821fd000 T dcn301_update_bw_bounding_box +ffffffff821fd2e0 T dcn301_fpu_set_wm_ranges +ffffffff821fd380 T dcn301_fpu_init_soc_bounding_box +ffffffff821fd420 T dcn301_calculate_wm_and_dlg_fp +ffffffff821fd750 t calculate_wm_set_for_vlevel +ffffffff821fe000 T dcn302_fpu_update_bw_bounding_box +ffffffff821fe940 T dcn302_fpu_init_soc_bounding_box +ffffffff821ff000 T dcn303_fpu_update_bw_bounding_box +ffffffff821ff9a0 T dcn303_fpu_init_soc_bounding_box +ffffffff82200000 T dcn31_zero_pipe_dcc_fraction +ffffffff82200060 T dcn31_update_soc_for_wm_a +ffffffff82200110 T dcn315_update_soc_for_wm_a +ffffffff822001e0 T dcn31_calculate_wm_and_dlg_fp +ffffffff82200840 T dcn31_update_bw_bounding_box +ffffffff82200be0 T dcn315_update_bw_bounding_box +ffffffff82200ed0 T dcn316_update_bw_bounding_box +ffffffff82201280 T dcn_get_max_non_odm_pix_rate_100hz +ffffffff822012e0 T dcn_get_approx_det_segs_required_for_pstate +ffffffff82202000 T dml31_recalculate +ffffffff822022d0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82209190 T dml31_CalculateWriteBackDISPCLK +ffffffff82209300 t dml_max3 +ffffffff82209360 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff82211440 t CalculateSwathAndDETConfiguration +ffffffff82211aa0 t TruncToValidBPP +ffffffff82211cf0 t CalculateDCFCLKDeepSleep +ffffffff82212010 t CalculateVMAndRowBytes +ffffffff82212650 t CalculatePrefetchSourceLines +ffffffff82212820 t CalculateUrgentBurstFactor +ffffffff82212ab0 t UseMinimumDCFCLK +ffffffff82213a40 t CalculatePrefetchSchedulePerPlane +ffffffff822141a0 t CalculateFlipSchedule +ffffffff82214730 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82215350 t CalculateSwathWidth +ffffffff82215860 t CalculatePrefetchSchedule +ffffffff82216c40 t CalculateVupdateAndDynamicMetadataParameters +ffffffff82217000 T dml31_rq_dlg_get_rq_reg +ffffffff822174b0 t dml_rq_dlg_get_rq_params +ffffffff82217740 T dml31_rq_dlg_get_dlg_reg +ffffffff8221a100 t get_surf_rq_param +ffffffff8221b000 T dcn314_update_bw_bounding_box_fpu +ffffffff8221b3f0 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff8221c000 T dml314_recalculate +ffffffff8221c270 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82223050 T dml314_CalculateWriteBackDISPCLK +ffffffff822231c0 t dml_max3 +ffffffff82223220 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff8222b5a0 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff8222b810 t CalculateSwathAndDETConfiguration +ffffffff8222be50 t TruncToValidBPP +ffffffff8222c0a0 t CalculateDCFCLKDeepSleep +ffffffff8222c3c0 t CalculateVMAndRowBytes +ffffffff8222ca00 t CalculatePrefetchSourceLines +ffffffff8222cbd0 t CalculateUrgentBurstFactor +ffffffff8222ce60 t CalculateMaxVStartup +ffffffff8222cfa0 t UseMinimumDCFCLK +ffffffff8222df30 t CalculatePrefetchSchedulePerPlane +ffffffff8222e690 t CalculateFlipSchedule +ffffffff8222ec20 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8222f840 t CalculateSwathWidth +ffffffff8222fd50 t CalculatePrefetchSchedule +ffffffff82231130 t CalculateVupdateAndDynamicMetadataParameters +ffffffff82232000 T dml314_rq_dlg_get_rq_reg +ffffffff822324b0 t dml_rq_dlg_get_rq_params +ffffffff82232740 T dml314_rq_dlg_get_dlg_reg +ffffffff82235100 t get_surf_rq_param +ffffffff82236000 T dcn32_build_wm_range_table_fpu +ffffffff82236390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff82236540 T dcn32_internal_validate_bw +ffffffff822383b0 T dcn32_helper_populate_phantom_dlg_params +ffffffff82238550 T dcn32_predict_pipe_split +ffffffff82238780 T dcn32_set_phantom_stream_timing +ffffffff82238a90 T dcn32_determine_max_vratio_prefetch +ffffffff82238b70 t dcn32_split_stream_for_mpc_or_odm +ffffffff82238f20 T dcn32_calculate_wm_and_dlg_fpu +ffffffff8223a650 T dcn32_patch_dpm_table +ffffffff8223a860 T dcn32_update_bw_bounding_box_fpu +ffffffff8223ced0 T dcn32_zero_pipe_dcc_fraction +ffffffff8223cf30 T dcn32_allow_subvp_with_active_margin +ffffffff8223d000 T dcn32_allow_subvp_high_refresh_rate +ffffffff8223d200 T dcn32_assign_fpo_vactive_candidate +ffffffff8223d2c0 T dcn32_find_vactive_pipe +ffffffff8223d430 T dcn32_set_clock_limits +ffffffff8223d480 T dcn32_override_min_req_memclk +ffffffff8223d540 t subvp_drr_schedulable +ffffffff8223d7d0 t get_optimal_ntuple +ffffffff8223e000 T dml32_recalculate +ffffffff82242320 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff8224a000 T dml32_dscceComputeDelay +ffffffff8224a140 T dml32_dscComputeDelay +ffffffff8224a180 T IsVertical +ffffffff8224a1b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff8224a4d0 t dml_max3 +ffffffff8224a530 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff8224a860 T dml32_CalculateSwathAndDETConfiguration +ffffffff8224b090 T dml32_CalculateSwathWidth +ffffffff8224b950 T dml32_UnboundedRequest +ffffffff8224b9c0 T dml32_CalculateDETBufferSize +ffffffff8224c000 T dml32_CalculateODMMode +ffffffff8224c780 T dml32_CalculateRequiredDispclk +ffffffff8224c940 T dml32_RoundToDFSGranularity +ffffffff8224c9d0 T dml32_CalculateOutputLink +ffffffff8224d440 T dml32_TruncToValidBPP +ffffffff8224d770 T dml32_CalculateDPPCLK +ffffffff8224d910 T dml32_RequiredDTBCLK +ffffffff8224db60 t dml_max4 +ffffffff8224dbe0 T dml32_DSCDelayRequirement +ffffffff8224e0a0 T dml32_CalculateSurfaceSizeInMall +ffffffff8224ebf0 T dml32_CalculateVMRowAndSwath +ffffffff8224fa00 T dml32_CalculateVMAndRowBytes +ffffffff82250650 T dml32_CalculatePrefetchSourceLines +ffffffff822508a0 T dml32_CalculateMALLUseForStaticScreen +ffffffff822509e0 T dml32_CalculateRowBandwidth +ffffffff82250b40 T dml32_CalculateUrgentLatency +ffffffff82250bf0 T dml32_CalculateUrgentBurstFactor +ffffffff82250ea0 T dml32_CalculateDCFCLKDeepSleep +ffffffff822511f0 T dml32_CalculateWriteBackDelay +ffffffff82251350 T dml32_UseMinimumDCFCLK +ffffffff822523c0 T dml32_CalculateExtraLatencyBytes +ffffffff82252580 T dml32_CalculateTWait +ffffffff82252670 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff822528d0 T dml32_get_return_bw_mbps +ffffffff82252a90 T dml32_get_return_bw_mbps_vm_only +ffffffff82252b70 T dml32_CalculateExtraLatency +ffffffff82252d90 T dml32_CalculatePrefetchSchedule +ffffffff822543a0 T dml32_CalculateFlipSchedule +ffffffff82254900 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff82255a10 T dml32_CalculateWriteBackDISPCLK +ffffffff82255be0 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff82255c30 T dml32_CalculatePixelDeliveryTimes +ffffffff822560b0 T dml32_CalculateMetaAndPTETimes +ffffffff82256810 T dml32_CalculateVMGroupAndRequestTimes +ffffffff82256d50 T dml32_CalculateDCCConfiguration +ffffffff82257360 T dml32_CalculateStutterEfficiency +ffffffff82258280 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff82258370 T dml32_CalculateVActiveBandwithSupport +ffffffff822584e0 T dml32_CalculatePrefetchBandwithSupport +ffffffff82258800 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff82258950 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff82258bd0 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff82259000 T dml32_rq_dlg_get_rq_reg +ffffffff822596a0 T dml32_rq_dlg_get_dlg_reg +ffffffff8225c000 T dcn321_update_bw_bounding_box_fpu +ffffffff8225e760 t get_optimal_ntuple +ffffffff8225f000 T dml_init_instance +ffffffff8225f310 T dml_get_status_message +ffffffff8225f350 T dml_log_pipe_params +ffffffff8225f380 T dml_log_mode_support_params +ffffffff82260000 T dml_get_voltage_level +ffffffff82260240 t fetch_socbb_params +ffffffff82260730 t fetch_ip_params +ffffffff82260bd0 t fetch_pipe_params +ffffffff82261c50 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff82261cd0 T get_clk_dcf_deepsleep +ffffffff82261de0 T get_wm_urgent +ffffffff82261ef0 T get_wm_memory_trip +ffffffff82262000 T get_wm_writeback_urgent +ffffffff82262110 T get_wm_stutter_exit +ffffffff82262220 T get_wm_stutter_enter_exit +ffffffff82262330 T get_wm_z8_stutter_exit +ffffffff82262440 T get_wm_z8_stutter_enter_exit +ffffffff82262550 T get_stutter_efficiency_z8 +ffffffff82262660 T get_stutter_num_bursts_z8 +ffffffff82262770 T get_wm_dram_clock_change +ffffffff82262880 T get_wm_writeback_dram_clock_change +ffffffff82262990 T get_stutter_efficiency +ffffffff82262aa0 T get_stutter_efficiency_no_vblank +ffffffff82262bb0 T get_stutter_period +ffffffff82262cc0 T get_urgent_latency +ffffffff82262dd0 T get_urgent_extra_latency +ffffffff82262ee0 T get_nonurgent_latency +ffffffff82262ff0 T get_dram_clock_change_latency +ffffffff82263100 T get_dispclk_calculated +ffffffff82263210 T get_total_data_read_bw +ffffffff82263320 T get_return_bw +ffffffff82263430 T get_tcalc +ffffffff82263540 T get_fraction_of_urgent_bandwidth +ffffffff82263650 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff82263760 T get_cstate_max_cap_mode +ffffffff82263880 T get_comp_buffer_size_kbytes +ffffffff82263990 T get_pixel_chunk_size_in_kbyte +ffffffff82263ab0 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff82263bd0 T get_meta_chunk_size_in_kbyte +ffffffff82263cf0 T get_min_pixel_chunk_size_in_byte +ffffffff82263e00 T get_min_meta_chunk_size_in_byte +ffffffff82263f20 T get_fclk_watermark +ffffffff82264030 T get_usr_retraining_watermark +ffffffff82264140 T get_comp_buffer_reserved_space_kbytes +ffffffff82264260 T get_comp_buffer_reserved_space_64bytes +ffffffff82264380 T get_comp_buffer_reserved_space_zs +ffffffff822644a0 T get_unbounded_request_enabled +ffffffff822645c0 T get_dsc_delay +ffffffff822646f0 T get_dppclk_calculated +ffffffff82264810 T get_dscclk_calculated +ffffffff82264930 T get_min_ttu_vblank +ffffffff82264a50 T get_min_ttu_vblank_in_us +ffffffff82264b70 T get_vratio_prefetch_l +ffffffff82264c90 T get_vratio_prefetch_c +ffffffff82264db0 T get_dst_x_after_scaler +ffffffff82264ed0 T get_dst_y_after_scaler +ffffffff82264ff0 T get_dst_y_per_vm_vblank +ffffffff82265110 T get_dst_y_per_row_vblank +ffffffff82265230 T get_dst_y_prefetch +ffffffff82265350 T get_dst_y_per_vm_flip +ffffffff82265470 T get_dst_y_per_row_flip +ffffffff82265590 T get_refcyc_per_vm_group_vblank +ffffffff822656b0 T get_refcyc_per_vm_group_flip +ffffffff822657d0 T get_refcyc_per_vm_req_vblank +ffffffff822658f0 T get_refcyc_per_vm_req_flip +ffffffff82265a10 T get_refcyc_per_vm_group_vblank_in_us +ffffffff82265b30 T get_refcyc_per_vm_group_flip_in_us +ffffffff82265c50 T get_refcyc_per_vm_req_vblank_in_us +ffffffff82265d70 T get_refcyc_per_vm_req_flip_in_us +ffffffff82265e90 T get_refcyc_per_vm_dmdata_in_us +ffffffff82265fb0 T get_dmdata_dl_delta_in_us +ffffffff822660d0 T get_refcyc_per_line_delivery_l_in_us +ffffffff822661f0 T get_refcyc_per_line_delivery_c_in_us +ffffffff82266310 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff82266430 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff82266550 T get_refcyc_per_req_delivery_l_in_us +ffffffff82266670 T get_refcyc_per_req_delivery_c_in_us +ffffffff82266790 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff822668b0 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff822669d0 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff82266af0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff82266c10 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff82266d30 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff82266e50 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff82266f70 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff82267090 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff822671b0 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff822672d0 T get_vstartup +ffffffff82267400 T get_vupdate_offset +ffffffff82267530 T get_vupdate_width +ffffffff82267650 T get_vready_offset +ffffffff82267770 T get_vready_at_or_after_vsync +ffffffff822678a0 T get_min_dst_y_next_start +ffffffff822679d0 T get_dst_y_per_pte_row_nom_l +ffffffff82267af0 T get_dst_y_per_pte_row_nom_c +ffffffff82267c10 T get_dst_y_per_meta_row_nom_l +ffffffff82267d30 T get_dst_y_per_meta_row_nom_c +ffffffff82267e50 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff82267f70 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff82268090 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff822681b0 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff822682d0 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff822683f0 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff82268510 T get_vstartup_calculated +ffffffff82268640 T get_dpte_row_height_linear_c +ffffffff82268770 T get_swath_height_l +ffffffff822688a0 T get_swath_height_c +ffffffff822689d0 T get_det_stored_buffer_size_l_bytes +ffffffff82268b00 T get_det_stored_buffer_size_c_bytes +ffffffff82268c30 T get_dpte_group_size_in_bytes +ffffffff82268d60 T get_vm_group_size_in_bytes +ffffffff82268e90 T get_dpte_row_height_linear_l +ffffffff82268fc0 T get_pte_buffer_mode +ffffffff822690f0 T get_subviewport_lines_needed_in_mall +ffffffff82269220 T get_surface_size_in_mall +ffffffff82269350 T get_total_immediate_flip_bytes +ffffffff82269470 T get_total_immediate_flip_bw +ffffffff82269650 T get_total_prefetch_bw +ffffffff82269830 T get_total_surface_size_in_mall_bytes +ffffffff822699d0 T get_det_buffer_size_kbytes +ffffffff82269b00 T get_is_phantom_pipe +ffffffff82269c30 T Calculate256BBlockSizes +ffffffff82269d20 T CalculateMinAndMaxPrefetchMode +ffffffff82269da0 T ModeSupportAndSystemConfiguration +ffffffff8226a0b0 T CalculateWriteBackDISPCLK +ffffffff8226b000 T print__rq_params_st +ffffffff8226b030 T print__data_rq_sizing_params_st +ffffffff8226b060 T print__data_rq_dlg_params_st +ffffffff8226b090 T print__data_rq_misc_params_st +ffffffff8226b0c0 T print__rq_dlg_params_st +ffffffff8226b0f0 T print__dlg_sys_params_st +ffffffff8226b120 T print__data_rq_regs_st +ffffffff8226b150 T print__rq_regs_st +ffffffff8226b180 T print__dlg_regs_st +ffffffff8226b1b0 T print__ttu_regs_st +ffffffff8226c000 T dml1_extract_rq_regs +ffffffff8226c330 T dml1_rq_dlg_get_rq_params +ffffffff8226c510 t get_surf_rq_param +ffffffff8226d0c0 T dml1_rq_dlg_get_dlg_params +ffffffff82270000 T _do_calc_rc_params +ffffffff82270fc0 t get_qp_set +ffffffff82272000 T dc_bandwidth_in_kbps_from_timing +ffffffff82272290 T dc_dsc_stream_bandwidth_in_kbps +ffffffff822723e0 T dc_dsc_parse_dsc_dpcd +ffffffff82272680 t dsc_throughput_from_dpcd +ffffffff82272840 T dc_dsc_compute_bandwidth_range +ffffffff82272a30 t intersect_dsc_caps +ffffffff82272c00 t setup_dsc_config +ffffffff822733d0 T dc_dsc_compute_config +ffffffff822734c0 T dc_dsc_stream_bandwidth_overhead_in_kbps +ffffffff82273600 T dc_dsc_get_policy_for_timing +ffffffff822736a0 T dc_dsc_policy_set_max_target_bpp_limit +ffffffff822736d0 T dc_dsc_policy_set_enable_dsc_when_not_needed +ffffffff82273700 T dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff82273730 T dc_set_disable_128b_132b_stream_overhead +ffffffff82273760 T dc_dsc_get_default_config_option +ffffffff822737b0 t fit_num_slices_up +ffffffff82273860 t decide_dsc_target_bpp_x16 +ffffffff82274000 T calc_rc_params +ffffffff82275000 T dscc_compute_dsc_parameters +ffffffff82276000 T dal_hw_factory_dce110_init +ffffffff82276060 t define_hpd_registers +ffffffff822760b0 t define_ddc_registers +ffffffff82277000 T dal_hw_translate_dce110_init +ffffffff82277030 t offset_to_id +ffffffff82277390 t id_to_offset +ffffffff82278000 T dal_hw_factory_dce120_init +ffffffff82278060 t define_hpd_registers +ffffffff822780b0 t define_ddc_registers +ffffffff82279000 T dal_hw_translate_dce120_init +ffffffff82279030 t offset_to_id +ffffffff822793a0 t id_to_offset +ffffffff8227a000 T dal_hw_factory_dce80_init +ffffffff8227a060 t define_hpd_registers +ffffffff8227a0b0 t define_ddc_registers +ffffffff8227b000 T dal_hw_translate_dce80_init +ffffffff8227b030 t offset_to_id +ffffffff8227b7b0 t id_to_offset +ffffffff8227c000 T dal_hw_factory_dcn10_init +ffffffff8227c060 t define_hpd_registers +ffffffff8227c0b0 t define_ddc_registers +ffffffff8227c150 t define_generic_registers +ffffffff8227d000 T dal_hw_translate_dcn10_init +ffffffff8227d030 t offset_to_id +ffffffff8227d390 t id_to_offset +ffffffff8227e000 T dal_hw_factory_dcn20_init +ffffffff8227e060 t define_hpd_registers +ffffffff8227e0b0 t define_ddc_registers +ffffffff8227e160 t define_generic_registers +ffffffff8227f000 T dal_hw_translate_dcn20_init +ffffffff8227f030 t offset_to_id +ffffffff8227f2b0 t id_to_offset +ffffffff82280000 T dal_hw_factory_dcn21_init +ffffffff82280060 t define_hpd_registers +ffffffff822800b0 t define_ddc_registers +ffffffff82280160 t define_generic_registers +ffffffff82281000 T dal_hw_translate_dcn21_init +ffffffff82281030 t offset_to_id +ffffffff822812b0 t id_to_offset +ffffffff82282000 T dal_hw_factory_dcn30_init +ffffffff82282060 t define_hpd_registers +ffffffff822820b0 t define_ddc_registers +ffffffff82282160 t define_generic_registers +ffffffff82283000 T dal_hw_translate_dcn30_init +ffffffff82283030 t offset_to_id +ffffffff822832c0 t id_to_offset +ffffffff82284000 T dal_hw_factory_dcn315_init +ffffffff82284060 t define_hpd_registers +ffffffff822840b0 t define_ddc_registers +ffffffff82284160 t define_generic_registers +ffffffff82285000 T dal_hw_translate_dcn315_init +ffffffff82285030 t offset_to_id +ffffffff822852b0 t id_to_offset +ffffffff82286000 T dal_hw_factory_dcn32_init +ffffffff82286060 t define_hpd_registers +ffffffff822860b0 t define_ddc_registers +ffffffff82286160 t define_generic_registers +ffffffff82287000 T dal_hw_translate_dcn32_init +ffffffff82287030 t offset_to_id +ffffffff82287290 t id_to_offset +ffffffff82288000 T dal_gpio_open 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dal_gpio_get_generic_pin_info +ffffffff82289510 T dal_gpio_service_destroy +ffffffff82289640 T dal_mux_setup_config +ffffffff822896a0 T dal_gpio_service_lock +ffffffff82289720 T dal_gpio_service_unlock +ffffffff822897a0 T dal_gpio_service_open +ffffffff822899e0 T dal_gpio_service_close +ffffffff82289a80 T dal_irq_get_source +ffffffff82289af0 T dal_irq_get_rx_source +ffffffff82289b40 T dal_irq_setup_hpd_filter +ffffffff82289ba0 T dal_gpio_destroy_irq +ffffffff82289c30 T dal_gpio_create_ddc +ffffffff82289da0 T dal_gpio_destroy_ddc +ffffffff82289e70 T dal_ddc_close +ffffffff82289ec0 T dal_ddc_open +ffffffff8228a020 T dal_ddc_change_mode +ffffffff8228a0c0 T dal_ddc_get_line +ffffffff8228a0e0 T dal_ddc_set_config +ffffffff8228b000 T dal_hw_ddc_init +ffffffff8228b100 T dal_hw_ddc_get_pin +ffffffff8228b110 t dal_hw_ddc_destroy +ffffffff8228b170 t set_config +ffffffff8228c000 T dal_hw_factory_init +ffffffff8228d000 T dal_hw_generic_init +ffffffff8228d100 T dal_hw_generic_get_pin +ffffffff8228d110 t dal_hw_generic_destroy +ffffffff8228d170 t set_config +ffffffff8228e000 T dal_hw_gpio_open +ffffffff8228e0b0 T dal_hw_gpio_config_mode +ffffffff8228e1a0 T dal_hw_gpio_get_value +ffffffff8228e200 T dal_hw_gpio_set_value +ffffffff8228e290 T dal_hw_gpio_change_mode +ffffffff8228e2a0 T dal_hw_gpio_close +ffffffff8228e350 T dal_hw_gpio_construct +ffffffff8228e3b0 T dal_hw_gpio_destruct +ffffffff8228f000 T dal_hw_hpd_init +ffffffff8228f100 T dal_hw_hpd_get_pin +ffffffff8228f110 t dal_hw_hpd_destroy +ffffffff8228f170 t get_value +ffffffff8228f210 t set_config +ffffffff82290000 T dal_hw_translate_init +ffffffff82291000 T dc_process_hdcp_msg +ffffffff82291180 t hdmi_14_process_transaction +ffffffff822912d0 t dp_11_process_transaction +ffffffff82292000 T dal_irq_service_dummy_set +ffffffff82292050 T dal_irq_service_dummy_ack +ffffffff822920a0 T dce110_vblank_set +ffffffff82292170 T to_dal_irq_source_dce110 +ffffffff822922f0 T dal_irq_service_dce110_create +ffffffff82292370 t hpd_ack +ffffffff82293000 T dal_irq_service_dce120_create ffffffff82293080 t hpd_ack -ffffffff82294000 T dal_irq_service_dcn10_create +ffffffff82294000 T dal_irq_service_dce80_create ffffffff82294080 t hpd_ack -ffffffff82294130 t to_dal_irq_source_dcn10 -ffffffff82295000 T dal_irq_service_dcn20_create +ffffffff82295000 T dal_irq_service_dcn10_create ffffffff82295080 t hpd_ack -ffffffff82295130 t to_dal_irq_source_dcn20 -ffffffff82296000 T dal_irq_service_dcn201_create +ffffffff82295130 t to_dal_irq_source_dcn10 +ffffffff82296000 T dal_irq_service_dcn20_create ffffffff82296080 t hpd_ack -ffffffff82296130 t to_dal_irq_source_dcn201 -ffffffff82297000 T dal_irq_service_dcn21_create +ffffffff82296130 t to_dal_irq_source_dcn20 +ffffffff82297000 T dal_irq_service_dcn201_create ffffffff82297080 t hpd_ack -ffffffff82297130 t to_dal_irq_source_dcn21 -ffffffff82298000 T dal_irq_service_dcn30_create +ffffffff82297130 t to_dal_irq_source_dcn201 +ffffffff82298000 T dal_irq_service_dcn21_create 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t to_dal_irq_source_dcn31 +ffffffff8229d000 T dal_irq_service_dcn314_create ffffffff8229d080 t hpd_ack -ffffffff8229d130 t to_dal_irq_source_dcn315 -ffffffff8229e000 T dal_irq_service_dcn32_create +ffffffff8229d130 t to_dal_irq_source_dcn314 +ffffffff8229e000 T dal_irq_service_dcn315_create ffffffff8229e080 t hpd_ack -ffffffff8229e130 t to_dal_irq_source_dcn32 -ffffffff8229f000 T dal_irq_service_construct -ffffffff8229f070 T dal_irq_service_destroy -ffffffff8229f100 T dal_irq_service_set_generic -ffffffff8229f180 T dal_irq_service_set -ffffffff8229f330 T dal_irq_service_ack -ffffffff8229f4a0 T dal_irq_service_ack_generic -ffffffff8229f510 T dal_irq_service_to_irq_source -ffffffff822a0000 T dp_handle_automated_test -ffffffff822a0820 T dp_set_test_pattern -ffffffff822a0f00 t set_crtc_test_pattern -ffffffff822a1370 T dp_set_preferred_link_settings -ffffffff822a14c0 t dp_retrain_link_dp_test -ffffffff822a15c0 T dp_set_preferred_training_settings -ffffffff822a2000 T dp_trace_init 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set_dio_throttled_vcp_size -ffffffff822a4020 T setup_dio_stream_encoder -ffffffff822a4110 T reset_dio_stream_encoder -ffffffff822a41e0 T setup_dio_stream_attribute -ffffffff822a4380 T enable_dio_dp_link_output -ffffffff822a4410 T disable_dio_link_output -ffffffff822a4470 T set_dio_dp_link_test_pattern -ffffffff822a44d0 T set_dio_dp_lane_settings -ffffffff822a4510 T update_dio_stream_allocation_table -ffffffff822a4580 T setup_dio_audio_output -ffffffff822a45f0 T enable_dio_audio_packet -ffffffff822a46b0 T disable_dio_audio_packet -ffffffff822a4790 T can_use_dio_link_hwss -ffffffff822a47d0 T get_dio_link_hwss -ffffffff822a5000 T dp_dio_fixed_vs_pe_retimer_lane_cfg_to_hw_cfg -ffffffff822a5040 T dp_dio_fixed_vs_pe_retimer_exit_manual_automation -ffffffff822a5280 T enable_dio_fixed_vs_pe_retimer_program_4lane_output -ffffffff822a53b0 T requires_fixed_vs_pe_retimer_dio_link_hwss -ffffffff822a53f0 T get_dio_fixed_vs_pe_retimer_link_hwss -ffffffff822a5420 t enable_dio_fixed_vs_pe_retimer_dp_link_output -ffffffff822a5590 t set_dio_fixed_vs_pe_retimer_dp_link_test_pattern -ffffffff822a6000 T can_use_dpia_link_hwss -ffffffff822a6050 T get_dpia_link_hwss -ffffffff822a6080 t update_dpia_stream_allocation_table -ffffffff822a7000 T set_hpo_dp_throttled_vcp_size -ffffffff822a7030 T set_hpo_dp_hblank_min_symbol_width -ffffffff822a7120 T setup_hpo_dp_stream_encoder -ffffffff822a7170 T reset_hpo_dp_stream_encoder -ffffffff822a7190 T setup_hpo_dp_stream_attribute -ffffffff822a7210 T enable_hpo_dp_link_output -ffffffff822a7290 T disable_hpo_dp_link_output -ffffffff822a7330 T update_hpo_dp_stream_allocation_table -ffffffff822a7350 T setup_hpo_dp_audio_output -ffffffff822a7390 T enable_hpo_dp_audio_packet -ffffffff822a73b0 T disable_hpo_dp_audio_packet -ffffffff822a7400 T can_use_hpo_dp_link_hwss -ffffffff822a7430 T get_hpo_dp_link_hwss -ffffffff822a7460 t set_hpo_dp_link_test_pattern -ffffffff822a74b0 t set_hpo_dp_lane_settings -ffffffff822a8000 T requires_fixed_vs_pe_retimer_hpo_link_hwss -ffffffff822a8040 T get_hpo_fixed_vs_pe_retimer_dp_link_hwss -ffffffff822a8070 t enable_hpo_fixed_vs_pe_retimer_dp_link_output -ffffffff822a80d0 t set_hpo_fixed_vs_pe_retimer_dp_link_test_pattern -ffffffff822a8450 t set_hpo_fixed_vs_pe_retimer_dp_lane_settings -ffffffff822a84d0 t dp_hpo_fixed_vs_pe_retimer_set_tx_ffe -ffffffff822a9000 T link_reset_cur_dp_mst_topology -ffffffff822a9060 T link_detect_connection_type -ffffffff822a9180 T link_detect -ffffffff822aaa40 T link_clear_dprx_states -ffffffff822aaa70 T link_is_hdcp14 -ffffffff822aaad0 T link_is_hdcp22 -ffffffff822aab40 T link_get_status -ffffffff822aab70 T link_add_remote_sink -ffffffff822aad10 T link_remove_remote_sink -ffffffff822aadf0 t wait_for_entering_dp_alt_mode -ffffffff822ab000 T link_blank_all_dp_displays -ffffffff822ab0d0 T link_blank_dp_stream -ffffffff822ab1e0 T link_blank_all_edp_displays -ffffffff822ab2a0 T link_set_all_streams_dpms_off_for_link -ffffffff822ab3a0 T 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smu_v13_0_set_azalia_d3_pme -ffffffff8239e460 T smu_v13_0_wait_for_event -ffffffff8239e4b0 T smu_v13_0_get_dpm_ultimate_freq -ffffffff8239e610 T smu_v13_0_set_soft_freq_limited_range -ffffffff8239e6e0 T smu_v13_0_set_performance_level -ffffffff8239ee40 T smu_v13_0_set_power_source -ffffffff8239eea0 T smu_v13_0_get_dpm_freq_by_index -ffffffff8239ef50 T smu_v13_0_set_single_dpm_table -ffffffff8239f240 T smu_v13_0_get_current_pcie_link_width_level -ffffffff8239f290 T smu_v13_0_get_current_pcie_link_width -ffffffff8239f2f0 T smu_v13_0_get_current_pcie_link_speed_level -ffffffff8239f340 T smu_v13_0_get_current_pcie_link_speed -ffffffff8239f390 T smu_v13_0_set_vcn_enable -ffffffff8239f450 T smu_v13_0_set_jpeg_enable -ffffffff8239f470 T smu_v13_0_run_btc -ffffffff8239f4f0 T smu_v13_0_gpo_control -ffffffff8239f580 T smu_v13_0_deep_sleep_control -ffffffff8239f7e0 T smu_v13_0_gfx_ulv_control -ffffffff8239f850 T smu_v13_0_baco_set_armd3_sequence -ffffffff8239f8c0 T smu_v13_0_baco_is_support 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sdmmc_io_send_op_cond -ffffffff825e1540 T sdmmc_io_scan -ffffffff825e1690 T sdmmc_io_init -ffffffff825e17c0 T sdmmc_io_set_highspeed -ffffffff825e1a60 T sdmmc_io_set_bus_width -ffffffff825e1cf0 T sdmmc_io_function_ready -ffffffff825e1e70 T sdmmc_io_read_1 -ffffffff825e1fc0 T sdmmc_io_function_enable -ffffffff825e2390 T sdmmc_io_write_1 -ffffffff825e2510 T sdmmc_io_function_disable -ffffffff825e2790 T sdmmc_io_attach -ffffffff825e2880 T sdmmc_print -ffffffff825e2ad0 T sdmmc_submatch -ffffffff825e2b50 T sdmmc_io_detach -ffffffff825e2c00 T sdmmc_io_rw_direct -ffffffff825e2da0 T sdmmc_io_rw_extended_subr -ffffffff825e2f40 T sdmmc_io_rw_extended -ffffffff825e3340 T sdmmc_io_read_2 -ffffffff825e34a0 T sdmmc_io_write_2 -ffffffff825e3600 T sdmmc_io_read_4 -ffffffff825e3760 T sdmmc_io_write_4 -ffffffff825e38c0 T sdmmc_io_read_multi_1 -ffffffff825e39b0 T sdmmc_io_write_multi_1 -ffffffff825e3aa0 T sdmmc_io_read_region_1 -ffffffff825e3b90 T sdmmc_io_write_region_1 -ffffffff825e3c80 T sdmmc_io_xchg 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sdmmc_mem_select_transfer_mode -ffffffff825e7880 T sdmmc_mem_execute_tuning -ffffffff825e7910 T sdmmc_mem_read_block_subr -ffffffff825e7c70 T sdmmc_mem_single_read_block -ffffffff825e7d40 T sdmmc_mem_read_block -ffffffff825e7ef0 T sdmmc_mem_write_block_subr -ffffffff825e8240 T sdmmc_mem_single_write_block -ffffffff825e8310 T sdmmc_mem_write_block -ffffffff825e84c0 T sdmmc_mem_hibernate_write -ffffffff825e9000 T sdmmc_scsi_cmd -ffffffff825e91f0 T sdmmc_minphys -ffffffff825e9270 T sdmmc_scsi_attach -ffffffff825e9460 T sdmmc_alloc_ccbs -ffffffff825e95a0 T sdmmc_free_ccbs -ffffffff825e9600 T sdmmc_scsi_detach -ffffffff825e9760 T sdmmc_stimeout -ffffffff825e97e0 T sdmmc_ccb_alloc -ffffffff825e9890 T sdmmc_ccb_free -ffffffff825e9970 T sdmmc_inquiry -ffffffff825e9be0 T sdmmc_start_xs -ffffffff825e9cd0 T sdmmc_complete_xs -ffffffff825e9da0 T sdmmc_done_xs -ffffffff825e9df0 T sdmmc_scsi_hibernate_io -ffffffff825ea000 T bwfm_sdio_preinit -ffffffff825ea4a0 T bwfm_sdio_txcheck -ffffffff825ea4e0 T bwfm_sdio_txdata -ffffffff825ea550 T bwfm_sdio_txctl -ffffffff825ea6a0 T bwfm_sdio_buscore_read -ffffffff825ea6b0 T bwfm_sdio_buscore_write -ffffffff825ea6d0 T bwfm_sdio_buscore_prepare -ffffffff825ea810 T bwfm_sdio_buscore_activate -ffffffff825ea890 T bwfm_sdio_match -ffffffff825ea940 T bwfm_sdio_attach -ffffffff825eac00 T bwfm_sdio_detach -ffffffff825eac60 T bwfm_sdio_task -ffffffff825eadc0 T bwfm_sdio_write_1 -ffffffff825eadf0 T bwfm_sdio_read_1 -ffffffff825eae20 T bwfm_sdio_write_4 -ffffffff825eaed0 T bwfm_sdio_read_4 -ffffffff825eaf80 T bwfm_sdio_load_microcode -ffffffff825eb1e0 T bwfm_sdio_clkctl -ffffffff825eb310 T bwfm_sdio_dev_write -ffffffff825eb360 T bwfm_sdio_intr -ffffffff825eb3a0 T bwfm_sdio_ram_read_write -ffffffff825eb5d0 T bwfm_sdio_htclk -ffffffff825eb840 T bwfm_sdio_readshared -ffffffff825eb910 T bwfm_sdio_dev_read -ffffffff825eb950 T bwfm_sdio_rx_frames -ffffffff825ebd00 T bwfm_sdio_tx_frames -ffffffff825ebe00 T bwfm_sdio_backplane -ffffffff825ebeb0 T bwfm_sdio_buf_read -ffffffff825ebf90 T bwfm_sdio_buf_write -ffffffff825ec040 T bwfm_sdio_frame_read_write -ffffffff825ec1c0 T bwfm_sdio_newbuf -ffffffff825ec240 T bwfm_sdio_tx_ok -ffffffff825ec2a0 T bwfm_sdio_tx_ctrlframe -ffffffff825ec3a0 T bwfm_sdio_tx_dataframe -ffffffff825ec4f0 T bwfm_sdio_rx_glom -ffffffff825ed000 T onewire_match -ffffffff825ed050 T onewire_attach -ffffffff825ed0f0 T onewire_detach -ffffffff825ed160 T onewire_activate -ffffffff825ed180 T onewire_scan -ffffffff825ed3a0 T onewire_createthread -ffffffff825ed410 T onewire_print -ffffffff825ed4e0 T onewirebus_print -ffffffff825ed530 T onewire_lock -ffffffff825ed550 T onewire_unlock -ffffffff825ed570 T onewire_reset -ffffffff825ed590 T onewire_bit -ffffffff825ed5b0 T onewire_read_byte -ffffffff825ed6f0 T onewire_write_byte -ffffffff825ed7d0 T onewire_read_block -ffffffff825ed870 T onewire_write_block -ffffffff825ed910 T onewire_triplet -ffffffff825ed9f0 T onewire_matchrom -ffffffff825edb40 T onewire_search -ffffffff825edee0 T onewire_thread -ffffffff825ee000 T onewire_crc -ffffffff825ee0b0 T onewire_crc16 -ffffffff825ee170 T onewire_famname -ffffffff825ee1b0 T onewire_matchbyfam -ffffffff825ef000 T owid_match -ffffffff825ef030 T owid_attach -ffffffff825ef100 T owid_detach -ffffffff825ef140 T owid_activate -ffffffff825f0000 T owsbm_match -ffffffff825f0030 T owsbm_attach -ffffffff825f01d0 T owsbm_detach -ffffffff825f0240 T owsbm_activate -ffffffff825f0270 T owsbm_update -ffffffff825f1000 T owtemp_match -ffffffff825f1030 T owtemp_attach -ffffffff825f1130 T owtemp_detach -ffffffff825f11a0 T owtemp_activate -ffffffff825f11d0 T owtemp_update -ffffffff825f2000 T owctr_match -ffffffff825f2030 T owctr_attach -ffffffff825f2180 T owctr_detach -ffffffff825f21f0 T owctr_activate -ffffffff825f2220 T owctr_update -ffffffff825f2250 T owctr_update_counter -ffffffff825f3000 A __text_page_start -ffffffff825f3000 T Xsyscall_meltdown -ffffffff825f300c T Xsyscall -ffffffff825f326e t Xsyscall_trampback -ffffffff825f3280 T intr_user_exit -ffffffff825f32c2 t intr_user_exit_post_ast -ffffffff825f33ee t Xiretq_trampback -ffffffff825f33fa T doreti_iret -ffffffff825f4000 T alltraps -ffffffff825f4138 T recall_trap -ffffffff825f4150 T alltraps_kern -ffffffff825f4153 T alltraps_kern_meltdown -ffffffff825f5000 ? Xsyscall32 -ffffffff825f5000 A __kutext_start -ffffffff825f5000 A __text_page_end -ffffffff825f6000 ? Xtrap00 -ffffffff825f6010 ? Xtrap01 -ffffffff825f6020 ? Xtrap02 -ffffffff825f6028 c calltrap_specstk -ffffffff825f60f0 ? calltrap_specstk_tramp -ffffffff825f6110 ? Xtrap03 -ffffffff825f6120 ? Xtrap04 -ffffffff825f6130 ? Xtrap05 -ffffffff825f6140 ? Xtrap06 -ffffffff825f6150 ? Xtrap07 -ffffffff825f6160 ? Xtrap08 -ffffffff825f6170 ? Xtrap09 -ffffffff825f6180 ? Xtrap0a -ffffffff825f6190 ? Xtrap0b -ffffffff825f61a0 ? Xtrap0c -ffffffff825f61b0 ? Xtrap0d -ffffffff825f6240 ? Xtrap0e -ffffffff825f6250 ? Xintrspurious -ffffffff825f6250 ? Xtrap0f -ffffffff825f6260 ? Xtrap10 -ffffffff825f6270 ? Xtrap11 -ffffffff825f6280 ? Xtrap12 -ffffffff825f6290 ? Xtrap13 -ffffffff825f62a0 ? Xtrap14 -ffffffff825f62b0 ? Xtrap15 -ffffffff825f62c0 ? Xtrap16 -ffffffff825f62c0 ? Xtrap17 -ffffffff825f62c0 ? Xtrap18 -ffffffff825f62c0 ? Xtrap19 -ffffffff825f62c0 ? Xtrap1a -ffffffff825f62c0 ? Xtrap1b -ffffffff825f62c0 ? Xtrap1c -ffffffff825f62c0 ? Xtrap1d -ffffffff825f62c0 ? Xtrap1e -ffffffff825f62c0 ? Xtrap1f -ffffffff825f62d0 ? x2apic_eoi -ffffffff825f62f0 ? Xintr_lapic_ipi -ffffffff825f6330 ? Xipi_invltlb -ffffffff825f6360 ? Xipi_invlpg -ffffffff825f6390 ? Xipi_invlrange -ffffffff825f63d0 ? Xipi_invltlb_pcid -ffffffff825f6410 ? Xipi_invlpg_pcid -ffffffff825f6460 ? Xipi_invlrange_pcid -ffffffff825f64d0 ? Xintr_lapic_ltimer -ffffffff825f6510 ? Xintr_xen_upcall -ffffffff825f6550 ? Xintr_hyperv_upcall -ffffffff825f6590 ? Xintr_legacy0 -ffffffff825f65d0 ? Xintr_legacy1 -ffffffff825f6610 ? Xintr_legacy2 -ffffffff825f6650 ? Xintr_legacy3 -ffffffff825f6690 ? Xintr_legacy4 -ffffffff825f66d0 ? Xintr_legacy5 -ffffffff825f6710 ? Xintr_legacy6 -ffffffff825f6750 ? Xintr_legacy7 -ffffffff825f6790 ? Xintr_legacy8 -ffffffff825f67d0 ? Xintr_legacy9 -ffffffff825f6810 ? Xintr_legacy10 -ffffffff825f6850 ? Xintr_legacy11 -ffffffff825f6890 ? Xintr_legacy12 -ffffffff825f68d0 ? Xintr_legacy13 -ffffffff825f6910 ? Xintr_legacy14 -ffffffff825f6950 ? Xintr_legacy15 -ffffffff825f6990 ? Xintr_ioapic_edge0 -ffffffff825f69d0 ? Xintr_ioapic_edge1 -ffffffff825f6a10 ? Xintr_ioapic_edge2 -ffffffff825f6a50 ? Xintr_ioapic_edge3 -ffffffff825f6a90 ? Xintr_ioapic_edge4 -ffffffff825f6ad0 ? Xintr_ioapic_edge5 -ffffffff825f6b10 ? Xintr_ioapic_edge6 -ffffffff825f6b50 ? Xintr_ioapic_edge7 -ffffffff825f6b90 ? Xintr_ioapic_edge8 -ffffffff825f6bd0 ? Xintr_ioapic_edge9 -ffffffff825f6c10 ? Xintr_ioapic_edge10 -ffffffff825f6c50 ? Xintr_ioapic_edge11 -ffffffff825f6c90 ? Xintr_ioapic_edge12 -ffffffff825f6cd0 ? Xintr_ioapic_edge13 -ffffffff825f6d10 ? Xintr_ioapic_edge14 -ffffffff825f6d50 ? Xintr_ioapic_edge15 -ffffffff825f6d90 ? Xintr_ioapic_edge16 -ffffffff825f6dd0 ? Xintr_ioapic_edge17 -ffffffff825f6e10 ? Xintr_ioapic_edge18 -ffffffff825f6e50 ? Xintr_ioapic_edge19 -ffffffff825f6e90 ? Xintr_ioapic_edge20 -ffffffff825f6ed0 ? Xintr_ioapic_edge21 -ffffffff825f6f10 ? Xintr_ioapic_edge22 -ffffffff825f6f50 ? Xintr_ioapic_edge23 -ffffffff825f6f90 ? Xintr_ioapic_edge24 -ffffffff825f6fd0 ? Xintr_ioapic_edge25 -ffffffff825f7010 ? Xintr_ioapic_edge26 -ffffffff825f7050 ? Xintr_ioapic_edge27 -ffffffff825f7090 ? Xintr_ioapic_edge28 -ffffffff825f70d0 ? Xintr_ioapic_edge29 -ffffffff825f7110 ? Xintr_ioapic_edge30 -ffffffff825f7150 ? Xintr_ioapic_edge31 -ffffffff825f7190 ? Xintr_ioapic_edge32 -ffffffff825f71d0 ? Xintr_ioapic_edge33 -ffffffff825f7210 ? Xintr_ioapic_edge34 -ffffffff825f7250 ? Xintr_ioapic_edge35 -ffffffff825f7290 ? Xintr_ioapic_edge36 -ffffffff825f72d0 ? Xintr_ioapic_edge37 -ffffffff825f7310 ? Xintr_ioapic_edge38 -ffffffff825f7350 ? Xintr_ioapic_edge39 -ffffffff825f7390 ? Xintr_ioapic_edge40 -ffffffff825f73d0 ? Xintr_ioapic_edge41 -ffffffff825f7410 ? Xintr_ioapic_edge42 -ffffffff825f7450 ? Xintr_ioapic_edge43 -ffffffff825f7490 ? Xintr_ioapic_edge44 -ffffffff825f74d0 ? Xintr_ioapic_edge45 -ffffffff825f7510 ? Xintr_ioapic_edge46 -ffffffff825f7550 ? Xintr_ioapic_edge47 -ffffffff825f7590 ? Xintr_ioapic_edge48 -ffffffff825f75d0 ? Xintr_ioapic_edge49 -ffffffff825f7610 ? Xintr_ioapic_edge50 -ffffffff825f7650 ? Xintr_ioapic_edge51 -ffffffff825f7690 ? Xintr_ioapic_edge52 -ffffffff825f76d0 ? Xintr_ioapic_edge53 -ffffffff825f7710 ? Xintr_ioapic_edge54 -ffffffff825f7750 ? Xintr_ioapic_edge55 -ffffffff825f7790 ? Xintr_ioapic_edge56 -ffffffff825f77d0 ? Xintr_ioapic_edge57 -ffffffff825f7810 ? Xintr_ioapic_edge58 -ffffffff825f7850 ? Xintr_ioapic_edge59 -ffffffff825f7890 ? Xintr_ioapic_edge60 -ffffffff825f78d0 ? Xintr_ioapic_edge61 -ffffffff825f7910 ? Xintr_ioapic_edge62 -ffffffff825f7950 ? Xintr_ioapic_edge63 -ffffffff825f7990 ? Xintr_ioapic_level0 -ffffffff825f79d0 ? Xintr_ioapic_level1 -ffffffff825f7a10 ? Xintr_ioapic_level2 -ffffffff825f7a50 ? Xintr_ioapic_level3 -ffffffff825f7a90 ? Xintr_ioapic_level4 -ffffffff825f7ad0 ? Xintr_ioapic_level5 -ffffffff825f7b10 ? Xintr_ioapic_level6 -ffffffff825f7b50 ? Xintr_ioapic_level7 -ffffffff825f7b90 ? Xintr_ioapic_level8 -ffffffff825f7bd0 ? Xintr_ioapic_level9 -ffffffff825f7c10 ? Xintr_ioapic_level10 -ffffffff825f7c50 ? Xintr_ioapic_level11 -ffffffff825f7c90 ? Xintr_ioapic_level12 -ffffffff825f7cd0 ? Xintr_ioapic_level13 -ffffffff825f7d10 ? Xintr_ioapic_level14 -ffffffff825f7d50 ? Xintr_ioapic_level15 -ffffffff825f7d90 ? Xintr_ioapic_level16 -ffffffff825f7dd0 ? Xintr_ioapic_level17 -ffffffff825f7e10 ? Xintr_ioapic_level18 -ffffffff825f7e50 ? Xintr_ioapic_level19 -ffffffff825f7e90 ? Xintr_ioapic_level20 -ffffffff825f7ed0 ? Xintr_ioapic_level21 -ffffffff825f7f10 ? Xintr_ioapic_level22 -ffffffff825f7f50 ? Xintr_ioapic_level23 -ffffffff825f7f90 ? Xintr_ioapic_level24 -ffffffff825f7fd0 ? Xintr_ioapic_level25 -ffffffff825f8010 ? Xintr_ioapic_level26 -ffffffff825f8050 ? Xintr_ioapic_level27 -ffffffff825f8090 ? Xintr_ioapic_level28 -ffffffff825f80d0 ? Xintr_ioapic_level29 -ffffffff825f8110 ? Xintr_ioapic_level30 -ffffffff825f8150 ? Xintr_ioapic_level31 -ffffffff825f8190 ? Xintr_ioapic_level32 -ffffffff825f81d0 ? Xintr_ioapic_level33 -ffffffff825f8210 ? Xintr_ioapic_level34 -ffffffff825f8250 ? Xintr_ioapic_level35 -ffffffff825f8290 ? Xintr_ioapic_level36 -ffffffff825f82d0 ? Xintr_ioapic_level37 -ffffffff825f8310 ? Xintr_ioapic_level38 -ffffffff825f8350 ? Xintr_ioapic_level39 -ffffffff825f8390 ? Xintr_ioapic_level40 -ffffffff825f83d0 ? Xintr_ioapic_level41 -ffffffff825f8410 ? Xintr_ioapic_level42 -ffffffff825f8450 ? Xintr_ioapic_level43 -ffffffff825f8490 ? Xintr_ioapic_level44 -ffffffff825f84d0 ? Xintr_ioapic_level45 -ffffffff825f8510 ? Xintr_ioapic_level46 -ffffffff825f8550 ? Xintr_ioapic_level47 -ffffffff825f8590 ? Xintr_ioapic_level48 -ffffffff825f85d0 ? Xintr_ioapic_level49 -ffffffff825f8610 ? Xintr_ioapic_level50 -ffffffff825f8650 ? Xintr_ioapic_level51 -ffffffff825f8690 ? Xintr_ioapic_level52 -ffffffff825f86d0 ? Xintr_ioapic_level53 -ffffffff825f8710 ? Xintr_ioapic_level54 -ffffffff825f8750 ? Xintr_ioapic_level55 -ffffffff825f8790 ? Xintr_ioapic_level56 -ffffffff825f87d0 ? Xintr_ioapic_level57 -ffffffff825f8810 ? Xintr_ioapic_level58 -ffffffff825f8850 ? Xintr_ioapic_level59 -ffffffff825f8890 ? Xintr_ioapic_level60 -ffffffff825f88d0 ? Xintr_ioapic_level61 -ffffffff825f8910 ? Xintr_ioapic_level62 -ffffffff825f8950 ? Xintr_ioapic_level63 -ffffffff825f9000 ? codepatch_fill_nop -ffffffff825f9000 A __cptext_start -ffffffff825f9000 A __kutext_end -ffffffff825f90b0 ? codepatch_maprw -ffffffff825f9190 ? codepatch_unmaprw -ffffffff825f9200 ? codepatch_nop -ffffffff825f9360 ? codepatch_replace -ffffffff825f9510 ? codepatch_call -ffffffff825f9530 ? codepatch_jmp -ffffffff825fa000 A __cptext_end -ffffffff825fa000 A __rodata_start -ffffffff825fa000 C _etext -ffffffff825fa000 C etext -ffffffff825fb000 r seeprom_read -ffffffff825fb004 r icl_mg_pll_find_divisors.div1_vals -ffffffff825fb034 r athn_ac2qid -ffffffff825fb034 r athn_ac2qid -ffffffff825fb034 r athn_ac2qid -ffffffff825fb040 r rtwn_get_rssi.cckoff -ffffffff825fb068 r rsu_ac2qid -ffffffff825fb078 r pckbc_portcmd -ffffffff825fb07c r tht_fifo_write_pad.pad -ffffffff825fb084 r rsu_get_rssi.cckoff -ffffffff825fb0a4 r adlp_n_revids -ffffffff825fb0e8 r apple_iso_trans -ffffffff825fb0f0 r wihap_check_tx.txratetable -ffffffff825fb0f4 r dmamode -ffffffff825fb118 r gen9_edram_size_mb.sets -ffffffff825fb12c r dg2_g12_revid_step_tbl -ffffffff825fc000 r isomappings -ffffffff825fc080 r unimappings -ffffffff825fc230 r replacements -ffffffff825ff93f r apollo_pio_rec -ffffffff8264bf55 r apollo_udma33_tim -ffffffff82661064 r pp_r600_decoded_lanes -ffffffff826971ba r cmd680_setup_channel.udma_tbl -ffffffff8269f65c r apollo_udma100_tim -ffffffff8269f662 r cmd0646_9_tim_udma -ffffffff826adab2 r substchar -ffffffff8270359a r apollo_udma133_tim -ffffffff827035a1 r apollo_udma66_tim -ffffffff827035cb r cy_pio_rec -ffffffff82708cb8 R drm_ca -ffffffff82708ce0 R drm_filtops -ffffffff82708d10 R drmread_filtops -ffffffff82709000 r vga_emulops -ffffffff82709048 R vga_stdscreen -ffffffff82709078 R vga_stdscreen_mono -ffffffff827090a8 R vga_stdscreen_bf -ffffffff827090d8 R vga_40lscreen -ffffffff82709108 R vga_40lscreen_mono -ffffffff82709138 R vga_40lscreen_bf -ffffffff82709168 R vga_50lscreen -ffffffff82709198 R vga_50lscreen_mono -ffffffff827091c8 R vga_50lscreen_bf -ffffffff827091f8 R vga_screenlist -ffffffff82709208 R vga_screenlist_mono -ffffffff82709218 R vga_accessops -ffffffff82709278 r i945_wm_info -ffffffff827092b8 r bgansitopc -ffffffff827092c0 r pctoansi -ffffffff82709300 r sdma_offsets -ffffffff82709300 r sdma_offsets -ffffffff82709338 r iha_rate_tbl -ffffffff82709370 r i830_a_wm_info -ffffffff827093a8 r gen9_edram_size_mb.ways -ffffffff82709408 r aggr_periodic_times -ffffffff82709500 r michael_final.pad -ffffffff82709528 r rt_copysa.maskarray -ffffffff82709530 r i915_wm_info -ffffffff82709538 r amdgpu_ih_clientid_jpeg -ffffffff82709538 r amdgpu_ih_clientid_uvds -ffffffff82709538 r amdgpu_ih_clientid_vcns -ffffffff82709538 r amdgpu_ih_clientid_vcns -ffffffff82709538 r amdgpu_ih_clientid_vcns -ffffffff82709568 r jsl_ehl_revids -ffffffff82709578 r vga_setfontset.cmaptabb -ffffffff827095e8 r i830_bc_wm_info -ffffffff82709650 r hsw_activate_psr2.map -ffffffff82709658 r tgl_revids -ffffffff82709690 r __drm_universal_plane_init.default_modifiers -ffffffff827096a0 r iwn_tid2fifo -ffffffff827096b8 r vga_setfontset.cmaptaba -ffffffff827096c0 r crtc_offsets -ffffffff827096c0 r crtc_offsets -ffffffff827096c0 r crtc_offsets -ffffffff82709768 r rtwn_r88e_get_rssi.cckoff -ffffffff8270a000 R edid_vendors -ffffffff8270a2c0 R edid_nvendors -ffffffff8270a2d0 R edid_products -ffffffff8270a330 R edid_nproducts -ffffffff8270a340 r _edid_modes -ffffffff8270b000 R videomode_list -ffffffff8270c080 R videomode_count -ffffffff8270d000 r ahc_hard_errors -ffffffff8270d080 r critical_sections -ffffffff8270d0b0 r patches -ffffffff8270dd50 r seqprog -ffffffff8270f000 r ahc_switch -ffffffff82710000 r termstat_strings -ffffffff82710020 r critical_sections -ffffffff82710060 r seqprog -ffffffff82710d50 r patches -ffffffff82712000 r ahd_switch -ffffffff82713000 R aic_switch -ffffffff82714000 R adw_switch -ffffffff82715000 R gdt_switch -ffffffff82716000 R twe_switch -ffffffff82717000 R ciss_switch -ffffffff82717030 R ciss_level -ffffffff82717050 R ciss_stat -ffffffff82718000 R ami_switch -ffffffff82718028 R ami_raw_switch -ffffffff82719000 R mfi_switch -ffffffff82719028 R mfi_pd_switch -ffffffff82719050 r mfi_iop_xscale -ffffffff82719080 r mfi_iop_ppc -ffffffff827190b0 r mfi_iop_gen2 -ffffffff827190e0 r mfi_iop_skinny -ffffffff82719110 r mfi_bbu_indicators -ffffffff8271a000 R qlw_switch -ffffffff8271b000 R isp_2100_risc_code -ffffffff8272dbf0 R isp_2200_risc_code -ffffffff82740990 R isp_2300_risc_code -ffffffff8275a408 R qla_switch -ffffffff8275a430 r qla_regs_2100 -ffffffff8275a460 r qla_regs_2200 -ffffffff8275a490 r qla_regs_23XX -ffffffff8275b000 R ahci_atascsi_methods -ffffffff8275c000 R nvme_switch -ffffffff8275c028 r nvme_ops -ffffffff8275d000 R mpi_switch -ffffffff8275d060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs -ffffffff8275d090 r chv_oa_mux_regs -ffffffff8275d0b0 r fiji_clock_stretcher_lookup_table -ffffffff8275d0b0 r tonga_clock_stretcher_lookup_table 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dp_trace_is_initialized +ffffffff822a3160 T dp_trace_detect_lt_init +ffffffff822a31b0 T dp_trace_commit_lt_init +ffffffff822a3200 T dp_trace_link_loss_increment +ffffffff822a3230 T dp_trace_lt_fail_count_update +ffffffff822a3270 T dp_trace_lt_total_count_increment +ffffffff822a32b0 T dp_trace_set_is_logged_flag +ffffffff822a32f0 T dp_trace_is_logged +ffffffff822a3330 T dp_trace_lt_result_update +ffffffff822a3370 T dp_trace_set_lt_start_timestamp +ffffffff822a3450 T dp_trace_set_lt_end_timestamp +ffffffff822a3530 T dp_trace_get_lt_end_timestamp +ffffffff822a3570 T dp_trace_get_lt_counts +ffffffff822a35b0 T dp_trace_get_link_loss_count +ffffffff822a35e0 T dp_trace_set_edp_power_timestamp +ffffffff822a36c0 T dp_trace_get_edp_poweron_timestamp +ffffffff822a36f0 T dp_trace_get_edp_poweroff_timestamp +ffffffff822a3720 T dp_trace_source_sequence +ffffffff822a4000 T dp_fpga_hpo_enable_link_and_stream +ffffffff822a5000 T set_dio_throttled_vcp_size +ffffffff822a5020 T setup_dio_stream_encoder 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set_dio_fixed_vs_pe_retimer_dp_link_test_pattern +ffffffff822a7000 T can_use_dpia_link_hwss +ffffffff822a7050 T get_dpia_link_hwss +ffffffff822a7080 t update_dpia_stream_allocation_table +ffffffff822a8000 T set_hpo_dp_throttled_vcp_size +ffffffff822a8030 T set_hpo_dp_hblank_min_symbol_width +ffffffff822a8120 T setup_hpo_dp_stream_encoder +ffffffff822a8170 T reset_hpo_dp_stream_encoder +ffffffff822a8190 T setup_hpo_dp_stream_attribute +ffffffff822a8210 T enable_hpo_dp_link_output +ffffffff822a8290 T disable_hpo_dp_link_output +ffffffff822a8330 T update_hpo_dp_stream_allocation_table +ffffffff822a8350 T setup_hpo_dp_audio_output +ffffffff822a8390 T enable_hpo_dp_audio_packet +ffffffff822a83b0 T disable_hpo_dp_audio_packet +ffffffff822a8400 T can_use_hpo_dp_link_hwss +ffffffff822a8430 T get_hpo_dp_link_hwss +ffffffff822a8460 t set_hpo_dp_link_test_pattern +ffffffff822a84b0 t set_hpo_dp_lane_settings +ffffffff822a9000 T requires_fixed_vs_pe_retimer_hpo_link_hwss +ffffffff822a9040 T get_hpo_fixed_vs_pe_retimer_dp_link_hwss +ffffffff822a9070 t enable_hpo_fixed_vs_pe_retimer_dp_link_output +ffffffff822a90d0 t set_hpo_fixed_vs_pe_retimer_dp_link_test_pattern +ffffffff822a9450 t set_hpo_fixed_vs_pe_retimer_dp_lane_settings +ffffffff822a94d0 t dp_hpo_fixed_vs_pe_retimer_set_tx_ffe +ffffffff822aa000 T link_reset_cur_dp_mst_topology +ffffffff822aa060 T link_detect_connection_type +ffffffff822aa180 T link_detect +ffffffff822aba40 T link_clear_dprx_states +ffffffff822aba70 T link_is_hdcp14 +ffffffff822abad0 T link_is_hdcp22 +ffffffff822abb40 T link_get_status +ffffffff822abb70 T link_add_remote_sink +ffffffff822abd10 T link_remove_remote_sink +ffffffff822abdf0 t wait_for_entering_dp_alt_mode +ffffffff822ac000 T link_blank_all_dp_displays +ffffffff822ac0d0 T link_blank_dp_stream +ffffffff822ac1e0 T link_blank_all_edp_displays +ffffffff822ac2a0 T link_set_all_streams_dpms_off_for_link +ffffffff822ac3a0 T link_get_master_pipes_with_dpms_on +ffffffff822ac560 T link_resume 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link_destroy_link_service +ffffffff822b24c0 T link_create +ffffffff822b3470 T link_destroy +ffffffff822b4000 T link_get_cur_link_res +ffffffff822b4150 T link_get_cur_res_map +ffffffff822b4230 T link_restore_res_map +ffffffff822b5000 T dp_link_bandwidth_kbps +ffffffff822b50a0 T link_validate_mode_timing +ffffffff822b5680 t get_tmds_output_pixel_clock_100hz +ffffffff822b56f0 T link_validate_dpia_bandwidth +ffffffff822b6000 T link_create_ddc_service +ffffffff822b6170 T link_destroy_ddc_service +ffffffff822b6200 T set_ddc_transaction_type +ffffffff822b6230 T link_is_in_aux_transaction_mode +ffffffff822b6270 T set_dongle_type +ffffffff822b62a0 T link_get_aux_defer_delay +ffffffff822b63d0 T link_query_ddc_data +ffffffff822b6780 T link_aux_transfer_raw +ffffffff822b67b0 T link_get_fixed_vs_pe_retimer_write_address +ffffffff822b6840 T link_get_fixed_vs_pe_retimer_read_address +ffffffff822b68d0 T link_configure_fixed_vs_pe_retimer +ffffffff822b69a0 T link_aux_transfer_with_retries_no_mutex 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dp_perform_fixed_vs_pe_training_sequence_legacy +ffffffff822c7a10 t perform_fixed_vs_pe_nontransparent_training_sequence +ffffffff822c7bd0 T dp_perform_fixed_vs_pe_training_sequence +ffffffff822c9000 T core_link_read_dpcd +ffffffff822c91a0 T core_link_write_dpcd +ffffffff822ca000 T dp_set_panel_mode +ffffffff822ca120 T dp_get_panel_mode +ffffffff822ca1e0 T edp_set_backlight_level_nits +ffffffff822ca2e0 T edp_get_backlight_level_nits +ffffffff822ca370 T edp_backlight_enable_aux +ffffffff822ca3e0 T set_default_brightness_aux +ffffffff822ca4b0 T edp_is_ilr_optimization_enabled +ffffffff822ca4f0 T get_max_link_rate_from_ilr_table +ffffffff822ca5d0 T edp_is_ilr_optimization_required +ffffffff822ca770 T edp_panel_backlight_power_on +ffffffff822ca820 T edp_set_panel_power +ffffffff822ca920 T edp_wait_for_t12 +ffffffff822ca980 T edp_add_delay_for_T9 +ffffffff822ca9d0 T edp_receiver_ready_T9 +ffffffff822caa90 T edp_receiver_ready_T7 +ffffffff822cac30 T edp_power_alpm_dpcd_enable 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mod_build_adaptive_sync_infopacket +ffffffff822f44a0 T mod_build_adaptive_sync_infopacket_v2 +ffffffff822f4510 T mod_build_adaptive_sync_infopacket_v1 +ffffffff822f5000 T dmub_init_abm_config +ffffffff822f5550 t fill_iram_v_2_3 +ffffffff822f59e0 T dmcu_load_iram +ffffffff822f61d0 T is_psr_su_specific_panel +ffffffff822f6270 T mod_power_calc_psr_configs +ffffffff822f6360 T init_replay_config +ffffffff822f63b0 T mod_power_only_edp +ffffffff822f6400 T psr_su_set_dsc_slice_height +ffffffff822f64e0 T fill_custom_backlight_caps +ffffffff822f7000 T mod_vmid_get_for_ptb +ffffffff822f7220 T mod_vmid_reset +ffffffff822f72e0 T mod_vmid_create +ffffffff822f7420 T mod_vmid_destroy +ffffffff822f8000 T amdgpu_dpm_get_sclk +ffffffff822f8090 T amdgpu_dpm_get_mclk +ffffffff822f8120 T amdgpu_dpm_set_powergating_by_smu +ffffffff822f8200 T amdgpu_dpm_set_gfx_power_up_by_imu +ffffffff822f8310 T amdgpu_dpm_baco_enter +ffffffff822f83a0 T amdgpu_dpm_baco_exit +ffffffff822f8430 T amdgpu_dpm_set_mp1_state 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amdgpu_dpm_enable_jpeg +ffffffff822f9520 T amdgpu_pm_load_smu_firmware +ffffffff822f95d0 T amdgpu_dpm_handle_passthrough_sbr +ffffffff822f9650 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff822f96d0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff822f9750 T amdgpu_dpm_get_dpm_freq_range +ffffffff822f97f0 T amdgpu_dpm_set_soft_freq_range +ffffffff822f9890 T amdgpu_dpm_write_watermarks_table +ffffffff822f9910 T amdgpu_dpm_wait_for_event +ffffffff822f99a0 T amdgpu_dpm_set_residency_gfxoff +ffffffff822f9a20 T amdgpu_dpm_get_residency_gfxoff +ffffffff822f9aa0 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff822f9b20 T amdgpu_dpm_get_status_gfxoff +ffffffff822f9ba0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff822f9bf0 T amdgpu_dpm_gfx_state_change +ffffffff822f9c60 T amdgpu_dpm_get_ecc_info +ffffffff822f9ce0 T amdgpu_dpm_get_vce_clock_state +ffffffff822f9d70 T amdgpu_dpm_get_current_power_state +ffffffff822f9de0 T amdgpu_dpm_set_power_state +ffffffff822f9f40 T amdgpu_dpm_dispatch_task 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amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff822fb8d0 T amdgpu_dpm_display_clock_voltage_request +ffffffff822fb960 T amdgpu_dpm_get_current_clocks +ffffffff822fb9f0 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff822fba70 T amdgpu_dpm_set_active_display_count +ffffffff822fbb00 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff822fbb90 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff822fbc30 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff822fbcd0 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff822fbd60 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff822fbdf0 T amdgpu_dpm_get_uclk_dpm_states +ffffffff822fbe90 T amdgpu_dpm_get_dpm_clock_table +ffffffff822fc000 T amdgpu_dpm_get_active_displays +ffffffff822fc0a0 T amdgpu_dpm_get_vblank_time +ffffffff822fc150 T amdgpu_dpm_get_vrefresh +ffffffff822fd000 T amdgpu_pm_sysfs_init +ffffffff822fd030 T amdgpu_pm_sysfs_fini +ffffffff822fd060 T amdgpu_debugfs_pm_init +ffffffff822fe000 T amdgpu_dpm_print_class_info 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pp_set_powergating_state +ffffffff82300590 t pp_dpm_set_fan_control_mode +ffffffff82300600 t pp_dpm_get_fan_control_mode +ffffffff82300670 t pp_dpm_set_fan_speed_pwm +ffffffff823006d0 t pp_dpm_get_fan_speed_pwm +ffffffff82300730 t pp_dpm_force_clock_level +ffffffff82300790 t pp_dpm_print_clock_levels +ffffffff823007f0 t pp_dpm_emit_clock_levels +ffffffff82300850 t pp_dpm_force_performance_level +ffffffff823008f0 t pp_dpm_get_sclk_od +ffffffff82300950 t pp_dpm_set_sclk_od +ffffffff823009b0 t pp_dpm_get_mclk_od +ffffffff82300a10 t pp_dpm_set_mclk_od +ffffffff82300a70 t pp_dpm_read_sensor +ffffffff82300b30 t pp_dpm_get_performance_level +ffffffff82300b70 t pp_dpm_get_current_power_state +ffffffff82300bf0 t pp_dpm_get_fan_speed_rpm +ffffffff82300c50 t pp_dpm_set_fan_speed_rpm +ffffffff82300cb0 t pp_dpm_get_pp_num_states +ffffffff82300df0 t pp_dpm_get_pp_table +ffffffff82300e40 t pp_dpm_set_pp_table +ffffffff82300f70 t pp_dpm_switch_power_profile +ffffffff823010b0 t pp_dpm_get_vce_clock_state +ffffffff82301100 t pp_dpm_dispatch_tasks +ffffffff82301140 t pp_dpm_load_fw +ffffffff823011b0 t pp_dpm_fw_loading_complete +ffffffff823011e0 t pp_set_powergating_by_smu +ffffffff82301360 t pp_set_clockgating_by_smu +ffffffff823013d0 t pp_set_power_limit +ffffffff82301490 t pp_get_power_limit +ffffffff82301530 t pp_get_power_profile_mode +ffffffff82301590 t pp_set_power_profile_mode +ffffffff823015f0 t pp_set_fine_grain_clk_vol +ffffffff82301650 t pp_odn_edit_dpm_table +ffffffff823016b0 t pp_dpm_set_mp1_state +ffffffff82301710 t pp_smu_i2c_bus_access +ffffffff82301770 t pp_gfx_state_change_set +ffffffff823017d0 t pp_dpm_get_sclk +ffffffff82301820 t pp_dpm_get_mclk +ffffffff82301870 t pp_display_configuration_change +ffffffff823018c0 t pp_get_display_power_level +ffffffff82301900 t pp_get_current_clocks +ffffffff82301a20 t pp_get_clock_by_type +ffffffff82301a70 t pp_get_clock_by_type_with_latency +ffffffff82301ac0 t pp_get_clock_by_type_with_voltage +ffffffff82301b10 t pp_set_watermarks_for_clocks_ranges +ffffffff82301b50 t pp_display_clock_voltage_request +ffffffff82301b90 t pp_get_display_mode_validation_clocks +ffffffff82301bf0 t pp_notify_smu_enable_pwe +ffffffff82301c50 t pp_enable_mgpu_fan_boost +ffffffff82301cb0 t pp_set_active_display_count +ffffffff82301cf0 t pp_set_hard_min_dcefclk_by_freq +ffffffff82301d50 t pp_set_hard_min_fclk_by_freq +ffffffff82301db0 t pp_set_min_deep_sleep_dcefclk +ffffffff82301e10 t pp_get_asic_baco_capability +ffffffff82301e80 t pp_get_asic_baco_state +ffffffff82301ee0 t pp_set_asic_baco_state +ffffffff82301f50 t pp_get_ppfeature_status +ffffffff82301fb0 t pp_set_ppfeature_status +ffffffff82302000 t pp_asic_reset_mode_2 +ffffffff82302060 t pp_set_df_cstate +ffffffff823020c0 t pp_set_xgmi_pstate +ffffffff82302120 t pp_get_gpu_metrics +ffffffff82302180 t pp_get_prv_buffer_details +ffffffff82302200 t pp_pm_compute_clocks +ffffffff823022c0 t pp_swctf_delayed_work_handler +ffffffff82302400 t __delayed_work_tick +ffffffff82303000 T ci_baco_set_state +ffffffff82304000 T baco_program_registers +ffffffff823040d0 t baco_cmd_handler +ffffffff82304250 T soc15_baco_program_registers +ffffffff82305000 T fiji_baco_set_state +ffffffff82306000 T phm_setup_asic +ffffffff82306050 T phm_power_down_asic +ffffffff823060a0 T phm_set_power_state +ffffffff82306110 T phm_enable_dynamic_state_management +ffffffff823061c0 T phm_disable_dynamic_state_management +ffffffff82306260 T phm_force_dpm_levels +ffffffff823062b0 T phm_apply_state_adjust_rules +ffffffff82306300 T phm_apply_clock_adjust_rules +ffffffff82306350 T phm_powerdown_uvd +ffffffff823063a0 T phm_disable_clock_power_gatings +ffffffff823063f0 T phm_pre_display_configuration_changed +ffffffff82306450 T phm_display_configuration_changed +ffffffff823064b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff82306510 T phm_stop_thermal_controller +ffffffff82306570 T phm_register_irq_handlers +ffffffff823065c0 T phm_start_thermal_controller +ffffffff82306710 T phm_check_smc_update_required_for_display_configuration +ffffffff82306770 T phm_check_states_equal +ffffffff823067c0 T phm_store_dal_configuration_data +ffffffff82306910 T phm_get_dal_power_level +ffffffff82306970 T phm_set_cpu_power_state +ffffffff823069c0 T phm_get_performance_level +ffffffff82306a20 T phm_get_clock_info +ffffffff82306b90 T phm_get_current_shallow_sleep_clocks +ffffffff82306be0 T phm_get_clock_by_type +ffffffff82306c30 T phm_get_clock_by_type_with_latency +ffffffff82306c80 T phm_get_clock_by_type_with_voltage +ffffffff82306cd0 T phm_set_watermarks_for_clocks_ranges +ffffffff82306d20 T phm_display_clock_voltage_request +ffffffff82306d70 T phm_get_max_high_clocks +ffffffff82306dc0 T phm_disable_smc_firmware_ctf +ffffffff82306e20 T phm_set_active_display_count +ffffffff82307000 T hwmgr_early_init +ffffffff82307460 t polaris_set_asic_special_caps +ffffffff823074e0 T hwmgr_sw_init +ffffffff82307550 T hwmgr_sw_fini +ffffffff823075a0 T hwmgr_hw_init +ffffffff82307760 T hwmgr_hw_fini +ffffffff82307820 T hwmgr_suspend +ffffffff823078a0 T hwmgr_resume +ffffffff82307940 T hwmgr_handle_task +ffffffff82308000 T polaris_baco_set_state +ffffffff82309000 T pp_override_get_default_fuse_value +ffffffff8230a000 T psm_init_power_state_table +ffffffff8230a2a0 T psm_fini_power_state_table +ffffffff8230a360 T psm_set_boot_states +ffffffff8230a410 T psm_set_performance_states +ffffffff8230a4c0 T psm_set_user_performance_state +ffffffff8230a550 T psm_adjust_power_state_dynamic +ffffffff8230b000 T atomctrl_initialize_mc_reg_table +ffffffff8230b210 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff8230b420 T atomctrl_set_engine_dram_timings_rv770 +ffffffff8230b490 T atomctrl_get_memory_pll_dividers_si +ffffffff8230b570 T atomctrl_get_memory_pll_dividers_vi +ffffffff8230b5f0 T atomctrl_get_memory_pll_dividers_ai +ffffffff8230b6a0 T atomctrl_get_engine_pll_dividers_kong +ffffffff8230b720 T atomctrl_get_engine_pll_dividers_vi +ffffffff8230b7f0 T atomctrl_get_engine_pll_dividers_ai +ffffffff8230b8d0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff8230b990 T atomctrl_get_reference_clock +ffffffff8230b9f0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff8230bab0 T atomctrl_get_voltage_table_v3 +ffffffff8230bc10 T atomctrl_get_pp_assign_pin +ffffffff8230bcf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff8230c0c0 t GetScaledFraction +ffffffff8230c150 t fDecodeLeakageID +ffffffff8230c1b0 t fSqrt +ffffffff8230c230 T atomctrl_get_voltage_evv_on_sclk +ffffffff8230c2b0 T atomctrl_get_voltage_evv +ffffffff8230c360 T atomctrl_get_mpll_reference_clock +ffffffff8230c3d0 T atomctrl_is_asic_internal_ss_supported +ffffffff8230c420 T atomctrl_get_memory_clock_spread_spectrum +ffffffff8230c520 T atomctrl_get_engine_clock_spread_spectrum +ffffffff8230c620 T atomctrl_read_efuse +ffffffff8230c6d0 T atomctrl_set_ac_timing_ai +ffffffff8230c730 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff8230c7b0 T atomctrl_get_smc_sclk_range_table +ffffffff8230c860 T atomctrl_get_vddc_shared_railinfo +ffffffff8230c8d0 T atomctrl_get_avfs_information +ffffffff8230ca60 T atomctrl_get_svi2_info +ffffffff8230cb40 T atomctrl_get_leakage_id_from_efuse +ffffffff8230cba0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff8230cd40 T atomctrl_get_voltage_range +ffffffff8230ce00 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff8230ce80 T atomctrl_get_edc_leakage_table +ffffffff8230d000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff8230d0c0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff8230d280 T pp_atomfwctrl_get_pp_assign_pin +ffffffff8230d360 T pp_atomfwctrl_enter_self_refresh +ffffffff8230d390 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff8230d440 T pp_atomfwctrl_get_avfs_information +ffffffff8230d780 T pp_atomfwctrl_get_gpio_information +ffffffff8230d820 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff8230d8b0 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff8230dc30 T pp_atomfwctrl_get_smc_dpm_information +ffffffff8230e000 T encode_pcie_lane_width +ffffffff8230e030 T decode_pcie_lane_width +ffffffff8230f000 t pp_tables_v1_0_initialize +ffffffff82310450 t pp_tables_v1_0_uninitialize +ffffffff82310600 T get_number_of_powerplay_table_entries_v1_0 +ffffffff823106b0 T get_powerplay_table_entry_v1_0 +ffffffff82311000 T pp_tables_get_response_times +ffffffff823110d0 T pp_tables_get_num_of_entries +ffffffff82311190 T pp_tables_get_entry +ffffffff823114a0 t init_non_clock_fields +ffffffff823115e0 t pp_tables_initialize +ffffffff82312760 t pp_tables_uninitialize +ffffffff82312960 t get_number_of_vce_state_table_entries +ffffffff82312a50 t get_vce_state_table_entry +ffffffff82313000 T smu10_init_function_pointers +ffffffff82313040 t smu10_hwmgr_backend_init +ffffffff823136e0 t smu10_hwmgr_backend_fini +ffffffff82313820 t smu10_setup_asic_task +ffffffff82313890 t smu10_get_power_state_size +ffffffff823138c0 t smu10_apply_state_adjust_rules +ffffffff823138f0 t smu10_dpm_force_dpm_level +ffffffff82313e70 t smu10_enable_dpm_tasks +ffffffff82313f30 t smu10_disable_dpm_tasks +ffffffff82313f60 t smu10_dpm_patch_boot_state +ffffffff82313f90 t smu10_dpm_get_pp_table_entry +ffffffff82313ff0 t smu10_dpm_get_num_of_pp_table_entries +ffffffff82314040 t smu10_powergate_vcn +ffffffff823140e0 t smu10_dpm_get_mclk +ffffffff82314140 t smu10_dpm_get_sclk +ffffffff82314190 t smu10_set_power_state_tasks +ffffffff82314200 t smu10_set_cpu_power_state +ffffffff82314230 t smu10_store_cc6_data +ffffffff823142a0 t smu10_get_dal_power_level +ffffffff823142d0 t smu10_get_performance_level +ffffffff82314370 t smu10_get_current_shallow_sleep_clocks +ffffffff823143d0 t smu10_get_clock_by_type_with_latency +ffffffff82314520 t smu10_get_clock_by_type_with_voltage +ffffffff82314630 t smu10_set_watermarks_for_clocks_ranges +ffffffff82314700 t smu10_display_clock_voltage_request +ffffffff823147a0 t smu10_get_max_high_clocks +ffffffff823147d0 t smu10_power_off_asic +ffffffff82314820 t smu10_force_clock_level +ffffffff823149e0 t smu10_print_clock_levels +ffffffff82314dd0 t smu10_gfx_off_control +ffffffff82314ee0 t smu10_read_sensor +ffffffff82315070 t smu10_set_active_display_count +ffffffff823150d0 t smu10_set_min_deep_sleep_dcefclk +ffffffff82315130 t smu10_get_power_profile_mode +ffffffff82315170 t smu10_set_power_profile_mode +ffffffff823152a0 t smu10_set_fine_grain_clk_vol +ffffffff823154b0 t smu10_powergate_mmhub +ffffffff823154d0 t smu10_smus_notify_pwe +ffffffff823154f0 t smu10_powergate_sdma +ffffffff82315510 t smu10_set_hard_min_dcefclk_by_freq +ffffffff82315570 t smu10_set_hard_min_fclk_by_freq +ffffffff823155d0 t smu10_set_hard_min_gfxclk_by_freq +ffffffff82315630 t smu10_set_soft_max_gfxclk_by_freq +ffffffff82315690 t smu10_asic_reset +ffffffff823156b0 t smu10_gfx_state_change +ffffffff823156f0 t smu10_dpm_get_pp_table_entry_callback +ffffffff82316000 T smu7_baco_get_capability +ffffffff82316060 T smu7_baco_get_state +ffffffff823160b0 T smu7_baco_set_state +ffffffff82317000 T smu7_powerdown_uvd +ffffffff82317050 T smu7_disable_clock_power_gating +ffffffff823170e0 T smu7_powergate_uvd +ffffffff823171d0 T smu7_powergate_vce +ffffffff823172c0 T smu7_update_clock_gatings +ffffffff82317670 T smu7_powergate_gfx +ffffffff82318000 T smu7_get_sleep_divider_id_from_clock +ffffffff823180a0 T smu7_init_function_pointers +ffffffff82318100 t smu7_hwmgr_backend_init +ffffffff82319ed0 t smu7_hwmgr_backend_fini +ffffffff82319f40 t smu7_setup_asic_task +ffffffff8231a2b0 t smu7_get_power_state_size +ffffffff8231a2e0 t smu7_apply_state_adjust_rules +ffffffff8231a780 t smu7_force_dpm_level +ffffffff8231ac90 t smu7_enable_dpm_tasks +ffffffff8231d520 t smu7_disable_dpm_tasks +ffffffff8231db60 t smu7_dpm_patch_boot_state +ffffffff8231dca0 t smu7_get_pp_table_entry +ffffffff8231e0a0 t smu7_get_number_of_powerplay_table_entries +ffffffff8231e110 t smu7_dpm_get_mclk +ffffffff8231e1b0 t smu7_dpm_get_sclk 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smu7_disable_smc_cac +ffffffff82323970 T smu7_set_power_limit +ffffffff823239d0 T smu7_enable_power_containment +ffffffff82323b60 T smu7_disable_power_containment +ffffffff82323c80 T smu7_power_control_set_level +ffffffff82324000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff82324080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff82324150 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff82324200 T smu7_fan_ctrl_set_static_mode +ffffffff82324330 T smu7_fan_ctrl_set_default_mode +ffffffff82324410 T smu7_fan_ctrl_start_smc_fan_control +ffffffff82324540 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff82324560 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff82324740 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff82324930 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff82324b10 T smu7_thermal_get_temperature +ffffffff82324b70 T smu7_thermal_disable_alert +ffffffff82324c10 T smu7_thermal_stop_thermal_controller +ffffffff82324d90 T smu7_start_thermal_controller +ffffffff82325120 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff82326000 T smu8_init_function_pointers +ffffffff82326040 t smu8_hwmgr_backend_init +ffffffff82326520 t smu8_hwmgr_backend_fini +ffffffff823265a0 t smu8_setup_asic_task +ffffffff82326ac0 t smu8_get_power_state_size +ffffffff82326af0 t smu8_apply_state_adjust_rules +ffffffff82326c40 t smu8_dpm_force_dpm_level +ffffffff82326f20 t smu8_enable_dpm_tasks +ffffffff823270b0 t smu8_disable_dpm_tasks +ffffffff82327190 t smu8_dpm_patch_boot_state +ffffffff823271f0 t smu8_dpm_get_pp_table_entry +ffffffff82327250 t smu8_dpm_get_num_of_pp_table_entries +ffffffff823272a0 t smu8_dpm_powerdown_uvd +ffffffff823272f0 t smu8_dpm_powergate_vce +ffffffff823274c0 t smu8_dpm_powergate_uvd +ffffffff823276d0 t smu8_dpm_powergate_acp +ffffffff82327730 t smu8_dpm_get_mclk +ffffffff82327760 t smu8_dpm_get_sclk +ffffffff823277d0 t smu8_set_power_state_tasks +ffffffff82327ad0 t smu8_set_cpu_power_state +ffffffff82327b50 t smu8_store_cc6_data +ffffffff82327bd0 t smu8_get_dal_power_level +ffffffff82327c50 t smu8_get_performance_level +ffffffff82327d50 t smu8_get_current_shallow_sleep_clocks +ffffffff82327db0 t smu8_get_clock_by_type +ffffffff82327ef0 t smu8_get_max_high_clocks +ffffffff82327fb0 t smu8_power_off_asic +ffffffff82328030 t smu8_force_clock_level +ffffffff823280a0 t smu8_print_clock_levels +ffffffff82328280 t smu8_read_sensor +ffffffff82328590 t smu8_notify_cac_buffer_info +ffffffff82328640 t smu8_get_thermal_temperature_range +ffffffff823286c0 t smu8_dpm_get_pp_table_entry_callback +ffffffff82329000 T smu9_baco_get_capability +ffffffff823290e0 T smu9_baco_get_state +ffffffff8232a000 T convert_to_vid +ffffffff8232a050 T convert_to_vddc +ffffffff8232a090 T phm_copy_clock_limits_array +ffffffff8232a170 T phm_copy_overdrive_settings_limits_array +ffffffff8232a250 T phm_set_field_to_u32 +ffffffff8232a2b0 T phm_wait_on_register +ffffffff8232a3a0 T phm_wait_on_indirect_register +ffffffff8232a4b0 T phm_wait_for_register_unequal +ffffffff8232a580 T phm_wait_for_indirect_register_unequal +ffffffff8232a680 T phm_cf_want_uvd_power_gating +ffffffff8232a6c0 T phm_cf_want_vce_power_gating +ffffffff8232a700 T phm_trim_voltage_table +ffffffff8232a820 T phm_get_svi2_mvdd_voltage_table +ffffffff8232a9a0 T phm_get_svi2_vddci_voltage_table +ffffffff8232ab20 T phm_get_svi2_vdd_voltage_table +ffffffff8232abc0 T phm_trim_voltage_table_to_fit_state_table +ffffffff8232acb0 T phm_reset_single_dpm_table +ffffffff8232ad10 T phm_setup_pcie_table_entry +ffffffff8232ad50 T phm_get_dpm_level_enable_mask_value +ffffffff8232ae30 T phm_get_voltage_index +ffffffff8232aeb0 T phm_get_voltage_id +ffffffff8232af30 T phm_find_closest_vddci +ffffffff8232afa0 T phm_find_boot_level +ffffffff8232b010 T phm_get_sclk_for_voltage_evv +ffffffff8232b0d0 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff8232b1e0 T phm_get_lowest_enabled_level +ffffffff8232b220 T phm_apply_dal_min_voltage_request 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cyan_skillfish_set_ppt_funcs +ffffffff82382030 t cyan_skillfish_print_clk_levels +ffffffff82382150 t cyan_skillfish_od_edit_dpm_table +ffffffff82382430 t cyan_skillfish_read_sensor +ffffffff82382610 t cyan_skillfish_is_dpm_running +ffffffff823826b0 t cyan_skillfish_init_smc_tables +ffffffff82382790 t cyan_skillfish_get_enabled_mask +ffffffff823827d0 t cyan_skillfish_get_dpm_ultimate_freq +ffffffff82382890 t cyan_skillfish_get_gpu_metrics +ffffffff82382b30 t cyan_skillfish_get_smu_metrics_data +ffffffff82383000 T navi10_set_ppt_funcs +ffffffff82383050 t navi10_run_btc +ffffffff823830d0 t navi10_get_allowed_feature_mask +ffffffff823833a0 t navi10_set_default_dpm_table +ffffffff82383810 t navi10_populate_umd_state_clk +ffffffff823839d0 t navi10_print_clk_levels +ffffffff82383b60 t navi10_emit_clk_levels +ffffffff82383d80 t navi10_force_clk_levels +ffffffff82383eb0 t navi10_od_edit_dpm_table +ffffffff82384460 t navi10_get_clock_by_type_with_latency +ffffffff82384560 t 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sienna_cichlid_od_edit_dpm_table +ffffffff82389270 t sienna_cichlid_restore_user_od_settings +ffffffff82389300 t sienna_cichlid_get_power_profile_mode +ffffffff82389560 t sienna_cichlid_set_power_profile_mode +ffffffff82389830 t sienna_cichlid_dpm_set_vcn_enable +ffffffff823898f0 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff82389970 t sienna_cichlid_read_sensor +ffffffff8238a170 t sienna_cichlid_pre_display_config_changed +ffffffff8238a1a0 t sienna_cichlid_display_config_changed +ffffffff8238a200 t sienna_cichlid_notify_smc_display_config +ffffffff8238a380 t sienna_cichlid_is_dpm_running +ffffffff8238a3d0 t sienna_cichlid_get_fan_speed_rpm +ffffffff8238a4e0 t sienna_cichlid_set_watermarks_table +ffffffff8238a670 t sienna_cichlid_get_thermal_temperature_range +ffffffff8238a750 t sienna_cichlid_get_uclk_dpm_states +ffffffff8238a860 t sienna_cichlid_set_default_od_settings +ffffffff8238aa10 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff8238aa90 t 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sienna_cichlid_gpo_control +ffffffff8238c1d0 t sienna_cichlid_get_ecc_info +ffffffff8238c2c0 t sienna_cichlid_stb_get_data_direct +ffffffff8238c360 t sienna_cichlid_get_default_config_table_settings +ffffffff8238c3d0 t sienna_cichlid_set_config_table +ffffffff8238c4a0 t sienna_cichlid_get_throttler_status_locked +ffffffff8238c600 t sienna_cichlid_get_smartshift_power_percentage +ffffffff8238c730 t sienna_cichlid_i2c_xfer +ffffffff8238c9d0 t sienna_cichlid_i2c_func +ffffffff8238d000 T smu_v11_0_init_microcode +ffffffff8238d140 T smu_v11_0_fini_microcode +ffffffff8238d190 T smu_v11_0_load_microcode +ffffffff8238d2d0 T smu_v11_0_check_fw_status +ffffffff8238d320 T smu_v11_0_check_fw_version +ffffffff8238d490 T smu_v11_0_setup_pptable +ffffffff8238d5b0 T smu_v11_0_init_smc_tables +ffffffff8238d710 T smu_v11_0_fini_smc_tables +ffffffff8238d940 T smu_v11_0_init_power +ffffffff8238d9d0 T smu_v11_0_fini_power +ffffffff8238da30 T smu_v11_0_get_vbios_bootup_values +ffffffff8238dd90 T smu_v11_0_notify_memory_pool_location +ffffffff8238de80 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff8238df00 T smu_v11_0_set_driver_table_location +ffffffff8238df70 T smu_v11_0_set_tool_table_location +ffffffff8238dfe0 T smu_v11_0_init_display_count +ffffffff8238e040 T smu_v11_0_set_allowed_mask +ffffffff8238e110 T smu_v11_0_system_features_control +ffffffff8238e130 T smu_v11_0_notify_display_change +ffffffff8238e1a0 T smu_v11_0_init_max_sustainable_clocks +ffffffff8238e400 t smu_v11_0_get_max_sustainable_clock +ffffffff8238e520 T smu_v11_0_get_current_power_limit +ffffffff8238e5f0 T smu_v11_0_set_power_limit +ffffffff8238e730 T smu_v11_0_interrupt_work +ffffffff8238e7b0 T smu_v11_0_enable_thermal_alert +ffffffff8238e850 T smu_v11_0_disable_thermal_alert +ffffffff8238e870 T smu_v11_0_get_gfx_vdd +ffffffff8238e930 T smu_v11_0_display_clock_voltage_request +ffffffff8238ea80 T smu_v11_0_set_hard_freq_limited_range +ffffffff8238eb60 T smu_v11_0_gfx_off_control +ffffffff8238ebd0 T smu_v11_0_get_fan_control_mode +ffffffff8238ec20 T smu_v11_0_set_fan_speed_pwm +ffffffff8238edd0 t smu_v11_0_set_fan_static_mode +ffffffff8238ef90 T smu_v11_0_set_fan_speed_rpm +ffffffff8238f0d0 T smu_v11_0_get_fan_speed_pwm +ffffffff8238f210 T smu_v11_0_get_fan_speed_rpm +ffffffff8238f310 T smu_v11_0_set_fan_control_mode +ffffffff8238f4b0 T smu_v11_0_set_xgmi_pstate +ffffffff8238f4d0 T smu_v11_0_register_irq_handler +ffffffff8238f590 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff8238f620 T smu_v11_0_set_azalia_d3_pme +ffffffff8238f640 T smu_v11_0_baco_set_armd3_sequence +ffffffff8238f660 T smu_v11_0_baco_is_support +ffffffff8238f6f0 T smu_v11_0_baco_get_state +ffffffff8238f720 T smu_v11_0_baco_set_state +ffffffff8238f9d0 T smu_v11_0_baco_enter +ffffffff8238fac0 T smu_v11_0_baco_exit +ffffffff8238fbf0 T smu_v11_0_mode1_reset +ffffffff8238fc70 T smu_v11_0_handle_passthrough_sbr +ffffffff8238fc90 T smu_v11_0_get_dpm_ultimate_freq +ffffffff8238fdd0 T smu_v11_0_set_soft_freq_limited_range +ffffffff8238fea0 T smu_v11_0_set_performance_level +ffffffff823901f0 T smu_v11_0_set_power_source +ffffffff82390250 T smu_v11_0_get_dpm_freq_by_index +ffffffff82390300 T smu_v11_0_get_dpm_level_count +ffffffff823903a0 T smu_v11_0_set_single_dpm_table +ffffffff82390600 T smu_v11_0_get_dpm_level_range +ffffffff82390760 T smu_v11_0_get_current_pcie_link_width_level +ffffffff823907b0 T smu_v11_0_get_current_pcie_link_width +ffffffff82390810 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff82390860 T smu_v11_0_get_current_pcie_link_speed +ffffffff823908c0 T smu_v11_0_gfx_ulv_control +ffffffff82390930 T smu_v11_0_deep_sleep_control +ffffffff82390ae0 T smu_v11_0_restore_user_od_settings +ffffffff82390b70 T smu_v11_0_set_smu_mailbox_registers +ffffffff82390be0 t smu_v11_0_set_irq_state +ffffffff82391190 t smu_v11_0_irq_process +ffffffff82392000 T vangogh_set_ppt_funcs +ffffffff82392040 t vangogh_set_default_dpm_tables +ffffffff82392070 t vangogh_common_print_clk_levels +ffffffff823924e0 t vangogh_force_clk_levels +ffffffff82392710 t vangogh_od_edit_dpm_table +ffffffff82392c40 t vangogh_get_power_profile_mode +ffffffff82392d40 t vangogh_set_power_profile_mode +ffffffff82392e60 t vangogh_dpm_set_vcn_enable +ffffffff82392eb0 t vangogh_dpm_set_jpeg_enable +ffffffff82392f00 t vangogh_read_sensor +ffffffff82393530 t vangogh_get_apu_thermal_limit +ffffffff82393550 t vangogh_set_apu_thermal_limit +ffffffff82393570 t vangogh_is_dpm_running +ffffffff823935d0 t vangogh_set_watermarks_table +ffffffff82393750 t vangogh_set_performance_level +ffffffff82393f60 t vangogh_get_power_limit +ffffffff823940c0 t vangogh_get_ppt_limit +ffffffff82394130 t vangogh_get_dpm_clock_table +ffffffff823942a0 t vangogh_init_smc_tables +ffffffff823944e0 t vangogh_system_features_control +ffffffff82394530 t vangogh_set_power_limit +ffffffff82394680 t vangogh_get_gfxoff_status +ffffffff82394710 t vangogh_get_gfxoff_entrycount +ffffffff82394780 t vangogh_set_gfxoff_residency +ffffffff823947f0 t vangogh_get_gfxoff_residency +ffffffff82394830 t vangogh_mode2_reset +ffffffff82394970 t vangogh_common_get_gpu_metrics +ffffffff823950f0 t vangogh_post_smu_init +ffffffff82395280 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff823952f0 t vangogh_force_dpm_limit_value +ffffffff82395420 t vangogh_get_dpm_ultimate_freq +ffffffff823957e0 t vangogh_set_soft_freq_limited_range +ffffffff82395960 t vangogh_get_gpu_metrics_v2_3 +ffffffff82396000 T renoir_set_ppt_funcs +ffffffff823960a0 t renoir_get_current_power_state +ffffffff82396120 t renoir_print_clk_levels +ffffffff82396530 t renoir_force_clk_levels +ffffffff82396750 t renoir_od_edit_dpm_table +ffffffff82396a30 t renoir_get_power_profile_mode +ffffffff82396b00 t renoir_set_power_profile_mode +ffffffff82396c20 t renoir_dpm_set_vcn_enable +ffffffff82396ca0 t renoir_dpm_set_jpeg_enable +ffffffff82396d20 t renoir_read_sensor +ffffffff823970d0 t renoir_is_dpm_running +ffffffff82397110 t renoir_set_watermarks_table +ffffffff823972b0 t renoir_set_performance_level +ffffffff823977d0 t renoir_get_dpm_clock_table +ffffffff82397b20 t renoir_init_smc_tables +ffffffff82397c90 t renoir_get_enabled_mask +ffffffff82397cd0 t renoir_get_dpm_ultimate_freq +ffffffff82397f70 t renoir_get_gpu_metrics +ffffffff82398190 t renoir_gfx_state_change_set +ffffffff823981c0 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff82398260 t renoir_force_dpm_limit_value +ffffffff82399000 T smu_v12_0_check_fw_status +ffffffff82399050 T smu_v12_0_check_fw_version +ffffffff823990c0 T smu_v12_0_powergate_sdma +ffffffff82399110 T smu_v12_0_set_gfx_cgpg +ffffffff82399170 T smu_v12_0_get_gfxoff_status +ffffffff82399200 T smu_v12_0_gfx_off_control +ffffffff82399320 T smu_v12_0_fini_smc_tables +ffffffff823993d0 T smu_v12_0_set_default_dpm_tables +ffffffff82399400 T smu_v12_0_mode2_reset +ffffffff82399420 T smu_v12_0_set_soft_freq_limited_range +ffffffff82399560 T smu_v12_0_set_driver_table_location +ffffffff823995d0 T smu_v12_0_get_vbios_bootup_values +ffffffff8239a000 T aldebaran_set_ppt_funcs +ffffffff8239a050 t aldebaran_get_allowed_feature_mask +ffffffff8239a0a0 t aldebaran_set_default_dpm_table +ffffffff8239a2a0 t aldebaran_populate_umd_state_clk +ffffffff8239a3a0 t aldebaran_print_clk_levels +ffffffff8239a560 t aldebaran_force_clk_levels +ffffffff8239a720 t aldebaran_usr_edit_dpm_table +ffffffff8239a940 t aldebaran_read_sensor +ffffffff8239ab60 t aldebaran_is_dpm_running +ffffffff8239abb0 t aldebaran_get_thermal_temperature_range +ffffffff8239ac80 t aldebaran_set_performance_level +ffffffff8239ad30 t aldebaran_get_power_limit +ffffffff8239aec0 t aldebaran_set_df_cstate +ffffffff8239af40 t aldebaran_allow_xgmi_power_down +ffffffff8239afe0 t aldebaran_i2c_control_init +ffffffff8239b0a0 t aldebaran_i2c_control_fini +ffffffff8239b0e0 t aldebaran_get_unique_id +ffffffff8239b1c0 t aldebaran_init_smc_tables +ffffffff8239b380 t aldebaran_set_mp1_state +ffffffff8239b3c0 t aldebaran_setup_pptable +ffffffff8239b490 t aldebaran_system_features_control +ffffffff8239b5f0 t aldebaran_set_power_limit +ffffffff8239b680 t aldebaran_is_baco_supported +ffffffff8239b6b0 t aldebaran_is_mode1_reset_supported +ffffffff8239b6e0 t aldebaran_is_mode2_reset_supported +ffffffff8239b710 t aldebaran_mode1_reset +ffffffff8239b7f0 t aldebaran_mode2_reset +ffffffff8239bb10 t aldebaran_set_soft_freq_limited_range +ffffffff8239bd10 t aldebaran_log_thermal_throttling_event +ffffffff8239c020 t aldebaran_get_gpu_metrics +ffffffff8239c2a0 t aldebaran_smu_handle_passthrough_sbr +ffffffff8239c2c0 t aldebaran_smu_send_hbm_bad_page_num +ffffffff8239c340 t aldebaran_get_ecc_info +ffffffff8239c4a0 t aldebaran_send_hbm_bad_channel_flag +ffffffff8239c570 t aldebaran_get_current_clk_freq_by_table +ffffffff8239c6b0 t aldebaran_get_smu_metrics_data +ffffffff8239c920 t aldebaran_upload_dpm_level +ffffffff8239ca10 t aldebaran_i2c_xfer +ffffffff8239ccb0 t aldebaran_i2c_func +ffffffff8239d000 T smu_v13_0_init_microcode +ffffffff8239d120 T smu_v13_0_fini_microcode +ffffffff8239d170 T smu_v13_0_load_microcode +ffffffff8239d1a0 T smu_v13_0_init_pptable_microcode +ffffffff8239d350 T smu_v13_0_get_pptable_from_firmware +ffffffff8239d470 T smu_v13_0_check_fw_status +ffffffff8239d4e0 T smu_v13_0_check_fw_version +ffffffff8239d560 T smu_v13_0_setup_pptable +ffffffff8239d6f0 T smu_v13_0_init_smc_tables +ffffffff8239d870 T smu_v13_0_fini_smc_tables +ffffffff8239da80 T smu_v13_0_init_power +ffffffff8239db00 T smu_v13_0_fini_power +ffffffff8239db80 T smu_v13_0_get_vbios_bootup_values +ffffffff8239de20 T smu_v13_0_notify_memory_pool_location +ffffffff8239dee0 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff8239df60 T smu_v13_0_set_driver_table_location +ffffffff8239dfd0 T smu_v13_0_set_tool_table_location +ffffffff8239e040 T smu_v13_0_init_display_count +ffffffff8239e080 T smu_v13_0_set_allowed_mask +ffffffff8239e150 T smu_v13_0_gfx_off_control +ffffffff8239e1d0 T smu_v13_0_system_features_control +ffffffff8239e1f0 T smu_v13_0_notify_display_change +ffffffff8239e250 T smu_v13_0_init_max_sustainable_clocks +ffffffff8239e4b0 t smu_v13_0_get_max_sustainable_clock +ffffffff8239e5d0 T smu_v13_0_get_current_power_limit +ffffffff8239e6a0 T smu_v13_0_set_power_limit +ffffffff8239e7b0 T smu_v13_0_enable_thermal_alert +ffffffff8239e840 T smu_v13_0_disable_thermal_alert +ffffffff8239e880 T smu_v13_0_get_gfx_vdd +ffffffff8239e940 T smu_v13_0_display_clock_voltage_request +ffffffff8239ea90 T smu_v13_0_set_hard_freq_limited_range +ffffffff8239eb70 T smu_v13_0_get_fan_control_mode +ffffffff8239ebc0 T smu_v13_0_set_fan_speed_pwm +ffffffff8239ede0 t smu_v13_0_set_fan_static_mode +ffffffff8239efb0 T smu_v13_0_set_fan_control_mode +ffffffff8239f110 T smu_v13_0_set_fan_speed_rpm +ffffffff8239f2c0 T smu_v13_0_set_xgmi_pstate +ffffffff8239f2e0 T smu_v13_0_register_irq_handler +ffffffff8239f3b0 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff8239f440 T smu_v13_0_set_azalia_d3_pme +ffffffff8239f460 T smu_v13_0_wait_for_event +ffffffff8239f4b0 T smu_v13_0_get_dpm_ultimate_freq +ffffffff8239f610 T smu_v13_0_set_soft_freq_limited_range +ffffffff8239f6e0 T smu_v13_0_set_performance_level +ffffffff8239fe40 T smu_v13_0_set_power_source +ffffffff8239fea0 T smu_v13_0_get_dpm_freq_by_index +ffffffff8239ff50 T smu_v13_0_set_single_dpm_table +ffffffff823a0240 T smu_v13_0_get_current_pcie_link_width_level +ffffffff823a0290 T smu_v13_0_get_current_pcie_link_width +ffffffff823a02f0 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff823a0340 T smu_v13_0_get_current_pcie_link_speed +ffffffff823a0390 T smu_v13_0_set_vcn_enable +ffffffff823a0450 T smu_v13_0_set_jpeg_enable +ffffffff823a0470 T smu_v13_0_run_btc +ffffffff823a04f0 T smu_v13_0_gpo_control +ffffffff823a0580 T smu_v13_0_deep_sleep_control +ffffffff823a07e0 T smu_v13_0_gfx_ulv_control +ffffffff823a0850 T smu_v13_0_baco_set_armd3_sequence +ffffffff823a08c0 T smu_v13_0_baco_is_support +ffffffff823a0950 T smu_v13_0_baco_get_state +ffffffff823a0980 T smu_v13_0_baco_set_state +ffffffff823a0a50 T smu_v13_0_baco_enter +ffffffff823a0b70 T smu_v13_0_baco_exit +ffffffff823a0c10 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff823a0c50 T smu_v13_0_od_edit_dpm_table +ffffffff823a0f00 T smu_v13_0_set_default_dpm_tables +ffffffff823a0f30 T smu_v13_0_set_smu_mailbox_registers +ffffffff823a0fa0 T smu_v13_0_mode1_reset +ffffffff823a1020 T smu_v13_0_update_pcie_parameters +ffffffff823a1290 t smu_v13_0_set_irq_state +ffffffff823a1840 t smu_v13_0_irq_process +ffffffff823a2000 T smu_v13_0_0_set_ppt_funcs +ffffffff823a20f0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff823a2230 t smu_v13_0_0_set_default_dpm_table +ffffffff823a2650 t smu_v13_0_0_populate_umd_state_clk +ffffffff823a2790 t smu_v13_0_0_print_clk_levels +ffffffff823a28a0 t smu_v13_0_0_force_clk_levels +ffffffff823a2a20 t smu_v13_0_0_od_edit_dpm_table +ffffffff823a2ef0 t smu_v13_0_0_restore_user_od_settings +ffffffff823a2fb0 t smu_v13_0_0_get_power_profile_mode +ffffffff823a30b0 t smu_v13_0_0_set_power_profile_mode +ffffffff823a3300 t smu_v13_0_0_read_sensor +ffffffff823a3520 t smu_v13_0_0_is_dpm_running +ffffffff823a3570 t smu_v13_0_0_get_fan_speed_pwm +ffffffff823a3650 t smu_v13_0_0_get_fan_speed_rpm +ffffffff823a36c0 t smu_v13_0_0_get_thermal_temperature_range +ffffffff823a37c0 t smu_v13_0_0_set_default_od_settings +ffffffff823a38f0 t smu_v13_0_0_dump_pptable +ffffffff823a3920 t smu_v13_0_0_get_power_limit +ffffffff823a3a00 t smu_v13_0_0_set_df_cstate +ffffffff823a3a20 t smu_v13_0_0_i2c_control_init +ffffffff823a3b50 t smu_v13_0_0_i2c_control_fini +ffffffff823a3b90 t smu_v13_0_0_get_unique_id +ffffffff823a3c30 t smu_v13_0_0_init_smc_tables +ffffffff823a3e80 t smu_v13_0_0_set_mp1_state +ffffffff823a3ec0 t smu_v13_0_0_setup_pptable +ffffffff823a4020 t smu_v13_0_0_system_features_control +ffffffff823a4030 t smu_v13_0_0_baco_enter +ffffffff823a4090 t smu_v13_0_0_baco_exit +ffffffff823a40f0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff823a4150 t smu_v13_0_0_mode1_reset +ffffffff823a4270 t smu_v13_0_0_mode2_reset +ffffffff823a42c0 t smu_v13_0_0_enable_gfx_features +ffffffff823a4310 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff823a4430 t smu_v13_0_0_get_gpu_metrics +ffffffff823a4870 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff823a48c0 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff823a4940 t smu_v13_0_0_get_ecc_info +ffffffff823a4a40 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff823a4ac0 t smu_v13_0_0_i2c_xfer +ffffffff823a4d60 t smu_v13_0_0_i2c_func +ffffffff823a5000 T smu_v13_0_4_set_ppt_funcs +ffffffff823a50c0 t smu_v13_0_4_print_clk_levels +ffffffff823a5130 t smu_v13_0_4_force_clk_levels +ffffffff823a53f0 t smu_v13_0_4_read_sensor +ffffffff823a56d0 t smu_v13_0_4_is_dpm_running +ffffffff823a5720 t smu_v13_0_4_set_watermarks_table +ffffffff823a58a0 t smu_v13_0_4_set_performance_level +ffffffff823a6450 t smu_v13_0_4_init_smc_tables +ffffffff823a65c0 t smu_v13_0_4_fini_smc_tables +ffffffff823a6670 t smu_v13_0_4_system_features_control +ffffffff823a66c0 t smu_v13_0_4_mode2_reset +ffffffff823a66e0 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff823a6b00 t smu_v13_0_4_get_gpu_metrics +ffffffff823a6cd0 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff823a6d30 t smu_v13_0_4_get_current_clk_freq +ffffffff823a7000 T smu_v13_0_5_set_ppt_funcs +ffffffff823a70a0 t smu_v13_0_5_set_default_dpm_tables +ffffffff823a70d0 t smu_v13_0_5_print_clk_levels +ffffffff823a7160 t smu_v13_0_5_force_clk_levels +ffffffff823a72d0 t smu_v13_0_5_od_edit_dpm_table +ffffffff823a7580 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff823a75a0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff823a75c0 t smu_v13_0_5_read_sensor +ffffffff823a77e0 t smu_v13_0_5_is_dpm_running +ffffffff823a7830 t smu_v13_0_5_set_watermarks_table +ffffffff823a79b0 t smu_v13_0_5_set_performance_level +ffffffff823a7f50 t smu_v13_0_5_init_smc_tables +ffffffff823a80c0 t smu_v13_0_5_fini_smc_tables +ffffffff823a8170 t smu_v13_0_5_system_features_control +ffffffff823a81c0 t smu_v13_0_5_mode2_reset +ffffffff823a8240 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff823a8680 t smu_v13_0_5_get_gpu_metrics +ffffffff823a87d0 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff823a9000 T smu_v13_0_6_set_ppt_funcs +ffffffff823a9050 t smu_v13_0_6_get_allowed_feature_mask +ffffffff823a90a0 t smu_v13_0_6_set_default_dpm_table +ffffffff823a95a0 t smu_v13_0_6_populate_umd_state_clk +ffffffff823a96a0 t smu_v13_0_6_print_clk_levels +ffffffff823a9a10 t smu_v13_0_6_force_clk_levels +ffffffff823a9bd0 t smu_v13_0_6_usr_edit_dpm_table +ffffffff823a9df0 t smu_v13_0_6_read_sensor +ffffffff823aa380 t smu_v13_0_6_is_dpm_running +ffffffff823aa400 t smu_v13_0_6_get_thermal_temperature_range +ffffffff823aa550 t smu_v13_0_6_set_performance_level +ffffffff823aa660 t smu_v13_0_6_get_power_limit +ffffffff823aa730 t smu_v13_0_6_set_df_cstate +ffffffff823aa750 t smu_v13_0_6_allow_xgmi_power_down +ffffffff823aa770 t smu_v13_0_6_i2c_control_init +ffffffff823aa8a0 t smu_v13_0_6_i2c_control_fini +ffffffff823aa8e0 t smu_v13_0_6_get_unique_id +ffffffff823aa960 t smu_v13_0_6_init_smc_tables +ffffffff823aaaf0 t smu_v13_0_6_check_fw_status +ffffffff823aab40 t smu_v13_0_6_setup_pptable +ffffffff823aab70 t smu_v13_0_6_system_features_control +ffffffff823aac10 t smu_v13_0_6_get_enabled_mask +ffffffff823aac80 t smu_v13_0_6_set_power_limit +ffffffff823aaca0 t smu_v13_0_6_register_irq_handler +ffffffff823aad00 t smu_v13_0_6_is_baco_supported +ffffffff823aad30 t smu_v13_0_6_is_mode1_reset_supported +ffffffff823aad60 t smu_v13_0_6_is_mode2_reset_supported +ffffffff823aad90 t smu_v13_0_6_mode1_reset +ffffffff823aae40 t smu_v13_0_6_mode2_reset +ffffffff823ab0f0 t smu_v13_0_6_get_dpm_ultimate_freq +ffffffff823ab300 t smu_v13_0_6_set_soft_freq_limited_range +ffffffff823ab530 t smu_v13_0_6_log_thermal_throttling_event +ffffffff823ab820 t smu_v13_0_6_get_gpu_metrics +ffffffff823abb70 t smu_v13_0_6_smu_send_hbm_bad_page_num +ffffffff823abbf0 t smu_v13_0_6_get_smu_metrics_data +ffffffff823abe80 t smu_v13_0_6_upload_dpm_level +ffffffff823abf80 t smu_v13_0_6_i2c_xfer +ffffffff823ac280 t smu_v13_0_6_i2c_func +ffffffff823ac2b0 t smu_v13_0_6_set_irq_state +ffffffff823ac540 t smu_v13_0_6_irq_process +ffffffff823ad000 T smu_v13_0_7_set_ppt_funcs +ffffffff823ad060 t smu_v13_0_7_get_allowed_feature_mask +ffffffff823ad1d0 t smu_v13_0_7_set_default_dpm_table +ffffffff823ad5f0 t smu_v13_0_7_populate_umd_state_clk +ffffffff823ad730 t smu_v13_0_7_print_clk_levels +ffffffff823ad840 t smu_v13_0_7_force_clk_levels +ffffffff823ad9c0 t smu_v13_0_7_od_edit_dpm_table +ffffffff823ade90 t smu_v13_0_7_restore_user_od_settings +ffffffff823adf50 t smu_v13_0_7_get_power_profile_mode +ffffffff823ae090 t smu_v13_0_7_set_power_profile_mode +ffffffff823ae2d0 t smu_v13_0_7_read_sensor +ffffffff823ae4e0 t smu_v13_0_7_is_dpm_running +ffffffff823ae530 t smu_v13_0_7_get_fan_speed_pwm +ffffffff823ae610 t smu_v13_0_7_get_fan_speed_rpm +ffffffff823ae680 t smu_v13_0_7_get_thermal_temperature_range +ffffffff823ae780 t smu_v13_0_7_set_default_od_settings +ffffffff823ae8b0 t smu_v13_0_7_dump_pptable +ffffffff823ae8e0 t smu_v13_0_7_get_power_limit +ffffffff823ae9c0 t smu_v13_0_7_set_df_cstate +ffffffff823ae9e0 t smu_v13_0_7_init_smc_tables +ffffffff823aebd0 t smu_v13_0_7_check_fw_status +ffffffff823aec20 t smu_v13_0_7_set_mp1_state +ffffffff823aec60 t smu_v13_0_7_setup_pptable +ffffffff823aedc0 t smu_v13_0_7_baco_enter +ffffffff823aee20 t smu_v13_0_7_baco_exit +ffffffff823aee80 t smu_v13_0_7_is_mode1_reset_supported +ffffffff823aeec0 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff823aefe0 t smu_v13_0_7_get_gpu_metrics +ffffffff823af410 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff823b0000 T yellow_carp_set_ppt_funcs +ffffffff823b0050 t yellow_carp_set_default_dpm_tables +ffffffff823b0080 t yellow_carp_print_clk_levels +ffffffff823b0100 t yellow_carp_force_clk_levels +ffffffff823b03c0 t yellow_carp_od_edit_dpm_table +ffffffff823b0670 t yellow_carp_dpm_set_vcn_enable +ffffffff823b0690 t yellow_carp_dpm_set_jpeg_enable +ffffffff823b06b0 t yellow_carp_read_sensor +ffffffff823b0a20 t yellow_carp_is_dpm_running +ffffffff823b0a70 t yellow_carp_set_watermarks_table +ffffffff823b0bf0 t yellow_carp_set_performance_level +ffffffff823b1680 t yellow_carp_init_smc_tables +ffffffff823b17f0 t yellow_carp_fini_smc_tables +ffffffff823b18a0 t yellow_carp_system_features_control +ffffffff823b18f0 t yellow_carp_get_gfxoff_status +ffffffff823b1980 t yellow_carp_mode2_reset +ffffffff823b1a00 t yellow_carp_get_dpm_ultimate_freq +ffffffff823b1e40 t yellow_carp_get_gpu_metrics +ffffffff823b1ff0 t yellow_carp_post_smu_init +ffffffff823b2070 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff823b20d0 t yellow_carp_get_current_clk_freq +ffffffff823b21d0 t yellow_carp_get_dpm_profile_freq +ffffffff823b3000 T smu_cmn_send_msg_without_waiting +ffffffff823b3170 T smu_cmn_wait_for_response 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smu_cmn_get_metrics_table +ffffffff823b4870 T smu_cmn_get_combo_pptable +ffffffff823b4940 T smu_cmn_init_soft_gpu_metrics +ffffffff823b4a30 T smu_cmn_set_mp1_state +ffffffff823b4ad0 T smu_cmn_is_audio_func_enabled +ffffffff823b5000 T pci_mcfg_init +ffffffff823b5050 T pci_lookup_segment +ffffffff823b50b0 T pci_attach_hook +ffffffff823b50e0 T pci_bus_maxdevs +ffffffff823b5110 T pci_make_tag +ffffffff823b5180 T pci_decompose_tag +ffffffff823b51e0 T pci_conf_size +ffffffff823b5240 T pci_mcfg_map_bus +ffffffff823b52c0 T pci_conf_read +ffffffff823b5410 T pci_conf_write +ffffffff823b5550 T pci_msix_table_map +ffffffff823b5680 T pci_msix_table_unmap +ffffffff823b5720 T msi_hwmask +ffffffff823b5750 T msi_hwunmask +ffffffff823b5780 T msi_addroute +ffffffff823b5890 T msi_delroute +ffffffff823b5910 T msi_allocidtvec +ffffffff823b5a60 T pci_intr_enable_msivec +ffffffff823b5b40 T pci_intr_map_msi +ffffffff823b5bf0 T pci_intr_map_msivec +ffffffff823b5ca0 T msix_hwmask +ffffffff823b5cd0 T msix_hwunmask +ffffffff823b5d00 T msix_addroute +ffffffff823b5ef0 T msix_delroute +ffffffff823b6050 T pci_intr_map_msix +ffffffff823b6120 T pci_intr_map +ffffffff823b6350 T pci_intr_string +ffffffff823b6430 T pci_intr_establish +ffffffff823b6480 T pci_intr_establish_cpu +ffffffff823b65d0 T pci_intr_disestablish +ffffffff823b65f0 T pci_init_extents +ffffffff823b67d0 T pci_probe_device_hook +ffffffff823b6810 T pci_dev_postattach +ffffffff823b6820 T pci_min_powerstate +ffffffff823b6830 T pci_set_powerstate_md +ffffffff823b7000 T pciide_machdep_compat_intr_establish +ffffffff823b7060 T pciide_machdep_compat_intr_disestablish +ffffffff823b8000 T vga_post_init +ffffffff823b8310 t vm86_emu_inb +ffffffff823b8360 t vm86_emu_inw +ffffffff823b83a0 t vm86_emu_inl +ffffffff823b83e0 t vm86_emu_outb +ffffffff823b8430 t vm86_emu_outw +ffffffff823b8470 t vm86_emu_outl +ffffffff823b84b0 T vga_post_call +ffffffff823b8520 T vga_post_free +ffffffff823b8590 T ddb_vgapost +ffffffff823b9000 T pchbmatch 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internal_command +ffffffff82419f90 T wskbd_debugger +ffffffff8241a000 T wskbd_compose_value +ffffffff8241a1a0 T ksym_upcase +ffffffff8241a220 T fillmapentry +ffffffff8241a3b0 T wskbd_get_mapentry +ffffffff8241a5d0 T wskbd_init_keymap +ffffffff8241a670 T wskbd_load_keymap +ffffffff8241b000 T wsmouse_match +ffffffff8241b030 T wsmouse_attach +ffffffff8241b0d0 T wsmouse_detach +ffffffff8241b2b0 T wsmouse_activate +ffffffff8241b2f0 T wsmouse_mux_open +ffffffff8241b4a0 T wsmouse_mux_close +ffffffff8241b500 T wsmousedoioctl +ffffffff8241b570 T wsmousedevprint +ffffffff8241b5c0 T wsmouseopen +ffffffff8241b6a0 T wsmouse_input_cleanup +ffffffff8241b740 T wsmousedoopen +ffffffff8241b8f0 T wsmouseclose +ffffffff8241b9d0 T wsmouse_input_reset +ffffffff8241bb10 T wsmouseread +ffffffff8241bbd0 T wsmouseioctl +ffffffff8241bc50 T wsmouse_do_ioctl +ffffffff8241bdf0 T wsmouse_param_ioctl +ffffffff8241bf20 T wsmouse_set_params +ffffffff8241c240 T wsmouse_get_params +ffffffff8241c4a0 T wsmousekqfilter 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wsmux_set_display +ffffffff82424790 T wsmux_get_layout +ffffffff824247c0 T wsmux_set_layout +ffffffff82425000 T wsemul_pick +ffffffff82425070 T wsemul_getname +ffffffff82426000 T wsemul_getchar +ffffffff824261d0 T wsemul_local_translate +ffffffff824264b0 T wsemul_utf8_translate +ffffffff82427000 T wsemul_vt100_cnattach +ffffffff82427200 T wsemul_vt100_attach +ffffffff824274d0 T wsemul_vt100_output +ffffffff824277e0 T wsemul_vt100_detach +ffffffff82427910 T wsemul_vt100_resetop +ffffffff82427ac0 T wsemul_vt100_output_esc +ffffffff82428140 T wsemul_vt100_output_csi +ffffffff82428280 T wsemul_vt100_output_scs94 +ffffffff82428340 T wsemul_vt100_output_scs94_percent +ffffffff82428390 T wsemul_vt100_output_scs96 +ffffffff824284e0 T wsemul_vt100_output_scs96_percent +ffffffff82428530 T wsemul_vt100_output_esc_hash +ffffffff82428860 T wsemul_vt100_output_esc_spc +ffffffff82428890 T wsemul_vt100_output_string +ffffffff82428900 T wsemul_vt100_output_string_esc +ffffffff82428950 T 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pms_disable_synaptics +ffffffff824310d0 T pms_enable_alps +ffffffff824315f0 T pms_ioctl_alps +ffffffff824316a0 T pms_sync_alps +ffffffff82431750 T pms_proc_alps +ffffffff824319a0 T pms_enable_elantech_v1 +ffffffff82431bb0 T pms_ioctl_elantech +ffffffff82431c70 T pms_sync_elantech_v1 +ffffffff82431d50 T pms_proc_elantech_v1 +ffffffff82431ec0 T pms_enable_elantech_v2 +ffffffff82432060 T pms_sync_elantech_v2 +ffffffff82432150 T pms_proc_elantech_v2 +ffffffff824322c0 T pms_enable_elantech_v3 +ffffffff82432460 T pms_sync_elantech_v3 +ffffffff824324f0 T pms_proc_elantech_v3 +ffffffff824326e0 T pms_enable_elantech_v4 +ffffffff824328e0 T pms_sync_elantech_v4 +ffffffff824329b0 T pms_proc_elantech_v4 +ffffffff82432d00 T pms_enable_intelli +ffffffff82432ef0 T pms_cmd +ffffffff82432f60 T pms_spec_cmd +ffffffff824331f0 T pms_set_scaling +ffffffff82433280 T pms_set_resolution +ffffffff82433310 T pms_get_devid +ffffffff824333a0 T pms_get_status +ffffffff82433430 T pms_set_rate +ffffffff824334c0 T pms_reset +ffffffff82433550 T pms_dev_enable +ffffffff82433610 T pms_dev_disable +ffffffff824336d0 T pms_protocol_lookup +ffffffff824337d0 T pms_reset_detect +ffffffff82433850 T pms_reset_timo +ffffffff824338a0 T pms_reset_task +ffffffff82433960 T pms_change_state +ffffffff82433cf0 T pmsinput +ffffffff82433e90 T synaptics_set_mode +ffffffff82433f90 T synaptics_query +ffffffff82434080 T synaptics_get_hwinfo +ffffffff82434560 T synaptics_sec_proc +ffffffff82434630 T synaptics_knock +ffffffff82434890 T alps_sec_proc +ffffffff824349b0 T alps_get_hwinfo +ffffffff82434e20 T elantech_set_absolute_mode_v1 +ffffffff824350e0 T elantech_set_absolute_mode_v2 +ffffffff82435600 T elantech_ps2_cmd +ffffffff82435690 T elantech_set_absolute_mode_v3 +ffffffff82435b00 T elantech_set_absolute_mode_v4 +ffffffff82435d30 T elantech_get_hwinfo_v1 +ffffffff82435f30 T elantech_get_hwinfo_v2 +ffffffff82436240 T elantech_get_hwinfo_v3 +ffffffff82436450 T elantech_get_hwinfo_v4 +ffffffff824366c0 T elantech_knock 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uaudio_copy_output +ffffffff82451ce0 T uaudio_underrun +ffffffff82451d00 T uaudio_set_blksz +ffffffff82451dc0 T uaudio_sign_expand +ffffffff82451e00 T uaudio_req +ffffffff82451e90 T uaudio_getnum +ffffffff82451fc0 T uaudio_getdesc +ffffffff82452040 T uaudio_unit_byid +ffffffff82452080 T uaudio_tname +ffffffff824521f0 T uaudio_clkname +ffffffff82452230 T uaudio_mkname +ffffffff82452350 T uaudio_feature_fixup +ffffffff82452490 T uaudio_ranges_init +ffffffff824524d0 T uaudio_ranges_add +ffffffff82452590 T uaudio_ranges_clear +ffffffff82452600 T uaudio_ranges_decode +ffffffff82452690 T uaudio_ranges_encode +ffffffff82452710 T uaudio_ranges_getrates +ffffffff82452810 T uaudio_rates_indexof +ffffffff824528a0 T uaudio_req_ranges +ffffffff82452ec0 T uaudio_alt_getrates +ffffffff82452fa0 T uaudio_clock_id +ffffffff82453020 T uaudio_getrates +ffffffff82453100 T uaudio_feature_addent +ffffffff824532c0 T uaudio_process_srcs +ffffffff824533a0 T uaudio_process_unit +ffffffff82453fa0 T uaudio_process_nch +ffffffff82454050 T uaudio_unit_getdesc +ffffffff82454110 T uaudio_setname_dsts +ffffffff824541c0 T uaudio_setname_srcs +ffffffff82454270 T uaudio_setname_middle +ffffffff82454330 T uaudio_mixer_nchan +ffffffff824543b0 T uaudio_mixer_skip +ffffffff82454420 T uaudio_mixer_byindex +ffffffff82454540 T uaudio_process_header +ffffffff824545f0 T uaudio_process_ac_ep +ffffffff824546d0 T uaudio_process_ac +ffffffff82454ff0 T uaudio_process_as_ep +ffffffff82455160 T uaudio_process_as_general +ffffffff82455270 T uaudio_process_as_format +ffffffff824557f0 T uaudio_process_as +ffffffff82455bd0 T uaudio_fixup_params +ffffffff82455d50 T uaudio_process_conf +ffffffff82455f50 T uaudio_xfer_alloc +ffffffff82455ff0 T uaudio_xfer_free +ffffffff82456070 T uaudio_stream_close +ffffffff82456210 T uaudio_stream_open +ffffffff82456940 T uaudio_adjspf +ffffffff82456a30 T uaudio_pdata_copy +ffffffff82456be0 T uaudio_pdata_calcsizes +ffffffff82456ce0 T uaudio_pdata_xfer +ffffffff82456de0 T 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utvfu_audio_halt_out +ffffffff82460050 T utvfu_audio_halt_in +ffffffff82460110 T utvfu_audio_mixer_set_port +ffffffff82460170 T utvfu_audio_mixer_get_port +ffffffff824601d0 T utvfu_audio_query_devinfo +ffffffff82460290 T utvfu_audio_trigger_output +ffffffff824602d0 T utvfu_audio_trigger_input +ffffffff824603b0 T utvfu_parse_desc +ffffffff824604c0 T utvfu_as_free +ffffffff82460550 T utvfu_vs_free +ffffffff824606b0 T utvfu_vs_init +ffffffff82460760 T utvfu_as_open +ffffffff82460850 T utvfu_vs_open +ffffffff82460940 T utvfu_as_close +ffffffff824609b0 T utvfu_vs_close +ffffffff82460a00 T utvfu_as_start_bulk +ffffffff82460ab0 T utvfu_as_bulk_thread +ffffffff82460cc0 T utvfu_vs_start_isoc +ffffffff82460e70 T utvfu_vs_start_isoc_ixfer +ffffffff82460f30 T utvfu_vs_cb +ffffffff824610b0 T utvfu_find_queued +ffffffff82461120 T utvfu_audio_clear_client +ffffffff82461190 T utvfu_as_free_bulk +ffffffff824611e0 T utvfu_vs_free_isoc +ffffffff82461270 T utvfu_vs_free_frame +ffffffff82461350 T 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athn_usb_node_set_rates +ffffffff8253baa0 T athn_usb_count_active_sta +ffffffff8253baf0 T athn_usb_newauth_cb +ffffffff8253bbd0 T athn_usb_node_free_cb +ffffffff8253bc90 T athn_usb_ampdu_tx_start +ffffffff8253bda0 T athn_usb_ampdu_tx_start_cb +ffffffff8253be00 T athn_usb_ampdu_tx_stop +ffffffff8253bee0 T athn_usb_ampdu_tx_stop_cb +ffffffff8253bf40 T athn_usb_clean_nodes +ffffffff8253c000 T athn_usb_updateedca_cb +ffffffff8253c040 T athn_usb_updateslot_cb +ffffffff8253c080 T athn_usb_set_key_cb +ffffffff8253c140 T athn_usb_delete_key_cb +ffffffff8253c1a0 T athn_usb_bcneof +ffffffff8253c200 T athn_usb_swba +ffffffff8253c360 T athn_usb_tx_status +ffffffff8253c3d0 T athn_usb_rx_wmi_ctrl +ffffffff8253c5f0 T athn_usb_rx_radiotap +ffffffff8253c7e0 T athn_usb_rx_frame +ffffffff8253ca50 T athn_usb_rxeof +ffffffff8253cd70 T athn_usb_txeof +ffffffff8253ce30 T athn_usb_tx +ffffffff8253e000 T uow_match +ffffffff8253e070 T uow_attach +ffffffff8253e510 T uow_detach +ffffffff8253e5e0 T uow_activate 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acpiprt_route_interrupt +ffffffff8259d000 T acpidmar_match +ffffffff8259d080 T acpidmar_attach +ffffffff8259d140 T acpidmar_activate +ffffffff8259d380 T dmar_bdf +ffffffff8259d400 T domain_map_check +ffffffff8259d580 T acpidmar_pci_attach +ffffffff8259d650 T dmar_ptmap +ffffffff8259d6d0 T domain_map_pthru +ffffffff8259d750 T domain_map_page_intel +ffffffff8259d8d0 T iommu_flush_cache +ffffffff8259d920 T iommu_alloc_page +ffffffff8259d9c0 T pte_lvl +ffffffff8259dae0 T domain_map_page_amd +ffffffff8259dbb0 T domain_unload_map +ffffffff8259ddc0 T dom_bdf +ffffffff8259de90 T domain_load_map +ffffffff8259e0c0 T iommu_enable_translation +ffffffff8259e340 T iommu_flush_tlb +ffffffff8259e4c0 T iommu_flush_write_buffer +ffffffff8259e630 T iommu_set_rtaddr +ffffffff8259e760 T iommu_write_8 +ffffffff8259e790 T iommu_write_4 +ffffffff8259e7c0 T iommu_read_4 +ffffffff8259e7e0 T iommu_alloc_hwdte +ffffffff8259e930 T iommu_issue_qi +ffffffff8259e960 T iommu_flush_tlb_qi +ffffffff8259e990 T iommu_flush_ctx_qi +ffffffff8259e9c0 T ivhd_invalidate_domain +ffffffff8259ea20 T iommu_read_8 +ffffffff8259ea40 T iommu_flush_ctx +ffffffff8259eb60 T iommu_enable_qi +ffffffff8259ec80 T iommu_showcfg +ffffffff8259eea0 T iommu_init +ffffffff8259f1e0 T acpidmar_intr_establish +ffffffff8259f2f0 T acpidmar_intr +ffffffff8259f480 T acpidmar_match_devscope +ffffffff8259f5c0 T domain_create +ffffffff8259f800 t dmar_dmamap_create +ffffffff8259f820 t dmar_dmamap_destroy +ffffffff8259f830 t dmar_dmamap_load +ffffffff8259f8a0 t dmar_dmamap_load_mbuf +ffffffff8259f900 t dmar_dmamap_load_uio +ffffffff8259f960 t dmar_dmamap_load_raw +ffffffff8259f9d0 t dmar_dmamap_unload +ffffffff8259fa00 t dmar_dmamap_sync +ffffffff8259fa20 t dmar_dmamem_alloc +ffffffff8259fa40 t dmar_dmamem_free +ffffffff8259fa60 t dmar_dmamem_map +ffffffff8259fa80 t dmar_dmamem_unmap +ffffffff8259faa0 t dmar_dmamem_mmap +ffffffff8259fac0 T domain_add_device +ffffffff8259fb40 T domain_remove_device +ffffffff8259fbf0 T domain_lookup +ffffffff8259fdb0 T _iommu_map +ffffffff8259fe70 T _iommu_domain +ffffffff8259fed0 T domain_map_device +ffffffff825a01d0 T ivhd_flush_devtab +ffffffff825a0230 T acpidmar_pci_hook +ffffffff825a03f0 T acpidmar_parse_devscope +ffffffff825a0510 T acpidmar_drhd +ffffffff825a06e0 T acpidmar_rmrr +ffffffff825a0970 T acpidmar_atsr +ffffffff825a0b10 T acpidmar_init +ffffffff825a0f60 T acpiivhd_intr +ffffffff825a1040 T ivhd_poll_events +ffffffff825a1100 T ivhd_intr_map +ffffffff825a11b0 T _dumppte +ffffffff825a12e0 T ivhd_showpage +ffffffff825a1420 T ivhd_show_event +ffffffff825a1cc0 T ivhd_showdte +ffffffff825a1da0 T ivhd_showcmd +ffffffff825a1e60 T _ivhd_issue_command +ffffffff825a1f40 T ivhd_issue_command +ffffffff825a2210 T ivhd_invalidate_iommu_all +ffffffff825a2300 T ivhd_invalidate_interrupt_table +ffffffff825a23f0 T ivhd_showreg +ffffffff825a2530 T ivhd_checkerr +ffffffff825a2770 T ivhd_iommu_init +ffffffff825a2c50 T acpiivrs_ivhd +ffffffff825a2cc0 T acpiivrs_init +ffffffff825a2df0 T acpidmar_msi_hwmask +ffffffff825a2e60 T acpidmar_msi_hwunmask +ffffffff825a2ed0 T acpidmar_msi_addroute +ffffffff825a2f80 T acpidmar_msi_delroute +ffffffff825a2fa0 T iommu_showfault +ffffffff825a3160 T iommu_showpte +ffffffff825a4000 T acpidock_match +ffffffff825a4070 T acpidock_attach +ffffffff825a4390 T acpidock_status +ffffffff825a4420 T acpidock_docklock +ffffffff825a4500 T acpidock_dockctl +ffffffff825a45e0 T acpidock_foundejd +ffffffff825a4690 T acpidock_notify +ffffffff825a4b70 T acpidock_eject +ffffffff825a4c60 T acpidock_walkchildren +ffffffff825a5000 T abl_match +ffffffff825a5030 T abl_attach +ffffffff825a5220 T abl_get_brightness +ffffffff825a52a0 T abl_get_param +ffffffff825a5300 T abl_set_param +ffffffff825a53c0 T abl_set_brightness +ffffffff825a6000 T asmc_match +ffffffff825a6050 T asmc_attach +ffffffff825a65d0 T asmc_activate +ffffffff825a6660 T asmc_try +ffffffff825a6a20 T asmc_get_backlight +ffffffff825a6aa0 T asmc_set_backlight +ffffffff825a6b30 T asmc_backlight +ffffffff825a6bc0 T asmc_init +ffffffff825a6dc0 T asmc_update +ffffffff825a6f60 T asmc_detach +ffffffff825a7110 t asmc_temp +ffffffff825a72a0 t asmc_fan +ffffffff825a7460 t asmc_light +ffffffff825a8000 T acpiasus_match +ffffffff825a8030 T acpiasus_attach +ffffffff825a8150 T acpiasus_activate +ffffffff825a82e0 T acpiasus_init +ffffffff825a83c0 T acpiasus_notify +ffffffff825a9000 T thinkpad_match +ffffffff825a90b0 T thinkpad_attach +ffffffff825a94c0 T thinkpad_activate +ffffffff825a9640 T thinkpad_sensor_attach +ffffffff825a97b0 T thinkpad_get_temp +ffffffff825a9840 T thinkpad_sensor_refresh +ffffffff825a99c0 T thinkpad_get_volume_mute +ffffffff825a9a30 T thinkpad_attach_deferred +ffffffff825a9a50 T thinkpad_enable_events +ffffffff825a9c20 T thinkpad_get_kbd_backlight +ffffffff825a9cb0 T thinkpad_set_kbd_backlight +ffffffff825a9d80 T thinkpad_get_param +ffffffff825a9de0 T thinkpad_set_param +ffffffff825a9ea0 T thinkpad_battery_setchargestart +ffffffff825a9ff0 T thinkpad_battery_setchargestop +ffffffff825aa140 T thinkpad_battery_setchargemode +ffffffff825aa710 T thinkpad_hotkey +ffffffff825aad40 T thinkpad_brightness_up +ffffffff825aaee0 T thinkpad_brightness_down +ffffffff825ab090 T thinkpad_toggle_bluetooth +ffffffff825ab1b0 T thinkpad_volume_mute +ffffffff825ab260 T thinkpad_volume_down +ffffffff825ab310 T thinkpad_volume_up +ffffffff825ab3c0 T thinkpad_get_thinklight +ffffffff825ab410 T thinkpad_adaptive_change +ffffffff825ab530 T thinkpad_get_brightness +ffffffff825ab570 T thinkpad_toggle_wan +ffffffff825ab690 T thinkpad_cmos +ffffffff825ab740 T thinkpad_set_brightness +ffffffff825ab830 T thinkpad_set_thinklight +ffffffff825ab8f0 T thinkpad_battery_inhibit_charge +ffffffff825aba20 T thinkpad_battery_force_discharge +ffffffff825ac000 T toshiba_match +ffffffff825ac0a0 T toshiba_attach +ffffffff825ac180 T get_param_brightness +ffffffff825ac1e0 T acpitoshiba_get_param +ffffffff825ac240 T set_param_brightness +ffffffff825ac2d0 T toshiba_update_brightness +ffffffff825ac3d0 T acpitoshiba_set_param +ffffffff825ac470 T toshiba_set_brightness +ffffffff825ac590 T toshiba_enable_events +ffffffff825ac620 T toshiba_read_events +ffffffff825ac780 T toshiba_hotkey +ffffffff825ac9b0 T toshiba_get_brightness +ffffffff825acb20 T toshiba_fn_key_brightness_up +ffffffff825acc70 T toshiba_fn_key_brightness_down +ffffffff825acdc0 T toshiba_fn_key_video_output +ffffffff825acf10 T toshiba_get_video_output +ffffffff825ad080 T toshiba_set_video_output +ffffffff825ae000 T acpisony_match +ffffffff825ae070 T acpisony_attach +ffffffff825ae0e0 T acpisony_activate +ffffffff825ae120 T acpisony_notify_setup +ffffffff825ae310 T acpisony_notify +ffffffff825ae6b0 T acpisony_find_offset +ffffffff825ae7c0 T acpisony_set_hotkey +ffffffff825ae9b0 T acpisony_brightness_down +ffffffff825aeac0 T acpisony_get_brightness +ffffffff825aeb40 T acpisony_set_brightness +ffffffff825af000 T acpivideo_match +ffffffff825af070 T acpivideo_attach +ffffffff825af1d0 T acpivideo_getpcibus +ffffffff825af210 T acpivideo_notify +ffffffff825af270 T acpivideo_set_policy +ffffffff825af340 T acpi_foundvout +ffffffff825af410 T acpivideo_print +ffffffff825b0000 T acpivout_match +ffffffff825b0070 T acpivout_attach +ffffffff825b01c0 T acpivout_notify +ffffffff825b0270 T acpivout_get_bcl +ffffffff825b0390 T acpivout_get_brightness +ffffffff825b0430 T acpivout_get_param +ffffffff825b04d0 T acpivout_set_param +ffffffff825b0630 T acpivout_select_brightness +ffffffff825b0700 T acpivout_find_brightness +ffffffff825b0790 T acpivout_set_brightness +ffffffff825b1000 T acpipwrres_match +ffffffff825b1070 T acpipwrres_attach +ffffffff825b12b0 T acpipwrres_foundcons +ffffffff825b1440 T acpipwrres_ref_incr +ffffffff825b14d0 T acpipwrres_hascons +ffffffff825b1520 T acpipwrres_ref_decr +ffffffff825b15b0 T acpipwrres_addcons +ffffffff825b2000 T aibs_match +ffffffff825b2030 T aibs_attach +ffffffff825b2140 T aibs_probe +ffffffff825b22a0 T aibs_attach_new +ffffffff825b23c0 T aibs_attach_sif +ffffffff825b2590 T aibs_notify +ffffffff825b2600 T aibs_add_sensor +ffffffff825b2850 T aibs_getpack +ffffffff825b28d0 T aibs_refresh +ffffffff825b2930 T aibs_refresh_r +ffffffff825b2a70 T aibs_getvalue +ffffffff825b2bc0 T aibs_find_cb +ffffffff825b3000 T aplgpio_match +ffffffff825b3060 T aplgpio_attach +ffffffff825b3310 T aplgpio_intr +ffffffff825b3460 T aplgpio_read_pin +ffffffff825b34b0 T aplgpio_write_pin +ffffffff825b3520 T aplgpio_intr_establish +ffffffff825b3640 T aplgpio_intr_enable +ffffffff825b36d0 T aplgpio_intr_disable +ffffffff825b4000 T bytgpio_match +ffffffff825b4060 T bytgpio_attach +ffffffff825b4320 T bytgpio_intr +ffffffff825b4450 T bytgpio_read_pin +ffffffff825b44b0 T bytgpio_write_pin +ffffffff825b4530 T bytgpio_intr_establish +ffffffff825b45a0 T bytgpio_intr_enable +ffffffff825b4690 T bytgpio_intr_disable +ffffffff825b5000 T chvgpio_match +ffffffff825b5060 T chvgpio_attach +ffffffff825b5300 T chvgpio_intr +ffffffff825b53d0 T chvgpio_read_pin +ffffffff825b5480 T chvgpio_write_pin +ffffffff825b5540 T chvgpio_intr_establish +ffffffff825b5710 T chvgpio_intr_enable +ffffffff825b57e0 T chvgpio_intr_disable +ffffffff825b58b0 T chvgpio_opreg_handler +ffffffff825b5930 T chvgpio_check_pin +ffffffff825b6000 T glkgpio_match +ffffffff825b6060 T glkgpio_attach +ffffffff825b6310 T glkgpio_intr +ffffffff825b6460 T glkgpio_read_pin +ffffffff825b64c0 T glkgpio_write_pin +ffffffff825b6530 T glkgpio_intr_establish +ffffffff825b6650 T glkgpio_intr_enable +ffffffff825b66e0 T glkgpio_intr_disable +ffffffff825b7000 T pchgpio_match +ffffffff825b7060 T pchgpio_attach +ffffffff825b7530 T pchgpio_activate +ffffffff825b75e0 T pchgpio_intr +ffffffff825b7800 T pchgpio_read_pin +ffffffff825b78f0 T pchgpio_write_pin +ffffffff825b7a00 T pchgpio_intr_establish +ffffffff825b7c20 T pchgpio_intr_enable +ffffffff825b7d50 T pchgpio_intr_disable +ffffffff825b7e80 T pchgpio_save +ffffffff825b7ef0 T pchgpio_restore +ffffffff825b7f60 T pchgpio_find_group +ffffffff825b7fe0 T pchgpio_intr_handle +ffffffff825b80c0 T pchgpio_save_pin +ffffffff825b8280 T pchgpio_restore_pin +ffffffff825b9000 T tipmic_match +ffffffff825b9050 T tipmic_attach +ffffffff825b9250 T tipmic_write_1 +ffffffff825b9310 T tipmic_intr +ffffffff825b9470 T tipmic_get_lpat +ffffffff825b9580 T tipmic_read_pin +ffffffff825b95b0 T tipmic_write_pin +ffffffff825b95e0 T tipmic_thermal_opreg_handler +ffffffff825b9e60 T tipmic_power_opreg_handler +ffffffff825ba100 T tipmic_read_1 +ffffffff825ba1d0 T tipmic_raw_to_temp +ffffffff825bb000 T ccpmic_match +ffffffff825bb050 T ccpmic_attach +ffffffff825bb130 T ccpmic_get_lpat +ffffffff825bb240 T ccpmic_read_pin +ffffffff825bb3c0 T ccpmic_write_pin +ffffffff825bb520 T ccpmic_thermal_opreg_handler +ffffffff825bb770 T ccpmic_power_opreg_handler +ffffffff825bb960 T ccpmic_read_1 +ffffffff825bba30 T ccpmic_write_1 +ffffffff825bbaf0 T ccpmic_raw_to_temp +ffffffff825bc000 T com_acpi_match +ffffffff825bc120 T com_acpi_attach +ffffffff825bc3a0 T com_acpi_is_designware +ffffffff825bc400 T com_acpi_intr_designware +ffffffff825bc430 T com_acpi_is_console +ffffffff825bd000 T sdhc_acpi_match +ffffffff825bd060 T sdhc_acpi_attach +ffffffff825bd370 T sdhc_acpi_parse_resources +ffffffff825bd420 T sdhc_acpi_card_detect_gpio +ffffffff825bd480 T sdhc_acpi_card_detect_intr +ffffffff825bd4c0 T sdhc_acpi_power_on +ffffffff825bd540 T sdhc_acpi_explore +ffffffff825bd570 T sdhc_acpi_card_detect_nonremovable +ffffffff825bd5a0 T sdhc_acpi_do_explore +ffffffff825be000 T dwiic_acpi_match +ffffffff825be050 T dwiic_acpi_attach +ffffffff825be410 T dwiic_acpi_parse_crs +ffffffff825be560 T dwiic_acpi_power +ffffffff825be670 T dwiic_acpi_get_params +ffffffff825be7b0 T dwiic_i2c_intr_establish +ffffffff825be830 T dwiic_i2c_intr_disestablish +ffffffff825be850 T dwiic_i2c_intr_string +ffffffff825be8e0 T dwiic_acpi_acquire_bus +ffffffff825be930 T dwiic_acpi_release_bus +ffffffff825be960 T dwiic_acpi_bus_scan +ffffffff825be9a0 T dwiic_acpi_found_hid +ffffffff825bed00 T dwiic_matchhids +ffffffff825bed90 T dwiic_acpi_found_ihidev +ffffffff825bf000 T dwiic_acpi_found_iatp +ffffffff825bf160 T dwiic_acpi_found_ietp +ffffffff825c0000 T acpicbkbd_match +ffffffff825c0030 T acpicbkbd_attach +ffffffff825c00d0 T acpicbkbd_activate +ffffffff825c0120 T acpicbkbd_get_backlight +ffffffff825c01a0 T acpicbkbd_set_backlight +ffffffff825c0240 T acpicbkbd_write_backlight +ffffffff825c1000 T acpials_match +ffffffff825c1090 T acpials_attach +ffffffff825c1230 T acpials_read +ffffffff825c12b0 T acpials_addtask +ffffffff825c12f0 T acpials_notify +ffffffff825c1380 T acpials_update +ffffffff825c2000 T tpm_match +ffffffff825c2050 T tpm_attach +ffffffff825c2320 T tpm_activate +ffffffff825c2430 T tpm2_start_method +ffffffff825c24b0 T tpm_probe +ffffffff825c2560 T tpm_init_tis +ffffffff825c27d0 T tpm_init_crb +ffffffff825c2b10 T tpm_suspend +ffffffff825c2c00 T tpm_resume +ffffffff825c2c30 T tpm_write_tis +ffffffff825c2fc0 T tpm_read_tis +ffffffff825c3190 T tpm_write_crb +ffffffff825c3570 T tpm_read_crb +ffffffff825c3870 T tpm_request_locality_tis +ffffffff825c3960 T tpm_request_locality_crb +ffffffff825c3a60 T tpm_release_locality_crb +ffffffff825c3ab0 T tpm_release_locality_tis +ffffffff825c3b20 T tpm_getburst +ffffffff825c3bd0 T tpm_status +ffffffff825c3bf0 T tpm_waitfor +ffffffff825c3cd0 T tpm_waitfor_status +ffffffff825c4000 T acpihve_match +ffffffff825c40b0 T acpihve_attach +ffffffff825c5000 T acpisbs_match +ffffffff825c5030 T acpisbs_attach +ffffffff825c52b0 T acpisbs_activate +ffffffff825c5390 T acpisbs_read +ffffffff825c5450 T acpisbs_setup_sensors +ffffffff825c5550 T acpisbs_refresh_sensors +ffffffff825c56a0 T acpisbs_notify +ffffffff825c57e0 T acpi_smbus_read +ffffffff825c6000 T surface_match +ffffffff825c6060 T surface_attach +ffffffff825c60c0 T surface_hotkey +ffffffff825c7000 T ipmi_acpi_match +ffffffff825c7030 T ipmi_acpi_attach +ffffffff825c7260 T ipmi_acpi_parse_crs +ffffffff825c8000 T amdgpio_match +ffffffff825c8060 T amdgpio_attach +ffffffff825c82a0 T amdgpio_activate +ffffffff825c8390 T amdgpio_intr +ffffffff825c8530 T amdgpio_read_pin +ffffffff825c8580 T amdgpio_write_pin +ffffffff825c85f0 T amdgpio_intr_establish +ffffffff825c86e0 T amdgpio_intr_enable +ffffffff825c8760 T amdgpio_intr_disable +ffffffff825c87e0 T amdgpio_save +ffffffff825c8860 T amdgpio_restore +ffffffff825c88f0 T amdgpio_save_pin +ffffffff825c8960 T amdgpio_restore_pin +ffffffff825c89d0 T amdgpio_pin_intr +ffffffff825c9000 T acpihid_match +ffffffff825c9030 T acpihid_attach +ffffffff825c9210 T acpihid_init_dsm +ffffffff825c9370 T acpihid_eval +ffffffff825c9590 T acpihid_notify +ffffffff825c95f0 T acpihid_button_array_enable +ffffffff825ca000 t iosf_acpi_match +ffffffff825ca050 t iosf_acpi_attach +ffffffff825ca150 t iosf_acpi_mbi_mdr_rd +ffffffff825ca1c0 t iosf_acpi_mbi_mdr_wr +ffffffff825cb000 T acpi_match +ffffffff825cb060 T acpi_attach +ffffffff825cb0a0 T acpi_probe +ffffffff825cb240 T acpi_map +ffffffff825cb330 T acpi_unmap +ffffffff825cb380 T acpi_bus_space_map +ffffffff825cb3a0 T acpi_bus_space_unmap +ffffffff825cb3c0 T acpi_intr_establish +ffffffff825cb500 T acpi_intr_disestablish +ffffffff825cb510 T acpi_scan +ffffffff825cb6b0 T acpi_acquire_glk +ffffffff825cb710 T acpi_release_glk +ffffffff825cb760 T acpi_attach_machdep +ffffffff825cb8f0 T acpi_sleep_cpu +ffffffff825cba90 T acpi_resume_cpu +ffffffff825cbb90 T sleep_mp +ffffffff825cbc80 T resume_mp +ffffffff825cbd70 T acpi_iommu_device_map +ffffffff825cc000 T hibernate_resume_machdep +ffffffff825cc050 T hibernate_drop_to_real_mode +ffffffff825cc060 T hibernate_activate_resume_pt_machdep +ffffffff825cc0a0 T hibernate_switch_stack_machdep +ffffffff825cc0e0 T hibernate_flush +ffffffff825cc110 T acpi_savecpu +ffffffff825cd000 T sleep_showstate +ffffffff825cd0f0 T sleep_setstate +ffffffff825cd150 T gosleep +ffffffff825cd210 T sleep_abort +ffffffff825cd240 T sleep_resume +ffffffff825cd2b0 T suspend_finish +ffffffff825ce000 T acpiopen +ffffffff825ce0d0 T acpiclose +ffffffff825ce160 T acpiioctl +ffffffff825ce2b0 T request_sleep +ffffffff825ce330 T acpi_filtdetach +ffffffff825ce380 T acpi_filtread +ffffffff825ce3c0 T acpikqfilter +ffffffff825cf000 T acpipci_match +ffffffff825cf030 T acpipci_attach +ffffffff825cf2f0 T acpipci_osc +ffffffff825cf430 T acpipci_parse_resources +ffffffff825cf560 T acpipci_attach_bus +ffffffff825cf730 T acpipci_print +ffffffff825cf7a0 T acpipci_attach_busses +ffffffff825d0000 T efiopen +ffffffff825d0040 T eficlose +ffffffff825d0070 T efiioctl +ffffffff825d0110 T efiioc_get_table +ffffffff825d0280 T efiioc_var_get +ffffffff825d0500 T efiioc_var_next +ffffffff825d0720 T efiioc_var_set +ffffffff825d08a0 T efi_adapt_error +ffffffff825d1000 T efi_match +ffffffff825d1060 T efi_attach +ffffffff825d1330 T efi_map_runtime +ffffffff825d14b0 T efi_enter +ffffffff825d1550 T efi_leave +ffffffff825d15d0 T efi_fault +ffffffff825d2000 T vmm_probe +ffffffff825d2050 T vmm_attach +ffffffff825d2170 T vmm_activate +ffffffff825d22b0 T vmmopen +ffffffff825d2300 T vmmclose +ffffffff825d2330 T vm_find +ffffffff825d2450 T vmmioctl +ffffffff825d26d0 T vm_create +ffffffff825d29a0 T vm_get_info +ffffffff825d2bf0 T vm_terminate +ffffffff825d2d60 T vm_resetcpu +ffffffff825d2e80 T vm_share_mem +ffffffff825d2fd0 T pledge_ioctl_vmm +ffffffff825d30c0 T vm_find_vcpu +ffffffff825d3120 T vm_create_check_mem_ranges +ffffffff825d32e0 T vm_teardown +ffffffff825d3420 T vcpu_must_stop +ffffffff825d4000 T vmm_enabled +ffffffff825d4080 T vmm_attach_machdep +ffffffff825d4230 T vmm_quiesce_vmx +ffffffff825d4400 T vmm_activate_machdep +ffffffff825d4520 T vmm_stop +ffffffff825d4650 T vmm_start +ffffffff825d4730 T vmmioctl_machdep +ffffffff825d4800 T vm_intr_pending +ffffffff825d48a0 T vm_mprotect_ept +ffffffff825d4b20 T pledge_ioctl_vmm_machdep +ffffffff825d4b70 T vm_rwvmparams +ffffffff825d4d00 T vmm_init_pvclock +ffffffff825d4dd0 T vm_rwregs +ffffffff825d4ee0 T vcpu_readregs_vmx +ffffffff825d5310 T vcpu_writeregs_vmx +ffffffff825d5780 T vcpu_readregs_svm +ffffffff825d5c30 T vcpu_writeregs_svm +ffffffff825d6100 T vmm_get_guest_memtype +ffffffff825d6180 T vmx_mprotect_ept +ffffffff825d63e0 T vmx_pmap_find_pte_ept +ffffffff825d64b0 T start_vmm_on_cpu +ffffffff825d65d0 T stop_vmm_on_cpu +ffffffff825d6670 T vmclear_on_cpu +ffffffff825d66f0 T vm_impl_init_vmx +ffffffff825d6800 T vm_impl_init_svm +ffffffff825d6910 T vm_impl_init +ffffffff825d69b0 T vm_impl_deinit +ffffffff825d69e0 T vcpu_reload_vmcs_vmx +ffffffff825d6b20 T vcpu_reset_regs_svm +ffffffff825d6eb0 T svm_setmsrbrw +ffffffff825d6fc0 T svm_setmsrbr +ffffffff825d7090 T vmm_alloc_vpid +ffffffff825d71a0 T svm_setmsrbw +ffffffff825d7280 T vmx_setmsrbr +ffffffff825d7330 T vmx_setmsrbw +ffffffff825d73e0 T vmx_setmsrbrw +ffffffff825d74f0 T svm_set_clean +ffffffff825d7540 T svm_set_dirty +ffffffff825d7590 T vcpu_reset_regs_vmx +ffffffff825d7fd0 T vcpu_vmx_check_cap +ffffffff825d80d0 T vcpu_vmx_compute_ctrl +ffffffff825d82b0 T vcpu_init_vmx +ffffffff825d8650 T vcpu_deinit_vmx +ffffffff825d87d0 T vcpu_reset_regs +ffffffff825d8810 T vcpu_init_svm +ffffffff825d89a0 T vcpu_deinit_svm +ffffffff825d8ae0 T vcpu_init +ffffffff825d8ba0 T vmm_free_vpid +ffffffff825d8c10 T vcpu_deinit +ffffffff825d8c50 T vm_run +ffffffff825d8e10 T vcpu_run_vmx +ffffffff825d9600 T vcpu_run_svm +ffffffff825d9bf0 T vmm_fpurestore +ffffffff825d9cb0 T vmm_fpusave +ffffffff825d9d30 T vmm_translate_gva +ffffffff825da040 T vmm_update_pvclock +ffffffff825da140 T vmx_get_exit_info +ffffffff825da1a0 T vmx_handle_exit +ffffffff825da5d0 T vmx_instruction_error_decode +ffffffff825da7a0 T vmm_get_guest_cpu_cpl +ffffffff825da890 T vmx_handle_intr +ffffffff825da920 T svm_handle_hlt +ffffffff825da970 T vmx_handle_hlt +ffffffff825daa20 T svm_handle_exit +ffffffff825dad40 T svm_handle_np_fault +ffffffff825daee0 T vmm_handle_cpuid +ffffffff825db580 T svm_handle_msr +ffffffff825db850 T svm_handle_xsetbv +ffffffff825db8f0 T svm_handle_inout +ffffffff825db9f0 T vmm_inject_ud +ffffffff825dba20 T vmm_inject_db +ffffffff825dba50 T vmx_handle_np_fault +ffffffff825dbbb0 T vmx_handle_inout +ffffffff825dbd30 T vmx_handle_cr +ffffffff825dbf30 T vmx_handle_rdmsr +ffffffff825dc000 T vmx_handle_wrmsr +ffffffff825dc270 T vmx_handle_xsetbv +ffffffff825dc340 T vmm_inject_gp +ffffffff825dc370 T vmx_get_exit_qualification +ffffffff825dc3d0 T vmx_get_guest_faulttype +ffffffff825dc470 T svm_get_guest_faulttype +ffffffff825dc4a0 T svm_fault_page +ffffffff825dc530 T vmx_fault_page +ffffffff825dc680 T vmm_get_guest_cpu_mode +ffffffff825dc780 T vmx_load_pdptes +ffffffff825dca00 T vmx_handle_cr0_write +ffffffff825dcc10 T vmx_handle_cr4_write +ffffffff825dccb0 T vmm_handle_xsetbv +ffffffff825dcd40 T vmx_handle_misc_enable_msr +ffffffff825dcda0 T vmm_pat_is_valid +ffffffff825dce80 T vmm_gpa_is_valid +ffffffff825dcef0 T vmx_exit_reason_decode +ffffffff825dcf30 T svm_exit_reason_decode +ffffffff825ddd40 T vcpu_state_decode +ffffffff825de000 T vmm_dispatch_intr +ffffffff825de020 T vmxon +ffffffff825de050 T vmxoff +ffffffff825de080 T vmclear +ffffffff825de0b0 T vmptrld +ffffffff825de0e0 T vmptrst +ffffffff825de110 T vmwrite +ffffffff825de140 T vmread +ffffffff825de170 T invvpid +ffffffff825de18b t invvpid_fail +ffffffff825de192 t invvpid_ret +ffffffff825de1b0 T invept +ffffffff825de1cb t invept_fail +ffffffff825de1d2 t invept_ret +ffffffff825de1f0 T vmx_enter_guest +ffffffff825de21b t skip_init +ffffffff825de2e8 t no_l1df_msr +ffffffff825de2eb t l1df_tlb_loop +ffffffff825de304 t l1df_tlb_done +ffffffff825de30c t l1df_load_cache +ffffffff825de323 t done_flush +ffffffff825de3b6 t do_resume +ffffffff825de43b t fail_launch_or_resume +ffffffff825de47d t fail_launch_unknown +ffffffff825de48a t fail_launch_invalid_vmcs +ffffffff825de497 t fail_launch_valid_vmcs +ffffffff825de4b4 t vmx_exit_handler_asm +ffffffff825de579 t restore_host +ffffffff825de610 T svm_enter_guest +ffffffff825de7a0 t restore_host_svm +ffffffff825df000 T sdmmc_match +ffffffff825df050 T sdmmc_attach +ffffffff825df390 T sdmmc_detach +ffffffff825df440 T sdmmc_activate +ffffffff825df510 T sdmmc_discover_task +ffffffff825df5d0 T sdmmc_create_thread +ffffffff825df640 T sdmmc_holds_root_device +ffffffff825df6a0 T sdmmc_task_thread +ffffffff825df890 T sdmmc_needs_discover +ffffffff825df940 T sdmmc_del_task +ffffffff825df9f0 T sdmmc_card_detach +ffffffff825dfad0 T sdmmc_add_task +ffffffff825dfb50 T sdmmc_card_attach +ffffffff825dfc60 T sdmmc_enable +ffffffff825dfdb0 T sdmmc_scan +ffffffff825dfe40 T sdmmc_init +ffffffff825dff40 T sdmmc_disable +ffffffff825e00a0 T sdmmc_function_free +ffffffff825e00c0 T sdmmc_delay +ffffffff825e0110 T sdmmc_select_card +ffffffff825e0330 T sdmmc_set_bus_power +ffffffff825e04e0 T sdmmc_function_alloc +ffffffff825e0570 T sdmmc_app_command +ffffffff825e0700 T sdmmc_mmc_command +ffffffff825e0780 T sdmmc_go_idle_state +ffffffff825e0890 T sdmmc_send_if_cond +ffffffff825e09e0 T sdmmc_set_relative_addr +ffffffff825e1000 T sdmmc_cisptr +ffffffff825e10a0 T sdmmc_read_cis +ffffffff825e13e0 T sdmmc_print_cis +ffffffff825e1550 T sdmmc_check_cis_quirks +ffffffff825e2000 T sdmmc_io_enable +ffffffff825e22a0 T sdmmc_io_reset +ffffffff825e23d0 T sdmmc_io_send_op_cond +ffffffff825e2540 T sdmmc_io_scan +ffffffff825e2690 T sdmmc_io_init +ffffffff825e27c0 T sdmmc_io_set_highspeed +ffffffff825e2a60 T sdmmc_io_set_bus_width +ffffffff825e2cf0 T sdmmc_io_function_ready +ffffffff825e2e70 T sdmmc_io_read_1 +ffffffff825e2fc0 T sdmmc_io_function_enable +ffffffff825e3390 T sdmmc_io_write_1 +ffffffff825e3510 T sdmmc_io_function_disable +ffffffff825e3790 T sdmmc_io_attach +ffffffff825e3880 T sdmmc_print +ffffffff825e3ad0 T sdmmc_submatch +ffffffff825e3b50 T sdmmc_io_detach +ffffffff825e3c00 T sdmmc_io_rw_direct +ffffffff825e3da0 T sdmmc_io_rw_extended_subr +ffffffff825e3f40 T sdmmc_io_rw_extended +ffffffff825e4340 T sdmmc_io_read_2 +ffffffff825e44a0 T sdmmc_io_write_2 +ffffffff825e4600 T sdmmc_io_read_4 +ffffffff825e4760 T sdmmc_io_write_4 +ffffffff825e48c0 T sdmmc_io_read_multi_1 +ffffffff825e49b0 T sdmmc_io_write_multi_1 +ffffffff825e4aa0 T sdmmc_io_read_region_1 +ffffffff825e4b90 T sdmmc_io_write_region_1 +ffffffff825e4c80 T sdmmc_io_xchg +ffffffff825e4e10 T sdmmc_intr_enable +ffffffff825e5080 T sdmmc_intr_disable +ffffffff825e52f0 T sdmmc_intr_establish +ffffffff825e53f0 T sdmmc_intr_disestablish +ffffffff825e54e0 T sdmmc_card_intr +ffffffff825e5530 T sdmmc_intr_task +ffffffff825e55c0 T sdmmc_io_set_blocklen +ffffffff825e6000 T sdmmc_mem_enable +ffffffff825e6450 T sdmmc_mem_send_op_cond +ffffffff825e6600 T sdmmc_mem_signal_voltage +ffffffff825e66c0 T sdmmc_mem_scan +ffffffff825e69d0 T sdmmc_decode_csd +ffffffff825e6e00 T sdmmc_decode_cid +ffffffff825e72a0 T sdmmc_mem_send_scr +ffffffff825e73e0 T sdmmc_mem_decode_scr +ffffffff825e7440 T sdmmc_mem_send_cxd_data +ffffffff825e75b0 T sdmmc_mem_set_bus_width +ffffffff825e76c0 T sdmmc_mem_sd_switch +ffffffff825e7970 T sdmmc_be512_to_bitfield512 +ffffffff825e7a20 T sdmmc_mem_mmc_switch +ffffffff825e7b10 T sdmmc_mem_init +ffffffff825e7c60 T sdmmc_mem_set_blocklen +ffffffff825e7d60 T sdmmc_mem_sd_init +ffffffff825e8140 T sdmmc_mem_mmc_init +ffffffff825e8800 T sdmmc_mem_select_transfer_mode +ffffffff825e8880 T sdmmc_mem_execute_tuning +ffffffff825e8910 T sdmmc_mem_read_block_subr +ffffffff825e8c70 T sdmmc_mem_single_read_block +ffffffff825e8d40 T sdmmc_mem_read_block +ffffffff825e8ef0 T sdmmc_mem_write_block_subr +ffffffff825e9240 T sdmmc_mem_single_write_block +ffffffff825e9310 T sdmmc_mem_write_block +ffffffff825e94c0 T sdmmc_mem_hibernate_write +ffffffff825ea000 T sdmmc_scsi_cmd +ffffffff825ea1f0 T sdmmc_minphys +ffffffff825ea270 T sdmmc_scsi_attach +ffffffff825ea460 T sdmmc_alloc_ccbs +ffffffff825ea5a0 T sdmmc_free_ccbs +ffffffff825ea600 T sdmmc_scsi_detach +ffffffff825ea760 T sdmmc_stimeout +ffffffff825ea7e0 T sdmmc_ccb_alloc +ffffffff825ea890 T sdmmc_ccb_free +ffffffff825ea970 T sdmmc_inquiry +ffffffff825eabe0 T sdmmc_start_xs +ffffffff825eacd0 T sdmmc_complete_xs +ffffffff825eada0 T sdmmc_done_xs +ffffffff825eadf0 T sdmmc_scsi_hibernate_io +ffffffff825eb000 T bwfm_sdio_preinit +ffffffff825eb4a0 T bwfm_sdio_txcheck +ffffffff825eb4e0 T bwfm_sdio_txdata +ffffffff825eb550 T bwfm_sdio_txctl +ffffffff825eb6a0 T bwfm_sdio_buscore_read +ffffffff825eb6b0 T bwfm_sdio_buscore_write +ffffffff825eb6d0 T bwfm_sdio_buscore_prepare +ffffffff825eb810 T bwfm_sdio_buscore_activate +ffffffff825eb890 T bwfm_sdio_match +ffffffff825eb940 T bwfm_sdio_attach +ffffffff825ebc00 T bwfm_sdio_detach +ffffffff825ebc60 T bwfm_sdio_task +ffffffff825ebdc0 T bwfm_sdio_write_1 +ffffffff825ebdf0 T bwfm_sdio_read_1 +ffffffff825ebe20 T bwfm_sdio_write_4 +ffffffff825ebed0 T bwfm_sdio_read_4 +ffffffff825ebf80 T bwfm_sdio_load_microcode +ffffffff825ec1e0 T bwfm_sdio_clkctl +ffffffff825ec310 T bwfm_sdio_dev_write +ffffffff825ec360 T bwfm_sdio_intr +ffffffff825ec3a0 T bwfm_sdio_ram_read_write +ffffffff825ec5d0 T bwfm_sdio_htclk +ffffffff825ec840 T bwfm_sdio_readshared +ffffffff825ec910 T bwfm_sdio_dev_read +ffffffff825ec950 T bwfm_sdio_rx_frames +ffffffff825ecd00 T bwfm_sdio_tx_frames +ffffffff825ece00 T bwfm_sdio_backplane +ffffffff825eceb0 T bwfm_sdio_buf_read +ffffffff825ecf90 T bwfm_sdio_buf_write +ffffffff825ed040 T bwfm_sdio_frame_read_write +ffffffff825ed1c0 T bwfm_sdio_newbuf +ffffffff825ed240 T bwfm_sdio_tx_ok +ffffffff825ed2a0 T bwfm_sdio_tx_ctrlframe +ffffffff825ed3a0 T bwfm_sdio_tx_dataframe +ffffffff825ed4f0 T bwfm_sdio_rx_glom +ffffffff825ee000 T onewire_match +ffffffff825ee050 T onewire_attach +ffffffff825ee0f0 T onewire_detach +ffffffff825ee160 T onewire_activate +ffffffff825ee180 T onewire_scan +ffffffff825ee3a0 T onewire_createthread +ffffffff825ee410 T onewire_print +ffffffff825ee4e0 T onewirebus_print +ffffffff825ee530 T onewire_lock +ffffffff825ee550 T onewire_unlock +ffffffff825ee570 T onewire_reset +ffffffff825ee590 T onewire_bit +ffffffff825ee5b0 T onewire_read_byte +ffffffff825ee6f0 T onewire_write_byte +ffffffff825ee7d0 T onewire_read_block +ffffffff825ee870 T onewire_write_block +ffffffff825ee910 T onewire_triplet +ffffffff825ee9f0 T onewire_matchrom +ffffffff825eeb40 T onewire_search +ffffffff825eeee0 T onewire_thread +ffffffff825ef000 T onewire_crc +ffffffff825ef0b0 T onewire_crc16 +ffffffff825ef170 T onewire_famname +ffffffff825ef1b0 T onewire_matchbyfam +ffffffff825f0000 T owid_match +ffffffff825f0030 T owid_attach +ffffffff825f0100 T owid_detach +ffffffff825f0140 T owid_activate +ffffffff825f1000 T owsbm_match +ffffffff825f1030 T owsbm_attach +ffffffff825f11d0 T owsbm_detach +ffffffff825f1240 T owsbm_activate +ffffffff825f1270 T owsbm_update +ffffffff825f2000 T owtemp_match +ffffffff825f2030 T owtemp_attach +ffffffff825f2130 T owtemp_detach +ffffffff825f21a0 T owtemp_activate +ffffffff825f21d0 T owtemp_update +ffffffff825f3000 T owctr_match +ffffffff825f3030 T owctr_attach +ffffffff825f3180 T owctr_detach +ffffffff825f31f0 T owctr_activate +ffffffff825f3220 T owctr_update +ffffffff825f3250 T owctr_update_counter +ffffffff825f4000 A __text_page_start +ffffffff825f4000 T Xsyscall_meltdown +ffffffff825f400c T Xsyscall +ffffffff825f426e t Xsyscall_trampback +ffffffff825f4280 T intr_user_exit +ffffffff825f42c2 t intr_user_exit_post_ast +ffffffff825f43ee t Xiretq_trampback +ffffffff825f43fa T doreti_iret +ffffffff825f5000 T alltraps +ffffffff825f5138 T recall_trap +ffffffff825f5150 T alltraps_kern +ffffffff825f5153 T alltraps_kern_meltdown +ffffffff825f6000 ? Xsyscall32 +ffffffff825f6000 A __kutext_start +ffffffff825f6000 A __text_page_end +ffffffff825f7000 ? Xtrap00 +ffffffff825f7010 ? Xtrap01 +ffffffff825f7020 ? Xtrap02 +ffffffff825f7028 c calltrap_specstk +ffffffff825f70f0 ? calltrap_specstk_tramp +ffffffff825f7110 ? Xtrap03 +ffffffff825f7120 ? Xtrap04 +ffffffff825f7130 ? Xtrap05 +ffffffff825f7140 ? Xtrap06 +ffffffff825f7150 ? Xtrap07 +ffffffff825f7160 ? Xtrap08 +ffffffff825f7170 ? Xtrap09 +ffffffff825f7180 ? Xtrap0a +ffffffff825f7190 ? Xtrap0b +ffffffff825f71a0 ? Xtrap0c +ffffffff825f71b0 ? Xtrap0d +ffffffff825f7240 ? Xtrap0e +ffffffff825f7250 ? Xintrspurious +ffffffff825f7250 ? Xtrap0f +ffffffff825f7260 ? Xtrap10 +ffffffff825f7270 ? Xtrap11 +ffffffff825f7280 ? Xtrap12 +ffffffff825f7290 ? Xtrap13 +ffffffff825f72a0 ? Xtrap14 +ffffffff825f72b0 ? Xtrap15 +ffffffff825f72c0 ? Xtrap16 +ffffffff825f72c0 ? Xtrap17 +ffffffff825f72c0 ? Xtrap18 +ffffffff825f72c0 ? Xtrap19 +ffffffff825f72c0 ? Xtrap1a +ffffffff825f72c0 ? Xtrap1b +ffffffff825f72c0 ? Xtrap1c +ffffffff825f72c0 ? Xtrap1d +ffffffff825f72c0 ? Xtrap1e +ffffffff825f72c0 ? Xtrap1f +ffffffff825f72d0 ? x2apic_eoi +ffffffff825f72f0 ? Xintr_lapic_ipi +ffffffff825f7330 ? Xipi_invltlb +ffffffff825f7360 ? Xipi_invlpg +ffffffff825f7390 ? Xipi_invlrange +ffffffff825f73d0 ? Xipi_invltlb_pcid +ffffffff825f7410 ? Xipi_invlpg_pcid +ffffffff825f7460 ? Xipi_invlrange_pcid +ffffffff825f74d0 ? Xintr_lapic_ltimer +ffffffff825f7510 ? Xintr_xen_upcall +ffffffff825f7550 ? Xintr_hyperv_upcall +ffffffff825f7590 ? Xintr_legacy0 +ffffffff825f75d0 ? Xintr_legacy1 +ffffffff825f7610 ? Xintr_legacy2 +ffffffff825f7650 ? Xintr_legacy3 +ffffffff825f7690 ? Xintr_legacy4 +ffffffff825f76d0 ? Xintr_legacy5 +ffffffff825f7710 ? Xintr_legacy6 +ffffffff825f7750 ? Xintr_legacy7 +ffffffff825f7790 ? Xintr_legacy8 +ffffffff825f77d0 ? Xintr_legacy9 +ffffffff825f7810 ? Xintr_legacy10 +ffffffff825f7850 ? Xintr_legacy11 +ffffffff825f7890 ? Xintr_legacy12 +ffffffff825f78d0 ? Xintr_legacy13 +ffffffff825f7910 ? Xintr_legacy14 +ffffffff825f7950 ? Xintr_legacy15 +ffffffff825f7990 ? Xintr_ioapic_edge0 +ffffffff825f79d0 ? Xintr_ioapic_edge1 +ffffffff825f7a10 ? Xintr_ioapic_edge2 +ffffffff825f7a50 ? Xintr_ioapic_edge3 +ffffffff825f7a90 ? Xintr_ioapic_edge4 +ffffffff825f7ad0 ? Xintr_ioapic_edge5 +ffffffff825f7b10 ? Xintr_ioapic_edge6 +ffffffff825f7b50 ? Xintr_ioapic_edge7 +ffffffff825f7b90 ? Xintr_ioapic_edge8 +ffffffff825f7bd0 ? Xintr_ioapic_edge9 +ffffffff825f7c10 ? Xintr_ioapic_edge10 +ffffffff825f7c50 ? Xintr_ioapic_edge11 +ffffffff825f7c90 ? Xintr_ioapic_edge12 +ffffffff825f7cd0 ? Xintr_ioapic_edge13 +ffffffff825f7d10 ? Xintr_ioapic_edge14 +ffffffff825f7d50 ? Xintr_ioapic_edge15 +ffffffff825f7d90 ? Xintr_ioapic_edge16 +ffffffff825f7dd0 ? Xintr_ioapic_edge17 +ffffffff825f7e10 ? Xintr_ioapic_edge18 +ffffffff825f7e50 ? Xintr_ioapic_edge19 +ffffffff825f7e90 ? Xintr_ioapic_edge20 +ffffffff825f7ed0 ? Xintr_ioapic_edge21 +ffffffff825f7f10 ? Xintr_ioapic_edge22 +ffffffff825f7f50 ? Xintr_ioapic_edge23 +ffffffff825f7f90 ? Xintr_ioapic_edge24 +ffffffff825f7fd0 ? Xintr_ioapic_edge25 +ffffffff825f8010 ? Xintr_ioapic_edge26 +ffffffff825f8050 ? Xintr_ioapic_edge27 +ffffffff825f8090 ? Xintr_ioapic_edge28 +ffffffff825f80d0 ? Xintr_ioapic_edge29 +ffffffff825f8110 ? Xintr_ioapic_edge30 +ffffffff825f8150 ? Xintr_ioapic_edge31 +ffffffff825f8190 ? Xintr_ioapic_edge32 +ffffffff825f81d0 ? Xintr_ioapic_edge33 +ffffffff825f8210 ? Xintr_ioapic_edge34 +ffffffff825f8250 ? Xintr_ioapic_edge35 +ffffffff825f8290 ? Xintr_ioapic_edge36 +ffffffff825f82d0 ? Xintr_ioapic_edge37 +ffffffff825f8310 ? Xintr_ioapic_edge38 +ffffffff825f8350 ? Xintr_ioapic_edge39 +ffffffff825f8390 ? Xintr_ioapic_edge40 +ffffffff825f83d0 ? Xintr_ioapic_edge41 +ffffffff825f8410 ? Xintr_ioapic_edge42 +ffffffff825f8450 ? Xintr_ioapic_edge43 +ffffffff825f8490 ? Xintr_ioapic_edge44 +ffffffff825f84d0 ? Xintr_ioapic_edge45 +ffffffff825f8510 ? Xintr_ioapic_edge46 +ffffffff825f8550 ? Xintr_ioapic_edge47 +ffffffff825f8590 ? Xintr_ioapic_edge48 +ffffffff825f85d0 ? Xintr_ioapic_edge49 +ffffffff825f8610 ? Xintr_ioapic_edge50 +ffffffff825f8650 ? Xintr_ioapic_edge51 +ffffffff825f8690 ? Xintr_ioapic_edge52 +ffffffff825f86d0 ? Xintr_ioapic_edge53 +ffffffff825f8710 ? Xintr_ioapic_edge54 +ffffffff825f8750 ? Xintr_ioapic_edge55 +ffffffff825f8790 ? Xintr_ioapic_edge56 +ffffffff825f87d0 ? Xintr_ioapic_edge57 +ffffffff825f8810 ? Xintr_ioapic_edge58 +ffffffff825f8850 ? Xintr_ioapic_edge59 +ffffffff825f8890 ? Xintr_ioapic_edge60 +ffffffff825f88d0 ? Xintr_ioapic_edge61 +ffffffff825f8910 ? Xintr_ioapic_edge62 +ffffffff825f8950 ? Xintr_ioapic_edge63 +ffffffff825f8990 ? Xintr_ioapic_level0 +ffffffff825f89d0 ? Xintr_ioapic_level1 +ffffffff825f8a10 ? Xintr_ioapic_level2 +ffffffff825f8a50 ? Xintr_ioapic_level3 +ffffffff825f8a90 ? Xintr_ioapic_level4 +ffffffff825f8ad0 ? Xintr_ioapic_level5 +ffffffff825f8b10 ? Xintr_ioapic_level6 +ffffffff825f8b50 ? Xintr_ioapic_level7 +ffffffff825f8b90 ? Xintr_ioapic_level8 +ffffffff825f8bd0 ? Xintr_ioapic_level9 +ffffffff825f8c10 ? Xintr_ioapic_level10 +ffffffff825f8c50 ? Xintr_ioapic_level11 +ffffffff825f8c90 ? Xintr_ioapic_level12 +ffffffff825f8cd0 ? Xintr_ioapic_level13 +ffffffff825f8d10 ? Xintr_ioapic_level14 +ffffffff825f8d50 ? Xintr_ioapic_level15 +ffffffff825f8d90 ? Xintr_ioapic_level16 +ffffffff825f8dd0 ? Xintr_ioapic_level17 +ffffffff825f8e10 ? Xintr_ioapic_level18 +ffffffff825f8e50 ? Xintr_ioapic_level19 +ffffffff825f8e90 ? Xintr_ioapic_level20 +ffffffff825f8ed0 ? Xintr_ioapic_level21 +ffffffff825f8f10 ? Xintr_ioapic_level22 +ffffffff825f8f50 ? Xintr_ioapic_level23 +ffffffff825f8f90 ? Xintr_ioapic_level24 +ffffffff825f8fd0 ? Xintr_ioapic_level25 +ffffffff825f9010 ? Xintr_ioapic_level26 +ffffffff825f9050 ? Xintr_ioapic_level27 +ffffffff825f9090 ? Xintr_ioapic_level28 +ffffffff825f90d0 ? Xintr_ioapic_level29 +ffffffff825f9110 ? Xintr_ioapic_level30 +ffffffff825f9150 ? Xintr_ioapic_level31 +ffffffff825f9190 ? Xintr_ioapic_level32 +ffffffff825f91d0 ? Xintr_ioapic_level33 +ffffffff825f9210 ? Xintr_ioapic_level34 +ffffffff825f9250 ? Xintr_ioapic_level35 +ffffffff825f9290 ? Xintr_ioapic_level36 +ffffffff825f92d0 ? Xintr_ioapic_level37 +ffffffff825f9310 ? Xintr_ioapic_level38 +ffffffff825f9350 ? Xintr_ioapic_level39 +ffffffff825f9390 ? Xintr_ioapic_level40 +ffffffff825f93d0 ? Xintr_ioapic_level41 +ffffffff825f9410 ? Xintr_ioapic_level42 +ffffffff825f9450 ? Xintr_ioapic_level43 +ffffffff825f9490 ? Xintr_ioapic_level44 +ffffffff825f94d0 ? Xintr_ioapic_level45 +ffffffff825f9510 ? Xintr_ioapic_level46 +ffffffff825f9550 ? Xintr_ioapic_level47 +ffffffff825f9590 ? Xintr_ioapic_level48 +ffffffff825f95d0 ? Xintr_ioapic_level49 +ffffffff825f9610 ? Xintr_ioapic_level50 +ffffffff825f9650 ? Xintr_ioapic_level51 +ffffffff825f9690 ? Xintr_ioapic_level52 +ffffffff825f96d0 ? Xintr_ioapic_level53 +ffffffff825f9710 ? Xintr_ioapic_level54 +ffffffff825f9750 ? Xintr_ioapic_level55 +ffffffff825f9790 ? Xintr_ioapic_level56 +ffffffff825f97d0 ? Xintr_ioapic_level57 +ffffffff825f9810 ? Xintr_ioapic_level58 +ffffffff825f9850 ? Xintr_ioapic_level59 +ffffffff825f9890 ? Xintr_ioapic_level60 +ffffffff825f98d0 ? Xintr_ioapic_level61 +ffffffff825f9910 ? Xintr_ioapic_level62 +ffffffff825f9950 ? Xintr_ioapic_level63 +ffffffff825fa000 ? codepatch_fill_nop +ffffffff825fa000 A __cptext_start +ffffffff825fa000 A __kutext_end +ffffffff825fa0b0 ? codepatch_maprw +ffffffff825fa190 ? codepatch_unmaprw +ffffffff825fa200 ? codepatch_nop +ffffffff825fa360 ? codepatch_replace +ffffffff825fa510 ? codepatch_call +ffffffff825fa530 ? codepatch_jmp +ffffffff825fb000 A __cptext_end +ffffffff825fb000 A __rodata_start +ffffffff825fb000 C _etext +ffffffff825fb000 C etext +ffffffff825fc000 r seeprom_read +ffffffff825fc004 r icl_mg_pll_find_divisors.div1_vals +ffffffff825fc034 r athn_ac2qid +ffffffff825fc034 r athn_ac2qid +ffffffff825fc034 r athn_ac2qid +ffffffff825fc040 r rtwn_get_rssi.cckoff +ffffffff825fc068 r rsu_ac2qid +ffffffff825fc078 r pckbc_portcmd +ffffffff825fc07c r tht_fifo_write_pad.pad +ffffffff825fc084 r rsu_get_rssi.cckoff +ffffffff825fc0a4 r adlp_n_revids +ffffffff825fc0e8 r apple_iso_trans +ffffffff825fc0f0 r wihap_check_tx.txratetable +ffffffff825fc0f4 r dmamode +ffffffff825fc118 r gen9_edram_size_mb.sets +ffffffff825fc12c r dg2_g12_revid_step_tbl +ffffffff825fd000 r isomappings +ffffffff825fd080 r unimappings +ffffffff825fd230 r replacements +ffffffff8260093f r apollo_pio_rec +ffffffff8264cf3a r apollo_udma33_tim +ffffffff82662049 r pp_r600_decoded_lanes +ffffffff826981a5 r cmd680_setup_channel.udma_tbl +ffffffff826a0657 r apollo_udma100_tim +ffffffff826a065d r cmd0646_9_tim_udma +ffffffff826aeaad r substchar +ffffffff827045b4 r apollo_udma133_tim +ffffffff827045bb r apollo_udma66_tim +ffffffff827045e5 r cy_pio_rec +ffffffff82709cd0 R drm_ca +ffffffff82709cf8 R drm_filtops +ffffffff82709d28 R drmread_filtops +ffffffff8270a000 r vga_emulops +ffffffff8270a048 R vga_stdscreen +ffffffff8270a078 R vga_stdscreen_mono +ffffffff8270a0a8 R vga_stdscreen_bf +ffffffff8270a0d8 R vga_40lscreen +ffffffff8270a108 R vga_40lscreen_mono +ffffffff8270a138 R vga_40lscreen_bf +ffffffff8270a168 R vga_50lscreen +ffffffff8270a198 R vga_50lscreen_mono +ffffffff8270a1c8 R vga_50lscreen_bf +ffffffff8270a1f8 R vga_screenlist +ffffffff8270a208 R vga_screenlist_mono +ffffffff8270a218 R vga_accessops +ffffffff8270a278 r i945_wm_info +ffffffff8270a2b8 r bgansitopc +ffffffff8270a2c0 r pctoansi +ffffffff8270a300 r sdma_offsets +ffffffff8270a300 r sdma_offsets +ffffffff8270a338 r iha_rate_tbl +ffffffff8270a370 r i830_a_wm_info +ffffffff8270a3a8 r gen9_edram_size_mb.ways +ffffffff8270a408 r aggr_periodic_times +ffffffff8270a500 r michael_final.pad +ffffffff8270a528 r rt_copysa.maskarray +ffffffff8270a530 r i915_wm_info +ffffffff8270a538 r amdgpu_ih_clientid_jpeg +ffffffff8270a538 r amdgpu_ih_clientid_uvds +ffffffff8270a538 r amdgpu_ih_clientid_vcns +ffffffff8270a538 r amdgpu_ih_clientid_vcns +ffffffff8270a538 r amdgpu_ih_clientid_vcns +ffffffff8270a568 r jsl_ehl_revids +ffffffff8270a578 r vga_setfontset.cmaptabb +ffffffff8270a5e8 r i830_bc_wm_info +ffffffff8270a650 r hsw_activate_psr2.map +ffffffff8270a658 r tgl_revids +ffffffff8270a690 r __drm_universal_plane_init.default_modifiers +ffffffff8270a6a0 r iwn_tid2fifo +ffffffff8270a6b8 r vga_setfontset.cmaptaba +ffffffff8270a6c0 r crtc_offsets +ffffffff8270a6c0 r crtc_offsets +ffffffff8270a6c0 r crtc_offsets +ffffffff8270a768 r rtwn_r88e_get_rssi.cckoff +ffffffff8270b000 R edid_vendors +ffffffff8270b2c0 R edid_nvendors +ffffffff8270b2d0 R edid_products +ffffffff8270b330 R edid_nproducts +ffffffff8270b340 r _edid_modes +ffffffff8270c000 R videomode_list +ffffffff8270d080 R videomode_count +ffffffff8270e000 r ahc_hard_errors +ffffffff8270e080 r critical_sections +ffffffff8270e0b0 r patches +ffffffff8270ed50 r seqprog +ffffffff82710000 r ahc_switch +ffffffff82711000 r termstat_strings +ffffffff82711020 r critical_sections +ffffffff82711060 r seqprog +ffffffff82711d50 r patches +ffffffff82713000 r ahd_switch +ffffffff82714000 R aic_switch +ffffffff82715000 R adw_switch +ffffffff82716000 R gdt_switch +ffffffff82717000 R twe_switch +ffffffff82718000 R ciss_switch +ffffffff82718030 R ciss_level +ffffffff82718050 R ciss_stat +ffffffff82719000 R ami_switch +ffffffff82719028 R ami_raw_switch +ffffffff8271a000 R mfi_switch +ffffffff8271a028 R mfi_pd_switch +ffffffff8271a050 r mfi_iop_xscale +ffffffff8271a080 r mfi_iop_ppc +ffffffff8271a0b0 r mfi_iop_gen2 +ffffffff8271a0e0 r mfi_iop_skinny +ffffffff8271a110 r mfi_bbu_indicators +ffffffff8271b000 R qlw_switch +ffffffff8271c000 R isp_2100_risc_code +ffffffff8272ebf0 R isp_2200_risc_code +ffffffff82741990 R isp_2300_risc_code +ffffffff8275b408 R qla_switch +ffffffff8275b430 r qla_regs_2100 +ffffffff8275b460 r qla_regs_2200 +ffffffff8275b490 r qla_regs_23XX +ffffffff8275c000 R ahci_atascsi_methods +ffffffff8275d000 R nvme_switch +ffffffff8275d028 r nvme_ops +ffffffff8275e000 R mpi_switch +ffffffff8275e060 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff8275e090 r chv_oa_mux_regs +ffffffff8275e0b0 r fiji_clock_stretcher_lookup_table +ffffffff8275e0b0 r tonga_clock_stretcher_lookup_table +ffffffff8275e0d0 r iosf_pci_devices +ffffffff8275e0f0 r link_speed +ffffffff8275e0f0 r link_speed +ffffffff8275e130 r drm_fb_xfrm.default_dst_pitch +ffffffff8275e130 r non_supported_protection +ffffffff8275e140 r tgl_uy_revids +ffffffff8275e2a0 r bwi_phy_noise_11g_rev1 +ffffffff8275e310 r cardslot_process_event.antonym_ev +ffffffff8275e3a0 r gen11_oa_mux_regs +ffffffff8275e440 r dpia_to_preferred_enc_id_table +ffffffff8275e4b0 r ddr2_cycle_tenths +ffffffff8275e520 r rtw_intr_rx.ratetbl +ffffffff8275e5a0 r abm_config +ffffffff8275e620 r getbootinfo.ports +ffffffff8275e670 r reg_offsets +ffffffff8275e680 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff8275e690 r glk_revids +ffffffff8275e6a0 r init_non_clock_fields.look_up +ffffffff8275e6b0 r uftdi_8u232am_getrate.roundoff +ffffffff8275e710 r zyd_rx_data.rates +ffffffff8275e730 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff8275e760 r intel_engine_init_tlb_invalidation.gen8_regs +ffffffff8275e790 r bwi_phy_noise_11g +ffffffff8275e7a0 r hpt366_pio +ffffffff8275e800 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff8275e820 r ether_crc32_be_update.rev +ffffffff8275e820 r rtw_grf5101_mac_crypt.caesar +ffffffff8275e870 r snb_b_fdi_train_param +ffffffff8275e940 r intel_hpll_vco.elk_vco +ffffffff8275e960 r icl_revids +ffffffff8275e9c0 r pin_offsets +ffffffff8275e9e0 r amdgpu_ih_srcid_jpeg +ffffffff8275ea20 r firmware_list +ffffffff8275ea80 r atom_arg_shift +ffffffff8275ea80 r atom_arg_shift +ffffffff8275eac0 r pf_syncookie_wstab +ffffffff8275eae0 r ieee80211_media_init.mopts +ffffffff8275eb40 r add_entropy_words.twist_table +ffffffff8275ebe0 r urtw_8225v2_txpwr_cck +ffffffff8275ec00 r bwfm_pci_prio2fifo +ffffffff8275ec00 r ieee80211_up_to_ac.up_to_ac +ffffffff8275ecc0 r paritytab +ffffffff8275ecc0 r x86emu_parity_tab +ffffffff8275ece0 r legacy_connector_convert +ffffffff8275ed20 r gen7_oa_mux_regs +ffffffff8275ed40 r hsw_oa_mux_regs +ffffffff8275ed60 r notetab +ffffffff8275ed80 r urtw_8225v2_txpwr_cck_ch14 +ffffffff8275eda0 r bwi_rf_calibval.rf_calibvals +ffffffff8275ee40 r pf_syncookie_msstab +ffffffff8275eea0 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff8275ef00 r uath_wme_init.uath_wme_11g +ffffffff8275ef40 r gen7_oa_b_counters +ffffffff8275f140 r rtwn_iq_calib_run.reg_adda +ffffffff8275f180 r atom_def_dst +ffffffff8275f180 r atom_def_dst +ffffffff8275f1c0 r sha256_initial_hash_value +ffffffff8275f220 r otus_edca_def +ffffffff8275f240 r intel_hpll_vco.blb_vco +ffffffff8275f320 r epic_pci_subsys_info +ffffffff8275f340 r kbl_revids +ffffffff8275f360 r atom_arg_mask +ffffffff8275f360 r atom_arg_mask +ffffffff8275f3c0 r butmap +ffffffff8275f400 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff8275f440 r comsoft.lsrmap +ffffffff8275f480 r xgmi3x16_pcs_err_noncorrectable_mask_reg_aldebaran +ffffffff8275f4a0 r tulip_mii_phy_readspecific.table +ffffffff8275f540 r intel_hpll_vco.pnv_vco +ffffffff8275f5a0 r dmapageport +ffffffff8275f660 r intel_hpll_vco.ctg_vco +ffffffff8275f720 r drm_calculate_luminance_range.pre_computed_values +ffffffff82760000 R sili_atascsi_methods +ffffffff82761000 R ncr53c9x_switch +ffffffff82762000 r scf_period +ffffffff82763000 R siop_script +ffffffff827635a0 R lun_switch +ffffffff827635d0 R tag_switch +ffffffff82763660 R load_dsa +ffffffff827636c4 R siop_led_on +ffffffff827636cc R siop_led_off +ffffffff827636d8 R siop_switch +ffffffff82764000 R ep_vortex_media +ffffffff82764100 R ep_default_to_media +ffffffff82765000 R wi_card_ident +ffffffff82767000 R ucode_table +ffffffff82768000 r re_revisions +ffffffff82768290 r re_kstats_tpl +ffffffff8276a000 R smc91cxx_media +ffffffff8276a010 R smc91cxx_mii_bitbang_ops +ffffffff8276b000 R dl10019_mii_bitbang_ops +ffffffff8276b028 R dl10022_mii_bitbang_ops +ffffffff8276c000 R ax88190_mii_bitbang_ops +ffffffff8276e000 R ac97_audio_default +ffffffff8276e020 R ac97_on_off +ffffffff8276e324 R ac97_mic_select +ffffffff8276e628 R ac97_mono_select +ffffffff8276e92c R ac97_source +ffffffff8276ec30 R ac97_volume_stereo +ffffffff8276ec4c R ac97_volume_mono +ffffffff8276ec70 R source_info +ffffffff8276f470 R ac97_ad +ffffffff8276f580 R ac97_ak +ffffffff8276f610 R ac97_av +ffffffff8276f750 R ac97_rl +ffffffff8276f7a0 R ac97_cm +ffffffff8276f820 R ac97_cr +ffffffff8276f840 R ac97_cs +ffffffff8276f920 R ac97_cx +ffffffff8276f980 R ac97_dt +ffffffff8276f9a0 R ac97_em +ffffffff8276f9d0 R ac97_es +ffffffff8276f9f0 R ac97_is +ffffffff8276fa10 R ac97_ic +ffffffff8276fa90 R ac97_it +ffffffff8276fac0 R ac97_ns +ffffffff8276fb80 R ac97_ps +ffffffff8276fbb0 R ac97_sl +ffffffff8276fbd0 R ac97_st +ffffffff8276fd20 R ac97_vi +ffffffff8276fd50 R ac97_tt +ffffffff8276fdd0 R ac97_ti +ffffffff8276fdf0 R ac97_wb +ffffffff8276fe10 R ac97_wo +ffffffff8276fea0 R ac97_ym +ffffffff8276fef0 R ac97_vendors +ffffffff827701f0 R ac97enhancement +ffffffff827702f0 R ac97feature +ffffffff82771000 R lm_chips +ffffffff82771020 R lm78_sensors +ffffffff827711a0 R w83627hf_sensors +ffffffff827713a0 R w83627ehf_sensors +ffffffff827715c0 R w83627dhg_sensors +ffffffff827717c0 R nct6776f_sensors +ffffffff82771a00 R nct6779d_sensors +ffffffff82771d60 R w83637hf_sensors +ffffffff82771f20 R w83697hf_sensors +ffffffff827720c0 R w83781d_sensors +ffffffff82772280 R w83782d_sensors +ffffffff82772480 R w83783s_sensors +ffffffff82772600 R w83791d_sensors +ffffffff82772860 R w83792d_sensors +ffffffff82772ae0 R as99127f_sensors +ffffffff82773000 r ar5k_known_products +ffffffff82773110 r ar5111_gain_opt +ffffffff827731e0 r ar5112_gain_opt +ffffffff827732b0 r ar5k_5ghz_channels +ffffffff82773a00 r ar5k_2ghz_channels +ffffffff82773f10 r ar5111_rf +ffffffff82774350 r ar5112a_rf +ffffffff82774890 r ar5112_rf +ffffffff82774da0 r ar5413_rf +ffffffff827751b0 r ar2413_rf +ffffffff827754d0 r ar2425_rf +ffffffff82775830 r ar5111_rfg +ffffffff82775b30 r ar5112_rfg +ffffffff82775e30 r ar5413_rfg +ffffffff82776130 r ar2413_rfg +ffffffff82776430 r ar5k_rt_11a +ffffffff82776552 r ar5k_rt_11b +ffffffff82776674 r ar5k_rt_11g +ffffffff82776796 r ar5k_rt_xr +ffffffff82777000 r ar5210_ini +ffffffff82778000 r ar5211_mode +ffffffff827782c0 r ar5211_ini +ffffffff82778ad0 r ar5211_rf +ffffffff82779000 r ar5212_pcie +ffffffff82779080 r ar5212_mode +ffffffff82779310 r ar5212_ini +ffffffff82779c80 r ar5212_ar5111_mode +ffffffff82779f20 r ar5212_ar5112_mode +ffffffff8277a1b0 r ar5413_mode +ffffffff8277ab10 r ar2413_mode +ffffffff8277b430 r ar2425_mode +ffffffff8277bd90 r ar5111_bbgain +ffffffff8277c090 r ar5112_bbgain +ffffffff8277d000 r athn_5ghz_chans +ffffffff8277d020 r athn_rates +ffffffff8277e000 r athn_rates +ffffffff8277f000 r ar9160_ini +ffffffff8277f068 r ar5416_ini +ffffffff8277f0d0 r ar5416_serdes +ffffffff8277f0e8 r ar9160_1_1_addac +ffffffff8277f0f8 r ar9160_1_0_addac +ffffffff8277f108 r ar5416_2_2_addac +ffffffff8277f118 r ar5416_2_1_addac +ffffffff8277f128 r ar5416_set_power_calib.chainoffset +ffffffff8277f140 r ar9160_bank6tpc_vals +ffffffff8277f1c0 r ar5416_bank6tpc_vals +ffffffff8277f240 r ar5416_bb_rfgain_vals_2g +ffffffff8277f340 r ar5416_bb_rfgain_vals_5g +ffffffff8277f440 r ar5416_bank6_vals +ffffffff8277f4c0 r ar9160_regs +ffffffff8277f540 r ar9160_vals_5g20 +ffffffff8277f640 r ar9160_vals_5g40 +ffffffff8277f740 r ar9160_vals_2g40 +ffffffff8277f840 r ar9160_vals_2g20 +ffffffff8277f940 r ar9160_cm_regs +ffffffff8277fc30 r ar9160_cm_vals +ffffffff82780210 r ar5416_regs +ffffffff82780290 r ar5416_vals_5g20 +ffffffff82780390 r ar5416_vals_5g40 +ffffffff82780490 r ar5416_vals_2g40 +ffffffff82780590 r ar5416_vals_2g20 +ffffffff82780690 r ar5416_cm_regs +ffffffff82780980 r ar5416_cm_vals +ffffffff82780f60 r ar5416_serdes_regs +ffffffff82780f90 r ar5416_serdes_vals +ffffffff82780fc0 r ar9160_1_1_addac_vals +ffffffff82781040 r ar9160_1_0_addac_vals +ffffffff827810c0 r ar5416_2_2_addac_vals +ffffffff82781150 r ar5416_2_1_addac_vals +ffffffff82782000 r ar9280_2_0_ini +ffffffff82782068 r ar9280_2_0_serdes +ffffffff82782080 r ar9280_2_0_rx_gain_23db_backoff +ffffffff827820a0 r ar9280_2_0_rx_gain_13db_backoff +ffffffff827820c0 r ar9280_2_0_rx_gain +ffffffff827820e0 r ar9280_2_0_tx_gain_high_power +ffffffff82782100 r ar9280_2_0_tx_gain +ffffffff82782120 r ar9280_init_from_rom.chainoffset +ffffffff82782130 r ar9280_2_0_regs +ffffffff82782190 r ar9280_2_0_vals_5g20 +ffffffff82782250 r ar9280_2_0_vals_5g40 +ffffffff82782310 r ar9280_2_0_vals_2g40 +ffffffff827823d0 r ar9280_2_0_vals_2g20 +ffffffff82782490 r ar9280_2_0_cm_regs +ffffffff82782740 r ar9280_2_0_cm_vals +ffffffff82782c90 r ar9280_2_0_fast_clock_regs +ffffffff82782cb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff82782cf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff82782d30 r ar9280_2_0_serdes_regs +ffffffff82782d60 r ar9280_2_0_serdes_vals +ffffffff82782d90 r ar9280_2_0_rx_gain_regs +ffffffff82782ea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff827830b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff827832c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff827834d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g +ffffffff827836e0 r ar9280_2_0_rx_gain_vals_5g +ffffffff827838f0 r ar9280_2_0_rx_gain_vals_2g +ffffffff82783b00 r ar9280_2_0_tx_gain_regs +ffffffff82783b40 r ar9280_2_0_tx_gain_high_power_vals_5g +ffffffff82783bc0 r ar9280_2_0_tx_gain_high_power_vals_2g +ffffffff82783c40 r ar9280_2_0_tx_gain_vals_5g +ffffffff82783cc0 r ar9280_2_0_tx_gain_vals_2g +ffffffff82784000 r ar9271_ini +ffffffff82784068 r ar9285_1_2_ini +ffffffff827840d0 r ar9280_2_0_serdes +ffffffff827840e8 r ar9271_tx_gain_high_power +ffffffff82784108 r ar9271_tx_gain +ffffffff82784128 r ar9285_2_0_tx_gain_high_power +ffffffff82784148 r ar9285_2_0_tx_gain +ffffffff82784168 r ar9285_1_2_tx_gain_high_power +ffffffff82784188 r ar9285_1_2_tx_gain +ffffffff827841b0 r ar9271_regs +ffffffff82784410 r ar9271_vals_2g40 +ffffffff827848d0 r ar9271_vals_2g20 +ffffffff82784d90 r ar9271_cm_regs +ffffffff82785020 r ar9271_cm_vals +ffffffff82785540 r ar9285_1_2_regs +ffffffff827857a0 r ar9285_1_2_vals_2g40 +ffffffff82785c60 r ar9285_1_2_vals_2g20 +ffffffff82786120 r ar9285_1_2_cm_regs +ffffffff827863a0 r ar9285_1_2_cm_vals +ffffffff82786890 r ar9280_2_0_serdes_regs +ffffffff827868c0 r ar9280_2_0_serdes_vals +ffffffff827868f0 r ar9271_tx_gain_regs +ffffffff82786940 r ar9271_tx_gain_high_power_vals_2g +ffffffff827869d0 r ar9271_tx_gain_vals_2g +ffffffff82786a60 r ar9285_1_2_tx_gain_regs +ffffffff82786ab0 r ar9285_2_0_tx_gain_high_power_vals_2g +ffffffff82786b50 r ar9285_2_0_tx_gain_vals_2g +ffffffff82786bf0 r ar9285_1_2_tx_gain_high_power_vals_2g +ffffffff82786c90 r ar9285_1_2_tx_gain_vals_2g +ffffffff82787000 r ar9287_1_1_ini +ffffffff82787068 r ar9280_2_0_serdes +ffffffff82787080 r ar9287_1_1_rx_gain +ffffffff827870a0 r ar9287_1_1_tx_gain +ffffffff827870c0 r ar9287_1_1_regs +ffffffff82787120 r ar9287_1_1_vals_2g40 +ffffffff827871d0 r ar9287_1_1_vals_2g20 +ffffffff82787280 r ar9287_1_1_cm_regs +ffffffff82787560 r ar9287_1_1_cm_vals +ffffffff82787b20 r ar9280_2_0_serdes_regs +ffffffff82787b50 r ar9280_2_0_serdes_vals +ffffffff82787b80 r ar9287_1_1_rx_gain_regs +ffffffff82787d90 r ar9287_1_1_rx_gain_vals_2g +ffffffff827881a0 r ar9287_1_1_tx_gain_regs +ffffffff82788200 r ar9287_1_1_tx_gain_vals_2g +ffffffff82789000 r athn_rates +ffffffff8278a000 r ar9485_1_1_ini +ffffffff8278a068 r ar9485_1_1_serdes +ffffffff8278a080 r ar9380_2_2_ini +ffffffff8278a0e8 r ar9380_2_2_serdes +ffffffff8278a100 r ar9380_2_2_rx_gain_wo_xlna +ffffffff8278a120 r ar9380_2_2_rx_gain +ffffffff8278a140 r ar9485_1_1_rx_gain +ffffffff8278a160 r ar9380_2_2_tx_gain_high_ob_db +ffffffff8278a180 r ar9380_2_2_tx_gain_low_ob_db +ffffffff8278a1a0 r ar9380_2_2_tx_gain_high_power +ffffffff8278a1c0 r ar9380_2_2_tx_gain +ffffffff8278a1e0 r ar9485_1_1_tx_gain +ffffffff8278a200 r ar9485_1_1_regs +ffffffff8278a270 r ar9485_1_1_vals_2g40 +ffffffff8278a350 r ar9485_1_1_vals_2g20 +ffffffff8278a430 r ar9485_1_1_cm_regs +ffffffff8278a720 r ar9485_1_1_cm_vals +ffffffff8278ad00 r ar9485_1_1_serdes_regs +ffffffff8278ad0c r ar9485_1_1_serdes_vals +ffffffff8278ad20 r ar9380_2_2_regs +ffffffff8278adb0 r ar9380_2_2_vals_5g20 +ffffffff8278aed0 r ar9380_2_2_vals_5g40 +ffffffff8278aff0 r ar9380_2_2_vals_2g40 +ffffffff8278b110 r ar9380_2_2_vals_2g20 +ffffffff8278b230 r ar9380_2_2_cm_regs +ffffffff8278b5d0 r ar9380_2_2_cm_vals +ffffffff8278bd00 r ar9380_2_2_fast_clock_regs +ffffffff8278bd20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff8278bd50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff8278bd74 r ar9380_2_2_serdes_regs +ffffffff8278bd80 r ar9380_2_2_serdes_vals +ffffffff8278bd90 r ar9380_2_2_rx_gain_regs +ffffffff8278bf90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff8278c390 r ar9380_2_2_rx_gain_vals +ffffffff8278c790 r ar9485_1_1_rx_gain_regs +ffffffff8278c890 r ar9485_1_1_rx_gain_vals +ffffffff8278ca90 r ar9380_2_2_tx_gain_regs +ffffffff8278cb60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff8278cd00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff8278cea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff8278d040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff8278d1e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff8278d380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff8278d520 r ar9380_2_2_tx_gain_vals_5g +ffffffff8278d6c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff8278d860 r ar9485_1_1_tx_gain_regs +ffffffff8278d8f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff8278da10 r ar9380_def_rom +ffffffff8278de50 r ar9380_def_rom_h112 +ffffffff8278e290 r ar9380_def_rom_h116 +ffffffff8278e6d0 r ar9380_def_rom_x112 +ffffffff8278eb10 r ar9380_def_rom_x113 +ffffffff8278f000 R atw_txthresh_tab_lo +ffffffff8278f050 R atw_txthresh_tab_hi +ffffffff8278f0a0 r atw_attach.empty_macaddr +ffffffff8278f0b0 r atw_attach.type_strings +ffffffff8278f0d0 r atw_rfmd2958_ifn +ffffffff8278f110 r atw_rfmd2958_rf1r +ffffffff8278f150 r atw_rxintr.rate_tbl +ffffffff82790000 r rtw_identify_sta.empty_macaddr +ffffffff82791000 r rtwn_set_key.etherzeroaddr +ffffffff82791010 r rtl8188eu_rf_prog +ffffffff82791030 r rtl8188ftv_rf_prog +ffffffff82791050 r rtl8192e_rf_prog +ffffffff82791080 r rtl8188ce_rf_prog +ffffffff827910a0 r rtl8188ru_rf_prog +ffffffff827910c0 r rtl8188cu_rf_prog +ffffffff827910e0 r rtl8192ce_rf_prog +ffffffff82791110 r rtl8188ru_txagc +ffffffff82791170 r rtl8188eu_rf_regs +ffffffff82791230 r rtl8188eu_rf_vals +ffffffff827913b0 r rtl8188ftv_rf_regs +ffffffff82791490 r rtl8188ftv_rf_vals +ffffffff82791640 r rtl8192e_rf_regs +ffffffff82791710 r rtl8192e_rf_vals +ffffffff827918b0 r rtl8192e_rf2_regs +ffffffff82791950 r rtl8192e_rf2_vals +ffffffff82791a90 r rtl8192ce_rf1_regs +ffffffff82791bb0 r rtl8188ce_rf_vals +ffffffff82791df0 r rtl8188ru_rf_vals +ffffffff82792030 r rtl8188cu_rf_vals +ffffffff82792270 r rtl8192ce_rf1_vals +ffffffff827924b0 r rtl8192ce_rf2_regs +ffffffff82792500 r rtl8192ce_rf2_vals +ffffffff827925a0 r rtl8192cu_txagc +ffffffff82793000 r rt2560_rf2522_r2 +ffffffff82793040 r rt2560_rf2524_r2 +ffffffff82793080 r rt2560_rf2525_hi_r2 +ffffffff827930c0 r rt2560_rf2525_r2 +ffffffff82793100 r rt2560_rf2525e_r2 +ffffffff82793140 r rt2560_rf2526_hi_r2 +ffffffff82793180 r rt2560_rf2526_r2 +ffffffff827931c0 r rt2560_def_bbp +ffffffff82793200 r rt2560_def_mac +ffffffff82794000 r rt2661_rf5225_1 +ffffffff82794300 r rt2661_rf5225_2 +ffffffff82794600 r rt2661_def_bbp +ffffffff82794640 r rt2661_def_mac +ffffffff82795000 r rt2860_rf2850 +ffffffff82795430 r rt2860_rates +ffffffff827954f0 r rt3572_def_rf +ffffffff82795530 r rt3090_def_rf +ffffffff82795560 r rt5392_def_rf +ffffffff827955e0 r rt3290_def_rf +ffffffff82795640 r rt5390_def_rf +ffffffff827956c0 r rt5390_def_bbp +ffffffff827956f0 r rt2860_def_mac +ffffffff82797000 r acx111_reg +ffffffff82797040 r acx111_rate_map +ffffffff82798000 r acx100_reg +ffffffff82798040 r acx100_txpower_rfmd +ffffffff82798060 r gen8_rcs_offsets +ffffffff82798090 r acx100_txpower_maxim +ffffffff827980b0 r mtl_rcs_offsets +ffffffff827980f0 r digits +ffffffff827980f0 r pppdumpb.digits +ffffffff827980f0 r pppdumpm.digits +ffffffff82798140 r hangpic +ffffffff82798180 r gen11_rcs_offsets +ffffffff827981b0 r xehp_rcs_offsets +ffffffff827981e0 r dg2_rcs_offsets +ffffffff82798220 r dg2_xcs_offsets +ffffffff82798250 r gen12_xcs_offsets +ffffffff82799000 r trinity_override_mgpg_sequences +ffffffff827993c0 r voltage_swing_to_pre_emphasis +ffffffff827993d0 r sgpr_init_compute_shader +ffffffff827994a0 r intel_hpll_vco.cl_vco +ffffffff827994c0 r vgpr_init_compute_shader +ffffffff8279a000 r malo_cmd_string.cmds +ffffffff8279a0b0 r malo_cmd_string_result.results +ffffffff8279b000 R bwi_vendor_led_act +ffffffff8279b00c R bwi_default_led_act +ffffffff8279b010 R bwi_led_duration +ffffffff8279b380 r bwi_sup_bphy +ffffffff8279b3c0 r bwi_phy_freq_11g_rev1 +ffffffff8279b5c0 r bwi_phy_rotor_11g_rev1 +ffffffff8279b6a0 r bwi_phy_noise_scale_11g_rev2 +ffffffff8279b6e0 r bwi_phy_noise_scale_11g_rev7 +ffffffff8279b720 r bwi_phy_noise_scale_11g +ffffffff8279b760 r bwi_phy_sigma_sq_11g_rev2 +ffffffff8279b7d0 r bwi_phy_sigma_sq_11g_rev7 +ffffffff8279b840 r bwi_phy_delay_11g_rev1 +ffffffff8279b920 r bwi_rf_get_gains.save_phy_regs +ffffffff8279b940 r bwi_rf_lo_find.map +ffffffff8279b960 r bwi_txpower_map_11b +ffffffff8279b9a0 r bwi_txpower_map_11g +ffffffff8279b9e0 r _bwi_rf_lo_update_11g.rf_atten_list +ffffffff8279ba20 r _bwi_rf_lo_update_11g.rf_atten_init_list +ffffffff8279ba60 r _bwi_rf_lo_update_11g.rf_lo_measure_order +ffffffff8279baa0 r bwi_rf_set_nrssi_ofs_11g.save_phy_comm_regs +ffffffff8279bac0 r bwi_bbpid_map +ffffffff8279baf0 r bwi_regwin_count +ffffffff8279bb40 r bwi_clkfreq +ffffffff8279bb58 r bwi_zero_addr +ffffffff8279c000 R uhci_bus_methods +ffffffff8279c030 R uhci_root_ctrl_methods +ffffffff8279c060 R uhci_root_intr_methods +ffffffff8279c090 R uhci_device_ctrl_methods +ffffffff8279c0c0 R uhci_device_intr_methods +ffffffff8279c0f0 R uhci_device_bulk_methods +ffffffff8279c120 R uhci_device_isoc_methods +ffffffff8279c150 R uhci_devd +ffffffff8279c162 R uhci_confd +ffffffff8279c16b R uhci_ifcd +ffffffff8279c174 R uhci_endpd +ffffffff8279c17b R uhci_hubd_piix +ffffffff8279d000 R revbits +ffffffff8279d020 R ohci_bus_methods +ffffffff8279d050 R ohci_root_ctrl_methods +ffffffff8279d080 R ohci_root_intr_methods +ffffffff8279d0b0 R ohci_device_ctrl_methods +ffffffff8279d0e0 R ohci_device_intr_methods +ffffffff8279d110 R ohci_device_bulk_methods +ffffffff8279d140 R ohci_device_isoc_methods +ffffffff8279d170 R ohci_devd +ffffffff8279d182 R ohci_confd +ffffffff8279d18b R ohci_ifcd +ffffffff8279d194 R ohci_endpd +ffffffff8279d19b R ohci_hubd +ffffffff8279e000 R ehci_bus_methods +ffffffff8279e030 R ehci_root_ctrl_methods +ffffffff8279e060 R ehci_root_intr_methods +ffffffff8279e090 R ehci_device_ctrl_methods +ffffffff8279e0c0 R ehci_device_intr_methods +ffffffff8279e0f0 R ehci_device_bulk_methods +ffffffff8279e120 R ehci_device_isoc_methods +ffffffff8279e150 R ehci_devd +ffffffff8279e162 R ehci_odevd +ffffffff8279e16c R ehci_confd +ffffffff8279e175 R ehci_ifcd +ffffffff8279e17e R ehci_endpd +ffffffff8279e185 R ehci_hubd +ffffffff8279f000 R xhci_bus_methods +ffffffff8279f030 R xhci_root_ctrl_methods +ffffffff8279f060 R xhci_root_intr_methods +ffffffff8279f090 R xhci_device_ctrl_methods +ffffffff8279f0c0 R xhci_device_intr_methods +ffffffff8279f0f0 R xhci_device_bulk_methods +ffffffff8279f120 R xhci_device_isoc_methods +ffffffff8279f150 R xhci_devd +ffffffff8279f162 R xhci_confd +ffffffff8279f16b R xhci_ifcd +ffffffff8279f174 R xhci_endpd +ffffffff8279f17b R xhci_endpcd +ffffffff8279f181 R xhci_hubd +ffffffff827a2000 R radio_ca +ffffffff827a3000 R ipmi_ca +ffffffff827a4000 R vscsi_ca +ffffffff827a4028 R vscsi_switch +ffffffff827a4050 R vscsi_filtops +ffffffff827a5000 R mpath_ca +ffffffff827a5028 R mpath_switch +ffffffff827a6000 R softraid_ca +ffffffff827a6028 R sr_switch +ffffffff827a7000 r spdmem_basic_types +ffffffff827a70a0 r spdmem_parity_types +ffffffff827a70e0 r spdmem_ddr4_decode.ddr4_chipsize +ffffffff827a8000 R kstat_rlock_ops +ffffffff827a8010 R kstat_wlock_ops +ffffffff827a8020 R kstat_mutex_ops +ffffffff827a8030 R kstat_cpu_ops +ffffffff827a8040 r kstat_id_tree_RBT_INFO +ffffffff827a8058 R kstat_id_tree_RBT_TYPE +ffffffff827a8060 r kstat_pv_tree_RBT_INFO +ffffffff827a8078 R kstat_pv_tree_RBT_TYPE +ffffffff827a8080 r kstat_nm_tree_RBT_INFO +ffffffff827a8098 R kstat_nm_tree_RBT_TYPE +ffffffff827a9000 r fuse_rd_filtops +ffffffff827aa000 R fusefs_vfsops +ffffffff827aa070 R fusefs_vars +ffffffff827ab000 R fusefs_vops +ffffffff827ab110 R fusefsread_filtops +ffffffff827ab140 R fusefswrite_filtops +ffffffff827ab170 R fusefsvnode_filtops +ffffffff827ac000 r pf_state_tree_RBT_INFO +ffffffff827ac018 R pf_state_tree_RBT_TYPE +ffffffff827ac020 r pf_state_tree_id_RBT_INFO +ffffffff827ac038 R pf_state_tree_id_RBT_TYPE +ffffffff827ac040 r pf_translate_af.zero +ffffffff827ad000 R hfsc_ops +ffffffff827ad038 R ifq_hfsc_ops +ffffffff827ad040 R hfsc_pf_ops +ffffffff827ad088 R pfq_hfsc_ops +ffffffff827ae000 r fqcodel_ops +ffffffff827ae038 R ifq_fqcodel_ops +ffffffff827ae040 r fqcodel_pf_ops +ffffffff827ae088 R pfq_fqcodel_ops +ffffffff827ae090 r codel_intervals +ffffffff827af000 r pfsync_bulk_req_state_names +ffffffff827af030 r pfsync_bulk_req_event_names +ffffffff827af060 r pfsync_qs +ffffffff827af0d8 r pfsync_kstat_tpl +ffffffff827af2e0 r pfsync_acts +ffffffff827b0000 r bio_mappings_RBT_INFO +ffffffff827b0018 R bio_mappings_RBT_TYPE +ffffffff827b1000 R hotplugread_filtops +ffffffff827b2000 R dtps_static +ffffffff827b3000 R db_show_all_cmds +ffffffff827b3180 R db_show_cmds +ffffffff827b34c0 R db_boot_cmds +ffffffff827b35a0 R db_command_table +ffffffff827b4000 R ddb_vars +ffffffff827b5000 R audio_ca +ffffffff827b5028 R audioctlread_filtops +ffffffff827b5058 R audiowrite_filtops +ffffffff827b5088 R audioread_filtops +ffffffff827b6000 R midi_ca +ffffffff827b6028 R midiwrite_filtops +ffffffff827b6058 R midiread_filtops +ffffffff827b7000 r mulawtolin16 +ffffffff827b7200 r lintomulaw +ffffffff827b8000 R randomread_filtops +ffffffff827b8030 R randomwrite_filtops +ffffffff827b9000 R video_ca +ffffffff827b9028 R video_filtops +ffffffff827ba000 R cd9660_vfsops +ffffffff827bb000 R cd9660_vops +ffffffff827bb110 R cd9660_specvops +ffffffff827bb220 R cd9660_fifovops +ffffffff827bb330 R cd9660read_filtops +ffffffff827bb360 R cd9660write_filtops +ffffffff827bb390 R cd9660vnode_filtops +ffffffff827bc000 R udf_vfsops +ffffffff827bd000 R udf_vops +ffffffff827bd110 r mon_lens +ffffffff827be000 r month_days +ffffffff827bf000 R execsw +ffffffff827c0000 r shstrtab +ffffffff827c1000 R copyright +ffffffff827c10c0 r initpaths +ffffffff827c2000 R sysent +ffffffff827c4000 R bufq_impls +ffffffff827c5000 R kqueueops +ffffffff827c5038 R kqread_filtops +ffffffff827c5068 R proc_filtops +ffffffff827c5098 R file_filtops +ffffffff827c50c8 R timer_filtops +ffffffff827c5100 R sysfilt_ops +ffffffff827c5148 R seltrue_filtops +ffffffff827c5178 R dead_filtops +ffffffff827c51a8 R badfd_filtops +ffffffff827c51d8 r mutex_klistops +ffffffff827c51f0 r rwlock_klistops +ffffffff827c6000 R kv_exec +ffffffff827c7000 R addrmask +ffffffff827c8000 r rw_ops +ffffffff827c9000 r proc_printit.pstat +ffffffff827ca000 R pledge_syscalls +ffffffff827caa60 r pledgenames +ffffffff827cacb0 r pledgereq +ffffffff827cb000 r unvname_rbt_RBT_INFO +ffffffff827cb018 R unvname_rbt_RBT_TYPE +ffffffff827cc000 R sig_filtops +ffffffff827cc030 R sigprop +ffffffff827cd000 R kern_vars +ffffffff827cd2f0 R hw_vars +ffffffff827ce000 R tc_vars +ffffffff827cf000 r sys_gettimeofday.zerotz +ffffffff827d0000 r taskq_sys_name +ffffffff827d0006 r taskq_sys_mp_name +ffffffff827d0010 R systq +ffffffff827d0018 R systqmp +ffffffff827d2000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff827d2010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff827d2020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff827d2030 r gpt_get_fstype.gpt_uuid_linux +ffffffff827d2040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff827d2050 r gpt_get_fstype.gpt_uuid_unused +ffffffff827d2060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff827d2070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff827d3000 r hiballoc_addr_RBT_INFO +ffffffff827d3018 R hiballoc_addr_RBT_TYPE +ffffffff827d4000 R logread_filtops +ffffffff827d5000 r phtree_RBT_INFO +ffffffff827d5018 R phtree_RBT_TYPE +ffffffff827d5020 r pool_lock_ops_rw +ffffffff827d5058 r pool_lock_ops_mtx +ffffffff827d6000 r pselregister.evf +ffffffff827d600c r pselregister.evff +ffffffff827d7000 R pipe_rfiltops +ffffffff827d7030 R pipe_wfiltops +ffffffff827d7060 R pipe_efiltops +ffffffff827d7090 r pipeops +ffffffff827d8000 R socketops +ffffffff827d9000 R sysvsem_vars +ffffffff827da000 R char_type +ffffffff827da100 R ttyread_filtops +ffffffff827da130 R ttywrite_filtops +ffffffff827da160 R ttyexcept_filtops +ffffffff827db000 R ptcread_filtops +ffffffff827db030 R ptcwrite_filtops +ffffffff827db060 R ptcexcept_filtops +ffffffff827dd000 R domains +ffffffff827de000 R unixdomain +ffffffff827de050 R unixsw +ffffffff827df000 R solisten_filtops +ffffffff827df030 R soread_filtops +ffffffff827df060 R sowrite_filtops +ffffffff827df090 R soexcept_filtops +ffffffff827df0c0 R socket_klistops +ffffffff827e0000 R sun_noname +ffffffff827e0010 R uipc_usrreqs +ffffffff827e00b0 R uipc_dgram_usrreqs +ffffffff827e0150 R unpstctl_vars +ffffffff827e0180 R unpsqctl_vars +ffffffff827e01b0 R unpdgctl_vars +ffffffff827e1000 r namecache_rb_cache_RBT_INFO +ffffffff827e1018 R namecache_rb_cache_RBT_TYPE +ffffffff827e2000 R generic_filtops +ffffffff827e3000 r buf_rb_bufs_RBT_INFO +ffffffff827e3018 R buf_rb_bufs_RBT_TYPE +ffffffff827e3020 r typename +ffffffff827e4000 R sync_vops +ffffffff827e5000 R vnops +ffffffff827e6000 R spec_vops +ffffffff827e7000 R dead_vops +ffffffff827e8000 R fifo_vops +ffffffff827e8110 R fiforead_filtops +ffffffff827e8140 R fifowrite_filtops +ffffffff827e8170 R fifoexcept_filtops +ffffffff827e9000 R regyear +ffffffff827e9020 R leapyear +ffffffff827e9040 r dos2unix +ffffffff827e9140 r u2l +ffffffff827e9240 r unix2dos +ffffffff827ea008 R msdosfs_vfsops +ffffffff827eb000 R msdosfs_vops +ffffffff827eb110 R msdosfsread_filtops +ffffffff827eb140 R msdosfswrite_filtops +ffffffff827eb170 R msdosfsvnode_filtops +ffffffff827ec000 r _utf_count +ffffffff827ed000 R ntfs_vfsops +ffffffff827ee000 R ntfs_vops +ffffffff827ef000 R bpfread_filtops +ffffffff827ef030 R bpf_mbuf_ops +ffffffff827f0000 r bpf_mem_ops +ffffffff827f1000 R priq_ops +ffffffff827f1038 R ifq_priq_ops +ffffffff827f1040 r ifq_kstat_tpl +ffffffff827f1180 r ifiq_kstat_tpl +ffffffff827f2000 r ether_crc32_le_update.crctab +ffffffff827f2040 r ether_crc32_be_update.crctab +ffffffff827f3000 r lcp +ffffffff827f3078 r ipcp +ffffffff827f30f0 r ipv6cp +ffffffff827f3168 r chap +ffffffff827f31e0 r pap +ffffffff827f4000 R ifmedia_baudrate_descriptions +ffffffff827f5000 r fcstab +ffffffff827f7000 R tunread_filtops +ffffffff827f7030 R tunwrite_filtops +ffffffff827f8000 R bridge_brport +ffffffff827f9000 R bstp_etheraddr +ffffffff827fa000 r eb_tree_RBT_INFO +ffffffff827fa018 R eb_tree_RBT_TYPE +ffffffff827fb000 r veb_etherbridge_ops +ffffffff827fb028 r veb_pf_ipv4 +ffffffff827fb040 r veb_pf_ipv6 +ffffffff827fc000 r pipex_pppoe_padding +ffffffff827fd000 r rn_addmask.normal_chars +ffffffff827fe000 R route_src +ffffffff827fe010 R route_usrreqs +ffffffff827fe0b0 R routedomain +ffffffff827fe100 R routesw +ffffffff827ff000 R gre_vars +ffffffff827ff030 r mgre_tree_RBT_INFO +ffffffff827ff048 R mgre_tree_RBT_TYPE +ffffffff827ff050 r egre_tree_RBT_INFO +ffffffff827ff068 R egre_tree_RBT_TYPE +ffffffff827ff070 r nvgre_ucast_tree_RBT_INFO +ffffffff827ff088 R nvgre_ucast_tree_RBT_TYPE +ffffffff827ff090 r nvgre_mcast_tree_RBT_INFO +ffffffff827ff0a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff827ff0b0 r eoip_tree_RBT_INFO +ffffffff827ff0c8 R eoip_tree_RBT_TYPE +ffffffff827ff0d0 r nvgre_etherbridge_ops +ffffffff82800000 r trunk_protos +ffffffff82801000 R ethermulticastaddr_slowprotocols +ffffffff82801006 R lacp_info_tlv_template +ffffffff8280100e R marker_info_tlv_template +ffffffff82801012 R marker_response_tlv_template +ffffffff82801020 R lacp_timer_funcs +ffffffff82802000 r lacp_rxm_state_names +ffffffff82802040 r lacp_rxm_event_names +ffffffff82802090 r aggr_port_selected_names +ffffffff828020b0 r lacp_mux_state_names +ffffffff828020e0 r lacp_mux_event_names +ffffffff82802128 r lacp_address_slow +ffffffff82803000 r tpmr_pf_ipv4 +ffffffff82803018 r tpmr_pf_ipv6 +ffffffff82804000 r bpe_tree_RBT_INFO +ffffffff82804018 R bpe_tree_RBT_TYPE +ffffffff82804020 r bpe_etherbridge_ops +ffffffff82805000 R pppx_rd_filtops +ffffffff82805030 R pppx_wr_filtops +ffffffff82805060 r pppx_ifs_RBT_INFO +ffffffff82805078 R pppx_ifs_RBT_TYPE +ffffffff82805080 r pppac_rd_filtops +ffffffff828050b0 r pppac_wr_filtops +ffffffff82806000 r vxlan_peers_RBT_INFO +ffffffff82806018 R vxlan_peers_RBT_TYPE +ffffffff82806020 r vxlan_etherbridge_ops +ffffffff82807000 R stoeplitz_cache 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ieee80211_phymode_name +ffffffff8280f000 r ieee80211_r_ctry +ffffffff8280fae0 r ieee80211_r_names +ffffffff8280ff80 r ieee80211_r_map +ffffffff82811000 R zeroin46_addr +ffffffff82811010 R zeroin_addr +ffffffff82812000 R inetdomain +ffffffff82812050 R inetsw +ffffffff82813000 R divertctl_vars +ffffffff82813030 R divert_usrreqs +ffffffff82814000 R icmpctl_vars +ffffffff82815000 R ipctl_vars +ffffffff82815150 R inetctlerrmap +ffffffff82816000 R rip_usrreqs +ffffffff82817000 R tcp_timer_funcs +ffffffff82818000 R tcp_usrreqs +ffffffff828180a0 R tcp6_usrreqs +ffffffff82818140 R tcpctl_vars +ffffffff82819000 R udp_usrreqs +ffffffff828190a0 R udp6_usrreqs +ffffffff82819140 R udpctl_vars +ffffffff8281a000 R gre_usrreqs +ffffffff8281b000 r ipsec_ids_tree_RBT_INFO +ffffffff8281b018 R ipsec_ids_tree_RBT_TYPE +ffffffff8281b020 r ipsec_ids_flows_RBT_INFO +ffffffff8281b038 R ipsec_ids_flows_RBT_TYPE +ffffffff8281b040 R xformsw +ffffffff8281b158 R xformswNXFORMSW +ffffffff8281c000 R espctl_vars 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nvme_pci_ca +ffffffff828f8028 r nvme_msi_blacklist +ffffffff828f9000 R ami_pci_ca +ffffffff828f9030 r ami_pci_subsys +ffffffff828f9270 r ami_pci_vendors +ffffffff828fa000 R mfi_pci_ca +ffffffff828fa030 r mfi_pci_devices +ffffffff828fb000 R mfii_ca +ffffffff828fb028 R mfii_switch +ffffffff828fb050 R mfii_pd_switch +ffffffff828fb078 R mfii_iop_thunderbolt +ffffffff828fb088 R mfii_iop_25 +ffffffff828fb098 R mfii_iop_35 +ffffffff828fb0b0 R mfii_devices +ffffffff828fb140 r mfi_bbu_indicators +ffffffff828fc000 R ips_ca +ffffffff828fc028 r ips_ids +ffffffff828fc040 r ips_chips +ffffffff828fc090 r ips_names +ffffffff828fc128 r ips_switch +ffffffff828fc150 r ips_pt_switch +ffffffff828fd000 R eap_ca +ffffffff828fd028 R eap1370_hw_if +ffffffff828fd0e0 R eap1371_hw_if +ffffffff828fd198 R eap_midi_hw_if +ffffffff828fd1d0 R eap_devices +ffffffff828fe000 R auacer_pci_devices +ffffffff828fe008 R auacer_ca +ffffffff828fe030 R auacer_hw_if +ffffffff828ff000 R auich_ca +ffffffff828ff028 R auich_hw_if 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pciide_triones_products +ffffffff8298b8f0 R pciide_promise_products +ffffffff8298bac0 R pciide_acard_products +ffffffff8298bb10 R pciide_serverworks_products +ffffffff8298bbb0 R pciide_nvidia_products +ffffffff8298be80 R pciide_ite_products +ffffffff8298bea0 R pciide_ati_products +ffffffff8298bf20 R pciide_jmicron_products +ffffffff8298bf70 R pciide_phison_products +ffffffff8298bf80 R pciide_rdc_products +ffffffff8298bf90 R pciide_vendors +ffffffff8298c140 R pciide_pci_ca +ffffffff8298c168 R pciide_jmb_ca +ffffffff8298c190 r piix_isp_dma +ffffffff8298c193 r piix_rtc_dma +ffffffff8298c196 r apollo_pio_set +ffffffff8298c19b r cmd0643_9_data_tim_pio +ffffffff8298c1a0 r cmd0643_9_data_tim_dma +ffffffff8298c1a3 r cmd680_channel_map.init_val +ffffffff8298c1b1 r cmd680_setup_channel.udma2_tbl +ffffffff8298c1b8 r cmd680_setup_channel.dma_tbl +ffffffff8298c1be r cmd680_setup_channel.pio_tbl +ffffffff8298c1d0 r satalink_ba5_regmap +ffffffff8298c690 r sii3114_chansetup.channel_names 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bktr_ca +ffffffff82995028 R bktr_hw_if +ffffffff82996000 r tuners +ffffffff82996170 r freqTable +ffffffff82996260 r nabcst +ffffffff829962a0 r irccable +ffffffff82996310 r hrccable +ffffffff82996380 r weurope +ffffffff82996420 r jpnbcst +ffffffff82996460 r jpncable +ffffffff829964c0 r xussr +ffffffff82996530 r australia +ffffffff82996590 r france +ffffffff82997000 R xl_pci_ca +ffffffff82997030 R xl_pci_devices +ffffffff82998000 R fxp_pci_ca +ffffffff82998030 R fxp_pci_devices +ffffffff82999000 R em_devices +ffffffff82999308 R em_ca +ffffffff82999330 r em_counters +ffffffff8299a000 r em_igp_cable_length_table +ffffffff8299a100 r em_igp_2_cable_length_table +ffffffff8299b000 R ixgb_devices +ffffffff8299b010 R ixgb_ca +ffffffff8299c000 R ixgbe_devices +ffffffff8299c0b8 R ix_ca +ffffffff8299c0e0 r ix_counters +ffffffff8299c3e0 r ix_rxq_kstats_tpl +ffffffff8299c458 r ix_txq_kstats_tpl +ffffffff8299d000 r ixgbe_mvals_base +ffffffff8299d060 r ixgbe_mvals_X540 +ffffffff8299d0c0 r ixgbe_mvals_X550 +ffffffff8299d120 r ixgbe_mvals_X550EM_x +ffffffff8299d180 r ixgbe_mvals_X550EM_a +ffffffff829a0000 R ixl_ca +ffffffff829a0030 R ixl_port_counters +ffffffff829a02c0 R ixl_vsi_counters +ffffffff829a0380 r ixl_devices +ffffffff829a04c0 r ixl_710 +ffffffff829a04e8 r ixl_722 +ffffffff829a0510 r ixl_pf_aq_regs +ffffffff829a0578 r ixl_710_decrepit +ffffffff829a05a0 r ixl_phy_type_map +ffffffff829a0770 r ixl_speed_type_map +ffffffff829a07b0 r ixl_hmc_pack_rxq +ffffffff829a0830 r ixl_hmc_pack_txq +ffffffff829a08a0 r ixl_sfp_ops +ffffffff829a08b8 r ixl_qsfp_ops +ffffffff829a1000 r dwqe_pci_devices +ffffffff829a1018 R dwqe_pci_ca +ffffffff829a2000 R xge_ca +ffffffff829a2028 R xge_devices +ffffffff829a2030 r xge_fix_mac +ffffffff829a2110 r xge_xena_dtx_cfg +ffffffff829a2170 r xge_herc_dtx_cfg +ffffffff829a3000 R thtc_ca +ffffffff829a3028 R tht_ca +ffffffff829a3050 r thtc_devices +ffffffff829a3068 r tht_link_state.interval +ffffffff829a4000 R myx_ca +ffffffff829a4028 R myx_devices +ffffffff829a5000 R oce_ca +ffffffff829a5030 R oce_devices +ffffffff829a6000 R dc_pci_ca +ffffffff829a7000 R epic_pci_ca +ffffffff829a7028 R epic_pci_devices +ffffffff829a8000 R ti_pci_ca +ffffffff829a8030 R ti_devices +ffffffff829a9000 R ne_pci_ca +ffffffff829a9030 R ne_pci_prod +ffffffff829aa000 R gem_pci_ca +ffffffff829aa030 R gem_pci_devices +ffffffff829aa050 r gem_promhdr +ffffffff829aa052 r gem_promdat +ffffffff829aa05a r gem_promdat2 +ffffffff829ab000 R cas_ca +ffffffff829ab028 R cas_pci_devices +ffffffff829ab030 r cas_promhdr +ffffffff829ab032 r cas_promdat_sun +ffffffff829ab03a r cas_promdat_ns +ffffffff829ab042 r cas_promdat2 +ffffffff829ac000 R sf_pci_ca +ffffffff829ac028 R sf_pci_products +ffffffff829ad000 R sis_ca +ffffffff829ad028 R sis_devices +ffffffff829ae000 R se_devices +ffffffff829ae008 R se_ca +ffffffff829af000 R mbg_ca +ffffffff829af030 R mbg_devices +ffffffff829b0000 R uhci_pci_ca +ffffffff829b1000 R ohci_pci_ca +ffffffff829b2000 R ehci_pci_ca +ffffffff829b3000 R xhci_pci_ca +ffffffff829b4000 R cbb_pci_ca +ffffffff829b4028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff829b5000 R skc_devices +ffffffff829b5030 R skc_ca +ffffffff829b5058 R sk_ca +ffffffff829b6000 R mskc_devices +ffffffff829b60a8 R mskc_ca +ffffffff829b60d0 R msk_ca +ffffffff829b6100 r msk_mib +ffffffff829b7000 R puc_pci_ca +ffffffff829b8000 R puc_devs +ffffffff829bd000 R com_puc_ca +ffffffff829bd030 r puc_port_types +ffffffff829be000 R lpt_puc_ca +ffffffff829bf000 R wi_pci_ca +ffffffff829bf030 r wi_pci_products +ffffffff829c0000 R an_pci_ca +ffffffff829c0030 R an_pci_devices +ffffffff829c1000 R iwi_devices +ffffffff829c1010 R iwi_ca +ffffffff829c2000 R wpi_ca +ffffffff829c2028 r wpi_devices +ffffffff829c2030 r wpi_rates +ffffffff829c2050 r wpi_rf_gain_5ghz +ffffffff829c20a0 r wpi_dsp_gain_5ghz +ffffffff829c20f0 r wpi_rf_gain_2ghz +ffffffff829c2140 r wpi_dsp_gain_2ghz +ffffffff829c2190 r wpi_pmgt +ffffffff829c2310 r wpi_bands +ffffffff829c3000 R iwn_mcs2ridx +ffffffff829c3020 R iwn_ca +ffffffff829c3050 r iwn_devices +ffffffff829c30e8 r iwn4965_sensitivity_limits +ffffffff829c3124 r iwn5000_sensitivity_limits +ffffffff829c3160 r iwn5150_sensitivity_limits +ffffffff829c319c r iwn1000_sensitivity_limits +ffffffff829c31d8 r iwn6000_sensitivity_limits +ffffffff829c3214 r iwn2000_sensitivity_limits +ffffffff829c3250 r iwn_fw_errmsg +ffffffff829c3340 r iwn4965_set_txpower.tdiv +ffffffff829c3360 r iwn4965_rf_gain_5ghz +ffffffff829c33d0 r iwn4965_dsp_gain_5ghz +ffffffff829c3440 r iwn4965_dsp_gain_2ghz +ffffffff829c34b0 r iwn_pmgt +ffffffff829c36f0 r iwn4965_post_alive.qid2fifo +ffffffff829c3700 r iwn_bands +ffffffff829c3770 r iwn_rates +ffffffff829c3820 r iwn4965_rf_gain_2ghz +ffffffff829c4000 R iwm_nvm_channels +ffffffff829c4030 R iwm_nvm_channels_8000 +ffffffff829c4070 R iwm_rates +ffffffff829c40d0 R iwm_ht_mcs2ridx +ffffffff829c4110 R iwm_tid_to_ac +ffffffff829c4118 R iwm_ac_to_tx_fifo +ffffffff829c4120 R iwm_nvm_to_read +ffffffff829c4144 r iwm_set_hw_address_8000.reserved_mac +ffffffff829c4180 r iwm_sf_full_timeout +ffffffff829c41b0 r iwm_sf_full_timeout_def +ffffffff829c41e0 r advanced_lookup +ffffffff829c4320 r iwm_devices +ffffffff829c4360 R iwm_ca +ffffffff829c5000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff829c5020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff829c5040 R iwx_qu_b0_hr1_b0 +ffffffff829c5060 R iwx_qu_b0_hr_b0 +ffffffff829c5080 R iwx_ax201_cfg_qu_hr +ffffffff829c50a0 R iwx_qu_c0_hr1_b0 +ffffffff829c50c0 R iwx_qu_c0_hr_b0 +ffffffff829c50e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff829c5100 R iwx_quz_a0_hr1_b0 +ffffffff829c5120 R iwx_ax201_cfg_quz_hr +ffffffff829c5140 R iwx_cfg_so_a0_hr_b0 +ffffffff829c5160 R iwx_cfg_quz_a0_hr_b0 +ffffffff829c5180 R iwx_2ax_cfg_so_gf_a0 +ffffffff829c51a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff829c51c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff829c51e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff829c5200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff829c5220 R iwx_2ax_cfg_so_jf_b0 +ffffffff829c5240 R iwx_nvm_channels_8000 +ffffffff829c5280 R iwx_rates +ffffffff829c52e0 R iwx_mcs2ridx +ffffffff829c5320 R iwx_tid_to_ac +ffffffff829c5328 R iwx_ac_to_tx_fifo +ffffffff829c5330 r iwx_nvm_channels_uhb +ffffffff829c539e r iwx_is_valid_mac_addr.reserved_mac +ffffffff829c53b0 r iwx_sf_full_timeout +ffffffff829c53e0 r iwx_sf_full_timeout_def +ffffffff829c5410 r advanced_lookup +ffffffff829c5550 r iwx_devices +ffffffff829c5590 r iwx_dev_info_table +ffffffff829c5e18 R iwx_ca +ffffffff829c6000 R cmpci_ca +ffffffff829c6028 R cmpci_hw_if +ffffffff829c60e0 r cmpci_rate_table +ffffffff829c6120 R cmpci_devices +ffffffff829c6130 r cmpci_query_devinfo.mixer_port_names +ffffffff829c6160 r cmpci_query_devinfo.mixer_classes +ffffffff829c7000 R iha_pci_ca +ffffffff829c7028 R iha_switch +ffffffff829c8000 R pcscp_ca +ffffffff829c9000 R bge_ca +ffffffff829c9030 R bge_devices +ffffffff829c91b0 r bge_revisions +ffffffff829c9610 r bge_majorrevs +ffffffff829c9790 r bge_kstat_tpl +ffffffff829ca000 R bnx_devices +ffffffff829ca020 R bnx_ca +ffffffff829cb000 R vge_ca +ffffffff829cb028 R vge_devices +ffffffff829cc000 R stge_ca +ffffffff829cc028 R stge_mii_bitbang_ops +ffffffff829cc050 R stge_devices +ffffffff829cd000 R nfe_ca +ffffffff829cd030 R nfe_devices +ffffffff829ce000 R et_devices +ffffffff829ce008 R et_ca +ffffffff829cf000 R jme_devices +ffffffff829cf008 R jme_ca +ffffffff829d0000 R age_devices +ffffffff829d0008 R age_ca +ffffffff829d1000 R alc_devices +ffffffff829d1038 R alc_ca +ffffffff829d2000 R ale_devices +ffffffff829d2008 R ale_ca +ffffffff829d3000 R amdpm_ca +ffffffff829d3030 R amdpm_ids +ffffffff829d4000 R bce_ca +ffffffff829d4028 R bce_devices +ffffffff829d5000 R ath_pci_ca +ffffffff829d6000 R athn_pci_ca +ffffffff829d6030 r athn_pci_devices +ffffffff829d7000 R atw_pci_ca +ffffffff829d7028 R atw_pci_devices +ffffffff829d8000 R rtw_pci_ca +ffffffff829d8030 R rtw_pci_products +ffffffff829d9000 R rtwn_pci_ca +ffffffff829d9030 r rtwn_pci_devices +ffffffff829d9040 r rtl8188eu_mac +ffffffff829d91b0 r rtl8192cu_mac +ffffffff829d9310 r rtl8192ce_mac +ffffffff829d9458 r rtl8188eu_bb_prog +ffffffff829d9480 r rtl8723a_bb_prog +ffffffff829d94a8 r rtl8192ce_bb_prog_1t +ffffffff829d94d0 r rtl8192ce_bb_prog_2t +ffffffff829d9500 r rtl8188eu_bb_regs +ffffffff829d9680 r rtl8188eu_bb_vals +ffffffff829d9980 r rtl8188eu_agc_vals +ffffffff829d9b80 r rtl8723a_bb_regs +ffffffff829d9d00 r rtl8723a_bb_vals +ffffffff829d9ff0 r rtl8192ce_agc_vals +ffffffff829da270 r rtl8192ce_bb_regs +ffffffff829da3f0 r rtl8192ce_bb_vals_1t +ffffffff829da6e0 r rtl8192ce_bb_vals_2t +ffffffff829db000 R ral_pci_ca +ffffffff829db030 R ral_pci_devices +ffffffff829dc000 R acx_pci_ca +ffffffff829dc028 R acx_pci_devices +ffffffff829dd000 R pgt_pci_ca +ffffffff829dd028 R pgt_pci_devices +ffffffff829de000 R malo_pci_ca +ffffffff829de028 R malo_pci_devices +ffffffff829df000 R bwi_pci_ca +ffffffff829df030 R bwi_pci_devices +ffffffff829e0000 R piixpm_ca +ffffffff829e0030 R piixpm_ids +ffffffff829e1000 R vic_ca +ffffffff829e1028 R vic_devices +ffffffff829e2000 R vmx_devices +ffffffff829e2008 R vmx_ca +ffffffff829e2030 r vmx_tx_kstat_tpl +ffffffff829e20d0 r vmx_kstat_rate +ffffffff829e20e0 r vmx_rx_kstat_tpl +ffffffff829e3000 R vmwpvs_ca +ffffffff829e3028 R vmwpvs_switch +ffffffff829e4000 R lii_ca +ffffffff829e4028 R lii_devices +ffffffff829e5000 R ichiic_ca +ffffffff829e5030 R ichiic_ids +ffffffff829e6000 R viapm_ca +ffffffff829e6030 R viapm_ids +ffffffff829e6070 r val_to_temp +ffffffff829e6870 r val_to_uV.mult +ffffffff829e7000 R amdiic_ca +ffffffff829e7028 R amdiic_ids +ffffffff829e8000 R nviic_ca +ffffffff829e8030 R nviic_ids +ffffffff829e9000 R sdhc_pci_ca +ffffffff829ea000 R kate_ca +ffffffff829ea030 r kate_proc +ffffffff829eb000 R km_ca +ffffffff829eb030 r km_devices +ffffffff829ec000 R ksmn_ca +ffffffff829ec030 r ksmn_devices +ffffffff829ed000 R iosf_pci_ca +ffffffff829ee000 R itherm_devices +ffffffff829ee008 R itherm_ca +ffffffff829ef000 R pchtemp_ca +ffffffff829ef030 R pchtemp_devices +ffffffff829f0000 R rtsx_pci_ca +ffffffff829f1000 R xspd_ca +ffffffff829f1028 R xspd_devices +ffffffff829f2000 R virtio_pci_ca +ffffffff829f3000 R dwiic_pci_ca +ffffffff829f3030 R dwiic_pci_ids +ffffffff829f4000 R bwfm_pci_ca +ffffffff829f4030 r bwfm_pci_devices +ffffffff829f5000 R ccp_pci_ca +ffffffff829f5030 r ccp_pci_devices +ffffffff829f6000 R bnxt_devices +ffffffff829f6040 R bnxt_ca +ffffffff829f7000 R mcx_ca +ffffffff829f7030 r mcx_devices +ffffffff829f7060 r mcx_rss_config +ffffffff829f70d0 r mcx_eth_cap_map +ffffffff829f72d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff829f72e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff829f7300 r mcx_kstat_ppcnt_rfc2819 +ffffffff829f7318 r mcx_kstat_ppcnt_rfc3635 +ffffffff829f7330 r mcx_ppcnt_ieee8023_tpl +ffffffff829f74b0 r mcx_ppcnt_rfc2863_tpl +ffffffff829f75c0 r mcx_ppcnt_rfc2819_tpl +ffffffff829f7770 r mcx_ppcnt_rfc3635_tpl +ffffffff829f78b0 r mcx_kstat_mtmp_tpl +ffffffff829f7950 r mcx_kstat_mtmp_rate +ffffffff829f7960 r mcx_queue_kstat_tpl +ffffffff829f8000 R iavf_ca +ffffffff829f8030 r iavf_devices +ffffffff829f8040 r iavf_aq_regs +ffffffff829f80b0 r iavf_link_speeds +ffffffff829f9000 R rge_ca +ffffffff829f9028 R rge_devices +ffffffff829f9030 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff829f9050 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff829f90b0 r rtl8125_mac_cfg3_mcu +ffffffff829f9950 r rtl8125_mac_cfg5_mcu +ffffffff829fa970 r rtl8125_mac_bps +ffffffff829fad70 r rtl8125b_mac_bps +ffffffff829faf98 r rge_kstats_tpl +ffffffff829fc000 R igc_devices +ffffffff829fc040 R igc_ca +ffffffff829fd000 R ngbe_devices +ffffffff829fd008 R ngbe_ca +ffffffff829fe000 R com_pci_ca +ffffffff829fe030 R com_pci_ids +ffffffff829ff000 r agp_attach.agp_max +ffffffff829ff048 R agp_ca +ffffffff82a00000 R intagp_ca +ffffffff82a01000 r drm_plane_create_rotation_property.props +ffffffff82a02000 r drm_bridge_priv_state_funcs +ffffffff82a04000 r color_encoding_name +ffffffff82a04020 r color_range_name +ffffffff82a05000 r drm_subpixel_enum_list +ffffffff82a05060 r drm_dpms_enum_list +ffffffff82a050a0 r drm_dvi_i_select_enum_list +ffffffff82a050d0 r drm_dvi_i_subconnector_enum_list +ffffffff82a05100 r drm_tv_mode_enum_list +ffffffff82a05170 r drm_tv_select_enum_list +ffffffff82a051c0 r drm_tv_subconnector_enum_list +ffffffff82a05210 r drm_dp_subconnector_enum_list +ffffffff82a05280 r colorspace_names +ffffffff82a05300 r drm_link_status_enum_list +ffffffff82a05320 r drm_scaling_mode_enum_list +ffffffff82a05360 r drm_aspect_ratio_enum_list +ffffffff82a05390 r drm_content_type_enum_list +ffffffff82a053e0 r drm_panel_orientation_enum_list +ffffffff82a05420 r privacy_screen_enum +ffffffff82a06000 r drm_crtc_fence_ops +ffffffff82a07000 r drm_dmt_modes +ffffffff82a09940 r edid_cea_modes_1 +ffffffff82a0d4d0 r edid_cea_modes_193 +ffffffff82a0e180 r edid_quirk_list +ffffffff82a0e360 r drm_mode_do_interlace_quirk.cea_interlaced +ffffffff82a0e3a0 r edid_4k_modes +ffffffff82a0e600 r edid_est_modes +ffffffff82a0ee00 r est3_modes +ffffffff82a0ef60 r stereo_mandatory_modes +ffffffff82a0efe0 r extra_modes +ffffffff82a10000 r drm_encoder_enum_list +ffffffff82a12000 r drm_fbdev_dma_helper_funcs +ffffffff82a12010 r drm_fbdev_dma_client_funcs +ffffffff82a12030 r drm_fbdev_dma_fb_ops +ffffffff82a13000 r drm_fbdev_generic_helper_funcs +ffffffff82a13010 r drm_fbdev_generic_client_funcs +ffffffff82a13030 r drm_fbdev_generic_fb_ops +ffffffff82a15000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82a15004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82a15008 r drm_fb_xrgb8888_to_xrgb1555.dst_pixsize +ffffffff82a1500c r drm_fb_xrgb8888_to_argb1555.dst_pixsize +ffffffff82a15010 r drm_fb_xrgb8888_to_rgba5551.dst_pixsize +ffffffff82a15014 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff82a15018 r drm_fb_xrgb8888_to_argb8888.dst_pixsize +ffffffff82a1501c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82a15020 r drm_fb_xrgb8888_to_argb2101010.dst_pixsize +ffffffff82a15024 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82a15028 r drm_fb_xrgb8888_to_xbgr8888.dst_pixsize +ffffffff82a1502c r drm_fb_xrgb8888_to_abgr8888.dst_pixsize +ffffffff82a16000 r __drm_format_info.formats +ffffffff82a17000 R drm_pgops +ffffffff82a18000 r drm_gem_dma_default_funcs +ffffffff82a19000 R drm_gem_fb_funcs +ffffffff82a1a000 r drm_ioctls +ffffffff82a1c000 r dma_fence_stub_ops +ffffffff82a1c040 R dma_fence_array_ops +ffffffff82a1c080 R dma_fence_chain_ops +ffffffff82a1c0c0 R dmabufops +ffffffff82a1c0f8 R syncfileops +ffffffff82a1d000 r drm_plane_type_enum_list +ffffffff82a1e000 r tv_modes_parameters +ffffffff82a1e0c0 r drm_mode_status_names +ffffffff82a1e200 r drm_named_modes +ffffffff82a1f000 r primary_plane_funcs +ffffffff82a1f068 r safe_modeset_formats +ffffffff82a20000 r orientation_data +ffffffff82a23718 r lcd800x1280_rightside_up +ffffffff82a23730 r lcd720x1280_rightside_up +ffffffff82a23748 r lcd800x1280_leftside_up +ffffffff82a23760 r lcd1080x1920_leftside_up +ffffffff82a23778 r lcd1200x1920_rightside_up +ffffffff82a23790 r gpd_micropc +ffffffff82a237a8 r gpd_pocket +ffffffff82a237c0 r gpd_pocket2 +ffffffff82a237d8 r gpd_win +ffffffff82a237f0 r gpd_win2 +ffffffff82a23808 r itworks_tw891 +ffffffff82a23820 r lcd1600x2560_rightside_up +ffffffff82a23838 r onegx1_pro +ffffffff82a23850 r lcd1600x2560_leftside_up +ffffffff82a23868 r lcd1280x1920_rightside_up +ffffffff82a23880 r gpd_onemix2s +ffffffff82a23898 r .compoundliteral +ffffffff82a238a8 r .compoundliteral.5 +ffffffff82a238d0 r .compoundliteral.9 +ffffffff82a238f0 r .compoundliteral.17 +ffffffff82a23930 r .compoundliteral.21 +ffffffff82a23950 r .compoundliteral.23 +ffffffff82a23960 r .compoundliteral.25 +ffffffff82a23970 r .compoundliteral.29 +ffffffff82a24000 r drm_gem_prime_dmabuf_ops +ffffffff82a26000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82a27000 r drm_dp_phy_name.phy_names +ffffffff82a27048 r drm_dp_i2c_algo +ffffffff82a27058 r drm_dp_i2c_lock_ops +ffffffff82a27070 r dp_aux_bl_ops +ffffffff82a27090 r dpcd_quirk_list +ffffffff82a27320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82a28000 R drm_dp_mst_topology_state_funcs +ffffffff82a28020 r drm_dp_mst_req_type_str.req_type_str +ffffffff82a281f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82a28220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82a28278 r drm_dp_mst_i2c_algo +ffffffff82a29000 r rc_parameters_1_2_444 +ffffffff82a295f0 r rc_parameters_pre_scr +ffffffff82a29920 r rc_parameters_1_2_422 +ffffffff82a29df0 r rc_parameters_1_2_420 +ffffffff82a2b000 r hdmi_colorimetry_val +ffffffff82a2c018 R ttm_bo_vm_ops +ffffffff82a2d000 r ttm_range_manager_func +ffffffff82a2e018 r ttm_kmap_iter_io_ops +ffffffff82a2e030 r ttm_kmap_iter_linear_io_ops +ffffffff82a2f000 r ttm_sys_manager_func +ffffffff82a30000 r ttm_kmap_iter_tt_ops +ffffffff82a31000 r drm_sched_fence_ops_scheduled +ffffffff82a31040 r drm_sched_fence_ops_finished +ffffffff82a32000 R ch7017_ops +ffffffff82a33000 R ch7xxx_ops +ffffffff82a33060 r ch7xxx_ids +ffffffff82a34000 R ivch_ops +ffffffff82a34060 r backup_addresses +ffffffff82a35000 R ns2501_ops +ffffffff82a35060 r mode_agnostic_values +ffffffff82a350e0 r ns2501_modes +ffffffff82a36000 R sil164_ops +ffffffff82a37000 R tfp410_ops +ffffffff82a38000 r chv_dpll +ffffffff82a38050 r vlv_dpll +ffffffff82a380a0 r g4x_dpll +ffffffff82a380f0 r pch_dpll +ffffffff82a38138 r intel_dp_enc_funcs +ffffffff82a39000 r intel_hdmi_enc_funcs +ffffffff82a3a000 r vlv_primary_formats +ffffffff82a3a030 r ivb_primary_formats +ffffffff82a3a050 r i965_primary_formats +ffffffff82a3a070 r i8xx_primary_formats +ffffffff82a3a080 r i965_plane_funcs +ffffffff82a3a0e8 r i8xx_plane_funcs +ffffffff82a3b000 r ilk_wm_funcs +ffffffff82a3b040 r vlv_wm_funcs +ffffffff82a3b080 r g4x_wm_funcs +ffffffff82a3b0c0 r nop_funcs +ffffffff82a3b100 r pnv_wm_funcs +ffffffff82a3b140 r i965_wm_funcs +ffffffff82a3b180 r i9xx_wm_funcs +ffffffff82a3b1c0 r i845_wm_funcs +ffffffff82a3b200 r cxsr_latency_table +ffffffff82a3c000 r gen11_dsi_encoder_funcs +ffffffff82a3c020 r gen11_dsi_connector_funcs +ffffffff82a3c098 r gen11_dsi_connector_helper_funcs +ffffffff82a3c0f8 r gen11_dsi_host_ops +ffffffff82a3d000 r intel_plane_helper_funcs +ffffffff82a3e000 r g4x_audio_funcs +ffffffff82a3e018 r ibx_audio_funcs +ffffffff82a3e030 r hsw_audio_funcs +ffffffff82a3e050 r hdmi_audio_clock +ffffffff82a3e0c0 r dp_aud_n_m +ffffffff82a3e270 r hdmi_aud_ncts_36bpp +ffffffff82a3e350 r hdmi_aud_ncts_30bpp +ffffffff82a3e430 r hdmi_aud_ncts_24bpp +ffffffff82a3f000 r intel_backlight_device_ops +ffffffff82a3f018 r bxt_pwm_funcs +ffffffff82a3f048 r cnp_pwm_funcs +ffffffff82a3f078 r lpt_pwm_funcs +ffffffff82a3f0a8 r spt_pwm_funcs +ffffffff82a3f0d8 r pch_pwm_funcs +ffffffff82a3f108 r ext_pwm_funcs +ffffffff82a3f138 r vlv_pwm_funcs +ffffffff82a3f168 r i965_pwm_funcs +ffffffff82a3f198 r i9xx_pwm_funcs +ffffffff82a3f1c8 r pwm_bl_funcs +ffffffff82a40000 r bdb_blocks +ffffffff82a40160 r adlp_aux_ch_map +ffffffff82a40169 r adls_aux_ch_map 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intel_spurious_crt_detect +ffffffff82a464a8 r intel_crt_connector_helper_funcs +ffffffff82a47000 r g4x_crtc_funcs +ffffffff82a470c0 r i965_crtc_funcs +ffffffff82a47180 r i915gm_crtc_funcs +ffffffff82a47240 r i915_crtc_funcs +ffffffff82a47300 r i8xx_crtc_funcs +ffffffff82a473c0 r bdw_crtc_funcs +ffffffff82a47480 r ilk_crtc_funcs +ffffffff82a48000 r output_format_str +ffffffff82a48020 r output_type_str +ffffffff82a49000 r intel_cursor_plane_funcs +ffffffff82a49068 r intel_cursor_formats +ffffffff82a4a000 r mtl_c10_hdmi_tables +ffffffff82a4a170 r mtl_c10_hdmi_25_2 +ffffffff82a4a18c r mtl_c10_hdmi_27_0 +ffffffff82a4a1a8 r mtl_c10_hdmi_27027 +ffffffff82a4a1c4 r mtl_c10_hdmi_28320 +ffffffff82a4a1e0 r mtl_c10_hdmi_30240 +ffffffff82a4a1fc r mtl_c10_hdmi_31500 +ffffffff82a4a218 r mtl_c10_hdmi_36000 +ffffffff82a4a234 r mtl_c10_hdmi_40000 +ffffffff82a4a250 r mtl_c10_hdmi_49500 +ffffffff82a4a26c r mtl_c10_hdmi_50000 +ffffffff82a4a288 r mtl_c10_hdmi_57284 +ffffffff82a4a2a4 r mtl_c10_hdmi_58000 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adls_combo_phy_trans_edp_hbr3 +ffffffff82a4c888 r adls_combo_phy_trans_edp_hbr2 +ffffffff82a4c8a0 r _adls_combo_phy_trans_edp_hbr3 +ffffffff82a4c920 r _adls_combo_phy_trans_edp_hbr2 +ffffffff82a4c998 r adls_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82a4c9a8 r tgl_combo_phy_trans_dp_hbr +ffffffff82a4c9c0 r _adls_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82a4ca40 r _tgl_combo_phy_trans_dp_hbr +ffffffff82a4cab8 r icl_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff82a4cac8 r icl_combo_phy_trans_edp_hbr2 +ffffffff82a4cae0 r _icl_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff82a4cb60 r _icl_combo_phy_trans_edp_hbr2 +ffffffff82a4cbd8 r rkl_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82a4cbe8 r rkl_combo_phy_trans_dp_hbr +ffffffff82a4cc00 r _rkl_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82a4cc80 r _rkl_combo_phy_trans_dp_hbr +ffffffff82a4ccf8 r dg1_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82a4cd08 r dg1_combo_phy_trans_dp_rbr_hbr +ffffffff82a4cd20 r _dg1_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82a4cda0 r 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+ffffffff82ae1b90 r SECT_CONTEXT_def_7 +ffffffff82ae2018 r SECT_CLEAR_def_1 +ffffffff82ae2024 r SECT_CTRLCONST_def_1 +ffffffff82ae2030 r cayman_default_state +ffffffff82ae3000 r cac_weights_cayman_xt +ffffffff82ae3128 r cac_weights_cayman_pro +ffffffff82ae3250 r cac_weights_cayman_le +ffffffff82ae3380 r cayman_cgcg_cgls_default +ffffffff82ae35c0 r cayman_mgcg_default +ffffffff82ae3f20 r cayman_sysls_default +ffffffff82ae3ff0 r cayman_cgcg_cgls_enable +ffffffff82ae4240 r cayman_cgcg_cgls_disable +ffffffff82ae44a0 r cayman_mgcg_enable +ffffffff82ae4520 r cayman_mgcg_disable +ffffffff82ae45a0 r cayman_sysls_enable +ffffffff82ae4670 r cayman_sysls_disable +ffffffff82ae5000 r rn50_reg_safe_bm +ffffffff82ae51a0 r r100_reg_safe_bm +ffffffff82ae6000 r r200_reg_safe_bm +ffffffff82ae7000 r r300_reg_safe_bm +ffffffff82ae8000 r r420_reg_safe_bm +ffffffff82aea000 r color_formats_table +ffffffff82aea480 r r600_reg_safe_bm +ffffffff82aed000 R r600_utc +ffffffff82aed040 R r600_dtc +ffffffff82aed080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82aef000 r r100_gfx_ring +ffffffff82aef070 r r300_gfx_ring +ffffffff82aef0e0 r rv515_gfx_ring +ffffffff82aef150 r r600_gfx_ring +ffffffff82aef1c0 r r600_dma_ring +ffffffff82aef230 r rv6xx_uvd_ring +ffffffff82aef2a0 r rv770_uvd_ring +ffffffff82aef310 r evergreen_gfx_ring +ffffffff82aef380 r evergreen_dma_ring +ffffffff82aef3f0 r cayman_gfx_ring +ffffffff82aef460 r cayman_dma_ring +ffffffff82aef4d0 r cayman_uvd_ring +ffffffff82aef540 r trinity_vce_ring +ffffffff82aef5b0 r si_gfx_ring +ffffffff82aef620 r si_dma_ring +ffffffff82aef690 r ci_gfx_ring +ffffffff82aef700 r ci_cp_ring +ffffffff82aef770 r ci_dma_ring +ffffffff82aef7e0 r ci_vce_ring +ffffffff82af0000 r object_connector_convert +ffffffff82af0060 r supported_devices_connector_convert +ffffffff82af00a0 r supported_devices_connector_object_id_convert +ffffffff82af00c0 r thermal_controller_names +ffffffff82af0100 r pp_lib_thermal_controller_names +ffffffff82af1000 r pin_offsets +ffffffff82af1020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff82af3000 r thermal_controller_names +ffffffff82af3020 r default_primarydac_adj +ffffffff82af3120 r default_tvdac_adj +ffffffff82af3220 r default_tmds_pll +ffffffff82af4000 r radeon_dp_connector_funcs +ffffffff82af4078 r radeon_dp_connector_helper_funcs +ffffffff82af40d8 r radeon_lvds_bridge_connector_funcs +ffffffff82af4150 r radeon_vga_connector_funcs +ffffffff82af41c8 r radeon_vga_connector_helper_funcs +ffffffff82af4228 r radeon_dvi_connector_funcs +ffffffff82af42a0 r radeon_dvi_connector_helper_funcs +ffffffff82af4300 r radeon_edp_connector_funcs +ffffffff82af4378 r radeon_tv_connector_funcs +ffffffff82af43f0 r radeon_tv_connector_helper_funcs +ffffffff82af4450 r radeon_lvds_connector_funcs +ffffffff82af44c8 r radeon_lvds_connector_helper_funcs +ffffffff82af5000 r radeon_family_name +ffffffff82af53f0 r radeon_px_quirk_list +ffffffff82af6000 r radeon_fb_funcs +ffffffff82af6018 r radeon_mode_funcs +ffffffff82af6060 r radeon_tmds_pll_enum_list +ffffffff82af6080 r radeon_tv_std_enum_list +ffffffff82af6100 r radeon_underscan_enum_list +ffffffff82af6130 r radeon_audio_enum_list +ffffffff82af6160 r radeon_dither_enum_list +ffffffff82af6180 r radeon_output_csc_enum_list +ffffffff82af61c0 r radeon_crtc_funcs +ffffffff82af6280 r hpd_names +ffffffff82af62b0 r encoder_names +ffffffff82af63e0 r radeon_afmt_init.eg_offsets +ffffffff82af7000 r aux_offset +ffffffff82af8000 R radeondrm_ca +ffffffff82af8030 r pciidlist +ffffffff82afc1d0 r kms_driver +ffffffff82afc2c0 r radeon_ioctls_kms +ffffffff82afd000 r radeon_fbdev_fb_helper_funcs +ffffffff82afd010 r radeon_fbdev_client_funcs +ffffffff82afd030 r radeon_fbdev_fb_ops +ffffffff82afe000 R radeon_fence_ops +ffffffff82b00000 R radeon_gem_object_funcs +ffffffff82b00070 r radeon_gem_vm_ops +ffffffff82b01000 r radeon_i2c_algo +ffffffff82b01010 r radeon_atom_i2c_algo +ffffffff82b02000 r legacy_helper_funcs +ffffffff82b03000 r radeon_backlight_ops +ffffffff82b03018 r radeon_legacy_lvds_enc_funcs +ffffffff82b03038 r radeon_legacy_lvds_helper_funcs +ffffffff82b030a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82b030c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82b03128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82b03148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82b031b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82b031d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82b03238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82b03258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82b04000 r SLOPE_value +ffffffff82b04030 r YCOEF_EN_value +ffffffff82b04060 r YCOEF_value +ffffffff82b04090 r available_tv_modes +ffffffff82b04110 r hor_timing_NTSC +ffffffff82b04150 r vert_timing_NTSC +ffffffff82b04190 r hor_timing_PAL +ffffffff82b041d0 r vert_timing_PAL +ffffffff82b06000 r radeon_pm_state_type_name +ffffffff82b07000 r radeon_evict_flags.placements +ffffffff82b0a000 r rs600_reg_safe_bm +ffffffff82b0c000 r rv515_reg_safe_bm +ffffffff82b0d000 r dll_speed_table +ffffffff82b0e000 r r7xx_golden_registers +ffffffff82b0e090 r r7xx_golden_dyn_gpr_registers +ffffffff82b0e100 r rv770ce_golden_registers +ffffffff82b0e160 r rv770_golden_registers +ffffffff82b0e1b0 r rv770_mgcg_init +ffffffff82b0e8f0 r rv730_golden_registers +ffffffff82b0e950 r rv730_mgcg_init +ffffffff82b0eee0 r rv710_golden_registers +ffffffff82b0ef30 r rv710_mgcg_init +ffffffff82b0f1d0 r rv740_golden_registers +ffffffff82b0f360 r rv740_mgcg_init +ffffffff82b11000 r rv730_smc_int_vectors +ffffffff82b11040 r rv710_smc_int_vectors +ffffffff82b11080 r rv740_smc_int_vectors +ffffffff82b110c0 r cypress_smc_int_vectors +ffffffff82b11100 r caicos_smc_int_vectors +ffffffff82b11140 r cayman_smc_int_vectors +ffffffff82b12000 r tahiti_io_mc_regs +ffffffff82b12120 r pitcairn_io_mc_regs +ffffffff82b12240 r verde_io_mc_regs +ffffffff82b12360 r oland_io_mc_regs +ffffffff82b12480 r hainan_io_mc_regs +ffffffff82b125a0 r crtc_offsets +ffffffff82b125c0 r si_disp_int_status +ffffffff82b125e0 r tahiti_golden_registers +ffffffff82b12760 r tahiti_golden_rlc_registers +ffffffff82b127b0 r tahiti_mgcg_cgcg_init +ffffffff82b12d98 r tahiti_golden_registers2 +ffffffff82b12db0 r pitcairn_golden_registers +ffffffff82b12f00 r pitcairn_golden_rlc_registers +ffffffff82b12f40 r pitcairn_mgcg_cgcg_init +ffffffff82b133b0 r verde_golden_registers +ffffffff82b13620 r verde_golden_rlc_registers +ffffffff82b13660 r verde_mgcg_cgcg_init +ffffffff82b13ae0 r oland_golden_registers +ffffffff82b13c30 r oland_golden_rlc_registers +ffffffff82b13c70 r oland_mgcg_cgcg_init +ffffffff82b14000 r hainan_golden_registers +ffffffff82b1412c r hainan_golden_registers2 +ffffffff82b14140 r hainan_mgcg_cgcg_init +ffffffff82b144b0 r verde_rlc_save_restore_register_list +ffffffff82b14820 r si_cs_data +ffffffff82b14840 r si_SECT_CONTEXT_defs +ffffffff82b148c0 r si_SECT_CONTEXT_def_1 +ffffffff82b14c10 r si_SECT_CONTEXT_def_3 +ffffffff82b14c30 r si_SECT_CONTEXT_def_4 +ffffffff82b14ea4 r si_SECT_CONTEXT_def_5 +ffffffff82b14ea8 r si_SECT_CONTEXT_def_6 +ffffffff82b14eb0 r si_SECT_CONTEXT_def_2 +ffffffff82b152f0 r si_SECT_CONTEXT_def_7 +ffffffff82b156a0 r mc_cg_registers +ffffffff82b156d0 r si_default_state +ffffffff82b16000 r cac_weights_tahiti +ffffffff82b164d0 r lcac_tahiti +ffffffff82b16ba0 r cac_override_tahiti +ffffffff82b16bb4 r powertune_data_tahiti +ffffffff82b16bf0 r dte_data_tahiti +ffffffff82b16cc0 r dte_data_new_zealand +ffffffff82b16d90 r dte_data_malta +ffffffff82b16e60 r lcac_pitcairn +ffffffff82b17530 r cac_override_pitcairn +ffffffff82b17544 r powertune_data_pitcairn +ffffffff82b17580 r lcac_cape_verde +ffffffff82b179d0 r cac_override_cape_verde +ffffffff82b179e4 r powertune_data_cape_verde +ffffffff82b17a20 r cac_weights_cape_verde_pro +ffffffff82b17ef0 r cac_weights_heathrow +ffffffff82b183c0 r cac_weights_chelsea_xt +ffffffff82b18890 r cac_weights_chelsea_pro +ffffffff82b18d60 r cac_weights_cape_verde +ffffffff82b19230 r cac_weights_mars_pro +ffffffff82b19700 r lcac_mars_pro +ffffffff82b19a60 r cac_override_oland +ffffffff82b19a74 r powertune_data_mars_pro +ffffffff82b19ab0 r cac_weights_mars_xt +ffffffff82b19f80 r cac_weights_oland_pro +ffffffff82b1a450 r cac_weights_oland_xt +ffffffff82b1a920 r lcac_oland +ffffffff82b1ac7c r powertune_data_oland +ffffffff82b1acc0 r cac_weights_hainan +ffffffff82b1b184 r powertune_data_hainan +ffffffff82b1b1c0 r dte_data_aruba_pro +ffffffff82b1b290 r dte_data_tahiti_pro +ffffffff82b1b360 r dte_data_curacao_pro +ffffffff82b1b430 r dte_data_neptune_xt +ffffffff82b1b500 r dte_data_sun_xt +ffffffff82b1b5d0 r dte_data_venus_xtx +ffffffff82b1b6a0 r dte_data_venus_xt +ffffffff82b1b770 r dte_data_venus_pro +ffffffff82b1b840 r dte_data_mars_pro +ffffffff82b1c000 r si_program_jump_on_start.data +ffffffff82b1d000 r sumo_dtc +ffffffff82b1e000 r trinity_mgcg_shls_default +ffffffff82b1e380 r trinity_sysls_enable +ffffffff82b1e450 r trinity_sysls_disable +ffffffff82b20000 r GC_BASE +ffffffff82b200a8 r HDP_BASE +ffffffff82b20150 r MMHUB_BASE +ffffffff82b201f8 r ATHUB_BASE +ffffffff82b202a0 r NBIO_BASE +ffffffff82b20348 r MP0_BASE +ffffffff82b203f0 r MP1_BASE +ffffffff82b20498 r DF_BASE +ffffffff82b20540 r OSSSYS_BASE +ffffffff82b205e8 r SDMA0_BASE +ffffffff82b20690 r SDMA1_BASE +ffffffff82b20738 r SDMA2_BASE +ffffffff82b207e0 r SDMA3_BASE +ffffffff82b20888 r SDMA4_BASE +ffffffff82b20930 r SMUIO_BASE +ffffffff82b209d8 r THM_BASE +ffffffff82b20a80 r UMC_BASE +ffffffff82b20b28 r VCN_BASE +ffffffff82b21000 r amdgpu_afmt_predefined_acr +ffffffff82b22000 r atom_op_names +ffffffff82b223e0 r opcode_table +ffffffff82b22bd0 r atom_dst_to_src +ffffffff82b22c50 r atom_io_names +ffffffff82b22c80 r atom_table_names +ffffffff82b22ed0 r atom_iio_len +ffffffff82b23000 r object_connector_convert +ffffffff82b23058 R amdgpu_vbios_version_attr_group +ffffffff82b24000 r voltage_names +ffffffff82b24020 r pre_emph_names +ffffffff82b25000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82b27000 r amdgpu_benchmark.common_modes +ffffffff82b28000 r amdgpu_cgs_ops +ffffffff82b29000 r amdgpu_connector_dp_funcs +ffffffff82b29078 r amdgpu_connector_dp_helper_funcs +ffffffff82b290d8 r amdgpu_connector_edp_funcs +ffffffff82b29150 r amdgpu_connector_vga_funcs +ffffffff82b291c8 r amdgpu_connector_vga_helper_funcs +ffffffff82b29228 r amdgpu_connector_dvi_funcs +ffffffff82b292a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82b29300 r amdgpu_connector_lvds_funcs +ffffffff82b29378 r amdgpu_connector_lvds_helper_funcs +ffffffff82b293e0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82b2b000 R amdgpu_ctx_num_entities +ffffffff82b2c000 r amdgpu_kms_driver +ffffffff82b2c0f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82b2d000 r hw_id_map +ffffffff82b2d090 r hw_id_names +ffffffff82b2e000 r hpd_names +ffffffff82b2e030 r encoder_names +ffffffff82b2e180 r dcc_retile_formats +ffffffff82b2e270 r dcc_formats +ffffffff82b2e360 R amdgpu_mode_funcs +ffffffff82b2e3b0 r amdgpu_underscan_enum_list +ffffffff82b2e3e0 r amdgpu_audio_enum_list +ffffffff82b2e410 r amdgpu_dither_enum_list +ffffffff82b2e430 r amdgpu_fb_funcs_atomic +ffffffff82b2e448 r amdgpu_fb_funcs +ffffffff82b2f000 R amdgpu_dmabuf_ops +ffffffff82b30000 R amdgpu_ioctls_kms +ffffffff82b30210 R amdgpu_partition_driver +ffffffff82b302f8 R amdgpu_ca +ffffffff82b30320 r pciidlist +ffffffff82b311f0 r amdgpu_unsupported_pciidlist +ffffffff82b31770 r amdgpu_kms_driver +ffffffff82b32000 r amdgpu_job_fence_ops +ffffffff82b32040 r amdgpu_fence_ops +ffffffff82b33000 r amdgpu_gem_object_funcs +ffffffff82b33070 r amdgpu_gem_vm_ops +ffffffff82b34000 R amdgpu_gtt_mgr_attr_group +ffffffff82b34018 r amdgpu_gtt_mgr_func +ffffffff82b35000 r amdgpu_atombios_i2c_algo +ffffffff82b36000 R node_id_to_phys_map +ffffffff82b37000 R amdgpu_sched_ops +ffffffff82b39000 r amdgpu_vram_names +ffffffff82b3a000 r amdgpu_preempt_mgr_func +ffffffff82b3b000 R psp_ip_funcs +ffffffff82b3b0a0 R psp_v3_1_ip_block +ffffffff82b3b0b8 R psp_v10_0_ip_block +ffffffff82b3b0d0 R psp_v11_0_ip_block +ffffffff82b3b0e8 R psp_v11_0_8_ip_block +ffffffff82b3b100 R psp_v12_0_ip_block +ffffffff82b3b118 R psp_v13_0_ip_block +ffffffff82b3b130 R psp_v13_0_4_ip_block +ffffffff82b3d000 r sw_ring_info +ffffffff82b3e000 r amdgpu_evict_flags.placements +ffffffff82b42000 R amdgpu_vkms_ip_block +ffffffff82b43000 R amdgpu_vm_cpu_funcs +ffffffff82b45000 R amdgpu_vm_sdma_funcs +ffffffff82b46000 R amdgpu_vram_mgr_attr_group +ffffffff82b46018 r amdgpu_vram_mgr_func +ffffffff82b46040 r amdgpu_dummy_vram_mgr_func +ffffffff82b47000 r xgmi_pcs_err_status_reg_arct +ffffffff82b47020 r xgmi3x16_pcs_ras_fields +ffffffff82b471f0 r xgmi_pcs_ras_fields +ffffffff82b47310 r wafl_pcs_ras_fields +ffffffff82b48000 r GC_BASE +ffffffff82b480c0 r HDP_BASE +ffffffff82b48180 r MMHUB_BASE +ffffffff82b48240 r ATHUB_BASE +ffffffff82b48300 r NBIF0_BASE +ffffffff82b483c0 r MP0_BASE +ffffffff82b48480 r MP1_BASE +ffffffff82b48540 r UVD_BASE +ffffffff82b48600 r DF_BASE +ffffffff82b486c0 r OSSSYS_BASE +ffffffff82b48780 r SDMA0_BASE +ffffffff82b48840 r SDMA1_BASE +ffffffff82b48900 r SDMA2_BASE +ffffffff82b489c0 r SDMA3_BASE +ffffffff82b48a80 r SDMA4_BASE +ffffffff82b48b40 r SDMA5_BASE +ffffffff82b48c00 r SDMA6_BASE +ffffffff82b48cc0 r SDMA7_BASE +ffffffff82b48d80 r SMUIO_BASE +ffffffff82b48e40 r THM_BASE +ffffffff82b48f00 r UMC_BASE +ffffffff82b48fc0 r RSMU_BASE +ffffffff82b4a000 r cz_ih_ip_funcs +ffffffff82b4a0a0 R cz_ih_ip_block +ffffffff82b4a0b8 r cz_ih_funcs ffffffff82b4b000 r crtc_offsets -ffffffff82b4b020 r dce_v11_0_ip_funcs -ffffffff82b4b0c0 R dce_v11_0_ip_block -ffffffff82b4b0d8 R dce_v11_2_ip_block -ffffffff82b4b0f0 r dce_v11_0_display_funcs +ffffffff82b4b020 r dce_v10_0_ip_funcs +ffffffff82b4b0c0 R dce_v10_0_ip_block +ffffffff82b4b0d8 R dce_v10_1_ip_block +ffffffff82b4b0f0 r dce_v10_0_display_funcs ffffffff82b4b150 r hpd_offsets -ffffffff82b4b168 r dce_v11_0_encoder_funcs -ffffffff82b4b188 r dce_v11_0_dac_helper_funcs -ffffffff82b4b1f0 r dce_v11_0_dig_helper_funcs -ffffffff82b4b258 r dce_v11_0_ext_helper_funcs -ffffffff82b4b2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82b4b2f0 r dce_v11_0_crtc_irq_funcs -ffffffff82b4b300 r dce_v11_0_pageflip_irq_funcs -ffffffff82b4b310 r dce_v11_0_hpd_irq_funcs +ffffffff82b4b168 r dce_v10_0_encoder_funcs +ffffffff82b4b188 r dce_v10_0_dac_helper_funcs +ffffffff82b4b1f0 r dce_v10_0_dig_helper_funcs +ffffffff82b4b258 r dce_v10_0_ext_helper_funcs +ffffffff82b4b2c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82b4b2f0 r dce_v10_0_crtc_irq_funcs +ffffffff82b4b300 r dce_v10_0_pageflip_irq_funcs +ffffffff82b4b310 r dce_v10_0_hpd_irq_funcs ffffffff82b4b320 r interrupt_status_offsets -ffffffff82b4b380 r dce_v11_0_crtc_funcs -ffffffff82b4b440 r dce_v11_0_crtc_helper_funcs +ffffffff82b4b380 r dce_v10_0_crtc_funcs +ffffffff82b4b440 r dce_v10_0_crtc_helper_funcs ffffffff82b4b4c0 r vga_control_regs ffffffff82b4b4e0 r dig_offsets -ffffffff82b4b510 r cz_mgcg_cgcg_init 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-ffffffff82b59de0 r golden_settings_gc_rlc_spm_10_1_2_nv12 -ffffffff82b60080 r gfx_v10_0_kiq_pm4_funcs -ffffffff82b600c0 r gfx_v10_0_ring_funcs_kiq -ffffffff82b60200 r gfx_v10_0_ring_funcs_gfx -ffffffff82b60340 r gfx_v10_0_ring_funcs_compute -ffffffff82b60480 r gfx_v10_0_eop_irq_funcs -ffffffff82b60490 r gfx_v10_0_kiq_irq_funcs -ffffffff82b604a0 r gfx_v10_0_priv_reg_irq_funcs -ffffffff82b604b0 r gfx_v10_0_priv_inst_irq_funcs -ffffffff82b604c0 r gfx_v10_0_rlc_funcs -ffffffff82b60528 r gfx_v10_0_rlc_funcs_sriov -ffffffff82b60590 r gfx10_cs_data -ffffffff82b605b0 r gfx10_SECT_CONTEXT_defs -ffffffff82b60640 r gfx10_SECT_CONTEXT_def_1 -ffffffff82b609a0 r gfx10_SECT_CONTEXT_def_3 -ffffffff82b609b0 r gfx10_SECT_CONTEXT_def_4 -ffffffff82b60c28 r gfx10_SECT_CONTEXT_def_5 -ffffffff82b60c30 r gfx10_SECT_CONTEXT_def_6 -ffffffff82b60c40 r gfx10_SECT_CONTEXT_def_2 -ffffffff82b61080 r gfx10_SECT_CONTEXT_def_7 -ffffffff82b61190 r gfx10_SECT_CONTEXT_def_8 -ffffffff82b614c0 r golden_settings_gc_10_1 -ffffffff82b61880 r golden_settings_gc_10_0_nv10 -ffffffff82b61880 r golden_settings_gc_10_1_1 -ffffffff82b61c10 r golden_settings_gc_10_1_2 -ffffffff82b61c10 r golden_settings_gc_10_1_nv14 -ffffffff82b62000 r golden_settings_gc_10_1_2_nv12 -ffffffff82b62000 r golden_settings_gc_10_3 -ffffffff82b62408 r golden_settings_gc_10_3_sienna_cichlid -ffffffff82b62410 r golden_settings_gc_10_3_2 -ffffffff82b62800 r golden_settings_gc_10_3_vangogh -ffffffff82b62a60 r golden_settings_gc_10_3_3 -ffffffff82b62c40 r golden_settings_gc_10_3_4 -ffffffff82b62fa0 r golden_settings_gc_10_3_5 -ffffffff82b632a0 r golden_settings_gc_10_0_cyan_skillfish -ffffffff82b635d0 r golden_settings_gc_10_3_6 -ffffffff82b637e0 r golden_settings_gc_10_3_7 -ffffffff82b64000 r gfx_v11_0_ip_funcs -ffffffff82b640a0 R gfx_v11_0_ip_block -ffffffff82b640b8 r gfx_v11_0_gfx_funcs -ffffffff82b64118 r gfx_v11_0_kiq_pm4_funcs -ffffffff82b64158 r gfx_v11_0_ring_funcs_kiq -ffffffff82b64298 r gfx_v11_0_ring_funcs_gfx -ffffffff82b643d8 r gfx_v11_0_ring_funcs_compute -ffffffff82b64518 r gfx_v11_0_eop_irq_funcs -ffffffff82b64528 r gfx_v11_0_priv_reg_irq_funcs -ffffffff82b64538 r gfx_v11_0_priv_inst_irq_funcs -ffffffff82b64548 r gfx_v11_0_rlc_gc_fed_irq_funcs -ffffffff82b64558 r gfx_v11_0_rlc_funcs -ffffffff82b645c0 r gfx11_cs_data -ffffffff82b645e0 r gfx11_SECT_CONTEXT_defs -ffffffff82b64660 r gfx11_SECT_CONTEXT_def_1 -ffffffff82b649c0 r gfx11_SECT_CONTEXT_def_3 -ffffffff82b649d0 r gfx11_SECT_CONTEXT_def_5 -ffffffff82b649d8 r gfx11_SECT_CONTEXT_def_6 -ffffffff82b649e0 r gfx11_SECT_CONTEXT_def_2 -ffffffff82b64e20 r gfx11_SECT_CONTEXT_def_4 -ffffffff82b650a0 r gfx11_SECT_CONTEXT_def_7 -ffffffff82b65510 r golden_settings_gc_11_0_1 -ffffffff82b655f0 r golden_settings_gc_11_0 -ffffffff82b66000 r gfx_v8_0_ip_funcs -ffffffff82b660a0 R gfx_v8_0_ip_block -ffffffff82b660b8 R gfx_v8_1_ip_block -ffffffff82b660d0 r gfx_v8_0_gfx_funcs -ffffffff82b66130 r gfx_v8_0_ring_funcs_kiq -ffffffff82b66270 r gfx_v8_0_ring_funcs_gfx -ffffffff82b663b0 r gfx_v8_0_ring_funcs_compute -ffffffff82b664f0 r amdgpu_gds_reg_offset -ffffffff82b665f0 r gfx_v8_0_eop_irq_funcs -ffffffff82b66600 r gfx_v8_0_priv_reg_irq_funcs -ffffffff82b66610 r gfx_v8_0_priv_inst_irq_funcs -ffffffff82b66620 r gfx_v8_0_cp_ecc_error_irq_funcs -ffffffff82b66630 r gfx_v8_0_sq_irq_funcs -ffffffff82b66640 r sq_edc_source_names -ffffffff82b66678 r iceland_rlc_funcs -ffffffff82b666e0 r vi_cs_data -ffffffff82b66700 r vi_SECT_CONTEXT_defs -ffffffff82b66780 r vi_SECT_CONTEXT_def_1 -ffffffff82b66ad0 r vi_SECT_CONTEXT_def_3 -ffffffff82b66af0 r vi_SECT_CONTEXT_def_4 -ffffffff82b66d64 r vi_SECT_CONTEXT_def_5 -ffffffff82b66d6c r vi_SECT_CONTEXT_def_6 -ffffffff82b66d70 r vi_SECT_CONTEXT_def_2 -ffffffff82b671c0 r vi_SECT_CONTEXT_def_7 -ffffffff82b67570 r vgpr_init_compute_shader -ffffffff82b67680 r vgpr_init_regs -ffffffff82b67710 r sgpr1_init_regs -ffffffff82b677a0 r sgpr2_init_regs -ffffffff82b67830 r sec_ded_counter_registers -ffffffff82b678a0 r iceland_mgcg_cgcg_init -ffffffff82b67ba0 r golden_settings_iceland_a11 -ffffffff82b67c60 r iceland_golden_common_all -ffffffff82b67cc0 r fiji_mgcg_cgcg_init -ffffffff82b67e70 r golden_settings_fiji_a10 -ffffffff82b67f00 r fiji_golden_common_all -ffffffff82b67f80 r tonga_mgcg_cgcg_init -ffffffff82b68310 r golden_settings_tonga_a11 -ffffffff82b683d0 r tonga_golden_common_all -ffffffff82b68430 r golden_settings_vegam_a11 -ffffffff82b68500 r vegam_golden_common_all -ffffffff82b68550 r golden_settings_polaris11_a11 -ffffffff82b68620 r polaris11_golden_common_all -ffffffff82b68670 r golden_settings_polaris10_a11 -ffffffff82b68740 r polaris10_golden_common_all -ffffffff82b687a0 r cz_mgcg_cgcg_init -ffffffff82b68b30 r cz_golden_settings_a11 -ffffffff82b68bc0 r cz_golden_common_all -ffffffff82b68c20 r stoney_mgcg_cgcg_init -ffffffff82b68c60 r stoney_golden_settings_a11 -ffffffff82b68ce0 r stoney_golden_common_all -ffffffff82b69000 R gfx_v9_0_ras_ops -ffffffff82b69040 r gfx_v9_0_ip_funcs -ffffffff82b690e0 R gfx_v9_0_ip_block -ffffffff82b69100 r ras_gfx_subblocks -ffffffff82b69b80 r gfx_v9_0_edc_counter_regs -ffffffff82b69f20 r gfx_v9_0_ras_fields -ffffffff82b6b000 r gfx_v9_0_gfx_funcs -ffffffff82b6b060 r gfx_v9_0_kiq_pm4_funcs -ffffffff82b6b0a0 r gfx_v9_0_ring_funcs_kiq -ffffffff82b6b1e0 r gfx_v9_0_ring_funcs_gfx -ffffffff82b6b320 r gfx_v9_0_sw_ring_funcs_gfx -ffffffff82b6b460 r gfx_v9_0_ring_funcs_compute -ffffffff82b6b5a0 r gfx_v9_0_eop_irq_funcs -ffffffff82b6b5b0 r gfx_v9_0_priv_reg_irq_funcs -ffffffff82b6b5c0 r gfx_v9_0_priv_inst_irq_funcs -ffffffff82b6b5d0 r gfx_v9_0_cp_ecc_error_irq_funcs -ffffffff82b6b5e0 r gfx_v9_0_rlc_funcs -ffffffff82b6b650 r gfx9_cs_data -ffffffff82b6b670 r gfx9_SECT_CONTEXT_defs -ffffffff82b6b700 r gfx9_SECT_CONTEXT_def_1 -ffffffff82b6ba50 r gfx9_SECT_CONTEXT_def_3 -ffffffff82b6ba60 r gfx9_SECT_CONTEXT_def_4 -ffffffff82b6bcd4 r gfx9_SECT_CONTEXT_def_5 -ffffffff82b6bcdc r gfx9_SECT_CONTEXT_def_6 -ffffffff82b6bce0 r gfx9_SECT_CONTEXT_def_7 -ffffffff82b6bdf0 r gfx9_SECT_CONTEXT_def_2 -ffffffff82b6c260 r gfx9_SECT_CONTEXT_def_8 -ffffffff82b6c4d0 r vgpr_init_compute_shader_arcturus -ffffffff82b6cd60 r vgpr_init_regs_arcturus -ffffffff82b6cef0 r vgpr_init_regs -ffffffff82b6d080 r sgpr1_init_regs -ffffffff82b6d210 r sgpr2_init_regs -ffffffff82b6d3a0 r golden_settings_gc_9_0 -ffffffff82b6d580 r golden_settings_gc_9_0_vg10 -ffffffff82b6d730 r golden_settings_gc_9_2_1 -ffffffff82b6d8b0 r golden_settings_gc_9_2_1_vg12 -ffffffff82b6d9f0 r golden_settings_gc_9_0_vg20 -ffffffff82b6db00 r golden_settings_gc_9_4_1_arct -ffffffff82b6dc10 r golden_settings_gc_9_1 -ffffffff82b6de50 r golden_settings_gc_9_1_rv2 -ffffffff82b6e020 r golden_settings_gc_9_1_rv1 -ffffffff82b6e0d0 r golden_settings_gc_9_1_rn -ffffffff82b6e1f0 r golden_settings_gc_9_x_common -ffffffff82b6f000 R gfx_v9_4_ras_ops -ffffffff82b6f040 r gfx_v9_4_edc_counter_regs -ffffffff82b6f420 r gfx_v9_4_ras_fields -ffffffff82b71000 R vgpr_init_regs_aldebaran -ffffffff82b711b0 R sgpr112_init_regs_aldebaran -ffffffff82b71360 R sgpr96_init_regs_aldebaran -ffffffff82b71510 R sgpr64_init_regs_aldebaran -ffffffff82b716c0 r golden_settings_gc_9_4_2_alde -ffffffff82b71720 r golden_settings_gc_9_4_2_alde_die_0 -ffffffff82b717b0 r golden_settings_gc_9_4_2_alde_die_1 -ffffffff82b71840 r sgpr112_init_compute_shader_aldebaran -ffffffff82b71a60 r sgpr96_init_compute_shader_aldebaran -ffffffff82b71c50 r sgpr64_init_compute_shader_aldebaran -ffffffff82b71dc0 r vgpr_init_compute_shader_aldebaran -ffffffff82b726a0 r gfx_v9_4_2_edc_counter_regs -ffffffff82b72a20 r gfx_v9_4_2_ras_fields -ffffffff82b743c0 r gfx_v9_4_2_utc_blocks -ffffffff82b75000 r gfx_v9_4_3_ip_funcs -ffffffff82b750a0 R gfx_v9_4_3_ip_block -ffffffff82b750b8 r gfx_v9_4_3_kiq_pm4_funcs -ffffffff82b750f8 r gfx_v9_4_3_ring_funcs_kiq -ffffffff82b75238 r gfx_v9_4_3_ring_funcs_compute -ffffffff82b75378 r gfx_v9_4_3_eop_irq_funcs -ffffffff82b75388 r gfx_v9_4_3_priv_reg_irq_funcs -ffffffff82b75398 r gfx_v9_4_3_priv_inst_irq_funcs -ffffffff82b753a8 r gfx_v9_4_3_rlc_funcs -ffffffff82b75410 r gfx_v9_4_3_gfx_funcs -ffffffff82b75470 r gfx_v9_4_3_ce_reg_list -ffffffff82b75800 r gfx_v9_4_3_ras_mem_list_array -ffffffff82b75960 r gfx_v9_4_3_ue_reg_list -ffffffff82b75d20 r gfx_v9_4_3_ras_cp_mem_list -ffffffff82b75d70 r gfx_v9_4_3_ras_gcea_mem_list -ffffffff82b75eb0 r gfx_v9_4_3_ras_gc_cane_mem_list -ffffffff82b75ec0 r gfx_v9_4_3_ras_gcutcl2_mem_list -ffffffff82b75ed0 r gfx_v9_4_3_ras_gds_mem_list -ffffffff82b75ee0 r gfx_v9_4_3_ras_lds_mem_list -ffffffff82b76100 r gfx_v9_4_3_ras_rlc_mem_list -ffffffff82b76180 r gfx_v9_4_3_ras_sp_mem_list -ffffffff82b76190 r gfx_v9_4_3_ras_spi_mem_list -ffffffff82b761d0 r gfx_v9_4_3_ras_sqc_mem_list -ffffffff82b76340 r gfx_v9_4_3_ras_sq_mem_list -ffffffff82b76380 r gfx_v9_4_3_ras_ta_mem_list -ffffffff82b763d0 r gfx_v9_4_3_ras_tcc_mem_list -ffffffff82b763e0 r gfx_v9_4_3_ras_tca_mem_list -ffffffff82b763f0 r gfx_v9_4_3_ras_tci_mem_list -ffffffff82b76400 r gfx_v9_4_3_ras_tcp_mem_list -ffffffff82b76590 r gfx_v9_4_3_ras_td_mem_list -ffffffff82b765c0 r gfx_v9_4_3_ras_tcx_mem_list -ffffffff82b76b40 r gfx_v9_4_3_ras_atc_l2_mem_list -ffffffff82b76b50 r gfx_v9_4_3_ras_utcl2_mem_list -ffffffff82b76b60 r gfx_v9_4_3_ras_vml2_mem_list -ffffffff82b76b70 r gfx_v9_4_3_ras_vml2_walker_mem_list -ffffffff82b77000 R gfxhub_v1_0_funcs -ffffffff82b78000 R gfxhub_v1_2_funcs -ffffffff82b79000 R gfxhub_v2_0_funcs -ffffffff82b79060 r gfxhub_v2_0_vmhub_funcs -ffffffff82b79070 r gfxhub_client_ids -ffffffff82b7a000 R gfxhub_v2_1_funcs -ffffffff82b7a060 r gfxhub_v2_1_vmhub_funcs +ffffffff82b4b500 r pin_offsets +ffffffff82b4b520 r fiji_mgcg_cgcg_init +ffffffff82b4b540 r golden_settings_fiji_a10 +ffffffff82b4b570 r tonga_mgcg_cgcg_init +ffffffff82b4b590 r golden_settings_tonga_a11 +ffffffff82b4c000 r crtc_offsets +ffffffff82b4c020 r dce_v11_0_ip_funcs +ffffffff82b4c0c0 R dce_v11_0_ip_block +ffffffff82b4c0d8 R dce_v11_2_ip_block +ffffffff82b4c0f0 r dce_v11_0_display_funcs +ffffffff82b4c150 r hpd_offsets +ffffffff82b4c168 r dce_v11_0_encoder_funcs +ffffffff82b4c188 r dce_v11_0_dac_helper_funcs +ffffffff82b4c1f0 r dce_v11_0_dig_helper_funcs +ffffffff82b4c258 r dce_v11_0_ext_helper_funcs +ffffffff82b4c2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82b4c2f0 r dce_v11_0_crtc_irq_funcs +ffffffff82b4c300 r dce_v11_0_pageflip_irq_funcs +ffffffff82b4c310 r dce_v11_0_hpd_irq_funcs +ffffffff82b4c320 r interrupt_status_offsets +ffffffff82b4c380 r dce_v11_0_crtc_funcs +ffffffff82b4c440 r dce_v11_0_crtc_helper_funcs +ffffffff82b4c4c0 r vga_control_regs +ffffffff82b4c4e0 r dig_offsets +ffffffff82b4c510 r cz_mgcg_cgcg_init +ffffffff82b4c530 r cz_golden_settings_a11 +ffffffff82b4c550 r stoney_golden_settings_a11 +ffffffff82b4c570 r polaris11_golden_settings_a11 +ffffffff82b4c5b0 r polaris10_golden_settings_a11 +ffffffff82b4d000 R df_v1_7_funcs +ffffffff82b4d070 r df_v1_7_channel_number +ffffffff82b4e000 R df_v3_6_funcs +ffffffff82b4e070 r df_v3_6_channel_number +ffffffff82b4f000 R df_v4_3_funcs +ffffffff82b50000 r GC_BASE +ffffffff82b500a8 r HDP_BASE +ffffffff82b50150 r MMHUB_BASE +ffffffff82b501f8 r ATHUB_BASE +ffffffff82b502a0 r NBIO_BASE +ffffffff82b50348 r MP0_BASE +ffffffff82b503f0 r MP1_BASE +ffffffff82b50498 r VCN0_BASE +ffffffff82b50540 r DF_BASE +ffffffff82b505e8 r DCN_BASE +ffffffff82b50690 r OSSSYS_BASE +ffffffff82b50738 r SMUIO_BASE +ffffffff82b507e0 r THM_BASE +ffffffff82b51000 r gfx_v10_0_ip_funcs +ffffffff82b510a0 R gfx_v10_0_ip_block +ffffffff82b510b8 r gfx_v10_0_gfx_funcs +ffffffff82b51120 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82b573c0 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82b5ade0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82b61080 r gfx_v10_0_kiq_pm4_funcs +ffffffff82b610c0 r gfx_v10_0_ring_funcs_kiq +ffffffff82b61200 r gfx_v10_0_ring_funcs_gfx +ffffffff82b61340 r gfx_v10_0_ring_funcs_compute +ffffffff82b61480 r gfx_v10_0_eop_irq_funcs +ffffffff82b61490 r gfx_v10_0_kiq_irq_funcs +ffffffff82b614a0 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82b614b0 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82b614c0 r gfx_v10_0_rlc_funcs +ffffffff82b61528 r gfx_v10_0_rlc_funcs_sriov +ffffffff82b61590 r gfx10_cs_data +ffffffff82b615b0 r gfx10_SECT_CONTEXT_defs +ffffffff82b61640 r gfx10_SECT_CONTEXT_def_1 +ffffffff82b619a0 r gfx10_SECT_CONTEXT_def_3 +ffffffff82b619b0 r gfx10_SECT_CONTEXT_def_4 +ffffffff82b61c28 r gfx10_SECT_CONTEXT_def_5 +ffffffff82b61c30 r gfx10_SECT_CONTEXT_def_6 +ffffffff82b61c40 r gfx10_SECT_CONTEXT_def_2 +ffffffff82b62080 r gfx10_SECT_CONTEXT_def_7 +ffffffff82b62190 r gfx10_SECT_CONTEXT_def_8 +ffffffff82b624c0 r golden_settings_gc_10_1 +ffffffff82b62880 r golden_settings_gc_10_0_nv10 +ffffffff82b62880 r golden_settings_gc_10_1_1 +ffffffff82b62c10 r golden_settings_gc_10_1_2 +ffffffff82b62c10 r golden_settings_gc_10_1_nv14 +ffffffff82b63000 r golden_settings_gc_10_1_2_nv12 +ffffffff82b63000 r golden_settings_gc_10_3 +ffffffff82b63408 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82b63410 r golden_settings_gc_10_3_2 +ffffffff82b63800 r golden_settings_gc_10_3_vangogh +ffffffff82b63a60 r golden_settings_gc_10_3_3 +ffffffff82b63c40 r golden_settings_gc_10_3_4 +ffffffff82b63fa0 r golden_settings_gc_10_3_5 +ffffffff82b642a0 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82b645d0 r golden_settings_gc_10_3_6 +ffffffff82b647e0 r golden_settings_gc_10_3_7 +ffffffff82b65000 r gfx_v11_0_ip_funcs +ffffffff82b650a0 R gfx_v11_0_ip_block +ffffffff82b650b8 r gfx_v11_0_gfx_funcs +ffffffff82b65118 r gfx_v11_0_kiq_pm4_funcs +ffffffff82b65158 r gfx_v11_0_ring_funcs_kiq +ffffffff82b65298 r gfx_v11_0_ring_funcs_gfx +ffffffff82b653d8 r gfx_v11_0_ring_funcs_compute +ffffffff82b65518 r gfx_v11_0_eop_irq_funcs +ffffffff82b65528 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82b65538 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82b65548 r gfx_v11_0_rlc_gc_fed_irq_funcs +ffffffff82b65558 r gfx_v11_0_rlc_funcs +ffffffff82b655c0 r gfx11_cs_data +ffffffff82b655e0 r gfx11_SECT_CONTEXT_defs +ffffffff82b65660 r gfx11_SECT_CONTEXT_def_1 +ffffffff82b659c0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82b659d0 r gfx11_SECT_CONTEXT_def_5 +ffffffff82b659d8 r gfx11_SECT_CONTEXT_def_6 +ffffffff82b659e0 r gfx11_SECT_CONTEXT_def_2 +ffffffff82b65e20 r gfx11_SECT_CONTEXT_def_4 +ffffffff82b660a0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82b66510 r golden_settings_gc_11_0_1 +ffffffff82b665f0 r golden_settings_gc_11_0 +ffffffff82b67000 r gfx_v8_0_ip_funcs +ffffffff82b670a0 R gfx_v8_0_ip_block +ffffffff82b670b8 R gfx_v8_1_ip_block +ffffffff82b670d0 r gfx_v8_0_gfx_funcs +ffffffff82b67130 r gfx_v8_0_ring_funcs_kiq +ffffffff82b67270 r gfx_v8_0_ring_funcs_gfx +ffffffff82b673b0 r gfx_v8_0_ring_funcs_compute +ffffffff82b674f0 r amdgpu_gds_reg_offset +ffffffff82b675f0 r gfx_v8_0_eop_irq_funcs +ffffffff82b67600 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82b67610 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82b67620 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82b67630 r gfx_v8_0_sq_irq_funcs +ffffffff82b67640 r sq_edc_source_names +ffffffff82b67678 r iceland_rlc_funcs +ffffffff82b676e0 r vi_cs_data +ffffffff82b67700 r vi_SECT_CONTEXT_defs +ffffffff82b67780 r vi_SECT_CONTEXT_def_1 +ffffffff82b67ad0 r vi_SECT_CONTEXT_def_3 +ffffffff82b67af0 r vi_SECT_CONTEXT_def_4 +ffffffff82b67d64 r vi_SECT_CONTEXT_def_5 +ffffffff82b67d6c r vi_SECT_CONTEXT_def_6 +ffffffff82b67d70 r vi_SECT_CONTEXT_def_2 +ffffffff82b681c0 r vi_SECT_CONTEXT_def_7 +ffffffff82b68570 r vgpr_init_compute_shader +ffffffff82b68680 r vgpr_init_regs +ffffffff82b68710 r sgpr1_init_regs +ffffffff82b687a0 r sgpr2_init_regs +ffffffff82b68830 r sec_ded_counter_registers +ffffffff82b688a0 r iceland_mgcg_cgcg_init +ffffffff82b68ba0 r golden_settings_iceland_a11 +ffffffff82b68c60 r iceland_golden_common_all +ffffffff82b68cc0 r fiji_mgcg_cgcg_init +ffffffff82b68e70 r golden_settings_fiji_a10 +ffffffff82b68f00 r fiji_golden_common_all +ffffffff82b68f80 r tonga_mgcg_cgcg_init +ffffffff82b69310 r golden_settings_tonga_a11 +ffffffff82b693d0 r tonga_golden_common_all +ffffffff82b69430 r golden_settings_vegam_a11 +ffffffff82b69500 r vegam_golden_common_all +ffffffff82b69550 r golden_settings_polaris11_a11 +ffffffff82b69620 r polaris11_golden_common_all +ffffffff82b69670 r golden_settings_polaris10_a11 +ffffffff82b69740 r polaris10_golden_common_all +ffffffff82b697a0 r cz_mgcg_cgcg_init +ffffffff82b69b30 r cz_golden_settings_a11 +ffffffff82b69bc0 r cz_golden_common_all +ffffffff82b69c20 r stoney_mgcg_cgcg_init +ffffffff82b69c60 r stoney_golden_settings_a11 +ffffffff82b69ce0 r stoney_golden_common_all +ffffffff82b6a000 R gfx_v9_0_ras_ops +ffffffff82b6a040 r gfx_v9_0_ip_funcs +ffffffff82b6a0e0 R gfx_v9_0_ip_block +ffffffff82b6a100 r ras_gfx_subblocks +ffffffff82b6ab80 r gfx_v9_0_edc_counter_regs +ffffffff82b6af20 r gfx_v9_0_ras_fields +ffffffff82b6c000 r gfx_v9_0_gfx_funcs +ffffffff82b6c060 r gfx_v9_0_kiq_pm4_funcs +ffffffff82b6c0a0 r gfx_v9_0_ring_funcs_kiq +ffffffff82b6c1e0 r gfx_v9_0_ring_funcs_gfx +ffffffff82b6c320 r gfx_v9_0_sw_ring_funcs_gfx +ffffffff82b6c460 r gfx_v9_0_ring_funcs_compute +ffffffff82b6c5a0 r gfx_v9_0_eop_irq_funcs +ffffffff82b6c5b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82b6c5c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82b6c5d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82b6c5e0 r gfx_v9_0_rlc_funcs +ffffffff82b6c650 r gfx9_cs_data +ffffffff82b6c670 r gfx9_SECT_CONTEXT_defs +ffffffff82b6c700 r gfx9_SECT_CONTEXT_def_1 +ffffffff82b6ca50 r gfx9_SECT_CONTEXT_def_3 +ffffffff82b6ca60 r gfx9_SECT_CONTEXT_def_4 +ffffffff82b6ccd4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82b6ccdc r gfx9_SECT_CONTEXT_def_6 +ffffffff82b6cce0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82b6cdf0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82b6d260 r gfx9_SECT_CONTEXT_def_8 +ffffffff82b6d4d0 r vgpr_init_compute_shader_arcturus +ffffffff82b6dd60 r vgpr_init_regs_arcturus +ffffffff82b6def0 r vgpr_init_regs +ffffffff82b6e080 r sgpr1_init_regs +ffffffff82b6e210 r sgpr2_init_regs +ffffffff82b6e3a0 r golden_settings_gc_9_0 +ffffffff82b6e580 r golden_settings_gc_9_0_vg10 +ffffffff82b6e730 r golden_settings_gc_9_2_1 +ffffffff82b6e8b0 r golden_settings_gc_9_2_1_vg12 +ffffffff82b6e9f0 r golden_settings_gc_9_0_vg20 +ffffffff82b6eb00 r golden_settings_gc_9_4_1_arct +ffffffff82b6ec10 r golden_settings_gc_9_1 +ffffffff82b6ee50 r golden_settings_gc_9_1_rv2 +ffffffff82b6f020 r golden_settings_gc_9_1_rv1 +ffffffff82b6f0d0 r golden_settings_gc_9_1_rn +ffffffff82b6f1f0 r golden_settings_gc_9_x_common +ffffffff82b70000 R gfx_v9_4_ras_ops +ffffffff82b70040 r gfx_v9_4_edc_counter_regs +ffffffff82b70420 r gfx_v9_4_ras_fields +ffffffff82b72000 R vgpr_init_regs_aldebaran +ffffffff82b721b0 R sgpr112_init_regs_aldebaran +ffffffff82b72360 R sgpr96_init_regs_aldebaran +ffffffff82b72510 R sgpr64_init_regs_aldebaran +ffffffff82b726c0 r golden_settings_gc_9_4_2_alde +ffffffff82b72720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82b727b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82b72840 r sgpr112_init_compute_shader_aldebaran +ffffffff82b72a60 r sgpr96_init_compute_shader_aldebaran +ffffffff82b72c50 r sgpr64_init_compute_shader_aldebaran +ffffffff82b72dc0 r vgpr_init_compute_shader_aldebaran +ffffffff82b736a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82b73a20 r gfx_v9_4_2_ras_fields +ffffffff82b753c0 r gfx_v9_4_2_utc_blocks +ffffffff82b76000 r gfx_v9_4_3_ip_funcs +ffffffff82b760a0 R gfx_v9_4_3_ip_block +ffffffff82b760b8 r gfx_v9_4_3_kiq_pm4_funcs +ffffffff82b760f8 r gfx_v9_4_3_ring_funcs_kiq +ffffffff82b76238 r gfx_v9_4_3_ring_funcs_compute +ffffffff82b76378 r gfx_v9_4_3_eop_irq_funcs +ffffffff82b76388 r gfx_v9_4_3_priv_reg_irq_funcs +ffffffff82b76398 r gfx_v9_4_3_priv_inst_irq_funcs +ffffffff82b763a8 r gfx_v9_4_3_rlc_funcs +ffffffff82b76410 r gfx_v9_4_3_gfx_funcs +ffffffff82b76470 r gfx_v9_4_3_ce_reg_list +ffffffff82b76800 r gfx_v9_4_3_ras_mem_list_array +ffffffff82b76960 r gfx_v9_4_3_ue_reg_list +ffffffff82b76d20 r gfx_v9_4_3_ras_cp_mem_list +ffffffff82b76d70 r gfx_v9_4_3_ras_gcea_mem_list +ffffffff82b76eb0 r gfx_v9_4_3_ras_gc_cane_mem_list +ffffffff82b76ec0 r gfx_v9_4_3_ras_gcutcl2_mem_list +ffffffff82b76ed0 r gfx_v9_4_3_ras_gds_mem_list +ffffffff82b76ee0 r gfx_v9_4_3_ras_lds_mem_list +ffffffff82b77100 r gfx_v9_4_3_ras_rlc_mem_list +ffffffff82b77180 r gfx_v9_4_3_ras_sp_mem_list +ffffffff82b77190 r gfx_v9_4_3_ras_spi_mem_list +ffffffff82b771d0 r gfx_v9_4_3_ras_sqc_mem_list +ffffffff82b77340 r gfx_v9_4_3_ras_sq_mem_list +ffffffff82b77380 r gfx_v9_4_3_ras_ta_mem_list +ffffffff82b773d0 r gfx_v9_4_3_ras_tcc_mem_list +ffffffff82b773e0 r gfx_v9_4_3_ras_tca_mem_list +ffffffff82b773f0 r gfx_v9_4_3_ras_tci_mem_list +ffffffff82b77400 r gfx_v9_4_3_ras_tcp_mem_list +ffffffff82b77590 r gfx_v9_4_3_ras_td_mem_list +ffffffff82b775c0 r gfx_v9_4_3_ras_tcx_mem_list +ffffffff82b77b40 r gfx_v9_4_3_ras_atc_l2_mem_list +ffffffff82b77b50 r gfx_v9_4_3_ras_utcl2_mem_list +ffffffff82b77b60 r gfx_v9_4_3_ras_vml2_mem_list +ffffffff82b77b70 r gfx_v9_4_3_ras_vml2_walker_mem_list +ffffffff82b78000 R gfxhub_v1_0_funcs +ffffffff82b79000 R gfxhub_v1_2_funcs +ffffffff82b7a000 R gfxhub_v2_0_funcs +ffffffff82b7a060 r gfxhub_v2_0_vmhub_funcs ffffffff82b7a070 r gfxhub_client_ids -ffffffff82b7b000 R gfxhub_v3_0_funcs -ffffffff82b7b060 r gfxhub_v3_0_vmhub_funcs +ffffffff82b7b000 R gfxhub_v2_1_funcs +ffffffff82b7b060 r gfxhub_v2_1_vmhub_funcs ffffffff82b7b070 r gfxhub_client_ids -ffffffff82b7c000 R gfxhub_v3_0_3_funcs -ffffffff82b7c060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82b7c000 R gfxhub_v3_0_funcs +ffffffff82b7c060 r gfxhub_v3_0_vmhub_funcs ffffffff82b7c070 r gfxhub_client_ids -ffffffff82b7d000 R gmc_v10_0_ip_funcs -ffffffff82b7d0a0 R gmc_v10_0_ip_block -ffffffff82b7d0b8 r gmc_v10_0_gmc_funcs -ffffffff82b7d110 r gmc_v10_0_irq_funcs -ffffffff82b7d120 r gmc_v10_0_ecc_funcs -ffffffff82b7e000 R gmc_v11_0_ip_funcs -ffffffff82b7e0a0 R gmc_v11_0_ip_block -ffffffff82b7e0b8 r gmc_v11_0_gmc_funcs -ffffffff82b7e110 r gmc_v11_0_irq_funcs -ffffffff82b7e120 r gmc_v11_0_ecc_funcs -ffffffff82b7f000 r gmc_v7_0_ip_funcs -ffffffff82b7f0a0 R gmc_v7_0_ip_block -ffffffff82b7f0b8 R gmc_v7_4_ip_block -ffffffff82b7f0d0 r gmc_v7_0_gmc_funcs -ffffffff82b7f128 r gmc_v7_0_irq_funcs -ffffffff82b7f138 r iceland_mgcg_cgcg_init -ffffffff82b7f150 r golden_settings_iceland_a11 -ffffffff82b7f180 r mc_cg_registers -ffffffff82b7f1b0 r mc_cg_en -ffffffff82b7f1e0 r mc_cg_ls_en -ffffffff82b80000 r gmc_v8_0_ip_funcs -ffffffff82b800a0 R gmc_v8_0_ip_block -ffffffff82b800b8 R gmc_v8_1_ip_block -ffffffff82b800d0 R gmc_v8_5_ip_block -ffffffff82b800e8 r gmc_v8_0_gmc_funcs -ffffffff82b80140 r gmc_v8_0_irq_funcs -ffffffff82b80150 r fiji_mgcg_cgcg_init -ffffffff82b80160 r golden_settings_fiji_a10 -ffffffff82b80190 r tonga_mgcg_cgcg_init -ffffffff82b801a0 r golden_settings_tonga_a11 -ffffffff82b80200 r golden_settings_polaris11_a11 -ffffffff82b80230 r golden_settings_polaris10_a11 -ffffffff82b8026c r cz_mgcg_cgcg_init -ffffffff82b80280 r stoney_mgcg_cgcg_init -ffffffff82b802a0 r golden_settings_stoney_common -ffffffff82b81000 R gmc_v9_0_ip_funcs -ffffffff82b810a0 R gmc_v9_0_ip_block -ffffffff82b810b8 r gmc_v9_0_gmc_funcs -ffffffff82b81110 r gmc_v9_0_irq_funcs -ffffffff82b81120 r gmc_v9_0_ecc_funcs -ffffffff82b81130 r gfxhub_client_ids -ffffffff82b811a0 r mmhub_client_ids_vega10 -ffffffff82b81490 r mmhub_client_ids_vega12 -ffffffff82b81790 r mmhub_client_ids_vega20 -ffffffff82b81a80 r mmhub_client_ids_arcturus -ffffffff82b83290 r mmhub_client_ids_raven -ffffffff82b83450 r mmhub_client_ids_renoir -ffffffff82b83640 r mmhub_client_ids_aldebaran -ffffffff82b84e50 r ecc_umc_mcumc_ctrl_addrs -ffffffff82b84ed0 r ecc_umc_mcumc_ctrl_mask_addrs -ffffffff82b84f50 r golden_settings_mmhub_1_0_0 -ffffffff82b84f80 r golden_settings_athub_1_0_0 -ffffffff82b85000 R hdp_v4_0_funcs -ffffffff82b86000 R hdp_v5_0_funcs -ffffffff82b87000 R hdp_v5_2_funcs -ffffffff82b88000 R hdp_v6_0_funcs -ffffffff82b89000 r iceland_ih_ip_funcs -ffffffff82b890a0 R iceland_ih_ip_block -ffffffff82b890b8 r iceland_ih_funcs -ffffffff82b8a000 r ih_v6_0_ip_funcs -ffffffff82b8a0a0 R ih_v6_0_ip_block -ffffffff82b8a0b8 r ih_v6_0_funcs -ffffffff82b8a0d8 r ih_v6_0_self_irq_funcs -ffffffff82b8b000 r ih_v6_1_ip_funcs -ffffffff82b8b0a0 R ih_v6_1_ip_block -ffffffff82b8b0b8 r ih_v6_1_funcs -ffffffff82b8b0d8 r ih_v6_1_self_irq_funcs -ffffffff82b8c000 R gfx_v11_0_imu_funcs -ffffffff82b8c030 r imu_rlc_ram_golden_11 -ffffffff82b8c680 r imu_rlc_ram_golden_11_0_2 -ffffffff82b8d000 r imu_rlc_ram_golden_11_0_3 -ffffffff82b8e000 r jpeg_v1_0_decode_ring_vm_funcs -ffffffff82b8e140 r jpeg_v1_0_irq_funcs -ffffffff82b8f000 r jpeg_v2_0_ip_funcs -ffffffff82b8f0a0 R jpeg_v2_0_ip_block -ffffffff82b8f0b8 r jpeg_v2_0_dec_ring_vm_funcs -ffffffff82b8f1f8 r jpeg_v2_0_irq_funcs -ffffffff82b90000 r jpeg_v2_5_ip_funcs -ffffffff82b900a0 R jpeg_v2_5_ip_block -ffffffff82b900b8 r jpeg_v2_6_ip_funcs -ffffffff82b90158 R jpeg_v2_6_ip_block -ffffffff82b90170 R jpeg_v2_6_ras_hw_ops -ffffffff82b901b0 r jpeg_v2_5_dec_ring_vm_funcs -ffffffff82b902f0 r jpeg_v2_6_dec_ring_vm_funcs -ffffffff82b90430 r jpeg_v2_5_irq_funcs -ffffffff82b90440 r jpeg_v2_6_ras_irq_funcs -ffffffff82b91000 r jpeg_v3_0_ip_funcs -ffffffff82b910a0 R jpeg_v3_0_ip_block -ffffffff82b910b8 r jpeg_v3_0_dec_ring_vm_funcs -ffffffff82b911f8 r jpeg_v3_0_irq_funcs -ffffffff82b92000 r jpeg_v4_0_ip_funcs -ffffffff82b920a0 R jpeg_v4_0_ip_block -ffffffff82b920b8 R jpeg_v4_0_ras_hw_ops -ffffffff82b920f8 r jpeg_v4_0_dec_ring_vm_funcs -ffffffff82b92238 r jpeg_v4_0_irq_funcs -ffffffff82b92248 r jpeg_v4_0_ras_irq_funcs -ffffffff82b93000 r jpeg_v4_0_3_ip_funcs -ffffffff82b930a0 R jpeg_v4_0_3_ip_block -ffffffff82b930b8 r jpeg_v4_0_3_dec_ring_vm_funcs -ffffffff82b931f8 r jpeg_v4_0_3_irq_funcs -ffffffff82b93208 r jpeg_v4_0_3_ras_hw_ops -ffffffff82b93250 r jpeg_v4_0_3_ue_reg_list -ffffffff82b94000 R lsdma_v6_0_funcs -ffffffff82b95000 r mca_v3_0_mp0_hw_ops -ffffffff82b95040 r mca_v3_0_mp1_hw_ops -ffffffff82b95080 r mca_v3_0_mpio_hw_ops -ffffffff82b96000 r mes_v10_1_ip_funcs -ffffffff82b960a0 R mes_v10_1_ip_block -ffffffff82b960b8 r mes_v10_1_funcs -ffffffff82b960e8 r mes_v10_1_ring_funcs -ffffffff82b97000 r mes_v11_0_ip_funcs -ffffffff82b970a0 R mes_v11_0_ip_block -ffffffff82b970b8 r mes_v11_0_funcs -ffffffff82b970e8 r mes_v11_0_ring_funcs -ffffffff82b98000 R mmhub_v1_0_funcs -ffffffff82b98050 r mmhub_v1_0_edc_cnt_regs -ffffffff82b980c0 r mmhub_v1_0_ras_fields -ffffffff82b99000 R mmhub_v1_7_funcs -ffffffff82b99050 r mmhub_v1_7_edc_cnt_regs -ffffffff82b99250 r mmhub_v1_7_ras_fields -ffffffff82b9a9c0 r mmhub_v1_7_ea_err_status_regs -ffffffff82b9b000 R mmhub_v1_8_funcs -ffffffff82b9b050 r mmhub_v1_8_ras_hw_ops -ffffffff82b9b090 r mmhub_v1_8_ce_reg_list -ffffffff82b9b180 r mmhub_v1_8_ras_memory_list -ffffffff82b9b2b0 r mmhub_v1_8_ue_reg_list -ffffffff82b9c000 R mmhub_v2_0_funcs -ffffffff82b9c050 r mmhub_v2_0_vmhub_funcs -ffffffff82b9c060 r mmhub_client_ids_navi1x -ffffffff82b9c190 r mmhub_client_ids_sienna_cichlid -ffffffff82b9c450 r mmhub_client_ids_beige_goby -ffffffff82b9d000 R mmhub_v2_3_funcs -ffffffff82b9d050 r mmhub_v2_3_vmhub_funcs -ffffffff82b9d060 r mmhub_client_ids_vangogh -ffffffff82b9e000 R mmhub_v3_0_funcs -ffffffff82b9e050 r mmhub_v3_0_vmhub_funcs -ffffffff82b9e060 r mmhub_client_ids_v3_0_0 -ffffffff82b9f000 R mmhub_v3_0_1_funcs -ffffffff82b9f050 r mmhub_v3_0_1_vmhub_funcs -ffffffff82b9f060 r mmhub_client_ids_v3_0_1 -ffffffff82ba0000 R mmhub_v3_0_2_funcs -ffffffff82ba0050 r mmhub_v3_0_2_vmhub_funcs -ffffffff82ba0060 r mmhub_client_ids_v3_0_2 -ffffffff82ba1000 R mmhub_v9_4_ras_hw_ops -ffffffff82ba1040 R mmhub_v9_4_funcs -ffffffff82ba1090 r mmhub_v9_4_edc_cnt_regs -ffffffff82ba1330 r mmhub_v9_4_ras_fields -ffffffff82ba33b0 r mmhub_v9_4_err_status_regs -ffffffff82ba4000 r xgpu_ai_mailbox_ack_irq_funcs -ffffffff82ba4010 r xgpu_ai_mailbox_rcv_irq_funcs -ffffffff82ba4020 R xgpu_ai_virt_ops -ffffffff82ba5000 r xgpu_nv_mailbox_ack_irq_funcs -ffffffff82ba5010 r xgpu_nv_mailbox_rcv_irq_funcs -ffffffff82ba5020 R xgpu_nv_virt_ops -ffffffff82ba6000 r xgpu_fiji_mgcg_cgcg_init -ffffffff82ba6240 r xgpu_fiji_golden_settings_a10 -ffffffff82ba6370 r xgpu_fiji_golden_common_all -ffffffff82ba63f0 r xgpu_tonga_mgcg_cgcg_init -ffffffff82ba6810 r xgpu_tonga_golden_settings_a11 -ffffffff82ba69d0 r xgpu_tonga_golden_common_all -ffffffff82ba6a28 r xgpu_vi_mailbox_ack_irq_funcs -ffffffff82ba6a38 r xgpu_vi_mailbox_rcv_irq_funcs -ffffffff82ba6a48 R xgpu_vi_virt_ops -ffffffff82ba7000 r navi10_ih_ip_funcs -ffffffff82ba70a0 R navi10_ih_ip_block -ffffffff82ba70b8 r navi10_ih_funcs -ffffffff82ba70d8 r navi10_ih_self_irq_funcs -ffffffff82ba8000 R nbio_v2_3_hdp_flush_reg -ffffffff82ba8048 R nbio_v2_3_funcs -ffffffff82ba9000 R nbio_v4_3_hdp_flush_reg -ffffffff82ba9048 R nbio_v4_3_funcs -ffffffff82ba9158 R nbio_v4_3_sriov_funcs -ffffffff82ba9268 r nbio_v4_3_ras_err_event_athub_irq_funcs -ffffffff82baa000 R nbio_v6_1_hdp_flush_reg -ffffffff82baa048 R nbio_v6_1_funcs -ffffffff82bab000 R nbio_v7_0_hdp_flush_reg -ffffffff82bab048 R nbio_v7_0_funcs -ffffffff82bac000 R nbio_v7_2_hdp_flush_reg -ffffffff82bac048 R nbio_v7_2_funcs -ffffffff82bad000 R nbio_v7_4_hdp_flush_reg -ffffffff82bad048 R nbio_v7_4_ras_hw_ops -ffffffff82bad088 R nbio_v7_4_funcs -ffffffff82bad198 r nbio_v7_4_ras_controller_irq_funcs -ffffffff82bad1a8 r nbio_v7_4_ras_err_event_athub_irq_funcs -ffffffff82bae000 R nbio_v7_7_hdp_flush_reg -ffffffff82bae048 R nbio_v7_7_funcs -ffffffff82baf000 R nbio_v7_9_hdp_flush_reg -ffffffff82baf048 R nbio_v7_9_funcs -ffffffff82baf158 R nbio_v7_9_ras_hw_ops -ffffffff82baf198 r nbio_v7_9_ras_controller_irq_funcs -ffffffff82baf1a8 r nbio_v7_9_ras_err_event_athub_irq_funcs -ffffffff82bb0000 r nv_common_ip_funcs -ffffffff82bb00a0 R nv_common_ip_block -ffffffff82bb00b8 r nv_asic_funcs -ffffffff82bb0180 r nv_allowed_read_registers -ffffffff82bb0300 r sc_video_codecs_encode -ffffffff82bb0310 r sc_video_codecs_decode_vcn1 -ffffffff82bb0320 r sc_video_codecs_decode_vcn0 -ffffffff82bb0330 r yc_video_codecs_decode -ffffffff82bb0340 r bg_video_codecs_encode -ffffffff82bb0350 r bg_video_codecs_decode -ffffffff82bb0360 r nv_video_codecs_encode -ffffffff82bb0370 r nv_video_codecs_decode -ffffffff82bb0380 r sc_video_codecs_encode_array -ffffffff82bb03b0 r sc_video_codecs_decode_array_vcn1 -ffffffff82bb0440 r sc_video_codecs_decode_array_vcn0 -ffffffff82bb04e0 r yc_video_codecs_decode_array -ffffffff82bb0550 r bg_video_codecs_decode_array -ffffffff82bb0590 r nv_video_codecs_encode_array -ffffffff82bb05c0 r nv_video_codecs_decode_array -ffffffff82bb1000 r psp_v10_0_funcs -ffffffff82bb2000 r psp_v11_0_funcs -ffffffff82bb3000 r psp_v11_0_8_funcs -ffffffff82bb4000 r psp_v12_0_funcs -ffffffff82bb5000 r psp_v13_0_funcs -ffffffff82bb6000 r psp_v13_0_4_funcs -ffffffff82bb7000 r psp_v3_1_funcs -ffffffff82bb8000 r sdma_v2_4_ip_funcs -ffffffff82bb80a0 R sdma_v2_4_ip_block -ffffffff82bb80b8 r sdma_v2_4_ring_funcs -ffffffff82bb81f8 r sdma_v2_4_buffer_funcs -ffffffff82bb8218 r sdma_v2_4_vm_pte_funcs -ffffffff82bb8238 r sdma_v2_4_trap_irq_funcs -ffffffff82bb8248 r sdma_v2_4_illegal_inst_irq_funcs -ffffffff82bb8260 r iceland_mgcg_cgcg_init -ffffffff82bb8280 r golden_settings_iceland_a11 -ffffffff82bb9000 r sdma_v3_0_ip_funcs -ffffffff82bb90a0 R sdma_v3_0_ip_block -ffffffff82bb90b8 R sdma_v3_1_ip_block -ffffffff82bb90d0 r sdma_v3_0_ring_funcs -ffffffff82bb9210 r sdma_v3_0_buffer_funcs -ffffffff82bb9230 r sdma_v3_0_vm_pte_funcs -ffffffff82bb9250 r sdma_v3_0_trap_irq_funcs -ffffffff82bb9260 r sdma_v3_0_illegal_inst_irq_funcs -ffffffff82bb9270 r fiji_mgcg_cgcg_init -ffffffff82bb9290 r golden_settings_fiji_a10 -ffffffff82bb92f0 r tonga_mgcg_cgcg_init -ffffffff82bb9310 r golden_settings_tonga_a11 -ffffffff82bb9390 r golden_settings_polaris11_a11 -ffffffff82bb9410 r golden_settings_polaris10_a11 -ffffffff82bb9490 r cz_mgcg_cgcg_init -ffffffff82bb94b0 r cz_golden_settings_a11 -ffffffff82bb9540 r stoney_mgcg_cgcg_init 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sdma_v5_2_trap_irq_funcs -ffffffff82bbf248 r sdma_v5_2_illegal_inst_irq_funcs -ffffffff82bc0000 R sdma_v6_0_ip_funcs -ffffffff82bc00a0 R sdma_v6_0_ip_block -ffffffff82bc00b8 r sdma_v6_0_ring_funcs -ffffffff82bc01f8 r sdma_v6_0_buffer_funcs -ffffffff82bc0218 r sdma_v6_0_vm_pte_funcs -ffffffff82bc0238 r sdma_v6_0_trap_irq_funcs -ffffffff82bc0248 r sdma_v6_0_illegal_inst_irq_funcs -ffffffff82bc1000 r smu_v11_0_i2c_algo -ffffffff82bc1010 r smu_v11_0_i2c_i2c_lock_ops -ffffffff82bc1028 r smu_v11_0_i2c_control_quirks -ffffffff82bc2000 R smuio_v11_0_funcs -ffffffff82bc3000 R smuio_v11_0_6_funcs -ffffffff82bc4000 R smuio_v13_0_funcs -ffffffff82bc5000 R smuio_v13_0_3_funcs -ffffffff82bc6000 R smuio_v13_0_6_funcs -ffffffff82bc7000 R smuio_v9_0_funcs -ffffffff82bc8000 r soc15_common_ip_funcs -ffffffff82bc80a0 R vega10_common_ip_block -ffffffff82bc80b8 r soc15_asic_funcs -ffffffff82bc8178 r vega20_asic_funcs -ffffffff82bc8238 r aqua_vanjaram_asic_funcs -ffffffff82bc8300 r soc15_allowed_read_registers -ffffffff82bc8490 r vega_video_codecs_encode -ffffffff82bc84a0 r vega_video_codecs_decode -ffffffff82bc84b0 r rv_video_codecs_decode -ffffffff82bc84c0 r rn_video_codecs_decode -ffffffff82bc84d0 r vcn_4_0_3_video_codecs_encode -ffffffff82bc84e0 r vcn_4_0_3_video_codecs_decode -ffffffff82bc84f0 r vega_video_codecs_encode_array -ffffffff82bc8520 r vega_video_codecs_decode_array -ffffffff82bc85a0 r rv_video_codecs_decode_array -ffffffff82bc8630 r rn_video_codecs_decode_array -ffffffff82bc86c0 r vcn_4_0_3_video_codecs_decode_array -ffffffff82bc9000 r soc21_common_ip_funcs -ffffffff82bc90a0 R soc21_common_ip_block -ffffffff82bc90b8 r soc21_asic_funcs -ffffffff82bc9180 r soc21_allowed_read_registers -ffffffff82bc9300 r vcn_4_0_0_video_codecs_encode_vcn1 -ffffffff82bc9310 r vcn_4_0_0_video_codecs_decode_vcn1 -ffffffff82bc9320 r vcn_4_0_0_video_codecs_encode_vcn0 -ffffffff82bc9330 r vcn_4_0_0_video_codecs_decode_vcn0 -ffffffff82bc9340 r vcn_4_0_0_video_codecs_encode_array_vcn1 -ffffffff82bc9370 r vcn_4_0_0_video_codecs_decode_array_vcn1 -ffffffff82bc93c0 r vcn_4_0_0_video_codecs_encode_array_vcn0 -ffffffff82bc9400 r vcn_4_0_0_video_codecs_decode_array_vcn0 -ffffffff82bca000 r tonga_ih_ip_funcs -ffffffff82bca0a0 R tonga_ih_ip_block -ffffffff82bca0b8 r tonga_ih_funcs -ffffffff82bcb000 R umc_v6_0_funcs -ffffffff82bcc000 R umc_v6_1_channel_idx_tbl -ffffffff82bcc080 R umc_v6_1_ras_hw_ops -ffffffff82bcd000 R umc_v6_7_channel_idx_tbl_second -ffffffff82bcd080 R umc_v6_7_channel_idx_tbl_first -ffffffff82bcd100 R umc_v6_7_ras_hw_ops -ffffffff82bce000 R umc_v8_10_channelnum_map_colbit_table -ffffffff82bce040 R umc_v8_10_channel_idx_tbl_ext0 -ffffffff82bce080 R umc_v8_10_channel_idx_tbl -ffffffff82bce0e0 R umc_v8_10_ras_hw_ops -ffffffff82bcf000 R umc_v8_7_channel_idx_tbl -ffffffff82bcf040 R umc_v8_7_ras_hw_ops -ffffffff82bd0000 r uvd_v5_0_ip_funcs -ffffffff82bd00a0 R uvd_v5_0_ip_block -ffffffff82bd00b8 r uvd_v5_0_ring_funcs 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vce_v4_0_irq_funcs -ffffffff82bd5000 r vcn_v1_0_ip_funcs -ffffffff82bd50a0 R vcn_v1_0_ip_block -ffffffff82bd50b8 r vcn_v1_0_dec_ring_vm_funcs -ffffffff82bd51f8 r vcn_v1_0_enc_ring_vm_funcs -ffffffff82bd5338 r vcn_v1_0_irq_funcs -ffffffff82bd6000 r vcn_v2_0_ip_funcs -ffffffff82bd60a0 R vcn_v2_0_ip_block -ffffffff82bd60b8 r vcn_v2_0_dec_ring_vm_funcs -ffffffff82bd61f8 r vcn_v2_0_enc_ring_vm_funcs -ffffffff82bd6338 r vcn_v2_0_irq_funcs -ffffffff82bd7000 r vcn_v2_5_ip_funcs -ffffffff82bd70a0 R vcn_v2_5_ip_block -ffffffff82bd70b8 r vcn_v2_6_ip_funcs -ffffffff82bd7158 R vcn_v2_6_ip_block -ffffffff82bd7170 R vcn_v2_6_ras_hw_ops -ffffffff82bd71b0 r vcn_v2_5_dec_ring_vm_funcs -ffffffff82bd72f0 r vcn_v2_5_enc_ring_vm_funcs -ffffffff82bd7430 r vcn_v2_5_irq_funcs -ffffffff82bd7440 r vcn_v2_6_ras_irq_funcs -ffffffff82bd8000 r vcn_v3_0_ip_funcs -ffffffff82bd80a0 R vcn_v3_0_ip_block -ffffffff82bd80b8 r vcn_v3_0_dec_ring_vm_funcs -ffffffff82bd81f8 r vcn_v3_0_enc_ring_vm_funcs -ffffffff82bd8338 r vcn_v3_0_irq_funcs -ffffffff82bd9000 r vcn_v4_0_ip_funcs -ffffffff82bd90a0 R vcn_v4_0_ip_block -ffffffff82bd90b8 R vcn_v4_0_ras_hw_ops -ffffffff82bd90f8 r vcn_v4_0_irq_funcs -ffffffff82bd9108 r vcn_v4_0_ras_irq_funcs -ffffffff82bda000 r vcn_v4_0_3_ip_funcs -ffffffff82bda0a0 R vcn_v4_0_3_ip_block -ffffffff82bda0b8 r vcn_v4_0_3_unified_ring_vm_funcs -ffffffff82bda1f8 r vcn_v4_0_3_irq_funcs -ffffffff82bda208 r vcn_v4_0_3_ras_hw_ops -ffffffff82bda250 r vcn_v4_0_3_ue_reg_list -ffffffff82bdb000 R vega10_ih_ip_funcs -ffffffff82bdb0a0 R vega10_ih_ip_block -ffffffff82bdb0b8 r vega10_ih_funcs -ffffffff82bdb0d8 r vega10_ih_self_irq_funcs -ffffffff82bdc000 r GC_BASE -ffffffff82bdc064 r HDP_BASE -ffffffff82bdc0c8 r MMHUB_BASE -ffffffff82bdc12c r ATHUB_BASE -ffffffff82bdc190 r NBIO_BASE -ffffffff82bdc1f4 r MP0_BASE -ffffffff82bdc258 r MP1_BASE -ffffffff82bdc2bc r VCE_BASE -ffffffff82bdc320 r VCN_BASE -ffffffff82bdc384 r DF_BASE -ffffffff82bdc3e8 r DCE_BASE -ffffffff82bdc44c r OSSSYS_BASE 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vi_common_ip_funcs -ffffffff82bdf0b8 r vi_asic_funcs -ffffffff82bdf180 r vi_allowed_read_registers -ffffffff82bdf3e0 r topaz_video_codecs_encode -ffffffff82bdf3f0 r topaz_video_codecs_decode -ffffffff82bdf400 r tonga_video_codecs_encode -ffffffff82bdf410 r tonga_video_codecs_decode -ffffffff82bdf420 r polaris_video_codecs_encode -ffffffff82bdf430 r cz_video_codecs_decode -ffffffff82bdf440 r tonga_video_codecs_encode_array -ffffffff82bdf460 r tonga_video_codecs_decode_array -ffffffff82bdf4b0 r polaris_video_codecs_encode_array -ffffffff82bdf4e0 r cz_video_codecs_decode_array -ffffffff82bdf560 r iceland_mgcg_cgcg_init -ffffffff82bdf5a0 r fiji_mgcg_cgcg_init -ffffffff82bdf600 r tonga_mgcg_cgcg_init -ffffffff82bdf660 r cz_mgcg_cgcg_init -ffffffff82bdf6a0 r stoney_mgcg_cgcg_init -ffffffff82be0000 r amdgpu_dm_funcs -ffffffff82be00a0 R dm_ip_block -ffffffff82be00b8 R amdgpu_dm_encoder_helper_funcs -ffffffff82be0120 r dm_display_funcs -ffffffff82be0180 r hpd_disconnect_quirk_table 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golden_settings_iceland_a11 +ffffffff82b80180 r mc_cg_registers +ffffffff82b801b0 r mc_cg_en +ffffffff82b801e0 r mc_cg_ls_en +ffffffff82b81000 r gmc_v8_0_ip_funcs +ffffffff82b810a0 R gmc_v8_0_ip_block +ffffffff82b810b8 R gmc_v8_1_ip_block +ffffffff82b810d0 R gmc_v8_5_ip_block +ffffffff82b810e8 r gmc_v8_0_gmc_funcs +ffffffff82b81140 r gmc_v8_0_irq_funcs +ffffffff82b81150 r fiji_mgcg_cgcg_init +ffffffff82b81160 r golden_settings_fiji_a10 +ffffffff82b81190 r tonga_mgcg_cgcg_init +ffffffff82b811a0 r golden_settings_tonga_a11 +ffffffff82b81200 r golden_settings_polaris11_a11 +ffffffff82b81230 r golden_settings_polaris10_a11 +ffffffff82b8126c r cz_mgcg_cgcg_init +ffffffff82b81280 r stoney_mgcg_cgcg_init +ffffffff82b812a0 r golden_settings_stoney_common +ffffffff82b82000 R gmc_v9_0_ip_funcs +ffffffff82b820a0 R gmc_v9_0_ip_block +ffffffff82b820b8 r gmc_v9_0_gmc_funcs +ffffffff82b82110 r gmc_v9_0_irq_funcs +ffffffff82b82120 r gmc_v9_0_ecc_funcs +ffffffff82b82130 r gfxhub_client_ids +ffffffff82b821a0 r mmhub_client_ids_vega10 +ffffffff82b82490 r mmhub_client_ids_vega12 +ffffffff82b82790 r mmhub_client_ids_vega20 +ffffffff82b82a80 r mmhub_client_ids_arcturus +ffffffff82b84290 r mmhub_client_ids_raven +ffffffff82b84450 r mmhub_client_ids_renoir +ffffffff82b84640 r mmhub_client_ids_aldebaran +ffffffff82b85e50 r ecc_umc_mcumc_ctrl_addrs +ffffffff82b85ed0 r ecc_umc_mcumc_ctrl_mask_addrs +ffffffff82b85f50 r golden_settings_mmhub_1_0_0 +ffffffff82b85f80 r golden_settings_athub_1_0_0 +ffffffff82b86000 R hdp_v4_0_funcs +ffffffff82b87000 R hdp_v5_0_funcs +ffffffff82b88000 R hdp_v5_2_funcs +ffffffff82b89000 R hdp_v6_0_funcs +ffffffff82b8a000 r iceland_ih_ip_funcs +ffffffff82b8a0a0 R iceland_ih_ip_block +ffffffff82b8a0b8 r iceland_ih_funcs +ffffffff82b8b000 r ih_v6_0_ip_funcs +ffffffff82b8b0a0 R ih_v6_0_ip_block +ffffffff82b8b0b8 r ih_v6_0_funcs +ffffffff82b8b0d8 r ih_v6_0_self_irq_funcs +ffffffff82b8c000 r ih_v6_1_ip_funcs +ffffffff82b8c0a0 R ih_v6_1_ip_block +ffffffff82b8c0b8 r ih_v6_1_funcs +ffffffff82b8c0d8 r ih_v6_1_self_irq_funcs +ffffffff82b8d000 R gfx_v11_0_imu_funcs +ffffffff82b8d030 r imu_rlc_ram_golden_11 +ffffffff82b8d680 r imu_rlc_ram_golden_11_0_2 +ffffffff82b8e000 r imu_rlc_ram_golden_11_0_3 +ffffffff82b8f000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82b8f140 r jpeg_v1_0_irq_funcs +ffffffff82b90000 r jpeg_v2_0_ip_funcs +ffffffff82b900a0 R jpeg_v2_0_ip_block +ffffffff82b900b8 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82b901f8 r jpeg_v2_0_irq_funcs +ffffffff82b91000 r jpeg_v2_5_ip_funcs +ffffffff82b910a0 R jpeg_v2_5_ip_block +ffffffff82b910b8 r jpeg_v2_6_ip_funcs +ffffffff82b91158 R jpeg_v2_6_ip_block +ffffffff82b91170 R jpeg_v2_6_ras_hw_ops +ffffffff82b911b0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82b912f0 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82b91430 r jpeg_v2_5_irq_funcs +ffffffff82b91440 r jpeg_v2_6_ras_irq_funcs +ffffffff82b92000 r jpeg_v3_0_ip_funcs +ffffffff82b920a0 R jpeg_v3_0_ip_block +ffffffff82b920b8 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82b921f8 r jpeg_v3_0_irq_funcs +ffffffff82b93000 r jpeg_v4_0_ip_funcs +ffffffff82b930a0 R jpeg_v4_0_ip_block +ffffffff82b930b8 R jpeg_v4_0_ras_hw_ops +ffffffff82b930f8 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82b93238 r jpeg_v4_0_irq_funcs +ffffffff82b93248 r jpeg_v4_0_ras_irq_funcs +ffffffff82b94000 r jpeg_v4_0_3_ip_funcs +ffffffff82b940a0 R jpeg_v4_0_3_ip_block +ffffffff82b940b8 r jpeg_v4_0_3_dec_ring_vm_funcs +ffffffff82b941f8 r jpeg_v4_0_3_irq_funcs +ffffffff82b94208 r jpeg_v4_0_3_ras_hw_ops +ffffffff82b94250 r jpeg_v4_0_3_ue_reg_list +ffffffff82b95000 R lsdma_v6_0_funcs +ffffffff82b96000 r mca_v3_0_mp0_hw_ops +ffffffff82b96040 r mca_v3_0_mp1_hw_ops +ffffffff82b96080 r mca_v3_0_mpio_hw_ops +ffffffff82b97000 r mes_v10_1_ip_funcs +ffffffff82b970a0 R mes_v10_1_ip_block +ffffffff82b970b8 r mes_v10_1_funcs +ffffffff82b970e8 r mes_v10_1_ring_funcs +ffffffff82b98000 r mes_v11_0_ip_funcs +ffffffff82b980a0 R mes_v11_0_ip_block +ffffffff82b980b8 r mes_v11_0_funcs +ffffffff82b980e8 r mes_v11_0_ring_funcs +ffffffff82b99000 R mmhub_v1_0_funcs +ffffffff82b99050 r mmhub_v1_0_edc_cnt_regs +ffffffff82b990c0 r mmhub_v1_0_ras_fields +ffffffff82b9a000 R mmhub_v1_7_funcs +ffffffff82b9a050 r mmhub_v1_7_edc_cnt_regs +ffffffff82b9a250 r mmhub_v1_7_ras_fields +ffffffff82b9b9c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82b9c000 R mmhub_v1_8_funcs +ffffffff82b9c050 r mmhub_v1_8_ras_hw_ops +ffffffff82b9c090 r mmhub_v1_8_ce_reg_list +ffffffff82b9c180 r mmhub_v1_8_ras_memory_list +ffffffff82b9c2b0 r mmhub_v1_8_ue_reg_list +ffffffff82b9d000 R mmhub_v2_0_funcs +ffffffff82b9d050 r mmhub_v2_0_vmhub_funcs +ffffffff82b9d060 r mmhub_client_ids_navi1x +ffffffff82b9d190 r mmhub_client_ids_sienna_cichlid +ffffffff82b9d450 r mmhub_client_ids_beige_goby +ffffffff82b9e000 R mmhub_v2_3_funcs +ffffffff82b9e050 r mmhub_v2_3_vmhub_funcs +ffffffff82b9e060 r mmhub_client_ids_vangogh +ffffffff82b9f000 R mmhub_v3_0_funcs +ffffffff82b9f050 r mmhub_v3_0_vmhub_funcs +ffffffff82b9f060 r mmhub_client_ids_v3_0_0 +ffffffff82ba0000 R mmhub_v3_0_1_funcs +ffffffff82ba0050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82ba0060 r mmhub_client_ids_v3_0_1 +ffffffff82ba1000 R mmhub_v3_0_2_funcs +ffffffff82ba1050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82ba1060 r mmhub_client_ids_v3_0_2 +ffffffff82ba2000 R mmhub_v9_4_ras_hw_ops +ffffffff82ba2040 R mmhub_v9_4_funcs +ffffffff82ba2090 r mmhub_v9_4_edc_cnt_regs +ffffffff82ba2330 r mmhub_v9_4_ras_fields +ffffffff82ba43b0 r mmhub_v9_4_err_status_regs +ffffffff82ba5000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82ba5010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82ba5020 R xgpu_ai_virt_ops +ffffffff82ba6000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82ba6010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82ba6020 R xgpu_nv_virt_ops +ffffffff82ba7000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82ba7240 r xgpu_fiji_golden_settings_a10 +ffffffff82ba7370 r xgpu_fiji_golden_common_all +ffffffff82ba73f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82ba7810 r xgpu_tonga_golden_settings_a11 +ffffffff82ba79d0 r xgpu_tonga_golden_common_all +ffffffff82ba7a28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82ba7a38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82ba7a48 R xgpu_vi_virt_ops +ffffffff82ba8000 r navi10_ih_ip_funcs +ffffffff82ba80a0 R navi10_ih_ip_block +ffffffff82ba80b8 r navi10_ih_funcs +ffffffff82ba80d8 r navi10_ih_self_irq_funcs +ffffffff82ba9000 R nbio_v2_3_hdp_flush_reg +ffffffff82ba9048 R nbio_v2_3_funcs +ffffffff82baa000 R nbio_v4_3_hdp_flush_reg +ffffffff82baa048 R nbio_v4_3_funcs +ffffffff82baa158 R nbio_v4_3_sriov_funcs +ffffffff82baa268 r nbio_v4_3_ras_err_event_athub_irq_funcs +ffffffff82bab000 R nbio_v6_1_hdp_flush_reg +ffffffff82bab048 R nbio_v6_1_funcs +ffffffff82bac000 R nbio_v7_0_hdp_flush_reg +ffffffff82bac048 R nbio_v7_0_funcs +ffffffff82bad000 R nbio_v7_2_hdp_flush_reg +ffffffff82bad048 R nbio_v7_2_funcs +ffffffff82bae000 R nbio_v7_4_hdp_flush_reg +ffffffff82bae048 R nbio_v7_4_ras_hw_ops +ffffffff82bae088 R nbio_v7_4_funcs +ffffffff82bae198 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82bae1a8 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82baf000 R nbio_v7_7_hdp_flush_reg +ffffffff82baf048 R nbio_v7_7_funcs +ffffffff82bb0000 R nbio_v7_9_hdp_flush_reg +ffffffff82bb0048 R nbio_v7_9_funcs +ffffffff82bb0158 R nbio_v7_9_ras_hw_ops +ffffffff82bb0198 r nbio_v7_9_ras_controller_irq_funcs +ffffffff82bb01a8 r nbio_v7_9_ras_err_event_athub_irq_funcs +ffffffff82bb1000 r nv_common_ip_funcs +ffffffff82bb10a0 R nv_common_ip_block +ffffffff82bb10b8 r nv_asic_funcs +ffffffff82bb1180 r nv_allowed_read_registers +ffffffff82bb1300 r sc_video_codecs_encode +ffffffff82bb1310 r sc_video_codecs_decode_vcn1 +ffffffff82bb1320 r sc_video_codecs_decode_vcn0 +ffffffff82bb1330 r yc_video_codecs_decode +ffffffff82bb1340 r bg_video_codecs_encode +ffffffff82bb1350 r bg_video_codecs_decode +ffffffff82bb1360 r nv_video_codecs_encode +ffffffff82bb1370 r nv_video_codecs_decode +ffffffff82bb1380 r sc_video_codecs_encode_array +ffffffff82bb13b0 r sc_video_codecs_decode_array_vcn1 +ffffffff82bb1440 r sc_video_codecs_decode_array_vcn0 +ffffffff82bb14e0 r yc_video_codecs_decode_array +ffffffff82bb1550 r bg_video_codecs_decode_array +ffffffff82bb1590 r nv_video_codecs_encode_array +ffffffff82bb15c0 r nv_video_codecs_decode_array +ffffffff82bb2000 r psp_v10_0_funcs +ffffffff82bb3000 r psp_v11_0_funcs +ffffffff82bb4000 r psp_v11_0_8_funcs +ffffffff82bb5000 r psp_v12_0_funcs +ffffffff82bb6000 r psp_v13_0_funcs +ffffffff82bb7000 r psp_v13_0_4_funcs +ffffffff82bb8000 r psp_v3_1_funcs +ffffffff82bb9000 r sdma_v2_4_ip_funcs +ffffffff82bb90a0 R sdma_v2_4_ip_block +ffffffff82bb90b8 r sdma_v2_4_ring_funcs +ffffffff82bb91f8 r sdma_v2_4_buffer_funcs +ffffffff82bb9218 r sdma_v2_4_vm_pte_funcs +ffffffff82bb9238 r sdma_v2_4_trap_irq_funcs +ffffffff82bb9248 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82bb9260 r iceland_mgcg_cgcg_init +ffffffff82bb9280 r golden_settings_iceland_a11 +ffffffff82bba000 r sdma_v3_0_ip_funcs +ffffffff82bba0a0 R sdma_v3_0_ip_block +ffffffff82bba0b8 R sdma_v3_1_ip_block +ffffffff82bba0d0 r sdma_v3_0_ring_funcs +ffffffff82bba210 r sdma_v3_0_buffer_funcs +ffffffff82bba230 r sdma_v3_0_vm_pte_funcs +ffffffff82bba250 r sdma_v3_0_trap_irq_funcs +ffffffff82bba260 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82bba270 r fiji_mgcg_cgcg_init +ffffffff82bba290 r golden_settings_fiji_a10 +ffffffff82bba2f0 r tonga_mgcg_cgcg_init +ffffffff82bba310 r golden_settings_tonga_a11 +ffffffff82bba390 r golden_settings_polaris11_a11 +ffffffff82bba410 r golden_settings_polaris10_a11 +ffffffff82bba490 r cz_mgcg_cgcg_init +ffffffff82bba4b0 r cz_golden_settings_a11 +ffffffff82bba540 r stoney_mgcg_cgcg_init +ffffffff82bba550 r stoney_golden_settings_a11 +ffffffff82bbb000 R sdma_v4_0_ip_funcs +ffffffff82bbb0a0 R sdma_v4_0_ras_hw_ops +ffffffff82bbb0e0 R sdma_v4_0_ip_block +ffffffff82bbb0f8 r sdma_v4_0_ring_funcs +ffffffff82bbb238 r sdma_v4_0_page_ring_funcs +ffffffff82bbb378 r sdma_v4_0_buffer_funcs +ffffffff82bbb398 r sdma_v4_0_vm_pte_funcs +ffffffff82bbb3b8 r sdma_v4_0_trap_irq_funcs +ffffffff82bbb3c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82bbb3d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82bbb3e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82bbb3f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82bbb408 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82bbb418 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82bbb430 r golden_settings_sdma_4 +ffffffff82bbb690 r golden_settings_sdma_vg10 +ffffffff82bbb740 r golden_settings_sdma_vg12 +ffffffff82bbb7f0 r golden_settings_sdma0_4_2_init +ffffffff82bbb810 r golden_settings_sdma0_4_2 +ffffffff82bbbaa0 r golden_settings_sdma1_4_2 +ffffffff82bbbd30 r golden_settings_sdma_arct +ffffffff82bbc030 r golden_settings_sdma_aldebaran +ffffffff82bbc1a0 r golden_settings_sdma_4_1 +ffffffff82bbc2b0 r golden_settings_sdma_rv2 +ffffffff82bbc2e0 r golden_settings_sdma_rv1 +ffffffff82bbc310 r golden_settings_sdma_4_3 +ffffffff82bbc400 r sdma_v4_0_ras_fields +ffffffff82bbd000 R sdma_v4_4_ras_hw_ops +ffffffff82bbd040 r sdma_v4_4_ras_fields +ffffffff82bbe000 R sdma_v4_4_2_ip_funcs +ffffffff82bbe0a0 R sdma_v4_4_2_ip_block +ffffffff82bbe0b8 r sdma_v4_4_2_ring_funcs +ffffffff82bbe1f8 r sdma_v4_4_2_page_ring_funcs +ffffffff82bbe338 r sdma_v4_4_2_buffer_funcs +ffffffff82bbe358 r sdma_v4_4_2_vm_pte_funcs +ffffffff82bbe378 r sdma_v4_4_2_trap_irq_funcs +ffffffff82bbe388 r sdma_v4_4_2_illegal_inst_irq_funcs +ffffffff82bbe398 r sdma_v4_4_2_ecc_irq_funcs +ffffffff82bbe3a8 r sdma_v4_4_2_vm_hole_irq_funcs +ffffffff82bbe3b8 r sdma_v4_4_2_doorbell_invalid_irq_funcs +ffffffff82bbe3c8 r sdma_v4_4_2_pool_timeout_irq_funcs +ffffffff82bbe3d8 r sdma_v4_4_2_srbm_write_irq_funcs +ffffffff82bbe3e8 r sdma_v4_4_2_ras_hw_ops +ffffffff82bbe430 r sdma_v4_2_2_ue_reg_list +ffffffff82bbe460 r sdma_v4_4_2_ras_memory_list +ffffffff82bbf000 R sdma_v5_0_ip_funcs +ffffffff82bbf0a0 R sdma_v5_0_ip_block +ffffffff82bbf0b8 r sdma_v5_0_ring_funcs +ffffffff82bbf1f8 r sdma_v5_0_buffer_funcs +ffffffff82bbf218 r sdma_v5_0_vm_pte_funcs +ffffffff82bbf238 r sdma_v5_0_trap_irq_funcs +ffffffff82bbf248 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82bbf260 r golden_settings_sdma_5 +ffffffff82bbf4a0 r golden_settings_sdma_nv10 +ffffffff82bbf4d0 r golden_settings_sdma_nv14 +ffffffff82bbf500 r golden_settings_sdma_5_sriov +ffffffff82bbf6e0 r golden_settings_sdma_nv12 +ffffffff82bbf770 r golden_settings_sdma_cyan_skillfish +ffffffff82bc0000 R sdma_v5_2_ip_funcs +ffffffff82bc00a0 R sdma_v5_2_ip_block +ffffffff82bc00b8 r sdma_v5_2_ring_funcs +ffffffff82bc01f8 r sdma_v5_2_buffer_funcs +ffffffff82bc0218 r sdma_v5_2_vm_pte_funcs +ffffffff82bc0238 r sdma_v5_2_trap_irq_funcs +ffffffff82bc0248 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82bc1000 R sdma_v6_0_ip_funcs +ffffffff82bc10a0 R sdma_v6_0_ip_block +ffffffff82bc10b8 r sdma_v6_0_ring_funcs +ffffffff82bc11f8 r sdma_v6_0_buffer_funcs +ffffffff82bc1218 r sdma_v6_0_vm_pte_funcs +ffffffff82bc1238 r sdma_v6_0_trap_irq_funcs +ffffffff82bc1248 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82bc2000 r smu_v11_0_i2c_algo +ffffffff82bc2010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82bc2028 r smu_v11_0_i2c_control_quirks +ffffffff82bc3000 R smuio_v11_0_funcs +ffffffff82bc4000 R smuio_v11_0_6_funcs +ffffffff82bc5000 R smuio_v13_0_funcs +ffffffff82bc6000 R smuio_v13_0_3_funcs +ffffffff82bc7000 R smuio_v13_0_6_funcs +ffffffff82bc8000 R smuio_v9_0_funcs +ffffffff82bc9000 r soc15_common_ip_funcs +ffffffff82bc90a0 R vega10_common_ip_block +ffffffff82bc90b8 r soc15_asic_funcs +ffffffff82bc9178 r vega20_asic_funcs +ffffffff82bc9238 r aqua_vanjaram_asic_funcs +ffffffff82bc9300 r soc15_allowed_read_registers +ffffffff82bc9490 r vega_video_codecs_encode +ffffffff82bc94a0 r vega_video_codecs_decode +ffffffff82bc94b0 r rv_video_codecs_decode +ffffffff82bc94c0 r rn_video_codecs_decode +ffffffff82bc94d0 r vcn_4_0_3_video_codecs_encode +ffffffff82bc94e0 r vcn_4_0_3_video_codecs_decode +ffffffff82bc94f0 r vega_video_codecs_encode_array +ffffffff82bc9520 r vega_video_codecs_decode_array +ffffffff82bc95a0 r rv_video_codecs_decode_array +ffffffff82bc9630 r rn_video_codecs_decode_array +ffffffff82bc96c0 r vcn_4_0_3_video_codecs_decode_array +ffffffff82bca000 r soc21_common_ip_funcs +ffffffff82bca0a0 R soc21_common_ip_block +ffffffff82bca0b8 r soc21_asic_funcs +ffffffff82bca180 r soc21_allowed_read_registers +ffffffff82bca300 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82bca310 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82bca320 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82bca330 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82bca340 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82bca370 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82bca3c0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82bca400 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82bcb000 r tonga_ih_ip_funcs +ffffffff82bcb0a0 R tonga_ih_ip_block +ffffffff82bcb0b8 r tonga_ih_funcs +ffffffff82bcc000 R umc_v6_0_funcs +ffffffff82bcd000 R umc_v6_1_channel_idx_tbl +ffffffff82bcd080 R umc_v6_1_ras_hw_ops +ffffffff82bce000 R umc_v6_7_channel_idx_tbl_second +ffffffff82bce080 R umc_v6_7_channel_idx_tbl_first +ffffffff82bce100 R umc_v6_7_ras_hw_ops +ffffffff82bcf000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82bcf040 R umc_v8_10_channel_idx_tbl_ext0 +ffffffff82bcf080 R umc_v8_10_channel_idx_tbl +ffffffff82bcf0e0 R umc_v8_10_ras_hw_ops +ffffffff82bd0000 R umc_v8_7_channel_idx_tbl +ffffffff82bd0040 R umc_v8_7_ras_hw_ops +ffffffff82bd1000 r uvd_v5_0_ip_funcs +ffffffff82bd10a0 R uvd_v5_0_ip_block +ffffffff82bd10b8 r uvd_v5_0_ring_funcs +ffffffff82bd11f8 r uvd_v5_0_irq_funcs +ffffffff82bd2000 r uvd_v6_0_ip_funcs +ffffffff82bd20a0 R uvd_v6_0_ip_block +ffffffff82bd20b8 R uvd_v6_2_ip_block +ffffffff82bd20d0 R uvd_v6_3_ip_block +ffffffff82bd20e8 r uvd_v6_0_ring_vm_funcs +ffffffff82bd2228 r uvd_v6_0_ring_phys_funcs +ffffffff82bd2368 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82bd24a8 r uvd_v6_0_irq_funcs +ffffffff82bd3000 R uvd_v7_0_ip_funcs +ffffffff82bd30a0 R uvd_v7_0_ip_block +ffffffff82bd30b8 r uvd_v7_0_ring_vm_funcs +ffffffff82bd31f8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82bd3338 r uvd_v7_0_irq_funcs +ffffffff82bd4000 r vce_v3_0_ip_funcs +ffffffff82bd40a0 R vce_v3_0_ip_block +ffffffff82bd40b8 R vce_v3_1_ip_block +ffffffff82bd40d0 R vce_v3_4_ip_block +ffffffff82bd40e8 r vce_v3_0_ring_vm_funcs +ffffffff82bd4228 r vce_v3_0_ring_phys_funcs +ffffffff82bd4368 r vce_v3_0_irq_funcs +ffffffff82bd5000 R vce_v4_0_ip_funcs +ffffffff82bd50a0 R vce_v4_0_ip_block +ffffffff82bd50b8 r vce_v4_0_ring_vm_funcs +ffffffff82bd51f8 r vce_v4_0_irq_funcs +ffffffff82bd6000 r vcn_v1_0_ip_funcs +ffffffff82bd60a0 R vcn_v1_0_ip_block +ffffffff82bd60b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82bd61f8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82bd6338 r vcn_v1_0_irq_funcs +ffffffff82bd7000 r vcn_v2_0_ip_funcs +ffffffff82bd70a0 R vcn_v2_0_ip_block +ffffffff82bd70b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82bd71f8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82bd7338 r vcn_v2_0_irq_funcs +ffffffff82bd8000 r vcn_v2_5_ip_funcs +ffffffff82bd80a0 R vcn_v2_5_ip_block +ffffffff82bd80b8 r vcn_v2_6_ip_funcs +ffffffff82bd8158 R vcn_v2_6_ip_block +ffffffff82bd8170 R vcn_v2_6_ras_hw_ops +ffffffff82bd81b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82bd82f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82bd8430 r vcn_v2_5_irq_funcs +ffffffff82bd8440 r vcn_v2_6_ras_irq_funcs +ffffffff82bd9000 r vcn_v3_0_ip_funcs +ffffffff82bd90a0 R vcn_v3_0_ip_block +ffffffff82bd90b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82bd91f8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82bd9338 r vcn_v3_0_irq_funcs +ffffffff82bda000 r vcn_v4_0_ip_funcs +ffffffff82bda0a0 R vcn_v4_0_ip_block +ffffffff82bda0b8 R vcn_v4_0_ras_hw_ops +ffffffff82bda0f8 r vcn_v4_0_irq_funcs +ffffffff82bda108 r vcn_v4_0_ras_irq_funcs +ffffffff82bdb000 r vcn_v4_0_3_ip_funcs +ffffffff82bdb0a0 R vcn_v4_0_3_ip_block +ffffffff82bdb0b8 r vcn_v4_0_3_unified_ring_vm_funcs +ffffffff82bdb1f8 r vcn_v4_0_3_irq_funcs +ffffffff82bdb208 r vcn_v4_0_3_ras_hw_ops +ffffffff82bdb250 r vcn_v4_0_3_ue_reg_list +ffffffff82bdc000 R vega10_ih_ip_funcs +ffffffff82bdc0a0 R vega10_ih_ip_block +ffffffff82bdc0b8 r vega10_ih_funcs +ffffffff82bdc0d8 r vega10_ih_self_irq_funcs +ffffffff82bdd000 r GC_BASE +ffffffff82bdd064 r HDP_BASE +ffffffff82bdd0c8 r MMHUB_BASE +ffffffff82bdd12c r ATHUB_BASE +ffffffff82bdd190 r NBIO_BASE +ffffffff82bdd1f4 r MP0_BASE +ffffffff82bdd258 r MP1_BASE +ffffffff82bdd2bc r VCE_BASE +ffffffff82bdd320 r VCN_BASE +ffffffff82bdd384 r DF_BASE +ffffffff82bdd3e8 r DCE_BASE +ffffffff82bdd44c r OSSSYS_BASE +ffffffff82bdd4b0 r SDMA0_BASE +ffffffff82bdd514 r SDMA1_BASE +ffffffff82bdd578 r SMUIO_BASE +ffffffff82bdd5dc r PWR_BASE +ffffffff82bdd640 r NBIF_BASE +ffffffff82bdd6a4 r THM_BASE +ffffffff82bdd708 r CLK_BASE +ffffffff82bde000 R vega20_ih_ip_funcs +ffffffff82bde0a0 R vega20_ih_ip_block +ffffffff82bde0b8 r vega20_ih_funcs +ffffffff82bde0d8 r vega20_ih_self_irq_funcs +ffffffff82bdf000 r GC_BASE +ffffffff82bdf090 r HDP_BASE +ffffffff82bdf120 r MMHUB_BASE +ffffffff82bdf1b0 r ATHUB_BASE +ffffffff82bdf240 r NBIO_BASE +ffffffff82bdf2d0 r MP0_BASE +ffffffff82bdf360 r MP1_BASE +ffffffff82bdf3f0 r UVD_BASE +ffffffff82bdf480 r VCE_BASE +ffffffff82bdf510 r DF_BASE +ffffffff82bdf5a0 r DCE_BASE +ffffffff82bdf630 r OSSSYS_BASE +ffffffff82bdf6c0 r SDMA0_BASE +ffffffff82bdf750 r SDMA1_BASE +ffffffff82bdf7e0 r SMUIO_BASE +ffffffff82bdf870 r THM_BASE +ffffffff82bdf900 r CLK_BASE +ffffffff82bdf990 r UMC_BASE +ffffffff82bdfa20 r RSMU_BASE +ffffffff82be0000 r vi_common_ip_block +ffffffff82be0018 r vi_common_ip_funcs +ffffffff82be00b8 r vi_asic_funcs +ffffffff82be0180 r vi_allowed_read_registers +ffffffff82be03e0 r topaz_video_codecs_encode +ffffffff82be03f0 r topaz_video_codecs_decode +ffffffff82be0400 r tonga_video_codecs_encode +ffffffff82be0410 r tonga_video_codecs_decode +ffffffff82be0420 r polaris_video_codecs_encode +ffffffff82be0430 r cz_video_codecs_decode +ffffffff82be0440 r tonga_video_codecs_encode_array +ffffffff82be0460 r tonga_video_codecs_decode_array +ffffffff82be04b0 r polaris_video_codecs_encode_array +ffffffff82be04e0 r cz_video_codecs_decode_array +ffffffff82be0560 r iceland_mgcg_cgcg_init +ffffffff82be05a0 r fiji_mgcg_cgcg_init +ffffffff82be0600 r tonga_mgcg_cgcg_init +ffffffff82be0660 r cz_mgcg_cgcg_init +ffffffff82be06a0 r stoney_mgcg_cgcg_init +ffffffff82be1000 r amdgpu_dm_funcs +ffffffff82be10a0 R dm_ip_block +ffffffff82be10b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82be1120 r dm_display_funcs +ffffffff82be1180 r hpd_disconnect_quirk_table +ffffffff82be1ef0 r amdgpu_dm_mode_funcs +ffffffff82be1f38 r amdgpu_dm_audio_component_bind_ops +ffffffff82be1f48 r amdgpu_dm_audio_component_ops +ffffffff82be1f80 r amdgpu_dm_encoder_funcs +ffffffff82be1fa0 r amdgpu_dm_connector_funcs +ffffffff82be2018 r amdgpu_dm_connector_helper_funcs +ffffffff82be2078 r amdgpu_dm_i2c_algo +ffffffff82be2088 r amdgpu_dm_backlight_ops +ffffffff82be2260 r add_fs_modes.common_rates +ffffffff82be3000 r amdgpu_dm_crtc_funcs +ffffffff82be30c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82be4000 r dm_dtn_log_begin.msg +ffffffff82be400d r dm_dtn_log_end.msg +ffffffff82be4018 r SYNAPTICS_DEVICE_ID +ffffffff82be5000 r dm_crtc_irq_funcs +ffffffff82be5010 r dm_vline0_irq_funcs +ffffffff82be5020 r dm_dmub_outbox_irq_funcs +ffffffff82be5030 r dm_vupdate_irq_funcs +ffffffff82be5040 r dm_dmub_trace_irq_funcs +ffffffff82be5050 r dm_pageflip_irq_funcs +ffffffff82be5060 r dm_hpd_irq_funcs +ffffffff82be6000 r amdgpu_dm_encoder_funcs +ffffffff82be6020 r dm_mst_cbs +ffffffff82be6030 r dm_dp_mst_connector_funcs +ffffffff82be60a8 r dm_dp_mst_connector_helper_funcs +ffffffff82be7000 r dm_plane_funcs +ffffffff82be7068 r dm_plane_helper_funcs ffffffff82be9000 r vbios_funcs -ffffffff82bee000 r command_table_helper_funcs +ffffffff82bea000 r vbios_funcs ffffffff82bef000 r command_table_helper_funcs ffffffff82bf0000 r command_table_helper_funcs ffffffff82bf1000 r command_table_helper_funcs -ffffffff82bf2000 r dce80_max_clks_by_state -ffffffff82bf2028 r disp_clk_regs -ffffffff82bf207c r disp_clk_shift -ffffffff82bf2088 r disp_clk_mask -ffffffff82bf3000 r dce110_max_clks_by_state +ffffffff82bf2000 r command_table_helper_funcs +ffffffff82bf3000 r dce80_max_clks_by_state ffffffff82bf3028 r disp_clk_regs ffffffff82bf307c r disp_clk_shift ffffffff82bf3088 r disp_clk_mask -ffffffff82bf4000 r dce112_max_clks_by_state +ffffffff82bf4000 r dce110_max_clks_by_state ffffffff82bf4028 r disp_clk_regs ffffffff82bf407c r disp_clk_shift ffffffff82bf4088 r disp_clk_mask -ffffffff82bf5000 r dce120_max_clks_by_state -ffffffff82bf6000 r clk_mgr_regs -ffffffff82bf6054 r clk_mgr_shift -ffffffff82bf6060 r clk_mgr_mask +ffffffff82bf5000 r dce112_max_clks_by_state +ffffffff82bf5028 r disp_clk_regs +ffffffff82bf507c r disp_clk_shift +ffffffff82bf5088 r disp_clk_mask +ffffffff82bf6000 r dce120_max_clks_by_state ffffffff82bf7000 r clk_mgr_regs ffffffff82bf7054 r clk_mgr_shift ffffffff82bf7060 r clk_mgr_mask ffffffff82bf8000 r clk_mgr_regs ffffffff82bf8054 r clk_mgr_shift ffffffff82bf8060 r clk_mgr_mask -ffffffff82bf9000 r lpddr5_wm_table -ffffffff82bf90c0 r ddr5_wm_table +ffffffff82bf9000 r clk_mgr_regs +ffffffff82bf9054 r clk_mgr_shift +ffffffff82bf9060 r clk_mgr_mask ffffffff82bfa000 r lpddr5_wm_table ffffffff82bfa0c0 r ddr5_wm_table ffffffff82bfb000 r lpddr5_wm_table ffffffff82bfb0c0 r ddr5_wm_table ffffffff82bfc000 r lpddr5_wm_table -ffffffff82bfc0c0 r ddr4_wm_table -ffffffff82bfd000 r clk_mgr_regs_dcn321 -ffffffff82bfd054 r clk_mgr_shift_dcn321 -ffffffff82bfd060 r clk_mgr_mask_dcn321 -ffffffff82bfd084 r clk_mgr_regs_dcn32 -ffffffff82bfd0d8 r clk_mgr_shift_dcn32 -ffffffff82bfd0e4 r clk_mgr_mask_dcn32 -ffffffff82bfe000 r DC_BUILD_ID -ffffffff82c00000 r output_csc_matrix -ffffffff82c000e0 r black_color_format -ffffffff82c03000 r dce_funcs -ffffffff82c04000 r funcs -ffffffff82c05000 R video_optimized_pixel_rates -ffffffff82c051c0 r dce110_clk_src_funcs -ffffffff82c051e8 r dce112_clk_src_funcs -ffffffff82c05210 r dcn20_clk_src_funcs -ffffffff82c05238 r dcn3_clk_src_funcs -ffffffff82c05260 r dcn31_clk_src_funcs -ffffffff82c06000 r dce_funcs -ffffffff82c06068 r dcn10_funcs -ffffffff82c060d0 r dcn20_funcs -ffffffff82c06138 r dcn21_funcs -ffffffff82c07000 r dce_ipp_funcs -ffffffff82c08000 r dce110_lnk_enc_funcs -ffffffff82c09000 r dce_mi_funcs -ffffffff82c09090 r dce112_mi_funcs -ffffffff82c09120 r dce120_mi_funcs -ffffffff82c091b0 r pte_settings -ffffffff82c0a000 r funcs -ffffffff82c0b000 r dce_link_panel_cntl_funcs -ffffffff82c0c000 r filter_3tap_16p_upscale -ffffffff82c0c040 r filter_3tap_16p_116 -ffffffff82c0c080 r filter_3tap_16p_149 -ffffffff82c0c0c0 r filter_3tap_16p_183 -ffffffff82c0c100 r filter_3tap_64p_upscale -ffffffff82c0c1d0 r filter_3tap_64p_116 -ffffffff82c0c2a0 r filter_3tap_64p_149 -ffffffff82c0c370 r filter_3tap_64p_183 -ffffffff82c0c440 r filter_4tap_16p_upscale -ffffffff82c0c490 r filter_4tap_16p_116 -ffffffff82c0c4e0 r filter_4tap_16p_149 -ffffffff82c0c530 r filter_4tap_16p_183 -ffffffff82c0c580 r filter_4tap_64p_upscale -ffffffff82c0c690 r filter_4tap_64p_116 -ffffffff82c0c7a0 r filter_4tap_64p_149 -ffffffff82c0c8b0 r filter_4tap_64p_183 -ffffffff82c0c9c0 r filter_5tap_64p_upscale -ffffffff82c0cb10 r filter_5tap_64p_116 -ffffffff82c0cc60 r filter_5tap_64p_149 -ffffffff82c0cdb0 r filter_5tap_64p_183 -ffffffff82c0cf00 r filter_6tap_64p_upscale -ffffffff82c0d090 r filter_6tap_64p_116 -ffffffff82c0d220 r filter_6tap_64p_149 -ffffffff82c0d3b0 r filter_6tap_64p_183 -ffffffff82c0d540 r filter_7tap_64p_upscale -ffffffff82c0d710 r filter_7tap_64p_116 -ffffffff82c0d8e0 r filter_7tap_64p_149 -ffffffff82c0dab0 r filter_7tap_64p_183 -ffffffff82c0dc80 r filter_8tap_64p_upscale -ffffffff82c0de90 r filter_8tap_64p_116 -ffffffff82c0e0a0 r filter_8tap_64p_149 -ffffffff82c0e2b0 r filter_8tap_64p_183 -ffffffff82c0e4c0 r filter_2tap_16p -ffffffff82c0e4f0 r filter_2tap_64p -ffffffff82c0f000 r dce110_str_enc_funcs -ffffffff82c0f120 r audio_clock_info_table_48bpc -ffffffff82c0f2b0 r audio_clock_info_table_36bpc -ffffffff82c0f440 r audio_clock_info_table -ffffffff82c10000 r global_color_matrix -ffffffff82c100a8 r dce_transform_funcs -ffffffff82c11000 r abm_funcs -ffffffff82c12000 r psr_funcs -ffffffff82c12040 r DP_SINK_DEVICE_STR_ID_1 -ffffffff82c12045 r DP_SINK_DEVICE_STR_ID_2 -ffffffff82c13000 r replay_funcs -ffffffff82c14000 r reg_offsets -ffffffff82c15000 r bios_regs -ffffffff82c15008 r res_cap -ffffffff82c15048 r dce100_res_pool_funcs -ffffffff82c15140 r clk_src_regs -ffffffff82c1523c r dmcu_regs -ffffffff82c15298 r dmcu_shift -ffffffff82c152ac r dmcu_mask -ffffffff82c152f8 r abm_regs -ffffffff82c15360 r abm_shift -ffffffff82c15384 r abm_mask -ffffffff82c15410 r debug_defaults -ffffffff82c155c0 r dce100_tg_offsets -ffffffff82c15608 r plane_cap -ffffffff82c15638 r res_create_funcs -ffffffff82c15670 r panel_cntl_regs -ffffffff82c15690 r panel_cntl_shift -ffffffff82c156a0 r panel_cntl_mask -ffffffff82c156e0 r link_enc_regs -ffffffff82c15aa0 r link_enc_aux_regs -ffffffff82c15af0 r link_enc_hpd_regs -ffffffff82c15b08 r link_enc_feature -ffffffff82c15b18 r cs_shift -ffffffff82c15b24 r cs_mask -ffffffff82c15b50 r mi_regs -ffffffff82c15e68 r mi_shifts -ffffffff82c15eb0 r mi_masks -ffffffff82c15fd0 r ipp_regs -ffffffff82c161c8 r ipp_shift -ffffffff82c161f0 r ipp_mask -ffffffff82c16290 r xfm_regs -ffffffff82c16830 r xfm_shift -ffffffff82c16890 r xfm_mask -ffffffff82c16a10 r opp_regs -ffffffff82c16b60 r opp_shift -ffffffff82c16b8c r opp_mask -ffffffff82c16c40 r aux_engine_regs -ffffffff82c16d30 r aux_mask -ffffffff82c16d90 r aux_shift -ffffffff82c16db0 r i2c_hw_regs -ffffffff82c16f00 r i2c_shifts -ffffffff82c16f2c r i2c_masks -ffffffff82c16fd0 r audio_regs -ffffffff82c17104 r audio_shift -ffffffff82c1711c r audio_mask -ffffffff82c17160 r stream_enc_regs -ffffffff82c1780c r se_shift -ffffffff82c17890 r se_mask -ffffffff82c17a94 r hwseq_reg -ffffffff82c17cb0 r hwseq_shift -ffffffff82c17d30 r hwseq_mask -ffffffff82c18000 r reg_offsets -ffffffff82c18018 r dce110_compressor_funcs -ffffffff82c19000 r dce110_funcs -ffffffff82c192e8 r dce110_private_funcs -ffffffff82c1a000 r dce110_mem_input_v_funcs -ffffffff82c1a090 r dvmm_Hw_Setting_1DTiling -ffffffff82c1a120 r dvmm_Hw_Setting_2DTiling -ffffffff82c1a1b0 r dvmm_Hw_Setting_Linear -ffffffff82c1b000 r global_color_matrix -ffffffff82c1b0b0 r input_csc_matrix -ffffffff82c1c000 r funcs -ffffffff82c1d000 r bios_regs -ffffffff82c1d008 r dce110_res_pool_funcs -ffffffff82c1d100 r debug_defaults -ffffffff82c1d2b0 r clk_src_regs -ffffffff82c1d3ac r dmcu_regs -ffffffff82c1d408 r dmcu_shift -ffffffff82c1d41c r dmcu_mask -ffffffff82c1d468 r abm_regs -ffffffff82c1d4d0 r abm_shift -ffffffff82c1d4f4 r abm_mask -ffffffff82c1d580 r dce110_tg_offsets -ffffffff82c1d5c8 r res_create_funcs -ffffffff82c1d5f8 r plane_cap -ffffffff82c1d624 r underlay_plane_cap -ffffffff82c1d650 r stoney_resource_cap -ffffffff82c1d68c r carrizo_resource_cap -ffffffff82c1d6d0 r panel_cntl_regs -ffffffff82c1d6f0 r panel_cntl_shift -ffffffff82c1d700 r panel_cntl_mask -ffffffff82c1d740 r link_enc_regs -ffffffff82c1db00 r link_enc_aux_regs -ffffffff82c1db50 r link_enc_hpd_regs -ffffffff82c1db68 r link_enc_feature -ffffffff82c1db78 r cs_shift -ffffffff82c1db84 r cs_mask -ffffffff82c1dbb0 r mi_regs -ffffffff82c1dd3c r mi_shifts -ffffffff82c1dd84 r mi_masks -ffffffff82c1dea0 r ipp_regs -ffffffff82c1df9c r ipp_shift -ffffffff82c1dfc4 r ipp_mask -ffffffff82c1e060 r xfm_regs -ffffffff82c1e330 r xfm_shift -ffffffff82c1e390 r xfm_mask -ffffffff82c1e510 r opp_regs -ffffffff82c1e660 r opp_shift -ffffffff82c1e68c r opp_mask -ffffffff82c1e740 r aux_engine_regs -ffffffff82c1e830 r aux_mask -ffffffff82c1e890 r aux_shift -ffffffff82c1e8b0 r i2c_hw_regs -ffffffff82c1ea00 r i2c_shifts -ffffffff82c1ea2c r i2c_masks -ffffffff82c1ead0 r audio_regs -ffffffff82c1ec04 r audio_shift -ffffffff82c1ec1c r audio_mask -ffffffff82c1ec60 r stream_enc_regs -ffffffff82c1ef3c r se_shift -ffffffff82c1efc0 r se_mask -ffffffff82c1f1c4 r hwseq_stoney_reg -ffffffff82c1f3e0 r hwseq_cz_reg -ffffffff82c1f5fc r hwseq_shift -ffffffff82c1f67c r hwseq_mask -ffffffff82c20000 r dce110_tg_funcs -ffffffff82c21000 r dce110_tg_v_funcs -ffffffff82c22000 r dce110_xfmv_funcs -ffffffff82c23000 r reg_offsets +ffffffff82bfc0c0 r ddr5_wm_table +ffffffff82bfd000 r lpddr5_wm_table +ffffffff82bfd0c0 r ddr4_wm_table +ffffffff82bfe000 r clk_mgr_regs_dcn321 +ffffffff82bfe054 r clk_mgr_shift_dcn321 +ffffffff82bfe060 r clk_mgr_mask_dcn321 +ffffffff82bfe084 r clk_mgr_regs_dcn32 +ffffffff82bfe0d8 r clk_mgr_shift_dcn32 +ffffffff82bfe0e4 r clk_mgr_mask_dcn32 +ffffffff82bff000 r DC_BUILD_ID +ffffffff82c01000 r output_csc_matrix +ffffffff82c010e0 r black_color_format +ffffffff82c04000 r dce_funcs +ffffffff82c05000 r funcs +ffffffff82c06000 R video_optimized_pixel_rates +ffffffff82c061c0 r dce110_clk_src_funcs +ffffffff82c061e8 r dce112_clk_src_funcs +ffffffff82c06210 r dcn20_clk_src_funcs +ffffffff82c06238 r dcn3_clk_src_funcs +ffffffff82c06260 r dcn31_clk_src_funcs +ffffffff82c07000 r dce_funcs +ffffffff82c07068 r dcn10_funcs +ffffffff82c070d0 r dcn20_funcs +ffffffff82c07138 r dcn21_funcs +ffffffff82c08000 r dce_ipp_funcs +ffffffff82c09000 r dce110_lnk_enc_funcs +ffffffff82c0a000 r dce_mi_funcs +ffffffff82c0a090 r dce112_mi_funcs +ffffffff82c0a120 r dce120_mi_funcs +ffffffff82c0a1b0 r pte_settings +ffffffff82c0b000 r funcs +ffffffff82c0c000 r dce_link_panel_cntl_funcs +ffffffff82c0d000 r filter_3tap_16p_upscale +ffffffff82c0d040 r filter_3tap_16p_116 +ffffffff82c0d080 r filter_3tap_16p_149 +ffffffff82c0d0c0 r filter_3tap_16p_183 +ffffffff82c0d100 r filter_3tap_64p_upscale +ffffffff82c0d1d0 r filter_3tap_64p_116 +ffffffff82c0d2a0 r filter_3tap_64p_149 +ffffffff82c0d370 r filter_3tap_64p_183 +ffffffff82c0d440 r filter_4tap_16p_upscale +ffffffff82c0d490 r filter_4tap_16p_116 +ffffffff82c0d4e0 r filter_4tap_16p_149 +ffffffff82c0d530 r filter_4tap_16p_183 +ffffffff82c0d580 r filter_4tap_64p_upscale +ffffffff82c0d690 r filter_4tap_64p_116 +ffffffff82c0d7a0 r filter_4tap_64p_149 +ffffffff82c0d8b0 r filter_4tap_64p_183 +ffffffff82c0d9c0 r filter_5tap_64p_upscale +ffffffff82c0db10 r filter_5tap_64p_116 +ffffffff82c0dc60 r filter_5tap_64p_149 +ffffffff82c0ddb0 r filter_5tap_64p_183 +ffffffff82c0df00 r filter_6tap_64p_upscale +ffffffff82c0e090 r filter_6tap_64p_116 +ffffffff82c0e220 r filter_6tap_64p_149 +ffffffff82c0e3b0 r filter_6tap_64p_183 +ffffffff82c0e540 r filter_7tap_64p_upscale +ffffffff82c0e710 r filter_7tap_64p_116 +ffffffff82c0e8e0 r filter_7tap_64p_149 +ffffffff82c0eab0 r filter_7tap_64p_183 +ffffffff82c0ec80 r filter_8tap_64p_upscale +ffffffff82c0ee90 r filter_8tap_64p_116 +ffffffff82c0f0a0 r filter_8tap_64p_149 +ffffffff82c0f2b0 r filter_8tap_64p_183 +ffffffff82c0f4c0 r filter_2tap_16p +ffffffff82c0f4f0 r filter_2tap_64p +ffffffff82c10000 r dce110_str_enc_funcs +ffffffff82c10120 r audio_clock_info_table_48bpc +ffffffff82c102b0 r audio_clock_info_table_36bpc +ffffffff82c10440 r audio_clock_info_table +ffffffff82c11000 r global_color_matrix +ffffffff82c110a8 r dce_transform_funcs +ffffffff82c12000 r abm_funcs +ffffffff82c13000 r psr_funcs +ffffffff82c13040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82c13045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82c14000 r replay_funcs +ffffffff82c15000 r reg_offsets +ffffffff82c16000 r bios_regs +ffffffff82c16008 r res_cap +ffffffff82c16048 r dce100_res_pool_funcs +ffffffff82c16140 r clk_src_regs +ffffffff82c1623c r dmcu_regs +ffffffff82c16298 r dmcu_shift +ffffffff82c162ac r dmcu_mask +ffffffff82c162f8 r abm_regs +ffffffff82c16360 r abm_shift +ffffffff82c16384 r abm_mask +ffffffff82c16410 r debug_defaults +ffffffff82c165c0 r dce100_tg_offsets +ffffffff82c16608 r plane_cap +ffffffff82c16638 r res_create_funcs +ffffffff82c16670 r panel_cntl_regs +ffffffff82c16690 r panel_cntl_shift +ffffffff82c166a0 r panel_cntl_mask +ffffffff82c166e0 r link_enc_regs +ffffffff82c16aa0 r link_enc_aux_regs +ffffffff82c16af0 r link_enc_hpd_regs +ffffffff82c16b08 r link_enc_feature +ffffffff82c16b18 r cs_shift +ffffffff82c16b24 r cs_mask +ffffffff82c16b50 r mi_regs +ffffffff82c16e68 r mi_shifts +ffffffff82c16eb0 r mi_masks +ffffffff82c16fd0 r ipp_regs +ffffffff82c171c8 r ipp_shift +ffffffff82c171f0 r ipp_mask +ffffffff82c17290 r xfm_regs +ffffffff82c17830 r xfm_shift +ffffffff82c17890 r xfm_mask +ffffffff82c17a10 r opp_regs +ffffffff82c17b60 r opp_shift +ffffffff82c17b8c r opp_mask +ffffffff82c17c40 r aux_engine_regs +ffffffff82c17d30 r aux_mask +ffffffff82c17d90 r aux_shift +ffffffff82c17db0 r i2c_hw_regs +ffffffff82c17f00 r i2c_shifts +ffffffff82c17f2c r i2c_masks +ffffffff82c17fd0 r audio_regs +ffffffff82c18104 r audio_shift +ffffffff82c1811c r audio_mask +ffffffff82c18160 r stream_enc_regs +ffffffff82c1880c r se_shift +ffffffff82c18890 r se_mask +ffffffff82c18a94 r hwseq_reg +ffffffff82c18cb0 r hwseq_shift +ffffffff82c18d30 r hwseq_mask +ffffffff82c19000 r reg_offsets +ffffffff82c19018 r dce110_compressor_funcs +ffffffff82c1a000 r dce110_funcs +ffffffff82c1a2e8 r dce110_private_funcs +ffffffff82c1b000 r dce110_mem_input_v_funcs +ffffffff82c1b090 r dvmm_Hw_Setting_1DTiling +ffffffff82c1b120 r dvmm_Hw_Setting_2DTiling +ffffffff82c1b1b0 r dvmm_Hw_Setting_Linear +ffffffff82c1c000 r global_color_matrix +ffffffff82c1c0b0 r input_csc_matrix +ffffffff82c1d000 r funcs +ffffffff82c1e000 r bios_regs +ffffffff82c1e008 r dce110_res_pool_funcs +ffffffff82c1e100 r debug_defaults +ffffffff82c1e2b0 r clk_src_regs +ffffffff82c1e3ac r dmcu_regs +ffffffff82c1e408 r dmcu_shift +ffffffff82c1e41c r dmcu_mask +ffffffff82c1e468 r abm_regs +ffffffff82c1e4d0 r abm_shift +ffffffff82c1e4f4 r abm_mask +ffffffff82c1e580 r dce110_tg_offsets +ffffffff82c1e5c8 r res_create_funcs +ffffffff82c1e5f8 r plane_cap +ffffffff82c1e624 r underlay_plane_cap +ffffffff82c1e650 r stoney_resource_cap +ffffffff82c1e68c r carrizo_resource_cap +ffffffff82c1e6d0 r panel_cntl_regs +ffffffff82c1e6f0 r panel_cntl_shift +ffffffff82c1e700 r panel_cntl_mask +ffffffff82c1e740 r link_enc_regs +ffffffff82c1eb00 r link_enc_aux_regs +ffffffff82c1eb50 r link_enc_hpd_regs +ffffffff82c1eb68 r link_enc_feature +ffffffff82c1eb78 r cs_shift +ffffffff82c1eb84 r cs_mask +ffffffff82c1ebb0 r mi_regs +ffffffff82c1ed3c r mi_shifts +ffffffff82c1ed84 r mi_masks +ffffffff82c1eea0 r ipp_regs +ffffffff82c1ef9c r ipp_shift +ffffffff82c1efc4 r ipp_mask +ffffffff82c1f060 r xfm_regs +ffffffff82c1f330 r xfm_shift +ffffffff82c1f390 r xfm_mask +ffffffff82c1f510 r opp_regs +ffffffff82c1f660 r opp_shift +ffffffff82c1f68c r opp_mask +ffffffff82c1f740 r aux_engine_regs +ffffffff82c1f830 r aux_mask +ffffffff82c1f890 r aux_shift +ffffffff82c1f8b0 r i2c_hw_regs +ffffffff82c1fa00 r i2c_shifts +ffffffff82c1fa2c r i2c_masks +ffffffff82c1fad0 r audio_regs +ffffffff82c1fc04 r audio_shift +ffffffff82c1fc1c r audio_mask +ffffffff82c1fc60 r stream_enc_regs +ffffffff82c1ff3c r se_shift +ffffffff82c1ffc0 r se_mask +ffffffff82c201c4 r hwseq_stoney_reg +ffffffff82c203e0 r hwseq_cz_reg +ffffffff82c205fc r hwseq_shift +ffffffff82c2067c r hwseq_mask +ffffffff82c21000 r dce110_tg_funcs +ffffffff82c22000 r dce110_tg_v_funcs +ffffffff82c23000 r dce110_xfmv_funcs ffffffff82c24000 r reg_offsets -ffffffff82c25000 r bios_regs -ffffffff82c25008 r dce112_res_pool_funcs -ffffffff82c25100 r debug_defaults -ffffffff82c252b0 r clk_src_regs -ffffffff82c254a8 r dmcu_regs -ffffffff82c25504 r dmcu_shift -ffffffff82c25518 r dmcu_mask -ffffffff82c25564 r abm_regs -ffffffff82c255cc r abm_shift -ffffffff82c255f0 r abm_mask -ffffffff82c25680 r dce112_tg_offsets -ffffffff82c256c8 r res_create_funcs -ffffffff82c256f8 r plane_cap -ffffffff82c25724 r polaris_11_resource_cap -ffffffff82c25760 r polaris_10_resource_cap -ffffffff82c257a0 r panel_cntl_regs -ffffffff82c257c0 r panel_cntl_shift -ffffffff82c257d0 r panel_cntl_mask -ffffffff82c25810 r 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hwseq_mask -ffffffff82c28000 r bios_regs -ffffffff82c28008 r res_cap -ffffffff82c28048 r dce120_res_pool_funcs -ffffffff82c28140 r debug_defaults -ffffffff82c282f0 r clk_src_regs -ffffffff82c284e8 r dmcu_regs -ffffffff82c28544 r dmcu_shift -ffffffff82c28558 r dmcu_mask -ffffffff82c285a4 r abm_regs -ffffffff82c2860c r abm_shift -ffffffff82c28630 r abm_mask -ffffffff82c286c0 r dce120_tg_offsets -ffffffff82c28708 r dce121_res_create_funcs -ffffffff82c28738 r res_create_funcs -ffffffff82c28768 r plane_cap -ffffffff82c287a0 r panel_cntl_regs -ffffffff82c287c0 r panel_cntl_shift -ffffffff82c287d0 r panel_cntl_mask -ffffffff82c28810 r link_enc_regs -ffffffff82c28bd0 r link_enc_aux_regs -ffffffff82c28c20 r link_enc_hpd_regs -ffffffff82c28c38 r link_enc_feature -ffffffff82c28c48 r cs_shift -ffffffff82c28c54 r cs_mask -ffffffff82c28c80 r mi_regs -ffffffff82c28f98 r mi_shifts -ffffffff82c28fe0 r mi_masks -ffffffff82c29100 r ipp_regs -ffffffff82c292f8 r ipp_shift -ffffffff82c29320 r ipp_mask -ffffffff82c293c0 r xfm_regs -ffffffff82c29960 r xfm_shift -ffffffff82c299c0 r xfm_mask -ffffffff82c29b40 r opp_regs -ffffffff82c29c90 r opp_shift -ffffffff82c29cbc r opp_mask -ffffffff82c29d70 r aux_engine_regs -ffffffff82c29e60 r aux_mask -ffffffff82c29ec0 r aux_shift -ffffffff82c29ee0 r i2c_hw_regs -ffffffff82c2a030 r i2c_shifts -ffffffff82c2a05c r i2c_masks -ffffffff82c2a100 r audio_regs -ffffffff82c2a234 r audio_shift -ffffffff82c2a24c r audio_mask -ffffffff82c2a290 r stream_enc_regs -ffffffff82c2a848 r se_shift -ffffffff82c2a8cc r se_mask -ffffffff82c2aad0 r dce121_hwseq_reg -ffffffff82c2acec r dce121_hwseq_shift -ffffffff82c2ad6c r dce121_hwseq_mask -ffffffff82c2af60 r hwseq_reg -ffffffff82c2b17c r hwseq_shift -ffffffff82c2b1fc r hwseq_mask -ffffffff82c2c000 r dce120_tg_funcs -ffffffff82c2d000 r bios_regs -ffffffff82c2d008 r res_cap -ffffffff82c2d048 r dce80_res_pool_funcs -ffffffff82c2d140 r debug_defaults -ffffffff82c2d2f0 r clk_src_regs -ffffffff82c2d3ec r dmcu_regs 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r aux_shift -ffffffff82c2edb0 r i2c_hw_regs -ffffffff82c2ef00 r i2c_shifts -ffffffff82c2ef2c r i2c_masks -ffffffff82c2efd0 r audio_regs -ffffffff82c2f104 r audio_shift -ffffffff82c2f11c r audio_mask -ffffffff82c2f160 r stream_enc_regs -ffffffff82c2f80c r se_shift -ffffffff82c2f890 r se_mask -ffffffff82c2fa94 r hwseq_reg -ffffffff82c2fcb0 r hwseq_shift -ffffffff82c2fd30 r hwseq_mask -ffffffff82c2ff24 r res_cap_81 -ffffffff82c2ff60 r res_cap_83 -ffffffff82c30000 r reg_offsets -ffffffff82c30048 r dce80_tg_funcs -ffffffff82c31000 r dcn10_dpp_funcs -ffffffff82c32000 r dpp_input_csc_matrix -ffffffff82c34000 R dcn10_dwbc_funcs -ffffffff82c35000 r hubbub1_funcs -ffffffff82c36000 r dcn10_hubp_funcs -ffffffff82c37000 r reduceSizeAndFraction.prime_numbers -ffffffff82c39000 r dcn10_funcs -ffffffff82c392e8 r dcn10_private_funcs -ffffffff82c3a000 r dcn10_ipp_funcs -ffffffff82c3a048 r dcn20_ipp_funcs -ffffffff82c3b000 r dcn10_lnk_enc_funcs -ffffffff82c3c000 r dcn10_mpc_funcs -ffffffff82c3d000 r dcn10_opp_funcs -ffffffff82c3e000 r dcn10_tg_funcs -ffffffff82c3f000 r bios_regs -ffffffff82c3f008 r rv2_res_cap -ffffffff82c3f044 r res_cap -ffffffff82c3f080 r dcn10_res_pool_funcs -ffffffff82c3f178 r debug_defaults_drv -ffffffff82c3f320 r debug_defaults_diags -ffffffff82c3f4d0 r clk_src_regs -ffffffff82c3f620 r dmcu_regs -ffffffff82c3f67c r dmcu_shift -ffffffff82c3f690 r dmcu_mask -ffffffff82c3f6dc r abm_regs -ffffffff82c3f744 r abm_shift -ffffffff82c3f768 r abm_mask -ffffffff82c3f7f8 r res_create_funcs -ffffffff82c3f828 r plane_cap -ffffffff82c3f860 r panel_cntl_regs -ffffffff82c3f880 r panel_cntl_shift -ffffffff82c3f890 r panel_cntl_mask -ffffffff82c3f8d0 r link_enc_regs -ffffffff82c3fde0 r link_enc_aux_regs -ffffffff82c3fe20 r link_enc_hpd_regs -ffffffff82c3fe30 r le_shift -ffffffff82c3ff20 r le_mask -ffffffff82c402d8 r link_enc_feature -ffffffff82c402e8 r cs_shift -ffffffff82c402f4 r cs_mask -ffffffff82c40320 r hubp_regs -ffffffff82c409d0 r hubp_shift -ffffffff82c40a94 r hubp_mask -ffffffff82c40da0 r ipp_regs -ffffffff82c40e80 r ipp_shift -ffffffff82c40e9c r ipp_mask -ffffffff82c40f10 r tf_regs -ffffffff82c41e80 r tf_shift -ffffffff82c420e8 r tf_mask -ffffffff82c42a80 r opp_regs -ffffffff82c42b50 r opp_shift -ffffffff82c42b70 r opp_mask -ffffffff82c42bf0 r tg_regs -ffffffff82c43190 r tg_shift -ffffffff82c43264 r tg_mask -ffffffff82c435b0 r aux_engine_regs -ffffffff82c436a0 r aux_mask -ffffffff82c43700 r aux_shift -ffffffff82c43720 r i2c_hw_regs -ffffffff82c43870 r i2c_shifts -ffffffff82c4389c r i2c_masks -ffffffff82c43940 r mpc_regs -ffffffff82c43a60 r mpc_shift -ffffffff82c43a78 r mpc_mask -ffffffff82c43ad4 r hubbub_reg -ffffffff82c43c5c r hubbub_shift -ffffffff82c43cec r hubbub_mask -ffffffff82c43f30 r audio_regs -ffffffff82c43fe0 r audio_shift -ffffffff82c43ff8 r audio_mask -ffffffff82c44040 r stream_enc_regs -ffffffff82c44590 r se_shift -ffffffff82c4466c r se_mask -ffffffff82c449d8 r hwseq_reg -ffffffff82c44bf4 r hwseq_shift -ffffffff82c44c74 r hwseq_mask -ffffffff82c45000 r audio_clock_info_table_48bpc -ffffffff82c45190 r audio_clock_info_table_36bpc -ffffffff82c45320 r audio_clock_info_table -ffffffff82c454e0 r dcn10_str_enc_funcs -ffffffff82c46000 r dccg2_funcs -ffffffff82c48000 r dpp_input_csc_matrix -ffffffff82c49000 r dcn20_dsc_funcs -ffffffff82c4a000 r dcn20_dwbc_funcs -ffffffff82c4b000 r filter_12tap_16p_upscale -ffffffff82c4b0e0 r filter_12tap_16p_117 -ffffffff82c4b1c0 r filter_12tap_16p_150 -ffffffff82c4b2a0 r filter_12tap_16p_183 -ffffffff82c4b380 r filter_11tap_16p_upscale -ffffffff82c4b450 r filter_11tap_16p_117 -ffffffff82c4b520 r filter_11tap_16p_150 -ffffffff82c4b5f0 r filter_11tap_16p_183 -ffffffff82c4b6c0 r filter_10tap_16p_upscale -ffffffff82c4b780 r filter_10tap_16p_117 -ffffffff82c4b840 r filter_10tap_16p_150 -ffffffff82c4b900 r filter_10tap_16p_183 -ffffffff82c4b9c0 r filter_9tap_16p_upscale -ffffffff82c4ba70 r filter_9tap_16p_117 -ffffffff82c4bb20 r filter_9tap_16p_150 -ffffffff82c4bbd0 r filter_9tap_16p_183 -ffffffff82c4bc80 r filter_8tap_16p_upscale -ffffffff82c4bd10 r filter_8tap_16p_117 -ffffffff82c4bda0 r filter_8tap_16p_150 -ffffffff82c4be30 r filter_8tap_16p_183 -ffffffff82c4bec0 r filter_7tap_16p_upscale -ffffffff82c4bf40 r filter_7tap_16p_117 -ffffffff82c4bfc0 r filter_7tap_16p_150 -ffffffff82c4c040 r filter_7tap_16p_183 -ffffffff82c4c0c0 r filter_6tap_16p_upscale -ffffffff82c4c130 r filter_6tap_16p_117 -ffffffff82c4c1a0 r filter_6tap_16p_150 -ffffffff82c4c210 r filter_6tap_16p_183 -ffffffff82c4c280 r filter_5tap_16p_upscale -ffffffff82c4c2e0 r filter_5tap_16p_117 -ffffffff82c4c340 r filter_5tap_16p_150 -ffffffff82c4c3a0 r filter_5tap_16p_183 -ffffffff82c4c400 r filter_4tap_16p_upscale -ffffffff82c4c450 r filter_4tap_16p_117 -ffffffff82c4c4a0 r filter_4tap_16p_150 -ffffffff82c4c4f0 r filter_4tap_16p_183 -ffffffff82c4c540 r filter_3tap_16p_upscale -ffffffff82c4c580 r filter_3tap_16p_117 -ffffffff82c4c5c0 r filter_3tap_16p_150 -ffffffff82c4c600 r filter_3tap_16p_183 -ffffffff82c4d000 r hubbub2_funcs -ffffffff82c4e000 r dcn20_funcs -ffffffff82c4e2e8 r dcn20_private_funcs -ffffffff82c4f000 r dcn20_link_enc_funcs -ffffffff82c4f0e0 r dcn2_mpll_cfg -ffffffff82c50000 r dcn20_mmhubbub_funcs -ffffffff82c51000 r dcn20_mpc_funcs -ffffffff82c52000 r tf_regs -ffffffff82c53938 r tf_shift -ffffffff82c53bc0 r tf_mask -ffffffff82c545e0 r ipp_regs -ffffffff82c54730 r ipp_shift -ffffffff82c5474c r ipp_mask -ffffffff82c547c0 r opp_regs -ffffffff82c549d0 r opp_shift -ffffffff82c54a08 r opp_mask -ffffffff82c54ae0 r aux_engine_regs -ffffffff82c54bd0 r aux_mask -ffffffff82c54c30 r aux_shift -ffffffff82c54c50 r i2c_hw_regs -ffffffff82c54da0 r i2c_shifts -ffffffff82c54dcc r i2c_masks -ffffffff82c54e70 r mpc_regs -ffffffff82c553b8 r mpc_shift -ffffffff82c55400 r mpc_mask -ffffffff82c55514 r hubbub_reg -ffffffff82c5569c r hubbub_shift -ffffffff82c5572c r hubbub_mask -ffffffff82c55964 r res_cap_nv10 -ffffffff82c559a0 r vmid_regs -ffffffff82c55b60 r vmid_shifts -ffffffff82c55b68 r vmid_masks -ffffffff82c55b90 r tg_regs -ffffffff82c56400 r tg_shift -ffffffff82c564d4 r tg_mask -ffffffff82c56820 r link_enc_regs -ffffffff82c56fc0 r link_enc_aux_regs -ffffffff82c57020 r link_enc_hpd_regs -ffffffff82c57038 r le_shift -ffffffff82c57128 r le_mask -ffffffff82c574e0 r stream_enc_regs -ffffffff82c57cd8 r se_shift -ffffffff82c57db4 r se_mask -ffffffff82c58120 r hwseq_reg -ffffffff82c5833c r hwseq_shift -ffffffff82c583bc r hwseq_mask -ffffffff82c585b0 r dsc_regs -ffffffff82c58a48 r dsc_shift -ffffffff82c58b00 r dsc_mask -ffffffff82c58de0 r hubp_regs -ffffffff82c59a28 r hubp_shift -ffffffff82c59b24 r hubp_mask -ffffffff82c59f20 r dwbc20_regs -ffffffff82c59fd8 r dwbc20_shift -ffffffff82c5a058 r dwbc20_mask -ffffffff82c5a250 r mcif_wb20_regs -ffffffff82c5a330 r mcif_wb20_shift -ffffffff82c5a3d0 r mcif_wb20_mask -ffffffff82c5a650 r link_enc_feature -ffffffff82c5a660 r bios_regs -ffffffff82c5a668 r dcn20_res_pool_funcs -ffffffff82c5a760 r res_cap_nv14 -ffffffff82c5a7a0 r debug_defaults_drv -ffffffff82c5a950 r clk_src_regs -ffffffff82c5ab48 r dccg_regs -ffffffff82c5ac38 r dccg_shift -ffffffff82c5acd8 r dccg_mask -ffffffff82c5af4c r dmcu_regs -ffffffff82c5afa8 r dmcu_shift -ffffffff82c5afbc r dmcu_mask -ffffffff82c5b008 r abm_regs -ffffffff82c5b070 r abm_shift -ffffffff82c5b094 r abm_mask -ffffffff82c5b120 r res_create_funcs -ffffffff82c5b150 r plane_cap -ffffffff82c5b180 r panel_cntl_regs -ffffffff82c5b1a0 r panel_cntl_shift -ffffffff82c5b1b0 r panel_cntl_mask -ffffffff82c5b1ec r cs_shift -ffffffff82c5b1f8 r cs_mask -ffffffff82c5b220 r audio_regs -ffffffff82c5b354 r audio_shift -ffffffff82c5b36c r audio_mask -ffffffff82c5c000 r dcn20_str_enc_funcs -ffffffff82c5d000 r dccg201_funcs -ffffffff82c5e000 r hubbub201_funcs -ffffffff82c5f000 r dcn201_funcs -ffffffff82c5f2e8 r dcn201_private_funcs -ffffffff82c60000 r dcn201_link_enc_funcs -ffffffff82c61000 r dcn201_mpc_funcs -ffffffff82c62000 r bios_regs -ffffffff82c62008 r res_cap_dnc201 -ffffffff82c62048 r debug_defaults_drv -ffffffff82c621f0 r clk_src_regs -ffffffff82c62298 r dccg_regs -ffffffff82c62388 r dccg_shift -ffffffff82c62428 r dccg_mask -ffffffff82c626a0 r res_create_funcs -ffffffff82c626d0 r plane_cap -ffffffff82c62700 r link_enc_regs -ffffffff82c62990 r link_enc_aux_regs -ffffffff82c629b0 r link_enc_hpd_regs -ffffffff82c629b8 r le_shift -ffffffff82c62aa8 r le_mask -ffffffff82c62e60 r link_enc_feature -ffffffff82c62e70 r cs_shift -ffffffff82c62e7c r cs_mask -ffffffff82c62eb0 r hubp_regs -ffffffff82c63640 r hubp_shift -ffffffff82c63718 r hubp_mask -ffffffff82c63a80 r ipp_regs -ffffffff82c63b60 r ipp_shift -ffffffff82c63b7c r ipp_mask -ffffffff82c63bf0 r tf_regs -ffffffff82c64c40 r tf_shift -ffffffff82c64ec8 r tf_mask -ffffffff82c658e0 r opp_regs -ffffffff82c65990 r opp_shift -ffffffff82c659c8 r opp_mask -ffffffff82c65aa0 r aux_engine_regs -ffffffff82c65af0 r aux_mask -ffffffff82c65b50 r aux_shift -ffffffff82c65b70 r i2c_hw_regs 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qp_table_444_12bpc_max -ffffffff82d06a40 r qp_table_444_12bpc_min -ffffffff82d07980 r qp_table_422_8bpc_max -ffffffff82d07ec0 r qp_table_422_8bpc_min -ffffffff82d08400 r qp_table_422_10bpc_max -ffffffff82d08b40 r qp_table_422_10bpc_min -ffffffff82d09280 r qp_table_422_12bpc_max -ffffffff82d09bc0 r qp_table_422_12bpc_min -ffffffff82d0a500 r qp_table_420_8bpc_max -ffffffff82d0a940 r qp_table_420_8bpc_min -ffffffff82d0ad80 r qp_table_420_10bpc_max -ffffffff82d0b340 r qp_table_420_10bpc_min -ffffffff82d0b900 r qp_table_420_12bpc_max -ffffffff82d0c040 r qp_table_420_12bpc_min -ffffffff82d0e000 r funcs -ffffffff82d0e050 r hpd_regs -ffffffff82d0e1a0 r hpd_shift -ffffffff82d0e1b0 r hpd_mask -ffffffff82d0e1c0 r ddc_data_regs -ffffffff82d0e3a0 r ddc_clk_regs -ffffffff82d0e580 r ddc_shift -ffffffff82d0e5a8 r ddc_mask +ffffffff82c25000 r reg_offsets +ffffffff82c26000 r bios_regs +ffffffff82c26008 r dce112_res_pool_funcs +ffffffff82c26100 r debug_defaults +ffffffff82c262b0 r clk_src_regs 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opp_shift +ffffffff82c27cbc r opp_mask +ffffffff82c27d70 r aux_engine_regs +ffffffff82c27e60 r aux_mask +ffffffff82c27ec0 r aux_shift +ffffffff82c27ee0 r i2c_hw_regs +ffffffff82c28030 r i2c_shifts +ffffffff82c2805c r i2c_masks +ffffffff82c28100 r audio_regs +ffffffff82c28208 r audio_shift +ffffffff82c28220 r audio_mask +ffffffff82c28260 r stream_enc_regs +ffffffff82c28818 r se_shift +ffffffff82c2889c r se_mask +ffffffff82c28aa0 r hwseq_reg +ffffffff82c28cbc r hwseq_shift +ffffffff82c28d3c r hwseq_mask +ffffffff82c29000 r bios_regs +ffffffff82c29008 r res_cap +ffffffff82c29048 r dce120_res_pool_funcs +ffffffff82c29140 r debug_defaults +ffffffff82c292f0 r clk_src_regs +ffffffff82c294e8 r dmcu_regs +ffffffff82c29544 r dmcu_shift +ffffffff82c29558 r dmcu_mask +ffffffff82c295a4 r abm_regs +ffffffff82c2960c r abm_shift +ffffffff82c29630 r abm_mask +ffffffff82c296c0 r dce120_tg_offsets +ffffffff82c29708 r dce121_res_create_funcs +ffffffff82c29738 r res_create_funcs +ffffffff82c29768 r plane_cap +ffffffff82c297a0 r panel_cntl_regs +ffffffff82c297c0 r panel_cntl_shift +ffffffff82c297d0 r panel_cntl_mask +ffffffff82c29810 r link_enc_regs +ffffffff82c29bd0 r link_enc_aux_regs +ffffffff82c29c20 r link_enc_hpd_regs +ffffffff82c29c38 r link_enc_feature +ffffffff82c29c48 r cs_shift +ffffffff82c29c54 r cs_mask +ffffffff82c29c80 r mi_regs +ffffffff82c29f98 r mi_shifts +ffffffff82c29fe0 r mi_masks +ffffffff82c2a100 r ipp_regs +ffffffff82c2a2f8 r ipp_shift +ffffffff82c2a320 r ipp_mask +ffffffff82c2a3c0 r xfm_regs +ffffffff82c2a960 r xfm_shift +ffffffff82c2a9c0 r xfm_mask +ffffffff82c2ab40 r opp_regs +ffffffff82c2ac90 r opp_shift +ffffffff82c2acbc r opp_mask +ffffffff82c2ad70 r aux_engine_regs +ffffffff82c2ae60 r aux_mask +ffffffff82c2aec0 r aux_shift +ffffffff82c2aee0 r i2c_hw_regs +ffffffff82c2b030 r i2c_shifts +ffffffff82c2b05c r i2c_masks +ffffffff82c2b100 r audio_regs +ffffffff82c2b234 r audio_shift +ffffffff82c2b24c r audio_mask +ffffffff82c2b290 r stream_enc_regs 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link_enc_feature +ffffffff82c2eb18 r cs_shift +ffffffff82c2eb24 r cs_mask +ffffffff82c2eb50 r mi_regs +ffffffff82c2ee68 r mi_shifts +ffffffff82c2eeb0 r mi_masks +ffffffff82c2efd0 r ipp_regs +ffffffff82c2f1c8 r ipp_shift +ffffffff82c2f1f0 r ipp_mask +ffffffff82c2f290 r xfm_regs +ffffffff82c2f830 r xfm_shift +ffffffff82c2f890 r xfm_mask +ffffffff82c2fa10 r opp_regs +ffffffff82c2fb60 r opp_shift +ffffffff82c2fb8c r opp_mask +ffffffff82c2fc40 r aux_engine_regs +ffffffff82c2fd30 r aux_mask +ffffffff82c2fd90 r aux_shift +ffffffff82c2fdb0 r i2c_hw_regs +ffffffff82c2ff00 r i2c_shifts +ffffffff82c2ff2c r i2c_masks +ffffffff82c2ffd0 r audio_regs +ffffffff82c30104 r audio_shift +ffffffff82c3011c r audio_mask +ffffffff82c30160 r stream_enc_regs +ffffffff82c3080c r se_shift +ffffffff82c30890 r se_mask +ffffffff82c30a94 r hwseq_reg +ffffffff82c30cb0 r hwseq_shift +ffffffff82c30d30 r hwseq_mask +ffffffff82c30f24 r res_cap_81 +ffffffff82c30f60 r res_cap_83 +ffffffff82c31000 r reg_offsets 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hubbub_mask +ffffffff82ca54f0 r vmid_regs +ffffffff82ca56b0 r vmid_shifts +ffffffff82ca56b8 r vmid_masks +ffffffff82ca56e0 r hubp_regs +ffffffff82ca5af8 r hubp_shift +ffffffff82ca5bf4 r hubp_mask +ffffffff82ca5ff0 r dpp_regs +ffffffff82ca6a78 r tf_shift +ffffffff82ca6d4c r tf_mask +ffffffff82ca7890 r opp_regs +ffffffff82ca7940 r opp_shift +ffffffff82ca7978 r opp_mask +ffffffff82ca7a50 r optc_regs +ffffffff82ca7d20 r optc_shift +ffffffff82ca7df4 r optc_mask +ffffffff82ca813c r mpc_regs +ffffffff82ca9928 r mpc_shift +ffffffff82ca9a04 r mpc_mask +ffffffff82ca9d70 r dsc_regs +ffffffff82ca9ef8 r dsc_shift +ffffffff82ca9fb0 r dsc_mask +ffffffff82caa290 r dwbc30_regs +ffffffff82caa46c r dwbc30_shift +ffffffff82caa5a0 r dwbc30_mask +ffffffff82caaa70 r mcif_wb30_regs +ffffffff82caab6c r mcif_wb30_shift +ffffffff82caac18 r mcif_wb30_mask +ffffffff82caaed0 r aux_engine_regs +ffffffff82caaf20 r aux_mask +ffffffff82caaf80 r aux_shift +ffffffff82caafa0 r i2c_hw_regs +ffffffff82cab010 r i2c_shifts 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r abm_regs +ffffffff82cb2950 r abm_shift +ffffffff82cb2974 r abm_mask +ffffffff82cb2a00 r res_create_funcs +ffffffff82cb2a30 r plane_cap +ffffffff82cb2a60 r link_enc_regs +ffffffff82cb30c0 r link_enc_aux_regs +ffffffff82cb3110 r link_enc_hpd_regs +ffffffff82cb3124 r le_shift +ffffffff82cb3214 r le_mask +ffffffff82cb35cc r link_enc_feature +ffffffff82cb35dc r panel_config_defaults +ffffffff82cb3630 r debug_defaults_drv +ffffffff82cb37d8 r cs_shift +ffffffff82cb37e4 r cs_mask +ffffffff82cb380c r hubbub_reg +ffffffff82cb3994 r hubbub_shift +ffffffff82cb3a24 r hubbub_mask +ffffffff82cb3c60 r vmid_regs +ffffffff82cb3e20 r vmid_shifts +ffffffff82cb3e28 r vmid_masks +ffffffff82cb3e50 r hubp_regs +ffffffff82cb4680 r hubp_shift +ffffffff82cb477c r hubp_mask +ffffffff82cb4b70 r dpp_regs +ffffffff82cb6080 r tf_shift +ffffffff82cb6354 r tf_mask +ffffffff82cb6ea0 r opp_regs +ffffffff82cb7000 r opp_shift +ffffffff82cb7038 r opp_mask +ffffffff82cb7110 r optc_regs +ffffffff82cb76b0 r optc_shift +ffffffff82cb7784 r optc_mask +ffffffff82cb7acc r mpc_regs +ffffffff82cb92b8 r mpc_shift +ffffffff82cb9394 r mpc_mask +ffffffff82cb9700 r dsc_regs +ffffffff82cb994c r dsc_shift +ffffffff82cb9a04 r dsc_mask +ffffffff82cb9ce0 r dwbc30_regs +ffffffff82cb9ebc r dwbc30_shift +ffffffff82cb9ff0 r dwbc30_mask +ffffffff82cba4c0 r mcif_wb30_regs +ffffffff82cba5bc r mcif_wb30_shift +ffffffff82cba668 r mcif_wb30_mask +ffffffff82cba920 r aux_engine_regs +ffffffff82cba9e8 r aux_mask +ffffffff82cbaa48 r aux_shift +ffffffff82cbaa60 r i2c_hw_regs +ffffffff82cbab78 r i2c_shifts +ffffffff82cbaba4 r i2c_masks +ffffffff82cbac50 r audio_regs +ffffffff82cbad84 r audio_shift +ffffffff82cbad9c r audio_mask +ffffffff82cbadd8 r se_shift +ffffffff82cbaeb4 r se_mask +ffffffff82cbb220 r vpg_regs +ffffffff82cbb310 r vpg_shift +ffffffff82cbb338 r vpg_mask +ffffffff82cbb3e0 r afmt_regs +ffffffff82cbb4b8 r afmt_shift +ffffffff82cbb4cc r afmt_mask +ffffffff82cbb520 r stream_enc_regs +ffffffff82cbcbc0 r hpo_dp_stream_enc_regs +ffffffff82cbcdf0 r hpo_dp_se_shift +ffffffff82cbce18 r hpo_dp_se_mask +ffffffff82cbcec0 r apg_regs +ffffffff82cbcf00 r apg_shift +ffffffff82cbcf08 r apg_mask +ffffffff82cbcf20 r hpo_dp_link_enc_regs +ffffffff82cbd030 r hpo_dp_le_shift +ffffffff82cbd04c r hpo_dp_le_mask +ffffffff82cbd0b0 r hwseq_reg +ffffffff82cbd2cc r hwseq_shift +ffffffff82cbd34c r hwseq_mask +ffffffff82cbe000 r dccg314_funcs +ffffffff82cbf000 r dcn314_str_enc_funcs +ffffffff82cc0000 r dcn314_funcs +ffffffff82cc02e8 r dcn314_private_funcs +ffffffff82cc1000 r bios_regs +ffffffff82cc1008 r res_cap_dcn314 +ffffffff82cc1048 r debug_defaults_diags +ffffffff82cc11f0 r clk_src_regs +ffffffff82cc1394 r dccg_regs +ffffffff82cc1484 r dccg_shift +ffffffff82cc1524 r dccg_mask +ffffffff82cc17a0 r abm_regs +ffffffff82cc1940 r abm_shift +ffffffff82cc1964 r abm_mask +ffffffff82cc19f0 r res_create_funcs +ffffffff82cc1a20 r plane_cap +ffffffff82cc1a50 r link_enc_regs +ffffffff82cc20b0 r link_enc_aux_regs +ffffffff82cc2100 r link_enc_hpd_regs +ffffffff82cc2114 r le_shift +ffffffff82cc2204 r le_mask +ffffffff82cc25bc r link_enc_feature +ffffffff82cc25cc r panel_config_defaults +ffffffff82cc2620 r debug_defaults_drv +ffffffff82cc27c8 r cs_shift +ffffffff82cc27d4 r cs_mask +ffffffff82cc27fc r hubbub_reg +ffffffff82cc2984 r hubbub_shift +ffffffff82cc2a14 r hubbub_mask +ffffffff82cc2c50 r vmid_regs +ffffffff82cc2e10 r vmid_shifts +ffffffff82cc2e18 r vmid_masks +ffffffff82cc2e40 r hubp_regs +ffffffff82cc3670 r hubp_shift +ffffffff82cc376c r hubp_mask +ffffffff82cc3b60 r dpp_regs +ffffffff82cc5070 r tf_shift +ffffffff82cc5344 r tf_mask +ffffffff82cc5e90 r opp_regs +ffffffff82cc5ff0 r opp_shift +ffffffff82cc6028 r opp_mask +ffffffff82cc6100 r optc_regs +ffffffff82cc66a0 r optc_shift +ffffffff82cc6774 r optc_mask +ffffffff82cc6abc r mpc_regs +ffffffff82cc82a8 r mpc_shift +ffffffff82cc8384 r mpc_mask +ffffffff82cc86f0 r dsc_regs +ffffffff82cc8a00 r dsc_shift +ffffffff82cc8ab8 r dsc_mask +ffffffff82cc8d90 r dwbc30_regs +ffffffff82cc8f6c r dwbc30_shift +ffffffff82cc90a0 r dwbc30_mask +ffffffff82cc9570 r mcif_wb30_regs +ffffffff82cc966c r mcif_wb30_shift +ffffffff82cc9718 r mcif_wb30_mask +ffffffff82cc99d0 r aux_engine_regs +ffffffff82cc9a98 r aux_mask +ffffffff82cc9af8 r aux_shift +ffffffff82cc9b10 r i2c_hw_regs +ffffffff82cc9c28 r i2c_shifts +ffffffff82cc9c54 r i2c_masks +ffffffff82cc9d00 r audio_regs +ffffffff82cc9e34 r audio_shift +ffffffff82cc9e4c r audio_mask +ffffffff82cc9e90 r stream_enc_regs +ffffffff82cca534 r se_shift +ffffffff82cca610 r se_mask +ffffffff82cca980 r vpg_regs +ffffffff82ccaa70 r vpg_shift +ffffffff82ccaa98 r vpg_mask +ffffffff82ccab40 r afmt_regs +ffffffff82ccac18 r afmt_shift +ffffffff82ccac2c r afmt_mask +ffffffff82ccac80 r hpo_dp_stream_enc_regs +ffffffff82ccaeb0 r hpo_dp_se_shift +ffffffff82ccaed8 r hpo_dp_se_mask +ffffffff82ccaf80 r apg_regs +ffffffff82ccafc0 r apg_shift +ffffffff82ccafc8 r apg_mask +ffffffff82ccafe0 r hpo_dp_link_enc_regs +ffffffff82ccb0f0 r hpo_dp_le_shift +ffffffff82ccb10c r hpo_dp_le_mask +ffffffff82ccb170 r hwseq_reg +ffffffff82ccb38c r hwseq_shift +ffffffff82ccb40c r hwseq_mask +ffffffff82ccc000 r bios_regs +ffffffff82ccc008 r res_cap_dcn31 +ffffffff82ccc050 r clk_src_regs +ffffffff82ccc1f4 r dccg_regs +ffffffff82ccc2e4 r dccg_shift +ffffffff82ccc384 r dccg_mask +ffffffff82ccc600 r abm_regs +ffffffff82ccc7a0 r abm_shift +ffffffff82ccc7c4 r abm_mask +ffffffff82ccc850 r res_create_funcs +ffffffff82ccc880 r plane_cap +ffffffff82ccc8b0 r link_enc_regs +ffffffff82cccf10 r link_enc_aux_regs +ffffffff82cccf60 r link_enc_hpd_regs +ffffffff82cccf74 r le_shift +ffffffff82ccd064 r le_mask +ffffffff82ccd41c r link_enc_feature +ffffffff82ccd42c r panel_config_defaults +ffffffff82ccd480 r debug_defaults_drv +ffffffff82ccd628 r cs_shift +ffffffff82ccd634 r cs_mask +ffffffff82ccd65c r hubbub_reg +ffffffff82ccd7e4 r hubbub_shift +ffffffff82ccd874 r hubbub_mask +ffffffff82ccdab0 r vmid_regs +ffffffff82ccdc70 r vmid_shifts +ffffffff82ccdc78 r vmid_masks +ffffffff82ccdca0 r hubp_regs +ffffffff82cce4d0 r hubp_shift +ffffffff82cce5cc r hubp_mask +ffffffff82cce9c0 r dpp_regs +ffffffff82ccfed0 r tf_shift +ffffffff82cd01a4 r tf_mask +ffffffff82cd0cf0 r opp_regs +ffffffff82cd0e50 r opp_shift +ffffffff82cd0e88 r opp_mask +ffffffff82cd0f60 r optc_regs +ffffffff82cd1500 r optc_shift +ffffffff82cd15d4 r optc_mask +ffffffff82cd191c r mpc_regs +ffffffff82cd3108 r mpc_shift +ffffffff82cd31e4 r mpc_mask +ffffffff82cd3550 r dsc_regs +ffffffff82cd379c r dsc_shift +ffffffff82cd3854 r dsc_mask +ffffffff82cd3b30 r dwbc30_regs +ffffffff82cd3d0c r dwbc30_shift +ffffffff82cd3e40 r dwbc30_mask +ffffffff82cd4310 r mcif_wb30_regs +ffffffff82cd440c r mcif_wb30_shift +ffffffff82cd44b8 r mcif_wb30_mask +ffffffff82cd4770 r aux_engine_regs +ffffffff82cd4838 r aux_mask +ffffffff82cd4898 r aux_shift +ffffffff82cd48b0 r i2c_hw_regs +ffffffff82cd49c8 r i2c_shifts +ffffffff82cd49f4 r i2c_masks +ffffffff82cd4aa0 r audio_regs +ffffffff82cd4bd4 r audio_shift +ffffffff82cd4bec r audio_mask +ffffffff82cd4c30 r stream_enc_regs +ffffffff82cd52d4 r se_shift +ffffffff82cd53b0 r se_mask +ffffffff82cd5720 r vpg_regs +ffffffff82cd5810 r vpg_shift +ffffffff82cd5838 r vpg_mask +ffffffff82cd58e0 r afmt_regs +ffffffff82cd59b8 r afmt_shift +ffffffff82cd59cc r afmt_mask +ffffffff82cd5a20 r hpo_dp_stream_enc_regs +ffffffff82cd5c50 r hpo_dp_se_shift +ffffffff82cd5c78 r hpo_dp_se_mask +ffffffff82cd5d20 r apg_regs +ffffffff82cd5d60 r apg_shift +ffffffff82cd5d68 r apg_mask +ffffffff82cd5d80 r hpo_dp_link_enc_regs +ffffffff82cd5e90 r hpo_dp_le_shift +ffffffff82cd5eac r hpo_dp_le_mask +ffffffff82cd5f10 r hwseq_reg +ffffffff82cd612c r hwseq_shift +ffffffff82cd61ac r hwseq_mask +ffffffff82cd7000 r bios_regs +ffffffff82cd7008 r res_cap_dcn31 +ffffffff82cd7050 r clk_src_regs +ffffffff82cd71f4 r dccg_regs +ffffffff82cd72e4 r dccg_shift +ffffffff82cd7384 r dccg_mask +ffffffff82cd7600 r abm_regs +ffffffff82cd77a0 r abm_shift +ffffffff82cd77c4 r abm_mask +ffffffff82cd7850 r res_create_funcs +ffffffff82cd7880 r plane_cap +ffffffff82cd78b0 r link_enc_regs +ffffffff82cd7f10 r link_enc_aux_regs +ffffffff82cd7f60 r link_enc_hpd_regs +ffffffff82cd7f74 r le_shift +ffffffff82cd8064 r le_mask +ffffffff82cd841c r link_enc_feature +ffffffff82cd842c r panel_config_defaults +ffffffff82cd8480 r debug_defaults_drv +ffffffff82cd8628 r cs_shift +ffffffff82cd8634 r cs_mask +ffffffff82cd865c r hubbub_reg +ffffffff82cd87e4 r hubbub_shift +ffffffff82cd8874 r hubbub_mask +ffffffff82cd8ab0 r vmid_regs +ffffffff82cd8c70 r vmid_shifts +ffffffff82cd8c78 r vmid_masks +ffffffff82cd8ca0 r hubp_regs +ffffffff82cd94d0 r hubp_shift +ffffffff82cd95cc r hubp_mask +ffffffff82cd99c0 r dpp_regs +ffffffff82cdaed0 r tf_shift +ffffffff82cdb1a4 r tf_mask +ffffffff82cdbcf0 r opp_regs +ffffffff82cdbe50 r opp_shift +ffffffff82cdbe88 r opp_mask +ffffffff82cdbf60 r optc_regs +ffffffff82cdc500 r optc_shift +ffffffff82cdc5d4 r optc_mask +ffffffff82cdc91c r mpc_regs +ffffffff82cde108 r mpc_shift +ffffffff82cde1e4 r mpc_mask +ffffffff82cde550 r dsc_regs +ffffffff82cde79c r dsc_shift +ffffffff82cde854 r dsc_mask +ffffffff82cdeb30 r dwbc30_regs +ffffffff82cded0c r dwbc30_shift +ffffffff82cdee40 r dwbc30_mask +ffffffff82cdf310 r mcif_wb30_regs +ffffffff82cdf40c r mcif_wb30_shift +ffffffff82cdf4b8 r mcif_wb30_mask +ffffffff82cdf770 r aux_engine_regs +ffffffff82cdf838 r aux_mask +ffffffff82cdf898 r aux_shift +ffffffff82cdf8b0 r i2c_hw_regs +ffffffff82cdf9c8 r i2c_shifts +ffffffff82cdf9f4 r i2c_masks +ffffffff82cdfaa0 r audio_regs +ffffffff82cdfbd4 r audio_shift +ffffffff82cdfbec r audio_mask +ffffffff82cdfc30 r stream_enc_regs +ffffffff82ce02d4 r se_shift +ffffffff82ce03b0 r se_mask +ffffffff82ce0720 r vpg_regs +ffffffff82ce0810 r vpg_shift +ffffffff82ce0838 r vpg_mask +ffffffff82ce08e0 r afmt_regs +ffffffff82ce09b8 r afmt_shift +ffffffff82ce09cc r afmt_mask +ffffffff82ce0a20 r hpo_dp_stream_enc_regs +ffffffff82ce0c50 r hpo_dp_se_shift +ffffffff82ce0c78 r hpo_dp_se_mask +ffffffff82ce0d20 r apg_regs +ffffffff82ce0d60 r apg_shift +ffffffff82ce0d68 r apg_mask +ffffffff82ce0d80 r hpo_dp_link_enc_regs +ffffffff82ce0e90 r hpo_dp_le_shift +ffffffff82ce0eac r hpo_dp_le_mask +ffffffff82ce0f10 r hwseq_reg +ffffffff82ce112c r hwseq_shift +ffffffff82ce11ac r hwseq_mask +ffffffff82ce2000 r dccg32_funcs +ffffffff82ce3000 r dcn32_link_enc_funcs +ffffffff82ce4000 r dcn32_str_enc_funcs +ffffffff82ce5000 r hubbub32_funcs +ffffffff82ce6000 r dcn32_funcs +ffffffff82ce62e8 r dcn32_private_funcs +ffffffff82ce7000 r dcn32_mmhubbub_funcs +ffffffff82ce8000 r dcn32_mpc_funcs +ffffffff82ce9000 r res_cap_dcn32 +ffffffff82ce903c r dccg_shift +ffffffff82ce90dc r dccg_mask +ffffffff82ce9350 r abm_shift +ffffffff82ce9374 r abm_mask +ffffffff82ce9400 r res_create_funcs +ffffffff82ce9430 r plane_cap +ffffffff82ce945c r le_shift +ffffffff82ce954c r le_mask +ffffffff82ce9904 r link_enc_feature +ffffffff82ce9918 r debug_defaults_drv +ffffffff82ce9ac0 r cs_shift +ffffffff82ce9acc r cs_mask +ffffffff82ce9af4 r hubbub_shift +ffffffff82ce9b84 r hubbub_mask +ffffffff82ce9dbc r vmid_shifts +ffffffff82ce9dc4 r vmid_masks +ffffffff82ce9de4 r hubp_shift +ffffffff82ce9ee0 r hubp_mask +ffffffff82cea2d0 r tf_shift +ffffffff82cea5a4 r tf_mask +ffffffff82ceb0e8 r opp_shift +ffffffff82ceb120 r opp_mask +ffffffff82ceb1f4 r optc_shift +ffffffff82ceb2c8 r optc_mask +ffffffff82ceb610 r mpc_shift +ffffffff82ceb6ec r mpc_mask +ffffffff82ceba58 r dsc_shift +ffffffff82cebb10 r dsc_mask +ffffffff82cebde8 r dwbc30_shift +ffffffff82cebf1c r dwbc30_mask +ffffffff82cec3e4 r mcif_wb30_shift +ffffffff82cec490 r mcif_wb30_mask +ffffffff82cec73c r aux_mask +ffffffff82cec79c r aux_shift +ffffffff82cec7b4 r i2c_shifts +ffffffff82cec7e0 r i2c_masks +ffffffff82cec884 r audio_shift +ffffffff82cec89c r audio_mask +ffffffff82cec8d8 r se_shift +ffffffff82cec9b4 r se_mask +ffffffff82cecd20 r vpg_shift +ffffffff82cecd48 r vpg_mask +ffffffff82cecddc r afmt_shift +ffffffff82cecdf0 r afmt_mask +ffffffff82cece34 r hpo_dp_se_shift +ffffffff82cece5c r hpo_dp_se_mask +ffffffff82cecefc r apg_shift +ffffffff82cecf04 r apg_mask +ffffffff82cecf1c r hpo_dp_le_shift +ffffffff82cecf38 r hpo_dp_le_mask +ffffffff82cecf9c r hwseq_shift +ffffffff82ced01c r hwseq_mask +ffffffff82cee000 r dcn321_link_enc_funcs +ffffffff82cef000 r res_cap_dcn321 +ffffffff82cef03c r dccg_shift +ffffffff82cef0dc r dccg_mask +ffffffff82cef350 r abm_shift +ffffffff82cef374 r abm_mask +ffffffff82cef400 r res_create_funcs +ffffffff82cef430 r plane_cap +ffffffff82cef45c r le_shift +ffffffff82cef54c r le_mask +ffffffff82cef904 r link_enc_feature +ffffffff82cef918 r debug_defaults_drv +ffffffff82cefac0 r cs_shift +ffffffff82cefacc r cs_mask +ffffffff82cefaf4 r hubbub_shift +ffffffff82cefb84 r hubbub_mask +ffffffff82cefdbc r vmid_shifts +ffffffff82cefdc4 r vmid_masks +ffffffff82cefde4 r hubp_shift +ffffffff82cefee0 r hubp_mask +ffffffff82cf02d0 r tf_shift +ffffffff82cf05a4 r tf_mask +ffffffff82cf10e8 r opp_shift +ffffffff82cf1120 r opp_mask +ffffffff82cf11f4 r optc_shift +ffffffff82cf12c8 r optc_mask +ffffffff82cf1610 r mpc_shift +ffffffff82cf16ec r mpc_mask +ffffffff82cf1a58 r dsc_shift +ffffffff82cf1b10 r dsc_mask +ffffffff82cf1de8 r dwbc30_shift +ffffffff82cf1f1c r dwbc30_mask +ffffffff82cf23e4 r mcif_wb30_shift +ffffffff82cf2490 r mcif_wb30_mask +ffffffff82cf273c r aux_mask +ffffffff82cf279c r aux_shift +ffffffff82cf27b4 r i2c_shifts +ffffffff82cf27e0 r i2c_masks +ffffffff82cf2884 r audio_shift +ffffffff82cf289c r audio_mask +ffffffff82cf28d8 r se_shift +ffffffff82cf29b4 r se_mask +ffffffff82cf2d20 r vpg_shift +ffffffff82cf2d48 r vpg_mask +ffffffff82cf2ddc r afmt_shift +ffffffff82cf2df0 r afmt_mask +ffffffff82cf2e34 r hpo_dp_se_shift +ffffffff82cf2e5c r hpo_dp_se_mask +ffffffff82cf2efc r apg_shift +ffffffff82cf2f04 r apg_mask +ffffffff82cf2f1c r hpo_dp_le_shift +ffffffff82cf2f38 r hpo_dp_le_mask +ffffffff82cf2f9c r hwseq_shift +ffffffff82cf301c r hwseq_mask +ffffffff82cf5000 R dcn10_soc_defaults +ffffffff82cf508c R dcn10_ip_defaults +ffffffff82d01000 r dml20_funcs +ffffffff82d01030 r dml20v2_funcs +ffffffff82d01060 r dml21_funcs +ffffffff82d01090 r dml30_funcs +ffffffff82d010c0 r dml31_funcs +ffffffff82d010f0 r dml314_funcs +ffffffff82d01120 r dml32_funcs +ffffffff82d04000 r qp_table_444_8bpc_max +ffffffff82d04940 r qp_table_444_8bpc_min +ffffffff82d05280 r qp_table_444_10bpc_max +ffffffff82d05ec0 r qp_table_444_10bpc_min +ffffffff82d06b00 r qp_table_444_12bpc_max +ffffffff82d07a40 r qp_table_444_12bpc_min +ffffffff82d08980 r qp_table_422_8bpc_max +ffffffff82d08ec0 r qp_table_422_8bpc_min +ffffffff82d09400 r qp_table_422_10bpc_max +ffffffff82d09b40 r qp_table_422_10bpc_min +ffffffff82d0a280 r qp_table_422_12bpc_max +ffffffff82d0abc0 r qp_table_422_12bpc_min +ffffffff82d0b500 r qp_table_420_8bpc_max +ffffffff82d0b940 r qp_table_420_8bpc_min +ffffffff82d0bd80 r qp_table_420_10bpc_max +ffffffff82d0c340 r qp_table_420_10bpc_min +ffffffff82d0c900 r qp_table_420_12bpc_max +ffffffff82d0d040 r qp_table_420_12bpc_min ffffffff82d0f000 r funcs +ffffffff82d0f050 r hpd_regs +ffffffff82d0f1a0 r hpd_shift +ffffffff82d0f1b0 r hpd_mask +ffffffff82d0f1c0 r ddc_data_regs +ffffffff82d0f3a0 r ddc_clk_regs +ffffffff82d0f580 r ddc_shift +ffffffff82d0f5a8 r ddc_mask ffffffff82d10000 r funcs -ffffffff82d10050 r hpd_regs -ffffffff82d101a0 r hpd_shift -ffffffff82d101b0 r hpd_mask -ffffffff82d101c0 r ddc_data_regs -ffffffff82d103a0 r ddc_clk_regs -ffffffff82d10580 r ddc_shift -ffffffff82d105a8 r ddc_mask ffffffff82d11000 r funcs +ffffffff82d11050 r hpd_regs +ffffffff82d111a0 r hpd_shift +ffffffff82d111b0 r hpd_mask +ffffffff82d111c0 r ddc_data_regs +ffffffff82d113a0 r ddc_clk_regs +ffffffff82d11580 r ddc_shift +ffffffff82d115a8 r ddc_mask ffffffff82d12000 r funcs -ffffffff82d12050 r hpd_regs -ffffffff82d121a0 r hpd_shift -ffffffff82d121b0 r hpd_mask -ffffffff82d121c0 r ddc_data_regs -ffffffff82d123a0 r ddc_clk_regs -ffffffff82d12580 r ddc_shift -ffffffff82d125a8 r ddc_mask ffffffff82d13000 r funcs +ffffffff82d13050 r hpd_regs +ffffffff82d131a0 r hpd_shift +ffffffff82d131b0 r hpd_mask +ffffffff82d131c0 r ddc_data_regs +ffffffff82d133a0 r ddc_clk_regs +ffffffff82d13580 r ddc_shift +ffffffff82d135a8 r ddc_mask ffffffff82d14000 r funcs -ffffffff82d14050 r hpd_regs -ffffffff82d141a0 r hpd_shift -ffffffff82d141b0 r hpd_mask -ffffffff82d141c0 r ddc_data_regs -ffffffff82d143a0 r ddc_clk_regs -ffffffff82d14580 r ddc_shift -ffffffff82d145a8 r ddc_mask -ffffffff82d145d0 r generic_regs -ffffffff82d14640 r generic_shift -ffffffff82d14650 r generic_mask ffffffff82d15000 r funcs +ffffffff82d15050 r hpd_regs +ffffffff82d151a0 r hpd_shift +ffffffff82d151b0 r hpd_mask +ffffffff82d151c0 r ddc_data_regs +ffffffff82d153a0 r ddc_clk_regs +ffffffff82d15580 r ddc_shift +ffffffff82d155a8 r ddc_mask +ffffffff82d155d0 r generic_regs +ffffffff82d15640 r generic_shift +ffffffff82d15650 r generic_mask ffffffff82d16000 r funcs -ffffffff82d16050 r hpd_regs -ffffffff82d161a0 r hpd_shift -ffffffff82d161b0 r hpd_mask -ffffffff82d161c0 r ddc_data_regs_dcn -ffffffff82d16370 r ddc_clk_regs_dcn -ffffffff82d16520 r ddc_shift -ffffffff82d16640 r ddc_mask -ffffffff82d16760 r generic_regs -ffffffff82d167d0 r generic_shift -ffffffff82d167e0 r generic_mask ffffffff82d17000 r funcs +ffffffff82d17050 r hpd_regs +ffffffff82d171a0 r hpd_shift +ffffffff82d171b0 r hpd_mask +ffffffff82d171c0 r ddc_data_regs_dcn +ffffffff82d17370 r ddc_clk_regs_dcn +ffffffff82d17520 r ddc_shift +ffffffff82d17640 r ddc_mask +ffffffff82d17760 r generic_regs +ffffffff82d177d0 r generic_shift +ffffffff82d177e0 r generic_mask ffffffff82d18000 r funcs -ffffffff82d18050 r hpd_regs -ffffffff82d18168 r hpd_shift -ffffffff82d18178 r hpd_mask -ffffffff82d18190 r ddc_data_regs_dcn -ffffffff82d182c0 r ddc_clk_regs_dcn -ffffffff82d183f0 r ddc_shift -ffffffff82d184e0 r ddc_mask -ffffffff82d185d0 r generic_regs -ffffffff82d18604 r generic_shift -ffffffff82d1860c r generic_mask ffffffff82d19000 r funcs +ffffffff82d19050 r hpd_regs +ffffffff82d19168 r hpd_shift +ffffffff82d19178 r hpd_mask +ffffffff82d19190 r ddc_data_regs_dcn +ffffffff82d192c0 r ddc_clk_regs_dcn +ffffffff82d193f0 r ddc_shift +ffffffff82d194e0 r ddc_mask +ffffffff82d195d0 r generic_regs +ffffffff82d19604 r generic_shift +ffffffff82d1960c r generic_mask ffffffff82d1a000 r funcs -ffffffff82d1a050 r hpd_regs -ffffffff82d1a1a0 r hpd_shift -ffffffff82d1a1b0 r hpd_mask -ffffffff82d1a1c0 r ddc_data_regs_dcn -ffffffff82d1a370 r ddc_clk_regs_dcn -ffffffff82d1a520 r ddc_shift -ffffffff82d1a640 r ddc_mask -ffffffff82d1a760 r generic_regs -ffffffff82d1a7d0 r generic_shift -ffffffff82d1a7e0 r generic_mask ffffffff82d1b000 r funcs +ffffffff82d1b050 r hpd_regs +ffffffff82d1b1a0 r hpd_shift +ffffffff82d1b1b0 r hpd_mask +ffffffff82d1b1c0 r ddc_data_regs_dcn +ffffffff82d1b370 r ddc_clk_regs_dcn +ffffffff82d1b520 r ddc_shift +ffffffff82d1b640 r ddc_mask +ffffffff82d1b760 r generic_regs +ffffffff82d1b7d0 r generic_shift +ffffffff82d1b7e0 r generic_mask ffffffff82d1c000 r funcs -ffffffff82d1c050 r hpd_regs -ffffffff82d1c168 r hpd_shift -ffffffff82d1c178 r hpd_mask -ffffffff82d1c190 r ddc_data_regs_dcn -ffffffff82d1c300 r ddc_clk_regs_dcn -ffffffff82d1c470 r ddc_shift -ffffffff82d1c560 r ddc_mask -ffffffff82d1c650 r generic_regs -ffffffff82d1c6c0 r generic_shift -ffffffff82d1c6d0 r generic_mask ffffffff82d1d000 r funcs +ffffffff82d1d050 r hpd_regs +ffffffff82d1d168 r hpd_shift +ffffffff82d1d178 r hpd_mask +ffffffff82d1d190 r ddc_data_regs_dcn +ffffffff82d1d300 r ddc_clk_regs_dcn +ffffffff82d1d470 r ddc_shift +ffffffff82d1d560 r ddc_mask +ffffffff82d1d650 r generic_regs +ffffffff82d1d6c0 r generic_shift +ffffffff82d1d6d0 r generic_mask ffffffff82d1e000 r funcs -ffffffff82d1e050 r hpd_regs -ffffffff82d1e168 r hpd_shift -ffffffff82d1e178 r hpd_mask -ffffffff82d1e190 r ddc_data_regs_dcn -ffffffff82d1e340 r ddc_clk_regs_dcn -ffffffff82d1e4f0 r ddc_shift -ffffffff82d1e610 r ddc_mask -ffffffff82d1e730 r generic_regs -ffffffff82d1e7a0 r generic_shift -ffffffff82d1e7b0 r generic_mask ffffffff82d1f000 r funcs +ffffffff82d1f050 r hpd_regs +ffffffff82d1f168 r hpd_shift +ffffffff82d1f178 r hpd_mask +ffffffff82d1f190 r ddc_data_regs_dcn +ffffffff82d1f340 r ddc_clk_regs_dcn +ffffffff82d1f4f0 r ddc_shift +ffffffff82d1f610 r ddc_mask +ffffffff82d1f730 r generic_regs +ffffffff82d1f7a0 r generic_shift +ffffffff82d1f7b0 r generic_mask ffffffff82d20000 r funcs ffffffff82d21000 r funcs ffffffff82d22000 r funcs -ffffffff82d23000 r hdmi_14_protection -ffffffff82d23010 r dp_11_protection -ffffffff82d23020 r hdcp_i2c_offsets -ffffffff82d23050 r hdcp_dpcd_addrs -ffffffff82d24000 r irq_service_funcs_dce110 -ffffffff82d24008 r dummy_irq_info_funcs -ffffffff82d24018 r hpd_irq_info_funcs -ffffffff82d24028 r hpd_rx_irq_info_funcs -ffffffff82d24038 r pflip_irq_info_funcs -ffffffff82d24048 r vupdate_irq_info_funcs -ffffffff82d24058 r vblank_irq_info_funcs -ffffffff82d24070 r irq_source_info_dce110 -ffffffff82d26000 r irq_service_funcs_dce120 -ffffffff82d26008 r dummy_irq_info_funcs -ffffffff82d26018 r hpd_irq_info_funcs -ffffffff82d26028 r hpd_rx_irq_info_funcs -ffffffff82d26038 r pflip_irq_info_funcs -ffffffff82d26048 r vupdate_irq_info_funcs -ffffffff82d26058 r vblank_irq_info_funcs -ffffffff82d26070 r irq_source_info_dce120 -ffffffff82d28000 r irq_service_funcs_dce80 -ffffffff82d28008 r dummy_irq_info_funcs -ffffffff82d28018 r hpd_irq_info_funcs -ffffffff82d28028 r hpd_rx_irq_info_funcs -ffffffff82d28038 r pflip_irq_info_funcs -ffffffff82d28048 r vupdate_irq_info_funcs -ffffffff82d28058 r vblank_irq_info_funcs -ffffffff82d28070 r irq_source_info_dce80 -ffffffff82d2a000 r irq_service_funcs_dcn10 -ffffffff82d2a008 r dummy_irq_info_funcs -ffffffff82d2a018 r hpd_irq_info_funcs -ffffffff82d2a028 r hpd_rx_irq_info_funcs -ffffffff82d2a038 r pflip_irq_info_funcs -ffffffff82d2a048 r vupdate_no_lock_irq_info_funcs -ffffffff82d2a058 r vblank_irq_info_funcs -ffffffff82d2a068 r vline0_irq_info_funcs -ffffffff82d2a080 r irq_source_info_dcn10 -ffffffff82d2c000 r irq_service_funcs_dcn20 -ffffffff82d2c008 r dummy_irq_info_funcs -ffffffff82d2c018 r hpd_irq_info_funcs -ffffffff82d2c028 r hpd_rx_irq_info_funcs -ffffffff82d2c038 r pflip_irq_info_funcs -ffffffff82d2c048 r vupdate_no_lock_irq_info_funcs -ffffffff82d2c058 r vblank_irq_info_funcs -ffffffff82d2c068 r vline0_irq_info_funcs -ffffffff82d2c080 r irq_source_info_dcn20 -ffffffff82d2e000 r irq_service_funcs_dcn201 -ffffffff82d2e008 r dummy_irq_info_funcs -ffffffff82d2e018 r hpd_irq_info_funcs -ffffffff82d2e028 r hpd_rx_irq_info_funcs -ffffffff82d2e038 r pflip_irq_info_funcs -ffffffff82d2e048 r vupdate_no_lock_irq_info_funcs -ffffffff82d2e058 r vblank_irq_info_funcs -ffffffff82d2e068 r vline0_irq_info_funcs -ffffffff82d2e080 r irq_source_info_dcn201 -ffffffff82d30000 r irq_source_info_dcn21 -ffffffff82d31290 r irq_service_funcs_dcn21 -ffffffff82d31298 r dummy_irq_info_funcs -ffffffff82d312a8 r hpd_irq_info_funcs -ffffffff82d312b8 r hpd_rx_irq_info_funcs -ffffffff82d312c8 r pflip_irq_info_funcs -ffffffff82d312d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d312e8 r vblank_irq_info_funcs -ffffffff82d312f8 r vline0_irq_info_funcs -ffffffff82d31308 r dmub_outbox_irq_info_funcs -ffffffff82d32000 r irq_source_info_dcn30 -ffffffff82d33290 r irq_service_funcs_dcn30 -ffffffff82d33298 r dummy_irq_info_funcs -ffffffff82d332a8 r hpd_irq_info_funcs -ffffffff82d332b8 r hpd_rx_irq_info_funcs -ffffffff82d332c8 r pflip_irq_info_funcs -ffffffff82d332d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d332e8 r vblank_irq_info_funcs -ffffffff82d332f8 r vline0_irq_info_funcs -ffffffff82d33308 r dmub_trace_irq_info_funcs -ffffffff82d34000 r irq_source_info_dcn302 -ffffffff82d35290 r irq_service_funcs_dcn302 -ffffffff82d35298 r dummy_irq_info_funcs -ffffffff82d352a8 r hpd_irq_info_funcs -ffffffff82d352b8 r hpd_rx_irq_info_funcs -ffffffff82d352c8 r pflip_irq_info_funcs -ffffffff82d352d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d352e8 r vblank_irq_info_funcs -ffffffff82d352f8 r vline0_irq_info_funcs -ffffffff82d35308 r dmub_trace_irq_info_funcs -ffffffff82d36000 r irq_service_funcs_dcn303 -ffffffff82d36008 r dummy_irq_info_funcs -ffffffff82d36018 r hpd_irq_info_funcs -ffffffff82d36028 r hpd_rx_irq_info_funcs -ffffffff82d36038 r pflip_irq_info_funcs -ffffffff82d36048 r vupdate_no_lock_irq_info_funcs -ffffffff82d36058 r vblank_irq_info_funcs -ffffffff82d36068 r vline0_irq_info_funcs -ffffffff82d36080 r irq_source_info_dcn303 -ffffffff82d38000 r irq_source_info_dcn31 -ffffffff82d39290 r irq_service_funcs_dcn31 -ffffffff82d39298 r dummy_irq_info_funcs -ffffffff82d392a8 r hpd_irq_info_funcs -ffffffff82d392b8 r hpd_rx_irq_info_funcs -ffffffff82d392c8 r pflip_irq_info_funcs -ffffffff82d392d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d392e8 r vblank_irq_info_funcs -ffffffff82d392f8 r vline0_irq_info_funcs -ffffffff82d39308 r outbox_irq_info_funcs -ffffffff82d3a000 r irq_source_info_dcn314 -ffffffff82d3b290 r irq_service_funcs_dcn314 -ffffffff82d3b298 r dummy_irq_info_funcs -ffffffff82d3b2a8 r hpd_irq_info_funcs -ffffffff82d3b2b8 r hpd_rx_irq_info_funcs -ffffffff82d3b2c8 r pflip_irq_info_funcs -ffffffff82d3b2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d3b2e8 r vblank_irq_info_funcs -ffffffff82d3b2f8 r vline0_irq_info_funcs -ffffffff82d3b308 r outbox_irq_info_funcs -ffffffff82d3c000 r irq_source_info_dcn315 -ffffffff82d3d290 r irq_service_funcs_dcn315 -ffffffff82d3d298 r dummy_irq_info_funcs -ffffffff82d3d2a8 r hpd_irq_info_funcs -ffffffff82d3d2b8 r hpd_rx_irq_info_funcs -ffffffff82d3d2c8 r pflip_irq_info_funcs -ffffffff82d3d2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d3d2e8 r vblank_irq_info_funcs -ffffffff82d3d2f8 r vline0_irq_info_funcs -ffffffff82d3d308 r outbox_irq_info_funcs -ffffffff82d3e000 r irq_source_info_dcn32 -ffffffff82d3f290 r irq_service_funcs_dcn32 -ffffffff82d3f298 r dummy_irq_info_funcs -ffffffff82d3f2a8 r hpd_irq_info_funcs -ffffffff82d3f2b8 r hpd_rx_irq_info_funcs -ffffffff82d3f2c8 r pflip_irq_info_funcs -ffffffff82d3f2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82d3f2e8 r vblank_irq_info_funcs -ffffffff82d3f2f8 r vline0_irq_info_funcs -ffffffff82d3f308 r outbox_irq_info_funcs -ffffffff82d41000 r dio_link_hwss -ffffffff82d42000 r dio_fixed_vs_pe_retimer_link_hwss -ffffffff82d43000 r dpia_link_hwss -ffffffff82d44000 r hpo_dp_link_hwss -ffffffff82d45000 r hpo_fixed_vs_pe_retimer_dp_link_hwss -ffffffff82d46000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82d47000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82d47006 r DP_DVI_CONVERTER_ID_4 -ffffffff82d4700d r DP_DVI_CONVERTER_ID_5 -ffffffff82d48000 r dp_lt_fallbacks -ffffffff82d4c000 r mandatory_dpcd_partitions -ffffffff82d4d000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82d4d007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82d4e000 r virtual_lnk_enc_funcs -ffffffff82d4f000 r virtual_link_hwss -ffffffff82d50000 r virtual_str_enc_funcs -ffffffff82d51000 R dmub_srv_dcn20_regs -ffffffff82d52000 R dmub_srv_dcn21_regs -ffffffff82d53000 R dmub_srv_dcn30_regs -ffffffff82d54000 R dmub_srv_dcn301_regs -ffffffff82d55000 R dmub_srv_dcn302_regs -ffffffff82d56000 R dmub_srv_dcn303_regs -ffffffff82d57000 R dmub_srv_dcn31_regs -ffffffff82d58000 R dmub_srv_dcn314_regs -ffffffff82d59000 R dmub_srv_dcn315_regs -ffffffff82d5a000 R dmub_srv_dcn316_regs -ffffffff82d5b000 R dmub_srv_dcn32_regs -ffffffff82d5c000 r numerator01 -ffffffff82d5c020 r numerator02 -ffffffff82d5c040 r numerator04 -ffffffff82d5c060 r numerator05 -ffffffff82d60000 r abm_settings -ffffffff82d60020 r abm_settings_config0 -ffffffff82d60060 r abm_settings_config1 -ffffffff82d600a0 r abm_settings_config2 -ffffffff82d600d8 r min_reduction_table_v_2_2 -ffffffff82d600e5 r max_reduction_table_v_2_2 -ffffffff82d600f2 r min_reduction_table -ffffffff82d600ff r max_reduction_table -ffffffff82d60110 r custom_backlight_curve0 -ffffffff82d61000 R amdgpu_pp_profile_name -ffffffff82d62000 r pp_lib_thermal_controller_names -ffffffff82d63000 r pp_ip_funcs -ffffffff82d630a0 R pp_smu_ip_block -ffffffff82d630b8 r pp_dpm_funcs -ffffffff82d64000 r gpio_tbl -ffffffff82d640f0 r enable_fb_req_rej_tbl -ffffffff82d64140 r use_bclk_tbl -ffffffff82d64310 r turn_off_plls_tbl -ffffffff82d64640 r enter_baco_tbl -ffffffff82d64730 r exit_baco_tbl -ffffffff82d64850 r clean_baco_tbl +ffffffff82d23000 r funcs +ffffffff82d24000 r hdmi_14_protection +ffffffff82d24010 r dp_11_protection +ffffffff82d24020 r hdcp_i2c_offsets +ffffffff82d24050 r hdcp_dpcd_addrs +ffffffff82d25000 r irq_service_funcs_dce110 +ffffffff82d25008 r dummy_irq_info_funcs +ffffffff82d25018 r hpd_irq_info_funcs +ffffffff82d25028 r hpd_rx_irq_info_funcs +ffffffff82d25038 r pflip_irq_info_funcs +ffffffff82d25048 r vupdate_irq_info_funcs +ffffffff82d25058 r vblank_irq_info_funcs +ffffffff82d25070 r irq_source_info_dce110 +ffffffff82d27000 r irq_service_funcs_dce120 +ffffffff82d27008 r dummy_irq_info_funcs +ffffffff82d27018 r hpd_irq_info_funcs +ffffffff82d27028 r hpd_rx_irq_info_funcs +ffffffff82d27038 r pflip_irq_info_funcs +ffffffff82d27048 r vupdate_irq_info_funcs +ffffffff82d27058 r vblank_irq_info_funcs +ffffffff82d27070 r irq_source_info_dce120 +ffffffff82d29000 r irq_service_funcs_dce80 +ffffffff82d29008 r dummy_irq_info_funcs +ffffffff82d29018 r hpd_irq_info_funcs +ffffffff82d29028 r hpd_rx_irq_info_funcs +ffffffff82d29038 r pflip_irq_info_funcs +ffffffff82d29048 r vupdate_irq_info_funcs +ffffffff82d29058 r vblank_irq_info_funcs +ffffffff82d29070 r irq_source_info_dce80 +ffffffff82d2b000 r irq_service_funcs_dcn10 +ffffffff82d2b008 r dummy_irq_info_funcs +ffffffff82d2b018 r hpd_irq_info_funcs +ffffffff82d2b028 r hpd_rx_irq_info_funcs +ffffffff82d2b038 r pflip_irq_info_funcs +ffffffff82d2b048 r vupdate_no_lock_irq_info_funcs +ffffffff82d2b058 r vblank_irq_info_funcs +ffffffff82d2b068 r vline0_irq_info_funcs +ffffffff82d2b080 r irq_source_info_dcn10 +ffffffff82d2d000 r irq_service_funcs_dcn20 +ffffffff82d2d008 r dummy_irq_info_funcs +ffffffff82d2d018 r hpd_irq_info_funcs +ffffffff82d2d028 r hpd_rx_irq_info_funcs +ffffffff82d2d038 r pflip_irq_info_funcs +ffffffff82d2d048 r vupdate_no_lock_irq_info_funcs +ffffffff82d2d058 r vblank_irq_info_funcs +ffffffff82d2d068 r vline0_irq_info_funcs +ffffffff82d2d080 r irq_source_info_dcn20 +ffffffff82d2f000 r irq_service_funcs_dcn201 +ffffffff82d2f008 r dummy_irq_info_funcs +ffffffff82d2f018 r hpd_irq_info_funcs +ffffffff82d2f028 r hpd_rx_irq_info_funcs +ffffffff82d2f038 r pflip_irq_info_funcs +ffffffff82d2f048 r vupdate_no_lock_irq_info_funcs +ffffffff82d2f058 r vblank_irq_info_funcs +ffffffff82d2f068 r vline0_irq_info_funcs +ffffffff82d2f080 r irq_source_info_dcn201 +ffffffff82d31000 r irq_source_info_dcn21 +ffffffff82d32290 r irq_service_funcs_dcn21 +ffffffff82d32298 r dummy_irq_info_funcs +ffffffff82d322a8 r hpd_irq_info_funcs +ffffffff82d322b8 r hpd_rx_irq_info_funcs +ffffffff82d322c8 r pflip_irq_info_funcs +ffffffff82d322d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d322e8 r vblank_irq_info_funcs +ffffffff82d322f8 r vline0_irq_info_funcs +ffffffff82d32308 r dmub_outbox_irq_info_funcs +ffffffff82d33000 r irq_source_info_dcn30 +ffffffff82d34290 r irq_service_funcs_dcn30 +ffffffff82d34298 r dummy_irq_info_funcs +ffffffff82d342a8 r hpd_irq_info_funcs +ffffffff82d342b8 r hpd_rx_irq_info_funcs +ffffffff82d342c8 r pflip_irq_info_funcs +ffffffff82d342d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d342e8 r vblank_irq_info_funcs +ffffffff82d342f8 r vline0_irq_info_funcs +ffffffff82d34308 r dmub_trace_irq_info_funcs +ffffffff82d35000 r irq_source_info_dcn302 +ffffffff82d36290 r irq_service_funcs_dcn302 +ffffffff82d36298 r dummy_irq_info_funcs +ffffffff82d362a8 r hpd_irq_info_funcs +ffffffff82d362b8 r hpd_rx_irq_info_funcs +ffffffff82d362c8 r pflip_irq_info_funcs +ffffffff82d362d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d362e8 r vblank_irq_info_funcs +ffffffff82d362f8 r vline0_irq_info_funcs +ffffffff82d36308 r dmub_trace_irq_info_funcs +ffffffff82d37000 r irq_service_funcs_dcn303 +ffffffff82d37008 r dummy_irq_info_funcs +ffffffff82d37018 r hpd_irq_info_funcs +ffffffff82d37028 r hpd_rx_irq_info_funcs +ffffffff82d37038 r pflip_irq_info_funcs +ffffffff82d37048 r vupdate_no_lock_irq_info_funcs +ffffffff82d37058 r vblank_irq_info_funcs +ffffffff82d37068 r vline0_irq_info_funcs +ffffffff82d37080 r irq_source_info_dcn303 +ffffffff82d39000 r irq_source_info_dcn31 +ffffffff82d3a290 r irq_service_funcs_dcn31 +ffffffff82d3a298 r dummy_irq_info_funcs +ffffffff82d3a2a8 r hpd_irq_info_funcs +ffffffff82d3a2b8 r hpd_rx_irq_info_funcs +ffffffff82d3a2c8 r pflip_irq_info_funcs +ffffffff82d3a2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d3a2e8 r vblank_irq_info_funcs +ffffffff82d3a2f8 r vline0_irq_info_funcs +ffffffff82d3a308 r outbox_irq_info_funcs +ffffffff82d3b000 r irq_source_info_dcn314 +ffffffff82d3c290 r irq_service_funcs_dcn314 +ffffffff82d3c298 r dummy_irq_info_funcs +ffffffff82d3c2a8 r hpd_irq_info_funcs +ffffffff82d3c2b8 r hpd_rx_irq_info_funcs +ffffffff82d3c2c8 r pflip_irq_info_funcs +ffffffff82d3c2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d3c2e8 r vblank_irq_info_funcs +ffffffff82d3c2f8 r vline0_irq_info_funcs +ffffffff82d3c308 r outbox_irq_info_funcs +ffffffff82d3d000 r irq_source_info_dcn315 +ffffffff82d3e290 r irq_service_funcs_dcn315 +ffffffff82d3e298 r dummy_irq_info_funcs +ffffffff82d3e2a8 r hpd_irq_info_funcs +ffffffff82d3e2b8 r hpd_rx_irq_info_funcs +ffffffff82d3e2c8 r pflip_irq_info_funcs +ffffffff82d3e2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d3e2e8 r vblank_irq_info_funcs +ffffffff82d3e2f8 r vline0_irq_info_funcs +ffffffff82d3e308 r outbox_irq_info_funcs +ffffffff82d3f000 r irq_source_info_dcn32 +ffffffff82d40290 r irq_service_funcs_dcn32 +ffffffff82d40298 r dummy_irq_info_funcs +ffffffff82d402a8 r hpd_irq_info_funcs +ffffffff82d402b8 r hpd_rx_irq_info_funcs +ffffffff82d402c8 r pflip_irq_info_funcs +ffffffff82d402d8 r vupdate_no_lock_irq_info_funcs +ffffffff82d402e8 r vblank_irq_info_funcs +ffffffff82d402f8 r vline0_irq_info_funcs +ffffffff82d40308 r outbox_irq_info_funcs +ffffffff82d42000 r dio_link_hwss +ffffffff82d43000 r dio_fixed_vs_pe_retimer_link_hwss +ffffffff82d44000 r dpia_link_hwss +ffffffff82d45000 r hpo_dp_link_hwss +ffffffff82d46000 r hpo_fixed_vs_pe_retimer_dp_link_hwss +ffffffff82d47000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82d48000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82d48006 r DP_DVI_CONVERTER_ID_4 +ffffffff82d4800d r DP_DVI_CONVERTER_ID_5 +ffffffff82d49000 r dp_lt_fallbacks +ffffffff82d4d000 r mandatory_dpcd_partitions +ffffffff82d4e000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82d4e007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82d4f000 r virtual_lnk_enc_funcs +ffffffff82d50000 r virtual_link_hwss +ffffffff82d51000 r virtual_str_enc_funcs +ffffffff82d52000 R dmub_srv_dcn20_regs +ffffffff82d53000 R dmub_srv_dcn21_regs +ffffffff82d54000 R dmub_srv_dcn30_regs +ffffffff82d55000 R dmub_srv_dcn301_regs +ffffffff82d56000 R dmub_srv_dcn302_regs +ffffffff82d57000 R dmub_srv_dcn303_regs +ffffffff82d58000 R dmub_srv_dcn31_regs +ffffffff82d59000 R dmub_srv_dcn314_regs +ffffffff82d5a000 R dmub_srv_dcn315_regs +ffffffff82d5b000 R dmub_srv_dcn316_regs +ffffffff82d5c000 R dmub_srv_dcn32_regs +ffffffff82d5d000 r numerator01 +ffffffff82d5d020 r numerator02 +ffffffff82d5d040 r numerator04 +ffffffff82d5d060 r numerator05 +ffffffff82d61000 r abm_settings +ffffffff82d61020 r abm_settings_config0 +ffffffff82d61060 r abm_settings_config1 +ffffffff82d610a0 r abm_settings_config2 +ffffffff82d610d8 r min_reduction_table_v_2_2 +ffffffff82d610e5 r max_reduction_table_v_2_2 +ffffffff82d610f2 r min_reduction_table +ffffffff82d610ff r max_reduction_table +ffffffff82d61110 r custom_backlight_curve0 +ffffffff82d62000 R amdgpu_pp_profile_name +ffffffff82d63000 r pp_lib_thermal_controller_names +ffffffff82d64000 r pp_ip_funcs +ffffffff82d640a0 R pp_smu_ip_block +ffffffff82d640b8 r pp_dpm_funcs ffffffff82d65000 r gpio_tbl ffffffff82d650f0 r enable_fb_req_rej_tbl ffffffff82d65140 r use_bclk_tbl -ffffffff82d652e0 r turn_off_plls_tbl -ffffffff82d65370 r clk_req_b_tbl -ffffffff82d65490 r enter_baco_tbl -ffffffff82d655b0 r exit_baco_tbl -ffffffff82d656d0 r clean_baco_tbl +ffffffff82d65310 r turn_off_plls_tbl +ffffffff82d65640 r enter_baco_tbl +ffffffff82d65730 r exit_baco_tbl +ffffffff82d65850 r clean_baco_tbl ffffffff82d66000 r gpio_tbl ffffffff82d660f0 r enable_fb_req_rej_tbl -ffffffff82d66140 r use_bclk_tbl_vg -ffffffff82d66200 r turn_off_plls_tbl_vg -ffffffff82d66350 r use_bclk_tbl -ffffffff82d66440 r turn_off_plls_tbl -ffffffff82d665f0 r clk_req_b_tbl -ffffffff82d66710 r enter_baco_tbl -ffffffff82d66830 r exit_baco_tbl -ffffffff82d66950 r clean_baco_tbl -ffffffff82d67000 r vega10_fuses_default -ffffffff82d76000 r pp_r600_encode_lanes -ffffffff82d77000 R pptable_v1_0_funcs -ffffffff82d78000 R pptable_funcs -ffffffff82d78020 r soft_dummy_pp_table -ffffffff82d79000 r smu10_hwmgr_funcs -ffffffff82d7a000 r smu7_hwmgr_funcs -ffffffff82d7a2f8 r smu7_irq_funcs -ffffffff82d7a310 r SMU7ThermalPolicy -ffffffff82d7b000 r GCCACConfig_Polaris10 -ffffffff82d7b1b0 r DIDTConfig_Polaris10 -ffffffff82d7ba50 r GCCACConfig_Polaris11 -ffffffff82d7bc00 r DIDTConfig_Polaris11_Kicker -ffffffff82d7c4a0 r DIDTConfig_Polaris11 -ffffffff82d7cd40 r DIDTConfig_Polaris12 -ffffffff82d7d5e0 r GCCACConfig_VegaM -ffffffff82d7d790 r DIDTConfig_VegaM -ffffffff82d7f000 r smu8_hwmgr_funcs -ffffffff82d7f2f0 r SMU7ThermalPolicy -ffffffff82d80000 r smu9_irq_funcs -ffffffff82d81000 r gpio_tbl_iceland -ffffffff82d81060 r gpio_tbl -ffffffff82d81150 r enable_fb_req_rej_tbl -ffffffff82d811a0 r use_bclk_tbl -ffffffff82d81370 r turn_off_plls_tbl -ffffffff82d81610 r enter_baco_tbl -ffffffff82d81730 r exit_baco_tbl_iceland -ffffffff82d81870 r clean_baco_tbl_iceland -ffffffff82d81890 r exit_baco_tbl -ffffffff82d819b0 r clean_baco_tbl -ffffffff82d82000 r pre_baco_tbl -ffffffff82d82090 r enter_baco_tbl -ffffffff82d822b0 r exit_baco_tbl -ffffffff82d82520 r clean_baco_tbl -ffffffff82d83000 r vega10_hwmgr_funcs -ffffffff82d832f0 r channel_number -ffffffff82d83320 r SMU7ThermalWithDelayPolicy -ffffffff82d84000 r SEDiDtStallCtrlConfig_vega10 -ffffffff82d84110 r SEDiDtStallPatternConfig_vega10 -ffffffff82d842e0 r SEDiDtWeightConfig_Vega10 -ffffffff82d843b0 r SEDiDtCtrl1Config_Vega10 -ffffffff82d84440 r SEDiDtCtrl2Config_Vega10 -ffffffff82d84510 r SEDiDtCtrl3Config_vega10 -ffffffff82d84820 r SEDiDtTuningCtrlConfig_Vega10 -ffffffff82d848b0 r SELCacConfig_Vega10 -ffffffff82d84a40 r SEDiDtCtrl0Config_Vega10 -ffffffff82d84d10 r AvfsPSMInitConfig_vega10 -ffffffff82d84d90 r SEEDCStallPatternConfig_Vega10 -ffffffff82d84ea0 r SEEDCStallDelayConfig_Vega10 -ffffffff82d84f80 r SEEDCCtrlConfig_Vega10 -ffffffff82d85040 r PSMSEEDCStallPatternConfig_Vega10 -ffffffff82d850c0 r PSMSEEDCStallDelayConfig_Vega10 -ffffffff82d851d0 r PSMSEEDCCtrlResetConfig_Vega10 -ffffffff82d85290 r PSMSEEDCCtrlConfig_Vega10 -ffffffff82d85350 r SEEDCForceStallPatternConfig_Vega10 -ffffffff82d853e0 r SEEDCCtrlForceStallConfig_Vega10 -ffffffff82d86000 R vega10_pptable_funcs -ffffffff82d87000 r pre_baco_tbl -ffffffff82d87090 r enter_baco_tbl -ffffffff82d872b0 r exit_baco_tbl -ffffffff82d87520 r clean_baco_tbl -ffffffff82d88000 r vega12_hwmgr_funcs -ffffffff82d882f0 r SMU7ThermalWithDelayPolicy -ffffffff82d88340 r link_width -ffffffff82d89000 R vega12_pptable_funcs -ffffffff82d8a000 r clean_baco_tbl -ffffffff82d8b000 r vega20_hwmgr_funcs -ffffffff82d8b2f0 r SMU7ThermalWithDelayPolicy -ffffffff82d8b340 r link_width -ffffffff82d8c000 R vega20_pptable_funcs -ffffffff82d8d000 R ci_smu_funcs -ffffffff82d8d0e0 r defaults_hawaii_pro -ffffffff82d8d12c r defaults_hawaii_xt -ffffffff82d8d178 r defaults_saturn_xt -ffffffff82d8d1c4 r defaults_bonaire_xt -ffffffff82d8d210 r ci_program_jump_on_start.data -ffffffff82d8e000 R fiji_smu_funcs -ffffffff82d8e0e0 r avfs_graphics_level -ffffffff82d8e240 r fiji_power_tune_data_set_array -ffffffff82d8e246 r fiji_clock_stretch_amount_conversion -ffffffff82d8e260 r fiji_clock_stretcher_ddt_table -ffffffff82d8f000 R iceland_smu_funcs -ffffffff82d8f0e0 r defaults_icelandxt -ffffffff82d8f12c r defaults_icelandpro -ffffffff82d8f178 r defaults_iceland -ffffffff82d90000 R polaris10_smu_funcs -ffffffff82d900e0 r avfs_graphics_level_polaris10 -ffffffff82d902a0 r avfs_memory_level_polaris10 -ffffffff82d902c0 r polaris10_power_tune_data_set_array -ffffffff82d90310 r Range_Table -ffffffff82d91000 R smu10_smu_funcs -ffffffff82d92000 r smu7_program_jump_on_start.data -ffffffff82d92010 r pwr_virus_table_pre -ffffffff82d92680 r pwr_virus_table_post -ffffffff82d92f80 r pwr_virus_section1 -ffffffff82d93610 r pwr_virus_section2 -ffffffff82d93660 r pwr_virus_section3 -ffffffff82d9aab0 r pwr_virus_section4 -ffffffff82d9ae80 r pwr_virus_section5 -ffffffff82d9b490 r pwr_virus_section6 -ffffffff82d9d000 R smu8_smu_funcs -ffffffff82d9e000 R tonga_smu_funcs -ffffffff82d9e0e0 r tonga_power_tune_data_set_array -ffffffff82d9e12c r tonga_clock_stretch_amount_conversion -ffffffff82d9e140 r tonga_clock_stretcher_ddt_table -ffffffff82d9f000 R vega10_smu_funcs -ffffffff82da0000 R vega12_smu_funcs -ffffffff82da1000 R vega20_smu_funcs -ffffffff82da2000 R vegam_smu_funcs -ffffffff82da20e0 r vegam_power_tune_data_set_array -ffffffff82da2130 r Range_Table -ffffffff82da3000 R smu_ip_funcs -ffffffff82da30a0 R smu_v11_0_ip_block -ffffffff82da30b8 R smu_v12_0_ip_block -ffffffff82da30d0 R smu_v13_0_ip_block -ffffffff82da30e8 r swsmu_pm_funcs -ffffffff82da4000 r arcturus_ppt_funcs -ffffffff82da43f0 r arcturus_table_map -ffffffff82da4470 r arcturus_pwr_src_map -ffffffff82da4480 r arcturus_workload_map -ffffffff82da44d0 r smu11_thermal_policy -ffffffff82da4528 r arcturus_i2c_algo -ffffffff82da4538 r arcturus_i2c_control_quirks -ffffffff82da4550 r arcturus_throttler_map -ffffffff82da4570 r arcturus_message_map -ffffffff82da4ff0 r arcturus_clk_map -ffffffff82da50b0 r arcturus_feature_mask_map -ffffffff82da6000 r cyan_skillfish_ppt_funcs -ffffffff82da7000 r navi10_ppt_funcs -ffffffff82da73f0 r smu11_thermal_policy -ffffffff82da7448 r navi10_i2c_algo -ffffffff82da7458 r navi10_i2c_control_quirks -ffffffff82da7470 r navi1x_throttler_map -ffffffff82da7490 r NoDbiPrbs7 -ffffffff82da8490 r DbiPrbs7 -ffffffff82daa000 r sienna_cichlid_ppt_funcs -ffffffff82daa3f0 r smu11_thermal_policy -ffffffff82daa448 r sienna_cichlid_i2c_algo -ffffffff82daa458 r sienna_cichlid_i2c_control_quirks -ffffffff82daa470 r sienna_cichlid_throttler_map -ffffffff82dab000 r smu_v11_0_irq_funcs -ffffffff82dab010 r link_width -ffffffff82dac000 r vangogh_ppt_funcs -ffffffff82dac3e8 r vangogh_throttler_map -ffffffff82dad000 r renoir_ppt_funcs -ffffffff82dad3e8 r renoir_throttler_map -ffffffff82dae000 r aldebaran_ppt_funcs -ffffffff82dae3f0 r aldebaran_clk_map -ffffffff82dae4b0 r aldebaran_table_map -ffffffff82dae530 r smu13_thermal_policy -ffffffff82dae588 r aldebaran_i2c_algo -ffffffff82dae598 r aldebaran_i2c_control_quirks -ffffffff82dae5b0 r aldebaran_throttler_map -ffffffff82dae5d0 r aldebaran_message_map -ffffffff82daf050 r aldebaran_feature_mask_map -ffffffff82db0000 R pmfw_decoded_link_speed -ffffffff82db0020 R pmfw_decoded_link_width -ffffffff82db0040 r smu_v13_0_irq_funcs -ffffffff82db1000 r smu_v13_0_0_ppt_funcs -ffffffff82db13f0 r smu13_thermal_policy -ffffffff82db1448 r smu_v13_0_0_i2c_algo -ffffffff82db1458 r smu_v13_0_0_i2c_control_quirks -ffffffff82db1470 r smu_v13_0_0_throttler_map -ffffffff82db2000 r smu_v13_0_4_ppt_funcs -ffffffff82db3000 r smu_v13_0_5_ppt_funcs -ffffffff82db4000 r smu_v13_0_6_ppt_funcs -ffffffff82db43f0 r smu_v13_0_6_message_map -ffffffff82db4e70 r smu_v13_0_6_clk_map -ffffffff82db4f30 r smu_v13_0_6_table_map -ffffffff82db4fb0 r smu_v13_0_6_i2c_algo -ffffffff82db4fc0 r smu_v13_0_6_i2c_control_quirks -ffffffff82db4fd0 r smu_v13_0_6_irq_funcs -ffffffff82db4fe0 r smu_v13_0_6_throttler_map -ffffffff82db4ff0 r smu_v13_0_6_feature_mask_map -ffffffff82db6000 r smu_v13_0_7_ppt_funcs -ffffffff82db63f0 r smu13_thermal_policy -ffffffff82db6450 r smu_v13_0_7_throttler_map -ffffffff82db7000 r yellow_carp_ppt_funcs -ffffffff82db8000 R link_speed -ffffffff82db8020 r __smu_message_names -ffffffff82db9000 R pchb_ca -ffffffff82dba000 R amas_ca -ffffffff82dba028 R amas_devices -ffffffff82dba040 r amas_feature -ffffffff82dbb000 R cardslot_ca -ffffffff82dbc000 R cardbus_ca -ffffffff82dbd000 R com_cardbus_ca -ffffffff82dbe000 R xl_cardbus_ca -ffffffff82dbe030 R xl_cardbus_products -ffffffff82dbf000 R dc_cardbus_ca -ffffffff82dbf030 R dc_cardbus_devices -ffffffff82dc0000 R fxp_cardbus_ca -ffffffff82dc0028 R fxp_cardbus_devices -ffffffff82dc1000 R rl_cardbus_devices -ffffffff82dc1028 R rl_cardbus_ca -ffffffff82dc2000 R re_cardbus_ca -ffffffff82dc2028 R re_cardbus_devices -ffffffff82dc3000 R ath_cardbus_ca -ffffffff82dc4000 R athn_cardbus_ca -ffffffff82dc4030 r athn_cardbus_devices -ffffffff82dc5000 R atw_cardbus_ca -ffffffff82dc5028 R atw_cardbus_devices -ffffffff82dc6000 R rtw_cardbus_ca -ffffffff82dc6028 R rtw_cardbus_devices -ffffffff82dc7000 R ral_cardbus_ca -ffffffff82dc7030 r ral_cardbus_devices -ffffffff82dc8000 R acx_cardbus_ca -ffffffff82dc8028 r acx_cardbus_devices -ffffffff82dc9000 R pgt_cardbus_ca -ffffffff82dc9028 R pgt_cardbus_devices -ffffffff82dca000 R ehci_cardbus_ca -ffffffff82dcb000 R ohci_cardbus_ca -ffffffff82dcc000 R uhci_cardbus_ca -ffffffff82dcd000 R malo_cardbus_ca -ffffffff82dcd028 r malo_cardbus_devices -ffffffff82dce000 R bwi_cardbus_ca -ffffffff82dce030 r bwi_cardbus_devices -ffffffff82dcf000 R pcmcia_ca -ffffffff82dd0000 r pcmcia_parse_cis_tuple.init_cfe -ffffffff82dd1000 r pcmcia_cis_quirks -ffffffff82dd2000 R ep_pcmcia_ca -ffffffff82dd3000 R ne_pcmcia_ca -ffffffff82dd3030 R ne2000devs -ffffffff82dd5000 R aic_pcmcia_ca -ffffffff82dd6000 R com_pcmcia_ca -ffffffff82dd7000 R wdc_pcmcia_ca -ffffffff82dd8000 R sm_pcmcia_ca -ffffffff82dd9000 R xe_pcmcia_ca -ffffffff82dda000 R wi_pcmcia_ca -ffffffff82dda030 r wi_pcmcia_products -ffffffff82ddb000 R malo_pcmcia_ca -ffffffff82ddc000 R an_pcmcia_ca -ffffffff82ddd000 R pcib_ca -ffffffff82dde000 R amdpcib_ca -ffffffff82dde028 R amdpcib_devices -ffffffff82ddf000 R tcpcib_ca -ffffffff82ddf028 R tcpcib_devices -ffffffff82de0000 R aapic_ca -ffffffff82de1000 R hme_pci_ca -ffffffff82de1028 r hme_promhdr -ffffffff82de102a r hme_promdat -ffffffff82de2000 R isa_ca -ffffffff82de3000 R isadma_ca -ffffffff82de4000 R fdc_ca -ffffffff82de5000 R fd_ca -ffffffff82de6000 R com_isa_ca -ffffffff82de7000 R pckbc_isa_ca -ffffffff82de8000 R vga_isa_ca -ffffffff82de9000 R wdc_isa_ca -ffffffff82dea000 R mpu_midi_hw_if -ffffffff82deb000 R mpu_isa_ca -ffffffff82dec000 R pcppi_ca -ffffffff82ded000 R spkr_ca -ffffffff82ded030 r pitchtab -ffffffff82dee000 R lpt_isa_ca -ffffffff82def000 R wbsio_ca -ffffffff82df0000 R schsio_ca -ffffffff82df1000 R lm_isa_ca -ffffffff82df1028 R lm_wbsio_ca -ffffffff82df2000 R it_sensors -ffffffff82df2110 R it_vrfact -ffffffff82df2140 R it_fan_regs -ffffffff82df2160 R it_fan_ext_regs -ffffffff82df2178 R it_ca -ffffffff82df3000 R abitkv_sensors -ffffffff82df3200 R abitaa_sensors -ffffffff82df3480 R abitav_sensors -ffffffff82df3700 R abitas_sensors -ffffffff82df3980 R abitax_sensors -ffffffff82df3bc0 R abitm4_sensors -ffffffff82df3e80 R abitan_sensors -ffffffff82df4120 R abital_sensors -ffffffff82df43a0 R abitaw_sensors -ffffffff82df4700 R abitni_sensors -ffffffff82df49a0 R abitat_sensors -ffffffff82df4cc0 R abitan2_sensors -ffffffff82df4f60 R abitab_sensors -ffffffff82df5220 R abitan3_sensors -ffffffff82df5500 R abitaw2_sensors -ffffffff82df5860 R abitat2_sensors -ffffffff82df5b60 R abitab2_sensors -ffffffff82df5ea0 R abitin_sensors -ffffffff82df61e0 R uguru_ca -ffffffff82df7000 R aps_ca -ffffffff82df8000 R wsdisplay_emul_ca -ffffffff82df8030 r charClass -ffffffff82df9000 r usl_syncops -ffffffff82dfa000 R wsevent_filtops -ffffffff82dfb000 R wskbd_ca -ffffffff82dfc000 r latin1_to_upper -ffffffff82dfd000 R wsmouse_ca -ffffffff82dfe000 R cyrillic_to_koi8 -ffffffff82dfe060 R unicode_to_latin2 -ffffffff82dfe0e0 R unicode_to_latin7 -ffffffff82dff000 R wsemul_vt100_ops -ffffffff82e00000 r decspcgr2uni -ffffffff82e00100 r dectech2uni -ffffffff82e00200 r nrctable -ffffffff82e01000 r vt100_fkeys -ffffffff82e010c0 r vt100_pfkeys -ffffffff82e010e0 r vt100_numpad -ffffffff82e02000 R pckbd_ca -ffffffff82e02028 R pckbd_accessops -ffffffff82e02040 R pckbd_consops -ffffffff82e02060 R pckbd_keymapdata -ffffffff82e02070 R pckbd_xtbl2 -ffffffff82e02100 R pckbd_xtbl2_ext -ffffffff82e03000 r pckbd_keydesc_us -ffffffff82e03250 r pckbd_keydesc_de -ffffffff82e032f0 r pckbd_keydesc_de_nodead -ffffffff82e03310 r pckbd_keydesc_fr -ffffffff82e033d0 r pckbd_keydesc_fr_dvorak_bepo -ffffffff82e03510 r pckbd_keydesc_dk -ffffffff82e035a0 r pckbd_keydesc_dk_nodead -ffffffff82e035b0 r pckbd_keydesc_it -ffffffff82e03640 r pckbd_keydesc_uk -ffffffff82e036e0 r pckbd_keydesc_jp -ffffffff82e03750 r pckbd_keydesc_sv -ffffffff82e03780 r pckbd_keydesc_sv_nodead -ffffffff82e03790 r pckbd_keydesc_no -ffffffff82e037c0 r pckbd_keydesc_no_nodead -ffffffff82e037d0 r pckbd_keydesc_us_declk -ffffffff82e03860 r pckbd_keydesc_us_dvorak -ffffffff82e03900 r pckbd_keydesc_us_colemak -ffffffff82e03948 r pckbd_keydesc_swapctrlcaps -ffffffff82e03960 r pckbd_keydesc_iopener -ffffffff82e039b0 r pckbd_keydesc_es -ffffffff82e03a50 r pckbd_keydesc_be -ffffffff82e03b10 r pckbd_keydesc_ru -ffffffff82e03c80 r pckbd_keydesc_ua -ffffffff82e03e10 r pckbd_keydesc_sg -ffffffff82e03ec0 r pckbd_keydesc_sg_nodead -ffffffff82e03ee0 r pckbd_keydesc_sf -ffffffff82e03f00 r pckbd_keydesc_pt -ffffffff82e03f90 r pckbd_keydesc_lt -ffffffff82e04070 r pckbd_keydesc_la -ffffffff82e04100 r pckbd_keydesc_br -ffffffff82e04180 r pckbd_keydesc_tr -ffffffff82e04230 r pckbd_keydesc_tr_nodead -ffffffff82e04250 r pckbd_keydesc_pl -ffffffff82e042b0 r pckbd_keydesc_hu -ffffffff82e043c0 r pckbd_keydesc_si -ffffffff82e044d0 r pckbd_keydesc_cf -ffffffff82e045a0 r pckbd_keydesc_cf_nodead -ffffffff82e045c0 r pckbd_keydesc_lv -ffffffff82e04640 r pckbd_keydesc_nl -ffffffff82e04720 r pckbd_keydesc_nl_nodead -ffffffff82e04740 r pckbd_keydesc_is -ffffffff82e047cc r pckbd_keydesc_is_nodead -ffffffff82e047e0 r pckbd_keydesc_ee -ffffffff82e04890 r pckbd_keydesc_ee_nodead -ffffffff82e048b0 R pckbd_keydesctab -ffffffff82e05000 R pms_ca -ffffffff82e05028 R pms_accessops -ffffffff82e05040 R pms_sec_accessops -ffffffff82e05060 R pms_protocols -ffffffff82e051e0 r alps_models -ffffffff82e06000 R skgpio_led_offset -ffffffff82e06008 R skgpio_ca -ffffffff82e07000 R hidkbd_trtab -ffffffff82e07100 r apple_fn_trans -ffffffff82e07120 r apple_tb_trans -ffffffff82e07140 r apple_mba_trans -ffffffff82e08000 r hidcc_attach_wskbd.accessops -ffffffff82e08020 r hidcc_keysyms -ffffffff82e09000 R usb_ca -ffffffff82e0a000 R usb_known_products -ffffffff82e15f90 R usb_known_vendors -ffffffff82e187b0 R usbd_error_strs -ffffffff82e19000 R usb_quirks -ffffffff82e19390 R usb_dev_quirks -ffffffff82e19398 R usbd_no_quirk -ffffffff82e1a000 R uhub_ca -ffffffff82e1a028 R uhub_uhub_ca -ffffffff82e1b000 R uaudio_ca -ffffffff82e1b028 R uaudio_hw_if -ffffffff82e1b0e0 R uaudio_rates -ffffffff82e1b120 r uaudio_clkname.names -ffffffff82e1b140 r uaudio_feature_addent.features -ffffffff82e1c000 R uvideo_ca -ffffffff82e1c028 R uvideo_hw_if -ffffffff82e1c100 R uvideo_devs -ffffffff82e1d000 r utvfu_select_norm.pal -ffffffff82e1d040 r utvfu_select_norm.ntsc -ffffffff82e1d080 r utvfu_setup_capture.setup -ffffffff82e1d180 r utvfu_audio_start_chip.setup -ffffffff82e1d1c8 r utvfu_audio_stop_chip.setup -ffffffff82e1d1d8 R utvfu_ca -ffffffff82e1d200 R utvfu_vid_hw_if -ffffffff82e1d2d0 R utvfu_au_hw_if -ffffffff82e1e000 R udl_ca -ffffffff82e1e030 r udl_devs -ffffffff82e1e0b0 r udl_modes -ffffffff82e1f000 R umidi_hw_if -ffffffff82e1f030 R umidi_ca -ffffffff82e1f060 r umidi_evlen -ffffffff82e1f080 r packet_length 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ipsend_task -ffffffff83264090 d ipsendraw_task -ffffffff83265000 D ip_mrtproto -ffffffff83265004 d sin -ffffffff83266000 D rip_sendspace -ffffffff83266008 D rip_recvspace -ffffffff83267000 D tcprexmtthresh -ffffffff83267004 D tcptv_keep_init -ffffffff83267008 D tcp_rst_ppslim -ffffffff8326700c D tcp_ackdrop_ppslim -ffffffff83267010 D tcp_syn_hash_size -ffffffff83267014 D tcp_syn_cache_limit -ffffffff83267018 D tcp_syn_bucket_limit -ffffffff8326701c D tcp_syn_use_limit -ffffffff83267020 D syn_cache_mtx -ffffffff83268000 D tcp_outflags -ffffffff83269000 D tcp_timer_mtx -ffffffff83269010 D tcp_mssdflt -ffffffff83269014 D tcp_rttdflt -ffffffff83269018 D tcp_do_rfc1323 -ffffffff8326901c D tcp_do_sack -ffffffff83269020 D tcp_do_rfc3390 -ffffffff83269024 D tcp_do_tso -ffffffff83269028 D tcp_reass_limit -ffffffff8326902c D tcp_sackhole_limit -ffffffff8326a000 D tcp_backoff -ffffffff8326a034 D tcp_totbackoff -ffffffff8326b000 D tcp_sendspace -ffffffff8326b004 D tcp_recvspace -ffffffff8326b008 D tcp_autorcvbuf_inc -ffffffff8326c000 D udpcksum -ffffffff8326c004 D udp_sendspace -ffffffff8326c008 D udp_recvspace -ffffffff8326d000 D ipsec_flows_mtx -ffffffff8326d010 D ipsec_ids_idle -ffffffff8326d014 D ipsec_ids_next_flow -ffffffff8326d018 D ipsec_policy_head -ffffffff8326d028 D ipsp_ids_gc_timeout -ffffffff8326d070 D tdb_sadb_mtx -ffffffff8326d080 d tdb_hashmask -ffffffff8326e000 D ipo_tdb_mtx -ffffffff8326e010 D ipsec_acquire_mtx -ffffffff8326e020 D ipsec_acquire_head -ffffffff8326f000 D ipsec_keep_invalid -ffffffff8326f004 D ipsec_require_pfs -ffffffff8326f008 D ipsec_soft_timeout -ffffffff8326f00c D ipsec_exp_timeout -ffffffff8326f010 D ipsec_soft_first_use -ffffffff8326f014 D ipsec_exp_first_use -ffffffff8326f018 D ipsec_expire_acquire -ffffffff8326f01c D esp_enable -ffffffff8326f020 D ah_enable -ffffffff83270000 D udpencap_enable -ffffffff83270004 D udpencap_port -ffffffff83271000 D carp_vh_rc -ffffffff83271020 D carp_sc_rc -ffffffff83271040 D carp_opts -ffffffff83271058 D carp_cloner -ffffffff83271088 d carp_send_na.mcast -ffffffff83272000 d PADDING +ffffffff82d66140 r use_bclk_tbl +ffffffff82d662e0 r turn_off_plls_tbl +ffffffff82d66370 r clk_req_b_tbl +ffffffff82d66490 r enter_baco_tbl +ffffffff82d665b0 r exit_baco_tbl +ffffffff82d666d0 r clean_baco_tbl +ffffffff82d67000 r gpio_tbl +ffffffff82d670f0 r enable_fb_req_rej_tbl +ffffffff82d67140 r use_bclk_tbl_vg +ffffffff82d67200 r turn_off_plls_tbl_vg +ffffffff82d67350 r use_bclk_tbl +ffffffff82d67440 r turn_off_plls_tbl +ffffffff82d675f0 r clk_req_b_tbl +ffffffff82d67710 r enter_baco_tbl +ffffffff82d67830 r exit_baco_tbl +ffffffff82d67950 r clean_baco_tbl +ffffffff82d68000 r vega10_fuses_default +ffffffff82d77000 r pp_r600_encode_lanes +ffffffff82d78000 R pptable_v1_0_funcs +ffffffff82d79000 R pptable_funcs +ffffffff82d79020 r soft_dummy_pp_table +ffffffff82d7a000 r smu10_hwmgr_funcs +ffffffff82d7b000 r smu7_hwmgr_funcs +ffffffff82d7b2f8 r smu7_irq_funcs +ffffffff82d7b310 r SMU7ThermalPolicy +ffffffff82d7c000 r GCCACConfig_Polaris10 +ffffffff82d7c1b0 r DIDTConfig_Polaris10 +ffffffff82d7ca50 r GCCACConfig_Polaris11 +ffffffff82d7cc00 r DIDTConfig_Polaris11_Kicker +ffffffff82d7d4a0 r DIDTConfig_Polaris11 +ffffffff82d7dd40 r DIDTConfig_Polaris12 +ffffffff82d7e5e0 r GCCACConfig_VegaM +ffffffff82d7e790 r DIDTConfig_VegaM +ffffffff82d80000 r smu8_hwmgr_funcs +ffffffff82d802f0 r SMU7ThermalPolicy +ffffffff82d81000 r smu9_irq_funcs +ffffffff82d82000 r gpio_tbl_iceland +ffffffff82d82060 r gpio_tbl +ffffffff82d82150 r enable_fb_req_rej_tbl +ffffffff82d821a0 r use_bclk_tbl +ffffffff82d82370 r turn_off_plls_tbl +ffffffff82d82610 r enter_baco_tbl +ffffffff82d82730 r exit_baco_tbl_iceland +ffffffff82d82870 r clean_baco_tbl_iceland +ffffffff82d82890 r exit_baco_tbl +ffffffff82d829b0 r clean_baco_tbl +ffffffff82d83000 r pre_baco_tbl +ffffffff82d83090 r enter_baco_tbl +ffffffff82d832b0 r exit_baco_tbl +ffffffff82d83520 r clean_baco_tbl +ffffffff82d84000 r vega10_hwmgr_funcs +ffffffff82d842f0 r channel_number +ffffffff82d84320 r SMU7ThermalWithDelayPolicy +ffffffff82d85000 r SEDiDtStallCtrlConfig_vega10 +ffffffff82d85110 r SEDiDtStallPatternConfig_vega10 +ffffffff82d852e0 r SEDiDtWeightConfig_Vega10 +ffffffff82d853b0 r SEDiDtCtrl1Config_Vega10 +ffffffff82d85440 r SEDiDtCtrl2Config_Vega10 +ffffffff82d85510 r SEDiDtCtrl3Config_vega10 +ffffffff82d85820 r SEDiDtTuningCtrlConfig_Vega10 +ffffffff82d858b0 r SELCacConfig_Vega10 +ffffffff82d85a40 r SEDiDtCtrl0Config_Vega10 +ffffffff82d85d10 r AvfsPSMInitConfig_vega10 +ffffffff82d85d90 r SEEDCStallPatternConfig_Vega10 +ffffffff82d85ea0 r SEEDCStallDelayConfig_Vega10 +ffffffff82d85f80 r SEEDCCtrlConfig_Vega10 +ffffffff82d86040 r PSMSEEDCStallPatternConfig_Vega10 +ffffffff82d860c0 r PSMSEEDCStallDelayConfig_Vega10 +ffffffff82d861d0 r PSMSEEDCCtrlResetConfig_Vega10 +ffffffff82d86290 r PSMSEEDCCtrlConfig_Vega10 +ffffffff82d86350 r SEEDCForceStallPatternConfig_Vega10 +ffffffff82d863e0 r SEEDCCtrlForceStallConfig_Vega10 +ffffffff82d87000 R vega10_pptable_funcs +ffffffff82d88000 r pre_baco_tbl +ffffffff82d88090 r enter_baco_tbl +ffffffff82d882b0 r exit_baco_tbl +ffffffff82d88520 r clean_baco_tbl +ffffffff82d89000 r vega12_hwmgr_funcs +ffffffff82d892f0 r SMU7ThermalWithDelayPolicy +ffffffff82d89340 r link_width +ffffffff82d8a000 R vega12_pptable_funcs +ffffffff82d8b000 r clean_baco_tbl +ffffffff82d8c000 r vega20_hwmgr_funcs +ffffffff82d8c2f0 r SMU7ThermalWithDelayPolicy +ffffffff82d8c340 r link_width +ffffffff82d8d000 R vega20_pptable_funcs +ffffffff82d8e000 R ci_smu_funcs +ffffffff82d8e0e0 r defaults_hawaii_pro +ffffffff82d8e12c r defaults_hawaii_xt +ffffffff82d8e178 r defaults_saturn_xt +ffffffff82d8e1c4 r defaults_bonaire_xt +ffffffff82d8e210 r ci_program_jump_on_start.data +ffffffff82d8f000 R fiji_smu_funcs +ffffffff82d8f0e0 r avfs_graphics_level +ffffffff82d8f240 r fiji_power_tune_data_set_array +ffffffff82d8f246 r fiji_clock_stretch_amount_conversion +ffffffff82d8f260 r fiji_clock_stretcher_ddt_table +ffffffff82d90000 R iceland_smu_funcs +ffffffff82d900e0 r defaults_icelandxt +ffffffff82d9012c r defaults_icelandpro +ffffffff82d90178 r defaults_iceland +ffffffff82d91000 R polaris10_smu_funcs +ffffffff82d910e0 r avfs_graphics_level_polaris10 +ffffffff82d912a0 r avfs_memory_level_polaris10 +ffffffff82d912c0 r polaris10_power_tune_data_set_array +ffffffff82d91310 r Range_Table +ffffffff82d92000 R smu10_smu_funcs +ffffffff82d93000 r smu7_program_jump_on_start.data +ffffffff82d93010 r pwr_virus_table_pre +ffffffff82d93680 r pwr_virus_table_post +ffffffff82d93f80 r pwr_virus_section1 +ffffffff82d94610 r pwr_virus_section2 +ffffffff82d94660 r pwr_virus_section3 +ffffffff82d9bab0 r pwr_virus_section4 +ffffffff82d9be80 r pwr_virus_section5 +ffffffff82d9c490 r pwr_virus_section6 +ffffffff82d9e000 R smu8_smu_funcs +ffffffff82d9f000 R tonga_smu_funcs +ffffffff82d9f0e0 r tonga_power_tune_data_set_array +ffffffff82d9f12c r tonga_clock_stretch_amount_conversion +ffffffff82d9f140 r tonga_clock_stretcher_ddt_table +ffffffff82da0000 R vega10_smu_funcs +ffffffff82da1000 R vega12_smu_funcs +ffffffff82da2000 R vega20_smu_funcs +ffffffff82da3000 R vegam_smu_funcs +ffffffff82da30e0 r vegam_power_tune_data_set_array +ffffffff82da3130 r Range_Table +ffffffff82da4000 R smu_ip_funcs +ffffffff82da40a0 R smu_v11_0_ip_block +ffffffff82da40b8 R smu_v12_0_ip_block +ffffffff82da40d0 R smu_v13_0_ip_block +ffffffff82da40e8 r swsmu_pm_funcs +ffffffff82da5000 r arcturus_ppt_funcs +ffffffff82da53f0 r arcturus_table_map +ffffffff82da5470 r arcturus_pwr_src_map +ffffffff82da5480 r arcturus_workload_map +ffffffff82da54d0 r smu11_thermal_policy +ffffffff82da5528 r arcturus_i2c_algo +ffffffff82da5538 r arcturus_i2c_control_quirks +ffffffff82da5550 r arcturus_throttler_map +ffffffff82da5570 r arcturus_message_map +ffffffff82da5ff0 r arcturus_clk_map +ffffffff82da60b0 r arcturus_feature_mask_map +ffffffff82da7000 r cyan_skillfish_ppt_funcs +ffffffff82da8000 r navi10_ppt_funcs +ffffffff82da83f0 r smu11_thermal_policy +ffffffff82da8448 r navi10_i2c_algo +ffffffff82da8458 r navi10_i2c_control_quirks +ffffffff82da8470 r navi1x_throttler_map +ffffffff82da8490 r NoDbiPrbs7 +ffffffff82da9490 r DbiPrbs7 +ffffffff82dab000 r sienna_cichlid_ppt_funcs +ffffffff82dab3f0 r smu11_thermal_policy +ffffffff82dab448 r sienna_cichlid_i2c_algo +ffffffff82dab458 r sienna_cichlid_i2c_control_quirks +ffffffff82dab470 r sienna_cichlid_throttler_map +ffffffff82dac000 r smu_v11_0_irq_funcs +ffffffff82dac010 r link_width +ffffffff82dad000 r vangogh_ppt_funcs +ffffffff82dad3e8 r vangogh_throttler_map +ffffffff82dae000 r renoir_ppt_funcs +ffffffff82dae3e8 r renoir_throttler_map +ffffffff82daf000 r aldebaran_ppt_funcs +ffffffff82daf3f0 r aldebaran_clk_map +ffffffff82daf4b0 r aldebaran_table_map +ffffffff82daf530 r smu13_thermal_policy +ffffffff82daf588 r aldebaran_i2c_algo +ffffffff82daf598 r aldebaran_i2c_control_quirks +ffffffff82daf5b0 r aldebaran_throttler_map +ffffffff82daf5d0 r aldebaran_message_map +ffffffff82db0050 r aldebaran_feature_mask_map +ffffffff82db1000 R pmfw_decoded_link_speed +ffffffff82db1020 R pmfw_decoded_link_width +ffffffff82db1040 r smu_v13_0_irq_funcs +ffffffff82db2000 r smu_v13_0_0_ppt_funcs +ffffffff82db23f0 r smu13_thermal_policy +ffffffff82db2448 r smu_v13_0_0_i2c_algo +ffffffff82db2458 r smu_v13_0_0_i2c_control_quirks +ffffffff82db2470 r smu_v13_0_0_throttler_map +ffffffff82db3000 r smu_v13_0_4_ppt_funcs +ffffffff82db4000 r smu_v13_0_5_ppt_funcs +ffffffff82db5000 r smu_v13_0_6_ppt_funcs +ffffffff82db53f0 r smu_v13_0_6_message_map +ffffffff82db5e70 r smu_v13_0_6_clk_map +ffffffff82db5f30 r smu_v13_0_6_table_map +ffffffff82db5fb0 r smu_v13_0_6_i2c_algo +ffffffff82db5fc0 r smu_v13_0_6_i2c_control_quirks +ffffffff82db5fd0 r smu_v13_0_6_irq_funcs +ffffffff82db5fe0 r smu_v13_0_6_throttler_map +ffffffff82db5ff0 r smu_v13_0_6_feature_mask_map +ffffffff82db7000 r smu_v13_0_7_ppt_funcs +ffffffff82db73f0 r smu13_thermal_policy +ffffffff82db7450 r smu_v13_0_7_throttler_map +ffffffff82db8000 r yellow_carp_ppt_funcs +ffffffff82db9000 R link_speed +ffffffff82db9020 r __smu_message_names +ffffffff82dba000 R pchb_ca +ffffffff82dbb000 R amas_ca +ffffffff82dbb028 R amas_devices +ffffffff82dbb040 r amas_feature +ffffffff82dbc000 R cardslot_ca +ffffffff82dbd000 R cardbus_ca +ffffffff82dbe000 R com_cardbus_ca +ffffffff82dbf000 R xl_cardbus_ca +ffffffff82dbf030 R xl_cardbus_products +ffffffff82dc0000 R dc_cardbus_ca +ffffffff82dc0030 R dc_cardbus_devices +ffffffff82dc1000 R fxp_cardbus_ca +ffffffff82dc1028 R fxp_cardbus_devices +ffffffff82dc2000 R rl_cardbus_devices +ffffffff82dc2028 R rl_cardbus_ca +ffffffff82dc3000 R re_cardbus_ca +ffffffff82dc3028 R re_cardbus_devices +ffffffff82dc4000 R ath_cardbus_ca +ffffffff82dc5000 R athn_cardbus_ca +ffffffff82dc5030 r athn_cardbus_devices +ffffffff82dc6000 R atw_cardbus_ca +ffffffff82dc6028 R atw_cardbus_devices +ffffffff82dc7000 R rtw_cardbus_ca +ffffffff82dc7028 R rtw_cardbus_devices +ffffffff82dc8000 R ral_cardbus_ca +ffffffff82dc8030 r ral_cardbus_devices +ffffffff82dc9000 R acx_cardbus_ca +ffffffff82dc9028 r acx_cardbus_devices +ffffffff82dca000 R pgt_cardbus_ca +ffffffff82dca028 R pgt_cardbus_devices +ffffffff82dcb000 R ehci_cardbus_ca +ffffffff82dcc000 R ohci_cardbus_ca +ffffffff82dcd000 R uhci_cardbus_ca +ffffffff82dce000 R malo_cardbus_ca +ffffffff82dce028 r malo_cardbus_devices +ffffffff82dcf000 R bwi_cardbus_ca +ffffffff82dcf030 r bwi_cardbus_devices +ffffffff82dd0000 R pcmcia_ca +ffffffff82dd1000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82dd2000 r pcmcia_cis_quirks +ffffffff82dd3000 R ep_pcmcia_ca +ffffffff82dd4000 R ne_pcmcia_ca +ffffffff82dd4030 R ne2000devs +ffffffff82dd6000 R aic_pcmcia_ca +ffffffff82dd7000 R com_pcmcia_ca +ffffffff82dd8000 R wdc_pcmcia_ca +ffffffff82dd9000 R sm_pcmcia_ca +ffffffff82dda000 R xe_pcmcia_ca +ffffffff82ddb000 R wi_pcmcia_ca +ffffffff82ddb030 r wi_pcmcia_products +ffffffff82ddc000 R malo_pcmcia_ca +ffffffff82ddd000 R an_pcmcia_ca +ffffffff82dde000 R pcib_ca +ffffffff82ddf000 R amdpcib_ca +ffffffff82ddf028 R amdpcib_devices +ffffffff82de0000 R tcpcib_ca +ffffffff82de0028 R tcpcib_devices +ffffffff82de1000 R aapic_ca +ffffffff82de2000 R hme_pci_ca +ffffffff82de2028 r hme_promhdr +ffffffff82de202a r hme_promdat +ffffffff82de3000 R isa_ca +ffffffff82de4000 R isadma_ca +ffffffff82de5000 R fdc_ca +ffffffff82de6000 R fd_ca +ffffffff82de7000 R com_isa_ca +ffffffff82de8000 R pckbc_isa_ca +ffffffff82de9000 R vga_isa_ca +ffffffff82dea000 R wdc_isa_ca +ffffffff82deb000 R mpu_midi_hw_if +ffffffff82dec000 R mpu_isa_ca +ffffffff82ded000 R pcppi_ca +ffffffff82dee000 R spkr_ca +ffffffff82dee030 r pitchtab +ffffffff82def000 R lpt_isa_ca +ffffffff82df0000 R wbsio_ca +ffffffff82df1000 R schsio_ca +ffffffff82df2000 R lm_isa_ca +ffffffff82df2028 R lm_wbsio_ca +ffffffff82df3000 R it_sensors +ffffffff82df3110 R it_vrfact +ffffffff82df3140 R it_fan_regs +ffffffff82df3160 R it_fan_ext_regs +ffffffff82df3178 R it_ca +ffffffff82df4000 R abitkv_sensors +ffffffff82df4200 R abitaa_sensors +ffffffff82df4480 R abitav_sensors +ffffffff82df4700 R abitas_sensors +ffffffff82df4980 R abitax_sensors +ffffffff82df4bc0 R abitm4_sensors +ffffffff82df4e80 R abitan_sensors +ffffffff82df5120 R abital_sensors +ffffffff82df53a0 R abitaw_sensors +ffffffff82df5700 R abitni_sensors +ffffffff82df59a0 R abitat_sensors +ffffffff82df5cc0 R abitan2_sensors +ffffffff82df5f60 R abitab_sensors +ffffffff82df6220 R abitan3_sensors +ffffffff82df6500 R abitaw2_sensors +ffffffff82df6860 R abitat2_sensors +ffffffff82df6b60 R abitab2_sensors +ffffffff82df6ea0 R abitin_sensors +ffffffff82df71e0 R uguru_ca +ffffffff82df8000 R aps_ca +ffffffff82df9000 R wsdisplay_emul_ca +ffffffff82df9030 r charClass +ffffffff82dfa000 r usl_syncops +ffffffff82dfb000 R wsevent_filtops +ffffffff82dfc000 R wskbd_ca +ffffffff82dfd000 r latin1_to_upper +ffffffff82dfe000 R wsmouse_ca +ffffffff82dff000 R cyrillic_to_koi8 +ffffffff82dff060 R unicode_to_latin2 +ffffffff82dff0e0 R unicode_to_latin7 +ffffffff82e00000 R wsemul_vt100_ops +ffffffff82e01000 r decspcgr2uni +ffffffff82e01100 r dectech2uni +ffffffff82e01200 r nrctable +ffffffff82e02000 r vt100_fkeys +ffffffff82e020c0 r vt100_pfkeys +ffffffff82e020e0 r vt100_numpad +ffffffff82e03000 R pckbd_ca +ffffffff82e03028 R pckbd_accessops +ffffffff82e03040 R pckbd_consops +ffffffff82e03060 R pckbd_keymapdata +ffffffff82e03070 R pckbd_xtbl2 +ffffffff82e03100 R pckbd_xtbl2_ext +ffffffff82e04000 r pckbd_keydesc_us +ffffffff82e04250 r pckbd_keydesc_de +ffffffff82e042f0 r pckbd_keydesc_de_nodead +ffffffff82e04310 r pckbd_keydesc_fr +ffffffff82e043d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82e04510 r pckbd_keydesc_dk +ffffffff82e045a0 r pckbd_keydesc_dk_nodead +ffffffff82e045b0 r pckbd_keydesc_it +ffffffff82e04640 r pckbd_keydesc_uk +ffffffff82e046e0 r pckbd_keydesc_jp +ffffffff82e04750 r pckbd_keydesc_sv +ffffffff82e04780 r pckbd_keydesc_sv_nodead +ffffffff82e04790 r pckbd_keydesc_no +ffffffff82e047c0 r pckbd_keydesc_no_nodead +ffffffff82e047d0 r pckbd_keydesc_us_declk +ffffffff82e04860 r pckbd_keydesc_us_dvorak +ffffffff82e04900 r pckbd_keydesc_us_colemak +ffffffff82e04948 r pckbd_keydesc_swapctrlcaps +ffffffff82e04960 r pckbd_keydesc_iopener +ffffffff82e049b0 r pckbd_keydesc_es +ffffffff82e04a50 r pckbd_keydesc_be +ffffffff82e04b10 r pckbd_keydesc_ru +ffffffff82e04c80 r pckbd_keydesc_ua +ffffffff82e04e10 r pckbd_keydesc_sg +ffffffff82e04ec0 r pckbd_keydesc_sg_nodead +ffffffff82e04ee0 r pckbd_keydesc_sf +ffffffff82e04f00 r pckbd_keydesc_pt +ffffffff82e04f90 r pckbd_keydesc_lt +ffffffff82e05070 r pckbd_keydesc_la +ffffffff82e05100 r pckbd_keydesc_br +ffffffff82e05180 r pckbd_keydesc_tr +ffffffff82e05230 r pckbd_keydesc_tr_nodead +ffffffff82e05250 r pckbd_keydesc_pl +ffffffff82e052b0 r pckbd_keydesc_hu +ffffffff82e053c0 r pckbd_keydesc_si +ffffffff82e054d0 r pckbd_keydesc_cf +ffffffff82e055a0 r pckbd_keydesc_cf_nodead +ffffffff82e055c0 r pckbd_keydesc_lv +ffffffff82e05640 r pckbd_keydesc_nl +ffffffff82e05720 r pckbd_keydesc_nl_nodead +ffffffff82e05740 r pckbd_keydesc_is +ffffffff82e057cc r pckbd_keydesc_is_nodead +ffffffff82e057e0 r pckbd_keydesc_ee +ffffffff82e05890 r pckbd_keydesc_ee_nodead +ffffffff82e058b0 R pckbd_keydesctab +ffffffff82e06000 R pms_ca +ffffffff82e06028 R pms_accessops +ffffffff82e06040 R pms_sec_accessops +ffffffff82e06060 R pms_protocols +ffffffff82e061e0 r alps_models +ffffffff82e07000 R skgpio_led_offset +ffffffff82e07008 R skgpio_ca +ffffffff82e08000 R hidkbd_trtab +ffffffff82e08100 r apple_fn_trans +ffffffff82e08120 r apple_tb_trans +ffffffff82e08140 r apple_mba_trans +ffffffff82e09000 r hidcc_attach_wskbd.accessops +ffffffff82e09020 r hidcc_keysyms +ffffffff82e0a000 R usb_ca +ffffffff82e0b000 R usb_known_products +ffffffff82e16f90 R usb_known_vendors +ffffffff82e197b0 R usbd_error_strs +ffffffff82e1a000 R usb_quirks +ffffffff82e1a390 R usb_dev_quirks +ffffffff82e1a398 R usbd_no_quirk +ffffffff82e1b000 R uhub_ca +ffffffff82e1b028 R uhub_uhub_ca +ffffffff82e1c000 R uaudio_ca +ffffffff82e1c028 R uaudio_hw_if +ffffffff82e1c0e0 R uaudio_rates +ffffffff82e1c120 r uaudio_clkname.names +ffffffff82e1c140 r uaudio_feature_addent.features +ffffffff82e1d000 R uvideo_ca +ffffffff82e1d028 R uvideo_hw_if +ffffffff82e1d100 R uvideo_devs +ffffffff82e1e000 r utvfu_select_norm.pal +ffffffff82e1e040 r utvfu_select_norm.ntsc +ffffffff82e1e080 r utvfu_setup_capture.setup +ffffffff82e1e180 r utvfu_audio_start_chip.setup +ffffffff82e1e1c8 r utvfu_audio_stop_chip.setup +ffffffff82e1e1d8 R utvfu_ca +ffffffff82e1e200 R utvfu_vid_hw_if +ffffffff82e1e2d0 R utvfu_au_hw_if +ffffffff82e1f000 R udl_ca +ffffffff82e1f030 r udl_devs +ffffffff82e1f0b0 r udl_modes +ffffffff82e20000 R umidi_hw_if +ffffffff82e20030 R umidi_ca +ffffffff82e20060 r umidi_evlen +ffffffff82e20080 r packet_length +ffffffff82e21000 r quirk_name +ffffffff82e22000 R ucom_ca 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ahd_attach_to_HostRAID_controllers +ffffffff831b3020 D ahd_chip_names +ffffffff831b3040 d ahd_phase_table +ffffffff831b4000 D ahd_cd +ffffffff831b5000 D aic_cd +ffffffff831b6000 D adw_cd +ffffffff831b7000 D gdt_cd +ffffffff831b8000 D twe_cd +ffffffff831b9000 D ciss_cd +ffffffff831ba000 D ami_cd +ffffffff831bb000 D mfi_cd +ffffffff831bc000 D qlwdebug +ffffffff831bc008 D qlw_cd +ffffffff831bd000 D qla_cd +ffffffff831be000 D ahci_cd +ffffffff831bf000 D nvme_cd +ffffffff831c0000 D mpi_cd +ffffffff831c1000 D sili_error_test_inv_p +ffffffff831c1004 D sili_error_restart_type +ffffffff831c1008 D sili_cd +ffffffff831c2000 D esp_cd +ffffffff831c2020 D ncr53c9x_variant_names +ffffffff831c3000 D E_abs_script_sched_slot0_Used +ffffffff831c30a0 D E_abs_targ0_Used +ffffffff831c30dc D E_abs_msgin_Used +ffffffff831c30e8 D E_abs_lunsw_return_Used +ffffffff831c30f0 D E_abs_tag0_Used +ffffffff831c3130 D E_ldsa_abs_reselected_Used +ffffffff831c3134 D E_ldsa_abs_reselect_Used +ffffffff831c3138 D E_ldsa_abs_selected_Used +ffffffff831c313c D E_ldsa_abs_data_Used +ffffffff831c3140 D E_ldsa_abs_slot_Used +ffffffff831c3148 D siop_cd +ffffffff831c4000 D ep_isa_media +ffffffff831c4060 D ep_cd +ffffffff831c5000 D wi_cd +ffffffff831c5020 D wi_func_io +ffffffff831c6000 D an_cd +ffffffff831c7000 D xl_cd +ffffffff831c8000 D fxp_int_delay +ffffffff831c8004 D fxp_bundle_max +ffffffff831c8008 D fxp_min_size_mask +ffffffff831c8010 D fxp_cd +ffffffff831c8030 d tx_threshold +ffffffff831c8040 d fxp_cb_config_template +ffffffff831c9000 D rl_cd +ffffffff831ca000 D re_cd +ffffffff831cb000 D dc_cd +ffffffff831cc000 D smc91cxx_idstrs +ffffffff831cc080 D sm_cd +ffffffff831cd000 D epic_cd +ffffffff831ce000 D ne_cd +ffffffff831ce020 d ne2000_detect.test_pattern +ffffffff831cf000 D gem_cd +ffffffff831d0000 D ti_cd +ffffffff831d1000 D com_cd +ffffffff831d1020 D comdefaultrate +ffffffff831d1024 D comconsrate +ffffffff831d1028 D comconscflag +ffffffff831d1030 d comcnattach.comcons +ffffffff831d2000 D pckbc_slot_names +ffffffff831d2010 D pckbc_cd +ffffffff831d3000 D ac97civ +ffffffff831d4000 D cy_cd +ffffffff831d5000 D lpt_cd +ffffffff831d6000 D lm_cd +ffffffff831d7000 D ath_dwelltime +ffffffff831d7004 D ath_calinterval +ffffffff831d7008 D ath_outdoor +ffffffff831d700c D ath_xchanmode +ffffffff831d7010 D ath_softcrypto +ffffffff831d7018 D ath_cd +ffffffff831d8000 D athn_cd +ffffffff831d9000 D bwfm_2ghz_channels +ffffffff831d9010 D bwfm_5ghz_channels +ffffffff831d9030 D bwfm_proto_bcdc_ops +ffffffff831d9050 D bwfm_cd +ffffffff831da000 D atw_bbp_io_enable_delay +ffffffff831da004 D atw_bbp_io_disable_delay +ffffffff831da008 D atw_writewep_delay +ffffffff831da00c D atw_beacon_len_adjust +ffffffff831da010 D atw_dwelltime +ffffffff831da018 D atw_cd +ffffffff831db000 D rtw_dwelltime +ffffffff831db004 D rtw_macbangbits_timeout +ffffffff831db008 D rtw_cd +ffffffff831dc000 D ral_cd +ffffffff831dd000 D rt3090_freqs +ffffffff831de000 D acx_beacon_intvl +ffffffff831de008 D acx_cd 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kstat_default_lock +ffffffff831f4000 D pf_inp_mtx +ffffffff831f4010 D pf_hdr_limit +ffffffff831f4020 D pf_pool_limits +ffffffff831f4090 D pf_state_list +ffffffff831f40c0 D pf_purge_states_task +ffffffff831f40f0 D pf_purge_states_to +ffffffff831f4138 D pf_purge_states_collect +ffffffff831f4140 D pf_purge_to +ffffffff831f4188 D pf_purge_task +ffffffff831f5000 D pf_tags +ffffffff831f5010 D pf_qids +ffffffff831f5020 D pf_lock +ffffffff831f5030 D pf_state_lock +ffffffff831f5040 D pfioctl_rw +ffffffff831f5050 d pf_open_trans.ticket +ffffffff831f6000 D pfi_update +ffffffff831f7000 D pflog_cloner +ffffffff831f8000 D pfsync_cloner +ffffffff831f9000 D pflow_cloner +ffffffff831fa000 d hotplug_mtx +ffffffff831fb000 D pppoe_cloner +ffffffff831fb030 D pppoediscinq +ffffffff831fb060 D pppoeinq +ffffffff831fc000 D dt_lock +ffffffff831fd000 D dt_prov_profile +ffffffff831fd030 D dt_prov_interval +ffffffff831fe000 D dtps_nsysent +ffffffff831fe008 D dt_prov_syscall +ffffffff831ff000 D dt_prov_static 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dt_static_vmm_guest_enter +ffffffff831ffa40 D dt_static_vmm_guest_exit +ffffffff831ffab0 D dt_static_vmm_inout +ffffffff831ffb20 D dt_static_smr_call +ffffffff831ffb90 D dt_static_smr_called +ffffffff831ffc00 D dt_static_smr_barrier_enter +ffffffff831ffc70 D dt_static_smr_barrier_exit +ffffffff831ffce0 D dt_static_smr_wakeup +ffffffff831ffd50 D dt_static_smr_thread +ffffffff831ffdc0 D dt_static_refcnt_none +ffffffff831ffe30 D dt_static_refcnt_ethmulti +ffffffff831ffea0 D dt_static_refcnt_ifaddr +ffffffff831fff10 D dt_static_refcnt_ifmaddr +ffffffff831fff80 D dt_static_refcnt_inpcb +ffffffff831ffff0 D dt_static_refcnt_rtentry +ffffffff83200060 D dt_static_refcnt_syncache +ffffffff832000d0 D dt_static_refcnt_tdb +ffffffff83201000 D db_next_free_breakpoint +ffffffff83201008 D db_breakpoints_inserted +ffffffff83202000 D db_ed_style +ffffffff83203000 D db_examine_format +ffffffff83203078 D db_print_format +ffffffff83204000 D db_history_size +ffffffff83204008 D db_history_curr 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startuphook_list +ffffffff83220000 D sysctl_lock +ffffffff83220010 D sysctl_disklock +ffffffff83220020 d openbsd +ffffffff83220024 d arg_max +ffffffff83220028 d posix_version +ffffffff8322002c d ngroups_max +ffffffff83220030 d int_one +ffffffff83220034 d maxpartitions +ffffffff83220038 d raw_part +ffffffff8322003c D allowpowerdown +ffffffff83220040 D hw_power +ffffffff83220044 d byte_order +ffffffff83220048 d page_size +ffffffff83221000 d thrsleep_queue +ffffffff83221010 d thrsleep_lock +ffffffff83222000 D tc_lock +ffffffff83222010 D windup_mtx +ffffffff83222020 d dummy_timecounter +ffffffff83222070 D timecounter +ffffffff83222078 D time_second +ffffffff83222080 d timehands +ffffffff83222088 d th0 +ffffffff83222120 d th1 +ffffffff83223000 D itimer_mtx +ffffffff83223010 D ratecheck_mtx +ffffffff83223020 D ppsratecheck_mtx +ffffffff83223030 D resettodr_to +ffffffff83223078 D resettodr_task +ffffffff83224000 D timeout_mutex +ffffffff83225000 D wdog_auto +ffffffff83226000 D taskq_sys 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userconf_base +ffffffff8322d004 D userconf_maxdev +ffffffff8322d008 D userconf_totdev +ffffffff8322d00c D userconf_maxlocnames +ffffffff8322d010 D userconf_cnt +ffffffff8322d014 D userconf_lines +ffffffff8322d018 D userconf_histsz +ffffffff8322d020 D userconf_cmds +ffffffff8322e000 D ftlock +ffffffff8322f000 d ppollcollect.poll_errintvl +ffffffff83230000 D ttydefchars +ffffffff83230014 D ttclos +ffffffff8323001b D ttopen +ffffffff83230022 D ttybg +ffffffff83230028 D ttyin +ffffffff8323002e D ttyout +ffffffff83230038 D ttylist_lock +ffffffff83231000 D linesw +ffffffff83231280 D nlinesw +ffffffff83232000 D pt_softc_lock +ffffffff83233000 d mbstat_boot_boot_cpumem +ffffffff83233080 D mbstat +ffffffff83233090 D mclsizes +ffffffff832330b0 D m_extref_mtx +ffffffff832330c0 D m_pool_allocator +ffffffff83234000 D somaxconn +ffffffff83234004 D sominconn +ffffffff83234008 D sosplice_lock +ffffffff83235000 D sb_max +ffffffff83236000 D unp_df_lock +ffffffff83236010 D unp_gc_lock +ffffffff83236020 D unp_rights_mtx +ffffffff83236030 D unp_ino_mtx +ffffffff83236040 D unp_gc_task +ffffffff83236070 D unpst_sendspace +ffffffff83236074 D unpst_recvspace +ffffffff83236078 D unpsq_sendspace +ffffffff8323607c D unpsq_recvspace +ffffffff83236080 D unpdg_sendspace +ffffffff83236084 D unpdg_recvspace +ffffffff83237000 D doingcache +ffffffff83238000 D maxvfsconf +ffffffff83238010 d vfsconflist +ffffffff83239000 D lockf_lock +ffffffff83239010 D maxlocksperuid +ffffffff8323a000 D iftovt_tab +ffffffff8323a040 D vttoif_tab +ffffffff8323a064 D suid_clear +ffffffff8323a068 D vnode_mtx +ffffffff8323a078 D vfs_stall_lock +ffffffff8323a090 D vtypes +ffffffff8323a0e0 D vtags +ffffffff8323b000 D syncer_maxdelay +ffffffff8323b004 D syncdelay +ffffffff8323c000 D dosdirtemplate +ffffffff8323d000 D ntfs_hashlock +ffffffff8323e000 D ntfs_toupper_lock +ffffffff8323f000 D art_table_gc_mtx +ffffffff8323f010 D art_table_gc_task +ffffffff8323f040 D art_node_gc_mtx +ffffffff8323f050 D art_node_gc_task +ffffffff83240000 D bpf_bufsize +ffffffff83240004 D bpf_maxbufsize +ffffffff83240008 D bpf_sysctl_lk +ffffffff83241000 D ifg_head +ffffffff83241010 D if_cloners_lock +ffffffff83241020 D if_input_task_locked +ffffffff83241050 D netlock +ffffffff83241060 D ifnetlist +ffffffff83242000 D ifiq_maxlen_drop +ffffffff83242004 D ifiq_maxlen_return +ffffffff83243000 D etherbroadcastaddr +ffffffff83243006 D ether_ipmulticast_min +ffffffff8324300c D ether_ipmulticast_max +ffffffff83243012 D ether_ip6multicast_min +ffffffff83243018 D ether_ip6multicast_max +ffffffff83244000 D etherip_cloner +ffffffff83244030 D etherip_list +ffffffff83245000 D loop_cloner +ffffffff83246000 D ifmedia_mtx +ffffffff83247000 D ppp_compressors +ffffffff83247020 D ppp_cloner +ffffffff83248000 D ppp_pkt_init +ffffffff83249000 D ppp_bsd_compress +ffffffff8324a000 D ppp_deflate +ffffffff8324a070 D ppp_deflate_draft +ffffffff8324b000 D tun_cloner +ffffffff8324b030 D tap_cloner +ffffffff8324c000 D bridgeintrq +ffffffff8324c038 D bridge_cloner +ffffffff8324d000 d veb_cloner +ffffffff8324d030 d vport_cloner +ffffffff8324e000 D vlan_tagh_lk +ffffffff8324e010 D vlan_cloner +ffffffff8324e040 D svlan_cloner +ffffffff8324f000 D pipex_list_mtx +ffffffff8324f010 D pipex_prune +ffffffff8324f018 D pipexoutq +ffffffff8324f050 d SHAPad2 +ffffffff83250000 D rtmap_gc +ffffffff83250018 D rt_rc +ffffffff83251000 D rt_labels +ffffffff83251010 D rtlabel_mtx +ffffffff83252000 D enc_cloner +ffffffff83253000 D gre_cloner +ffffffff83253030 D gre_list +ffffffff83253040 D mgre_cloner +ffffffff83253070 D egre_cloner +ffffffff832530a0 D nvgre_cloner +ffffffff832530d0 D eoip_cloner +ffffffff83254000 D trunk_cloner +ffffffff83255000 d aggr_cloner +ffffffff83256000 d tpmr_cloner +ffffffff83257000 D mpe_cloner +ffffffff83258000 D mpw_cloner +ffffffff83259000 D mpip_cloner +ffffffff8325a000 d bpe_cloner +ffffffff8325a030 d bpe_lock +ffffffff8325b000 D vether_cloner +ffffffff8325c000 D pair_cloner +ffffffff8325d000 d vxlan_cloner +ffffffff8325d030 d vxlan_lock +ffffffff8325d040 d vxlan_teps +ffffffff8325e000 D underload_interval +ffffffff8325e010 D wg_cloner +ffffffff8325f000 d stoeplitz_keyseed +ffffffff83260000 D ieee80211_cache_size +ffffffff83261000 D arpt_prune +ffffffff83261004 D arpt_keep +ffffffff83261008 D arpt_down +ffffffff83261010 D arpinq +ffffffff83261048 D arp_mtx +ffffffff83261058 D arp_maxtries +ffffffff83262000 D ipport_firstauto +ffffffff83262004 D ipport_lastauto +ffffffff83262008 D ipport_hifirstauto +ffffffff8326200c D ipport_hilastauto +ffffffff83263000 D divert_sendspace +ffffffff83263004 D divert_recvspace +ffffffff83263008 D divbhashsize +ffffffff83264000 D icmptstamprepl +ffffffff83264004 D icmperrppslim +ffffffff83264008 D icmp_redirtimeout +ffffffff83265000 D ipsendredirects +ffffffff83265004 D ip_defttl +ffffffff83265008 D ip_mtudisc +ffffffff8326500c D ip_mtudisc_timeout +ffffffff83265010 D ipq_mutex +ffffffff83265020 D ip_maxqueue +ffffffff83265028 D ipintrq +ffffffff83265060 d ipsend_task +ffffffff83265090 d ipsendraw_task +ffffffff83266000 D ip_mrtproto +ffffffff83266004 d sin +ffffffff83267000 D rip_sendspace +ffffffff83267008 D rip_recvspace +ffffffff83268000 D tcprexmtthresh +ffffffff83268004 D tcptv_keep_init +ffffffff83268008 D tcp_rst_ppslim +ffffffff8326800c D tcp_ackdrop_ppslim +ffffffff83268010 D tcp_syn_hash_size +ffffffff83268014 D tcp_syn_cache_limit +ffffffff83268018 D tcp_syn_bucket_limit +ffffffff8326801c D tcp_syn_use_limit +ffffffff83268020 D syn_cache_mtx +ffffffff83269000 D tcp_outflags +ffffffff8326a000 D tcp_timer_mtx +ffffffff8326a010 D tcp_mssdflt +ffffffff8326a014 D tcp_rttdflt +ffffffff8326a018 D tcp_do_rfc1323 +ffffffff8326a01c D tcp_do_sack +ffffffff8326a020 D tcp_do_rfc3390 +ffffffff8326a024 D tcp_do_tso +ffffffff8326a028 D tcp_reass_limit +ffffffff8326a02c D tcp_sackhole_limit +ffffffff8326b000 D tcp_backoff +ffffffff8326b034 D tcp_totbackoff +ffffffff8326c000 D tcp_sendspace +ffffffff8326c004 D tcp_recvspace +ffffffff8326c008 D tcp_autorcvbuf_inc +ffffffff8326d000 D udpcksum +ffffffff8326d004 D udp_sendspace +ffffffff8326d008 D udp_recvspace +ffffffff8326e000 D ipsec_flows_mtx +ffffffff8326e010 D ipsec_ids_idle +ffffffff8326e014 D ipsec_ids_next_flow +ffffffff8326e018 D ipsec_policy_head +ffffffff8326e028 D ipsp_ids_gc_timeout +ffffffff8326e070 D tdb_sadb_mtx +ffffffff8326e080 d tdb_hashmask +ffffffff8326f000 D ipo_tdb_mtx +ffffffff8326f010 D ipsec_acquire_mtx +ffffffff8326f020 D ipsec_acquire_head +ffffffff83270000 D ipsec_keep_invalid +ffffffff83270004 D ipsec_require_pfs +ffffffff83270008 D ipsec_soft_timeout +ffffffff8327000c D ipsec_exp_timeout +ffffffff83270010 D ipsec_soft_first_use +ffffffff83270014 D ipsec_exp_first_use +ffffffff83270018 D ipsec_expire_acquire +ffffffff8327001c D esp_enable +ffffffff83270020 D ah_enable +ffffffff83271000 D udpencap_enable +ffffffff83271004 D udpencap_port +ffffffff83272000 D carp_vh_rc +ffffffff83272020 D carp_sc_rc +ffffffff83272040 D carp_opts +ffffffff83272058 D carp_cloner +ffffffff83272088 d carp_send_na.mcast ffffffff83273000 d PADDING -ffffffff83274000 d weak_keys -ffffffff83275000 D swcr_id -ffffffff83276000 D window_inflate -ffffffff83276004 D window_deflate -ffffffff83277000 D ghash_update -ffffffff83278000 D mpls_defttl -ffffffff83278004 D mpls_mapttl_ip -ffffffff83279000 D nfskevq_lock -ffffffff8327a000 D nfs_backoff -ffffffff8327a020 D nfs_ptimers -ffffffff8327b000 D desirednfsrvcache -ffffffff8327b010 D nonidempotent -ffffffff8327b070 D nfsv2_repstat -ffffffff8327c000 D nfsv2_type -ffffffff8327c030 D nfsv3_type -ffffffff8327c060 D nv2tov_type -ffffffff8327c080 D nv3tov_type -ffffffff8327c0a0 D nfsv3_procid -ffffffff8327c100 D nfsv2_procid -ffffffff8327c15c d nfsv3err_getattr -ffffffff8327c170 d nfsv3err_setattr -ffffffff8327c190 d nfsv3err_lookup -ffffffff8327c1a4 d nfsv3err_access -ffffffff8327c1b0 d nfsv3err_readlink -ffffffff8327c1d0 d nfsv3err_read -ffffffff8327c1f0 d nfsv3err_write -ffffffff8327c210 d nfsv3err_create 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-ffffffff83288000 D maxslp -ffffffff83289000 D uvmpagerops -ffffffff8328a000 D uvm_swap_data_lock -ffffffff8328a010 D swap_syscall_lock -ffffffff8328a020 D oommtx -ffffffff8328b000 D uvm_doswapencrypt -ffffffff8328c000 D gif_list -ffffffff8328c010 D gif_cloner -ffffffff8328d000 d sec_cloner -ffffffff8328d030 d sec_tdb_gc_mtx -ffffffff8328d040 d sec_tdb_gc_task -ffffffff8328e000 D divert6_sendspace -ffffffff8328e004 D divert6_recvspace -ffffffff8328e008 D divb6hashsize -ffffffff8328f000 d in6_get_hw_ifid.allone -ffffffff83290000 D ip6_sendredirects -ffffffff83290004 D ip6_defhlim -ffffffff83290008 D ip6_defmcasthlim -ffffffff8329000c D ip6_maxfragpackets -ffffffff83290010 D ip6_maxfrags -ffffffff83290014 D ip6_log_interval -ffffffff83290018 D ip6_hdrnestlimit -ffffffff8329001c D ip6_dad_count -ffffffff83290020 D ip6_auto_flowlabel -ffffffff83290024 D ip6_use_deprecated -ffffffff83290028 D ip6_neighborgcthresh -ffffffff8329002c D ip6_maxdynroutes -ffffffff83290030 D rip6_sendspace -ffffffff83290038 D rip6_recvspace -ffffffff83290040 D icmp6_redirtimeout -ffffffff83290044 D icmp6errppslim -ffffffff83290048 D ip6_mtudisc_timeout -ffffffff83291000 D frag6_mutex -ffffffff83292000 d icmp6_mtudisc_hiwat -ffffffff83292004 d icmp6_mtudisc_lowat -ffffffff83293000 d randomtab_20 -ffffffff83294000 D ip6intrq -ffffffff83294038 d ip6send_task -ffffffff83295000 D nd6_timer_next -ffffffff83295008 D nd6_expire_next -ffffffff83295010 D nd6_delay -ffffffff83295014 D nd6_umaxtries -ffffffff83295018 D nd6_mmaxtries -ffffffff8329501c D nd6_gctimer -ffffffff83295020 D nd6_maxndopt -ffffffff83295028 D nd6_mtx -ffffffff83295038 D nd6_list -ffffffff83296000 d dadq -ffffffff83297000 D pfkeyv2_mtx -ffffffff83297010 d pfkeyv2_seq -ffffffff83298000 D sadb_exts_allowed_in -ffffffff83298090 D sadb_exts_required_in -ffffffff83299000 D cold -ffffffff8329a000 D bdevsw -ffffffff8329a460 D nblkdev -ffffffff8329a470 D cdevsw -ffffffff8329c400 D nchrdev -ffffffff8329c404 D mem_no -ffffffff8329c408 D swapdev -ffffffff8329c410 D constab -ffffffff8329d000 D machine -ffffffff8329d008 D cpu_idle_cycle_fcn -ffffffff8329d010 D lid_action -ffffffff8329d014 D pwr_action -ffffffff8329d018 D isa_constraint -ffffffff8329d028 D dma_constraint -ffffffff8329d040 D uvm_md_constraints -ffffffff8329d058 D delay_func -ffffffff8329d060 D initclock_func -ffffffff8329d068 D startclock_func -ffffffff8329d070 D bootinfo_size -ffffffff8329d074 D waittime -ffffffff8329d078 D dumpmag -ffffffff8329e000 D tsc_rdtsc -ffffffff8329e008 D tsc_timecounter -ffffffff8329e058 D tsc_is_synchronized -ffffffff8329f000 D local_apic -ffffffff8329f020 D lapic_id -ffffffff8329f080 D lapic_tpr -ffffffff8329f0a0 d lapic_ppr -ffffffff8329f100 d lapic_isr -ffffffff832a0000 D warn_once -ffffffff832a1000 d errata -ffffffff832a2000 D cpu_ucode_mtx -ffffffff832a3000 D mem_owner_bios -ffffffff832a3008 D mrops -ffffffff832a3028 D mtrrmask -ffffffff832a3030 D mtrrtomrt -ffffffff832a4000 D pmap_pg_wc -ffffffff832a4008 D pmaps_lock -ffffffff832a4018 d pmap_maxkvaddr -ffffffff832a5000 D kv_physwait -ffffffff832a6000 D fpu_save_len -ffffffff832a7000 D i8259_pic -ffffffff832a8000 D softintr_pic -ffffffff832a9000 D ipifunc -ffffffff832aa000 D setperf_mp_mutex -ffffffff832ab000 D db_Grp6 -ffffffff832ab040 D db_Grp7 -ffffffff832ab100 D db_Grp8 -ffffffff832ab140 D db_Grp9 -ffffffff832ab200 D db_GrpA -ffffffff832ab240 D db_GrpB -ffffffff832ab280 D db_GrpC -ffffffff832ab2c0 D db_inst_0f0x -ffffffff832ab440 D db_inst_0f2x -ffffffff832ab5c0 D db_inst_0f3x -ffffffff832ab740 D db_inst_0f8x -ffffffff832ab8c0 D db_inst_0f9x -ffffffff832aba40 D db_inst_0fax -ffffffff832abbc0 D db_inst_0fbx -ffffffff832abd40 D db_inst_0fcx -ffffffff832abec0 D db_inst_0f -ffffffff832abf40 D db_Esc92 -ffffffff832abf80 D db_Esc94 -ffffffff832abfc0 D db_Esc95 -ffffffff832ac000 D db_Esc96 -ffffffff832ac040 D db_Esc97 -ffffffff832ac080 D db_Esca5 -ffffffff832ac0c0 D db_Escb4 -ffffffff832ac100 D db_Esce3 -ffffffff832ac140 D db_Escf4 -ffffffff832ac180 D db_Esc8 -ffffffff832ac240 D db_Esc9 -ffffffff832ac300 D db_Esca -ffffffff832ac3c0 D db_Escb -ffffffff832ac480 D db_Escc -ffffffff832ac540 D db_Escd -ffffffff832ac600 D db_Esce -ffffffff832ac6c0 D db_Escf -ffffffff832ac780 D db_Esc_inst -ffffffff832ac7c0 D db_Grp1 -ffffffff832ac800 D db_Grp2 -ffffffff832ac840 D db_Grp3 -ffffffff832ac900 D db_Grp4 -ffffffff832ac9c0 D db_Grp5 -ffffffff832aca80 D db_inst_table -ffffffff832ae280 D db_bad_inst -ffffffff832ae2a0 D db_index_reg_16 -ffffffff832ae2e0 D db_reg -ffffffff832ae4e0 D db_seg_reg -ffffffff832ae520 D db_lengths -ffffffff832af000 D db_regs -ffffffff832af1e0 D db_eregs -ffffffff832af1f0 D db_reg_args -ffffffff832b0000 D timer_mutex -ffffffff832b0010 d i8254_timecounter -ffffffff832b1000 D spleen8x16 -ffffffff832b1058 D spleen12x24 -ffffffff832b10b0 D spleen16x32 -ffffffff832b1108 D spleen32x64 -ffffffff832b1160 d builtin_fonts -ffffffff832b11e0 d wsfont_add.cookiegen -ffffffff832b11f0 d spleen8x16_data -ffffffff832b1ff0 d spleen12x24_data -ffffffff832b49f0 d spleen16x32_data -ffffffff832b81f0 d spleen32x64_data -ffffffff832c7000 D nsphy_cd -ffffffff832c8000 D nsphyter_cd -ffffffff832c9000 D gentbi_cd -ffffffff832ca000 D qsphy_cd -ffffffff832cb000 D inphy_cd -ffffffff832cc000 D iophy_cd -ffffffff832cd000 D eephy_cd -ffffffff832ce000 D exphy_cd -ffffffff832cf000 D rlphy_cd -ffffffff832d0000 D lxtphy_cd -ffffffff832d1000 D luphy_cd -ffffffff832d2000 D mtdphy_cd -ffffffff832d3000 D icsphy_cd -ffffffff832d4000 D sqphy_cd -ffffffff832d5000 D tqphy_cd -ffffffff832d6000 D ukphy_cd -ffffffff832d7000 D dcphy_cd -ffffffff832d8000 D bmtphy_cd -ffffffff832d9000 D brgphy_cd -ffffffff832da000 D xmphy_cd -ffffffff832db000 D amphy_cd -ffffffff832dc000 D acphy_cd -ffffffff832dd000 D nsgphy_cd -ffffffff832de000 D urlphy_cd -ffffffff832df000 D rgephy_cd -ffffffff832e0000 D ciphy_cd -ffffffff832e1000 D ipgphy_cd -ffffffff832e2000 D etphy_cd -ffffffff832e3000 D jmphy_cd -ffffffff832e4000 D atphy_cd -ffffffff832e5000 D scsi_autoconf -ffffffff832e5008 D scsibus_cd -ffffffff832e6000 D cd_cd -ffffffff832e7000 D ch_cd -ffffffff832e7020 D chquirks -ffffffff832e8000 D sd_cd -ffffffff832e9000 D st_cd -ffffffff832ea000 D uk_cd -ffffffff832eb000 D safte_cd -ffffffff832ec000 D ses_cd -ffffffff832ed000 D sym_cd -ffffffff832ed020 D sym_devices -ffffffff832ed070 D asym_devices -ffffffff832ee000 D rdac_cd -ffffffff832ee020 D rdac_devices -ffffffff832ef000 D emc_cd -ffffffff832ef020 D emc_devices -ffffffff832f0000 D hds_cd -ffffffff832f0020 D hds_devices -ffffffff832f1000 D atapiscsi_cd -ffffffff832f2000 D wd_cd -ffffffff832f2020 d wddumpmulti -ffffffff832f3000 D mainbus_cd -ffffffff832f3020 D mba_iba -ffffffff832f4000 D bios_cd -ffffffff832f4020 D smbios_uninfo -ffffffff832f5000 D mpbios_cd -ffffffff832f5020 d mp_conf -ffffffff832f5070 d extint_bus -ffffffff832f50a0 d smi_bus -ffffffff832f50d0 d nmi_bus -ffffffff832f6000 D cpu_info_full_primary -ffffffff832f9000 D cpu_info_list -ffffffff832f9008 D mp_cpu_funcs -ffffffff832f9020 D cpu_cd -ffffffff832f9040 D cpu_info -ffffffff832fa000 D local_pic -ffffffff832fa090 D lapic_readreg -ffffffff832fa098 D lapic_writereg -ffffffff832fa0a0 D x86_ipi -ffffffff832fb000 D ioapic_cold -ffffffff832fb008 D ioapic_cd -ffffffff832fc000 D efifb_std_descr -ffffffff832fc030 D efifb_descrs -ffffffff832fc038 D efifb_accessops -ffffffff832fc098 D efifb_cd -ffffffff832fd000 D pvbus_cd -ffffffff832fd020 D pvbus_types -ffffffff832fd0e0 D pvbus_dma_tag -ffffffff832fe000 D pvclock_cd -ffffffff832fe020 D pvclock_timecounter -ffffffff832ff000 D vmt_tclo_rpc -ffffffff832ff0d0 D vmt_cd -ffffffff83300000 D xen_cd -ffffffff83300020 D xen_bus_dma_tag -ffffffff83301000 D xnf_cd -ffffffff83302000 D xbf_cd -ffffffff83303000 D hv_msg_dispatch -ffffffff83303110 D hv_timecounter -ffffffff83303160 D hyperv_cd -ffffffff83304000 d hv_ic_devs -ffffffff83305000 D hvn_cd -ffffffff83306000 D hvs_cd -ffffffff83307000 D virtio_cd -ffffffff83308000 D vio_cd -ffffffff83309000 D vioblk_cd -ffffffff8330a000 D viomb_cd -ffffffff8330b000 D viornd_cd -ffffffff8330c000 D vioscsi_cd -ffffffff8330d000 D vmmci_cd -ffffffff8330e000 D pci_cd -ffffffff8330f000 D arc_fw_hdr -ffffffff8330f008 D arc_cd -ffffffff83310000 D jmb_cd -ffffffff83311000 D mfii_cd -ffffffff83312000 D ips_cd -ffffffff83313000 D eap_cd -ffffffff83314000 D auacer_cd -ffffffff83315000 D auich_cd -ffffffff83316000 D azalia_cd -ffffffff83317000 D envy_cd -ffffffff83317020 D envy_matchids -ffffffff83317030 D envy_rates -ffffffff833170b0 D ak4524_dac -ffffffff833170d8 D ak4524_adc -ffffffff83317100 D ak4358_dac -ffffffff83317128 D ak5365_adc -ffffffff83317150 D unkenvy_codec -ffffffff83317180 D envy_cards -ffffffff833173f0 D envy_cards_ht -ffffffff83317600 d julia_eeprom -ffffffff83318000 D emu_cd -ffffffff83319000 D auixp_cd -ffffffff8331a000 D clcs_cd -ffffffff8331b000 D yds_cd -ffffffff8331c000 D auvia_cd -ffffffff8331d000 D qle_cd -ffffffff8331e000 D mpii_cd -ffffffff8331f000 D aq_cd -ffffffff83320000 D de_cd -ffffffff83321000 D pcn_cd -ffffffff83322000 D wdc_sii3114_vtbl -ffffffff83322038 D wdc_pdc203xx_vtbl -ffffffff83322070 D wdc_svwsata_vtbl -ffffffff833220a8 D pciide_cd -ffffffff833220d0 d sis_hostbr_type -ffffffff83323000 D ppb_cd -ffffffff83324000 D vr_cd -ffffffff83324020 D vr_devices -ffffffff83325000 D txp_cd -ffffffff83326000 D bt848_card_signature -ffffffff83327000 D bktr_cd -ffffffff83328000 D em_cd -ffffffff83329000 D ixgb_cd -ffffffff8332a000 D ix_cd -ffffffff8332a020 D ixgbe_smart_speed -ffffffff8332a024 D ixgbe_enable_msix -ffffffff8332b000 D ixl_cd -ffffffff8332b020 d ixl_sff_lock -ffffffff8332c000 D xge_cd -ffffffff8332d000 D thtc_cd -ffffffff8332d020 D tht_cd -ffffffff8332d040 D tht_txt_desc -ffffffff8332d068 D tht_rxf_desc -ffffffff8332d090 D tht_rxd_desc -ffffffff8332d0b8 D tht_txf_desc -ffffffff8332e000 D myx_cd -ffffffff8332f000 D oce_cd -ffffffff83330000 D dc_devs -ffffffff83331000 D cas_cd -ffffffff83332000 D sis_cd -ffffffff83333000 D se_cd -ffffffff83334000 D mbg_cd -ffffffff83335000 D cbb_cd -ffffffff83335020 D yc_chipsets -ffffffff833351b0 d pccbb_funcs -ffffffff833351e0 d pccbb_pcmcia_funcs -ffffffff83336000 D skc_cd -ffffffff83336020 D sk_cd -ffffffff83337000 D mskc_cd -ffffffff83337020 D msk_cd -ffffffff83338000 D puc_cd -ffffffff83339000 D puc_ndevs -ffffffff8333a000 D iwi_cd -ffffffff8333b000 D wpi_cd -ffffffff8333c000 D iwn_cd -ffffffff8333d000 D iwm_cd -ffffffff8333e000 D iwx_cd -ffffffff8333f000 D cmpci_cd -ffffffff83340000 D iha_cd -ffffffff83341000 D pcscp_cd -ffffffff83341020 D pcscp_glue -ffffffff83342000 D bge_cd -ffffffff83343000 D bnx_firmwares -ffffffff83343160 D bnx_rv2ps -ffffffff833431c0 D bnx_cd -ffffffff833431e0 d flash_5709 -ffffffff83343210 d flash_table -ffffffff83344000 D vge_cd -ffffffff83345000 D stge_cd -ffffffff83346000 D nfe_cd -ffffffff83347000 D et_cd -ffffffff83348000 D jme_cd -ffffffff83349000 D age_cd -ffffffff8334a000 D alc_dma_burst -ffffffff8334a020 D alc_cd -ffffffff8334b000 D ale_cd -ffffffff8334c000 D amdpm_cd -ffffffff8334c020 d amdpm_timecounter -ffffffff8334d000 D bce_cd -ffffffff8334e000 D rtwn_cd -ffffffff8334f000 d ral_rt2560_opns -ffffffff8334f028 d ral_rt2661_opns -ffffffff8334f050 d ral_rt2860_opns -ffffffff83350000 D piixpm_cd -ffffffff83351000 D vic_cd -ffffffff83352000 D vmx_cd -ffffffff83353000 D vmwpvs_cd -ffffffff83354000 D lii_cd -ffffffff83355000 D ichiic_cd -ffffffff83356000 D viapm_cd -ffffffff83356020 d viapm_timecounter -ffffffff83357000 D amdiic_cd -ffffffff83358000 D nviic_cd -ffffffff83359000 D kate_cd -ffffffff8335a000 D km_cd -ffffffff8335b000 D cpu_model_offsets -ffffffff8335b070 D ksmn_cd -ffffffff8335c000 D itherm_cd -ffffffff8335d000 D pchtemp_cd -ffffffff8335e000 D xspd_cd -ffffffff8335f000 D virtio_pci_ops -ffffffff83360000 D bwfm_pci_buscore_ops -ffffffff83360030 D bwfm_pci_bus_ops -ffffffff83360058 D bwfm_pci_msgbuf_ops -ffffffff83361000 D bnxt_cd -ffffffff83362000 D mcx_cd -ffffffff83363000 D iavf_cd -ffffffff83364000 D rge_cd -ffffffff83365000 D igc_cd -ffffffff83366000 D ngbe_cd -ffffffff83367000 D agp_cd -ffffffff83368000 D intagp_cd -ffffffff83368020 D agp_i810_methods -ffffffff83369000 D reservation_ww_class -ffffffff8336a000 d bridge_lock -ffffffff8336a010 d bridge_list -ffffffff8336b000 d drm_connector_enum_list -ffffffff8336b1f8 d connector_list_lock -ffffffff8336b208 d connector_list -ffffffff8336c000 d kernel_fb_helper_list -ffffffff8336c010 d kernel_fb_helper_lock -ffffffff8336d000 D drm_global_mutex -ffffffff8336e000 D i2c_bit_algo -ffffffff8336e010 d drm_fence_context_count -ffffffff8336e018 d dma_fence_stub_mtx -ffffffff8336e028 D wait_bit_mtx -ffffffff8336e038 D shrinkers -ffffffff8336f000 d crtc_ww_class -ffffffff83370000 d panel_lock -ffffffff83370010 d panel_list -ffffffff83371000 d ttm_global_mutex -ffffffff83372000 D drm_sched_policy -ffffffff83373000 D intel_bbops -ffffffff83374000 d i915_sys_placement -ffffffff83374020 d i915_ttm_bo_driver -ffffffff83375000 d mchdev_lock -ffffffff83376000 D inteldrm_stdscreen -ffffffff83376030 D inteldrm_scrlist -ffffffff83376038 D inteldrm_screenlist -ffffffff83376048 D inteldrm_accessops -ffffffff833760a8 D inteldrm_cd -ffffffff83377000 d capture_mutex -ffffffff83378000 d mitigations -ffffffff83379000 D i915_modparams -ffffffff8337a000 d schedule_lock -ffffffff8337b000 d unbind_fence_ops -ffffffff8337c000 D intel_graphics_stolen_res -ffffffff8337d000 D btc_valid_sclk -ffffffff8337e000 d evergreen_cs_packet_parse_vline.vline_start_end -ffffffff8337e020 d evergreen_cs_packet_parse_vline.vline_status -ffffffff8337f000 d r600_cs_packet_parse_vline.vline_start_end -ffffffff8337f008 d r600_cs_packet_parse_vline.vline_status -ffffffff83380000 d r100_asic -ffffffff833802e0 d r200_asic -ffffffff833805c0 d r300_asic_pcie -ffffffff833808a0 d r300_asic -ffffffff83380b80 d r420_asic -ffffffff83380e60 d rs400_asic -ffffffff83381140 d rs600_asic -ffffffff83381420 d rs690_asic -ffffffff83381700 d rv515_asic -ffffffff833819e0 d r520_asic -ffffffff83381cc0 d r600_asic -ffffffff83381fa0 d rv6xx_asic -ffffffff83382280 d rs780_asic -ffffffff83382560 d rv770_asic -ffffffff83382840 d evergreen_asic -ffffffff83382b20 d sumo_asic -ffffffff83382e00 d btc_asic -ffffffff833830e0 d cayman_asic -ffffffff833833c0 d trinity_asic -ffffffff833836a0 d si_asic -ffffffff83383980 d ci_asic -ffffffff83383c60 d kv_asic -ffffffff83384000 d dce6_funcs -ffffffff83384018 d dce6_hdmi_funcs -ffffffff83384088 d dce6_dp_funcs -ffffffff833840f8 d dce4_funcs -ffffffff83384110 d dce4_hdmi_funcs -ffffffff83384180 d dce4_dp_funcs -ffffffff833841f0 d dce32_funcs -ffffffff83384208 d dce32_hdmi_funcs -ffffffff83384278 d dce32_dp_funcs -ffffffff833842e8 d r600_funcs -ffffffff83384300 d r600_hdmi_funcs -ffffffff83385000 D radeon_modeset -ffffffff83385004 D radeon_dynclks -ffffffff83385008 D radeon_agpmode -ffffffff8338500c D radeon_gart_size -ffffffff83385010 D radeon_tv -ffffffff83385014 D radeon_audio -ffffffff83385018 D radeon_pcie_gen2 -ffffffff8338501c D radeon_msi -ffffffff83385020 D radeon_lockup_timeout -ffffffff83385024 D radeon_dpm -ffffffff83385028 D radeon_aspm -ffffffff8338502c D radeon_runtime_pm -ffffffff83385030 D radeon_vm_size -ffffffff83385034 D radeon_vm_block_size -ffffffff83385038 D radeon_use_pflipirq -ffffffff8338503c D radeon_bapm -ffffffff83385040 D radeon_backlight -ffffffff83385044 D radeon_auxch -ffffffff83385048 D radeon_uvd -ffffffff8338504c D radeon_vce -ffffffff83385050 D radeon_si_support -ffffffff83385054 D radeon_cik_support -ffffffff83385058 D radeondrm_cd -ffffffff83385078 D radeondrm_stdscreen -ffffffff833850a8 D radeondrm_scrlist -ffffffff833850b0 D radeondrm_screenlist -ffffffff833850c0 D radeondrm_accessops -ffffffff83386000 D radeon_bbops -ffffffff83387000 d radeon_bo_driver -ffffffff83388000 d verde_pg_init -ffffffff83389000 d cac_weights_pitcairn -ffffffff833894d0 d cac_weights_oland -ffffffff8338a000 d aldebaran_mode2_handler -ffffffff8338b000 d amdgpu_vbios_version_attrs -ffffffff8338c000 D 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+ffffffff832fe020 D pvbus_types +ffffffff832fe0e0 D pvbus_dma_tag +ffffffff832ff000 D pvclock_cd +ffffffff832ff020 D pvclock_timecounter +ffffffff83300000 D vmt_tclo_rpc +ffffffff833000d0 D vmt_cd +ffffffff83301000 D xen_cd +ffffffff83301020 D xen_bus_dma_tag +ffffffff83302000 D xnf_cd +ffffffff83303000 D xbf_cd +ffffffff83304000 D hv_msg_dispatch +ffffffff83304110 D hv_timecounter +ffffffff83304160 D hyperv_cd +ffffffff83305000 d hv_ic_devs +ffffffff83306000 D hvn_cd +ffffffff83307000 D hvs_cd +ffffffff83308000 D virtio_cd +ffffffff83309000 D vio_cd +ffffffff8330a000 D vioblk_cd +ffffffff8330b000 D viomb_cd +ffffffff8330c000 D viornd_cd +ffffffff8330d000 D vioscsi_cd +ffffffff8330e000 D vmmci_cd +ffffffff8330f000 D pci_cd +ffffffff83310000 D arc_fw_hdr +ffffffff83310008 D arc_cd +ffffffff83311000 D jmb_cd +ffffffff83312000 D mfii_cd +ffffffff83313000 D ips_cd +ffffffff83314000 D eap_cd +ffffffff83315000 D auacer_cd +ffffffff83316000 D auich_cd +ffffffff83317000 D azalia_cd +ffffffff83318000 D envy_cd +ffffffff83318020 D envy_matchids +ffffffff83318030 D envy_rates +ffffffff833180b0 D ak4524_dac +ffffffff833180d8 D ak4524_adc +ffffffff83318100 D ak4358_dac +ffffffff83318128 D ak5365_adc +ffffffff83318150 D unkenvy_codec +ffffffff83318180 D envy_cards +ffffffff833183f0 D envy_cards_ht +ffffffff83318600 d julia_eeprom +ffffffff83319000 D emu_cd +ffffffff8331a000 D auixp_cd +ffffffff8331b000 D clcs_cd +ffffffff8331c000 D yds_cd +ffffffff8331d000 D auvia_cd +ffffffff8331e000 D qle_cd +ffffffff8331f000 D mpii_cd +ffffffff83320000 D aq_cd +ffffffff83321000 D de_cd +ffffffff83322000 D pcn_cd +ffffffff83323000 D wdc_sii3114_vtbl +ffffffff83323038 D wdc_pdc203xx_vtbl +ffffffff83323070 D wdc_svwsata_vtbl +ffffffff833230a8 D pciide_cd +ffffffff833230d0 d sis_hostbr_type +ffffffff83324000 D ppb_cd +ffffffff83325000 D vr_cd +ffffffff83325020 D vr_devices +ffffffff83326000 D txp_cd +ffffffff83327000 D bt848_card_signature +ffffffff83328000 D bktr_cd +ffffffff83329000 D em_cd +ffffffff8332a000 D ixgb_cd +ffffffff8332b000 D ix_cd +ffffffff8332b020 D ixgbe_smart_speed +ffffffff8332b024 D ixgbe_enable_msix +ffffffff8332c000 D ixl_cd +ffffffff8332c020 d ixl_sff_lock +ffffffff8332d000 D xge_cd +ffffffff8332e000 D thtc_cd +ffffffff8332e020 D tht_cd +ffffffff8332e040 D tht_txt_desc +ffffffff8332e068 D tht_rxf_desc +ffffffff8332e090 D tht_rxd_desc +ffffffff8332e0b8 D tht_txf_desc +ffffffff8332f000 D myx_cd +ffffffff83330000 D oce_cd +ffffffff83331000 D dc_devs +ffffffff83332000 D cas_cd +ffffffff83333000 D sis_cd +ffffffff83334000 D se_cd +ffffffff83335000 D mbg_cd +ffffffff83336000 D cbb_cd +ffffffff83336020 D yc_chipsets +ffffffff833361b0 d pccbb_funcs +ffffffff833361e0 d pccbb_pcmcia_funcs +ffffffff83337000 D skc_cd +ffffffff83337020 D sk_cd +ffffffff83338000 D mskc_cd +ffffffff83338020 D msk_cd +ffffffff83339000 D puc_cd +ffffffff8333a000 D puc_ndevs +ffffffff8333b000 D iwi_cd +ffffffff8333c000 D wpi_cd +ffffffff8333d000 D iwn_cd +ffffffff8333e000 D iwm_cd +ffffffff8333f000 D iwx_cd +ffffffff83340000 D cmpci_cd +ffffffff83341000 D iha_cd +ffffffff83342000 D pcscp_cd +ffffffff83342020 D pcscp_glue +ffffffff83343000 D bge_cd +ffffffff83344000 D bnx_firmwares +ffffffff83344160 D bnx_rv2ps +ffffffff833441c0 D bnx_cd +ffffffff833441e0 d flash_5709 +ffffffff83344210 d flash_table +ffffffff83345000 D vge_cd +ffffffff83346000 D stge_cd +ffffffff83347000 D nfe_cd +ffffffff83348000 D et_cd +ffffffff83349000 D jme_cd +ffffffff8334a000 D age_cd +ffffffff8334b000 D alc_dma_burst +ffffffff8334b020 D alc_cd +ffffffff8334c000 D ale_cd +ffffffff8334d000 D amdpm_cd +ffffffff8334d020 d amdpm_timecounter +ffffffff8334e000 D bce_cd +ffffffff8334f000 D rtwn_cd +ffffffff83350000 d ral_rt2560_opns +ffffffff83350028 d ral_rt2661_opns +ffffffff83350050 d ral_rt2860_opns +ffffffff83351000 D piixpm_cd +ffffffff83352000 D vic_cd +ffffffff83353000 D vmx_cd +ffffffff83354000 D vmwpvs_cd +ffffffff83355000 D lii_cd +ffffffff83356000 D ichiic_cd +ffffffff83357000 D viapm_cd +ffffffff83357020 d viapm_timecounter +ffffffff83358000 D amdiic_cd +ffffffff83359000 D nviic_cd +ffffffff8335a000 D kate_cd +ffffffff8335b000 D km_cd +ffffffff8335c000 D cpu_model_offsets +ffffffff8335c070 D ksmn_cd +ffffffff8335d000 D itherm_cd +ffffffff8335e000 D pchtemp_cd +ffffffff8335f000 D xspd_cd +ffffffff83360000 D virtio_pci_ops +ffffffff83361000 D bwfm_pci_buscore_ops +ffffffff83361030 D bwfm_pci_bus_ops +ffffffff83361058 D bwfm_pci_msgbuf_ops +ffffffff83362000 D bnxt_cd +ffffffff83363000 D mcx_cd +ffffffff83364000 D iavf_cd +ffffffff83365000 D rge_cd +ffffffff83366000 D igc_cd +ffffffff83367000 D ngbe_cd +ffffffff83368000 D agp_cd +ffffffff83369000 D intagp_cd +ffffffff83369020 D agp_i810_methods +ffffffff8336a000 D reservation_ww_class +ffffffff8336b000 d bridge_lock +ffffffff8336b010 d bridge_list +ffffffff8336c000 d drm_connector_enum_list +ffffffff8336c1f8 d connector_list_lock +ffffffff8336c208 d connector_list +ffffffff8336d000 d kernel_fb_helper_list +ffffffff8336d010 d kernel_fb_helper_lock +ffffffff8336e000 D drm_global_mutex +ffffffff8336f000 D i2c_bit_algo +ffffffff8336f010 d drm_fence_context_count +ffffffff8336f018 d dma_fence_stub_mtx +ffffffff8336f028 D wait_bit_mtx +ffffffff8336f038 D shrinkers +ffffffff83370000 d crtc_ww_class +ffffffff83371000 d panel_lock +ffffffff83371010 d panel_list +ffffffff83372000 d ttm_global_mutex +ffffffff83373000 D drm_sched_policy +ffffffff83374000 D intel_bbops +ffffffff83375000 d i915_sys_placement +ffffffff83375020 d i915_ttm_bo_driver +ffffffff83376000 d mchdev_lock +ffffffff83377000 D inteldrm_stdscreen +ffffffff83377030 D inteldrm_scrlist +ffffffff83377038 D inteldrm_screenlist +ffffffff83377048 D inteldrm_accessops +ffffffff833770a8 D inteldrm_cd +ffffffff83378000 d capture_mutex +ffffffff83379000 d mitigations +ffffffff8337a000 D i915_modparams +ffffffff8337b000 d schedule_lock +ffffffff8337c000 d unbind_fence_ops +ffffffff8337d000 D intel_graphics_stolen_res +ffffffff8337e000 D btc_valid_sclk +ffffffff8337f000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff8337f020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff83380000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff83380008 d r600_cs_packet_parse_vline.vline_status +ffffffff83381000 d r100_asic +ffffffff833812e0 d r200_asic +ffffffff833815c0 d r300_asic_pcie +ffffffff833818a0 d r300_asic +ffffffff83381b80 d r420_asic +ffffffff83381e60 d rs400_asic +ffffffff83382140 d rs600_asic +ffffffff83382420 d rs690_asic +ffffffff83382700 d rv515_asic +ffffffff833829e0 d r520_asic +ffffffff83382cc0 d r600_asic +ffffffff83382fa0 d rv6xx_asic +ffffffff83383280 d rs780_asic +ffffffff83383560 d rv770_asic +ffffffff83383840 d evergreen_asic +ffffffff83383b20 d sumo_asic +ffffffff83383e00 d btc_asic +ffffffff833840e0 d cayman_asic +ffffffff833843c0 d trinity_asic +ffffffff833846a0 d si_asic +ffffffff83384980 d ci_asic +ffffffff83384c60 d kv_asic +ffffffff83385000 d dce6_funcs +ffffffff83385018 d dce6_hdmi_funcs +ffffffff83385088 d dce6_dp_funcs +ffffffff833850f8 d dce4_funcs +ffffffff83385110 d dce4_hdmi_funcs +ffffffff83385180 d dce4_dp_funcs +ffffffff833851f0 d dce32_funcs +ffffffff83385208 d dce32_hdmi_funcs +ffffffff83385278 d dce32_dp_funcs +ffffffff833852e8 d r600_funcs +ffffffff83385300 d r600_hdmi_funcs +ffffffff83386000 D radeon_modeset +ffffffff83386004 D radeon_dynclks +ffffffff83386008 D radeon_agpmode +ffffffff8338600c D radeon_gart_size +ffffffff83386010 D radeon_tv +ffffffff83386014 D radeon_audio +ffffffff83386018 D radeon_pcie_gen2 +ffffffff8338601c D radeon_msi +ffffffff83386020 D radeon_lockup_timeout +ffffffff83386024 D radeon_dpm +ffffffff83386028 D radeon_aspm +ffffffff8338602c D radeon_runtime_pm +ffffffff83386030 D radeon_vm_size +ffffffff83386034 D radeon_vm_block_size +ffffffff83386038 D radeon_use_pflipirq +ffffffff8338603c D radeon_bapm +ffffffff83386040 D radeon_backlight +ffffffff83386044 D radeon_auxch +ffffffff83386048 D radeon_uvd +ffffffff8338604c D radeon_vce +ffffffff83386050 D radeon_si_support +ffffffff83386054 D radeon_cik_support +ffffffff83386058 D radeondrm_cd +ffffffff83386078 D radeondrm_stdscreen +ffffffff833860a8 D radeondrm_scrlist +ffffffff833860b0 D radeondrm_screenlist +ffffffff833860c0 D radeondrm_accessops +ffffffff83387000 D radeon_bbops +ffffffff83388000 d radeon_bo_driver +ffffffff83389000 d verde_pg_init +ffffffff8338a000 d cac_weights_pitcairn +ffffffff8338a4d0 d cac_weights_oland +ffffffff8338b000 d aldebaran_mode2_handler +ffffffff8338c000 d amdgpu_vbios_version_attrs +ffffffff8338d000 D amdgpu_asic_name +ffffffff8338e000 D amdgpu_vram_limit +ffffffff8338e004 D amdgpu_gart_size +ffffffff8338e008 D amdgpu_gtt_size +ffffffff8338e00c D amdgpu_moverate +ffffffff8338e010 D amdgpu_audio +ffffffff8338e014 D amdgpu_pcie_gen2 +ffffffff8338e018 D amdgpu_msi +ffffffff8338e01c D amdgpu_dpm +ffffffff8338e020 D amdgpu_fw_load_type +ffffffff8338e024 D amdgpu_aspm +ffffffff8338e028 D amdgpu_runtime_pm +ffffffff8338e02c D amdgpu_ip_block_mask +ffffffff8338e030 D amdgpu_bapm +ffffffff8338e034 D amdgpu_vm_size +ffffffff8338e038 D amdgpu_vm_fragment_size +ffffffff8338e03c D amdgpu_vm_block_size +ffffffff8338e040 D amdgpu_vm_update_mode +ffffffff8338e044 D amdgpu_dc +ffffffff8338e048 D amdgpu_sched_jobs +ffffffff8338e04c D amdgpu_sched_hw_submission +ffffffff8338e050 D amdgpu_cg_mask +ffffffff8338e058 D amdgpu_pg_mask +ffffffff8338e05c D amdgpu_sdma_phase_quantum +ffffffff8338e060 D amdgpu_pp_feature_mask +ffffffff8338e064 D amdgpu_lbpw +ffffffff8338e068 D amdgpu_compute_multipipe +ffffffff8338e06c D amdgpu_gpu_recovery +ffffffff8338e070 D amdgpu_smu_pptable_id +ffffffff8338e074 D amdgpu_dc_feature_mask +ffffffff8338e078 D amdgpu_async_gfx_ring +ffffffff8338e07c D amdgpu_mcbp +ffffffff8338e080 D amdgpu_discovery +ffffffff8338e084 D amdgpu_noretry +ffffffff8338e088 D amdgpu_force_asic_type +ffffffff8338e08c D amdgpu_tmz +ffffffff8338e090 D amdgpu_reset_method +ffffffff8338e094 D amdgpu_num_kcq +ffffffff8338e098 D amdgpu_use_xgmi_p2p +ffffffff8338e09c D amdgpu_sg_display +ffffffff8338e0a0 D amdgpu_user_partt_mode +ffffffff8338e0a8 D mgpu_info +ffffffff8338e558 D amdgpu_ras_enable +ffffffff8338e55c D amdgpu_ras_mask +ffffffff8338e560 D amdgpu_bad_page_threshold +ffffffff8338e564 D amdgpu_backlight +ffffffff8338e568 D amdgpu_cd +ffffffff8338e588 D amdgpu_stdscreen +ffffffff8338e5b8 D amdgpu_scrlist +ffffffff8338e5c0 D amdgpu_screenlist +ffffffff8338e5d0 D amdgpu_accessops +ffffffff8338f000 d amdgpu_gtt_mgr_attributes +ffffffff83390000 D amdgpu_bbops +ffffffff83391000 D soc15_ih_clientid_name +ffffffff83392000 D ras_error_string +ffffffff83392030 D ras_block_string +ffffffff833920c0 D ras_mca_block_string +ffffffff83393000 d amdgpu_bo_driver +ffffffff83394000 d amdgpu_vram_mgr_attributes +ffffffff83395000 d xgmi_mutex +ffffffff83395010 D xgmi_ras_hw_ops +ffffffff83395050 D xgmi_ras +ffffffff83396000 D aqua_vanjaram_xcp_funcs +ffffffff83397000 D gfx_v11_0_3_ras +ffffffff83398000 d gfx_v9_0_ras +ffffffff83399000 D gfx_v9_4_ras +ffffffff8339a000 D gfx_v9_4_2_ras_ops +ffffffff8339a040 D gfx_v9_4_2_ras +ffffffff8339b000 D gfx_v9_4_3_xcp_funcs +ffffffff8339b020 D gfx_v9_4_3_ras_ops +ffffffff8339b060 D gfx_v9_4_3_ras +ffffffff8339c000 D gfxhub_v1_2_xcp_funcs +ffffffff8339d000 D hdp_v4_0_ras_hw_ops +ffffffff8339d040 D hdp_v4_0_ras +ffffffff8339e000 d jpeg_v2_6_ras +ffffffff8339f000 d jpeg_v4_0_ras +ffffffff833a0000 d jpeg_v4_0_3_ras +ffffffff833a1000 D mca_v3_0_mp0_ras +ffffffff833a1058 D mca_v3_0_mp1_ras +ffffffff833a10b0 D mca_v3_0_mpio_ras +ffffffff833a2000 D mmhub_v1_0_ras_hw_ops +ffffffff833a2040 D mmhub_v1_0_ras +ffffffff833a3000 D mmhub_v1_7_ras_hw_ops +ffffffff833a3040 D mmhub_v1_7_ras +ffffffff833a4000 D mmhub_v1_8_ras +ffffffff833a5000 D mmhub_v9_4_ras +ffffffff833a6000 D nbio_v4_3_ras +ffffffff833a7000 D nbio_v7_4_ras +ffffffff833a8000 D nbio_v7_9_ras +ffffffff833a9000 d sriov_sc_video_codecs_encode +ffffffff833a9010 d sriov_sc_video_codecs_decode_vcn1 +ffffffff833a9020 d sriov_sc_video_codecs_decode_vcn0 +ffffffff833a9030 d sriov_sc_video_codecs_encode_array +ffffffff833a9060 d sriov_sc_video_codecs_decode_array_vcn1 +ffffffff833a90f0 d sriov_sc_video_codecs_decode_array_vcn0 +ffffffff833aa000 d sdma_v4_0_ras +ffffffff833ab000 D sdma_v4_4_ras +ffffffff833ac000 D sdma_v4_4_2_xcp_funcs +ffffffff833ac020 d sdma_v4_4_2_ras +ffffffff833ad000 d sdma_v6_0_3_ras +ffffffff833ae000 d sienna_cichlid_mode2_handler +ffffffff833af000 d smu_v13_0_10_mode2_handler +ffffffff833b0000 d sriov_vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff833b0010 d sriov_vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff833b0020 d sriov_vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff833b0030 d sriov_vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff833b0040 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff833b0070 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff833b0100 d sriov_vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff833b0140 d sriov_vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff833b1000 D umc_v6_1_ras +ffffffff833b2000 D umc_v6_7_ras +ffffffff833b3000 D umc_v8_10_ras +ffffffff833b4000 D umc_v8_7_ras +ffffffff833b5000 d vcn_v2_6_ras +ffffffff833b6000 d vcn_v4_0_unified_ring_vm_funcs +ffffffff833b6140 d vcn_v4_0_ras +ffffffff833b7000 d vcn_v4_0_3_ras +ffffffff833b8000 d amdgpu_dm_mode_config_helperfuncs +ffffffff833b8010 d dm_atomic_state_funcs +ffffffff833b9000 d construct_integrated_info.result +ffffffff833b9004 d bios_parser_get_firmware_info.result +ffffffff833ba000 d dce_funcs +ffffffff833bb000 d dce110_funcs +ffffffff833bc000 d dce112_funcs +ffffffff833bd000 d dce120_funcs +ffffffff833be000 d rv1_clk_funcs +ffffffff833be090 d rv1_clk_internal_funcs +ffffffff833bf000 d rv2_clk_internal_funcs +ffffffff833c0000 d dcn2_funcs +ffffffff833c1000 d dcn201_funcs +ffffffff833c2000 d dcn21_funcs +ffffffff833c2090 d rn_bw_params +ffffffff833c3000 D dcn3_fpga_funcs +ffffffff833c3090 d dcn3_funcs +ffffffff833c4000 d vg_funcs +ffffffff833c4090 d dummy_clocks +ffffffff833c41c0 d vg_bw_params +ffffffff833c5000 d dcn31_funcs +ffffffff833c5090 d dcn31_bw_params +ffffffff833c6000 d dcn314_funcs +ffffffff833c6090 d dcn314_bw_params +ffffffff833c7000 d dcn315_funcs +ffffffff833c7090 d dcn315_bw_params +ffffffff833c8000 d dcn316_funcs +ffffffff833c8090 d dcn316_bw_params +ffffffff833c9000 d dcn32_funcs +ffffffff833ca000 d dcn10_dpp_cap +ffffffff833cb000 d dcn20_dpp_funcs +ffffffff833cb110 d dcn20_dpp_cap +ffffffff833cc000 d dcn20_hubp_funcs +ffffffff833cd000 d dcn20_opp_funcs +ffffffff833ce000 d dcn20_tg_funcs +ffffffff833cf000 d dcn201_dpp_funcs +ffffffff833cf110 d dcn201_dpp_cap +ffffffff833d0000 d dcn201_hubp_funcs +ffffffff833d1000 d dcn201_opp_funcs +ffffffff833d2000 d dcn201_tg_funcs +ffffffff833d3000 d dcn201_res_pool_funcs +ffffffff833d30f8 d dcn201_ip +ffffffff833d32b0 d dcn201_soc +ffffffff833d5000 d dcn21_hubp_funcs +ffffffff833d6000 d dcn30_afmt_funcs +ffffffff833d7000 d dcn30_dpp_funcs +ffffffff833d7110 d dcn30_dpp_cap +ffffffff833d8000 d dcn30_hubp_funcs +ffffffff833d9000 d dcn30_tg_funcs +ffffffff833da000 d dcn30_vpg_funcs +ffffffff833db000 d dcn30_tg_funcs +ffffffff833dc000 d res_cap_dcn301 +ffffffff833dc040 d dcn301_res_pool_funcs +ffffffff833dd000 d dcn302_res_pool_funcs +ffffffff833de000 d dcn303_res_pool_funcs +ffffffff833df000 d dcn31_afmt_funcs +ffffffff833e0000 d dcn31_apg_funcs +ffffffff833e1000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff833e2000 d dcn31_hubp_funcs +ffffffff833e3000 d dcn31_tg_funcs +ffffffff833e4000 d dcn31_res_pool_funcs +ffffffff833e5000 d dcn31_vpg_funcs +ffffffff833e6000 d dcn314_tg_funcs +ffffffff833e7000 d dcn314_res_pool_funcs +ffffffff833e8000 d dcn315_res_pool_funcs +ffffffff833e9000 d dcn316_res_pool_funcs +ffffffff833ea000 d dcn32_dpp_funcs +ffffffff833ea110 d dcn32_dpp_cap +ffffffff833eb000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff833ec000 d dcn32_hubp_funcs +ffffffff833ed000 d dcn32_tg_funcs +ffffffff833ee000 d dcn32_res_pool_funcs +ffffffff833ef000 d dcn321_res_pool_funcs +ffffffff833f0000 D dcn1_0_ip +ffffffff833f01b8 D dcn1_0_soc +ffffffff833f2000 D dcn2_0_ip +ffffffff833f21b8 D dcn2_0_nv14_ip +ffffffff833f2370 D dcn2_0_soc +ffffffff833f36a8 D dcn2_0_nv14_soc +ffffffff833f49e0 D dcn2_0_nv12_soc +ffffffff833f5d18 D dcn2_1_ip +ffffffff833f5ed0 D dcn2_1_soc +ffffffff833f7208 D ddr4_wm_table_gs +ffffffff833f72c8 D lpddr4_wm_table_gs +ffffffff833f7388 D lpddr4_wm_table_with_disabled_ppt +ffffffff833f7448 D ddr4_wm_table_rn +ffffffff833f7508 D ddr4_1R_wm_table_rn +ffffffff833f75c8 D lpddr4_wm_table_rn +ffffffff833f8000 D dcn3_0_ip +ffffffff833f81b8 D dcn3_0_soc +ffffffff833fa000 D dcn3_01_ip +ffffffff833fa1b8 D dcn3_01_soc +ffffffff833fb4f0 D ddr4_wm_table +ffffffff833fb5b0 D lpddr5_wm_table +ffffffff833fc000 D dcn3_02_ip +ffffffff833fc1b8 D dcn3_02_soc +ffffffff833fe000 D dcn3_03_ip +ffffffff833fe1b8 D dcn3_03_soc +ffffffff83400000 D dcn3_1_ip +ffffffff834001b8 D dcn3_15_ip +ffffffff83400370 D dcn3_16_ip +ffffffff83400528 d dcn3_15_soc +ffffffff83401860 d dcn3_1_soc +ffffffff83402b98 d dcn3_16_soc +ffffffff83404000 D dcn3_14_ip +ffffffff834041b8 d dcn3_14_soc +ffffffff83406000 D dcn3_2_ip +ffffffff834061b8 D dcn3_2_soc +ffffffff83408000 D dcn3_21_ip +ffffffff834081b8 D dcn3_21_soc +ffffffff8340a000 d dsc_policy_max_target_bpp_limit +ffffffff8340b000 D DIDTEDCConfig_P12 +ffffffff8340b070 d smu7_profiling +ffffffff8340c000 d cyan_skillfish_table_map +ffffffff8340c080 d cyan_skillfish_message_map +ffffffff8340d000 d navi10_table_map +ffffffff8340d080 d navi10_pwr_src_map +ffffffff8340d090 d navi10_workload_map +ffffffff8340d0e0 d navi10_message_map +ffffffff8340db60 d navi10_clk_map +ffffffff8340dc20 d navi10_feature_mask_map +ffffffff8340e000 d sienna_cichlid_table_map +ffffffff8340e080 d sienna_cichlid_pwr_src_map +ffffffff8340e090 d sienna_cichlid_workload_map +ffffffff8340e0e0 d sienna_cichlid_message_map +ffffffff8340eb60 d sienna_cichlid_clk_map +ffffffff8340ec20 d sienna_cichlid_feature_mask_map +ffffffff8340f000 d vangogh_message_map +ffffffff8340fa80 d vangogh_table_map +ffffffff8340fb00 d vangogh_workload_map +ffffffff8340fb50 d vangogh_feature_mask_map +ffffffff83410000 d renoir_table_map +ffffffff83410080 d renoir_workload_map +ffffffff834100d0 d renoir_message_map +ffffffff83410b50 d renoir_clk_map +ffffffff83411000 d smu_v13_0_0_message_map +ffffffff83411a80 d smu_v13_0_0_feature_mask_map +ffffffff83411e50 d smu_v13_0_0_table_map +ffffffff83411ed0 d smu_v13_0_0_pwr_src_map +ffffffff83411ee0 d smu_v13_0_0_workload_map +ffffffff83411f30 d smu_v13_0_0_clk_map +ffffffff83412000 d smu_v13_0_4_table_map +ffffffff83412080 d smu_v13_0_4_message_map +ffffffff83412b00 d smu_v13_0_4_feature_mask_map +ffffffff83413000 d smu_v13_0_5_table_map +ffffffff83413080 d smu_v13_0_5_message_map +ffffffff83413b00 d smu_v13_0_5_feature_mask_map +ffffffff83414000 d smu_v13_0_7_message_map +ffffffff83414a80 d smu_v13_0_7_feature_mask_map +ffffffff83414e50 d smu_v13_0_7_table_map +ffffffff83414ed0 d smu_v13_0_7_pwr_src_map +ffffffff83414ee0 d smu_v13_0_7_workload_map +ffffffff83414f30 d smu_v13_0_7_clk_map +ffffffff83415000 d yellow_carp_table_map +ffffffff83415080 d yellow_carp_message_map +ffffffff83415b00 d yellow_carp_feature_mask_map +ffffffff83416000 D pci_conf_lock +ffffffff83416010 D pci_bus_dma_tag +ffffffff83416088 D msi_pic +ffffffff83416120 D msix_pic +ffffffff83417000 D pchb_cd +ffffffff83418000 D amas_cd +ffffffff83419000 D cardslot_cd +ffffffff8341a000 D cardbus_cd +ffffffff8341b000 d csdevs +ffffffff8341c000 d ral_rt2560_opns +ffffffff8341c028 d ral_rt2661_opns +ffffffff8341c050 d ral_rt2860_opns +ffffffff8341d000 D pcmcia_cd +ffffffff8341e000 D pcmcia_3cxem556_func0 +ffffffff8341e0b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff8341e158 D pcmcia_megahertz_xjem1144_func0 +ffffffff8341e210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff8341e2b0 d pcmcia_3cxem556_func1 +ffffffff8341e368 d pcmcia_3cxem556_func1_cfe0 +ffffffff8341e408 d pcmcia_megahertz_xjem1144_func1 +ffffffff8341e4c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff8341e560 d pcmcia_sierra_a555_func1 +ffffffff8341e618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff8341e6b8 d pcmcia_sveclancard_func0 +ffffffff8341e770 d pcmcia_sveclancard_func0_cfe0 +ffffffff8341f000 D ep_pcmcia_prod +ffffffff83420000 D aic_pcmcia_prod +ffffffff83421000 D com_pcmcia_prod +ffffffff83422000 D wdc_pcmcia_pr +ffffffff83423000 D sm_pcmcia_prod +ffffffff83424000 D xe_cd +ffffffff83425000 D pcib_cd +ffffffff83426000 D amdpcib_cd +ffffffff83427000 D tcpcib_cd +ffffffff83428000 D aapic_cd +ffffffff83429000 D hme_cd +ffffffff8342a000 D isa_cd +ffffffff8342b000 D isadma_cd +ffffffff8342c000 D fdc_cd +ffffffff8342d000 D fd_types +ffffffff8342d1f8 D fd_cd +ffffffff8342e000 D mpu_cd +ffffffff8342f000 D pcppi_cd +ffffffff83430000 D spkr_cd +ffffffff83431000 D wbsio_cd +ffffffff83432000 D schsio_cd +ffffffff83433000 D it_cd +ffffffff83434000 D uguru_cd +ffffffff83435000 D aps_cd +ffffffff83436000 D isa_bus_dma_tag +ffffffff83437000 D wsdisplay_cd +ffffffff83437020 D wsdisplay_cons +ffffffff83437058 D wsdisplay_defaultscreens +ffffffff83438000 D wskbd_cd +ffffffff83438020 D wskbd_default_bell_data +ffffffff83438030 D wskbd_default_keyrepeat_data +ffffffff83438040 D wskbd_srcops +ffffffff83439000 d compose_tab +ffffffff8343a000 D wsmouse_cd +ffffffff8343a020 D wsmouse_srcops +ffffffff8343b000 D wsmux_srcops +ffffffff8343b030 D wsmux_tree_lock +ffffffff8343c000 D vt100_output +ffffffff8343d000 D pckbd_cd +ffffffff8343e000 D pms_cd +ffffffff8343e020 d synaptics_params +ffffffff8343e030 d alps_params +ffffffff8343f000 D skgpio_cd +ffffffff83440000 D pctr_conf_lock +ffffffff83441000 D ukbd_keymapdata +ffffffff83442000 D usbrev_str +ffffffff83442030 D usb_cd +ffffffff83443000 d usbd_ratecheck.errinterval +ffffffff83444000 D uhub_cd +ffffffff83445000 D uaudio_cd +ffffffff83446000 D uvideo_ctrls +ffffffff834462d8 D uvideo_cd +ffffffff83447000 D utvfu_norm_params +ffffffff83447030 D utvfu_cd +ffffffff83448000 D udl_reg_vals_640x480_60 +ffffffff83448020 D udl_reg_vals_640x480_67 +ffffffff83448040 D udl_reg_vals_640x480_72 +ffffffff83448060 D udl_reg_vals_640x480_75 +ffffffff83448080 D udl_reg_vals_800x480_61 +ffffffff834480a0 D udl_reg_vals_800x600_56 +ffffffff834480c0 D udl_reg_vals_800x600_60 +ffffffff834480e0 D udl_reg_vals_800x600_72 +ffffffff83448100 D udl_reg_vals_800x600_74 +ffffffff83448120 D udl_reg_vals_800x600_75 +ffffffff83448140 D udl_reg_vals_1024x768_60 +ffffffff83448160 D udl_reg_vals_1024x768_70 +ffffffff83448180 D udl_reg_vals_1024x768_75 +ffffffff834481a0 D udl_reg_vals_1280x800_60 +ffffffff834481c0 D udl_reg_vals_1280x960_60 +ffffffff834481e0 D udl_reg_vals_1280x1024_60 +ffffffff83448200 D udl_reg_vals_1280x1024_75 +ffffffff83448220 D udl_reg_vals_1366x768_60 +ffffffff83448240 D udl_reg_vals_1440x900_60 +ffffffff83448260 D udl_reg_vals_1440x900_59 +ffffffff83448280 D udl_reg_vals_1440x900_75 +ffffffff834482a0 D udl_reg_vals_1680x1050_60 +ffffffff834482c0 D udl_reg_vals_1600x1200_60 +ffffffff834482e0 D udl_reg_vals_1920x1080_60 +ffffffff83448300 D udl_null_key_1 +ffffffff83448310 D udl_decomp_table +ffffffff83449510 D udl_cd +ffffffff83449530 D udl_stdscreen +ffffffff83449560 D udl_scrlist +ffffffff83449568 D udl_screenlist +ffffffff83449578 D udl_accessops +ffffffff8344a000 D umidi_cd +ffffffff8344b000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff8344b020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff8344b040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff8344b060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff8344b080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff8344b0a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff8344b0c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff8344b0e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff8344b100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff8344b120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff8344b140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff8344b160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff8344b180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff8344b1a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff8344b1c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff8344b1e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff8344b200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff8344b220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff8344b240 D umidi_quirklist +ffffffff8344b4a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff8344b4c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff8344b4d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff8344b4f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff8344b500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff8344b520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff8344b530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff8344b550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff8344b560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff8344b580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff8344b590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff8344b5b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff8344b5c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff8344b5e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff8344b5f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff8344b610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff8344b620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff8344b640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff8344b650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff8344b670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff8344b680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff8344b6a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff8344b6b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff8344b6d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff8344b6e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff8344b700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff8344b710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff8344b730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff8344b740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff8344b760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff8344b770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff8344b790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff8344b7a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff8344b7c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff8344b7d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff8344b7f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff8344c000 D ucom_cd +ffffffff8344c020 D sysctl_ucomlock +ffffffff8344d000 D ugen_cd +ffffffff8344e000 D uhidev_cd +ffffffff8344e020 d uhidev_use_rdesc.reportbuf +ffffffff8344f000 D uhid_cd +ffffffff83450000 D fido_cd +ffffffff83451000 D ujoy_cd +ffffffff83452000 D ukbd_cd +ffffffff83453000 D ums_cd +ffffffff83453020 d ums_fix_elecom_descriptor.match +ffffffff83454000 D umt_cd +ffffffff83455000 D def_scale +ffffffff83455020 D uts_cd +ffffffff83456000 D ubcmtp_cd +ffffffff83456020 d ubcmtp_wsmousecfg +ffffffff83457000 D ucycom_cd +ffffffff83458000 D uslhcom_cd +ffffffff83459000 D ulpt_fwdevs +ffffffff83459060 D ulpt_cd +ffffffff83459080 D ulptusein +ffffffff8345a000 D umass_cd +ffffffff8345a020 d umass_bbb_transfer.dCBWtag +ffffffff8345b000 D uthum_cd +ffffffff8345c000 D ugold_cd +ffffffff8345c020 d cmd_init +ffffffff8345c028 d cmd_type +ffffffff8345c030 d cmd_data +ffffffff8345d000 D utrh_cd +ffffffff8345e000 D uoakrh_cd +ffffffff8345f000 D uoaklux_cd +ffffffff83460000 D uoakv_cd +ffffffff83461000 D uonerng_cd +ffffffff83462000 D urng_cd +ffffffff83463000 D udcf_cd +ffffffff83464000 D umbg_cd +ffffffff83465000 D uvisor_cd +ffffffff83466000 D udsbr_cd +ffffffff83467000 D utwitch_cd +ffffffff83468000 D aue_cd +ffffffff83469000 D axe_cd +ffffffff8346a000 D axen_cd +ffffffff8346b000 D smsc_cd +ffffffff8346c000 D cue_devs +ffffffff8346c010 D cue_cd +ffffffff8346d000 D kue_cd +ffffffff8346e000 D cdce_cd +ffffffff8346f000 D urndis_cd +ffffffff83470000 D mos_cd +ffffffff83471000 D mue_cd +ffffffff83472000 D udav_cd +ffffffff83473000 D upl_devs +ffffffff83473008 D upl_cd +ffffffff83474000 D ugl_devs +ffffffff83474008 D ugl_cd +ffffffff83475000 D url_cd +ffffffff83476000 D ure_cd +ffffffff83477000 D uaq_cd +ffffffff83478000 D umodem_cd +ffffffff83479000 D uftdi_cd +ffffffff8347a000 D uplcom_cd +ffffffff8347b000 D umct_cd +ffffffff8347c000 D uvscom_cd +ffffffff8347d000 D ubsa_cd +ffffffff8347e000 D ukspan_cd +ffffffff8347f000 D uslcom_cd +ffffffff83480000 D uark_cd +ffffffff83481000 D moscom_cd +ffffffff83482000 D umcs_cd +ffffffff83483000 D uscom_cd +ffffffff83484000 D ucrcom_cd +ffffffff83485000 D uxrcom_cd +ffffffff83486000 D uipaq_cd +ffffffff83487000 D umsm_cd +ffffffff83488000 D uchcom_cd +ffffffff83489000 D uticom_cd +ffffffff8348a000 D wi_func_usb +ffffffff8348a060 D wi_usb_cd +ffffffff8348b000 D atu_cd +ffffffff8348b020 D atu_devs +ffffffff8348b270 D atu_radfirm +ffffffff8348c000 D ural_cd +ffffffff8348d000 D rum_cd +ffffffff8348e000 D run_cd +ffffffff8348e020 D rt3070_freqs +ffffffff8348f000 D mtw_cd +ffffffff83490000 D zyd_cd +ffffffff83491000 D upgt_cd +ffffffff83492000 D urtw_cd +ffffffff83493000 D urtwn_cd +ffffffff83494000 D rsu_cd +ffffffff83495000 D otus_cd +ffffffff83495020 d AR_PLCP_HDR_INTR +ffffffff83496000 D umb_xfer_tout +ffffffff83496010 D umb_uuid_basic_connect +ffffffff83496020 D umb_uuid_context_internet +ffffffff83496030 D umb_uuid_qmi_mbim +ffffffff83496040 D umb_cd +ffffffff83496060 D umb_delay +ffffffff83496070 D umb_qmi_alloc_cid +ffffffff83496080 D umb_qmi_fcc_auth +ffffffff83497000 D uath_cd +ffffffff83498000 D uow_cd +ffffffff83499000 D uberry_cd +ffffffff8349a000 D upd_cd +ffffffff8349a020 d upd_usage_roots +ffffffff8349a0a0 d upd_usage_batdep +ffffffff8349b000 D uwacom_cd +ffffffff8349b020 d uwacom_attach.wacom_report_buf +ffffffff8349c000 D bwfm_usb_bus_ops +ffffffff8349d000 D umstc_cd +ffffffff8349e000 D uhidpp_cd +ffffffff8349f000 D ucc_cd +ffffffff834a0000 D iic_cd +ffffffff834a1000 D probe_addrs_sensor +ffffffff834a1008 D probe_addrs_eeprom +ffffffff834a2000 D lmtemp_cd +ffffffff834a3000 D lmn_worklist +ffffffff834a3240 D lmn_cd +ffffffff834a4000 D lmenv_cd +ffffffff834a5000 D maxtmp_cd +ffffffff834a6000 D adc_cd +ffffffff834a7000 D admtemp_cd +ffffffff834a8000 D admlc_cd +ffffffff834a9000 D admtm_cd +ffffffff834aa000 D admtmp_cd +ffffffff834ab000 D admtt_cd +ffffffff834ac000 D maxds_cd +ffffffff834ad000 D adt_chips +ffffffff834ad160 D worklist +ffffffff834ad1a0 D adt_cd +ffffffff834ae000 D admcts_cd +ffffffff834af000 D wbng_cd +ffffffff834b0000 D nvt_cd +ffffffff834b1000 D adl_worklist +ffffffff834b1138 D adl_cd +ffffffff834b2000 D andl_cd +ffffffff834b3000 D sdtemp_cd +ffffffff834b4000 D lisa_cd +ffffffff834b5000 D ihidev_cd +ffffffff834b6000 D ikbd_cd +ffffffff834b7000 D ims_cd +ffffffff834b8000 D imt_cd +ffffffff834b9000 D iatp_cd +ffffffff834ba000 D ietp_cd +ffffffff834bb000 D bgw_cd +ffffffff834bc000 D icc_cd +ffffffff834bd000 D gpio_cd +ffffffff834be000 D acpi_cd +ffffffff834be020 D acpi_pcidevs +ffffffff834be030 D acpi_pcirootdevs +ffffffff834be040 D acpi_taskq +ffffffff834be050 d acpi_indicator.save_led_state +ffffffff834be060 d acpi_getprop.prop_guid +ffffffff834be070 d acpi_getpropint.prop_guid +ffffffff834be080 D acpi_skip_hids +ffffffff834be0f0 D acpi_isa_hids +ffffffff834bf000 D aml_intlen +ffffffff834bf010 D aml_table +ffffffff834bfaf0 d osstring +ffffffff834bfb10 D aml_defobj +ffffffff834bfca0 D aml_valid_osi +ffffffff834bfd78 D acpi_max_osi +ffffffff834bfd80 D aml_regionspace +ffffffff834c1000 D acpitimer_cd +ffffffff834c1020 d acpi_timecounter +ffffffff834c2000 D acpiac_cd +ffffffff834c2020 D acpiac_hids +ffffffff834c3000 D acpibat_cd +ffffffff834c3020 D acpibat_hids +ffffffff834c4000 D acpibtn_cd +ffffffff834c4020 D acpibtn_hids +ffffffff834c5000 D acpicmos_cd +ffffffff834c5020 D acpicmos_hids +ffffffff834c6000 D acpicpu_cd +ffffffff834c6020 D acpicpu_hids +ffffffff834c6030 d acpicpu_set_pdc.cpu_oscuuid +ffffffff834c7000 D acpihpet_cd +ffffffff834c7020 d hpet_timecounter +ffffffff834c8000 D acpiec_cd +ffffffff834c8020 D acpiec_hids +ffffffff834c9000 D acpitz_cd +ffffffff834c9020 D acpitz_perflevel +ffffffff834ca000 D acpimadt_cd +ffffffff834cb000 D acpimcfg_cd +ffffffff834cc000 D acpiprt_map_list +ffffffff834cc010 D acpiprt_cd +ffffffff834cc030 D acpiprt_pri +ffffffff834cd000 D acpidmar_force_cm +ffffffff834cd008 D acpidmar_cd +ffffffff834cd030 D vtd_faults +ffffffff834ce000 D acpidock_cd +ffffffff834cf000 D abl_cd +ffffffff834cf020 D abl_hids +ffffffff834d0000 D asmc_cd +ffffffff834d0020 D asmc_hids +ffffffff834d1000 D acpiasus_cd +ffffffff834d1020 D acpiasus_hids +ffffffff834d2000 D acpithinkpad_cd +ffffffff834d2020 D acpithinkpad_hids +ffffffff834d3000 D acpitoshiba_cd +ffffffff834d3020 D acpitoshiba_hids +ffffffff834d4000 D acpisony_cd +ffffffff834d5000 D acpivideo_cd +ffffffff834d6000 D acpivout_cd +ffffffff834d7000 D acpipwrres_cd +ffffffff834d8000 D aibs_cd +ffffffff834d8020 d aibs_hids +ffffffff834d9000 D aplgpio_cd +ffffffff834d9020 D aplgpio_hids +ffffffff834da000 D bytgpio_cd +ffffffff834da020 D bytgpio_hids +ffffffff834db000 D chvgpio_cd +ffffffff834db020 D chvgpio_hids +ffffffff834dc000 D glkgpio_cd +ffffffff834dc020 D glkgpio_hids +ffffffff834dd000 D pchgpio_cd +ffffffff834dd020 D pchgpio_hids +ffffffff834dd080 D pchgpio_devices +ffffffff834de000 D tipmic_cd +ffffffff834de020 D tipmic_thermal_regmap +ffffffff834de030 D tipmic_power_regmap +ffffffff834df000 D ccpmic_cd +ffffffff834df020 D ccpmic_thermal_regmap +ffffffff834df023 D ccpmic_power_regmap +ffffffff834e0000 D com_hids +ffffffff834e1000 D sdhc_hids +ffffffff834e2000 D dwiic_hids +ffffffff834e2050 D ihidev_hids +ffffffff834e2070 D ietp_hids +ffffffff834e2220 D iatp_hids +ffffffff834e2240 d dwiic_acpi_found_ihidev.i2c_hid_guid +ffffffff834e3000 D acpicbkbd_cd +ffffffff834e3020 D acpicbkbd_hids +ffffffff834e4000 D acpials_cd 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